node-red-STM32/OZE_Main/Debug/OZE_Main.list

OZE_Main.elf:     file format elf32-littlearm

Sections:
Idx Name          Size      VMA       LMA       File off  Algn
  0 .isr_vector   00000298  08000000  08000000  00001000  2**0
                  CONTENTS, ALLOC, LOAD, READONLY, DATA
  1 .text         0002c9a0  080002a0  080002a0  000012a0  2**4
                  CONTENTS, ALLOC, LOAD, READONLY, CODE
  2 .rodata       00004d4c  0802cc40  0802cc40  0002dc40  2**3
                  CONTENTS, ALLOC, LOAD, READONLY, DATA
  3 .ARM          00000008  0803198c  0803198c  0003298c  2**2
                  CONTENTS, ALLOC, LOAD, READONLY, DATA
  4 .init_array   00000004  08031994  08031994  00032994  2**2
                  CONTENTS, ALLOC, LOAD, READONLY, DATA
  5 .fini_array   00000004  08031998  08031998  00032998  2**2
                  CONTENTS, ALLOC, LOAD, READONLY, DATA
  6 .data         00000224  24000000  0803199c  00033000  2**2
                  CONTENTS, ALLOC, LOAD, DATA
  7 .bss          0002b034  24000224  08031bc0  00033224  2**2
                  ALLOC
  8 ._user_heap_stack 00000600  2402b258  08031bc0  00033258  2**0
                  ALLOC
  9 .lwip_sec     0001932b  2402b858  08031bc0  00033858  2**2
                  ALLOC
 10 .ARM.attributes 0000002e  00000000  00000000  00033224  2**0
                  CONTENTS, READONLY
 11 .debug_info   000519ac  00000000  00000000  00033252  2**0
                  CONTENTS, READONLY, DEBUGGING, OCTETS
 12 .debug_abbrev 0000b6de  00000000  00000000  00084bfe  2**0
                  CONTENTS, READONLY, DEBUGGING, OCTETS
 13 .debug_aranges 00003838  00000000  00000000  000902e0  2**3
                  CONTENTS, READONLY, DEBUGGING, OCTETS
 14 .debug_rnglists 00002cec  00000000  00000000  00093b18  2**0
                  CONTENTS, READONLY, DEBUGGING, OCTETS
 15 .debug_macro  0004f343  00000000  00000000  00096804  2**0
                  CONTENTS, READONLY, DEBUGGING, OCTETS
 16 .debug_line   00057c31  00000000  00000000  000e5b47  2**0
                  CONTENTS, READONLY, DEBUGGING, OCTETS
 17 .debug_str    0018e90f  00000000  00000000  0013d778  2**0
                  CONTENTS, READONLY, DEBUGGING, OCTETS
 18 .comment      00000043  00000000  00000000  002cc087  2**0
                  CONTENTS, READONLY
 19 .debug_frame  0000fbf0  00000000  00000000  002cc0cc  2**2
                  CONTENTS, READONLY, DEBUGGING, OCTETS
 20 .debug_line_str 00000064  00000000  00000000  002dbcbc  2**0
                  CONTENTS, READONLY, DEBUGGING, OCTETS

Disassembly of section .text:

080002a0 <__do_global_dtors_aux>:
 80002a0:	b510      	push	{r4, lr}
 80002a2:	4c05      	ldr	r4, [pc, #20]	@ (80002b8 <__do_global_dtors_aux+0x18>)
 80002a4:	7823      	ldrb	r3, [r4, #0]
 80002a6:	b933      	cbnz	r3, 80002b6 <__do_global_dtors_aux+0x16>
 80002a8:	4b04      	ldr	r3, [pc, #16]	@ (80002bc <__do_global_dtors_aux+0x1c>)
 80002aa:	b113      	cbz	r3, 80002b2 <__do_global_dtors_aux+0x12>
 80002ac:	4804      	ldr	r0, [pc, #16]	@ (80002c0 <__do_global_dtors_aux+0x20>)
 80002ae:	f3af 8000 	nop.w
 80002b2:	2301      	movs	r3, #1
 80002b4:	7023      	strb	r3, [r4, #0]
 80002b6:	bd10      	pop	{r4, pc}
 80002b8:	24000224 	.word	0x24000224
 80002bc:	00000000 	.word	0x00000000
 80002c0:	0802cc28 	.word	0x0802cc28

080002c4 <frame_dummy>:
 80002c4:	b508      	push	{r3, lr}
 80002c6:	4b03      	ldr	r3, [pc, #12]	@ (80002d4 <frame_dummy+0x10>)
 80002c8:	b11b      	cbz	r3, 80002d2 <frame_dummy+0xe>
 80002ca:	4903      	ldr	r1, [pc, #12]	@ (80002d8 <frame_dummy+0x14>)
 80002cc:	4803      	ldr	r0, [pc, #12]	@ (80002dc <frame_dummy+0x18>)
 80002ce:	f3af 8000 	nop.w
 80002d2:	bd08      	pop	{r3, pc}
 80002d4:	00000000 	.word	0x00000000
 80002d8:	24000228 	.word	0x24000228
 80002dc:	0802cc28 	.word	0x0802cc28

080002e0 <strcmp>:
 80002e0:	f810 2b01 	ldrb.w	r2, [r0], #1
 80002e4:	f811 3b01 	ldrb.w	r3, [r1], #1
 80002e8:	2a01      	cmp	r2, #1
 80002ea:	bf28      	it	cs
 80002ec:	429a      	cmpcs	r2, r3
 80002ee:	d0f7      	beq.n	80002e0 <strcmp>
 80002f0:	1ad0      	subs	r0, r2, r3
 80002f2:	4770      	bx	lr
	...

08000300 <memchr>:
 8000300:	f001 01ff 	and.w	r1, r1, #255	@ 0xff
 8000304:	2a10      	cmp	r2, #16
 8000306:	db2b      	blt.n	8000360 <memchr+0x60>
 8000308:	f010 0f07 	tst.w	r0, #7
 800030c:	d008      	beq.n	8000320 <memchr+0x20>
 800030e:	f810 3b01 	ldrb.w	r3, [r0], #1
 8000312:	3a01      	subs	r2, #1
 8000314:	428b      	cmp	r3, r1
 8000316:	d02d      	beq.n	8000374 <memchr+0x74>
 8000318:	f010 0f07 	tst.w	r0, #7
 800031c:	b342      	cbz	r2, 8000370 <memchr+0x70>
 800031e:	d1f6      	bne.n	800030e <memchr+0xe>
 8000320:	b4f0      	push	{r4, r5, r6, r7}
 8000322:	ea41 2101 	orr.w	r1, r1, r1, lsl #8
 8000326:	ea41 4101 	orr.w	r1, r1, r1, lsl #16
 800032a:	f022 0407 	bic.w	r4, r2, #7
 800032e:	f07f 0700 	mvns.w	r7, #0
 8000332:	2300      	movs	r3, #0
 8000334:	e8f0 5602 	ldrd	r5, r6, [r0], #8
 8000338:	3c08      	subs	r4, #8
 800033a:	ea85 0501 	eor.w	r5, r5, r1
 800033e:	ea86 0601 	eor.w	r6, r6, r1
 8000342:	fa85 f547 	uadd8	r5, r5, r7
 8000346:	faa3 f587 	sel	r5, r3, r7
 800034a:	fa86 f647 	uadd8	r6, r6, r7
 800034e:	faa5 f687 	sel	r6, r5, r7
 8000352:	b98e      	cbnz	r6, 8000378 <memchr+0x78>
 8000354:	d1ee      	bne.n	8000334 <memchr+0x34>
 8000356:	bcf0      	pop	{r4, r5, r6, r7}
 8000358:	f001 01ff 	and.w	r1, r1, #255	@ 0xff
 800035c:	f002 0207 	and.w	r2, r2, #7
 8000360:	b132      	cbz	r2, 8000370 <memchr+0x70>
 8000362:	f810 3b01 	ldrb.w	r3, [r0], #1
 8000366:	3a01      	subs	r2, #1
 8000368:	ea83 0301 	eor.w	r3, r3, r1
 800036c:	b113      	cbz	r3, 8000374 <memchr+0x74>
 800036e:	d1f8      	bne.n	8000362 <memchr+0x62>
 8000370:	2000      	movs	r0, #0
 8000372:	4770      	bx	lr
 8000374:	3801      	subs	r0, #1
 8000376:	4770      	bx	lr
 8000378:	2d00      	cmp	r5, #0
 800037a:	bf06      	itte	eq
 800037c:	4635      	moveq	r5, r6
 800037e:	3803      	subeq	r0, #3
 8000380:	3807      	subne	r0, #7
 8000382:	f015 0f01 	tst.w	r5, #1
 8000386:	d107      	bne.n	8000398 <memchr+0x98>
 8000388:	3001      	adds	r0, #1
 800038a:	f415 7f80 	tst.w	r5, #256	@ 0x100
 800038e:	bf02      	ittt	eq
 8000390:	3001      	addeq	r0, #1
 8000392:	f415 3fc0 	tsteq.w	r5, #98304	@ 0x18000
 8000396:	3001      	addeq	r0, #1
 8000398:	bcf0      	pop	{r4, r5, r6, r7}
 800039a:	3801      	subs	r0, #1
 800039c:	4770      	bx	lr
 800039e:	bf00      	nop

080003a0 <strlen>:
 80003a0:	4603      	mov	r3, r0
 80003a2:	f813 2b01 	ldrb.w	r2, [r3], #1
 80003a6:	2a00      	cmp	r2, #0
 80003a8:	d1fb      	bne.n	80003a2 <strlen+0x2>
 80003aa:	1a18      	subs	r0, r3, r0
 80003ac:	3801      	subs	r0, #1
 80003ae:	4770      	bx	lr

080003b0 <__aeabi_drsub>:
 80003b0:	f081 4100 	eor.w	r1, r1, #2147483648	@ 0x80000000
 80003b4:	e002      	b.n	80003bc <__adddf3>
 80003b6:	bf00      	nop

080003b8 <__aeabi_dsub>:
 80003b8:	f083 4300 	eor.w	r3, r3, #2147483648	@ 0x80000000

080003bc <__adddf3>:
 80003bc:	b530      	push	{r4, r5, lr}
 80003be:	ea4f 0441 	mov.w	r4, r1, lsl #1
 80003c2:	ea4f 0543 	mov.w	r5, r3, lsl #1
 80003c6:	ea94 0f05 	teq	r4, r5
 80003ca:	bf08      	it	eq
 80003cc:	ea90 0f02 	teqeq	r0, r2
 80003d0:	bf1f      	itttt	ne
 80003d2:	ea54 0c00 	orrsne.w	ip, r4, r0
 80003d6:	ea55 0c02 	orrsne.w	ip, r5, r2
 80003da:	ea7f 5c64 	mvnsne.w	ip, r4, asr #21
 80003de:	ea7f 5c65 	mvnsne.w	ip, r5, asr #21
 80003e2:	f000 80e2 	beq.w	80005aa <__adddf3+0x1ee>
 80003e6:	ea4f 5454 	mov.w	r4, r4, lsr #21
 80003ea:	ebd4 5555 	rsbs	r5, r4, r5, lsr #21
 80003ee:	bfb8      	it	lt
 80003f0:	426d      	neglt	r5, r5
 80003f2:	dd0c      	ble.n	800040e <__adddf3+0x52>
 80003f4:	442c      	add	r4, r5
 80003f6:	ea80 0202 	eor.w	r2, r0, r2
 80003fa:	ea81 0303 	eor.w	r3, r1, r3
 80003fe:	ea82 0000 	eor.w	r0, r2, r0
 8000402:	ea83 0101 	eor.w	r1, r3, r1
 8000406:	ea80 0202 	eor.w	r2, r0, r2
 800040a:	ea81 0303 	eor.w	r3, r1, r3
 800040e:	2d36      	cmp	r5, #54	@ 0x36
 8000410:	bf88      	it	hi
 8000412:	bd30      	pophi	{r4, r5, pc}
 8000414:	f011 4f00 	tst.w	r1, #2147483648	@ 0x80000000
 8000418:	ea4f 3101 	mov.w	r1, r1, lsl #12
 800041c:	f44f 1c80 	mov.w	ip, #1048576	@ 0x100000
 8000420:	ea4c 3111 	orr.w	r1, ip, r1, lsr #12
 8000424:	d002      	beq.n	800042c <__adddf3+0x70>
 8000426:	4240      	negs	r0, r0
 8000428:	eb61 0141 	sbc.w	r1, r1, r1, lsl #1
 800042c:	f013 4f00 	tst.w	r3, #2147483648	@ 0x80000000
 8000430:	ea4f 3303 	mov.w	r3, r3, lsl #12
 8000434:	ea4c 3313 	orr.w	r3, ip, r3, lsr #12
 8000438:	d002      	beq.n	8000440 <__adddf3+0x84>
 800043a:	4252      	negs	r2, r2
 800043c:	eb63 0343 	sbc.w	r3, r3, r3, lsl #1
 8000440:	ea94 0f05 	teq	r4, r5
 8000444:	f000 80a7 	beq.w	8000596 <__adddf3+0x1da>
 8000448:	f1a4 0401 	sub.w	r4, r4, #1
 800044c:	f1d5 0e20 	rsbs	lr, r5, #32
 8000450:	db0d      	blt.n	800046e <__adddf3+0xb2>
 8000452:	fa02 fc0e 	lsl.w	ip, r2, lr
 8000456:	fa22 f205 	lsr.w	r2, r2, r5
 800045a:	1880      	adds	r0, r0, r2
 800045c:	f141 0100 	adc.w	r1, r1, #0
 8000460:	fa03 f20e 	lsl.w	r2, r3, lr
 8000464:	1880      	adds	r0, r0, r2
 8000466:	fa43 f305 	asr.w	r3, r3, r5
 800046a:	4159      	adcs	r1, r3
 800046c:	e00e      	b.n	800048c <__adddf3+0xd0>
 800046e:	f1a5 0520 	sub.w	r5, r5, #32
 8000472:	f10e 0e20 	add.w	lr, lr, #32
 8000476:	2a01      	cmp	r2, #1
 8000478:	fa03 fc0e 	lsl.w	ip, r3, lr
 800047c:	bf28      	it	cs
 800047e:	f04c 0c02 	orrcs.w	ip, ip, #2
 8000482:	fa43 f305 	asr.w	r3, r3, r5
 8000486:	18c0      	adds	r0, r0, r3
 8000488:	eb51 71e3 	adcs.w	r1, r1, r3, asr #31
 800048c:	f001 4500 	and.w	r5, r1, #2147483648	@ 0x80000000
 8000490:	d507      	bpl.n	80004a2 <__adddf3+0xe6>
 8000492:	f04f 0e00 	mov.w	lr, #0
 8000496:	f1dc 0c00 	rsbs	ip, ip, #0
 800049a:	eb7e 0000 	sbcs.w	r0, lr, r0
 800049e:	eb6e 0101 	sbc.w	r1, lr, r1
 80004a2:	f5b1 1f80 	cmp.w	r1, #1048576	@ 0x100000
 80004a6:	d31b      	bcc.n	80004e0 <__adddf3+0x124>
 80004a8:	f5b1 1f00 	cmp.w	r1, #2097152	@ 0x200000
 80004ac:	d30c      	bcc.n	80004c8 <__adddf3+0x10c>
 80004ae:	0849      	lsrs	r1, r1, #1
 80004b0:	ea5f 0030 	movs.w	r0, r0, rrx
 80004b4:	ea4f 0c3c 	mov.w	ip, ip, rrx
 80004b8:	f104 0401 	add.w	r4, r4, #1
 80004bc:	ea4f 5244 	mov.w	r2, r4, lsl #21
 80004c0:	f512 0f80 	cmn.w	r2, #4194304	@ 0x400000
 80004c4:	f080 809a 	bcs.w	80005fc <__adddf3+0x240>
 80004c8:	f1bc 4f00 	cmp.w	ip, #2147483648	@ 0x80000000
 80004cc:	bf08      	it	eq
 80004ce:	ea5f 0c50 	movseq.w	ip, r0, lsr #1
 80004d2:	f150 0000 	adcs.w	r0, r0, #0
 80004d6:	eb41 5104 	adc.w	r1, r1, r4, lsl #20
 80004da:	ea41 0105 	orr.w	r1, r1, r5
 80004de:	bd30      	pop	{r4, r5, pc}
 80004e0:	ea5f 0c4c 	movs.w	ip, ip, lsl #1
 80004e4:	4140      	adcs	r0, r0
 80004e6:	eb41 0101 	adc.w	r1, r1, r1
 80004ea:	3c01      	subs	r4, #1
 80004ec:	bf28      	it	cs
 80004ee:	f5b1 1f80 	cmpcs.w	r1, #1048576	@ 0x100000
 80004f2:	d2e9      	bcs.n	80004c8 <__adddf3+0x10c>
 80004f4:	f091 0f00 	teq	r1, #0
 80004f8:	bf04      	itt	eq
 80004fa:	4601      	moveq	r1, r0
 80004fc:	2000      	moveq	r0, #0
 80004fe:	fab1 f381 	clz	r3, r1
 8000502:	bf08      	it	eq
 8000504:	3320      	addeq	r3, #32
 8000506:	f1a3 030b 	sub.w	r3, r3, #11
 800050a:	f1b3 0220 	subs.w	r2, r3, #32
 800050e:	da0c      	bge.n	800052a <__adddf3+0x16e>
 8000510:	320c      	adds	r2, #12
 8000512:	dd08      	ble.n	8000526 <__adddf3+0x16a>
 8000514:	f102 0c14 	add.w	ip, r2, #20
 8000518:	f1c2 020c 	rsb	r2, r2, #12
 800051c:	fa01 f00c 	lsl.w	r0, r1, ip
 8000520:	fa21 f102 	lsr.w	r1, r1, r2
 8000524:	e00c      	b.n	8000540 <__adddf3+0x184>
 8000526:	f102 0214 	add.w	r2, r2, #20
 800052a:	bfd8      	it	le
 800052c:	f1c2 0c20 	rsble	ip, r2, #32
 8000530:	fa01 f102 	lsl.w	r1, r1, r2
 8000534:	fa20 fc0c 	lsr.w	ip, r0, ip
 8000538:	bfdc      	itt	le
 800053a:	ea41 010c 	orrle.w	r1, r1, ip
 800053e:	4090      	lslle	r0, r2
 8000540:	1ae4      	subs	r4, r4, r3
 8000542:	bfa2      	ittt	ge
 8000544:	eb01 5104 	addge.w	r1, r1, r4, lsl #20
 8000548:	4329      	orrge	r1, r5
 800054a:	bd30      	popge	{r4, r5, pc}
 800054c:	ea6f 0404 	mvn.w	r4, r4
 8000550:	3c1f      	subs	r4, #31
 8000552:	da1c      	bge.n	800058e <__adddf3+0x1d2>
 8000554:	340c      	adds	r4, #12
 8000556:	dc0e      	bgt.n	8000576 <__adddf3+0x1ba>
 8000558:	f104 0414 	add.w	r4, r4, #20
 800055c:	f1c4 0220 	rsb	r2, r4, #32
 8000560:	fa20 f004 	lsr.w	r0, r0, r4
 8000564:	fa01 f302 	lsl.w	r3, r1, r2
 8000568:	ea40 0003 	orr.w	r0, r0, r3
 800056c:	fa21 f304 	lsr.w	r3, r1, r4
 8000570:	ea45 0103 	orr.w	r1, r5, r3
 8000574:	bd30      	pop	{r4, r5, pc}
 8000576:	f1c4 040c 	rsb	r4, r4, #12
 800057a:	f1c4 0220 	rsb	r2, r4, #32
 800057e:	fa20 f002 	lsr.w	r0, r0, r2
 8000582:	fa01 f304 	lsl.w	r3, r1, r4
 8000586:	ea40 0003 	orr.w	r0, r0, r3
 800058a:	4629      	mov	r1, r5
 800058c:	bd30      	pop	{r4, r5, pc}
 800058e:	fa21 f004 	lsr.w	r0, r1, r4
 8000592:	4629      	mov	r1, r5
 8000594:	bd30      	pop	{r4, r5, pc}
 8000596:	f094 0f00 	teq	r4, #0
 800059a:	f483 1380 	eor.w	r3, r3, #1048576	@ 0x100000
 800059e:	bf06      	itte	eq
 80005a0:	f481 1180 	eoreq.w	r1, r1, #1048576	@ 0x100000
 80005a4:	3401      	addeq	r4, #1
 80005a6:	3d01      	subne	r5, #1
 80005a8:	e74e      	b.n	8000448 <__adddf3+0x8c>
 80005aa:	ea7f 5c64 	mvns.w	ip, r4, asr #21
 80005ae:	bf18      	it	ne
 80005b0:	ea7f 5c65 	mvnsne.w	ip, r5, asr #21
 80005b4:	d029      	beq.n	800060a <__adddf3+0x24e>
 80005b6:	ea94 0f05 	teq	r4, r5
 80005ba:	bf08      	it	eq
 80005bc:	ea90 0f02 	teqeq	r0, r2
 80005c0:	d005      	beq.n	80005ce <__adddf3+0x212>
 80005c2:	ea54 0c00 	orrs.w	ip, r4, r0
 80005c6:	bf04      	itt	eq
 80005c8:	4619      	moveq	r1, r3
 80005ca:	4610      	moveq	r0, r2
 80005cc:	bd30      	pop	{r4, r5, pc}
 80005ce:	ea91 0f03 	teq	r1, r3
 80005d2:	bf1e      	ittt	ne
 80005d4:	2100      	movne	r1, #0
 80005d6:	2000      	movne	r0, #0
 80005d8:	bd30      	popne	{r4, r5, pc}
 80005da:	ea5f 5c54 	movs.w	ip, r4, lsr #21
 80005de:	d105      	bne.n	80005ec <__adddf3+0x230>
 80005e0:	0040      	lsls	r0, r0, #1
 80005e2:	4149      	adcs	r1, r1
 80005e4:	bf28      	it	cs
 80005e6:	f041 4100 	orrcs.w	r1, r1, #2147483648	@ 0x80000000
 80005ea:	bd30      	pop	{r4, r5, pc}
 80005ec:	f514 0480 	adds.w	r4, r4, #4194304	@ 0x400000
 80005f0:	bf3c      	itt	cc
 80005f2:	f501 1180 	addcc.w	r1, r1, #1048576	@ 0x100000
 80005f6:	bd30      	popcc	{r4, r5, pc}
 80005f8:	f001 4500 	and.w	r5, r1, #2147483648	@ 0x80000000
 80005fc:	f045 41fe 	orr.w	r1, r5, #2130706432	@ 0x7f000000
 8000600:	f441 0170 	orr.w	r1, r1, #15728640	@ 0xf00000
 8000604:	f04f 0000 	mov.w	r0, #0
 8000608:	bd30      	pop	{r4, r5, pc}
 800060a:	ea7f 5c64 	mvns.w	ip, r4, asr #21
 800060e:	bf1a      	itte	ne
 8000610:	4619      	movne	r1, r3
 8000612:	4610      	movne	r0, r2
 8000614:	ea7f 5c65 	mvnseq.w	ip, r5, asr #21
 8000618:	bf1c      	itt	ne
 800061a:	460b      	movne	r3, r1
 800061c:	4602      	movne	r2, r0
 800061e:	ea50 3401 	orrs.w	r4, r0, r1, lsl #12
 8000622:	bf06      	itte	eq
 8000624:	ea52 3503 	orrseq.w	r5, r2, r3, lsl #12
 8000628:	ea91 0f03 	teqeq	r1, r3
 800062c:	f441 2100 	orrne.w	r1, r1, #524288	@ 0x80000
 8000630:	bd30      	pop	{r4, r5, pc}
 8000632:	bf00      	nop

08000634 <__aeabi_ui2d>:
 8000634:	f090 0f00 	teq	r0, #0
 8000638:	bf04      	itt	eq
 800063a:	2100      	moveq	r1, #0
 800063c:	4770      	bxeq	lr
 800063e:	b530      	push	{r4, r5, lr}
 8000640:	f44f 6480 	mov.w	r4, #1024	@ 0x400
 8000644:	f104 0432 	add.w	r4, r4, #50	@ 0x32
 8000648:	f04f 0500 	mov.w	r5, #0
 800064c:	f04f 0100 	mov.w	r1, #0
 8000650:	e750      	b.n	80004f4 <__adddf3+0x138>
 8000652:	bf00      	nop

08000654 <__aeabi_i2d>:
 8000654:	f090 0f00 	teq	r0, #0
 8000658:	bf04      	itt	eq
 800065a:	2100      	moveq	r1, #0
 800065c:	4770      	bxeq	lr
 800065e:	b530      	push	{r4, r5, lr}
 8000660:	f44f 6480 	mov.w	r4, #1024	@ 0x400
 8000664:	f104 0432 	add.w	r4, r4, #50	@ 0x32
 8000668:	f010 4500 	ands.w	r5, r0, #2147483648	@ 0x80000000
 800066c:	bf48      	it	mi
 800066e:	4240      	negmi	r0, r0
 8000670:	f04f 0100 	mov.w	r1, #0
 8000674:	e73e      	b.n	80004f4 <__adddf3+0x138>
 8000676:	bf00      	nop

08000678 <__aeabi_f2d>:
 8000678:	0042      	lsls	r2, r0, #1
 800067a:	ea4f 01e2 	mov.w	r1, r2, asr #3
 800067e:	ea4f 0131 	mov.w	r1, r1, rrx
 8000682:	ea4f 7002 	mov.w	r0, r2, lsl #28
 8000686:	bf1f      	itttt	ne
 8000688:	f012 437f 	andsne.w	r3, r2, #4278190080	@ 0xff000000
 800068c:	f093 4f7f 	teqne	r3, #4278190080	@ 0xff000000
 8000690:	f081 5160 	eorne.w	r1, r1, #939524096	@ 0x38000000
 8000694:	4770      	bxne	lr
 8000696:	f032 427f 	bics.w	r2, r2, #4278190080	@ 0xff000000
 800069a:	bf08      	it	eq
 800069c:	4770      	bxeq	lr
 800069e:	f093 4f7f 	teq	r3, #4278190080	@ 0xff000000
 80006a2:	bf04      	itt	eq
 80006a4:	f441 2100 	orreq.w	r1, r1, #524288	@ 0x80000
 80006a8:	4770      	bxeq	lr
 80006aa:	b530      	push	{r4, r5, lr}
 80006ac:	f44f 7460 	mov.w	r4, #896	@ 0x380
 80006b0:	f001 4500 	and.w	r5, r1, #2147483648	@ 0x80000000
 80006b4:	f021 4100 	bic.w	r1, r1, #2147483648	@ 0x80000000
 80006b8:	e71c      	b.n	80004f4 <__adddf3+0x138>
 80006ba:	bf00      	nop

080006bc <__aeabi_ul2d>:
 80006bc:	ea50 0201 	orrs.w	r2, r0, r1
 80006c0:	bf08      	it	eq
 80006c2:	4770      	bxeq	lr
 80006c4:	b530      	push	{r4, r5, lr}
 80006c6:	f04f 0500 	mov.w	r5, #0
 80006ca:	e00a      	b.n	80006e2 <__aeabi_l2d+0x16>

080006cc <__aeabi_l2d>:
 80006cc:	ea50 0201 	orrs.w	r2, r0, r1
 80006d0:	bf08      	it	eq
 80006d2:	4770      	bxeq	lr
 80006d4:	b530      	push	{r4, r5, lr}
 80006d6:	f011 4500 	ands.w	r5, r1, #2147483648	@ 0x80000000
 80006da:	d502      	bpl.n	80006e2 <__aeabi_l2d+0x16>
 80006dc:	4240      	negs	r0, r0
 80006de:	eb61 0141 	sbc.w	r1, r1, r1, lsl #1
 80006e2:	f44f 6480 	mov.w	r4, #1024	@ 0x400
 80006e6:	f104 0432 	add.w	r4, r4, #50	@ 0x32
 80006ea:	ea5f 5c91 	movs.w	ip, r1, lsr #22
 80006ee:	f43f aed8 	beq.w	80004a2 <__adddf3+0xe6>
 80006f2:	f04f 0203 	mov.w	r2, #3
 80006f6:	ea5f 0cdc 	movs.w	ip, ip, lsr #3
 80006fa:	bf18      	it	ne
 80006fc:	3203      	addne	r2, #3
 80006fe:	ea5f 0cdc 	movs.w	ip, ip, lsr #3
 8000702:	bf18      	it	ne
 8000704:	3203      	addne	r2, #3
 8000706:	eb02 02dc 	add.w	r2, r2, ip, lsr #3
 800070a:	f1c2 0320 	rsb	r3, r2, #32
 800070e:	fa00 fc03 	lsl.w	ip, r0, r3
 8000712:	fa20 f002 	lsr.w	r0, r0, r2
 8000716:	fa01 fe03 	lsl.w	lr, r1, r3
 800071a:	ea40 000e 	orr.w	r0, r0, lr
 800071e:	fa21 f102 	lsr.w	r1, r1, r2
 8000722:	4414      	add	r4, r2
 8000724:	e6bd      	b.n	80004a2 <__adddf3+0xe6>
 8000726:	bf00      	nop

08000728 <__aeabi_uldivmod>:
 8000728:	b953      	cbnz	r3, 8000740 <__aeabi_uldivmod+0x18>
 800072a:	b94a      	cbnz	r2, 8000740 <__aeabi_uldivmod+0x18>
 800072c:	2900      	cmp	r1, #0
 800072e:	bf08      	it	eq
 8000730:	2800      	cmpeq	r0, #0
 8000732:	bf1c      	itt	ne
 8000734:	f04f 31ff 	movne.w	r1, #4294967295	@ 0xffffffff
 8000738:	f04f 30ff 	movne.w	r0, #4294967295	@ 0xffffffff
 800073c:	f000 b9a2 	b.w	8000a84 <__aeabi_idiv0>
 8000740:	f1ad 0c08 	sub.w	ip, sp, #8
 8000744:	e96d ce04 	strd	ip, lr, [sp, #-16]!
 8000748:	f000 f83e 	bl	80007c8 <__udivmoddi4>
 800074c:	f8dd e004 	ldr.w	lr, [sp, #4]
 8000750:	e9dd 2302 	ldrd	r2, r3, [sp, #8]
 8000754:	b004      	add	sp, #16
 8000756:	4770      	bx	lr

08000758 <__aeabi_d2lz>:
 8000758:	b508      	push	{r3, lr}
 800075a:	4602      	mov	r2, r0
 800075c:	460b      	mov	r3, r1
 800075e:	ec43 2b17 	vmov	d7, r2, r3
 8000762:	eeb5 7bc0 	vcmpe.f64	d7, #0.0
 8000766:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 800076a:	d403      	bmi.n	8000774 <__aeabi_d2lz+0x1c>
 800076c:	e8bd 4008 	ldmia.w	sp!, {r3, lr}
 8000770:	f000 b80a 	b.w	8000788 <__aeabi_d2ulz>
 8000774:	eeb1 7b47 	vneg.f64	d7, d7
 8000778:	ec51 0b17 	vmov	r0, r1, d7
 800077c:	f000 f804 	bl	8000788 <__aeabi_d2ulz>
 8000780:	4240      	negs	r0, r0
 8000782:	eb61 0141 	sbc.w	r1, r1, r1, lsl #1
 8000786:	bd08      	pop	{r3, pc}

08000788 <__aeabi_d2ulz>:
 8000788:	ed9f 6b0b 	vldr	d6, [pc, #44]	@ 80007b8 <__aeabi_d2ulz+0x30>
 800078c:	ec41 0b17 	vmov	d7, r0, r1
 8000790:	ed9f 5b0b 	vldr	d5, [pc, #44]	@ 80007c0 <__aeabi_d2ulz+0x38>
 8000794:	ee27 6b06 	vmul.f64	d6, d7, d6
 8000798:	eebc 6bc6 	vcvt.u32.f64	s12, d6
 800079c:	eeb8 4b46 	vcvt.f64.u32	d4, s12
 80007a0:	eea4 7b45 	vfms.f64	d7, d4, d5
 80007a4:	eefc 7bc7 	vcvt.u32.f64	s15, d7
 80007a8:	ee16 1a10 	vmov	r1, s12
 80007ac:	ee17 0a90 	vmov	r0, s15
 80007b0:	4770      	bx	lr
 80007b2:	bf00      	nop
 80007b4:	f3af 8000 	nop.w
 80007b8:	00000000 	.word	0x00000000
 80007bc:	3df00000 	.word	0x3df00000
 80007c0:	00000000 	.word	0x00000000
 80007c4:	41f00000 	.word	0x41f00000

080007c8 <__udivmoddi4>:
 80007c8:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
 80007cc:	9d08      	ldr	r5, [sp, #32]
 80007ce:	460c      	mov	r4, r1
 80007d0:	2b00      	cmp	r3, #0
 80007d2:	d14e      	bne.n	8000872 <__udivmoddi4+0xaa>
 80007d4:	4694      	mov	ip, r2
 80007d6:	458c      	cmp	ip, r1
 80007d8:	4686      	mov	lr, r0
 80007da:	fab2 f282 	clz	r2, r2
 80007de:	d962      	bls.n	80008a6 <__udivmoddi4+0xde>
 80007e0:	b14a      	cbz	r2, 80007f6 <__udivmoddi4+0x2e>
 80007e2:	f1c2 0320 	rsb	r3, r2, #32
 80007e6:	4091      	lsls	r1, r2
 80007e8:	fa20 f303 	lsr.w	r3, r0, r3
 80007ec:	fa0c fc02 	lsl.w	ip, ip, r2
 80007f0:	4319      	orrs	r1, r3
 80007f2:	fa00 fe02 	lsl.w	lr, r0, r2
 80007f6:	ea4f 471c 	mov.w	r7, ip, lsr #16
 80007fa:	fa1f f68c 	uxth.w	r6, ip
 80007fe:	fbb1 f4f7 	udiv	r4, r1, r7
 8000802:	ea4f 431e 	mov.w	r3, lr, lsr #16
 8000806:	fb07 1114 	mls	r1, r7, r4, r1
 800080a:	ea43 4301 	orr.w	r3, r3, r1, lsl #16
 800080e:	fb04 f106 	mul.w	r1, r4, r6
 8000812:	4299      	cmp	r1, r3
 8000814:	d90a      	bls.n	800082c <__udivmoddi4+0x64>
 8000816:	eb1c 0303 	adds.w	r3, ip, r3
 800081a:	f104 30ff 	add.w	r0, r4, #4294967295	@ 0xffffffff
 800081e:	f080 8112 	bcs.w	8000a46 <__udivmoddi4+0x27e>
 8000822:	4299      	cmp	r1, r3
 8000824:	f240 810f 	bls.w	8000a46 <__udivmoddi4+0x27e>
 8000828:	3c02      	subs	r4, #2
 800082a:	4463      	add	r3, ip
 800082c:	1a59      	subs	r1, r3, r1
 800082e:	fa1f f38e 	uxth.w	r3, lr
 8000832:	fbb1 f0f7 	udiv	r0, r1, r7
 8000836:	fb07 1110 	mls	r1, r7, r0, r1
 800083a:	ea43 4301 	orr.w	r3, r3, r1, lsl #16
 800083e:	fb00 f606 	mul.w	r6, r0, r6
 8000842:	429e      	cmp	r6, r3
 8000844:	d90a      	bls.n	800085c <__udivmoddi4+0x94>
 8000846:	eb1c 0303 	adds.w	r3, ip, r3
 800084a:	f100 31ff 	add.w	r1, r0, #4294967295	@ 0xffffffff
 800084e:	f080 80fc 	bcs.w	8000a4a <__udivmoddi4+0x282>
 8000852:	429e      	cmp	r6, r3
 8000854:	f240 80f9 	bls.w	8000a4a <__udivmoddi4+0x282>
 8000858:	4463      	add	r3, ip
 800085a:	3802      	subs	r0, #2
 800085c:	1b9b      	subs	r3, r3, r6
 800085e:	ea40 4004 	orr.w	r0, r0, r4, lsl #16
 8000862:	2100      	movs	r1, #0
 8000864:	b11d      	cbz	r5, 800086e <__udivmoddi4+0xa6>
 8000866:	40d3      	lsrs	r3, r2
 8000868:	2200      	movs	r2, #0
 800086a:	e9c5 3200 	strd	r3, r2, [r5]
 800086e:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 8000872:	428b      	cmp	r3, r1
 8000874:	d905      	bls.n	8000882 <__udivmoddi4+0xba>
 8000876:	b10d      	cbz	r5, 800087c <__udivmoddi4+0xb4>
 8000878:	e9c5 0100 	strd	r0, r1, [r5]
 800087c:	2100      	movs	r1, #0
 800087e:	4608      	mov	r0, r1
 8000880:	e7f5      	b.n	800086e <__udivmoddi4+0xa6>
 8000882:	fab3 f183 	clz	r1, r3
 8000886:	2900      	cmp	r1, #0
 8000888:	d146      	bne.n	8000918 <__udivmoddi4+0x150>
 800088a:	42a3      	cmp	r3, r4
 800088c:	d302      	bcc.n	8000894 <__udivmoddi4+0xcc>
 800088e:	4290      	cmp	r0, r2
 8000890:	f0c0 80f0 	bcc.w	8000a74 <__udivmoddi4+0x2ac>
 8000894:	1a86      	subs	r6, r0, r2
 8000896:	eb64 0303 	sbc.w	r3, r4, r3
 800089a:	2001      	movs	r0, #1
 800089c:	2d00      	cmp	r5, #0
 800089e:	d0e6      	beq.n	800086e <__udivmoddi4+0xa6>
 80008a0:	e9c5 6300 	strd	r6, r3, [r5]
 80008a4:	e7e3      	b.n	800086e <__udivmoddi4+0xa6>
 80008a6:	2a00      	cmp	r2, #0
 80008a8:	f040 8090 	bne.w	80009cc <__udivmoddi4+0x204>
 80008ac:	eba1 040c 	sub.w	r4, r1, ip
 80008b0:	ea4f 481c 	mov.w	r8, ip, lsr #16
 80008b4:	fa1f f78c 	uxth.w	r7, ip
 80008b8:	2101      	movs	r1, #1
 80008ba:	fbb4 f6f8 	udiv	r6, r4, r8
 80008be:	ea4f 431e 	mov.w	r3, lr, lsr #16
 80008c2:	fb08 4416 	mls	r4, r8, r6, r4
 80008c6:	ea43 4304 	orr.w	r3, r3, r4, lsl #16
 80008ca:	fb07 f006 	mul.w	r0, r7, r6
 80008ce:	4298      	cmp	r0, r3
 80008d0:	d908      	bls.n	80008e4 <__udivmoddi4+0x11c>
 80008d2:	eb1c 0303 	adds.w	r3, ip, r3
 80008d6:	f106 34ff 	add.w	r4, r6, #4294967295	@ 0xffffffff
 80008da:	d202      	bcs.n	80008e2 <__udivmoddi4+0x11a>
 80008dc:	4298      	cmp	r0, r3
 80008de:	f200 80cd 	bhi.w	8000a7c <__udivmoddi4+0x2b4>
 80008e2:	4626      	mov	r6, r4
 80008e4:	1a1c      	subs	r4, r3, r0
 80008e6:	fa1f f38e 	uxth.w	r3, lr
 80008ea:	fbb4 f0f8 	udiv	r0, r4, r8
 80008ee:	fb08 4410 	mls	r4, r8, r0, r4
 80008f2:	ea43 4304 	orr.w	r3, r3, r4, lsl #16
 80008f6:	fb00 f707 	mul.w	r7, r0, r7
 80008fa:	429f      	cmp	r7, r3
 80008fc:	d908      	bls.n	8000910 <__udivmoddi4+0x148>
 80008fe:	eb1c 0303 	adds.w	r3, ip, r3
 8000902:	f100 34ff 	add.w	r4, r0, #4294967295	@ 0xffffffff
 8000906:	d202      	bcs.n	800090e <__udivmoddi4+0x146>
 8000908:	429f      	cmp	r7, r3
 800090a:	f200 80b0 	bhi.w	8000a6e <__udivmoddi4+0x2a6>
 800090e:	4620      	mov	r0, r4
 8000910:	1bdb      	subs	r3, r3, r7
 8000912:	ea40 4006 	orr.w	r0, r0, r6, lsl #16
 8000916:	e7a5      	b.n	8000864 <__udivmoddi4+0x9c>
 8000918:	f1c1 0620 	rsb	r6, r1, #32
 800091c:	408b      	lsls	r3, r1
 800091e:	fa22 f706 	lsr.w	r7, r2, r6
 8000922:	431f      	orrs	r7, r3
 8000924:	fa20 fc06 	lsr.w	ip, r0, r6
 8000928:	fa04 f301 	lsl.w	r3, r4, r1
 800092c:	ea43 030c 	orr.w	r3, r3, ip
 8000930:	40f4      	lsrs	r4, r6
 8000932:	fa00 f801 	lsl.w	r8, r0, r1
 8000936:	0c38      	lsrs	r0, r7, #16
 8000938:	ea4f 4913 	mov.w	r9, r3, lsr #16
 800093c:	fbb4 fef0 	udiv	lr, r4, r0
 8000940:	fa1f fc87 	uxth.w	ip, r7
 8000944:	fb00 441e 	mls	r4, r0, lr, r4
 8000948:	ea49 4404 	orr.w	r4, r9, r4, lsl #16
 800094c:	fb0e f90c 	mul.w	r9, lr, ip
 8000950:	45a1      	cmp	r9, r4
 8000952:	fa02 f201 	lsl.w	r2, r2, r1
 8000956:	d90a      	bls.n	800096e <__udivmoddi4+0x1a6>
 8000958:	193c      	adds	r4, r7, r4
 800095a:	f10e 3aff 	add.w	sl, lr, #4294967295	@ 0xffffffff
 800095e:	f080 8084 	bcs.w	8000a6a <__udivmoddi4+0x2a2>
 8000962:	45a1      	cmp	r9, r4
 8000964:	f240 8081 	bls.w	8000a6a <__udivmoddi4+0x2a2>
 8000968:	f1ae 0e02 	sub.w	lr, lr, #2
 800096c:	443c      	add	r4, r7
 800096e:	eba4 0409 	sub.w	r4, r4, r9
 8000972:	fa1f f983 	uxth.w	r9, r3
 8000976:	fbb4 f3f0 	udiv	r3, r4, r0
 800097a:	fb00 4413 	mls	r4, r0, r3, r4
 800097e:	ea49 4404 	orr.w	r4, r9, r4, lsl #16
 8000982:	fb03 fc0c 	mul.w	ip, r3, ip
 8000986:	45a4      	cmp	ip, r4
 8000988:	d907      	bls.n	800099a <__udivmoddi4+0x1d2>
 800098a:	193c      	adds	r4, r7, r4
 800098c:	f103 30ff 	add.w	r0, r3, #4294967295	@ 0xffffffff
 8000990:	d267      	bcs.n	8000a62 <__udivmoddi4+0x29a>
 8000992:	45a4      	cmp	ip, r4
 8000994:	d965      	bls.n	8000a62 <__udivmoddi4+0x29a>
 8000996:	3b02      	subs	r3, #2
 8000998:	443c      	add	r4, r7
 800099a:	ea43 400e 	orr.w	r0, r3, lr, lsl #16
 800099e:	fba0 9302 	umull	r9, r3, r0, r2
 80009a2:	eba4 040c 	sub.w	r4, r4, ip
 80009a6:	429c      	cmp	r4, r3
 80009a8:	46ce      	mov	lr, r9
 80009aa:	469c      	mov	ip, r3
 80009ac:	d351      	bcc.n	8000a52 <__udivmoddi4+0x28a>
 80009ae:	d04e      	beq.n	8000a4e <__udivmoddi4+0x286>
 80009b0:	b155      	cbz	r5, 80009c8 <__udivmoddi4+0x200>
 80009b2:	ebb8 030e 	subs.w	r3, r8, lr
 80009b6:	eb64 040c 	sbc.w	r4, r4, ip
 80009ba:	fa04 f606 	lsl.w	r6, r4, r6
 80009be:	40cb      	lsrs	r3, r1
 80009c0:	431e      	orrs	r6, r3
 80009c2:	40cc      	lsrs	r4, r1
 80009c4:	e9c5 6400 	strd	r6, r4, [r5]
 80009c8:	2100      	movs	r1, #0
 80009ca:	e750      	b.n	800086e <__udivmoddi4+0xa6>
 80009cc:	f1c2 0320 	rsb	r3, r2, #32
 80009d0:	fa20 f103 	lsr.w	r1, r0, r3
 80009d4:	fa0c fc02 	lsl.w	ip, ip, r2
 80009d8:	fa24 f303 	lsr.w	r3, r4, r3
 80009dc:	4094      	lsls	r4, r2
 80009de:	430c      	orrs	r4, r1
 80009e0:	ea4f 481c 	mov.w	r8, ip, lsr #16
 80009e4:	fa00 fe02 	lsl.w	lr, r0, r2
 80009e8:	fa1f f78c 	uxth.w	r7, ip
 80009ec:	fbb3 f0f8 	udiv	r0, r3, r8
 80009f0:	fb08 3110 	mls	r1, r8, r0, r3
 80009f4:	0c23      	lsrs	r3, r4, #16
 80009f6:	ea43 4301 	orr.w	r3, r3, r1, lsl #16
 80009fa:	fb00 f107 	mul.w	r1, r0, r7
 80009fe:	4299      	cmp	r1, r3
 8000a00:	d908      	bls.n	8000a14 <__udivmoddi4+0x24c>
 8000a02:	eb1c 0303 	adds.w	r3, ip, r3
 8000a06:	f100 36ff 	add.w	r6, r0, #4294967295	@ 0xffffffff
 8000a0a:	d22c      	bcs.n	8000a66 <__udivmoddi4+0x29e>
 8000a0c:	4299      	cmp	r1, r3
 8000a0e:	d92a      	bls.n	8000a66 <__udivmoddi4+0x29e>
 8000a10:	3802      	subs	r0, #2
 8000a12:	4463      	add	r3, ip
 8000a14:	1a5b      	subs	r3, r3, r1
 8000a16:	b2a4      	uxth	r4, r4
 8000a18:	fbb3 f1f8 	udiv	r1, r3, r8
 8000a1c:	fb08 3311 	mls	r3, r8, r1, r3
 8000a20:	ea44 4403 	orr.w	r4, r4, r3, lsl #16
 8000a24:	fb01 f307 	mul.w	r3, r1, r7
 8000a28:	42a3      	cmp	r3, r4
 8000a2a:	d908      	bls.n	8000a3e <__udivmoddi4+0x276>
 8000a2c:	eb1c 0404 	adds.w	r4, ip, r4
 8000a30:	f101 36ff 	add.w	r6, r1, #4294967295	@ 0xffffffff
 8000a34:	d213      	bcs.n	8000a5e <__udivmoddi4+0x296>
 8000a36:	42a3      	cmp	r3, r4
 8000a38:	d911      	bls.n	8000a5e <__udivmoddi4+0x296>
 8000a3a:	3902      	subs	r1, #2
 8000a3c:	4464      	add	r4, ip
 8000a3e:	1ae4      	subs	r4, r4, r3
 8000a40:	ea41 4100 	orr.w	r1, r1, r0, lsl #16
 8000a44:	e739      	b.n	80008ba <__udivmoddi4+0xf2>
 8000a46:	4604      	mov	r4, r0
 8000a48:	e6f0      	b.n	800082c <__udivmoddi4+0x64>
 8000a4a:	4608      	mov	r0, r1
 8000a4c:	e706      	b.n	800085c <__udivmoddi4+0x94>
 8000a4e:	45c8      	cmp	r8, r9
 8000a50:	d2ae      	bcs.n	80009b0 <__udivmoddi4+0x1e8>
 8000a52:	ebb9 0e02 	subs.w	lr, r9, r2
 8000a56:	eb63 0c07 	sbc.w	ip, r3, r7
 8000a5a:	3801      	subs	r0, #1
 8000a5c:	e7a8      	b.n	80009b0 <__udivmoddi4+0x1e8>
 8000a5e:	4631      	mov	r1, r6
 8000a60:	e7ed      	b.n	8000a3e <__udivmoddi4+0x276>
 8000a62:	4603      	mov	r3, r0
 8000a64:	e799      	b.n	800099a <__udivmoddi4+0x1d2>
 8000a66:	4630      	mov	r0, r6
 8000a68:	e7d4      	b.n	8000a14 <__udivmoddi4+0x24c>
 8000a6a:	46d6      	mov	lr, sl
 8000a6c:	e77f      	b.n	800096e <__udivmoddi4+0x1a6>
 8000a6e:	4463      	add	r3, ip
 8000a70:	3802      	subs	r0, #2
 8000a72:	e74d      	b.n	8000910 <__udivmoddi4+0x148>
 8000a74:	4606      	mov	r6, r0
 8000a76:	4623      	mov	r3, r4
 8000a78:	4608      	mov	r0, r1
 8000a7a:	e70f      	b.n	800089c <__udivmoddi4+0xd4>
 8000a7c:	3e02      	subs	r6, #2
 8000a7e:	4463      	add	r3, ip
 8000a80:	e730      	b.n	80008e4 <__udivmoddi4+0x11c>
 8000a82:	bf00      	nop

08000a84 <__aeabi_idiv0>:
 8000a84:	4770      	bx	lr
 8000a86:	bf00      	nop

08000a88 <case_insensitive_strcmp>:
    return version;
}

/* Case insensitive string comparison, doesn't consider two NULL pointers equal though */
static int case_insensitive_strcmp(const unsigned char *string1, const unsigned char *string2)
{
 8000a88:	b480      	push	{r7}
 8000a8a:	b085      	sub	sp, #20
 8000a8c:	af00      	add	r7, sp, #0
 8000a8e:	6078      	str	r0, [r7, #4]
 8000a90:	6039      	str	r1, [r7, #0]
    if ((string1 == NULL) || (string2 == NULL))
 8000a92:	687b      	ldr	r3, [r7, #4]
 8000a94:	2b00      	cmp	r3, #0
 8000a96:	d002      	beq.n	8000a9e <case_insensitive_strcmp+0x16>
 8000a98:	683b      	ldr	r3, [r7, #0]
 8000a9a:	2b00      	cmp	r3, #0
 8000a9c:	d101      	bne.n	8000aa2 <case_insensitive_strcmp+0x1a>
    {
        return 1;
 8000a9e:	2301      	movs	r3, #1
 8000aa0:	e056      	b.n	8000b50 <case_insensitive_strcmp+0xc8>
    }

    if (string1 == string2)
 8000aa2:	687a      	ldr	r2, [r7, #4]
 8000aa4:	683b      	ldr	r3, [r7, #0]
 8000aa6:	429a      	cmp	r2, r3
 8000aa8:	d10d      	bne.n	8000ac6 <case_insensitive_strcmp+0x3e>
    {
        return 0;
 8000aaa:	2300      	movs	r3, #0
 8000aac:	e050      	b.n	8000b50 <case_insensitive_strcmp+0xc8>
    }

    for(; tolower(*string1) == tolower(*string2); (void)string1++, string2++)
    {
        if (*string1 == '\0')
 8000aae:	687b      	ldr	r3, [r7, #4]
 8000ab0:	781b      	ldrb	r3, [r3, #0]
 8000ab2:	2b00      	cmp	r3, #0
 8000ab4:	d101      	bne.n	8000aba <case_insensitive_strcmp+0x32>
        {
            return 0;
 8000ab6:	2300      	movs	r3, #0
 8000ab8:	e04a      	b.n	8000b50 <case_insensitive_strcmp+0xc8>
    for(; tolower(*string1) == tolower(*string2); (void)string1++, string2++)
 8000aba:	687b      	ldr	r3, [r7, #4]
 8000abc:	3301      	adds	r3, #1
 8000abe:	607b      	str	r3, [r7, #4]
 8000ac0:	683b      	ldr	r3, [r7, #0]
 8000ac2:	3301      	adds	r3, #1
 8000ac4:	603b      	str	r3, [r7, #0]
 8000ac6:	687b      	ldr	r3, [r7, #4]
 8000ac8:	781b      	ldrb	r3, [r3, #0]
 8000aca:	73fb      	strb	r3, [r7, #15]
 8000acc:	7bfb      	ldrb	r3, [r7, #15]
 8000ace:	3301      	adds	r3, #1
 8000ad0:	4a22      	ldr	r2, [pc, #136]	@ (8000b5c <case_insensitive_strcmp+0xd4>)
 8000ad2:	4413      	add	r3, r2
 8000ad4:	781b      	ldrb	r3, [r3, #0]
 8000ad6:	f003 0303 	and.w	r3, r3, #3
 8000ada:	2b01      	cmp	r3, #1
 8000adc:	d103      	bne.n	8000ae6 <case_insensitive_strcmp+0x5e>
 8000ade:	7bfb      	ldrb	r3, [r7, #15]
 8000ae0:	f103 0220 	add.w	r2, r3, #32
 8000ae4:	e000      	b.n	8000ae8 <case_insensitive_strcmp+0x60>
 8000ae6:	7bfa      	ldrb	r2, [r7, #15]
 8000ae8:	683b      	ldr	r3, [r7, #0]
 8000aea:	781b      	ldrb	r3, [r3, #0]
 8000aec:	73bb      	strb	r3, [r7, #14]
 8000aee:	7bbb      	ldrb	r3, [r7, #14]
 8000af0:	3301      	adds	r3, #1
 8000af2:	491a      	ldr	r1, [pc, #104]	@ (8000b5c <case_insensitive_strcmp+0xd4>)
 8000af4:	440b      	add	r3, r1
 8000af6:	781b      	ldrb	r3, [r3, #0]
 8000af8:	f003 0303 	and.w	r3, r3, #3
 8000afc:	2b01      	cmp	r3, #1
 8000afe:	d102      	bne.n	8000b06 <case_insensitive_strcmp+0x7e>
 8000b00:	7bbb      	ldrb	r3, [r7, #14]
 8000b02:	3320      	adds	r3, #32
 8000b04:	e000      	b.n	8000b08 <case_insensitive_strcmp+0x80>
 8000b06:	7bbb      	ldrb	r3, [r7, #14]
 8000b08:	429a      	cmp	r2, r3
 8000b0a:	d0d0      	beq.n	8000aae <case_insensitive_strcmp+0x26>
        }
    }

    return tolower(*string1) - tolower(*string2);
 8000b0c:	687b      	ldr	r3, [r7, #4]
 8000b0e:	781b      	ldrb	r3, [r3, #0]
 8000b10:	737b      	strb	r3, [r7, #13]
 8000b12:	7b7b      	ldrb	r3, [r7, #13]
 8000b14:	3301      	adds	r3, #1
 8000b16:	4a11      	ldr	r2, [pc, #68]	@ (8000b5c <case_insensitive_strcmp+0xd4>)
 8000b18:	4413      	add	r3, r2
 8000b1a:	781b      	ldrb	r3, [r3, #0]
 8000b1c:	f003 0303 	and.w	r3, r3, #3
 8000b20:	2b01      	cmp	r3, #1
 8000b22:	d103      	bne.n	8000b2c <case_insensitive_strcmp+0xa4>
 8000b24:	7b7b      	ldrb	r3, [r7, #13]
 8000b26:	f103 0220 	add.w	r2, r3, #32
 8000b2a:	e000      	b.n	8000b2e <case_insensitive_strcmp+0xa6>
 8000b2c:	7b7a      	ldrb	r2, [r7, #13]
 8000b2e:	683b      	ldr	r3, [r7, #0]
 8000b30:	781b      	ldrb	r3, [r3, #0]
 8000b32:	733b      	strb	r3, [r7, #12]
 8000b34:	7b3b      	ldrb	r3, [r7, #12]
 8000b36:	3301      	adds	r3, #1
 8000b38:	4908      	ldr	r1, [pc, #32]	@ (8000b5c <case_insensitive_strcmp+0xd4>)
 8000b3a:	440b      	add	r3, r1
 8000b3c:	781b      	ldrb	r3, [r3, #0]
 8000b3e:	f003 0303 	and.w	r3, r3, #3
 8000b42:	2b01      	cmp	r3, #1
 8000b44:	d102      	bne.n	8000b4c <case_insensitive_strcmp+0xc4>
 8000b46:	7b3b      	ldrb	r3, [r7, #12]
 8000b48:	3320      	adds	r3, #32
 8000b4a:	e000      	b.n	8000b4e <case_insensitive_strcmp+0xc6>
 8000b4c:	7b3b      	ldrb	r3, [r7, #12]
 8000b4e:	1ad3      	subs	r3, r2, r3
}
 8000b50:	4618      	mov	r0, r3
 8000b52:	3714      	adds	r7, #20
 8000b54:	46bd      	mov	sp, r7
 8000b56:	f85d 7b04 	ldr.w	r7, [sp], #4
 8000b5a:	4770      	bx	lr
 8000b5c:	080315d0 	.word	0x080315d0

08000b60 <cJSON_New_Item>:
    }
}

/* Internal constructor. */
static cJSON *cJSON_New_Item(const internal_hooks * const hooks)
{
 8000b60:	b580      	push	{r7, lr}
 8000b62:	b084      	sub	sp, #16
 8000b64:	af00      	add	r7, sp, #0
 8000b66:	6078      	str	r0, [r7, #4]
    cJSON* node = (cJSON*)hooks->allocate(sizeof(cJSON));
 8000b68:	687b      	ldr	r3, [r7, #4]
 8000b6a:	681b      	ldr	r3, [r3, #0]
 8000b6c:	2028      	movs	r0, #40	@ 0x28
 8000b6e:	4798      	blx	r3
 8000b70:	60f8      	str	r0, [r7, #12]
    if (node)
 8000b72:	68fb      	ldr	r3, [r7, #12]
 8000b74:	2b00      	cmp	r3, #0
 8000b76:	d004      	beq.n	8000b82 <cJSON_New_Item+0x22>
    {
        memset(node, '\0', sizeof(cJSON));
 8000b78:	2228      	movs	r2, #40	@ 0x28
 8000b7a:	2100      	movs	r1, #0
 8000b7c:	68f8      	ldr	r0, [r7, #12]
 8000b7e:	f029 fcaf 	bl	802a4e0 <memset>
    }

    return node;
 8000b82:	68fb      	ldr	r3, [r7, #12]
}
 8000b84:	4618      	mov	r0, r3
 8000b86:	3710      	adds	r7, #16
 8000b88:	46bd      	mov	sp, r7
 8000b8a:	bd80      	pop	{r7, pc}

08000b8c <cJSON_Delete>:

/* Delete a cJSON structure. */
CJSON_PUBLIC(void) cJSON_Delete(cJSON *item)
{
 8000b8c:	b580      	push	{r7, lr}
 8000b8e:	b084      	sub	sp, #16
 8000b90:	af00      	add	r7, sp, #0
 8000b92:	6078      	str	r0, [r7, #4]
    cJSON *next = NULL;
 8000b94:	2300      	movs	r3, #0
 8000b96:	60fb      	str	r3, [r7, #12]
    while (item != NULL)
 8000b98:	e03d      	b.n	8000c16 <cJSON_Delete+0x8a>
    {
        next = item->next;
 8000b9a:	687b      	ldr	r3, [r7, #4]
 8000b9c:	681b      	ldr	r3, [r3, #0]
 8000b9e:	60fb      	str	r3, [r7, #12]
        if (!(item->type & cJSON_IsReference) && (item->child != NULL))
 8000ba0:	687b      	ldr	r3, [r7, #4]
 8000ba2:	68db      	ldr	r3, [r3, #12]
 8000ba4:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 8000ba8:	2b00      	cmp	r3, #0
 8000baa:	d108      	bne.n	8000bbe <cJSON_Delete+0x32>
 8000bac:	687b      	ldr	r3, [r7, #4]
 8000bae:	689b      	ldr	r3, [r3, #8]
 8000bb0:	2b00      	cmp	r3, #0
 8000bb2:	d004      	beq.n	8000bbe <cJSON_Delete+0x32>
        {
            cJSON_Delete(item->child);
 8000bb4:	687b      	ldr	r3, [r7, #4]
 8000bb6:	689b      	ldr	r3, [r3, #8]
 8000bb8:	4618      	mov	r0, r3
 8000bba:	f7ff ffe7 	bl	8000b8c <cJSON_Delete>
        }
        if (!(item->type & cJSON_IsReference) && (item->valuestring != NULL))
 8000bbe:	687b      	ldr	r3, [r7, #4]
 8000bc0:	68db      	ldr	r3, [r3, #12]
 8000bc2:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 8000bc6:	2b00      	cmp	r3, #0
 8000bc8:	d10c      	bne.n	8000be4 <cJSON_Delete+0x58>
 8000bca:	687b      	ldr	r3, [r7, #4]
 8000bcc:	691b      	ldr	r3, [r3, #16]
 8000bce:	2b00      	cmp	r3, #0
 8000bd0:	d008      	beq.n	8000be4 <cJSON_Delete+0x58>
        {
            global_hooks.deallocate(item->valuestring);
 8000bd2:	4b15      	ldr	r3, [pc, #84]	@ (8000c28 <cJSON_Delete+0x9c>)
 8000bd4:	685b      	ldr	r3, [r3, #4]
 8000bd6:	687a      	ldr	r2, [r7, #4]
 8000bd8:	6912      	ldr	r2, [r2, #16]
 8000bda:	4610      	mov	r0, r2
 8000bdc:	4798      	blx	r3
            item->valuestring = NULL;
 8000bde:	687b      	ldr	r3, [r7, #4]
 8000be0:	2200      	movs	r2, #0
 8000be2:	611a      	str	r2, [r3, #16]
        }
        if (!(item->type & cJSON_StringIsConst) && (item->string != NULL))
 8000be4:	687b      	ldr	r3, [r7, #4]
 8000be6:	68db      	ldr	r3, [r3, #12]
 8000be8:	f403 7300 	and.w	r3, r3, #512	@ 0x200
 8000bec:	2b00      	cmp	r3, #0
 8000bee:	d10c      	bne.n	8000c0a <cJSON_Delete+0x7e>
 8000bf0:	687b      	ldr	r3, [r7, #4]
 8000bf2:	6a1b      	ldr	r3, [r3, #32]
 8000bf4:	2b00      	cmp	r3, #0
 8000bf6:	d008      	beq.n	8000c0a <cJSON_Delete+0x7e>
        {
            global_hooks.deallocate(item->string);
 8000bf8:	4b0b      	ldr	r3, [pc, #44]	@ (8000c28 <cJSON_Delete+0x9c>)
 8000bfa:	685b      	ldr	r3, [r3, #4]
 8000bfc:	687a      	ldr	r2, [r7, #4]
 8000bfe:	6a12      	ldr	r2, [r2, #32]
 8000c00:	4610      	mov	r0, r2
 8000c02:	4798      	blx	r3
            item->string = NULL;
 8000c04:	687b      	ldr	r3, [r7, #4]
 8000c06:	2200      	movs	r2, #0
 8000c08:	621a      	str	r2, [r3, #32]
        }
        global_hooks.deallocate(item);
 8000c0a:	4b07      	ldr	r3, [pc, #28]	@ (8000c28 <cJSON_Delete+0x9c>)
 8000c0c:	685b      	ldr	r3, [r3, #4]
 8000c0e:	6878      	ldr	r0, [r7, #4]
 8000c10:	4798      	blx	r3
        item = next;
 8000c12:	68fb      	ldr	r3, [r7, #12]
 8000c14:	607b      	str	r3, [r7, #4]
    while (item != NULL)
 8000c16:	687b      	ldr	r3, [r7, #4]
 8000c18:	2b00      	cmp	r3, #0
 8000c1a:	d1be      	bne.n	8000b9a <cJSON_Delete+0xe>
    }
}
 8000c1c:	bf00      	nop
 8000c1e:	bf00      	nop
 8000c20:	3710      	adds	r7, #16
 8000c22:	46bd      	mov	sp, r7
 8000c24:	bd80      	pop	{r7, pc}
 8000c26:	bf00      	nop
 8000c28:	24000000 	.word	0x24000000

08000c2c <get_decimal_point>:

/* get the decimal point character of the current locale */
static unsigned char get_decimal_point(void)
{
 8000c2c:	b480      	push	{r7}
 8000c2e:	af00      	add	r7, sp, #0
#ifdef ENABLE_LOCALES
    struct lconv *lconv = localeconv();
    return (unsigned char) lconv->decimal_point[0];
#else
    return '.';
 8000c30:	232e      	movs	r3, #46	@ 0x2e
#endif
}
 8000c32:	4618      	mov	r0, r3
 8000c34:	46bd      	mov	sp, r7
 8000c36:	f85d 7b04 	ldr.w	r7, [sp], #4
 8000c3a:	4770      	bx	lr
 8000c3c:	0000      	movs	r0, r0
	...

08000c40 <parse_number>:
/* get a pointer to the buffer at the position */
#define buffer_at_offset(buffer) ((buffer)->content + (buffer)->offset)

/* Parse the input text to generate a number, and populate the result into item. */
static cJSON_bool parse_number(cJSON * const item, parse_buffer * const input_buffer)
{
 8000c40:	b580      	push	{r7, lr}
 8000c42:	b098      	sub	sp, #96	@ 0x60
 8000c44:	af00      	add	r7, sp, #0
 8000c46:	6078      	str	r0, [r7, #4]
 8000c48:	6039      	str	r1, [r7, #0]
    double number = 0;
 8000c4a:	f04f 0200 	mov.w	r2, #0
 8000c4e:	f04f 0300 	mov.w	r3, #0
 8000c52:	e9c7 2314 	strd	r2, r3, [r7, #80]	@ 0x50
    unsigned char *after_end = NULL;
 8000c56:	2300      	movs	r3, #0
 8000c58:	64bb      	str	r3, [r7, #72]	@ 0x48
    unsigned char number_c_string[64];
    unsigned char decimal_point = get_decimal_point();
 8000c5a:	f7ff ffe7 	bl	8000c2c <get_decimal_point>
 8000c5e:	4603      	mov	r3, r0
 8000c60:	f887 304f 	strb.w	r3, [r7, #79]	@ 0x4f
    size_t i = 0;
 8000c64:	2300      	movs	r3, #0
 8000c66:	65fb      	str	r3, [r7, #92]	@ 0x5c

    if ((input_buffer == NULL) || (input_buffer->content == NULL))
 8000c68:	683b      	ldr	r3, [r7, #0]
 8000c6a:	2b00      	cmp	r3, #0
 8000c6c:	d003      	beq.n	8000c76 <parse_number+0x36>
 8000c6e:	683b      	ldr	r3, [r7, #0]
 8000c70:	681b      	ldr	r3, [r3, #0]
 8000c72:	2b00      	cmp	r3, #0
 8000c74:	d101      	bne.n	8000c7a <parse_number+0x3a>
    {
        return false;
 8000c76:	2300      	movs	r3, #0
 8000c78:	e09f      	b.n	8000dba <parse_number+0x17a>
    }

    /* copy the number into a temporary buffer and replace '.' with the decimal point
     * of the current locale (for strtod)
     * This also takes care of '\0' not necessarily being available for marking the end of the input */
    for (i = 0; (i < (sizeof(number_c_string) - 1)) && can_access_at_index(input_buffer, i); i++)
 8000c7a:	2300      	movs	r3, #0
 8000c7c:	65fb      	str	r3, [r7, #92]	@ 0x5c
 8000c7e:	e03d      	b.n	8000cfc <parse_number+0xbc>
    {
        switch (buffer_at_offset(input_buffer)[i])
 8000c80:	683b      	ldr	r3, [r7, #0]
 8000c82:	681a      	ldr	r2, [r3, #0]
 8000c84:	683b      	ldr	r3, [r7, #0]
 8000c86:	6899      	ldr	r1, [r3, #8]
 8000c88:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 8000c8a:	440b      	add	r3, r1
 8000c8c:	4413      	add	r3, r2
 8000c8e:	781b      	ldrb	r3, [r3, #0]
 8000c90:	2b45      	cmp	r3, #69	@ 0x45
 8000c92:	dc17      	bgt.n	8000cc4 <parse_number+0x84>
 8000c94:	2b2b      	cmp	r3, #43	@ 0x2b
 8000c96:	db40      	blt.n	8000d1a <parse_number+0xda>
 8000c98:	3b2b      	subs	r3, #43	@ 0x2b
 8000c9a:	2201      	movs	r2, #1
 8000c9c:	409a      	lsls	r2, r3
 8000c9e:	4b4e      	ldr	r3, [pc, #312]	@ (8000dd8 <parse_number+0x198>)
 8000ca0:	4013      	ands	r3, r2
 8000ca2:	2b00      	cmp	r3, #0
 8000ca4:	bf14      	ite	ne
 8000ca6:	2301      	movne	r3, #1
 8000ca8:	2300      	moveq	r3, #0
 8000caa:	b2db      	uxtb	r3, r3
 8000cac:	2b00      	cmp	r3, #0
 8000cae:	d10b      	bne.n	8000cc8 <parse_number+0x88>
 8000cb0:	f002 0308 	and.w	r3, r2, #8
 8000cb4:	2b00      	cmp	r3, #0
 8000cb6:	bf14      	ite	ne
 8000cb8:	2301      	movne	r3, #1
 8000cba:	2300      	moveq	r3, #0
 8000cbc:	b2db      	uxtb	r3, r3
 8000cbe:	2b00      	cmp	r3, #0
 8000cc0:	d111      	bne.n	8000ce6 <parse_number+0xa6>
            case '.':
                number_c_string[i] = decimal_point;
                break;

            default:
                goto loop_end;
 8000cc2:	e02a      	b.n	8000d1a <parse_number+0xda>
        switch (buffer_at_offset(input_buffer)[i])
 8000cc4:	2b65      	cmp	r3, #101	@ 0x65
 8000cc6:	d128      	bne.n	8000d1a <parse_number+0xda>
                number_c_string[i] = buffer_at_offset(input_buffer)[i];
 8000cc8:	683b      	ldr	r3, [r7, #0]
 8000cca:	681a      	ldr	r2, [r3, #0]
 8000ccc:	683b      	ldr	r3, [r7, #0]
 8000cce:	6899      	ldr	r1, [r3, #8]
 8000cd0:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 8000cd2:	440b      	add	r3, r1
 8000cd4:	4413      	add	r3, r2
 8000cd6:	7819      	ldrb	r1, [r3, #0]
 8000cd8:	f107 0208 	add.w	r2, r7, #8
 8000cdc:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 8000cde:	4413      	add	r3, r2
 8000ce0:	460a      	mov	r2, r1
 8000ce2:	701a      	strb	r2, [r3, #0]
                break;
 8000ce4:	e007      	b.n	8000cf6 <parse_number+0xb6>
                number_c_string[i] = decimal_point;
 8000ce6:	f107 0208 	add.w	r2, r7, #8
 8000cea:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 8000cec:	4413      	add	r3, r2
 8000cee:	f897 204f 	ldrb.w	r2, [r7, #79]	@ 0x4f
 8000cf2:	701a      	strb	r2, [r3, #0]
                break;
 8000cf4:	bf00      	nop
    for (i = 0; (i < (sizeof(number_c_string) - 1)) && can_access_at_index(input_buffer, i); i++)
 8000cf6:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 8000cf8:	3301      	adds	r3, #1
 8000cfa:	65fb      	str	r3, [r7, #92]	@ 0x5c
 8000cfc:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 8000cfe:	2b3e      	cmp	r3, #62	@ 0x3e
 8000d00:	d80d      	bhi.n	8000d1e <parse_number+0xde>
 8000d02:	683b      	ldr	r3, [r7, #0]
 8000d04:	2b00      	cmp	r3, #0
 8000d06:	d00a      	beq.n	8000d1e <parse_number+0xde>
 8000d08:	683b      	ldr	r3, [r7, #0]
 8000d0a:	689a      	ldr	r2, [r3, #8]
 8000d0c:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 8000d0e:	441a      	add	r2, r3
 8000d10:	683b      	ldr	r3, [r7, #0]
 8000d12:	685b      	ldr	r3, [r3, #4]
 8000d14:	429a      	cmp	r2, r3
 8000d16:	d3b3      	bcc.n	8000c80 <parse_number+0x40>
        }
    }
loop_end:
 8000d18:	e001      	b.n	8000d1e <parse_number+0xde>
                goto loop_end;
 8000d1a:	bf00      	nop
 8000d1c:	e000      	b.n	8000d20 <parse_number+0xe0>
loop_end:
 8000d1e:	bf00      	nop
    number_c_string[i] = '\0';
 8000d20:	f107 0208 	add.w	r2, r7, #8
 8000d24:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 8000d26:	4413      	add	r3, r2
 8000d28:	2200      	movs	r2, #0
 8000d2a:	701a      	strb	r2, [r3, #0]

    number = strtod((const char*)number_c_string, (char**)&after_end);
 8000d2c:	f107 0248 	add.w	r2, r7, #72	@ 0x48
 8000d30:	f107 0308 	add.w	r3, r7, #8
 8000d34:	4611      	mov	r1, r2
 8000d36:	4618      	mov	r0, r3
 8000d38:	f028 fd3c 	bl	80297b4 <strtod>
 8000d3c:	ed87 0b14 	vstr	d0, [r7, #80]	@ 0x50
    if (number_c_string == after_end)
 8000d40:	6cba      	ldr	r2, [r7, #72]	@ 0x48
 8000d42:	f107 0308 	add.w	r3, r7, #8
 8000d46:	429a      	cmp	r2, r3
 8000d48:	d101      	bne.n	8000d4e <parse_number+0x10e>
    {
        return false; /* parse_error */
 8000d4a:	2300      	movs	r3, #0
 8000d4c:	e035      	b.n	8000dba <parse_number+0x17a>
    }

    item->valuedouble = number;
 8000d4e:	6879      	ldr	r1, [r7, #4]
 8000d50:	e9d7 2314 	ldrd	r2, r3, [r7, #80]	@ 0x50
 8000d54:	e9c1 2306 	strd	r2, r3, [r1, #24]

    /* use saturation in case of overflow */
    if (number >= INT_MAX)
 8000d58:	ed97 7b14 	vldr	d7, [r7, #80]	@ 0x50
 8000d5c:	ed9f 6b1a 	vldr	d6, [pc, #104]	@ 8000dc8 <parse_number+0x188>
 8000d60:	eeb4 7bc6 	vcmpe.f64	d7, d6
 8000d64:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 8000d68:	db04      	blt.n	8000d74 <parse_number+0x134>
    {
        item->valueint = INT_MAX;
 8000d6a:	687b      	ldr	r3, [r7, #4]
 8000d6c:	f06f 4200 	mvn.w	r2, #2147483648	@ 0x80000000
 8000d70:	615a      	str	r2, [r3, #20]
 8000d72:	e015      	b.n	8000da0 <parse_number+0x160>
    }
    else if (number <= (double)INT_MIN)
 8000d74:	ed97 7b14 	vldr	d7, [r7, #80]	@ 0x50
 8000d78:	ed9f 6b15 	vldr	d6, [pc, #84]	@ 8000dd0 <parse_number+0x190>
 8000d7c:	eeb4 7bc6 	vcmpe.f64	d7, d6
 8000d80:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 8000d84:	d804      	bhi.n	8000d90 <parse_number+0x150>
    {
        item->valueint = INT_MIN;
 8000d86:	687b      	ldr	r3, [r7, #4]
 8000d88:	f04f 4200 	mov.w	r2, #2147483648	@ 0x80000000
 8000d8c:	615a      	str	r2, [r3, #20]
 8000d8e:	e007      	b.n	8000da0 <parse_number+0x160>
    }
    else
    {
        item->valueint = (int)number;
 8000d90:	ed97 7b14 	vldr	d7, [r7, #80]	@ 0x50
 8000d94:	eefd 7bc7 	vcvt.s32.f64	s15, d7
 8000d98:	ee17 2a90 	vmov	r2, s15
 8000d9c:	687b      	ldr	r3, [r7, #4]
 8000d9e:	615a      	str	r2, [r3, #20]
    }

    item->type = cJSON_Number;
 8000da0:	687b      	ldr	r3, [r7, #4]
 8000da2:	2208      	movs	r2, #8
 8000da4:	60da      	str	r2, [r3, #12]

    input_buffer->offset += (size_t)(after_end - number_c_string);
 8000da6:	683b      	ldr	r3, [r7, #0]
 8000da8:	689b      	ldr	r3, [r3, #8]
 8000daa:	6cb9      	ldr	r1, [r7, #72]	@ 0x48
 8000dac:	f107 0208 	add.w	r2, r7, #8
 8000db0:	1a8a      	subs	r2, r1, r2
 8000db2:	441a      	add	r2, r3
 8000db4:	683b      	ldr	r3, [r7, #0]
 8000db6:	609a      	str	r2, [r3, #8]
    return true;
 8000db8:	2301      	movs	r3, #1
}
 8000dba:	4618      	mov	r0, r3
 8000dbc:	3760      	adds	r7, #96	@ 0x60
 8000dbe:	46bd      	mov	sp, r7
 8000dc0:	bd80      	pop	{r7, pc}
 8000dc2:	bf00      	nop
 8000dc4:	f3af 8000 	nop.w
 8000dc8:	ffc00000 	.word	0xffc00000
 8000dcc:	41dfffff 	.word	0x41dfffff
 8000dd0:	00000000 	.word	0x00000000
 8000dd4:	c1e00000 	.word	0xc1e00000
 8000dd8:	04007fe5 	.word	0x04007fe5

08000ddc <parse_hex4>:
    return true;
}

/* parse 4 digit hexadecimal number */
static unsigned parse_hex4(const unsigned char * const input)
{
 8000ddc:	b480      	push	{r7}
 8000dde:	b085      	sub	sp, #20
 8000de0:	af00      	add	r7, sp, #0
 8000de2:	6078      	str	r0, [r7, #4]
    unsigned int h = 0;
 8000de4:	2300      	movs	r3, #0
 8000de6:	60fb      	str	r3, [r7, #12]
    size_t i = 0;
 8000de8:	2300      	movs	r3, #0
 8000dea:	60bb      	str	r3, [r7, #8]

    for (i = 0; i < 4; i++)
 8000dec:	2300      	movs	r3, #0
 8000dee:	60bb      	str	r3, [r7, #8]
 8000df0:	e04c      	b.n	8000e8c <parse_hex4+0xb0>
    {
        /* parse digit */
        if ((input[i] >= '0') && (input[i] <= '9'))
 8000df2:	687a      	ldr	r2, [r7, #4]
 8000df4:	68bb      	ldr	r3, [r7, #8]
 8000df6:	4413      	add	r3, r2
 8000df8:	781b      	ldrb	r3, [r3, #0]
 8000dfa:	2b2f      	cmp	r3, #47	@ 0x2f
 8000dfc:	d90f      	bls.n	8000e1e <parse_hex4+0x42>
 8000dfe:	687a      	ldr	r2, [r7, #4]
 8000e00:	68bb      	ldr	r3, [r7, #8]
 8000e02:	4413      	add	r3, r2
 8000e04:	781b      	ldrb	r3, [r3, #0]
 8000e06:	2b39      	cmp	r3, #57	@ 0x39
 8000e08:	d809      	bhi.n	8000e1e <parse_hex4+0x42>
        {
            h += (unsigned int) input[i] - '0';
 8000e0a:	687a      	ldr	r2, [r7, #4]
 8000e0c:	68bb      	ldr	r3, [r7, #8]
 8000e0e:	4413      	add	r3, r2
 8000e10:	781b      	ldrb	r3, [r3, #0]
 8000e12:	461a      	mov	r2, r3
 8000e14:	68fb      	ldr	r3, [r7, #12]
 8000e16:	4413      	add	r3, r2
 8000e18:	3b30      	subs	r3, #48	@ 0x30
 8000e1a:	60fb      	str	r3, [r7, #12]
 8000e1c:	e02d      	b.n	8000e7a <parse_hex4+0x9e>
        }
        else if ((input[i] >= 'A') && (input[i] <= 'F'))
 8000e1e:	687a      	ldr	r2, [r7, #4]
 8000e20:	68bb      	ldr	r3, [r7, #8]
 8000e22:	4413      	add	r3, r2
 8000e24:	781b      	ldrb	r3, [r3, #0]
 8000e26:	2b40      	cmp	r3, #64	@ 0x40
 8000e28:	d90f      	bls.n	8000e4a <parse_hex4+0x6e>
 8000e2a:	687a      	ldr	r2, [r7, #4]
 8000e2c:	68bb      	ldr	r3, [r7, #8]
 8000e2e:	4413      	add	r3, r2
 8000e30:	781b      	ldrb	r3, [r3, #0]
 8000e32:	2b46      	cmp	r3, #70	@ 0x46
 8000e34:	d809      	bhi.n	8000e4a <parse_hex4+0x6e>
        {
            h += (unsigned int) 10 + input[i] - 'A';
 8000e36:	687a      	ldr	r2, [r7, #4]
 8000e38:	68bb      	ldr	r3, [r7, #8]
 8000e3a:	4413      	add	r3, r2
 8000e3c:	781b      	ldrb	r3, [r3, #0]
 8000e3e:	461a      	mov	r2, r3
 8000e40:	68fb      	ldr	r3, [r7, #12]
 8000e42:	4413      	add	r3, r2
 8000e44:	3b37      	subs	r3, #55	@ 0x37
 8000e46:	60fb      	str	r3, [r7, #12]
 8000e48:	e017      	b.n	8000e7a <parse_hex4+0x9e>
        }
        else if ((input[i] >= 'a') && (input[i] <= 'f'))
 8000e4a:	687a      	ldr	r2, [r7, #4]
 8000e4c:	68bb      	ldr	r3, [r7, #8]
 8000e4e:	4413      	add	r3, r2
 8000e50:	781b      	ldrb	r3, [r3, #0]
 8000e52:	2b60      	cmp	r3, #96	@ 0x60
 8000e54:	d90f      	bls.n	8000e76 <parse_hex4+0x9a>
 8000e56:	687a      	ldr	r2, [r7, #4]
 8000e58:	68bb      	ldr	r3, [r7, #8]
 8000e5a:	4413      	add	r3, r2
 8000e5c:	781b      	ldrb	r3, [r3, #0]
 8000e5e:	2b66      	cmp	r3, #102	@ 0x66
 8000e60:	d809      	bhi.n	8000e76 <parse_hex4+0x9a>
        {
            h += (unsigned int) 10 + input[i] - 'a';
 8000e62:	687a      	ldr	r2, [r7, #4]
 8000e64:	68bb      	ldr	r3, [r7, #8]
 8000e66:	4413      	add	r3, r2
 8000e68:	781b      	ldrb	r3, [r3, #0]
 8000e6a:	461a      	mov	r2, r3
 8000e6c:	68fb      	ldr	r3, [r7, #12]
 8000e6e:	4413      	add	r3, r2
 8000e70:	3b57      	subs	r3, #87	@ 0x57
 8000e72:	60fb      	str	r3, [r7, #12]
 8000e74:	e001      	b.n	8000e7a <parse_hex4+0x9e>
        }
        else /* invalid */
        {
            return 0;
 8000e76:	2300      	movs	r3, #0
 8000e78:	e00c      	b.n	8000e94 <parse_hex4+0xb8>
        }

        if (i < 3)
 8000e7a:	68bb      	ldr	r3, [r7, #8]
 8000e7c:	2b02      	cmp	r3, #2
 8000e7e:	d802      	bhi.n	8000e86 <parse_hex4+0xaa>
        {
            /* shift left to make place for the next nibble */
            h = h << 4;
 8000e80:	68fb      	ldr	r3, [r7, #12]
 8000e82:	011b      	lsls	r3, r3, #4
 8000e84:	60fb      	str	r3, [r7, #12]
    for (i = 0; i < 4; i++)
 8000e86:	68bb      	ldr	r3, [r7, #8]
 8000e88:	3301      	adds	r3, #1
 8000e8a:	60bb      	str	r3, [r7, #8]
 8000e8c:	68bb      	ldr	r3, [r7, #8]
 8000e8e:	2b03      	cmp	r3, #3
 8000e90:	d9af      	bls.n	8000df2 <parse_hex4+0x16>
        }
    }

    return h;
 8000e92:	68fb      	ldr	r3, [r7, #12]
}
 8000e94:	4618      	mov	r0, r3
 8000e96:	3714      	adds	r7, #20
 8000e98:	46bd      	mov	sp, r7
 8000e9a:	f85d 7b04 	ldr.w	r7, [sp], #4
 8000e9e:	4770      	bx	lr

08000ea0 <utf16_literal_to_utf8>:

/* converts a UTF-16 literal to UTF-8
 * A literal can be one or two sequences of the form \uXXXX */
static unsigned char utf16_literal_to_utf8(const unsigned char * const input_pointer, const unsigned char * const input_end, unsigned char **output_pointer)
{
 8000ea0:	b580      	push	{r7, lr}
 8000ea2:	b08a      	sub	sp, #40	@ 0x28
 8000ea4:	af00      	add	r7, sp, #0
 8000ea6:	60f8      	str	r0, [r7, #12]
 8000ea8:	60b9      	str	r1, [r7, #8]
 8000eaa:	607a      	str	r2, [r7, #4]
    long unsigned int codepoint = 0;
 8000eac:	2300      	movs	r3, #0
 8000eae:	627b      	str	r3, [r7, #36]	@ 0x24
    unsigned int first_code = 0;
 8000eb0:	2300      	movs	r3, #0
 8000eb2:	61fb      	str	r3, [r7, #28]
    const unsigned char *first_sequence = input_pointer;
 8000eb4:	68fb      	ldr	r3, [r7, #12]
 8000eb6:	61bb      	str	r3, [r7, #24]
    unsigned char utf8_length = 0;
 8000eb8:	2300      	movs	r3, #0
 8000eba:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
    unsigned char utf8_position = 0;
 8000ebe:	2300      	movs	r3, #0
 8000ec0:	f887 3022 	strb.w	r3, [r7, #34]	@ 0x22
    unsigned char sequence_length = 0;
 8000ec4:	2300      	movs	r3, #0
 8000ec6:	f887 3021 	strb.w	r3, [r7, #33]	@ 0x21
    unsigned char first_byte_mark = 0;
 8000eca:	2300      	movs	r3, #0
 8000ecc:	f887 3020 	strb.w	r3, [r7, #32]

    if ((input_end - first_sequence) < 6)
 8000ed0:	68ba      	ldr	r2, [r7, #8]
 8000ed2:	69bb      	ldr	r3, [r7, #24]
 8000ed4:	1ad3      	subs	r3, r2, r3
 8000ed6:	2b05      	cmp	r3, #5
 8000ed8:	f340 80b7 	ble.w	800104a <utf16_literal_to_utf8+0x1aa>
        /* input ends unexpectedly */
        goto fail;
    }

    /* get the first utf16 sequence */
    first_code = parse_hex4(first_sequence + 2);
 8000edc:	69bb      	ldr	r3, [r7, #24]
 8000ede:	3302      	adds	r3, #2
 8000ee0:	4618      	mov	r0, r3
 8000ee2:	f7ff ff7b 	bl	8000ddc <parse_hex4>
 8000ee6:	61f8      	str	r0, [r7, #28]

    /* check that the code is valid */
    if (((first_code >= 0xDC00) && (first_code <= 0xDFFF)))
 8000ee8:	69fb      	ldr	r3, [r7, #28]
 8000eea:	f5b3 4f5c 	cmp.w	r3, #56320	@ 0xdc00
 8000eee:	d304      	bcc.n	8000efa <utf16_literal_to_utf8+0x5a>
 8000ef0:	69fb      	ldr	r3, [r7, #28]
 8000ef2:	f5b3 4f60 	cmp.w	r3, #57344	@ 0xe000
 8000ef6:	f0c0 80aa 	bcc.w	800104e <utf16_literal_to_utf8+0x1ae>
    {
        goto fail;
    }

    /* UTF16 surrogate pair */
    if ((first_code >= 0xD800) && (first_code <= 0xDBFF))
 8000efa:	69fb      	ldr	r3, [r7, #28]
 8000efc:	f5b3 4f58 	cmp.w	r3, #55296	@ 0xd800
 8000f00:	d337      	bcc.n	8000f72 <utf16_literal_to_utf8+0xd2>
 8000f02:	69fb      	ldr	r3, [r7, #28]
 8000f04:	f5b3 4f5c 	cmp.w	r3, #56320	@ 0xdc00
 8000f08:	d233      	bcs.n	8000f72 <utf16_literal_to_utf8+0xd2>
    {
        const unsigned char *second_sequence = first_sequence + 6;
 8000f0a:	69bb      	ldr	r3, [r7, #24]
 8000f0c:	3306      	adds	r3, #6
 8000f0e:	617b      	str	r3, [r7, #20]
        unsigned int second_code = 0;
 8000f10:	2300      	movs	r3, #0
 8000f12:	613b      	str	r3, [r7, #16]
        sequence_length = 12; /* \uXXXX\uXXXX */
 8000f14:	230c      	movs	r3, #12
 8000f16:	f887 3021 	strb.w	r3, [r7, #33]	@ 0x21

        if ((input_end - second_sequence) < 6)
 8000f1a:	68ba      	ldr	r2, [r7, #8]
 8000f1c:	697b      	ldr	r3, [r7, #20]
 8000f1e:	1ad3      	subs	r3, r2, r3
 8000f20:	2b05      	cmp	r3, #5
 8000f22:	f340 8096 	ble.w	8001052 <utf16_literal_to_utf8+0x1b2>
        {
            /* input ends unexpectedly */
            goto fail;
        }

        if ((second_sequence[0] != '\\') || (second_sequence[1] != 'u'))
 8000f26:	697b      	ldr	r3, [r7, #20]
 8000f28:	781b      	ldrb	r3, [r3, #0]
 8000f2a:	2b5c      	cmp	r3, #92	@ 0x5c
 8000f2c:	f040 8093 	bne.w	8001056 <utf16_literal_to_utf8+0x1b6>
 8000f30:	697b      	ldr	r3, [r7, #20]
 8000f32:	3301      	adds	r3, #1
 8000f34:	781b      	ldrb	r3, [r3, #0]
 8000f36:	2b75      	cmp	r3, #117	@ 0x75
 8000f38:	f040 808d 	bne.w	8001056 <utf16_literal_to_utf8+0x1b6>
            /* missing second half of the surrogate pair */
            goto fail;
        }

        /* get the second utf16 sequence */
        second_code = parse_hex4(second_sequence + 2);
 8000f3c:	697b      	ldr	r3, [r7, #20]
 8000f3e:	3302      	adds	r3, #2
 8000f40:	4618      	mov	r0, r3
 8000f42:	f7ff ff4b 	bl	8000ddc <parse_hex4>
 8000f46:	6138      	str	r0, [r7, #16]
        /* check that the code is valid */
        if ((second_code < 0xDC00) || (second_code > 0xDFFF))
 8000f48:	693b      	ldr	r3, [r7, #16]
 8000f4a:	f5b3 4f5c 	cmp.w	r3, #56320	@ 0xdc00
 8000f4e:	f0c0 8084 	bcc.w	800105a <utf16_literal_to_utf8+0x1ba>
 8000f52:	693b      	ldr	r3, [r7, #16]
 8000f54:	f5b3 4f60 	cmp.w	r3, #57344	@ 0xe000
 8000f58:	d27f      	bcs.n	800105a <utf16_literal_to_utf8+0x1ba>
            goto fail;
        }


        /* calculate the unicode codepoint from the surrogate pair */
        codepoint = 0x10000 + (((first_code & 0x3FF) << 10) | (second_code & 0x3FF));
 8000f5a:	69fb      	ldr	r3, [r7, #28]
 8000f5c:	029a      	lsls	r2, r3, #10
 8000f5e:	4b43      	ldr	r3, [pc, #268]	@ (800106c <utf16_literal_to_utf8+0x1cc>)
 8000f60:	4013      	ands	r3, r2
 8000f62:	693a      	ldr	r2, [r7, #16]
 8000f64:	f3c2 0209 	ubfx	r2, r2, #0, #10
 8000f68:	4313      	orrs	r3, r2
 8000f6a:	f503 3380 	add.w	r3, r3, #65536	@ 0x10000
 8000f6e:	627b      	str	r3, [r7, #36]	@ 0x24
    {
 8000f70:	e004      	b.n	8000f7c <utf16_literal_to_utf8+0xdc>
    }
    else
    {
        sequence_length = 6; /* \uXXXX */
 8000f72:	2306      	movs	r3, #6
 8000f74:	f887 3021 	strb.w	r3, [r7, #33]	@ 0x21
        codepoint = first_code;
 8000f78:	69fb      	ldr	r3, [r7, #28]
 8000f7a:	627b      	str	r3, [r7, #36]	@ 0x24
    }

    /* encode as UTF-8
     * takes at maximum 4 bytes to encode:
     * 11110xxx 10xxxxxx 10xxxxxx 10xxxxxx */
    if (codepoint < 0x80)
 8000f7c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8000f7e:	2b7f      	cmp	r3, #127	@ 0x7f
 8000f80:	d803      	bhi.n	8000f8a <utf16_literal_to_utf8+0xea>
    {
        /* normal ascii, encoding 0xxxxxxx */
        utf8_length = 1;
 8000f82:	2301      	movs	r3, #1
 8000f84:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
 8000f88:	e01f      	b.n	8000fca <utf16_literal_to_utf8+0x12a>
    }
    else if (codepoint < 0x800)
 8000f8a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8000f8c:	f5b3 6f00 	cmp.w	r3, #2048	@ 0x800
 8000f90:	d206      	bcs.n	8000fa0 <utf16_literal_to_utf8+0x100>
    {
        /* two bytes, encoding 110xxxxx 10xxxxxx */
        utf8_length = 2;
 8000f92:	2302      	movs	r3, #2
 8000f94:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
        first_byte_mark = 0xC0; /* 11000000 */
 8000f98:	23c0      	movs	r3, #192	@ 0xc0
 8000f9a:	f887 3020 	strb.w	r3, [r7, #32]
 8000f9e:	e014      	b.n	8000fca <utf16_literal_to_utf8+0x12a>
    }
    else if (codepoint < 0x10000)
 8000fa0:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8000fa2:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 8000fa6:	d206      	bcs.n	8000fb6 <utf16_literal_to_utf8+0x116>
    {
        /* three bytes, encoding 1110xxxx 10xxxxxx 10xxxxxx */
        utf8_length = 3;
 8000fa8:	2303      	movs	r3, #3
 8000faa:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
        first_byte_mark = 0xE0; /* 11100000 */
 8000fae:	23e0      	movs	r3, #224	@ 0xe0
 8000fb0:	f887 3020 	strb.w	r3, [r7, #32]
 8000fb4:	e009      	b.n	8000fca <utf16_literal_to_utf8+0x12a>
    }
    else if (codepoint <= 0x10FFFF)
 8000fb6:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8000fb8:	f5b3 1f88 	cmp.w	r3, #1114112	@ 0x110000
 8000fbc:	d24f      	bcs.n	800105e <utf16_literal_to_utf8+0x1be>
    {
        /* four bytes, encoding 1110xxxx 10xxxxxx 10xxxxxx 10xxxxxx */
        utf8_length = 4;
 8000fbe:	2304      	movs	r3, #4
 8000fc0:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
        first_byte_mark = 0xF0; /* 11110000 */
 8000fc4:	23f0      	movs	r3, #240	@ 0xf0
 8000fc6:	f887 3020 	strb.w	r3, [r7, #32]
        /* invalid unicode codepoint */
        goto fail;
    }

    /* encode as utf8 */
    for (utf8_position = (unsigned char)(utf8_length - 1); utf8_position > 0; utf8_position--)
 8000fca:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 8000fce:	3b01      	subs	r3, #1
 8000fd0:	f887 3022 	strb.w	r3, [r7, #34]	@ 0x22
 8000fd4:	e015      	b.n	8001002 <utf16_literal_to_utf8+0x162>
    {
        /* 10xxxxxx */
        (*output_pointer)[utf8_position] = (unsigned char)((codepoint | 0x80) & 0xBF);
 8000fd6:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8000fd8:	b2db      	uxtb	r3, r3
 8000fda:	f003 033f 	and.w	r3, r3, #63	@ 0x3f
 8000fde:	b2da      	uxtb	r2, r3
 8000fe0:	687b      	ldr	r3, [r7, #4]
 8000fe2:	6819      	ldr	r1, [r3, #0]
 8000fe4:	f897 3022 	ldrb.w	r3, [r7, #34]	@ 0x22
 8000fe8:	440b      	add	r3, r1
 8000fea:	f062 027f 	orn	r2, r2, #127	@ 0x7f
 8000fee:	b2d2      	uxtb	r2, r2
 8000ff0:	701a      	strb	r2, [r3, #0]
        codepoint >>= 6;
 8000ff2:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8000ff4:	099b      	lsrs	r3, r3, #6
 8000ff6:	627b      	str	r3, [r7, #36]	@ 0x24
    for (utf8_position = (unsigned char)(utf8_length - 1); utf8_position > 0; utf8_position--)
 8000ff8:	f897 3022 	ldrb.w	r3, [r7, #34]	@ 0x22
 8000ffc:	3b01      	subs	r3, #1
 8000ffe:	f887 3022 	strb.w	r3, [r7, #34]	@ 0x22
 8001002:	f897 3022 	ldrb.w	r3, [r7, #34]	@ 0x22
 8001006:	2b00      	cmp	r3, #0
 8001008:	d1e5      	bne.n	8000fd6 <utf16_literal_to_utf8+0x136>
    }
    /* encode first byte */
    if (utf8_length > 1)
 800100a:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 800100e:	2b01      	cmp	r3, #1
 8001010:	d909      	bls.n	8001026 <utf16_literal_to_utf8+0x186>
    {
        (*output_pointer)[0] = (unsigned char)((codepoint | first_byte_mark) & 0xFF);
 8001012:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8001014:	b2d9      	uxtb	r1, r3
 8001016:	687b      	ldr	r3, [r7, #4]
 8001018:	681b      	ldr	r3, [r3, #0]
 800101a:	f897 2020 	ldrb.w	r2, [r7, #32]
 800101e:	430a      	orrs	r2, r1
 8001020:	b2d2      	uxtb	r2, r2
 8001022:	701a      	strb	r2, [r3, #0]
 8001024:	e007      	b.n	8001036 <utf16_literal_to_utf8+0x196>
    }
    else
    {
        (*output_pointer)[0] = (unsigned char)(codepoint & 0x7F);
 8001026:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8001028:	b2da      	uxtb	r2, r3
 800102a:	687b      	ldr	r3, [r7, #4]
 800102c:	681b      	ldr	r3, [r3, #0]
 800102e:	f002 027f 	and.w	r2, r2, #127	@ 0x7f
 8001032:	b2d2      	uxtb	r2, r2
 8001034:	701a      	strb	r2, [r3, #0]
    }

    *output_pointer += utf8_length;
 8001036:	687b      	ldr	r3, [r7, #4]
 8001038:	681a      	ldr	r2, [r3, #0]
 800103a:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 800103e:	441a      	add	r2, r3
 8001040:	687b      	ldr	r3, [r7, #4]
 8001042:	601a      	str	r2, [r3, #0]

    return sequence_length;
 8001044:	f897 3021 	ldrb.w	r3, [r7, #33]	@ 0x21
 8001048:	e00b      	b.n	8001062 <utf16_literal_to_utf8+0x1c2>
        goto fail;
 800104a:	bf00      	nop
 800104c:	e008      	b.n	8001060 <utf16_literal_to_utf8+0x1c0>
        goto fail;
 800104e:	bf00      	nop
 8001050:	e006      	b.n	8001060 <utf16_literal_to_utf8+0x1c0>
            goto fail;
 8001052:	bf00      	nop
 8001054:	e004      	b.n	8001060 <utf16_literal_to_utf8+0x1c0>
            goto fail;
 8001056:	bf00      	nop
 8001058:	e002      	b.n	8001060 <utf16_literal_to_utf8+0x1c0>
            goto fail;
 800105a:	bf00      	nop
 800105c:	e000      	b.n	8001060 <utf16_literal_to_utf8+0x1c0>
        goto fail;
 800105e:	bf00      	nop

fail:
    return 0;
 8001060:	2300      	movs	r3, #0
}
 8001062:	4618      	mov	r0, r3
 8001064:	3728      	adds	r7, #40	@ 0x28
 8001066:	46bd      	mov	sp, r7
 8001068:	bd80      	pop	{r7, pc}
 800106a:	bf00      	nop
 800106c:	000ffc00 	.word	0x000ffc00

08001070 <parse_string>:

/* Parse the input text into an unescaped cinput, and populate item. */
static cJSON_bool parse_string(cJSON * const item, parse_buffer * const input_buffer)
{
 8001070:	b580      	push	{r7, lr}
 8001072:	b08a      	sub	sp, #40	@ 0x28
 8001074:	af00      	add	r7, sp, #0
 8001076:	6078      	str	r0, [r7, #4]
 8001078:	6039      	str	r1, [r7, #0]
    const unsigned char *input_pointer = buffer_at_offset(input_buffer) + 1;
 800107a:	683b      	ldr	r3, [r7, #0]
 800107c:	681a      	ldr	r2, [r3, #0]
 800107e:	683b      	ldr	r3, [r7, #0]
 8001080:	689b      	ldr	r3, [r3, #8]
 8001082:	3301      	adds	r3, #1
 8001084:	4413      	add	r3, r2
 8001086:	627b      	str	r3, [r7, #36]	@ 0x24
    const unsigned char *input_end = buffer_at_offset(input_buffer) + 1;
 8001088:	683b      	ldr	r3, [r7, #0]
 800108a:	681a      	ldr	r2, [r3, #0]
 800108c:	683b      	ldr	r3, [r7, #0]
 800108e:	689b      	ldr	r3, [r3, #8]
 8001090:	3301      	adds	r3, #1
 8001092:	4413      	add	r3, r2
 8001094:	623b      	str	r3, [r7, #32]
    unsigned char *output_pointer = NULL;
 8001096:	2300      	movs	r3, #0
 8001098:	60fb      	str	r3, [r7, #12]
    unsigned char *output = NULL;
 800109a:	2300      	movs	r3, #0
 800109c:	61fb      	str	r3, [r7, #28]

    /* not a string */
    if (buffer_at_offset(input_buffer)[0] != '\"')
 800109e:	683b      	ldr	r3, [r7, #0]
 80010a0:	681a      	ldr	r2, [r3, #0]
 80010a2:	683b      	ldr	r3, [r7, #0]
 80010a4:	689b      	ldr	r3, [r3, #8]
 80010a6:	4413      	add	r3, r2
 80010a8:	781b      	ldrb	r3, [r3, #0]
 80010aa:	2b22      	cmp	r3, #34	@ 0x22
 80010ac:	f040 8103 	bne.w	80012b6 <parse_string+0x246>
        goto fail;
    }

    {
        /* calculate approximate size of the output (overestimate) */
        size_t allocation_length = 0;
 80010b0:	2300      	movs	r3, #0
 80010b2:	613b      	str	r3, [r7, #16]
        size_t skipped_bytes = 0;
 80010b4:	2300      	movs	r3, #0
 80010b6:	61bb      	str	r3, [r7, #24]
        while (((size_t)(input_end - input_buffer->content) < input_buffer->length) && (*input_end != '\"'))
 80010b8:	e017      	b.n	80010ea <parse_string+0x7a>
        {
            /* is escape sequence */
            if (input_end[0] == '\\')
 80010ba:	6a3b      	ldr	r3, [r7, #32]
 80010bc:	781b      	ldrb	r3, [r3, #0]
 80010be:	2b5c      	cmp	r3, #92	@ 0x5c
 80010c0:	d110      	bne.n	80010e4 <parse_string+0x74>
            {
                if ((size_t)(input_end + 1 - input_buffer->content) >= input_buffer->length)
 80010c2:	6a3b      	ldr	r3, [r7, #32]
 80010c4:	1c5a      	adds	r2, r3, #1
 80010c6:	683b      	ldr	r3, [r7, #0]
 80010c8:	681b      	ldr	r3, [r3, #0]
 80010ca:	1ad3      	subs	r3, r2, r3
 80010cc:	461a      	mov	r2, r3
 80010ce:	683b      	ldr	r3, [r7, #0]
 80010d0:	685b      	ldr	r3, [r3, #4]
 80010d2:	429a      	cmp	r2, r3
 80010d4:	f080 80f1 	bcs.w	80012ba <parse_string+0x24a>
                {
                    /* prevent buffer overflow when last input character is a backslash */
                    goto fail;
                }
                skipped_bytes++;
 80010d8:	69bb      	ldr	r3, [r7, #24]
 80010da:	3301      	adds	r3, #1
 80010dc:	61bb      	str	r3, [r7, #24]
                input_end++;
 80010de:	6a3b      	ldr	r3, [r7, #32]
 80010e0:	3301      	adds	r3, #1
 80010e2:	623b      	str	r3, [r7, #32]
            }
            input_end++;
 80010e4:	6a3b      	ldr	r3, [r7, #32]
 80010e6:	3301      	adds	r3, #1
 80010e8:	623b      	str	r3, [r7, #32]
        while (((size_t)(input_end - input_buffer->content) < input_buffer->length) && (*input_end != '\"'))
 80010ea:	683b      	ldr	r3, [r7, #0]
 80010ec:	681b      	ldr	r3, [r3, #0]
 80010ee:	6a3a      	ldr	r2, [r7, #32]
 80010f0:	1ad3      	subs	r3, r2, r3
 80010f2:	461a      	mov	r2, r3
 80010f4:	683b      	ldr	r3, [r7, #0]
 80010f6:	685b      	ldr	r3, [r3, #4]
 80010f8:	429a      	cmp	r2, r3
 80010fa:	d203      	bcs.n	8001104 <parse_string+0x94>
 80010fc:	6a3b      	ldr	r3, [r7, #32]
 80010fe:	781b      	ldrb	r3, [r3, #0]
 8001100:	2b22      	cmp	r3, #34	@ 0x22
 8001102:	d1da      	bne.n	80010ba <parse_string+0x4a>
        }
        if (((size_t)(input_end - input_buffer->content) >= input_buffer->length) || (*input_end != '\"'))
 8001104:	683b      	ldr	r3, [r7, #0]
 8001106:	681b      	ldr	r3, [r3, #0]
 8001108:	6a3a      	ldr	r2, [r7, #32]
 800110a:	1ad3      	subs	r3, r2, r3
 800110c:	461a      	mov	r2, r3
 800110e:	683b      	ldr	r3, [r7, #0]
 8001110:	685b      	ldr	r3, [r3, #4]
 8001112:	429a      	cmp	r2, r3
 8001114:	f080 80d3 	bcs.w	80012be <parse_string+0x24e>
 8001118:	6a3b      	ldr	r3, [r7, #32]
 800111a:	781b      	ldrb	r3, [r3, #0]
 800111c:	2b22      	cmp	r3, #34	@ 0x22
 800111e:	f040 80ce 	bne.w	80012be <parse_string+0x24e>
        {
            goto fail; /* string ended unexpectedly */
        }

        /* This is at most how much we need for the output */
        allocation_length = (size_t) (input_end - buffer_at_offset(input_buffer)) - skipped_bytes;
 8001122:	683b      	ldr	r3, [r7, #0]
 8001124:	681a      	ldr	r2, [r3, #0]
 8001126:	683b      	ldr	r3, [r7, #0]
 8001128:	689b      	ldr	r3, [r3, #8]
 800112a:	4413      	add	r3, r2
 800112c:	6a3a      	ldr	r2, [r7, #32]
 800112e:	1ad3      	subs	r3, r2, r3
 8001130:	461a      	mov	r2, r3
 8001132:	69bb      	ldr	r3, [r7, #24]
 8001134:	1ad3      	subs	r3, r2, r3
 8001136:	613b      	str	r3, [r7, #16]
        output = (unsigned char*)input_buffer->hooks.allocate(allocation_length + sizeof(""));
 8001138:	683b      	ldr	r3, [r7, #0]
 800113a:	691b      	ldr	r3, [r3, #16]
 800113c:	693a      	ldr	r2, [r7, #16]
 800113e:	3201      	adds	r2, #1
 8001140:	4610      	mov	r0, r2
 8001142:	4798      	blx	r3
 8001144:	61f8      	str	r0, [r7, #28]
        if (output == NULL)
 8001146:	69fb      	ldr	r3, [r7, #28]
 8001148:	2b00      	cmp	r3, #0
 800114a:	f000 80ba 	beq.w	80012c2 <parse_string+0x252>
        {
            goto fail; /* allocation failure */
        }
    }

    output_pointer = output;
 800114e:	69fb      	ldr	r3, [r7, #28]
 8001150:	60fb      	str	r3, [r7, #12]
    /* loop through the string literal */
    while (input_pointer < input_end)
 8001152:	e094      	b.n	800127e <parse_string+0x20e>
    {
        if (*input_pointer != '\\')
 8001154:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8001156:	781b      	ldrb	r3, [r3, #0]
 8001158:	2b5c      	cmp	r3, #92	@ 0x5c
 800115a:	d008      	beq.n	800116e <parse_string+0xfe>
        {
            *output_pointer++ = *input_pointer++;
 800115c:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 800115e:	1c53      	adds	r3, r2, #1
 8001160:	627b      	str	r3, [r7, #36]	@ 0x24
 8001162:	68fb      	ldr	r3, [r7, #12]
 8001164:	1c59      	adds	r1, r3, #1
 8001166:	60f9      	str	r1, [r7, #12]
 8001168:	7812      	ldrb	r2, [r2, #0]
 800116a:	701a      	strb	r2, [r3, #0]
 800116c:	e087      	b.n	800127e <parse_string+0x20e>
        }
        /* escape sequence */
        else
        {
            unsigned char sequence_length = 2;
 800116e:	2302      	movs	r3, #2
 8001170:	75fb      	strb	r3, [r7, #23]
            if ((input_end - input_pointer) < 1)
 8001172:	6a3a      	ldr	r2, [r7, #32]
 8001174:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8001176:	1ad3      	subs	r3, r2, r3
 8001178:	2b00      	cmp	r3, #0
 800117a:	f340 80a4 	ble.w	80012c6 <parse_string+0x256>
            {
                goto fail;
            }

            switch (input_pointer[1])
 800117e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8001180:	3301      	adds	r3, #1
 8001182:	781b      	ldrb	r3, [r3, #0]
 8001184:	2b75      	cmp	r3, #117	@ 0x75
 8001186:	f300 80a0 	bgt.w	80012ca <parse_string+0x25a>
 800118a:	2b5c      	cmp	r3, #92	@ 0x5c
 800118c:	da04      	bge.n	8001198 <parse_string+0x128>
 800118e:	2b22      	cmp	r3, #34	@ 0x22
 8001190:	d05c      	beq.n	800124c <parse_string+0x1dc>
 8001192:	2b2f      	cmp	r3, #47	@ 0x2f
 8001194:	d05a      	beq.n	800124c <parse_string+0x1dc>
                        goto fail;
                    }
                    break;

                default:
                    goto fail;
 8001196:	e098      	b.n	80012ca <parse_string+0x25a>
            switch (input_pointer[1])
 8001198:	3b5c      	subs	r3, #92	@ 0x5c
 800119a:	2b19      	cmp	r3, #25
 800119c:	f200 8095 	bhi.w	80012ca <parse_string+0x25a>
 80011a0:	a201      	add	r2, pc, #4	@ (adr r2, 80011a8 <parse_string+0x138>)
 80011a2:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 80011a6:	bf00      	nop
 80011a8:	0800124d 	.word	0x0800124d
 80011ac:	080012cb 	.word	0x080012cb
 80011b0:	080012cb 	.word	0x080012cb
 80011b4:	080012cb 	.word	0x080012cb
 80011b8:	080012cb 	.word	0x080012cb
 80011bc:	080012cb 	.word	0x080012cb
 80011c0:	08001211 	.word	0x08001211
 80011c4:	080012cb 	.word	0x080012cb
 80011c8:	080012cb 	.word	0x080012cb
 80011cc:	080012cb 	.word	0x080012cb
 80011d0:	0800121d 	.word	0x0800121d
 80011d4:	080012cb 	.word	0x080012cb
 80011d8:	080012cb 	.word	0x080012cb
 80011dc:	080012cb 	.word	0x080012cb
 80011e0:	080012cb 	.word	0x080012cb
 80011e4:	080012cb 	.word	0x080012cb
 80011e8:	080012cb 	.word	0x080012cb
 80011ec:	080012cb 	.word	0x080012cb
 80011f0:	08001229 	.word	0x08001229
 80011f4:	080012cb 	.word	0x080012cb
 80011f8:	080012cb 	.word	0x080012cb
 80011fc:	080012cb 	.word	0x080012cb
 8001200:	08001235 	.word	0x08001235
 8001204:	080012cb 	.word	0x080012cb
 8001208:	08001241 	.word	0x08001241
 800120c:	0800125d 	.word	0x0800125d
                    *output_pointer++ = '\b';
 8001210:	68fb      	ldr	r3, [r7, #12]
 8001212:	1c5a      	adds	r2, r3, #1
 8001214:	60fa      	str	r2, [r7, #12]
 8001216:	2208      	movs	r2, #8
 8001218:	701a      	strb	r2, [r3, #0]
                    break;
 800121a:	e02c      	b.n	8001276 <parse_string+0x206>
                    *output_pointer++ = '\f';
 800121c:	68fb      	ldr	r3, [r7, #12]
 800121e:	1c5a      	adds	r2, r3, #1
 8001220:	60fa      	str	r2, [r7, #12]
 8001222:	220c      	movs	r2, #12
 8001224:	701a      	strb	r2, [r3, #0]
                    break;
 8001226:	e026      	b.n	8001276 <parse_string+0x206>
                    *output_pointer++ = '\n';
 8001228:	68fb      	ldr	r3, [r7, #12]
 800122a:	1c5a      	adds	r2, r3, #1
 800122c:	60fa      	str	r2, [r7, #12]
 800122e:	220a      	movs	r2, #10
 8001230:	701a      	strb	r2, [r3, #0]
                    break;
 8001232:	e020      	b.n	8001276 <parse_string+0x206>
                    *output_pointer++ = '\r';
 8001234:	68fb      	ldr	r3, [r7, #12]
 8001236:	1c5a      	adds	r2, r3, #1
 8001238:	60fa      	str	r2, [r7, #12]
 800123a:	220d      	movs	r2, #13
 800123c:	701a      	strb	r2, [r3, #0]
                    break;
 800123e:	e01a      	b.n	8001276 <parse_string+0x206>
                    *output_pointer++ = '\t';
 8001240:	68fb      	ldr	r3, [r7, #12]
 8001242:	1c5a      	adds	r2, r3, #1
 8001244:	60fa      	str	r2, [r7, #12]
 8001246:	2209      	movs	r2, #9
 8001248:	701a      	strb	r2, [r3, #0]
                    break;
 800124a:	e014      	b.n	8001276 <parse_string+0x206>
                    *output_pointer++ = input_pointer[1];
 800124c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800124e:	1c5a      	adds	r2, r3, #1
 8001250:	68fb      	ldr	r3, [r7, #12]
 8001252:	1c59      	adds	r1, r3, #1
 8001254:	60f9      	str	r1, [r7, #12]
 8001256:	7812      	ldrb	r2, [r2, #0]
 8001258:	701a      	strb	r2, [r3, #0]
                    break;
 800125a:	e00c      	b.n	8001276 <parse_string+0x206>
                    sequence_length = utf16_literal_to_utf8(input_pointer, input_end, &output_pointer);
 800125c:	f107 030c 	add.w	r3, r7, #12
 8001260:	461a      	mov	r2, r3
 8001262:	6a39      	ldr	r1, [r7, #32]
 8001264:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 8001266:	f7ff fe1b 	bl	8000ea0 <utf16_literal_to_utf8>
 800126a:	4603      	mov	r3, r0
 800126c:	75fb      	strb	r3, [r7, #23]
                    if (sequence_length == 0)
 800126e:	7dfb      	ldrb	r3, [r7, #23]
 8001270:	2b00      	cmp	r3, #0
 8001272:	d02c      	beq.n	80012ce <parse_string+0x25e>
                    break;
 8001274:	bf00      	nop
            }
            input_pointer += sequence_length;
 8001276:	7dfb      	ldrb	r3, [r7, #23]
 8001278:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 800127a:	4413      	add	r3, r2
 800127c:	627b      	str	r3, [r7, #36]	@ 0x24
    while (input_pointer < input_end)
 800127e:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8001280:	6a3b      	ldr	r3, [r7, #32]
 8001282:	429a      	cmp	r2, r3
 8001284:	f4ff af66 	bcc.w	8001154 <parse_string+0xe4>
        }
    }

    /* zero terminate the output */
    *output_pointer = '\0';
 8001288:	68fb      	ldr	r3, [r7, #12]
 800128a:	2200      	movs	r2, #0
 800128c:	701a      	strb	r2, [r3, #0]

    item->type = cJSON_String;
 800128e:	687b      	ldr	r3, [r7, #4]
 8001290:	2210      	movs	r2, #16
 8001292:	60da      	str	r2, [r3, #12]
    item->valuestring = (char*)output;
 8001294:	687b      	ldr	r3, [r7, #4]
 8001296:	69fa      	ldr	r2, [r7, #28]
 8001298:	611a      	str	r2, [r3, #16]

    input_buffer->offset = (size_t) (input_end - input_buffer->content);
 800129a:	683b      	ldr	r3, [r7, #0]
 800129c:	681b      	ldr	r3, [r3, #0]
 800129e:	6a3a      	ldr	r2, [r7, #32]
 80012a0:	1ad3      	subs	r3, r2, r3
 80012a2:	461a      	mov	r2, r3
 80012a4:	683b      	ldr	r3, [r7, #0]
 80012a6:	609a      	str	r2, [r3, #8]
    input_buffer->offset++;
 80012a8:	683b      	ldr	r3, [r7, #0]
 80012aa:	689b      	ldr	r3, [r3, #8]
 80012ac:	1c5a      	adds	r2, r3, #1
 80012ae:	683b      	ldr	r3, [r7, #0]
 80012b0:	609a      	str	r2, [r3, #8]

    return true;
 80012b2:	2301      	movs	r3, #1
 80012b4:	e020      	b.n	80012f8 <parse_string+0x288>
        goto fail;
 80012b6:	bf00      	nop
 80012b8:	e00a      	b.n	80012d0 <parse_string+0x260>
                    goto fail;
 80012ba:	bf00      	nop
 80012bc:	e008      	b.n	80012d0 <parse_string+0x260>
            goto fail; /* string ended unexpectedly */
 80012be:	bf00      	nop
 80012c0:	e006      	b.n	80012d0 <parse_string+0x260>
            goto fail; /* allocation failure */
 80012c2:	bf00      	nop
 80012c4:	e004      	b.n	80012d0 <parse_string+0x260>
                goto fail;
 80012c6:	bf00      	nop
 80012c8:	e002      	b.n	80012d0 <parse_string+0x260>
                    goto fail;
 80012ca:	bf00      	nop
 80012cc:	e000      	b.n	80012d0 <parse_string+0x260>
                        goto fail;
 80012ce:	bf00      	nop

fail:
    if (output != NULL)
 80012d0:	69fb      	ldr	r3, [r7, #28]
 80012d2:	2b00      	cmp	r3, #0
 80012d4:	d005      	beq.n	80012e2 <parse_string+0x272>
    {
        input_buffer->hooks.deallocate(output);
 80012d6:	683b      	ldr	r3, [r7, #0]
 80012d8:	695b      	ldr	r3, [r3, #20]
 80012da:	69f8      	ldr	r0, [r7, #28]
 80012dc:	4798      	blx	r3
        output = NULL;
 80012de:	2300      	movs	r3, #0
 80012e0:	61fb      	str	r3, [r7, #28]
    }

    if (input_pointer != NULL)
 80012e2:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80012e4:	2b00      	cmp	r3, #0
 80012e6:	d006      	beq.n	80012f6 <parse_string+0x286>
    {
        input_buffer->offset = (size_t)(input_pointer - input_buffer->content);
 80012e8:	683b      	ldr	r3, [r7, #0]
 80012ea:	681b      	ldr	r3, [r3, #0]
 80012ec:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 80012ee:	1ad3      	subs	r3, r2, r3
 80012f0:	461a      	mov	r2, r3
 80012f2:	683b      	ldr	r3, [r7, #0]
 80012f4:	609a      	str	r2, [r3, #8]
    }

    return false;
 80012f6:	2300      	movs	r3, #0
}
 80012f8:	4618      	mov	r0, r3
 80012fa:	3728      	adds	r7, #40	@ 0x28
 80012fc:	46bd      	mov	sp, r7
 80012fe:	bd80      	pop	{r7, pc}

08001300 <buffer_skip_whitespace>:
static cJSON_bool parse_object(cJSON * const item, parse_buffer * const input_buffer);
static cJSON_bool print_object(const cJSON * const item, printbuffer * const output_buffer);

/* Utility to jump whitespace and cr/lf */
static parse_buffer *buffer_skip_whitespace(parse_buffer * const buffer)
{
 8001300:	b480      	push	{r7}
 8001302:	b083      	sub	sp, #12
 8001304:	af00      	add	r7, sp, #0
 8001306:	6078      	str	r0, [r7, #4]
    if ((buffer == NULL) || (buffer->content == NULL))
 8001308:	687b      	ldr	r3, [r7, #4]
 800130a:	2b00      	cmp	r3, #0
 800130c:	d003      	beq.n	8001316 <buffer_skip_whitespace+0x16>
 800130e:	687b      	ldr	r3, [r7, #4]
 8001310:	681b      	ldr	r3, [r3, #0]
 8001312:	2b00      	cmp	r3, #0
 8001314:	d101      	bne.n	800131a <buffer_skip_whitespace+0x1a>
    {
        return NULL;
 8001316:	2300      	movs	r3, #0
 8001318:	e02c      	b.n	8001374 <buffer_skip_whitespace+0x74>
    }

    if (cannot_access_at_index(buffer, 0))
 800131a:	687b      	ldr	r3, [r7, #4]
 800131c:	2b00      	cmp	r3, #0
 800131e:	d005      	beq.n	800132c <buffer_skip_whitespace+0x2c>
 8001320:	687b      	ldr	r3, [r7, #4]
 8001322:	689a      	ldr	r2, [r3, #8]
 8001324:	687b      	ldr	r3, [r7, #4]
 8001326:	685b      	ldr	r3, [r3, #4]
 8001328:	429a      	cmp	r2, r3
 800132a:	d306      	bcc.n	800133a <buffer_skip_whitespace+0x3a>
    {
        return buffer;
 800132c:	687b      	ldr	r3, [r7, #4]
 800132e:	e021      	b.n	8001374 <buffer_skip_whitespace+0x74>
    }

    while (can_access_at_index(buffer, 0) && (buffer_at_offset(buffer)[0] <= 32))
    {
       buffer->offset++;
 8001330:	687b      	ldr	r3, [r7, #4]
 8001332:	689b      	ldr	r3, [r3, #8]
 8001334:	1c5a      	adds	r2, r3, #1
 8001336:	687b      	ldr	r3, [r7, #4]
 8001338:	609a      	str	r2, [r3, #8]
    while (can_access_at_index(buffer, 0) && (buffer_at_offset(buffer)[0] <= 32))
 800133a:	687b      	ldr	r3, [r7, #4]
 800133c:	2b00      	cmp	r3, #0
 800133e:	d00d      	beq.n	800135c <buffer_skip_whitespace+0x5c>
 8001340:	687b      	ldr	r3, [r7, #4]
 8001342:	689a      	ldr	r2, [r3, #8]
 8001344:	687b      	ldr	r3, [r7, #4]
 8001346:	685b      	ldr	r3, [r3, #4]
 8001348:	429a      	cmp	r2, r3
 800134a:	d207      	bcs.n	800135c <buffer_skip_whitespace+0x5c>
 800134c:	687b      	ldr	r3, [r7, #4]
 800134e:	681a      	ldr	r2, [r3, #0]
 8001350:	687b      	ldr	r3, [r7, #4]
 8001352:	689b      	ldr	r3, [r3, #8]
 8001354:	4413      	add	r3, r2
 8001356:	781b      	ldrb	r3, [r3, #0]
 8001358:	2b20      	cmp	r3, #32
 800135a:	d9e9      	bls.n	8001330 <buffer_skip_whitespace+0x30>
    }

    if (buffer->offset == buffer->length)
 800135c:	687b      	ldr	r3, [r7, #4]
 800135e:	689a      	ldr	r2, [r3, #8]
 8001360:	687b      	ldr	r3, [r7, #4]
 8001362:	685b      	ldr	r3, [r3, #4]
 8001364:	429a      	cmp	r2, r3
 8001366:	d104      	bne.n	8001372 <buffer_skip_whitespace+0x72>
    {
        buffer->offset--;
 8001368:	687b      	ldr	r3, [r7, #4]
 800136a:	689b      	ldr	r3, [r3, #8]
 800136c:	1e5a      	subs	r2, r3, #1
 800136e:	687b      	ldr	r3, [r7, #4]
 8001370:	609a      	str	r2, [r3, #8]
    }

    return buffer;
 8001372:	687b      	ldr	r3, [r7, #4]
}
 8001374:	4618      	mov	r0, r3
 8001376:	370c      	adds	r7, #12
 8001378:	46bd      	mov	sp, r7
 800137a:	f85d 7b04 	ldr.w	r7, [sp], #4
 800137e:	4770      	bx	lr

08001380 <skip_utf8_bom>:

/* skip the UTF-8 BOM (byte order mark) if it is at the beginning of a buffer */
static parse_buffer *skip_utf8_bom(parse_buffer * const buffer)
{
 8001380:	b580      	push	{r7, lr}
 8001382:	b082      	sub	sp, #8
 8001384:	af00      	add	r7, sp, #0
 8001386:	6078      	str	r0, [r7, #4]
    if ((buffer == NULL) || (buffer->content == NULL) || (buffer->offset != 0))
 8001388:	687b      	ldr	r3, [r7, #4]
 800138a:	2b00      	cmp	r3, #0
 800138c:	d007      	beq.n	800139e <skip_utf8_bom+0x1e>
 800138e:	687b      	ldr	r3, [r7, #4]
 8001390:	681b      	ldr	r3, [r3, #0]
 8001392:	2b00      	cmp	r3, #0
 8001394:	d003      	beq.n	800139e <skip_utf8_bom+0x1e>
 8001396:	687b      	ldr	r3, [r7, #4]
 8001398:	689b      	ldr	r3, [r3, #8]
 800139a:	2b00      	cmp	r3, #0
 800139c:	d001      	beq.n	80013a2 <skip_utf8_bom+0x22>
    {
        return NULL;
 800139e:	2300      	movs	r3, #0
 80013a0:	e01c      	b.n	80013dc <skip_utf8_bom+0x5c>
    }

    if (can_access_at_index(buffer, 4) && (strncmp((const char*)buffer_at_offset(buffer), "\xEF\xBB\xBF", 3) == 0))
 80013a2:	687b      	ldr	r3, [r7, #4]
 80013a4:	2b00      	cmp	r3, #0
 80013a6:	d018      	beq.n	80013da <skip_utf8_bom+0x5a>
 80013a8:	687b      	ldr	r3, [r7, #4]
 80013aa:	689b      	ldr	r3, [r3, #8]
 80013ac:	1d1a      	adds	r2, r3, #4
 80013ae:	687b      	ldr	r3, [r7, #4]
 80013b0:	685b      	ldr	r3, [r3, #4]
 80013b2:	429a      	cmp	r2, r3
 80013b4:	d211      	bcs.n	80013da <skip_utf8_bom+0x5a>
 80013b6:	687b      	ldr	r3, [r7, #4]
 80013b8:	681a      	ldr	r2, [r3, #0]
 80013ba:	687b      	ldr	r3, [r7, #4]
 80013bc:	689b      	ldr	r3, [r3, #8]
 80013be:	4413      	add	r3, r2
 80013c0:	2203      	movs	r2, #3
 80013c2:	4908      	ldr	r1, [pc, #32]	@ (80013e4 <skip_utf8_bom+0x64>)
 80013c4:	4618      	mov	r0, r3
 80013c6:	f029 f893 	bl	802a4f0 <strncmp>
 80013ca:	4603      	mov	r3, r0
 80013cc:	2b00      	cmp	r3, #0
 80013ce:	d104      	bne.n	80013da <skip_utf8_bom+0x5a>
    {
        buffer->offset += 3;
 80013d0:	687b      	ldr	r3, [r7, #4]
 80013d2:	689b      	ldr	r3, [r3, #8]
 80013d4:	1cda      	adds	r2, r3, #3
 80013d6:	687b      	ldr	r3, [r7, #4]
 80013d8:	609a      	str	r2, [r3, #8]
    }

    return buffer;
 80013da:	687b      	ldr	r3, [r7, #4]
}
 80013dc:	4618      	mov	r0, r3
 80013de:	3708      	adds	r7, #8
 80013e0:	46bd      	mov	sp, r7
 80013e2:	bd80      	pop	{r7, pc}
 80013e4:	0802cc78 	.word	0x0802cc78

080013e8 <cJSON_ParseWithOpts>:

CJSON_PUBLIC(cJSON *) cJSON_ParseWithOpts(const char *value, const char **return_parse_end, cJSON_bool require_null_terminated)
{
 80013e8:	b580      	push	{r7, lr}
 80013ea:	b086      	sub	sp, #24
 80013ec:	af00      	add	r7, sp, #0
 80013ee:	60f8      	str	r0, [r7, #12]
 80013f0:	60b9      	str	r1, [r7, #8]
 80013f2:	607a      	str	r2, [r7, #4]
    size_t buffer_length;

    if (NULL == value)
 80013f4:	68fb      	ldr	r3, [r7, #12]
 80013f6:	2b00      	cmp	r3, #0
 80013f8:	d101      	bne.n	80013fe <cJSON_ParseWithOpts+0x16>
    {
        return NULL;
 80013fa:	2300      	movs	r3, #0
 80013fc:	e00c      	b.n	8001418 <cJSON_ParseWithOpts+0x30>
    }

    /* Adding null character size due to require_null_terminated. */
    buffer_length = strlen(value) + sizeof("");
 80013fe:	68f8      	ldr	r0, [r7, #12]
 8001400:	f7fe ffce 	bl	80003a0 <strlen>
 8001404:	4603      	mov	r3, r0
 8001406:	3301      	adds	r3, #1
 8001408:	617b      	str	r3, [r7, #20]

    return cJSON_ParseWithLengthOpts(value, buffer_length, return_parse_end, require_null_terminated);
 800140a:	687b      	ldr	r3, [r7, #4]
 800140c:	68ba      	ldr	r2, [r7, #8]
 800140e:	6979      	ldr	r1, [r7, #20]
 8001410:	68f8      	ldr	r0, [r7, #12]
 8001412:	f000 f805 	bl	8001420 <cJSON_ParseWithLengthOpts>
 8001416:	4603      	mov	r3, r0
}
 8001418:	4618      	mov	r0, r3
 800141a:	3718      	adds	r7, #24
 800141c:	46bd      	mov	sp, r7
 800141e:	bd80      	pop	{r7, pc}

08001420 <cJSON_ParseWithLengthOpts>:

/* Parse an object - create a new root, and populate. */
CJSON_PUBLIC(cJSON *) cJSON_ParseWithLengthOpts(const char *value, size_t buffer_length, const char **return_parse_end, cJSON_bool require_null_terminated)
{
 8001420:	b580      	push	{r7, lr}
 8001422:	b08e      	sub	sp, #56	@ 0x38
 8001424:	af00      	add	r7, sp, #0
 8001426:	60f8      	str	r0, [r7, #12]
 8001428:	60b9      	str	r1, [r7, #8]
 800142a:	607a      	str	r2, [r7, #4]
 800142c:	603b      	str	r3, [r7, #0]
    parse_buffer buffer = { 0, 0, 0, 0, { 0, 0, 0 } };
 800142e:	f107 0318 	add.w	r3, r7, #24
 8001432:	2200      	movs	r2, #0
 8001434:	601a      	str	r2, [r3, #0]
 8001436:	605a      	str	r2, [r3, #4]
 8001438:	609a      	str	r2, [r3, #8]
 800143a:	60da      	str	r2, [r3, #12]
 800143c:	611a      	str	r2, [r3, #16]
 800143e:	615a      	str	r2, [r3, #20]
 8001440:	619a      	str	r2, [r3, #24]
    cJSON *item = NULL;
 8001442:	2300      	movs	r3, #0
 8001444:	637b      	str	r3, [r7, #52]	@ 0x34

    /* reset error position */
    global_error.json = NULL;
 8001446:	4b41      	ldr	r3, [pc, #260]	@ (800154c <cJSON_ParseWithLengthOpts+0x12c>)
 8001448:	2200      	movs	r2, #0
 800144a:	601a      	str	r2, [r3, #0]
    global_error.position = 0;
 800144c:	4b3f      	ldr	r3, [pc, #252]	@ (800154c <cJSON_ParseWithLengthOpts+0x12c>)
 800144e:	2200      	movs	r2, #0
 8001450:	605a      	str	r2, [r3, #4]

    if (value == NULL || 0 == buffer_length)
 8001452:	68fb      	ldr	r3, [r7, #12]
 8001454:	2b00      	cmp	r3, #0
 8001456:	d042      	beq.n	80014de <cJSON_ParseWithLengthOpts+0xbe>
 8001458:	68bb      	ldr	r3, [r7, #8]
 800145a:	2b00      	cmp	r3, #0
 800145c:	d03f      	beq.n	80014de <cJSON_ParseWithLengthOpts+0xbe>
    {
        goto fail;
    }

    buffer.content = (const unsigned char*)value;
 800145e:	68fb      	ldr	r3, [r7, #12]
 8001460:	61bb      	str	r3, [r7, #24]
    buffer.length = buffer_length;
 8001462:	68bb      	ldr	r3, [r7, #8]
 8001464:	61fb      	str	r3, [r7, #28]
    buffer.offset = 0;
 8001466:	2300      	movs	r3, #0
 8001468:	623b      	str	r3, [r7, #32]
    buffer.hooks = global_hooks;
 800146a:	4a39      	ldr	r2, [pc, #228]	@ (8001550 <cJSON_ParseWithLengthOpts+0x130>)
 800146c:	f107 0328 	add.w	r3, r7, #40	@ 0x28
 8001470:	ca07      	ldmia	r2, {r0, r1, r2}
 8001472:	e883 0007 	stmia.w	r3, {r0, r1, r2}

    item = cJSON_New_Item(&global_hooks);
 8001476:	4836      	ldr	r0, [pc, #216]	@ (8001550 <cJSON_ParseWithLengthOpts+0x130>)
 8001478:	f7ff fb72 	bl	8000b60 <cJSON_New_Item>
 800147c:	6378      	str	r0, [r7, #52]	@ 0x34
    if (item == NULL) /* memory fail */
 800147e:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8001480:	2b00      	cmp	r3, #0
 8001482:	d02e      	beq.n	80014e2 <cJSON_ParseWithLengthOpts+0xc2>
    {
        goto fail;
    }

    if (!parse_value(item, buffer_skip_whitespace(skip_utf8_bom(&buffer))))
 8001484:	f107 0318 	add.w	r3, r7, #24
 8001488:	4618      	mov	r0, r3
 800148a:	f7ff ff79 	bl	8001380 <skip_utf8_bom>
 800148e:	4603      	mov	r3, r0
 8001490:	4618      	mov	r0, r3
 8001492:	f7ff ff35 	bl	8001300 <buffer_skip_whitespace>
 8001496:	4603      	mov	r3, r0
 8001498:	4619      	mov	r1, r3
 800149a:	6b78      	ldr	r0, [r7, #52]	@ 0x34
 800149c:	f000 f868 	bl	8001570 <parse_value>
 80014a0:	4603      	mov	r3, r0
 80014a2:	2b00      	cmp	r3, #0
 80014a4:	d01f      	beq.n	80014e6 <cJSON_ParseWithLengthOpts+0xc6>
        /* parse failure. ep is set. */
        goto fail;
    }

    /* if we require null-terminated JSON without appended garbage, skip and then check for a null terminator */
    if (require_null_terminated)
 80014a6:	683b      	ldr	r3, [r7, #0]
 80014a8:	2b00      	cmp	r3, #0
 80014aa:	d00e      	beq.n	80014ca <cJSON_ParseWithLengthOpts+0xaa>
    {
        buffer_skip_whitespace(&buffer);
 80014ac:	f107 0318 	add.w	r3, r7, #24
 80014b0:	4618      	mov	r0, r3
 80014b2:	f7ff ff25 	bl	8001300 <buffer_skip_whitespace>
        if ((buffer.offset >= buffer.length) || buffer_at_offset(&buffer)[0] != '\0')
 80014b6:	6a3a      	ldr	r2, [r7, #32]
 80014b8:	69fb      	ldr	r3, [r7, #28]
 80014ba:	429a      	cmp	r2, r3
 80014bc:	d215      	bcs.n	80014ea <cJSON_ParseWithLengthOpts+0xca>
 80014be:	69ba      	ldr	r2, [r7, #24]
 80014c0:	6a3b      	ldr	r3, [r7, #32]
 80014c2:	4413      	add	r3, r2
 80014c4:	781b      	ldrb	r3, [r3, #0]
 80014c6:	2b00      	cmp	r3, #0
 80014c8:	d10f      	bne.n	80014ea <cJSON_ParseWithLengthOpts+0xca>
        {
            goto fail;
        }
    }
    if (return_parse_end)
 80014ca:	687b      	ldr	r3, [r7, #4]
 80014cc:	2b00      	cmp	r3, #0
 80014ce:	d004      	beq.n	80014da <cJSON_ParseWithLengthOpts+0xba>
    {
        *return_parse_end = (const char*)buffer_at_offset(&buffer);
 80014d0:	69ba      	ldr	r2, [r7, #24]
 80014d2:	6a3b      	ldr	r3, [r7, #32]
 80014d4:	441a      	add	r2, r3
 80014d6:	687b      	ldr	r3, [r7, #4]
 80014d8:	601a      	str	r2, [r3, #0]
    }

    return item;
 80014da:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 80014dc:	e031      	b.n	8001542 <cJSON_ParseWithLengthOpts+0x122>
        goto fail;
 80014de:	bf00      	nop
 80014e0:	e004      	b.n	80014ec <cJSON_ParseWithLengthOpts+0xcc>
        goto fail;
 80014e2:	bf00      	nop
 80014e4:	e002      	b.n	80014ec <cJSON_ParseWithLengthOpts+0xcc>
        goto fail;
 80014e6:	bf00      	nop
 80014e8:	e000      	b.n	80014ec <cJSON_ParseWithLengthOpts+0xcc>
            goto fail;
 80014ea:	bf00      	nop

fail:
    if (item != NULL)
 80014ec:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 80014ee:	2b00      	cmp	r3, #0
 80014f0:	d002      	beq.n	80014f8 <cJSON_ParseWithLengthOpts+0xd8>
    {
        cJSON_Delete(item);
 80014f2:	6b78      	ldr	r0, [r7, #52]	@ 0x34
 80014f4:	f7ff fb4a 	bl	8000b8c <cJSON_Delete>
    }

    if (value != NULL)
 80014f8:	68fb      	ldr	r3, [r7, #12]
 80014fa:	2b00      	cmp	r3, #0
 80014fc:	d020      	beq.n	8001540 <cJSON_ParseWithLengthOpts+0x120>
    {
        error local_error;
        local_error.json = (const unsigned char*)value;
 80014fe:	68fb      	ldr	r3, [r7, #12]
 8001500:	613b      	str	r3, [r7, #16]
        local_error.position = 0;
 8001502:	2300      	movs	r3, #0
 8001504:	617b      	str	r3, [r7, #20]

        if (buffer.offset < buffer.length)
 8001506:	6a3a      	ldr	r2, [r7, #32]
 8001508:	69fb      	ldr	r3, [r7, #28]
 800150a:	429a      	cmp	r2, r3
 800150c:	d202      	bcs.n	8001514 <cJSON_ParseWithLengthOpts+0xf4>
        {
            local_error.position = buffer.offset;
 800150e:	6a3b      	ldr	r3, [r7, #32]
 8001510:	617b      	str	r3, [r7, #20]
 8001512:	e005      	b.n	8001520 <cJSON_ParseWithLengthOpts+0x100>
        }
        else if (buffer.length > 0)
 8001514:	69fb      	ldr	r3, [r7, #28]
 8001516:	2b00      	cmp	r3, #0
 8001518:	d002      	beq.n	8001520 <cJSON_ParseWithLengthOpts+0x100>
        {
            local_error.position = buffer.length - 1;
 800151a:	69fb      	ldr	r3, [r7, #28]
 800151c:	3b01      	subs	r3, #1
 800151e:	617b      	str	r3, [r7, #20]
        }

        if (return_parse_end != NULL)
 8001520:	687b      	ldr	r3, [r7, #4]
 8001522:	2b00      	cmp	r3, #0
 8001524:	d004      	beq.n	8001530 <cJSON_ParseWithLengthOpts+0x110>
        {
            *return_parse_end = (const char*)local_error.json + local_error.position;
 8001526:	693a      	ldr	r2, [r7, #16]
 8001528:	697b      	ldr	r3, [r7, #20]
 800152a:	441a      	add	r2, r3
 800152c:	687b      	ldr	r3, [r7, #4]
 800152e:	601a      	str	r2, [r3, #0]
        }

        global_error = local_error;
 8001530:	4b06      	ldr	r3, [pc, #24]	@ (800154c <cJSON_ParseWithLengthOpts+0x12c>)
 8001532:	461a      	mov	r2, r3
 8001534:	f107 0310 	add.w	r3, r7, #16
 8001538:	e893 0003 	ldmia.w	r3, {r0, r1}
 800153c:	e882 0003 	stmia.w	r2, {r0, r1}
    }

    return NULL;
 8001540:	2300      	movs	r3, #0
}
 8001542:	4618      	mov	r0, r3
 8001544:	3738      	adds	r7, #56	@ 0x38
 8001546:	46bd      	mov	sp, r7
 8001548:	bd80      	pop	{r7, pc}
 800154a:	bf00      	nop
 800154c:	24000240 	.word	0x24000240
 8001550:	24000000 	.word	0x24000000

08001554 <cJSON_Parse>:

/* Default options for cJSON_Parse */
CJSON_PUBLIC(cJSON *) cJSON_Parse(const char *value)
{
 8001554:	b580      	push	{r7, lr}
 8001556:	b082      	sub	sp, #8
 8001558:	af00      	add	r7, sp, #0
 800155a:	6078      	str	r0, [r7, #4]
    return cJSON_ParseWithOpts(value, 0, 0);
 800155c:	2200      	movs	r2, #0
 800155e:	2100      	movs	r1, #0
 8001560:	6878      	ldr	r0, [r7, #4]
 8001562:	f7ff ff41 	bl	80013e8 <cJSON_ParseWithOpts>
 8001566:	4603      	mov	r3, r0
}
 8001568:	4618      	mov	r0, r3
 800156a:	3708      	adds	r7, #8
 800156c:	46bd      	mov	sp, r7
 800156e:	bd80      	pop	{r7, pc}

08001570 <parse_value>:
    return print_value(item, &p);
}

/* Parser core - when encountering text, process appropriately. */
static cJSON_bool parse_value(cJSON * const item, parse_buffer * const input_buffer)
{
 8001570:	b580      	push	{r7, lr}
 8001572:	b082      	sub	sp, #8
 8001574:	af00      	add	r7, sp, #0
 8001576:	6078      	str	r0, [r7, #4]
 8001578:	6039      	str	r1, [r7, #0]
    if ((input_buffer == NULL) || (input_buffer->content == NULL))
 800157a:	683b      	ldr	r3, [r7, #0]
 800157c:	2b00      	cmp	r3, #0
 800157e:	d003      	beq.n	8001588 <parse_value+0x18>
 8001580:	683b      	ldr	r3, [r7, #0]
 8001582:	681b      	ldr	r3, [r3, #0]
 8001584:	2b00      	cmp	r3, #0
 8001586:	d101      	bne.n	800158c <parse_value+0x1c>
    {
        return false; /* no input */
 8001588:	2300      	movs	r3, #0
 800158a:	e0d2      	b.n	8001732 <parse_value+0x1c2>
    }

    /* parse the different types of values */
    /* null */
    if (can_read(input_buffer, 4) && (strncmp((const char*)buffer_at_offset(input_buffer), "null", 4) == 0))
 800158c:	683b      	ldr	r3, [r7, #0]
 800158e:	2b00      	cmp	r3, #0
 8001590:	d01d      	beq.n	80015ce <parse_value+0x5e>
 8001592:	683b      	ldr	r3, [r7, #0]
 8001594:	689b      	ldr	r3, [r3, #8]
 8001596:	1d1a      	adds	r2, r3, #4
 8001598:	683b      	ldr	r3, [r7, #0]
 800159a:	685b      	ldr	r3, [r3, #4]
 800159c:	429a      	cmp	r2, r3
 800159e:	d816      	bhi.n	80015ce <parse_value+0x5e>
 80015a0:	683b      	ldr	r3, [r7, #0]
 80015a2:	681a      	ldr	r2, [r3, #0]
 80015a4:	683b      	ldr	r3, [r7, #0]
 80015a6:	689b      	ldr	r3, [r3, #8]
 80015a8:	4413      	add	r3, r2
 80015aa:	2204      	movs	r2, #4
 80015ac:	4963      	ldr	r1, [pc, #396]	@ (800173c <parse_value+0x1cc>)
 80015ae:	4618      	mov	r0, r3
 80015b0:	f028 ff9e 	bl	802a4f0 <strncmp>
 80015b4:	4603      	mov	r3, r0
 80015b6:	2b00      	cmp	r3, #0
 80015b8:	d109      	bne.n	80015ce <parse_value+0x5e>
    {
        item->type = cJSON_NULL;
 80015ba:	687b      	ldr	r3, [r7, #4]
 80015bc:	2204      	movs	r2, #4
 80015be:	60da      	str	r2, [r3, #12]
        input_buffer->offset += 4;
 80015c0:	683b      	ldr	r3, [r7, #0]
 80015c2:	689b      	ldr	r3, [r3, #8]
 80015c4:	1d1a      	adds	r2, r3, #4
 80015c6:	683b      	ldr	r3, [r7, #0]
 80015c8:	609a      	str	r2, [r3, #8]
        return true;
 80015ca:	2301      	movs	r3, #1
 80015cc:	e0b1      	b.n	8001732 <parse_value+0x1c2>
    }
    /* false */
    if (can_read(input_buffer, 5) && (strncmp((const char*)buffer_at_offset(input_buffer), "false", 5) == 0))
 80015ce:	683b      	ldr	r3, [r7, #0]
 80015d0:	2b00      	cmp	r3, #0
 80015d2:	d01d      	beq.n	8001610 <parse_value+0xa0>
 80015d4:	683b      	ldr	r3, [r7, #0]
 80015d6:	689b      	ldr	r3, [r3, #8]
 80015d8:	1d5a      	adds	r2, r3, #5
 80015da:	683b      	ldr	r3, [r7, #0]
 80015dc:	685b      	ldr	r3, [r3, #4]
 80015de:	429a      	cmp	r2, r3
 80015e0:	d816      	bhi.n	8001610 <parse_value+0xa0>
 80015e2:	683b      	ldr	r3, [r7, #0]
 80015e4:	681a      	ldr	r2, [r3, #0]
 80015e6:	683b      	ldr	r3, [r7, #0]
 80015e8:	689b      	ldr	r3, [r3, #8]
 80015ea:	4413      	add	r3, r2
 80015ec:	2205      	movs	r2, #5
 80015ee:	4954      	ldr	r1, [pc, #336]	@ (8001740 <parse_value+0x1d0>)
 80015f0:	4618      	mov	r0, r3
 80015f2:	f028 ff7d 	bl	802a4f0 <strncmp>
 80015f6:	4603      	mov	r3, r0
 80015f8:	2b00      	cmp	r3, #0
 80015fa:	d109      	bne.n	8001610 <parse_value+0xa0>
    {
        item->type = cJSON_False;
 80015fc:	687b      	ldr	r3, [r7, #4]
 80015fe:	2201      	movs	r2, #1
 8001600:	60da      	str	r2, [r3, #12]
        input_buffer->offset += 5;
 8001602:	683b      	ldr	r3, [r7, #0]
 8001604:	689b      	ldr	r3, [r3, #8]
 8001606:	1d5a      	adds	r2, r3, #5
 8001608:	683b      	ldr	r3, [r7, #0]
 800160a:	609a      	str	r2, [r3, #8]
        return true;
 800160c:	2301      	movs	r3, #1
 800160e:	e090      	b.n	8001732 <parse_value+0x1c2>
    }
    /* true */
    if (can_read(input_buffer, 4) && (strncmp((const char*)buffer_at_offset(input_buffer), "true", 4) == 0))
 8001610:	683b      	ldr	r3, [r7, #0]
 8001612:	2b00      	cmp	r3, #0
 8001614:	d020      	beq.n	8001658 <parse_value+0xe8>
 8001616:	683b      	ldr	r3, [r7, #0]
 8001618:	689b      	ldr	r3, [r3, #8]
 800161a:	1d1a      	adds	r2, r3, #4
 800161c:	683b      	ldr	r3, [r7, #0]
 800161e:	685b      	ldr	r3, [r3, #4]
 8001620:	429a      	cmp	r2, r3
 8001622:	d819      	bhi.n	8001658 <parse_value+0xe8>
 8001624:	683b      	ldr	r3, [r7, #0]
 8001626:	681a      	ldr	r2, [r3, #0]
 8001628:	683b      	ldr	r3, [r7, #0]
 800162a:	689b      	ldr	r3, [r3, #8]
 800162c:	4413      	add	r3, r2
 800162e:	2204      	movs	r2, #4
 8001630:	4944      	ldr	r1, [pc, #272]	@ (8001744 <parse_value+0x1d4>)
 8001632:	4618      	mov	r0, r3
 8001634:	f028 ff5c 	bl	802a4f0 <strncmp>
 8001638:	4603      	mov	r3, r0
 800163a:	2b00      	cmp	r3, #0
 800163c:	d10c      	bne.n	8001658 <parse_value+0xe8>
    {
        item->type = cJSON_True;
 800163e:	687b      	ldr	r3, [r7, #4]
 8001640:	2202      	movs	r2, #2
 8001642:	60da      	str	r2, [r3, #12]
        item->valueint = 1;
 8001644:	687b      	ldr	r3, [r7, #4]
 8001646:	2201      	movs	r2, #1
 8001648:	615a      	str	r2, [r3, #20]
        input_buffer->offset += 4;
 800164a:	683b      	ldr	r3, [r7, #0]
 800164c:	689b      	ldr	r3, [r3, #8]
 800164e:	1d1a      	adds	r2, r3, #4
 8001650:	683b      	ldr	r3, [r7, #0]
 8001652:	609a      	str	r2, [r3, #8]
        return true;
 8001654:	2301      	movs	r3, #1
 8001656:	e06c      	b.n	8001732 <parse_value+0x1c2>
    }
    /* string */
    if (can_access_at_index(input_buffer, 0) && (buffer_at_offset(input_buffer)[0] == '\"'))
 8001658:	683b      	ldr	r3, [r7, #0]
 800165a:	2b00      	cmp	r3, #0
 800165c:	d013      	beq.n	8001686 <parse_value+0x116>
 800165e:	683b      	ldr	r3, [r7, #0]
 8001660:	689a      	ldr	r2, [r3, #8]
 8001662:	683b      	ldr	r3, [r7, #0]
 8001664:	685b      	ldr	r3, [r3, #4]
 8001666:	429a      	cmp	r2, r3
 8001668:	d20d      	bcs.n	8001686 <parse_value+0x116>
 800166a:	683b      	ldr	r3, [r7, #0]
 800166c:	681a      	ldr	r2, [r3, #0]
 800166e:	683b      	ldr	r3, [r7, #0]
 8001670:	689b      	ldr	r3, [r3, #8]
 8001672:	4413      	add	r3, r2
 8001674:	781b      	ldrb	r3, [r3, #0]
 8001676:	2b22      	cmp	r3, #34	@ 0x22
 8001678:	d105      	bne.n	8001686 <parse_value+0x116>
    {
        return parse_string(item, input_buffer);
 800167a:	6839      	ldr	r1, [r7, #0]
 800167c:	6878      	ldr	r0, [r7, #4]
 800167e:	f7ff fcf7 	bl	8001070 <parse_string>
 8001682:	4603      	mov	r3, r0
 8001684:	e055      	b.n	8001732 <parse_value+0x1c2>
    }
    /* number */
    if (can_access_at_index(input_buffer, 0) && ((buffer_at_offset(input_buffer)[0] == '-') || ((buffer_at_offset(input_buffer)[0] >= '0') && (buffer_at_offset(input_buffer)[0] <= '9'))))
 8001686:	683b      	ldr	r3, [r7, #0]
 8001688:	2b00      	cmp	r3, #0
 800168a:	d023      	beq.n	80016d4 <parse_value+0x164>
 800168c:	683b      	ldr	r3, [r7, #0]
 800168e:	689a      	ldr	r2, [r3, #8]
 8001690:	683b      	ldr	r3, [r7, #0]
 8001692:	685b      	ldr	r3, [r3, #4]
 8001694:	429a      	cmp	r2, r3
 8001696:	d21d      	bcs.n	80016d4 <parse_value+0x164>
 8001698:	683b      	ldr	r3, [r7, #0]
 800169a:	681a      	ldr	r2, [r3, #0]
 800169c:	683b      	ldr	r3, [r7, #0]
 800169e:	689b      	ldr	r3, [r3, #8]
 80016a0:	4413      	add	r3, r2
 80016a2:	781b      	ldrb	r3, [r3, #0]
 80016a4:	2b2d      	cmp	r3, #45	@ 0x2d
 80016a6:	d00f      	beq.n	80016c8 <parse_value+0x158>
 80016a8:	683b      	ldr	r3, [r7, #0]
 80016aa:	681a      	ldr	r2, [r3, #0]
 80016ac:	683b      	ldr	r3, [r7, #0]
 80016ae:	689b      	ldr	r3, [r3, #8]
 80016b0:	4413      	add	r3, r2
 80016b2:	781b      	ldrb	r3, [r3, #0]
 80016b4:	2b2f      	cmp	r3, #47	@ 0x2f
 80016b6:	d90d      	bls.n	80016d4 <parse_value+0x164>
 80016b8:	683b      	ldr	r3, [r7, #0]
 80016ba:	681a      	ldr	r2, [r3, #0]
 80016bc:	683b      	ldr	r3, [r7, #0]
 80016be:	689b      	ldr	r3, [r3, #8]
 80016c0:	4413      	add	r3, r2
 80016c2:	781b      	ldrb	r3, [r3, #0]
 80016c4:	2b39      	cmp	r3, #57	@ 0x39
 80016c6:	d805      	bhi.n	80016d4 <parse_value+0x164>
    {
        return parse_number(item, input_buffer);
 80016c8:	6839      	ldr	r1, [r7, #0]
 80016ca:	6878      	ldr	r0, [r7, #4]
 80016cc:	f7ff fab8 	bl	8000c40 <parse_number>
 80016d0:	4603      	mov	r3, r0
 80016d2:	e02e      	b.n	8001732 <parse_value+0x1c2>
    }
    /* array */
    if (can_access_at_index(input_buffer, 0) && (buffer_at_offset(input_buffer)[0] == '['))
 80016d4:	683b      	ldr	r3, [r7, #0]
 80016d6:	2b00      	cmp	r3, #0
 80016d8:	d013      	beq.n	8001702 <parse_value+0x192>
 80016da:	683b      	ldr	r3, [r7, #0]
 80016dc:	689a      	ldr	r2, [r3, #8]
 80016de:	683b      	ldr	r3, [r7, #0]
 80016e0:	685b      	ldr	r3, [r3, #4]
 80016e2:	429a      	cmp	r2, r3
 80016e4:	d20d      	bcs.n	8001702 <parse_value+0x192>
 80016e6:	683b      	ldr	r3, [r7, #0]
 80016e8:	681a      	ldr	r2, [r3, #0]
 80016ea:	683b      	ldr	r3, [r7, #0]
 80016ec:	689b      	ldr	r3, [r3, #8]
 80016ee:	4413      	add	r3, r2
 80016f0:	781b      	ldrb	r3, [r3, #0]
 80016f2:	2b5b      	cmp	r3, #91	@ 0x5b
 80016f4:	d105      	bne.n	8001702 <parse_value+0x192>
    {
        return parse_array(item, input_buffer);
 80016f6:	6839      	ldr	r1, [r7, #0]
 80016f8:	6878      	ldr	r0, [r7, #4]
 80016fa:	f000 f825 	bl	8001748 <parse_array>
 80016fe:	4603      	mov	r3, r0
 8001700:	e017      	b.n	8001732 <parse_value+0x1c2>
    }
    /* object */
    if (can_access_at_index(input_buffer, 0) && (buffer_at_offset(input_buffer)[0] == '{'))
 8001702:	683b      	ldr	r3, [r7, #0]
 8001704:	2b00      	cmp	r3, #0
 8001706:	d013      	beq.n	8001730 <parse_value+0x1c0>
 8001708:	683b      	ldr	r3, [r7, #0]
 800170a:	689a      	ldr	r2, [r3, #8]
 800170c:	683b      	ldr	r3, [r7, #0]
 800170e:	685b      	ldr	r3, [r3, #4]
 8001710:	429a      	cmp	r2, r3
 8001712:	d20d      	bcs.n	8001730 <parse_value+0x1c0>
 8001714:	683b      	ldr	r3, [r7, #0]
 8001716:	681a      	ldr	r2, [r3, #0]
 8001718:	683b      	ldr	r3, [r7, #0]
 800171a:	689b      	ldr	r3, [r3, #8]
 800171c:	4413      	add	r3, r2
 800171e:	781b      	ldrb	r3, [r3, #0]
 8001720:	2b7b      	cmp	r3, #123	@ 0x7b
 8001722:	d105      	bne.n	8001730 <parse_value+0x1c0>
    {
        return parse_object(item, input_buffer);
 8001724:	6839      	ldr	r1, [r7, #0]
 8001726:	6878      	ldr	r0, [r7, #4]
 8001728:	f000 f8d2 	bl	80018d0 <parse_object>
 800172c:	4603      	mov	r3, r0
 800172e:	e000      	b.n	8001732 <parse_value+0x1c2>
    }

    return false;
 8001730:	2300      	movs	r3, #0
}
 8001732:	4618      	mov	r0, r3
 8001734:	3708      	adds	r7, #8
 8001736:	46bd      	mov	sp, r7
 8001738:	bd80      	pop	{r7, pc}
 800173a:	bf00      	nop
 800173c:	0802cc4c 	.word	0x0802cc4c
 8001740:	0802cc7c 	.word	0x0802cc7c
 8001744:	0802cc84 	.word	0x0802cc84

08001748 <parse_array>:
    }
}

/* Build an array from input text. */
static cJSON_bool parse_array(cJSON * const item, parse_buffer * const input_buffer)
{
 8001748:	b580      	push	{r7, lr}
 800174a:	b086      	sub	sp, #24
 800174c:	af00      	add	r7, sp, #0
 800174e:	6078      	str	r0, [r7, #4]
 8001750:	6039      	str	r1, [r7, #0]
    cJSON *head = NULL; /* head of the linked list */
 8001752:	2300      	movs	r3, #0
 8001754:	617b      	str	r3, [r7, #20]
    cJSON *current_item = NULL;
 8001756:	2300      	movs	r3, #0
 8001758:	613b      	str	r3, [r7, #16]

    if (input_buffer->depth >= CJSON_NESTING_LIMIT)
 800175a:	683b      	ldr	r3, [r7, #0]
 800175c:	68db      	ldr	r3, [r3, #12]
 800175e:	f5b3 7f7a 	cmp.w	r3, #1000	@ 0x3e8
 8001762:	d301      	bcc.n	8001768 <parse_array+0x20>
    {
        return false; /* to deeply nested */
 8001764:	2300      	movs	r3, #0
 8001766:	e0af      	b.n	80018c8 <parse_array+0x180>
    }
    input_buffer->depth++;
 8001768:	683b      	ldr	r3, [r7, #0]
 800176a:	68db      	ldr	r3, [r3, #12]
 800176c:	1c5a      	adds	r2, r3, #1
 800176e:	683b      	ldr	r3, [r7, #0]
 8001770:	60da      	str	r2, [r3, #12]

    if (buffer_at_offset(input_buffer)[0] != '[')
 8001772:	683b      	ldr	r3, [r7, #0]
 8001774:	681a      	ldr	r2, [r3, #0]
 8001776:	683b      	ldr	r3, [r7, #0]
 8001778:	689b      	ldr	r3, [r3, #8]
 800177a:	4413      	add	r3, r2
 800177c:	781b      	ldrb	r3, [r3, #0]
 800177e:	2b5b      	cmp	r3, #91	@ 0x5b
 8001780:	f040 8094 	bne.w	80018ac <parse_array+0x164>
    {
        /* not an array */
        goto fail;
    }

    input_buffer->offset++;
 8001784:	683b      	ldr	r3, [r7, #0]
 8001786:	689b      	ldr	r3, [r3, #8]
 8001788:	1c5a      	adds	r2, r3, #1
 800178a:	683b      	ldr	r3, [r7, #0]
 800178c:	609a      	str	r2, [r3, #8]
    buffer_skip_whitespace(input_buffer);
 800178e:	6838      	ldr	r0, [r7, #0]
 8001790:	f7ff fdb6 	bl	8001300 <buffer_skip_whitespace>
    if (can_access_at_index(input_buffer, 0) && (buffer_at_offset(input_buffer)[0] == ']'))
 8001794:	683b      	ldr	r3, [r7, #0]
 8001796:	2b00      	cmp	r3, #0
 8001798:	d00d      	beq.n	80017b6 <parse_array+0x6e>
 800179a:	683b      	ldr	r3, [r7, #0]
 800179c:	689a      	ldr	r2, [r3, #8]
 800179e:	683b      	ldr	r3, [r7, #0]
 80017a0:	685b      	ldr	r3, [r3, #4]
 80017a2:	429a      	cmp	r2, r3
 80017a4:	d207      	bcs.n	80017b6 <parse_array+0x6e>
 80017a6:	683b      	ldr	r3, [r7, #0]
 80017a8:	681a      	ldr	r2, [r3, #0]
 80017aa:	683b      	ldr	r3, [r7, #0]
 80017ac:	689b      	ldr	r3, [r3, #8]
 80017ae:	4413      	add	r3, r2
 80017b0:	781b      	ldrb	r3, [r3, #0]
 80017b2:	2b5d      	cmp	r3, #93	@ 0x5d
 80017b4:	d061      	beq.n	800187a <parse_array+0x132>
        /* empty array */
        goto success;
    }

    /* check if we skipped to the end of the buffer */
    if (cannot_access_at_index(input_buffer, 0))
 80017b6:	683b      	ldr	r3, [r7, #0]
 80017b8:	2b00      	cmp	r3, #0
 80017ba:	d005      	beq.n	80017c8 <parse_array+0x80>
 80017bc:	683b      	ldr	r3, [r7, #0]
 80017be:	689a      	ldr	r2, [r3, #8]
 80017c0:	683b      	ldr	r3, [r7, #0]
 80017c2:	685b      	ldr	r3, [r3, #4]
 80017c4:	429a      	cmp	r2, r3
 80017c6:	d305      	bcc.n	80017d4 <parse_array+0x8c>
    {
        input_buffer->offset--;
 80017c8:	683b      	ldr	r3, [r7, #0]
 80017ca:	689b      	ldr	r3, [r3, #8]
 80017cc:	1e5a      	subs	r2, r3, #1
 80017ce:	683b      	ldr	r3, [r7, #0]
 80017d0:	609a      	str	r2, [r3, #8]
        goto fail;
 80017d2:	e072      	b.n	80018ba <parse_array+0x172>
    }

    /* step back to character in front of the first element */
    input_buffer->offset--;
 80017d4:	683b      	ldr	r3, [r7, #0]
 80017d6:	689b      	ldr	r3, [r3, #8]
 80017d8:	1e5a      	subs	r2, r3, #1
 80017da:	683b      	ldr	r3, [r7, #0]
 80017dc:	609a      	str	r2, [r3, #8]
    /* loop through the comma separated array elements */
    do
    {
        /* allocate next item */
        cJSON *new_item = cJSON_New_Item(&(input_buffer->hooks));
 80017de:	683b      	ldr	r3, [r7, #0]
 80017e0:	3310      	adds	r3, #16
 80017e2:	4618      	mov	r0, r3
 80017e4:	f7ff f9bc 	bl	8000b60 <cJSON_New_Item>
 80017e8:	60f8      	str	r0, [r7, #12]
        if (new_item == NULL)
 80017ea:	68fb      	ldr	r3, [r7, #12]
 80017ec:	2b00      	cmp	r3, #0
 80017ee:	d05f      	beq.n	80018b0 <parse_array+0x168>
        {
            goto fail; /* allocation failure */
        }

        /* attach next item to list */
        if (head == NULL)
 80017f0:	697b      	ldr	r3, [r7, #20]
 80017f2:	2b00      	cmp	r3, #0
 80017f4:	d104      	bne.n	8001800 <parse_array+0xb8>
        {
            /* start the linked list */
            current_item = head = new_item;
 80017f6:	68fb      	ldr	r3, [r7, #12]
 80017f8:	617b      	str	r3, [r7, #20]
 80017fa:	697b      	ldr	r3, [r7, #20]
 80017fc:	613b      	str	r3, [r7, #16]
 80017fe:	e007      	b.n	8001810 <parse_array+0xc8>
        }
        else
        {
            /* add to the end and advance */
            current_item->next = new_item;
 8001800:	693b      	ldr	r3, [r7, #16]
 8001802:	68fa      	ldr	r2, [r7, #12]
 8001804:	601a      	str	r2, [r3, #0]
            new_item->prev = current_item;
 8001806:	68fb      	ldr	r3, [r7, #12]
 8001808:	693a      	ldr	r2, [r7, #16]
 800180a:	605a      	str	r2, [r3, #4]
            current_item = new_item;
 800180c:	68fb      	ldr	r3, [r7, #12]
 800180e:	613b      	str	r3, [r7, #16]
        }

        /* parse next value */
        input_buffer->offset++;
 8001810:	683b      	ldr	r3, [r7, #0]
 8001812:	689b      	ldr	r3, [r3, #8]
 8001814:	1c5a      	adds	r2, r3, #1
 8001816:	683b      	ldr	r3, [r7, #0]
 8001818:	609a      	str	r2, [r3, #8]
        buffer_skip_whitespace(input_buffer);
 800181a:	6838      	ldr	r0, [r7, #0]
 800181c:	f7ff fd70 	bl	8001300 <buffer_skip_whitespace>
        if (!parse_value(current_item, input_buffer))
 8001820:	6839      	ldr	r1, [r7, #0]
 8001822:	6938      	ldr	r0, [r7, #16]
 8001824:	f7ff fea4 	bl	8001570 <parse_value>
 8001828:	4603      	mov	r3, r0
 800182a:	2b00      	cmp	r3, #0
 800182c:	d042      	beq.n	80018b4 <parse_array+0x16c>
        {
            goto fail; /* failed to parse value */
        }
        buffer_skip_whitespace(input_buffer);
 800182e:	6838      	ldr	r0, [r7, #0]
 8001830:	f7ff fd66 	bl	8001300 <buffer_skip_whitespace>
    }
    while (can_access_at_index(input_buffer, 0) && (buffer_at_offset(input_buffer)[0] == ','));
 8001834:	683b      	ldr	r3, [r7, #0]
 8001836:	2b00      	cmp	r3, #0
 8001838:	d00d      	beq.n	8001856 <parse_array+0x10e>
 800183a:	683b      	ldr	r3, [r7, #0]
 800183c:	689a      	ldr	r2, [r3, #8]
 800183e:	683b      	ldr	r3, [r7, #0]
 8001840:	685b      	ldr	r3, [r3, #4]
 8001842:	429a      	cmp	r2, r3
 8001844:	d207      	bcs.n	8001856 <parse_array+0x10e>
 8001846:	683b      	ldr	r3, [r7, #0]
 8001848:	681a      	ldr	r2, [r3, #0]
 800184a:	683b      	ldr	r3, [r7, #0]
 800184c:	689b      	ldr	r3, [r3, #8]
 800184e:	4413      	add	r3, r2
 8001850:	781b      	ldrb	r3, [r3, #0]
 8001852:	2b2c      	cmp	r3, #44	@ 0x2c
 8001854:	d0c3      	beq.n	80017de <parse_array+0x96>

    if (cannot_access_at_index(input_buffer, 0) || buffer_at_offset(input_buffer)[0] != ']')
 8001856:	683b      	ldr	r3, [r7, #0]
 8001858:	2b00      	cmp	r3, #0
 800185a:	d02d      	beq.n	80018b8 <parse_array+0x170>
 800185c:	683b      	ldr	r3, [r7, #0]
 800185e:	689a      	ldr	r2, [r3, #8]
 8001860:	683b      	ldr	r3, [r7, #0]
 8001862:	685b      	ldr	r3, [r3, #4]
 8001864:	429a      	cmp	r2, r3
 8001866:	d227      	bcs.n	80018b8 <parse_array+0x170>
 8001868:	683b      	ldr	r3, [r7, #0]
 800186a:	681a      	ldr	r2, [r3, #0]
 800186c:	683b      	ldr	r3, [r7, #0]
 800186e:	689b      	ldr	r3, [r3, #8]
 8001870:	4413      	add	r3, r2
 8001872:	781b      	ldrb	r3, [r3, #0]
 8001874:	2b5d      	cmp	r3, #93	@ 0x5d
 8001876:	d11f      	bne.n	80018b8 <parse_array+0x170>
    {
        goto fail; /* expected end of array */
    }

success:
 8001878:	e000      	b.n	800187c <parse_array+0x134>
        goto success;
 800187a:	bf00      	nop
    input_buffer->depth--;
 800187c:	683b      	ldr	r3, [r7, #0]
 800187e:	68db      	ldr	r3, [r3, #12]
 8001880:	1e5a      	subs	r2, r3, #1
 8001882:	683b      	ldr	r3, [r7, #0]
 8001884:	60da      	str	r2, [r3, #12]

    if (head != NULL) {
 8001886:	697b      	ldr	r3, [r7, #20]
 8001888:	2b00      	cmp	r3, #0
 800188a:	d002      	beq.n	8001892 <parse_array+0x14a>
        head->prev = current_item;
 800188c:	697b      	ldr	r3, [r7, #20]
 800188e:	693a      	ldr	r2, [r7, #16]
 8001890:	605a      	str	r2, [r3, #4]
    }

    item->type = cJSON_Array;
 8001892:	687b      	ldr	r3, [r7, #4]
 8001894:	2220      	movs	r2, #32
 8001896:	60da      	str	r2, [r3, #12]
    item->child = head;
 8001898:	687b      	ldr	r3, [r7, #4]
 800189a:	697a      	ldr	r2, [r7, #20]
 800189c:	609a      	str	r2, [r3, #8]

    input_buffer->offset++;
 800189e:	683b      	ldr	r3, [r7, #0]
 80018a0:	689b      	ldr	r3, [r3, #8]
 80018a2:	1c5a      	adds	r2, r3, #1
 80018a4:	683b      	ldr	r3, [r7, #0]
 80018a6:	609a      	str	r2, [r3, #8]

    return true;
 80018a8:	2301      	movs	r3, #1
 80018aa:	e00d      	b.n	80018c8 <parse_array+0x180>
        goto fail;
 80018ac:	bf00      	nop
 80018ae:	e004      	b.n	80018ba <parse_array+0x172>
            goto fail; /* allocation failure */
 80018b0:	bf00      	nop
 80018b2:	e002      	b.n	80018ba <parse_array+0x172>
            goto fail; /* failed to parse value */
 80018b4:	bf00      	nop
 80018b6:	e000      	b.n	80018ba <parse_array+0x172>
        goto fail; /* expected end of array */
 80018b8:	bf00      	nop

fail:
    if (head != NULL)
 80018ba:	697b      	ldr	r3, [r7, #20]
 80018bc:	2b00      	cmp	r3, #0
 80018be:	d002      	beq.n	80018c6 <parse_array+0x17e>
    {
        cJSON_Delete(head);
 80018c0:	6978      	ldr	r0, [r7, #20]
 80018c2:	f7ff f963 	bl	8000b8c <cJSON_Delete>
    }

    return false;
 80018c6:	2300      	movs	r3, #0
}
 80018c8:	4618      	mov	r0, r3
 80018ca:	3718      	adds	r7, #24
 80018cc:	46bd      	mov	sp, r7
 80018ce:	bd80      	pop	{r7, pc}

080018d0 <parse_object>:
    return true;
}

/* Build an object from the text. */
static cJSON_bool parse_object(cJSON * const item, parse_buffer * const input_buffer)
{
 80018d0:	b580      	push	{r7, lr}
 80018d2:	b086      	sub	sp, #24
 80018d4:	af00      	add	r7, sp, #0
 80018d6:	6078      	str	r0, [r7, #4]
 80018d8:	6039      	str	r1, [r7, #0]
    cJSON *head = NULL; /* linked list head */
 80018da:	2300      	movs	r3, #0
 80018dc:	617b      	str	r3, [r7, #20]
    cJSON *current_item = NULL;
 80018de:	2300      	movs	r3, #0
 80018e0:	613b      	str	r3, [r7, #16]

    if (input_buffer->depth >= CJSON_NESTING_LIMIT)
 80018e2:	683b      	ldr	r3, [r7, #0]
 80018e4:	68db      	ldr	r3, [r3, #12]
 80018e6:	f5b3 7f7a 	cmp.w	r3, #1000	@ 0x3e8
 80018ea:	d301      	bcc.n	80018f0 <parse_object+0x20>
    {
        return false; /* to deeply nested */
 80018ec:	2300      	movs	r3, #0
 80018ee:	e0f7      	b.n	8001ae0 <parse_object+0x210>
    }
    input_buffer->depth++;
 80018f0:	683b      	ldr	r3, [r7, #0]
 80018f2:	68db      	ldr	r3, [r3, #12]
 80018f4:	1c5a      	adds	r2, r3, #1
 80018f6:	683b      	ldr	r3, [r7, #0]
 80018f8:	60da      	str	r2, [r3, #12]

    if (cannot_access_at_index(input_buffer, 0) || (buffer_at_offset(input_buffer)[0] != '{'))
 80018fa:	683b      	ldr	r3, [r7, #0]
 80018fc:	2b00      	cmp	r3, #0
 80018fe:	f000 80db 	beq.w	8001ab8 <parse_object+0x1e8>
 8001902:	683b      	ldr	r3, [r7, #0]
 8001904:	689a      	ldr	r2, [r3, #8]
 8001906:	683b      	ldr	r3, [r7, #0]
 8001908:	685b      	ldr	r3, [r3, #4]
 800190a:	429a      	cmp	r2, r3
 800190c:	f080 80d4 	bcs.w	8001ab8 <parse_object+0x1e8>
 8001910:	683b      	ldr	r3, [r7, #0]
 8001912:	681a      	ldr	r2, [r3, #0]
 8001914:	683b      	ldr	r3, [r7, #0]
 8001916:	689b      	ldr	r3, [r3, #8]
 8001918:	4413      	add	r3, r2
 800191a:	781b      	ldrb	r3, [r3, #0]
 800191c:	2b7b      	cmp	r3, #123	@ 0x7b
 800191e:	f040 80cb 	bne.w	8001ab8 <parse_object+0x1e8>
    {
        goto fail; /* not an object */
    }

    input_buffer->offset++;
 8001922:	683b      	ldr	r3, [r7, #0]
 8001924:	689b      	ldr	r3, [r3, #8]
 8001926:	1c5a      	adds	r2, r3, #1
 8001928:	683b      	ldr	r3, [r7, #0]
 800192a:	609a      	str	r2, [r3, #8]
    buffer_skip_whitespace(input_buffer);
 800192c:	6838      	ldr	r0, [r7, #0]
 800192e:	f7ff fce7 	bl	8001300 <buffer_skip_whitespace>
    if (can_access_at_index(input_buffer, 0) && (buffer_at_offset(input_buffer)[0] == '}'))
 8001932:	683b      	ldr	r3, [r7, #0]
 8001934:	2b00      	cmp	r3, #0
 8001936:	d00e      	beq.n	8001956 <parse_object+0x86>
 8001938:	683b      	ldr	r3, [r7, #0]
 800193a:	689a      	ldr	r2, [r3, #8]
 800193c:	683b      	ldr	r3, [r7, #0]
 800193e:	685b      	ldr	r3, [r3, #4]
 8001940:	429a      	cmp	r2, r3
 8001942:	d208      	bcs.n	8001956 <parse_object+0x86>
 8001944:	683b      	ldr	r3, [r7, #0]
 8001946:	681a      	ldr	r2, [r3, #0]
 8001948:	683b      	ldr	r3, [r7, #0]
 800194a:	689b      	ldr	r3, [r3, #8]
 800194c:	4413      	add	r3, r2
 800194e:	781b      	ldrb	r3, [r3, #0]
 8001950:	2b7d      	cmp	r3, #125	@ 0x7d
 8001952:	f000 8098 	beq.w	8001a86 <parse_object+0x1b6>
    {
        goto success; /* empty object */
    }

    /* check if we skipped to the end of the buffer */
    if (cannot_access_at_index(input_buffer, 0))
 8001956:	683b      	ldr	r3, [r7, #0]
 8001958:	2b00      	cmp	r3, #0
 800195a:	d005      	beq.n	8001968 <parse_object+0x98>
 800195c:	683b      	ldr	r3, [r7, #0]
 800195e:	689a      	ldr	r2, [r3, #8]
 8001960:	683b      	ldr	r3, [r7, #0]
 8001962:	685b      	ldr	r3, [r3, #4]
 8001964:	429a      	cmp	r2, r3
 8001966:	d305      	bcc.n	8001974 <parse_object+0xa4>
    {
        input_buffer->offset--;
 8001968:	683b      	ldr	r3, [r7, #0]
 800196a:	689b      	ldr	r3, [r3, #8]
 800196c:	1e5a      	subs	r2, r3, #1
 800196e:	683b      	ldr	r3, [r7, #0]
 8001970:	609a      	str	r2, [r3, #8]
        goto fail;
 8001972:	e0ae      	b.n	8001ad2 <parse_object+0x202>
    }

    /* step back to character in front of the first element */
    input_buffer->offset--;
 8001974:	683b      	ldr	r3, [r7, #0]
 8001976:	689b      	ldr	r3, [r3, #8]
 8001978:	1e5a      	subs	r2, r3, #1
 800197a:	683b      	ldr	r3, [r7, #0]
 800197c:	609a      	str	r2, [r3, #8]
    /* loop through the comma separated array elements */
    do
    {
        /* allocate next item */
        cJSON *new_item = cJSON_New_Item(&(input_buffer->hooks));
 800197e:	683b      	ldr	r3, [r7, #0]
 8001980:	3310      	adds	r3, #16
 8001982:	4618      	mov	r0, r3
 8001984:	f7ff f8ec 	bl	8000b60 <cJSON_New_Item>
 8001988:	60f8      	str	r0, [r7, #12]
        if (new_item == NULL)
 800198a:	68fb      	ldr	r3, [r7, #12]
 800198c:	2b00      	cmp	r3, #0
 800198e:	f000 8095 	beq.w	8001abc <parse_object+0x1ec>
        {
            goto fail; /* allocation failure */
        }

        /* attach next item to list */
        if (head == NULL)
 8001992:	697b      	ldr	r3, [r7, #20]
 8001994:	2b00      	cmp	r3, #0
 8001996:	d104      	bne.n	80019a2 <parse_object+0xd2>
        {
            /* start the linked list */
            current_item = head = new_item;
 8001998:	68fb      	ldr	r3, [r7, #12]
 800199a:	617b      	str	r3, [r7, #20]
 800199c:	697b      	ldr	r3, [r7, #20]
 800199e:	613b      	str	r3, [r7, #16]
 80019a0:	e007      	b.n	80019b2 <parse_object+0xe2>
        }
        else
        {
            /* add to the end and advance */
            current_item->next = new_item;
 80019a2:	693b      	ldr	r3, [r7, #16]
 80019a4:	68fa      	ldr	r2, [r7, #12]
 80019a6:	601a      	str	r2, [r3, #0]
            new_item->prev = current_item;
 80019a8:	68fb      	ldr	r3, [r7, #12]
 80019aa:	693a      	ldr	r2, [r7, #16]
 80019ac:	605a      	str	r2, [r3, #4]
            current_item = new_item;
 80019ae:	68fb      	ldr	r3, [r7, #12]
 80019b0:	613b      	str	r3, [r7, #16]
        }

        if (cannot_access_at_index(input_buffer, 1))
 80019b2:	683b      	ldr	r3, [r7, #0]
 80019b4:	2b00      	cmp	r3, #0
 80019b6:	f000 8083 	beq.w	8001ac0 <parse_object+0x1f0>
 80019ba:	683b      	ldr	r3, [r7, #0]
 80019bc:	689b      	ldr	r3, [r3, #8]
 80019be:	1c5a      	adds	r2, r3, #1
 80019c0:	683b      	ldr	r3, [r7, #0]
 80019c2:	685b      	ldr	r3, [r3, #4]
 80019c4:	429a      	cmp	r2, r3
 80019c6:	d27b      	bcs.n	8001ac0 <parse_object+0x1f0>
        {
            goto fail; /* nothing comes after the comma */
        }

        /* parse the name of the child */
        input_buffer->offset++;
 80019c8:	683b      	ldr	r3, [r7, #0]
 80019ca:	689b      	ldr	r3, [r3, #8]
 80019cc:	1c5a      	adds	r2, r3, #1
 80019ce:	683b      	ldr	r3, [r7, #0]
 80019d0:	609a      	str	r2, [r3, #8]
        buffer_skip_whitespace(input_buffer);
 80019d2:	6838      	ldr	r0, [r7, #0]
 80019d4:	f7ff fc94 	bl	8001300 <buffer_skip_whitespace>
        if (!parse_string(current_item, input_buffer))
 80019d8:	6839      	ldr	r1, [r7, #0]
 80019da:	6938      	ldr	r0, [r7, #16]
 80019dc:	f7ff fb48 	bl	8001070 <parse_string>
 80019e0:	4603      	mov	r3, r0
 80019e2:	2b00      	cmp	r3, #0
 80019e4:	d06e      	beq.n	8001ac4 <parse_object+0x1f4>
        {
            goto fail; /* failed to parse name */
        }
        buffer_skip_whitespace(input_buffer);
 80019e6:	6838      	ldr	r0, [r7, #0]
 80019e8:	f7ff fc8a 	bl	8001300 <buffer_skip_whitespace>

        /* swap valuestring and string, because we parsed the name */
        current_item->string = current_item->valuestring;
 80019ec:	693b      	ldr	r3, [r7, #16]
 80019ee:	691a      	ldr	r2, [r3, #16]
 80019f0:	693b      	ldr	r3, [r7, #16]
 80019f2:	621a      	str	r2, [r3, #32]
        current_item->valuestring = NULL;
 80019f4:	693b      	ldr	r3, [r7, #16]
 80019f6:	2200      	movs	r2, #0
 80019f8:	611a      	str	r2, [r3, #16]

        if (cannot_access_at_index(input_buffer, 0) || (buffer_at_offset(input_buffer)[0] != ':'))
 80019fa:	683b      	ldr	r3, [r7, #0]
 80019fc:	2b00      	cmp	r3, #0
 80019fe:	d063      	beq.n	8001ac8 <parse_object+0x1f8>
 8001a00:	683b      	ldr	r3, [r7, #0]
 8001a02:	689a      	ldr	r2, [r3, #8]
 8001a04:	683b      	ldr	r3, [r7, #0]
 8001a06:	685b      	ldr	r3, [r3, #4]
 8001a08:	429a      	cmp	r2, r3
 8001a0a:	d25d      	bcs.n	8001ac8 <parse_object+0x1f8>
 8001a0c:	683b      	ldr	r3, [r7, #0]
 8001a0e:	681a      	ldr	r2, [r3, #0]
 8001a10:	683b      	ldr	r3, [r7, #0]
 8001a12:	689b      	ldr	r3, [r3, #8]
 8001a14:	4413      	add	r3, r2
 8001a16:	781b      	ldrb	r3, [r3, #0]
 8001a18:	2b3a      	cmp	r3, #58	@ 0x3a
 8001a1a:	d155      	bne.n	8001ac8 <parse_object+0x1f8>
        {
            goto fail; /* invalid object */
        }

        /* parse the value */
        input_buffer->offset++;
 8001a1c:	683b      	ldr	r3, [r7, #0]
 8001a1e:	689b      	ldr	r3, [r3, #8]
 8001a20:	1c5a      	adds	r2, r3, #1
 8001a22:	683b      	ldr	r3, [r7, #0]
 8001a24:	609a      	str	r2, [r3, #8]
        buffer_skip_whitespace(input_buffer);
 8001a26:	6838      	ldr	r0, [r7, #0]
 8001a28:	f7ff fc6a 	bl	8001300 <buffer_skip_whitespace>
        if (!parse_value(current_item, input_buffer))
 8001a2c:	6839      	ldr	r1, [r7, #0]
 8001a2e:	6938      	ldr	r0, [r7, #16]
 8001a30:	f7ff fd9e 	bl	8001570 <parse_value>
 8001a34:	4603      	mov	r3, r0
 8001a36:	2b00      	cmp	r3, #0
 8001a38:	d048      	beq.n	8001acc <parse_object+0x1fc>
        {
            goto fail; /* failed to parse value */
        }
        buffer_skip_whitespace(input_buffer);
 8001a3a:	6838      	ldr	r0, [r7, #0]
 8001a3c:	f7ff fc60 	bl	8001300 <buffer_skip_whitespace>
    }
    while (can_access_at_index(input_buffer, 0) && (buffer_at_offset(input_buffer)[0] == ','));
 8001a40:	683b      	ldr	r3, [r7, #0]
 8001a42:	2b00      	cmp	r3, #0
 8001a44:	d00d      	beq.n	8001a62 <parse_object+0x192>
 8001a46:	683b      	ldr	r3, [r7, #0]
 8001a48:	689a      	ldr	r2, [r3, #8]
 8001a4a:	683b      	ldr	r3, [r7, #0]
 8001a4c:	685b      	ldr	r3, [r3, #4]
 8001a4e:	429a      	cmp	r2, r3
 8001a50:	d207      	bcs.n	8001a62 <parse_object+0x192>
 8001a52:	683b      	ldr	r3, [r7, #0]
 8001a54:	681a      	ldr	r2, [r3, #0]
 8001a56:	683b      	ldr	r3, [r7, #0]
 8001a58:	689b      	ldr	r3, [r3, #8]
 8001a5a:	4413      	add	r3, r2
 8001a5c:	781b      	ldrb	r3, [r3, #0]
 8001a5e:	2b2c      	cmp	r3, #44	@ 0x2c
 8001a60:	d08d      	beq.n	800197e <parse_object+0xae>

    if (cannot_access_at_index(input_buffer, 0) || (buffer_at_offset(input_buffer)[0] != '}'))
 8001a62:	683b      	ldr	r3, [r7, #0]
 8001a64:	2b00      	cmp	r3, #0
 8001a66:	d033      	beq.n	8001ad0 <parse_object+0x200>
 8001a68:	683b      	ldr	r3, [r7, #0]
 8001a6a:	689a      	ldr	r2, [r3, #8]
 8001a6c:	683b      	ldr	r3, [r7, #0]
 8001a6e:	685b      	ldr	r3, [r3, #4]
 8001a70:	429a      	cmp	r2, r3
 8001a72:	d22d      	bcs.n	8001ad0 <parse_object+0x200>
 8001a74:	683b      	ldr	r3, [r7, #0]
 8001a76:	681a      	ldr	r2, [r3, #0]
 8001a78:	683b      	ldr	r3, [r7, #0]
 8001a7a:	689b      	ldr	r3, [r3, #8]
 8001a7c:	4413      	add	r3, r2
 8001a7e:	781b      	ldrb	r3, [r3, #0]
 8001a80:	2b7d      	cmp	r3, #125	@ 0x7d
 8001a82:	d125      	bne.n	8001ad0 <parse_object+0x200>
    {
        goto fail; /* expected end of object */
    }

success:
 8001a84:	e000      	b.n	8001a88 <parse_object+0x1b8>
        goto success; /* empty object */
 8001a86:	bf00      	nop
    input_buffer->depth--;
 8001a88:	683b      	ldr	r3, [r7, #0]
 8001a8a:	68db      	ldr	r3, [r3, #12]
 8001a8c:	1e5a      	subs	r2, r3, #1
 8001a8e:	683b      	ldr	r3, [r7, #0]
 8001a90:	60da      	str	r2, [r3, #12]

    if (head != NULL) {
 8001a92:	697b      	ldr	r3, [r7, #20]
 8001a94:	2b00      	cmp	r3, #0
 8001a96:	d002      	beq.n	8001a9e <parse_object+0x1ce>
        head->prev = current_item;
 8001a98:	697b      	ldr	r3, [r7, #20]
 8001a9a:	693a      	ldr	r2, [r7, #16]
 8001a9c:	605a      	str	r2, [r3, #4]
    }

    item->type = cJSON_Object;
 8001a9e:	687b      	ldr	r3, [r7, #4]
 8001aa0:	2240      	movs	r2, #64	@ 0x40
 8001aa2:	60da      	str	r2, [r3, #12]
    item->child = head;
 8001aa4:	687b      	ldr	r3, [r7, #4]
 8001aa6:	697a      	ldr	r2, [r7, #20]
 8001aa8:	609a      	str	r2, [r3, #8]

    input_buffer->offset++;
 8001aaa:	683b      	ldr	r3, [r7, #0]
 8001aac:	689b      	ldr	r3, [r3, #8]
 8001aae:	1c5a      	adds	r2, r3, #1
 8001ab0:	683b      	ldr	r3, [r7, #0]
 8001ab2:	609a      	str	r2, [r3, #8]
    return true;
 8001ab4:	2301      	movs	r3, #1
 8001ab6:	e013      	b.n	8001ae0 <parse_object+0x210>
        goto fail; /* not an object */
 8001ab8:	bf00      	nop
 8001aba:	e00a      	b.n	8001ad2 <parse_object+0x202>
            goto fail; /* allocation failure */
 8001abc:	bf00      	nop
 8001abe:	e008      	b.n	8001ad2 <parse_object+0x202>
            goto fail; /* nothing comes after the comma */
 8001ac0:	bf00      	nop
 8001ac2:	e006      	b.n	8001ad2 <parse_object+0x202>
            goto fail; /* failed to parse name */
 8001ac4:	bf00      	nop
 8001ac6:	e004      	b.n	8001ad2 <parse_object+0x202>
            goto fail; /* invalid object */
 8001ac8:	bf00      	nop
 8001aca:	e002      	b.n	8001ad2 <parse_object+0x202>
            goto fail; /* failed to parse value */
 8001acc:	bf00      	nop
 8001ace:	e000      	b.n	8001ad2 <parse_object+0x202>
        goto fail; /* expected end of object */
 8001ad0:	bf00      	nop

fail:
    if (head != NULL)
 8001ad2:	697b      	ldr	r3, [r7, #20]
 8001ad4:	2b00      	cmp	r3, #0
 8001ad6:	d002      	beq.n	8001ade <parse_object+0x20e>
    {
        cJSON_Delete(head);
 8001ad8:	6978      	ldr	r0, [r7, #20]
 8001ada:	f7ff f857 	bl	8000b8c <cJSON_Delete>
    }

    return false;
 8001ade:	2300      	movs	r3, #0
}
 8001ae0:	4618      	mov	r0, r3
 8001ae2:	3718      	adds	r7, #24
 8001ae4:	46bd      	mov	sp, r7
 8001ae6:	bd80      	pop	{r7, pc}

08001ae8 <cJSON_GetArraySize>:
    return true;
}

/* Get Array size/item / object item. */
CJSON_PUBLIC(int) cJSON_GetArraySize(const cJSON *array)
{
 8001ae8:	b480      	push	{r7}
 8001aea:	b085      	sub	sp, #20
 8001aec:	af00      	add	r7, sp, #0
 8001aee:	6078      	str	r0, [r7, #4]
    cJSON *child = NULL;
 8001af0:	2300      	movs	r3, #0
 8001af2:	60fb      	str	r3, [r7, #12]
    size_t size = 0;
 8001af4:	2300      	movs	r3, #0
 8001af6:	60bb      	str	r3, [r7, #8]

    if (array == NULL)
 8001af8:	687b      	ldr	r3, [r7, #4]
 8001afa:	2b00      	cmp	r3, #0
 8001afc:	d101      	bne.n	8001b02 <cJSON_GetArraySize+0x1a>
    {
        return 0;
 8001afe:	2300      	movs	r3, #0
 8001b00:	e00d      	b.n	8001b1e <cJSON_GetArraySize+0x36>
    }

    child = array->child;
 8001b02:	687b      	ldr	r3, [r7, #4]
 8001b04:	689b      	ldr	r3, [r3, #8]
 8001b06:	60fb      	str	r3, [r7, #12]

    while(child != NULL)
 8001b08:	e005      	b.n	8001b16 <cJSON_GetArraySize+0x2e>
    {
        size++;
 8001b0a:	68bb      	ldr	r3, [r7, #8]
 8001b0c:	3301      	adds	r3, #1
 8001b0e:	60bb      	str	r3, [r7, #8]
        child = child->next;
 8001b10:	68fb      	ldr	r3, [r7, #12]
 8001b12:	681b      	ldr	r3, [r3, #0]
 8001b14:	60fb      	str	r3, [r7, #12]
    while(child != NULL)
 8001b16:	68fb      	ldr	r3, [r7, #12]
 8001b18:	2b00      	cmp	r3, #0
 8001b1a:	d1f6      	bne.n	8001b0a <cJSON_GetArraySize+0x22>
    }

    /* FIXME: Can overflow here. Cannot be fixed without breaking the API */

    return (int)size;
 8001b1c:	68bb      	ldr	r3, [r7, #8]
}
 8001b1e:	4618      	mov	r0, r3
 8001b20:	3714      	adds	r7, #20
 8001b22:	46bd      	mov	sp, r7
 8001b24:	f85d 7b04 	ldr.w	r7, [sp], #4
 8001b28:	4770      	bx	lr

08001b2a <get_array_item>:

static cJSON* get_array_item(const cJSON *array, size_t index)
{
 8001b2a:	b480      	push	{r7}
 8001b2c:	b085      	sub	sp, #20
 8001b2e:	af00      	add	r7, sp, #0
 8001b30:	6078      	str	r0, [r7, #4]
 8001b32:	6039      	str	r1, [r7, #0]
    cJSON *current_child = NULL;
 8001b34:	2300      	movs	r3, #0
 8001b36:	60fb      	str	r3, [r7, #12]

    if (array == NULL)
 8001b38:	687b      	ldr	r3, [r7, #4]
 8001b3a:	2b00      	cmp	r3, #0
 8001b3c:	d101      	bne.n	8001b42 <get_array_item+0x18>
    {
        return NULL;
 8001b3e:	2300      	movs	r3, #0
 8001b40:	e010      	b.n	8001b64 <get_array_item+0x3a>
    }

    current_child = array->child;
 8001b42:	687b      	ldr	r3, [r7, #4]
 8001b44:	689b      	ldr	r3, [r3, #8]
 8001b46:	60fb      	str	r3, [r7, #12]
    while ((current_child != NULL) && (index > 0))
 8001b48:	e005      	b.n	8001b56 <get_array_item+0x2c>
    {
        index--;
 8001b4a:	683b      	ldr	r3, [r7, #0]
 8001b4c:	3b01      	subs	r3, #1
 8001b4e:	603b      	str	r3, [r7, #0]
        current_child = current_child->next;
 8001b50:	68fb      	ldr	r3, [r7, #12]
 8001b52:	681b      	ldr	r3, [r3, #0]
 8001b54:	60fb      	str	r3, [r7, #12]
    while ((current_child != NULL) && (index > 0))
 8001b56:	68fb      	ldr	r3, [r7, #12]
 8001b58:	2b00      	cmp	r3, #0
 8001b5a:	d002      	beq.n	8001b62 <get_array_item+0x38>
 8001b5c:	683b      	ldr	r3, [r7, #0]
 8001b5e:	2b00      	cmp	r3, #0
 8001b60:	d1f3      	bne.n	8001b4a <get_array_item+0x20>
    }

    return current_child;
 8001b62:	68fb      	ldr	r3, [r7, #12]
}
 8001b64:	4618      	mov	r0, r3
 8001b66:	3714      	adds	r7, #20
 8001b68:	46bd      	mov	sp, r7
 8001b6a:	f85d 7b04 	ldr.w	r7, [sp], #4
 8001b6e:	4770      	bx	lr

08001b70 <cJSON_GetArrayItem>:

CJSON_PUBLIC(cJSON *) cJSON_GetArrayItem(const cJSON *array, int index)
{
 8001b70:	b580      	push	{r7, lr}
 8001b72:	b082      	sub	sp, #8
 8001b74:	af00      	add	r7, sp, #0
 8001b76:	6078      	str	r0, [r7, #4]
 8001b78:	6039      	str	r1, [r7, #0]
    if (index < 0)
 8001b7a:	683b      	ldr	r3, [r7, #0]
 8001b7c:	2b00      	cmp	r3, #0
 8001b7e:	da01      	bge.n	8001b84 <cJSON_GetArrayItem+0x14>
    {
        return NULL;
 8001b80:	2300      	movs	r3, #0
 8001b82:	e005      	b.n	8001b90 <cJSON_GetArrayItem+0x20>
    }

    return get_array_item(array, (size_t)index);
 8001b84:	683b      	ldr	r3, [r7, #0]
 8001b86:	4619      	mov	r1, r3
 8001b88:	6878      	ldr	r0, [r7, #4]
 8001b8a:	f7ff ffce 	bl	8001b2a <get_array_item>
 8001b8e:	4603      	mov	r3, r0
}
 8001b90:	4618      	mov	r0, r3
 8001b92:	3708      	adds	r7, #8
 8001b94:	46bd      	mov	sp, r7
 8001b96:	bd80      	pop	{r7, pc}

08001b98 <get_object_item>:

static cJSON *get_object_item(const cJSON * const object, const char * const name, const cJSON_bool case_sensitive)
{
 8001b98:	b580      	push	{r7, lr}
 8001b9a:	b086      	sub	sp, #24
 8001b9c:	af00      	add	r7, sp, #0
 8001b9e:	60f8      	str	r0, [r7, #12]
 8001ba0:	60b9      	str	r1, [r7, #8]
 8001ba2:	607a      	str	r2, [r7, #4]
    cJSON *current_element = NULL;
 8001ba4:	2300      	movs	r3, #0
 8001ba6:	617b      	str	r3, [r7, #20]

    if ((object == NULL) || (name == NULL))
 8001ba8:	68fb      	ldr	r3, [r7, #12]
 8001baa:	2b00      	cmp	r3, #0
 8001bac:	d002      	beq.n	8001bb4 <get_object_item+0x1c>
 8001bae:	68bb      	ldr	r3, [r7, #8]
 8001bb0:	2b00      	cmp	r3, #0
 8001bb2:	d101      	bne.n	8001bb8 <get_object_item+0x20>
    {
        return NULL;
 8001bb4:	2300      	movs	r3, #0
 8001bb6:	e033      	b.n	8001c20 <get_object_item+0x88>
    }

    current_element = object->child;
 8001bb8:	68fb      	ldr	r3, [r7, #12]
 8001bba:	689b      	ldr	r3, [r3, #8]
 8001bbc:	617b      	str	r3, [r7, #20]
    if (case_sensitive)
 8001bbe:	687b      	ldr	r3, [r7, #4]
 8001bc0:	2b00      	cmp	r3, #0
 8001bc2:	d017      	beq.n	8001bf4 <get_object_item+0x5c>
    {
        while ((current_element != NULL) && (current_element->string != NULL) && (strcmp(name, current_element->string) != 0))
 8001bc4:	e002      	b.n	8001bcc <get_object_item+0x34>
        {
            current_element = current_element->next;
 8001bc6:	697b      	ldr	r3, [r7, #20]
 8001bc8:	681b      	ldr	r3, [r3, #0]
 8001bca:	617b      	str	r3, [r7, #20]
        while ((current_element != NULL) && (current_element->string != NULL) && (strcmp(name, current_element->string) != 0))
 8001bcc:	697b      	ldr	r3, [r7, #20]
 8001bce:	2b00      	cmp	r3, #0
 8001bd0:	d01c      	beq.n	8001c0c <get_object_item+0x74>
 8001bd2:	697b      	ldr	r3, [r7, #20]
 8001bd4:	6a1b      	ldr	r3, [r3, #32]
 8001bd6:	2b00      	cmp	r3, #0
 8001bd8:	d018      	beq.n	8001c0c <get_object_item+0x74>
 8001bda:	697b      	ldr	r3, [r7, #20]
 8001bdc:	6a1b      	ldr	r3, [r3, #32]
 8001bde:	4619      	mov	r1, r3
 8001be0:	68b8      	ldr	r0, [r7, #8]
 8001be2:	f7fe fb7d 	bl	80002e0 <strcmp>
 8001be6:	4603      	mov	r3, r0
 8001be8:	2b00      	cmp	r3, #0
 8001bea:	d1ec      	bne.n	8001bc6 <get_object_item+0x2e>
 8001bec:	e00e      	b.n	8001c0c <get_object_item+0x74>
    }
    else
    {
        while ((current_element != NULL) && (case_insensitive_strcmp((const unsigned char*)name, (const unsigned char*)(current_element->string)) != 0))
        {
            current_element = current_element->next;
 8001bee:	697b      	ldr	r3, [r7, #20]
 8001bf0:	681b      	ldr	r3, [r3, #0]
 8001bf2:	617b      	str	r3, [r7, #20]
        while ((current_element != NULL) && (case_insensitive_strcmp((const unsigned char*)name, (const unsigned char*)(current_element->string)) != 0))
 8001bf4:	697b      	ldr	r3, [r7, #20]
 8001bf6:	2b00      	cmp	r3, #0
 8001bf8:	d008      	beq.n	8001c0c <get_object_item+0x74>
 8001bfa:	697b      	ldr	r3, [r7, #20]
 8001bfc:	6a1b      	ldr	r3, [r3, #32]
 8001bfe:	4619      	mov	r1, r3
 8001c00:	68b8      	ldr	r0, [r7, #8]
 8001c02:	f7fe ff41 	bl	8000a88 <case_insensitive_strcmp>
 8001c06:	4603      	mov	r3, r0
 8001c08:	2b00      	cmp	r3, #0
 8001c0a:	d1f0      	bne.n	8001bee <get_object_item+0x56>
        }
    }

    if ((current_element == NULL) || (current_element->string == NULL)) {
 8001c0c:	697b      	ldr	r3, [r7, #20]
 8001c0e:	2b00      	cmp	r3, #0
 8001c10:	d003      	beq.n	8001c1a <get_object_item+0x82>
 8001c12:	697b      	ldr	r3, [r7, #20]
 8001c14:	6a1b      	ldr	r3, [r3, #32]
 8001c16:	2b00      	cmp	r3, #0
 8001c18:	d101      	bne.n	8001c1e <get_object_item+0x86>
        return NULL;
 8001c1a:	2300      	movs	r3, #0
 8001c1c:	e000      	b.n	8001c20 <get_object_item+0x88>
    }

    return current_element;
 8001c1e:	697b      	ldr	r3, [r7, #20]
}
 8001c20:	4618      	mov	r0, r3
 8001c22:	3718      	adds	r7, #24
 8001c24:	46bd      	mov	sp, r7
 8001c26:	bd80      	pop	{r7, pc}

08001c28 <cJSON_GetObjectItemCaseSensitive>:
{
    return get_object_item(object, string, false);
}

CJSON_PUBLIC(cJSON *) cJSON_GetObjectItemCaseSensitive(const cJSON * const object, const char * const string)
{
 8001c28:	b580      	push	{r7, lr}
 8001c2a:	b082      	sub	sp, #8
 8001c2c:	af00      	add	r7, sp, #0
 8001c2e:	6078      	str	r0, [r7, #4]
 8001c30:	6039      	str	r1, [r7, #0]
    return get_object_item(object, string, true);
 8001c32:	2201      	movs	r2, #1
 8001c34:	6839      	ldr	r1, [r7, #0]
 8001c36:	6878      	ldr	r0, [r7, #4]
 8001c38:	f7ff ffae 	bl	8001b98 <get_object_item>
 8001c3c:	4603      	mov	r3, r0
}
 8001c3e:	4618      	mov	r0, r3
 8001c40:	3708      	adds	r7, #8
 8001c42:	46bd      	mov	sp, r7
 8001c44:	bd80      	pop	{r7, pc}

08001c46 <cJSON_IsNumber>:

    return (item->type & 0xFF) == cJSON_NULL;
}

CJSON_PUBLIC(cJSON_bool) cJSON_IsNumber(const cJSON * const item)
{
 8001c46:	b480      	push	{r7}
 8001c48:	b083      	sub	sp, #12
 8001c4a:	af00      	add	r7, sp, #0
 8001c4c:	6078      	str	r0, [r7, #4]
    if (item == NULL)
 8001c4e:	687b      	ldr	r3, [r7, #4]
 8001c50:	2b00      	cmp	r3, #0
 8001c52:	d101      	bne.n	8001c58 <cJSON_IsNumber+0x12>
    {
        return false;
 8001c54:	2300      	movs	r3, #0
 8001c56:	e007      	b.n	8001c68 <cJSON_IsNumber+0x22>
    }

    return (item->type & 0xFF) == cJSON_Number;
 8001c58:	687b      	ldr	r3, [r7, #4]
 8001c5a:	68db      	ldr	r3, [r3, #12]
 8001c5c:	b2db      	uxtb	r3, r3
 8001c5e:	2b08      	cmp	r3, #8
 8001c60:	bf0c      	ite	eq
 8001c62:	2301      	moveq	r3, #1
 8001c64:	2300      	movne	r3, #0
 8001c66:	b2db      	uxtb	r3, r3
}
 8001c68:	4618      	mov	r0, r3
 8001c6a:	370c      	adds	r7, #12
 8001c6c:	46bd      	mov	sp, r7
 8001c6e:	f85d 7b04 	ldr.w	r7, [sp], #4
 8001c72:	4770      	bx	lr

08001c74 <cJSON_IsArray>:

    return (item->type & 0xFF) == cJSON_String;
}

CJSON_PUBLIC(cJSON_bool) cJSON_IsArray(const cJSON * const item)
{
 8001c74:	b480      	push	{r7}
 8001c76:	b083      	sub	sp, #12
 8001c78:	af00      	add	r7, sp, #0
 8001c7a:	6078      	str	r0, [r7, #4]
    if (item == NULL)
 8001c7c:	687b      	ldr	r3, [r7, #4]
 8001c7e:	2b00      	cmp	r3, #0
 8001c80:	d101      	bne.n	8001c86 <cJSON_IsArray+0x12>
    {
        return false;
 8001c82:	2300      	movs	r3, #0
 8001c84:	e007      	b.n	8001c96 <cJSON_IsArray+0x22>
    }

    return (item->type & 0xFF) == cJSON_Array;
 8001c86:	687b      	ldr	r3, [r7, #4]
 8001c88:	68db      	ldr	r3, [r3, #12]
 8001c8a:	b2db      	uxtb	r3, r3
 8001c8c:	2b20      	cmp	r3, #32
 8001c8e:	bf0c      	ite	eq
 8001c90:	2301      	moveq	r3, #1
 8001c92:	2300      	movne	r3, #0
 8001c94:	b2db      	uxtb	r3, r3
}
 8001c96:	4618      	mov	r0, r3
 8001c98:	370c      	adds	r7, #12
 8001c9a:	46bd      	mov	sp, r7
 8001c9c:	f85d 7b04 	ldr.w	r7, [sp], #4
 8001ca0:	4770      	bx	lr

08001ca2 <vApplicationStackOverflowHook>:
/* Hook prototypes */
void vApplicationStackOverflowHook(xTaskHandle xTask, signed char *pcTaskName);

/* USER CODE BEGIN 4 */
void vApplicationStackOverflowHook(xTaskHandle xTask, signed char *pcTaskName)
{
 8001ca2:	b480      	push	{r7}
 8001ca4:	b083      	sub	sp, #12
 8001ca6:	af00      	add	r7, sp, #0
 8001ca8:	6078      	str	r0, [r7, #4]
 8001caa:	6039      	str	r1, [r7, #0]
   /* Run time stack overflow checking is performed if
   configCHECK_FOR_STACK_OVERFLOW is defined to 1 or 2. This hook function is
   called if a stack overflow is detected. */
}
 8001cac:	bf00      	nop
 8001cae:	370c      	adds	r7, #12
 8001cb0:	46bd      	mov	sp, r7
 8001cb2:	f85d 7b04 	ldr.w	r7, [sp], #4
 8001cb6:	4770      	bx	lr

08001cb8 <__io_putchar>:
//{
//	printf("DMA callback\n");
//}

int __io_putchar(int ch)
{
 8001cb8:	b580      	push	{r7, lr}
 8001cba:	b082      	sub	sp, #8
 8001cbc:	af00      	add	r7, sp, #0
 8001cbe:	6078      	str	r0, [r7, #4]
  HAL_UART_Transmit(&huart8, (uint8_t *)&ch, 1, 0xFFFF); // Use UART8 as debug interface
 8001cc0:	1d39      	adds	r1, r7, #4
 8001cc2:	f64f 73ff 	movw	r3, #65535	@ 0xffff
 8001cc6:	2201      	movs	r2, #1
 8001cc8:	4803      	ldr	r0, [pc, #12]	@ (8001cd8 <__io_putchar+0x20>)
 8001cca:	f00b fb0b 	bl	800d2e4 <HAL_UART_Transmit>
//  ITM_SendChar(ch);	// Use SWV as debug interface
  return ch;
 8001cce:	687b      	ldr	r3, [r7, #4]
}
 8001cd0:	4618      	mov	r0, r3
 8001cd2:	3708      	adds	r7, #8
 8001cd4:	46bd      	mov	sp, r7
 8001cd6:	bd80      	pop	{r7, pc}
 8001cd8:	24000280 	.word	0x24000280

08001cdc <main>:
/**
  * @brief  The application entry point.
  * @retval int
  */
int main(void)
{
 8001cdc:	b580      	push	{r7, lr}
 8001cde:	b084      	sub	sp, #16
 8001ce0:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN 1 */

  /* USER CODE END 1 */

  /* MPU Configuration--------------------------------------------------------*/
  MPU_Config();
 8001ce2:	f000 fc41 	bl	8002568 <MPU_Config>
  \details Turns on I-Cache
  */
__STATIC_FORCEINLINE void SCB_EnableICache (void)
{
  #if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)
    if (SCB->CCR & SCB_CCR_IC_Msk) return;  /* return if ICache is already enabled */
 8001ce6:	4b5e      	ldr	r3, [pc, #376]	@ (8001e60 <main+0x184>)
 8001ce8:	695b      	ldr	r3, [r3, #20]
 8001cea:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
 8001cee:	2b00      	cmp	r3, #0
 8001cf0:	d11b      	bne.n	8001d2a <main+0x4e>
  \details Acts as a special kind of Data Memory Barrier.
           It completes when all explicit memory accesses before this instruction complete.
 */
__STATIC_FORCEINLINE void __DSB(void)
{
  __ASM volatile ("dsb 0xF":::"memory");
 8001cf2:	f3bf 8f4f 	dsb	sy
}
 8001cf6:	bf00      	nop
  __ASM volatile ("isb 0xF":::"memory");
 8001cf8:	f3bf 8f6f 	isb	sy
}
 8001cfc:	bf00      	nop

    __DSB();
    __ISB();
    SCB->ICIALLU = 0UL;                     /* invalidate I-Cache */
 8001cfe:	4b58      	ldr	r3, [pc, #352]	@ (8001e60 <main+0x184>)
 8001d00:	2200      	movs	r2, #0
 8001d02:	f8c3 2250 	str.w	r2, [r3, #592]	@ 0x250
  __ASM volatile ("dsb 0xF":::"memory");
 8001d06:	f3bf 8f4f 	dsb	sy
}
 8001d0a:	bf00      	nop
  __ASM volatile ("isb 0xF":::"memory");
 8001d0c:	f3bf 8f6f 	isb	sy
}
 8001d10:	bf00      	nop
    __DSB();
    __ISB();
    SCB->CCR |=  (uint32_t)SCB_CCR_IC_Msk;  /* enable I-Cache */
 8001d12:	4b53      	ldr	r3, [pc, #332]	@ (8001e60 <main+0x184>)
 8001d14:	695b      	ldr	r3, [r3, #20]
 8001d16:	4a52      	ldr	r2, [pc, #328]	@ (8001e60 <main+0x184>)
 8001d18:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 8001d1c:	6153      	str	r3, [r2, #20]
  __ASM volatile ("dsb 0xF":::"memory");
 8001d1e:	f3bf 8f4f 	dsb	sy
}
 8001d22:	bf00      	nop
  __ASM volatile ("isb 0xF":::"memory");
 8001d24:	f3bf 8f6f 	isb	sy
}
 8001d28:	e000      	b.n	8001d2c <main+0x50>
    if (SCB->CCR & SCB_CCR_IC_Msk) return;  /* return if ICache is already enabled */
 8001d2a:	bf00      	nop
  #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
    uint32_t ccsidr;
    uint32_t sets;
    uint32_t ways;

    if (SCB->CCR & SCB_CCR_DC_Msk) return;  /* return if DCache is already enabled */
 8001d2c:	4b4c      	ldr	r3, [pc, #304]	@ (8001e60 <main+0x184>)
 8001d2e:	695b      	ldr	r3, [r3, #20]
 8001d30:	f403 3380 	and.w	r3, r3, #65536	@ 0x10000
 8001d34:	2b00      	cmp	r3, #0
 8001d36:	d138      	bne.n	8001daa <main+0xce>

    SCB->CSSELR = 0U;                       /* select Level 1 data cache */
 8001d38:	4b49      	ldr	r3, [pc, #292]	@ (8001e60 <main+0x184>)
 8001d3a:	2200      	movs	r2, #0
 8001d3c:	f8c3 2084 	str.w	r2, [r3, #132]	@ 0x84
  __ASM volatile ("dsb 0xF":::"memory");
 8001d40:	f3bf 8f4f 	dsb	sy
}
 8001d44:	bf00      	nop
    __DSB();

    ccsidr = SCB->CCSIDR;
 8001d46:	4b46      	ldr	r3, [pc, #280]	@ (8001e60 <main+0x184>)
 8001d48:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 8001d4c:	60fb      	str	r3, [r7, #12]

                                            /* invalidate D-Cache */
    sets = (uint32_t)(CCSIDR_SETS(ccsidr));
 8001d4e:	68fb      	ldr	r3, [r7, #12]
 8001d50:	0b5b      	lsrs	r3, r3, #13
 8001d52:	f3c3 030e 	ubfx	r3, r3, #0, #15
 8001d56:	60bb      	str	r3, [r7, #8]
    do {
      ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
 8001d58:	68fb      	ldr	r3, [r7, #12]
 8001d5a:	08db      	lsrs	r3, r3, #3
 8001d5c:	f3c3 0309 	ubfx	r3, r3, #0, #10
 8001d60:	607b      	str	r3, [r7, #4]
      do {
        SCB->DCISW = (((sets << SCB_DCISW_SET_Pos) & SCB_DCISW_SET_Msk) |
 8001d62:	68bb      	ldr	r3, [r7, #8]
 8001d64:	015a      	lsls	r2, r3, #5
 8001d66:	f643 73e0 	movw	r3, #16352	@ 0x3fe0
 8001d6a:	4013      	ands	r3, r2
                      ((ways << SCB_DCISW_WAY_Pos) & SCB_DCISW_WAY_Msk)  );
 8001d6c:	687a      	ldr	r2, [r7, #4]
 8001d6e:	0792      	lsls	r2, r2, #30
        SCB->DCISW = (((sets << SCB_DCISW_SET_Pos) & SCB_DCISW_SET_Msk) |
 8001d70:	493b      	ldr	r1, [pc, #236]	@ (8001e60 <main+0x184>)
 8001d72:	4313      	orrs	r3, r2
 8001d74:	f8c1 3260 	str.w	r3, [r1, #608]	@ 0x260
        #if defined ( __CC_ARM )
          __schedule_barrier();
        #endif
      } while (ways-- != 0U);
 8001d78:	687b      	ldr	r3, [r7, #4]
 8001d7a:	1e5a      	subs	r2, r3, #1
 8001d7c:	607a      	str	r2, [r7, #4]
 8001d7e:	2b00      	cmp	r3, #0
 8001d80:	d1ef      	bne.n	8001d62 <main+0x86>
    } while(sets-- != 0U);
 8001d82:	68bb      	ldr	r3, [r7, #8]
 8001d84:	1e5a      	subs	r2, r3, #1
 8001d86:	60ba      	str	r2, [r7, #8]
 8001d88:	2b00      	cmp	r3, #0
 8001d8a:	d1e5      	bne.n	8001d58 <main+0x7c>
  __ASM volatile ("dsb 0xF":::"memory");
 8001d8c:	f3bf 8f4f 	dsb	sy
}
 8001d90:	bf00      	nop
    __DSB();

    SCB->CCR |=  (uint32_t)SCB_CCR_DC_Msk;  /* enable D-Cache */
 8001d92:	4b33      	ldr	r3, [pc, #204]	@ (8001e60 <main+0x184>)
 8001d94:	695b      	ldr	r3, [r3, #20]
 8001d96:	4a32      	ldr	r2, [pc, #200]	@ (8001e60 <main+0x184>)
 8001d98:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
 8001d9c:	6153      	str	r3, [r2, #20]
  __ASM volatile ("dsb 0xF":::"memory");
 8001d9e:	f3bf 8f4f 	dsb	sy
}
 8001da2:	bf00      	nop
  __ASM volatile ("isb 0xF":::"memory");
 8001da4:	f3bf 8f6f 	isb	sy
}
 8001da8:	e000      	b.n	8001dac <main+0xd0>
    if (SCB->CCR & SCB_CCR_DC_Msk) return;  /* return if DCache is already enabled */
 8001daa:	bf00      	nop
  SCB_EnableDCache();

  /* MCU Configuration--------------------------------------------------------*/

  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
  HAL_Init();
 8001dac:	f003 f9f8 	bl	80051a0 <HAL_Init>
  /* USER CODE BEGIN Init */

  /* USER CODE END Init */

  /* Configure the system clock */
  SystemClock_Config();
 8001db0:	f000 f878 	bl	8001ea4 <SystemClock_Config>
  /* USER CODE BEGIN SysInit */

  /* USER CODE END SysInit */

  /* Initialize all configured peripherals */
  MX_GPIO_Init();
 8001db4:	f000 fae6 	bl	8002384 <MX_GPIO_Init>
  MX_DMA_Init();
 8001db8:	f000 fabc 	bl	8002334 <MX_DMA_Init>
  MX_UART8_Init();
 8001dbc:	f000 f92e 	bl	800201c <MX_UART8_Init>
  MX_CRC_Init();
 8001dc0:	f000 f8ec 	bl	8001f9c <MX_CRC_Init>
  MX_RNG_Init();
 8001dc4:	f000 f914 	bl	8001ff0 <MX_RNG_Init>
  MX_USART1_UART_Init();
 8001dc8:	f000 f974 	bl	80020b4 <MX_USART1_UART_Init>
  MX_USART2_UART_Init();
 8001dcc:	f000 f9c2 	bl	8002154 <MX_USART2_UART_Init>
  MX_USART3_UART_Init();
 8001dd0:	f000 fa10 	bl	80021f4 <MX_USART3_UART_Init>
  MX_USART6_UART_Init();
 8001dd4:	f000 fa5e 	bl	8002294 <MX_USART6_UART_Init>

//  HAL_DMA_RegisterCallback(&hdma_uart8_rx, HAL_DMA_XFER_CPLT_CB_ID, dmaCallback);
  /* USER CODE END 2 */

  /* Init scheduler */
  osKernelInitialize();
 8001dd8:	f00e ff7c 	bl	8010cd4 <osKernelInitialize>

  /* USER CODE BEGIN RTOS_MUTEX */
  /* add mutexes, ... */
  resMeasurementsMutex = osMutexNew (NULL);
 8001ddc:	2000      	movs	r0, #0
 8001dde:	f00f f923 	bl	8011028 <osMutexNew>
 8001de2:	4603      	mov	r3, r0
 8001de4:	4a1f      	ldr	r2, [pc, #124]	@ (8001e64 <main+0x188>)
 8001de6:	6013      	str	r3, [r2, #0]
  sensorsInfoMutex     = osMutexNew (NULL);
 8001de8:	2000      	movs	r0, #0
 8001dea:	f00f f91d 	bl	8011028 <osMutexNew>
 8001dee:	4603      	mov	r3, r0
 8001df0:	4a1d      	ldr	r2, [pc, #116]	@ (8001e68 <main+0x18c>)
 8001df2:	6013      	str	r3, [r2, #0]
  /* add semaphores, ... */
  /* USER CODE END RTOS_SEMAPHORES */

  /* Create the timer(s) */
  /* creation of relay1Timer */
  relay1TimerHandle = osTimerNew(relay1TimerCallback, osTimerOnce, NULL, &relay1Timer_attributes);
 8001df4:	4b1d      	ldr	r3, [pc, #116]	@ (8001e6c <main+0x190>)
 8001df6:	2200      	movs	r2, #0
 8001df8:	2100      	movs	r1, #0
 8001dfa:	481d      	ldr	r0, [pc, #116]	@ (8001e70 <main+0x194>)
 8001dfc:	f00f f898 	bl	8010f30 <osTimerNew>
 8001e00:	4603      	mov	r3, r0
 8001e02:	4a1c      	ldr	r2, [pc, #112]	@ (8001e74 <main+0x198>)
 8001e04:	6013      	str	r3, [r2, #0]

  /* creation of relay2Timer */
  relay2TimerHandle = osTimerNew(relay2TimerCallback, osTimerOnce, NULL, &relay2Timer_attributes);
 8001e06:	4b1c      	ldr	r3, [pc, #112]	@ (8001e78 <main+0x19c>)
 8001e08:	2200      	movs	r2, #0
 8001e0a:	2100      	movs	r1, #0
 8001e0c:	481b      	ldr	r0, [pc, #108]	@ (8001e7c <main+0x1a0>)
 8001e0e:	f00f f88f 	bl	8010f30 <osTimerNew>
 8001e12:	4603      	mov	r3, r0
 8001e14:	4a1a      	ldr	r2, [pc, #104]	@ (8001e80 <main+0x1a4>)
 8001e16:	6013      	str	r3, [r2, #0]

  /* creation of relay3Timer */
  relay3TimerHandle = osTimerNew(relay3TimerCallback, osTimerOnce, NULL, &relay3Timer_attributes);
 8001e18:	4b1a      	ldr	r3, [pc, #104]	@ (8001e84 <main+0x1a8>)
 8001e1a:	2200      	movs	r2, #0
 8001e1c:	2100      	movs	r1, #0
 8001e1e:	481a      	ldr	r0, [pc, #104]	@ (8001e88 <main+0x1ac>)
 8001e20:	f00f f886 	bl	8010f30 <osTimerNew>
 8001e24:	4603      	mov	r3, r0
 8001e26:	4a19      	ldr	r2, [pc, #100]	@ (8001e8c <main+0x1b0>)
 8001e28:	6013      	str	r3, [r2, #0]

  /* creation of relay4Timer */
  relay4TimerHandle = osTimerNew(relay1TimerCallback, osTimerOnce, NULL, &relay4Timer_attributes);
 8001e2a:	4b19      	ldr	r3, [pc, #100]	@ (8001e90 <main+0x1b4>)
 8001e2c:	2200      	movs	r2, #0
 8001e2e:	2100      	movs	r1, #0
 8001e30:	480f      	ldr	r0, [pc, #60]	@ (8001e70 <main+0x194>)
 8001e32:	f00f f87d 	bl	8010f30 <osTimerNew>
 8001e36:	4603      	mov	r3, r0
 8001e38:	4a16      	ldr	r2, [pc, #88]	@ (8001e94 <main+0x1b8>)
 8001e3a:	6013      	str	r3, [r2, #0]
  /* add queues, ... */
  /* USER CODE END RTOS_QUEUES */

  /* Create the thread(s) */
  /* creation of defaultTask */
  defaultTaskHandle = osThreadNew(StartDefaultTask, NULL, &defaultTask_attributes);
 8001e3c:	4a16      	ldr	r2, [pc, #88]	@ (8001e98 <main+0x1bc>)
 8001e3e:	2100      	movs	r1, #0
 8001e40:	4816      	ldr	r0, [pc, #88]	@ (8001e9c <main+0x1c0>)
 8001e42:	f00e ffa6 	bl	8010d92 <osThreadNew>
 8001e46:	4603      	mov	r3, r0
 8001e48:	4a15      	ldr	r2, [pc, #84]	@ (8001ea0 <main+0x1c4>)
 8001e4a:	6013      	str	r3, [r2, #0]

  /* USER CODE BEGIN RTOS_THREADS */
  /* add threads, ... */
  mqtt_cli_init();
 8001e4c:	f001 f962 	bl	8003114 <mqtt_cli_init>
//  Uart8TasksInit();
  UartTasksInit();
 8001e50:	f002 f888 	bl	8003f64 <UartTasksInit>
#ifdef USER_MOCKS
  MockMeasurmetsTaskInit();
#else
  MeasurmentsReqSchedulerTaskInit();
 8001e54:	f002 fff2 	bl	8004e3c <MeasurmentsReqSchedulerTaskInit>
  /* USER CODE BEGIN RTOS_EVENTS */
  /* add events, ... */
  /* USER CODE END RTOS_EVENTS */

  /* Start scheduler */
  osKernelStart();
 8001e58:	f00e ff60 	bl	8010d1c <osKernelStart>

  /* We should never get here as control is now taken by the scheduler */

  /* Infinite loop */
  /* USER CODE BEGIN WHILE */
  while (1)
 8001e5c:	bf00      	nop
 8001e5e:	e7fd      	b.n	8001e5c <main+0x180>
 8001e60:	e000ed00 	.word	0xe000ed00
 8001e64:	24002238 	.word	0x24002238
 8001e68:	2400223c 	.word	0x2400223c
 8001e6c:	08031248 	.word	0x08031248
 8001e70:	0800252b 	.word	0x0800252b
 8001e74:	24000658 	.word	0x24000658
 8001e78:	08031258 	.word	0x08031258
 8001e7c:	0800253f 	.word	0x0800253f
 8001e80:	24000688 	.word	0x24000688
 8001e84:	08031268 	.word	0x08031268
 8001e88:	08002553 	.word	0x08002553
 8001e8c:	240006b8 	.word	0x240006b8
 8001e90:	08031278 	.word	0x08031278
 8001e94:	240006e8 	.word	0x240006e8
 8001e98:	08031224 	.word	0x08031224
 8001e9c:	08002515 	.word	0x08002515
 8001ea0:	24000654 	.word	0x24000654

08001ea4 <SystemClock_Config>:
/**
  * @brief System Clock Configuration
  * @retval None
  */
void SystemClock_Config(void)
{
 8001ea4:	b580      	push	{r7, lr}
 8001ea6:	b09c      	sub	sp, #112	@ 0x70
 8001ea8:	af00      	add	r7, sp, #0
  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
 8001eaa:	f107 0324 	add.w	r3, r7, #36	@ 0x24
 8001eae:	224c      	movs	r2, #76	@ 0x4c
 8001eb0:	2100      	movs	r1, #0
 8001eb2:	4618      	mov	r0, r3
 8001eb4:	f028 fb14 	bl	802a4e0 <memset>
  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
 8001eb8:	1d3b      	adds	r3, r7, #4
 8001eba:	2220      	movs	r2, #32
 8001ebc:	2100      	movs	r1, #0
 8001ebe:	4618      	mov	r0, r3
 8001ec0:	f028 fb0e 	bl	802a4e0 <memset>

  /** Supply configuration update enable
  */
  HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
 8001ec4:	2002      	movs	r0, #2
 8001ec6:	f007 ff3f 	bl	8009d48 <HAL_PWREx_ConfigSupply>

  /** Configure the main internal regulator output voltage
  */
  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
 8001eca:	2300      	movs	r3, #0
 8001ecc:	603b      	str	r3, [r7, #0]
 8001ece:	4b31      	ldr	r3, [pc, #196]	@ (8001f94 <SystemClock_Config+0xf0>)
 8001ed0:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8001ed2:	4a30      	ldr	r2, [pc, #192]	@ (8001f94 <SystemClock_Config+0xf0>)
 8001ed4:	f023 0301 	bic.w	r3, r3, #1
 8001ed8:	62d3      	str	r3, [r2, #44]	@ 0x2c
 8001eda:	4b2e      	ldr	r3, [pc, #184]	@ (8001f94 <SystemClock_Config+0xf0>)
 8001edc:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8001ede:	f003 0301 	and.w	r3, r3, #1
 8001ee2:	603b      	str	r3, [r7, #0]
 8001ee4:	4b2c      	ldr	r3, [pc, #176]	@ (8001f98 <SystemClock_Config+0xf4>)
 8001ee6:	699b      	ldr	r3, [r3, #24]
 8001ee8:	4a2b      	ldr	r2, [pc, #172]	@ (8001f98 <SystemClock_Config+0xf4>)
 8001eea:	f443 4340 	orr.w	r3, r3, #49152	@ 0xc000
 8001eee:	6193      	str	r3, [r2, #24]
 8001ef0:	4b29      	ldr	r3, [pc, #164]	@ (8001f98 <SystemClock_Config+0xf4>)
 8001ef2:	699b      	ldr	r3, [r3, #24]
 8001ef4:	f403 4340 	and.w	r3, r3, #49152	@ 0xc000
 8001ef8:	603b      	str	r3, [r7, #0]
 8001efa:	683b      	ldr	r3, [r7, #0]

  while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
 8001efc:	bf00      	nop
 8001efe:	4b26      	ldr	r3, [pc, #152]	@ (8001f98 <SystemClock_Config+0xf4>)
 8001f00:	699b      	ldr	r3, [r3, #24]
 8001f02:	f403 5300 	and.w	r3, r3, #8192	@ 0x2000
 8001f06:	f5b3 5f00 	cmp.w	r3, #8192	@ 0x2000
 8001f0a:	d1f8      	bne.n	8001efe <SystemClock_Config+0x5a>

  /** Initializes the RCC Oscillators according to the specified parameters
  * in the RCC_OscInitTypeDef structure.
  */
  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48|RCC_OSCILLATORTYPE_HSE;
 8001f0c:	2321      	movs	r3, #33	@ 0x21
 8001f0e:	627b      	str	r3, [r7, #36]	@ 0x24
  RCC_OscInitStruct.HSEState = RCC_HSE_ON;
 8001f10:	f44f 3380 	mov.w	r3, #65536	@ 0x10000
 8001f14:	62bb      	str	r3, [r7, #40]	@ 0x28
  RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
 8001f16:	2301      	movs	r3, #1
 8001f18:	63fb      	str	r3, [r7, #60]	@ 0x3c
  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
 8001f1a:	2302      	movs	r3, #2
 8001f1c:	64bb      	str	r3, [r7, #72]	@ 0x48
  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
 8001f1e:	2302      	movs	r3, #2
 8001f20:	64fb      	str	r3, [r7, #76]	@ 0x4c
  RCC_OscInitStruct.PLL.PLLM = 5;
 8001f22:	2305      	movs	r3, #5
 8001f24:	653b      	str	r3, [r7, #80]	@ 0x50
  RCC_OscInitStruct.PLL.PLLN = 160;
 8001f26:	23a0      	movs	r3, #160	@ 0xa0
 8001f28:	657b      	str	r3, [r7, #84]	@ 0x54
  RCC_OscInitStruct.PLL.PLLP = 2;
 8001f2a:	2302      	movs	r3, #2
 8001f2c:	65bb      	str	r3, [r7, #88]	@ 0x58
  RCC_OscInitStruct.PLL.PLLQ = 2;
 8001f2e:	2302      	movs	r3, #2
 8001f30:	65fb      	str	r3, [r7, #92]	@ 0x5c
  RCC_OscInitStruct.PLL.PLLR = 2;
 8001f32:	2302      	movs	r3, #2
 8001f34:	663b      	str	r3, [r7, #96]	@ 0x60
  RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_2;
 8001f36:	2308      	movs	r3, #8
 8001f38:	667b      	str	r3, [r7, #100]	@ 0x64
  RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE;
 8001f3a:	2300      	movs	r3, #0
 8001f3c:	66bb      	str	r3, [r7, #104]	@ 0x68
  RCC_OscInitStruct.PLL.PLLFRACN = 0;
 8001f3e:	2300      	movs	r3, #0
 8001f40:	66fb      	str	r3, [r7, #108]	@ 0x6c
  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
 8001f42:	f107 0324 	add.w	r3, r7, #36	@ 0x24
 8001f46:	4618      	mov	r0, r3
 8001f48:	f007 ffbe 	bl	8009ec8 <HAL_RCC_OscConfig>
 8001f4c:	4603      	mov	r3, r0
 8001f4e:	2b00      	cmp	r3, #0
 8001f50:	d001      	beq.n	8001f56 <SystemClock_Config+0xb2>
  {
    Error_Handler();
 8001f52:	f000 fb79 	bl	8002648 <Error_Handler>
  }

  /** Initializes the CPU, AHB and APB buses clocks
  */
  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
 8001f56:	233f      	movs	r3, #63	@ 0x3f
 8001f58:	607b      	str	r3, [r7, #4]
                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2
                              |RCC_CLOCKTYPE_D3PCLK1|RCC_CLOCKTYPE_D1PCLK1;
  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
 8001f5a:	2303      	movs	r3, #3
 8001f5c:	60bb      	str	r3, [r7, #8]
  RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
 8001f5e:	2300      	movs	r3, #0
 8001f60:	60fb      	str	r3, [r7, #12]
  RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2;
 8001f62:	2308      	movs	r3, #8
 8001f64:	613b      	str	r3, [r7, #16]
  RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2;
 8001f66:	2340      	movs	r3, #64	@ 0x40
 8001f68:	617b      	str	r3, [r7, #20]
  RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2;
 8001f6a:	2340      	movs	r3, #64	@ 0x40
 8001f6c:	61bb      	str	r3, [r7, #24]
  RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2;
 8001f6e:	f44f 6380 	mov.w	r3, #1024	@ 0x400
 8001f72:	61fb      	str	r3, [r7, #28]
  RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2;
 8001f74:	2340      	movs	r3, #64	@ 0x40
 8001f76:	623b      	str	r3, [r7, #32]

  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
 8001f78:	1d3b      	adds	r3, r7, #4
 8001f7a:	2102      	movs	r1, #2
 8001f7c:	4618      	mov	r0, r3
 8001f7e:	f008 fbfd 	bl	800a77c <HAL_RCC_ClockConfig>
 8001f82:	4603      	mov	r3, r0
 8001f84:	2b00      	cmp	r3, #0
 8001f86:	d001      	beq.n	8001f8c <SystemClock_Config+0xe8>
  {
    Error_Handler();
 8001f88:	f000 fb5e 	bl	8002648 <Error_Handler>
  }
}
 8001f8c:	bf00      	nop
 8001f8e:	3770      	adds	r7, #112	@ 0x70
 8001f90:	46bd      	mov	sp, r7
 8001f92:	bd80      	pop	{r7, pc}
 8001f94:	58000400 	.word	0x58000400
 8001f98:	58024800 	.word	0x58024800

08001f9c <MX_CRC_Init>:
  * @brief CRC Initialization Function
  * @param None
  * @retval None
  */
static void MX_CRC_Init(void)
{
 8001f9c:	b580      	push	{r7, lr}
 8001f9e:	af00      	add	r7, sp, #0
  /* USER CODE END CRC_Init 0 */

  /* USER CODE BEGIN CRC_Init 1 */

  /* USER CODE END CRC_Init 1 */
  hcrc.Instance = CRC;
 8001fa0:	4b11      	ldr	r3, [pc, #68]	@ (8001fe8 <MX_CRC_Init+0x4c>)
 8001fa2:	4a12      	ldr	r2, [pc, #72]	@ (8001fec <MX_CRC_Init+0x50>)
 8001fa4:	601a      	str	r2, [r3, #0]
  hcrc.Init.DefaultPolynomialUse = DEFAULT_POLYNOMIAL_DISABLE;
 8001fa6:	4b10      	ldr	r3, [pc, #64]	@ (8001fe8 <MX_CRC_Init+0x4c>)
 8001fa8:	2201      	movs	r2, #1
 8001faa:	711a      	strb	r2, [r3, #4]
  hcrc.Init.DefaultInitValueUse = DEFAULT_INIT_VALUE_ENABLE;
 8001fac:	4b0e      	ldr	r3, [pc, #56]	@ (8001fe8 <MX_CRC_Init+0x4c>)
 8001fae:	2200      	movs	r2, #0
 8001fb0:	715a      	strb	r2, [r3, #5]
  hcrc.Init.GeneratingPolynomial = 4129;
 8001fb2:	4b0d      	ldr	r3, [pc, #52]	@ (8001fe8 <MX_CRC_Init+0x4c>)
 8001fb4:	f241 0221 	movw	r2, #4129	@ 0x1021
 8001fb8:	609a      	str	r2, [r3, #8]
  hcrc.Init.CRCLength = CRC_POLYLENGTH_16B;
 8001fba:	4b0b      	ldr	r3, [pc, #44]	@ (8001fe8 <MX_CRC_Init+0x4c>)
 8001fbc:	2208      	movs	r2, #8
 8001fbe:	60da      	str	r2, [r3, #12]
  hcrc.Init.InputDataInversionMode = CRC_INPUTDATA_INVERSION_NONE;
 8001fc0:	4b09      	ldr	r3, [pc, #36]	@ (8001fe8 <MX_CRC_Init+0x4c>)
 8001fc2:	2200      	movs	r2, #0
 8001fc4:	615a      	str	r2, [r3, #20]
  hcrc.Init.OutputDataInversionMode = CRC_OUTPUTDATA_INVERSION_DISABLE;
 8001fc6:	4b08      	ldr	r3, [pc, #32]	@ (8001fe8 <MX_CRC_Init+0x4c>)
 8001fc8:	2200      	movs	r2, #0
 8001fca:	619a      	str	r2, [r3, #24]
  hcrc.InputDataFormat = CRC_INPUTDATA_FORMAT_BYTES;
 8001fcc:	4b06      	ldr	r3, [pc, #24]	@ (8001fe8 <MX_CRC_Init+0x4c>)
 8001fce:	2201      	movs	r2, #1
 8001fd0:	621a      	str	r2, [r3, #32]
  if (HAL_CRC_Init(&hcrc) != HAL_OK)
 8001fd2:	4805      	ldr	r0, [pc, #20]	@ (8001fe8 <MX_CRC_Init+0x4c>)
 8001fd4:	f003 fadc 	bl	8005590 <HAL_CRC_Init>
 8001fd8:	4603      	mov	r3, r0
 8001fda:	2b00      	cmp	r3, #0
 8001fdc:	d001      	beq.n	8001fe2 <MX_CRC_Init+0x46>
  {
    Error_Handler();
 8001fde:	f000 fb33 	bl	8002648 <Error_Handler>
  }
  /* USER CODE BEGIN CRC_Init 2 */

  /* USER CODE END CRC_Init 2 */

}
 8001fe2:	bf00      	nop
 8001fe4:	bd80      	pop	{r7, pc}
 8001fe6:	bf00      	nop
 8001fe8:	24000248 	.word	0x24000248
 8001fec:	58024c00 	.word	0x58024c00

08001ff0 <MX_RNG_Init>:
  * @brief RNG Initialization Function
  * @param None
  * @retval None
  */
static void MX_RNG_Init(void)
{
 8001ff0:	b580      	push	{r7, lr}
 8001ff2:	af00      	add	r7, sp, #0
  /* USER CODE END RNG_Init 0 */

  /* USER CODE BEGIN RNG_Init 1 */

  /* USER CODE END RNG_Init 1 */
  hrng.Instance = RNG;
 8001ff4:	4b07      	ldr	r3, [pc, #28]	@ (8002014 <MX_RNG_Init+0x24>)
 8001ff6:	4a08      	ldr	r2, [pc, #32]	@ (8002018 <MX_RNG_Init+0x28>)
 8001ff8:	601a      	str	r2, [r3, #0]
  hrng.Init.ClockErrorDetection = RNG_CED_ENABLE;
 8001ffa:	4b06      	ldr	r3, [pc, #24]	@ (8002014 <MX_RNG_Init+0x24>)
 8001ffc:	2200      	movs	r2, #0
 8001ffe:	605a      	str	r2, [r3, #4]
  if (HAL_RNG_Init(&hrng) != HAL_OK)
 8002000:	4804      	ldr	r0, [pc, #16]	@ (8002014 <MX_RNG_Init+0x24>)
 8002002:	f00a fd99 	bl	800cb38 <HAL_RNG_Init>
 8002006:	4603      	mov	r3, r0
 8002008:	2b00      	cmp	r3, #0
 800200a:	d001      	beq.n	8002010 <MX_RNG_Init+0x20>
  {
    Error_Handler();
 800200c:	f000 fb1c 	bl	8002648 <Error_Handler>
  }
  /* USER CODE BEGIN RNG_Init 2 */

  /* USER CODE END RNG_Init 2 */

}
 8002010:	bf00      	nop
 8002012:	bd80      	pop	{r7, pc}
 8002014:	2400026c 	.word	0x2400026c
 8002018:	48021800 	.word	0x48021800

0800201c <MX_UART8_Init>:
  * @brief UART8 Initialization Function
  * @param None
  * @retval None
  */
static void MX_UART8_Init(void)
{
 800201c:	b580      	push	{r7, lr}
 800201e:	af00      	add	r7, sp, #0
  /* USER CODE END UART8_Init 0 */

  /* USER CODE BEGIN UART8_Init 1 */

  /* USER CODE END UART8_Init 1 */
  huart8.Instance = UART8;
 8002020:	4b22      	ldr	r3, [pc, #136]	@ (80020ac <MX_UART8_Init+0x90>)
 8002022:	4a23      	ldr	r2, [pc, #140]	@ (80020b0 <MX_UART8_Init+0x94>)
 8002024:	601a      	str	r2, [r3, #0]
  huart8.Init.BaudRate = 115200;
 8002026:	4b21      	ldr	r3, [pc, #132]	@ (80020ac <MX_UART8_Init+0x90>)
 8002028:	f44f 32e1 	mov.w	r2, #115200	@ 0x1c200
 800202c:	605a      	str	r2, [r3, #4]
  huart8.Init.WordLength = UART_WORDLENGTH_8B;
 800202e:	4b1f      	ldr	r3, [pc, #124]	@ (80020ac <MX_UART8_Init+0x90>)
 8002030:	2200      	movs	r2, #0
 8002032:	609a      	str	r2, [r3, #8]
  huart8.Init.StopBits = UART_STOPBITS_1;
 8002034:	4b1d      	ldr	r3, [pc, #116]	@ (80020ac <MX_UART8_Init+0x90>)
 8002036:	2200      	movs	r2, #0
 8002038:	60da      	str	r2, [r3, #12]
  huart8.Init.Parity = UART_PARITY_NONE;
 800203a:	4b1c      	ldr	r3, [pc, #112]	@ (80020ac <MX_UART8_Init+0x90>)
 800203c:	2200      	movs	r2, #0
 800203e:	611a      	str	r2, [r3, #16]
  huart8.Init.Mode = UART_MODE_TX_RX;
 8002040:	4b1a      	ldr	r3, [pc, #104]	@ (80020ac <MX_UART8_Init+0x90>)
 8002042:	220c      	movs	r2, #12
 8002044:	615a      	str	r2, [r3, #20]
  huart8.Init.HwFlowCtl = UART_HWCONTROL_NONE;
 8002046:	4b19      	ldr	r3, [pc, #100]	@ (80020ac <MX_UART8_Init+0x90>)
 8002048:	2200      	movs	r2, #0
 800204a:	619a      	str	r2, [r3, #24]
  huart8.Init.OverSampling = UART_OVERSAMPLING_16;
 800204c:	4b17      	ldr	r3, [pc, #92]	@ (80020ac <MX_UART8_Init+0x90>)
 800204e:	2200      	movs	r2, #0
 8002050:	61da      	str	r2, [r3, #28]
  huart8.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
 8002052:	4b16      	ldr	r3, [pc, #88]	@ (80020ac <MX_UART8_Init+0x90>)
 8002054:	2200      	movs	r2, #0
 8002056:	621a      	str	r2, [r3, #32]
  huart8.Init.ClockPrescaler = UART_PRESCALER_DIV1;
 8002058:	4b14      	ldr	r3, [pc, #80]	@ (80020ac <MX_UART8_Init+0x90>)
 800205a:	2200      	movs	r2, #0
 800205c:	625a      	str	r2, [r3, #36]	@ 0x24
  huart8.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
 800205e:	4b13      	ldr	r3, [pc, #76]	@ (80020ac <MX_UART8_Init+0x90>)
 8002060:	2200      	movs	r2, #0
 8002062:	629a      	str	r2, [r3, #40]	@ 0x28
  if (HAL_UART_Init(&huart8) != HAL_OK)
 8002064:	4811      	ldr	r0, [pc, #68]	@ (80020ac <MX_UART8_Init+0x90>)
 8002066:	f00b f8ed 	bl	800d244 <HAL_UART_Init>
 800206a:	4603      	mov	r3, r0
 800206c:	2b00      	cmp	r3, #0
 800206e:	d001      	beq.n	8002074 <MX_UART8_Init+0x58>
  {
    Error_Handler();
 8002070:	f000 faea 	bl	8002648 <Error_Handler>
  }
  if (HAL_UARTEx_SetTxFifoThreshold(&huart8, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
 8002074:	2100      	movs	r1, #0
 8002076:	480d      	ldr	r0, [pc, #52]	@ (80020ac <MX_UART8_Init+0x90>)
 8002078:	f00d fe1b 	bl	800fcb2 <HAL_UARTEx_SetTxFifoThreshold>
 800207c:	4603      	mov	r3, r0
 800207e:	2b00      	cmp	r3, #0
 8002080:	d001      	beq.n	8002086 <MX_UART8_Init+0x6a>
  {
    Error_Handler();
 8002082:	f000 fae1 	bl	8002648 <Error_Handler>
  }
  if (HAL_UARTEx_SetRxFifoThreshold(&huart8, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
 8002086:	2100      	movs	r1, #0
 8002088:	4808      	ldr	r0, [pc, #32]	@ (80020ac <MX_UART8_Init+0x90>)
 800208a:	f00d fe50 	bl	800fd2e <HAL_UARTEx_SetRxFifoThreshold>
 800208e:	4603      	mov	r3, r0
 8002090:	2b00      	cmp	r3, #0
 8002092:	d001      	beq.n	8002098 <MX_UART8_Init+0x7c>
  {
    Error_Handler();
 8002094:	f000 fad8 	bl	8002648 <Error_Handler>
  }
  if (HAL_UARTEx_DisableFifoMode(&huart8) != HAL_OK)
 8002098:	4804      	ldr	r0, [pc, #16]	@ (80020ac <MX_UART8_Init+0x90>)
 800209a:	f00d fdd1 	bl	800fc40 <HAL_UARTEx_DisableFifoMode>
 800209e:	4603      	mov	r3, r0
 80020a0:	2b00      	cmp	r3, #0
 80020a2:	d001      	beq.n	80020a8 <MX_UART8_Init+0x8c>
  {
    Error_Handler();
 80020a4:	f000 fad0 	bl	8002648 <Error_Handler>
  }
  /* USER CODE BEGIN UART8_Init 2 */

  /* USER CODE END UART8_Init 2 */

}
 80020a8:	bf00      	nop
 80020aa:	bd80      	pop	{r7, pc}
 80020ac:	24000280 	.word	0x24000280
 80020b0:	40007c00 	.word	0x40007c00

080020b4 <MX_USART1_UART_Init>:
  * @brief USART1 Initialization Function
  * @param None
  * @retval None
  */
static void MX_USART1_UART_Init(void)
{
 80020b4:	b580      	push	{r7, lr}
 80020b6:	af00      	add	r7, sp, #0
  /* USER CODE END USART1_Init 0 */

  /* USER CODE BEGIN USART1_Init 1 */

  /* USER CODE END USART1_Init 1 */
  huart1.Instance = USART1;
 80020b8:	4b24      	ldr	r3, [pc, #144]	@ (800214c <MX_USART1_UART_Init+0x98>)
 80020ba:	4a25      	ldr	r2, [pc, #148]	@ (8002150 <MX_USART1_UART_Init+0x9c>)
 80020bc:	601a      	str	r2, [r3, #0]
  huart1.Init.BaudRate = 115200;
 80020be:	4b23      	ldr	r3, [pc, #140]	@ (800214c <MX_USART1_UART_Init+0x98>)
 80020c0:	f44f 32e1 	mov.w	r2, #115200	@ 0x1c200
 80020c4:	605a      	str	r2, [r3, #4]
  huart1.Init.WordLength = UART_WORDLENGTH_8B;
 80020c6:	4b21      	ldr	r3, [pc, #132]	@ (800214c <MX_USART1_UART_Init+0x98>)
 80020c8:	2200      	movs	r2, #0
 80020ca:	609a      	str	r2, [r3, #8]
  huart1.Init.StopBits = UART_STOPBITS_1;
 80020cc:	4b1f      	ldr	r3, [pc, #124]	@ (800214c <MX_USART1_UART_Init+0x98>)
 80020ce:	2200      	movs	r2, #0
 80020d0:	60da      	str	r2, [r3, #12]
  huart1.Init.Parity = UART_PARITY_NONE;
 80020d2:	4b1e      	ldr	r3, [pc, #120]	@ (800214c <MX_USART1_UART_Init+0x98>)
 80020d4:	2200      	movs	r2, #0
 80020d6:	611a      	str	r2, [r3, #16]
  huart1.Init.Mode = UART_MODE_TX_RX;
 80020d8:	4b1c      	ldr	r3, [pc, #112]	@ (800214c <MX_USART1_UART_Init+0x98>)
 80020da:	220c      	movs	r2, #12
 80020dc:	615a      	str	r2, [r3, #20]
  huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
 80020de:	4b1b      	ldr	r3, [pc, #108]	@ (800214c <MX_USART1_UART_Init+0x98>)
 80020e0:	2200      	movs	r2, #0
 80020e2:	619a      	str	r2, [r3, #24]
  huart1.Init.OverSampling = UART_OVERSAMPLING_16;
 80020e4:	4b19      	ldr	r3, [pc, #100]	@ (800214c <MX_USART1_UART_Init+0x98>)
 80020e6:	2200      	movs	r2, #0
 80020e8:	61da      	str	r2, [r3, #28]
  huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
 80020ea:	4b18      	ldr	r3, [pc, #96]	@ (800214c <MX_USART1_UART_Init+0x98>)
 80020ec:	2200      	movs	r2, #0
 80020ee:	621a      	str	r2, [r3, #32]
  huart1.Init.ClockPrescaler = UART_PRESCALER_DIV1;
 80020f0:	4b16      	ldr	r3, [pc, #88]	@ (800214c <MX_USART1_UART_Init+0x98>)
 80020f2:	2200      	movs	r2, #0
 80020f4:	625a      	str	r2, [r3, #36]	@ 0x24
  huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_TXINVERT_INIT;
 80020f6:	4b15      	ldr	r3, [pc, #84]	@ (800214c <MX_USART1_UART_Init+0x98>)
 80020f8:	2201      	movs	r2, #1
 80020fa:	629a      	str	r2, [r3, #40]	@ 0x28
  huart1.AdvancedInit.TxPinLevelInvert = UART_ADVFEATURE_TXINV_ENABLE;
 80020fc:	4b13      	ldr	r3, [pc, #76]	@ (800214c <MX_USART1_UART_Init+0x98>)
 80020fe:	f44f 3200 	mov.w	r2, #131072	@ 0x20000
 8002102:	62da      	str	r2, [r3, #44]	@ 0x2c
  if (HAL_UART_Init(&huart1) != HAL_OK)
 8002104:	4811      	ldr	r0, [pc, #68]	@ (800214c <MX_USART1_UART_Init+0x98>)
 8002106:	f00b f89d 	bl	800d244 <HAL_UART_Init>
 800210a:	4603      	mov	r3, r0
 800210c:	2b00      	cmp	r3, #0
 800210e:	d001      	beq.n	8002114 <MX_USART1_UART_Init+0x60>
  {
    Error_Handler();
 8002110:	f000 fa9a 	bl	8002648 <Error_Handler>
  }
  if (HAL_UARTEx_SetTxFifoThreshold(&huart1, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
 8002114:	2100      	movs	r1, #0
 8002116:	480d      	ldr	r0, [pc, #52]	@ (800214c <MX_USART1_UART_Init+0x98>)
 8002118:	f00d fdcb 	bl	800fcb2 <HAL_UARTEx_SetTxFifoThreshold>
 800211c:	4603      	mov	r3, r0
 800211e:	2b00      	cmp	r3, #0
 8002120:	d001      	beq.n	8002126 <MX_USART1_UART_Init+0x72>
  {
    Error_Handler();
 8002122:	f000 fa91 	bl	8002648 <Error_Handler>
  }
  if (HAL_UARTEx_SetRxFifoThreshold(&huart1, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
 8002126:	2100      	movs	r1, #0
 8002128:	4808      	ldr	r0, [pc, #32]	@ (800214c <MX_USART1_UART_Init+0x98>)
 800212a:	f00d fe00 	bl	800fd2e <HAL_UARTEx_SetRxFifoThreshold>
 800212e:	4603      	mov	r3, r0
 8002130:	2b00      	cmp	r3, #0
 8002132:	d001      	beq.n	8002138 <MX_USART1_UART_Init+0x84>
  {
    Error_Handler();
 8002134:	f000 fa88 	bl	8002648 <Error_Handler>
  }
  if (HAL_UARTEx_DisableFifoMode(&huart1) != HAL_OK)
 8002138:	4804      	ldr	r0, [pc, #16]	@ (800214c <MX_USART1_UART_Init+0x98>)
 800213a:	f00d fd81 	bl	800fc40 <HAL_UARTEx_DisableFifoMode>
 800213e:	4603      	mov	r3, r0
 8002140:	2b00      	cmp	r3, #0
 8002142:	d001      	beq.n	8002148 <MX_USART1_UART_Init+0x94>
  {
    Error_Handler();
 8002144:	f000 fa80 	bl	8002648 <Error_Handler>
  }
  /* USER CODE BEGIN USART1_Init 2 */

  /* USER CODE END USART1_Init 2 */

}
 8002148:	bf00      	nop
 800214a:	bd80      	pop	{r7, pc}
 800214c:	24000314 	.word	0x24000314
 8002150:	40011000 	.word	0x40011000

08002154 <MX_USART2_UART_Init>:
  * @brief USART2 Initialization Function
  * @param None
  * @retval None
  */
static void MX_USART2_UART_Init(void)
{
 8002154:	b580      	push	{r7, lr}
 8002156:	af00      	add	r7, sp, #0
  /* USER CODE END USART2_Init 0 */

  /* USER CODE BEGIN USART2_Init 1 */

  /* USER CODE END USART2_Init 1 */
  huart2.Instance = USART2;
 8002158:	4b24      	ldr	r3, [pc, #144]	@ (80021ec <MX_USART2_UART_Init+0x98>)
 800215a:	4a25      	ldr	r2, [pc, #148]	@ (80021f0 <MX_USART2_UART_Init+0x9c>)
 800215c:	601a      	str	r2, [r3, #0]
  huart2.Init.BaudRate = 115200;
 800215e:	4b23      	ldr	r3, [pc, #140]	@ (80021ec <MX_USART2_UART_Init+0x98>)
 8002160:	f44f 32e1 	mov.w	r2, #115200	@ 0x1c200
 8002164:	605a      	str	r2, [r3, #4]
  huart2.Init.WordLength = UART_WORDLENGTH_8B;
 8002166:	4b21      	ldr	r3, [pc, #132]	@ (80021ec <MX_USART2_UART_Init+0x98>)
 8002168:	2200      	movs	r2, #0
 800216a:	609a      	str	r2, [r3, #8]
  huart2.Init.StopBits = UART_STOPBITS_1;
 800216c:	4b1f      	ldr	r3, [pc, #124]	@ (80021ec <MX_USART2_UART_Init+0x98>)
 800216e:	2200      	movs	r2, #0
 8002170:	60da      	str	r2, [r3, #12]
  huart2.Init.Parity = UART_PARITY_NONE;
 8002172:	4b1e      	ldr	r3, [pc, #120]	@ (80021ec <MX_USART2_UART_Init+0x98>)
 8002174:	2200      	movs	r2, #0
 8002176:	611a      	str	r2, [r3, #16]
  huart2.Init.Mode = UART_MODE_TX_RX;
 8002178:	4b1c      	ldr	r3, [pc, #112]	@ (80021ec <MX_USART2_UART_Init+0x98>)
 800217a:	220c      	movs	r2, #12
 800217c:	615a      	str	r2, [r3, #20]
  huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE;
 800217e:	4b1b      	ldr	r3, [pc, #108]	@ (80021ec <MX_USART2_UART_Init+0x98>)
 8002180:	2200      	movs	r2, #0
 8002182:	619a      	str	r2, [r3, #24]
  huart2.Init.OverSampling = UART_OVERSAMPLING_16;
 8002184:	4b19      	ldr	r3, [pc, #100]	@ (80021ec <MX_USART2_UART_Init+0x98>)
 8002186:	2200      	movs	r2, #0
 8002188:	61da      	str	r2, [r3, #28]
  huart2.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
 800218a:	4b18      	ldr	r3, [pc, #96]	@ (80021ec <MX_USART2_UART_Init+0x98>)
 800218c:	2200      	movs	r2, #0
 800218e:	621a      	str	r2, [r3, #32]
  huart2.Init.ClockPrescaler = UART_PRESCALER_DIV1;
 8002190:	4b16      	ldr	r3, [pc, #88]	@ (80021ec <MX_USART2_UART_Init+0x98>)
 8002192:	2200      	movs	r2, #0
 8002194:	625a      	str	r2, [r3, #36]	@ 0x24
  huart2.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_TXINVERT_INIT;
 8002196:	4b15      	ldr	r3, [pc, #84]	@ (80021ec <MX_USART2_UART_Init+0x98>)
 8002198:	2201      	movs	r2, #1
 800219a:	629a      	str	r2, [r3, #40]	@ 0x28
  huart2.AdvancedInit.TxPinLevelInvert = UART_ADVFEATURE_TXINV_ENABLE;
 800219c:	4b13      	ldr	r3, [pc, #76]	@ (80021ec <MX_USART2_UART_Init+0x98>)
 800219e:	f44f 3200 	mov.w	r2, #131072	@ 0x20000
 80021a2:	62da      	str	r2, [r3, #44]	@ 0x2c
  if (HAL_UART_Init(&huart2) != HAL_OK)
 80021a4:	4811      	ldr	r0, [pc, #68]	@ (80021ec <MX_USART2_UART_Init+0x98>)
 80021a6:	f00b f84d 	bl	800d244 <HAL_UART_Init>
 80021aa:	4603      	mov	r3, r0
 80021ac:	2b00      	cmp	r3, #0
 80021ae:	d001      	beq.n	80021b4 <MX_USART2_UART_Init+0x60>
  {
    Error_Handler();
 80021b0:	f000 fa4a 	bl	8002648 <Error_Handler>
  }
  if (HAL_UARTEx_SetTxFifoThreshold(&huart2, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
 80021b4:	2100      	movs	r1, #0
 80021b6:	480d      	ldr	r0, [pc, #52]	@ (80021ec <MX_USART2_UART_Init+0x98>)
 80021b8:	f00d fd7b 	bl	800fcb2 <HAL_UARTEx_SetTxFifoThreshold>
 80021bc:	4603      	mov	r3, r0
 80021be:	2b00      	cmp	r3, #0
 80021c0:	d001      	beq.n	80021c6 <MX_USART2_UART_Init+0x72>
  {
    Error_Handler();
 80021c2:	f000 fa41 	bl	8002648 <Error_Handler>
  }
  if (HAL_UARTEx_SetRxFifoThreshold(&huart2, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
 80021c6:	2100      	movs	r1, #0
 80021c8:	4808      	ldr	r0, [pc, #32]	@ (80021ec <MX_USART2_UART_Init+0x98>)
 80021ca:	f00d fdb0 	bl	800fd2e <HAL_UARTEx_SetRxFifoThreshold>
 80021ce:	4603      	mov	r3, r0
 80021d0:	2b00      	cmp	r3, #0
 80021d2:	d001      	beq.n	80021d8 <MX_USART2_UART_Init+0x84>
  {
    Error_Handler();
 80021d4:	f000 fa38 	bl	8002648 <Error_Handler>
  }
  if (HAL_UARTEx_DisableFifoMode(&huart2) != HAL_OK)
 80021d8:	4804      	ldr	r0, [pc, #16]	@ (80021ec <MX_USART2_UART_Init+0x98>)
 80021da:	f00d fd31 	bl	800fc40 <HAL_UARTEx_DisableFifoMode>
 80021de:	4603      	mov	r3, r0
 80021e0:	2b00      	cmp	r3, #0
 80021e2:	d001      	beq.n	80021e8 <MX_USART2_UART_Init+0x94>
  {
    Error_Handler();
 80021e4:	f000 fa30 	bl	8002648 <Error_Handler>
  }
  /* USER CODE BEGIN USART2_Init 2 */

  /* USER CODE END USART2_Init 2 */

}
 80021e8:	bf00      	nop
 80021ea:	bd80      	pop	{r7, pc}
 80021ec:	240003a8 	.word	0x240003a8
 80021f0:	40004400 	.word	0x40004400

080021f4 <MX_USART3_UART_Init>:
  * @brief USART3 Initialization Function
  * @param None
  * @retval None
  */
static void MX_USART3_UART_Init(void)
{
 80021f4:	b580      	push	{r7, lr}
 80021f6:	af00      	add	r7, sp, #0
  /* USER CODE END USART3_Init 0 */

  /* USER CODE BEGIN USART3_Init 1 */

  /* USER CODE END USART3_Init 1 */
  huart3.Instance = USART3;
 80021f8:	4b24      	ldr	r3, [pc, #144]	@ (800228c <MX_USART3_UART_Init+0x98>)
 80021fa:	4a25      	ldr	r2, [pc, #148]	@ (8002290 <MX_USART3_UART_Init+0x9c>)
 80021fc:	601a      	str	r2, [r3, #0]
  huart3.Init.BaudRate = 115200;
 80021fe:	4b23      	ldr	r3, [pc, #140]	@ (800228c <MX_USART3_UART_Init+0x98>)
 8002200:	f44f 32e1 	mov.w	r2, #115200	@ 0x1c200
 8002204:	605a      	str	r2, [r3, #4]
  huart3.Init.WordLength = UART_WORDLENGTH_8B;
 8002206:	4b21      	ldr	r3, [pc, #132]	@ (800228c <MX_USART3_UART_Init+0x98>)
 8002208:	2200      	movs	r2, #0
 800220a:	609a      	str	r2, [r3, #8]
  huart3.Init.StopBits = UART_STOPBITS_1;
 800220c:	4b1f      	ldr	r3, [pc, #124]	@ (800228c <MX_USART3_UART_Init+0x98>)
 800220e:	2200      	movs	r2, #0
 8002210:	60da      	str	r2, [r3, #12]
  huart3.Init.Parity = UART_PARITY_NONE;
 8002212:	4b1e      	ldr	r3, [pc, #120]	@ (800228c <MX_USART3_UART_Init+0x98>)
 8002214:	2200      	movs	r2, #0
 8002216:	611a      	str	r2, [r3, #16]
  huart3.Init.Mode = UART_MODE_TX_RX;
 8002218:	4b1c      	ldr	r3, [pc, #112]	@ (800228c <MX_USART3_UART_Init+0x98>)
 800221a:	220c      	movs	r2, #12
 800221c:	615a      	str	r2, [r3, #20]
  huart3.Init.HwFlowCtl = UART_HWCONTROL_NONE;
 800221e:	4b1b      	ldr	r3, [pc, #108]	@ (800228c <MX_USART3_UART_Init+0x98>)
 8002220:	2200      	movs	r2, #0
 8002222:	619a      	str	r2, [r3, #24]
  huart3.Init.OverSampling = UART_OVERSAMPLING_16;
 8002224:	4b19      	ldr	r3, [pc, #100]	@ (800228c <MX_USART3_UART_Init+0x98>)
 8002226:	2200      	movs	r2, #0
 8002228:	61da      	str	r2, [r3, #28]
  huart3.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
 800222a:	4b18      	ldr	r3, [pc, #96]	@ (800228c <MX_USART3_UART_Init+0x98>)
 800222c:	2200      	movs	r2, #0
 800222e:	621a      	str	r2, [r3, #32]
  huart3.Init.ClockPrescaler = UART_PRESCALER_DIV1;
 8002230:	4b16      	ldr	r3, [pc, #88]	@ (800228c <MX_USART3_UART_Init+0x98>)
 8002232:	2200      	movs	r2, #0
 8002234:	625a      	str	r2, [r3, #36]	@ 0x24
  huart3.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_TXINVERT_INIT;
 8002236:	4b15      	ldr	r3, [pc, #84]	@ (800228c <MX_USART3_UART_Init+0x98>)
 8002238:	2201      	movs	r2, #1
 800223a:	629a      	str	r2, [r3, #40]	@ 0x28
  huart3.AdvancedInit.TxPinLevelInvert = UART_ADVFEATURE_TXINV_ENABLE;
 800223c:	4b13      	ldr	r3, [pc, #76]	@ (800228c <MX_USART3_UART_Init+0x98>)
 800223e:	f44f 3200 	mov.w	r2, #131072	@ 0x20000
 8002242:	62da      	str	r2, [r3, #44]	@ 0x2c
  if (HAL_UART_Init(&huart3) != HAL_OK)
 8002244:	4811      	ldr	r0, [pc, #68]	@ (800228c <MX_USART3_UART_Init+0x98>)
 8002246:	f00a fffd 	bl	800d244 <HAL_UART_Init>
 800224a:	4603      	mov	r3, r0
 800224c:	2b00      	cmp	r3, #0
 800224e:	d001      	beq.n	8002254 <MX_USART3_UART_Init+0x60>
  {
    Error_Handler();
 8002250:	f000 f9fa 	bl	8002648 <Error_Handler>
  }
  if (HAL_UARTEx_SetTxFifoThreshold(&huart3, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
 8002254:	2100      	movs	r1, #0
 8002256:	480d      	ldr	r0, [pc, #52]	@ (800228c <MX_USART3_UART_Init+0x98>)
 8002258:	f00d fd2b 	bl	800fcb2 <HAL_UARTEx_SetTxFifoThreshold>
 800225c:	4603      	mov	r3, r0
 800225e:	2b00      	cmp	r3, #0
 8002260:	d001      	beq.n	8002266 <MX_USART3_UART_Init+0x72>
  {
    Error_Handler();
 8002262:	f000 f9f1 	bl	8002648 <Error_Handler>
  }
  if (HAL_UARTEx_SetRxFifoThreshold(&huart3, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
 8002266:	2100      	movs	r1, #0
 8002268:	4808      	ldr	r0, [pc, #32]	@ (800228c <MX_USART3_UART_Init+0x98>)
 800226a:	f00d fd60 	bl	800fd2e <HAL_UARTEx_SetRxFifoThreshold>
 800226e:	4603      	mov	r3, r0
 8002270:	2b00      	cmp	r3, #0
 8002272:	d001      	beq.n	8002278 <MX_USART3_UART_Init+0x84>
  {
    Error_Handler();
 8002274:	f000 f9e8 	bl	8002648 <Error_Handler>
  }
  if (HAL_UARTEx_DisableFifoMode(&huart3) != HAL_OK)
 8002278:	4804      	ldr	r0, [pc, #16]	@ (800228c <MX_USART3_UART_Init+0x98>)
 800227a:	f00d fce1 	bl	800fc40 <HAL_UARTEx_DisableFifoMode>
 800227e:	4603      	mov	r3, r0
 8002280:	2b00      	cmp	r3, #0
 8002282:	d001      	beq.n	8002288 <MX_USART3_UART_Init+0x94>
  {
    Error_Handler();
 8002284:	f000 f9e0 	bl	8002648 <Error_Handler>
  }
  /* USER CODE BEGIN USART3_Init 2 */

  /* USER CODE END USART3_Init 2 */

}
 8002288:	bf00      	nop
 800228a:	bd80      	pop	{r7, pc}
 800228c:	2400043c 	.word	0x2400043c
 8002290:	40004800 	.word	0x40004800

08002294 <MX_USART6_UART_Init>:
  * @brief USART6 Initialization Function
  * @param None
  * @retval None
  */
static void MX_USART6_UART_Init(void)
{
 8002294:	b580      	push	{r7, lr}
 8002296:	af00      	add	r7, sp, #0
  /* USER CODE END USART6_Init 0 */

  /* USER CODE BEGIN USART6_Init 1 */

  /* USER CODE END USART6_Init 1 */
  huart6.Instance = USART6;
 8002298:	4b24      	ldr	r3, [pc, #144]	@ (800232c <MX_USART6_UART_Init+0x98>)
 800229a:	4a25      	ldr	r2, [pc, #148]	@ (8002330 <MX_USART6_UART_Init+0x9c>)
 800229c:	601a      	str	r2, [r3, #0]
  huart6.Init.BaudRate = 115200;
 800229e:	4b23      	ldr	r3, [pc, #140]	@ (800232c <MX_USART6_UART_Init+0x98>)
 80022a0:	f44f 32e1 	mov.w	r2, #115200	@ 0x1c200
 80022a4:	605a      	str	r2, [r3, #4]
  huart6.Init.WordLength = UART_WORDLENGTH_8B;
 80022a6:	4b21      	ldr	r3, [pc, #132]	@ (800232c <MX_USART6_UART_Init+0x98>)
 80022a8:	2200      	movs	r2, #0
 80022aa:	609a      	str	r2, [r3, #8]
  huart6.Init.StopBits = UART_STOPBITS_1;
 80022ac:	4b1f      	ldr	r3, [pc, #124]	@ (800232c <MX_USART6_UART_Init+0x98>)
 80022ae:	2200      	movs	r2, #0
 80022b0:	60da      	str	r2, [r3, #12]
  huart6.Init.Parity = UART_PARITY_NONE;
 80022b2:	4b1e      	ldr	r3, [pc, #120]	@ (800232c <MX_USART6_UART_Init+0x98>)
 80022b4:	2200      	movs	r2, #0
 80022b6:	611a      	str	r2, [r3, #16]
  huart6.Init.Mode = UART_MODE_TX_RX;
 80022b8:	4b1c      	ldr	r3, [pc, #112]	@ (800232c <MX_USART6_UART_Init+0x98>)
 80022ba:	220c      	movs	r2, #12
 80022bc:	615a      	str	r2, [r3, #20]
  huart6.Init.HwFlowCtl = UART_HWCONTROL_NONE;
 80022be:	4b1b      	ldr	r3, [pc, #108]	@ (800232c <MX_USART6_UART_Init+0x98>)
 80022c0:	2200      	movs	r2, #0
 80022c2:	619a      	str	r2, [r3, #24]
  huart6.Init.OverSampling = UART_OVERSAMPLING_16;
 80022c4:	4b19      	ldr	r3, [pc, #100]	@ (800232c <MX_USART6_UART_Init+0x98>)
 80022c6:	2200      	movs	r2, #0
 80022c8:	61da      	str	r2, [r3, #28]
  huart6.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
 80022ca:	4b18      	ldr	r3, [pc, #96]	@ (800232c <MX_USART6_UART_Init+0x98>)
 80022cc:	2200      	movs	r2, #0
 80022ce:	621a      	str	r2, [r3, #32]
  huart6.Init.ClockPrescaler = UART_PRESCALER_DIV1;
 80022d0:	4b16      	ldr	r3, [pc, #88]	@ (800232c <MX_USART6_UART_Init+0x98>)
 80022d2:	2200      	movs	r2, #0
 80022d4:	625a      	str	r2, [r3, #36]	@ 0x24
  huart6.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_TXINVERT_INIT;
 80022d6:	4b15      	ldr	r3, [pc, #84]	@ (800232c <MX_USART6_UART_Init+0x98>)
 80022d8:	2201      	movs	r2, #1
 80022da:	629a      	str	r2, [r3, #40]	@ 0x28
  huart6.AdvancedInit.TxPinLevelInvert = UART_ADVFEATURE_TXINV_ENABLE;
 80022dc:	4b13      	ldr	r3, [pc, #76]	@ (800232c <MX_USART6_UART_Init+0x98>)
 80022de:	f44f 3200 	mov.w	r2, #131072	@ 0x20000
 80022e2:	62da      	str	r2, [r3, #44]	@ 0x2c
  if (HAL_UART_Init(&huart6) != HAL_OK)
 80022e4:	4811      	ldr	r0, [pc, #68]	@ (800232c <MX_USART6_UART_Init+0x98>)
 80022e6:	f00a ffad 	bl	800d244 <HAL_UART_Init>
 80022ea:	4603      	mov	r3, r0
 80022ec:	2b00      	cmp	r3, #0
 80022ee:	d001      	beq.n	80022f4 <MX_USART6_UART_Init+0x60>
  {
    Error_Handler();
 80022f0:	f000 f9aa 	bl	8002648 <Error_Handler>
  }
  if (HAL_UARTEx_SetTxFifoThreshold(&huart6, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
 80022f4:	2100      	movs	r1, #0
 80022f6:	480d      	ldr	r0, [pc, #52]	@ (800232c <MX_USART6_UART_Init+0x98>)
 80022f8:	f00d fcdb 	bl	800fcb2 <HAL_UARTEx_SetTxFifoThreshold>
 80022fc:	4603      	mov	r3, r0
 80022fe:	2b00      	cmp	r3, #0
 8002300:	d001      	beq.n	8002306 <MX_USART6_UART_Init+0x72>
  {
    Error_Handler();
 8002302:	f000 f9a1 	bl	8002648 <Error_Handler>
  }
  if (HAL_UARTEx_SetRxFifoThreshold(&huart6, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
 8002306:	2100      	movs	r1, #0
 8002308:	4808      	ldr	r0, [pc, #32]	@ (800232c <MX_USART6_UART_Init+0x98>)
 800230a:	f00d fd10 	bl	800fd2e <HAL_UARTEx_SetRxFifoThreshold>
 800230e:	4603      	mov	r3, r0
 8002310:	2b00      	cmp	r3, #0
 8002312:	d001      	beq.n	8002318 <MX_USART6_UART_Init+0x84>
  {
    Error_Handler();
 8002314:	f000 f998 	bl	8002648 <Error_Handler>
  }
  if (HAL_UARTEx_DisableFifoMode(&huart6) != HAL_OK)
 8002318:	4804      	ldr	r0, [pc, #16]	@ (800232c <MX_USART6_UART_Init+0x98>)
 800231a:	f00d fc91 	bl	800fc40 <HAL_UARTEx_DisableFifoMode>
 800231e:	4603      	mov	r3, r0
 8002320:	2b00      	cmp	r3, #0
 8002322:	d001      	beq.n	8002328 <MX_USART6_UART_Init+0x94>
  {
    Error_Handler();
 8002324:	f000 f990 	bl	8002648 <Error_Handler>
  }
  /* USER CODE BEGIN USART6_Init 2 */

  /* USER CODE END USART6_Init 2 */

}
 8002328:	bf00      	nop
 800232a:	bd80      	pop	{r7, pc}
 800232c:	240004d0 	.word	0x240004d0
 8002330:	40011400 	.word	0x40011400

08002334 <MX_DMA_Init>:

/**
  * Enable DMA controller clock
  */
static void MX_DMA_Init(void)
{
 8002334:	b580      	push	{r7, lr}
 8002336:	b082      	sub	sp, #8
 8002338:	af00      	add	r7, sp, #0

  /* DMA controller clock enable */
  __HAL_RCC_DMA2_CLK_ENABLE();
 800233a:	4b11      	ldr	r3, [pc, #68]	@ (8002380 <MX_DMA_Init+0x4c>)
 800233c:	f8d3 30d8 	ldr.w	r3, [r3, #216]	@ 0xd8
 8002340:	4a0f      	ldr	r2, [pc, #60]	@ (8002380 <MX_DMA_Init+0x4c>)
 8002342:	f043 0302 	orr.w	r3, r3, #2
 8002346:	f8c2 30d8 	str.w	r3, [r2, #216]	@ 0xd8
 800234a:	4b0d      	ldr	r3, [pc, #52]	@ (8002380 <MX_DMA_Init+0x4c>)
 800234c:	f8d3 30d8 	ldr.w	r3, [r3, #216]	@ 0xd8
 8002350:	f003 0302 	and.w	r3, r3, #2
 8002354:	607b      	str	r3, [r7, #4]
 8002356:	687b      	ldr	r3, [r7, #4]

  /* DMA interrupt init */
  /* DMA2_Stream6_IRQn interrupt configuration */
  HAL_NVIC_SetPriority(DMA2_Stream6_IRQn, 5, 0);
 8002358:	2200      	movs	r2, #0
 800235a:	2105      	movs	r1, #5
 800235c:	2045      	movs	r0, #69	@ 0x45
 800235e:	f003 f877 	bl	8005450 <HAL_NVIC_SetPriority>
  HAL_NVIC_EnableIRQ(DMA2_Stream6_IRQn);
 8002362:	2045      	movs	r0, #69	@ 0x45
 8002364:	f003 f88e 	bl	8005484 <HAL_NVIC_EnableIRQ>
  /* DMA2_Stream7_IRQn interrupt configuration */
  HAL_NVIC_SetPriority(DMA2_Stream7_IRQn, 5, 0);
 8002368:	2200      	movs	r2, #0
 800236a:	2105      	movs	r1, #5
 800236c:	2046      	movs	r0, #70	@ 0x46
 800236e:	f003 f86f 	bl	8005450 <HAL_NVIC_SetPriority>
  HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn);
 8002372:	2046      	movs	r0, #70	@ 0x46
 8002374:	f003 f886 	bl	8005484 <HAL_NVIC_EnableIRQ>

}
 8002378:	bf00      	nop
 800237a:	3708      	adds	r7, #8
 800237c:	46bd      	mov	sp, r7
 800237e:	bd80      	pop	{r7, pc}
 8002380:	58024400 	.word	0x58024400

08002384 <MX_GPIO_Init>:
  * @brief GPIO Initialization Function
  * @param None
  * @retval None
  */
static void MX_GPIO_Init(void)
{
 8002384:	b580      	push	{r7, lr}
 8002386:	b08c      	sub	sp, #48	@ 0x30
 8002388:	af00      	add	r7, sp, #0
  GPIO_InitTypeDef GPIO_InitStruct = {0};
 800238a:	f107 031c 	add.w	r3, r7, #28
 800238e:	2200      	movs	r2, #0
 8002390:	601a      	str	r2, [r3, #0]
 8002392:	605a      	str	r2, [r3, #4]
 8002394:	609a      	str	r2, [r3, #8]
 8002396:	60da      	str	r2, [r3, #12]
 8002398:	611a      	str	r2, [r3, #16]
/* USER CODE BEGIN MX_GPIO_Init_1 */
/* USER CODE END MX_GPIO_Init_1 */

  /* GPIO Ports Clock Enable */
  __HAL_RCC_GPIOE_CLK_ENABLE();
 800239a:	4b5b      	ldr	r3, [pc, #364]	@ (8002508 <MX_GPIO_Init+0x184>)
 800239c:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 80023a0:	4a59      	ldr	r2, [pc, #356]	@ (8002508 <MX_GPIO_Init+0x184>)
 80023a2:	f043 0310 	orr.w	r3, r3, #16
 80023a6:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 80023aa:	4b57      	ldr	r3, [pc, #348]	@ (8002508 <MX_GPIO_Init+0x184>)
 80023ac:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 80023b0:	f003 0310 	and.w	r3, r3, #16
 80023b4:	61bb      	str	r3, [r7, #24]
 80023b6:	69bb      	ldr	r3, [r7, #24]
  __HAL_RCC_GPIOH_CLK_ENABLE();
 80023b8:	4b53      	ldr	r3, [pc, #332]	@ (8002508 <MX_GPIO_Init+0x184>)
 80023ba:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 80023be:	4a52      	ldr	r2, [pc, #328]	@ (8002508 <MX_GPIO_Init+0x184>)
 80023c0:	f043 0380 	orr.w	r3, r3, #128	@ 0x80
 80023c4:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 80023c8:	4b4f      	ldr	r3, [pc, #316]	@ (8002508 <MX_GPIO_Init+0x184>)
 80023ca:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 80023ce:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 80023d2:	617b      	str	r3, [r7, #20]
 80023d4:	697b      	ldr	r3, [r7, #20]
  __HAL_RCC_GPIOC_CLK_ENABLE();
 80023d6:	4b4c      	ldr	r3, [pc, #304]	@ (8002508 <MX_GPIO_Init+0x184>)
 80023d8:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 80023dc:	4a4a      	ldr	r2, [pc, #296]	@ (8002508 <MX_GPIO_Init+0x184>)
 80023de:	f043 0304 	orr.w	r3, r3, #4
 80023e2:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 80023e6:	4b48      	ldr	r3, [pc, #288]	@ (8002508 <MX_GPIO_Init+0x184>)
 80023e8:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 80023ec:	f003 0304 	and.w	r3, r3, #4
 80023f0:	613b      	str	r3, [r7, #16]
 80023f2:	693b      	ldr	r3, [r7, #16]
  __HAL_RCC_GPIOA_CLK_ENABLE();
 80023f4:	4b44      	ldr	r3, [pc, #272]	@ (8002508 <MX_GPIO_Init+0x184>)
 80023f6:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 80023fa:	4a43      	ldr	r2, [pc, #268]	@ (8002508 <MX_GPIO_Init+0x184>)
 80023fc:	f043 0301 	orr.w	r3, r3, #1
 8002400:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 8002404:	4b40      	ldr	r3, [pc, #256]	@ (8002508 <MX_GPIO_Init+0x184>)
 8002406:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 800240a:	f003 0301 	and.w	r3, r3, #1
 800240e:	60fb      	str	r3, [r7, #12]
 8002410:	68fb      	ldr	r3, [r7, #12]
  __HAL_RCC_GPIOB_CLK_ENABLE();
 8002412:	4b3d      	ldr	r3, [pc, #244]	@ (8002508 <MX_GPIO_Init+0x184>)
 8002414:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8002418:	4a3b      	ldr	r2, [pc, #236]	@ (8002508 <MX_GPIO_Init+0x184>)
 800241a:	f043 0302 	orr.w	r3, r3, #2
 800241e:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 8002422:	4b39      	ldr	r3, [pc, #228]	@ (8002508 <MX_GPIO_Init+0x184>)
 8002424:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8002428:	f003 0302 	and.w	r3, r3, #2
 800242c:	60bb      	str	r3, [r7, #8]
 800242e:	68bb      	ldr	r3, [r7, #8]
  __HAL_RCC_GPIOD_CLK_ENABLE();
 8002430:	4b35      	ldr	r3, [pc, #212]	@ (8002508 <MX_GPIO_Init+0x184>)
 8002432:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8002436:	4a34      	ldr	r2, [pc, #208]	@ (8002508 <MX_GPIO_Init+0x184>)
 8002438:	f043 0308 	orr.w	r3, r3, #8
 800243c:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 8002440:	4b31      	ldr	r3, [pc, #196]	@ (8002508 <MX_GPIO_Init+0x184>)
 8002442:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8002446:	f003 0308 	and.w	r3, r3, #8
 800244a:	607b      	str	r3, [r7, #4]
 800244c:	687b      	ldr	r3, [r7, #4]

  /*Configure GPIO pin Output Level */
  HAL_GPIO_WritePin(GPIOE, GPIO_PIN_2|GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_5, GPIO_PIN_RESET);
 800244e:	2200      	movs	r2, #0
 8002450:	213c      	movs	r1, #60	@ 0x3c
 8002452:	482e      	ldr	r0, [pc, #184]	@ (800250c <MX_GPIO_Init+0x188>)
 8002454:	f007 fbd4 	bl	8009c00 <HAL_GPIO_WritePin>

  /*Configure GPIO pin Output Level */
  HAL_GPIO_WritePin(GPIOD, GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14, GPIO_PIN_RESET);
 8002458:	2200      	movs	r2, #0
 800245a:	f44f 41f0 	mov.w	r1, #30720	@ 0x7800
 800245e:	482c      	ldr	r0, [pc, #176]	@ (8002510 <MX_GPIO_Init+0x18c>)
 8002460:	f007 fbce 	bl	8009c00 <HAL_GPIO_WritePin>

  /*Configure GPIO pins : PE2 PE3 PE4 PE5 */
  GPIO_InitStruct.Pin = GPIO_PIN_2|GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_5;
 8002464:	233c      	movs	r3, #60	@ 0x3c
 8002466:	61fb      	str	r3, [r7, #28]
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 8002468:	2301      	movs	r3, #1
 800246a:	623b      	str	r3, [r7, #32]
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 800246c:	2300      	movs	r3, #0
 800246e:	627b      	str	r3, [r7, #36]	@ 0x24
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 8002470:	2300      	movs	r3, #0
 8002472:	62bb      	str	r3, [r7, #40]	@ 0x28
  HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
 8002474:	f107 031c 	add.w	r3, r7, #28
 8002478:	4619      	mov	r1, r3
 800247a:	4824      	ldr	r0, [pc, #144]	@ (800250c <MX_GPIO_Init+0x188>)
 800247c:	f007 fa10 	bl	80098a0 <HAL_GPIO_Init>

  /*Configure GPIO pins : PD11 PD12 PD13 PD14 */
  GPIO_InitStruct.Pin = GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14;
 8002480:	f44f 43f0 	mov.w	r3, #30720	@ 0x7800
 8002484:	61fb      	str	r3, [r7, #28]
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 8002486:	2301      	movs	r3, #1
 8002488:	623b      	str	r3, [r7, #32]
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 800248a:	2300      	movs	r3, #0
 800248c:	627b      	str	r3, [r7, #36]	@ 0x24
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 800248e:	2300      	movs	r3, #0
 8002490:	62bb      	str	r3, [r7, #40]	@ 0x28
  HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
 8002492:	f107 031c 	add.w	r3, r7, #28
 8002496:	4619      	mov	r1, r3
 8002498:	481d      	ldr	r0, [pc, #116]	@ (8002510 <MX_GPIO_Init+0x18c>)
 800249a:	f007 fa01 	bl	80098a0 <HAL_GPIO_Init>

  /*Configure GPIO pins : PD1 PD2 PD4 */
  GPIO_InitStruct.Pin = GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_4;
 800249e:	2316      	movs	r3, #22
 80024a0:	61fb      	str	r3, [r7, #28]
  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
 80024a2:	2300      	movs	r3, #0
 80024a4:	623b      	str	r3, [r7, #32]
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 80024a6:	2300      	movs	r3, #0
 80024a8:	627b      	str	r3, [r7, #36]	@ 0x24
  HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
 80024aa:	f107 031c 	add.w	r3, r7, #28
 80024ae:	4619      	mov	r1, r3
 80024b0:	4817      	ldr	r0, [pc, #92]	@ (8002510 <MX_GPIO_Init+0x18c>)
 80024b2:	f007 f9f5 	bl	80098a0 <HAL_GPIO_Init>

/* USER CODE BEGIN MX_GPIO_Init_2 */
  GPIO_InitStruct.Pin = GPIO_PIN_14|GPIO_PIN_15;
 80024b6:	f44f 4340 	mov.w	r3, #49152	@ 0xc000
 80024ba:	61fb      	str	r3, [r7, #28]
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 80024bc:	2301      	movs	r3, #1
 80024be:	623b      	str	r3, [r7, #32]
  GPIO_InitStruct.Pull = GPIO_PULLUP;
 80024c0:	2301      	movs	r3, #1
 80024c2:	627b      	str	r3, [r7, #36]	@ 0x24
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 80024c4:	2300      	movs	r3, #0
 80024c6:	62bb      	str	r3, [r7, #40]	@ 0x28
  HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
 80024c8:	f107 031c 	add.w	r3, r7, #28
 80024cc:	4619      	mov	r1, r3
 80024ce:	480f      	ldr	r0, [pc, #60]	@ (800250c <MX_GPIO_Init+0x188>)
 80024d0:	f007 f9e6 	bl	80098a0 <HAL_GPIO_Init>
  HAL_GPIO_WritePin(GPIOE, GPIO_PIN_14, GPIO_PIN_RESET);
 80024d4:	2200      	movs	r2, #0
 80024d6:	f44f 4180 	mov.w	r1, #16384	@ 0x4000
 80024da:	480c      	ldr	r0, [pc, #48]	@ (800250c <MX_GPIO_Init+0x188>)
 80024dc:	f007 fb90 	bl	8009c00 <HAL_GPIO_WritePin>
  HAL_Delay(100);
 80024e0:	2064      	movs	r0, #100	@ 0x64
 80024e2:	f002 feb9 	bl	8005258 <HAL_Delay>
  HAL_GPIO_WritePin(GPIOE, GPIO_PIN_14, GPIO_PIN_SET);
 80024e6:	2201      	movs	r2, #1
 80024e8:	f44f 4180 	mov.w	r1, #16384	@ 0x4000
 80024ec:	4807      	ldr	r0, [pc, #28]	@ (800250c <MX_GPIO_Init+0x188>)
 80024ee:	f007 fb87 	bl	8009c00 <HAL_GPIO_WritePin>
  HAL_GPIO_WritePin(GPIOE, GPIO_PIN_15, GPIO_PIN_SET);
 80024f2:	2201      	movs	r2, #1
 80024f4:	f44f 4100 	mov.w	r1, #32768	@ 0x8000
 80024f8:	4804      	ldr	r0, [pc, #16]	@ (800250c <MX_GPIO_Init+0x188>)
 80024fa:	f007 fb81 	bl	8009c00 <HAL_GPIO_WritePin>
//	HAL_GPIO_WritePin(GPIOB, GPIO_PIN_14, GPIO_PIN_RESET);
//	HAL_GPIO_WritePin(GPIOB, GPIO_PIN_14, GPIO_PIN_SET);
//	HAL_GPIO_WritePin(GPIOB, GPIO_PIN_14, GPIO_PIN_RESET);
//	HAL_GPIO_WritePin(GPIOB, GPIO_PIN_14, GPIO_PIN_SET);
/* USER CODE END MX_GPIO_Init_2 */
}
 80024fe:	bf00      	nop
 8002500:	3730      	adds	r7, #48	@ 0x30
 8002502:	46bd      	mov	sp, r7
 8002504:	bd80      	pop	{r7, pc}
 8002506:	bf00      	nop
 8002508:	58024400 	.word	0x58024400
 800250c:	58021000 	.word	0x58021000
 8002510:	58020c00 	.word	0x58020c00

08002514 <StartDefaultTask>:
  * @param  argument: Not used
  * @retval None
  */
/* USER CODE END Header_StartDefaultTask */
void StartDefaultTask(void *argument)
{
 8002514:	b580      	push	{r7, lr}
 8002516:	b082      	sub	sp, #8
 8002518:	af00      	add	r7, sp, #0
 800251a:	6078      	str	r0, [r7, #4]
  /* init code for LWIP */
  MX_LWIP_Init();
 800251c:	f00d fd04 	bl	800ff28 <MX_LWIP_Init>
  /* USER CODE BEGIN 5 */
  /* Infinite loop */
  for(;;)
  {
    osDelay(pdMS_TO_TICKS(1000));
 8002520:	f44f 707a 	mov.w	r0, #1000	@ 0x3e8
 8002524:	f00e fcd3 	bl	8010ece <osDelay>
 8002528:	e7fa      	b.n	8002520 <StartDefaultTask+0xc>

0800252a <relay1TimerCallback>:
  /* USER CODE END 5 */
}

/* relay1TimerCallback function */
void relay1TimerCallback(void *argument)
{
 800252a:	b480      	push	{r7}
 800252c:	b083      	sub	sp, #12
 800252e:	af00      	add	r7, sp, #0
 8002530:	6078      	str	r0, [r7, #4]
  /* USER CODE BEGIN relay1TimerCallback */

  /* USER CODE END relay1TimerCallback */
}
 8002532:	bf00      	nop
 8002534:	370c      	adds	r7, #12
 8002536:	46bd      	mov	sp, r7
 8002538:	f85d 7b04 	ldr.w	r7, [sp], #4
 800253c:	4770      	bx	lr

0800253e <relay2TimerCallback>:

/* relay2TimerCallback function */
void relay2TimerCallback(void *argument)
{
 800253e:	b480      	push	{r7}
 8002540:	b083      	sub	sp, #12
 8002542:	af00      	add	r7, sp, #0
 8002544:	6078      	str	r0, [r7, #4]
  /* USER CODE BEGIN relay2TimerCallback */

  /* USER CODE END relay2TimerCallback */
}
 8002546:	bf00      	nop
 8002548:	370c      	adds	r7, #12
 800254a:	46bd      	mov	sp, r7
 800254c:	f85d 7b04 	ldr.w	r7, [sp], #4
 8002550:	4770      	bx	lr

08002552 <relay3TimerCallback>:

/* relay3TimerCallback function */
void relay3TimerCallback(void *argument)
{
 8002552:	b480      	push	{r7}
 8002554:	b083      	sub	sp, #12
 8002556:	af00      	add	r7, sp, #0
 8002558:	6078      	str	r0, [r7, #4]
  /* USER CODE BEGIN relay3TimerCallback */

  /* USER CODE END relay3TimerCallback */
}
 800255a:	bf00      	nop
 800255c:	370c      	adds	r7, #12
 800255e:	46bd      	mov	sp, r7
 8002560:	f85d 7b04 	ldr.w	r7, [sp], #4
 8002564:	4770      	bx	lr
	...

08002568 <MPU_Config>:

 /* MPU Configuration */

void MPU_Config(void)
{
 8002568:	b580      	push	{r7, lr}
 800256a:	b084      	sub	sp, #16
 800256c:	af00      	add	r7, sp, #0
  MPU_Region_InitTypeDef MPU_InitStruct = {0};
 800256e:	463b      	mov	r3, r7
 8002570:	2200      	movs	r2, #0
 8002572:	601a      	str	r2, [r3, #0]
 8002574:	605a      	str	r2, [r3, #4]
 8002576:	609a      	str	r2, [r3, #8]
 8002578:	60da      	str	r2, [r3, #12]

  /* Disables the MPU */
  HAL_MPU_Disable();
 800257a:	f002 ff91 	bl	80054a0 <HAL_MPU_Disable>

  /** Initializes and configures the Region and the memory to be protected
  */
  MPU_InitStruct.Enable = MPU_REGION_ENABLE;
 800257e:	2301      	movs	r3, #1
 8002580:	703b      	strb	r3, [r7, #0]
  MPU_InitStruct.Number = MPU_REGION_NUMBER0;
 8002582:	2300      	movs	r3, #0
 8002584:	707b      	strb	r3, [r7, #1]
  MPU_InitStruct.BaseAddress = 0x0;
 8002586:	2300      	movs	r3, #0
 8002588:	607b      	str	r3, [r7, #4]
  MPU_InitStruct.Size = MPU_REGION_SIZE_4GB;
 800258a:	231f      	movs	r3, #31
 800258c:	723b      	strb	r3, [r7, #8]
  MPU_InitStruct.SubRegionDisable = 0x87;
 800258e:	2387      	movs	r3, #135	@ 0x87
 8002590:	727b      	strb	r3, [r7, #9]
  MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0;
 8002592:	2300      	movs	r3, #0
 8002594:	72bb      	strb	r3, [r7, #10]
  MPU_InitStruct.AccessPermission = MPU_REGION_NO_ACCESS;
 8002596:	2300      	movs	r3, #0
 8002598:	72fb      	strb	r3, [r7, #11]
  MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_DISABLE;
 800259a:	2301      	movs	r3, #1
 800259c:	733b      	strb	r3, [r7, #12]
  MPU_InitStruct.IsShareable = MPU_ACCESS_SHAREABLE;
 800259e:	2301      	movs	r3, #1
 80025a0:	737b      	strb	r3, [r7, #13]
  MPU_InitStruct.IsCacheable = MPU_ACCESS_NOT_CACHEABLE;
 80025a2:	2300      	movs	r3, #0
 80025a4:	73bb      	strb	r3, [r7, #14]
  MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE;
 80025a6:	2300      	movs	r3, #0
 80025a8:	73fb      	strb	r3, [r7, #15]

  HAL_MPU_ConfigRegion(&MPU_InitStruct);
 80025aa:	463b      	mov	r3, r7
 80025ac:	4618      	mov	r0, r3
 80025ae:	f002 ffaf 	bl	8005510 <HAL_MPU_ConfigRegion>

  /** Initializes and configures the Region and the memory to be protected
  */
  MPU_InitStruct.Number = MPU_REGION_NUMBER1;
 80025b2:	2301      	movs	r3, #1
 80025b4:	707b      	strb	r3, [r7, #1]
  MPU_InitStruct.BaseAddress = 0x24020000;
 80025b6:	4b13      	ldr	r3, [pc, #76]	@ (8002604 <MPU_Config+0x9c>)
 80025b8:	607b      	str	r3, [r7, #4]
  MPU_InitStruct.Size = MPU_REGION_SIZE_128KB;
 80025ba:	2310      	movs	r3, #16
 80025bc:	723b      	strb	r3, [r7, #8]
  MPU_InitStruct.SubRegionDisable = 0x0;
 80025be:	2300      	movs	r3, #0
 80025c0:	727b      	strb	r3, [r7, #9]
  MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL1;
 80025c2:	2301      	movs	r3, #1
 80025c4:	72bb      	strb	r3, [r7, #10]
  MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS;
 80025c6:	2303      	movs	r3, #3
 80025c8:	72fb      	strb	r3, [r7, #11]
  MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE;
 80025ca:	2300      	movs	r3, #0
 80025cc:	737b      	strb	r3, [r7, #13]

  HAL_MPU_ConfigRegion(&MPU_InitStruct);
 80025ce:	463b      	mov	r3, r7
 80025d0:	4618      	mov	r0, r3
 80025d2:	f002 ff9d 	bl	8005510 <HAL_MPU_ConfigRegion>

  /** Initializes and configures the Region and the memory to be protected
  */
  MPU_InitStruct.Number = MPU_REGION_NUMBER2;
 80025d6:	2302      	movs	r3, #2
 80025d8:	707b      	strb	r3, [r7, #1]
  MPU_InitStruct.BaseAddress = 0x24040000;
 80025da:	4b0b      	ldr	r3, [pc, #44]	@ (8002608 <MPU_Config+0xa0>)
 80025dc:	607b      	str	r3, [r7, #4]
  MPU_InitStruct.Size = MPU_REGION_SIZE_512B;
 80025de:	2308      	movs	r3, #8
 80025e0:	723b      	strb	r3, [r7, #8]
  MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0;
 80025e2:	2300      	movs	r3, #0
 80025e4:	72bb      	strb	r3, [r7, #10]
  MPU_InitStruct.IsShareable = MPU_ACCESS_SHAREABLE;
 80025e6:	2301      	movs	r3, #1
 80025e8:	737b      	strb	r3, [r7, #13]
  MPU_InitStruct.IsBufferable = MPU_ACCESS_BUFFERABLE;
 80025ea:	2301      	movs	r3, #1
 80025ec:	73fb      	strb	r3, [r7, #15]

  HAL_MPU_ConfigRegion(&MPU_InitStruct);
 80025ee:	463b      	mov	r3, r7
 80025f0:	4618      	mov	r0, r3
 80025f2:	f002 ff8d 	bl	8005510 <HAL_MPU_ConfigRegion>
  /* Enables the MPU */
  HAL_MPU_Enable(MPU_PRIVILEGED_DEFAULT);
 80025f6:	2004      	movs	r0, #4
 80025f8:	f002 ff6a 	bl	80054d0 <HAL_MPU_Enable>

}
 80025fc:	bf00      	nop
 80025fe:	3710      	adds	r7, #16
 8002600:	46bd      	mov	sp, r7
 8002602:	bd80      	pop	{r7, pc}
 8002604:	24020000 	.word	0x24020000
 8002608:	24040000 	.word	0x24040000

0800260c <HAL_TIM_PeriodElapsedCallback>:
  * a global variable "uwTick" used as application time base.
  * @param  htim : TIM handle
  * @retval None
  */
void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
{
 800260c:	b580      	push	{r7, lr}
 800260e:	b082      	sub	sp, #8
 8002610:	af00      	add	r7, sp, #0
 8002612:	6078      	str	r0, [r7, #4]
  /* USER CODE BEGIN Callback 0 */

  /* USER CODE END Callback 0 */
  if (htim->Instance == TIM6) {
 8002614:	687b      	ldr	r3, [r7, #4]
 8002616:	681b      	ldr	r3, [r3, #0]
 8002618:	4a09      	ldr	r2, [pc, #36]	@ (8002640 <HAL_TIM_PeriodElapsedCallback+0x34>)
 800261a:	4293      	cmp	r3, r2
 800261c:	d101      	bne.n	8002622 <HAL_TIM_PeriodElapsedCallback+0x16>
    HAL_IncTick();
 800261e:	f002 fdfb 	bl	8005218 <HAL_IncTick>
  }
  /* USER CODE BEGIN Callback 1 */
  if (htim->Instance == TIM6) {
 8002622:	687b      	ldr	r3, [r7, #4]
 8002624:	681b      	ldr	r3, [r3, #0]
 8002626:	4a06      	ldr	r2, [pc, #24]	@ (8002640 <HAL_TIM_PeriodElapsedCallback+0x34>)
 8002628:	4293      	cmp	r3, r2
 800262a:	d104      	bne.n	8002636 <HAL_TIM_PeriodElapsedCallback+0x2a>
    MilliTimer++;
 800262c:	4b05      	ldr	r3, [pc, #20]	@ (8002644 <HAL_TIM_PeriodElapsedCallback+0x38>)
 800262e:	681b      	ldr	r3, [r3, #0]
 8002630:	3301      	adds	r3, #1
 8002632:	4a04      	ldr	r2, [pc, #16]	@ (8002644 <HAL_TIM_PeriodElapsedCallback+0x38>)
 8002634:	6013      	str	r3, [r2, #0]
  }
  /* USER CODE END Callback 1 */
}
 8002636:	bf00      	nop
 8002638:	3708      	adds	r7, #8
 800263a:	46bd      	mov	sp, r7
 800263c:	bd80      	pop	{r7, pc}
 800263e:	bf00      	nop
 8002640:	40001000 	.word	0x40001000
 8002644:	2402b104 	.word	0x2402b104

08002648 <Error_Handler>:
/**
  * @brief  This function is executed in case of error occurrence.
  * @retval None
  */
void Error_Handler(void)
{
 8002648:	b480      	push	{r7}
 800264a:	af00      	add	r7, sp, #0
  __ASM volatile ("cpsid i" : : : "memory");
 800264c:	b672      	cpsid	i
}
 800264e:	bf00      	nop
  /* USER CODE BEGIN Error_Handler_Debug */
  /* User can add his own implementation to report the HAL error return state */
  __disable_irq();
  while (1)
 8002650:	bf00      	nop
 8002652:	e7fd      	b.n	8002650 <Error_Handler+0x8>

08002654 <MqttClientSubTask>:
void MqttClientSubTask(void *argument); //mqtt client subscribe task function
void MqttClientPubTask(void *argument); //mqtt client publish task function
int MqttConnectBroker(void); 				//mqtt broker connect function
void MqttMessageArrived(MessageData *msg); //mqtt message callback function

void MqttClientSubTask (void* argument) {
 8002654:	b580      	push	{r7, lr}
 8002656:	b082      	sub	sp, #8
 8002658:	af00      	add	r7, sp, #0
 800265a:	6078      	str	r0, [r7, #4]
    while (1) {
        // waiting for valid ip address
        if (gnetif.ip_addr.addr == 0 || gnetif.netmask.addr == 0 || gnetif.gw.addr == 0) // system has no valid ip address
 800265c:	4b16      	ldr	r3, [pc, #88]	@ (80026b8 <MqttClientSubTask+0x64>)
 800265e:	685b      	ldr	r3, [r3, #4]
 8002660:	2b00      	cmp	r3, #0
 8002662:	d007      	beq.n	8002674 <MqttClientSubTask+0x20>
 8002664:	4b14      	ldr	r3, [pc, #80]	@ (80026b8 <MqttClientSubTask+0x64>)
 8002666:	689b      	ldr	r3, [r3, #8]
 8002668:	2b00      	cmp	r3, #0
 800266a:	d003      	beq.n	8002674 <MqttClientSubTask+0x20>
 800266c:	4b12      	ldr	r3, [pc, #72]	@ (80026b8 <MqttClientSubTask+0x64>)
 800266e:	68db      	ldr	r3, [r3, #12]
 8002670:	2b00      	cmp	r3, #0
 8002672:	d104      	bne.n	800267e <MqttClientSubTask+0x2a>
        {
            osDelay (pdMS_TO_TICKS (1000));
 8002674:	f44f 707a 	mov.w	r0, #1000	@ 0x3e8
 8002678:	f00e fc29 	bl	8010ece <osDelay>
            continue;
 800267c:	e003      	b.n	8002686 <MqttClientSubTask+0x32>
        } else {
            printf ("DHCP/Static IP O.K.\n");
 800267e:	480f      	ldr	r0, [pc, #60]	@ (80026bc <MqttClientSubTask+0x68>)
 8002680:	f027 fe04 	bl	802a28c <puts>
            break;
 8002684:	e000      	b.n	8002688 <MqttClientSubTask+0x34>
        if (gnetif.ip_addr.addr == 0 || gnetif.netmask.addr == 0 || gnetif.gw.addr == 0) // system has no valid ip address
 8002686:	e7e9      	b.n	800265c <MqttClientSubTask+0x8>
        }
    }

    while (1) {
        if (!mqttClient.isconnected) {
 8002688:	4b0d      	ldr	r3, [pc, #52]	@ (80026c0 <MqttClientSubTask+0x6c>)
 800268a:	6a1b      	ldr	r3, [r3, #32]
 800268c:	2b00      	cmp	r3, #0
 800268e:	d109      	bne.n	80026a4 <MqttClientSubTask+0x50>
            // try to connect to the broker
            if (MqttConnectBroker () != MQTT_SUCCESS) {
 8002690:	f000 fb44 	bl	8002d1c <MqttConnectBroker>
 8002694:	4603      	mov	r3, r0
 8002696:	2b00      	cmp	r3, #0
 8002698:	d0f6      	beq.n	8002688 <MqttClientSubTask+0x34>
                osDelay (pdMS_TO_TICKS (1000));
 800269a:	f44f 707a 	mov.w	r0, #1000	@ 0x3e8
 800269e:	f00e fc16 	bl	8010ece <osDelay>
 80026a2:	e7f1      	b.n	8002688 <MqttClientSubTask+0x34>
            }
        } else {
            MQTTYield (&mqttClient, 500); // handle timer
 80026a4:	f44f 71fa 	mov.w	r1, #500	@ 0x1f4
 80026a8:	4805      	ldr	r0, [pc, #20]	@ (80026c0 <MqttClientSubTask+0x6c>)
 80026aa:	f024 fef1 	bl	8027490 <MQTTYield>
            osDelay (pdMS_TO_TICKS (100));
 80026ae:	2064      	movs	r0, #100	@ 0x64
 80026b0:	f00e fc0d 	bl	8010ece <osDelay>
        if (!mqttClient.isconnected) {
 80026b4:	e7e8      	b.n	8002688 <MqttClientSubTask+0x34>
 80026b6:	bf00      	nop
 80026b8:	24002244 	.word	0x24002244
 80026bc:	0802cd9c 	.word	0x0802cd9c
 80026c0:	24000730 	.word	0x24000730

080026c4 <MqttClientPubTask>:
        }
    }
}

void MqttClientPubTask (void* argument) {
 80026c4:	b580      	push	{r7, lr}
 80026c6:	f5ad 7d16 	sub.w	sp, sp, #600	@ 0x258
 80026ca:	af04      	add	r7, sp, #16
 80026cc:	f507 7312 	add.w	r3, r7, #584	@ 0x248
 80026d0:	f5a3 7311 	sub.w	r3, r3, #580	@ 0x244
 80026d4:	6018      	str	r0, [r3, #0]
    char messageBuffer[512]  = { 0x00 };
 80026d6:	f507 7312 	add.w	r3, r7, #584	@ 0x248
 80026da:	f5a3 7304 	sub.w	r3, r3, #528	@ 0x210
 80026de:	2200      	movs	r2, #0
 80026e0:	601a      	str	r2, [r3, #0]
 80026e2:	3304      	adds	r3, #4
 80026e4:	f44f 72fe 	mov.w	r2, #508	@ 0x1fc
 80026e8:	2100      	movs	r1, #0
 80026ea:	4618      	mov	r0, r3
 80026ec:	f027 fef8 	bl	802a4e0 <memset>
    char topicTextBuffer[32] = { 0x00 };
 80026f0:	f507 7312 	add.w	r3, r7, #584	@ 0x248
 80026f4:	f5a3 730c 	sub.w	r3, r3, #560	@ 0x230
 80026f8:	2200      	movs	r2, #0
 80026fa:	601a      	str	r2, [r3, #0]
 80026fc:	3304      	adds	r3, #4
 80026fe:	2200      	movs	r2, #0
 8002700:	601a      	str	r2, [r3, #0]
 8002702:	605a      	str	r2, [r3, #4]
 8002704:	609a      	str	r2, [r3, #8]
 8002706:	60da      	str	r2, [r3, #12]
 8002708:	611a      	str	r2, [r3, #16]
 800270a:	615a      	str	r2, [r3, #20]
 800270c:	619a      	str	r2, [r3, #24]
    uint32_t bytesInBuffer   = 0;
 800270e:	2300      	movs	r3, #0
 8002710:	f8c7 3240 	str.w	r3, [r7, #576]	@ 0x240
    uint8_t boardNumber      = 0;
 8002714:	2300      	movs	r3, #0
 8002716:	f887 3247 	strb.w	r3, [r7, #583]	@ 0x247
    MQTTMessage message;

    while (1) {
        if (mqttClient.isconnected) {
 800271a:	4b93      	ldr	r3, [pc, #588]	@ (8002968 <MqttClientPubTask+0x2a4>)
 800271c:	6a1b      	ldr	r3, [r3, #32]
 800271e:	2b00      	cmp	r3, #0
 8002720:	f000 82ce 	beq.w	8002cc0 <MqttClientPubTask+0x5fc>
            if (is_link_up ()) {
 8002724:	f00d fbf0 	bl	800ff08 <is_link_up>
 8002728:	4603      	mov	r3, r0
 800272a:	2b00      	cmp	r3, #0
 800272c:	f000 82c8 	beq.w	8002cc0 <MqttClientPubTask+0x5fc>
                for (boardNumber = 0; boardNumber < SLAVES_COUNT; boardNumber++) {
 8002730:	2300      	movs	r3, #0
 8002732:	f887 3247 	strb.w	r3, [r7, #583]	@ 0x247
 8002736:	e10e      	b.n	8002956 <MqttClientPubTask+0x292>
                    osMutexAcquire (resMeasurementsMutex, osWaitForever);
 8002738:	4b8c      	ldr	r3, [pc, #560]	@ (800296c <MqttClientPubTask+0x2a8>)
 800273a:	681b      	ldr	r3, [r3, #0]
 800273c:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 8002740:	4618      	mov	r0, r3
 8002742:	f00e fcf7 	bl	8011134 <osMutexAcquire>
                    RESMeasurements* resMeas = &resMeasurements[boardNumber];
 8002746:	f897 2247 	ldrb.w	r2, [r7, #583]	@ 0x247
 800274a:	4613      	mov	r3, r2
 800274c:	011b      	lsls	r3, r3, #4
 800274e:	1a9b      	subs	r3, r3, r2
 8002750:	009b      	lsls	r3, r3, #2
 8002752:	4a87      	ldr	r2, [pc, #540]	@ (8002970 <MqttClientPubTask+0x2ac>)
 8002754:	4413      	add	r3, r2
 8002756:	f8c7 3238 	str.w	r3, [r7, #568]	@ 0x238
                    sprintf (topicTextBuffer, "RESmeasurments/%d", boardNumber + 1);
 800275a:	f897 3247 	ldrb.w	r3, [r7, #583]	@ 0x247
 800275e:	1c5a      	adds	r2, r3, #1
 8002760:	f107 0318 	add.w	r3, r7, #24
 8002764:	4983      	ldr	r1, [pc, #524]	@ (8002974 <MqttClientPubTask+0x2b0>)
 8002766:	4618      	mov	r0, r3
 8002768:	f027 fd98 	bl	802a29c <siprintf>
                    bytesInBuffer = sprintf (messageBuffer, "{\"voltageRMS\":[%.2f, %.2f, %.2f], ", resMeas->voltageRMS[0], resMeas->voltageRMS[1], resMeas->voltageRMS[2]);
 800276c:	f8d7 3238 	ldr.w	r3, [r7, #568]	@ 0x238
 8002770:	edd3 7a00 	vldr	s15, [r3]
 8002774:	eeb7 5ae7 	vcvt.f64.f32	d5, s15
 8002778:	f8d7 3238 	ldr.w	r3, [r7, #568]	@ 0x238
 800277c:	edd3 7a01 	vldr	s15, [r3, #4]
 8002780:	eeb7 7ae7 	vcvt.f64.f32	d7, s15
 8002784:	f8d7 3238 	ldr.w	r3, [r7, #568]	@ 0x238
 8002788:	edd3 6a02 	vldr	s13, [r3, #8]
 800278c:	eeb7 6ae6 	vcvt.f64.f32	d6, s13
 8002790:	f107 0038 	add.w	r0, r7, #56	@ 0x38
 8002794:	ed8d 6b02 	vstr	d6, [sp, #8]
 8002798:	ed8d 7b00 	vstr	d7, [sp]
 800279c:	ec53 2b15 	vmov	r2, r3, d5
 80027a0:	4975      	ldr	r1, [pc, #468]	@ (8002978 <MqttClientPubTask+0x2b4>)
 80027a2:	f027 fd7b 	bl	802a29c <siprintf>
 80027a6:	4603      	mov	r3, r0
 80027a8:	f8c7 3240 	str.w	r3, [r7, #576]	@ 0x240
                    bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"voltagePeak\":[%.2f, %.2f, %.2f], ", resMeas->voltagePeak[0], resMeas->voltagePeak[1], resMeas->voltagePeak[2]);
 80027ac:	f107 0238 	add.w	r2, r7, #56	@ 0x38
 80027b0:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 80027b4:	18d0      	adds	r0, r2, r3
 80027b6:	f8d7 3238 	ldr.w	r3, [r7, #568]	@ 0x238
 80027ba:	edd3 7a03 	vldr	s15, [r3, #12]
 80027be:	eeb7 5ae7 	vcvt.f64.f32	d5, s15
 80027c2:	f8d7 3238 	ldr.w	r3, [r7, #568]	@ 0x238
 80027c6:	edd3 7a04 	vldr	s15, [r3, #16]
 80027ca:	eeb7 7ae7 	vcvt.f64.f32	d7, s15
 80027ce:	f8d7 3238 	ldr.w	r3, [r7, #568]	@ 0x238
 80027d2:	edd3 6a05 	vldr	s13, [r3, #20]
 80027d6:	eeb7 6ae6 	vcvt.f64.f32	d6, s13
 80027da:	ed8d 6b02 	vstr	d6, [sp, #8]
 80027de:	ed8d 7b00 	vstr	d7, [sp]
 80027e2:	ec53 2b15 	vmov	r2, r3, d5
 80027e6:	4965      	ldr	r1, [pc, #404]	@ (800297c <MqttClientPubTask+0x2b8>)
 80027e8:	f027 fd58 	bl	802a29c <siprintf>
 80027ec:	4603      	mov	r3, r0
 80027ee:	461a      	mov	r2, r3
 80027f0:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 80027f4:	4413      	add	r3, r2
 80027f6:	f8c7 3240 	str.w	r3, [r7, #576]	@ 0x240
                    bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"currentRMS\":[%.3f, %.3f, %.3f], ", resMeas->currentRMS[0], resMeas->currentRMS[1], resMeas->currentRMS[2]);
 80027fa:	f107 0238 	add.w	r2, r7, #56	@ 0x38
 80027fe:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002802:	18d0      	adds	r0, r2, r3
 8002804:	f8d7 3238 	ldr.w	r3, [r7, #568]	@ 0x238
 8002808:	edd3 7a06 	vldr	s15, [r3, #24]
 800280c:	eeb7 5ae7 	vcvt.f64.f32	d5, s15
 8002810:	f8d7 3238 	ldr.w	r3, [r7, #568]	@ 0x238
 8002814:	edd3 7a07 	vldr	s15, [r3, #28]
 8002818:	eeb7 7ae7 	vcvt.f64.f32	d7, s15
 800281c:	f8d7 3238 	ldr.w	r3, [r7, #568]	@ 0x238
 8002820:	edd3 6a08 	vldr	s13, [r3, #32]
 8002824:	eeb7 6ae6 	vcvt.f64.f32	d6, s13
 8002828:	ed8d 6b02 	vstr	d6, [sp, #8]
 800282c:	ed8d 7b00 	vstr	d7, [sp]
 8002830:	ec53 2b15 	vmov	r2, r3, d5
 8002834:	4952      	ldr	r1, [pc, #328]	@ (8002980 <MqttClientPubTask+0x2bc>)
 8002836:	f027 fd31 	bl	802a29c <siprintf>
 800283a:	4603      	mov	r3, r0
 800283c:	461a      	mov	r2, r3
 800283e:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002842:	4413      	add	r3, r2
 8002844:	f8c7 3240 	str.w	r3, [r7, #576]	@ 0x240
                    bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"currentPeak\":[%.3f, %.3f, %.3f], ", resMeas->currentPeak[0], resMeas->currentPeak[1], resMeas->currentPeak[2]);
 8002848:	f107 0238 	add.w	r2, r7, #56	@ 0x38
 800284c:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002850:	18d0      	adds	r0, r2, r3
 8002852:	f8d7 3238 	ldr.w	r3, [r7, #568]	@ 0x238
 8002856:	edd3 7a09 	vldr	s15, [r3, #36]	@ 0x24
 800285a:	eeb7 5ae7 	vcvt.f64.f32	d5, s15
 800285e:	f8d7 3238 	ldr.w	r3, [r7, #568]	@ 0x238
 8002862:	edd3 7a0a 	vldr	s15, [r3, #40]	@ 0x28
 8002866:	eeb7 7ae7 	vcvt.f64.f32	d7, s15
 800286a:	f8d7 3238 	ldr.w	r3, [r7, #568]	@ 0x238
 800286e:	edd3 6a0b 	vldr	s13, [r3, #44]	@ 0x2c
 8002872:	eeb7 6ae6 	vcvt.f64.f32	d6, s13
 8002876:	ed8d 6b02 	vstr	d6, [sp, #8]
 800287a:	ed8d 7b00 	vstr	d7, [sp]
 800287e:	ec53 2b15 	vmov	r2, r3, d5
 8002882:	4940      	ldr	r1, [pc, #256]	@ (8002984 <MqttClientPubTask+0x2c0>)
 8002884:	f027 fd0a 	bl	802a29c <siprintf>
 8002888:	4603      	mov	r3, r0
 800288a:	461a      	mov	r2, r3
 800288c:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002890:	4413      	add	r3, r2
 8002892:	f8c7 3240 	str.w	r3, [r7, #576]	@ 0x240
                    bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"power\":[%.2f, %.2f, %.2f], ", resMeas->power[0], resMeas->power[1], resMeas->power[2]);
 8002896:	f107 0238 	add.w	r2, r7, #56	@ 0x38
 800289a:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 800289e:	18d0      	adds	r0, r2, r3
 80028a0:	f8d7 3238 	ldr.w	r3, [r7, #568]	@ 0x238
 80028a4:	edd3 7a0c 	vldr	s15, [r3, #48]	@ 0x30
 80028a8:	eeb7 5ae7 	vcvt.f64.f32	d5, s15
 80028ac:	f8d7 3238 	ldr.w	r3, [r7, #568]	@ 0x238
 80028b0:	edd3 7a0d 	vldr	s15, [r3, #52]	@ 0x34
 80028b4:	eeb7 7ae7 	vcvt.f64.f32	d7, s15
 80028b8:	f8d7 3238 	ldr.w	r3, [r7, #568]	@ 0x238
 80028bc:	edd3 6a0e 	vldr	s13, [r3, #56]	@ 0x38
 80028c0:	eeb7 6ae6 	vcvt.f64.f32	d6, s13
 80028c4:	ed8d 6b02 	vstr	d6, [sp, #8]
 80028c8:	ed8d 7b00 	vstr	d7, [sp]
 80028cc:	ec53 2b15 	vmov	r2, r3, d5
 80028d0:	492d      	ldr	r1, [pc, #180]	@ (8002988 <MqttClientPubTask+0x2c4>)
 80028d2:	f027 fce3 	bl	802a29c <siprintf>
 80028d6:	4603      	mov	r3, r0
 80028d8:	461a      	mov	r2, r3
 80028da:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 80028de:	4413      	add	r3, r2
 80028e0:	f8c7 3240 	str.w	r3, [r7, #576]	@ 0x240
                    bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"lastSeen\": %ld}", slaveLastSeen[boardNumber]);
 80028e4:	f107 0238 	add.w	r2, r7, #56	@ 0x38
 80028e8:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 80028ec:	18d0      	adds	r0, r2, r3
 80028ee:	f897 3247 	ldrb.w	r3, [r7, #583]	@ 0x247
 80028f2:	4a26      	ldr	r2, [pc, #152]	@ (800298c <MqttClientPubTask+0x2c8>)
 80028f4:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
 80028f8:	461a      	mov	r2, r3
 80028fa:	4925      	ldr	r1, [pc, #148]	@ (8002990 <MqttClientPubTask+0x2cc>)
 80028fc:	f027 fcce 	bl	802a29c <siprintf>
 8002900:	4603      	mov	r3, r0
 8002902:	461a      	mov	r2, r3
 8002904:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002908:	4413      	add	r3, r2
 800290a:	f8c7 3240 	str.w	r3, [r7, #576]	@ 0x240
                    osMutexRelease (resMeasurementsMutex);
 800290e:	4b17      	ldr	r3, [pc, #92]	@ (800296c <MqttClientPubTask+0x2a8>)
 8002910:	681b      	ldr	r3, [r3, #0]
 8002912:	4618      	mov	r0, r3
 8002914:	f00e fc59 	bl	80111ca <osMutexRelease>
                    message.payload    = (void*)messageBuffer;
 8002918:	f507 7312 	add.w	r3, r7, #584	@ 0x248
 800291c:	f5a3 7310 	sub.w	r3, r3, #576	@ 0x240
 8002920:	f107 0238 	add.w	r2, r7, #56	@ 0x38
 8002924:	609a      	str	r2, [r3, #8]
                    message.payloadlen = strlen (messageBuffer);
 8002926:	f107 0338 	add.w	r3, r7, #56	@ 0x38
 800292a:	4618      	mov	r0, r3
 800292c:	f7fd fd38 	bl	80003a0 <strlen>
 8002930:	4602      	mov	r2, r0
 8002932:	f507 7312 	add.w	r3, r7, #584	@ 0x248
 8002936:	f5a3 7310 	sub.w	r3, r3, #576	@ 0x240
 800293a:	60da      	str	r2, [r3, #12]
                    MQTTPublish (&mqttClient, topicTextBuffer, &message); // publish a message
 800293c:	f107 0208 	add.w	r2, r7, #8
 8002940:	f107 0318 	add.w	r3, r7, #24
 8002944:	4619      	mov	r1, r3
 8002946:	4808      	ldr	r0, [pc, #32]	@ (8002968 <MqttClientPubTask+0x2a4>)
 8002948:	f024 ffc1 	bl	80278ce <MQTTPublish>
                for (boardNumber = 0; boardNumber < SLAVES_COUNT; boardNumber++) {
 800294c:	f897 3247 	ldrb.w	r3, [r7, #583]	@ 0x247
 8002950:	3301      	adds	r3, #1
 8002952:	f887 3247 	strb.w	r3, [r7, #583]	@ 0x247
 8002956:	f897 3247 	ldrb.w	r3, [r7, #583]	@ 0x247
 800295a:	2b03      	cmp	r3, #3
 800295c:	f67f aeec 	bls.w	8002738 <MqttClientPubTask+0x74>
                }

                for (boardNumber = 0; boardNumber < SLAVES_COUNT; boardNumber++) {
 8002960:	2300      	movs	r3, #0
 8002962:	f887 3247 	strb.w	r3, [r7, #583]	@ 0x247
 8002966:	e1a6      	b.n	8002cb6 <MqttClientPubTask+0x5f2>
 8002968:	24000730 	.word	0x24000730
 800296c:	24002238 	.word	0x24002238
 8002970:	24002088 	.word	0x24002088
 8002974:	0802cdb0 	.word	0x0802cdb0
 8002978:	0802cdc4 	.word	0x0802cdc4
 800297c:	0802cde8 	.word	0x0802cde8
 8002980:	0802ce0c 	.word	0x0802ce0c
 8002984:	0802ce30 	.word	0x0802ce30
 8002988:	0802ce54 	.word	0x0802ce54
 800298c:	24002228 	.word	0x24002228
 8002990:	0802ce74 	.word	0x0802ce74
                    osMutexAcquire (sensorsInfoMutex, osWaitForever);
 8002994:	4bcd      	ldr	r3, [pc, #820]	@ (8002ccc <MqttClientPubTask+0x608>)
 8002996:	681b      	ldr	r3, [r3, #0]
 8002998:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 800299c:	4618      	mov	r0, r3
 800299e:	f00e fbc9 	bl	8011134 <osMutexAcquire>
                    SesnorsInfo* sensors = &sensorsInfo[boardNumber];
 80029a2:	f897 3247 	ldrb.w	r3, [r7, #583]	@ 0x247
 80029a6:	222c      	movs	r2, #44	@ 0x2c
 80029a8:	fb02 f303 	mul.w	r3, r2, r3
 80029ac:	4ac8      	ldr	r2, [pc, #800]	@ (8002cd0 <MqttClientPubTask+0x60c>)
 80029ae:	4413      	add	r3, r2
 80029b0:	f8c7 323c 	str.w	r3, [r7, #572]	@ 0x23c
                    sprintf (topicTextBuffer, "Sensors/%d", boardNumber + 1);
 80029b4:	f897 3247 	ldrb.w	r3, [r7, #583]	@ 0x247
 80029b8:	1c5a      	adds	r2, r3, #1
 80029ba:	f107 0318 	add.w	r3, r7, #24
 80029be:	49c5      	ldr	r1, [pc, #788]	@ (8002cd4 <MqttClientPubTask+0x610>)
 80029c0:	4618      	mov	r0, r3
 80029c2:	f027 fc6b 	bl	802a29c <siprintf>
                    bytesInBuffer = sprintf (messageBuffer, "{\"pvTemperature\":[%.1f, %.1f], ", sensors->pvTemperature[0], sensors->pvTemperature[1]);
 80029c6:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 80029ca:	edd3 7a00 	vldr	s15, [r3]
 80029ce:	eeb7 6ae7 	vcvt.f64.f32	d6, s15
 80029d2:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 80029d6:	edd3 7a01 	vldr	s15, [r3, #4]
 80029da:	eeb7 7ae7 	vcvt.f64.f32	d7, s15
 80029de:	f107 0038 	add.w	r0, r7, #56	@ 0x38
 80029e2:	ed8d 7b00 	vstr	d7, [sp]
 80029e6:	ec53 2b16 	vmov	r2, r3, d6
 80029ea:	49bb      	ldr	r1, [pc, #748]	@ (8002cd8 <MqttClientPubTask+0x614>)
 80029ec:	f027 fc56 	bl	802a29c <siprintf>
 80029f0:	4603      	mov	r3, r0
 80029f2:	f8c7 3240 	str.w	r3, [r7, #576]	@ 0x240
                    bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"fanVoltage\":%.2f, ", sensors->fanVoltage);
 80029f6:	f107 0238 	add.w	r2, r7, #56	@ 0x38
 80029fa:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 80029fe:	18d0      	adds	r0, r2, r3
 8002a00:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 8002a04:	edd3 7a02 	vldr	s15, [r3, #8]
 8002a08:	eeb7 7ae7 	vcvt.f64.f32	d7, s15
 8002a0c:	ec53 2b17 	vmov	r2, r3, d7
 8002a10:	49b2      	ldr	r1, [pc, #712]	@ (8002cdc <MqttClientPubTask+0x618>)
 8002a12:	f027 fc43 	bl	802a29c <siprintf>
 8002a16:	4603      	mov	r3, r0
 8002a18:	461a      	mov	r2, r3
 8002a1a:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002a1e:	4413      	add	r3, r2
 8002a20:	f8c7 3240 	str.w	r3, [r7, #576]	@ 0x240
                    bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"pvEncoder\":%.2f, ", sensors->pvEncoder);
 8002a24:	f107 0238 	add.w	r2, r7, #56	@ 0x38
 8002a28:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002a2c:	18d0      	adds	r0, r2, r3
 8002a2e:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 8002a32:	edd3 7a03 	vldr	s15, [r3, #12]
 8002a36:	eeb7 7ae7 	vcvt.f64.f32	d7, s15
 8002a3a:	ec53 2b17 	vmov	r2, r3, d7
 8002a3e:	49a8      	ldr	r1, [pc, #672]	@ (8002ce0 <MqttClientPubTask+0x61c>)
 8002a40:	f027 fc2c 	bl	802a29c <siprintf>
 8002a44:	4603      	mov	r3, r0
 8002a46:	461a      	mov	r2, r3
 8002a48:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002a4c:	4413      	add	r3, r2
 8002a4e:	f8c7 3240 	str.w	r3, [r7, #576]	@ 0x240
                    bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"motorXStatus\":%d, ", sensors->motorXStatus);
 8002a52:	f107 0238 	add.w	r2, r7, #56	@ 0x38
 8002a56:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002a5a:	18d0      	adds	r0, r2, r3
 8002a5c:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 8002a60:	7c1b      	ldrb	r3, [r3, #16]
 8002a62:	461a      	mov	r2, r3
 8002a64:	499f      	ldr	r1, [pc, #636]	@ (8002ce4 <MqttClientPubTask+0x620>)
 8002a66:	f027 fc19 	bl	802a29c <siprintf>
 8002a6a:	4603      	mov	r3, r0
 8002a6c:	461a      	mov	r2, r3
 8002a6e:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002a72:	4413      	add	r3, r2
 8002a74:	f8c7 3240 	str.w	r3, [r7, #576]	@ 0x240
                    bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"motorYStatus\":%d, ", sensors->motorYStatus);
 8002a78:	f107 0238 	add.w	r2, r7, #56	@ 0x38
 8002a7c:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002a80:	18d0      	adds	r0, r2, r3
 8002a82:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 8002a86:	7c5b      	ldrb	r3, [r3, #17]
 8002a88:	461a      	mov	r2, r3
 8002a8a:	4997      	ldr	r1, [pc, #604]	@ (8002ce8 <MqttClientPubTask+0x624>)
 8002a8c:	f027 fc06 	bl	802a29c <siprintf>
 8002a90:	4603      	mov	r3, r0
 8002a92:	461a      	mov	r2, r3
 8002a94:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002a98:	4413      	add	r3, r2
 8002a9a:	f8c7 3240 	str.w	r3, [r7, #576]	@ 0x240
                    bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"motorXAveCurrent\":%.3f, ", sensors->motorXAveCurrent);
 8002a9e:	f107 0238 	add.w	r2, r7, #56	@ 0x38
 8002aa2:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002aa6:	18d0      	adds	r0, r2, r3
 8002aa8:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 8002aac:	edd3 7a05 	vldr	s15, [r3, #20]
 8002ab0:	eeb7 7ae7 	vcvt.f64.f32	d7, s15
 8002ab4:	ec53 2b17 	vmov	r2, r3, d7
 8002ab8:	498c      	ldr	r1, [pc, #560]	@ (8002cec <MqttClientPubTask+0x628>)
 8002aba:	f027 fbef 	bl	802a29c <siprintf>
 8002abe:	4603      	mov	r3, r0
 8002ac0:	461a      	mov	r2, r3
 8002ac2:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002ac6:	4413      	add	r3, r2
 8002ac8:	f8c7 3240 	str.w	r3, [r7, #576]	@ 0x240
                    bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"motorYAveCurrent\":%.3f, ", sensors->motorYAveCurrent);
 8002acc:	f107 0238 	add.w	r2, r7, #56	@ 0x38
 8002ad0:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002ad4:	18d0      	adds	r0, r2, r3
 8002ad6:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 8002ada:	edd3 7a06 	vldr	s15, [r3, #24]
 8002ade:	eeb7 7ae7 	vcvt.f64.f32	d7, s15
 8002ae2:	ec53 2b17 	vmov	r2, r3, d7
 8002ae6:	4982      	ldr	r1, [pc, #520]	@ (8002cf0 <MqttClientPubTask+0x62c>)
 8002ae8:	f027 fbd8 	bl	802a29c <siprintf>
 8002aec:	4603      	mov	r3, r0
 8002aee:	461a      	mov	r2, r3
 8002af0:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002af4:	4413      	add	r3, r2
 8002af6:	f8c7 3240 	str.w	r3, [r7, #576]	@ 0x240
                    bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"motorXPeakCurrent\":%.3f, ", sensors->motorXPeakCurrent);
 8002afa:	f107 0238 	add.w	r2, r7, #56	@ 0x38
 8002afe:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002b02:	18d0      	adds	r0, r2, r3
 8002b04:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 8002b08:	edd3 7a07 	vldr	s15, [r3, #28]
 8002b0c:	eeb7 7ae7 	vcvt.f64.f32	d7, s15
 8002b10:	ec53 2b17 	vmov	r2, r3, d7
 8002b14:	4977      	ldr	r1, [pc, #476]	@ (8002cf4 <MqttClientPubTask+0x630>)
 8002b16:	f027 fbc1 	bl	802a29c <siprintf>
 8002b1a:	4603      	mov	r3, r0
 8002b1c:	461a      	mov	r2, r3
 8002b1e:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002b22:	4413      	add	r3, r2
 8002b24:	f8c7 3240 	str.w	r3, [r7, #576]	@ 0x240
                    bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"motorYPeakCurrent\":%.3f, ", sensors->motorYPeakCurrent);
 8002b28:	f107 0238 	add.w	r2, r7, #56	@ 0x38
 8002b2c:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002b30:	18d0      	adds	r0, r2, r3
 8002b32:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 8002b36:	edd3 7a08 	vldr	s15, [r3, #32]
 8002b3a:	eeb7 7ae7 	vcvt.f64.f32	d7, s15
 8002b3e:	ec53 2b17 	vmov	r2, r3, d7
 8002b42:	496d      	ldr	r1, [pc, #436]	@ (8002cf8 <MqttClientPubTask+0x634>)
 8002b44:	f027 fbaa 	bl	802a29c <siprintf>
 8002b48:	4603      	mov	r3, r0
 8002b4a:	461a      	mov	r2, r3
 8002b4c:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002b50:	4413      	add	r3, r2
 8002b52:	f8c7 3240 	str.w	r3, [r7, #576]	@ 0x240
                    bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"limitXSwitchUp\":%d, ", sensors->limitXSwitchUp);
 8002b56:	f107 0238 	add.w	r2, r7, #56	@ 0x38
 8002b5a:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002b5e:	18d0      	adds	r0, r2, r3
 8002b60:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 8002b64:	f893 3024 	ldrb.w	r3, [r3, #36]	@ 0x24
 8002b68:	461a      	mov	r2, r3
 8002b6a:	4964      	ldr	r1, [pc, #400]	@ (8002cfc <MqttClientPubTask+0x638>)
 8002b6c:	f027 fb96 	bl	802a29c <siprintf>
 8002b70:	4603      	mov	r3, r0
 8002b72:	461a      	mov	r2, r3
 8002b74:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002b78:	4413      	add	r3, r2
 8002b7a:	f8c7 3240 	str.w	r3, [r7, #576]	@ 0x240
                    bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"limitXSwitchDown\":%d, ", sensors->limitXSwitchDown);
 8002b7e:	f107 0238 	add.w	r2, r7, #56	@ 0x38
 8002b82:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002b86:	18d0      	adds	r0, r2, r3
 8002b88:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 8002b8c:	f893 3025 	ldrb.w	r3, [r3, #37]	@ 0x25
 8002b90:	461a      	mov	r2, r3
 8002b92:	495b      	ldr	r1, [pc, #364]	@ (8002d00 <MqttClientPubTask+0x63c>)
 8002b94:	f027 fb82 	bl	802a29c <siprintf>
 8002b98:	4603      	mov	r3, r0
 8002b9a:	461a      	mov	r2, r3
 8002b9c:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002ba0:	4413      	add	r3, r2
 8002ba2:	f8c7 3240 	str.w	r3, [r7, #576]	@ 0x240
                    bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"limitXSwitchCenter\":%d, ", sensors->limitXSwitchCenter);
 8002ba6:	f107 0238 	add.w	r2, r7, #56	@ 0x38
 8002baa:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002bae:	18d0      	adds	r0, r2, r3
 8002bb0:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 8002bb4:	f893 3026 	ldrb.w	r3, [r3, #38]	@ 0x26
 8002bb8:	461a      	mov	r2, r3
 8002bba:	4952      	ldr	r1, [pc, #328]	@ (8002d04 <MqttClientPubTask+0x640>)
 8002bbc:	f027 fb6e 	bl	802a29c <siprintf>
 8002bc0:	4603      	mov	r3, r0
 8002bc2:	461a      	mov	r2, r3
 8002bc4:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002bc8:	4413      	add	r3, r2
 8002bca:	f8c7 3240 	str.w	r3, [r7, #576]	@ 0x240
                    bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"limitYSwitchUp\":%d, ", sensors->limitYSwitchUp);
 8002bce:	f107 0238 	add.w	r2, r7, #56	@ 0x38
 8002bd2:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002bd6:	18d0      	adds	r0, r2, r3
 8002bd8:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 8002bdc:	f893 3027 	ldrb.w	r3, [r3, #39]	@ 0x27
 8002be0:	461a      	mov	r2, r3
 8002be2:	4949      	ldr	r1, [pc, #292]	@ (8002d08 <MqttClientPubTask+0x644>)
 8002be4:	f027 fb5a 	bl	802a29c <siprintf>
 8002be8:	4603      	mov	r3, r0
 8002bea:	461a      	mov	r2, r3
 8002bec:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002bf0:	4413      	add	r3, r2
 8002bf2:	f8c7 3240 	str.w	r3, [r7, #576]	@ 0x240
                    bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"limitYSwitchDown\":%d, ", sensors->limitYSwitchDown);
 8002bf6:	f107 0238 	add.w	r2, r7, #56	@ 0x38
 8002bfa:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002bfe:	18d0      	adds	r0, r2, r3
 8002c00:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 8002c04:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8002c08:	461a      	mov	r2, r3
 8002c0a:	4940      	ldr	r1, [pc, #256]	@ (8002d0c <MqttClientPubTask+0x648>)
 8002c0c:	f027 fb46 	bl	802a29c <siprintf>
 8002c10:	4603      	mov	r3, r0
 8002c12:	461a      	mov	r2, r3
 8002c14:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002c18:	4413      	add	r3, r2
 8002c1a:	f8c7 3240 	str.w	r3, [r7, #576]	@ 0x240
                    bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"limitYSwitchCenter\":%d, ", sensors->limitYSwitchCenter);
 8002c1e:	f107 0238 	add.w	r2, r7, #56	@ 0x38
 8002c22:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002c26:	18d0      	adds	r0, r2, r3
 8002c28:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 8002c2c:	f893 3029 	ldrb.w	r3, [r3, #41]	@ 0x29
 8002c30:	461a      	mov	r2, r3
 8002c32:	4937      	ldr	r1, [pc, #220]	@ (8002d10 <MqttClientPubTask+0x64c>)
 8002c34:	f027 fb32 	bl	802a29c <siprintf>
 8002c38:	4603      	mov	r3, r0
 8002c3a:	461a      	mov	r2, r3
 8002c3c:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002c40:	4413      	add	r3, r2
 8002c42:	f8c7 3240 	str.w	r3, [r7, #576]	@ 0x240
                    bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"powerSupplyFailMask\":%d}", sensors->powerSupplyFailMask);
 8002c46:	f107 0238 	add.w	r2, r7, #56	@ 0x38
 8002c4a:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002c4e:	18d0      	adds	r0, r2, r3
 8002c50:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 8002c54:	f893 302a 	ldrb.w	r3, [r3, #42]	@ 0x2a
 8002c58:	461a      	mov	r2, r3
 8002c5a:	492e      	ldr	r1, [pc, #184]	@ (8002d14 <MqttClientPubTask+0x650>)
 8002c5c:	f027 fb1e 	bl	802a29c <siprintf>
 8002c60:	4603      	mov	r3, r0
 8002c62:	461a      	mov	r2, r3
 8002c64:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002c68:	4413      	add	r3, r2
 8002c6a:	f8c7 3240 	str.w	r3, [r7, #576]	@ 0x240

                    osMutexRelease (sensorsInfoMutex);
 8002c6e:	4b17      	ldr	r3, [pc, #92]	@ (8002ccc <MqttClientPubTask+0x608>)
 8002c70:	681b      	ldr	r3, [r3, #0]
 8002c72:	4618      	mov	r0, r3
 8002c74:	f00e faa9 	bl	80111ca <osMutexRelease>
                    message.payload    = (void*)messageBuffer;
 8002c78:	f507 7312 	add.w	r3, r7, #584	@ 0x248
 8002c7c:	f5a3 7310 	sub.w	r3, r3, #576	@ 0x240
 8002c80:	f107 0238 	add.w	r2, r7, #56	@ 0x38
 8002c84:	609a      	str	r2, [r3, #8]
                    message.payloadlen = strlen (messageBuffer);
 8002c86:	f107 0338 	add.w	r3, r7, #56	@ 0x38
 8002c8a:	4618      	mov	r0, r3
 8002c8c:	f7fd fb88 	bl	80003a0 <strlen>
 8002c90:	4602      	mov	r2, r0
 8002c92:	f507 7312 	add.w	r3, r7, #584	@ 0x248
 8002c96:	f5a3 7310 	sub.w	r3, r3, #576	@ 0x240
 8002c9a:	60da      	str	r2, [r3, #12]
                    MQTTPublish (&mqttClient, topicTextBuffer, &message); // publish a message
 8002c9c:	f107 0208 	add.w	r2, r7, #8
 8002ca0:	f107 0318 	add.w	r3, r7, #24
 8002ca4:	4619      	mov	r1, r3
 8002ca6:	481c      	ldr	r0, [pc, #112]	@ (8002d18 <MqttClientPubTask+0x654>)
 8002ca8:	f024 fe11 	bl	80278ce <MQTTPublish>
                for (boardNumber = 0; boardNumber < SLAVES_COUNT; boardNumber++) {
 8002cac:	f897 3247 	ldrb.w	r3, [r7, #583]	@ 0x247
 8002cb0:	3301      	adds	r3, #1
 8002cb2:	f887 3247 	strb.w	r3, [r7, #583]	@ 0x247
 8002cb6:	f897 3247 	ldrb.w	r3, [r7, #583]	@ 0x247
 8002cba:	2b03      	cmp	r3, #3
 8002cbc:	f67f ae6a 	bls.w	8002994 <MqttClientPubTask+0x2d0>
                }
            }
        }

        osDelay (pdMS_TO_TICKS (1000));
 8002cc0:	f44f 707a 	mov.w	r0, #1000	@ 0x3e8
 8002cc4:	f00e f903 	bl	8010ece <osDelay>
        if (mqttClient.isconnected) {
 8002cc8:	e527      	b.n	800271a <MqttClientPubTask+0x56>
 8002cca:	bf00      	nop
 8002ccc:	2400223c 	.word	0x2400223c
 8002cd0:	24002178 	.word	0x24002178
 8002cd4:	0802ce88 	.word	0x0802ce88
 8002cd8:	0802ce94 	.word	0x0802ce94
 8002cdc:	0802ceb4 	.word	0x0802ceb4
 8002ce0:	0802cec8 	.word	0x0802cec8
 8002ce4:	0802cedc 	.word	0x0802cedc
 8002ce8:	0802cef0 	.word	0x0802cef0
 8002cec:	0802cf04 	.word	0x0802cf04
 8002cf0:	0802cf20 	.word	0x0802cf20
 8002cf4:	0802cf3c 	.word	0x0802cf3c
 8002cf8:	0802cf58 	.word	0x0802cf58
 8002cfc:	0802cf74 	.word	0x0802cf74
 8002d00:	0802cf8c 	.word	0x0802cf8c
 8002d04:	0802cfa4 	.word	0x0802cfa4
 8002d08:	0802cfc0 	.word	0x0802cfc0
 8002d0c:	0802cfd8 	.word	0x0802cfd8
 8002d10:	0802cff0 	.word	0x0802cff0
 8002d14:	0802d00c 	.word	0x0802d00c
 8002d18:	24000730 	.word	0x24000730

08002d1c <MqttConnectBroker>:
    }
}

int MqttConnectBroker () {
 8002d1c:	b580      	push	{r7, lr}
 8002d1e:	b09c      	sub	sp, #112	@ 0x70
 8002d20:	af04      	add	r7, sp, #16
    uint8_t boardNumber = 0;
 8002d22:	2300      	movs	r3, #0
 8002d24:	f887 305f 	strb.w	r3, [r7, #95]	@ 0x5f
    int ret;

    NewNetwork (&net);
 8002d28:	4839      	ldr	r0, [pc, #228]	@ (8002e10 <MqttConnectBroker+0xf4>)
 8002d2a:	f024 ff09 	bl	8027b40 <NewNetwork>
    ret = ConnectNetwork (&net, BROKER_IP, MQTT_PORT);
 8002d2e:	f240 725b 	movw	r2, #1883	@ 0x75b
 8002d32:	4938      	ldr	r1, [pc, #224]	@ (8002e14 <MqttConnectBroker+0xf8>)
 8002d34:	4836      	ldr	r0, [pc, #216]	@ (8002e10 <MqttConnectBroker+0xf4>)
 8002d36:	f024 ff1f 	bl	8027b78 <ConnectNetwork>
 8002d3a:	65b8      	str	r0, [r7, #88]	@ 0x58
    if (ret != MQTT_SUCCESS) {
 8002d3c:	6dbb      	ldr	r3, [r7, #88]	@ 0x58
 8002d3e:	2b00      	cmp	r3, #0
 8002d40:	d005      	beq.n	8002d4e <MqttConnectBroker+0x32>
        printf ("ConnectNetwork failed.\n");
 8002d42:	4835      	ldr	r0, [pc, #212]	@ (8002e18 <MqttConnectBroker+0xfc>)
 8002d44:	f027 faa2 	bl	802a28c <puts>
        return -1;
 8002d48:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8002d4c:	e05c      	b.n	8002e08 <MqttConnectBroker+0xec>
    }

    MQTTClientInit (&mqttClient, &net, 1000, sndBuffer, sizeof (sndBuffer), rcvBuffer, sizeof (rcvBuffer));
 8002d4e:	f44f 6380 	mov.w	r3, #1024	@ 0x400
 8002d52:	9302      	str	r3, [sp, #8]
 8002d54:	4b31      	ldr	r3, [pc, #196]	@ (8002e1c <MqttConnectBroker+0x100>)
 8002d56:	9301      	str	r3, [sp, #4]
 8002d58:	f44f 6380 	mov.w	r3, #1024	@ 0x400
 8002d5c:	9300      	str	r3, [sp, #0]
 8002d5e:	4b30      	ldr	r3, [pc, #192]	@ (8002e20 <MqttConnectBroker+0x104>)
 8002d60:	f44f 727a 	mov.w	r2, #1000	@ 0x3e8
 8002d64:	492a      	ldr	r1, [pc, #168]	@ (8002e10 <MqttConnectBroker+0xf4>)
 8002d66:	482f      	ldr	r0, [pc, #188]	@ (8002e24 <MqttConnectBroker+0x108>)
 8002d68:	f024 f824 	bl	8026db4 <MQTTClientInit>

    MQTTPacket_connectData data = MQTTPacket_connectData_initializer;
 8002d6c:	4a2e      	ldr	r2, [pc, #184]	@ (8002e28 <MqttConnectBroker+0x10c>)
 8002d6e:	463b      	mov	r3, r7
 8002d70:	4611      	mov	r1, r2
 8002d72:	2258      	movs	r2, #88	@ 0x58
 8002d74:	4618      	mov	r0, r3
 8002d76:	f027 fcaa 	bl	802a6ce <memcpy>
    data.willFlag               = 0;
 8002d7a:	2300      	movs	r3, #0
 8002d7c:	76fb      	strb	r3, [r7, #27]
    data.MQTTVersion            = 3;
 8002d7e:	2303      	movs	r3, #3
 8002d80:	723b      	strb	r3, [r7, #8]
    data.clientID.cstring       = "test_user1";
 8002d82:	4b2a      	ldr	r3, [pc, #168]	@ (8002e2c <MqttConnectBroker+0x110>)
 8002d84:	60fb      	str	r3, [r7, #12]
    data.username.cstring       = "test_user1";
 8002d86:	4b29      	ldr	r3, [pc, #164]	@ (8002e2c <MqttConnectBroker+0x110>)
 8002d88:	643b      	str	r3, [r7, #64]	@ 0x40
    data.password.cstring       = "1234";
 8002d8a:	4b29      	ldr	r3, [pc, #164]	@ (8002e30 <MqttConnectBroker+0x114>)
 8002d8c:	64fb      	str	r3, [r7, #76]	@ 0x4c
    data.keepAliveInterval      = 100;
 8002d8e:	2364      	movs	r3, #100	@ 0x64
 8002d90:	833b      	strh	r3, [r7, #24]
    data.cleansession           = 1;
 8002d92:	2301      	movs	r3, #1
 8002d94:	76bb      	strb	r3, [r7, #26]

    ret = MQTTConnect (&mqttClient, &data);
 8002d96:	463b      	mov	r3, r7
 8002d98:	4619      	mov	r1, r3
 8002d9a:	4822      	ldr	r0, [pc, #136]	@ (8002e24 <MqttConnectBroker+0x108>)
 8002d9c:	f024 fc66 	bl	802766c <MQTTConnect>
 8002da0:	65b8      	str	r0, [r7, #88]	@ 0x58
    if (ret != MQTT_SUCCESS) {
 8002da2:	6dbb      	ldr	r3, [r7, #88]	@ 0x58
 8002da4:	2b00      	cmp	r3, #0
 8002da6:	d008      	beq.n	8002dba <MqttConnectBroker+0x9e>
        net_disconnect (&net);
 8002da8:	4819      	ldr	r0, [pc, #100]	@ (8002e10 <MqttConnectBroker+0xf4>)
 8002daa:	f024 ff6e 	bl	8027c8a <net_disconnect>
        printf ("MQTTConnect failed. Code %d\n", ret);
 8002dae:	6db9      	ldr	r1, [r7, #88]	@ 0x58
 8002db0:	4820      	ldr	r0, [pc, #128]	@ (8002e34 <MqttConnectBroker+0x118>)
 8002db2:	f027 fa03 	bl	802a1bc <iprintf>
        return ret;
 8002db6:	6dbb      	ldr	r3, [r7, #88]	@ 0x58
 8002db8:	e026      	b.n	8002e08 <MqttConnectBroker+0xec>
    }

    for (boardNumber = 0; boardNumber < SLAVES_COUNT; boardNumber++) {
 8002dba:	2300      	movs	r3, #0
 8002dbc:	f887 305f 	strb.w	r3, [r7, #95]	@ 0x5f
 8002dc0:	e01a      	b.n	8002df8 <MqttConnectBroker+0xdc>
        ret = MQTTSubscribe (&mqttClient, subscribeTopicNames[boardNumber], QOS0, MqttMessageArrived);
 8002dc2:	f897 305f 	ldrb.w	r3, [r7, #95]	@ 0x5f
 8002dc6:	4a1c      	ldr	r2, [pc, #112]	@ (8002e38 <MqttConnectBroker+0x11c>)
 8002dc8:	f852 1023 	ldr.w	r1, [r2, r3, lsl #2]
 8002dcc:	4b1b      	ldr	r3, [pc, #108]	@ (8002e3c <MqttConnectBroker+0x120>)
 8002dce:	2200      	movs	r2, #0
 8002dd0:	4814      	ldr	r0, [pc, #80]	@ (8002e24 <MqttConnectBroker+0x108>)
 8002dd2:	f024 fd66 	bl	80278a2 <MQTTSubscribe>
 8002dd6:	65b8      	str	r0, [r7, #88]	@ 0x58
        if (ret != MQTT_SUCCESS) {
 8002dd8:	6dbb      	ldr	r3, [r7, #88]	@ 0x58
 8002dda:	2b00      	cmp	r3, #0
 8002ddc:	d007      	beq.n	8002dee <MqttConnectBroker+0xd2>
            net_disconnect (&net);
 8002dde:	480c      	ldr	r0, [pc, #48]	@ (8002e10 <MqttConnectBroker+0xf4>)
 8002de0:	f024 ff53 	bl	8027c8a <net_disconnect>
            printf ("MQTTSubscribe failed.\n");
 8002de4:	4816      	ldr	r0, [pc, #88]	@ (8002e40 <MqttConnectBroker+0x124>)
 8002de6:	f027 fa51 	bl	802a28c <puts>
            return ret;
 8002dea:	6dbb      	ldr	r3, [r7, #88]	@ 0x58
 8002dec:	e00c      	b.n	8002e08 <MqttConnectBroker+0xec>
    for (boardNumber = 0; boardNumber < SLAVES_COUNT; boardNumber++) {
 8002dee:	f897 305f 	ldrb.w	r3, [r7, #95]	@ 0x5f
 8002df2:	3301      	adds	r3, #1
 8002df4:	f887 305f 	strb.w	r3, [r7, #95]	@ 0x5f
 8002df8:	f897 305f 	ldrb.w	r3, [r7, #95]	@ 0x5f
 8002dfc:	2b03      	cmp	r3, #3
 8002dfe:	d9e0      	bls.n	8002dc2 <MqttConnectBroker+0xa6>
        }
    }
    printf ("MQTT_ConnectBroker O.K.\n");
 8002e00:	4810      	ldr	r0, [pc, #64]	@ (8002e44 <MqttConnectBroker+0x128>)
 8002e02:	f027 fa43 	bl	802a28c <puts>

    return MQTT_SUCCESS;
 8002e06:	2300      	movs	r3, #0
}
 8002e08:	4618      	mov	r0, r3
 8002e0a:	3760      	adds	r7, #96	@ 0x60
 8002e0c:	46bd      	mov	sp, r7
 8002e0e:	bd80      	pop	{r7, pc}
 8002e10:	24000720 	.word	0x24000720
 8002e14:	0802d028 	.word	0x0802d028
 8002e18:	0802d038 	.word	0x0802d038
 8002e1c:	24000b9c 	.word	0x24000b9c
 8002e20:	2400079c 	.word	0x2400079c
 8002e24:	24000730 	.word	0x24000730
 8002e28:	0802d0b4 	.word	0x0802d0b4
 8002e2c:	0802d050 	.word	0x0802d050
 8002e30:	0802d05c 	.word	0x0802d05c
 8002e34:	0802d064 	.word	0x0802d064
 8002e38:	08031288 	.word	0x08031288
 8002e3c:	08002e49 	.word	0x08002e49
 8002e40:	0802d084 	.word	0x0802d084
 8002e44:	0802d09c 	.word	0x0802d09c

08002e48 <MqttMessageArrived>:

void MqttMessageArrived (MessageData* msg) {
 8002e48:	b580      	push	{r7, lr}
 8002e4a:	b096      	sub	sp, #88	@ 0x58
 8002e4c:	af00      	add	r7, sp, #0
 8002e4e:	6078      	str	r0, [r7, #4]
    SerialProtocolCommands spCommand = spUnknown;
 8002e50:	2309      	movs	r3, #9
 8002e52:	f887 3057 	strb.w	r3, [r7, #87]	@ 0x57
    BoardNoOverTopic topicForBoard   = unknownBoard;
 8002e56:	2305      	movs	r3, #5
 8002e58:	f887 3056 	strb.w	r3, [r7, #86]	@ 0x56
    uint8_t boardNumber              = 0;
 8002e5c:	2300      	movs	r3, #0
 8002e5e:	f887 3055 	strb.w	r3, [r7, #85]	@ 0x55
    MQTTMessage* message             = msg->message;
 8002e62:	687b      	ldr	r3, [r7, #4]
 8002e64:	681b      	ldr	r3, [r3, #0]
 8002e66:	64bb      	str	r3, [r7, #72]	@ 0x48
    char topicName[32]               = { 0 };
 8002e68:	2300      	movs	r3, #0
 8002e6a:	61bb      	str	r3, [r7, #24]
 8002e6c:	f107 031c 	add.w	r3, r7, #28
 8002e70:	2200      	movs	r2, #0
 8002e72:	601a      	str	r2, [r3, #0]
 8002e74:	605a      	str	r2, [r3, #4]
 8002e76:	609a      	str	r2, [r3, #8]
 8002e78:	60da      	str	r2, [r3, #12]
 8002e7a:	611a      	str	r2, [r3, #16]
 8002e7c:	615a      	str	r2, [r3, #20]
 8002e7e:	619a      	str	r2, [r3, #24]
    memcpy (topicName, msg->topicName->lenstring.data, msg->topicName->lenstring.len);
 8002e80:	687b      	ldr	r3, [r7, #4]
 8002e82:	685b      	ldr	r3, [r3, #4]
 8002e84:	6899      	ldr	r1, [r3, #8]
 8002e86:	687b      	ldr	r3, [r7, #4]
 8002e88:	685b      	ldr	r3, [r3, #4]
 8002e8a:	685b      	ldr	r3, [r3, #4]
 8002e8c:	461a      	mov	r2, r3
 8002e8e:	f107 0318 	add.w	r3, r7, #24
 8002e92:	4618      	mov	r0, r3
 8002e94:	f027 fc1b 	bl	802a6ce <memcpy>

    for (boardNumber = 0; boardNumber < SLAVES_COUNT; boardNumber++) {
 8002e98:	2300      	movs	r3, #0
 8002e9a:	f887 3055 	strb.w	r3, [r7, #85]	@ 0x55
 8002e9e:	e017      	b.n	8002ed0 <MqttMessageArrived+0x88>
        if (strcmp (topicName, subscribeTopicNames[boardNumber]) == 0) {
 8002ea0:	f897 3055 	ldrb.w	r3, [r7, #85]	@ 0x55
 8002ea4:	4a90      	ldr	r2, [pc, #576]	@ (80030e8 <MqttMessageArrived+0x2a0>)
 8002ea6:	f852 2023 	ldr.w	r2, [r2, r3, lsl #2]
 8002eaa:	f107 0318 	add.w	r3, r7, #24
 8002eae:	4611      	mov	r1, r2
 8002eb0:	4618      	mov	r0, r3
 8002eb2:	f7fd fa15 	bl	80002e0 <strcmp>
 8002eb6:	4603      	mov	r3, r0
 8002eb8:	2b00      	cmp	r3, #0
 8002eba:	d104      	bne.n	8002ec6 <MqttMessageArrived+0x7e>
            topicForBoard = (BoardNoOverTopic)(boardNumber);
 8002ebc:	f897 3055 	ldrb.w	r3, [r7, #85]	@ 0x55
 8002ec0:	f887 3056 	strb.w	r3, [r7, #86]	@ 0x56
            break;
 8002ec4:	e008      	b.n	8002ed8 <MqttMessageArrived+0x90>
    for (boardNumber = 0; boardNumber < SLAVES_COUNT; boardNumber++) {
 8002ec6:	f897 3055 	ldrb.w	r3, [r7, #85]	@ 0x55
 8002eca:	3301      	adds	r3, #1
 8002ecc:	f887 3055 	strb.w	r3, [r7, #85]	@ 0x55
 8002ed0:	f897 3055 	ldrb.w	r3, [r7, #85]	@ 0x55
 8002ed4:	2b03      	cmp	r3, #3
 8002ed6:	d9e3      	bls.n	8002ea0 <MqttMessageArrived+0x58>
        }
    }

    cJSON* json             = cJSON_Parse (message->payload);
 8002ed8:	6cbb      	ldr	r3, [r7, #72]	@ 0x48
 8002eda:	689b      	ldr	r3, [r3, #8]
 8002edc:	4618      	mov	r0, r3
 8002ede:	f7fe fb39 	bl	8001554 <cJSON_Parse>
 8002ee2:	6478      	str	r0, [r7, #68]	@ 0x44
    const cJSON* objectItem = NULL;
 8002ee4:	2300      	movs	r3, #0
 8002ee6:	643b      	str	r3, [r7, #64]	@ 0x40
    InterProcessData data   = { 0 };
 8002ee8:	f107 030c 	add.w	r3, r7, #12
 8002eec:	2200      	movs	r2, #0
 8002eee:	601a      	str	r2, [r3, #0]
 8002ef0:	605a      	str	r2, [r3, #4]
 8002ef2:	609a      	str	r2, [r3, #8]
    for (int topicCmdNumber = 0; topicCmdNumber < MAX_COMMANDS_IN_MQTT_PAYLOAD; topicCmdNumber++) {
 8002ef4:	2300      	movs	r3, #0
 8002ef6:	653b      	str	r3, [r7, #80]	@ 0x50
 8002ef8:	e0e0      	b.n	80030bc <MqttMessageArrived+0x274>
        spCommand  = spUnknown;
 8002efa:	2309      	movs	r3, #9
 8002efc:	f887 3057 	strb.w	r3, [r7, #87]	@ 0x57
        objectItem = cJSON_GetObjectItemCaseSensitive (json, topicCommands[topicCmdNumber]);
 8002f00:	4a7a      	ldr	r2, [pc, #488]	@ (80030ec <MqttMessageArrived+0x2a4>)
 8002f02:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 8002f04:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
 8002f08:	4619      	mov	r1, r3
 8002f0a:	6c78      	ldr	r0, [r7, #68]	@ 0x44
 8002f0c:	f7fe fe8c 	bl	8001c28 <cJSON_GetObjectItemCaseSensitive>
 8002f10:	6438      	str	r0, [r7, #64]	@ 0x40
        if (objectItem != NULL) {
 8002f12:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8002f14:	2b00      	cmp	r3, #0
 8002f16:	f000 80ce 	beq.w	80030b6 <MqttMessageArrived+0x26e>
            switch (topicCmdNumber) {
 8002f1a:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 8002f1c:	2b07      	cmp	r3, #7
 8002f1e:	d875      	bhi.n	800300c <MqttMessageArrived+0x1c4>
 8002f20:	a201      	add	r2, pc, #4	@ (adr r2, 8002f28 <MqttMessageArrived+0xe0>)
 8002f22:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 8002f26:	bf00      	nop
 8002f28:	08002f49 	.word	0x08002f49
 8002f2c:	08002f4f 	.word	0x08002f4f
 8002f30:	08002f5d 	.word	0x08002f5d
 8002f34:	08002fc7 	.word	0x08002fc7
 8002f38:	08002fd7 	.word	0x08002fd7
 8002f3c:	08002fdd 	.word	0x08002fdd
 8002f40:	08003007 	.word	0x08003007
 8002f44:	0800300d 	.word	0x0800300d
            case 0: spCommand = spSetFanSpeed;
 8002f48:	2302      	movs	r3, #2
 8002f4a:	f887 3057 	strb.w	r3, [r7, #87]	@ 0x57
            case 1:
                if (spCommand == spUnknown) {
 8002f4e:	f897 3057 	ldrb.w	r3, [r7, #87]	@ 0x57
 8002f52:	2b09      	cmp	r3, #9
 8002f54:	d102      	bne.n	8002f5c <MqttMessageArrived+0x114>
                    spCommand = spSetMotorXOn;
 8002f56:	2303      	movs	r3, #3
 8002f58:	f887 3057 	strb.w	r3, [r7, #87]	@ 0x57
                }
            case 2:
                if (spCommand == spUnknown) {
 8002f5c:	f897 3057 	ldrb.w	r3, [r7, #87]	@ 0x57
 8002f60:	2b09      	cmp	r3, #9
 8002f62:	d102      	bne.n	8002f6a <MqttMessageArrived+0x122>
                    spCommand = spSetMotorYOn;
 8002f64:	2304      	movs	r3, #4
 8002f66:	f887 3057 	strb.w	r3, [r7, #87]	@ 0x57
                }
                if (cJSON_IsArray (objectItem)) {
 8002f6a:	6c38      	ldr	r0, [r7, #64]	@ 0x40
 8002f6c:	f7fe fe82 	bl	8001c74 <cJSON_IsArray>
 8002f70:	4603      	mov	r3, r0
 8002f72:	2b00      	cmp	r3, #0
 8002f74:	d04c      	beq.n	8003010 <MqttMessageArrived+0x1c8>
                    data.spCommand = spCommand;
 8002f76:	f897 3057 	ldrb.w	r3, [r7, #87]	@ 0x57
 8002f7a:	733b      	strb	r3, [r7, #12]
                    int arraySize  = cJSON_GetArraySize (objectItem);
 8002f7c:	6c38      	ldr	r0, [r7, #64]	@ 0x40
 8002f7e:	f7fe fdb3 	bl	8001ae8 <cJSON_GetArraySize>
 8002f82:	63f8      	str	r0, [r7, #60]	@ 0x3c
                    if (arraySize == 2) {
 8002f84:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 8002f86:	2b02      	cmp	r3, #2
 8002f88:	d142      	bne.n	8003010 <MqttMessageArrived+0x1c8>
                        for (int i = 0; i < arraySize; i++) {
 8002f8a:	2300      	movs	r3, #0
 8002f8c:	64fb      	str	r3, [r7, #76]	@ 0x4c
 8002f8e:	e015      	b.n	8002fbc <MqttMessageArrived+0x174>
                            cJSON* item = cJSON_GetArrayItem (objectItem, i);
 8002f90:	6cf9      	ldr	r1, [r7, #76]	@ 0x4c
 8002f92:	6c38      	ldr	r0, [r7, #64]	@ 0x40
 8002f94:	f7fe fdec 	bl	8001b70 <cJSON_GetArrayItem>
 8002f98:	63b8      	str	r0, [r7, #56]	@ 0x38
                            if (cJSON_IsNumber (item)) {
 8002f9a:	6bb8      	ldr	r0, [r7, #56]	@ 0x38
 8002f9c:	f7fe fe53 	bl	8001c46 <cJSON_IsNumber>
 8002fa0:	4603      	mov	r3, r0
 8002fa2:	2b00      	cmp	r3, #0
 8002fa4:	d007      	beq.n	8002fb6 <MqttMessageArrived+0x16e>
                                data.values.integerValues.value[i] = item->valueint;
 8002fa6:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8002fa8:	695a      	ldr	r2, [r3, #20]
 8002faa:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 8002fac:	009b      	lsls	r3, r3, #2
 8002fae:	3358      	adds	r3, #88	@ 0x58
 8002fb0:	443b      	add	r3, r7
 8002fb2:	f843 2c48 	str.w	r2, [r3, #-72]
                        for (int i = 0; i < arraySize; i++) {
 8002fb6:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 8002fb8:	3301      	adds	r3, #1
 8002fba:	64fb      	str	r3, [r7, #76]	@ 0x4c
 8002fbc:	6cfa      	ldr	r2, [r7, #76]	@ 0x4c
 8002fbe:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 8002fc0:	429a      	cmp	r2, r3
 8002fc2:	dbe5      	blt.n	8002f90 <MqttMessageArrived+0x148>
                            }
                        }
                    }
                }
                break;
 8002fc4:	e024      	b.n	8003010 <MqttMessageArrived+0x1c8>
            case 3:
                data.spCommand                     = spSetDiodeOn;
 8002fc6:	2307      	movs	r3, #7
 8002fc8:	733b      	strb	r3, [r7, #12]
                data.values.integerValues.value[0] = objectItem->valueint;
 8002fca:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8002fcc:	695b      	ldr	r3, [r3, #20]
 8002fce:	613b      	str	r3, [r7, #16]
                data.values.integerValues.value[1] = 0;
 8002fd0:	2300      	movs	r3, #0
 8002fd2:	617b      	str	r3, [r7, #20]
                break;
 8002fd4:	e01d      	b.n	8003012 <MqttMessageArrived+0x1ca>
            case 4: spCommand = spSetmotorXMaxCurrent;
 8002fd6:	2305      	movs	r3, #5
 8002fd8:	f887 3057 	strb.w	r3, [r7, #87]	@ 0x57
            case 5:
                if (spCommand == spUnknown) {
 8002fdc:	f897 3057 	ldrb.w	r3, [r7, #87]	@ 0x57
 8002fe0:	2b09      	cmp	r3, #9
 8002fe2:	d102      	bne.n	8002fea <MqttMessageArrived+0x1a2>
                    spCommand = spSetmotorYMaxCurrent;
 8002fe4:	2306      	movs	r3, #6
 8002fe6:	f887 3057 	strb.w	r3, [r7, #87]	@ 0x57
                }
                data.spCommand                   = spCommand;
 8002fea:	f897 3057 	ldrb.w	r3, [r7, #87]	@ 0x57
 8002fee:	733b      	strb	r3, [r7, #12]
                data.values.flaotValues.value[0] = objectItem->valuedouble;
 8002ff0:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8002ff2:	ed93 7b06 	vldr	d7, [r3, #24]
 8002ff6:	eef7 7bc7 	vcvt.f32.f64	s15, d7
 8002ffa:	edc7 7a04 	vstr	s15, [r7, #16]
                data.values.flaotValues.value[1] = 0.0;
 8002ffe:	f04f 0300 	mov.w	r3, #0
 8003002:	617b      	str	r3, [r7, #20]
                break;
 8003004:	e005      	b.n	8003012 <MqttMessageArrived+0x1ca>
            case 6:
            	data.spCommand = spClearPeakMeasurments;
 8003006:	2308      	movs	r3, #8
 8003008:	733b      	strb	r3, [r7, #12]
            	break;
 800300a:	e002      	b.n	8003012 <MqttMessageArrived+0x1ca>
            case 7:
            	break;
            default: break;
 800300c:	bf00      	nop
 800300e:	e000      	b.n	8003012 <MqttMessageArrived+0x1ca>
                break;
 8003010:	bf00      	nop
            }

            switch (topicForBoard) {
 8003012:	f897 3056 	ldrb.w	r3, [r7, #86]	@ 0x56
 8003016:	2b04      	cmp	r3, #4
 8003018:	d84c      	bhi.n	80030b4 <MqttMessageArrived+0x26c>
 800301a:	a201      	add	r2, pc, #4	@ (adr r2, 8003020 <MqttMessageArrived+0x1d8>)
 800301c:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 8003020:	080030b5 	.word	0x080030b5
 8003024:	08003035 	.word	0x08003035
 8003028:	08003055 	.word	0x08003055
 800302c:	08003075 	.word	0x08003075
 8003030:	08003095 	.word	0x08003095
            case main_board:
            	break;
            case board_1:
#if 1
                if (uart1TaskData.sendCmdToSlaveQueue != NULL) {
 8003034:	4b2e      	ldr	r3, [pc, #184]	@ (80030f0 <MqttMessageArrived+0x2a8>)
 8003036:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8003038:	2b00      	cmp	r3, #0
 800303a:	d007      	beq.n	800304c <MqttMessageArrived+0x204>
                    osMessageQueuePut (uart1TaskData.sendCmdToSlaveQueue, &data, 0, (TickType_t)100);
 800303c:	4b2c      	ldr	r3, [pc, #176]	@ (80030f0 <MqttMessageArrived+0x2a8>)
 800303e:	6ad8      	ldr	r0, [r3, #44]	@ 0x2c
 8003040:	f107 010c 	add.w	r1, r7, #12
 8003044:	2364      	movs	r3, #100	@ 0x64
 8003046:	2200      	movs	r2, #0
 8003048:	f00e fab4 	bl	80115b4 <osMessageQueuePut>
#else
                if (uart8TaskData.sendCmdToSlaveQueue != NULL) {
                    osMessageQueuePut (uart8TaskData.sendCmdToSlaveQueue, &data, 0, (TickType_t)100);
                }
#endif
                printf ("Send cmd to board 1\n");
 800304c:	4829      	ldr	r0, [pc, #164]	@ (80030f4 <MqttMessageArrived+0x2ac>)
 800304e:	f027 f91d 	bl	802a28c <puts>
                break;
 8003052:	e030      	b.n	80030b6 <MqttMessageArrived+0x26e>
            case board_2:
                if (uart3TaskData.sendCmdToSlaveQueue != NULL) {
 8003054:	4b28      	ldr	r3, [pc, #160]	@ (80030f8 <MqttMessageArrived+0x2b0>)
 8003056:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8003058:	2b00      	cmp	r3, #0
 800305a:	d007      	beq.n	800306c <MqttMessageArrived+0x224>
                    osMessageQueuePut (uart3TaskData.sendCmdToSlaveQueue, &data, 0, (TickType_t)100);
 800305c:	4b26      	ldr	r3, [pc, #152]	@ (80030f8 <MqttMessageArrived+0x2b0>)
 800305e:	6ad8      	ldr	r0, [r3, #44]	@ 0x2c
 8003060:	f107 010c 	add.w	r1, r7, #12
 8003064:	2364      	movs	r3, #100	@ 0x64
 8003066:	2200      	movs	r2, #0
 8003068:	f00e faa4 	bl	80115b4 <osMessageQueuePut>
                }
                printf ("Send cmd to board 2\n");
 800306c:	4823      	ldr	r0, [pc, #140]	@ (80030fc <MqttMessageArrived+0x2b4>)
 800306e:	f027 f90d 	bl	802a28c <puts>
                break;
 8003072:	e020      	b.n	80030b6 <MqttMessageArrived+0x26e>
            case board_3:
                if (uart6TaskData.sendCmdToSlaveQueue != NULL) {
 8003074:	4b22      	ldr	r3, [pc, #136]	@ (8003100 <MqttMessageArrived+0x2b8>)
 8003076:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8003078:	2b00      	cmp	r3, #0
 800307a:	d007      	beq.n	800308c <MqttMessageArrived+0x244>
                    osMessageQueuePut (uart6TaskData.sendCmdToSlaveQueue, &data, 0, (TickType_t)100);
 800307c:	4b20      	ldr	r3, [pc, #128]	@ (8003100 <MqttMessageArrived+0x2b8>)
 800307e:	6ad8      	ldr	r0, [r3, #44]	@ 0x2c
 8003080:	f107 010c 	add.w	r1, r7, #12
 8003084:	2364      	movs	r3, #100	@ 0x64
 8003086:	2200      	movs	r2, #0
 8003088:	f00e fa94 	bl	80115b4 <osMessageQueuePut>
                }
                printf ("Send cmd to board 3\n");
 800308c:	481d      	ldr	r0, [pc, #116]	@ (8003104 <MqttMessageArrived+0x2bc>)
 800308e:	f027 f8fd 	bl	802a28c <puts>
                break;
 8003092:	e010      	b.n	80030b6 <MqttMessageArrived+0x26e>
            case board_4:
                if (uart2TaskData.sendCmdToSlaveQueue != NULL) {
 8003094:	4b1c      	ldr	r3, [pc, #112]	@ (8003108 <MqttMessageArrived+0x2c0>)
 8003096:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8003098:	2b00      	cmp	r3, #0
 800309a:	d007      	beq.n	80030ac <MqttMessageArrived+0x264>
                    osMessageQueuePut (uart2TaskData.sendCmdToSlaveQueue, &data, 0, (TickType_t)100);
 800309c:	4b1a      	ldr	r3, [pc, #104]	@ (8003108 <MqttMessageArrived+0x2c0>)
 800309e:	6ad8      	ldr	r0, [r3, #44]	@ 0x2c
 80030a0:	f107 010c 	add.w	r1, r7, #12
 80030a4:	2364      	movs	r3, #100	@ 0x64
 80030a6:	2200      	movs	r2, #0
 80030a8:	f00e fa84 	bl	80115b4 <osMessageQueuePut>
                }
                printf ("Send cmd to board 4\n");
 80030ac:	4817      	ldr	r0, [pc, #92]	@ (800310c <MqttMessageArrived+0x2c4>)
 80030ae:	f027 f8ed 	bl	802a28c <puts>
                break;
 80030b2:	e000      	b.n	80030b6 <MqttMessageArrived+0x26e>
            default: break;
 80030b4:	bf00      	nop
    for (int topicCmdNumber = 0; topicCmdNumber < MAX_COMMANDS_IN_MQTT_PAYLOAD; topicCmdNumber++) {
 80030b6:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 80030b8:	3301      	adds	r3, #1
 80030ba:	653b      	str	r3, [r7, #80]	@ 0x50
 80030bc:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 80030be:	2b08      	cmp	r3, #8
 80030c0:	f77f af1b 	ble.w	8002efa <MqttMessageArrived+0xb2>
            }
        }
    }
    cJSON_Delete (json);
 80030c4:	6c78      	ldr	r0, [r7, #68]	@ 0x44
 80030c6:	f7fd fd61 	bl	8000b8c <cJSON_Delete>
    printf ("MQTT Topic:%s, MSG[%d]:%s\n", topicName, (int)message->payloadlen, (char*)message->payload);
 80030ca:	6cbb      	ldr	r3, [r7, #72]	@ 0x48
 80030cc:	68db      	ldr	r3, [r3, #12]
 80030ce:	461a      	mov	r2, r3
 80030d0:	6cbb      	ldr	r3, [r7, #72]	@ 0x48
 80030d2:	689b      	ldr	r3, [r3, #8]
 80030d4:	f107 0118 	add.w	r1, r7, #24
 80030d8:	480d      	ldr	r0, [pc, #52]	@ (8003110 <MqttMessageArrived+0x2c8>)
 80030da:	f027 f86f 	bl	802a1bc <iprintf>
}
 80030de:	bf00      	nop
 80030e0:	3758      	adds	r7, #88	@ 0x58
 80030e2:	46bd      	mov	sp, r7
 80030e4:	bd80      	pop	{r7, pc}
 80030e6:	bf00      	nop
 80030e8:	08031288 	.word	0x08031288
 80030ec:	0803129c 	.word	0x0803129c
 80030f0:	24001eec 	.word	0x24001eec
 80030f4:	0802d10c 	.word	0x0802d10c
 80030f8:	24001f24 	.word	0x24001f24
 80030fc:	0802d120 	.word	0x0802d120
 8003100:	24001f5c 	.word	0x24001f5c
 8003104:	0802d134 	.word	0x0802d134
 8003108:	24001f94 	.word	0x24001f94
 800310c:	0802d148 	.word	0x0802d148
 8003110:	0802d15c 	.word	0x0802d15c

08003114 <mqtt_cli_init>:

void mqtt_cli_init (void) {
 8003114:	b580      	push	{r7, lr}
 8003116:	af00      	add	r7, sp, #0
    mqttClientSubTaskHandle = osThreadNew (MqttClientSubTask, NULL, &mqttClientSubTaskAttr); // subscribe task
 8003118:	4a08      	ldr	r2, [pc, #32]	@ (800313c <mqtt_cli_init+0x28>)
 800311a:	2100      	movs	r1, #0
 800311c:	4808      	ldr	r0, [pc, #32]	@ (8003140 <mqtt_cli_init+0x2c>)
 800311e:	f00d fe38 	bl	8010d92 <osThreadNew>
 8003122:	4603      	mov	r3, r0
 8003124:	4a07      	ldr	r2, [pc, #28]	@ (8003144 <mqtt_cli_init+0x30>)
 8003126:	6013      	str	r3, [r2, #0]
    mqttClientPubTaskHandle = osThreadNew (MqttClientPubTask, NULL, &mqttClientPubTaskAttr); // publish task
 8003128:	4a07      	ldr	r2, [pc, #28]	@ (8003148 <mqtt_cli_init+0x34>)
 800312a:	2100      	movs	r1, #0
 800312c:	4807      	ldr	r0, [pc, #28]	@ (800314c <mqtt_cli_init+0x38>)
 800312e:	f00d fe30 	bl	8010d92 <osThreadNew>
 8003132:	4603      	mov	r3, r0
 8003134:	4a06      	ldr	r2, [pc, #24]	@ (8003150 <mqtt_cli_init+0x3c>)
 8003136:	6013      	str	r3, [r2, #0]
}
 8003138:	bf00      	nop
 800313a:	bd80      	pop	{r7, pc}
 800313c:	080312c0 	.word	0x080312c0
 8003140:	08002655 	.word	0x08002655
 8003144:	24000718 	.word	0x24000718
 8003148:	080312e4 	.word	0x080312e4
 800314c:	080026c5 	.word	0x080026c5
 8003150:	2400071c 	.word	0x2400071c

08003154 <WriteDataToBuffer>:
        buff[newBuffPos++] = (uint8_t)((uData >> (i * 8)) & 0xFF);
    }
    *buffPos = newBuffPos;
}

void WriteDataToBuffer (uint8_t* buff, uint16_t* buffPos, void* data, uint8_t dataSize) {
 8003154:	b480      	push	{r7}
 8003156:	b089      	sub	sp, #36	@ 0x24
 8003158:	af00      	add	r7, sp, #0
 800315a:	60f8      	str	r0, [r7, #12]
 800315c:	60b9      	str	r1, [r7, #8]
 800315e:	607a      	str	r2, [r7, #4]
 8003160:	70fb      	strb	r3, [r7, #3]
    uint32_t* uDataPtr = data;
 8003162:	687b      	ldr	r3, [r7, #4]
 8003164:	61bb      	str	r3, [r7, #24]
    uint32_t uData     = *uDataPtr;
 8003166:	69bb      	ldr	r3, [r7, #24]
 8003168:	681b      	ldr	r3, [r3, #0]
 800316a:	617b      	str	r3, [r7, #20]
    uint8_t i          = 0;
 800316c:	2300      	movs	r3, #0
 800316e:	77fb      	strb	r3, [r7, #31]
    uint8_t newBuffPos = *buffPos;
 8003170:	68bb      	ldr	r3, [r7, #8]
 8003172:	881b      	ldrh	r3, [r3, #0]
 8003174:	77bb      	strb	r3, [r7, #30]
    for (i = 0; i < dataSize; i++) {
 8003176:	2300      	movs	r3, #0
 8003178:	77fb      	strb	r3, [r7, #31]
 800317a:	e00e      	b.n	800319a <WriteDataToBuffer+0x46>
        buff[newBuffPos++] = (uint8_t)((uData >> (i * 8)) & 0xFF);
 800317c:	7ffb      	ldrb	r3, [r7, #31]
 800317e:	00db      	lsls	r3, r3, #3
 8003180:	697a      	ldr	r2, [r7, #20]
 8003182:	40da      	lsrs	r2, r3
 8003184:	7fbb      	ldrb	r3, [r7, #30]
 8003186:	1c59      	adds	r1, r3, #1
 8003188:	77b9      	strb	r1, [r7, #30]
 800318a:	4619      	mov	r1, r3
 800318c:	68fb      	ldr	r3, [r7, #12]
 800318e:	440b      	add	r3, r1
 8003190:	b2d2      	uxtb	r2, r2
 8003192:	701a      	strb	r2, [r3, #0]
    for (i = 0; i < dataSize; i++) {
 8003194:	7ffb      	ldrb	r3, [r7, #31]
 8003196:	3301      	adds	r3, #1
 8003198:	77fb      	strb	r3, [r7, #31]
 800319a:	7ffa      	ldrb	r2, [r7, #31]
 800319c:	78fb      	ldrb	r3, [r7, #3]
 800319e:	429a      	cmp	r2, r3
 80031a0:	d3ec      	bcc.n	800317c <WriteDataToBuffer+0x28>
    }
    *buffPos = newBuffPos;
 80031a2:	7fbb      	ldrb	r3, [r7, #30]
 80031a4:	b29a      	uxth	r2, r3
 80031a6:	68bb      	ldr	r3, [r7, #8]
 80031a8:	801a      	strh	r2, [r3, #0]
}
 80031aa:	bf00      	nop
 80031ac:	3724      	adds	r7, #36	@ 0x24
 80031ae:	46bd      	mov	sp, r7
 80031b0:	f85d 7b04 	ldr.w	r7, [sp], #4
 80031b4:	4770      	bx	lr

080031b6 <ReadFloatFromBuffer>:

void ReadFloatFromBuffer(uint8_t* buff, uint16_t* buffPos, float* data)
{
 80031b6:	b480      	push	{r7}
 80031b8:	b087      	sub	sp, #28
 80031ba:	af00      	add	r7, sp, #0
 80031bc:	60f8      	str	r0, [r7, #12]
 80031be:	60b9      	str	r1, [r7, #8]
 80031c0:	607a      	str	r2, [r7, #4]
	uint32_t* word =  (uint32_t *)data;
 80031c2:	687b      	ldr	r3, [r7, #4]
 80031c4:	617b      	str	r3, [r7, #20]
	*word = CONVERT_BYTES_TO_WORD(&buff[*buffPos]);
 80031c6:	68bb      	ldr	r3, [r7, #8]
 80031c8:	881b      	ldrh	r3, [r3, #0]
 80031ca:	3303      	adds	r3, #3
 80031cc:	68fa      	ldr	r2, [r7, #12]
 80031ce:	4413      	add	r3, r2
 80031d0:	781b      	ldrb	r3, [r3, #0]
 80031d2:	061a      	lsls	r2, r3, #24
 80031d4:	68bb      	ldr	r3, [r7, #8]
 80031d6:	881b      	ldrh	r3, [r3, #0]
 80031d8:	3302      	adds	r3, #2
 80031da:	68f9      	ldr	r1, [r7, #12]
 80031dc:	440b      	add	r3, r1
 80031de:	781b      	ldrb	r3, [r3, #0]
 80031e0:	041b      	lsls	r3, r3, #16
 80031e2:	431a      	orrs	r2, r3
 80031e4:	68bb      	ldr	r3, [r7, #8]
 80031e6:	881b      	ldrh	r3, [r3, #0]
 80031e8:	3301      	adds	r3, #1
 80031ea:	68f9      	ldr	r1, [r7, #12]
 80031ec:	440b      	add	r3, r1
 80031ee:	781b      	ldrb	r3, [r3, #0]
 80031f0:	021b      	lsls	r3, r3, #8
 80031f2:	4313      	orrs	r3, r2
 80031f4:	68ba      	ldr	r2, [r7, #8]
 80031f6:	8812      	ldrh	r2, [r2, #0]
 80031f8:	4611      	mov	r1, r2
 80031fa:	68fa      	ldr	r2, [r7, #12]
 80031fc:	440a      	add	r2, r1
 80031fe:	7812      	ldrb	r2, [r2, #0]
 8003200:	4313      	orrs	r3, r2
 8003202:	461a      	mov	r2, r3
 8003204:	697b      	ldr	r3, [r7, #20]
 8003206:	601a      	str	r2, [r3, #0]
	*buffPos += sizeof(float);
 8003208:	68bb      	ldr	r3, [r7, #8]
 800320a:	881b      	ldrh	r3, [r3, #0]
 800320c:	3304      	adds	r3, #4
 800320e:	b29a      	uxth	r2, r3
 8003210:	68bb      	ldr	r3, [r7, #8]
 8003212:	801a      	strh	r2, [r3, #0]
}
 8003214:	bf00      	nop
 8003216:	371c      	adds	r7, #28
 8003218:	46bd      	mov	sp, r7
 800321a:	f85d 7b04 	ldr.w	r7, [sp], #4
 800321e:	4770      	bx	lr

08003220 <ReadByteFromBufer>:
	*data = CONVERT_BYTES_TO_SHORT_WORD(&buff[*buffPos]);
	*buffPos += sizeof(uint32_t);
}

void ReadByteFromBufer(uint8_t* buff, uint16_t* buffPos, uint8_t* data)
{
 8003220:	b480      	push	{r7}
 8003222:	b085      	sub	sp, #20
 8003224:	af00      	add	r7, sp, #0
 8003226:	60f8      	str	r0, [r7, #12]
 8003228:	60b9      	str	r1, [r7, #8]
 800322a:	607a      	str	r2, [r7, #4]
	*data = CONVERT_BYTES_TO_SHORT_WORD(&buff[*buffPos]);
 800322c:	68bb      	ldr	r3, [r7, #8]
 800322e:	881b      	ldrh	r3, [r3, #0]
 8003230:	3301      	adds	r3, #1
 8003232:	68fa      	ldr	r2, [r7, #12]
 8003234:	4413      	add	r3, r2
 8003236:	781b      	ldrb	r3, [r3, #0]
 8003238:	021b      	lsls	r3, r3, #8
 800323a:	b25a      	sxtb	r2, r3
 800323c:	68bb      	ldr	r3, [r7, #8]
 800323e:	881b      	ldrh	r3, [r3, #0]
 8003240:	4619      	mov	r1, r3
 8003242:	68fb      	ldr	r3, [r7, #12]
 8003244:	440b      	add	r3, r1
 8003246:	781b      	ldrb	r3, [r3, #0]
 8003248:	b25b      	sxtb	r3, r3
 800324a:	4313      	orrs	r3, r2
 800324c:	b25b      	sxtb	r3, r3
 800324e:	b2da      	uxtb	r2, r3
 8003250:	687b      	ldr	r3, [r7, #4]
 8003252:	701a      	strb	r2, [r3, #0]
	*buffPos += sizeof(uint8_t);
 8003254:	68bb      	ldr	r3, [r7, #8]
 8003256:	881b      	ldrh	r3, [r3, #0]
 8003258:	3301      	adds	r3, #1
 800325a:	b29a      	uxth	r2, r3
 800325c:	68bb      	ldr	r3, [r7, #8]
 800325e:	801a      	strh	r2, [r3, #0]
}
 8003260:	bf00      	nop
 8003262:	3714      	adds	r7, #20
 8003264:	46bd      	mov	sp, r7
 8003266:	f85d 7b04 	ldr.w	r7, [sp], #4
 800326a:	4770      	bx	lr

0800326c <PrepareReqFrame>:

uint16_t PrepareReqFrame (uint8_t* txBuffer, uint16_t frameId, SerialProtocolCommands frameCommand, uint8_t* dataBuffer, uint16_t dataLength) {
 800326c:	b580      	push	{r7, lr}
 800326e:	b086      	sub	sp, #24
 8003270:	af00      	add	r7, sp, #0
 8003272:	60f8      	str	r0, [r7, #12]
 8003274:	607b      	str	r3, [r7, #4]
 8003276:	460b      	mov	r3, r1
 8003278:	817b      	strh	r3, [r7, #10]
 800327a:	4613      	mov	r3, r2
 800327c:	727b      	strb	r3, [r7, #9]
    uint16_t crc         = 0;
 800327e:	2300      	movs	r3, #0
 8003280:	82bb      	strh	r3, [r7, #20]
    uint16_t txBufferPos = 0;
 8003282:	2300      	movs	r3, #0
 8003284:	82fb      	strh	r3, [r7, #22]
    uint16_t frameCmd    = ((uint16_t)frameCommand);
 8003286:	7a7b      	ldrb	r3, [r7, #9]
 8003288:	827b      	strh	r3, [r7, #18]

    memset (txBuffer, 0x00, dataLength);
 800328a:	8c3b      	ldrh	r3, [r7, #32]
 800328c:	461a      	mov	r2, r3
 800328e:	2100      	movs	r1, #0
 8003290:	68f8      	ldr	r0, [r7, #12]
 8003292:	f027 f925 	bl	802a4e0 <memset>
    txBuffer[txBufferPos++] = FRAME_INDICATOR;
 8003296:	8afb      	ldrh	r3, [r7, #22]
 8003298:	1c5a      	adds	r2, r3, #1
 800329a:	82fa      	strh	r2, [r7, #22]
 800329c:	461a      	mov	r2, r3
 800329e:	68fb      	ldr	r3, [r7, #12]
 80032a0:	4413      	add	r3, r2
 80032a2:	22aa      	movs	r2, #170	@ 0xaa
 80032a4:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_FIRST_BYTE (frameId);
 80032a6:	8afb      	ldrh	r3, [r7, #22]
 80032a8:	1c5a      	adds	r2, r3, #1
 80032aa:	82fa      	strh	r2, [r7, #22]
 80032ac:	461a      	mov	r2, r3
 80032ae:	68fb      	ldr	r3, [r7, #12]
 80032b0:	4413      	add	r3, r2
 80032b2:	897a      	ldrh	r2, [r7, #10]
 80032b4:	b2d2      	uxtb	r2, r2
 80032b6:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_SECOND_BYTE (frameId);
 80032b8:	897b      	ldrh	r3, [r7, #10]
 80032ba:	0a1b      	lsrs	r3, r3, #8
 80032bc:	b29a      	uxth	r2, r3
 80032be:	8afb      	ldrh	r3, [r7, #22]
 80032c0:	1c59      	adds	r1, r3, #1
 80032c2:	82f9      	strh	r1, [r7, #22]
 80032c4:	4619      	mov	r1, r3
 80032c6:	68fb      	ldr	r3, [r7, #12]
 80032c8:	440b      	add	r3, r1
 80032ca:	b2d2      	uxtb	r2, r2
 80032cc:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_FIRST_BYTE (frameCmd);
 80032ce:	8afb      	ldrh	r3, [r7, #22]
 80032d0:	1c5a      	adds	r2, r3, #1
 80032d2:	82fa      	strh	r2, [r7, #22]
 80032d4:	461a      	mov	r2, r3
 80032d6:	68fb      	ldr	r3, [r7, #12]
 80032d8:	4413      	add	r3, r2
 80032da:	8a7a      	ldrh	r2, [r7, #18]
 80032dc:	b2d2      	uxtb	r2, r2
 80032de:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_SECOND_BYTE (frameCmd);
 80032e0:	8a7b      	ldrh	r3, [r7, #18]
 80032e2:	0a1b      	lsrs	r3, r3, #8
 80032e4:	b29a      	uxth	r2, r3
 80032e6:	8afb      	ldrh	r3, [r7, #22]
 80032e8:	1c59      	adds	r1, r3, #1
 80032ea:	82f9      	strh	r1, [r7, #22]
 80032ec:	4619      	mov	r1, r3
 80032ee:	68fb      	ldr	r3, [r7, #12]
 80032f0:	440b      	add	r3, r1
 80032f2:	b2d2      	uxtb	r2, r2
 80032f4:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_FIRST_BYTE (dataLength);
 80032f6:	8afb      	ldrh	r3, [r7, #22]
 80032f8:	1c5a      	adds	r2, r3, #1
 80032fa:	82fa      	strh	r2, [r7, #22]
 80032fc:	461a      	mov	r2, r3
 80032fe:	68fb      	ldr	r3, [r7, #12]
 8003300:	4413      	add	r3, r2
 8003302:	8c3a      	ldrh	r2, [r7, #32]
 8003304:	b2d2      	uxtb	r2, r2
 8003306:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_SECOND_BYTE (dataLength);
 8003308:	8c3b      	ldrh	r3, [r7, #32]
 800330a:	0a1b      	lsrs	r3, r3, #8
 800330c:	b29a      	uxth	r2, r3
 800330e:	8afb      	ldrh	r3, [r7, #22]
 8003310:	1c59      	adds	r1, r3, #1
 8003312:	82f9      	strh	r1, [r7, #22]
 8003314:	4619      	mov	r1, r3
 8003316:	68fb      	ldr	r3, [r7, #12]
 8003318:	440b      	add	r3, r1
 800331a:	b2d2      	uxtb	r2, r2
 800331c:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = 0x00;
 800331e:	8afb      	ldrh	r3, [r7, #22]
 8003320:	1c5a      	adds	r2, r3, #1
 8003322:	82fa      	strh	r2, [r7, #22]
 8003324:	461a      	mov	r2, r3
 8003326:	68fb      	ldr	r3, [r7, #12]
 8003328:	4413      	add	r3, r2
 800332a:	2200      	movs	r2, #0
 800332c:	701a      	strb	r2, [r3, #0]
    if (dataLength > 0) {
 800332e:	8c3b      	ldrh	r3, [r7, #32]
 8003330:	2b00      	cmp	r3, #0
 8003332:	d00b      	beq.n	800334c <PrepareReqFrame+0xe0>
        memcpy (&txBuffer[txBufferPos], dataBuffer, dataLength);
 8003334:	8afb      	ldrh	r3, [r7, #22]
 8003336:	68fa      	ldr	r2, [r7, #12]
 8003338:	4413      	add	r3, r2
 800333a:	8c3a      	ldrh	r2, [r7, #32]
 800333c:	6879      	ldr	r1, [r7, #4]
 800333e:	4618      	mov	r0, r3
 8003340:	f027 f9c5 	bl	802a6ce <memcpy>
        txBufferPos += dataLength;
 8003344:	8afa      	ldrh	r2, [r7, #22]
 8003346:	8c3b      	ldrh	r3, [r7, #32]
 8003348:	4413      	add	r3, r2
 800334a:	82fb      	strh	r3, [r7, #22]
    }
    crc = HAL_CRC_Calculate (&hcrc, (uint32_t*)txBuffer, txBufferPos);
 800334c:	8afb      	ldrh	r3, [r7, #22]
 800334e:	461a      	mov	r2, r3
 8003350:	68f9      	ldr	r1, [r7, #12]
 8003352:	480f      	ldr	r0, [pc, #60]	@ (8003390 <PrepareReqFrame+0x124>)
 8003354:	f002 f980 	bl	8005658 <HAL_CRC_Calculate>
 8003358:	4603      	mov	r3, r0
 800335a:	82bb      	strh	r3, [r7, #20]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_FIRST_BYTE (crc);
 800335c:	8afb      	ldrh	r3, [r7, #22]
 800335e:	1c5a      	adds	r2, r3, #1
 8003360:	82fa      	strh	r2, [r7, #22]
 8003362:	461a      	mov	r2, r3
 8003364:	68fb      	ldr	r3, [r7, #12]
 8003366:	4413      	add	r3, r2
 8003368:	8aba      	ldrh	r2, [r7, #20]
 800336a:	b2d2      	uxtb	r2, r2
 800336c:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_SECOND_BYTE (crc);
 800336e:	8abb      	ldrh	r3, [r7, #20]
 8003370:	0a1b      	lsrs	r3, r3, #8
 8003372:	b29a      	uxth	r2, r3
 8003374:	8afb      	ldrh	r3, [r7, #22]
 8003376:	1c59      	adds	r1, r3, #1
 8003378:	82f9      	strh	r1, [r7, #22]
 800337a:	4619      	mov	r1, r3
 800337c:	68fb      	ldr	r3, [r7, #12]
 800337e:	440b      	add	r3, r1
 8003380:	b2d2      	uxtb	r2, r2
 8003382:	701a      	strb	r2, [r3, #0]

    return txBufferPos;
 8003384:	8afb      	ldrh	r3, [r7, #22]
}
 8003386:	4618      	mov	r0, r3
 8003388:	3718      	adds	r7, #24
 800338a:	46bd      	mov	sp, r7
 800338c:	bd80      	pop	{r7, pc}
 800338e:	bf00      	nop
 8003390:	24000248 	.word	0x24000248

08003394 <PrepareRespFrame>:

uint16_t PrepareRespFrame (uint8_t* txBuffer, uint16_t frameId, SerialProtocolCommands frameCommand, SerialProtocolRespStatus respStatus, uint8_t* dataBuffer, uint16_t dataLength) {
 8003394:	b580      	push	{r7, lr}
 8003396:	b084      	sub	sp, #16
 8003398:	af00      	add	r7, sp, #0
 800339a:	6078      	str	r0, [r7, #4]
 800339c:	4608      	mov	r0, r1
 800339e:	4611      	mov	r1, r2
 80033a0:	461a      	mov	r2, r3
 80033a2:	4603      	mov	r3, r0
 80033a4:	807b      	strh	r3, [r7, #2]
 80033a6:	460b      	mov	r3, r1
 80033a8:	707b      	strb	r3, [r7, #1]
 80033aa:	4613      	mov	r3, r2
 80033ac:	703b      	strb	r3, [r7, #0]
    uint16_t crc         = 0;
 80033ae:	2300      	movs	r3, #0
 80033b0:	81bb      	strh	r3, [r7, #12]
    uint16_t txBufferPos = 0;
 80033b2:	2300      	movs	r3, #0
 80033b4:	81fb      	strh	r3, [r7, #14]
    uint16_t frameCmd = ((uint16_t)frameCommand) | 0x8000; // MSB set means response
 80033b6:	787b      	ldrb	r3, [r7, #1]
 80033b8:	b21a      	sxth	r2, r3
 80033ba:	4b43      	ldr	r3, [pc, #268]	@ (80034c8 <PrepareRespFrame+0x134>)
 80033bc:	4313      	orrs	r3, r2
 80033be:	b21b      	sxth	r3, r3
 80033c0:	817b      	strh	r3, [r7, #10]

    memset (txBuffer, 0x00, dataLength);
 80033c2:	8bbb      	ldrh	r3, [r7, #28]
 80033c4:	461a      	mov	r2, r3
 80033c6:	2100      	movs	r1, #0
 80033c8:	6878      	ldr	r0, [r7, #4]
 80033ca:	f027 f889 	bl	802a4e0 <memset>
    txBuffer[txBufferPos++] = FRAME_INDICATOR;
 80033ce:	89fb      	ldrh	r3, [r7, #14]
 80033d0:	1c5a      	adds	r2, r3, #1
 80033d2:	81fa      	strh	r2, [r7, #14]
 80033d4:	461a      	mov	r2, r3
 80033d6:	687b      	ldr	r3, [r7, #4]
 80033d8:	4413      	add	r3, r2
 80033da:	22aa      	movs	r2, #170	@ 0xaa
 80033dc:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_FIRST_BYTE (frameId);
 80033de:	89fb      	ldrh	r3, [r7, #14]
 80033e0:	1c5a      	adds	r2, r3, #1
 80033e2:	81fa      	strh	r2, [r7, #14]
 80033e4:	461a      	mov	r2, r3
 80033e6:	687b      	ldr	r3, [r7, #4]
 80033e8:	4413      	add	r3, r2
 80033ea:	887a      	ldrh	r2, [r7, #2]
 80033ec:	b2d2      	uxtb	r2, r2
 80033ee:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_SECOND_BYTE (frameId);
 80033f0:	887b      	ldrh	r3, [r7, #2]
 80033f2:	0a1b      	lsrs	r3, r3, #8
 80033f4:	b29a      	uxth	r2, r3
 80033f6:	89fb      	ldrh	r3, [r7, #14]
 80033f8:	1c59      	adds	r1, r3, #1
 80033fa:	81f9      	strh	r1, [r7, #14]
 80033fc:	4619      	mov	r1, r3
 80033fe:	687b      	ldr	r3, [r7, #4]
 8003400:	440b      	add	r3, r1
 8003402:	b2d2      	uxtb	r2, r2
 8003404:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_FIRST_BYTE (frameCmd);
 8003406:	89fb      	ldrh	r3, [r7, #14]
 8003408:	1c5a      	adds	r2, r3, #1
 800340a:	81fa      	strh	r2, [r7, #14]
 800340c:	461a      	mov	r2, r3
 800340e:	687b      	ldr	r3, [r7, #4]
 8003410:	4413      	add	r3, r2
 8003412:	897a      	ldrh	r2, [r7, #10]
 8003414:	b2d2      	uxtb	r2, r2
 8003416:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_SECOND_BYTE (frameCmd);
 8003418:	897b      	ldrh	r3, [r7, #10]
 800341a:	0a1b      	lsrs	r3, r3, #8
 800341c:	b29a      	uxth	r2, r3
 800341e:	89fb      	ldrh	r3, [r7, #14]
 8003420:	1c59      	adds	r1, r3, #1
 8003422:	81f9      	strh	r1, [r7, #14]
 8003424:	4619      	mov	r1, r3
 8003426:	687b      	ldr	r3, [r7, #4]
 8003428:	440b      	add	r3, r1
 800342a:	b2d2      	uxtb	r2, r2
 800342c:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_FIRST_BYTE (dataLength);
 800342e:	89fb      	ldrh	r3, [r7, #14]
 8003430:	1c5a      	adds	r2, r3, #1
 8003432:	81fa      	strh	r2, [r7, #14]
 8003434:	461a      	mov	r2, r3
 8003436:	687b      	ldr	r3, [r7, #4]
 8003438:	4413      	add	r3, r2
 800343a:	8bba      	ldrh	r2, [r7, #28]
 800343c:	b2d2      	uxtb	r2, r2
 800343e:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_SECOND_BYTE (dataLength);
 8003440:	8bbb      	ldrh	r3, [r7, #28]
 8003442:	0a1b      	lsrs	r3, r3, #8
 8003444:	b29a      	uxth	r2, r3
 8003446:	89fb      	ldrh	r3, [r7, #14]
 8003448:	1c59      	adds	r1, r3, #1
 800344a:	81f9      	strh	r1, [r7, #14]
 800344c:	4619      	mov	r1, r3
 800344e:	687b      	ldr	r3, [r7, #4]
 8003450:	440b      	add	r3, r1
 8003452:	b2d2      	uxtb	r2, r2
 8003454:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = (uint8_t)respStatus;
 8003456:	89fb      	ldrh	r3, [r7, #14]
 8003458:	1c5a      	adds	r2, r3, #1
 800345a:	81fa      	strh	r2, [r7, #14]
 800345c:	461a      	mov	r2, r3
 800345e:	687b      	ldr	r3, [r7, #4]
 8003460:	4413      	add	r3, r2
 8003462:	783a      	ldrb	r2, [r7, #0]
 8003464:	701a      	strb	r2, [r3, #0]
    if (dataLength > 0) {
 8003466:	8bbb      	ldrh	r3, [r7, #28]
 8003468:	2b00      	cmp	r3, #0
 800346a:	d00b      	beq.n	8003484 <PrepareRespFrame+0xf0>
        memcpy (&txBuffer[txBufferPos], dataBuffer, dataLength);
 800346c:	89fb      	ldrh	r3, [r7, #14]
 800346e:	687a      	ldr	r2, [r7, #4]
 8003470:	4413      	add	r3, r2
 8003472:	8bba      	ldrh	r2, [r7, #28]
 8003474:	69b9      	ldr	r1, [r7, #24]
 8003476:	4618      	mov	r0, r3
 8003478:	f027 f929 	bl	802a6ce <memcpy>
        txBufferPos += dataLength;
 800347c:	89fa      	ldrh	r2, [r7, #14]
 800347e:	8bbb      	ldrh	r3, [r7, #28]
 8003480:	4413      	add	r3, r2
 8003482:	81fb      	strh	r3, [r7, #14]
    }
    crc = HAL_CRC_Calculate (&hcrc, (uint32_t*)txBuffer, txBufferPos);
 8003484:	89fb      	ldrh	r3, [r7, #14]
 8003486:	461a      	mov	r2, r3
 8003488:	6879      	ldr	r1, [r7, #4]
 800348a:	4810      	ldr	r0, [pc, #64]	@ (80034cc <PrepareRespFrame+0x138>)
 800348c:	f002 f8e4 	bl	8005658 <HAL_CRC_Calculate>
 8003490:	4603      	mov	r3, r0
 8003492:	81bb      	strh	r3, [r7, #12]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_FIRST_BYTE (crc);
 8003494:	89fb      	ldrh	r3, [r7, #14]
 8003496:	1c5a      	adds	r2, r3, #1
 8003498:	81fa      	strh	r2, [r7, #14]
 800349a:	461a      	mov	r2, r3
 800349c:	687b      	ldr	r3, [r7, #4]
 800349e:	4413      	add	r3, r2
 80034a0:	89ba      	ldrh	r2, [r7, #12]
 80034a2:	b2d2      	uxtb	r2, r2
 80034a4:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_SECOND_BYTE (crc);
 80034a6:	89bb      	ldrh	r3, [r7, #12]
 80034a8:	0a1b      	lsrs	r3, r3, #8
 80034aa:	b29a      	uxth	r2, r3
 80034ac:	89fb      	ldrh	r3, [r7, #14]
 80034ae:	1c59      	adds	r1, r3, #1
 80034b0:	81f9      	strh	r1, [r7, #14]
 80034b2:	4619      	mov	r1, r3
 80034b4:	687b      	ldr	r3, [r7, #4]
 80034b6:	440b      	add	r3, r1
 80034b8:	b2d2      	uxtb	r2, r2
 80034ba:	701a      	strb	r2, [r3, #0]

    return txBufferPos;
 80034bc:	89fb      	ldrh	r3, [r7, #14]
}
 80034be:	4618      	mov	r0, r3
 80034c0:	3710      	adds	r7, #16
 80034c2:	46bd      	mov	sp, r7
 80034c4:	bd80      	pop	{r7, pc}
 80034c6:	bf00      	nop
 80034c8:	ffff8000 	.word	0xffff8000
 80034cc:	24000248 	.word	0x24000248

080034d0 <HAL_MspInit>:
/* USER CODE END 0 */
/**
  * Initializes the Global MSP.
  */
void HAL_MspInit(void)
{
 80034d0:	b580      	push	{r7, lr}
 80034d2:	b086      	sub	sp, #24
 80034d4:	af00      	add	r7, sp, #0

  /* USER CODE BEGIN MspInit 0 */

  /* USER CODE END MspInit 0 */
  PWREx_AVDTypeDef sConfigAVD = {0};
 80034d6:	f107 0310 	add.w	r3, r7, #16
 80034da:	2200      	movs	r2, #0
 80034dc:	601a      	str	r2, [r3, #0]
 80034de:	605a      	str	r2, [r3, #4]
  PWR_PVDTypeDef sConfigPVD = {0};
 80034e0:	f107 0308 	add.w	r3, r7, #8
 80034e4:	2200      	movs	r2, #0
 80034e6:	601a      	str	r2, [r3, #0]
 80034e8:	605a      	str	r2, [r3, #4]

  __HAL_RCC_SYSCFG_CLK_ENABLE();
 80034ea:	4b1c      	ldr	r3, [pc, #112]	@ (800355c <HAL_MspInit+0x8c>)
 80034ec:	f8d3 30f4 	ldr.w	r3, [r3, #244]	@ 0xf4
 80034f0:	4a1a      	ldr	r2, [pc, #104]	@ (800355c <HAL_MspInit+0x8c>)
 80034f2:	f043 0302 	orr.w	r3, r3, #2
 80034f6:	f8c2 30f4 	str.w	r3, [r2, #244]	@ 0xf4
 80034fa:	4b18      	ldr	r3, [pc, #96]	@ (800355c <HAL_MspInit+0x8c>)
 80034fc:	f8d3 30f4 	ldr.w	r3, [r3, #244]	@ 0xf4
 8003500:	f003 0302 	and.w	r3, r3, #2
 8003504:	607b      	str	r3, [r7, #4]
 8003506:	687b      	ldr	r3, [r7, #4]

  /* System interrupt init*/
  /* PendSV_IRQn interrupt configuration */
  HAL_NVIC_SetPriority(PendSV_IRQn, 15, 0);
 8003508:	2200      	movs	r2, #0
 800350a:	210f      	movs	r1, #15
 800350c:	f06f 0001 	mvn.w	r0, #1
 8003510:	f001 ff9e 	bl	8005450 <HAL_NVIC_SetPriority>

  /* Peripheral interrupt init */
  /* RCC_IRQn interrupt configuration */
  HAL_NVIC_SetPriority(RCC_IRQn, 5, 0);
 8003514:	2200      	movs	r2, #0
 8003516:	2105      	movs	r1, #5
 8003518:	2005      	movs	r0, #5
 800351a:	f001 ff99 	bl	8005450 <HAL_NVIC_SetPriority>
  HAL_NVIC_EnableIRQ(RCC_IRQn);
 800351e:	2005      	movs	r0, #5
 8003520:	f001 ffb0 	bl	8005484 <HAL_NVIC_EnableIRQ>

  /** AVD Configuration
  */
  sConfigAVD.AVDLevel = PWR_AVDLEVEL_3;
 8003524:	f44f 23c0 	mov.w	r3, #393216	@ 0x60000
 8003528:	613b      	str	r3, [r7, #16]
  sConfigAVD.Mode = PWR_AVD_MODE_NORMAL;
 800352a:	2300      	movs	r3, #0
 800352c:	617b      	str	r3, [r7, #20]
  HAL_PWREx_ConfigAVD(&sConfigAVD);
 800352e:	f107 0310 	add.w	r3, r7, #16
 8003532:	4618      	mov	r0, r3
 8003534:	f006 fc42 	bl	8009dbc <HAL_PWREx_ConfigAVD>

  /** Enable the AVD Output
  */
  HAL_PWREx_EnableAVD();
 8003538:	f006 fcb6 	bl	8009ea8 <HAL_PWREx_EnableAVD>

  /** PVD Configuration
  */
  sConfigPVD.PVDLevel = PWR_PVDLEVEL_6;
 800353c:	23c0      	movs	r3, #192	@ 0xc0
 800353e:	60bb      	str	r3, [r7, #8]
  sConfigPVD.Mode = PWR_PVD_MODE_NORMAL;
 8003540:	2300      	movs	r3, #0
 8003542:	60fb      	str	r3, [r7, #12]
  HAL_PWR_ConfigPVD(&sConfigPVD);
 8003544:	f107 0308 	add.w	r3, r7, #8
 8003548:	4618      	mov	r0, r3
 800354a:	f006 fb73 	bl	8009c34 <HAL_PWR_ConfigPVD>

  /** Enable the PVD Output
  */
  HAL_PWR_EnablePVD();
 800354e:	f006 fbeb 	bl	8009d28 <HAL_PWR_EnablePVD>

  /* USER CODE BEGIN MspInit 1 */

  /* USER CODE END MspInit 1 */
}
 8003552:	bf00      	nop
 8003554:	3718      	adds	r7, #24
 8003556:	46bd      	mov	sp, r7
 8003558:	bd80      	pop	{r7, pc}
 800355a:	bf00      	nop
 800355c:	58024400 	.word	0x58024400

08003560 <HAL_CRC_MspInit>:
* This function configures the hardware resources used in this example
* @param hcrc: CRC handle pointer
* @retval None
*/
void HAL_CRC_MspInit(CRC_HandleTypeDef* hcrc)
{
 8003560:	b480      	push	{r7}
 8003562:	b085      	sub	sp, #20
 8003564:	af00      	add	r7, sp, #0
 8003566:	6078      	str	r0, [r7, #4]
  if(hcrc->Instance==CRC)
 8003568:	687b      	ldr	r3, [r7, #4]
 800356a:	681b      	ldr	r3, [r3, #0]
 800356c:	4a0b      	ldr	r2, [pc, #44]	@ (800359c <HAL_CRC_MspInit+0x3c>)
 800356e:	4293      	cmp	r3, r2
 8003570:	d10e      	bne.n	8003590 <HAL_CRC_MspInit+0x30>
  {
  /* USER CODE BEGIN CRC_MspInit 0 */

  /* USER CODE END CRC_MspInit 0 */
    /* Peripheral clock enable */
    __HAL_RCC_CRC_CLK_ENABLE();
 8003572:	4b0b      	ldr	r3, [pc, #44]	@ (80035a0 <HAL_CRC_MspInit+0x40>)
 8003574:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8003578:	4a09      	ldr	r2, [pc, #36]	@ (80035a0 <HAL_CRC_MspInit+0x40>)
 800357a:	f443 2300 	orr.w	r3, r3, #524288	@ 0x80000
 800357e:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 8003582:	4b07      	ldr	r3, [pc, #28]	@ (80035a0 <HAL_CRC_MspInit+0x40>)
 8003584:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8003588:	f403 2300 	and.w	r3, r3, #524288	@ 0x80000
 800358c:	60fb      	str	r3, [r7, #12]
 800358e:	68fb      	ldr	r3, [r7, #12]
  /* USER CODE BEGIN CRC_MspInit 1 */

  /* USER CODE END CRC_MspInit 1 */
  }

}
 8003590:	bf00      	nop
 8003592:	3714      	adds	r7, #20
 8003594:	46bd      	mov	sp, r7
 8003596:	f85d 7b04 	ldr.w	r7, [sp], #4
 800359a:	4770      	bx	lr
 800359c:	58024c00 	.word	0x58024c00
 80035a0:	58024400 	.word	0x58024400

080035a4 <HAL_RNG_MspInit>:
* This function configures the hardware resources used in this example
* @param hrng: RNG handle pointer
* @retval None
*/
void HAL_RNG_MspInit(RNG_HandleTypeDef* hrng)
{
 80035a4:	b580      	push	{r7, lr}
 80035a6:	b0b4      	sub	sp, #208	@ 0xd0
 80035a8:	af00      	add	r7, sp, #0
 80035aa:	6078      	str	r0, [r7, #4]
  RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
 80035ac:	f107 0310 	add.w	r3, r7, #16
 80035b0:	22c0      	movs	r2, #192	@ 0xc0
 80035b2:	2100      	movs	r1, #0
 80035b4:	4618      	mov	r0, r3
 80035b6:	f026 ff93 	bl	802a4e0 <memset>
  if(hrng->Instance==RNG)
 80035ba:	687b      	ldr	r3, [r7, #4]
 80035bc:	681b      	ldr	r3, [r3, #0]
 80035be:	4a14      	ldr	r2, [pc, #80]	@ (8003610 <HAL_RNG_MspInit+0x6c>)
 80035c0:	4293      	cmp	r3, r2
 80035c2:	d121      	bne.n	8003608 <HAL_RNG_MspInit+0x64>

  /* USER CODE END RNG_MspInit 0 */

  /** Initializes the peripherals clock
  */
    PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RNG;
 80035c4:	f44f 3200 	mov.w	r2, #131072	@ 0x20000
 80035c8:	f04f 0300 	mov.w	r3, #0
 80035cc:	e9c7 2304 	strd	r2, r3, [r7, #16]
    PeriphClkInitStruct.RngClockSelection = RCC_RNGCLKSOURCE_HSI48;
 80035d0:	2300      	movs	r3, #0
 80035d2:	f8c7 3090 	str.w	r3, [r7, #144]	@ 0x90
    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
 80035d6:	f107 0310 	add.w	r3, r7, #16
 80035da:	4618      	mov	r0, r3
 80035dc:	f007 fc9c 	bl	800af18 <HAL_RCCEx_PeriphCLKConfig>
 80035e0:	4603      	mov	r3, r0
 80035e2:	2b00      	cmp	r3, #0
 80035e4:	d001      	beq.n	80035ea <HAL_RNG_MspInit+0x46>
    {
      Error_Handler();
 80035e6:	f7ff f82f 	bl	8002648 <Error_Handler>
    }

    /* Peripheral clock enable */
    __HAL_RCC_RNG_CLK_ENABLE();
 80035ea:	4b0a      	ldr	r3, [pc, #40]	@ (8003614 <HAL_RNG_MspInit+0x70>)
 80035ec:	f8d3 30dc 	ldr.w	r3, [r3, #220]	@ 0xdc
 80035f0:	4a08      	ldr	r2, [pc, #32]	@ (8003614 <HAL_RNG_MspInit+0x70>)
 80035f2:	f043 0340 	orr.w	r3, r3, #64	@ 0x40
 80035f6:	f8c2 30dc 	str.w	r3, [r2, #220]	@ 0xdc
 80035fa:	4b06      	ldr	r3, [pc, #24]	@ (8003614 <HAL_RNG_MspInit+0x70>)
 80035fc:	f8d3 30dc 	ldr.w	r3, [r3, #220]	@ 0xdc
 8003600:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 8003604:	60fb      	str	r3, [r7, #12]
 8003606:	68fb      	ldr	r3, [r7, #12]
  /* USER CODE BEGIN RNG_MspInit 1 */

  /* USER CODE END RNG_MspInit 1 */
  }

}
 8003608:	bf00      	nop
 800360a:	37d0      	adds	r7, #208	@ 0xd0
 800360c:	46bd      	mov	sp, r7
 800360e:	bd80      	pop	{r7, pc}
 8003610:	48021800 	.word	0x48021800
 8003614:	58024400 	.word	0x58024400

08003618 <HAL_UART_MspInit>:
* This function configures the hardware resources used in this example
* @param huart: UART handle pointer
* @retval None
*/
void HAL_UART_MspInit(UART_HandleTypeDef* huart)
{
 8003618:	b580      	push	{r7, lr}
 800361a:	b0c2      	sub	sp, #264	@ 0x108
 800361c:	af00      	add	r7, sp, #0
 800361e:	f507 7384 	add.w	r3, r7, #264	@ 0x108
 8003622:	f5a3 7382 	sub.w	r3, r3, #260	@ 0x104
 8003626:	6018      	str	r0, [r3, #0]
  GPIO_InitTypeDef GPIO_InitStruct = {0};
 8003628:	f107 03f4 	add.w	r3, r7, #244	@ 0xf4
 800362c:	2200      	movs	r2, #0
 800362e:	601a      	str	r2, [r3, #0]
 8003630:	605a      	str	r2, [r3, #4]
 8003632:	609a      	str	r2, [r3, #8]
 8003634:	60da      	str	r2, [r3, #12]
 8003636:	611a      	str	r2, [r3, #16]
  RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
 8003638:	f107 0330 	add.w	r3, r7, #48	@ 0x30
 800363c:	22c0      	movs	r2, #192	@ 0xc0
 800363e:	2100      	movs	r1, #0
 8003640:	4618      	mov	r0, r3
 8003642:	f026 ff4d 	bl	802a4e0 <memset>
  if(huart->Instance==UART8)
 8003646:	f507 7384 	add.w	r3, r7, #264	@ 0x108
 800364a:	f5a3 7382 	sub.w	r3, r3, #260	@ 0x104
 800364e:	681b      	ldr	r3, [r3, #0]
 8003650:	681b      	ldr	r3, [r3, #0]
 8003652:	4ab8      	ldr	r2, [pc, #736]	@ (8003934 <HAL_UART_MspInit+0x31c>)
 8003654:	4293      	cmp	r3, r2
 8003656:	f040 80bc 	bne.w	80037d2 <HAL_UART_MspInit+0x1ba>

  /* USER CODE END UART8_MspInit 0 */

  /** Initializes the peripherals clock
  */
    PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_UART8;
 800365a:	f04f 0202 	mov.w	r2, #2
 800365e:	f04f 0300 	mov.w	r3, #0
 8003662:	e9c7 230c 	strd	r2, r3, [r7, #48]	@ 0x30
    PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1;
 8003666:	2300      	movs	r3, #0
 8003668:	f8c7 30a8 	str.w	r3, [r7, #168]	@ 0xa8
    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
 800366c:	f107 0330 	add.w	r3, r7, #48	@ 0x30
 8003670:	4618      	mov	r0, r3
 8003672:	f007 fc51 	bl	800af18 <HAL_RCCEx_PeriphCLKConfig>
 8003676:	4603      	mov	r3, r0
 8003678:	2b00      	cmp	r3, #0
 800367a:	d001      	beq.n	8003680 <HAL_UART_MspInit+0x68>
    {
      Error_Handler();
 800367c:	f7fe ffe4 	bl	8002648 <Error_Handler>
    }

    /* Peripheral clock enable */
    __HAL_RCC_UART8_CLK_ENABLE();
 8003680:	4bad      	ldr	r3, [pc, #692]	@ (8003938 <HAL_UART_MspInit+0x320>)
 8003682:	f8d3 30e8 	ldr.w	r3, [r3, #232]	@ 0xe8
 8003686:	4aac      	ldr	r2, [pc, #688]	@ (8003938 <HAL_UART_MspInit+0x320>)
 8003688:	f043 4300 	orr.w	r3, r3, #2147483648	@ 0x80000000
 800368c:	f8c2 30e8 	str.w	r3, [r2, #232]	@ 0xe8
 8003690:	4ba9      	ldr	r3, [pc, #676]	@ (8003938 <HAL_UART_MspInit+0x320>)
 8003692:	f8d3 30e8 	ldr.w	r3, [r3, #232]	@ 0xe8
 8003696:	f003 4300 	and.w	r3, r3, #2147483648	@ 0x80000000
 800369a:	62fb      	str	r3, [r7, #44]	@ 0x2c
 800369c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c

    __HAL_RCC_GPIOE_CLK_ENABLE();
 800369e:	4ba6      	ldr	r3, [pc, #664]	@ (8003938 <HAL_UART_MspInit+0x320>)
 80036a0:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 80036a4:	4aa4      	ldr	r2, [pc, #656]	@ (8003938 <HAL_UART_MspInit+0x320>)
 80036a6:	f043 0310 	orr.w	r3, r3, #16
 80036aa:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 80036ae:	4ba2      	ldr	r3, [pc, #648]	@ (8003938 <HAL_UART_MspInit+0x320>)
 80036b0:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 80036b4:	f003 0310 	and.w	r3, r3, #16
 80036b8:	62bb      	str	r3, [r7, #40]	@ 0x28
 80036ba:	6abb      	ldr	r3, [r7, #40]	@ 0x28
    /**UART8 GPIO Configuration
    PE0     ------> UART8_RX
    PE1     ------> UART8_TX
    */
    GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1;
 80036bc:	2303      	movs	r3, #3
 80036be:	f8c7 30f4 	str.w	r3, [r7, #244]	@ 0xf4
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 80036c2:	2302      	movs	r3, #2
 80036c4:	f8c7 30f8 	str.w	r3, [r7, #248]	@ 0xf8
    GPIO_InitStruct.Pull = GPIO_NOPULL;
 80036c8:	2300      	movs	r3, #0
 80036ca:	f8c7 30fc 	str.w	r3, [r7, #252]	@ 0xfc
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 80036ce:	2300      	movs	r3, #0
 80036d0:	f8c7 3100 	str.w	r3, [r7, #256]	@ 0x100
    GPIO_InitStruct.Alternate = GPIO_AF8_UART8;
 80036d4:	2308      	movs	r3, #8
 80036d6:	f8c7 3104 	str.w	r3, [r7, #260]	@ 0x104
    HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
 80036da:	f107 03f4 	add.w	r3, r7, #244	@ 0xf4
 80036de:	4619      	mov	r1, r3
 80036e0:	4896      	ldr	r0, [pc, #600]	@ (800393c <HAL_UART_MspInit+0x324>)
 80036e2:	f006 f8dd 	bl	80098a0 <HAL_GPIO_Init>

    /* UART8 DMA Init */
    /* UART8_RX Init */
    hdma_uart8_rx.Instance = DMA2_Stream7;
 80036e6:	4b96      	ldr	r3, [pc, #600]	@ (8003940 <HAL_UART_MspInit+0x328>)
 80036e8:	4a96      	ldr	r2, [pc, #600]	@ (8003944 <HAL_UART_MspInit+0x32c>)
 80036ea:	601a      	str	r2, [r3, #0]
    hdma_uart8_rx.Init.Request = DMA_REQUEST_UART8_RX;
 80036ec:	4b94      	ldr	r3, [pc, #592]	@ (8003940 <HAL_UART_MspInit+0x328>)
 80036ee:	2251      	movs	r2, #81	@ 0x51
 80036f0:	605a      	str	r2, [r3, #4]
    hdma_uart8_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
 80036f2:	4b93      	ldr	r3, [pc, #588]	@ (8003940 <HAL_UART_MspInit+0x328>)
 80036f4:	2200      	movs	r2, #0
 80036f6:	609a      	str	r2, [r3, #8]
    hdma_uart8_rx.Init.PeriphInc = DMA_PINC_DISABLE;
 80036f8:	4b91      	ldr	r3, [pc, #580]	@ (8003940 <HAL_UART_MspInit+0x328>)
 80036fa:	2200      	movs	r2, #0
 80036fc:	60da      	str	r2, [r3, #12]
    hdma_uart8_rx.Init.MemInc = DMA_MINC_ENABLE;
 80036fe:	4b90      	ldr	r3, [pc, #576]	@ (8003940 <HAL_UART_MspInit+0x328>)
 8003700:	f44f 6280 	mov.w	r2, #1024	@ 0x400
 8003704:	611a      	str	r2, [r3, #16]
    hdma_uart8_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
 8003706:	4b8e      	ldr	r3, [pc, #568]	@ (8003940 <HAL_UART_MspInit+0x328>)
 8003708:	2200      	movs	r2, #0
 800370a:	615a      	str	r2, [r3, #20]
    hdma_uart8_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
 800370c:	4b8c      	ldr	r3, [pc, #560]	@ (8003940 <HAL_UART_MspInit+0x328>)
 800370e:	2200      	movs	r2, #0
 8003710:	619a      	str	r2, [r3, #24]
    hdma_uart8_rx.Init.Mode = DMA_NORMAL;
 8003712:	4b8b      	ldr	r3, [pc, #556]	@ (8003940 <HAL_UART_MspInit+0x328>)
 8003714:	2200      	movs	r2, #0
 8003716:	61da      	str	r2, [r3, #28]
    hdma_uart8_rx.Init.Priority = DMA_PRIORITY_VERY_HIGH;
 8003718:	4b89      	ldr	r3, [pc, #548]	@ (8003940 <HAL_UART_MspInit+0x328>)
 800371a:	f44f 3240 	mov.w	r2, #196608	@ 0x30000
 800371e:	621a      	str	r2, [r3, #32]
    hdma_uart8_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
 8003720:	4b87      	ldr	r3, [pc, #540]	@ (8003940 <HAL_UART_MspInit+0x328>)
 8003722:	2200      	movs	r2, #0
 8003724:	625a      	str	r2, [r3, #36]	@ 0x24
    if (HAL_DMA_Init(&hdma_uart8_rx) != HAL_OK)
 8003726:	4886      	ldr	r0, [pc, #536]	@ (8003940 <HAL_UART_MspInit+0x328>)
 8003728:	f002 f938 	bl	800599c <HAL_DMA_Init>
 800372c:	4603      	mov	r3, r0
 800372e:	2b00      	cmp	r3, #0
 8003730:	d001      	beq.n	8003736 <HAL_UART_MspInit+0x11e>
    {
      Error_Handler();
 8003732:	f7fe ff89 	bl	8002648 <Error_Handler>
    }

    __HAL_LINKDMA(huart,hdmarx,hdma_uart8_rx);
 8003736:	f507 7384 	add.w	r3, r7, #264	@ 0x108
 800373a:	f5a3 7382 	sub.w	r3, r3, #260	@ 0x104
 800373e:	681b      	ldr	r3, [r3, #0]
 8003740:	4a7f      	ldr	r2, [pc, #508]	@ (8003940 <HAL_UART_MspInit+0x328>)
 8003742:	f8c3 2080 	str.w	r2, [r3, #128]	@ 0x80
 8003746:	4a7e      	ldr	r2, [pc, #504]	@ (8003940 <HAL_UART_MspInit+0x328>)
 8003748:	f507 7384 	add.w	r3, r7, #264	@ 0x108
 800374c:	f5a3 7382 	sub.w	r3, r3, #260	@ 0x104
 8003750:	681b      	ldr	r3, [r3, #0]
 8003752:	6393      	str	r3, [r2, #56]	@ 0x38

    /* UART8_TX Init */
    hdma_uart8_tx.Instance = DMA2_Stream6;
 8003754:	4b7c      	ldr	r3, [pc, #496]	@ (8003948 <HAL_UART_MspInit+0x330>)
 8003756:	4a7d      	ldr	r2, [pc, #500]	@ (800394c <HAL_UART_MspInit+0x334>)
 8003758:	601a      	str	r2, [r3, #0]
    hdma_uart8_tx.Init.Request = DMA_REQUEST_UART8_TX;
 800375a:	4b7b      	ldr	r3, [pc, #492]	@ (8003948 <HAL_UART_MspInit+0x330>)
 800375c:	2252      	movs	r2, #82	@ 0x52
 800375e:	605a      	str	r2, [r3, #4]
    hdma_uart8_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
 8003760:	4b79      	ldr	r3, [pc, #484]	@ (8003948 <HAL_UART_MspInit+0x330>)
 8003762:	2240      	movs	r2, #64	@ 0x40
 8003764:	609a      	str	r2, [r3, #8]
    hdma_uart8_tx.Init.PeriphInc = DMA_PINC_DISABLE;
 8003766:	4b78      	ldr	r3, [pc, #480]	@ (8003948 <HAL_UART_MspInit+0x330>)
 8003768:	2200      	movs	r2, #0
 800376a:	60da      	str	r2, [r3, #12]
    hdma_uart8_tx.Init.MemInc = DMA_MINC_ENABLE;
 800376c:	4b76      	ldr	r3, [pc, #472]	@ (8003948 <HAL_UART_MspInit+0x330>)
 800376e:	f44f 6280 	mov.w	r2, #1024	@ 0x400
 8003772:	611a      	str	r2, [r3, #16]
    hdma_uart8_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
 8003774:	4b74      	ldr	r3, [pc, #464]	@ (8003948 <HAL_UART_MspInit+0x330>)
 8003776:	2200      	movs	r2, #0
 8003778:	615a      	str	r2, [r3, #20]
    hdma_uart8_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
 800377a:	4b73      	ldr	r3, [pc, #460]	@ (8003948 <HAL_UART_MspInit+0x330>)
 800377c:	2200      	movs	r2, #0
 800377e:	619a      	str	r2, [r3, #24]
    hdma_uart8_tx.Init.Mode = DMA_NORMAL;
 8003780:	4b71      	ldr	r3, [pc, #452]	@ (8003948 <HAL_UART_MspInit+0x330>)
 8003782:	2200      	movs	r2, #0
 8003784:	61da      	str	r2, [r3, #28]
    hdma_uart8_tx.Init.Priority = DMA_PRIORITY_VERY_HIGH;
 8003786:	4b70      	ldr	r3, [pc, #448]	@ (8003948 <HAL_UART_MspInit+0x330>)
 8003788:	f44f 3240 	mov.w	r2, #196608	@ 0x30000
 800378c:	621a      	str	r2, [r3, #32]
    hdma_uart8_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
 800378e:	4b6e      	ldr	r3, [pc, #440]	@ (8003948 <HAL_UART_MspInit+0x330>)
 8003790:	2200      	movs	r2, #0
 8003792:	625a      	str	r2, [r3, #36]	@ 0x24
    if (HAL_DMA_Init(&hdma_uart8_tx) != HAL_OK)
 8003794:	486c      	ldr	r0, [pc, #432]	@ (8003948 <HAL_UART_MspInit+0x330>)
 8003796:	f002 f901 	bl	800599c <HAL_DMA_Init>
 800379a:	4603      	mov	r3, r0
 800379c:	2b00      	cmp	r3, #0
 800379e:	d001      	beq.n	80037a4 <HAL_UART_MspInit+0x18c>
    {
      Error_Handler();
 80037a0:	f7fe ff52 	bl	8002648 <Error_Handler>
    }

    __HAL_LINKDMA(huart,hdmatx,hdma_uart8_tx);
 80037a4:	f507 7384 	add.w	r3, r7, #264	@ 0x108
 80037a8:	f5a3 7382 	sub.w	r3, r3, #260	@ 0x104
 80037ac:	681b      	ldr	r3, [r3, #0]
 80037ae:	4a66      	ldr	r2, [pc, #408]	@ (8003948 <HAL_UART_MspInit+0x330>)
 80037b0:	67da      	str	r2, [r3, #124]	@ 0x7c
 80037b2:	4a65      	ldr	r2, [pc, #404]	@ (8003948 <HAL_UART_MspInit+0x330>)
 80037b4:	f507 7384 	add.w	r3, r7, #264	@ 0x108
 80037b8:	f5a3 7382 	sub.w	r3, r3, #260	@ 0x104
 80037bc:	681b      	ldr	r3, [r3, #0]
 80037be:	6393      	str	r3, [r2, #56]	@ 0x38

    /* UART8 interrupt Init */
    HAL_NVIC_SetPriority(UART8_IRQn, 5, 0);
 80037c0:	2200      	movs	r2, #0
 80037c2:	2105      	movs	r1, #5
 80037c4:	2053      	movs	r0, #83	@ 0x53
 80037c6:	f001 fe43 	bl	8005450 <HAL_NVIC_SetPriority>
    HAL_NVIC_EnableIRQ(UART8_IRQn);
 80037ca:	2053      	movs	r0, #83	@ 0x53
 80037cc:	f001 fe5a 	bl	8005484 <HAL_NVIC_EnableIRQ>
  /* USER CODE BEGIN USART6_MspInit 1 */

  /* USER CODE END USART6_MspInit 1 */
  }

}
 80037d0:	e17e      	b.n	8003ad0 <HAL_UART_MspInit+0x4b8>
  else if(huart->Instance==USART1)
 80037d2:	f507 7384 	add.w	r3, r7, #264	@ 0x108
 80037d6:	f5a3 7382 	sub.w	r3, r3, #260	@ 0x104
 80037da:	681b      	ldr	r3, [r3, #0]
 80037dc:	681b      	ldr	r3, [r3, #0]
 80037de:	4a5c      	ldr	r2, [pc, #368]	@ (8003950 <HAL_UART_MspInit+0x338>)
 80037e0:	4293      	cmp	r3, r2
 80037e2:	d14f      	bne.n	8003884 <HAL_UART_MspInit+0x26c>
    PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART1;
 80037e4:	f04f 0201 	mov.w	r2, #1
 80037e8:	f04f 0300 	mov.w	r3, #0
 80037ec:	e9c7 230c 	strd	r2, r3, [r7, #48]	@ 0x30
    PeriphClkInitStruct.Usart16ClockSelection = RCC_USART16CLKSOURCE_D2PCLK2;
 80037f0:	2300      	movs	r3, #0
 80037f2:	f8c7 30ac 	str.w	r3, [r7, #172]	@ 0xac
    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
 80037f6:	f107 0330 	add.w	r3, r7, #48	@ 0x30
 80037fa:	4618      	mov	r0, r3
 80037fc:	f007 fb8c 	bl	800af18 <HAL_RCCEx_PeriphCLKConfig>
 8003800:	4603      	mov	r3, r0
 8003802:	2b00      	cmp	r3, #0
 8003804:	d001      	beq.n	800380a <HAL_UART_MspInit+0x1f2>
      Error_Handler();
 8003806:	f7fe ff1f 	bl	8002648 <Error_Handler>
    __HAL_RCC_USART1_CLK_ENABLE();
 800380a:	4b4b      	ldr	r3, [pc, #300]	@ (8003938 <HAL_UART_MspInit+0x320>)
 800380c:	f8d3 30f0 	ldr.w	r3, [r3, #240]	@ 0xf0
 8003810:	4a49      	ldr	r2, [pc, #292]	@ (8003938 <HAL_UART_MspInit+0x320>)
 8003812:	f043 0310 	orr.w	r3, r3, #16
 8003816:	f8c2 30f0 	str.w	r3, [r2, #240]	@ 0xf0
 800381a:	4b47      	ldr	r3, [pc, #284]	@ (8003938 <HAL_UART_MspInit+0x320>)
 800381c:	f8d3 30f0 	ldr.w	r3, [r3, #240]	@ 0xf0
 8003820:	f003 0310 	and.w	r3, r3, #16
 8003824:	627b      	str	r3, [r7, #36]	@ 0x24
 8003826:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
    __HAL_RCC_GPIOB_CLK_ENABLE();
 8003828:	4b43      	ldr	r3, [pc, #268]	@ (8003938 <HAL_UART_MspInit+0x320>)
 800382a:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 800382e:	4a42      	ldr	r2, [pc, #264]	@ (8003938 <HAL_UART_MspInit+0x320>)
 8003830:	f043 0302 	orr.w	r3, r3, #2
 8003834:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 8003838:	4b3f      	ldr	r3, [pc, #252]	@ (8003938 <HAL_UART_MspInit+0x320>)
 800383a:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 800383e:	f003 0302 	and.w	r3, r3, #2
 8003842:	623b      	str	r3, [r7, #32]
 8003844:	6a3b      	ldr	r3, [r7, #32]
    GPIO_InitStruct.Pin = GPIO_PIN_14|GPIO_PIN_15;
 8003846:	f44f 4340 	mov.w	r3, #49152	@ 0xc000
 800384a:	f8c7 30f4 	str.w	r3, [r7, #244]	@ 0xf4
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 800384e:	2302      	movs	r3, #2
 8003850:	f8c7 30f8 	str.w	r3, [r7, #248]	@ 0xf8
    GPIO_InitStruct.Pull = GPIO_NOPULL;
 8003854:	2300      	movs	r3, #0
 8003856:	f8c7 30fc 	str.w	r3, [r7, #252]	@ 0xfc
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
 800385a:	2302      	movs	r3, #2
 800385c:	f8c7 3100 	str.w	r3, [r7, #256]	@ 0x100
    GPIO_InitStruct.Alternate = GPIO_AF4_USART1;
 8003860:	2304      	movs	r3, #4
 8003862:	f8c7 3104 	str.w	r3, [r7, #260]	@ 0x104
    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 8003866:	f107 03f4 	add.w	r3, r7, #244	@ 0xf4
 800386a:	4619      	mov	r1, r3
 800386c:	4839      	ldr	r0, [pc, #228]	@ (8003954 <HAL_UART_MspInit+0x33c>)
 800386e:	f006 f817 	bl	80098a0 <HAL_GPIO_Init>
    HAL_NVIC_SetPriority(USART1_IRQn, 5, 0);
 8003872:	2200      	movs	r2, #0
 8003874:	2105      	movs	r1, #5
 8003876:	2025      	movs	r0, #37	@ 0x25
 8003878:	f001 fdea 	bl	8005450 <HAL_NVIC_SetPriority>
    HAL_NVIC_EnableIRQ(USART1_IRQn);
 800387c:	2025      	movs	r0, #37	@ 0x25
 800387e:	f001 fe01 	bl	8005484 <HAL_NVIC_EnableIRQ>
}
 8003882:	e125      	b.n	8003ad0 <HAL_UART_MspInit+0x4b8>
  else if(huart->Instance==USART2)
 8003884:	f507 7384 	add.w	r3, r7, #264	@ 0x108
 8003888:	f5a3 7382 	sub.w	r3, r3, #260	@ 0x104
 800388c:	681b      	ldr	r3, [r3, #0]
 800388e:	681b      	ldr	r3, [r3, #0]
 8003890:	4a31      	ldr	r2, [pc, #196]	@ (8003958 <HAL_UART_MspInit+0x340>)
 8003892:	4293      	cmp	r3, r2
 8003894:	d164      	bne.n	8003960 <HAL_UART_MspInit+0x348>
    PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART2;
 8003896:	f04f 0202 	mov.w	r2, #2
 800389a:	f04f 0300 	mov.w	r3, #0
 800389e:	e9c7 230c 	strd	r2, r3, [r7, #48]	@ 0x30
    PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1;
 80038a2:	2300      	movs	r3, #0
 80038a4:	f8c7 30a8 	str.w	r3, [r7, #168]	@ 0xa8
    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
 80038a8:	f107 0330 	add.w	r3, r7, #48	@ 0x30
 80038ac:	4618      	mov	r0, r3
 80038ae:	f007 fb33 	bl	800af18 <HAL_RCCEx_PeriphCLKConfig>
 80038b2:	4603      	mov	r3, r0
 80038b4:	2b00      	cmp	r3, #0
 80038b6:	d001      	beq.n	80038bc <HAL_UART_MspInit+0x2a4>
      Error_Handler();
 80038b8:	f7fe fec6 	bl	8002648 <Error_Handler>
    __HAL_RCC_USART2_CLK_ENABLE();
 80038bc:	4b1e      	ldr	r3, [pc, #120]	@ (8003938 <HAL_UART_MspInit+0x320>)
 80038be:	f8d3 30e8 	ldr.w	r3, [r3, #232]	@ 0xe8
 80038c2:	4a1d      	ldr	r2, [pc, #116]	@ (8003938 <HAL_UART_MspInit+0x320>)
 80038c4:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 80038c8:	f8c2 30e8 	str.w	r3, [r2, #232]	@ 0xe8
 80038cc:	4b1a      	ldr	r3, [pc, #104]	@ (8003938 <HAL_UART_MspInit+0x320>)
 80038ce:	f8d3 30e8 	ldr.w	r3, [r3, #232]	@ 0xe8
 80038d2:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
 80038d6:	61fb      	str	r3, [r7, #28]
 80038d8:	69fb      	ldr	r3, [r7, #28]
    __HAL_RCC_GPIOD_CLK_ENABLE();
 80038da:	4b17      	ldr	r3, [pc, #92]	@ (8003938 <HAL_UART_MspInit+0x320>)
 80038dc:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 80038e0:	4a15      	ldr	r2, [pc, #84]	@ (8003938 <HAL_UART_MspInit+0x320>)
 80038e2:	f043 0308 	orr.w	r3, r3, #8
 80038e6:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 80038ea:	4b13      	ldr	r3, [pc, #76]	@ (8003938 <HAL_UART_MspInit+0x320>)
 80038ec:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 80038f0:	f003 0308 	and.w	r3, r3, #8
 80038f4:	61bb      	str	r3, [r7, #24]
 80038f6:	69bb      	ldr	r3, [r7, #24]
    GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_6;
 80038f8:	2360      	movs	r3, #96	@ 0x60
 80038fa:	f8c7 30f4 	str.w	r3, [r7, #244]	@ 0xf4
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 80038fe:	2302      	movs	r3, #2
 8003900:	f8c7 30f8 	str.w	r3, [r7, #248]	@ 0xf8
    GPIO_InitStruct.Pull = GPIO_NOPULL;
 8003904:	2300      	movs	r3, #0
 8003906:	f8c7 30fc 	str.w	r3, [r7, #252]	@ 0xfc
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
 800390a:	2302      	movs	r3, #2
 800390c:	f8c7 3100 	str.w	r3, [r7, #256]	@ 0x100
    GPIO_InitStruct.Alternate = GPIO_AF7_USART2;
 8003910:	2307      	movs	r3, #7
 8003912:	f8c7 3104 	str.w	r3, [r7, #260]	@ 0x104
    HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
 8003916:	f107 03f4 	add.w	r3, r7, #244	@ 0xf4
 800391a:	4619      	mov	r1, r3
 800391c:	480f      	ldr	r0, [pc, #60]	@ (800395c <HAL_UART_MspInit+0x344>)
 800391e:	f005 ffbf 	bl	80098a0 <HAL_GPIO_Init>
    HAL_NVIC_SetPriority(USART2_IRQn, 5, 0);
 8003922:	2200      	movs	r2, #0
 8003924:	2105      	movs	r1, #5
 8003926:	2026      	movs	r0, #38	@ 0x26
 8003928:	f001 fd92 	bl	8005450 <HAL_NVIC_SetPriority>
    HAL_NVIC_EnableIRQ(USART2_IRQn);
 800392c:	2026      	movs	r0, #38	@ 0x26
 800392e:	f001 fda9 	bl	8005484 <HAL_NVIC_EnableIRQ>
}
 8003932:	e0cd      	b.n	8003ad0 <HAL_UART_MspInit+0x4b8>
 8003934:	40007c00 	.word	0x40007c00
 8003938:	58024400 	.word	0x58024400
 800393c:	58021000 	.word	0x58021000
 8003940:	24000564 	.word	0x24000564
 8003944:	400204b8 	.word	0x400204b8
 8003948:	240005dc 	.word	0x240005dc
 800394c:	400204a0 	.word	0x400204a0
 8003950:	40011000 	.word	0x40011000
 8003954:	58020400 	.word	0x58020400
 8003958:	40004400 	.word	0x40004400
 800395c:	58020c00 	.word	0x58020c00
  else if(huart->Instance==USART3)
 8003960:	f507 7384 	add.w	r3, r7, #264	@ 0x108
 8003964:	f5a3 7382 	sub.w	r3, r3, #260	@ 0x104
 8003968:	681b      	ldr	r3, [r3, #0]
 800396a:	681b      	ldr	r3, [r3, #0]
 800396c:	4a5b      	ldr	r2, [pc, #364]	@ (8003adc <HAL_UART_MspInit+0x4c4>)
 800396e:	4293      	cmp	r3, r2
 8003970:	d14f      	bne.n	8003a12 <HAL_UART_MspInit+0x3fa>
    PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART3;
 8003972:	f04f 0202 	mov.w	r2, #2
 8003976:	f04f 0300 	mov.w	r3, #0
 800397a:	e9c7 230c 	strd	r2, r3, [r7, #48]	@ 0x30
    PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1;
 800397e:	2300      	movs	r3, #0
 8003980:	f8c7 30a8 	str.w	r3, [r7, #168]	@ 0xa8
    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
 8003984:	f107 0330 	add.w	r3, r7, #48	@ 0x30
 8003988:	4618      	mov	r0, r3
 800398a:	f007 fac5 	bl	800af18 <HAL_RCCEx_PeriphCLKConfig>
 800398e:	4603      	mov	r3, r0
 8003990:	2b00      	cmp	r3, #0
 8003992:	d001      	beq.n	8003998 <HAL_UART_MspInit+0x380>
      Error_Handler();
 8003994:	f7fe fe58 	bl	8002648 <Error_Handler>
    __HAL_RCC_USART3_CLK_ENABLE();
 8003998:	4b51      	ldr	r3, [pc, #324]	@ (8003ae0 <HAL_UART_MspInit+0x4c8>)
 800399a:	f8d3 30e8 	ldr.w	r3, [r3, #232]	@ 0xe8
 800399e:	4a50      	ldr	r2, [pc, #320]	@ (8003ae0 <HAL_UART_MspInit+0x4c8>)
 80039a0:	f443 2380 	orr.w	r3, r3, #262144	@ 0x40000
 80039a4:	f8c2 30e8 	str.w	r3, [r2, #232]	@ 0xe8
 80039a8:	4b4d      	ldr	r3, [pc, #308]	@ (8003ae0 <HAL_UART_MspInit+0x4c8>)
 80039aa:	f8d3 30e8 	ldr.w	r3, [r3, #232]	@ 0xe8
 80039ae:	f403 2380 	and.w	r3, r3, #262144	@ 0x40000
 80039b2:	617b      	str	r3, [r7, #20]
 80039b4:	697b      	ldr	r3, [r7, #20]
    __HAL_RCC_GPIOD_CLK_ENABLE();
 80039b6:	4b4a      	ldr	r3, [pc, #296]	@ (8003ae0 <HAL_UART_MspInit+0x4c8>)
 80039b8:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 80039bc:	4a48      	ldr	r2, [pc, #288]	@ (8003ae0 <HAL_UART_MspInit+0x4c8>)
 80039be:	f043 0308 	orr.w	r3, r3, #8
 80039c2:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 80039c6:	4b46      	ldr	r3, [pc, #280]	@ (8003ae0 <HAL_UART_MspInit+0x4c8>)
 80039c8:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 80039cc:	f003 0308 	and.w	r3, r3, #8
 80039d0:	613b      	str	r3, [r7, #16]
 80039d2:	693b      	ldr	r3, [r7, #16]
    GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9;
 80039d4:	f44f 7340 	mov.w	r3, #768	@ 0x300
 80039d8:	f8c7 30f4 	str.w	r3, [r7, #244]	@ 0xf4
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 80039dc:	2302      	movs	r3, #2
 80039de:	f8c7 30f8 	str.w	r3, [r7, #248]	@ 0xf8
    GPIO_InitStruct.Pull = GPIO_NOPULL;
 80039e2:	2300      	movs	r3, #0
 80039e4:	f8c7 30fc 	str.w	r3, [r7, #252]	@ 0xfc
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
 80039e8:	2302      	movs	r3, #2
 80039ea:	f8c7 3100 	str.w	r3, [r7, #256]	@ 0x100
    GPIO_InitStruct.Alternate = GPIO_AF7_USART3;
 80039ee:	2307      	movs	r3, #7
 80039f0:	f8c7 3104 	str.w	r3, [r7, #260]	@ 0x104
    HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
 80039f4:	f107 03f4 	add.w	r3, r7, #244	@ 0xf4
 80039f8:	4619      	mov	r1, r3
 80039fa:	483a      	ldr	r0, [pc, #232]	@ (8003ae4 <HAL_UART_MspInit+0x4cc>)
 80039fc:	f005 ff50 	bl	80098a0 <HAL_GPIO_Init>
    HAL_NVIC_SetPriority(USART3_IRQn, 5, 0);
 8003a00:	2200      	movs	r2, #0
 8003a02:	2105      	movs	r1, #5
 8003a04:	2027      	movs	r0, #39	@ 0x27
 8003a06:	f001 fd23 	bl	8005450 <HAL_NVIC_SetPriority>
    HAL_NVIC_EnableIRQ(USART3_IRQn);
 8003a0a:	2027      	movs	r0, #39	@ 0x27
 8003a0c:	f001 fd3a 	bl	8005484 <HAL_NVIC_EnableIRQ>
}
 8003a10:	e05e      	b.n	8003ad0 <HAL_UART_MspInit+0x4b8>
  else if(huart->Instance==USART6)
 8003a12:	f507 7384 	add.w	r3, r7, #264	@ 0x108
 8003a16:	f5a3 7382 	sub.w	r3, r3, #260	@ 0x104
 8003a1a:	681b      	ldr	r3, [r3, #0]
 8003a1c:	681b      	ldr	r3, [r3, #0]
 8003a1e:	4a32      	ldr	r2, [pc, #200]	@ (8003ae8 <HAL_UART_MspInit+0x4d0>)
 8003a20:	4293      	cmp	r3, r2
 8003a22:	d155      	bne.n	8003ad0 <HAL_UART_MspInit+0x4b8>
    PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART6;
 8003a24:	f04f 0201 	mov.w	r2, #1
 8003a28:	f04f 0300 	mov.w	r3, #0
 8003a2c:	e9c7 230c 	strd	r2, r3, [r7, #48]	@ 0x30
    PeriphClkInitStruct.Usart16ClockSelection = RCC_USART16CLKSOURCE_D2PCLK2;
 8003a30:	2300      	movs	r3, #0
 8003a32:	f8c7 30ac 	str.w	r3, [r7, #172]	@ 0xac
    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
 8003a36:	f107 0330 	add.w	r3, r7, #48	@ 0x30
 8003a3a:	4618      	mov	r0, r3
 8003a3c:	f007 fa6c 	bl	800af18 <HAL_RCCEx_PeriphCLKConfig>
 8003a40:	4603      	mov	r3, r0
 8003a42:	2b00      	cmp	r3, #0
 8003a44:	d001      	beq.n	8003a4a <HAL_UART_MspInit+0x432>
      Error_Handler();
 8003a46:	f7fe fdff 	bl	8002648 <Error_Handler>
    __HAL_RCC_USART6_CLK_ENABLE();
 8003a4a:	4b25      	ldr	r3, [pc, #148]	@ (8003ae0 <HAL_UART_MspInit+0x4c8>)
 8003a4c:	f8d3 30f0 	ldr.w	r3, [r3, #240]	@ 0xf0
 8003a50:	4a23      	ldr	r2, [pc, #140]	@ (8003ae0 <HAL_UART_MspInit+0x4c8>)
 8003a52:	f043 0320 	orr.w	r3, r3, #32
 8003a56:	f8c2 30f0 	str.w	r3, [r2, #240]	@ 0xf0
 8003a5a:	4b21      	ldr	r3, [pc, #132]	@ (8003ae0 <HAL_UART_MspInit+0x4c8>)
 8003a5c:	f8d3 30f0 	ldr.w	r3, [r3, #240]	@ 0xf0
 8003a60:	f003 0320 	and.w	r3, r3, #32
 8003a64:	60fb      	str	r3, [r7, #12]
 8003a66:	68fb      	ldr	r3, [r7, #12]
    __HAL_RCC_GPIOC_CLK_ENABLE();
 8003a68:	4b1d      	ldr	r3, [pc, #116]	@ (8003ae0 <HAL_UART_MspInit+0x4c8>)
 8003a6a:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8003a6e:	4a1c      	ldr	r2, [pc, #112]	@ (8003ae0 <HAL_UART_MspInit+0x4c8>)
 8003a70:	f043 0304 	orr.w	r3, r3, #4
 8003a74:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 8003a78:	4b19      	ldr	r3, [pc, #100]	@ (8003ae0 <HAL_UART_MspInit+0x4c8>)
 8003a7a:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8003a7e:	f003 0204 	and.w	r2, r3, #4
 8003a82:	f507 7384 	add.w	r3, r7, #264	@ 0x108
 8003a86:	f5a3 7380 	sub.w	r3, r3, #256	@ 0x100
 8003a8a:	601a      	str	r2, [r3, #0]
 8003a8c:	f507 7384 	add.w	r3, r7, #264	@ 0x108
 8003a90:	f5a3 7380 	sub.w	r3, r3, #256	@ 0x100
 8003a94:	681b      	ldr	r3, [r3, #0]
    GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7;
 8003a96:	23c0      	movs	r3, #192	@ 0xc0
 8003a98:	f8c7 30f4 	str.w	r3, [r7, #244]	@ 0xf4
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 8003a9c:	2302      	movs	r3, #2
 8003a9e:	f8c7 30f8 	str.w	r3, [r7, #248]	@ 0xf8
    GPIO_InitStruct.Pull = GPIO_NOPULL;
 8003aa2:	2300      	movs	r3, #0
 8003aa4:	f8c7 30fc 	str.w	r3, [r7, #252]	@ 0xfc
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
 8003aa8:	2302      	movs	r3, #2
 8003aaa:	f8c7 3100 	str.w	r3, [r7, #256]	@ 0x100
    GPIO_InitStruct.Alternate = GPIO_AF7_USART6;
 8003aae:	2307      	movs	r3, #7
 8003ab0:	f8c7 3104 	str.w	r3, [r7, #260]	@ 0x104
    HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
 8003ab4:	f107 03f4 	add.w	r3, r7, #244	@ 0xf4
 8003ab8:	4619      	mov	r1, r3
 8003aba:	480c      	ldr	r0, [pc, #48]	@ (8003aec <HAL_UART_MspInit+0x4d4>)
 8003abc:	f005 fef0 	bl	80098a0 <HAL_GPIO_Init>
    HAL_NVIC_SetPriority(USART6_IRQn, 5, 0);
 8003ac0:	2200      	movs	r2, #0
 8003ac2:	2105      	movs	r1, #5
 8003ac4:	2047      	movs	r0, #71	@ 0x47
 8003ac6:	f001 fcc3 	bl	8005450 <HAL_NVIC_SetPriority>
    HAL_NVIC_EnableIRQ(USART6_IRQn);
 8003aca:	2047      	movs	r0, #71	@ 0x47
 8003acc:	f001 fcda 	bl	8005484 <HAL_NVIC_EnableIRQ>
}
 8003ad0:	bf00      	nop
 8003ad2:	f507 7784 	add.w	r7, r7, #264	@ 0x108
 8003ad6:	46bd      	mov	sp, r7
 8003ad8:	bd80      	pop	{r7, pc}
 8003ada:	bf00      	nop
 8003adc:	40004800 	.word	0x40004800
 8003ae0:	58024400 	.word	0x58024400
 8003ae4:	58020c00 	.word	0x58020c00
 8003ae8:	40011400 	.word	0x40011400
 8003aec:	58020800 	.word	0x58020800

08003af0 <HAL_InitTick>:
  *         reset by HAL_Init() or at any time when clock is configured, by HAL_RCC_ClockConfig().
  * @param  TickPriority: Tick interrupt priority.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
{
 8003af0:	b580      	push	{r7, lr}
 8003af2:	b090      	sub	sp, #64	@ 0x40
 8003af4:	af00      	add	r7, sp, #0
 8003af6:	6078      	str	r0, [r7, #4]
  uint32_t              uwTimclock, uwAPB1Prescaler;

  uint32_t              uwPrescalerValue;
  uint32_t              pFLatency;
/*Configure the TIM6 IRQ priority */
  if (TickPriority < (1UL << __NVIC_PRIO_BITS))
 8003af8:	687b      	ldr	r3, [r7, #4]
 8003afa:	2b0f      	cmp	r3, #15
 8003afc:	d827      	bhi.n	8003b4e <HAL_InitTick+0x5e>
  {
  HAL_NVIC_SetPriority(TIM6_DAC_IRQn, TickPriority ,0U);
 8003afe:	2200      	movs	r2, #0
 8003b00:	6879      	ldr	r1, [r7, #4]
 8003b02:	2036      	movs	r0, #54	@ 0x36
 8003b04:	f001 fca4 	bl	8005450 <HAL_NVIC_SetPriority>

  /* Enable the TIM6 global Interrupt */
  HAL_NVIC_EnableIRQ(TIM6_DAC_IRQn);
 8003b08:	2036      	movs	r0, #54	@ 0x36
 8003b0a:	f001 fcbb 	bl	8005484 <HAL_NVIC_EnableIRQ>
    uwTickPrio = TickPriority;
 8003b0e:	4a29      	ldr	r2, [pc, #164]	@ (8003bb4 <HAL_InitTick+0xc4>)
 8003b10:	687b      	ldr	r3, [r7, #4]
 8003b12:	6013      	str	r3, [r2, #0]
  {
    return HAL_ERROR;
  }

  /* Enable TIM6 clock */
  __HAL_RCC_TIM6_CLK_ENABLE();
 8003b14:	4b28      	ldr	r3, [pc, #160]	@ (8003bb8 <HAL_InitTick+0xc8>)
 8003b16:	f8d3 30e8 	ldr.w	r3, [r3, #232]	@ 0xe8
 8003b1a:	4a27      	ldr	r2, [pc, #156]	@ (8003bb8 <HAL_InitTick+0xc8>)
 8003b1c:	f043 0310 	orr.w	r3, r3, #16
 8003b20:	f8c2 30e8 	str.w	r3, [r2, #232]	@ 0xe8
 8003b24:	4b24      	ldr	r3, [pc, #144]	@ (8003bb8 <HAL_InitTick+0xc8>)
 8003b26:	f8d3 30e8 	ldr.w	r3, [r3, #232]	@ 0xe8
 8003b2a:	f003 0310 	and.w	r3, r3, #16
 8003b2e:	60fb      	str	r3, [r7, #12]
 8003b30:	68fb      	ldr	r3, [r7, #12]

  /* Get clock configuration */
  HAL_RCC_GetClockConfig(&clkconfig, &pFLatency);
 8003b32:	f107 0210 	add.w	r2, r7, #16
 8003b36:	f107 0314 	add.w	r3, r7, #20
 8003b3a:	4611      	mov	r1, r2
 8003b3c:	4618      	mov	r0, r3
 8003b3e:	f007 f9a9 	bl	800ae94 <HAL_RCC_GetClockConfig>

  /* Get APB1 prescaler */
  uwAPB1Prescaler = clkconfig.APB1CLKDivider;
 8003b42:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8003b44:	63bb      	str	r3, [r7, #56]	@ 0x38
  /* Compute TIM6 clock */
  if (uwAPB1Prescaler == RCC_HCLK_DIV1)
 8003b46:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8003b48:	2b00      	cmp	r3, #0
 8003b4a:	d106      	bne.n	8003b5a <HAL_InitTick+0x6a>
 8003b4c:	e001      	b.n	8003b52 <HAL_InitTick+0x62>
    return HAL_ERROR;
 8003b4e:	2301      	movs	r3, #1
 8003b50:	e02b      	b.n	8003baa <HAL_InitTick+0xba>
  {
    uwTimclock = HAL_RCC_GetPCLK1Freq();
 8003b52:	f007 f973 	bl	800ae3c <HAL_RCC_GetPCLK1Freq>
 8003b56:	63f8      	str	r0, [r7, #60]	@ 0x3c
 8003b58:	e004      	b.n	8003b64 <HAL_InitTick+0x74>
  }
  else
  {
    uwTimclock = 2UL * HAL_RCC_GetPCLK1Freq();
 8003b5a:	f007 f96f 	bl	800ae3c <HAL_RCC_GetPCLK1Freq>
 8003b5e:	4603      	mov	r3, r0
 8003b60:	005b      	lsls	r3, r3, #1
 8003b62:	63fb      	str	r3, [r7, #60]	@ 0x3c
  }

  /* Compute the prescaler value to have TIM6 counter clock equal to 1MHz */
  uwPrescalerValue = (uint32_t) ((uwTimclock / 1000000U) - 1U);
 8003b64:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 8003b66:	4a15      	ldr	r2, [pc, #84]	@ (8003bbc <HAL_InitTick+0xcc>)
 8003b68:	fba2 2303 	umull	r2, r3, r2, r3
 8003b6c:	0c9b      	lsrs	r3, r3, #18
 8003b6e:	3b01      	subs	r3, #1
 8003b70:	637b      	str	r3, [r7, #52]	@ 0x34

  /* Initialize TIM6 */
  htim6.Instance = TIM6;
 8003b72:	4b13      	ldr	r3, [pc, #76]	@ (8003bc0 <HAL_InitTick+0xd0>)
 8003b74:	4a13      	ldr	r2, [pc, #76]	@ (8003bc4 <HAL_InitTick+0xd4>)
 8003b76:	601a      	str	r2, [r3, #0]
  + Period = [(TIM6CLK/1000) - 1]. to have a (1/1000) s time base.
  + Prescaler = (uwTimclock/1000000 - 1) to have a 1MHz counter clock.
  + ClockDivision = 0
  + Counter direction = Up
  */
  htim6.Init.Period = (1000000U / 1000U) - 1U;
 8003b78:	4b11      	ldr	r3, [pc, #68]	@ (8003bc0 <HAL_InitTick+0xd0>)
 8003b7a:	f240 32e7 	movw	r2, #999	@ 0x3e7
 8003b7e:	60da      	str	r2, [r3, #12]
  htim6.Init.Prescaler = uwPrescalerValue;
 8003b80:	4a0f      	ldr	r2, [pc, #60]	@ (8003bc0 <HAL_InitTick+0xd0>)
 8003b82:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8003b84:	6053      	str	r3, [r2, #4]
  htim6.Init.ClockDivision = 0;
 8003b86:	4b0e      	ldr	r3, [pc, #56]	@ (8003bc0 <HAL_InitTick+0xd0>)
 8003b88:	2200      	movs	r2, #0
 8003b8a:	611a      	str	r2, [r3, #16]
  htim6.Init.CounterMode = TIM_COUNTERMODE_UP;
 8003b8c:	4b0c      	ldr	r3, [pc, #48]	@ (8003bc0 <HAL_InitTick+0xd0>)
 8003b8e:	2200      	movs	r2, #0
 8003b90:	609a      	str	r2, [r3, #8]

  if(HAL_TIM_Base_Init(&htim6) == HAL_OK)
 8003b92:	480b      	ldr	r0, [pc, #44]	@ (8003bc0 <HAL_InitTick+0xd0>)
 8003b94:	f009 f888 	bl	800cca8 <HAL_TIM_Base_Init>
 8003b98:	4603      	mov	r3, r0
 8003b9a:	2b00      	cmp	r3, #0
 8003b9c:	d104      	bne.n	8003ba8 <HAL_InitTick+0xb8>
  {
    /* Start the TIM time Base generation in interrupt mode */
    return HAL_TIM_Base_Start_IT(&htim6);
 8003b9e:	4808      	ldr	r0, [pc, #32]	@ (8003bc0 <HAL_InitTick+0xd0>)
 8003ba0:	f009 f8e4 	bl	800cd6c <HAL_TIM_Base_Start_IT>
 8003ba4:	4603      	mov	r3, r0
 8003ba6:	e000      	b.n	8003baa <HAL_InitTick+0xba>
  }

  /* Return function status */
  return HAL_ERROR;
 8003ba8:	2301      	movs	r3, #1
}
 8003baa:	4618      	mov	r0, r3
 8003bac:	3740      	adds	r7, #64	@ 0x40
 8003bae:	46bd      	mov	sp, r7
 8003bb0:	bd80      	pop	{r7, pc}
 8003bb2:	bf00      	nop
 8003bb4:	2400002c 	.word	0x2400002c
 8003bb8:	58024400 	.word	0x58024400
 8003bbc:	431bde83 	.word	0x431bde83
 8003bc0:	24000f9c 	.word	0x24000f9c
 8003bc4:	40001000 	.word	0x40001000

08003bc8 <NMI_Handler>:
/******************************************************************************/
/**
  * @brief This function handles Non maskable interrupt.
  */
void NMI_Handler(void)
{
 8003bc8:	b480      	push	{r7}
 8003bca:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */

  /* USER CODE END NonMaskableInt_IRQn 0 */
  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
   while (1)
 8003bcc:	bf00      	nop
 8003bce:	e7fd      	b.n	8003bcc <NMI_Handler+0x4>

08003bd0 <HardFault_Handler>:

/**
  * @brief This function handles Hard fault interrupt.
  */
void HardFault_Handler(void)
{
 8003bd0:	b480      	push	{r7}
 8003bd2:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN HardFault_IRQn 0 */

  /* USER CODE END HardFault_IRQn 0 */
  while (1)
 8003bd4:	bf00      	nop
 8003bd6:	e7fd      	b.n	8003bd4 <HardFault_Handler+0x4>

08003bd8 <MemManage_Handler>:

/**
  * @brief This function handles Memory management fault.
  */
void MemManage_Handler(void)
{
 8003bd8:	b480      	push	{r7}
 8003bda:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN MemoryManagement_IRQn 0 */

  /* USER CODE END MemoryManagement_IRQn 0 */
  while (1)
 8003bdc:	bf00      	nop
 8003bde:	e7fd      	b.n	8003bdc <MemManage_Handler+0x4>

08003be0 <BusFault_Handler>:

/**
  * @brief This function handles Pre-fetch fault, memory access fault.
  */
void BusFault_Handler(void)
{
 8003be0:	b480      	push	{r7}
 8003be2:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN BusFault_IRQn 0 */

  /* USER CODE END BusFault_IRQn 0 */
  while (1)
 8003be4:	bf00      	nop
 8003be6:	e7fd      	b.n	8003be4 <BusFault_Handler+0x4>

08003be8 <UsageFault_Handler>:

/**
  * @brief This function handles Undefined instruction or illegal state.
  */
void UsageFault_Handler(void)
{
 8003be8:	b480      	push	{r7}
 8003bea:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN UsageFault_IRQn 0 */

  /* USER CODE END UsageFault_IRQn 0 */
  while (1)
 8003bec:	bf00      	nop
 8003bee:	e7fd      	b.n	8003bec <UsageFault_Handler+0x4>

08003bf0 <DebugMon_Handler>:

/**
  * @brief This function handles Debug monitor.
  */
void DebugMon_Handler(void)
{
 8003bf0:	b480      	push	{r7}
 8003bf2:	af00      	add	r7, sp, #0

  /* USER CODE END DebugMonitor_IRQn 0 */
  /* USER CODE BEGIN DebugMonitor_IRQn 1 */

  /* USER CODE END DebugMonitor_IRQn 1 */
}
 8003bf4:	bf00      	nop
 8003bf6:	46bd      	mov	sp, r7
 8003bf8:	f85d 7b04 	ldr.w	r7, [sp], #4
 8003bfc:	4770      	bx	lr

08003bfe <RCC_IRQHandler>:

/**
  * @brief This function handles RCC global interrupt.
  */
void RCC_IRQHandler(void)
{
 8003bfe:	b480      	push	{r7}
 8003c00:	af00      	add	r7, sp, #0

  /* USER CODE END RCC_IRQn 0 */
  /* USER CODE BEGIN RCC_IRQn 1 */

  /* USER CODE END RCC_IRQn 1 */
}
 8003c02:	bf00      	nop
 8003c04:	46bd      	mov	sp, r7
 8003c06:	f85d 7b04 	ldr.w	r7, [sp], #4
 8003c0a:	4770      	bx	lr

08003c0c <USART1_IRQHandler>:

/**
  * @brief This function handles USART1 global interrupt.
  */
void USART1_IRQHandler(void)
{
 8003c0c:	b580      	push	{r7, lr}
 8003c0e:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN USART1_IRQn 0 */

  /* USER CODE END USART1_IRQn 0 */
  HAL_UART_IRQHandler(&huart1);
 8003c10:	4802      	ldr	r0, [pc, #8]	@ (8003c1c <USART1_IRQHandler+0x10>)
 8003c12:	f009 fc89 	bl	800d528 <HAL_UART_IRQHandler>
  /* USER CODE BEGIN USART1_IRQn 1 */

  /* USER CODE END USART1_IRQn 1 */
}
 8003c16:	bf00      	nop
 8003c18:	bd80      	pop	{r7, pc}
 8003c1a:	bf00      	nop
 8003c1c:	24000314 	.word	0x24000314

08003c20 <USART2_IRQHandler>:

/**
  * @brief This function handles USART2 global interrupt.
  */
void USART2_IRQHandler(void)
{
 8003c20:	b580      	push	{r7, lr}
 8003c22:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN USART2_IRQn 0 */

  /* USER CODE END USART2_IRQn 0 */
  HAL_UART_IRQHandler(&huart2);
 8003c24:	4802      	ldr	r0, [pc, #8]	@ (8003c30 <USART2_IRQHandler+0x10>)
 8003c26:	f009 fc7f 	bl	800d528 <HAL_UART_IRQHandler>
  /* USER CODE BEGIN USART2_IRQn 1 */

  /* USER CODE END USART2_IRQn 1 */
}
 8003c2a:	bf00      	nop
 8003c2c:	bd80      	pop	{r7, pc}
 8003c2e:	bf00      	nop
 8003c30:	240003a8 	.word	0x240003a8

08003c34 <USART3_IRQHandler>:

/**
  * @brief This function handles USART3 global interrupt.
  */
void USART3_IRQHandler(void)
{
 8003c34:	b580      	push	{r7, lr}
 8003c36:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN USART3_IRQn 0 */

  /* USER CODE END USART3_IRQn 0 */
  HAL_UART_IRQHandler(&huart3);
 8003c38:	4802      	ldr	r0, [pc, #8]	@ (8003c44 <USART3_IRQHandler+0x10>)
 8003c3a:	f009 fc75 	bl	800d528 <HAL_UART_IRQHandler>
  /* USER CODE BEGIN USART3_IRQn 1 */

  /* USER CODE END USART3_IRQn 1 */
}
 8003c3e:	bf00      	nop
 8003c40:	bd80      	pop	{r7, pc}
 8003c42:	bf00      	nop
 8003c44:	2400043c 	.word	0x2400043c

08003c48 <TIM6_DAC_IRQHandler>:

/**
  * @brief This function handles TIM6 global interrupt, DAC1_CH1 and DAC1_CH2 underrun error interrupts.
  */
void TIM6_DAC_IRQHandler(void)
{
 8003c48:	b580      	push	{r7, lr}
 8003c4a:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN TIM6_DAC_IRQn 0 */

  /* USER CODE END TIM6_DAC_IRQn 0 */
  HAL_TIM_IRQHandler(&htim6);
 8003c4c:	4802      	ldr	r0, [pc, #8]	@ (8003c58 <TIM6_DAC_IRQHandler+0x10>)
 8003c4e:	f009 f905 	bl	800ce5c <HAL_TIM_IRQHandler>
  /* USER CODE BEGIN TIM6_DAC_IRQn 1 */

  /* USER CODE END TIM6_DAC_IRQn 1 */
}
 8003c52:	bf00      	nop
 8003c54:	bd80      	pop	{r7, pc}
 8003c56:	bf00      	nop
 8003c58:	24000f9c 	.word	0x24000f9c

08003c5c <ETH_IRQHandler>:

/**
  * @brief This function handles Ethernet global interrupt.
  */
void ETH_IRQHandler(void)
{
 8003c5c:	b580      	push	{r7, lr}
 8003c5e:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN ETH_IRQn 0 */

  /* USER CODE END ETH_IRQn 0 */
  HAL_ETH_IRQHandler(&heth);
 8003c60:	4802      	ldr	r0, [pc, #8]	@ (8003c6c <ETH_IRQHandler+0x10>)
 8003c62:	f004 fc95 	bl	8008590 <HAL_ETH_IRQHandler>
  /* USER CODE BEGIN ETH_IRQn 1 */

  /* USER CODE END ETH_IRQn 1 */
}
 8003c66:	bf00      	nop
 8003c68:	bd80      	pop	{r7, pc}
 8003c6a:	bf00      	nop
 8003c6c:	240022bc 	.word	0x240022bc

08003c70 <DMA2_Stream6_IRQHandler>:

/**
  * @brief This function handles DMA2 stream6 global interrupt.
  */
void DMA2_Stream6_IRQHandler(void)
{
 8003c70:	b580      	push	{r7, lr}
 8003c72:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN DMA2_Stream6_IRQn 0 */

  /* USER CODE END DMA2_Stream6_IRQn 0 */
  HAL_DMA_IRQHandler(&hdma_uart8_tx);
 8003c74:	4802      	ldr	r0, [pc, #8]	@ (8003c80 <DMA2_Stream6_IRQHandler+0x10>)
 8003c76:	f002 ff51 	bl	8006b1c <HAL_DMA_IRQHandler>
  /* USER CODE BEGIN DMA2_Stream6_IRQn 1 */

  /* USER CODE END DMA2_Stream6_IRQn 1 */
}
 8003c7a:	bf00      	nop
 8003c7c:	bd80      	pop	{r7, pc}
 8003c7e:	bf00      	nop
 8003c80:	240005dc 	.word	0x240005dc

08003c84 <DMA2_Stream7_IRQHandler>:

/**
  * @brief This function handles DMA2 stream7 global interrupt.
  */
void DMA2_Stream7_IRQHandler(void)
{
 8003c84:	b580      	push	{r7, lr}
 8003c86:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN DMA2_Stream7_IRQn 0 */

  /* USER CODE END DMA2_Stream7_IRQn 0 */
  HAL_DMA_IRQHandler(&hdma_uart8_rx);
 8003c88:	4802      	ldr	r0, [pc, #8]	@ (8003c94 <DMA2_Stream7_IRQHandler+0x10>)
 8003c8a:	f002 ff47 	bl	8006b1c <HAL_DMA_IRQHandler>
  /* USER CODE BEGIN DMA2_Stream7_IRQn 1 */

  /* USER CODE END DMA2_Stream7_IRQn 1 */
}
 8003c8e:	bf00      	nop
 8003c90:	bd80      	pop	{r7, pc}
 8003c92:	bf00      	nop
 8003c94:	24000564 	.word	0x24000564

08003c98 <USART6_IRQHandler>:

/**
  * @brief This function handles USART6 global interrupt.
  */
void USART6_IRQHandler(void)
{
 8003c98:	b580      	push	{r7, lr}
 8003c9a:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN USART6_IRQn 0 */

  /* USER CODE END USART6_IRQn 0 */
  HAL_UART_IRQHandler(&huart6);
 8003c9c:	4802      	ldr	r0, [pc, #8]	@ (8003ca8 <USART6_IRQHandler+0x10>)
 8003c9e:	f009 fc43 	bl	800d528 <HAL_UART_IRQHandler>
  /* USER CODE BEGIN USART6_IRQn 1 */

  /* USER CODE END USART6_IRQn 1 */
}
 8003ca2:	bf00      	nop
 8003ca4:	bd80      	pop	{r7, pc}
 8003ca6:	bf00      	nop
 8003ca8:	240004d0 	.word	0x240004d0

08003cac <UART8_IRQHandler>:

/**
  * @brief This function handles UART8 global interrupt.
  */
void UART8_IRQHandler(void)
{
 8003cac:	b580      	push	{r7, lr}
 8003cae:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN UART8_IRQn 0 */

  /* USER CODE END UART8_IRQn 0 */
  HAL_UART_IRQHandler(&huart8);
 8003cb0:	4802      	ldr	r0, [pc, #8]	@ (8003cbc <UART8_IRQHandler+0x10>)
 8003cb2:	f009 fc39 	bl	800d528 <HAL_UART_IRQHandler>
  /* USER CODE BEGIN UART8_IRQn 1 */

  /* USER CODE END UART8_IRQn 1 */
}
 8003cb6:	bf00      	nop
 8003cb8:	bd80      	pop	{r7, pc}
 8003cba:	bf00      	nop
 8003cbc:	24000280 	.word	0x24000280

08003cc0 <_getpid>:
void initialise_monitor_handles()
{
}

int _getpid(void)
{
 8003cc0:	b480      	push	{r7}
 8003cc2:	af00      	add	r7, sp, #0
  return 1;
 8003cc4:	2301      	movs	r3, #1
}
 8003cc6:	4618      	mov	r0, r3
 8003cc8:	46bd      	mov	sp, r7
 8003cca:	f85d 7b04 	ldr.w	r7, [sp], #4
 8003cce:	4770      	bx	lr

08003cd0 <_kill>:

int _kill(int pid, int sig)
{
 8003cd0:	b480      	push	{r7}
 8003cd2:	b083      	sub	sp, #12
 8003cd4:	af00      	add	r7, sp, #0
 8003cd6:	6078      	str	r0, [r7, #4]
 8003cd8:	6039      	str	r1, [r7, #0]
  (void)pid;
  (void)sig;
  errno = EINVAL;
 8003cda:	4b05      	ldr	r3, [pc, #20]	@ (8003cf0 <_kill+0x20>)
 8003cdc:	2216      	movs	r2, #22
 8003cde:	601a      	str	r2, [r3, #0]
  return -1;
 8003ce0:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
}
 8003ce4:	4618      	mov	r0, r3
 8003ce6:	370c      	adds	r7, #12
 8003ce8:	46bd      	mov	sp, r7
 8003cea:	f85d 7b04 	ldr.w	r7, [sp], #4
 8003cee:	4770      	bx	lr
 8003cf0:	2402b250 	.word	0x2402b250

08003cf4 <_exit>:

void _exit (int status)
{
 8003cf4:	b580      	push	{r7, lr}
 8003cf6:	b082      	sub	sp, #8
 8003cf8:	af00      	add	r7, sp, #0
 8003cfa:	6078      	str	r0, [r7, #4]
  _kill(status, -1);
 8003cfc:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 8003d00:	6878      	ldr	r0, [r7, #4]
 8003d02:	f7ff ffe5 	bl	8003cd0 <_kill>
  while (1) {}    /* Make sure we hang here */
 8003d06:	bf00      	nop
 8003d08:	e7fd      	b.n	8003d06 <_exit+0x12>

08003d0a <_read>:
}

__attribute__((weak)) int _read(int file, char *ptr, int len)
{
 8003d0a:	b580      	push	{r7, lr}
 8003d0c:	b086      	sub	sp, #24
 8003d0e:	af00      	add	r7, sp, #0
 8003d10:	60f8      	str	r0, [r7, #12]
 8003d12:	60b9      	str	r1, [r7, #8]
 8003d14:	607a      	str	r2, [r7, #4]
  (void)file;
  int DataIdx;

  for (DataIdx = 0; DataIdx < len; DataIdx++)
 8003d16:	2300      	movs	r3, #0
 8003d18:	617b      	str	r3, [r7, #20]
 8003d1a:	e00a      	b.n	8003d32 <_read+0x28>
  {
    *ptr++ = __io_getchar();
 8003d1c:	f3af 8000 	nop.w
 8003d20:	4601      	mov	r1, r0
 8003d22:	68bb      	ldr	r3, [r7, #8]
 8003d24:	1c5a      	adds	r2, r3, #1
 8003d26:	60ba      	str	r2, [r7, #8]
 8003d28:	b2ca      	uxtb	r2, r1
 8003d2a:	701a      	strb	r2, [r3, #0]
  for (DataIdx = 0; DataIdx < len; DataIdx++)
 8003d2c:	697b      	ldr	r3, [r7, #20]
 8003d2e:	3301      	adds	r3, #1
 8003d30:	617b      	str	r3, [r7, #20]
 8003d32:	697a      	ldr	r2, [r7, #20]
 8003d34:	687b      	ldr	r3, [r7, #4]
 8003d36:	429a      	cmp	r2, r3
 8003d38:	dbf0      	blt.n	8003d1c <_read+0x12>
  }

  return len;
 8003d3a:	687b      	ldr	r3, [r7, #4]
}
 8003d3c:	4618      	mov	r0, r3
 8003d3e:	3718      	adds	r7, #24
 8003d40:	46bd      	mov	sp, r7
 8003d42:	bd80      	pop	{r7, pc}

08003d44 <_write>:

__attribute__((weak)) int _write(int file, char *ptr, int len)
{
 8003d44:	b580      	push	{r7, lr}
 8003d46:	b086      	sub	sp, #24
 8003d48:	af00      	add	r7, sp, #0
 8003d4a:	60f8      	str	r0, [r7, #12]
 8003d4c:	60b9      	str	r1, [r7, #8]
 8003d4e:	607a      	str	r2, [r7, #4]
  (void)file;
  int DataIdx;

  for (DataIdx = 0; DataIdx < len; DataIdx++)
 8003d50:	2300      	movs	r3, #0
 8003d52:	617b      	str	r3, [r7, #20]
 8003d54:	e009      	b.n	8003d6a <_write+0x26>
  {
    __io_putchar(*ptr++);
 8003d56:	68bb      	ldr	r3, [r7, #8]
 8003d58:	1c5a      	adds	r2, r3, #1
 8003d5a:	60ba      	str	r2, [r7, #8]
 8003d5c:	781b      	ldrb	r3, [r3, #0]
 8003d5e:	4618      	mov	r0, r3
 8003d60:	f7fd ffaa 	bl	8001cb8 <__io_putchar>
  for (DataIdx = 0; DataIdx < len; DataIdx++)
 8003d64:	697b      	ldr	r3, [r7, #20]
 8003d66:	3301      	adds	r3, #1
 8003d68:	617b      	str	r3, [r7, #20]
 8003d6a:	697a      	ldr	r2, [r7, #20]
 8003d6c:	687b      	ldr	r3, [r7, #4]
 8003d6e:	429a      	cmp	r2, r3
 8003d70:	dbf1      	blt.n	8003d56 <_write+0x12>
//	  ITM_SendChar(*ptr++);
  }
  return len;
 8003d72:	687b      	ldr	r3, [r7, #4]
}
 8003d74:	4618      	mov	r0, r3
 8003d76:	3718      	adds	r7, #24
 8003d78:	46bd      	mov	sp, r7
 8003d7a:	bd80      	pop	{r7, pc}

08003d7c <_close>:

int _close(int file)
{
 8003d7c:	b480      	push	{r7}
 8003d7e:	b083      	sub	sp, #12
 8003d80:	af00      	add	r7, sp, #0
 8003d82:	6078      	str	r0, [r7, #4]
  (void)file;
  return -1;
 8003d84:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
}
 8003d88:	4618      	mov	r0, r3
 8003d8a:	370c      	adds	r7, #12
 8003d8c:	46bd      	mov	sp, r7
 8003d8e:	f85d 7b04 	ldr.w	r7, [sp], #4
 8003d92:	4770      	bx	lr

08003d94 <_fstat>:


int _fstat(int file, struct stat *st)
{
 8003d94:	b480      	push	{r7}
 8003d96:	b083      	sub	sp, #12
 8003d98:	af00      	add	r7, sp, #0
 8003d9a:	6078      	str	r0, [r7, #4]
 8003d9c:	6039      	str	r1, [r7, #0]
  (void)file;
  st->st_mode = S_IFCHR;
 8003d9e:	683b      	ldr	r3, [r7, #0]
 8003da0:	f44f 5200 	mov.w	r2, #8192	@ 0x2000
 8003da4:	605a      	str	r2, [r3, #4]
  return 0;
 8003da6:	2300      	movs	r3, #0
}
 8003da8:	4618      	mov	r0, r3
 8003daa:	370c      	adds	r7, #12
 8003dac:	46bd      	mov	sp, r7
 8003dae:	f85d 7b04 	ldr.w	r7, [sp], #4
 8003db2:	4770      	bx	lr

08003db4 <_isatty>:

int _isatty(int file)
{
 8003db4:	b480      	push	{r7}
 8003db6:	b083      	sub	sp, #12
 8003db8:	af00      	add	r7, sp, #0
 8003dba:	6078      	str	r0, [r7, #4]
  (void)file;
  return 1;
 8003dbc:	2301      	movs	r3, #1
}
 8003dbe:	4618      	mov	r0, r3
 8003dc0:	370c      	adds	r7, #12
 8003dc2:	46bd      	mov	sp, r7
 8003dc4:	f85d 7b04 	ldr.w	r7, [sp], #4
 8003dc8:	4770      	bx	lr

08003dca <_lseek>:

int _lseek(int file, int ptr, int dir)
{
 8003dca:	b480      	push	{r7}
 8003dcc:	b085      	sub	sp, #20
 8003dce:	af00      	add	r7, sp, #0
 8003dd0:	60f8      	str	r0, [r7, #12]
 8003dd2:	60b9      	str	r1, [r7, #8]
 8003dd4:	607a      	str	r2, [r7, #4]
  (void)file;
  (void)ptr;
  (void)dir;
  return 0;
 8003dd6:	2300      	movs	r3, #0
}
 8003dd8:	4618      	mov	r0, r3
 8003dda:	3714      	adds	r7, #20
 8003ddc:	46bd      	mov	sp, r7
 8003dde:	f85d 7b04 	ldr.w	r7, [sp], #4
 8003de2:	4770      	bx	lr

08003de4 <_sbrk>:
 *
 * @param incr Memory size
 * @return Pointer to allocated memory
 */
void *_sbrk(ptrdiff_t incr)
{
 8003de4:	b480      	push	{r7}
 8003de6:	b087      	sub	sp, #28
 8003de8:	af00      	add	r7, sp, #0
 8003dea:	6078      	str	r0, [r7, #4]
  extern uint8_t _end; /* Symbol defined in the linker script */
  extern uint8_t _estack; /* Symbol defined in the linker script */
  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
 8003dec:	4a14      	ldr	r2, [pc, #80]	@ (8003e40 <_sbrk+0x5c>)
 8003dee:	4b15      	ldr	r3, [pc, #84]	@ (8003e44 <_sbrk+0x60>)
 8003df0:	1ad3      	subs	r3, r2, r3
 8003df2:	617b      	str	r3, [r7, #20]
  const uint8_t *max_heap = (uint8_t *)stack_limit;
 8003df4:	697b      	ldr	r3, [r7, #20]
 8003df6:	613b      	str	r3, [r7, #16]
  uint8_t *prev_heap_end;

  /* Initialize heap end at first call */
  if (NULL == __sbrk_heap_end)
 8003df8:	4b13      	ldr	r3, [pc, #76]	@ (8003e48 <_sbrk+0x64>)
 8003dfa:	681b      	ldr	r3, [r3, #0]
 8003dfc:	2b00      	cmp	r3, #0
 8003dfe:	d102      	bne.n	8003e06 <_sbrk+0x22>
  {
    __sbrk_heap_end = &_end;
 8003e00:	4b11      	ldr	r3, [pc, #68]	@ (8003e48 <_sbrk+0x64>)
 8003e02:	4a12      	ldr	r2, [pc, #72]	@ (8003e4c <_sbrk+0x68>)
 8003e04:	601a      	str	r2, [r3, #0]
  }

  /* Protect heap from growing into the reserved MSP stack */
  if (__sbrk_heap_end + incr > max_heap)
 8003e06:	4b10      	ldr	r3, [pc, #64]	@ (8003e48 <_sbrk+0x64>)
 8003e08:	681a      	ldr	r2, [r3, #0]
 8003e0a:	687b      	ldr	r3, [r7, #4]
 8003e0c:	4413      	add	r3, r2
 8003e0e:	693a      	ldr	r2, [r7, #16]
 8003e10:	429a      	cmp	r2, r3
 8003e12:	d205      	bcs.n	8003e20 <_sbrk+0x3c>
  {
    errno = ENOMEM;
 8003e14:	4b0e      	ldr	r3, [pc, #56]	@ (8003e50 <_sbrk+0x6c>)
 8003e16:	220c      	movs	r2, #12
 8003e18:	601a      	str	r2, [r3, #0]
    return (void *)-1;
 8003e1a:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8003e1e:	e009      	b.n	8003e34 <_sbrk+0x50>
  }

  prev_heap_end = __sbrk_heap_end;
 8003e20:	4b09      	ldr	r3, [pc, #36]	@ (8003e48 <_sbrk+0x64>)
 8003e22:	681b      	ldr	r3, [r3, #0]
 8003e24:	60fb      	str	r3, [r7, #12]
  __sbrk_heap_end += incr;
 8003e26:	4b08      	ldr	r3, [pc, #32]	@ (8003e48 <_sbrk+0x64>)
 8003e28:	681a      	ldr	r2, [r3, #0]
 8003e2a:	687b      	ldr	r3, [r7, #4]
 8003e2c:	4413      	add	r3, r2
 8003e2e:	4a06      	ldr	r2, [pc, #24]	@ (8003e48 <_sbrk+0x64>)
 8003e30:	6013      	str	r3, [r2, #0]

  return (void *)prev_heap_end;
 8003e32:	68fb      	ldr	r3, [r7, #12]
}
 8003e34:	4618      	mov	r0, r3
 8003e36:	371c      	adds	r7, #28
 8003e38:	46bd      	mov	sp, r7
 8003e3a:	f85d 7b04 	ldr.w	r7, [sp], #4
 8003e3e:	4770      	bx	lr
 8003e40:	24060000 	.word	0x24060000
 8003e44:	00000400 	.word	0x00000400
 8003e48:	24000fe8 	.word	0x24000fe8
 8003e4c:	2402b258 	.word	0x2402b258
 8003e50:	2402b250 	.word	0x2402b250

08003e54 <SystemInit>:
  *         configuration.
  * @param  None
  * @retval None
  */
void SystemInit (void)
{
 8003e54:	b480      	push	{r7}
 8003e56:	af00      	add	r7, sp, #0
 __IO uint32_t tmpreg;
#endif /* DATA_IN_D2_SRAM */

  /* FPU settings ------------------------------------------------------------*/
  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
 8003e58:	4b37      	ldr	r3, [pc, #220]	@ (8003f38 <SystemInit+0xe4>)
 8003e5a:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 8003e5e:	4a36      	ldr	r2, [pc, #216]	@ (8003f38 <SystemInit+0xe4>)
 8003e60:	f443 0370 	orr.w	r3, r3, #15728640	@ 0xf00000
 8003e64:	f8c2 3088 	str.w	r3, [r2, #136]	@ 0x88
  #endif
  /* Reset the RCC clock configuration to the default reset state ------------*/

   /* Increasing the CPU frequency */
  if(FLASH_LATENCY_DEFAULT  > (READ_BIT((FLASH->ACR), FLASH_ACR_LATENCY)))
 8003e68:	4b34      	ldr	r3, [pc, #208]	@ (8003f3c <SystemInit+0xe8>)
 8003e6a:	681b      	ldr	r3, [r3, #0]
 8003e6c:	f003 030f 	and.w	r3, r3, #15
 8003e70:	2b06      	cmp	r3, #6
 8003e72:	d807      	bhi.n	8003e84 <SystemInit+0x30>
  {
    /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
    MODIFY_REG(FLASH->ACR, FLASH_ACR_LATENCY, (uint32_t)(FLASH_LATENCY_DEFAULT));
 8003e74:	4b31      	ldr	r3, [pc, #196]	@ (8003f3c <SystemInit+0xe8>)
 8003e76:	681b      	ldr	r3, [r3, #0]
 8003e78:	f023 030f 	bic.w	r3, r3, #15
 8003e7c:	4a2f      	ldr	r2, [pc, #188]	@ (8003f3c <SystemInit+0xe8>)
 8003e7e:	f043 0307 	orr.w	r3, r3, #7
 8003e82:	6013      	str	r3, [r2, #0]
  }

  /* Set HSION bit */
  RCC->CR |= RCC_CR_HSION;
 8003e84:	4b2e      	ldr	r3, [pc, #184]	@ (8003f40 <SystemInit+0xec>)
 8003e86:	681b      	ldr	r3, [r3, #0]
 8003e88:	4a2d      	ldr	r2, [pc, #180]	@ (8003f40 <SystemInit+0xec>)
 8003e8a:	f043 0301 	orr.w	r3, r3, #1
 8003e8e:	6013      	str	r3, [r2, #0]

  /* Reset CFGR register */
  RCC->CFGR = 0x00000000;
 8003e90:	4b2b      	ldr	r3, [pc, #172]	@ (8003f40 <SystemInit+0xec>)
 8003e92:	2200      	movs	r2, #0
 8003e94:	611a      	str	r2, [r3, #16]

  /* Reset HSEON, HSECSSON, CSION, HSI48ON, CSIKERON, PLL1ON, PLL2ON and PLL3ON bits */
  RCC->CR &= 0xEAF6ED7FU;
 8003e96:	4b2a      	ldr	r3, [pc, #168]	@ (8003f40 <SystemInit+0xec>)
 8003e98:	681a      	ldr	r2, [r3, #0]
 8003e9a:	4929      	ldr	r1, [pc, #164]	@ (8003f40 <SystemInit+0xec>)
 8003e9c:	4b29      	ldr	r3, [pc, #164]	@ (8003f44 <SystemInit+0xf0>)
 8003e9e:	4013      	ands	r3, r2
 8003ea0:	600b      	str	r3, [r1, #0]

   /* Decreasing the number of wait states because of lower CPU frequency */
  if(FLASH_LATENCY_DEFAULT  < (READ_BIT((FLASH->ACR), FLASH_ACR_LATENCY)))
 8003ea2:	4b26      	ldr	r3, [pc, #152]	@ (8003f3c <SystemInit+0xe8>)
 8003ea4:	681b      	ldr	r3, [r3, #0]
 8003ea6:	f003 0308 	and.w	r3, r3, #8
 8003eaa:	2b00      	cmp	r3, #0
 8003eac:	d007      	beq.n	8003ebe <SystemInit+0x6a>
  {
    /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
    MODIFY_REG(FLASH->ACR, FLASH_ACR_LATENCY, (uint32_t)(FLASH_LATENCY_DEFAULT));
 8003eae:	4b23      	ldr	r3, [pc, #140]	@ (8003f3c <SystemInit+0xe8>)
 8003eb0:	681b      	ldr	r3, [r3, #0]
 8003eb2:	f023 030f 	bic.w	r3, r3, #15
 8003eb6:	4a21      	ldr	r2, [pc, #132]	@ (8003f3c <SystemInit+0xe8>)
 8003eb8:	f043 0307 	orr.w	r3, r3, #7
 8003ebc:	6013      	str	r3, [r2, #0]
  }

#if defined(D3_SRAM_BASE)
  /* Reset D1CFGR register */
  RCC->D1CFGR = 0x00000000;
 8003ebe:	4b20      	ldr	r3, [pc, #128]	@ (8003f40 <SystemInit+0xec>)
 8003ec0:	2200      	movs	r2, #0
 8003ec2:	619a      	str	r2, [r3, #24]

  /* Reset D2CFGR register */
  RCC->D2CFGR = 0x00000000;
 8003ec4:	4b1e      	ldr	r3, [pc, #120]	@ (8003f40 <SystemInit+0xec>)
 8003ec6:	2200      	movs	r2, #0
 8003ec8:	61da      	str	r2, [r3, #28]

  /* Reset D3CFGR register */
  RCC->D3CFGR = 0x00000000;
 8003eca:	4b1d      	ldr	r3, [pc, #116]	@ (8003f40 <SystemInit+0xec>)
 8003ecc:	2200      	movs	r2, #0
 8003ece:	621a      	str	r2, [r3, #32]

  /* Reset SRDCFGR register */
  RCC->SRDCFGR = 0x00000000;
#endif
  /* Reset PLLCKSELR register */
  RCC->PLLCKSELR = 0x02020200;
 8003ed0:	4b1b      	ldr	r3, [pc, #108]	@ (8003f40 <SystemInit+0xec>)
 8003ed2:	4a1d      	ldr	r2, [pc, #116]	@ (8003f48 <SystemInit+0xf4>)
 8003ed4:	629a      	str	r2, [r3, #40]	@ 0x28

  /* Reset PLLCFGR register */
  RCC->PLLCFGR = 0x01FF0000;
 8003ed6:	4b1a      	ldr	r3, [pc, #104]	@ (8003f40 <SystemInit+0xec>)
 8003ed8:	4a1c      	ldr	r2, [pc, #112]	@ (8003f4c <SystemInit+0xf8>)
 8003eda:	62da      	str	r2, [r3, #44]	@ 0x2c
  /* Reset PLL1DIVR register */
  RCC->PLL1DIVR = 0x01010280;
 8003edc:	4b18      	ldr	r3, [pc, #96]	@ (8003f40 <SystemInit+0xec>)
 8003ede:	4a1c      	ldr	r2, [pc, #112]	@ (8003f50 <SystemInit+0xfc>)
 8003ee0:	631a      	str	r2, [r3, #48]	@ 0x30
  /* Reset PLL1FRACR register */
  RCC->PLL1FRACR = 0x00000000;
 8003ee2:	4b17      	ldr	r3, [pc, #92]	@ (8003f40 <SystemInit+0xec>)
 8003ee4:	2200      	movs	r2, #0
 8003ee6:	635a      	str	r2, [r3, #52]	@ 0x34

  /* Reset PLL2DIVR register */
  RCC->PLL2DIVR = 0x01010280;
 8003ee8:	4b15      	ldr	r3, [pc, #84]	@ (8003f40 <SystemInit+0xec>)
 8003eea:	4a19      	ldr	r2, [pc, #100]	@ (8003f50 <SystemInit+0xfc>)
 8003eec:	639a      	str	r2, [r3, #56]	@ 0x38

  /* Reset PLL2FRACR register */

  RCC->PLL2FRACR = 0x00000000;
 8003eee:	4b14      	ldr	r3, [pc, #80]	@ (8003f40 <SystemInit+0xec>)
 8003ef0:	2200      	movs	r2, #0
 8003ef2:	63da      	str	r2, [r3, #60]	@ 0x3c
  /* Reset PLL3DIVR register */
  RCC->PLL3DIVR = 0x01010280;
 8003ef4:	4b12      	ldr	r3, [pc, #72]	@ (8003f40 <SystemInit+0xec>)
 8003ef6:	4a16      	ldr	r2, [pc, #88]	@ (8003f50 <SystemInit+0xfc>)
 8003ef8:	641a      	str	r2, [r3, #64]	@ 0x40

  /* Reset PLL3FRACR register */
  RCC->PLL3FRACR = 0x00000000;
 8003efa:	4b11      	ldr	r3, [pc, #68]	@ (8003f40 <SystemInit+0xec>)
 8003efc:	2200      	movs	r2, #0
 8003efe:	645a      	str	r2, [r3, #68]	@ 0x44

  /* Reset HSEBYP bit */
  RCC->CR &= 0xFFFBFFFFU;
 8003f00:	4b0f      	ldr	r3, [pc, #60]	@ (8003f40 <SystemInit+0xec>)
 8003f02:	681b      	ldr	r3, [r3, #0]
 8003f04:	4a0e      	ldr	r2, [pc, #56]	@ (8003f40 <SystemInit+0xec>)
 8003f06:	f423 2380 	bic.w	r3, r3, #262144	@ 0x40000
 8003f0a:	6013      	str	r3, [r2, #0]

  /* Disable all interrupts */
  RCC->CIER = 0x00000000;
 8003f0c:	4b0c      	ldr	r3, [pc, #48]	@ (8003f40 <SystemInit+0xec>)
 8003f0e:	2200      	movs	r2, #0
 8003f10:	661a      	str	r2, [r3, #96]	@ 0x60

#if (STM32H7_DEV_ID == 0x450UL)
  /* dual core CM7 or single core line */
  if((DBGMCU->IDCODE & 0xFFFF0000U) < 0x20000000U)
 8003f12:	4b10      	ldr	r3, [pc, #64]	@ (8003f54 <SystemInit+0x100>)
 8003f14:	681a      	ldr	r2, [r3, #0]
 8003f16:	4b10      	ldr	r3, [pc, #64]	@ (8003f58 <SystemInit+0x104>)
 8003f18:	4013      	ands	r3, r2
 8003f1a:	f1b3 5f00 	cmp.w	r3, #536870912	@ 0x20000000
 8003f1e:	d202      	bcs.n	8003f26 <SystemInit+0xd2>
  {
    /* if stm32h7 revY*/
    /* Change  the switch matrix read issuing capability to 1 for the AXI SRAM target (Target 7) */
    *((__IO uint32_t*)0x51008108) = 0x000000001U;
 8003f20:	4b0e      	ldr	r3, [pc, #56]	@ (8003f5c <SystemInit+0x108>)
 8003f22:	2201      	movs	r2, #1
 8003f24:	601a      	str	r2, [r3, #0]
  /*
   * Disable the FMC bank1 (enabled after reset).
   * This, prevents CPU speculation access on this bank which blocks the use of FMC during
   * 24us. During this time the others FMC master (such as LTDC) cannot use it!
   */
  FMC_Bank1_R->BTCR[0] = 0x000030D2;
 8003f26:	4b0e      	ldr	r3, [pc, #56]	@ (8003f60 <SystemInit+0x10c>)
 8003f28:	f243 02d2 	movw	r2, #12498	@ 0x30d2
 8003f2c:	601a      	str	r2, [r3, #0]
#if defined(USER_VECT_TAB_ADDRESS)
  SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal D1 AXI-RAM or in Internal FLASH */
#endif /* USER_VECT_TAB_ADDRESS */

#endif /*DUAL_CORE && CORE_CM4*/
}
 8003f2e:	bf00      	nop
 8003f30:	46bd      	mov	sp, r7
 8003f32:	f85d 7b04 	ldr.w	r7, [sp], #4
 8003f36:	4770      	bx	lr
 8003f38:	e000ed00 	.word	0xe000ed00
 8003f3c:	52002000 	.word	0x52002000
 8003f40:	58024400 	.word	0x58024400
 8003f44:	eaf6ed7f 	.word	0xeaf6ed7f
 8003f48:	02020200 	.word	0x02020200
 8003f4c:	01ff0000 	.word	0x01ff0000
 8003f50:	01010280 	.word	0x01010280
 8003f54:	5c001000 	.word	0x5c001000
 8003f58:	ffff0000 	.word	0xffff0000
 8003f5c:	51008108 	.word	0x51008108
 8003f60:	52004000 	.word	0x52004000

08003f64 <UartTasksInit>:
osMutexId_t resMeasurementsMutex;
osMutexId_t sensorsInfoMutex;

extern RNG_HandleTypeDef hrng;

void UartTasksInit (void) {
 8003f64:	b580      	push	{r7, lr}
 8003f66:	af00      	add	r7, sp, #0
    uart1TaskData.uartRxBuffer    = uart1RxBuffer;
 8003f68:	4b4e      	ldr	r3, [pc, #312]	@ (80040a4 <UartTasksInit+0x140>)
 8003f6a:	4a4f      	ldr	r2, [pc, #316]	@ (80040a8 <UartTasksInit+0x144>)
 8003f6c:	601a      	str	r2, [r3, #0]
    uart1TaskData.uartRxBufferLen = UART1_RX_BUFF_SIZE;
 8003f6e:	4b4d      	ldr	r3, [pc, #308]	@ (80040a4 <UartTasksInit+0x140>)
 8003f70:	f44f 7280 	mov.w	r2, #256	@ 0x100
 8003f74:	809a      	strh	r2, [r3, #4]
    uart1TaskData.uartTxBuffer    = uart1TxBuffer;
 8003f76:	4b4b      	ldr	r3, [pc, #300]	@ (80040a4 <UartTasksInit+0x140>)
 8003f78:	4a4c      	ldr	r2, [pc, #304]	@ (80040ac <UartTasksInit+0x148>)
 8003f7a:	609a      	str	r2, [r3, #8]
    uart1TaskData.uartRxBufferLen = UART1_TX_BUFF_SIZE;
 8003f7c:	4b49      	ldr	r3, [pc, #292]	@ (80040a4 <UartTasksInit+0x140>)
 8003f7e:	f44f 7280 	mov.w	r2, #256	@ 0x100
 8003f82:	809a      	strh	r2, [r3, #4]
    uart1TaskData.frameData       = uart1TaskFrameData;
 8003f84:	4b47      	ldr	r3, [pc, #284]	@ (80040a4 <UartTasksInit+0x140>)
 8003f86:	4a4a      	ldr	r2, [pc, #296]	@ (80040b0 <UartTasksInit+0x14c>)
 8003f88:	611a      	str	r2, [r3, #16]
    uart1TaskData.frameDataLen    = UART1_RX_BUFF_SIZE;
 8003f8a:	4b46      	ldr	r3, [pc, #280]	@ (80040a4 <UartTasksInit+0x140>)
 8003f8c:	f44f 7280 	mov.w	r2, #256	@ 0x100
 8003f90:	829a      	strh	r2, [r3, #20]
    uart1TaskData.huart           = &huart1;
 8003f92:	4b44      	ldr	r3, [pc, #272]	@ (80040a4 <UartTasksInit+0x140>)
 8003f94:	4a47      	ldr	r2, [pc, #284]	@ (80040b4 <UartTasksInit+0x150>)
 8003f96:	631a      	str	r2, [r3, #48]	@ 0x30
    uart1TaskData.uartNumber      = 1;
 8003f98:	4b42      	ldr	r3, [pc, #264]	@ (80040a4 <UartTasksInit+0x140>)
 8003f9a:	2201      	movs	r2, #1
 8003f9c:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34

    uart2TaskData.uartRxBuffer    = uart2RxBuffer;
 8003fa0:	4b45      	ldr	r3, [pc, #276]	@ (80040b8 <UartTasksInit+0x154>)
 8003fa2:	4a46      	ldr	r2, [pc, #280]	@ (80040bc <UartTasksInit+0x158>)
 8003fa4:	601a      	str	r2, [r3, #0]
    uart2TaskData.uartRxBufferLen = UART2_RX_BUFF_SIZE;
 8003fa6:	4b44      	ldr	r3, [pc, #272]	@ (80040b8 <UartTasksInit+0x154>)
 8003fa8:	f44f 7280 	mov.w	r2, #256	@ 0x100
 8003fac:	809a      	strh	r2, [r3, #4]
    uart2TaskData.uartTxBuffer    = uart2TxBuffer;
 8003fae:	4b42      	ldr	r3, [pc, #264]	@ (80040b8 <UartTasksInit+0x154>)
 8003fb0:	4a43      	ldr	r2, [pc, #268]	@ (80040c0 <UartTasksInit+0x15c>)
 8003fb2:	609a      	str	r2, [r3, #8]
    uart2TaskData.uartRxBufferLen = UART2_TX_BUFF_SIZE;
 8003fb4:	4b40      	ldr	r3, [pc, #256]	@ (80040b8 <UartTasksInit+0x154>)
 8003fb6:	f44f 7280 	mov.w	r2, #256	@ 0x100
 8003fba:	809a      	strh	r2, [r3, #4]
    uart2TaskData.frameData       = uart2TaskFrameData;
 8003fbc:	4b3e      	ldr	r3, [pc, #248]	@ (80040b8 <UartTasksInit+0x154>)
 8003fbe:	4a41      	ldr	r2, [pc, #260]	@ (80040c4 <UartTasksInit+0x160>)
 8003fc0:	611a      	str	r2, [r3, #16]
    uart2TaskData.frameDataLen    = UART2_RX_BUFF_SIZE;
 8003fc2:	4b3d      	ldr	r3, [pc, #244]	@ (80040b8 <UartTasksInit+0x154>)
 8003fc4:	f44f 7280 	mov.w	r2, #256	@ 0x100
 8003fc8:	829a      	strh	r2, [r3, #20]
    uart2TaskData.huart           = &huart2;
 8003fca:	4b3b      	ldr	r3, [pc, #236]	@ (80040b8 <UartTasksInit+0x154>)
 8003fcc:	4a3e      	ldr	r2, [pc, #248]	@ (80040c8 <UartTasksInit+0x164>)
 8003fce:	631a      	str	r2, [r3, #48]	@ 0x30
    uart2TaskData.uartNumber      = 2;
 8003fd0:	4b39      	ldr	r3, [pc, #228]	@ (80040b8 <UartTasksInit+0x154>)
 8003fd2:	2202      	movs	r2, #2
 8003fd4:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34

    uart3TaskData.uartRxBuffer    = uart3RxBuffer;
 8003fd8:	4b3c      	ldr	r3, [pc, #240]	@ (80040cc <UartTasksInit+0x168>)
 8003fda:	4a3d      	ldr	r2, [pc, #244]	@ (80040d0 <UartTasksInit+0x16c>)
 8003fdc:	601a      	str	r2, [r3, #0]
    uart3TaskData.uartRxBufferLen = UART3_RX_BUFF_SIZE;
 8003fde:	4b3b      	ldr	r3, [pc, #236]	@ (80040cc <UartTasksInit+0x168>)
 8003fe0:	f44f 7280 	mov.w	r2, #256	@ 0x100
 8003fe4:	809a      	strh	r2, [r3, #4]
    uart3TaskData.uartTxBuffer    = uart3TxBuffer;
 8003fe6:	4b39      	ldr	r3, [pc, #228]	@ (80040cc <UartTasksInit+0x168>)
 8003fe8:	4a3a      	ldr	r2, [pc, #232]	@ (80040d4 <UartTasksInit+0x170>)
 8003fea:	609a      	str	r2, [r3, #8]
    uart3TaskData.uartRxBufferLen = UART3_TX_BUFF_SIZE;
 8003fec:	4b37      	ldr	r3, [pc, #220]	@ (80040cc <UartTasksInit+0x168>)
 8003fee:	f44f 7280 	mov.w	r2, #256	@ 0x100
 8003ff2:	809a      	strh	r2, [r3, #4]
    uart3TaskData.frameData       = uart3TaskFrameData;
 8003ff4:	4b35      	ldr	r3, [pc, #212]	@ (80040cc <UartTasksInit+0x168>)
 8003ff6:	4a38      	ldr	r2, [pc, #224]	@ (80040d8 <UartTasksInit+0x174>)
 8003ff8:	611a      	str	r2, [r3, #16]
    uart3TaskData.frameDataLen    = UART3_RX_BUFF_SIZE;
 8003ffa:	4b34      	ldr	r3, [pc, #208]	@ (80040cc <UartTasksInit+0x168>)
 8003ffc:	f44f 7280 	mov.w	r2, #256	@ 0x100
 8004000:	829a      	strh	r2, [r3, #20]
    uart3TaskData.huart           = &huart3;
 8004002:	4b32      	ldr	r3, [pc, #200]	@ (80040cc <UartTasksInit+0x168>)
 8004004:	4a35      	ldr	r2, [pc, #212]	@ (80040dc <UartTasksInit+0x178>)
 8004006:	631a      	str	r2, [r3, #48]	@ 0x30
    uart3TaskData.uartNumber      = 3;
 8004008:	4b30      	ldr	r3, [pc, #192]	@ (80040cc <UartTasksInit+0x168>)
 800400a:	2203      	movs	r2, #3
 800400c:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34

    uart6TaskData.uartRxBuffer    = uart6RxBuffer;
 8004010:	4b33      	ldr	r3, [pc, #204]	@ (80040e0 <UartTasksInit+0x17c>)
 8004012:	4a34      	ldr	r2, [pc, #208]	@ (80040e4 <UartTasksInit+0x180>)
 8004014:	601a      	str	r2, [r3, #0]
    uart6TaskData.uartRxBufferLen = UART6_RX_BUFF_SIZE;
 8004016:	4b32      	ldr	r3, [pc, #200]	@ (80040e0 <UartTasksInit+0x17c>)
 8004018:	f44f 7280 	mov.w	r2, #256	@ 0x100
 800401c:	809a      	strh	r2, [r3, #4]
    uart6TaskData.uartTxBuffer    = uart6TxBuffer;
 800401e:	4b30      	ldr	r3, [pc, #192]	@ (80040e0 <UartTasksInit+0x17c>)
 8004020:	4a31      	ldr	r2, [pc, #196]	@ (80040e8 <UartTasksInit+0x184>)
 8004022:	609a      	str	r2, [r3, #8]
    uart6TaskData.uartRxBufferLen = UART6_TX_BUFF_SIZE;
 8004024:	4b2e      	ldr	r3, [pc, #184]	@ (80040e0 <UartTasksInit+0x17c>)
 8004026:	f44f 7280 	mov.w	r2, #256	@ 0x100
 800402a:	809a      	strh	r2, [r3, #4]
    uart6TaskData.frameData       = uart6TaskFrameData;
 800402c:	4b2c      	ldr	r3, [pc, #176]	@ (80040e0 <UartTasksInit+0x17c>)
 800402e:	4a2f      	ldr	r2, [pc, #188]	@ (80040ec <UartTasksInit+0x188>)
 8004030:	611a      	str	r2, [r3, #16]
    uart6TaskData.frameDataLen    = UART6_RX_BUFF_SIZE;
 8004032:	4b2b      	ldr	r3, [pc, #172]	@ (80040e0 <UartTasksInit+0x17c>)
 8004034:	f44f 7280 	mov.w	r2, #256	@ 0x100
 8004038:	829a      	strh	r2, [r3, #20]
    uart6TaskData.huart           = &huart6;
 800403a:	4b29      	ldr	r3, [pc, #164]	@ (80040e0 <UartTasksInit+0x17c>)
 800403c:	4a2c      	ldr	r2, [pc, #176]	@ (80040f0 <UartTasksInit+0x18c>)
 800403e:	631a      	str	r2, [r3, #48]	@ 0x30
    uart6TaskData.uartNumber      = 6;
 8004040:	4b27      	ldr	r3, [pc, #156]	@ (80040e0 <UartTasksInit+0x17c>)
 8004042:	2206      	movs	r2, #6
 8004044:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34

    uart8TaskData.uartRxBuffer    = uart8RxBuffer;
 8004048:	4b2a      	ldr	r3, [pc, #168]	@ (80040f4 <UartTasksInit+0x190>)
 800404a:	4a2b      	ldr	r2, [pc, #172]	@ (80040f8 <UartTasksInit+0x194>)
 800404c:	601a      	str	r2, [r3, #0]
    uart8TaskData.uartRxBufferLen = UART8_RX_BUFF_SIZE;
 800404e:	4b29      	ldr	r3, [pc, #164]	@ (80040f4 <UartTasksInit+0x190>)
 8004050:	f44f 7280 	mov.w	r2, #256	@ 0x100
 8004054:	809a      	strh	r2, [r3, #4]
    uart8TaskData.uartTxBuffer    = uart8TxBuffer;
 8004056:	4b27      	ldr	r3, [pc, #156]	@ (80040f4 <UartTasksInit+0x190>)
 8004058:	4a28      	ldr	r2, [pc, #160]	@ (80040fc <UartTasksInit+0x198>)
 800405a:	609a      	str	r2, [r3, #8]
    uart8TaskData.uartRxBufferLen = UART8_TX_BUFF_SIZE;
 800405c:	4b25      	ldr	r3, [pc, #148]	@ (80040f4 <UartTasksInit+0x190>)
 800405e:	f44f 7280 	mov.w	r2, #256	@ 0x100
 8004062:	809a      	strh	r2, [r3, #4]
    uart8TaskData.frameData       = uart8TaskFrameData;
 8004064:	4b23      	ldr	r3, [pc, #140]	@ (80040f4 <UartTasksInit+0x190>)
 8004066:	4a26      	ldr	r2, [pc, #152]	@ (8004100 <UartTasksInit+0x19c>)
 8004068:	611a      	str	r2, [r3, #16]
    uart8TaskData.frameDataLen    = UART8_RX_BUFF_SIZE;
 800406a:	4b22      	ldr	r3, [pc, #136]	@ (80040f4 <UartTasksInit+0x190>)
 800406c:	f44f 7280 	mov.w	r2, #256	@ 0x100
 8004070:	829a      	strh	r2, [r3, #20]
    uart8TaskData.huart           = &huart8;
 8004072:	4b20      	ldr	r3, [pc, #128]	@ (80040f4 <UartTasksInit+0x190>)
 8004074:	4a23      	ldr	r2, [pc, #140]	@ (8004104 <UartTasksInit+0x1a0>)
 8004076:	631a      	str	r2, [r3, #48]	@ 0x30
    uart8TaskData.uartNumber      = 8;
 8004078:	4b1e      	ldr	r3, [pc, #120]	@ (80040f4 <UartTasksInit+0x190>)
 800407a:	2208      	movs	r2, #8
 800407c:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34

    UartTaskCreate (&uart1TaskData);
 8004080:	4808      	ldr	r0, [pc, #32]	@ (80040a4 <UartTasksInit+0x140>)
 8004082:	f000 f841 	bl	8004108 <UartTaskCreate>
    UartTaskCreate (&uart2TaskData);
 8004086:	480c      	ldr	r0, [pc, #48]	@ (80040b8 <UartTasksInit+0x154>)
 8004088:	f000 f83e 	bl	8004108 <UartTaskCreate>
    UartTaskCreate (&uart3TaskData);
 800408c:	480f      	ldr	r0, [pc, #60]	@ (80040cc <UartTasksInit+0x168>)
 800408e:	f000 f83b 	bl	8004108 <UartTaskCreate>
    UartTaskCreate (&uart6TaskData);
 8004092:	4813      	ldr	r0, [pc, #76]	@ (80040e0 <UartTasksInit+0x17c>)
 8004094:	f000 f838 	bl	8004108 <UartTaskCreate>
    UartTaskCreate (&uart8TaskData);
 8004098:	4816      	ldr	r0, [pc, #88]	@ (80040f4 <UartTasksInit+0x190>)
 800409a:	f000 f835 	bl	8004108 <UartTaskCreate>
}
 800409e:	bf00      	nop
 80040a0:	bd80      	pop	{r7, pc}
 80040a2:	bf00      	nop
 80040a4:	24001eec 	.word	0x24001eec
 80040a8:	24000fec 	.word	0x24000fec
 80040ac:	240010ec 	.word	0x240010ec
 80040b0:	240011ec 	.word	0x240011ec
 80040b4:	24000314 	.word	0x24000314
 80040b8:	24001f94 	.word	0x24001f94
 80040bc:	240012ec 	.word	0x240012ec
 80040c0:	240013ec 	.word	0x240013ec
 80040c4:	240014ec 	.word	0x240014ec
 80040c8:	240003a8 	.word	0x240003a8
 80040cc:	24001f24 	.word	0x24001f24
 80040d0:	240015ec 	.word	0x240015ec
 80040d4:	240016ec 	.word	0x240016ec
 80040d8:	240017ec 	.word	0x240017ec
 80040dc:	2400043c 	.word	0x2400043c
 80040e0:	24001f5c 	.word	0x24001f5c
 80040e4:	240018ec 	.word	0x240018ec
 80040e8:	240019ec 	.word	0x240019ec
 80040ec:	24001aec 	.word	0x24001aec
 80040f0:	240004d0 	.word	0x240004d0
 80040f4:	24001fcc 	.word	0x24001fcc
 80040f8:	24001bec 	.word	0x24001bec
 80040fc:	24001cec 	.word	0x24001cec
 8004100:	24001dec 	.word	0x24001dec
 8004104:	24000280 	.word	0x24000280

08004108 <UartTaskCreate>:

void UartTaskCreate (UartTaskData* uartTaskData) {
 8004108:	b580      	push	{r7, lr}
 800410a:	b09a      	sub	sp, #104	@ 0x68
 800410c:	af00      	add	r7, sp, #0
 800410e:	6078      	str	r0, [r7, #4]
    osThreadAttr_t osThreadAttrRxUart = { 0 };
 8004110:	f107 0344 	add.w	r3, r7, #68	@ 0x44
 8004114:	2224      	movs	r2, #36	@ 0x24
 8004116:	2100      	movs	r1, #0
 8004118:	4618      	mov	r0, r3
 800411a:	f026 f9e1 	bl	802a4e0 <memset>
    osThreadAttr_t osThreadAttrTxUart = { 0 };
 800411e:	f107 0320 	add.w	r3, r7, #32
 8004122:	2224      	movs	r2, #36	@ 0x24
 8004124:	2100      	movs	r1, #0
 8004126:	4618      	mov	r0, r3
 8004128:	f026 f9da 	bl	802a4e0 <memset>

    uartTaskData->processRxDataMsgBuffer = xMessageBufferCreate (INPUT_DATA_BUFF_SIZE);
 800412c:	2201      	movs	r2, #1
 800412e:	2100      	movs	r1, #0
 8004130:	f44f 7080 	mov.w	r0, #256	@ 0x100
 8004134:	f00e fd4a 	bl	8012bcc <xStreamBufferGenericCreate>
 8004138:	4602      	mov	r2, r0
 800413a:	687b      	ldr	r3, [r7, #4]
 800413c:	625a      	str	r2, [r3, #36]	@ 0x24
    uartTaskData->processDataCb          = NULL;
 800413e:	687b      	ldr	r3, [r7, #4]
 8004140:	2200      	movs	r2, #0
 8004142:	629a      	str	r2, [r3, #40]	@ 0x28

    //    osThreadAttrRxUart.name       = "os_thread_uart1_rx";
    osThreadAttrRxUart.stack_size = configMINIMAL_STACK_SIZE * 2;
 8004144:	f44f 6380 	mov.w	r3, #1024	@ 0x400
 8004148:	65bb      	str	r3, [r7, #88]	@ 0x58
    osThreadAttrRxUart.priority   = (osPriority_t)osPriorityHigh;
 800414a:	2328      	movs	r3, #40	@ 0x28
 800414c:	65fb      	str	r3, [r7, #92]	@ 0x5c


    uartTaskData->uartRecieveTaskHandle = osThreadNew (UartRxTask, uartTaskData, &osThreadAttrRxUart);
 800414e:	f107 0344 	add.w	r3, r7, #68	@ 0x44
 8004152:	461a      	mov	r2, r3
 8004154:	6879      	ldr	r1, [r7, #4]
 8004156:	4816      	ldr	r0, [pc, #88]	@ (80041b0 <UartTaskCreate+0xa8>)
 8004158:	f00c fe1b 	bl	8010d92 <osThreadNew>
 800415c:	4602      	mov	r2, r0
 800415e:	687b      	ldr	r3, [r7, #4]
 8004160:	619a      	str	r2, [r3, #24]


    osMessageQueueAttr_t uartTxMsgQueueAttr = { 0 };
 8004162:	f107 0308 	add.w	r3, r7, #8
 8004166:	2200      	movs	r2, #0
 8004168:	601a      	str	r2, [r3, #0]
 800416a:	605a      	str	r2, [r3, #4]
 800416c:	609a      	str	r2, [r3, #8]
 800416e:	60da      	str	r2, [r3, #12]
 8004170:	611a      	str	r2, [r3, #16]
 8004172:	615a      	str	r2, [r3, #20]
    //    uartTxMsgQueueAttr.name                 = "uart1TxMsgQueue";
    uartTaskData->sendCmdToSlaveQueue = osMessageQueueNew (16, sizeof (InterProcessData), &uartTxMsgQueueAttr);
 8004174:	f107 0308 	add.w	r3, r7, #8
 8004178:	461a      	mov	r2, r3
 800417a:	210c      	movs	r1, #12
 800417c:	2010      	movs	r0, #16
 800417e:	f00d f9a5 	bl	80114cc <osMessageQueueNew>
 8004182:	4602      	mov	r2, r0
 8004184:	687b      	ldr	r3, [r7, #4]
 8004186:	62da      	str	r2, [r3, #44]	@ 0x2c

    //    osThreadAttrTxUart.name              = "os_thread_uart1_tx";
    osThreadAttrTxUart.stack_size        = configMINIMAL_STACK_SIZE * 4;
 8004188:	f44f 6300 	mov.w	r3, #2048	@ 0x800
 800418c:	637b      	str	r3, [r7, #52]	@ 0x34
    osThreadAttrTxUart.priority          = (osPriority_t)osPriorityNormal;
 800418e:	2318      	movs	r3, #24
 8004190:	63bb      	str	r3, [r7, #56]	@ 0x38
    uartTaskData->uartTransmitTaskHandle = osThreadNew (UartTxTask, uartTaskData, &osThreadAttrTxUart);
 8004192:	f107 0320 	add.w	r3, r7, #32
 8004196:	461a      	mov	r2, r3
 8004198:	6879      	ldr	r1, [r7, #4]
 800419a:	4806      	ldr	r0, [pc, #24]	@ (80041b4 <UartTaskCreate+0xac>)
 800419c:	f00c fdf9 	bl	8010d92 <osThreadNew>
 80041a0:	4602      	mov	r2, r0
 80041a2:	687b      	ldr	r3, [r7, #4]
 80041a4:	61da      	str	r2, [r3, #28]
}
 80041a6:	bf00      	nop
 80041a8:	3768      	adds	r7, #104	@ 0x68
 80041aa:	46bd      	mov	sp, r7
 80041ac:	bd80      	pop	{r7, pc}
 80041ae:	bf00      	nop
 80041b0:	0800432d 	.word	0x0800432d
 80041b4:	08004919 	.word	0x08004919

080041b8 <HAL_UART_RxCpltCallback>:

void HAL_UART_RxCpltCallback (UART_HandleTypeDef* huart) {
 80041b8:	b480      	push	{r7}
 80041ba:	b083      	sub	sp, #12
 80041bc:	af00      	add	r7, sp, #0
 80041be:	6078      	str	r0, [r7, #4]
    //	osSemaphoreRelease(uart8RxSemaphore);
}
 80041c0:	bf00      	nop
 80041c2:	370c      	adds	r7, #12
 80041c4:	46bd      	mov	sp, r7
 80041c6:	f85d 7b04 	ldr.w	r7, [sp], #4
 80041ca:	4770      	bx	lr

080041cc <HAL_UARTEx_RxEventCallback>:

void HAL_UARTEx_RxEventCallback (UART_HandleTypeDef* huart, uint16_t Size) {
 80041cc:	b580      	push	{r7, lr}
 80041ce:	b082      	sub	sp, #8
 80041d0:	af00      	add	r7, sp, #0
 80041d2:	6078      	str	r0, [r7, #4]
 80041d4:	460b      	mov	r3, r1
 80041d6:	807b      	strh	r3, [r7, #2]
    if (huart->Instance == USART1) {
 80041d8:	687b      	ldr	r3, [r7, #4]
 80041da:	681b      	ldr	r3, [r3, #0]
 80041dc:	4a1e      	ldr	r2, [pc, #120]	@ (8004258 <HAL_UARTEx_RxEventCallback+0x8c>)
 80041de:	4293      	cmp	r3, r2
 80041e0:	d106      	bne.n	80041f0 <HAL_UARTEx_RxEventCallback+0x24>
        HandleUartRxCallback (&uart1TaskData, huart, Size);
 80041e2:	887b      	ldrh	r3, [r7, #2]
 80041e4:	461a      	mov	r2, r3
 80041e6:	6879      	ldr	r1, [r7, #4]
 80041e8:	481c      	ldr	r0, [pc, #112]	@ (800425c <HAL_UARTEx_RxEventCallback+0x90>)
 80041ea:	f000 f853 	bl	8004294 <HandleUartRxCallback>
    } else if (huart->Instance == USART6) {
        HandleUartRxCallback (&uart6TaskData, huart, Size);
    } else if (huart->Instance == UART8) {
        HandleUartRxCallback (&uart8TaskData, huart, Size);
    }
}
 80041ee:	e02e      	b.n	800424e <HAL_UARTEx_RxEventCallback+0x82>
    } else if (huart->Instance == USART2) {
 80041f0:	687b      	ldr	r3, [r7, #4]
 80041f2:	681b      	ldr	r3, [r3, #0]
 80041f4:	4a1a      	ldr	r2, [pc, #104]	@ (8004260 <HAL_UARTEx_RxEventCallback+0x94>)
 80041f6:	4293      	cmp	r3, r2
 80041f8:	d106      	bne.n	8004208 <HAL_UARTEx_RxEventCallback+0x3c>
        HandleUartRxCallback (&uart2TaskData, huart, Size);
 80041fa:	887b      	ldrh	r3, [r7, #2]
 80041fc:	461a      	mov	r2, r3
 80041fe:	6879      	ldr	r1, [r7, #4]
 8004200:	4818      	ldr	r0, [pc, #96]	@ (8004264 <HAL_UARTEx_RxEventCallback+0x98>)
 8004202:	f000 f847 	bl	8004294 <HandleUartRxCallback>
}
 8004206:	e022      	b.n	800424e <HAL_UARTEx_RxEventCallback+0x82>
    } else if (huart->Instance == USART3) {
 8004208:	687b      	ldr	r3, [r7, #4]
 800420a:	681b      	ldr	r3, [r3, #0]
 800420c:	4a16      	ldr	r2, [pc, #88]	@ (8004268 <HAL_UARTEx_RxEventCallback+0x9c>)
 800420e:	4293      	cmp	r3, r2
 8004210:	d106      	bne.n	8004220 <HAL_UARTEx_RxEventCallback+0x54>
        HandleUartRxCallback (&uart3TaskData, huart, Size);
 8004212:	887b      	ldrh	r3, [r7, #2]
 8004214:	461a      	mov	r2, r3
 8004216:	6879      	ldr	r1, [r7, #4]
 8004218:	4814      	ldr	r0, [pc, #80]	@ (800426c <HAL_UARTEx_RxEventCallback+0xa0>)
 800421a:	f000 f83b 	bl	8004294 <HandleUartRxCallback>
}
 800421e:	e016      	b.n	800424e <HAL_UARTEx_RxEventCallback+0x82>
    } else if (huart->Instance == USART6) {
 8004220:	687b      	ldr	r3, [r7, #4]
 8004222:	681b      	ldr	r3, [r3, #0]
 8004224:	4a12      	ldr	r2, [pc, #72]	@ (8004270 <HAL_UARTEx_RxEventCallback+0xa4>)
 8004226:	4293      	cmp	r3, r2
 8004228:	d106      	bne.n	8004238 <HAL_UARTEx_RxEventCallback+0x6c>
        HandleUartRxCallback (&uart6TaskData, huart, Size);
 800422a:	887b      	ldrh	r3, [r7, #2]
 800422c:	461a      	mov	r2, r3
 800422e:	6879      	ldr	r1, [r7, #4]
 8004230:	4810      	ldr	r0, [pc, #64]	@ (8004274 <HAL_UARTEx_RxEventCallback+0xa8>)
 8004232:	f000 f82f 	bl	8004294 <HandleUartRxCallback>
}
 8004236:	e00a      	b.n	800424e <HAL_UARTEx_RxEventCallback+0x82>
    } else if (huart->Instance == UART8) {
 8004238:	687b      	ldr	r3, [r7, #4]
 800423a:	681b      	ldr	r3, [r3, #0]
 800423c:	4a0e      	ldr	r2, [pc, #56]	@ (8004278 <HAL_UARTEx_RxEventCallback+0xac>)
 800423e:	4293      	cmp	r3, r2
 8004240:	d105      	bne.n	800424e <HAL_UARTEx_RxEventCallback+0x82>
        HandleUartRxCallback (&uart8TaskData, huart, Size);
 8004242:	887b      	ldrh	r3, [r7, #2]
 8004244:	461a      	mov	r2, r3
 8004246:	6879      	ldr	r1, [r7, #4]
 8004248:	480c      	ldr	r0, [pc, #48]	@ (800427c <HAL_UARTEx_RxEventCallback+0xb0>)
 800424a:	f000 f823 	bl	8004294 <HandleUartRxCallback>
}
 800424e:	bf00      	nop
 8004250:	3708      	adds	r7, #8
 8004252:	46bd      	mov	sp, r7
 8004254:	bd80      	pop	{r7, pc}
 8004256:	bf00      	nop
 8004258:	40011000 	.word	0x40011000
 800425c:	24001eec 	.word	0x24001eec
 8004260:	40004400 	.word	0x40004400
 8004264:	24001f94 	.word	0x24001f94
 8004268:	40004800 	.word	0x40004800
 800426c:	24001f24 	.word	0x24001f24
 8004270:	40011400 	.word	0x40011400
 8004274:	24001f5c 	.word	0x24001f5c
 8004278:	40007c00 	.word	0x40007c00
 800427c:	24001fcc 	.word	0x24001fcc

08004280 <HAL_UART_TxCpltCallback>:

void HAL_UART_TxCpltCallback (UART_HandleTypeDef* huart) {
 8004280:	b480      	push	{r7}
 8004282:	b083      	sub	sp, #12
 8004284:	af00      	add	r7, sp, #0
 8004286:	6078      	str	r0, [r7, #4]
    if (huart->Instance == UART8) {
    }
}
 8004288:	bf00      	nop
 800428a:	370c      	adds	r7, #12
 800428c:	46bd      	mov	sp, r7
 800428e:	f85d 7b04 	ldr.w	r7, [sp], #4
 8004292:	4770      	bx	lr

08004294 <HandleUartRxCallback>:

void HandleUartRxCallback (UartTaskData* uartTaskData, UART_HandleTypeDef* huart, uint16_t Size) {
 8004294:	b580      	push	{r7, lr}
 8004296:	b088      	sub	sp, #32
 8004298:	af02      	add	r7, sp, #8
 800429a:	60f8      	str	r0, [r7, #12]
 800429c:	60b9      	str	r1, [r7, #8]
 800429e:	4613      	mov	r3, r2
 80042a0:	80fb      	strh	r3, [r7, #6]
    BaseType_t pxHigherPriorityTaskWoken = pdFALSE;
 80042a2:	2300      	movs	r3, #0
 80042a4:	617b      	str	r3, [r7, #20]
    osMutexAcquire (uartTaskData->rxDataBufferMutex, osWaitForever);
 80042a6:	68fb      	ldr	r3, [r7, #12]
 80042a8:	6a1b      	ldr	r3, [r3, #32]
 80042aa:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 80042ae:	4618      	mov	r0, r3
 80042b0:	f00c ff40 	bl	8011134 <osMutexAcquire>
    memcpy (&(uartTaskData->frameData[uartTaskData->frameBytesCount]), uartTaskData->uartRxBuffer, Size);
 80042b4:	68fb      	ldr	r3, [r7, #12]
 80042b6:	691b      	ldr	r3, [r3, #16]
 80042b8:	68fa      	ldr	r2, [r7, #12]
 80042ba:	8ad2      	ldrh	r2, [r2, #22]
 80042bc:	1898      	adds	r0, r3, r2
 80042be:	68fb      	ldr	r3, [r7, #12]
 80042c0:	681b      	ldr	r3, [r3, #0]
 80042c2:	88fa      	ldrh	r2, [r7, #6]
 80042c4:	4619      	mov	r1, r3
 80042c6:	f026 fa02 	bl	802a6ce <memcpy>
    uartTaskData->frameBytesCount += Size;
 80042ca:	68fb      	ldr	r3, [r7, #12]
 80042cc:	8ada      	ldrh	r2, [r3, #22]
 80042ce:	88fb      	ldrh	r3, [r7, #6]
 80042d0:	4413      	add	r3, r2
 80042d2:	b29a      	uxth	r2, r3
 80042d4:	68fb      	ldr	r3, [r7, #12]
 80042d6:	82da      	strh	r2, [r3, #22]
    osMutexRelease (uartTaskData->rxDataBufferMutex);
 80042d8:	68fb      	ldr	r3, [r7, #12]
 80042da:	6a1b      	ldr	r3, [r3, #32]
 80042dc:	4618      	mov	r0, r3
 80042de:	f00c ff74 	bl	80111ca <osMutexRelease>
    xTaskNotifyFromISR (uartTaskData->uartRecieveTaskHandle, Size, eSetValueWithOverwrite, &pxHigherPriorityTaskWoken);
 80042e2:	68fb      	ldr	r3, [r7, #12]
 80042e4:	6998      	ldr	r0, [r3, #24]
 80042e6:	88f9      	ldrh	r1, [r7, #6]
 80042e8:	f107 0314 	add.w	r3, r7, #20
 80042ec:	9300      	str	r3, [sp, #0]
 80042ee:	2300      	movs	r3, #0
 80042f0:	2203      	movs	r2, #3
 80042f2:	f010 f963 	bl	80145bc <xTaskGenericNotifyFromISR>
    //	HAL_UARTEx_ReceiveToIdle_DMA(huart, uart8RxBuffer, UART8_RX_BUFF_SIZE);
    //	__HAL_DMA_DISABLE_IT(&hdma_uart8_rx, DMA_IT_HT);
    HAL_UARTEx_ReceiveToIdle_IT (uartTaskData->huart, uartTaskData->uartRxBuffer, uartTaskData->uartRxBufferLen);
 80042f6:	68fb      	ldr	r3, [r7, #12]
 80042f8:	6b18      	ldr	r0, [r3, #48]	@ 0x30
 80042fa:	68fb      	ldr	r3, [r7, #12]
 80042fc:	6819      	ldr	r1, [r3, #0]
 80042fe:	68fb      	ldr	r3, [r7, #12]
 8004300:	889b      	ldrh	r3, [r3, #4]
 8004302:	461a      	mov	r2, r3
 8004304:	f00b fd51 	bl	800fdaa <HAL_UARTEx_ReceiveToIdle_IT>
    portEND_SWITCHING_ISR (pxHigherPriorityTaskWoken);
 8004308:	697b      	ldr	r3, [r7, #20]
 800430a:	2b00      	cmp	r3, #0
 800430c:	d007      	beq.n	800431e <HandleUartRxCallback+0x8a>
 800430e:	4b06      	ldr	r3, [pc, #24]	@ (8004328 <HandleUartRxCallback+0x94>)
 8004310:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8004314:	601a      	str	r2, [r3, #0]
 8004316:	f3bf 8f4f 	dsb	sy
 800431a:	f3bf 8f6f 	isb	sy
}
 800431e:	bf00      	nop
 8004320:	3718      	adds	r7, #24
 8004322:	46bd      	mov	sp, r7
 8004324:	bd80      	pop	{r7, pc}
 8004326:	bf00      	nop
 8004328:	e000ed04 	.word	0xe000ed04

0800432c <UartRxTask>:

void UartRxTask (void* argument) {
 800432c:	b580      	push	{r7, lr}
 800432e:	b0d2      	sub	sp, #328	@ 0x148
 8004330:	af02      	add	r7, sp, #8
 8004332:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 8004336:	f5a3 739e 	sub.w	r3, r3, #316	@ 0x13c
 800433a:	6018      	str	r0, [r3, #0]
    UartTaskData* uartTaskData             = (UartTaskData*)argument;
 800433c:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 8004340:	f5a3 739e 	sub.w	r3, r3, #316	@ 0x13c
 8004344:	681b      	ldr	r3, [r3, #0]
 8004346:	f8c7 312c 	str.w	r3, [r7, #300]	@ 0x12c
    SerialProtocolFrameData spFrameData    = { 0 };
 800434a:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 800434e:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 8004352:	4618      	mov	r0, r3
 8004354:	f44f 7386 	mov.w	r3, #268	@ 0x10c
 8004358:	461a      	mov	r2, r3
 800435a:	2100      	movs	r1, #0
 800435c:	f026 f8c0 	bl	802a4e0 <memset>
    uint32_t bytesRec                      = 0;
 8004360:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 8004364:	f5a3 739a 	sub.w	r3, r3, #308	@ 0x134
 8004368:	2200      	movs	r2, #0
 800436a:	601a      	str	r2, [r3, #0]
    uint32_t crc                           = 0;
 800436c:	2300      	movs	r3, #0
 800436e:	f8c7 3128 	str.w	r3, [r7, #296]	@ 0x128
    uint16_t frameCommandRaw               = 0x0000;
 8004372:	2300      	movs	r3, #0
 8004374:	f8a7 3126 	strh.w	r3, [r7, #294]	@ 0x126
    uint16_t frameBytesCount               = 0;
 8004378:	2300      	movs	r3, #0
 800437a:	f8a7 3124 	strh.w	r3, [r7, #292]	@ 0x124
    uint16_t frameCrc                      = 0;
 800437e:	2300      	movs	r3, #0
 8004380:	f8a7 3122 	strh.w	r3, [r7, #290]	@ 0x122
    uint16_t frameTotalLength              = 0;
 8004384:	2300      	movs	r3, #0
 8004386:	f8a7 313e 	strh.w	r3, [r7, #318]	@ 0x13e
    uint16_t dataToSend                    = 0;
 800438a:	2300      	movs	r3, #0
 800438c:	f8a7 313c 	strh.w	r3, [r7, #316]	@ 0x13c
    portBASE_TYPE crcPass                  = pdFAIL;
 8004390:	2300      	movs	r3, #0
 8004392:	f8c7 3138 	str.w	r3, [r7, #312]	@ 0x138
    portBASE_TYPE proceed                  = pdFALSE;
 8004396:	2300      	movs	r3, #0
 8004398:	f8c7 3134 	str.w	r3, [r7, #308]	@ 0x134
    portBASE_TYPE frameTimeout             = pdFAIL;
 800439c:	2300      	movs	r3, #0
 800439e:	f8c7 311c 	str.w	r3, [r7, #284]	@ 0x11c
    enum SerialReceiverStates receverState = srWaitForHeader;
 80043a2:	2300      	movs	r3, #0
 80043a4:	f887 3133 	strb.w	r3, [r7, #307]	@ 0x133

    uartTaskData->rxDataBufferMutex = osMutexNew (NULL);
 80043a8:	2000      	movs	r0, #0
 80043aa:	f00c fe3d 	bl	8011028 <osMutexNew>
 80043ae:	4602      	mov	r2, r0
 80043b0:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 80043b4:	621a      	str	r2, [r3, #32]
    HAL_UARTEx_ReceiveToIdle_IT (uartTaskData->huart, uartTaskData->uartRxBuffer, uartTaskData->uartRxBufferLen);
 80043b6:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 80043ba:	6b18      	ldr	r0, [r3, #48]	@ 0x30
 80043bc:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 80043c0:	6819      	ldr	r1, [r3, #0]
 80043c2:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 80043c6:	889b      	ldrh	r3, [r3, #4]
 80043c8:	461a      	mov	r2, r3
 80043ca:	f00b fcee 	bl	800fdaa <HAL_UARTEx_ReceiveToIdle_IT>
    //	HAL_UARTEx_ReceiveToIdle_DMA(&huart8, uart8RxBuffer, 32);
    while (pdTRUE) {
        //		HAL_UART_Receive_IT(&huart8, uart8RxBuffer, 1);
        //		if(osSemaphoreAcquire(uart8RxSemaphore, pdMS_TO_TICKS(1000)) !=
        // osOK) 		if(xTaskNotifyWait(0, 0, &bytesRec, portMAX_DELAY) == pdTrue)
        frameTimeout = !(xTaskNotifyWait (0, 0, &bytesRec, pdMS_TO_TICKS (FRAME_TIMEOUT_MS)));
 80043ce:	f107 020c 	add.w	r2, r7, #12
 80043d2:	f44f 63fa 	mov.w	r3, #2000	@ 0x7d0
 80043d6:	2100      	movs	r1, #0
 80043d8:	2000      	movs	r0, #0
 80043da:	f00f ffcd 	bl	8014378 <xTaskNotifyWait>
 80043de:	4603      	mov	r3, r0
 80043e0:	2b00      	cmp	r3, #0
 80043e2:	bf0c      	ite	eq
 80043e4:	2301      	moveq	r3, #1
 80043e6:	2300      	movne	r3, #0
 80043e8:	b2db      	uxtb	r3, r3
 80043ea:	f8c7 311c 	str.w	r3, [r7, #284]	@ 0x11c

        osMutexAcquire (uartTaskData->rxDataBufferMutex, osWaitForever);
 80043ee:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 80043f2:	6a1b      	ldr	r3, [r3, #32]
 80043f4:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 80043f8:	4618      	mov	r0, r3
 80043fa:	f00c fe9b 	bl	8011134 <osMutexAcquire>
        frameBytesCount = uartTaskData->frameBytesCount;
 80043fe:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004402:	8adb      	ldrh	r3, [r3, #22]
 8004404:	f8a7 3124 	strh.w	r3, [r7, #292]	@ 0x124
        osMutexRelease (uartTaskData->rxDataBufferMutex);
 8004408:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 800440c:	6a1b      	ldr	r3, [r3, #32]
 800440e:	4618      	mov	r0, r3
 8004410:	f00c fedb 	bl	80111ca <osMutexRelease>
        if ((frameTimeout == pdTRUE) && (frameBytesCount > 0)) {
 8004414:	f8d7 311c 	ldr.w	r3, [r7, #284]	@ 0x11c
 8004418:	2b01      	cmp	r3, #1
 800441a:	d10a      	bne.n	8004432 <UartRxTask+0x106>
 800441c:	f8b7 3124 	ldrh.w	r3, [r7, #292]	@ 0x124
 8004420:	2b00      	cmp	r3, #0
 8004422:	d006      	beq.n	8004432 <UartRxTask+0x106>
            receverState = srFail;
 8004424:	2304      	movs	r3, #4
 8004426:	f887 3133 	strb.w	r3, [r7, #307]	@ 0x133
            proceed      = pdTRUE;
 800442a:	2301      	movs	r3, #1
 800442c:	f8c7 3134 	str.w	r3, [r7, #308]	@ 0x134
 8004430:	e029      	b.n	8004486 <UartRxTask+0x15a>
        } else {
            if (frameTimeout == pdFALSE) {
 8004432:	f8d7 311c 	ldr.w	r3, [r7, #284]	@ 0x11c
 8004436:	2b00      	cmp	r3, #0
 8004438:	d111      	bne.n	800445e <UartRxTask+0x132>
                proceed = pdTRUE;
 800443a:	2301      	movs	r3, #1
 800443c:	f8c7 3134 	str.w	r3, [r7, #308]	@ 0x134
#if UART_TASK_LOGS
                printf ("Uart%d: RX bytes received: %ld\n", uartTaskData->uartNumber, bytesRec);
 8004440:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004444:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 8004448:	4619      	mov	r1, r3
 800444a:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 800444e:	f5a3 739a 	sub.w	r3, r3, #308	@ 0x134
 8004452:	681b      	ldr	r3, [r3, #0]
 8004454:	461a      	mov	r2, r3
 8004456:	48c1      	ldr	r0, [pc, #772]	@ (800475c <UartRxTask+0x430>)
 8004458:	f025 feb0 	bl	802a1bc <iprintf>
 800445c:	e22f      	b.n	80048be <UartRxTask+0x592>
#endif
            } else {
                if (uartTaskData->huart->RxState == HAL_UART_STATE_READY) {
 800445e:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004462:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8004464:	f8d3 308c 	ldr.w	r3, [r3, #140]	@ 0x8c
 8004468:	2b20      	cmp	r3, #32
 800446a:	f040 8228 	bne.w	80048be <UartRxTask+0x592>
                    HAL_UARTEx_ReceiveToIdle_IT (uartTaskData->huart, uartTaskData->uartRxBuffer, uartTaskData->uartRxBufferLen);
 800446e:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004472:	6b18      	ldr	r0, [r3, #48]	@ 0x30
 8004474:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004478:	6819      	ldr	r1, [r3, #0]
 800447a:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 800447e:	889b      	ldrh	r3, [r3, #4]
 8004480:	461a      	mov	r2, r3
 8004482:	f00b fc92 	bl	800fdaa <HAL_UARTEx_ReceiveToIdle_IT>
                }
            }
        }

        while (proceed) {
 8004486:	e21a      	b.n	80048be <UartRxTask+0x592>
            switch (receverState) {
 8004488:	f897 3133 	ldrb.w	r3, [r7, #307]	@ 0x133
 800448c:	2b04      	cmp	r3, #4
 800448e:	f200 81f1 	bhi.w	8004874 <UartRxTask+0x548>
 8004492:	a201      	add	r2, pc, #4	@ (adr r2, 8004498 <UartRxTask+0x16c>)
 8004494:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 8004498:	080044ad 	.word	0x080044ad
 800449c:	0800460f 	.word	0x0800460f
 80044a0:	080045f3 	.word	0x080045f3
 80044a4:	080046af 	.word	0x080046af
 80044a8:	08004769 	.word	0x08004769
            case srWaitForHeader:
                osMutexAcquire (uartTaskData->rxDataBufferMutex, osWaitForever);
 80044ac:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 80044b0:	6a1b      	ldr	r3, [r3, #32]
 80044b2:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 80044b6:	4618      	mov	r0, r3
 80044b8:	f00c fe3c 	bl	8011134 <osMutexAcquire>
                if (uartTaskData->frameData[0] == FRAME_INDICATOR) {
 80044bc:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 80044c0:	691b      	ldr	r3, [r3, #16]
 80044c2:	781b      	ldrb	r3, [r3, #0]
 80044c4:	2baa      	cmp	r3, #170	@ 0xaa
 80044c6:	f040 8082 	bne.w	80045ce <UartRxTask+0x2a2>
                    if (frameBytesCount > FRAME_ID_LENGTH) {
 80044ca:	f8b7 3124 	ldrh.w	r3, [r7, #292]	@ 0x124
 80044ce:	2b02      	cmp	r3, #2
 80044d0:	d914      	bls.n	80044fc <UartRxTask+0x1d0>
                        spFrameData.frameHeader.frameId =
                        CONVERT_BYTES_TO_SHORT_WORD (&(uartTaskData->frameData[FRAME_HEADER_LENGTH - FRAME_RESP_STAT_LENGTH - FRAME_DATALEN_LENGTH - FRAME_ID_LENGTH - FRAME_COMMAND_LENGTH]));
 80044d2:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 80044d6:	691b      	ldr	r3, [r3, #16]
 80044d8:	3302      	adds	r3, #2
 80044da:	781b      	ldrb	r3, [r3, #0]
 80044dc:	021b      	lsls	r3, r3, #8
 80044de:	b21a      	sxth	r2, r3
 80044e0:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 80044e4:	691b      	ldr	r3, [r3, #16]
 80044e6:	3301      	adds	r3, #1
 80044e8:	781b      	ldrb	r3, [r3, #0]
 80044ea:	b21b      	sxth	r3, r3
 80044ec:	4313      	orrs	r3, r2
 80044ee:	b21b      	sxth	r3, r3
 80044f0:	b29a      	uxth	r2, r3
                        spFrameData.frameHeader.frameId =
 80044f2:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 80044f6:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 80044fa:	801a      	strh	r2, [r3, #0]
                    }
                    if (frameBytesCount > FRAME_ID_LENGTH + FRAME_COMMAND_LENGTH) {
 80044fc:	f8b7 3124 	ldrh.w	r3, [r7, #292]	@ 0x124
 8004500:	2b04      	cmp	r3, #4
 8004502:	d923      	bls.n	800454c <UartRxTask+0x220>
                        frameCommandRaw = CONVERT_BYTES_TO_SHORT_WORD (&(uartTaskData->frameData[FRAME_HEADER_LENGTH - FRAME_RESP_STAT_LENGTH - FRAME_DATALEN_LENGTH - FRAME_COMMAND_LENGTH]));
 8004504:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004508:	691b      	ldr	r3, [r3, #16]
 800450a:	3304      	adds	r3, #4
 800450c:	781b      	ldrb	r3, [r3, #0]
 800450e:	021b      	lsls	r3, r3, #8
 8004510:	b21a      	sxth	r2, r3
 8004512:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004516:	691b      	ldr	r3, [r3, #16]
 8004518:	3303      	adds	r3, #3
 800451a:	781b      	ldrb	r3, [r3, #0]
 800451c:	b21b      	sxth	r3, r3
 800451e:	4313      	orrs	r3, r2
 8004520:	b21b      	sxth	r3, r3
 8004522:	f8a7 3126 	strh.w	r3, [r7, #294]	@ 0x126
                        spFrameData.frameHeader.frameCommand    = (SerialProtocolCommands)(frameCommandRaw & 0x7FFF);
 8004526:	f8b7 3126 	ldrh.w	r3, [r7, #294]	@ 0x126
 800452a:	b2da      	uxtb	r2, r3
 800452c:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 8004530:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 8004534:	709a      	strb	r2, [r3, #2]
                        spFrameData.frameHeader.isResponseFrame = (frameCommandRaw & 0x8000) != 0 ? pdTRUE : pdFALSE;
 8004536:	f9b7 3126 	ldrsh.w	r3, [r7, #294]	@ 0x126
 800453a:	13db      	asrs	r3, r3, #15
 800453c:	b21b      	sxth	r3, r3
 800453e:	f003 0201 	and.w	r2, r3, #1
 8004542:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 8004546:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 800454a:	609a      	str	r2, [r3, #8]
                    }
                    if ((frameBytesCount > FRAME_ID_LENGTH + FRAME_COMMAND_LENGTH + FRAME_RESP_STAT_LENGTH) && ((spFrameData.frameHeader.frameCommand & 0x8000) != 0)) {
 800454c:	f8b7 3124 	ldrh.w	r3, [r7, #292]	@ 0x124
 8004550:	2b05      	cmp	r3, #5
 8004552:	d913      	bls.n	800457c <UartRxTask+0x250>
 8004554:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 8004558:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 800455c:	789b      	ldrb	r3, [r3, #2]
 800455e:	f403 4300 	and.w	r3, r3, #32768	@ 0x8000
 8004562:	2b00      	cmp	r3, #0
 8004564:	d00a      	beq.n	800457c <UartRxTask+0x250>
                        spFrameData.frameHeader.respStatus = (SerialProtocolRespStatus)(uartTaskData->frameData[FRAME_ID_LENGTH + FRAME_COMMAND_LENGTH + FRAME_RESP_STAT_LENGTH]);
 8004566:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 800456a:	691b      	ldr	r3, [r3, #16]
 800456c:	3305      	adds	r3, #5
 800456e:	781b      	ldrb	r3, [r3, #0]
 8004570:	b25a      	sxtb	r2, r3
 8004572:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 8004576:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 800457a:	70da      	strb	r2, [r3, #3]
                    }
                    if (frameBytesCount >= FRAME_HEADER_LENGTH) {
 800457c:	f8b7 3124 	ldrh.w	r3, [r7, #292]	@ 0x124
 8004580:	2b07      	cmp	r3, #7
 8004582:	d920      	bls.n	80045c6 <UartRxTask+0x29a>
                        spFrameData.frameHeader.frameDataLength = CONVERT_BYTES_TO_SHORT_WORD (&(uartTaskData->frameData[FRAME_HEADER_LENGTH - FRAME_RESP_STAT_LENGTH - FRAME_DATALEN_LENGTH]));
 8004584:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004588:	691b      	ldr	r3, [r3, #16]
 800458a:	3306      	adds	r3, #6
 800458c:	781b      	ldrb	r3, [r3, #0]
 800458e:	021b      	lsls	r3, r3, #8
 8004590:	b21a      	sxth	r2, r3
 8004592:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004596:	691b      	ldr	r3, [r3, #16]
 8004598:	3305      	adds	r3, #5
 800459a:	781b      	ldrb	r3, [r3, #0]
 800459c:	b21b      	sxth	r3, r3
 800459e:	4313      	orrs	r3, r2
 80045a0:	b21b      	sxth	r3, r3
 80045a2:	b29a      	uxth	r2, r3
 80045a4:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 80045a8:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 80045ac:	809a      	strh	r2, [r3, #4]
                        frameTotalLength                        = FRAME_HEADER_LENGTH + spFrameData.frameHeader.frameDataLength + FRAME_CRC_LENGTH;
 80045ae:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 80045b2:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 80045b6:	889b      	ldrh	r3, [r3, #4]
 80045b8:	330a      	adds	r3, #10
 80045ba:	f8a7 313e 	strh.w	r3, [r7, #318]	@ 0x13e
                        receverState                            = srRecieveData;
 80045be:	2302      	movs	r3, #2
 80045c0:	f887 3133 	strb.w	r3, [r7, #307]	@ 0x133
 80045c4:	e00e      	b.n	80045e4 <UartRxTask+0x2b8>
                    } else {
                        proceed = pdFALSE;
 80045c6:	2300      	movs	r3, #0
 80045c8:	f8c7 3134 	str.w	r3, [r7, #308]	@ 0x134
 80045cc:	e00a      	b.n	80045e4 <UartRxTask+0x2b8>
                    }
                } else {
                    if (frameBytesCount > 0) {
 80045ce:	f8b7 3124 	ldrh.w	r3, [r7, #292]	@ 0x124
 80045d2:	2b00      	cmp	r3, #0
 80045d4:	d003      	beq.n	80045de <UartRxTask+0x2b2>
                        receverState = srFail;
 80045d6:	2304      	movs	r3, #4
 80045d8:	f887 3133 	strb.w	r3, [r7, #307]	@ 0x133
 80045dc:	e002      	b.n	80045e4 <UartRxTask+0x2b8>
                    } else {
                        proceed = pdFALSE;
 80045de:	2300      	movs	r3, #0
 80045e0:	f8c7 3134 	str.w	r3, [r7, #308]	@ 0x134
                    }
                }
                osMutexRelease (uartTaskData->rxDataBufferMutex);
 80045e4:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 80045e8:	6a1b      	ldr	r3, [r3, #32]
 80045ea:	4618      	mov	r0, r3
 80045ec:	f00c fded 	bl	80111ca <osMutexRelease>
                break;
 80045f0:	e165      	b.n	80048be <UartRxTask+0x592>
            case srRecieveData:
                if (frameBytesCount >= frameTotalLength) {
 80045f2:	f8b7 2124 	ldrh.w	r2, [r7, #292]	@ 0x124
 80045f6:	f8b7 313e 	ldrh.w	r3, [r7, #318]	@ 0x13e
 80045fa:	429a      	cmp	r2, r3
 80045fc:	d303      	bcc.n	8004606 <UartRxTask+0x2da>
                    receverState = srCheckCrc;
 80045fe:	2301      	movs	r3, #1
 8004600:	f887 3133 	strb.w	r3, [r7, #307]	@ 0x133
                } else {
                    proceed = pdFALSE;
                }
                break;
 8004604:	e15b      	b.n	80048be <UartRxTask+0x592>
                    proceed = pdFALSE;
 8004606:	2300      	movs	r3, #0
 8004608:	f8c7 3134 	str.w	r3, [r7, #308]	@ 0x134
                break;
 800460c:	e157      	b.n	80048be <UartRxTask+0x592>
            case srCheckCrc:
                osMutexAcquire (uartTaskData->rxDataBufferMutex, osWaitForever);
 800460e:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004612:	6a1b      	ldr	r3, [r3, #32]
 8004614:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 8004618:	4618      	mov	r0, r3
 800461a:	f00c fd8b 	bl	8011134 <osMutexAcquire>
                frameCrc = CONVERT_BYTES_TO_SHORT_WORD (&(uartTaskData->frameData[frameTotalLength - FRAME_CRC_LENGTH]));
 800461e:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004622:	691a      	ldr	r2, [r3, #16]
 8004624:	f8b7 313e 	ldrh.w	r3, [r7, #318]	@ 0x13e
 8004628:	3b01      	subs	r3, #1
 800462a:	4413      	add	r3, r2
 800462c:	781b      	ldrb	r3, [r3, #0]
 800462e:	021b      	lsls	r3, r3, #8
 8004630:	b21a      	sxth	r2, r3
 8004632:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004636:	6919      	ldr	r1, [r3, #16]
 8004638:	f8b7 313e 	ldrh.w	r3, [r7, #318]	@ 0x13e
 800463c:	3b02      	subs	r3, #2
 800463e:	440b      	add	r3, r1
 8004640:	781b      	ldrb	r3, [r3, #0]
 8004642:	b21b      	sxth	r3, r3
 8004644:	4313      	orrs	r3, r2
 8004646:	b21b      	sxth	r3, r3
 8004648:	f8a7 3122 	strh.w	r3, [r7, #290]	@ 0x122
                crc      = HAL_CRC_Calculate (&hcrc, (uint32_t*)(uartTaskData->frameData), frameTotalLength - FRAME_CRC_LENGTH);
 800464c:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004650:	6919      	ldr	r1, [r3, #16]
 8004652:	f8b7 313e 	ldrh.w	r3, [r7, #318]	@ 0x13e
 8004656:	3b02      	subs	r3, #2
 8004658:	461a      	mov	r2, r3
 800465a:	4841      	ldr	r0, [pc, #260]	@ (8004760 <UartRxTask+0x434>)
 800465c:	f000 fffc 	bl	8005658 <HAL_CRC_Calculate>
 8004660:	f8c7 0128 	str.w	r0, [r7, #296]	@ 0x128
                osMutexRelease (uartTaskData->rxDataBufferMutex);
 8004664:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004668:	6a1b      	ldr	r3, [r3, #32]
 800466a:	4618      	mov	r0, r3
 800466c:	f00c fdad 	bl	80111ca <osMutexRelease>
                crcPass = frameCrc == crc;
 8004670:	f8b7 3122 	ldrh.w	r3, [r7, #290]	@ 0x122
 8004674:	f8d7 2128 	ldr.w	r2, [r7, #296]	@ 0x128
 8004678:	429a      	cmp	r2, r3
 800467a:	bf0c      	ite	eq
 800467c:	2301      	moveq	r3, #1
 800467e:	2300      	movne	r3, #0
 8004680:	b2db      	uxtb	r3, r3
 8004682:	f8c7 3138 	str.w	r3, [r7, #312]	@ 0x138
                if (crcPass) {
 8004686:	f8d7 3138 	ldr.w	r3, [r7, #312]	@ 0x138
 800468a:	2b00      	cmp	r3, #0
 800468c:	d00b      	beq.n	80046a6 <UartRxTask+0x37a>
#if UART_TASK_LOGS
                    printf ("Uart%d: Frame CRC PASS\n", uartTaskData->uartNumber);
 800468e:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004692:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 8004696:	4619      	mov	r1, r3
 8004698:	4832      	ldr	r0, [pc, #200]	@ (8004764 <UartRxTask+0x438>)
 800469a:	f025 fd8f 	bl	802a1bc <iprintf>
#endif
                    receverState = srExecuteCmd;
 800469e:	2303      	movs	r3, #3
 80046a0:	f887 3133 	strb.w	r3, [r7, #307]	@ 0x133
                } else {
                    receverState = srFail;
                }
                break;
 80046a4:	e10b      	b.n	80048be <UartRxTask+0x592>
                    receverState = srFail;
 80046a6:	2304      	movs	r3, #4
 80046a8:	f887 3133 	strb.w	r3, [r7, #307]	@ 0x133
                break;
 80046ac:	e107      	b.n	80048be <UartRxTask+0x592>
            case srExecuteCmd:
                if ((uartTaskData->processDataCb != NULL) || (uartTaskData->processRxDataMsgBuffer != NULL)) {
 80046ae:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 80046b2:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 80046b4:	2b00      	cmp	r3, #0
 80046b6:	d104      	bne.n	80046c2 <UartRxTask+0x396>
 80046b8:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 80046bc:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 80046be:	2b00      	cmp	r3, #0
 80046c0:	d01e      	beq.n	8004700 <UartRxTask+0x3d4>
                    osMutexAcquire (uartTaskData->rxDataBufferMutex, osWaitForever);
 80046c2:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 80046c6:	6a1b      	ldr	r3, [r3, #32]
 80046c8:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 80046cc:	4618      	mov	r0, r3
 80046ce:	f00c fd31 	bl	8011134 <osMutexAcquire>
                    memcpy (spFrameData.dataBuffer, &(uartTaskData->frameData[FRAME_HEADER_LENGTH]), spFrameData.frameHeader.frameDataLength);
 80046d2:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 80046d6:	691b      	ldr	r3, [r3, #16]
 80046d8:	f103 0108 	add.w	r1, r3, #8
 80046dc:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 80046e0:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 80046e4:	889b      	ldrh	r3, [r3, #4]
 80046e6:	461a      	mov	r2, r3
 80046e8:	f107 0310 	add.w	r3, r7, #16
 80046ec:	330c      	adds	r3, #12
 80046ee:	4618      	mov	r0, r3
 80046f0:	f025 ffed 	bl	802a6ce <memcpy>
                    osMutexRelease (uartTaskData->rxDataBufferMutex);
 80046f4:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 80046f8:	6a1b      	ldr	r3, [r3, #32]
 80046fa:	4618      	mov	r0, r3
 80046fc:	f00c fd65 	bl	80111ca <osMutexRelease>
                }
                if (uartTaskData->processRxDataMsgBuffer != NULL) {
 8004700:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004704:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8004706:	2b00      	cmp	r3, #0
 8004708:	d015      	beq.n	8004736 <UartRxTask+0x40a>
                    if(xMessageBufferSend (uartTaskData->processRxDataMsgBuffer, &spFrameData, sizeof (SerialProtocolFrameHeader) + spFrameData.frameHeader.frameDataLength, pdMS_TO_TICKS (200)) == pdFALSE)
 800470a:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 800470e:	6a58      	ldr	r0, [r3, #36]	@ 0x24
 8004710:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 8004714:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 8004718:	889b      	ldrh	r3, [r3, #4]
 800471a:	f103 020c 	add.w	r2, r3, #12
 800471e:	f107 0110 	add.w	r1, r7, #16
 8004722:	23c8      	movs	r3, #200	@ 0xc8
 8004724:	f00e fae4 	bl	8012cf0 <xStreamBufferSend>
 8004728:	4603      	mov	r3, r0
 800472a:	2b00      	cmp	r3, #0
 800472c:	d103      	bne.n	8004736 <UartRxTask+0x40a>
                    {
                    	receverState = srFail;
 800472e:	2304      	movs	r3, #4
 8004730:	f887 3133 	strb.w	r3, [r7, #307]	@ 0x133
                    	break;
 8004734:	e0c3      	b.n	80048be <UartRxTask+0x592>
                    }
                }
                if (uartTaskData->processDataCb != NULL) {
 8004736:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 800473a:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800473c:	2b00      	cmp	r3, #0
 800473e:	d008      	beq.n	8004752 <UartRxTask+0x426>
                    uartTaskData->processDataCb (uartTaskData, &spFrameData);
 8004740:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004744:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 8004746:	f107 0210 	add.w	r2, r7, #16
 800474a:	4611      	mov	r1, r2
 800474c:	f8d7 012c 	ldr.w	r0, [r7, #300]	@ 0x12c
 8004750:	4798      	blx	r3
                }
                receverState = srFinish;
 8004752:	2305      	movs	r3, #5
 8004754:	f887 3133 	strb.w	r3, [r7, #307]	@ 0x133
                break;
 8004758:	e0b1      	b.n	80048be <UartRxTask+0x592>
 800475a:	bf00      	nop
 800475c:	0802d178 	.word	0x0802d178
 8004760:	24000248 	.word	0x24000248
 8004764:	0802d198 	.word	0x0802d198
            case srFail:
                dataToSend = 0;
 8004768:	2300      	movs	r3, #0
 800476a:	f8a7 313c 	strh.w	r3, [r7, #316]	@ 0x13c
                if ((frameTimeout == pdTRUE) && (frameBytesCount > 2)) {
 800476e:	f8d7 311c 	ldr.w	r3, [r7, #284]	@ 0x11c
 8004772:	2b01      	cmp	r3, #1
 8004774:	d124      	bne.n	80047c0 <UartRxTask+0x494>
 8004776:	f8b7 3124 	ldrh.w	r3, [r7, #292]	@ 0x124
 800477a:	2b02      	cmp	r3, #2
 800477c:	d920      	bls.n	80047c0 <UartRxTask+0x494>
                    dataToSend = PrepareRespFrame (uartTaskData->uartTxBuffer, spFrameData.frameHeader.frameId, spFrameData.frameHeader.frameCommand, spTimeout, NULL, 0);
 800477e:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004782:	6898      	ldr	r0, [r3, #8]
 8004784:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 8004788:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 800478c:	8819      	ldrh	r1, [r3, #0]
 800478e:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 8004792:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 8004796:	789a      	ldrb	r2, [r3, #2]
 8004798:	2300      	movs	r3, #0
 800479a:	9301      	str	r3, [sp, #4]
 800479c:	2300      	movs	r3, #0
 800479e:	9300      	str	r3, [sp, #0]
 80047a0:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80047a4:	f7fe fdf6 	bl	8003394 <PrepareRespFrame>
 80047a8:	4603      	mov	r3, r0
 80047aa:	f8a7 313c 	strh.w	r3, [r7, #316]	@ 0x13c
#if UART_TASK_LOGS
                    printf ("Uart%d: RX data receiver timeout!\n", uartTaskData->uartNumber);
 80047ae:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 80047b2:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 80047b6:	4619      	mov	r1, r3
 80047b8:	4844      	ldr	r0, [pc, #272]	@ (80048cc <UartRxTask+0x5a0>)
 80047ba:	f025 fcff 	bl	802a1bc <iprintf>
 80047be:	e03c      	b.n	800483a <UartRxTask+0x50e>
#endif
                } else if (!crcPass) {
 80047c0:	f8d7 3138 	ldr.w	r3, [r7, #312]	@ 0x138
 80047c4:	2b00      	cmp	r3, #0
 80047c6:	d120      	bne.n	800480a <UartRxTask+0x4de>
                    dataToSend = PrepareRespFrame (uartTaskData->uartTxBuffer, spFrameData.frameHeader.frameId, spFrameData.frameHeader.frameCommand, spCrcFail, NULL, 0);
 80047c8:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 80047cc:	6898      	ldr	r0, [r3, #8]
 80047ce:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 80047d2:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 80047d6:	8819      	ldrh	r1, [r3, #0]
 80047d8:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 80047dc:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 80047e0:	789a      	ldrb	r2, [r3, #2]
 80047e2:	2300      	movs	r3, #0
 80047e4:	9301      	str	r3, [sp, #4]
 80047e6:	2300      	movs	r3, #0
 80047e8:	9300      	str	r3, [sp, #0]
 80047ea:	f06f 0301 	mvn.w	r3, #1
 80047ee:	f7fe fdd1 	bl	8003394 <PrepareRespFrame>
 80047f2:	4603      	mov	r3, r0
 80047f4:	f8a7 313c 	strh.w	r3, [r7, #316]	@ 0x13c
#if UART_TASK_LOGS
                    printf ("Uart%d: Frame CRC FAIL\n", uartTaskData->uartNumber);
 80047f8:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 80047fc:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 8004800:	4619      	mov	r1, r3
 8004802:	4833      	ldr	r0, [pc, #204]	@ (80048d0 <UartRxTask+0x5a4>)
 8004804:	f025 fcda 	bl	802a1bc <iprintf>
 8004808:	e017      	b.n	800483a <UartRxTask+0x50e>
#endif
                }
                else
                {
                	dataToSend = PrepareRespFrame (uartTaskData->uartTxBuffer, spFrameData.frameHeader.frameId, spFrameData.frameHeader.frameCommand, spInternalError, NULL, 0);
 800480a:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 800480e:	6898      	ldr	r0, [r3, #8]
 8004810:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 8004814:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 8004818:	8819      	ldrh	r1, [r3, #0]
 800481a:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 800481e:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 8004822:	789a      	ldrb	r2, [r3, #2]
 8004824:	2300      	movs	r3, #0
 8004826:	9301      	str	r3, [sp, #4]
 8004828:	2300      	movs	r3, #0
 800482a:	9300      	str	r3, [sp, #0]
 800482c:	f06f 0303 	mvn.w	r3, #3
 8004830:	f7fe fdb0 	bl	8003394 <PrepareRespFrame>
 8004834:	4603      	mov	r3, r0
 8004836:	f8a7 313c 	strh.w	r3, [r7, #316]	@ 0x13c
                }
                if (dataToSend > 0) {
 800483a:	f8b7 313c 	ldrh.w	r3, [r7, #316]	@ 0x13c
 800483e:	2b00      	cmp	r3, #0
 8004840:	d00a      	beq.n	8004858 <UartRxTask+0x52c>
                    HAL_UART_Transmit_IT (uartTaskData->huart, uartTaskData->uartTxBuffer, dataToSend);
 8004842:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004846:	6b18      	ldr	r0, [r3, #48]	@ 0x30
 8004848:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 800484c:	689b      	ldr	r3, [r3, #8]
 800484e:	f8b7 213c 	ldrh.w	r2, [r7, #316]	@ 0x13c
 8004852:	4619      	mov	r1, r3
 8004854:	f008 fdd4 	bl	800d400 <HAL_UART_Transmit_IT>
                }
#if UART_TASK_LOGS
                printf ("Uart%d: TX bytes sent: %d\n", dataToSend, uartTaskData->uartNumber);
 8004858:	f8b7 113c 	ldrh.w	r1, [r7, #316]	@ 0x13c
 800485c:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004860:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 8004864:	461a      	mov	r2, r3
 8004866:	481b      	ldr	r0, [pc, #108]	@ (80048d4 <UartRxTask+0x5a8>)
 8004868:	f025 fca8 	bl	802a1bc <iprintf>
#endif
                receverState = srFinish;
 800486c:	2305      	movs	r3, #5
 800486e:	f887 3133 	strb.w	r3, [r7, #307]	@ 0x133
                break;
 8004872:	e024      	b.n	80048be <UartRxTask+0x592>
            case srFinish:
            default:
                osMutexAcquire (uartTaskData->rxDataBufferMutex, osWaitForever);
 8004874:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004878:	6a1b      	ldr	r3, [r3, #32]
 800487a:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 800487e:	4618      	mov	r0, r3
 8004880:	f00c fc58 	bl	8011134 <osMutexAcquire>
                uartTaskData->frameBytesCount = 0;
 8004884:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004888:	2200      	movs	r2, #0
 800488a:	82da      	strh	r2, [r3, #22]
                osMutexRelease (uartTaskData->rxDataBufferMutex);
 800488c:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004890:	6a1b      	ldr	r3, [r3, #32]
 8004892:	4618      	mov	r0, r3
 8004894:	f00c fc99 	bl	80111ca <osMutexRelease>
                spFrameData.frameHeader.frameCommand = spUnknown;
 8004898:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 800489c:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 80048a0:	2209      	movs	r2, #9
 80048a2:	709a      	strb	r2, [r3, #2]
                frameTotalLength                     = 0;
 80048a4:	2300      	movs	r3, #0
 80048a6:	f8a7 313e 	strh.w	r3, [r7, #318]	@ 0x13e
                outputDataBufferPos                  = 0;
 80048aa:	4b0b      	ldr	r3, [pc, #44]	@ (80048d8 <UartRxTask+0x5ac>)
 80048ac:	2200      	movs	r2, #0
 80048ae:	801a      	strh	r2, [r3, #0]
                receverState                         = srWaitForHeader;
 80048b0:	2300      	movs	r3, #0
 80048b2:	f887 3133 	strb.w	r3, [r7, #307]	@ 0x133
                proceed                              = pdFALSE;
 80048b6:	2300      	movs	r3, #0
 80048b8:	f8c7 3134 	str.w	r3, [r7, #308]	@ 0x134
                break;
 80048bc:	bf00      	nop
        while (proceed) {
 80048be:	f8d7 3134 	ldr.w	r3, [r7, #308]	@ 0x134
 80048c2:	2b00      	cmp	r3, #0
 80048c4:	f47f ade0 	bne.w	8004488 <UartRxTask+0x15c>
        frameTimeout = !(xTaskNotifyWait (0, 0, &bytesRec, pdMS_TO_TICKS (FRAME_TIMEOUT_MS)));
 80048c8:	e581      	b.n	80043ce <UartRxTask+0xa2>
 80048ca:	bf00      	nop
 80048cc:	0802d1b0 	.word	0x0802d1b0
 80048d0:	0802d1d4 	.word	0x0802d1d4
 80048d4:	0802d1ec 	.word	0x0802d1ec
 80048d8:	24002084 	.word	0x24002084

080048dc <ReadMeasSetFromBuffer>:
        }
    }
}

void ReadMeasSetFromBuffer(uint8_t* buff, uint16_t* buffPos, float* dataSet)
{
 80048dc:	b580      	push	{r7, lr}
 80048de:	b086      	sub	sp, #24
 80048e0:	af00      	add	r7, sp, #0
 80048e2:	60f8      	str	r0, [r7, #12]
 80048e4:	60b9      	str	r1, [r7, #8]
 80048e6:	607a      	str	r2, [r7, #4]
	for(uint8_t i = 0; i < 3; i++)
 80048e8:	2300      	movs	r3, #0
 80048ea:	75fb      	strb	r3, [r7, #23]
 80048ec:	e00b      	b.n	8004906 <ReadMeasSetFromBuffer+0x2a>
	{
		ReadFloatFromBuffer(buff, buffPos, &dataSet[i]);
 80048ee:	7dfb      	ldrb	r3, [r7, #23]
 80048f0:	009b      	lsls	r3, r3, #2
 80048f2:	687a      	ldr	r2, [r7, #4]
 80048f4:	4413      	add	r3, r2
 80048f6:	461a      	mov	r2, r3
 80048f8:	68b9      	ldr	r1, [r7, #8]
 80048fa:	68f8      	ldr	r0, [r7, #12]
 80048fc:	f7fe fc5b 	bl	80031b6 <ReadFloatFromBuffer>
	for(uint8_t i = 0; i < 3; i++)
 8004900:	7dfb      	ldrb	r3, [r7, #23]
 8004902:	3301      	adds	r3, #1
 8004904:	75fb      	strb	r3, [r7, #23]
 8004906:	7dfb      	ldrb	r3, [r7, #23]
 8004908:	2b02      	cmp	r3, #2
 800490a:	d9f0      	bls.n	80048ee <ReadMeasSetFromBuffer+0x12>
	}
}
 800490c:	bf00      	nop
 800490e:	bf00      	nop
 8004910:	3718      	adds	r7, #24
 8004912:	46bd      	mov	sp, r7
 8004914:	bd80      	pop	{r7, pc}
	...

08004918 <UartTxTask>:

void UartTxTask (void* argument) {
 8004918:	b580      	push	{r7, lr}
 800491a:	b0d4      	sub	sp, #336	@ 0x150
 800491c:	af02      	add	r7, sp, #8
 800491e:	f507 73a4 	add.w	r3, r7, #328	@ 0x148
 8004922:	f5a3 73a2 	sub.w	r3, r3, #324	@ 0x144
 8004926:	6018      	str	r0, [r3, #0]
    UartTaskData* const uartTaskData  = (UartTaskData*)argument;
 8004928:	f507 73a4 	add.w	r3, r7, #328	@ 0x148
 800492c:	f5a3 73a2 	sub.w	r3, r3, #324	@ 0x144
 8004930:	681b      	ldr	r3, [r3, #0]
 8004932:	f8c7 3140 	str.w	r3, [r7, #320]	@ 0x140
    InterProcessData data             = { 0 };
 8004936:	f507 7390 	add.w	r3, r7, #288	@ 0x120
 800493a:	2200      	movs	r2, #0
 800493c:	601a      	str	r2, [r3, #0]
 800493e:	605a      	str	r2, [r3, #4]
 8004940:	609a      	str	r2, [r3, #8]
    SerialProtocolFrameData frameData = { 0 };
 8004942:	f507 73a4 	add.w	r3, r7, #328	@ 0x148
 8004946:	f5a3 739a 	sub.w	r3, r3, #308	@ 0x134
 800494a:	4618      	mov	r0, r3
 800494c:	f44f 7386 	mov.w	r3, #268	@ 0x10c
 8004950:	461a      	mov	r2, r3
 8004952:	2100      	movs	r1, #0
 8004954:	f025 fdc4 	bl	802a4e0 <memset>
    size_t bytesInMsg;
    uint16_t frameId                    = 0;
 8004958:	2300      	movs	r3, #0
 800495a:	f8a7 313e 	strh.w	r3, [r7, #318]	@ 0x13e
    uint32_t rndVal                     = 0;
 800495e:	f507 73a4 	add.w	r3, r7, #328	@ 0x148
 8004962:	f5a3 739c 	sub.w	r3, r3, #312	@ 0x138
 8004966:	2200      	movs	r2, #0
 8004968:	601a      	str	r2, [r3, #0]
    uint16_t bytesToSend                = 0;
 800496a:	2300      	movs	r3, #0
 800496c:	f8a7 313c 	strh.w	r3, [r7, #316]	@ 0x13c
    SerialProtocolCommands frameCommand = spUnknown;
 8004970:	2309      	movs	r3, #9
 8004972:	f887 313b 	strb.w	r3, [r7, #315]	@ 0x13b
    uint16_t inputDataBufferPos = 0;
 8004976:	f507 73a4 	add.w	r3, r7, #328	@ 0x148
 800497a:	f5a3 739d 	sub.w	r3, r3, #314	@ 0x13a
 800497e:	2200      	movs	r2, #0
 8004980:	801a      	strh	r2, [r3, #0]
    uint8_t boardNumber = 0;
 8004982:	2300      	movs	r3, #0
 8004984:	f887 3147 	strb.w	r3, [r7, #327]	@ 0x147

    while (pdTRUE) {
        if (uartTaskData->sendCmdToSlaveQueue != NULL) {
 8004988:	f8d7 3140 	ldr.w	r3, [r7, #320]	@ 0x140
 800498c:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800498e:	2b00      	cmp	r3, #0
 8004990:	f000 8249 	beq.w	8004e26 <UartTxTask+0x50e>
            osMessageQueueGet (uartTaskData->sendCmdToSlaveQueue, &data, 0, osWaitForever);
 8004994:	f8d7 3140 	ldr.w	r3, [r7, #320]	@ 0x140
 8004998:	6ad8      	ldr	r0, [r3, #44]	@ 0x2c
 800499a:	f507 7190 	add.w	r1, r7, #288	@ 0x120
 800499e:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80049a2:	2200      	movs	r2, #0
 80049a4:	f00c fe66 	bl	8011674 <osMessageQueueGet>
            HAL_RNG_GenerateRandomNumber (&hrng, &rndVal);
 80049a8:	f107 0310 	add.w	r3, r7, #16
 80049ac:	4619      	mov	r1, r3
 80049ae:	48a2      	ldr	r0, [pc, #648]	@ (8004c38 <UartTxTask+0x320>)
 80049b0:	f008 f924 	bl	800cbfc <HAL_RNG_GenerateRandomNumber>
            frameId             = (uint16_t)(rndVal & 0xFFFF);
 80049b4:	f507 73a4 	add.w	r3, r7, #328	@ 0x148
 80049b8:	f5a3 739c 	sub.w	r3, r3, #312	@ 0x138
 80049bc:	681b      	ldr	r3, [r3, #0]
 80049be:	f8a7 313e 	strh.w	r3, [r7, #318]	@ 0x13e
            frameCommand        = data.spCommand;
 80049c2:	f897 3120 	ldrb.w	r3, [r7, #288]	@ 0x120
 80049c6:	f887 313b 	strb.w	r3, [r7, #315]	@ 0x13b
            outputDataBufferPos = 0;
 80049ca:	4b9c      	ldr	r3, [pc, #624]	@ (8004c3c <UartTxTask+0x324>)
 80049cc:	2200      	movs	r2, #0
 80049ce:	801a      	strh	r2, [r3, #0]
            memset (outputDataBuffer, 0x00, OUTPUT_DATA_BUFF_SIZE);
 80049d0:	2280      	movs	r2, #128	@ 0x80
 80049d2:	2100      	movs	r1, #0
 80049d4:	489a      	ldr	r0, [pc, #616]	@ (8004c40 <UartTxTask+0x328>)
 80049d6:	f025 fd83 	bl	802a4e0 <memset>
            switch (frameCommand) {
 80049da:	f897 313b 	ldrb.w	r3, [r7, #315]	@ 0x13b
 80049de:	2b08      	cmp	r3, #8
 80049e0:	f200 8226 	bhi.w	8004e30 <UartTxTask+0x518>
 80049e4:	a201      	add	r2, pc, #4	@ (adr r2, 80049ec <UartTxTask+0xd4>)
 80049e6:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 80049ea:	bf00      	nop
 80049ec:	08004a59 	.word	0x08004a59
 80049f0:	08004a59 	.word	0x08004a59
 80049f4:	08004a11 	.word	0x08004a11
 80049f8:	08004a11 	.word	0x08004a11
 80049fc:	08004a11 	.word	0x08004a11
 8004a00:	08004a47 	.word	0x08004a47
 8004a04:	08004a47 	.word	0x08004a47
 8004a08:	08004a35 	.word	0x08004a35
 8004a0c:	08004a59 	.word	0x08004a59
            case spSetFanSpeed:
            case spSetMotorXOn:
            case spSetMotorYOn:
                WriteDataToBuffer (outputDataBuffer, &outputDataBufferPos, &data.values.integerValues.value[0], sizeof (uint32_t));
 8004a10:	f507 7390 	add.w	r3, r7, #288	@ 0x120
 8004a14:	1d1a      	adds	r2, r3, #4
 8004a16:	2304      	movs	r3, #4
 8004a18:	4988      	ldr	r1, [pc, #544]	@ (8004c3c <UartTxTask+0x324>)
 8004a1a:	4889      	ldr	r0, [pc, #548]	@ (8004c40 <UartTxTask+0x328>)
 8004a1c:	f7fe fb9a 	bl	8003154 <WriteDataToBuffer>
                WriteDataToBuffer (outputDataBuffer, &outputDataBufferPos, &data.values.integerValues.value[1], sizeof (uint32_t));
 8004a20:	f507 7390 	add.w	r3, r7, #288	@ 0x120
 8004a24:	f103 0208 	add.w	r2, r3, #8
 8004a28:	2304      	movs	r3, #4
 8004a2a:	4984      	ldr	r1, [pc, #528]	@ (8004c3c <UartTxTask+0x324>)
 8004a2c:	4884      	ldr	r0, [pc, #528]	@ (8004c40 <UartTxTask+0x328>)
 8004a2e:	f7fe fb91 	bl	8003154 <WriteDataToBuffer>
                break;
 8004a32:	e012      	b.n	8004a5a <UartTxTask+0x142>
            case spSetDiodeOn: WriteDataToBuffer (outputDataBuffer, &outputDataBufferPos, &data.values.integerValues.value[0], sizeof (uint32_t)); break;
 8004a34:	f507 7390 	add.w	r3, r7, #288	@ 0x120
 8004a38:	1d1a      	adds	r2, r3, #4
 8004a3a:	2304      	movs	r3, #4
 8004a3c:	497f      	ldr	r1, [pc, #508]	@ (8004c3c <UartTxTask+0x324>)
 8004a3e:	4880      	ldr	r0, [pc, #512]	@ (8004c40 <UartTxTask+0x328>)
 8004a40:	f7fe fb88 	bl	8003154 <WriteDataToBuffer>
 8004a44:	e009      	b.n	8004a5a <UartTxTask+0x142>
            case spSetmotorXMaxCurrent:
            case spSetmotorYMaxCurrent: WriteDataToBuffer (outputDataBuffer, &outputDataBufferPos, &data.values.flaotValues.value[0], sizeof (float)); break;
 8004a46:	f507 7390 	add.w	r3, r7, #288	@ 0x120
 8004a4a:	1d1a      	adds	r2, r3, #4
 8004a4c:	2304      	movs	r3, #4
 8004a4e:	497b      	ldr	r1, [pc, #492]	@ (8004c3c <UartTxTask+0x324>)
 8004a50:	487b      	ldr	r0, [pc, #492]	@ (8004c40 <UartTxTask+0x328>)
 8004a52:	f7fe fb7f 	bl	8003154 <WriteDataToBuffer>
 8004a56:	e000      	b.n	8004a5a <UartTxTask+0x142>
            case spGetElectricalMeasurments:
            case spGetSensorMeasurments: break;
 8004a58:	bf00      	nop
            case spClearPeakMeasurments: break;
            default: continue; break;
            }

            bytesToSend = PrepareReqFrame (uartTaskData->uartTxBuffer, frameId, frameCommand, outputDataBuffer, outputDataBufferPos);
 8004a5a:	f8d7 3140 	ldr.w	r3, [r7, #320]	@ 0x140
 8004a5e:	6898      	ldr	r0, [r3, #8]
 8004a60:	4b76      	ldr	r3, [pc, #472]	@ (8004c3c <UartTxTask+0x324>)
 8004a62:	881b      	ldrh	r3, [r3, #0]
 8004a64:	f897 213b 	ldrb.w	r2, [r7, #315]	@ 0x13b
 8004a68:	f8b7 113e 	ldrh.w	r1, [r7, #318]	@ 0x13e
 8004a6c:	9300      	str	r3, [sp, #0]
 8004a6e:	4b74      	ldr	r3, [pc, #464]	@ (8004c40 <UartTxTask+0x328>)
 8004a70:	f7fe fbfc 	bl	800326c <PrepareReqFrame>
 8004a74:	4603      	mov	r3, r0
 8004a76:	f8a7 313c 	strh.w	r3, [r7, #316]	@ 0x13c
            HAL_UART_Transmit_IT (uartTaskData->huart, uartTaskData->uartTxBuffer, bytesToSend);
 8004a7a:	f8d7 3140 	ldr.w	r3, [r7, #320]	@ 0x140
 8004a7e:	6b18      	ldr	r0, [r3, #48]	@ 0x30
 8004a80:	f8d7 3140 	ldr.w	r3, [r7, #320]	@ 0x140
 8004a84:	689b      	ldr	r3, [r3, #8]
 8004a86:	f8b7 213c 	ldrh.w	r2, [r7, #316]	@ 0x13c
 8004a8a:	4619      	mov	r1, r3
 8004a8c:	f008 fcb8 	bl	800d400 <HAL_UART_Transmit_IT>
            bytesInMsg = xMessageBufferReceive (uartTaskData->processRxDataMsgBuffer, &frameData, INPUT_DATA_BUFF_SIZE, pdMS_TO_TICKS (1000));
 8004a90:	f8d7 3140 	ldr.w	r3, [r7, #320]	@ 0x140
 8004a94:	6a58      	ldr	r0, [r3, #36]	@ 0x24
 8004a96:	f107 0114 	add.w	r1, r7, #20
 8004a9a:	f44f 737a 	mov.w	r3, #1000	@ 0x3e8
 8004a9e:	f44f 7280 	mov.w	r2, #256	@ 0x100
 8004aa2:	f00e fa1b 	bl	8012edc <xStreamBufferReceive>
 8004aa6:	f8c7 0134 	str.w	r0, [r7, #308]	@ 0x134
        	for(boardNumber = 0; boardNumber < SLAVES_COUNT; boardNumber++)
 8004aaa:	2300      	movs	r3, #0
 8004aac:	f887 3147 	strb.w	r3, [r7, #327]	@ 0x147
 8004ab0:	e00e      	b.n	8004ad0 <UartTxTask+0x1b8>
        	{
        		if(boardToUartNumberMap[boardNumber] == uartTaskData->uartNumber)
 8004ab2:	f897 3147 	ldrb.w	r3, [r7, #327]	@ 0x147
 8004ab6:	4a63      	ldr	r2, [pc, #396]	@ (8004c44 <UartTxTask+0x32c>)
 8004ab8:	5cd2      	ldrb	r2, [r2, r3]
 8004aba:	f8d7 3140 	ldr.w	r3, [r7, #320]	@ 0x140
 8004abe:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 8004ac2:	429a      	cmp	r2, r3
 8004ac4:	d009      	beq.n	8004ada <UartTxTask+0x1c2>
        	for(boardNumber = 0; boardNumber < SLAVES_COUNT; boardNumber++)
 8004ac6:	f897 3147 	ldrb.w	r3, [r7, #327]	@ 0x147
 8004aca:	3301      	adds	r3, #1
 8004acc:	f887 3147 	strb.w	r3, [r7, #327]	@ 0x147
 8004ad0:	f897 3147 	ldrb.w	r3, [r7, #327]	@ 0x147
 8004ad4:	2b03      	cmp	r3, #3
 8004ad6:	d9ec      	bls.n	8004ab2 <UartTxTask+0x19a>
 8004ad8:	e000      	b.n	8004adc <UartTxTask+0x1c4>
        		{
        			break;
 8004ada:	bf00      	nop
        		}
        	}
            if (bytesInMsg == 0) {
 8004adc:	f8d7 3134 	ldr.w	r3, [r7, #308]	@ 0x134
 8004ae0:	2b00      	cmp	r3, #0
 8004ae2:	d124      	bne.n	8004b2e <UartTxTask+0x216>
                if (frameCommand == spGetElectricalMeasurments)
 8004ae4:	f897 313b 	ldrb.w	r3, [r7, #315]	@ 0x13b
 8004ae8:	2b00      	cmp	r3, #0
 8004aea:	d114      	bne.n	8004b16 <UartTxTask+0x1fe>
                {
                	osMutexAcquire (resMeasurementsMutex, osWaitForever);
 8004aec:	4b56      	ldr	r3, [pc, #344]	@ (8004c48 <UartTxTask+0x330>)
 8004aee:	681b      	ldr	r3, [r3, #0]
 8004af0:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 8004af4:	4618      	mov	r0, r3
 8004af6:	f00c fb1d 	bl	8011134 <osMutexAcquire>
                	slaveLastSeen[boardNumber]++;
 8004afa:	f897 3147 	ldrb.w	r3, [r7, #327]	@ 0x147
 8004afe:	4a53      	ldr	r2, [pc, #332]	@ (8004c4c <UartTxTask+0x334>)
 8004b00:	f852 2023 	ldr.w	r2, [r2, r3, lsl #2]
 8004b04:	3201      	adds	r2, #1
 8004b06:	4951      	ldr	r1, [pc, #324]	@ (8004c4c <UartTxTask+0x334>)
 8004b08:	f841 2023 	str.w	r2, [r1, r3, lsl #2]
                	osMutexRelease(resMeasurementsMutex);
 8004b0c:	4b4e      	ldr	r3, [pc, #312]	@ (8004c48 <UartTxTask+0x330>)
 8004b0e:	681b      	ldr	r3, [r3, #0]
 8004b10:	4618      	mov	r0, r3
 8004b12:	f00c fb5a 	bl	80111ca <osMutexRelease>
                }
#if UART_TASK_LOGS
                printf ("Uart%d: Response timeout for frameId 0x%x\n", uartTaskData->uartNumber, frameId);
 8004b16:	f8d7 3140 	ldr.w	r3, [r7, #320]	@ 0x140
 8004b1a:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 8004b1e:	4619      	mov	r1, r3
 8004b20:	f8b7 313e 	ldrh.w	r3, [r7, #318]	@ 0x13e
 8004b24:	461a      	mov	r2, r3
 8004b26:	484a      	ldr	r0, [pc, #296]	@ (8004c50 <UartTxTask+0x338>)
 8004b28:	f025 fb48 	bl	802a1bc <iprintf>
 8004b2c:	e72c      	b.n	8004988 <UartTxTask+0x70>
#endif
            } else {
                if ((frameId == frameData.frameHeader.frameId) && (frameData.frameHeader.respStatus == spOK)) {
 8004b2e:	f507 73a4 	add.w	r3, r7, #328	@ 0x148
 8004b32:	f5a3 739a 	sub.w	r3, r3, #308	@ 0x134
 8004b36:	881b      	ldrh	r3, [r3, #0]
 8004b38:	f8b7 213e 	ldrh.w	r2, [r7, #318]	@ 0x13e
 8004b3c:	429a      	cmp	r2, r3
 8004b3e:	f47f af23 	bne.w	8004988 <UartTxTask+0x70>
 8004b42:	f507 73a4 	add.w	r3, r7, #328	@ 0x148
 8004b46:	f5a3 739a 	sub.w	r3, r3, #308	@ 0x134
 8004b4a:	f993 3003 	ldrsb.w	r3, [r3, #3]
 8004b4e:	2b00      	cmp	r3, #0
 8004b50:	f47f af1a 	bne.w	8004988 <UartTxTask+0x70>
#if UART_TASK_LOGS
                    printf ("Uart%d: Response for frameId 0x%x OK\n", uartTaskData->uartNumber, frameId);
 8004b54:	f8d7 3140 	ldr.w	r3, [r7, #320]	@ 0x140
 8004b58:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 8004b5c:	4619      	mov	r1, r3
 8004b5e:	f8b7 313e 	ldrh.w	r3, [r7, #318]	@ 0x13e
 8004b62:	461a      	mov	r2, r3
 8004b64:	483b      	ldr	r0, [pc, #236]	@ (8004c54 <UartTxTask+0x33c>)
 8004b66:	f025 fb29 	bl	802a1bc <iprintf>
#endif
                    slaveLastSeen[boardNumber] = 0;
 8004b6a:	f897 3147 	ldrb.w	r3, [r7, #327]	@ 0x147
 8004b6e:	4a37      	ldr	r2, [pc, #220]	@ (8004c4c <UartTxTask+0x334>)
 8004b70:	2100      	movs	r1, #0
 8004b72:	f842 1023 	str.w	r1, [r2, r3, lsl #2]
                    switch(frameData.frameHeader.frameCommand)
 8004b76:	f507 73a4 	add.w	r3, r7, #328	@ 0x148
 8004b7a:	f5a3 739a 	sub.w	r3, r3, #308	@ 0x134
 8004b7e:	789b      	ldrb	r3, [r3, #2]
 8004b80:	2b00      	cmp	r3, #0
 8004b82:	d002      	beq.n	8004b8a <UartTxTask+0x272>
 8004b84:	2b01      	cmp	r3, #1
 8004b86:	d069      	beq.n	8004c5c <UartTxTask+0x344>
                    	ReadByteFromBufer(frameData.dataBuffer, &inputDataBufferPos, &sensors->limitYSwitchCenter);
                    	ReadByteFromBufer(frameData.dataBuffer, &inputDataBufferPos, &sensors->powerSupplyFailMask);
                    	osMutexRelease(sensorsInfoMutex);
                    	break;
                    default:
                    	break;
 8004b88:	e153      	b.n	8004e32 <UartTxTask+0x51a>
                    	osMutexAcquire (resMeasurementsMutex, osWaitForever);
 8004b8a:	4b2f      	ldr	r3, [pc, #188]	@ (8004c48 <UartTxTask+0x330>)
 8004b8c:	681b      	ldr	r3, [r3, #0]
 8004b8e:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 8004b92:	4618      	mov	r0, r3
 8004b94:	f00c face 	bl	8011134 <osMutexAcquire>
            			RESMeasurements *resMeas = &resMeasurements[boardNumber];
 8004b98:	f897 2147 	ldrb.w	r2, [r7, #327]	@ 0x147
 8004b9c:	4613      	mov	r3, r2
 8004b9e:	011b      	lsls	r3, r3, #4
 8004ba0:	1a9b      	subs	r3, r3, r2
 8004ba2:	009b      	lsls	r3, r3, #2
 8004ba4:	4a2c      	ldr	r2, [pc, #176]	@ (8004c58 <UartTxTask+0x340>)
 8004ba6:	4413      	add	r3, r2
 8004ba8:	f8c7 312c 	str.w	r3, [r7, #300]	@ 0x12c
                    	inputDataBufferPos = 0;
 8004bac:	f507 73a4 	add.w	r3, r7, #328	@ 0x148
 8004bb0:	f5a3 739d 	sub.w	r3, r3, #314	@ 0x13a
 8004bb4:	2200      	movs	r2, #0
 8004bb6:	801a      	strh	r2, [r3, #0]
                    	ReadMeasSetFromBuffer(frameData.dataBuffer, &inputDataBufferPos, resMeas->voltageRMS);
 8004bb8:	f8d7 212c 	ldr.w	r2, [r7, #300]	@ 0x12c
 8004bbc:	f107 010e 	add.w	r1, r7, #14
 8004bc0:	f107 0314 	add.w	r3, r7, #20
 8004bc4:	330c      	adds	r3, #12
 8004bc6:	4618      	mov	r0, r3
 8004bc8:	f7ff fe88 	bl	80048dc <ReadMeasSetFromBuffer>
                    	ReadMeasSetFromBuffer(frameData.dataBuffer, &inputDataBufferPos, resMeas->voltagePeak);
 8004bcc:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004bd0:	f103 020c 	add.w	r2, r3, #12
 8004bd4:	f107 010e 	add.w	r1, r7, #14
 8004bd8:	f107 0314 	add.w	r3, r7, #20
 8004bdc:	330c      	adds	r3, #12
 8004bde:	4618      	mov	r0, r3
 8004be0:	f7ff fe7c 	bl	80048dc <ReadMeasSetFromBuffer>
                    	ReadMeasSetFromBuffer(frameData.dataBuffer, &inputDataBufferPos, resMeas->currentRMS);
 8004be4:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004be8:	f103 0218 	add.w	r2, r3, #24
 8004bec:	f107 010e 	add.w	r1, r7, #14
 8004bf0:	f107 0314 	add.w	r3, r7, #20
 8004bf4:	330c      	adds	r3, #12
 8004bf6:	4618      	mov	r0, r3
 8004bf8:	f7ff fe70 	bl	80048dc <ReadMeasSetFromBuffer>
                    	ReadMeasSetFromBuffer(frameData.dataBuffer, &inputDataBufferPos, resMeas->currentPeak);
 8004bfc:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004c00:	f103 0224 	add.w	r2, r3, #36	@ 0x24
 8004c04:	f107 010e 	add.w	r1, r7, #14
 8004c08:	f107 0314 	add.w	r3, r7, #20
 8004c0c:	330c      	adds	r3, #12
 8004c0e:	4618      	mov	r0, r3
 8004c10:	f7ff fe64 	bl	80048dc <ReadMeasSetFromBuffer>
                    	ReadMeasSetFromBuffer(frameData.dataBuffer, &inputDataBufferPos, resMeas->power);
 8004c14:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004c18:	f103 0230 	add.w	r2, r3, #48	@ 0x30
 8004c1c:	f107 010e 	add.w	r1, r7, #14
 8004c20:	f107 0314 	add.w	r3, r7, #20
 8004c24:	330c      	adds	r3, #12
 8004c26:	4618      	mov	r0, r3
 8004c28:	f7ff fe58 	bl	80048dc <ReadMeasSetFromBuffer>
                    	osMutexRelease(resMeasurementsMutex);
 8004c2c:	4b06      	ldr	r3, [pc, #24]	@ (8004c48 <UartTxTask+0x330>)
 8004c2e:	681b      	ldr	r3, [r3, #0]
 8004c30:	4618      	mov	r0, r3
 8004c32:	f00c faca 	bl	80111ca <osMutexRelease>
                    	break;
 8004c36:	e0fc      	b.n	8004e32 <UartTxTask+0x51a>
 8004c38:	2400026c 	.word	0x2400026c
 8004c3c:	24002084 	.word	0x24002084
 8004c40:	24002004 	.word	0x24002004
 8004c44:	24000014 	.word	0x24000014
 8004c48:	24002238 	.word	0x24002238
 8004c4c:	24002228 	.word	0x24002228
 8004c50:	0802d208 	.word	0x0802d208
 8004c54:	0802d234 	.word	0x0802d234
 8004c58:	24002088 	.word	0x24002088
                    	osMutexAcquire (sensorsInfoMutex, osWaitForever);
 8004c5c:	4b75      	ldr	r3, [pc, #468]	@ (8004e34 <UartTxTask+0x51c>)
 8004c5e:	681b      	ldr	r3, [r3, #0]
 8004c60:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 8004c64:	4618      	mov	r0, r3
 8004c66:	f00c fa65 	bl	8011134 <osMutexAcquire>
                    	inputDataBufferPos = 0;
 8004c6a:	f507 73a4 	add.w	r3, r7, #328	@ 0x148
 8004c6e:	f5a3 739d 	sub.w	r3, r3, #314	@ 0x13a
 8004c72:	2200      	movs	r2, #0
 8004c74:	801a      	strh	r2, [r3, #0]
                    	SesnorsInfo* sensors = &sensorsInfo[boardNumber];
 8004c76:	f897 3147 	ldrb.w	r3, [r7, #327]	@ 0x147
 8004c7a:	222c      	movs	r2, #44	@ 0x2c
 8004c7c:	fb02 f303 	mul.w	r3, r2, r3
 8004c80:	4a6d      	ldr	r2, [pc, #436]	@ (8004e38 <UartTxTask+0x520>)
 8004c82:	4413      	add	r3, r2
 8004c84:	f8c7 3130 	str.w	r3, [r7, #304]	@ 0x130
                    	ReadFloatFromBuffer(frameData.dataBuffer, &inputDataBufferPos, &sensors->pvTemperature[0]);
 8004c88:	f8d7 2130 	ldr.w	r2, [r7, #304]	@ 0x130
 8004c8c:	f107 010e 	add.w	r1, r7, #14
 8004c90:	f107 0314 	add.w	r3, r7, #20
 8004c94:	330c      	adds	r3, #12
 8004c96:	4618      	mov	r0, r3
 8004c98:	f7fe fa8d 	bl	80031b6 <ReadFloatFromBuffer>
                    	ReadFloatFromBuffer(frameData.dataBuffer, &inputDataBufferPos, &sensors->pvTemperature[1]);
 8004c9c:	f8d7 3130 	ldr.w	r3, [r7, #304]	@ 0x130
 8004ca0:	1d1a      	adds	r2, r3, #4
 8004ca2:	f107 010e 	add.w	r1, r7, #14
 8004ca6:	f107 0314 	add.w	r3, r7, #20
 8004caa:	330c      	adds	r3, #12
 8004cac:	4618      	mov	r0, r3
 8004cae:	f7fe fa82 	bl	80031b6 <ReadFloatFromBuffer>
                    	ReadFloatFromBuffer(frameData.dataBuffer, &inputDataBufferPos, &sensors->fanVoltage);
 8004cb2:	f8d7 3130 	ldr.w	r3, [r7, #304]	@ 0x130
 8004cb6:	f103 0208 	add.w	r2, r3, #8
 8004cba:	f107 010e 	add.w	r1, r7, #14
 8004cbe:	f107 0314 	add.w	r3, r7, #20
 8004cc2:	330c      	adds	r3, #12
 8004cc4:	4618      	mov	r0, r3
 8004cc6:	f7fe fa76 	bl	80031b6 <ReadFloatFromBuffer>
                    	ReadFloatFromBuffer(frameData.dataBuffer, &inputDataBufferPos, &sensors->pvEncoder);
 8004cca:	f8d7 3130 	ldr.w	r3, [r7, #304]	@ 0x130
 8004cce:	f103 020c 	add.w	r2, r3, #12
 8004cd2:	f107 010e 	add.w	r1, r7, #14
 8004cd6:	f107 0314 	add.w	r3, r7, #20
 8004cda:	330c      	adds	r3, #12
 8004cdc:	4618      	mov	r0, r3
 8004cde:	f7fe fa6a 	bl	80031b6 <ReadFloatFromBuffer>
                    	ReadByteFromBufer(frameData.dataBuffer, &inputDataBufferPos, &sensors->motorXStatus);
 8004ce2:	f8d7 3130 	ldr.w	r3, [r7, #304]	@ 0x130
 8004ce6:	f103 0210 	add.w	r2, r3, #16
 8004cea:	f107 010e 	add.w	r1, r7, #14
 8004cee:	f107 0314 	add.w	r3, r7, #20
 8004cf2:	330c      	adds	r3, #12
 8004cf4:	4618      	mov	r0, r3
 8004cf6:	f7fe fa93 	bl	8003220 <ReadByteFromBufer>
                    	ReadByteFromBufer(frameData.dataBuffer, &inputDataBufferPos, &sensors->motorYStatus);
 8004cfa:	f8d7 3130 	ldr.w	r3, [r7, #304]	@ 0x130
 8004cfe:	f103 0211 	add.w	r2, r3, #17
 8004d02:	f107 010e 	add.w	r1, r7, #14
 8004d06:	f107 0314 	add.w	r3, r7, #20
 8004d0a:	330c      	adds	r3, #12
 8004d0c:	4618      	mov	r0, r3
 8004d0e:	f7fe fa87 	bl	8003220 <ReadByteFromBufer>
                    	ReadFloatFromBuffer(frameData.dataBuffer, &inputDataBufferPos, &sensors->motorXAveCurrent);
 8004d12:	f8d7 3130 	ldr.w	r3, [r7, #304]	@ 0x130
 8004d16:	f103 0214 	add.w	r2, r3, #20
 8004d1a:	f107 010e 	add.w	r1, r7, #14
 8004d1e:	f107 0314 	add.w	r3, r7, #20
 8004d22:	330c      	adds	r3, #12
 8004d24:	4618      	mov	r0, r3
 8004d26:	f7fe fa46 	bl	80031b6 <ReadFloatFromBuffer>
                    	ReadFloatFromBuffer(frameData.dataBuffer, &inputDataBufferPos, &sensors->motorYAveCurrent);
 8004d2a:	f8d7 3130 	ldr.w	r3, [r7, #304]	@ 0x130
 8004d2e:	f103 0218 	add.w	r2, r3, #24
 8004d32:	f107 010e 	add.w	r1, r7, #14
 8004d36:	f107 0314 	add.w	r3, r7, #20
 8004d3a:	330c      	adds	r3, #12
 8004d3c:	4618      	mov	r0, r3
 8004d3e:	f7fe fa3a 	bl	80031b6 <ReadFloatFromBuffer>
                    	ReadFloatFromBuffer(frameData.dataBuffer, &inputDataBufferPos, &sensors->motorXPeakCurrent);
 8004d42:	f8d7 3130 	ldr.w	r3, [r7, #304]	@ 0x130
 8004d46:	f103 021c 	add.w	r2, r3, #28
 8004d4a:	f107 010e 	add.w	r1, r7, #14
 8004d4e:	f107 0314 	add.w	r3, r7, #20
 8004d52:	330c      	adds	r3, #12
 8004d54:	4618      	mov	r0, r3
 8004d56:	f7fe fa2e 	bl	80031b6 <ReadFloatFromBuffer>
                    	ReadFloatFromBuffer(frameData.dataBuffer, &inputDataBufferPos, &sensors->motorYPeakCurrent);
 8004d5a:	f8d7 3130 	ldr.w	r3, [r7, #304]	@ 0x130
 8004d5e:	f103 0220 	add.w	r2, r3, #32
 8004d62:	f107 010e 	add.w	r1, r7, #14
 8004d66:	f107 0314 	add.w	r3, r7, #20
 8004d6a:	330c      	adds	r3, #12
 8004d6c:	4618      	mov	r0, r3
 8004d6e:	f7fe fa22 	bl	80031b6 <ReadFloatFromBuffer>
                    	ReadByteFromBufer(frameData.dataBuffer, &inputDataBufferPos, &sensors->limitXSwitchUp);
 8004d72:	f8d7 3130 	ldr.w	r3, [r7, #304]	@ 0x130
 8004d76:	f103 0224 	add.w	r2, r3, #36	@ 0x24
 8004d7a:	f107 010e 	add.w	r1, r7, #14
 8004d7e:	f107 0314 	add.w	r3, r7, #20
 8004d82:	330c      	adds	r3, #12
 8004d84:	4618      	mov	r0, r3
 8004d86:	f7fe fa4b 	bl	8003220 <ReadByteFromBufer>
                    	ReadByteFromBufer(frameData.dataBuffer, &inputDataBufferPos, &sensors->limitXSwitchDown);
 8004d8a:	f8d7 3130 	ldr.w	r3, [r7, #304]	@ 0x130
 8004d8e:	f103 0225 	add.w	r2, r3, #37	@ 0x25
 8004d92:	f107 010e 	add.w	r1, r7, #14
 8004d96:	f107 0314 	add.w	r3, r7, #20
 8004d9a:	330c      	adds	r3, #12
 8004d9c:	4618      	mov	r0, r3
 8004d9e:	f7fe fa3f 	bl	8003220 <ReadByteFromBufer>
                    	ReadByteFromBufer(frameData.dataBuffer, &inputDataBufferPos, &sensors->limitXSwitchCenter);
 8004da2:	f8d7 3130 	ldr.w	r3, [r7, #304]	@ 0x130
 8004da6:	f103 0226 	add.w	r2, r3, #38	@ 0x26
 8004daa:	f107 010e 	add.w	r1, r7, #14
 8004dae:	f107 0314 	add.w	r3, r7, #20
 8004db2:	330c      	adds	r3, #12
 8004db4:	4618      	mov	r0, r3
 8004db6:	f7fe fa33 	bl	8003220 <ReadByteFromBufer>
                    	ReadByteFromBufer(frameData.dataBuffer, &inputDataBufferPos, &sensors->limitYSwitchUp);
 8004dba:	f8d7 3130 	ldr.w	r3, [r7, #304]	@ 0x130
 8004dbe:	f103 0227 	add.w	r2, r3, #39	@ 0x27
 8004dc2:	f107 010e 	add.w	r1, r7, #14
 8004dc6:	f107 0314 	add.w	r3, r7, #20
 8004dca:	330c      	adds	r3, #12
 8004dcc:	4618      	mov	r0, r3
 8004dce:	f7fe fa27 	bl	8003220 <ReadByteFromBufer>
                    	ReadByteFromBufer(frameData.dataBuffer, &inputDataBufferPos, &sensors->limitYSwitchDown);
 8004dd2:	f8d7 3130 	ldr.w	r3, [r7, #304]	@ 0x130
 8004dd6:	f103 0228 	add.w	r2, r3, #40	@ 0x28
 8004dda:	f107 010e 	add.w	r1, r7, #14
 8004dde:	f107 0314 	add.w	r3, r7, #20
 8004de2:	330c      	adds	r3, #12
 8004de4:	4618      	mov	r0, r3
 8004de6:	f7fe fa1b 	bl	8003220 <ReadByteFromBufer>
                    	ReadByteFromBufer(frameData.dataBuffer, &inputDataBufferPos, &sensors->limitYSwitchCenter);
 8004dea:	f8d7 3130 	ldr.w	r3, [r7, #304]	@ 0x130
 8004dee:	f103 0229 	add.w	r2, r3, #41	@ 0x29
 8004df2:	f107 010e 	add.w	r1, r7, #14
 8004df6:	f107 0314 	add.w	r3, r7, #20
 8004dfa:	330c      	adds	r3, #12
 8004dfc:	4618      	mov	r0, r3
 8004dfe:	f7fe fa0f 	bl	8003220 <ReadByteFromBufer>
                    	ReadByteFromBufer(frameData.dataBuffer, &inputDataBufferPos, &sensors->powerSupplyFailMask);
 8004e02:	f8d7 3130 	ldr.w	r3, [r7, #304]	@ 0x130
 8004e06:	f103 022a 	add.w	r2, r3, #42	@ 0x2a
 8004e0a:	f107 010e 	add.w	r1, r7, #14
 8004e0e:	f107 0314 	add.w	r3, r7, #20
 8004e12:	330c      	adds	r3, #12
 8004e14:	4618      	mov	r0, r3
 8004e16:	f7fe fa03 	bl	8003220 <ReadByteFromBufer>
                    	osMutexRelease(sensorsInfoMutex);
 8004e1a:	4b06      	ldr	r3, [pc, #24]	@ (8004e34 <UartTxTask+0x51c>)
 8004e1c:	681b      	ldr	r3, [r3, #0]
 8004e1e:	4618      	mov	r0, r3
 8004e20:	f00c f9d3 	bl	80111ca <osMutexRelease>
                    	break;
 8004e24:	e005      	b.n	8004e32 <UartTxTask+0x51a>
                    }
                }
            }
        } else {
            osDelay (pdMS_TO_TICKS (1000));
 8004e26:	f44f 707a 	mov.w	r0, #1000	@ 0x3e8
 8004e2a:	f00c f850 	bl	8010ece <osDelay>
 8004e2e:	e5ab      	b.n	8004988 <UartTxTask+0x70>
            default: continue; break;
 8004e30:	bf00      	nop
        if (uartTaskData->sendCmdToSlaveQueue != NULL) {
 8004e32:	e5a9      	b.n	8004988 <UartTxTask+0x70>
 8004e34:	2400223c 	.word	0x2400223c
 8004e38:	24002178 	.word	0x24002178

08004e3c <MeasurmentsReqSchedulerTaskInit>:
        }
    }
}

void MeasurmentsReqSchedulerTaskInit (void) {
 8004e3c:	b580      	push	{r7, lr}
 8004e3e:	b08a      	sub	sp, #40	@ 0x28
 8004e40:	af00      	add	r7, sp, #0
    osThreadAttr_t osThreadAttrMeasurmentsReqSchedulerTask = { 0 };
 8004e42:	1d3b      	adds	r3, r7, #4
 8004e44:	2224      	movs	r2, #36	@ 0x24
 8004e46:	2100      	movs	r1, #0
 8004e48:	4618      	mov	r0, r3
 8004e4a:	f025 fb49 	bl	802a4e0 <memset>

    osThreadAttrMeasurmentsReqSchedulerTask.name       = "os_thread_XXX";
 8004e4e:	4b08      	ldr	r3, [pc, #32]	@ (8004e70 <MeasurmentsReqSchedulerTaskInit+0x34>)
 8004e50:	607b      	str	r3, [r7, #4]
    osThreadAttrMeasurmentsReqSchedulerTask.stack_size = configMINIMAL_STACK_SIZE * 2;
 8004e52:	f44f 6380 	mov.w	r3, #1024	@ 0x400
 8004e56:	61bb      	str	r3, [r7, #24]
    osThreadAttrMeasurmentsReqSchedulerTask.priority   = (osPriority_t)osPriorityNormal;
 8004e58:	2318      	movs	r3, #24
 8004e5a:	61fb      	str	r3, [r7, #28]

    osThreadNew (MeasurmentsReqSchedulerTask, uartTasks, &osThreadAttrMeasurmentsReqSchedulerTask);
 8004e5c:	1d3b      	adds	r3, r7, #4
 8004e5e:	461a      	mov	r2, r3
 8004e60:	4904      	ldr	r1, [pc, #16]	@ (8004e74 <MeasurmentsReqSchedulerTaskInit+0x38>)
 8004e62:	4805      	ldr	r0, [pc, #20]	@ (8004e78 <MeasurmentsReqSchedulerTaskInit+0x3c>)
 8004e64:	f00b ff95 	bl	8010d92 <osThreadNew>
}
 8004e68:	bf00      	nop
 8004e6a:	3728      	adds	r7, #40	@ 0x28
 8004e6c:	46bd      	mov	sp, r7
 8004e6e:	bd80      	pop	{r7, pc}
 8004e70:	0802d25c 	.word	0x0802d25c
 8004e74:	24000018 	.word	0x24000018
 8004e78:	08004e7d 	.word	0x08004e7d

08004e7c <MeasurmentsReqSchedulerTask>:

void MeasurmentsReqSchedulerTask (void* argument) {
 8004e7c:	b580      	push	{r7, lr}
 8004e7e:	b088      	sub	sp, #32
 8004e80:	af00      	add	r7, sp, #0
 8004e82:	6078      	str	r0, [r7, #4]
    while (pdTRUE) {
        __uintptr_t* ptr = (__uintptr_t*)argument;
 8004e84:	687b      	ldr	r3, [r7, #4]
 8004e86:	61fb      	str	r3, [r7, #28]
        while (*ptr != 0) {
 8004e88:	e04a      	b.n	8004f20 <MeasurmentsReqSchedulerTask+0xa4>
            UartTaskData* uartTask = (UartTaskData*)*ptr;
 8004e8a:	69fb      	ldr	r3, [r7, #28]
 8004e8c:	681b      	ldr	r3, [r3, #0]
 8004e8e:	617b      	str	r3, [r7, #20]
            if (uartTask->sendCmdToSlaveQueue != NULL) {
 8004e90:	697b      	ldr	r3, [r7, #20]
 8004e92:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8004e94:	2b00      	cmp	r3, #0
 8004e96:	d040      	beq.n	8004f1a <MeasurmentsReqSchedulerTask+0x9e>
                InterProcessData data = { 0 };
 8004e98:	f107 0308 	add.w	r3, r7, #8
 8004e9c:	2200      	movs	r2, #0
 8004e9e:	601a      	str	r2, [r3, #0]
 8004ea0:	605a      	str	r2, [r3, #4]
 8004ea2:	609a      	str	r2, [r3, #8]
                uint8_t boardNumber = 0;
 8004ea4:	2300      	movs	r3, #0
 8004ea6:	76fb      	strb	r3, [r7, #27]
            	for(boardNumber = 0; boardNumber < SLAVES_COUNT; boardNumber++)
 8004ea8:	2300      	movs	r3, #0
 8004eaa:	76fb      	strb	r3, [r7, #27]
 8004eac:	e00a      	b.n	8004ec4 <MeasurmentsReqSchedulerTask+0x48>
            	{
            		if(boardToUartNumberMap[boardNumber] == uartTask->uartNumber)
 8004eae:	7efb      	ldrb	r3, [r7, #27]
 8004eb0:	4a20      	ldr	r2, [pc, #128]	@ (8004f34 <MeasurmentsReqSchedulerTask+0xb8>)
 8004eb2:	5cd2      	ldrb	r2, [r2, r3]
 8004eb4:	697b      	ldr	r3, [r7, #20]
 8004eb6:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 8004eba:	429a      	cmp	r2, r3
 8004ebc:	d006      	beq.n	8004ecc <MeasurmentsReqSchedulerTask+0x50>
            	for(boardNumber = 0; boardNumber < SLAVES_COUNT; boardNumber++)
 8004ebe:	7efb      	ldrb	r3, [r7, #27]
 8004ec0:	3301      	adds	r3, #1
 8004ec2:	76fb      	strb	r3, [r7, #27]
 8004ec4:	7efb      	ldrb	r3, [r7, #27]
 8004ec6:	2b03      	cmp	r3, #3
 8004ec8:	d9f1      	bls.n	8004eae <MeasurmentsReqSchedulerTask+0x32>
 8004eca:	e000      	b.n	8004ece <MeasurmentsReqSchedulerTask+0x52>
            		{
            			break;
 8004ecc:	bf00      	nop
            		}
            	}
                data.spCommand        = spGetElectricalMeasurments;
 8004ece:	2300      	movs	r3, #0
 8004ed0:	723b      	strb	r3, [r7, #8]
                osMessageQueuePut (uartTask->sendCmdToSlaveQueue, &data, 0, (TickType_t)100);
 8004ed2:	697b      	ldr	r3, [r7, #20]
 8004ed4:	6ad8      	ldr	r0, [r3, #44]	@ 0x2c
 8004ed6:	f107 0108 	add.w	r1, r7, #8
 8004eda:	2364      	movs	r3, #100	@ 0x64
 8004edc:	2200      	movs	r2, #0
 8004ede:	f00c fb69 	bl	80115b4 <osMessageQueuePut>
            	osMutexAcquire (resMeasurementsMutex, osWaitForever);
 8004ee2:	4b15      	ldr	r3, [pc, #84]	@ (8004f38 <MeasurmentsReqSchedulerTask+0xbc>)
 8004ee4:	681b      	ldr	r3, [r3, #0]
 8004ee6:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 8004eea:	4618      	mov	r0, r3
 8004eec:	f00c f922 	bl	8011134 <osMutexAcquire>
            	if(slaveLastSeen[boardNumber] == 0)
 8004ef0:	7efb      	ldrb	r3, [r7, #27]
 8004ef2:	4a12      	ldr	r2, [pc, #72]	@ (8004f3c <MeasurmentsReqSchedulerTask+0xc0>)
 8004ef4:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
 8004ef8:	2b00      	cmp	r3, #0
 8004efa:	d109      	bne.n	8004f10 <MeasurmentsReqSchedulerTask+0x94>
            	{
            		data.spCommand = spGetSensorMeasurments;
 8004efc:	2301      	movs	r3, #1
 8004efe:	723b      	strb	r3, [r7, #8]
            		osMessageQueuePut (uartTask->sendCmdToSlaveQueue, &data, 0, (TickType_t)100);
 8004f00:	697b      	ldr	r3, [r7, #20]
 8004f02:	6ad8      	ldr	r0, [r3, #44]	@ 0x2c
 8004f04:	f107 0108 	add.w	r1, r7, #8
 8004f08:	2364      	movs	r3, #100	@ 0x64
 8004f0a:	2200      	movs	r2, #0
 8004f0c:	f00c fb52 	bl	80115b4 <osMessageQueuePut>
            	}
            	osMutexRelease(resMeasurementsMutex);
 8004f10:	4b09      	ldr	r3, [pc, #36]	@ (8004f38 <MeasurmentsReqSchedulerTask+0xbc>)
 8004f12:	681b      	ldr	r3, [r3, #0]
 8004f14:	4618      	mov	r0, r3
 8004f16:	f00c f958 	bl	80111ca <osMutexRelease>
            }
            ptr++;
 8004f1a:	69fb      	ldr	r3, [r7, #28]
 8004f1c:	3304      	adds	r3, #4
 8004f1e:	61fb      	str	r3, [r7, #28]
        while (*ptr != 0) {
 8004f20:	69fb      	ldr	r3, [r7, #28]
 8004f22:	681b      	ldr	r3, [r3, #0]
 8004f24:	2b00      	cmp	r3, #0
 8004f26:	d1b0      	bne.n	8004e8a <MeasurmentsReqSchedulerTask+0xe>
        }
        osDelay (pdMS_TO_TICKS (MEASURMENTS_SCHEDULER_INTERVAL_MS));
 8004f28:	f44f 707a 	mov.w	r0, #1000	@ 0x3e8
 8004f2c:	f00b ffcf 	bl	8010ece <osDelay>
    while (pdTRUE) {
 8004f30:	e7a8      	b.n	8004e84 <MeasurmentsReqSchedulerTask+0x8>
 8004f32:	bf00      	nop
 8004f34:	24000014 	.word	0x24000014
 8004f38:	24002238 	.word	0x24002238
 8004f3c:	24002228 	.word	0x24002228

08004f40 <Reset_Handler>:

    .section  .text.Reset_Handler
  .weak  Reset_Handler
  .type  Reset_Handler, %function
Reset_Handler:
  ldr   sp, =_estack      /* set stack pointer */
 8004f40:	f8df d034 	ldr.w	sp, [pc, #52]	@ 8004f78 <LoopFillZerobss+0xe>

/* Call the clock system initialization function.*/
  bl  SystemInit
 8004f44:	f7fe ff86 	bl	8003e54 <SystemInit>

/* Copy the data segment initializers from flash to SRAM */
  ldr r0, =_sdata
 8004f48:	480c      	ldr	r0, [pc, #48]	@ (8004f7c <LoopFillZerobss+0x12>)
  ldr r1, =_edata
 8004f4a:	490d      	ldr	r1, [pc, #52]	@ (8004f80 <LoopFillZerobss+0x16>)
  ldr r2, =_sidata
 8004f4c:	4a0d      	ldr	r2, [pc, #52]	@ (8004f84 <LoopFillZerobss+0x1a>)
  movs r3, #0
 8004f4e:	2300      	movs	r3, #0
  b LoopCopyDataInit
 8004f50:	e002      	b.n	8004f58 <LoopCopyDataInit>

08004f52 <CopyDataInit>:

CopyDataInit:
  ldr r4, [r2, r3]
 8004f52:	58d4      	ldr	r4, [r2, r3]
  str r4, [r0, r3]
 8004f54:	50c4      	str	r4, [r0, r3]
  adds r3, r3, #4
 8004f56:	3304      	adds	r3, #4

08004f58 <LoopCopyDataInit>:

LoopCopyDataInit:
  adds r4, r0, r3
 8004f58:	18c4      	adds	r4, r0, r3
  cmp r4, r1
 8004f5a:	428c      	cmp	r4, r1
  bcc CopyDataInit
 8004f5c:	d3f9      	bcc.n	8004f52 <CopyDataInit>
/* Zero fill the bss segment. */
  ldr r2, =_sbss
 8004f5e:	4a0a      	ldr	r2, [pc, #40]	@ (8004f88 <LoopFillZerobss+0x1e>)
  ldr r4, =_ebss
 8004f60:	4c0a      	ldr	r4, [pc, #40]	@ (8004f8c <LoopFillZerobss+0x22>)
  movs r3, #0
 8004f62:	2300      	movs	r3, #0
  b LoopFillZerobss
 8004f64:	e001      	b.n	8004f6a <LoopFillZerobss>

08004f66 <FillZerobss>:

FillZerobss:
  str  r3, [r2]
 8004f66:	6013      	str	r3, [r2, #0]
  adds r2, r2, #4
 8004f68:	3204      	adds	r2, #4

08004f6a <LoopFillZerobss>:

LoopFillZerobss:
  cmp r2, r4
 8004f6a:	42a2      	cmp	r2, r4
  bcc FillZerobss
 8004f6c:	d3fb      	bcc.n	8004f66 <FillZerobss>

/* Call static constructors */
    bl __libc_init_array
 8004f6e:	f025 fb87 	bl	802a680 <__libc_init_array>
/* Call the application's entry point.*/
  bl  main
 8004f72:	f7fc feb3 	bl	8001cdc <main>
  bx  lr
 8004f76:	4770      	bx	lr
  ldr   sp, =_estack      /* set stack pointer */
 8004f78:	24060000 	.word	0x24060000
  ldr r0, =_sdata
 8004f7c:	24000000 	.word	0x24000000
  ldr r1, =_edata
 8004f80:	24000224 	.word	0x24000224
  ldr r2, =_sidata
 8004f84:	0803199c 	.word	0x0803199c
  ldr r2, =_sbss
 8004f88:	24000224 	.word	0x24000224
  ldr r4, =_ebss
 8004f8c:	2402b258 	.word	0x2402b258

08004f90 <ADC3_IRQHandler>:
 * @retval None
*/
    .section  .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
  b  Infinite_Loop
 8004f90:	e7fe      	b.n	8004f90 <ADC3_IRQHandler>

08004f92 <DP83848_RegisterBusIO>:
  * @param  ioctx: holds device IO functions.
  * @retval DP83848_STATUS_OK  if OK
  *         DP83848_STATUS_ERROR if missing mandatory function
  */
int32_t  DP83848_RegisterBusIO(dp83848_Object_t *pObj, dp83848_IOCtx_t *ioctx)
{
 8004f92:	b480      	push	{r7}
 8004f94:	b083      	sub	sp, #12
 8004f96:	af00      	add	r7, sp, #0
 8004f98:	6078      	str	r0, [r7, #4]
 8004f9a:	6039      	str	r1, [r7, #0]
  if(!pObj || !ioctx->ReadReg || !ioctx->WriteReg || !ioctx->GetTick)
 8004f9c:	687b      	ldr	r3, [r7, #4]
 8004f9e:	2b00      	cmp	r3, #0
 8004fa0:	d00b      	beq.n	8004fba <DP83848_RegisterBusIO+0x28>
 8004fa2:	683b      	ldr	r3, [r7, #0]
 8004fa4:	68db      	ldr	r3, [r3, #12]
 8004fa6:	2b00      	cmp	r3, #0
 8004fa8:	d007      	beq.n	8004fba <DP83848_RegisterBusIO+0x28>
 8004faa:	683b      	ldr	r3, [r7, #0]
 8004fac:	689b      	ldr	r3, [r3, #8]
 8004fae:	2b00      	cmp	r3, #0
 8004fb0:	d003      	beq.n	8004fba <DP83848_RegisterBusIO+0x28>
 8004fb2:	683b      	ldr	r3, [r7, #0]
 8004fb4:	691b      	ldr	r3, [r3, #16]
 8004fb6:	2b00      	cmp	r3, #0
 8004fb8:	d102      	bne.n	8004fc0 <DP83848_RegisterBusIO+0x2e>
  {
    return DP83848_STATUS_ERROR;
 8004fba:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8004fbe:	e014      	b.n	8004fea <DP83848_RegisterBusIO+0x58>
  }

  pObj->IO.Init = ioctx->Init;
 8004fc0:	683b      	ldr	r3, [r7, #0]
 8004fc2:	681a      	ldr	r2, [r3, #0]
 8004fc4:	687b      	ldr	r3, [r7, #4]
 8004fc6:	609a      	str	r2, [r3, #8]
  pObj->IO.DeInit = ioctx->DeInit;
 8004fc8:	683b      	ldr	r3, [r7, #0]
 8004fca:	685a      	ldr	r2, [r3, #4]
 8004fcc:	687b      	ldr	r3, [r7, #4]
 8004fce:	60da      	str	r2, [r3, #12]
  pObj->IO.ReadReg = ioctx->ReadReg;
 8004fd0:	683b      	ldr	r3, [r7, #0]
 8004fd2:	68da      	ldr	r2, [r3, #12]
 8004fd4:	687b      	ldr	r3, [r7, #4]
 8004fd6:	615a      	str	r2, [r3, #20]
  pObj->IO.WriteReg = ioctx->WriteReg;
 8004fd8:	683b      	ldr	r3, [r7, #0]
 8004fda:	689a      	ldr	r2, [r3, #8]
 8004fdc:	687b      	ldr	r3, [r7, #4]
 8004fde:	611a      	str	r2, [r3, #16]
  pObj->IO.GetTick = ioctx->GetTick;
 8004fe0:	683b      	ldr	r3, [r7, #0]
 8004fe2:	691a      	ldr	r2, [r3, #16]
 8004fe4:	687b      	ldr	r3, [r7, #4]
 8004fe6:	619a      	str	r2, [r3, #24]

  return DP83848_STATUS_OK;
 8004fe8:	2300      	movs	r3, #0
}
 8004fea:	4618      	mov	r0, r3
 8004fec:	370c      	adds	r7, #12
 8004fee:	46bd      	mov	sp, r7
 8004ff0:	f85d 7b04 	ldr.w	r7, [sp], #4
 8004ff4:	4770      	bx	lr

08004ff6 <DP83848_Init>:
  * @retval DP83848_STATUS_OK  if OK
  *         DP83848_STATUS_ADDRESS_ERROR if cannot find device address
  *         DP83848_STATUS_READ_ERROR if connot read register
  */
 int32_t DP83848_Init(dp83848_Object_t *pObj)
 {
 8004ff6:	b580      	push	{r7, lr}
 8004ff8:	b086      	sub	sp, #24
 8004ffa:	af00      	add	r7, sp, #0
 8004ffc:	6078      	str	r0, [r7, #4]
   uint32_t regvalue = 0, addr = 0;
 8004ffe:	2300      	movs	r3, #0
 8005000:	60fb      	str	r3, [r7, #12]
 8005002:	2300      	movs	r3, #0
 8005004:	617b      	str	r3, [r7, #20]
   int32_t status = DP83848_STATUS_OK;
 8005006:	2300      	movs	r3, #0
 8005008:	613b      	str	r3, [r7, #16]

   if(pObj->Is_Initialized == 0)
 800500a:	687b      	ldr	r3, [r7, #4]
 800500c:	685b      	ldr	r3, [r3, #4]
 800500e:	2b00      	cmp	r3, #0
 8005010:	d139      	bne.n	8005086 <DP83848_Init+0x90>
   {
     if(pObj->IO.Init != 0)
 8005012:	687b      	ldr	r3, [r7, #4]
 8005014:	689b      	ldr	r3, [r3, #8]
 8005016:	2b00      	cmp	r3, #0
 8005018:	d002      	beq.n	8005020 <DP83848_Init+0x2a>
     {
       /* GPIO and Clocks initialization */
       pObj->IO.Init();
 800501a:	687b      	ldr	r3, [r7, #4]
 800501c:	689b      	ldr	r3, [r3, #8]
 800501e:	4798      	blx	r3
     }

     /* for later check */
     pObj->DevAddr = DP83848_MAX_DEV_ADDR + 1;
 8005020:	687b      	ldr	r3, [r7, #4]
 8005022:	2220      	movs	r2, #32
 8005024:	601a      	str	r2, [r3, #0]

     /* Get the device address from special mode register */
     for(addr = 0; addr <= DP83848_MAX_DEV_ADDR; addr ++)
 8005026:	2300      	movs	r3, #0
 8005028:	617b      	str	r3, [r7, #20]
 800502a:	e01c      	b.n	8005066 <DP83848_Init+0x70>
     {
       if(pObj->IO.ReadReg(addr, DP83848_SMR, &regvalue) < 0)
 800502c:	687b      	ldr	r3, [r7, #4]
 800502e:	695b      	ldr	r3, [r3, #20]
 8005030:	f107 020c 	add.w	r2, r7, #12
 8005034:	2119      	movs	r1, #25
 8005036:	6978      	ldr	r0, [r7, #20]
 8005038:	4798      	blx	r3
 800503a:	4603      	mov	r3, r0
 800503c:	2b00      	cmp	r3, #0
 800503e:	da03      	bge.n	8005048 <DP83848_Init+0x52>
       {
         status = DP83848_STATUS_READ_ERROR;
 8005040:	f06f 0304 	mvn.w	r3, #4
 8005044:	613b      	str	r3, [r7, #16]
         /* Can't read from this device address
            continue with next address */
         continue;
 8005046:	e00b      	b.n	8005060 <DP83848_Init+0x6a>
       }

       if((regvalue & DP83848_SMR_PHY_ADDR) == addr)
 8005048:	68fb      	ldr	r3, [r7, #12]
 800504a:	f003 031f 	and.w	r3, r3, #31
 800504e:	697a      	ldr	r2, [r7, #20]
 8005050:	429a      	cmp	r2, r3
 8005052:	d105      	bne.n	8005060 <DP83848_Init+0x6a>
       {
         pObj->DevAddr = addr;
 8005054:	687b      	ldr	r3, [r7, #4]
 8005056:	697a      	ldr	r2, [r7, #20]
 8005058:	601a      	str	r2, [r3, #0]
         status = DP83848_STATUS_OK;
 800505a:	2300      	movs	r3, #0
 800505c:	613b      	str	r3, [r7, #16]
         break;
 800505e:	e005      	b.n	800506c <DP83848_Init+0x76>
     for(addr = 0; addr <= DP83848_MAX_DEV_ADDR; addr ++)
 8005060:	697b      	ldr	r3, [r7, #20]
 8005062:	3301      	adds	r3, #1
 8005064:	617b      	str	r3, [r7, #20]
 8005066:	697b      	ldr	r3, [r7, #20]
 8005068:	2b1f      	cmp	r3, #31
 800506a:	d9df      	bls.n	800502c <DP83848_Init+0x36>
       }
     }

     if(pObj->DevAddr > DP83848_MAX_DEV_ADDR)
 800506c:	687b      	ldr	r3, [r7, #4]
 800506e:	681b      	ldr	r3, [r3, #0]
 8005070:	2b1f      	cmp	r3, #31
 8005072:	d902      	bls.n	800507a <DP83848_Init+0x84>
     {
       status = DP83848_STATUS_ADDRESS_ERROR;
 8005074:	f06f 0302 	mvn.w	r3, #2
 8005078:	613b      	str	r3, [r7, #16]
     }

     /* if device address is matched */
     if(status == DP83848_STATUS_OK)
 800507a:	693b      	ldr	r3, [r7, #16]
 800507c:	2b00      	cmp	r3, #0
 800507e:	d102      	bne.n	8005086 <DP83848_Init+0x90>
     {
       pObj->Is_Initialized = 1;
 8005080:	687b      	ldr	r3, [r7, #4]
 8005082:	2201      	movs	r2, #1
 8005084:	605a      	str	r2, [r3, #4]
     }
   }

   return status;
 8005086:	693b      	ldr	r3, [r7, #16]
 }
 8005088:	4618      	mov	r0, r3
 800508a:	3718      	adds	r7, #24
 800508c:	46bd      	mov	sp, r7
 800508e:	bd80      	pop	{r7, pc}

08005090 <DP83848_GetLinkState>:
  *         DP83848_STATUS_10MBITS_HALFDUPLEX  if 10Mb/s HD
  *         DP83848_STATUS_READ_ERROR if connot read register
  *         DP83848_STATUS_WRITE_ERROR if connot write to register
  */
int32_t DP83848_GetLinkState(dp83848_Object_t *pObj)
{
 8005090:	b580      	push	{r7, lr}
 8005092:	b084      	sub	sp, #16
 8005094:	af00      	add	r7, sp, #0
 8005096:	6078      	str	r0, [r7, #4]
  uint32_t readval = 0;
 8005098:	2300      	movs	r3, #0
 800509a:	60fb      	str	r3, [r7, #12]

  /* Read Status register  */
  if(pObj->IO.ReadReg(pObj->DevAddr, DP83848_BSR, &readval) < 0)
 800509c:	687b      	ldr	r3, [r7, #4]
 800509e:	695b      	ldr	r3, [r3, #20]
 80050a0:	687a      	ldr	r2, [r7, #4]
 80050a2:	6810      	ldr	r0, [r2, #0]
 80050a4:	f107 020c 	add.w	r2, r7, #12
 80050a8:	2101      	movs	r1, #1
 80050aa:	4798      	blx	r3
 80050ac:	4603      	mov	r3, r0
 80050ae:	2b00      	cmp	r3, #0
 80050b0:	da02      	bge.n	80050b8 <DP83848_GetLinkState+0x28>
  {
    return DP83848_STATUS_READ_ERROR;
 80050b2:	f06f 0304 	mvn.w	r3, #4
 80050b6:	e06e      	b.n	8005196 <DP83848_GetLinkState+0x106>
  }

  /* Read Status register again */
  if(pObj->IO.ReadReg(pObj->DevAddr, DP83848_BSR, &readval) < 0)
 80050b8:	687b      	ldr	r3, [r7, #4]
 80050ba:	695b      	ldr	r3, [r3, #20]
 80050bc:	687a      	ldr	r2, [r7, #4]
 80050be:	6810      	ldr	r0, [r2, #0]
 80050c0:	f107 020c 	add.w	r2, r7, #12
 80050c4:	2101      	movs	r1, #1
 80050c6:	4798      	blx	r3
 80050c8:	4603      	mov	r3, r0
 80050ca:	2b00      	cmp	r3, #0
 80050cc:	da02      	bge.n	80050d4 <DP83848_GetLinkState+0x44>
  {
    return DP83848_STATUS_READ_ERROR;
 80050ce:	f06f 0304 	mvn.w	r3, #4
 80050d2:	e060      	b.n	8005196 <DP83848_GetLinkState+0x106>
  }

  if((readval & DP83848_BSR_LINK_STATUS) == 0)
 80050d4:	68fb      	ldr	r3, [r7, #12]
 80050d6:	f003 0304 	and.w	r3, r3, #4
 80050da:	2b00      	cmp	r3, #0
 80050dc:	d101      	bne.n	80050e2 <DP83848_GetLinkState+0x52>
  {
    /* Return Link Down status */
    return DP83848_STATUS_LINK_DOWN;
 80050de:	2301      	movs	r3, #1
 80050e0:	e059      	b.n	8005196 <DP83848_GetLinkState+0x106>
  }

  /* Check Auto negotiaition */
  if(pObj->IO.ReadReg(pObj->DevAddr, DP83848_BCR, &readval) < 0)
 80050e2:	687b      	ldr	r3, [r7, #4]
 80050e4:	695b      	ldr	r3, [r3, #20]
 80050e6:	687a      	ldr	r2, [r7, #4]
 80050e8:	6810      	ldr	r0, [r2, #0]
 80050ea:	f107 020c 	add.w	r2, r7, #12
 80050ee:	2100      	movs	r1, #0
 80050f0:	4798      	blx	r3
 80050f2:	4603      	mov	r3, r0
 80050f4:	2b00      	cmp	r3, #0
 80050f6:	da02      	bge.n	80050fe <DP83848_GetLinkState+0x6e>
  {
    return DP83848_STATUS_READ_ERROR;
 80050f8:	f06f 0304 	mvn.w	r3, #4
 80050fc:	e04b      	b.n	8005196 <DP83848_GetLinkState+0x106>
  }

  if((readval & DP83848_BCR_AUTONEGO_EN) != DP83848_BCR_AUTONEGO_EN)
 80050fe:	68fb      	ldr	r3, [r7, #12]
 8005100:	f403 5380 	and.w	r3, r3, #4096	@ 0x1000
 8005104:	2b00      	cmp	r3, #0
 8005106:	d11b      	bne.n	8005140 <DP83848_GetLinkState+0xb0>
  {
    if(((readval & DP83848_BCR_SPEED_SELECT) == DP83848_BCR_SPEED_SELECT) && ((readval & DP83848_BCR_DUPLEX_MODE) == DP83848_BCR_DUPLEX_MODE))
 8005108:	68fb      	ldr	r3, [r7, #12]
 800510a:	f403 5300 	and.w	r3, r3, #8192	@ 0x2000
 800510e:	2b00      	cmp	r3, #0
 8005110:	d006      	beq.n	8005120 <DP83848_GetLinkState+0x90>
 8005112:	68fb      	ldr	r3, [r7, #12]
 8005114:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 8005118:	2b00      	cmp	r3, #0
 800511a:	d001      	beq.n	8005120 <DP83848_GetLinkState+0x90>
    {
      return DP83848_STATUS_100MBITS_FULLDUPLEX;
 800511c:	2302      	movs	r3, #2
 800511e:	e03a      	b.n	8005196 <DP83848_GetLinkState+0x106>
    }
    else if ((readval & DP83848_BCR_SPEED_SELECT) == DP83848_BCR_SPEED_SELECT)
 8005120:	68fb      	ldr	r3, [r7, #12]
 8005122:	f403 5300 	and.w	r3, r3, #8192	@ 0x2000
 8005126:	2b00      	cmp	r3, #0
 8005128:	d001      	beq.n	800512e <DP83848_GetLinkState+0x9e>
    {
      return DP83848_STATUS_100MBITS_HALFDUPLEX;
 800512a:	2303      	movs	r3, #3
 800512c:	e033      	b.n	8005196 <DP83848_GetLinkState+0x106>
    }
    else if ((readval & DP83848_BCR_DUPLEX_MODE) == DP83848_BCR_DUPLEX_MODE)
 800512e:	68fb      	ldr	r3, [r7, #12]
 8005130:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 8005134:	2b00      	cmp	r3, #0
 8005136:	d001      	beq.n	800513c <DP83848_GetLinkState+0xac>
    {
      return DP83848_STATUS_10MBITS_FULLDUPLEX;
 8005138:	2304      	movs	r3, #4
 800513a:	e02c      	b.n	8005196 <DP83848_GetLinkState+0x106>
    }
    else
    {
      return DP83848_STATUS_10MBITS_HALFDUPLEX;
 800513c:	2305      	movs	r3, #5
 800513e:	e02a      	b.n	8005196 <DP83848_GetLinkState+0x106>
    }
  }
  else /* Auto Nego enabled */
  {
    if(pObj->IO.ReadReg(pObj->DevAddr, DP83848_PHYSCSR, &readval) < 0)
 8005140:	687b      	ldr	r3, [r7, #4]
 8005142:	695b      	ldr	r3, [r3, #20]
 8005144:	687a      	ldr	r2, [r7, #4]
 8005146:	6810      	ldr	r0, [r2, #0]
 8005148:	f107 020c 	add.w	r2, r7, #12
 800514c:	2110      	movs	r1, #16
 800514e:	4798      	blx	r3
 8005150:	4603      	mov	r3, r0
 8005152:	2b00      	cmp	r3, #0
 8005154:	da02      	bge.n	800515c <DP83848_GetLinkState+0xcc>
    {
      return DP83848_STATUS_READ_ERROR;
 8005156:	f06f 0304 	mvn.w	r3, #4
 800515a:	e01c      	b.n	8005196 <DP83848_GetLinkState+0x106>
    }

    /* Check if auto nego not done */
    if((readval & DP83848_PHYSCSR_AUTONEGO_DONE) == 0)
 800515c:	68fb      	ldr	r3, [r7, #12]
 800515e:	f003 0310 	and.w	r3, r3, #16
 8005162:	2b00      	cmp	r3, #0
 8005164:	d101      	bne.n	800516a <DP83848_GetLinkState+0xda>
    {
      return DP83848_STATUS_AUTONEGO_NOTDONE;
 8005166:	2306      	movs	r3, #6
 8005168:	e015      	b.n	8005196 <DP83848_GetLinkState+0x106>
    }

    if((readval & DP83848_PHYSCSR_HCDSPEEDMASK) == DP83848_PHYSCSR_100BTX_FD)
 800516a:	68fb      	ldr	r3, [r7, #12]
 800516c:	f003 0306 	and.w	r3, r3, #6
 8005170:	2b04      	cmp	r3, #4
 8005172:	d101      	bne.n	8005178 <DP83848_GetLinkState+0xe8>
    {
      return DP83848_STATUS_100MBITS_FULLDUPLEX;
 8005174:	2302      	movs	r3, #2
 8005176:	e00e      	b.n	8005196 <DP83848_GetLinkState+0x106>
    }
    else if ((readval & DP83848_PHYSCSR_HCDSPEEDMASK) == DP83848_PHYSCSR_100BTX_HD)
 8005178:	68fb      	ldr	r3, [r7, #12]
 800517a:	f003 0306 	and.w	r3, r3, #6
 800517e:	2b00      	cmp	r3, #0
 8005180:	d101      	bne.n	8005186 <DP83848_GetLinkState+0xf6>
    {
      return DP83848_STATUS_100MBITS_HALFDUPLEX;
 8005182:	2303      	movs	r3, #3
 8005184:	e007      	b.n	8005196 <DP83848_GetLinkState+0x106>
    }
    else if ((readval & DP83848_PHYSCSR_HCDSPEEDMASK) == DP83848_PHYSCSR_10BT_FD)
 8005186:	68fb      	ldr	r3, [r7, #12]
 8005188:	f003 0306 	and.w	r3, r3, #6
 800518c:	2b06      	cmp	r3, #6
 800518e:	d101      	bne.n	8005194 <DP83848_GetLinkState+0x104>
    {
      return DP83848_STATUS_10MBITS_FULLDUPLEX;
 8005190:	2304      	movs	r3, #4
 8005192:	e000      	b.n	8005196 <DP83848_GetLinkState+0x106>
    }
    else
    {
      return DP83848_STATUS_10MBITS_HALFDUPLEX;
 8005194:	2305      	movs	r3, #5
    }
  }
}
 8005196:	4618      	mov	r0, r3
 8005198:	3710      	adds	r7, #16
 800519a:	46bd      	mov	sp, r7
 800519c:	bd80      	pop	{r7, pc}
	...

080051a0 <HAL_Init>:
  *         need to ensure that the SysTick time base is always set to 1 millisecond
  *         to have correct HAL operation.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_Init(void)
{
 80051a0:	b580      	push	{r7, lr}
 80051a2:	b082      	sub	sp, #8
 80051a4:	af00      	add	r7, sp, #0
   __HAL_ART_CONFIG_BASE_ADDRESS(0x08100000UL);  /* Configure the Cortex-M4 ART Base address to the Flash Bank 2 : */
   __HAL_ART_ENABLE();                           /* Enable the Cortex-M4 ART */
#endif /* DUAL_CORE &&  CORE_CM4 */

  /* Set Interrupt Group Priority */
  HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
 80051a6:	2003      	movs	r0, #3
 80051a8:	f000 f947 	bl	800543a <HAL_NVIC_SetPriorityGrouping>

  /* Update the SystemCoreClock global variable */
#if defined(RCC_D1CFGR_D1CPRE)
  common_system_clock = HAL_RCC_GetSysClockFreq() >> ((D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_D1CPRE)>> RCC_D1CFGR_D1CPRE_Pos]) & 0x1FU);
 80051ac:	f005 fc9c 	bl	800aae8 <HAL_RCC_GetSysClockFreq>
 80051b0:	4602      	mov	r2, r0
 80051b2:	4b15      	ldr	r3, [pc, #84]	@ (8005208 <HAL_Init+0x68>)
 80051b4:	699b      	ldr	r3, [r3, #24]
 80051b6:	0a1b      	lsrs	r3, r3, #8
 80051b8:	f003 030f 	and.w	r3, r3, #15
 80051bc:	4913      	ldr	r1, [pc, #76]	@ (800520c <HAL_Init+0x6c>)
 80051be:	5ccb      	ldrb	r3, [r1, r3]
 80051c0:	f003 031f 	and.w	r3, r3, #31
 80051c4:	fa22 f303 	lsr.w	r3, r2, r3
 80051c8:	607b      	str	r3, [r7, #4]
  common_system_clock = HAL_RCC_GetSysClockFreq() >> ((D1CorePrescTable[(RCC->CDCFGR1 & RCC_CDCFGR1_CDCPRE)>> RCC_CDCFGR1_CDCPRE_Pos]) & 0x1FU);
#endif

  /* Update the SystemD2Clock global variable */
#if defined(RCC_D1CFGR_HPRE)
  SystemD2Clock = (common_system_clock >> ((D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_HPRE)>> RCC_D1CFGR_HPRE_Pos]) & 0x1FU));
 80051ca:	4b0f      	ldr	r3, [pc, #60]	@ (8005208 <HAL_Init+0x68>)
 80051cc:	699b      	ldr	r3, [r3, #24]
 80051ce:	f003 030f 	and.w	r3, r3, #15
 80051d2:	4a0e      	ldr	r2, [pc, #56]	@ (800520c <HAL_Init+0x6c>)
 80051d4:	5cd3      	ldrb	r3, [r2, r3]
 80051d6:	f003 031f 	and.w	r3, r3, #31
 80051da:	687a      	ldr	r2, [r7, #4]
 80051dc:	fa22 f303 	lsr.w	r3, r2, r3
 80051e0:	4a0b      	ldr	r2, [pc, #44]	@ (8005210 <HAL_Init+0x70>)
 80051e2:	6013      	str	r3, [r2, #0]
#endif

#if defined(DUAL_CORE) && defined(CORE_CM4)
  SystemCoreClock = SystemD2Clock;
#else
  SystemCoreClock = common_system_clock;
 80051e4:	4a0b      	ldr	r2, [pc, #44]	@ (8005214 <HAL_Init+0x74>)
 80051e6:	687b      	ldr	r3, [r7, #4]
 80051e8:	6013      	str	r3, [r2, #0]
#endif /* DUAL_CORE && CORE_CM4 */

  /* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */
  if(HAL_InitTick(TICK_INT_PRIORITY) != HAL_OK)
 80051ea:	200f      	movs	r0, #15
 80051ec:	f7fe fc80 	bl	8003af0 <HAL_InitTick>
 80051f0:	4603      	mov	r3, r0
 80051f2:	2b00      	cmp	r3, #0
 80051f4:	d001      	beq.n	80051fa <HAL_Init+0x5a>
  {
    return HAL_ERROR;
 80051f6:	2301      	movs	r3, #1
 80051f8:	e002      	b.n	8005200 <HAL_Init+0x60>
  }

  /* Init the low level hardware */
  HAL_MspInit();
 80051fa:	f7fe f969 	bl	80034d0 <HAL_MspInit>

  /* Return function status */
  return HAL_OK;
 80051fe:	2300      	movs	r3, #0
}
 8005200:	4618      	mov	r0, r3
 8005202:	3708      	adds	r7, #8
 8005204:	46bd      	mov	sp, r7
 8005206:	bd80      	pop	{r7, pc}
 8005208:	58024400 	.word	0x58024400
 800520c:	08031308 	.word	0x08031308
 8005210:	24000010 	.word	0x24000010
 8005214:	2400000c 	.word	0x2400000c

08005218 <HAL_IncTick>:
 * @note This function is declared as __weak to be overwritten in case of other
  *      implementations in user file.
  * @retval None
  */
__weak void HAL_IncTick(void)
{
 8005218:	b480      	push	{r7}
 800521a:	af00      	add	r7, sp, #0
  uwTick += (uint32_t)uwTickFreq;
 800521c:	4b06      	ldr	r3, [pc, #24]	@ (8005238 <HAL_IncTick+0x20>)
 800521e:	781b      	ldrb	r3, [r3, #0]
 8005220:	461a      	mov	r2, r3
 8005222:	4b06      	ldr	r3, [pc, #24]	@ (800523c <HAL_IncTick+0x24>)
 8005224:	681b      	ldr	r3, [r3, #0]
 8005226:	4413      	add	r3, r2
 8005228:	4a04      	ldr	r2, [pc, #16]	@ (800523c <HAL_IncTick+0x24>)
 800522a:	6013      	str	r3, [r2, #0]
}
 800522c:	bf00      	nop
 800522e:	46bd      	mov	sp, r7
 8005230:	f85d 7b04 	ldr.w	r7, [sp], #4
 8005234:	4770      	bx	lr
 8005236:	bf00      	nop
 8005238:	24000030 	.word	0x24000030
 800523c:	24002240 	.word	0x24002240

08005240 <HAL_GetTick>:
  * @note This function is declared as __weak to be overwritten in case of other
  *       implementations in user file.
  * @retval tick value
  */
__weak uint32_t HAL_GetTick(void)
{
 8005240:	b480      	push	{r7}
 8005242:	af00      	add	r7, sp, #0
  return uwTick;
 8005244:	4b03      	ldr	r3, [pc, #12]	@ (8005254 <HAL_GetTick+0x14>)
 8005246:	681b      	ldr	r3, [r3, #0]
}
 8005248:	4618      	mov	r0, r3
 800524a:	46bd      	mov	sp, r7
 800524c:	f85d 7b04 	ldr.w	r7, [sp], #4
 8005250:	4770      	bx	lr
 8005252:	bf00      	nop
 8005254:	24002240 	.word	0x24002240

08005258 <HAL_Delay>:
  *       implementations in user file.
  * @param Delay  specifies the delay time length, in milliseconds.
  * @retval None
  */
__weak void HAL_Delay(uint32_t Delay)
{
 8005258:	b580      	push	{r7, lr}
 800525a:	b084      	sub	sp, #16
 800525c:	af00      	add	r7, sp, #0
 800525e:	6078      	str	r0, [r7, #4]
  uint32_t tickstart = HAL_GetTick();
 8005260:	f7ff ffee 	bl	8005240 <HAL_GetTick>
 8005264:	60b8      	str	r0, [r7, #8]
  uint32_t wait = Delay;
 8005266:	687b      	ldr	r3, [r7, #4]
 8005268:	60fb      	str	r3, [r7, #12]

  /* Add a freq to guarantee minimum wait */
  if (wait < HAL_MAX_DELAY)
 800526a:	68fb      	ldr	r3, [r7, #12]
 800526c:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8005270:	d005      	beq.n	800527e <HAL_Delay+0x26>
  {
    wait += (uint32_t)(uwTickFreq);
 8005272:	4b0a      	ldr	r3, [pc, #40]	@ (800529c <HAL_Delay+0x44>)
 8005274:	781b      	ldrb	r3, [r3, #0]
 8005276:	461a      	mov	r2, r3
 8005278:	68fb      	ldr	r3, [r7, #12]
 800527a:	4413      	add	r3, r2
 800527c:	60fb      	str	r3, [r7, #12]
  }

  while ((HAL_GetTick() - tickstart) < wait)
 800527e:	bf00      	nop
 8005280:	f7ff ffde 	bl	8005240 <HAL_GetTick>
 8005284:	4602      	mov	r2, r0
 8005286:	68bb      	ldr	r3, [r7, #8]
 8005288:	1ad3      	subs	r3, r2, r3
 800528a:	68fa      	ldr	r2, [r7, #12]
 800528c:	429a      	cmp	r2, r3
 800528e:	d8f7      	bhi.n	8005280 <HAL_Delay+0x28>
  {
  }
}
 8005290:	bf00      	nop
 8005292:	bf00      	nop
 8005294:	3710      	adds	r7, #16
 8005296:	46bd      	mov	sp, r7
 8005298:	bd80      	pop	{r7, pc}
 800529a:	bf00      	nop
 800529c:	24000030 	.word	0x24000030

080052a0 <HAL_GetREVID>:
/**
  * @brief  Returns the device revision identifier.
  * @retval Device revision identifier
  */
uint32_t HAL_GetREVID(void)
{
 80052a0:	b480      	push	{r7}
 80052a2:	af00      	add	r7, sp, #0
   return((DBGMCU->IDCODE) >> 16);
 80052a4:	4b03      	ldr	r3, [pc, #12]	@ (80052b4 <HAL_GetREVID+0x14>)
 80052a6:	681b      	ldr	r3, [r3, #0]
 80052a8:	0c1b      	lsrs	r3, r3, #16
}
 80052aa:	4618      	mov	r0, r3
 80052ac:	46bd      	mov	sp, r7
 80052ae:	f85d 7b04 	ldr.w	r7, [sp], #4
 80052b2:	4770      	bx	lr
 80052b4:	5c001000 	.word	0x5c001000

080052b8 <HAL_SYSCFG_ETHInterfaceSelect>:
  *   @arg SYSCFG_ETH_MII : Select the Media Independent Interface
  *   @arg SYSCFG_ETH_RMII: Select the Reduced Media Independent Interface
  * @retval None
  */
void HAL_SYSCFG_ETHInterfaceSelect(uint32_t SYSCFG_ETHInterface)
{
 80052b8:	b480      	push	{r7}
 80052ba:	b083      	sub	sp, #12
 80052bc:	af00      	add	r7, sp, #0
 80052be:	6078      	str	r0, [r7, #4]
  /* Check the parameter */
  assert_param(IS_SYSCFG_ETHERNET_CONFIG(SYSCFG_ETHInterface));

  MODIFY_REG(SYSCFG->PMCR, SYSCFG_PMCR_EPIS_SEL, (uint32_t)(SYSCFG_ETHInterface));
 80052c0:	4b06      	ldr	r3, [pc, #24]	@ (80052dc <HAL_SYSCFG_ETHInterfaceSelect+0x24>)
 80052c2:	685b      	ldr	r3, [r3, #4]
 80052c4:	f423 0260 	bic.w	r2, r3, #14680064	@ 0xe00000
 80052c8:	4904      	ldr	r1, [pc, #16]	@ (80052dc <HAL_SYSCFG_ETHInterfaceSelect+0x24>)
 80052ca:	687b      	ldr	r3, [r7, #4]
 80052cc:	4313      	orrs	r3, r2
 80052ce:	604b      	str	r3, [r1, #4]
}
 80052d0:	bf00      	nop
 80052d2:	370c      	adds	r7, #12
 80052d4:	46bd      	mov	sp, r7
 80052d6:	f85d 7b04 	ldr.w	r7, [sp], #4
 80052da:	4770      	bx	lr
 80052dc:	58000400 	.word	0x58000400

080052e0 <__NVIC_SetPriorityGrouping>:
{
 80052e0:	b480      	push	{r7}
 80052e2:	b085      	sub	sp, #20
 80052e4:	af00      	add	r7, sp, #0
 80052e6:	6078      	str	r0, [r7, #4]
  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */
 80052e8:	687b      	ldr	r3, [r7, #4]
 80052ea:	f003 0307 	and.w	r3, r3, #7
 80052ee:	60fb      	str	r3, [r7, #12]
  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
 80052f0:	4b0b      	ldr	r3, [pc, #44]	@ (8005320 <__NVIC_SetPriorityGrouping+0x40>)
 80052f2:	68db      	ldr	r3, [r3, #12]
 80052f4:	60bb      	str	r3, [r7, #8]
  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
 80052f6:	68ba      	ldr	r2, [r7, #8]
 80052f8:	f64f 03ff 	movw	r3, #63743	@ 0xf8ff
 80052fc:	4013      	ands	r3, r2
 80052fe:	60bb      	str	r3, [r7, #8]
                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos)  );              /* Insert write key and priority group */
 8005300:	68fb      	ldr	r3, [r7, #12]
 8005302:	021a      	lsls	r2, r3, #8
                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
 8005304:	68bb      	ldr	r3, [r7, #8]
 8005306:	431a      	orrs	r2, r3
  reg_value  =  (reg_value                                   |
 8005308:	4b06      	ldr	r3, [pc, #24]	@ (8005324 <__NVIC_SetPriorityGrouping+0x44>)
 800530a:	4313      	orrs	r3, r2
 800530c:	60bb      	str	r3, [r7, #8]
  SCB->AIRCR =  reg_value;
 800530e:	4a04      	ldr	r2, [pc, #16]	@ (8005320 <__NVIC_SetPriorityGrouping+0x40>)
 8005310:	68bb      	ldr	r3, [r7, #8]
 8005312:	60d3      	str	r3, [r2, #12]
}
 8005314:	bf00      	nop
 8005316:	3714      	adds	r7, #20
 8005318:	46bd      	mov	sp, r7
 800531a:	f85d 7b04 	ldr.w	r7, [sp], #4
 800531e:	4770      	bx	lr
 8005320:	e000ed00 	.word	0xe000ed00
 8005324:	05fa0000 	.word	0x05fa0000

08005328 <__NVIC_GetPriorityGrouping>:
{
 8005328:	b480      	push	{r7}
 800532a:	af00      	add	r7, sp, #0
  return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
 800532c:	4b04      	ldr	r3, [pc, #16]	@ (8005340 <__NVIC_GetPriorityGrouping+0x18>)
 800532e:	68db      	ldr	r3, [r3, #12]
 8005330:	0a1b      	lsrs	r3, r3, #8
 8005332:	f003 0307 	and.w	r3, r3, #7
}
 8005336:	4618      	mov	r0, r3
 8005338:	46bd      	mov	sp, r7
 800533a:	f85d 7b04 	ldr.w	r7, [sp], #4
 800533e:	4770      	bx	lr
 8005340:	e000ed00 	.word	0xe000ed00

08005344 <__NVIC_EnableIRQ>:
{
 8005344:	b480      	push	{r7}
 8005346:	b083      	sub	sp, #12
 8005348:	af00      	add	r7, sp, #0
 800534a:	4603      	mov	r3, r0
 800534c:	80fb      	strh	r3, [r7, #6]
  if ((int32_t)(IRQn) >= 0)
 800534e:	f9b7 3006 	ldrsh.w	r3, [r7, #6]
 8005352:	2b00      	cmp	r3, #0
 8005354:	db0b      	blt.n	800536e <__NVIC_EnableIRQ+0x2a>
    NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
 8005356:	88fb      	ldrh	r3, [r7, #6]
 8005358:	f003 021f 	and.w	r2, r3, #31
 800535c:	4907      	ldr	r1, [pc, #28]	@ (800537c <__NVIC_EnableIRQ+0x38>)
 800535e:	f9b7 3006 	ldrsh.w	r3, [r7, #6]
 8005362:	095b      	lsrs	r3, r3, #5
 8005364:	2001      	movs	r0, #1
 8005366:	fa00 f202 	lsl.w	r2, r0, r2
 800536a:	f841 2023 	str.w	r2, [r1, r3, lsl #2]
}
 800536e:	bf00      	nop
 8005370:	370c      	adds	r7, #12
 8005372:	46bd      	mov	sp, r7
 8005374:	f85d 7b04 	ldr.w	r7, [sp], #4
 8005378:	4770      	bx	lr
 800537a:	bf00      	nop
 800537c:	e000e100 	.word	0xe000e100

08005380 <__NVIC_SetPriority>:
{
 8005380:	b480      	push	{r7}
 8005382:	b083      	sub	sp, #12
 8005384:	af00      	add	r7, sp, #0
 8005386:	4603      	mov	r3, r0
 8005388:	6039      	str	r1, [r7, #0]
 800538a:	80fb      	strh	r3, [r7, #6]
  if ((int32_t)(IRQn) >= 0)
 800538c:	f9b7 3006 	ldrsh.w	r3, [r7, #6]
 8005390:	2b00      	cmp	r3, #0
 8005392:	db0a      	blt.n	80053aa <__NVIC_SetPriority+0x2a>
    NVIC->IP[((uint32_t)IRQn)]                = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 8005394:	683b      	ldr	r3, [r7, #0]
 8005396:	b2da      	uxtb	r2, r3
 8005398:	490c      	ldr	r1, [pc, #48]	@ (80053cc <__NVIC_SetPriority+0x4c>)
 800539a:	f9b7 3006 	ldrsh.w	r3, [r7, #6]
 800539e:	0112      	lsls	r2, r2, #4
 80053a0:	b2d2      	uxtb	r2, r2
 80053a2:	440b      	add	r3, r1
 80053a4:	f883 2300 	strb.w	r2, [r3, #768]	@ 0x300
}
 80053a8:	e00a      	b.n	80053c0 <__NVIC_SetPriority+0x40>
    SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 80053aa:	683b      	ldr	r3, [r7, #0]
 80053ac:	b2da      	uxtb	r2, r3
 80053ae:	4908      	ldr	r1, [pc, #32]	@ (80053d0 <__NVIC_SetPriority+0x50>)
 80053b0:	88fb      	ldrh	r3, [r7, #6]
 80053b2:	f003 030f 	and.w	r3, r3, #15
 80053b6:	3b04      	subs	r3, #4
 80053b8:	0112      	lsls	r2, r2, #4
 80053ba:	b2d2      	uxtb	r2, r2
 80053bc:	440b      	add	r3, r1
 80053be:	761a      	strb	r2, [r3, #24]
}
 80053c0:	bf00      	nop
 80053c2:	370c      	adds	r7, #12
 80053c4:	46bd      	mov	sp, r7
 80053c6:	f85d 7b04 	ldr.w	r7, [sp], #4
 80053ca:	4770      	bx	lr
 80053cc:	e000e100 	.word	0xe000e100
 80053d0:	e000ed00 	.word	0xe000ed00

080053d4 <NVIC_EncodePriority>:
{
 80053d4:	b480      	push	{r7}
 80053d6:	b089      	sub	sp, #36	@ 0x24
 80053d8:	af00      	add	r7, sp, #0
 80053da:	60f8      	str	r0, [r7, #12]
 80053dc:	60b9      	str	r1, [r7, #8]
 80053de:	607a      	str	r2, [r7, #4]
  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
 80053e0:	68fb      	ldr	r3, [r7, #12]
 80053e2:	f003 0307 	and.w	r3, r3, #7
 80053e6:	61fb      	str	r3, [r7, #28]
  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
 80053e8:	69fb      	ldr	r3, [r7, #28]
 80053ea:	f1c3 0307 	rsb	r3, r3, #7
 80053ee:	2b04      	cmp	r3, #4
 80053f0:	bf28      	it	cs
 80053f2:	2304      	movcs	r3, #4
 80053f4:	61bb      	str	r3, [r7, #24]
  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
 80053f6:	69fb      	ldr	r3, [r7, #28]
 80053f8:	3304      	adds	r3, #4
 80053fa:	2b06      	cmp	r3, #6
 80053fc:	d902      	bls.n	8005404 <NVIC_EncodePriority+0x30>
 80053fe:	69fb      	ldr	r3, [r7, #28]
 8005400:	3b03      	subs	r3, #3
 8005402:	e000      	b.n	8005406 <NVIC_EncodePriority+0x32>
 8005404:	2300      	movs	r3, #0
 8005406:	617b      	str	r3, [r7, #20]
           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
 8005408:	f04f 32ff 	mov.w	r2, #4294967295	@ 0xffffffff
 800540c:	69bb      	ldr	r3, [r7, #24]
 800540e:	fa02 f303 	lsl.w	r3, r2, r3
 8005412:	43da      	mvns	r2, r3
 8005414:	68bb      	ldr	r3, [r7, #8]
 8005416:	401a      	ands	r2, r3
 8005418:	697b      	ldr	r3, [r7, #20]
 800541a:	409a      	lsls	r2, r3
           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
 800541c:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 8005420:	697b      	ldr	r3, [r7, #20]
 8005422:	fa01 f303 	lsl.w	r3, r1, r3
 8005426:	43d9      	mvns	r1, r3
 8005428:	687b      	ldr	r3, [r7, #4]
 800542a:	400b      	ands	r3, r1
           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
 800542c:	4313      	orrs	r3, r2
}
 800542e:	4618      	mov	r0, r3
 8005430:	3724      	adds	r7, #36	@ 0x24
 8005432:	46bd      	mov	sp, r7
 8005434:	f85d 7b04 	ldr.w	r7, [sp], #4
 8005438:	4770      	bx	lr

0800543a <HAL_NVIC_SetPriorityGrouping>:
  * @note   When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible.
  *         The pending IRQ priority will be managed only by the subpriority.
  * @retval None
  */
void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
 800543a:	b580      	push	{r7, lr}
 800543c:	b082      	sub	sp, #8
 800543e:	af00      	add	r7, sp, #0
 8005440:	6078      	str	r0, [r7, #4]
  /* Check the parameters */
  assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));

  /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */
  NVIC_SetPriorityGrouping(PriorityGroup);
 8005442:	6878      	ldr	r0, [r7, #4]
 8005444:	f7ff ff4c 	bl	80052e0 <__NVIC_SetPriorityGrouping>
}
 8005448:	bf00      	nop
 800544a:	3708      	adds	r7, #8
 800544c:	46bd      	mov	sp, r7
 800544e:	bd80      	pop	{r7, pc}

08005450 <HAL_NVIC_SetPriority>:
  *         This parameter can be a value between 0 and 15
  *         A lower priority value indicates a higher priority.
  * @retval None
  */
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
{
 8005450:	b580      	push	{r7, lr}
 8005452:	b086      	sub	sp, #24
 8005454:	af00      	add	r7, sp, #0
 8005456:	4603      	mov	r3, r0
 8005458:	60b9      	str	r1, [r7, #8]
 800545a:	607a      	str	r2, [r7, #4]
 800545c:	81fb      	strh	r3, [r7, #14]

  /* Check the parameters */
  assert_param(IS_NVIC_SUB_PRIORITY(SubPriority));
  assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));

  prioritygroup = NVIC_GetPriorityGrouping();
 800545e:	f7ff ff63 	bl	8005328 <__NVIC_GetPriorityGrouping>
 8005462:	6178      	str	r0, [r7, #20]

  NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority));
 8005464:	687a      	ldr	r2, [r7, #4]
 8005466:	68b9      	ldr	r1, [r7, #8]
 8005468:	6978      	ldr	r0, [r7, #20]
 800546a:	f7ff ffb3 	bl	80053d4 <NVIC_EncodePriority>
 800546e:	4602      	mov	r2, r0
 8005470:	f9b7 300e 	ldrsh.w	r3, [r7, #14]
 8005474:	4611      	mov	r1, r2
 8005476:	4618      	mov	r0, r3
 8005478:	f7ff ff82 	bl	8005380 <__NVIC_SetPriority>
}
 800547c:	bf00      	nop
 800547e:	3718      	adds	r7, #24
 8005480:	46bd      	mov	sp, r7
 8005482:	bd80      	pop	{r7, pc}

08005484 <HAL_NVIC_EnableIRQ>:
  *         This parameter can be an enumerator of IRQn_Type enumeration
  *         (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32h7xxxx.h))
  * @retval None
  */
void HAL_NVIC_EnableIRQ(IRQn_Type IRQn)
{
 8005484:	b580      	push	{r7, lr}
 8005486:	b082      	sub	sp, #8
 8005488:	af00      	add	r7, sp, #0
 800548a:	4603      	mov	r3, r0
 800548c:	80fb      	strh	r3, [r7, #6]
  /* Check the parameters */
  assert_param(IS_NVIC_DEVICE_IRQ(IRQn));

  /* Enable interrupt */
  NVIC_EnableIRQ(IRQn);
 800548e:	f9b7 3006 	ldrsh.w	r3, [r7, #6]
 8005492:	4618      	mov	r0, r3
 8005494:	f7ff ff56 	bl	8005344 <__NVIC_EnableIRQ>
}
 8005498:	bf00      	nop
 800549a:	3708      	adds	r7, #8
 800549c:	46bd      	mov	sp, r7
 800549e:	bd80      	pop	{r7, pc}

080054a0 <HAL_MPU_Disable>:
/**
  * @brief  Disables the MPU
  * @retval None
  */
void HAL_MPU_Disable(void)
{
 80054a0:	b480      	push	{r7}
 80054a2:	af00      	add	r7, sp, #0
  \details Ensures the apparent order of the explicit memory operations before
           and after the instruction, without ensuring their completion.
 */
__STATIC_FORCEINLINE void __DMB(void)
{
  __ASM volatile ("dmb 0xF":::"memory");
 80054a4:	f3bf 8f5f 	dmb	sy
}
 80054a8:	bf00      	nop
  /* Make sure outstanding transfers are done */
  __DMB();

  /* Disable fault exceptions */
  SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
 80054aa:	4b07      	ldr	r3, [pc, #28]	@ (80054c8 <HAL_MPU_Disable+0x28>)
 80054ac:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 80054ae:	4a06      	ldr	r2, [pc, #24]	@ (80054c8 <HAL_MPU_Disable+0x28>)
 80054b0:	f423 3380 	bic.w	r3, r3, #65536	@ 0x10000
 80054b4:	6253      	str	r3, [r2, #36]	@ 0x24

  /* Disable the MPU and clear the control register*/
  MPU->CTRL = 0;
 80054b6:	4b05      	ldr	r3, [pc, #20]	@ (80054cc <HAL_MPU_Disable+0x2c>)
 80054b8:	2200      	movs	r2, #0
 80054ba:	605a      	str	r2, [r3, #4]
}
 80054bc:	bf00      	nop
 80054be:	46bd      	mov	sp, r7
 80054c0:	f85d 7b04 	ldr.w	r7, [sp], #4
 80054c4:	4770      	bx	lr
 80054c6:	bf00      	nop
 80054c8:	e000ed00 	.word	0xe000ed00
 80054cc:	e000ed90 	.word	0xe000ed90

080054d0 <HAL_MPU_Enable>:
  *            @arg MPU_PRIVILEGED_DEFAULT
  *            @arg MPU_HFNMI_PRIVDEF
  * @retval None
  */
void HAL_MPU_Enable(uint32_t MPU_Control)
{
 80054d0:	b480      	push	{r7}
 80054d2:	b083      	sub	sp, #12
 80054d4:	af00      	add	r7, sp, #0
 80054d6:	6078      	str	r0, [r7, #4]
  /* Enable the MPU */
  MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
 80054d8:	4a0b      	ldr	r2, [pc, #44]	@ (8005508 <HAL_MPU_Enable+0x38>)
 80054da:	687b      	ldr	r3, [r7, #4]
 80054dc:	f043 0301 	orr.w	r3, r3, #1
 80054e0:	6053      	str	r3, [r2, #4]

  /* Enable fault exceptions */
  SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
 80054e2:	4b0a      	ldr	r3, [pc, #40]	@ (800550c <HAL_MPU_Enable+0x3c>)
 80054e4:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 80054e6:	4a09      	ldr	r2, [pc, #36]	@ (800550c <HAL_MPU_Enable+0x3c>)
 80054e8:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
 80054ec:	6253      	str	r3, [r2, #36]	@ 0x24
  __ASM volatile ("dsb 0xF":::"memory");
 80054ee:	f3bf 8f4f 	dsb	sy
}
 80054f2:	bf00      	nop
  __ASM volatile ("isb 0xF":::"memory");
 80054f4:	f3bf 8f6f 	isb	sy
}
 80054f8:	bf00      	nop

  /* Ensure MPU setting take effects */
  __DSB();
  __ISB();
}
 80054fa:	bf00      	nop
 80054fc:	370c      	adds	r7, #12
 80054fe:	46bd      	mov	sp, r7
 8005500:	f85d 7b04 	ldr.w	r7, [sp], #4
 8005504:	4770      	bx	lr
 8005506:	bf00      	nop
 8005508:	e000ed90 	.word	0xe000ed90
 800550c:	e000ed00 	.word	0xe000ed00

08005510 <HAL_MPU_ConfigRegion>:
  * @param MPU_Init Pointer to a MPU_Region_InitTypeDef structure that contains
  *                the initialization and configuration information.
  * @retval None
  */
void HAL_MPU_ConfigRegion(MPU_Region_InitTypeDef *MPU_Init)
{
 8005510:	b480      	push	{r7}
 8005512:	b083      	sub	sp, #12
 8005514:	af00      	add	r7, sp, #0
 8005516:	6078      	str	r0, [r7, #4]
  assert_param(IS_MPU_ACCESS_BUFFERABLE(MPU_Init->IsBufferable));
  assert_param(IS_MPU_SUB_REGION_DISABLE(MPU_Init->SubRegionDisable));
  assert_param(IS_MPU_REGION_SIZE(MPU_Init->Size));

  /* Set the Region number */
  MPU->RNR = MPU_Init->Number;
 8005518:	687b      	ldr	r3, [r7, #4]
 800551a:	785a      	ldrb	r2, [r3, #1]
 800551c:	4b1b      	ldr	r3, [pc, #108]	@ (800558c <HAL_MPU_ConfigRegion+0x7c>)
 800551e:	609a      	str	r2, [r3, #8]

  /* Disable the Region */
  CLEAR_BIT(MPU->RASR, MPU_RASR_ENABLE_Msk);
 8005520:	4b1a      	ldr	r3, [pc, #104]	@ (800558c <HAL_MPU_ConfigRegion+0x7c>)
 8005522:	691b      	ldr	r3, [r3, #16]
 8005524:	4a19      	ldr	r2, [pc, #100]	@ (800558c <HAL_MPU_ConfigRegion+0x7c>)
 8005526:	f023 0301 	bic.w	r3, r3, #1
 800552a:	6113      	str	r3, [r2, #16]

  /* Apply configuration */
  MPU->RBAR = MPU_Init->BaseAddress;
 800552c:	4a17      	ldr	r2, [pc, #92]	@ (800558c <HAL_MPU_ConfigRegion+0x7c>)
 800552e:	687b      	ldr	r3, [r7, #4]
 8005530:	685b      	ldr	r3, [r3, #4]
 8005532:	60d3      	str	r3, [r2, #12]
  MPU->RASR = ((uint32_t)MPU_Init->DisableExec             << MPU_RASR_XN_Pos)   |
 8005534:	687b      	ldr	r3, [r7, #4]
 8005536:	7b1b      	ldrb	r3, [r3, #12]
 8005538:	071a      	lsls	r2, r3, #28
              ((uint32_t)MPU_Init->AccessPermission        << MPU_RASR_AP_Pos)   |
 800553a:	687b      	ldr	r3, [r7, #4]
 800553c:	7adb      	ldrb	r3, [r3, #11]
 800553e:	061b      	lsls	r3, r3, #24
  MPU->RASR = ((uint32_t)MPU_Init->DisableExec             << MPU_RASR_XN_Pos)   |
 8005540:	431a      	orrs	r2, r3
              ((uint32_t)MPU_Init->TypeExtField            << MPU_RASR_TEX_Pos)  |
 8005542:	687b      	ldr	r3, [r7, #4]
 8005544:	7a9b      	ldrb	r3, [r3, #10]
 8005546:	04db      	lsls	r3, r3, #19
              ((uint32_t)MPU_Init->AccessPermission        << MPU_RASR_AP_Pos)   |
 8005548:	431a      	orrs	r2, r3
              ((uint32_t)MPU_Init->IsShareable             << MPU_RASR_S_Pos)    |
 800554a:	687b      	ldr	r3, [r7, #4]
 800554c:	7b5b      	ldrb	r3, [r3, #13]
 800554e:	049b      	lsls	r3, r3, #18
              ((uint32_t)MPU_Init->TypeExtField            << MPU_RASR_TEX_Pos)  |
 8005550:	431a      	orrs	r2, r3
              ((uint32_t)MPU_Init->IsCacheable             << MPU_RASR_C_Pos)    |
 8005552:	687b      	ldr	r3, [r7, #4]
 8005554:	7b9b      	ldrb	r3, [r3, #14]
 8005556:	045b      	lsls	r3, r3, #17
              ((uint32_t)MPU_Init->IsShareable             << MPU_RASR_S_Pos)    |
 8005558:	431a      	orrs	r2, r3
              ((uint32_t)MPU_Init->IsBufferable            << MPU_RASR_B_Pos)    |
 800555a:	687b      	ldr	r3, [r7, #4]
 800555c:	7bdb      	ldrb	r3, [r3, #15]
 800555e:	041b      	lsls	r3, r3, #16
              ((uint32_t)MPU_Init->IsCacheable             << MPU_RASR_C_Pos)    |
 8005560:	431a      	orrs	r2, r3
              ((uint32_t)MPU_Init->SubRegionDisable        << MPU_RASR_SRD_Pos)  |
 8005562:	687b      	ldr	r3, [r7, #4]
 8005564:	7a5b      	ldrb	r3, [r3, #9]
 8005566:	021b      	lsls	r3, r3, #8
              ((uint32_t)MPU_Init->IsBufferable            << MPU_RASR_B_Pos)    |
 8005568:	431a      	orrs	r2, r3
              ((uint32_t)MPU_Init->Size                    << MPU_RASR_SIZE_Pos) |
 800556a:	687b      	ldr	r3, [r7, #4]
 800556c:	7a1b      	ldrb	r3, [r3, #8]
 800556e:	005b      	lsls	r3, r3, #1
              ((uint32_t)MPU_Init->SubRegionDisable        << MPU_RASR_SRD_Pos)  |
 8005570:	4313      	orrs	r3, r2
              ((uint32_t)MPU_Init->Enable                  << MPU_RASR_ENABLE_Pos);
 8005572:	687a      	ldr	r2, [r7, #4]
 8005574:	7812      	ldrb	r2, [r2, #0]
 8005576:	4611      	mov	r1, r2
  MPU->RASR = ((uint32_t)MPU_Init->DisableExec             << MPU_RASR_XN_Pos)   |
 8005578:	4a04      	ldr	r2, [pc, #16]	@ (800558c <HAL_MPU_ConfigRegion+0x7c>)
              ((uint32_t)MPU_Init->Size                    << MPU_RASR_SIZE_Pos) |
 800557a:	430b      	orrs	r3, r1
  MPU->RASR = ((uint32_t)MPU_Init->DisableExec             << MPU_RASR_XN_Pos)   |
 800557c:	6113      	str	r3, [r2, #16]
}
 800557e:	bf00      	nop
 8005580:	370c      	adds	r7, #12
 8005582:	46bd      	mov	sp, r7
 8005584:	f85d 7b04 	ldr.w	r7, [sp], #4
 8005588:	4770      	bx	lr
 800558a:	bf00      	nop
 800558c:	e000ed90 	.word	0xe000ed90

08005590 <HAL_CRC_Init>:
  *         parameters in the CRC_InitTypeDef and create the associated handle.
  * @param  hcrc CRC handle
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_CRC_Init(CRC_HandleTypeDef *hcrc)
{
 8005590:	b580      	push	{r7, lr}
 8005592:	b082      	sub	sp, #8
 8005594:	af00      	add	r7, sp, #0
 8005596:	6078      	str	r0, [r7, #4]
  /* Check the CRC handle allocation */
  if (hcrc == NULL)
 8005598:	687b      	ldr	r3, [r7, #4]
 800559a:	2b00      	cmp	r3, #0
 800559c:	d101      	bne.n	80055a2 <HAL_CRC_Init+0x12>
  {
    return HAL_ERROR;
 800559e:	2301      	movs	r3, #1
 80055a0:	e054      	b.n	800564c <HAL_CRC_Init+0xbc>
  }

  /* Check the parameters */
  assert_param(IS_CRC_ALL_INSTANCE(hcrc->Instance));

  if (hcrc->State == HAL_CRC_STATE_RESET)
 80055a2:	687b      	ldr	r3, [r7, #4]
 80055a4:	7f5b      	ldrb	r3, [r3, #29]
 80055a6:	b2db      	uxtb	r3, r3
 80055a8:	2b00      	cmp	r3, #0
 80055aa:	d105      	bne.n	80055b8 <HAL_CRC_Init+0x28>
  {
    /* Allocate lock resource and initialize it */
    hcrc->Lock = HAL_UNLOCKED;
 80055ac:	687b      	ldr	r3, [r7, #4]
 80055ae:	2200      	movs	r2, #0
 80055b0:	771a      	strb	r2, [r3, #28]
    /* Init the low level hardware */
    HAL_CRC_MspInit(hcrc);
 80055b2:	6878      	ldr	r0, [r7, #4]
 80055b4:	f7fd ffd4 	bl	8003560 <HAL_CRC_MspInit>
  }

  hcrc->State = HAL_CRC_STATE_BUSY;
 80055b8:	687b      	ldr	r3, [r7, #4]
 80055ba:	2202      	movs	r2, #2
 80055bc:	775a      	strb	r2, [r3, #29]

  /* check whether or not non-default generating polynomial has been
   * picked up by user */
  assert_param(IS_DEFAULT_POLYNOMIAL(hcrc->Init.DefaultPolynomialUse));
  if (hcrc->Init.DefaultPolynomialUse == DEFAULT_POLYNOMIAL_ENABLE)
 80055be:	687b      	ldr	r3, [r7, #4]
 80055c0:	791b      	ldrb	r3, [r3, #4]
 80055c2:	2b00      	cmp	r3, #0
 80055c4:	d10c      	bne.n	80055e0 <HAL_CRC_Init+0x50>
  {
    /* initialize peripheral with default generating polynomial */
    WRITE_REG(hcrc->Instance->POL, DEFAULT_CRC32_POLY);
 80055c6:	687b      	ldr	r3, [r7, #4]
 80055c8:	681b      	ldr	r3, [r3, #0]
 80055ca:	4a22      	ldr	r2, [pc, #136]	@ (8005654 <HAL_CRC_Init+0xc4>)
 80055cc:	615a      	str	r2, [r3, #20]
    MODIFY_REG(hcrc->Instance->CR, CRC_CR_POLYSIZE, CRC_POLYLENGTH_32B);
 80055ce:	687b      	ldr	r3, [r7, #4]
 80055d0:	681b      	ldr	r3, [r3, #0]
 80055d2:	689a      	ldr	r2, [r3, #8]
 80055d4:	687b      	ldr	r3, [r7, #4]
 80055d6:	681b      	ldr	r3, [r3, #0]
 80055d8:	f022 0218 	bic.w	r2, r2, #24
 80055dc:	609a      	str	r2, [r3, #8]
 80055de:	e00c      	b.n	80055fa <HAL_CRC_Init+0x6a>
  }
  else
  {
    /* initialize CRC peripheral with generating polynomial defined by user */
    if (HAL_CRCEx_Polynomial_Set(hcrc, hcrc->Init.GeneratingPolynomial, hcrc->Init.CRCLength) != HAL_OK)
 80055e0:	687b      	ldr	r3, [r7, #4]
 80055e2:	6899      	ldr	r1, [r3, #8]
 80055e4:	687b      	ldr	r3, [r7, #4]
 80055e6:	68db      	ldr	r3, [r3, #12]
 80055e8:	461a      	mov	r2, r3
 80055ea:	6878      	ldr	r0, [r7, #4]
 80055ec:	f000 f948 	bl	8005880 <HAL_CRCEx_Polynomial_Set>
 80055f0:	4603      	mov	r3, r0
 80055f2:	2b00      	cmp	r3, #0
 80055f4:	d001      	beq.n	80055fa <HAL_CRC_Init+0x6a>
    {
      return HAL_ERROR;
 80055f6:	2301      	movs	r3, #1
 80055f8:	e028      	b.n	800564c <HAL_CRC_Init+0xbc>
  }

  /* check whether or not non-default CRC initial value has been
   * picked up by user */
  assert_param(IS_DEFAULT_INIT_VALUE(hcrc->Init.DefaultInitValueUse));
  if (hcrc->Init.DefaultInitValueUse == DEFAULT_INIT_VALUE_ENABLE)
 80055fa:	687b      	ldr	r3, [r7, #4]
 80055fc:	795b      	ldrb	r3, [r3, #5]
 80055fe:	2b00      	cmp	r3, #0
 8005600:	d105      	bne.n	800560e <HAL_CRC_Init+0x7e>
  {
    WRITE_REG(hcrc->Instance->INIT, DEFAULT_CRC_INITVALUE);
 8005602:	687b      	ldr	r3, [r7, #4]
 8005604:	681b      	ldr	r3, [r3, #0]
 8005606:	f04f 32ff 	mov.w	r2, #4294967295	@ 0xffffffff
 800560a:	611a      	str	r2, [r3, #16]
 800560c:	e004      	b.n	8005618 <HAL_CRC_Init+0x88>
  }
  else
  {
    WRITE_REG(hcrc->Instance->INIT, hcrc->Init.InitValue);
 800560e:	687b      	ldr	r3, [r7, #4]
 8005610:	681b      	ldr	r3, [r3, #0]
 8005612:	687a      	ldr	r2, [r7, #4]
 8005614:	6912      	ldr	r2, [r2, #16]
 8005616:	611a      	str	r2, [r3, #16]
  }


  /* set input data inversion mode */
  assert_param(IS_CRC_INPUTDATA_INVERSION_MODE(hcrc->Init.InputDataInversionMode));
  MODIFY_REG(hcrc->Instance->CR, CRC_CR_REV_IN, hcrc->Init.InputDataInversionMode);
 8005618:	687b      	ldr	r3, [r7, #4]
 800561a:	681b      	ldr	r3, [r3, #0]
 800561c:	689b      	ldr	r3, [r3, #8]
 800561e:	f023 0160 	bic.w	r1, r3, #96	@ 0x60
 8005622:	687b      	ldr	r3, [r7, #4]
 8005624:	695a      	ldr	r2, [r3, #20]
 8005626:	687b      	ldr	r3, [r7, #4]
 8005628:	681b      	ldr	r3, [r3, #0]
 800562a:	430a      	orrs	r2, r1
 800562c:	609a      	str	r2, [r3, #8]

  /* set output data inversion mode */
  assert_param(IS_CRC_OUTPUTDATA_INVERSION_MODE(hcrc->Init.OutputDataInversionMode));
  MODIFY_REG(hcrc->Instance->CR, CRC_CR_REV_OUT, hcrc->Init.OutputDataInversionMode);
 800562e:	687b      	ldr	r3, [r7, #4]
 8005630:	681b      	ldr	r3, [r3, #0]
 8005632:	689b      	ldr	r3, [r3, #8]
 8005634:	f023 0180 	bic.w	r1, r3, #128	@ 0x80
 8005638:	687b      	ldr	r3, [r7, #4]
 800563a:	699a      	ldr	r2, [r3, #24]
 800563c:	687b      	ldr	r3, [r7, #4]
 800563e:	681b      	ldr	r3, [r3, #0]
 8005640:	430a      	orrs	r2, r1
 8005642:	609a      	str	r2, [r3, #8]
  /* makes sure the input data format (bytes, halfwords or words stream)
   * is properly specified by user */
  assert_param(IS_CRC_INPUTDATA_FORMAT(hcrc->InputDataFormat));

  /* Change CRC peripheral state */
  hcrc->State = HAL_CRC_STATE_READY;
 8005644:	687b      	ldr	r3, [r7, #4]
 8005646:	2201      	movs	r2, #1
 8005648:	775a      	strb	r2, [r3, #29]

  /* Return function status */
  return HAL_OK;
 800564a:	2300      	movs	r3, #0
}
 800564c:	4618      	mov	r0, r3
 800564e:	3708      	adds	r7, #8
 8005650:	46bd      	mov	sp, r7
 8005652:	bd80      	pop	{r7, pc}
 8005654:	04c11db7 	.word	0x04c11db7

08005658 <HAL_CRC_Calculate>:
  *        and the API will internally adjust its input data processing based on the
  *        handle field hcrc->InputDataFormat.
  * @retval uint32_t CRC (returned value LSBs for CRC shorter than 32 bits)
  */
uint32_t HAL_CRC_Calculate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength)
{
 8005658:	b580      	push	{r7, lr}
 800565a:	b086      	sub	sp, #24
 800565c:	af00      	add	r7, sp, #0
 800565e:	60f8      	str	r0, [r7, #12]
 8005660:	60b9      	str	r1, [r7, #8]
 8005662:	607a      	str	r2, [r7, #4]
  uint32_t index;      /* CRC input data buffer index */
  uint32_t temp = 0U;  /* CRC output (read from hcrc->Instance->DR register) */
 8005664:	2300      	movs	r3, #0
 8005666:	613b      	str	r3, [r7, #16]

  /* Change CRC peripheral state */
  hcrc->State = HAL_CRC_STATE_BUSY;
 8005668:	68fb      	ldr	r3, [r7, #12]
 800566a:	2202      	movs	r2, #2
 800566c:	775a      	strb	r2, [r3, #29]

  /* Reset CRC Calculation Unit (hcrc->Instance->INIT is
  *  written in hcrc->Instance->DR) */
  __HAL_CRC_DR_RESET(hcrc);
 800566e:	68fb      	ldr	r3, [r7, #12]
 8005670:	681b      	ldr	r3, [r3, #0]
 8005672:	689a      	ldr	r2, [r3, #8]
 8005674:	68fb      	ldr	r3, [r7, #12]
 8005676:	681b      	ldr	r3, [r3, #0]
 8005678:	f042 0201 	orr.w	r2, r2, #1
 800567c:	609a      	str	r2, [r3, #8]

  switch (hcrc->InputDataFormat)
 800567e:	68fb      	ldr	r3, [r7, #12]
 8005680:	6a1b      	ldr	r3, [r3, #32]
 8005682:	2b03      	cmp	r3, #3
 8005684:	d006      	beq.n	8005694 <HAL_CRC_Calculate+0x3c>
 8005686:	2b03      	cmp	r3, #3
 8005688:	d829      	bhi.n	80056de <HAL_CRC_Calculate+0x86>
 800568a:	2b01      	cmp	r3, #1
 800568c:	d019      	beq.n	80056c2 <HAL_CRC_Calculate+0x6a>
 800568e:	2b02      	cmp	r3, #2
 8005690:	d01e      	beq.n	80056d0 <HAL_CRC_Calculate+0x78>
      /* Specific 16-bit input data handling  */
      temp = CRC_Handle_16(hcrc, (uint16_t *)(void *)pBuffer, BufferLength);    /* Derogation MisraC2012 R.11.5 */
      break;

    default:
      break;
 8005692:	e024      	b.n	80056de <HAL_CRC_Calculate+0x86>
      for (index = 0U; index < BufferLength; index++)
 8005694:	2300      	movs	r3, #0
 8005696:	617b      	str	r3, [r7, #20]
 8005698:	e00a      	b.n	80056b0 <HAL_CRC_Calculate+0x58>
        hcrc->Instance->DR = pBuffer[index];
 800569a:	697b      	ldr	r3, [r7, #20]
 800569c:	009b      	lsls	r3, r3, #2
 800569e:	68ba      	ldr	r2, [r7, #8]
 80056a0:	441a      	add	r2, r3
 80056a2:	68fb      	ldr	r3, [r7, #12]
 80056a4:	681b      	ldr	r3, [r3, #0]
 80056a6:	6812      	ldr	r2, [r2, #0]
 80056a8:	601a      	str	r2, [r3, #0]
      for (index = 0U; index < BufferLength; index++)
 80056aa:	697b      	ldr	r3, [r7, #20]
 80056ac:	3301      	adds	r3, #1
 80056ae:	617b      	str	r3, [r7, #20]
 80056b0:	697a      	ldr	r2, [r7, #20]
 80056b2:	687b      	ldr	r3, [r7, #4]
 80056b4:	429a      	cmp	r2, r3
 80056b6:	d3f0      	bcc.n	800569a <HAL_CRC_Calculate+0x42>
      temp = hcrc->Instance->DR;
 80056b8:	68fb      	ldr	r3, [r7, #12]
 80056ba:	681b      	ldr	r3, [r3, #0]
 80056bc:	681b      	ldr	r3, [r3, #0]
 80056be:	613b      	str	r3, [r7, #16]
      break;
 80056c0:	e00e      	b.n	80056e0 <HAL_CRC_Calculate+0x88>
      temp = CRC_Handle_8(hcrc, (uint8_t *)pBuffer, BufferLength);
 80056c2:	687a      	ldr	r2, [r7, #4]
 80056c4:	68b9      	ldr	r1, [r7, #8]
 80056c6:	68f8      	ldr	r0, [r7, #12]
 80056c8:	f000 f812 	bl	80056f0 <CRC_Handle_8>
 80056cc:	6138      	str	r0, [r7, #16]
      break;
 80056ce:	e007      	b.n	80056e0 <HAL_CRC_Calculate+0x88>
      temp = CRC_Handle_16(hcrc, (uint16_t *)(void *)pBuffer, BufferLength);    /* Derogation MisraC2012 R.11.5 */
 80056d0:	687a      	ldr	r2, [r7, #4]
 80056d2:	68b9      	ldr	r1, [r7, #8]
 80056d4:	68f8      	ldr	r0, [r7, #12]
 80056d6:	f000 f899 	bl	800580c <CRC_Handle_16>
 80056da:	6138      	str	r0, [r7, #16]
      break;
 80056dc:	e000      	b.n	80056e0 <HAL_CRC_Calculate+0x88>
      break;
 80056de:	bf00      	nop
  }

  /* Change CRC peripheral state */
  hcrc->State = HAL_CRC_STATE_READY;
 80056e0:	68fb      	ldr	r3, [r7, #12]
 80056e2:	2201      	movs	r2, #1
 80056e4:	775a      	strb	r2, [r3, #29]

  /* Return the CRC computed value */
  return temp;
 80056e6:	693b      	ldr	r3, [r7, #16]
}
 80056e8:	4618      	mov	r0, r3
 80056ea:	3718      	adds	r7, #24
 80056ec:	46bd      	mov	sp, r7
 80056ee:	bd80      	pop	{r7, pc}

080056f0 <CRC_Handle_8>:
  * @param  pBuffer pointer to the input data buffer
  * @param  BufferLength input data buffer length
  * @retval uint32_t CRC (returned value LSBs for CRC shorter than 32 bits)
  */
static uint32_t CRC_Handle_8(CRC_HandleTypeDef *hcrc, uint8_t pBuffer[], uint32_t BufferLength)
{
 80056f0:	b480      	push	{r7}
 80056f2:	b089      	sub	sp, #36	@ 0x24
 80056f4:	af00      	add	r7, sp, #0
 80056f6:	60f8      	str	r0, [r7, #12]
 80056f8:	60b9      	str	r1, [r7, #8]
 80056fa:	607a      	str	r2, [r7, #4]
  __IO uint16_t *pReg;

  /* Processing time optimization: 4 bytes are entered in a row with a single word write,
   * last bytes must be carefully fed to the CRC calculator to ensure a correct type
   * handling by the peripheral */
  for (i = 0U; i < (BufferLength / 4U); i++)
 80056fc:	2300      	movs	r3, #0
 80056fe:	61fb      	str	r3, [r7, #28]
 8005700:	e023      	b.n	800574a <CRC_Handle_8+0x5a>
  {
    hcrc->Instance->DR = ((uint32_t)pBuffer[4U * i] << 24U) | \
 8005702:	69fb      	ldr	r3, [r7, #28]
 8005704:	009b      	lsls	r3, r3, #2
 8005706:	68ba      	ldr	r2, [r7, #8]
 8005708:	4413      	add	r3, r2
 800570a:	781b      	ldrb	r3, [r3, #0]
 800570c:	061a      	lsls	r2, r3, #24
                         ((uint32_t)pBuffer[(4U * i) + 1U] << 16U) | \
 800570e:	69fb      	ldr	r3, [r7, #28]
 8005710:	009b      	lsls	r3, r3, #2
 8005712:	3301      	adds	r3, #1
 8005714:	68b9      	ldr	r1, [r7, #8]
 8005716:	440b      	add	r3, r1
 8005718:	781b      	ldrb	r3, [r3, #0]
 800571a:	041b      	lsls	r3, r3, #16
    hcrc->Instance->DR = ((uint32_t)pBuffer[4U * i] << 24U) | \
 800571c:	431a      	orrs	r2, r3
                         ((uint32_t)pBuffer[(4U * i) + 2U] << 8U)  | \
 800571e:	69fb      	ldr	r3, [r7, #28]
 8005720:	009b      	lsls	r3, r3, #2
 8005722:	3302      	adds	r3, #2
 8005724:	68b9      	ldr	r1, [r7, #8]
 8005726:	440b      	add	r3, r1
 8005728:	781b      	ldrb	r3, [r3, #0]
 800572a:	021b      	lsls	r3, r3, #8
                         ((uint32_t)pBuffer[(4U * i) + 1U] << 16U) | \
 800572c:	431a      	orrs	r2, r3
                         (uint32_t)pBuffer[(4U * i) + 3U];
 800572e:	69fb      	ldr	r3, [r7, #28]
 8005730:	009b      	lsls	r3, r3, #2
 8005732:	3303      	adds	r3, #3
 8005734:	68b9      	ldr	r1, [r7, #8]
 8005736:	440b      	add	r3, r1
 8005738:	781b      	ldrb	r3, [r3, #0]
 800573a:	4619      	mov	r1, r3
    hcrc->Instance->DR = ((uint32_t)pBuffer[4U * i] << 24U) | \
 800573c:	68fb      	ldr	r3, [r7, #12]
 800573e:	681b      	ldr	r3, [r3, #0]
                         ((uint32_t)pBuffer[(4U * i) + 2U] << 8U)  | \
 8005740:	430a      	orrs	r2, r1
    hcrc->Instance->DR = ((uint32_t)pBuffer[4U * i] << 24U) | \
 8005742:	601a      	str	r2, [r3, #0]
  for (i = 0U; i < (BufferLength / 4U); i++)
 8005744:	69fb      	ldr	r3, [r7, #28]
 8005746:	3301      	adds	r3, #1
 8005748:	61fb      	str	r3, [r7, #28]
 800574a:	687b      	ldr	r3, [r7, #4]
 800574c:	089b      	lsrs	r3, r3, #2
 800574e:	69fa      	ldr	r2, [r7, #28]
 8005750:	429a      	cmp	r2, r3
 8005752:	d3d6      	bcc.n	8005702 <CRC_Handle_8+0x12>
  }
  /* last bytes specific handling */
  if ((BufferLength % 4U) != 0U)
 8005754:	687b      	ldr	r3, [r7, #4]
 8005756:	f003 0303 	and.w	r3, r3, #3
 800575a:	2b00      	cmp	r3, #0
 800575c:	d04d      	beq.n	80057fa <CRC_Handle_8+0x10a>
  {
    if ((BufferLength % 4U) == 1U)
 800575e:	687b      	ldr	r3, [r7, #4]
 8005760:	f003 0303 	and.w	r3, r3, #3
 8005764:	2b01      	cmp	r3, #1
 8005766:	d107      	bne.n	8005778 <CRC_Handle_8+0x88>
    {
      *(__IO uint8_t *)(__IO void *)(&hcrc->Instance->DR) = pBuffer[4U * i];         /* Derogation MisraC2012 R.11.5 */
 8005768:	69fb      	ldr	r3, [r7, #28]
 800576a:	009b      	lsls	r3, r3, #2
 800576c:	68ba      	ldr	r2, [r7, #8]
 800576e:	4413      	add	r3, r2
 8005770:	68fa      	ldr	r2, [r7, #12]
 8005772:	6812      	ldr	r2, [r2, #0]
 8005774:	781b      	ldrb	r3, [r3, #0]
 8005776:	7013      	strb	r3, [r2, #0]
    }
    if ((BufferLength % 4U) == 2U)
 8005778:	687b      	ldr	r3, [r7, #4]
 800577a:	f003 0303 	and.w	r3, r3, #3
 800577e:	2b02      	cmp	r3, #2
 8005780:	d116      	bne.n	80057b0 <CRC_Handle_8+0xc0>
    {
      data = ((uint16_t)(pBuffer[4U * i]) << 8U) | (uint16_t)pBuffer[(4U * i) + 1U];
 8005782:	69fb      	ldr	r3, [r7, #28]
 8005784:	009b      	lsls	r3, r3, #2
 8005786:	68ba      	ldr	r2, [r7, #8]
 8005788:	4413      	add	r3, r2
 800578a:	781b      	ldrb	r3, [r3, #0]
 800578c:	021b      	lsls	r3, r3, #8
 800578e:	b21a      	sxth	r2, r3
 8005790:	69fb      	ldr	r3, [r7, #28]
 8005792:	009b      	lsls	r3, r3, #2
 8005794:	3301      	adds	r3, #1
 8005796:	68b9      	ldr	r1, [r7, #8]
 8005798:	440b      	add	r3, r1
 800579a:	781b      	ldrb	r3, [r3, #0]
 800579c:	b21b      	sxth	r3, r3
 800579e:	4313      	orrs	r3, r2
 80057a0:	b21b      	sxth	r3, r3
 80057a2:	837b      	strh	r3, [r7, #26]
      pReg = (__IO uint16_t *)(__IO void *)(&hcrc->Instance->DR);                    /* Derogation MisraC2012 R.11.5 */
 80057a4:	68fb      	ldr	r3, [r7, #12]
 80057a6:	681b      	ldr	r3, [r3, #0]
 80057a8:	617b      	str	r3, [r7, #20]
      *pReg = data;
 80057aa:	697b      	ldr	r3, [r7, #20]
 80057ac:	8b7a      	ldrh	r2, [r7, #26]
 80057ae:	801a      	strh	r2, [r3, #0]
    }
    if ((BufferLength % 4U) == 3U)
 80057b0:	687b      	ldr	r3, [r7, #4]
 80057b2:	f003 0303 	and.w	r3, r3, #3
 80057b6:	2b03      	cmp	r3, #3
 80057b8:	d11f      	bne.n	80057fa <CRC_Handle_8+0x10a>
    {
      data = ((uint16_t)(pBuffer[4U * i]) << 8U) | (uint16_t)pBuffer[(4U * i) + 1U];
 80057ba:	69fb      	ldr	r3, [r7, #28]
 80057bc:	009b      	lsls	r3, r3, #2
 80057be:	68ba      	ldr	r2, [r7, #8]
 80057c0:	4413      	add	r3, r2
 80057c2:	781b      	ldrb	r3, [r3, #0]
 80057c4:	021b      	lsls	r3, r3, #8
 80057c6:	b21a      	sxth	r2, r3
 80057c8:	69fb      	ldr	r3, [r7, #28]
 80057ca:	009b      	lsls	r3, r3, #2
 80057cc:	3301      	adds	r3, #1
 80057ce:	68b9      	ldr	r1, [r7, #8]
 80057d0:	440b      	add	r3, r1
 80057d2:	781b      	ldrb	r3, [r3, #0]
 80057d4:	b21b      	sxth	r3, r3
 80057d6:	4313      	orrs	r3, r2
 80057d8:	b21b      	sxth	r3, r3
 80057da:	837b      	strh	r3, [r7, #26]
      pReg = (__IO uint16_t *)(__IO void *)(&hcrc->Instance->DR);                    /* Derogation MisraC2012 R.11.5 */
 80057dc:	68fb      	ldr	r3, [r7, #12]
 80057de:	681b      	ldr	r3, [r3, #0]
 80057e0:	617b      	str	r3, [r7, #20]
      *pReg = data;
 80057e2:	697b      	ldr	r3, [r7, #20]
 80057e4:	8b7a      	ldrh	r2, [r7, #26]
 80057e6:	801a      	strh	r2, [r3, #0]

      *(__IO uint8_t *)(__IO void *)(&hcrc->Instance->DR) = pBuffer[(4U * i) + 2U];  /* Derogation MisraC2012 R.11.5 */
 80057e8:	69fb      	ldr	r3, [r7, #28]
 80057ea:	009b      	lsls	r3, r3, #2
 80057ec:	3302      	adds	r3, #2
 80057ee:	68ba      	ldr	r2, [r7, #8]
 80057f0:	4413      	add	r3, r2
 80057f2:	68fa      	ldr	r2, [r7, #12]
 80057f4:	6812      	ldr	r2, [r2, #0]
 80057f6:	781b      	ldrb	r3, [r3, #0]
 80057f8:	7013      	strb	r3, [r2, #0]
    }
  }

  /* Return the CRC computed value */
  return hcrc->Instance->DR;
 80057fa:	68fb      	ldr	r3, [r7, #12]
 80057fc:	681b      	ldr	r3, [r3, #0]
 80057fe:	681b      	ldr	r3, [r3, #0]
}
 8005800:	4618      	mov	r0, r3
 8005802:	3724      	adds	r7, #36	@ 0x24
 8005804:	46bd      	mov	sp, r7
 8005806:	f85d 7b04 	ldr.w	r7, [sp], #4
 800580a:	4770      	bx	lr

0800580c <CRC_Handle_16>:
  * @param  pBuffer pointer to the input data buffer
  * @param  BufferLength input data buffer length
  * @retval uint32_t CRC (returned value LSBs for CRC shorter than 32 bits)
  */
static uint32_t CRC_Handle_16(CRC_HandleTypeDef *hcrc, uint16_t pBuffer[], uint32_t BufferLength)
{
 800580c:	b480      	push	{r7}
 800580e:	b087      	sub	sp, #28
 8005810:	af00      	add	r7, sp, #0
 8005812:	60f8      	str	r0, [r7, #12]
 8005814:	60b9      	str	r1, [r7, #8]
 8005816:	607a      	str	r2, [r7, #4]
  __IO uint16_t *pReg;

  /* Processing time optimization: 2 HalfWords are entered in a row with a single word write,
   * in case of odd length, last HalfWord must be carefully fed to the CRC calculator to ensure
   * a correct type handling by the peripheral */
  for (i = 0U; i < (BufferLength / 2U); i++)
 8005818:	2300      	movs	r3, #0
 800581a:	617b      	str	r3, [r7, #20]
 800581c:	e013      	b.n	8005846 <CRC_Handle_16+0x3a>
  {
    hcrc->Instance->DR = ((uint32_t)pBuffer[2U * i] << 16U) | (uint32_t)pBuffer[(2U * i) + 1U];
 800581e:	697b      	ldr	r3, [r7, #20]
 8005820:	009b      	lsls	r3, r3, #2
 8005822:	68ba      	ldr	r2, [r7, #8]
 8005824:	4413      	add	r3, r2
 8005826:	881b      	ldrh	r3, [r3, #0]
 8005828:	041a      	lsls	r2, r3, #16
 800582a:	697b      	ldr	r3, [r7, #20]
 800582c:	009b      	lsls	r3, r3, #2
 800582e:	3302      	adds	r3, #2
 8005830:	68b9      	ldr	r1, [r7, #8]
 8005832:	440b      	add	r3, r1
 8005834:	881b      	ldrh	r3, [r3, #0]
 8005836:	4619      	mov	r1, r3
 8005838:	68fb      	ldr	r3, [r7, #12]
 800583a:	681b      	ldr	r3, [r3, #0]
 800583c:	430a      	orrs	r2, r1
 800583e:	601a      	str	r2, [r3, #0]
  for (i = 0U; i < (BufferLength / 2U); i++)
 8005840:	697b      	ldr	r3, [r7, #20]
 8005842:	3301      	adds	r3, #1
 8005844:	617b      	str	r3, [r7, #20]
 8005846:	687b      	ldr	r3, [r7, #4]
 8005848:	085b      	lsrs	r3, r3, #1
 800584a:	697a      	ldr	r2, [r7, #20]
 800584c:	429a      	cmp	r2, r3
 800584e:	d3e6      	bcc.n	800581e <CRC_Handle_16+0x12>
  }
  if ((BufferLength % 2U) != 0U)
 8005850:	687b      	ldr	r3, [r7, #4]
 8005852:	f003 0301 	and.w	r3, r3, #1
 8005856:	2b00      	cmp	r3, #0
 8005858:	d009      	beq.n	800586e <CRC_Handle_16+0x62>
  {
    pReg = (__IO uint16_t *)(__IO void *)(&hcrc->Instance->DR);                 /* Derogation MisraC2012 R.11.5 */
 800585a:	68fb      	ldr	r3, [r7, #12]
 800585c:	681b      	ldr	r3, [r3, #0]
 800585e:	613b      	str	r3, [r7, #16]
    *pReg = pBuffer[2U * i];
 8005860:	697b      	ldr	r3, [r7, #20]
 8005862:	009b      	lsls	r3, r3, #2
 8005864:	68ba      	ldr	r2, [r7, #8]
 8005866:	4413      	add	r3, r2
 8005868:	881a      	ldrh	r2, [r3, #0]
 800586a:	693b      	ldr	r3, [r7, #16]
 800586c:	801a      	strh	r2, [r3, #0]
  }

  /* Return the CRC computed value */
  return hcrc->Instance->DR;
 800586e:	68fb      	ldr	r3, [r7, #12]
 8005870:	681b      	ldr	r3, [r3, #0]
 8005872:	681b      	ldr	r3, [r3, #0]
}
 8005874:	4618      	mov	r0, r3
 8005876:	371c      	adds	r7, #28
 8005878:	46bd      	mov	sp, r7
 800587a:	f85d 7b04 	ldr.w	r7, [sp], #4
 800587e:	4770      	bx	lr

08005880 <HAL_CRCEx_Polynomial_Set>:
  *          @arg @ref CRC_POLYLENGTH_16B 16-bit long CRC (generating polynomial of degree 16)
  *          @arg @ref CRC_POLYLENGTH_32B 32-bit long CRC (generating polynomial of degree 32)
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_CRCEx_Polynomial_Set(CRC_HandleTypeDef *hcrc, uint32_t Pol, uint32_t PolyLength)
{
 8005880:	b480      	push	{r7}
 8005882:	b087      	sub	sp, #28
 8005884:	af00      	add	r7, sp, #0
 8005886:	60f8      	str	r0, [r7, #12]
 8005888:	60b9      	str	r1, [r7, #8]
 800588a:	607a      	str	r2, [r7, #4]
  HAL_StatusTypeDef status = HAL_OK;
 800588c:	2300      	movs	r3, #0
 800588e:	75fb      	strb	r3, [r7, #23]
  uint32_t msb = 31U; /* polynomial degree is 32 at most, so msb is initialized to max value */
 8005890:	231f      	movs	r3, #31
 8005892:	613b      	str	r3, [r7, #16]

  /* Check the parameters */
  assert_param(IS_CRC_POL_LENGTH(PolyLength));

  /* Ensure that the generating polynomial is odd */
  if ((Pol & (uint32_t)(0x1U)) ==  0U)
 8005894:	68bb      	ldr	r3, [r7, #8]
 8005896:	f003 0301 	and.w	r3, r3, #1
 800589a:	2b00      	cmp	r3, #0
 800589c:	d102      	bne.n	80058a4 <HAL_CRCEx_Polynomial_Set+0x24>
  {
    status =  HAL_ERROR;
 800589e:	2301      	movs	r3, #1
 80058a0:	75fb      	strb	r3, [r7, #23]
 80058a2:	e063      	b.n	800596c <HAL_CRCEx_Polynomial_Set+0xec>
     * definition. HAL_ERROR is reported if Pol degree is
     * larger than that indicated by PolyLength.
     * Look for MSB position: msb will contain the degree of
     *  the second to the largest polynomial member. E.g., for
     *  X^7 + X^6 + X^5 + X^2 + 1, msb = 6. */
    while ((msb-- > 0U) && ((Pol & ((uint32_t)(0x1U) << (msb & 0x1FU))) == 0U))
 80058a4:	bf00      	nop
 80058a6:	693b      	ldr	r3, [r7, #16]
 80058a8:	1e5a      	subs	r2, r3, #1
 80058aa:	613a      	str	r2, [r7, #16]
 80058ac:	2b00      	cmp	r3, #0
 80058ae:	d009      	beq.n	80058c4 <HAL_CRCEx_Polynomial_Set+0x44>
 80058b0:	693b      	ldr	r3, [r7, #16]
 80058b2:	f003 031f 	and.w	r3, r3, #31
 80058b6:	68ba      	ldr	r2, [r7, #8]
 80058b8:	fa22 f303 	lsr.w	r3, r2, r3
 80058bc:	f003 0301 	and.w	r3, r3, #1
 80058c0:	2b00      	cmp	r3, #0
 80058c2:	d0f0      	beq.n	80058a6 <HAL_CRCEx_Polynomial_Set+0x26>
    {
    }

    switch (PolyLength)
 80058c4:	687b      	ldr	r3, [r7, #4]
 80058c6:	2b18      	cmp	r3, #24
 80058c8:	d846      	bhi.n	8005958 <HAL_CRCEx_Polynomial_Set+0xd8>
 80058ca:	a201      	add	r2, pc, #4	@ (adr r2, 80058d0 <HAL_CRCEx_Polynomial_Set+0x50>)
 80058cc:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 80058d0:	0800595f 	.word	0x0800595f
 80058d4:	08005959 	.word	0x08005959
 80058d8:	08005959 	.word	0x08005959
 80058dc:	08005959 	.word	0x08005959
 80058e0:	08005959 	.word	0x08005959
 80058e4:	08005959 	.word	0x08005959
 80058e8:	08005959 	.word	0x08005959
 80058ec:	08005959 	.word	0x08005959
 80058f0:	0800594d 	.word	0x0800594d
 80058f4:	08005959 	.word	0x08005959
 80058f8:	08005959 	.word	0x08005959
 80058fc:	08005959 	.word	0x08005959
 8005900:	08005959 	.word	0x08005959
 8005904:	08005959 	.word	0x08005959
 8005908:	08005959 	.word	0x08005959
 800590c:	08005959 	.word	0x08005959
 8005910:	08005941 	.word	0x08005941
 8005914:	08005959 	.word	0x08005959
 8005918:	08005959 	.word	0x08005959
 800591c:	08005959 	.word	0x08005959
 8005920:	08005959 	.word	0x08005959
 8005924:	08005959 	.word	0x08005959
 8005928:	08005959 	.word	0x08005959
 800592c:	08005959 	.word	0x08005959
 8005930:	08005935 	.word	0x08005935
    {

      case CRC_POLYLENGTH_7B:
        if (msb >= HAL_CRC_LENGTH_7B)
 8005934:	693b      	ldr	r3, [r7, #16]
 8005936:	2b06      	cmp	r3, #6
 8005938:	d913      	bls.n	8005962 <HAL_CRCEx_Polynomial_Set+0xe2>
        {
          status =   HAL_ERROR;
 800593a:	2301      	movs	r3, #1
 800593c:	75fb      	strb	r3, [r7, #23]
        }
        break;
 800593e:	e010      	b.n	8005962 <HAL_CRCEx_Polynomial_Set+0xe2>
      case CRC_POLYLENGTH_8B:
        if (msb >= HAL_CRC_LENGTH_8B)
 8005940:	693b      	ldr	r3, [r7, #16]
 8005942:	2b07      	cmp	r3, #7
 8005944:	d90f      	bls.n	8005966 <HAL_CRCEx_Polynomial_Set+0xe6>
        {
          status =   HAL_ERROR;
 8005946:	2301      	movs	r3, #1
 8005948:	75fb      	strb	r3, [r7, #23]
        }
        break;
 800594a:	e00c      	b.n	8005966 <HAL_CRCEx_Polynomial_Set+0xe6>
      case CRC_POLYLENGTH_16B:
        if (msb >= HAL_CRC_LENGTH_16B)
 800594c:	693b      	ldr	r3, [r7, #16]
 800594e:	2b0f      	cmp	r3, #15
 8005950:	d90b      	bls.n	800596a <HAL_CRCEx_Polynomial_Set+0xea>
        {
          status =   HAL_ERROR;
 8005952:	2301      	movs	r3, #1
 8005954:	75fb      	strb	r3, [r7, #23]
        }
        break;
 8005956:	e008      	b.n	800596a <HAL_CRCEx_Polynomial_Set+0xea>

      case CRC_POLYLENGTH_32B:
        /* no polynomial definition vs. polynomial length issue possible */
        break;
      default:
        status =  HAL_ERROR;
 8005958:	2301      	movs	r3, #1
 800595a:	75fb      	strb	r3, [r7, #23]
        break;
 800595c:	e006      	b.n	800596c <HAL_CRCEx_Polynomial_Set+0xec>
        break;
 800595e:	bf00      	nop
 8005960:	e004      	b.n	800596c <HAL_CRCEx_Polynomial_Set+0xec>
        break;
 8005962:	bf00      	nop
 8005964:	e002      	b.n	800596c <HAL_CRCEx_Polynomial_Set+0xec>
        break;
 8005966:	bf00      	nop
 8005968:	e000      	b.n	800596c <HAL_CRCEx_Polynomial_Set+0xec>
        break;
 800596a:	bf00      	nop
    }
  }
  if (status == HAL_OK)
 800596c:	7dfb      	ldrb	r3, [r7, #23]
 800596e:	2b00      	cmp	r3, #0
 8005970:	d10d      	bne.n	800598e <HAL_CRCEx_Polynomial_Set+0x10e>
  {
    /* set generating polynomial */
    WRITE_REG(hcrc->Instance->POL, Pol);
 8005972:	68fb      	ldr	r3, [r7, #12]
 8005974:	681b      	ldr	r3, [r3, #0]
 8005976:	68ba      	ldr	r2, [r7, #8]
 8005978:	615a      	str	r2, [r3, #20]

    /* set generating polynomial size */
    MODIFY_REG(hcrc->Instance->CR, CRC_CR_POLYSIZE, PolyLength);
 800597a:	68fb      	ldr	r3, [r7, #12]
 800597c:	681b      	ldr	r3, [r3, #0]
 800597e:	689b      	ldr	r3, [r3, #8]
 8005980:	f023 0118 	bic.w	r1, r3, #24
 8005984:	68fb      	ldr	r3, [r7, #12]
 8005986:	681b      	ldr	r3, [r3, #0]
 8005988:	687a      	ldr	r2, [r7, #4]
 800598a:	430a      	orrs	r2, r1
 800598c:	609a      	str	r2, [r3, #8]
  }
  /* Return function status */
  return status;
 800598e:	7dfb      	ldrb	r3, [r7, #23]
}
 8005990:	4618      	mov	r0, r3
 8005992:	371c      	adds	r7, #28
 8005994:	46bd      	mov	sp, r7
 8005996:	f85d 7b04 	ldr.w	r7, [sp], #4
 800599a:	4770      	bx	lr

0800599c <HAL_DMA_Init>:
  * @param  hdma: Pointer to a DMA_HandleTypeDef structure that contains
  *               the configuration information for the specified DMA Stream.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
{
 800599c:	b580      	push	{r7, lr}
 800599e:	b086      	sub	sp, #24
 80059a0:	af00      	add	r7, sp, #0
 80059a2:	6078      	str	r0, [r7, #4]
  uint32_t registerValue;
  uint32_t tickstart = HAL_GetTick();
 80059a4:	f7ff fc4c 	bl	8005240 <HAL_GetTick>
 80059a8:	6138      	str	r0, [r7, #16]
  DMA_Base_Registers *regs_dma;
  BDMA_Base_Registers *regs_bdma;

  /* Check the DMA peripheral handle */
  if(hdma == NULL)
 80059aa:	687b      	ldr	r3, [r7, #4]
 80059ac:	2b00      	cmp	r3, #0
 80059ae:	d101      	bne.n	80059b4 <HAL_DMA_Init+0x18>
  {
    return HAL_ERROR;
 80059b0:	2301      	movs	r3, #1
 80059b2:	e316      	b.n	8005fe2 <HAL_DMA_Init+0x646>
  assert_param(IS_DMA_PERIPHERAL_DATA_SIZE(hdma->Init.PeriphDataAlignment));
  assert_param(IS_DMA_MEMORY_DATA_SIZE(hdma->Init.MemDataAlignment));
  assert_param(IS_DMA_MODE(hdma->Init.Mode));
  assert_param(IS_DMA_PRIORITY(hdma->Init.Priority));

  if(IS_DMA_STREAM_INSTANCE(hdma->Instance) != 0U) /* DMA1 or DMA2 instance */
 80059b4:	687b      	ldr	r3, [r7, #4]
 80059b6:	681b      	ldr	r3, [r3, #0]
 80059b8:	4a66      	ldr	r2, [pc, #408]	@ (8005b54 <HAL_DMA_Init+0x1b8>)
 80059ba:	4293      	cmp	r3, r2
 80059bc:	d04a      	beq.n	8005a54 <HAL_DMA_Init+0xb8>
 80059be:	687b      	ldr	r3, [r7, #4]
 80059c0:	681b      	ldr	r3, [r3, #0]
 80059c2:	4a65      	ldr	r2, [pc, #404]	@ (8005b58 <HAL_DMA_Init+0x1bc>)
 80059c4:	4293      	cmp	r3, r2
 80059c6:	d045      	beq.n	8005a54 <HAL_DMA_Init+0xb8>
 80059c8:	687b      	ldr	r3, [r7, #4]
 80059ca:	681b      	ldr	r3, [r3, #0]
 80059cc:	4a63      	ldr	r2, [pc, #396]	@ (8005b5c <HAL_DMA_Init+0x1c0>)
 80059ce:	4293      	cmp	r3, r2
 80059d0:	d040      	beq.n	8005a54 <HAL_DMA_Init+0xb8>
 80059d2:	687b      	ldr	r3, [r7, #4]
 80059d4:	681b      	ldr	r3, [r3, #0]
 80059d6:	4a62      	ldr	r2, [pc, #392]	@ (8005b60 <HAL_DMA_Init+0x1c4>)
 80059d8:	4293      	cmp	r3, r2
 80059da:	d03b      	beq.n	8005a54 <HAL_DMA_Init+0xb8>
 80059dc:	687b      	ldr	r3, [r7, #4]
 80059de:	681b      	ldr	r3, [r3, #0]
 80059e0:	4a60      	ldr	r2, [pc, #384]	@ (8005b64 <HAL_DMA_Init+0x1c8>)
 80059e2:	4293      	cmp	r3, r2
 80059e4:	d036      	beq.n	8005a54 <HAL_DMA_Init+0xb8>
 80059e6:	687b      	ldr	r3, [r7, #4]
 80059e8:	681b      	ldr	r3, [r3, #0]
 80059ea:	4a5f      	ldr	r2, [pc, #380]	@ (8005b68 <HAL_DMA_Init+0x1cc>)
 80059ec:	4293      	cmp	r3, r2
 80059ee:	d031      	beq.n	8005a54 <HAL_DMA_Init+0xb8>
 80059f0:	687b      	ldr	r3, [r7, #4]
 80059f2:	681b      	ldr	r3, [r3, #0]
 80059f4:	4a5d      	ldr	r2, [pc, #372]	@ (8005b6c <HAL_DMA_Init+0x1d0>)
 80059f6:	4293      	cmp	r3, r2
 80059f8:	d02c      	beq.n	8005a54 <HAL_DMA_Init+0xb8>
 80059fa:	687b      	ldr	r3, [r7, #4]
 80059fc:	681b      	ldr	r3, [r3, #0]
 80059fe:	4a5c      	ldr	r2, [pc, #368]	@ (8005b70 <HAL_DMA_Init+0x1d4>)
 8005a00:	4293      	cmp	r3, r2
 8005a02:	d027      	beq.n	8005a54 <HAL_DMA_Init+0xb8>
 8005a04:	687b      	ldr	r3, [r7, #4]
 8005a06:	681b      	ldr	r3, [r3, #0]
 8005a08:	4a5a      	ldr	r2, [pc, #360]	@ (8005b74 <HAL_DMA_Init+0x1d8>)
 8005a0a:	4293      	cmp	r3, r2
 8005a0c:	d022      	beq.n	8005a54 <HAL_DMA_Init+0xb8>
 8005a0e:	687b      	ldr	r3, [r7, #4]
 8005a10:	681b      	ldr	r3, [r3, #0]
 8005a12:	4a59      	ldr	r2, [pc, #356]	@ (8005b78 <HAL_DMA_Init+0x1dc>)
 8005a14:	4293      	cmp	r3, r2
 8005a16:	d01d      	beq.n	8005a54 <HAL_DMA_Init+0xb8>
 8005a18:	687b      	ldr	r3, [r7, #4]
 8005a1a:	681b      	ldr	r3, [r3, #0]
 8005a1c:	4a57      	ldr	r2, [pc, #348]	@ (8005b7c <HAL_DMA_Init+0x1e0>)
 8005a1e:	4293      	cmp	r3, r2
 8005a20:	d018      	beq.n	8005a54 <HAL_DMA_Init+0xb8>
 8005a22:	687b      	ldr	r3, [r7, #4]
 8005a24:	681b      	ldr	r3, [r3, #0]
 8005a26:	4a56      	ldr	r2, [pc, #344]	@ (8005b80 <HAL_DMA_Init+0x1e4>)
 8005a28:	4293      	cmp	r3, r2
 8005a2a:	d013      	beq.n	8005a54 <HAL_DMA_Init+0xb8>
 8005a2c:	687b      	ldr	r3, [r7, #4]
 8005a2e:	681b      	ldr	r3, [r3, #0]
 8005a30:	4a54      	ldr	r2, [pc, #336]	@ (8005b84 <HAL_DMA_Init+0x1e8>)
 8005a32:	4293      	cmp	r3, r2
 8005a34:	d00e      	beq.n	8005a54 <HAL_DMA_Init+0xb8>
 8005a36:	687b      	ldr	r3, [r7, #4]
 8005a38:	681b      	ldr	r3, [r3, #0]
 8005a3a:	4a53      	ldr	r2, [pc, #332]	@ (8005b88 <HAL_DMA_Init+0x1ec>)
 8005a3c:	4293      	cmp	r3, r2
 8005a3e:	d009      	beq.n	8005a54 <HAL_DMA_Init+0xb8>
 8005a40:	687b      	ldr	r3, [r7, #4]
 8005a42:	681b      	ldr	r3, [r3, #0]
 8005a44:	4a51      	ldr	r2, [pc, #324]	@ (8005b8c <HAL_DMA_Init+0x1f0>)
 8005a46:	4293      	cmp	r3, r2
 8005a48:	d004      	beq.n	8005a54 <HAL_DMA_Init+0xb8>
 8005a4a:	687b      	ldr	r3, [r7, #4]
 8005a4c:	681b      	ldr	r3, [r3, #0]
 8005a4e:	4a50      	ldr	r2, [pc, #320]	@ (8005b90 <HAL_DMA_Init+0x1f4>)
 8005a50:	4293      	cmp	r3, r2
 8005a52:	d101      	bne.n	8005a58 <HAL_DMA_Init+0xbc>
 8005a54:	2301      	movs	r3, #1
 8005a56:	e000      	b.n	8005a5a <HAL_DMA_Init+0xbe>
 8005a58:	2300      	movs	r3, #0
 8005a5a:	2b00      	cmp	r3, #0
 8005a5c:	f000 813b 	beq.w	8005cd6 <HAL_DMA_Init+0x33a>
      assert_param(IS_DMA_MEMORY_BURST(hdma->Init.MemBurst));
      assert_param(IS_DMA_PERIPHERAL_BURST(hdma->Init.PeriphBurst));
    }

    /* Change DMA peripheral state */
    hdma->State = HAL_DMA_STATE_BUSY;
 8005a60:	687b      	ldr	r3, [r7, #4]
 8005a62:	2202      	movs	r2, #2
 8005a64:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

    /* Allocate lock resource */
    __HAL_UNLOCK(hdma);
 8005a68:	687b      	ldr	r3, [r7, #4]
 8005a6a:	2200      	movs	r2, #0
 8005a6c:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34

    /* Disable the peripheral */
    __HAL_DMA_DISABLE(hdma);
 8005a70:	687b      	ldr	r3, [r7, #4]
 8005a72:	681b      	ldr	r3, [r3, #0]
 8005a74:	4a37      	ldr	r2, [pc, #220]	@ (8005b54 <HAL_DMA_Init+0x1b8>)
 8005a76:	4293      	cmp	r3, r2
 8005a78:	d04a      	beq.n	8005b10 <HAL_DMA_Init+0x174>
 8005a7a:	687b      	ldr	r3, [r7, #4]
 8005a7c:	681b      	ldr	r3, [r3, #0]
 8005a7e:	4a36      	ldr	r2, [pc, #216]	@ (8005b58 <HAL_DMA_Init+0x1bc>)
 8005a80:	4293      	cmp	r3, r2
 8005a82:	d045      	beq.n	8005b10 <HAL_DMA_Init+0x174>
 8005a84:	687b      	ldr	r3, [r7, #4]
 8005a86:	681b      	ldr	r3, [r3, #0]
 8005a88:	4a34      	ldr	r2, [pc, #208]	@ (8005b5c <HAL_DMA_Init+0x1c0>)
 8005a8a:	4293      	cmp	r3, r2
 8005a8c:	d040      	beq.n	8005b10 <HAL_DMA_Init+0x174>
 8005a8e:	687b      	ldr	r3, [r7, #4]
 8005a90:	681b      	ldr	r3, [r3, #0]
 8005a92:	4a33      	ldr	r2, [pc, #204]	@ (8005b60 <HAL_DMA_Init+0x1c4>)
 8005a94:	4293      	cmp	r3, r2
 8005a96:	d03b      	beq.n	8005b10 <HAL_DMA_Init+0x174>
 8005a98:	687b      	ldr	r3, [r7, #4]
 8005a9a:	681b      	ldr	r3, [r3, #0]
 8005a9c:	4a31      	ldr	r2, [pc, #196]	@ (8005b64 <HAL_DMA_Init+0x1c8>)
 8005a9e:	4293      	cmp	r3, r2
 8005aa0:	d036      	beq.n	8005b10 <HAL_DMA_Init+0x174>
 8005aa2:	687b      	ldr	r3, [r7, #4]
 8005aa4:	681b      	ldr	r3, [r3, #0]
 8005aa6:	4a30      	ldr	r2, [pc, #192]	@ (8005b68 <HAL_DMA_Init+0x1cc>)
 8005aa8:	4293      	cmp	r3, r2
 8005aaa:	d031      	beq.n	8005b10 <HAL_DMA_Init+0x174>
 8005aac:	687b      	ldr	r3, [r7, #4]
 8005aae:	681b      	ldr	r3, [r3, #0]
 8005ab0:	4a2e      	ldr	r2, [pc, #184]	@ (8005b6c <HAL_DMA_Init+0x1d0>)
 8005ab2:	4293      	cmp	r3, r2
 8005ab4:	d02c      	beq.n	8005b10 <HAL_DMA_Init+0x174>
 8005ab6:	687b      	ldr	r3, [r7, #4]
 8005ab8:	681b      	ldr	r3, [r3, #0]
 8005aba:	4a2d      	ldr	r2, [pc, #180]	@ (8005b70 <HAL_DMA_Init+0x1d4>)
 8005abc:	4293      	cmp	r3, r2
 8005abe:	d027      	beq.n	8005b10 <HAL_DMA_Init+0x174>
 8005ac0:	687b      	ldr	r3, [r7, #4]
 8005ac2:	681b      	ldr	r3, [r3, #0]
 8005ac4:	4a2b      	ldr	r2, [pc, #172]	@ (8005b74 <HAL_DMA_Init+0x1d8>)
 8005ac6:	4293      	cmp	r3, r2
 8005ac8:	d022      	beq.n	8005b10 <HAL_DMA_Init+0x174>
 8005aca:	687b      	ldr	r3, [r7, #4]
 8005acc:	681b      	ldr	r3, [r3, #0]
 8005ace:	4a2a      	ldr	r2, [pc, #168]	@ (8005b78 <HAL_DMA_Init+0x1dc>)
 8005ad0:	4293      	cmp	r3, r2
 8005ad2:	d01d      	beq.n	8005b10 <HAL_DMA_Init+0x174>
 8005ad4:	687b      	ldr	r3, [r7, #4]
 8005ad6:	681b      	ldr	r3, [r3, #0]
 8005ad8:	4a28      	ldr	r2, [pc, #160]	@ (8005b7c <HAL_DMA_Init+0x1e0>)
 8005ada:	4293      	cmp	r3, r2
 8005adc:	d018      	beq.n	8005b10 <HAL_DMA_Init+0x174>
 8005ade:	687b      	ldr	r3, [r7, #4]
 8005ae0:	681b      	ldr	r3, [r3, #0]
 8005ae2:	4a27      	ldr	r2, [pc, #156]	@ (8005b80 <HAL_DMA_Init+0x1e4>)
 8005ae4:	4293      	cmp	r3, r2
 8005ae6:	d013      	beq.n	8005b10 <HAL_DMA_Init+0x174>
 8005ae8:	687b      	ldr	r3, [r7, #4]
 8005aea:	681b      	ldr	r3, [r3, #0]
 8005aec:	4a25      	ldr	r2, [pc, #148]	@ (8005b84 <HAL_DMA_Init+0x1e8>)
 8005aee:	4293      	cmp	r3, r2
 8005af0:	d00e      	beq.n	8005b10 <HAL_DMA_Init+0x174>
 8005af2:	687b      	ldr	r3, [r7, #4]
 8005af4:	681b      	ldr	r3, [r3, #0]
 8005af6:	4a24      	ldr	r2, [pc, #144]	@ (8005b88 <HAL_DMA_Init+0x1ec>)
 8005af8:	4293      	cmp	r3, r2
 8005afa:	d009      	beq.n	8005b10 <HAL_DMA_Init+0x174>
 8005afc:	687b      	ldr	r3, [r7, #4]
 8005afe:	681b      	ldr	r3, [r3, #0]
 8005b00:	4a22      	ldr	r2, [pc, #136]	@ (8005b8c <HAL_DMA_Init+0x1f0>)
 8005b02:	4293      	cmp	r3, r2
 8005b04:	d004      	beq.n	8005b10 <HAL_DMA_Init+0x174>
 8005b06:	687b      	ldr	r3, [r7, #4]
 8005b08:	681b      	ldr	r3, [r3, #0]
 8005b0a:	4a21      	ldr	r2, [pc, #132]	@ (8005b90 <HAL_DMA_Init+0x1f4>)
 8005b0c:	4293      	cmp	r3, r2
 8005b0e:	d108      	bne.n	8005b22 <HAL_DMA_Init+0x186>
 8005b10:	687b      	ldr	r3, [r7, #4]
 8005b12:	681b      	ldr	r3, [r3, #0]
 8005b14:	681a      	ldr	r2, [r3, #0]
 8005b16:	687b      	ldr	r3, [r7, #4]
 8005b18:	681b      	ldr	r3, [r3, #0]
 8005b1a:	f022 0201 	bic.w	r2, r2, #1
 8005b1e:	601a      	str	r2, [r3, #0]
 8005b20:	e007      	b.n	8005b32 <HAL_DMA_Init+0x196>
 8005b22:	687b      	ldr	r3, [r7, #4]
 8005b24:	681b      	ldr	r3, [r3, #0]
 8005b26:	681a      	ldr	r2, [r3, #0]
 8005b28:	687b      	ldr	r3, [r7, #4]
 8005b2a:	681b      	ldr	r3, [r3, #0]
 8005b2c:	f022 0201 	bic.w	r2, r2, #1
 8005b30:	601a      	str	r2, [r3, #0]

    /* Check if the DMA Stream is effectively disabled */
    while((((DMA_Stream_TypeDef   *)hdma->Instance)->CR & DMA_SxCR_EN) != 0U)
 8005b32:	e02f      	b.n	8005b94 <HAL_DMA_Init+0x1f8>
    {
      /* Check for the Timeout */
      if((HAL_GetTick() - tickstart ) > HAL_TIMEOUT_DMA_ABORT)
 8005b34:	f7ff fb84 	bl	8005240 <HAL_GetTick>
 8005b38:	4602      	mov	r2, r0
 8005b3a:	693b      	ldr	r3, [r7, #16]
 8005b3c:	1ad3      	subs	r3, r2, r3
 8005b3e:	2b05      	cmp	r3, #5
 8005b40:	d928      	bls.n	8005b94 <HAL_DMA_Init+0x1f8>
      {
        /* Update error code */
        hdma->ErrorCode = HAL_DMA_ERROR_TIMEOUT;
 8005b42:	687b      	ldr	r3, [r7, #4]
 8005b44:	2220      	movs	r2, #32
 8005b46:	655a      	str	r2, [r3, #84]	@ 0x54

        /* Change the DMA state */
        hdma->State = HAL_DMA_STATE_ERROR;
 8005b48:	687b      	ldr	r3, [r7, #4]
 8005b4a:	2203      	movs	r2, #3
 8005b4c:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

        return HAL_ERROR;
 8005b50:	2301      	movs	r3, #1
 8005b52:	e246      	b.n	8005fe2 <HAL_DMA_Init+0x646>
 8005b54:	40020010 	.word	0x40020010
 8005b58:	40020028 	.word	0x40020028
 8005b5c:	40020040 	.word	0x40020040
 8005b60:	40020058 	.word	0x40020058
 8005b64:	40020070 	.word	0x40020070
 8005b68:	40020088 	.word	0x40020088
 8005b6c:	400200a0 	.word	0x400200a0
 8005b70:	400200b8 	.word	0x400200b8
 8005b74:	40020410 	.word	0x40020410
 8005b78:	40020428 	.word	0x40020428
 8005b7c:	40020440 	.word	0x40020440
 8005b80:	40020458 	.word	0x40020458
 8005b84:	40020470 	.word	0x40020470
 8005b88:	40020488 	.word	0x40020488
 8005b8c:	400204a0 	.word	0x400204a0
 8005b90:	400204b8 	.word	0x400204b8
    while((((DMA_Stream_TypeDef   *)hdma->Instance)->CR & DMA_SxCR_EN) != 0U)
 8005b94:	687b      	ldr	r3, [r7, #4]
 8005b96:	681b      	ldr	r3, [r3, #0]
 8005b98:	681b      	ldr	r3, [r3, #0]
 8005b9a:	f003 0301 	and.w	r3, r3, #1
 8005b9e:	2b00      	cmp	r3, #0
 8005ba0:	d1c8      	bne.n	8005b34 <HAL_DMA_Init+0x198>
      }
    }

    /* Get the CR register value */
    registerValue = ((DMA_Stream_TypeDef   *)hdma->Instance)->CR;
 8005ba2:	687b      	ldr	r3, [r7, #4]
 8005ba4:	681b      	ldr	r3, [r3, #0]
 8005ba6:	681b      	ldr	r3, [r3, #0]
 8005ba8:	617b      	str	r3, [r7, #20]

    /* Clear CHSEL, MBURST, PBURST, PL, MSIZE, PSIZE, MINC, PINC, CIRC, DIR, CT and DBM bits */
    registerValue &= ((uint32_t)~(DMA_SxCR_MBURST | DMA_SxCR_PBURST | \
 8005baa:	697a      	ldr	r2, [r7, #20]
 8005bac:	4b83      	ldr	r3, [pc, #524]	@ (8005dbc <HAL_DMA_Init+0x420>)
 8005bae:	4013      	ands	r3, r2
 8005bb0:	617b      	str	r3, [r7, #20]
                        DMA_SxCR_PL    | DMA_SxCR_MSIZE  | DMA_SxCR_PSIZE  | \
                        DMA_SxCR_MINC  | DMA_SxCR_PINC   | DMA_SxCR_CIRC   | \
                        DMA_SxCR_DIR   | DMA_SxCR_CT     | DMA_SxCR_DBM));

    /* Prepare the DMA Stream configuration */
    registerValue |=  hdma->Init.Direction           |
 8005bb2:	687b      	ldr	r3, [r7, #4]
 8005bb4:	689a      	ldr	r2, [r3, #8]
            hdma->Init.PeriphInc           | hdma->Init.MemInc           |
 8005bb6:	687b      	ldr	r3, [r7, #4]
 8005bb8:	68db      	ldr	r3, [r3, #12]
    registerValue |=  hdma->Init.Direction           |
 8005bba:	431a      	orrs	r2, r3
            hdma->Init.PeriphInc           | hdma->Init.MemInc           |
 8005bbc:	687b      	ldr	r3, [r7, #4]
 8005bbe:	691b      	ldr	r3, [r3, #16]
 8005bc0:	431a      	orrs	r2, r3
            hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
 8005bc2:	687b      	ldr	r3, [r7, #4]
 8005bc4:	695b      	ldr	r3, [r3, #20]
            hdma->Init.PeriphInc           | hdma->Init.MemInc           |
 8005bc6:	431a      	orrs	r2, r3
            hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
 8005bc8:	687b      	ldr	r3, [r7, #4]
 8005bca:	699b      	ldr	r3, [r3, #24]
 8005bcc:	431a      	orrs	r2, r3
            hdma->Init.Mode                | hdma->Init.Priority;
 8005bce:	687b      	ldr	r3, [r7, #4]
 8005bd0:	69db      	ldr	r3, [r3, #28]
            hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
 8005bd2:	431a      	orrs	r2, r3
            hdma->Init.Mode                | hdma->Init.Priority;
 8005bd4:	687b      	ldr	r3, [r7, #4]
 8005bd6:	6a1b      	ldr	r3, [r3, #32]
 8005bd8:	4313      	orrs	r3, r2
    registerValue |=  hdma->Init.Direction           |
 8005bda:	697a      	ldr	r2, [r7, #20]
 8005bdc:	4313      	orrs	r3, r2
 8005bde:	617b      	str	r3, [r7, #20]

    /* the Memory burst and peripheral burst are not used when the FIFO is disabled */
    if(hdma->Init.FIFOMode == DMA_FIFOMODE_ENABLE)
 8005be0:	687b      	ldr	r3, [r7, #4]
 8005be2:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8005be4:	2b04      	cmp	r3, #4
 8005be6:	d107      	bne.n	8005bf8 <HAL_DMA_Init+0x25c>
    {
      /* Get memory burst and peripheral burst */
      registerValue |=  hdma->Init.MemBurst | hdma->Init.PeriphBurst;
 8005be8:	687b      	ldr	r3, [r7, #4]
 8005bea:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8005bec:	687b      	ldr	r3, [r7, #4]
 8005bee:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8005bf0:	4313      	orrs	r3, r2
 8005bf2:	697a      	ldr	r2, [r7, #20]
 8005bf4:	4313      	orrs	r3, r2
 8005bf6:	617b      	str	r3, [r7, #20]
    }

    /* Work around for Errata 2.22: UART/USART- DMA transfer lock: DMA stream could be
                                    lock when transferring data to/from USART/UART */
#if (STM32H7_DEV_ID == 0x450UL)
    if((DBGMCU->IDCODE & 0xFFFF0000U) >= 0x20000000U)
 8005bf8:	4b71      	ldr	r3, [pc, #452]	@ (8005dc0 <HAL_DMA_Init+0x424>)
 8005bfa:	681a      	ldr	r2, [r3, #0]
 8005bfc:	4b71      	ldr	r3, [pc, #452]	@ (8005dc4 <HAL_DMA_Init+0x428>)
 8005bfe:	4013      	ands	r3, r2
 8005c00:	f1b3 5f00 	cmp.w	r3, #536870912	@ 0x20000000
 8005c04:	d328      	bcc.n	8005c58 <HAL_DMA_Init+0x2bc>
    {
#endif /* STM32H7_DEV_ID == 0x450UL */
      if(IS_DMA_UART_USART_REQUEST(hdma->Init.Request) != 0U)
 8005c06:	687b      	ldr	r3, [r7, #4]
 8005c08:	685b      	ldr	r3, [r3, #4]
 8005c0a:	2b28      	cmp	r3, #40	@ 0x28
 8005c0c:	d903      	bls.n	8005c16 <HAL_DMA_Init+0x27a>
 8005c0e:	687b      	ldr	r3, [r7, #4]
 8005c10:	685b      	ldr	r3, [r3, #4]
 8005c12:	2b2e      	cmp	r3, #46	@ 0x2e
 8005c14:	d917      	bls.n	8005c46 <HAL_DMA_Init+0x2aa>
 8005c16:	687b      	ldr	r3, [r7, #4]
 8005c18:	685b      	ldr	r3, [r3, #4]
 8005c1a:	2b3e      	cmp	r3, #62	@ 0x3e
 8005c1c:	d903      	bls.n	8005c26 <HAL_DMA_Init+0x28a>
 8005c1e:	687b      	ldr	r3, [r7, #4]
 8005c20:	685b      	ldr	r3, [r3, #4]
 8005c22:	2b42      	cmp	r3, #66	@ 0x42
 8005c24:	d90f      	bls.n	8005c46 <HAL_DMA_Init+0x2aa>
 8005c26:	687b      	ldr	r3, [r7, #4]
 8005c28:	685b      	ldr	r3, [r3, #4]
 8005c2a:	2b46      	cmp	r3, #70	@ 0x46
 8005c2c:	d903      	bls.n	8005c36 <HAL_DMA_Init+0x29a>
 8005c2e:	687b      	ldr	r3, [r7, #4]
 8005c30:	685b      	ldr	r3, [r3, #4]
 8005c32:	2b48      	cmp	r3, #72	@ 0x48
 8005c34:	d907      	bls.n	8005c46 <HAL_DMA_Init+0x2aa>
 8005c36:	687b      	ldr	r3, [r7, #4]
 8005c38:	685b      	ldr	r3, [r3, #4]
 8005c3a:	2b4e      	cmp	r3, #78	@ 0x4e
 8005c3c:	d905      	bls.n	8005c4a <HAL_DMA_Init+0x2ae>
 8005c3e:	687b      	ldr	r3, [r7, #4]
 8005c40:	685b      	ldr	r3, [r3, #4]
 8005c42:	2b52      	cmp	r3, #82	@ 0x52
 8005c44:	d801      	bhi.n	8005c4a <HAL_DMA_Init+0x2ae>
 8005c46:	2301      	movs	r3, #1
 8005c48:	e000      	b.n	8005c4c <HAL_DMA_Init+0x2b0>
 8005c4a:	2300      	movs	r3, #0
 8005c4c:	2b00      	cmp	r3, #0
 8005c4e:	d003      	beq.n	8005c58 <HAL_DMA_Init+0x2bc>
      {
        registerValue |= DMA_SxCR_TRBUFF;
 8005c50:	697b      	ldr	r3, [r7, #20]
 8005c52:	f443 1380 	orr.w	r3, r3, #1048576	@ 0x100000
 8005c56:	617b      	str	r3, [r7, #20]
#if (STM32H7_DEV_ID == 0x450UL)
    }
#endif /* STM32H7_DEV_ID == 0x450UL */

    /* Write to DMA Stream CR register */
    ((DMA_Stream_TypeDef   *)hdma->Instance)->CR = registerValue;
 8005c58:	687b      	ldr	r3, [r7, #4]
 8005c5a:	681b      	ldr	r3, [r3, #0]
 8005c5c:	697a      	ldr	r2, [r7, #20]
 8005c5e:	601a      	str	r2, [r3, #0]

    /* Get the FCR register value */
    registerValue = ((DMA_Stream_TypeDef   *)hdma->Instance)->FCR;
 8005c60:	687b      	ldr	r3, [r7, #4]
 8005c62:	681b      	ldr	r3, [r3, #0]
 8005c64:	695b      	ldr	r3, [r3, #20]
 8005c66:	617b      	str	r3, [r7, #20]

    /* Clear Direct mode and FIFO threshold bits */
    registerValue &= (uint32_t)~(DMA_SxFCR_DMDIS | DMA_SxFCR_FTH);
 8005c68:	697b      	ldr	r3, [r7, #20]
 8005c6a:	f023 0307 	bic.w	r3, r3, #7
 8005c6e:	617b      	str	r3, [r7, #20]

    /* Prepare the DMA Stream FIFO configuration */
    registerValue |= hdma->Init.FIFOMode;
 8005c70:	687b      	ldr	r3, [r7, #4]
 8005c72:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8005c74:	697a      	ldr	r2, [r7, #20]
 8005c76:	4313      	orrs	r3, r2
 8005c78:	617b      	str	r3, [r7, #20]

    /* the FIFO threshold is not used when the FIFO mode is disabled */
    if(hdma->Init.FIFOMode == DMA_FIFOMODE_ENABLE)
 8005c7a:	687b      	ldr	r3, [r7, #4]
 8005c7c:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8005c7e:	2b04      	cmp	r3, #4
 8005c80:	d117      	bne.n	8005cb2 <HAL_DMA_Init+0x316>
    {
      /* Get the FIFO threshold */
      registerValue |= hdma->Init.FIFOThreshold;
 8005c82:	687b      	ldr	r3, [r7, #4]
 8005c84:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 8005c86:	697a      	ldr	r2, [r7, #20]
 8005c88:	4313      	orrs	r3, r2
 8005c8a:	617b      	str	r3, [r7, #20]

      /* Check compatibility between FIFO threshold level and size of the memory burst */
      /* for INCR4, INCR8, INCR16 */
      if(hdma->Init.MemBurst != DMA_MBURST_SINGLE)
 8005c8c:	687b      	ldr	r3, [r7, #4]
 8005c8e:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8005c90:	2b00      	cmp	r3, #0
 8005c92:	d00e      	beq.n	8005cb2 <HAL_DMA_Init+0x316>
      {
        if (DMA_CheckFifoParam(hdma) != HAL_OK)
 8005c94:	6878      	ldr	r0, [r7, #4]
 8005c96:	f001 ff1d 	bl	8007ad4 <DMA_CheckFifoParam>
 8005c9a:	4603      	mov	r3, r0
 8005c9c:	2b00      	cmp	r3, #0
 8005c9e:	d008      	beq.n	8005cb2 <HAL_DMA_Init+0x316>
        {
          /* Update error code */
          hdma->ErrorCode = HAL_DMA_ERROR_PARAM;
 8005ca0:	687b      	ldr	r3, [r7, #4]
 8005ca2:	2240      	movs	r2, #64	@ 0x40
 8005ca4:	655a      	str	r2, [r3, #84]	@ 0x54

          /* Change the DMA state */
          hdma->State = HAL_DMA_STATE_READY;
 8005ca6:	687b      	ldr	r3, [r7, #4]
 8005ca8:	2201      	movs	r2, #1
 8005caa:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

          return HAL_ERROR;
 8005cae:	2301      	movs	r3, #1
 8005cb0:	e197      	b.n	8005fe2 <HAL_DMA_Init+0x646>
        }
      }
    }

    /* Write to DMA Stream FCR */
    ((DMA_Stream_TypeDef   *)hdma->Instance)->FCR = registerValue;
 8005cb2:	687b      	ldr	r3, [r7, #4]
 8005cb4:	681b      	ldr	r3, [r3, #0]
 8005cb6:	697a      	ldr	r2, [r7, #20]
 8005cb8:	615a      	str	r2, [r3, #20]

    /* Initialize StreamBaseAddress and StreamIndex parameters to be used to calculate
       DMA steam Base Address needed by HAL_DMA_IRQHandler() and HAL_DMA_PollForTransfer() */
    regs_dma = (DMA_Base_Registers *)DMA_CalcBaseAndBitshift(hdma);
 8005cba:	6878      	ldr	r0, [r7, #4]
 8005cbc:	f001 fe58 	bl	8007970 <DMA_CalcBaseAndBitshift>
 8005cc0:	4603      	mov	r3, r0
 8005cc2:	60bb      	str	r3, [r7, #8]

    /* Clear all interrupt flags */
    regs_dma->IFCR = 0x3FUL << (hdma->StreamIndex & 0x1FU);
 8005cc4:	687b      	ldr	r3, [r7, #4]
 8005cc6:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 8005cc8:	f003 031f 	and.w	r3, r3, #31
 8005ccc:	223f      	movs	r2, #63	@ 0x3f
 8005cce:	409a      	lsls	r2, r3
 8005cd0:	68bb      	ldr	r3, [r7, #8]
 8005cd2:	609a      	str	r2, [r3, #8]
 8005cd4:	e0cd      	b.n	8005e72 <HAL_DMA_Init+0x4d6>
  }
  else if(IS_BDMA_CHANNEL_INSTANCE(hdma->Instance) != 0U) /* BDMA instance(s) */
 8005cd6:	687b      	ldr	r3, [r7, #4]
 8005cd8:	681b      	ldr	r3, [r3, #0]
 8005cda:	4a3b      	ldr	r2, [pc, #236]	@ (8005dc8 <HAL_DMA_Init+0x42c>)
 8005cdc:	4293      	cmp	r3, r2
 8005cde:	d022      	beq.n	8005d26 <HAL_DMA_Init+0x38a>
 8005ce0:	687b      	ldr	r3, [r7, #4]
 8005ce2:	681b      	ldr	r3, [r3, #0]
 8005ce4:	4a39      	ldr	r2, [pc, #228]	@ (8005dcc <HAL_DMA_Init+0x430>)
 8005ce6:	4293      	cmp	r3, r2
 8005ce8:	d01d      	beq.n	8005d26 <HAL_DMA_Init+0x38a>
 8005cea:	687b      	ldr	r3, [r7, #4]
 8005cec:	681b      	ldr	r3, [r3, #0]
 8005cee:	4a38      	ldr	r2, [pc, #224]	@ (8005dd0 <HAL_DMA_Init+0x434>)
 8005cf0:	4293      	cmp	r3, r2
 8005cf2:	d018      	beq.n	8005d26 <HAL_DMA_Init+0x38a>
 8005cf4:	687b      	ldr	r3, [r7, #4]
 8005cf6:	681b      	ldr	r3, [r3, #0]
 8005cf8:	4a36      	ldr	r2, [pc, #216]	@ (8005dd4 <HAL_DMA_Init+0x438>)
 8005cfa:	4293      	cmp	r3, r2
 8005cfc:	d013      	beq.n	8005d26 <HAL_DMA_Init+0x38a>
 8005cfe:	687b      	ldr	r3, [r7, #4]
 8005d00:	681b      	ldr	r3, [r3, #0]
 8005d02:	4a35      	ldr	r2, [pc, #212]	@ (8005dd8 <HAL_DMA_Init+0x43c>)
 8005d04:	4293      	cmp	r3, r2
 8005d06:	d00e      	beq.n	8005d26 <HAL_DMA_Init+0x38a>
 8005d08:	687b      	ldr	r3, [r7, #4]
 8005d0a:	681b      	ldr	r3, [r3, #0]
 8005d0c:	4a33      	ldr	r2, [pc, #204]	@ (8005ddc <HAL_DMA_Init+0x440>)
 8005d0e:	4293      	cmp	r3, r2
 8005d10:	d009      	beq.n	8005d26 <HAL_DMA_Init+0x38a>
 8005d12:	687b      	ldr	r3, [r7, #4]
 8005d14:	681b      	ldr	r3, [r3, #0]
 8005d16:	4a32      	ldr	r2, [pc, #200]	@ (8005de0 <HAL_DMA_Init+0x444>)
 8005d18:	4293      	cmp	r3, r2
 8005d1a:	d004      	beq.n	8005d26 <HAL_DMA_Init+0x38a>
 8005d1c:	687b      	ldr	r3, [r7, #4]
 8005d1e:	681b      	ldr	r3, [r3, #0]
 8005d20:	4a30      	ldr	r2, [pc, #192]	@ (8005de4 <HAL_DMA_Init+0x448>)
 8005d22:	4293      	cmp	r3, r2
 8005d24:	d101      	bne.n	8005d2a <HAL_DMA_Init+0x38e>
 8005d26:	2301      	movs	r3, #1
 8005d28:	e000      	b.n	8005d2c <HAL_DMA_Init+0x390>
 8005d2a:	2300      	movs	r3, #0
 8005d2c:	2b00      	cmp	r3, #0
 8005d2e:	f000 8097 	beq.w	8005e60 <HAL_DMA_Init+0x4c4>
  {
    if(IS_BDMA_CHANNEL_DMAMUX_INSTANCE(hdma->Instance) != 0U)
 8005d32:	687b      	ldr	r3, [r7, #4]
 8005d34:	681b      	ldr	r3, [r3, #0]
 8005d36:	4a24      	ldr	r2, [pc, #144]	@ (8005dc8 <HAL_DMA_Init+0x42c>)
 8005d38:	4293      	cmp	r3, r2
 8005d3a:	d021      	beq.n	8005d80 <HAL_DMA_Init+0x3e4>
 8005d3c:	687b      	ldr	r3, [r7, #4]
 8005d3e:	681b      	ldr	r3, [r3, #0]
 8005d40:	4a22      	ldr	r2, [pc, #136]	@ (8005dcc <HAL_DMA_Init+0x430>)
 8005d42:	4293      	cmp	r3, r2
 8005d44:	d01c      	beq.n	8005d80 <HAL_DMA_Init+0x3e4>
 8005d46:	687b      	ldr	r3, [r7, #4]
 8005d48:	681b      	ldr	r3, [r3, #0]
 8005d4a:	4a21      	ldr	r2, [pc, #132]	@ (8005dd0 <HAL_DMA_Init+0x434>)
 8005d4c:	4293      	cmp	r3, r2
 8005d4e:	d017      	beq.n	8005d80 <HAL_DMA_Init+0x3e4>
 8005d50:	687b      	ldr	r3, [r7, #4]
 8005d52:	681b      	ldr	r3, [r3, #0]
 8005d54:	4a1f      	ldr	r2, [pc, #124]	@ (8005dd4 <HAL_DMA_Init+0x438>)
 8005d56:	4293      	cmp	r3, r2
 8005d58:	d012      	beq.n	8005d80 <HAL_DMA_Init+0x3e4>
 8005d5a:	687b      	ldr	r3, [r7, #4]
 8005d5c:	681b      	ldr	r3, [r3, #0]
 8005d5e:	4a1e      	ldr	r2, [pc, #120]	@ (8005dd8 <HAL_DMA_Init+0x43c>)
 8005d60:	4293      	cmp	r3, r2
 8005d62:	d00d      	beq.n	8005d80 <HAL_DMA_Init+0x3e4>
 8005d64:	687b      	ldr	r3, [r7, #4]
 8005d66:	681b      	ldr	r3, [r3, #0]
 8005d68:	4a1c      	ldr	r2, [pc, #112]	@ (8005ddc <HAL_DMA_Init+0x440>)
 8005d6a:	4293      	cmp	r3, r2
 8005d6c:	d008      	beq.n	8005d80 <HAL_DMA_Init+0x3e4>
 8005d6e:	687b      	ldr	r3, [r7, #4]
 8005d70:	681b      	ldr	r3, [r3, #0]
 8005d72:	4a1b      	ldr	r2, [pc, #108]	@ (8005de0 <HAL_DMA_Init+0x444>)
 8005d74:	4293      	cmp	r3, r2
 8005d76:	d003      	beq.n	8005d80 <HAL_DMA_Init+0x3e4>
 8005d78:	687b      	ldr	r3, [r7, #4]
 8005d7a:	681b      	ldr	r3, [r3, #0]
 8005d7c:	4a19      	ldr	r2, [pc, #100]	@ (8005de4 <HAL_DMA_Init+0x448>)
 8005d7e:	4293      	cmp	r3, r2
      /* Check the request parameter */
      assert_param(IS_BDMA_REQUEST(hdma->Init.Request));
    }

    /* Change DMA peripheral state */
    hdma->State = HAL_DMA_STATE_BUSY;
 8005d80:	687b      	ldr	r3, [r7, #4]
 8005d82:	2202      	movs	r2, #2
 8005d84:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

    /* Allocate lock resource */
    __HAL_UNLOCK(hdma);
 8005d88:	687b      	ldr	r3, [r7, #4]
 8005d8a:	2200      	movs	r2, #0
 8005d8c:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34

    /* Get the CR register value */
    registerValue = ((BDMA_Channel_TypeDef *)hdma->Instance)->CCR;
 8005d90:	687b      	ldr	r3, [r7, #4]
 8005d92:	681b      	ldr	r3, [r3, #0]
 8005d94:	681b      	ldr	r3, [r3, #0]
 8005d96:	617b      	str	r3, [r7, #20]

    /* Clear PL, MSIZE, PSIZE, MINC, PINC, CIRC, DIR, MEM2MEM, DBM and CT bits */
    registerValue &= ((uint32_t)~(BDMA_CCR_PL    | BDMA_CCR_MSIZE   | BDMA_CCR_PSIZE  | \
 8005d98:	697a      	ldr	r2, [r7, #20]
 8005d9a:	4b13      	ldr	r3, [pc, #76]	@ (8005de8 <HAL_DMA_Init+0x44c>)
 8005d9c:	4013      	ands	r3, r2
 8005d9e:	617b      	str	r3, [r7, #20]
                                  BDMA_CCR_MINC  | BDMA_CCR_PINC    | BDMA_CCR_CIRC   | \
                                  BDMA_CCR_DIR   | BDMA_CCR_MEM2MEM | BDMA_CCR_DBM    | \
                                  BDMA_CCR_CT));

    /* Prepare the DMA Channel configuration */
    registerValue |=  DMA_TO_BDMA_DIRECTION(hdma->Init.Direction)            |
 8005da0:	687b      	ldr	r3, [r7, #4]
 8005da2:	689b      	ldr	r3, [r3, #8]
 8005da4:	2b40      	cmp	r3, #64	@ 0x40
 8005da6:	d021      	beq.n	8005dec <HAL_DMA_Init+0x450>
 8005da8:	687b      	ldr	r3, [r7, #4]
 8005daa:	689b      	ldr	r3, [r3, #8]
 8005dac:	2b80      	cmp	r3, #128	@ 0x80
 8005dae:	d102      	bne.n	8005db6 <HAL_DMA_Init+0x41a>
 8005db0:	f44f 4380 	mov.w	r3, #16384	@ 0x4000
 8005db4:	e01b      	b.n	8005dee <HAL_DMA_Init+0x452>
 8005db6:	2300      	movs	r3, #0
 8005db8:	e019      	b.n	8005dee <HAL_DMA_Init+0x452>
 8005dba:	bf00      	nop
 8005dbc:	fe10803f 	.word	0xfe10803f
 8005dc0:	5c001000 	.word	0x5c001000
 8005dc4:	ffff0000 	.word	0xffff0000
 8005dc8:	58025408 	.word	0x58025408
 8005dcc:	5802541c 	.word	0x5802541c
 8005dd0:	58025430 	.word	0x58025430
 8005dd4:	58025444 	.word	0x58025444
 8005dd8:	58025458 	.word	0x58025458
 8005ddc:	5802546c 	.word	0x5802546c
 8005de0:	58025480 	.word	0x58025480
 8005de4:	58025494 	.word	0x58025494
 8005de8:	fffe000f 	.word	0xfffe000f
 8005dec:	2310      	movs	r3, #16
                      DMA_TO_BDMA_PERIPHERAL_INC(hdma->Init.PeriphInc)       |
 8005dee:	687a      	ldr	r2, [r7, #4]
 8005df0:	68d2      	ldr	r2, [r2, #12]
 8005df2:	08d2      	lsrs	r2, r2, #3
    registerValue |=  DMA_TO_BDMA_DIRECTION(hdma->Init.Direction)            |
 8005df4:	431a      	orrs	r2, r3
                      DMA_TO_BDMA_MEMORY_INC(hdma->Init.MemInc)              |
 8005df6:	687b      	ldr	r3, [r7, #4]
 8005df8:	691b      	ldr	r3, [r3, #16]
 8005dfa:	08db      	lsrs	r3, r3, #3
                      DMA_TO_BDMA_PERIPHERAL_INC(hdma->Init.PeriphInc)       |
 8005dfc:	431a      	orrs	r2, r3
                      DMA_TO_BDMA_PDATA_SIZE(hdma->Init.PeriphDataAlignment) |
 8005dfe:	687b      	ldr	r3, [r7, #4]
 8005e00:	695b      	ldr	r3, [r3, #20]
 8005e02:	08db      	lsrs	r3, r3, #3
                      DMA_TO_BDMA_MEMORY_INC(hdma->Init.MemInc)              |
 8005e04:	431a      	orrs	r2, r3
                      DMA_TO_BDMA_MDATA_SIZE(hdma->Init.MemDataAlignment)    |
 8005e06:	687b      	ldr	r3, [r7, #4]
 8005e08:	699b      	ldr	r3, [r3, #24]
 8005e0a:	08db      	lsrs	r3, r3, #3
                      DMA_TO_BDMA_PDATA_SIZE(hdma->Init.PeriphDataAlignment) |
 8005e0c:	431a      	orrs	r2, r3
                      DMA_TO_BDMA_MODE(hdma->Init.Mode)                      |
 8005e0e:	687b      	ldr	r3, [r7, #4]
 8005e10:	69db      	ldr	r3, [r3, #28]
 8005e12:	08db      	lsrs	r3, r3, #3
                      DMA_TO_BDMA_MDATA_SIZE(hdma->Init.MemDataAlignment)    |
 8005e14:	431a      	orrs	r2, r3
                      DMA_TO_BDMA_PRIORITY(hdma->Init.Priority);
 8005e16:	687b      	ldr	r3, [r7, #4]
 8005e18:	6a1b      	ldr	r3, [r3, #32]
 8005e1a:	091b      	lsrs	r3, r3, #4
                      DMA_TO_BDMA_MODE(hdma->Init.Mode)                      |
 8005e1c:	4313      	orrs	r3, r2
    registerValue |=  DMA_TO_BDMA_DIRECTION(hdma->Init.Direction)            |
 8005e1e:	697a      	ldr	r2, [r7, #20]
 8005e20:	4313      	orrs	r3, r2
 8005e22:	617b      	str	r3, [r7, #20]

    /* Write to DMA Channel CR register */
    ((BDMA_Channel_TypeDef *)hdma->Instance)->CCR = registerValue;
 8005e24:	687b      	ldr	r3, [r7, #4]
 8005e26:	681b      	ldr	r3, [r3, #0]
 8005e28:	697a      	ldr	r2, [r7, #20]
 8005e2a:	601a      	str	r2, [r3, #0]

    /* calculation of the channel index */
    hdma->StreamIndex = (((uint32_t)((uint32_t*)hdma->Instance) - (uint32_t)BDMA_Channel0) / ((uint32_t)BDMA_Channel1 - (uint32_t)BDMA_Channel0)) << 2U;
 8005e2c:	687b      	ldr	r3, [r7, #4]
 8005e2e:	681b      	ldr	r3, [r3, #0]
 8005e30:	461a      	mov	r2, r3
 8005e32:	4b6e      	ldr	r3, [pc, #440]	@ (8005fec <HAL_DMA_Init+0x650>)
 8005e34:	4413      	add	r3, r2
 8005e36:	4a6e      	ldr	r2, [pc, #440]	@ (8005ff0 <HAL_DMA_Init+0x654>)
 8005e38:	fba2 2303 	umull	r2, r3, r2, r3
 8005e3c:	091b      	lsrs	r3, r3, #4
 8005e3e:	009a      	lsls	r2, r3, #2
 8005e40:	687b      	ldr	r3, [r7, #4]
 8005e42:	65da      	str	r2, [r3, #92]	@ 0x5c

    /* Initialize StreamBaseAddress and StreamIndex parameters to be used to calculate
    DMA steam Base Address needed by HAL_DMA_IRQHandler() and HAL_DMA_PollForTransfer() */
    regs_bdma = (BDMA_Base_Registers *)DMA_CalcBaseAndBitshift(hdma);
 8005e44:	6878      	ldr	r0, [r7, #4]
 8005e46:	f001 fd93 	bl	8007970 <DMA_CalcBaseAndBitshift>
 8005e4a:	4603      	mov	r3, r0
 8005e4c:	60fb      	str	r3, [r7, #12]

    /* Clear all interrupt flags */
    regs_bdma->IFCR = ((BDMA_IFCR_CGIF0) << (hdma->StreamIndex & 0x1FU));
 8005e4e:	687b      	ldr	r3, [r7, #4]
 8005e50:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 8005e52:	f003 031f 	and.w	r3, r3, #31
 8005e56:	2201      	movs	r2, #1
 8005e58:	409a      	lsls	r2, r3
 8005e5a:	68fb      	ldr	r3, [r7, #12]
 8005e5c:	605a      	str	r2, [r3, #4]
 8005e5e:	e008      	b.n	8005e72 <HAL_DMA_Init+0x4d6>
  }
  else
  {
    hdma->ErrorCode = HAL_DMA_ERROR_PARAM;
 8005e60:	687b      	ldr	r3, [r7, #4]
 8005e62:	2240      	movs	r2, #64	@ 0x40
 8005e64:	655a      	str	r2, [r3, #84]	@ 0x54
    hdma->State     = HAL_DMA_STATE_ERROR;
 8005e66:	687b      	ldr	r3, [r7, #4]
 8005e68:	2203      	movs	r2, #3
 8005e6a:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

    return HAL_ERROR;
 8005e6e:	2301      	movs	r3, #1
 8005e70:	e0b7      	b.n	8005fe2 <HAL_DMA_Init+0x646>
  }

  if(IS_DMA_DMAMUX_ALL_INSTANCE(hdma->Instance) != 0U) /* No DMAMUX available for BDMA1 */
 8005e72:	687b      	ldr	r3, [r7, #4]
 8005e74:	681b      	ldr	r3, [r3, #0]
 8005e76:	4a5f      	ldr	r2, [pc, #380]	@ (8005ff4 <HAL_DMA_Init+0x658>)
 8005e78:	4293      	cmp	r3, r2
 8005e7a:	d072      	beq.n	8005f62 <HAL_DMA_Init+0x5c6>
 8005e7c:	687b      	ldr	r3, [r7, #4]
 8005e7e:	681b      	ldr	r3, [r3, #0]
 8005e80:	4a5d      	ldr	r2, [pc, #372]	@ (8005ff8 <HAL_DMA_Init+0x65c>)
 8005e82:	4293      	cmp	r3, r2
 8005e84:	d06d      	beq.n	8005f62 <HAL_DMA_Init+0x5c6>
 8005e86:	687b      	ldr	r3, [r7, #4]
 8005e88:	681b      	ldr	r3, [r3, #0]
 8005e8a:	4a5c      	ldr	r2, [pc, #368]	@ (8005ffc <HAL_DMA_Init+0x660>)
 8005e8c:	4293      	cmp	r3, r2
 8005e8e:	d068      	beq.n	8005f62 <HAL_DMA_Init+0x5c6>
 8005e90:	687b      	ldr	r3, [r7, #4]
 8005e92:	681b      	ldr	r3, [r3, #0]
 8005e94:	4a5a      	ldr	r2, [pc, #360]	@ (8006000 <HAL_DMA_Init+0x664>)
 8005e96:	4293      	cmp	r3, r2
 8005e98:	d063      	beq.n	8005f62 <HAL_DMA_Init+0x5c6>
 8005e9a:	687b      	ldr	r3, [r7, #4]
 8005e9c:	681b      	ldr	r3, [r3, #0]
 8005e9e:	4a59      	ldr	r2, [pc, #356]	@ (8006004 <HAL_DMA_Init+0x668>)
 8005ea0:	4293      	cmp	r3, r2
 8005ea2:	d05e      	beq.n	8005f62 <HAL_DMA_Init+0x5c6>
 8005ea4:	687b      	ldr	r3, [r7, #4]
 8005ea6:	681b      	ldr	r3, [r3, #0]
 8005ea8:	4a57      	ldr	r2, [pc, #348]	@ (8006008 <HAL_DMA_Init+0x66c>)
 8005eaa:	4293      	cmp	r3, r2
 8005eac:	d059      	beq.n	8005f62 <HAL_DMA_Init+0x5c6>
 8005eae:	687b      	ldr	r3, [r7, #4]
 8005eb0:	681b      	ldr	r3, [r3, #0]
 8005eb2:	4a56      	ldr	r2, [pc, #344]	@ (800600c <HAL_DMA_Init+0x670>)
 8005eb4:	4293      	cmp	r3, r2
 8005eb6:	d054      	beq.n	8005f62 <HAL_DMA_Init+0x5c6>
 8005eb8:	687b      	ldr	r3, [r7, #4]
 8005eba:	681b      	ldr	r3, [r3, #0]
 8005ebc:	4a54      	ldr	r2, [pc, #336]	@ (8006010 <HAL_DMA_Init+0x674>)
 8005ebe:	4293      	cmp	r3, r2
 8005ec0:	d04f      	beq.n	8005f62 <HAL_DMA_Init+0x5c6>
 8005ec2:	687b      	ldr	r3, [r7, #4]
 8005ec4:	681b      	ldr	r3, [r3, #0]
 8005ec6:	4a53      	ldr	r2, [pc, #332]	@ (8006014 <HAL_DMA_Init+0x678>)
 8005ec8:	4293      	cmp	r3, r2
 8005eca:	d04a      	beq.n	8005f62 <HAL_DMA_Init+0x5c6>
 8005ecc:	687b      	ldr	r3, [r7, #4]
 8005ece:	681b      	ldr	r3, [r3, #0]
 8005ed0:	4a51      	ldr	r2, [pc, #324]	@ (8006018 <HAL_DMA_Init+0x67c>)
 8005ed2:	4293      	cmp	r3, r2
 8005ed4:	d045      	beq.n	8005f62 <HAL_DMA_Init+0x5c6>
 8005ed6:	687b      	ldr	r3, [r7, #4]
 8005ed8:	681b      	ldr	r3, [r3, #0]
 8005eda:	4a50      	ldr	r2, [pc, #320]	@ (800601c <HAL_DMA_Init+0x680>)
 8005edc:	4293      	cmp	r3, r2
 8005ede:	d040      	beq.n	8005f62 <HAL_DMA_Init+0x5c6>
 8005ee0:	687b      	ldr	r3, [r7, #4]
 8005ee2:	681b      	ldr	r3, [r3, #0]
 8005ee4:	4a4e      	ldr	r2, [pc, #312]	@ (8006020 <HAL_DMA_Init+0x684>)
 8005ee6:	4293      	cmp	r3, r2
 8005ee8:	d03b      	beq.n	8005f62 <HAL_DMA_Init+0x5c6>
 8005eea:	687b      	ldr	r3, [r7, #4]
 8005eec:	681b      	ldr	r3, [r3, #0]
 8005eee:	4a4d      	ldr	r2, [pc, #308]	@ (8006024 <HAL_DMA_Init+0x688>)
 8005ef0:	4293      	cmp	r3, r2
 8005ef2:	d036      	beq.n	8005f62 <HAL_DMA_Init+0x5c6>
 8005ef4:	687b      	ldr	r3, [r7, #4]
 8005ef6:	681b      	ldr	r3, [r3, #0]
 8005ef8:	4a4b      	ldr	r2, [pc, #300]	@ (8006028 <HAL_DMA_Init+0x68c>)
 8005efa:	4293      	cmp	r3, r2
 8005efc:	d031      	beq.n	8005f62 <HAL_DMA_Init+0x5c6>
 8005efe:	687b      	ldr	r3, [r7, #4]
 8005f00:	681b      	ldr	r3, [r3, #0]
 8005f02:	4a4a      	ldr	r2, [pc, #296]	@ (800602c <HAL_DMA_Init+0x690>)
 8005f04:	4293      	cmp	r3, r2
 8005f06:	d02c      	beq.n	8005f62 <HAL_DMA_Init+0x5c6>
 8005f08:	687b      	ldr	r3, [r7, #4]
 8005f0a:	681b      	ldr	r3, [r3, #0]
 8005f0c:	4a48      	ldr	r2, [pc, #288]	@ (8006030 <HAL_DMA_Init+0x694>)
 8005f0e:	4293      	cmp	r3, r2
 8005f10:	d027      	beq.n	8005f62 <HAL_DMA_Init+0x5c6>
 8005f12:	687b      	ldr	r3, [r7, #4]
 8005f14:	681b      	ldr	r3, [r3, #0]
 8005f16:	4a47      	ldr	r2, [pc, #284]	@ (8006034 <HAL_DMA_Init+0x698>)
 8005f18:	4293      	cmp	r3, r2
 8005f1a:	d022      	beq.n	8005f62 <HAL_DMA_Init+0x5c6>
 8005f1c:	687b      	ldr	r3, [r7, #4]
 8005f1e:	681b      	ldr	r3, [r3, #0]
 8005f20:	4a45      	ldr	r2, [pc, #276]	@ (8006038 <HAL_DMA_Init+0x69c>)
 8005f22:	4293      	cmp	r3, r2
 8005f24:	d01d      	beq.n	8005f62 <HAL_DMA_Init+0x5c6>
 8005f26:	687b      	ldr	r3, [r7, #4]
 8005f28:	681b      	ldr	r3, [r3, #0]
 8005f2a:	4a44      	ldr	r2, [pc, #272]	@ (800603c <HAL_DMA_Init+0x6a0>)
 8005f2c:	4293      	cmp	r3, r2
 8005f2e:	d018      	beq.n	8005f62 <HAL_DMA_Init+0x5c6>
 8005f30:	687b      	ldr	r3, [r7, #4]
 8005f32:	681b      	ldr	r3, [r3, #0]
 8005f34:	4a42      	ldr	r2, [pc, #264]	@ (8006040 <HAL_DMA_Init+0x6a4>)
 8005f36:	4293      	cmp	r3, r2
 8005f38:	d013      	beq.n	8005f62 <HAL_DMA_Init+0x5c6>
 8005f3a:	687b      	ldr	r3, [r7, #4]
 8005f3c:	681b      	ldr	r3, [r3, #0]
 8005f3e:	4a41      	ldr	r2, [pc, #260]	@ (8006044 <HAL_DMA_Init+0x6a8>)
 8005f40:	4293      	cmp	r3, r2
 8005f42:	d00e      	beq.n	8005f62 <HAL_DMA_Init+0x5c6>
 8005f44:	687b      	ldr	r3, [r7, #4]
 8005f46:	681b      	ldr	r3, [r3, #0]
 8005f48:	4a3f      	ldr	r2, [pc, #252]	@ (8006048 <HAL_DMA_Init+0x6ac>)
 8005f4a:	4293      	cmp	r3, r2
 8005f4c:	d009      	beq.n	8005f62 <HAL_DMA_Init+0x5c6>
 8005f4e:	687b      	ldr	r3, [r7, #4]
 8005f50:	681b      	ldr	r3, [r3, #0]
 8005f52:	4a3e      	ldr	r2, [pc, #248]	@ (800604c <HAL_DMA_Init+0x6b0>)
 8005f54:	4293      	cmp	r3, r2
 8005f56:	d004      	beq.n	8005f62 <HAL_DMA_Init+0x5c6>
 8005f58:	687b      	ldr	r3, [r7, #4]
 8005f5a:	681b      	ldr	r3, [r3, #0]
 8005f5c:	4a3c      	ldr	r2, [pc, #240]	@ (8006050 <HAL_DMA_Init+0x6b4>)
 8005f5e:	4293      	cmp	r3, r2
 8005f60:	d101      	bne.n	8005f66 <HAL_DMA_Init+0x5ca>
 8005f62:	2301      	movs	r3, #1
 8005f64:	e000      	b.n	8005f68 <HAL_DMA_Init+0x5cc>
 8005f66:	2300      	movs	r3, #0
 8005f68:	2b00      	cmp	r3, #0
 8005f6a:	d032      	beq.n	8005fd2 <HAL_DMA_Init+0x636>
  {
    /* Initialize parameters for DMAMUX channel :
    DMAmuxChannel, DMAmuxChannelStatus and DMAmuxChannelStatusMask
    */
    DMA_CalcDMAMUXChannelBaseAndMask(hdma);
 8005f6c:	6878      	ldr	r0, [r7, #4]
 8005f6e:	f001 fe2d 	bl	8007bcc <DMA_CalcDMAMUXChannelBaseAndMask>

    if(hdma->Init.Direction == DMA_MEMORY_TO_MEMORY)
 8005f72:	687b      	ldr	r3, [r7, #4]
 8005f74:	689b      	ldr	r3, [r3, #8]
 8005f76:	2b80      	cmp	r3, #128	@ 0x80
 8005f78:	d102      	bne.n	8005f80 <HAL_DMA_Init+0x5e4>
    {
      /* if memory to memory force the request to 0*/
      hdma->Init.Request = DMA_REQUEST_MEM2MEM;
 8005f7a:	687b      	ldr	r3, [r7, #4]
 8005f7c:	2200      	movs	r2, #0
 8005f7e:	605a      	str	r2, [r3, #4]
    }

    /* Set peripheral request  to DMAMUX channel */
    hdma->DMAmuxChannel->CCR = (hdma->Init.Request & DMAMUX_CxCR_DMAREQ_ID);
 8005f80:	687b      	ldr	r3, [r7, #4]
 8005f82:	685a      	ldr	r2, [r3, #4]
 8005f84:	687b      	ldr	r3, [r7, #4]
 8005f86:	6e1b      	ldr	r3, [r3, #96]	@ 0x60
 8005f88:	b2d2      	uxtb	r2, r2
 8005f8a:	601a      	str	r2, [r3, #0]

    /* Clear the DMAMUX synchro overrun flag */
    hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask;
 8005f8c:	687b      	ldr	r3, [r7, #4]
 8005f8e:	6e5b      	ldr	r3, [r3, #100]	@ 0x64
 8005f90:	687a      	ldr	r2, [r7, #4]
 8005f92:	6e92      	ldr	r2, [r2, #104]	@ 0x68
 8005f94:	605a      	str	r2, [r3, #4]

    /* Initialize parameters for DMAMUX request generator :
    if the DMA request is DMA_REQUEST_GENERATOR0 to DMA_REQUEST_GENERATOR7
    */
    if((hdma->Init.Request >= DMA_REQUEST_GENERATOR0) && (hdma->Init.Request <= DMA_REQUEST_GENERATOR7))
 8005f96:	687b      	ldr	r3, [r7, #4]
 8005f98:	685b      	ldr	r3, [r3, #4]
 8005f9a:	2b00      	cmp	r3, #0
 8005f9c:	d010      	beq.n	8005fc0 <HAL_DMA_Init+0x624>
 8005f9e:	687b      	ldr	r3, [r7, #4]
 8005fa0:	685b      	ldr	r3, [r3, #4]
 8005fa2:	2b08      	cmp	r3, #8
 8005fa4:	d80c      	bhi.n	8005fc0 <HAL_DMA_Init+0x624>
    {
      /* Initialize parameters for DMAMUX request generator :
      DMAmuxRequestGen, DMAmuxRequestGenStatus and DMAmuxRequestGenStatusMask */
      DMA_CalcDMAMUXRequestGenBaseAndMask(hdma);
 8005fa6:	6878      	ldr	r0, [r7, #4]
 8005fa8:	f001 feaa 	bl	8007d00 <DMA_CalcDMAMUXRequestGenBaseAndMask>

      /* Reset the DMAMUX request generator register */
      hdma->DMAmuxRequestGen->RGCR = 0U;
 8005fac:	687b      	ldr	r3, [r7, #4]
 8005fae:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8005fb0:	2200      	movs	r2, #0
 8005fb2:	601a      	str	r2, [r3, #0]

      /* Clear the DMAMUX request generator overrun flag */
      hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask;
 8005fb4:	687b      	ldr	r3, [r7, #4]
 8005fb6:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 8005fb8:	687a      	ldr	r2, [r7, #4]
 8005fba:	6f52      	ldr	r2, [r2, #116]	@ 0x74
 8005fbc:	605a      	str	r2, [r3, #4]
 8005fbe:	e008      	b.n	8005fd2 <HAL_DMA_Init+0x636>
    }
    else
    {
      hdma->DMAmuxRequestGen = 0U;
 8005fc0:	687b      	ldr	r3, [r7, #4]
 8005fc2:	2200      	movs	r2, #0
 8005fc4:	66da      	str	r2, [r3, #108]	@ 0x6c
      hdma->DMAmuxRequestGenStatus = 0U;
 8005fc6:	687b      	ldr	r3, [r7, #4]
 8005fc8:	2200      	movs	r2, #0
 8005fca:	671a      	str	r2, [r3, #112]	@ 0x70
      hdma->DMAmuxRequestGenStatusMask = 0U;
 8005fcc:	687b      	ldr	r3, [r7, #4]
 8005fce:	2200      	movs	r2, #0
 8005fd0:	675a      	str	r2, [r3, #116]	@ 0x74
    }
  }

  /* Initialize the error code */
  hdma->ErrorCode = HAL_DMA_ERROR_NONE;
 8005fd2:	687b      	ldr	r3, [r7, #4]
 8005fd4:	2200      	movs	r2, #0
 8005fd6:	655a      	str	r2, [r3, #84]	@ 0x54

  /* Initialize the DMA state */
  hdma->State = HAL_DMA_STATE_READY;
 8005fd8:	687b      	ldr	r3, [r7, #4]
 8005fda:	2201      	movs	r2, #1
 8005fdc:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

  return HAL_OK;
 8005fe0:	2300      	movs	r3, #0
}
 8005fe2:	4618      	mov	r0, r3
 8005fe4:	3718      	adds	r7, #24
 8005fe6:	46bd      	mov	sp, r7
 8005fe8:	bd80      	pop	{r7, pc}
 8005fea:	bf00      	nop
 8005fec:	a7fdabf8 	.word	0xa7fdabf8
 8005ff0:	cccccccd 	.word	0xcccccccd
 8005ff4:	40020010 	.word	0x40020010
 8005ff8:	40020028 	.word	0x40020028
 8005ffc:	40020040 	.word	0x40020040
 8006000:	40020058 	.word	0x40020058
 8006004:	40020070 	.word	0x40020070
 8006008:	40020088 	.word	0x40020088
 800600c:	400200a0 	.word	0x400200a0
 8006010:	400200b8 	.word	0x400200b8
 8006014:	40020410 	.word	0x40020410
 8006018:	40020428 	.word	0x40020428
 800601c:	40020440 	.word	0x40020440
 8006020:	40020458 	.word	0x40020458
 8006024:	40020470 	.word	0x40020470
 8006028:	40020488 	.word	0x40020488
 800602c:	400204a0 	.word	0x400204a0
 8006030:	400204b8 	.word	0x400204b8
 8006034:	58025408 	.word	0x58025408
 8006038:	5802541c 	.word	0x5802541c
 800603c:	58025430 	.word	0x58025430
 8006040:	58025444 	.word	0x58025444
 8006044:	58025458 	.word	0x58025458
 8006048:	5802546c 	.word	0x5802546c
 800604c:	58025480 	.word	0x58025480
 8006050:	58025494 	.word	0x58025494

08006054 <HAL_DMA_Abort>:
  *        and the Stream will be effectively disabled only after the transfer of
  *        this single data is finished.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma)
{
 8006054:	b580      	push	{r7, lr}
 8006056:	b086      	sub	sp, #24
 8006058:	af00      	add	r7, sp, #0
 800605a:	6078      	str	r0, [r7, #4]
  /* calculate DMA base and stream number */
  DMA_Base_Registers *regs_dma;
  BDMA_Base_Registers *regs_bdma;
  const __IO uint32_t *enableRegister;

  uint32_t tickstart = HAL_GetTick();
 800605c:	f7ff f8f0 	bl	8005240 <HAL_GetTick>
 8006060:	6138      	str	r0, [r7, #16]

 /* Check the DMA peripheral handle */
  if(hdma == NULL)
 8006062:	687b      	ldr	r3, [r7, #4]
 8006064:	2b00      	cmp	r3, #0
 8006066:	d101      	bne.n	800606c <HAL_DMA_Abort+0x18>
  {
    return HAL_ERROR;
 8006068:	2301      	movs	r3, #1
 800606a:	e2dc      	b.n	8006626 <HAL_DMA_Abort+0x5d2>
  }

  /* Check the DMA peripheral state */
  if(hdma->State != HAL_DMA_STATE_BUSY)
 800606c:	687b      	ldr	r3, [r7, #4]
 800606e:	f893 3035 	ldrb.w	r3, [r3, #53]	@ 0x35
 8006072:	b2db      	uxtb	r3, r3
 8006074:	2b02      	cmp	r3, #2
 8006076:	d008      	beq.n	800608a <HAL_DMA_Abort+0x36>
  {
    hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
 8006078:	687b      	ldr	r3, [r7, #4]
 800607a:	2280      	movs	r2, #128	@ 0x80
 800607c:	655a      	str	r2, [r3, #84]	@ 0x54

    /* Process Unlocked */
    __HAL_UNLOCK(hdma);
 800607e:	687b      	ldr	r3, [r7, #4]
 8006080:	2200      	movs	r2, #0
 8006082:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34

    return HAL_ERROR;
 8006086:	2301      	movs	r3, #1
 8006088:	e2cd      	b.n	8006626 <HAL_DMA_Abort+0x5d2>
  }
  else
  {
    /* Disable all the transfer interrupts */
    if(IS_DMA_STREAM_INSTANCE(hdma->Instance) != 0U) /* DMA1 or DMA2 instance */
 800608a:	687b      	ldr	r3, [r7, #4]
 800608c:	681b      	ldr	r3, [r3, #0]
 800608e:	4a76      	ldr	r2, [pc, #472]	@ (8006268 <HAL_DMA_Abort+0x214>)
 8006090:	4293      	cmp	r3, r2
 8006092:	d04a      	beq.n	800612a <HAL_DMA_Abort+0xd6>
 8006094:	687b      	ldr	r3, [r7, #4]
 8006096:	681b      	ldr	r3, [r3, #0]
 8006098:	4a74      	ldr	r2, [pc, #464]	@ (800626c <HAL_DMA_Abort+0x218>)
 800609a:	4293      	cmp	r3, r2
 800609c:	d045      	beq.n	800612a <HAL_DMA_Abort+0xd6>
 800609e:	687b      	ldr	r3, [r7, #4]
 80060a0:	681b      	ldr	r3, [r3, #0]
 80060a2:	4a73      	ldr	r2, [pc, #460]	@ (8006270 <HAL_DMA_Abort+0x21c>)
 80060a4:	4293      	cmp	r3, r2
 80060a6:	d040      	beq.n	800612a <HAL_DMA_Abort+0xd6>
 80060a8:	687b      	ldr	r3, [r7, #4]
 80060aa:	681b      	ldr	r3, [r3, #0]
 80060ac:	4a71      	ldr	r2, [pc, #452]	@ (8006274 <HAL_DMA_Abort+0x220>)
 80060ae:	4293      	cmp	r3, r2
 80060b0:	d03b      	beq.n	800612a <HAL_DMA_Abort+0xd6>
 80060b2:	687b      	ldr	r3, [r7, #4]
 80060b4:	681b      	ldr	r3, [r3, #0]
 80060b6:	4a70      	ldr	r2, [pc, #448]	@ (8006278 <HAL_DMA_Abort+0x224>)
 80060b8:	4293      	cmp	r3, r2
 80060ba:	d036      	beq.n	800612a <HAL_DMA_Abort+0xd6>
 80060bc:	687b      	ldr	r3, [r7, #4]
 80060be:	681b      	ldr	r3, [r3, #0]
 80060c0:	4a6e      	ldr	r2, [pc, #440]	@ (800627c <HAL_DMA_Abort+0x228>)
 80060c2:	4293      	cmp	r3, r2
 80060c4:	d031      	beq.n	800612a <HAL_DMA_Abort+0xd6>
 80060c6:	687b      	ldr	r3, [r7, #4]
 80060c8:	681b      	ldr	r3, [r3, #0]
 80060ca:	4a6d      	ldr	r2, [pc, #436]	@ (8006280 <HAL_DMA_Abort+0x22c>)
 80060cc:	4293      	cmp	r3, r2
 80060ce:	d02c      	beq.n	800612a <HAL_DMA_Abort+0xd6>
 80060d0:	687b      	ldr	r3, [r7, #4]
 80060d2:	681b      	ldr	r3, [r3, #0]
 80060d4:	4a6b      	ldr	r2, [pc, #428]	@ (8006284 <HAL_DMA_Abort+0x230>)
 80060d6:	4293      	cmp	r3, r2
 80060d8:	d027      	beq.n	800612a <HAL_DMA_Abort+0xd6>
 80060da:	687b      	ldr	r3, [r7, #4]
 80060dc:	681b      	ldr	r3, [r3, #0]
 80060de:	4a6a      	ldr	r2, [pc, #424]	@ (8006288 <HAL_DMA_Abort+0x234>)
 80060e0:	4293      	cmp	r3, r2
 80060e2:	d022      	beq.n	800612a <HAL_DMA_Abort+0xd6>
 80060e4:	687b      	ldr	r3, [r7, #4]
 80060e6:	681b      	ldr	r3, [r3, #0]
 80060e8:	4a68      	ldr	r2, [pc, #416]	@ (800628c <HAL_DMA_Abort+0x238>)
 80060ea:	4293      	cmp	r3, r2
 80060ec:	d01d      	beq.n	800612a <HAL_DMA_Abort+0xd6>
 80060ee:	687b      	ldr	r3, [r7, #4]
 80060f0:	681b      	ldr	r3, [r3, #0]
 80060f2:	4a67      	ldr	r2, [pc, #412]	@ (8006290 <HAL_DMA_Abort+0x23c>)
 80060f4:	4293      	cmp	r3, r2
 80060f6:	d018      	beq.n	800612a <HAL_DMA_Abort+0xd6>
 80060f8:	687b      	ldr	r3, [r7, #4]
 80060fa:	681b      	ldr	r3, [r3, #0]
 80060fc:	4a65      	ldr	r2, [pc, #404]	@ (8006294 <HAL_DMA_Abort+0x240>)
 80060fe:	4293      	cmp	r3, r2
 8006100:	d013      	beq.n	800612a <HAL_DMA_Abort+0xd6>
 8006102:	687b      	ldr	r3, [r7, #4]
 8006104:	681b      	ldr	r3, [r3, #0]
 8006106:	4a64      	ldr	r2, [pc, #400]	@ (8006298 <HAL_DMA_Abort+0x244>)
 8006108:	4293      	cmp	r3, r2
 800610a:	d00e      	beq.n	800612a <HAL_DMA_Abort+0xd6>
 800610c:	687b      	ldr	r3, [r7, #4]
 800610e:	681b      	ldr	r3, [r3, #0]
 8006110:	4a62      	ldr	r2, [pc, #392]	@ (800629c <HAL_DMA_Abort+0x248>)
 8006112:	4293      	cmp	r3, r2
 8006114:	d009      	beq.n	800612a <HAL_DMA_Abort+0xd6>
 8006116:	687b      	ldr	r3, [r7, #4]
 8006118:	681b      	ldr	r3, [r3, #0]
 800611a:	4a61      	ldr	r2, [pc, #388]	@ (80062a0 <HAL_DMA_Abort+0x24c>)
 800611c:	4293      	cmp	r3, r2
 800611e:	d004      	beq.n	800612a <HAL_DMA_Abort+0xd6>
 8006120:	687b      	ldr	r3, [r7, #4]
 8006122:	681b      	ldr	r3, [r3, #0]
 8006124:	4a5f      	ldr	r2, [pc, #380]	@ (80062a4 <HAL_DMA_Abort+0x250>)
 8006126:	4293      	cmp	r3, r2
 8006128:	d101      	bne.n	800612e <HAL_DMA_Abort+0xda>
 800612a:	2301      	movs	r3, #1
 800612c:	e000      	b.n	8006130 <HAL_DMA_Abort+0xdc>
 800612e:	2300      	movs	r3, #0
 8006130:	2b00      	cmp	r3, #0
 8006132:	d013      	beq.n	800615c <HAL_DMA_Abort+0x108>
    {
       /* Disable DMA All Interrupts  */
      ((DMA_Stream_TypeDef   *)hdma->Instance)->CR  &= ~(DMA_IT_TC | DMA_IT_TE | DMA_IT_DME | DMA_IT_HT);
 8006134:	687b      	ldr	r3, [r7, #4]
 8006136:	681b      	ldr	r3, [r3, #0]
 8006138:	681a      	ldr	r2, [r3, #0]
 800613a:	687b      	ldr	r3, [r7, #4]
 800613c:	681b      	ldr	r3, [r3, #0]
 800613e:	f022 021e 	bic.w	r2, r2, #30
 8006142:	601a      	str	r2, [r3, #0]
      ((DMA_Stream_TypeDef   *)hdma->Instance)->FCR &= ~(DMA_IT_FE);
 8006144:	687b      	ldr	r3, [r7, #4]
 8006146:	681b      	ldr	r3, [r3, #0]
 8006148:	695a      	ldr	r2, [r3, #20]
 800614a:	687b      	ldr	r3, [r7, #4]
 800614c:	681b      	ldr	r3, [r3, #0]
 800614e:	f022 0280 	bic.w	r2, r2, #128	@ 0x80
 8006152:	615a      	str	r2, [r3, #20]

      enableRegister = (__IO uint32_t *)(&(((DMA_Stream_TypeDef   *)hdma->Instance)->CR));
 8006154:	687b      	ldr	r3, [r7, #4]
 8006156:	681b      	ldr	r3, [r3, #0]
 8006158:	617b      	str	r3, [r7, #20]
 800615a:	e00a      	b.n	8006172 <HAL_DMA_Abort+0x11e>
    }
    else /* BDMA channel */
    {
      /* Disable DMA All Interrupts */
      ((BDMA_Channel_TypeDef   *)hdma->Instance)->CCR  &= ~(BDMA_CCR_TCIE | BDMA_CCR_HTIE | BDMA_CCR_TEIE);
 800615c:	687b      	ldr	r3, [r7, #4]
 800615e:	681b      	ldr	r3, [r3, #0]
 8006160:	681a      	ldr	r2, [r3, #0]
 8006162:	687b      	ldr	r3, [r7, #4]
 8006164:	681b      	ldr	r3, [r3, #0]
 8006166:	f022 020e 	bic.w	r2, r2, #14
 800616a:	601a      	str	r2, [r3, #0]

      enableRegister = (__IO uint32_t *)(&(((BDMA_Channel_TypeDef   *)hdma->Instance)->CCR));
 800616c:	687b      	ldr	r3, [r7, #4]
 800616e:	681b      	ldr	r3, [r3, #0]
 8006170:	617b      	str	r3, [r7, #20]
    }

    if(IS_DMA_DMAMUX_ALL_INSTANCE(hdma->Instance) != 0U) /* No DMAMUX available for BDMA1 */
 8006172:	687b      	ldr	r3, [r7, #4]
 8006174:	681b      	ldr	r3, [r3, #0]
 8006176:	4a3c      	ldr	r2, [pc, #240]	@ (8006268 <HAL_DMA_Abort+0x214>)
 8006178:	4293      	cmp	r3, r2
 800617a:	d072      	beq.n	8006262 <HAL_DMA_Abort+0x20e>
 800617c:	687b      	ldr	r3, [r7, #4]
 800617e:	681b      	ldr	r3, [r3, #0]
 8006180:	4a3a      	ldr	r2, [pc, #232]	@ (800626c <HAL_DMA_Abort+0x218>)
 8006182:	4293      	cmp	r3, r2
 8006184:	d06d      	beq.n	8006262 <HAL_DMA_Abort+0x20e>
 8006186:	687b      	ldr	r3, [r7, #4]
 8006188:	681b      	ldr	r3, [r3, #0]
 800618a:	4a39      	ldr	r2, [pc, #228]	@ (8006270 <HAL_DMA_Abort+0x21c>)
 800618c:	4293      	cmp	r3, r2
 800618e:	d068      	beq.n	8006262 <HAL_DMA_Abort+0x20e>
 8006190:	687b      	ldr	r3, [r7, #4]
 8006192:	681b      	ldr	r3, [r3, #0]
 8006194:	4a37      	ldr	r2, [pc, #220]	@ (8006274 <HAL_DMA_Abort+0x220>)
 8006196:	4293      	cmp	r3, r2
 8006198:	d063      	beq.n	8006262 <HAL_DMA_Abort+0x20e>
 800619a:	687b      	ldr	r3, [r7, #4]
 800619c:	681b      	ldr	r3, [r3, #0]
 800619e:	4a36      	ldr	r2, [pc, #216]	@ (8006278 <HAL_DMA_Abort+0x224>)
 80061a0:	4293      	cmp	r3, r2
 80061a2:	d05e      	beq.n	8006262 <HAL_DMA_Abort+0x20e>
 80061a4:	687b      	ldr	r3, [r7, #4]
 80061a6:	681b      	ldr	r3, [r3, #0]
 80061a8:	4a34      	ldr	r2, [pc, #208]	@ (800627c <HAL_DMA_Abort+0x228>)
 80061aa:	4293      	cmp	r3, r2
 80061ac:	d059      	beq.n	8006262 <HAL_DMA_Abort+0x20e>
 80061ae:	687b      	ldr	r3, [r7, #4]
 80061b0:	681b      	ldr	r3, [r3, #0]
 80061b2:	4a33      	ldr	r2, [pc, #204]	@ (8006280 <HAL_DMA_Abort+0x22c>)
 80061b4:	4293      	cmp	r3, r2
 80061b6:	d054      	beq.n	8006262 <HAL_DMA_Abort+0x20e>
 80061b8:	687b      	ldr	r3, [r7, #4]
 80061ba:	681b      	ldr	r3, [r3, #0]
 80061bc:	4a31      	ldr	r2, [pc, #196]	@ (8006284 <HAL_DMA_Abort+0x230>)
 80061be:	4293      	cmp	r3, r2
 80061c0:	d04f      	beq.n	8006262 <HAL_DMA_Abort+0x20e>
 80061c2:	687b      	ldr	r3, [r7, #4]
 80061c4:	681b      	ldr	r3, [r3, #0]
 80061c6:	4a30      	ldr	r2, [pc, #192]	@ (8006288 <HAL_DMA_Abort+0x234>)
 80061c8:	4293      	cmp	r3, r2
 80061ca:	d04a      	beq.n	8006262 <HAL_DMA_Abort+0x20e>
 80061cc:	687b      	ldr	r3, [r7, #4]
 80061ce:	681b      	ldr	r3, [r3, #0]
 80061d0:	4a2e      	ldr	r2, [pc, #184]	@ (800628c <HAL_DMA_Abort+0x238>)
 80061d2:	4293      	cmp	r3, r2
 80061d4:	d045      	beq.n	8006262 <HAL_DMA_Abort+0x20e>
 80061d6:	687b      	ldr	r3, [r7, #4]
 80061d8:	681b      	ldr	r3, [r3, #0]
 80061da:	4a2d      	ldr	r2, [pc, #180]	@ (8006290 <HAL_DMA_Abort+0x23c>)
 80061dc:	4293      	cmp	r3, r2
 80061de:	d040      	beq.n	8006262 <HAL_DMA_Abort+0x20e>
 80061e0:	687b      	ldr	r3, [r7, #4]
 80061e2:	681b      	ldr	r3, [r3, #0]
 80061e4:	4a2b      	ldr	r2, [pc, #172]	@ (8006294 <HAL_DMA_Abort+0x240>)
 80061e6:	4293      	cmp	r3, r2
 80061e8:	d03b      	beq.n	8006262 <HAL_DMA_Abort+0x20e>
 80061ea:	687b      	ldr	r3, [r7, #4]
 80061ec:	681b      	ldr	r3, [r3, #0]
 80061ee:	4a2a      	ldr	r2, [pc, #168]	@ (8006298 <HAL_DMA_Abort+0x244>)
 80061f0:	4293      	cmp	r3, r2
 80061f2:	d036      	beq.n	8006262 <HAL_DMA_Abort+0x20e>
 80061f4:	687b      	ldr	r3, [r7, #4]
 80061f6:	681b      	ldr	r3, [r3, #0]
 80061f8:	4a28      	ldr	r2, [pc, #160]	@ (800629c <HAL_DMA_Abort+0x248>)
 80061fa:	4293      	cmp	r3, r2
 80061fc:	d031      	beq.n	8006262 <HAL_DMA_Abort+0x20e>
 80061fe:	687b      	ldr	r3, [r7, #4]
 8006200:	681b      	ldr	r3, [r3, #0]
 8006202:	4a27      	ldr	r2, [pc, #156]	@ (80062a0 <HAL_DMA_Abort+0x24c>)
 8006204:	4293      	cmp	r3, r2
 8006206:	d02c      	beq.n	8006262 <HAL_DMA_Abort+0x20e>
 8006208:	687b      	ldr	r3, [r7, #4]
 800620a:	681b      	ldr	r3, [r3, #0]
 800620c:	4a25      	ldr	r2, [pc, #148]	@ (80062a4 <HAL_DMA_Abort+0x250>)
 800620e:	4293      	cmp	r3, r2
 8006210:	d027      	beq.n	8006262 <HAL_DMA_Abort+0x20e>
 8006212:	687b      	ldr	r3, [r7, #4]
 8006214:	681b      	ldr	r3, [r3, #0]
 8006216:	4a24      	ldr	r2, [pc, #144]	@ (80062a8 <HAL_DMA_Abort+0x254>)
 8006218:	4293      	cmp	r3, r2
 800621a:	d022      	beq.n	8006262 <HAL_DMA_Abort+0x20e>
 800621c:	687b      	ldr	r3, [r7, #4]
 800621e:	681b      	ldr	r3, [r3, #0]
 8006220:	4a22      	ldr	r2, [pc, #136]	@ (80062ac <HAL_DMA_Abort+0x258>)
 8006222:	4293      	cmp	r3, r2
 8006224:	d01d      	beq.n	8006262 <HAL_DMA_Abort+0x20e>
 8006226:	687b      	ldr	r3, [r7, #4]
 8006228:	681b      	ldr	r3, [r3, #0]
 800622a:	4a21      	ldr	r2, [pc, #132]	@ (80062b0 <HAL_DMA_Abort+0x25c>)
 800622c:	4293      	cmp	r3, r2
 800622e:	d018      	beq.n	8006262 <HAL_DMA_Abort+0x20e>
 8006230:	687b      	ldr	r3, [r7, #4]
 8006232:	681b      	ldr	r3, [r3, #0]
 8006234:	4a1f      	ldr	r2, [pc, #124]	@ (80062b4 <HAL_DMA_Abort+0x260>)
 8006236:	4293      	cmp	r3, r2
 8006238:	d013      	beq.n	8006262 <HAL_DMA_Abort+0x20e>
 800623a:	687b      	ldr	r3, [r7, #4]
 800623c:	681b      	ldr	r3, [r3, #0]
 800623e:	4a1e      	ldr	r2, [pc, #120]	@ (80062b8 <HAL_DMA_Abort+0x264>)
 8006240:	4293      	cmp	r3, r2
 8006242:	d00e      	beq.n	8006262 <HAL_DMA_Abort+0x20e>
 8006244:	687b      	ldr	r3, [r7, #4]
 8006246:	681b      	ldr	r3, [r3, #0]
 8006248:	4a1c      	ldr	r2, [pc, #112]	@ (80062bc <HAL_DMA_Abort+0x268>)
 800624a:	4293      	cmp	r3, r2
 800624c:	d009      	beq.n	8006262 <HAL_DMA_Abort+0x20e>
 800624e:	687b      	ldr	r3, [r7, #4]
 8006250:	681b      	ldr	r3, [r3, #0]
 8006252:	4a1b      	ldr	r2, [pc, #108]	@ (80062c0 <HAL_DMA_Abort+0x26c>)
 8006254:	4293      	cmp	r3, r2
 8006256:	d004      	beq.n	8006262 <HAL_DMA_Abort+0x20e>
 8006258:	687b      	ldr	r3, [r7, #4]
 800625a:	681b      	ldr	r3, [r3, #0]
 800625c:	4a19      	ldr	r2, [pc, #100]	@ (80062c4 <HAL_DMA_Abort+0x270>)
 800625e:	4293      	cmp	r3, r2
 8006260:	d132      	bne.n	80062c8 <HAL_DMA_Abort+0x274>
 8006262:	2301      	movs	r3, #1
 8006264:	e031      	b.n	80062ca <HAL_DMA_Abort+0x276>
 8006266:	bf00      	nop
 8006268:	40020010 	.word	0x40020010
 800626c:	40020028 	.word	0x40020028
 8006270:	40020040 	.word	0x40020040
 8006274:	40020058 	.word	0x40020058
 8006278:	40020070 	.word	0x40020070
 800627c:	40020088 	.word	0x40020088
 8006280:	400200a0 	.word	0x400200a0
 8006284:	400200b8 	.word	0x400200b8
 8006288:	40020410 	.word	0x40020410
 800628c:	40020428 	.word	0x40020428
 8006290:	40020440 	.word	0x40020440
 8006294:	40020458 	.word	0x40020458
 8006298:	40020470 	.word	0x40020470
 800629c:	40020488 	.word	0x40020488
 80062a0:	400204a0 	.word	0x400204a0
 80062a4:	400204b8 	.word	0x400204b8
 80062a8:	58025408 	.word	0x58025408
 80062ac:	5802541c 	.word	0x5802541c
 80062b0:	58025430 	.word	0x58025430
 80062b4:	58025444 	.word	0x58025444
 80062b8:	58025458 	.word	0x58025458
 80062bc:	5802546c 	.word	0x5802546c
 80062c0:	58025480 	.word	0x58025480
 80062c4:	58025494 	.word	0x58025494
 80062c8:	2300      	movs	r3, #0
 80062ca:	2b00      	cmp	r3, #0
 80062cc:	d007      	beq.n	80062de <HAL_DMA_Abort+0x28a>
    {
      /* disable the DMAMUX sync overrun IT */
      hdma->DMAmuxChannel->CCR &= ~DMAMUX_CxCR_SOIE;
 80062ce:	687b      	ldr	r3, [r7, #4]
 80062d0:	6e1b      	ldr	r3, [r3, #96]	@ 0x60
 80062d2:	681a      	ldr	r2, [r3, #0]
 80062d4:	687b      	ldr	r3, [r7, #4]
 80062d6:	6e1b      	ldr	r3, [r3, #96]	@ 0x60
 80062d8:	f422 7280 	bic.w	r2, r2, #256	@ 0x100
 80062dc:	601a      	str	r2, [r3, #0]
    }

    /* Disable the stream */
    __HAL_DMA_DISABLE(hdma);
 80062de:	687b      	ldr	r3, [r7, #4]
 80062e0:	681b      	ldr	r3, [r3, #0]
 80062e2:	4a6d      	ldr	r2, [pc, #436]	@ (8006498 <HAL_DMA_Abort+0x444>)
 80062e4:	4293      	cmp	r3, r2
 80062e6:	d04a      	beq.n	800637e <HAL_DMA_Abort+0x32a>
 80062e8:	687b      	ldr	r3, [r7, #4]
 80062ea:	681b      	ldr	r3, [r3, #0]
 80062ec:	4a6b      	ldr	r2, [pc, #428]	@ (800649c <HAL_DMA_Abort+0x448>)
 80062ee:	4293      	cmp	r3, r2
 80062f0:	d045      	beq.n	800637e <HAL_DMA_Abort+0x32a>
 80062f2:	687b      	ldr	r3, [r7, #4]
 80062f4:	681b      	ldr	r3, [r3, #0]
 80062f6:	4a6a      	ldr	r2, [pc, #424]	@ (80064a0 <HAL_DMA_Abort+0x44c>)
 80062f8:	4293      	cmp	r3, r2
 80062fa:	d040      	beq.n	800637e <HAL_DMA_Abort+0x32a>
 80062fc:	687b      	ldr	r3, [r7, #4]
 80062fe:	681b      	ldr	r3, [r3, #0]
 8006300:	4a68      	ldr	r2, [pc, #416]	@ (80064a4 <HAL_DMA_Abort+0x450>)
 8006302:	4293      	cmp	r3, r2
 8006304:	d03b      	beq.n	800637e <HAL_DMA_Abort+0x32a>
 8006306:	687b      	ldr	r3, [r7, #4]
 8006308:	681b      	ldr	r3, [r3, #0]
 800630a:	4a67      	ldr	r2, [pc, #412]	@ (80064a8 <HAL_DMA_Abort+0x454>)
 800630c:	4293      	cmp	r3, r2
 800630e:	d036      	beq.n	800637e <HAL_DMA_Abort+0x32a>
 8006310:	687b      	ldr	r3, [r7, #4]
 8006312:	681b      	ldr	r3, [r3, #0]
 8006314:	4a65      	ldr	r2, [pc, #404]	@ (80064ac <HAL_DMA_Abort+0x458>)
 8006316:	4293      	cmp	r3, r2
 8006318:	d031      	beq.n	800637e <HAL_DMA_Abort+0x32a>
 800631a:	687b      	ldr	r3, [r7, #4]
 800631c:	681b      	ldr	r3, [r3, #0]
 800631e:	4a64      	ldr	r2, [pc, #400]	@ (80064b0 <HAL_DMA_Abort+0x45c>)
 8006320:	4293      	cmp	r3, r2
 8006322:	d02c      	beq.n	800637e <HAL_DMA_Abort+0x32a>
 8006324:	687b      	ldr	r3, [r7, #4]
 8006326:	681b      	ldr	r3, [r3, #0]
 8006328:	4a62      	ldr	r2, [pc, #392]	@ (80064b4 <HAL_DMA_Abort+0x460>)
 800632a:	4293      	cmp	r3, r2
 800632c:	d027      	beq.n	800637e <HAL_DMA_Abort+0x32a>
 800632e:	687b      	ldr	r3, [r7, #4]
 8006330:	681b      	ldr	r3, [r3, #0]
 8006332:	4a61      	ldr	r2, [pc, #388]	@ (80064b8 <HAL_DMA_Abort+0x464>)
 8006334:	4293      	cmp	r3, r2
 8006336:	d022      	beq.n	800637e <HAL_DMA_Abort+0x32a>
 8006338:	687b      	ldr	r3, [r7, #4]
 800633a:	681b      	ldr	r3, [r3, #0]
 800633c:	4a5f      	ldr	r2, [pc, #380]	@ (80064bc <HAL_DMA_Abort+0x468>)
 800633e:	4293      	cmp	r3, r2
 8006340:	d01d      	beq.n	800637e <HAL_DMA_Abort+0x32a>
 8006342:	687b      	ldr	r3, [r7, #4]
 8006344:	681b      	ldr	r3, [r3, #0]
 8006346:	4a5e      	ldr	r2, [pc, #376]	@ (80064c0 <HAL_DMA_Abort+0x46c>)
 8006348:	4293      	cmp	r3, r2
 800634a:	d018      	beq.n	800637e <HAL_DMA_Abort+0x32a>
 800634c:	687b      	ldr	r3, [r7, #4]
 800634e:	681b      	ldr	r3, [r3, #0]
 8006350:	4a5c      	ldr	r2, [pc, #368]	@ (80064c4 <HAL_DMA_Abort+0x470>)
 8006352:	4293      	cmp	r3, r2
 8006354:	d013      	beq.n	800637e <HAL_DMA_Abort+0x32a>
 8006356:	687b      	ldr	r3, [r7, #4]
 8006358:	681b      	ldr	r3, [r3, #0]
 800635a:	4a5b      	ldr	r2, [pc, #364]	@ (80064c8 <HAL_DMA_Abort+0x474>)
 800635c:	4293      	cmp	r3, r2
 800635e:	d00e      	beq.n	800637e <HAL_DMA_Abort+0x32a>
 8006360:	687b      	ldr	r3, [r7, #4]
 8006362:	681b      	ldr	r3, [r3, #0]
 8006364:	4a59      	ldr	r2, [pc, #356]	@ (80064cc <HAL_DMA_Abort+0x478>)
 8006366:	4293      	cmp	r3, r2
 8006368:	d009      	beq.n	800637e <HAL_DMA_Abort+0x32a>
 800636a:	687b      	ldr	r3, [r7, #4]
 800636c:	681b      	ldr	r3, [r3, #0]
 800636e:	4a58      	ldr	r2, [pc, #352]	@ (80064d0 <HAL_DMA_Abort+0x47c>)
 8006370:	4293      	cmp	r3, r2
 8006372:	d004      	beq.n	800637e <HAL_DMA_Abort+0x32a>
 8006374:	687b      	ldr	r3, [r7, #4]
 8006376:	681b      	ldr	r3, [r3, #0]
 8006378:	4a56      	ldr	r2, [pc, #344]	@ (80064d4 <HAL_DMA_Abort+0x480>)
 800637a:	4293      	cmp	r3, r2
 800637c:	d108      	bne.n	8006390 <HAL_DMA_Abort+0x33c>
 800637e:	687b      	ldr	r3, [r7, #4]
 8006380:	681b      	ldr	r3, [r3, #0]
 8006382:	681a      	ldr	r2, [r3, #0]
 8006384:	687b      	ldr	r3, [r7, #4]
 8006386:	681b      	ldr	r3, [r3, #0]
 8006388:	f022 0201 	bic.w	r2, r2, #1
 800638c:	601a      	str	r2, [r3, #0]
 800638e:	e007      	b.n	80063a0 <HAL_DMA_Abort+0x34c>
 8006390:	687b      	ldr	r3, [r7, #4]
 8006392:	681b      	ldr	r3, [r3, #0]
 8006394:	681a      	ldr	r2, [r3, #0]
 8006396:	687b      	ldr	r3, [r7, #4]
 8006398:	681b      	ldr	r3, [r3, #0]
 800639a:	f022 0201 	bic.w	r2, r2, #1
 800639e:	601a      	str	r2, [r3, #0]

    /* Check if the DMA Stream is effectively disabled */
    while(((*enableRegister) & DMA_SxCR_EN) != 0U)
 80063a0:	e013      	b.n	80063ca <HAL_DMA_Abort+0x376>
    {
      /* Check for the Timeout */
      if((HAL_GetTick() - tickstart ) > HAL_TIMEOUT_DMA_ABORT)
 80063a2:	f7fe ff4d 	bl	8005240 <HAL_GetTick>
 80063a6:	4602      	mov	r2, r0
 80063a8:	693b      	ldr	r3, [r7, #16]
 80063aa:	1ad3      	subs	r3, r2, r3
 80063ac:	2b05      	cmp	r3, #5
 80063ae:	d90c      	bls.n	80063ca <HAL_DMA_Abort+0x376>
      {
        /* Update error code */
        hdma->ErrorCode = HAL_DMA_ERROR_TIMEOUT;
 80063b0:	687b      	ldr	r3, [r7, #4]
 80063b2:	2220      	movs	r2, #32
 80063b4:	655a      	str	r2, [r3, #84]	@ 0x54

        /* Change the DMA state */
        hdma->State = HAL_DMA_STATE_ERROR;
 80063b6:	687b      	ldr	r3, [r7, #4]
 80063b8:	2203      	movs	r2, #3
 80063ba:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

        /* Process Unlocked */
        __HAL_UNLOCK(hdma);
 80063be:	687b      	ldr	r3, [r7, #4]
 80063c0:	2200      	movs	r2, #0
 80063c2:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34

        return HAL_ERROR;
 80063c6:	2301      	movs	r3, #1
 80063c8:	e12d      	b.n	8006626 <HAL_DMA_Abort+0x5d2>
    while(((*enableRegister) & DMA_SxCR_EN) != 0U)
 80063ca:	697b      	ldr	r3, [r7, #20]
 80063cc:	681b      	ldr	r3, [r3, #0]
 80063ce:	f003 0301 	and.w	r3, r3, #1
 80063d2:	2b00      	cmp	r3, #0
 80063d4:	d1e5      	bne.n	80063a2 <HAL_DMA_Abort+0x34e>
      }
    }

    /* Clear all interrupt flags at correct offset within the register */
    if(IS_DMA_STREAM_INSTANCE(hdma->Instance) != 0U) /* DMA1 or DMA2 instance */
 80063d6:	687b      	ldr	r3, [r7, #4]
 80063d8:	681b      	ldr	r3, [r3, #0]
 80063da:	4a2f      	ldr	r2, [pc, #188]	@ (8006498 <HAL_DMA_Abort+0x444>)
 80063dc:	4293      	cmp	r3, r2
 80063de:	d04a      	beq.n	8006476 <HAL_DMA_Abort+0x422>
 80063e0:	687b      	ldr	r3, [r7, #4]
 80063e2:	681b      	ldr	r3, [r3, #0]
 80063e4:	4a2d      	ldr	r2, [pc, #180]	@ (800649c <HAL_DMA_Abort+0x448>)
 80063e6:	4293      	cmp	r3, r2
 80063e8:	d045      	beq.n	8006476 <HAL_DMA_Abort+0x422>
 80063ea:	687b      	ldr	r3, [r7, #4]
 80063ec:	681b      	ldr	r3, [r3, #0]
 80063ee:	4a2c      	ldr	r2, [pc, #176]	@ (80064a0 <HAL_DMA_Abort+0x44c>)
 80063f0:	4293      	cmp	r3, r2
 80063f2:	d040      	beq.n	8006476 <HAL_DMA_Abort+0x422>
 80063f4:	687b      	ldr	r3, [r7, #4]
 80063f6:	681b      	ldr	r3, [r3, #0]
 80063f8:	4a2a      	ldr	r2, [pc, #168]	@ (80064a4 <HAL_DMA_Abort+0x450>)
 80063fa:	4293      	cmp	r3, r2
 80063fc:	d03b      	beq.n	8006476 <HAL_DMA_Abort+0x422>
 80063fe:	687b      	ldr	r3, [r7, #4]
 8006400:	681b      	ldr	r3, [r3, #0]
 8006402:	4a29      	ldr	r2, [pc, #164]	@ (80064a8 <HAL_DMA_Abort+0x454>)
 8006404:	4293      	cmp	r3, r2
 8006406:	d036      	beq.n	8006476 <HAL_DMA_Abort+0x422>
 8006408:	687b      	ldr	r3, [r7, #4]
 800640a:	681b      	ldr	r3, [r3, #0]
 800640c:	4a27      	ldr	r2, [pc, #156]	@ (80064ac <HAL_DMA_Abort+0x458>)
 800640e:	4293      	cmp	r3, r2
 8006410:	d031      	beq.n	8006476 <HAL_DMA_Abort+0x422>
 8006412:	687b      	ldr	r3, [r7, #4]
 8006414:	681b      	ldr	r3, [r3, #0]
 8006416:	4a26      	ldr	r2, [pc, #152]	@ (80064b0 <HAL_DMA_Abort+0x45c>)
 8006418:	4293      	cmp	r3, r2
 800641a:	d02c      	beq.n	8006476 <HAL_DMA_Abort+0x422>
 800641c:	687b      	ldr	r3, [r7, #4]
 800641e:	681b      	ldr	r3, [r3, #0]
 8006420:	4a24      	ldr	r2, [pc, #144]	@ (80064b4 <HAL_DMA_Abort+0x460>)
 8006422:	4293      	cmp	r3, r2
 8006424:	d027      	beq.n	8006476 <HAL_DMA_Abort+0x422>
 8006426:	687b      	ldr	r3, [r7, #4]
 8006428:	681b      	ldr	r3, [r3, #0]
 800642a:	4a23      	ldr	r2, [pc, #140]	@ (80064b8 <HAL_DMA_Abort+0x464>)
 800642c:	4293      	cmp	r3, r2
 800642e:	d022      	beq.n	8006476 <HAL_DMA_Abort+0x422>
 8006430:	687b      	ldr	r3, [r7, #4]
 8006432:	681b      	ldr	r3, [r3, #0]
 8006434:	4a21      	ldr	r2, [pc, #132]	@ (80064bc <HAL_DMA_Abort+0x468>)
 8006436:	4293      	cmp	r3, r2
 8006438:	d01d      	beq.n	8006476 <HAL_DMA_Abort+0x422>
 800643a:	687b      	ldr	r3, [r7, #4]
 800643c:	681b      	ldr	r3, [r3, #0]
 800643e:	4a20      	ldr	r2, [pc, #128]	@ (80064c0 <HAL_DMA_Abort+0x46c>)
 8006440:	4293      	cmp	r3, r2
 8006442:	d018      	beq.n	8006476 <HAL_DMA_Abort+0x422>
 8006444:	687b      	ldr	r3, [r7, #4]
 8006446:	681b      	ldr	r3, [r3, #0]
 8006448:	4a1e      	ldr	r2, [pc, #120]	@ (80064c4 <HAL_DMA_Abort+0x470>)
 800644a:	4293      	cmp	r3, r2
 800644c:	d013      	beq.n	8006476 <HAL_DMA_Abort+0x422>
 800644e:	687b      	ldr	r3, [r7, #4]
 8006450:	681b      	ldr	r3, [r3, #0]
 8006452:	4a1d      	ldr	r2, [pc, #116]	@ (80064c8 <HAL_DMA_Abort+0x474>)
 8006454:	4293      	cmp	r3, r2
 8006456:	d00e      	beq.n	8006476 <HAL_DMA_Abort+0x422>
 8006458:	687b      	ldr	r3, [r7, #4]
 800645a:	681b      	ldr	r3, [r3, #0]
 800645c:	4a1b      	ldr	r2, [pc, #108]	@ (80064cc <HAL_DMA_Abort+0x478>)
 800645e:	4293      	cmp	r3, r2
 8006460:	d009      	beq.n	8006476 <HAL_DMA_Abort+0x422>
 8006462:	687b      	ldr	r3, [r7, #4]
 8006464:	681b      	ldr	r3, [r3, #0]
 8006466:	4a1a      	ldr	r2, [pc, #104]	@ (80064d0 <HAL_DMA_Abort+0x47c>)
 8006468:	4293      	cmp	r3, r2
 800646a:	d004      	beq.n	8006476 <HAL_DMA_Abort+0x422>
 800646c:	687b      	ldr	r3, [r7, #4]
 800646e:	681b      	ldr	r3, [r3, #0]
 8006470:	4a18      	ldr	r2, [pc, #96]	@ (80064d4 <HAL_DMA_Abort+0x480>)
 8006472:	4293      	cmp	r3, r2
 8006474:	d101      	bne.n	800647a <HAL_DMA_Abort+0x426>
 8006476:	2301      	movs	r3, #1
 8006478:	e000      	b.n	800647c <HAL_DMA_Abort+0x428>
 800647a:	2300      	movs	r3, #0
 800647c:	2b00      	cmp	r3, #0
 800647e:	d02b      	beq.n	80064d8 <HAL_DMA_Abort+0x484>
    {
      regs_dma = (DMA_Base_Registers *)hdma->StreamBaseAddress;
 8006480:	687b      	ldr	r3, [r7, #4]
 8006482:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 8006484:	60bb      	str	r3, [r7, #8]
      regs_dma->IFCR = 0x3FUL << (hdma->StreamIndex & 0x1FU);
 8006486:	687b      	ldr	r3, [r7, #4]
 8006488:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 800648a:	f003 031f 	and.w	r3, r3, #31
 800648e:	223f      	movs	r2, #63	@ 0x3f
 8006490:	409a      	lsls	r2, r3
 8006492:	68bb      	ldr	r3, [r7, #8]
 8006494:	609a      	str	r2, [r3, #8]
 8006496:	e02a      	b.n	80064ee <HAL_DMA_Abort+0x49a>
 8006498:	40020010 	.word	0x40020010
 800649c:	40020028 	.word	0x40020028
 80064a0:	40020040 	.word	0x40020040
 80064a4:	40020058 	.word	0x40020058
 80064a8:	40020070 	.word	0x40020070
 80064ac:	40020088 	.word	0x40020088
 80064b0:	400200a0 	.word	0x400200a0
 80064b4:	400200b8 	.word	0x400200b8
 80064b8:	40020410 	.word	0x40020410
 80064bc:	40020428 	.word	0x40020428
 80064c0:	40020440 	.word	0x40020440
 80064c4:	40020458 	.word	0x40020458
 80064c8:	40020470 	.word	0x40020470
 80064cc:	40020488 	.word	0x40020488
 80064d0:	400204a0 	.word	0x400204a0
 80064d4:	400204b8 	.word	0x400204b8
    }
    else /* BDMA channel */
    {
      regs_bdma = (BDMA_Base_Registers *)hdma->StreamBaseAddress;
 80064d8:	687b      	ldr	r3, [r7, #4]
 80064da:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 80064dc:	60fb      	str	r3, [r7, #12]
      regs_bdma->IFCR = ((BDMA_IFCR_CGIF0) << (hdma->StreamIndex & 0x1FU));
 80064de:	687b      	ldr	r3, [r7, #4]
 80064e0:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 80064e2:	f003 031f 	and.w	r3, r3, #31
 80064e6:	2201      	movs	r2, #1
 80064e8:	409a      	lsls	r2, r3
 80064ea:	68fb      	ldr	r3, [r7, #12]
 80064ec:	605a      	str	r2, [r3, #4]
    }

    if(IS_DMA_DMAMUX_ALL_INSTANCE(hdma->Instance) != 0U) /* No DMAMUX available for BDMA1 */
 80064ee:	687b      	ldr	r3, [r7, #4]
 80064f0:	681b      	ldr	r3, [r3, #0]
 80064f2:	4a4f      	ldr	r2, [pc, #316]	@ (8006630 <HAL_DMA_Abort+0x5dc>)
 80064f4:	4293      	cmp	r3, r2
 80064f6:	d072      	beq.n	80065de <HAL_DMA_Abort+0x58a>
 80064f8:	687b      	ldr	r3, [r7, #4]
 80064fa:	681b      	ldr	r3, [r3, #0]
 80064fc:	4a4d      	ldr	r2, [pc, #308]	@ (8006634 <HAL_DMA_Abort+0x5e0>)
 80064fe:	4293      	cmp	r3, r2
 8006500:	d06d      	beq.n	80065de <HAL_DMA_Abort+0x58a>
 8006502:	687b      	ldr	r3, [r7, #4]
 8006504:	681b      	ldr	r3, [r3, #0]
 8006506:	4a4c      	ldr	r2, [pc, #304]	@ (8006638 <HAL_DMA_Abort+0x5e4>)
 8006508:	4293      	cmp	r3, r2
 800650a:	d068      	beq.n	80065de <HAL_DMA_Abort+0x58a>
 800650c:	687b      	ldr	r3, [r7, #4]
 800650e:	681b      	ldr	r3, [r3, #0]
 8006510:	4a4a      	ldr	r2, [pc, #296]	@ (800663c <HAL_DMA_Abort+0x5e8>)
 8006512:	4293      	cmp	r3, r2
 8006514:	d063      	beq.n	80065de <HAL_DMA_Abort+0x58a>
 8006516:	687b      	ldr	r3, [r7, #4]
 8006518:	681b      	ldr	r3, [r3, #0]
 800651a:	4a49      	ldr	r2, [pc, #292]	@ (8006640 <HAL_DMA_Abort+0x5ec>)
 800651c:	4293      	cmp	r3, r2
 800651e:	d05e      	beq.n	80065de <HAL_DMA_Abort+0x58a>
 8006520:	687b      	ldr	r3, [r7, #4]
 8006522:	681b      	ldr	r3, [r3, #0]
 8006524:	4a47      	ldr	r2, [pc, #284]	@ (8006644 <HAL_DMA_Abort+0x5f0>)
 8006526:	4293      	cmp	r3, r2
 8006528:	d059      	beq.n	80065de <HAL_DMA_Abort+0x58a>
 800652a:	687b      	ldr	r3, [r7, #4]
 800652c:	681b      	ldr	r3, [r3, #0]
 800652e:	4a46      	ldr	r2, [pc, #280]	@ (8006648 <HAL_DMA_Abort+0x5f4>)
 8006530:	4293      	cmp	r3, r2
 8006532:	d054      	beq.n	80065de <HAL_DMA_Abort+0x58a>
 8006534:	687b      	ldr	r3, [r7, #4]
 8006536:	681b      	ldr	r3, [r3, #0]
 8006538:	4a44      	ldr	r2, [pc, #272]	@ (800664c <HAL_DMA_Abort+0x5f8>)
 800653a:	4293      	cmp	r3, r2
 800653c:	d04f      	beq.n	80065de <HAL_DMA_Abort+0x58a>
 800653e:	687b      	ldr	r3, [r7, #4]
 8006540:	681b      	ldr	r3, [r3, #0]
 8006542:	4a43      	ldr	r2, [pc, #268]	@ (8006650 <HAL_DMA_Abort+0x5fc>)
 8006544:	4293      	cmp	r3, r2
 8006546:	d04a      	beq.n	80065de <HAL_DMA_Abort+0x58a>
 8006548:	687b      	ldr	r3, [r7, #4]
 800654a:	681b      	ldr	r3, [r3, #0]
 800654c:	4a41      	ldr	r2, [pc, #260]	@ (8006654 <HAL_DMA_Abort+0x600>)
 800654e:	4293      	cmp	r3, r2
 8006550:	d045      	beq.n	80065de <HAL_DMA_Abort+0x58a>
 8006552:	687b      	ldr	r3, [r7, #4]
 8006554:	681b      	ldr	r3, [r3, #0]
 8006556:	4a40      	ldr	r2, [pc, #256]	@ (8006658 <HAL_DMA_Abort+0x604>)
 8006558:	4293      	cmp	r3, r2
 800655a:	d040      	beq.n	80065de <HAL_DMA_Abort+0x58a>
 800655c:	687b      	ldr	r3, [r7, #4]
 800655e:	681b      	ldr	r3, [r3, #0]
 8006560:	4a3e      	ldr	r2, [pc, #248]	@ (800665c <HAL_DMA_Abort+0x608>)
 8006562:	4293      	cmp	r3, r2
 8006564:	d03b      	beq.n	80065de <HAL_DMA_Abort+0x58a>
 8006566:	687b      	ldr	r3, [r7, #4]
 8006568:	681b      	ldr	r3, [r3, #0]
 800656a:	4a3d      	ldr	r2, [pc, #244]	@ (8006660 <HAL_DMA_Abort+0x60c>)
 800656c:	4293      	cmp	r3, r2
 800656e:	d036      	beq.n	80065de <HAL_DMA_Abort+0x58a>
 8006570:	687b      	ldr	r3, [r7, #4]
 8006572:	681b      	ldr	r3, [r3, #0]
 8006574:	4a3b      	ldr	r2, [pc, #236]	@ (8006664 <HAL_DMA_Abort+0x610>)
 8006576:	4293      	cmp	r3, r2
 8006578:	d031      	beq.n	80065de <HAL_DMA_Abort+0x58a>
 800657a:	687b      	ldr	r3, [r7, #4]
 800657c:	681b      	ldr	r3, [r3, #0]
 800657e:	4a3a      	ldr	r2, [pc, #232]	@ (8006668 <HAL_DMA_Abort+0x614>)
 8006580:	4293      	cmp	r3, r2
 8006582:	d02c      	beq.n	80065de <HAL_DMA_Abort+0x58a>
 8006584:	687b      	ldr	r3, [r7, #4]
 8006586:	681b      	ldr	r3, [r3, #0]
 8006588:	4a38      	ldr	r2, [pc, #224]	@ (800666c <HAL_DMA_Abort+0x618>)
 800658a:	4293      	cmp	r3, r2
 800658c:	d027      	beq.n	80065de <HAL_DMA_Abort+0x58a>
 800658e:	687b      	ldr	r3, [r7, #4]
 8006590:	681b      	ldr	r3, [r3, #0]
 8006592:	4a37      	ldr	r2, [pc, #220]	@ (8006670 <HAL_DMA_Abort+0x61c>)
 8006594:	4293      	cmp	r3, r2
 8006596:	d022      	beq.n	80065de <HAL_DMA_Abort+0x58a>
 8006598:	687b      	ldr	r3, [r7, #4]
 800659a:	681b      	ldr	r3, [r3, #0]
 800659c:	4a35      	ldr	r2, [pc, #212]	@ (8006674 <HAL_DMA_Abort+0x620>)
 800659e:	4293      	cmp	r3, r2
 80065a0:	d01d      	beq.n	80065de <HAL_DMA_Abort+0x58a>
 80065a2:	687b      	ldr	r3, [r7, #4]
 80065a4:	681b      	ldr	r3, [r3, #0]
 80065a6:	4a34      	ldr	r2, [pc, #208]	@ (8006678 <HAL_DMA_Abort+0x624>)
 80065a8:	4293      	cmp	r3, r2
 80065aa:	d018      	beq.n	80065de <HAL_DMA_Abort+0x58a>
 80065ac:	687b      	ldr	r3, [r7, #4]
 80065ae:	681b      	ldr	r3, [r3, #0]
 80065b0:	4a32      	ldr	r2, [pc, #200]	@ (800667c <HAL_DMA_Abort+0x628>)
 80065b2:	4293      	cmp	r3, r2
 80065b4:	d013      	beq.n	80065de <HAL_DMA_Abort+0x58a>
 80065b6:	687b      	ldr	r3, [r7, #4]
 80065b8:	681b      	ldr	r3, [r3, #0]
 80065ba:	4a31      	ldr	r2, [pc, #196]	@ (8006680 <HAL_DMA_Abort+0x62c>)
 80065bc:	4293      	cmp	r3, r2
 80065be:	d00e      	beq.n	80065de <HAL_DMA_Abort+0x58a>
 80065c0:	687b      	ldr	r3, [r7, #4]
 80065c2:	681b      	ldr	r3, [r3, #0]
 80065c4:	4a2f      	ldr	r2, [pc, #188]	@ (8006684 <HAL_DMA_Abort+0x630>)
 80065c6:	4293      	cmp	r3, r2
 80065c8:	d009      	beq.n	80065de <HAL_DMA_Abort+0x58a>
 80065ca:	687b      	ldr	r3, [r7, #4]
 80065cc:	681b      	ldr	r3, [r3, #0]
 80065ce:	4a2e      	ldr	r2, [pc, #184]	@ (8006688 <HAL_DMA_Abort+0x634>)
 80065d0:	4293      	cmp	r3, r2
 80065d2:	d004      	beq.n	80065de <HAL_DMA_Abort+0x58a>
 80065d4:	687b      	ldr	r3, [r7, #4]
 80065d6:	681b      	ldr	r3, [r3, #0]
 80065d8:	4a2c      	ldr	r2, [pc, #176]	@ (800668c <HAL_DMA_Abort+0x638>)
 80065da:	4293      	cmp	r3, r2
 80065dc:	d101      	bne.n	80065e2 <HAL_DMA_Abort+0x58e>
 80065de:	2301      	movs	r3, #1
 80065e0:	e000      	b.n	80065e4 <HAL_DMA_Abort+0x590>
 80065e2:	2300      	movs	r3, #0
 80065e4:	2b00      	cmp	r3, #0
 80065e6:	d015      	beq.n	8006614 <HAL_DMA_Abort+0x5c0>
    {
      /* Clear the DMAMUX synchro overrun flag */
      hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask;
 80065e8:	687b      	ldr	r3, [r7, #4]
 80065ea:	6e5b      	ldr	r3, [r3, #100]	@ 0x64
 80065ec:	687a      	ldr	r2, [r7, #4]
 80065ee:	6e92      	ldr	r2, [r2, #104]	@ 0x68
 80065f0:	605a      	str	r2, [r3, #4]

      if(hdma->DMAmuxRequestGen != 0U)
 80065f2:	687b      	ldr	r3, [r7, #4]
 80065f4:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 80065f6:	2b00      	cmp	r3, #0
 80065f8:	d00c      	beq.n	8006614 <HAL_DMA_Abort+0x5c0>
      {
        /* if using DMAMUX request generator, disable the DMAMUX request generator overrun IT */
        /* disable the request gen overrun IT */
        hdma->DMAmuxRequestGen->RGCR &= ~DMAMUX_RGxCR_OIE;
 80065fa:	687b      	ldr	r3, [r7, #4]
 80065fc:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 80065fe:	681a      	ldr	r2, [r3, #0]
 8006600:	687b      	ldr	r3, [r7, #4]
 8006602:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8006604:	f422 7280 	bic.w	r2, r2, #256	@ 0x100
 8006608:	601a      	str	r2, [r3, #0]

        /* Clear the DMAMUX request generator overrun flag */
        hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask;
 800660a:	687b      	ldr	r3, [r7, #4]
 800660c:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800660e:	687a      	ldr	r2, [r7, #4]
 8006610:	6f52      	ldr	r2, [r2, #116]	@ 0x74
 8006612:	605a      	str	r2, [r3, #4]
      }
    }

    /* Change the DMA state */
    hdma->State = HAL_DMA_STATE_READY;
 8006614:	687b      	ldr	r3, [r7, #4]
 8006616:	2201      	movs	r2, #1
 8006618:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

    /* Process Unlocked */
    __HAL_UNLOCK(hdma);
 800661c:	687b      	ldr	r3, [r7, #4]
 800661e:	2200      	movs	r2, #0
 8006620:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34
  }

  return HAL_OK;
 8006624:	2300      	movs	r3, #0
}
 8006626:	4618      	mov	r0, r3
 8006628:	3718      	adds	r7, #24
 800662a:	46bd      	mov	sp, r7
 800662c:	bd80      	pop	{r7, pc}
 800662e:	bf00      	nop
 8006630:	40020010 	.word	0x40020010
 8006634:	40020028 	.word	0x40020028
 8006638:	40020040 	.word	0x40020040
 800663c:	40020058 	.word	0x40020058
 8006640:	40020070 	.word	0x40020070
 8006644:	40020088 	.word	0x40020088
 8006648:	400200a0 	.word	0x400200a0
 800664c:	400200b8 	.word	0x400200b8
 8006650:	40020410 	.word	0x40020410
 8006654:	40020428 	.word	0x40020428
 8006658:	40020440 	.word	0x40020440
 800665c:	40020458 	.word	0x40020458
 8006660:	40020470 	.word	0x40020470
 8006664:	40020488 	.word	0x40020488
 8006668:	400204a0 	.word	0x400204a0
 800666c:	400204b8 	.word	0x400204b8
 8006670:	58025408 	.word	0x58025408
 8006674:	5802541c 	.word	0x5802541c
 8006678:	58025430 	.word	0x58025430
 800667c:	58025444 	.word	0x58025444
 8006680:	58025458 	.word	0x58025458
 8006684:	5802546c 	.word	0x5802546c
 8006688:	58025480 	.word	0x58025480
 800668c:	58025494 	.word	0x58025494

08006690 <HAL_DMA_Abort_IT>:
  * @param  hdma  : pointer to a DMA_HandleTypeDef structure that contains
  *                 the configuration information for the specified DMA Stream.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma)
{
 8006690:	b580      	push	{r7, lr}
 8006692:	b084      	sub	sp, #16
 8006694:	af00      	add	r7, sp, #0
 8006696:	6078      	str	r0, [r7, #4]
  BDMA_Base_Registers *regs_bdma;

  /* Check the DMA peripheral handle */
  if(hdma == NULL)
 8006698:	687b      	ldr	r3, [r7, #4]
 800669a:	2b00      	cmp	r3, #0
 800669c:	d101      	bne.n	80066a2 <HAL_DMA_Abort_IT+0x12>
  {
    return HAL_ERROR;
 800669e:	2301      	movs	r3, #1
 80066a0:	e237      	b.n	8006b12 <HAL_DMA_Abort_IT+0x482>
  }

  if(hdma->State != HAL_DMA_STATE_BUSY)
 80066a2:	687b      	ldr	r3, [r7, #4]
 80066a4:	f893 3035 	ldrb.w	r3, [r3, #53]	@ 0x35
 80066a8:	b2db      	uxtb	r3, r3
 80066aa:	2b02      	cmp	r3, #2
 80066ac:	d004      	beq.n	80066b8 <HAL_DMA_Abort_IT+0x28>
  {
    hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
 80066ae:	687b      	ldr	r3, [r7, #4]
 80066b0:	2280      	movs	r2, #128	@ 0x80
 80066b2:	655a      	str	r2, [r3, #84]	@ 0x54
    return HAL_ERROR;
 80066b4:	2301      	movs	r3, #1
 80066b6:	e22c      	b.n	8006b12 <HAL_DMA_Abort_IT+0x482>
  }
  else
  {
    if(IS_DMA_STREAM_INSTANCE(hdma->Instance) != 0U) /* DMA1 or DMA2 instance */
 80066b8:	687b      	ldr	r3, [r7, #4]
 80066ba:	681b      	ldr	r3, [r3, #0]
 80066bc:	4a5c      	ldr	r2, [pc, #368]	@ (8006830 <HAL_DMA_Abort_IT+0x1a0>)
 80066be:	4293      	cmp	r3, r2
 80066c0:	d04a      	beq.n	8006758 <HAL_DMA_Abort_IT+0xc8>
 80066c2:	687b      	ldr	r3, [r7, #4]
 80066c4:	681b      	ldr	r3, [r3, #0]
 80066c6:	4a5b      	ldr	r2, [pc, #364]	@ (8006834 <HAL_DMA_Abort_IT+0x1a4>)
 80066c8:	4293      	cmp	r3, r2
 80066ca:	d045      	beq.n	8006758 <HAL_DMA_Abort_IT+0xc8>
 80066cc:	687b      	ldr	r3, [r7, #4]
 80066ce:	681b      	ldr	r3, [r3, #0]
 80066d0:	4a59      	ldr	r2, [pc, #356]	@ (8006838 <HAL_DMA_Abort_IT+0x1a8>)
 80066d2:	4293      	cmp	r3, r2
 80066d4:	d040      	beq.n	8006758 <HAL_DMA_Abort_IT+0xc8>
 80066d6:	687b      	ldr	r3, [r7, #4]
 80066d8:	681b      	ldr	r3, [r3, #0]
 80066da:	4a58      	ldr	r2, [pc, #352]	@ (800683c <HAL_DMA_Abort_IT+0x1ac>)
 80066dc:	4293      	cmp	r3, r2
 80066de:	d03b      	beq.n	8006758 <HAL_DMA_Abort_IT+0xc8>
 80066e0:	687b      	ldr	r3, [r7, #4]
 80066e2:	681b      	ldr	r3, [r3, #0]
 80066e4:	4a56      	ldr	r2, [pc, #344]	@ (8006840 <HAL_DMA_Abort_IT+0x1b0>)
 80066e6:	4293      	cmp	r3, r2
 80066e8:	d036      	beq.n	8006758 <HAL_DMA_Abort_IT+0xc8>
 80066ea:	687b      	ldr	r3, [r7, #4]
 80066ec:	681b      	ldr	r3, [r3, #0]
 80066ee:	4a55      	ldr	r2, [pc, #340]	@ (8006844 <HAL_DMA_Abort_IT+0x1b4>)
 80066f0:	4293      	cmp	r3, r2
 80066f2:	d031      	beq.n	8006758 <HAL_DMA_Abort_IT+0xc8>
 80066f4:	687b      	ldr	r3, [r7, #4]
 80066f6:	681b      	ldr	r3, [r3, #0]
 80066f8:	4a53      	ldr	r2, [pc, #332]	@ (8006848 <HAL_DMA_Abort_IT+0x1b8>)
 80066fa:	4293      	cmp	r3, r2
 80066fc:	d02c      	beq.n	8006758 <HAL_DMA_Abort_IT+0xc8>
 80066fe:	687b      	ldr	r3, [r7, #4]
 8006700:	681b      	ldr	r3, [r3, #0]
 8006702:	4a52      	ldr	r2, [pc, #328]	@ (800684c <HAL_DMA_Abort_IT+0x1bc>)
 8006704:	4293      	cmp	r3, r2
 8006706:	d027      	beq.n	8006758 <HAL_DMA_Abort_IT+0xc8>
 8006708:	687b      	ldr	r3, [r7, #4]
 800670a:	681b      	ldr	r3, [r3, #0]
 800670c:	4a50      	ldr	r2, [pc, #320]	@ (8006850 <HAL_DMA_Abort_IT+0x1c0>)
 800670e:	4293      	cmp	r3, r2
 8006710:	d022      	beq.n	8006758 <HAL_DMA_Abort_IT+0xc8>
 8006712:	687b      	ldr	r3, [r7, #4]
 8006714:	681b      	ldr	r3, [r3, #0]
 8006716:	4a4f      	ldr	r2, [pc, #316]	@ (8006854 <HAL_DMA_Abort_IT+0x1c4>)
 8006718:	4293      	cmp	r3, r2
 800671a:	d01d      	beq.n	8006758 <HAL_DMA_Abort_IT+0xc8>
 800671c:	687b      	ldr	r3, [r7, #4]
 800671e:	681b      	ldr	r3, [r3, #0]
 8006720:	4a4d      	ldr	r2, [pc, #308]	@ (8006858 <HAL_DMA_Abort_IT+0x1c8>)
 8006722:	4293      	cmp	r3, r2
 8006724:	d018      	beq.n	8006758 <HAL_DMA_Abort_IT+0xc8>
 8006726:	687b      	ldr	r3, [r7, #4]
 8006728:	681b      	ldr	r3, [r3, #0]
 800672a:	4a4c      	ldr	r2, [pc, #304]	@ (800685c <HAL_DMA_Abort_IT+0x1cc>)
 800672c:	4293      	cmp	r3, r2
 800672e:	d013      	beq.n	8006758 <HAL_DMA_Abort_IT+0xc8>
 8006730:	687b      	ldr	r3, [r7, #4]
 8006732:	681b      	ldr	r3, [r3, #0]
 8006734:	4a4a      	ldr	r2, [pc, #296]	@ (8006860 <HAL_DMA_Abort_IT+0x1d0>)
 8006736:	4293      	cmp	r3, r2
 8006738:	d00e      	beq.n	8006758 <HAL_DMA_Abort_IT+0xc8>
 800673a:	687b      	ldr	r3, [r7, #4]
 800673c:	681b      	ldr	r3, [r3, #0]
 800673e:	4a49      	ldr	r2, [pc, #292]	@ (8006864 <HAL_DMA_Abort_IT+0x1d4>)
 8006740:	4293      	cmp	r3, r2
 8006742:	d009      	beq.n	8006758 <HAL_DMA_Abort_IT+0xc8>
 8006744:	687b      	ldr	r3, [r7, #4]
 8006746:	681b      	ldr	r3, [r3, #0]
 8006748:	4a47      	ldr	r2, [pc, #284]	@ (8006868 <HAL_DMA_Abort_IT+0x1d8>)
 800674a:	4293      	cmp	r3, r2
 800674c:	d004      	beq.n	8006758 <HAL_DMA_Abort_IT+0xc8>
 800674e:	687b      	ldr	r3, [r7, #4]
 8006750:	681b      	ldr	r3, [r3, #0]
 8006752:	4a46      	ldr	r2, [pc, #280]	@ (800686c <HAL_DMA_Abort_IT+0x1dc>)
 8006754:	4293      	cmp	r3, r2
 8006756:	d101      	bne.n	800675c <HAL_DMA_Abort_IT+0xcc>
 8006758:	2301      	movs	r3, #1
 800675a:	e000      	b.n	800675e <HAL_DMA_Abort_IT+0xce>
 800675c:	2300      	movs	r3, #0
 800675e:	2b00      	cmp	r3, #0
 8006760:	f000 8086 	beq.w	8006870 <HAL_DMA_Abort_IT+0x1e0>
    {
      /* Set Abort State  */
      hdma->State = HAL_DMA_STATE_ABORT;
 8006764:	687b      	ldr	r3, [r7, #4]
 8006766:	2204      	movs	r2, #4
 8006768:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

      /* Disable the stream */
      __HAL_DMA_DISABLE(hdma);
 800676c:	687b      	ldr	r3, [r7, #4]
 800676e:	681b      	ldr	r3, [r3, #0]
 8006770:	4a2f      	ldr	r2, [pc, #188]	@ (8006830 <HAL_DMA_Abort_IT+0x1a0>)
 8006772:	4293      	cmp	r3, r2
 8006774:	d04a      	beq.n	800680c <HAL_DMA_Abort_IT+0x17c>
 8006776:	687b      	ldr	r3, [r7, #4]
 8006778:	681b      	ldr	r3, [r3, #0]
 800677a:	4a2e      	ldr	r2, [pc, #184]	@ (8006834 <HAL_DMA_Abort_IT+0x1a4>)
 800677c:	4293      	cmp	r3, r2
 800677e:	d045      	beq.n	800680c <HAL_DMA_Abort_IT+0x17c>
 8006780:	687b      	ldr	r3, [r7, #4]
 8006782:	681b      	ldr	r3, [r3, #0]
 8006784:	4a2c      	ldr	r2, [pc, #176]	@ (8006838 <HAL_DMA_Abort_IT+0x1a8>)
 8006786:	4293      	cmp	r3, r2
 8006788:	d040      	beq.n	800680c <HAL_DMA_Abort_IT+0x17c>
 800678a:	687b      	ldr	r3, [r7, #4]
 800678c:	681b      	ldr	r3, [r3, #0]
 800678e:	4a2b      	ldr	r2, [pc, #172]	@ (800683c <HAL_DMA_Abort_IT+0x1ac>)
 8006790:	4293      	cmp	r3, r2
 8006792:	d03b      	beq.n	800680c <HAL_DMA_Abort_IT+0x17c>
 8006794:	687b      	ldr	r3, [r7, #4]
 8006796:	681b      	ldr	r3, [r3, #0]
 8006798:	4a29      	ldr	r2, [pc, #164]	@ (8006840 <HAL_DMA_Abort_IT+0x1b0>)
 800679a:	4293      	cmp	r3, r2
 800679c:	d036      	beq.n	800680c <HAL_DMA_Abort_IT+0x17c>
 800679e:	687b      	ldr	r3, [r7, #4]
 80067a0:	681b      	ldr	r3, [r3, #0]
 80067a2:	4a28      	ldr	r2, [pc, #160]	@ (8006844 <HAL_DMA_Abort_IT+0x1b4>)
 80067a4:	4293      	cmp	r3, r2
 80067a6:	d031      	beq.n	800680c <HAL_DMA_Abort_IT+0x17c>
 80067a8:	687b      	ldr	r3, [r7, #4]
 80067aa:	681b      	ldr	r3, [r3, #0]
 80067ac:	4a26      	ldr	r2, [pc, #152]	@ (8006848 <HAL_DMA_Abort_IT+0x1b8>)
 80067ae:	4293      	cmp	r3, r2
 80067b0:	d02c      	beq.n	800680c <HAL_DMA_Abort_IT+0x17c>
 80067b2:	687b      	ldr	r3, [r7, #4]
 80067b4:	681b      	ldr	r3, [r3, #0]
 80067b6:	4a25      	ldr	r2, [pc, #148]	@ (800684c <HAL_DMA_Abort_IT+0x1bc>)
 80067b8:	4293      	cmp	r3, r2
 80067ba:	d027      	beq.n	800680c <HAL_DMA_Abort_IT+0x17c>
 80067bc:	687b      	ldr	r3, [r7, #4]
 80067be:	681b      	ldr	r3, [r3, #0]
 80067c0:	4a23      	ldr	r2, [pc, #140]	@ (8006850 <HAL_DMA_Abort_IT+0x1c0>)
 80067c2:	4293      	cmp	r3, r2
 80067c4:	d022      	beq.n	800680c <HAL_DMA_Abort_IT+0x17c>
 80067c6:	687b      	ldr	r3, [r7, #4]
 80067c8:	681b      	ldr	r3, [r3, #0]
 80067ca:	4a22      	ldr	r2, [pc, #136]	@ (8006854 <HAL_DMA_Abort_IT+0x1c4>)
 80067cc:	4293      	cmp	r3, r2
 80067ce:	d01d      	beq.n	800680c <HAL_DMA_Abort_IT+0x17c>
 80067d0:	687b      	ldr	r3, [r7, #4]
 80067d2:	681b      	ldr	r3, [r3, #0]
 80067d4:	4a20      	ldr	r2, [pc, #128]	@ (8006858 <HAL_DMA_Abort_IT+0x1c8>)
 80067d6:	4293      	cmp	r3, r2
 80067d8:	d018      	beq.n	800680c <HAL_DMA_Abort_IT+0x17c>
 80067da:	687b      	ldr	r3, [r7, #4]
 80067dc:	681b      	ldr	r3, [r3, #0]
 80067de:	4a1f      	ldr	r2, [pc, #124]	@ (800685c <HAL_DMA_Abort_IT+0x1cc>)
 80067e0:	4293      	cmp	r3, r2
 80067e2:	d013      	beq.n	800680c <HAL_DMA_Abort_IT+0x17c>
 80067e4:	687b      	ldr	r3, [r7, #4]
 80067e6:	681b      	ldr	r3, [r3, #0]
 80067e8:	4a1d      	ldr	r2, [pc, #116]	@ (8006860 <HAL_DMA_Abort_IT+0x1d0>)
 80067ea:	4293      	cmp	r3, r2
 80067ec:	d00e      	beq.n	800680c <HAL_DMA_Abort_IT+0x17c>
 80067ee:	687b      	ldr	r3, [r7, #4]
 80067f0:	681b      	ldr	r3, [r3, #0]
 80067f2:	4a1c      	ldr	r2, [pc, #112]	@ (8006864 <HAL_DMA_Abort_IT+0x1d4>)
 80067f4:	4293      	cmp	r3, r2
 80067f6:	d009      	beq.n	800680c <HAL_DMA_Abort_IT+0x17c>
 80067f8:	687b      	ldr	r3, [r7, #4]
 80067fa:	681b      	ldr	r3, [r3, #0]
 80067fc:	4a1a      	ldr	r2, [pc, #104]	@ (8006868 <HAL_DMA_Abort_IT+0x1d8>)
 80067fe:	4293      	cmp	r3, r2
 8006800:	d004      	beq.n	800680c <HAL_DMA_Abort_IT+0x17c>
 8006802:	687b      	ldr	r3, [r7, #4]
 8006804:	681b      	ldr	r3, [r3, #0]
 8006806:	4a19      	ldr	r2, [pc, #100]	@ (800686c <HAL_DMA_Abort_IT+0x1dc>)
 8006808:	4293      	cmp	r3, r2
 800680a:	d108      	bne.n	800681e <HAL_DMA_Abort_IT+0x18e>
 800680c:	687b      	ldr	r3, [r7, #4]
 800680e:	681b      	ldr	r3, [r3, #0]
 8006810:	681a      	ldr	r2, [r3, #0]
 8006812:	687b      	ldr	r3, [r7, #4]
 8006814:	681b      	ldr	r3, [r3, #0]
 8006816:	f022 0201 	bic.w	r2, r2, #1
 800681a:	601a      	str	r2, [r3, #0]
 800681c:	e178      	b.n	8006b10 <HAL_DMA_Abort_IT+0x480>
 800681e:	687b      	ldr	r3, [r7, #4]
 8006820:	681b      	ldr	r3, [r3, #0]
 8006822:	681a      	ldr	r2, [r3, #0]
 8006824:	687b      	ldr	r3, [r7, #4]
 8006826:	681b      	ldr	r3, [r3, #0]
 8006828:	f022 0201 	bic.w	r2, r2, #1
 800682c:	601a      	str	r2, [r3, #0]
 800682e:	e16f      	b.n	8006b10 <HAL_DMA_Abort_IT+0x480>
 8006830:	40020010 	.word	0x40020010
 8006834:	40020028 	.word	0x40020028
 8006838:	40020040 	.word	0x40020040
 800683c:	40020058 	.word	0x40020058
 8006840:	40020070 	.word	0x40020070
 8006844:	40020088 	.word	0x40020088
 8006848:	400200a0 	.word	0x400200a0
 800684c:	400200b8 	.word	0x400200b8
 8006850:	40020410 	.word	0x40020410
 8006854:	40020428 	.word	0x40020428
 8006858:	40020440 	.word	0x40020440
 800685c:	40020458 	.word	0x40020458
 8006860:	40020470 	.word	0x40020470
 8006864:	40020488 	.word	0x40020488
 8006868:	400204a0 	.word	0x400204a0
 800686c:	400204b8 	.word	0x400204b8
    }
    else /* BDMA channel */
    {
      /* Disable DMA All Interrupts  */
      ((BDMA_Channel_TypeDef   *)hdma->Instance)->CCR  &= ~(BDMA_CCR_TCIE | BDMA_CCR_HTIE | BDMA_CCR_TEIE);
 8006870:	687b      	ldr	r3, [r7, #4]
 8006872:	681b      	ldr	r3, [r3, #0]
 8006874:	681a      	ldr	r2, [r3, #0]
 8006876:	687b      	ldr	r3, [r7, #4]
 8006878:	681b      	ldr	r3, [r3, #0]
 800687a:	f022 020e 	bic.w	r2, r2, #14
 800687e:	601a      	str	r2, [r3, #0]

      /* Disable the channel */
      __HAL_DMA_DISABLE(hdma);
 8006880:	687b      	ldr	r3, [r7, #4]
 8006882:	681b      	ldr	r3, [r3, #0]
 8006884:	4a6c      	ldr	r2, [pc, #432]	@ (8006a38 <HAL_DMA_Abort_IT+0x3a8>)
 8006886:	4293      	cmp	r3, r2
 8006888:	d04a      	beq.n	8006920 <HAL_DMA_Abort_IT+0x290>
 800688a:	687b      	ldr	r3, [r7, #4]
 800688c:	681b      	ldr	r3, [r3, #0]
 800688e:	4a6b      	ldr	r2, [pc, #428]	@ (8006a3c <HAL_DMA_Abort_IT+0x3ac>)
 8006890:	4293      	cmp	r3, r2
 8006892:	d045      	beq.n	8006920 <HAL_DMA_Abort_IT+0x290>
 8006894:	687b      	ldr	r3, [r7, #4]
 8006896:	681b      	ldr	r3, [r3, #0]
 8006898:	4a69      	ldr	r2, [pc, #420]	@ (8006a40 <HAL_DMA_Abort_IT+0x3b0>)
 800689a:	4293      	cmp	r3, r2
 800689c:	d040      	beq.n	8006920 <HAL_DMA_Abort_IT+0x290>
 800689e:	687b      	ldr	r3, [r7, #4]
 80068a0:	681b      	ldr	r3, [r3, #0]
 80068a2:	4a68      	ldr	r2, [pc, #416]	@ (8006a44 <HAL_DMA_Abort_IT+0x3b4>)
 80068a4:	4293      	cmp	r3, r2
 80068a6:	d03b      	beq.n	8006920 <HAL_DMA_Abort_IT+0x290>
 80068a8:	687b      	ldr	r3, [r7, #4]
 80068aa:	681b      	ldr	r3, [r3, #0]
 80068ac:	4a66      	ldr	r2, [pc, #408]	@ (8006a48 <HAL_DMA_Abort_IT+0x3b8>)
 80068ae:	4293      	cmp	r3, r2
 80068b0:	d036      	beq.n	8006920 <HAL_DMA_Abort_IT+0x290>
 80068b2:	687b      	ldr	r3, [r7, #4]
 80068b4:	681b      	ldr	r3, [r3, #0]
 80068b6:	4a65      	ldr	r2, [pc, #404]	@ (8006a4c <HAL_DMA_Abort_IT+0x3bc>)
 80068b8:	4293      	cmp	r3, r2
 80068ba:	d031      	beq.n	8006920 <HAL_DMA_Abort_IT+0x290>
 80068bc:	687b      	ldr	r3, [r7, #4]
 80068be:	681b      	ldr	r3, [r3, #0]
 80068c0:	4a63      	ldr	r2, [pc, #396]	@ (8006a50 <HAL_DMA_Abort_IT+0x3c0>)
 80068c2:	4293      	cmp	r3, r2
 80068c4:	d02c      	beq.n	8006920 <HAL_DMA_Abort_IT+0x290>
 80068c6:	687b      	ldr	r3, [r7, #4]
 80068c8:	681b      	ldr	r3, [r3, #0]
 80068ca:	4a62      	ldr	r2, [pc, #392]	@ (8006a54 <HAL_DMA_Abort_IT+0x3c4>)
 80068cc:	4293      	cmp	r3, r2
 80068ce:	d027      	beq.n	8006920 <HAL_DMA_Abort_IT+0x290>
 80068d0:	687b      	ldr	r3, [r7, #4]
 80068d2:	681b      	ldr	r3, [r3, #0]
 80068d4:	4a60      	ldr	r2, [pc, #384]	@ (8006a58 <HAL_DMA_Abort_IT+0x3c8>)
 80068d6:	4293      	cmp	r3, r2
 80068d8:	d022      	beq.n	8006920 <HAL_DMA_Abort_IT+0x290>
 80068da:	687b      	ldr	r3, [r7, #4]
 80068dc:	681b      	ldr	r3, [r3, #0]
 80068de:	4a5f      	ldr	r2, [pc, #380]	@ (8006a5c <HAL_DMA_Abort_IT+0x3cc>)
 80068e0:	4293      	cmp	r3, r2
 80068e2:	d01d      	beq.n	8006920 <HAL_DMA_Abort_IT+0x290>
 80068e4:	687b      	ldr	r3, [r7, #4]
 80068e6:	681b      	ldr	r3, [r3, #0]
 80068e8:	4a5d      	ldr	r2, [pc, #372]	@ (8006a60 <HAL_DMA_Abort_IT+0x3d0>)
 80068ea:	4293      	cmp	r3, r2
 80068ec:	d018      	beq.n	8006920 <HAL_DMA_Abort_IT+0x290>
 80068ee:	687b      	ldr	r3, [r7, #4]
 80068f0:	681b      	ldr	r3, [r3, #0]
 80068f2:	4a5c      	ldr	r2, [pc, #368]	@ (8006a64 <HAL_DMA_Abort_IT+0x3d4>)
 80068f4:	4293      	cmp	r3, r2
 80068f6:	d013      	beq.n	8006920 <HAL_DMA_Abort_IT+0x290>
 80068f8:	687b      	ldr	r3, [r7, #4]
 80068fa:	681b      	ldr	r3, [r3, #0]
 80068fc:	4a5a      	ldr	r2, [pc, #360]	@ (8006a68 <HAL_DMA_Abort_IT+0x3d8>)
 80068fe:	4293      	cmp	r3, r2
 8006900:	d00e      	beq.n	8006920 <HAL_DMA_Abort_IT+0x290>
 8006902:	687b      	ldr	r3, [r7, #4]
 8006904:	681b      	ldr	r3, [r3, #0]
 8006906:	4a59      	ldr	r2, [pc, #356]	@ (8006a6c <HAL_DMA_Abort_IT+0x3dc>)
 8006908:	4293      	cmp	r3, r2
 800690a:	d009      	beq.n	8006920 <HAL_DMA_Abort_IT+0x290>
 800690c:	687b      	ldr	r3, [r7, #4]
 800690e:	681b      	ldr	r3, [r3, #0]
 8006910:	4a57      	ldr	r2, [pc, #348]	@ (8006a70 <HAL_DMA_Abort_IT+0x3e0>)
 8006912:	4293      	cmp	r3, r2
 8006914:	d004      	beq.n	8006920 <HAL_DMA_Abort_IT+0x290>
 8006916:	687b      	ldr	r3, [r7, #4]
 8006918:	681b      	ldr	r3, [r3, #0]
 800691a:	4a56      	ldr	r2, [pc, #344]	@ (8006a74 <HAL_DMA_Abort_IT+0x3e4>)
 800691c:	4293      	cmp	r3, r2
 800691e:	d108      	bne.n	8006932 <HAL_DMA_Abort_IT+0x2a2>
 8006920:	687b      	ldr	r3, [r7, #4]
 8006922:	681b      	ldr	r3, [r3, #0]
 8006924:	681a      	ldr	r2, [r3, #0]
 8006926:	687b      	ldr	r3, [r7, #4]
 8006928:	681b      	ldr	r3, [r3, #0]
 800692a:	f022 0201 	bic.w	r2, r2, #1
 800692e:	601a      	str	r2, [r3, #0]
 8006930:	e007      	b.n	8006942 <HAL_DMA_Abort_IT+0x2b2>
 8006932:	687b      	ldr	r3, [r7, #4]
 8006934:	681b      	ldr	r3, [r3, #0]
 8006936:	681a      	ldr	r2, [r3, #0]
 8006938:	687b      	ldr	r3, [r7, #4]
 800693a:	681b      	ldr	r3, [r3, #0]
 800693c:	f022 0201 	bic.w	r2, r2, #1
 8006940:	601a      	str	r2, [r3, #0]

      if(IS_DMA_DMAMUX_ALL_INSTANCE(hdma->Instance) != 0U) /* No DMAMUX available for BDMA1 */
 8006942:	687b      	ldr	r3, [r7, #4]
 8006944:	681b      	ldr	r3, [r3, #0]
 8006946:	4a3c      	ldr	r2, [pc, #240]	@ (8006a38 <HAL_DMA_Abort_IT+0x3a8>)
 8006948:	4293      	cmp	r3, r2
 800694a:	d072      	beq.n	8006a32 <HAL_DMA_Abort_IT+0x3a2>
 800694c:	687b      	ldr	r3, [r7, #4]
 800694e:	681b      	ldr	r3, [r3, #0]
 8006950:	4a3a      	ldr	r2, [pc, #232]	@ (8006a3c <HAL_DMA_Abort_IT+0x3ac>)
 8006952:	4293      	cmp	r3, r2
 8006954:	d06d      	beq.n	8006a32 <HAL_DMA_Abort_IT+0x3a2>
 8006956:	687b      	ldr	r3, [r7, #4]
 8006958:	681b      	ldr	r3, [r3, #0]
 800695a:	4a39      	ldr	r2, [pc, #228]	@ (8006a40 <HAL_DMA_Abort_IT+0x3b0>)
 800695c:	4293      	cmp	r3, r2
 800695e:	d068      	beq.n	8006a32 <HAL_DMA_Abort_IT+0x3a2>
 8006960:	687b      	ldr	r3, [r7, #4]
 8006962:	681b      	ldr	r3, [r3, #0]
 8006964:	4a37      	ldr	r2, [pc, #220]	@ (8006a44 <HAL_DMA_Abort_IT+0x3b4>)
 8006966:	4293      	cmp	r3, r2
 8006968:	d063      	beq.n	8006a32 <HAL_DMA_Abort_IT+0x3a2>
 800696a:	687b      	ldr	r3, [r7, #4]
 800696c:	681b      	ldr	r3, [r3, #0]
 800696e:	4a36      	ldr	r2, [pc, #216]	@ (8006a48 <HAL_DMA_Abort_IT+0x3b8>)
 8006970:	4293      	cmp	r3, r2
 8006972:	d05e      	beq.n	8006a32 <HAL_DMA_Abort_IT+0x3a2>
 8006974:	687b      	ldr	r3, [r7, #4]
 8006976:	681b      	ldr	r3, [r3, #0]
 8006978:	4a34      	ldr	r2, [pc, #208]	@ (8006a4c <HAL_DMA_Abort_IT+0x3bc>)
 800697a:	4293      	cmp	r3, r2
 800697c:	d059      	beq.n	8006a32 <HAL_DMA_Abort_IT+0x3a2>
 800697e:	687b      	ldr	r3, [r7, #4]
 8006980:	681b      	ldr	r3, [r3, #0]
 8006982:	4a33      	ldr	r2, [pc, #204]	@ (8006a50 <HAL_DMA_Abort_IT+0x3c0>)
 8006984:	4293      	cmp	r3, r2
 8006986:	d054      	beq.n	8006a32 <HAL_DMA_Abort_IT+0x3a2>
 8006988:	687b      	ldr	r3, [r7, #4]
 800698a:	681b      	ldr	r3, [r3, #0]
 800698c:	4a31      	ldr	r2, [pc, #196]	@ (8006a54 <HAL_DMA_Abort_IT+0x3c4>)
 800698e:	4293      	cmp	r3, r2
 8006990:	d04f      	beq.n	8006a32 <HAL_DMA_Abort_IT+0x3a2>
 8006992:	687b      	ldr	r3, [r7, #4]
 8006994:	681b      	ldr	r3, [r3, #0]
 8006996:	4a30      	ldr	r2, [pc, #192]	@ (8006a58 <HAL_DMA_Abort_IT+0x3c8>)
 8006998:	4293      	cmp	r3, r2
 800699a:	d04a      	beq.n	8006a32 <HAL_DMA_Abort_IT+0x3a2>
 800699c:	687b      	ldr	r3, [r7, #4]
 800699e:	681b      	ldr	r3, [r3, #0]
 80069a0:	4a2e      	ldr	r2, [pc, #184]	@ (8006a5c <HAL_DMA_Abort_IT+0x3cc>)
 80069a2:	4293      	cmp	r3, r2
 80069a4:	d045      	beq.n	8006a32 <HAL_DMA_Abort_IT+0x3a2>
 80069a6:	687b      	ldr	r3, [r7, #4]
 80069a8:	681b      	ldr	r3, [r3, #0]
 80069aa:	4a2d      	ldr	r2, [pc, #180]	@ (8006a60 <HAL_DMA_Abort_IT+0x3d0>)
 80069ac:	4293      	cmp	r3, r2
 80069ae:	d040      	beq.n	8006a32 <HAL_DMA_Abort_IT+0x3a2>
 80069b0:	687b      	ldr	r3, [r7, #4]
 80069b2:	681b      	ldr	r3, [r3, #0]
 80069b4:	4a2b      	ldr	r2, [pc, #172]	@ (8006a64 <HAL_DMA_Abort_IT+0x3d4>)
 80069b6:	4293      	cmp	r3, r2
 80069b8:	d03b      	beq.n	8006a32 <HAL_DMA_Abort_IT+0x3a2>
 80069ba:	687b      	ldr	r3, [r7, #4]
 80069bc:	681b      	ldr	r3, [r3, #0]
 80069be:	4a2a      	ldr	r2, [pc, #168]	@ (8006a68 <HAL_DMA_Abort_IT+0x3d8>)
 80069c0:	4293      	cmp	r3, r2
 80069c2:	d036      	beq.n	8006a32 <HAL_DMA_Abort_IT+0x3a2>
 80069c4:	687b      	ldr	r3, [r7, #4]
 80069c6:	681b      	ldr	r3, [r3, #0]
 80069c8:	4a28      	ldr	r2, [pc, #160]	@ (8006a6c <HAL_DMA_Abort_IT+0x3dc>)
 80069ca:	4293      	cmp	r3, r2
 80069cc:	d031      	beq.n	8006a32 <HAL_DMA_Abort_IT+0x3a2>
 80069ce:	687b      	ldr	r3, [r7, #4]
 80069d0:	681b      	ldr	r3, [r3, #0]
 80069d2:	4a27      	ldr	r2, [pc, #156]	@ (8006a70 <HAL_DMA_Abort_IT+0x3e0>)
 80069d4:	4293      	cmp	r3, r2
 80069d6:	d02c      	beq.n	8006a32 <HAL_DMA_Abort_IT+0x3a2>
 80069d8:	687b      	ldr	r3, [r7, #4]
 80069da:	681b      	ldr	r3, [r3, #0]
 80069dc:	4a25      	ldr	r2, [pc, #148]	@ (8006a74 <HAL_DMA_Abort_IT+0x3e4>)
 80069de:	4293      	cmp	r3, r2
 80069e0:	d027      	beq.n	8006a32 <HAL_DMA_Abort_IT+0x3a2>
 80069e2:	687b      	ldr	r3, [r7, #4]
 80069e4:	681b      	ldr	r3, [r3, #0]
 80069e6:	4a24      	ldr	r2, [pc, #144]	@ (8006a78 <HAL_DMA_Abort_IT+0x3e8>)
 80069e8:	4293      	cmp	r3, r2
 80069ea:	d022      	beq.n	8006a32 <HAL_DMA_Abort_IT+0x3a2>
 80069ec:	687b      	ldr	r3, [r7, #4]
 80069ee:	681b      	ldr	r3, [r3, #0]
 80069f0:	4a22      	ldr	r2, [pc, #136]	@ (8006a7c <HAL_DMA_Abort_IT+0x3ec>)
 80069f2:	4293      	cmp	r3, r2
 80069f4:	d01d      	beq.n	8006a32 <HAL_DMA_Abort_IT+0x3a2>
 80069f6:	687b      	ldr	r3, [r7, #4]
 80069f8:	681b      	ldr	r3, [r3, #0]
 80069fa:	4a21      	ldr	r2, [pc, #132]	@ (8006a80 <HAL_DMA_Abort_IT+0x3f0>)
 80069fc:	4293      	cmp	r3, r2
 80069fe:	d018      	beq.n	8006a32 <HAL_DMA_Abort_IT+0x3a2>
 8006a00:	687b      	ldr	r3, [r7, #4]
 8006a02:	681b      	ldr	r3, [r3, #0]
 8006a04:	4a1f      	ldr	r2, [pc, #124]	@ (8006a84 <HAL_DMA_Abort_IT+0x3f4>)
 8006a06:	4293      	cmp	r3, r2
 8006a08:	d013      	beq.n	8006a32 <HAL_DMA_Abort_IT+0x3a2>
 8006a0a:	687b      	ldr	r3, [r7, #4]
 8006a0c:	681b      	ldr	r3, [r3, #0]
 8006a0e:	4a1e      	ldr	r2, [pc, #120]	@ (8006a88 <HAL_DMA_Abort_IT+0x3f8>)
 8006a10:	4293      	cmp	r3, r2
 8006a12:	d00e      	beq.n	8006a32 <HAL_DMA_Abort_IT+0x3a2>
 8006a14:	687b      	ldr	r3, [r7, #4]
 8006a16:	681b      	ldr	r3, [r3, #0]
 8006a18:	4a1c      	ldr	r2, [pc, #112]	@ (8006a8c <HAL_DMA_Abort_IT+0x3fc>)
 8006a1a:	4293      	cmp	r3, r2
 8006a1c:	d009      	beq.n	8006a32 <HAL_DMA_Abort_IT+0x3a2>
 8006a1e:	687b      	ldr	r3, [r7, #4]
 8006a20:	681b      	ldr	r3, [r3, #0]
 8006a22:	4a1b      	ldr	r2, [pc, #108]	@ (8006a90 <HAL_DMA_Abort_IT+0x400>)
 8006a24:	4293      	cmp	r3, r2
 8006a26:	d004      	beq.n	8006a32 <HAL_DMA_Abort_IT+0x3a2>
 8006a28:	687b      	ldr	r3, [r7, #4]
 8006a2a:	681b      	ldr	r3, [r3, #0]
 8006a2c:	4a19      	ldr	r2, [pc, #100]	@ (8006a94 <HAL_DMA_Abort_IT+0x404>)
 8006a2e:	4293      	cmp	r3, r2
 8006a30:	d132      	bne.n	8006a98 <HAL_DMA_Abort_IT+0x408>
 8006a32:	2301      	movs	r3, #1
 8006a34:	e031      	b.n	8006a9a <HAL_DMA_Abort_IT+0x40a>
 8006a36:	bf00      	nop
 8006a38:	40020010 	.word	0x40020010
 8006a3c:	40020028 	.word	0x40020028
 8006a40:	40020040 	.word	0x40020040
 8006a44:	40020058 	.word	0x40020058
 8006a48:	40020070 	.word	0x40020070
 8006a4c:	40020088 	.word	0x40020088
 8006a50:	400200a0 	.word	0x400200a0
 8006a54:	400200b8 	.word	0x400200b8
 8006a58:	40020410 	.word	0x40020410
 8006a5c:	40020428 	.word	0x40020428
 8006a60:	40020440 	.word	0x40020440
 8006a64:	40020458 	.word	0x40020458
 8006a68:	40020470 	.word	0x40020470
 8006a6c:	40020488 	.word	0x40020488
 8006a70:	400204a0 	.word	0x400204a0
 8006a74:	400204b8 	.word	0x400204b8
 8006a78:	58025408 	.word	0x58025408
 8006a7c:	5802541c 	.word	0x5802541c
 8006a80:	58025430 	.word	0x58025430
 8006a84:	58025444 	.word	0x58025444
 8006a88:	58025458 	.word	0x58025458
 8006a8c:	5802546c 	.word	0x5802546c
 8006a90:	58025480 	.word	0x58025480
 8006a94:	58025494 	.word	0x58025494
 8006a98:	2300      	movs	r3, #0
 8006a9a:	2b00      	cmp	r3, #0
 8006a9c:	d028      	beq.n	8006af0 <HAL_DMA_Abort_IT+0x460>
      {
        /* disable the DMAMUX sync overrun IT */
        hdma->DMAmuxChannel->CCR &= ~DMAMUX_CxCR_SOIE;
 8006a9e:	687b      	ldr	r3, [r7, #4]
 8006aa0:	6e1b      	ldr	r3, [r3, #96]	@ 0x60
 8006aa2:	681a      	ldr	r2, [r3, #0]
 8006aa4:	687b      	ldr	r3, [r7, #4]
 8006aa6:	6e1b      	ldr	r3, [r3, #96]	@ 0x60
 8006aa8:	f422 7280 	bic.w	r2, r2, #256	@ 0x100
 8006aac:	601a      	str	r2, [r3, #0]

        /* Clear all flags */
        regs_bdma = (BDMA_Base_Registers *)hdma->StreamBaseAddress;
 8006aae:	687b      	ldr	r3, [r7, #4]
 8006ab0:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 8006ab2:	60fb      	str	r3, [r7, #12]
        regs_bdma->IFCR = ((BDMA_IFCR_CGIF0) << (hdma->StreamIndex & 0x1FU));
 8006ab4:	687b      	ldr	r3, [r7, #4]
 8006ab6:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 8006ab8:	f003 031f 	and.w	r3, r3, #31
 8006abc:	2201      	movs	r2, #1
 8006abe:	409a      	lsls	r2, r3
 8006ac0:	68fb      	ldr	r3, [r7, #12]
 8006ac2:	605a      	str	r2, [r3, #4]

        /* Clear the DMAMUX synchro overrun flag */
        hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask;
 8006ac4:	687b      	ldr	r3, [r7, #4]
 8006ac6:	6e5b      	ldr	r3, [r3, #100]	@ 0x64
 8006ac8:	687a      	ldr	r2, [r7, #4]
 8006aca:	6e92      	ldr	r2, [r2, #104]	@ 0x68
 8006acc:	605a      	str	r2, [r3, #4]

        if(hdma->DMAmuxRequestGen != 0U)
 8006ace:	687b      	ldr	r3, [r7, #4]
 8006ad0:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8006ad2:	2b00      	cmp	r3, #0
 8006ad4:	d00c      	beq.n	8006af0 <HAL_DMA_Abort_IT+0x460>
        {
          /* if using DMAMUX request generator, disable the DMAMUX request generator overrun IT*/
          /* disable the request gen overrun IT */
          hdma->DMAmuxRequestGen->RGCR &= ~DMAMUX_RGxCR_OIE;
 8006ad6:	687b      	ldr	r3, [r7, #4]
 8006ad8:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8006ada:	681a      	ldr	r2, [r3, #0]
 8006adc:	687b      	ldr	r3, [r7, #4]
 8006ade:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8006ae0:	f422 7280 	bic.w	r2, r2, #256	@ 0x100
 8006ae4:	601a      	str	r2, [r3, #0]

          /* Clear the DMAMUX request generator overrun flag */
          hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask;
 8006ae6:	687b      	ldr	r3, [r7, #4]
 8006ae8:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 8006aea:	687a      	ldr	r2, [r7, #4]
 8006aec:	6f52      	ldr	r2, [r2, #116]	@ 0x74
 8006aee:	605a      	str	r2, [r3, #4]
        }
      }

      /* Change the DMA state */
      hdma->State = HAL_DMA_STATE_READY;
 8006af0:	687b      	ldr	r3, [r7, #4]
 8006af2:	2201      	movs	r2, #1
 8006af4:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

      /* Process Unlocked */
      __HAL_UNLOCK(hdma);
 8006af8:	687b      	ldr	r3, [r7, #4]
 8006afa:	2200      	movs	r2, #0
 8006afc:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34

      /* Call User Abort callback */
      if(hdma->XferAbortCallback != NULL)
 8006b00:	687b      	ldr	r3, [r7, #4]
 8006b02:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 8006b04:	2b00      	cmp	r3, #0
 8006b06:	d003      	beq.n	8006b10 <HAL_DMA_Abort_IT+0x480>
      {
        hdma->XferAbortCallback(hdma);
 8006b08:	687b      	ldr	r3, [r7, #4]
 8006b0a:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 8006b0c:	6878      	ldr	r0, [r7, #4]
 8006b0e:	4798      	blx	r3
      }
    }
  }

  return HAL_OK;
 8006b10:	2300      	movs	r3, #0
}
 8006b12:	4618      	mov	r0, r3
 8006b14:	3710      	adds	r7, #16
 8006b16:	46bd      	mov	sp, r7
 8006b18:	bd80      	pop	{r7, pc}
 8006b1a:	bf00      	nop

08006b1c <HAL_DMA_IRQHandler>:
  * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
  *               the configuration information for the specified DMA Stream.
  * @retval None
  */
void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
{
 8006b1c:	b580      	push	{r7, lr}
 8006b1e:	b08a      	sub	sp, #40	@ 0x28
 8006b20:	af00      	add	r7, sp, #0
 8006b22:	6078      	str	r0, [r7, #4]
  uint32_t tmpisr_dma, tmpisr_bdma;
  uint32_t ccr_reg;
  __IO uint32_t count = 0U;
 8006b24:	2300      	movs	r3, #0
 8006b26:	60fb      	str	r3, [r7, #12]
  uint32_t timeout = SystemCoreClock / 9600U;
 8006b28:	4b67      	ldr	r3, [pc, #412]	@ (8006cc8 <HAL_DMA_IRQHandler+0x1ac>)
 8006b2a:	681b      	ldr	r3, [r3, #0]
 8006b2c:	4a67      	ldr	r2, [pc, #412]	@ (8006ccc <HAL_DMA_IRQHandler+0x1b0>)
 8006b2e:	fba2 2303 	umull	r2, r3, r2, r3
 8006b32:	0a9b      	lsrs	r3, r3, #10
 8006b34:	627b      	str	r3, [r7, #36]	@ 0x24

  /* calculate DMA base and stream number */
  DMA_Base_Registers  *regs_dma  = (DMA_Base_Registers *)hdma->StreamBaseAddress;
 8006b36:	687b      	ldr	r3, [r7, #4]
 8006b38:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 8006b3a:	623b      	str	r3, [r7, #32]
  BDMA_Base_Registers *regs_bdma = (BDMA_Base_Registers *)hdma->StreamBaseAddress;
 8006b3c:	687b      	ldr	r3, [r7, #4]
 8006b3e:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 8006b40:	61fb      	str	r3, [r7, #28]

  tmpisr_dma  = regs_dma->ISR;
 8006b42:	6a3b      	ldr	r3, [r7, #32]
 8006b44:	681b      	ldr	r3, [r3, #0]
 8006b46:	61bb      	str	r3, [r7, #24]
  tmpisr_bdma = regs_bdma->ISR;
 8006b48:	69fb      	ldr	r3, [r7, #28]
 8006b4a:	681b      	ldr	r3, [r3, #0]
 8006b4c:	617b      	str	r3, [r7, #20]

  if(IS_DMA_STREAM_INSTANCE(hdma->Instance) != 0U)  /* DMA1 or DMA2 instance */
 8006b4e:	687b      	ldr	r3, [r7, #4]
 8006b50:	681b      	ldr	r3, [r3, #0]
 8006b52:	4a5f      	ldr	r2, [pc, #380]	@ (8006cd0 <HAL_DMA_IRQHandler+0x1b4>)
 8006b54:	4293      	cmp	r3, r2
 8006b56:	d04a      	beq.n	8006bee <HAL_DMA_IRQHandler+0xd2>
 8006b58:	687b      	ldr	r3, [r7, #4]
 8006b5a:	681b      	ldr	r3, [r3, #0]
 8006b5c:	4a5d      	ldr	r2, [pc, #372]	@ (8006cd4 <HAL_DMA_IRQHandler+0x1b8>)
 8006b5e:	4293      	cmp	r3, r2
 8006b60:	d045      	beq.n	8006bee <HAL_DMA_IRQHandler+0xd2>
 8006b62:	687b      	ldr	r3, [r7, #4]
 8006b64:	681b      	ldr	r3, [r3, #0]
 8006b66:	4a5c      	ldr	r2, [pc, #368]	@ (8006cd8 <HAL_DMA_IRQHandler+0x1bc>)
 8006b68:	4293      	cmp	r3, r2
 8006b6a:	d040      	beq.n	8006bee <HAL_DMA_IRQHandler+0xd2>
 8006b6c:	687b      	ldr	r3, [r7, #4]
 8006b6e:	681b      	ldr	r3, [r3, #0]
 8006b70:	4a5a      	ldr	r2, [pc, #360]	@ (8006cdc <HAL_DMA_IRQHandler+0x1c0>)
 8006b72:	4293      	cmp	r3, r2
 8006b74:	d03b      	beq.n	8006bee <HAL_DMA_IRQHandler+0xd2>
 8006b76:	687b      	ldr	r3, [r7, #4]
 8006b78:	681b      	ldr	r3, [r3, #0]
 8006b7a:	4a59      	ldr	r2, [pc, #356]	@ (8006ce0 <HAL_DMA_IRQHandler+0x1c4>)
 8006b7c:	4293      	cmp	r3, r2
 8006b7e:	d036      	beq.n	8006bee <HAL_DMA_IRQHandler+0xd2>
 8006b80:	687b      	ldr	r3, [r7, #4]
 8006b82:	681b      	ldr	r3, [r3, #0]
 8006b84:	4a57      	ldr	r2, [pc, #348]	@ (8006ce4 <HAL_DMA_IRQHandler+0x1c8>)
 8006b86:	4293      	cmp	r3, r2
 8006b88:	d031      	beq.n	8006bee <HAL_DMA_IRQHandler+0xd2>
 8006b8a:	687b      	ldr	r3, [r7, #4]
 8006b8c:	681b      	ldr	r3, [r3, #0]
 8006b8e:	4a56      	ldr	r2, [pc, #344]	@ (8006ce8 <HAL_DMA_IRQHandler+0x1cc>)
 8006b90:	4293      	cmp	r3, r2
 8006b92:	d02c      	beq.n	8006bee <HAL_DMA_IRQHandler+0xd2>
 8006b94:	687b      	ldr	r3, [r7, #4]
 8006b96:	681b      	ldr	r3, [r3, #0]
 8006b98:	4a54      	ldr	r2, [pc, #336]	@ (8006cec <HAL_DMA_IRQHandler+0x1d0>)
 8006b9a:	4293      	cmp	r3, r2
 8006b9c:	d027      	beq.n	8006bee <HAL_DMA_IRQHandler+0xd2>
 8006b9e:	687b      	ldr	r3, [r7, #4]
 8006ba0:	681b      	ldr	r3, [r3, #0]
 8006ba2:	4a53      	ldr	r2, [pc, #332]	@ (8006cf0 <HAL_DMA_IRQHandler+0x1d4>)
 8006ba4:	4293      	cmp	r3, r2
 8006ba6:	d022      	beq.n	8006bee <HAL_DMA_IRQHandler+0xd2>
 8006ba8:	687b      	ldr	r3, [r7, #4]
 8006baa:	681b      	ldr	r3, [r3, #0]
 8006bac:	4a51      	ldr	r2, [pc, #324]	@ (8006cf4 <HAL_DMA_IRQHandler+0x1d8>)
 8006bae:	4293      	cmp	r3, r2
 8006bb0:	d01d      	beq.n	8006bee <HAL_DMA_IRQHandler+0xd2>
 8006bb2:	687b      	ldr	r3, [r7, #4]
 8006bb4:	681b      	ldr	r3, [r3, #0]
 8006bb6:	4a50      	ldr	r2, [pc, #320]	@ (8006cf8 <HAL_DMA_IRQHandler+0x1dc>)
 8006bb8:	4293      	cmp	r3, r2
 8006bba:	d018      	beq.n	8006bee <HAL_DMA_IRQHandler+0xd2>
 8006bbc:	687b      	ldr	r3, [r7, #4]
 8006bbe:	681b      	ldr	r3, [r3, #0]
 8006bc0:	4a4e      	ldr	r2, [pc, #312]	@ (8006cfc <HAL_DMA_IRQHandler+0x1e0>)
 8006bc2:	4293      	cmp	r3, r2
 8006bc4:	d013      	beq.n	8006bee <HAL_DMA_IRQHandler+0xd2>
 8006bc6:	687b      	ldr	r3, [r7, #4]
 8006bc8:	681b      	ldr	r3, [r3, #0]
 8006bca:	4a4d      	ldr	r2, [pc, #308]	@ (8006d00 <HAL_DMA_IRQHandler+0x1e4>)
 8006bcc:	4293      	cmp	r3, r2
 8006bce:	d00e      	beq.n	8006bee <HAL_DMA_IRQHandler+0xd2>
 8006bd0:	687b      	ldr	r3, [r7, #4]
 8006bd2:	681b      	ldr	r3, [r3, #0]
 8006bd4:	4a4b      	ldr	r2, [pc, #300]	@ (8006d04 <HAL_DMA_IRQHandler+0x1e8>)
 8006bd6:	4293      	cmp	r3, r2
 8006bd8:	d009      	beq.n	8006bee <HAL_DMA_IRQHandler+0xd2>
 8006bda:	687b      	ldr	r3, [r7, #4]
 8006bdc:	681b      	ldr	r3, [r3, #0]
 8006bde:	4a4a      	ldr	r2, [pc, #296]	@ (8006d08 <HAL_DMA_IRQHandler+0x1ec>)
 8006be0:	4293      	cmp	r3, r2
 8006be2:	d004      	beq.n	8006bee <HAL_DMA_IRQHandler+0xd2>
 8006be4:	687b      	ldr	r3, [r7, #4]
 8006be6:	681b      	ldr	r3, [r3, #0]
 8006be8:	4a48      	ldr	r2, [pc, #288]	@ (8006d0c <HAL_DMA_IRQHandler+0x1f0>)
 8006bea:	4293      	cmp	r3, r2
 8006bec:	d101      	bne.n	8006bf2 <HAL_DMA_IRQHandler+0xd6>
 8006bee:	2301      	movs	r3, #1
 8006bf0:	e000      	b.n	8006bf4 <HAL_DMA_IRQHandler+0xd8>
 8006bf2:	2300      	movs	r3, #0
 8006bf4:	2b00      	cmp	r3, #0
 8006bf6:	f000 842b 	beq.w	8007450 <HAL_DMA_IRQHandler+0x934>
  {
    /* Transfer Error Interrupt management ***************************************/
    if ((tmpisr_dma & (DMA_FLAG_TEIF0_4 << (hdma->StreamIndex & 0x1FU))) != 0U)
 8006bfa:	687b      	ldr	r3, [r7, #4]
 8006bfc:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 8006bfe:	f003 031f 	and.w	r3, r3, #31
 8006c02:	2208      	movs	r2, #8
 8006c04:	409a      	lsls	r2, r3
 8006c06:	69bb      	ldr	r3, [r7, #24]
 8006c08:	4013      	ands	r3, r2
 8006c0a:	2b00      	cmp	r3, #0
 8006c0c:	f000 80a2 	beq.w	8006d54 <HAL_DMA_IRQHandler+0x238>
    {
      if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_TE) != 0U)
 8006c10:	687b      	ldr	r3, [r7, #4]
 8006c12:	681b      	ldr	r3, [r3, #0]
 8006c14:	4a2e      	ldr	r2, [pc, #184]	@ (8006cd0 <HAL_DMA_IRQHandler+0x1b4>)
 8006c16:	4293      	cmp	r3, r2
 8006c18:	d04a      	beq.n	8006cb0 <HAL_DMA_IRQHandler+0x194>
 8006c1a:	687b      	ldr	r3, [r7, #4]
 8006c1c:	681b      	ldr	r3, [r3, #0]
 8006c1e:	4a2d      	ldr	r2, [pc, #180]	@ (8006cd4 <HAL_DMA_IRQHandler+0x1b8>)
 8006c20:	4293      	cmp	r3, r2
 8006c22:	d045      	beq.n	8006cb0 <HAL_DMA_IRQHandler+0x194>
 8006c24:	687b      	ldr	r3, [r7, #4]
 8006c26:	681b      	ldr	r3, [r3, #0]
 8006c28:	4a2b      	ldr	r2, [pc, #172]	@ (8006cd8 <HAL_DMA_IRQHandler+0x1bc>)
 8006c2a:	4293      	cmp	r3, r2
 8006c2c:	d040      	beq.n	8006cb0 <HAL_DMA_IRQHandler+0x194>
 8006c2e:	687b      	ldr	r3, [r7, #4]
 8006c30:	681b      	ldr	r3, [r3, #0]
 8006c32:	4a2a      	ldr	r2, [pc, #168]	@ (8006cdc <HAL_DMA_IRQHandler+0x1c0>)
 8006c34:	4293      	cmp	r3, r2
 8006c36:	d03b      	beq.n	8006cb0 <HAL_DMA_IRQHandler+0x194>
 8006c38:	687b      	ldr	r3, [r7, #4]
 8006c3a:	681b      	ldr	r3, [r3, #0]
 8006c3c:	4a28      	ldr	r2, [pc, #160]	@ (8006ce0 <HAL_DMA_IRQHandler+0x1c4>)
 8006c3e:	4293      	cmp	r3, r2
 8006c40:	d036      	beq.n	8006cb0 <HAL_DMA_IRQHandler+0x194>
 8006c42:	687b      	ldr	r3, [r7, #4]
 8006c44:	681b      	ldr	r3, [r3, #0]
 8006c46:	4a27      	ldr	r2, [pc, #156]	@ (8006ce4 <HAL_DMA_IRQHandler+0x1c8>)
 8006c48:	4293      	cmp	r3, r2
 8006c4a:	d031      	beq.n	8006cb0 <HAL_DMA_IRQHandler+0x194>
 8006c4c:	687b      	ldr	r3, [r7, #4]
 8006c4e:	681b      	ldr	r3, [r3, #0]
 8006c50:	4a25      	ldr	r2, [pc, #148]	@ (8006ce8 <HAL_DMA_IRQHandler+0x1cc>)
 8006c52:	4293      	cmp	r3, r2
 8006c54:	d02c      	beq.n	8006cb0 <HAL_DMA_IRQHandler+0x194>
 8006c56:	687b      	ldr	r3, [r7, #4]
 8006c58:	681b      	ldr	r3, [r3, #0]
 8006c5a:	4a24      	ldr	r2, [pc, #144]	@ (8006cec <HAL_DMA_IRQHandler+0x1d0>)
 8006c5c:	4293      	cmp	r3, r2
 8006c5e:	d027      	beq.n	8006cb0 <HAL_DMA_IRQHandler+0x194>
 8006c60:	687b      	ldr	r3, [r7, #4]
 8006c62:	681b      	ldr	r3, [r3, #0]
 8006c64:	4a22      	ldr	r2, [pc, #136]	@ (8006cf0 <HAL_DMA_IRQHandler+0x1d4>)
 8006c66:	4293      	cmp	r3, r2
 8006c68:	d022      	beq.n	8006cb0 <HAL_DMA_IRQHandler+0x194>
 8006c6a:	687b      	ldr	r3, [r7, #4]
 8006c6c:	681b      	ldr	r3, [r3, #0]
 8006c6e:	4a21      	ldr	r2, [pc, #132]	@ (8006cf4 <HAL_DMA_IRQHandler+0x1d8>)
 8006c70:	4293      	cmp	r3, r2
 8006c72:	d01d      	beq.n	8006cb0 <HAL_DMA_IRQHandler+0x194>
 8006c74:	687b      	ldr	r3, [r7, #4]
 8006c76:	681b      	ldr	r3, [r3, #0]
 8006c78:	4a1f      	ldr	r2, [pc, #124]	@ (8006cf8 <HAL_DMA_IRQHandler+0x1dc>)
 8006c7a:	4293      	cmp	r3, r2
 8006c7c:	d018      	beq.n	8006cb0 <HAL_DMA_IRQHandler+0x194>
 8006c7e:	687b      	ldr	r3, [r7, #4]
 8006c80:	681b      	ldr	r3, [r3, #0]
 8006c82:	4a1e      	ldr	r2, [pc, #120]	@ (8006cfc <HAL_DMA_IRQHandler+0x1e0>)
 8006c84:	4293      	cmp	r3, r2
 8006c86:	d013      	beq.n	8006cb0 <HAL_DMA_IRQHandler+0x194>
 8006c88:	687b      	ldr	r3, [r7, #4]
 8006c8a:	681b      	ldr	r3, [r3, #0]
 8006c8c:	4a1c      	ldr	r2, [pc, #112]	@ (8006d00 <HAL_DMA_IRQHandler+0x1e4>)
 8006c8e:	4293      	cmp	r3, r2
 8006c90:	d00e      	beq.n	8006cb0 <HAL_DMA_IRQHandler+0x194>
 8006c92:	687b      	ldr	r3, [r7, #4]
 8006c94:	681b      	ldr	r3, [r3, #0]
 8006c96:	4a1b      	ldr	r2, [pc, #108]	@ (8006d04 <HAL_DMA_IRQHandler+0x1e8>)
 8006c98:	4293      	cmp	r3, r2
 8006c9a:	d009      	beq.n	8006cb0 <HAL_DMA_IRQHandler+0x194>
 8006c9c:	687b      	ldr	r3, [r7, #4]
 8006c9e:	681b      	ldr	r3, [r3, #0]
 8006ca0:	4a19      	ldr	r2, [pc, #100]	@ (8006d08 <HAL_DMA_IRQHandler+0x1ec>)
 8006ca2:	4293      	cmp	r3, r2
 8006ca4:	d004      	beq.n	8006cb0 <HAL_DMA_IRQHandler+0x194>
 8006ca6:	687b      	ldr	r3, [r7, #4]
 8006ca8:	681b      	ldr	r3, [r3, #0]
 8006caa:	4a18      	ldr	r2, [pc, #96]	@ (8006d0c <HAL_DMA_IRQHandler+0x1f0>)
 8006cac:	4293      	cmp	r3, r2
 8006cae:	d12f      	bne.n	8006d10 <HAL_DMA_IRQHandler+0x1f4>
 8006cb0:	687b      	ldr	r3, [r7, #4]
 8006cb2:	681b      	ldr	r3, [r3, #0]
 8006cb4:	681b      	ldr	r3, [r3, #0]
 8006cb6:	f003 0304 	and.w	r3, r3, #4
 8006cba:	2b00      	cmp	r3, #0
 8006cbc:	bf14      	ite	ne
 8006cbe:	2301      	movne	r3, #1
 8006cc0:	2300      	moveq	r3, #0
 8006cc2:	b2db      	uxtb	r3, r3
 8006cc4:	e02e      	b.n	8006d24 <HAL_DMA_IRQHandler+0x208>
 8006cc6:	bf00      	nop
 8006cc8:	2400000c 	.word	0x2400000c
 8006ccc:	1b4e81b5 	.word	0x1b4e81b5
 8006cd0:	40020010 	.word	0x40020010
 8006cd4:	40020028 	.word	0x40020028
 8006cd8:	40020040 	.word	0x40020040
 8006cdc:	40020058 	.word	0x40020058
 8006ce0:	40020070 	.word	0x40020070
 8006ce4:	40020088 	.word	0x40020088
 8006ce8:	400200a0 	.word	0x400200a0
 8006cec:	400200b8 	.word	0x400200b8
 8006cf0:	40020410 	.word	0x40020410
 8006cf4:	40020428 	.word	0x40020428
 8006cf8:	40020440 	.word	0x40020440
 8006cfc:	40020458 	.word	0x40020458
 8006d00:	40020470 	.word	0x40020470
 8006d04:	40020488 	.word	0x40020488
 8006d08:	400204a0 	.word	0x400204a0
 8006d0c:	400204b8 	.word	0x400204b8
 8006d10:	687b      	ldr	r3, [r7, #4]
 8006d12:	681b      	ldr	r3, [r3, #0]
 8006d14:	681b      	ldr	r3, [r3, #0]
 8006d16:	f003 0308 	and.w	r3, r3, #8
 8006d1a:	2b00      	cmp	r3, #0
 8006d1c:	bf14      	ite	ne
 8006d1e:	2301      	movne	r3, #1
 8006d20:	2300      	moveq	r3, #0
 8006d22:	b2db      	uxtb	r3, r3
 8006d24:	2b00      	cmp	r3, #0
 8006d26:	d015      	beq.n	8006d54 <HAL_DMA_IRQHandler+0x238>
      {
        /* Disable the transfer error interrupt */
        ((DMA_Stream_TypeDef   *)hdma->Instance)->CR  &= ~(DMA_IT_TE);
 8006d28:	687b      	ldr	r3, [r7, #4]
 8006d2a:	681b      	ldr	r3, [r3, #0]
 8006d2c:	681a      	ldr	r2, [r3, #0]
 8006d2e:	687b      	ldr	r3, [r7, #4]
 8006d30:	681b      	ldr	r3, [r3, #0]
 8006d32:	f022 0204 	bic.w	r2, r2, #4
 8006d36:	601a      	str	r2, [r3, #0]

        /* Clear the transfer error flag */
        regs_dma->IFCR = DMA_FLAG_TEIF0_4 << (hdma->StreamIndex & 0x1FU);
 8006d38:	687b      	ldr	r3, [r7, #4]
 8006d3a:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 8006d3c:	f003 031f 	and.w	r3, r3, #31
 8006d40:	2208      	movs	r2, #8
 8006d42:	409a      	lsls	r2, r3
 8006d44:	6a3b      	ldr	r3, [r7, #32]
 8006d46:	609a      	str	r2, [r3, #8]

        /* Update error code */
        hdma->ErrorCode |= HAL_DMA_ERROR_TE;
 8006d48:	687b      	ldr	r3, [r7, #4]
 8006d4a:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 8006d4c:	f043 0201 	orr.w	r2, r3, #1
 8006d50:	687b      	ldr	r3, [r7, #4]
 8006d52:	655a      	str	r2, [r3, #84]	@ 0x54
      }
    }
    /* FIFO Error Interrupt management ******************************************/
    if ((tmpisr_dma & (DMA_FLAG_FEIF0_4 << (hdma->StreamIndex & 0x1FU))) != 0U)
 8006d54:	687b      	ldr	r3, [r7, #4]
 8006d56:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 8006d58:	f003 031f 	and.w	r3, r3, #31
 8006d5c:	69ba      	ldr	r2, [r7, #24]
 8006d5e:	fa22 f303 	lsr.w	r3, r2, r3
 8006d62:	f003 0301 	and.w	r3, r3, #1
 8006d66:	2b00      	cmp	r3, #0
 8006d68:	d06e      	beq.n	8006e48 <HAL_DMA_IRQHandler+0x32c>
    {
      if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_FE) != 0U)
 8006d6a:	687b      	ldr	r3, [r7, #4]
 8006d6c:	681b      	ldr	r3, [r3, #0]
 8006d6e:	4a69      	ldr	r2, [pc, #420]	@ (8006f14 <HAL_DMA_IRQHandler+0x3f8>)
 8006d70:	4293      	cmp	r3, r2
 8006d72:	d04a      	beq.n	8006e0a <HAL_DMA_IRQHandler+0x2ee>
 8006d74:	687b      	ldr	r3, [r7, #4]
 8006d76:	681b      	ldr	r3, [r3, #0]
 8006d78:	4a67      	ldr	r2, [pc, #412]	@ (8006f18 <HAL_DMA_IRQHandler+0x3fc>)
 8006d7a:	4293      	cmp	r3, r2
 8006d7c:	d045      	beq.n	8006e0a <HAL_DMA_IRQHandler+0x2ee>
 8006d7e:	687b      	ldr	r3, [r7, #4]
 8006d80:	681b      	ldr	r3, [r3, #0]
 8006d82:	4a66      	ldr	r2, [pc, #408]	@ (8006f1c <HAL_DMA_IRQHandler+0x400>)
 8006d84:	4293      	cmp	r3, r2
 8006d86:	d040      	beq.n	8006e0a <HAL_DMA_IRQHandler+0x2ee>
 8006d88:	687b      	ldr	r3, [r7, #4]
 8006d8a:	681b      	ldr	r3, [r3, #0]
 8006d8c:	4a64      	ldr	r2, [pc, #400]	@ (8006f20 <HAL_DMA_IRQHandler+0x404>)
 8006d8e:	4293      	cmp	r3, r2
 8006d90:	d03b      	beq.n	8006e0a <HAL_DMA_IRQHandler+0x2ee>
 8006d92:	687b      	ldr	r3, [r7, #4]
 8006d94:	681b      	ldr	r3, [r3, #0]
 8006d96:	4a63      	ldr	r2, [pc, #396]	@ (8006f24 <HAL_DMA_IRQHandler+0x408>)
 8006d98:	4293      	cmp	r3, r2
 8006d9a:	d036      	beq.n	8006e0a <HAL_DMA_IRQHandler+0x2ee>
 8006d9c:	687b      	ldr	r3, [r7, #4]
 8006d9e:	681b      	ldr	r3, [r3, #0]
 8006da0:	4a61      	ldr	r2, [pc, #388]	@ (8006f28 <HAL_DMA_IRQHandler+0x40c>)
 8006da2:	4293      	cmp	r3, r2
 8006da4:	d031      	beq.n	8006e0a <HAL_DMA_IRQHandler+0x2ee>
 8006da6:	687b      	ldr	r3, [r7, #4]
 8006da8:	681b      	ldr	r3, [r3, #0]
 8006daa:	4a60      	ldr	r2, [pc, #384]	@ (8006f2c <HAL_DMA_IRQHandler+0x410>)
 8006dac:	4293      	cmp	r3, r2
 8006dae:	d02c      	beq.n	8006e0a <HAL_DMA_IRQHandler+0x2ee>
 8006db0:	687b      	ldr	r3, [r7, #4]
 8006db2:	681b      	ldr	r3, [r3, #0]
 8006db4:	4a5e      	ldr	r2, [pc, #376]	@ (8006f30 <HAL_DMA_IRQHandler+0x414>)
 8006db6:	4293      	cmp	r3, r2
 8006db8:	d027      	beq.n	8006e0a <HAL_DMA_IRQHandler+0x2ee>
 8006dba:	687b      	ldr	r3, [r7, #4]
 8006dbc:	681b      	ldr	r3, [r3, #0]
 8006dbe:	4a5d      	ldr	r2, [pc, #372]	@ (8006f34 <HAL_DMA_IRQHandler+0x418>)
 8006dc0:	4293      	cmp	r3, r2
 8006dc2:	d022      	beq.n	8006e0a <HAL_DMA_IRQHandler+0x2ee>
 8006dc4:	687b      	ldr	r3, [r7, #4]
 8006dc6:	681b      	ldr	r3, [r3, #0]
 8006dc8:	4a5b      	ldr	r2, [pc, #364]	@ (8006f38 <HAL_DMA_IRQHandler+0x41c>)
 8006dca:	4293      	cmp	r3, r2
 8006dcc:	d01d      	beq.n	8006e0a <HAL_DMA_IRQHandler+0x2ee>
 8006dce:	687b      	ldr	r3, [r7, #4]
 8006dd0:	681b      	ldr	r3, [r3, #0]
 8006dd2:	4a5a      	ldr	r2, [pc, #360]	@ (8006f3c <HAL_DMA_IRQHandler+0x420>)
 8006dd4:	4293      	cmp	r3, r2
 8006dd6:	d018      	beq.n	8006e0a <HAL_DMA_IRQHandler+0x2ee>
 8006dd8:	687b      	ldr	r3, [r7, #4]
 8006dda:	681b      	ldr	r3, [r3, #0]
 8006ddc:	4a58      	ldr	r2, [pc, #352]	@ (8006f40 <HAL_DMA_IRQHandler+0x424>)
 8006dde:	4293      	cmp	r3, r2
 8006de0:	d013      	beq.n	8006e0a <HAL_DMA_IRQHandler+0x2ee>
 8006de2:	687b      	ldr	r3, [r7, #4]
 8006de4:	681b      	ldr	r3, [r3, #0]
 8006de6:	4a57      	ldr	r2, [pc, #348]	@ (8006f44 <HAL_DMA_IRQHandler+0x428>)
 8006de8:	4293      	cmp	r3, r2
 8006dea:	d00e      	beq.n	8006e0a <HAL_DMA_IRQHandler+0x2ee>
 8006dec:	687b      	ldr	r3, [r7, #4]
 8006dee:	681b      	ldr	r3, [r3, #0]
 8006df0:	4a55      	ldr	r2, [pc, #340]	@ (8006f48 <HAL_DMA_IRQHandler+0x42c>)
 8006df2:	4293      	cmp	r3, r2
 8006df4:	d009      	beq.n	8006e0a <HAL_DMA_IRQHandler+0x2ee>
 8006df6:	687b      	ldr	r3, [r7, #4]
 8006df8:	681b      	ldr	r3, [r3, #0]
 8006dfa:	4a54      	ldr	r2, [pc, #336]	@ (8006f4c <HAL_DMA_IRQHandler+0x430>)
 8006dfc:	4293      	cmp	r3, r2
 8006dfe:	d004      	beq.n	8006e0a <HAL_DMA_IRQHandler+0x2ee>
 8006e00:	687b      	ldr	r3, [r7, #4]
 8006e02:	681b      	ldr	r3, [r3, #0]
 8006e04:	4a52      	ldr	r2, [pc, #328]	@ (8006f50 <HAL_DMA_IRQHandler+0x434>)
 8006e06:	4293      	cmp	r3, r2
 8006e08:	d10a      	bne.n	8006e20 <HAL_DMA_IRQHandler+0x304>
 8006e0a:	687b      	ldr	r3, [r7, #4]
 8006e0c:	681b      	ldr	r3, [r3, #0]
 8006e0e:	695b      	ldr	r3, [r3, #20]
 8006e10:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 8006e14:	2b00      	cmp	r3, #0
 8006e16:	bf14      	ite	ne
 8006e18:	2301      	movne	r3, #1
 8006e1a:	2300      	moveq	r3, #0
 8006e1c:	b2db      	uxtb	r3, r3
 8006e1e:	e003      	b.n	8006e28 <HAL_DMA_IRQHandler+0x30c>
 8006e20:	687b      	ldr	r3, [r7, #4]
 8006e22:	681b      	ldr	r3, [r3, #0]
 8006e24:	681b      	ldr	r3, [r3, #0]
 8006e26:	2300      	movs	r3, #0
 8006e28:	2b00      	cmp	r3, #0
 8006e2a:	d00d      	beq.n	8006e48 <HAL_DMA_IRQHandler+0x32c>
      {
        /* Clear the FIFO error flag */
        regs_dma->IFCR = DMA_FLAG_FEIF0_4 << (hdma->StreamIndex & 0x1FU);
 8006e2c:	687b      	ldr	r3, [r7, #4]
 8006e2e:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 8006e30:	f003 031f 	and.w	r3, r3, #31
 8006e34:	2201      	movs	r2, #1
 8006e36:	409a      	lsls	r2, r3
 8006e38:	6a3b      	ldr	r3, [r7, #32]
 8006e3a:	609a      	str	r2, [r3, #8]

        /* Update error code */
        hdma->ErrorCode |= HAL_DMA_ERROR_FE;
 8006e3c:	687b      	ldr	r3, [r7, #4]
 8006e3e:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 8006e40:	f043 0202 	orr.w	r2, r3, #2
 8006e44:	687b      	ldr	r3, [r7, #4]
 8006e46:	655a      	str	r2, [r3, #84]	@ 0x54
      }
    }
    /* Direct Mode Error Interrupt management ***********************************/
    if ((tmpisr_dma & (DMA_FLAG_DMEIF0_4 << (hdma->StreamIndex & 0x1FU))) != 0U)
 8006e48:	687b      	ldr	r3, [r7, #4]
 8006e4a:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 8006e4c:	f003 031f 	and.w	r3, r3, #31
 8006e50:	2204      	movs	r2, #4
 8006e52:	409a      	lsls	r2, r3
 8006e54:	69bb      	ldr	r3, [r7, #24]
 8006e56:	4013      	ands	r3, r2
 8006e58:	2b00      	cmp	r3, #0
 8006e5a:	f000 808f 	beq.w	8006f7c <HAL_DMA_IRQHandler+0x460>
    {
      if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_DME) != 0U)
 8006e5e:	687b      	ldr	r3, [r7, #4]
 8006e60:	681b      	ldr	r3, [r3, #0]
 8006e62:	4a2c      	ldr	r2, [pc, #176]	@ (8006f14 <HAL_DMA_IRQHandler+0x3f8>)
 8006e64:	4293      	cmp	r3, r2
 8006e66:	d04a      	beq.n	8006efe <HAL_DMA_IRQHandler+0x3e2>
 8006e68:	687b      	ldr	r3, [r7, #4]
 8006e6a:	681b      	ldr	r3, [r3, #0]
 8006e6c:	4a2a      	ldr	r2, [pc, #168]	@ (8006f18 <HAL_DMA_IRQHandler+0x3fc>)
 8006e6e:	4293      	cmp	r3, r2
 8006e70:	d045      	beq.n	8006efe <HAL_DMA_IRQHandler+0x3e2>
 8006e72:	687b      	ldr	r3, [r7, #4]
 8006e74:	681b      	ldr	r3, [r3, #0]
 8006e76:	4a29      	ldr	r2, [pc, #164]	@ (8006f1c <HAL_DMA_IRQHandler+0x400>)
 8006e78:	4293      	cmp	r3, r2
 8006e7a:	d040      	beq.n	8006efe <HAL_DMA_IRQHandler+0x3e2>
 8006e7c:	687b      	ldr	r3, [r7, #4]
 8006e7e:	681b      	ldr	r3, [r3, #0]
 8006e80:	4a27      	ldr	r2, [pc, #156]	@ (8006f20 <HAL_DMA_IRQHandler+0x404>)
 8006e82:	4293      	cmp	r3, r2
 8006e84:	d03b      	beq.n	8006efe <HAL_DMA_IRQHandler+0x3e2>
 8006e86:	687b      	ldr	r3, [r7, #4]
 8006e88:	681b      	ldr	r3, [r3, #0]
 8006e8a:	4a26      	ldr	r2, [pc, #152]	@ (8006f24 <HAL_DMA_IRQHandler+0x408>)
 8006e8c:	4293      	cmp	r3, r2
 8006e8e:	d036      	beq.n	8006efe <HAL_DMA_IRQHandler+0x3e2>
 8006e90:	687b      	ldr	r3, [r7, #4]
 8006e92:	681b      	ldr	r3, [r3, #0]
 8006e94:	4a24      	ldr	r2, [pc, #144]	@ (8006f28 <HAL_DMA_IRQHandler+0x40c>)
 8006e96:	4293      	cmp	r3, r2
 8006e98:	d031      	beq.n	8006efe <HAL_DMA_IRQHandler+0x3e2>
 8006e9a:	687b      	ldr	r3, [r7, #4]
 8006e9c:	681b      	ldr	r3, [r3, #0]
 8006e9e:	4a23      	ldr	r2, [pc, #140]	@ (8006f2c <HAL_DMA_IRQHandler+0x410>)
 8006ea0:	4293      	cmp	r3, r2
 8006ea2:	d02c      	beq.n	8006efe <HAL_DMA_IRQHandler+0x3e2>
 8006ea4:	687b      	ldr	r3, [r7, #4]
 8006ea6:	681b      	ldr	r3, [r3, #0]
 8006ea8:	4a21      	ldr	r2, [pc, #132]	@ (8006f30 <HAL_DMA_IRQHandler+0x414>)
 8006eaa:	4293      	cmp	r3, r2
 8006eac:	d027      	beq.n	8006efe <HAL_DMA_IRQHandler+0x3e2>
 8006eae:	687b      	ldr	r3, [r7, #4]
 8006eb0:	681b      	ldr	r3, [r3, #0]
 8006eb2:	4a20      	ldr	r2, [pc, #128]	@ (8006f34 <HAL_DMA_IRQHandler+0x418>)
 8006eb4:	4293      	cmp	r3, r2
 8006eb6:	d022      	beq.n	8006efe <HAL_DMA_IRQHandler+0x3e2>
 8006eb8:	687b      	ldr	r3, [r7, #4]
 8006eba:	681b      	ldr	r3, [r3, #0]
 8006ebc:	4a1e      	ldr	r2, [pc, #120]	@ (8006f38 <HAL_DMA_IRQHandler+0x41c>)
 8006ebe:	4293      	cmp	r3, r2
 8006ec0:	d01d      	beq.n	8006efe <HAL_DMA_IRQHandler+0x3e2>
 8006ec2:	687b      	ldr	r3, [r7, #4]
 8006ec4:	681b      	ldr	r3, [r3, #0]
 8006ec6:	4a1d      	ldr	r2, [pc, #116]	@ (8006f3c <HAL_DMA_IRQHandler+0x420>)
 8006ec8:	4293      	cmp	r3, r2
 8006eca:	d018      	beq.n	8006efe <HAL_DMA_IRQHandler+0x3e2>
 8006ecc:	687b      	ldr	r3, [r7, #4]
 8006ece:	681b      	ldr	r3, [r3, #0]
 8006ed0:	4a1b      	ldr	r2, [pc, #108]	@ (8006f40 <HAL_DMA_IRQHandler+0x424>)
 8006ed2:	4293      	cmp	r3, r2
 8006ed4:	d013      	beq.n	8006efe <HAL_DMA_IRQHandler+0x3e2>
 8006ed6:	687b      	ldr	r3, [r7, #4]
 8006ed8:	681b      	ldr	r3, [r3, #0]
 8006eda:	4a1a      	ldr	r2, [pc, #104]	@ (8006f44 <HAL_DMA_IRQHandler+0x428>)
 8006edc:	4293      	cmp	r3, r2
 8006ede:	d00e      	beq.n	8006efe <HAL_DMA_IRQHandler+0x3e2>
 8006ee0:	687b      	ldr	r3, [r7, #4]
 8006ee2:	681b      	ldr	r3, [r3, #0]
 8006ee4:	4a18      	ldr	r2, [pc, #96]	@ (8006f48 <HAL_DMA_IRQHandler+0x42c>)
 8006ee6:	4293      	cmp	r3, r2
 8006ee8:	d009      	beq.n	8006efe <HAL_DMA_IRQHandler+0x3e2>
 8006eea:	687b      	ldr	r3, [r7, #4]
 8006eec:	681b      	ldr	r3, [r3, #0]
 8006eee:	4a17      	ldr	r2, [pc, #92]	@ (8006f4c <HAL_DMA_IRQHandler+0x430>)
 8006ef0:	4293      	cmp	r3, r2
 8006ef2:	d004      	beq.n	8006efe <HAL_DMA_IRQHandler+0x3e2>
 8006ef4:	687b      	ldr	r3, [r7, #4]
 8006ef6:	681b      	ldr	r3, [r3, #0]
 8006ef8:	4a15      	ldr	r2, [pc, #84]	@ (8006f50 <HAL_DMA_IRQHandler+0x434>)
 8006efa:	4293      	cmp	r3, r2
 8006efc:	d12a      	bne.n	8006f54 <HAL_DMA_IRQHandler+0x438>
 8006efe:	687b      	ldr	r3, [r7, #4]
 8006f00:	681b      	ldr	r3, [r3, #0]
 8006f02:	681b      	ldr	r3, [r3, #0]
 8006f04:	f003 0302 	and.w	r3, r3, #2
 8006f08:	2b00      	cmp	r3, #0
 8006f0a:	bf14      	ite	ne
 8006f0c:	2301      	movne	r3, #1
 8006f0e:	2300      	moveq	r3, #0
 8006f10:	b2db      	uxtb	r3, r3
 8006f12:	e023      	b.n	8006f5c <HAL_DMA_IRQHandler+0x440>
 8006f14:	40020010 	.word	0x40020010
 8006f18:	40020028 	.word	0x40020028
 8006f1c:	40020040 	.word	0x40020040
 8006f20:	40020058 	.word	0x40020058
 8006f24:	40020070 	.word	0x40020070
 8006f28:	40020088 	.word	0x40020088
 8006f2c:	400200a0 	.word	0x400200a0
 8006f30:	400200b8 	.word	0x400200b8
 8006f34:	40020410 	.word	0x40020410
 8006f38:	40020428 	.word	0x40020428
 8006f3c:	40020440 	.word	0x40020440
 8006f40:	40020458 	.word	0x40020458
 8006f44:	40020470 	.word	0x40020470
 8006f48:	40020488 	.word	0x40020488
 8006f4c:	400204a0 	.word	0x400204a0
 8006f50:	400204b8 	.word	0x400204b8
 8006f54:	687b      	ldr	r3, [r7, #4]
 8006f56:	681b      	ldr	r3, [r3, #0]
 8006f58:	681b      	ldr	r3, [r3, #0]
 8006f5a:	2300      	movs	r3, #0
 8006f5c:	2b00      	cmp	r3, #0
 8006f5e:	d00d      	beq.n	8006f7c <HAL_DMA_IRQHandler+0x460>
      {
        /* Clear the direct mode error flag */
        regs_dma->IFCR = DMA_FLAG_DMEIF0_4 << (hdma->StreamIndex & 0x1FU);
 8006f60:	687b      	ldr	r3, [r7, #4]
 8006f62:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 8006f64:	f003 031f 	and.w	r3, r3, #31
 8006f68:	2204      	movs	r2, #4
 8006f6a:	409a      	lsls	r2, r3
 8006f6c:	6a3b      	ldr	r3, [r7, #32]
 8006f6e:	609a      	str	r2, [r3, #8]

        /* Update error code */
        hdma->ErrorCode |= HAL_DMA_ERROR_DME;
 8006f70:	687b      	ldr	r3, [r7, #4]
 8006f72:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 8006f74:	f043 0204 	orr.w	r2, r3, #4
 8006f78:	687b      	ldr	r3, [r7, #4]
 8006f7a:	655a      	str	r2, [r3, #84]	@ 0x54
      }
    }
    /* Half Transfer Complete Interrupt management ******************************/
    if ((tmpisr_dma & (DMA_FLAG_HTIF0_4 << (hdma->StreamIndex & 0x1FU))) != 0U)
 8006f7c:	687b      	ldr	r3, [r7, #4]
 8006f7e:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 8006f80:	f003 031f 	and.w	r3, r3, #31
 8006f84:	2210      	movs	r2, #16
 8006f86:	409a      	lsls	r2, r3
 8006f88:	69bb      	ldr	r3, [r7, #24]
 8006f8a:	4013      	ands	r3, r2
 8006f8c:	2b00      	cmp	r3, #0
 8006f8e:	f000 80a6 	beq.w	80070de <HAL_DMA_IRQHandler+0x5c2>
    {
      if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_HT) != 0U)
 8006f92:	687b      	ldr	r3, [r7, #4]
 8006f94:	681b      	ldr	r3, [r3, #0]
 8006f96:	4a85      	ldr	r2, [pc, #532]	@ (80071ac <HAL_DMA_IRQHandler+0x690>)
 8006f98:	4293      	cmp	r3, r2
 8006f9a:	d04a      	beq.n	8007032 <HAL_DMA_IRQHandler+0x516>
 8006f9c:	687b      	ldr	r3, [r7, #4]
 8006f9e:	681b      	ldr	r3, [r3, #0]
 8006fa0:	4a83      	ldr	r2, [pc, #524]	@ (80071b0 <HAL_DMA_IRQHandler+0x694>)
 8006fa2:	4293      	cmp	r3, r2
 8006fa4:	d045      	beq.n	8007032 <HAL_DMA_IRQHandler+0x516>
 8006fa6:	687b      	ldr	r3, [r7, #4]
 8006fa8:	681b      	ldr	r3, [r3, #0]
 8006faa:	4a82      	ldr	r2, [pc, #520]	@ (80071b4 <HAL_DMA_IRQHandler+0x698>)
 8006fac:	4293      	cmp	r3, r2
 8006fae:	d040      	beq.n	8007032 <HAL_DMA_IRQHandler+0x516>
 8006fb0:	687b      	ldr	r3, [r7, #4]
 8006fb2:	681b      	ldr	r3, [r3, #0]
 8006fb4:	4a80      	ldr	r2, [pc, #512]	@ (80071b8 <HAL_DMA_IRQHandler+0x69c>)
 8006fb6:	4293      	cmp	r3, r2
 8006fb8:	d03b      	beq.n	8007032 <HAL_DMA_IRQHandler+0x516>
 8006fba:	687b      	ldr	r3, [r7, #4]
 8006fbc:	681b      	ldr	r3, [r3, #0]
 8006fbe:	4a7f      	ldr	r2, [pc, #508]	@ (80071bc <HAL_DMA_IRQHandler+0x6a0>)
 8006fc0:	4293      	cmp	r3, r2
 8006fc2:	d036      	beq.n	8007032 <HAL_DMA_IRQHandler+0x516>
 8006fc4:	687b      	ldr	r3, [r7, #4]
 8006fc6:	681b      	ldr	r3, [r3, #0]
 8006fc8:	4a7d      	ldr	r2, [pc, #500]	@ (80071c0 <HAL_DMA_IRQHandler+0x6a4>)
 8006fca:	4293      	cmp	r3, r2
 8006fcc:	d031      	beq.n	8007032 <HAL_DMA_IRQHandler+0x516>
 8006fce:	687b      	ldr	r3, [r7, #4]
 8006fd0:	681b      	ldr	r3, [r3, #0]
 8006fd2:	4a7c      	ldr	r2, [pc, #496]	@ (80071c4 <HAL_DMA_IRQHandler+0x6a8>)
 8006fd4:	4293      	cmp	r3, r2
 8006fd6:	d02c      	beq.n	8007032 <HAL_DMA_IRQHandler+0x516>
 8006fd8:	687b      	ldr	r3, [r7, #4]
 8006fda:	681b      	ldr	r3, [r3, #0]
 8006fdc:	4a7a      	ldr	r2, [pc, #488]	@ (80071c8 <HAL_DMA_IRQHandler+0x6ac>)
 8006fde:	4293      	cmp	r3, r2
 8006fe0:	d027      	beq.n	8007032 <HAL_DMA_IRQHandler+0x516>
 8006fe2:	687b      	ldr	r3, [r7, #4]
 8006fe4:	681b      	ldr	r3, [r3, #0]
 8006fe6:	4a79      	ldr	r2, [pc, #484]	@ (80071cc <HAL_DMA_IRQHandler+0x6b0>)
 8006fe8:	4293      	cmp	r3, r2
 8006fea:	d022      	beq.n	8007032 <HAL_DMA_IRQHandler+0x516>
 8006fec:	687b      	ldr	r3, [r7, #4]
 8006fee:	681b      	ldr	r3, [r3, #0]
 8006ff0:	4a77      	ldr	r2, [pc, #476]	@ (80071d0 <HAL_DMA_IRQHandler+0x6b4>)
 8006ff2:	4293      	cmp	r3, r2
 8006ff4:	d01d      	beq.n	8007032 <HAL_DMA_IRQHandler+0x516>
 8006ff6:	687b      	ldr	r3, [r7, #4]
 8006ff8:	681b      	ldr	r3, [r3, #0]
 8006ffa:	4a76      	ldr	r2, [pc, #472]	@ (80071d4 <HAL_DMA_IRQHandler+0x6b8>)
 8006ffc:	4293      	cmp	r3, r2
 8006ffe:	d018      	beq.n	8007032 <HAL_DMA_IRQHandler+0x516>
 8007000:	687b      	ldr	r3, [r7, #4]
 8007002:	681b      	ldr	r3, [r3, #0]
 8007004:	4a74      	ldr	r2, [pc, #464]	@ (80071d8 <HAL_DMA_IRQHandler+0x6bc>)
 8007006:	4293      	cmp	r3, r2
 8007008:	d013      	beq.n	8007032 <HAL_DMA_IRQHandler+0x516>
 800700a:	687b      	ldr	r3, [r7, #4]
 800700c:	681b      	ldr	r3, [r3, #0]
 800700e:	4a73      	ldr	r2, [pc, #460]	@ (80071dc <HAL_DMA_IRQHandler+0x6c0>)
 8007010:	4293      	cmp	r3, r2
 8007012:	d00e      	beq.n	8007032 <HAL_DMA_IRQHandler+0x516>
 8007014:	687b      	ldr	r3, [r7, #4]
 8007016:	681b      	ldr	r3, [r3, #0]
 8007018:	4a71      	ldr	r2, [pc, #452]	@ (80071e0 <HAL_DMA_IRQHandler+0x6c4>)
 800701a:	4293      	cmp	r3, r2
 800701c:	d009      	beq.n	8007032 <HAL_DMA_IRQHandler+0x516>
 800701e:	687b      	ldr	r3, [r7, #4]
 8007020:	681b      	ldr	r3, [r3, #0]
 8007022:	4a70      	ldr	r2, [pc, #448]	@ (80071e4 <HAL_DMA_IRQHandler+0x6c8>)
 8007024:	4293      	cmp	r3, r2
 8007026:	d004      	beq.n	8007032 <HAL_DMA_IRQHandler+0x516>
 8007028:	687b      	ldr	r3, [r7, #4]
 800702a:	681b      	ldr	r3, [r3, #0]
 800702c:	4a6e      	ldr	r2, [pc, #440]	@ (80071e8 <HAL_DMA_IRQHandler+0x6cc>)
 800702e:	4293      	cmp	r3, r2
 8007030:	d10a      	bne.n	8007048 <HAL_DMA_IRQHandler+0x52c>
 8007032:	687b      	ldr	r3, [r7, #4]
 8007034:	681b      	ldr	r3, [r3, #0]
 8007036:	681b      	ldr	r3, [r3, #0]
 8007038:	f003 0308 	and.w	r3, r3, #8
 800703c:	2b00      	cmp	r3, #0
 800703e:	bf14      	ite	ne
 8007040:	2301      	movne	r3, #1
 8007042:	2300      	moveq	r3, #0
 8007044:	b2db      	uxtb	r3, r3
 8007046:	e009      	b.n	800705c <HAL_DMA_IRQHandler+0x540>
 8007048:	687b      	ldr	r3, [r7, #4]
 800704a:	681b      	ldr	r3, [r3, #0]
 800704c:	681b      	ldr	r3, [r3, #0]
 800704e:	f003 0304 	and.w	r3, r3, #4
 8007052:	2b00      	cmp	r3, #0
 8007054:	bf14      	ite	ne
 8007056:	2301      	movne	r3, #1
 8007058:	2300      	moveq	r3, #0
 800705a:	b2db      	uxtb	r3, r3
 800705c:	2b00      	cmp	r3, #0
 800705e:	d03e      	beq.n	80070de <HAL_DMA_IRQHandler+0x5c2>
      {
        /* Clear the half transfer complete flag */
        regs_dma->IFCR = DMA_FLAG_HTIF0_4 << (hdma->StreamIndex & 0x1FU);
 8007060:	687b      	ldr	r3, [r7, #4]
 8007062:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 8007064:	f003 031f 	and.w	r3, r3, #31
 8007068:	2210      	movs	r2, #16
 800706a:	409a      	lsls	r2, r3
 800706c:	6a3b      	ldr	r3, [r7, #32]
 800706e:	609a      	str	r2, [r3, #8]

        /* Multi_Buffering mode enabled */
        if(((((DMA_Stream_TypeDef   *)hdma->Instance)->CR) & (uint32_t)(DMA_SxCR_DBM)) != 0U)
 8007070:	687b      	ldr	r3, [r7, #4]
 8007072:	681b      	ldr	r3, [r3, #0]
 8007074:	681b      	ldr	r3, [r3, #0]
 8007076:	f403 2380 	and.w	r3, r3, #262144	@ 0x40000
 800707a:	2b00      	cmp	r3, #0
 800707c:	d018      	beq.n	80070b0 <HAL_DMA_IRQHandler+0x594>
        {
          /* Current memory buffer used is Memory 0 */
          if((((DMA_Stream_TypeDef   *)hdma->Instance)->CR & DMA_SxCR_CT) == 0U)
 800707e:	687b      	ldr	r3, [r7, #4]
 8007080:	681b      	ldr	r3, [r3, #0]
 8007082:	681b      	ldr	r3, [r3, #0]
 8007084:	f403 2300 	and.w	r3, r3, #524288	@ 0x80000
 8007088:	2b00      	cmp	r3, #0
 800708a:	d108      	bne.n	800709e <HAL_DMA_IRQHandler+0x582>
          {
            if(hdma->XferHalfCpltCallback != NULL)
 800708c:	687b      	ldr	r3, [r7, #4]
 800708e:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8007090:	2b00      	cmp	r3, #0
 8007092:	d024      	beq.n	80070de <HAL_DMA_IRQHandler+0x5c2>
            {
              /* Half transfer callback */
              hdma->XferHalfCpltCallback(hdma);
 8007094:	687b      	ldr	r3, [r7, #4]
 8007096:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8007098:	6878      	ldr	r0, [r7, #4]
 800709a:	4798      	blx	r3
 800709c:	e01f      	b.n	80070de <HAL_DMA_IRQHandler+0x5c2>
            }
          }
          /* Current memory buffer used is Memory 1 */
          else
          {
            if(hdma->XferM1HalfCpltCallback != NULL)
 800709e:	687b      	ldr	r3, [r7, #4]
 80070a0:	6c9b      	ldr	r3, [r3, #72]	@ 0x48
 80070a2:	2b00      	cmp	r3, #0
 80070a4:	d01b      	beq.n	80070de <HAL_DMA_IRQHandler+0x5c2>
            {
              /* Half transfer callback */
              hdma->XferM1HalfCpltCallback(hdma);
 80070a6:	687b      	ldr	r3, [r7, #4]
 80070a8:	6c9b      	ldr	r3, [r3, #72]	@ 0x48
 80070aa:	6878      	ldr	r0, [r7, #4]
 80070ac:	4798      	blx	r3
 80070ae:	e016      	b.n	80070de <HAL_DMA_IRQHandler+0x5c2>
          }
        }
        else
        {
          /* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */
          if((((DMA_Stream_TypeDef   *)hdma->Instance)->CR & DMA_SxCR_CIRC) == 0U)
 80070b0:	687b      	ldr	r3, [r7, #4]
 80070b2:	681b      	ldr	r3, [r3, #0]
 80070b4:	681b      	ldr	r3, [r3, #0]
 80070b6:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 80070ba:	2b00      	cmp	r3, #0
 80070bc:	d107      	bne.n	80070ce <HAL_DMA_IRQHandler+0x5b2>
          {
            /* Disable the half transfer interrupt */
            ((DMA_Stream_TypeDef   *)hdma->Instance)->CR  &= ~(DMA_IT_HT);
 80070be:	687b      	ldr	r3, [r7, #4]
 80070c0:	681b      	ldr	r3, [r3, #0]
 80070c2:	681a      	ldr	r2, [r3, #0]
 80070c4:	687b      	ldr	r3, [r7, #4]
 80070c6:	681b      	ldr	r3, [r3, #0]
 80070c8:	f022 0208 	bic.w	r2, r2, #8
 80070cc:	601a      	str	r2, [r3, #0]
          }

          if(hdma->XferHalfCpltCallback != NULL)
 80070ce:	687b      	ldr	r3, [r7, #4]
 80070d0:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 80070d2:	2b00      	cmp	r3, #0
 80070d4:	d003      	beq.n	80070de <HAL_DMA_IRQHandler+0x5c2>
          {
            /* Half transfer callback */
            hdma->XferHalfCpltCallback(hdma);
 80070d6:	687b      	ldr	r3, [r7, #4]
 80070d8:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 80070da:	6878      	ldr	r0, [r7, #4]
 80070dc:	4798      	blx	r3
          }
        }
      }
    }
    /* Transfer Complete Interrupt management ***********************************/
    if ((tmpisr_dma & (DMA_FLAG_TCIF0_4 << (hdma->StreamIndex & 0x1FU))) != 0U)
 80070de:	687b      	ldr	r3, [r7, #4]
 80070e0:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 80070e2:	f003 031f 	and.w	r3, r3, #31
 80070e6:	2220      	movs	r2, #32
 80070e8:	409a      	lsls	r2, r3
 80070ea:	69bb      	ldr	r3, [r7, #24]
 80070ec:	4013      	ands	r3, r2
 80070ee:	2b00      	cmp	r3, #0
 80070f0:	f000 8110 	beq.w	8007314 <HAL_DMA_IRQHandler+0x7f8>
    {
      if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_TC) != 0U)
 80070f4:	687b      	ldr	r3, [r7, #4]
 80070f6:	681b      	ldr	r3, [r3, #0]
 80070f8:	4a2c      	ldr	r2, [pc, #176]	@ (80071ac <HAL_DMA_IRQHandler+0x690>)
 80070fa:	4293      	cmp	r3, r2
 80070fc:	d04a      	beq.n	8007194 <HAL_DMA_IRQHandler+0x678>
 80070fe:	687b      	ldr	r3, [r7, #4]
 8007100:	681b      	ldr	r3, [r3, #0]
 8007102:	4a2b      	ldr	r2, [pc, #172]	@ (80071b0 <HAL_DMA_IRQHandler+0x694>)
 8007104:	4293      	cmp	r3, r2
 8007106:	d045      	beq.n	8007194 <HAL_DMA_IRQHandler+0x678>
 8007108:	687b      	ldr	r3, [r7, #4]
 800710a:	681b      	ldr	r3, [r3, #0]
 800710c:	4a29      	ldr	r2, [pc, #164]	@ (80071b4 <HAL_DMA_IRQHandler+0x698>)
 800710e:	4293      	cmp	r3, r2
 8007110:	d040      	beq.n	8007194 <HAL_DMA_IRQHandler+0x678>
 8007112:	687b      	ldr	r3, [r7, #4]
 8007114:	681b      	ldr	r3, [r3, #0]
 8007116:	4a28      	ldr	r2, [pc, #160]	@ (80071b8 <HAL_DMA_IRQHandler+0x69c>)
 8007118:	4293      	cmp	r3, r2
 800711a:	d03b      	beq.n	8007194 <HAL_DMA_IRQHandler+0x678>
 800711c:	687b      	ldr	r3, [r7, #4]
 800711e:	681b      	ldr	r3, [r3, #0]
 8007120:	4a26      	ldr	r2, [pc, #152]	@ (80071bc <HAL_DMA_IRQHandler+0x6a0>)
 8007122:	4293      	cmp	r3, r2
 8007124:	d036      	beq.n	8007194 <HAL_DMA_IRQHandler+0x678>
 8007126:	687b      	ldr	r3, [r7, #4]
 8007128:	681b      	ldr	r3, [r3, #0]
 800712a:	4a25      	ldr	r2, [pc, #148]	@ (80071c0 <HAL_DMA_IRQHandler+0x6a4>)
 800712c:	4293      	cmp	r3, r2
 800712e:	d031      	beq.n	8007194 <HAL_DMA_IRQHandler+0x678>
 8007130:	687b      	ldr	r3, [r7, #4]
 8007132:	681b      	ldr	r3, [r3, #0]
 8007134:	4a23      	ldr	r2, [pc, #140]	@ (80071c4 <HAL_DMA_IRQHandler+0x6a8>)
 8007136:	4293      	cmp	r3, r2
 8007138:	d02c      	beq.n	8007194 <HAL_DMA_IRQHandler+0x678>
 800713a:	687b      	ldr	r3, [r7, #4]
 800713c:	681b      	ldr	r3, [r3, #0]
 800713e:	4a22      	ldr	r2, [pc, #136]	@ (80071c8 <HAL_DMA_IRQHandler+0x6ac>)
 8007140:	4293      	cmp	r3, r2
 8007142:	d027      	beq.n	8007194 <HAL_DMA_IRQHandler+0x678>
 8007144:	687b      	ldr	r3, [r7, #4]
 8007146:	681b      	ldr	r3, [r3, #0]
 8007148:	4a20      	ldr	r2, [pc, #128]	@ (80071cc <HAL_DMA_IRQHandler+0x6b0>)
 800714a:	4293      	cmp	r3, r2
 800714c:	d022      	beq.n	8007194 <HAL_DMA_IRQHandler+0x678>
 800714e:	687b      	ldr	r3, [r7, #4]
 8007150:	681b      	ldr	r3, [r3, #0]
 8007152:	4a1f      	ldr	r2, [pc, #124]	@ (80071d0 <HAL_DMA_IRQHandler+0x6b4>)
 8007154:	4293      	cmp	r3, r2
 8007156:	d01d      	beq.n	8007194 <HAL_DMA_IRQHandler+0x678>
 8007158:	687b      	ldr	r3, [r7, #4]
 800715a:	681b      	ldr	r3, [r3, #0]
 800715c:	4a1d      	ldr	r2, [pc, #116]	@ (80071d4 <HAL_DMA_IRQHandler+0x6b8>)
 800715e:	4293      	cmp	r3, r2
 8007160:	d018      	beq.n	8007194 <HAL_DMA_IRQHandler+0x678>
 8007162:	687b      	ldr	r3, [r7, #4]
 8007164:	681b      	ldr	r3, [r3, #0]
 8007166:	4a1c      	ldr	r2, [pc, #112]	@ (80071d8 <HAL_DMA_IRQHandler+0x6bc>)
 8007168:	4293      	cmp	r3, r2
 800716a:	d013      	beq.n	8007194 <HAL_DMA_IRQHandler+0x678>
 800716c:	687b      	ldr	r3, [r7, #4]
 800716e:	681b      	ldr	r3, [r3, #0]
 8007170:	4a1a      	ldr	r2, [pc, #104]	@ (80071dc <HAL_DMA_IRQHandler+0x6c0>)
 8007172:	4293      	cmp	r3, r2
 8007174:	d00e      	beq.n	8007194 <HAL_DMA_IRQHandler+0x678>
 8007176:	687b      	ldr	r3, [r7, #4]
 8007178:	681b      	ldr	r3, [r3, #0]
 800717a:	4a19      	ldr	r2, [pc, #100]	@ (80071e0 <HAL_DMA_IRQHandler+0x6c4>)
 800717c:	4293      	cmp	r3, r2
 800717e:	d009      	beq.n	8007194 <HAL_DMA_IRQHandler+0x678>
 8007180:	687b      	ldr	r3, [r7, #4]
 8007182:	681b      	ldr	r3, [r3, #0]
 8007184:	4a17      	ldr	r2, [pc, #92]	@ (80071e4 <HAL_DMA_IRQHandler+0x6c8>)
 8007186:	4293      	cmp	r3, r2
 8007188:	d004      	beq.n	8007194 <HAL_DMA_IRQHandler+0x678>
 800718a:	687b      	ldr	r3, [r7, #4]
 800718c:	681b      	ldr	r3, [r3, #0]
 800718e:	4a16      	ldr	r2, [pc, #88]	@ (80071e8 <HAL_DMA_IRQHandler+0x6cc>)
 8007190:	4293      	cmp	r3, r2
 8007192:	d12b      	bne.n	80071ec <HAL_DMA_IRQHandler+0x6d0>
 8007194:	687b      	ldr	r3, [r7, #4]
 8007196:	681b      	ldr	r3, [r3, #0]
 8007198:	681b      	ldr	r3, [r3, #0]
 800719a:	f003 0310 	and.w	r3, r3, #16
 800719e:	2b00      	cmp	r3, #0
 80071a0:	bf14      	ite	ne
 80071a2:	2301      	movne	r3, #1
 80071a4:	2300      	moveq	r3, #0
 80071a6:	b2db      	uxtb	r3, r3
 80071a8:	e02a      	b.n	8007200 <HAL_DMA_IRQHandler+0x6e4>
 80071aa:	bf00      	nop
 80071ac:	40020010 	.word	0x40020010
 80071b0:	40020028 	.word	0x40020028
 80071b4:	40020040 	.word	0x40020040
 80071b8:	40020058 	.word	0x40020058
 80071bc:	40020070 	.word	0x40020070
 80071c0:	40020088 	.word	0x40020088
 80071c4:	400200a0 	.word	0x400200a0
 80071c8:	400200b8 	.word	0x400200b8
 80071cc:	40020410 	.word	0x40020410
 80071d0:	40020428 	.word	0x40020428
 80071d4:	40020440 	.word	0x40020440
 80071d8:	40020458 	.word	0x40020458
 80071dc:	40020470 	.word	0x40020470
 80071e0:	40020488 	.word	0x40020488
 80071e4:	400204a0 	.word	0x400204a0
 80071e8:	400204b8 	.word	0x400204b8
 80071ec:	687b      	ldr	r3, [r7, #4]
 80071ee:	681b      	ldr	r3, [r3, #0]
 80071f0:	681b      	ldr	r3, [r3, #0]
 80071f2:	f003 0302 	and.w	r3, r3, #2
 80071f6:	2b00      	cmp	r3, #0
 80071f8:	bf14      	ite	ne
 80071fa:	2301      	movne	r3, #1
 80071fc:	2300      	moveq	r3, #0
 80071fe:	b2db      	uxtb	r3, r3
 8007200:	2b00      	cmp	r3, #0
 8007202:	f000 8087 	beq.w	8007314 <HAL_DMA_IRQHandler+0x7f8>
      {
        /* Clear the transfer complete flag */
        regs_dma->IFCR = DMA_FLAG_TCIF0_4 << (hdma->StreamIndex & 0x1FU);
 8007206:	687b      	ldr	r3, [r7, #4]
 8007208:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 800720a:	f003 031f 	and.w	r3, r3, #31
 800720e:	2220      	movs	r2, #32
 8007210:	409a      	lsls	r2, r3
 8007212:	6a3b      	ldr	r3, [r7, #32]
 8007214:	609a      	str	r2, [r3, #8]

        if(HAL_DMA_STATE_ABORT == hdma->State)
 8007216:	687b      	ldr	r3, [r7, #4]
 8007218:	f893 3035 	ldrb.w	r3, [r3, #53]	@ 0x35
 800721c:	b2db      	uxtb	r3, r3
 800721e:	2b04      	cmp	r3, #4
 8007220:	d139      	bne.n	8007296 <HAL_DMA_IRQHandler+0x77a>
        {
          /* Disable all the transfer interrupts */
          ((DMA_Stream_TypeDef   *)hdma->Instance)->CR  &= ~(DMA_IT_TC | DMA_IT_TE | DMA_IT_DME);
 8007222:	687b      	ldr	r3, [r7, #4]
 8007224:	681b      	ldr	r3, [r3, #0]
 8007226:	681a      	ldr	r2, [r3, #0]
 8007228:	687b      	ldr	r3, [r7, #4]
 800722a:	681b      	ldr	r3, [r3, #0]
 800722c:	f022 0216 	bic.w	r2, r2, #22
 8007230:	601a      	str	r2, [r3, #0]
          ((DMA_Stream_TypeDef   *)hdma->Instance)->FCR &= ~(DMA_IT_FE);
 8007232:	687b      	ldr	r3, [r7, #4]
 8007234:	681b      	ldr	r3, [r3, #0]
 8007236:	695a      	ldr	r2, [r3, #20]
 8007238:	687b      	ldr	r3, [r7, #4]
 800723a:	681b      	ldr	r3, [r3, #0]
 800723c:	f022 0280 	bic.w	r2, r2, #128	@ 0x80
 8007240:	615a      	str	r2, [r3, #20]

          if((hdma->XferHalfCpltCallback != NULL) || (hdma->XferM1HalfCpltCallback != NULL))
 8007242:	687b      	ldr	r3, [r7, #4]
 8007244:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8007246:	2b00      	cmp	r3, #0
 8007248:	d103      	bne.n	8007252 <HAL_DMA_IRQHandler+0x736>
 800724a:	687b      	ldr	r3, [r7, #4]
 800724c:	6c9b      	ldr	r3, [r3, #72]	@ 0x48
 800724e:	2b00      	cmp	r3, #0
 8007250:	d007      	beq.n	8007262 <HAL_DMA_IRQHandler+0x746>
          {
            ((DMA_Stream_TypeDef   *)hdma->Instance)->CR  &= ~(DMA_IT_HT);
 8007252:	687b      	ldr	r3, [r7, #4]
 8007254:	681b      	ldr	r3, [r3, #0]
 8007256:	681a      	ldr	r2, [r3, #0]
 8007258:	687b      	ldr	r3, [r7, #4]
 800725a:	681b      	ldr	r3, [r3, #0]
 800725c:	f022 0208 	bic.w	r2, r2, #8
 8007260:	601a      	str	r2, [r3, #0]
          }

          /* Clear all interrupt flags at correct offset within the register */
          regs_dma->IFCR = 0x3FUL << (hdma->StreamIndex & 0x1FU);
 8007262:	687b      	ldr	r3, [r7, #4]
 8007264:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 8007266:	f003 031f 	and.w	r3, r3, #31
 800726a:	223f      	movs	r2, #63	@ 0x3f
 800726c:	409a      	lsls	r2, r3
 800726e:	6a3b      	ldr	r3, [r7, #32]
 8007270:	609a      	str	r2, [r3, #8]

          /* Change the DMA state */
          hdma->State = HAL_DMA_STATE_READY;
 8007272:	687b      	ldr	r3, [r7, #4]
 8007274:	2201      	movs	r2, #1
 8007276:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

          /* Process Unlocked */
          __HAL_UNLOCK(hdma);
 800727a:	687b      	ldr	r3, [r7, #4]
 800727c:	2200      	movs	r2, #0
 800727e:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34

          if(hdma->XferAbortCallback != NULL)
 8007282:	687b      	ldr	r3, [r7, #4]
 8007284:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 8007286:	2b00      	cmp	r3, #0
 8007288:	f000 834a 	beq.w	8007920 <HAL_DMA_IRQHandler+0xe04>
          {
            hdma->XferAbortCallback(hdma);
 800728c:	687b      	ldr	r3, [r7, #4]
 800728e:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 8007290:	6878      	ldr	r0, [r7, #4]
 8007292:	4798      	blx	r3
          }
          return;
 8007294:	e344      	b.n	8007920 <HAL_DMA_IRQHandler+0xe04>
        }

        if(((((DMA_Stream_TypeDef   *)hdma->Instance)->CR) & (uint32_t)(DMA_SxCR_DBM)) != 0U)
 8007296:	687b      	ldr	r3, [r7, #4]
 8007298:	681b      	ldr	r3, [r3, #0]
 800729a:	681b      	ldr	r3, [r3, #0]
 800729c:	f403 2380 	and.w	r3, r3, #262144	@ 0x40000
 80072a0:	2b00      	cmp	r3, #0
 80072a2:	d018      	beq.n	80072d6 <HAL_DMA_IRQHandler+0x7ba>
        {
          /* Current memory buffer used is Memory 0 */
          if((((DMA_Stream_TypeDef   *)hdma->Instance)->CR & DMA_SxCR_CT) == 0U)
 80072a4:	687b      	ldr	r3, [r7, #4]
 80072a6:	681b      	ldr	r3, [r3, #0]
 80072a8:	681b      	ldr	r3, [r3, #0]
 80072aa:	f403 2300 	and.w	r3, r3, #524288	@ 0x80000
 80072ae:	2b00      	cmp	r3, #0
 80072b0:	d108      	bne.n	80072c4 <HAL_DMA_IRQHandler+0x7a8>
          {
            if(hdma->XferM1CpltCallback != NULL)
 80072b2:	687b      	ldr	r3, [r7, #4]
 80072b4:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 80072b6:	2b00      	cmp	r3, #0
 80072b8:	d02c      	beq.n	8007314 <HAL_DMA_IRQHandler+0x7f8>
            {
              /* Transfer complete Callback for memory1 */
              hdma->XferM1CpltCallback(hdma);
 80072ba:	687b      	ldr	r3, [r7, #4]
 80072bc:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 80072be:	6878      	ldr	r0, [r7, #4]
 80072c0:	4798      	blx	r3
 80072c2:	e027      	b.n	8007314 <HAL_DMA_IRQHandler+0x7f8>
            }
          }
          /* Current memory buffer used is Memory 1 */
          else
          {
            if(hdma->XferCpltCallback != NULL)
 80072c4:	687b      	ldr	r3, [r7, #4]
 80072c6:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 80072c8:	2b00      	cmp	r3, #0
 80072ca:	d023      	beq.n	8007314 <HAL_DMA_IRQHandler+0x7f8>
            {
              /* Transfer complete Callback for memory0 */
              hdma->XferCpltCallback(hdma);
 80072cc:	687b      	ldr	r3, [r7, #4]
 80072ce:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 80072d0:	6878      	ldr	r0, [r7, #4]
 80072d2:	4798      	blx	r3
 80072d4:	e01e      	b.n	8007314 <HAL_DMA_IRQHandler+0x7f8>
          }
        }
        /* Disable the transfer complete interrupt if the DMA mode is not CIRCULAR */
        else
        {
          if((((DMA_Stream_TypeDef   *)hdma->Instance)->CR & DMA_SxCR_CIRC) == 0U)
 80072d6:	687b      	ldr	r3, [r7, #4]
 80072d8:	681b      	ldr	r3, [r3, #0]
 80072da:	681b      	ldr	r3, [r3, #0]
 80072dc:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 80072e0:	2b00      	cmp	r3, #0
 80072e2:	d10f      	bne.n	8007304 <HAL_DMA_IRQHandler+0x7e8>
          {
            /* Disable the transfer complete interrupt */
            ((DMA_Stream_TypeDef   *)hdma->Instance)->CR  &= ~(DMA_IT_TC);
 80072e4:	687b      	ldr	r3, [r7, #4]
 80072e6:	681b      	ldr	r3, [r3, #0]
 80072e8:	681a      	ldr	r2, [r3, #0]
 80072ea:	687b      	ldr	r3, [r7, #4]
 80072ec:	681b      	ldr	r3, [r3, #0]
 80072ee:	f022 0210 	bic.w	r2, r2, #16
 80072f2:	601a      	str	r2, [r3, #0]

            /* Change the DMA state */
            hdma->State = HAL_DMA_STATE_READY;
 80072f4:	687b      	ldr	r3, [r7, #4]
 80072f6:	2201      	movs	r2, #1
 80072f8:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

            /* Process Unlocked */
            __HAL_UNLOCK(hdma);
 80072fc:	687b      	ldr	r3, [r7, #4]
 80072fe:	2200      	movs	r2, #0
 8007300:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34
          }

          if(hdma->XferCpltCallback != NULL)
 8007304:	687b      	ldr	r3, [r7, #4]
 8007306:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 8007308:	2b00      	cmp	r3, #0
 800730a:	d003      	beq.n	8007314 <HAL_DMA_IRQHandler+0x7f8>
          {
            /* Transfer complete callback */
            hdma->XferCpltCallback(hdma);
 800730c:	687b      	ldr	r3, [r7, #4]
 800730e:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 8007310:	6878      	ldr	r0, [r7, #4]
 8007312:	4798      	blx	r3
        }
      }
    }

    /* manage error case */
    if(hdma->ErrorCode != HAL_DMA_ERROR_NONE)
 8007314:	687b      	ldr	r3, [r7, #4]
 8007316:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 8007318:	2b00      	cmp	r3, #0
 800731a:	f000 8306 	beq.w	800792a <HAL_DMA_IRQHandler+0xe0e>
    {
      if((hdma->ErrorCode & HAL_DMA_ERROR_TE) != 0U)
 800731e:	687b      	ldr	r3, [r7, #4]
 8007320:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 8007322:	f003 0301 	and.w	r3, r3, #1
 8007326:	2b00      	cmp	r3, #0
 8007328:	f000 8088 	beq.w	800743c <HAL_DMA_IRQHandler+0x920>
      {
        hdma->State = HAL_DMA_STATE_ABORT;
 800732c:	687b      	ldr	r3, [r7, #4]
 800732e:	2204      	movs	r2, #4
 8007330:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

        /* Disable the stream */
        __HAL_DMA_DISABLE(hdma);
 8007334:	687b      	ldr	r3, [r7, #4]
 8007336:	681b      	ldr	r3, [r3, #0]
 8007338:	4a7a      	ldr	r2, [pc, #488]	@ (8007524 <HAL_DMA_IRQHandler+0xa08>)
 800733a:	4293      	cmp	r3, r2
 800733c:	d04a      	beq.n	80073d4 <HAL_DMA_IRQHandler+0x8b8>
 800733e:	687b      	ldr	r3, [r7, #4]
 8007340:	681b      	ldr	r3, [r3, #0]
 8007342:	4a79      	ldr	r2, [pc, #484]	@ (8007528 <HAL_DMA_IRQHandler+0xa0c>)
 8007344:	4293      	cmp	r3, r2
 8007346:	d045      	beq.n	80073d4 <HAL_DMA_IRQHandler+0x8b8>
 8007348:	687b      	ldr	r3, [r7, #4]
 800734a:	681b      	ldr	r3, [r3, #0]
 800734c:	4a77      	ldr	r2, [pc, #476]	@ (800752c <HAL_DMA_IRQHandler+0xa10>)
 800734e:	4293      	cmp	r3, r2
 8007350:	d040      	beq.n	80073d4 <HAL_DMA_IRQHandler+0x8b8>
 8007352:	687b      	ldr	r3, [r7, #4]
 8007354:	681b      	ldr	r3, [r3, #0]
 8007356:	4a76      	ldr	r2, [pc, #472]	@ (8007530 <HAL_DMA_IRQHandler+0xa14>)
 8007358:	4293      	cmp	r3, r2
 800735a:	d03b      	beq.n	80073d4 <HAL_DMA_IRQHandler+0x8b8>
 800735c:	687b      	ldr	r3, [r7, #4]
 800735e:	681b      	ldr	r3, [r3, #0]
 8007360:	4a74      	ldr	r2, [pc, #464]	@ (8007534 <HAL_DMA_IRQHandler+0xa18>)
 8007362:	4293      	cmp	r3, r2
 8007364:	d036      	beq.n	80073d4 <HAL_DMA_IRQHandler+0x8b8>
 8007366:	687b      	ldr	r3, [r7, #4]
 8007368:	681b      	ldr	r3, [r3, #0]
 800736a:	4a73      	ldr	r2, [pc, #460]	@ (8007538 <HAL_DMA_IRQHandler+0xa1c>)
 800736c:	4293      	cmp	r3, r2
 800736e:	d031      	beq.n	80073d4 <HAL_DMA_IRQHandler+0x8b8>
 8007370:	687b      	ldr	r3, [r7, #4]
 8007372:	681b      	ldr	r3, [r3, #0]
 8007374:	4a71      	ldr	r2, [pc, #452]	@ (800753c <HAL_DMA_IRQHandler+0xa20>)
 8007376:	4293      	cmp	r3, r2
 8007378:	d02c      	beq.n	80073d4 <HAL_DMA_IRQHandler+0x8b8>
 800737a:	687b      	ldr	r3, [r7, #4]
 800737c:	681b      	ldr	r3, [r3, #0]
 800737e:	4a70      	ldr	r2, [pc, #448]	@ (8007540 <HAL_DMA_IRQHandler+0xa24>)
 8007380:	4293      	cmp	r3, r2
 8007382:	d027      	beq.n	80073d4 <HAL_DMA_IRQHandler+0x8b8>
 8007384:	687b      	ldr	r3, [r7, #4]
 8007386:	681b      	ldr	r3, [r3, #0]
 8007388:	4a6e      	ldr	r2, [pc, #440]	@ (8007544 <HAL_DMA_IRQHandler+0xa28>)
 800738a:	4293      	cmp	r3, r2
 800738c:	d022      	beq.n	80073d4 <HAL_DMA_IRQHandler+0x8b8>
 800738e:	687b      	ldr	r3, [r7, #4]
 8007390:	681b      	ldr	r3, [r3, #0]
 8007392:	4a6d      	ldr	r2, [pc, #436]	@ (8007548 <HAL_DMA_IRQHandler+0xa2c>)
 8007394:	4293      	cmp	r3, r2
 8007396:	d01d      	beq.n	80073d4 <HAL_DMA_IRQHandler+0x8b8>
 8007398:	687b      	ldr	r3, [r7, #4]
 800739a:	681b      	ldr	r3, [r3, #0]
 800739c:	4a6b      	ldr	r2, [pc, #428]	@ (800754c <HAL_DMA_IRQHandler+0xa30>)
 800739e:	4293      	cmp	r3, r2
 80073a0:	d018      	beq.n	80073d4 <HAL_DMA_IRQHandler+0x8b8>
 80073a2:	687b      	ldr	r3, [r7, #4]
 80073a4:	681b      	ldr	r3, [r3, #0]
 80073a6:	4a6a      	ldr	r2, [pc, #424]	@ (8007550 <HAL_DMA_IRQHandler+0xa34>)
 80073a8:	4293      	cmp	r3, r2
 80073aa:	d013      	beq.n	80073d4 <HAL_DMA_IRQHandler+0x8b8>
 80073ac:	687b      	ldr	r3, [r7, #4]
 80073ae:	681b      	ldr	r3, [r3, #0]
 80073b0:	4a68      	ldr	r2, [pc, #416]	@ (8007554 <HAL_DMA_IRQHandler+0xa38>)
 80073b2:	4293      	cmp	r3, r2
 80073b4:	d00e      	beq.n	80073d4 <HAL_DMA_IRQHandler+0x8b8>
 80073b6:	687b      	ldr	r3, [r7, #4]
 80073b8:	681b      	ldr	r3, [r3, #0]
 80073ba:	4a67      	ldr	r2, [pc, #412]	@ (8007558 <HAL_DMA_IRQHandler+0xa3c>)
 80073bc:	4293      	cmp	r3, r2
 80073be:	d009      	beq.n	80073d4 <HAL_DMA_IRQHandler+0x8b8>
 80073c0:	687b      	ldr	r3, [r7, #4]
 80073c2:	681b      	ldr	r3, [r3, #0]
 80073c4:	4a65      	ldr	r2, [pc, #404]	@ (800755c <HAL_DMA_IRQHandler+0xa40>)
 80073c6:	4293      	cmp	r3, r2
 80073c8:	d004      	beq.n	80073d4 <HAL_DMA_IRQHandler+0x8b8>
 80073ca:	687b      	ldr	r3, [r7, #4]
 80073cc:	681b      	ldr	r3, [r3, #0]
 80073ce:	4a64      	ldr	r2, [pc, #400]	@ (8007560 <HAL_DMA_IRQHandler+0xa44>)
 80073d0:	4293      	cmp	r3, r2
 80073d2:	d108      	bne.n	80073e6 <HAL_DMA_IRQHandler+0x8ca>
 80073d4:	687b      	ldr	r3, [r7, #4]
 80073d6:	681b      	ldr	r3, [r3, #0]
 80073d8:	681a      	ldr	r2, [r3, #0]
 80073da:	687b      	ldr	r3, [r7, #4]
 80073dc:	681b      	ldr	r3, [r3, #0]
 80073de:	f022 0201 	bic.w	r2, r2, #1
 80073e2:	601a      	str	r2, [r3, #0]
 80073e4:	e007      	b.n	80073f6 <HAL_DMA_IRQHandler+0x8da>
 80073e6:	687b      	ldr	r3, [r7, #4]
 80073e8:	681b      	ldr	r3, [r3, #0]
 80073ea:	681a      	ldr	r2, [r3, #0]
 80073ec:	687b      	ldr	r3, [r7, #4]
 80073ee:	681b      	ldr	r3, [r3, #0]
 80073f0:	f022 0201 	bic.w	r2, r2, #1
 80073f4:	601a      	str	r2, [r3, #0]

        do
        {
          if (++count > timeout)
 80073f6:	68fb      	ldr	r3, [r7, #12]
 80073f8:	3301      	adds	r3, #1
 80073fa:	60fb      	str	r3, [r7, #12]
 80073fc:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 80073fe:	429a      	cmp	r2, r3
 8007400:	d307      	bcc.n	8007412 <HAL_DMA_IRQHandler+0x8f6>
          {
            break;
          }
        }
        while((((DMA_Stream_TypeDef   *)hdma->Instance)->CR & DMA_SxCR_EN) != 0U);
 8007402:	687b      	ldr	r3, [r7, #4]
 8007404:	681b      	ldr	r3, [r3, #0]
 8007406:	681b      	ldr	r3, [r3, #0]
 8007408:	f003 0301 	and.w	r3, r3, #1
 800740c:	2b00      	cmp	r3, #0
 800740e:	d1f2      	bne.n	80073f6 <HAL_DMA_IRQHandler+0x8da>
 8007410:	e000      	b.n	8007414 <HAL_DMA_IRQHandler+0x8f8>
            break;
 8007412:	bf00      	nop

        if((((DMA_Stream_TypeDef   *)hdma->Instance)->CR & DMA_SxCR_EN) != 0U)
 8007414:	687b      	ldr	r3, [r7, #4]
 8007416:	681b      	ldr	r3, [r3, #0]
 8007418:	681b      	ldr	r3, [r3, #0]
 800741a:	f003 0301 	and.w	r3, r3, #1
 800741e:	2b00      	cmp	r3, #0
 8007420:	d004      	beq.n	800742c <HAL_DMA_IRQHandler+0x910>
        {
          /* Change the DMA state to error if DMA disable fails */
          hdma->State = HAL_DMA_STATE_ERROR;
 8007422:	687b      	ldr	r3, [r7, #4]
 8007424:	2203      	movs	r2, #3
 8007426:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35
 800742a:	e003      	b.n	8007434 <HAL_DMA_IRQHandler+0x918>
        }
        else
        {
          /* Change the DMA state to Ready if DMA disable success */
          hdma->State = HAL_DMA_STATE_READY;
 800742c:	687b      	ldr	r3, [r7, #4]
 800742e:	2201      	movs	r2, #1
 8007430:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35
        }

        /* Process Unlocked */
        __HAL_UNLOCK(hdma);
 8007434:	687b      	ldr	r3, [r7, #4]
 8007436:	2200      	movs	r2, #0
 8007438:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34
      }

      if(hdma->XferErrorCallback != NULL)
 800743c:	687b      	ldr	r3, [r7, #4]
 800743e:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 8007440:	2b00      	cmp	r3, #0
 8007442:	f000 8272 	beq.w	800792a <HAL_DMA_IRQHandler+0xe0e>
      {
        /* Transfer error callback */
        hdma->XferErrorCallback(hdma);
 8007446:	687b      	ldr	r3, [r7, #4]
 8007448:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 800744a:	6878      	ldr	r0, [r7, #4]
 800744c:	4798      	blx	r3
 800744e:	e26c      	b.n	800792a <HAL_DMA_IRQHandler+0xe0e>
      }
    }
  }
  else if(IS_BDMA_CHANNEL_INSTANCE(hdma->Instance) != 0U)  /* BDMA instance(s) */
 8007450:	687b      	ldr	r3, [r7, #4]
 8007452:	681b      	ldr	r3, [r3, #0]
 8007454:	4a43      	ldr	r2, [pc, #268]	@ (8007564 <HAL_DMA_IRQHandler+0xa48>)
 8007456:	4293      	cmp	r3, r2
 8007458:	d022      	beq.n	80074a0 <HAL_DMA_IRQHandler+0x984>
 800745a:	687b      	ldr	r3, [r7, #4]
 800745c:	681b      	ldr	r3, [r3, #0]
 800745e:	4a42      	ldr	r2, [pc, #264]	@ (8007568 <HAL_DMA_IRQHandler+0xa4c>)
 8007460:	4293      	cmp	r3, r2
 8007462:	d01d      	beq.n	80074a0 <HAL_DMA_IRQHandler+0x984>
 8007464:	687b      	ldr	r3, [r7, #4]
 8007466:	681b      	ldr	r3, [r3, #0]
 8007468:	4a40      	ldr	r2, [pc, #256]	@ (800756c <HAL_DMA_IRQHandler+0xa50>)
 800746a:	4293      	cmp	r3, r2
 800746c:	d018      	beq.n	80074a0 <HAL_DMA_IRQHandler+0x984>
 800746e:	687b      	ldr	r3, [r7, #4]
 8007470:	681b      	ldr	r3, [r3, #0]
 8007472:	4a3f      	ldr	r2, [pc, #252]	@ (8007570 <HAL_DMA_IRQHandler+0xa54>)
 8007474:	4293      	cmp	r3, r2
 8007476:	d013      	beq.n	80074a0 <HAL_DMA_IRQHandler+0x984>
 8007478:	687b      	ldr	r3, [r7, #4]
 800747a:	681b      	ldr	r3, [r3, #0]
 800747c:	4a3d      	ldr	r2, [pc, #244]	@ (8007574 <HAL_DMA_IRQHandler+0xa58>)
 800747e:	4293      	cmp	r3, r2
 8007480:	d00e      	beq.n	80074a0 <HAL_DMA_IRQHandler+0x984>
 8007482:	687b      	ldr	r3, [r7, #4]
 8007484:	681b      	ldr	r3, [r3, #0]
 8007486:	4a3c      	ldr	r2, [pc, #240]	@ (8007578 <HAL_DMA_IRQHandler+0xa5c>)
 8007488:	4293      	cmp	r3, r2
 800748a:	d009      	beq.n	80074a0 <HAL_DMA_IRQHandler+0x984>
 800748c:	687b      	ldr	r3, [r7, #4]
 800748e:	681b      	ldr	r3, [r3, #0]
 8007490:	4a3a      	ldr	r2, [pc, #232]	@ (800757c <HAL_DMA_IRQHandler+0xa60>)
 8007492:	4293      	cmp	r3, r2
 8007494:	d004      	beq.n	80074a0 <HAL_DMA_IRQHandler+0x984>
 8007496:	687b      	ldr	r3, [r7, #4]
 8007498:	681b      	ldr	r3, [r3, #0]
 800749a:	4a39      	ldr	r2, [pc, #228]	@ (8007580 <HAL_DMA_IRQHandler+0xa64>)
 800749c:	4293      	cmp	r3, r2
 800749e:	d101      	bne.n	80074a4 <HAL_DMA_IRQHandler+0x988>
 80074a0:	2301      	movs	r3, #1
 80074a2:	e000      	b.n	80074a6 <HAL_DMA_IRQHandler+0x98a>
 80074a4:	2300      	movs	r3, #0
 80074a6:	2b00      	cmp	r3, #0
 80074a8:	f000 823f 	beq.w	800792a <HAL_DMA_IRQHandler+0xe0e>
  {
    ccr_reg = (((BDMA_Channel_TypeDef   *)hdma->Instance)->CCR);
 80074ac:	687b      	ldr	r3, [r7, #4]
 80074ae:	681b      	ldr	r3, [r3, #0]
 80074b0:	681b      	ldr	r3, [r3, #0]
 80074b2:	613b      	str	r3, [r7, #16]

    /* Half Transfer Complete Interrupt management ******************************/
    if (((tmpisr_bdma & (BDMA_FLAG_HT0 << (hdma->StreamIndex & 0x1FU))) != 0U) && ((ccr_reg & BDMA_CCR_HTIE) != 0U))
 80074b4:	687b      	ldr	r3, [r7, #4]
 80074b6:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 80074b8:	f003 031f 	and.w	r3, r3, #31
 80074bc:	2204      	movs	r2, #4
 80074be:	409a      	lsls	r2, r3
 80074c0:	697b      	ldr	r3, [r7, #20]
 80074c2:	4013      	ands	r3, r2
 80074c4:	2b00      	cmp	r3, #0
 80074c6:	f000 80cd 	beq.w	8007664 <HAL_DMA_IRQHandler+0xb48>
 80074ca:	693b      	ldr	r3, [r7, #16]
 80074cc:	f003 0304 	and.w	r3, r3, #4
 80074d0:	2b00      	cmp	r3, #0
 80074d2:	f000 80c7 	beq.w	8007664 <HAL_DMA_IRQHandler+0xb48>
    {
      /* Clear the half transfer complete flag */
      regs_bdma->IFCR = (BDMA_ISR_HTIF0 << (hdma->StreamIndex & 0x1FU));
 80074d6:	687b      	ldr	r3, [r7, #4]
 80074d8:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 80074da:	f003 031f 	and.w	r3, r3, #31
 80074de:	2204      	movs	r2, #4
 80074e0:	409a      	lsls	r2, r3
 80074e2:	69fb      	ldr	r3, [r7, #28]
 80074e4:	605a      	str	r2, [r3, #4]

      /* Disable the transfer complete interrupt if the DMA mode is Double Buffering */
      if((ccr_reg & BDMA_CCR_DBM) != 0U)
 80074e6:	693b      	ldr	r3, [r7, #16]
 80074e8:	f403 4300 	and.w	r3, r3, #32768	@ 0x8000
 80074ec:	2b00      	cmp	r3, #0
 80074ee:	d049      	beq.n	8007584 <HAL_DMA_IRQHandler+0xa68>
      {
        /* Current memory buffer used is Memory 0 */
        if((ccr_reg & BDMA_CCR_CT) == 0U)
 80074f0:	693b      	ldr	r3, [r7, #16]
 80074f2:	f403 3380 	and.w	r3, r3, #65536	@ 0x10000
 80074f6:	2b00      	cmp	r3, #0
 80074f8:	d109      	bne.n	800750e <HAL_DMA_IRQHandler+0x9f2>
        {
          if(hdma->XferM1HalfCpltCallback != NULL)
 80074fa:	687b      	ldr	r3, [r7, #4]
 80074fc:	6c9b      	ldr	r3, [r3, #72]	@ 0x48
 80074fe:	2b00      	cmp	r3, #0
 8007500:	f000 8210 	beq.w	8007924 <HAL_DMA_IRQHandler+0xe08>
          {
            /* Half transfer Callback for Memory 1 */
            hdma->XferM1HalfCpltCallback(hdma);
 8007504:	687b      	ldr	r3, [r7, #4]
 8007506:	6c9b      	ldr	r3, [r3, #72]	@ 0x48
 8007508:	6878      	ldr	r0, [r7, #4]
 800750a:	4798      	blx	r3
      if((ccr_reg & BDMA_CCR_DBM) != 0U)
 800750c:	e20a      	b.n	8007924 <HAL_DMA_IRQHandler+0xe08>
          }
        }
        /* Current memory buffer used is Memory 1 */
        else
        {
          if(hdma->XferHalfCpltCallback != NULL)
 800750e:	687b      	ldr	r3, [r7, #4]
 8007510:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8007512:	2b00      	cmp	r3, #0
 8007514:	f000 8206 	beq.w	8007924 <HAL_DMA_IRQHandler+0xe08>
          {
            /* Half transfer Callback for Memory 0 */
            hdma->XferHalfCpltCallback(hdma);
 8007518:	687b      	ldr	r3, [r7, #4]
 800751a:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 800751c:	6878      	ldr	r0, [r7, #4]
 800751e:	4798      	blx	r3
      if((ccr_reg & BDMA_CCR_DBM) != 0U)
 8007520:	e200      	b.n	8007924 <HAL_DMA_IRQHandler+0xe08>
 8007522:	bf00      	nop
 8007524:	40020010 	.word	0x40020010
 8007528:	40020028 	.word	0x40020028
 800752c:	40020040 	.word	0x40020040
 8007530:	40020058 	.word	0x40020058
 8007534:	40020070 	.word	0x40020070
 8007538:	40020088 	.word	0x40020088
 800753c:	400200a0 	.word	0x400200a0
 8007540:	400200b8 	.word	0x400200b8
 8007544:	40020410 	.word	0x40020410
 8007548:	40020428 	.word	0x40020428
 800754c:	40020440 	.word	0x40020440
 8007550:	40020458 	.word	0x40020458
 8007554:	40020470 	.word	0x40020470
 8007558:	40020488 	.word	0x40020488
 800755c:	400204a0 	.word	0x400204a0
 8007560:	400204b8 	.word	0x400204b8
 8007564:	58025408 	.word	0x58025408
 8007568:	5802541c 	.word	0x5802541c
 800756c:	58025430 	.word	0x58025430
 8007570:	58025444 	.word	0x58025444
 8007574:	58025458 	.word	0x58025458
 8007578:	5802546c 	.word	0x5802546c
 800757c:	58025480 	.word	0x58025480
 8007580:	58025494 	.word	0x58025494
          }
        }
      }
      else
      {
        if((ccr_reg & BDMA_CCR_CIRC) == 0U)
 8007584:	693b      	ldr	r3, [r7, #16]
 8007586:	f003 0320 	and.w	r3, r3, #32
 800758a:	2b00      	cmp	r3, #0
 800758c:	d160      	bne.n	8007650 <HAL_DMA_IRQHandler+0xb34>
        {
          /* Disable the half transfer interrupt */
          __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);
 800758e:	687b      	ldr	r3, [r7, #4]
 8007590:	681b      	ldr	r3, [r3, #0]
 8007592:	4a7f      	ldr	r2, [pc, #508]	@ (8007790 <HAL_DMA_IRQHandler+0xc74>)
 8007594:	4293      	cmp	r3, r2
 8007596:	d04a      	beq.n	800762e <HAL_DMA_IRQHandler+0xb12>
 8007598:	687b      	ldr	r3, [r7, #4]
 800759a:	681b      	ldr	r3, [r3, #0]
 800759c:	4a7d      	ldr	r2, [pc, #500]	@ (8007794 <HAL_DMA_IRQHandler+0xc78>)
 800759e:	4293      	cmp	r3, r2
 80075a0:	d045      	beq.n	800762e <HAL_DMA_IRQHandler+0xb12>
 80075a2:	687b      	ldr	r3, [r7, #4]
 80075a4:	681b      	ldr	r3, [r3, #0]
 80075a6:	4a7c      	ldr	r2, [pc, #496]	@ (8007798 <HAL_DMA_IRQHandler+0xc7c>)
 80075a8:	4293      	cmp	r3, r2
 80075aa:	d040      	beq.n	800762e <HAL_DMA_IRQHandler+0xb12>
 80075ac:	687b      	ldr	r3, [r7, #4]
 80075ae:	681b      	ldr	r3, [r3, #0]
 80075b0:	4a7a      	ldr	r2, [pc, #488]	@ (800779c <HAL_DMA_IRQHandler+0xc80>)
 80075b2:	4293      	cmp	r3, r2
 80075b4:	d03b      	beq.n	800762e <HAL_DMA_IRQHandler+0xb12>
 80075b6:	687b      	ldr	r3, [r7, #4]
 80075b8:	681b      	ldr	r3, [r3, #0]
 80075ba:	4a79      	ldr	r2, [pc, #484]	@ (80077a0 <HAL_DMA_IRQHandler+0xc84>)
 80075bc:	4293      	cmp	r3, r2
 80075be:	d036      	beq.n	800762e <HAL_DMA_IRQHandler+0xb12>
 80075c0:	687b      	ldr	r3, [r7, #4]
 80075c2:	681b      	ldr	r3, [r3, #0]
 80075c4:	4a77      	ldr	r2, [pc, #476]	@ (80077a4 <HAL_DMA_IRQHandler+0xc88>)
 80075c6:	4293      	cmp	r3, r2
 80075c8:	d031      	beq.n	800762e <HAL_DMA_IRQHandler+0xb12>
 80075ca:	687b      	ldr	r3, [r7, #4]
 80075cc:	681b      	ldr	r3, [r3, #0]
 80075ce:	4a76      	ldr	r2, [pc, #472]	@ (80077a8 <HAL_DMA_IRQHandler+0xc8c>)
 80075d0:	4293      	cmp	r3, r2
 80075d2:	d02c      	beq.n	800762e <HAL_DMA_IRQHandler+0xb12>
 80075d4:	687b      	ldr	r3, [r7, #4]
 80075d6:	681b      	ldr	r3, [r3, #0]
 80075d8:	4a74      	ldr	r2, [pc, #464]	@ (80077ac <HAL_DMA_IRQHandler+0xc90>)
 80075da:	4293      	cmp	r3, r2
 80075dc:	d027      	beq.n	800762e <HAL_DMA_IRQHandler+0xb12>
 80075de:	687b      	ldr	r3, [r7, #4]
 80075e0:	681b      	ldr	r3, [r3, #0]
 80075e2:	4a73      	ldr	r2, [pc, #460]	@ (80077b0 <HAL_DMA_IRQHandler+0xc94>)
 80075e4:	4293      	cmp	r3, r2
 80075e6:	d022      	beq.n	800762e <HAL_DMA_IRQHandler+0xb12>
 80075e8:	687b      	ldr	r3, [r7, #4]
 80075ea:	681b      	ldr	r3, [r3, #0]
 80075ec:	4a71      	ldr	r2, [pc, #452]	@ (80077b4 <HAL_DMA_IRQHandler+0xc98>)
 80075ee:	4293      	cmp	r3, r2
 80075f0:	d01d      	beq.n	800762e <HAL_DMA_IRQHandler+0xb12>
 80075f2:	687b      	ldr	r3, [r7, #4]
 80075f4:	681b      	ldr	r3, [r3, #0]
 80075f6:	4a70      	ldr	r2, [pc, #448]	@ (80077b8 <HAL_DMA_IRQHandler+0xc9c>)
 80075f8:	4293      	cmp	r3, r2
 80075fa:	d018      	beq.n	800762e <HAL_DMA_IRQHandler+0xb12>
 80075fc:	687b      	ldr	r3, [r7, #4]
 80075fe:	681b      	ldr	r3, [r3, #0]
 8007600:	4a6e      	ldr	r2, [pc, #440]	@ (80077bc <HAL_DMA_IRQHandler+0xca0>)
 8007602:	4293      	cmp	r3, r2
 8007604:	d013      	beq.n	800762e <HAL_DMA_IRQHandler+0xb12>
 8007606:	687b      	ldr	r3, [r7, #4]
 8007608:	681b      	ldr	r3, [r3, #0]
 800760a:	4a6d      	ldr	r2, [pc, #436]	@ (80077c0 <HAL_DMA_IRQHandler+0xca4>)
 800760c:	4293      	cmp	r3, r2
 800760e:	d00e      	beq.n	800762e <HAL_DMA_IRQHandler+0xb12>
 8007610:	687b      	ldr	r3, [r7, #4]
 8007612:	681b      	ldr	r3, [r3, #0]
 8007614:	4a6b      	ldr	r2, [pc, #428]	@ (80077c4 <HAL_DMA_IRQHandler+0xca8>)
 8007616:	4293      	cmp	r3, r2
 8007618:	d009      	beq.n	800762e <HAL_DMA_IRQHandler+0xb12>
 800761a:	687b      	ldr	r3, [r7, #4]
 800761c:	681b      	ldr	r3, [r3, #0]
 800761e:	4a6a      	ldr	r2, [pc, #424]	@ (80077c8 <HAL_DMA_IRQHandler+0xcac>)
 8007620:	4293      	cmp	r3, r2
 8007622:	d004      	beq.n	800762e <HAL_DMA_IRQHandler+0xb12>
 8007624:	687b      	ldr	r3, [r7, #4]
 8007626:	681b      	ldr	r3, [r3, #0]
 8007628:	4a68      	ldr	r2, [pc, #416]	@ (80077cc <HAL_DMA_IRQHandler+0xcb0>)
 800762a:	4293      	cmp	r3, r2
 800762c:	d108      	bne.n	8007640 <HAL_DMA_IRQHandler+0xb24>
 800762e:	687b      	ldr	r3, [r7, #4]
 8007630:	681b      	ldr	r3, [r3, #0]
 8007632:	681a      	ldr	r2, [r3, #0]
 8007634:	687b      	ldr	r3, [r7, #4]
 8007636:	681b      	ldr	r3, [r3, #0]
 8007638:	f022 0208 	bic.w	r2, r2, #8
 800763c:	601a      	str	r2, [r3, #0]
 800763e:	e007      	b.n	8007650 <HAL_DMA_IRQHandler+0xb34>
 8007640:	687b      	ldr	r3, [r7, #4]
 8007642:	681b      	ldr	r3, [r3, #0]
 8007644:	681a      	ldr	r2, [r3, #0]
 8007646:	687b      	ldr	r3, [r7, #4]
 8007648:	681b      	ldr	r3, [r3, #0]
 800764a:	f022 0204 	bic.w	r2, r2, #4
 800764e:	601a      	str	r2, [r3, #0]
        }

        /* DMA peripheral state is not updated in Half Transfer */
        /* but in Transfer Complete case */

       if(hdma->XferHalfCpltCallback != NULL)
 8007650:	687b      	ldr	r3, [r7, #4]
 8007652:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8007654:	2b00      	cmp	r3, #0
 8007656:	f000 8165 	beq.w	8007924 <HAL_DMA_IRQHandler+0xe08>
        {
          /* Half transfer callback */
          hdma->XferHalfCpltCallback(hdma);
 800765a:	687b      	ldr	r3, [r7, #4]
 800765c:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 800765e:	6878      	ldr	r0, [r7, #4]
 8007660:	4798      	blx	r3
      if((ccr_reg & BDMA_CCR_DBM) != 0U)
 8007662:	e15f      	b.n	8007924 <HAL_DMA_IRQHandler+0xe08>
        }
      }
    }

    /* Transfer Complete Interrupt management ***********************************/
    else if (((tmpisr_bdma & (BDMA_FLAG_TC0 << (hdma->StreamIndex & 0x1FU))) != 0U) && ((ccr_reg & BDMA_CCR_TCIE) != 0U))
 8007664:	687b      	ldr	r3, [r7, #4]
 8007666:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 8007668:	f003 031f 	and.w	r3, r3, #31
 800766c:	2202      	movs	r2, #2
 800766e:	409a      	lsls	r2, r3
 8007670:	697b      	ldr	r3, [r7, #20]
 8007672:	4013      	ands	r3, r2
 8007674:	2b00      	cmp	r3, #0
 8007676:	f000 80c5 	beq.w	8007804 <HAL_DMA_IRQHandler+0xce8>
 800767a:	693b      	ldr	r3, [r7, #16]
 800767c:	f003 0302 	and.w	r3, r3, #2
 8007680:	2b00      	cmp	r3, #0
 8007682:	f000 80bf 	beq.w	8007804 <HAL_DMA_IRQHandler+0xce8>
    {
      /* Clear the transfer complete flag */
      regs_bdma->IFCR = (BDMA_ISR_TCIF0) << (hdma->StreamIndex & 0x1FU);
 8007686:	687b      	ldr	r3, [r7, #4]
 8007688:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 800768a:	f003 031f 	and.w	r3, r3, #31
 800768e:	2202      	movs	r2, #2
 8007690:	409a      	lsls	r2, r3
 8007692:	69fb      	ldr	r3, [r7, #28]
 8007694:	605a      	str	r2, [r3, #4]

      /* Disable the transfer complete interrupt if the DMA mode is Double Buffering */
      if((ccr_reg & BDMA_CCR_DBM) != 0U)
 8007696:	693b      	ldr	r3, [r7, #16]
 8007698:	f403 4300 	and.w	r3, r3, #32768	@ 0x8000
 800769c:	2b00      	cmp	r3, #0
 800769e:	d018      	beq.n	80076d2 <HAL_DMA_IRQHandler+0xbb6>
      {
        /* Current memory buffer used is Memory 0 */
        if((ccr_reg & BDMA_CCR_CT) == 0U)
 80076a0:	693b      	ldr	r3, [r7, #16]
 80076a2:	f403 3380 	and.w	r3, r3, #65536	@ 0x10000
 80076a6:	2b00      	cmp	r3, #0
 80076a8:	d109      	bne.n	80076be <HAL_DMA_IRQHandler+0xba2>
        {
          if(hdma->XferM1CpltCallback != NULL)
 80076aa:	687b      	ldr	r3, [r7, #4]
 80076ac:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 80076ae:	2b00      	cmp	r3, #0
 80076b0:	f000 813a 	beq.w	8007928 <HAL_DMA_IRQHandler+0xe0c>
          {
            /* Transfer complete Callback for Memory 1 */
            hdma->XferM1CpltCallback(hdma);
 80076b4:	687b      	ldr	r3, [r7, #4]
 80076b6:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 80076b8:	6878      	ldr	r0, [r7, #4]
 80076ba:	4798      	blx	r3
      if((ccr_reg & BDMA_CCR_DBM) != 0U)
 80076bc:	e134      	b.n	8007928 <HAL_DMA_IRQHandler+0xe0c>
          }
        }
        /* Current memory buffer used is Memory 1 */
        else
        {
          if(hdma->XferCpltCallback != NULL)
 80076be:	687b      	ldr	r3, [r7, #4]
 80076c0:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 80076c2:	2b00      	cmp	r3, #0
 80076c4:	f000 8130 	beq.w	8007928 <HAL_DMA_IRQHandler+0xe0c>
          {
            /* Transfer complete Callback for Memory 0 */
            hdma->XferCpltCallback(hdma);
 80076c8:	687b      	ldr	r3, [r7, #4]
 80076ca:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 80076cc:	6878      	ldr	r0, [r7, #4]
 80076ce:	4798      	blx	r3
      if((ccr_reg & BDMA_CCR_DBM) != 0U)
 80076d0:	e12a      	b.n	8007928 <HAL_DMA_IRQHandler+0xe0c>
          }
        }
      }
      else
      {
        if((ccr_reg & BDMA_CCR_CIRC) == 0U)
 80076d2:	693b      	ldr	r3, [r7, #16]
 80076d4:	f003 0320 	and.w	r3, r3, #32
 80076d8:	2b00      	cmp	r3, #0
 80076da:	f040 8089 	bne.w	80077f0 <HAL_DMA_IRQHandler+0xcd4>
        {
          /* Disable the transfer complete and error interrupt, if the DMA mode is not CIRCULAR */
          __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE | DMA_IT_TC);
 80076de:	687b      	ldr	r3, [r7, #4]
 80076e0:	681b      	ldr	r3, [r3, #0]
 80076e2:	4a2b      	ldr	r2, [pc, #172]	@ (8007790 <HAL_DMA_IRQHandler+0xc74>)
 80076e4:	4293      	cmp	r3, r2
 80076e6:	d04a      	beq.n	800777e <HAL_DMA_IRQHandler+0xc62>
 80076e8:	687b      	ldr	r3, [r7, #4]
 80076ea:	681b      	ldr	r3, [r3, #0]
 80076ec:	4a29      	ldr	r2, [pc, #164]	@ (8007794 <HAL_DMA_IRQHandler+0xc78>)
 80076ee:	4293      	cmp	r3, r2
 80076f0:	d045      	beq.n	800777e <HAL_DMA_IRQHandler+0xc62>
 80076f2:	687b      	ldr	r3, [r7, #4]
 80076f4:	681b      	ldr	r3, [r3, #0]
 80076f6:	4a28      	ldr	r2, [pc, #160]	@ (8007798 <HAL_DMA_IRQHandler+0xc7c>)
 80076f8:	4293      	cmp	r3, r2
 80076fa:	d040      	beq.n	800777e <HAL_DMA_IRQHandler+0xc62>
 80076fc:	687b      	ldr	r3, [r7, #4]
 80076fe:	681b      	ldr	r3, [r3, #0]
 8007700:	4a26      	ldr	r2, [pc, #152]	@ (800779c <HAL_DMA_IRQHandler+0xc80>)
 8007702:	4293      	cmp	r3, r2
 8007704:	d03b      	beq.n	800777e <HAL_DMA_IRQHandler+0xc62>
 8007706:	687b      	ldr	r3, [r7, #4]
 8007708:	681b      	ldr	r3, [r3, #0]
 800770a:	4a25      	ldr	r2, [pc, #148]	@ (80077a0 <HAL_DMA_IRQHandler+0xc84>)
 800770c:	4293      	cmp	r3, r2
 800770e:	d036      	beq.n	800777e <HAL_DMA_IRQHandler+0xc62>
 8007710:	687b      	ldr	r3, [r7, #4]
 8007712:	681b      	ldr	r3, [r3, #0]
 8007714:	4a23      	ldr	r2, [pc, #140]	@ (80077a4 <HAL_DMA_IRQHandler+0xc88>)
 8007716:	4293      	cmp	r3, r2
 8007718:	d031      	beq.n	800777e <HAL_DMA_IRQHandler+0xc62>
 800771a:	687b      	ldr	r3, [r7, #4]
 800771c:	681b      	ldr	r3, [r3, #0]
 800771e:	4a22      	ldr	r2, [pc, #136]	@ (80077a8 <HAL_DMA_IRQHandler+0xc8c>)
 8007720:	4293      	cmp	r3, r2
 8007722:	d02c      	beq.n	800777e <HAL_DMA_IRQHandler+0xc62>
 8007724:	687b      	ldr	r3, [r7, #4]
 8007726:	681b      	ldr	r3, [r3, #0]
 8007728:	4a20      	ldr	r2, [pc, #128]	@ (80077ac <HAL_DMA_IRQHandler+0xc90>)
 800772a:	4293      	cmp	r3, r2
 800772c:	d027      	beq.n	800777e <HAL_DMA_IRQHandler+0xc62>
 800772e:	687b      	ldr	r3, [r7, #4]
 8007730:	681b      	ldr	r3, [r3, #0]
 8007732:	4a1f      	ldr	r2, [pc, #124]	@ (80077b0 <HAL_DMA_IRQHandler+0xc94>)
 8007734:	4293      	cmp	r3, r2
 8007736:	d022      	beq.n	800777e <HAL_DMA_IRQHandler+0xc62>
 8007738:	687b      	ldr	r3, [r7, #4]
 800773a:	681b      	ldr	r3, [r3, #0]
 800773c:	4a1d      	ldr	r2, [pc, #116]	@ (80077b4 <HAL_DMA_IRQHandler+0xc98>)
 800773e:	4293      	cmp	r3, r2
 8007740:	d01d      	beq.n	800777e <HAL_DMA_IRQHandler+0xc62>
 8007742:	687b      	ldr	r3, [r7, #4]
 8007744:	681b      	ldr	r3, [r3, #0]
 8007746:	4a1c      	ldr	r2, [pc, #112]	@ (80077b8 <HAL_DMA_IRQHandler+0xc9c>)
 8007748:	4293      	cmp	r3, r2
 800774a:	d018      	beq.n	800777e <HAL_DMA_IRQHandler+0xc62>
 800774c:	687b      	ldr	r3, [r7, #4]
 800774e:	681b      	ldr	r3, [r3, #0]
 8007750:	4a1a      	ldr	r2, [pc, #104]	@ (80077bc <HAL_DMA_IRQHandler+0xca0>)
 8007752:	4293      	cmp	r3, r2
 8007754:	d013      	beq.n	800777e <HAL_DMA_IRQHandler+0xc62>
 8007756:	687b      	ldr	r3, [r7, #4]
 8007758:	681b      	ldr	r3, [r3, #0]
 800775a:	4a19      	ldr	r2, [pc, #100]	@ (80077c0 <HAL_DMA_IRQHandler+0xca4>)
 800775c:	4293      	cmp	r3, r2
 800775e:	d00e      	beq.n	800777e <HAL_DMA_IRQHandler+0xc62>
 8007760:	687b      	ldr	r3, [r7, #4]
 8007762:	681b      	ldr	r3, [r3, #0]
 8007764:	4a17      	ldr	r2, [pc, #92]	@ (80077c4 <HAL_DMA_IRQHandler+0xca8>)
 8007766:	4293      	cmp	r3, r2
 8007768:	d009      	beq.n	800777e <HAL_DMA_IRQHandler+0xc62>
 800776a:	687b      	ldr	r3, [r7, #4]
 800776c:	681b      	ldr	r3, [r3, #0]
 800776e:	4a16      	ldr	r2, [pc, #88]	@ (80077c8 <HAL_DMA_IRQHandler+0xcac>)
 8007770:	4293      	cmp	r3, r2
 8007772:	d004      	beq.n	800777e <HAL_DMA_IRQHandler+0xc62>
 8007774:	687b      	ldr	r3, [r7, #4]
 8007776:	681b      	ldr	r3, [r3, #0]
 8007778:	4a14      	ldr	r2, [pc, #80]	@ (80077cc <HAL_DMA_IRQHandler+0xcb0>)
 800777a:	4293      	cmp	r3, r2
 800777c:	d128      	bne.n	80077d0 <HAL_DMA_IRQHandler+0xcb4>
 800777e:	687b      	ldr	r3, [r7, #4]
 8007780:	681b      	ldr	r3, [r3, #0]
 8007782:	681a      	ldr	r2, [r3, #0]
 8007784:	687b      	ldr	r3, [r7, #4]
 8007786:	681b      	ldr	r3, [r3, #0]
 8007788:	f022 0214 	bic.w	r2, r2, #20
 800778c:	601a      	str	r2, [r3, #0]
 800778e:	e027      	b.n	80077e0 <HAL_DMA_IRQHandler+0xcc4>
 8007790:	40020010 	.word	0x40020010
 8007794:	40020028 	.word	0x40020028
 8007798:	40020040 	.word	0x40020040
 800779c:	40020058 	.word	0x40020058
 80077a0:	40020070 	.word	0x40020070
 80077a4:	40020088 	.word	0x40020088
 80077a8:	400200a0 	.word	0x400200a0
 80077ac:	400200b8 	.word	0x400200b8
 80077b0:	40020410 	.word	0x40020410
 80077b4:	40020428 	.word	0x40020428
 80077b8:	40020440 	.word	0x40020440
 80077bc:	40020458 	.word	0x40020458
 80077c0:	40020470 	.word	0x40020470
 80077c4:	40020488 	.word	0x40020488
 80077c8:	400204a0 	.word	0x400204a0
 80077cc:	400204b8 	.word	0x400204b8
 80077d0:	687b      	ldr	r3, [r7, #4]
 80077d2:	681b      	ldr	r3, [r3, #0]
 80077d4:	681a      	ldr	r2, [r3, #0]
 80077d6:	687b      	ldr	r3, [r7, #4]
 80077d8:	681b      	ldr	r3, [r3, #0]
 80077da:	f022 020a 	bic.w	r2, r2, #10
 80077de:	601a      	str	r2, [r3, #0]

          /* Change the DMA state */
          hdma->State = HAL_DMA_STATE_READY;
 80077e0:	687b      	ldr	r3, [r7, #4]
 80077e2:	2201      	movs	r2, #1
 80077e4:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

          /* Process Unlocked */
          __HAL_UNLOCK(hdma);
 80077e8:	687b      	ldr	r3, [r7, #4]
 80077ea:	2200      	movs	r2, #0
 80077ec:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34
        }

        if(hdma->XferCpltCallback != NULL)
 80077f0:	687b      	ldr	r3, [r7, #4]
 80077f2:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 80077f4:	2b00      	cmp	r3, #0
 80077f6:	f000 8097 	beq.w	8007928 <HAL_DMA_IRQHandler+0xe0c>
        {
          /* Transfer complete callback */
          hdma->XferCpltCallback(hdma);
 80077fa:	687b      	ldr	r3, [r7, #4]
 80077fc:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 80077fe:	6878      	ldr	r0, [r7, #4]
 8007800:	4798      	blx	r3
      if((ccr_reg & BDMA_CCR_DBM) != 0U)
 8007802:	e091      	b.n	8007928 <HAL_DMA_IRQHandler+0xe0c>
        }
      }
    }
    /* Transfer Error Interrupt management **************************************/
    else if (((tmpisr_bdma & (BDMA_FLAG_TE0 << (hdma->StreamIndex & 0x1FU))) != 0U) && ((ccr_reg & BDMA_CCR_TEIE) != 0U))
 8007804:	687b      	ldr	r3, [r7, #4]
 8007806:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 8007808:	f003 031f 	and.w	r3, r3, #31
 800780c:	2208      	movs	r2, #8
 800780e:	409a      	lsls	r2, r3
 8007810:	697b      	ldr	r3, [r7, #20]
 8007812:	4013      	ands	r3, r2
 8007814:	2b00      	cmp	r3, #0
 8007816:	f000 8088 	beq.w	800792a <HAL_DMA_IRQHandler+0xe0e>
 800781a:	693b      	ldr	r3, [r7, #16]
 800781c:	f003 0308 	and.w	r3, r3, #8
 8007820:	2b00      	cmp	r3, #0
 8007822:	f000 8082 	beq.w	800792a <HAL_DMA_IRQHandler+0xe0e>
    {
      /* When a DMA transfer error occurs */
      /* A hardware clear of its EN bits is performed */
      /* Disable ALL DMA IT */
      __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
 8007826:	687b      	ldr	r3, [r7, #4]
 8007828:	681b      	ldr	r3, [r3, #0]
 800782a:	4a41      	ldr	r2, [pc, #260]	@ (8007930 <HAL_DMA_IRQHandler+0xe14>)
 800782c:	4293      	cmp	r3, r2
 800782e:	d04a      	beq.n	80078c6 <HAL_DMA_IRQHandler+0xdaa>
 8007830:	687b      	ldr	r3, [r7, #4]
 8007832:	681b      	ldr	r3, [r3, #0]
 8007834:	4a3f      	ldr	r2, [pc, #252]	@ (8007934 <HAL_DMA_IRQHandler+0xe18>)
 8007836:	4293      	cmp	r3, r2
 8007838:	d045      	beq.n	80078c6 <HAL_DMA_IRQHandler+0xdaa>
 800783a:	687b      	ldr	r3, [r7, #4]
 800783c:	681b      	ldr	r3, [r3, #0]
 800783e:	4a3e      	ldr	r2, [pc, #248]	@ (8007938 <HAL_DMA_IRQHandler+0xe1c>)
 8007840:	4293      	cmp	r3, r2
 8007842:	d040      	beq.n	80078c6 <HAL_DMA_IRQHandler+0xdaa>
 8007844:	687b      	ldr	r3, [r7, #4]
 8007846:	681b      	ldr	r3, [r3, #0]
 8007848:	4a3c      	ldr	r2, [pc, #240]	@ (800793c <HAL_DMA_IRQHandler+0xe20>)
 800784a:	4293      	cmp	r3, r2
 800784c:	d03b      	beq.n	80078c6 <HAL_DMA_IRQHandler+0xdaa>
 800784e:	687b      	ldr	r3, [r7, #4]
 8007850:	681b      	ldr	r3, [r3, #0]
 8007852:	4a3b      	ldr	r2, [pc, #236]	@ (8007940 <HAL_DMA_IRQHandler+0xe24>)
 8007854:	4293      	cmp	r3, r2
 8007856:	d036      	beq.n	80078c6 <HAL_DMA_IRQHandler+0xdaa>
 8007858:	687b      	ldr	r3, [r7, #4]
 800785a:	681b      	ldr	r3, [r3, #0]
 800785c:	4a39      	ldr	r2, [pc, #228]	@ (8007944 <HAL_DMA_IRQHandler+0xe28>)
 800785e:	4293      	cmp	r3, r2
 8007860:	d031      	beq.n	80078c6 <HAL_DMA_IRQHandler+0xdaa>
 8007862:	687b      	ldr	r3, [r7, #4]
 8007864:	681b      	ldr	r3, [r3, #0]
 8007866:	4a38      	ldr	r2, [pc, #224]	@ (8007948 <HAL_DMA_IRQHandler+0xe2c>)
 8007868:	4293      	cmp	r3, r2
 800786a:	d02c      	beq.n	80078c6 <HAL_DMA_IRQHandler+0xdaa>
 800786c:	687b      	ldr	r3, [r7, #4]
 800786e:	681b      	ldr	r3, [r3, #0]
 8007870:	4a36      	ldr	r2, [pc, #216]	@ (800794c <HAL_DMA_IRQHandler+0xe30>)
 8007872:	4293      	cmp	r3, r2
 8007874:	d027      	beq.n	80078c6 <HAL_DMA_IRQHandler+0xdaa>
 8007876:	687b      	ldr	r3, [r7, #4]
 8007878:	681b      	ldr	r3, [r3, #0]
 800787a:	4a35      	ldr	r2, [pc, #212]	@ (8007950 <HAL_DMA_IRQHandler+0xe34>)
 800787c:	4293      	cmp	r3, r2
 800787e:	d022      	beq.n	80078c6 <HAL_DMA_IRQHandler+0xdaa>
 8007880:	687b      	ldr	r3, [r7, #4]
 8007882:	681b      	ldr	r3, [r3, #0]
 8007884:	4a33      	ldr	r2, [pc, #204]	@ (8007954 <HAL_DMA_IRQHandler+0xe38>)
 8007886:	4293      	cmp	r3, r2
 8007888:	d01d      	beq.n	80078c6 <HAL_DMA_IRQHandler+0xdaa>
 800788a:	687b      	ldr	r3, [r7, #4]
 800788c:	681b      	ldr	r3, [r3, #0]
 800788e:	4a32      	ldr	r2, [pc, #200]	@ (8007958 <HAL_DMA_IRQHandler+0xe3c>)
 8007890:	4293      	cmp	r3, r2
 8007892:	d018      	beq.n	80078c6 <HAL_DMA_IRQHandler+0xdaa>
 8007894:	687b      	ldr	r3, [r7, #4]
 8007896:	681b      	ldr	r3, [r3, #0]
 8007898:	4a30      	ldr	r2, [pc, #192]	@ (800795c <HAL_DMA_IRQHandler+0xe40>)
 800789a:	4293      	cmp	r3, r2
 800789c:	d013      	beq.n	80078c6 <HAL_DMA_IRQHandler+0xdaa>
 800789e:	687b      	ldr	r3, [r7, #4]
 80078a0:	681b      	ldr	r3, [r3, #0]
 80078a2:	4a2f      	ldr	r2, [pc, #188]	@ (8007960 <HAL_DMA_IRQHandler+0xe44>)
 80078a4:	4293      	cmp	r3, r2
 80078a6:	d00e      	beq.n	80078c6 <HAL_DMA_IRQHandler+0xdaa>
 80078a8:	687b      	ldr	r3, [r7, #4]
 80078aa:	681b      	ldr	r3, [r3, #0]
 80078ac:	4a2d      	ldr	r2, [pc, #180]	@ (8007964 <HAL_DMA_IRQHandler+0xe48>)
 80078ae:	4293      	cmp	r3, r2
 80078b0:	d009      	beq.n	80078c6 <HAL_DMA_IRQHandler+0xdaa>
 80078b2:	687b      	ldr	r3, [r7, #4]
 80078b4:	681b      	ldr	r3, [r3, #0]
 80078b6:	4a2c      	ldr	r2, [pc, #176]	@ (8007968 <HAL_DMA_IRQHandler+0xe4c>)
 80078b8:	4293      	cmp	r3, r2
 80078ba:	d004      	beq.n	80078c6 <HAL_DMA_IRQHandler+0xdaa>
 80078bc:	687b      	ldr	r3, [r7, #4]
 80078be:	681b      	ldr	r3, [r3, #0]
 80078c0:	4a2a      	ldr	r2, [pc, #168]	@ (800796c <HAL_DMA_IRQHandler+0xe50>)
 80078c2:	4293      	cmp	r3, r2
 80078c4:	d108      	bne.n	80078d8 <HAL_DMA_IRQHandler+0xdbc>
 80078c6:	687b      	ldr	r3, [r7, #4]
 80078c8:	681b      	ldr	r3, [r3, #0]
 80078ca:	681a      	ldr	r2, [r3, #0]
 80078cc:	687b      	ldr	r3, [r7, #4]
 80078ce:	681b      	ldr	r3, [r3, #0]
 80078d0:	f022 021c 	bic.w	r2, r2, #28
 80078d4:	601a      	str	r2, [r3, #0]
 80078d6:	e007      	b.n	80078e8 <HAL_DMA_IRQHandler+0xdcc>
 80078d8:	687b      	ldr	r3, [r7, #4]
 80078da:	681b      	ldr	r3, [r3, #0]
 80078dc:	681a      	ldr	r2, [r3, #0]
 80078de:	687b      	ldr	r3, [r7, #4]
 80078e0:	681b      	ldr	r3, [r3, #0]
 80078e2:	f022 020e 	bic.w	r2, r2, #14
 80078e6:	601a      	str	r2, [r3, #0]

      /* Clear all flags */
      regs_bdma->IFCR = (BDMA_ISR_GIF0) << (hdma->StreamIndex & 0x1FU);
 80078e8:	687b      	ldr	r3, [r7, #4]
 80078ea:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 80078ec:	f003 031f 	and.w	r3, r3, #31
 80078f0:	2201      	movs	r2, #1
 80078f2:	409a      	lsls	r2, r3
 80078f4:	69fb      	ldr	r3, [r7, #28]
 80078f6:	605a      	str	r2, [r3, #4]

      /* Update error code */
      hdma->ErrorCode = HAL_DMA_ERROR_TE;
 80078f8:	687b      	ldr	r3, [r7, #4]
 80078fa:	2201      	movs	r2, #1
 80078fc:	655a      	str	r2, [r3, #84]	@ 0x54

      /* Change the DMA state */
      hdma->State = HAL_DMA_STATE_READY;
 80078fe:	687b      	ldr	r3, [r7, #4]
 8007900:	2201      	movs	r2, #1
 8007902:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

      /* Process Unlocked */
      __HAL_UNLOCK(hdma);
 8007906:	687b      	ldr	r3, [r7, #4]
 8007908:	2200      	movs	r2, #0
 800790a:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34

      if (hdma->XferErrorCallback != NULL)
 800790e:	687b      	ldr	r3, [r7, #4]
 8007910:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 8007912:	2b00      	cmp	r3, #0
 8007914:	d009      	beq.n	800792a <HAL_DMA_IRQHandler+0xe0e>
      {
        /* Transfer error callback */
        hdma->XferErrorCallback(hdma);
 8007916:	687b      	ldr	r3, [r7, #4]
 8007918:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 800791a:	6878      	ldr	r0, [r7, #4]
 800791c:	4798      	blx	r3
 800791e:	e004      	b.n	800792a <HAL_DMA_IRQHandler+0xe0e>
          return;
 8007920:	bf00      	nop
 8007922:	e002      	b.n	800792a <HAL_DMA_IRQHandler+0xe0e>
      if((ccr_reg & BDMA_CCR_DBM) != 0U)
 8007924:	bf00      	nop
 8007926:	e000      	b.n	800792a <HAL_DMA_IRQHandler+0xe0e>
      if((ccr_reg & BDMA_CCR_DBM) != 0U)
 8007928:	bf00      	nop
  }
  else
  {
    /* Nothing To Do */
  }
}
 800792a:	3728      	adds	r7, #40	@ 0x28
 800792c:	46bd      	mov	sp, r7
 800792e:	bd80      	pop	{r7, pc}
 8007930:	40020010 	.word	0x40020010
 8007934:	40020028 	.word	0x40020028
 8007938:	40020040 	.word	0x40020040
 800793c:	40020058 	.word	0x40020058
 8007940:	40020070 	.word	0x40020070
 8007944:	40020088 	.word	0x40020088
 8007948:	400200a0 	.word	0x400200a0
 800794c:	400200b8 	.word	0x400200b8
 8007950:	40020410 	.word	0x40020410
 8007954:	40020428 	.word	0x40020428
 8007958:	40020440 	.word	0x40020440
 800795c:	40020458 	.word	0x40020458
 8007960:	40020470 	.word	0x40020470
 8007964:	40020488 	.word	0x40020488
 8007968:	400204a0 	.word	0x400204a0
 800796c:	400204b8 	.word	0x400204b8

08007970 <DMA_CalcBaseAndBitshift>:
  * @param  hdma:       pointer to a DMA_HandleTypeDef structure that contains
  *                     the configuration information for the specified DMA Stream.
  * @retval Stream base address
  */
static uint32_t DMA_CalcBaseAndBitshift(DMA_HandleTypeDef *hdma)
{
 8007970:	b480      	push	{r7}
 8007972:	b085      	sub	sp, #20
 8007974:	af00      	add	r7, sp, #0
 8007976:	6078      	str	r0, [r7, #4]
  if(IS_DMA_STREAM_INSTANCE(hdma->Instance) != 0U) /* DMA1 or DMA2 instance */
 8007978:	687b      	ldr	r3, [r7, #4]
 800797a:	681b      	ldr	r3, [r3, #0]
 800797c:	4a42      	ldr	r2, [pc, #264]	@ (8007a88 <DMA_CalcBaseAndBitshift+0x118>)
 800797e:	4293      	cmp	r3, r2
 8007980:	d04a      	beq.n	8007a18 <DMA_CalcBaseAndBitshift+0xa8>
 8007982:	687b      	ldr	r3, [r7, #4]
 8007984:	681b      	ldr	r3, [r3, #0]
 8007986:	4a41      	ldr	r2, [pc, #260]	@ (8007a8c <DMA_CalcBaseAndBitshift+0x11c>)
 8007988:	4293      	cmp	r3, r2
 800798a:	d045      	beq.n	8007a18 <DMA_CalcBaseAndBitshift+0xa8>
 800798c:	687b      	ldr	r3, [r7, #4]
 800798e:	681b      	ldr	r3, [r3, #0]
 8007990:	4a3f      	ldr	r2, [pc, #252]	@ (8007a90 <DMA_CalcBaseAndBitshift+0x120>)
 8007992:	4293      	cmp	r3, r2
 8007994:	d040      	beq.n	8007a18 <DMA_CalcBaseAndBitshift+0xa8>
 8007996:	687b      	ldr	r3, [r7, #4]
 8007998:	681b      	ldr	r3, [r3, #0]
 800799a:	4a3e      	ldr	r2, [pc, #248]	@ (8007a94 <DMA_CalcBaseAndBitshift+0x124>)
 800799c:	4293      	cmp	r3, r2
 800799e:	d03b      	beq.n	8007a18 <DMA_CalcBaseAndBitshift+0xa8>
 80079a0:	687b      	ldr	r3, [r7, #4]
 80079a2:	681b      	ldr	r3, [r3, #0]
 80079a4:	4a3c      	ldr	r2, [pc, #240]	@ (8007a98 <DMA_CalcBaseAndBitshift+0x128>)
 80079a6:	4293      	cmp	r3, r2
 80079a8:	d036      	beq.n	8007a18 <DMA_CalcBaseAndBitshift+0xa8>
 80079aa:	687b      	ldr	r3, [r7, #4]
 80079ac:	681b      	ldr	r3, [r3, #0]
 80079ae:	4a3b      	ldr	r2, [pc, #236]	@ (8007a9c <DMA_CalcBaseAndBitshift+0x12c>)
 80079b0:	4293      	cmp	r3, r2
 80079b2:	d031      	beq.n	8007a18 <DMA_CalcBaseAndBitshift+0xa8>
 80079b4:	687b      	ldr	r3, [r7, #4]
 80079b6:	681b      	ldr	r3, [r3, #0]
 80079b8:	4a39      	ldr	r2, [pc, #228]	@ (8007aa0 <DMA_CalcBaseAndBitshift+0x130>)
 80079ba:	4293      	cmp	r3, r2
 80079bc:	d02c      	beq.n	8007a18 <DMA_CalcBaseAndBitshift+0xa8>
 80079be:	687b      	ldr	r3, [r7, #4]
 80079c0:	681b      	ldr	r3, [r3, #0]
 80079c2:	4a38      	ldr	r2, [pc, #224]	@ (8007aa4 <DMA_CalcBaseAndBitshift+0x134>)
 80079c4:	4293      	cmp	r3, r2
 80079c6:	d027      	beq.n	8007a18 <DMA_CalcBaseAndBitshift+0xa8>
 80079c8:	687b      	ldr	r3, [r7, #4]
 80079ca:	681b      	ldr	r3, [r3, #0]
 80079cc:	4a36      	ldr	r2, [pc, #216]	@ (8007aa8 <DMA_CalcBaseAndBitshift+0x138>)
 80079ce:	4293      	cmp	r3, r2
 80079d0:	d022      	beq.n	8007a18 <DMA_CalcBaseAndBitshift+0xa8>
 80079d2:	687b      	ldr	r3, [r7, #4]
 80079d4:	681b      	ldr	r3, [r3, #0]
 80079d6:	4a35      	ldr	r2, [pc, #212]	@ (8007aac <DMA_CalcBaseAndBitshift+0x13c>)
 80079d8:	4293      	cmp	r3, r2
 80079da:	d01d      	beq.n	8007a18 <DMA_CalcBaseAndBitshift+0xa8>
 80079dc:	687b      	ldr	r3, [r7, #4]
 80079de:	681b      	ldr	r3, [r3, #0]
 80079e0:	4a33      	ldr	r2, [pc, #204]	@ (8007ab0 <DMA_CalcBaseAndBitshift+0x140>)
 80079e2:	4293      	cmp	r3, r2
 80079e4:	d018      	beq.n	8007a18 <DMA_CalcBaseAndBitshift+0xa8>
 80079e6:	687b      	ldr	r3, [r7, #4]
 80079e8:	681b      	ldr	r3, [r3, #0]
 80079ea:	4a32      	ldr	r2, [pc, #200]	@ (8007ab4 <DMA_CalcBaseAndBitshift+0x144>)
 80079ec:	4293      	cmp	r3, r2
 80079ee:	d013      	beq.n	8007a18 <DMA_CalcBaseAndBitshift+0xa8>
 80079f0:	687b      	ldr	r3, [r7, #4]
 80079f2:	681b      	ldr	r3, [r3, #0]
 80079f4:	4a30      	ldr	r2, [pc, #192]	@ (8007ab8 <DMA_CalcBaseAndBitshift+0x148>)
 80079f6:	4293      	cmp	r3, r2
 80079f8:	d00e      	beq.n	8007a18 <DMA_CalcBaseAndBitshift+0xa8>
 80079fa:	687b      	ldr	r3, [r7, #4]
 80079fc:	681b      	ldr	r3, [r3, #0]
 80079fe:	4a2f      	ldr	r2, [pc, #188]	@ (8007abc <DMA_CalcBaseAndBitshift+0x14c>)
 8007a00:	4293      	cmp	r3, r2
 8007a02:	d009      	beq.n	8007a18 <DMA_CalcBaseAndBitshift+0xa8>
 8007a04:	687b      	ldr	r3, [r7, #4]
 8007a06:	681b      	ldr	r3, [r3, #0]
 8007a08:	4a2d      	ldr	r2, [pc, #180]	@ (8007ac0 <DMA_CalcBaseAndBitshift+0x150>)
 8007a0a:	4293      	cmp	r3, r2
 8007a0c:	d004      	beq.n	8007a18 <DMA_CalcBaseAndBitshift+0xa8>
 8007a0e:	687b      	ldr	r3, [r7, #4]
 8007a10:	681b      	ldr	r3, [r3, #0]
 8007a12:	4a2c      	ldr	r2, [pc, #176]	@ (8007ac4 <DMA_CalcBaseAndBitshift+0x154>)
 8007a14:	4293      	cmp	r3, r2
 8007a16:	d101      	bne.n	8007a1c <DMA_CalcBaseAndBitshift+0xac>
 8007a18:	2301      	movs	r3, #1
 8007a1a:	e000      	b.n	8007a1e <DMA_CalcBaseAndBitshift+0xae>
 8007a1c:	2300      	movs	r3, #0
 8007a1e:	2b00      	cmp	r3, #0
 8007a20:	d024      	beq.n	8007a6c <DMA_CalcBaseAndBitshift+0xfc>
  {
    uint32_t stream_number = (((uint32_t)((uint32_t*)hdma->Instance) & 0xFFU) - 16U) / 24U;
 8007a22:	687b      	ldr	r3, [r7, #4]
 8007a24:	681b      	ldr	r3, [r3, #0]
 8007a26:	b2db      	uxtb	r3, r3
 8007a28:	3b10      	subs	r3, #16
 8007a2a:	4a27      	ldr	r2, [pc, #156]	@ (8007ac8 <DMA_CalcBaseAndBitshift+0x158>)
 8007a2c:	fba2 2303 	umull	r2, r3, r2, r3
 8007a30:	091b      	lsrs	r3, r3, #4
 8007a32:	60fb      	str	r3, [r7, #12]

    /* lookup table for necessary bitshift of flags within status registers */
    static const uint8_t flagBitshiftOffset[8U] = {0U, 6U, 16U, 22U, 0U, 6U, 16U, 22U};
    hdma->StreamIndex = flagBitshiftOffset[stream_number & 0x7U];
 8007a34:	68fb      	ldr	r3, [r7, #12]
 8007a36:	f003 0307 	and.w	r3, r3, #7
 8007a3a:	4a24      	ldr	r2, [pc, #144]	@ (8007acc <DMA_CalcBaseAndBitshift+0x15c>)
 8007a3c:	5cd3      	ldrb	r3, [r2, r3]
 8007a3e:	461a      	mov	r2, r3
 8007a40:	687b      	ldr	r3, [r7, #4]
 8007a42:	65da      	str	r2, [r3, #92]	@ 0x5c

    if (stream_number > 3U)
 8007a44:	68fb      	ldr	r3, [r7, #12]
 8007a46:	2b03      	cmp	r3, #3
 8007a48:	d908      	bls.n	8007a5c <DMA_CalcBaseAndBitshift+0xec>
    {
      /* return pointer to HISR and HIFCR */
      hdma->StreamBaseAddress = (((uint32_t)((uint32_t*)hdma->Instance) & (uint32_t)(~0x3FFU)) + 4U);
 8007a4a:	687b      	ldr	r3, [r7, #4]
 8007a4c:	681b      	ldr	r3, [r3, #0]
 8007a4e:	461a      	mov	r2, r3
 8007a50:	4b1f      	ldr	r3, [pc, #124]	@ (8007ad0 <DMA_CalcBaseAndBitshift+0x160>)
 8007a52:	4013      	ands	r3, r2
 8007a54:	1d1a      	adds	r2, r3, #4
 8007a56:	687b      	ldr	r3, [r7, #4]
 8007a58:	659a      	str	r2, [r3, #88]	@ 0x58
 8007a5a:	e00d      	b.n	8007a78 <DMA_CalcBaseAndBitshift+0x108>
    }
    else
    {
      /* return pointer to LISR and LIFCR */
      hdma->StreamBaseAddress = ((uint32_t)((uint32_t*)hdma->Instance) & (uint32_t)(~0x3FFU));
 8007a5c:	687b      	ldr	r3, [r7, #4]
 8007a5e:	681b      	ldr	r3, [r3, #0]
 8007a60:	461a      	mov	r2, r3
 8007a62:	4b1b      	ldr	r3, [pc, #108]	@ (8007ad0 <DMA_CalcBaseAndBitshift+0x160>)
 8007a64:	4013      	ands	r3, r2
 8007a66:	687a      	ldr	r2, [r7, #4]
 8007a68:	6593      	str	r3, [r2, #88]	@ 0x58
 8007a6a:	e005      	b.n	8007a78 <DMA_CalcBaseAndBitshift+0x108>
    }
  }
  else /* BDMA instance(s) */
  {
    /* return pointer to ISR and IFCR */
    hdma->StreamBaseAddress = ((uint32_t)((uint32_t*)hdma->Instance) & (uint32_t)(~0xFFU));
 8007a6c:	687b      	ldr	r3, [r7, #4]
 8007a6e:	681b      	ldr	r3, [r3, #0]
 8007a70:	f023 02ff 	bic.w	r2, r3, #255	@ 0xff
 8007a74:	687b      	ldr	r3, [r7, #4]
 8007a76:	659a      	str	r2, [r3, #88]	@ 0x58
  }

  return hdma->StreamBaseAddress;
 8007a78:	687b      	ldr	r3, [r7, #4]
 8007a7a:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
}
 8007a7c:	4618      	mov	r0, r3
 8007a7e:	3714      	adds	r7, #20
 8007a80:	46bd      	mov	sp, r7
 8007a82:	f85d 7b04 	ldr.w	r7, [sp], #4
 8007a86:	4770      	bx	lr
 8007a88:	40020010 	.word	0x40020010
 8007a8c:	40020028 	.word	0x40020028
 8007a90:	40020040 	.word	0x40020040
 8007a94:	40020058 	.word	0x40020058
 8007a98:	40020070 	.word	0x40020070
 8007a9c:	40020088 	.word	0x40020088
 8007aa0:	400200a0 	.word	0x400200a0
 8007aa4:	400200b8 	.word	0x400200b8
 8007aa8:	40020410 	.word	0x40020410
 8007aac:	40020428 	.word	0x40020428
 8007ab0:	40020440 	.word	0x40020440
 8007ab4:	40020458 	.word	0x40020458
 8007ab8:	40020470 	.word	0x40020470
 8007abc:	40020488 	.word	0x40020488
 8007ac0:	400204a0 	.word	0x400204a0
 8007ac4:	400204b8 	.word	0x400204b8
 8007ac8:	aaaaaaab 	.word	0xaaaaaaab
 8007acc:	08031318 	.word	0x08031318
 8007ad0:	fffffc00 	.word	0xfffffc00

08007ad4 <DMA_CheckFifoParam>:
  * @param  hdma:       pointer to a DMA_HandleTypeDef structure that contains
  *                     the configuration information for the specified DMA Stream.
  * @retval HAL status
  */
static HAL_StatusTypeDef DMA_CheckFifoParam(DMA_HandleTypeDef *hdma)
{
 8007ad4:	b480      	push	{r7}
 8007ad6:	b085      	sub	sp, #20
 8007ad8:	af00      	add	r7, sp, #0
 8007ada:	6078      	str	r0, [r7, #4]
  HAL_StatusTypeDef status = HAL_OK;
 8007adc:	2300      	movs	r3, #0
 8007ade:	73fb      	strb	r3, [r7, #15]

  /* Memory Data size equal to Byte */
  if (hdma->Init.MemDataAlignment == DMA_MDATAALIGN_BYTE)
 8007ae0:	687b      	ldr	r3, [r7, #4]
 8007ae2:	699b      	ldr	r3, [r3, #24]
 8007ae4:	2b00      	cmp	r3, #0
 8007ae6:	d120      	bne.n	8007b2a <DMA_CheckFifoParam+0x56>
  {
    switch (hdma->Init.FIFOThreshold)
 8007ae8:	687b      	ldr	r3, [r7, #4]
 8007aea:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 8007aec:	2b03      	cmp	r3, #3
 8007aee:	d858      	bhi.n	8007ba2 <DMA_CheckFifoParam+0xce>
 8007af0:	a201      	add	r2, pc, #4	@ (adr r2, 8007af8 <DMA_CheckFifoParam+0x24>)
 8007af2:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 8007af6:	bf00      	nop
 8007af8:	08007b09 	.word	0x08007b09
 8007afc:	08007b1b 	.word	0x08007b1b
 8007b00:	08007b09 	.word	0x08007b09
 8007b04:	08007ba3 	.word	0x08007ba3
    {
      case DMA_FIFO_THRESHOLD_1QUARTERFULL:
      case DMA_FIFO_THRESHOLD_3QUARTERSFULL:

        if ((hdma->Init.MemBurst & DMA_SxCR_MBURST_1) == DMA_SxCR_MBURST_1)
 8007b08:	687b      	ldr	r3, [r7, #4]
 8007b0a:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8007b0c:	f003 7380 	and.w	r3, r3, #16777216	@ 0x1000000
 8007b10:	2b00      	cmp	r3, #0
 8007b12:	d048      	beq.n	8007ba6 <DMA_CheckFifoParam+0xd2>
        {
          status = HAL_ERROR;
 8007b14:	2301      	movs	r3, #1
 8007b16:	73fb      	strb	r3, [r7, #15]
        }
        break;
 8007b18:	e045      	b.n	8007ba6 <DMA_CheckFifoParam+0xd2>

      case DMA_FIFO_THRESHOLD_HALFFULL:
        if (hdma->Init.MemBurst == DMA_MBURST_INC16)
 8007b1a:	687b      	ldr	r3, [r7, #4]
 8007b1c:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8007b1e:	f1b3 7fc0 	cmp.w	r3, #25165824	@ 0x1800000
 8007b22:	d142      	bne.n	8007baa <DMA_CheckFifoParam+0xd6>
        {
          status = HAL_ERROR;
 8007b24:	2301      	movs	r3, #1
 8007b26:	73fb      	strb	r3, [r7, #15]
        }
        break;
 8007b28:	e03f      	b.n	8007baa <DMA_CheckFifoParam+0xd6>
        break;
    }
  }

  /* Memory Data size equal to Half-Word */
  else if (hdma->Init.MemDataAlignment == DMA_MDATAALIGN_HALFWORD)
 8007b2a:	687b      	ldr	r3, [r7, #4]
 8007b2c:	699b      	ldr	r3, [r3, #24]
 8007b2e:	f5b3 5f00 	cmp.w	r3, #8192	@ 0x2000
 8007b32:	d123      	bne.n	8007b7c <DMA_CheckFifoParam+0xa8>
  {
    switch (hdma->Init.FIFOThreshold)
 8007b34:	687b      	ldr	r3, [r7, #4]
 8007b36:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 8007b38:	2b03      	cmp	r3, #3
 8007b3a:	d838      	bhi.n	8007bae <DMA_CheckFifoParam+0xda>
 8007b3c:	a201      	add	r2, pc, #4	@ (adr r2, 8007b44 <DMA_CheckFifoParam+0x70>)
 8007b3e:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 8007b42:	bf00      	nop
 8007b44:	08007b55 	.word	0x08007b55
 8007b48:	08007b5b 	.word	0x08007b5b
 8007b4c:	08007b55 	.word	0x08007b55
 8007b50:	08007b6d 	.word	0x08007b6d
    {
      case DMA_FIFO_THRESHOLD_1QUARTERFULL:
      case DMA_FIFO_THRESHOLD_3QUARTERSFULL:
        status = HAL_ERROR;
 8007b54:	2301      	movs	r3, #1
 8007b56:	73fb      	strb	r3, [r7, #15]
        break;
 8007b58:	e030      	b.n	8007bbc <DMA_CheckFifoParam+0xe8>

      case DMA_FIFO_THRESHOLD_HALFFULL:
        if ((hdma->Init.MemBurst & DMA_SxCR_MBURST_1) == DMA_SxCR_MBURST_1)
 8007b5a:	687b      	ldr	r3, [r7, #4]
 8007b5c:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8007b5e:	f003 7380 	and.w	r3, r3, #16777216	@ 0x1000000
 8007b62:	2b00      	cmp	r3, #0
 8007b64:	d025      	beq.n	8007bb2 <DMA_CheckFifoParam+0xde>
        {
          status = HAL_ERROR;
 8007b66:	2301      	movs	r3, #1
 8007b68:	73fb      	strb	r3, [r7, #15]
        }
        break;
 8007b6a:	e022      	b.n	8007bb2 <DMA_CheckFifoParam+0xde>

      case DMA_FIFO_THRESHOLD_FULL:
        if (hdma->Init.MemBurst == DMA_MBURST_INC16)
 8007b6c:	687b      	ldr	r3, [r7, #4]
 8007b6e:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8007b70:	f1b3 7fc0 	cmp.w	r3, #25165824	@ 0x1800000
 8007b74:	d11f      	bne.n	8007bb6 <DMA_CheckFifoParam+0xe2>
        {
          status = HAL_ERROR;
 8007b76:	2301      	movs	r3, #1
 8007b78:	73fb      	strb	r3, [r7, #15]
        }
        break;
 8007b7a:	e01c      	b.n	8007bb6 <DMA_CheckFifoParam+0xe2>
  }

  /* Memory Data size equal to Word */
  else
  {
    switch (hdma->Init.FIFOThreshold)
 8007b7c:	687b      	ldr	r3, [r7, #4]
 8007b7e:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 8007b80:	2b02      	cmp	r3, #2
 8007b82:	d902      	bls.n	8007b8a <DMA_CheckFifoParam+0xb6>
 8007b84:	2b03      	cmp	r3, #3
 8007b86:	d003      	beq.n	8007b90 <DMA_CheckFifoParam+0xbc>
          status = HAL_ERROR;
        }
    break;

      default:
        break;
 8007b88:	e018      	b.n	8007bbc <DMA_CheckFifoParam+0xe8>
        status = HAL_ERROR;
 8007b8a:	2301      	movs	r3, #1
 8007b8c:	73fb      	strb	r3, [r7, #15]
        break;
 8007b8e:	e015      	b.n	8007bbc <DMA_CheckFifoParam+0xe8>
        if ((hdma->Init.MemBurst & DMA_SxCR_MBURST_1) == DMA_SxCR_MBURST_1)
 8007b90:	687b      	ldr	r3, [r7, #4]
 8007b92:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8007b94:	f003 7380 	and.w	r3, r3, #16777216	@ 0x1000000
 8007b98:	2b00      	cmp	r3, #0
 8007b9a:	d00e      	beq.n	8007bba <DMA_CheckFifoParam+0xe6>
          status = HAL_ERROR;
 8007b9c:	2301      	movs	r3, #1
 8007b9e:	73fb      	strb	r3, [r7, #15]
    break;
 8007ba0:	e00b      	b.n	8007bba <DMA_CheckFifoParam+0xe6>
        break;
 8007ba2:	bf00      	nop
 8007ba4:	e00a      	b.n	8007bbc <DMA_CheckFifoParam+0xe8>
        break;
 8007ba6:	bf00      	nop
 8007ba8:	e008      	b.n	8007bbc <DMA_CheckFifoParam+0xe8>
        break;
 8007baa:	bf00      	nop
 8007bac:	e006      	b.n	8007bbc <DMA_CheckFifoParam+0xe8>
        break;
 8007bae:	bf00      	nop
 8007bb0:	e004      	b.n	8007bbc <DMA_CheckFifoParam+0xe8>
        break;
 8007bb2:	bf00      	nop
 8007bb4:	e002      	b.n	8007bbc <DMA_CheckFifoParam+0xe8>
        break;
 8007bb6:	bf00      	nop
 8007bb8:	e000      	b.n	8007bbc <DMA_CheckFifoParam+0xe8>
    break;
 8007bba:	bf00      	nop
    }
  }

  return status;
 8007bbc:	7bfb      	ldrb	r3, [r7, #15]
}
 8007bbe:	4618      	mov	r0, r3
 8007bc0:	3714      	adds	r7, #20
 8007bc2:	46bd      	mov	sp, r7
 8007bc4:	f85d 7b04 	ldr.w	r7, [sp], #4
 8007bc8:	4770      	bx	lr
 8007bca:	bf00      	nop

08007bcc <DMA_CalcDMAMUXChannelBaseAndMask>:
  * @param  hdma:       pointer to a DMA_HandleTypeDef structure that contains
  *                     the configuration information for the specified DMA Stream.
  * @retval HAL status
  */
static void DMA_CalcDMAMUXChannelBaseAndMask(DMA_HandleTypeDef *hdma)
{
 8007bcc:	b480      	push	{r7}
 8007bce:	b085      	sub	sp, #20
 8007bd0:	af00      	add	r7, sp, #0
 8007bd2:	6078      	str	r0, [r7, #4]
  uint32_t stream_number;
  uint32_t stream_baseaddress = (uint32_t)((uint32_t*)hdma->Instance);
 8007bd4:	687b      	ldr	r3, [r7, #4]
 8007bd6:	681b      	ldr	r3, [r3, #0]
 8007bd8:	60bb      	str	r3, [r7, #8]

  if(IS_BDMA_CHANNEL_DMAMUX_INSTANCE(hdma->Instance) != 0U)
 8007bda:	687b      	ldr	r3, [r7, #4]
 8007bdc:	681b      	ldr	r3, [r3, #0]
 8007bde:	4a38      	ldr	r2, [pc, #224]	@ (8007cc0 <DMA_CalcDMAMUXChannelBaseAndMask+0xf4>)
 8007be0:	4293      	cmp	r3, r2
 8007be2:	d022      	beq.n	8007c2a <DMA_CalcDMAMUXChannelBaseAndMask+0x5e>
 8007be4:	687b      	ldr	r3, [r7, #4]
 8007be6:	681b      	ldr	r3, [r3, #0]
 8007be8:	4a36      	ldr	r2, [pc, #216]	@ (8007cc4 <DMA_CalcDMAMUXChannelBaseAndMask+0xf8>)
 8007bea:	4293      	cmp	r3, r2
 8007bec:	d01d      	beq.n	8007c2a <DMA_CalcDMAMUXChannelBaseAndMask+0x5e>
 8007bee:	687b      	ldr	r3, [r7, #4]
 8007bf0:	681b      	ldr	r3, [r3, #0]
 8007bf2:	4a35      	ldr	r2, [pc, #212]	@ (8007cc8 <DMA_CalcDMAMUXChannelBaseAndMask+0xfc>)
 8007bf4:	4293      	cmp	r3, r2
 8007bf6:	d018      	beq.n	8007c2a <DMA_CalcDMAMUXChannelBaseAndMask+0x5e>
 8007bf8:	687b      	ldr	r3, [r7, #4]
 8007bfa:	681b      	ldr	r3, [r3, #0]
 8007bfc:	4a33      	ldr	r2, [pc, #204]	@ (8007ccc <DMA_CalcDMAMUXChannelBaseAndMask+0x100>)
 8007bfe:	4293      	cmp	r3, r2
 8007c00:	d013      	beq.n	8007c2a <DMA_CalcDMAMUXChannelBaseAndMask+0x5e>
 8007c02:	687b      	ldr	r3, [r7, #4]
 8007c04:	681b      	ldr	r3, [r3, #0]
 8007c06:	4a32      	ldr	r2, [pc, #200]	@ (8007cd0 <DMA_CalcDMAMUXChannelBaseAndMask+0x104>)
 8007c08:	4293      	cmp	r3, r2
 8007c0a:	d00e      	beq.n	8007c2a <DMA_CalcDMAMUXChannelBaseAndMask+0x5e>
 8007c0c:	687b      	ldr	r3, [r7, #4]
 8007c0e:	681b      	ldr	r3, [r3, #0]
 8007c10:	4a30      	ldr	r2, [pc, #192]	@ (8007cd4 <DMA_CalcDMAMUXChannelBaseAndMask+0x108>)
 8007c12:	4293      	cmp	r3, r2
 8007c14:	d009      	beq.n	8007c2a <DMA_CalcDMAMUXChannelBaseAndMask+0x5e>
 8007c16:	687b      	ldr	r3, [r7, #4]
 8007c18:	681b      	ldr	r3, [r3, #0]
 8007c1a:	4a2f      	ldr	r2, [pc, #188]	@ (8007cd8 <DMA_CalcDMAMUXChannelBaseAndMask+0x10c>)
 8007c1c:	4293      	cmp	r3, r2
 8007c1e:	d004      	beq.n	8007c2a <DMA_CalcDMAMUXChannelBaseAndMask+0x5e>
 8007c20:	687b      	ldr	r3, [r7, #4]
 8007c22:	681b      	ldr	r3, [r3, #0]
 8007c24:	4a2d      	ldr	r2, [pc, #180]	@ (8007cdc <DMA_CalcDMAMUXChannelBaseAndMask+0x110>)
 8007c26:	4293      	cmp	r3, r2
 8007c28:	d101      	bne.n	8007c2e <DMA_CalcDMAMUXChannelBaseAndMask+0x62>
 8007c2a:	2301      	movs	r3, #1
 8007c2c:	e000      	b.n	8007c30 <DMA_CalcDMAMUXChannelBaseAndMask+0x64>
 8007c2e:	2300      	movs	r3, #0
 8007c30:	2b00      	cmp	r3, #0
 8007c32:	d01a      	beq.n	8007c6a <DMA_CalcDMAMUXChannelBaseAndMask+0x9e>
  {
    /* BDMA Channels are connected to DMAMUX2 channels */
    stream_number = (((uint32_t)((uint32_t*)hdma->Instance) & 0xFFU) - 8U) / 20U;
 8007c34:	687b      	ldr	r3, [r7, #4]
 8007c36:	681b      	ldr	r3, [r3, #0]
 8007c38:	b2db      	uxtb	r3, r3
 8007c3a:	3b08      	subs	r3, #8
 8007c3c:	4a28      	ldr	r2, [pc, #160]	@ (8007ce0 <DMA_CalcDMAMUXChannelBaseAndMask+0x114>)
 8007c3e:	fba2 2303 	umull	r2, r3, r2, r3
 8007c42:	091b      	lsrs	r3, r3, #4
 8007c44:	60fb      	str	r3, [r7, #12]
    hdma->DMAmuxChannel = (DMAMUX_Channel_TypeDef *)((uint32_t)(((uint32_t)DMAMUX2_Channel0) + (stream_number * 4U)));
 8007c46:	68fa      	ldr	r2, [r7, #12]
 8007c48:	4b26      	ldr	r3, [pc, #152]	@ (8007ce4 <DMA_CalcDMAMUXChannelBaseAndMask+0x118>)
 8007c4a:	4413      	add	r3, r2
 8007c4c:	009b      	lsls	r3, r3, #2
 8007c4e:	461a      	mov	r2, r3
 8007c50:	687b      	ldr	r3, [r7, #4]
 8007c52:	661a      	str	r2, [r3, #96]	@ 0x60
    hdma->DMAmuxChannelStatus = DMAMUX2_ChannelStatus;
 8007c54:	687b      	ldr	r3, [r7, #4]
 8007c56:	4a24      	ldr	r2, [pc, #144]	@ (8007ce8 <DMA_CalcDMAMUXChannelBaseAndMask+0x11c>)
 8007c58:	665a      	str	r2, [r3, #100]	@ 0x64
    hdma->DMAmuxChannelStatusMask = 1UL << (stream_number & 0x1FU);
 8007c5a:	68fb      	ldr	r3, [r7, #12]
 8007c5c:	f003 031f 	and.w	r3, r3, #31
 8007c60:	2201      	movs	r2, #1
 8007c62:	409a      	lsls	r2, r3
 8007c64:	687b      	ldr	r3, [r7, #4]
 8007c66:	669a      	str	r2, [r3, #104]	@ 0x68
    }
    hdma->DMAmuxChannel = (DMAMUX_Channel_TypeDef *)((uint32_t)(((uint32_t)DMAMUX1_Channel0) + (stream_number * 4U)));
    hdma->DMAmuxChannelStatus = DMAMUX1_ChannelStatus;
    hdma->DMAmuxChannelStatusMask = 1UL << (stream_number & 0x1FU);
  }
}
 8007c68:	e024      	b.n	8007cb4 <DMA_CalcDMAMUXChannelBaseAndMask+0xe8>
    stream_number = (((uint32_t)((uint32_t*)hdma->Instance) & 0xFFU) - 16U) / 24U;
 8007c6a:	687b      	ldr	r3, [r7, #4]
 8007c6c:	681b      	ldr	r3, [r3, #0]
 8007c6e:	b2db      	uxtb	r3, r3
 8007c70:	3b10      	subs	r3, #16
 8007c72:	4a1e      	ldr	r2, [pc, #120]	@ (8007cec <DMA_CalcDMAMUXChannelBaseAndMask+0x120>)
 8007c74:	fba2 2303 	umull	r2, r3, r2, r3
 8007c78:	091b      	lsrs	r3, r3, #4
 8007c7a:	60fb      	str	r3, [r7, #12]
    if((stream_baseaddress <= ((uint32_t)DMA2_Stream7) ) && \
 8007c7c:	68bb      	ldr	r3, [r7, #8]
 8007c7e:	4a1c      	ldr	r2, [pc, #112]	@ (8007cf0 <DMA_CalcDMAMUXChannelBaseAndMask+0x124>)
 8007c80:	4293      	cmp	r3, r2
 8007c82:	d806      	bhi.n	8007c92 <DMA_CalcDMAMUXChannelBaseAndMask+0xc6>
 8007c84:	68bb      	ldr	r3, [r7, #8]
 8007c86:	4a1b      	ldr	r2, [pc, #108]	@ (8007cf4 <DMA_CalcDMAMUXChannelBaseAndMask+0x128>)
 8007c88:	4293      	cmp	r3, r2
 8007c8a:	d902      	bls.n	8007c92 <DMA_CalcDMAMUXChannelBaseAndMask+0xc6>
      stream_number += 8U;
 8007c8c:	68fb      	ldr	r3, [r7, #12]
 8007c8e:	3308      	adds	r3, #8
 8007c90:	60fb      	str	r3, [r7, #12]
    hdma->DMAmuxChannel = (DMAMUX_Channel_TypeDef *)((uint32_t)(((uint32_t)DMAMUX1_Channel0) + (stream_number * 4U)));
 8007c92:	68fa      	ldr	r2, [r7, #12]
 8007c94:	4b18      	ldr	r3, [pc, #96]	@ (8007cf8 <DMA_CalcDMAMUXChannelBaseAndMask+0x12c>)
 8007c96:	4413      	add	r3, r2
 8007c98:	009b      	lsls	r3, r3, #2
 8007c9a:	461a      	mov	r2, r3
 8007c9c:	687b      	ldr	r3, [r7, #4]
 8007c9e:	661a      	str	r2, [r3, #96]	@ 0x60
    hdma->DMAmuxChannelStatus = DMAMUX1_ChannelStatus;
 8007ca0:	687b      	ldr	r3, [r7, #4]
 8007ca2:	4a16      	ldr	r2, [pc, #88]	@ (8007cfc <DMA_CalcDMAMUXChannelBaseAndMask+0x130>)
 8007ca4:	665a      	str	r2, [r3, #100]	@ 0x64
    hdma->DMAmuxChannelStatusMask = 1UL << (stream_number & 0x1FU);
 8007ca6:	68fb      	ldr	r3, [r7, #12]
 8007ca8:	f003 031f 	and.w	r3, r3, #31
 8007cac:	2201      	movs	r2, #1
 8007cae:	409a      	lsls	r2, r3
 8007cb0:	687b      	ldr	r3, [r7, #4]
 8007cb2:	669a      	str	r2, [r3, #104]	@ 0x68
}
 8007cb4:	bf00      	nop
 8007cb6:	3714      	adds	r7, #20
 8007cb8:	46bd      	mov	sp, r7
 8007cba:	f85d 7b04 	ldr.w	r7, [sp], #4
 8007cbe:	4770      	bx	lr
 8007cc0:	58025408 	.word	0x58025408
 8007cc4:	5802541c 	.word	0x5802541c
 8007cc8:	58025430 	.word	0x58025430
 8007ccc:	58025444 	.word	0x58025444
 8007cd0:	58025458 	.word	0x58025458
 8007cd4:	5802546c 	.word	0x5802546c
 8007cd8:	58025480 	.word	0x58025480
 8007cdc:	58025494 	.word	0x58025494
 8007ce0:	cccccccd 	.word	0xcccccccd
 8007ce4:	16009600 	.word	0x16009600
 8007ce8:	58025880 	.word	0x58025880
 8007cec:	aaaaaaab 	.word	0xaaaaaaab
 8007cf0:	400204b8 	.word	0x400204b8
 8007cf4:	4002040f 	.word	0x4002040f
 8007cf8:	10008200 	.word	0x10008200
 8007cfc:	40020880 	.word	0x40020880

08007d00 <DMA_CalcDMAMUXRequestGenBaseAndMask>:
  * @param  hdma:       pointer to a DMA_HandleTypeDef structure that contains
  *                     the configuration information for the specified DMA Stream.
  * @retval HAL status
  */
static void DMA_CalcDMAMUXRequestGenBaseAndMask(DMA_HandleTypeDef *hdma)
{
 8007d00:	b480      	push	{r7}
 8007d02:	b085      	sub	sp, #20
 8007d04:	af00      	add	r7, sp, #0
 8007d06:	6078      	str	r0, [r7, #4]
  uint32_t request =  hdma->Init.Request & DMAMUX_CxCR_DMAREQ_ID;
 8007d08:	687b      	ldr	r3, [r7, #4]
 8007d0a:	685b      	ldr	r3, [r3, #4]
 8007d0c:	b2db      	uxtb	r3, r3
 8007d0e:	60fb      	str	r3, [r7, #12]

  if((request >= DMA_REQUEST_GENERATOR0) && (request <= DMA_REQUEST_GENERATOR7))
 8007d10:	68fb      	ldr	r3, [r7, #12]
 8007d12:	2b00      	cmp	r3, #0
 8007d14:	d04a      	beq.n	8007dac <DMA_CalcDMAMUXRequestGenBaseAndMask+0xac>
 8007d16:	68fb      	ldr	r3, [r7, #12]
 8007d18:	2b08      	cmp	r3, #8
 8007d1a:	d847      	bhi.n	8007dac <DMA_CalcDMAMUXRequestGenBaseAndMask+0xac>
  {
    if(IS_BDMA_CHANNEL_DMAMUX_INSTANCE(hdma->Instance) != 0U)
 8007d1c:	687b      	ldr	r3, [r7, #4]
 8007d1e:	681b      	ldr	r3, [r3, #0]
 8007d20:	4a25      	ldr	r2, [pc, #148]	@ (8007db8 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xb8>)
 8007d22:	4293      	cmp	r3, r2
 8007d24:	d022      	beq.n	8007d6c <DMA_CalcDMAMUXRequestGenBaseAndMask+0x6c>
 8007d26:	687b      	ldr	r3, [r7, #4]
 8007d28:	681b      	ldr	r3, [r3, #0]
 8007d2a:	4a24      	ldr	r2, [pc, #144]	@ (8007dbc <DMA_CalcDMAMUXRequestGenBaseAndMask+0xbc>)
 8007d2c:	4293      	cmp	r3, r2
 8007d2e:	d01d      	beq.n	8007d6c <DMA_CalcDMAMUXRequestGenBaseAndMask+0x6c>
 8007d30:	687b      	ldr	r3, [r7, #4]
 8007d32:	681b      	ldr	r3, [r3, #0]
 8007d34:	4a22      	ldr	r2, [pc, #136]	@ (8007dc0 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xc0>)
 8007d36:	4293      	cmp	r3, r2
 8007d38:	d018      	beq.n	8007d6c <DMA_CalcDMAMUXRequestGenBaseAndMask+0x6c>
 8007d3a:	687b      	ldr	r3, [r7, #4]
 8007d3c:	681b      	ldr	r3, [r3, #0]
 8007d3e:	4a21      	ldr	r2, [pc, #132]	@ (8007dc4 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xc4>)
 8007d40:	4293      	cmp	r3, r2
 8007d42:	d013      	beq.n	8007d6c <DMA_CalcDMAMUXRequestGenBaseAndMask+0x6c>
 8007d44:	687b      	ldr	r3, [r7, #4]
 8007d46:	681b      	ldr	r3, [r3, #0]
 8007d48:	4a1f      	ldr	r2, [pc, #124]	@ (8007dc8 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xc8>)
 8007d4a:	4293      	cmp	r3, r2
 8007d4c:	d00e      	beq.n	8007d6c <DMA_CalcDMAMUXRequestGenBaseAndMask+0x6c>
 8007d4e:	687b      	ldr	r3, [r7, #4]
 8007d50:	681b      	ldr	r3, [r3, #0]
 8007d52:	4a1e      	ldr	r2, [pc, #120]	@ (8007dcc <DMA_CalcDMAMUXRequestGenBaseAndMask+0xcc>)
 8007d54:	4293      	cmp	r3, r2
 8007d56:	d009      	beq.n	8007d6c <DMA_CalcDMAMUXRequestGenBaseAndMask+0x6c>
 8007d58:	687b      	ldr	r3, [r7, #4]
 8007d5a:	681b      	ldr	r3, [r3, #0]
 8007d5c:	4a1c      	ldr	r2, [pc, #112]	@ (8007dd0 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xd0>)
 8007d5e:	4293      	cmp	r3, r2
 8007d60:	d004      	beq.n	8007d6c <DMA_CalcDMAMUXRequestGenBaseAndMask+0x6c>
 8007d62:	687b      	ldr	r3, [r7, #4]
 8007d64:	681b      	ldr	r3, [r3, #0]
 8007d66:	4a1b      	ldr	r2, [pc, #108]	@ (8007dd4 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xd4>)
 8007d68:	4293      	cmp	r3, r2
 8007d6a:	d101      	bne.n	8007d70 <DMA_CalcDMAMUXRequestGenBaseAndMask+0x70>
 8007d6c:	2301      	movs	r3, #1
 8007d6e:	e000      	b.n	8007d72 <DMA_CalcDMAMUXRequestGenBaseAndMask+0x72>
 8007d70:	2300      	movs	r3, #0
 8007d72:	2b00      	cmp	r3, #0
 8007d74:	d00a      	beq.n	8007d8c <DMA_CalcDMAMUXRequestGenBaseAndMask+0x8c>
    {
      /* BDMA Channels are connected to DMAMUX2 request generator blocks */
      hdma->DMAmuxRequestGen = (DMAMUX_RequestGen_TypeDef *)((uint32_t)(((uint32_t)DMAMUX2_RequestGenerator0) + ((request - 1U) * 4U)));
 8007d76:	68fa      	ldr	r2, [r7, #12]
 8007d78:	4b17      	ldr	r3, [pc, #92]	@ (8007dd8 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xd8>)
 8007d7a:	4413      	add	r3, r2
 8007d7c:	009b      	lsls	r3, r3, #2
 8007d7e:	461a      	mov	r2, r3
 8007d80:	687b      	ldr	r3, [r7, #4]
 8007d82:	66da      	str	r2, [r3, #108]	@ 0x6c

      hdma->DMAmuxRequestGenStatus = DMAMUX2_RequestGenStatus;
 8007d84:	687b      	ldr	r3, [r7, #4]
 8007d86:	4a15      	ldr	r2, [pc, #84]	@ (8007ddc <DMA_CalcDMAMUXRequestGenBaseAndMask+0xdc>)
 8007d88:	671a      	str	r2, [r3, #112]	@ 0x70
 8007d8a:	e009      	b.n	8007da0 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xa0>
    }
    else
    {
      /* DMA1 and DMA2 Streams use DMAMUX1 request generator blocks */
      hdma->DMAmuxRequestGen = (DMAMUX_RequestGen_TypeDef *)((uint32_t)(((uint32_t)DMAMUX1_RequestGenerator0) + ((request - 1U) * 4U)));
 8007d8c:	68fa      	ldr	r2, [r7, #12]
 8007d8e:	4b14      	ldr	r3, [pc, #80]	@ (8007de0 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xe0>)
 8007d90:	4413      	add	r3, r2
 8007d92:	009b      	lsls	r3, r3, #2
 8007d94:	461a      	mov	r2, r3
 8007d96:	687b      	ldr	r3, [r7, #4]
 8007d98:	66da      	str	r2, [r3, #108]	@ 0x6c

      hdma->DMAmuxRequestGenStatus = DMAMUX1_RequestGenStatus;
 8007d9a:	687b      	ldr	r3, [r7, #4]
 8007d9c:	4a11      	ldr	r2, [pc, #68]	@ (8007de4 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xe4>)
 8007d9e:	671a      	str	r2, [r3, #112]	@ 0x70
    }

    hdma->DMAmuxRequestGenStatusMask = 1UL << (request - 1U);
 8007da0:	68fb      	ldr	r3, [r7, #12]
 8007da2:	3b01      	subs	r3, #1
 8007da4:	2201      	movs	r2, #1
 8007da6:	409a      	lsls	r2, r3
 8007da8:	687b      	ldr	r3, [r7, #4]
 8007daa:	675a      	str	r2, [r3, #116]	@ 0x74
  }
}
 8007dac:	bf00      	nop
 8007dae:	3714      	adds	r7, #20
 8007db0:	46bd      	mov	sp, r7
 8007db2:	f85d 7b04 	ldr.w	r7, [sp], #4
 8007db6:	4770      	bx	lr
 8007db8:	58025408 	.word	0x58025408
 8007dbc:	5802541c 	.word	0x5802541c
 8007dc0:	58025430 	.word	0x58025430
 8007dc4:	58025444 	.word	0x58025444
 8007dc8:	58025458 	.word	0x58025458
 8007dcc:	5802546c 	.word	0x5802546c
 8007dd0:	58025480 	.word	0x58025480
 8007dd4:	58025494 	.word	0x58025494
 8007dd8:	1600963f 	.word	0x1600963f
 8007ddc:	58025940 	.word	0x58025940
 8007de0:	1000823f 	.word	0x1000823f
 8007de4:	40020940 	.word	0x40020940

08007de8 <HAL_ETH_Init>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_ETH_Init(ETH_HandleTypeDef *heth)
{
 8007de8:	b580      	push	{r7, lr}
 8007dea:	b084      	sub	sp, #16
 8007dec:	af00      	add	r7, sp, #0
 8007dee:	6078      	str	r0, [r7, #4]
  uint32_t tickstart;

  if (heth == NULL)
 8007df0:	687b      	ldr	r3, [r7, #4]
 8007df2:	2b00      	cmp	r3, #0
 8007df4:	d101      	bne.n	8007dfa <HAL_ETH_Init+0x12>
  {
    return HAL_ERROR;
 8007df6:	2301      	movs	r3, #1
 8007df8:	e0e3      	b.n	8007fc2 <HAL_ETH_Init+0x1da>
  }
  if (heth->gState == HAL_ETH_STATE_RESET)
 8007dfa:	687b      	ldr	r3, [r7, #4]
 8007dfc:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 8007e00:	2b00      	cmp	r3, #0
 8007e02:	d106      	bne.n	8007e12 <HAL_ETH_Init+0x2a>
  {
    heth->gState = HAL_ETH_STATE_BUSY;
 8007e04:	687b      	ldr	r3, [r7, #4]
 8007e06:	2223      	movs	r2, #35	@ 0x23
 8007e08:	f8c3 2084 	str.w	r2, [r3, #132]	@ 0x84

    /* Init the low level hardware */
    heth->MspInitCallback(heth);
#else
    /* Init the low level hardware : GPIO, CLOCK, NVIC. */
    HAL_ETH_MspInit(heth);
 8007e0c:	6878      	ldr	r0, [r7, #4]
 8007e0e:	f008 fba1 	bl	8010554 <HAL_ETH_MspInit>

#endif /* (USE_HAL_ETH_REGISTER_CALLBACKS) */
  }

  __HAL_RCC_SYSCFG_CLK_ENABLE();
 8007e12:	4b6e      	ldr	r3, [pc, #440]	@ (8007fcc <HAL_ETH_Init+0x1e4>)
 8007e14:	f8d3 30f4 	ldr.w	r3, [r3, #244]	@ 0xf4
 8007e18:	4a6c      	ldr	r2, [pc, #432]	@ (8007fcc <HAL_ETH_Init+0x1e4>)
 8007e1a:	f043 0302 	orr.w	r3, r3, #2
 8007e1e:	f8c2 30f4 	str.w	r3, [r2, #244]	@ 0xf4
 8007e22:	4b6a      	ldr	r3, [pc, #424]	@ (8007fcc <HAL_ETH_Init+0x1e4>)
 8007e24:	f8d3 30f4 	ldr.w	r3, [r3, #244]	@ 0xf4
 8007e28:	f003 0302 	and.w	r3, r3, #2
 8007e2c:	60bb      	str	r3, [r7, #8]
 8007e2e:	68bb      	ldr	r3, [r7, #8]

  if (heth->Init.MediaInterface == HAL_ETH_MII_MODE)
 8007e30:	687b      	ldr	r3, [r7, #4]
 8007e32:	7a1b      	ldrb	r3, [r3, #8]
 8007e34:	2b00      	cmp	r3, #0
 8007e36:	d103      	bne.n	8007e40 <HAL_ETH_Init+0x58>
  {
    HAL_SYSCFG_ETHInterfaceSelect(SYSCFG_ETH_MII);
 8007e38:	2000      	movs	r0, #0
 8007e3a:	f7fd fa3d 	bl	80052b8 <HAL_SYSCFG_ETHInterfaceSelect>
 8007e3e:	e003      	b.n	8007e48 <HAL_ETH_Init+0x60>
  }
  else
  {
    HAL_SYSCFG_ETHInterfaceSelect(SYSCFG_ETH_RMII);
 8007e40:	f44f 0000 	mov.w	r0, #8388608	@ 0x800000
 8007e44:	f7fd fa38 	bl	80052b8 <HAL_SYSCFG_ETHInterfaceSelect>
  }

  /* Dummy read to sync with ETH */
  (void)SYSCFG->PMCR;
 8007e48:	4b61      	ldr	r3, [pc, #388]	@ (8007fd0 <HAL_ETH_Init+0x1e8>)
 8007e4a:	685b      	ldr	r3, [r3, #4]

  /* Ethernet Software reset */
  /* Set the SWR bit: resets all MAC subsystem internal registers and logic */
  /* After reset all the registers holds their respective reset values */
  SET_BIT(heth->Instance->DMAMR, ETH_DMAMR_SWR);
 8007e4c:	687b      	ldr	r3, [r7, #4]
 8007e4e:	681b      	ldr	r3, [r3, #0]
 8007e50:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8007e54:	681b      	ldr	r3, [r3, #0]
 8007e56:	687a      	ldr	r2, [r7, #4]
 8007e58:	6812      	ldr	r2, [r2, #0]
 8007e5a:	f043 0301 	orr.w	r3, r3, #1
 8007e5e:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 8007e62:	6013      	str	r3, [r2, #0]

  /* Get tick */
  tickstart = HAL_GetTick();
 8007e64:	f7fd f9ec 	bl	8005240 <HAL_GetTick>
 8007e68:	60f8      	str	r0, [r7, #12]

  /* Wait for software reset */
  while (READ_BIT(heth->Instance->DMAMR, ETH_DMAMR_SWR) > 0U)
 8007e6a:	e011      	b.n	8007e90 <HAL_ETH_Init+0xa8>
  {
    if (((HAL_GetTick() - tickstart) > ETH_SWRESET_TIMEOUT))
 8007e6c:	f7fd f9e8 	bl	8005240 <HAL_GetTick>
 8007e70:	4602      	mov	r2, r0
 8007e72:	68fb      	ldr	r3, [r7, #12]
 8007e74:	1ad3      	subs	r3, r2, r3
 8007e76:	f5b3 7ffa 	cmp.w	r3, #500	@ 0x1f4
 8007e7a:	d909      	bls.n	8007e90 <HAL_ETH_Init+0xa8>
    {
      /* Set Error Code */
      heth->ErrorCode = HAL_ETH_ERROR_TIMEOUT;
 8007e7c:	687b      	ldr	r3, [r7, #4]
 8007e7e:	2204      	movs	r2, #4
 8007e80:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88
      /* Set State as Error */
      heth->gState = HAL_ETH_STATE_ERROR;
 8007e84:	687b      	ldr	r3, [r7, #4]
 8007e86:	22e0      	movs	r2, #224	@ 0xe0
 8007e88:	f8c3 2084 	str.w	r2, [r3, #132]	@ 0x84
      /* Return Error */
      return HAL_ERROR;
 8007e8c:	2301      	movs	r3, #1
 8007e8e:	e098      	b.n	8007fc2 <HAL_ETH_Init+0x1da>
  while (READ_BIT(heth->Instance->DMAMR, ETH_DMAMR_SWR) > 0U)
 8007e90:	687b      	ldr	r3, [r7, #4]
 8007e92:	681b      	ldr	r3, [r3, #0]
 8007e94:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8007e98:	681b      	ldr	r3, [r3, #0]
 8007e9a:	f003 0301 	and.w	r3, r3, #1
 8007e9e:	2b00      	cmp	r3, #0
 8007ea0:	d1e4      	bne.n	8007e6c <HAL_ETH_Init+0x84>
    }
  }

  /*------------------ MDIO CSR Clock Range Configuration --------------------*/
  HAL_ETH_SetMDIOClockRange(heth);
 8007ea2:	6878      	ldr	r0, [r7, #4]
 8007ea4:	f000 ff1c 	bl	8008ce0 <HAL_ETH_SetMDIOClockRange>

  /*------------------ MAC LPI 1US Tic Counter Configuration --------------------*/
  WRITE_REG(heth->Instance->MAC1USTCR, (((uint32_t)HAL_RCC_GetHCLKFreq() / ETH_MAC_US_TICK) - 1U));
 8007ea8:	f002 ff98 	bl	800addc <HAL_RCC_GetHCLKFreq>
 8007eac:	4603      	mov	r3, r0
 8007eae:	4a49      	ldr	r2, [pc, #292]	@ (8007fd4 <HAL_ETH_Init+0x1ec>)
 8007eb0:	fba2 2303 	umull	r2, r3, r2, r3
 8007eb4:	0c9a      	lsrs	r2, r3, #18
 8007eb6:	687b      	ldr	r3, [r7, #4]
 8007eb8:	681b      	ldr	r3, [r3, #0]
 8007eba:	3a01      	subs	r2, #1
 8007ebc:	f8c3 20dc 	str.w	r2, [r3, #220]	@ 0xdc

  /*------------------ MAC, MTL and DMA default Configuration ----------------*/
  ETH_MACDMAConfig(heth);
 8007ec0:	6878      	ldr	r0, [r7, #4]
 8007ec2:	f001 f90d 	bl	80090e0 <ETH_MACDMAConfig>

  /* SET DSL to 64 bit */
  MODIFY_REG(heth->Instance->DMACCR, ETH_DMACCR_DSL, ETH_DMACCR_DSL_64BIT);
 8007ec6:	687b      	ldr	r3, [r7, #4]
 8007ec8:	681b      	ldr	r3, [r3, #0]
 8007eca:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8007ece:	f8d3 3100 	ldr.w	r3, [r3, #256]	@ 0x100
 8007ed2:	f423 13e0 	bic.w	r3, r3, #1835008	@ 0x1c0000
 8007ed6:	687a      	ldr	r2, [r7, #4]
 8007ed8:	6812      	ldr	r2, [r2, #0]
 8007eda:	f443 2300 	orr.w	r3, r3, #524288	@ 0x80000
 8007ede:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 8007ee2:	f8c2 3100 	str.w	r3, [r2, #256]	@ 0x100

  /* Set Receive Buffers Length (must be a multiple of 4) */
  if ((heth->Init.RxBuffLen % 0x4U) != 0x0U)
 8007ee6:	687b      	ldr	r3, [r7, #4]
 8007ee8:	695b      	ldr	r3, [r3, #20]
 8007eea:	f003 0303 	and.w	r3, r3, #3
 8007eee:	2b00      	cmp	r3, #0
 8007ef0:	d009      	beq.n	8007f06 <HAL_ETH_Init+0x11e>
  {
    /* Set Error Code */
    heth->ErrorCode = HAL_ETH_ERROR_PARAM;
 8007ef2:	687b      	ldr	r3, [r7, #4]
 8007ef4:	2201      	movs	r2, #1
 8007ef6:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88
    /* Set State as Error */
    heth->gState = HAL_ETH_STATE_ERROR;
 8007efa:	687b      	ldr	r3, [r7, #4]
 8007efc:	22e0      	movs	r2, #224	@ 0xe0
 8007efe:	f8c3 2084 	str.w	r2, [r3, #132]	@ 0x84
    /* Return Error */
    return HAL_ERROR;
 8007f02:	2301      	movs	r3, #1
 8007f04:	e05d      	b.n	8007fc2 <HAL_ETH_Init+0x1da>
  }
  else
  {
    MODIFY_REG(heth->Instance->DMACRCR, ETH_DMACRCR_RBSZ, ((heth->Init.RxBuffLen) << 1));
 8007f06:	687b      	ldr	r3, [r7, #4]
 8007f08:	681b      	ldr	r3, [r3, #0]
 8007f0a:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8007f0e:	f8d3 2108 	ldr.w	r2, [r3, #264]	@ 0x108
 8007f12:	4b31      	ldr	r3, [pc, #196]	@ (8007fd8 <HAL_ETH_Init+0x1f0>)
 8007f14:	4013      	ands	r3, r2
 8007f16:	687a      	ldr	r2, [r7, #4]
 8007f18:	6952      	ldr	r2, [r2, #20]
 8007f1a:	0051      	lsls	r1, r2, #1
 8007f1c:	687a      	ldr	r2, [r7, #4]
 8007f1e:	6812      	ldr	r2, [r2, #0]
 8007f20:	430b      	orrs	r3, r1
 8007f22:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 8007f26:	f8c2 3108 	str.w	r3, [r2, #264]	@ 0x108
  }

  /*------------------ DMA Tx Descriptors Configuration ----------------------*/
  ETH_DMATxDescListInit(heth);
 8007f2a:	6878      	ldr	r0, [r7, #4]
 8007f2c:	f001 f975 	bl	800921a <ETH_DMATxDescListInit>

  /*------------------ DMA Rx Descriptors Configuration ----------------------*/
  ETH_DMARxDescListInit(heth);
 8007f30:	6878      	ldr	r0, [r7, #4]
 8007f32:	f001 f9bb 	bl	80092ac <ETH_DMARxDescListInit>

  /*--------------------- ETHERNET MAC Address Configuration ------------------*/
  /* Set MAC addr bits 32 to 47 */
  heth->Instance->MACA0HR = (((uint32_t)(heth->Init.MACAddr[5]) << 8) | (uint32_t)heth->Init.MACAddr[4]);
 8007f36:	687b      	ldr	r3, [r7, #4]
 8007f38:	685b      	ldr	r3, [r3, #4]
 8007f3a:	3305      	adds	r3, #5
 8007f3c:	781b      	ldrb	r3, [r3, #0]
 8007f3e:	021a      	lsls	r2, r3, #8
 8007f40:	687b      	ldr	r3, [r7, #4]
 8007f42:	685b      	ldr	r3, [r3, #4]
 8007f44:	3304      	adds	r3, #4
 8007f46:	781b      	ldrb	r3, [r3, #0]
 8007f48:	4619      	mov	r1, r3
 8007f4a:	687b      	ldr	r3, [r7, #4]
 8007f4c:	681b      	ldr	r3, [r3, #0]
 8007f4e:	430a      	orrs	r2, r1
 8007f50:	f8c3 2300 	str.w	r2, [r3, #768]	@ 0x300
  /* Set MAC addr bits 0 to 31 */
  heth->Instance->MACA0LR = (((uint32_t)(heth->Init.MACAddr[3]) << 24) | ((uint32_t)(heth->Init.MACAddr[2]) << 16) |
 8007f54:	687b      	ldr	r3, [r7, #4]
 8007f56:	685b      	ldr	r3, [r3, #4]
 8007f58:	3303      	adds	r3, #3
 8007f5a:	781b      	ldrb	r3, [r3, #0]
 8007f5c:	061a      	lsls	r2, r3, #24
 8007f5e:	687b      	ldr	r3, [r7, #4]
 8007f60:	685b      	ldr	r3, [r3, #4]
 8007f62:	3302      	adds	r3, #2
 8007f64:	781b      	ldrb	r3, [r3, #0]
 8007f66:	041b      	lsls	r3, r3, #16
 8007f68:	431a      	orrs	r2, r3
                             ((uint32_t)(heth->Init.MACAddr[1]) << 8) | (uint32_t)heth->Init.MACAddr[0]);
 8007f6a:	687b      	ldr	r3, [r7, #4]
 8007f6c:	685b      	ldr	r3, [r3, #4]
 8007f6e:	3301      	adds	r3, #1
 8007f70:	781b      	ldrb	r3, [r3, #0]
 8007f72:	021b      	lsls	r3, r3, #8
  heth->Instance->MACA0LR = (((uint32_t)(heth->Init.MACAddr[3]) << 24) | ((uint32_t)(heth->Init.MACAddr[2]) << 16) |
 8007f74:	431a      	orrs	r2, r3
                             ((uint32_t)(heth->Init.MACAddr[1]) << 8) | (uint32_t)heth->Init.MACAddr[0]);
 8007f76:	687b      	ldr	r3, [r7, #4]
 8007f78:	685b      	ldr	r3, [r3, #4]
 8007f7a:	781b      	ldrb	r3, [r3, #0]
 8007f7c:	4619      	mov	r1, r3
  heth->Instance->MACA0LR = (((uint32_t)(heth->Init.MACAddr[3]) << 24) | ((uint32_t)(heth->Init.MACAddr[2]) << 16) |
 8007f7e:	687b      	ldr	r3, [r7, #4]
 8007f80:	681b      	ldr	r3, [r3, #0]
                             ((uint32_t)(heth->Init.MACAddr[1]) << 8) | (uint32_t)heth->Init.MACAddr[0]);
 8007f82:	430a      	orrs	r2, r1
  heth->Instance->MACA0LR = (((uint32_t)(heth->Init.MACAddr[3]) << 24) | ((uint32_t)(heth->Init.MACAddr[2]) << 16) |
 8007f84:	f8c3 2304 	str.w	r2, [r3, #772]	@ 0x304

  /* Disable Rx MMC Interrupts */
  SET_BIT(heth->Instance->MMCRIMR, ETH_MMCRIMR_RXLPITRCIM | ETH_MMCRIMR_RXLPIUSCIM | \
 8007f88:	687b      	ldr	r3, [r7, #4]
 8007f8a:	681b      	ldr	r3, [r3, #0]
 8007f8c:	f8d3 170c 	ldr.w	r1, [r3, #1804]	@ 0x70c
 8007f90:	687b      	ldr	r3, [r7, #4]
 8007f92:	681a      	ldr	r2, [r3, #0]
 8007f94:	4b11      	ldr	r3, [pc, #68]	@ (8007fdc <HAL_ETH_Init+0x1f4>)
 8007f96:	430b      	orrs	r3, r1
 8007f98:	f8c2 370c 	str.w	r3, [r2, #1804]	@ 0x70c
          ETH_MMCRIMR_RXUCGPIM | ETH_MMCRIMR_RXALGNERPIM | ETH_MMCRIMR_RXCRCERPIM);

  /* Disable Tx MMC Interrupts */
  SET_BIT(heth->Instance->MMCTIMR, ETH_MMCTIMR_TXLPITRCIM | ETH_MMCTIMR_TXLPIUSCIM | \
 8007f9c:	687b      	ldr	r3, [r7, #4]
 8007f9e:	681b      	ldr	r3, [r3, #0]
 8007fa0:	f8d3 1710 	ldr.w	r1, [r3, #1808]	@ 0x710
 8007fa4:	687b      	ldr	r3, [r7, #4]
 8007fa6:	681a      	ldr	r2, [r3, #0]
 8007fa8:	4b0d      	ldr	r3, [pc, #52]	@ (8007fe0 <HAL_ETH_Init+0x1f8>)
 8007faa:	430b      	orrs	r3, r1
 8007fac:	f8c2 3710 	str.w	r3, [r2, #1808]	@ 0x710
          ETH_MMCTIMR_TXGPKTIM | ETH_MMCTIMR_TXMCOLGPIM | ETH_MMCTIMR_TXSCOLGPIM);

  heth->ErrorCode = HAL_ETH_ERROR_NONE;
 8007fb0:	687b      	ldr	r3, [r7, #4]
 8007fb2:	2200      	movs	r2, #0
 8007fb4:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88
  heth->gState = HAL_ETH_STATE_READY;
 8007fb8:	687b      	ldr	r3, [r7, #4]
 8007fba:	2210      	movs	r2, #16
 8007fbc:	f8c3 2084 	str.w	r2, [r3, #132]	@ 0x84

  return HAL_OK;
 8007fc0:	2300      	movs	r3, #0
}
 8007fc2:	4618      	mov	r0, r3
 8007fc4:	3710      	adds	r7, #16
 8007fc6:	46bd      	mov	sp, r7
 8007fc8:	bd80      	pop	{r7, pc}
 8007fca:	bf00      	nop
 8007fcc:	58024400 	.word	0x58024400
 8007fd0:	58000400 	.word	0x58000400
 8007fd4:	431bde83 	.word	0x431bde83
 8007fd8:	ffff8001 	.word	0xffff8001
 8007fdc:	0c020060 	.word	0x0c020060
 8007fe0:	0c20c000 	.word	0x0c20c000

08007fe4 <HAL_ETH_Start_IT>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_ETH_Start_IT(ETH_HandleTypeDef *heth)
{
 8007fe4:	b580      	push	{r7, lr}
 8007fe6:	b082      	sub	sp, #8
 8007fe8:	af00      	add	r7, sp, #0
 8007fea:	6078      	str	r0, [r7, #4]
  if (heth->gState == HAL_ETH_STATE_READY)
 8007fec:	687b      	ldr	r3, [r7, #4]
 8007fee:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 8007ff2:	2b10      	cmp	r3, #16
 8007ff4:	d165      	bne.n	80080c2 <HAL_ETH_Start_IT+0xde>
  {
    heth->gState = HAL_ETH_STATE_BUSY;
 8007ff6:	687b      	ldr	r3, [r7, #4]
 8007ff8:	2223      	movs	r2, #35	@ 0x23
 8007ffa:	f8c3 2084 	str.w	r2, [r3, #132]	@ 0x84

    /* save IT mode to ETH Handle */
    heth->RxDescList.ItMode = 1U;
 8007ffe:	687b      	ldr	r3, [r7, #4]
 8008000:	2201      	movs	r2, #1
 8008002:	659a      	str	r2, [r3, #88]	@ 0x58

    /* Set number of descriptors to build */
    heth->RxDescList.RxBuildDescCnt = ETH_RX_DESC_CNT;
 8008004:	687b      	ldr	r3, [r7, #4]
 8008006:	2204      	movs	r2, #4
 8008008:	66da      	str	r2, [r3, #108]	@ 0x6c

    /* Build all descriptors */
    ETH_UpdateDescriptor(heth);
 800800a:	6878      	ldr	r0, [r7, #4]
 800800c:	f000 f9e4 	bl	80083d8 <ETH_UpdateDescriptor>

    /* Enable the DMA transmission */
    SET_BIT(heth->Instance->DMACTCR, ETH_DMACTCR_ST);
 8008010:	687b      	ldr	r3, [r7, #4]
 8008012:	681b      	ldr	r3, [r3, #0]
 8008014:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8008018:	f8d3 3104 	ldr.w	r3, [r3, #260]	@ 0x104
 800801c:	687a      	ldr	r2, [r7, #4]
 800801e:	6812      	ldr	r2, [r2, #0]
 8008020:	f043 0301 	orr.w	r3, r3, #1
 8008024:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 8008028:	f8c2 3104 	str.w	r3, [r2, #260]	@ 0x104

    /* Enable the DMA reception */
    SET_BIT(heth->Instance->DMACRCR, ETH_DMACRCR_SR);
 800802c:	687b      	ldr	r3, [r7, #4]
 800802e:	681b      	ldr	r3, [r3, #0]
 8008030:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8008034:	f8d3 3108 	ldr.w	r3, [r3, #264]	@ 0x108
 8008038:	687a      	ldr	r2, [r7, #4]
 800803a:	6812      	ldr	r2, [r2, #0]
 800803c:	f043 0301 	orr.w	r3, r3, #1
 8008040:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 8008044:	f8c2 3108 	str.w	r3, [r2, #264]	@ 0x108

    /* Clear Tx and Rx process stopped flags */
    heth->Instance->DMACSR |= (ETH_DMACSR_TPS | ETH_DMACSR_RPS);
 8008048:	687b      	ldr	r3, [r7, #4]
 800804a:	681b      	ldr	r3, [r3, #0]
 800804c:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8008050:	f8d3 3160 	ldr.w	r3, [r3, #352]	@ 0x160
 8008054:	687a      	ldr	r2, [r7, #4]
 8008056:	6812      	ldr	r2, [r2, #0]
 8008058:	f443 7381 	orr.w	r3, r3, #258	@ 0x102
 800805c:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 8008060:	f8c2 3160 	str.w	r3, [r2, #352]	@ 0x160

    /* Set the Flush Transmit FIFO bit */
    SET_BIT(heth->Instance->MTLTQOMR, ETH_MTLTQOMR_FTQ);
 8008064:	687b      	ldr	r3, [r7, #4]
 8008066:	681b      	ldr	r3, [r3, #0]
 8008068:	f8d3 2d00 	ldr.w	r2, [r3, #3328]	@ 0xd00
 800806c:	687b      	ldr	r3, [r7, #4]
 800806e:	681b      	ldr	r3, [r3, #0]
 8008070:	f042 0201 	orr.w	r2, r2, #1
 8008074:	f8c3 2d00 	str.w	r2, [r3, #3328]	@ 0xd00

    /* Enable the MAC transmission */
    SET_BIT(heth->Instance->MACCR, ETH_MACCR_TE);
 8008078:	687b      	ldr	r3, [r7, #4]
 800807a:	681b      	ldr	r3, [r3, #0]
 800807c:	681a      	ldr	r2, [r3, #0]
 800807e:	687b      	ldr	r3, [r7, #4]
 8008080:	681b      	ldr	r3, [r3, #0]
 8008082:	f042 0202 	orr.w	r2, r2, #2
 8008086:	601a      	str	r2, [r3, #0]

    /* Enable the MAC reception */
    SET_BIT(heth->Instance->MACCR, ETH_MACCR_RE);
 8008088:	687b      	ldr	r3, [r7, #4]
 800808a:	681b      	ldr	r3, [r3, #0]
 800808c:	681a      	ldr	r2, [r3, #0]
 800808e:	687b      	ldr	r3, [r7, #4]
 8008090:	681b      	ldr	r3, [r3, #0]
 8008092:	f042 0201 	orr.w	r2, r2, #1
 8008096:	601a      	str	r2, [r3, #0]
    /* Enable ETH DMA interrupts:
    - Tx complete interrupt
    - Rx complete interrupt
    - Fatal bus interrupt
    */
    __HAL_ETH_DMA_ENABLE_IT(heth, (ETH_DMACIER_NIE | ETH_DMACIER_RIE | ETH_DMACIER_TIE  |
 8008098:	687b      	ldr	r3, [r7, #4]
 800809a:	681b      	ldr	r3, [r3, #0]
 800809c:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 80080a0:	f8d3 1134 	ldr.w	r1, [r3, #308]	@ 0x134
 80080a4:	687b      	ldr	r3, [r7, #4]
 80080a6:	681a      	ldr	r2, [r3, #0]
 80080a8:	f24d 03c1 	movw	r3, #53441	@ 0xd0c1
 80080ac:	430b      	orrs	r3, r1
 80080ae:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 80080b2:	f8c2 3134 	str.w	r3, [r2, #308]	@ 0x134
                                   ETH_DMACIER_FBEE | ETH_DMACIER_AIE | ETH_DMACIER_RBUE));

    heth->gState = HAL_ETH_STATE_STARTED;
 80080b6:	687b      	ldr	r3, [r7, #4]
 80080b8:	2223      	movs	r2, #35	@ 0x23
 80080ba:	f8c3 2084 	str.w	r2, [r3, #132]	@ 0x84
    return HAL_OK;
 80080be:	2300      	movs	r3, #0
 80080c0:	e000      	b.n	80080c4 <HAL_ETH_Start_IT+0xe0>
  }
  else
  {
    return HAL_ERROR;
 80080c2:	2301      	movs	r3, #1
  }
}
 80080c4:	4618      	mov	r0, r3
 80080c6:	3708      	adds	r7, #8
 80080c8:	46bd      	mov	sp, r7
 80080ca:	bd80      	pop	{r7, pc}

080080cc <HAL_ETH_Stop_IT>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_ETH_Stop_IT(ETH_HandleTypeDef *heth)
{
 80080cc:	b480      	push	{r7}
 80080ce:	b085      	sub	sp, #20
 80080d0:	af00      	add	r7, sp, #0
 80080d2:	6078      	str	r0, [r7, #4]
  ETH_DMADescTypeDef *dmarxdesc;
  uint32_t descindex;

  if (heth->gState == HAL_ETH_STATE_STARTED)
 80080d4:	687b      	ldr	r3, [r7, #4]
 80080d6:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 80080da:	2b23      	cmp	r3, #35	@ 0x23
 80080dc:	d165      	bne.n	80081aa <HAL_ETH_Stop_IT+0xde>
  {
    /* Set the ETH peripheral state to BUSY */
    heth->gState = HAL_ETH_STATE_BUSY;
 80080de:	687b      	ldr	r3, [r7, #4]
 80080e0:	2223      	movs	r2, #35	@ 0x23
 80080e2:	f8c3 2084 	str.w	r2, [r3, #132]	@ 0x84
    /* Disable interrupts:
    - Tx complete interrupt
    - Rx complete interrupt
    - Fatal bus interrupt
    */
    __HAL_ETH_DMA_DISABLE_IT(heth, (ETH_DMACIER_NIE | ETH_DMACIER_RIE | ETH_DMACIER_TIE  |
 80080e6:	687b      	ldr	r3, [r7, #4]
 80080e8:	681b      	ldr	r3, [r3, #0]
 80080ea:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 80080ee:	f8d3 1134 	ldr.w	r1, [r3, #308]	@ 0x134
 80080f2:	687b      	ldr	r3, [r7, #4]
 80080f4:	681a      	ldr	r2, [r3, #0]
 80080f6:	4b30      	ldr	r3, [pc, #192]	@ (80081b8 <HAL_ETH_Stop_IT+0xec>)
 80080f8:	400b      	ands	r3, r1
 80080fa:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 80080fe:	f8c2 3134 	str.w	r3, [r2, #308]	@ 0x134
                                    ETH_DMACIER_FBEE | ETH_DMACIER_AIE | ETH_DMACIER_RBUE));

    /* Disable the DMA transmission */
    CLEAR_BIT(heth->Instance->DMACTCR, ETH_DMACTCR_ST);
 8008102:	687b      	ldr	r3, [r7, #4]
 8008104:	681b      	ldr	r3, [r3, #0]
 8008106:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 800810a:	f8d3 3104 	ldr.w	r3, [r3, #260]	@ 0x104
 800810e:	687a      	ldr	r2, [r7, #4]
 8008110:	6812      	ldr	r2, [r2, #0]
 8008112:	f023 0301 	bic.w	r3, r3, #1
 8008116:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 800811a:	f8c2 3104 	str.w	r3, [r2, #260]	@ 0x104

    /* Disable the DMA reception */
    CLEAR_BIT(heth->Instance->DMACRCR, ETH_DMACRCR_SR);
 800811e:	687b      	ldr	r3, [r7, #4]
 8008120:	681b      	ldr	r3, [r3, #0]
 8008122:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8008126:	f8d3 3108 	ldr.w	r3, [r3, #264]	@ 0x108
 800812a:	687a      	ldr	r2, [r7, #4]
 800812c:	6812      	ldr	r2, [r2, #0]
 800812e:	f023 0301 	bic.w	r3, r3, #1
 8008132:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 8008136:	f8c2 3108 	str.w	r3, [r2, #264]	@ 0x108

    /* Disable the MAC reception */
    CLEAR_BIT(heth->Instance->MACCR, ETH_MACCR_RE);
 800813a:	687b      	ldr	r3, [r7, #4]
 800813c:	681b      	ldr	r3, [r3, #0]
 800813e:	681a      	ldr	r2, [r3, #0]
 8008140:	687b      	ldr	r3, [r7, #4]
 8008142:	681b      	ldr	r3, [r3, #0]
 8008144:	f022 0201 	bic.w	r2, r2, #1
 8008148:	601a      	str	r2, [r3, #0]

    /* Set the Flush Transmit FIFO bit */
    SET_BIT(heth->Instance->MTLTQOMR, ETH_MTLTQOMR_FTQ);
 800814a:	687b      	ldr	r3, [r7, #4]
 800814c:	681b      	ldr	r3, [r3, #0]
 800814e:	f8d3 2d00 	ldr.w	r2, [r3, #3328]	@ 0xd00
 8008152:	687b      	ldr	r3, [r7, #4]
 8008154:	681b      	ldr	r3, [r3, #0]
 8008156:	f042 0201 	orr.w	r2, r2, #1
 800815a:	f8c3 2d00 	str.w	r2, [r3, #3328]	@ 0xd00

    /* Disable the MAC transmission */
    CLEAR_BIT(heth->Instance->MACCR, ETH_MACCR_TE);
 800815e:	687b      	ldr	r3, [r7, #4]
 8008160:	681b      	ldr	r3, [r3, #0]
 8008162:	681a      	ldr	r2, [r3, #0]
 8008164:	687b      	ldr	r3, [r7, #4]
 8008166:	681b      	ldr	r3, [r3, #0]
 8008168:	f022 0202 	bic.w	r2, r2, #2
 800816c:	601a      	str	r2, [r3, #0]

    /* Clear IOC bit to all Rx descriptors */
    for (descindex = 0; descindex < (uint32_t)ETH_RX_DESC_CNT; descindex++)
 800816e:	2300      	movs	r3, #0
 8008170:	60fb      	str	r3, [r7, #12]
 8008172:	e00e      	b.n	8008192 <HAL_ETH_Stop_IT+0xc6>
    {
      dmarxdesc = (ETH_DMADescTypeDef *)heth->RxDescList.RxDesc[descindex];
 8008174:	687b      	ldr	r3, [r7, #4]
 8008176:	68fa      	ldr	r2, [r7, #12]
 8008178:	3212      	adds	r2, #18
 800817a:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
 800817e:	60bb      	str	r3, [r7, #8]
      CLEAR_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCRF_IOC);
 8008180:	68bb      	ldr	r3, [r7, #8]
 8008182:	68db      	ldr	r3, [r3, #12]
 8008184:	f023 4280 	bic.w	r2, r3, #1073741824	@ 0x40000000
 8008188:	68bb      	ldr	r3, [r7, #8]
 800818a:	60da      	str	r2, [r3, #12]
    for (descindex = 0; descindex < (uint32_t)ETH_RX_DESC_CNT; descindex++)
 800818c:	68fb      	ldr	r3, [r7, #12]
 800818e:	3301      	adds	r3, #1
 8008190:	60fb      	str	r3, [r7, #12]
 8008192:	68fb      	ldr	r3, [r7, #12]
 8008194:	2b03      	cmp	r3, #3
 8008196:	d9ed      	bls.n	8008174 <HAL_ETH_Stop_IT+0xa8>
    }

    heth->RxDescList.ItMode = 0U;
 8008198:	687b      	ldr	r3, [r7, #4]
 800819a:	2200      	movs	r2, #0
 800819c:	659a      	str	r2, [r3, #88]	@ 0x58

    heth->gState = HAL_ETH_STATE_READY;
 800819e:	687b      	ldr	r3, [r7, #4]
 80081a0:	2210      	movs	r2, #16
 80081a2:	f8c3 2084 	str.w	r2, [r3, #132]	@ 0x84

    /* Return function status */
    return HAL_OK;
 80081a6:	2300      	movs	r3, #0
 80081a8:	e000      	b.n	80081ac <HAL_ETH_Stop_IT+0xe0>
  }
  else
  {
    return HAL_ERROR;
 80081aa:	2301      	movs	r3, #1
  }
}
 80081ac:	4618      	mov	r0, r3
 80081ae:	3714      	adds	r7, #20
 80081b0:	46bd      	mov	sp, r7
 80081b2:	f85d 7b04 	ldr.w	r7, [sp], #4
 80081b6:	4770      	bx	lr
 80081b8:	ffff2f3e 	.word	0xffff2f3e

080081bc <HAL_ETH_Transmit_IT>:
  *         the configuration information for ETHERNET module
  * @param  pTxConfig: Hold the configuration of packet to be transmitted
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_ETH_Transmit_IT(ETH_HandleTypeDef *heth, ETH_TxPacketConfigTypeDef *pTxConfig)
{
 80081bc:	b580      	push	{r7, lr}
 80081be:	b082      	sub	sp, #8
 80081c0:	af00      	add	r7, sp, #0
 80081c2:	6078      	str	r0, [r7, #4]
 80081c4:	6039      	str	r1, [r7, #0]
  if (pTxConfig == NULL)
 80081c6:	683b      	ldr	r3, [r7, #0]
 80081c8:	2b00      	cmp	r3, #0
 80081ca:	d109      	bne.n	80081e0 <HAL_ETH_Transmit_IT+0x24>
  {
    heth->ErrorCode |= HAL_ETH_ERROR_PARAM;
 80081cc:	687b      	ldr	r3, [r7, #4]
 80081ce:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 80081d2:	f043 0201 	orr.w	r2, r3, #1
 80081d6:	687b      	ldr	r3, [r7, #4]
 80081d8:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88
    return HAL_ERROR;
 80081dc:	2301      	movs	r3, #1
 80081de:	e03a      	b.n	8008256 <HAL_ETH_Transmit_IT+0x9a>
  }

  if (heth->gState == HAL_ETH_STATE_STARTED)
 80081e0:	687b      	ldr	r3, [r7, #4]
 80081e2:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 80081e6:	2b23      	cmp	r3, #35	@ 0x23
 80081e8:	d134      	bne.n	8008254 <HAL_ETH_Transmit_IT+0x98>
  {
    /* Save the packet pointer to release.  */
    heth->TxDescList.CurrentPacketAddress = (uint32_t *)pTxConfig->pData;
 80081ea:	683b      	ldr	r3, [r7, #0]
 80081ec:	6b5a      	ldr	r2, [r3, #52]	@ 0x34
 80081ee:	687b      	ldr	r3, [r7, #4]
 80081f0:	63da      	str	r2, [r3, #60]	@ 0x3c

    /* Config DMA Tx descriptor by Tx Packet info */
    if (ETH_Prepare_Tx_Descriptors(heth, pTxConfig, 1) != HAL_ETH_ERROR_NONE)
 80081f2:	2201      	movs	r2, #1
 80081f4:	6839      	ldr	r1, [r7, #0]
 80081f6:	6878      	ldr	r0, [r7, #4]
 80081f8:	f001 f8b6 	bl	8009368 <ETH_Prepare_Tx_Descriptors>
 80081fc:	4603      	mov	r3, r0
 80081fe:	2b00      	cmp	r3, #0
 8008200:	d009      	beq.n	8008216 <HAL_ETH_Transmit_IT+0x5a>
    {
      heth->ErrorCode |= HAL_ETH_ERROR_BUSY;
 8008202:	687b      	ldr	r3, [r7, #4]
 8008204:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 8008208:	f043 0202 	orr.w	r2, r3, #2
 800820c:	687b      	ldr	r3, [r7, #4]
 800820e:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88
      return HAL_ERROR;
 8008212:	2301      	movs	r3, #1
 8008214:	e01f      	b.n	8008256 <HAL_ETH_Transmit_IT+0x9a>
  __ASM volatile ("dsb 0xF":::"memory");
 8008216:	f3bf 8f4f 	dsb	sy
}
 800821a:	bf00      	nop

    /* Ensure completion of descriptor preparation before transmission start */
    __DSB();

    /* Incr current tx desc index */
    INCR_TX_DESC_INDEX(heth->TxDescList.CurTxDesc, 1U);
 800821c:	687b      	ldr	r3, [r7, #4]
 800821e:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 8008220:	1c5a      	adds	r2, r3, #1
 8008222:	687b      	ldr	r3, [r7, #4]
 8008224:	629a      	str	r2, [r3, #40]	@ 0x28
 8008226:	687b      	ldr	r3, [r7, #4]
 8008228:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800822a:	2b03      	cmp	r3, #3
 800822c:	d904      	bls.n	8008238 <HAL_ETH_Transmit_IT+0x7c>
 800822e:	687b      	ldr	r3, [r7, #4]
 8008230:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 8008232:	1f1a      	subs	r2, r3, #4
 8008234:	687b      	ldr	r3, [r7, #4]
 8008236:	629a      	str	r2, [r3, #40]	@ 0x28

    /* Start transmission */
    /* issue a poll command to Tx DMA by writing address of next immediate free descriptor */
    WRITE_REG(heth->Instance->DMACTDTPR, (uint32_t)(heth->TxDescList.TxDesc[heth->TxDescList.CurTxDesc]));
 8008238:	687b      	ldr	r3, [r7, #4]
 800823a:	6a99      	ldr	r1, [r3, #40]	@ 0x28
 800823c:	687b      	ldr	r3, [r7, #4]
 800823e:	681a      	ldr	r2, [r3, #0]
 8008240:	687b      	ldr	r3, [r7, #4]
 8008242:	3106      	adds	r1, #6
 8008244:	f853 3021 	ldr.w	r3, [r3, r1, lsl #2]
 8008248:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 800824c:	f8c2 3120 	str.w	r3, [r2, #288]	@ 0x120

    return HAL_OK;
 8008250:	2300      	movs	r3, #0
 8008252:	e000      	b.n	8008256 <HAL_ETH_Transmit_IT+0x9a>

  }
  else
  {
    return HAL_ERROR;
 8008254:	2301      	movs	r3, #1
  }
}
 8008256:	4618      	mov	r0, r3
 8008258:	3708      	adds	r7, #8
 800825a:	46bd      	mov	sp, r7
 800825c:	bd80      	pop	{r7, pc}

0800825e <HAL_ETH_ReadData>:
  *         the configuration information for ETHERNET module
  * @param  pAppBuff: Pointer to an application buffer to receive the packet.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_ETH_ReadData(ETH_HandleTypeDef *heth, void **pAppBuff)
{
 800825e:	b580      	push	{r7, lr}
 8008260:	b088      	sub	sp, #32
 8008262:	af00      	add	r7, sp, #0
 8008264:	6078      	str	r0, [r7, #4]
 8008266:	6039      	str	r1, [r7, #0]
  uint32_t descidx;
  ETH_DMADescTypeDef *dmarxdesc;
  uint32_t desccnt = 0U;
 8008268:	2300      	movs	r3, #0
 800826a:	617b      	str	r3, [r7, #20]
  uint32_t desccntmax;
  uint32_t bufflength;
  uint8_t rxdataready = 0U;
 800826c:	2300      	movs	r3, #0
 800826e:	74fb      	strb	r3, [r7, #19]

  if (pAppBuff == NULL)
 8008270:	683b      	ldr	r3, [r7, #0]
 8008272:	2b00      	cmp	r3, #0
 8008274:	d109      	bne.n	800828a <HAL_ETH_ReadData+0x2c>
  {
    heth->ErrorCode |= HAL_ETH_ERROR_PARAM;
 8008276:	687b      	ldr	r3, [r7, #4]
 8008278:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 800827c:	f043 0201 	orr.w	r2, r3, #1
 8008280:	687b      	ldr	r3, [r7, #4]
 8008282:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88
    return HAL_ERROR;
 8008286:	2301      	movs	r3, #1
 8008288:	e0a2      	b.n	80083d0 <HAL_ETH_ReadData+0x172>
  }

  if (heth->gState != HAL_ETH_STATE_STARTED)
 800828a:	687b      	ldr	r3, [r7, #4]
 800828c:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 8008290:	2b23      	cmp	r3, #35	@ 0x23
 8008292:	d001      	beq.n	8008298 <HAL_ETH_ReadData+0x3a>
  {
    return HAL_ERROR;
 8008294:	2301      	movs	r3, #1
 8008296:	e09b      	b.n	80083d0 <HAL_ETH_ReadData+0x172>
  }

  descidx = heth->RxDescList.RxDescIdx;
 8008298:	687b      	ldr	r3, [r7, #4]
 800829a:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 800829c:	61fb      	str	r3, [r7, #28]
  dmarxdesc = (ETH_DMADescTypeDef *)heth->RxDescList.RxDesc[descidx];
 800829e:	687b      	ldr	r3, [r7, #4]
 80082a0:	69fa      	ldr	r2, [r7, #28]
 80082a2:	3212      	adds	r2, #18
 80082a4:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
 80082a8:	61bb      	str	r3, [r7, #24]
  desccntmax = ETH_RX_DESC_CNT - heth->RxDescList.RxBuildDescCnt;
 80082aa:	687b      	ldr	r3, [r7, #4]
 80082ac:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 80082ae:	f1c3 0304 	rsb	r3, r3, #4
 80082b2:	60fb      	str	r3, [r7, #12]

  /* Check if descriptor is not owned by DMA */
  while ((READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_OWN) == (uint32_t)RESET) && (desccnt < desccntmax)
 80082b4:	e064      	b.n	8008380 <HAL_ETH_ReadData+0x122>
         && (rxdataready == 0U))
  {
    if (READ_BIT(dmarxdesc->DESC3,  ETH_DMARXNDESCWBF_CTXT)  != (uint32_t)RESET)
 80082b6:	69bb      	ldr	r3, [r7, #24]
 80082b8:	68db      	ldr	r3, [r3, #12]
 80082ba:	f003 4380 	and.w	r3, r3, #1073741824	@ 0x40000000
 80082be:	2b00      	cmp	r3, #0
 80082c0:	d007      	beq.n	80082d2 <HAL_ETH_ReadData+0x74>
    {
      /* Get timestamp high */
      heth->RxDescList.TimeStamp.TimeStampHigh = dmarxdesc->DESC1;
 80082c2:	69bb      	ldr	r3, [r7, #24]
 80082c4:	685a      	ldr	r2, [r3, #4]
 80082c6:	687b      	ldr	r3, [r7, #4]
 80082c8:	679a      	str	r2, [r3, #120]	@ 0x78
      /* Get timestamp low */
      heth->RxDescList.TimeStamp.TimeStampLow  = dmarxdesc->DESC0;
 80082ca:	69bb      	ldr	r3, [r7, #24]
 80082cc:	681a      	ldr	r2, [r3, #0]
 80082ce:	687b      	ldr	r3, [r7, #4]
 80082d0:	675a      	str	r2, [r3, #116]	@ 0x74
    }
    if ((READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_FD) != (uint32_t)RESET) || (heth->RxDescList.pRxStart != NULL))
 80082d2:	69bb      	ldr	r3, [r7, #24]
 80082d4:	68db      	ldr	r3, [r3, #12]
 80082d6:	f003 5300 	and.w	r3, r3, #536870912	@ 0x20000000
 80082da:	2b00      	cmp	r3, #0
 80082dc:	d103      	bne.n	80082e6 <HAL_ETH_ReadData+0x88>
 80082de:	687b      	ldr	r3, [r7, #4]
 80082e0:	6fdb      	ldr	r3, [r3, #124]	@ 0x7c
 80082e2:	2b00      	cmp	r3, #0
 80082e4:	d03a      	beq.n	800835c <HAL_ETH_ReadData+0xfe>
    {
      /* Check if first descriptor */
      if (READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_FD) != (uint32_t)RESET)
 80082e6:	69bb      	ldr	r3, [r7, #24]
 80082e8:	68db      	ldr	r3, [r3, #12]
 80082ea:	f003 5300 	and.w	r3, r3, #536870912	@ 0x20000000
 80082ee:	2b00      	cmp	r3, #0
 80082f0:	d005      	beq.n	80082fe <HAL_ETH_ReadData+0xa0>
      {
        heth->RxDescList.RxDescCnt = 0;
 80082f2:	687b      	ldr	r3, [r7, #4]
 80082f4:	2200      	movs	r2, #0
 80082f6:	661a      	str	r2, [r3, #96]	@ 0x60
        heth->RxDescList.RxDataLength = 0;
 80082f8:	687b      	ldr	r3, [r7, #4]
 80082fa:	2200      	movs	r2, #0
 80082fc:	665a      	str	r2, [r3, #100]	@ 0x64
      }

      /* Get the Frame Length of the received packet: substruct 4 bytes of the CRC */
      bufflength = READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_PL) - heth->RxDescList.RxDataLength;
 80082fe:	69bb      	ldr	r3, [r7, #24]
 8008300:	68db      	ldr	r3, [r3, #12]
 8008302:	f3c3 020e 	ubfx	r2, r3, #0, #15
 8008306:	687b      	ldr	r3, [r7, #4]
 8008308:	6e5b      	ldr	r3, [r3, #100]	@ 0x64
 800830a:	1ad3      	subs	r3, r2, r3
 800830c:	60bb      	str	r3, [r7, #8]

      /* Check if last descriptor */
      if (READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_LD) != (uint32_t)RESET)
 800830e:	69bb      	ldr	r3, [r7, #24]
 8008310:	68db      	ldr	r3, [r3, #12]
 8008312:	f003 5380 	and.w	r3, r3, #268435456	@ 0x10000000
 8008316:	2b00      	cmp	r3, #0
 8008318:	d005      	beq.n	8008326 <HAL_ETH_ReadData+0xc8>
      {
        /* Save Last descriptor index */
        heth->RxDescList.pRxLastRxDesc = dmarxdesc->DESC3;
 800831a:	69bb      	ldr	r3, [r7, #24]
 800831c:	68da      	ldr	r2, [r3, #12]
 800831e:	687b      	ldr	r3, [r7, #4]
 8008320:	671a      	str	r2, [r3, #112]	@ 0x70

        /* Packet ready */
        rxdataready = 1;
 8008322:	2301      	movs	r3, #1
 8008324:	74fb      	strb	r3, [r7, #19]
      /*Call registered Link callback*/
      heth->rxLinkCallback(&heth->RxDescList.pRxStart, &heth->RxDescList.pRxEnd,
                           (uint8_t *)dmarxdesc->BackupAddr0, bufflength);
#else
      /* Link callback */
      HAL_ETH_RxLinkCallback(&heth->RxDescList.pRxStart, &heth->RxDescList.pRxEnd,
 8008326:	687b      	ldr	r3, [r7, #4]
 8008328:	f103 007c 	add.w	r0, r3, #124	@ 0x7c
 800832c:	687b      	ldr	r3, [r7, #4]
 800832e:	f103 0180 	add.w	r1, r3, #128	@ 0x80
                             (uint8_t *)dmarxdesc->BackupAddr0, (uint16_t) bufflength);
 8008332:	69bb      	ldr	r3, [r7, #24]
 8008334:	691b      	ldr	r3, [r3, #16]
      HAL_ETH_RxLinkCallback(&heth->RxDescList.pRxStart, &heth->RxDescList.pRxEnd,
 8008336:	461a      	mov	r2, r3
 8008338:	68bb      	ldr	r3, [r7, #8]
 800833a:	b29b      	uxth	r3, r3
 800833c:	f008 fb0c 	bl	8010958 <HAL_ETH_RxLinkCallback>
#endif  /* USE_HAL_ETH_REGISTER_CALLBACKS */
      heth->RxDescList.RxDescCnt++;
 8008340:	687b      	ldr	r3, [r7, #4]
 8008342:	6e1b      	ldr	r3, [r3, #96]	@ 0x60
 8008344:	1c5a      	adds	r2, r3, #1
 8008346:	687b      	ldr	r3, [r7, #4]
 8008348:	661a      	str	r2, [r3, #96]	@ 0x60
      heth->RxDescList.RxDataLength += bufflength;
 800834a:	687b      	ldr	r3, [r7, #4]
 800834c:	6e5a      	ldr	r2, [r3, #100]	@ 0x64
 800834e:	68bb      	ldr	r3, [r7, #8]
 8008350:	441a      	add	r2, r3
 8008352:	687b      	ldr	r3, [r7, #4]
 8008354:	665a      	str	r2, [r3, #100]	@ 0x64

      /* Clear buffer pointer */
      dmarxdesc->BackupAddr0 = 0;
 8008356:	69bb      	ldr	r3, [r7, #24]
 8008358:	2200      	movs	r2, #0
 800835a:	611a      	str	r2, [r3, #16]
    }

    /* Increment current rx descriptor index */
    INCR_RX_DESC_INDEX(descidx, 1U);
 800835c:	69fb      	ldr	r3, [r7, #28]
 800835e:	3301      	adds	r3, #1
 8008360:	61fb      	str	r3, [r7, #28]
 8008362:	69fb      	ldr	r3, [r7, #28]
 8008364:	2b03      	cmp	r3, #3
 8008366:	d902      	bls.n	800836e <HAL_ETH_ReadData+0x110>
 8008368:	69fb      	ldr	r3, [r7, #28]
 800836a:	3b04      	subs	r3, #4
 800836c:	61fb      	str	r3, [r7, #28]
    /* Get current descriptor address */
    dmarxdesc = (ETH_DMADescTypeDef *)heth->RxDescList.RxDesc[descidx];
 800836e:	687b      	ldr	r3, [r7, #4]
 8008370:	69fa      	ldr	r2, [r7, #28]
 8008372:	3212      	adds	r2, #18
 8008374:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
 8008378:	61bb      	str	r3, [r7, #24]
    desccnt++;
 800837a:	697b      	ldr	r3, [r7, #20]
 800837c:	3301      	adds	r3, #1
 800837e:	617b      	str	r3, [r7, #20]
  while ((READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_OWN) == (uint32_t)RESET) && (desccnt < desccntmax)
 8008380:	69bb      	ldr	r3, [r7, #24]
 8008382:	68db      	ldr	r3, [r3, #12]
         && (rxdataready == 0U))
 8008384:	2b00      	cmp	r3, #0
 8008386:	db06      	blt.n	8008396 <HAL_ETH_ReadData+0x138>
  while ((READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_OWN) == (uint32_t)RESET) && (desccnt < desccntmax)
 8008388:	697a      	ldr	r2, [r7, #20]
 800838a:	68fb      	ldr	r3, [r7, #12]
 800838c:	429a      	cmp	r2, r3
 800838e:	d202      	bcs.n	8008396 <HAL_ETH_ReadData+0x138>
         && (rxdataready == 0U))
 8008390:	7cfb      	ldrb	r3, [r7, #19]
 8008392:	2b00      	cmp	r3, #0
 8008394:	d08f      	beq.n	80082b6 <HAL_ETH_ReadData+0x58>
  }

  heth->RxDescList.RxBuildDescCnt += desccnt;
 8008396:	687b      	ldr	r3, [r7, #4]
 8008398:	6eda      	ldr	r2, [r3, #108]	@ 0x6c
 800839a:	697b      	ldr	r3, [r7, #20]
 800839c:	441a      	add	r2, r3
 800839e:	687b      	ldr	r3, [r7, #4]
 80083a0:	66da      	str	r2, [r3, #108]	@ 0x6c
  if ((heth->RxDescList.RxBuildDescCnt) != 0U)
 80083a2:	687b      	ldr	r3, [r7, #4]
 80083a4:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 80083a6:	2b00      	cmp	r3, #0
 80083a8:	d002      	beq.n	80083b0 <HAL_ETH_ReadData+0x152>
  {
    /* Update Descriptors */
    ETH_UpdateDescriptor(heth);
 80083aa:	6878      	ldr	r0, [r7, #4]
 80083ac:	f000 f814 	bl	80083d8 <ETH_UpdateDescriptor>
  }

  heth->RxDescList.RxDescIdx = descidx;
 80083b0:	687b      	ldr	r3, [r7, #4]
 80083b2:	69fa      	ldr	r2, [r7, #28]
 80083b4:	65da      	str	r2, [r3, #92]	@ 0x5c

  if (rxdataready == 1U)
 80083b6:	7cfb      	ldrb	r3, [r7, #19]
 80083b8:	2b01      	cmp	r3, #1
 80083ba:	d108      	bne.n	80083ce <HAL_ETH_ReadData+0x170>
  {
    /* Return received packet */
    *pAppBuff = heth->RxDescList.pRxStart;
 80083bc:	687b      	ldr	r3, [r7, #4]
 80083be:	6fda      	ldr	r2, [r3, #124]	@ 0x7c
 80083c0:	683b      	ldr	r3, [r7, #0]
 80083c2:	601a      	str	r2, [r3, #0]
    /* Reset first element */
    heth->RxDescList.pRxStart = NULL;
 80083c4:	687b      	ldr	r3, [r7, #4]
 80083c6:	2200      	movs	r2, #0
 80083c8:	67da      	str	r2, [r3, #124]	@ 0x7c

    return HAL_OK;
 80083ca:	2300      	movs	r3, #0
 80083cc:	e000      	b.n	80083d0 <HAL_ETH_ReadData+0x172>
  }

  /* Packet not ready */
  return HAL_ERROR;
 80083ce:	2301      	movs	r3, #1
}
 80083d0:	4618      	mov	r0, r3
 80083d2:	3720      	adds	r7, #32
 80083d4:	46bd      	mov	sp, r7
 80083d6:	bd80      	pop	{r7, pc}

080083d8 <ETH_UpdateDescriptor>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval HAL status
  */
static void ETH_UpdateDescriptor(ETH_HandleTypeDef *heth)
{
 80083d8:	b580      	push	{r7, lr}
 80083da:	b088      	sub	sp, #32
 80083dc:	af00      	add	r7, sp, #0
 80083de:	6078      	str	r0, [r7, #4]
  uint32_t descidx;
  uint32_t tailidx;
  uint32_t desccount;
  ETH_DMADescTypeDef *dmarxdesc;
  uint8_t *buff = NULL;
 80083e0:	2300      	movs	r3, #0
 80083e2:	60bb      	str	r3, [r7, #8]
  uint8_t allocStatus = 1U;
 80083e4:	2301      	movs	r3, #1
 80083e6:	74fb      	strb	r3, [r7, #19]

  descidx = heth->RxDescList.RxBuildDescIdx;
 80083e8:	687b      	ldr	r3, [r7, #4]
 80083ea:	6e9b      	ldr	r3, [r3, #104]	@ 0x68
 80083ec:	61fb      	str	r3, [r7, #28]
  dmarxdesc = (ETH_DMADescTypeDef *)heth->RxDescList.RxDesc[descidx];
 80083ee:	687b      	ldr	r3, [r7, #4]
 80083f0:	69fa      	ldr	r2, [r7, #28]
 80083f2:	3212      	adds	r2, #18
 80083f4:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
 80083f8:	617b      	str	r3, [r7, #20]
  desccount = heth->RxDescList.RxBuildDescCnt;
 80083fa:	687b      	ldr	r3, [r7, #4]
 80083fc:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 80083fe:	61bb      	str	r3, [r7, #24]

  while ((desccount > 0U) && (allocStatus != 0U))
 8008400:	e038      	b.n	8008474 <ETH_UpdateDescriptor+0x9c>
  {
    /* Check if a buffer's attached the descriptor */
    if (READ_REG(dmarxdesc->BackupAddr0) == 0U)
 8008402:	697b      	ldr	r3, [r7, #20]
 8008404:	691b      	ldr	r3, [r3, #16]
 8008406:	2b00      	cmp	r3, #0
 8008408:	d112      	bne.n	8008430 <ETH_UpdateDescriptor+0x58>
#if (USE_HAL_ETH_REGISTER_CALLBACKS == 1)
      /*Call registered Allocate callback*/
      heth->rxAllocateCallback(&buff);
#else
      /* Allocate callback */
      HAL_ETH_RxAllocateCallback(&buff);
 800840a:	f107 0308 	add.w	r3, r7, #8
 800840e:	4618      	mov	r0, r3
 8008410:	f008 fa72 	bl	80108f8 <HAL_ETH_RxAllocateCallback>
#endif  /* USE_HAL_ETH_REGISTER_CALLBACKS */
      if (buff == NULL)
 8008414:	68bb      	ldr	r3, [r7, #8]
 8008416:	2b00      	cmp	r3, #0
 8008418:	d102      	bne.n	8008420 <ETH_UpdateDescriptor+0x48>
      {
        allocStatus = 0U;
 800841a:	2300      	movs	r3, #0
 800841c:	74fb      	strb	r3, [r7, #19]
 800841e:	e007      	b.n	8008430 <ETH_UpdateDescriptor+0x58>
      }
      else
      {
        WRITE_REG(dmarxdesc->BackupAddr0, (uint32_t)buff);
 8008420:	68bb      	ldr	r3, [r7, #8]
 8008422:	461a      	mov	r2, r3
 8008424:	697b      	ldr	r3, [r7, #20]
 8008426:	611a      	str	r2, [r3, #16]
        WRITE_REG(dmarxdesc->DESC0, (uint32_t)buff);
 8008428:	68bb      	ldr	r3, [r7, #8]
 800842a:	461a      	mov	r2, r3
 800842c:	697b      	ldr	r3, [r7, #20]
 800842e:	601a      	str	r2, [r3, #0]
      }
    }

    if (allocStatus != 0U)
 8008430:	7cfb      	ldrb	r3, [r7, #19]
 8008432:	2b00      	cmp	r3, #0
 8008434:	d01e      	beq.n	8008474 <ETH_UpdateDescriptor+0x9c>
    {

      if (heth->RxDescList.ItMode != 0U)
 8008436:	687b      	ldr	r3, [r7, #4]
 8008438:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800843a:	2b00      	cmp	r3, #0
 800843c:	d004      	beq.n	8008448 <ETH_UpdateDescriptor+0x70>
      {
        WRITE_REG(dmarxdesc->DESC3, ETH_DMARXNDESCRF_OWN | ETH_DMARXNDESCRF_BUF1V | ETH_DMARXNDESCRF_IOC);
 800843e:	697b      	ldr	r3, [r7, #20]
 8008440:	f04f 4241 	mov.w	r2, #3238002688	@ 0xc1000000
 8008444:	60da      	str	r2, [r3, #12]
 8008446:	e003      	b.n	8008450 <ETH_UpdateDescriptor+0x78>
      }
      else
      {
        WRITE_REG(dmarxdesc->DESC3, ETH_DMARXNDESCRF_OWN | ETH_DMARXNDESCRF_BUF1V);
 8008448:	697b      	ldr	r3, [r7, #20]
 800844a:	f04f 4201 	mov.w	r2, #2164260864	@ 0x81000000
 800844e:	60da      	str	r2, [r3, #12]
      }

      /* Increment current rx descriptor index */
      INCR_RX_DESC_INDEX(descidx, 1U);
 8008450:	69fb      	ldr	r3, [r7, #28]
 8008452:	3301      	adds	r3, #1
 8008454:	61fb      	str	r3, [r7, #28]
 8008456:	69fb      	ldr	r3, [r7, #28]
 8008458:	2b03      	cmp	r3, #3
 800845a:	d902      	bls.n	8008462 <ETH_UpdateDescriptor+0x8a>
 800845c:	69fb      	ldr	r3, [r7, #28]
 800845e:	3b04      	subs	r3, #4
 8008460:	61fb      	str	r3, [r7, #28]
      /* Get current descriptor address */
      dmarxdesc = (ETH_DMADescTypeDef *)heth->RxDescList.RxDesc[descidx];
 8008462:	687b      	ldr	r3, [r7, #4]
 8008464:	69fa      	ldr	r2, [r7, #28]
 8008466:	3212      	adds	r2, #18
 8008468:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
 800846c:	617b      	str	r3, [r7, #20]
      desccount--;
 800846e:	69bb      	ldr	r3, [r7, #24]
 8008470:	3b01      	subs	r3, #1
 8008472:	61bb      	str	r3, [r7, #24]
  while ((desccount > 0U) && (allocStatus != 0U))
 8008474:	69bb      	ldr	r3, [r7, #24]
 8008476:	2b00      	cmp	r3, #0
 8008478:	d002      	beq.n	8008480 <ETH_UpdateDescriptor+0xa8>
 800847a:	7cfb      	ldrb	r3, [r7, #19]
 800847c:	2b00      	cmp	r3, #0
 800847e:	d1c0      	bne.n	8008402 <ETH_UpdateDescriptor+0x2a>
    }
  }

  if (heth->RxDescList.RxBuildDescCnt != desccount)
 8008480:	687b      	ldr	r3, [r7, #4]
 8008482:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8008484:	69ba      	ldr	r2, [r7, #24]
 8008486:	429a      	cmp	r2, r3
 8008488:	d01b      	beq.n	80084c2 <ETH_UpdateDescriptor+0xea>
  {
    /* Set the tail pointer index */
    tailidx = (descidx + 1U) % ETH_RX_DESC_CNT;
 800848a:	69fb      	ldr	r3, [r7, #28]
 800848c:	3301      	adds	r3, #1
 800848e:	f003 0303 	and.w	r3, r3, #3
 8008492:	60fb      	str	r3, [r7, #12]
  __ASM volatile ("dmb 0xF":::"memory");
 8008494:	f3bf 8f5f 	dmb	sy
}
 8008498:	bf00      	nop

    /* DMB instruction to avoid race condition */
    __DMB();

    /* Set the Tail pointer address */
    WRITE_REG(heth->Instance->DMACRDTPR, ((uint32_t)(heth->Init.RxDesc + (tailidx))));
 800849a:	687b      	ldr	r3, [r7, #4]
 800849c:	6919      	ldr	r1, [r3, #16]
 800849e:	68fa      	ldr	r2, [r7, #12]
 80084a0:	4613      	mov	r3, r2
 80084a2:	005b      	lsls	r3, r3, #1
 80084a4:	4413      	add	r3, r2
 80084a6:	00db      	lsls	r3, r3, #3
 80084a8:	18ca      	adds	r2, r1, r3
 80084aa:	687b      	ldr	r3, [r7, #4]
 80084ac:	681b      	ldr	r3, [r3, #0]
 80084ae:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 80084b2:	f8c3 2128 	str.w	r2, [r3, #296]	@ 0x128

    heth->RxDescList.RxBuildDescIdx = descidx;
 80084b6:	687b      	ldr	r3, [r7, #4]
 80084b8:	69fa      	ldr	r2, [r7, #28]
 80084ba:	669a      	str	r2, [r3, #104]	@ 0x68
    heth->RxDescList.RxBuildDescCnt = desccount;
 80084bc:	687b      	ldr	r3, [r7, #4]
 80084be:	69ba      	ldr	r2, [r7, #24]
 80084c0:	66da      	str	r2, [r3, #108]	@ 0x6c
  }
}
 80084c2:	bf00      	nop
 80084c4:	3720      	adds	r7, #32
 80084c6:	46bd      	mov	sp, r7
 80084c8:	bd80      	pop	{r7, pc}

080084ca <HAL_ETH_ReleaseTxPacket>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_ETH_ReleaseTxPacket(ETH_HandleTypeDef *heth)
{
 80084ca:	b580      	push	{r7, lr}
 80084cc:	b086      	sub	sp, #24
 80084ce:	af00      	add	r7, sp, #0
 80084d0:	6078      	str	r0, [r7, #4]
  ETH_TxDescListTypeDef *dmatxdesclist = &heth->TxDescList;
 80084d2:	687b      	ldr	r3, [r7, #4]
 80084d4:	3318      	adds	r3, #24
 80084d6:	60bb      	str	r3, [r7, #8]
  uint32_t numOfBuf =  dmatxdesclist->BuffersInUse;
 80084d8:	68bb      	ldr	r3, [r7, #8]
 80084da:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 80084dc:	617b      	str	r3, [r7, #20]
  uint32_t idx =       dmatxdesclist->releaseIndex;
 80084de:	68bb      	ldr	r3, [r7, #8]
 80084e0:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80084e2:	613b      	str	r3, [r7, #16]
  uint8_t pktTxStatus = 1U;
 80084e4:	2301      	movs	r3, #1
 80084e6:	73fb      	strb	r3, [r7, #15]
#ifdef HAL_ETH_USE_PTP
  ETH_TimeStampTypeDef *timestamp = &heth->TxTimestamp;
#endif /* HAL_ETH_USE_PTP */

  /* Loop through buffers in use.  */
  while ((numOfBuf != 0U) && (pktTxStatus != 0U))
 80084e8:	e047      	b.n	800857a <HAL_ETH_ReleaseTxPacket+0xb0>
  {
    pktInUse = 1U;
 80084ea:	2301      	movs	r3, #1
 80084ec:	73bb      	strb	r3, [r7, #14]
    numOfBuf--;
 80084ee:	697b      	ldr	r3, [r7, #20]
 80084f0:	3b01      	subs	r3, #1
 80084f2:	617b      	str	r3, [r7, #20]
    /* If no packet, just examine the next packet.  */
    if (dmatxdesclist->PacketAddress[idx] == NULL)
 80084f4:	68ba      	ldr	r2, [r7, #8]
 80084f6:	693b      	ldr	r3, [r7, #16]
 80084f8:	3304      	adds	r3, #4
 80084fa:	009b      	lsls	r3, r3, #2
 80084fc:	4413      	add	r3, r2
 80084fe:	685b      	ldr	r3, [r3, #4]
 8008500:	2b00      	cmp	r3, #0
 8008502:	d10a      	bne.n	800851a <HAL_ETH_ReleaseTxPacket+0x50>
    {
      /* No packet in use, skip to next.  */
      INCR_TX_DESC_INDEX(idx, 1U);
 8008504:	693b      	ldr	r3, [r7, #16]
 8008506:	3301      	adds	r3, #1
 8008508:	613b      	str	r3, [r7, #16]
 800850a:	693b      	ldr	r3, [r7, #16]
 800850c:	2b03      	cmp	r3, #3
 800850e:	d902      	bls.n	8008516 <HAL_ETH_ReleaseTxPacket+0x4c>
 8008510:	693b      	ldr	r3, [r7, #16]
 8008512:	3b04      	subs	r3, #4
 8008514:	613b      	str	r3, [r7, #16]
      pktInUse = 0U;
 8008516:	2300      	movs	r3, #0
 8008518:	73bb      	strb	r3, [r7, #14]
    }

    if (pktInUse != 0U)
 800851a:	7bbb      	ldrb	r3, [r7, #14]
 800851c:	2b00      	cmp	r3, #0
 800851e:	d02c      	beq.n	800857a <HAL_ETH_ReleaseTxPacket+0xb0>
    {
      /* Determine if the packet has been transmitted.  */
      if ((heth->Init.TxDesc[idx].DESC3 & ETH_DMATXNDESCRF_OWN) == 0U)
 8008520:	687b      	ldr	r3, [r7, #4]
 8008522:	68d9      	ldr	r1, [r3, #12]
 8008524:	693a      	ldr	r2, [r7, #16]
 8008526:	4613      	mov	r3, r2
 8008528:	005b      	lsls	r3, r3, #1
 800852a:	4413      	add	r3, r2
 800852c:	00db      	lsls	r3, r3, #3
 800852e:	440b      	add	r3, r1
 8008530:	68db      	ldr	r3, [r3, #12]
 8008532:	2b00      	cmp	r3, #0
 8008534:	db1f      	blt.n	8008576 <HAL_ETH_ReleaseTxPacket+0xac>
        {
          HAL_ETH_TxPtpCallback(dmatxdesclist->PacketAddress[idx], timestamp);
        }
#endif  /* HAL_ETH_USE_PTP */
        /* Release the packet.  */
        HAL_ETH_TxFreeCallback(dmatxdesclist->PacketAddress[idx]);
 8008536:	68ba      	ldr	r2, [r7, #8]
 8008538:	693b      	ldr	r3, [r7, #16]
 800853a:	3304      	adds	r3, #4
 800853c:	009b      	lsls	r3, r3, #2
 800853e:	4413      	add	r3, r2
 8008540:	685b      	ldr	r3, [r3, #4]
 8008542:	4618      	mov	r0, r3
 8008544:	f008 fa70 	bl	8010a28 <HAL_ETH_TxFreeCallback>
#endif  /* USE_HAL_ETH_REGISTER_CALLBACKS */

        /* Clear the entry in the in-use array.  */
        dmatxdesclist->PacketAddress[idx] = NULL;
 8008548:	68ba      	ldr	r2, [r7, #8]
 800854a:	693b      	ldr	r3, [r7, #16]
 800854c:	3304      	adds	r3, #4
 800854e:	009b      	lsls	r3, r3, #2
 8008550:	4413      	add	r3, r2
 8008552:	2200      	movs	r2, #0
 8008554:	605a      	str	r2, [r3, #4]

        /* Update the transmit relesae index and number of buffers in use.  */
        INCR_TX_DESC_INDEX(idx, 1U);
 8008556:	693b      	ldr	r3, [r7, #16]
 8008558:	3301      	adds	r3, #1
 800855a:	613b      	str	r3, [r7, #16]
 800855c:	693b      	ldr	r3, [r7, #16]
 800855e:	2b03      	cmp	r3, #3
 8008560:	d902      	bls.n	8008568 <HAL_ETH_ReleaseTxPacket+0x9e>
 8008562:	693b      	ldr	r3, [r7, #16]
 8008564:	3b04      	subs	r3, #4
 8008566:	613b      	str	r3, [r7, #16]
        dmatxdesclist->BuffersInUse = numOfBuf;
 8008568:	68bb      	ldr	r3, [r7, #8]
 800856a:	697a      	ldr	r2, [r7, #20]
 800856c:	629a      	str	r2, [r3, #40]	@ 0x28
        dmatxdesclist->releaseIndex = idx;
 800856e:	68bb      	ldr	r3, [r7, #8]
 8008570:	693a      	ldr	r2, [r7, #16]
 8008572:	62da      	str	r2, [r3, #44]	@ 0x2c
 8008574:	e001      	b.n	800857a <HAL_ETH_ReleaseTxPacket+0xb0>
      }
      else
      {
        /* Get out of the loop!  */
        pktTxStatus = 0U;
 8008576:	2300      	movs	r3, #0
 8008578:	73fb      	strb	r3, [r7, #15]
  while ((numOfBuf != 0U) && (pktTxStatus != 0U))
 800857a:	697b      	ldr	r3, [r7, #20]
 800857c:	2b00      	cmp	r3, #0
 800857e:	d002      	beq.n	8008586 <HAL_ETH_ReleaseTxPacket+0xbc>
 8008580:	7bfb      	ldrb	r3, [r7, #15]
 8008582:	2b00      	cmp	r3, #0
 8008584:	d1b1      	bne.n	80084ea <HAL_ETH_ReleaseTxPacket+0x20>
      }
    }
  }
  return HAL_OK;
 8008586:	2300      	movs	r3, #0
}
 8008588:	4618      	mov	r0, r3
 800858a:	3718      	adds	r7, #24
 800858c:	46bd      	mov	sp, r7
 800858e:	bd80      	pop	{r7, pc}

08008590 <HAL_ETH_IRQHandler>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval HAL status
  */
void HAL_ETH_IRQHandler(ETH_HandleTypeDef *heth)
{
 8008590:	b580      	push	{r7, lr}
 8008592:	b086      	sub	sp, #24
 8008594:	af00      	add	r7, sp, #0
 8008596:	6078      	str	r0, [r7, #4]
  uint32_t mac_flag = READ_REG(heth->Instance->MACISR);
 8008598:	687b      	ldr	r3, [r7, #4]
 800859a:	681b      	ldr	r3, [r3, #0]
 800859c:	f8d3 30b0 	ldr.w	r3, [r3, #176]	@ 0xb0
 80085a0:	617b      	str	r3, [r7, #20]
  uint32_t dma_flag = READ_REG(heth->Instance->DMACSR);
 80085a2:	687b      	ldr	r3, [r7, #4]
 80085a4:	681b      	ldr	r3, [r3, #0]
 80085a6:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 80085aa:	f8d3 3160 	ldr.w	r3, [r3, #352]	@ 0x160
 80085ae:	613b      	str	r3, [r7, #16]
  uint32_t dma_itsource = READ_REG(heth->Instance->DMACIER);
 80085b0:	687b      	ldr	r3, [r7, #4]
 80085b2:	681b      	ldr	r3, [r3, #0]
 80085b4:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 80085b8:	f8d3 3134 	ldr.w	r3, [r3, #308]	@ 0x134
 80085bc:	60fb      	str	r3, [r7, #12]
  uint32_t exti_d1_flag = READ_REG(EXTI_D1->PR3);
 80085be:	4b6d      	ldr	r3, [pc, #436]	@ (8008774 <HAL_ETH_IRQHandler+0x1e4>)
 80085c0:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 80085c2:	60bb      	str	r3, [r7, #8]
#if defined(DUAL_CORE)
  uint32_t exti_d2_flag = READ_REG(EXTI_D2->PR3);
#endif /* DUAL_CORE */

  /* Packet received */
  if (((dma_flag & ETH_DMACSR_RI) != 0U) && ((dma_itsource & ETH_DMACIER_RIE) != 0U))
 80085c4:	693b      	ldr	r3, [r7, #16]
 80085c6:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 80085ca:	2b00      	cmp	r3, #0
 80085cc:	d010      	beq.n	80085f0 <HAL_ETH_IRQHandler+0x60>
 80085ce:	68fb      	ldr	r3, [r7, #12]
 80085d0:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 80085d4:	2b00      	cmp	r3, #0
 80085d6:	d00b      	beq.n	80085f0 <HAL_ETH_IRQHandler+0x60>
  {
    /* Clear the Eth DMA Rx IT pending bits */
    __HAL_ETH_DMA_CLEAR_IT(heth, ETH_DMACSR_RI | ETH_DMACSR_NIS);
 80085d8:	687b      	ldr	r3, [r7, #4]
 80085da:	681b      	ldr	r3, [r3, #0]
 80085dc:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 80085e0:	461a      	mov	r2, r3
 80085e2:	f248 0340 	movw	r3, #32832	@ 0x8040
 80085e6:	f8c2 3160 	str.w	r3, [r2, #352]	@ 0x160
#if (USE_HAL_ETH_REGISTER_CALLBACKS == 1)
    /*Call registered Receive complete callback*/
    heth->RxCpltCallback(heth);
#else
    /* Receive complete callback */
    HAL_ETH_RxCpltCallback(heth);
 80085ea:	6878      	ldr	r0, [r7, #4]
 80085ec:	f007 fd0c 	bl	8010008 <HAL_ETH_RxCpltCallback>
#endif  /* USE_HAL_ETH_REGISTER_CALLBACKS */
  }

  /* Packet transmitted */
  if (((dma_flag & ETH_DMACSR_TI) != 0U) && ((dma_itsource & ETH_DMACIER_TIE) != 0U))
 80085f0:	693b      	ldr	r3, [r7, #16]
 80085f2:	f003 0301 	and.w	r3, r3, #1
 80085f6:	2b00      	cmp	r3, #0
 80085f8:	d010      	beq.n	800861c <HAL_ETH_IRQHandler+0x8c>
 80085fa:	68fb      	ldr	r3, [r7, #12]
 80085fc:	f003 0301 	and.w	r3, r3, #1
 8008600:	2b00      	cmp	r3, #0
 8008602:	d00b      	beq.n	800861c <HAL_ETH_IRQHandler+0x8c>
  {
    /* Clear the Eth DMA Tx IT pending bits */
    __HAL_ETH_DMA_CLEAR_IT(heth, ETH_DMACSR_TI | ETH_DMACSR_NIS);
 8008604:	687b      	ldr	r3, [r7, #4]
 8008606:	681b      	ldr	r3, [r3, #0]
 8008608:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 800860c:	461a      	mov	r2, r3
 800860e:	f248 0301 	movw	r3, #32769	@ 0x8001
 8008612:	f8c2 3160 	str.w	r3, [r2, #352]	@ 0x160
#if (USE_HAL_ETH_REGISTER_CALLBACKS == 1)
    /*Call registered Transmit complete callback*/
    heth->TxCpltCallback(heth);
#else
    /* Transfer complete callback */
    HAL_ETH_TxCpltCallback(heth);
 8008616:	6878      	ldr	r0, [r7, #4]
 8008618:	f007 fd06 	bl	8010028 <HAL_ETH_TxCpltCallback>
#endif  /* USE_HAL_ETH_REGISTER_CALLBACKS */
  }

  /* ETH DMA Error */
  if (((dma_flag & ETH_DMACSR_AIS) != 0U) && ((dma_itsource & ETH_DMACIER_AIE) != 0U))
 800861c:	693b      	ldr	r3, [r7, #16]
 800861e:	f403 4380 	and.w	r3, r3, #16384	@ 0x4000
 8008622:	2b00      	cmp	r3, #0
 8008624:	d047      	beq.n	80086b6 <HAL_ETH_IRQHandler+0x126>
 8008626:	68fb      	ldr	r3, [r7, #12]
 8008628:	f403 4380 	and.w	r3, r3, #16384	@ 0x4000
 800862c:	2b00      	cmp	r3, #0
 800862e:	d042      	beq.n	80086b6 <HAL_ETH_IRQHandler+0x126>
  {
    heth->ErrorCode |= HAL_ETH_ERROR_DMA;
 8008630:	687b      	ldr	r3, [r7, #4]
 8008632:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 8008636:	f043 0208 	orr.w	r2, r3, #8
 800863a:	687b      	ldr	r3, [r7, #4]
 800863c:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88
    /* if fatal bus error occurred */
    if ((dma_flag & ETH_DMACSR_FBE) != 0U)
 8008640:	693b      	ldr	r3, [r7, #16]
 8008642:	f403 5380 	and.w	r3, r3, #4096	@ 0x1000
 8008646:	2b00      	cmp	r3, #0
 8008648:	d01e      	beq.n	8008688 <HAL_ETH_IRQHandler+0xf8>
    {
      /* Get DMA error code  */
      heth->DMAErrorCode = READ_BIT(heth->Instance->DMACSR, (ETH_DMACSR_FBE | ETH_DMACSR_TPS | ETH_DMACSR_RPS));
 800864a:	687b      	ldr	r3, [r7, #4]
 800864c:	681b      	ldr	r3, [r3, #0]
 800864e:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8008652:	f8d3 2160 	ldr.w	r2, [r3, #352]	@ 0x160
 8008656:	f241 1302 	movw	r3, #4354	@ 0x1102
 800865a:	4013      	ands	r3, r2
 800865c:	687a      	ldr	r2, [r7, #4]
 800865e:	f8c2 308c 	str.w	r3, [r2, #140]	@ 0x8c

      /* Disable all interrupts */
      __HAL_ETH_DMA_DISABLE_IT(heth, ETH_DMACIER_NIE | ETH_DMACIER_AIE);
 8008662:	687b      	ldr	r3, [r7, #4]
 8008664:	681b      	ldr	r3, [r3, #0]
 8008666:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 800866a:	f8d3 3134 	ldr.w	r3, [r3, #308]	@ 0x134
 800866e:	687a      	ldr	r2, [r7, #4]
 8008670:	6812      	ldr	r2, [r2, #0]
 8008672:	f423 4340 	bic.w	r3, r3, #49152	@ 0xc000
 8008676:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 800867a:	f8c2 3134 	str.w	r3, [r2, #308]	@ 0x134

      /* Set HAL state to ERROR */
      heth->gState = HAL_ETH_STATE_ERROR;
 800867e:	687b      	ldr	r3, [r7, #4]
 8008680:	22e0      	movs	r2, #224	@ 0xe0
 8008682:	f8c3 2084 	str.w	r2, [r3, #132]	@ 0x84
 8008686:	e013      	b.n	80086b0 <HAL_ETH_IRQHandler+0x120>
    }
    else
    {
      /* Get DMA error status  */
      heth->DMAErrorCode = READ_BIT(heth->Instance->DMACSR, (ETH_DMACSR_CDE | ETH_DMACSR_ETI | ETH_DMACSR_RWT |
 8008688:	687b      	ldr	r3, [r7, #4]
 800868a:	681b      	ldr	r3, [r3, #0]
 800868c:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8008690:	f8d3 3160 	ldr.w	r3, [r3, #352]	@ 0x160
 8008694:	f403 42cd 	and.w	r2, r3, #26240	@ 0x6680
 8008698:	687b      	ldr	r3, [r7, #4]
 800869a:	f8c3 208c 	str.w	r2, [r3, #140]	@ 0x8c
                                                             ETH_DMACSR_RBU | ETH_DMACSR_AIS));

      /* Clear the interrupt summary flag */
      __HAL_ETH_DMA_CLEAR_IT(heth, (ETH_DMACSR_CDE | ETH_DMACSR_ETI | ETH_DMACSR_RWT |
 800869e:	687b      	ldr	r3, [r7, #4]
 80086a0:	681b      	ldr	r3, [r3, #0]
 80086a2:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 80086a6:	461a      	mov	r2, r3
 80086a8:	f44f 43cd 	mov.w	r3, #26240	@ 0x6680
 80086ac:	f8c2 3160 	str.w	r3, [r2, #352]	@ 0x160
#if (USE_HAL_ETH_REGISTER_CALLBACKS == 1)
    /* Call registered Error callback*/
    heth->ErrorCallback(heth);
#else
    /* Ethernet DMA Error callback */
    HAL_ETH_ErrorCallback(heth);
 80086b0:	6878      	ldr	r0, [r7, #4]
 80086b2:	f007 fcc9 	bl	8010048 <HAL_ETH_ErrorCallback>
#endif  /* USE_HAL_ETH_REGISTER_CALLBACKS */
  }

  /* ETH MAC Error IT */
  if (((mac_flag & ETH_MACIER_RXSTSIE) == ETH_MACIER_RXSTSIE) || \
 80086b6:	697b      	ldr	r3, [r7, #20]
 80086b8:	f403 4380 	and.w	r3, r3, #16384	@ 0x4000
 80086bc:	2b00      	cmp	r3, #0
 80086be:	d104      	bne.n	80086ca <HAL_ETH_IRQHandler+0x13a>
      ((mac_flag & ETH_MACIER_TXSTSIE) == ETH_MACIER_TXSTSIE))
 80086c0:	697b      	ldr	r3, [r7, #20]
 80086c2:	f403 5300 	and.w	r3, r3, #8192	@ 0x2000
  if (((mac_flag & ETH_MACIER_RXSTSIE) == ETH_MACIER_RXSTSIE) || \
 80086c6:	2b00      	cmp	r3, #0
 80086c8:	d019      	beq.n	80086fe <HAL_ETH_IRQHandler+0x16e>
  {
    heth->ErrorCode |= HAL_ETH_ERROR_MAC;
 80086ca:	687b      	ldr	r3, [r7, #4]
 80086cc:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 80086d0:	f043 0210 	orr.w	r2, r3, #16
 80086d4:	687b      	ldr	r3, [r7, #4]
 80086d6:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88

    /* Get MAC Rx Tx status and clear Status register pending bit */
    heth->MACErrorCode = READ_REG(heth->Instance->MACRXTXSR);
 80086da:	687b      	ldr	r3, [r7, #4]
 80086dc:	681b      	ldr	r3, [r3, #0]
 80086de:	f8d3 20b8 	ldr.w	r2, [r3, #184]	@ 0xb8
 80086e2:	687b      	ldr	r3, [r7, #4]
 80086e4:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90

    heth->gState = HAL_ETH_STATE_ERROR;
 80086e8:	687b      	ldr	r3, [r7, #4]
 80086ea:	22e0      	movs	r2, #224	@ 0xe0
 80086ec:	f8c3 2084 	str.w	r2, [r3, #132]	@ 0x84
#if (USE_HAL_ETH_REGISTER_CALLBACKS == 1)
    /* Call registered Error callback*/
    heth->ErrorCallback(heth);
#else
    /* Ethernet Error callback */
    HAL_ETH_ErrorCallback(heth);
 80086f0:	6878      	ldr	r0, [r7, #4]
 80086f2:	f007 fca9 	bl	8010048 <HAL_ETH_ErrorCallback>
#endif  /* USE_HAL_ETH_REGISTER_CALLBACKS */
    heth->MACErrorCode = (uint32_t)(0x0U);
 80086f6:	687b      	ldr	r3, [r7, #4]
 80086f8:	2200      	movs	r2, #0
 80086fa:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
  }

  /* ETH PMT IT */
  if ((mac_flag & ETH_MAC_PMT_IT) != 0U)
 80086fe:	697b      	ldr	r3, [r7, #20]
 8008700:	f003 0310 	and.w	r3, r3, #16
 8008704:	2b00      	cmp	r3, #0
 8008706:	d00f      	beq.n	8008728 <HAL_ETH_IRQHandler+0x198>
  {
    /* Get MAC Wake-up source and clear the status register pending bit */
    heth->MACWakeUpEvent = READ_BIT(heth->Instance->MACPCSR, (ETH_MACPCSR_RWKPRCVD | ETH_MACPCSR_MGKPRCVD));
 8008708:	687b      	ldr	r3, [r7, #4]
 800870a:	681b      	ldr	r3, [r3, #0]
 800870c:	f8d3 30c0 	ldr.w	r3, [r3, #192]	@ 0xc0
 8008710:	f003 0260 	and.w	r2, r3, #96	@ 0x60
 8008714:	687b      	ldr	r3, [r7, #4]
 8008716:	f8c3 2094 	str.w	r2, [r3, #148]	@ 0x94
#if (USE_HAL_ETH_REGISTER_CALLBACKS == 1)
    /* Call registered PMT callback*/
    heth->PMTCallback(heth);
#else
    /* Ethernet PMT callback */
    HAL_ETH_PMTCallback(heth);
 800871a:	6878      	ldr	r0, [r7, #4]
 800871c:	f000 f82c 	bl	8008778 <HAL_ETH_PMTCallback>
#endif  /* USE_HAL_ETH_REGISTER_CALLBACKS */

    heth->MACWakeUpEvent = (uint32_t)(0x0U);
 8008720:	687b      	ldr	r3, [r7, #4]
 8008722:	2200      	movs	r2, #0
 8008724:	f8c3 2094 	str.w	r2, [r3, #148]	@ 0x94
  }

  /* ETH EEE IT */
  if ((mac_flag & ETH_MAC_LPI_IT) != 0U)
 8008728:	697b      	ldr	r3, [r7, #20]
 800872a:	f003 0320 	and.w	r3, r3, #32
 800872e:	2b00      	cmp	r3, #0
 8008730:	d00f      	beq.n	8008752 <HAL_ETH_IRQHandler+0x1c2>
  {
    /* Get MAC LPI interrupt source and clear the status register pending bit */
    heth->MACLPIEvent = READ_BIT(heth->Instance->MACLCSR, 0x0000000FU);
 8008732:	687b      	ldr	r3, [r7, #4]
 8008734:	681b      	ldr	r3, [r3, #0]
 8008736:	f8d3 30d0 	ldr.w	r3, [r3, #208]	@ 0xd0
 800873a:	f003 020f 	and.w	r2, r3, #15
 800873e:	687b      	ldr	r3, [r7, #4]
 8008740:	f8c3 2098 	str.w	r2, [r3, #152]	@ 0x98
#if (USE_HAL_ETH_REGISTER_CALLBACKS == 1)
    /* Call registered EEE callback*/
    heth->EEECallback(heth);
#else
    /* Ethernet EEE callback */
    HAL_ETH_EEECallback(heth);
 8008744:	6878      	ldr	r0, [r7, #4]
 8008746:	f000 f821 	bl	800878c <HAL_ETH_EEECallback>
#endif  /* USE_HAL_ETH_REGISTER_CALLBACKS */

    heth->MACLPIEvent = (uint32_t)(0x0U);
 800874a:	687b      	ldr	r3, [r7, #4]
 800874c:	2200      	movs	r2, #0
 800874e:	f8c3 2098 	str.w	r2, [r3, #152]	@ 0x98
#endif /* USE_HAL_ETH_REGISTER_CALLBACKS */
    }
  }
#else /* DUAL_CORE not defined */
  /* check ETH WAKEUP exti flag */
  if ((exti_d1_flag & ETH_WAKEUP_EXTI_LINE) != 0U)
 8008752:	68bb      	ldr	r3, [r7, #8]
 8008754:	f403 0380 	and.w	r3, r3, #4194304	@ 0x400000
 8008758:	2b00      	cmp	r3, #0
 800875a:	d006      	beq.n	800876a <HAL_ETH_IRQHandler+0x1da>
  {
    /* Clear ETH WAKEUP Exti pending bit */
    __HAL_ETH_WAKEUP_EXTI_CLEAR_FLAG(ETH_WAKEUP_EXTI_LINE);
 800875c:	4b05      	ldr	r3, [pc, #20]	@ (8008774 <HAL_ETH_IRQHandler+0x1e4>)
 800875e:	f44f 0280 	mov.w	r2, #4194304	@ 0x400000
 8008762:	629a      	str	r2, [r3, #40]	@ 0x28
#if (USE_HAL_ETH_REGISTER_CALLBACKS == 1)
    /* Call registered WakeUp callback*/
    heth->WakeUpCallback(heth);
#else
    /* ETH WAKEUP callback */
    HAL_ETH_WakeUpCallback(heth);
 8008764:	6878      	ldr	r0, [r7, #4]
 8008766:	f000 f81b 	bl	80087a0 <HAL_ETH_WakeUpCallback>
#endif /* USE_HAL_ETH_REGISTER_CALLBACKS */
  }
#endif /* DUAL_CORE */
}
 800876a:	bf00      	nop
 800876c:	3718      	adds	r7, #24
 800876e:	46bd      	mov	sp, r7
 8008770:	bd80      	pop	{r7, pc}
 8008772:	bf00      	nop
 8008774:	58000080 	.word	0x58000080

08008778 <HAL_ETH_PMTCallback>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval None
  */
__weak void HAL_ETH_PMTCallback(ETH_HandleTypeDef *heth)
{
 8008778:	b480      	push	{r7}
 800877a:	b083      	sub	sp, #12
 800877c:	af00      	add	r7, sp, #0
 800877e:	6078      	str	r0, [r7, #4]
  /* Prevent unused argument(s) compilation warning */
  UNUSED(heth);
  /* NOTE : This function Should not be modified, when the callback is needed,
  the HAL_ETH_PMTCallback could be implemented in the user file
  */
}
 8008780:	bf00      	nop
 8008782:	370c      	adds	r7, #12
 8008784:	46bd      	mov	sp, r7
 8008786:	f85d 7b04 	ldr.w	r7, [sp], #4
 800878a:	4770      	bx	lr

0800878c <HAL_ETH_EEECallback>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval None
  */
__weak void HAL_ETH_EEECallback(ETH_HandleTypeDef *heth)
{
 800878c:	b480      	push	{r7}
 800878e:	b083      	sub	sp, #12
 8008790:	af00      	add	r7, sp, #0
 8008792:	6078      	str	r0, [r7, #4]
  /* Prevent unused argument(s) compilation warning */
  UNUSED(heth);
  /* NOTE : This function Should not be modified, when the callback is needed,
  the HAL_ETH_EEECallback could be implemented in the user file
  */
}
 8008794:	bf00      	nop
 8008796:	370c      	adds	r7, #12
 8008798:	46bd      	mov	sp, r7
 800879a:	f85d 7b04 	ldr.w	r7, [sp], #4
 800879e:	4770      	bx	lr

080087a0 <HAL_ETH_WakeUpCallback>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval None
  */
__weak void HAL_ETH_WakeUpCallback(ETH_HandleTypeDef *heth)
{
 80087a0:	b480      	push	{r7}
 80087a2:	b083      	sub	sp, #12
 80087a4:	af00      	add	r7, sp, #0
 80087a6:	6078      	str	r0, [r7, #4]
  /* Prevent unused argument(s) compilation warning */
  UNUSED(heth);
  /* NOTE : This function Should not be modified, when the callback is needed,
            the HAL_ETH_WakeUpCallback could be implemented in the user file
   */
}
 80087a8:	bf00      	nop
 80087aa:	370c      	adds	r7, #12
 80087ac:	46bd      	mov	sp, r7
 80087ae:	f85d 7b04 	ldr.w	r7, [sp], #4
 80087b2:	4770      	bx	lr

080087b4 <HAL_ETH_ReadPHYRegister>:
  * @param pRegValue: parameter to hold read value
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_ETH_ReadPHYRegister(ETH_HandleTypeDef *heth, uint32_t PHYAddr, uint32_t PHYReg,
                                          uint32_t *pRegValue)
{
 80087b4:	b580      	push	{r7, lr}
 80087b6:	b086      	sub	sp, #24
 80087b8:	af00      	add	r7, sp, #0
 80087ba:	60f8      	str	r0, [r7, #12]
 80087bc:	60b9      	str	r1, [r7, #8]
 80087be:	607a      	str	r2, [r7, #4]
 80087c0:	603b      	str	r3, [r7, #0]
  uint32_t tickstart;
  uint32_t tmpreg;

  /* Check for the Busy flag */
  if (READ_BIT(heth->Instance->MACMDIOAR, ETH_MACMDIOAR_MB) != (uint32_t)RESET)
 80087c2:	68fb      	ldr	r3, [r7, #12]
 80087c4:	681b      	ldr	r3, [r3, #0]
 80087c6:	f8d3 3200 	ldr.w	r3, [r3, #512]	@ 0x200
 80087ca:	f003 0301 	and.w	r3, r3, #1
 80087ce:	2b00      	cmp	r3, #0
 80087d0:	d001      	beq.n	80087d6 <HAL_ETH_ReadPHYRegister+0x22>
  {
    return HAL_ERROR;
 80087d2:	2301      	movs	r3, #1
 80087d4:	e03e      	b.n	8008854 <HAL_ETH_ReadPHYRegister+0xa0>
  }

  /* Get the  MACMDIOAR value */
  WRITE_REG(tmpreg, heth->Instance->MACMDIOAR);
 80087d6:	68fb      	ldr	r3, [r7, #12]
 80087d8:	681b      	ldr	r3, [r3, #0]
 80087da:	f8d3 3200 	ldr.w	r3, [r3, #512]	@ 0x200
 80087de:	617b      	str	r3, [r7, #20]
     - Set the PHY device address
     - Set the PHY register address
     - Set the read mode
     - Set the MII Busy bit */

  MODIFY_REG(tmpreg, ETH_MACMDIOAR_PA, (PHYAddr << 21));
 80087e0:	697b      	ldr	r3, [r7, #20]
 80087e2:	f023 7278 	bic.w	r2, r3, #65011712	@ 0x3e00000
 80087e6:	68bb      	ldr	r3, [r7, #8]
 80087e8:	055b      	lsls	r3, r3, #21
 80087ea:	4313      	orrs	r3, r2
 80087ec:	617b      	str	r3, [r7, #20]
  MODIFY_REG(tmpreg, ETH_MACMDIOAR_RDA, (PHYReg << 16));
 80087ee:	697b      	ldr	r3, [r7, #20]
 80087f0:	f423 12f8 	bic.w	r2, r3, #2031616	@ 0x1f0000
 80087f4:	687b      	ldr	r3, [r7, #4]
 80087f6:	041b      	lsls	r3, r3, #16
 80087f8:	4313      	orrs	r3, r2
 80087fa:	617b      	str	r3, [r7, #20]
  MODIFY_REG(tmpreg, ETH_MACMDIOAR_MOC, ETH_MACMDIOAR_MOC_RD);
 80087fc:	697b      	ldr	r3, [r7, #20]
 80087fe:	f043 030c 	orr.w	r3, r3, #12
 8008802:	617b      	str	r3, [r7, #20]
  SET_BIT(tmpreg, ETH_MACMDIOAR_MB);
 8008804:	697b      	ldr	r3, [r7, #20]
 8008806:	f043 0301 	orr.w	r3, r3, #1
 800880a:	617b      	str	r3, [r7, #20]

  /* Write the result value into the MDII Address register */
  WRITE_REG(heth->Instance->MACMDIOAR, tmpreg);
 800880c:	68fb      	ldr	r3, [r7, #12]
 800880e:	681b      	ldr	r3, [r3, #0]
 8008810:	697a      	ldr	r2, [r7, #20]
 8008812:	f8c3 2200 	str.w	r2, [r3, #512]	@ 0x200

  tickstart = HAL_GetTick();
 8008816:	f7fc fd13 	bl	8005240 <HAL_GetTick>
 800881a:	6138      	str	r0, [r7, #16]

  /* Wait for the Busy flag */
  while (READ_BIT(heth->Instance->MACMDIOAR, ETH_MACMDIOAR_MB) > 0U)
 800881c:	e009      	b.n	8008832 <HAL_ETH_ReadPHYRegister+0x7e>
  {
    if (((HAL_GetTick() - tickstart) > ETH_MDIO_BUS_TIMEOUT))
 800881e:	f7fc fd0f 	bl	8005240 <HAL_GetTick>
 8008822:	4602      	mov	r2, r0
 8008824:	693b      	ldr	r3, [r7, #16]
 8008826:	1ad3      	subs	r3, r2, r3
 8008828:	f5b3 7f7a 	cmp.w	r3, #1000	@ 0x3e8
 800882c:	d901      	bls.n	8008832 <HAL_ETH_ReadPHYRegister+0x7e>
    {
      return HAL_ERROR;
 800882e:	2301      	movs	r3, #1
 8008830:	e010      	b.n	8008854 <HAL_ETH_ReadPHYRegister+0xa0>
  while (READ_BIT(heth->Instance->MACMDIOAR, ETH_MACMDIOAR_MB) > 0U)
 8008832:	68fb      	ldr	r3, [r7, #12]
 8008834:	681b      	ldr	r3, [r3, #0]
 8008836:	f8d3 3200 	ldr.w	r3, [r3, #512]	@ 0x200
 800883a:	f003 0301 	and.w	r3, r3, #1
 800883e:	2b00      	cmp	r3, #0
 8008840:	d1ed      	bne.n	800881e <HAL_ETH_ReadPHYRegister+0x6a>
    }
  }

  /* Get MACMIIDR value */
  WRITE_REG(*pRegValue, (uint16_t)heth->Instance->MACMDIODR);
 8008842:	68fb      	ldr	r3, [r7, #12]
 8008844:	681b      	ldr	r3, [r3, #0]
 8008846:	f8d3 3204 	ldr.w	r3, [r3, #516]	@ 0x204
 800884a:	b29b      	uxth	r3, r3
 800884c:	461a      	mov	r2, r3
 800884e:	683b      	ldr	r3, [r7, #0]
 8008850:	601a      	str	r2, [r3, #0]

  return HAL_OK;
 8008852:	2300      	movs	r3, #0
}
 8008854:	4618      	mov	r0, r3
 8008856:	3718      	adds	r7, #24
 8008858:	46bd      	mov	sp, r7
 800885a:	bd80      	pop	{r7, pc}

0800885c <HAL_ETH_WritePHYRegister>:
  * @param  RegValue: the value to write
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_ETH_WritePHYRegister(const ETH_HandleTypeDef *heth, uint32_t PHYAddr, uint32_t PHYReg,
                                           uint32_t RegValue)
{
 800885c:	b580      	push	{r7, lr}
 800885e:	b086      	sub	sp, #24
 8008860:	af00      	add	r7, sp, #0
 8008862:	60f8      	str	r0, [r7, #12]
 8008864:	60b9      	str	r1, [r7, #8]
 8008866:	607a      	str	r2, [r7, #4]
 8008868:	603b      	str	r3, [r7, #0]
  uint32_t tickstart;
  uint32_t tmpreg;

  /* Check for the Busy flag */
  if (READ_BIT(heth->Instance->MACMDIOAR, ETH_MACMDIOAR_MB) != (uint32_t)RESET)
 800886a:	68fb      	ldr	r3, [r7, #12]
 800886c:	681b      	ldr	r3, [r3, #0]
 800886e:	f8d3 3200 	ldr.w	r3, [r3, #512]	@ 0x200
 8008872:	f003 0301 	and.w	r3, r3, #1
 8008876:	2b00      	cmp	r3, #0
 8008878:	d001      	beq.n	800887e <HAL_ETH_WritePHYRegister+0x22>
  {
    return HAL_ERROR;
 800887a:	2301      	movs	r3, #1
 800887c:	e03c      	b.n	80088f8 <HAL_ETH_WritePHYRegister+0x9c>
  }

  /* Get the  MACMDIOAR value */
  WRITE_REG(tmpreg, heth->Instance->MACMDIOAR);
 800887e:	68fb      	ldr	r3, [r7, #12]
 8008880:	681b      	ldr	r3, [r3, #0]
 8008882:	f8d3 3200 	ldr.w	r3, [r3, #512]	@ 0x200
 8008886:	617b      	str	r3, [r7, #20]
     - Set the PHY device address
     - Set the PHY register address
     - Set the write mode
     - Set the MII Busy bit */

  MODIFY_REG(tmpreg, ETH_MACMDIOAR_PA, (PHYAddr << 21));
 8008888:	697b      	ldr	r3, [r7, #20]
 800888a:	f023 7278 	bic.w	r2, r3, #65011712	@ 0x3e00000
 800888e:	68bb      	ldr	r3, [r7, #8]
 8008890:	055b      	lsls	r3, r3, #21
 8008892:	4313      	orrs	r3, r2
 8008894:	617b      	str	r3, [r7, #20]
  MODIFY_REG(tmpreg, ETH_MACMDIOAR_RDA, (PHYReg << 16));
 8008896:	697b      	ldr	r3, [r7, #20]
 8008898:	f423 12f8 	bic.w	r2, r3, #2031616	@ 0x1f0000
 800889c:	687b      	ldr	r3, [r7, #4]
 800889e:	041b      	lsls	r3, r3, #16
 80088a0:	4313      	orrs	r3, r2
 80088a2:	617b      	str	r3, [r7, #20]
  MODIFY_REG(tmpreg, ETH_MACMDIOAR_MOC, ETH_MACMDIOAR_MOC_WR);
 80088a4:	697b      	ldr	r3, [r7, #20]
 80088a6:	f023 030c 	bic.w	r3, r3, #12
 80088aa:	f043 0304 	orr.w	r3, r3, #4
 80088ae:	617b      	str	r3, [r7, #20]
  SET_BIT(tmpreg, ETH_MACMDIOAR_MB);
 80088b0:	697b      	ldr	r3, [r7, #20]
 80088b2:	f043 0301 	orr.w	r3, r3, #1
 80088b6:	617b      	str	r3, [r7, #20]

  /* Give the value to the MII data register */
  WRITE_REG(ETH->MACMDIODR, (uint16_t)RegValue);
 80088b8:	683b      	ldr	r3, [r7, #0]
 80088ba:	b29a      	uxth	r2, r3
 80088bc:	4b10      	ldr	r3, [pc, #64]	@ (8008900 <HAL_ETH_WritePHYRegister+0xa4>)
 80088be:	f8c3 2204 	str.w	r2, [r3, #516]	@ 0x204

  /* Write the result value into the MII Address register */
  WRITE_REG(ETH->MACMDIOAR, tmpreg);
 80088c2:	4a0f      	ldr	r2, [pc, #60]	@ (8008900 <HAL_ETH_WritePHYRegister+0xa4>)
 80088c4:	697b      	ldr	r3, [r7, #20]
 80088c6:	f8c2 3200 	str.w	r3, [r2, #512]	@ 0x200

  tickstart = HAL_GetTick();
 80088ca:	f7fc fcb9 	bl	8005240 <HAL_GetTick>
 80088ce:	6138      	str	r0, [r7, #16]

  /* Wait for the Busy flag */
  while (READ_BIT(heth->Instance->MACMDIOAR, ETH_MACMDIOAR_MB) > 0U)
 80088d0:	e009      	b.n	80088e6 <HAL_ETH_WritePHYRegister+0x8a>
  {
    if (((HAL_GetTick() - tickstart) > ETH_MDIO_BUS_TIMEOUT))
 80088d2:	f7fc fcb5 	bl	8005240 <HAL_GetTick>
 80088d6:	4602      	mov	r2, r0
 80088d8:	693b      	ldr	r3, [r7, #16]
 80088da:	1ad3      	subs	r3, r2, r3
 80088dc:	f5b3 7f7a 	cmp.w	r3, #1000	@ 0x3e8
 80088e0:	d901      	bls.n	80088e6 <HAL_ETH_WritePHYRegister+0x8a>
    {
      return HAL_ERROR;
 80088e2:	2301      	movs	r3, #1
 80088e4:	e008      	b.n	80088f8 <HAL_ETH_WritePHYRegister+0x9c>
  while (READ_BIT(heth->Instance->MACMDIOAR, ETH_MACMDIOAR_MB) > 0U)
 80088e6:	68fb      	ldr	r3, [r7, #12]
 80088e8:	681b      	ldr	r3, [r3, #0]
 80088ea:	f8d3 3200 	ldr.w	r3, [r3, #512]	@ 0x200
 80088ee:	f003 0301 	and.w	r3, r3, #1
 80088f2:	2b00      	cmp	r3, #0
 80088f4:	d1ed      	bne.n	80088d2 <HAL_ETH_WritePHYRegister+0x76>
    }
  }

  return HAL_OK;
 80088f6:	2300      	movs	r3, #0
}
 80088f8:	4618      	mov	r0, r3
 80088fa:	3718      	adds	r7, #24
 80088fc:	46bd      	mov	sp, r7
 80088fe:	bd80      	pop	{r7, pc}
 8008900:	40028000 	.word	0x40028000

08008904 <HAL_ETH_GetMACConfig>:
  * @param  macconf: pointer to a ETH_MACConfigTypeDef structure that will hold
  *         the configuration of the MAC.
  * @retval HAL Status
  */
HAL_StatusTypeDef HAL_ETH_GetMACConfig(const ETH_HandleTypeDef *heth, ETH_MACConfigTypeDef *macconf)
{
 8008904:	b480      	push	{r7}
 8008906:	b083      	sub	sp, #12
 8008908:	af00      	add	r7, sp, #0
 800890a:	6078      	str	r0, [r7, #4]
 800890c:	6039      	str	r1, [r7, #0]
  if (macconf == NULL)
 800890e:	683b      	ldr	r3, [r7, #0]
 8008910:	2b00      	cmp	r3, #0
 8008912:	d101      	bne.n	8008918 <HAL_ETH_GetMACConfig+0x14>
  {
    return HAL_ERROR;
 8008914:	2301      	movs	r3, #1
 8008916:	e1c3      	b.n	8008ca0 <HAL_ETH_GetMACConfig+0x39c>
  }

  /* Get MAC parameters */
  macconf->PreambleLength = READ_BIT(heth->Instance->MACCR, ETH_MACCR_PRELEN);
 8008918:	687b      	ldr	r3, [r7, #4]
 800891a:	681b      	ldr	r3, [r3, #0]
 800891c:	681b      	ldr	r3, [r3, #0]
 800891e:	f003 020c 	and.w	r2, r3, #12
 8008922:	683b      	ldr	r3, [r7, #0]
 8008924:	62da      	str	r2, [r3, #44]	@ 0x2c
  macconf->DeferralCheck = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_DC) >> 4) > 0U) ? ENABLE : DISABLE;
 8008926:	687b      	ldr	r3, [r7, #4]
 8008928:	681b      	ldr	r3, [r3, #0]
 800892a:	681b      	ldr	r3, [r3, #0]
 800892c:	f003 0310 	and.w	r3, r3, #16
 8008930:	2b00      	cmp	r3, #0
 8008932:	bf14      	ite	ne
 8008934:	2301      	movne	r3, #1
 8008936:	2300      	moveq	r3, #0
 8008938:	b2db      	uxtb	r3, r3
 800893a:	461a      	mov	r2, r3
 800893c:	683b      	ldr	r3, [r7, #0]
 800893e:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
  macconf->BackOffLimit = READ_BIT(heth->Instance->MACCR, ETH_MACCR_BL);
 8008942:	687b      	ldr	r3, [r7, #4]
 8008944:	681b      	ldr	r3, [r3, #0]
 8008946:	681b      	ldr	r3, [r3, #0]
 8008948:	f003 0260 	and.w	r2, r3, #96	@ 0x60
 800894c:	683b      	ldr	r3, [r7, #0]
 800894e:	625a      	str	r2, [r3, #36]	@ 0x24
  macconf->RetryTransmission = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_DR) >> 8) == 0U) ? ENABLE : DISABLE;
 8008950:	687b      	ldr	r3, [r7, #4]
 8008952:	681b      	ldr	r3, [r3, #0]
 8008954:	681b      	ldr	r3, [r3, #0]
 8008956:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 800895a:	2b00      	cmp	r3, #0
 800895c:	bf0c      	ite	eq
 800895e:	2301      	moveq	r3, #1
 8008960:	2300      	movne	r3, #0
 8008962:	b2db      	uxtb	r3, r3
 8008964:	461a      	mov	r2, r3
 8008966:	683b      	ldr	r3, [r7, #0]
 8008968:	f883 2020 	strb.w	r2, [r3, #32]
  macconf->CarrierSenseDuringTransmit = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_DCRS) >> 9) > 0U)
 800896c:	687b      	ldr	r3, [r7, #4]
 800896e:	681b      	ldr	r3, [r3, #0]
 8008970:	681b      	ldr	r3, [r3, #0]
 8008972:	f403 7300 	and.w	r3, r3, #512	@ 0x200
                                        ? ENABLE : DISABLE;
 8008976:	2b00      	cmp	r3, #0
 8008978:	bf14      	ite	ne
 800897a:	2301      	movne	r3, #1
 800897c:	2300      	moveq	r3, #0
 800897e:	b2db      	uxtb	r3, r3
 8008980:	461a      	mov	r2, r3
  macconf->CarrierSenseDuringTransmit = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_DCRS) >> 9) > 0U)
 8008982:	683b      	ldr	r3, [r7, #0]
 8008984:	77da      	strb	r2, [r3, #31]
  macconf->ReceiveOwn = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_DO) >> 10) == 0U) ? ENABLE : DISABLE;
 8008986:	687b      	ldr	r3, [r7, #4]
 8008988:	681b      	ldr	r3, [r3, #0]
 800898a:	681b      	ldr	r3, [r3, #0]
 800898c:	f403 6380 	and.w	r3, r3, #1024	@ 0x400
 8008990:	2b00      	cmp	r3, #0
 8008992:	bf0c      	ite	eq
 8008994:	2301      	moveq	r3, #1
 8008996:	2300      	movne	r3, #0
 8008998:	b2db      	uxtb	r3, r3
 800899a:	461a      	mov	r2, r3
 800899c:	683b      	ldr	r3, [r7, #0]
 800899e:	779a      	strb	r2, [r3, #30]
  macconf->CarrierSenseBeforeTransmit = ((READ_BIT(heth->Instance->MACCR,
 80089a0:	687b      	ldr	r3, [r7, #4]
 80089a2:	681b      	ldr	r3, [r3, #0]
 80089a4:	681b      	ldr	r3, [r3, #0]
                                                   ETH_MACCR_ECRSFD) >> 11) > 0U) ? ENABLE : DISABLE;
 80089a6:	f403 6300 	and.w	r3, r3, #2048	@ 0x800
 80089aa:	2b00      	cmp	r3, #0
 80089ac:	bf14      	ite	ne
 80089ae:	2301      	movne	r3, #1
 80089b0:	2300      	moveq	r3, #0
 80089b2:	b2db      	uxtb	r3, r3
 80089b4:	461a      	mov	r2, r3
  macconf->CarrierSenseBeforeTransmit = ((READ_BIT(heth->Instance->MACCR,
 80089b6:	683b      	ldr	r3, [r7, #0]
 80089b8:	775a      	strb	r2, [r3, #29]
  macconf->LoopbackMode = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_LM) >> 12) > 0U) ? ENABLE : DISABLE;
 80089ba:	687b      	ldr	r3, [r7, #4]
 80089bc:	681b      	ldr	r3, [r3, #0]
 80089be:	681b      	ldr	r3, [r3, #0]
 80089c0:	f403 5380 	and.w	r3, r3, #4096	@ 0x1000
 80089c4:	2b00      	cmp	r3, #0
 80089c6:	bf14      	ite	ne
 80089c8:	2301      	movne	r3, #1
 80089ca:	2300      	moveq	r3, #0
 80089cc:	b2db      	uxtb	r3, r3
 80089ce:	461a      	mov	r2, r3
 80089d0:	683b      	ldr	r3, [r7, #0]
 80089d2:	771a      	strb	r2, [r3, #28]
  macconf->DuplexMode = READ_BIT(heth->Instance->MACCR, ETH_MACCR_DM);
 80089d4:	687b      	ldr	r3, [r7, #4]
 80089d6:	681b      	ldr	r3, [r3, #0]
 80089d8:	681b      	ldr	r3, [r3, #0]
 80089da:	f403 5200 	and.w	r2, r3, #8192	@ 0x2000
 80089de:	683b      	ldr	r3, [r7, #0]
 80089e0:	619a      	str	r2, [r3, #24]
  macconf->Speed = READ_BIT(heth->Instance->MACCR, ETH_MACCR_FES);
 80089e2:	687b      	ldr	r3, [r7, #4]
 80089e4:	681b      	ldr	r3, [r3, #0]
 80089e6:	681b      	ldr	r3, [r3, #0]
 80089e8:	f403 4280 	and.w	r2, r3, #16384	@ 0x4000
 80089ec:	683b      	ldr	r3, [r7, #0]
 80089ee:	615a      	str	r2, [r3, #20]
  macconf->JumboPacket = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_JE) >> 16) > 0U) ? ENABLE : DISABLE;
 80089f0:	687b      	ldr	r3, [r7, #4]
 80089f2:	681b      	ldr	r3, [r3, #0]
 80089f4:	681b      	ldr	r3, [r3, #0]
 80089f6:	f403 3380 	and.w	r3, r3, #65536	@ 0x10000
 80089fa:	2b00      	cmp	r3, #0
 80089fc:	bf14      	ite	ne
 80089fe:	2301      	movne	r3, #1
 8008a00:	2300      	moveq	r3, #0
 8008a02:	b2db      	uxtb	r3, r3
 8008a04:	461a      	mov	r2, r3
 8008a06:	683b      	ldr	r3, [r7, #0]
 8008a08:	749a      	strb	r2, [r3, #18]
  macconf->Jabber = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_JD) >> 17) == 0U) ? ENABLE : DISABLE;
 8008a0a:	687b      	ldr	r3, [r7, #4]
 8008a0c:	681b      	ldr	r3, [r3, #0]
 8008a0e:	681b      	ldr	r3, [r3, #0]
 8008a10:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
 8008a14:	2b00      	cmp	r3, #0
 8008a16:	bf0c      	ite	eq
 8008a18:	2301      	moveq	r3, #1
 8008a1a:	2300      	movne	r3, #0
 8008a1c:	b2db      	uxtb	r3, r3
 8008a1e:	461a      	mov	r2, r3
 8008a20:	683b      	ldr	r3, [r7, #0]
 8008a22:	745a      	strb	r2, [r3, #17]
  macconf->Watchdog = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_WD) >> 19) == 0U) ? ENABLE : DISABLE;
 8008a24:	687b      	ldr	r3, [r7, #4]
 8008a26:	681b      	ldr	r3, [r3, #0]
 8008a28:	681b      	ldr	r3, [r3, #0]
 8008a2a:	f403 2300 	and.w	r3, r3, #524288	@ 0x80000
 8008a2e:	2b00      	cmp	r3, #0
 8008a30:	bf0c      	ite	eq
 8008a32:	2301      	moveq	r3, #1
 8008a34:	2300      	movne	r3, #0
 8008a36:	b2db      	uxtb	r3, r3
 8008a38:	461a      	mov	r2, r3
 8008a3a:	683b      	ldr	r3, [r7, #0]
 8008a3c:	741a      	strb	r2, [r3, #16]
  macconf->AutomaticPadCRCStrip = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_ACS) >> 20) > 0U) ? ENABLE : DISABLE;
 8008a3e:	687b      	ldr	r3, [r7, #4]
 8008a40:	681b      	ldr	r3, [r3, #0]
 8008a42:	681b      	ldr	r3, [r3, #0]
 8008a44:	f403 1380 	and.w	r3, r3, #1048576	@ 0x100000
 8008a48:	2b00      	cmp	r3, #0
 8008a4a:	bf14      	ite	ne
 8008a4c:	2301      	movne	r3, #1
 8008a4e:	2300      	moveq	r3, #0
 8008a50:	b2db      	uxtb	r3, r3
 8008a52:	461a      	mov	r2, r3
 8008a54:	683b      	ldr	r3, [r7, #0]
 8008a56:	73da      	strb	r2, [r3, #15]
  macconf->CRCStripTypePacket = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_CST) >> 21) > 0U) ? ENABLE : DISABLE;
 8008a58:	687b      	ldr	r3, [r7, #4]
 8008a5a:	681b      	ldr	r3, [r3, #0]
 8008a5c:	681b      	ldr	r3, [r3, #0]
 8008a5e:	f403 1300 	and.w	r3, r3, #2097152	@ 0x200000
 8008a62:	2b00      	cmp	r3, #0
 8008a64:	bf14      	ite	ne
 8008a66:	2301      	movne	r3, #1
 8008a68:	2300      	moveq	r3, #0
 8008a6a:	b2db      	uxtb	r3, r3
 8008a6c:	461a      	mov	r2, r3
 8008a6e:	683b      	ldr	r3, [r7, #0]
 8008a70:	739a      	strb	r2, [r3, #14]
  macconf->Support2KPacket = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_S2KP) >> 22) > 0U) ? ENABLE : DISABLE;
 8008a72:	687b      	ldr	r3, [r7, #4]
 8008a74:	681b      	ldr	r3, [r3, #0]
 8008a76:	681b      	ldr	r3, [r3, #0]
 8008a78:	f403 0380 	and.w	r3, r3, #4194304	@ 0x400000
 8008a7c:	2b00      	cmp	r3, #0
 8008a7e:	bf14      	ite	ne
 8008a80:	2301      	movne	r3, #1
 8008a82:	2300      	moveq	r3, #0
 8008a84:	b2db      	uxtb	r3, r3
 8008a86:	461a      	mov	r2, r3
 8008a88:	683b      	ldr	r3, [r7, #0]
 8008a8a:	735a      	strb	r2, [r3, #13]
  macconf->GiantPacketSizeLimitControl = ((READ_BIT(heth->Instance->MACCR,
 8008a8c:	687b      	ldr	r3, [r7, #4]
 8008a8e:	681b      	ldr	r3, [r3, #0]
 8008a90:	681b      	ldr	r3, [r3, #0]
                                                    ETH_MACCR_GPSLCE) >> 23) > 0U) ? ENABLE : DISABLE;
 8008a92:	f403 0300 	and.w	r3, r3, #8388608	@ 0x800000
 8008a96:	2b00      	cmp	r3, #0
 8008a98:	bf14      	ite	ne
 8008a9a:	2301      	movne	r3, #1
 8008a9c:	2300      	moveq	r3, #0
 8008a9e:	b2db      	uxtb	r3, r3
 8008aa0:	461a      	mov	r2, r3
  macconf->GiantPacketSizeLimitControl = ((READ_BIT(heth->Instance->MACCR,
 8008aa2:	683b      	ldr	r3, [r7, #0]
 8008aa4:	731a      	strb	r2, [r3, #12]
  macconf->InterPacketGapVal = READ_BIT(heth->Instance->MACCR, ETH_MACCR_IPG);
 8008aa6:	687b      	ldr	r3, [r7, #4]
 8008aa8:	681b      	ldr	r3, [r3, #0]
 8008aaa:	681b      	ldr	r3, [r3, #0]
 8008aac:	f003 62e0 	and.w	r2, r3, #117440512	@ 0x7000000
 8008ab0:	683b      	ldr	r3, [r7, #0]
 8008ab2:	609a      	str	r2, [r3, #8]
  macconf->ChecksumOffload = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_IPC) >> 27) > 0U) ? ENABLE : DISABLE;
 8008ab4:	687b      	ldr	r3, [r7, #4]
 8008ab6:	681b      	ldr	r3, [r3, #0]
 8008ab8:	681b      	ldr	r3, [r3, #0]
 8008aba:	f003 6300 	and.w	r3, r3, #134217728	@ 0x8000000
 8008abe:	2b00      	cmp	r3, #0
 8008ac0:	bf14      	ite	ne
 8008ac2:	2301      	movne	r3, #1
 8008ac4:	2300      	moveq	r3, #0
 8008ac6:	b2db      	uxtb	r3, r3
 8008ac8:	461a      	mov	r2, r3
 8008aca:	683b      	ldr	r3, [r7, #0]
 8008acc:	711a      	strb	r2, [r3, #4]
  macconf->SourceAddrControl = READ_BIT(heth->Instance->MACCR, ETH_MACCR_SARC);
 8008ace:	687b      	ldr	r3, [r7, #4]
 8008ad0:	681b      	ldr	r3, [r3, #0]
 8008ad2:	681b      	ldr	r3, [r3, #0]
 8008ad4:	f003 42e0 	and.w	r2, r3, #1879048192	@ 0x70000000
 8008ad8:	683b      	ldr	r3, [r7, #0]
 8008ada:	601a      	str	r2, [r3, #0]

  macconf->GiantPacketSizeLimit = READ_BIT(heth->Instance->MACECR, ETH_MACECR_GPSL);
 8008adc:	687b      	ldr	r3, [r7, #4]
 8008ade:	681b      	ldr	r3, [r3, #0]
 8008ae0:	685b      	ldr	r3, [r3, #4]
 8008ae2:	f3c3 020d 	ubfx	r2, r3, #0, #14
 8008ae6:	683b      	ldr	r3, [r7, #0]
 8008ae8:	635a      	str	r2, [r3, #52]	@ 0x34
  macconf->CRCCheckingRxPackets = ((READ_BIT(heth->Instance->MACECR, ETH_MACECR_DCRCC) >> 16) == 0U) ? ENABLE : DISABLE;
 8008aea:	687b      	ldr	r3, [r7, #4]
 8008aec:	681b      	ldr	r3, [r3, #0]
 8008aee:	685b      	ldr	r3, [r3, #4]
 8008af0:	f403 3380 	and.w	r3, r3, #65536	@ 0x10000
 8008af4:	2b00      	cmp	r3, #0
 8008af6:	bf0c      	ite	eq
 8008af8:	2301      	moveq	r3, #1
 8008afa:	2300      	movne	r3, #0
 8008afc:	b2db      	uxtb	r3, r3
 8008afe:	461a      	mov	r2, r3
 8008b00:	683b      	ldr	r3, [r7, #0]
 8008b02:	f883 2032 	strb.w	r2, [r3, #50]	@ 0x32
  macconf->SlowProtocolDetect = ((READ_BIT(heth->Instance->MACECR, ETH_MACECR_SPEN) >> 17) > 0U) ? ENABLE : DISABLE;
 8008b06:	687b      	ldr	r3, [r7, #4]
 8008b08:	681b      	ldr	r3, [r3, #0]
 8008b0a:	685b      	ldr	r3, [r3, #4]
 8008b0c:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
 8008b10:	2b00      	cmp	r3, #0
 8008b12:	bf14      	ite	ne
 8008b14:	2301      	movne	r3, #1
 8008b16:	2300      	moveq	r3, #0
 8008b18:	b2db      	uxtb	r3, r3
 8008b1a:	461a      	mov	r2, r3
 8008b1c:	683b      	ldr	r3, [r7, #0]
 8008b1e:	f883 2031 	strb.w	r2, [r3, #49]	@ 0x31
  macconf->UnicastSlowProtocolPacketDetect = ((READ_BIT(heth->Instance->MACECR,
 8008b22:	687b      	ldr	r3, [r7, #4]
 8008b24:	681b      	ldr	r3, [r3, #0]
 8008b26:	685b      	ldr	r3, [r3, #4]
                                                        ETH_MACECR_USP) >> 18) > 0U) ? ENABLE : DISABLE;
 8008b28:	f403 2380 	and.w	r3, r3, #262144	@ 0x40000
 8008b2c:	2b00      	cmp	r3, #0
 8008b2e:	bf14      	ite	ne
 8008b30:	2301      	movne	r3, #1
 8008b32:	2300      	moveq	r3, #0
 8008b34:	b2db      	uxtb	r3, r3
 8008b36:	461a      	mov	r2, r3
  macconf->UnicastSlowProtocolPacketDetect = ((READ_BIT(heth->Instance->MACECR,
 8008b38:	683b      	ldr	r3, [r7, #0]
 8008b3a:	f883 2030 	strb.w	r2, [r3, #48]	@ 0x30
  macconf->ExtendedInterPacketGap = ((READ_BIT(heth->Instance->MACECR, ETH_MACECR_EIPGEN) >> 24) > 0U)
 8008b3e:	687b      	ldr	r3, [r7, #4]
 8008b40:	681b      	ldr	r3, [r3, #0]
 8008b42:	685b      	ldr	r3, [r3, #4]
 8008b44:	f003 7380 	and.w	r3, r3, #16777216	@ 0x1000000
                                    ? ENABLE : DISABLE;
 8008b48:	2b00      	cmp	r3, #0
 8008b4a:	bf14      	ite	ne
 8008b4c:	2301      	movne	r3, #1
 8008b4e:	2300      	moveq	r3, #0
 8008b50:	b2db      	uxtb	r3, r3
 8008b52:	461a      	mov	r2, r3
  macconf->ExtendedInterPacketGap = ((READ_BIT(heth->Instance->MACECR, ETH_MACECR_EIPGEN) >> 24) > 0U)
 8008b54:	683b      	ldr	r3, [r7, #0]
 8008b56:	f883 2038 	strb.w	r2, [r3, #56]	@ 0x38
  macconf->ExtendedInterPacketGapVal = READ_BIT(heth->Instance->MACECR, ETH_MACECR_EIPG) >> 25;
 8008b5a:	687b      	ldr	r3, [r7, #4]
 8008b5c:	681b      	ldr	r3, [r3, #0]
 8008b5e:	685b      	ldr	r3, [r3, #4]
 8008b60:	0e5b      	lsrs	r3, r3, #25
 8008b62:	f003 021f 	and.w	r2, r3, #31
 8008b66:	683b      	ldr	r3, [r7, #0]
 8008b68:	63da      	str	r2, [r3, #60]	@ 0x3c

  macconf->ProgrammableWatchdog = ((READ_BIT(heth->Instance->MACWTR, ETH_MACWTR_PWE) >> 8) > 0U) ? ENABLE : DISABLE;
 8008b6a:	687b      	ldr	r3, [r7, #4]
 8008b6c:	681b      	ldr	r3, [r3, #0]
 8008b6e:	68db      	ldr	r3, [r3, #12]
 8008b70:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 8008b74:	2b00      	cmp	r3, #0
 8008b76:	bf14      	ite	ne
 8008b78:	2301      	movne	r3, #1
 8008b7a:	2300      	moveq	r3, #0
 8008b7c:	b2db      	uxtb	r3, r3
 8008b7e:	461a      	mov	r2, r3
 8008b80:	683b      	ldr	r3, [r7, #0]
 8008b82:	f883 2040 	strb.w	r2, [r3, #64]	@ 0x40
  macconf->WatchdogTimeout = READ_BIT(heth->Instance->MACWTR, ETH_MACWTR_WTO);
 8008b86:	687b      	ldr	r3, [r7, #4]
 8008b88:	681b      	ldr	r3, [r3, #0]
 8008b8a:	68db      	ldr	r3, [r3, #12]
 8008b8c:	f003 020f 	and.w	r2, r3, #15
 8008b90:	683b      	ldr	r3, [r7, #0]
 8008b92:	645a      	str	r2, [r3, #68]	@ 0x44

  macconf->TransmitFlowControl = ((READ_BIT(heth->Instance->MACTFCR, ETH_MACTFCR_TFE) >> 1) > 0U) ? ENABLE : DISABLE;
 8008b94:	687b      	ldr	r3, [r7, #4]
 8008b96:	681b      	ldr	r3, [r3, #0]
 8008b98:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 8008b9a:	f003 0302 	and.w	r3, r3, #2
 8008b9e:	2b00      	cmp	r3, #0
 8008ba0:	bf14      	ite	ne
 8008ba2:	2301      	movne	r3, #1
 8008ba4:	2300      	moveq	r3, #0
 8008ba6:	b2db      	uxtb	r3, r3
 8008ba8:	461a      	mov	r2, r3
 8008baa:	683b      	ldr	r3, [r7, #0]
 8008bac:	f883 2054 	strb.w	r2, [r3, #84]	@ 0x54
  macconf->ZeroQuantaPause = ((READ_BIT(heth->Instance->MACTFCR, ETH_MACTFCR_DZPQ) >> 7) == 0U) ? ENABLE : DISABLE;
 8008bb0:	687b      	ldr	r3, [r7, #4]
 8008bb2:	681b      	ldr	r3, [r3, #0]
 8008bb4:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 8008bb6:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 8008bba:	2b00      	cmp	r3, #0
 8008bbc:	bf0c      	ite	eq
 8008bbe:	2301      	moveq	r3, #1
 8008bc0:	2300      	movne	r3, #0
 8008bc2:	b2db      	uxtb	r3, r3
 8008bc4:	461a      	mov	r2, r3
 8008bc6:	683b      	ldr	r3, [r7, #0]
 8008bc8:	f883 204c 	strb.w	r2, [r3, #76]	@ 0x4c
  macconf->PauseLowThreshold = READ_BIT(heth->Instance->MACTFCR, ETH_MACTFCR_PLT);
 8008bcc:	687b      	ldr	r3, [r7, #4]
 8008bce:	681b      	ldr	r3, [r3, #0]
 8008bd0:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 8008bd2:	f003 0270 	and.w	r2, r3, #112	@ 0x70
 8008bd6:	683b      	ldr	r3, [r7, #0]
 8008bd8:	651a      	str	r2, [r3, #80]	@ 0x50
  macconf->PauseTime = (READ_BIT(heth->Instance->MACTFCR, ETH_MACTFCR_PT) >> 16);
 8008bda:	687b      	ldr	r3, [r7, #4]
 8008bdc:	681b      	ldr	r3, [r3, #0]
 8008bde:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 8008be0:	0c1b      	lsrs	r3, r3, #16
 8008be2:	b29a      	uxth	r2, r3
 8008be4:	683b      	ldr	r3, [r7, #0]
 8008be6:	649a      	str	r2, [r3, #72]	@ 0x48
  macconf->ReceiveFlowControl = (READ_BIT(heth->Instance->MACRFCR, ETH_MACRFCR_RFE) > 0U) ? ENABLE : DISABLE;
 8008be8:	687b      	ldr	r3, [r7, #4]
 8008bea:	681b      	ldr	r3, [r3, #0]
 8008bec:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 8008bf0:	f003 0301 	and.w	r3, r3, #1
 8008bf4:	2b00      	cmp	r3, #0
 8008bf6:	bf14      	ite	ne
 8008bf8:	2301      	movne	r3, #1
 8008bfa:	2300      	moveq	r3, #0
 8008bfc:	b2db      	uxtb	r3, r3
 8008bfe:	461a      	mov	r2, r3
 8008c00:	683b      	ldr	r3, [r7, #0]
 8008c02:	f883 2056 	strb.w	r2, [r3, #86]	@ 0x56
  macconf->UnicastPausePacketDetect = ((READ_BIT(heth->Instance->MACRFCR, ETH_MACRFCR_UP) >> 1) > 0U)
 8008c06:	687b      	ldr	r3, [r7, #4]
 8008c08:	681b      	ldr	r3, [r3, #0]
 8008c0a:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 8008c0e:	f003 0302 	and.w	r3, r3, #2
                                      ? ENABLE : DISABLE;
 8008c12:	2b00      	cmp	r3, #0
 8008c14:	bf14      	ite	ne
 8008c16:	2301      	movne	r3, #1
 8008c18:	2300      	moveq	r3, #0
 8008c1a:	b2db      	uxtb	r3, r3
 8008c1c:	461a      	mov	r2, r3
  macconf->UnicastPausePacketDetect = ((READ_BIT(heth->Instance->MACRFCR, ETH_MACRFCR_UP) >> 1) > 0U)
 8008c1e:	683b      	ldr	r3, [r7, #0]
 8008c20:	f883 2055 	strb.w	r2, [r3, #85]	@ 0x55

  macconf->TransmitQueueMode = READ_BIT(heth->Instance->MTLTQOMR, (ETH_MTLTQOMR_TTC | ETH_MTLTQOMR_TSF));
 8008c24:	687b      	ldr	r3, [r7, #4]
 8008c26:	681b      	ldr	r3, [r3, #0]
 8008c28:	f8d3 3d00 	ldr.w	r3, [r3, #3328]	@ 0xd00
 8008c2c:	f003 0272 	and.w	r2, r3, #114	@ 0x72
 8008c30:	683b      	ldr	r3, [r7, #0]
 8008c32:	659a      	str	r2, [r3, #88]	@ 0x58

  macconf->ReceiveQueueMode = READ_BIT(heth->Instance->MTLRQOMR, (ETH_MTLRQOMR_RTC | ETH_MTLRQOMR_RSF));
 8008c34:	687b      	ldr	r3, [r7, #4]
 8008c36:	681b      	ldr	r3, [r3, #0]
 8008c38:	f8d3 3d30 	ldr.w	r3, [r3, #3376]	@ 0xd30
 8008c3c:	f003 0223 	and.w	r2, r3, #35	@ 0x23
 8008c40:	683b      	ldr	r3, [r7, #0]
 8008c42:	65da      	str	r2, [r3, #92]	@ 0x5c
  macconf->ForwardRxUndersizedGoodPacket = ((READ_BIT(heth->Instance->MTLRQOMR,
 8008c44:	687b      	ldr	r3, [r7, #4]
 8008c46:	681b      	ldr	r3, [r3, #0]
 8008c48:	f8d3 3d30 	ldr.w	r3, [r3, #3376]	@ 0xd30
                                                      ETH_MTLRQOMR_FUP) >> 3) > 0U) ? ENABLE : DISABLE;
 8008c4c:	f003 0308 	and.w	r3, r3, #8
 8008c50:	2b00      	cmp	r3, #0
 8008c52:	bf14      	ite	ne
 8008c54:	2301      	movne	r3, #1
 8008c56:	2300      	moveq	r3, #0
 8008c58:	b2db      	uxtb	r3, r3
 8008c5a:	461a      	mov	r2, r3
  macconf->ForwardRxUndersizedGoodPacket = ((READ_BIT(heth->Instance->MTLRQOMR,
 8008c5c:	683b      	ldr	r3, [r7, #0]
 8008c5e:	f883 2062 	strb.w	r2, [r3, #98]	@ 0x62
  macconf->ForwardRxErrorPacket = ((READ_BIT(heth->Instance->MTLRQOMR, ETH_MTLRQOMR_FEP) >> 4) > 0U) ? ENABLE : DISABLE;
 8008c62:	687b      	ldr	r3, [r7, #4]
 8008c64:	681b      	ldr	r3, [r3, #0]
 8008c66:	f8d3 3d30 	ldr.w	r3, [r3, #3376]	@ 0xd30
 8008c6a:	f003 0310 	and.w	r3, r3, #16
 8008c6e:	2b00      	cmp	r3, #0
 8008c70:	bf14      	ite	ne
 8008c72:	2301      	movne	r3, #1
 8008c74:	2300      	moveq	r3, #0
 8008c76:	b2db      	uxtb	r3, r3
 8008c78:	461a      	mov	r2, r3
 8008c7a:	683b      	ldr	r3, [r7, #0]
 8008c7c:	f883 2061 	strb.w	r2, [r3, #97]	@ 0x61
  macconf->DropTCPIPChecksumErrorPacket = ((READ_BIT(heth->Instance->MTLRQOMR,
 8008c80:	687b      	ldr	r3, [r7, #4]
 8008c82:	681b      	ldr	r3, [r3, #0]
 8008c84:	f8d3 3d30 	ldr.w	r3, [r3, #3376]	@ 0xd30
                                                     ETH_MTLRQOMR_DISTCPEF) >> 6) == 0U) ? ENABLE : DISABLE;
 8008c88:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 8008c8c:	2b00      	cmp	r3, #0
 8008c8e:	bf0c      	ite	eq
 8008c90:	2301      	moveq	r3, #1
 8008c92:	2300      	movne	r3, #0
 8008c94:	b2db      	uxtb	r3, r3
 8008c96:	461a      	mov	r2, r3
  macconf->DropTCPIPChecksumErrorPacket = ((READ_BIT(heth->Instance->MTLRQOMR,
 8008c98:	683b      	ldr	r3, [r7, #0]
 8008c9a:	f883 2060 	strb.w	r2, [r3, #96]	@ 0x60

  return HAL_OK;
 8008c9e:	2300      	movs	r3, #0
}
 8008ca0:	4618      	mov	r0, r3
 8008ca2:	370c      	adds	r7, #12
 8008ca4:	46bd      	mov	sp, r7
 8008ca6:	f85d 7b04 	ldr.w	r7, [sp], #4
 8008caa:	4770      	bx	lr

08008cac <HAL_ETH_SetMACConfig>:
  * @param  macconf: pointer to a ETH_MACConfigTypeDef structure that contains
  *         the configuration of the MAC.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_ETH_SetMACConfig(ETH_HandleTypeDef *heth,  ETH_MACConfigTypeDef *macconf)
{
 8008cac:	b580      	push	{r7, lr}
 8008cae:	b082      	sub	sp, #8
 8008cb0:	af00      	add	r7, sp, #0
 8008cb2:	6078      	str	r0, [r7, #4]
 8008cb4:	6039      	str	r1, [r7, #0]
  if (macconf == NULL)
 8008cb6:	683b      	ldr	r3, [r7, #0]
 8008cb8:	2b00      	cmp	r3, #0
 8008cba:	d101      	bne.n	8008cc0 <HAL_ETH_SetMACConfig+0x14>
  {
    return HAL_ERROR;
 8008cbc:	2301      	movs	r3, #1
 8008cbe:	e00b      	b.n	8008cd8 <HAL_ETH_SetMACConfig+0x2c>
  }

  if (heth->gState == HAL_ETH_STATE_READY)
 8008cc0:	687b      	ldr	r3, [r7, #4]
 8008cc2:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 8008cc6:	2b10      	cmp	r3, #16
 8008cc8:	d105      	bne.n	8008cd6 <HAL_ETH_SetMACConfig+0x2a>
  {
    ETH_SetMACConfig(heth, macconf);
 8008cca:	6839      	ldr	r1, [r7, #0]
 8008ccc:	6878      	ldr	r0, [r7, #4]
 8008cce:	f000 f865 	bl	8008d9c <ETH_SetMACConfig>

    return HAL_OK;
 8008cd2:	2300      	movs	r3, #0
 8008cd4:	e000      	b.n	8008cd8 <HAL_ETH_SetMACConfig+0x2c>
  }
  else
  {
    return HAL_ERROR;
 8008cd6:	2301      	movs	r3, #1
  }
}
 8008cd8:	4618      	mov	r0, r3
 8008cda:	3708      	adds	r7, #8
 8008cdc:	46bd      	mov	sp, r7
 8008cde:	bd80      	pop	{r7, pc}

08008ce0 <HAL_ETH_SetMDIOClockRange>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval None
  */
void HAL_ETH_SetMDIOClockRange(ETH_HandleTypeDef *heth)
{
 8008ce0:	b580      	push	{r7, lr}
 8008ce2:	b084      	sub	sp, #16
 8008ce4:	af00      	add	r7, sp, #0
 8008ce6:	6078      	str	r0, [r7, #4]
  uint32_t hclk;
  uint32_t tmpreg;

  /* Get the ETHERNET MACMDIOAR value */
  tmpreg = (heth->Instance)->MACMDIOAR;
 8008ce8:	687b      	ldr	r3, [r7, #4]
 8008cea:	681b      	ldr	r3, [r3, #0]
 8008cec:	f8d3 3200 	ldr.w	r3, [r3, #512]	@ 0x200
 8008cf0:	60fb      	str	r3, [r7, #12]

  /* Clear CSR Clock Range bits */
  tmpreg &= ~ETH_MACMDIOAR_CR;
 8008cf2:	68fb      	ldr	r3, [r7, #12]
 8008cf4:	f423 6370 	bic.w	r3, r3, #3840	@ 0xf00
 8008cf8:	60fb      	str	r3, [r7, #12]

  /* Get hclk frequency value */
  hclk = HAL_RCC_GetHCLKFreq();
 8008cfa:	f002 f86f 	bl	800addc <HAL_RCC_GetHCLKFreq>
 8008cfe:	60b8      	str	r0, [r7, #8]

  /* Set CR bits depending on hclk value */
  if (hclk < 35000000U)
 8008d00:	68bb      	ldr	r3, [r7, #8]
 8008d02:	4a1a      	ldr	r2, [pc, #104]	@ (8008d6c <HAL_ETH_SetMDIOClockRange+0x8c>)
 8008d04:	4293      	cmp	r3, r2
 8008d06:	d804      	bhi.n	8008d12 <HAL_ETH_SetMDIOClockRange+0x32>
  {
    /* CSR Clock Range between 0-35 MHz */
    tmpreg |= (uint32_t)ETH_MACMDIOAR_CR_DIV16;
 8008d08:	68fb      	ldr	r3, [r7, #12]
 8008d0a:	f443 7300 	orr.w	r3, r3, #512	@ 0x200
 8008d0e:	60fb      	str	r3, [r7, #12]
 8008d10:	e022      	b.n	8008d58 <HAL_ETH_SetMDIOClockRange+0x78>
  }
  else if (hclk < 60000000U)
 8008d12:	68bb      	ldr	r3, [r7, #8]
 8008d14:	4a16      	ldr	r2, [pc, #88]	@ (8008d70 <HAL_ETH_SetMDIOClockRange+0x90>)
 8008d16:	4293      	cmp	r3, r2
 8008d18:	d204      	bcs.n	8008d24 <HAL_ETH_SetMDIOClockRange+0x44>
  {
    /* CSR Clock Range between 35-60 MHz */
    tmpreg |= (uint32_t)ETH_MACMDIOAR_CR_DIV26;
 8008d1a:	68fb      	ldr	r3, [r7, #12]
 8008d1c:	f443 7340 	orr.w	r3, r3, #768	@ 0x300
 8008d20:	60fb      	str	r3, [r7, #12]
 8008d22:	e019      	b.n	8008d58 <HAL_ETH_SetMDIOClockRange+0x78>
  }
  else if (hclk < 100000000U)
 8008d24:	68bb      	ldr	r3, [r7, #8]
 8008d26:	4a13      	ldr	r2, [pc, #76]	@ (8008d74 <HAL_ETH_SetMDIOClockRange+0x94>)
 8008d28:	4293      	cmp	r3, r2
 8008d2a:	d915      	bls.n	8008d58 <HAL_ETH_SetMDIOClockRange+0x78>
  {
    /* CSR Clock Range between 60-100 MHz */
    tmpreg |= (uint32_t)ETH_MACMDIOAR_CR_DIV42;
  }
  else if (hclk < 150000000U)
 8008d2c:	68bb      	ldr	r3, [r7, #8]
 8008d2e:	4a12      	ldr	r2, [pc, #72]	@ (8008d78 <HAL_ETH_SetMDIOClockRange+0x98>)
 8008d30:	4293      	cmp	r3, r2
 8008d32:	d804      	bhi.n	8008d3e <HAL_ETH_SetMDIOClockRange+0x5e>
  {
    /* CSR Clock Range between 100-150 MHz */
    tmpreg |= (uint32_t)ETH_MACMDIOAR_CR_DIV62;
 8008d34:	68fb      	ldr	r3, [r7, #12]
 8008d36:	f443 7380 	orr.w	r3, r3, #256	@ 0x100
 8008d3a:	60fb      	str	r3, [r7, #12]
 8008d3c:	e00c      	b.n	8008d58 <HAL_ETH_SetMDIOClockRange+0x78>
  }
  else if (hclk < 250000000U)
 8008d3e:	68bb      	ldr	r3, [r7, #8]
 8008d40:	4a0e      	ldr	r2, [pc, #56]	@ (8008d7c <HAL_ETH_SetMDIOClockRange+0x9c>)
 8008d42:	4293      	cmp	r3, r2
 8008d44:	d804      	bhi.n	8008d50 <HAL_ETH_SetMDIOClockRange+0x70>
  {
    /* CSR Clock Range between 150-250 MHz */
    tmpreg |= (uint32_t)ETH_MACMDIOAR_CR_DIV102;
 8008d46:	68fb      	ldr	r3, [r7, #12]
 8008d48:	f443 6380 	orr.w	r3, r3, #1024	@ 0x400
 8008d4c:	60fb      	str	r3, [r7, #12]
 8008d4e:	e003      	b.n	8008d58 <HAL_ETH_SetMDIOClockRange+0x78>
  }
  else /* (hclk >= 250000000U) */
  {
    /* CSR Clock >= 250 MHz */
    tmpreg |= (uint32_t)(ETH_MACMDIOAR_CR_DIV124);
 8008d50:	68fb      	ldr	r3, [r7, #12]
 8008d52:	f443 63a0 	orr.w	r3, r3, #1280	@ 0x500
 8008d56:	60fb      	str	r3, [r7, #12]
  }

  /* Configure the CSR Clock Range */
  (heth->Instance)->MACMDIOAR = (uint32_t)tmpreg;
 8008d58:	687b      	ldr	r3, [r7, #4]
 8008d5a:	681b      	ldr	r3, [r3, #0]
 8008d5c:	68fa      	ldr	r2, [r7, #12]
 8008d5e:	f8c3 2200 	str.w	r2, [r3, #512]	@ 0x200
}
 8008d62:	bf00      	nop
 8008d64:	3710      	adds	r7, #16
 8008d66:	46bd      	mov	sp, r7
 8008d68:	bd80      	pop	{r7, pc}
 8008d6a:	bf00      	nop
 8008d6c:	02160ebf 	.word	0x02160ebf
 8008d70:	03938700 	.word	0x03938700
 8008d74:	05f5e0ff 	.word	0x05f5e0ff
 8008d78:	08f0d17f 	.word	0x08f0d17f
 8008d7c:	0ee6b27f 	.word	0x0ee6b27f

08008d80 <HAL_ETH_GetDMAError>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval ETH DMA Error Code
  */
uint32_t HAL_ETH_GetDMAError(const ETH_HandleTypeDef *heth)
{
 8008d80:	b480      	push	{r7}
 8008d82:	b083      	sub	sp, #12
 8008d84:	af00      	add	r7, sp, #0
 8008d86:	6078      	str	r0, [r7, #4]
  return heth->DMAErrorCode;
 8008d88:	687b      	ldr	r3, [r7, #4]
 8008d8a:	f8d3 308c 	ldr.w	r3, [r3, #140]	@ 0x8c
}
 8008d8e:	4618      	mov	r0, r3
 8008d90:	370c      	adds	r7, #12
 8008d92:	46bd      	mov	sp, r7
 8008d94:	f85d 7b04 	ldr.w	r7, [sp], #4
 8008d98:	4770      	bx	lr
	...

08008d9c <ETH_SetMACConfig>:
/** @addtogroup ETH_Private_Functions   ETH Private Functions
  * @{
  */

static void ETH_SetMACConfig(ETH_HandleTypeDef *heth, const ETH_MACConfigTypeDef *macconf)
{
 8008d9c:	b480      	push	{r7}
 8008d9e:	b085      	sub	sp, #20
 8008da0:	af00      	add	r7, sp, #0
 8008da2:	6078      	str	r0, [r7, #4]
 8008da4:	6039      	str	r1, [r7, #0]
  uint32_t macregval;

  /*------------------------ MACCR Configuration --------------------*/
  macregval = (macconf->InterPacketGapVal |
 8008da6:	683b      	ldr	r3, [r7, #0]
 8008da8:	689a      	ldr	r2, [r3, #8]
               macconf->SourceAddrControl |
 8008daa:	683b      	ldr	r3, [r7, #0]
 8008dac:	681b      	ldr	r3, [r3, #0]
  macregval = (macconf->InterPacketGapVal |
 8008dae:	431a      	orrs	r2, r3
               ((uint32_t)macconf->ChecksumOffload << 27) |
 8008db0:	683b      	ldr	r3, [r7, #0]
 8008db2:	791b      	ldrb	r3, [r3, #4]
 8008db4:	06db      	lsls	r3, r3, #27
               macconf->SourceAddrControl |
 8008db6:	431a      	orrs	r2, r3
               ((uint32_t)macconf->GiantPacketSizeLimitControl << 23) |
 8008db8:	683b      	ldr	r3, [r7, #0]
 8008dba:	7b1b      	ldrb	r3, [r3, #12]
 8008dbc:	05db      	lsls	r3, r3, #23
               ((uint32_t)macconf->ChecksumOffload << 27) |
 8008dbe:	431a      	orrs	r2, r3
               ((uint32_t)macconf->Support2KPacket  << 22) |
 8008dc0:	683b      	ldr	r3, [r7, #0]
 8008dc2:	7b5b      	ldrb	r3, [r3, #13]
 8008dc4:	059b      	lsls	r3, r3, #22
               ((uint32_t)macconf->GiantPacketSizeLimitControl << 23) |
 8008dc6:	431a      	orrs	r2, r3
               ((uint32_t)macconf->CRCStripTypePacket << 21) |
 8008dc8:	683b      	ldr	r3, [r7, #0]
 8008dca:	7b9b      	ldrb	r3, [r3, #14]
 8008dcc:	055b      	lsls	r3, r3, #21
               ((uint32_t)macconf->Support2KPacket  << 22) |
 8008dce:	431a      	orrs	r2, r3
               ((uint32_t)macconf->AutomaticPadCRCStrip << 20) |
 8008dd0:	683b      	ldr	r3, [r7, #0]
 8008dd2:	7bdb      	ldrb	r3, [r3, #15]
 8008dd4:	051b      	lsls	r3, r3, #20
               ((uint32_t)macconf->CRCStripTypePacket << 21) |
 8008dd6:	4313      	orrs	r3, r2
               ((uint32_t)((macconf->Watchdog == DISABLE) ? 1U : 0U) << 19) |
 8008dd8:	683a      	ldr	r2, [r7, #0]
 8008dda:	7c12      	ldrb	r2, [r2, #16]
 8008ddc:	2a00      	cmp	r2, #0
 8008dde:	d102      	bne.n	8008de6 <ETH_SetMACConfig+0x4a>
 8008de0:	f44f 2200 	mov.w	r2, #524288	@ 0x80000
 8008de4:	e000      	b.n	8008de8 <ETH_SetMACConfig+0x4c>
 8008de6:	2200      	movs	r2, #0
               ((uint32_t)macconf->AutomaticPadCRCStrip << 20) |
 8008de8:	4313      	orrs	r3, r2
               ((uint32_t)((macconf->Jabber == DISABLE) ? 1U : 0U) << 17) |
 8008dea:	683a      	ldr	r2, [r7, #0]
 8008dec:	7c52      	ldrb	r2, [r2, #17]
 8008dee:	2a00      	cmp	r2, #0
 8008df0:	d102      	bne.n	8008df8 <ETH_SetMACConfig+0x5c>
 8008df2:	f44f 3200 	mov.w	r2, #131072	@ 0x20000
 8008df6:	e000      	b.n	8008dfa <ETH_SetMACConfig+0x5e>
 8008df8:	2200      	movs	r2, #0
               ((uint32_t)((macconf->Watchdog == DISABLE) ? 1U : 0U) << 19) |
 8008dfa:	431a      	orrs	r2, r3
               ((uint32_t)macconf->JumboPacket << 16) |
 8008dfc:	683b      	ldr	r3, [r7, #0]
 8008dfe:	7c9b      	ldrb	r3, [r3, #18]
 8008e00:	041b      	lsls	r3, r3, #16
               ((uint32_t)((macconf->Jabber == DISABLE) ? 1U : 0U) << 17) |
 8008e02:	431a      	orrs	r2, r3
               macconf->Speed |
 8008e04:	683b      	ldr	r3, [r7, #0]
 8008e06:	695b      	ldr	r3, [r3, #20]
               ((uint32_t)macconf->JumboPacket << 16) |
 8008e08:	431a      	orrs	r2, r3
               macconf->DuplexMode |
 8008e0a:	683b      	ldr	r3, [r7, #0]
 8008e0c:	699b      	ldr	r3, [r3, #24]
               macconf->Speed |
 8008e0e:	431a      	orrs	r2, r3
               ((uint32_t)macconf->LoopbackMode << 12) |
 8008e10:	683b      	ldr	r3, [r7, #0]
 8008e12:	7f1b      	ldrb	r3, [r3, #28]
 8008e14:	031b      	lsls	r3, r3, #12
               macconf->DuplexMode |
 8008e16:	431a      	orrs	r2, r3
               ((uint32_t)macconf->CarrierSenseBeforeTransmit << 11) |
 8008e18:	683b      	ldr	r3, [r7, #0]
 8008e1a:	7f5b      	ldrb	r3, [r3, #29]
 8008e1c:	02db      	lsls	r3, r3, #11
               ((uint32_t)macconf->LoopbackMode << 12) |
 8008e1e:	4313      	orrs	r3, r2
               ((uint32_t)((macconf->ReceiveOwn == DISABLE) ? 1U : 0U) << 10) |
 8008e20:	683a      	ldr	r2, [r7, #0]
 8008e22:	7f92      	ldrb	r2, [r2, #30]
 8008e24:	2a00      	cmp	r2, #0
 8008e26:	d102      	bne.n	8008e2e <ETH_SetMACConfig+0x92>
 8008e28:	f44f 6280 	mov.w	r2, #1024	@ 0x400
 8008e2c:	e000      	b.n	8008e30 <ETH_SetMACConfig+0x94>
 8008e2e:	2200      	movs	r2, #0
               ((uint32_t)macconf->CarrierSenseBeforeTransmit << 11) |
 8008e30:	431a      	orrs	r2, r3
               ((uint32_t)macconf->CarrierSenseDuringTransmit << 9) |
 8008e32:	683b      	ldr	r3, [r7, #0]
 8008e34:	7fdb      	ldrb	r3, [r3, #31]
 8008e36:	025b      	lsls	r3, r3, #9
               ((uint32_t)((macconf->ReceiveOwn == DISABLE) ? 1U : 0U) << 10) |
 8008e38:	4313      	orrs	r3, r2
               ((uint32_t)((macconf->RetryTransmission == DISABLE) ? 1U : 0U) << 8) |
 8008e3a:	683a      	ldr	r2, [r7, #0]
 8008e3c:	f892 2020 	ldrb.w	r2, [r2, #32]
 8008e40:	2a00      	cmp	r2, #0
 8008e42:	d102      	bne.n	8008e4a <ETH_SetMACConfig+0xae>
 8008e44:	f44f 7280 	mov.w	r2, #256	@ 0x100
 8008e48:	e000      	b.n	8008e4c <ETH_SetMACConfig+0xb0>
 8008e4a:	2200      	movs	r2, #0
               ((uint32_t)macconf->CarrierSenseDuringTransmit << 9) |
 8008e4c:	431a      	orrs	r2, r3
               macconf->BackOffLimit |
 8008e4e:	683b      	ldr	r3, [r7, #0]
 8008e50:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
               ((uint32_t)((macconf->RetryTransmission == DISABLE) ? 1U : 0U) << 8) |
 8008e52:	431a      	orrs	r2, r3
               ((uint32_t)macconf->DeferralCheck << 4) |
 8008e54:	683b      	ldr	r3, [r7, #0]
 8008e56:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8008e5a:	011b      	lsls	r3, r3, #4
               macconf->BackOffLimit |
 8008e5c:	431a      	orrs	r2, r3
               macconf->PreambleLength);
 8008e5e:	683b      	ldr	r3, [r7, #0]
 8008e60:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
  macregval = (macconf->InterPacketGapVal |
 8008e62:	4313      	orrs	r3, r2
 8008e64:	60fb      	str	r3, [r7, #12]

  /* Write to MACCR */
  MODIFY_REG(heth->Instance->MACCR, ETH_MACCR_MASK, macregval);
 8008e66:	687b      	ldr	r3, [r7, #4]
 8008e68:	681b      	ldr	r3, [r3, #0]
 8008e6a:	681a      	ldr	r2, [r3, #0]
 8008e6c:	4b56      	ldr	r3, [pc, #344]	@ (8008fc8 <ETH_SetMACConfig+0x22c>)
 8008e6e:	4013      	ands	r3, r2
 8008e70:	687a      	ldr	r2, [r7, #4]
 8008e72:	6812      	ldr	r2, [r2, #0]
 8008e74:	68f9      	ldr	r1, [r7, #12]
 8008e76:	430b      	orrs	r3, r1
 8008e78:	6013      	str	r3, [r2, #0]

  /*------------------------ MACECR Configuration --------------------*/
  macregval = ((macconf->ExtendedInterPacketGapVal << 25) |
 8008e7a:	683b      	ldr	r3, [r7, #0]
 8008e7c:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 8008e7e:	065a      	lsls	r2, r3, #25
               ((uint32_t)macconf->ExtendedInterPacketGap << 24) |
 8008e80:	683b      	ldr	r3, [r7, #0]
 8008e82:	f893 3038 	ldrb.w	r3, [r3, #56]	@ 0x38
 8008e86:	061b      	lsls	r3, r3, #24
  macregval = ((macconf->ExtendedInterPacketGapVal << 25) |
 8008e88:	431a      	orrs	r2, r3
               ((uint32_t)macconf->UnicastSlowProtocolPacketDetect << 18) |
 8008e8a:	683b      	ldr	r3, [r7, #0]
 8008e8c:	f893 3030 	ldrb.w	r3, [r3, #48]	@ 0x30
 8008e90:	049b      	lsls	r3, r3, #18
               ((uint32_t)macconf->ExtendedInterPacketGap << 24) |
 8008e92:	431a      	orrs	r2, r3
               ((uint32_t)macconf->SlowProtocolDetect << 17) |
 8008e94:	683b      	ldr	r3, [r7, #0]
 8008e96:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 8008e9a:	045b      	lsls	r3, r3, #17
               ((uint32_t)macconf->UnicastSlowProtocolPacketDetect << 18) |
 8008e9c:	4313      	orrs	r3, r2
               ((uint32_t)((macconf->CRCCheckingRxPackets == DISABLE) ? 1U : 0U) << 16) |
 8008e9e:	683a      	ldr	r2, [r7, #0]
 8008ea0:	f892 2032 	ldrb.w	r2, [r2, #50]	@ 0x32
 8008ea4:	2a00      	cmp	r2, #0
 8008ea6:	d102      	bne.n	8008eae <ETH_SetMACConfig+0x112>
 8008ea8:	f44f 3280 	mov.w	r2, #65536	@ 0x10000
 8008eac:	e000      	b.n	8008eb0 <ETH_SetMACConfig+0x114>
 8008eae:	2200      	movs	r2, #0
               ((uint32_t)macconf->SlowProtocolDetect << 17) |
 8008eb0:	431a      	orrs	r2, r3
               macconf->GiantPacketSizeLimit);
 8008eb2:	683b      	ldr	r3, [r7, #0]
 8008eb4:	6b5b      	ldr	r3, [r3, #52]	@ 0x34
  macregval = ((macconf->ExtendedInterPacketGapVal << 25) |
 8008eb6:	4313      	orrs	r3, r2
 8008eb8:	60fb      	str	r3, [r7, #12]

  /* Write to MACECR */
  MODIFY_REG(heth->Instance->MACECR, ETH_MACECR_MASK, macregval);
 8008eba:	687b      	ldr	r3, [r7, #4]
 8008ebc:	681b      	ldr	r3, [r3, #0]
 8008ebe:	685a      	ldr	r2, [r3, #4]
 8008ec0:	4b42      	ldr	r3, [pc, #264]	@ (8008fcc <ETH_SetMACConfig+0x230>)
 8008ec2:	4013      	ands	r3, r2
 8008ec4:	687a      	ldr	r2, [r7, #4]
 8008ec6:	6812      	ldr	r2, [r2, #0]
 8008ec8:	68f9      	ldr	r1, [r7, #12]
 8008eca:	430b      	orrs	r3, r1
 8008ecc:	6053      	str	r3, [r2, #4]

  /*------------------------ MACWTR Configuration --------------------*/
  macregval = (((uint32_t)macconf->ProgrammableWatchdog << 8) |
 8008ece:	683b      	ldr	r3, [r7, #0]
 8008ed0:	f893 3040 	ldrb.w	r3, [r3, #64]	@ 0x40
 8008ed4:	021a      	lsls	r2, r3, #8
               macconf->WatchdogTimeout);
 8008ed6:	683b      	ldr	r3, [r7, #0]
 8008ed8:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
  macregval = (((uint32_t)macconf->ProgrammableWatchdog << 8) |
 8008eda:	4313      	orrs	r3, r2
 8008edc:	60fb      	str	r3, [r7, #12]

  /* Write to MACWTR */
  MODIFY_REG(heth->Instance->MACWTR, ETH_MACWTR_MASK, macregval);
 8008ede:	687b      	ldr	r3, [r7, #4]
 8008ee0:	681b      	ldr	r3, [r3, #0]
 8008ee2:	68da      	ldr	r2, [r3, #12]
 8008ee4:	4b3a      	ldr	r3, [pc, #232]	@ (8008fd0 <ETH_SetMACConfig+0x234>)
 8008ee6:	4013      	ands	r3, r2
 8008ee8:	687a      	ldr	r2, [r7, #4]
 8008eea:	6812      	ldr	r2, [r2, #0]
 8008eec:	68f9      	ldr	r1, [r7, #12]
 8008eee:	430b      	orrs	r3, r1
 8008ef0:	60d3      	str	r3, [r2, #12]

  /*------------------------ MACTFCR Configuration --------------------*/
  macregval = (((uint32_t)macconf->TransmitFlowControl << 1) |
 8008ef2:	683b      	ldr	r3, [r7, #0]
 8008ef4:	f893 3054 	ldrb.w	r3, [r3, #84]	@ 0x54
 8008ef8:	005a      	lsls	r2, r3, #1
               macconf->PauseLowThreshold |
 8008efa:	683b      	ldr	r3, [r7, #0]
 8008efc:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
  macregval = (((uint32_t)macconf->TransmitFlowControl << 1) |
 8008efe:	4313      	orrs	r3, r2
               ((uint32_t)((macconf->ZeroQuantaPause == DISABLE) ? 1U : 0U) << 7) |
 8008f00:	683a      	ldr	r2, [r7, #0]
 8008f02:	f892 204c 	ldrb.w	r2, [r2, #76]	@ 0x4c
 8008f06:	2a00      	cmp	r2, #0
 8008f08:	d101      	bne.n	8008f0e <ETH_SetMACConfig+0x172>
 8008f0a:	2280      	movs	r2, #128	@ 0x80
 8008f0c:	e000      	b.n	8008f10 <ETH_SetMACConfig+0x174>
 8008f0e:	2200      	movs	r2, #0
               macconf->PauseLowThreshold |
 8008f10:	431a      	orrs	r2, r3
               (macconf->PauseTime << 16));
 8008f12:	683b      	ldr	r3, [r7, #0]
 8008f14:	6c9b      	ldr	r3, [r3, #72]	@ 0x48
 8008f16:	041b      	lsls	r3, r3, #16
  macregval = (((uint32_t)macconf->TransmitFlowControl << 1) |
 8008f18:	4313      	orrs	r3, r2
 8008f1a:	60fb      	str	r3, [r7, #12]

  /* Write to MACTFCR */
  MODIFY_REG(heth->Instance->MACTFCR, ETH_MACTFCR_MASK, macregval);
 8008f1c:	687b      	ldr	r3, [r7, #4]
 8008f1e:	681b      	ldr	r3, [r3, #0]
 8008f20:	6f1a      	ldr	r2, [r3, #112]	@ 0x70
 8008f22:	f64f 730d 	movw	r3, #65293	@ 0xff0d
 8008f26:	4013      	ands	r3, r2
 8008f28:	687a      	ldr	r2, [r7, #4]
 8008f2a:	6812      	ldr	r2, [r2, #0]
 8008f2c:	68f9      	ldr	r1, [r7, #12]
 8008f2e:	430b      	orrs	r3, r1
 8008f30:	6713      	str	r3, [r2, #112]	@ 0x70

  /*------------------------ MACRFCR Configuration --------------------*/
  macregval = ((uint32_t)macconf->ReceiveFlowControl |
 8008f32:	683b      	ldr	r3, [r7, #0]
 8008f34:	f893 3056 	ldrb.w	r3, [r3, #86]	@ 0x56
 8008f38:	461a      	mov	r2, r3
               ((uint32_t)macconf->UnicastPausePacketDetect << 1));
 8008f3a:	683b      	ldr	r3, [r7, #0]
 8008f3c:	f893 3055 	ldrb.w	r3, [r3, #85]	@ 0x55
 8008f40:	005b      	lsls	r3, r3, #1
  macregval = ((uint32_t)macconf->ReceiveFlowControl |
 8008f42:	4313      	orrs	r3, r2
 8008f44:	60fb      	str	r3, [r7, #12]

  /* Write to MACRFCR */
  MODIFY_REG(heth->Instance->MACRFCR, ETH_MACRFCR_MASK, macregval);
 8008f46:	687b      	ldr	r3, [r7, #4]
 8008f48:	681b      	ldr	r3, [r3, #0]
 8008f4a:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 8008f4e:	f023 0103 	bic.w	r1, r3, #3
 8008f52:	687b      	ldr	r3, [r7, #4]
 8008f54:	681b      	ldr	r3, [r3, #0]
 8008f56:	68fa      	ldr	r2, [r7, #12]
 8008f58:	430a      	orrs	r2, r1
 8008f5a:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90

  /*------------------------ MTLTQOMR Configuration --------------------*/
  /* Write to MTLTQOMR */
  MODIFY_REG(heth->Instance->MTLTQOMR, ETH_MTLTQOMR_MASK, macconf->TransmitQueueMode);
 8008f5e:	687b      	ldr	r3, [r7, #4]
 8008f60:	681b      	ldr	r3, [r3, #0]
 8008f62:	f8d3 3d00 	ldr.w	r3, [r3, #3328]	@ 0xd00
 8008f66:	f023 0172 	bic.w	r1, r3, #114	@ 0x72
 8008f6a:	683b      	ldr	r3, [r7, #0]
 8008f6c:	6d9a      	ldr	r2, [r3, #88]	@ 0x58
 8008f6e:	687b      	ldr	r3, [r7, #4]
 8008f70:	681b      	ldr	r3, [r3, #0]
 8008f72:	430a      	orrs	r2, r1
 8008f74:	f8c3 2d00 	str.w	r2, [r3, #3328]	@ 0xd00

  /*------------------------ MTLRQOMR Configuration --------------------*/
  macregval = (macconf->ReceiveQueueMode |
 8008f78:	683b      	ldr	r3, [r7, #0]
 8008f7a:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
               ((uint32_t)((macconf->DropTCPIPChecksumErrorPacket == DISABLE) ? 1U : 0U) << 6) |
 8008f7c:	683a      	ldr	r2, [r7, #0]
 8008f7e:	f892 2060 	ldrb.w	r2, [r2, #96]	@ 0x60
 8008f82:	2a00      	cmp	r2, #0
 8008f84:	d101      	bne.n	8008f8a <ETH_SetMACConfig+0x1ee>
 8008f86:	2240      	movs	r2, #64	@ 0x40
 8008f88:	e000      	b.n	8008f8c <ETH_SetMACConfig+0x1f0>
 8008f8a:	2200      	movs	r2, #0
  macregval = (macconf->ReceiveQueueMode |
 8008f8c:	431a      	orrs	r2, r3
               ((uint32_t)macconf->ForwardRxErrorPacket << 4) |
 8008f8e:	683b      	ldr	r3, [r7, #0]
 8008f90:	f893 3061 	ldrb.w	r3, [r3, #97]	@ 0x61
 8008f94:	011b      	lsls	r3, r3, #4
               ((uint32_t)((macconf->DropTCPIPChecksumErrorPacket == DISABLE) ? 1U : 0U) << 6) |
 8008f96:	431a      	orrs	r2, r3
               ((uint32_t)macconf->ForwardRxUndersizedGoodPacket << 3));
 8008f98:	683b      	ldr	r3, [r7, #0]
 8008f9a:	f893 3062 	ldrb.w	r3, [r3, #98]	@ 0x62
 8008f9e:	00db      	lsls	r3, r3, #3
  macregval = (macconf->ReceiveQueueMode |
 8008fa0:	4313      	orrs	r3, r2
 8008fa2:	60fb      	str	r3, [r7, #12]

  /* Write to MTLRQOMR */
  MODIFY_REG(heth->Instance->MTLRQOMR, ETH_MTLRQOMR_MASK, macregval);
 8008fa4:	687b      	ldr	r3, [r7, #4]
 8008fa6:	681b      	ldr	r3, [r3, #0]
 8008fa8:	f8d3 3d30 	ldr.w	r3, [r3, #3376]	@ 0xd30
 8008fac:	f023 017b 	bic.w	r1, r3, #123	@ 0x7b
 8008fb0:	687b      	ldr	r3, [r7, #4]
 8008fb2:	681b      	ldr	r3, [r3, #0]
 8008fb4:	68fa      	ldr	r2, [r7, #12]
 8008fb6:	430a      	orrs	r2, r1
 8008fb8:	f8c3 2d30 	str.w	r2, [r3, #3376]	@ 0xd30
}
 8008fbc:	bf00      	nop
 8008fbe:	3714      	adds	r7, #20
 8008fc0:	46bd      	mov	sp, r7
 8008fc2:	f85d 7b04 	ldr.w	r7, [sp], #4
 8008fc6:	4770      	bx	lr
 8008fc8:	00048083 	.word	0x00048083
 8008fcc:	c0f88000 	.word	0xc0f88000
 8008fd0:	fffffef0 	.word	0xfffffef0

08008fd4 <ETH_SetDMAConfig>:

static void ETH_SetDMAConfig(ETH_HandleTypeDef *heth, const ETH_DMAConfigTypeDef *dmaconf)
{
 8008fd4:	b480      	push	{r7}
 8008fd6:	b085      	sub	sp, #20
 8008fd8:	af00      	add	r7, sp, #0
 8008fda:	6078      	str	r0, [r7, #4]
 8008fdc:	6039      	str	r1, [r7, #0]
  uint32_t dmaregval;

  /*------------------------ DMAMR Configuration --------------------*/
  MODIFY_REG(heth->Instance->DMAMR, ETH_DMAMR_MASK, dmaconf->DMAArbitration);
 8008fde:	687b      	ldr	r3, [r7, #4]
 8008fe0:	681b      	ldr	r3, [r3, #0]
 8008fe2:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8008fe6:	681a      	ldr	r2, [r3, #0]
 8008fe8:	4b38      	ldr	r3, [pc, #224]	@ (80090cc <ETH_SetDMAConfig+0xf8>)
 8008fea:	4013      	ands	r3, r2
 8008fec:	683a      	ldr	r2, [r7, #0]
 8008fee:	6811      	ldr	r1, [r2, #0]
 8008ff0:	687a      	ldr	r2, [r7, #4]
 8008ff2:	6812      	ldr	r2, [r2, #0]
 8008ff4:	430b      	orrs	r3, r1
 8008ff6:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 8008ffa:	6013      	str	r3, [r2, #0]

  /*------------------------ DMASBMR Configuration --------------------*/
  dmaregval = (((uint32_t)dmaconf->AddressAlignedBeats << 12) |
 8008ffc:	683b      	ldr	r3, [r7, #0]
 8008ffe:	791b      	ldrb	r3, [r3, #4]
 8009000:	031a      	lsls	r2, r3, #12
               dmaconf->BurstMode |
 8009002:	683b      	ldr	r3, [r7, #0]
 8009004:	689b      	ldr	r3, [r3, #8]
  dmaregval = (((uint32_t)dmaconf->AddressAlignedBeats << 12) |
 8009006:	431a      	orrs	r2, r3
               ((uint32_t)dmaconf->RebuildINCRxBurst << 15));
 8009008:	683b      	ldr	r3, [r7, #0]
 800900a:	7b1b      	ldrb	r3, [r3, #12]
 800900c:	03db      	lsls	r3, r3, #15
  dmaregval = (((uint32_t)dmaconf->AddressAlignedBeats << 12) |
 800900e:	4313      	orrs	r3, r2
 8009010:	60fb      	str	r3, [r7, #12]

  MODIFY_REG(heth->Instance->DMASBMR, ETH_DMASBMR_MASK, dmaregval);
 8009012:	687b      	ldr	r3, [r7, #4]
 8009014:	681b      	ldr	r3, [r3, #0]
 8009016:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 800901a:	685a      	ldr	r2, [r3, #4]
 800901c:	4b2c      	ldr	r3, [pc, #176]	@ (80090d0 <ETH_SetDMAConfig+0xfc>)
 800901e:	4013      	ands	r3, r2
 8009020:	687a      	ldr	r2, [r7, #4]
 8009022:	6812      	ldr	r2, [r2, #0]
 8009024:	68f9      	ldr	r1, [r7, #12]
 8009026:	430b      	orrs	r3, r1
 8009028:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 800902c:	6053      	str	r3, [r2, #4]

  /*------------------------ DMACCR Configuration --------------------*/
  dmaregval = (((uint32_t)dmaconf->PBLx8Mode << 16) |
 800902e:	683b      	ldr	r3, [r7, #0]
 8009030:	7b5b      	ldrb	r3, [r3, #13]
 8009032:	041a      	lsls	r2, r3, #16
               dmaconf->MaximumSegmentSize);
 8009034:	683b      	ldr	r3, [r7, #0]
 8009036:	6a1b      	ldr	r3, [r3, #32]
  dmaregval = (((uint32_t)dmaconf->PBLx8Mode << 16) |
 8009038:	4313      	orrs	r3, r2
 800903a:	60fb      	str	r3, [r7, #12]
  MODIFY_REG(heth->Instance->DMACCR, ETH_DMACCR_MASK, dmaregval);
 800903c:	687b      	ldr	r3, [r7, #4]
 800903e:	681b      	ldr	r3, [r3, #0]
 8009040:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8009044:	f8d3 2100 	ldr.w	r2, [r3, #256]	@ 0x100
 8009048:	4b22      	ldr	r3, [pc, #136]	@ (80090d4 <ETH_SetDMAConfig+0x100>)
 800904a:	4013      	ands	r3, r2
 800904c:	687a      	ldr	r2, [r7, #4]
 800904e:	6812      	ldr	r2, [r2, #0]
 8009050:	68f9      	ldr	r1, [r7, #12]
 8009052:	430b      	orrs	r3, r1
 8009054:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 8009058:	f8c2 3100 	str.w	r3, [r2, #256]	@ 0x100

  /*------------------------ DMACTCR Configuration --------------------*/
  dmaregval = (dmaconf->TxDMABurstLength |
 800905c:	683b      	ldr	r3, [r7, #0]
 800905e:	691a      	ldr	r2, [r3, #16]
               ((uint32_t)dmaconf->SecondPacketOperate << 4) |
 8009060:	683b      	ldr	r3, [r7, #0]
 8009062:	7d1b      	ldrb	r3, [r3, #20]
 8009064:	011b      	lsls	r3, r3, #4
  dmaregval = (dmaconf->TxDMABurstLength |
 8009066:	431a      	orrs	r2, r3
               ((uint32_t)dmaconf->TCPSegmentation << 12));
 8009068:	683b      	ldr	r3, [r7, #0]
 800906a:	7f5b      	ldrb	r3, [r3, #29]
 800906c:	031b      	lsls	r3, r3, #12
  dmaregval = (dmaconf->TxDMABurstLength |
 800906e:	4313      	orrs	r3, r2
 8009070:	60fb      	str	r3, [r7, #12]

  MODIFY_REG(heth->Instance->DMACTCR, ETH_DMACTCR_MASK, dmaregval);
 8009072:	687b      	ldr	r3, [r7, #4]
 8009074:	681b      	ldr	r3, [r3, #0]
 8009076:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 800907a:	f8d3 2104 	ldr.w	r2, [r3, #260]	@ 0x104
 800907e:	4b16      	ldr	r3, [pc, #88]	@ (80090d8 <ETH_SetDMAConfig+0x104>)
 8009080:	4013      	ands	r3, r2
 8009082:	687a      	ldr	r2, [r7, #4]
 8009084:	6812      	ldr	r2, [r2, #0]
 8009086:	68f9      	ldr	r1, [r7, #12]
 8009088:	430b      	orrs	r3, r1
 800908a:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 800908e:	f8c2 3104 	str.w	r3, [r2, #260]	@ 0x104

  /*------------------------ DMACRCR Configuration --------------------*/
  dmaregval = (((uint32_t)dmaconf->FlushRxPacket  << 31) |
 8009092:	683b      	ldr	r3, [r7, #0]
 8009094:	7f1b      	ldrb	r3, [r3, #28]
 8009096:	07da      	lsls	r2, r3, #31
               dmaconf->RxDMABurstLength);
 8009098:	683b      	ldr	r3, [r7, #0]
 800909a:	699b      	ldr	r3, [r3, #24]
  dmaregval = (((uint32_t)dmaconf->FlushRxPacket  << 31) |
 800909c:	4313      	orrs	r3, r2
 800909e:	60fb      	str	r3, [r7, #12]

  /* Write to DMACRCR */
  MODIFY_REG(heth->Instance->DMACRCR, ETH_DMACRCR_MASK, dmaregval);
 80090a0:	687b      	ldr	r3, [r7, #4]
 80090a2:	681b      	ldr	r3, [r3, #0]
 80090a4:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 80090a8:	f8d3 2108 	ldr.w	r2, [r3, #264]	@ 0x108
 80090ac:	4b0b      	ldr	r3, [pc, #44]	@ (80090dc <ETH_SetDMAConfig+0x108>)
 80090ae:	4013      	ands	r3, r2
 80090b0:	687a      	ldr	r2, [r7, #4]
 80090b2:	6812      	ldr	r2, [r2, #0]
 80090b4:	68f9      	ldr	r1, [r7, #12]
 80090b6:	430b      	orrs	r3, r1
 80090b8:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 80090bc:	f8c2 3108 	str.w	r3, [r2, #264]	@ 0x108
}
 80090c0:	bf00      	nop
 80090c2:	3714      	adds	r7, #20
 80090c4:	46bd      	mov	sp, r7
 80090c6:	f85d 7b04 	ldr.w	r7, [sp], #4
 80090ca:	4770      	bx	lr
 80090cc:	ffff87fd 	.word	0xffff87fd
 80090d0:	ffff2ffe 	.word	0xffff2ffe
 80090d4:	fffec000 	.word	0xfffec000
 80090d8:	ffc0efef 	.word	0xffc0efef
 80090dc:	7fc0ffff 	.word	0x7fc0ffff

080090e0 <ETH_MACDMAConfig>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval HAL status
  */
static void ETH_MACDMAConfig(ETH_HandleTypeDef *heth)
{
 80090e0:	b580      	push	{r7, lr}
 80090e2:	b0a4      	sub	sp, #144	@ 0x90
 80090e4:	af00      	add	r7, sp, #0
 80090e6:	6078      	str	r0, [r7, #4]
  ETH_MACConfigTypeDef macDefaultConf;
  ETH_DMAConfigTypeDef dmaDefaultConf;

  /*--------------- ETHERNET MAC registers default Configuration --------------*/
  macDefaultConf.AutomaticPadCRCStrip = ENABLE;
 80090e8:	2301      	movs	r3, #1
 80090ea:	f887 303b 	strb.w	r3, [r7, #59]	@ 0x3b
  macDefaultConf.BackOffLimit = ETH_BACKOFFLIMIT_10;
 80090ee:	2300      	movs	r3, #0
 80090f0:	653b      	str	r3, [r7, #80]	@ 0x50
  macDefaultConf.CarrierSenseBeforeTransmit = DISABLE;
 80090f2:	2300      	movs	r3, #0
 80090f4:	f887 3049 	strb.w	r3, [r7, #73]	@ 0x49
  macDefaultConf.CarrierSenseDuringTransmit = DISABLE;
 80090f8:	2300      	movs	r3, #0
 80090fa:	f887 304b 	strb.w	r3, [r7, #75]	@ 0x4b
  macDefaultConf.ChecksumOffload = ENABLE;
 80090fe:	2301      	movs	r3, #1
 8009100:	f887 3030 	strb.w	r3, [r7, #48]	@ 0x30
  macDefaultConf.CRCCheckingRxPackets = ENABLE;
 8009104:	2301      	movs	r3, #1
 8009106:	f887 305e 	strb.w	r3, [r7, #94]	@ 0x5e
  macDefaultConf.CRCStripTypePacket = ENABLE;
 800910a:	2301      	movs	r3, #1
 800910c:	f887 303a 	strb.w	r3, [r7, #58]	@ 0x3a
  macDefaultConf.DeferralCheck = DISABLE;
 8009110:	2300      	movs	r3, #0
 8009112:	f887 3054 	strb.w	r3, [r7, #84]	@ 0x54
  macDefaultConf.DropTCPIPChecksumErrorPacket = ENABLE;
 8009116:	2301      	movs	r3, #1
 8009118:	f887 308c 	strb.w	r3, [r7, #140]	@ 0x8c
  macDefaultConf.DuplexMode = ETH_FULLDUPLEX_MODE;
 800911c:	f44f 5300 	mov.w	r3, #8192	@ 0x2000
 8009120:	647b      	str	r3, [r7, #68]	@ 0x44
  macDefaultConf.ExtendedInterPacketGap = DISABLE;
 8009122:	2300      	movs	r3, #0
 8009124:	f887 3064 	strb.w	r3, [r7, #100]	@ 0x64
  macDefaultConf.ExtendedInterPacketGapVal = 0x0U;
 8009128:	2300      	movs	r3, #0
 800912a:	66bb      	str	r3, [r7, #104]	@ 0x68
  macDefaultConf.ForwardRxErrorPacket = DISABLE;
 800912c:	2300      	movs	r3, #0
 800912e:	f887 308d 	strb.w	r3, [r7, #141]	@ 0x8d
  macDefaultConf.ForwardRxUndersizedGoodPacket = DISABLE;
 8009132:	2300      	movs	r3, #0
 8009134:	f887 308e 	strb.w	r3, [r7, #142]	@ 0x8e
  macDefaultConf.GiantPacketSizeLimit = 0x618U;
 8009138:	f44f 63c3 	mov.w	r3, #1560	@ 0x618
 800913c:	663b      	str	r3, [r7, #96]	@ 0x60
  macDefaultConf.GiantPacketSizeLimitControl = DISABLE;
 800913e:	2300      	movs	r3, #0
 8009140:	f887 3038 	strb.w	r3, [r7, #56]	@ 0x38
  macDefaultConf.InterPacketGapVal = ETH_INTERPACKETGAP_96BIT;
 8009144:	2300      	movs	r3, #0
 8009146:	637b      	str	r3, [r7, #52]	@ 0x34
  macDefaultConf.Jabber = ENABLE;
 8009148:	2301      	movs	r3, #1
 800914a:	f887 303d 	strb.w	r3, [r7, #61]	@ 0x3d
  macDefaultConf.JumboPacket = DISABLE;
 800914e:	2300      	movs	r3, #0
 8009150:	f887 303e 	strb.w	r3, [r7, #62]	@ 0x3e
  macDefaultConf.LoopbackMode = DISABLE;
 8009154:	2300      	movs	r3, #0
 8009156:	f887 3048 	strb.w	r3, [r7, #72]	@ 0x48
  macDefaultConf.PauseLowThreshold = ETH_PAUSELOWTHRESHOLD_MINUS_4;
 800915a:	2300      	movs	r3, #0
 800915c:	67fb      	str	r3, [r7, #124]	@ 0x7c
  macDefaultConf.PauseTime = 0x0U;
 800915e:	2300      	movs	r3, #0
 8009160:	677b      	str	r3, [r7, #116]	@ 0x74
  macDefaultConf.PreambleLength = ETH_PREAMBLELENGTH_7;
 8009162:	2300      	movs	r3, #0
 8009164:	65bb      	str	r3, [r7, #88]	@ 0x58
  macDefaultConf.ProgrammableWatchdog = DISABLE;
 8009166:	2300      	movs	r3, #0
 8009168:	f887 306c 	strb.w	r3, [r7, #108]	@ 0x6c
  macDefaultConf.ReceiveFlowControl = DISABLE;
 800916c:	2300      	movs	r3, #0
 800916e:	f887 3082 	strb.w	r3, [r7, #130]	@ 0x82
  macDefaultConf.ReceiveOwn = ENABLE;
 8009172:	2301      	movs	r3, #1
 8009174:	f887 304a 	strb.w	r3, [r7, #74]	@ 0x4a
  macDefaultConf.ReceiveQueueMode = ETH_RECEIVESTOREFORWARD;
 8009178:	2320      	movs	r3, #32
 800917a:	f8c7 3088 	str.w	r3, [r7, #136]	@ 0x88
  macDefaultConf.RetryTransmission = ENABLE;
 800917e:	2301      	movs	r3, #1
 8009180:	f887 304c 	strb.w	r3, [r7, #76]	@ 0x4c
  macDefaultConf.SlowProtocolDetect = DISABLE;
 8009184:	2300      	movs	r3, #0
 8009186:	f887 305d 	strb.w	r3, [r7, #93]	@ 0x5d
  macDefaultConf.SourceAddrControl = ETH_SOURCEADDRESS_REPLACE_ADDR0;
 800918a:	f04f 5340 	mov.w	r3, #805306368	@ 0x30000000
 800918e:	62fb      	str	r3, [r7, #44]	@ 0x2c
  macDefaultConf.Speed = ETH_SPEED_100M;
 8009190:	f44f 4380 	mov.w	r3, #16384	@ 0x4000
 8009194:	643b      	str	r3, [r7, #64]	@ 0x40
  macDefaultConf.Support2KPacket = DISABLE;
 8009196:	2300      	movs	r3, #0
 8009198:	f887 3039 	strb.w	r3, [r7, #57]	@ 0x39
  macDefaultConf.TransmitQueueMode = ETH_TRANSMITSTOREFORWARD;
 800919c:	2302      	movs	r3, #2
 800919e:	f8c7 3084 	str.w	r3, [r7, #132]	@ 0x84
  macDefaultConf.TransmitFlowControl = DISABLE;
 80091a2:	2300      	movs	r3, #0
 80091a4:	f887 3080 	strb.w	r3, [r7, #128]	@ 0x80
  macDefaultConf.UnicastPausePacketDetect = DISABLE;
 80091a8:	2300      	movs	r3, #0
 80091aa:	f887 3081 	strb.w	r3, [r7, #129]	@ 0x81
  macDefaultConf.UnicastSlowProtocolPacketDetect = DISABLE;
 80091ae:	2300      	movs	r3, #0
 80091b0:	f887 305c 	strb.w	r3, [r7, #92]	@ 0x5c
  macDefaultConf.Watchdog = ENABLE;
 80091b4:	2301      	movs	r3, #1
 80091b6:	f887 303c 	strb.w	r3, [r7, #60]	@ 0x3c
  macDefaultConf.WatchdogTimeout =  ETH_MACWTR_WTO_2KB;
 80091ba:	2300      	movs	r3, #0
 80091bc:	673b      	str	r3, [r7, #112]	@ 0x70
  macDefaultConf.ZeroQuantaPause = ENABLE;
 80091be:	2301      	movs	r3, #1
 80091c0:	f887 3078 	strb.w	r3, [r7, #120]	@ 0x78

  /* MAC default configuration */
  ETH_SetMACConfig(heth, &macDefaultConf);
 80091c4:	f107 032c 	add.w	r3, r7, #44	@ 0x2c
 80091c8:	4619      	mov	r1, r3
 80091ca:	6878      	ldr	r0, [r7, #4]
 80091cc:	f7ff fde6 	bl	8008d9c <ETH_SetMACConfig>

  /*--------------- ETHERNET DMA registers default Configuration --------------*/
  dmaDefaultConf.AddressAlignedBeats = ENABLE;
 80091d0:	2301      	movs	r3, #1
 80091d2:	733b      	strb	r3, [r7, #12]
  dmaDefaultConf.BurstMode = ETH_BURSTLENGTH_FIXED;
 80091d4:	2301      	movs	r3, #1
 80091d6:	613b      	str	r3, [r7, #16]
  dmaDefaultConf.DMAArbitration = ETH_DMAARBITRATION_RX1_TX1;
 80091d8:	2300      	movs	r3, #0
 80091da:	60bb      	str	r3, [r7, #8]
  dmaDefaultConf.FlushRxPacket = DISABLE;
 80091dc:	2300      	movs	r3, #0
 80091de:	f887 3024 	strb.w	r3, [r7, #36]	@ 0x24
  dmaDefaultConf.PBLx8Mode = DISABLE;
 80091e2:	2300      	movs	r3, #0
 80091e4:	757b      	strb	r3, [r7, #21]
  dmaDefaultConf.RebuildINCRxBurst = DISABLE;
 80091e6:	2300      	movs	r3, #0
 80091e8:	753b      	strb	r3, [r7, #20]
  dmaDefaultConf.RxDMABurstLength = ETH_RXDMABURSTLENGTH_32BEAT;
 80091ea:	f44f 1300 	mov.w	r3, #2097152	@ 0x200000
 80091ee:	623b      	str	r3, [r7, #32]
  dmaDefaultConf.SecondPacketOperate = DISABLE;
 80091f0:	2300      	movs	r3, #0
 80091f2:	773b      	strb	r3, [r7, #28]
  dmaDefaultConf.TxDMABurstLength = ETH_TXDMABURSTLENGTH_32BEAT;
 80091f4:	f44f 1300 	mov.w	r3, #2097152	@ 0x200000
 80091f8:	61bb      	str	r3, [r7, #24]
  dmaDefaultConf.TCPSegmentation = DISABLE;
 80091fa:	2300      	movs	r3, #0
 80091fc:	f887 3025 	strb.w	r3, [r7, #37]	@ 0x25
  dmaDefaultConf.MaximumSegmentSize = ETH_SEGMENT_SIZE_DEFAULT;
 8009200:	f44f 7306 	mov.w	r3, #536	@ 0x218
 8009204:	62bb      	str	r3, [r7, #40]	@ 0x28

  /* DMA default configuration */
  ETH_SetDMAConfig(heth, &dmaDefaultConf);
 8009206:	f107 0308 	add.w	r3, r7, #8
 800920a:	4619      	mov	r1, r3
 800920c:	6878      	ldr	r0, [r7, #4]
 800920e:	f7ff fee1 	bl	8008fd4 <ETH_SetDMAConfig>
}
 8009212:	bf00      	nop
 8009214:	3790      	adds	r7, #144	@ 0x90
 8009216:	46bd      	mov	sp, r7
 8009218:	bd80      	pop	{r7, pc}

0800921a <ETH_DMATxDescListInit>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval None
  */
static void ETH_DMATxDescListInit(ETH_HandleTypeDef *heth)
{
 800921a:	b480      	push	{r7}
 800921c:	b085      	sub	sp, #20
 800921e:	af00      	add	r7, sp, #0
 8009220:	6078      	str	r0, [r7, #4]
  ETH_DMADescTypeDef *dmatxdesc;
  uint32_t i;

  /* Fill each DMATxDesc descriptor with the right values */
  for (i = 0; i < (uint32_t)ETH_TX_DESC_CNT; i++)
 8009222:	2300      	movs	r3, #0
 8009224:	60fb      	str	r3, [r7, #12]
 8009226:	e01d      	b.n	8009264 <ETH_DMATxDescListInit+0x4a>
  {
    dmatxdesc = heth->Init.TxDesc + i;
 8009228:	687b      	ldr	r3, [r7, #4]
 800922a:	68d9      	ldr	r1, [r3, #12]
 800922c:	68fa      	ldr	r2, [r7, #12]
 800922e:	4613      	mov	r3, r2
 8009230:	005b      	lsls	r3, r3, #1
 8009232:	4413      	add	r3, r2
 8009234:	00db      	lsls	r3, r3, #3
 8009236:	440b      	add	r3, r1
 8009238:	60bb      	str	r3, [r7, #8]

    WRITE_REG(dmatxdesc->DESC0, 0x0U);
 800923a:	68bb      	ldr	r3, [r7, #8]
 800923c:	2200      	movs	r2, #0
 800923e:	601a      	str	r2, [r3, #0]
    WRITE_REG(dmatxdesc->DESC1, 0x0U);
 8009240:	68bb      	ldr	r3, [r7, #8]
 8009242:	2200      	movs	r2, #0
 8009244:	605a      	str	r2, [r3, #4]
    WRITE_REG(dmatxdesc->DESC2, 0x0U);
 8009246:	68bb      	ldr	r3, [r7, #8]
 8009248:	2200      	movs	r2, #0
 800924a:	609a      	str	r2, [r3, #8]
    WRITE_REG(dmatxdesc->DESC3, 0x0U);
 800924c:	68bb      	ldr	r3, [r7, #8]
 800924e:	2200      	movs	r2, #0
 8009250:	60da      	str	r2, [r3, #12]

    WRITE_REG(heth->TxDescList.TxDesc[i], (uint32_t)dmatxdesc);
 8009252:	68b9      	ldr	r1, [r7, #8]
 8009254:	687b      	ldr	r3, [r7, #4]
 8009256:	68fa      	ldr	r2, [r7, #12]
 8009258:	3206      	adds	r2, #6
 800925a:	f843 1022 	str.w	r1, [r3, r2, lsl #2]
  for (i = 0; i < (uint32_t)ETH_TX_DESC_CNT; i++)
 800925e:	68fb      	ldr	r3, [r7, #12]
 8009260:	3301      	adds	r3, #1
 8009262:	60fb      	str	r3, [r7, #12]
 8009264:	68fb      	ldr	r3, [r7, #12]
 8009266:	2b03      	cmp	r3, #3
 8009268:	d9de      	bls.n	8009228 <ETH_DMATxDescListInit+0xe>

  }

  heth->TxDescList.CurTxDesc = 0;
 800926a:	687b      	ldr	r3, [r7, #4]
 800926c:	2200      	movs	r2, #0
 800926e:	629a      	str	r2, [r3, #40]	@ 0x28

  /* Set Transmit Descriptor Ring Length */
  WRITE_REG(heth->Instance->DMACTDRLR, (ETH_TX_DESC_CNT - 1U));
 8009270:	687b      	ldr	r3, [r7, #4]
 8009272:	681b      	ldr	r3, [r3, #0]
 8009274:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8009278:	461a      	mov	r2, r3
 800927a:	2303      	movs	r3, #3
 800927c:	f8c2 312c 	str.w	r3, [r2, #300]	@ 0x12c

  /* Set Transmit Descriptor List Address */
  WRITE_REG(heth->Instance->DMACTDLAR, (uint32_t) heth->Init.TxDesc);
 8009280:	687b      	ldr	r3, [r7, #4]
 8009282:	68da      	ldr	r2, [r3, #12]
 8009284:	687b      	ldr	r3, [r7, #4]
 8009286:	681b      	ldr	r3, [r3, #0]
 8009288:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 800928c:	f8c3 2114 	str.w	r2, [r3, #276]	@ 0x114

  /* Set Transmit Descriptor Tail pointer */
  WRITE_REG(heth->Instance->DMACTDTPR, (uint32_t) heth->Init.TxDesc);
 8009290:	687b      	ldr	r3, [r7, #4]
 8009292:	68da      	ldr	r2, [r3, #12]
 8009294:	687b      	ldr	r3, [r7, #4]
 8009296:	681b      	ldr	r3, [r3, #0]
 8009298:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 800929c:	f8c3 2120 	str.w	r2, [r3, #288]	@ 0x120
}
 80092a0:	bf00      	nop
 80092a2:	3714      	adds	r7, #20
 80092a4:	46bd      	mov	sp, r7
 80092a6:	f85d 7b04 	ldr.w	r7, [sp], #4
 80092aa:	4770      	bx	lr

080092ac <ETH_DMARxDescListInit>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval None
  */
static void ETH_DMARxDescListInit(ETH_HandleTypeDef *heth)
{
 80092ac:	b480      	push	{r7}
 80092ae:	b085      	sub	sp, #20
 80092b0:	af00      	add	r7, sp, #0
 80092b2:	6078      	str	r0, [r7, #4]
  ETH_DMADescTypeDef *dmarxdesc;
  uint32_t i;

  for (i = 0; i < (uint32_t)ETH_RX_DESC_CNT; i++)
 80092b4:	2300      	movs	r3, #0
 80092b6:	60fb      	str	r3, [r7, #12]
 80092b8:	e023      	b.n	8009302 <ETH_DMARxDescListInit+0x56>
  {
    dmarxdesc =  heth->Init.RxDesc + i;
 80092ba:	687b      	ldr	r3, [r7, #4]
 80092bc:	6919      	ldr	r1, [r3, #16]
 80092be:	68fa      	ldr	r2, [r7, #12]
 80092c0:	4613      	mov	r3, r2
 80092c2:	005b      	lsls	r3, r3, #1
 80092c4:	4413      	add	r3, r2
 80092c6:	00db      	lsls	r3, r3, #3
 80092c8:	440b      	add	r3, r1
 80092ca:	60bb      	str	r3, [r7, #8]

    WRITE_REG(dmarxdesc->DESC0, 0x0U);
 80092cc:	68bb      	ldr	r3, [r7, #8]
 80092ce:	2200      	movs	r2, #0
 80092d0:	601a      	str	r2, [r3, #0]
    WRITE_REG(dmarxdesc->DESC1, 0x0U);
 80092d2:	68bb      	ldr	r3, [r7, #8]
 80092d4:	2200      	movs	r2, #0
 80092d6:	605a      	str	r2, [r3, #4]
    WRITE_REG(dmarxdesc->DESC2, 0x0U);
 80092d8:	68bb      	ldr	r3, [r7, #8]
 80092da:	2200      	movs	r2, #0
 80092dc:	609a      	str	r2, [r3, #8]
    WRITE_REG(dmarxdesc->DESC3, 0x0U);
 80092de:	68bb      	ldr	r3, [r7, #8]
 80092e0:	2200      	movs	r2, #0
 80092e2:	60da      	str	r2, [r3, #12]
    WRITE_REG(dmarxdesc->BackupAddr0, 0x0U);
 80092e4:	68bb      	ldr	r3, [r7, #8]
 80092e6:	2200      	movs	r2, #0
 80092e8:	611a      	str	r2, [r3, #16]
    WRITE_REG(dmarxdesc->BackupAddr1, 0x0U);
 80092ea:	68bb      	ldr	r3, [r7, #8]
 80092ec:	2200      	movs	r2, #0
 80092ee:	615a      	str	r2, [r3, #20]

    /* Set Rx descritors addresses */
    WRITE_REG(heth->RxDescList.RxDesc[i], (uint32_t)dmarxdesc);
 80092f0:	68b9      	ldr	r1, [r7, #8]
 80092f2:	687b      	ldr	r3, [r7, #4]
 80092f4:	68fa      	ldr	r2, [r7, #12]
 80092f6:	3212      	adds	r2, #18
 80092f8:	f843 1022 	str.w	r1, [r3, r2, lsl #2]
  for (i = 0; i < (uint32_t)ETH_RX_DESC_CNT; i++)
 80092fc:	68fb      	ldr	r3, [r7, #12]
 80092fe:	3301      	adds	r3, #1
 8009300:	60fb      	str	r3, [r7, #12]
 8009302:	68fb      	ldr	r3, [r7, #12]
 8009304:	2b03      	cmp	r3, #3
 8009306:	d9d8      	bls.n	80092ba <ETH_DMARxDescListInit+0xe>

  }

  WRITE_REG(heth->RxDescList.RxDescIdx, 0U);
 8009308:	687b      	ldr	r3, [r7, #4]
 800930a:	2200      	movs	r2, #0
 800930c:	65da      	str	r2, [r3, #92]	@ 0x5c
  WRITE_REG(heth->RxDescList.RxDescCnt, 0U);
 800930e:	687b      	ldr	r3, [r7, #4]
 8009310:	2200      	movs	r2, #0
 8009312:	661a      	str	r2, [r3, #96]	@ 0x60
  WRITE_REG(heth->RxDescList.RxBuildDescIdx, 0U);
 8009314:	687b      	ldr	r3, [r7, #4]
 8009316:	2200      	movs	r2, #0
 8009318:	669a      	str	r2, [r3, #104]	@ 0x68
  WRITE_REG(heth->RxDescList.RxBuildDescCnt, 0U);
 800931a:	687b      	ldr	r3, [r7, #4]
 800931c:	2200      	movs	r2, #0
 800931e:	66da      	str	r2, [r3, #108]	@ 0x6c
  WRITE_REG(heth->RxDescList.ItMode, 0U);
 8009320:	687b      	ldr	r3, [r7, #4]
 8009322:	2200      	movs	r2, #0
 8009324:	659a      	str	r2, [r3, #88]	@ 0x58

  /* Set Receive Descriptor Ring Length */
  WRITE_REG(heth->Instance->DMACRDRLR, ((uint32_t)(ETH_RX_DESC_CNT - 1U)));
 8009326:	687b      	ldr	r3, [r7, #4]
 8009328:	681b      	ldr	r3, [r3, #0]
 800932a:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 800932e:	461a      	mov	r2, r3
 8009330:	2303      	movs	r3, #3
 8009332:	f8c2 3130 	str.w	r3, [r2, #304]	@ 0x130

  /* Set Receive Descriptor List Address */
  WRITE_REG(heth->Instance->DMACRDLAR, (uint32_t) heth->Init.RxDesc);
 8009336:	687b      	ldr	r3, [r7, #4]
 8009338:	691a      	ldr	r2, [r3, #16]
 800933a:	687b      	ldr	r3, [r7, #4]
 800933c:	681b      	ldr	r3, [r3, #0]
 800933e:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8009342:	f8c3 211c 	str.w	r2, [r3, #284]	@ 0x11c

  /* Set Receive Descriptor Tail pointer Address */
  WRITE_REG(heth->Instance->DMACRDTPR, ((uint32_t)(heth->Init.RxDesc + (uint32_t)(ETH_RX_DESC_CNT - 1U))));
 8009346:	687b      	ldr	r3, [r7, #4]
 8009348:	691b      	ldr	r3, [r3, #16]
 800934a:	f103 0248 	add.w	r2, r3, #72	@ 0x48
 800934e:	687b      	ldr	r3, [r7, #4]
 8009350:	681b      	ldr	r3, [r3, #0]
 8009352:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8009356:	f8c3 2128 	str.w	r2, [r3, #296]	@ 0x128
}
 800935a:	bf00      	nop
 800935c:	3714      	adds	r7, #20
 800935e:	46bd      	mov	sp, r7
 8009360:	f85d 7b04 	ldr.w	r7, [sp], #4
 8009364:	4770      	bx	lr
	...

08009368 <ETH_Prepare_Tx_Descriptors>:
  * @param  ItMode: Enable or disable Tx EOT interrept
  * @retval Status
  */
static uint32_t ETH_Prepare_Tx_Descriptors(ETH_HandleTypeDef *heth, const ETH_TxPacketConfigTypeDef *pTxConfig,
                                           uint32_t ItMode)
{
 8009368:	b480      	push	{r7}
 800936a:	b091      	sub	sp, #68	@ 0x44
 800936c:	af00      	add	r7, sp, #0
 800936e:	60f8      	str	r0, [r7, #12]
 8009370:	60b9      	str	r1, [r7, #8]
 8009372:	607a      	str	r2, [r7, #4]
  ETH_TxDescListTypeDef *dmatxdesclist = &heth->TxDescList;
 8009374:	68fb      	ldr	r3, [r7, #12]
 8009376:	3318      	adds	r3, #24
 8009378:	627b      	str	r3, [r7, #36]	@ 0x24
  uint32_t descidx = dmatxdesclist->CurTxDesc;
 800937a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800937c:	691b      	ldr	r3, [r3, #16]
 800937e:	63fb      	str	r3, [r7, #60]	@ 0x3c
  uint32_t firstdescidx = dmatxdesclist->CurTxDesc;
 8009380:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8009382:	691b      	ldr	r3, [r3, #16]
 8009384:	623b      	str	r3, [r7, #32]
  uint32_t idx;
  uint32_t descnbr = 0;
 8009386:	2300      	movs	r3, #0
 8009388:	637b      	str	r3, [r7, #52]	@ 0x34
  ETH_DMADescTypeDef *dmatxdesc = (ETH_DMADescTypeDef *)dmatxdesclist->TxDesc[descidx];
 800938a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800938c:	6bfa      	ldr	r2, [r7, #60]	@ 0x3c
 800938e:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
 8009392:	633b      	str	r3, [r7, #48]	@ 0x30

  ETH_BufferTypeDef  *txbuffer = pTxConfig->TxBuffer;
 8009394:	68bb      	ldr	r3, [r7, #8]
 8009396:	689b      	ldr	r3, [r3, #8]
 8009398:	62fb      	str	r3, [r7, #44]	@ 0x2c
  uint32_t           bd_count = 0;
 800939a:	2300      	movs	r3, #0
 800939c:	62bb      	str	r3, [r7, #40]	@ 0x28
  uint32_t primask_bit;

  /* Current Tx Descriptor Owned by DMA: cannot be used by the application  */
  if ((READ_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCWBF_OWN) == ETH_DMATXNDESCWBF_OWN)
 800939e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80093a0:	68db      	ldr	r3, [r3, #12]
 80093a2:	f003 4300 	and.w	r3, r3, #2147483648	@ 0x80000000
 80093a6:	f1b3 4f00 	cmp.w	r3, #2147483648	@ 0x80000000
 80093aa:	d007      	beq.n	80093bc <ETH_Prepare_Tx_Descriptors+0x54>
      || (dmatxdesclist->PacketAddress[descidx] != NULL))
 80093ac:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 80093ae:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 80093b0:	3304      	adds	r3, #4
 80093b2:	009b      	lsls	r3, r3, #2
 80093b4:	4413      	add	r3, r2
 80093b6:	685b      	ldr	r3, [r3, #4]
 80093b8:	2b00      	cmp	r3, #0
 80093ba:	d001      	beq.n	80093c0 <ETH_Prepare_Tx_Descriptors+0x58>
  {
    return HAL_ETH_ERROR_BUSY;
 80093bc:	2302      	movs	r3, #2
 80093be:	e266      	b.n	800988e <ETH_Prepare_Tx_Descriptors+0x526>

  /***************************************************************************/
  /*****************    Context descriptor configuration (Optional) **********/
  /***************************************************************************/
  /* If VLAN tag is enabled for this packet */
  if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_VLANTAG) != (uint32_t)RESET)
 80093c0:	68bb      	ldr	r3, [r7, #8]
 80093c2:	681b      	ldr	r3, [r3, #0]
 80093c4:	f003 0304 	and.w	r3, r3, #4
 80093c8:	2b00      	cmp	r3, #0
 80093ca:	d044      	beq.n	8009456 <ETH_Prepare_Tx_Descriptors+0xee>
  {
    /* Set vlan tag value */
    MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXCDESC_VT, pTxConfig->VlanTag);
 80093cc:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80093ce:	68da      	ldr	r2, [r3, #12]
 80093d0:	4b75      	ldr	r3, [pc, #468]	@ (80095a8 <ETH_Prepare_Tx_Descriptors+0x240>)
 80093d2:	4013      	ands	r3, r2
 80093d4:	68ba      	ldr	r2, [r7, #8]
 80093d6:	6a52      	ldr	r2, [r2, #36]	@ 0x24
 80093d8:	431a      	orrs	r2, r3
 80093da:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80093dc:	60da      	str	r2, [r3, #12]
    /* Set vlan tag valid bit */
    SET_BIT(dmatxdesc->DESC3, ETH_DMATXCDESC_VLTV);
 80093de:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80093e0:	68db      	ldr	r3, [r3, #12]
 80093e2:	f443 3280 	orr.w	r2, r3, #65536	@ 0x10000
 80093e6:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80093e8:	60da      	str	r2, [r3, #12]
    /* Set the descriptor as the vlan input source */
    SET_BIT(heth->Instance->MACVIR, ETH_MACVIR_VLTI);
 80093ea:	68fb      	ldr	r3, [r7, #12]
 80093ec:	681b      	ldr	r3, [r3, #0]
 80093ee:	6e1a      	ldr	r2, [r3, #96]	@ 0x60
 80093f0:	68fb      	ldr	r3, [r7, #12]
 80093f2:	681b      	ldr	r3, [r3, #0]
 80093f4:	f442 1280 	orr.w	r2, r2, #1048576	@ 0x100000
 80093f8:	661a      	str	r2, [r3, #96]	@ 0x60

    /* if inner VLAN is enabled */
    if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_INNERVLANTAG) != (uint32_t)RESET)
 80093fa:	68bb      	ldr	r3, [r7, #8]
 80093fc:	681b      	ldr	r3, [r3, #0]
 80093fe:	f003 0308 	and.w	r3, r3, #8
 8009402:	2b00      	cmp	r3, #0
 8009404:	d027      	beq.n	8009456 <ETH_Prepare_Tx_Descriptors+0xee>
    {
      /* Set inner vlan tag value */
      MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXCDESC_IVT, (pTxConfig->InnerVlanTag << 16));
 8009406:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009408:	689b      	ldr	r3, [r3, #8]
 800940a:	b29a      	uxth	r2, r3
 800940c:	68bb      	ldr	r3, [r7, #8]
 800940e:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8009410:	041b      	lsls	r3, r3, #16
 8009412:	431a      	orrs	r2, r3
 8009414:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009416:	609a      	str	r2, [r3, #8]
      /* Set inner vlan tag valid bit */
      SET_BIT(dmatxdesc->DESC3, ETH_DMATXCDESC_IVLTV);
 8009418:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800941a:	68db      	ldr	r3, [r3, #12]
 800941c:	f443 3200 	orr.w	r2, r3, #131072	@ 0x20000
 8009420:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009422:	60da      	str	r2, [r3, #12]

      /* Set Vlan Tag control */
      MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXCDESC_IVTIR, pTxConfig->InnerVlanCtrl);
 8009424:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009426:	68db      	ldr	r3, [r3, #12]
 8009428:	f423 2240 	bic.w	r2, r3, #786432	@ 0xc0000
 800942c:	68bb      	ldr	r3, [r7, #8]
 800942e:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8009430:	431a      	orrs	r2, r3
 8009432:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009434:	60da      	str	r2, [r3, #12]

      /* Set the descriptor as the inner vlan input source */
      SET_BIT(heth->Instance->MACIVIR, ETH_MACIVIR_VLTI);
 8009436:	68fb      	ldr	r3, [r7, #12]
 8009438:	681b      	ldr	r3, [r3, #0]
 800943a:	6e5a      	ldr	r2, [r3, #100]	@ 0x64
 800943c:	68fb      	ldr	r3, [r7, #12]
 800943e:	681b      	ldr	r3, [r3, #0]
 8009440:	f442 1280 	orr.w	r2, r2, #1048576	@ 0x100000
 8009444:	665a      	str	r2, [r3, #100]	@ 0x64
      /* Enable double VLAN processing */
      SET_BIT(heth->Instance->MACVTR, ETH_MACVTR_EDVLP);
 8009446:	68fb      	ldr	r3, [r7, #12]
 8009448:	681b      	ldr	r3, [r3, #0]
 800944a:	6d1a      	ldr	r2, [r3, #80]	@ 0x50
 800944c:	68fb      	ldr	r3, [r7, #12]
 800944e:	681b      	ldr	r3, [r3, #0]
 8009450:	f042 6280 	orr.w	r2, r2, #67108864	@ 0x4000000
 8009454:	651a      	str	r2, [r3, #80]	@ 0x50
    }
  }

  /* if tcp segmentation is enabled for this packet */
  if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_TSO) != (uint32_t)RESET)
 8009456:	68bb      	ldr	r3, [r7, #8]
 8009458:	681b      	ldr	r3, [r3, #0]
 800945a:	f003 0310 	and.w	r3, r3, #16
 800945e:	2b00      	cmp	r3, #0
 8009460:	d00e      	beq.n	8009480 <ETH_Prepare_Tx_Descriptors+0x118>
  {
    /* Set MSS value */
    MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXCDESC_MSS, pTxConfig->MaxSegmentSize);
 8009462:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009464:	689a      	ldr	r2, [r3, #8]
 8009466:	4b51      	ldr	r3, [pc, #324]	@ (80095ac <ETH_Prepare_Tx_Descriptors+0x244>)
 8009468:	4013      	ands	r3, r2
 800946a:	68ba      	ldr	r2, [r7, #8]
 800946c:	6992      	ldr	r2, [r2, #24]
 800946e:	431a      	orrs	r2, r3
 8009470:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009472:	609a      	str	r2, [r3, #8]
    /* Set MSS valid bit */
    SET_BIT(dmatxdesc->DESC3, ETH_DMATXCDESC_TCMSSV);
 8009474:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009476:	68db      	ldr	r3, [r3, #12]
 8009478:	f043 6280 	orr.w	r2, r3, #67108864	@ 0x4000000
 800947c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800947e:	60da      	str	r2, [r3, #12]
  }

  if ((READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_VLANTAG) != (uint32_t)RESET)
 8009480:	68bb      	ldr	r3, [r7, #8]
 8009482:	681b      	ldr	r3, [r3, #0]
 8009484:	f003 0304 	and.w	r3, r3, #4
 8009488:	2b00      	cmp	r3, #0
 800948a:	d105      	bne.n	8009498 <ETH_Prepare_Tx_Descriptors+0x130>
      || (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_TSO) != (uint32_t)RESET))
 800948c:	68bb      	ldr	r3, [r7, #8]
 800948e:	681b      	ldr	r3, [r3, #0]
 8009490:	f003 0310 	and.w	r3, r3, #16
 8009494:	2b00      	cmp	r3, #0
 8009496:	d036      	beq.n	8009506 <ETH_Prepare_Tx_Descriptors+0x19e>
  {
    /* Set as context descriptor */
    SET_BIT(dmatxdesc->DESC3, ETH_DMATXCDESC_CTXT);
 8009498:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800949a:	68db      	ldr	r3, [r3, #12]
 800949c:	f043 4280 	orr.w	r2, r3, #1073741824	@ 0x40000000
 80094a0:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80094a2:	60da      	str	r2, [r3, #12]
  __ASM volatile ("dmb 0xF":::"memory");
 80094a4:	f3bf 8f5f 	dmb	sy
}
 80094a8:	bf00      	nop
    /* Ensure rest of descriptor is written to RAM before the OWN bit */
    __DMB();
    /* Set own bit */
    SET_BIT(dmatxdesc->DESC3, ETH_DMATXCDESC_OWN);
 80094aa:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80094ac:	68db      	ldr	r3, [r3, #12]
 80094ae:	f043 4200 	orr.w	r2, r3, #2147483648	@ 0x80000000
 80094b2:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80094b4:	60da      	str	r2, [r3, #12]
    /* Increment current tx descriptor index */
    INCR_TX_DESC_INDEX(descidx, 1U);
 80094b6:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 80094b8:	3301      	adds	r3, #1
 80094ba:	63fb      	str	r3, [r7, #60]	@ 0x3c
 80094bc:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 80094be:	2b03      	cmp	r3, #3
 80094c0:	d902      	bls.n	80094c8 <ETH_Prepare_Tx_Descriptors+0x160>
 80094c2:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 80094c4:	3b04      	subs	r3, #4
 80094c6:	63fb      	str	r3, [r7, #60]	@ 0x3c
    /* Get current descriptor address */
    dmatxdesc = (ETH_DMADescTypeDef *)dmatxdesclist->TxDesc[descidx];
 80094c8:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80094ca:	6bfa      	ldr	r2, [r7, #60]	@ 0x3c
 80094cc:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
 80094d0:	633b      	str	r3, [r7, #48]	@ 0x30

    descnbr += 1U;
 80094d2:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 80094d4:	3301      	adds	r3, #1
 80094d6:	637b      	str	r3, [r7, #52]	@ 0x34

    /* Current Tx Descriptor Owned by DMA: cannot be used by the application  */
    if (READ_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCWBF_OWN) == ETH_DMATXNDESCWBF_OWN)
 80094d8:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80094da:	68db      	ldr	r3, [r3, #12]
 80094dc:	f003 4300 	and.w	r3, r3, #2147483648	@ 0x80000000
 80094e0:	f1b3 4f00 	cmp.w	r3, #2147483648	@ 0x80000000
 80094e4:	d10f      	bne.n	8009506 <ETH_Prepare_Tx_Descriptors+0x19e>
    {
      dmatxdesc = (ETH_DMADescTypeDef *)dmatxdesclist->TxDesc[firstdescidx];
 80094e6:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80094e8:	6a3a      	ldr	r2, [r7, #32]
 80094ea:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
 80094ee:	633b      	str	r3, [r7, #48]	@ 0x30
  __ASM volatile ("dmb 0xF":::"memory");
 80094f0:	f3bf 8f5f 	dmb	sy
}
 80094f4:	bf00      	nop
      /* Ensure rest of descriptor is written to RAM before the OWN bit */
      __DMB();
      /* Clear own bit */
      CLEAR_BIT(dmatxdesc->DESC3, ETH_DMATXCDESC_OWN);
 80094f6:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80094f8:	68db      	ldr	r3, [r3, #12]
 80094fa:	f023 4200 	bic.w	r2, r3, #2147483648	@ 0x80000000
 80094fe:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009500:	60da      	str	r2, [r3, #12]

      return HAL_ETH_ERROR_BUSY;
 8009502:	2302      	movs	r3, #2
 8009504:	e1c3      	b.n	800988e <ETH_Prepare_Tx_Descriptors+0x526>

  /***************************************************************************/
  /*****************    Normal descriptors configuration     *****************/
  /***************************************************************************/

  descnbr += 1U;
 8009506:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8009508:	3301      	adds	r3, #1
 800950a:	637b      	str	r3, [r7, #52]	@ 0x34

  /* Set header or buffer 1 address */
  WRITE_REG(dmatxdesc->DESC0, (uint32_t)txbuffer->buffer);
 800950c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 800950e:	681b      	ldr	r3, [r3, #0]
 8009510:	461a      	mov	r2, r3
 8009512:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009514:	601a      	str	r2, [r3, #0]
  /* Set header or buffer 1 Length */
  MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B1L, txbuffer->len);
 8009516:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009518:	689a      	ldr	r2, [r3, #8]
 800951a:	4b24      	ldr	r3, [pc, #144]	@ (80095ac <ETH_Prepare_Tx_Descriptors+0x244>)
 800951c:	4013      	ands	r3, r2
 800951e:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 8009520:	6852      	ldr	r2, [r2, #4]
 8009522:	431a      	orrs	r2, r3
 8009524:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009526:	609a      	str	r2, [r3, #8]

  if (txbuffer->next != NULL)
 8009528:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 800952a:	689b      	ldr	r3, [r3, #8]
 800952c:	2b00      	cmp	r3, #0
 800952e:	d012      	beq.n	8009556 <ETH_Prepare_Tx_Descriptors+0x1ee>
  {
    txbuffer = txbuffer->next;
 8009530:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8009532:	689b      	ldr	r3, [r3, #8]
 8009534:	62fb      	str	r3, [r7, #44]	@ 0x2c
    /* Set buffer 2 address */
    WRITE_REG(dmatxdesc->DESC1, (uint32_t)txbuffer->buffer);
 8009536:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8009538:	681b      	ldr	r3, [r3, #0]
 800953a:	461a      	mov	r2, r3
 800953c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800953e:	605a      	str	r2, [r3, #4]
    /* Set buffer 2 Length */
    MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B2L, (txbuffer->len << 16));
 8009540:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009542:	689a      	ldr	r2, [r3, #8]
 8009544:	4b1a      	ldr	r3, [pc, #104]	@ (80095b0 <ETH_Prepare_Tx_Descriptors+0x248>)
 8009546:	4013      	ands	r3, r2
 8009548:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 800954a:	6852      	ldr	r2, [r2, #4]
 800954c:	0412      	lsls	r2, r2, #16
 800954e:	431a      	orrs	r2, r3
 8009550:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009552:	609a      	str	r2, [r3, #8]
 8009554:	e008      	b.n	8009568 <ETH_Prepare_Tx_Descriptors+0x200>
  }
  else
  {
    WRITE_REG(dmatxdesc->DESC1, 0x0U);
 8009556:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009558:	2200      	movs	r2, #0
 800955a:	605a      	str	r2, [r3, #4]
    /* Set buffer 2 Length */
    MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B2L, 0x0U);
 800955c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800955e:	689a      	ldr	r2, [r3, #8]
 8009560:	4b13      	ldr	r3, [pc, #76]	@ (80095b0 <ETH_Prepare_Tx_Descriptors+0x248>)
 8009562:	4013      	ands	r3, r2
 8009564:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 8009566:	6093      	str	r3, [r2, #8]
  }

  if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_TSO) != (uint32_t)RESET)
 8009568:	68bb      	ldr	r3, [r7, #8]
 800956a:	681b      	ldr	r3, [r3, #0]
 800956c:	f003 0310 	and.w	r3, r3, #16
 8009570:	2b00      	cmp	r3, #0
 8009572:	d021      	beq.n	80095b8 <ETH_Prepare_Tx_Descriptors+0x250>
  {
    /* Set TCP Header length */
    MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_THL, (pTxConfig->TCPHeaderLen << 19));
 8009574:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009576:	68db      	ldr	r3, [r3, #12]
 8009578:	f423 02f0 	bic.w	r2, r3, #7864320	@ 0x780000
 800957c:	68bb      	ldr	r3, [r7, #8]
 800957e:	6a1b      	ldr	r3, [r3, #32]
 8009580:	04db      	lsls	r3, r3, #19
 8009582:	431a      	orrs	r2, r3
 8009584:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009586:	60da      	str	r2, [r3, #12]
    /* Set TCP payload length */
    MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_TPL, pTxConfig->PayloadLen);
 8009588:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800958a:	68da      	ldr	r2, [r3, #12]
 800958c:	4b09      	ldr	r3, [pc, #36]	@ (80095b4 <ETH_Prepare_Tx_Descriptors+0x24c>)
 800958e:	4013      	ands	r3, r2
 8009590:	68ba      	ldr	r2, [r7, #8]
 8009592:	69d2      	ldr	r2, [r2, #28]
 8009594:	431a      	orrs	r2, r3
 8009596:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009598:	60da      	str	r2, [r3, #12]
    /* Set TCP Segmentation Enabled bit */
    SET_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_TSE);
 800959a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800959c:	68db      	ldr	r3, [r3, #12]
 800959e:	f443 2280 	orr.w	r2, r3, #262144	@ 0x40000
 80095a2:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80095a4:	60da      	str	r2, [r3, #12]
 80095a6:	e02e      	b.n	8009606 <ETH_Prepare_Tx_Descriptors+0x29e>
 80095a8:	ffff0000 	.word	0xffff0000
 80095ac:	ffffc000 	.word	0xffffc000
 80095b0:	c000ffff 	.word	0xc000ffff
 80095b4:	fffc0000 	.word	0xfffc0000
  }
  else
  {
    MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_FL, pTxConfig->Length);
 80095b8:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80095ba:	68da      	ldr	r2, [r3, #12]
 80095bc:	4b7b      	ldr	r3, [pc, #492]	@ (80097ac <ETH_Prepare_Tx_Descriptors+0x444>)
 80095be:	4013      	ands	r3, r2
 80095c0:	68ba      	ldr	r2, [r7, #8]
 80095c2:	6852      	ldr	r2, [r2, #4]
 80095c4:	431a      	orrs	r2, r3
 80095c6:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80095c8:	60da      	str	r2, [r3, #12]

    if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_CSUM) != (uint32_t)RESET)
 80095ca:	68bb      	ldr	r3, [r7, #8]
 80095cc:	681b      	ldr	r3, [r3, #0]
 80095ce:	f003 0301 	and.w	r3, r3, #1
 80095d2:	2b00      	cmp	r3, #0
 80095d4:	d008      	beq.n	80095e8 <ETH_Prepare_Tx_Descriptors+0x280>
    {
      MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_CIC, pTxConfig->ChecksumCtrl);
 80095d6:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80095d8:	68db      	ldr	r3, [r3, #12]
 80095da:	f423 3240 	bic.w	r2, r3, #196608	@ 0x30000
 80095de:	68bb      	ldr	r3, [r7, #8]
 80095e0:	695b      	ldr	r3, [r3, #20]
 80095e2:	431a      	orrs	r2, r3
 80095e4:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80095e6:	60da      	str	r2, [r3, #12]
    }

    if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_CRCPAD) != (uint32_t)RESET)
 80095e8:	68bb      	ldr	r3, [r7, #8]
 80095ea:	681b      	ldr	r3, [r3, #0]
 80095ec:	f003 0320 	and.w	r3, r3, #32
 80095f0:	2b00      	cmp	r3, #0
 80095f2:	d008      	beq.n	8009606 <ETH_Prepare_Tx_Descriptors+0x29e>
    {
      MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_CPC, pTxConfig->CRCPadCtrl);
 80095f4:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80095f6:	68db      	ldr	r3, [r3, #12]
 80095f8:	f023 6240 	bic.w	r2, r3, #201326592	@ 0xc000000
 80095fc:	68bb      	ldr	r3, [r7, #8]
 80095fe:	691b      	ldr	r3, [r3, #16]
 8009600:	431a      	orrs	r2, r3
 8009602:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009604:	60da      	str	r2, [r3, #12]
    }
  }

  if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_VLANTAG) != (uint32_t)RESET)
 8009606:	68bb      	ldr	r3, [r7, #8]
 8009608:	681b      	ldr	r3, [r3, #0]
 800960a:	f003 0304 	and.w	r3, r3, #4
 800960e:	2b00      	cmp	r3, #0
 8009610:	d008      	beq.n	8009624 <ETH_Prepare_Tx_Descriptors+0x2bc>
  {
    /* Set Vlan Tag control */
    MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_VTIR, pTxConfig->VlanCtrl);
 8009612:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009614:	689b      	ldr	r3, [r3, #8]
 8009616:	f423 4240 	bic.w	r2, r3, #49152	@ 0xc000
 800961a:	68bb      	ldr	r3, [r7, #8]
 800961c:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800961e:	431a      	orrs	r2, r3
 8009620:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009622:	609a      	str	r2, [r3, #8]
  }

  /* Mark it as First Descriptor */
  SET_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_FD);
 8009624:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009626:	68db      	ldr	r3, [r3, #12]
 8009628:	f043 5200 	orr.w	r2, r3, #536870912	@ 0x20000000
 800962c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800962e:	60da      	str	r2, [r3, #12]
  /* Mark it as NORMAL descriptor */
  CLEAR_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_CTXT);
 8009630:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009632:	68db      	ldr	r3, [r3, #12]
 8009634:	f023 4280 	bic.w	r2, r3, #1073741824	@ 0x40000000
 8009638:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800963a:	60da      	str	r2, [r3, #12]
  __ASM volatile ("dmb 0xF":::"memory");
 800963c:	f3bf 8f5f 	dmb	sy
}
 8009640:	bf00      	nop
  /* Ensure rest of descriptor is written to RAM before the OWN bit */
  __DMB();
  /* set OWN bit of FIRST descriptor */
  SET_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_OWN);
 8009642:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009644:	68db      	ldr	r3, [r3, #12]
 8009646:	f043 4200 	orr.w	r2, r3, #2147483648	@ 0x80000000
 800964a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800964c:	60da      	str	r2, [r3, #12]

  /* If source address insertion/replacement is enabled for this packet */
  if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_SAIC) != (uint32_t)RESET)
 800964e:	68bb      	ldr	r3, [r7, #8]
 8009650:	681b      	ldr	r3, [r3, #0]
 8009652:	f003 0302 	and.w	r3, r3, #2
 8009656:	2b00      	cmp	r3, #0
 8009658:	f000 80da 	beq.w	8009810 <ETH_Prepare_Tx_Descriptors+0x4a8>
  {
    MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_SAIC, pTxConfig->SrcAddrCtrl);
 800965c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800965e:	68db      	ldr	r3, [r3, #12]
 8009660:	f023 7260 	bic.w	r2, r3, #58720256	@ 0x3800000
 8009664:	68bb      	ldr	r3, [r7, #8]
 8009666:	68db      	ldr	r3, [r3, #12]
 8009668:	431a      	orrs	r2, r3
 800966a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800966c:	60da      	str	r2, [r3, #12]
  }

  /* only if the packet is split into more than one descriptors > 1 */
  while (txbuffer->next != NULL)
 800966e:	e0cf      	b.n	8009810 <ETH_Prepare_Tx_Descriptors+0x4a8>
  {
    /* Clear the LD bit of previous descriptor */
    CLEAR_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_LD);
 8009670:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009672:	68db      	ldr	r3, [r3, #12]
 8009674:	f023 5280 	bic.w	r2, r3, #268435456	@ 0x10000000
 8009678:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800967a:	60da      	str	r2, [r3, #12]
    /* Increment current tx descriptor index */
    INCR_TX_DESC_INDEX(descidx, 1U);
 800967c:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800967e:	3301      	adds	r3, #1
 8009680:	63fb      	str	r3, [r7, #60]	@ 0x3c
 8009682:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 8009684:	2b03      	cmp	r3, #3
 8009686:	d902      	bls.n	800968e <ETH_Prepare_Tx_Descriptors+0x326>
 8009688:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800968a:	3b04      	subs	r3, #4
 800968c:	63fb      	str	r3, [r7, #60]	@ 0x3c
    /* Get current descriptor address */
    dmatxdesc = (ETH_DMADescTypeDef *)dmatxdesclist->TxDesc[descidx];
 800968e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8009690:	6bfa      	ldr	r2, [r7, #60]	@ 0x3c
 8009692:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
 8009696:	633b      	str	r3, [r7, #48]	@ 0x30

    /* Clear the FD bit of new Descriptor */
    CLEAR_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_FD);
 8009698:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800969a:	68db      	ldr	r3, [r3, #12]
 800969c:	f023 5200 	bic.w	r2, r3, #536870912	@ 0x20000000
 80096a0:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80096a2:	60da      	str	r2, [r3, #12]

    /* Current Tx Descriptor Owned by DMA: cannot be used by the application  */
    if ((READ_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_OWN) == ETH_DMATXNDESCRF_OWN)
 80096a4:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80096a6:	68db      	ldr	r3, [r3, #12]
 80096a8:	f003 4300 	and.w	r3, r3, #2147483648	@ 0x80000000
 80096ac:	f1b3 4f00 	cmp.w	r3, #2147483648	@ 0x80000000
 80096b0:	d007      	beq.n	80096c2 <ETH_Prepare_Tx_Descriptors+0x35a>
        || (dmatxdesclist->PacketAddress[descidx] != NULL))
 80096b2:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 80096b4:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 80096b6:	3304      	adds	r3, #4
 80096b8:	009b      	lsls	r3, r3, #2
 80096ba:	4413      	add	r3, r2
 80096bc:	685b      	ldr	r3, [r3, #4]
 80096be:	2b00      	cmp	r3, #0
 80096c0:	d029      	beq.n	8009716 <ETH_Prepare_Tx_Descriptors+0x3ae>
    {
      descidx = firstdescidx;
 80096c2:	6a3b      	ldr	r3, [r7, #32]
 80096c4:	63fb      	str	r3, [r7, #60]	@ 0x3c
      dmatxdesc = (ETH_DMADescTypeDef *)dmatxdesclist->TxDesc[descidx];
 80096c6:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80096c8:	6bfa      	ldr	r2, [r7, #60]	@ 0x3c
 80096ca:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
 80096ce:	633b      	str	r3, [r7, #48]	@ 0x30

      /* clear previous desc own bit */
      for (idx = 0; idx < descnbr; idx ++)
 80096d0:	2300      	movs	r3, #0
 80096d2:	63bb      	str	r3, [r7, #56]	@ 0x38
 80096d4:	e019      	b.n	800970a <ETH_Prepare_Tx_Descriptors+0x3a2>
  __ASM volatile ("dmb 0xF":::"memory");
 80096d6:	f3bf 8f5f 	dmb	sy
}
 80096da:	bf00      	nop
      {
        /* Ensure rest of descriptor is written to RAM before the OWN bit */
        __DMB();

        CLEAR_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_OWN);
 80096dc:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80096de:	68db      	ldr	r3, [r3, #12]
 80096e0:	f023 4200 	bic.w	r2, r3, #2147483648	@ 0x80000000
 80096e4:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80096e6:	60da      	str	r2, [r3, #12]

        /* Increment current tx descriptor index */
        INCR_TX_DESC_INDEX(descidx, 1U);
 80096e8:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 80096ea:	3301      	adds	r3, #1
 80096ec:	63fb      	str	r3, [r7, #60]	@ 0x3c
 80096ee:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 80096f0:	2b03      	cmp	r3, #3
 80096f2:	d902      	bls.n	80096fa <ETH_Prepare_Tx_Descriptors+0x392>
 80096f4:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 80096f6:	3b04      	subs	r3, #4
 80096f8:	63fb      	str	r3, [r7, #60]	@ 0x3c
        /* Get current descriptor address */
        dmatxdesc = (ETH_DMADescTypeDef *)dmatxdesclist->TxDesc[descidx];
 80096fa:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80096fc:	6bfa      	ldr	r2, [r7, #60]	@ 0x3c
 80096fe:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
 8009702:	633b      	str	r3, [r7, #48]	@ 0x30
      for (idx = 0; idx < descnbr; idx ++)
 8009704:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8009706:	3301      	adds	r3, #1
 8009708:	63bb      	str	r3, [r7, #56]	@ 0x38
 800970a:	6bba      	ldr	r2, [r7, #56]	@ 0x38
 800970c:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 800970e:	429a      	cmp	r2, r3
 8009710:	d3e1      	bcc.n	80096d6 <ETH_Prepare_Tx_Descriptors+0x36e>
      }

      return HAL_ETH_ERROR_BUSY;
 8009712:	2302      	movs	r3, #2
 8009714:	e0bb      	b.n	800988e <ETH_Prepare_Tx_Descriptors+0x526>
    }

    descnbr += 1U;
 8009716:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8009718:	3301      	adds	r3, #1
 800971a:	637b      	str	r3, [r7, #52]	@ 0x34

    /* Get the next Tx buffer in the list */
    txbuffer = txbuffer->next;
 800971c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 800971e:	689b      	ldr	r3, [r3, #8]
 8009720:	62fb      	str	r3, [r7, #44]	@ 0x2c

    /* Set header or buffer 1 address */
    WRITE_REG(dmatxdesc->DESC0, (uint32_t)txbuffer->buffer);
 8009722:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8009724:	681b      	ldr	r3, [r3, #0]
 8009726:	461a      	mov	r2, r3
 8009728:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800972a:	601a      	str	r2, [r3, #0]
    /* Set header or buffer 1 Length */
    MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B1L, txbuffer->len);
 800972c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800972e:	689a      	ldr	r2, [r3, #8]
 8009730:	4b1f      	ldr	r3, [pc, #124]	@ (80097b0 <ETH_Prepare_Tx_Descriptors+0x448>)
 8009732:	4013      	ands	r3, r2
 8009734:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 8009736:	6852      	ldr	r2, [r2, #4]
 8009738:	431a      	orrs	r2, r3
 800973a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800973c:	609a      	str	r2, [r3, #8]

    if (txbuffer->next != NULL)
 800973e:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8009740:	689b      	ldr	r3, [r3, #8]
 8009742:	2b00      	cmp	r3, #0
 8009744:	d012      	beq.n	800976c <ETH_Prepare_Tx_Descriptors+0x404>
    {
      /* Get the next Tx buffer in the list */
      txbuffer = txbuffer->next;
 8009746:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8009748:	689b      	ldr	r3, [r3, #8]
 800974a:	62fb      	str	r3, [r7, #44]	@ 0x2c
      /* Set buffer 2 address */
      WRITE_REG(dmatxdesc->DESC1, (uint32_t)txbuffer->buffer);
 800974c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 800974e:	681b      	ldr	r3, [r3, #0]
 8009750:	461a      	mov	r2, r3
 8009752:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009754:	605a      	str	r2, [r3, #4]
      /* Set buffer 2 Length */
      MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B2L, (txbuffer->len << 16));
 8009756:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009758:	689a      	ldr	r2, [r3, #8]
 800975a:	4b16      	ldr	r3, [pc, #88]	@ (80097b4 <ETH_Prepare_Tx_Descriptors+0x44c>)
 800975c:	4013      	ands	r3, r2
 800975e:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 8009760:	6852      	ldr	r2, [r2, #4]
 8009762:	0412      	lsls	r2, r2, #16
 8009764:	431a      	orrs	r2, r3
 8009766:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009768:	609a      	str	r2, [r3, #8]
 800976a:	e008      	b.n	800977e <ETH_Prepare_Tx_Descriptors+0x416>
    }
    else
    {
      WRITE_REG(dmatxdesc->DESC1, 0x0U);
 800976c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800976e:	2200      	movs	r2, #0
 8009770:	605a      	str	r2, [r3, #4]
      /* Set buffer 2 Length */
      MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B2L, 0x0U);
 8009772:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009774:	689a      	ldr	r2, [r3, #8]
 8009776:	4b0f      	ldr	r3, [pc, #60]	@ (80097b4 <ETH_Prepare_Tx_Descriptors+0x44c>)
 8009778:	4013      	ands	r3, r2
 800977a:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 800977c:	6093      	str	r3, [r2, #8]
    }

    if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_TSO) != (uint32_t)RESET)
 800977e:	68bb      	ldr	r3, [r7, #8]
 8009780:	681b      	ldr	r3, [r3, #0]
 8009782:	f003 0310 	and.w	r3, r3, #16
 8009786:	2b00      	cmp	r3, #0
 8009788:	d018      	beq.n	80097bc <ETH_Prepare_Tx_Descriptors+0x454>
    {
      /* Set TCP payload length */
      MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_TPL, pTxConfig->PayloadLen);
 800978a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800978c:	68da      	ldr	r2, [r3, #12]
 800978e:	4b0a      	ldr	r3, [pc, #40]	@ (80097b8 <ETH_Prepare_Tx_Descriptors+0x450>)
 8009790:	4013      	ands	r3, r2
 8009792:	68ba      	ldr	r2, [r7, #8]
 8009794:	69d2      	ldr	r2, [r2, #28]
 8009796:	431a      	orrs	r2, r3
 8009798:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800979a:	60da      	str	r2, [r3, #12]
      /* Set TCP Segmentation Enabled bit */
      SET_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_TSE);
 800979c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800979e:	68db      	ldr	r3, [r3, #12]
 80097a0:	f443 2280 	orr.w	r2, r3, #262144	@ 0x40000
 80097a4:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80097a6:	60da      	str	r2, [r3, #12]
 80097a8:	e020      	b.n	80097ec <ETH_Prepare_Tx_Descriptors+0x484>
 80097aa:	bf00      	nop
 80097ac:	ffff8000 	.word	0xffff8000
 80097b0:	ffffc000 	.word	0xffffc000
 80097b4:	c000ffff 	.word	0xc000ffff
 80097b8:	fffc0000 	.word	0xfffc0000
    }
    else
    {
      /* Set the packet length */
      MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_FL, pTxConfig->Length);
 80097bc:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80097be:	68da      	ldr	r2, [r3, #12]
 80097c0:	4b36      	ldr	r3, [pc, #216]	@ (800989c <ETH_Prepare_Tx_Descriptors+0x534>)
 80097c2:	4013      	ands	r3, r2
 80097c4:	68ba      	ldr	r2, [r7, #8]
 80097c6:	6852      	ldr	r2, [r2, #4]
 80097c8:	431a      	orrs	r2, r3
 80097ca:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80097cc:	60da      	str	r2, [r3, #12]

      if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_CSUM) != (uint32_t)RESET)
 80097ce:	68bb      	ldr	r3, [r7, #8]
 80097d0:	681b      	ldr	r3, [r3, #0]
 80097d2:	f003 0301 	and.w	r3, r3, #1
 80097d6:	2b00      	cmp	r3, #0
 80097d8:	d008      	beq.n	80097ec <ETH_Prepare_Tx_Descriptors+0x484>
      {
        /* Checksum Insertion Control */
        MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_CIC, pTxConfig->ChecksumCtrl);
 80097da:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80097dc:	68db      	ldr	r3, [r3, #12]
 80097de:	f423 3240 	bic.w	r2, r3, #196608	@ 0x30000
 80097e2:	68bb      	ldr	r3, [r7, #8]
 80097e4:	695b      	ldr	r3, [r3, #20]
 80097e6:	431a      	orrs	r2, r3
 80097e8:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80097ea:	60da      	str	r2, [r3, #12]
      }
    }

    bd_count += 1U;
 80097ec:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80097ee:	3301      	adds	r3, #1
 80097f0:	62bb      	str	r3, [r7, #40]	@ 0x28
  __ASM volatile ("dmb 0xF":::"memory");
 80097f2:	f3bf 8f5f 	dmb	sy
}
 80097f6:	bf00      	nop

    /* Ensure rest of descriptor is written to RAM before the OWN bit */
    __DMB();
    /* Set Own bit */
    SET_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_OWN);
 80097f8:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80097fa:	68db      	ldr	r3, [r3, #12]
 80097fc:	f043 4200 	orr.w	r2, r3, #2147483648	@ 0x80000000
 8009800:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009802:	60da      	str	r2, [r3, #12]
    /* Mark it as NORMAL descriptor */
    CLEAR_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_CTXT);
 8009804:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009806:	68db      	ldr	r3, [r3, #12]
 8009808:	f023 4280 	bic.w	r2, r3, #1073741824	@ 0x40000000
 800980c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800980e:	60da      	str	r2, [r3, #12]
  while (txbuffer->next != NULL)
 8009810:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8009812:	689b      	ldr	r3, [r3, #8]
 8009814:	2b00      	cmp	r3, #0
 8009816:	f47f af2b 	bne.w	8009670 <ETH_Prepare_Tx_Descriptors+0x308>
  }

  if (ItMode != ((uint32_t)RESET))
 800981a:	687b      	ldr	r3, [r7, #4]
 800981c:	2b00      	cmp	r3, #0
 800981e:	d006      	beq.n	800982e <ETH_Prepare_Tx_Descriptors+0x4c6>
  {
    /* Set Interrupt on completion bit */
    SET_BIT(dmatxdesc->DESC2, ETH_DMATXNDESCRF_IOC);
 8009820:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009822:	689b      	ldr	r3, [r3, #8]
 8009824:	f043 4200 	orr.w	r2, r3, #2147483648	@ 0x80000000
 8009828:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800982a:	609a      	str	r2, [r3, #8]
 800982c:	e005      	b.n	800983a <ETH_Prepare_Tx_Descriptors+0x4d2>
  }
  else
  {
    /* Clear Interrupt on completion bit */
    CLEAR_BIT(dmatxdesc->DESC2, ETH_DMATXNDESCRF_IOC);
 800982e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009830:	689b      	ldr	r3, [r3, #8]
 8009832:	f023 4200 	bic.w	r2, r3, #2147483648	@ 0x80000000
 8009836:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009838:	609a      	str	r2, [r3, #8]
  }

  /* Mark it as LAST descriptor */
  SET_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_LD);
 800983a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800983c:	68db      	ldr	r3, [r3, #12]
 800983e:	f043 5280 	orr.w	r2, r3, #268435456	@ 0x10000000
 8009842:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009844:	60da      	str	r2, [r3, #12]
  /* Save the current packet address to expose it to the application */
  dmatxdesclist->PacketAddress[descidx] = dmatxdesclist->CurrentPacketAddress;
 8009846:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8009848:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 800984a:	6a79      	ldr	r1, [r7, #36]	@ 0x24
 800984c:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800984e:	3304      	adds	r3, #4
 8009850:	009b      	lsls	r3, r3, #2
 8009852:	440b      	add	r3, r1
 8009854:	605a      	str	r2, [r3, #4]

  dmatxdesclist->CurTxDesc = descidx;
 8009856:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8009858:	6bfa      	ldr	r2, [r7, #60]	@ 0x3c
 800985a:	611a      	str	r2, [r3, #16]
  __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory");
 800985c:	f3ef 8310 	mrs	r3, PRIMASK
 8009860:	613b      	str	r3, [r7, #16]
  return(result);
 8009862:	693b      	ldr	r3, [r7, #16]

  /* Enter critical section */
  primask_bit = __get_PRIMASK();
 8009864:	61fb      	str	r3, [r7, #28]
 8009866:	2301      	movs	r3, #1
 8009868:	617b      	str	r3, [r7, #20]
  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
 800986a:	697b      	ldr	r3, [r7, #20]
 800986c:	f383 8810 	msr	PRIMASK, r3
}
 8009870:	bf00      	nop
  __set_PRIMASK(1);

  dmatxdesclist->BuffersInUse += bd_count + 1U;
 8009872:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8009874:	6a9a      	ldr	r2, [r3, #40]	@ 0x28
 8009876:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8009878:	4413      	add	r3, r2
 800987a:	1c5a      	adds	r2, r3, #1
 800987c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800987e:	629a      	str	r2, [r3, #40]	@ 0x28
 8009880:	69fb      	ldr	r3, [r7, #28]
 8009882:	61bb      	str	r3, [r7, #24]
  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
 8009884:	69bb      	ldr	r3, [r7, #24]
 8009886:	f383 8810 	msr	PRIMASK, r3
}
 800988a:	bf00      	nop

  /* Exit critical section: restore previous priority mask */
  __set_PRIMASK(primask_bit);

  /* Return function status */
  return HAL_ETH_ERROR_NONE;
 800988c:	2300      	movs	r3, #0
}
 800988e:	4618      	mov	r0, r3
 8009890:	3744      	adds	r7, #68	@ 0x44
 8009892:	46bd      	mov	sp, r7
 8009894:	f85d 7b04 	ldr.w	r7, [sp], #4
 8009898:	4770      	bx	lr
 800989a:	bf00      	nop
 800989c:	ffff8000 	.word	0xffff8000

080098a0 <HAL_GPIO_Init>:
  * @param  GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains
  *         the configuration information for the specified GPIO peripheral.
  * @retval None
  */
void HAL_GPIO_Init(GPIO_TypeDef  *GPIOx, GPIO_InitTypeDef *GPIO_Init)
{
 80098a0:	b480      	push	{r7}
 80098a2:	b089      	sub	sp, #36	@ 0x24
 80098a4:	af00      	add	r7, sp, #0
 80098a6:	6078      	str	r0, [r7, #4]
 80098a8:	6039      	str	r1, [r7, #0]
  uint32_t position = 0x00U;
 80098aa:	2300      	movs	r3, #0
 80098ac:	61fb      	str	r3, [r7, #28]
  EXTI_Core_TypeDef *EXTI_CurrentCPU;

#if defined(DUAL_CORE) && defined(CORE_CM4)
  EXTI_CurrentCPU = EXTI_D2; /* EXTI for CM4 CPU */
#else
  EXTI_CurrentCPU = EXTI_D1; /* EXTI for CM7 CPU */
 80098ae:	4b89      	ldr	r3, [pc, #548]	@ (8009ad4 <HAL_GPIO_Init+0x234>)
 80098b0:	617b      	str	r3, [r7, #20]
  assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
  assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
  assert_param(IS_GPIO_MODE(GPIO_Init->Mode));

  /* Configure the port pins */
  while (((GPIO_Init->Pin) >> position) != 0x00U)
 80098b2:	e194      	b.n	8009bde <HAL_GPIO_Init+0x33e>
  {
    /* Get current io position */
    iocurrent = (GPIO_Init->Pin) & (1UL << position);
 80098b4:	683b      	ldr	r3, [r7, #0]
 80098b6:	681a      	ldr	r2, [r3, #0]
 80098b8:	2101      	movs	r1, #1
 80098ba:	69fb      	ldr	r3, [r7, #28]
 80098bc:	fa01 f303 	lsl.w	r3, r1, r3
 80098c0:	4013      	ands	r3, r2
 80098c2:	613b      	str	r3, [r7, #16]

    if (iocurrent != 0x00U)
 80098c4:	693b      	ldr	r3, [r7, #16]
 80098c6:	2b00      	cmp	r3, #0
 80098c8:	f000 8186 	beq.w	8009bd8 <HAL_GPIO_Init+0x338>
    {
      /*--------------------- GPIO Mode Configuration ------------------------*/
      /* In case of Output or Alternate function mode selection */
      if (((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF))
 80098cc:	683b      	ldr	r3, [r7, #0]
 80098ce:	685b      	ldr	r3, [r3, #4]
 80098d0:	f003 0303 	and.w	r3, r3, #3
 80098d4:	2b01      	cmp	r3, #1
 80098d6:	d005      	beq.n	80098e4 <HAL_GPIO_Init+0x44>
 80098d8:	683b      	ldr	r3, [r7, #0]
 80098da:	685b      	ldr	r3, [r3, #4]
 80098dc:	f003 0303 	and.w	r3, r3, #3
 80098e0:	2b02      	cmp	r3, #2
 80098e2:	d130      	bne.n	8009946 <HAL_GPIO_Init+0xa6>
      {
        /* Check the Speed parameter */
        assert_param(IS_GPIO_SPEED(GPIO_Init->Speed));

        /* Configure the IO Speed */
        temp = GPIOx->OSPEEDR;
 80098e4:	687b      	ldr	r3, [r7, #4]
 80098e6:	689b      	ldr	r3, [r3, #8]
 80098e8:	61bb      	str	r3, [r7, #24]
        temp &= ~(GPIO_OSPEEDR_OSPEED0 << (position * 2U));
 80098ea:	69fb      	ldr	r3, [r7, #28]
 80098ec:	005b      	lsls	r3, r3, #1
 80098ee:	2203      	movs	r2, #3
 80098f0:	fa02 f303 	lsl.w	r3, r2, r3
 80098f4:	43db      	mvns	r3, r3
 80098f6:	69ba      	ldr	r2, [r7, #24]
 80098f8:	4013      	ands	r3, r2
 80098fa:	61bb      	str	r3, [r7, #24]
        temp |= (GPIO_Init->Speed << (position * 2U));
 80098fc:	683b      	ldr	r3, [r7, #0]
 80098fe:	68da      	ldr	r2, [r3, #12]
 8009900:	69fb      	ldr	r3, [r7, #28]
 8009902:	005b      	lsls	r3, r3, #1
 8009904:	fa02 f303 	lsl.w	r3, r2, r3
 8009908:	69ba      	ldr	r2, [r7, #24]
 800990a:	4313      	orrs	r3, r2
 800990c:	61bb      	str	r3, [r7, #24]
        GPIOx->OSPEEDR = temp;
 800990e:	687b      	ldr	r3, [r7, #4]
 8009910:	69ba      	ldr	r2, [r7, #24]
 8009912:	609a      	str	r2, [r3, #8]

        /* Configure the IO Output Type */
        temp = GPIOx->OTYPER;
 8009914:	687b      	ldr	r3, [r7, #4]
 8009916:	685b      	ldr	r3, [r3, #4]
 8009918:	61bb      	str	r3, [r7, #24]
        temp &= ~(GPIO_OTYPER_OT0 << position) ;
 800991a:	2201      	movs	r2, #1
 800991c:	69fb      	ldr	r3, [r7, #28]
 800991e:	fa02 f303 	lsl.w	r3, r2, r3
 8009922:	43db      	mvns	r3, r3
 8009924:	69ba      	ldr	r2, [r7, #24]
 8009926:	4013      	ands	r3, r2
 8009928:	61bb      	str	r3, [r7, #24]
        temp |= (((GPIO_Init->Mode & OUTPUT_TYPE) >> OUTPUT_TYPE_Pos) << position);
 800992a:	683b      	ldr	r3, [r7, #0]
 800992c:	685b      	ldr	r3, [r3, #4]
 800992e:	091b      	lsrs	r3, r3, #4
 8009930:	f003 0201 	and.w	r2, r3, #1
 8009934:	69fb      	ldr	r3, [r7, #28]
 8009936:	fa02 f303 	lsl.w	r3, r2, r3
 800993a:	69ba      	ldr	r2, [r7, #24]
 800993c:	4313      	orrs	r3, r2
 800993e:	61bb      	str	r3, [r7, #24]
        GPIOx->OTYPER = temp;
 8009940:	687b      	ldr	r3, [r7, #4]
 8009942:	69ba      	ldr	r2, [r7, #24]
 8009944:	605a      	str	r2, [r3, #4]
      }

      if ((GPIO_Init->Mode & GPIO_MODE) != MODE_ANALOG)
 8009946:	683b      	ldr	r3, [r7, #0]
 8009948:	685b      	ldr	r3, [r3, #4]
 800994a:	f003 0303 	and.w	r3, r3, #3
 800994e:	2b03      	cmp	r3, #3
 8009950:	d017      	beq.n	8009982 <HAL_GPIO_Init+0xe2>
      {
       /* Check the Pull parameter */
       assert_param(IS_GPIO_PULL(GPIO_Init->Pull));

      /* Activate the Pull-up or Pull down resistor for the current IO */
      temp = GPIOx->PUPDR;
 8009952:	687b      	ldr	r3, [r7, #4]
 8009954:	68db      	ldr	r3, [r3, #12]
 8009956:	61bb      	str	r3, [r7, #24]
      temp &= ~(GPIO_PUPDR_PUPD0 << (position * 2U));
 8009958:	69fb      	ldr	r3, [r7, #28]
 800995a:	005b      	lsls	r3, r3, #1
 800995c:	2203      	movs	r2, #3
 800995e:	fa02 f303 	lsl.w	r3, r2, r3
 8009962:	43db      	mvns	r3, r3
 8009964:	69ba      	ldr	r2, [r7, #24]
 8009966:	4013      	ands	r3, r2
 8009968:	61bb      	str	r3, [r7, #24]
      temp |= ((GPIO_Init->Pull) << (position * 2U));
 800996a:	683b      	ldr	r3, [r7, #0]
 800996c:	689a      	ldr	r2, [r3, #8]
 800996e:	69fb      	ldr	r3, [r7, #28]
 8009970:	005b      	lsls	r3, r3, #1
 8009972:	fa02 f303 	lsl.w	r3, r2, r3
 8009976:	69ba      	ldr	r2, [r7, #24]
 8009978:	4313      	orrs	r3, r2
 800997a:	61bb      	str	r3, [r7, #24]
      GPIOx->PUPDR = temp;
 800997c:	687b      	ldr	r3, [r7, #4]
 800997e:	69ba      	ldr	r2, [r7, #24]
 8009980:	60da      	str	r2, [r3, #12]
      }

      /* In case of Alternate function mode selection */
      if ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF)
 8009982:	683b      	ldr	r3, [r7, #0]
 8009984:	685b      	ldr	r3, [r3, #4]
 8009986:	f003 0303 	and.w	r3, r3, #3
 800998a:	2b02      	cmp	r3, #2
 800998c:	d123      	bne.n	80099d6 <HAL_GPIO_Init+0x136>
        /* Check the Alternate function parameters */
        assert_param(IS_GPIO_AF_INSTANCE(GPIOx));
        assert_param(IS_GPIO_AF(GPIO_Init->Alternate));

        /* Configure Alternate function mapped with the current IO */
        temp = GPIOx->AFR[position >> 3U];
 800998e:	69fb      	ldr	r3, [r7, #28]
 8009990:	08da      	lsrs	r2, r3, #3
 8009992:	687b      	ldr	r3, [r7, #4]
 8009994:	3208      	adds	r2, #8
 8009996:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
 800999a:	61bb      	str	r3, [r7, #24]
        temp &= ~(0xFU << ((position & 0x07U) * 4U));
 800999c:	69fb      	ldr	r3, [r7, #28]
 800999e:	f003 0307 	and.w	r3, r3, #7
 80099a2:	009b      	lsls	r3, r3, #2
 80099a4:	220f      	movs	r2, #15
 80099a6:	fa02 f303 	lsl.w	r3, r2, r3
 80099aa:	43db      	mvns	r3, r3
 80099ac:	69ba      	ldr	r2, [r7, #24]
 80099ae:	4013      	ands	r3, r2
 80099b0:	61bb      	str	r3, [r7, #24]
        temp |= ((GPIO_Init->Alternate) << ((position & 0x07U) * 4U));
 80099b2:	683b      	ldr	r3, [r7, #0]
 80099b4:	691a      	ldr	r2, [r3, #16]
 80099b6:	69fb      	ldr	r3, [r7, #28]
 80099b8:	f003 0307 	and.w	r3, r3, #7
 80099bc:	009b      	lsls	r3, r3, #2
 80099be:	fa02 f303 	lsl.w	r3, r2, r3
 80099c2:	69ba      	ldr	r2, [r7, #24]
 80099c4:	4313      	orrs	r3, r2
 80099c6:	61bb      	str	r3, [r7, #24]
        GPIOx->AFR[position >> 3U] = temp;
 80099c8:	69fb      	ldr	r3, [r7, #28]
 80099ca:	08da      	lsrs	r2, r3, #3
 80099cc:	687b      	ldr	r3, [r7, #4]
 80099ce:	3208      	adds	r2, #8
 80099d0:	69b9      	ldr	r1, [r7, #24]
 80099d2:	f843 1022 	str.w	r1, [r3, r2, lsl #2]
      }

      /* Configure IO Direction mode (Input, Output, Alternate or Analog) */
      temp = GPIOx->MODER;
 80099d6:	687b      	ldr	r3, [r7, #4]
 80099d8:	681b      	ldr	r3, [r3, #0]
 80099da:	61bb      	str	r3, [r7, #24]
      temp &= ~(GPIO_MODER_MODE0 << (position * 2U));
 80099dc:	69fb      	ldr	r3, [r7, #28]
 80099de:	005b      	lsls	r3, r3, #1
 80099e0:	2203      	movs	r2, #3
 80099e2:	fa02 f303 	lsl.w	r3, r2, r3
 80099e6:	43db      	mvns	r3, r3
 80099e8:	69ba      	ldr	r2, [r7, #24]
 80099ea:	4013      	ands	r3, r2
 80099ec:	61bb      	str	r3, [r7, #24]
      temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2U));
 80099ee:	683b      	ldr	r3, [r7, #0]
 80099f0:	685b      	ldr	r3, [r3, #4]
 80099f2:	f003 0203 	and.w	r2, r3, #3
 80099f6:	69fb      	ldr	r3, [r7, #28]
 80099f8:	005b      	lsls	r3, r3, #1
 80099fa:	fa02 f303 	lsl.w	r3, r2, r3
 80099fe:	69ba      	ldr	r2, [r7, #24]
 8009a00:	4313      	orrs	r3, r2
 8009a02:	61bb      	str	r3, [r7, #24]
      GPIOx->MODER = temp;
 8009a04:	687b      	ldr	r3, [r7, #4]
 8009a06:	69ba      	ldr	r2, [r7, #24]
 8009a08:	601a      	str	r2, [r3, #0]

      /*--------------------- EXTI Mode Configuration ------------------------*/
      /* Configure the External Interrupt or event for the current IO */
      if ((GPIO_Init->Mode & EXTI_MODE) != 0x00U)
 8009a0a:	683b      	ldr	r3, [r7, #0]
 8009a0c:	685b      	ldr	r3, [r3, #4]
 8009a0e:	f403 3340 	and.w	r3, r3, #196608	@ 0x30000
 8009a12:	2b00      	cmp	r3, #0
 8009a14:	f000 80e0 	beq.w	8009bd8 <HAL_GPIO_Init+0x338>
      {
        /* Enable SYSCFG Clock */
        __HAL_RCC_SYSCFG_CLK_ENABLE();
 8009a18:	4b2f      	ldr	r3, [pc, #188]	@ (8009ad8 <HAL_GPIO_Init+0x238>)
 8009a1a:	f8d3 30f4 	ldr.w	r3, [r3, #244]	@ 0xf4
 8009a1e:	4a2e      	ldr	r2, [pc, #184]	@ (8009ad8 <HAL_GPIO_Init+0x238>)
 8009a20:	f043 0302 	orr.w	r3, r3, #2
 8009a24:	f8c2 30f4 	str.w	r3, [r2, #244]	@ 0xf4
 8009a28:	4b2b      	ldr	r3, [pc, #172]	@ (8009ad8 <HAL_GPIO_Init+0x238>)
 8009a2a:	f8d3 30f4 	ldr.w	r3, [r3, #244]	@ 0xf4
 8009a2e:	f003 0302 	and.w	r3, r3, #2
 8009a32:	60fb      	str	r3, [r7, #12]
 8009a34:	68fb      	ldr	r3, [r7, #12]

        temp = SYSCFG->EXTICR[position >> 2U];
 8009a36:	4a29      	ldr	r2, [pc, #164]	@ (8009adc <HAL_GPIO_Init+0x23c>)
 8009a38:	69fb      	ldr	r3, [r7, #28]
 8009a3a:	089b      	lsrs	r3, r3, #2
 8009a3c:	3302      	adds	r3, #2
 8009a3e:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
 8009a42:	61bb      	str	r3, [r7, #24]
        temp &= ~(0x0FUL << (4U * (position & 0x03U)));
 8009a44:	69fb      	ldr	r3, [r7, #28]
 8009a46:	f003 0303 	and.w	r3, r3, #3
 8009a4a:	009b      	lsls	r3, r3, #2
 8009a4c:	220f      	movs	r2, #15
 8009a4e:	fa02 f303 	lsl.w	r3, r2, r3
 8009a52:	43db      	mvns	r3, r3
 8009a54:	69ba      	ldr	r2, [r7, #24]
 8009a56:	4013      	ands	r3, r2
 8009a58:	61bb      	str	r3, [r7, #24]
        temp |= (GPIO_GET_INDEX(GPIOx) << (4U * (position & 0x03U)));
 8009a5a:	687b      	ldr	r3, [r7, #4]
 8009a5c:	4a20      	ldr	r2, [pc, #128]	@ (8009ae0 <HAL_GPIO_Init+0x240>)
 8009a5e:	4293      	cmp	r3, r2
 8009a60:	d052      	beq.n	8009b08 <HAL_GPIO_Init+0x268>
 8009a62:	687b      	ldr	r3, [r7, #4]
 8009a64:	4a1f      	ldr	r2, [pc, #124]	@ (8009ae4 <HAL_GPIO_Init+0x244>)
 8009a66:	4293      	cmp	r3, r2
 8009a68:	d031      	beq.n	8009ace <HAL_GPIO_Init+0x22e>
 8009a6a:	687b      	ldr	r3, [r7, #4]
 8009a6c:	4a1e      	ldr	r2, [pc, #120]	@ (8009ae8 <HAL_GPIO_Init+0x248>)
 8009a6e:	4293      	cmp	r3, r2
 8009a70:	d02b      	beq.n	8009aca <HAL_GPIO_Init+0x22a>
 8009a72:	687b      	ldr	r3, [r7, #4]
 8009a74:	4a1d      	ldr	r2, [pc, #116]	@ (8009aec <HAL_GPIO_Init+0x24c>)
 8009a76:	4293      	cmp	r3, r2
 8009a78:	d025      	beq.n	8009ac6 <HAL_GPIO_Init+0x226>
 8009a7a:	687b      	ldr	r3, [r7, #4]
 8009a7c:	4a1c      	ldr	r2, [pc, #112]	@ (8009af0 <HAL_GPIO_Init+0x250>)
 8009a7e:	4293      	cmp	r3, r2
 8009a80:	d01f      	beq.n	8009ac2 <HAL_GPIO_Init+0x222>
 8009a82:	687b      	ldr	r3, [r7, #4]
 8009a84:	4a1b      	ldr	r2, [pc, #108]	@ (8009af4 <HAL_GPIO_Init+0x254>)
 8009a86:	4293      	cmp	r3, r2
 8009a88:	d019      	beq.n	8009abe <HAL_GPIO_Init+0x21e>
 8009a8a:	687b      	ldr	r3, [r7, #4]
 8009a8c:	4a1a      	ldr	r2, [pc, #104]	@ (8009af8 <HAL_GPIO_Init+0x258>)
 8009a8e:	4293      	cmp	r3, r2
 8009a90:	d013      	beq.n	8009aba <HAL_GPIO_Init+0x21a>
 8009a92:	687b      	ldr	r3, [r7, #4]
 8009a94:	4a19      	ldr	r2, [pc, #100]	@ (8009afc <HAL_GPIO_Init+0x25c>)
 8009a96:	4293      	cmp	r3, r2
 8009a98:	d00d      	beq.n	8009ab6 <HAL_GPIO_Init+0x216>
 8009a9a:	687b      	ldr	r3, [r7, #4]
 8009a9c:	4a18      	ldr	r2, [pc, #96]	@ (8009b00 <HAL_GPIO_Init+0x260>)
 8009a9e:	4293      	cmp	r3, r2
 8009aa0:	d007      	beq.n	8009ab2 <HAL_GPIO_Init+0x212>
 8009aa2:	687b      	ldr	r3, [r7, #4]
 8009aa4:	4a17      	ldr	r2, [pc, #92]	@ (8009b04 <HAL_GPIO_Init+0x264>)
 8009aa6:	4293      	cmp	r3, r2
 8009aa8:	d101      	bne.n	8009aae <HAL_GPIO_Init+0x20e>
 8009aaa:	2309      	movs	r3, #9
 8009aac:	e02d      	b.n	8009b0a <HAL_GPIO_Init+0x26a>
 8009aae:	230a      	movs	r3, #10
 8009ab0:	e02b      	b.n	8009b0a <HAL_GPIO_Init+0x26a>
 8009ab2:	2308      	movs	r3, #8
 8009ab4:	e029      	b.n	8009b0a <HAL_GPIO_Init+0x26a>
 8009ab6:	2307      	movs	r3, #7
 8009ab8:	e027      	b.n	8009b0a <HAL_GPIO_Init+0x26a>
 8009aba:	2306      	movs	r3, #6
 8009abc:	e025      	b.n	8009b0a <HAL_GPIO_Init+0x26a>
 8009abe:	2305      	movs	r3, #5
 8009ac0:	e023      	b.n	8009b0a <HAL_GPIO_Init+0x26a>
 8009ac2:	2304      	movs	r3, #4
 8009ac4:	e021      	b.n	8009b0a <HAL_GPIO_Init+0x26a>
 8009ac6:	2303      	movs	r3, #3
 8009ac8:	e01f      	b.n	8009b0a <HAL_GPIO_Init+0x26a>
 8009aca:	2302      	movs	r3, #2
 8009acc:	e01d      	b.n	8009b0a <HAL_GPIO_Init+0x26a>
 8009ace:	2301      	movs	r3, #1
 8009ad0:	e01b      	b.n	8009b0a <HAL_GPIO_Init+0x26a>
 8009ad2:	bf00      	nop
 8009ad4:	58000080 	.word	0x58000080
 8009ad8:	58024400 	.word	0x58024400
 8009adc:	58000400 	.word	0x58000400
 8009ae0:	58020000 	.word	0x58020000
 8009ae4:	58020400 	.word	0x58020400
 8009ae8:	58020800 	.word	0x58020800
 8009aec:	58020c00 	.word	0x58020c00
 8009af0:	58021000 	.word	0x58021000
 8009af4:	58021400 	.word	0x58021400
 8009af8:	58021800 	.word	0x58021800
 8009afc:	58021c00 	.word	0x58021c00
 8009b00:	58022000 	.word	0x58022000
 8009b04:	58022400 	.word	0x58022400
 8009b08:	2300      	movs	r3, #0
 8009b0a:	69fa      	ldr	r2, [r7, #28]
 8009b0c:	f002 0203 	and.w	r2, r2, #3
 8009b10:	0092      	lsls	r2, r2, #2
 8009b12:	4093      	lsls	r3, r2
 8009b14:	69ba      	ldr	r2, [r7, #24]
 8009b16:	4313      	orrs	r3, r2
 8009b18:	61bb      	str	r3, [r7, #24]
        SYSCFG->EXTICR[position >> 2U] = temp;
 8009b1a:	4938      	ldr	r1, [pc, #224]	@ (8009bfc <HAL_GPIO_Init+0x35c>)
 8009b1c:	69fb      	ldr	r3, [r7, #28]
 8009b1e:	089b      	lsrs	r3, r3, #2
 8009b20:	3302      	adds	r3, #2
 8009b22:	69ba      	ldr	r2, [r7, #24]
 8009b24:	f841 2023 	str.w	r2, [r1, r3, lsl #2]

        /* Clear Rising Falling edge configuration */
        temp = EXTI->RTSR1;
 8009b28:	f04f 43b0 	mov.w	r3, #1476395008	@ 0x58000000
 8009b2c:	681b      	ldr	r3, [r3, #0]
 8009b2e:	61bb      	str	r3, [r7, #24]
        temp &= ~(iocurrent);
 8009b30:	693b      	ldr	r3, [r7, #16]
 8009b32:	43db      	mvns	r3, r3
 8009b34:	69ba      	ldr	r2, [r7, #24]
 8009b36:	4013      	ands	r3, r2
 8009b38:	61bb      	str	r3, [r7, #24]
        if ((GPIO_Init->Mode & TRIGGER_RISING) != 0x00U)
 8009b3a:	683b      	ldr	r3, [r7, #0]
 8009b3c:	685b      	ldr	r3, [r3, #4]
 8009b3e:	f403 1380 	and.w	r3, r3, #1048576	@ 0x100000
 8009b42:	2b00      	cmp	r3, #0
 8009b44:	d003      	beq.n	8009b4e <HAL_GPIO_Init+0x2ae>
        {
          temp |= iocurrent;
 8009b46:	69ba      	ldr	r2, [r7, #24]
 8009b48:	693b      	ldr	r3, [r7, #16]
 8009b4a:	4313      	orrs	r3, r2
 8009b4c:	61bb      	str	r3, [r7, #24]
        }
        EXTI->RTSR1 = temp;
 8009b4e:	f04f 42b0 	mov.w	r2, #1476395008	@ 0x58000000
 8009b52:	69bb      	ldr	r3, [r7, #24]
 8009b54:	6013      	str	r3, [r2, #0]

        temp = EXTI->FTSR1;
 8009b56:	f04f 43b0 	mov.w	r3, #1476395008	@ 0x58000000
 8009b5a:	685b      	ldr	r3, [r3, #4]
 8009b5c:	61bb      	str	r3, [r7, #24]
        temp &= ~(iocurrent);
 8009b5e:	693b      	ldr	r3, [r7, #16]
 8009b60:	43db      	mvns	r3, r3
 8009b62:	69ba      	ldr	r2, [r7, #24]
 8009b64:	4013      	ands	r3, r2
 8009b66:	61bb      	str	r3, [r7, #24]
        if ((GPIO_Init->Mode & TRIGGER_FALLING) != 0x00U)
 8009b68:	683b      	ldr	r3, [r7, #0]
 8009b6a:	685b      	ldr	r3, [r3, #4]
 8009b6c:	f403 1300 	and.w	r3, r3, #2097152	@ 0x200000
 8009b70:	2b00      	cmp	r3, #0
 8009b72:	d003      	beq.n	8009b7c <HAL_GPIO_Init+0x2dc>
        {
          temp |= iocurrent;
 8009b74:	69ba      	ldr	r2, [r7, #24]
 8009b76:	693b      	ldr	r3, [r7, #16]
 8009b78:	4313      	orrs	r3, r2
 8009b7a:	61bb      	str	r3, [r7, #24]
        }
        EXTI->FTSR1 = temp;
 8009b7c:	f04f 42b0 	mov.w	r2, #1476395008	@ 0x58000000
 8009b80:	69bb      	ldr	r3, [r7, #24]
 8009b82:	6053      	str	r3, [r2, #4]

        temp = EXTI_CurrentCPU->EMR1;
 8009b84:	697b      	ldr	r3, [r7, #20]
 8009b86:	685b      	ldr	r3, [r3, #4]
 8009b88:	61bb      	str	r3, [r7, #24]
        temp &= ~(iocurrent);
 8009b8a:	693b      	ldr	r3, [r7, #16]
 8009b8c:	43db      	mvns	r3, r3
 8009b8e:	69ba      	ldr	r2, [r7, #24]
 8009b90:	4013      	ands	r3, r2
 8009b92:	61bb      	str	r3, [r7, #24]
        if ((GPIO_Init->Mode & EXTI_EVT) != 0x00U)
 8009b94:	683b      	ldr	r3, [r7, #0]
 8009b96:	685b      	ldr	r3, [r3, #4]
 8009b98:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
 8009b9c:	2b00      	cmp	r3, #0
 8009b9e:	d003      	beq.n	8009ba8 <HAL_GPIO_Init+0x308>
        {
          temp |= iocurrent;
 8009ba0:	69ba      	ldr	r2, [r7, #24]
 8009ba2:	693b      	ldr	r3, [r7, #16]
 8009ba4:	4313      	orrs	r3, r2
 8009ba6:	61bb      	str	r3, [r7, #24]
        }
        EXTI_CurrentCPU->EMR1 = temp;
 8009ba8:	697b      	ldr	r3, [r7, #20]
 8009baa:	69ba      	ldr	r2, [r7, #24]
 8009bac:	605a      	str	r2, [r3, #4]

        /* Clear EXTI line configuration */
        temp = EXTI_CurrentCPU->IMR1;
 8009bae:	697b      	ldr	r3, [r7, #20]
 8009bb0:	681b      	ldr	r3, [r3, #0]
 8009bb2:	61bb      	str	r3, [r7, #24]
        temp &= ~(iocurrent);
 8009bb4:	693b      	ldr	r3, [r7, #16]
 8009bb6:	43db      	mvns	r3, r3
 8009bb8:	69ba      	ldr	r2, [r7, #24]
 8009bba:	4013      	ands	r3, r2
 8009bbc:	61bb      	str	r3, [r7, #24]
        if ((GPIO_Init->Mode & EXTI_IT) != 0x00U)
 8009bbe:	683b      	ldr	r3, [r7, #0]
 8009bc0:	685b      	ldr	r3, [r3, #4]
 8009bc2:	f403 3380 	and.w	r3, r3, #65536	@ 0x10000
 8009bc6:	2b00      	cmp	r3, #0
 8009bc8:	d003      	beq.n	8009bd2 <HAL_GPIO_Init+0x332>
        {
          temp |= iocurrent;
 8009bca:	69ba      	ldr	r2, [r7, #24]
 8009bcc:	693b      	ldr	r3, [r7, #16]
 8009bce:	4313      	orrs	r3, r2
 8009bd0:	61bb      	str	r3, [r7, #24]
        }
        EXTI_CurrentCPU->IMR1 = temp;
 8009bd2:	697b      	ldr	r3, [r7, #20]
 8009bd4:	69ba      	ldr	r2, [r7, #24]
 8009bd6:	601a      	str	r2, [r3, #0]
      }
    }

    position++;
 8009bd8:	69fb      	ldr	r3, [r7, #28]
 8009bda:	3301      	adds	r3, #1
 8009bdc:	61fb      	str	r3, [r7, #28]
  while (((GPIO_Init->Pin) >> position) != 0x00U)
 8009bde:	683b      	ldr	r3, [r7, #0]
 8009be0:	681a      	ldr	r2, [r3, #0]
 8009be2:	69fb      	ldr	r3, [r7, #28]
 8009be4:	fa22 f303 	lsr.w	r3, r2, r3
 8009be8:	2b00      	cmp	r3, #0
 8009bea:	f47f ae63 	bne.w	80098b4 <HAL_GPIO_Init+0x14>
  }
}
 8009bee:	bf00      	nop
 8009bf0:	bf00      	nop
 8009bf2:	3724      	adds	r7, #36	@ 0x24
 8009bf4:	46bd      	mov	sp, r7
 8009bf6:	f85d 7b04 	ldr.w	r7, [sp], #4
 8009bfa:	4770      	bx	lr
 8009bfc:	58000400 	.word	0x58000400

08009c00 <HAL_GPIO_WritePin>:
  *            @arg GPIO_PIN_RESET: to clear the port pin
  *            @arg GPIO_PIN_SET: to set the port pin
  * @retval None
  */
void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
{
 8009c00:	b480      	push	{r7}
 8009c02:	b083      	sub	sp, #12
 8009c04:	af00      	add	r7, sp, #0
 8009c06:	6078      	str	r0, [r7, #4]
 8009c08:	460b      	mov	r3, r1
 8009c0a:	807b      	strh	r3, [r7, #2]
 8009c0c:	4613      	mov	r3, r2
 8009c0e:	707b      	strb	r3, [r7, #1]
  /* Check the parameters */
  assert_param(IS_GPIO_PIN(GPIO_Pin));
  assert_param(IS_GPIO_PIN_ACTION(PinState));

  if (PinState != GPIO_PIN_RESET)
 8009c10:	787b      	ldrb	r3, [r7, #1]
 8009c12:	2b00      	cmp	r3, #0
 8009c14:	d003      	beq.n	8009c1e <HAL_GPIO_WritePin+0x1e>
  {
    GPIOx->BSRR = GPIO_Pin;
 8009c16:	887a      	ldrh	r2, [r7, #2]
 8009c18:	687b      	ldr	r3, [r7, #4]
 8009c1a:	619a      	str	r2, [r3, #24]
  }
  else
  {
    GPIOx->BSRR = (uint32_t)GPIO_Pin << GPIO_NUMBER;
  }
}
 8009c1c:	e003      	b.n	8009c26 <HAL_GPIO_WritePin+0x26>
    GPIOx->BSRR = (uint32_t)GPIO_Pin << GPIO_NUMBER;
 8009c1e:	887b      	ldrh	r3, [r7, #2]
 8009c20:	041a      	lsls	r2, r3, #16
 8009c22:	687b      	ldr	r3, [r7, #4]
 8009c24:	619a      	str	r2, [r3, #24]
}
 8009c26:	bf00      	nop
 8009c28:	370c      	adds	r7, #12
 8009c2a:	46bd      	mov	sp, r7
 8009c2c:	f85d 7b04 	ldr.w	r7, [sp], #4
 8009c30:	4770      	bx	lr
	...

08009c34 <HAL_PWR_ConfigPVD>:
  *         driver. All combination are allowed: wake up only Cortex-M7, wake up
  *         only Cortex-M4 or wake up Cortex-M7 and Cortex-M4.
  * @retval None.
  */
void HAL_PWR_ConfigPVD (PWR_PVDTypeDef *sConfigPVD)
{
 8009c34:	b480      	push	{r7}
 8009c36:	b083      	sub	sp, #12
 8009c38:	af00      	add	r7, sp, #0
 8009c3a:	6078      	str	r0, [r7, #4]
  /* Check the PVD configuration parameter */
  if (sConfigPVD == NULL)
 8009c3c:	687b      	ldr	r3, [r7, #4]
 8009c3e:	2b00      	cmp	r3, #0
 8009c40:	d069      	beq.n	8009d16 <HAL_PWR_ConfigPVD+0xe2>
  /* Check the parameters */
  assert_param (IS_PWR_PVD_LEVEL (sConfigPVD->PVDLevel));
  assert_param (IS_PWR_PVD_MODE (sConfigPVD->Mode));

  /* Set PLS[7:5] bits according to PVDLevel value */
  MODIFY_REG (PWR->CR1, PWR_CR1_PLS, sConfigPVD->PVDLevel);
 8009c42:	4b38      	ldr	r3, [pc, #224]	@ (8009d24 <HAL_PWR_ConfigPVD+0xf0>)
 8009c44:	681b      	ldr	r3, [r3, #0]
 8009c46:	f023 02e0 	bic.w	r2, r3, #224	@ 0xe0
 8009c4a:	687b      	ldr	r3, [r7, #4]
 8009c4c:	681b      	ldr	r3, [r3, #0]
 8009c4e:	4935      	ldr	r1, [pc, #212]	@ (8009d24 <HAL_PWR_ConfigPVD+0xf0>)
 8009c50:	4313      	orrs	r3, r2
 8009c52:	600b      	str	r3, [r1, #0]

  /* Clear previous config */
#if !defined (DUAL_CORE)
  __HAL_PWR_PVD_EXTI_DISABLE_EVENT ();
 8009c54:	f04f 43b0 	mov.w	r3, #1476395008	@ 0x58000000
 8009c58:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 8009c5c:	f04f 42b0 	mov.w	r2, #1476395008	@ 0x58000000
 8009c60:	f423 3380 	bic.w	r3, r3, #65536	@ 0x10000
 8009c64:	f8c2 3084 	str.w	r3, [r2, #132]	@ 0x84
  __HAL_PWR_PVD_EXTI_DISABLE_IT ();
 8009c68:	f04f 43b0 	mov.w	r3, #1476395008	@ 0x58000000
 8009c6c:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 8009c70:	f04f 42b0 	mov.w	r2, #1476395008	@ 0x58000000
 8009c74:	f423 3380 	bic.w	r3, r3, #65536	@ 0x10000
 8009c78:	f8c2 3080 	str.w	r3, [r2, #128]	@ 0x80
#endif /* !defined (DUAL_CORE) */

  __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE ();
 8009c7c:	f04f 43b0 	mov.w	r3, #1476395008	@ 0x58000000
 8009c80:	681b      	ldr	r3, [r3, #0]
 8009c82:	f04f 42b0 	mov.w	r2, #1476395008	@ 0x58000000
 8009c86:	f423 3380 	bic.w	r3, r3, #65536	@ 0x10000
 8009c8a:	6013      	str	r3, [r2, #0]
  __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE ();
 8009c8c:	f04f 43b0 	mov.w	r3, #1476395008	@ 0x58000000
 8009c90:	685b      	ldr	r3, [r3, #4]
 8009c92:	f04f 42b0 	mov.w	r2, #1476395008	@ 0x58000000
 8009c96:	f423 3380 	bic.w	r3, r3, #65536	@ 0x10000
 8009c9a:	6053      	str	r3, [r2, #4]

#if !defined (DUAL_CORE)
  /* Interrupt mode configuration */
  if ((sConfigPVD->Mode & PVD_MODE_IT) == PVD_MODE_IT)
 8009c9c:	687b      	ldr	r3, [r7, #4]
 8009c9e:	685b      	ldr	r3, [r3, #4]
 8009ca0:	f403 3380 	and.w	r3, r3, #65536	@ 0x10000
 8009ca4:	2b00      	cmp	r3, #0
 8009ca6:	d009      	beq.n	8009cbc <HAL_PWR_ConfigPVD+0x88>
  {
    __HAL_PWR_PVD_EXTI_ENABLE_IT ();
 8009ca8:	f04f 43b0 	mov.w	r3, #1476395008	@ 0x58000000
 8009cac:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 8009cb0:	f04f 42b0 	mov.w	r2, #1476395008	@ 0x58000000
 8009cb4:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
 8009cb8:	f8c2 3080 	str.w	r3, [r2, #128]	@ 0x80
  }

  /* Event mode configuration */
  if ((sConfigPVD->Mode & PVD_MODE_EVT) == PVD_MODE_EVT)
 8009cbc:	687b      	ldr	r3, [r7, #4]
 8009cbe:	685b      	ldr	r3, [r3, #4]
 8009cc0:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
 8009cc4:	2b00      	cmp	r3, #0
 8009cc6:	d009      	beq.n	8009cdc <HAL_PWR_ConfigPVD+0xa8>
  {
    __HAL_PWR_PVD_EXTI_ENABLE_EVENT ();
 8009cc8:	f04f 43b0 	mov.w	r3, #1476395008	@ 0x58000000
 8009ccc:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 8009cd0:	f04f 42b0 	mov.w	r2, #1476395008	@ 0x58000000
 8009cd4:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
 8009cd8:	f8c2 3084 	str.w	r3, [r2, #132]	@ 0x84
  }
#endif /* !defined (DUAL_CORE) */

  /* Rising edge configuration */
  if ((sConfigPVD->Mode & PVD_RISING_EDGE) == PVD_RISING_EDGE)
 8009cdc:	687b      	ldr	r3, [r7, #4]
 8009cde:	685b      	ldr	r3, [r3, #4]
 8009ce0:	f003 0301 	and.w	r3, r3, #1
 8009ce4:	2b00      	cmp	r3, #0
 8009ce6:	d007      	beq.n	8009cf8 <HAL_PWR_ConfigPVD+0xc4>
  {
    __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE ();
 8009ce8:	f04f 43b0 	mov.w	r3, #1476395008	@ 0x58000000
 8009cec:	681b      	ldr	r3, [r3, #0]
 8009cee:	f04f 42b0 	mov.w	r2, #1476395008	@ 0x58000000
 8009cf2:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
 8009cf6:	6013      	str	r3, [r2, #0]
  }

  /* Falling edge configuration */
  if ((sConfigPVD->Mode & PVD_FALLING_EDGE) == PVD_FALLING_EDGE)
 8009cf8:	687b      	ldr	r3, [r7, #4]
 8009cfa:	685b      	ldr	r3, [r3, #4]
 8009cfc:	f003 0302 	and.w	r3, r3, #2
 8009d00:	2b00      	cmp	r3, #0
 8009d02:	d009      	beq.n	8009d18 <HAL_PWR_ConfigPVD+0xe4>
  {
    __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE ();
 8009d04:	f04f 43b0 	mov.w	r3, #1476395008	@ 0x58000000
 8009d08:	685b      	ldr	r3, [r3, #4]
 8009d0a:	f04f 42b0 	mov.w	r2, #1476395008	@ 0x58000000
 8009d0e:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
 8009d12:	6053      	str	r3, [r2, #4]
 8009d14:	e000      	b.n	8009d18 <HAL_PWR_ConfigPVD+0xe4>
    return;
 8009d16:	bf00      	nop
  }
}
 8009d18:	370c      	adds	r7, #12
 8009d1a:	46bd      	mov	sp, r7
 8009d1c:	f85d 7b04 	ldr.w	r7, [sp], #4
 8009d20:	4770      	bx	lr
 8009d22:	bf00      	nop
 8009d24:	58024800 	.word	0x58024800

08009d28 <HAL_PWR_EnablePVD>:
/**
  * @brief Enable the Programmable Voltage Detector (PVD).
  * @retval None.
  */
void HAL_PWR_EnablePVD (void)
{
 8009d28:	b480      	push	{r7}
 8009d2a:	af00      	add	r7, sp, #0
  /* Enable the power voltage detector */
  SET_BIT (PWR->CR1, PWR_CR1_PVDEN);
 8009d2c:	4b05      	ldr	r3, [pc, #20]	@ (8009d44 <HAL_PWR_EnablePVD+0x1c>)
 8009d2e:	681b      	ldr	r3, [r3, #0]
 8009d30:	4a04      	ldr	r2, [pc, #16]	@ (8009d44 <HAL_PWR_EnablePVD+0x1c>)
 8009d32:	f043 0310 	orr.w	r3, r3, #16
 8009d36:	6013      	str	r3, [r2, #0]
}
 8009d38:	bf00      	nop
 8009d3a:	46bd      	mov	sp, r7
 8009d3c:	f85d 7b04 	ldr.w	r7, [sp], #4
 8009d40:	4770      	bx	lr
 8009d42:	bf00      	nop
 8009d44:	58024800 	.word	0x58024800

08009d48 <HAL_PWREx_ConfigSupply>:
  *         PWR_SMPS_2V5_SUPPLIES_EXT are used only for lines that supports SMPS
  *         regulator.
  * @retval HAL status.
  */
HAL_StatusTypeDef HAL_PWREx_ConfigSupply (uint32_t SupplySource)
{
 8009d48:	b580      	push	{r7, lr}
 8009d4a:	b084      	sub	sp, #16
 8009d4c:	af00      	add	r7, sp, #0
 8009d4e:	6078      	str	r0, [r7, #4]
  /* Check the parameters */
  assert_param (IS_PWR_SUPPLY (SupplySource));

  /* Check if supply source was configured */
#if defined (PWR_FLAG_SCUEN)
  if (__HAL_PWR_GET_FLAG (PWR_FLAG_SCUEN) == 0U)
 8009d50:	4b19      	ldr	r3, [pc, #100]	@ (8009db8 <HAL_PWREx_ConfigSupply+0x70>)
 8009d52:	68db      	ldr	r3, [r3, #12]
 8009d54:	f003 0304 	and.w	r3, r3, #4
 8009d58:	2b04      	cmp	r3, #4
 8009d5a:	d00a      	beq.n	8009d72 <HAL_PWREx_ConfigSupply+0x2a>
#else
  if ((PWR->CR3 & (PWR_CR3_SMPSEN | PWR_CR3_LDOEN | PWR_CR3_BYPASS)) != (PWR_CR3_SMPSEN | PWR_CR3_LDOEN))
#endif /* defined (PWR_FLAG_SCUEN) */
  {
    /* Check supply configuration */
    if ((PWR->CR3 & PWR_SUPPLY_CONFIG_MASK) != SupplySource)
 8009d5c:	4b16      	ldr	r3, [pc, #88]	@ (8009db8 <HAL_PWREx_ConfigSupply+0x70>)
 8009d5e:	68db      	ldr	r3, [r3, #12]
 8009d60:	f003 0307 	and.w	r3, r3, #7
 8009d64:	687a      	ldr	r2, [r7, #4]
 8009d66:	429a      	cmp	r2, r3
 8009d68:	d001      	beq.n	8009d6e <HAL_PWREx_ConfigSupply+0x26>
    {
      /* Supply configuration update locked, can't apply a new supply config */
      return HAL_ERROR;
 8009d6a:	2301      	movs	r3, #1
 8009d6c:	e01f      	b.n	8009dae <HAL_PWREx_ConfigSupply+0x66>
    else
    {
      /* Supply configuration update locked, but new supply configuration
         matches with old supply configuration : nothing to do
      */
      return HAL_OK;
 8009d6e:	2300      	movs	r3, #0
 8009d70:	e01d      	b.n	8009dae <HAL_PWREx_ConfigSupply+0x66>
    }
  }

  /* Set the power supply configuration */
  MODIFY_REG (PWR->CR3, PWR_SUPPLY_CONFIG_MASK, SupplySource);
 8009d72:	4b11      	ldr	r3, [pc, #68]	@ (8009db8 <HAL_PWREx_ConfigSupply+0x70>)
 8009d74:	68db      	ldr	r3, [r3, #12]
 8009d76:	f023 0207 	bic.w	r2, r3, #7
 8009d7a:	490f      	ldr	r1, [pc, #60]	@ (8009db8 <HAL_PWREx_ConfigSupply+0x70>)
 8009d7c:	687b      	ldr	r3, [r7, #4]
 8009d7e:	4313      	orrs	r3, r2
 8009d80:	60cb      	str	r3, [r1, #12]

  /* Get tick */
  tickstart = HAL_GetTick ();
 8009d82:	f7fb fa5d 	bl	8005240 <HAL_GetTick>
 8009d86:	60f8      	str	r0, [r7, #12]

  /* Wait till voltage level flag is set */
  while (__HAL_PWR_GET_FLAG (PWR_FLAG_ACTVOSRDY) == 0U)
 8009d88:	e009      	b.n	8009d9e <HAL_PWREx_ConfigSupply+0x56>
  {
    if ((HAL_GetTick () - tickstart) > PWR_FLAG_SETTING_DELAY)
 8009d8a:	f7fb fa59 	bl	8005240 <HAL_GetTick>
 8009d8e:	4602      	mov	r2, r0
 8009d90:	68fb      	ldr	r3, [r7, #12]
 8009d92:	1ad3      	subs	r3, r2, r3
 8009d94:	f5b3 7f7a 	cmp.w	r3, #1000	@ 0x3e8
 8009d98:	d901      	bls.n	8009d9e <HAL_PWREx_ConfigSupply+0x56>
    {
      return HAL_ERROR;
 8009d9a:	2301      	movs	r3, #1
 8009d9c:	e007      	b.n	8009dae <HAL_PWREx_ConfigSupply+0x66>
  while (__HAL_PWR_GET_FLAG (PWR_FLAG_ACTVOSRDY) == 0U)
 8009d9e:	4b06      	ldr	r3, [pc, #24]	@ (8009db8 <HAL_PWREx_ConfigSupply+0x70>)
 8009da0:	685b      	ldr	r3, [r3, #4]
 8009da2:	f403 5300 	and.w	r3, r3, #8192	@ 0x2000
 8009da6:	f5b3 5f00 	cmp.w	r3, #8192	@ 0x2000
 8009daa:	d1ee      	bne.n	8009d8a <HAL_PWREx_ConfigSupply+0x42>
      }
    }
  }
#endif /* defined (SMPS) */

  return HAL_OK;
 8009dac:	2300      	movs	r3, #0
}
 8009dae:	4618      	mov	r0, r3
 8009db0:	3710      	adds	r7, #16
 8009db2:	46bd      	mov	sp, r7
 8009db4:	bd80      	pop	{r7, pc}
 8009db6:	bf00      	nop
 8009db8:	58024800 	.word	0x58024800

08009dbc <HAL_PWREx_ConfigAVD>:
  *         driver. All combination are allowed: wake up only Cortex-M7, wake up
  *         only Cortex-M4 and wake up Cortex-M7 and Cortex-M4.
  * @retval None.
  */
void HAL_PWREx_ConfigAVD (PWREx_AVDTypeDef *sConfigAVD)
{
 8009dbc:	b480      	push	{r7}
 8009dbe:	b083      	sub	sp, #12
 8009dc0:	af00      	add	r7, sp, #0
 8009dc2:	6078      	str	r0, [r7, #4]
  /* Check the parameters */
  assert_param (IS_PWR_AVD_LEVEL (sConfigAVD->AVDLevel));
  assert_param (IS_PWR_AVD_MODE (sConfigAVD->Mode));

  /* Set the ALS[18:17] bits according to AVDLevel value */
  MODIFY_REG (PWR->CR1, PWR_CR1_ALS, sConfigAVD->AVDLevel);
 8009dc4:	4b37      	ldr	r3, [pc, #220]	@ (8009ea4 <HAL_PWREx_ConfigAVD+0xe8>)
 8009dc6:	681b      	ldr	r3, [r3, #0]
 8009dc8:	f423 22c0 	bic.w	r2, r3, #393216	@ 0x60000
 8009dcc:	687b      	ldr	r3, [r7, #4]
 8009dce:	681b      	ldr	r3, [r3, #0]
 8009dd0:	4934      	ldr	r1, [pc, #208]	@ (8009ea4 <HAL_PWREx_ConfigAVD+0xe8>)
 8009dd2:	4313      	orrs	r3, r2
 8009dd4:	600b      	str	r3, [r1, #0]

  /* Clear any previous config */
#if !defined (DUAL_CORE)
  __HAL_PWR_AVD_EXTI_DISABLE_EVENT ();
 8009dd6:	f04f 43b0 	mov.w	r3, #1476395008	@ 0x58000000
 8009dda:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 8009dde:	f04f 42b0 	mov.w	r2, #1476395008	@ 0x58000000
 8009de2:	f423 3380 	bic.w	r3, r3, #65536	@ 0x10000
 8009de6:	f8c2 3084 	str.w	r3, [r2, #132]	@ 0x84
  __HAL_PWR_AVD_EXTI_DISABLE_IT ();
 8009dea:	f04f 43b0 	mov.w	r3, #1476395008	@ 0x58000000
 8009dee:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 8009df2:	f04f 42b0 	mov.w	r2, #1476395008	@ 0x58000000
 8009df6:	f423 3380 	bic.w	r3, r3, #65536	@ 0x10000
 8009dfa:	f8c2 3080 	str.w	r3, [r2, #128]	@ 0x80
#endif /* !defined (DUAL_CORE) */

  __HAL_PWR_AVD_EXTI_DISABLE_RISING_EDGE ();
 8009dfe:	f04f 43b0 	mov.w	r3, #1476395008	@ 0x58000000
 8009e02:	681b      	ldr	r3, [r3, #0]
 8009e04:	f04f 42b0 	mov.w	r2, #1476395008	@ 0x58000000
 8009e08:	f423 3380 	bic.w	r3, r3, #65536	@ 0x10000
 8009e0c:	6013      	str	r3, [r2, #0]
  __HAL_PWR_AVD_EXTI_DISABLE_FALLING_EDGE ();
 8009e0e:	f04f 43b0 	mov.w	r3, #1476395008	@ 0x58000000
 8009e12:	685b      	ldr	r3, [r3, #4]
 8009e14:	f04f 42b0 	mov.w	r2, #1476395008	@ 0x58000000
 8009e18:	f423 3380 	bic.w	r3, r3, #65536	@ 0x10000
 8009e1c:	6053      	str	r3, [r2, #4]

#if !defined (DUAL_CORE)
  /* Configure the interrupt mode */
  if ((sConfigAVD->Mode & AVD_MODE_IT) == AVD_MODE_IT)
 8009e1e:	687b      	ldr	r3, [r7, #4]
 8009e20:	685b      	ldr	r3, [r3, #4]
 8009e22:	f403 3380 	and.w	r3, r3, #65536	@ 0x10000
 8009e26:	2b00      	cmp	r3, #0
 8009e28:	d009      	beq.n	8009e3e <HAL_PWREx_ConfigAVD+0x82>
  {
    __HAL_PWR_AVD_EXTI_ENABLE_IT ();
 8009e2a:	f04f 43b0 	mov.w	r3, #1476395008	@ 0x58000000
 8009e2e:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 8009e32:	f04f 42b0 	mov.w	r2, #1476395008	@ 0x58000000
 8009e36:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
 8009e3a:	f8c2 3080 	str.w	r3, [r2, #128]	@ 0x80
  }

  /* Configure the event mode */
  if ((sConfigAVD->Mode & AVD_MODE_EVT) == AVD_MODE_EVT)
 8009e3e:	687b      	ldr	r3, [r7, #4]
 8009e40:	685b      	ldr	r3, [r3, #4]
 8009e42:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
 8009e46:	2b00      	cmp	r3, #0
 8009e48:	d009      	beq.n	8009e5e <HAL_PWREx_ConfigAVD+0xa2>
  {
    __HAL_PWR_AVD_EXTI_ENABLE_EVENT ();
 8009e4a:	f04f 43b0 	mov.w	r3, #1476395008	@ 0x58000000
 8009e4e:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 8009e52:	f04f 42b0 	mov.w	r2, #1476395008	@ 0x58000000
 8009e56:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
 8009e5a:	f8c2 3084 	str.w	r3, [r2, #132]	@ 0x84
  }
#endif /* !defined (DUAL_CORE) */

  /* Rising edge configuration */
  if ((sConfigAVD->Mode & AVD_RISING_EDGE) == AVD_RISING_EDGE)
 8009e5e:	687b      	ldr	r3, [r7, #4]
 8009e60:	685b      	ldr	r3, [r3, #4]
 8009e62:	f003 0301 	and.w	r3, r3, #1
 8009e66:	2b00      	cmp	r3, #0
 8009e68:	d007      	beq.n	8009e7a <HAL_PWREx_ConfigAVD+0xbe>
  {
    __HAL_PWR_AVD_EXTI_ENABLE_RISING_EDGE ();
 8009e6a:	f04f 43b0 	mov.w	r3, #1476395008	@ 0x58000000
 8009e6e:	681b      	ldr	r3, [r3, #0]
 8009e70:	f04f 42b0 	mov.w	r2, #1476395008	@ 0x58000000
 8009e74:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
 8009e78:	6013      	str	r3, [r2, #0]
  }

  /* Falling edge configuration */
  if ((sConfigAVD->Mode & AVD_FALLING_EDGE) == AVD_FALLING_EDGE)
 8009e7a:	687b      	ldr	r3, [r7, #4]
 8009e7c:	685b      	ldr	r3, [r3, #4]
 8009e7e:	f003 0302 	and.w	r3, r3, #2
 8009e82:	2b00      	cmp	r3, #0
 8009e84:	d007      	beq.n	8009e96 <HAL_PWREx_ConfigAVD+0xda>
  {
    __HAL_PWR_AVD_EXTI_ENABLE_FALLING_EDGE ();
 8009e86:	f04f 43b0 	mov.w	r3, #1476395008	@ 0x58000000
 8009e8a:	685b      	ldr	r3, [r3, #4]
 8009e8c:	f04f 42b0 	mov.w	r2, #1476395008	@ 0x58000000
 8009e90:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
 8009e94:	6053      	str	r3, [r2, #4]
  }
}
 8009e96:	bf00      	nop
 8009e98:	370c      	adds	r7, #12
 8009e9a:	46bd      	mov	sp, r7
 8009e9c:	f85d 7b04 	ldr.w	r7, [sp], #4
 8009ea0:	4770      	bx	lr
 8009ea2:	bf00      	nop
 8009ea4:	58024800 	.word	0x58024800

08009ea8 <HAL_PWREx_EnableAVD>:
/**
  * @brief Enable the Analog Voltage Detector (AVD).
  * @retval None.
  */
void HAL_PWREx_EnableAVD (void)
{
 8009ea8:	b480      	push	{r7}
 8009eaa:	af00      	add	r7, sp, #0
  /* Enable the Analog Voltage Detector */
  SET_BIT (PWR->CR1, PWR_CR1_AVDEN);
 8009eac:	4b05      	ldr	r3, [pc, #20]	@ (8009ec4 <HAL_PWREx_EnableAVD+0x1c>)
 8009eae:	681b      	ldr	r3, [r3, #0]
 8009eb0:	4a04      	ldr	r2, [pc, #16]	@ (8009ec4 <HAL_PWREx_EnableAVD+0x1c>)
 8009eb2:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
 8009eb6:	6013      	str	r3, [r2, #0]
}
 8009eb8:	bf00      	nop
 8009eba:	46bd      	mov	sp, r7
 8009ebc:	f85d 7b04 	ldr.w	r7, [sp], #4
 8009ec0:	4770      	bx	lr
 8009ec2:	bf00      	nop
 8009ec4:	58024800 	.word	0x58024800

08009ec8 <HAL_RCC_OscConfig>:
  *         supported by this function. User should request a transition to HSE Off
  *         first and then HSE On or HSE Bypass.
  * @retval HAL status
  */
__weak HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
{
 8009ec8:	b580      	push	{r7, lr}
 8009eca:	b08c      	sub	sp, #48	@ 0x30
 8009ecc:	af00      	add	r7, sp, #0
 8009ece:	6078      	str	r0, [r7, #4]
  uint32_t tickstart;
  uint32_t temp1_pllckcfg, temp2_pllckcfg;

  /* Check Null pointer */
  if (RCC_OscInitStruct == NULL)
 8009ed0:	687b      	ldr	r3, [r7, #4]
 8009ed2:	2b00      	cmp	r3, #0
 8009ed4:	d102      	bne.n	8009edc <HAL_RCC_OscConfig+0x14>
  {
    return HAL_ERROR;
 8009ed6:	2301      	movs	r3, #1
 8009ed8:	f000 bc48 	b.w	800a76c <HAL_RCC_OscConfig+0x8a4>
  }

  /* Check the parameters */
  assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
  /*------------------------------- HSE Configuration ------------------------*/
  if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
 8009edc:	687b      	ldr	r3, [r7, #4]
 8009ede:	681b      	ldr	r3, [r3, #0]
 8009ee0:	f003 0301 	and.w	r3, r3, #1
 8009ee4:	2b00      	cmp	r3, #0
 8009ee6:	f000 8088 	beq.w	8009ffa <HAL_RCC_OscConfig+0x132>
  {
    /* Check the parameters */
    assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));

    const uint32_t temp_sysclksrc = __HAL_RCC_GET_SYSCLK_SOURCE();
 8009eea:	4b99      	ldr	r3, [pc, #612]	@ (800a150 <HAL_RCC_OscConfig+0x288>)
 8009eec:	691b      	ldr	r3, [r3, #16]
 8009eee:	f003 0338 	and.w	r3, r3, #56	@ 0x38
 8009ef2:	62fb      	str	r3, [r7, #44]	@ 0x2c
    const uint32_t temp_pllckselr = RCC->PLLCKSELR;
 8009ef4:	4b96      	ldr	r3, [pc, #600]	@ (800a150 <HAL_RCC_OscConfig+0x288>)
 8009ef6:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 8009ef8:	62bb      	str	r3, [r7, #40]	@ 0x28
    /* When the HSE is used as system clock or clock source for PLL in these cases HSE will not disabled */
    if ((temp_sysclksrc == RCC_CFGR_SWS_HSE) || ((temp_sysclksrc == RCC_CFGR_SWS_PLL1) && ((temp_pllckselr & RCC_PLLCKSELR_PLLSRC) == RCC_PLLCKSELR_PLLSRC_HSE)))
 8009efa:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8009efc:	2b10      	cmp	r3, #16
 8009efe:	d007      	beq.n	8009f10 <HAL_RCC_OscConfig+0x48>
 8009f00:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8009f02:	2b18      	cmp	r3, #24
 8009f04:	d111      	bne.n	8009f2a <HAL_RCC_OscConfig+0x62>
 8009f06:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8009f08:	f003 0303 	and.w	r3, r3, #3
 8009f0c:	2b02      	cmp	r3, #2
 8009f0e:	d10c      	bne.n	8009f2a <HAL_RCC_OscConfig+0x62>
    {
      if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
 8009f10:	4b8f      	ldr	r3, [pc, #572]	@ (800a150 <HAL_RCC_OscConfig+0x288>)
 8009f12:	681b      	ldr	r3, [r3, #0]
 8009f14:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
 8009f18:	2b00      	cmp	r3, #0
 8009f1a:	d06d      	beq.n	8009ff8 <HAL_RCC_OscConfig+0x130>
 8009f1c:	687b      	ldr	r3, [r7, #4]
 8009f1e:	685b      	ldr	r3, [r3, #4]
 8009f20:	2b00      	cmp	r3, #0
 8009f22:	d169      	bne.n	8009ff8 <HAL_RCC_OscConfig+0x130>
      {
        return HAL_ERROR;
 8009f24:	2301      	movs	r3, #1
 8009f26:	f000 bc21 	b.w	800a76c <HAL_RCC_OscConfig+0x8a4>
      }
    }
    else
    {
      /* Set the new HSE configuration ---------------------------------------*/
      __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
 8009f2a:	687b      	ldr	r3, [r7, #4]
 8009f2c:	685b      	ldr	r3, [r3, #4]
 8009f2e:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 8009f32:	d106      	bne.n	8009f42 <HAL_RCC_OscConfig+0x7a>
 8009f34:	4b86      	ldr	r3, [pc, #536]	@ (800a150 <HAL_RCC_OscConfig+0x288>)
 8009f36:	681b      	ldr	r3, [r3, #0]
 8009f38:	4a85      	ldr	r2, [pc, #532]	@ (800a150 <HAL_RCC_OscConfig+0x288>)
 8009f3a:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
 8009f3e:	6013      	str	r3, [r2, #0]
 8009f40:	e02e      	b.n	8009fa0 <HAL_RCC_OscConfig+0xd8>
 8009f42:	687b      	ldr	r3, [r7, #4]
 8009f44:	685b      	ldr	r3, [r3, #4]
 8009f46:	2b00      	cmp	r3, #0
 8009f48:	d10c      	bne.n	8009f64 <HAL_RCC_OscConfig+0x9c>
 8009f4a:	4b81      	ldr	r3, [pc, #516]	@ (800a150 <HAL_RCC_OscConfig+0x288>)
 8009f4c:	681b      	ldr	r3, [r3, #0]
 8009f4e:	4a80      	ldr	r2, [pc, #512]	@ (800a150 <HAL_RCC_OscConfig+0x288>)
 8009f50:	f423 3380 	bic.w	r3, r3, #65536	@ 0x10000
 8009f54:	6013      	str	r3, [r2, #0]
 8009f56:	4b7e      	ldr	r3, [pc, #504]	@ (800a150 <HAL_RCC_OscConfig+0x288>)
 8009f58:	681b      	ldr	r3, [r3, #0]
 8009f5a:	4a7d      	ldr	r2, [pc, #500]	@ (800a150 <HAL_RCC_OscConfig+0x288>)
 8009f5c:	f423 2380 	bic.w	r3, r3, #262144	@ 0x40000
 8009f60:	6013      	str	r3, [r2, #0]
 8009f62:	e01d      	b.n	8009fa0 <HAL_RCC_OscConfig+0xd8>
 8009f64:	687b      	ldr	r3, [r7, #4]
 8009f66:	685b      	ldr	r3, [r3, #4]
 8009f68:	f5b3 2fa0 	cmp.w	r3, #327680	@ 0x50000
 8009f6c:	d10c      	bne.n	8009f88 <HAL_RCC_OscConfig+0xc0>
 8009f6e:	4b78      	ldr	r3, [pc, #480]	@ (800a150 <HAL_RCC_OscConfig+0x288>)
 8009f70:	681b      	ldr	r3, [r3, #0]
 8009f72:	4a77      	ldr	r2, [pc, #476]	@ (800a150 <HAL_RCC_OscConfig+0x288>)
 8009f74:	f443 2380 	orr.w	r3, r3, #262144	@ 0x40000
 8009f78:	6013      	str	r3, [r2, #0]
 8009f7a:	4b75      	ldr	r3, [pc, #468]	@ (800a150 <HAL_RCC_OscConfig+0x288>)
 8009f7c:	681b      	ldr	r3, [r3, #0]
 8009f7e:	4a74      	ldr	r2, [pc, #464]	@ (800a150 <HAL_RCC_OscConfig+0x288>)
 8009f80:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
 8009f84:	6013      	str	r3, [r2, #0]
 8009f86:	e00b      	b.n	8009fa0 <HAL_RCC_OscConfig+0xd8>
 8009f88:	4b71      	ldr	r3, [pc, #452]	@ (800a150 <HAL_RCC_OscConfig+0x288>)
 8009f8a:	681b      	ldr	r3, [r3, #0]
 8009f8c:	4a70      	ldr	r2, [pc, #448]	@ (800a150 <HAL_RCC_OscConfig+0x288>)
 8009f8e:	f423 3380 	bic.w	r3, r3, #65536	@ 0x10000
 8009f92:	6013      	str	r3, [r2, #0]
 8009f94:	4b6e      	ldr	r3, [pc, #440]	@ (800a150 <HAL_RCC_OscConfig+0x288>)
 8009f96:	681b      	ldr	r3, [r3, #0]
 8009f98:	4a6d      	ldr	r2, [pc, #436]	@ (800a150 <HAL_RCC_OscConfig+0x288>)
 8009f9a:	f423 2380 	bic.w	r3, r3, #262144	@ 0x40000
 8009f9e:	6013      	str	r3, [r2, #0]

      /* Check the HSE State */
      if (RCC_OscInitStruct->HSEState != RCC_HSE_OFF)
 8009fa0:	687b      	ldr	r3, [r7, #4]
 8009fa2:	685b      	ldr	r3, [r3, #4]
 8009fa4:	2b00      	cmp	r3, #0
 8009fa6:	d013      	beq.n	8009fd0 <HAL_RCC_OscConfig+0x108>
      {
        /* Get Start Tick*/
        tickstart = HAL_GetTick();
 8009fa8:	f7fb f94a 	bl	8005240 <HAL_GetTick>
 8009fac:	6278      	str	r0, [r7, #36]	@ 0x24

        /* Wait till HSE is ready */
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == 0U)
 8009fae:	e008      	b.n	8009fc2 <HAL_RCC_OscConfig+0xfa>
        {
          if ((uint32_t)(HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
 8009fb0:	f7fb f946 	bl	8005240 <HAL_GetTick>
 8009fb4:	4602      	mov	r2, r0
 8009fb6:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8009fb8:	1ad3      	subs	r3, r2, r3
 8009fba:	2b64      	cmp	r3, #100	@ 0x64
 8009fbc:	d901      	bls.n	8009fc2 <HAL_RCC_OscConfig+0xfa>
          {
            return HAL_TIMEOUT;
 8009fbe:	2303      	movs	r3, #3
 8009fc0:	e3d4      	b.n	800a76c <HAL_RCC_OscConfig+0x8a4>
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == 0U)
 8009fc2:	4b63      	ldr	r3, [pc, #396]	@ (800a150 <HAL_RCC_OscConfig+0x288>)
 8009fc4:	681b      	ldr	r3, [r3, #0]
 8009fc6:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
 8009fca:	2b00      	cmp	r3, #0
 8009fcc:	d0f0      	beq.n	8009fb0 <HAL_RCC_OscConfig+0xe8>
 8009fce:	e014      	b.n	8009ffa <HAL_RCC_OscConfig+0x132>
        }
      }
      else
      {
        /* Get Start Tick*/
        tickstart = HAL_GetTick();
 8009fd0:	f7fb f936 	bl	8005240 <HAL_GetTick>
 8009fd4:	6278      	str	r0, [r7, #36]	@ 0x24

        /* Wait till HSE is disabled */
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U)
 8009fd6:	e008      	b.n	8009fea <HAL_RCC_OscConfig+0x122>
        {
          if ((uint32_t)(HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
 8009fd8:	f7fb f932 	bl	8005240 <HAL_GetTick>
 8009fdc:	4602      	mov	r2, r0
 8009fde:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8009fe0:	1ad3      	subs	r3, r2, r3
 8009fe2:	2b64      	cmp	r3, #100	@ 0x64
 8009fe4:	d901      	bls.n	8009fea <HAL_RCC_OscConfig+0x122>
          {
            return HAL_TIMEOUT;
 8009fe6:	2303      	movs	r3, #3
 8009fe8:	e3c0      	b.n	800a76c <HAL_RCC_OscConfig+0x8a4>
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U)
 8009fea:	4b59      	ldr	r3, [pc, #356]	@ (800a150 <HAL_RCC_OscConfig+0x288>)
 8009fec:	681b      	ldr	r3, [r3, #0]
 8009fee:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
 8009ff2:	2b00      	cmp	r3, #0
 8009ff4:	d1f0      	bne.n	8009fd8 <HAL_RCC_OscConfig+0x110>
 8009ff6:	e000      	b.n	8009ffa <HAL_RCC_OscConfig+0x132>
      if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
 8009ff8:	bf00      	nop
        }
      }
    }
  }
  /*----------------------------- HSI Configuration --------------------------*/
  if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
 8009ffa:	687b      	ldr	r3, [r7, #4]
 8009ffc:	681b      	ldr	r3, [r3, #0]
 8009ffe:	f003 0302 	and.w	r3, r3, #2
 800a002:	2b00      	cmp	r3, #0
 800a004:	f000 80ca 	beq.w	800a19c <HAL_RCC_OscConfig+0x2d4>
    /* Check the parameters */
    assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
    assert_param(IS_RCC_HSICALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));

    /* When the HSI is used as system clock it will not be disabled */
    const uint32_t temp_sysclksrc = __HAL_RCC_GET_SYSCLK_SOURCE();
 800a008:	4b51      	ldr	r3, [pc, #324]	@ (800a150 <HAL_RCC_OscConfig+0x288>)
 800a00a:	691b      	ldr	r3, [r3, #16]
 800a00c:	f003 0338 	and.w	r3, r3, #56	@ 0x38
 800a010:	623b      	str	r3, [r7, #32]
    const uint32_t temp_pllckselr = RCC->PLLCKSELR;
 800a012:	4b4f      	ldr	r3, [pc, #316]	@ (800a150 <HAL_RCC_OscConfig+0x288>)
 800a014:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800a016:	61fb      	str	r3, [r7, #28]
    if ((temp_sysclksrc == RCC_CFGR_SWS_HSI) || ((temp_sysclksrc == RCC_CFGR_SWS_PLL1) && ((temp_pllckselr & RCC_PLLCKSELR_PLLSRC) == RCC_PLLCKSELR_PLLSRC_HSI)))
 800a018:	6a3b      	ldr	r3, [r7, #32]
 800a01a:	2b00      	cmp	r3, #0
 800a01c:	d007      	beq.n	800a02e <HAL_RCC_OscConfig+0x166>
 800a01e:	6a3b      	ldr	r3, [r7, #32]
 800a020:	2b18      	cmp	r3, #24
 800a022:	d156      	bne.n	800a0d2 <HAL_RCC_OscConfig+0x20a>
 800a024:	69fb      	ldr	r3, [r7, #28]
 800a026:	f003 0303 	and.w	r3, r3, #3
 800a02a:	2b00      	cmp	r3, #0
 800a02c:	d151      	bne.n	800a0d2 <HAL_RCC_OscConfig+0x20a>
    {
      /* When HSI is used as system clock it will not be disabled */
      if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U) && (RCC_OscInitStruct->HSIState == RCC_HSI_OFF))
 800a02e:	4b48      	ldr	r3, [pc, #288]	@ (800a150 <HAL_RCC_OscConfig+0x288>)
 800a030:	681b      	ldr	r3, [r3, #0]
 800a032:	f003 0304 	and.w	r3, r3, #4
 800a036:	2b00      	cmp	r3, #0
 800a038:	d005      	beq.n	800a046 <HAL_RCC_OscConfig+0x17e>
 800a03a:	687b      	ldr	r3, [r7, #4]
 800a03c:	68db      	ldr	r3, [r3, #12]
 800a03e:	2b00      	cmp	r3, #0
 800a040:	d101      	bne.n	800a046 <HAL_RCC_OscConfig+0x17e>
      {
        return HAL_ERROR;
 800a042:	2301      	movs	r3, #1
 800a044:	e392      	b.n	800a76c <HAL_RCC_OscConfig+0x8a4>
      }
      /* Otherwise, only HSI division and calibration are allowed */
      else
      {
        /* Enable the Internal High Speed oscillator (HSI, HSIDIV2, HSIDIV4, or HSIDIV8) */
        __HAL_RCC_HSI_CONFIG(RCC_OscInitStruct->HSIState);
 800a046:	4b42      	ldr	r3, [pc, #264]	@ (800a150 <HAL_RCC_OscConfig+0x288>)
 800a048:	681b      	ldr	r3, [r3, #0]
 800a04a:	f023 0219 	bic.w	r2, r3, #25
 800a04e:	687b      	ldr	r3, [r7, #4]
 800a050:	68db      	ldr	r3, [r3, #12]
 800a052:	493f      	ldr	r1, [pc, #252]	@ (800a150 <HAL_RCC_OscConfig+0x288>)
 800a054:	4313      	orrs	r3, r2
 800a056:	600b      	str	r3, [r1, #0]

        /* Get Start Tick*/
        tickstart = HAL_GetTick();
 800a058:	f7fb f8f2 	bl	8005240 <HAL_GetTick>
 800a05c:	6278      	str	r0, [r7, #36]	@ 0x24

        /* Wait till HSI is ready */
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U)
 800a05e:	e008      	b.n	800a072 <HAL_RCC_OscConfig+0x1aa>
        {
          if ((uint32_t)(HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
 800a060:	f7fb f8ee 	bl	8005240 <HAL_GetTick>
 800a064:	4602      	mov	r2, r0
 800a066:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800a068:	1ad3      	subs	r3, r2, r3
 800a06a:	2b02      	cmp	r3, #2
 800a06c:	d901      	bls.n	800a072 <HAL_RCC_OscConfig+0x1aa>
          {
            return HAL_TIMEOUT;
 800a06e:	2303      	movs	r3, #3
 800a070:	e37c      	b.n	800a76c <HAL_RCC_OscConfig+0x8a4>
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U)
 800a072:	4b37      	ldr	r3, [pc, #220]	@ (800a150 <HAL_RCC_OscConfig+0x288>)
 800a074:	681b      	ldr	r3, [r3, #0]
 800a076:	f003 0304 	and.w	r3, r3, #4
 800a07a:	2b00      	cmp	r3, #0
 800a07c:	d0f0      	beq.n	800a060 <HAL_RCC_OscConfig+0x198>
          }
        }
        /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
        __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
 800a07e:	f7fb f90f 	bl	80052a0 <HAL_GetREVID>
 800a082:	4603      	mov	r3, r0
 800a084:	f241 0203 	movw	r2, #4099	@ 0x1003
 800a088:	4293      	cmp	r3, r2
 800a08a:	d817      	bhi.n	800a0bc <HAL_RCC_OscConfig+0x1f4>
 800a08c:	687b      	ldr	r3, [r7, #4]
 800a08e:	691b      	ldr	r3, [r3, #16]
 800a090:	2b40      	cmp	r3, #64	@ 0x40
 800a092:	d108      	bne.n	800a0a6 <HAL_RCC_OscConfig+0x1de>
 800a094:	4b2e      	ldr	r3, [pc, #184]	@ (800a150 <HAL_RCC_OscConfig+0x288>)
 800a096:	685b      	ldr	r3, [r3, #4]
 800a098:	f423 337c 	bic.w	r3, r3, #258048	@ 0x3f000
 800a09c:	4a2c      	ldr	r2, [pc, #176]	@ (800a150 <HAL_RCC_OscConfig+0x288>)
 800a09e:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800a0a2:	6053      	str	r3, [r2, #4]
      if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U) && (RCC_OscInitStruct->HSIState == RCC_HSI_OFF))
 800a0a4:	e07a      	b.n	800a19c <HAL_RCC_OscConfig+0x2d4>
        __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
 800a0a6:	4b2a      	ldr	r3, [pc, #168]	@ (800a150 <HAL_RCC_OscConfig+0x288>)
 800a0a8:	685b      	ldr	r3, [r3, #4]
 800a0aa:	f423 327c 	bic.w	r2, r3, #258048	@ 0x3f000
 800a0ae:	687b      	ldr	r3, [r7, #4]
 800a0b0:	691b      	ldr	r3, [r3, #16]
 800a0b2:	031b      	lsls	r3, r3, #12
 800a0b4:	4926      	ldr	r1, [pc, #152]	@ (800a150 <HAL_RCC_OscConfig+0x288>)
 800a0b6:	4313      	orrs	r3, r2
 800a0b8:	604b      	str	r3, [r1, #4]
      if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U) && (RCC_OscInitStruct->HSIState == RCC_HSI_OFF))
 800a0ba:	e06f      	b.n	800a19c <HAL_RCC_OscConfig+0x2d4>
        __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
 800a0bc:	4b24      	ldr	r3, [pc, #144]	@ (800a150 <HAL_RCC_OscConfig+0x288>)
 800a0be:	685b      	ldr	r3, [r3, #4]
 800a0c0:	f023 42fe 	bic.w	r2, r3, #2130706432	@ 0x7f000000
 800a0c4:	687b      	ldr	r3, [r7, #4]
 800a0c6:	691b      	ldr	r3, [r3, #16]
 800a0c8:	061b      	lsls	r3, r3, #24
 800a0ca:	4921      	ldr	r1, [pc, #132]	@ (800a150 <HAL_RCC_OscConfig+0x288>)
 800a0cc:	4313      	orrs	r3, r2
 800a0ce:	604b      	str	r3, [r1, #4]
      if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U) && (RCC_OscInitStruct->HSIState == RCC_HSI_OFF))
 800a0d0:	e064      	b.n	800a19c <HAL_RCC_OscConfig+0x2d4>
    }

    else
    {
      /* Check the HSI State */
      if ((RCC_OscInitStruct->HSIState) != RCC_HSI_OFF)
 800a0d2:	687b      	ldr	r3, [r7, #4]
 800a0d4:	68db      	ldr	r3, [r3, #12]
 800a0d6:	2b00      	cmp	r3, #0
 800a0d8:	d047      	beq.n	800a16a <HAL_RCC_OscConfig+0x2a2>
      {
        /* Enable the Internal High Speed oscillator (HSI, HSIDIV2,HSIDIV4, or HSIDIV8) */
        __HAL_RCC_HSI_CONFIG(RCC_OscInitStruct->HSIState);
 800a0da:	4b1d      	ldr	r3, [pc, #116]	@ (800a150 <HAL_RCC_OscConfig+0x288>)
 800a0dc:	681b      	ldr	r3, [r3, #0]
 800a0de:	f023 0219 	bic.w	r2, r3, #25
 800a0e2:	687b      	ldr	r3, [r7, #4]
 800a0e4:	68db      	ldr	r3, [r3, #12]
 800a0e6:	491a      	ldr	r1, [pc, #104]	@ (800a150 <HAL_RCC_OscConfig+0x288>)
 800a0e8:	4313      	orrs	r3, r2
 800a0ea:	600b      	str	r3, [r1, #0]

        /* Get Start Tick*/
        tickstart = HAL_GetTick();
 800a0ec:	f7fb f8a8 	bl	8005240 <HAL_GetTick>
 800a0f0:	6278      	str	r0, [r7, #36]	@ 0x24

        /* Wait till HSI is ready */
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U)
 800a0f2:	e008      	b.n	800a106 <HAL_RCC_OscConfig+0x23e>
        {
          if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
 800a0f4:	f7fb f8a4 	bl	8005240 <HAL_GetTick>
 800a0f8:	4602      	mov	r2, r0
 800a0fa:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800a0fc:	1ad3      	subs	r3, r2, r3
 800a0fe:	2b02      	cmp	r3, #2
 800a100:	d901      	bls.n	800a106 <HAL_RCC_OscConfig+0x23e>
          {
            return HAL_TIMEOUT;
 800a102:	2303      	movs	r3, #3
 800a104:	e332      	b.n	800a76c <HAL_RCC_OscConfig+0x8a4>
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U)
 800a106:	4b12      	ldr	r3, [pc, #72]	@ (800a150 <HAL_RCC_OscConfig+0x288>)
 800a108:	681b      	ldr	r3, [r3, #0]
 800a10a:	f003 0304 	and.w	r3, r3, #4
 800a10e:	2b00      	cmp	r3, #0
 800a110:	d0f0      	beq.n	800a0f4 <HAL_RCC_OscConfig+0x22c>
          }
        }

        /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
        __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
 800a112:	f7fb f8c5 	bl	80052a0 <HAL_GetREVID>
 800a116:	4603      	mov	r3, r0
 800a118:	f241 0203 	movw	r2, #4099	@ 0x1003
 800a11c:	4293      	cmp	r3, r2
 800a11e:	d819      	bhi.n	800a154 <HAL_RCC_OscConfig+0x28c>
 800a120:	687b      	ldr	r3, [r7, #4]
 800a122:	691b      	ldr	r3, [r3, #16]
 800a124:	2b40      	cmp	r3, #64	@ 0x40
 800a126:	d108      	bne.n	800a13a <HAL_RCC_OscConfig+0x272>
 800a128:	4b09      	ldr	r3, [pc, #36]	@ (800a150 <HAL_RCC_OscConfig+0x288>)
 800a12a:	685b      	ldr	r3, [r3, #4]
 800a12c:	f423 337c 	bic.w	r3, r3, #258048	@ 0x3f000
 800a130:	4a07      	ldr	r2, [pc, #28]	@ (800a150 <HAL_RCC_OscConfig+0x288>)
 800a132:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800a136:	6053      	str	r3, [r2, #4]
 800a138:	e030      	b.n	800a19c <HAL_RCC_OscConfig+0x2d4>
 800a13a:	4b05      	ldr	r3, [pc, #20]	@ (800a150 <HAL_RCC_OscConfig+0x288>)
 800a13c:	685b      	ldr	r3, [r3, #4]
 800a13e:	f423 327c 	bic.w	r2, r3, #258048	@ 0x3f000
 800a142:	687b      	ldr	r3, [r7, #4]
 800a144:	691b      	ldr	r3, [r3, #16]
 800a146:	031b      	lsls	r3, r3, #12
 800a148:	4901      	ldr	r1, [pc, #4]	@ (800a150 <HAL_RCC_OscConfig+0x288>)
 800a14a:	4313      	orrs	r3, r2
 800a14c:	604b      	str	r3, [r1, #4]
 800a14e:	e025      	b.n	800a19c <HAL_RCC_OscConfig+0x2d4>
 800a150:	58024400 	.word	0x58024400
 800a154:	4b9a      	ldr	r3, [pc, #616]	@ (800a3c0 <HAL_RCC_OscConfig+0x4f8>)
 800a156:	685b      	ldr	r3, [r3, #4]
 800a158:	f023 42fe 	bic.w	r2, r3, #2130706432	@ 0x7f000000
 800a15c:	687b      	ldr	r3, [r7, #4]
 800a15e:	691b      	ldr	r3, [r3, #16]
 800a160:	061b      	lsls	r3, r3, #24
 800a162:	4997      	ldr	r1, [pc, #604]	@ (800a3c0 <HAL_RCC_OscConfig+0x4f8>)
 800a164:	4313      	orrs	r3, r2
 800a166:	604b      	str	r3, [r1, #4]
 800a168:	e018      	b.n	800a19c <HAL_RCC_OscConfig+0x2d4>
      }
      else
      {
        /* Disable the Internal High Speed oscillator (HSI). */
        __HAL_RCC_HSI_DISABLE();
 800a16a:	4b95      	ldr	r3, [pc, #596]	@ (800a3c0 <HAL_RCC_OscConfig+0x4f8>)
 800a16c:	681b      	ldr	r3, [r3, #0]
 800a16e:	4a94      	ldr	r2, [pc, #592]	@ (800a3c0 <HAL_RCC_OscConfig+0x4f8>)
 800a170:	f023 0301 	bic.w	r3, r3, #1
 800a174:	6013      	str	r3, [r2, #0]

        /* Get Start Tick*/
        tickstart = HAL_GetTick();
 800a176:	f7fb f863 	bl	8005240 <HAL_GetTick>
 800a17a:	6278      	str	r0, [r7, #36]	@ 0x24

        /* Wait till HSI is disabled */
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U)
 800a17c:	e008      	b.n	800a190 <HAL_RCC_OscConfig+0x2c8>
        {
          if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
 800a17e:	f7fb f85f 	bl	8005240 <HAL_GetTick>
 800a182:	4602      	mov	r2, r0
 800a184:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800a186:	1ad3      	subs	r3, r2, r3
 800a188:	2b02      	cmp	r3, #2
 800a18a:	d901      	bls.n	800a190 <HAL_RCC_OscConfig+0x2c8>
          {
            return HAL_TIMEOUT;
 800a18c:	2303      	movs	r3, #3
 800a18e:	e2ed      	b.n	800a76c <HAL_RCC_OscConfig+0x8a4>
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U)
 800a190:	4b8b      	ldr	r3, [pc, #556]	@ (800a3c0 <HAL_RCC_OscConfig+0x4f8>)
 800a192:	681b      	ldr	r3, [r3, #0]
 800a194:	f003 0304 	and.w	r3, r3, #4
 800a198:	2b00      	cmp	r3, #0
 800a19a:	d1f0      	bne.n	800a17e <HAL_RCC_OscConfig+0x2b6>
        }
      }
    }
  }
  /*----------------------------- CSI Configuration --------------------------*/
  if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_CSI) == RCC_OSCILLATORTYPE_CSI)
 800a19c:	687b      	ldr	r3, [r7, #4]
 800a19e:	681b      	ldr	r3, [r3, #0]
 800a1a0:	f003 0310 	and.w	r3, r3, #16
 800a1a4:	2b00      	cmp	r3, #0
 800a1a6:	f000 80a9 	beq.w	800a2fc <HAL_RCC_OscConfig+0x434>
    /* Check the parameters */
    assert_param(IS_RCC_CSI(RCC_OscInitStruct->CSIState));
    assert_param(IS_RCC_CSICALIBRATION_VALUE(RCC_OscInitStruct->CSICalibrationValue));

    /* When the CSI is used as system clock it will not disabled */
    const uint32_t temp_sysclksrc = __HAL_RCC_GET_SYSCLK_SOURCE();
 800a1aa:	4b85      	ldr	r3, [pc, #532]	@ (800a3c0 <HAL_RCC_OscConfig+0x4f8>)
 800a1ac:	691b      	ldr	r3, [r3, #16]
 800a1ae:	f003 0338 	and.w	r3, r3, #56	@ 0x38
 800a1b2:	61bb      	str	r3, [r7, #24]
    const uint32_t temp_pllckselr = RCC->PLLCKSELR;
 800a1b4:	4b82      	ldr	r3, [pc, #520]	@ (800a3c0 <HAL_RCC_OscConfig+0x4f8>)
 800a1b6:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800a1b8:	617b      	str	r3, [r7, #20]
    if ((temp_sysclksrc == RCC_CFGR_SWS_CSI) || ((temp_sysclksrc == RCC_CFGR_SWS_PLL1) && ((temp_pllckselr & RCC_PLLCKSELR_PLLSRC) == RCC_PLLCKSELR_PLLSRC_CSI)))
 800a1ba:	69bb      	ldr	r3, [r7, #24]
 800a1bc:	2b08      	cmp	r3, #8
 800a1be:	d007      	beq.n	800a1d0 <HAL_RCC_OscConfig+0x308>
 800a1c0:	69bb      	ldr	r3, [r7, #24]
 800a1c2:	2b18      	cmp	r3, #24
 800a1c4:	d13a      	bne.n	800a23c <HAL_RCC_OscConfig+0x374>
 800a1c6:	697b      	ldr	r3, [r7, #20]
 800a1c8:	f003 0303 	and.w	r3, r3, #3
 800a1cc:	2b01      	cmp	r3, #1
 800a1ce:	d135      	bne.n	800a23c <HAL_RCC_OscConfig+0x374>
    {
      /* When CSI is used as system clock it will not disabled */
      if ((__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) != 0U) && (RCC_OscInitStruct->CSIState != RCC_CSI_ON))
 800a1d0:	4b7b      	ldr	r3, [pc, #492]	@ (800a3c0 <HAL_RCC_OscConfig+0x4f8>)
 800a1d2:	681b      	ldr	r3, [r3, #0]
 800a1d4:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 800a1d8:	2b00      	cmp	r3, #0
 800a1da:	d005      	beq.n	800a1e8 <HAL_RCC_OscConfig+0x320>
 800a1dc:	687b      	ldr	r3, [r7, #4]
 800a1de:	69db      	ldr	r3, [r3, #28]
 800a1e0:	2b80      	cmp	r3, #128	@ 0x80
 800a1e2:	d001      	beq.n	800a1e8 <HAL_RCC_OscConfig+0x320>
      {
        return HAL_ERROR;
 800a1e4:	2301      	movs	r3, #1
 800a1e6:	e2c1      	b.n	800a76c <HAL_RCC_OscConfig+0x8a4>
      }
      /* Otherwise, just the calibration is allowed */
      else
      {
        /* Adjusts the Internal High Speed oscillator (CSI) calibration value.*/
        __HAL_RCC_CSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->CSICalibrationValue);
 800a1e8:	f7fb f85a 	bl	80052a0 <HAL_GetREVID>
 800a1ec:	4603      	mov	r3, r0
 800a1ee:	f241 0203 	movw	r2, #4099	@ 0x1003
 800a1f2:	4293      	cmp	r3, r2
 800a1f4:	d817      	bhi.n	800a226 <HAL_RCC_OscConfig+0x35e>
 800a1f6:	687b      	ldr	r3, [r7, #4]
 800a1f8:	6a1b      	ldr	r3, [r3, #32]
 800a1fa:	2b20      	cmp	r3, #32
 800a1fc:	d108      	bne.n	800a210 <HAL_RCC_OscConfig+0x348>
 800a1fe:	4b70      	ldr	r3, [pc, #448]	@ (800a3c0 <HAL_RCC_OscConfig+0x4f8>)
 800a200:	685b      	ldr	r3, [r3, #4]
 800a202:	f023 43f8 	bic.w	r3, r3, #2080374784	@ 0x7c000000
 800a206:	4a6e      	ldr	r2, [pc, #440]	@ (800a3c0 <HAL_RCC_OscConfig+0x4f8>)
 800a208:	f043 4380 	orr.w	r3, r3, #1073741824	@ 0x40000000
 800a20c:	6053      	str	r3, [r2, #4]
      if ((__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) != 0U) && (RCC_OscInitStruct->CSIState != RCC_CSI_ON))
 800a20e:	e075      	b.n	800a2fc <HAL_RCC_OscConfig+0x434>
        __HAL_RCC_CSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->CSICalibrationValue);
 800a210:	4b6b      	ldr	r3, [pc, #428]	@ (800a3c0 <HAL_RCC_OscConfig+0x4f8>)
 800a212:	685b      	ldr	r3, [r3, #4]
 800a214:	f023 42f8 	bic.w	r2, r3, #2080374784	@ 0x7c000000
 800a218:	687b      	ldr	r3, [r7, #4]
 800a21a:	6a1b      	ldr	r3, [r3, #32]
 800a21c:	069b      	lsls	r3, r3, #26
 800a21e:	4968      	ldr	r1, [pc, #416]	@ (800a3c0 <HAL_RCC_OscConfig+0x4f8>)
 800a220:	4313      	orrs	r3, r2
 800a222:	604b      	str	r3, [r1, #4]
      if ((__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) != 0U) && (RCC_OscInitStruct->CSIState != RCC_CSI_ON))
 800a224:	e06a      	b.n	800a2fc <HAL_RCC_OscConfig+0x434>
        __HAL_RCC_CSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->CSICalibrationValue);
 800a226:	4b66      	ldr	r3, [pc, #408]	@ (800a3c0 <HAL_RCC_OscConfig+0x4f8>)
 800a228:	68db      	ldr	r3, [r3, #12]
 800a22a:	f023 527c 	bic.w	r2, r3, #1056964608	@ 0x3f000000
 800a22e:	687b      	ldr	r3, [r7, #4]
 800a230:	6a1b      	ldr	r3, [r3, #32]
 800a232:	061b      	lsls	r3, r3, #24
 800a234:	4962      	ldr	r1, [pc, #392]	@ (800a3c0 <HAL_RCC_OscConfig+0x4f8>)
 800a236:	4313      	orrs	r3, r2
 800a238:	60cb      	str	r3, [r1, #12]
      if ((__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) != 0U) && (RCC_OscInitStruct->CSIState != RCC_CSI_ON))
 800a23a:	e05f      	b.n	800a2fc <HAL_RCC_OscConfig+0x434>
      }
    }
    else
    {
      /* Check the CSI State */
      if ((RCC_OscInitStruct->CSIState) != RCC_CSI_OFF)
 800a23c:	687b      	ldr	r3, [r7, #4]
 800a23e:	69db      	ldr	r3, [r3, #28]
 800a240:	2b00      	cmp	r3, #0
 800a242:	d042      	beq.n	800a2ca <HAL_RCC_OscConfig+0x402>
      {
        /* Enable the Internal High Speed oscillator (CSI). */
        __HAL_RCC_CSI_ENABLE();
 800a244:	4b5e      	ldr	r3, [pc, #376]	@ (800a3c0 <HAL_RCC_OscConfig+0x4f8>)
 800a246:	681b      	ldr	r3, [r3, #0]
 800a248:	4a5d      	ldr	r2, [pc, #372]	@ (800a3c0 <HAL_RCC_OscConfig+0x4f8>)
 800a24a:	f043 0380 	orr.w	r3, r3, #128	@ 0x80
 800a24e:	6013      	str	r3, [r2, #0]

        /* Get Start Tick*/
        tickstart = HAL_GetTick();
 800a250:	f7fa fff6 	bl	8005240 <HAL_GetTick>
 800a254:	6278      	str	r0, [r7, #36]	@ 0x24

        /* Wait till CSI is ready */
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) == 0U)
 800a256:	e008      	b.n	800a26a <HAL_RCC_OscConfig+0x3a2>
        {
          if ((HAL_GetTick() - tickstart) > CSI_TIMEOUT_VALUE)
 800a258:	f7fa fff2 	bl	8005240 <HAL_GetTick>
 800a25c:	4602      	mov	r2, r0
 800a25e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800a260:	1ad3      	subs	r3, r2, r3
 800a262:	2b02      	cmp	r3, #2
 800a264:	d901      	bls.n	800a26a <HAL_RCC_OscConfig+0x3a2>
          {
            return HAL_TIMEOUT;
 800a266:	2303      	movs	r3, #3
 800a268:	e280      	b.n	800a76c <HAL_RCC_OscConfig+0x8a4>
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) == 0U)
 800a26a:	4b55      	ldr	r3, [pc, #340]	@ (800a3c0 <HAL_RCC_OscConfig+0x4f8>)
 800a26c:	681b      	ldr	r3, [r3, #0]
 800a26e:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 800a272:	2b00      	cmp	r3, #0
 800a274:	d0f0      	beq.n	800a258 <HAL_RCC_OscConfig+0x390>
          }
        }

        /* Adjusts the Internal High Speed oscillator (CSI) calibration value.*/
        __HAL_RCC_CSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->CSICalibrationValue);
 800a276:	f7fb f813 	bl	80052a0 <HAL_GetREVID>
 800a27a:	4603      	mov	r3, r0
 800a27c:	f241 0203 	movw	r2, #4099	@ 0x1003
 800a280:	4293      	cmp	r3, r2
 800a282:	d817      	bhi.n	800a2b4 <HAL_RCC_OscConfig+0x3ec>
 800a284:	687b      	ldr	r3, [r7, #4]
 800a286:	6a1b      	ldr	r3, [r3, #32]
 800a288:	2b20      	cmp	r3, #32
 800a28a:	d108      	bne.n	800a29e <HAL_RCC_OscConfig+0x3d6>
 800a28c:	4b4c      	ldr	r3, [pc, #304]	@ (800a3c0 <HAL_RCC_OscConfig+0x4f8>)
 800a28e:	685b      	ldr	r3, [r3, #4]
 800a290:	f023 43f8 	bic.w	r3, r3, #2080374784	@ 0x7c000000
 800a294:	4a4a      	ldr	r2, [pc, #296]	@ (800a3c0 <HAL_RCC_OscConfig+0x4f8>)
 800a296:	f043 4380 	orr.w	r3, r3, #1073741824	@ 0x40000000
 800a29a:	6053      	str	r3, [r2, #4]
 800a29c:	e02e      	b.n	800a2fc <HAL_RCC_OscConfig+0x434>
 800a29e:	4b48      	ldr	r3, [pc, #288]	@ (800a3c0 <HAL_RCC_OscConfig+0x4f8>)
 800a2a0:	685b      	ldr	r3, [r3, #4]
 800a2a2:	f023 42f8 	bic.w	r2, r3, #2080374784	@ 0x7c000000
 800a2a6:	687b      	ldr	r3, [r7, #4]
 800a2a8:	6a1b      	ldr	r3, [r3, #32]
 800a2aa:	069b      	lsls	r3, r3, #26
 800a2ac:	4944      	ldr	r1, [pc, #272]	@ (800a3c0 <HAL_RCC_OscConfig+0x4f8>)
 800a2ae:	4313      	orrs	r3, r2
 800a2b0:	604b      	str	r3, [r1, #4]
 800a2b2:	e023      	b.n	800a2fc <HAL_RCC_OscConfig+0x434>
 800a2b4:	4b42      	ldr	r3, [pc, #264]	@ (800a3c0 <HAL_RCC_OscConfig+0x4f8>)
 800a2b6:	68db      	ldr	r3, [r3, #12]
 800a2b8:	f023 527c 	bic.w	r2, r3, #1056964608	@ 0x3f000000
 800a2bc:	687b      	ldr	r3, [r7, #4]
 800a2be:	6a1b      	ldr	r3, [r3, #32]
 800a2c0:	061b      	lsls	r3, r3, #24
 800a2c2:	493f      	ldr	r1, [pc, #252]	@ (800a3c0 <HAL_RCC_OscConfig+0x4f8>)
 800a2c4:	4313      	orrs	r3, r2
 800a2c6:	60cb      	str	r3, [r1, #12]
 800a2c8:	e018      	b.n	800a2fc <HAL_RCC_OscConfig+0x434>
      }
      else
      {
        /* Disable the Internal High Speed oscillator (CSI). */
        __HAL_RCC_CSI_DISABLE();
 800a2ca:	4b3d      	ldr	r3, [pc, #244]	@ (800a3c0 <HAL_RCC_OscConfig+0x4f8>)
 800a2cc:	681b      	ldr	r3, [r3, #0]
 800a2ce:	4a3c      	ldr	r2, [pc, #240]	@ (800a3c0 <HAL_RCC_OscConfig+0x4f8>)
 800a2d0:	f023 0380 	bic.w	r3, r3, #128	@ 0x80
 800a2d4:	6013      	str	r3, [r2, #0]

        /* Get Start Tick*/
        tickstart = HAL_GetTick();
 800a2d6:	f7fa ffb3 	bl	8005240 <HAL_GetTick>
 800a2da:	6278      	str	r0, [r7, #36]	@ 0x24

        /* Wait till CSI is disabled */
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) != 0U)
 800a2dc:	e008      	b.n	800a2f0 <HAL_RCC_OscConfig+0x428>
        {
          if ((HAL_GetTick() - tickstart) > CSI_TIMEOUT_VALUE)
 800a2de:	f7fa ffaf 	bl	8005240 <HAL_GetTick>
 800a2e2:	4602      	mov	r2, r0
 800a2e4:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800a2e6:	1ad3      	subs	r3, r2, r3
 800a2e8:	2b02      	cmp	r3, #2
 800a2ea:	d901      	bls.n	800a2f0 <HAL_RCC_OscConfig+0x428>
          {
            return HAL_TIMEOUT;
 800a2ec:	2303      	movs	r3, #3
 800a2ee:	e23d      	b.n	800a76c <HAL_RCC_OscConfig+0x8a4>
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) != 0U)
 800a2f0:	4b33      	ldr	r3, [pc, #204]	@ (800a3c0 <HAL_RCC_OscConfig+0x4f8>)
 800a2f2:	681b      	ldr	r3, [r3, #0]
 800a2f4:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 800a2f8:	2b00      	cmp	r3, #0
 800a2fa:	d1f0      	bne.n	800a2de <HAL_RCC_OscConfig+0x416>
        }
      }
    }
  }
  /*------------------------------ LSI Configuration -------------------------*/
  if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
 800a2fc:	687b      	ldr	r3, [r7, #4]
 800a2fe:	681b      	ldr	r3, [r3, #0]
 800a300:	f003 0308 	and.w	r3, r3, #8
 800a304:	2b00      	cmp	r3, #0
 800a306:	d036      	beq.n	800a376 <HAL_RCC_OscConfig+0x4ae>
  {
    /* Check the parameters */
    assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));

    /* Check the LSI State */
    if ((RCC_OscInitStruct->LSIState) != RCC_LSI_OFF)
 800a308:	687b      	ldr	r3, [r7, #4]
 800a30a:	695b      	ldr	r3, [r3, #20]
 800a30c:	2b00      	cmp	r3, #0
 800a30e:	d019      	beq.n	800a344 <HAL_RCC_OscConfig+0x47c>
    {
      /* Enable the Internal Low Speed oscillator (LSI). */
      __HAL_RCC_LSI_ENABLE();
 800a310:	4b2b      	ldr	r3, [pc, #172]	@ (800a3c0 <HAL_RCC_OscConfig+0x4f8>)
 800a312:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 800a314:	4a2a      	ldr	r2, [pc, #168]	@ (800a3c0 <HAL_RCC_OscConfig+0x4f8>)
 800a316:	f043 0301 	orr.w	r3, r3, #1
 800a31a:	6753      	str	r3, [r2, #116]	@ 0x74

      /* Get Start Tick*/
      tickstart = HAL_GetTick();
 800a31c:	f7fa ff90 	bl	8005240 <HAL_GetTick>
 800a320:	6278      	str	r0, [r7, #36]	@ 0x24

      /* Wait till LSI is ready */
      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == 0U)
 800a322:	e008      	b.n	800a336 <HAL_RCC_OscConfig+0x46e>
      {
        if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
 800a324:	f7fa ff8c 	bl	8005240 <HAL_GetTick>
 800a328:	4602      	mov	r2, r0
 800a32a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800a32c:	1ad3      	subs	r3, r2, r3
 800a32e:	2b02      	cmp	r3, #2
 800a330:	d901      	bls.n	800a336 <HAL_RCC_OscConfig+0x46e>
        {
          return HAL_TIMEOUT;
 800a332:	2303      	movs	r3, #3
 800a334:	e21a      	b.n	800a76c <HAL_RCC_OscConfig+0x8a4>
      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == 0U)
 800a336:	4b22      	ldr	r3, [pc, #136]	@ (800a3c0 <HAL_RCC_OscConfig+0x4f8>)
 800a338:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 800a33a:	f003 0302 	and.w	r3, r3, #2
 800a33e:	2b00      	cmp	r3, #0
 800a340:	d0f0      	beq.n	800a324 <HAL_RCC_OscConfig+0x45c>
 800a342:	e018      	b.n	800a376 <HAL_RCC_OscConfig+0x4ae>
      }
    }
    else
    {
      /* Disable the Internal Low Speed oscillator (LSI). */
      __HAL_RCC_LSI_DISABLE();
 800a344:	4b1e      	ldr	r3, [pc, #120]	@ (800a3c0 <HAL_RCC_OscConfig+0x4f8>)
 800a346:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 800a348:	4a1d      	ldr	r2, [pc, #116]	@ (800a3c0 <HAL_RCC_OscConfig+0x4f8>)
 800a34a:	f023 0301 	bic.w	r3, r3, #1
 800a34e:	6753      	str	r3, [r2, #116]	@ 0x74

      /* Get Start Tick*/
      tickstart = HAL_GetTick();
 800a350:	f7fa ff76 	bl	8005240 <HAL_GetTick>
 800a354:	6278      	str	r0, [r7, #36]	@ 0x24

      /* Wait till LSI is ready */
      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != 0U)
 800a356:	e008      	b.n	800a36a <HAL_RCC_OscConfig+0x4a2>
      {
        if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
 800a358:	f7fa ff72 	bl	8005240 <HAL_GetTick>
 800a35c:	4602      	mov	r2, r0
 800a35e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800a360:	1ad3      	subs	r3, r2, r3
 800a362:	2b02      	cmp	r3, #2
 800a364:	d901      	bls.n	800a36a <HAL_RCC_OscConfig+0x4a2>
        {
          return HAL_TIMEOUT;
 800a366:	2303      	movs	r3, #3
 800a368:	e200      	b.n	800a76c <HAL_RCC_OscConfig+0x8a4>
      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != 0U)
 800a36a:	4b15      	ldr	r3, [pc, #84]	@ (800a3c0 <HAL_RCC_OscConfig+0x4f8>)
 800a36c:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 800a36e:	f003 0302 	and.w	r3, r3, #2
 800a372:	2b00      	cmp	r3, #0
 800a374:	d1f0      	bne.n	800a358 <HAL_RCC_OscConfig+0x490>
      }
    }
  }

  /*------------------------------ HSI48 Configuration -------------------------*/
  if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI48) == RCC_OSCILLATORTYPE_HSI48)
 800a376:	687b      	ldr	r3, [r7, #4]
 800a378:	681b      	ldr	r3, [r3, #0]
 800a37a:	f003 0320 	and.w	r3, r3, #32
 800a37e:	2b00      	cmp	r3, #0
 800a380:	d039      	beq.n	800a3f6 <HAL_RCC_OscConfig+0x52e>
  {
    /* Check the parameters */
    assert_param(IS_RCC_HSI48(RCC_OscInitStruct->HSI48State));

    /* Check the HSI48 State */
    if ((RCC_OscInitStruct->HSI48State) != RCC_HSI48_OFF)
 800a382:	687b      	ldr	r3, [r7, #4]
 800a384:	699b      	ldr	r3, [r3, #24]
 800a386:	2b00      	cmp	r3, #0
 800a388:	d01c      	beq.n	800a3c4 <HAL_RCC_OscConfig+0x4fc>
    {
      /* Enable the Internal Low Speed oscillator (HSI48). */
      __HAL_RCC_HSI48_ENABLE();
 800a38a:	4b0d      	ldr	r3, [pc, #52]	@ (800a3c0 <HAL_RCC_OscConfig+0x4f8>)
 800a38c:	681b      	ldr	r3, [r3, #0]
 800a38e:	4a0c      	ldr	r2, [pc, #48]	@ (800a3c0 <HAL_RCC_OscConfig+0x4f8>)
 800a390:	f443 5380 	orr.w	r3, r3, #4096	@ 0x1000
 800a394:	6013      	str	r3, [r2, #0]

      /* Get time-out */
      tickstart = HAL_GetTick();
 800a396:	f7fa ff53 	bl	8005240 <HAL_GetTick>
 800a39a:	6278      	str	r0, [r7, #36]	@ 0x24

      /* Wait till HSI48 is ready */
      while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) == 0U)
 800a39c:	e008      	b.n	800a3b0 <HAL_RCC_OscConfig+0x4e8>
      {
        if ((HAL_GetTick() - tickstart) > HSI48_TIMEOUT_VALUE)
 800a39e:	f7fa ff4f 	bl	8005240 <HAL_GetTick>
 800a3a2:	4602      	mov	r2, r0
 800a3a4:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800a3a6:	1ad3      	subs	r3, r2, r3
 800a3a8:	2b02      	cmp	r3, #2
 800a3aa:	d901      	bls.n	800a3b0 <HAL_RCC_OscConfig+0x4e8>
        {
          return HAL_TIMEOUT;
 800a3ac:	2303      	movs	r3, #3
 800a3ae:	e1dd      	b.n	800a76c <HAL_RCC_OscConfig+0x8a4>
      while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) == 0U)
 800a3b0:	4b03      	ldr	r3, [pc, #12]	@ (800a3c0 <HAL_RCC_OscConfig+0x4f8>)
 800a3b2:	681b      	ldr	r3, [r3, #0]
 800a3b4:	f403 5300 	and.w	r3, r3, #8192	@ 0x2000
 800a3b8:	2b00      	cmp	r3, #0
 800a3ba:	d0f0      	beq.n	800a39e <HAL_RCC_OscConfig+0x4d6>
 800a3bc:	e01b      	b.n	800a3f6 <HAL_RCC_OscConfig+0x52e>
 800a3be:	bf00      	nop
 800a3c0:	58024400 	.word	0x58024400
      }
    }
    else
    {
      /* Disable the Internal Low Speed oscillator (HSI48). */
      __HAL_RCC_HSI48_DISABLE();
 800a3c4:	4b9b      	ldr	r3, [pc, #620]	@ (800a634 <HAL_RCC_OscConfig+0x76c>)
 800a3c6:	681b      	ldr	r3, [r3, #0]
 800a3c8:	4a9a      	ldr	r2, [pc, #616]	@ (800a634 <HAL_RCC_OscConfig+0x76c>)
 800a3ca:	f423 5380 	bic.w	r3, r3, #4096	@ 0x1000
 800a3ce:	6013      	str	r3, [r2, #0]

      /* Get time-out */
      tickstart = HAL_GetTick();
 800a3d0:	f7fa ff36 	bl	8005240 <HAL_GetTick>
 800a3d4:	6278      	str	r0, [r7, #36]	@ 0x24

      /* Wait till HSI48 is ready */
      while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) != 0U)
 800a3d6:	e008      	b.n	800a3ea <HAL_RCC_OscConfig+0x522>
      {
        if ((HAL_GetTick() - tickstart) > HSI48_TIMEOUT_VALUE)
 800a3d8:	f7fa ff32 	bl	8005240 <HAL_GetTick>
 800a3dc:	4602      	mov	r2, r0
 800a3de:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800a3e0:	1ad3      	subs	r3, r2, r3
 800a3e2:	2b02      	cmp	r3, #2
 800a3e4:	d901      	bls.n	800a3ea <HAL_RCC_OscConfig+0x522>
        {
          return HAL_TIMEOUT;
 800a3e6:	2303      	movs	r3, #3
 800a3e8:	e1c0      	b.n	800a76c <HAL_RCC_OscConfig+0x8a4>
      while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) != 0U)
 800a3ea:	4b92      	ldr	r3, [pc, #584]	@ (800a634 <HAL_RCC_OscConfig+0x76c>)
 800a3ec:	681b      	ldr	r3, [r3, #0]
 800a3ee:	f403 5300 	and.w	r3, r3, #8192	@ 0x2000
 800a3f2:	2b00      	cmp	r3, #0
 800a3f4:	d1f0      	bne.n	800a3d8 <HAL_RCC_OscConfig+0x510>
        }
      }
    }
  }
  /*------------------------------ LSE Configuration -------------------------*/
  if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
 800a3f6:	687b      	ldr	r3, [r7, #4]
 800a3f8:	681b      	ldr	r3, [r3, #0]
 800a3fa:	f003 0304 	and.w	r3, r3, #4
 800a3fe:	2b00      	cmp	r3, #0
 800a400:	f000 8081 	beq.w	800a506 <HAL_RCC_OscConfig+0x63e>
  {
    /* Check the parameters */
    assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));

    /* Enable write access to Backup domain */
    PWR->CR1 |= PWR_CR1_DBP;
 800a404:	4b8c      	ldr	r3, [pc, #560]	@ (800a638 <HAL_RCC_OscConfig+0x770>)
 800a406:	681b      	ldr	r3, [r3, #0]
 800a408:	4a8b      	ldr	r2, [pc, #556]	@ (800a638 <HAL_RCC_OscConfig+0x770>)
 800a40a:	f443 7380 	orr.w	r3, r3, #256	@ 0x100
 800a40e:	6013      	str	r3, [r2, #0]

    /* Wait for Backup domain Write protection disable */
    tickstart = HAL_GetTick();
 800a410:	f7fa ff16 	bl	8005240 <HAL_GetTick>
 800a414:	6278      	str	r0, [r7, #36]	@ 0x24

    while ((PWR->CR1 & PWR_CR1_DBP) == 0U)
 800a416:	e008      	b.n	800a42a <HAL_RCC_OscConfig+0x562>
    {
      if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
 800a418:	f7fa ff12 	bl	8005240 <HAL_GetTick>
 800a41c:	4602      	mov	r2, r0
 800a41e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800a420:	1ad3      	subs	r3, r2, r3
 800a422:	2b64      	cmp	r3, #100	@ 0x64
 800a424:	d901      	bls.n	800a42a <HAL_RCC_OscConfig+0x562>
      {
        return HAL_TIMEOUT;
 800a426:	2303      	movs	r3, #3
 800a428:	e1a0      	b.n	800a76c <HAL_RCC_OscConfig+0x8a4>
    while ((PWR->CR1 & PWR_CR1_DBP) == 0U)
 800a42a:	4b83      	ldr	r3, [pc, #524]	@ (800a638 <HAL_RCC_OscConfig+0x770>)
 800a42c:	681b      	ldr	r3, [r3, #0]
 800a42e:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 800a432:	2b00      	cmp	r3, #0
 800a434:	d0f0      	beq.n	800a418 <HAL_RCC_OscConfig+0x550>
      }
    }

    /* Set the new LSE configuration -----------------------------------------*/
    __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
 800a436:	687b      	ldr	r3, [r7, #4]
 800a438:	689b      	ldr	r3, [r3, #8]
 800a43a:	2b01      	cmp	r3, #1
 800a43c:	d106      	bne.n	800a44c <HAL_RCC_OscConfig+0x584>
 800a43e:	4b7d      	ldr	r3, [pc, #500]	@ (800a634 <HAL_RCC_OscConfig+0x76c>)
 800a440:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800a442:	4a7c      	ldr	r2, [pc, #496]	@ (800a634 <HAL_RCC_OscConfig+0x76c>)
 800a444:	f043 0301 	orr.w	r3, r3, #1
 800a448:	6713      	str	r3, [r2, #112]	@ 0x70
 800a44a:	e02d      	b.n	800a4a8 <HAL_RCC_OscConfig+0x5e0>
 800a44c:	687b      	ldr	r3, [r7, #4]
 800a44e:	689b      	ldr	r3, [r3, #8]
 800a450:	2b00      	cmp	r3, #0
 800a452:	d10c      	bne.n	800a46e <HAL_RCC_OscConfig+0x5a6>
 800a454:	4b77      	ldr	r3, [pc, #476]	@ (800a634 <HAL_RCC_OscConfig+0x76c>)
 800a456:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800a458:	4a76      	ldr	r2, [pc, #472]	@ (800a634 <HAL_RCC_OscConfig+0x76c>)
 800a45a:	f023 0301 	bic.w	r3, r3, #1
 800a45e:	6713      	str	r3, [r2, #112]	@ 0x70
 800a460:	4b74      	ldr	r3, [pc, #464]	@ (800a634 <HAL_RCC_OscConfig+0x76c>)
 800a462:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800a464:	4a73      	ldr	r2, [pc, #460]	@ (800a634 <HAL_RCC_OscConfig+0x76c>)
 800a466:	f023 0304 	bic.w	r3, r3, #4
 800a46a:	6713      	str	r3, [r2, #112]	@ 0x70
 800a46c:	e01c      	b.n	800a4a8 <HAL_RCC_OscConfig+0x5e0>
 800a46e:	687b      	ldr	r3, [r7, #4]
 800a470:	689b      	ldr	r3, [r3, #8]
 800a472:	2b05      	cmp	r3, #5
 800a474:	d10c      	bne.n	800a490 <HAL_RCC_OscConfig+0x5c8>
 800a476:	4b6f      	ldr	r3, [pc, #444]	@ (800a634 <HAL_RCC_OscConfig+0x76c>)
 800a478:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800a47a:	4a6e      	ldr	r2, [pc, #440]	@ (800a634 <HAL_RCC_OscConfig+0x76c>)
 800a47c:	f043 0304 	orr.w	r3, r3, #4
 800a480:	6713      	str	r3, [r2, #112]	@ 0x70
 800a482:	4b6c      	ldr	r3, [pc, #432]	@ (800a634 <HAL_RCC_OscConfig+0x76c>)
 800a484:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800a486:	4a6b      	ldr	r2, [pc, #428]	@ (800a634 <HAL_RCC_OscConfig+0x76c>)
 800a488:	f043 0301 	orr.w	r3, r3, #1
 800a48c:	6713      	str	r3, [r2, #112]	@ 0x70
 800a48e:	e00b      	b.n	800a4a8 <HAL_RCC_OscConfig+0x5e0>
 800a490:	4b68      	ldr	r3, [pc, #416]	@ (800a634 <HAL_RCC_OscConfig+0x76c>)
 800a492:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800a494:	4a67      	ldr	r2, [pc, #412]	@ (800a634 <HAL_RCC_OscConfig+0x76c>)
 800a496:	f023 0301 	bic.w	r3, r3, #1
 800a49a:	6713      	str	r3, [r2, #112]	@ 0x70
 800a49c:	4b65      	ldr	r3, [pc, #404]	@ (800a634 <HAL_RCC_OscConfig+0x76c>)
 800a49e:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800a4a0:	4a64      	ldr	r2, [pc, #400]	@ (800a634 <HAL_RCC_OscConfig+0x76c>)
 800a4a2:	f023 0304 	bic.w	r3, r3, #4
 800a4a6:	6713      	str	r3, [r2, #112]	@ 0x70
    /* Check the LSE State */
    if ((RCC_OscInitStruct->LSEState) != RCC_LSE_OFF)
 800a4a8:	687b      	ldr	r3, [r7, #4]
 800a4aa:	689b      	ldr	r3, [r3, #8]
 800a4ac:	2b00      	cmp	r3, #0
 800a4ae:	d015      	beq.n	800a4dc <HAL_RCC_OscConfig+0x614>
    {
      /* Get Start Tick*/
      tickstart = HAL_GetTick();
 800a4b0:	f7fa fec6 	bl	8005240 <HAL_GetTick>
 800a4b4:	6278      	str	r0, [r7, #36]	@ 0x24

      /* Wait till LSE is ready */
      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == 0U)
 800a4b6:	e00a      	b.n	800a4ce <HAL_RCC_OscConfig+0x606>
      {
        if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
 800a4b8:	f7fa fec2 	bl	8005240 <HAL_GetTick>
 800a4bc:	4602      	mov	r2, r0
 800a4be:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800a4c0:	1ad3      	subs	r3, r2, r3
 800a4c2:	f241 3288 	movw	r2, #5000	@ 0x1388
 800a4c6:	4293      	cmp	r3, r2
 800a4c8:	d901      	bls.n	800a4ce <HAL_RCC_OscConfig+0x606>
        {
          return HAL_TIMEOUT;
 800a4ca:	2303      	movs	r3, #3
 800a4cc:	e14e      	b.n	800a76c <HAL_RCC_OscConfig+0x8a4>
      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == 0U)
 800a4ce:	4b59      	ldr	r3, [pc, #356]	@ (800a634 <HAL_RCC_OscConfig+0x76c>)
 800a4d0:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800a4d2:	f003 0302 	and.w	r3, r3, #2
 800a4d6:	2b00      	cmp	r3, #0
 800a4d8:	d0ee      	beq.n	800a4b8 <HAL_RCC_OscConfig+0x5f0>
 800a4da:	e014      	b.n	800a506 <HAL_RCC_OscConfig+0x63e>
      }
    }
    else
    {
      /* Get Start Tick*/
      tickstart = HAL_GetTick();
 800a4dc:	f7fa feb0 	bl	8005240 <HAL_GetTick>
 800a4e0:	6278      	str	r0, [r7, #36]	@ 0x24

      /* Wait till LSE is disabled */
      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != 0U)
 800a4e2:	e00a      	b.n	800a4fa <HAL_RCC_OscConfig+0x632>
      {
        if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
 800a4e4:	f7fa feac 	bl	8005240 <HAL_GetTick>
 800a4e8:	4602      	mov	r2, r0
 800a4ea:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800a4ec:	1ad3      	subs	r3, r2, r3
 800a4ee:	f241 3288 	movw	r2, #5000	@ 0x1388
 800a4f2:	4293      	cmp	r3, r2
 800a4f4:	d901      	bls.n	800a4fa <HAL_RCC_OscConfig+0x632>
        {
          return HAL_TIMEOUT;
 800a4f6:	2303      	movs	r3, #3
 800a4f8:	e138      	b.n	800a76c <HAL_RCC_OscConfig+0x8a4>
      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != 0U)
 800a4fa:	4b4e      	ldr	r3, [pc, #312]	@ (800a634 <HAL_RCC_OscConfig+0x76c>)
 800a4fc:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800a4fe:	f003 0302 	and.w	r3, r3, #2
 800a502:	2b00      	cmp	r3, #0
 800a504:	d1ee      	bne.n	800a4e4 <HAL_RCC_OscConfig+0x61c>
    }
  }
  /*-------------------------------- PLL Configuration -----------------------*/
  /* Check the parameters */
  assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
  if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
 800a506:	687b      	ldr	r3, [r7, #4]
 800a508:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 800a50a:	2b00      	cmp	r3, #0
 800a50c:	f000 812d 	beq.w	800a76a <HAL_RCC_OscConfig+0x8a2>
  {
    /* Check if the PLL is used as system clock or not */
    if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL1)
 800a510:	4b48      	ldr	r3, [pc, #288]	@ (800a634 <HAL_RCC_OscConfig+0x76c>)
 800a512:	691b      	ldr	r3, [r3, #16]
 800a514:	f003 0338 	and.w	r3, r3, #56	@ 0x38
 800a518:	2b18      	cmp	r3, #24
 800a51a:	f000 80bd 	beq.w	800a698 <HAL_RCC_OscConfig+0x7d0>
    {
      if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
 800a51e:	687b      	ldr	r3, [r7, #4]
 800a520:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 800a522:	2b02      	cmp	r3, #2
 800a524:	f040 809e 	bne.w	800a664 <HAL_RCC_OscConfig+0x79c>
        assert_param(IS_RCC_PLLQ_VALUE(RCC_OscInitStruct->PLL.PLLQ));
        assert_param(IS_RCC_PLLR_VALUE(RCC_OscInitStruct->PLL.PLLR));
        assert_param(IS_RCC_PLLFRACN_VALUE(RCC_OscInitStruct->PLL.PLLFRACN));

        /* Disable the main PLL. */
        __HAL_RCC_PLL_DISABLE();
 800a528:	4b42      	ldr	r3, [pc, #264]	@ (800a634 <HAL_RCC_OscConfig+0x76c>)
 800a52a:	681b      	ldr	r3, [r3, #0]
 800a52c:	4a41      	ldr	r2, [pc, #260]	@ (800a634 <HAL_RCC_OscConfig+0x76c>)
 800a52e:	f023 7380 	bic.w	r3, r3, #16777216	@ 0x1000000
 800a532:	6013      	str	r3, [r2, #0]

        /* Get Start Tick*/
        tickstart = HAL_GetTick();
 800a534:	f7fa fe84 	bl	8005240 <HAL_GetTick>
 800a538:	6278      	str	r0, [r7, #36]	@ 0x24

        /* Wait till PLL is disabled */
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != 0U)
 800a53a:	e008      	b.n	800a54e <HAL_RCC_OscConfig+0x686>
        {
          if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
 800a53c:	f7fa fe80 	bl	8005240 <HAL_GetTick>
 800a540:	4602      	mov	r2, r0
 800a542:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800a544:	1ad3      	subs	r3, r2, r3
 800a546:	2b02      	cmp	r3, #2
 800a548:	d901      	bls.n	800a54e <HAL_RCC_OscConfig+0x686>
          {
            return HAL_TIMEOUT;
 800a54a:	2303      	movs	r3, #3
 800a54c:	e10e      	b.n	800a76c <HAL_RCC_OscConfig+0x8a4>
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != 0U)
 800a54e:	4b39      	ldr	r3, [pc, #228]	@ (800a634 <HAL_RCC_OscConfig+0x76c>)
 800a550:	681b      	ldr	r3, [r3, #0]
 800a552:	f003 7300 	and.w	r3, r3, #33554432	@ 0x2000000
 800a556:	2b00      	cmp	r3, #0
 800a558:	d1f0      	bne.n	800a53c <HAL_RCC_OscConfig+0x674>
          }
        }

        /* Configure the main PLL clock source, multiplication and division factors. */
        __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
 800a55a:	4b36      	ldr	r3, [pc, #216]	@ (800a634 <HAL_RCC_OscConfig+0x76c>)
 800a55c:	6a9a      	ldr	r2, [r3, #40]	@ 0x28
 800a55e:	4b37      	ldr	r3, [pc, #220]	@ (800a63c <HAL_RCC_OscConfig+0x774>)
 800a560:	4013      	ands	r3, r2
 800a562:	687a      	ldr	r2, [r7, #4]
 800a564:	6a91      	ldr	r1, [r2, #40]	@ 0x28
 800a566:	687a      	ldr	r2, [r7, #4]
 800a568:	6ad2      	ldr	r2, [r2, #44]	@ 0x2c
 800a56a:	0112      	lsls	r2, r2, #4
 800a56c:	430a      	orrs	r2, r1
 800a56e:	4931      	ldr	r1, [pc, #196]	@ (800a634 <HAL_RCC_OscConfig+0x76c>)
 800a570:	4313      	orrs	r3, r2
 800a572:	628b      	str	r3, [r1, #40]	@ 0x28
 800a574:	687b      	ldr	r3, [r7, #4]
 800a576:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 800a578:	3b01      	subs	r3, #1
 800a57a:	f3c3 0208 	ubfx	r2, r3, #0, #9
 800a57e:	687b      	ldr	r3, [r7, #4]
 800a580:	6b5b      	ldr	r3, [r3, #52]	@ 0x34
 800a582:	3b01      	subs	r3, #1
 800a584:	025b      	lsls	r3, r3, #9
 800a586:	b29b      	uxth	r3, r3
 800a588:	431a      	orrs	r2, r3
 800a58a:	687b      	ldr	r3, [r7, #4]
 800a58c:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 800a58e:	3b01      	subs	r3, #1
 800a590:	041b      	lsls	r3, r3, #16
 800a592:	f403 03fe 	and.w	r3, r3, #8323072	@ 0x7f0000
 800a596:	431a      	orrs	r2, r3
 800a598:	687b      	ldr	r3, [r7, #4]
 800a59a:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 800a59c:	3b01      	subs	r3, #1
 800a59e:	061b      	lsls	r3, r3, #24
 800a5a0:	f003 43fe 	and.w	r3, r3, #2130706432	@ 0x7f000000
 800a5a4:	4923      	ldr	r1, [pc, #140]	@ (800a634 <HAL_RCC_OscConfig+0x76c>)
 800a5a6:	4313      	orrs	r3, r2
 800a5a8:	630b      	str	r3, [r1, #48]	@ 0x30
                             RCC_OscInitStruct->PLL.PLLP,
                             RCC_OscInitStruct->PLL.PLLQ,
                             RCC_OscInitStruct->PLL.PLLR);

        /* Disable PLLFRACN . */
        __HAL_RCC_PLLFRACN_DISABLE();
 800a5aa:	4b22      	ldr	r3, [pc, #136]	@ (800a634 <HAL_RCC_OscConfig+0x76c>)
 800a5ac:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800a5ae:	4a21      	ldr	r2, [pc, #132]	@ (800a634 <HAL_RCC_OscConfig+0x76c>)
 800a5b0:	f023 0301 	bic.w	r3, r3, #1
 800a5b4:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* Configure PLL PLL1FRACN */
        __HAL_RCC_PLLFRACN_CONFIG(RCC_OscInitStruct->PLL.PLLFRACN);
 800a5b6:	4b1f      	ldr	r3, [pc, #124]	@ (800a634 <HAL_RCC_OscConfig+0x76c>)
 800a5b8:	6b5a      	ldr	r2, [r3, #52]	@ 0x34
 800a5ba:	4b21      	ldr	r3, [pc, #132]	@ (800a640 <HAL_RCC_OscConfig+0x778>)
 800a5bc:	4013      	ands	r3, r2
 800a5be:	687a      	ldr	r2, [r7, #4]
 800a5c0:	6c92      	ldr	r2, [r2, #72]	@ 0x48
 800a5c2:	00d2      	lsls	r2, r2, #3
 800a5c4:	491b      	ldr	r1, [pc, #108]	@ (800a634 <HAL_RCC_OscConfig+0x76c>)
 800a5c6:	4313      	orrs	r3, r2
 800a5c8:	634b      	str	r3, [r1, #52]	@ 0x34

        /* Select PLL1 input reference frequency range: VCI */
        __HAL_RCC_PLL_VCIRANGE(RCC_OscInitStruct->PLL.PLLRGE) ;
 800a5ca:	4b1a      	ldr	r3, [pc, #104]	@ (800a634 <HAL_RCC_OscConfig+0x76c>)
 800a5cc:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800a5ce:	f023 020c 	bic.w	r2, r3, #12
 800a5d2:	687b      	ldr	r3, [r7, #4]
 800a5d4:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 800a5d6:	4917      	ldr	r1, [pc, #92]	@ (800a634 <HAL_RCC_OscConfig+0x76c>)
 800a5d8:	4313      	orrs	r3, r2
 800a5da:	62cb      	str	r3, [r1, #44]	@ 0x2c

        /* Select PLL1 output frequency range : VCO */
        __HAL_RCC_PLL_VCORANGE(RCC_OscInitStruct->PLL.PLLVCOSEL) ;
 800a5dc:	4b15      	ldr	r3, [pc, #84]	@ (800a634 <HAL_RCC_OscConfig+0x76c>)
 800a5de:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800a5e0:	f023 0202 	bic.w	r2, r3, #2
 800a5e4:	687b      	ldr	r3, [r7, #4]
 800a5e6:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 800a5e8:	4912      	ldr	r1, [pc, #72]	@ (800a634 <HAL_RCC_OscConfig+0x76c>)
 800a5ea:	4313      	orrs	r3, r2
 800a5ec:	62cb      	str	r3, [r1, #44]	@ 0x2c

        /* Enable PLL System Clock output. */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVP);
 800a5ee:	4b11      	ldr	r3, [pc, #68]	@ (800a634 <HAL_RCC_OscConfig+0x76c>)
 800a5f0:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800a5f2:	4a10      	ldr	r2, [pc, #64]	@ (800a634 <HAL_RCC_OscConfig+0x76c>)
 800a5f4:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
 800a5f8:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* Enable PLL1Q Clock output. */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
 800a5fa:	4b0e      	ldr	r3, [pc, #56]	@ (800a634 <HAL_RCC_OscConfig+0x76c>)
 800a5fc:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800a5fe:	4a0d      	ldr	r2, [pc, #52]	@ (800a634 <HAL_RCC_OscConfig+0x76c>)
 800a600:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800a604:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* Enable PLL1R  Clock output. */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVR);
 800a606:	4b0b      	ldr	r3, [pc, #44]	@ (800a634 <HAL_RCC_OscConfig+0x76c>)
 800a608:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800a60a:	4a0a      	ldr	r2, [pc, #40]	@ (800a634 <HAL_RCC_OscConfig+0x76c>)
 800a60c:	f443 2380 	orr.w	r3, r3, #262144	@ 0x40000
 800a610:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* Enable PLL1FRACN . */
        __HAL_RCC_PLLFRACN_ENABLE();
 800a612:	4b08      	ldr	r3, [pc, #32]	@ (800a634 <HAL_RCC_OscConfig+0x76c>)
 800a614:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800a616:	4a07      	ldr	r2, [pc, #28]	@ (800a634 <HAL_RCC_OscConfig+0x76c>)
 800a618:	f043 0301 	orr.w	r3, r3, #1
 800a61c:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* Enable the main PLL. */
        __HAL_RCC_PLL_ENABLE();
 800a61e:	4b05      	ldr	r3, [pc, #20]	@ (800a634 <HAL_RCC_OscConfig+0x76c>)
 800a620:	681b      	ldr	r3, [r3, #0]
 800a622:	4a04      	ldr	r2, [pc, #16]	@ (800a634 <HAL_RCC_OscConfig+0x76c>)
 800a624:	f043 7380 	orr.w	r3, r3, #16777216	@ 0x1000000
 800a628:	6013      	str	r3, [r2, #0]

        /* Get Start Tick*/
        tickstart = HAL_GetTick();
 800a62a:	f7fa fe09 	bl	8005240 <HAL_GetTick>
 800a62e:	6278      	str	r0, [r7, #36]	@ 0x24

        /* Wait till PLL is ready */
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == 0U)
 800a630:	e011      	b.n	800a656 <HAL_RCC_OscConfig+0x78e>
 800a632:	bf00      	nop
 800a634:	58024400 	.word	0x58024400
 800a638:	58024800 	.word	0x58024800
 800a63c:	fffffc0c 	.word	0xfffffc0c
 800a640:	ffff0007 	.word	0xffff0007
        {
          if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
 800a644:	f7fa fdfc 	bl	8005240 <HAL_GetTick>
 800a648:	4602      	mov	r2, r0
 800a64a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800a64c:	1ad3      	subs	r3, r2, r3
 800a64e:	2b02      	cmp	r3, #2
 800a650:	d901      	bls.n	800a656 <HAL_RCC_OscConfig+0x78e>
          {
            return HAL_TIMEOUT;
 800a652:	2303      	movs	r3, #3
 800a654:	e08a      	b.n	800a76c <HAL_RCC_OscConfig+0x8a4>
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == 0U)
 800a656:	4b47      	ldr	r3, [pc, #284]	@ (800a774 <HAL_RCC_OscConfig+0x8ac>)
 800a658:	681b      	ldr	r3, [r3, #0]
 800a65a:	f003 7300 	and.w	r3, r3, #33554432	@ 0x2000000
 800a65e:	2b00      	cmp	r3, #0
 800a660:	d0f0      	beq.n	800a644 <HAL_RCC_OscConfig+0x77c>
 800a662:	e082      	b.n	800a76a <HAL_RCC_OscConfig+0x8a2>
        }
      }
      else
      {
        /* Disable the main PLL. */
        __HAL_RCC_PLL_DISABLE();
 800a664:	4b43      	ldr	r3, [pc, #268]	@ (800a774 <HAL_RCC_OscConfig+0x8ac>)
 800a666:	681b      	ldr	r3, [r3, #0]
 800a668:	4a42      	ldr	r2, [pc, #264]	@ (800a774 <HAL_RCC_OscConfig+0x8ac>)
 800a66a:	f023 7380 	bic.w	r3, r3, #16777216	@ 0x1000000
 800a66e:	6013      	str	r3, [r2, #0]

        /* Get Start Tick*/
        tickstart = HAL_GetTick();
 800a670:	f7fa fde6 	bl	8005240 <HAL_GetTick>
 800a674:	6278      	str	r0, [r7, #36]	@ 0x24

        /* Wait till PLL is disabled */
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != 0U)
 800a676:	e008      	b.n	800a68a <HAL_RCC_OscConfig+0x7c2>
        {
          if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
 800a678:	f7fa fde2 	bl	8005240 <HAL_GetTick>
 800a67c:	4602      	mov	r2, r0
 800a67e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800a680:	1ad3      	subs	r3, r2, r3
 800a682:	2b02      	cmp	r3, #2
 800a684:	d901      	bls.n	800a68a <HAL_RCC_OscConfig+0x7c2>
          {
            return HAL_TIMEOUT;
 800a686:	2303      	movs	r3, #3
 800a688:	e070      	b.n	800a76c <HAL_RCC_OscConfig+0x8a4>
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != 0U)
 800a68a:	4b3a      	ldr	r3, [pc, #232]	@ (800a774 <HAL_RCC_OscConfig+0x8ac>)
 800a68c:	681b      	ldr	r3, [r3, #0]
 800a68e:	f003 7300 	and.w	r3, r3, #33554432	@ 0x2000000
 800a692:	2b00      	cmp	r3, #0
 800a694:	d1f0      	bne.n	800a678 <HAL_RCC_OscConfig+0x7b0>
 800a696:	e068      	b.n	800a76a <HAL_RCC_OscConfig+0x8a2>
      }
    }
    else
    {
      /* Do not return HAL_ERROR if request repeats the current configuration */
      temp1_pllckcfg = RCC->PLLCKSELR;
 800a698:	4b36      	ldr	r3, [pc, #216]	@ (800a774 <HAL_RCC_OscConfig+0x8ac>)
 800a69a:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800a69c:	613b      	str	r3, [r7, #16]
      temp2_pllckcfg = RCC->PLL1DIVR;
 800a69e:	4b35      	ldr	r3, [pc, #212]	@ (800a774 <HAL_RCC_OscConfig+0x8ac>)
 800a6a0:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 800a6a2:	60fb      	str	r3, [r7, #12]
      if (((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) ||
 800a6a4:	687b      	ldr	r3, [r7, #4]
 800a6a6:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 800a6a8:	2b01      	cmp	r3, #1
 800a6aa:	d031      	beq.n	800a710 <HAL_RCC_OscConfig+0x848>
          (READ_BIT(temp1_pllckcfg, RCC_PLLCKSELR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
 800a6ac:	693b      	ldr	r3, [r7, #16]
 800a6ae:	f003 0203 	and.w	r2, r3, #3
 800a6b2:	687b      	ldr	r3, [r7, #4]
 800a6b4:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
      if (((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) ||
 800a6b6:	429a      	cmp	r2, r3
 800a6b8:	d12a      	bne.n	800a710 <HAL_RCC_OscConfig+0x848>
          ((READ_BIT(temp1_pllckcfg, RCC_PLLCKSELR_DIVM1) >> RCC_PLLCKSELR_DIVM1_Pos) != RCC_OscInitStruct->PLL.PLLM) ||
 800a6ba:	693b      	ldr	r3, [r7, #16]
 800a6bc:	091b      	lsrs	r3, r3, #4
 800a6be:	f003 023f 	and.w	r2, r3, #63	@ 0x3f
 800a6c2:	687b      	ldr	r3, [r7, #4]
 800a6c4:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
          (READ_BIT(temp1_pllckcfg, RCC_PLLCKSELR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
 800a6c6:	429a      	cmp	r2, r3
 800a6c8:	d122      	bne.n	800a710 <HAL_RCC_OscConfig+0x848>
          (READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_N1) != (RCC_OscInitStruct->PLL.PLLN - 1U)) ||
 800a6ca:	68fb      	ldr	r3, [r7, #12]
 800a6cc:	f3c3 0208 	ubfx	r2, r3, #0, #9
 800a6d0:	687b      	ldr	r3, [r7, #4]
 800a6d2:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 800a6d4:	3b01      	subs	r3, #1
          ((READ_BIT(temp1_pllckcfg, RCC_PLLCKSELR_DIVM1) >> RCC_PLLCKSELR_DIVM1_Pos) != RCC_OscInitStruct->PLL.PLLM) ||
 800a6d6:	429a      	cmp	r2, r3
 800a6d8:	d11a      	bne.n	800a710 <HAL_RCC_OscConfig+0x848>
          ((READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_P1) >> RCC_PLL1DIVR_P1_Pos) != (RCC_OscInitStruct->PLL.PLLP - 1U)) ||
 800a6da:	68fb      	ldr	r3, [r7, #12]
 800a6dc:	0a5b      	lsrs	r3, r3, #9
 800a6de:	f003 027f 	and.w	r2, r3, #127	@ 0x7f
 800a6e2:	687b      	ldr	r3, [r7, #4]
 800a6e4:	6b5b      	ldr	r3, [r3, #52]	@ 0x34
 800a6e6:	3b01      	subs	r3, #1
          (READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_N1) != (RCC_OscInitStruct->PLL.PLLN - 1U)) ||
 800a6e8:	429a      	cmp	r2, r3
 800a6ea:	d111      	bne.n	800a710 <HAL_RCC_OscConfig+0x848>
          ((READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_Q1) >> RCC_PLL1DIVR_Q1_Pos) != (RCC_OscInitStruct->PLL.PLLQ - 1U)) ||
 800a6ec:	68fb      	ldr	r3, [r7, #12]
 800a6ee:	0c1b      	lsrs	r3, r3, #16
 800a6f0:	f003 027f 	and.w	r2, r3, #127	@ 0x7f
 800a6f4:	687b      	ldr	r3, [r7, #4]
 800a6f6:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 800a6f8:	3b01      	subs	r3, #1
          ((READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_P1) >> RCC_PLL1DIVR_P1_Pos) != (RCC_OscInitStruct->PLL.PLLP - 1U)) ||
 800a6fa:	429a      	cmp	r2, r3
 800a6fc:	d108      	bne.n	800a710 <HAL_RCC_OscConfig+0x848>
          ((READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_R1) >> RCC_PLL1DIVR_R1_Pos) != (RCC_OscInitStruct->PLL.PLLR - 1U)))
 800a6fe:	68fb      	ldr	r3, [r7, #12]
 800a700:	0e1b      	lsrs	r3, r3, #24
 800a702:	f003 027f 	and.w	r2, r3, #127	@ 0x7f
 800a706:	687b      	ldr	r3, [r7, #4]
 800a708:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 800a70a:	3b01      	subs	r3, #1
          ((READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_Q1) >> RCC_PLL1DIVR_Q1_Pos) != (RCC_OscInitStruct->PLL.PLLQ - 1U)) ||
 800a70c:	429a      	cmp	r2, r3
 800a70e:	d001      	beq.n	800a714 <HAL_RCC_OscConfig+0x84c>
      {
        return HAL_ERROR;
 800a710:	2301      	movs	r3, #1
 800a712:	e02b      	b.n	800a76c <HAL_RCC_OscConfig+0x8a4>
      }
      else
      {
        /* Check if only fractional part needs to be updated  */
        temp1_pllckcfg = ((RCC->PLL1FRACR & RCC_PLL1FRACR_FRACN1) >> RCC_PLL1FRACR_FRACN1_Pos);
 800a714:	4b17      	ldr	r3, [pc, #92]	@ (800a774 <HAL_RCC_OscConfig+0x8ac>)
 800a716:	6b5b      	ldr	r3, [r3, #52]	@ 0x34
 800a718:	08db      	lsrs	r3, r3, #3
 800a71a:	f3c3 030c 	ubfx	r3, r3, #0, #13
 800a71e:	613b      	str	r3, [r7, #16]
        if (RCC_OscInitStruct->PLL.PLLFRACN != temp1_pllckcfg)
 800a720:	687b      	ldr	r3, [r7, #4]
 800a722:	6c9b      	ldr	r3, [r3, #72]	@ 0x48
 800a724:	693a      	ldr	r2, [r7, #16]
 800a726:	429a      	cmp	r2, r3
 800a728:	d01f      	beq.n	800a76a <HAL_RCC_OscConfig+0x8a2>
        {
          assert_param(IS_RCC_PLLFRACN_VALUE(RCC_OscInitStruct->PLL.PLLFRACN));
          /* Disable PLL1FRACEN */
          __HAL_RCC_PLLFRACN_DISABLE();
 800a72a:	4b12      	ldr	r3, [pc, #72]	@ (800a774 <HAL_RCC_OscConfig+0x8ac>)
 800a72c:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800a72e:	4a11      	ldr	r2, [pc, #68]	@ (800a774 <HAL_RCC_OscConfig+0x8ac>)
 800a730:	f023 0301 	bic.w	r3, r3, #1
 800a734:	62d3      	str	r3, [r2, #44]	@ 0x2c
          /* Get Start Tick*/
          tickstart = HAL_GetTick();
 800a736:	f7fa fd83 	bl	8005240 <HAL_GetTick>
 800a73a:	6278      	str	r0, [r7, #36]	@ 0x24
          /* Wait at least 2 CK_REF (PLL input source divided by M) period to make sure next latched value will be taken into account. */
          while ((HAL_GetTick() - tickstart) < PLL_FRAC_TIMEOUT_VALUE)
 800a73c:	bf00      	nop
 800a73e:	f7fa fd7f 	bl	8005240 <HAL_GetTick>
 800a742:	4602      	mov	r2, r0
 800a744:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800a746:	4293      	cmp	r3, r2
 800a748:	d0f9      	beq.n	800a73e <HAL_RCC_OscConfig+0x876>
          {
          }
          /* Configure PLL1 PLL1FRACN */
          __HAL_RCC_PLLFRACN_CONFIG(RCC_OscInitStruct->PLL.PLLFRACN);
 800a74a:	4b0a      	ldr	r3, [pc, #40]	@ (800a774 <HAL_RCC_OscConfig+0x8ac>)
 800a74c:	6b5a      	ldr	r2, [r3, #52]	@ 0x34
 800a74e:	4b0a      	ldr	r3, [pc, #40]	@ (800a778 <HAL_RCC_OscConfig+0x8b0>)
 800a750:	4013      	ands	r3, r2
 800a752:	687a      	ldr	r2, [r7, #4]
 800a754:	6c92      	ldr	r2, [r2, #72]	@ 0x48
 800a756:	00d2      	lsls	r2, r2, #3
 800a758:	4906      	ldr	r1, [pc, #24]	@ (800a774 <HAL_RCC_OscConfig+0x8ac>)
 800a75a:	4313      	orrs	r3, r2
 800a75c:	634b      	str	r3, [r1, #52]	@ 0x34
          /* Enable PLL1FRACEN to latch new value. */
          __HAL_RCC_PLLFRACN_ENABLE();
 800a75e:	4b05      	ldr	r3, [pc, #20]	@ (800a774 <HAL_RCC_OscConfig+0x8ac>)
 800a760:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800a762:	4a04      	ldr	r2, [pc, #16]	@ (800a774 <HAL_RCC_OscConfig+0x8ac>)
 800a764:	f043 0301 	orr.w	r3, r3, #1
 800a768:	62d3      	str	r3, [r2, #44]	@ 0x2c
        }
      }
    }
  }
  return HAL_OK;
 800a76a:	2300      	movs	r3, #0
}
 800a76c:	4618      	mov	r0, r3
 800a76e:	3730      	adds	r7, #48	@ 0x30
 800a770:	46bd      	mov	sp, r7
 800a772:	bd80      	pop	{r7, pc}
 800a774:	58024400 	.word	0x58024400
 800a778:	ffff0007 	.word	0xffff0007

0800a77c <HAL_RCC_ClockConfig>:
  *         D1CPRE[3:0] bits to ensure that  Domain1 core clock not exceed the maximum allowed frequency
  *         (for more details refer to section above "Initialization/de-initialization functions")
  * @retval None
  */
HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef  *RCC_ClkInitStruct, uint32_t FLatency)
{
 800a77c:	b580      	push	{r7, lr}
 800a77e:	b086      	sub	sp, #24
 800a780:	af00      	add	r7, sp, #0
 800a782:	6078      	str	r0, [r7, #4]
 800a784:	6039      	str	r1, [r7, #0]
  HAL_StatusTypeDef halstatus;
  uint32_t tickstart;
  uint32_t common_system_clock;

  /* Check Null pointer */
  if (RCC_ClkInitStruct == NULL)
 800a786:	687b      	ldr	r3, [r7, #4]
 800a788:	2b00      	cmp	r3, #0
 800a78a:	d101      	bne.n	800a790 <HAL_RCC_ClockConfig+0x14>
  {
    return HAL_ERROR;
 800a78c:	2301      	movs	r3, #1
 800a78e:	e19c      	b.n	800aaca <HAL_RCC_ClockConfig+0x34e>
  /* To correctly read data from FLASH memory, the number of wait states (LATENCY)
    must be correctly programmed according to the frequency of the CPU clock
    (HCLK) and the supply voltage of the device. */

  /* Increasing the CPU frequency */
  if (FLatency > __HAL_FLASH_GET_LATENCY())
 800a790:	4b8a      	ldr	r3, [pc, #552]	@ (800a9bc <HAL_RCC_ClockConfig+0x240>)
 800a792:	681b      	ldr	r3, [r3, #0]
 800a794:	f003 030f 	and.w	r3, r3, #15
 800a798:	683a      	ldr	r2, [r7, #0]
 800a79a:	429a      	cmp	r2, r3
 800a79c:	d910      	bls.n	800a7c0 <HAL_RCC_ClockConfig+0x44>
  {
    /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
    __HAL_FLASH_SET_LATENCY(FLatency);
 800a79e:	4b87      	ldr	r3, [pc, #540]	@ (800a9bc <HAL_RCC_ClockConfig+0x240>)
 800a7a0:	681b      	ldr	r3, [r3, #0]
 800a7a2:	f023 020f 	bic.w	r2, r3, #15
 800a7a6:	4985      	ldr	r1, [pc, #532]	@ (800a9bc <HAL_RCC_ClockConfig+0x240>)
 800a7a8:	683b      	ldr	r3, [r7, #0]
 800a7aa:	4313      	orrs	r3, r2
 800a7ac:	600b      	str	r3, [r1, #0]

    /* Check that the new number of wait states is taken into account to access the Flash
    memory by reading the FLASH_ACR register */
    if (__HAL_FLASH_GET_LATENCY() != FLatency)
 800a7ae:	4b83      	ldr	r3, [pc, #524]	@ (800a9bc <HAL_RCC_ClockConfig+0x240>)
 800a7b0:	681b      	ldr	r3, [r3, #0]
 800a7b2:	f003 030f 	and.w	r3, r3, #15
 800a7b6:	683a      	ldr	r2, [r7, #0]
 800a7b8:	429a      	cmp	r2, r3
 800a7ba:	d001      	beq.n	800a7c0 <HAL_RCC_ClockConfig+0x44>
    {
      return HAL_ERROR;
 800a7bc:	2301      	movs	r3, #1
 800a7be:	e184      	b.n	800aaca <HAL_RCC_ClockConfig+0x34e>

  }

  /* Increasing the BUS frequency divider */
  /*-------------------------- D1PCLK1/CDPCLK1 Configuration ---------------------------*/
  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_D1PCLK1) == RCC_CLOCKTYPE_D1PCLK1)
 800a7c0:	687b      	ldr	r3, [r7, #4]
 800a7c2:	681b      	ldr	r3, [r3, #0]
 800a7c4:	f003 0304 	and.w	r3, r3, #4
 800a7c8:	2b00      	cmp	r3, #0
 800a7ca:	d010      	beq.n	800a7ee <HAL_RCC_ClockConfig+0x72>
  {
#if defined (RCC_D1CFGR_D1PPRE)
    if ((RCC_ClkInitStruct->APB3CLKDivider) > (RCC->D1CFGR & RCC_D1CFGR_D1PPRE))
 800a7cc:	687b      	ldr	r3, [r7, #4]
 800a7ce:	691a      	ldr	r2, [r3, #16]
 800a7d0:	4b7b      	ldr	r3, [pc, #492]	@ (800a9c0 <HAL_RCC_ClockConfig+0x244>)
 800a7d2:	699b      	ldr	r3, [r3, #24]
 800a7d4:	f003 0370 	and.w	r3, r3, #112	@ 0x70
 800a7d8:	429a      	cmp	r2, r3
 800a7da:	d908      	bls.n	800a7ee <HAL_RCC_ClockConfig+0x72>
    {
      assert_param(IS_RCC_D1PCLK1(RCC_ClkInitStruct->APB3CLKDivider));
      MODIFY_REG(RCC->D1CFGR, RCC_D1CFGR_D1PPRE, RCC_ClkInitStruct->APB3CLKDivider);
 800a7dc:	4b78      	ldr	r3, [pc, #480]	@ (800a9c0 <HAL_RCC_ClockConfig+0x244>)
 800a7de:	699b      	ldr	r3, [r3, #24]
 800a7e0:	f023 0270 	bic.w	r2, r3, #112	@ 0x70
 800a7e4:	687b      	ldr	r3, [r7, #4]
 800a7e6:	691b      	ldr	r3, [r3, #16]
 800a7e8:	4975      	ldr	r1, [pc, #468]	@ (800a9c0 <HAL_RCC_ClockConfig+0x244>)
 800a7ea:	4313      	orrs	r3, r2
 800a7ec:	618b      	str	r3, [r1, #24]
    }
#endif
  }

  /*-------------------------- PCLK1 Configuration ---------------------------*/
  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
 800a7ee:	687b      	ldr	r3, [r7, #4]
 800a7f0:	681b      	ldr	r3, [r3, #0]
 800a7f2:	f003 0308 	and.w	r3, r3, #8
 800a7f6:	2b00      	cmp	r3, #0
 800a7f8:	d010      	beq.n	800a81c <HAL_RCC_ClockConfig+0xa0>
  {
#if defined (RCC_D2CFGR_D2PPRE1)
    if ((RCC_ClkInitStruct->APB1CLKDivider) > (RCC->D2CFGR & RCC_D2CFGR_D2PPRE1))
 800a7fa:	687b      	ldr	r3, [r7, #4]
 800a7fc:	695a      	ldr	r2, [r3, #20]
 800a7fe:	4b70      	ldr	r3, [pc, #448]	@ (800a9c0 <HAL_RCC_ClockConfig+0x244>)
 800a800:	69db      	ldr	r3, [r3, #28]
 800a802:	f003 0370 	and.w	r3, r3, #112	@ 0x70
 800a806:	429a      	cmp	r2, r3
 800a808:	d908      	bls.n	800a81c <HAL_RCC_ClockConfig+0xa0>
    {
      assert_param(IS_RCC_PCLK1(RCC_ClkInitStruct->APB1CLKDivider));
      MODIFY_REG(RCC->D2CFGR, RCC_D2CFGR_D2PPRE1, (RCC_ClkInitStruct->APB1CLKDivider));
 800a80a:	4b6d      	ldr	r3, [pc, #436]	@ (800a9c0 <HAL_RCC_ClockConfig+0x244>)
 800a80c:	69db      	ldr	r3, [r3, #28]
 800a80e:	f023 0270 	bic.w	r2, r3, #112	@ 0x70
 800a812:	687b      	ldr	r3, [r7, #4]
 800a814:	695b      	ldr	r3, [r3, #20]
 800a816:	496a      	ldr	r1, [pc, #424]	@ (800a9c0 <HAL_RCC_ClockConfig+0x244>)
 800a818:	4313      	orrs	r3, r2
 800a81a:	61cb      	str	r3, [r1, #28]
      MODIFY_REG(RCC->CDCFGR2, RCC_CDCFGR2_CDPPRE1, (RCC_ClkInitStruct->APB1CLKDivider));
    }
#endif
  }
  /*-------------------------- PCLK2 Configuration ---------------------------*/
  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
 800a81c:	687b      	ldr	r3, [r7, #4]
 800a81e:	681b      	ldr	r3, [r3, #0]
 800a820:	f003 0310 	and.w	r3, r3, #16
 800a824:	2b00      	cmp	r3, #0
 800a826:	d010      	beq.n	800a84a <HAL_RCC_ClockConfig+0xce>
  {
#if defined(RCC_D2CFGR_D2PPRE2)
    if ((RCC_ClkInitStruct->APB2CLKDivider) > (RCC->D2CFGR & RCC_D2CFGR_D2PPRE2))
 800a828:	687b      	ldr	r3, [r7, #4]
 800a82a:	699a      	ldr	r2, [r3, #24]
 800a82c:	4b64      	ldr	r3, [pc, #400]	@ (800a9c0 <HAL_RCC_ClockConfig+0x244>)
 800a82e:	69db      	ldr	r3, [r3, #28]
 800a830:	f403 63e0 	and.w	r3, r3, #1792	@ 0x700
 800a834:	429a      	cmp	r2, r3
 800a836:	d908      	bls.n	800a84a <HAL_RCC_ClockConfig+0xce>
    {
      assert_param(IS_RCC_PCLK2(RCC_ClkInitStruct->APB2CLKDivider));
      MODIFY_REG(RCC->D2CFGR, RCC_D2CFGR_D2PPRE2, (RCC_ClkInitStruct->APB2CLKDivider));
 800a838:	4b61      	ldr	r3, [pc, #388]	@ (800a9c0 <HAL_RCC_ClockConfig+0x244>)
 800a83a:	69db      	ldr	r3, [r3, #28]
 800a83c:	f423 62e0 	bic.w	r2, r3, #1792	@ 0x700
 800a840:	687b      	ldr	r3, [r7, #4]
 800a842:	699b      	ldr	r3, [r3, #24]
 800a844:	495e      	ldr	r1, [pc, #376]	@ (800a9c0 <HAL_RCC_ClockConfig+0x244>)
 800a846:	4313      	orrs	r3, r2
 800a848:	61cb      	str	r3, [r1, #28]
    }
#endif
  }

  /*-------------------------- D3PCLK1 Configuration ---------------------------*/
  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_D3PCLK1) == RCC_CLOCKTYPE_D3PCLK1)
 800a84a:	687b      	ldr	r3, [r7, #4]
 800a84c:	681b      	ldr	r3, [r3, #0]
 800a84e:	f003 0320 	and.w	r3, r3, #32
 800a852:	2b00      	cmp	r3, #0
 800a854:	d010      	beq.n	800a878 <HAL_RCC_ClockConfig+0xfc>
  {
#if defined(RCC_D3CFGR_D3PPRE)
    if ((RCC_ClkInitStruct->APB4CLKDivider) > (RCC->D3CFGR & RCC_D3CFGR_D3PPRE))
 800a856:	687b      	ldr	r3, [r7, #4]
 800a858:	69da      	ldr	r2, [r3, #28]
 800a85a:	4b59      	ldr	r3, [pc, #356]	@ (800a9c0 <HAL_RCC_ClockConfig+0x244>)
 800a85c:	6a1b      	ldr	r3, [r3, #32]
 800a85e:	f003 0370 	and.w	r3, r3, #112	@ 0x70
 800a862:	429a      	cmp	r2, r3
 800a864:	d908      	bls.n	800a878 <HAL_RCC_ClockConfig+0xfc>
    {
      assert_param(IS_RCC_D3PCLK1(RCC_ClkInitStruct->APB4CLKDivider));
      MODIFY_REG(RCC->D3CFGR, RCC_D3CFGR_D3PPRE, (RCC_ClkInitStruct->APB4CLKDivider));
 800a866:	4b56      	ldr	r3, [pc, #344]	@ (800a9c0 <HAL_RCC_ClockConfig+0x244>)
 800a868:	6a1b      	ldr	r3, [r3, #32]
 800a86a:	f023 0270 	bic.w	r2, r3, #112	@ 0x70
 800a86e:	687b      	ldr	r3, [r7, #4]
 800a870:	69db      	ldr	r3, [r3, #28]
 800a872:	4953      	ldr	r1, [pc, #332]	@ (800a9c0 <HAL_RCC_ClockConfig+0x244>)
 800a874:	4313      	orrs	r3, r2
 800a876:	620b      	str	r3, [r1, #32]
    }
#endif
  }

  /*-------------------------- HCLK Configuration --------------------------*/
  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
 800a878:	687b      	ldr	r3, [r7, #4]
 800a87a:	681b      	ldr	r3, [r3, #0]
 800a87c:	f003 0302 	and.w	r3, r3, #2
 800a880:	2b00      	cmp	r3, #0
 800a882:	d010      	beq.n	800a8a6 <HAL_RCC_ClockConfig+0x12a>
  {
#if defined (RCC_D1CFGR_HPRE)
    if ((RCC_ClkInitStruct->AHBCLKDivider) > (RCC->D1CFGR & RCC_D1CFGR_HPRE))
 800a884:	687b      	ldr	r3, [r7, #4]
 800a886:	68da      	ldr	r2, [r3, #12]
 800a888:	4b4d      	ldr	r3, [pc, #308]	@ (800a9c0 <HAL_RCC_ClockConfig+0x244>)
 800a88a:	699b      	ldr	r3, [r3, #24]
 800a88c:	f003 030f 	and.w	r3, r3, #15
 800a890:	429a      	cmp	r2, r3
 800a892:	d908      	bls.n	800a8a6 <HAL_RCC_ClockConfig+0x12a>
    {
      /* Set the new HCLK clock divider */
      assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
      MODIFY_REG(RCC->D1CFGR, RCC_D1CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
 800a894:	4b4a      	ldr	r3, [pc, #296]	@ (800a9c0 <HAL_RCC_ClockConfig+0x244>)
 800a896:	699b      	ldr	r3, [r3, #24]
 800a898:	f023 020f 	bic.w	r2, r3, #15
 800a89c:	687b      	ldr	r3, [r7, #4]
 800a89e:	68db      	ldr	r3, [r3, #12]
 800a8a0:	4947      	ldr	r1, [pc, #284]	@ (800a9c0 <HAL_RCC_ClockConfig+0x244>)
 800a8a2:	4313      	orrs	r3, r2
 800a8a4:	618b      	str	r3, [r1, #24]
    }
#endif
  }

  /*------------------------- SYSCLK Configuration -------------------------*/
  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
 800a8a6:	687b      	ldr	r3, [r7, #4]
 800a8a8:	681b      	ldr	r3, [r3, #0]
 800a8aa:	f003 0301 	and.w	r3, r3, #1
 800a8ae:	2b00      	cmp	r3, #0
 800a8b0:	d055      	beq.n	800a95e <HAL_RCC_ClockConfig+0x1e2>
  {
    assert_param(IS_RCC_SYSCLK(RCC_ClkInitStruct->SYSCLKDivider));
    assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
#if defined(RCC_D1CFGR_D1CPRE)
    MODIFY_REG(RCC->D1CFGR, RCC_D1CFGR_D1CPRE, RCC_ClkInitStruct->SYSCLKDivider);
 800a8b2:	4b43      	ldr	r3, [pc, #268]	@ (800a9c0 <HAL_RCC_ClockConfig+0x244>)
 800a8b4:	699b      	ldr	r3, [r3, #24]
 800a8b6:	f423 6270 	bic.w	r2, r3, #3840	@ 0xf00
 800a8ba:	687b      	ldr	r3, [r7, #4]
 800a8bc:	689b      	ldr	r3, [r3, #8]
 800a8be:	4940      	ldr	r1, [pc, #256]	@ (800a9c0 <HAL_RCC_ClockConfig+0x244>)
 800a8c0:	4313      	orrs	r3, r2
 800a8c2:	618b      	str	r3, [r1, #24]
#else
    MODIFY_REG(RCC->CDCFGR1, RCC_CDCFGR1_CDCPRE, RCC_ClkInitStruct->SYSCLKDivider);
#endif
    /* HSE is selected as System Clock Source */
    if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
 800a8c4:	687b      	ldr	r3, [r7, #4]
 800a8c6:	685b      	ldr	r3, [r3, #4]
 800a8c8:	2b02      	cmp	r3, #2
 800a8ca:	d107      	bne.n	800a8dc <HAL_RCC_ClockConfig+0x160>
    {
      /* Check the HSE ready flag */
      if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == 0U)
 800a8cc:	4b3c      	ldr	r3, [pc, #240]	@ (800a9c0 <HAL_RCC_ClockConfig+0x244>)
 800a8ce:	681b      	ldr	r3, [r3, #0]
 800a8d0:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
 800a8d4:	2b00      	cmp	r3, #0
 800a8d6:	d121      	bne.n	800a91c <HAL_RCC_ClockConfig+0x1a0>
      {
        return HAL_ERROR;
 800a8d8:	2301      	movs	r3, #1
 800a8da:	e0f6      	b.n	800aaca <HAL_RCC_ClockConfig+0x34e>
      }
    }
    /* PLL is selected as System Clock Source */
    else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
 800a8dc:	687b      	ldr	r3, [r7, #4]
 800a8de:	685b      	ldr	r3, [r3, #4]
 800a8e0:	2b03      	cmp	r3, #3
 800a8e2:	d107      	bne.n	800a8f4 <HAL_RCC_ClockConfig+0x178>
    {
      /* Check the PLL ready flag */
      if (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == 0U)
 800a8e4:	4b36      	ldr	r3, [pc, #216]	@ (800a9c0 <HAL_RCC_ClockConfig+0x244>)
 800a8e6:	681b      	ldr	r3, [r3, #0]
 800a8e8:	f003 7300 	and.w	r3, r3, #33554432	@ 0x2000000
 800a8ec:	2b00      	cmp	r3, #0
 800a8ee:	d115      	bne.n	800a91c <HAL_RCC_ClockConfig+0x1a0>
      {
        return HAL_ERROR;
 800a8f0:	2301      	movs	r3, #1
 800a8f2:	e0ea      	b.n	800aaca <HAL_RCC_ClockConfig+0x34e>
      }
    }
    /* CSI is selected as System Clock Source */
    else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_CSI)
 800a8f4:	687b      	ldr	r3, [r7, #4]
 800a8f6:	685b      	ldr	r3, [r3, #4]
 800a8f8:	2b01      	cmp	r3, #1
 800a8fa:	d107      	bne.n	800a90c <HAL_RCC_ClockConfig+0x190>
    {
      /* Check the PLL ready flag */
      if (__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) == 0U)
 800a8fc:	4b30      	ldr	r3, [pc, #192]	@ (800a9c0 <HAL_RCC_ClockConfig+0x244>)
 800a8fe:	681b      	ldr	r3, [r3, #0]
 800a900:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 800a904:	2b00      	cmp	r3, #0
 800a906:	d109      	bne.n	800a91c <HAL_RCC_ClockConfig+0x1a0>
      {
        return HAL_ERROR;
 800a908:	2301      	movs	r3, #1
 800a90a:	e0de      	b.n	800aaca <HAL_RCC_ClockConfig+0x34e>
    }
    /* HSI is selected as System Clock Source */
    else
    {
      /* Check the HSI ready flag */
      if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U)
 800a90c:	4b2c      	ldr	r3, [pc, #176]	@ (800a9c0 <HAL_RCC_ClockConfig+0x244>)
 800a90e:	681b      	ldr	r3, [r3, #0]
 800a910:	f003 0304 	and.w	r3, r3, #4
 800a914:	2b00      	cmp	r3, #0
 800a916:	d101      	bne.n	800a91c <HAL_RCC_ClockConfig+0x1a0>
      {
        return HAL_ERROR;
 800a918:	2301      	movs	r3, #1
 800a91a:	e0d6      	b.n	800aaca <HAL_RCC_ClockConfig+0x34e>
      }
    }
    MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, RCC_ClkInitStruct->SYSCLKSource);
 800a91c:	4b28      	ldr	r3, [pc, #160]	@ (800a9c0 <HAL_RCC_ClockConfig+0x244>)
 800a91e:	691b      	ldr	r3, [r3, #16]
 800a920:	f023 0207 	bic.w	r2, r3, #7
 800a924:	687b      	ldr	r3, [r7, #4]
 800a926:	685b      	ldr	r3, [r3, #4]
 800a928:	4925      	ldr	r1, [pc, #148]	@ (800a9c0 <HAL_RCC_ClockConfig+0x244>)
 800a92a:	4313      	orrs	r3, r2
 800a92c:	610b      	str	r3, [r1, #16]

    /* Get Start Tick*/
    tickstart = HAL_GetTick();
 800a92e:	f7fa fc87 	bl	8005240 <HAL_GetTick>
 800a932:	6178      	str	r0, [r7, #20]

    while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
 800a934:	e00a      	b.n	800a94c <HAL_RCC_ClockConfig+0x1d0>
    {
      if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
 800a936:	f7fa fc83 	bl	8005240 <HAL_GetTick>
 800a93a:	4602      	mov	r2, r0
 800a93c:	697b      	ldr	r3, [r7, #20]
 800a93e:	1ad3      	subs	r3, r2, r3
 800a940:	f241 3288 	movw	r2, #5000	@ 0x1388
 800a944:	4293      	cmp	r3, r2
 800a946:	d901      	bls.n	800a94c <HAL_RCC_ClockConfig+0x1d0>
      {
        return HAL_TIMEOUT;
 800a948:	2303      	movs	r3, #3
 800a94a:	e0be      	b.n	800aaca <HAL_RCC_ClockConfig+0x34e>
    while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
 800a94c:	4b1c      	ldr	r3, [pc, #112]	@ (800a9c0 <HAL_RCC_ClockConfig+0x244>)
 800a94e:	691b      	ldr	r3, [r3, #16]
 800a950:	f003 0238 	and.w	r2, r3, #56	@ 0x38
 800a954:	687b      	ldr	r3, [r7, #4]
 800a956:	685b      	ldr	r3, [r3, #4]
 800a958:	00db      	lsls	r3, r3, #3
 800a95a:	429a      	cmp	r2, r3
 800a95c:	d1eb      	bne.n	800a936 <HAL_RCC_ClockConfig+0x1ba>

  }

  /* Decreasing the BUS frequency divider */
  /*-------------------------- HCLK Configuration --------------------------*/
  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
 800a95e:	687b      	ldr	r3, [r7, #4]
 800a960:	681b      	ldr	r3, [r3, #0]
 800a962:	f003 0302 	and.w	r3, r3, #2
 800a966:	2b00      	cmp	r3, #0
 800a968:	d010      	beq.n	800a98c <HAL_RCC_ClockConfig+0x210>
  {
#if defined(RCC_D1CFGR_HPRE)
    if ((RCC_ClkInitStruct->AHBCLKDivider) < (RCC->D1CFGR & RCC_D1CFGR_HPRE))
 800a96a:	687b      	ldr	r3, [r7, #4]
 800a96c:	68da      	ldr	r2, [r3, #12]
 800a96e:	4b14      	ldr	r3, [pc, #80]	@ (800a9c0 <HAL_RCC_ClockConfig+0x244>)
 800a970:	699b      	ldr	r3, [r3, #24]
 800a972:	f003 030f 	and.w	r3, r3, #15
 800a976:	429a      	cmp	r2, r3
 800a978:	d208      	bcs.n	800a98c <HAL_RCC_ClockConfig+0x210>
    {
      /* Set the new HCLK clock divider */
      assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
      MODIFY_REG(RCC->D1CFGR, RCC_D1CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
 800a97a:	4b11      	ldr	r3, [pc, #68]	@ (800a9c0 <HAL_RCC_ClockConfig+0x244>)
 800a97c:	699b      	ldr	r3, [r3, #24]
 800a97e:	f023 020f 	bic.w	r2, r3, #15
 800a982:	687b      	ldr	r3, [r7, #4]
 800a984:	68db      	ldr	r3, [r3, #12]
 800a986:	490e      	ldr	r1, [pc, #56]	@ (800a9c0 <HAL_RCC_ClockConfig+0x244>)
 800a988:	4313      	orrs	r3, r2
 800a98a:	618b      	str	r3, [r1, #24]
    }
#endif
  }

  /* Decreasing the number of wait states because of lower CPU frequency */
  if (FLatency < __HAL_FLASH_GET_LATENCY())
 800a98c:	4b0b      	ldr	r3, [pc, #44]	@ (800a9bc <HAL_RCC_ClockConfig+0x240>)
 800a98e:	681b      	ldr	r3, [r3, #0]
 800a990:	f003 030f 	and.w	r3, r3, #15
 800a994:	683a      	ldr	r2, [r7, #0]
 800a996:	429a      	cmp	r2, r3
 800a998:	d214      	bcs.n	800a9c4 <HAL_RCC_ClockConfig+0x248>
  {
    /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
    __HAL_FLASH_SET_LATENCY(FLatency);
 800a99a:	4b08      	ldr	r3, [pc, #32]	@ (800a9bc <HAL_RCC_ClockConfig+0x240>)
 800a99c:	681b      	ldr	r3, [r3, #0]
 800a99e:	f023 020f 	bic.w	r2, r3, #15
 800a9a2:	4906      	ldr	r1, [pc, #24]	@ (800a9bc <HAL_RCC_ClockConfig+0x240>)
 800a9a4:	683b      	ldr	r3, [r7, #0]
 800a9a6:	4313      	orrs	r3, r2
 800a9a8:	600b      	str	r3, [r1, #0]

    /* Check that the new number of wait states is taken into account to access the Flash
    memory by reading the FLASH_ACR register */
    if (__HAL_FLASH_GET_LATENCY() != FLatency)
 800a9aa:	4b04      	ldr	r3, [pc, #16]	@ (800a9bc <HAL_RCC_ClockConfig+0x240>)
 800a9ac:	681b      	ldr	r3, [r3, #0]
 800a9ae:	f003 030f 	and.w	r3, r3, #15
 800a9b2:	683a      	ldr	r2, [r7, #0]
 800a9b4:	429a      	cmp	r2, r3
 800a9b6:	d005      	beq.n	800a9c4 <HAL_RCC_ClockConfig+0x248>
    {
      return HAL_ERROR;
 800a9b8:	2301      	movs	r3, #1
 800a9ba:	e086      	b.n	800aaca <HAL_RCC_ClockConfig+0x34e>
 800a9bc:	52002000 	.word	0x52002000
 800a9c0:	58024400 	.word	0x58024400
    }
  }

  /*-------------------------- D1PCLK1/CDPCLK Configuration ---------------------------*/
  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_D1PCLK1) == RCC_CLOCKTYPE_D1PCLK1)
 800a9c4:	687b      	ldr	r3, [r7, #4]
 800a9c6:	681b      	ldr	r3, [r3, #0]
 800a9c8:	f003 0304 	and.w	r3, r3, #4
 800a9cc:	2b00      	cmp	r3, #0
 800a9ce:	d010      	beq.n	800a9f2 <HAL_RCC_ClockConfig+0x276>
  {
#if defined(RCC_D1CFGR_D1PPRE)
    if ((RCC_ClkInitStruct->APB3CLKDivider) < (RCC->D1CFGR & RCC_D1CFGR_D1PPRE))
 800a9d0:	687b      	ldr	r3, [r7, #4]
 800a9d2:	691a      	ldr	r2, [r3, #16]
 800a9d4:	4b3f      	ldr	r3, [pc, #252]	@ (800aad4 <HAL_RCC_ClockConfig+0x358>)
 800a9d6:	699b      	ldr	r3, [r3, #24]
 800a9d8:	f003 0370 	and.w	r3, r3, #112	@ 0x70
 800a9dc:	429a      	cmp	r2, r3
 800a9de:	d208      	bcs.n	800a9f2 <HAL_RCC_ClockConfig+0x276>
    {
      assert_param(IS_RCC_D1PCLK1(RCC_ClkInitStruct->APB3CLKDivider));
      MODIFY_REG(RCC->D1CFGR, RCC_D1CFGR_D1PPRE, RCC_ClkInitStruct->APB3CLKDivider);
 800a9e0:	4b3c      	ldr	r3, [pc, #240]	@ (800aad4 <HAL_RCC_ClockConfig+0x358>)
 800a9e2:	699b      	ldr	r3, [r3, #24]
 800a9e4:	f023 0270 	bic.w	r2, r3, #112	@ 0x70
 800a9e8:	687b      	ldr	r3, [r7, #4]
 800a9ea:	691b      	ldr	r3, [r3, #16]
 800a9ec:	4939      	ldr	r1, [pc, #228]	@ (800aad4 <HAL_RCC_ClockConfig+0x358>)
 800a9ee:	4313      	orrs	r3, r2
 800a9f0:	618b      	str	r3, [r1, #24]
    }
#endif
  }

  /*-------------------------- PCLK1 Configuration ---------------------------*/
  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
 800a9f2:	687b      	ldr	r3, [r7, #4]
 800a9f4:	681b      	ldr	r3, [r3, #0]
 800a9f6:	f003 0308 	and.w	r3, r3, #8
 800a9fa:	2b00      	cmp	r3, #0
 800a9fc:	d010      	beq.n	800aa20 <HAL_RCC_ClockConfig+0x2a4>
  {
#if defined(RCC_D2CFGR_D2PPRE1)
    if ((RCC_ClkInitStruct->APB1CLKDivider) < (RCC->D2CFGR & RCC_D2CFGR_D2PPRE1))
 800a9fe:	687b      	ldr	r3, [r7, #4]
 800aa00:	695a      	ldr	r2, [r3, #20]
 800aa02:	4b34      	ldr	r3, [pc, #208]	@ (800aad4 <HAL_RCC_ClockConfig+0x358>)
 800aa04:	69db      	ldr	r3, [r3, #28]
 800aa06:	f003 0370 	and.w	r3, r3, #112	@ 0x70
 800aa0a:	429a      	cmp	r2, r3
 800aa0c:	d208      	bcs.n	800aa20 <HAL_RCC_ClockConfig+0x2a4>
    {
      assert_param(IS_RCC_PCLK1(RCC_ClkInitStruct->APB1CLKDivider));
      MODIFY_REG(RCC->D2CFGR, RCC_D2CFGR_D2PPRE1, (RCC_ClkInitStruct->APB1CLKDivider));
 800aa0e:	4b31      	ldr	r3, [pc, #196]	@ (800aad4 <HAL_RCC_ClockConfig+0x358>)
 800aa10:	69db      	ldr	r3, [r3, #28]
 800aa12:	f023 0270 	bic.w	r2, r3, #112	@ 0x70
 800aa16:	687b      	ldr	r3, [r7, #4]
 800aa18:	695b      	ldr	r3, [r3, #20]
 800aa1a:	492e      	ldr	r1, [pc, #184]	@ (800aad4 <HAL_RCC_ClockConfig+0x358>)
 800aa1c:	4313      	orrs	r3, r2
 800aa1e:	61cb      	str	r3, [r1, #28]
    }
#endif
  }

  /*-------------------------- PCLK2 Configuration ---------------------------*/
  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
 800aa20:	687b      	ldr	r3, [r7, #4]
 800aa22:	681b      	ldr	r3, [r3, #0]
 800aa24:	f003 0310 	and.w	r3, r3, #16
 800aa28:	2b00      	cmp	r3, #0
 800aa2a:	d010      	beq.n	800aa4e <HAL_RCC_ClockConfig+0x2d2>
  {
#if defined (RCC_D2CFGR_D2PPRE2)
    if ((RCC_ClkInitStruct->APB2CLKDivider) < (RCC->D2CFGR & RCC_D2CFGR_D2PPRE2))
 800aa2c:	687b      	ldr	r3, [r7, #4]
 800aa2e:	699a      	ldr	r2, [r3, #24]
 800aa30:	4b28      	ldr	r3, [pc, #160]	@ (800aad4 <HAL_RCC_ClockConfig+0x358>)
 800aa32:	69db      	ldr	r3, [r3, #28]
 800aa34:	f403 63e0 	and.w	r3, r3, #1792	@ 0x700
 800aa38:	429a      	cmp	r2, r3
 800aa3a:	d208      	bcs.n	800aa4e <HAL_RCC_ClockConfig+0x2d2>
    {
      assert_param(IS_RCC_PCLK2(RCC_ClkInitStruct->APB2CLKDivider));
      MODIFY_REG(RCC->D2CFGR, RCC_D2CFGR_D2PPRE2, (RCC_ClkInitStruct->APB2CLKDivider));
 800aa3c:	4b25      	ldr	r3, [pc, #148]	@ (800aad4 <HAL_RCC_ClockConfig+0x358>)
 800aa3e:	69db      	ldr	r3, [r3, #28]
 800aa40:	f423 62e0 	bic.w	r2, r3, #1792	@ 0x700
 800aa44:	687b      	ldr	r3, [r7, #4]
 800aa46:	699b      	ldr	r3, [r3, #24]
 800aa48:	4922      	ldr	r1, [pc, #136]	@ (800aad4 <HAL_RCC_ClockConfig+0x358>)
 800aa4a:	4313      	orrs	r3, r2
 800aa4c:	61cb      	str	r3, [r1, #28]
    }
#endif
  }

  /*-------------------------- D3PCLK1/SRDPCLK1 Configuration ---------------------------*/
  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_D3PCLK1) == RCC_CLOCKTYPE_D3PCLK1)
 800aa4e:	687b      	ldr	r3, [r7, #4]
 800aa50:	681b      	ldr	r3, [r3, #0]
 800aa52:	f003 0320 	and.w	r3, r3, #32
 800aa56:	2b00      	cmp	r3, #0
 800aa58:	d010      	beq.n	800aa7c <HAL_RCC_ClockConfig+0x300>
  {
#if defined(RCC_D3CFGR_D3PPRE)
    if ((RCC_ClkInitStruct->APB4CLKDivider) < (RCC->D3CFGR & RCC_D3CFGR_D3PPRE))
 800aa5a:	687b      	ldr	r3, [r7, #4]
 800aa5c:	69da      	ldr	r2, [r3, #28]
 800aa5e:	4b1d      	ldr	r3, [pc, #116]	@ (800aad4 <HAL_RCC_ClockConfig+0x358>)
 800aa60:	6a1b      	ldr	r3, [r3, #32]
 800aa62:	f003 0370 	and.w	r3, r3, #112	@ 0x70
 800aa66:	429a      	cmp	r2, r3
 800aa68:	d208      	bcs.n	800aa7c <HAL_RCC_ClockConfig+0x300>
    {
      assert_param(IS_RCC_D3PCLK1(RCC_ClkInitStruct->APB4CLKDivider));
      MODIFY_REG(RCC->D3CFGR, RCC_D3CFGR_D3PPRE, (RCC_ClkInitStruct->APB4CLKDivider));
 800aa6a:	4b1a      	ldr	r3, [pc, #104]	@ (800aad4 <HAL_RCC_ClockConfig+0x358>)
 800aa6c:	6a1b      	ldr	r3, [r3, #32]
 800aa6e:	f023 0270 	bic.w	r2, r3, #112	@ 0x70
 800aa72:	687b      	ldr	r3, [r7, #4]
 800aa74:	69db      	ldr	r3, [r3, #28]
 800aa76:	4917      	ldr	r1, [pc, #92]	@ (800aad4 <HAL_RCC_ClockConfig+0x358>)
 800aa78:	4313      	orrs	r3, r2
 800aa7a:	620b      	str	r3, [r1, #32]
#endif
  }

  /* Update the SystemCoreClock global variable */
#if defined(RCC_D1CFGR_D1CPRE)
  common_system_clock = HAL_RCC_GetSysClockFreq() >> ((D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_D1CPRE) >> RCC_D1CFGR_D1CPRE_Pos]) & 0x1FU);
 800aa7c:	f000 f834 	bl	800aae8 <HAL_RCC_GetSysClockFreq>
 800aa80:	4602      	mov	r2, r0
 800aa82:	4b14      	ldr	r3, [pc, #80]	@ (800aad4 <HAL_RCC_ClockConfig+0x358>)
 800aa84:	699b      	ldr	r3, [r3, #24]
 800aa86:	0a1b      	lsrs	r3, r3, #8
 800aa88:	f003 030f 	and.w	r3, r3, #15
 800aa8c:	4912      	ldr	r1, [pc, #72]	@ (800aad8 <HAL_RCC_ClockConfig+0x35c>)
 800aa8e:	5ccb      	ldrb	r3, [r1, r3]
 800aa90:	f003 031f 	and.w	r3, r3, #31
 800aa94:	fa22 f303 	lsr.w	r3, r2, r3
 800aa98:	613b      	str	r3, [r7, #16]
#else
  common_system_clock = HAL_RCC_GetSysClockFreq() >> ((D1CorePrescTable[(RCC->CDCFGR1 & RCC_CDCFGR1_CDCPRE) >> RCC_CDCFGR1_CDCPRE_Pos]) & 0x1FU);
#endif

#if defined(RCC_D1CFGR_HPRE)
  SystemD2Clock = (common_system_clock >> ((D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_HPRE) >> RCC_D1CFGR_HPRE_Pos]) & 0x1FU));
 800aa9a:	4b0e      	ldr	r3, [pc, #56]	@ (800aad4 <HAL_RCC_ClockConfig+0x358>)
 800aa9c:	699b      	ldr	r3, [r3, #24]
 800aa9e:	f003 030f 	and.w	r3, r3, #15
 800aaa2:	4a0d      	ldr	r2, [pc, #52]	@ (800aad8 <HAL_RCC_ClockConfig+0x35c>)
 800aaa4:	5cd3      	ldrb	r3, [r2, r3]
 800aaa6:	f003 031f 	and.w	r3, r3, #31
 800aaaa:	693a      	ldr	r2, [r7, #16]
 800aaac:	fa22 f303 	lsr.w	r3, r2, r3
 800aab0:	4a0a      	ldr	r2, [pc, #40]	@ (800aadc <HAL_RCC_ClockConfig+0x360>)
 800aab2:	6013      	str	r3, [r2, #0]
#endif

#if defined(DUAL_CORE) && defined(CORE_CM4)
  SystemCoreClock = SystemD2Clock;
#else
  SystemCoreClock = common_system_clock;
 800aab4:	4a0a      	ldr	r2, [pc, #40]	@ (800aae0 <HAL_RCC_ClockConfig+0x364>)
 800aab6:	693b      	ldr	r3, [r7, #16]
 800aab8:	6013      	str	r3, [r2, #0]
#endif /* DUAL_CORE && CORE_CM4 */

  /* Configure the source of time base considering new system clocks settings*/
  halstatus = HAL_InitTick(uwTickPrio);
 800aaba:	4b0a      	ldr	r3, [pc, #40]	@ (800aae4 <HAL_RCC_ClockConfig+0x368>)
 800aabc:	681b      	ldr	r3, [r3, #0]
 800aabe:	4618      	mov	r0, r3
 800aac0:	f7f9 f816 	bl	8003af0 <HAL_InitTick>
 800aac4:	4603      	mov	r3, r0
 800aac6:	73fb      	strb	r3, [r7, #15]

  return halstatus;
 800aac8:	7bfb      	ldrb	r3, [r7, #15]
}
 800aaca:	4618      	mov	r0, r3
 800aacc:	3718      	adds	r7, #24
 800aace:	46bd      	mov	sp, r7
 800aad0:	bd80      	pop	{r7, pc}
 800aad2:	bf00      	nop
 800aad4:	58024400 	.word	0x58024400
 800aad8:	08031308 	.word	0x08031308
 800aadc:	24000010 	.word	0x24000010
 800aae0:	2400000c 	.word	0x2400000c
 800aae4:	2400002c 	.word	0x2400002c

0800aae8 <HAL_RCC_GetSysClockFreq>:
  *
  *
  * @retval SYSCLK frequency
  */
uint32_t HAL_RCC_GetSysClockFreq(void)
{
 800aae8:	b480      	push	{r7}
 800aaea:	b089      	sub	sp, #36	@ 0x24
 800aaec:	af00      	add	r7, sp, #0
  float_t fracn1, pllvco;
  uint32_t sysclockfreq;

  /* Get SYSCLK source -------------------------------------------------------*/

  switch (RCC->CFGR & RCC_CFGR_SWS)
 800aaee:	4bb3      	ldr	r3, [pc, #716]	@ (800adbc <HAL_RCC_GetSysClockFreq+0x2d4>)
 800aaf0:	691b      	ldr	r3, [r3, #16]
 800aaf2:	f003 0338 	and.w	r3, r3, #56	@ 0x38
 800aaf6:	2b18      	cmp	r3, #24
 800aaf8:	f200 8155 	bhi.w	800ada6 <HAL_RCC_GetSysClockFreq+0x2be>
 800aafc:	a201      	add	r2, pc, #4	@ (adr r2, 800ab04 <HAL_RCC_GetSysClockFreq+0x1c>)
 800aafe:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800ab02:	bf00      	nop
 800ab04:	0800ab69 	.word	0x0800ab69
 800ab08:	0800ada7 	.word	0x0800ada7
 800ab0c:	0800ada7 	.word	0x0800ada7
 800ab10:	0800ada7 	.word	0x0800ada7
 800ab14:	0800ada7 	.word	0x0800ada7
 800ab18:	0800ada7 	.word	0x0800ada7
 800ab1c:	0800ada7 	.word	0x0800ada7
 800ab20:	0800ada7 	.word	0x0800ada7
 800ab24:	0800ab8f 	.word	0x0800ab8f
 800ab28:	0800ada7 	.word	0x0800ada7
 800ab2c:	0800ada7 	.word	0x0800ada7
 800ab30:	0800ada7 	.word	0x0800ada7
 800ab34:	0800ada7 	.word	0x0800ada7
 800ab38:	0800ada7 	.word	0x0800ada7
 800ab3c:	0800ada7 	.word	0x0800ada7
 800ab40:	0800ada7 	.word	0x0800ada7
 800ab44:	0800ab95 	.word	0x0800ab95
 800ab48:	0800ada7 	.word	0x0800ada7
 800ab4c:	0800ada7 	.word	0x0800ada7
 800ab50:	0800ada7 	.word	0x0800ada7
 800ab54:	0800ada7 	.word	0x0800ada7
 800ab58:	0800ada7 	.word	0x0800ada7
 800ab5c:	0800ada7 	.word	0x0800ada7
 800ab60:	0800ada7 	.word	0x0800ada7
 800ab64:	0800ab9b 	.word	0x0800ab9b
  {
    case RCC_CFGR_SWS_HSI:  /* HSI used as system clock source */

      if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
 800ab68:	4b94      	ldr	r3, [pc, #592]	@ (800adbc <HAL_RCC_GetSysClockFreq+0x2d4>)
 800ab6a:	681b      	ldr	r3, [r3, #0]
 800ab6c:	f003 0320 	and.w	r3, r3, #32
 800ab70:	2b00      	cmp	r3, #0
 800ab72:	d009      	beq.n	800ab88 <HAL_RCC_GetSysClockFreq+0xa0>
      {
        sysclockfreq = (uint32_t)(HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3));
 800ab74:	4b91      	ldr	r3, [pc, #580]	@ (800adbc <HAL_RCC_GetSysClockFreq+0x2d4>)
 800ab76:	681b      	ldr	r3, [r3, #0]
 800ab78:	08db      	lsrs	r3, r3, #3
 800ab7a:	f003 0303 	and.w	r3, r3, #3
 800ab7e:	4a90      	ldr	r2, [pc, #576]	@ (800adc0 <HAL_RCC_GetSysClockFreq+0x2d8>)
 800ab80:	fa22 f303 	lsr.w	r3, r2, r3
 800ab84:	61bb      	str	r3, [r7, #24]
      else
      {
        sysclockfreq = (uint32_t) HSI_VALUE;
      }

      break;
 800ab86:	e111      	b.n	800adac <HAL_RCC_GetSysClockFreq+0x2c4>
        sysclockfreq = (uint32_t) HSI_VALUE;
 800ab88:	4b8d      	ldr	r3, [pc, #564]	@ (800adc0 <HAL_RCC_GetSysClockFreq+0x2d8>)
 800ab8a:	61bb      	str	r3, [r7, #24]
      break;
 800ab8c:	e10e      	b.n	800adac <HAL_RCC_GetSysClockFreq+0x2c4>

    case RCC_CFGR_SWS_CSI:  /* CSI used as system clock  source */
      sysclockfreq = CSI_VALUE;
 800ab8e:	4b8d      	ldr	r3, [pc, #564]	@ (800adc4 <HAL_RCC_GetSysClockFreq+0x2dc>)
 800ab90:	61bb      	str	r3, [r7, #24]
      break;
 800ab92:	e10b      	b.n	800adac <HAL_RCC_GetSysClockFreq+0x2c4>

    case RCC_CFGR_SWS_HSE:  /* HSE used as system clock  source */
      sysclockfreq = HSE_VALUE;
 800ab94:	4b8c      	ldr	r3, [pc, #560]	@ (800adc8 <HAL_RCC_GetSysClockFreq+0x2e0>)
 800ab96:	61bb      	str	r3, [r7, #24]
      break;
 800ab98:	e108      	b.n	800adac <HAL_RCC_GetSysClockFreq+0x2c4>
    case RCC_CFGR_SWS_PLL1:  /* PLL1 used as system clock  source */

      /* PLL_VCO = (HSE_VALUE or HSI_VALUE or CSI_VALUE/ PLLM) * PLLN
      SYSCLK = PLL_VCO / PLLR
      */
      pllsource = (RCC->PLLCKSELR & RCC_PLLCKSELR_PLLSRC);
 800ab9a:	4b88      	ldr	r3, [pc, #544]	@ (800adbc <HAL_RCC_GetSysClockFreq+0x2d4>)
 800ab9c:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800ab9e:	f003 0303 	and.w	r3, r3, #3
 800aba2:	617b      	str	r3, [r7, #20]
      pllm = ((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM1) >> 4)  ;
 800aba4:	4b85      	ldr	r3, [pc, #532]	@ (800adbc <HAL_RCC_GetSysClockFreq+0x2d4>)
 800aba6:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800aba8:	091b      	lsrs	r3, r3, #4
 800abaa:	f003 033f 	and.w	r3, r3, #63	@ 0x3f
 800abae:	613b      	str	r3, [r7, #16]
      pllfracen = ((RCC-> PLLCFGR & RCC_PLLCFGR_PLL1FRACEN) >> RCC_PLLCFGR_PLL1FRACEN_Pos);
 800abb0:	4b82      	ldr	r3, [pc, #520]	@ (800adbc <HAL_RCC_GetSysClockFreq+0x2d4>)
 800abb2:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800abb4:	f003 0301 	and.w	r3, r3, #1
 800abb8:	60fb      	str	r3, [r7, #12]
      fracn1 = (float_t)(uint32_t)(pllfracen * ((RCC->PLL1FRACR & RCC_PLL1FRACR_FRACN1) >> 3));
 800abba:	4b80      	ldr	r3, [pc, #512]	@ (800adbc <HAL_RCC_GetSysClockFreq+0x2d4>)
 800abbc:	6b5b      	ldr	r3, [r3, #52]	@ 0x34
 800abbe:	08db      	lsrs	r3, r3, #3
 800abc0:	f3c3 030c 	ubfx	r3, r3, #0, #13
 800abc4:	68fa      	ldr	r2, [r7, #12]
 800abc6:	fb02 f303 	mul.w	r3, r2, r3
 800abca:	ee07 3a90 	vmov	s15, r3
 800abce:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800abd2:	edc7 7a02 	vstr	s15, [r7, #8]

      if (pllm != 0U)
 800abd6:	693b      	ldr	r3, [r7, #16]
 800abd8:	2b00      	cmp	r3, #0
 800abda:	f000 80e1 	beq.w	800ada0 <HAL_RCC_GetSysClockFreq+0x2b8>
 800abde:	697b      	ldr	r3, [r7, #20]
 800abe0:	2b02      	cmp	r3, #2
 800abe2:	f000 8083 	beq.w	800acec <HAL_RCC_GetSysClockFreq+0x204>
 800abe6:	697b      	ldr	r3, [r7, #20]
 800abe8:	2b02      	cmp	r3, #2
 800abea:	f200 80a1 	bhi.w	800ad30 <HAL_RCC_GetSysClockFreq+0x248>
 800abee:	697b      	ldr	r3, [r7, #20]
 800abf0:	2b00      	cmp	r3, #0
 800abf2:	d003      	beq.n	800abfc <HAL_RCC_GetSysClockFreq+0x114>
 800abf4:	697b      	ldr	r3, [r7, #20]
 800abf6:	2b01      	cmp	r3, #1
 800abf8:	d056      	beq.n	800aca8 <HAL_RCC_GetSysClockFreq+0x1c0>
 800abfa:	e099      	b.n	800ad30 <HAL_RCC_GetSysClockFreq+0x248>
      {
        switch (pllsource)
        {
          case RCC_PLLSOURCE_HSI:  /* HSI used as PLL clock source */

            if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
 800abfc:	4b6f      	ldr	r3, [pc, #444]	@ (800adbc <HAL_RCC_GetSysClockFreq+0x2d4>)
 800abfe:	681b      	ldr	r3, [r3, #0]
 800ac00:	f003 0320 	and.w	r3, r3, #32
 800ac04:	2b00      	cmp	r3, #0
 800ac06:	d02d      	beq.n	800ac64 <HAL_RCC_GetSysClockFreq+0x17c>
            {
              hsivalue = (HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3));
 800ac08:	4b6c      	ldr	r3, [pc, #432]	@ (800adbc <HAL_RCC_GetSysClockFreq+0x2d4>)
 800ac0a:	681b      	ldr	r3, [r3, #0]
 800ac0c:	08db      	lsrs	r3, r3, #3
 800ac0e:	f003 0303 	and.w	r3, r3, #3
 800ac12:	4a6b      	ldr	r2, [pc, #428]	@ (800adc0 <HAL_RCC_GetSysClockFreq+0x2d8>)
 800ac14:	fa22 f303 	lsr.w	r3, r2, r3
 800ac18:	607b      	str	r3, [r7, #4]
              pllvco = ((float_t)hsivalue / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1 / (float_t)0x2000) + (float_t)1);
 800ac1a:	687b      	ldr	r3, [r7, #4]
 800ac1c:	ee07 3a90 	vmov	s15, r3
 800ac20:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800ac24:	693b      	ldr	r3, [r7, #16]
 800ac26:	ee07 3a90 	vmov	s15, r3
 800ac2a:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800ac2e:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800ac32:	4b62      	ldr	r3, [pc, #392]	@ (800adbc <HAL_RCC_GetSysClockFreq+0x2d4>)
 800ac34:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 800ac36:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800ac3a:	ee07 3a90 	vmov	s15, r3
 800ac3e:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800ac42:	ed97 6a02 	vldr	s12, [r7, #8]
 800ac46:	eddf 5a61 	vldr	s11, [pc, #388]	@ 800adcc <HAL_RCC_GetSysClockFreq+0x2e4>
 800ac4a:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800ac4e:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800ac52:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800ac56:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800ac5a:	ee67 7a27 	vmul.f32	s15, s14, s15
 800ac5e:	edc7 7a07 	vstr	s15, [r7, #28]
            }
            else
            {
              pllvco = ((float_t)HSI_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1 / (float_t)0x2000) + (float_t)1);
            }
            break;
 800ac62:	e087      	b.n	800ad74 <HAL_RCC_GetSysClockFreq+0x28c>
              pllvco = ((float_t)HSI_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1 / (float_t)0x2000) + (float_t)1);
 800ac64:	693b      	ldr	r3, [r7, #16]
 800ac66:	ee07 3a90 	vmov	s15, r3
 800ac6a:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800ac6e:	eddf 6a58 	vldr	s13, [pc, #352]	@ 800add0 <HAL_RCC_GetSysClockFreq+0x2e8>
 800ac72:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800ac76:	4b51      	ldr	r3, [pc, #324]	@ (800adbc <HAL_RCC_GetSysClockFreq+0x2d4>)
 800ac78:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 800ac7a:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800ac7e:	ee07 3a90 	vmov	s15, r3
 800ac82:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800ac86:	ed97 6a02 	vldr	s12, [r7, #8]
 800ac8a:	eddf 5a50 	vldr	s11, [pc, #320]	@ 800adcc <HAL_RCC_GetSysClockFreq+0x2e4>
 800ac8e:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800ac92:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800ac96:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800ac9a:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800ac9e:	ee67 7a27 	vmul.f32	s15, s14, s15
 800aca2:	edc7 7a07 	vstr	s15, [r7, #28]
            break;
 800aca6:	e065      	b.n	800ad74 <HAL_RCC_GetSysClockFreq+0x28c>

          case RCC_PLLSOURCE_CSI:  /* CSI used as PLL clock source */
            pllvco = ((float_t)CSI_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1 / (float_t)0x2000) + (float_t)1);
 800aca8:	693b      	ldr	r3, [r7, #16]
 800acaa:	ee07 3a90 	vmov	s15, r3
 800acae:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800acb2:	eddf 6a48 	vldr	s13, [pc, #288]	@ 800add4 <HAL_RCC_GetSysClockFreq+0x2ec>
 800acb6:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800acba:	4b40      	ldr	r3, [pc, #256]	@ (800adbc <HAL_RCC_GetSysClockFreq+0x2d4>)
 800acbc:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 800acbe:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800acc2:	ee07 3a90 	vmov	s15, r3
 800acc6:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800acca:	ed97 6a02 	vldr	s12, [r7, #8]
 800acce:	eddf 5a3f 	vldr	s11, [pc, #252]	@ 800adcc <HAL_RCC_GetSysClockFreq+0x2e4>
 800acd2:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800acd6:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800acda:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800acde:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800ace2:	ee67 7a27 	vmul.f32	s15, s14, s15
 800ace6:	edc7 7a07 	vstr	s15, [r7, #28]
            break;
 800acea:	e043      	b.n	800ad74 <HAL_RCC_GetSysClockFreq+0x28c>

          case RCC_PLLSOURCE_HSE:  /* HSE used as PLL clock source */
            pllvco = ((float_t)HSE_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1 / (float_t)0x2000) + (float_t)1);
 800acec:	693b      	ldr	r3, [r7, #16]
 800acee:	ee07 3a90 	vmov	s15, r3
 800acf2:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800acf6:	eddf 6a38 	vldr	s13, [pc, #224]	@ 800add8 <HAL_RCC_GetSysClockFreq+0x2f0>
 800acfa:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800acfe:	4b2f      	ldr	r3, [pc, #188]	@ (800adbc <HAL_RCC_GetSysClockFreq+0x2d4>)
 800ad00:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 800ad02:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800ad06:	ee07 3a90 	vmov	s15, r3
 800ad0a:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800ad0e:	ed97 6a02 	vldr	s12, [r7, #8]
 800ad12:	eddf 5a2e 	vldr	s11, [pc, #184]	@ 800adcc <HAL_RCC_GetSysClockFreq+0x2e4>
 800ad16:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800ad1a:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800ad1e:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800ad22:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800ad26:	ee67 7a27 	vmul.f32	s15, s14, s15
 800ad2a:	edc7 7a07 	vstr	s15, [r7, #28]
            break;
 800ad2e:	e021      	b.n	800ad74 <HAL_RCC_GetSysClockFreq+0x28c>

          default:
            pllvco = ((float_t)CSI_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1 / (float_t)0x2000) + (float_t)1);
 800ad30:	693b      	ldr	r3, [r7, #16]
 800ad32:	ee07 3a90 	vmov	s15, r3
 800ad36:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800ad3a:	eddf 6a26 	vldr	s13, [pc, #152]	@ 800add4 <HAL_RCC_GetSysClockFreq+0x2ec>
 800ad3e:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800ad42:	4b1e      	ldr	r3, [pc, #120]	@ (800adbc <HAL_RCC_GetSysClockFreq+0x2d4>)
 800ad44:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 800ad46:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800ad4a:	ee07 3a90 	vmov	s15, r3
 800ad4e:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800ad52:	ed97 6a02 	vldr	s12, [r7, #8]
 800ad56:	eddf 5a1d 	vldr	s11, [pc, #116]	@ 800adcc <HAL_RCC_GetSysClockFreq+0x2e4>
 800ad5a:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800ad5e:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800ad62:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800ad66:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800ad6a:	ee67 7a27 	vmul.f32	s15, s14, s15
 800ad6e:	edc7 7a07 	vstr	s15, [r7, #28]
            break;
 800ad72:	bf00      	nop
        }
        pllp = (((RCC->PLL1DIVR & RCC_PLL1DIVR_P1) >> 9) + 1U) ;
 800ad74:	4b11      	ldr	r3, [pc, #68]	@ (800adbc <HAL_RCC_GetSysClockFreq+0x2d4>)
 800ad76:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 800ad78:	0a5b      	lsrs	r3, r3, #9
 800ad7a:	f003 037f 	and.w	r3, r3, #127	@ 0x7f
 800ad7e:	3301      	adds	r3, #1
 800ad80:	603b      	str	r3, [r7, #0]
        sysclockfreq = (uint32_t)(float_t)(pllvco / (float_t)pllp);
 800ad82:	683b      	ldr	r3, [r7, #0]
 800ad84:	ee07 3a90 	vmov	s15, r3
 800ad88:	eeb8 7a67 	vcvt.f32.u32	s14, s15
 800ad8c:	edd7 6a07 	vldr	s13, [r7, #28]
 800ad90:	eec6 7a87 	vdiv.f32	s15, s13, s14
 800ad94:	eefc 7ae7 	vcvt.u32.f32	s15, s15
 800ad98:	ee17 3a90 	vmov	r3, s15
 800ad9c:	61bb      	str	r3, [r7, #24]
      }
      else
      {
        sysclockfreq = 0U;
      }
      break;
 800ad9e:	e005      	b.n	800adac <HAL_RCC_GetSysClockFreq+0x2c4>
        sysclockfreq = 0U;
 800ada0:	2300      	movs	r3, #0
 800ada2:	61bb      	str	r3, [r7, #24]
      break;
 800ada4:	e002      	b.n	800adac <HAL_RCC_GetSysClockFreq+0x2c4>

    default:
      sysclockfreq = CSI_VALUE;
 800ada6:	4b07      	ldr	r3, [pc, #28]	@ (800adc4 <HAL_RCC_GetSysClockFreq+0x2dc>)
 800ada8:	61bb      	str	r3, [r7, #24]
      break;
 800adaa:	bf00      	nop
  }

  return sysclockfreq;
 800adac:	69bb      	ldr	r3, [r7, #24]
}
 800adae:	4618      	mov	r0, r3
 800adb0:	3724      	adds	r7, #36	@ 0x24
 800adb2:	46bd      	mov	sp, r7
 800adb4:	f85d 7b04 	ldr.w	r7, [sp], #4
 800adb8:	4770      	bx	lr
 800adba:	bf00      	nop
 800adbc:	58024400 	.word	0x58024400
 800adc0:	03d09000 	.word	0x03d09000
 800adc4:	003d0900 	.word	0x003d0900
 800adc8:	017d7840 	.word	0x017d7840
 800adcc:	46000000 	.word	0x46000000
 800add0:	4c742400 	.word	0x4c742400
 800add4:	4a742400 	.word	0x4a742400
 800add8:	4bbebc20 	.word	0x4bbebc20

0800addc <HAL_RCC_GetHCLKFreq>:
  * @note   The SystemD2Clock CMSIS variable is used to store System domain2 Clock Frequency
  *         and updated within this function
  * @retval HCLK frequency
  */
uint32_t HAL_RCC_GetHCLKFreq(void)
{
 800addc:	b580      	push	{r7, lr}
 800adde:	b082      	sub	sp, #8
 800ade0:	af00      	add	r7, sp, #0
  uint32_t common_system_clock;

#if defined(RCC_D1CFGR_D1CPRE)
  common_system_clock = HAL_RCC_GetSysClockFreq() >> (D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_D1CPRE) >> RCC_D1CFGR_D1CPRE_Pos] & 0x1FU);
 800ade2:	f7ff fe81 	bl	800aae8 <HAL_RCC_GetSysClockFreq>
 800ade6:	4602      	mov	r2, r0
 800ade8:	4b10      	ldr	r3, [pc, #64]	@ (800ae2c <HAL_RCC_GetHCLKFreq+0x50>)
 800adea:	699b      	ldr	r3, [r3, #24]
 800adec:	0a1b      	lsrs	r3, r3, #8
 800adee:	f003 030f 	and.w	r3, r3, #15
 800adf2:	490f      	ldr	r1, [pc, #60]	@ (800ae30 <HAL_RCC_GetHCLKFreq+0x54>)
 800adf4:	5ccb      	ldrb	r3, [r1, r3]
 800adf6:	f003 031f 	and.w	r3, r3, #31
 800adfa:	fa22 f303 	lsr.w	r3, r2, r3
 800adfe:	607b      	str	r3, [r7, #4]
#else
  common_system_clock = HAL_RCC_GetSysClockFreq() >> (D1CorePrescTable[(RCC->CDCFGR1 & RCC_CDCFGR1_CDCPRE) >> RCC_CDCFGR1_CDCPRE_Pos] & 0x1FU);
#endif

#if defined(RCC_D1CFGR_HPRE)
  SystemD2Clock = (common_system_clock >> ((D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_HPRE) >> RCC_D1CFGR_HPRE_Pos]) & 0x1FU));
 800ae00:	4b0a      	ldr	r3, [pc, #40]	@ (800ae2c <HAL_RCC_GetHCLKFreq+0x50>)
 800ae02:	699b      	ldr	r3, [r3, #24]
 800ae04:	f003 030f 	and.w	r3, r3, #15
 800ae08:	4a09      	ldr	r2, [pc, #36]	@ (800ae30 <HAL_RCC_GetHCLKFreq+0x54>)
 800ae0a:	5cd3      	ldrb	r3, [r2, r3]
 800ae0c:	f003 031f 	and.w	r3, r3, #31
 800ae10:	687a      	ldr	r2, [r7, #4]
 800ae12:	fa22 f303 	lsr.w	r3, r2, r3
 800ae16:	4a07      	ldr	r2, [pc, #28]	@ (800ae34 <HAL_RCC_GetHCLKFreq+0x58>)
 800ae18:	6013      	str	r3, [r2, #0]
#endif

#if defined(DUAL_CORE) && defined(CORE_CM4)
  SystemCoreClock = SystemD2Clock;
#else
  SystemCoreClock = common_system_clock;
 800ae1a:	4a07      	ldr	r2, [pc, #28]	@ (800ae38 <HAL_RCC_GetHCLKFreq+0x5c>)
 800ae1c:	687b      	ldr	r3, [r7, #4]
 800ae1e:	6013      	str	r3, [r2, #0]
#endif /* DUAL_CORE && CORE_CM4 */

  return SystemD2Clock;
 800ae20:	4b04      	ldr	r3, [pc, #16]	@ (800ae34 <HAL_RCC_GetHCLKFreq+0x58>)
 800ae22:	681b      	ldr	r3, [r3, #0]
}
 800ae24:	4618      	mov	r0, r3
 800ae26:	3708      	adds	r7, #8
 800ae28:	46bd      	mov	sp, r7
 800ae2a:	bd80      	pop	{r7, pc}
 800ae2c:	58024400 	.word	0x58024400
 800ae30:	08031308 	.word	0x08031308
 800ae34:	24000010 	.word	0x24000010
 800ae38:	2400000c 	.word	0x2400000c

0800ae3c <HAL_RCC_GetPCLK1Freq>:
  * @note   Each time PCLK1 changes, this function must be called to update the
  *         right PCLK1 value. Otherwise, any configuration based on this function will be incorrect.
  * @retval PCLK1 frequency
  */
uint32_t HAL_RCC_GetPCLK1Freq(void)
{
 800ae3c:	b580      	push	{r7, lr}
 800ae3e:	af00      	add	r7, sp, #0
#if defined (RCC_D2CFGR_D2PPRE1)
  /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
  return (HAL_RCC_GetHCLKFreq() >> ((D1CorePrescTable[(RCC->D2CFGR & RCC_D2CFGR_D2PPRE1) >> RCC_D2CFGR_D2PPRE1_Pos]) & 0x1FU));
 800ae40:	f7ff ffcc 	bl	800addc <HAL_RCC_GetHCLKFreq>
 800ae44:	4602      	mov	r2, r0
 800ae46:	4b06      	ldr	r3, [pc, #24]	@ (800ae60 <HAL_RCC_GetPCLK1Freq+0x24>)
 800ae48:	69db      	ldr	r3, [r3, #28]
 800ae4a:	091b      	lsrs	r3, r3, #4
 800ae4c:	f003 0307 	and.w	r3, r3, #7
 800ae50:	4904      	ldr	r1, [pc, #16]	@ (800ae64 <HAL_RCC_GetPCLK1Freq+0x28>)
 800ae52:	5ccb      	ldrb	r3, [r1, r3]
 800ae54:	f003 031f 	and.w	r3, r3, #31
 800ae58:	fa22 f303 	lsr.w	r3, r2, r3
#else
  /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
  return (HAL_RCC_GetHCLKFreq() >> ((D1CorePrescTable[(RCC->CDCFGR2 & RCC_CDCFGR2_CDPPRE1) >> RCC_CDCFGR2_CDPPRE1_Pos]) & 0x1FU));
#endif
}
 800ae5c:	4618      	mov	r0, r3
 800ae5e:	bd80      	pop	{r7, pc}
 800ae60:	58024400 	.word	0x58024400
 800ae64:	08031308 	.word	0x08031308

0800ae68 <HAL_RCC_GetPCLK2Freq>:
  * @note   Each time PCLK2 changes, this function must be called to update the
  *         right PCLK2 value. Otherwise, any configuration based on this function will be incorrect.
  * @retval PCLK1 frequency
  */
uint32_t HAL_RCC_GetPCLK2Freq(void)
{
 800ae68:	b580      	push	{r7, lr}
 800ae6a:	af00      	add	r7, sp, #0
  /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
#if defined(RCC_D2CFGR_D2PPRE2)
  return (HAL_RCC_GetHCLKFreq() >> ((D1CorePrescTable[(RCC->D2CFGR & RCC_D2CFGR_D2PPRE2) >> RCC_D2CFGR_D2PPRE2_Pos]) & 0x1FU));
 800ae6c:	f7ff ffb6 	bl	800addc <HAL_RCC_GetHCLKFreq>
 800ae70:	4602      	mov	r2, r0
 800ae72:	4b06      	ldr	r3, [pc, #24]	@ (800ae8c <HAL_RCC_GetPCLK2Freq+0x24>)
 800ae74:	69db      	ldr	r3, [r3, #28]
 800ae76:	0a1b      	lsrs	r3, r3, #8
 800ae78:	f003 0307 	and.w	r3, r3, #7
 800ae7c:	4904      	ldr	r1, [pc, #16]	@ (800ae90 <HAL_RCC_GetPCLK2Freq+0x28>)
 800ae7e:	5ccb      	ldrb	r3, [r1, r3]
 800ae80:	f003 031f 	and.w	r3, r3, #31
 800ae84:	fa22 f303 	lsr.w	r3, r2, r3
#else
  return (HAL_RCC_GetHCLKFreq() >> ((D1CorePrescTable[(RCC->CDCFGR2 & RCC_CDCFGR2_CDPPRE2) >> RCC_CDCFGR2_CDPPRE2_Pos]) & 0x1FU));
#endif
}
 800ae88:	4618      	mov	r0, r3
 800ae8a:	bd80      	pop	{r7, pc}
 800ae8c:	58024400 	.word	0x58024400
 800ae90:	08031308 	.word	0x08031308

0800ae94 <HAL_RCC_GetClockConfig>:
  * will be configured.
  * @param  pFLatency: Pointer on the Flash Latency.
  * @retval None
  */
void HAL_RCC_GetClockConfig(RCC_ClkInitTypeDef  *RCC_ClkInitStruct, uint32_t *pFLatency)
{
 800ae94:	b480      	push	{r7}
 800ae96:	b083      	sub	sp, #12
 800ae98:	af00      	add	r7, sp, #0
 800ae9a:	6078      	str	r0, [r7, #4]
 800ae9c:	6039      	str	r1, [r7, #0]
  /* Set all possible values for the Clock type parameter --------------------*/
  RCC_ClkInitStruct->ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_D1PCLK1 | RCC_CLOCKTYPE_PCLK1 |
 800ae9e:	687b      	ldr	r3, [r7, #4]
 800aea0:	223f      	movs	r2, #63	@ 0x3f
 800aea2:	601a      	str	r2, [r3, #0]
                                 RCC_CLOCKTYPE_PCLK2 |  RCC_CLOCKTYPE_D3PCLK1  ;

  /* Get the SYSCLK configuration --------------------------------------------*/
  RCC_ClkInitStruct->SYSCLKSource = (uint32_t)(RCC->CFGR & RCC_CFGR_SW);
 800aea4:	4b1a      	ldr	r3, [pc, #104]	@ (800af10 <HAL_RCC_GetClockConfig+0x7c>)
 800aea6:	691b      	ldr	r3, [r3, #16]
 800aea8:	f003 0207 	and.w	r2, r3, #7
 800aeac:	687b      	ldr	r3, [r7, #4]
 800aeae:	605a      	str	r2, [r3, #4]

#if defined(RCC_D1CFGR_D1CPRE)
  /* Get the SYSCLK configuration ----------------------------------------------*/
  RCC_ClkInitStruct->SYSCLKDivider = (uint32_t)(RCC->D1CFGR & RCC_D1CFGR_D1CPRE);
 800aeb0:	4b17      	ldr	r3, [pc, #92]	@ (800af10 <HAL_RCC_GetClockConfig+0x7c>)
 800aeb2:	699b      	ldr	r3, [r3, #24]
 800aeb4:	f403 6270 	and.w	r2, r3, #3840	@ 0xf00
 800aeb8:	687b      	ldr	r3, [r7, #4]
 800aeba:	609a      	str	r2, [r3, #8]

  /* Get the D1HCLK configuration ----------------------------------------------*/
  RCC_ClkInitStruct->AHBCLKDivider = (uint32_t)(RCC->D1CFGR & RCC_D1CFGR_HPRE);
 800aebc:	4b14      	ldr	r3, [pc, #80]	@ (800af10 <HAL_RCC_GetClockConfig+0x7c>)
 800aebe:	699b      	ldr	r3, [r3, #24]
 800aec0:	f003 020f 	and.w	r2, r3, #15
 800aec4:	687b      	ldr	r3, [r7, #4]
 800aec6:	60da      	str	r2, [r3, #12]

  /* Get the APB3 configuration ----------------------------------------------*/
  RCC_ClkInitStruct->APB3CLKDivider = (uint32_t)(RCC->D1CFGR & RCC_D1CFGR_D1PPRE);
 800aec8:	4b11      	ldr	r3, [pc, #68]	@ (800af10 <HAL_RCC_GetClockConfig+0x7c>)
 800aeca:	699b      	ldr	r3, [r3, #24]
 800aecc:	f003 0270 	and.w	r2, r3, #112	@ 0x70
 800aed0:	687b      	ldr	r3, [r7, #4]
 800aed2:	611a      	str	r2, [r3, #16]

  /* Get the APB1 configuration ----------------------------------------------*/
  RCC_ClkInitStruct->APB1CLKDivider = (uint32_t)(RCC->D2CFGR & RCC_D2CFGR_D2PPRE1);
 800aed4:	4b0e      	ldr	r3, [pc, #56]	@ (800af10 <HAL_RCC_GetClockConfig+0x7c>)
 800aed6:	69db      	ldr	r3, [r3, #28]
 800aed8:	f003 0270 	and.w	r2, r3, #112	@ 0x70
 800aedc:	687b      	ldr	r3, [r7, #4]
 800aede:	615a      	str	r2, [r3, #20]

  /* Get the APB2 configuration ----------------------------------------------*/
  RCC_ClkInitStruct->APB2CLKDivider = (uint32_t)(RCC->D2CFGR & RCC_D2CFGR_D2PPRE2);
 800aee0:	4b0b      	ldr	r3, [pc, #44]	@ (800af10 <HAL_RCC_GetClockConfig+0x7c>)
 800aee2:	69db      	ldr	r3, [r3, #28]
 800aee4:	f403 62e0 	and.w	r2, r3, #1792	@ 0x700
 800aee8:	687b      	ldr	r3, [r7, #4]
 800aeea:	619a      	str	r2, [r3, #24]

  /* Get the APB4 configuration ----------------------------------------------*/
  RCC_ClkInitStruct->APB4CLKDivider = (uint32_t)(RCC->D3CFGR & RCC_D3CFGR_D3PPRE);
 800aeec:	4b08      	ldr	r3, [pc, #32]	@ (800af10 <HAL_RCC_GetClockConfig+0x7c>)
 800aeee:	6a1b      	ldr	r3, [r3, #32]
 800aef0:	f003 0270 	and.w	r2, r3, #112	@ 0x70
 800aef4:	687b      	ldr	r3, [r7, #4]
 800aef6:	61da      	str	r2, [r3, #28]
  /* Get the APB4 configuration ----------------------------------------------*/
  RCC_ClkInitStruct->APB4CLKDivider = (uint32_t)(RCC->SRDCFGR & RCC_SRDCFGR_SRDPPRE);
#endif

  /* Get the Flash Wait State (Latency) configuration ------------------------*/
  *pFLatency = (uint32_t)(FLASH->ACR & FLASH_ACR_LATENCY);
 800aef8:	4b06      	ldr	r3, [pc, #24]	@ (800af14 <HAL_RCC_GetClockConfig+0x80>)
 800aefa:	681b      	ldr	r3, [r3, #0]
 800aefc:	f003 020f 	and.w	r2, r3, #15
 800af00:	683b      	ldr	r3, [r7, #0]
 800af02:	601a      	str	r2, [r3, #0]
}
 800af04:	bf00      	nop
 800af06:	370c      	adds	r7, #12
 800af08:	46bd      	mov	sp, r7
 800af0a:	f85d 7b04 	ldr.w	r7, [sp], #4
 800af0e:	4770      	bx	lr
 800af10:	58024400 	.word	0x58024400
 800af14:	52002000 	.word	0x52002000

0800af18 <HAL_RCCEx_PeriphCLKConfig>:
  * (*) : Available on some STM32H7 lines only.
  *
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef  *PeriphClkInit)
{
 800af18:	e92d 4fb0 	stmdb	sp!, {r4, r5, r7, r8, r9, sl, fp, lr}
 800af1c:	b0c8      	sub	sp, #288	@ 0x120
 800af1e:	af00      	add	r7, sp, #0
 800af20:	f8c7 010c 	str.w	r0, [r7, #268]	@ 0x10c
  uint32_t tmpreg;
  uint32_t tickstart;
  HAL_StatusTypeDef ret = HAL_OK;      /* Intermediate status */
 800af24:	2300      	movs	r3, #0
 800af26:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
  HAL_StatusTypeDef status = HAL_OK;   /* Final status */
 800af2a:	2300      	movs	r3, #0
 800af2c:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e

  /*---------------------------- SPDIFRX configuration -------------------------------*/

  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SPDIFRX) == RCC_PERIPHCLK_SPDIFRX)
 800af30:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800af34:	e9d3 2300 	ldrd	r2, r3, [r3]
 800af38:	f002 6400 	and.w	r4, r2, #134217728	@ 0x8000000
 800af3c:	2500      	movs	r5, #0
 800af3e:	ea54 0305 	orrs.w	r3, r4, r5
 800af42:	d049      	beq.n	800afd8 <HAL_RCCEx_PeriphCLKConfig+0xc0>
  {

    switch (PeriphClkInit->SpdifrxClockSelection)
 800af44:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800af48:	6e9b      	ldr	r3, [r3, #104]	@ 0x68
 800af4a:	f5b3 1f40 	cmp.w	r3, #3145728	@ 0x300000
 800af4e:	d02f      	beq.n	800afb0 <HAL_RCCEx_PeriphCLKConfig+0x98>
 800af50:	f5b3 1f40 	cmp.w	r3, #3145728	@ 0x300000
 800af54:	d828      	bhi.n	800afa8 <HAL_RCCEx_PeriphCLKConfig+0x90>
 800af56:	f5b3 1f00 	cmp.w	r3, #2097152	@ 0x200000
 800af5a:	d01a      	beq.n	800af92 <HAL_RCCEx_PeriphCLKConfig+0x7a>
 800af5c:	f5b3 1f00 	cmp.w	r3, #2097152	@ 0x200000
 800af60:	d822      	bhi.n	800afa8 <HAL_RCCEx_PeriphCLKConfig+0x90>
 800af62:	2b00      	cmp	r3, #0
 800af64:	d003      	beq.n	800af6e <HAL_RCCEx_PeriphCLKConfig+0x56>
 800af66:	f5b3 1f80 	cmp.w	r3, #1048576	@ 0x100000
 800af6a:	d007      	beq.n	800af7c <HAL_RCCEx_PeriphCLKConfig+0x64>
 800af6c:	e01c      	b.n	800afa8 <HAL_RCCEx_PeriphCLKConfig+0x90>
    {
      case RCC_SPDIFRXCLKSOURCE_PLL:      /* PLL is used as clock source for SPDIFRX*/
        /* Enable PLL1Q Clock output generated form System PLL . */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
 800af6e:	4bb8      	ldr	r3, [pc, #736]	@ (800b250 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800af70:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800af72:	4ab7      	ldr	r2, [pc, #732]	@ (800b250 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800af74:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800af78:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* SPDIFRX clock source configuration done later after clock selection check */
        break;
 800af7a:	e01a      	b.n	800afb2 <HAL_RCCEx_PeriphCLKConfig+0x9a>

      case RCC_SPDIFRXCLKSOURCE_PLL2: /* PLL2 is used as clock source for SPDIFRX*/

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_R_UPDATE);
 800af7c:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800af80:	3308      	adds	r3, #8
 800af82:	2102      	movs	r1, #2
 800af84:	4618      	mov	r0, r3
 800af86:	f001 fc73 	bl	800c870 <RCCEx_PLL2_Config>
 800af8a:	4603      	mov	r3, r0
 800af8c:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SPDIFRX clock source configuration done later after clock selection check */
        break;
 800af90:	e00f      	b.n	800afb2 <HAL_RCCEx_PeriphCLKConfig+0x9a>

      case RCC_SPDIFRXCLKSOURCE_PLL3:  /* PLL3 is used as clock source for SPDIFRX*/
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_R_UPDATE);
 800af92:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800af96:	3328      	adds	r3, #40	@ 0x28
 800af98:	2102      	movs	r1, #2
 800af9a:	4618      	mov	r0, r3
 800af9c:	f001 fd1a 	bl	800c9d4 <RCCEx_PLL3_Config>
 800afa0:	4603      	mov	r3, r0
 800afa2:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SPDIFRX clock source configuration done later after clock selection check */
        break;
 800afa6:	e004      	b.n	800afb2 <HAL_RCCEx_PeriphCLKConfig+0x9a>
        /* Internal OSC clock is used as source of SPDIFRX clock*/
        /* SPDIFRX clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800afa8:	2301      	movs	r3, #1
 800afaa:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800afae:	e000      	b.n	800afb2 <HAL_RCCEx_PeriphCLKConfig+0x9a>
        break;
 800afb0:	bf00      	nop
    }

    if (ret == HAL_OK)
 800afb2:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800afb6:	2b00      	cmp	r3, #0
 800afb8:	d10a      	bne.n	800afd0 <HAL_RCCEx_PeriphCLKConfig+0xb8>
    {
      /* Set the source of SPDIFRX clock*/
      __HAL_RCC_SPDIFRX_CONFIG(PeriphClkInit->SpdifrxClockSelection);
 800afba:	4ba5      	ldr	r3, [pc, #660]	@ (800b250 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800afbc:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800afbe:	f423 1140 	bic.w	r1, r3, #3145728	@ 0x300000
 800afc2:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800afc6:	6e9b      	ldr	r3, [r3, #104]	@ 0x68
 800afc8:	4aa1      	ldr	r2, [pc, #644]	@ (800b250 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800afca:	430b      	orrs	r3, r1
 800afcc:	6513      	str	r3, [r2, #80]	@ 0x50
 800afce:	e003      	b.n	800afd8 <HAL_RCCEx_PeriphCLKConfig+0xc0>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800afd0:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800afd4:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }

  /*---------------------------- SAI1 configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1)
 800afd8:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800afdc:	e9d3 2300 	ldrd	r2, r3, [r3]
 800afe0:	f402 7880 	and.w	r8, r2, #256	@ 0x100
 800afe4:	f04f 0900 	mov.w	r9, #0
 800afe8:	ea58 0309 	orrs.w	r3, r8, r9
 800afec:	d047      	beq.n	800b07e <HAL_RCCEx_PeriphCLKConfig+0x166>
  {
    switch (PeriphClkInit->Sai1ClockSelection)
 800afee:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800aff2:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800aff4:	2b04      	cmp	r3, #4
 800aff6:	d82a      	bhi.n	800b04e <HAL_RCCEx_PeriphCLKConfig+0x136>
 800aff8:	a201      	add	r2, pc, #4	@ (adr r2, 800b000 <HAL_RCCEx_PeriphCLKConfig+0xe8>)
 800affa:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800affe:	bf00      	nop
 800b000:	0800b015 	.word	0x0800b015
 800b004:	0800b023 	.word	0x0800b023
 800b008:	0800b039 	.word	0x0800b039
 800b00c:	0800b057 	.word	0x0800b057
 800b010:	0800b057 	.word	0x0800b057
    {
      case RCC_SAI1CLKSOURCE_PLL:      /* PLL is used as clock source for SAI1*/
        /* Enable SAI Clock output generated form System PLL . */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
 800b014:	4b8e      	ldr	r3, [pc, #568]	@ (800b250 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800b016:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800b018:	4a8d      	ldr	r2, [pc, #564]	@ (800b250 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800b01a:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800b01e:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* SAI1 clock source configuration done later after clock selection check */
        break;
 800b020:	e01a      	b.n	800b058 <HAL_RCCEx_PeriphCLKConfig+0x140>

      case RCC_SAI1CLKSOURCE_PLL2: /* PLL2 is used as clock source for SAI1*/

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
 800b022:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b026:	3308      	adds	r3, #8
 800b028:	2100      	movs	r1, #0
 800b02a:	4618      	mov	r0, r3
 800b02c:	f001 fc20 	bl	800c870 <RCCEx_PLL2_Config>
 800b030:	4603      	mov	r3, r0
 800b032:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SAI1 clock source configuration done later after clock selection check */
        break;
 800b036:	e00f      	b.n	800b058 <HAL_RCCEx_PeriphCLKConfig+0x140>

      case RCC_SAI1CLKSOURCE_PLL3:  /* PLL3 is used as clock source for SAI1*/
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_P_UPDATE);
 800b038:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b03c:	3328      	adds	r3, #40	@ 0x28
 800b03e:	2100      	movs	r1, #0
 800b040:	4618      	mov	r0, r3
 800b042:	f001 fcc7 	bl	800c9d4 <RCCEx_PLL3_Config>
 800b046:	4603      	mov	r3, r0
 800b048:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SAI1 clock source configuration done later after clock selection check */
        break;
 800b04c:	e004      	b.n	800b058 <HAL_RCCEx_PeriphCLKConfig+0x140>
        /* HSI, HSE, or CSI oscillator is used as source of SAI1 clock */
        /* SAI1 clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800b04e:	2301      	movs	r3, #1
 800b050:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800b054:	e000      	b.n	800b058 <HAL_RCCEx_PeriphCLKConfig+0x140>
        break;
 800b056:	bf00      	nop
    }

    if (ret == HAL_OK)
 800b058:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b05c:	2b00      	cmp	r3, #0
 800b05e:	d10a      	bne.n	800b076 <HAL_RCCEx_PeriphCLKConfig+0x15e>
    {
      /* Set the source of SAI1 clock*/
      __HAL_RCC_SAI1_CONFIG(PeriphClkInit->Sai1ClockSelection);
 800b060:	4b7b      	ldr	r3, [pc, #492]	@ (800b250 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800b062:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800b064:	f023 0107 	bic.w	r1, r3, #7
 800b068:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b06c:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800b06e:	4a78      	ldr	r2, [pc, #480]	@ (800b250 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800b070:	430b      	orrs	r3, r1
 800b072:	6513      	str	r3, [r2, #80]	@ 0x50
 800b074:	e003      	b.n	800b07e <HAL_RCCEx_PeriphCLKConfig+0x166>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800b076:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b07a:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }

#if defined(SAI3)
  /*---------------------------- SAI2/3 configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI23) == RCC_PERIPHCLK_SAI23)
 800b07e:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b082:	e9d3 2300 	ldrd	r2, r3, [r3]
 800b086:	f402 7a00 	and.w	sl, r2, #512	@ 0x200
 800b08a:	f04f 0b00 	mov.w	fp, #0
 800b08e:	ea5a 030b 	orrs.w	r3, sl, fp
 800b092:	d04c      	beq.n	800b12e <HAL_RCCEx_PeriphCLKConfig+0x216>
  {
    switch (PeriphClkInit->Sai23ClockSelection)
 800b094:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b098:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 800b09a:	f5b3 7f80 	cmp.w	r3, #256	@ 0x100
 800b09e:	d030      	beq.n	800b102 <HAL_RCCEx_PeriphCLKConfig+0x1ea>
 800b0a0:	f5b3 7f80 	cmp.w	r3, #256	@ 0x100
 800b0a4:	d829      	bhi.n	800b0fa <HAL_RCCEx_PeriphCLKConfig+0x1e2>
 800b0a6:	2bc0      	cmp	r3, #192	@ 0xc0
 800b0a8:	d02d      	beq.n	800b106 <HAL_RCCEx_PeriphCLKConfig+0x1ee>
 800b0aa:	2bc0      	cmp	r3, #192	@ 0xc0
 800b0ac:	d825      	bhi.n	800b0fa <HAL_RCCEx_PeriphCLKConfig+0x1e2>
 800b0ae:	2b80      	cmp	r3, #128	@ 0x80
 800b0b0:	d018      	beq.n	800b0e4 <HAL_RCCEx_PeriphCLKConfig+0x1cc>
 800b0b2:	2b80      	cmp	r3, #128	@ 0x80
 800b0b4:	d821      	bhi.n	800b0fa <HAL_RCCEx_PeriphCLKConfig+0x1e2>
 800b0b6:	2b00      	cmp	r3, #0
 800b0b8:	d002      	beq.n	800b0c0 <HAL_RCCEx_PeriphCLKConfig+0x1a8>
 800b0ba:	2b40      	cmp	r3, #64	@ 0x40
 800b0bc:	d007      	beq.n	800b0ce <HAL_RCCEx_PeriphCLKConfig+0x1b6>
 800b0be:	e01c      	b.n	800b0fa <HAL_RCCEx_PeriphCLKConfig+0x1e2>
    {
      case RCC_SAI23CLKSOURCE_PLL:      /* PLL is used as clock source for SAI2/3 */
        /* Enable SAI Clock output generated form System PLL . */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
 800b0c0:	4b63      	ldr	r3, [pc, #396]	@ (800b250 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800b0c2:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800b0c4:	4a62      	ldr	r2, [pc, #392]	@ (800b250 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800b0c6:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800b0ca:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* SAI2/3 clock source configuration done later after clock selection check */
        break;
 800b0cc:	e01c      	b.n	800b108 <HAL_RCCEx_PeriphCLKConfig+0x1f0>

      case RCC_SAI23CLKSOURCE_PLL2: /* PLL2 is used as clock source for SAI2/3 */

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
 800b0ce:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b0d2:	3308      	adds	r3, #8
 800b0d4:	2100      	movs	r1, #0
 800b0d6:	4618      	mov	r0, r3
 800b0d8:	f001 fbca 	bl	800c870 <RCCEx_PLL2_Config>
 800b0dc:	4603      	mov	r3, r0
 800b0de:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SAI2/3 clock source configuration done later after clock selection check */
        break;
 800b0e2:	e011      	b.n	800b108 <HAL_RCCEx_PeriphCLKConfig+0x1f0>

      case RCC_SAI23CLKSOURCE_PLL3:  /* PLL3 is used as clock source for SAI2/3 */
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_P_UPDATE);
 800b0e4:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b0e8:	3328      	adds	r3, #40	@ 0x28
 800b0ea:	2100      	movs	r1, #0
 800b0ec:	4618      	mov	r0, r3
 800b0ee:	f001 fc71 	bl	800c9d4 <RCCEx_PLL3_Config>
 800b0f2:	4603      	mov	r3, r0
 800b0f4:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SAI2/3 clock source configuration done later after clock selection check */
        break;
 800b0f8:	e006      	b.n	800b108 <HAL_RCCEx_PeriphCLKConfig+0x1f0>
        /* HSI, HSE, or CSI oscillator is used as source of SAI2/3 clock */
        /* SAI2/3 clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800b0fa:	2301      	movs	r3, #1
 800b0fc:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800b100:	e002      	b.n	800b108 <HAL_RCCEx_PeriphCLKConfig+0x1f0>
        break;
 800b102:	bf00      	nop
 800b104:	e000      	b.n	800b108 <HAL_RCCEx_PeriphCLKConfig+0x1f0>
        break;
 800b106:	bf00      	nop
    }

    if (ret == HAL_OK)
 800b108:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b10c:	2b00      	cmp	r3, #0
 800b10e:	d10a      	bne.n	800b126 <HAL_RCCEx_PeriphCLKConfig+0x20e>
    {
      /* Set the source of SAI2/3 clock*/
      __HAL_RCC_SAI23_CONFIG(PeriphClkInit->Sai23ClockSelection);
 800b110:	4b4f      	ldr	r3, [pc, #316]	@ (800b250 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800b112:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800b114:	f423 71e0 	bic.w	r1, r3, #448	@ 0x1c0
 800b118:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b11c:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 800b11e:	4a4c      	ldr	r2, [pc, #304]	@ (800b250 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800b120:	430b      	orrs	r3, r1
 800b122:	6513      	str	r3, [r2, #80]	@ 0x50
 800b124:	e003      	b.n	800b12e <HAL_RCCEx_PeriphCLKConfig+0x216>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800b126:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b12a:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
  }
#endif  /*SAI2B*/

#if defined(SAI4)
  /*---------------------------- SAI4A configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI4A) == RCC_PERIPHCLK_SAI4A)
 800b12e:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b132:	e9d3 2300 	ldrd	r2, r3, [r3]
 800b136:	f402 6380 	and.w	r3, r2, #1024	@ 0x400
 800b13a:	f8c7 3100 	str.w	r3, [r7, #256]	@ 0x100
 800b13e:	2300      	movs	r3, #0
 800b140:	f8c7 3104 	str.w	r3, [r7, #260]	@ 0x104
 800b144:	e9d7 1240 	ldrd	r1, r2, [r7, #256]	@ 0x100
 800b148:	460b      	mov	r3, r1
 800b14a:	4313      	orrs	r3, r2
 800b14c:	d053      	beq.n	800b1f6 <HAL_RCCEx_PeriphCLKConfig+0x2de>
  {
    switch (PeriphClkInit->Sai4AClockSelection)
 800b14e:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b152:	f8d3 30a8 	ldr.w	r3, [r3, #168]	@ 0xa8
 800b156:	f5b3 0f00 	cmp.w	r3, #8388608	@ 0x800000
 800b15a:	d035      	beq.n	800b1c8 <HAL_RCCEx_PeriphCLKConfig+0x2b0>
 800b15c:	f5b3 0f00 	cmp.w	r3, #8388608	@ 0x800000
 800b160:	d82e      	bhi.n	800b1c0 <HAL_RCCEx_PeriphCLKConfig+0x2a8>
 800b162:	f5b3 0fc0 	cmp.w	r3, #6291456	@ 0x600000
 800b166:	d031      	beq.n	800b1cc <HAL_RCCEx_PeriphCLKConfig+0x2b4>
 800b168:	f5b3 0fc0 	cmp.w	r3, #6291456	@ 0x600000
 800b16c:	d828      	bhi.n	800b1c0 <HAL_RCCEx_PeriphCLKConfig+0x2a8>
 800b16e:	f5b3 0f80 	cmp.w	r3, #4194304	@ 0x400000
 800b172:	d01a      	beq.n	800b1aa <HAL_RCCEx_PeriphCLKConfig+0x292>
 800b174:	f5b3 0f80 	cmp.w	r3, #4194304	@ 0x400000
 800b178:	d822      	bhi.n	800b1c0 <HAL_RCCEx_PeriphCLKConfig+0x2a8>
 800b17a:	2b00      	cmp	r3, #0
 800b17c:	d003      	beq.n	800b186 <HAL_RCCEx_PeriphCLKConfig+0x26e>
 800b17e:	f5b3 1f00 	cmp.w	r3, #2097152	@ 0x200000
 800b182:	d007      	beq.n	800b194 <HAL_RCCEx_PeriphCLKConfig+0x27c>
 800b184:	e01c      	b.n	800b1c0 <HAL_RCCEx_PeriphCLKConfig+0x2a8>
    {
      case RCC_SAI4ACLKSOURCE_PLL:      /* PLL is used as clock source for SAI2*/
        /* Enable SAI Clock output generated form System PLL . */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
 800b186:	4b32      	ldr	r3, [pc, #200]	@ (800b250 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800b188:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800b18a:	4a31      	ldr	r2, [pc, #196]	@ (800b250 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800b18c:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800b190:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* SAI1 clock source configuration done later after clock selection check */
        break;
 800b192:	e01c      	b.n	800b1ce <HAL_RCCEx_PeriphCLKConfig+0x2b6>

      case RCC_SAI4ACLKSOURCE_PLL2: /* PLL2 is used as clock source for SAI2*/

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
 800b194:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b198:	3308      	adds	r3, #8
 800b19a:	2100      	movs	r1, #0
 800b19c:	4618      	mov	r0, r3
 800b19e:	f001 fb67 	bl	800c870 <RCCEx_PLL2_Config>
 800b1a2:	4603      	mov	r3, r0
 800b1a4:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SAI2 clock source configuration done later after clock selection check */
        break;
 800b1a8:	e011      	b.n	800b1ce <HAL_RCCEx_PeriphCLKConfig+0x2b6>

      case RCC_SAI4ACLKSOURCE_PLL3:  /* PLL3 is used as clock source for SAI2*/
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_P_UPDATE);
 800b1aa:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b1ae:	3328      	adds	r3, #40	@ 0x28
 800b1b0:	2100      	movs	r1, #0
 800b1b2:	4618      	mov	r0, r3
 800b1b4:	f001 fc0e 	bl	800c9d4 <RCCEx_PLL3_Config>
 800b1b8:	4603      	mov	r3, r0
 800b1ba:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SAI1 clock source configuration done later after clock selection check */
        break;
 800b1be:	e006      	b.n	800b1ce <HAL_RCCEx_PeriphCLKConfig+0x2b6>
        /* SAI4A clock source configuration done later after clock selection check */
        break;
#endif /* RCC_VER_3_0 */

      default:
        ret = HAL_ERROR;
 800b1c0:	2301      	movs	r3, #1
 800b1c2:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800b1c6:	e002      	b.n	800b1ce <HAL_RCCEx_PeriphCLKConfig+0x2b6>
        break;
 800b1c8:	bf00      	nop
 800b1ca:	e000      	b.n	800b1ce <HAL_RCCEx_PeriphCLKConfig+0x2b6>
        break;
 800b1cc:	bf00      	nop
    }

    if (ret == HAL_OK)
 800b1ce:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b1d2:	2b00      	cmp	r3, #0
 800b1d4:	d10b      	bne.n	800b1ee <HAL_RCCEx_PeriphCLKConfig+0x2d6>
    {
      /* Set the source of SAI4A clock*/
      __HAL_RCC_SAI4A_CONFIG(PeriphClkInit->Sai4AClockSelection);
 800b1d6:	4b1e      	ldr	r3, [pc, #120]	@ (800b250 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800b1d8:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800b1da:	f423 0160 	bic.w	r1, r3, #14680064	@ 0xe00000
 800b1de:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b1e2:	f8d3 30a8 	ldr.w	r3, [r3, #168]	@ 0xa8
 800b1e6:	4a1a      	ldr	r2, [pc, #104]	@ (800b250 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800b1e8:	430b      	orrs	r3, r1
 800b1ea:	6593      	str	r3, [r2, #88]	@ 0x58
 800b1ec:	e003      	b.n	800b1f6 <HAL_RCCEx_PeriphCLKConfig+0x2de>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800b1ee:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b1f2:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }
  /*---------------------------- SAI4B configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI4B) == RCC_PERIPHCLK_SAI4B)
 800b1f6:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b1fa:	e9d3 2300 	ldrd	r2, r3, [r3]
 800b1fe:	f402 6300 	and.w	r3, r2, #2048	@ 0x800
 800b202:	f8c7 30f8 	str.w	r3, [r7, #248]	@ 0xf8
 800b206:	2300      	movs	r3, #0
 800b208:	f8c7 30fc 	str.w	r3, [r7, #252]	@ 0xfc
 800b20c:	e9d7 123e 	ldrd	r1, r2, [r7, #248]	@ 0xf8
 800b210:	460b      	mov	r3, r1
 800b212:	4313      	orrs	r3, r2
 800b214:	d056      	beq.n	800b2c4 <HAL_RCCEx_PeriphCLKConfig+0x3ac>
  {
    switch (PeriphClkInit->Sai4BClockSelection)
 800b216:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b21a:	f8d3 30ac 	ldr.w	r3, [r3, #172]	@ 0xac
 800b21e:	f1b3 6f80 	cmp.w	r3, #67108864	@ 0x4000000
 800b222:	d038      	beq.n	800b296 <HAL_RCCEx_PeriphCLKConfig+0x37e>
 800b224:	f1b3 6f80 	cmp.w	r3, #67108864	@ 0x4000000
 800b228:	d831      	bhi.n	800b28e <HAL_RCCEx_PeriphCLKConfig+0x376>
 800b22a:	f1b3 7f40 	cmp.w	r3, #50331648	@ 0x3000000
 800b22e:	d034      	beq.n	800b29a <HAL_RCCEx_PeriphCLKConfig+0x382>
 800b230:	f1b3 7f40 	cmp.w	r3, #50331648	@ 0x3000000
 800b234:	d82b      	bhi.n	800b28e <HAL_RCCEx_PeriphCLKConfig+0x376>
 800b236:	f1b3 7f00 	cmp.w	r3, #33554432	@ 0x2000000
 800b23a:	d01d      	beq.n	800b278 <HAL_RCCEx_PeriphCLKConfig+0x360>
 800b23c:	f1b3 7f00 	cmp.w	r3, #33554432	@ 0x2000000
 800b240:	d825      	bhi.n	800b28e <HAL_RCCEx_PeriphCLKConfig+0x376>
 800b242:	2b00      	cmp	r3, #0
 800b244:	d006      	beq.n	800b254 <HAL_RCCEx_PeriphCLKConfig+0x33c>
 800b246:	f1b3 7f80 	cmp.w	r3, #16777216	@ 0x1000000
 800b24a:	d00a      	beq.n	800b262 <HAL_RCCEx_PeriphCLKConfig+0x34a>
 800b24c:	e01f      	b.n	800b28e <HAL_RCCEx_PeriphCLKConfig+0x376>
 800b24e:	bf00      	nop
 800b250:	58024400 	.word	0x58024400
    {
      case RCC_SAI4BCLKSOURCE_PLL:      /* PLL is used as clock source for SAI2*/
        /* Enable SAI Clock output generated form System PLL . */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
 800b254:	4ba2      	ldr	r3, [pc, #648]	@ (800b4e0 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800b256:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800b258:	4aa1      	ldr	r2, [pc, #644]	@ (800b4e0 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800b25a:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800b25e:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* SAI1 clock source configuration done later after clock selection check */
        break;
 800b260:	e01c      	b.n	800b29c <HAL_RCCEx_PeriphCLKConfig+0x384>

      case RCC_SAI4BCLKSOURCE_PLL2: /* PLL2 is used as clock source for SAI2*/

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
 800b262:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b266:	3308      	adds	r3, #8
 800b268:	2100      	movs	r1, #0
 800b26a:	4618      	mov	r0, r3
 800b26c:	f001 fb00 	bl	800c870 <RCCEx_PLL2_Config>
 800b270:	4603      	mov	r3, r0
 800b272:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SAI2 clock source configuration done later after clock selection check */
        break;
 800b276:	e011      	b.n	800b29c <HAL_RCCEx_PeriphCLKConfig+0x384>

      case RCC_SAI4BCLKSOURCE_PLL3:  /* PLL3 is used as clock source for SAI2*/
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_P_UPDATE);
 800b278:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b27c:	3328      	adds	r3, #40	@ 0x28
 800b27e:	2100      	movs	r1, #0
 800b280:	4618      	mov	r0, r3
 800b282:	f001 fba7 	bl	800c9d4 <RCCEx_PLL3_Config>
 800b286:	4603      	mov	r3, r0
 800b288:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SAI1 clock source configuration done later after clock selection check */
        break;
 800b28c:	e006      	b.n	800b29c <HAL_RCCEx_PeriphCLKConfig+0x384>
        /* SAI4B clock source configuration done later after clock selection check */
        break;
#endif /* RCC_VER_3_0 */

      default:
        ret = HAL_ERROR;
 800b28e:	2301      	movs	r3, #1
 800b290:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800b294:	e002      	b.n	800b29c <HAL_RCCEx_PeriphCLKConfig+0x384>
        break;
 800b296:	bf00      	nop
 800b298:	e000      	b.n	800b29c <HAL_RCCEx_PeriphCLKConfig+0x384>
        break;
 800b29a:	bf00      	nop
    }

    if (ret == HAL_OK)
 800b29c:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b2a0:	2b00      	cmp	r3, #0
 800b2a2:	d10b      	bne.n	800b2bc <HAL_RCCEx_PeriphCLKConfig+0x3a4>
    {
      /* Set the source of SAI4B clock*/
      __HAL_RCC_SAI4B_CONFIG(PeriphClkInit->Sai4BClockSelection);
 800b2a4:	4b8e      	ldr	r3, [pc, #568]	@ (800b4e0 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800b2a6:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800b2a8:	f023 61e0 	bic.w	r1, r3, #117440512	@ 0x7000000
 800b2ac:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b2b0:	f8d3 30ac 	ldr.w	r3, [r3, #172]	@ 0xac
 800b2b4:	4a8a      	ldr	r2, [pc, #552]	@ (800b4e0 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800b2b6:	430b      	orrs	r3, r1
 800b2b8:	6593      	str	r3, [r2, #88]	@ 0x58
 800b2ba:	e003      	b.n	800b2c4 <HAL_RCCEx_PeriphCLKConfig+0x3ac>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800b2bc:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b2c0:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
  }
#endif  /*SAI4*/

#if defined(QUADSPI)
  /*---------------------------- QSPI configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_QSPI) == RCC_PERIPHCLK_QSPI)
 800b2c4:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b2c8:	e9d3 2300 	ldrd	r2, r3, [r3]
 800b2cc:	f002 7300 	and.w	r3, r2, #33554432	@ 0x2000000
 800b2d0:	f8c7 30f0 	str.w	r3, [r7, #240]	@ 0xf0
 800b2d4:	2300      	movs	r3, #0
 800b2d6:	f8c7 30f4 	str.w	r3, [r7, #244]	@ 0xf4
 800b2da:	e9d7 123c 	ldrd	r1, r2, [r7, #240]	@ 0xf0
 800b2de:	460b      	mov	r3, r1
 800b2e0:	4313      	orrs	r3, r2
 800b2e2:	d03a      	beq.n	800b35a <HAL_RCCEx_PeriphCLKConfig+0x442>
  {
    switch (PeriphClkInit->QspiClockSelection)
 800b2e4:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b2e8:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 800b2ea:	2b30      	cmp	r3, #48	@ 0x30
 800b2ec:	d01f      	beq.n	800b32e <HAL_RCCEx_PeriphCLKConfig+0x416>
 800b2ee:	2b30      	cmp	r3, #48	@ 0x30
 800b2f0:	d819      	bhi.n	800b326 <HAL_RCCEx_PeriphCLKConfig+0x40e>
 800b2f2:	2b20      	cmp	r3, #32
 800b2f4:	d00c      	beq.n	800b310 <HAL_RCCEx_PeriphCLKConfig+0x3f8>
 800b2f6:	2b20      	cmp	r3, #32
 800b2f8:	d815      	bhi.n	800b326 <HAL_RCCEx_PeriphCLKConfig+0x40e>
 800b2fa:	2b00      	cmp	r3, #0
 800b2fc:	d019      	beq.n	800b332 <HAL_RCCEx_PeriphCLKConfig+0x41a>
 800b2fe:	2b10      	cmp	r3, #16
 800b300:	d111      	bne.n	800b326 <HAL_RCCEx_PeriphCLKConfig+0x40e>
    {
      case RCC_QSPICLKSOURCE_PLL:      /* PLL is used as clock source for QSPI*/
        /* Enable QSPI Clock output generated form System PLL . */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
 800b302:	4b77      	ldr	r3, [pc, #476]	@ (800b4e0 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800b304:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800b306:	4a76      	ldr	r2, [pc, #472]	@ (800b4e0 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800b308:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800b30c:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* QSPI clock source configuration done later after clock selection check */
        break;
 800b30e:	e011      	b.n	800b334 <HAL_RCCEx_PeriphCLKConfig+0x41c>

      case RCC_QSPICLKSOURCE_PLL2: /* PLL2 is used as clock source for QSPI*/

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_R_UPDATE);
 800b310:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b314:	3308      	adds	r3, #8
 800b316:	2102      	movs	r1, #2
 800b318:	4618      	mov	r0, r3
 800b31a:	f001 faa9 	bl	800c870 <RCCEx_PLL2_Config>
 800b31e:	4603      	mov	r3, r0
 800b320:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* QSPI clock source configuration done later after clock selection check */
        break;
 800b324:	e006      	b.n	800b334 <HAL_RCCEx_PeriphCLKConfig+0x41c>
      case RCC_QSPICLKSOURCE_D1HCLK:
        /* Domain1 HCLK  clock selected as QSPI kernel peripheral clock */
        break;

      default:
        ret = HAL_ERROR;
 800b326:	2301      	movs	r3, #1
 800b328:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800b32c:	e002      	b.n	800b334 <HAL_RCCEx_PeriphCLKConfig+0x41c>
        break;
 800b32e:	bf00      	nop
 800b330:	e000      	b.n	800b334 <HAL_RCCEx_PeriphCLKConfig+0x41c>
        break;
 800b332:	bf00      	nop
    }

    if (ret == HAL_OK)
 800b334:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b338:	2b00      	cmp	r3, #0
 800b33a:	d10a      	bne.n	800b352 <HAL_RCCEx_PeriphCLKConfig+0x43a>
    {
      /* Set the source of QSPI clock*/
      __HAL_RCC_QSPI_CONFIG(PeriphClkInit->QspiClockSelection);
 800b33c:	4b68      	ldr	r3, [pc, #416]	@ (800b4e0 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800b33e:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 800b340:	f023 0130 	bic.w	r1, r3, #48	@ 0x30
 800b344:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b348:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 800b34a:	4a65      	ldr	r2, [pc, #404]	@ (800b4e0 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800b34c:	430b      	orrs	r3, r1
 800b34e:	64d3      	str	r3, [r2, #76]	@ 0x4c
 800b350:	e003      	b.n	800b35a <HAL_RCCEx_PeriphCLKConfig+0x442>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800b352:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b356:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }
#endif  /*OCTOSPI*/

  /*---------------------------- SPI1/2/3 configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SPI123) == RCC_PERIPHCLK_SPI123)
 800b35a:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b35e:	e9d3 2300 	ldrd	r2, r3, [r3]
 800b362:	f402 5380 	and.w	r3, r2, #4096	@ 0x1000
 800b366:	f8c7 30e8 	str.w	r3, [r7, #232]	@ 0xe8
 800b36a:	2300      	movs	r3, #0
 800b36c:	f8c7 30ec 	str.w	r3, [r7, #236]	@ 0xec
 800b370:	e9d7 123a 	ldrd	r1, r2, [r7, #232]	@ 0xe8
 800b374:	460b      	mov	r3, r1
 800b376:	4313      	orrs	r3, r2
 800b378:	d051      	beq.n	800b41e <HAL_RCCEx_PeriphCLKConfig+0x506>
  {
    switch (PeriphClkInit->Spi123ClockSelection)
 800b37a:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b37e:	6e1b      	ldr	r3, [r3, #96]	@ 0x60
 800b380:	f5b3 4f80 	cmp.w	r3, #16384	@ 0x4000
 800b384:	d035      	beq.n	800b3f2 <HAL_RCCEx_PeriphCLKConfig+0x4da>
 800b386:	f5b3 4f80 	cmp.w	r3, #16384	@ 0x4000
 800b38a:	d82e      	bhi.n	800b3ea <HAL_RCCEx_PeriphCLKConfig+0x4d2>
 800b38c:	f5b3 5f40 	cmp.w	r3, #12288	@ 0x3000
 800b390:	d031      	beq.n	800b3f6 <HAL_RCCEx_PeriphCLKConfig+0x4de>
 800b392:	f5b3 5f40 	cmp.w	r3, #12288	@ 0x3000
 800b396:	d828      	bhi.n	800b3ea <HAL_RCCEx_PeriphCLKConfig+0x4d2>
 800b398:	f5b3 5f00 	cmp.w	r3, #8192	@ 0x2000
 800b39c:	d01a      	beq.n	800b3d4 <HAL_RCCEx_PeriphCLKConfig+0x4bc>
 800b39e:	f5b3 5f00 	cmp.w	r3, #8192	@ 0x2000
 800b3a2:	d822      	bhi.n	800b3ea <HAL_RCCEx_PeriphCLKConfig+0x4d2>
 800b3a4:	2b00      	cmp	r3, #0
 800b3a6:	d003      	beq.n	800b3b0 <HAL_RCCEx_PeriphCLKConfig+0x498>
 800b3a8:	f5b3 5f80 	cmp.w	r3, #4096	@ 0x1000
 800b3ac:	d007      	beq.n	800b3be <HAL_RCCEx_PeriphCLKConfig+0x4a6>
 800b3ae:	e01c      	b.n	800b3ea <HAL_RCCEx_PeriphCLKConfig+0x4d2>
    {
      case RCC_SPI123CLKSOURCE_PLL:      /* PLL is used as clock source for SPI1/2/3 */
        /* Enable SPI Clock output generated form System PLL . */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
 800b3b0:	4b4b      	ldr	r3, [pc, #300]	@ (800b4e0 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800b3b2:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800b3b4:	4a4a      	ldr	r2, [pc, #296]	@ (800b4e0 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800b3b6:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800b3ba:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* SPI1/2/3 clock source configuration done later after clock selection check */
        break;
 800b3bc:	e01c      	b.n	800b3f8 <HAL_RCCEx_PeriphCLKConfig+0x4e0>

      case RCC_SPI123CLKSOURCE_PLL2: /* PLL2 is used as clock source for SPI1/2/3 */
        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
 800b3be:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b3c2:	3308      	adds	r3, #8
 800b3c4:	2100      	movs	r1, #0
 800b3c6:	4618      	mov	r0, r3
 800b3c8:	f001 fa52 	bl	800c870 <RCCEx_PLL2_Config>
 800b3cc:	4603      	mov	r3, r0
 800b3ce:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SPI1/2/3 clock source configuration done later after clock selection check */
        break;
 800b3d2:	e011      	b.n	800b3f8 <HAL_RCCEx_PeriphCLKConfig+0x4e0>

      case RCC_SPI123CLKSOURCE_PLL3:  /* PLL3 is used as clock source for SPI1/2/3 */
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_P_UPDATE);
 800b3d4:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b3d8:	3328      	adds	r3, #40	@ 0x28
 800b3da:	2100      	movs	r1, #0
 800b3dc:	4618      	mov	r0, r3
 800b3de:	f001 faf9 	bl	800c9d4 <RCCEx_PLL3_Config>
 800b3e2:	4603      	mov	r3, r0
 800b3e4:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SPI1/2/3 clock source configuration done later after clock selection check */
        break;
 800b3e8:	e006      	b.n	800b3f8 <HAL_RCCEx_PeriphCLKConfig+0x4e0>
        /* HSI, HSE, or CSI oscillator is used as source of SPI1/2/3 clock */
        /* SPI1/2/3 clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800b3ea:	2301      	movs	r3, #1
 800b3ec:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800b3f0:	e002      	b.n	800b3f8 <HAL_RCCEx_PeriphCLKConfig+0x4e0>
        break;
 800b3f2:	bf00      	nop
 800b3f4:	e000      	b.n	800b3f8 <HAL_RCCEx_PeriphCLKConfig+0x4e0>
        break;
 800b3f6:	bf00      	nop
    }

    if (ret == HAL_OK)
 800b3f8:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b3fc:	2b00      	cmp	r3, #0
 800b3fe:	d10a      	bne.n	800b416 <HAL_RCCEx_PeriphCLKConfig+0x4fe>
    {
      /* Set the source of SPI1/2/3 clock*/
      __HAL_RCC_SPI123_CONFIG(PeriphClkInit->Spi123ClockSelection);
 800b400:	4b37      	ldr	r3, [pc, #220]	@ (800b4e0 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800b402:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800b404:	f423 41e0 	bic.w	r1, r3, #28672	@ 0x7000
 800b408:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b40c:	6e1b      	ldr	r3, [r3, #96]	@ 0x60
 800b40e:	4a34      	ldr	r2, [pc, #208]	@ (800b4e0 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800b410:	430b      	orrs	r3, r1
 800b412:	6513      	str	r3, [r2, #80]	@ 0x50
 800b414:	e003      	b.n	800b41e <HAL_RCCEx_PeriphCLKConfig+0x506>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800b416:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b41a:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }

  /*---------------------------- SPI4/5 configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SPI45) == RCC_PERIPHCLK_SPI45)
 800b41e:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b422:	e9d3 2300 	ldrd	r2, r3, [r3]
 800b426:	f402 5300 	and.w	r3, r2, #8192	@ 0x2000
 800b42a:	f8c7 30e0 	str.w	r3, [r7, #224]	@ 0xe0
 800b42e:	2300      	movs	r3, #0
 800b430:	f8c7 30e4 	str.w	r3, [r7, #228]	@ 0xe4
 800b434:	e9d7 1238 	ldrd	r1, r2, [r7, #224]	@ 0xe0
 800b438:	460b      	mov	r3, r1
 800b43a:	4313      	orrs	r3, r2
 800b43c:	d056      	beq.n	800b4ec <HAL_RCCEx_PeriphCLKConfig+0x5d4>
  {
    switch (PeriphClkInit->Spi45ClockSelection)
 800b43e:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b442:	6e5b      	ldr	r3, [r3, #100]	@ 0x64
 800b444:	f5b3 2fa0 	cmp.w	r3, #327680	@ 0x50000
 800b448:	d033      	beq.n	800b4b2 <HAL_RCCEx_PeriphCLKConfig+0x59a>
 800b44a:	f5b3 2fa0 	cmp.w	r3, #327680	@ 0x50000
 800b44e:	d82c      	bhi.n	800b4aa <HAL_RCCEx_PeriphCLKConfig+0x592>
 800b450:	f5b3 2f80 	cmp.w	r3, #262144	@ 0x40000
 800b454:	d02f      	beq.n	800b4b6 <HAL_RCCEx_PeriphCLKConfig+0x59e>
 800b456:	f5b3 2f80 	cmp.w	r3, #262144	@ 0x40000
 800b45a:	d826      	bhi.n	800b4aa <HAL_RCCEx_PeriphCLKConfig+0x592>
 800b45c:	f5b3 3f40 	cmp.w	r3, #196608	@ 0x30000
 800b460:	d02b      	beq.n	800b4ba <HAL_RCCEx_PeriphCLKConfig+0x5a2>
 800b462:	f5b3 3f40 	cmp.w	r3, #196608	@ 0x30000
 800b466:	d820      	bhi.n	800b4aa <HAL_RCCEx_PeriphCLKConfig+0x592>
 800b468:	f5b3 3f00 	cmp.w	r3, #131072	@ 0x20000
 800b46c:	d012      	beq.n	800b494 <HAL_RCCEx_PeriphCLKConfig+0x57c>
 800b46e:	f5b3 3f00 	cmp.w	r3, #131072	@ 0x20000
 800b472:	d81a      	bhi.n	800b4aa <HAL_RCCEx_PeriphCLKConfig+0x592>
 800b474:	2b00      	cmp	r3, #0
 800b476:	d022      	beq.n	800b4be <HAL_RCCEx_PeriphCLKConfig+0x5a6>
 800b478:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 800b47c:	d115      	bne.n	800b4aa <HAL_RCCEx_PeriphCLKConfig+0x592>
        /* SPI4/5 clock source configuration done later after clock selection check */
        break;

      case RCC_SPI45CLKSOURCE_PLL2: /* PLL2 is used as clock source for SPI4/5 */

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_Q_UPDATE);
 800b47e:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b482:	3308      	adds	r3, #8
 800b484:	2101      	movs	r1, #1
 800b486:	4618      	mov	r0, r3
 800b488:	f001 f9f2 	bl	800c870 <RCCEx_PLL2_Config>
 800b48c:	4603      	mov	r3, r0
 800b48e:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SPI4/5 clock source configuration done later after clock selection check */
        break;
 800b492:	e015      	b.n	800b4c0 <HAL_RCCEx_PeriphCLKConfig+0x5a8>
      case RCC_SPI45CLKSOURCE_PLL3:  /* PLL3 is used as clock source for SPI4/5 */
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_Q_UPDATE);
 800b494:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b498:	3328      	adds	r3, #40	@ 0x28
 800b49a:	2101      	movs	r1, #1
 800b49c:	4618      	mov	r0, r3
 800b49e:	f001 fa99 	bl	800c9d4 <RCCEx_PLL3_Config>
 800b4a2:	4603      	mov	r3, r0
 800b4a4:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        /* SPI4/5 clock source configuration done later after clock selection check */
        break;
 800b4a8:	e00a      	b.n	800b4c0 <HAL_RCCEx_PeriphCLKConfig+0x5a8>
        /* HSE,  oscillator is used as source of SPI4/5 clock */
        /* SPI4/5 clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800b4aa:	2301      	movs	r3, #1
 800b4ac:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800b4b0:	e006      	b.n	800b4c0 <HAL_RCCEx_PeriphCLKConfig+0x5a8>
        break;
 800b4b2:	bf00      	nop
 800b4b4:	e004      	b.n	800b4c0 <HAL_RCCEx_PeriphCLKConfig+0x5a8>
        break;
 800b4b6:	bf00      	nop
 800b4b8:	e002      	b.n	800b4c0 <HAL_RCCEx_PeriphCLKConfig+0x5a8>
        break;
 800b4ba:	bf00      	nop
 800b4bc:	e000      	b.n	800b4c0 <HAL_RCCEx_PeriphCLKConfig+0x5a8>
        break;
 800b4be:	bf00      	nop
    }

    if (ret == HAL_OK)
 800b4c0:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b4c4:	2b00      	cmp	r3, #0
 800b4c6:	d10d      	bne.n	800b4e4 <HAL_RCCEx_PeriphCLKConfig+0x5cc>
    {
      /* Set the source of SPI4/5 clock*/
      __HAL_RCC_SPI45_CONFIG(PeriphClkInit->Spi45ClockSelection);
 800b4c8:	4b05      	ldr	r3, [pc, #20]	@ (800b4e0 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800b4ca:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800b4cc:	f423 21e0 	bic.w	r1, r3, #458752	@ 0x70000
 800b4d0:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b4d4:	6e5b      	ldr	r3, [r3, #100]	@ 0x64
 800b4d6:	4a02      	ldr	r2, [pc, #8]	@ (800b4e0 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800b4d8:	430b      	orrs	r3, r1
 800b4da:	6513      	str	r3, [r2, #80]	@ 0x50
 800b4dc:	e006      	b.n	800b4ec <HAL_RCCEx_PeriphCLKConfig+0x5d4>
 800b4de:	bf00      	nop
 800b4e0:	58024400 	.word	0x58024400
    }
    else
    {
      /* set overall return value */
      status = ret;
 800b4e4:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b4e8:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }

  /*---------------------------- SPI6 configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SPI6) == RCC_PERIPHCLK_SPI6)
 800b4ec:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b4f0:	e9d3 2300 	ldrd	r2, r3, [r3]
 800b4f4:	f402 4380 	and.w	r3, r2, #16384	@ 0x4000
 800b4f8:	f8c7 30d8 	str.w	r3, [r7, #216]	@ 0xd8
 800b4fc:	2300      	movs	r3, #0
 800b4fe:	f8c7 30dc 	str.w	r3, [r7, #220]	@ 0xdc
 800b502:	e9d7 1236 	ldrd	r1, r2, [r7, #216]	@ 0xd8
 800b506:	460b      	mov	r3, r1
 800b508:	4313      	orrs	r3, r2
 800b50a:	d055      	beq.n	800b5b8 <HAL_RCCEx_PeriphCLKConfig+0x6a0>
  {
    switch (PeriphClkInit->Spi6ClockSelection)
 800b50c:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b510:	f8d3 30b0 	ldr.w	r3, [r3, #176]	@ 0xb0
 800b514:	f1b3 4fa0 	cmp.w	r3, #1342177280	@ 0x50000000
 800b518:	d033      	beq.n	800b582 <HAL_RCCEx_PeriphCLKConfig+0x66a>
 800b51a:	f1b3 4fa0 	cmp.w	r3, #1342177280	@ 0x50000000
 800b51e:	d82c      	bhi.n	800b57a <HAL_RCCEx_PeriphCLKConfig+0x662>
 800b520:	f1b3 4f80 	cmp.w	r3, #1073741824	@ 0x40000000
 800b524:	d02f      	beq.n	800b586 <HAL_RCCEx_PeriphCLKConfig+0x66e>
 800b526:	f1b3 4f80 	cmp.w	r3, #1073741824	@ 0x40000000
 800b52a:	d826      	bhi.n	800b57a <HAL_RCCEx_PeriphCLKConfig+0x662>
 800b52c:	f1b3 5f40 	cmp.w	r3, #805306368	@ 0x30000000
 800b530:	d02b      	beq.n	800b58a <HAL_RCCEx_PeriphCLKConfig+0x672>
 800b532:	f1b3 5f40 	cmp.w	r3, #805306368	@ 0x30000000
 800b536:	d820      	bhi.n	800b57a <HAL_RCCEx_PeriphCLKConfig+0x662>
 800b538:	f1b3 5f00 	cmp.w	r3, #536870912	@ 0x20000000
 800b53c:	d012      	beq.n	800b564 <HAL_RCCEx_PeriphCLKConfig+0x64c>
 800b53e:	f1b3 5f00 	cmp.w	r3, #536870912	@ 0x20000000
 800b542:	d81a      	bhi.n	800b57a <HAL_RCCEx_PeriphCLKConfig+0x662>
 800b544:	2b00      	cmp	r3, #0
 800b546:	d022      	beq.n	800b58e <HAL_RCCEx_PeriphCLKConfig+0x676>
 800b548:	f1b3 5f80 	cmp.w	r3, #268435456	@ 0x10000000
 800b54c:	d115      	bne.n	800b57a <HAL_RCCEx_PeriphCLKConfig+0x662>
        /* SPI6 clock source configuration done later after clock selection check */
        break;

      case RCC_SPI6CLKSOURCE_PLL2: /* PLL2 is used as clock source for SPI6*/

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_Q_UPDATE);
 800b54e:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b552:	3308      	adds	r3, #8
 800b554:	2101      	movs	r1, #1
 800b556:	4618      	mov	r0, r3
 800b558:	f001 f98a 	bl	800c870 <RCCEx_PLL2_Config>
 800b55c:	4603      	mov	r3, r0
 800b55e:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SPI6 clock source configuration done later after clock selection check */
        break;
 800b562:	e015      	b.n	800b590 <HAL_RCCEx_PeriphCLKConfig+0x678>
      case RCC_SPI6CLKSOURCE_PLL3:  /* PLL3 is used as clock source for SPI6*/
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_Q_UPDATE);
 800b564:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b568:	3328      	adds	r3, #40	@ 0x28
 800b56a:	2101      	movs	r1, #1
 800b56c:	4618      	mov	r0, r3
 800b56e:	f001 fa31 	bl	800c9d4 <RCCEx_PLL3_Config>
 800b572:	4603      	mov	r3, r0
 800b574:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        /* SPI6 clock source configuration done later after clock selection check */
        break;
 800b578:	e00a      	b.n	800b590 <HAL_RCCEx_PeriphCLKConfig+0x678>
        /* SPI6 clock source configuration done later after clock selection check */
        break;
#endif

      default:
        ret = HAL_ERROR;
 800b57a:	2301      	movs	r3, #1
 800b57c:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800b580:	e006      	b.n	800b590 <HAL_RCCEx_PeriphCLKConfig+0x678>
        break;
 800b582:	bf00      	nop
 800b584:	e004      	b.n	800b590 <HAL_RCCEx_PeriphCLKConfig+0x678>
        break;
 800b586:	bf00      	nop
 800b588:	e002      	b.n	800b590 <HAL_RCCEx_PeriphCLKConfig+0x678>
        break;
 800b58a:	bf00      	nop
 800b58c:	e000      	b.n	800b590 <HAL_RCCEx_PeriphCLKConfig+0x678>
        break;
 800b58e:	bf00      	nop
    }

    if (ret == HAL_OK)
 800b590:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b594:	2b00      	cmp	r3, #0
 800b596:	d10b      	bne.n	800b5b0 <HAL_RCCEx_PeriphCLKConfig+0x698>
    {
      /* Set the source of SPI6 clock*/
      __HAL_RCC_SPI6_CONFIG(PeriphClkInit->Spi6ClockSelection);
 800b598:	4ba3      	ldr	r3, [pc, #652]	@ (800b828 <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800b59a:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800b59c:	f023 41e0 	bic.w	r1, r3, #1879048192	@ 0x70000000
 800b5a0:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b5a4:	f8d3 30b0 	ldr.w	r3, [r3, #176]	@ 0xb0
 800b5a8:	4a9f      	ldr	r2, [pc, #636]	@ (800b828 <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800b5aa:	430b      	orrs	r3, r1
 800b5ac:	6593      	str	r3, [r2, #88]	@ 0x58
 800b5ae:	e003      	b.n	800b5b8 <HAL_RCCEx_PeriphCLKConfig+0x6a0>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800b5b0:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b5b4:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
  }
#endif /*DSI*/

#if defined(FDCAN1) || defined(FDCAN2)
  /*---------------------------- FDCAN configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_FDCAN) == RCC_PERIPHCLK_FDCAN)
 800b5b8:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b5bc:	e9d3 2300 	ldrd	r2, r3, [r3]
 800b5c0:	f402 4300 	and.w	r3, r2, #32768	@ 0x8000
 800b5c4:	f8c7 30d0 	str.w	r3, [r7, #208]	@ 0xd0
 800b5c8:	2300      	movs	r3, #0
 800b5ca:	f8c7 30d4 	str.w	r3, [r7, #212]	@ 0xd4
 800b5ce:	e9d7 1234 	ldrd	r1, r2, [r7, #208]	@ 0xd0
 800b5d2:	460b      	mov	r3, r1
 800b5d4:	4313      	orrs	r3, r2
 800b5d6:	d037      	beq.n	800b648 <HAL_RCCEx_PeriphCLKConfig+0x730>
  {
    switch (PeriphClkInit->FdcanClockSelection)
 800b5d8:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b5dc:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800b5de:	f1b3 5f00 	cmp.w	r3, #536870912	@ 0x20000000
 800b5e2:	d00e      	beq.n	800b602 <HAL_RCCEx_PeriphCLKConfig+0x6ea>
 800b5e4:	f1b3 5f00 	cmp.w	r3, #536870912	@ 0x20000000
 800b5e8:	d816      	bhi.n	800b618 <HAL_RCCEx_PeriphCLKConfig+0x700>
 800b5ea:	2b00      	cmp	r3, #0
 800b5ec:	d018      	beq.n	800b620 <HAL_RCCEx_PeriphCLKConfig+0x708>
 800b5ee:	f1b3 5f80 	cmp.w	r3, #268435456	@ 0x10000000
 800b5f2:	d111      	bne.n	800b618 <HAL_RCCEx_PeriphCLKConfig+0x700>
    {
      case RCC_FDCANCLKSOURCE_PLL:      /* PLL is used as clock source for FDCAN*/
        /* Enable FDCAN Clock output generated form System PLL . */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
 800b5f4:	4b8c      	ldr	r3, [pc, #560]	@ (800b828 <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800b5f6:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800b5f8:	4a8b      	ldr	r2, [pc, #556]	@ (800b828 <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800b5fa:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800b5fe:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* FDCAN clock source configuration done later after clock selection check */
        break;
 800b600:	e00f      	b.n	800b622 <HAL_RCCEx_PeriphCLKConfig+0x70a>

      case RCC_FDCANCLKSOURCE_PLL2: /* PLL2 is used as clock source for FDCAN*/

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_Q_UPDATE);
 800b602:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b606:	3308      	adds	r3, #8
 800b608:	2101      	movs	r1, #1
 800b60a:	4618      	mov	r0, r3
 800b60c:	f001 f930 	bl	800c870 <RCCEx_PLL2_Config>
 800b610:	4603      	mov	r3, r0
 800b612:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* FDCAN clock source configuration done later after clock selection check */
        break;
 800b616:	e004      	b.n	800b622 <HAL_RCCEx_PeriphCLKConfig+0x70a>
        /* HSE is used as clock source for FDCAN*/
        /* FDCAN clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800b618:	2301      	movs	r3, #1
 800b61a:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800b61e:	e000      	b.n	800b622 <HAL_RCCEx_PeriphCLKConfig+0x70a>
        break;
 800b620:	bf00      	nop
    }

    if (ret == HAL_OK)
 800b622:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b626:	2b00      	cmp	r3, #0
 800b628:	d10a      	bne.n	800b640 <HAL_RCCEx_PeriphCLKConfig+0x728>
    {
      /* Set the source of FDCAN clock*/
      __HAL_RCC_FDCAN_CONFIG(PeriphClkInit->FdcanClockSelection);
 800b62a:	4b7f      	ldr	r3, [pc, #508]	@ (800b828 <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800b62c:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800b62e:	f023 5140 	bic.w	r1, r3, #805306368	@ 0x30000000
 800b632:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b636:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800b638:	4a7b      	ldr	r2, [pc, #492]	@ (800b828 <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800b63a:	430b      	orrs	r3, r1
 800b63c:	6513      	str	r3, [r2, #80]	@ 0x50
 800b63e:	e003      	b.n	800b648 <HAL_RCCEx_PeriphCLKConfig+0x730>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800b640:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b644:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }
#endif /*FDCAN1 || FDCAN2*/

  /*---------------------------- FMC configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_FMC) == RCC_PERIPHCLK_FMC)
 800b648:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b64c:	e9d3 2300 	ldrd	r2, r3, [r3]
 800b650:	f002 7380 	and.w	r3, r2, #16777216	@ 0x1000000
 800b654:	f8c7 30c8 	str.w	r3, [r7, #200]	@ 0xc8
 800b658:	2300      	movs	r3, #0
 800b65a:	f8c7 30cc 	str.w	r3, [r7, #204]	@ 0xcc
 800b65e:	e9d7 1232 	ldrd	r1, r2, [r7, #200]	@ 0xc8
 800b662:	460b      	mov	r3, r1
 800b664:	4313      	orrs	r3, r2
 800b666:	d039      	beq.n	800b6dc <HAL_RCCEx_PeriphCLKConfig+0x7c4>
  {
    switch (PeriphClkInit->FmcClockSelection)
 800b668:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b66c:	6c9b      	ldr	r3, [r3, #72]	@ 0x48
 800b66e:	2b03      	cmp	r3, #3
 800b670:	d81c      	bhi.n	800b6ac <HAL_RCCEx_PeriphCLKConfig+0x794>
 800b672:	a201      	add	r2, pc, #4	@ (adr r2, 800b678 <HAL_RCCEx_PeriphCLKConfig+0x760>)
 800b674:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800b678:	0800b6b5 	.word	0x0800b6b5
 800b67c:	0800b689 	.word	0x0800b689
 800b680:	0800b697 	.word	0x0800b697
 800b684:	0800b6b5 	.word	0x0800b6b5
    {
      case RCC_FMCCLKSOURCE_PLL:      /* PLL is used as clock source for FMC*/
        /* Enable FMC Clock output generated form System PLL . */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
 800b688:	4b67      	ldr	r3, [pc, #412]	@ (800b828 <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800b68a:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800b68c:	4a66      	ldr	r2, [pc, #408]	@ (800b828 <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800b68e:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800b692:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* FMC clock source configuration done later after clock selection check */
        break;
 800b694:	e00f      	b.n	800b6b6 <HAL_RCCEx_PeriphCLKConfig+0x79e>

      case RCC_FMCCLKSOURCE_PLL2: /* PLL2 is used as clock source for FMC*/

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_R_UPDATE);
 800b696:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b69a:	3308      	adds	r3, #8
 800b69c:	2102      	movs	r1, #2
 800b69e:	4618      	mov	r0, r3
 800b6a0:	f001 f8e6 	bl	800c870 <RCCEx_PLL2_Config>
 800b6a4:	4603      	mov	r3, r0
 800b6a6:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* FMC clock source configuration done later after clock selection check */
        break;
 800b6aa:	e004      	b.n	800b6b6 <HAL_RCCEx_PeriphCLKConfig+0x79e>
      case RCC_FMCCLKSOURCE_HCLK:
        /* D1/CD HCLK  clock selected as FMC kernel peripheral clock */
        break;

      default:
        ret = HAL_ERROR;
 800b6ac:	2301      	movs	r3, #1
 800b6ae:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800b6b2:	e000      	b.n	800b6b6 <HAL_RCCEx_PeriphCLKConfig+0x79e>
        break;
 800b6b4:	bf00      	nop
    }

    if (ret == HAL_OK)
 800b6b6:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b6ba:	2b00      	cmp	r3, #0
 800b6bc:	d10a      	bne.n	800b6d4 <HAL_RCCEx_PeriphCLKConfig+0x7bc>
    {
      /* Set the source of FMC clock*/
      __HAL_RCC_FMC_CONFIG(PeriphClkInit->FmcClockSelection);
 800b6be:	4b5a      	ldr	r3, [pc, #360]	@ (800b828 <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800b6c0:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 800b6c2:	f023 0103 	bic.w	r1, r3, #3
 800b6c6:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b6ca:	6c9b      	ldr	r3, [r3, #72]	@ 0x48
 800b6cc:	4a56      	ldr	r2, [pc, #344]	@ (800b828 <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800b6ce:	430b      	orrs	r3, r1
 800b6d0:	64d3      	str	r3, [r2, #76]	@ 0x4c
 800b6d2:	e003      	b.n	800b6dc <HAL_RCCEx_PeriphCLKConfig+0x7c4>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800b6d4:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b6d8:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }

  /*---------------------------- RTC configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC)
 800b6dc:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b6e0:	e9d3 2300 	ldrd	r2, r3, [r3]
 800b6e4:	f402 0380 	and.w	r3, r2, #4194304	@ 0x400000
 800b6e8:	f8c7 30c0 	str.w	r3, [r7, #192]	@ 0xc0
 800b6ec:	2300      	movs	r3, #0
 800b6ee:	f8c7 30c4 	str.w	r3, [r7, #196]	@ 0xc4
 800b6f2:	e9d7 1230 	ldrd	r1, r2, [r7, #192]	@ 0xc0
 800b6f6:	460b      	mov	r3, r1
 800b6f8:	4313      	orrs	r3, r2
 800b6fa:	f000 809f 	beq.w	800b83c <HAL_RCCEx_PeriphCLKConfig+0x924>
  {
    /* check for RTC Parameters used to output RTCCLK */
    assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection));

    /* Enable write access to Backup domain */
    SET_BIT(PWR->CR1, PWR_CR1_DBP);
 800b6fe:	4b4b      	ldr	r3, [pc, #300]	@ (800b82c <HAL_RCCEx_PeriphCLKConfig+0x914>)
 800b700:	681b      	ldr	r3, [r3, #0]
 800b702:	4a4a      	ldr	r2, [pc, #296]	@ (800b82c <HAL_RCCEx_PeriphCLKConfig+0x914>)
 800b704:	f443 7380 	orr.w	r3, r3, #256	@ 0x100
 800b708:	6013      	str	r3, [r2, #0]

    /* Wait for Backup domain Write protection disable */
    tickstart = HAL_GetTick();
 800b70a:	f7f9 fd99 	bl	8005240 <HAL_GetTick>
 800b70e:	f8c7 0118 	str.w	r0, [r7, #280]	@ 0x118

    while ((PWR->CR1 & PWR_CR1_DBP) == 0U)
 800b712:	e00b      	b.n	800b72c <HAL_RCCEx_PeriphCLKConfig+0x814>
    {
      if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
 800b714:	f7f9 fd94 	bl	8005240 <HAL_GetTick>
 800b718:	4602      	mov	r2, r0
 800b71a:	f8d7 3118 	ldr.w	r3, [r7, #280]	@ 0x118
 800b71e:	1ad3      	subs	r3, r2, r3
 800b720:	2b64      	cmp	r3, #100	@ 0x64
 800b722:	d903      	bls.n	800b72c <HAL_RCCEx_PeriphCLKConfig+0x814>
      {
        ret = HAL_TIMEOUT;
 800b724:	2303      	movs	r3, #3
 800b726:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800b72a:	e005      	b.n	800b738 <HAL_RCCEx_PeriphCLKConfig+0x820>
    while ((PWR->CR1 & PWR_CR1_DBP) == 0U)
 800b72c:	4b3f      	ldr	r3, [pc, #252]	@ (800b82c <HAL_RCCEx_PeriphCLKConfig+0x914>)
 800b72e:	681b      	ldr	r3, [r3, #0]
 800b730:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 800b734:	2b00      	cmp	r3, #0
 800b736:	d0ed      	beq.n	800b714 <HAL_RCCEx_PeriphCLKConfig+0x7fc>
      }
    }

    if (ret == HAL_OK)
 800b738:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b73c:	2b00      	cmp	r3, #0
 800b73e:	d179      	bne.n	800b834 <HAL_RCCEx_PeriphCLKConfig+0x91c>
    {
      /* Reset the Backup domain only if the RTC Clock source selection is modified */
      if ((RCC->BDCR & RCC_BDCR_RTCSEL) != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL))
 800b740:	4b39      	ldr	r3, [pc, #228]	@ (800b828 <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800b742:	6f1a      	ldr	r2, [r3, #112]	@ 0x70
 800b744:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b748:	f8d3 30b4 	ldr.w	r3, [r3, #180]	@ 0xb4
 800b74c:	4053      	eors	r3, r2
 800b74e:	f403 7340 	and.w	r3, r3, #768	@ 0x300
 800b752:	2b00      	cmp	r3, #0
 800b754:	d015      	beq.n	800b782 <HAL_RCCEx_PeriphCLKConfig+0x86a>
      {
        /* Store the content of BDCR register before the reset of Backup Domain */
        tmpreg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL));
 800b756:	4b34      	ldr	r3, [pc, #208]	@ (800b828 <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800b758:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800b75a:	f423 7340 	bic.w	r3, r3, #768	@ 0x300
 800b75e:	f8c7 3114 	str.w	r3, [r7, #276]	@ 0x114
        /* RTC Clock selection can be changed only if the Backup Domain is reset */
        __HAL_RCC_BACKUPRESET_FORCE();
 800b762:	4b31      	ldr	r3, [pc, #196]	@ (800b828 <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800b764:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800b766:	4a30      	ldr	r2, [pc, #192]	@ (800b828 <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800b768:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
 800b76c:	6713      	str	r3, [r2, #112]	@ 0x70
        __HAL_RCC_BACKUPRESET_RELEASE();
 800b76e:	4b2e      	ldr	r3, [pc, #184]	@ (800b828 <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800b770:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800b772:	4a2d      	ldr	r2, [pc, #180]	@ (800b828 <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800b774:	f423 3380 	bic.w	r3, r3, #65536	@ 0x10000
 800b778:	6713      	str	r3, [r2, #112]	@ 0x70
        /* Restore the Content of BDCR register */
        RCC->BDCR = tmpreg;
 800b77a:	4a2b      	ldr	r2, [pc, #172]	@ (800b828 <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800b77c:	f8d7 3114 	ldr.w	r3, [r7, #276]	@ 0x114
 800b780:	6713      	str	r3, [r2, #112]	@ 0x70
      }

      /* If LSE is selected as RTC clock source (and enabled prior to Backup Domain reset), wait for LSE reactivation */
      if (PeriphClkInit->RTCClockSelection == RCC_RTCCLKSOURCE_LSE)
 800b782:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b786:	f8d3 30b4 	ldr.w	r3, [r3, #180]	@ 0xb4
 800b78a:	f5b3 7f80 	cmp.w	r3, #256	@ 0x100
 800b78e:	d118      	bne.n	800b7c2 <HAL_RCCEx_PeriphCLKConfig+0x8aa>
      {
        /* Get Start Tick*/
        tickstart = HAL_GetTick();
 800b790:	f7f9 fd56 	bl	8005240 <HAL_GetTick>
 800b794:	f8c7 0118 	str.w	r0, [r7, #280]	@ 0x118

        /* Wait till LSE is ready */
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == 0U)
 800b798:	e00d      	b.n	800b7b6 <HAL_RCCEx_PeriphCLKConfig+0x89e>
        {
          if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
 800b79a:	f7f9 fd51 	bl	8005240 <HAL_GetTick>
 800b79e:	4602      	mov	r2, r0
 800b7a0:	f8d7 3118 	ldr.w	r3, [r7, #280]	@ 0x118
 800b7a4:	1ad2      	subs	r2, r2, r3
 800b7a6:	f241 3388 	movw	r3, #5000	@ 0x1388
 800b7aa:	429a      	cmp	r2, r3
 800b7ac:	d903      	bls.n	800b7b6 <HAL_RCCEx_PeriphCLKConfig+0x89e>
          {
            ret = HAL_TIMEOUT;
 800b7ae:	2303      	movs	r3, #3
 800b7b0:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
            break;
 800b7b4:	e005      	b.n	800b7c2 <HAL_RCCEx_PeriphCLKConfig+0x8aa>
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == 0U)
 800b7b6:	4b1c      	ldr	r3, [pc, #112]	@ (800b828 <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800b7b8:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800b7ba:	f003 0302 	and.w	r3, r3, #2
 800b7be:	2b00      	cmp	r3, #0
 800b7c0:	d0eb      	beq.n	800b79a <HAL_RCCEx_PeriphCLKConfig+0x882>
          }
        }
      }

      if (ret == HAL_OK)
 800b7c2:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b7c6:	2b00      	cmp	r3, #0
 800b7c8:	d129      	bne.n	800b81e <HAL_RCCEx_PeriphCLKConfig+0x906>
      {
        __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection);
 800b7ca:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b7ce:	f8d3 30b4 	ldr.w	r3, [r3, #180]	@ 0xb4
 800b7d2:	f403 7340 	and.w	r3, r3, #768	@ 0x300
 800b7d6:	f5b3 7f40 	cmp.w	r3, #768	@ 0x300
 800b7da:	d10e      	bne.n	800b7fa <HAL_RCCEx_PeriphCLKConfig+0x8e2>
 800b7dc:	4b12      	ldr	r3, [pc, #72]	@ (800b828 <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800b7de:	691b      	ldr	r3, [r3, #16]
 800b7e0:	f423 517c 	bic.w	r1, r3, #16128	@ 0x3f00
 800b7e4:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b7e8:	f8d3 30b4 	ldr.w	r3, [r3, #180]	@ 0xb4
 800b7ec:	091a      	lsrs	r2, r3, #4
 800b7ee:	4b10      	ldr	r3, [pc, #64]	@ (800b830 <HAL_RCCEx_PeriphCLKConfig+0x918>)
 800b7f0:	4013      	ands	r3, r2
 800b7f2:	4a0d      	ldr	r2, [pc, #52]	@ (800b828 <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800b7f4:	430b      	orrs	r3, r1
 800b7f6:	6113      	str	r3, [r2, #16]
 800b7f8:	e005      	b.n	800b806 <HAL_RCCEx_PeriphCLKConfig+0x8ee>
 800b7fa:	4b0b      	ldr	r3, [pc, #44]	@ (800b828 <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800b7fc:	691b      	ldr	r3, [r3, #16]
 800b7fe:	4a0a      	ldr	r2, [pc, #40]	@ (800b828 <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800b800:	f423 537c 	bic.w	r3, r3, #16128	@ 0x3f00
 800b804:	6113      	str	r3, [r2, #16]
 800b806:	4b08      	ldr	r3, [pc, #32]	@ (800b828 <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800b808:	6f19      	ldr	r1, [r3, #112]	@ 0x70
 800b80a:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b80e:	f8d3 30b4 	ldr.w	r3, [r3, #180]	@ 0xb4
 800b812:	f3c3 030b 	ubfx	r3, r3, #0, #12
 800b816:	4a04      	ldr	r2, [pc, #16]	@ (800b828 <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800b818:	430b      	orrs	r3, r1
 800b81a:	6713      	str	r3, [r2, #112]	@ 0x70
 800b81c:	e00e      	b.n	800b83c <HAL_RCCEx_PeriphCLKConfig+0x924>
      }
      else
      {
        /* set overall return value */
        status = ret;
 800b81e:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b822:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
 800b826:	e009      	b.n	800b83c <HAL_RCCEx_PeriphCLKConfig+0x924>
 800b828:	58024400 	.word	0x58024400
 800b82c:	58024800 	.word	0x58024800
 800b830:	00ffffcf 	.word	0x00ffffcf
      }
    }
    else
    {
      /* set overall return value */
      status = ret;
 800b834:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b838:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }


  /*-------------------------- USART1/6 configuration --------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART16) == RCC_PERIPHCLK_USART16)
 800b83c:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b840:	e9d3 2300 	ldrd	r2, r3, [r3]
 800b844:	f002 0301 	and.w	r3, r2, #1
 800b848:	f8c7 30b8 	str.w	r3, [r7, #184]	@ 0xb8
 800b84c:	2300      	movs	r3, #0
 800b84e:	f8c7 30bc 	str.w	r3, [r7, #188]	@ 0xbc
 800b852:	e9d7 122e 	ldrd	r1, r2, [r7, #184]	@ 0xb8
 800b856:	460b      	mov	r3, r1
 800b858:	4313      	orrs	r3, r2
 800b85a:	f000 8089 	beq.w	800b970 <HAL_RCCEx_PeriphCLKConfig+0xa58>
  {
    switch (PeriphClkInit->Usart16ClockSelection)
 800b85e:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b862:	6fdb      	ldr	r3, [r3, #124]	@ 0x7c
 800b864:	2b28      	cmp	r3, #40	@ 0x28
 800b866:	d86b      	bhi.n	800b940 <HAL_RCCEx_PeriphCLKConfig+0xa28>
 800b868:	a201      	add	r2, pc, #4	@ (adr r2, 800b870 <HAL_RCCEx_PeriphCLKConfig+0x958>)
 800b86a:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800b86e:	bf00      	nop
 800b870:	0800b949 	.word	0x0800b949
 800b874:	0800b941 	.word	0x0800b941
 800b878:	0800b941 	.word	0x0800b941
 800b87c:	0800b941 	.word	0x0800b941
 800b880:	0800b941 	.word	0x0800b941
 800b884:	0800b941 	.word	0x0800b941
 800b888:	0800b941 	.word	0x0800b941
 800b88c:	0800b941 	.word	0x0800b941
 800b890:	0800b915 	.word	0x0800b915
 800b894:	0800b941 	.word	0x0800b941
 800b898:	0800b941 	.word	0x0800b941
 800b89c:	0800b941 	.word	0x0800b941
 800b8a0:	0800b941 	.word	0x0800b941
 800b8a4:	0800b941 	.word	0x0800b941
 800b8a8:	0800b941 	.word	0x0800b941
 800b8ac:	0800b941 	.word	0x0800b941
 800b8b0:	0800b92b 	.word	0x0800b92b
 800b8b4:	0800b941 	.word	0x0800b941
 800b8b8:	0800b941 	.word	0x0800b941
 800b8bc:	0800b941 	.word	0x0800b941
 800b8c0:	0800b941 	.word	0x0800b941
 800b8c4:	0800b941 	.word	0x0800b941
 800b8c8:	0800b941 	.word	0x0800b941
 800b8cc:	0800b941 	.word	0x0800b941
 800b8d0:	0800b949 	.word	0x0800b949
 800b8d4:	0800b941 	.word	0x0800b941
 800b8d8:	0800b941 	.word	0x0800b941
 800b8dc:	0800b941 	.word	0x0800b941
 800b8e0:	0800b941 	.word	0x0800b941
 800b8e4:	0800b941 	.word	0x0800b941
 800b8e8:	0800b941 	.word	0x0800b941
 800b8ec:	0800b941 	.word	0x0800b941
 800b8f0:	0800b949 	.word	0x0800b949
 800b8f4:	0800b941 	.word	0x0800b941
 800b8f8:	0800b941 	.word	0x0800b941
 800b8fc:	0800b941 	.word	0x0800b941
 800b900:	0800b941 	.word	0x0800b941
 800b904:	0800b941 	.word	0x0800b941
 800b908:	0800b941 	.word	0x0800b941
 800b90c:	0800b941 	.word	0x0800b941
 800b910:	0800b949 	.word	0x0800b949
      case RCC_USART16CLKSOURCE_PCLK2: /* CD/D2 PCLK2 as clock source for USART1/6 */
        /* USART1/6 clock source configuration done later after clock selection check */
        break;

      case RCC_USART16CLKSOURCE_PLL2: /* PLL2 is used as clock source for USART1/6 */
        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_Q_UPDATE);
 800b914:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b918:	3308      	adds	r3, #8
 800b91a:	2101      	movs	r1, #1
 800b91c:	4618      	mov	r0, r3
 800b91e:	f000 ffa7 	bl	800c870 <RCCEx_PLL2_Config>
 800b922:	4603      	mov	r3, r0
 800b924:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        /* USART1/6 clock source configuration done later after clock selection check */
        break;
 800b928:	e00f      	b.n	800b94a <HAL_RCCEx_PeriphCLKConfig+0xa32>

      case RCC_USART16CLKSOURCE_PLL3: /* PLL3 is used as clock source for USART1/6 */
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_Q_UPDATE);
 800b92a:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b92e:	3328      	adds	r3, #40	@ 0x28
 800b930:	2101      	movs	r1, #1
 800b932:	4618      	mov	r0, r3
 800b934:	f001 f84e 	bl	800c9d4 <RCCEx_PLL3_Config>
 800b938:	4603      	mov	r3, r0
 800b93a:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        /* USART1/6 clock source configuration done later after clock selection check */
        break;
 800b93e:	e004      	b.n	800b94a <HAL_RCCEx_PeriphCLKConfig+0xa32>
        /* LSE,  oscillator is used as source of USART1/6 clock */
        /* USART1/6 clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800b940:	2301      	movs	r3, #1
 800b942:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800b946:	e000      	b.n	800b94a <HAL_RCCEx_PeriphCLKConfig+0xa32>
        break;
 800b948:	bf00      	nop
    }

    if (ret == HAL_OK)
 800b94a:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b94e:	2b00      	cmp	r3, #0
 800b950:	d10a      	bne.n	800b968 <HAL_RCCEx_PeriphCLKConfig+0xa50>
    {
      /* Set the source of USART1/6 clock */
      __HAL_RCC_USART16_CONFIG(PeriphClkInit->Usart16ClockSelection);
 800b952:	4bbf      	ldr	r3, [pc, #764]	@ (800bc50 <HAL_RCCEx_PeriphCLKConfig+0xd38>)
 800b954:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800b956:	f023 0138 	bic.w	r1, r3, #56	@ 0x38
 800b95a:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b95e:	6fdb      	ldr	r3, [r3, #124]	@ 0x7c
 800b960:	4abb      	ldr	r2, [pc, #748]	@ (800bc50 <HAL_RCCEx_PeriphCLKConfig+0xd38>)
 800b962:	430b      	orrs	r3, r1
 800b964:	6553      	str	r3, [r2, #84]	@ 0x54
 800b966:	e003      	b.n	800b970 <HAL_RCCEx_PeriphCLKConfig+0xa58>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800b968:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b96c:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }

  /*-------------------------- USART2/3/4/5/7/8 Configuration --------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART234578) == RCC_PERIPHCLK_USART234578)
 800b970:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b974:	e9d3 2300 	ldrd	r2, r3, [r3]
 800b978:	f002 0302 	and.w	r3, r2, #2
 800b97c:	f8c7 30b0 	str.w	r3, [r7, #176]	@ 0xb0
 800b980:	2300      	movs	r3, #0
 800b982:	f8c7 30b4 	str.w	r3, [r7, #180]	@ 0xb4
 800b986:	e9d7 122c 	ldrd	r1, r2, [r7, #176]	@ 0xb0
 800b98a:	460b      	mov	r3, r1
 800b98c:	4313      	orrs	r3, r2
 800b98e:	d041      	beq.n	800ba14 <HAL_RCCEx_PeriphCLKConfig+0xafc>
  {
    switch (PeriphClkInit->Usart234578ClockSelection)
 800b990:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b994:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 800b996:	2b05      	cmp	r3, #5
 800b998:	d824      	bhi.n	800b9e4 <HAL_RCCEx_PeriphCLKConfig+0xacc>
 800b99a:	a201      	add	r2, pc, #4	@ (adr r2, 800b9a0 <HAL_RCCEx_PeriphCLKConfig+0xa88>)
 800b99c:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800b9a0:	0800b9ed 	.word	0x0800b9ed
 800b9a4:	0800b9b9 	.word	0x0800b9b9
 800b9a8:	0800b9cf 	.word	0x0800b9cf
 800b9ac:	0800b9ed 	.word	0x0800b9ed
 800b9b0:	0800b9ed 	.word	0x0800b9ed
 800b9b4:	0800b9ed 	.word	0x0800b9ed
      case RCC_USART234578CLKSOURCE_PCLK1: /* CD/D2 PCLK1 as clock source for USART2/3/4/5/7/8 */
        /* USART2/3/4/5/7/8 clock source configuration done later after clock selection check */
        break;

      case RCC_USART234578CLKSOURCE_PLL2: /* PLL2 is used as clock source for USART2/3/4/5/7/8 */
        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_Q_UPDATE);
 800b9b8:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b9bc:	3308      	adds	r3, #8
 800b9be:	2101      	movs	r1, #1
 800b9c0:	4618      	mov	r0, r3
 800b9c2:	f000 ff55 	bl	800c870 <RCCEx_PLL2_Config>
 800b9c6:	4603      	mov	r3, r0
 800b9c8:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        /* USART2/3/4/5/7/8 clock source configuration done later after clock selection check */
        break;
 800b9cc:	e00f      	b.n	800b9ee <HAL_RCCEx_PeriphCLKConfig+0xad6>

      case RCC_USART234578CLKSOURCE_PLL3: /* PLL3 is used as clock source for USART2/3/4/5/7/8 */
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_Q_UPDATE);
 800b9ce:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b9d2:	3328      	adds	r3, #40	@ 0x28
 800b9d4:	2101      	movs	r1, #1
 800b9d6:	4618      	mov	r0, r3
 800b9d8:	f000 fffc 	bl	800c9d4 <RCCEx_PLL3_Config>
 800b9dc:	4603      	mov	r3, r0
 800b9de:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        /* USART2/3/4/5/7/8 clock source configuration done later after clock selection check */
        break;
 800b9e2:	e004      	b.n	800b9ee <HAL_RCCEx_PeriphCLKConfig+0xad6>
        /* LSE,  oscillator is used as source of USART2/3/4/5/7/8 clock */
        /* USART2/3/4/5/7/8 clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800b9e4:	2301      	movs	r3, #1
 800b9e6:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800b9ea:	e000      	b.n	800b9ee <HAL_RCCEx_PeriphCLKConfig+0xad6>
        break;
 800b9ec:	bf00      	nop
    }

    if (ret == HAL_OK)
 800b9ee:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b9f2:	2b00      	cmp	r3, #0
 800b9f4:	d10a      	bne.n	800ba0c <HAL_RCCEx_PeriphCLKConfig+0xaf4>
    {
      /* Set the source of USART2/3/4/5/7/8 clock */
      __HAL_RCC_USART234578_CONFIG(PeriphClkInit->Usart234578ClockSelection);
 800b9f6:	4b96      	ldr	r3, [pc, #600]	@ (800bc50 <HAL_RCCEx_PeriphCLKConfig+0xd38>)
 800b9f8:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800b9fa:	f023 0107 	bic.w	r1, r3, #7
 800b9fe:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800ba02:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 800ba04:	4a92      	ldr	r2, [pc, #584]	@ (800bc50 <HAL_RCCEx_PeriphCLKConfig+0xd38>)
 800ba06:	430b      	orrs	r3, r1
 800ba08:	6553      	str	r3, [r2, #84]	@ 0x54
 800ba0a:	e003      	b.n	800ba14 <HAL_RCCEx_PeriphCLKConfig+0xafc>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800ba0c:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800ba10:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }

  /*-------------------------- LPUART1 Configuration -------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPUART1) == RCC_PERIPHCLK_LPUART1)
 800ba14:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800ba18:	e9d3 2300 	ldrd	r2, r3, [r3]
 800ba1c:	f002 0304 	and.w	r3, r2, #4
 800ba20:	f8c7 30a8 	str.w	r3, [r7, #168]	@ 0xa8
 800ba24:	2300      	movs	r3, #0
 800ba26:	f8c7 30ac 	str.w	r3, [r7, #172]	@ 0xac
 800ba2a:	e9d7 122a 	ldrd	r1, r2, [r7, #168]	@ 0xa8
 800ba2e:	460b      	mov	r3, r1
 800ba30:	4313      	orrs	r3, r2
 800ba32:	d044      	beq.n	800babe <HAL_RCCEx_PeriphCLKConfig+0xba6>
  {
    switch (PeriphClkInit->Lpuart1ClockSelection)
 800ba34:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800ba38:	f8d3 3094 	ldr.w	r3, [r3, #148]	@ 0x94
 800ba3c:	2b05      	cmp	r3, #5
 800ba3e:	d825      	bhi.n	800ba8c <HAL_RCCEx_PeriphCLKConfig+0xb74>
 800ba40:	a201      	add	r2, pc, #4	@ (adr r2, 800ba48 <HAL_RCCEx_PeriphCLKConfig+0xb30>)
 800ba42:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800ba46:	bf00      	nop
 800ba48:	0800ba95 	.word	0x0800ba95
 800ba4c:	0800ba61 	.word	0x0800ba61
 800ba50:	0800ba77 	.word	0x0800ba77
 800ba54:	0800ba95 	.word	0x0800ba95
 800ba58:	0800ba95 	.word	0x0800ba95
 800ba5c:	0800ba95 	.word	0x0800ba95
      case RCC_LPUART1CLKSOURCE_PCLK4: /* SRD/D3 PCLK1 (PCLK4) as clock source for LPUART1 */
        /* LPUART1 clock source configuration done later after clock selection check */
        break;

      case RCC_LPUART1CLKSOURCE_PLL2: /* PLL2 is used as clock source for LPUART1 */
        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_Q_UPDATE);
 800ba60:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800ba64:	3308      	adds	r3, #8
 800ba66:	2101      	movs	r1, #1
 800ba68:	4618      	mov	r0, r3
 800ba6a:	f000 ff01 	bl	800c870 <RCCEx_PLL2_Config>
 800ba6e:	4603      	mov	r3, r0
 800ba70:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        /* LPUART1 clock source configuration done later after clock selection check */
        break;
 800ba74:	e00f      	b.n	800ba96 <HAL_RCCEx_PeriphCLKConfig+0xb7e>

      case RCC_LPUART1CLKSOURCE_PLL3: /* PLL3 is used as clock source for LPUART1 */
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_Q_UPDATE);
 800ba76:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800ba7a:	3328      	adds	r3, #40	@ 0x28
 800ba7c:	2101      	movs	r1, #1
 800ba7e:	4618      	mov	r0, r3
 800ba80:	f000 ffa8 	bl	800c9d4 <RCCEx_PLL3_Config>
 800ba84:	4603      	mov	r3, r0
 800ba86:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        /* LPUART1 clock source configuration done later after clock selection check */
        break;
 800ba8a:	e004      	b.n	800ba96 <HAL_RCCEx_PeriphCLKConfig+0xb7e>
        /* LSE,  oscillator is used as source of LPUART1 clock */
        /* LPUART1 clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800ba8c:	2301      	movs	r3, #1
 800ba8e:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800ba92:	e000      	b.n	800ba96 <HAL_RCCEx_PeriphCLKConfig+0xb7e>
        break;
 800ba94:	bf00      	nop
    }

    if (ret == HAL_OK)
 800ba96:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800ba9a:	2b00      	cmp	r3, #0
 800ba9c:	d10b      	bne.n	800bab6 <HAL_RCCEx_PeriphCLKConfig+0xb9e>
    {
      /* Set the source of LPUART1 clock */
      __HAL_RCC_LPUART1_CONFIG(PeriphClkInit->Lpuart1ClockSelection);
 800ba9e:	4b6c      	ldr	r3, [pc, #432]	@ (800bc50 <HAL_RCCEx_PeriphCLKConfig+0xd38>)
 800baa0:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800baa2:	f023 0107 	bic.w	r1, r3, #7
 800baa6:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800baaa:	f8d3 3094 	ldr.w	r3, [r3, #148]	@ 0x94
 800baae:	4a68      	ldr	r2, [pc, #416]	@ (800bc50 <HAL_RCCEx_PeriphCLKConfig+0xd38>)
 800bab0:	430b      	orrs	r3, r1
 800bab2:	6593      	str	r3, [r2, #88]	@ 0x58
 800bab4:	e003      	b.n	800babe <HAL_RCCEx_PeriphCLKConfig+0xba6>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800bab6:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800baba:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }

  /*---------------------------- LPTIM1 configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPTIM1) == RCC_PERIPHCLK_LPTIM1)
 800babe:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bac2:	e9d3 2300 	ldrd	r2, r3, [r3]
 800bac6:	f002 0320 	and.w	r3, r2, #32
 800baca:	f8c7 30a0 	str.w	r3, [r7, #160]	@ 0xa0
 800bace:	2300      	movs	r3, #0
 800bad0:	f8c7 30a4 	str.w	r3, [r7, #164]	@ 0xa4
 800bad4:	e9d7 1228 	ldrd	r1, r2, [r7, #160]	@ 0xa0
 800bad8:	460b      	mov	r3, r1
 800bada:	4313      	orrs	r3, r2
 800badc:	d055      	beq.n	800bb8a <HAL_RCCEx_PeriphCLKConfig+0xc72>
  {
    switch (PeriphClkInit->Lptim1ClockSelection)
 800bade:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bae2:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800bae6:	f1b3 4fa0 	cmp.w	r3, #1342177280	@ 0x50000000
 800baea:	d033      	beq.n	800bb54 <HAL_RCCEx_PeriphCLKConfig+0xc3c>
 800baec:	f1b3 4fa0 	cmp.w	r3, #1342177280	@ 0x50000000
 800baf0:	d82c      	bhi.n	800bb4c <HAL_RCCEx_PeriphCLKConfig+0xc34>
 800baf2:	f1b3 4f80 	cmp.w	r3, #1073741824	@ 0x40000000
 800baf6:	d02f      	beq.n	800bb58 <HAL_RCCEx_PeriphCLKConfig+0xc40>
 800baf8:	f1b3 4f80 	cmp.w	r3, #1073741824	@ 0x40000000
 800bafc:	d826      	bhi.n	800bb4c <HAL_RCCEx_PeriphCLKConfig+0xc34>
 800bafe:	f1b3 5f40 	cmp.w	r3, #805306368	@ 0x30000000
 800bb02:	d02b      	beq.n	800bb5c <HAL_RCCEx_PeriphCLKConfig+0xc44>
 800bb04:	f1b3 5f40 	cmp.w	r3, #805306368	@ 0x30000000
 800bb08:	d820      	bhi.n	800bb4c <HAL_RCCEx_PeriphCLKConfig+0xc34>
 800bb0a:	f1b3 5f00 	cmp.w	r3, #536870912	@ 0x20000000
 800bb0e:	d012      	beq.n	800bb36 <HAL_RCCEx_PeriphCLKConfig+0xc1e>
 800bb10:	f1b3 5f00 	cmp.w	r3, #536870912	@ 0x20000000
 800bb14:	d81a      	bhi.n	800bb4c <HAL_RCCEx_PeriphCLKConfig+0xc34>
 800bb16:	2b00      	cmp	r3, #0
 800bb18:	d022      	beq.n	800bb60 <HAL_RCCEx_PeriphCLKConfig+0xc48>
 800bb1a:	f1b3 5f80 	cmp.w	r3, #268435456	@ 0x10000000
 800bb1e:	d115      	bne.n	800bb4c <HAL_RCCEx_PeriphCLKConfig+0xc34>
        /* LPTIM1 clock source configuration done later after clock selection check */
        break;

      case RCC_LPTIM1CLKSOURCE_PLL2: /* PLL2 is used as clock source for LPTIM1*/

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
 800bb20:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bb24:	3308      	adds	r3, #8
 800bb26:	2100      	movs	r1, #0
 800bb28:	4618      	mov	r0, r3
 800bb2a:	f000 fea1 	bl	800c870 <RCCEx_PLL2_Config>
 800bb2e:	4603      	mov	r3, r0
 800bb30:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* LPTIM1 clock source configuration done later after clock selection check */
        break;
 800bb34:	e015      	b.n	800bb62 <HAL_RCCEx_PeriphCLKConfig+0xc4a>

      case RCC_LPTIM1CLKSOURCE_PLL3:  /* PLL3 is used as clock source for LPTIM1*/
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_R_UPDATE);
 800bb36:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bb3a:	3328      	adds	r3, #40	@ 0x28
 800bb3c:	2102      	movs	r1, #2
 800bb3e:	4618      	mov	r0, r3
 800bb40:	f000 ff48 	bl	800c9d4 <RCCEx_PLL3_Config>
 800bb44:	4603      	mov	r3, r0
 800bb46:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* LPTIM1 clock source configuration done later after clock selection check */
        break;
 800bb4a:	e00a      	b.n	800bb62 <HAL_RCCEx_PeriphCLKConfig+0xc4a>
        /* HSI, HSE, or CSI oscillator is used as source of LPTIM1 clock */
        /* LPTIM1 clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800bb4c:	2301      	movs	r3, #1
 800bb4e:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800bb52:	e006      	b.n	800bb62 <HAL_RCCEx_PeriphCLKConfig+0xc4a>
        break;
 800bb54:	bf00      	nop
 800bb56:	e004      	b.n	800bb62 <HAL_RCCEx_PeriphCLKConfig+0xc4a>
        break;
 800bb58:	bf00      	nop
 800bb5a:	e002      	b.n	800bb62 <HAL_RCCEx_PeriphCLKConfig+0xc4a>
        break;
 800bb5c:	bf00      	nop
 800bb5e:	e000      	b.n	800bb62 <HAL_RCCEx_PeriphCLKConfig+0xc4a>
        break;
 800bb60:	bf00      	nop
    }

    if (ret == HAL_OK)
 800bb62:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800bb66:	2b00      	cmp	r3, #0
 800bb68:	d10b      	bne.n	800bb82 <HAL_RCCEx_PeriphCLKConfig+0xc6a>
    {
      /* Set the source of LPTIM1 clock*/
      __HAL_RCC_LPTIM1_CONFIG(PeriphClkInit->Lptim1ClockSelection);
 800bb6a:	4b39      	ldr	r3, [pc, #228]	@ (800bc50 <HAL_RCCEx_PeriphCLKConfig+0xd38>)
 800bb6c:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800bb6e:	f023 41e0 	bic.w	r1, r3, #1879048192	@ 0x70000000
 800bb72:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bb76:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800bb7a:	4a35      	ldr	r2, [pc, #212]	@ (800bc50 <HAL_RCCEx_PeriphCLKConfig+0xd38>)
 800bb7c:	430b      	orrs	r3, r1
 800bb7e:	6553      	str	r3, [r2, #84]	@ 0x54
 800bb80:	e003      	b.n	800bb8a <HAL_RCCEx_PeriphCLKConfig+0xc72>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800bb82:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800bb86:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }

  /*---------------------------- LPTIM2 configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPTIM2) == RCC_PERIPHCLK_LPTIM2)
 800bb8a:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bb8e:	e9d3 2300 	ldrd	r2, r3, [r3]
 800bb92:	f002 0340 	and.w	r3, r2, #64	@ 0x40
 800bb96:	f8c7 3098 	str.w	r3, [r7, #152]	@ 0x98
 800bb9a:	2300      	movs	r3, #0
 800bb9c:	f8c7 309c 	str.w	r3, [r7, #156]	@ 0x9c
 800bba0:	e9d7 1226 	ldrd	r1, r2, [r7, #152]	@ 0x98
 800bba4:	460b      	mov	r3, r1
 800bba6:	4313      	orrs	r3, r2
 800bba8:	d058      	beq.n	800bc5c <HAL_RCCEx_PeriphCLKConfig+0xd44>
  {
    switch (PeriphClkInit->Lptim2ClockSelection)
 800bbaa:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bbae:	f8d3 309c 	ldr.w	r3, [r3, #156]	@ 0x9c
 800bbb2:	f5b3 5fa0 	cmp.w	r3, #5120	@ 0x1400
 800bbb6:	d033      	beq.n	800bc20 <HAL_RCCEx_PeriphCLKConfig+0xd08>
 800bbb8:	f5b3 5fa0 	cmp.w	r3, #5120	@ 0x1400
 800bbbc:	d82c      	bhi.n	800bc18 <HAL_RCCEx_PeriphCLKConfig+0xd00>
 800bbbe:	f5b3 5f80 	cmp.w	r3, #4096	@ 0x1000
 800bbc2:	d02f      	beq.n	800bc24 <HAL_RCCEx_PeriphCLKConfig+0xd0c>
 800bbc4:	f5b3 5f80 	cmp.w	r3, #4096	@ 0x1000
 800bbc8:	d826      	bhi.n	800bc18 <HAL_RCCEx_PeriphCLKConfig+0xd00>
 800bbca:	f5b3 6f40 	cmp.w	r3, #3072	@ 0xc00
 800bbce:	d02b      	beq.n	800bc28 <HAL_RCCEx_PeriphCLKConfig+0xd10>
 800bbd0:	f5b3 6f40 	cmp.w	r3, #3072	@ 0xc00
 800bbd4:	d820      	bhi.n	800bc18 <HAL_RCCEx_PeriphCLKConfig+0xd00>
 800bbd6:	f5b3 6f00 	cmp.w	r3, #2048	@ 0x800
 800bbda:	d012      	beq.n	800bc02 <HAL_RCCEx_PeriphCLKConfig+0xcea>
 800bbdc:	f5b3 6f00 	cmp.w	r3, #2048	@ 0x800
 800bbe0:	d81a      	bhi.n	800bc18 <HAL_RCCEx_PeriphCLKConfig+0xd00>
 800bbe2:	2b00      	cmp	r3, #0
 800bbe4:	d022      	beq.n	800bc2c <HAL_RCCEx_PeriphCLKConfig+0xd14>
 800bbe6:	f5b3 6f80 	cmp.w	r3, #1024	@ 0x400
 800bbea:	d115      	bne.n	800bc18 <HAL_RCCEx_PeriphCLKConfig+0xd00>
        /* LPTIM2 clock source configuration done later after clock selection check */
        break;

      case RCC_LPTIM2CLKSOURCE_PLL2: /* PLL2 is used as clock source for LPTIM2*/

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
 800bbec:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bbf0:	3308      	adds	r3, #8
 800bbf2:	2100      	movs	r1, #0
 800bbf4:	4618      	mov	r0, r3
 800bbf6:	f000 fe3b 	bl	800c870 <RCCEx_PLL2_Config>
 800bbfa:	4603      	mov	r3, r0
 800bbfc:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* LPTIM2 clock source configuration done later after clock selection check */
        break;
 800bc00:	e015      	b.n	800bc2e <HAL_RCCEx_PeriphCLKConfig+0xd16>

      case RCC_LPTIM2CLKSOURCE_PLL3:  /* PLL3 is used as clock source for LPTIM2*/
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_R_UPDATE);
 800bc02:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bc06:	3328      	adds	r3, #40	@ 0x28
 800bc08:	2102      	movs	r1, #2
 800bc0a:	4618      	mov	r0, r3
 800bc0c:	f000 fee2 	bl	800c9d4 <RCCEx_PLL3_Config>
 800bc10:	4603      	mov	r3, r0
 800bc12:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* LPTIM2 clock source configuration done later after clock selection check */
        break;
 800bc16:	e00a      	b.n	800bc2e <HAL_RCCEx_PeriphCLKConfig+0xd16>
        /* HSI, HSE, or CSI oscillator is used as source of LPTIM2 clock */
        /* LPTIM2 clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800bc18:	2301      	movs	r3, #1
 800bc1a:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800bc1e:	e006      	b.n	800bc2e <HAL_RCCEx_PeriphCLKConfig+0xd16>
        break;
 800bc20:	bf00      	nop
 800bc22:	e004      	b.n	800bc2e <HAL_RCCEx_PeriphCLKConfig+0xd16>
        break;
 800bc24:	bf00      	nop
 800bc26:	e002      	b.n	800bc2e <HAL_RCCEx_PeriphCLKConfig+0xd16>
        break;
 800bc28:	bf00      	nop
 800bc2a:	e000      	b.n	800bc2e <HAL_RCCEx_PeriphCLKConfig+0xd16>
        break;
 800bc2c:	bf00      	nop
    }

    if (ret == HAL_OK)
 800bc2e:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800bc32:	2b00      	cmp	r3, #0
 800bc34:	d10e      	bne.n	800bc54 <HAL_RCCEx_PeriphCLKConfig+0xd3c>
    {
      /* Set the source of LPTIM2 clock*/
      __HAL_RCC_LPTIM2_CONFIG(PeriphClkInit->Lptim2ClockSelection);
 800bc36:	4b06      	ldr	r3, [pc, #24]	@ (800bc50 <HAL_RCCEx_PeriphCLKConfig+0xd38>)
 800bc38:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800bc3a:	f423 51e0 	bic.w	r1, r3, #7168	@ 0x1c00
 800bc3e:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bc42:	f8d3 309c 	ldr.w	r3, [r3, #156]	@ 0x9c
 800bc46:	4a02      	ldr	r2, [pc, #8]	@ (800bc50 <HAL_RCCEx_PeriphCLKConfig+0xd38>)
 800bc48:	430b      	orrs	r3, r1
 800bc4a:	6593      	str	r3, [r2, #88]	@ 0x58
 800bc4c:	e006      	b.n	800bc5c <HAL_RCCEx_PeriphCLKConfig+0xd44>
 800bc4e:	bf00      	nop
 800bc50:	58024400 	.word	0x58024400
    }
    else
    {
      /* set overall return value */
      status = ret;
 800bc54:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800bc58:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }

  /*---------------------------- LPTIM345 configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPTIM345) == RCC_PERIPHCLK_LPTIM345)
 800bc5c:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bc60:	e9d3 2300 	ldrd	r2, r3, [r3]
 800bc64:	f002 0380 	and.w	r3, r2, #128	@ 0x80
 800bc68:	f8c7 3090 	str.w	r3, [r7, #144]	@ 0x90
 800bc6c:	2300      	movs	r3, #0
 800bc6e:	f8c7 3094 	str.w	r3, [r7, #148]	@ 0x94
 800bc72:	e9d7 1224 	ldrd	r1, r2, [r7, #144]	@ 0x90
 800bc76:	460b      	mov	r3, r1
 800bc78:	4313      	orrs	r3, r2
 800bc7a:	d055      	beq.n	800bd28 <HAL_RCCEx_PeriphCLKConfig+0xe10>
  {
    switch (PeriphClkInit->Lptim345ClockSelection)
 800bc7c:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bc80:	f8d3 30a0 	ldr.w	r3, [r3, #160]	@ 0xa0
 800bc84:	f5b3 4f20 	cmp.w	r3, #40960	@ 0xa000
 800bc88:	d033      	beq.n	800bcf2 <HAL_RCCEx_PeriphCLKConfig+0xdda>
 800bc8a:	f5b3 4f20 	cmp.w	r3, #40960	@ 0xa000
 800bc8e:	d82c      	bhi.n	800bcea <HAL_RCCEx_PeriphCLKConfig+0xdd2>
 800bc90:	f5b3 4f00 	cmp.w	r3, #32768	@ 0x8000
 800bc94:	d02f      	beq.n	800bcf6 <HAL_RCCEx_PeriphCLKConfig+0xdde>
 800bc96:	f5b3 4f00 	cmp.w	r3, #32768	@ 0x8000
 800bc9a:	d826      	bhi.n	800bcea <HAL_RCCEx_PeriphCLKConfig+0xdd2>
 800bc9c:	f5b3 4fc0 	cmp.w	r3, #24576	@ 0x6000
 800bca0:	d02b      	beq.n	800bcfa <HAL_RCCEx_PeriphCLKConfig+0xde2>
 800bca2:	f5b3 4fc0 	cmp.w	r3, #24576	@ 0x6000
 800bca6:	d820      	bhi.n	800bcea <HAL_RCCEx_PeriphCLKConfig+0xdd2>
 800bca8:	f5b3 4f80 	cmp.w	r3, #16384	@ 0x4000
 800bcac:	d012      	beq.n	800bcd4 <HAL_RCCEx_PeriphCLKConfig+0xdbc>
 800bcae:	f5b3 4f80 	cmp.w	r3, #16384	@ 0x4000
 800bcb2:	d81a      	bhi.n	800bcea <HAL_RCCEx_PeriphCLKConfig+0xdd2>
 800bcb4:	2b00      	cmp	r3, #0
 800bcb6:	d022      	beq.n	800bcfe <HAL_RCCEx_PeriphCLKConfig+0xde6>
 800bcb8:	f5b3 5f00 	cmp.w	r3, #8192	@ 0x2000
 800bcbc:	d115      	bne.n	800bcea <HAL_RCCEx_PeriphCLKConfig+0xdd2>
      case RCC_LPTIM345CLKSOURCE_PCLK4:      /* SRD/D3 PCLK1 (PCLK4) as clock source for LPTIM3/4/5 */
        /* LPTIM3/4/5 clock source configuration done later after clock selection check */
        break;

      case RCC_LPTIM345CLKSOURCE_PLL2: /* PLL2 is used as clock source for LPTIM3/4/5 */
        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
 800bcbe:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bcc2:	3308      	adds	r3, #8
 800bcc4:	2100      	movs	r1, #0
 800bcc6:	4618      	mov	r0, r3
 800bcc8:	f000 fdd2 	bl	800c870 <RCCEx_PLL2_Config>
 800bccc:	4603      	mov	r3, r0
 800bcce:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* LPTIM3/4/5 clock source configuration done later after clock selection check */
        break;
 800bcd2:	e015      	b.n	800bd00 <HAL_RCCEx_PeriphCLKConfig+0xde8>

      case RCC_LPTIM345CLKSOURCE_PLL3:  /* PLL3 is used as clock source for LPTIM3/4/5 */
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_R_UPDATE);
 800bcd4:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bcd8:	3328      	adds	r3, #40	@ 0x28
 800bcda:	2102      	movs	r1, #2
 800bcdc:	4618      	mov	r0, r3
 800bcde:	f000 fe79 	bl	800c9d4 <RCCEx_PLL3_Config>
 800bce2:	4603      	mov	r3, r0
 800bce4:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* LPTIM3/4/5 clock source configuration done later after clock selection check */
        break;
 800bce8:	e00a      	b.n	800bd00 <HAL_RCCEx_PeriphCLKConfig+0xde8>
        /* HSI, HSE, or CSI oscillator is used as source of LPTIM3/4/5 clock */
        /* LPTIM3/4/5 clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800bcea:	2301      	movs	r3, #1
 800bcec:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800bcf0:	e006      	b.n	800bd00 <HAL_RCCEx_PeriphCLKConfig+0xde8>
        break;
 800bcf2:	bf00      	nop
 800bcf4:	e004      	b.n	800bd00 <HAL_RCCEx_PeriphCLKConfig+0xde8>
        break;
 800bcf6:	bf00      	nop
 800bcf8:	e002      	b.n	800bd00 <HAL_RCCEx_PeriphCLKConfig+0xde8>
        break;
 800bcfa:	bf00      	nop
 800bcfc:	e000      	b.n	800bd00 <HAL_RCCEx_PeriphCLKConfig+0xde8>
        break;
 800bcfe:	bf00      	nop
    }

    if (ret == HAL_OK)
 800bd00:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800bd04:	2b00      	cmp	r3, #0
 800bd06:	d10b      	bne.n	800bd20 <HAL_RCCEx_PeriphCLKConfig+0xe08>
    {
      /* Set the source of LPTIM3/4/5 clock */
      __HAL_RCC_LPTIM345_CONFIG(PeriphClkInit->Lptim345ClockSelection);
 800bd08:	4bbb      	ldr	r3, [pc, #748]	@ (800bff8 <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800bd0a:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800bd0c:	f423 4160 	bic.w	r1, r3, #57344	@ 0xe000
 800bd10:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bd14:	f8d3 30a0 	ldr.w	r3, [r3, #160]	@ 0xa0
 800bd18:	4ab7      	ldr	r2, [pc, #732]	@ (800bff8 <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800bd1a:	430b      	orrs	r3, r1
 800bd1c:	6593      	str	r3, [r2, #88]	@ 0x58
 800bd1e:	e003      	b.n	800bd28 <HAL_RCCEx_PeriphCLKConfig+0xe10>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800bd20:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800bd24:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e

    __HAL_RCC_I2C1235_CONFIG(PeriphClkInit->I2c1235ClockSelection);

  }
#else
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C123) == RCC_PERIPHCLK_I2C123)
 800bd28:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bd2c:	e9d3 2300 	ldrd	r2, r3, [r3]
 800bd30:	f002 0308 	and.w	r3, r2, #8
 800bd34:	f8c7 3088 	str.w	r3, [r7, #136]	@ 0x88
 800bd38:	2300      	movs	r3, #0
 800bd3a:	f8c7 308c 	str.w	r3, [r7, #140]	@ 0x8c
 800bd3e:	e9d7 1222 	ldrd	r1, r2, [r7, #136]	@ 0x88
 800bd42:	460b      	mov	r3, r1
 800bd44:	4313      	orrs	r3, r2
 800bd46:	d01e      	beq.n	800bd86 <HAL_RCCEx_PeriphCLKConfig+0xe6e>
  {
    /* Check the parameters */
    assert_param(IS_RCC_I2C123CLKSOURCE(PeriphClkInit->I2c123ClockSelection));

    if ((PeriphClkInit->I2c123ClockSelection) == RCC_I2C123CLKSOURCE_PLL3)
 800bd48:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bd4c:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 800bd50:	f5b3 5f80 	cmp.w	r3, #4096	@ 0x1000
 800bd54:	d10c      	bne.n	800bd70 <HAL_RCCEx_PeriphCLKConfig+0xe58>
    {
      if (RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_R_UPDATE) != HAL_OK)
 800bd56:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bd5a:	3328      	adds	r3, #40	@ 0x28
 800bd5c:	2102      	movs	r1, #2
 800bd5e:	4618      	mov	r0, r3
 800bd60:	f000 fe38 	bl	800c9d4 <RCCEx_PLL3_Config>
 800bd64:	4603      	mov	r3, r0
 800bd66:	2b00      	cmp	r3, #0
 800bd68:	d002      	beq.n	800bd70 <HAL_RCCEx_PeriphCLKConfig+0xe58>
      {
        status = HAL_ERROR;
 800bd6a:	2301      	movs	r3, #1
 800bd6c:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
      }
    }

    __HAL_RCC_I2C123_CONFIG(PeriphClkInit->I2c123ClockSelection);
 800bd70:	4ba1      	ldr	r3, [pc, #644]	@ (800bff8 <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800bd72:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800bd74:	f423 5140 	bic.w	r1, r3, #12288	@ 0x3000
 800bd78:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bd7c:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 800bd80:	4a9d      	ldr	r2, [pc, #628]	@ (800bff8 <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800bd82:	430b      	orrs	r3, r1
 800bd84:	6553      	str	r3, [r2, #84]	@ 0x54

  }
#endif /* I2C5 */

  /*------------------------------ I2C4 Configuration ------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C4) == RCC_PERIPHCLK_I2C4)
 800bd86:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bd8a:	e9d3 2300 	ldrd	r2, r3, [r3]
 800bd8e:	f002 0310 	and.w	r3, r2, #16
 800bd92:	f8c7 3080 	str.w	r3, [r7, #128]	@ 0x80
 800bd96:	2300      	movs	r3, #0
 800bd98:	f8c7 3084 	str.w	r3, [r7, #132]	@ 0x84
 800bd9c:	e9d7 1220 	ldrd	r1, r2, [r7, #128]	@ 0x80
 800bda0:	460b      	mov	r3, r1
 800bda2:	4313      	orrs	r3, r2
 800bda4:	d01e      	beq.n	800bde4 <HAL_RCCEx_PeriphCLKConfig+0xecc>
  {
    /* Check the parameters */
    assert_param(IS_RCC_I2C4CLKSOURCE(PeriphClkInit->I2c4ClockSelection));

    if ((PeriphClkInit->I2c4ClockSelection) == RCC_I2C4CLKSOURCE_PLL3)
 800bda6:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bdaa:	f8d3 3098 	ldr.w	r3, [r3, #152]	@ 0x98
 800bdae:	f5b3 7f80 	cmp.w	r3, #256	@ 0x100
 800bdb2:	d10c      	bne.n	800bdce <HAL_RCCEx_PeriphCLKConfig+0xeb6>
    {
      if (RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_R_UPDATE) != HAL_OK)
 800bdb4:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bdb8:	3328      	adds	r3, #40	@ 0x28
 800bdba:	2102      	movs	r1, #2
 800bdbc:	4618      	mov	r0, r3
 800bdbe:	f000 fe09 	bl	800c9d4 <RCCEx_PLL3_Config>
 800bdc2:	4603      	mov	r3, r0
 800bdc4:	2b00      	cmp	r3, #0
 800bdc6:	d002      	beq.n	800bdce <HAL_RCCEx_PeriphCLKConfig+0xeb6>
      {
        status = HAL_ERROR;
 800bdc8:	2301      	movs	r3, #1
 800bdca:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
      }
    }

    __HAL_RCC_I2C4_CONFIG(PeriphClkInit->I2c4ClockSelection);
 800bdce:	4b8a      	ldr	r3, [pc, #552]	@ (800bff8 <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800bdd0:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800bdd2:	f423 7140 	bic.w	r1, r3, #768	@ 0x300
 800bdd6:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bdda:	f8d3 3098 	ldr.w	r3, [r3, #152]	@ 0x98
 800bdde:	4a86      	ldr	r2, [pc, #536]	@ (800bff8 <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800bde0:	430b      	orrs	r3, r1
 800bde2:	6593      	str	r3, [r2, #88]	@ 0x58

  }

  /*---------------------------- ADC configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC)
 800bde4:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bde8:	e9d3 2300 	ldrd	r2, r3, [r3]
 800bdec:	f402 2300 	and.w	r3, r2, #524288	@ 0x80000
 800bdf0:	67bb      	str	r3, [r7, #120]	@ 0x78
 800bdf2:	2300      	movs	r3, #0
 800bdf4:	67fb      	str	r3, [r7, #124]	@ 0x7c
 800bdf6:	e9d7 121e 	ldrd	r1, r2, [r7, #120]	@ 0x78
 800bdfa:	460b      	mov	r3, r1
 800bdfc:	4313      	orrs	r3, r2
 800bdfe:	d03e      	beq.n	800be7e <HAL_RCCEx_PeriphCLKConfig+0xf66>
  {
    switch (PeriphClkInit->AdcClockSelection)
 800be00:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800be04:	f8d3 30a4 	ldr.w	r3, [r3, #164]	@ 0xa4
 800be08:	f5b3 3f00 	cmp.w	r3, #131072	@ 0x20000
 800be0c:	d022      	beq.n	800be54 <HAL_RCCEx_PeriphCLKConfig+0xf3c>
 800be0e:	f5b3 3f00 	cmp.w	r3, #131072	@ 0x20000
 800be12:	d81b      	bhi.n	800be4c <HAL_RCCEx_PeriphCLKConfig+0xf34>
 800be14:	2b00      	cmp	r3, #0
 800be16:	d003      	beq.n	800be20 <HAL_RCCEx_PeriphCLKConfig+0xf08>
 800be18:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 800be1c:	d00b      	beq.n	800be36 <HAL_RCCEx_PeriphCLKConfig+0xf1e>
 800be1e:	e015      	b.n	800be4c <HAL_RCCEx_PeriphCLKConfig+0xf34>
    {

      case RCC_ADCCLKSOURCE_PLL2: /* PLL2 is used as clock source for ADC*/

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
 800be20:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800be24:	3308      	adds	r3, #8
 800be26:	2100      	movs	r1, #0
 800be28:	4618      	mov	r0, r3
 800be2a:	f000 fd21 	bl	800c870 <RCCEx_PLL2_Config>
 800be2e:	4603      	mov	r3, r0
 800be30:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* ADC clock source configuration done later after clock selection check */
        break;
 800be34:	e00f      	b.n	800be56 <HAL_RCCEx_PeriphCLKConfig+0xf3e>

      case RCC_ADCCLKSOURCE_PLL3:  /* PLL3 is used as clock source for ADC*/
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_R_UPDATE);
 800be36:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800be3a:	3328      	adds	r3, #40	@ 0x28
 800be3c:	2102      	movs	r1, #2
 800be3e:	4618      	mov	r0, r3
 800be40:	f000 fdc8 	bl	800c9d4 <RCCEx_PLL3_Config>
 800be44:	4603      	mov	r3, r0
 800be46:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* ADC clock source configuration done later after clock selection check */
        break;
 800be4a:	e004      	b.n	800be56 <HAL_RCCEx_PeriphCLKConfig+0xf3e>
        /* HSI, HSE, or CSI oscillator is used as source of ADC clock */
        /* ADC clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800be4c:	2301      	movs	r3, #1
 800be4e:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800be52:	e000      	b.n	800be56 <HAL_RCCEx_PeriphCLKConfig+0xf3e>
        break;
 800be54:	bf00      	nop
    }

    if (ret == HAL_OK)
 800be56:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800be5a:	2b00      	cmp	r3, #0
 800be5c:	d10b      	bne.n	800be76 <HAL_RCCEx_PeriphCLKConfig+0xf5e>
    {
      /* Set the source of ADC clock*/
      __HAL_RCC_ADC_CONFIG(PeriphClkInit->AdcClockSelection);
 800be5e:	4b66      	ldr	r3, [pc, #408]	@ (800bff8 <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800be60:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800be62:	f423 3140 	bic.w	r1, r3, #196608	@ 0x30000
 800be66:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800be6a:	f8d3 30a4 	ldr.w	r3, [r3, #164]	@ 0xa4
 800be6e:	4a62      	ldr	r2, [pc, #392]	@ (800bff8 <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800be70:	430b      	orrs	r3, r1
 800be72:	6593      	str	r3, [r2, #88]	@ 0x58
 800be74:	e003      	b.n	800be7e <HAL_RCCEx_PeriphCLKConfig+0xf66>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800be76:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800be7a:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }

  /*------------------------------ USB Configuration -------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB)
 800be7e:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800be82:	e9d3 2300 	ldrd	r2, r3, [r3]
 800be86:	f402 2380 	and.w	r3, r2, #262144	@ 0x40000
 800be8a:	673b      	str	r3, [r7, #112]	@ 0x70
 800be8c:	2300      	movs	r3, #0
 800be8e:	677b      	str	r3, [r7, #116]	@ 0x74
 800be90:	e9d7 121c 	ldrd	r1, r2, [r7, #112]	@ 0x70
 800be94:	460b      	mov	r3, r1
 800be96:	4313      	orrs	r3, r2
 800be98:	d03b      	beq.n	800bf12 <HAL_RCCEx_PeriphCLKConfig+0xffa>
  {

    switch (PeriphClkInit->UsbClockSelection)
 800be9a:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800be9e:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 800bea2:	f5b3 1f40 	cmp.w	r3, #3145728	@ 0x300000
 800bea6:	d01f      	beq.n	800bee8 <HAL_RCCEx_PeriphCLKConfig+0xfd0>
 800bea8:	f5b3 1f40 	cmp.w	r3, #3145728	@ 0x300000
 800beac:	d818      	bhi.n	800bee0 <HAL_RCCEx_PeriphCLKConfig+0xfc8>
 800beae:	f5b3 1f80 	cmp.w	r3, #1048576	@ 0x100000
 800beb2:	d003      	beq.n	800bebc <HAL_RCCEx_PeriphCLKConfig+0xfa4>
 800beb4:	f5b3 1f00 	cmp.w	r3, #2097152	@ 0x200000
 800beb8:	d007      	beq.n	800beca <HAL_RCCEx_PeriphCLKConfig+0xfb2>
 800beba:	e011      	b.n	800bee0 <HAL_RCCEx_PeriphCLKConfig+0xfc8>
    {
      case RCC_USBCLKSOURCE_PLL:      /* PLL is used as clock source for USB*/
        /* Enable USB Clock output generated form System USB . */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
 800bebc:	4b4e      	ldr	r3, [pc, #312]	@ (800bff8 <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800bebe:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800bec0:	4a4d      	ldr	r2, [pc, #308]	@ (800bff8 <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800bec2:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800bec6:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* USB clock source configuration done later after clock selection check */
        break;
 800bec8:	e00f      	b.n	800beea <HAL_RCCEx_PeriphCLKConfig+0xfd2>

      case RCC_USBCLKSOURCE_PLL3: /* PLL3 is used as clock source for USB*/

        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_Q_UPDATE);
 800beca:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bece:	3328      	adds	r3, #40	@ 0x28
 800bed0:	2101      	movs	r1, #1
 800bed2:	4618      	mov	r0, r3
 800bed4:	f000 fd7e 	bl	800c9d4 <RCCEx_PLL3_Config>
 800bed8:	4603      	mov	r3, r0
 800beda:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* USB clock source configuration done later after clock selection check */
        break;
 800bede:	e004      	b.n	800beea <HAL_RCCEx_PeriphCLKConfig+0xfd2>
        /* HSI48 oscillator is used as source of USB clock */
        /* USB clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800bee0:	2301      	movs	r3, #1
 800bee2:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800bee6:	e000      	b.n	800beea <HAL_RCCEx_PeriphCLKConfig+0xfd2>
        break;
 800bee8:	bf00      	nop
    }

    if (ret == HAL_OK)
 800beea:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800beee:	2b00      	cmp	r3, #0
 800bef0:	d10b      	bne.n	800bf0a <HAL_RCCEx_PeriphCLKConfig+0xff2>
    {
      /* Set the source of USB clock*/
      __HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection);
 800bef2:	4b41      	ldr	r3, [pc, #260]	@ (800bff8 <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800bef4:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800bef6:	f423 1140 	bic.w	r1, r3, #3145728	@ 0x300000
 800befa:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800befe:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 800bf02:	4a3d      	ldr	r2, [pc, #244]	@ (800bff8 <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800bf04:	430b      	orrs	r3, r1
 800bf06:	6553      	str	r3, [r2, #84]	@ 0x54
 800bf08:	e003      	b.n	800bf12 <HAL_RCCEx_PeriphCLKConfig+0xffa>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800bf0a:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800bf0e:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }

  }

  /*------------------------------------- SDMMC Configuration ------------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SDMMC) == RCC_PERIPHCLK_SDMMC)
 800bf12:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bf16:	e9d3 2300 	ldrd	r2, r3, [r3]
 800bf1a:	f402 3380 	and.w	r3, r2, #65536	@ 0x10000
 800bf1e:	66bb      	str	r3, [r7, #104]	@ 0x68
 800bf20:	2300      	movs	r3, #0
 800bf22:	66fb      	str	r3, [r7, #108]	@ 0x6c
 800bf24:	e9d7 121a 	ldrd	r1, r2, [r7, #104]	@ 0x68
 800bf28:	460b      	mov	r3, r1
 800bf2a:	4313      	orrs	r3, r2
 800bf2c:	d031      	beq.n	800bf92 <HAL_RCCEx_PeriphCLKConfig+0x107a>
  {
    /* Check the parameters */
    assert_param(IS_RCC_SDMMC(PeriphClkInit->SdmmcClockSelection));

    switch (PeriphClkInit->SdmmcClockSelection)
 800bf2e:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bf32:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800bf34:	2b00      	cmp	r3, #0
 800bf36:	d003      	beq.n	800bf40 <HAL_RCCEx_PeriphCLKConfig+0x1028>
 800bf38:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 800bf3c:	d007      	beq.n	800bf4e <HAL_RCCEx_PeriphCLKConfig+0x1036>
 800bf3e:	e011      	b.n	800bf64 <HAL_RCCEx_PeriphCLKConfig+0x104c>
    {
      case RCC_SDMMCCLKSOURCE_PLL:      /* PLL is used as clock source for SDMMC*/
        /* Enable SDMMC Clock output generated form System PLL . */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
 800bf40:	4b2d      	ldr	r3, [pc, #180]	@ (800bff8 <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800bf42:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800bf44:	4a2c      	ldr	r2, [pc, #176]	@ (800bff8 <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800bf46:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800bf4a:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* SDMMC clock source configuration done later after clock selection check */
        break;
 800bf4c:	e00e      	b.n	800bf6c <HAL_RCCEx_PeriphCLKConfig+0x1054>

      case RCC_SDMMCCLKSOURCE_PLL2: /* PLL2 is used as clock source for SDMMC*/

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_R_UPDATE);
 800bf4e:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bf52:	3308      	adds	r3, #8
 800bf54:	2102      	movs	r1, #2
 800bf56:	4618      	mov	r0, r3
 800bf58:	f000 fc8a 	bl	800c870 <RCCEx_PLL2_Config>
 800bf5c:	4603      	mov	r3, r0
 800bf5e:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SDMMC clock source configuration done later after clock selection check */
        break;
 800bf62:	e003      	b.n	800bf6c <HAL_RCCEx_PeriphCLKConfig+0x1054>

      default:
        ret = HAL_ERROR;
 800bf64:	2301      	movs	r3, #1
 800bf66:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800bf6a:	bf00      	nop
    }

    if (ret == HAL_OK)
 800bf6c:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800bf70:	2b00      	cmp	r3, #0
 800bf72:	d10a      	bne.n	800bf8a <HAL_RCCEx_PeriphCLKConfig+0x1072>
    {
      /* Set the source of SDMMC clock*/
      __HAL_RCC_SDMMC_CONFIG(PeriphClkInit->SdmmcClockSelection);
 800bf74:	4b20      	ldr	r3, [pc, #128]	@ (800bff8 <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800bf76:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 800bf78:	f423 3180 	bic.w	r1, r3, #65536	@ 0x10000
 800bf7c:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bf80:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800bf82:	4a1d      	ldr	r2, [pc, #116]	@ (800bff8 <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800bf84:	430b      	orrs	r3, r1
 800bf86:	64d3      	str	r3, [r2, #76]	@ 0x4c
 800bf88:	e003      	b.n	800bf92 <HAL_RCCEx_PeriphCLKConfig+0x107a>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800bf8a:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800bf8e:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }
#endif /* LTDC */

  /*------------------------------ RNG Configuration -------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RNG) == RCC_PERIPHCLK_RNG)
 800bf92:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bf96:	e9d3 2300 	ldrd	r2, r3, [r3]
 800bf9a:	f402 3300 	and.w	r3, r2, #131072	@ 0x20000
 800bf9e:	663b      	str	r3, [r7, #96]	@ 0x60
 800bfa0:	2300      	movs	r3, #0
 800bfa2:	667b      	str	r3, [r7, #100]	@ 0x64
 800bfa4:	e9d7 1218 	ldrd	r1, r2, [r7, #96]	@ 0x60
 800bfa8:	460b      	mov	r3, r1
 800bfaa:	4313      	orrs	r3, r2
 800bfac:	d03b      	beq.n	800c026 <HAL_RCCEx_PeriphCLKConfig+0x110e>
  {

    switch (PeriphClkInit->RngClockSelection)
 800bfae:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bfb2:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800bfb6:	f5b3 7f40 	cmp.w	r3, #768	@ 0x300
 800bfba:	d018      	beq.n	800bfee <HAL_RCCEx_PeriphCLKConfig+0x10d6>
 800bfbc:	f5b3 7f40 	cmp.w	r3, #768	@ 0x300
 800bfc0:	d811      	bhi.n	800bfe6 <HAL_RCCEx_PeriphCLKConfig+0x10ce>
 800bfc2:	f5b3 7f00 	cmp.w	r3, #512	@ 0x200
 800bfc6:	d014      	beq.n	800bff2 <HAL_RCCEx_PeriphCLKConfig+0x10da>
 800bfc8:	f5b3 7f00 	cmp.w	r3, #512	@ 0x200
 800bfcc:	d80b      	bhi.n	800bfe6 <HAL_RCCEx_PeriphCLKConfig+0x10ce>
 800bfce:	2b00      	cmp	r3, #0
 800bfd0:	d014      	beq.n	800bffc <HAL_RCCEx_PeriphCLKConfig+0x10e4>
 800bfd2:	f5b3 7f80 	cmp.w	r3, #256	@ 0x100
 800bfd6:	d106      	bne.n	800bfe6 <HAL_RCCEx_PeriphCLKConfig+0x10ce>
    {
      case RCC_RNGCLKSOURCE_PLL:     /* PLL is used as clock source for RNG*/
        /* Enable RNG Clock output generated form System RNG . */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
 800bfd8:	4b07      	ldr	r3, [pc, #28]	@ (800bff8 <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800bfda:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800bfdc:	4a06      	ldr	r2, [pc, #24]	@ (800bff8 <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800bfde:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800bfe2:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* RNG clock source configuration done later after clock selection check */
        break;
 800bfe4:	e00b      	b.n	800bffe <HAL_RCCEx_PeriphCLKConfig+0x10e6>
        /* HSI48 oscillator is used as source of RNG clock */
        /* RNG clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800bfe6:	2301      	movs	r3, #1
 800bfe8:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800bfec:	e007      	b.n	800bffe <HAL_RCCEx_PeriphCLKConfig+0x10e6>
        break;
 800bfee:	bf00      	nop
 800bff0:	e005      	b.n	800bffe <HAL_RCCEx_PeriphCLKConfig+0x10e6>
        break;
 800bff2:	bf00      	nop
 800bff4:	e003      	b.n	800bffe <HAL_RCCEx_PeriphCLKConfig+0x10e6>
 800bff6:	bf00      	nop
 800bff8:	58024400 	.word	0x58024400
        break;
 800bffc:	bf00      	nop
    }

    if (ret == HAL_OK)
 800bffe:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800c002:	2b00      	cmp	r3, #0
 800c004:	d10b      	bne.n	800c01e <HAL_RCCEx_PeriphCLKConfig+0x1106>
    {
      /* Set the source of RNG clock*/
      __HAL_RCC_RNG_CONFIG(PeriphClkInit->RngClockSelection);
 800c006:	4bba      	ldr	r3, [pc, #744]	@ (800c2f0 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800c008:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800c00a:	f423 7140 	bic.w	r1, r3, #768	@ 0x300
 800c00e:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c012:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800c016:	4ab6      	ldr	r2, [pc, #728]	@ (800c2f0 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800c018:	430b      	orrs	r3, r1
 800c01a:	6553      	str	r3, [r2, #84]	@ 0x54
 800c01c:	e003      	b.n	800c026 <HAL_RCCEx_PeriphCLKConfig+0x110e>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800c01e:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800c022:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }

  }

  /*------------------------------ SWPMI1 Configuration ------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SWPMI1) == RCC_PERIPHCLK_SWPMI1)
 800c026:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c02a:	e9d3 2300 	ldrd	r2, r3, [r3]
 800c02e:	f402 1380 	and.w	r3, r2, #1048576	@ 0x100000
 800c032:	65bb      	str	r3, [r7, #88]	@ 0x58
 800c034:	2300      	movs	r3, #0
 800c036:	65fb      	str	r3, [r7, #92]	@ 0x5c
 800c038:	e9d7 1216 	ldrd	r1, r2, [r7, #88]	@ 0x58
 800c03c:	460b      	mov	r3, r1
 800c03e:	4313      	orrs	r3, r2
 800c040:	d009      	beq.n	800c056 <HAL_RCCEx_PeriphCLKConfig+0x113e>
  {
    /* Check the parameters */
    assert_param(IS_RCC_SWPMI1CLKSOURCE(PeriphClkInit->Swpmi1ClockSelection));

    /* Configure the SWPMI1 interface clock source */
    __HAL_RCC_SWPMI1_CONFIG(PeriphClkInit->Swpmi1ClockSelection);
 800c042:	4bab      	ldr	r3, [pc, #684]	@ (800c2f0 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800c044:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800c046:	f023 4100 	bic.w	r1, r3, #2147483648	@ 0x80000000
 800c04a:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c04e:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 800c050:	4aa7      	ldr	r2, [pc, #668]	@ (800c2f0 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800c052:	430b      	orrs	r3, r1
 800c054:	6513      	str	r3, [r2, #80]	@ 0x50
  }
#if defined(HRTIM1)
  /*------------------------------ HRTIM1 clock Configuration ----------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_HRTIM1) == RCC_PERIPHCLK_HRTIM1)
 800c056:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c05a:	e9d3 2300 	ldrd	r2, r3, [r3]
 800c05e:	f002 5380 	and.w	r3, r2, #268435456	@ 0x10000000
 800c062:	653b      	str	r3, [r7, #80]	@ 0x50
 800c064:	2300      	movs	r3, #0
 800c066:	657b      	str	r3, [r7, #84]	@ 0x54
 800c068:	e9d7 1214 	ldrd	r1, r2, [r7, #80]	@ 0x50
 800c06c:	460b      	mov	r3, r1
 800c06e:	4313      	orrs	r3, r2
 800c070:	d00a      	beq.n	800c088 <HAL_RCCEx_PeriphCLKConfig+0x1170>
  {
    /* Check the parameters */
    assert_param(IS_RCC_HRTIM1CLKSOURCE(PeriphClkInit->Hrtim1ClockSelection));

    /* Configure the HRTIM1 clock source */
    __HAL_RCC_HRTIM1_CONFIG(PeriphClkInit->Hrtim1ClockSelection);
 800c072:	4b9f      	ldr	r3, [pc, #636]	@ (800c2f0 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800c074:	691b      	ldr	r3, [r3, #16]
 800c076:	f423 4180 	bic.w	r1, r3, #16384	@ 0x4000
 800c07a:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c07e:	f8d3 30b8 	ldr.w	r3, [r3, #184]	@ 0xb8
 800c082:	4a9b      	ldr	r2, [pc, #620]	@ (800c2f0 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800c084:	430b      	orrs	r3, r1
 800c086:	6113      	str	r3, [r2, #16]
  }
#endif  /*HRTIM1*/
  /*------------------------------ DFSDM1 Configuration ------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_DFSDM1) == RCC_PERIPHCLK_DFSDM1)
 800c088:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c08c:	e9d3 2300 	ldrd	r2, r3, [r3]
 800c090:	f402 1300 	and.w	r3, r2, #2097152	@ 0x200000
 800c094:	64bb      	str	r3, [r7, #72]	@ 0x48
 800c096:	2300      	movs	r3, #0
 800c098:	64fb      	str	r3, [r7, #76]	@ 0x4c
 800c09a:	e9d7 1212 	ldrd	r1, r2, [r7, #72]	@ 0x48
 800c09e:	460b      	mov	r3, r1
 800c0a0:	4313      	orrs	r3, r2
 800c0a2:	d009      	beq.n	800c0b8 <HAL_RCCEx_PeriphCLKConfig+0x11a0>
  {
    /* Check the parameters */
    assert_param(IS_RCC_DFSDM1CLKSOURCE(PeriphClkInit->Dfsdm1ClockSelection));

    /* Configure the DFSDM1 interface clock source */
    __HAL_RCC_DFSDM1_CONFIG(PeriphClkInit->Dfsdm1ClockSelection);
 800c0a4:	4b92      	ldr	r3, [pc, #584]	@ (800c2f0 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800c0a6:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800c0a8:	f023 7180 	bic.w	r1, r3, #16777216	@ 0x1000000
 800c0ac:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c0b0:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 800c0b2:	4a8f      	ldr	r2, [pc, #572]	@ (800c2f0 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800c0b4:	430b      	orrs	r3, r1
 800c0b6:	6513      	str	r3, [r2, #80]	@ 0x50
    __HAL_RCC_DFSDM2_CONFIG(PeriphClkInit->Dfsdm2ClockSelection);
  }
#endif  /* DFSDM2 */

  /*------------------------------------ TIM configuration --------------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM) == RCC_PERIPHCLK_TIM)
 800c0b8:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c0bc:	e9d3 2300 	ldrd	r2, r3, [r3]
 800c0c0:	f002 4380 	and.w	r3, r2, #1073741824	@ 0x40000000
 800c0c4:	643b      	str	r3, [r7, #64]	@ 0x40
 800c0c6:	2300      	movs	r3, #0
 800c0c8:	647b      	str	r3, [r7, #68]	@ 0x44
 800c0ca:	e9d7 1210 	ldrd	r1, r2, [r7, #64]	@ 0x40
 800c0ce:	460b      	mov	r3, r1
 800c0d0:	4313      	orrs	r3, r2
 800c0d2:	d00e      	beq.n	800c0f2 <HAL_RCCEx_PeriphCLKConfig+0x11da>
  {
    /* Check the parameters */
    assert_param(IS_RCC_TIMPRES(PeriphClkInit->TIMPresSelection));

    /* Configure Timer Prescaler */
    __HAL_RCC_TIMCLKPRESCALER(PeriphClkInit->TIMPresSelection);
 800c0d4:	4b86      	ldr	r3, [pc, #536]	@ (800c2f0 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800c0d6:	691b      	ldr	r3, [r3, #16]
 800c0d8:	4a85      	ldr	r2, [pc, #532]	@ (800c2f0 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800c0da:	f423 4300 	bic.w	r3, r3, #32768	@ 0x8000
 800c0de:	6113      	str	r3, [r2, #16]
 800c0e0:	4b83      	ldr	r3, [pc, #524]	@ (800c2f0 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800c0e2:	6919      	ldr	r1, [r3, #16]
 800c0e4:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c0e8:	f8d3 30bc 	ldr.w	r3, [r3, #188]	@ 0xbc
 800c0ec:	4a80      	ldr	r2, [pc, #512]	@ (800c2f0 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800c0ee:	430b      	orrs	r3, r1
 800c0f0:	6113      	str	r3, [r2, #16]
  }

  /*------------------------------------ CKPER configuration --------------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CKPER) == RCC_PERIPHCLK_CKPER)
 800c0f2:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c0f6:	e9d3 2300 	ldrd	r2, r3, [r3]
 800c0fa:	f002 4300 	and.w	r3, r2, #2147483648	@ 0x80000000
 800c0fe:	63bb      	str	r3, [r7, #56]	@ 0x38
 800c100:	2300      	movs	r3, #0
 800c102:	63fb      	str	r3, [r7, #60]	@ 0x3c
 800c104:	e9d7 120e 	ldrd	r1, r2, [r7, #56]	@ 0x38
 800c108:	460b      	mov	r3, r1
 800c10a:	4313      	orrs	r3, r2
 800c10c:	d009      	beq.n	800c122 <HAL_RCCEx_PeriphCLKConfig+0x120a>
  {
    /* Check the parameters */
    assert_param(IS_RCC_CLKPSOURCE(PeriphClkInit->CkperClockSelection));

    /* Configure the CKPER clock source */
    __HAL_RCC_CLKP_CONFIG(PeriphClkInit->CkperClockSelection);
 800c10e:	4b78      	ldr	r3, [pc, #480]	@ (800c2f0 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800c110:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 800c112:	f023 5140 	bic.w	r1, r3, #805306368	@ 0x30000000
 800c116:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c11a:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800c11c:	4a74      	ldr	r2, [pc, #464]	@ (800c2f0 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800c11e:	430b      	orrs	r3, r1
 800c120:	64d3      	str	r3, [r2, #76]	@ 0x4c
  }

  /*------------------------------ CEC Configuration ------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CEC) == RCC_PERIPHCLK_CEC)
 800c122:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c126:	e9d3 2300 	ldrd	r2, r3, [r3]
 800c12a:	f402 0300 	and.w	r3, r2, #8388608	@ 0x800000
 800c12e:	633b      	str	r3, [r7, #48]	@ 0x30
 800c130:	2300      	movs	r3, #0
 800c132:	637b      	str	r3, [r7, #52]	@ 0x34
 800c134:	e9d7 120c 	ldrd	r1, r2, [r7, #48]	@ 0x30
 800c138:	460b      	mov	r3, r1
 800c13a:	4313      	orrs	r3, r2
 800c13c:	d00a      	beq.n	800c154 <HAL_RCCEx_PeriphCLKConfig+0x123c>
  {
    /* Check the parameters */
    assert_param(IS_RCC_CECCLKSOURCE(PeriphClkInit->CecClockSelection));

    /* Configure the CEC interface clock source */
    __HAL_RCC_CEC_CONFIG(PeriphClkInit->CecClockSelection);
 800c13e:	4b6c      	ldr	r3, [pc, #432]	@ (800c2f0 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800c140:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800c142:	f423 0140 	bic.w	r1, r3, #12582912	@ 0xc00000
 800c146:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c14a:	f8d3 308c 	ldr.w	r3, [r3, #140]	@ 0x8c
 800c14e:	4a68      	ldr	r2, [pc, #416]	@ (800c2f0 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800c150:	430b      	orrs	r3, r1
 800c152:	6553      	str	r3, [r2, #84]	@ 0x54
  }

  /*---------------------------- PLL2 configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_PLL2_DIVP) == RCC_PERIPHCLK_PLL2_DIVP)
 800c154:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c158:	e9d3 2300 	ldrd	r2, r3, [r3]
 800c15c:	2100      	movs	r1, #0
 800c15e:	62b9      	str	r1, [r7, #40]	@ 0x28
 800c160:	f003 0301 	and.w	r3, r3, #1
 800c164:	62fb      	str	r3, [r7, #44]	@ 0x2c
 800c166:	e9d7 120a 	ldrd	r1, r2, [r7, #40]	@ 0x28
 800c16a:	460b      	mov	r3, r1
 800c16c:	4313      	orrs	r3, r2
 800c16e:	d011      	beq.n	800c194 <HAL_RCCEx_PeriphCLKConfig+0x127c>
  {
    ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
 800c170:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c174:	3308      	adds	r3, #8
 800c176:	2100      	movs	r1, #0
 800c178:	4618      	mov	r0, r3
 800c17a:	f000 fb79 	bl	800c870 <RCCEx_PLL2_Config>
 800c17e:	4603      	mov	r3, r0
 800c180:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
    
    if (ret == HAL_OK)
 800c184:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800c188:	2b00      	cmp	r3, #0
 800c18a:	d003      	beq.n	800c194 <HAL_RCCEx_PeriphCLKConfig+0x127c>
      /*Nothing to do*/
    }
    else
    {
      /* set overall return value */
      status = ret;
 800c18c:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800c190:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    } 
  }
  
  
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_PLL2_DIVQ) == RCC_PERIPHCLK_PLL2_DIVQ)
 800c194:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c198:	e9d3 2300 	ldrd	r2, r3, [r3]
 800c19c:	2100      	movs	r1, #0
 800c19e:	6239      	str	r1, [r7, #32]
 800c1a0:	f003 0302 	and.w	r3, r3, #2
 800c1a4:	627b      	str	r3, [r7, #36]	@ 0x24
 800c1a6:	e9d7 1208 	ldrd	r1, r2, [r7, #32]
 800c1aa:	460b      	mov	r3, r1
 800c1ac:	4313      	orrs	r3, r2
 800c1ae:	d011      	beq.n	800c1d4 <HAL_RCCEx_PeriphCLKConfig+0x12bc>
  {
    ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_Q_UPDATE);
 800c1b0:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c1b4:	3308      	adds	r3, #8
 800c1b6:	2101      	movs	r1, #1
 800c1b8:	4618      	mov	r0, r3
 800c1ba:	f000 fb59 	bl	800c870 <RCCEx_PLL2_Config>
 800c1be:	4603      	mov	r3, r0
 800c1c0:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
    
    if (ret == HAL_OK)
 800c1c4:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800c1c8:	2b00      	cmp	r3, #0
 800c1ca:	d003      	beq.n	800c1d4 <HAL_RCCEx_PeriphCLKConfig+0x12bc>
      /*Nothing to do*/
    }
    else
    {
      /* set overall return value */
      status = ret;
 800c1cc:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800c1d0:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }
  
  
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_PLL2_DIVR) == RCC_PERIPHCLK_PLL2_DIVR)
 800c1d4:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c1d8:	e9d3 2300 	ldrd	r2, r3, [r3]
 800c1dc:	2100      	movs	r1, #0
 800c1de:	61b9      	str	r1, [r7, #24]
 800c1e0:	f003 0304 	and.w	r3, r3, #4
 800c1e4:	61fb      	str	r3, [r7, #28]
 800c1e6:	e9d7 1206 	ldrd	r1, r2, [r7, #24]
 800c1ea:	460b      	mov	r3, r1
 800c1ec:	4313      	orrs	r3, r2
 800c1ee:	d011      	beq.n	800c214 <HAL_RCCEx_PeriphCLKConfig+0x12fc>
  {
    ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_R_UPDATE);
 800c1f0:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c1f4:	3308      	adds	r3, #8
 800c1f6:	2102      	movs	r1, #2
 800c1f8:	4618      	mov	r0, r3
 800c1fa:	f000 fb39 	bl	800c870 <RCCEx_PLL2_Config>
 800c1fe:	4603      	mov	r3, r0
 800c200:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
    
    if (ret == HAL_OK)
 800c204:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800c208:	2b00      	cmp	r3, #0
 800c20a:	d003      	beq.n	800c214 <HAL_RCCEx_PeriphCLKConfig+0x12fc>
      /*Nothing to do*/
    }
    else
    {
      /* set overall return value */
      status = ret;
 800c20c:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800c210:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }
  

  /*---------------------------- PLL3 configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_PLL3_DIVP) == RCC_PERIPHCLK_PLL3_DIVP)
 800c214:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c218:	e9d3 2300 	ldrd	r2, r3, [r3]
 800c21c:	2100      	movs	r1, #0
 800c21e:	6139      	str	r1, [r7, #16]
 800c220:	f003 0308 	and.w	r3, r3, #8
 800c224:	617b      	str	r3, [r7, #20]
 800c226:	e9d7 1204 	ldrd	r1, r2, [r7, #16]
 800c22a:	460b      	mov	r3, r1
 800c22c:	4313      	orrs	r3, r2
 800c22e:	d011      	beq.n	800c254 <HAL_RCCEx_PeriphCLKConfig+0x133c>
  {
    ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_P_UPDATE);
 800c230:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c234:	3328      	adds	r3, #40	@ 0x28
 800c236:	2100      	movs	r1, #0
 800c238:	4618      	mov	r0, r3
 800c23a:	f000 fbcb 	bl	800c9d4 <RCCEx_PLL3_Config>
 800c23e:	4603      	mov	r3, r0
 800c240:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
  
    if (ret == HAL_OK)
 800c244:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800c248:	2b00      	cmp	r3, #0
 800c24a:	d003      	beq.n	800c254 <HAL_RCCEx_PeriphCLKConfig+0x133c>
      /*Nothing to do*/
    }
    else
    {
      /* set overall return value */
      status = ret;
 800c24c:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800c250:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }
  
  
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_PLL3_DIVQ) == RCC_PERIPHCLK_PLL3_DIVQ)
 800c254:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c258:	e9d3 2300 	ldrd	r2, r3, [r3]
 800c25c:	2100      	movs	r1, #0
 800c25e:	60b9      	str	r1, [r7, #8]
 800c260:	f003 0310 	and.w	r3, r3, #16
 800c264:	60fb      	str	r3, [r7, #12]
 800c266:	e9d7 1202 	ldrd	r1, r2, [r7, #8]
 800c26a:	460b      	mov	r3, r1
 800c26c:	4313      	orrs	r3, r2
 800c26e:	d011      	beq.n	800c294 <HAL_RCCEx_PeriphCLKConfig+0x137c>
  {
    ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_Q_UPDATE);
 800c270:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c274:	3328      	adds	r3, #40	@ 0x28
 800c276:	2101      	movs	r1, #1
 800c278:	4618      	mov	r0, r3
 800c27a:	f000 fbab 	bl	800c9d4 <RCCEx_PLL3_Config>
 800c27e:	4603      	mov	r3, r0
 800c280:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
    
    if (ret == HAL_OK)
 800c284:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800c288:	2b00      	cmp	r3, #0
 800c28a:	d003      	beq.n	800c294 <HAL_RCCEx_PeriphCLKConfig+0x137c>
      /*Nothing to do*/
    }
    else
    {
      /* set overall return value */
      status = ret;
 800c28c:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800c290:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }
  
  
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_PLL3_DIVR) == RCC_PERIPHCLK_PLL3_DIVR)
 800c294:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c298:	e9d3 2300 	ldrd	r2, r3, [r3]
 800c29c:	2100      	movs	r1, #0
 800c29e:	6039      	str	r1, [r7, #0]
 800c2a0:	f003 0320 	and.w	r3, r3, #32
 800c2a4:	607b      	str	r3, [r7, #4]
 800c2a6:	e9d7 1200 	ldrd	r1, r2, [r7]
 800c2aa:	460b      	mov	r3, r1
 800c2ac:	4313      	orrs	r3, r2
 800c2ae:	d011      	beq.n	800c2d4 <HAL_RCCEx_PeriphCLKConfig+0x13bc>
  {
    ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_R_UPDATE);
 800c2b0:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c2b4:	3328      	adds	r3, #40	@ 0x28
 800c2b6:	2102      	movs	r1, #2
 800c2b8:	4618      	mov	r0, r3
 800c2ba:	f000 fb8b 	bl	800c9d4 <RCCEx_PLL3_Config>
 800c2be:	4603      	mov	r3, r0
 800c2c0:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
    
    if (ret == HAL_OK)
 800c2c4:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800c2c8:	2b00      	cmp	r3, #0
 800c2ca:	d003      	beq.n	800c2d4 <HAL_RCCEx_PeriphCLKConfig+0x13bc>
      /*Nothing to do*/
    }
    else
    {
      /* set overall return value */
      status = ret;
 800c2cc:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800c2d0:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    } 
  }

  if (status == HAL_OK)
 800c2d4:	f897 311e 	ldrb.w	r3, [r7, #286]	@ 0x11e
 800c2d8:	2b00      	cmp	r3, #0
 800c2da:	d101      	bne.n	800c2e0 <HAL_RCCEx_PeriphCLKConfig+0x13c8>
  {
    return HAL_OK;
 800c2dc:	2300      	movs	r3, #0
 800c2de:	e000      	b.n	800c2e2 <HAL_RCCEx_PeriphCLKConfig+0x13ca>
  }
  return HAL_ERROR;
 800c2e0:	2301      	movs	r3, #1
}
 800c2e2:	4618      	mov	r0, r3
 800c2e4:	f507 7790 	add.w	r7, r7, #288	@ 0x120
 800c2e8:	46bd      	mov	sp, r7
 800c2ea:	e8bd 8fb0 	ldmia.w	sp!, {r4, r5, r7, r8, r9, sl, fp, pc}
 800c2ee:	bf00      	nop
 800c2f0:	58024400 	.word	0x58024400

0800c2f4 <HAL_RCCEx_GetD3PCLK1Freq>:
  * @note   Each time D3PCLK1 changes, this function must be called to update the
  *         right D3PCLK1 value. Otherwise, any configuration based on this function will be incorrect.
  * @retval D3PCLK1 frequency
  */
uint32_t HAL_RCCEx_GetD3PCLK1Freq(void)
{
 800c2f4:	b580      	push	{r7, lr}
 800c2f6:	af00      	add	r7, sp, #0
#if defined(RCC_D3CFGR_D3PPRE)
  /* Get HCLK source and Compute D3PCLK1 frequency ---------------------------*/
  return (HAL_RCC_GetHCLKFreq() >> (D1CorePrescTable[(RCC->D3CFGR & RCC_D3CFGR_D3PPRE) >> RCC_D3CFGR_D3PPRE_Pos] & 0x1FU));
 800c2f8:	f7fe fd70 	bl	800addc <HAL_RCC_GetHCLKFreq>
 800c2fc:	4602      	mov	r2, r0
 800c2fe:	4b06      	ldr	r3, [pc, #24]	@ (800c318 <HAL_RCCEx_GetD3PCLK1Freq+0x24>)
 800c300:	6a1b      	ldr	r3, [r3, #32]
 800c302:	091b      	lsrs	r3, r3, #4
 800c304:	f003 0307 	and.w	r3, r3, #7
 800c308:	4904      	ldr	r1, [pc, #16]	@ (800c31c <HAL_RCCEx_GetD3PCLK1Freq+0x28>)
 800c30a:	5ccb      	ldrb	r3, [r1, r3]
 800c30c:	f003 031f 	and.w	r3, r3, #31
 800c310:	fa22 f303 	lsr.w	r3, r2, r3
#else
  /* Get HCLK source and Compute D3PCLK1 frequency ---------------------------*/
  return (HAL_RCC_GetHCLKFreq() >> (D1CorePrescTable[(RCC->SRDCFGR & RCC_SRDCFGR_SRDPPRE) >> RCC_SRDCFGR_SRDPPRE_Pos] & 0x1FU));
#endif
}
 800c314:	4618      	mov	r0, r3
 800c316:	bd80      	pop	{r7, pc}
 800c318:	58024400 	.word	0x58024400
 800c31c:	08031308 	.word	0x08031308

0800c320 <HAL_RCCEx_GetPLL2ClockFreq>:
  *         right PLL2CLK value. Otherwise, any configuration based on this function will be incorrect.
  * @param  PLL2_Clocks structure.
  * @retval None
  */
void HAL_RCCEx_GetPLL2ClockFreq(PLL2_ClocksTypeDef *PLL2_Clocks)
{
 800c320:	b480      	push	{r7}
 800c322:	b089      	sub	sp, #36	@ 0x24
 800c324:	af00      	add	r7, sp, #0
 800c326:	6078      	str	r0, [r7, #4]
  float_t fracn2, pll2vco;

  /* PLL_VCO = (HSE_VALUE or HSI_VALUE or CSI_VALUE/ PLL2M) * PLL2N
     PLL2xCLK = PLL2_VCO / PLL2x
  */
  pllsource = (RCC->PLLCKSELR & RCC_PLLCKSELR_PLLSRC);
 800c328:	4ba1      	ldr	r3, [pc, #644]	@ (800c5b0 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800c32a:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800c32c:	f003 0303 	and.w	r3, r3, #3
 800c330:	61bb      	str	r3, [r7, #24]
  pll2m = ((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM2) >> 12);
 800c332:	4b9f      	ldr	r3, [pc, #636]	@ (800c5b0 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800c334:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800c336:	0b1b      	lsrs	r3, r3, #12
 800c338:	f003 033f 	and.w	r3, r3, #63	@ 0x3f
 800c33c:	617b      	str	r3, [r7, #20]
  pll2fracen = (RCC->PLLCFGR & RCC_PLLCFGR_PLL2FRACEN) >> RCC_PLLCFGR_PLL2FRACEN_Pos;
 800c33e:	4b9c      	ldr	r3, [pc, #624]	@ (800c5b0 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800c340:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800c342:	091b      	lsrs	r3, r3, #4
 800c344:	f003 0301 	and.w	r3, r3, #1
 800c348:	613b      	str	r3, [r7, #16]
  fracn2 = (float_t)(uint32_t)(pll2fracen * ((RCC->PLL2FRACR & RCC_PLL2FRACR_FRACN2) >> 3));
 800c34a:	4b99      	ldr	r3, [pc, #612]	@ (800c5b0 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800c34c:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 800c34e:	08db      	lsrs	r3, r3, #3
 800c350:	f3c3 030c 	ubfx	r3, r3, #0, #13
 800c354:	693a      	ldr	r2, [r7, #16]
 800c356:	fb02 f303 	mul.w	r3, r2, r3
 800c35a:	ee07 3a90 	vmov	s15, r3
 800c35e:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800c362:	edc7 7a03 	vstr	s15, [r7, #12]

  if (pll2m != 0U)
 800c366:	697b      	ldr	r3, [r7, #20]
 800c368:	2b00      	cmp	r3, #0
 800c36a:	f000 8111 	beq.w	800c590 <HAL_RCCEx_GetPLL2ClockFreq+0x270>
  {
    switch (pllsource)
 800c36e:	69bb      	ldr	r3, [r7, #24]
 800c370:	2b02      	cmp	r3, #2
 800c372:	f000 8083 	beq.w	800c47c <HAL_RCCEx_GetPLL2ClockFreq+0x15c>
 800c376:	69bb      	ldr	r3, [r7, #24]
 800c378:	2b02      	cmp	r3, #2
 800c37a:	f200 80a1 	bhi.w	800c4c0 <HAL_RCCEx_GetPLL2ClockFreq+0x1a0>
 800c37e:	69bb      	ldr	r3, [r7, #24]
 800c380:	2b00      	cmp	r3, #0
 800c382:	d003      	beq.n	800c38c <HAL_RCCEx_GetPLL2ClockFreq+0x6c>
 800c384:	69bb      	ldr	r3, [r7, #24]
 800c386:	2b01      	cmp	r3, #1
 800c388:	d056      	beq.n	800c438 <HAL_RCCEx_GetPLL2ClockFreq+0x118>
 800c38a:	e099      	b.n	800c4c0 <HAL_RCCEx_GetPLL2ClockFreq+0x1a0>
    {

      case RCC_PLLSOURCE_HSI:  /* HSI used as PLL clock source */

        if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
 800c38c:	4b88      	ldr	r3, [pc, #544]	@ (800c5b0 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800c38e:	681b      	ldr	r3, [r3, #0]
 800c390:	f003 0320 	and.w	r3, r3, #32
 800c394:	2b00      	cmp	r3, #0
 800c396:	d02d      	beq.n	800c3f4 <HAL_RCCEx_GetPLL2ClockFreq+0xd4>
        {
          hsivalue = (HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3));
 800c398:	4b85      	ldr	r3, [pc, #532]	@ (800c5b0 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800c39a:	681b      	ldr	r3, [r3, #0]
 800c39c:	08db      	lsrs	r3, r3, #3
 800c39e:	f003 0303 	and.w	r3, r3, #3
 800c3a2:	4a84      	ldr	r2, [pc, #528]	@ (800c5b4 <HAL_RCCEx_GetPLL2ClockFreq+0x294>)
 800c3a4:	fa22 f303 	lsr.w	r3, r2, r3
 800c3a8:	60bb      	str	r3, [r7, #8]
          pll2vco = ((float_t)hsivalue / (float_t)pll2m) * ((float_t)(uint32_t)(RCC->PLL2DIVR & RCC_PLL2DIVR_N2) + (fracn2 / (float_t)0x2000) + (float_t)1);
 800c3aa:	68bb      	ldr	r3, [r7, #8]
 800c3ac:	ee07 3a90 	vmov	s15, r3
 800c3b0:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800c3b4:	697b      	ldr	r3, [r7, #20]
 800c3b6:	ee07 3a90 	vmov	s15, r3
 800c3ba:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800c3be:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800c3c2:	4b7b      	ldr	r3, [pc, #492]	@ (800c5b0 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800c3c4:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 800c3c6:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800c3ca:	ee07 3a90 	vmov	s15, r3
 800c3ce:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800c3d2:	ed97 6a03 	vldr	s12, [r7, #12]
 800c3d6:	eddf 5a78 	vldr	s11, [pc, #480]	@ 800c5b8 <HAL_RCCEx_GetPLL2ClockFreq+0x298>
 800c3da:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800c3de:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800c3e2:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800c3e6:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800c3ea:	ee67 7a27 	vmul.f32	s15, s14, s15
 800c3ee:	edc7 7a07 	vstr	s15, [r7, #28]
        }
        else
        {
          pll2vco = ((float_t)HSI_VALUE / (float_t)pll2m) * ((float_t)(uint32_t)(RCC->PLL2DIVR & RCC_PLL2DIVR_N2) + (fracn2 / (float_t)0x2000) + (float_t)1);
        }
        break;
 800c3f2:	e087      	b.n	800c504 <HAL_RCCEx_GetPLL2ClockFreq+0x1e4>
          pll2vco = ((float_t)HSI_VALUE / (float_t)pll2m) * ((float_t)(uint32_t)(RCC->PLL2DIVR & RCC_PLL2DIVR_N2) + (fracn2 / (float_t)0x2000) + (float_t)1);
 800c3f4:	697b      	ldr	r3, [r7, #20]
 800c3f6:	ee07 3a90 	vmov	s15, r3
 800c3fa:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800c3fe:	eddf 6a6f 	vldr	s13, [pc, #444]	@ 800c5bc <HAL_RCCEx_GetPLL2ClockFreq+0x29c>
 800c402:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800c406:	4b6a      	ldr	r3, [pc, #424]	@ (800c5b0 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800c408:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 800c40a:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800c40e:	ee07 3a90 	vmov	s15, r3
 800c412:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800c416:	ed97 6a03 	vldr	s12, [r7, #12]
 800c41a:	eddf 5a67 	vldr	s11, [pc, #412]	@ 800c5b8 <HAL_RCCEx_GetPLL2ClockFreq+0x298>
 800c41e:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800c422:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800c426:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800c42a:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800c42e:	ee67 7a27 	vmul.f32	s15, s14, s15
 800c432:	edc7 7a07 	vstr	s15, [r7, #28]
        break;
 800c436:	e065      	b.n	800c504 <HAL_RCCEx_GetPLL2ClockFreq+0x1e4>

      case RCC_PLLSOURCE_CSI:  /* CSI used as PLL clock source */
        pll2vco = ((float_t)CSI_VALUE / (float_t)pll2m) * ((float_t)(uint32_t)(RCC->PLL2DIVR & RCC_PLL2DIVR_N2) + (fracn2 / (float_t)0x2000) + (float_t)1);
 800c438:	697b      	ldr	r3, [r7, #20]
 800c43a:	ee07 3a90 	vmov	s15, r3
 800c43e:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800c442:	eddf 6a5f 	vldr	s13, [pc, #380]	@ 800c5c0 <HAL_RCCEx_GetPLL2ClockFreq+0x2a0>
 800c446:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800c44a:	4b59      	ldr	r3, [pc, #356]	@ (800c5b0 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800c44c:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 800c44e:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800c452:	ee07 3a90 	vmov	s15, r3
 800c456:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800c45a:	ed97 6a03 	vldr	s12, [r7, #12]
 800c45e:	eddf 5a56 	vldr	s11, [pc, #344]	@ 800c5b8 <HAL_RCCEx_GetPLL2ClockFreq+0x298>
 800c462:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800c466:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800c46a:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800c46e:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800c472:	ee67 7a27 	vmul.f32	s15, s14, s15
 800c476:	edc7 7a07 	vstr	s15, [r7, #28]
        break;
 800c47a:	e043      	b.n	800c504 <HAL_RCCEx_GetPLL2ClockFreq+0x1e4>

      case RCC_PLLSOURCE_HSE:  /* HSE used as PLL clock source */
        pll2vco = ((float_t)HSE_VALUE / (float_t)pll2m) * ((float_t)(uint32_t)(RCC->PLL2DIVR & RCC_PLL2DIVR_N2) + (fracn2 / (float_t)0x2000) + (float_t)1);
 800c47c:	697b      	ldr	r3, [r7, #20]
 800c47e:	ee07 3a90 	vmov	s15, r3
 800c482:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800c486:	eddf 6a4f 	vldr	s13, [pc, #316]	@ 800c5c4 <HAL_RCCEx_GetPLL2ClockFreq+0x2a4>
 800c48a:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800c48e:	4b48      	ldr	r3, [pc, #288]	@ (800c5b0 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800c490:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 800c492:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800c496:	ee07 3a90 	vmov	s15, r3
 800c49a:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800c49e:	ed97 6a03 	vldr	s12, [r7, #12]
 800c4a2:	eddf 5a45 	vldr	s11, [pc, #276]	@ 800c5b8 <HAL_RCCEx_GetPLL2ClockFreq+0x298>
 800c4a6:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800c4aa:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800c4ae:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800c4b2:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800c4b6:	ee67 7a27 	vmul.f32	s15, s14, s15
 800c4ba:	edc7 7a07 	vstr	s15, [r7, #28]
        break;
 800c4be:	e021      	b.n	800c504 <HAL_RCCEx_GetPLL2ClockFreq+0x1e4>

      default:
        pll2vco = ((float_t)CSI_VALUE / (float_t)pll2m) * ((float_t)(uint32_t)(RCC->PLL2DIVR & RCC_PLL2DIVR_N2) + (fracn2 / (float_t)0x2000) + (float_t)1);
 800c4c0:	697b      	ldr	r3, [r7, #20]
 800c4c2:	ee07 3a90 	vmov	s15, r3
 800c4c6:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800c4ca:	eddf 6a3d 	vldr	s13, [pc, #244]	@ 800c5c0 <HAL_RCCEx_GetPLL2ClockFreq+0x2a0>
 800c4ce:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800c4d2:	4b37      	ldr	r3, [pc, #220]	@ (800c5b0 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800c4d4:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 800c4d6:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800c4da:	ee07 3a90 	vmov	s15, r3
 800c4de:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800c4e2:	ed97 6a03 	vldr	s12, [r7, #12]
 800c4e6:	eddf 5a34 	vldr	s11, [pc, #208]	@ 800c5b8 <HAL_RCCEx_GetPLL2ClockFreq+0x298>
 800c4ea:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800c4ee:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800c4f2:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800c4f6:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800c4fa:	ee67 7a27 	vmul.f32	s15, s14, s15
 800c4fe:	edc7 7a07 	vstr	s15, [r7, #28]
        break;
 800c502:	bf00      	nop
    }
    PLL2_Clocks->PLL2_P_Frequency = (uint32_t)(float_t)(pll2vco / ((float_t)(uint32_t)((RCC->PLL2DIVR & RCC_PLL2DIVR_P2) >> 9)  + (float_t)1)) ;
 800c504:	4b2a      	ldr	r3, [pc, #168]	@ (800c5b0 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800c506:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 800c508:	0a5b      	lsrs	r3, r3, #9
 800c50a:	f003 037f 	and.w	r3, r3, #127	@ 0x7f
 800c50e:	ee07 3a90 	vmov	s15, r3
 800c512:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800c516:	eeb7 7a00 	vmov.f32	s14, #112	@ 0x3f800000  1.0
 800c51a:	ee37 7a87 	vadd.f32	s14, s15, s14
 800c51e:	edd7 6a07 	vldr	s13, [r7, #28]
 800c522:	eec6 7a87 	vdiv.f32	s15, s13, s14
 800c526:	eefc 7ae7 	vcvt.u32.f32	s15, s15
 800c52a:	ee17 2a90 	vmov	r2, s15
 800c52e:	687b      	ldr	r3, [r7, #4]
 800c530:	601a      	str	r2, [r3, #0]
    PLL2_Clocks->PLL2_Q_Frequency = (uint32_t)(float_t)(pll2vco / ((float_t)(uint32_t)((RCC->PLL2DIVR & RCC_PLL2DIVR_Q2) >> 16) + (float_t)1)) ;
 800c532:	4b1f      	ldr	r3, [pc, #124]	@ (800c5b0 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800c534:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 800c536:	0c1b      	lsrs	r3, r3, #16
 800c538:	f003 037f 	and.w	r3, r3, #127	@ 0x7f
 800c53c:	ee07 3a90 	vmov	s15, r3
 800c540:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800c544:	eeb7 7a00 	vmov.f32	s14, #112	@ 0x3f800000  1.0
 800c548:	ee37 7a87 	vadd.f32	s14, s15, s14
 800c54c:	edd7 6a07 	vldr	s13, [r7, #28]
 800c550:	eec6 7a87 	vdiv.f32	s15, s13, s14
 800c554:	eefc 7ae7 	vcvt.u32.f32	s15, s15
 800c558:	ee17 2a90 	vmov	r2, s15
 800c55c:	687b      	ldr	r3, [r7, #4]
 800c55e:	605a      	str	r2, [r3, #4]
    PLL2_Clocks->PLL2_R_Frequency = (uint32_t)(float_t)(pll2vco / ((float_t)(uint32_t)((RCC->PLL2DIVR & RCC_PLL2DIVR_R2) >> 24) + (float_t)1)) ;
 800c560:	4b13      	ldr	r3, [pc, #76]	@ (800c5b0 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800c562:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 800c564:	0e1b      	lsrs	r3, r3, #24
 800c566:	f003 037f 	and.w	r3, r3, #127	@ 0x7f
 800c56a:	ee07 3a90 	vmov	s15, r3
 800c56e:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800c572:	eeb7 7a00 	vmov.f32	s14, #112	@ 0x3f800000  1.0
 800c576:	ee37 7a87 	vadd.f32	s14, s15, s14
 800c57a:	edd7 6a07 	vldr	s13, [r7, #28]
 800c57e:	eec6 7a87 	vdiv.f32	s15, s13, s14
 800c582:	eefc 7ae7 	vcvt.u32.f32	s15, s15
 800c586:	ee17 2a90 	vmov	r2, s15
 800c58a:	687b      	ldr	r3, [r7, #4]
 800c58c:	609a      	str	r2, [r3, #8]
  {
    PLL2_Clocks->PLL2_P_Frequency = 0U;
    PLL2_Clocks->PLL2_Q_Frequency = 0U;
    PLL2_Clocks->PLL2_R_Frequency = 0U;
  }
}
 800c58e:	e008      	b.n	800c5a2 <HAL_RCCEx_GetPLL2ClockFreq+0x282>
    PLL2_Clocks->PLL2_P_Frequency = 0U;
 800c590:	687b      	ldr	r3, [r7, #4]
 800c592:	2200      	movs	r2, #0
 800c594:	601a      	str	r2, [r3, #0]
    PLL2_Clocks->PLL2_Q_Frequency = 0U;
 800c596:	687b      	ldr	r3, [r7, #4]
 800c598:	2200      	movs	r2, #0
 800c59a:	605a      	str	r2, [r3, #4]
    PLL2_Clocks->PLL2_R_Frequency = 0U;
 800c59c:	687b      	ldr	r3, [r7, #4]
 800c59e:	2200      	movs	r2, #0
 800c5a0:	609a      	str	r2, [r3, #8]
}
 800c5a2:	bf00      	nop
 800c5a4:	3724      	adds	r7, #36	@ 0x24
 800c5a6:	46bd      	mov	sp, r7
 800c5a8:	f85d 7b04 	ldr.w	r7, [sp], #4
 800c5ac:	4770      	bx	lr
 800c5ae:	bf00      	nop
 800c5b0:	58024400 	.word	0x58024400
 800c5b4:	03d09000 	.word	0x03d09000
 800c5b8:	46000000 	.word	0x46000000
 800c5bc:	4c742400 	.word	0x4c742400
 800c5c0:	4a742400 	.word	0x4a742400
 800c5c4:	4bbebc20 	.word	0x4bbebc20

0800c5c8 <HAL_RCCEx_GetPLL3ClockFreq>:
  *         right PLL3CLK value. Otherwise, any configuration based on this function will be incorrect.
  * @param  PLL3_Clocks structure.
  * @retval None
  */
void HAL_RCCEx_GetPLL3ClockFreq(PLL3_ClocksTypeDef *PLL3_Clocks)
{
 800c5c8:	b480      	push	{r7}
 800c5ca:	b089      	sub	sp, #36	@ 0x24
 800c5cc:	af00      	add	r7, sp, #0
 800c5ce:	6078      	str	r0, [r7, #4]
  float_t fracn3, pll3vco;

  /* PLL3_VCO = (HSE_VALUE or HSI_VALUE or CSI_VALUE/ PLL3M) * PLL3N
     PLL3xCLK = PLL3_VCO / PLLxR
  */
  pllsource = (RCC->PLLCKSELR & RCC_PLLCKSELR_PLLSRC);
 800c5d0:	4ba1      	ldr	r3, [pc, #644]	@ (800c858 <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800c5d2:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800c5d4:	f003 0303 	and.w	r3, r3, #3
 800c5d8:	61bb      	str	r3, [r7, #24]
  pll3m = ((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM3) >> 20)  ;
 800c5da:	4b9f      	ldr	r3, [pc, #636]	@ (800c858 <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800c5dc:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800c5de:	0d1b      	lsrs	r3, r3, #20
 800c5e0:	f003 033f 	and.w	r3, r3, #63	@ 0x3f
 800c5e4:	617b      	str	r3, [r7, #20]
  pll3fracen = (RCC->PLLCFGR & RCC_PLLCFGR_PLL3FRACEN) >> RCC_PLLCFGR_PLL3FRACEN_Pos;
 800c5e6:	4b9c      	ldr	r3, [pc, #624]	@ (800c858 <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800c5e8:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800c5ea:	0a1b      	lsrs	r3, r3, #8
 800c5ec:	f003 0301 	and.w	r3, r3, #1
 800c5f0:	613b      	str	r3, [r7, #16]
  fracn3 = (float_t)(uint32_t)(pll3fracen * ((RCC->PLL3FRACR & RCC_PLL3FRACR_FRACN3) >> 3));
 800c5f2:	4b99      	ldr	r3, [pc, #612]	@ (800c858 <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800c5f4:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 800c5f6:	08db      	lsrs	r3, r3, #3
 800c5f8:	f3c3 030c 	ubfx	r3, r3, #0, #13
 800c5fc:	693a      	ldr	r2, [r7, #16]
 800c5fe:	fb02 f303 	mul.w	r3, r2, r3
 800c602:	ee07 3a90 	vmov	s15, r3
 800c606:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800c60a:	edc7 7a03 	vstr	s15, [r7, #12]

  if (pll3m != 0U)
 800c60e:	697b      	ldr	r3, [r7, #20]
 800c610:	2b00      	cmp	r3, #0
 800c612:	f000 8111 	beq.w	800c838 <HAL_RCCEx_GetPLL3ClockFreq+0x270>
  {
    switch (pllsource)
 800c616:	69bb      	ldr	r3, [r7, #24]
 800c618:	2b02      	cmp	r3, #2
 800c61a:	f000 8083 	beq.w	800c724 <HAL_RCCEx_GetPLL3ClockFreq+0x15c>
 800c61e:	69bb      	ldr	r3, [r7, #24]
 800c620:	2b02      	cmp	r3, #2
 800c622:	f200 80a1 	bhi.w	800c768 <HAL_RCCEx_GetPLL3ClockFreq+0x1a0>
 800c626:	69bb      	ldr	r3, [r7, #24]
 800c628:	2b00      	cmp	r3, #0
 800c62a:	d003      	beq.n	800c634 <HAL_RCCEx_GetPLL3ClockFreq+0x6c>
 800c62c:	69bb      	ldr	r3, [r7, #24]
 800c62e:	2b01      	cmp	r3, #1
 800c630:	d056      	beq.n	800c6e0 <HAL_RCCEx_GetPLL3ClockFreq+0x118>
 800c632:	e099      	b.n	800c768 <HAL_RCCEx_GetPLL3ClockFreq+0x1a0>
    {
      case RCC_PLLSOURCE_HSI:  /* HSI used as PLL clock source */

        if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
 800c634:	4b88      	ldr	r3, [pc, #544]	@ (800c858 <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800c636:	681b      	ldr	r3, [r3, #0]
 800c638:	f003 0320 	and.w	r3, r3, #32
 800c63c:	2b00      	cmp	r3, #0
 800c63e:	d02d      	beq.n	800c69c <HAL_RCCEx_GetPLL3ClockFreq+0xd4>
        {
          hsivalue = (HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3));
 800c640:	4b85      	ldr	r3, [pc, #532]	@ (800c858 <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800c642:	681b      	ldr	r3, [r3, #0]
 800c644:	08db      	lsrs	r3, r3, #3
 800c646:	f003 0303 	and.w	r3, r3, #3
 800c64a:	4a84      	ldr	r2, [pc, #528]	@ (800c85c <HAL_RCCEx_GetPLL3ClockFreq+0x294>)
 800c64c:	fa22 f303 	lsr.w	r3, r2, r3
 800c650:	60bb      	str	r3, [r7, #8]
          pll3vco = ((float_t)hsivalue / (float_t)pll3m) * ((float_t)(uint32_t)(RCC->PLL3DIVR & RCC_PLL3DIVR_N3) + (fracn3 / (float_t)0x2000) + (float_t)1);
 800c652:	68bb      	ldr	r3, [r7, #8]
 800c654:	ee07 3a90 	vmov	s15, r3
 800c658:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800c65c:	697b      	ldr	r3, [r7, #20]
 800c65e:	ee07 3a90 	vmov	s15, r3
 800c662:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800c666:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800c66a:	4b7b      	ldr	r3, [pc, #492]	@ (800c858 <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800c66c:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 800c66e:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800c672:	ee07 3a90 	vmov	s15, r3
 800c676:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800c67a:	ed97 6a03 	vldr	s12, [r7, #12]
 800c67e:	eddf 5a78 	vldr	s11, [pc, #480]	@ 800c860 <HAL_RCCEx_GetPLL3ClockFreq+0x298>
 800c682:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800c686:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800c68a:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800c68e:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800c692:	ee67 7a27 	vmul.f32	s15, s14, s15
 800c696:	edc7 7a07 	vstr	s15, [r7, #28]
        }
        else
        {
          pll3vco = ((float_t)HSI_VALUE / (float_t)pll3m) * ((float_t)(uint32_t)(RCC->PLL3DIVR & RCC_PLL3DIVR_N3) + (fracn3 / (float_t)0x2000) + (float_t)1);
        }
        break;
 800c69a:	e087      	b.n	800c7ac <HAL_RCCEx_GetPLL3ClockFreq+0x1e4>
          pll3vco = ((float_t)HSI_VALUE / (float_t)pll3m) * ((float_t)(uint32_t)(RCC->PLL3DIVR & RCC_PLL3DIVR_N3) + (fracn3 / (float_t)0x2000) + (float_t)1);
 800c69c:	697b      	ldr	r3, [r7, #20]
 800c69e:	ee07 3a90 	vmov	s15, r3
 800c6a2:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800c6a6:	eddf 6a6f 	vldr	s13, [pc, #444]	@ 800c864 <HAL_RCCEx_GetPLL3ClockFreq+0x29c>
 800c6aa:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800c6ae:	4b6a      	ldr	r3, [pc, #424]	@ (800c858 <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800c6b0:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 800c6b2:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800c6b6:	ee07 3a90 	vmov	s15, r3
 800c6ba:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800c6be:	ed97 6a03 	vldr	s12, [r7, #12]
 800c6c2:	eddf 5a67 	vldr	s11, [pc, #412]	@ 800c860 <HAL_RCCEx_GetPLL3ClockFreq+0x298>
 800c6c6:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800c6ca:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800c6ce:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800c6d2:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800c6d6:	ee67 7a27 	vmul.f32	s15, s14, s15
 800c6da:	edc7 7a07 	vstr	s15, [r7, #28]
        break;
 800c6de:	e065      	b.n	800c7ac <HAL_RCCEx_GetPLL3ClockFreq+0x1e4>
      case RCC_PLLSOURCE_CSI:  /* CSI used as PLL clock source */
        pll3vco = ((float_t)CSI_VALUE / (float_t)pll3m) * ((float_t)(uint32_t)(RCC->PLL3DIVR & RCC_PLL3DIVR_N3) + (fracn3 / (float_t)0x2000) + (float_t)1);
 800c6e0:	697b      	ldr	r3, [r7, #20]
 800c6e2:	ee07 3a90 	vmov	s15, r3
 800c6e6:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800c6ea:	eddf 6a5f 	vldr	s13, [pc, #380]	@ 800c868 <HAL_RCCEx_GetPLL3ClockFreq+0x2a0>
 800c6ee:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800c6f2:	4b59      	ldr	r3, [pc, #356]	@ (800c858 <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800c6f4:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 800c6f6:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800c6fa:	ee07 3a90 	vmov	s15, r3
 800c6fe:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800c702:	ed97 6a03 	vldr	s12, [r7, #12]
 800c706:	eddf 5a56 	vldr	s11, [pc, #344]	@ 800c860 <HAL_RCCEx_GetPLL3ClockFreq+0x298>
 800c70a:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800c70e:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800c712:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800c716:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800c71a:	ee67 7a27 	vmul.f32	s15, s14, s15
 800c71e:	edc7 7a07 	vstr	s15, [r7, #28]
        break;
 800c722:	e043      	b.n	800c7ac <HAL_RCCEx_GetPLL3ClockFreq+0x1e4>

      case RCC_PLLSOURCE_HSE:  /* HSE used as PLL clock source */
        pll3vco = ((float_t)HSE_VALUE / (float_t)pll3m) * ((float_t)(uint32_t)(RCC->PLL3DIVR & RCC_PLL3DIVR_N3) + (fracn3 / (float_t)0x2000) + (float_t)1);
 800c724:	697b      	ldr	r3, [r7, #20]
 800c726:	ee07 3a90 	vmov	s15, r3
 800c72a:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800c72e:	eddf 6a4f 	vldr	s13, [pc, #316]	@ 800c86c <HAL_RCCEx_GetPLL3ClockFreq+0x2a4>
 800c732:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800c736:	4b48      	ldr	r3, [pc, #288]	@ (800c858 <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800c738:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 800c73a:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800c73e:	ee07 3a90 	vmov	s15, r3
 800c742:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800c746:	ed97 6a03 	vldr	s12, [r7, #12]
 800c74a:	eddf 5a45 	vldr	s11, [pc, #276]	@ 800c860 <HAL_RCCEx_GetPLL3ClockFreq+0x298>
 800c74e:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800c752:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800c756:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800c75a:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800c75e:	ee67 7a27 	vmul.f32	s15, s14, s15
 800c762:	edc7 7a07 	vstr	s15, [r7, #28]
        break;
 800c766:	e021      	b.n	800c7ac <HAL_RCCEx_GetPLL3ClockFreq+0x1e4>

      default:
        pll3vco = ((float_t)CSI_VALUE / (float_t)pll3m) * ((float_t)(uint32_t)(RCC->PLL3DIVR & RCC_PLL3DIVR_N3) + (fracn3 / (float_t)0x2000) + (float_t)1);
 800c768:	697b      	ldr	r3, [r7, #20]
 800c76a:	ee07 3a90 	vmov	s15, r3
 800c76e:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800c772:	eddf 6a3d 	vldr	s13, [pc, #244]	@ 800c868 <HAL_RCCEx_GetPLL3ClockFreq+0x2a0>
 800c776:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800c77a:	4b37      	ldr	r3, [pc, #220]	@ (800c858 <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800c77c:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 800c77e:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800c782:	ee07 3a90 	vmov	s15, r3
 800c786:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800c78a:	ed97 6a03 	vldr	s12, [r7, #12]
 800c78e:	eddf 5a34 	vldr	s11, [pc, #208]	@ 800c860 <HAL_RCCEx_GetPLL3ClockFreq+0x298>
 800c792:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800c796:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800c79a:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800c79e:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800c7a2:	ee67 7a27 	vmul.f32	s15, s14, s15
 800c7a6:	edc7 7a07 	vstr	s15, [r7, #28]
        break;
 800c7aa:	bf00      	nop
    }
    PLL3_Clocks->PLL3_P_Frequency = (uint32_t)(float_t)(pll3vco / ((float_t)(uint32_t)((RCC->PLL3DIVR & RCC_PLL3DIVR_P3) >> 9)  + (float_t)1)) ;
 800c7ac:	4b2a      	ldr	r3, [pc, #168]	@ (800c858 <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800c7ae:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 800c7b0:	0a5b      	lsrs	r3, r3, #9
 800c7b2:	f003 037f 	and.w	r3, r3, #127	@ 0x7f
 800c7b6:	ee07 3a90 	vmov	s15, r3
 800c7ba:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800c7be:	eeb7 7a00 	vmov.f32	s14, #112	@ 0x3f800000  1.0
 800c7c2:	ee37 7a87 	vadd.f32	s14, s15, s14
 800c7c6:	edd7 6a07 	vldr	s13, [r7, #28]
 800c7ca:	eec6 7a87 	vdiv.f32	s15, s13, s14
 800c7ce:	eefc 7ae7 	vcvt.u32.f32	s15, s15
 800c7d2:	ee17 2a90 	vmov	r2, s15
 800c7d6:	687b      	ldr	r3, [r7, #4]
 800c7d8:	601a      	str	r2, [r3, #0]
    PLL3_Clocks->PLL3_Q_Frequency = (uint32_t)(float_t)(pll3vco / ((float_t)(uint32_t)((RCC->PLL3DIVR & RCC_PLL3DIVR_Q3) >> 16) + (float_t)1)) ;
 800c7da:	4b1f      	ldr	r3, [pc, #124]	@ (800c858 <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800c7dc:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 800c7de:	0c1b      	lsrs	r3, r3, #16
 800c7e0:	f003 037f 	and.w	r3, r3, #127	@ 0x7f
 800c7e4:	ee07 3a90 	vmov	s15, r3
 800c7e8:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800c7ec:	eeb7 7a00 	vmov.f32	s14, #112	@ 0x3f800000  1.0
 800c7f0:	ee37 7a87 	vadd.f32	s14, s15, s14
 800c7f4:	edd7 6a07 	vldr	s13, [r7, #28]
 800c7f8:	eec6 7a87 	vdiv.f32	s15, s13, s14
 800c7fc:	eefc 7ae7 	vcvt.u32.f32	s15, s15
 800c800:	ee17 2a90 	vmov	r2, s15
 800c804:	687b      	ldr	r3, [r7, #4]
 800c806:	605a      	str	r2, [r3, #4]
    PLL3_Clocks->PLL3_R_Frequency = (uint32_t)(float_t)(pll3vco / ((float_t)(uint32_t)((RCC->PLL3DIVR & RCC_PLL3DIVR_R3) >> 24) + (float_t)1)) ;
 800c808:	4b13      	ldr	r3, [pc, #76]	@ (800c858 <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800c80a:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 800c80c:	0e1b      	lsrs	r3, r3, #24
 800c80e:	f003 037f 	and.w	r3, r3, #127	@ 0x7f
 800c812:	ee07 3a90 	vmov	s15, r3
 800c816:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800c81a:	eeb7 7a00 	vmov.f32	s14, #112	@ 0x3f800000  1.0
 800c81e:	ee37 7a87 	vadd.f32	s14, s15, s14
 800c822:	edd7 6a07 	vldr	s13, [r7, #28]
 800c826:	eec6 7a87 	vdiv.f32	s15, s13, s14
 800c82a:	eefc 7ae7 	vcvt.u32.f32	s15, s15
 800c82e:	ee17 2a90 	vmov	r2, s15
 800c832:	687b      	ldr	r3, [r7, #4]
 800c834:	609a      	str	r2, [r3, #8]
    PLL3_Clocks->PLL3_P_Frequency = 0U;
    PLL3_Clocks->PLL3_Q_Frequency = 0U;
    PLL3_Clocks->PLL3_R_Frequency = 0U;
  }

}
 800c836:	e008      	b.n	800c84a <HAL_RCCEx_GetPLL3ClockFreq+0x282>
    PLL3_Clocks->PLL3_P_Frequency = 0U;
 800c838:	687b      	ldr	r3, [r7, #4]
 800c83a:	2200      	movs	r2, #0
 800c83c:	601a      	str	r2, [r3, #0]
    PLL3_Clocks->PLL3_Q_Frequency = 0U;
 800c83e:	687b      	ldr	r3, [r7, #4]
 800c840:	2200      	movs	r2, #0
 800c842:	605a      	str	r2, [r3, #4]
    PLL3_Clocks->PLL3_R_Frequency = 0U;
 800c844:	687b      	ldr	r3, [r7, #4]
 800c846:	2200      	movs	r2, #0
 800c848:	609a      	str	r2, [r3, #8]
}
 800c84a:	bf00      	nop
 800c84c:	3724      	adds	r7, #36	@ 0x24
 800c84e:	46bd      	mov	sp, r7
 800c850:	f85d 7b04 	ldr.w	r7, [sp], #4
 800c854:	4770      	bx	lr
 800c856:	bf00      	nop
 800c858:	58024400 	.word	0x58024400
 800c85c:	03d09000 	.word	0x03d09000
 800c860:	46000000 	.word	0x46000000
 800c864:	4c742400 	.word	0x4c742400
 800c868:	4a742400 	.word	0x4a742400
 800c86c:	4bbebc20 	.word	0x4bbebc20

0800c870 <RCCEx_PLL2_Config>:
  * @note   PLL2 is temporary disabled to apply new parameters
  *
  * @retval HAL status
  */
static HAL_StatusTypeDef RCCEx_PLL2_Config(RCC_PLL2InitTypeDef *pll2, uint32_t Divider)
{
 800c870:	b580      	push	{r7, lr}
 800c872:	b084      	sub	sp, #16
 800c874:	af00      	add	r7, sp, #0
 800c876:	6078      	str	r0, [r7, #4]
 800c878:	6039      	str	r1, [r7, #0]

  uint32_t tickstart;
  HAL_StatusTypeDef status = HAL_OK;
 800c87a:	2300      	movs	r3, #0
 800c87c:	73fb      	strb	r3, [r7, #15]
  assert_param(IS_RCC_PLL2RGE_VALUE(pll2->PLL2RGE));
  assert_param(IS_RCC_PLL2VCO_VALUE(pll2->PLL2VCOSEL));
  assert_param(IS_RCC_PLLFRACN_VALUE(pll2->PLL2FRACN));

  /* Check that PLL2 OSC clock source is already set */
  if (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_NONE)
 800c87e:	4b53      	ldr	r3, [pc, #332]	@ (800c9cc <RCCEx_PLL2_Config+0x15c>)
 800c880:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800c882:	f003 0303 	and.w	r3, r3, #3
 800c886:	2b03      	cmp	r3, #3
 800c888:	d101      	bne.n	800c88e <RCCEx_PLL2_Config+0x1e>
  {
    return HAL_ERROR;
 800c88a:	2301      	movs	r3, #1
 800c88c:	e099      	b.n	800c9c2 <RCCEx_PLL2_Config+0x152>


  else
  {
    /* Disable  PLL2. */
    __HAL_RCC_PLL2_DISABLE();
 800c88e:	4b4f      	ldr	r3, [pc, #316]	@ (800c9cc <RCCEx_PLL2_Config+0x15c>)
 800c890:	681b      	ldr	r3, [r3, #0]
 800c892:	4a4e      	ldr	r2, [pc, #312]	@ (800c9cc <RCCEx_PLL2_Config+0x15c>)
 800c894:	f023 6380 	bic.w	r3, r3, #67108864	@ 0x4000000
 800c898:	6013      	str	r3, [r2, #0]

    /* Get Start Tick*/
    tickstart = HAL_GetTick();
 800c89a:	f7f8 fcd1 	bl	8005240 <HAL_GetTick>
 800c89e:	60b8      	str	r0, [r7, #8]

    /* Wait till PLL is disabled */
    while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL2RDY) != 0U)
 800c8a0:	e008      	b.n	800c8b4 <RCCEx_PLL2_Config+0x44>
    {
      if ((HAL_GetTick() - tickstart) > PLL2_TIMEOUT_VALUE)
 800c8a2:	f7f8 fccd 	bl	8005240 <HAL_GetTick>
 800c8a6:	4602      	mov	r2, r0
 800c8a8:	68bb      	ldr	r3, [r7, #8]
 800c8aa:	1ad3      	subs	r3, r2, r3
 800c8ac:	2b02      	cmp	r3, #2
 800c8ae:	d901      	bls.n	800c8b4 <RCCEx_PLL2_Config+0x44>
      {
        return HAL_TIMEOUT;
 800c8b0:	2303      	movs	r3, #3
 800c8b2:	e086      	b.n	800c9c2 <RCCEx_PLL2_Config+0x152>
    while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL2RDY) != 0U)
 800c8b4:	4b45      	ldr	r3, [pc, #276]	@ (800c9cc <RCCEx_PLL2_Config+0x15c>)
 800c8b6:	681b      	ldr	r3, [r3, #0]
 800c8b8:	f003 6300 	and.w	r3, r3, #134217728	@ 0x8000000
 800c8bc:	2b00      	cmp	r3, #0
 800c8be:	d1f0      	bne.n	800c8a2 <RCCEx_PLL2_Config+0x32>
      }
    }

    /* Configure PLL2 multiplication and division factors. */
    __HAL_RCC_PLL2_CONFIG(pll2->PLL2M,
 800c8c0:	4b42      	ldr	r3, [pc, #264]	@ (800c9cc <RCCEx_PLL2_Config+0x15c>)
 800c8c2:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800c8c4:	f423 327c 	bic.w	r2, r3, #258048	@ 0x3f000
 800c8c8:	687b      	ldr	r3, [r7, #4]
 800c8ca:	681b      	ldr	r3, [r3, #0]
 800c8cc:	031b      	lsls	r3, r3, #12
 800c8ce:	493f      	ldr	r1, [pc, #252]	@ (800c9cc <RCCEx_PLL2_Config+0x15c>)
 800c8d0:	4313      	orrs	r3, r2
 800c8d2:	628b      	str	r3, [r1, #40]	@ 0x28
 800c8d4:	687b      	ldr	r3, [r7, #4]
 800c8d6:	685b      	ldr	r3, [r3, #4]
 800c8d8:	3b01      	subs	r3, #1
 800c8da:	f3c3 0208 	ubfx	r2, r3, #0, #9
 800c8de:	687b      	ldr	r3, [r7, #4]
 800c8e0:	689b      	ldr	r3, [r3, #8]
 800c8e2:	3b01      	subs	r3, #1
 800c8e4:	025b      	lsls	r3, r3, #9
 800c8e6:	b29b      	uxth	r3, r3
 800c8e8:	431a      	orrs	r2, r3
 800c8ea:	687b      	ldr	r3, [r7, #4]
 800c8ec:	68db      	ldr	r3, [r3, #12]
 800c8ee:	3b01      	subs	r3, #1
 800c8f0:	041b      	lsls	r3, r3, #16
 800c8f2:	f403 03fe 	and.w	r3, r3, #8323072	@ 0x7f0000
 800c8f6:	431a      	orrs	r2, r3
 800c8f8:	687b      	ldr	r3, [r7, #4]
 800c8fa:	691b      	ldr	r3, [r3, #16]
 800c8fc:	3b01      	subs	r3, #1
 800c8fe:	061b      	lsls	r3, r3, #24
 800c900:	f003 43fe 	and.w	r3, r3, #2130706432	@ 0x7f000000
 800c904:	4931      	ldr	r1, [pc, #196]	@ (800c9cc <RCCEx_PLL2_Config+0x15c>)
 800c906:	4313      	orrs	r3, r2
 800c908:	638b      	str	r3, [r1, #56]	@ 0x38
                          pll2->PLL2P,
                          pll2->PLL2Q,
                          pll2->PLL2R);

    /* Select PLL2 input reference frequency range: VCI */
    __HAL_RCC_PLL2_VCIRANGE(pll2->PLL2RGE) ;
 800c90a:	4b30      	ldr	r3, [pc, #192]	@ (800c9cc <RCCEx_PLL2_Config+0x15c>)
 800c90c:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800c90e:	f023 02c0 	bic.w	r2, r3, #192	@ 0xc0
 800c912:	687b      	ldr	r3, [r7, #4]
 800c914:	695b      	ldr	r3, [r3, #20]
 800c916:	492d      	ldr	r1, [pc, #180]	@ (800c9cc <RCCEx_PLL2_Config+0x15c>)
 800c918:	4313      	orrs	r3, r2
 800c91a:	62cb      	str	r3, [r1, #44]	@ 0x2c

    /* Select PLL2 output frequency range : VCO */
    __HAL_RCC_PLL2_VCORANGE(pll2->PLL2VCOSEL) ;
 800c91c:	4b2b      	ldr	r3, [pc, #172]	@ (800c9cc <RCCEx_PLL2_Config+0x15c>)
 800c91e:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800c920:	f023 0220 	bic.w	r2, r3, #32
 800c924:	687b      	ldr	r3, [r7, #4]
 800c926:	699b      	ldr	r3, [r3, #24]
 800c928:	4928      	ldr	r1, [pc, #160]	@ (800c9cc <RCCEx_PLL2_Config+0x15c>)
 800c92a:	4313      	orrs	r3, r2
 800c92c:	62cb      	str	r3, [r1, #44]	@ 0x2c

    /* Disable PLL2FRACN . */
    __HAL_RCC_PLL2FRACN_DISABLE();
 800c92e:	4b27      	ldr	r3, [pc, #156]	@ (800c9cc <RCCEx_PLL2_Config+0x15c>)
 800c930:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800c932:	4a26      	ldr	r2, [pc, #152]	@ (800c9cc <RCCEx_PLL2_Config+0x15c>)
 800c934:	f023 0310 	bic.w	r3, r3, #16
 800c938:	62d3      	str	r3, [r2, #44]	@ 0x2c

    /* Configures PLL2 clock Fractional Part Of The Multiplication Factor */
    __HAL_RCC_PLL2FRACN_CONFIG(pll2->PLL2FRACN);
 800c93a:	4b24      	ldr	r3, [pc, #144]	@ (800c9cc <RCCEx_PLL2_Config+0x15c>)
 800c93c:	6bda      	ldr	r2, [r3, #60]	@ 0x3c
 800c93e:	4b24      	ldr	r3, [pc, #144]	@ (800c9d0 <RCCEx_PLL2_Config+0x160>)
 800c940:	4013      	ands	r3, r2
 800c942:	687a      	ldr	r2, [r7, #4]
 800c944:	69d2      	ldr	r2, [r2, #28]
 800c946:	00d2      	lsls	r2, r2, #3
 800c948:	4920      	ldr	r1, [pc, #128]	@ (800c9cc <RCCEx_PLL2_Config+0x15c>)
 800c94a:	4313      	orrs	r3, r2
 800c94c:	63cb      	str	r3, [r1, #60]	@ 0x3c

    /* Enable PLL2FRACN . */
    __HAL_RCC_PLL2FRACN_ENABLE();
 800c94e:	4b1f      	ldr	r3, [pc, #124]	@ (800c9cc <RCCEx_PLL2_Config+0x15c>)
 800c950:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800c952:	4a1e      	ldr	r2, [pc, #120]	@ (800c9cc <RCCEx_PLL2_Config+0x15c>)
 800c954:	f043 0310 	orr.w	r3, r3, #16
 800c958:	62d3      	str	r3, [r2, #44]	@ 0x2c

    /* Enable the PLL2 clock output */
    if (Divider == DIVIDER_P_UPDATE)
 800c95a:	683b      	ldr	r3, [r7, #0]
 800c95c:	2b00      	cmp	r3, #0
 800c95e:	d106      	bne.n	800c96e <RCCEx_PLL2_Config+0xfe>
    {
      __HAL_RCC_PLL2CLKOUT_ENABLE(RCC_PLL2_DIVP);
 800c960:	4b1a      	ldr	r3, [pc, #104]	@ (800c9cc <RCCEx_PLL2_Config+0x15c>)
 800c962:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800c964:	4a19      	ldr	r2, [pc, #100]	@ (800c9cc <RCCEx_PLL2_Config+0x15c>)
 800c966:	f443 2300 	orr.w	r3, r3, #524288	@ 0x80000
 800c96a:	62d3      	str	r3, [r2, #44]	@ 0x2c
 800c96c:	e00f      	b.n	800c98e <RCCEx_PLL2_Config+0x11e>
    }
    else if (Divider == DIVIDER_Q_UPDATE)
 800c96e:	683b      	ldr	r3, [r7, #0]
 800c970:	2b01      	cmp	r3, #1
 800c972:	d106      	bne.n	800c982 <RCCEx_PLL2_Config+0x112>
    {
      __HAL_RCC_PLL2CLKOUT_ENABLE(RCC_PLL2_DIVQ);
 800c974:	4b15      	ldr	r3, [pc, #84]	@ (800c9cc <RCCEx_PLL2_Config+0x15c>)
 800c976:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800c978:	4a14      	ldr	r2, [pc, #80]	@ (800c9cc <RCCEx_PLL2_Config+0x15c>)
 800c97a:	f443 1380 	orr.w	r3, r3, #1048576	@ 0x100000
 800c97e:	62d3      	str	r3, [r2, #44]	@ 0x2c
 800c980:	e005      	b.n	800c98e <RCCEx_PLL2_Config+0x11e>
    }
    else
    {
      __HAL_RCC_PLL2CLKOUT_ENABLE(RCC_PLL2_DIVR);
 800c982:	4b12      	ldr	r3, [pc, #72]	@ (800c9cc <RCCEx_PLL2_Config+0x15c>)
 800c984:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800c986:	4a11      	ldr	r2, [pc, #68]	@ (800c9cc <RCCEx_PLL2_Config+0x15c>)
 800c988:	f443 1300 	orr.w	r3, r3, #2097152	@ 0x200000
 800c98c:	62d3      	str	r3, [r2, #44]	@ 0x2c
    }

    /* Enable  PLL2. */
    __HAL_RCC_PLL2_ENABLE();
 800c98e:	4b0f      	ldr	r3, [pc, #60]	@ (800c9cc <RCCEx_PLL2_Config+0x15c>)
 800c990:	681b      	ldr	r3, [r3, #0]
 800c992:	4a0e      	ldr	r2, [pc, #56]	@ (800c9cc <RCCEx_PLL2_Config+0x15c>)
 800c994:	f043 6380 	orr.w	r3, r3, #67108864	@ 0x4000000
 800c998:	6013      	str	r3, [r2, #0]

    /* Get Start Tick*/
    tickstart = HAL_GetTick();
 800c99a:	f7f8 fc51 	bl	8005240 <HAL_GetTick>
 800c99e:	60b8      	str	r0, [r7, #8]

    /* Wait till PLL2 is ready */
    while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL2RDY) == 0U)
 800c9a0:	e008      	b.n	800c9b4 <RCCEx_PLL2_Config+0x144>
    {
      if ((HAL_GetTick() - tickstart) > PLL2_TIMEOUT_VALUE)
 800c9a2:	f7f8 fc4d 	bl	8005240 <HAL_GetTick>
 800c9a6:	4602      	mov	r2, r0
 800c9a8:	68bb      	ldr	r3, [r7, #8]
 800c9aa:	1ad3      	subs	r3, r2, r3
 800c9ac:	2b02      	cmp	r3, #2
 800c9ae:	d901      	bls.n	800c9b4 <RCCEx_PLL2_Config+0x144>
      {
        return HAL_TIMEOUT;
 800c9b0:	2303      	movs	r3, #3
 800c9b2:	e006      	b.n	800c9c2 <RCCEx_PLL2_Config+0x152>
    while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL2RDY) == 0U)
 800c9b4:	4b05      	ldr	r3, [pc, #20]	@ (800c9cc <RCCEx_PLL2_Config+0x15c>)
 800c9b6:	681b      	ldr	r3, [r3, #0]
 800c9b8:	f003 6300 	and.w	r3, r3, #134217728	@ 0x8000000
 800c9bc:	2b00      	cmp	r3, #0
 800c9be:	d0f0      	beq.n	800c9a2 <RCCEx_PLL2_Config+0x132>
    }

  }


  return status;
 800c9c0:	7bfb      	ldrb	r3, [r7, #15]
}
 800c9c2:	4618      	mov	r0, r3
 800c9c4:	3710      	adds	r7, #16
 800c9c6:	46bd      	mov	sp, r7
 800c9c8:	bd80      	pop	{r7, pc}
 800c9ca:	bf00      	nop
 800c9cc:	58024400 	.word	0x58024400
 800c9d0:	ffff0007 	.word	0xffff0007

0800c9d4 <RCCEx_PLL3_Config>:
  * @note   PLL3 is temporary disabled to apply new parameters
  *
  * @retval HAL status
  */
static HAL_StatusTypeDef RCCEx_PLL3_Config(RCC_PLL3InitTypeDef *pll3, uint32_t Divider)
{
 800c9d4:	b580      	push	{r7, lr}
 800c9d6:	b084      	sub	sp, #16
 800c9d8:	af00      	add	r7, sp, #0
 800c9da:	6078      	str	r0, [r7, #4]
 800c9dc:	6039      	str	r1, [r7, #0]
  uint32_t tickstart;
  HAL_StatusTypeDef status = HAL_OK;
 800c9de:	2300      	movs	r3, #0
 800c9e0:	73fb      	strb	r3, [r7, #15]
  assert_param(IS_RCC_PLL3RGE_VALUE(pll3->PLL3RGE));
  assert_param(IS_RCC_PLL3VCO_VALUE(pll3->PLL3VCOSEL));
  assert_param(IS_RCC_PLLFRACN_VALUE(pll3->PLL3FRACN));

  /* Check that PLL3 OSC clock source is already set */
  if (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_NONE)
 800c9e2:	4b53      	ldr	r3, [pc, #332]	@ (800cb30 <RCCEx_PLL3_Config+0x15c>)
 800c9e4:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800c9e6:	f003 0303 	and.w	r3, r3, #3
 800c9ea:	2b03      	cmp	r3, #3
 800c9ec:	d101      	bne.n	800c9f2 <RCCEx_PLL3_Config+0x1e>
  {
    return HAL_ERROR;
 800c9ee:	2301      	movs	r3, #1
 800c9f0:	e099      	b.n	800cb26 <RCCEx_PLL3_Config+0x152>


  else
  {
    /* Disable  PLL3. */
    __HAL_RCC_PLL3_DISABLE();
 800c9f2:	4b4f      	ldr	r3, [pc, #316]	@ (800cb30 <RCCEx_PLL3_Config+0x15c>)
 800c9f4:	681b      	ldr	r3, [r3, #0]
 800c9f6:	4a4e      	ldr	r2, [pc, #312]	@ (800cb30 <RCCEx_PLL3_Config+0x15c>)
 800c9f8:	f023 5380 	bic.w	r3, r3, #268435456	@ 0x10000000
 800c9fc:	6013      	str	r3, [r2, #0]

    /* Get Start Tick*/
    tickstart = HAL_GetTick();
 800c9fe:	f7f8 fc1f 	bl	8005240 <HAL_GetTick>
 800ca02:	60b8      	str	r0, [r7, #8]
    /* Wait till PLL3 is ready */
    while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL3RDY) != 0U)
 800ca04:	e008      	b.n	800ca18 <RCCEx_PLL3_Config+0x44>
    {
      if ((HAL_GetTick() - tickstart) > PLL3_TIMEOUT_VALUE)
 800ca06:	f7f8 fc1b 	bl	8005240 <HAL_GetTick>
 800ca0a:	4602      	mov	r2, r0
 800ca0c:	68bb      	ldr	r3, [r7, #8]
 800ca0e:	1ad3      	subs	r3, r2, r3
 800ca10:	2b02      	cmp	r3, #2
 800ca12:	d901      	bls.n	800ca18 <RCCEx_PLL3_Config+0x44>
      {
        return HAL_TIMEOUT;
 800ca14:	2303      	movs	r3, #3
 800ca16:	e086      	b.n	800cb26 <RCCEx_PLL3_Config+0x152>
    while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL3RDY) != 0U)
 800ca18:	4b45      	ldr	r3, [pc, #276]	@ (800cb30 <RCCEx_PLL3_Config+0x15c>)
 800ca1a:	681b      	ldr	r3, [r3, #0]
 800ca1c:	f003 5300 	and.w	r3, r3, #536870912	@ 0x20000000
 800ca20:	2b00      	cmp	r3, #0
 800ca22:	d1f0      	bne.n	800ca06 <RCCEx_PLL3_Config+0x32>
      }
    }

    /* Configure the PLL3  multiplication and division factors. */
    __HAL_RCC_PLL3_CONFIG(pll3->PLL3M,
 800ca24:	4b42      	ldr	r3, [pc, #264]	@ (800cb30 <RCCEx_PLL3_Config+0x15c>)
 800ca26:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800ca28:	f023 727c 	bic.w	r2, r3, #66060288	@ 0x3f00000
 800ca2c:	687b      	ldr	r3, [r7, #4]
 800ca2e:	681b      	ldr	r3, [r3, #0]
 800ca30:	051b      	lsls	r3, r3, #20
 800ca32:	493f      	ldr	r1, [pc, #252]	@ (800cb30 <RCCEx_PLL3_Config+0x15c>)
 800ca34:	4313      	orrs	r3, r2
 800ca36:	628b      	str	r3, [r1, #40]	@ 0x28
 800ca38:	687b      	ldr	r3, [r7, #4]
 800ca3a:	685b      	ldr	r3, [r3, #4]
 800ca3c:	3b01      	subs	r3, #1
 800ca3e:	f3c3 0208 	ubfx	r2, r3, #0, #9
 800ca42:	687b      	ldr	r3, [r7, #4]
 800ca44:	689b      	ldr	r3, [r3, #8]
 800ca46:	3b01      	subs	r3, #1
 800ca48:	025b      	lsls	r3, r3, #9
 800ca4a:	b29b      	uxth	r3, r3
 800ca4c:	431a      	orrs	r2, r3
 800ca4e:	687b      	ldr	r3, [r7, #4]
 800ca50:	68db      	ldr	r3, [r3, #12]
 800ca52:	3b01      	subs	r3, #1
 800ca54:	041b      	lsls	r3, r3, #16
 800ca56:	f403 03fe 	and.w	r3, r3, #8323072	@ 0x7f0000
 800ca5a:	431a      	orrs	r2, r3
 800ca5c:	687b      	ldr	r3, [r7, #4]
 800ca5e:	691b      	ldr	r3, [r3, #16]
 800ca60:	3b01      	subs	r3, #1
 800ca62:	061b      	lsls	r3, r3, #24
 800ca64:	f003 43fe 	and.w	r3, r3, #2130706432	@ 0x7f000000
 800ca68:	4931      	ldr	r1, [pc, #196]	@ (800cb30 <RCCEx_PLL3_Config+0x15c>)
 800ca6a:	4313      	orrs	r3, r2
 800ca6c:	640b      	str	r3, [r1, #64]	@ 0x40
                          pll3->PLL3P,
                          pll3->PLL3Q,
                          pll3->PLL3R);

    /* Select PLL3 input reference frequency range: VCI */
    __HAL_RCC_PLL3_VCIRANGE(pll3->PLL3RGE) ;
 800ca6e:	4b30      	ldr	r3, [pc, #192]	@ (800cb30 <RCCEx_PLL3_Config+0x15c>)
 800ca70:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800ca72:	f423 6240 	bic.w	r2, r3, #3072	@ 0xc00
 800ca76:	687b      	ldr	r3, [r7, #4]
 800ca78:	695b      	ldr	r3, [r3, #20]
 800ca7a:	492d      	ldr	r1, [pc, #180]	@ (800cb30 <RCCEx_PLL3_Config+0x15c>)
 800ca7c:	4313      	orrs	r3, r2
 800ca7e:	62cb      	str	r3, [r1, #44]	@ 0x2c

    /* Select PLL3 output frequency range : VCO */
    __HAL_RCC_PLL3_VCORANGE(pll3->PLL3VCOSEL) ;
 800ca80:	4b2b      	ldr	r3, [pc, #172]	@ (800cb30 <RCCEx_PLL3_Config+0x15c>)
 800ca82:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800ca84:	f423 7200 	bic.w	r2, r3, #512	@ 0x200
 800ca88:	687b      	ldr	r3, [r7, #4]
 800ca8a:	699b      	ldr	r3, [r3, #24]
 800ca8c:	4928      	ldr	r1, [pc, #160]	@ (800cb30 <RCCEx_PLL3_Config+0x15c>)
 800ca8e:	4313      	orrs	r3, r2
 800ca90:	62cb      	str	r3, [r1, #44]	@ 0x2c

    /* Disable PLL3FRACN . */
    __HAL_RCC_PLL3FRACN_DISABLE();
 800ca92:	4b27      	ldr	r3, [pc, #156]	@ (800cb30 <RCCEx_PLL3_Config+0x15c>)
 800ca94:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800ca96:	4a26      	ldr	r2, [pc, #152]	@ (800cb30 <RCCEx_PLL3_Config+0x15c>)
 800ca98:	f423 7380 	bic.w	r3, r3, #256	@ 0x100
 800ca9c:	62d3      	str	r3, [r2, #44]	@ 0x2c

    /* Configures PLL3 clock Fractional Part Of The Multiplication Factor */
    __HAL_RCC_PLL3FRACN_CONFIG(pll3->PLL3FRACN);
 800ca9e:	4b24      	ldr	r3, [pc, #144]	@ (800cb30 <RCCEx_PLL3_Config+0x15c>)
 800caa0:	6c5a      	ldr	r2, [r3, #68]	@ 0x44
 800caa2:	4b24      	ldr	r3, [pc, #144]	@ (800cb34 <RCCEx_PLL3_Config+0x160>)
 800caa4:	4013      	ands	r3, r2
 800caa6:	687a      	ldr	r2, [r7, #4]
 800caa8:	69d2      	ldr	r2, [r2, #28]
 800caaa:	00d2      	lsls	r2, r2, #3
 800caac:	4920      	ldr	r1, [pc, #128]	@ (800cb30 <RCCEx_PLL3_Config+0x15c>)
 800caae:	4313      	orrs	r3, r2
 800cab0:	644b      	str	r3, [r1, #68]	@ 0x44

    /* Enable PLL3FRACN . */
    __HAL_RCC_PLL3FRACN_ENABLE();
 800cab2:	4b1f      	ldr	r3, [pc, #124]	@ (800cb30 <RCCEx_PLL3_Config+0x15c>)
 800cab4:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800cab6:	4a1e      	ldr	r2, [pc, #120]	@ (800cb30 <RCCEx_PLL3_Config+0x15c>)
 800cab8:	f443 7380 	orr.w	r3, r3, #256	@ 0x100
 800cabc:	62d3      	str	r3, [r2, #44]	@ 0x2c

    /* Enable the PLL3 clock output */
    if (Divider == DIVIDER_P_UPDATE)
 800cabe:	683b      	ldr	r3, [r7, #0]
 800cac0:	2b00      	cmp	r3, #0
 800cac2:	d106      	bne.n	800cad2 <RCCEx_PLL3_Config+0xfe>
    {
      __HAL_RCC_PLL3CLKOUT_ENABLE(RCC_PLL3_DIVP);
 800cac4:	4b1a      	ldr	r3, [pc, #104]	@ (800cb30 <RCCEx_PLL3_Config+0x15c>)
 800cac6:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800cac8:	4a19      	ldr	r2, [pc, #100]	@ (800cb30 <RCCEx_PLL3_Config+0x15c>)
 800caca:	f443 0380 	orr.w	r3, r3, #4194304	@ 0x400000
 800cace:	62d3      	str	r3, [r2, #44]	@ 0x2c
 800cad0:	e00f      	b.n	800caf2 <RCCEx_PLL3_Config+0x11e>
    }
    else if (Divider == DIVIDER_Q_UPDATE)
 800cad2:	683b      	ldr	r3, [r7, #0]
 800cad4:	2b01      	cmp	r3, #1
 800cad6:	d106      	bne.n	800cae6 <RCCEx_PLL3_Config+0x112>
    {
      __HAL_RCC_PLL3CLKOUT_ENABLE(RCC_PLL3_DIVQ);
 800cad8:	4b15      	ldr	r3, [pc, #84]	@ (800cb30 <RCCEx_PLL3_Config+0x15c>)
 800cada:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800cadc:	4a14      	ldr	r2, [pc, #80]	@ (800cb30 <RCCEx_PLL3_Config+0x15c>)
 800cade:	f443 0300 	orr.w	r3, r3, #8388608	@ 0x800000
 800cae2:	62d3      	str	r3, [r2, #44]	@ 0x2c
 800cae4:	e005      	b.n	800caf2 <RCCEx_PLL3_Config+0x11e>
    }
    else
    {
      __HAL_RCC_PLL3CLKOUT_ENABLE(RCC_PLL3_DIVR);
 800cae6:	4b12      	ldr	r3, [pc, #72]	@ (800cb30 <RCCEx_PLL3_Config+0x15c>)
 800cae8:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800caea:	4a11      	ldr	r2, [pc, #68]	@ (800cb30 <RCCEx_PLL3_Config+0x15c>)
 800caec:	f043 7380 	orr.w	r3, r3, #16777216	@ 0x1000000
 800caf0:	62d3      	str	r3, [r2, #44]	@ 0x2c
    }

    /* Enable  PLL3. */
    __HAL_RCC_PLL3_ENABLE();
 800caf2:	4b0f      	ldr	r3, [pc, #60]	@ (800cb30 <RCCEx_PLL3_Config+0x15c>)
 800caf4:	681b      	ldr	r3, [r3, #0]
 800caf6:	4a0e      	ldr	r2, [pc, #56]	@ (800cb30 <RCCEx_PLL3_Config+0x15c>)
 800caf8:	f043 5380 	orr.w	r3, r3, #268435456	@ 0x10000000
 800cafc:	6013      	str	r3, [r2, #0]

    /* Get Start Tick*/
    tickstart = HAL_GetTick();
 800cafe:	f7f8 fb9f 	bl	8005240 <HAL_GetTick>
 800cb02:	60b8      	str	r0, [r7, #8]

    /* Wait till PLL3 is ready */
    while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL3RDY) == 0U)
 800cb04:	e008      	b.n	800cb18 <RCCEx_PLL3_Config+0x144>
    {
      if ((HAL_GetTick() - tickstart) > PLL3_TIMEOUT_VALUE)
 800cb06:	f7f8 fb9b 	bl	8005240 <HAL_GetTick>
 800cb0a:	4602      	mov	r2, r0
 800cb0c:	68bb      	ldr	r3, [r7, #8]
 800cb0e:	1ad3      	subs	r3, r2, r3
 800cb10:	2b02      	cmp	r3, #2
 800cb12:	d901      	bls.n	800cb18 <RCCEx_PLL3_Config+0x144>
      {
        return HAL_TIMEOUT;
 800cb14:	2303      	movs	r3, #3
 800cb16:	e006      	b.n	800cb26 <RCCEx_PLL3_Config+0x152>
    while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL3RDY) == 0U)
 800cb18:	4b05      	ldr	r3, [pc, #20]	@ (800cb30 <RCCEx_PLL3_Config+0x15c>)
 800cb1a:	681b      	ldr	r3, [r3, #0]
 800cb1c:	f003 5300 	and.w	r3, r3, #536870912	@ 0x20000000
 800cb20:	2b00      	cmp	r3, #0
 800cb22:	d0f0      	beq.n	800cb06 <RCCEx_PLL3_Config+0x132>
    }

  }


  return status;
 800cb24:	7bfb      	ldrb	r3, [r7, #15]
}
 800cb26:	4618      	mov	r0, r3
 800cb28:	3710      	adds	r7, #16
 800cb2a:	46bd      	mov	sp, r7
 800cb2c:	bd80      	pop	{r7, pc}
 800cb2e:	bf00      	nop
 800cb30:	58024400 	.word	0x58024400
 800cb34:	ffff0007 	.word	0xffff0007

0800cb38 <HAL_RNG_Init>:
  * @param  hrng pointer to a RNG_HandleTypeDef structure that contains
  *                the configuration information for RNG.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_RNG_Init(RNG_HandleTypeDef *hrng)
{
 800cb38:	b580      	push	{r7, lr}
 800cb3a:	b084      	sub	sp, #16
 800cb3c:	af00      	add	r7, sp, #0
 800cb3e:	6078      	str	r0, [r7, #4]
  uint32_t tickstart;
  /* Check the RNG handle allocation */
  if (hrng == NULL)
 800cb40:	687b      	ldr	r3, [r7, #4]
 800cb42:	2b00      	cmp	r3, #0
 800cb44:	d101      	bne.n	800cb4a <HAL_RNG_Init+0x12>
  {
    return HAL_ERROR;
 800cb46:	2301      	movs	r3, #1
 800cb48:	e054      	b.n	800cbf4 <HAL_RNG_Init+0xbc>

    /* Init the low level hardware */
    hrng->MspInitCallback(hrng);
  }
#else
  if (hrng->State == HAL_RNG_STATE_RESET)
 800cb4a:	687b      	ldr	r3, [r7, #4]
 800cb4c:	7a5b      	ldrb	r3, [r3, #9]
 800cb4e:	b2db      	uxtb	r3, r3
 800cb50:	2b00      	cmp	r3, #0
 800cb52:	d105      	bne.n	800cb60 <HAL_RNG_Init+0x28>
  {
    /* Allocate lock resource and initialize it */
    hrng->Lock = HAL_UNLOCKED;
 800cb54:	687b      	ldr	r3, [r7, #4]
 800cb56:	2200      	movs	r2, #0
 800cb58:	721a      	strb	r2, [r3, #8]

    /* Init the low level hardware */
    HAL_RNG_MspInit(hrng);
 800cb5a:	6878      	ldr	r0, [r7, #4]
 800cb5c:	f7f6 fd22 	bl	80035a4 <HAL_RNG_MspInit>
  }
#endif /* USE_HAL_RNG_REGISTER_CALLBACKS */

  /* Change RNG peripheral state */
  hrng->State = HAL_RNG_STATE_BUSY;
 800cb60:	687b      	ldr	r3, [r7, #4]
 800cb62:	2202      	movs	r2, #2
 800cb64:	725a      	strb	r2, [r3, #9]
      }
    }
  }
#else
  /* Clock Error Detection Configuration */
  MODIFY_REG(hrng->Instance->CR, RNG_CR_CED, hrng->Init.ClockErrorDetection);
 800cb66:	687b      	ldr	r3, [r7, #4]
 800cb68:	681b      	ldr	r3, [r3, #0]
 800cb6a:	681b      	ldr	r3, [r3, #0]
 800cb6c:	f023 0120 	bic.w	r1, r3, #32
 800cb70:	687b      	ldr	r3, [r7, #4]
 800cb72:	685a      	ldr	r2, [r3, #4]
 800cb74:	687b      	ldr	r3, [r7, #4]
 800cb76:	681b      	ldr	r3, [r3, #0]
 800cb78:	430a      	orrs	r2, r1
 800cb7a:	601a      	str	r2, [r3, #0]
#endif /* RNG_CR_CONDRST */

  /* Enable the RNG Peripheral */
  __HAL_RNG_ENABLE(hrng);
 800cb7c:	687b      	ldr	r3, [r7, #4]
 800cb7e:	681b      	ldr	r3, [r3, #0]
 800cb80:	681a      	ldr	r2, [r3, #0]
 800cb82:	687b      	ldr	r3, [r7, #4]
 800cb84:	681b      	ldr	r3, [r3, #0]
 800cb86:	f042 0204 	orr.w	r2, r2, #4
 800cb8a:	601a      	str	r2, [r3, #0]

  /* verify that no seed error */
  if (__HAL_RNG_GET_IT(hrng, RNG_IT_SEI) != RESET)
 800cb8c:	687b      	ldr	r3, [r7, #4]
 800cb8e:	681b      	ldr	r3, [r3, #0]
 800cb90:	685b      	ldr	r3, [r3, #4]
 800cb92:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 800cb96:	2b40      	cmp	r3, #64	@ 0x40
 800cb98:	d104      	bne.n	800cba4 <HAL_RNG_Init+0x6c>
  {
    hrng->State = HAL_RNG_STATE_ERROR;
 800cb9a:	687b      	ldr	r3, [r7, #4]
 800cb9c:	2204      	movs	r2, #4
 800cb9e:	725a      	strb	r2, [r3, #9]
    return HAL_ERROR;
 800cba0:	2301      	movs	r3, #1
 800cba2:	e027      	b.n	800cbf4 <HAL_RNG_Init+0xbc>
  }
  /* Get tick */
  tickstart = HAL_GetTick();
 800cba4:	f7f8 fb4c 	bl	8005240 <HAL_GetTick>
 800cba8:	60f8      	str	r0, [r7, #12]
  /* Check if data register contains valid random data */
  while (__HAL_RNG_GET_FLAG(hrng, RNG_FLAG_SECS) != RESET)
 800cbaa:	e015      	b.n	800cbd8 <HAL_RNG_Init+0xa0>
  {
    if ((HAL_GetTick() - tickstart) > RNG_TIMEOUT_VALUE)
 800cbac:	f7f8 fb48 	bl	8005240 <HAL_GetTick>
 800cbb0:	4602      	mov	r2, r0
 800cbb2:	68fb      	ldr	r3, [r7, #12]
 800cbb4:	1ad3      	subs	r3, r2, r3
 800cbb6:	2b02      	cmp	r3, #2
 800cbb8:	d90e      	bls.n	800cbd8 <HAL_RNG_Init+0xa0>
    {
      /* New check to avoid false timeout detection in case of preemption */
      if (__HAL_RNG_GET_FLAG(hrng, RNG_FLAG_SECS) != RESET)
 800cbba:	687b      	ldr	r3, [r7, #4]
 800cbbc:	681b      	ldr	r3, [r3, #0]
 800cbbe:	685b      	ldr	r3, [r3, #4]
 800cbc0:	f003 0304 	and.w	r3, r3, #4
 800cbc4:	2b04      	cmp	r3, #4
 800cbc6:	d107      	bne.n	800cbd8 <HAL_RNG_Init+0xa0>
      {
        hrng->State = HAL_RNG_STATE_ERROR;
 800cbc8:	687b      	ldr	r3, [r7, #4]
 800cbca:	2204      	movs	r2, #4
 800cbcc:	725a      	strb	r2, [r3, #9]
        hrng->ErrorCode = HAL_RNG_ERROR_TIMEOUT;
 800cbce:	687b      	ldr	r3, [r7, #4]
 800cbd0:	2202      	movs	r2, #2
 800cbd2:	60da      	str	r2, [r3, #12]
        return HAL_ERROR;
 800cbd4:	2301      	movs	r3, #1
 800cbd6:	e00d      	b.n	800cbf4 <HAL_RNG_Init+0xbc>
  while (__HAL_RNG_GET_FLAG(hrng, RNG_FLAG_SECS) != RESET)
 800cbd8:	687b      	ldr	r3, [r7, #4]
 800cbda:	681b      	ldr	r3, [r3, #0]
 800cbdc:	685b      	ldr	r3, [r3, #4]
 800cbde:	f003 0304 	and.w	r3, r3, #4
 800cbe2:	2b04      	cmp	r3, #4
 800cbe4:	d0e2      	beq.n	800cbac <HAL_RNG_Init+0x74>
      }
    }
  }

  /* Initialize the RNG state */
  hrng->State = HAL_RNG_STATE_READY;
 800cbe6:	687b      	ldr	r3, [r7, #4]
 800cbe8:	2201      	movs	r2, #1
 800cbea:	725a      	strb	r2, [r3, #9]

  /* Initialise the error code */
  hrng->ErrorCode = HAL_RNG_ERROR_NONE;
 800cbec:	687b      	ldr	r3, [r7, #4]
 800cbee:	2200      	movs	r2, #0
 800cbf0:	60da      	str	r2, [r3, #12]

  /* Return function status */
  return HAL_OK;
 800cbf2:	2300      	movs	r3, #0
}
 800cbf4:	4618      	mov	r0, r3
 800cbf6:	3710      	adds	r7, #16
 800cbf8:	46bd      	mov	sp, r7
 800cbfa:	bd80      	pop	{r7, pc}

0800cbfc <HAL_RNG_GenerateRandomNumber>:
  * @param  random32bit pointer to generated random number variable if successful.
  * @retval HAL status
  */

HAL_StatusTypeDef HAL_RNG_GenerateRandomNumber(RNG_HandleTypeDef *hrng, uint32_t *random32bit)
{
 800cbfc:	b580      	push	{r7, lr}
 800cbfe:	b084      	sub	sp, #16
 800cc00:	af00      	add	r7, sp, #0
 800cc02:	6078      	str	r0, [r7, #4]
 800cc04:	6039      	str	r1, [r7, #0]
  uint32_t tickstart;
  HAL_StatusTypeDef status = HAL_OK;
 800cc06:	2300      	movs	r3, #0
 800cc08:	73fb      	strb	r3, [r7, #15]

  /* Process Locked */
  __HAL_LOCK(hrng);
 800cc0a:	687b      	ldr	r3, [r7, #4]
 800cc0c:	7a1b      	ldrb	r3, [r3, #8]
 800cc0e:	2b01      	cmp	r3, #1
 800cc10:	d101      	bne.n	800cc16 <HAL_RNG_GenerateRandomNumber+0x1a>
 800cc12:	2302      	movs	r3, #2
 800cc14:	e044      	b.n	800cca0 <HAL_RNG_GenerateRandomNumber+0xa4>
 800cc16:	687b      	ldr	r3, [r7, #4]
 800cc18:	2201      	movs	r2, #1
 800cc1a:	721a      	strb	r2, [r3, #8]

  /* Check RNG peripheral state */
  if (hrng->State == HAL_RNG_STATE_READY)
 800cc1c:	687b      	ldr	r3, [r7, #4]
 800cc1e:	7a5b      	ldrb	r3, [r3, #9]
 800cc20:	b2db      	uxtb	r3, r3
 800cc22:	2b01      	cmp	r3, #1
 800cc24:	d133      	bne.n	800cc8e <HAL_RNG_GenerateRandomNumber+0x92>
  {
    /* Change RNG peripheral state */
    hrng->State = HAL_RNG_STATE_BUSY;
 800cc26:	687b      	ldr	r3, [r7, #4]
 800cc28:	2202      	movs	r2, #2
 800cc2a:	725a      	strb	r2, [r3, #9]
      }
    }
#endif /* RNG_CR_CONDRST */

    /* Get tick */
    tickstart = HAL_GetTick();
 800cc2c:	f7f8 fb08 	bl	8005240 <HAL_GetTick>
 800cc30:	60b8      	str	r0, [r7, #8]

    /* Check if data register contains valid random data */
    while (__HAL_RNG_GET_FLAG(hrng, RNG_FLAG_DRDY) == RESET)
 800cc32:	e018      	b.n	800cc66 <HAL_RNG_GenerateRandomNumber+0x6a>
    {
      if ((HAL_GetTick() - tickstart) > RNG_TIMEOUT_VALUE)
 800cc34:	f7f8 fb04 	bl	8005240 <HAL_GetTick>
 800cc38:	4602      	mov	r2, r0
 800cc3a:	68bb      	ldr	r3, [r7, #8]
 800cc3c:	1ad3      	subs	r3, r2, r3
 800cc3e:	2b02      	cmp	r3, #2
 800cc40:	d911      	bls.n	800cc66 <HAL_RNG_GenerateRandomNumber+0x6a>
      {
        /* New check to avoid false timeout detection in case of preemption */
        if (__HAL_RNG_GET_FLAG(hrng, RNG_FLAG_DRDY) == RESET)
 800cc42:	687b      	ldr	r3, [r7, #4]
 800cc44:	681b      	ldr	r3, [r3, #0]
 800cc46:	685b      	ldr	r3, [r3, #4]
 800cc48:	f003 0301 	and.w	r3, r3, #1
 800cc4c:	2b01      	cmp	r3, #1
 800cc4e:	d00a      	beq.n	800cc66 <HAL_RNG_GenerateRandomNumber+0x6a>
        {
          hrng->State = HAL_RNG_STATE_READY;
 800cc50:	687b      	ldr	r3, [r7, #4]
 800cc52:	2201      	movs	r2, #1
 800cc54:	725a      	strb	r2, [r3, #9]
          hrng->ErrorCode = HAL_RNG_ERROR_TIMEOUT;
 800cc56:	687b      	ldr	r3, [r7, #4]
 800cc58:	2202      	movs	r2, #2
 800cc5a:	60da      	str	r2, [r3, #12]
          /* Process Unlocked */
          __HAL_UNLOCK(hrng);
 800cc5c:	687b      	ldr	r3, [r7, #4]
 800cc5e:	2200      	movs	r2, #0
 800cc60:	721a      	strb	r2, [r3, #8]
          return HAL_ERROR;
 800cc62:	2301      	movs	r3, #1
 800cc64:	e01c      	b.n	800cca0 <HAL_RNG_GenerateRandomNumber+0xa4>
    while (__HAL_RNG_GET_FLAG(hrng, RNG_FLAG_DRDY) == RESET)
 800cc66:	687b      	ldr	r3, [r7, #4]
 800cc68:	681b      	ldr	r3, [r3, #0]
 800cc6a:	685b      	ldr	r3, [r3, #4]
 800cc6c:	f003 0301 	and.w	r3, r3, #1
 800cc70:	2b01      	cmp	r3, #1
 800cc72:	d1df      	bne.n	800cc34 <HAL_RNG_GenerateRandomNumber+0x38>
        }
      }
    }

    /* Get a 32bit Random number */
    hrng->RandomNumber = hrng->Instance->DR;
 800cc74:	687b      	ldr	r3, [r7, #4]
 800cc76:	681b      	ldr	r3, [r3, #0]
 800cc78:	689a      	ldr	r2, [r3, #8]
 800cc7a:	687b      	ldr	r3, [r7, #4]
 800cc7c:	611a      	str	r2, [r3, #16]
    else /* No seed error */
    {
      *random32bit = hrng->RandomNumber;
    }
#else
    *random32bit = hrng->RandomNumber;
 800cc7e:	687b      	ldr	r3, [r7, #4]
 800cc80:	691a      	ldr	r2, [r3, #16]
 800cc82:	683b      	ldr	r3, [r7, #0]
 800cc84:	601a      	str	r2, [r3, #0]

#endif /* RNG_CR_CONDRST */
    hrng->State = HAL_RNG_STATE_READY;
 800cc86:	687b      	ldr	r3, [r7, #4]
 800cc88:	2201      	movs	r2, #1
 800cc8a:	725a      	strb	r2, [r3, #9]
 800cc8c:	e004      	b.n	800cc98 <HAL_RNG_GenerateRandomNumber+0x9c>
  }
  else
  {
    hrng->ErrorCode = HAL_RNG_ERROR_BUSY;
 800cc8e:	687b      	ldr	r3, [r7, #4]
 800cc90:	2204      	movs	r2, #4
 800cc92:	60da      	str	r2, [r3, #12]
    status = HAL_ERROR;
 800cc94:	2301      	movs	r3, #1
 800cc96:	73fb      	strb	r3, [r7, #15]
  }

  /* Process Unlocked */
  __HAL_UNLOCK(hrng);
 800cc98:	687b      	ldr	r3, [r7, #4]
 800cc9a:	2200      	movs	r2, #0
 800cc9c:	721a      	strb	r2, [r3, #8]

  return status;
 800cc9e:	7bfb      	ldrb	r3, [r7, #15]
}
 800cca0:	4618      	mov	r0, r3
 800cca2:	3710      	adds	r7, #16
 800cca4:	46bd      	mov	sp, r7
 800cca6:	bd80      	pop	{r7, pc}

0800cca8 <HAL_TIM_Base_Init>:
  *         Ex: call @ref HAL_TIM_Base_DeInit() before HAL_TIM_Base_Init()
  * @param  htim TIM Base handle
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim)
{
 800cca8:	b580      	push	{r7, lr}
 800ccaa:	b082      	sub	sp, #8
 800ccac:	af00      	add	r7, sp, #0
 800ccae:	6078      	str	r0, [r7, #4]
  /* Check the TIM handle allocation */
  if (htim == NULL)
 800ccb0:	687b      	ldr	r3, [r7, #4]
 800ccb2:	2b00      	cmp	r3, #0
 800ccb4:	d101      	bne.n	800ccba <HAL_TIM_Base_Init+0x12>
  {
    return HAL_ERROR;
 800ccb6:	2301      	movs	r3, #1
 800ccb8:	e049      	b.n	800cd4e <HAL_TIM_Base_Init+0xa6>
  assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
  assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
  assert_param(IS_TIM_PERIOD(htim, htim->Init.Period));
  assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));

  if (htim->State == HAL_TIM_STATE_RESET)
 800ccba:	687b      	ldr	r3, [r7, #4]
 800ccbc:	f893 303d 	ldrb.w	r3, [r3, #61]	@ 0x3d
 800ccc0:	b2db      	uxtb	r3, r3
 800ccc2:	2b00      	cmp	r3, #0
 800ccc4:	d106      	bne.n	800ccd4 <HAL_TIM_Base_Init+0x2c>
  {
    /* Allocate lock resource and initialize it */
    htim->Lock = HAL_UNLOCKED;
 800ccc6:	687b      	ldr	r3, [r7, #4]
 800ccc8:	2200      	movs	r2, #0
 800ccca:	f883 203c 	strb.w	r2, [r3, #60]	@ 0x3c
    }
    /* Init the low level hardware : GPIO, CLOCK, NVIC */
    htim->Base_MspInitCallback(htim);
#else
    /* Init the low level hardware : GPIO, CLOCK, NVIC */
    HAL_TIM_Base_MspInit(htim);
 800ccce:	6878      	ldr	r0, [r7, #4]
 800ccd0:	f000 f841 	bl	800cd56 <HAL_TIM_Base_MspInit>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
  }

  /* Set the TIM state */
  htim->State = HAL_TIM_STATE_BUSY;
 800ccd4:	687b      	ldr	r3, [r7, #4]
 800ccd6:	2202      	movs	r2, #2
 800ccd8:	f883 203d 	strb.w	r2, [r3, #61]	@ 0x3d

  /* Set the Time Base configuration */
  TIM_Base_SetConfig(htim->Instance, &htim->Init);
 800ccdc:	687b      	ldr	r3, [r7, #4]
 800ccde:	681a      	ldr	r2, [r3, #0]
 800cce0:	687b      	ldr	r3, [r7, #4]
 800cce2:	3304      	adds	r3, #4
 800cce4:	4619      	mov	r1, r3
 800cce6:	4610      	mov	r0, r2
 800cce8:	f000 f9e8 	bl	800d0bc <TIM_Base_SetConfig>

  /* Initialize the DMA burst operation state */
  htim->DMABurstState = HAL_DMA_BURST_STATE_READY;
 800ccec:	687b      	ldr	r3, [r7, #4]
 800ccee:	2201      	movs	r2, #1
 800ccf0:	f883 2048 	strb.w	r2, [r3, #72]	@ 0x48

  /* Initialize the TIM channels state */
  TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
 800ccf4:	687b      	ldr	r3, [r7, #4]
 800ccf6:	2201      	movs	r2, #1
 800ccf8:	f883 203e 	strb.w	r2, [r3, #62]	@ 0x3e
 800ccfc:	687b      	ldr	r3, [r7, #4]
 800ccfe:	2201      	movs	r2, #1
 800cd00:	f883 203f 	strb.w	r2, [r3, #63]	@ 0x3f
 800cd04:	687b      	ldr	r3, [r7, #4]
 800cd06:	2201      	movs	r2, #1
 800cd08:	f883 2040 	strb.w	r2, [r3, #64]	@ 0x40
 800cd0c:	687b      	ldr	r3, [r7, #4]
 800cd0e:	2201      	movs	r2, #1
 800cd10:	f883 2041 	strb.w	r2, [r3, #65]	@ 0x41
 800cd14:	687b      	ldr	r3, [r7, #4]
 800cd16:	2201      	movs	r2, #1
 800cd18:	f883 2042 	strb.w	r2, [r3, #66]	@ 0x42
 800cd1c:	687b      	ldr	r3, [r7, #4]
 800cd1e:	2201      	movs	r2, #1
 800cd20:	f883 2043 	strb.w	r2, [r3, #67]	@ 0x43
  TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
 800cd24:	687b      	ldr	r3, [r7, #4]
 800cd26:	2201      	movs	r2, #1
 800cd28:	f883 2044 	strb.w	r2, [r3, #68]	@ 0x44
 800cd2c:	687b      	ldr	r3, [r7, #4]
 800cd2e:	2201      	movs	r2, #1
 800cd30:	f883 2045 	strb.w	r2, [r3, #69]	@ 0x45
 800cd34:	687b      	ldr	r3, [r7, #4]
 800cd36:	2201      	movs	r2, #1
 800cd38:	f883 2046 	strb.w	r2, [r3, #70]	@ 0x46
 800cd3c:	687b      	ldr	r3, [r7, #4]
 800cd3e:	2201      	movs	r2, #1
 800cd40:	f883 2047 	strb.w	r2, [r3, #71]	@ 0x47

  /* Initialize the TIM state*/
  htim->State = HAL_TIM_STATE_READY;
 800cd44:	687b      	ldr	r3, [r7, #4]
 800cd46:	2201      	movs	r2, #1
 800cd48:	f883 203d 	strb.w	r2, [r3, #61]	@ 0x3d

  return HAL_OK;
 800cd4c:	2300      	movs	r3, #0
}
 800cd4e:	4618      	mov	r0, r3
 800cd50:	3708      	adds	r7, #8
 800cd52:	46bd      	mov	sp, r7
 800cd54:	bd80      	pop	{r7, pc}

0800cd56 <HAL_TIM_Base_MspInit>:
  * @brief  Initializes the TIM Base MSP.
  * @param  htim TIM Base handle
  * @retval None
  */
__weak void HAL_TIM_Base_MspInit(TIM_HandleTypeDef *htim)
{
 800cd56:	b480      	push	{r7}
 800cd58:	b083      	sub	sp, #12
 800cd5a:	af00      	add	r7, sp, #0
 800cd5c:	6078      	str	r0, [r7, #4]
  UNUSED(htim);

  /* NOTE : This function should not be modified, when the callback is needed,
            the HAL_TIM_Base_MspInit could be implemented in the user file
   */
}
 800cd5e:	bf00      	nop
 800cd60:	370c      	adds	r7, #12
 800cd62:	46bd      	mov	sp, r7
 800cd64:	f85d 7b04 	ldr.w	r7, [sp], #4
 800cd68:	4770      	bx	lr
	...

0800cd6c <HAL_TIM_Base_Start_IT>:
  * @brief  Starts the TIM Base generation in interrupt mode.
  * @param  htim TIM Base handle
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_TIM_Base_Start_IT(TIM_HandleTypeDef *htim)
{
 800cd6c:	b480      	push	{r7}
 800cd6e:	b085      	sub	sp, #20
 800cd70:	af00      	add	r7, sp, #0
 800cd72:	6078      	str	r0, [r7, #4]

  /* Check the parameters */
  assert_param(IS_TIM_INSTANCE(htim->Instance));

  /* Check the TIM state */
  if (htim->State != HAL_TIM_STATE_READY)
 800cd74:	687b      	ldr	r3, [r7, #4]
 800cd76:	f893 303d 	ldrb.w	r3, [r3, #61]	@ 0x3d
 800cd7a:	b2db      	uxtb	r3, r3
 800cd7c:	2b01      	cmp	r3, #1
 800cd7e:	d001      	beq.n	800cd84 <HAL_TIM_Base_Start_IT+0x18>
  {
    return HAL_ERROR;
 800cd80:	2301      	movs	r3, #1
 800cd82:	e054      	b.n	800ce2e <HAL_TIM_Base_Start_IT+0xc2>
  }

  /* Set the TIM state */
  htim->State = HAL_TIM_STATE_BUSY;
 800cd84:	687b      	ldr	r3, [r7, #4]
 800cd86:	2202      	movs	r2, #2
 800cd88:	f883 203d 	strb.w	r2, [r3, #61]	@ 0x3d

  /* Enable the TIM Update interrupt */
  __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE);
 800cd8c:	687b      	ldr	r3, [r7, #4]
 800cd8e:	681b      	ldr	r3, [r3, #0]
 800cd90:	68da      	ldr	r2, [r3, #12]
 800cd92:	687b      	ldr	r3, [r7, #4]
 800cd94:	681b      	ldr	r3, [r3, #0]
 800cd96:	f042 0201 	orr.w	r2, r2, #1
 800cd9a:	60da      	str	r2, [r3, #12]

  /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
  if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
 800cd9c:	687b      	ldr	r3, [r7, #4]
 800cd9e:	681b      	ldr	r3, [r3, #0]
 800cda0:	4a26      	ldr	r2, [pc, #152]	@ (800ce3c <HAL_TIM_Base_Start_IT+0xd0>)
 800cda2:	4293      	cmp	r3, r2
 800cda4:	d022      	beq.n	800cdec <HAL_TIM_Base_Start_IT+0x80>
 800cda6:	687b      	ldr	r3, [r7, #4]
 800cda8:	681b      	ldr	r3, [r3, #0]
 800cdaa:	f1b3 4f80 	cmp.w	r3, #1073741824	@ 0x40000000
 800cdae:	d01d      	beq.n	800cdec <HAL_TIM_Base_Start_IT+0x80>
 800cdb0:	687b      	ldr	r3, [r7, #4]
 800cdb2:	681b      	ldr	r3, [r3, #0]
 800cdb4:	4a22      	ldr	r2, [pc, #136]	@ (800ce40 <HAL_TIM_Base_Start_IT+0xd4>)
 800cdb6:	4293      	cmp	r3, r2
 800cdb8:	d018      	beq.n	800cdec <HAL_TIM_Base_Start_IT+0x80>
 800cdba:	687b      	ldr	r3, [r7, #4]
 800cdbc:	681b      	ldr	r3, [r3, #0]
 800cdbe:	4a21      	ldr	r2, [pc, #132]	@ (800ce44 <HAL_TIM_Base_Start_IT+0xd8>)
 800cdc0:	4293      	cmp	r3, r2
 800cdc2:	d013      	beq.n	800cdec <HAL_TIM_Base_Start_IT+0x80>
 800cdc4:	687b      	ldr	r3, [r7, #4]
 800cdc6:	681b      	ldr	r3, [r3, #0]
 800cdc8:	4a1f      	ldr	r2, [pc, #124]	@ (800ce48 <HAL_TIM_Base_Start_IT+0xdc>)
 800cdca:	4293      	cmp	r3, r2
 800cdcc:	d00e      	beq.n	800cdec <HAL_TIM_Base_Start_IT+0x80>
 800cdce:	687b      	ldr	r3, [r7, #4]
 800cdd0:	681b      	ldr	r3, [r3, #0]
 800cdd2:	4a1e      	ldr	r2, [pc, #120]	@ (800ce4c <HAL_TIM_Base_Start_IT+0xe0>)
 800cdd4:	4293      	cmp	r3, r2
 800cdd6:	d009      	beq.n	800cdec <HAL_TIM_Base_Start_IT+0x80>
 800cdd8:	687b      	ldr	r3, [r7, #4]
 800cdda:	681b      	ldr	r3, [r3, #0]
 800cddc:	4a1c      	ldr	r2, [pc, #112]	@ (800ce50 <HAL_TIM_Base_Start_IT+0xe4>)
 800cdde:	4293      	cmp	r3, r2
 800cde0:	d004      	beq.n	800cdec <HAL_TIM_Base_Start_IT+0x80>
 800cde2:	687b      	ldr	r3, [r7, #4]
 800cde4:	681b      	ldr	r3, [r3, #0]
 800cde6:	4a1b      	ldr	r2, [pc, #108]	@ (800ce54 <HAL_TIM_Base_Start_IT+0xe8>)
 800cde8:	4293      	cmp	r3, r2
 800cdea:	d115      	bne.n	800ce18 <HAL_TIM_Base_Start_IT+0xac>
  {
    tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
 800cdec:	687b      	ldr	r3, [r7, #4]
 800cdee:	681b      	ldr	r3, [r3, #0]
 800cdf0:	689a      	ldr	r2, [r3, #8]
 800cdf2:	4b19      	ldr	r3, [pc, #100]	@ (800ce58 <HAL_TIM_Base_Start_IT+0xec>)
 800cdf4:	4013      	ands	r3, r2
 800cdf6:	60fb      	str	r3, [r7, #12]
    if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
 800cdf8:	68fb      	ldr	r3, [r7, #12]
 800cdfa:	2b06      	cmp	r3, #6
 800cdfc:	d015      	beq.n	800ce2a <HAL_TIM_Base_Start_IT+0xbe>
 800cdfe:	68fb      	ldr	r3, [r7, #12]
 800ce00:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 800ce04:	d011      	beq.n	800ce2a <HAL_TIM_Base_Start_IT+0xbe>
    {
      __HAL_TIM_ENABLE(htim);
 800ce06:	687b      	ldr	r3, [r7, #4]
 800ce08:	681b      	ldr	r3, [r3, #0]
 800ce0a:	681a      	ldr	r2, [r3, #0]
 800ce0c:	687b      	ldr	r3, [r7, #4]
 800ce0e:	681b      	ldr	r3, [r3, #0]
 800ce10:	f042 0201 	orr.w	r2, r2, #1
 800ce14:	601a      	str	r2, [r3, #0]
    if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
 800ce16:	e008      	b.n	800ce2a <HAL_TIM_Base_Start_IT+0xbe>
    }
  }
  else
  {
    __HAL_TIM_ENABLE(htim);
 800ce18:	687b      	ldr	r3, [r7, #4]
 800ce1a:	681b      	ldr	r3, [r3, #0]
 800ce1c:	681a      	ldr	r2, [r3, #0]
 800ce1e:	687b      	ldr	r3, [r7, #4]
 800ce20:	681b      	ldr	r3, [r3, #0]
 800ce22:	f042 0201 	orr.w	r2, r2, #1
 800ce26:	601a      	str	r2, [r3, #0]
 800ce28:	e000      	b.n	800ce2c <HAL_TIM_Base_Start_IT+0xc0>
    if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
 800ce2a:	bf00      	nop
  }

  /* Return function status */
  return HAL_OK;
 800ce2c:	2300      	movs	r3, #0
}
 800ce2e:	4618      	mov	r0, r3
 800ce30:	3714      	adds	r7, #20
 800ce32:	46bd      	mov	sp, r7
 800ce34:	f85d 7b04 	ldr.w	r7, [sp], #4
 800ce38:	4770      	bx	lr
 800ce3a:	bf00      	nop
 800ce3c:	40010000 	.word	0x40010000
 800ce40:	40000400 	.word	0x40000400
 800ce44:	40000800 	.word	0x40000800
 800ce48:	40000c00 	.word	0x40000c00
 800ce4c:	40010400 	.word	0x40010400
 800ce50:	40001800 	.word	0x40001800
 800ce54:	40014000 	.word	0x40014000
 800ce58:	00010007 	.word	0x00010007

0800ce5c <HAL_TIM_IRQHandler>:
  * @brief  This function handles TIM interrupts requests.
  * @param  htim TIM  handle
  * @retval None
  */
void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
{
 800ce5c:	b580      	push	{r7, lr}
 800ce5e:	b084      	sub	sp, #16
 800ce60:	af00      	add	r7, sp, #0
 800ce62:	6078      	str	r0, [r7, #4]
  uint32_t itsource = htim->Instance->DIER;
 800ce64:	687b      	ldr	r3, [r7, #4]
 800ce66:	681b      	ldr	r3, [r3, #0]
 800ce68:	68db      	ldr	r3, [r3, #12]
 800ce6a:	60fb      	str	r3, [r7, #12]
  uint32_t itflag   = htim->Instance->SR;
 800ce6c:	687b      	ldr	r3, [r7, #4]
 800ce6e:	681b      	ldr	r3, [r3, #0]
 800ce70:	691b      	ldr	r3, [r3, #16]
 800ce72:	60bb      	str	r3, [r7, #8]

  /* Capture compare 1 event */
  if ((itflag & (TIM_FLAG_CC1)) == (TIM_FLAG_CC1))
 800ce74:	68bb      	ldr	r3, [r7, #8]
 800ce76:	f003 0302 	and.w	r3, r3, #2
 800ce7a:	2b00      	cmp	r3, #0
 800ce7c:	d020      	beq.n	800cec0 <HAL_TIM_IRQHandler+0x64>
  {
    if ((itsource & (TIM_IT_CC1)) == (TIM_IT_CC1))
 800ce7e:	68fb      	ldr	r3, [r7, #12]
 800ce80:	f003 0302 	and.w	r3, r3, #2
 800ce84:	2b00      	cmp	r3, #0
 800ce86:	d01b      	beq.n	800cec0 <HAL_TIM_IRQHandler+0x64>
    {
      {
        __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC1);
 800ce88:	687b      	ldr	r3, [r7, #4]
 800ce8a:	681b      	ldr	r3, [r3, #0]
 800ce8c:	f06f 0202 	mvn.w	r2, #2
 800ce90:	611a      	str	r2, [r3, #16]
        htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
 800ce92:	687b      	ldr	r3, [r7, #4]
 800ce94:	2201      	movs	r2, #1
 800ce96:	771a      	strb	r2, [r3, #28]

        /* Input capture event */
        if ((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U)
 800ce98:	687b      	ldr	r3, [r7, #4]
 800ce9a:	681b      	ldr	r3, [r3, #0]
 800ce9c:	699b      	ldr	r3, [r3, #24]
 800ce9e:	f003 0303 	and.w	r3, r3, #3
 800cea2:	2b00      	cmp	r3, #0
 800cea4:	d003      	beq.n	800ceae <HAL_TIM_IRQHandler+0x52>
        {
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
          htim->IC_CaptureCallback(htim);
#else
          HAL_TIM_IC_CaptureCallback(htim);
 800cea6:	6878      	ldr	r0, [r7, #4]
 800cea8:	f000 f8e9 	bl	800d07e <HAL_TIM_IC_CaptureCallback>
 800ceac:	e005      	b.n	800ceba <HAL_TIM_IRQHandler+0x5e>
        {
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
          htim->OC_DelayElapsedCallback(htim);
          htim->PWM_PulseFinishedCallback(htim);
#else
          HAL_TIM_OC_DelayElapsedCallback(htim);
 800ceae:	6878      	ldr	r0, [r7, #4]
 800ceb0:	f000 f8db 	bl	800d06a <HAL_TIM_OC_DelayElapsedCallback>
          HAL_TIM_PWM_PulseFinishedCallback(htim);
 800ceb4:	6878      	ldr	r0, [r7, #4]
 800ceb6:	f000 f8ec 	bl	800d092 <HAL_TIM_PWM_PulseFinishedCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
        }
        htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
 800ceba:	687b      	ldr	r3, [r7, #4]
 800cebc:	2200      	movs	r2, #0
 800cebe:	771a      	strb	r2, [r3, #28]
      }
    }
  }
  /* Capture compare 2 event */
  if ((itflag & (TIM_FLAG_CC2)) == (TIM_FLAG_CC2))
 800cec0:	68bb      	ldr	r3, [r7, #8]
 800cec2:	f003 0304 	and.w	r3, r3, #4
 800cec6:	2b00      	cmp	r3, #0
 800cec8:	d020      	beq.n	800cf0c <HAL_TIM_IRQHandler+0xb0>
  {
    if ((itsource & (TIM_IT_CC2)) == (TIM_IT_CC2))
 800ceca:	68fb      	ldr	r3, [r7, #12]
 800cecc:	f003 0304 	and.w	r3, r3, #4
 800ced0:	2b00      	cmp	r3, #0
 800ced2:	d01b      	beq.n	800cf0c <HAL_TIM_IRQHandler+0xb0>
    {
      __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC2);
 800ced4:	687b      	ldr	r3, [r7, #4]
 800ced6:	681b      	ldr	r3, [r3, #0]
 800ced8:	f06f 0204 	mvn.w	r2, #4
 800cedc:	611a      	str	r2, [r3, #16]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
 800cede:	687b      	ldr	r3, [r7, #4]
 800cee0:	2202      	movs	r2, #2
 800cee2:	771a      	strb	r2, [r3, #28]
      /* Input capture event */
      if ((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U)
 800cee4:	687b      	ldr	r3, [r7, #4]
 800cee6:	681b      	ldr	r3, [r3, #0]
 800cee8:	699b      	ldr	r3, [r3, #24]
 800ceea:	f403 7340 	and.w	r3, r3, #768	@ 0x300
 800ceee:	2b00      	cmp	r3, #0
 800cef0:	d003      	beq.n	800cefa <HAL_TIM_IRQHandler+0x9e>
      {
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
        htim->IC_CaptureCallback(htim);
#else
        HAL_TIM_IC_CaptureCallback(htim);
 800cef2:	6878      	ldr	r0, [r7, #4]
 800cef4:	f000 f8c3 	bl	800d07e <HAL_TIM_IC_CaptureCallback>
 800cef8:	e005      	b.n	800cf06 <HAL_TIM_IRQHandler+0xaa>
      {
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
        htim->OC_DelayElapsedCallback(htim);
        htim->PWM_PulseFinishedCallback(htim);
#else
        HAL_TIM_OC_DelayElapsedCallback(htim);
 800cefa:	6878      	ldr	r0, [r7, #4]
 800cefc:	f000 f8b5 	bl	800d06a <HAL_TIM_OC_DelayElapsedCallback>
        HAL_TIM_PWM_PulseFinishedCallback(htim);
 800cf00:	6878      	ldr	r0, [r7, #4]
 800cf02:	f000 f8c6 	bl	800d092 <HAL_TIM_PWM_PulseFinishedCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
      }
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
 800cf06:	687b      	ldr	r3, [r7, #4]
 800cf08:	2200      	movs	r2, #0
 800cf0a:	771a      	strb	r2, [r3, #28]
    }
  }
  /* Capture compare 3 event */
  if ((itflag & (TIM_FLAG_CC3)) == (TIM_FLAG_CC3))
 800cf0c:	68bb      	ldr	r3, [r7, #8]
 800cf0e:	f003 0308 	and.w	r3, r3, #8
 800cf12:	2b00      	cmp	r3, #0
 800cf14:	d020      	beq.n	800cf58 <HAL_TIM_IRQHandler+0xfc>
  {
    if ((itsource & (TIM_IT_CC3)) == (TIM_IT_CC3))
 800cf16:	68fb      	ldr	r3, [r7, #12]
 800cf18:	f003 0308 	and.w	r3, r3, #8
 800cf1c:	2b00      	cmp	r3, #0
 800cf1e:	d01b      	beq.n	800cf58 <HAL_TIM_IRQHandler+0xfc>
    {
      __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC3);
 800cf20:	687b      	ldr	r3, [r7, #4]
 800cf22:	681b      	ldr	r3, [r3, #0]
 800cf24:	f06f 0208 	mvn.w	r2, #8
 800cf28:	611a      	str	r2, [r3, #16]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
 800cf2a:	687b      	ldr	r3, [r7, #4]
 800cf2c:	2204      	movs	r2, #4
 800cf2e:	771a      	strb	r2, [r3, #28]
      /* Input capture event */
      if ((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U)
 800cf30:	687b      	ldr	r3, [r7, #4]
 800cf32:	681b      	ldr	r3, [r3, #0]
 800cf34:	69db      	ldr	r3, [r3, #28]
 800cf36:	f003 0303 	and.w	r3, r3, #3
 800cf3a:	2b00      	cmp	r3, #0
 800cf3c:	d003      	beq.n	800cf46 <HAL_TIM_IRQHandler+0xea>
      {
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
        htim->IC_CaptureCallback(htim);
#else
        HAL_TIM_IC_CaptureCallback(htim);
 800cf3e:	6878      	ldr	r0, [r7, #4]
 800cf40:	f000 f89d 	bl	800d07e <HAL_TIM_IC_CaptureCallback>
 800cf44:	e005      	b.n	800cf52 <HAL_TIM_IRQHandler+0xf6>
      {
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
        htim->OC_DelayElapsedCallback(htim);
        htim->PWM_PulseFinishedCallback(htim);
#else
        HAL_TIM_OC_DelayElapsedCallback(htim);
 800cf46:	6878      	ldr	r0, [r7, #4]
 800cf48:	f000 f88f 	bl	800d06a <HAL_TIM_OC_DelayElapsedCallback>
        HAL_TIM_PWM_PulseFinishedCallback(htim);
 800cf4c:	6878      	ldr	r0, [r7, #4]
 800cf4e:	f000 f8a0 	bl	800d092 <HAL_TIM_PWM_PulseFinishedCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
      }
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
 800cf52:	687b      	ldr	r3, [r7, #4]
 800cf54:	2200      	movs	r2, #0
 800cf56:	771a      	strb	r2, [r3, #28]
    }
  }
  /* Capture compare 4 event */
  if ((itflag & (TIM_FLAG_CC4)) == (TIM_FLAG_CC4))
 800cf58:	68bb      	ldr	r3, [r7, #8]
 800cf5a:	f003 0310 	and.w	r3, r3, #16
 800cf5e:	2b00      	cmp	r3, #0
 800cf60:	d020      	beq.n	800cfa4 <HAL_TIM_IRQHandler+0x148>
  {
    if ((itsource & (TIM_IT_CC4)) == (TIM_IT_CC4))
 800cf62:	68fb      	ldr	r3, [r7, #12]
 800cf64:	f003 0310 	and.w	r3, r3, #16
 800cf68:	2b00      	cmp	r3, #0
 800cf6a:	d01b      	beq.n	800cfa4 <HAL_TIM_IRQHandler+0x148>
    {
      __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC4);
 800cf6c:	687b      	ldr	r3, [r7, #4]
 800cf6e:	681b      	ldr	r3, [r3, #0]
 800cf70:	f06f 0210 	mvn.w	r2, #16
 800cf74:	611a      	str	r2, [r3, #16]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
 800cf76:	687b      	ldr	r3, [r7, #4]
 800cf78:	2208      	movs	r2, #8
 800cf7a:	771a      	strb	r2, [r3, #28]
      /* Input capture event */
      if ((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U)
 800cf7c:	687b      	ldr	r3, [r7, #4]
 800cf7e:	681b      	ldr	r3, [r3, #0]
 800cf80:	69db      	ldr	r3, [r3, #28]
 800cf82:	f403 7340 	and.w	r3, r3, #768	@ 0x300
 800cf86:	2b00      	cmp	r3, #0
 800cf88:	d003      	beq.n	800cf92 <HAL_TIM_IRQHandler+0x136>
      {
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
        htim->IC_CaptureCallback(htim);
#else
        HAL_TIM_IC_CaptureCallback(htim);
 800cf8a:	6878      	ldr	r0, [r7, #4]
 800cf8c:	f000 f877 	bl	800d07e <HAL_TIM_IC_CaptureCallback>
 800cf90:	e005      	b.n	800cf9e <HAL_TIM_IRQHandler+0x142>
      {
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
        htim->OC_DelayElapsedCallback(htim);
        htim->PWM_PulseFinishedCallback(htim);
#else
        HAL_TIM_OC_DelayElapsedCallback(htim);
 800cf92:	6878      	ldr	r0, [r7, #4]
 800cf94:	f000 f869 	bl	800d06a <HAL_TIM_OC_DelayElapsedCallback>
        HAL_TIM_PWM_PulseFinishedCallback(htim);
 800cf98:	6878      	ldr	r0, [r7, #4]
 800cf9a:	f000 f87a 	bl	800d092 <HAL_TIM_PWM_PulseFinishedCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
      }
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
 800cf9e:	687b      	ldr	r3, [r7, #4]
 800cfa0:	2200      	movs	r2, #0
 800cfa2:	771a      	strb	r2, [r3, #28]
    }
  }
  /* TIM Update event */
  if ((itflag & (TIM_FLAG_UPDATE)) == (TIM_FLAG_UPDATE))
 800cfa4:	68bb      	ldr	r3, [r7, #8]
 800cfa6:	f003 0301 	and.w	r3, r3, #1
 800cfaa:	2b00      	cmp	r3, #0
 800cfac:	d00c      	beq.n	800cfc8 <HAL_TIM_IRQHandler+0x16c>
  {
    if ((itsource & (TIM_IT_UPDATE)) == (TIM_IT_UPDATE))
 800cfae:	68fb      	ldr	r3, [r7, #12]
 800cfb0:	f003 0301 	and.w	r3, r3, #1
 800cfb4:	2b00      	cmp	r3, #0
 800cfb6:	d007      	beq.n	800cfc8 <HAL_TIM_IRQHandler+0x16c>
    {
      __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_UPDATE);
 800cfb8:	687b      	ldr	r3, [r7, #4]
 800cfba:	681b      	ldr	r3, [r3, #0]
 800cfbc:	f06f 0201 	mvn.w	r2, #1
 800cfc0:	611a      	str	r2, [r3, #16]
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
      htim->PeriodElapsedCallback(htim);
#else
      HAL_TIM_PeriodElapsedCallback(htim);
 800cfc2:	6878      	ldr	r0, [r7, #4]
 800cfc4:	f7f5 fb22 	bl	800260c <HAL_TIM_PeriodElapsedCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
    }
  }
  /* TIM Break input event */
  if (((itflag & (TIM_FLAG_BREAK)) == (TIM_FLAG_BREAK)) || \
 800cfc8:	68bb      	ldr	r3, [r7, #8]
 800cfca:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 800cfce:	2b00      	cmp	r3, #0
 800cfd0:	d104      	bne.n	800cfdc <HAL_TIM_IRQHandler+0x180>
      ((itflag & (TIM_FLAG_SYSTEM_BREAK)) == (TIM_FLAG_SYSTEM_BREAK)))
 800cfd2:	68bb      	ldr	r3, [r7, #8]
 800cfd4:	f403 5300 	and.w	r3, r3, #8192	@ 0x2000
  if (((itflag & (TIM_FLAG_BREAK)) == (TIM_FLAG_BREAK)) || \
 800cfd8:	2b00      	cmp	r3, #0
 800cfda:	d00c      	beq.n	800cff6 <HAL_TIM_IRQHandler+0x19a>
  {
    if ((itsource & (TIM_IT_BREAK)) == (TIM_IT_BREAK))
 800cfdc:	68fb      	ldr	r3, [r7, #12]
 800cfde:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 800cfe2:	2b00      	cmp	r3, #0
 800cfe4:	d007      	beq.n	800cff6 <HAL_TIM_IRQHandler+0x19a>
    {
      __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_BREAK | TIM_FLAG_SYSTEM_BREAK);
 800cfe6:	687b      	ldr	r3, [r7, #4]
 800cfe8:	681b      	ldr	r3, [r3, #0]
 800cfea:	f46f 5202 	mvn.w	r2, #8320	@ 0x2080
 800cfee:	611a      	str	r2, [r3, #16]
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
      htim->BreakCallback(htim);
#else
      HAL_TIMEx_BreakCallback(htim);
 800cff0:	6878      	ldr	r0, [r7, #4]
 800cff2:	f000 f913 	bl	800d21c <HAL_TIMEx_BreakCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
    }
  }
  /* TIM Break2 input event */
  if ((itflag & (TIM_FLAG_BREAK2)) == (TIM_FLAG_BREAK2))
 800cff6:	68bb      	ldr	r3, [r7, #8]
 800cff8:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 800cffc:	2b00      	cmp	r3, #0
 800cffe:	d00c      	beq.n	800d01a <HAL_TIM_IRQHandler+0x1be>
  {
    if ((itsource & (TIM_IT_BREAK)) == (TIM_IT_BREAK))
 800d000:	68fb      	ldr	r3, [r7, #12]
 800d002:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 800d006:	2b00      	cmp	r3, #0
 800d008:	d007      	beq.n	800d01a <HAL_TIM_IRQHandler+0x1be>
    {
      __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_BREAK2);
 800d00a:	687b      	ldr	r3, [r7, #4]
 800d00c:	681b      	ldr	r3, [r3, #0]
 800d00e:	f46f 7280 	mvn.w	r2, #256	@ 0x100
 800d012:	611a      	str	r2, [r3, #16]
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
      htim->Break2Callback(htim);
#else
      HAL_TIMEx_Break2Callback(htim);
 800d014:	6878      	ldr	r0, [r7, #4]
 800d016:	f000 f90b 	bl	800d230 <HAL_TIMEx_Break2Callback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
    }
  }
  /* TIM Trigger detection event */
  if ((itflag & (TIM_FLAG_TRIGGER)) == (TIM_FLAG_TRIGGER))
 800d01a:	68bb      	ldr	r3, [r7, #8]
 800d01c:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 800d020:	2b00      	cmp	r3, #0
 800d022:	d00c      	beq.n	800d03e <HAL_TIM_IRQHandler+0x1e2>
  {
    if ((itsource & (TIM_IT_TRIGGER)) == (TIM_IT_TRIGGER))
 800d024:	68fb      	ldr	r3, [r7, #12]
 800d026:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 800d02a:	2b00      	cmp	r3, #0
 800d02c:	d007      	beq.n	800d03e <HAL_TIM_IRQHandler+0x1e2>
    {
      __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_TRIGGER);
 800d02e:	687b      	ldr	r3, [r7, #4]
 800d030:	681b      	ldr	r3, [r3, #0]
 800d032:	f06f 0240 	mvn.w	r2, #64	@ 0x40
 800d036:	611a      	str	r2, [r3, #16]
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
      htim->TriggerCallback(htim);
#else
      HAL_TIM_TriggerCallback(htim);
 800d038:	6878      	ldr	r0, [r7, #4]
 800d03a:	f000 f834 	bl	800d0a6 <HAL_TIM_TriggerCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
    }
  }
  /* TIM commutation event */
  if ((itflag & (TIM_FLAG_COM)) == (TIM_FLAG_COM))
 800d03e:	68bb      	ldr	r3, [r7, #8]
 800d040:	f003 0320 	and.w	r3, r3, #32
 800d044:	2b00      	cmp	r3, #0
 800d046:	d00c      	beq.n	800d062 <HAL_TIM_IRQHandler+0x206>
  {
    if ((itsource & (TIM_IT_COM)) == (TIM_IT_COM))
 800d048:	68fb      	ldr	r3, [r7, #12]
 800d04a:	f003 0320 	and.w	r3, r3, #32
 800d04e:	2b00      	cmp	r3, #0
 800d050:	d007      	beq.n	800d062 <HAL_TIM_IRQHandler+0x206>
    {
      __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_COM);
 800d052:	687b      	ldr	r3, [r7, #4]
 800d054:	681b      	ldr	r3, [r3, #0]
 800d056:	f06f 0220 	mvn.w	r2, #32
 800d05a:	611a      	str	r2, [r3, #16]
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
      htim->CommutationCallback(htim);
#else
      HAL_TIMEx_CommutCallback(htim);
 800d05c:	6878      	ldr	r0, [r7, #4]
 800d05e:	f000 f8d3 	bl	800d208 <HAL_TIMEx_CommutCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
    }
  }
}
 800d062:	bf00      	nop
 800d064:	3710      	adds	r7, #16
 800d066:	46bd      	mov	sp, r7
 800d068:	bd80      	pop	{r7, pc}

0800d06a <HAL_TIM_OC_DelayElapsedCallback>:
  * @brief  Output Compare callback in non-blocking mode
  * @param  htim TIM OC handle
  * @retval None
  */
__weak void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim)
{
 800d06a:	b480      	push	{r7}
 800d06c:	b083      	sub	sp, #12
 800d06e:	af00      	add	r7, sp, #0
 800d070:	6078      	str	r0, [r7, #4]
  UNUSED(htim);

  /* NOTE : This function should not be modified, when the callback is needed,
            the HAL_TIM_OC_DelayElapsedCallback could be implemented in the user file
   */
}
 800d072:	bf00      	nop
 800d074:	370c      	adds	r7, #12
 800d076:	46bd      	mov	sp, r7
 800d078:	f85d 7b04 	ldr.w	r7, [sp], #4
 800d07c:	4770      	bx	lr

0800d07e <HAL_TIM_IC_CaptureCallback>:
  * @brief  Input Capture callback in non-blocking mode
  * @param  htim TIM IC handle
  * @retval None
  */
__weak void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim)
{
 800d07e:	b480      	push	{r7}
 800d080:	b083      	sub	sp, #12
 800d082:	af00      	add	r7, sp, #0
 800d084:	6078      	str	r0, [r7, #4]
  UNUSED(htim);

  /* NOTE : This function should not be modified, when the callback is needed,
            the HAL_TIM_IC_CaptureCallback could be implemented in the user file
   */
}
 800d086:	bf00      	nop
 800d088:	370c      	adds	r7, #12
 800d08a:	46bd      	mov	sp, r7
 800d08c:	f85d 7b04 	ldr.w	r7, [sp], #4
 800d090:	4770      	bx	lr

0800d092 <HAL_TIM_PWM_PulseFinishedCallback>:
  * @brief  PWM Pulse finished callback in non-blocking mode
  * @param  htim TIM handle
  * @retval None
  */
__weak void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim)
{
 800d092:	b480      	push	{r7}
 800d094:	b083      	sub	sp, #12
 800d096:	af00      	add	r7, sp, #0
 800d098:	6078      	str	r0, [r7, #4]
  UNUSED(htim);

  /* NOTE : This function should not be modified, when the callback is needed,
            the HAL_TIM_PWM_PulseFinishedCallback could be implemented in the user file
   */
}
 800d09a:	bf00      	nop
 800d09c:	370c      	adds	r7, #12
 800d09e:	46bd      	mov	sp, r7
 800d0a0:	f85d 7b04 	ldr.w	r7, [sp], #4
 800d0a4:	4770      	bx	lr

0800d0a6 <HAL_TIM_TriggerCallback>:
  * @brief  Hall Trigger detection callback in non-blocking mode
  * @param  htim TIM handle
  * @retval None
  */
__weak void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim)
{
 800d0a6:	b480      	push	{r7}
 800d0a8:	b083      	sub	sp, #12
 800d0aa:	af00      	add	r7, sp, #0
 800d0ac:	6078      	str	r0, [r7, #4]
  UNUSED(htim);

  /* NOTE : This function should not be modified, when the callback is needed,
            the HAL_TIM_TriggerCallback could be implemented in the user file
   */
}
 800d0ae:	bf00      	nop
 800d0b0:	370c      	adds	r7, #12
 800d0b2:	46bd      	mov	sp, r7
 800d0b4:	f85d 7b04 	ldr.w	r7, [sp], #4
 800d0b8:	4770      	bx	lr
	...

0800d0bc <TIM_Base_SetConfig>:
  * @param  TIMx TIM peripheral
  * @param  Structure TIM Base configuration structure
  * @retval None
  */
void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure)
{
 800d0bc:	b480      	push	{r7}
 800d0be:	b085      	sub	sp, #20
 800d0c0:	af00      	add	r7, sp, #0
 800d0c2:	6078      	str	r0, [r7, #4]
 800d0c4:	6039      	str	r1, [r7, #0]
  uint32_t tmpcr1;
  tmpcr1 = TIMx->CR1;
 800d0c6:	687b      	ldr	r3, [r7, #4]
 800d0c8:	681b      	ldr	r3, [r3, #0]
 800d0ca:	60fb      	str	r3, [r7, #12]

  /* Set TIM Time Base Unit parameters ---------------------------------------*/
  if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx))
 800d0cc:	687b      	ldr	r3, [r7, #4]
 800d0ce:	4a46      	ldr	r2, [pc, #280]	@ (800d1e8 <TIM_Base_SetConfig+0x12c>)
 800d0d0:	4293      	cmp	r3, r2
 800d0d2:	d013      	beq.n	800d0fc <TIM_Base_SetConfig+0x40>
 800d0d4:	687b      	ldr	r3, [r7, #4]
 800d0d6:	f1b3 4f80 	cmp.w	r3, #1073741824	@ 0x40000000
 800d0da:	d00f      	beq.n	800d0fc <TIM_Base_SetConfig+0x40>
 800d0dc:	687b      	ldr	r3, [r7, #4]
 800d0de:	4a43      	ldr	r2, [pc, #268]	@ (800d1ec <TIM_Base_SetConfig+0x130>)
 800d0e0:	4293      	cmp	r3, r2
 800d0e2:	d00b      	beq.n	800d0fc <TIM_Base_SetConfig+0x40>
 800d0e4:	687b      	ldr	r3, [r7, #4]
 800d0e6:	4a42      	ldr	r2, [pc, #264]	@ (800d1f0 <TIM_Base_SetConfig+0x134>)
 800d0e8:	4293      	cmp	r3, r2
 800d0ea:	d007      	beq.n	800d0fc <TIM_Base_SetConfig+0x40>
 800d0ec:	687b      	ldr	r3, [r7, #4]
 800d0ee:	4a41      	ldr	r2, [pc, #260]	@ (800d1f4 <TIM_Base_SetConfig+0x138>)
 800d0f0:	4293      	cmp	r3, r2
 800d0f2:	d003      	beq.n	800d0fc <TIM_Base_SetConfig+0x40>
 800d0f4:	687b      	ldr	r3, [r7, #4]
 800d0f6:	4a40      	ldr	r2, [pc, #256]	@ (800d1f8 <TIM_Base_SetConfig+0x13c>)
 800d0f8:	4293      	cmp	r3, r2
 800d0fa:	d108      	bne.n	800d10e <TIM_Base_SetConfig+0x52>
  {
    /* Select the Counter Mode */
    tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
 800d0fc:	68fb      	ldr	r3, [r7, #12]
 800d0fe:	f023 0370 	bic.w	r3, r3, #112	@ 0x70
 800d102:	60fb      	str	r3, [r7, #12]
    tmpcr1 |= Structure->CounterMode;
 800d104:	683b      	ldr	r3, [r7, #0]
 800d106:	685b      	ldr	r3, [r3, #4]
 800d108:	68fa      	ldr	r2, [r7, #12]
 800d10a:	4313      	orrs	r3, r2
 800d10c:	60fb      	str	r3, [r7, #12]
  }

  if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx))
 800d10e:	687b      	ldr	r3, [r7, #4]
 800d110:	4a35      	ldr	r2, [pc, #212]	@ (800d1e8 <TIM_Base_SetConfig+0x12c>)
 800d112:	4293      	cmp	r3, r2
 800d114:	d01f      	beq.n	800d156 <TIM_Base_SetConfig+0x9a>
 800d116:	687b      	ldr	r3, [r7, #4]
 800d118:	f1b3 4f80 	cmp.w	r3, #1073741824	@ 0x40000000
 800d11c:	d01b      	beq.n	800d156 <TIM_Base_SetConfig+0x9a>
 800d11e:	687b      	ldr	r3, [r7, #4]
 800d120:	4a32      	ldr	r2, [pc, #200]	@ (800d1ec <TIM_Base_SetConfig+0x130>)
 800d122:	4293      	cmp	r3, r2
 800d124:	d017      	beq.n	800d156 <TIM_Base_SetConfig+0x9a>
 800d126:	687b      	ldr	r3, [r7, #4]
 800d128:	4a31      	ldr	r2, [pc, #196]	@ (800d1f0 <TIM_Base_SetConfig+0x134>)
 800d12a:	4293      	cmp	r3, r2
 800d12c:	d013      	beq.n	800d156 <TIM_Base_SetConfig+0x9a>
 800d12e:	687b      	ldr	r3, [r7, #4]
 800d130:	4a30      	ldr	r2, [pc, #192]	@ (800d1f4 <TIM_Base_SetConfig+0x138>)
 800d132:	4293      	cmp	r3, r2
 800d134:	d00f      	beq.n	800d156 <TIM_Base_SetConfig+0x9a>
 800d136:	687b      	ldr	r3, [r7, #4]
 800d138:	4a2f      	ldr	r2, [pc, #188]	@ (800d1f8 <TIM_Base_SetConfig+0x13c>)
 800d13a:	4293      	cmp	r3, r2
 800d13c:	d00b      	beq.n	800d156 <TIM_Base_SetConfig+0x9a>
 800d13e:	687b      	ldr	r3, [r7, #4]
 800d140:	4a2e      	ldr	r2, [pc, #184]	@ (800d1fc <TIM_Base_SetConfig+0x140>)
 800d142:	4293      	cmp	r3, r2
 800d144:	d007      	beq.n	800d156 <TIM_Base_SetConfig+0x9a>
 800d146:	687b      	ldr	r3, [r7, #4]
 800d148:	4a2d      	ldr	r2, [pc, #180]	@ (800d200 <TIM_Base_SetConfig+0x144>)
 800d14a:	4293      	cmp	r3, r2
 800d14c:	d003      	beq.n	800d156 <TIM_Base_SetConfig+0x9a>
 800d14e:	687b      	ldr	r3, [r7, #4]
 800d150:	4a2c      	ldr	r2, [pc, #176]	@ (800d204 <TIM_Base_SetConfig+0x148>)
 800d152:	4293      	cmp	r3, r2
 800d154:	d108      	bne.n	800d168 <TIM_Base_SetConfig+0xac>
  {
    /* Set the clock division */
    tmpcr1 &= ~TIM_CR1_CKD;
 800d156:	68fb      	ldr	r3, [r7, #12]
 800d158:	f423 7340 	bic.w	r3, r3, #768	@ 0x300
 800d15c:	60fb      	str	r3, [r7, #12]
    tmpcr1 |= (uint32_t)Structure->ClockDivision;
 800d15e:	683b      	ldr	r3, [r7, #0]
 800d160:	68db      	ldr	r3, [r3, #12]
 800d162:	68fa      	ldr	r2, [r7, #12]
 800d164:	4313      	orrs	r3, r2
 800d166:	60fb      	str	r3, [r7, #12]
  }

  /* Set the auto-reload preload */
  MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload);
 800d168:	68fb      	ldr	r3, [r7, #12]
 800d16a:	f023 0280 	bic.w	r2, r3, #128	@ 0x80
 800d16e:	683b      	ldr	r3, [r7, #0]
 800d170:	695b      	ldr	r3, [r3, #20]
 800d172:	4313      	orrs	r3, r2
 800d174:	60fb      	str	r3, [r7, #12]

  TIMx->CR1 = tmpcr1;
 800d176:	687b      	ldr	r3, [r7, #4]
 800d178:	68fa      	ldr	r2, [r7, #12]
 800d17a:	601a      	str	r2, [r3, #0]

  /* Set the Autoreload value */
  TIMx->ARR = (uint32_t)Structure->Period ;
 800d17c:	683b      	ldr	r3, [r7, #0]
 800d17e:	689a      	ldr	r2, [r3, #8]
 800d180:	687b      	ldr	r3, [r7, #4]
 800d182:	62da      	str	r2, [r3, #44]	@ 0x2c

  /* Set the Prescaler value */
  TIMx->PSC = Structure->Prescaler;
 800d184:	683b      	ldr	r3, [r7, #0]
 800d186:	681a      	ldr	r2, [r3, #0]
 800d188:	687b      	ldr	r3, [r7, #4]
 800d18a:	629a      	str	r2, [r3, #40]	@ 0x28

  if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx))
 800d18c:	687b      	ldr	r3, [r7, #4]
 800d18e:	4a16      	ldr	r2, [pc, #88]	@ (800d1e8 <TIM_Base_SetConfig+0x12c>)
 800d190:	4293      	cmp	r3, r2
 800d192:	d00f      	beq.n	800d1b4 <TIM_Base_SetConfig+0xf8>
 800d194:	687b      	ldr	r3, [r7, #4]
 800d196:	4a18      	ldr	r2, [pc, #96]	@ (800d1f8 <TIM_Base_SetConfig+0x13c>)
 800d198:	4293      	cmp	r3, r2
 800d19a:	d00b      	beq.n	800d1b4 <TIM_Base_SetConfig+0xf8>
 800d19c:	687b      	ldr	r3, [r7, #4]
 800d19e:	4a17      	ldr	r2, [pc, #92]	@ (800d1fc <TIM_Base_SetConfig+0x140>)
 800d1a0:	4293      	cmp	r3, r2
 800d1a2:	d007      	beq.n	800d1b4 <TIM_Base_SetConfig+0xf8>
 800d1a4:	687b      	ldr	r3, [r7, #4]
 800d1a6:	4a16      	ldr	r2, [pc, #88]	@ (800d200 <TIM_Base_SetConfig+0x144>)
 800d1a8:	4293      	cmp	r3, r2
 800d1aa:	d003      	beq.n	800d1b4 <TIM_Base_SetConfig+0xf8>
 800d1ac:	687b      	ldr	r3, [r7, #4]
 800d1ae:	4a15      	ldr	r2, [pc, #84]	@ (800d204 <TIM_Base_SetConfig+0x148>)
 800d1b0:	4293      	cmp	r3, r2
 800d1b2:	d103      	bne.n	800d1bc <TIM_Base_SetConfig+0x100>
  {
    /* Set the Repetition Counter value */
    TIMx->RCR = Structure->RepetitionCounter;
 800d1b4:	683b      	ldr	r3, [r7, #0]
 800d1b6:	691a      	ldr	r2, [r3, #16]
 800d1b8:	687b      	ldr	r3, [r7, #4]
 800d1ba:	631a      	str	r2, [r3, #48]	@ 0x30
  }

  /* Generate an update event to reload the Prescaler
     and the repetition counter (only for advanced timer) value immediately */
  TIMx->EGR = TIM_EGR_UG;
 800d1bc:	687b      	ldr	r3, [r7, #4]
 800d1be:	2201      	movs	r2, #1
 800d1c0:	615a      	str	r2, [r3, #20]

  /* Check if the update flag is set after the Update Generation, if so clear the UIF flag */
  if (HAL_IS_BIT_SET(TIMx->SR, TIM_FLAG_UPDATE))
 800d1c2:	687b      	ldr	r3, [r7, #4]
 800d1c4:	691b      	ldr	r3, [r3, #16]
 800d1c6:	f003 0301 	and.w	r3, r3, #1
 800d1ca:	2b01      	cmp	r3, #1
 800d1cc:	d105      	bne.n	800d1da <TIM_Base_SetConfig+0x11e>
  {
    /* Clear the update flag */
    CLEAR_BIT(TIMx->SR, TIM_FLAG_UPDATE);
 800d1ce:	687b      	ldr	r3, [r7, #4]
 800d1d0:	691b      	ldr	r3, [r3, #16]
 800d1d2:	f023 0201 	bic.w	r2, r3, #1
 800d1d6:	687b      	ldr	r3, [r7, #4]
 800d1d8:	611a      	str	r2, [r3, #16]
  }
}
 800d1da:	bf00      	nop
 800d1dc:	3714      	adds	r7, #20
 800d1de:	46bd      	mov	sp, r7
 800d1e0:	f85d 7b04 	ldr.w	r7, [sp], #4
 800d1e4:	4770      	bx	lr
 800d1e6:	bf00      	nop
 800d1e8:	40010000 	.word	0x40010000
 800d1ec:	40000400 	.word	0x40000400
 800d1f0:	40000800 	.word	0x40000800
 800d1f4:	40000c00 	.word	0x40000c00
 800d1f8:	40010400 	.word	0x40010400
 800d1fc:	40014000 	.word	0x40014000
 800d200:	40014400 	.word	0x40014400
 800d204:	40014800 	.word	0x40014800

0800d208 <HAL_TIMEx_CommutCallback>:
  * @brief  Commutation callback in non-blocking mode
  * @param  htim TIM handle
  * @retval None
  */
__weak void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim)
{
 800d208:	b480      	push	{r7}
 800d20a:	b083      	sub	sp, #12
 800d20c:	af00      	add	r7, sp, #0
 800d20e:	6078      	str	r0, [r7, #4]
  UNUSED(htim);

  /* NOTE : This function should not be modified, when the callback is needed,
            the HAL_TIMEx_CommutCallback could be implemented in the user file
   */
}
 800d210:	bf00      	nop
 800d212:	370c      	adds	r7, #12
 800d214:	46bd      	mov	sp, r7
 800d216:	f85d 7b04 	ldr.w	r7, [sp], #4
 800d21a:	4770      	bx	lr

0800d21c <HAL_TIMEx_BreakCallback>:
  * @brief  Break detection callback in non-blocking mode
  * @param  htim TIM handle
  * @retval None
  */
__weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim)
{
 800d21c:	b480      	push	{r7}
 800d21e:	b083      	sub	sp, #12
 800d220:	af00      	add	r7, sp, #0
 800d222:	6078      	str	r0, [r7, #4]
  UNUSED(htim);

  /* NOTE : This function should not be modified, when the callback is needed,
            the HAL_TIMEx_BreakCallback could be implemented in the user file
   */
}
 800d224:	bf00      	nop
 800d226:	370c      	adds	r7, #12
 800d228:	46bd      	mov	sp, r7
 800d22a:	f85d 7b04 	ldr.w	r7, [sp], #4
 800d22e:	4770      	bx	lr

0800d230 <HAL_TIMEx_Break2Callback>:
  * @brief  Break2 detection callback in non blocking mode
  * @param  htim: TIM handle
  * @retval None
  */
__weak void HAL_TIMEx_Break2Callback(TIM_HandleTypeDef *htim)
{
 800d230:	b480      	push	{r7}
 800d232:	b083      	sub	sp, #12
 800d234:	af00      	add	r7, sp, #0
 800d236:	6078      	str	r0, [r7, #4]
  UNUSED(htim);

  /* NOTE : This function Should not be modified, when the callback is needed,
            the HAL_TIMEx_Break2Callback could be implemented in the user file
   */
}
 800d238:	bf00      	nop
 800d23a:	370c      	adds	r7, #12
 800d23c:	46bd      	mov	sp, r7
 800d23e:	f85d 7b04 	ldr.w	r7, [sp], #4
 800d242:	4770      	bx	lr

0800d244 <HAL_UART_Init>:
  *        parameters in the UART_InitTypeDef and initialize the associated handle.
  * @param huart UART handle.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart)
{
 800d244:	b580      	push	{r7, lr}
 800d246:	b082      	sub	sp, #8
 800d248:	af00      	add	r7, sp, #0
 800d24a:	6078      	str	r0, [r7, #4]
  /* Check the UART handle allocation */
  if (huart == NULL)
 800d24c:	687b      	ldr	r3, [r7, #4]
 800d24e:	2b00      	cmp	r3, #0
 800d250:	d101      	bne.n	800d256 <HAL_UART_Init+0x12>
  {
    return HAL_ERROR;
 800d252:	2301      	movs	r3, #1
 800d254:	e042      	b.n	800d2dc <HAL_UART_Init+0x98>
  {
    /* Check the parameters */
    assert_param((IS_UART_INSTANCE(huart->Instance)) || (IS_LPUART_INSTANCE(huart->Instance)));
  }

  if (huart->gState == HAL_UART_STATE_RESET)
 800d256:	687b      	ldr	r3, [r7, #4]
 800d258:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 800d25c:	2b00      	cmp	r3, #0
 800d25e:	d106      	bne.n	800d26e <HAL_UART_Init+0x2a>
  {
    /* Allocate lock resource and initialize it */
    huart->Lock = HAL_UNLOCKED;
 800d260:	687b      	ldr	r3, [r7, #4]
 800d262:	2200      	movs	r2, #0
 800d264:	f883 2084 	strb.w	r2, [r3, #132]	@ 0x84

    /* Init the low level hardware */
    huart->MspInitCallback(huart);
#else
    /* Init the low level hardware : GPIO, CLOCK */
    HAL_UART_MspInit(huart);
 800d268:	6878      	ldr	r0, [r7, #4]
 800d26a:	f7f6 f9d5 	bl	8003618 <HAL_UART_MspInit>
#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
  }

  huart->gState = HAL_UART_STATE_BUSY;
 800d26e:	687b      	ldr	r3, [r7, #4]
 800d270:	2224      	movs	r2, #36	@ 0x24
 800d272:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88

  __HAL_UART_DISABLE(huart);
 800d276:	687b      	ldr	r3, [r7, #4]
 800d278:	681b      	ldr	r3, [r3, #0]
 800d27a:	681a      	ldr	r2, [r3, #0]
 800d27c:	687b      	ldr	r3, [r7, #4]
 800d27e:	681b      	ldr	r3, [r3, #0]
 800d280:	f022 0201 	bic.w	r2, r2, #1
 800d284:	601a      	str	r2, [r3, #0]

  /* Perform advanced settings configuration */
  /* For some items, configuration requires to be done prior TE and RE bits are set */
  if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
 800d286:	687b      	ldr	r3, [r7, #4]
 800d288:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800d28a:	2b00      	cmp	r3, #0
 800d28c:	d002      	beq.n	800d294 <HAL_UART_Init+0x50>
  {
    UART_AdvFeatureConfig(huart);
 800d28e:	6878      	ldr	r0, [r7, #4]
 800d290:	f001 fa76 	bl	800e780 <UART_AdvFeatureConfig>
  }

  /* Set the UART Communication parameters */
  if (UART_SetConfig(huart) == HAL_ERROR)
 800d294:	6878      	ldr	r0, [r7, #4]
 800d296:	f000 fd0b 	bl	800dcb0 <UART_SetConfig>
 800d29a:	4603      	mov	r3, r0
 800d29c:	2b01      	cmp	r3, #1
 800d29e:	d101      	bne.n	800d2a4 <HAL_UART_Init+0x60>
  {
    return HAL_ERROR;
 800d2a0:	2301      	movs	r3, #1
 800d2a2:	e01b      	b.n	800d2dc <HAL_UART_Init+0x98>
  }

  /* In asynchronous mode, the following bits must be kept cleared:
  - LINEN and CLKEN bits in the USART_CR2 register,
  - SCEN, HDSEL and IREN  bits in the USART_CR3 register.*/
  CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
 800d2a4:	687b      	ldr	r3, [r7, #4]
 800d2a6:	681b      	ldr	r3, [r3, #0]
 800d2a8:	685a      	ldr	r2, [r3, #4]
 800d2aa:	687b      	ldr	r3, [r7, #4]
 800d2ac:	681b      	ldr	r3, [r3, #0]
 800d2ae:	f422 4290 	bic.w	r2, r2, #18432	@ 0x4800
 800d2b2:	605a      	str	r2, [r3, #4]
  CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
 800d2b4:	687b      	ldr	r3, [r7, #4]
 800d2b6:	681b      	ldr	r3, [r3, #0]
 800d2b8:	689a      	ldr	r2, [r3, #8]
 800d2ba:	687b      	ldr	r3, [r7, #4]
 800d2bc:	681b      	ldr	r3, [r3, #0]
 800d2be:	f022 022a 	bic.w	r2, r2, #42	@ 0x2a
 800d2c2:	609a      	str	r2, [r3, #8]

  __HAL_UART_ENABLE(huart);
 800d2c4:	687b      	ldr	r3, [r7, #4]
 800d2c6:	681b      	ldr	r3, [r3, #0]
 800d2c8:	681a      	ldr	r2, [r3, #0]
 800d2ca:	687b      	ldr	r3, [r7, #4]
 800d2cc:	681b      	ldr	r3, [r3, #0]
 800d2ce:	f042 0201 	orr.w	r2, r2, #1
 800d2d2:	601a      	str	r2, [r3, #0]

  /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */
  return (UART_CheckIdleState(huart));
 800d2d4:	6878      	ldr	r0, [r7, #4]
 800d2d6:	f001 faf5 	bl	800e8c4 <UART_CheckIdleState>
 800d2da:	4603      	mov	r3, r0
}
 800d2dc:	4618      	mov	r0, r3
 800d2de:	3708      	adds	r7, #8
 800d2e0:	46bd      	mov	sp, r7
 800d2e2:	bd80      	pop	{r7, pc}

0800d2e4 <HAL_UART_Transmit>:
  * @param Size    Amount of data elements (u8 or u16) to be sent.
  * @param Timeout Timeout duration.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout)
{
 800d2e4:	b580      	push	{r7, lr}
 800d2e6:	b08a      	sub	sp, #40	@ 0x28
 800d2e8:	af02      	add	r7, sp, #8
 800d2ea:	60f8      	str	r0, [r7, #12]
 800d2ec:	60b9      	str	r1, [r7, #8]
 800d2ee:	603b      	str	r3, [r7, #0]
 800d2f0:	4613      	mov	r3, r2
 800d2f2:	80fb      	strh	r3, [r7, #6]
  const uint8_t  *pdata8bits;
  const uint16_t *pdata16bits;
  uint32_t tickstart;

  /* Check that a Tx process is not already ongoing */
  if (huart->gState == HAL_UART_STATE_READY)
 800d2f4:	68fb      	ldr	r3, [r7, #12]
 800d2f6:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 800d2fa:	2b20      	cmp	r3, #32
 800d2fc:	d17b      	bne.n	800d3f6 <HAL_UART_Transmit+0x112>
  {
    if ((pData == NULL) || (Size == 0U))
 800d2fe:	68bb      	ldr	r3, [r7, #8]
 800d300:	2b00      	cmp	r3, #0
 800d302:	d002      	beq.n	800d30a <HAL_UART_Transmit+0x26>
 800d304:	88fb      	ldrh	r3, [r7, #6]
 800d306:	2b00      	cmp	r3, #0
 800d308:	d101      	bne.n	800d30e <HAL_UART_Transmit+0x2a>
    {
      return  HAL_ERROR;
 800d30a:	2301      	movs	r3, #1
 800d30c:	e074      	b.n	800d3f8 <HAL_UART_Transmit+0x114>
    }

    huart->ErrorCode = HAL_UART_ERROR_NONE;
 800d30e:	68fb      	ldr	r3, [r7, #12]
 800d310:	2200      	movs	r2, #0
 800d312:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
    huart->gState = HAL_UART_STATE_BUSY_TX;
 800d316:	68fb      	ldr	r3, [r7, #12]
 800d318:	2221      	movs	r2, #33	@ 0x21
 800d31a:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88

    /* Init tickstart for timeout management */
    tickstart = HAL_GetTick();
 800d31e:	f7f7 ff8f 	bl	8005240 <HAL_GetTick>
 800d322:	6178      	str	r0, [r7, #20]

    huart->TxXferSize  = Size;
 800d324:	68fb      	ldr	r3, [r7, #12]
 800d326:	88fa      	ldrh	r2, [r7, #6]
 800d328:	f8a3 2054 	strh.w	r2, [r3, #84]	@ 0x54
    huart->TxXferCount = Size;
 800d32c:	68fb      	ldr	r3, [r7, #12]
 800d32e:	88fa      	ldrh	r2, [r7, #6]
 800d330:	f8a3 2056 	strh.w	r2, [r3, #86]	@ 0x56

    /* In case of 9bits/No Parity transfer, pData needs to be handled as a uint16_t pointer */
    if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
 800d334:	68fb      	ldr	r3, [r7, #12]
 800d336:	689b      	ldr	r3, [r3, #8]
 800d338:	f5b3 5f80 	cmp.w	r3, #4096	@ 0x1000
 800d33c:	d108      	bne.n	800d350 <HAL_UART_Transmit+0x6c>
 800d33e:	68fb      	ldr	r3, [r7, #12]
 800d340:	691b      	ldr	r3, [r3, #16]
 800d342:	2b00      	cmp	r3, #0
 800d344:	d104      	bne.n	800d350 <HAL_UART_Transmit+0x6c>
    {
      pdata8bits  = NULL;
 800d346:	2300      	movs	r3, #0
 800d348:	61fb      	str	r3, [r7, #28]
      pdata16bits = (const uint16_t *) pData;
 800d34a:	68bb      	ldr	r3, [r7, #8]
 800d34c:	61bb      	str	r3, [r7, #24]
 800d34e:	e003      	b.n	800d358 <HAL_UART_Transmit+0x74>
    }
    else
    {
      pdata8bits  = pData;
 800d350:	68bb      	ldr	r3, [r7, #8]
 800d352:	61fb      	str	r3, [r7, #28]
      pdata16bits = NULL;
 800d354:	2300      	movs	r3, #0
 800d356:	61bb      	str	r3, [r7, #24]
    }

    while (huart->TxXferCount > 0U)
 800d358:	e030      	b.n	800d3bc <HAL_UART_Transmit+0xd8>
    {
      if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
 800d35a:	683b      	ldr	r3, [r7, #0]
 800d35c:	9300      	str	r3, [sp, #0]
 800d35e:	697b      	ldr	r3, [r7, #20]
 800d360:	2200      	movs	r2, #0
 800d362:	2180      	movs	r1, #128	@ 0x80
 800d364:	68f8      	ldr	r0, [r7, #12]
 800d366:	f001 fb57 	bl	800ea18 <UART_WaitOnFlagUntilTimeout>
 800d36a:	4603      	mov	r3, r0
 800d36c:	2b00      	cmp	r3, #0
 800d36e:	d005      	beq.n	800d37c <HAL_UART_Transmit+0x98>
      {

        huart->gState = HAL_UART_STATE_READY;
 800d370:	68fb      	ldr	r3, [r7, #12]
 800d372:	2220      	movs	r2, #32
 800d374:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88

        return HAL_TIMEOUT;
 800d378:	2303      	movs	r3, #3
 800d37a:	e03d      	b.n	800d3f8 <HAL_UART_Transmit+0x114>
      }
      if (pdata8bits == NULL)
 800d37c:	69fb      	ldr	r3, [r7, #28]
 800d37e:	2b00      	cmp	r3, #0
 800d380:	d10b      	bne.n	800d39a <HAL_UART_Transmit+0xb6>
      {
        huart->Instance->TDR = (uint16_t)(*pdata16bits & 0x01FFU);
 800d382:	69bb      	ldr	r3, [r7, #24]
 800d384:	881b      	ldrh	r3, [r3, #0]
 800d386:	461a      	mov	r2, r3
 800d388:	68fb      	ldr	r3, [r7, #12]
 800d38a:	681b      	ldr	r3, [r3, #0]
 800d38c:	f3c2 0208 	ubfx	r2, r2, #0, #9
 800d390:	629a      	str	r2, [r3, #40]	@ 0x28
        pdata16bits++;
 800d392:	69bb      	ldr	r3, [r7, #24]
 800d394:	3302      	adds	r3, #2
 800d396:	61bb      	str	r3, [r7, #24]
 800d398:	e007      	b.n	800d3aa <HAL_UART_Transmit+0xc6>
      }
      else
      {
        huart->Instance->TDR = (uint8_t)(*pdata8bits & 0xFFU);
 800d39a:	69fb      	ldr	r3, [r7, #28]
 800d39c:	781a      	ldrb	r2, [r3, #0]
 800d39e:	68fb      	ldr	r3, [r7, #12]
 800d3a0:	681b      	ldr	r3, [r3, #0]
 800d3a2:	629a      	str	r2, [r3, #40]	@ 0x28
        pdata8bits++;
 800d3a4:	69fb      	ldr	r3, [r7, #28]
 800d3a6:	3301      	adds	r3, #1
 800d3a8:	61fb      	str	r3, [r7, #28]
      }
      huart->TxXferCount--;
 800d3aa:	68fb      	ldr	r3, [r7, #12]
 800d3ac:	f8b3 3056 	ldrh.w	r3, [r3, #86]	@ 0x56
 800d3b0:	b29b      	uxth	r3, r3
 800d3b2:	3b01      	subs	r3, #1
 800d3b4:	b29a      	uxth	r2, r3
 800d3b6:	68fb      	ldr	r3, [r7, #12]
 800d3b8:	f8a3 2056 	strh.w	r2, [r3, #86]	@ 0x56
    while (huart->TxXferCount > 0U)
 800d3bc:	68fb      	ldr	r3, [r7, #12]
 800d3be:	f8b3 3056 	ldrh.w	r3, [r3, #86]	@ 0x56
 800d3c2:	b29b      	uxth	r3, r3
 800d3c4:	2b00      	cmp	r3, #0
 800d3c6:	d1c8      	bne.n	800d35a <HAL_UART_Transmit+0x76>
    }

    if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
 800d3c8:	683b      	ldr	r3, [r7, #0]
 800d3ca:	9300      	str	r3, [sp, #0]
 800d3cc:	697b      	ldr	r3, [r7, #20]
 800d3ce:	2200      	movs	r2, #0
 800d3d0:	2140      	movs	r1, #64	@ 0x40
 800d3d2:	68f8      	ldr	r0, [r7, #12]
 800d3d4:	f001 fb20 	bl	800ea18 <UART_WaitOnFlagUntilTimeout>
 800d3d8:	4603      	mov	r3, r0
 800d3da:	2b00      	cmp	r3, #0
 800d3dc:	d005      	beq.n	800d3ea <HAL_UART_Transmit+0x106>
    {
      huart->gState = HAL_UART_STATE_READY;
 800d3de:	68fb      	ldr	r3, [r7, #12]
 800d3e0:	2220      	movs	r2, #32
 800d3e2:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88

      return HAL_TIMEOUT;
 800d3e6:	2303      	movs	r3, #3
 800d3e8:	e006      	b.n	800d3f8 <HAL_UART_Transmit+0x114>
    }

    /* At end of Tx process, restore huart->gState to Ready */
    huart->gState = HAL_UART_STATE_READY;
 800d3ea:	68fb      	ldr	r3, [r7, #12]
 800d3ec:	2220      	movs	r2, #32
 800d3ee:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88

    return HAL_OK;
 800d3f2:	2300      	movs	r3, #0
 800d3f4:	e000      	b.n	800d3f8 <HAL_UART_Transmit+0x114>
  }
  else
  {
    return HAL_BUSY;
 800d3f6:	2302      	movs	r3, #2
  }
}
 800d3f8:	4618      	mov	r0, r3
 800d3fa:	3720      	adds	r7, #32
 800d3fc:	46bd      	mov	sp, r7
 800d3fe:	bd80      	pop	{r7, pc}

0800d400 <HAL_UART_Transmit_IT>:
  * @param pData Pointer to data buffer (u8 or u16 data elements).
  * @param Size  Amount of data elements (u8 or u16) to be sent.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size)
{
 800d400:	b480      	push	{r7}
 800d402:	b091      	sub	sp, #68	@ 0x44
 800d404:	af00      	add	r7, sp, #0
 800d406:	60f8      	str	r0, [r7, #12]
 800d408:	60b9      	str	r1, [r7, #8]
 800d40a:	4613      	mov	r3, r2
 800d40c:	80fb      	strh	r3, [r7, #6]
  /* Check that a Tx process is not already ongoing */
  if (huart->gState == HAL_UART_STATE_READY)
 800d40e:	68fb      	ldr	r3, [r7, #12]
 800d410:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 800d414:	2b20      	cmp	r3, #32
 800d416:	d178      	bne.n	800d50a <HAL_UART_Transmit_IT+0x10a>
  {
    if ((pData == NULL) || (Size == 0U))
 800d418:	68bb      	ldr	r3, [r7, #8]
 800d41a:	2b00      	cmp	r3, #0
 800d41c:	d002      	beq.n	800d424 <HAL_UART_Transmit_IT+0x24>
 800d41e:	88fb      	ldrh	r3, [r7, #6]
 800d420:	2b00      	cmp	r3, #0
 800d422:	d101      	bne.n	800d428 <HAL_UART_Transmit_IT+0x28>
    {
      return HAL_ERROR;
 800d424:	2301      	movs	r3, #1
 800d426:	e071      	b.n	800d50c <HAL_UART_Transmit_IT+0x10c>
    }

    huart->pTxBuffPtr  = pData;
 800d428:	68fb      	ldr	r3, [r7, #12]
 800d42a:	68ba      	ldr	r2, [r7, #8]
 800d42c:	651a      	str	r2, [r3, #80]	@ 0x50
    huart->TxXferSize  = Size;
 800d42e:	68fb      	ldr	r3, [r7, #12]
 800d430:	88fa      	ldrh	r2, [r7, #6]
 800d432:	f8a3 2054 	strh.w	r2, [r3, #84]	@ 0x54
    huart->TxXferCount = Size;
 800d436:	68fb      	ldr	r3, [r7, #12]
 800d438:	88fa      	ldrh	r2, [r7, #6]
 800d43a:	f8a3 2056 	strh.w	r2, [r3, #86]	@ 0x56
    huart->TxISR       = NULL;
 800d43e:	68fb      	ldr	r3, [r7, #12]
 800d440:	2200      	movs	r2, #0
 800d442:	679a      	str	r2, [r3, #120]	@ 0x78

    huart->ErrorCode = HAL_UART_ERROR_NONE;
 800d444:	68fb      	ldr	r3, [r7, #12]
 800d446:	2200      	movs	r2, #0
 800d448:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
    huart->gState = HAL_UART_STATE_BUSY_TX;
 800d44c:	68fb      	ldr	r3, [r7, #12]
 800d44e:	2221      	movs	r2, #33	@ 0x21
 800d450:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88

    /* Configure Tx interrupt processing */
    if (huart->FifoMode == UART_FIFOMODE_ENABLE)
 800d454:	68fb      	ldr	r3, [r7, #12]
 800d456:	6e5b      	ldr	r3, [r3, #100]	@ 0x64
 800d458:	f1b3 5f00 	cmp.w	r3, #536870912	@ 0x20000000
 800d45c:	d12a      	bne.n	800d4b4 <HAL_UART_Transmit_IT+0xb4>
    {
      /* Set the Tx ISR function pointer according to the data word length */
      if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
 800d45e:	68fb      	ldr	r3, [r7, #12]
 800d460:	689b      	ldr	r3, [r3, #8]
 800d462:	f5b3 5f80 	cmp.w	r3, #4096	@ 0x1000
 800d466:	d107      	bne.n	800d478 <HAL_UART_Transmit_IT+0x78>
 800d468:	68fb      	ldr	r3, [r7, #12]
 800d46a:	691b      	ldr	r3, [r3, #16]
 800d46c:	2b00      	cmp	r3, #0
 800d46e:	d103      	bne.n	800d478 <HAL_UART_Transmit_IT+0x78>
      {
        huart->TxISR = UART_TxISR_16BIT_FIFOEN;
 800d470:	68fb      	ldr	r3, [r7, #12]
 800d472:	4a29      	ldr	r2, [pc, #164]	@ (800d518 <HAL_UART_Transmit_IT+0x118>)
 800d474:	679a      	str	r2, [r3, #120]	@ 0x78
 800d476:	e002      	b.n	800d47e <HAL_UART_Transmit_IT+0x7e>
      }
      else
      {
        huart->TxISR = UART_TxISR_8BIT_FIFOEN;
 800d478:	68fb      	ldr	r3, [r7, #12]
 800d47a:	4a28      	ldr	r2, [pc, #160]	@ (800d51c <HAL_UART_Transmit_IT+0x11c>)
 800d47c:	679a      	str	r2, [r3, #120]	@ 0x78
      }

      /* Enable the TX FIFO threshold interrupt */
      ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_TXFTIE);
 800d47e:	68fb      	ldr	r3, [r7, #12]
 800d480:	681b      	ldr	r3, [r3, #0]
 800d482:	3308      	adds	r3, #8
 800d484:	62bb      	str	r3, [r7, #40]	@ 0x28
 */
__STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr)
{
    uint32_t result;

   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800d486:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 800d488:	e853 3f00 	ldrex	r3, [r3]
 800d48c:	627b      	str	r3, [r7, #36]	@ 0x24
   return(result);
 800d48e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800d490:	f443 0300 	orr.w	r3, r3, #8388608	@ 0x800000
 800d494:	63bb      	str	r3, [r7, #56]	@ 0x38
 800d496:	68fb      	ldr	r3, [r7, #12]
 800d498:	681b      	ldr	r3, [r3, #0]
 800d49a:	3308      	adds	r3, #8
 800d49c:	6bba      	ldr	r2, [r7, #56]	@ 0x38
 800d49e:	637a      	str	r2, [r7, #52]	@ 0x34
 800d4a0:	633b      	str	r3, [r7, #48]	@ 0x30
 */
__STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
{
   uint32_t result;

   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800d4a2:	6b39      	ldr	r1, [r7, #48]	@ 0x30
 800d4a4:	6b7a      	ldr	r2, [r7, #52]	@ 0x34
 800d4a6:	e841 2300 	strex	r3, r2, [r1]
 800d4aa:	62fb      	str	r3, [r7, #44]	@ 0x2c
   return(result);
 800d4ac:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 800d4ae:	2b00      	cmp	r3, #0
 800d4b0:	d1e5      	bne.n	800d47e <HAL_UART_Transmit_IT+0x7e>
 800d4b2:	e028      	b.n	800d506 <HAL_UART_Transmit_IT+0x106>
    }
    else
    {
      /* Set the Tx ISR function pointer according to the data word length */
      if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
 800d4b4:	68fb      	ldr	r3, [r7, #12]
 800d4b6:	689b      	ldr	r3, [r3, #8]
 800d4b8:	f5b3 5f80 	cmp.w	r3, #4096	@ 0x1000
 800d4bc:	d107      	bne.n	800d4ce <HAL_UART_Transmit_IT+0xce>
 800d4be:	68fb      	ldr	r3, [r7, #12]
 800d4c0:	691b      	ldr	r3, [r3, #16]
 800d4c2:	2b00      	cmp	r3, #0
 800d4c4:	d103      	bne.n	800d4ce <HAL_UART_Transmit_IT+0xce>
      {
        huart->TxISR = UART_TxISR_16BIT;
 800d4c6:	68fb      	ldr	r3, [r7, #12]
 800d4c8:	4a15      	ldr	r2, [pc, #84]	@ (800d520 <HAL_UART_Transmit_IT+0x120>)
 800d4ca:	679a      	str	r2, [r3, #120]	@ 0x78
 800d4cc:	e002      	b.n	800d4d4 <HAL_UART_Transmit_IT+0xd4>
      }
      else
      {
        huart->TxISR = UART_TxISR_8BIT;
 800d4ce:	68fb      	ldr	r3, [r7, #12]
 800d4d0:	4a14      	ldr	r2, [pc, #80]	@ (800d524 <HAL_UART_Transmit_IT+0x124>)
 800d4d2:	679a      	str	r2, [r3, #120]	@ 0x78
      }

      /* Enable the Transmit Data Register Empty interrupt */
      ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE);
 800d4d4:	68fb      	ldr	r3, [r7, #12]
 800d4d6:	681b      	ldr	r3, [r3, #0]
 800d4d8:	617b      	str	r3, [r7, #20]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800d4da:	697b      	ldr	r3, [r7, #20]
 800d4dc:	e853 3f00 	ldrex	r3, [r3]
 800d4e0:	613b      	str	r3, [r7, #16]
   return(result);
 800d4e2:	693b      	ldr	r3, [r7, #16]
 800d4e4:	f043 0380 	orr.w	r3, r3, #128	@ 0x80
 800d4e8:	63fb      	str	r3, [r7, #60]	@ 0x3c
 800d4ea:	68fb      	ldr	r3, [r7, #12]
 800d4ec:	681b      	ldr	r3, [r3, #0]
 800d4ee:	461a      	mov	r2, r3
 800d4f0:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800d4f2:	623b      	str	r3, [r7, #32]
 800d4f4:	61fa      	str	r2, [r7, #28]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800d4f6:	69f9      	ldr	r1, [r7, #28]
 800d4f8:	6a3a      	ldr	r2, [r7, #32]
 800d4fa:	e841 2300 	strex	r3, r2, [r1]
 800d4fe:	61bb      	str	r3, [r7, #24]
   return(result);
 800d500:	69bb      	ldr	r3, [r7, #24]
 800d502:	2b00      	cmp	r3, #0
 800d504:	d1e6      	bne.n	800d4d4 <HAL_UART_Transmit_IT+0xd4>
    }

    return HAL_OK;
 800d506:	2300      	movs	r3, #0
 800d508:	e000      	b.n	800d50c <HAL_UART_Transmit_IT+0x10c>
  }
  else
  {
    return HAL_BUSY;
 800d50a:	2302      	movs	r3, #2
  }
}
 800d50c:	4618      	mov	r0, r3
 800d50e:	3744      	adds	r7, #68	@ 0x44
 800d510:	46bd      	mov	sp, r7
 800d512:	f85d 7b04 	ldr.w	r7, [sp], #4
 800d516:	4770      	bx	lr
 800d518:	0800f08b 	.word	0x0800f08b
 800d51c:	0800efab 	.word	0x0800efab
 800d520:	0800eee9 	.word	0x0800eee9
 800d524:	0800ee31 	.word	0x0800ee31

0800d528 <HAL_UART_IRQHandler>:
  * @brief Handle UART interrupt request.
  * @param huart UART handle.
  * @retval None
  */
void HAL_UART_IRQHandler(UART_HandleTypeDef *huart)
{
 800d528:	b580      	push	{r7, lr}
 800d52a:	b0ba      	sub	sp, #232	@ 0xe8
 800d52c:	af00      	add	r7, sp, #0
 800d52e:	6078      	str	r0, [r7, #4]
  uint32_t isrflags   = READ_REG(huart->Instance->ISR);
 800d530:	687b      	ldr	r3, [r7, #4]
 800d532:	681b      	ldr	r3, [r3, #0]
 800d534:	69db      	ldr	r3, [r3, #28]
 800d536:	f8c7 30e4 	str.w	r3, [r7, #228]	@ 0xe4
  uint32_t cr1its     = READ_REG(huart->Instance->CR1);
 800d53a:	687b      	ldr	r3, [r7, #4]
 800d53c:	681b      	ldr	r3, [r3, #0]
 800d53e:	681b      	ldr	r3, [r3, #0]
 800d540:	f8c7 30e0 	str.w	r3, [r7, #224]	@ 0xe0
  uint32_t cr3its     = READ_REG(huart->Instance->CR3);
 800d544:	687b      	ldr	r3, [r7, #4]
 800d546:	681b      	ldr	r3, [r3, #0]
 800d548:	689b      	ldr	r3, [r3, #8]
 800d54a:	f8c7 30dc 	str.w	r3, [r7, #220]	@ 0xdc

  uint32_t errorflags;
  uint32_t errorcode;

  /* If no error occurs */
  errorflags = (isrflags & (uint32_t)(USART_ISR_PE | USART_ISR_FE | USART_ISR_ORE | USART_ISR_NE | USART_ISR_RTOF));
 800d54e:	f8d7 20e4 	ldr.w	r2, [r7, #228]	@ 0xe4
 800d552:	f640 030f 	movw	r3, #2063	@ 0x80f
 800d556:	4013      	ands	r3, r2
 800d558:	f8c7 30d8 	str.w	r3, [r7, #216]	@ 0xd8
  if (errorflags == 0U)
 800d55c:	f8d7 30d8 	ldr.w	r3, [r7, #216]	@ 0xd8
 800d560:	2b00      	cmp	r3, #0
 800d562:	d11b      	bne.n	800d59c <HAL_UART_IRQHandler+0x74>
  {
    /* UART in mode Receiver ---------------------------------------------------*/
    if (((isrflags & USART_ISR_RXNE_RXFNE) != 0U)
 800d564:	f8d7 30e4 	ldr.w	r3, [r7, #228]	@ 0xe4
 800d568:	f003 0320 	and.w	r3, r3, #32
 800d56c:	2b00      	cmp	r3, #0
 800d56e:	d015      	beq.n	800d59c <HAL_UART_IRQHandler+0x74>
        && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U)
 800d570:	f8d7 30e0 	ldr.w	r3, [r7, #224]	@ 0xe0
 800d574:	f003 0320 	and.w	r3, r3, #32
 800d578:	2b00      	cmp	r3, #0
 800d57a:	d105      	bne.n	800d588 <HAL_UART_IRQHandler+0x60>
            || ((cr3its & USART_CR3_RXFTIE) != 0U)))
 800d57c:	f8d7 30dc 	ldr.w	r3, [r7, #220]	@ 0xdc
 800d580:	f003 5380 	and.w	r3, r3, #268435456	@ 0x10000000
 800d584:	2b00      	cmp	r3, #0
 800d586:	d009      	beq.n	800d59c <HAL_UART_IRQHandler+0x74>
    {
      if (huart->RxISR != NULL)
 800d588:	687b      	ldr	r3, [r7, #4]
 800d58a:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 800d58c:	2b00      	cmp	r3, #0
 800d58e:	f000 8377 	beq.w	800dc80 <HAL_UART_IRQHandler+0x758>
      {
        huart->RxISR(huart);
 800d592:	687b      	ldr	r3, [r7, #4]
 800d594:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 800d596:	6878      	ldr	r0, [r7, #4]
 800d598:	4798      	blx	r3
      }
      return;
 800d59a:	e371      	b.n	800dc80 <HAL_UART_IRQHandler+0x758>
    }
  }

  /* If some errors occur */
  if ((errorflags != 0U)
 800d59c:	f8d7 30d8 	ldr.w	r3, [r7, #216]	@ 0xd8
 800d5a0:	2b00      	cmp	r3, #0
 800d5a2:	f000 8123 	beq.w	800d7ec <HAL_UART_IRQHandler+0x2c4>
      && ((((cr3its & (USART_CR3_RXFTIE | USART_CR3_EIE)) != 0U)
 800d5a6:	f8d7 20dc 	ldr.w	r2, [r7, #220]	@ 0xdc
 800d5aa:	4b8d      	ldr	r3, [pc, #564]	@ (800d7e0 <HAL_UART_IRQHandler+0x2b8>)
 800d5ac:	4013      	ands	r3, r2
 800d5ae:	2b00      	cmp	r3, #0
 800d5b0:	d106      	bne.n	800d5c0 <HAL_UART_IRQHandler+0x98>
           || ((cr1its & (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE | USART_CR1_RTOIE)) != 0U))))
 800d5b2:	f8d7 20e0 	ldr.w	r2, [r7, #224]	@ 0xe0
 800d5b6:	4b8b      	ldr	r3, [pc, #556]	@ (800d7e4 <HAL_UART_IRQHandler+0x2bc>)
 800d5b8:	4013      	ands	r3, r2
 800d5ba:	2b00      	cmp	r3, #0
 800d5bc:	f000 8116 	beq.w	800d7ec <HAL_UART_IRQHandler+0x2c4>
  {
    /* UART parity error interrupt occurred -------------------------------------*/
    if (((isrflags & USART_ISR_PE) != 0U) && ((cr1its & USART_CR1_PEIE) != 0U))
 800d5c0:	f8d7 30e4 	ldr.w	r3, [r7, #228]	@ 0xe4
 800d5c4:	f003 0301 	and.w	r3, r3, #1
 800d5c8:	2b00      	cmp	r3, #0
 800d5ca:	d011      	beq.n	800d5f0 <HAL_UART_IRQHandler+0xc8>
 800d5cc:	f8d7 30e0 	ldr.w	r3, [r7, #224]	@ 0xe0
 800d5d0:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 800d5d4:	2b00      	cmp	r3, #0
 800d5d6:	d00b      	beq.n	800d5f0 <HAL_UART_IRQHandler+0xc8>
    {
      __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF);
 800d5d8:	687b      	ldr	r3, [r7, #4]
 800d5da:	681b      	ldr	r3, [r3, #0]
 800d5dc:	2201      	movs	r2, #1
 800d5de:	621a      	str	r2, [r3, #32]

      huart->ErrorCode |= HAL_UART_ERROR_PE;
 800d5e0:	687b      	ldr	r3, [r7, #4]
 800d5e2:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800d5e6:	f043 0201 	orr.w	r2, r3, #1
 800d5ea:	687b      	ldr	r3, [r7, #4]
 800d5ec:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
    }

    /* UART frame error interrupt occurred --------------------------------------*/
    if (((isrflags & USART_ISR_FE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
 800d5f0:	f8d7 30e4 	ldr.w	r3, [r7, #228]	@ 0xe4
 800d5f4:	f003 0302 	and.w	r3, r3, #2
 800d5f8:	2b00      	cmp	r3, #0
 800d5fa:	d011      	beq.n	800d620 <HAL_UART_IRQHandler+0xf8>
 800d5fc:	f8d7 30dc 	ldr.w	r3, [r7, #220]	@ 0xdc
 800d600:	f003 0301 	and.w	r3, r3, #1
 800d604:	2b00      	cmp	r3, #0
 800d606:	d00b      	beq.n	800d620 <HAL_UART_IRQHandler+0xf8>
    {
      __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_FEF);
 800d608:	687b      	ldr	r3, [r7, #4]
 800d60a:	681b      	ldr	r3, [r3, #0]
 800d60c:	2202      	movs	r2, #2
 800d60e:	621a      	str	r2, [r3, #32]

      huart->ErrorCode |= HAL_UART_ERROR_FE;
 800d610:	687b      	ldr	r3, [r7, #4]
 800d612:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800d616:	f043 0204 	orr.w	r2, r3, #4
 800d61a:	687b      	ldr	r3, [r7, #4]
 800d61c:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
    }

    /* UART noise error interrupt occurred --------------------------------------*/
    if (((isrflags & USART_ISR_NE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
 800d620:	f8d7 30e4 	ldr.w	r3, [r7, #228]	@ 0xe4
 800d624:	f003 0304 	and.w	r3, r3, #4
 800d628:	2b00      	cmp	r3, #0
 800d62a:	d011      	beq.n	800d650 <HAL_UART_IRQHandler+0x128>
 800d62c:	f8d7 30dc 	ldr.w	r3, [r7, #220]	@ 0xdc
 800d630:	f003 0301 	and.w	r3, r3, #1
 800d634:	2b00      	cmp	r3, #0
 800d636:	d00b      	beq.n	800d650 <HAL_UART_IRQHandler+0x128>
    {
      __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_NEF);
 800d638:	687b      	ldr	r3, [r7, #4]
 800d63a:	681b      	ldr	r3, [r3, #0]
 800d63c:	2204      	movs	r2, #4
 800d63e:	621a      	str	r2, [r3, #32]

      huart->ErrorCode |= HAL_UART_ERROR_NE;
 800d640:	687b      	ldr	r3, [r7, #4]
 800d642:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800d646:	f043 0202 	orr.w	r2, r3, #2
 800d64a:	687b      	ldr	r3, [r7, #4]
 800d64c:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
    }

    /* UART Over-Run interrupt occurred -----------------------------------------*/
    if (((isrflags & USART_ISR_ORE) != 0U)
 800d650:	f8d7 30e4 	ldr.w	r3, [r7, #228]	@ 0xe4
 800d654:	f003 0308 	and.w	r3, r3, #8
 800d658:	2b00      	cmp	r3, #0
 800d65a:	d017      	beq.n	800d68c <HAL_UART_IRQHandler+0x164>
        && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U) ||
 800d65c:	f8d7 30e0 	ldr.w	r3, [r7, #224]	@ 0xe0
 800d660:	f003 0320 	and.w	r3, r3, #32
 800d664:	2b00      	cmp	r3, #0
 800d666:	d105      	bne.n	800d674 <HAL_UART_IRQHandler+0x14c>
            ((cr3its & (USART_CR3_RXFTIE | USART_CR3_EIE)) != 0U)))
 800d668:	f8d7 20dc 	ldr.w	r2, [r7, #220]	@ 0xdc
 800d66c:	4b5c      	ldr	r3, [pc, #368]	@ (800d7e0 <HAL_UART_IRQHandler+0x2b8>)
 800d66e:	4013      	ands	r3, r2
        && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U) ||
 800d670:	2b00      	cmp	r3, #0
 800d672:	d00b      	beq.n	800d68c <HAL_UART_IRQHandler+0x164>
    {
      __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF);
 800d674:	687b      	ldr	r3, [r7, #4]
 800d676:	681b      	ldr	r3, [r3, #0]
 800d678:	2208      	movs	r2, #8
 800d67a:	621a      	str	r2, [r3, #32]

      huart->ErrorCode |= HAL_UART_ERROR_ORE;
 800d67c:	687b      	ldr	r3, [r7, #4]
 800d67e:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800d682:	f043 0208 	orr.w	r2, r3, #8
 800d686:	687b      	ldr	r3, [r7, #4]
 800d688:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
    }

    /* UART Receiver Timeout interrupt occurred ---------------------------------*/
    if (((isrflags & USART_ISR_RTOF) != 0U) && ((cr1its & USART_CR1_RTOIE) != 0U))
 800d68c:	f8d7 30e4 	ldr.w	r3, [r7, #228]	@ 0xe4
 800d690:	f403 6300 	and.w	r3, r3, #2048	@ 0x800
 800d694:	2b00      	cmp	r3, #0
 800d696:	d012      	beq.n	800d6be <HAL_UART_IRQHandler+0x196>
 800d698:	f8d7 30e0 	ldr.w	r3, [r7, #224]	@ 0xe0
 800d69c:	f003 6380 	and.w	r3, r3, #67108864	@ 0x4000000
 800d6a0:	2b00      	cmp	r3, #0
 800d6a2:	d00c      	beq.n	800d6be <HAL_UART_IRQHandler+0x196>
    {
      __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_RTOF);
 800d6a4:	687b      	ldr	r3, [r7, #4]
 800d6a6:	681b      	ldr	r3, [r3, #0]
 800d6a8:	f44f 6200 	mov.w	r2, #2048	@ 0x800
 800d6ac:	621a      	str	r2, [r3, #32]

      huart->ErrorCode |= HAL_UART_ERROR_RTO;
 800d6ae:	687b      	ldr	r3, [r7, #4]
 800d6b0:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800d6b4:	f043 0220 	orr.w	r2, r3, #32
 800d6b8:	687b      	ldr	r3, [r7, #4]
 800d6ba:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
    }

    /* Call UART Error Call back function if need be ----------------------------*/
    if (huart->ErrorCode != HAL_UART_ERROR_NONE)
 800d6be:	687b      	ldr	r3, [r7, #4]
 800d6c0:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800d6c4:	2b00      	cmp	r3, #0
 800d6c6:	f000 82dd 	beq.w	800dc84 <HAL_UART_IRQHandler+0x75c>
    {
      /* UART in mode Receiver --------------------------------------------------*/
      if (((isrflags & USART_ISR_RXNE_RXFNE) != 0U)
 800d6ca:	f8d7 30e4 	ldr.w	r3, [r7, #228]	@ 0xe4
 800d6ce:	f003 0320 	and.w	r3, r3, #32
 800d6d2:	2b00      	cmp	r3, #0
 800d6d4:	d013      	beq.n	800d6fe <HAL_UART_IRQHandler+0x1d6>
          && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U)
 800d6d6:	f8d7 30e0 	ldr.w	r3, [r7, #224]	@ 0xe0
 800d6da:	f003 0320 	and.w	r3, r3, #32
 800d6de:	2b00      	cmp	r3, #0
 800d6e0:	d105      	bne.n	800d6ee <HAL_UART_IRQHandler+0x1c6>
              || ((cr3its & USART_CR3_RXFTIE) != 0U)))
 800d6e2:	f8d7 30dc 	ldr.w	r3, [r7, #220]	@ 0xdc
 800d6e6:	f003 5380 	and.w	r3, r3, #268435456	@ 0x10000000
 800d6ea:	2b00      	cmp	r3, #0
 800d6ec:	d007      	beq.n	800d6fe <HAL_UART_IRQHandler+0x1d6>
      {
        if (huart->RxISR != NULL)
 800d6ee:	687b      	ldr	r3, [r7, #4]
 800d6f0:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 800d6f2:	2b00      	cmp	r3, #0
 800d6f4:	d003      	beq.n	800d6fe <HAL_UART_IRQHandler+0x1d6>
        {
          huart->RxISR(huart);
 800d6f6:	687b      	ldr	r3, [r7, #4]
 800d6f8:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 800d6fa:	6878      	ldr	r0, [r7, #4]
 800d6fc:	4798      	blx	r3
      /* If Error is to be considered as blocking :
          - Receiver Timeout error in Reception
          - Overrun error in Reception
          - any error occurs in DMA mode reception
      */
      errorcode = huart->ErrorCode;
 800d6fe:	687b      	ldr	r3, [r7, #4]
 800d700:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800d704:	f8c7 30d4 	str.w	r3, [r7, #212]	@ 0xd4
      if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) ||
 800d708:	687b      	ldr	r3, [r7, #4]
 800d70a:	681b      	ldr	r3, [r3, #0]
 800d70c:	689b      	ldr	r3, [r3, #8]
 800d70e:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 800d712:	2b40      	cmp	r3, #64	@ 0x40
 800d714:	d005      	beq.n	800d722 <HAL_UART_IRQHandler+0x1fa>
          ((errorcode & (HAL_UART_ERROR_RTO | HAL_UART_ERROR_ORE)) != 0U))
 800d716:	f8d7 30d4 	ldr.w	r3, [r7, #212]	@ 0xd4
 800d71a:	f003 0328 	and.w	r3, r3, #40	@ 0x28
      if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) ||
 800d71e:	2b00      	cmp	r3, #0
 800d720:	d054      	beq.n	800d7cc <HAL_UART_IRQHandler+0x2a4>
      {
        /* Blocking error : transfer is aborted
           Set the UART state ready to be able to start again the process,
           Disable Rx Interrupts, and disable Rx DMA request, if ongoing */
        UART_EndRxTransfer(huart);
 800d722:	6878      	ldr	r0, [r7, #4]
 800d724:	f001 fb08 	bl	800ed38 <UART_EndRxTransfer>

        /* Abort the UART DMA Rx channel if enabled */
        if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
 800d728:	687b      	ldr	r3, [r7, #4]
 800d72a:	681b      	ldr	r3, [r3, #0]
 800d72c:	689b      	ldr	r3, [r3, #8]
 800d72e:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 800d732:	2b40      	cmp	r3, #64	@ 0x40
 800d734:	d146      	bne.n	800d7c4 <HAL_UART_IRQHandler+0x29c>
        {
          /* Disable the UART DMA Rx request if enabled */
          ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
 800d736:	687b      	ldr	r3, [r7, #4]
 800d738:	681b      	ldr	r3, [r3, #0]
 800d73a:	3308      	adds	r3, #8
 800d73c:	f8c7 309c 	str.w	r3, [r7, #156]	@ 0x9c
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800d740:	f8d7 309c 	ldr.w	r3, [r7, #156]	@ 0x9c
 800d744:	e853 3f00 	ldrex	r3, [r3]
 800d748:	f8c7 3098 	str.w	r3, [r7, #152]	@ 0x98
   return(result);
 800d74c:	f8d7 3098 	ldr.w	r3, [r7, #152]	@ 0x98
 800d750:	f023 0340 	bic.w	r3, r3, #64	@ 0x40
 800d754:	f8c7 30d0 	str.w	r3, [r7, #208]	@ 0xd0
 800d758:	687b      	ldr	r3, [r7, #4]
 800d75a:	681b      	ldr	r3, [r3, #0]
 800d75c:	3308      	adds	r3, #8
 800d75e:	f8d7 20d0 	ldr.w	r2, [r7, #208]	@ 0xd0
 800d762:	f8c7 20a8 	str.w	r2, [r7, #168]	@ 0xa8
 800d766:	f8c7 30a4 	str.w	r3, [r7, #164]	@ 0xa4
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800d76a:	f8d7 10a4 	ldr.w	r1, [r7, #164]	@ 0xa4
 800d76e:	f8d7 20a8 	ldr.w	r2, [r7, #168]	@ 0xa8
 800d772:	e841 2300 	strex	r3, r2, [r1]
 800d776:	f8c7 30a0 	str.w	r3, [r7, #160]	@ 0xa0
   return(result);
 800d77a:	f8d7 30a0 	ldr.w	r3, [r7, #160]	@ 0xa0
 800d77e:	2b00      	cmp	r3, #0
 800d780:	d1d9      	bne.n	800d736 <HAL_UART_IRQHandler+0x20e>

          /* Abort the UART DMA Rx channel */
          if (huart->hdmarx != NULL)
 800d782:	687b      	ldr	r3, [r7, #4]
 800d784:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800d788:	2b00      	cmp	r3, #0
 800d78a:	d017      	beq.n	800d7bc <HAL_UART_IRQHandler+0x294>
          {
            /* Set the UART DMA Abort callback :
               will lead to call HAL_UART_ErrorCallback() at end of DMA abort procedure */
            huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError;
 800d78c:	687b      	ldr	r3, [r7, #4]
 800d78e:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800d792:	4a15      	ldr	r2, [pc, #84]	@ (800d7e8 <HAL_UART_IRQHandler+0x2c0>)
 800d794:	651a      	str	r2, [r3, #80]	@ 0x50

            /* Abort DMA RX */
            if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK)
 800d796:	687b      	ldr	r3, [r7, #4]
 800d798:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800d79c:	4618      	mov	r0, r3
 800d79e:	f7f8 ff77 	bl	8006690 <HAL_DMA_Abort_IT>
 800d7a2:	4603      	mov	r3, r0
 800d7a4:	2b00      	cmp	r3, #0
 800d7a6:	d019      	beq.n	800d7dc <HAL_UART_IRQHandler+0x2b4>
            {
              /* Call Directly huart->hdmarx->XferAbortCallback function in case of error */
              huart->hdmarx->XferAbortCallback(huart->hdmarx);
 800d7a8:	687b      	ldr	r3, [r7, #4]
 800d7aa:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800d7ae:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800d7b0:	687a      	ldr	r2, [r7, #4]
 800d7b2:	f8d2 2080 	ldr.w	r2, [r2, #128]	@ 0x80
 800d7b6:	4610      	mov	r0, r2
 800d7b8:	4798      	blx	r3
        if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
 800d7ba:	e00f      	b.n	800d7dc <HAL_UART_IRQHandler+0x2b4>
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
            /*Call registered error callback*/
            huart->ErrorCallback(huart);
#else
            /*Call legacy weak error callback*/
            HAL_UART_ErrorCallback(huart);
 800d7bc:	6878      	ldr	r0, [r7, #4]
 800d7be:	f000 fa6d 	bl	800dc9c <HAL_UART_ErrorCallback>
        if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
 800d7c2:	e00b      	b.n	800d7dc <HAL_UART_IRQHandler+0x2b4>
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
          /*Call registered error callback*/
          huart->ErrorCallback(huart);
#else
          /*Call legacy weak error callback*/
          HAL_UART_ErrorCallback(huart);
 800d7c4:	6878      	ldr	r0, [r7, #4]
 800d7c6:	f000 fa69 	bl	800dc9c <HAL_UART_ErrorCallback>
        if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
 800d7ca:	e007      	b.n	800d7dc <HAL_UART_IRQHandler+0x2b4>
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
        /*Call registered error callback*/
        huart->ErrorCallback(huart);
#else
        /*Call legacy weak error callback*/
        HAL_UART_ErrorCallback(huart);
 800d7cc:	6878      	ldr	r0, [r7, #4]
 800d7ce:	f000 fa65 	bl	800dc9c <HAL_UART_ErrorCallback>
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
        huart->ErrorCode = HAL_UART_ERROR_NONE;
 800d7d2:	687b      	ldr	r3, [r7, #4]
 800d7d4:	2200      	movs	r2, #0
 800d7d6:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
      }
    }
    return;
 800d7da:	e253      	b.n	800dc84 <HAL_UART_IRQHandler+0x75c>
        if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
 800d7dc:	bf00      	nop
    return;
 800d7de:	e251      	b.n	800dc84 <HAL_UART_IRQHandler+0x75c>
 800d7e0:	10000001 	.word	0x10000001
 800d7e4:	04000120 	.word	0x04000120
 800d7e8:	0800ee05 	.word	0x0800ee05

  } /* End if some error occurs */

  /* Check current reception Mode :
     If Reception till IDLE event has been selected : */
  if ((huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
 800d7ec:	687b      	ldr	r3, [r7, #4]
 800d7ee:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 800d7f0:	2b01      	cmp	r3, #1
 800d7f2:	f040 81e7 	bne.w	800dbc4 <HAL_UART_IRQHandler+0x69c>
      && ((isrflags & USART_ISR_IDLE) != 0U)
 800d7f6:	f8d7 30e4 	ldr.w	r3, [r7, #228]	@ 0xe4
 800d7fa:	f003 0310 	and.w	r3, r3, #16
 800d7fe:	2b00      	cmp	r3, #0
 800d800:	f000 81e0 	beq.w	800dbc4 <HAL_UART_IRQHandler+0x69c>
      && ((cr1its & USART_ISR_IDLE) != 0U))
 800d804:	f8d7 30e0 	ldr.w	r3, [r7, #224]	@ 0xe0
 800d808:	f003 0310 	and.w	r3, r3, #16
 800d80c:	2b00      	cmp	r3, #0
 800d80e:	f000 81d9 	beq.w	800dbc4 <HAL_UART_IRQHandler+0x69c>
  {
    __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
 800d812:	687b      	ldr	r3, [r7, #4]
 800d814:	681b      	ldr	r3, [r3, #0]
 800d816:	2210      	movs	r2, #16
 800d818:	621a      	str	r2, [r3, #32]

    /* Check if DMA mode is enabled in UART */
    if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
 800d81a:	687b      	ldr	r3, [r7, #4]
 800d81c:	681b      	ldr	r3, [r3, #0]
 800d81e:	689b      	ldr	r3, [r3, #8]
 800d820:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 800d824:	2b40      	cmp	r3, #64	@ 0x40
 800d826:	f040 8151 	bne.w	800dacc <HAL_UART_IRQHandler+0x5a4>
    {
      /* DMA mode enabled */
      /* Check received length : If all expected data are received, do nothing,
         (DMA cplt callback will be called).
         Otherwise, if at least one data has already been received, IDLE event is to be notified to user */
      uint16_t nb_remaining_rx_data = (uint16_t) __HAL_DMA_GET_COUNTER(huart->hdmarx);
 800d82a:	687b      	ldr	r3, [r7, #4]
 800d82c:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800d830:	681b      	ldr	r3, [r3, #0]
 800d832:	4a96      	ldr	r2, [pc, #600]	@ (800da8c <HAL_UART_IRQHandler+0x564>)
 800d834:	4293      	cmp	r3, r2
 800d836:	d068      	beq.n	800d90a <HAL_UART_IRQHandler+0x3e2>
 800d838:	687b      	ldr	r3, [r7, #4]
 800d83a:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800d83e:	681b      	ldr	r3, [r3, #0]
 800d840:	4a93      	ldr	r2, [pc, #588]	@ (800da90 <HAL_UART_IRQHandler+0x568>)
 800d842:	4293      	cmp	r3, r2
 800d844:	d061      	beq.n	800d90a <HAL_UART_IRQHandler+0x3e2>
 800d846:	687b      	ldr	r3, [r7, #4]
 800d848:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800d84c:	681b      	ldr	r3, [r3, #0]
 800d84e:	4a91      	ldr	r2, [pc, #580]	@ (800da94 <HAL_UART_IRQHandler+0x56c>)
 800d850:	4293      	cmp	r3, r2
 800d852:	d05a      	beq.n	800d90a <HAL_UART_IRQHandler+0x3e2>
 800d854:	687b      	ldr	r3, [r7, #4]
 800d856:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800d85a:	681b      	ldr	r3, [r3, #0]
 800d85c:	4a8e      	ldr	r2, [pc, #568]	@ (800da98 <HAL_UART_IRQHandler+0x570>)
 800d85e:	4293      	cmp	r3, r2
 800d860:	d053      	beq.n	800d90a <HAL_UART_IRQHandler+0x3e2>
 800d862:	687b      	ldr	r3, [r7, #4]
 800d864:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800d868:	681b      	ldr	r3, [r3, #0]
 800d86a:	4a8c      	ldr	r2, [pc, #560]	@ (800da9c <HAL_UART_IRQHandler+0x574>)
 800d86c:	4293      	cmp	r3, r2
 800d86e:	d04c      	beq.n	800d90a <HAL_UART_IRQHandler+0x3e2>
 800d870:	687b      	ldr	r3, [r7, #4]
 800d872:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800d876:	681b      	ldr	r3, [r3, #0]
 800d878:	4a89      	ldr	r2, [pc, #548]	@ (800daa0 <HAL_UART_IRQHandler+0x578>)
 800d87a:	4293      	cmp	r3, r2
 800d87c:	d045      	beq.n	800d90a <HAL_UART_IRQHandler+0x3e2>
 800d87e:	687b      	ldr	r3, [r7, #4]
 800d880:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800d884:	681b      	ldr	r3, [r3, #0]
 800d886:	4a87      	ldr	r2, [pc, #540]	@ (800daa4 <HAL_UART_IRQHandler+0x57c>)
 800d888:	4293      	cmp	r3, r2
 800d88a:	d03e      	beq.n	800d90a <HAL_UART_IRQHandler+0x3e2>
 800d88c:	687b      	ldr	r3, [r7, #4]
 800d88e:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800d892:	681b      	ldr	r3, [r3, #0]
 800d894:	4a84      	ldr	r2, [pc, #528]	@ (800daa8 <HAL_UART_IRQHandler+0x580>)
 800d896:	4293      	cmp	r3, r2
 800d898:	d037      	beq.n	800d90a <HAL_UART_IRQHandler+0x3e2>
 800d89a:	687b      	ldr	r3, [r7, #4]
 800d89c:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800d8a0:	681b      	ldr	r3, [r3, #0]
 800d8a2:	4a82      	ldr	r2, [pc, #520]	@ (800daac <HAL_UART_IRQHandler+0x584>)
 800d8a4:	4293      	cmp	r3, r2
 800d8a6:	d030      	beq.n	800d90a <HAL_UART_IRQHandler+0x3e2>
 800d8a8:	687b      	ldr	r3, [r7, #4]
 800d8aa:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800d8ae:	681b      	ldr	r3, [r3, #0]
 800d8b0:	4a7f      	ldr	r2, [pc, #508]	@ (800dab0 <HAL_UART_IRQHandler+0x588>)
 800d8b2:	4293      	cmp	r3, r2
 800d8b4:	d029      	beq.n	800d90a <HAL_UART_IRQHandler+0x3e2>
 800d8b6:	687b      	ldr	r3, [r7, #4]
 800d8b8:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800d8bc:	681b      	ldr	r3, [r3, #0]
 800d8be:	4a7d      	ldr	r2, [pc, #500]	@ (800dab4 <HAL_UART_IRQHandler+0x58c>)
 800d8c0:	4293      	cmp	r3, r2
 800d8c2:	d022      	beq.n	800d90a <HAL_UART_IRQHandler+0x3e2>
 800d8c4:	687b      	ldr	r3, [r7, #4]
 800d8c6:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800d8ca:	681b      	ldr	r3, [r3, #0]
 800d8cc:	4a7a      	ldr	r2, [pc, #488]	@ (800dab8 <HAL_UART_IRQHandler+0x590>)
 800d8ce:	4293      	cmp	r3, r2
 800d8d0:	d01b      	beq.n	800d90a <HAL_UART_IRQHandler+0x3e2>
 800d8d2:	687b      	ldr	r3, [r7, #4]
 800d8d4:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800d8d8:	681b      	ldr	r3, [r3, #0]
 800d8da:	4a78      	ldr	r2, [pc, #480]	@ (800dabc <HAL_UART_IRQHandler+0x594>)
 800d8dc:	4293      	cmp	r3, r2
 800d8de:	d014      	beq.n	800d90a <HAL_UART_IRQHandler+0x3e2>
 800d8e0:	687b      	ldr	r3, [r7, #4]
 800d8e2:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800d8e6:	681b      	ldr	r3, [r3, #0]
 800d8e8:	4a75      	ldr	r2, [pc, #468]	@ (800dac0 <HAL_UART_IRQHandler+0x598>)
 800d8ea:	4293      	cmp	r3, r2
 800d8ec:	d00d      	beq.n	800d90a <HAL_UART_IRQHandler+0x3e2>
 800d8ee:	687b      	ldr	r3, [r7, #4]
 800d8f0:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800d8f4:	681b      	ldr	r3, [r3, #0]
 800d8f6:	4a73      	ldr	r2, [pc, #460]	@ (800dac4 <HAL_UART_IRQHandler+0x59c>)
 800d8f8:	4293      	cmp	r3, r2
 800d8fa:	d006      	beq.n	800d90a <HAL_UART_IRQHandler+0x3e2>
 800d8fc:	687b      	ldr	r3, [r7, #4]
 800d8fe:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800d902:	681b      	ldr	r3, [r3, #0]
 800d904:	4a70      	ldr	r2, [pc, #448]	@ (800dac8 <HAL_UART_IRQHandler+0x5a0>)
 800d906:	4293      	cmp	r3, r2
 800d908:	d106      	bne.n	800d918 <HAL_UART_IRQHandler+0x3f0>
 800d90a:	687b      	ldr	r3, [r7, #4]
 800d90c:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800d910:	681b      	ldr	r3, [r3, #0]
 800d912:	685b      	ldr	r3, [r3, #4]
 800d914:	b29b      	uxth	r3, r3
 800d916:	e005      	b.n	800d924 <HAL_UART_IRQHandler+0x3fc>
 800d918:	687b      	ldr	r3, [r7, #4]
 800d91a:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800d91e:	681b      	ldr	r3, [r3, #0]
 800d920:	685b      	ldr	r3, [r3, #4]
 800d922:	b29b      	uxth	r3, r3
 800d924:	f8a7 30be 	strh.w	r3, [r7, #190]	@ 0xbe
      if ((nb_remaining_rx_data > 0U)
 800d928:	f8b7 30be 	ldrh.w	r3, [r7, #190]	@ 0xbe
 800d92c:	2b00      	cmp	r3, #0
 800d92e:	f000 81ab 	beq.w	800dc88 <HAL_UART_IRQHandler+0x760>
          && (nb_remaining_rx_data < huart->RxXferSize))
 800d932:	687b      	ldr	r3, [r7, #4]
 800d934:	f8b3 305c 	ldrh.w	r3, [r3, #92]	@ 0x5c
 800d938:	f8b7 20be 	ldrh.w	r2, [r7, #190]	@ 0xbe
 800d93c:	429a      	cmp	r2, r3
 800d93e:	f080 81a3 	bcs.w	800dc88 <HAL_UART_IRQHandler+0x760>
      {
        /* Reception is not complete */
        huart->RxXferCount = nb_remaining_rx_data;
 800d942:	687b      	ldr	r3, [r7, #4]
 800d944:	f8b7 20be 	ldrh.w	r2, [r7, #190]	@ 0xbe
 800d948:	f8a3 205e 	strh.w	r2, [r3, #94]	@ 0x5e

        /* In Normal mode, end DMA xfer and HAL UART Rx process*/
        if (huart->hdmarx->Init.Mode != DMA_CIRCULAR)
 800d94c:	687b      	ldr	r3, [r7, #4]
 800d94e:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800d952:	69db      	ldr	r3, [r3, #28]
 800d954:	f5b3 7f80 	cmp.w	r3, #256	@ 0x100
 800d958:	f000 8087 	beq.w	800da6a <HAL_UART_IRQHandler+0x542>
        {
          /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */
          ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
 800d95c:	687b      	ldr	r3, [r7, #4]
 800d95e:	681b      	ldr	r3, [r3, #0]
 800d960:	f8c7 3088 	str.w	r3, [r7, #136]	@ 0x88
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800d964:	f8d7 3088 	ldr.w	r3, [r7, #136]	@ 0x88
 800d968:	e853 3f00 	ldrex	r3, [r3]
 800d96c:	f8c7 3084 	str.w	r3, [r7, #132]	@ 0x84
   return(result);
 800d970:	f8d7 3084 	ldr.w	r3, [r7, #132]	@ 0x84
 800d974:	f423 7380 	bic.w	r3, r3, #256	@ 0x100
 800d978:	f8c7 30b8 	str.w	r3, [r7, #184]	@ 0xb8
 800d97c:	687b      	ldr	r3, [r7, #4]
 800d97e:	681b      	ldr	r3, [r3, #0]
 800d980:	461a      	mov	r2, r3
 800d982:	f8d7 30b8 	ldr.w	r3, [r7, #184]	@ 0xb8
 800d986:	f8c7 3094 	str.w	r3, [r7, #148]	@ 0x94
 800d98a:	f8c7 2090 	str.w	r2, [r7, #144]	@ 0x90
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800d98e:	f8d7 1090 	ldr.w	r1, [r7, #144]	@ 0x90
 800d992:	f8d7 2094 	ldr.w	r2, [r7, #148]	@ 0x94
 800d996:	e841 2300 	strex	r3, r2, [r1]
 800d99a:	f8c7 308c 	str.w	r3, [r7, #140]	@ 0x8c
   return(result);
 800d99e:	f8d7 308c 	ldr.w	r3, [r7, #140]	@ 0x8c
 800d9a2:	2b00      	cmp	r3, #0
 800d9a4:	d1da      	bne.n	800d95c <HAL_UART_IRQHandler+0x434>
          ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
 800d9a6:	687b      	ldr	r3, [r7, #4]
 800d9a8:	681b      	ldr	r3, [r3, #0]
 800d9aa:	3308      	adds	r3, #8
 800d9ac:	677b      	str	r3, [r7, #116]	@ 0x74
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800d9ae:	6f7b      	ldr	r3, [r7, #116]	@ 0x74
 800d9b0:	e853 3f00 	ldrex	r3, [r3]
 800d9b4:	673b      	str	r3, [r7, #112]	@ 0x70
   return(result);
 800d9b6:	6f3b      	ldr	r3, [r7, #112]	@ 0x70
 800d9b8:	f023 0301 	bic.w	r3, r3, #1
 800d9bc:	f8c7 30b4 	str.w	r3, [r7, #180]	@ 0xb4
 800d9c0:	687b      	ldr	r3, [r7, #4]
 800d9c2:	681b      	ldr	r3, [r3, #0]
 800d9c4:	3308      	adds	r3, #8
 800d9c6:	f8d7 20b4 	ldr.w	r2, [r7, #180]	@ 0xb4
 800d9ca:	f8c7 2080 	str.w	r2, [r7, #128]	@ 0x80
 800d9ce:	67fb      	str	r3, [r7, #124]	@ 0x7c
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800d9d0:	6ff9      	ldr	r1, [r7, #124]	@ 0x7c
 800d9d2:	f8d7 2080 	ldr.w	r2, [r7, #128]	@ 0x80
 800d9d6:	e841 2300 	strex	r3, r2, [r1]
 800d9da:	67bb      	str	r3, [r7, #120]	@ 0x78
   return(result);
 800d9dc:	6fbb      	ldr	r3, [r7, #120]	@ 0x78
 800d9de:	2b00      	cmp	r3, #0
 800d9e0:	d1e1      	bne.n	800d9a6 <HAL_UART_IRQHandler+0x47e>

          /* Disable the DMA transfer for the receiver request by resetting the DMAR bit
             in the UART CR3 register */
          ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
 800d9e2:	687b      	ldr	r3, [r7, #4]
 800d9e4:	681b      	ldr	r3, [r3, #0]
 800d9e6:	3308      	adds	r3, #8
 800d9e8:	663b      	str	r3, [r7, #96]	@ 0x60
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800d9ea:	6e3b      	ldr	r3, [r7, #96]	@ 0x60
 800d9ec:	e853 3f00 	ldrex	r3, [r3]
 800d9f0:	65fb      	str	r3, [r7, #92]	@ 0x5c
   return(result);
 800d9f2:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 800d9f4:	f023 0340 	bic.w	r3, r3, #64	@ 0x40
 800d9f8:	f8c7 30b0 	str.w	r3, [r7, #176]	@ 0xb0
 800d9fc:	687b      	ldr	r3, [r7, #4]
 800d9fe:	681b      	ldr	r3, [r3, #0]
 800da00:	3308      	adds	r3, #8
 800da02:	f8d7 20b0 	ldr.w	r2, [r7, #176]	@ 0xb0
 800da06:	66fa      	str	r2, [r7, #108]	@ 0x6c
 800da08:	66bb      	str	r3, [r7, #104]	@ 0x68
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800da0a:	6eb9      	ldr	r1, [r7, #104]	@ 0x68
 800da0c:	6efa      	ldr	r2, [r7, #108]	@ 0x6c
 800da0e:	e841 2300 	strex	r3, r2, [r1]
 800da12:	667b      	str	r3, [r7, #100]	@ 0x64
   return(result);
 800da14:	6e7b      	ldr	r3, [r7, #100]	@ 0x64
 800da16:	2b00      	cmp	r3, #0
 800da18:	d1e3      	bne.n	800d9e2 <HAL_UART_IRQHandler+0x4ba>

          /* At end of Rx process, restore huart->RxState to Ready */
          huart->RxState = HAL_UART_STATE_READY;
 800da1a:	687b      	ldr	r3, [r7, #4]
 800da1c:	2220      	movs	r2, #32
 800da1e:	f8c3 208c 	str.w	r2, [r3, #140]	@ 0x8c
          huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
 800da22:	687b      	ldr	r3, [r7, #4]
 800da24:	2200      	movs	r2, #0
 800da26:	66da      	str	r2, [r3, #108]	@ 0x6c

          ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
 800da28:	687b      	ldr	r3, [r7, #4]
 800da2a:	681b      	ldr	r3, [r3, #0]
 800da2c:	64fb      	str	r3, [r7, #76]	@ 0x4c
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800da2e:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 800da30:	e853 3f00 	ldrex	r3, [r3]
 800da34:	64bb      	str	r3, [r7, #72]	@ 0x48
   return(result);
 800da36:	6cbb      	ldr	r3, [r7, #72]	@ 0x48
 800da38:	f023 0310 	bic.w	r3, r3, #16
 800da3c:	f8c7 30ac 	str.w	r3, [r7, #172]	@ 0xac
 800da40:	687b      	ldr	r3, [r7, #4]
 800da42:	681b      	ldr	r3, [r3, #0]
 800da44:	461a      	mov	r2, r3
 800da46:	f8d7 30ac 	ldr.w	r3, [r7, #172]	@ 0xac
 800da4a:	65bb      	str	r3, [r7, #88]	@ 0x58
 800da4c:	657a      	str	r2, [r7, #84]	@ 0x54
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800da4e:	6d79      	ldr	r1, [r7, #84]	@ 0x54
 800da50:	6dba      	ldr	r2, [r7, #88]	@ 0x58
 800da52:	e841 2300 	strex	r3, r2, [r1]
 800da56:	653b      	str	r3, [r7, #80]	@ 0x50
   return(result);
 800da58:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 800da5a:	2b00      	cmp	r3, #0
 800da5c:	d1e4      	bne.n	800da28 <HAL_UART_IRQHandler+0x500>

          /* Last bytes received, so no need as the abort is immediate */
          (void)HAL_DMA_Abort(huart->hdmarx);
 800da5e:	687b      	ldr	r3, [r7, #4]
 800da60:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800da64:	4618      	mov	r0, r3
 800da66:	f7f8 faf5 	bl	8006054 <HAL_DMA_Abort>
        }

        /* Initialize type of RxEvent that correspond to RxEvent callback execution;
           In this case, Rx Event type is Idle Event */
        huart->RxEventType = HAL_UART_RXEVENT_IDLE;
 800da6a:	687b      	ldr	r3, [r7, #4]
 800da6c:	2202      	movs	r2, #2
 800da6e:	671a      	str	r2, [r3, #112]	@ 0x70
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
        /*Call registered Rx Event callback*/
        huart->RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount));
#else
        /*Call legacy weak Rx Event callback*/
        HAL_UARTEx_RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount));
 800da70:	687b      	ldr	r3, [r7, #4]
 800da72:	f8b3 205c 	ldrh.w	r2, [r3, #92]	@ 0x5c
 800da76:	687b      	ldr	r3, [r7, #4]
 800da78:	f8b3 305e 	ldrh.w	r3, [r3, #94]	@ 0x5e
 800da7c:	b29b      	uxth	r3, r3
 800da7e:	1ad3      	subs	r3, r2, r3
 800da80:	b29b      	uxth	r3, r3
 800da82:	4619      	mov	r1, r3
 800da84:	6878      	ldr	r0, [r7, #4]
 800da86:	f7f6 fba1 	bl	80041cc <HAL_UARTEx_RxEventCallback>
#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
      }
      return;
 800da8a:	e0fd      	b.n	800dc88 <HAL_UART_IRQHandler+0x760>
 800da8c:	40020010 	.word	0x40020010
 800da90:	40020028 	.word	0x40020028
 800da94:	40020040 	.word	0x40020040
 800da98:	40020058 	.word	0x40020058
 800da9c:	40020070 	.word	0x40020070
 800daa0:	40020088 	.word	0x40020088
 800daa4:	400200a0 	.word	0x400200a0
 800daa8:	400200b8 	.word	0x400200b8
 800daac:	40020410 	.word	0x40020410
 800dab0:	40020428 	.word	0x40020428
 800dab4:	40020440 	.word	0x40020440
 800dab8:	40020458 	.word	0x40020458
 800dabc:	40020470 	.word	0x40020470
 800dac0:	40020488 	.word	0x40020488
 800dac4:	400204a0 	.word	0x400204a0
 800dac8:	400204b8 	.word	0x400204b8
    else
    {
      /* DMA mode not enabled */
      /* Check received length : If all expected data are received, do nothing.
         Otherwise, if at least one data has already been received, IDLE event is to be notified to user */
      uint16_t nb_rx_data = huart->RxXferSize - huart->RxXferCount;
 800dacc:	687b      	ldr	r3, [r7, #4]
 800dace:	f8b3 205c 	ldrh.w	r2, [r3, #92]	@ 0x5c
 800dad2:	687b      	ldr	r3, [r7, #4]
 800dad4:	f8b3 305e 	ldrh.w	r3, [r3, #94]	@ 0x5e
 800dad8:	b29b      	uxth	r3, r3
 800dada:	1ad3      	subs	r3, r2, r3
 800dadc:	f8a7 30ce 	strh.w	r3, [r7, #206]	@ 0xce
      if ((huart->RxXferCount > 0U)
 800dae0:	687b      	ldr	r3, [r7, #4]
 800dae2:	f8b3 305e 	ldrh.w	r3, [r3, #94]	@ 0x5e
 800dae6:	b29b      	uxth	r3, r3
 800dae8:	2b00      	cmp	r3, #0
 800daea:	f000 80cf 	beq.w	800dc8c <HAL_UART_IRQHandler+0x764>
          && (nb_rx_data > 0U))
 800daee:	f8b7 30ce 	ldrh.w	r3, [r7, #206]	@ 0xce
 800daf2:	2b00      	cmp	r3, #0
 800daf4:	f000 80ca 	beq.w	800dc8c <HAL_UART_IRQHandler+0x764>
      {
        /* Disable the UART Parity Error Interrupt and RXNE interrupts */
        ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
 800daf8:	687b      	ldr	r3, [r7, #4]
 800dafa:	681b      	ldr	r3, [r3, #0]
 800dafc:	63bb      	str	r3, [r7, #56]	@ 0x38
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800dafe:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800db00:	e853 3f00 	ldrex	r3, [r3]
 800db04:	637b      	str	r3, [r7, #52]	@ 0x34
   return(result);
 800db06:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 800db08:	f423 7390 	bic.w	r3, r3, #288	@ 0x120
 800db0c:	f8c7 30c8 	str.w	r3, [r7, #200]	@ 0xc8
 800db10:	687b      	ldr	r3, [r7, #4]
 800db12:	681b      	ldr	r3, [r3, #0]
 800db14:	461a      	mov	r2, r3
 800db16:	f8d7 30c8 	ldr.w	r3, [r7, #200]	@ 0xc8
 800db1a:	647b      	str	r3, [r7, #68]	@ 0x44
 800db1c:	643a      	str	r2, [r7, #64]	@ 0x40
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800db1e:	6c39      	ldr	r1, [r7, #64]	@ 0x40
 800db20:	6c7a      	ldr	r2, [r7, #68]	@ 0x44
 800db22:	e841 2300 	strex	r3, r2, [r1]
 800db26:	63fb      	str	r3, [r7, #60]	@ 0x3c
   return(result);
 800db28:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800db2a:	2b00      	cmp	r3, #0
 800db2c:	d1e4      	bne.n	800daf8 <HAL_UART_IRQHandler+0x5d0>

        /* Disable the UART Error Interrupt:(Frame error, noise error, overrun error) and RX FIFO Threshold interrupt */
        ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
 800db2e:	687b      	ldr	r3, [r7, #4]
 800db30:	681b      	ldr	r3, [r3, #0]
 800db32:	3308      	adds	r3, #8
 800db34:	627b      	str	r3, [r7, #36]	@ 0x24
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800db36:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800db38:	e853 3f00 	ldrex	r3, [r3]
 800db3c:	623b      	str	r3, [r7, #32]
   return(result);
 800db3e:	6a3a      	ldr	r2, [r7, #32]
 800db40:	4b55      	ldr	r3, [pc, #340]	@ (800dc98 <HAL_UART_IRQHandler+0x770>)
 800db42:	4013      	ands	r3, r2
 800db44:	f8c7 30c4 	str.w	r3, [r7, #196]	@ 0xc4
 800db48:	687b      	ldr	r3, [r7, #4]
 800db4a:	681b      	ldr	r3, [r3, #0]
 800db4c:	3308      	adds	r3, #8
 800db4e:	f8d7 20c4 	ldr.w	r2, [r7, #196]	@ 0xc4
 800db52:	633a      	str	r2, [r7, #48]	@ 0x30
 800db54:	62fb      	str	r3, [r7, #44]	@ 0x2c
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800db56:	6af9      	ldr	r1, [r7, #44]	@ 0x2c
 800db58:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 800db5a:	e841 2300 	strex	r3, r2, [r1]
 800db5e:	62bb      	str	r3, [r7, #40]	@ 0x28
   return(result);
 800db60:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 800db62:	2b00      	cmp	r3, #0
 800db64:	d1e3      	bne.n	800db2e <HAL_UART_IRQHandler+0x606>

        /* Rx process is completed, restore huart->RxState to Ready */
        huart->RxState = HAL_UART_STATE_READY;
 800db66:	687b      	ldr	r3, [r7, #4]
 800db68:	2220      	movs	r2, #32
 800db6a:	f8c3 208c 	str.w	r2, [r3, #140]	@ 0x8c
        huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
 800db6e:	687b      	ldr	r3, [r7, #4]
 800db70:	2200      	movs	r2, #0
 800db72:	66da      	str	r2, [r3, #108]	@ 0x6c

        /* Clear RxISR function pointer */
        huart->RxISR = NULL;
 800db74:	687b      	ldr	r3, [r7, #4]
 800db76:	2200      	movs	r2, #0
 800db78:	675a      	str	r2, [r3, #116]	@ 0x74

        ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
 800db7a:	687b      	ldr	r3, [r7, #4]
 800db7c:	681b      	ldr	r3, [r3, #0]
 800db7e:	613b      	str	r3, [r7, #16]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800db80:	693b      	ldr	r3, [r7, #16]
 800db82:	e853 3f00 	ldrex	r3, [r3]
 800db86:	60fb      	str	r3, [r7, #12]
   return(result);
 800db88:	68fb      	ldr	r3, [r7, #12]
 800db8a:	f023 0310 	bic.w	r3, r3, #16
 800db8e:	f8c7 30c0 	str.w	r3, [r7, #192]	@ 0xc0
 800db92:	687b      	ldr	r3, [r7, #4]
 800db94:	681b      	ldr	r3, [r3, #0]
 800db96:	461a      	mov	r2, r3
 800db98:	f8d7 30c0 	ldr.w	r3, [r7, #192]	@ 0xc0
 800db9c:	61fb      	str	r3, [r7, #28]
 800db9e:	61ba      	str	r2, [r7, #24]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800dba0:	69b9      	ldr	r1, [r7, #24]
 800dba2:	69fa      	ldr	r2, [r7, #28]
 800dba4:	e841 2300 	strex	r3, r2, [r1]
 800dba8:	617b      	str	r3, [r7, #20]
   return(result);
 800dbaa:	697b      	ldr	r3, [r7, #20]
 800dbac:	2b00      	cmp	r3, #0
 800dbae:	d1e4      	bne.n	800db7a <HAL_UART_IRQHandler+0x652>

        /* Initialize type of RxEvent that correspond to RxEvent callback execution;
           In this case, Rx Event type is Idle Event */
        huart->RxEventType = HAL_UART_RXEVENT_IDLE;
 800dbb0:	687b      	ldr	r3, [r7, #4]
 800dbb2:	2202      	movs	r2, #2
 800dbb4:	671a      	str	r2, [r3, #112]	@ 0x70
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
        /*Call registered Rx complete callback*/
        huart->RxEventCallback(huart, nb_rx_data);
#else
        /*Call legacy weak Rx Event callback*/
        HAL_UARTEx_RxEventCallback(huart, nb_rx_data);
 800dbb6:	f8b7 30ce 	ldrh.w	r3, [r7, #206]	@ 0xce
 800dbba:	4619      	mov	r1, r3
 800dbbc:	6878      	ldr	r0, [r7, #4]
 800dbbe:	f7f6 fb05 	bl	80041cc <HAL_UARTEx_RxEventCallback>
#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
      }
      return;
 800dbc2:	e063      	b.n	800dc8c <HAL_UART_IRQHandler+0x764>
    }
  }

  /* UART wakeup from Stop mode interrupt occurred ---------------------------*/
  if (((isrflags & USART_ISR_WUF) != 0U) && ((cr3its & USART_CR3_WUFIE) != 0U))
 800dbc4:	f8d7 30e4 	ldr.w	r3, [r7, #228]	@ 0xe4
 800dbc8:	f403 1380 	and.w	r3, r3, #1048576	@ 0x100000
 800dbcc:	2b00      	cmp	r3, #0
 800dbce:	d00e      	beq.n	800dbee <HAL_UART_IRQHandler+0x6c6>
 800dbd0:	f8d7 30dc 	ldr.w	r3, [r7, #220]	@ 0xdc
 800dbd4:	f403 0380 	and.w	r3, r3, #4194304	@ 0x400000
 800dbd8:	2b00      	cmp	r3, #0
 800dbda:	d008      	beq.n	800dbee <HAL_UART_IRQHandler+0x6c6>
  {
    __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_WUF);
 800dbdc:	687b      	ldr	r3, [r7, #4]
 800dbde:	681b      	ldr	r3, [r3, #0]
 800dbe0:	f44f 1280 	mov.w	r2, #1048576	@ 0x100000
 800dbe4:	621a      	str	r2, [r3, #32]
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
    /* Call registered Wakeup Callback */
    huart->WakeupCallback(huart);
#else
    /* Call legacy weak Wakeup Callback */
    HAL_UARTEx_WakeupCallback(huart);
 800dbe6:	6878      	ldr	r0, [r7, #4]
 800dbe8:	f002 f80c 	bl	800fc04 <HAL_UARTEx_WakeupCallback>
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
    return;
 800dbec:	e051      	b.n	800dc92 <HAL_UART_IRQHandler+0x76a>
  }

  /* UART in mode Transmitter ------------------------------------------------*/
  if (((isrflags & USART_ISR_TXE_TXFNF) != 0U)
 800dbee:	f8d7 30e4 	ldr.w	r3, [r7, #228]	@ 0xe4
 800dbf2:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 800dbf6:	2b00      	cmp	r3, #0
 800dbf8:	d014      	beq.n	800dc24 <HAL_UART_IRQHandler+0x6fc>
      && (((cr1its & USART_CR1_TXEIE_TXFNFIE) != 0U)
 800dbfa:	f8d7 30e0 	ldr.w	r3, [r7, #224]	@ 0xe0
 800dbfe:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 800dc02:	2b00      	cmp	r3, #0
 800dc04:	d105      	bne.n	800dc12 <HAL_UART_IRQHandler+0x6ea>
          || ((cr3its & USART_CR3_TXFTIE) != 0U)))
 800dc06:	f8d7 30dc 	ldr.w	r3, [r7, #220]	@ 0xdc
 800dc0a:	f403 0300 	and.w	r3, r3, #8388608	@ 0x800000
 800dc0e:	2b00      	cmp	r3, #0
 800dc10:	d008      	beq.n	800dc24 <HAL_UART_IRQHandler+0x6fc>
  {
    if (huart->TxISR != NULL)
 800dc12:	687b      	ldr	r3, [r7, #4]
 800dc14:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 800dc16:	2b00      	cmp	r3, #0
 800dc18:	d03a      	beq.n	800dc90 <HAL_UART_IRQHandler+0x768>
    {
      huart->TxISR(huart);
 800dc1a:	687b      	ldr	r3, [r7, #4]
 800dc1c:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 800dc1e:	6878      	ldr	r0, [r7, #4]
 800dc20:	4798      	blx	r3
    }
    return;
 800dc22:	e035      	b.n	800dc90 <HAL_UART_IRQHandler+0x768>
  }

  /* UART in mode Transmitter (transmission end) -----------------------------*/
  if (((isrflags & USART_ISR_TC) != 0U) && ((cr1its & USART_CR1_TCIE) != 0U))
 800dc24:	f8d7 30e4 	ldr.w	r3, [r7, #228]	@ 0xe4
 800dc28:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 800dc2c:	2b00      	cmp	r3, #0
 800dc2e:	d009      	beq.n	800dc44 <HAL_UART_IRQHandler+0x71c>
 800dc30:	f8d7 30e0 	ldr.w	r3, [r7, #224]	@ 0xe0
 800dc34:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 800dc38:	2b00      	cmp	r3, #0
 800dc3a:	d003      	beq.n	800dc44 <HAL_UART_IRQHandler+0x71c>
  {
    UART_EndTransmit_IT(huart);
 800dc3c:	6878      	ldr	r0, [r7, #4]
 800dc3e:	f001 fa99 	bl	800f174 <UART_EndTransmit_IT>
    return;
 800dc42:	e026      	b.n	800dc92 <HAL_UART_IRQHandler+0x76a>
  }

  /* UART TX Fifo Empty occurred ----------------------------------------------*/
  if (((isrflags & USART_ISR_TXFE) != 0U) && ((cr1its & USART_CR1_TXFEIE) != 0U))
 800dc44:	f8d7 30e4 	ldr.w	r3, [r7, #228]	@ 0xe4
 800dc48:	f403 0300 	and.w	r3, r3, #8388608	@ 0x800000
 800dc4c:	2b00      	cmp	r3, #0
 800dc4e:	d009      	beq.n	800dc64 <HAL_UART_IRQHandler+0x73c>
 800dc50:	f8d7 30e0 	ldr.w	r3, [r7, #224]	@ 0xe0
 800dc54:	f003 4380 	and.w	r3, r3, #1073741824	@ 0x40000000
 800dc58:	2b00      	cmp	r3, #0
 800dc5a:	d003      	beq.n	800dc64 <HAL_UART_IRQHandler+0x73c>
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
    /* Call registered Tx Fifo Empty Callback */
    huart->TxFifoEmptyCallback(huart);
#else
    /* Call legacy weak Tx Fifo Empty Callback */
    HAL_UARTEx_TxFifoEmptyCallback(huart);
 800dc5c:	6878      	ldr	r0, [r7, #4]
 800dc5e:	f001 ffe5 	bl	800fc2c <HAL_UARTEx_TxFifoEmptyCallback>
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
    return;
 800dc62:	e016      	b.n	800dc92 <HAL_UART_IRQHandler+0x76a>
  }

  /* UART RX Fifo Full occurred ----------------------------------------------*/
  if (((isrflags & USART_ISR_RXFF) != 0U) && ((cr1its & USART_CR1_RXFFIE) != 0U))
 800dc64:	f8d7 30e4 	ldr.w	r3, [r7, #228]	@ 0xe4
 800dc68:	f003 7380 	and.w	r3, r3, #16777216	@ 0x1000000
 800dc6c:	2b00      	cmp	r3, #0
 800dc6e:	d010      	beq.n	800dc92 <HAL_UART_IRQHandler+0x76a>
 800dc70:	f8d7 30e0 	ldr.w	r3, [r7, #224]	@ 0xe0
 800dc74:	2b00      	cmp	r3, #0
 800dc76:	da0c      	bge.n	800dc92 <HAL_UART_IRQHandler+0x76a>
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
    /* Call registered Rx Fifo Full Callback */
    huart->RxFifoFullCallback(huart);
#else
    /* Call legacy weak Rx Fifo Full Callback */
    HAL_UARTEx_RxFifoFullCallback(huart);
 800dc78:	6878      	ldr	r0, [r7, #4]
 800dc7a:	f001 ffcd 	bl	800fc18 <HAL_UARTEx_RxFifoFullCallback>
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
    return;
 800dc7e:	e008      	b.n	800dc92 <HAL_UART_IRQHandler+0x76a>
      return;
 800dc80:	bf00      	nop
 800dc82:	e006      	b.n	800dc92 <HAL_UART_IRQHandler+0x76a>
    return;
 800dc84:	bf00      	nop
 800dc86:	e004      	b.n	800dc92 <HAL_UART_IRQHandler+0x76a>
      return;
 800dc88:	bf00      	nop
 800dc8a:	e002      	b.n	800dc92 <HAL_UART_IRQHandler+0x76a>
      return;
 800dc8c:	bf00      	nop
 800dc8e:	e000      	b.n	800dc92 <HAL_UART_IRQHandler+0x76a>
    return;
 800dc90:	bf00      	nop
  }
}
 800dc92:	37e8      	adds	r7, #232	@ 0xe8
 800dc94:	46bd      	mov	sp, r7
 800dc96:	bd80      	pop	{r7, pc}
 800dc98:	effffffe 	.word	0xeffffffe

0800dc9c <HAL_UART_ErrorCallback>:
  * @brief  UART error callback.
  * @param  huart UART handle.
  * @retval None
  */
__weak void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart)
{
 800dc9c:	b480      	push	{r7}
 800dc9e:	b083      	sub	sp, #12
 800dca0:	af00      	add	r7, sp, #0
 800dca2:	6078      	str	r0, [r7, #4]
  UNUSED(huart);

  /* NOTE : This function should not be modified, when the callback is needed,
            the HAL_UART_ErrorCallback can be implemented in the user file.
   */
}
 800dca4:	bf00      	nop
 800dca6:	370c      	adds	r7, #12
 800dca8:	46bd      	mov	sp, r7
 800dcaa:	f85d 7b04 	ldr.w	r7, [sp], #4
 800dcae:	4770      	bx	lr

0800dcb0 <UART_SetConfig>:
  * @brief Configure the UART peripheral.
  * @param huart UART handle.
  * @retval HAL status
  */
HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart)
{
 800dcb0:	e92d 4fb0 	stmdb	sp!, {r4, r5, r7, r8, r9, sl, fp, lr}
 800dcb4:	b092      	sub	sp, #72	@ 0x48
 800dcb6:	af00      	add	r7, sp, #0
 800dcb8:	6178      	str	r0, [r7, #20]
  uint32_t tmpreg;
  uint16_t brrtemp;
  UART_ClockSourceTypeDef clocksource;
  uint32_t usartdiv;
  HAL_StatusTypeDef ret               = HAL_OK;
 800dcba:	2300      	movs	r3, #0
 800dcbc:	f887 3042 	strb.w	r3, [r7, #66]	@ 0x42
  *  the UART Word Length, Parity, Mode and oversampling:
  *  set the M bits according to huart->Init.WordLength value
  *  set PCE and PS bits according to huart->Init.Parity value
  *  set TE and RE bits according to huart->Init.Mode value
  *  set OVER8 bit according to huart->Init.OverSampling value */
  tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling ;
 800dcc0:	697b      	ldr	r3, [r7, #20]
 800dcc2:	689a      	ldr	r2, [r3, #8]
 800dcc4:	697b      	ldr	r3, [r7, #20]
 800dcc6:	691b      	ldr	r3, [r3, #16]
 800dcc8:	431a      	orrs	r2, r3
 800dcca:	697b      	ldr	r3, [r7, #20]
 800dccc:	695b      	ldr	r3, [r3, #20]
 800dcce:	431a      	orrs	r2, r3
 800dcd0:	697b      	ldr	r3, [r7, #20]
 800dcd2:	69db      	ldr	r3, [r3, #28]
 800dcd4:	4313      	orrs	r3, r2
 800dcd6:	647b      	str	r3, [r7, #68]	@ 0x44
  MODIFY_REG(huart->Instance->CR1, USART_CR1_FIELDS, tmpreg);
 800dcd8:	697b      	ldr	r3, [r7, #20]
 800dcda:	681b      	ldr	r3, [r3, #0]
 800dcdc:	681a      	ldr	r2, [r3, #0]
 800dcde:	4bbe      	ldr	r3, [pc, #760]	@ (800dfd8 <UART_SetConfig+0x328>)
 800dce0:	4013      	ands	r3, r2
 800dce2:	697a      	ldr	r2, [r7, #20]
 800dce4:	6812      	ldr	r2, [r2, #0]
 800dce6:	6c79      	ldr	r1, [r7, #68]	@ 0x44
 800dce8:	430b      	orrs	r3, r1
 800dcea:	6013      	str	r3, [r2, #0]

  /*-------------------------- USART CR2 Configuration -----------------------*/
  /* Configure the UART Stop Bits: Set STOP[13:12] bits according
  * to huart->Init.StopBits value */
  MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
 800dcec:	697b      	ldr	r3, [r7, #20]
 800dcee:	681b      	ldr	r3, [r3, #0]
 800dcf0:	685b      	ldr	r3, [r3, #4]
 800dcf2:	f423 5140 	bic.w	r1, r3, #12288	@ 0x3000
 800dcf6:	697b      	ldr	r3, [r7, #20]
 800dcf8:	68da      	ldr	r2, [r3, #12]
 800dcfa:	697b      	ldr	r3, [r7, #20]
 800dcfc:	681b      	ldr	r3, [r3, #0]
 800dcfe:	430a      	orrs	r2, r1
 800dd00:	605a      	str	r2, [r3, #4]
  /* Configure
  * - UART HardWare Flow Control: set CTSE and RTSE bits according
  *   to huart->Init.HwFlowCtl value
  * - one-bit sampling method versus three samples' majority rule according
  *   to huart->Init.OneBitSampling (not applicable to LPUART) */
  tmpreg = (uint32_t)huart->Init.HwFlowCtl;
 800dd02:	697b      	ldr	r3, [r7, #20]
 800dd04:	699b      	ldr	r3, [r3, #24]
 800dd06:	647b      	str	r3, [r7, #68]	@ 0x44

  if (!(UART_INSTANCE_LOWPOWER(huart)))
 800dd08:	697b      	ldr	r3, [r7, #20]
 800dd0a:	681b      	ldr	r3, [r3, #0]
 800dd0c:	4ab3      	ldr	r2, [pc, #716]	@ (800dfdc <UART_SetConfig+0x32c>)
 800dd0e:	4293      	cmp	r3, r2
 800dd10:	d004      	beq.n	800dd1c <UART_SetConfig+0x6c>
  {
    tmpreg |= huart->Init.OneBitSampling;
 800dd12:	697b      	ldr	r3, [r7, #20]
 800dd14:	6a1b      	ldr	r3, [r3, #32]
 800dd16:	6c7a      	ldr	r2, [r7, #68]	@ 0x44
 800dd18:	4313      	orrs	r3, r2
 800dd1a:	647b      	str	r3, [r7, #68]	@ 0x44
  }
  MODIFY_REG(huart->Instance->CR3, USART_CR3_FIELDS, tmpreg);
 800dd1c:	697b      	ldr	r3, [r7, #20]
 800dd1e:	681b      	ldr	r3, [r3, #0]
 800dd20:	689a      	ldr	r2, [r3, #8]
 800dd22:	4baf      	ldr	r3, [pc, #700]	@ (800dfe0 <UART_SetConfig+0x330>)
 800dd24:	4013      	ands	r3, r2
 800dd26:	697a      	ldr	r2, [r7, #20]
 800dd28:	6812      	ldr	r2, [r2, #0]
 800dd2a:	6c79      	ldr	r1, [r7, #68]	@ 0x44
 800dd2c:	430b      	orrs	r3, r1
 800dd2e:	6093      	str	r3, [r2, #8]

  /*-------------------------- USART PRESC Configuration -----------------------*/
  /* Configure
  * - UART Clock Prescaler : set PRESCALER according to huart->Init.ClockPrescaler value */
  MODIFY_REG(huart->Instance->PRESC, USART_PRESC_PRESCALER, huart->Init.ClockPrescaler);
 800dd30:	697b      	ldr	r3, [r7, #20]
 800dd32:	681b      	ldr	r3, [r3, #0]
 800dd34:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800dd36:	f023 010f 	bic.w	r1, r3, #15
 800dd3a:	697b      	ldr	r3, [r7, #20]
 800dd3c:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 800dd3e:	697b      	ldr	r3, [r7, #20]
 800dd40:	681b      	ldr	r3, [r3, #0]
 800dd42:	430a      	orrs	r2, r1
 800dd44:	62da      	str	r2, [r3, #44]	@ 0x2c

  /*-------------------------- USART BRR Configuration -----------------------*/
  UART_GETCLOCKSOURCE(huart, clocksource);
 800dd46:	697b      	ldr	r3, [r7, #20]
 800dd48:	681b      	ldr	r3, [r3, #0]
 800dd4a:	4aa6      	ldr	r2, [pc, #664]	@ (800dfe4 <UART_SetConfig+0x334>)
 800dd4c:	4293      	cmp	r3, r2
 800dd4e:	d177      	bne.n	800de40 <UART_SetConfig+0x190>
 800dd50:	4ba5      	ldr	r3, [pc, #660]	@ (800dfe8 <UART_SetConfig+0x338>)
 800dd52:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800dd54:	f003 0338 	and.w	r3, r3, #56	@ 0x38
 800dd58:	2b28      	cmp	r3, #40	@ 0x28
 800dd5a:	d86d      	bhi.n	800de38 <UART_SetConfig+0x188>
 800dd5c:	a201      	add	r2, pc, #4	@ (adr r2, 800dd64 <UART_SetConfig+0xb4>)
 800dd5e:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800dd62:	bf00      	nop
 800dd64:	0800de09 	.word	0x0800de09
 800dd68:	0800de39 	.word	0x0800de39
 800dd6c:	0800de39 	.word	0x0800de39
 800dd70:	0800de39 	.word	0x0800de39
 800dd74:	0800de39 	.word	0x0800de39
 800dd78:	0800de39 	.word	0x0800de39
 800dd7c:	0800de39 	.word	0x0800de39
 800dd80:	0800de39 	.word	0x0800de39
 800dd84:	0800de11 	.word	0x0800de11
 800dd88:	0800de39 	.word	0x0800de39
 800dd8c:	0800de39 	.word	0x0800de39
 800dd90:	0800de39 	.word	0x0800de39
 800dd94:	0800de39 	.word	0x0800de39
 800dd98:	0800de39 	.word	0x0800de39
 800dd9c:	0800de39 	.word	0x0800de39
 800dda0:	0800de39 	.word	0x0800de39
 800dda4:	0800de19 	.word	0x0800de19
 800dda8:	0800de39 	.word	0x0800de39
 800ddac:	0800de39 	.word	0x0800de39
 800ddb0:	0800de39 	.word	0x0800de39
 800ddb4:	0800de39 	.word	0x0800de39
 800ddb8:	0800de39 	.word	0x0800de39
 800ddbc:	0800de39 	.word	0x0800de39
 800ddc0:	0800de39 	.word	0x0800de39
 800ddc4:	0800de21 	.word	0x0800de21
 800ddc8:	0800de39 	.word	0x0800de39
 800ddcc:	0800de39 	.word	0x0800de39
 800ddd0:	0800de39 	.word	0x0800de39
 800ddd4:	0800de39 	.word	0x0800de39
 800ddd8:	0800de39 	.word	0x0800de39
 800dddc:	0800de39 	.word	0x0800de39
 800dde0:	0800de39 	.word	0x0800de39
 800dde4:	0800de29 	.word	0x0800de29
 800dde8:	0800de39 	.word	0x0800de39
 800ddec:	0800de39 	.word	0x0800de39
 800ddf0:	0800de39 	.word	0x0800de39
 800ddf4:	0800de39 	.word	0x0800de39
 800ddf8:	0800de39 	.word	0x0800de39
 800ddfc:	0800de39 	.word	0x0800de39
 800de00:	0800de39 	.word	0x0800de39
 800de04:	0800de31 	.word	0x0800de31
 800de08:	2301      	movs	r3, #1
 800de0a:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800de0e:	e222      	b.n	800e256 <UART_SetConfig+0x5a6>
 800de10:	2304      	movs	r3, #4
 800de12:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800de16:	e21e      	b.n	800e256 <UART_SetConfig+0x5a6>
 800de18:	2308      	movs	r3, #8
 800de1a:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800de1e:	e21a      	b.n	800e256 <UART_SetConfig+0x5a6>
 800de20:	2310      	movs	r3, #16
 800de22:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800de26:	e216      	b.n	800e256 <UART_SetConfig+0x5a6>
 800de28:	2320      	movs	r3, #32
 800de2a:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800de2e:	e212      	b.n	800e256 <UART_SetConfig+0x5a6>
 800de30:	2340      	movs	r3, #64	@ 0x40
 800de32:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800de36:	e20e      	b.n	800e256 <UART_SetConfig+0x5a6>
 800de38:	2380      	movs	r3, #128	@ 0x80
 800de3a:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800de3e:	e20a      	b.n	800e256 <UART_SetConfig+0x5a6>
 800de40:	697b      	ldr	r3, [r7, #20]
 800de42:	681b      	ldr	r3, [r3, #0]
 800de44:	4a69      	ldr	r2, [pc, #420]	@ (800dfec <UART_SetConfig+0x33c>)
 800de46:	4293      	cmp	r3, r2
 800de48:	d130      	bne.n	800deac <UART_SetConfig+0x1fc>
 800de4a:	4b67      	ldr	r3, [pc, #412]	@ (800dfe8 <UART_SetConfig+0x338>)
 800de4c:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800de4e:	f003 0307 	and.w	r3, r3, #7
 800de52:	2b05      	cmp	r3, #5
 800de54:	d826      	bhi.n	800dea4 <UART_SetConfig+0x1f4>
 800de56:	a201      	add	r2, pc, #4	@ (adr r2, 800de5c <UART_SetConfig+0x1ac>)
 800de58:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800de5c:	0800de75 	.word	0x0800de75
 800de60:	0800de7d 	.word	0x0800de7d
 800de64:	0800de85 	.word	0x0800de85
 800de68:	0800de8d 	.word	0x0800de8d
 800de6c:	0800de95 	.word	0x0800de95
 800de70:	0800de9d 	.word	0x0800de9d
 800de74:	2300      	movs	r3, #0
 800de76:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800de7a:	e1ec      	b.n	800e256 <UART_SetConfig+0x5a6>
 800de7c:	2304      	movs	r3, #4
 800de7e:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800de82:	e1e8      	b.n	800e256 <UART_SetConfig+0x5a6>
 800de84:	2308      	movs	r3, #8
 800de86:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800de8a:	e1e4      	b.n	800e256 <UART_SetConfig+0x5a6>
 800de8c:	2310      	movs	r3, #16
 800de8e:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800de92:	e1e0      	b.n	800e256 <UART_SetConfig+0x5a6>
 800de94:	2320      	movs	r3, #32
 800de96:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800de9a:	e1dc      	b.n	800e256 <UART_SetConfig+0x5a6>
 800de9c:	2340      	movs	r3, #64	@ 0x40
 800de9e:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800dea2:	e1d8      	b.n	800e256 <UART_SetConfig+0x5a6>
 800dea4:	2380      	movs	r3, #128	@ 0x80
 800dea6:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800deaa:	e1d4      	b.n	800e256 <UART_SetConfig+0x5a6>
 800deac:	697b      	ldr	r3, [r7, #20]
 800deae:	681b      	ldr	r3, [r3, #0]
 800deb0:	4a4f      	ldr	r2, [pc, #316]	@ (800dff0 <UART_SetConfig+0x340>)
 800deb2:	4293      	cmp	r3, r2
 800deb4:	d130      	bne.n	800df18 <UART_SetConfig+0x268>
 800deb6:	4b4c      	ldr	r3, [pc, #304]	@ (800dfe8 <UART_SetConfig+0x338>)
 800deb8:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800deba:	f003 0307 	and.w	r3, r3, #7
 800debe:	2b05      	cmp	r3, #5
 800dec0:	d826      	bhi.n	800df10 <UART_SetConfig+0x260>
 800dec2:	a201      	add	r2, pc, #4	@ (adr r2, 800dec8 <UART_SetConfig+0x218>)
 800dec4:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800dec8:	0800dee1 	.word	0x0800dee1
 800decc:	0800dee9 	.word	0x0800dee9
 800ded0:	0800def1 	.word	0x0800def1
 800ded4:	0800def9 	.word	0x0800def9
 800ded8:	0800df01 	.word	0x0800df01
 800dedc:	0800df09 	.word	0x0800df09
 800dee0:	2300      	movs	r3, #0
 800dee2:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800dee6:	e1b6      	b.n	800e256 <UART_SetConfig+0x5a6>
 800dee8:	2304      	movs	r3, #4
 800deea:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800deee:	e1b2      	b.n	800e256 <UART_SetConfig+0x5a6>
 800def0:	2308      	movs	r3, #8
 800def2:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800def6:	e1ae      	b.n	800e256 <UART_SetConfig+0x5a6>
 800def8:	2310      	movs	r3, #16
 800defa:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800defe:	e1aa      	b.n	800e256 <UART_SetConfig+0x5a6>
 800df00:	2320      	movs	r3, #32
 800df02:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800df06:	e1a6      	b.n	800e256 <UART_SetConfig+0x5a6>
 800df08:	2340      	movs	r3, #64	@ 0x40
 800df0a:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800df0e:	e1a2      	b.n	800e256 <UART_SetConfig+0x5a6>
 800df10:	2380      	movs	r3, #128	@ 0x80
 800df12:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800df16:	e19e      	b.n	800e256 <UART_SetConfig+0x5a6>
 800df18:	697b      	ldr	r3, [r7, #20]
 800df1a:	681b      	ldr	r3, [r3, #0]
 800df1c:	4a35      	ldr	r2, [pc, #212]	@ (800dff4 <UART_SetConfig+0x344>)
 800df1e:	4293      	cmp	r3, r2
 800df20:	d130      	bne.n	800df84 <UART_SetConfig+0x2d4>
 800df22:	4b31      	ldr	r3, [pc, #196]	@ (800dfe8 <UART_SetConfig+0x338>)
 800df24:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800df26:	f003 0307 	and.w	r3, r3, #7
 800df2a:	2b05      	cmp	r3, #5
 800df2c:	d826      	bhi.n	800df7c <UART_SetConfig+0x2cc>
 800df2e:	a201      	add	r2, pc, #4	@ (adr r2, 800df34 <UART_SetConfig+0x284>)
 800df30:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800df34:	0800df4d 	.word	0x0800df4d
 800df38:	0800df55 	.word	0x0800df55
 800df3c:	0800df5d 	.word	0x0800df5d
 800df40:	0800df65 	.word	0x0800df65
 800df44:	0800df6d 	.word	0x0800df6d
 800df48:	0800df75 	.word	0x0800df75
 800df4c:	2300      	movs	r3, #0
 800df4e:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800df52:	e180      	b.n	800e256 <UART_SetConfig+0x5a6>
 800df54:	2304      	movs	r3, #4
 800df56:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800df5a:	e17c      	b.n	800e256 <UART_SetConfig+0x5a6>
 800df5c:	2308      	movs	r3, #8
 800df5e:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800df62:	e178      	b.n	800e256 <UART_SetConfig+0x5a6>
 800df64:	2310      	movs	r3, #16
 800df66:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800df6a:	e174      	b.n	800e256 <UART_SetConfig+0x5a6>
 800df6c:	2320      	movs	r3, #32
 800df6e:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800df72:	e170      	b.n	800e256 <UART_SetConfig+0x5a6>
 800df74:	2340      	movs	r3, #64	@ 0x40
 800df76:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800df7a:	e16c      	b.n	800e256 <UART_SetConfig+0x5a6>
 800df7c:	2380      	movs	r3, #128	@ 0x80
 800df7e:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800df82:	e168      	b.n	800e256 <UART_SetConfig+0x5a6>
 800df84:	697b      	ldr	r3, [r7, #20]
 800df86:	681b      	ldr	r3, [r3, #0]
 800df88:	4a1b      	ldr	r2, [pc, #108]	@ (800dff8 <UART_SetConfig+0x348>)
 800df8a:	4293      	cmp	r3, r2
 800df8c:	d142      	bne.n	800e014 <UART_SetConfig+0x364>
 800df8e:	4b16      	ldr	r3, [pc, #88]	@ (800dfe8 <UART_SetConfig+0x338>)
 800df90:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800df92:	f003 0307 	and.w	r3, r3, #7
 800df96:	2b05      	cmp	r3, #5
 800df98:	d838      	bhi.n	800e00c <UART_SetConfig+0x35c>
 800df9a:	a201      	add	r2, pc, #4	@ (adr r2, 800dfa0 <UART_SetConfig+0x2f0>)
 800df9c:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800dfa0:	0800dfb9 	.word	0x0800dfb9
 800dfa4:	0800dfc1 	.word	0x0800dfc1
 800dfa8:	0800dfc9 	.word	0x0800dfc9
 800dfac:	0800dfd1 	.word	0x0800dfd1
 800dfb0:	0800dffd 	.word	0x0800dffd
 800dfb4:	0800e005 	.word	0x0800e005
 800dfb8:	2300      	movs	r3, #0
 800dfba:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800dfbe:	e14a      	b.n	800e256 <UART_SetConfig+0x5a6>
 800dfc0:	2304      	movs	r3, #4
 800dfc2:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800dfc6:	e146      	b.n	800e256 <UART_SetConfig+0x5a6>
 800dfc8:	2308      	movs	r3, #8
 800dfca:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800dfce:	e142      	b.n	800e256 <UART_SetConfig+0x5a6>
 800dfd0:	2310      	movs	r3, #16
 800dfd2:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800dfd6:	e13e      	b.n	800e256 <UART_SetConfig+0x5a6>
 800dfd8:	cfff69f3 	.word	0xcfff69f3
 800dfdc:	58000c00 	.word	0x58000c00
 800dfe0:	11fff4ff 	.word	0x11fff4ff
 800dfe4:	40011000 	.word	0x40011000
 800dfe8:	58024400 	.word	0x58024400
 800dfec:	40004400 	.word	0x40004400
 800dff0:	40004800 	.word	0x40004800
 800dff4:	40004c00 	.word	0x40004c00
 800dff8:	40005000 	.word	0x40005000
 800dffc:	2320      	movs	r3, #32
 800dffe:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e002:	e128      	b.n	800e256 <UART_SetConfig+0x5a6>
 800e004:	2340      	movs	r3, #64	@ 0x40
 800e006:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e00a:	e124      	b.n	800e256 <UART_SetConfig+0x5a6>
 800e00c:	2380      	movs	r3, #128	@ 0x80
 800e00e:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e012:	e120      	b.n	800e256 <UART_SetConfig+0x5a6>
 800e014:	697b      	ldr	r3, [r7, #20]
 800e016:	681b      	ldr	r3, [r3, #0]
 800e018:	4acb      	ldr	r2, [pc, #812]	@ (800e348 <UART_SetConfig+0x698>)
 800e01a:	4293      	cmp	r3, r2
 800e01c:	d176      	bne.n	800e10c <UART_SetConfig+0x45c>
 800e01e:	4bcb      	ldr	r3, [pc, #812]	@ (800e34c <UART_SetConfig+0x69c>)
 800e020:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800e022:	f003 0338 	and.w	r3, r3, #56	@ 0x38
 800e026:	2b28      	cmp	r3, #40	@ 0x28
 800e028:	d86c      	bhi.n	800e104 <UART_SetConfig+0x454>
 800e02a:	a201      	add	r2, pc, #4	@ (adr r2, 800e030 <UART_SetConfig+0x380>)
 800e02c:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800e030:	0800e0d5 	.word	0x0800e0d5
 800e034:	0800e105 	.word	0x0800e105
 800e038:	0800e105 	.word	0x0800e105
 800e03c:	0800e105 	.word	0x0800e105
 800e040:	0800e105 	.word	0x0800e105
 800e044:	0800e105 	.word	0x0800e105
 800e048:	0800e105 	.word	0x0800e105
 800e04c:	0800e105 	.word	0x0800e105
 800e050:	0800e0dd 	.word	0x0800e0dd
 800e054:	0800e105 	.word	0x0800e105
 800e058:	0800e105 	.word	0x0800e105
 800e05c:	0800e105 	.word	0x0800e105
 800e060:	0800e105 	.word	0x0800e105
 800e064:	0800e105 	.word	0x0800e105
 800e068:	0800e105 	.word	0x0800e105
 800e06c:	0800e105 	.word	0x0800e105
 800e070:	0800e0e5 	.word	0x0800e0e5
 800e074:	0800e105 	.word	0x0800e105
 800e078:	0800e105 	.word	0x0800e105
 800e07c:	0800e105 	.word	0x0800e105
 800e080:	0800e105 	.word	0x0800e105
 800e084:	0800e105 	.word	0x0800e105
 800e088:	0800e105 	.word	0x0800e105
 800e08c:	0800e105 	.word	0x0800e105
 800e090:	0800e0ed 	.word	0x0800e0ed
 800e094:	0800e105 	.word	0x0800e105
 800e098:	0800e105 	.word	0x0800e105
 800e09c:	0800e105 	.word	0x0800e105
 800e0a0:	0800e105 	.word	0x0800e105
 800e0a4:	0800e105 	.word	0x0800e105
 800e0a8:	0800e105 	.word	0x0800e105
 800e0ac:	0800e105 	.word	0x0800e105
 800e0b0:	0800e0f5 	.word	0x0800e0f5
 800e0b4:	0800e105 	.word	0x0800e105
 800e0b8:	0800e105 	.word	0x0800e105
 800e0bc:	0800e105 	.word	0x0800e105
 800e0c0:	0800e105 	.word	0x0800e105
 800e0c4:	0800e105 	.word	0x0800e105
 800e0c8:	0800e105 	.word	0x0800e105
 800e0cc:	0800e105 	.word	0x0800e105
 800e0d0:	0800e0fd 	.word	0x0800e0fd
 800e0d4:	2301      	movs	r3, #1
 800e0d6:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e0da:	e0bc      	b.n	800e256 <UART_SetConfig+0x5a6>
 800e0dc:	2304      	movs	r3, #4
 800e0de:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e0e2:	e0b8      	b.n	800e256 <UART_SetConfig+0x5a6>
 800e0e4:	2308      	movs	r3, #8
 800e0e6:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e0ea:	e0b4      	b.n	800e256 <UART_SetConfig+0x5a6>
 800e0ec:	2310      	movs	r3, #16
 800e0ee:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e0f2:	e0b0      	b.n	800e256 <UART_SetConfig+0x5a6>
 800e0f4:	2320      	movs	r3, #32
 800e0f6:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e0fa:	e0ac      	b.n	800e256 <UART_SetConfig+0x5a6>
 800e0fc:	2340      	movs	r3, #64	@ 0x40
 800e0fe:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e102:	e0a8      	b.n	800e256 <UART_SetConfig+0x5a6>
 800e104:	2380      	movs	r3, #128	@ 0x80
 800e106:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e10a:	e0a4      	b.n	800e256 <UART_SetConfig+0x5a6>
 800e10c:	697b      	ldr	r3, [r7, #20]
 800e10e:	681b      	ldr	r3, [r3, #0]
 800e110:	4a8f      	ldr	r2, [pc, #572]	@ (800e350 <UART_SetConfig+0x6a0>)
 800e112:	4293      	cmp	r3, r2
 800e114:	d130      	bne.n	800e178 <UART_SetConfig+0x4c8>
 800e116:	4b8d      	ldr	r3, [pc, #564]	@ (800e34c <UART_SetConfig+0x69c>)
 800e118:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800e11a:	f003 0307 	and.w	r3, r3, #7
 800e11e:	2b05      	cmp	r3, #5
 800e120:	d826      	bhi.n	800e170 <UART_SetConfig+0x4c0>
 800e122:	a201      	add	r2, pc, #4	@ (adr r2, 800e128 <UART_SetConfig+0x478>)
 800e124:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800e128:	0800e141 	.word	0x0800e141
 800e12c:	0800e149 	.word	0x0800e149
 800e130:	0800e151 	.word	0x0800e151
 800e134:	0800e159 	.word	0x0800e159
 800e138:	0800e161 	.word	0x0800e161
 800e13c:	0800e169 	.word	0x0800e169
 800e140:	2300      	movs	r3, #0
 800e142:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e146:	e086      	b.n	800e256 <UART_SetConfig+0x5a6>
 800e148:	2304      	movs	r3, #4
 800e14a:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e14e:	e082      	b.n	800e256 <UART_SetConfig+0x5a6>
 800e150:	2308      	movs	r3, #8
 800e152:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e156:	e07e      	b.n	800e256 <UART_SetConfig+0x5a6>
 800e158:	2310      	movs	r3, #16
 800e15a:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e15e:	e07a      	b.n	800e256 <UART_SetConfig+0x5a6>
 800e160:	2320      	movs	r3, #32
 800e162:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e166:	e076      	b.n	800e256 <UART_SetConfig+0x5a6>
 800e168:	2340      	movs	r3, #64	@ 0x40
 800e16a:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e16e:	e072      	b.n	800e256 <UART_SetConfig+0x5a6>
 800e170:	2380      	movs	r3, #128	@ 0x80
 800e172:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e176:	e06e      	b.n	800e256 <UART_SetConfig+0x5a6>
 800e178:	697b      	ldr	r3, [r7, #20]
 800e17a:	681b      	ldr	r3, [r3, #0]
 800e17c:	4a75      	ldr	r2, [pc, #468]	@ (800e354 <UART_SetConfig+0x6a4>)
 800e17e:	4293      	cmp	r3, r2
 800e180:	d130      	bne.n	800e1e4 <UART_SetConfig+0x534>
 800e182:	4b72      	ldr	r3, [pc, #456]	@ (800e34c <UART_SetConfig+0x69c>)
 800e184:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800e186:	f003 0307 	and.w	r3, r3, #7
 800e18a:	2b05      	cmp	r3, #5
 800e18c:	d826      	bhi.n	800e1dc <UART_SetConfig+0x52c>
 800e18e:	a201      	add	r2, pc, #4	@ (adr r2, 800e194 <UART_SetConfig+0x4e4>)
 800e190:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800e194:	0800e1ad 	.word	0x0800e1ad
 800e198:	0800e1b5 	.word	0x0800e1b5
 800e19c:	0800e1bd 	.word	0x0800e1bd
 800e1a0:	0800e1c5 	.word	0x0800e1c5
 800e1a4:	0800e1cd 	.word	0x0800e1cd
 800e1a8:	0800e1d5 	.word	0x0800e1d5
 800e1ac:	2300      	movs	r3, #0
 800e1ae:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e1b2:	e050      	b.n	800e256 <UART_SetConfig+0x5a6>
 800e1b4:	2304      	movs	r3, #4
 800e1b6:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e1ba:	e04c      	b.n	800e256 <UART_SetConfig+0x5a6>
 800e1bc:	2308      	movs	r3, #8
 800e1be:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e1c2:	e048      	b.n	800e256 <UART_SetConfig+0x5a6>
 800e1c4:	2310      	movs	r3, #16
 800e1c6:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e1ca:	e044      	b.n	800e256 <UART_SetConfig+0x5a6>
 800e1cc:	2320      	movs	r3, #32
 800e1ce:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e1d2:	e040      	b.n	800e256 <UART_SetConfig+0x5a6>
 800e1d4:	2340      	movs	r3, #64	@ 0x40
 800e1d6:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e1da:	e03c      	b.n	800e256 <UART_SetConfig+0x5a6>
 800e1dc:	2380      	movs	r3, #128	@ 0x80
 800e1de:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e1e2:	e038      	b.n	800e256 <UART_SetConfig+0x5a6>
 800e1e4:	697b      	ldr	r3, [r7, #20]
 800e1e6:	681b      	ldr	r3, [r3, #0]
 800e1e8:	4a5b      	ldr	r2, [pc, #364]	@ (800e358 <UART_SetConfig+0x6a8>)
 800e1ea:	4293      	cmp	r3, r2
 800e1ec:	d130      	bne.n	800e250 <UART_SetConfig+0x5a0>
 800e1ee:	4b57      	ldr	r3, [pc, #348]	@ (800e34c <UART_SetConfig+0x69c>)
 800e1f0:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800e1f2:	f003 0307 	and.w	r3, r3, #7
 800e1f6:	2b05      	cmp	r3, #5
 800e1f8:	d826      	bhi.n	800e248 <UART_SetConfig+0x598>
 800e1fa:	a201      	add	r2, pc, #4	@ (adr r2, 800e200 <UART_SetConfig+0x550>)
 800e1fc:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800e200:	0800e219 	.word	0x0800e219
 800e204:	0800e221 	.word	0x0800e221
 800e208:	0800e229 	.word	0x0800e229
 800e20c:	0800e231 	.word	0x0800e231
 800e210:	0800e239 	.word	0x0800e239
 800e214:	0800e241 	.word	0x0800e241
 800e218:	2302      	movs	r3, #2
 800e21a:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e21e:	e01a      	b.n	800e256 <UART_SetConfig+0x5a6>
 800e220:	2304      	movs	r3, #4
 800e222:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e226:	e016      	b.n	800e256 <UART_SetConfig+0x5a6>
 800e228:	2308      	movs	r3, #8
 800e22a:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e22e:	e012      	b.n	800e256 <UART_SetConfig+0x5a6>
 800e230:	2310      	movs	r3, #16
 800e232:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e236:	e00e      	b.n	800e256 <UART_SetConfig+0x5a6>
 800e238:	2320      	movs	r3, #32
 800e23a:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e23e:	e00a      	b.n	800e256 <UART_SetConfig+0x5a6>
 800e240:	2340      	movs	r3, #64	@ 0x40
 800e242:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e246:	e006      	b.n	800e256 <UART_SetConfig+0x5a6>
 800e248:	2380      	movs	r3, #128	@ 0x80
 800e24a:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e24e:	e002      	b.n	800e256 <UART_SetConfig+0x5a6>
 800e250:	2380      	movs	r3, #128	@ 0x80
 800e252:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43

  /* Check LPUART instance */
  if (UART_INSTANCE_LOWPOWER(huart))
 800e256:	697b      	ldr	r3, [r7, #20]
 800e258:	681b      	ldr	r3, [r3, #0]
 800e25a:	4a3f      	ldr	r2, [pc, #252]	@ (800e358 <UART_SetConfig+0x6a8>)
 800e25c:	4293      	cmp	r3, r2
 800e25e:	f040 80f8 	bne.w	800e452 <UART_SetConfig+0x7a2>
  {
    /* Retrieve frequency clock */
    switch (clocksource)
 800e262:	f897 3043 	ldrb.w	r3, [r7, #67]	@ 0x43
 800e266:	2b20      	cmp	r3, #32
 800e268:	dc46      	bgt.n	800e2f8 <UART_SetConfig+0x648>
 800e26a:	2b02      	cmp	r3, #2
 800e26c:	f2c0 8082 	blt.w	800e374 <UART_SetConfig+0x6c4>
 800e270:	3b02      	subs	r3, #2
 800e272:	2b1e      	cmp	r3, #30
 800e274:	d87e      	bhi.n	800e374 <UART_SetConfig+0x6c4>
 800e276:	a201      	add	r2, pc, #4	@ (adr r2, 800e27c <UART_SetConfig+0x5cc>)
 800e278:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800e27c:	0800e2ff 	.word	0x0800e2ff
 800e280:	0800e375 	.word	0x0800e375
 800e284:	0800e307 	.word	0x0800e307
 800e288:	0800e375 	.word	0x0800e375
 800e28c:	0800e375 	.word	0x0800e375
 800e290:	0800e375 	.word	0x0800e375
 800e294:	0800e317 	.word	0x0800e317
 800e298:	0800e375 	.word	0x0800e375
 800e29c:	0800e375 	.word	0x0800e375
 800e2a0:	0800e375 	.word	0x0800e375
 800e2a4:	0800e375 	.word	0x0800e375
 800e2a8:	0800e375 	.word	0x0800e375
 800e2ac:	0800e375 	.word	0x0800e375
 800e2b0:	0800e375 	.word	0x0800e375
 800e2b4:	0800e327 	.word	0x0800e327
 800e2b8:	0800e375 	.word	0x0800e375
 800e2bc:	0800e375 	.word	0x0800e375
 800e2c0:	0800e375 	.word	0x0800e375
 800e2c4:	0800e375 	.word	0x0800e375
 800e2c8:	0800e375 	.word	0x0800e375
 800e2cc:	0800e375 	.word	0x0800e375
 800e2d0:	0800e375 	.word	0x0800e375
 800e2d4:	0800e375 	.word	0x0800e375
 800e2d8:	0800e375 	.word	0x0800e375
 800e2dc:	0800e375 	.word	0x0800e375
 800e2e0:	0800e375 	.word	0x0800e375
 800e2e4:	0800e375 	.word	0x0800e375
 800e2e8:	0800e375 	.word	0x0800e375
 800e2ec:	0800e375 	.word	0x0800e375
 800e2f0:	0800e375 	.word	0x0800e375
 800e2f4:	0800e367 	.word	0x0800e367
 800e2f8:	2b40      	cmp	r3, #64	@ 0x40
 800e2fa:	d037      	beq.n	800e36c <UART_SetConfig+0x6bc>
 800e2fc:	e03a      	b.n	800e374 <UART_SetConfig+0x6c4>
    {
      case UART_CLOCKSOURCE_D3PCLK1:
        pclk = HAL_RCCEx_GetD3PCLK1Freq();
 800e2fe:	f7fd fff9 	bl	800c2f4 <HAL_RCCEx_GetD3PCLK1Freq>
 800e302:	63f8      	str	r0, [r7, #60]	@ 0x3c
        break;
 800e304:	e03c      	b.n	800e380 <UART_SetConfig+0x6d0>
      case UART_CLOCKSOURCE_PLL2:
        HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks);
 800e306:	f107 0324 	add.w	r3, r7, #36	@ 0x24
 800e30a:	4618      	mov	r0, r3
 800e30c:	f7fe f808 	bl	800c320 <HAL_RCCEx_GetPLL2ClockFreq>
        pclk = pll2_clocks.PLL2_Q_Frequency;
 800e310:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 800e312:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800e314:	e034      	b.n	800e380 <UART_SetConfig+0x6d0>
      case UART_CLOCKSOURCE_PLL3:
        HAL_RCCEx_GetPLL3ClockFreq(&pll3_clocks);
 800e316:	f107 0318 	add.w	r3, r7, #24
 800e31a:	4618      	mov	r0, r3
 800e31c:	f7fe f954 	bl	800c5c8 <HAL_RCCEx_GetPLL3ClockFreq>
        pclk = pll3_clocks.PLL3_Q_Frequency;
 800e320:	69fb      	ldr	r3, [r7, #28]
 800e322:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800e324:	e02c      	b.n	800e380 <UART_SetConfig+0x6d0>
      case UART_CLOCKSOURCE_HSI:
        if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
 800e326:	4b09      	ldr	r3, [pc, #36]	@ (800e34c <UART_SetConfig+0x69c>)
 800e328:	681b      	ldr	r3, [r3, #0]
 800e32a:	f003 0320 	and.w	r3, r3, #32
 800e32e:	2b00      	cmp	r3, #0
 800e330:	d016      	beq.n	800e360 <UART_SetConfig+0x6b0>
        {
          pclk = (uint32_t)(HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3U));
 800e332:	4b06      	ldr	r3, [pc, #24]	@ (800e34c <UART_SetConfig+0x69c>)
 800e334:	681b      	ldr	r3, [r3, #0]
 800e336:	08db      	lsrs	r3, r3, #3
 800e338:	f003 0303 	and.w	r3, r3, #3
 800e33c:	4a07      	ldr	r2, [pc, #28]	@ (800e35c <UART_SetConfig+0x6ac>)
 800e33e:	fa22 f303 	lsr.w	r3, r2, r3
 800e342:	63fb      	str	r3, [r7, #60]	@ 0x3c
        }
        else
        {
          pclk = (uint32_t) HSI_VALUE;
        }
        break;
 800e344:	e01c      	b.n	800e380 <UART_SetConfig+0x6d0>
 800e346:	bf00      	nop
 800e348:	40011400 	.word	0x40011400
 800e34c:	58024400 	.word	0x58024400
 800e350:	40007800 	.word	0x40007800
 800e354:	40007c00 	.word	0x40007c00
 800e358:	58000c00 	.word	0x58000c00
 800e35c:	03d09000 	.word	0x03d09000
          pclk = (uint32_t) HSI_VALUE;
 800e360:	4b9d      	ldr	r3, [pc, #628]	@ (800e5d8 <UART_SetConfig+0x928>)
 800e362:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800e364:	e00c      	b.n	800e380 <UART_SetConfig+0x6d0>
      case UART_CLOCKSOURCE_CSI:
        pclk = (uint32_t) CSI_VALUE;
 800e366:	4b9d      	ldr	r3, [pc, #628]	@ (800e5dc <UART_SetConfig+0x92c>)
 800e368:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800e36a:	e009      	b.n	800e380 <UART_SetConfig+0x6d0>
      case UART_CLOCKSOURCE_LSE:
        pclk = (uint32_t) LSE_VALUE;
 800e36c:	f44f 4300 	mov.w	r3, #32768	@ 0x8000
 800e370:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800e372:	e005      	b.n	800e380 <UART_SetConfig+0x6d0>
      default:
        pclk = 0U;
 800e374:	2300      	movs	r3, #0
 800e376:	63fb      	str	r3, [r7, #60]	@ 0x3c
        ret = HAL_ERROR;
 800e378:	2301      	movs	r3, #1
 800e37a:	f887 3042 	strb.w	r3, [r7, #66]	@ 0x42
        break;
 800e37e:	bf00      	nop
    }

    /* If proper clock source reported */
    if (pclk != 0U)
 800e380:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800e382:	2b00      	cmp	r3, #0
 800e384:	f000 81de 	beq.w	800e744 <UART_SetConfig+0xa94>
    {
      /* Compute clock after Prescaler */
      lpuart_ker_ck_pres = (pclk / UARTPrescTable[huart->Init.ClockPrescaler]);
 800e388:	697b      	ldr	r3, [r7, #20]
 800e38a:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 800e38c:	4a94      	ldr	r2, [pc, #592]	@ (800e5e0 <UART_SetConfig+0x930>)
 800e38e:	f832 3013 	ldrh.w	r3, [r2, r3, lsl #1]
 800e392:	461a      	mov	r2, r3
 800e394:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800e396:	fbb3 f3f2 	udiv	r3, r3, r2
 800e39a:	633b      	str	r3, [r7, #48]	@ 0x30

      /* Ensure that Frequency clock is in the range [3 * baudrate, 4096 * baudrate] */
      if ((lpuart_ker_ck_pres < (3U * huart->Init.BaudRate)) ||
 800e39c:	697b      	ldr	r3, [r7, #20]
 800e39e:	685a      	ldr	r2, [r3, #4]
 800e3a0:	4613      	mov	r3, r2
 800e3a2:	005b      	lsls	r3, r3, #1
 800e3a4:	4413      	add	r3, r2
 800e3a6:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 800e3a8:	429a      	cmp	r2, r3
 800e3aa:	d305      	bcc.n	800e3b8 <UART_SetConfig+0x708>
          (lpuart_ker_ck_pres > (4096U * huart->Init.BaudRate)))
 800e3ac:	697b      	ldr	r3, [r7, #20]
 800e3ae:	685b      	ldr	r3, [r3, #4]
 800e3b0:	031b      	lsls	r3, r3, #12
      if ((lpuart_ker_ck_pres < (3U * huart->Init.BaudRate)) ||
 800e3b2:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 800e3b4:	429a      	cmp	r2, r3
 800e3b6:	d903      	bls.n	800e3c0 <UART_SetConfig+0x710>
      {
        ret = HAL_ERROR;
 800e3b8:	2301      	movs	r3, #1
 800e3ba:	f887 3042 	strb.w	r3, [r7, #66]	@ 0x42
 800e3be:	e1c1      	b.n	800e744 <UART_SetConfig+0xa94>
      }
      else
      {
        /* Check computed UsartDiv value is in allocated range
           (it is forbidden to write values lower than 0x300 in the LPUART_BRR register) */
        usartdiv = (uint32_t)(UART_DIV_LPUART(pclk, huart->Init.BaudRate, huart->Init.ClockPrescaler));
 800e3c0:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800e3c2:	2200      	movs	r2, #0
 800e3c4:	60bb      	str	r3, [r7, #8]
 800e3c6:	60fa      	str	r2, [r7, #12]
 800e3c8:	697b      	ldr	r3, [r7, #20]
 800e3ca:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 800e3cc:	4a84      	ldr	r2, [pc, #528]	@ (800e5e0 <UART_SetConfig+0x930>)
 800e3ce:	f832 3013 	ldrh.w	r3, [r2, r3, lsl #1]
 800e3d2:	b29b      	uxth	r3, r3
 800e3d4:	2200      	movs	r2, #0
 800e3d6:	603b      	str	r3, [r7, #0]
 800e3d8:	607a      	str	r2, [r7, #4]
 800e3da:	e9d7 2300 	ldrd	r2, r3, [r7]
 800e3de:	e9d7 0102 	ldrd	r0, r1, [r7, #8]
 800e3e2:	f7f2 f9a1 	bl	8000728 <__aeabi_uldivmod>
 800e3e6:	4602      	mov	r2, r0
 800e3e8:	460b      	mov	r3, r1
 800e3ea:	4610      	mov	r0, r2
 800e3ec:	4619      	mov	r1, r3
 800e3ee:	f04f 0200 	mov.w	r2, #0
 800e3f2:	f04f 0300 	mov.w	r3, #0
 800e3f6:	020b      	lsls	r3, r1, #8
 800e3f8:	ea43 6310 	orr.w	r3, r3, r0, lsr #24
 800e3fc:	0202      	lsls	r2, r0, #8
 800e3fe:	6979      	ldr	r1, [r7, #20]
 800e400:	6849      	ldr	r1, [r1, #4]
 800e402:	0849      	lsrs	r1, r1, #1
 800e404:	2000      	movs	r0, #0
 800e406:	460c      	mov	r4, r1
 800e408:	4605      	mov	r5, r0
 800e40a:	eb12 0804 	adds.w	r8, r2, r4
 800e40e:	eb43 0905 	adc.w	r9, r3, r5
 800e412:	697b      	ldr	r3, [r7, #20]
 800e414:	685b      	ldr	r3, [r3, #4]
 800e416:	2200      	movs	r2, #0
 800e418:	469a      	mov	sl, r3
 800e41a:	4693      	mov	fp, r2
 800e41c:	4652      	mov	r2, sl
 800e41e:	465b      	mov	r3, fp
 800e420:	4640      	mov	r0, r8
 800e422:	4649      	mov	r1, r9
 800e424:	f7f2 f980 	bl	8000728 <__aeabi_uldivmod>
 800e428:	4602      	mov	r2, r0
 800e42a:	460b      	mov	r3, r1
 800e42c:	4613      	mov	r3, r2
 800e42e:	63bb      	str	r3, [r7, #56]	@ 0x38
        if ((usartdiv >= LPUART_BRR_MIN) && (usartdiv <= LPUART_BRR_MAX))
 800e430:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800e432:	f5b3 7f40 	cmp.w	r3, #768	@ 0x300
 800e436:	d308      	bcc.n	800e44a <UART_SetConfig+0x79a>
 800e438:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800e43a:	f5b3 1f80 	cmp.w	r3, #1048576	@ 0x100000
 800e43e:	d204      	bcs.n	800e44a <UART_SetConfig+0x79a>
        {
          huart->Instance->BRR = usartdiv;
 800e440:	697b      	ldr	r3, [r7, #20]
 800e442:	681b      	ldr	r3, [r3, #0]
 800e444:	6bba      	ldr	r2, [r7, #56]	@ 0x38
 800e446:	60da      	str	r2, [r3, #12]
 800e448:	e17c      	b.n	800e744 <UART_SetConfig+0xa94>
        }
        else
        {
          ret = HAL_ERROR;
 800e44a:	2301      	movs	r3, #1
 800e44c:	f887 3042 	strb.w	r3, [r7, #66]	@ 0x42
 800e450:	e178      	b.n	800e744 <UART_SetConfig+0xa94>
      } /* if ( (lpuart_ker_ck_pres < (3 * huart->Init.BaudRate) ) ||
                (lpuart_ker_ck_pres > (4096 * huart->Init.BaudRate) )) */
    } /* if (pclk != 0) */
  }
  /* Check UART Over Sampling to set Baud Rate Register */
  else if (huart->Init.OverSampling == UART_OVERSAMPLING_8)
 800e452:	697b      	ldr	r3, [r7, #20]
 800e454:	69db      	ldr	r3, [r3, #28]
 800e456:	f5b3 4f00 	cmp.w	r3, #32768	@ 0x8000
 800e45a:	f040 80c5 	bne.w	800e5e8 <UART_SetConfig+0x938>
  {
    switch (clocksource)
 800e45e:	f897 3043 	ldrb.w	r3, [r7, #67]	@ 0x43
 800e462:	2b20      	cmp	r3, #32
 800e464:	dc48      	bgt.n	800e4f8 <UART_SetConfig+0x848>
 800e466:	2b00      	cmp	r3, #0
 800e468:	db7b      	blt.n	800e562 <UART_SetConfig+0x8b2>
 800e46a:	2b20      	cmp	r3, #32
 800e46c:	d879      	bhi.n	800e562 <UART_SetConfig+0x8b2>
 800e46e:	a201      	add	r2, pc, #4	@ (adr r2, 800e474 <UART_SetConfig+0x7c4>)
 800e470:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800e474:	0800e4ff 	.word	0x0800e4ff
 800e478:	0800e507 	.word	0x0800e507
 800e47c:	0800e563 	.word	0x0800e563
 800e480:	0800e563 	.word	0x0800e563
 800e484:	0800e50f 	.word	0x0800e50f
 800e488:	0800e563 	.word	0x0800e563
 800e48c:	0800e563 	.word	0x0800e563
 800e490:	0800e563 	.word	0x0800e563
 800e494:	0800e51f 	.word	0x0800e51f
 800e498:	0800e563 	.word	0x0800e563
 800e49c:	0800e563 	.word	0x0800e563
 800e4a0:	0800e563 	.word	0x0800e563
 800e4a4:	0800e563 	.word	0x0800e563
 800e4a8:	0800e563 	.word	0x0800e563
 800e4ac:	0800e563 	.word	0x0800e563
 800e4b0:	0800e563 	.word	0x0800e563
 800e4b4:	0800e52f 	.word	0x0800e52f
 800e4b8:	0800e563 	.word	0x0800e563
 800e4bc:	0800e563 	.word	0x0800e563
 800e4c0:	0800e563 	.word	0x0800e563
 800e4c4:	0800e563 	.word	0x0800e563
 800e4c8:	0800e563 	.word	0x0800e563
 800e4cc:	0800e563 	.word	0x0800e563
 800e4d0:	0800e563 	.word	0x0800e563
 800e4d4:	0800e563 	.word	0x0800e563
 800e4d8:	0800e563 	.word	0x0800e563
 800e4dc:	0800e563 	.word	0x0800e563
 800e4e0:	0800e563 	.word	0x0800e563
 800e4e4:	0800e563 	.word	0x0800e563
 800e4e8:	0800e563 	.word	0x0800e563
 800e4ec:	0800e563 	.word	0x0800e563
 800e4f0:	0800e563 	.word	0x0800e563
 800e4f4:	0800e555 	.word	0x0800e555
 800e4f8:	2b40      	cmp	r3, #64	@ 0x40
 800e4fa:	d02e      	beq.n	800e55a <UART_SetConfig+0x8aa>
 800e4fc:	e031      	b.n	800e562 <UART_SetConfig+0x8b2>
    {
      case UART_CLOCKSOURCE_D2PCLK1:
        pclk = HAL_RCC_GetPCLK1Freq();
 800e4fe:	f7fc fc9d 	bl	800ae3c <HAL_RCC_GetPCLK1Freq>
 800e502:	63f8      	str	r0, [r7, #60]	@ 0x3c
        break;
 800e504:	e033      	b.n	800e56e <UART_SetConfig+0x8be>
      case UART_CLOCKSOURCE_D2PCLK2:
        pclk = HAL_RCC_GetPCLK2Freq();
 800e506:	f7fc fcaf 	bl	800ae68 <HAL_RCC_GetPCLK2Freq>
 800e50a:	63f8      	str	r0, [r7, #60]	@ 0x3c
        break;
 800e50c:	e02f      	b.n	800e56e <UART_SetConfig+0x8be>
      case UART_CLOCKSOURCE_PLL2:
        HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks);
 800e50e:	f107 0324 	add.w	r3, r7, #36	@ 0x24
 800e512:	4618      	mov	r0, r3
 800e514:	f7fd ff04 	bl	800c320 <HAL_RCCEx_GetPLL2ClockFreq>
        pclk = pll2_clocks.PLL2_Q_Frequency;
 800e518:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 800e51a:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800e51c:	e027      	b.n	800e56e <UART_SetConfig+0x8be>
      case UART_CLOCKSOURCE_PLL3:
        HAL_RCCEx_GetPLL3ClockFreq(&pll3_clocks);
 800e51e:	f107 0318 	add.w	r3, r7, #24
 800e522:	4618      	mov	r0, r3
 800e524:	f7fe f850 	bl	800c5c8 <HAL_RCCEx_GetPLL3ClockFreq>
        pclk = pll3_clocks.PLL3_Q_Frequency;
 800e528:	69fb      	ldr	r3, [r7, #28]
 800e52a:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800e52c:	e01f      	b.n	800e56e <UART_SetConfig+0x8be>
      case UART_CLOCKSOURCE_HSI:
        if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
 800e52e:	4b2d      	ldr	r3, [pc, #180]	@ (800e5e4 <UART_SetConfig+0x934>)
 800e530:	681b      	ldr	r3, [r3, #0]
 800e532:	f003 0320 	and.w	r3, r3, #32
 800e536:	2b00      	cmp	r3, #0
 800e538:	d009      	beq.n	800e54e <UART_SetConfig+0x89e>
        {
          pclk = (uint32_t)(HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3U));
 800e53a:	4b2a      	ldr	r3, [pc, #168]	@ (800e5e4 <UART_SetConfig+0x934>)
 800e53c:	681b      	ldr	r3, [r3, #0]
 800e53e:	08db      	lsrs	r3, r3, #3
 800e540:	f003 0303 	and.w	r3, r3, #3
 800e544:	4a24      	ldr	r2, [pc, #144]	@ (800e5d8 <UART_SetConfig+0x928>)
 800e546:	fa22 f303 	lsr.w	r3, r2, r3
 800e54a:	63fb      	str	r3, [r7, #60]	@ 0x3c
        }
        else
        {
          pclk = (uint32_t) HSI_VALUE;
        }
        break;
 800e54c:	e00f      	b.n	800e56e <UART_SetConfig+0x8be>
          pclk = (uint32_t) HSI_VALUE;
 800e54e:	4b22      	ldr	r3, [pc, #136]	@ (800e5d8 <UART_SetConfig+0x928>)
 800e550:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800e552:	e00c      	b.n	800e56e <UART_SetConfig+0x8be>
      case UART_CLOCKSOURCE_CSI:
        pclk = (uint32_t) CSI_VALUE;
 800e554:	4b21      	ldr	r3, [pc, #132]	@ (800e5dc <UART_SetConfig+0x92c>)
 800e556:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800e558:	e009      	b.n	800e56e <UART_SetConfig+0x8be>
      case UART_CLOCKSOURCE_LSE:
        pclk = (uint32_t) LSE_VALUE;
 800e55a:	f44f 4300 	mov.w	r3, #32768	@ 0x8000
 800e55e:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800e560:	e005      	b.n	800e56e <UART_SetConfig+0x8be>
      default:
        pclk = 0U;
 800e562:	2300      	movs	r3, #0
 800e564:	63fb      	str	r3, [r7, #60]	@ 0x3c
        ret = HAL_ERROR;
 800e566:	2301      	movs	r3, #1
 800e568:	f887 3042 	strb.w	r3, [r7, #66]	@ 0x42
        break;
 800e56c:	bf00      	nop
    }

    /* USARTDIV must be greater than or equal to 0d16 */
    if (pclk != 0U)
 800e56e:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800e570:	2b00      	cmp	r3, #0
 800e572:	f000 80e7 	beq.w	800e744 <UART_SetConfig+0xa94>
    {
      usartdiv = (uint32_t)(UART_DIV_SAMPLING8(pclk, huart->Init.BaudRate, huart->Init.ClockPrescaler));
 800e576:	697b      	ldr	r3, [r7, #20]
 800e578:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 800e57a:	4a19      	ldr	r2, [pc, #100]	@ (800e5e0 <UART_SetConfig+0x930>)
 800e57c:	f832 3013 	ldrh.w	r3, [r2, r3, lsl #1]
 800e580:	461a      	mov	r2, r3
 800e582:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800e584:	fbb3 f3f2 	udiv	r3, r3, r2
 800e588:	005a      	lsls	r2, r3, #1
 800e58a:	697b      	ldr	r3, [r7, #20]
 800e58c:	685b      	ldr	r3, [r3, #4]
 800e58e:	085b      	lsrs	r3, r3, #1
 800e590:	441a      	add	r2, r3
 800e592:	697b      	ldr	r3, [r7, #20]
 800e594:	685b      	ldr	r3, [r3, #4]
 800e596:	fbb2 f3f3 	udiv	r3, r2, r3
 800e59a:	63bb      	str	r3, [r7, #56]	@ 0x38
      if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX))
 800e59c:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800e59e:	2b0f      	cmp	r3, #15
 800e5a0:	d916      	bls.n	800e5d0 <UART_SetConfig+0x920>
 800e5a2:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800e5a4:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 800e5a8:	d212      	bcs.n	800e5d0 <UART_SetConfig+0x920>
      {
        brrtemp = (uint16_t)(usartdiv & 0xFFF0U);
 800e5aa:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800e5ac:	b29b      	uxth	r3, r3
 800e5ae:	f023 030f 	bic.w	r3, r3, #15
 800e5b2:	86fb      	strh	r3, [r7, #54]	@ 0x36
        brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U);
 800e5b4:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800e5b6:	085b      	lsrs	r3, r3, #1
 800e5b8:	b29b      	uxth	r3, r3
 800e5ba:	f003 0307 	and.w	r3, r3, #7
 800e5be:	b29a      	uxth	r2, r3
 800e5c0:	8efb      	ldrh	r3, [r7, #54]	@ 0x36
 800e5c2:	4313      	orrs	r3, r2
 800e5c4:	86fb      	strh	r3, [r7, #54]	@ 0x36
        huart->Instance->BRR = brrtemp;
 800e5c6:	697b      	ldr	r3, [r7, #20]
 800e5c8:	681b      	ldr	r3, [r3, #0]
 800e5ca:	8efa      	ldrh	r2, [r7, #54]	@ 0x36
 800e5cc:	60da      	str	r2, [r3, #12]
 800e5ce:	e0b9      	b.n	800e744 <UART_SetConfig+0xa94>
      }
      else
      {
        ret = HAL_ERROR;
 800e5d0:	2301      	movs	r3, #1
 800e5d2:	f887 3042 	strb.w	r3, [r7, #66]	@ 0x42
 800e5d6:	e0b5      	b.n	800e744 <UART_SetConfig+0xa94>
 800e5d8:	03d09000 	.word	0x03d09000
 800e5dc:	003d0900 	.word	0x003d0900
 800e5e0:	08031320 	.word	0x08031320
 800e5e4:	58024400 	.word	0x58024400
      }
    }
  }
  else
  {
    switch (clocksource)
 800e5e8:	f897 3043 	ldrb.w	r3, [r7, #67]	@ 0x43
 800e5ec:	2b20      	cmp	r3, #32
 800e5ee:	dc49      	bgt.n	800e684 <UART_SetConfig+0x9d4>
 800e5f0:	2b00      	cmp	r3, #0
 800e5f2:	db7c      	blt.n	800e6ee <UART_SetConfig+0xa3e>
 800e5f4:	2b20      	cmp	r3, #32
 800e5f6:	d87a      	bhi.n	800e6ee <UART_SetConfig+0xa3e>
 800e5f8:	a201      	add	r2, pc, #4	@ (adr r2, 800e600 <UART_SetConfig+0x950>)
 800e5fa:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800e5fe:	bf00      	nop
 800e600:	0800e68b 	.word	0x0800e68b
 800e604:	0800e693 	.word	0x0800e693
 800e608:	0800e6ef 	.word	0x0800e6ef
 800e60c:	0800e6ef 	.word	0x0800e6ef
 800e610:	0800e69b 	.word	0x0800e69b
 800e614:	0800e6ef 	.word	0x0800e6ef
 800e618:	0800e6ef 	.word	0x0800e6ef
 800e61c:	0800e6ef 	.word	0x0800e6ef
 800e620:	0800e6ab 	.word	0x0800e6ab
 800e624:	0800e6ef 	.word	0x0800e6ef
 800e628:	0800e6ef 	.word	0x0800e6ef
 800e62c:	0800e6ef 	.word	0x0800e6ef
 800e630:	0800e6ef 	.word	0x0800e6ef
 800e634:	0800e6ef 	.word	0x0800e6ef
 800e638:	0800e6ef 	.word	0x0800e6ef
 800e63c:	0800e6ef 	.word	0x0800e6ef
 800e640:	0800e6bb 	.word	0x0800e6bb
 800e644:	0800e6ef 	.word	0x0800e6ef
 800e648:	0800e6ef 	.word	0x0800e6ef
 800e64c:	0800e6ef 	.word	0x0800e6ef
 800e650:	0800e6ef 	.word	0x0800e6ef
 800e654:	0800e6ef 	.word	0x0800e6ef
 800e658:	0800e6ef 	.word	0x0800e6ef
 800e65c:	0800e6ef 	.word	0x0800e6ef
 800e660:	0800e6ef 	.word	0x0800e6ef
 800e664:	0800e6ef 	.word	0x0800e6ef
 800e668:	0800e6ef 	.word	0x0800e6ef
 800e66c:	0800e6ef 	.word	0x0800e6ef
 800e670:	0800e6ef 	.word	0x0800e6ef
 800e674:	0800e6ef 	.word	0x0800e6ef
 800e678:	0800e6ef 	.word	0x0800e6ef
 800e67c:	0800e6ef 	.word	0x0800e6ef
 800e680:	0800e6e1 	.word	0x0800e6e1
 800e684:	2b40      	cmp	r3, #64	@ 0x40
 800e686:	d02e      	beq.n	800e6e6 <UART_SetConfig+0xa36>
 800e688:	e031      	b.n	800e6ee <UART_SetConfig+0xa3e>
    {
      case UART_CLOCKSOURCE_D2PCLK1:
        pclk = HAL_RCC_GetPCLK1Freq();
 800e68a:	f7fc fbd7 	bl	800ae3c <HAL_RCC_GetPCLK1Freq>
 800e68e:	63f8      	str	r0, [r7, #60]	@ 0x3c
        break;
 800e690:	e033      	b.n	800e6fa <UART_SetConfig+0xa4a>
      case UART_CLOCKSOURCE_D2PCLK2:
        pclk = HAL_RCC_GetPCLK2Freq();
 800e692:	f7fc fbe9 	bl	800ae68 <HAL_RCC_GetPCLK2Freq>
 800e696:	63f8      	str	r0, [r7, #60]	@ 0x3c
        break;
 800e698:	e02f      	b.n	800e6fa <UART_SetConfig+0xa4a>
      case UART_CLOCKSOURCE_PLL2:
        HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks);
 800e69a:	f107 0324 	add.w	r3, r7, #36	@ 0x24
 800e69e:	4618      	mov	r0, r3
 800e6a0:	f7fd fe3e 	bl	800c320 <HAL_RCCEx_GetPLL2ClockFreq>
        pclk = pll2_clocks.PLL2_Q_Frequency;
 800e6a4:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 800e6a6:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800e6a8:	e027      	b.n	800e6fa <UART_SetConfig+0xa4a>
      case UART_CLOCKSOURCE_PLL3:
        HAL_RCCEx_GetPLL3ClockFreq(&pll3_clocks);
 800e6aa:	f107 0318 	add.w	r3, r7, #24
 800e6ae:	4618      	mov	r0, r3
 800e6b0:	f7fd ff8a 	bl	800c5c8 <HAL_RCCEx_GetPLL3ClockFreq>
        pclk = pll3_clocks.PLL3_Q_Frequency;
 800e6b4:	69fb      	ldr	r3, [r7, #28]
 800e6b6:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800e6b8:	e01f      	b.n	800e6fa <UART_SetConfig+0xa4a>
      case UART_CLOCKSOURCE_HSI:
        if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
 800e6ba:	4b2d      	ldr	r3, [pc, #180]	@ (800e770 <UART_SetConfig+0xac0>)
 800e6bc:	681b      	ldr	r3, [r3, #0]
 800e6be:	f003 0320 	and.w	r3, r3, #32
 800e6c2:	2b00      	cmp	r3, #0
 800e6c4:	d009      	beq.n	800e6da <UART_SetConfig+0xa2a>
        {
          pclk = (uint32_t)(HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3U));
 800e6c6:	4b2a      	ldr	r3, [pc, #168]	@ (800e770 <UART_SetConfig+0xac0>)
 800e6c8:	681b      	ldr	r3, [r3, #0]
 800e6ca:	08db      	lsrs	r3, r3, #3
 800e6cc:	f003 0303 	and.w	r3, r3, #3
 800e6d0:	4a28      	ldr	r2, [pc, #160]	@ (800e774 <UART_SetConfig+0xac4>)
 800e6d2:	fa22 f303 	lsr.w	r3, r2, r3
 800e6d6:	63fb      	str	r3, [r7, #60]	@ 0x3c
        }
        else
        {
          pclk = (uint32_t) HSI_VALUE;
        }
        break;
 800e6d8:	e00f      	b.n	800e6fa <UART_SetConfig+0xa4a>
          pclk = (uint32_t) HSI_VALUE;
 800e6da:	4b26      	ldr	r3, [pc, #152]	@ (800e774 <UART_SetConfig+0xac4>)
 800e6dc:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800e6de:	e00c      	b.n	800e6fa <UART_SetConfig+0xa4a>
      case UART_CLOCKSOURCE_CSI:
        pclk = (uint32_t) CSI_VALUE;
 800e6e0:	4b25      	ldr	r3, [pc, #148]	@ (800e778 <UART_SetConfig+0xac8>)
 800e6e2:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800e6e4:	e009      	b.n	800e6fa <UART_SetConfig+0xa4a>
      case UART_CLOCKSOURCE_LSE:
        pclk = (uint32_t) LSE_VALUE;
 800e6e6:	f44f 4300 	mov.w	r3, #32768	@ 0x8000
 800e6ea:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800e6ec:	e005      	b.n	800e6fa <UART_SetConfig+0xa4a>
      default:
        pclk = 0U;
 800e6ee:	2300      	movs	r3, #0
 800e6f0:	63fb      	str	r3, [r7, #60]	@ 0x3c
        ret = HAL_ERROR;
 800e6f2:	2301      	movs	r3, #1
 800e6f4:	f887 3042 	strb.w	r3, [r7, #66]	@ 0x42
        break;
 800e6f8:	bf00      	nop
    }

    if (pclk != 0U)
 800e6fa:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800e6fc:	2b00      	cmp	r3, #0
 800e6fe:	d021      	beq.n	800e744 <UART_SetConfig+0xa94>
    {
      /* USARTDIV must be greater than or equal to 0d16 */
      usartdiv = (uint32_t)(UART_DIV_SAMPLING16(pclk, huart->Init.BaudRate, huart->Init.ClockPrescaler));
 800e700:	697b      	ldr	r3, [r7, #20]
 800e702:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 800e704:	4a1d      	ldr	r2, [pc, #116]	@ (800e77c <UART_SetConfig+0xacc>)
 800e706:	f832 3013 	ldrh.w	r3, [r2, r3, lsl #1]
 800e70a:	461a      	mov	r2, r3
 800e70c:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800e70e:	fbb3 f2f2 	udiv	r2, r3, r2
 800e712:	697b      	ldr	r3, [r7, #20]
 800e714:	685b      	ldr	r3, [r3, #4]
 800e716:	085b      	lsrs	r3, r3, #1
 800e718:	441a      	add	r2, r3
 800e71a:	697b      	ldr	r3, [r7, #20]
 800e71c:	685b      	ldr	r3, [r3, #4]
 800e71e:	fbb2 f3f3 	udiv	r3, r2, r3
 800e722:	63bb      	str	r3, [r7, #56]	@ 0x38
      if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX))
 800e724:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800e726:	2b0f      	cmp	r3, #15
 800e728:	d909      	bls.n	800e73e <UART_SetConfig+0xa8e>
 800e72a:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800e72c:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 800e730:	d205      	bcs.n	800e73e <UART_SetConfig+0xa8e>
      {
        huart->Instance->BRR = (uint16_t)usartdiv;
 800e732:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800e734:	b29a      	uxth	r2, r3
 800e736:	697b      	ldr	r3, [r7, #20]
 800e738:	681b      	ldr	r3, [r3, #0]
 800e73a:	60da      	str	r2, [r3, #12]
 800e73c:	e002      	b.n	800e744 <UART_SetConfig+0xa94>
      }
      else
      {
        ret = HAL_ERROR;
 800e73e:	2301      	movs	r3, #1
 800e740:	f887 3042 	strb.w	r3, [r7, #66]	@ 0x42
      }
    }
  }

  /* Initialize the number of data to process during RX/TX ISR execution */
  huart->NbTxDataToProcess = 1;
 800e744:	697b      	ldr	r3, [r7, #20]
 800e746:	2201      	movs	r2, #1
 800e748:	f8a3 206a 	strh.w	r2, [r3, #106]	@ 0x6a
  huart->NbRxDataToProcess = 1;
 800e74c:	697b      	ldr	r3, [r7, #20]
 800e74e:	2201      	movs	r2, #1
 800e750:	f8a3 2068 	strh.w	r2, [r3, #104]	@ 0x68

  /* Clear ISR function pointers */
  huart->RxISR = NULL;
 800e754:	697b      	ldr	r3, [r7, #20]
 800e756:	2200      	movs	r2, #0
 800e758:	675a      	str	r2, [r3, #116]	@ 0x74
  huart->TxISR = NULL;
 800e75a:	697b      	ldr	r3, [r7, #20]
 800e75c:	2200      	movs	r2, #0
 800e75e:	679a      	str	r2, [r3, #120]	@ 0x78

  return ret;
 800e760:	f897 3042 	ldrb.w	r3, [r7, #66]	@ 0x42
}
 800e764:	4618      	mov	r0, r3
 800e766:	3748      	adds	r7, #72	@ 0x48
 800e768:	46bd      	mov	sp, r7
 800e76a:	e8bd 8fb0 	ldmia.w	sp!, {r4, r5, r7, r8, r9, sl, fp, pc}
 800e76e:	bf00      	nop
 800e770:	58024400 	.word	0x58024400
 800e774:	03d09000 	.word	0x03d09000
 800e778:	003d0900 	.word	0x003d0900
 800e77c:	08031320 	.word	0x08031320

0800e780 <UART_AdvFeatureConfig>:
  * @brief Configure the UART peripheral advanced features.
  * @param huart UART handle.
  * @retval None
  */
void UART_AdvFeatureConfig(UART_HandleTypeDef *huart)
{
 800e780:	b480      	push	{r7}
 800e782:	b083      	sub	sp, #12
 800e784:	af00      	add	r7, sp, #0
 800e786:	6078      	str	r0, [r7, #4]
  /* Check whether the set of advanced features to configure is properly set */
  assert_param(IS_UART_ADVFEATURE_INIT(huart->AdvancedInit.AdvFeatureInit));

  /* if required, configure RX/TX pins swap */
  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_SWAP_INIT))
 800e788:	687b      	ldr	r3, [r7, #4]
 800e78a:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800e78c:	f003 0308 	and.w	r3, r3, #8
 800e790:	2b00      	cmp	r3, #0
 800e792:	d00a      	beq.n	800e7aa <UART_AdvFeatureConfig+0x2a>
  {
    assert_param(IS_UART_ADVFEATURE_SWAP(huart->AdvancedInit.Swap));
    MODIFY_REG(huart->Instance->CR2, USART_CR2_SWAP, huart->AdvancedInit.Swap);
 800e794:	687b      	ldr	r3, [r7, #4]
 800e796:	681b      	ldr	r3, [r3, #0]
 800e798:	685b      	ldr	r3, [r3, #4]
 800e79a:	f423 4100 	bic.w	r1, r3, #32768	@ 0x8000
 800e79e:	687b      	ldr	r3, [r7, #4]
 800e7a0:	6b9a      	ldr	r2, [r3, #56]	@ 0x38
 800e7a2:	687b      	ldr	r3, [r7, #4]
 800e7a4:	681b      	ldr	r3, [r3, #0]
 800e7a6:	430a      	orrs	r2, r1
 800e7a8:	605a      	str	r2, [r3, #4]
  }

  /* if required, configure TX pin active level inversion */
  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_TXINVERT_INIT))
 800e7aa:	687b      	ldr	r3, [r7, #4]
 800e7ac:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800e7ae:	f003 0301 	and.w	r3, r3, #1
 800e7b2:	2b00      	cmp	r3, #0
 800e7b4:	d00a      	beq.n	800e7cc <UART_AdvFeatureConfig+0x4c>
  {
    assert_param(IS_UART_ADVFEATURE_TXINV(huart->AdvancedInit.TxPinLevelInvert));
    MODIFY_REG(huart->Instance->CR2, USART_CR2_TXINV, huart->AdvancedInit.TxPinLevelInvert);
 800e7b6:	687b      	ldr	r3, [r7, #4]
 800e7b8:	681b      	ldr	r3, [r3, #0]
 800e7ba:	685b      	ldr	r3, [r3, #4]
 800e7bc:	f423 3100 	bic.w	r1, r3, #131072	@ 0x20000
 800e7c0:	687b      	ldr	r3, [r7, #4]
 800e7c2:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 800e7c4:	687b      	ldr	r3, [r7, #4]
 800e7c6:	681b      	ldr	r3, [r3, #0]
 800e7c8:	430a      	orrs	r2, r1
 800e7ca:	605a      	str	r2, [r3, #4]
  }

  /* if required, configure RX pin active level inversion */
  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXINVERT_INIT))
 800e7cc:	687b      	ldr	r3, [r7, #4]
 800e7ce:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800e7d0:	f003 0302 	and.w	r3, r3, #2
 800e7d4:	2b00      	cmp	r3, #0
 800e7d6:	d00a      	beq.n	800e7ee <UART_AdvFeatureConfig+0x6e>
  {
    assert_param(IS_UART_ADVFEATURE_RXINV(huart->AdvancedInit.RxPinLevelInvert));
    MODIFY_REG(huart->Instance->CR2, USART_CR2_RXINV, huart->AdvancedInit.RxPinLevelInvert);
 800e7d8:	687b      	ldr	r3, [r7, #4]
 800e7da:	681b      	ldr	r3, [r3, #0]
 800e7dc:	685b      	ldr	r3, [r3, #4]
 800e7de:	f423 3180 	bic.w	r1, r3, #65536	@ 0x10000
 800e7e2:	687b      	ldr	r3, [r7, #4]
 800e7e4:	6b1a      	ldr	r2, [r3, #48]	@ 0x30
 800e7e6:	687b      	ldr	r3, [r7, #4]
 800e7e8:	681b      	ldr	r3, [r3, #0]
 800e7ea:	430a      	orrs	r2, r1
 800e7ec:	605a      	str	r2, [r3, #4]
  }

  /* if required, configure data inversion */
  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DATAINVERT_INIT))
 800e7ee:	687b      	ldr	r3, [r7, #4]
 800e7f0:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800e7f2:	f003 0304 	and.w	r3, r3, #4
 800e7f6:	2b00      	cmp	r3, #0
 800e7f8:	d00a      	beq.n	800e810 <UART_AdvFeatureConfig+0x90>
  {
    assert_param(IS_UART_ADVFEATURE_DATAINV(huart->AdvancedInit.DataInvert));
    MODIFY_REG(huart->Instance->CR2, USART_CR2_DATAINV, huart->AdvancedInit.DataInvert);
 800e7fa:	687b      	ldr	r3, [r7, #4]
 800e7fc:	681b      	ldr	r3, [r3, #0]
 800e7fe:	685b      	ldr	r3, [r3, #4]
 800e800:	f423 2180 	bic.w	r1, r3, #262144	@ 0x40000
 800e804:	687b      	ldr	r3, [r7, #4]
 800e806:	6b5a      	ldr	r2, [r3, #52]	@ 0x34
 800e808:	687b      	ldr	r3, [r7, #4]
 800e80a:	681b      	ldr	r3, [r3, #0]
 800e80c:	430a      	orrs	r2, r1
 800e80e:	605a      	str	r2, [r3, #4]
  }

  /* if required, configure RX overrun detection disabling */
  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXOVERRUNDISABLE_INIT))
 800e810:	687b      	ldr	r3, [r7, #4]
 800e812:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800e814:	f003 0310 	and.w	r3, r3, #16
 800e818:	2b00      	cmp	r3, #0
 800e81a:	d00a      	beq.n	800e832 <UART_AdvFeatureConfig+0xb2>
  {
    assert_param(IS_UART_OVERRUN(huart->AdvancedInit.OverrunDisable));
    MODIFY_REG(huart->Instance->CR3, USART_CR3_OVRDIS, huart->AdvancedInit.OverrunDisable);
 800e81c:	687b      	ldr	r3, [r7, #4]
 800e81e:	681b      	ldr	r3, [r3, #0]
 800e820:	689b      	ldr	r3, [r3, #8]
 800e822:	f423 5180 	bic.w	r1, r3, #4096	@ 0x1000
 800e826:	687b      	ldr	r3, [r7, #4]
 800e828:	6bda      	ldr	r2, [r3, #60]	@ 0x3c
 800e82a:	687b      	ldr	r3, [r7, #4]
 800e82c:	681b      	ldr	r3, [r3, #0]
 800e82e:	430a      	orrs	r2, r1
 800e830:	609a      	str	r2, [r3, #8]
  }

  /* if required, configure DMA disabling on reception error */
  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DMADISABLEONERROR_INIT))
 800e832:	687b      	ldr	r3, [r7, #4]
 800e834:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800e836:	f003 0320 	and.w	r3, r3, #32
 800e83a:	2b00      	cmp	r3, #0
 800e83c:	d00a      	beq.n	800e854 <UART_AdvFeatureConfig+0xd4>
  {
    assert_param(IS_UART_ADVFEATURE_DMAONRXERROR(huart->AdvancedInit.DMADisableonRxError));
    MODIFY_REG(huart->Instance->CR3, USART_CR3_DDRE, huart->AdvancedInit.DMADisableonRxError);
 800e83e:	687b      	ldr	r3, [r7, #4]
 800e840:	681b      	ldr	r3, [r3, #0]
 800e842:	689b      	ldr	r3, [r3, #8]
 800e844:	f423 5100 	bic.w	r1, r3, #8192	@ 0x2000
 800e848:	687b      	ldr	r3, [r7, #4]
 800e84a:	6c1a      	ldr	r2, [r3, #64]	@ 0x40
 800e84c:	687b      	ldr	r3, [r7, #4]
 800e84e:	681b      	ldr	r3, [r3, #0]
 800e850:	430a      	orrs	r2, r1
 800e852:	609a      	str	r2, [r3, #8]
  }

  /* if required, configure auto Baud rate detection scheme */
  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_AUTOBAUDRATE_INIT))
 800e854:	687b      	ldr	r3, [r7, #4]
 800e856:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800e858:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 800e85c:	2b00      	cmp	r3, #0
 800e85e:	d01a      	beq.n	800e896 <UART_AdvFeatureConfig+0x116>
  {
    assert_param(IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(huart->Instance));
    assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATE(huart->AdvancedInit.AutoBaudRateEnable));
    MODIFY_REG(huart->Instance->CR2, USART_CR2_ABREN, huart->AdvancedInit.AutoBaudRateEnable);
 800e860:	687b      	ldr	r3, [r7, #4]
 800e862:	681b      	ldr	r3, [r3, #0]
 800e864:	685b      	ldr	r3, [r3, #4]
 800e866:	f423 1180 	bic.w	r1, r3, #1048576	@ 0x100000
 800e86a:	687b      	ldr	r3, [r7, #4]
 800e86c:	6c5a      	ldr	r2, [r3, #68]	@ 0x44
 800e86e:	687b      	ldr	r3, [r7, #4]
 800e870:	681b      	ldr	r3, [r3, #0]
 800e872:	430a      	orrs	r2, r1
 800e874:	605a      	str	r2, [r3, #4]
    /* set auto Baudrate detection parameters if detection is enabled */
    if (huart->AdvancedInit.AutoBaudRateEnable == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE)
 800e876:	687b      	ldr	r3, [r7, #4]
 800e878:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 800e87a:	f5b3 1f80 	cmp.w	r3, #1048576	@ 0x100000
 800e87e:	d10a      	bne.n	800e896 <UART_AdvFeatureConfig+0x116>
    {
      assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(huart->AdvancedInit.AutoBaudRateMode));
      MODIFY_REG(huart->Instance->CR2, USART_CR2_ABRMODE, huart->AdvancedInit.AutoBaudRateMode);
 800e880:	687b      	ldr	r3, [r7, #4]
 800e882:	681b      	ldr	r3, [r3, #0]
 800e884:	685b      	ldr	r3, [r3, #4]
 800e886:	f423 01c0 	bic.w	r1, r3, #6291456	@ 0x600000
 800e88a:	687b      	ldr	r3, [r7, #4]
 800e88c:	6c9a      	ldr	r2, [r3, #72]	@ 0x48
 800e88e:	687b      	ldr	r3, [r7, #4]
 800e890:	681b      	ldr	r3, [r3, #0]
 800e892:	430a      	orrs	r2, r1
 800e894:	605a      	str	r2, [r3, #4]
    }
  }

  /* if required, configure MSB first on communication line */
  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_MSBFIRST_INIT))
 800e896:	687b      	ldr	r3, [r7, #4]
 800e898:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800e89a:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 800e89e:	2b00      	cmp	r3, #0
 800e8a0:	d00a      	beq.n	800e8b8 <UART_AdvFeatureConfig+0x138>
  {
    assert_param(IS_UART_ADVFEATURE_MSBFIRST(huart->AdvancedInit.MSBFirst));
    MODIFY_REG(huart->Instance->CR2, USART_CR2_MSBFIRST, huart->AdvancedInit.MSBFirst);
 800e8a2:	687b      	ldr	r3, [r7, #4]
 800e8a4:	681b      	ldr	r3, [r3, #0]
 800e8a6:	685b      	ldr	r3, [r3, #4]
 800e8a8:	f423 2100 	bic.w	r1, r3, #524288	@ 0x80000
 800e8ac:	687b      	ldr	r3, [r7, #4]
 800e8ae:	6cda      	ldr	r2, [r3, #76]	@ 0x4c
 800e8b0:	687b      	ldr	r3, [r7, #4]
 800e8b2:	681b      	ldr	r3, [r3, #0]
 800e8b4:	430a      	orrs	r2, r1
 800e8b6:	605a      	str	r2, [r3, #4]
  }
}
 800e8b8:	bf00      	nop
 800e8ba:	370c      	adds	r7, #12
 800e8bc:	46bd      	mov	sp, r7
 800e8be:	f85d 7b04 	ldr.w	r7, [sp], #4
 800e8c2:	4770      	bx	lr

0800e8c4 <UART_CheckIdleState>:
  * @brief Check the UART Idle State.
  * @param huart UART handle.
  * @retval HAL status
  */
HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart)
{
 800e8c4:	b580      	push	{r7, lr}
 800e8c6:	b098      	sub	sp, #96	@ 0x60
 800e8c8:	af02      	add	r7, sp, #8
 800e8ca:	6078      	str	r0, [r7, #4]
  uint32_t tickstart;

  /* Initialize the UART ErrorCode */
  huart->ErrorCode = HAL_UART_ERROR_NONE;
 800e8cc:	687b      	ldr	r3, [r7, #4]
 800e8ce:	2200      	movs	r2, #0
 800e8d0:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90

  /* Init tickstart for timeout management */
  tickstart = HAL_GetTick();
 800e8d4:	f7f6 fcb4 	bl	8005240 <HAL_GetTick>
 800e8d8:	6578      	str	r0, [r7, #84]	@ 0x54

  /* Check if the Transmitter is enabled */
  if ((huart->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE)
 800e8da:	687b      	ldr	r3, [r7, #4]
 800e8dc:	681b      	ldr	r3, [r3, #0]
 800e8de:	681b      	ldr	r3, [r3, #0]
 800e8e0:	f003 0308 	and.w	r3, r3, #8
 800e8e4:	2b08      	cmp	r3, #8
 800e8e6:	d12f      	bne.n	800e948 <UART_CheckIdleState+0x84>
  {
    /* Wait until TEACK flag is set */
    if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_TEACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK)
 800e8e8:	f06f 437e 	mvn.w	r3, #4261412864	@ 0xfe000000
 800e8ec:	9300      	str	r3, [sp, #0]
 800e8ee:	6d7b      	ldr	r3, [r7, #84]	@ 0x54
 800e8f0:	2200      	movs	r2, #0
 800e8f2:	f44f 1100 	mov.w	r1, #2097152	@ 0x200000
 800e8f6:	6878      	ldr	r0, [r7, #4]
 800e8f8:	f000 f88e 	bl	800ea18 <UART_WaitOnFlagUntilTimeout>
 800e8fc:	4603      	mov	r3, r0
 800e8fe:	2b00      	cmp	r3, #0
 800e900:	d022      	beq.n	800e948 <UART_CheckIdleState+0x84>
    {
      /* Disable TXE interrupt for the interrupt process */
      ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE_TXFNFIE));
 800e902:	687b      	ldr	r3, [r7, #4]
 800e904:	681b      	ldr	r3, [r3, #0]
 800e906:	63bb      	str	r3, [r7, #56]	@ 0x38
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800e908:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800e90a:	e853 3f00 	ldrex	r3, [r3]
 800e90e:	637b      	str	r3, [r7, #52]	@ 0x34
   return(result);
 800e910:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 800e912:	f023 0380 	bic.w	r3, r3, #128	@ 0x80
 800e916:	653b      	str	r3, [r7, #80]	@ 0x50
 800e918:	687b      	ldr	r3, [r7, #4]
 800e91a:	681b      	ldr	r3, [r3, #0]
 800e91c:	461a      	mov	r2, r3
 800e91e:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 800e920:	647b      	str	r3, [r7, #68]	@ 0x44
 800e922:	643a      	str	r2, [r7, #64]	@ 0x40
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800e924:	6c39      	ldr	r1, [r7, #64]	@ 0x40
 800e926:	6c7a      	ldr	r2, [r7, #68]	@ 0x44
 800e928:	e841 2300 	strex	r3, r2, [r1]
 800e92c:	63fb      	str	r3, [r7, #60]	@ 0x3c
   return(result);
 800e92e:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800e930:	2b00      	cmp	r3, #0
 800e932:	d1e6      	bne.n	800e902 <UART_CheckIdleState+0x3e>

      huart->gState = HAL_UART_STATE_READY;
 800e934:	687b      	ldr	r3, [r7, #4]
 800e936:	2220      	movs	r2, #32
 800e938:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88

      __HAL_UNLOCK(huart);
 800e93c:	687b      	ldr	r3, [r7, #4]
 800e93e:	2200      	movs	r2, #0
 800e940:	f883 2084 	strb.w	r2, [r3, #132]	@ 0x84

      /* Timeout occurred */
      return HAL_TIMEOUT;
 800e944:	2303      	movs	r3, #3
 800e946:	e063      	b.n	800ea10 <UART_CheckIdleState+0x14c>
    }
  }

  /* Check if the Receiver is enabled */
  if ((huart->Instance->CR1 & USART_CR1_RE) == USART_CR1_RE)
 800e948:	687b      	ldr	r3, [r7, #4]
 800e94a:	681b      	ldr	r3, [r3, #0]
 800e94c:	681b      	ldr	r3, [r3, #0]
 800e94e:	f003 0304 	and.w	r3, r3, #4
 800e952:	2b04      	cmp	r3, #4
 800e954:	d149      	bne.n	800e9ea <UART_CheckIdleState+0x126>
  {
    /* Wait until REACK flag is set */
    if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_REACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK)
 800e956:	f06f 437e 	mvn.w	r3, #4261412864	@ 0xfe000000
 800e95a:	9300      	str	r3, [sp, #0]
 800e95c:	6d7b      	ldr	r3, [r7, #84]	@ 0x54
 800e95e:	2200      	movs	r2, #0
 800e960:	f44f 0180 	mov.w	r1, #4194304	@ 0x400000
 800e964:	6878      	ldr	r0, [r7, #4]
 800e966:	f000 f857 	bl	800ea18 <UART_WaitOnFlagUntilTimeout>
 800e96a:	4603      	mov	r3, r0
 800e96c:	2b00      	cmp	r3, #0
 800e96e:	d03c      	beq.n	800e9ea <UART_CheckIdleState+0x126>
    {
      /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error)
      interrupts for the interrupt process */
      ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
 800e970:	687b      	ldr	r3, [r7, #4]
 800e972:	681b      	ldr	r3, [r3, #0]
 800e974:	627b      	str	r3, [r7, #36]	@ 0x24
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800e976:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800e978:	e853 3f00 	ldrex	r3, [r3]
 800e97c:	623b      	str	r3, [r7, #32]
   return(result);
 800e97e:	6a3b      	ldr	r3, [r7, #32]
 800e980:	f423 7390 	bic.w	r3, r3, #288	@ 0x120
 800e984:	64fb      	str	r3, [r7, #76]	@ 0x4c
 800e986:	687b      	ldr	r3, [r7, #4]
 800e988:	681b      	ldr	r3, [r3, #0]
 800e98a:	461a      	mov	r2, r3
 800e98c:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 800e98e:	633b      	str	r3, [r7, #48]	@ 0x30
 800e990:	62fa      	str	r2, [r7, #44]	@ 0x2c
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800e992:	6af9      	ldr	r1, [r7, #44]	@ 0x2c
 800e994:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 800e996:	e841 2300 	strex	r3, r2, [r1]
 800e99a:	62bb      	str	r3, [r7, #40]	@ 0x28
   return(result);
 800e99c:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 800e99e:	2b00      	cmp	r3, #0
 800e9a0:	d1e6      	bne.n	800e970 <UART_CheckIdleState+0xac>
      ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
 800e9a2:	687b      	ldr	r3, [r7, #4]
 800e9a4:	681b      	ldr	r3, [r3, #0]
 800e9a6:	3308      	adds	r3, #8
 800e9a8:	613b      	str	r3, [r7, #16]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800e9aa:	693b      	ldr	r3, [r7, #16]
 800e9ac:	e853 3f00 	ldrex	r3, [r3]
 800e9b0:	60fb      	str	r3, [r7, #12]
   return(result);
 800e9b2:	68fb      	ldr	r3, [r7, #12]
 800e9b4:	f023 0301 	bic.w	r3, r3, #1
 800e9b8:	64bb      	str	r3, [r7, #72]	@ 0x48
 800e9ba:	687b      	ldr	r3, [r7, #4]
 800e9bc:	681b      	ldr	r3, [r3, #0]
 800e9be:	3308      	adds	r3, #8
 800e9c0:	6cba      	ldr	r2, [r7, #72]	@ 0x48
 800e9c2:	61fa      	str	r2, [r7, #28]
 800e9c4:	61bb      	str	r3, [r7, #24]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800e9c6:	69b9      	ldr	r1, [r7, #24]
 800e9c8:	69fa      	ldr	r2, [r7, #28]
 800e9ca:	e841 2300 	strex	r3, r2, [r1]
 800e9ce:	617b      	str	r3, [r7, #20]
   return(result);
 800e9d0:	697b      	ldr	r3, [r7, #20]
 800e9d2:	2b00      	cmp	r3, #0
 800e9d4:	d1e5      	bne.n	800e9a2 <UART_CheckIdleState+0xde>

      huart->RxState = HAL_UART_STATE_READY;
 800e9d6:	687b      	ldr	r3, [r7, #4]
 800e9d8:	2220      	movs	r2, #32
 800e9da:	f8c3 208c 	str.w	r2, [r3, #140]	@ 0x8c

      __HAL_UNLOCK(huart);
 800e9de:	687b      	ldr	r3, [r7, #4]
 800e9e0:	2200      	movs	r2, #0
 800e9e2:	f883 2084 	strb.w	r2, [r3, #132]	@ 0x84

      /* Timeout occurred */
      return HAL_TIMEOUT;
 800e9e6:	2303      	movs	r3, #3
 800e9e8:	e012      	b.n	800ea10 <UART_CheckIdleState+0x14c>
    }
  }

  /* Initialize the UART State */
  huart->gState = HAL_UART_STATE_READY;
 800e9ea:	687b      	ldr	r3, [r7, #4]
 800e9ec:	2220      	movs	r2, #32
 800e9ee:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88
  huart->RxState = HAL_UART_STATE_READY;
 800e9f2:	687b      	ldr	r3, [r7, #4]
 800e9f4:	2220      	movs	r2, #32
 800e9f6:	f8c3 208c 	str.w	r2, [r3, #140]	@ 0x8c
  huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
 800e9fa:	687b      	ldr	r3, [r7, #4]
 800e9fc:	2200      	movs	r2, #0
 800e9fe:	66da      	str	r2, [r3, #108]	@ 0x6c
  huart->RxEventType = HAL_UART_RXEVENT_TC;
 800ea00:	687b      	ldr	r3, [r7, #4]
 800ea02:	2200      	movs	r2, #0
 800ea04:	671a      	str	r2, [r3, #112]	@ 0x70

  __HAL_UNLOCK(huart);
 800ea06:	687b      	ldr	r3, [r7, #4]
 800ea08:	2200      	movs	r2, #0
 800ea0a:	f883 2084 	strb.w	r2, [r3, #132]	@ 0x84

  return HAL_OK;
 800ea0e:	2300      	movs	r3, #0
}
 800ea10:	4618      	mov	r0, r3
 800ea12:	3758      	adds	r7, #88	@ 0x58
 800ea14:	46bd      	mov	sp, r7
 800ea16:	bd80      	pop	{r7, pc}

0800ea18 <UART_WaitOnFlagUntilTimeout>:
  * @param Timeout   Timeout duration
  * @retval HAL status
  */
HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status,
                                              uint32_t Tickstart, uint32_t Timeout)
{
 800ea18:	b580      	push	{r7, lr}
 800ea1a:	b084      	sub	sp, #16
 800ea1c:	af00      	add	r7, sp, #0
 800ea1e:	60f8      	str	r0, [r7, #12]
 800ea20:	60b9      	str	r1, [r7, #8]
 800ea22:	603b      	str	r3, [r7, #0]
 800ea24:	4613      	mov	r3, r2
 800ea26:	71fb      	strb	r3, [r7, #7]
  /* Wait until flag is set */
  while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
 800ea28:	e04f      	b.n	800eaca <UART_WaitOnFlagUntilTimeout+0xb2>
  {
    /* Check for the Timeout */
    if (Timeout != HAL_MAX_DELAY)
 800ea2a:	69bb      	ldr	r3, [r7, #24]
 800ea2c:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 800ea30:	d04b      	beq.n	800eaca <UART_WaitOnFlagUntilTimeout+0xb2>
    {
      if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
 800ea32:	f7f6 fc05 	bl	8005240 <HAL_GetTick>
 800ea36:	4602      	mov	r2, r0
 800ea38:	683b      	ldr	r3, [r7, #0]
 800ea3a:	1ad3      	subs	r3, r2, r3
 800ea3c:	69ba      	ldr	r2, [r7, #24]
 800ea3e:	429a      	cmp	r2, r3
 800ea40:	d302      	bcc.n	800ea48 <UART_WaitOnFlagUntilTimeout+0x30>
 800ea42:	69bb      	ldr	r3, [r7, #24]
 800ea44:	2b00      	cmp	r3, #0
 800ea46:	d101      	bne.n	800ea4c <UART_WaitOnFlagUntilTimeout+0x34>
      {

        return HAL_TIMEOUT;
 800ea48:	2303      	movs	r3, #3
 800ea4a:	e04e      	b.n	800eaea <UART_WaitOnFlagUntilTimeout+0xd2>
      }

      if ((READ_BIT(huart->Instance->CR1, USART_CR1_RE) != 0U) && (Flag != UART_FLAG_TXE) && (Flag != UART_FLAG_TC))
 800ea4c:	68fb      	ldr	r3, [r7, #12]
 800ea4e:	681b      	ldr	r3, [r3, #0]
 800ea50:	681b      	ldr	r3, [r3, #0]
 800ea52:	f003 0304 	and.w	r3, r3, #4
 800ea56:	2b00      	cmp	r3, #0
 800ea58:	d037      	beq.n	800eaca <UART_WaitOnFlagUntilTimeout+0xb2>
 800ea5a:	68bb      	ldr	r3, [r7, #8]
 800ea5c:	2b80      	cmp	r3, #128	@ 0x80
 800ea5e:	d034      	beq.n	800eaca <UART_WaitOnFlagUntilTimeout+0xb2>
 800ea60:	68bb      	ldr	r3, [r7, #8]
 800ea62:	2b40      	cmp	r3, #64	@ 0x40
 800ea64:	d031      	beq.n	800eaca <UART_WaitOnFlagUntilTimeout+0xb2>
      {
        if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) == SET)
 800ea66:	68fb      	ldr	r3, [r7, #12]
 800ea68:	681b      	ldr	r3, [r3, #0]
 800ea6a:	69db      	ldr	r3, [r3, #28]
 800ea6c:	f003 0308 	and.w	r3, r3, #8
 800ea70:	2b08      	cmp	r3, #8
 800ea72:	d110      	bne.n	800ea96 <UART_WaitOnFlagUntilTimeout+0x7e>
        {
          /* Clear Overrun Error flag*/
          __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF);
 800ea74:	68fb      	ldr	r3, [r7, #12]
 800ea76:	681b      	ldr	r3, [r3, #0]
 800ea78:	2208      	movs	r2, #8
 800ea7a:	621a      	str	r2, [r3, #32]

          /* Blocking error : transfer is aborted
          Set the UART state ready to be able to start again the process,
          Disable Rx Interrupts if ongoing */
          UART_EndRxTransfer(huart);
 800ea7c:	68f8      	ldr	r0, [r7, #12]
 800ea7e:	f000 f95b 	bl	800ed38 <UART_EndRxTransfer>

          huart->ErrorCode = HAL_UART_ERROR_ORE;
 800ea82:	68fb      	ldr	r3, [r7, #12]
 800ea84:	2208      	movs	r2, #8
 800ea86:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90

          /* Process Unlocked */
          __HAL_UNLOCK(huart);
 800ea8a:	68fb      	ldr	r3, [r7, #12]
 800ea8c:	2200      	movs	r2, #0
 800ea8e:	f883 2084 	strb.w	r2, [r3, #132]	@ 0x84

          return HAL_ERROR;
 800ea92:	2301      	movs	r3, #1
 800ea94:	e029      	b.n	800eaea <UART_WaitOnFlagUntilTimeout+0xd2>
        }
        if (__HAL_UART_GET_FLAG(huart, UART_FLAG_RTOF) == SET)
 800ea96:	68fb      	ldr	r3, [r7, #12]
 800ea98:	681b      	ldr	r3, [r3, #0]
 800ea9a:	69db      	ldr	r3, [r3, #28]
 800ea9c:	f403 6300 	and.w	r3, r3, #2048	@ 0x800
 800eaa0:	f5b3 6f00 	cmp.w	r3, #2048	@ 0x800
 800eaa4:	d111      	bne.n	800eaca <UART_WaitOnFlagUntilTimeout+0xb2>
        {
          /* Clear Receiver Timeout flag*/
          __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_RTOF);
 800eaa6:	68fb      	ldr	r3, [r7, #12]
 800eaa8:	681b      	ldr	r3, [r3, #0]
 800eaaa:	f44f 6200 	mov.w	r2, #2048	@ 0x800
 800eaae:	621a      	str	r2, [r3, #32]

          /* Blocking error : transfer is aborted
          Set the UART state ready to be able to start again the process,
          Disable Rx Interrupts if ongoing */
          UART_EndRxTransfer(huart);
 800eab0:	68f8      	ldr	r0, [r7, #12]
 800eab2:	f000 f941 	bl	800ed38 <UART_EndRxTransfer>

          huart->ErrorCode = HAL_UART_ERROR_RTO;
 800eab6:	68fb      	ldr	r3, [r7, #12]
 800eab8:	2220      	movs	r2, #32
 800eaba:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90

          /* Process Unlocked */
          __HAL_UNLOCK(huart);
 800eabe:	68fb      	ldr	r3, [r7, #12]
 800eac0:	2200      	movs	r2, #0
 800eac2:	f883 2084 	strb.w	r2, [r3, #132]	@ 0x84

          return HAL_TIMEOUT;
 800eac6:	2303      	movs	r3, #3
 800eac8:	e00f      	b.n	800eaea <UART_WaitOnFlagUntilTimeout+0xd2>
  while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
 800eaca:	68fb      	ldr	r3, [r7, #12]
 800eacc:	681b      	ldr	r3, [r3, #0]
 800eace:	69da      	ldr	r2, [r3, #28]
 800ead0:	68bb      	ldr	r3, [r7, #8]
 800ead2:	4013      	ands	r3, r2
 800ead4:	68ba      	ldr	r2, [r7, #8]
 800ead6:	429a      	cmp	r2, r3
 800ead8:	bf0c      	ite	eq
 800eada:	2301      	moveq	r3, #1
 800eadc:	2300      	movne	r3, #0
 800eade:	b2db      	uxtb	r3, r3
 800eae0:	461a      	mov	r2, r3
 800eae2:	79fb      	ldrb	r3, [r7, #7]
 800eae4:	429a      	cmp	r2, r3
 800eae6:	d0a0      	beq.n	800ea2a <UART_WaitOnFlagUntilTimeout+0x12>
        }
      }
    }
  }
  return HAL_OK;
 800eae8:	2300      	movs	r3, #0
}
 800eaea:	4618      	mov	r0, r3
 800eaec:	3710      	adds	r7, #16
 800eaee:	46bd      	mov	sp, r7
 800eaf0:	bd80      	pop	{r7, pc}
	...

0800eaf4 <UART_Start_Receive_IT>:
  * @param  pData Pointer to data buffer (u8 or u16 data elements).
  * @param  Size  Amount of data elements (u8 or u16) to be received.
  * @retval HAL status
  */
HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
{
 800eaf4:	b480      	push	{r7}
 800eaf6:	b0a3      	sub	sp, #140	@ 0x8c
 800eaf8:	af00      	add	r7, sp, #0
 800eafa:	60f8      	str	r0, [r7, #12]
 800eafc:	60b9      	str	r1, [r7, #8]
 800eafe:	4613      	mov	r3, r2
 800eb00:	80fb      	strh	r3, [r7, #6]
  huart->pRxBuffPtr  = pData;
 800eb02:	68fb      	ldr	r3, [r7, #12]
 800eb04:	68ba      	ldr	r2, [r7, #8]
 800eb06:	659a      	str	r2, [r3, #88]	@ 0x58
  huart->RxXferSize  = Size;
 800eb08:	68fb      	ldr	r3, [r7, #12]
 800eb0a:	88fa      	ldrh	r2, [r7, #6]
 800eb0c:	f8a3 205c 	strh.w	r2, [r3, #92]	@ 0x5c
  huart->RxXferCount = Size;
 800eb10:	68fb      	ldr	r3, [r7, #12]
 800eb12:	88fa      	ldrh	r2, [r7, #6]
 800eb14:	f8a3 205e 	strh.w	r2, [r3, #94]	@ 0x5e
  huart->RxISR       = NULL;
 800eb18:	68fb      	ldr	r3, [r7, #12]
 800eb1a:	2200      	movs	r2, #0
 800eb1c:	675a      	str	r2, [r3, #116]	@ 0x74

  /* Computation of UART mask to apply to RDR register */
  UART_MASK_COMPUTATION(huart);
 800eb1e:	68fb      	ldr	r3, [r7, #12]
 800eb20:	689b      	ldr	r3, [r3, #8]
 800eb22:	f5b3 5f80 	cmp.w	r3, #4096	@ 0x1000
 800eb26:	d10e      	bne.n	800eb46 <UART_Start_Receive_IT+0x52>
 800eb28:	68fb      	ldr	r3, [r7, #12]
 800eb2a:	691b      	ldr	r3, [r3, #16]
 800eb2c:	2b00      	cmp	r3, #0
 800eb2e:	d105      	bne.n	800eb3c <UART_Start_Receive_IT+0x48>
 800eb30:	68fb      	ldr	r3, [r7, #12]
 800eb32:	f240 12ff 	movw	r2, #511	@ 0x1ff
 800eb36:	f8a3 2060 	strh.w	r2, [r3, #96]	@ 0x60
 800eb3a:	e02d      	b.n	800eb98 <UART_Start_Receive_IT+0xa4>
 800eb3c:	68fb      	ldr	r3, [r7, #12]
 800eb3e:	22ff      	movs	r2, #255	@ 0xff
 800eb40:	f8a3 2060 	strh.w	r2, [r3, #96]	@ 0x60
 800eb44:	e028      	b.n	800eb98 <UART_Start_Receive_IT+0xa4>
 800eb46:	68fb      	ldr	r3, [r7, #12]
 800eb48:	689b      	ldr	r3, [r3, #8]
 800eb4a:	2b00      	cmp	r3, #0
 800eb4c:	d10d      	bne.n	800eb6a <UART_Start_Receive_IT+0x76>
 800eb4e:	68fb      	ldr	r3, [r7, #12]
 800eb50:	691b      	ldr	r3, [r3, #16]
 800eb52:	2b00      	cmp	r3, #0
 800eb54:	d104      	bne.n	800eb60 <UART_Start_Receive_IT+0x6c>
 800eb56:	68fb      	ldr	r3, [r7, #12]
 800eb58:	22ff      	movs	r2, #255	@ 0xff
 800eb5a:	f8a3 2060 	strh.w	r2, [r3, #96]	@ 0x60
 800eb5e:	e01b      	b.n	800eb98 <UART_Start_Receive_IT+0xa4>
 800eb60:	68fb      	ldr	r3, [r7, #12]
 800eb62:	227f      	movs	r2, #127	@ 0x7f
 800eb64:	f8a3 2060 	strh.w	r2, [r3, #96]	@ 0x60
 800eb68:	e016      	b.n	800eb98 <UART_Start_Receive_IT+0xa4>
 800eb6a:	68fb      	ldr	r3, [r7, #12]
 800eb6c:	689b      	ldr	r3, [r3, #8]
 800eb6e:	f1b3 5f80 	cmp.w	r3, #268435456	@ 0x10000000
 800eb72:	d10d      	bne.n	800eb90 <UART_Start_Receive_IT+0x9c>
 800eb74:	68fb      	ldr	r3, [r7, #12]
 800eb76:	691b      	ldr	r3, [r3, #16]
 800eb78:	2b00      	cmp	r3, #0
 800eb7a:	d104      	bne.n	800eb86 <UART_Start_Receive_IT+0x92>
 800eb7c:	68fb      	ldr	r3, [r7, #12]
 800eb7e:	227f      	movs	r2, #127	@ 0x7f
 800eb80:	f8a3 2060 	strh.w	r2, [r3, #96]	@ 0x60
 800eb84:	e008      	b.n	800eb98 <UART_Start_Receive_IT+0xa4>
 800eb86:	68fb      	ldr	r3, [r7, #12]
 800eb88:	223f      	movs	r2, #63	@ 0x3f
 800eb8a:	f8a3 2060 	strh.w	r2, [r3, #96]	@ 0x60
 800eb8e:	e003      	b.n	800eb98 <UART_Start_Receive_IT+0xa4>
 800eb90:	68fb      	ldr	r3, [r7, #12]
 800eb92:	2200      	movs	r2, #0
 800eb94:	f8a3 2060 	strh.w	r2, [r3, #96]	@ 0x60

  huart->ErrorCode = HAL_UART_ERROR_NONE;
 800eb98:	68fb      	ldr	r3, [r7, #12]
 800eb9a:	2200      	movs	r2, #0
 800eb9c:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
  huart->RxState = HAL_UART_STATE_BUSY_RX;
 800eba0:	68fb      	ldr	r3, [r7, #12]
 800eba2:	2222      	movs	r2, #34	@ 0x22
 800eba4:	f8c3 208c 	str.w	r2, [r3, #140]	@ 0x8c

  /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
  ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
 800eba8:	68fb      	ldr	r3, [r7, #12]
 800ebaa:	681b      	ldr	r3, [r3, #0]
 800ebac:	3308      	adds	r3, #8
 800ebae:	667b      	str	r3, [r7, #100]	@ 0x64
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800ebb0:	6e7b      	ldr	r3, [r7, #100]	@ 0x64
 800ebb2:	e853 3f00 	ldrex	r3, [r3]
 800ebb6:	663b      	str	r3, [r7, #96]	@ 0x60
   return(result);
 800ebb8:	6e3b      	ldr	r3, [r7, #96]	@ 0x60
 800ebba:	f043 0301 	orr.w	r3, r3, #1
 800ebbe:	f8c7 3084 	str.w	r3, [r7, #132]	@ 0x84
 800ebc2:	68fb      	ldr	r3, [r7, #12]
 800ebc4:	681b      	ldr	r3, [r3, #0]
 800ebc6:	3308      	adds	r3, #8
 800ebc8:	f8d7 2084 	ldr.w	r2, [r7, #132]	@ 0x84
 800ebcc:	673a      	str	r2, [r7, #112]	@ 0x70
 800ebce:	66fb      	str	r3, [r7, #108]	@ 0x6c
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800ebd0:	6ef9      	ldr	r1, [r7, #108]	@ 0x6c
 800ebd2:	6f3a      	ldr	r2, [r7, #112]	@ 0x70
 800ebd4:	e841 2300 	strex	r3, r2, [r1]
 800ebd8:	66bb      	str	r3, [r7, #104]	@ 0x68
   return(result);
 800ebda:	6ebb      	ldr	r3, [r7, #104]	@ 0x68
 800ebdc:	2b00      	cmp	r3, #0
 800ebde:	d1e3      	bne.n	800eba8 <UART_Start_Receive_IT+0xb4>

  /* Configure Rx interrupt processing */
  if ((huart->FifoMode == UART_FIFOMODE_ENABLE) && (Size >= huart->NbRxDataToProcess))
 800ebe0:	68fb      	ldr	r3, [r7, #12]
 800ebe2:	6e5b      	ldr	r3, [r3, #100]	@ 0x64
 800ebe4:	f1b3 5f00 	cmp.w	r3, #536870912	@ 0x20000000
 800ebe8:	d14f      	bne.n	800ec8a <UART_Start_Receive_IT+0x196>
 800ebea:	68fb      	ldr	r3, [r7, #12]
 800ebec:	f8b3 3068 	ldrh.w	r3, [r3, #104]	@ 0x68
 800ebf0:	88fa      	ldrh	r2, [r7, #6]
 800ebf2:	429a      	cmp	r2, r3
 800ebf4:	d349      	bcc.n	800ec8a <UART_Start_Receive_IT+0x196>
  {
    /* Set the Rx ISR function pointer according to the data word length */
    if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
 800ebf6:	68fb      	ldr	r3, [r7, #12]
 800ebf8:	689b      	ldr	r3, [r3, #8]
 800ebfa:	f5b3 5f80 	cmp.w	r3, #4096	@ 0x1000
 800ebfe:	d107      	bne.n	800ec10 <UART_Start_Receive_IT+0x11c>
 800ec00:	68fb      	ldr	r3, [r7, #12]
 800ec02:	691b      	ldr	r3, [r3, #16]
 800ec04:	2b00      	cmp	r3, #0
 800ec06:	d103      	bne.n	800ec10 <UART_Start_Receive_IT+0x11c>
    {
      huart->RxISR = UART_RxISR_16BIT_FIFOEN;
 800ec08:	68fb      	ldr	r3, [r7, #12]
 800ec0a:	4a47      	ldr	r2, [pc, #284]	@ (800ed28 <UART_Start_Receive_IT+0x234>)
 800ec0c:	675a      	str	r2, [r3, #116]	@ 0x74
 800ec0e:	e002      	b.n	800ec16 <UART_Start_Receive_IT+0x122>
    }
    else
    {
      huart->RxISR = UART_RxISR_8BIT_FIFOEN;
 800ec10:	68fb      	ldr	r3, [r7, #12]
 800ec12:	4a46      	ldr	r2, [pc, #280]	@ (800ed2c <UART_Start_Receive_IT+0x238>)
 800ec14:	675a      	str	r2, [r3, #116]	@ 0x74
    }

    /* Enable the UART Parity Error interrupt and RX FIFO Threshold interrupt */
    if (huart->Init.Parity != UART_PARITY_NONE)
 800ec16:	68fb      	ldr	r3, [r7, #12]
 800ec18:	691b      	ldr	r3, [r3, #16]
 800ec1a:	2b00      	cmp	r3, #0
 800ec1c:	d01a      	beq.n	800ec54 <UART_Start_Receive_IT+0x160>
    {
      ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_PEIE);
 800ec1e:	68fb      	ldr	r3, [r7, #12]
 800ec20:	681b      	ldr	r3, [r3, #0]
 800ec22:	653b      	str	r3, [r7, #80]	@ 0x50
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800ec24:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 800ec26:	e853 3f00 	ldrex	r3, [r3]
 800ec2a:	64fb      	str	r3, [r7, #76]	@ 0x4c
   return(result);
 800ec2c:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 800ec2e:	f443 7380 	orr.w	r3, r3, #256	@ 0x100
 800ec32:	f8c7 3080 	str.w	r3, [r7, #128]	@ 0x80
 800ec36:	68fb      	ldr	r3, [r7, #12]
 800ec38:	681b      	ldr	r3, [r3, #0]
 800ec3a:	461a      	mov	r2, r3
 800ec3c:	f8d7 3080 	ldr.w	r3, [r7, #128]	@ 0x80
 800ec40:	65fb      	str	r3, [r7, #92]	@ 0x5c
 800ec42:	65ba      	str	r2, [r7, #88]	@ 0x58
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800ec44:	6db9      	ldr	r1, [r7, #88]	@ 0x58
 800ec46:	6dfa      	ldr	r2, [r7, #92]	@ 0x5c
 800ec48:	e841 2300 	strex	r3, r2, [r1]
 800ec4c:	657b      	str	r3, [r7, #84]	@ 0x54
   return(result);
 800ec4e:	6d7b      	ldr	r3, [r7, #84]	@ 0x54
 800ec50:	2b00      	cmp	r3, #0
 800ec52:	d1e4      	bne.n	800ec1e <UART_Start_Receive_IT+0x12a>
    }
    ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_RXFTIE);
 800ec54:	68fb      	ldr	r3, [r7, #12]
 800ec56:	681b      	ldr	r3, [r3, #0]
 800ec58:	3308      	adds	r3, #8
 800ec5a:	63fb      	str	r3, [r7, #60]	@ 0x3c
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800ec5c:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800ec5e:	e853 3f00 	ldrex	r3, [r3]
 800ec62:	63bb      	str	r3, [r7, #56]	@ 0x38
   return(result);
 800ec64:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800ec66:	f043 5380 	orr.w	r3, r3, #268435456	@ 0x10000000
 800ec6a:	67fb      	str	r3, [r7, #124]	@ 0x7c
 800ec6c:	68fb      	ldr	r3, [r7, #12]
 800ec6e:	681b      	ldr	r3, [r3, #0]
 800ec70:	3308      	adds	r3, #8
 800ec72:	6ffa      	ldr	r2, [r7, #124]	@ 0x7c
 800ec74:	64ba      	str	r2, [r7, #72]	@ 0x48
 800ec76:	647b      	str	r3, [r7, #68]	@ 0x44
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800ec78:	6c79      	ldr	r1, [r7, #68]	@ 0x44
 800ec7a:	6cba      	ldr	r2, [r7, #72]	@ 0x48
 800ec7c:	e841 2300 	strex	r3, r2, [r1]
 800ec80:	643b      	str	r3, [r7, #64]	@ 0x40
   return(result);
 800ec82:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 800ec84:	2b00      	cmp	r3, #0
 800ec86:	d1e5      	bne.n	800ec54 <UART_Start_Receive_IT+0x160>
 800ec88:	e046      	b.n	800ed18 <UART_Start_Receive_IT+0x224>
  }
  else
  {
    /* Set the Rx ISR function pointer according to the data word length */
    if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
 800ec8a:	68fb      	ldr	r3, [r7, #12]
 800ec8c:	689b      	ldr	r3, [r3, #8]
 800ec8e:	f5b3 5f80 	cmp.w	r3, #4096	@ 0x1000
 800ec92:	d107      	bne.n	800eca4 <UART_Start_Receive_IT+0x1b0>
 800ec94:	68fb      	ldr	r3, [r7, #12]
 800ec96:	691b      	ldr	r3, [r3, #16]
 800ec98:	2b00      	cmp	r3, #0
 800ec9a:	d103      	bne.n	800eca4 <UART_Start_Receive_IT+0x1b0>
    {
      huart->RxISR = UART_RxISR_16BIT;
 800ec9c:	68fb      	ldr	r3, [r7, #12]
 800ec9e:	4a24      	ldr	r2, [pc, #144]	@ (800ed30 <UART_Start_Receive_IT+0x23c>)
 800eca0:	675a      	str	r2, [r3, #116]	@ 0x74
 800eca2:	e002      	b.n	800ecaa <UART_Start_Receive_IT+0x1b6>
    }
    else
    {
      huart->RxISR = UART_RxISR_8BIT;
 800eca4:	68fb      	ldr	r3, [r7, #12]
 800eca6:	4a23      	ldr	r2, [pc, #140]	@ (800ed34 <UART_Start_Receive_IT+0x240>)
 800eca8:	675a      	str	r2, [r3, #116]	@ 0x74
    }

    /* Enable the UART Parity Error interrupt and Data Register Not Empty interrupt */
    if (huart->Init.Parity != UART_PARITY_NONE)
 800ecaa:	68fb      	ldr	r3, [r7, #12]
 800ecac:	691b      	ldr	r3, [r3, #16]
 800ecae:	2b00      	cmp	r3, #0
 800ecb0:	d019      	beq.n	800ece6 <UART_Start_Receive_IT+0x1f2>
    {
      ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE_RXFNEIE);
 800ecb2:	68fb      	ldr	r3, [r7, #12]
 800ecb4:	681b      	ldr	r3, [r3, #0]
 800ecb6:	62bb      	str	r3, [r7, #40]	@ 0x28
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800ecb8:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 800ecba:	e853 3f00 	ldrex	r3, [r3]
 800ecbe:	627b      	str	r3, [r7, #36]	@ 0x24
   return(result);
 800ecc0:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800ecc2:	f443 7390 	orr.w	r3, r3, #288	@ 0x120
 800ecc6:	677b      	str	r3, [r7, #116]	@ 0x74
 800ecc8:	68fb      	ldr	r3, [r7, #12]
 800ecca:	681b      	ldr	r3, [r3, #0]
 800eccc:	461a      	mov	r2, r3
 800ecce:	6f7b      	ldr	r3, [r7, #116]	@ 0x74
 800ecd0:	637b      	str	r3, [r7, #52]	@ 0x34
 800ecd2:	633a      	str	r2, [r7, #48]	@ 0x30
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800ecd4:	6b39      	ldr	r1, [r7, #48]	@ 0x30
 800ecd6:	6b7a      	ldr	r2, [r7, #52]	@ 0x34
 800ecd8:	e841 2300 	strex	r3, r2, [r1]
 800ecdc:	62fb      	str	r3, [r7, #44]	@ 0x2c
   return(result);
 800ecde:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 800ece0:	2b00      	cmp	r3, #0
 800ece2:	d1e6      	bne.n	800ecb2 <UART_Start_Receive_IT+0x1be>
 800ece4:	e018      	b.n	800ed18 <UART_Start_Receive_IT+0x224>
    }
    else
    {
      ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE);
 800ece6:	68fb      	ldr	r3, [r7, #12]
 800ece8:	681b      	ldr	r3, [r3, #0]
 800ecea:	617b      	str	r3, [r7, #20]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800ecec:	697b      	ldr	r3, [r7, #20]
 800ecee:	e853 3f00 	ldrex	r3, [r3]
 800ecf2:	613b      	str	r3, [r7, #16]
   return(result);
 800ecf4:	693b      	ldr	r3, [r7, #16]
 800ecf6:	f043 0320 	orr.w	r3, r3, #32
 800ecfa:	67bb      	str	r3, [r7, #120]	@ 0x78
 800ecfc:	68fb      	ldr	r3, [r7, #12]
 800ecfe:	681b      	ldr	r3, [r3, #0]
 800ed00:	461a      	mov	r2, r3
 800ed02:	6fbb      	ldr	r3, [r7, #120]	@ 0x78
 800ed04:	623b      	str	r3, [r7, #32]
 800ed06:	61fa      	str	r2, [r7, #28]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800ed08:	69f9      	ldr	r1, [r7, #28]
 800ed0a:	6a3a      	ldr	r2, [r7, #32]
 800ed0c:	e841 2300 	strex	r3, r2, [r1]
 800ed10:	61bb      	str	r3, [r7, #24]
   return(result);
 800ed12:	69bb      	ldr	r3, [r7, #24]
 800ed14:	2b00      	cmp	r3, #0
 800ed16:	d1e6      	bne.n	800ece6 <UART_Start_Receive_IT+0x1f2>
    }
  }
  return HAL_OK;
 800ed18:	2300      	movs	r3, #0
}
 800ed1a:	4618      	mov	r0, r3
 800ed1c:	378c      	adds	r7, #140	@ 0x8c
 800ed1e:	46bd      	mov	sp, r7
 800ed20:	f85d 7b04 	ldr.w	r7, [sp], #4
 800ed24:	4770      	bx	lr
 800ed26:	bf00      	nop
 800ed28:	0800f89d 	.word	0x0800f89d
 800ed2c:	0800f53d 	.word	0x0800f53d
 800ed30:	0800f385 	.word	0x0800f385
 800ed34:	0800f1cd 	.word	0x0800f1cd

0800ed38 <UART_EndRxTransfer>:
  * @brief  End ongoing Rx transfer on UART peripheral (following error detection or Reception completion).
  * @param  huart UART handle.
  * @retval None
  */
static void UART_EndRxTransfer(UART_HandleTypeDef *huart)
{
 800ed38:	b480      	push	{r7}
 800ed3a:	b095      	sub	sp, #84	@ 0x54
 800ed3c:	af00      	add	r7, sp, #0
 800ed3e:	6078      	str	r0, [r7, #4]
  /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
  ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
 800ed40:	687b      	ldr	r3, [r7, #4]
 800ed42:	681b      	ldr	r3, [r3, #0]
 800ed44:	637b      	str	r3, [r7, #52]	@ 0x34
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800ed46:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 800ed48:	e853 3f00 	ldrex	r3, [r3]
 800ed4c:	633b      	str	r3, [r7, #48]	@ 0x30
   return(result);
 800ed4e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800ed50:	f423 7390 	bic.w	r3, r3, #288	@ 0x120
 800ed54:	64fb      	str	r3, [r7, #76]	@ 0x4c
 800ed56:	687b      	ldr	r3, [r7, #4]
 800ed58:	681b      	ldr	r3, [r3, #0]
 800ed5a:	461a      	mov	r2, r3
 800ed5c:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 800ed5e:	643b      	str	r3, [r7, #64]	@ 0x40
 800ed60:	63fa      	str	r2, [r7, #60]	@ 0x3c
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800ed62:	6bf9      	ldr	r1, [r7, #60]	@ 0x3c
 800ed64:	6c3a      	ldr	r2, [r7, #64]	@ 0x40
 800ed66:	e841 2300 	strex	r3, r2, [r1]
 800ed6a:	63bb      	str	r3, [r7, #56]	@ 0x38
   return(result);
 800ed6c:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800ed6e:	2b00      	cmp	r3, #0
 800ed70:	d1e6      	bne.n	800ed40 <UART_EndRxTransfer+0x8>
  ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
 800ed72:	687b      	ldr	r3, [r7, #4]
 800ed74:	681b      	ldr	r3, [r3, #0]
 800ed76:	3308      	adds	r3, #8
 800ed78:	623b      	str	r3, [r7, #32]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800ed7a:	6a3b      	ldr	r3, [r7, #32]
 800ed7c:	e853 3f00 	ldrex	r3, [r3]
 800ed80:	61fb      	str	r3, [r7, #28]
   return(result);
 800ed82:	69fa      	ldr	r2, [r7, #28]
 800ed84:	4b1e      	ldr	r3, [pc, #120]	@ (800ee00 <UART_EndRxTransfer+0xc8>)
 800ed86:	4013      	ands	r3, r2
 800ed88:	64bb      	str	r3, [r7, #72]	@ 0x48
 800ed8a:	687b      	ldr	r3, [r7, #4]
 800ed8c:	681b      	ldr	r3, [r3, #0]
 800ed8e:	3308      	adds	r3, #8
 800ed90:	6cba      	ldr	r2, [r7, #72]	@ 0x48
 800ed92:	62fa      	str	r2, [r7, #44]	@ 0x2c
 800ed94:	62bb      	str	r3, [r7, #40]	@ 0x28
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800ed96:	6ab9      	ldr	r1, [r7, #40]	@ 0x28
 800ed98:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 800ed9a:	e841 2300 	strex	r3, r2, [r1]
 800ed9e:	627b      	str	r3, [r7, #36]	@ 0x24
   return(result);
 800eda0:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800eda2:	2b00      	cmp	r3, #0
 800eda4:	d1e5      	bne.n	800ed72 <UART_EndRxTransfer+0x3a>

  /* In case of reception waiting for IDLE event, disable also the IDLE IE interrupt source */
  if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
 800eda6:	687b      	ldr	r3, [r7, #4]
 800eda8:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 800edaa:	2b01      	cmp	r3, #1
 800edac:	d118      	bne.n	800ede0 <UART_EndRxTransfer+0xa8>
  {
    ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
 800edae:	687b      	ldr	r3, [r7, #4]
 800edb0:	681b      	ldr	r3, [r3, #0]
 800edb2:	60fb      	str	r3, [r7, #12]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800edb4:	68fb      	ldr	r3, [r7, #12]
 800edb6:	e853 3f00 	ldrex	r3, [r3]
 800edba:	60bb      	str	r3, [r7, #8]
   return(result);
 800edbc:	68bb      	ldr	r3, [r7, #8]
 800edbe:	f023 0310 	bic.w	r3, r3, #16
 800edc2:	647b      	str	r3, [r7, #68]	@ 0x44
 800edc4:	687b      	ldr	r3, [r7, #4]
 800edc6:	681b      	ldr	r3, [r3, #0]
 800edc8:	461a      	mov	r2, r3
 800edca:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 800edcc:	61bb      	str	r3, [r7, #24]
 800edce:	617a      	str	r2, [r7, #20]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800edd0:	6979      	ldr	r1, [r7, #20]
 800edd2:	69ba      	ldr	r2, [r7, #24]
 800edd4:	e841 2300 	strex	r3, r2, [r1]
 800edd8:	613b      	str	r3, [r7, #16]
   return(result);
 800edda:	693b      	ldr	r3, [r7, #16]
 800eddc:	2b00      	cmp	r3, #0
 800edde:	d1e6      	bne.n	800edae <UART_EndRxTransfer+0x76>
  }

  /* At end of Rx process, restore huart->RxState to Ready */
  huart->RxState = HAL_UART_STATE_READY;
 800ede0:	687b      	ldr	r3, [r7, #4]
 800ede2:	2220      	movs	r2, #32
 800ede4:	f8c3 208c 	str.w	r2, [r3, #140]	@ 0x8c
  huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
 800ede8:	687b      	ldr	r3, [r7, #4]
 800edea:	2200      	movs	r2, #0
 800edec:	66da      	str	r2, [r3, #108]	@ 0x6c

  /* Reset RxIsr function pointer */
  huart->RxISR = NULL;
 800edee:	687b      	ldr	r3, [r7, #4]
 800edf0:	2200      	movs	r2, #0
 800edf2:	675a      	str	r2, [r3, #116]	@ 0x74
}
 800edf4:	bf00      	nop
 800edf6:	3754      	adds	r7, #84	@ 0x54
 800edf8:	46bd      	mov	sp, r7
 800edfa:	f85d 7b04 	ldr.w	r7, [sp], #4
 800edfe:	4770      	bx	lr
 800ee00:	effffffe 	.word	0xeffffffe

0800ee04 <UART_DMAAbortOnError>:
  *         (To be called at end of DMA Abort procedure following error occurrence).
  * @param  hdma DMA handle.
  * @retval None
  */
static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma)
{
 800ee04:	b580      	push	{r7, lr}
 800ee06:	b084      	sub	sp, #16
 800ee08:	af00      	add	r7, sp, #0
 800ee0a:	6078      	str	r0, [r7, #4]
  UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
 800ee0c:	687b      	ldr	r3, [r7, #4]
 800ee0e:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 800ee10:	60fb      	str	r3, [r7, #12]
  huart->RxXferCount = 0U;
 800ee12:	68fb      	ldr	r3, [r7, #12]
 800ee14:	2200      	movs	r2, #0
 800ee16:	f8a3 205e 	strh.w	r2, [r3, #94]	@ 0x5e
  huart->TxXferCount = 0U;
 800ee1a:	68fb      	ldr	r3, [r7, #12]
 800ee1c:	2200      	movs	r2, #0
 800ee1e:	f8a3 2056 	strh.w	r2, [r3, #86]	@ 0x56
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
  /*Call registered error callback*/
  huart->ErrorCallback(huart);
#else
  /*Call legacy weak error callback*/
  HAL_UART_ErrorCallback(huart);
 800ee22:	68f8      	ldr	r0, [r7, #12]
 800ee24:	f7fe ff3a 	bl	800dc9c <HAL_UART_ErrorCallback>
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
}
 800ee28:	bf00      	nop
 800ee2a:	3710      	adds	r7, #16
 800ee2c:	46bd      	mov	sp, r7
 800ee2e:	bd80      	pop	{r7, pc}

0800ee30 <UART_TxISR_8BIT>:
  *         interruptions have been enabled by HAL_UART_Transmit_IT().
  * @param huart UART handle.
  * @retval None
  */
static void UART_TxISR_8BIT(UART_HandleTypeDef *huart)
{
 800ee30:	b480      	push	{r7}
 800ee32:	b08f      	sub	sp, #60	@ 0x3c
 800ee34:	af00      	add	r7, sp, #0
 800ee36:	6078      	str	r0, [r7, #4]
  /* Check that a Tx process is ongoing */
  if (huart->gState == HAL_UART_STATE_BUSY_TX)
 800ee38:	687b      	ldr	r3, [r7, #4]
 800ee3a:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 800ee3e:	2b21      	cmp	r3, #33	@ 0x21
 800ee40:	d14c      	bne.n	800eedc <UART_TxISR_8BIT+0xac>
  {
    if (huart->TxXferCount == 0U)
 800ee42:	687b      	ldr	r3, [r7, #4]
 800ee44:	f8b3 3056 	ldrh.w	r3, [r3, #86]	@ 0x56
 800ee48:	b29b      	uxth	r3, r3
 800ee4a:	2b00      	cmp	r3, #0
 800ee4c:	d132      	bne.n	800eeb4 <UART_TxISR_8BIT+0x84>
    {
      /* Disable the UART Transmit Data Register Empty Interrupt */
      ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE);
 800ee4e:	687b      	ldr	r3, [r7, #4]
 800ee50:	681b      	ldr	r3, [r3, #0]
 800ee52:	623b      	str	r3, [r7, #32]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800ee54:	6a3b      	ldr	r3, [r7, #32]
 800ee56:	e853 3f00 	ldrex	r3, [r3]
 800ee5a:	61fb      	str	r3, [r7, #28]
   return(result);
 800ee5c:	69fb      	ldr	r3, [r7, #28]
 800ee5e:	f023 0380 	bic.w	r3, r3, #128	@ 0x80
 800ee62:	637b      	str	r3, [r7, #52]	@ 0x34
 800ee64:	687b      	ldr	r3, [r7, #4]
 800ee66:	681b      	ldr	r3, [r3, #0]
 800ee68:	461a      	mov	r2, r3
 800ee6a:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 800ee6c:	62fb      	str	r3, [r7, #44]	@ 0x2c
 800ee6e:	62ba      	str	r2, [r7, #40]	@ 0x28
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800ee70:	6ab9      	ldr	r1, [r7, #40]	@ 0x28
 800ee72:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 800ee74:	e841 2300 	strex	r3, r2, [r1]
 800ee78:	627b      	str	r3, [r7, #36]	@ 0x24
   return(result);
 800ee7a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800ee7c:	2b00      	cmp	r3, #0
 800ee7e:	d1e6      	bne.n	800ee4e <UART_TxISR_8BIT+0x1e>

      /* Enable the UART Transmit Complete Interrupt */
      ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
 800ee80:	687b      	ldr	r3, [r7, #4]
 800ee82:	681b      	ldr	r3, [r3, #0]
 800ee84:	60fb      	str	r3, [r7, #12]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800ee86:	68fb      	ldr	r3, [r7, #12]
 800ee88:	e853 3f00 	ldrex	r3, [r3]
 800ee8c:	60bb      	str	r3, [r7, #8]
   return(result);
 800ee8e:	68bb      	ldr	r3, [r7, #8]
 800ee90:	f043 0340 	orr.w	r3, r3, #64	@ 0x40
 800ee94:	633b      	str	r3, [r7, #48]	@ 0x30
 800ee96:	687b      	ldr	r3, [r7, #4]
 800ee98:	681b      	ldr	r3, [r3, #0]
 800ee9a:	461a      	mov	r2, r3
 800ee9c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800ee9e:	61bb      	str	r3, [r7, #24]
 800eea0:	617a      	str	r2, [r7, #20]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800eea2:	6979      	ldr	r1, [r7, #20]
 800eea4:	69ba      	ldr	r2, [r7, #24]
 800eea6:	e841 2300 	strex	r3, r2, [r1]
 800eeaa:	613b      	str	r3, [r7, #16]
   return(result);
 800eeac:	693b      	ldr	r3, [r7, #16]
 800eeae:	2b00      	cmp	r3, #0
 800eeb0:	d1e6      	bne.n	800ee80 <UART_TxISR_8BIT+0x50>
      huart->Instance->TDR = (uint8_t)(*huart->pTxBuffPtr & (uint8_t)0xFF);
      huart->pTxBuffPtr++;
      huart->TxXferCount--;
    }
  }
}
 800eeb2:	e013      	b.n	800eedc <UART_TxISR_8BIT+0xac>
      huart->Instance->TDR = (uint8_t)(*huart->pTxBuffPtr & (uint8_t)0xFF);
 800eeb4:	687b      	ldr	r3, [r7, #4]
 800eeb6:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800eeb8:	781a      	ldrb	r2, [r3, #0]
 800eeba:	687b      	ldr	r3, [r7, #4]
 800eebc:	681b      	ldr	r3, [r3, #0]
 800eebe:	629a      	str	r2, [r3, #40]	@ 0x28
      huart->pTxBuffPtr++;
 800eec0:	687b      	ldr	r3, [r7, #4]
 800eec2:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800eec4:	1c5a      	adds	r2, r3, #1
 800eec6:	687b      	ldr	r3, [r7, #4]
 800eec8:	651a      	str	r2, [r3, #80]	@ 0x50
      huart->TxXferCount--;
 800eeca:	687b      	ldr	r3, [r7, #4]
 800eecc:	f8b3 3056 	ldrh.w	r3, [r3, #86]	@ 0x56
 800eed0:	b29b      	uxth	r3, r3
 800eed2:	3b01      	subs	r3, #1
 800eed4:	b29a      	uxth	r2, r3
 800eed6:	687b      	ldr	r3, [r7, #4]
 800eed8:	f8a3 2056 	strh.w	r2, [r3, #86]	@ 0x56
}
 800eedc:	bf00      	nop
 800eede:	373c      	adds	r7, #60	@ 0x3c
 800eee0:	46bd      	mov	sp, r7
 800eee2:	f85d 7b04 	ldr.w	r7, [sp], #4
 800eee6:	4770      	bx	lr

0800eee8 <UART_TxISR_16BIT>:
  *         interruptions have been enabled by HAL_UART_Transmit_IT().
  * @param huart UART handle.
  * @retval None
  */
static void UART_TxISR_16BIT(UART_HandleTypeDef *huart)
{
 800eee8:	b480      	push	{r7}
 800eeea:	b091      	sub	sp, #68	@ 0x44
 800eeec:	af00      	add	r7, sp, #0
 800eeee:	6078      	str	r0, [r7, #4]
  const uint16_t *tmp;

  /* Check that a Tx process is ongoing */
  if (huart->gState == HAL_UART_STATE_BUSY_TX)
 800eef0:	687b      	ldr	r3, [r7, #4]
 800eef2:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 800eef6:	2b21      	cmp	r3, #33	@ 0x21
 800eef8:	d151      	bne.n	800ef9e <UART_TxISR_16BIT+0xb6>
  {
    if (huart->TxXferCount == 0U)
 800eefa:	687b      	ldr	r3, [r7, #4]
 800eefc:	f8b3 3056 	ldrh.w	r3, [r3, #86]	@ 0x56
 800ef00:	b29b      	uxth	r3, r3
 800ef02:	2b00      	cmp	r3, #0
 800ef04:	d132      	bne.n	800ef6c <UART_TxISR_16BIT+0x84>
    {
      /* Disable the UART Transmit Data Register Empty Interrupt */
      ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE);
 800ef06:	687b      	ldr	r3, [r7, #4]
 800ef08:	681b      	ldr	r3, [r3, #0]
 800ef0a:	627b      	str	r3, [r7, #36]	@ 0x24
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800ef0c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800ef0e:	e853 3f00 	ldrex	r3, [r3]
 800ef12:	623b      	str	r3, [r7, #32]
   return(result);
 800ef14:	6a3b      	ldr	r3, [r7, #32]
 800ef16:	f023 0380 	bic.w	r3, r3, #128	@ 0x80
 800ef1a:	63bb      	str	r3, [r7, #56]	@ 0x38
 800ef1c:	687b      	ldr	r3, [r7, #4]
 800ef1e:	681b      	ldr	r3, [r3, #0]
 800ef20:	461a      	mov	r2, r3
 800ef22:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800ef24:	633b      	str	r3, [r7, #48]	@ 0x30
 800ef26:	62fa      	str	r2, [r7, #44]	@ 0x2c
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800ef28:	6af9      	ldr	r1, [r7, #44]	@ 0x2c
 800ef2a:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 800ef2c:	e841 2300 	strex	r3, r2, [r1]
 800ef30:	62bb      	str	r3, [r7, #40]	@ 0x28
   return(result);
 800ef32:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 800ef34:	2b00      	cmp	r3, #0
 800ef36:	d1e6      	bne.n	800ef06 <UART_TxISR_16BIT+0x1e>

      /* Enable the UART Transmit Complete Interrupt */
      ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
 800ef38:	687b      	ldr	r3, [r7, #4]
 800ef3a:	681b      	ldr	r3, [r3, #0]
 800ef3c:	613b      	str	r3, [r7, #16]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800ef3e:	693b      	ldr	r3, [r7, #16]
 800ef40:	e853 3f00 	ldrex	r3, [r3]
 800ef44:	60fb      	str	r3, [r7, #12]
   return(result);
 800ef46:	68fb      	ldr	r3, [r7, #12]
 800ef48:	f043 0340 	orr.w	r3, r3, #64	@ 0x40
 800ef4c:	637b      	str	r3, [r7, #52]	@ 0x34
 800ef4e:	687b      	ldr	r3, [r7, #4]
 800ef50:	681b      	ldr	r3, [r3, #0]
 800ef52:	461a      	mov	r2, r3
 800ef54:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 800ef56:	61fb      	str	r3, [r7, #28]
 800ef58:	61ba      	str	r2, [r7, #24]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800ef5a:	69b9      	ldr	r1, [r7, #24]
 800ef5c:	69fa      	ldr	r2, [r7, #28]
 800ef5e:	e841 2300 	strex	r3, r2, [r1]
 800ef62:	617b      	str	r3, [r7, #20]
   return(result);
 800ef64:	697b      	ldr	r3, [r7, #20]
 800ef66:	2b00      	cmp	r3, #0
 800ef68:	d1e6      	bne.n	800ef38 <UART_TxISR_16BIT+0x50>
      huart->Instance->TDR = (((uint32_t)(*tmp)) & 0x01FFUL);
      huart->pTxBuffPtr += 2U;
      huart->TxXferCount--;
    }
  }
}
 800ef6a:	e018      	b.n	800ef9e <UART_TxISR_16BIT+0xb6>
      tmp = (const uint16_t *) huart->pTxBuffPtr;
 800ef6c:	687b      	ldr	r3, [r7, #4]
 800ef6e:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800ef70:	63fb      	str	r3, [r7, #60]	@ 0x3c
      huart->Instance->TDR = (((uint32_t)(*tmp)) & 0x01FFUL);
 800ef72:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800ef74:	881b      	ldrh	r3, [r3, #0]
 800ef76:	461a      	mov	r2, r3
 800ef78:	687b      	ldr	r3, [r7, #4]
 800ef7a:	681b      	ldr	r3, [r3, #0]
 800ef7c:	f3c2 0208 	ubfx	r2, r2, #0, #9
 800ef80:	629a      	str	r2, [r3, #40]	@ 0x28
      huart->pTxBuffPtr += 2U;
 800ef82:	687b      	ldr	r3, [r7, #4]
 800ef84:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800ef86:	1c9a      	adds	r2, r3, #2
 800ef88:	687b      	ldr	r3, [r7, #4]
 800ef8a:	651a      	str	r2, [r3, #80]	@ 0x50
      huart->TxXferCount--;
 800ef8c:	687b      	ldr	r3, [r7, #4]
 800ef8e:	f8b3 3056 	ldrh.w	r3, [r3, #86]	@ 0x56
 800ef92:	b29b      	uxth	r3, r3
 800ef94:	3b01      	subs	r3, #1
 800ef96:	b29a      	uxth	r2, r3
 800ef98:	687b      	ldr	r3, [r7, #4]
 800ef9a:	f8a3 2056 	strh.w	r2, [r3, #86]	@ 0x56
}
 800ef9e:	bf00      	nop
 800efa0:	3744      	adds	r7, #68	@ 0x44
 800efa2:	46bd      	mov	sp, r7
 800efa4:	f85d 7b04 	ldr.w	r7, [sp], #4
 800efa8:	4770      	bx	lr

0800efaa <UART_TxISR_8BIT_FIFOEN>:
  *         interruptions have been enabled by HAL_UART_Transmit_IT().
  * @param huart UART handle.
  * @retval None
  */
static void UART_TxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart)
{
 800efaa:	b480      	push	{r7}
 800efac:	b091      	sub	sp, #68	@ 0x44
 800efae:	af00      	add	r7, sp, #0
 800efb0:	6078      	str	r0, [r7, #4]
  uint16_t  nb_tx_data;

  /* Check that a Tx process is ongoing */
  if (huart->gState == HAL_UART_STATE_BUSY_TX)
 800efb2:	687b      	ldr	r3, [r7, #4]
 800efb4:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 800efb8:	2b21      	cmp	r3, #33	@ 0x21
 800efba:	d160      	bne.n	800f07e <UART_TxISR_8BIT_FIFOEN+0xd4>
  {
    for (nb_tx_data = huart->NbTxDataToProcess ; nb_tx_data > 0U ; nb_tx_data--)
 800efbc:	687b      	ldr	r3, [r7, #4]
 800efbe:	f8b3 306a 	ldrh.w	r3, [r3, #106]	@ 0x6a
 800efc2:	87fb      	strh	r3, [r7, #62]	@ 0x3e
 800efc4:	e057      	b.n	800f076 <UART_TxISR_8BIT_FIFOEN+0xcc>
    {
      if (huart->TxXferCount == 0U)
 800efc6:	687b      	ldr	r3, [r7, #4]
 800efc8:	f8b3 3056 	ldrh.w	r3, [r3, #86]	@ 0x56
 800efcc:	b29b      	uxth	r3, r3
 800efce:	2b00      	cmp	r3, #0
 800efd0:	d133      	bne.n	800f03a <UART_TxISR_8BIT_FIFOEN+0x90>
      {
        /* Disable the TX FIFO threshold interrupt */
        ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE);
 800efd2:	687b      	ldr	r3, [r7, #4]
 800efd4:	681b      	ldr	r3, [r3, #0]
 800efd6:	3308      	adds	r3, #8
 800efd8:	627b      	str	r3, [r7, #36]	@ 0x24
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800efda:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800efdc:	e853 3f00 	ldrex	r3, [r3]
 800efe0:	623b      	str	r3, [r7, #32]
   return(result);
 800efe2:	6a3b      	ldr	r3, [r7, #32]
 800efe4:	f423 0300 	bic.w	r3, r3, #8388608	@ 0x800000
 800efe8:	63bb      	str	r3, [r7, #56]	@ 0x38
 800efea:	687b      	ldr	r3, [r7, #4]
 800efec:	681b      	ldr	r3, [r3, #0]
 800efee:	3308      	adds	r3, #8
 800eff0:	6bba      	ldr	r2, [r7, #56]	@ 0x38
 800eff2:	633a      	str	r2, [r7, #48]	@ 0x30
 800eff4:	62fb      	str	r3, [r7, #44]	@ 0x2c
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800eff6:	6af9      	ldr	r1, [r7, #44]	@ 0x2c
 800eff8:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 800effa:	e841 2300 	strex	r3, r2, [r1]
 800effe:	62bb      	str	r3, [r7, #40]	@ 0x28
   return(result);
 800f000:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 800f002:	2b00      	cmp	r3, #0
 800f004:	d1e5      	bne.n	800efd2 <UART_TxISR_8BIT_FIFOEN+0x28>

        /* Enable the UART Transmit Complete Interrupt */
        ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
 800f006:	687b      	ldr	r3, [r7, #4]
 800f008:	681b      	ldr	r3, [r3, #0]
 800f00a:	613b      	str	r3, [r7, #16]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f00c:	693b      	ldr	r3, [r7, #16]
 800f00e:	e853 3f00 	ldrex	r3, [r3]
 800f012:	60fb      	str	r3, [r7, #12]
   return(result);
 800f014:	68fb      	ldr	r3, [r7, #12]
 800f016:	f043 0340 	orr.w	r3, r3, #64	@ 0x40
 800f01a:	637b      	str	r3, [r7, #52]	@ 0x34
 800f01c:	687b      	ldr	r3, [r7, #4]
 800f01e:	681b      	ldr	r3, [r3, #0]
 800f020:	461a      	mov	r2, r3
 800f022:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 800f024:	61fb      	str	r3, [r7, #28]
 800f026:	61ba      	str	r2, [r7, #24]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f028:	69b9      	ldr	r1, [r7, #24]
 800f02a:	69fa      	ldr	r2, [r7, #28]
 800f02c:	e841 2300 	strex	r3, r2, [r1]
 800f030:	617b      	str	r3, [r7, #20]
   return(result);
 800f032:	697b      	ldr	r3, [r7, #20]
 800f034:	2b00      	cmp	r3, #0
 800f036:	d1e6      	bne.n	800f006 <UART_TxISR_8BIT_FIFOEN+0x5c>

        break; /* force exit loop */
 800f038:	e021      	b.n	800f07e <UART_TxISR_8BIT_FIFOEN+0xd4>
      }
      else if (READ_BIT(huart->Instance->ISR, USART_ISR_TXE_TXFNF) != 0U)
 800f03a:	687b      	ldr	r3, [r7, #4]
 800f03c:	681b      	ldr	r3, [r3, #0]
 800f03e:	69db      	ldr	r3, [r3, #28]
 800f040:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 800f044:	2b00      	cmp	r3, #0
 800f046:	d013      	beq.n	800f070 <UART_TxISR_8BIT_FIFOEN+0xc6>
      {
        huart->Instance->TDR = (uint8_t)(*huart->pTxBuffPtr & (uint8_t)0xFF);
 800f048:	687b      	ldr	r3, [r7, #4]
 800f04a:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800f04c:	781a      	ldrb	r2, [r3, #0]
 800f04e:	687b      	ldr	r3, [r7, #4]
 800f050:	681b      	ldr	r3, [r3, #0]
 800f052:	629a      	str	r2, [r3, #40]	@ 0x28
        huart->pTxBuffPtr++;
 800f054:	687b      	ldr	r3, [r7, #4]
 800f056:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800f058:	1c5a      	adds	r2, r3, #1
 800f05a:	687b      	ldr	r3, [r7, #4]
 800f05c:	651a      	str	r2, [r3, #80]	@ 0x50
        huart->TxXferCount--;
 800f05e:	687b      	ldr	r3, [r7, #4]
 800f060:	f8b3 3056 	ldrh.w	r3, [r3, #86]	@ 0x56
 800f064:	b29b      	uxth	r3, r3
 800f066:	3b01      	subs	r3, #1
 800f068:	b29a      	uxth	r2, r3
 800f06a:	687b      	ldr	r3, [r7, #4]
 800f06c:	f8a3 2056 	strh.w	r2, [r3, #86]	@ 0x56
    for (nb_tx_data = huart->NbTxDataToProcess ; nb_tx_data > 0U ; nb_tx_data--)
 800f070:	8ffb      	ldrh	r3, [r7, #62]	@ 0x3e
 800f072:	3b01      	subs	r3, #1
 800f074:	87fb      	strh	r3, [r7, #62]	@ 0x3e
 800f076:	8ffb      	ldrh	r3, [r7, #62]	@ 0x3e
 800f078:	2b00      	cmp	r3, #0
 800f07a:	d1a4      	bne.n	800efc6 <UART_TxISR_8BIT_FIFOEN+0x1c>
      {
        /* Nothing to do */
      }
    }
  }
}
 800f07c:	e7ff      	b.n	800f07e <UART_TxISR_8BIT_FIFOEN+0xd4>
 800f07e:	bf00      	nop
 800f080:	3744      	adds	r7, #68	@ 0x44
 800f082:	46bd      	mov	sp, r7
 800f084:	f85d 7b04 	ldr.w	r7, [sp], #4
 800f088:	4770      	bx	lr

0800f08a <UART_TxISR_16BIT_FIFOEN>:
  *         interruptions have been enabled by HAL_UART_Transmit_IT().
  * @param huart UART handle.
  * @retval None
  */
static void UART_TxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart)
{
 800f08a:	b480      	push	{r7}
 800f08c:	b091      	sub	sp, #68	@ 0x44
 800f08e:	af00      	add	r7, sp, #0
 800f090:	6078      	str	r0, [r7, #4]
  const uint16_t *tmp;
  uint16_t  nb_tx_data;

  /* Check that a Tx process is ongoing */
  if (huart->gState == HAL_UART_STATE_BUSY_TX)
 800f092:	687b      	ldr	r3, [r7, #4]
 800f094:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 800f098:	2b21      	cmp	r3, #33	@ 0x21
 800f09a:	d165      	bne.n	800f168 <UART_TxISR_16BIT_FIFOEN+0xde>
  {
    for (nb_tx_data = huart->NbTxDataToProcess ; nb_tx_data > 0U ; nb_tx_data--)
 800f09c:	687b      	ldr	r3, [r7, #4]
 800f09e:	f8b3 306a 	ldrh.w	r3, [r3, #106]	@ 0x6a
 800f0a2:	87fb      	strh	r3, [r7, #62]	@ 0x3e
 800f0a4:	e05c      	b.n	800f160 <UART_TxISR_16BIT_FIFOEN+0xd6>
    {
      if (huart->TxXferCount == 0U)
 800f0a6:	687b      	ldr	r3, [r7, #4]
 800f0a8:	f8b3 3056 	ldrh.w	r3, [r3, #86]	@ 0x56
 800f0ac:	b29b      	uxth	r3, r3
 800f0ae:	2b00      	cmp	r3, #0
 800f0b0:	d133      	bne.n	800f11a <UART_TxISR_16BIT_FIFOEN+0x90>
      {
        /* Disable the TX FIFO threshold interrupt */
        ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE);
 800f0b2:	687b      	ldr	r3, [r7, #4]
 800f0b4:	681b      	ldr	r3, [r3, #0]
 800f0b6:	3308      	adds	r3, #8
 800f0b8:	623b      	str	r3, [r7, #32]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f0ba:	6a3b      	ldr	r3, [r7, #32]
 800f0bc:	e853 3f00 	ldrex	r3, [r3]
 800f0c0:	61fb      	str	r3, [r7, #28]
   return(result);
 800f0c2:	69fb      	ldr	r3, [r7, #28]
 800f0c4:	f423 0300 	bic.w	r3, r3, #8388608	@ 0x800000
 800f0c8:	637b      	str	r3, [r7, #52]	@ 0x34
 800f0ca:	687b      	ldr	r3, [r7, #4]
 800f0cc:	681b      	ldr	r3, [r3, #0]
 800f0ce:	3308      	adds	r3, #8
 800f0d0:	6b7a      	ldr	r2, [r7, #52]	@ 0x34
 800f0d2:	62fa      	str	r2, [r7, #44]	@ 0x2c
 800f0d4:	62bb      	str	r3, [r7, #40]	@ 0x28
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f0d6:	6ab9      	ldr	r1, [r7, #40]	@ 0x28
 800f0d8:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 800f0da:	e841 2300 	strex	r3, r2, [r1]
 800f0de:	627b      	str	r3, [r7, #36]	@ 0x24
   return(result);
 800f0e0:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800f0e2:	2b00      	cmp	r3, #0
 800f0e4:	d1e5      	bne.n	800f0b2 <UART_TxISR_16BIT_FIFOEN+0x28>

        /* Enable the UART Transmit Complete Interrupt */
        ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
 800f0e6:	687b      	ldr	r3, [r7, #4]
 800f0e8:	681b      	ldr	r3, [r3, #0]
 800f0ea:	60fb      	str	r3, [r7, #12]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f0ec:	68fb      	ldr	r3, [r7, #12]
 800f0ee:	e853 3f00 	ldrex	r3, [r3]
 800f0f2:	60bb      	str	r3, [r7, #8]
   return(result);
 800f0f4:	68bb      	ldr	r3, [r7, #8]
 800f0f6:	f043 0340 	orr.w	r3, r3, #64	@ 0x40
 800f0fa:	633b      	str	r3, [r7, #48]	@ 0x30
 800f0fc:	687b      	ldr	r3, [r7, #4]
 800f0fe:	681b      	ldr	r3, [r3, #0]
 800f100:	461a      	mov	r2, r3
 800f102:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800f104:	61bb      	str	r3, [r7, #24]
 800f106:	617a      	str	r2, [r7, #20]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f108:	6979      	ldr	r1, [r7, #20]
 800f10a:	69ba      	ldr	r2, [r7, #24]
 800f10c:	e841 2300 	strex	r3, r2, [r1]
 800f110:	613b      	str	r3, [r7, #16]
   return(result);
 800f112:	693b      	ldr	r3, [r7, #16]
 800f114:	2b00      	cmp	r3, #0
 800f116:	d1e6      	bne.n	800f0e6 <UART_TxISR_16BIT_FIFOEN+0x5c>

        break; /* force exit loop */
 800f118:	e026      	b.n	800f168 <UART_TxISR_16BIT_FIFOEN+0xde>
      }
      else if (READ_BIT(huart->Instance->ISR, USART_ISR_TXE_TXFNF) != 0U)
 800f11a:	687b      	ldr	r3, [r7, #4]
 800f11c:	681b      	ldr	r3, [r3, #0]
 800f11e:	69db      	ldr	r3, [r3, #28]
 800f120:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 800f124:	2b00      	cmp	r3, #0
 800f126:	d018      	beq.n	800f15a <UART_TxISR_16BIT_FIFOEN+0xd0>
      {
        tmp = (const uint16_t *) huart->pTxBuffPtr;
 800f128:	687b      	ldr	r3, [r7, #4]
 800f12a:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800f12c:	63bb      	str	r3, [r7, #56]	@ 0x38
        huart->Instance->TDR = (((uint32_t)(*tmp)) & 0x01FFUL);
 800f12e:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800f130:	881b      	ldrh	r3, [r3, #0]
 800f132:	461a      	mov	r2, r3
 800f134:	687b      	ldr	r3, [r7, #4]
 800f136:	681b      	ldr	r3, [r3, #0]
 800f138:	f3c2 0208 	ubfx	r2, r2, #0, #9
 800f13c:	629a      	str	r2, [r3, #40]	@ 0x28
        huart->pTxBuffPtr += 2U;
 800f13e:	687b      	ldr	r3, [r7, #4]
 800f140:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800f142:	1c9a      	adds	r2, r3, #2
 800f144:	687b      	ldr	r3, [r7, #4]
 800f146:	651a      	str	r2, [r3, #80]	@ 0x50
        huart->TxXferCount--;
 800f148:	687b      	ldr	r3, [r7, #4]
 800f14a:	f8b3 3056 	ldrh.w	r3, [r3, #86]	@ 0x56
 800f14e:	b29b      	uxth	r3, r3
 800f150:	3b01      	subs	r3, #1
 800f152:	b29a      	uxth	r2, r3
 800f154:	687b      	ldr	r3, [r7, #4]
 800f156:	f8a3 2056 	strh.w	r2, [r3, #86]	@ 0x56
    for (nb_tx_data = huart->NbTxDataToProcess ; nb_tx_data > 0U ; nb_tx_data--)
 800f15a:	8ffb      	ldrh	r3, [r7, #62]	@ 0x3e
 800f15c:	3b01      	subs	r3, #1
 800f15e:	87fb      	strh	r3, [r7, #62]	@ 0x3e
 800f160:	8ffb      	ldrh	r3, [r7, #62]	@ 0x3e
 800f162:	2b00      	cmp	r3, #0
 800f164:	d19f      	bne.n	800f0a6 <UART_TxISR_16BIT_FIFOEN+0x1c>
      {
        /* Nothing to do */
      }
    }
  }
}
 800f166:	e7ff      	b.n	800f168 <UART_TxISR_16BIT_FIFOEN+0xde>
 800f168:	bf00      	nop
 800f16a:	3744      	adds	r7, #68	@ 0x44
 800f16c:	46bd      	mov	sp, r7
 800f16e:	f85d 7b04 	ldr.w	r7, [sp], #4
 800f172:	4770      	bx	lr

0800f174 <UART_EndTransmit_IT>:
  * @param  huart pointer to a UART_HandleTypeDef structure that contains
  *                the configuration information for the specified UART module.
  * @retval None
  */
static void UART_EndTransmit_IT(UART_HandleTypeDef *huart)
{
 800f174:	b580      	push	{r7, lr}
 800f176:	b088      	sub	sp, #32
 800f178:	af00      	add	r7, sp, #0
 800f17a:	6078      	str	r0, [r7, #4]
  /* Disable the UART Transmit Complete Interrupt */
  ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_TCIE);
 800f17c:	687b      	ldr	r3, [r7, #4]
 800f17e:	681b      	ldr	r3, [r3, #0]
 800f180:	60fb      	str	r3, [r7, #12]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f182:	68fb      	ldr	r3, [r7, #12]
 800f184:	e853 3f00 	ldrex	r3, [r3]
 800f188:	60bb      	str	r3, [r7, #8]
   return(result);
 800f18a:	68bb      	ldr	r3, [r7, #8]
 800f18c:	f023 0340 	bic.w	r3, r3, #64	@ 0x40
 800f190:	61fb      	str	r3, [r7, #28]
 800f192:	687b      	ldr	r3, [r7, #4]
 800f194:	681b      	ldr	r3, [r3, #0]
 800f196:	461a      	mov	r2, r3
 800f198:	69fb      	ldr	r3, [r7, #28]
 800f19a:	61bb      	str	r3, [r7, #24]
 800f19c:	617a      	str	r2, [r7, #20]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f19e:	6979      	ldr	r1, [r7, #20]
 800f1a0:	69ba      	ldr	r2, [r7, #24]
 800f1a2:	e841 2300 	strex	r3, r2, [r1]
 800f1a6:	613b      	str	r3, [r7, #16]
   return(result);
 800f1a8:	693b      	ldr	r3, [r7, #16]
 800f1aa:	2b00      	cmp	r3, #0
 800f1ac:	d1e6      	bne.n	800f17c <UART_EndTransmit_IT+0x8>

  /* Tx process is ended, restore huart->gState to Ready */
  huart->gState = HAL_UART_STATE_READY;
 800f1ae:	687b      	ldr	r3, [r7, #4]
 800f1b0:	2220      	movs	r2, #32
 800f1b2:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88

  /* Cleat TxISR function pointer */
  huart->TxISR = NULL;
 800f1b6:	687b      	ldr	r3, [r7, #4]
 800f1b8:	2200      	movs	r2, #0
 800f1ba:	679a      	str	r2, [r3, #120]	@ 0x78
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
  /*Call registered Tx complete callback*/
  huart->TxCpltCallback(huart);
#else
  /*Call legacy weak Tx complete callback*/
  HAL_UART_TxCpltCallback(huart);
 800f1bc:	6878      	ldr	r0, [r7, #4]
 800f1be:	f7f5 f85f 	bl	8004280 <HAL_UART_TxCpltCallback>
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
}
 800f1c2:	bf00      	nop
 800f1c4:	3720      	adds	r7, #32
 800f1c6:	46bd      	mov	sp, r7
 800f1c8:	bd80      	pop	{r7, pc}
	...

0800f1cc <UART_RxISR_8BIT>:
  * @brief RX interrupt handler for 7 or 8 bits data word length .
  * @param huart UART handle.
  * @retval None
  */
static void UART_RxISR_8BIT(UART_HandleTypeDef *huart)
{
 800f1cc:	b580      	push	{r7, lr}
 800f1ce:	b09c      	sub	sp, #112	@ 0x70
 800f1d0:	af00      	add	r7, sp, #0
 800f1d2:	6078      	str	r0, [r7, #4]
  uint16_t uhMask = huart->Mask;
 800f1d4:	687b      	ldr	r3, [r7, #4]
 800f1d6:	f8b3 3060 	ldrh.w	r3, [r3, #96]	@ 0x60
 800f1da:	f8a7 306e 	strh.w	r3, [r7, #110]	@ 0x6e
  uint16_t  uhdata;

  /* Check that a Rx process is ongoing */
  if (huart->RxState == HAL_UART_STATE_BUSY_RX)
 800f1de:	687b      	ldr	r3, [r7, #4]
 800f1e0:	f8d3 308c 	ldr.w	r3, [r3, #140]	@ 0x8c
 800f1e4:	2b22      	cmp	r3, #34	@ 0x22
 800f1e6:	f040 80be 	bne.w	800f366 <UART_RxISR_8BIT+0x19a>
  {
    uhdata = (uint16_t) READ_REG(huart->Instance->RDR);
 800f1ea:	687b      	ldr	r3, [r7, #4]
 800f1ec:	681b      	ldr	r3, [r3, #0]
 800f1ee:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 800f1f0:	f8a7 306c 	strh.w	r3, [r7, #108]	@ 0x6c
    *huart->pRxBuffPtr = (uint8_t)(uhdata & (uint8_t)uhMask);
 800f1f4:	f8b7 306c 	ldrh.w	r3, [r7, #108]	@ 0x6c
 800f1f8:	b2d9      	uxtb	r1, r3
 800f1fa:	f8b7 306e 	ldrh.w	r3, [r7, #110]	@ 0x6e
 800f1fe:	b2da      	uxtb	r2, r3
 800f200:	687b      	ldr	r3, [r7, #4]
 800f202:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800f204:	400a      	ands	r2, r1
 800f206:	b2d2      	uxtb	r2, r2
 800f208:	701a      	strb	r2, [r3, #0]
    huart->pRxBuffPtr++;
 800f20a:	687b      	ldr	r3, [r7, #4]
 800f20c:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800f20e:	1c5a      	adds	r2, r3, #1
 800f210:	687b      	ldr	r3, [r7, #4]
 800f212:	659a      	str	r2, [r3, #88]	@ 0x58
    huart->RxXferCount--;
 800f214:	687b      	ldr	r3, [r7, #4]
 800f216:	f8b3 305e 	ldrh.w	r3, [r3, #94]	@ 0x5e
 800f21a:	b29b      	uxth	r3, r3
 800f21c:	3b01      	subs	r3, #1
 800f21e:	b29a      	uxth	r2, r3
 800f220:	687b      	ldr	r3, [r7, #4]
 800f222:	f8a3 205e 	strh.w	r2, [r3, #94]	@ 0x5e

    if (huart->RxXferCount == 0U)
 800f226:	687b      	ldr	r3, [r7, #4]
 800f228:	f8b3 305e 	ldrh.w	r3, [r3, #94]	@ 0x5e
 800f22c:	b29b      	uxth	r3, r3
 800f22e:	2b00      	cmp	r3, #0
 800f230:	f040 80a1 	bne.w	800f376 <UART_RxISR_8BIT+0x1aa>
    {
      /* Disable the UART Parity Error Interrupt and RXNE interrupts */
      ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
 800f234:	687b      	ldr	r3, [r7, #4]
 800f236:	681b      	ldr	r3, [r3, #0]
 800f238:	64fb      	str	r3, [r7, #76]	@ 0x4c
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f23a:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 800f23c:	e853 3f00 	ldrex	r3, [r3]
 800f240:	64bb      	str	r3, [r7, #72]	@ 0x48
   return(result);
 800f242:	6cbb      	ldr	r3, [r7, #72]	@ 0x48
 800f244:	f423 7390 	bic.w	r3, r3, #288	@ 0x120
 800f248:	66bb      	str	r3, [r7, #104]	@ 0x68
 800f24a:	687b      	ldr	r3, [r7, #4]
 800f24c:	681b      	ldr	r3, [r3, #0]
 800f24e:	461a      	mov	r2, r3
 800f250:	6ebb      	ldr	r3, [r7, #104]	@ 0x68
 800f252:	65bb      	str	r3, [r7, #88]	@ 0x58
 800f254:	657a      	str	r2, [r7, #84]	@ 0x54
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f256:	6d79      	ldr	r1, [r7, #84]	@ 0x54
 800f258:	6dba      	ldr	r2, [r7, #88]	@ 0x58
 800f25a:	e841 2300 	strex	r3, r2, [r1]
 800f25e:	653b      	str	r3, [r7, #80]	@ 0x50
   return(result);
 800f260:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 800f262:	2b00      	cmp	r3, #0
 800f264:	d1e6      	bne.n	800f234 <UART_RxISR_8BIT+0x68>

      /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */
      ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
 800f266:	687b      	ldr	r3, [r7, #4]
 800f268:	681b      	ldr	r3, [r3, #0]
 800f26a:	3308      	adds	r3, #8
 800f26c:	63bb      	str	r3, [r7, #56]	@ 0x38
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f26e:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800f270:	e853 3f00 	ldrex	r3, [r3]
 800f274:	637b      	str	r3, [r7, #52]	@ 0x34
   return(result);
 800f276:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 800f278:	f023 0301 	bic.w	r3, r3, #1
 800f27c:	667b      	str	r3, [r7, #100]	@ 0x64
 800f27e:	687b      	ldr	r3, [r7, #4]
 800f280:	681b      	ldr	r3, [r3, #0]
 800f282:	3308      	adds	r3, #8
 800f284:	6e7a      	ldr	r2, [r7, #100]	@ 0x64
 800f286:	647a      	str	r2, [r7, #68]	@ 0x44
 800f288:	643b      	str	r3, [r7, #64]	@ 0x40
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f28a:	6c39      	ldr	r1, [r7, #64]	@ 0x40
 800f28c:	6c7a      	ldr	r2, [r7, #68]	@ 0x44
 800f28e:	e841 2300 	strex	r3, r2, [r1]
 800f292:	63fb      	str	r3, [r7, #60]	@ 0x3c
   return(result);
 800f294:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800f296:	2b00      	cmp	r3, #0
 800f298:	d1e5      	bne.n	800f266 <UART_RxISR_8BIT+0x9a>

      /* Rx process is completed, restore huart->RxState to Ready */
      huart->RxState = HAL_UART_STATE_READY;
 800f29a:	687b      	ldr	r3, [r7, #4]
 800f29c:	2220      	movs	r2, #32
 800f29e:	f8c3 208c 	str.w	r2, [r3, #140]	@ 0x8c

      /* Clear RxISR function pointer */
      huart->RxISR = NULL;
 800f2a2:	687b      	ldr	r3, [r7, #4]
 800f2a4:	2200      	movs	r2, #0
 800f2a6:	675a      	str	r2, [r3, #116]	@ 0x74

      /* Initialize type of RxEvent to Transfer Complete */
      huart->RxEventType = HAL_UART_RXEVENT_TC;
 800f2a8:	687b      	ldr	r3, [r7, #4]
 800f2aa:	2200      	movs	r2, #0
 800f2ac:	671a      	str	r2, [r3, #112]	@ 0x70

      if (!(IS_LPUART_INSTANCE(huart->Instance)))
 800f2ae:	687b      	ldr	r3, [r7, #4]
 800f2b0:	681b      	ldr	r3, [r3, #0]
 800f2b2:	4a33      	ldr	r2, [pc, #204]	@ (800f380 <UART_RxISR_8BIT+0x1b4>)
 800f2b4:	4293      	cmp	r3, r2
 800f2b6:	d01f      	beq.n	800f2f8 <UART_RxISR_8BIT+0x12c>
      {
        /* Check that USART RTOEN bit is set */
        if (READ_BIT(huart->Instance->CR2, USART_CR2_RTOEN) != 0U)
 800f2b8:	687b      	ldr	r3, [r7, #4]
 800f2ba:	681b      	ldr	r3, [r3, #0]
 800f2bc:	685b      	ldr	r3, [r3, #4]
 800f2be:	f403 0300 	and.w	r3, r3, #8388608	@ 0x800000
 800f2c2:	2b00      	cmp	r3, #0
 800f2c4:	d018      	beq.n	800f2f8 <UART_RxISR_8BIT+0x12c>
        {
          /* Enable the UART Receiver Timeout Interrupt */
          ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_RTOIE);
 800f2c6:	687b      	ldr	r3, [r7, #4]
 800f2c8:	681b      	ldr	r3, [r3, #0]
 800f2ca:	627b      	str	r3, [r7, #36]	@ 0x24
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f2cc:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800f2ce:	e853 3f00 	ldrex	r3, [r3]
 800f2d2:	623b      	str	r3, [r7, #32]
   return(result);
 800f2d4:	6a3b      	ldr	r3, [r7, #32]
 800f2d6:	f023 6380 	bic.w	r3, r3, #67108864	@ 0x4000000
 800f2da:	663b      	str	r3, [r7, #96]	@ 0x60
 800f2dc:	687b      	ldr	r3, [r7, #4]
 800f2de:	681b      	ldr	r3, [r3, #0]
 800f2e0:	461a      	mov	r2, r3
 800f2e2:	6e3b      	ldr	r3, [r7, #96]	@ 0x60
 800f2e4:	633b      	str	r3, [r7, #48]	@ 0x30
 800f2e6:	62fa      	str	r2, [r7, #44]	@ 0x2c
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f2e8:	6af9      	ldr	r1, [r7, #44]	@ 0x2c
 800f2ea:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 800f2ec:	e841 2300 	strex	r3, r2, [r1]
 800f2f0:	62bb      	str	r3, [r7, #40]	@ 0x28
   return(result);
 800f2f2:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 800f2f4:	2b00      	cmp	r3, #0
 800f2f6:	d1e6      	bne.n	800f2c6 <UART_RxISR_8BIT+0xfa>
        }
      }

      /* Check current reception Mode :
         If Reception till IDLE event has been selected : */
      if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
 800f2f8:	687b      	ldr	r3, [r7, #4]
 800f2fa:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 800f2fc:	2b01      	cmp	r3, #1
 800f2fe:	d12e      	bne.n	800f35e <UART_RxISR_8BIT+0x192>
      {
        /* Set reception type to Standard */
        huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
 800f300:	687b      	ldr	r3, [r7, #4]
 800f302:	2200      	movs	r2, #0
 800f304:	66da      	str	r2, [r3, #108]	@ 0x6c

        /* Disable IDLE interrupt */
        ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
 800f306:	687b      	ldr	r3, [r7, #4]
 800f308:	681b      	ldr	r3, [r3, #0]
 800f30a:	613b      	str	r3, [r7, #16]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f30c:	693b      	ldr	r3, [r7, #16]
 800f30e:	e853 3f00 	ldrex	r3, [r3]
 800f312:	60fb      	str	r3, [r7, #12]
   return(result);
 800f314:	68fb      	ldr	r3, [r7, #12]
 800f316:	f023 0310 	bic.w	r3, r3, #16
 800f31a:	65fb      	str	r3, [r7, #92]	@ 0x5c
 800f31c:	687b      	ldr	r3, [r7, #4]
 800f31e:	681b      	ldr	r3, [r3, #0]
 800f320:	461a      	mov	r2, r3
 800f322:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 800f324:	61fb      	str	r3, [r7, #28]
 800f326:	61ba      	str	r2, [r7, #24]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f328:	69b9      	ldr	r1, [r7, #24]
 800f32a:	69fa      	ldr	r2, [r7, #28]
 800f32c:	e841 2300 	strex	r3, r2, [r1]
 800f330:	617b      	str	r3, [r7, #20]
   return(result);
 800f332:	697b      	ldr	r3, [r7, #20]
 800f334:	2b00      	cmp	r3, #0
 800f336:	d1e6      	bne.n	800f306 <UART_RxISR_8BIT+0x13a>

        if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE) == SET)
 800f338:	687b      	ldr	r3, [r7, #4]
 800f33a:	681b      	ldr	r3, [r3, #0]
 800f33c:	69db      	ldr	r3, [r3, #28]
 800f33e:	f003 0310 	and.w	r3, r3, #16
 800f342:	2b10      	cmp	r3, #16
 800f344:	d103      	bne.n	800f34e <UART_RxISR_8BIT+0x182>
        {
          /* Clear IDLE Flag */
          __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
 800f346:	687b      	ldr	r3, [r7, #4]
 800f348:	681b      	ldr	r3, [r3, #0]
 800f34a:	2210      	movs	r2, #16
 800f34c:	621a      	str	r2, [r3, #32]
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
        /*Call registered Rx Event callback*/
        huart->RxEventCallback(huart, huart->RxXferSize);
#else
        /*Call legacy weak Rx Event callback*/
        HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize);
 800f34e:	687b      	ldr	r3, [r7, #4]
 800f350:	f8b3 305c 	ldrh.w	r3, [r3, #92]	@ 0x5c
 800f354:	4619      	mov	r1, r3
 800f356:	6878      	ldr	r0, [r7, #4]
 800f358:	f7f4 ff38 	bl	80041cc <HAL_UARTEx_RxEventCallback>
  else
  {
    /* Clear RXNE interrupt flag */
    __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
  }
}
 800f35c:	e00b      	b.n	800f376 <UART_RxISR_8BIT+0x1aa>
        HAL_UART_RxCpltCallback(huart);
 800f35e:	6878      	ldr	r0, [r7, #4]
 800f360:	f7f4 ff2a 	bl	80041b8 <HAL_UART_RxCpltCallback>
}
 800f364:	e007      	b.n	800f376 <UART_RxISR_8BIT+0x1aa>
    __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
 800f366:	687b      	ldr	r3, [r7, #4]
 800f368:	681b      	ldr	r3, [r3, #0]
 800f36a:	699a      	ldr	r2, [r3, #24]
 800f36c:	687b      	ldr	r3, [r7, #4]
 800f36e:	681b      	ldr	r3, [r3, #0]
 800f370:	f042 0208 	orr.w	r2, r2, #8
 800f374:	619a      	str	r2, [r3, #24]
}
 800f376:	bf00      	nop
 800f378:	3770      	adds	r7, #112	@ 0x70
 800f37a:	46bd      	mov	sp, r7
 800f37c:	bd80      	pop	{r7, pc}
 800f37e:	bf00      	nop
 800f380:	58000c00 	.word	0x58000c00

0800f384 <UART_RxISR_16BIT>:
  *         interruptions have been enabled by HAL_UART_Receive_IT()
  * @param huart UART handle.
  * @retval None
  */
static void UART_RxISR_16BIT(UART_HandleTypeDef *huart)
{
 800f384:	b580      	push	{r7, lr}
 800f386:	b09c      	sub	sp, #112	@ 0x70
 800f388:	af00      	add	r7, sp, #0
 800f38a:	6078      	str	r0, [r7, #4]
  uint16_t *tmp;
  uint16_t uhMask = huart->Mask;
 800f38c:	687b      	ldr	r3, [r7, #4]
 800f38e:	f8b3 3060 	ldrh.w	r3, [r3, #96]	@ 0x60
 800f392:	f8a7 306e 	strh.w	r3, [r7, #110]	@ 0x6e
  uint16_t  uhdata;

  /* Check that a Rx process is ongoing */
  if (huart->RxState == HAL_UART_STATE_BUSY_RX)
 800f396:	687b      	ldr	r3, [r7, #4]
 800f398:	f8d3 308c 	ldr.w	r3, [r3, #140]	@ 0x8c
 800f39c:	2b22      	cmp	r3, #34	@ 0x22
 800f39e:	f040 80be 	bne.w	800f51e <UART_RxISR_16BIT+0x19a>
  {
    uhdata = (uint16_t) READ_REG(huart->Instance->RDR);
 800f3a2:	687b      	ldr	r3, [r7, #4]
 800f3a4:	681b      	ldr	r3, [r3, #0]
 800f3a6:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 800f3a8:	f8a7 306c 	strh.w	r3, [r7, #108]	@ 0x6c
    tmp = (uint16_t *) huart->pRxBuffPtr ;
 800f3ac:	687b      	ldr	r3, [r7, #4]
 800f3ae:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800f3b0:	66bb      	str	r3, [r7, #104]	@ 0x68
    *tmp = (uint16_t)(uhdata & uhMask);
 800f3b2:	f8b7 206c 	ldrh.w	r2, [r7, #108]	@ 0x6c
 800f3b6:	f8b7 306e 	ldrh.w	r3, [r7, #110]	@ 0x6e
 800f3ba:	4013      	ands	r3, r2
 800f3bc:	b29a      	uxth	r2, r3
 800f3be:	6ebb      	ldr	r3, [r7, #104]	@ 0x68
 800f3c0:	801a      	strh	r2, [r3, #0]
    huart->pRxBuffPtr += 2U;
 800f3c2:	687b      	ldr	r3, [r7, #4]
 800f3c4:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800f3c6:	1c9a      	adds	r2, r3, #2
 800f3c8:	687b      	ldr	r3, [r7, #4]
 800f3ca:	659a      	str	r2, [r3, #88]	@ 0x58
    huart->RxXferCount--;
 800f3cc:	687b      	ldr	r3, [r7, #4]
 800f3ce:	f8b3 305e 	ldrh.w	r3, [r3, #94]	@ 0x5e
 800f3d2:	b29b      	uxth	r3, r3
 800f3d4:	3b01      	subs	r3, #1
 800f3d6:	b29a      	uxth	r2, r3
 800f3d8:	687b      	ldr	r3, [r7, #4]
 800f3da:	f8a3 205e 	strh.w	r2, [r3, #94]	@ 0x5e

    if (huart->RxXferCount == 0U)
 800f3de:	687b      	ldr	r3, [r7, #4]
 800f3e0:	f8b3 305e 	ldrh.w	r3, [r3, #94]	@ 0x5e
 800f3e4:	b29b      	uxth	r3, r3
 800f3e6:	2b00      	cmp	r3, #0
 800f3e8:	f040 80a1 	bne.w	800f52e <UART_RxISR_16BIT+0x1aa>
    {
      /* Disable the UART Parity Error Interrupt and RXNE interrupt*/
      ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
 800f3ec:	687b      	ldr	r3, [r7, #4]
 800f3ee:	681b      	ldr	r3, [r3, #0]
 800f3f0:	64bb      	str	r3, [r7, #72]	@ 0x48
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f3f2:	6cbb      	ldr	r3, [r7, #72]	@ 0x48
 800f3f4:	e853 3f00 	ldrex	r3, [r3]
 800f3f8:	647b      	str	r3, [r7, #68]	@ 0x44
   return(result);
 800f3fa:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 800f3fc:	f423 7390 	bic.w	r3, r3, #288	@ 0x120
 800f400:	667b      	str	r3, [r7, #100]	@ 0x64
 800f402:	687b      	ldr	r3, [r7, #4]
 800f404:	681b      	ldr	r3, [r3, #0]
 800f406:	461a      	mov	r2, r3
 800f408:	6e7b      	ldr	r3, [r7, #100]	@ 0x64
 800f40a:	657b      	str	r3, [r7, #84]	@ 0x54
 800f40c:	653a      	str	r2, [r7, #80]	@ 0x50
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f40e:	6d39      	ldr	r1, [r7, #80]	@ 0x50
 800f410:	6d7a      	ldr	r2, [r7, #84]	@ 0x54
 800f412:	e841 2300 	strex	r3, r2, [r1]
 800f416:	64fb      	str	r3, [r7, #76]	@ 0x4c
   return(result);
 800f418:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 800f41a:	2b00      	cmp	r3, #0
 800f41c:	d1e6      	bne.n	800f3ec <UART_RxISR_16BIT+0x68>

      /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */
      ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
 800f41e:	687b      	ldr	r3, [r7, #4]
 800f420:	681b      	ldr	r3, [r3, #0]
 800f422:	3308      	adds	r3, #8
 800f424:	637b      	str	r3, [r7, #52]	@ 0x34
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f426:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 800f428:	e853 3f00 	ldrex	r3, [r3]
 800f42c:	633b      	str	r3, [r7, #48]	@ 0x30
   return(result);
 800f42e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800f430:	f023 0301 	bic.w	r3, r3, #1
 800f434:	663b      	str	r3, [r7, #96]	@ 0x60
 800f436:	687b      	ldr	r3, [r7, #4]
 800f438:	681b      	ldr	r3, [r3, #0]
 800f43a:	3308      	adds	r3, #8
 800f43c:	6e3a      	ldr	r2, [r7, #96]	@ 0x60
 800f43e:	643a      	str	r2, [r7, #64]	@ 0x40
 800f440:	63fb      	str	r3, [r7, #60]	@ 0x3c
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f442:	6bf9      	ldr	r1, [r7, #60]	@ 0x3c
 800f444:	6c3a      	ldr	r2, [r7, #64]	@ 0x40
 800f446:	e841 2300 	strex	r3, r2, [r1]
 800f44a:	63bb      	str	r3, [r7, #56]	@ 0x38
   return(result);
 800f44c:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800f44e:	2b00      	cmp	r3, #0
 800f450:	d1e5      	bne.n	800f41e <UART_RxISR_16BIT+0x9a>

      /* Rx process is completed, restore huart->RxState to Ready */
      huart->RxState = HAL_UART_STATE_READY;
 800f452:	687b      	ldr	r3, [r7, #4]
 800f454:	2220      	movs	r2, #32
 800f456:	f8c3 208c 	str.w	r2, [r3, #140]	@ 0x8c

      /* Clear RxISR function pointer */
      huart->RxISR = NULL;
 800f45a:	687b      	ldr	r3, [r7, #4]
 800f45c:	2200      	movs	r2, #0
 800f45e:	675a      	str	r2, [r3, #116]	@ 0x74

      /* Initialize type of RxEvent to Transfer Complete */
      huart->RxEventType = HAL_UART_RXEVENT_TC;
 800f460:	687b      	ldr	r3, [r7, #4]
 800f462:	2200      	movs	r2, #0
 800f464:	671a      	str	r2, [r3, #112]	@ 0x70

      if (!(IS_LPUART_INSTANCE(huart->Instance)))
 800f466:	687b      	ldr	r3, [r7, #4]
 800f468:	681b      	ldr	r3, [r3, #0]
 800f46a:	4a33      	ldr	r2, [pc, #204]	@ (800f538 <UART_RxISR_16BIT+0x1b4>)
 800f46c:	4293      	cmp	r3, r2
 800f46e:	d01f      	beq.n	800f4b0 <UART_RxISR_16BIT+0x12c>
      {
        /* Check that USART RTOEN bit is set */
        if (READ_BIT(huart->Instance->CR2, USART_CR2_RTOEN) != 0U)
 800f470:	687b      	ldr	r3, [r7, #4]
 800f472:	681b      	ldr	r3, [r3, #0]
 800f474:	685b      	ldr	r3, [r3, #4]
 800f476:	f403 0300 	and.w	r3, r3, #8388608	@ 0x800000
 800f47a:	2b00      	cmp	r3, #0
 800f47c:	d018      	beq.n	800f4b0 <UART_RxISR_16BIT+0x12c>
        {
          /* Enable the UART Receiver Timeout Interrupt */
          ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_RTOIE);
 800f47e:	687b      	ldr	r3, [r7, #4]
 800f480:	681b      	ldr	r3, [r3, #0]
 800f482:	623b      	str	r3, [r7, #32]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f484:	6a3b      	ldr	r3, [r7, #32]
 800f486:	e853 3f00 	ldrex	r3, [r3]
 800f48a:	61fb      	str	r3, [r7, #28]
   return(result);
 800f48c:	69fb      	ldr	r3, [r7, #28]
 800f48e:	f023 6380 	bic.w	r3, r3, #67108864	@ 0x4000000
 800f492:	65fb      	str	r3, [r7, #92]	@ 0x5c
 800f494:	687b      	ldr	r3, [r7, #4]
 800f496:	681b      	ldr	r3, [r3, #0]
 800f498:	461a      	mov	r2, r3
 800f49a:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 800f49c:	62fb      	str	r3, [r7, #44]	@ 0x2c
 800f49e:	62ba      	str	r2, [r7, #40]	@ 0x28
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f4a0:	6ab9      	ldr	r1, [r7, #40]	@ 0x28
 800f4a2:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 800f4a4:	e841 2300 	strex	r3, r2, [r1]
 800f4a8:	627b      	str	r3, [r7, #36]	@ 0x24
   return(result);
 800f4aa:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800f4ac:	2b00      	cmp	r3, #0
 800f4ae:	d1e6      	bne.n	800f47e <UART_RxISR_16BIT+0xfa>
        }
      }

      /* Check current reception Mode :
         If Reception till IDLE event has been selected : */
      if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
 800f4b0:	687b      	ldr	r3, [r7, #4]
 800f4b2:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 800f4b4:	2b01      	cmp	r3, #1
 800f4b6:	d12e      	bne.n	800f516 <UART_RxISR_16BIT+0x192>
      {
        /* Set reception type to Standard */
        huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
 800f4b8:	687b      	ldr	r3, [r7, #4]
 800f4ba:	2200      	movs	r2, #0
 800f4bc:	66da      	str	r2, [r3, #108]	@ 0x6c

        /* Disable IDLE interrupt */
        ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
 800f4be:	687b      	ldr	r3, [r7, #4]
 800f4c0:	681b      	ldr	r3, [r3, #0]
 800f4c2:	60fb      	str	r3, [r7, #12]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f4c4:	68fb      	ldr	r3, [r7, #12]
 800f4c6:	e853 3f00 	ldrex	r3, [r3]
 800f4ca:	60bb      	str	r3, [r7, #8]
   return(result);
 800f4cc:	68bb      	ldr	r3, [r7, #8]
 800f4ce:	f023 0310 	bic.w	r3, r3, #16
 800f4d2:	65bb      	str	r3, [r7, #88]	@ 0x58
 800f4d4:	687b      	ldr	r3, [r7, #4]
 800f4d6:	681b      	ldr	r3, [r3, #0]
 800f4d8:	461a      	mov	r2, r3
 800f4da:	6dbb      	ldr	r3, [r7, #88]	@ 0x58
 800f4dc:	61bb      	str	r3, [r7, #24]
 800f4de:	617a      	str	r2, [r7, #20]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f4e0:	6979      	ldr	r1, [r7, #20]
 800f4e2:	69ba      	ldr	r2, [r7, #24]
 800f4e4:	e841 2300 	strex	r3, r2, [r1]
 800f4e8:	613b      	str	r3, [r7, #16]
   return(result);
 800f4ea:	693b      	ldr	r3, [r7, #16]
 800f4ec:	2b00      	cmp	r3, #0
 800f4ee:	d1e6      	bne.n	800f4be <UART_RxISR_16BIT+0x13a>

        if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE) == SET)
 800f4f0:	687b      	ldr	r3, [r7, #4]
 800f4f2:	681b      	ldr	r3, [r3, #0]
 800f4f4:	69db      	ldr	r3, [r3, #28]
 800f4f6:	f003 0310 	and.w	r3, r3, #16
 800f4fa:	2b10      	cmp	r3, #16
 800f4fc:	d103      	bne.n	800f506 <UART_RxISR_16BIT+0x182>
        {
          /* Clear IDLE Flag */
          __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
 800f4fe:	687b      	ldr	r3, [r7, #4]
 800f500:	681b      	ldr	r3, [r3, #0]
 800f502:	2210      	movs	r2, #16
 800f504:	621a      	str	r2, [r3, #32]
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
        /*Call registered Rx Event callback*/
        huart->RxEventCallback(huart, huart->RxXferSize);
#else
        /*Call legacy weak Rx Event callback*/
        HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize);
 800f506:	687b      	ldr	r3, [r7, #4]
 800f508:	f8b3 305c 	ldrh.w	r3, [r3, #92]	@ 0x5c
 800f50c:	4619      	mov	r1, r3
 800f50e:	6878      	ldr	r0, [r7, #4]
 800f510:	f7f4 fe5c 	bl	80041cc <HAL_UARTEx_RxEventCallback>
  else
  {
    /* Clear RXNE interrupt flag */
    __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
  }
}
 800f514:	e00b      	b.n	800f52e <UART_RxISR_16BIT+0x1aa>
        HAL_UART_RxCpltCallback(huart);
 800f516:	6878      	ldr	r0, [r7, #4]
 800f518:	f7f4 fe4e 	bl	80041b8 <HAL_UART_RxCpltCallback>
}
 800f51c:	e007      	b.n	800f52e <UART_RxISR_16BIT+0x1aa>
    __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
 800f51e:	687b      	ldr	r3, [r7, #4]
 800f520:	681b      	ldr	r3, [r3, #0]
 800f522:	699a      	ldr	r2, [r3, #24]
 800f524:	687b      	ldr	r3, [r7, #4]
 800f526:	681b      	ldr	r3, [r3, #0]
 800f528:	f042 0208 	orr.w	r2, r2, #8
 800f52c:	619a      	str	r2, [r3, #24]
}
 800f52e:	bf00      	nop
 800f530:	3770      	adds	r7, #112	@ 0x70
 800f532:	46bd      	mov	sp, r7
 800f534:	bd80      	pop	{r7, pc}
 800f536:	bf00      	nop
 800f538:	58000c00 	.word	0x58000c00

0800f53c <UART_RxISR_8BIT_FIFOEN>:
  *         interruptions have been enabled by HAL_UART_Receive_IT()
  * @param huart UART handle.
  * @retval None
  */
static void UART_RxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart)
{
 800f53c:	b580      	push	{r7, lr}
 800f53e:	b0ac      	sub	sp, #176	@ 0xb0
 800f540:	af00      	add	r7, sp, #0
 800f542:	6078      	str	r0, [r7, #4]
  uint16_t  uhMask = huart->Mask;
 800f544:	687b      	ldr	r3, [r7, #4]
 800f546:	f8b3 3060 	ldrh.w	r3, [r3, #96]	@ 0x60
 800f54a:	f8a7 30aa 	strh.w	r3, [r7, #170]	@ 0xaa
  uint16_t  uhdata;
  uint16_t  nb_rx_data;
  uint16_t  rxdatacount;
  uint32_t  isrflags = READ_REG(huart->Instance->ISR);
 800f54e:	687b      	ldr	r3, [r7, #4]
 800f550:	681b      	ldr	r3, [r3, #0]
 800f552:	69db      	ldr	r3, [r3, #28]
 800f554:	f8c7 30ac 	str.w	r3, [r7, #172]	@ 0xac
  uint32_t  cr1its   = READ_REG(huart->Instance->CR1);
 800f558:	687b      	ldr	r3, [r7, #4]
 800f55a:	681b      	ldr	r3, [r3, #0]
 800f55c:	681b      	ldr	r3, [r3, #0]
 800f55e:	f8c7 30a4 	str.w	r3, [r7, #164]	@ 0xa4
  uint32_t  cr3its   = READ_REG(huart->Instance->CR3);
 800f562:	687b      	ldr	r3, [r7, #4]
 800f564:	681b      	ldr	r3, [r3, #0]
 800f566:	689b      	ldr	r3, [r3, #8]
 800f568:	f8c7 30a0 	str.w	r3, [r7, #160]	@ 0xa0

  /* Check that a Rx process is ongoing */
  if (huart->RxState == HAL_UART_STATE_BUSY_RX)
 800f56c:	687b      	ldr	r3, [r7, #4]
 800f56e:	f8d3 308c 	ldr.w	r3, [r3, #140]	@ 0x8c
 800f572:	2b22      	cmp	r3, #34	@ 0x22
 800f574:	f040 8180 	bne.w	800f878 <UART_RxISR_8BIT_FIFOEN+0x33c>
  {
    nb_rx_data = huart->NbRxDataToProcess;
 800f578:	687b      	ldr	r3, [r7, #4]
 800f57a:	f8b3 3068 	ldrh.w	r3, [r3, #104]	@ 0x68
 800f57e:	f8a7 309e 	strh.w	r3, [r7, #158]	@ 0x9e
    while ((nb_rx_data > 0U) && ((isrflags & USART_ISR_RXNE_RXFNE) != 0U))
 800f582:	e123      	b.n	800f7cc <UART_RxISR_8BIT_FIFOEN+0x290>
    {
      uhdata = (uint16_t) READ_REG(huart->Instance->RDR);
 800f584:	687b      	ldr	r3, [r7, #4]
 800f586:	681b      	ldr	r3, [r3, #0]
 800f588:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 800f58a:	f8a7 309c 	strh.w	r3, [r7, #156]	@ 0x9c
      *huart->pRxBuffPtr = (uint8_t)(uhdata & (uint8_t)uhMask);
 800f58e:	f8b7 309c 	ldrh.w	r3, [r7, #156]	@ 0x9c
 800f592:	b2d9      	uxtb	r1, r3
 800f594:	f8b7 30aa 	ldrh.w	r3, [r7, #170]	@ 0xaa
 800f598:	b2da      	uxtb	r2, r3
 800f59a:	687b      	ldr	r3, [r7, #4]
 800f59c:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800f59e:	400a      	ands	r2, r1
 800f5a0:	b2d2      	uxtb	r2, r2
 800f5a2:	701a      	strb	r2, [r3, #0]
      huart->pRxBuffPtr++;
 800f5a4:	687b      	ldr	r3, [r7, #4]
 800f5a6:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800f5a8:	1c5a      	adds	r2, r3, #1
 800f5aa:	687b      	ldr	r3, [r7, #4]
 800f5ac:	659a      	str	r2, [r3, #88]	@ 0x58
      huart->RxXferCount--;
 800f5ae:	687b      	ldr	r3, [r7, #4]
 800f5b0:	f8b3 305e 	ldrh.w	r3, [r3, #94]	@ 0x5e
 800f5b4:	b29b      	uxth	r3, r3
 800f5b6:	3b01      	subs	r3, #1
 800f5b8:	b29a      	uxth	r2, r3
 800f5ba:	687b      	ldr	r3, [r7, #4]
 800f5bc:	f8a3 205e 	strh.w	r2, [r3, #94]	@ 0x5e
      isrflags = READ_REG(huart->Instance->ISR);
 800f5c0:	687b      	ldr	r3, [r7, #4]
 800f5c2:	681b      	ldr	r3, [r3, #0]
 800f5c4:	69db      	ldr	r3, [r3, #28]
 800f5c6:	f8c7 30ac 	str.w	r3, [r7, #172]	@ 0xac

      /* If some non blocking errors occurred */
      if ((isrflags & (USART_ISR_PE | USART_ISR_FE | USART_ISR_NE)) != 0U)
 800f5ca:	f8d7 30ac 	ldr.w	r3, [r7, #172]	@ 0xac
 800f5ce:	f003 0307 	and.w	r3, r3, #7
 800f5d2:	2b00      	cmp	r3, #0
 800f5d4:	d053      	beq.n	800f67e <UART_RxISR_8BIT_FIFOEN+0x142>
      {
        /* UART parity error interrupt occurred -------------------------------------*/
        if (((isrflags & USART_ISR_PE) != 0U) && ((cr1its & USART_CR1_PEIE) != 0U))
 800f5d6:	f8d7 30ac 	ldr.w	r3, [r7, #172]	@ 0xac
 800f5da:	f003 0301 	and.w	r3, r3, #1
 800f5de:	2b00      	cmp	r3, #0
 800f5e0:	d011      	beq.n	800f606 <UART_RxISR_8BIT_FIFOEN+0xca>
 800f5e2:	f8d7 30a4 	ldr.w	r3, [r7, #164]	@ 0xa4
 800f5e6:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 800f5ea:	2b00      	cmp	r3, #0
 800f5ec:	d00b      	beq.n	800f606 <UART_RxISR_8BIT_FIFOEN+0xca>
        {
          __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF);
 800f5ee:	687b      	ldr	r3, [r7, #4]
 800f5f0:	681b      	ldr	r3, [r3, #0]
 800f5f2:	2201      	movs	r2, #1
 800f5f4:	621a      	str	r2, [r3, #32]

          huart->ErrorCode |= HAL_UART_ERROR_PE;
 800f5f6:	687b      	ldr	r3, [r7, #4]
 800f5f8:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800f5fc:	f043 0201 	orr.w	r2, r3, #1
 800f600:	687b      	ldr	r3, [r7, #4]
 800f602:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
        }

        /* UART frame error interrupt occurred --------------------------------------*/
        if (((isrflags & USART_ISR_FE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
 800f606:	f8d7 30ac 	ldr.w	r3, [r7, #172]	@ 0xac
 800f60a:	f003 0302 	and.w	r3, r3, #2
 800f60e:	2b00      	cmp	r3, #0
 800f610:	d011      	beq.n	800f636 <UART_RxISR_8BIT_FIFOEN+0xfa>
 800f612:	f8d7 30a0 	ldr.w	r3, [r7, #160]	@ 0xa0
 800f616:	f003 0301 	and.w	r3, r3, #1
 800f61a:	2b00      	cmp	r3, #0
 800f61c:	d00b      	beq.n	800f636 <UART_RxISR_8BIT_FIFOEN+0xfa>
        {
          __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_FEF);
 800f61e:	687b      	ldr	r3, [r7, #4]
 800f620:	681b      	ldr	r3, [r3, #0]
 800f622:	2202      	movs	r2, #2
 800f624:	621a      	str	r2, [r3, #32]

          huart->ErrorCode |= HAL_UART_ERROR_FE;
 800f626:	687b      	ldr	r3, [r7, #4]
 800f628:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800f62c:	f043 0204 	orr.w	r2, r3, #4
 800f630:	687b      	ldr	r3, [r7, #4]
 800f632:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
        }

        /* UART noise error interrupt occurred --------------------------------------*/
        if (((isrflags & USART_ISR_NE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
 800f636:	f8d7 30ac 	ldr.w	r3, [r7, #172]	@ 0xac
 800f63a:	f003 0304 	and.w	r3, r3, #4
 800f63e:	2b00      	cmp	r3, #0
 800f640:	d011      	beq.n	800f666 <UART_RxISR_8BIT_FIFOEN+0x12a>
 800f642:	f8d7 30a0 	ldr.w	r3, [r7, #160]	@ 0xa0
 800f646:	f003 0301 	and.w	r3, r3, #1
 800f64a:	2b00      	cmp	r3, #0
 800f64c:	d00b      	beq.n	800f666 <UART_RxISR_8BIT_FIFOEN+0x12a>
        {
          __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_NEF);
 800f64e:	687b      	ldr	r3, [r7, #4]
 800f650:	681b      	ldr	r3, [r3, #0]
 800f652:	2204      	movs	r2, #4
 800f654:	621a      	str	r2, [r3, #32]

          huart->ErrorCode |= HAL_UART_ERROR_NE;
 800f656:	687b      	ldr	r3, [r7, #4]
 800f658:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800f65c:	f043 0202 	orr.w	r2, r3, #2
 800f660:	687b      	ldr	r3, [r7, #4]
 800f662:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
        }

        /* Call UART Error Call back function if need be ----------------------------*/
        if (huart->ErrorCode != HAL_UART_ERROR_NONE)
 800f666:	687b      	ldr	r3, [r7, #4]
 800f668:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800f66c:	2b00      	cmp	r3, #0
 800f66e:	d006      	beq.n	800f67e <UART_RxISR_8BIT_FIFOEN+0x142>
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
          /*Call registered error callback*/
          huart->ErrorCallback(huart);
#else
          /*Call legacy weak error callback*/
          HAL_UART_ErrorCallback(huart);
 800f670:	6878      	ldr	r0, [r7, #4]
 800f672:	f7fe fb13 	bl	800dc9c <HAL_UART_ErrorCallback>
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
          huart->ErrorCode = HAL_UART_ERROR_NONE;
 800f676:	687b      	ldr	r3, [r7, #4]
 800f678:	2200      	movs	r2, #0
 800f67a:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
        }
      }

      if (huart->RxXferCount == 0U)
 800f67e:	687b      	ldr	r3, [r7, #4]
 800f680:	f8b3 305e 	ldrh.w	r3, [r3, #94]	@ 0x5e
 800f684:	b29b      	uxth	r3, r3
 800f686:	2b00      	cmp	r3, #0
 800f688:	f040 80a0 	bne.w	800f7cc <UART_RxISR_8BIT_FIFOEN+0x290>
      {
        /* Disable the UART Parity Error Interrupt and RXFT interrupt*/
        ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
 800f68c:	687b      	ldr	r3, [r7, #4]
 800f68e:	681b      	ldr	r3, [r3, #0]
 800f690:	673b      	str	r3, [r7, #112]	@ 0x70
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f692:	6f3b      	ldr	r3, [r7, #112]	@ 0x70
 800f694:	e853 3f00 	ldrex	r3, [r3]
 800f698:	66fb      	str	r3, [r7, #108]	@ 0x6c
   return(result);
 800f69a:	6efb      	ldr	r3, [r7, #108]	@ 0x6c
 800f69c:	f423 7380 	bic.w	r3, r3, #256	@ 0x100
 800f6a0:	f8c7 3098 	str.w	r3, [r7, #152]	@ 0x98
 800f6a4:	687b      	ldr	r3, [r7, #4]
 800f6a6:	681b      	ldr	r3, [r3, #0]
 800f6a8:	461a      	mov	r2, r3
 800f6aa:	f8d7 3098 	ldr.w	r3, [r7, #152]	@ 0x98
 800f6ae:	67fb      	str	r3, [r7, #124]	@ 0x7c
 800f6b0:	67ba      	str	r2, [r7, #120]	@ 0x78
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f6b2:	6fb9      	ldr	r1, [r7, #120]	@ 0x78
 800f6b4:	6ffa      	ldr	r2, [r7, #124]	@ 0x7c
 800f6b6:	e841 2300 	strex	r3, r2, [r1]
 800f6ba:	677b      	str	r3, [r7, #116]	@ 0x74
   return(result);
 800f6bc:	6f7b      	ldr	r3, [r7, #116]	@ 0x74
 800f6be:	2b00      	cmp	r3, #0
 800f6c0:	d1e4      	bne.n	800f68c <UART_RxISR_8BIT_FIFOEN+0x150>

        /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error)
           and RX FIFO Threshold interrupt */
        ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
 800f6c2:	687b      	ldr	r3, [r7, #4]
 800f6c4:	681b      	ldr	r3, [r3, #0]
 800f6c6:	3308      	adds	r3, #8
 800f6c8:	65fb      	str	r3, [r7, #92]	@ 0x5c
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f6ca:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 800f6cc:	e853 3f00 	ldrex	r3, [r3]
 800f6d0:	65bb      	str	r3, [r7, #88]	@ 0x58
   return(result);
 800f6d2:	6dba      	ldr	r2, [r7, #88]	@ 0x58
 800f6d4:	4b6e      	ldr	r3, [pc, #440]	@ (800f890 <UART_RxISR_8BIT_FIFOEN+0x354>)
 800f6d6:	4013      	ands	r3, r2
 800f6d8:	f8c7 3094 	str.w	r3, [r7, #148]	@ 0x94
 800f6dc:	687b      	ldr	r3, [r7, #4]
 800f6de:	681b      	ldr	r3, [r3, #0]
 800f6e0:	3308      	adds	r3, #8
 800f6e2:	f8d7 2094 	ldr.w	r2, [r7, #148]	@ 0x94
 800f6e6:	66ba      	str	r2, [r7, #104]	@ 0x68
 800f6e8:	667b      	str	r3, [r7, #100]	@ 0x64
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f6ea:	6e79      	ldr	r1, [r7, #100]	@ 0x64
 800f6ec:	6eba      	ldr	r2, [r7, #104]	@ 0x68
 800f6ee:	e841 2300 	strex	r3, r2, [r1]
 800f6f2:	663b      	str	r3, [r7, #96]	@ 0x60
   return(result);
 800f6f4:	6e3b      	ldr	r3, [r7, #96]	@ 0x60
 800f6f6:	2b00      	cmp	r3, #0
 800f6f8:	d1e3      	bne.n	800f6c2 <UART_RxISR_8BIT_FIFOEN+0x186>

        /* Rx process is completed, restore huart->RxState to Ready */
        huart->RxState = HAL_UART_STATE_READY;
 800f6fa:	687b      	ldr	r3, [r7, #4]
 800f6fc:	2220      	movs	r2, #32
 800f6fe:	f8c3 208c 	str.w	r2, [r3, #140]	@ 0x8c

        /* Clear RxISR function pointer */
        huart->RxISR = NULL;
 800f702:	687b      	ldr	r3, [r7, #4]
 800f704:	2200      	movs	r2, #0
 800f706:	675a      	str	r2, [r3, #116]	@ 0x74

        /* Initialize type of RxEvent to Transfer Complete */
        huart->RxEventType = HAL_UART_RXEVENT_TC;
 800f708:	687b      	ldr	r3, [r7, #4]
 800f70a:	2200      	movs	r2, #0
 800f70c:	671a      	str	r2, [r3, #112]	@ 0x70

        if (!(IS_LPUART_INSTANCE(huart->Instance)))
 800f70e:	687b      	ldr	r3, [r7, #4]
 800f710:	681b      	ldr	r3, [r3, #0]
 800f712:	4a60      	ldr	r2, [pc, #384]	@ (800f894 <UART_RxISR_8BIT_FIFOEN+0x358>)
 800f714:	4293      	cmp	r3, r2
 800f716:	d021      	beq.n	800f75c <UART_RxISR_8BIT_FIFOEN+0x220>
        {
          /* Check that USART RTOEN bit is set */
          if (READ_BIT(huart->Instance->CR2, USART_CR2_RTOEN) != 0U)
 800f718:	687b      	ldr	r3, [r7, #4]
 800f71a:	681b      	ldr	r3, [r3, #0]
 800f71c:	685b      	ldr	r3, [r3, #4]
 800f71e:	f403 0300 	and.w	r3, r3, #8388608	@ 0x800000
 800f722:	2b00      	cmp	r3, #0
 800f724:	d01a      	beq.n	800f75c <UART_RxISR_8BIT_FIFOEN+0x220>
          {
            /* Enable the UART Receiver Timeout Interrupt */
            ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_RTOIE);
 800f726:	687b      	ldr	r3, [r7, #4]
 800f728:	681b      	ldr	r3, [r3, #0]
 800f72a:	64bb      	str	r3, [r7, #72]	@ 0x48
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f72c:	6cbb      	ldr	r3, [r7, #72]	@ 0x48
 800f72e:	e853 3f00 	ldrex	r3, [r3]
 800f732:	647b      	str	r3, [r7, #68]	@ 0x44
   return(result);
 800f734:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 800f736:	f023 6380 	bic.w	r3, r3, #67108864	@ 0x4000000
 800f73a:	f8c7 3090 	str.w	r3, [r7, #144]	@ 0x90
 800f73e:	687b      	ldr	r3, [r7, #4]
 800f740:	681b      	ldr	r3, [r3, #0]
 800f742:	461a      	mov	r2, r3
 800f744:	f8d7 3090 	ldr.w	r3, [r7, #144]	@ 0x90
 800f748:	657b      	str	r3, [r7, #84]	@ 0x54
 800f74a:	653a      	str	r2, [r7, #80]	@ 0x50
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f74c:	6d39      	ldr	r1, [r7, #80]	@ 0x50
 800f74e:	6d7a      	ldr	r2, [r7, #84]	@ 0x54
 800f750:	e841 2300 	strex	r3, r2, [r1]
 800f754:	64fb      	str	r3, [r7, #76]	@ 0x4c
   return(result);
 800f756:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 800f758:	2b00      	cmp	r3, #0
 800f75a:	d1e4      	bne.n	800f726 <UART_RxISR_8BIT_FIFOEN+0x1ea>
          }
        }

        /* Check current reception Mode :
           If Reception till IDLE event has been selected : */
        if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
 800f75c:	687b      	ldr	r3, [r7, #4]
 800f75e:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 800f760:	2b01      	cmp	r3, #1
 800f762:	d130      	bne.n	800f7c6 <UART_RxISR_8BIT_FIFOEN+0x28a>
        {
          /* Set reception type to Standard */
          huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
 800f764:	687b      	ldr	r3, [r7, #4]
 800f766:	2200      	movs	r2, #0
 800f768:	66da      	str	r2, [r3, #108]	@ 0x6c

          /* Disable IDLE interrupt */
          ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
 800f76a:	687b      	ldr	r3, [r7, #4]
 800f76c:	681b      	ldr	r3, [r3, #0]
 800f76e:	637b      	str	r3, [r7, #52]	@ 0x34
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f770:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 800f772:	e853 3f00 	ldrex	r3, [r3]
 800f776:	633b      	str	r3, [r7, #48]	@ 0x30
   return(result);
 800f778:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800f77a:	f023 0310 	bic.w	r3, r3, #16
 800f77e:	f8c7 308c 	str.w	r3, [r7, #140]	@ 0x8c
 800f782:	687b      	ldr	r3, [r7, #4]
 800f784:	681b      	ldr	r3, [r3, #0]
 800f786:	461a      	mov	r2, r3
 800f788:	f8d7 308c 	ldr.w	r3, [r7, #140]	@ 0x8c
 800f78c:	643b      	str	r3, [r7, #64]	@ 0x40
 800f78e:	63fa      	str	r2, [r7, #60]	@ 0x3c
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f790:	6bf9      	ldr	r1, [r7, #60]	@ 0x3c
 800f792:	6c3a      	ldr	r2, [r7, #64]	@ 0x40
 800f794:	e841 2300 	strex	r3, r2, [r1]
 800f798:	63bb      	str	r3, [r7, #56]	@ 0x38
   return(result);
 800f79a:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800f79c:	2b00      	cmp	r3, #0
 800f79e:	d1e4      	bne.n	800f76a <UART_RxISR_8BIT_FIFOEN+0x22e>

          if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE) == SET)
 800f7a0:	687b      	ldr	r3, [r7, #4]
 800f7a2:	681b      	ldr	r3, [r3, #0]
 800f7a4:	69db      	ldr	r3, [r3, #28]
 800f7a6:	f003 0310 	and.w	r3, r3, #16
 800f7aa:	2b10      	cmp	r3, #16
 800f7ac:	d103      	bne.n	800f7b6 <UART_RxISR_8BIT_FIFOEN+0x27a>
          {
            /* Clear IDLE Flag */
            __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
 800f7ae:	687b      	ldr	r3, [r7, #4]
 800f7b0:	681b      	ldr	r3, [r3, #0]
 800f7b2:	2210      	movs	r2, #16
 800f7b4:	621a      	str	r2, [r3, #32]
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
          /*Call registered Rx Event callback*/
          huart->RxEventCallback(huart, huart->RxXferSize);
#else
          /*Call legacy weak Rx Event callback*/
          HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize);
 800f7b6:	687b      	ldr	r3, [r7, #4]
 800f7b8:	f8b3 305c 	ldrh.w	r3, [r3, #92]	@ 0x5c
 800f7bc:	4619      	mov	r1, r3
 800f7be:	6878      	ldr	r0, [r7, #4]
 800f7c0:	f7f4 fd04 	bl	80041cc <HAL_UARTEx_RxEventCallback>
 800f7c4:	e002      	b.n	800f7cc <UART_RxISR_8BIT_FIFOEN+0x290>
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
          /*Call registered Rx complete callback*/
          huart->RxCpltCallback(huart);
#else
          /*Call legacy weak Rx complete callback*/
          HAL_UART_RxCpltCallback(huart);
 800f7c6:	6878      	ldr	r0, [r7, #4]
 800f7c8:	f7f4 fcf6 	bl	80041b8 <HAL_UART_RxCpltCallback>
    while ((nb_rx_data > 0U) && ((isrflags & USART_ISR_RXNE_RXFNE) != 0U))
 800f7cc:	f8b7 309e 	ldrh.w	r3, [r7, #158]	@ 0x9e
 800f7d0:	2b00      	cmp	r3, #0
 800f7d2:	d006      	beq.n	800f7e2 <UART_RxISR_8BIT_FIFOEN+0x2a6>
 800f7d4:	f8d7 30ac 	ldr.w	r3, [r7, #172]	@ 0xac
 800f7d8:	f003 0320 	and.w	r3, r3, #32
 800f7dc:	2b00      	cmp	r3, #0
 800f7de:	f47f aed1 	bne.w	800f584 <UART_RxISR_8BIT_FIFOEN+0x48>

    /* When remaining number of bytes to receive is less than the RX FIFO
    threshold, next incoming frames are processed as if FIFO mode was
    disabled (i.e. one interrupt per received frame).
    */
    rxdatacount = huart->RxXferCount;
 800f7e2:	687b      	ldr	r3, [r7, #4]
 800f7e4:	f8b3 305e 	ldrh.w	r3, [r3, #94]	@ 0x5e
 800f7e8:	f8a7 308a 	strh.w	r3, [r7, #138]	@ 0x8a
    if ((rxdatacount != 0U) && (rxdatacount < huart->NbRxDataToProcess))
 800f7ec:	f8b7 308a 	ldrh.w	r3, [r7, #138]	@ 0x8a
 800f7f0:	2b00      	cmp	r3, #0
 800f7f2:	d049      	beq.n	800f888 <UART_RxISR_8BIT_FIFOEN+0x34c>
 800f7f4:	687b      	ldr	r3, [r7, #4]
 800f7f6:	f8b3 3068 	ldrh.w	r3, [r3, #104]	@ 0x68
 800f7fa:	f8b7 208a 	ldrh.w	r2, [r7, #138]	@ 0x8a
 800f7fe:	429a      	cmp	r2, r3
 800f800:	d242      	bcs.n	800f888 <UART_RxISR_8BIT_FIFOEN+0x34c>
    {
      /* Disable the UART RXFT interrupt*/
      ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_RXFTIE);
 800f802:	687b      	ldr	r3, [r7, #4]
 800f804:	681b      	ldr	r3, [r3, #0]
 800f806:	3308      	adds	r3, #8
 800f808:	623b      	str	r3, [r7, #32]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f80a:	6a3b      	ldr	r3, [r7, #32]
 800f80c:	e853 3f00 	ldrex	r3, [r3]
 800f810:	61fb      	str	r3, [r7, #28]
   return(result);
 800f812:	69fb      	ldr	r3, [r7, #28]
 800f814:	f023 5380 	bic.w	r3, r3, #268435456	@ 0x10000000
 800f818:	f8c7 3084 	str.w	r3, [r7, #132]	@ 0x84
 800f81c:	687b      	ldr	r3, [r7, #4]
 800f81e:	681b      	ldr	r3, [r3, #0]
 800f820:	3308      	adds	r3, #8
 800f822:	f8d7 2084 	ldr.w	r2, [r7, #132]	@ 0x84
 800f826:	62fa      	str	r2, [r7, #44]	@ 0x2c
 800f828:	62bb      	str	r3, [r7, #40]	@ 0x28
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f82a:	6ab9      	ldr	r1, [r7, #40]	@ 0x28
 800f82c:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 800f82e:	e841 2300 	strex	r3, r2, [r1]
 800f832:	627b      	str	r3, [r7, #36]	@ 0x24
   return(result);
 800f834:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800f836:	2b00      	cmp	r3, #0
 800f838:	d1e3      	bne.n	800f802 <UART_RxISR_8BIT_FIFOEN+0x2c6>

      /* Update the RxISR function pointer */
      huart->RxISR = UART_RxISR_8BIT;
 800f83a:	687b      	ldr	r3, [r7, #4]
 800f83c:	4a16      	ldr	r2, [pc, #88]	@ (800f898 <UART_RxISR_8BIT_FIFOEN+0x35c>)
 800f83e:	675a      	str	r2, [r3, #116]	@ 0x74

      /* Enable the UART Data Register Not Empty interrupt */
      ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE);
 800f840:	687b      	ldr	r3, [r7, #4]
 800f842:	681b      	ldr	r3, [r3, #0]
 800f844:	60fb      	str	r3, [r7, #12]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f846:	68fb      	ldr	r3, [r7, #12]
 800f848:	e853 3f00 	ldrex	r3, [r3]
 800f84c:	60bb      	str	r3, [r7, #8]
   return(result);
 800f84e:	68bb      	ldr	r3, [r7, #8]
 800f850:	f043 0320 	orr.w	r3, r3, #32
 800f854:	f8c7 3080 	str.w	r3, [r7, #128]	@ 0x80
 800f858:	687b      	ldr	r3, [r7, #4]
 800f85a:	681b      	ldr	r3, [r3, #0]
 800f85c:	461a      	mov	r2, r3
 800f85e:	f8d7 3080 	ldr.w	r3, [r7, #128]	@ 0x80
 800f862:	61bb      	str	r3, [r7, #24]
 800f864:	617a      	str	r2, [r7, #20]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f866:	6979      	ldr	r1, [r7, #20]
 800f868:	69ba      	ldr	r2, [r7, #24]
 800f86a:	e841 2300 	strex	r3, r2, [r1]
 800f86e:	613b      	str	r3, [r7, #16]
   return(result);
 800f870:	693b      	ldr	r3, [r7, #16]
 800f872:	2b00      	cmp	r3, #0
 800f874:	d1e4      	bne.n	800f840 <UART_RxISR_8BIT_FIFOEN+0x304>
  else
  {
    /* Clear RXNE interrupt flag */
    __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
  }
}
 800f876:	e007      	b.n	800f888 <UART_RxISR_8BIT_FIFOEN+0x34c>
    __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
 800f878:	687b      	ldr	r3, [r7, #4]
 800f87a:	681b      	ldr	r3, [r3, #0]
 800f87c:	699a      	ldr	r2, [r3, #24]
 800f87e:	687b      	ldr	r3, [r7, #4]
 800f880:	681b      	ldr	r3, [r3, #0]
 800f882:	f042 0208 	orr.w	r2, r2, #8
 800f886:	619a      	str	r2, [r3, #24]
}
 800f888:	bf00      	nop
 800f88a:	37b0      	adds	r7, #176	@ 0xb0
 800f88c:	46bd      	mov	sp, r7
 800f88e:	bd80      	pop	{r7, pc}
 800f890:	effffffe 	.word	0xeffffffe
 800f894:	58000c00 	.word	0x58000c00
 800f898:	0800f1cd 	.word	0x0800f1cd

0800f89c <UART_RxISR_16BIT_FIFOEN>:
  *         interruptions have been enabled by HAL_UART_Receive_IT()
  * @param huart UART handle.
  * @retval None
  */
static void UART_RxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart)
{
 800f89c:	b580      	push	{r7, lr}
 800f89e:	b0ae      	sub	sp, #184	@ 0xb8
 800f8a0:	af00      	add	r7, sp, #0
 800f8a2:	6078      	str	r0, [r7, #4]
  uint16_t *tmp;
  uint16_t  uhMask = huart->Mask;
 800f8a4:	687b      	ldr	r3, [r7, #4]
 800f8a6:	f8b3 3060 	ldrh.w	r3, [r3, #96]	@ 0x60
 800f8aa:	f8a7 30b2 	strh.w	r3, [r7, #178]	@ 0xb2
  uint16_t  uhdata;
  uint16_t  nb_rx_data;
  uint16_t  rxdatacount;
  uint32_t  isrflags = READ_REG(huart->Instance->ISR);
 800f8ae:	687b      	ldr	r3, [r7, #4]
 800f8b0:	681b      	ldr	r3, [r3, #0]
 800f8b2:	69db      	ldr	r3, [r3, #28]
 800f8b4:	f8c7 30b4 	str.w	r3, [r7, #180]	@ 0xb4
  uint32_t  cr1its   = READ_REG(huart->Instance->CR1);
 800f8b8:	687b      	ldr	r3, [r7, #4]
 800f8ba:	681b      	ldr	r3, [r3, #0]
 800f8bc:	681b      	ldr	r3, [r3, #0]
 800f8be:	f8c7 30ac 	str.w	r3, [r7, #172]	@ 0xac
  uint32_t  cr3its   = READ_REG(huart->Instance->CR3);
 800f8c2:	687b      	ldr	r3, [r7, #4]
 800f8c4:	681b      	ldr	r3, [r3, #0]
 800f8c6:	689b      	ldr	r3, [r3, #8]
 800f8c8:	f8c7 30a8 	str.w	r3, [r7, #168]	@ 0xa8

  /* Check that a Rx process is ongoing */
  if (huart->RxState == HAL_UART_STATE_BUSY_RX)
 800f8cc:	687b      	ldr	r3, [r7, #4]
 800f8ce:	f8d3 308c 	ldr.w	r3, [r3, #140]	@ 0x8c
 800f8d2:	2b22      	cmp	r3, #34	@ 0x22
 800f8d4:	f040 8184 	bne.w	800fbe0 <UART_RxISR_16BIT_FIFOEN+0x344>
  {
    nb_rx_data = huart->NbRxDataToProcess;
 800f8d8:	687b      	ldr	r3, [r7, #4]
 800f8da:	f8b3 3068 	ldrh.w	r3, [r3, #104]	@ 0x68
 800f8de:	f8a7 30a6 	strh.w	r3, [r7, #166]	@ 0xa6
    while ((nb_rx_data > 0U) && ((isrflags & USART_ISR_RXNE_RXFNE) != 0U))
 800f8e2:	e127      	b.n	800fb34 <UART_RxISR_16BIT_FIFOEN+0x298>
    {
      uhdata = (uint16_t) READ_REG(huart->Instance->RDR);
 800f8e4:	687b      	ldr	r3, [r7, #4]
 800f8e6:	681b      	ldr	r3, [r3, #0]
 800f8e8:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 800f8ea:	f8a7 30a4 	strh.w	r3, [r7, #164]	@ 0xa4
      tmp = (uint16_t *) huart->pRxBuffPtr ;
 800f8ee:	687b      	ldr	r3, [r7, #4]
 800f8f0:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800f8f2:	f8c7 30a0 	str.w	r3, [r7, #160]	@ 0xa0
      *tmp = (uint16_t)(uhdata & uhMask);
 800f8f6:	f8b7 20a4 	ldrh.w	r2, [r7, #164]	@ 0xa4
 800f8fa:	f8b7 30b2 	ldrh.w	r3, [r7, #178]	@ 0xb2
 800f8fe:	4013      	ands	r3, r2
 800f900:	b29a      	uxth	r2, r3
 800f902:	f8d7 30a0 	ldr.w	r3, [r7, #160]	@ 0xa0
 800f906:	801a      	strh	r2, [r3, #0]
      huart->pRxBuffPtr += 2U;
 800f908:	687b      	ldr	r3, [r7, #4]
 800f90a:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800f90c:	1c9a      	adds	r2, r3, #2
 800f90e:	687b      	ldr	r3, [r7, #4]
 800f910:	659a      	str	r2, [r3, #88]	@ 0x58
      huart->RxXferCount--;
 800f912:	687b      	ldr	r3, [r7, #4]
 800f914:	f8b3 305e 	ldrh.w	r3, [r3, #94]	@ 0x5e
 800f918:	b29b      	uxth	r3, r3
 800f91a:	3b01      	subs	r3, #1
 800f91c:	b29a      	uxth	r2, r3
 800f91e:	687b      	ldr	r3, [r7, #4]
 800f920:	f8a3 205e 	strh.w	r2, [r3, #94]	@ 0x5e
      isrflags = READ_REG(huart->Instance->ISR);
 800f924:	687b      	ldr	r3, [r7, #4]
 800f926:	681b      	ldr	r3, [r3, #0]
 800f928:	69db      	ldr	r3, [r3, #28]
 800f92a:	f8c7 30b4 	str.w	r3, [r7, #180]	@ 0xb4

      /* If some non blocking errors occurred */
      if ((isrflags & (USART_ISR_PE | USART_ISR_FE | USART_ISR_NE)) != 0U)
 800f92e:	f8d7 30b4 	ldr.w	r3, [r7, #180]	@ 0xb4
 800f932:	f003 0307 	and.w	r3, r3, #7
 800f936:	2b00      	cmp	r3, #0
 800f938:	d053      	beq.n	800f9e2 <UART_RxISR_16BIT_FIFOEN+0x146>
      {
        /* UART parity error interrupt occurred -------------------------------------*/
        if (((isrflags & USART_ISR_PE) != 0U) && ((cr1its & USART_CR1_PEIE) != 0U))
 800f93a:	f8d7 30b4 	ldr.w	r3, [r7, #180]	@ 0xb4
 800f93e:	f003 0301 	and.w	r3, r3, #1
 800f942:	2b00      	cmp	r3, #0
 800f944:	d011      	beq.n	800f96a <UART_RxISR_16BIT_FIFOEN+0xce>
 800f946:	f8d7 30ac 	ldr.w	r3, [r7, #172]	@ 0xac
 800f94a:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 800f94e:	2b00      	cmp	r3, #0
 800f950:	d00b      	beq.n	800f96a <UART_RxISR_16BIT_FIFOEN+0xce>
        {
          __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF);
 800f952:	687b      	ldr	r3, [r7, #4]
 800f954:	681b      	ldr	r3, [r3, #0]
 800f956:	2201      	movs	r2, #1
 800f958:	621a      	str	r2, [r3, #32]

          huart->ErrorCode |= HAL_UART_ERROR_PE;
 800f95a:	687b      	ldr	r3, [r7, #4]
 800f95c:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800f960:	f043 0201 	orr.w	r2, r3, #1
 800f964:	687b      	ldr	r3, [r7, #4]
 800f966:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
        }

        /* UART frame error interrupt occurred --------------------------------------*/
        if (((isrflags & USART_ISR_FE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
 800f96a:	f8d7 30b4 	ldr.w	r3, [r7, #180]	@ 0xb4
 800f96e:	f003 0302 	and.w	r3, r3, #2
 800f972:	2b00      	cmp	r3, #0
 800f974:	d011      	beq.n	800f99a <UART_RxISR_16BIT_FIFOEN+0xfe>
 800f976:	f8d7 30a8 	ldr.w	r3, [r7, #168]	@ 0xa8
 800f97a:	f003 0301 	and.w	r3, r3, #1
 800f97e:	2b00      	cmp	r3, #0
 800f980:	d00b      	beq.n	800f99a <UART_RxISR_16BIT_FIFOEN+0xfe>
        {
          __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_FEF);
 800f982:	687b      	ldr	r3, [r7, #4]
 800f984:	681b      	ldr	r3, [r3, #0]
 800f986:	2202      	movs	r2, #2
 800f988:	621a      	str	r2, [r3, #32]

          huart->ErrorCode |= HAL_UART_ERROR_FE;
 800f98a:	687b      	ldr	r3, [r7, #4]
 800f98c:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800f990:	f043 0204 	orr.w	r2, r3, #4
 800f994:	687b      	ldr	r3, [r7, #4]
 800f996:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
        }

        /* UART noise error interrupt occurred --------------------------------------*/
        if (((isrflags & USART_ISR_NE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
 800f99a:	f8d7 30b4 	ldr.w	r3, [r7, #180]	@ 0xb4
 800f99e:	f003 0304 	and.w	r3, r3, #4
 800f9a2:	2b00      	cmp	r3, #0
 800f9a4:	d011      	beq.n	800f9ca <UART_RxISR_16BIT_FIFOEN+0x12e>
 800f9a6:	f8d7 30a8 	ldr.w	r3, [r7, #168]	@ 0xa8
 800f9aa:	f003 0301 	and.w	r3, r3, #1
 800f9ae:	2b00      	cmp	r3, #0
 800f9b0:	d00b      	beq.n	800f9ca <UART_RxISR_16BIT_FIFOEN+0x12e>
        {
          __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_NEF);
 800f9b2:	687b      	ldr	r3, [r7, #4]
 800f9b4:	681b      	ldr	r3, [r3, #0]
 800f9b6:	2204      	movs	r2, #4
 800f9b8:	621a      	str	r2, [r3, #32]

          huart->ErrorCode |= HAL_UART_ERROR_NE;
 800f9ba:	687b      	ldr	r3, [r7, #4]
 800f9bc:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800f9c0:	f043 0202 	orr.w	r2, r3, #2
 800f9c4:	687b      	ldr	r3, [r7, #4]
 800f9c6:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
        }

        /* Call UART Error Call back function if need be ----------------------------*/
        if (huart->ErrorCode != HAL_UART_ERROR_NONE)
 800f9ca:	687b      	ldr	r3, [r7, #4]
 800f9cc:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800f9d0:	2b00      	cmp	r3, #0
 800f9d2:	d006      	beq.n	800f9e2 <UART_RxISR_16BIT_FIFOEN+0x146>
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
          /*Call registered error callback*/
          huart->ErrorCallback(huart);
#else
          /*Call legacy weak error callback*/
          HAL_UART_ErrorCallback(huart);
 800f9d4:	6878      	ldr	r0, [r7, #4]
 800f9d6:	f7fe f961 	bl	800dc9c <HAL_UART_ErrorCallback>
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
          huart->ErrorCode = HAL_UART_ERROR_NONE;
 800f9da:	687b      	ldr	r3, [r7, #4]
 800f9dc:	2200      	movs	r2, #0
 800f9de:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
        }
      }

      if (huart->RxXferCount == 0U)
 800f9e2:	687b      	ldr	r3, [r7, #4]
 800f9e4:	f8b3 305e 	ldrh.w	r3, [r3, #94]	@ 0x5e
 800f9e8:	b29b      	uxth	r3, r3
 800f9ea:	2b00      	cmp	r3, #0
 800f9ec:	f040 80a2 	bne.w	800fb34 <UART_RxISR_16BIT_FIFOEN+0x298>
      {
        /* Disable the UART Parity Error Interrupt and RXFT interrupt*/
        ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
 800f9f0:	687b      	ldr	r3, [r7, #4]
 800f9f2:	681b      	ldr	r3, [r3, #0]
 800f9f4:	677b      	str	r3, [r7, #116]	@ 0x74
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f9f6:	6f7b      	ldr	r3, [r7, #116]	@ 0x74
 800f9f8:	e853 3f00 	ldrex	r3, [r3]
 800f9fc:	673b      	str	r3, [r7, #112]	@ 0x70
   return(result);
 800f9fe:	6f3b      	ldr	r3, [r7, #112]	@ 0x70
 800fa00:	f423 7380 	bic.w	r3, r3, #256	@ 0x100
 800fa04:	f8c7 309c 	str.w	r3, [r7, #156]	@ 0x9c
 800fa08:	687b      	ldr	r3, [r7, #4]
 800fa0a:	681b      	ldr	r3, [r3, #0]
 800fa0c:	461a      	mov	r2, r3
 800fa0e:	f8d7 309c 	ldr.w	r3, [r7, #156]	@ 0x9c
 800fa12:	f8c7 3080 	str.w	r3, [r7, #128]	@ 0x80
 800fa16:	67fa      	str	r2, [r7, #124]	@ 0x7c
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800fa18:	6ff9      	ldr	r1, [r7, #124]	@ 0x7c
 800fa1a:	f8d7 2080 	ldr.w	r2, [r7, #128]	@ 0x80
 800fa1e:	e841 2300 	strex	r3, r2, [r1]
 800fa22:	67bb      	str	r3, [r7, #120]	@ 0x78
   return(result);
 800fa24:	6fbb      	ldr	r3, [r7, #120]	@ 0x78
 800fa26:	2b00      	cmp	r3, #0
 800fa28:	d1e2      	bne.n	800f9f0 <UART_RxISR_16BIT_FIFOEN+0x154>

        /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error)
           and RX FIFO Threshold interrupt */
        ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
 800fa2a:	687b      	ldr	r3, [r7, #4]
 800fa2c:	681b      	ldr	r3, [r3, #0]
 800fa2e:	3308      	adds	r3, #8
 800fa30:	663b      	str	r3, [r7, #96]	@ 0x60
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800fa32:	6e3b      	ldr	r3, [r7, #96]	@ 0x60
 800fa34:	e853 3f00 	ldrex	r3, [r3]
 800fa38:	65fb      	str	r3, [r7, #92]	@ 0x5c
   return(result);
 800fa3a:	6dfa      	ldr	r2, [r7, #92]	@ 0x5c
 800fa3c:	4b6e      	ldr	r3, [pc, #440]	@ (800fbf8 <UART_RxISR_16BIT_FIFOEN+0x35c>)
 800fa3e:	4013      	ands	r3, r2
 800fa40:	f8c7 3098 	str.w	r3, [r7, #152]	@ 0x98
 800fa44:	687b      	ldr	r3, [r7, #4]
 800fa46:	681b      	ldr	r3, [r3, #0]
 800fa48:	3308      	adds	r3, #8
 800fa4a:	f8d7 2098 	ldr.w	r2, [r7, #152]	@ 0x98
 800fa4e:	66fa      	str	r2, [r7, #108]	@ 0x6c
 800fa50:	66bb      	str	r3, [r7, #104]	@ 0x68
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800fa52:	6eb9      	ldr	r1, [r7, #104]	@ 0x68
 800fa54:	6efa      	ldr	r2, [r7, #108]	@ 0x6c
 800fa56:	e841 2300 	strex	r3, r2, [r1]
 800fa5a:	667b      	str	r3, [r7, #100]	@ 0x64
   return(result);
 800fa5c:	6e7b      	ldr	r3, [r7, #100]	@ 0x64
 800fa5e:	2b00      	cmp	r3, #0
 800fa60:	d1e3      	bne.n	800fa2a <UART_RxISR_16BIT_FIFOEN+0x18e>

        /* Rx process is completed, restore huart->RxState to Ready */
        huart->RxState = HAL_UART_STATE_READY;
 800fa62:	687b      	ldr	r3, [r7, #4]
 800fa64:	2220      	movs	r2, #32
 800fa66:	f8c3 208c 	str.w	r2, [r3, #140]	@ 0x8c

        /* Clear RxISR function pointer */
        huart->RxISR = NULL;
 800fa6a:	687b      	ldr	r3, [r7, #4]
 800fa6c:	2200      	movs	r2, #0
 800fa6e:	675a      	str	r2, [r3, #116]	@ 0x74

        /* Initialize type of RxEvent to Transfer Complete */
        huart->RxEventType = HAL_UART_RXEVENT_TC;
 800fa70:	687b      	ldr	r3, [r7, #4]
 800fa72:	2200      	movs	r2, #0
 800fa74:	671a      	str	r2, [r3, #112]	@ 0x70

        if (!(IS_LPUART_INSTANCE(huart->Instance)))
 800fa76:	687b      	ldr	r3, [r7, #4]
 800fa78:	681b      	ldr	r3, [r3, #0]
 800fa7a:	4a60      	ldr	r2, [pc, #384]	@ (800fbfc <UART_RxISR_16BIT_FIFOEN+0x360>)
 800fa7c:	4293      	cmp	r3, r2
 800fa7e:	d021      	beq.n	800fac4 <UART_RxISR_16BIT_FIFOEN+0x228>
        {
          /* Check that USART RTOEN bit is set */
          if (READ_BIT(huart->Instance->CR2, USART_CR2_RTOEN) != 0U)
 800fa80:	687b      	ldr	r3, [r7, #4]
 800fa82:	681b      	ldr	r3, [r3, #0]
 800fa84:	685b      	ldr	r3, [r3, #4]
 800fa86:	f403 0300 	and.w	r3, r3, #8388608	@ 0x800000
 800fa8a:	2b00      	cmp	r3, #0
 800fa8c:	d01a      	beq.n	800fac4 <UART_RxISR_16BIT_FIFOEN+0x228>
          {
            /* Enable the UART Receiver Timeout Interrupt */
            ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_RTOIE);
 800fa8e:	687b      	ldr	r3, [r7, #4]
 800fa90:	681b      	ldr	r3, [r3, #0]
 800fa92:	64fb      	str	r3, [r7, #76]	@ 0x4c
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800fa94:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 800fa96:	e853 3f00 	ldrex	r3, [r3]
 800fa9a:	64bb      	str	r3, [r7, #72]	@ 0x48
   return(result);
 800fa9c:	6cbb      	ldr	r3, [r7, #72]	@ 0x48
 800fa9e:	f023 6380 	bic.w	r3, r3, #67108864	@ 0x4000000
 800faa2:	f8c7 3094 	str.w	r3, [r7, #148]	@ 0x94
 800faa6:	687b      	ldr	r3, [r7, #4]
 800faa8:	681b      	ldr	r3, [r3, #0]
 800faaa:	461a      	mov	r2, r3
 800faac:	f8d7 3094 	ldr.w	r3, [r7, #148]	@ 0x94
 800fab0:	65bb      	str	r3, [r7, #88]	@ 0x58
 800fab2:	657a      	str	r2, [r7, #84]	@ 0x54
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800fab4:	6d79      	ldr	r1, [r7, #84]	@ 0x54
 800fab6:	6dba      	ldr	r2, [r7, #88]	@ 0x58
 800fab8:	e841 2300 	strex	r3, r2, [r1]
 800fabc:	653b      	str	r3, [r7, #80]	@ 0x50
   return(result);
 800fabe:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 800fac0:	2b00      	cmp	r3, #0
 800fac2:	d1e4      	bne.n	800fa8e <UART_RxISR_16BIT_FIFOEN+0x1f2>
          }
        }

        /* Check current reception Mode :
           If Reception till IDLE event has been selected : */
        if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
 800fac4:	687b      	ldr	r3, [r7, #4]
 800fac6:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 800fac8:	2b01      	cmp	r3, #1
 800faca:	d130      	bne.n	800fb2e <UART_RxISR_16BIT_FIFOEN+0x292>
        {
          /* Set reception type to Standard */
          huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
 800facc:	687b      	ldr	r3, [r7, #4]
 800face:	2200      	movs	r2, #0
 800fad0:	66da      	str	r2, [r3, #108]	@ 0x6c

          /* Disable IDLE interrupt */
          ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
 800fad2:	687b      	ldr	r3, [r7, #4]
 800fad4:	681b      	ldr	r3, [r3, #0]
 800fad6:	63bb      	str	r3, [r7, #56]	@ 0x38
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800fad8:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800fada:	e853 3f00 	ldrex	r3, [r3]
 800fade:	637b      	str	r3, [r7, #52]	@ 0x34
   return(result);
 800fae0:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 800fae2:	f023 0310 	bic.w	r3, r3, #16
 800fae6:	f8c7 3090 	str.w	r3, [r7, #144]	@ 0x90
 800faea:	687b      	ldr	r3, [r7, #4]
 800faec:	681b      	ldr	r3, [r3, #0]
 800faee:	461a      	mov	r2, r3
 800faf0:	f8d7 3090 	ldr.w	r3, [r7, #144]	@ 0x90
 800faf4:	647b      	str	r3, [r7, #68]	@ 0x44
 800faf6:	643a      	str	r2, [r7, #64]	@ 0x40
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800faf8:	6c39      	ldr	r1, [r7, #64]	@ 0x40
 800fafa:	6c7a      	ldr	r2, [r7, #68]	@ 0x44
 800fafc:	e841 2300 	strex	r3, r2, [r1]
 800fb00:	63fb      	str	r3, [r7, #60]	@ 0x3c
   return(result);
 800fb02:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800fb04:	2b00      	cmp	r3, #0
 800fb06:	d1e4      	bne.n	800fad2 <UART_RxISR_16BIT_FIFOEN+0x236>

          if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE) == SET)
 800fb08:	687b      	ldr	r3, [r7, #4]
 800fb0a:	681b      	ldr	r3, [r3, #0]
 800fb0c:	69db      	ldr	r3, [r3, #28]
 800fb0e:	f003 0310 	and.w	r3, r3, #16
 800fb12:	2b10      	cmp	r3, #16
 800fb14:	d103      	bne.n	800fb1e <UART_RxISR_16BIT_FIFOEN+0x282>
          {
            /* Clear IDLE Flag */
            __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
 800fb16:	687b      	ldr	r3, [r7, #4]
 800fb18:	681b      	ldr	r3, [r3, #0]
 800fb1a:	2210      	movs	r2, #16
 800fb1c:	621a      	str	r2, [r3, #32]
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
          /*Call registered Rx Event callback*/
          huart->RxEventCallback(huart, huart->RxXferSize);
#else
          /*Call legacy weak Rx Event callback*/
          HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize);
 800fb1e:	687b      	ldr	r3, [r7, #4]
 800fb20:	f8b3 305c 	ldrh.w	r3, [r3, #92]	@ 0x5c
 800fb24:	4619      	mov	r1, r3
 800fb26:	6878      	ldr	r0, [r7, #4]
 800fb28:	f7f4 fb50 	bl	80041cc <HAL_UARTEx_RxEventCallback>
 800fb2c:	e002      	b.n	800fb34 <UART_RxISR_16BIT_FIFOEN+0x298>
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
          /*Call registered Rx complete callback*/
          huart->RxCpltCallback(huart);
#else
          /*Call legacy weak Rx complete callback*/
          HAL_UART_RxCpltCallback(huart);
 800fb2e:	6878      	ldr	r0, [r7, #4]
 800fb30:	f7f4 fb42 	bl	80041b8 <HAL_UART_RxCpltCallback>
    while ((nb_rx_data > 0U) && ((isrflags & USART_ISR_RXNE_RXFNE) != 0U))
 800fb34:	f8b7 30a6 	ldrh.w	r3, [r7, #166]	@ 0xa6
 800fb38:	2b00      	cmp	r3, #0
 800fb3a:	d006      	beq.n	800fb4a <UART_RxISR_16BIT_FIFOEN+0x2ae>
 800fb3c:	f8d7 30b4 	ldr.w	r3, [r7, #180]	@ 0xb4
 800fb40:	f003 0320 	and.w	r3, r3, #32
 800fb44:	2b00      	cmp	r3, #0
 800fb46:	f47f aecd 	bne.w	800f8e4 <UART_RxISR_16BIT_FIFOEN+0x48>

    /* When remaining number of bytes to receive is less than the RX FIFO
    threshold, next incoming frames are processed as if FIFO mode was
    disabled (i.e. one interrupt per received frame).
    */
    rxdatacount = huart->RxXferCount;
 800fb4a:	687b      	ldr	r3, [r7, #4]
 800fb4c:	f8b3 305e 	ldrh.w	r3, [r3, #94]	@ 0x5e
 800fb50:	f8a7 308e 	strh.w	r3, [r7, #142]	@ 0x8e
    if ((rxdatacount != 0U) && (rxdatacount < huart->NbRxDataToProcess))
 800fb54:	f8b7 308e 	ldrh.w	r3, [r7, #142]	@ 0x8e
 800fb58:	2b00      	cmp	r3, #0
 800fb5a:	d049      	beq.n	800fbf0 <UART_RxISR_16BIT_FIFOEN+0x354>
 800fb5c:	687b      	ldr	r3, [r7, #4]
 800fb5e:	f8b3 3068 	ldrh.w	r3, [r3, #104]	@ 0x68
 800fb62:	f8b7 208e 	ldrh.w	r2, [r7, #142]	@ 0x8e
 800fb66:	429a      	cmp	r2, r3
 800fb68:	d242      	bcs.n	800fbf0 <UART_RxISR_16BIT_FIFOEN+0x354>
    {
      /* Disable the UART RXFT interrupt*/
      ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_RXFTIE);
 800fb6a:	687b      	ldr	r3, [r7, #4]
 800fb6c:	681b      	ldr	r3, [r3, #0]
 800fb6e:	3308      	adds	r3, #8
 800fb70:	627b      	str	r3, [r7, #36]	@ 0x24
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800fb72:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800fb74:	e853 3f00 	ldrex	r3, [r3]
 800fb78:	623b      	str	r3, [r7, #32]
   return(result);
 800fb7a:	6a3b      	ldr	r3, [r7, #32]
 800fb7c:	f023 5380 	bic.w	r3, r3, #268435456	@ 0x10000000
 800fb80:	f8c7 3088 	str.w	r3, [r7, #136]	@ 0x88
 800fb84:	687b      	ldr	r3, [r7, #4]
 800fb86:	681b      	ldr	r3, [r3, #0]
 800fb88:	3308      	adds	r3, #8
 800fb8a:	f8d7 2088 	ldr.w	r2, [r7, #136]	@ 0x88
 800fb8e:	633a      	str	r2, [r7, #48]	@ 0x30
 800fb90:	62fb      	str	r3, [r7, #44]	@ 0x2c
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800fb92:	6af9      	ldr	r1, [r7, #44]	@ 0x2c
 800fb94:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 800fb96:	e841 2300 	strex	r3, r2, [r1]
 800fb9a:	62bb      	str	r3, [r7, #40]	@ 0x28
   return(result);
 800fb9c:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 800fb9e:	2b00      	cmp	r3, #0
 800fba0:	d1e3      	bne.n	800fb6a <UART_RxISR_16BIT_FIFOEN+0x2ce>

      /* Update the RxISR function pointer */
      huart->RxISR = UART_RxISR_16BIT;
 800fba2:	687b      	ldr	r3, [r7, #4]
 800fba4:	4a16      	ldr	r2, [pc, #88]	@ (800fc00 <UART_RxISR_16BIT_FIFOEN+0x364>)
 800fba6:	675a      	str	r2, [r3, #116]	@ 0x74

      /* Enable the UART Data Register Not Empty interrupt */
      ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE);
 800fba8:	687b      	ldr	r3, [r7, #4]
 800fbaa:	681b      	ldr	r3, [r3, #0]
 800fbac:	613b      	str	r3, [r7, #16]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800fbae:	693b      	ldr	r3, [r7, #16]
 800fbb0:	e853 3f00 	ldrex	r3, [r3]
 800fbb4:	60fb      	str	r3, [r7, #12]
   return(result);
 800fbb6:	68fb      	ldr	r3, [r7, #12]
 800fbb8:	f043 0320 	orr.w	r3, r3, #32
 800fbbc:	f8c7 3084 	str.w	r3, [r7, #132]	@ 0x84
 800fbc0:	687b      	ldr	r3, [r7, #4]
 800fbc2:	681b      	ldr	r3, [r3, #0]
 800fbc4:	461a      	mov	r2, r3
 800fbc6:	f8d7 3084 	ldr.w	r3, [r7, #132]	@ 0x84
 800fbca:	61fb      	str	r3, [r7, #28]
 800fbcc:	61ba      	str	r2, [r7, #24]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800fbce:	69b9      	ldr	r1, [r7, #24]
 800fbd0:	69fa      	ldr	r2, [r7, #28]
 800fbd2:	e841 2300 	strex	r3, r2, [r1]
 800fbd6:	617b      	str	r3, [r7, #20]
   return(result);
 800fbd8:	697b      	ldr	r3, [r7, #20]
 800fbda:	2b00      	cmp	r3, #0
 800fbdc:	d1e4      	bne.n	800fba8 <UART_RxISR_16BIT_FIFOEN+0x30c>
  else
  {
    /* Clear RXNE interrupt flag */
    __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
  }
}
 800fbde:	e007      	b.n	800fbf0 <UART_RxISR_16BIT_FIFOEN+0x354>
    __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
 800fbe0:	687b      	ldr	r3, [r7, #4]
 800fbe2:	681b      	ldr	r3, [r3, #0]
 800fbe4:	699a      	ldr	r2, [r3, #24]
 800fbe6:	687b      	ldr	r3, [r7, #4]
 800fbe8:	681b      	ldr	r3, [r3, #0]
 800fbea:	f042 0208 	orr.w	r2, r2, #8
 800fbee:	619a      	str	r2, [r3, #24]
}
 800fbf0:	bf00      	nop
 800fbf2:	37b8      	adds	r7, #184	@ 0xb8
 800fbf4:	46bd      	mov	sp, r7
 800fbf6:	bd80      	pop	{r7, pc}
 800fbf8:	effffffe 	.word	0xeffffffe
 800fbfc:	58000c00 	.word	0x58000c00
 800fc00:	0800f385 	.word	0x0800f385

0800fc04 <HAL_UARTEx_WakeupCallback>:
  * @brief UART wakeup from Stop mode callback.
  * @param huart UART handle.
  * @retval None
  */
__weak void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart)
{
 800fc04:	b480      	push	{r7}
 800fc06:	b083      	sub	sp, #12
 800fc08:	af00      	add	r7, sp, #0
 800fc0a:	6078      	str	r0, [r7, #4]
  UNUSED(huart);

  /* NOTE : This function should not be modified, when the callback is needed,
            the HAL_UARTEx_WakeupCallback can be implemented in the user file.
   */
}
 800fc0c:	bf00      	nop
 800fc0e:	370c      	adds	r7, #12
 800fc10:	46bd      	mov	sp, r7
 800fc12:	f85d 7b04 	ldr.w	r7, [sp], #4
 800fc16:	4770      	bx	lr

0800fc18 <HAL_UARTEx_RxFifoFullCallback>:
  * @brief  UART RX Fifo full callback.
  * @param  huart UART handle.
  * @retval None
  */
__weak void HAL_UARTEx_RxFifoFullCallback(UART_HandleTypeDef *huart)
{
 800fc18:	b480      	push	{r7}
 800fc1a:	b083      	sub	sp, #12
 800fc1c:	af00      	add	r7, sp, #0
 800fc1e:	6078      	str	r0, [r7, #4]
  UNUSED(huart);

  /* NOTE : This function should not be modified, when the callback is needed,
            the HAL_UARTEx_RxFifoFullCallback can be implemented in the user file.
   */
}
 800fc20:	bf00      	nop
 800fc22:	370c      	adds	r7, #12
 800fc24:	46bd      	mov	sp, r7
 800fc26:	f85d 7b04 	ldr.w	r7, [sp], #4
 800fc2a:	4770      	bx	lr

0800fc2c <HAL_UARTEx_TxFifoEmptyCallback>:
  * @brief  UART TX Fifo empty callback.
  * @param  huart UART handle.
  * @retval None
  */
__weak void HAL_UARTEx_TxFifoEmptyCallback(UART_HandleTypeDef *huart)
{
 800fc2c:	b480      	push	{r7}
 800fc2e:	b083      	sub	sp, #12
 800fc30:	af00      	add	r7, sp, #0
 800fc32:	6078      	str	r0, [r7, #4]
  UNUSED(huart);

  /* NOTE : This function should not be modified, when the callback is needed,
            the HAL_UARTEx_TxFifoEmptyCallback can be implemented in the user file.
   */
}
 800fc34:	bf00      	nop
 800fc36:	370c      	adds	r7, #12
 800fc38:	46bd      	mov	sp, r7
 800fc3a:	f85d 7b04 	ldr.w	r7, [sp], #4
 800fc3e:	4770      	bx	lr

0800fc40 <HAL_UARTEx_DisableFifoMode>:
  * @brief  Disable the FIFO mode.
  * @param huart      UART handle.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_UARTEx_DisableFifoMode(UART_HandleTypeDef *huart)
{
 800fc40:	b480      	push	{r7}
 800fc42:	b085      	sub	sp, #20
 800fc44:	af00      	add	r7, sp, #0
 800fc46:	6078      	str	r0, [r7, #4]

  /* Check parameters */
  assert_param(IS_UART_FIFO_INSTANCE(huart->Instance));

  /* Process Locked */
  __HAL_LOCK(huart);
 800fc48:	687b      	ldr	r3, [r7, #4]
 800fc4a:	f893 3084 	ldrb.w	r3, [r3, #132]	@ 0x84
 800fc4e:	2b01      	cmp	r3, #1
 800fc50:	d101      	bne.n	800fc56 <HAL_UARTEx_DisableFifoMode+0x16>
 800fc52:	2302      	movs	r3, #2
 800fc54:	e027      	b.n	800fca6 <HAL_UARTEx_DisableFifoMode+0x66>
 800fc56:	687b      	ldr	r3, [r7, #4]
 800fc58:	2201      	movs	r2, #1
 800fc5a:	f883 2084 	strb.w	r2, [r3, #132]	@ 0x84

  huart->gState = HAL_UART_STATE_BUSY;
 800fc5e:	687b      	ldr	r3, [r7, #4]
 800fc60:	2224      	movs	r2, #36	@ 0x24
 800fc62:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88

  /* Save actual UART configuration */
  tmpcr1 = READ_REG(huart->Instance->CR1);
 800fc66:	687b      	ldr	r3, [r7, #4]
 800fc68:	681b      	ldr	r3, [r3, #0]
 800fc6a:	681b      	ldr	r3, [r3, #0]
 800fc6c:	60fb      	str	r3, [r7, #12]

  /* Disable UART */
  __HAL_UART_DISABLE(huart);
 800fc6e:	687b      	ldr	r3, [r7, #4]
 800fc70:	681b      	ldr	r3, [r3, #0]
 800fc72:	681a      	ldr	r2, [r3, #0]
 800fc74:	687b      	ldr	r3, [r7, #4]
 800fc76:	681b      	ldr	r3, [r3, #0]
 800fc78:	f022 0201 	bic.w	r2, r2, #1
 800fc7c:	601a      	str	r2, [r3, #0]

  /* Enable FIFO mode */
  CLEAR_BIT(tmpcr1, USART_CR1_FIFOEN);
 800fc7e:	68fb      	ldr	r3, [r7, #12]
 800fc80:	f023 5300 	bic.w	r3, r3, #536870912	@ 0x20000000
 800fc84:	60fb      	str	r3, [r7, #12]
  huart->FifoMode = UART_FIFOMODE_DISABLE;
 800fc86:	687b      	ldr	r3, [r7, #4]
 800fc88:	2200      	movs	r2, #0
 800fc8a:	665a      	str	r2, [r3, #100]	@ 0x64

  /* Restore UART configuration */
  WRITE_REG(huart->Instance->CR1, tmpcr1);
 800fc8c:	687b      	ldr	r3, [r7, #4]
 800fc8e:	681b      	ldr	r3, [r3, #0]
 800fc90:	68fa      	ldr	r2, [r7, #12]
 800fc92:	601a      	str	r2, [r3, #0]

  huart->gState = HAL_UART_STATE_READY;
 800fc94:	687b      	ldr	r3, [r7, #4]
 800fc96:	2220      	movs	r2, #32
 800fc98:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88

  /* Process Unlocked */
  __HAL_UNLOCK(huart);
 800fc9c:	687b      	ldr	r3, [r7, #4]
 800fc9e:	2200      	movs	r2, #0
 800fca0:	f883 2084 	strb.w	r2, [r3, #132]	@ 0x84

  return HAL_OK;
 800fca4:	2300      	movs	r3, #0
}
 800fca6:	4618      	mov	r0, r3
 800fca8:	3714      	adds	r7, #20
 800fcaa:	46bd      	mov	sp, r7
 800fcac:	f85d 7b04 	ldr.w	r7, [sp], #4
 800fcb0:	4770      	bx	lr

0800fcb2 <HAL_UARTEx_SetTxFifoThreshold>:
  *            @arg @ref UART_TXFIFO_THRESHOLD_7_8
  *            @arg @ref UART_TXFIFO_THRESHOLD_8_8
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_UARTEx_SetTxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold)
{
 800fcb2:	b580      	push	{r7, lr}
 800fcb4:	b084      	sub	sp, #16
 800fcb6:	af00      	add	r7, sp, #0
 800fcb8:	6078      	str	r0, [r7, #4]
 800fcba:	6039      	str	r1, [r7, #0]
  /* Check parameters */
  assert_param(IS_UART_FIFO_INSTANCE(huart->Instance));
  assert_param(IS_UART_TXFIFO_THRESHOLD(Threshold));

  /* Process Locked */
  __HAL_LOCK(huart);
 800fcbc:	687b      	ldr	r3, [r7, #4]
 800fcbe:	f893 3084 	ldrb.w	r3, [r3, #132]	@ 0x84
 800fcc2:	2b01      	cmp	r3, #1
 800fcc4:	d101      	bne.n	800fcca <HAL_UARTEx_SetTxFifoThreshold+0x18>
 800fcc6:	2302      	movs	r3, #2
 800fcc8:	e02d      	b.n	800fd26 <HAL_UARTEx_SetTxFifoThreshold+0x74>
 800fcca:	687b      	ldr	r3, [r7, #4]
 800fccc:	2201      	movs	r2, #1
 800fcce:	f883 2084 	strb.w	r2, [r3, #132]	@ 0x84

  huart->gState = HAL_UART_STATE_BUSY;
 800fcd2:	687b      	ldr	r3, [r7, #4]
 800fcd4:	2224      	movs	r2, #36	@ 0x24
 800fcd6:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88

  /* Save actual UART configuration */
  tmpcr1 = READ_REG(huart->Instance->CR1);
 800fcda:	687b      	ldr	r3, [r7, #4]
 800fcdc:	681b      	ldr	r3, [r3, #0]
 800fcde:	681b      	ldr	r3, [r3, #0]
 800fce0:	60fb      	str	r3, [r7, #12]

  /* Disable UART */
  __HAL_UART_DISABLE(huart);
 800fce2:	687b      	ldr	r3, [r7, #4]
 800fce4:	681b      	ldr	r3, [r3, #0]
 800fce6:	681a      	ldr	r2, [r3, #0]
 800fce8:	687b      	ldr	r3, [r7, #4]
 800fcea:	681b      	ldr	r3, [r3, #0]
 800fcec:	f022 0201 	bic.w	r2, r2, #1
 800fcf0:	601a      	str	r2, [r3, #0]

  /* Update TX threshold configuration */
  MODIFY_REG(huart->Instance->CR3, USART_CR3_TXFTCFG, Threshold);
 800fcf2:	687b      	ldr	r3, [r7, #4]
 800fcf4:	681b      	ldr	r3, [r3, #0]
 800fcf6:	689b      	ldr	r3, [r3, #8]
 800fcf8:	f023 4160 	bic.w	r1, r3, #3758096384	@ 0xe0000000
 800fcfc:	687b      	ldr	r3, [r7, #4]
 800fcfe:	681b      	ldr	r3, [r3, #0]
 800fd00:	683a      	ldr	r2, [r7, #0]
 800fd02:	430a      	orrs	r2, r1
 800fd04:	609a      	str	r2, [r3, #8]

  /* Determine the number of data to process during RX/TX ISR execution */
  UARTEx_SetNbDataToProcess(huart);
 800fd06:	6878      	ldr	r0, [r7, #4]
 800fd08:	f000 f8a0 	bl	800fe4c <UARTEx_SetNbDataToProcess>

  /* Restore UART configuration */
  WRITE_REG(huart->Instance->CR1, tmpcr1);
 800fd0c:	687b      	ldr	r3, [r7, #4]
 800fd0e:	681b      	ldr	r3, [r3, #0]
 800fd10:	68fa      	ldr	r2, [r7, #12]
 800fd12:	601a      	str	r2, [r3, #0]

  huart->gState = HAL_UART_STATE_READY;
 800fd14:	687b      	ldr	r3, [r7, #4]
 800fd16:	2220      	movs	r2, #32
 800fd18:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88

  /* Process Unlocked */
  __HAL_UNLOCK(huart);
 800fd1c:	687b      	ldr	r3, [r7, #4]
 800fd1e:	2200      	movs	r2, #0
 800fd20:	f883 2084 	strb.w	r2, [r3, #132]	@ 0x84

  return HAL_OK;
 800fd24:	2300      	movs	r3, #0
}
 800fd26:	4618      	mov	r0, r3
 800fd28:	3710      	adds	r7, #16
 800fd2a:	46bd      	mov	sp, r7
 800fd2c:	bd80      	pop	{r7, pc}

0800fd2e <HAL_UARTEx_SetRxFifoThreshold>:
  *            @arg @ref UART_RXFIFO_THRESHOLD_7_8
  *            @arg @ref UART_RXFIFO_THRESHOLD_8_8
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_UARTEx_SetRxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold)
{
 800fd2e:	b580      	push	{r7, lr}
 800fd30:	b084      	sub	sp, #16
 800fd32:	af00      	add	r7, sp, #0
 800fd34:	6078      	str	r0, [r7, #4]
 800fd36:	6039      	str	r1, [r7, #0]
  /* Check the parameters */
  assert_param(IS_UART_FIFO_INSTANCE(huart->Instance));
  assert_param(IS_UART_RXFIFO_THRESHOLD(Threshold));

  /* Process Locked */
  __HAL_LOCK(huart);
 800fd38:	687b      	ldr	r3, [r7, #4]
 800fd3a:	f893 3084 	ldrb.w	r3, [r3, #132]	@ 0x84
 800fd3e:	2b01      	cmp	r3, #1
 800fd40:	d101      	bne.n	800fd46 <HAL_UARTEx_SetRxFifoThreshold+0x18>
 800fd42:	2302      	movs	r3, #2
 800fd44:	e02d      	b.n	800fda2 <HAL_UARTEx_SetRxFifoThreshold+0x74>
 800fd46:	687b      	ldr	r3, [r7, #4]
 800fd48:	2201      	movs	r2, #1
 800fd4a:	f883 2084 	strb.w	r2, [r3, #132]	@ 0x84

  huart->gState = HAL_UART_STATE_BUSY;
 800fd4e:	687b      	ldr	r3, [r7, #4]
 800fd50:	2224      	movs	r2, #36	@ 0x24
 800fd52:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88

  /* Save actual UART configuration */
  tmpcr1 = READ_REG(huart->Instance->CR1);
 800fd56:	687b      	ldr	r3, [r7, #4]
 800fd58:	681b      	ldr	r3, [r3, #0]
 800fd5a:	681b      	ldr	r3, [r3, #0]
 800fd5c:	60fb      	str	r3, [r7, #12]

  /* Disable UART */
  __HAL_UART_DISABLE(huart);
 800fd5e:	687b      	ldr	r3, [r7, #4]
 800fd60:	681b      	ldr	r3, [r3, #0]
 800fd62:	681a      	ldr	r2, [r3, #0]
 800fd64:	687b      	ldr	r3, [r7, #4]
 800fd66:	681b      	ldr	r3, [r3, #0]
 800fd68:	f022 0201 	bic.w	r2, r2, #1
 800fd6c:	601a      	str	r2, [r3, #0]

  /* Update RX threshold configuration */
  MODIFY_REG(huart->Instance->CR3, USART_CR3_RXFTCFG, Threshold);
 800fd6e:	687b      	ldr	r3, [r7, #4]
 800fd70:	681b      	ldr	r3, [r3, #0]
 800fd72:	689b      	ldr	r3, [r3, #8]
 800fd74:	f023 6160 	bic.w	r1, r3, #234881024	@ 0xe000000
 800fd78:	687b      	ldr	r3, [r7, #4]
 800fd7a:	681b      	ldr	r3, [r3, #0]
 800fd7c:	683a      	ldr	r2, [r7, #0]
 800fd7e:	430a      	orrs	r2, r1
 800fd80:	609a      	str	r2, [r3, #8]

  /* Determine the number of data to process during RX/TX ISR execution */
  UARTEx_SetNbDataToProcess(huart);
 800fd82:	6878      	ldr	r0, [r7, #4]
 800fd84:	f000 f862 	bl	800fe4c <UARTEx_SetNbDataToProcess>

  /* Restore UART configuration */
  WRITE_REG(huart->Instance->CR1, tmpcr1);
 800fd88:	687b      	ldr	r3, [r7, #4]
 800fd8a:	681b      	ldr	r3, [r3, #0]
 800fd8c:	68fa      	ldr	r2, [r7, #12]
 800fd8e:	601a      	str	r2, [r3, #0]

  huart->gState = HAL_UART_STATE_READY;
 800fd90:	687b      	ldr	r3, [r7, #4]
 800fd92:	2220      	movs	r2, #32
 800fd94:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88

  /* Process Unlocked */
  __HAL_UNLOCK(huart);
 800fd98:	687b      	ldr	r3, [r7, #4]
 800fd9a:	2200      	movs	r2, #0
 800fd9c:	f883 2084 	strb.w	r2, [r3, #132]	@ 0x84

  return HAL_OK;
 800fda0:	2300      	movs	r3, #0
}
 800fda2:	4618      	mov	r0, r3
 800fda4:	3710      	adds	r7, #16
 800fda6:	46bd      	mov	sp, r7
 800fda8:	bd80      	pop	{r7, pc}

0800fdaa <HAL_UARTEx_ReceiveToIdle_IT>:
  * @param pData Pointer to data buffer (uint8_t or uint16_t data elements).
  * @param Size  Amount of data elements (uint8_t or uint16_t) to be received.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
{
 800fdaa:	b580      	push	{r7, lr}
 800fdac:	b08c      	sub	sp, #48	@ 0x30
 800fdae:	af00      	add	r7, sp, #0
 800fdb0:	60f8      	str	r0, [r7, #12]
 800fdb2:	60b9      	str	r1, [r7, #8]
 800fdb4:	4613      	mov	r3, r2
 800fdb6:	80fb      	strh	r3, [r7, #6]
  HAL_StatusTypeDef status = HAL_OK;
 800fdb8:	2300      	movs	r3, #0
 800fdba:	f887 302f 	strb.w	r3, [r7, #47]	@ 0x2f

  /* Check that a Rx process is not already ongoing */
  if (huart->RxState == HAL_UART_STATE_READY)
 800fdbe:	68fb      	ldr	r3, [r7, #12]
 800fdc0:	f8d3 308c 	ldr.w	r3, [r3, #140]	@ 0x8c
 800fdc4:	2b20      	cmp	r3, #32
 800fdc6:	d13b      	bne.n	800fe40 <HAL_UARTEx_ReceiveToIdle_IT+0x96>
  {
    if ((pData == NULL) || (Size == 0U))
 800fdc8:	68bb      	ldr	r3, [r7, #8]
 800fdca:	2b00      	cmp	r3, #0
 800fdcc:	d002      	beq.n	800fdd4 <HAL_UARTEx_ReceiveToIdle_IT+0x2a>
 800fdce:	88fb      	ldrh	r3, [r7, #6]
 800fdd0:	2b00      	cmp	r3, #0
 800fdd2:	d101      	bne.n	800fdd8 <HAL_UARTEx_ReceiveToIdle_IT+0x2e>
    {
      return HAL_ERROR;
 800fdd4:	2301      	movs	r3, #1
 800fdd6:	e034      	b.n	800fe42 <HAL_UARTEx_ReceiveToIdle_IT+0x98>
    }

    /* Set Reception type to reception till IDLE Event*/
    huart->ReceptionType = HAL_UART_RECEPTION_TOIDLE;
 800fdd8:	68fb      	ldr	r3, [r7, #12]
 800fdda:	2201      	movs	r2, #1
 800fddc:	66da      	str	r2, [r3, #108]	@ 0x6c
    huart->RxEventType = HAL_UART_RXEVENT_TC;
 800fdde:	68fb      	ldr	r3, [r7, #12]
 800fde0:	2200      	movs	r2, #0
 800fde2:	671a      	str	r2, [r3, #112]	@ 0x70

    (void)UART_Start_Receive_IT(huart, pData, Size);
 800fde4:	88fb      	ldrh	r3, [r7, #6]
 800fde6:	461a      	mov	r2, r3
 800fde8:	68b9      	ldr	r1, [r7, #8]
 800fdea:	68f8      	ldr	r0, [r7, #12]
 800fdec:	f7fe fe82 	bl	800eaf4 <UART_Start_Receive_IT>

    if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
 800fdf0:	68fb      	ldr	r3, [r7, #12]
 800fdf2:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 800fdf4:	2b01      	cmp	r3, #1
 800fdf6:	d11d      	bne.n	800fe34 <HAL_UARTEx_ReceiveToIdle_IT+0x8a>
    {
      __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
 800fdf8:	68fb      	ldr	r3, [r7, #12]
 800fdfa:	681b      	ldr	r3, [r3, #0]
 800fdfc:	2210      	movs	r2, #16
 800fdfe:	621a      	str	r2, [r3, #32]
      ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
 800fe00:	68fb      	ldr	r3, [r7, #12]
 800fe02:	681b      	ldr	r3, [r3, #0]
 800fe04:	61bb      	str	r3, [r7, #24]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800fe06:	69bb      	ldr	r3, [r7, #24]
 800fe08:	e853 3f00 	ldrex	r3, [r3]
 800fe0c:	617b      	str	r3, [r7, #20]
   return(result);
 800fe0e:	697b      	ldr	r3, [r7, #20]
 800fe10:	f043 0310 	orr.w	r3, r3, #16
 800fe14:	62bb      	str	r3, [r7, #40]	@ 0x28
 800fe16:	68fb      	ldr	r3, [r7, #12]
 800fe18:	681b      	ldr	r3, [r3, #0]
 800fe1a:	461a      	mov	r2, r3
 800fe1c:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 800fe1e:	627b      	str	r3, [r7, #36]	@ 0x24
 800fe20:	623a      	str	r2, [r7, #32]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800fe22:	6a39      	ldr	r1, [r7, #32]
 800fe24:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 800fe26:	e841 2300 	strex	r3, r2, [r1]
 800fe2a:	61fb      	str	r3, [r7, #28]
   return(result);
 800fe2c:	69fb      	ldr	r3, [r7, #28]
 800fe2e:	2b00      	cmp	r3, #0
 800fe30:	d1e6      	bne.n	800fe00 <HAL_UARTEx_ReceiveToIdle_IT+0x56>
 800fe32:	e002      	b.n	800fe3a <HAL_UARTEx_ReceiveToIdle_IT+0x90>
    {
      /* In case of errors already pending when reception is started,
         Interrupts may have already been raised and lead to reception abortion.
         (Overrun error for instance).
         In such case Reception Type has been reset to HAL_UART_RECEPTION_STANDARD. */
      status = HAL_ERROR;
 800fe34:	2301      	movs	r3, #1
 800fe36:	f887 302f 	strb.w	r3, [r7, #47]	@ 0x2f
    }

    return status;
 800fe3a:	f897 302f 	ldrb.w	r3, [r7, #47]	@ 0x2f
 800fe3e:	e000      	b.n	800fe42 <HAL_UARTEx_ReceiveToIdle_IT+0x98>
  }
  else
  {
    return HAL_BUSY;
 800fe40:	2302      	movs	r3, #2
  }
}
 800fe42:	4618      	mov	r0, r3
 800fe44:	3730      	adds	r7, #48	@ 0x30
 800fe46:	46bd      	mov	sp, r7
 800fe48:	bd80      	pop	{r7, pc}
	...

0800fe4c <UARTEx_SetNbDataToProcess>:
  *       the UART configuration registers.
  * @param huart UART handle.
  * @retval None
  */
static void UARTEx_SetNbDataToProcess(UART_HandleTypeDef *huart)
{
 800fe4c:	b480      	push	{r7}
 800fe4e:	b085      	sub	sp, #20
 800fe50:	af00      	add	r7, sp, #0
 800fe52:	6078      	str	r0, [r7, #4]
  uint8_t rx_fifo_threshold;
  uint8_t tx_fifo_threshold;
  static const uint8_t numerator[] = {1U, 1U, 1U, 3U, 7U, 1U, 0U, 0U};
  static const uint8_t denominator[] = {8U, 4U, 2U, 4U, 8U, 1U, 1U, 1U};

  if (huart->FifoMode == UART_FIFOMODE_DISABLE)
 800fe54:	687b      	ldr	r3, [r7, #4]
 800fe56:	6e5b      	ldr	r3, [r3, #100]	@ 0x64
 800fe58:	2b00      	cmp	r3, #0
 800fe5a:	d108      	bne.n	800fe6e <UARTEx_SetNbDataToProcess+0x22>
  {
    huart->NbTxDataToProcess = 1U;
 800fe5c:	687b      	ldr	r3, [r7, #4]
 800fe5e:	2201      	movs	r2, #1
 800fe60:	f8a3 206a 	strh.w	r2, [r3, #106]	@ 0x6a
    huart->NbRxDataToProcess = 1U;
 800fe64:	687b      	ldr	r3, [r7, #4]
 800fe66:	2201      	movs	r2, #1
 800fe68:	f8a3 2068 	strh.w	r2, [r3, #104]	@ 0x68
    huart->NbTxDataToProcess = ((uint16_t)tx_fifo_depth * numerator[tx_fifo_threshold]) /
                               (uint16_t)denominator[tx_fifo_threshold];
    huart->NbRxDataToProcess = ((uint16_t)rx_fifo_depth * numerator[rx_fifo_threshold]) /
                               (uint16_t)denominator[rx_fifo_threshold];
  }
}
 800fe6c:	e031      	b.n	800fed2 <UARTEx_SetNbDataToProcess+0x86>
    rx_fifo_depth = RX_FIFO_DEPTH;
 800fe6e:	2310      	movs	r3, #16
 800fe70:	73fb      	strb	r3, [r7, #15]
    tx_fifo_depth = TX_FIFO_DEPTH;
 800fe72:	2310      	movs	r3, #16
 800fe74:	73bb      	strb	r3, [r7, #14]
    rx_fifo_threshold = (uint8_t)(READ_BIT(huart->Instance->CR3, USART_CR3_RXFTCFG) >> USART_CR3_RXFTCFG_Pos);
 800fe76:	687b      	ldr	r3, [r7, #4]
 800fe78:	681b      	ldr	r3, [r3, #0]
 800fe7a:	689b      	ldr	r3, [r3, #8]
 800fe7c:	0e5b      	lsrs	r3, r3, #25
 800fe7e:	b2db      	uxtb	r3, r3
 800fe80:	f003 0307 	and.w	r3, r3, #7
 800fe84:	737b      	strb	r3, [r7, #13]
    tx_fifo_threshold = (uint8_t)(READ_BIT(huart->Instance->CR3, USART_CR3_TXFTCFG) >> USART_CR3_TXFTCFG_Pos);
 800fe86:	687b      	ldr	r3, [r7, #4]
 800fe88:	681b      	ldr	r3, [r3, #0]
 800fe8a:	689b      	ldr	r3, [r3, #8]
 800fe8c:	0f5b      	lsrs	r3, r3, #29
 800fe8e:	b2db      	uxtb	r3, r3
 800fe90:	f003 0307 	and.w	r3, r3, #7
 800fe94:	733b      	strb	r3, [r7, #12]
    huart->NbTxDataToProcess = ((uint16_t)tx_fifo_depth * numerator[tx_fifo_threshold]) /
 800fe96:	7bbb      	ldrb	r3, [r7, #14]
 800fe98:	7b3a      	ldrb	r2, [r7, #12]
 800fe9a:	4911      	ldr	r1, [pc, #68]	@ (800fee0 <UARTEx_SetNbDataToProcess+0x94>)
 800fe9c:	5c8a      	ldrb	r2, [r1, r2]
 800fe9e:	fb02 f303 	mul.w	r3, r2, r3
                               (uint16_t)denominator[tx_fifo_threshold];
 800fea2:	7b3a      	ldrb	r2, [r7, #12]
 800fea4:	490f      	ldr	r1, [pc, #60]	@ (800fee4 <UARTEx_SetNbDataToProcess+0x98>)
 800fea6:	5c8a      	ldrb	r2, [r1, r2]
    huart->NbTxDataToProcess = ((uint16_t)tx_fifo_depth * numerator[tx_fifo_threshold]) /
 800fea8:	fb93 f3f2 	sdiv	r3, r3, r2
 800feac:	b29a      	uxth	r2, r3
 800feae:	687b      	ldr	r3, [r7, #4]
 800feb0:	f8a3 206a 	strh.w	r2, [r3, #106]	@ 0x6a
    huart->NbRxDataToProcess = ((uint16_t)rx_fifo_depth * numerator[rx_fifo_threshold]) /
 800feb4:	7bfb      	ldrb	r3, [r7, #15]
 800feb6:	7b7a      	ldrb	r2, [r7, #13]
 800feb8:	4909      	ldr	r1, [pc, #36]	@ (800fee0 <UARTEx_SetNbDataToProcess+0x94>)
 800feba:	5c8a      	ldrb	r2, [r1, r2]
 800febc:	fb02 f303 	mul.w	r3, r2, r3
                               (uint16_t)denominator[rx_fifo_threshold];
 800fec0:	7b7a      	ldrb	r2, [r7, #13]
 800fec2:	4908      	ldr	r1, [pc, #32]	@ (800fee4 <UARTEx_SetNbDataToProcess+0x98>)
 800fec4:	5c8a      	ldrb	r2, [r1, r2]
    huart->NbRxDataToProcess = ((uint16_t)rx_fifo_depth * numerator[rx_fifo_threshold]) /
 800fec6:	fb93 f3f2 	sdiv	r3, r3, r2
 800feca:	b29a      	uxth	r2, r3
 800fecc:	687b      	ldr	r3, [r7, #4]
 800fece:	f8a3 2068 	strh.w	r2, [r3, #104]	@ 0x68
}
 800fed2:	bf00      	nop
 800fed4:	3714      	adds	r7, #20
 800fed6:	46bd      	mov	sp, r7
 800fed8:	f85d 7b04 	ldr.w	r7, [sp], #4
 800fedc:	4770      	bx	lr
 800fede:	bf00      	nop
 800fee0:	08031338 	.word	0x08031338
 800fee4:	08031340 	.word	0x08031340

0800fee8 <tcpip_init_wrap>:
/* USER CODE END OS_THREAD_ATTR_CMSIS_RTOS_V2 */

/* USER CODE BEGIN 2 */
/* ETH_CODE: workaround to call LOCK_TCPIP_CORE after tcpip_init in MX_LWIP_Init
 * This is to keep the code after MX code re-generation */
static inline void tcpip_init_wrap(tcpip_init_done_fn tcpip_init_done, void *arg){
 800fee8:	b580      	push	{r7, lr}
 800feea:	b082      	sub	sp, #8
 800feec:	af00      	add	r7, sp, #0
 800feee:	6078      	str	r0, [r7, #4]
 800fef0:	6039      	str	r1, [r7, #0]
	tcpip_init(tcpip_init_done, arg);
 800fef2:	6839      	ldr	r1, [r7, #0]
 800fef4:	6878      	ldr	r0, [r7, #4]
 800fef6:	f009 f9bd 	bl	8019274 <tcpip_init>
	LOCK_TCPIP_CORE();
 800fefa:	f000 fda1 	bl	8010a40 <sys_lock_tcpip_core>
}
 800fefe:	bf00      	nop
 800ff00:	3708      	adds	r7, #8
 800ff02:	46bd      	mov	sp, r7
 800ff04:	bd80      	pop	{r7, pc}
	...

0800ff08 <is_link_up>:
#define tcpip_init tcpip_init_wrap

uint8_t is_link_up(void)
{
 800ff08:	b480      	push	{r7}
 800ff0a:	af00      	add	r7, sp, #0
	return netif_is_up(&gnetif);
 800ff0c:	4b05      	ldr	r3, [pc, #20]	@ (800ff24 <is_link_up+0x1c>)
 800ff0e:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 800ff12:	f003 0301 	and.w	r3, r3, #1
 800ff16:	b2db      	uxtb	r3, r3
}
 800ff18:	4618      	mov	r0, r3
 800ff1a:	46bd      	mov	sp, r7
 800ff1c:	f85d 7b04 	ldr.w	r7, [sp], #4
 800ff20:	4770      	bx	lr
 800ff22:	bf00      	nop
 800ff24:	24002244 	.word	0x24002244

0800ff28 <MX_LWIP_Init>:

/**
  * LwIP initialization function
  */
void MX_LWIP_Init(void)
{
 800ff28:	b580      	push	{r7, lr}
 800ff2a:	b084      	sub	sp, #16
 800ff2c:	af04      	add	r7, sp, #16
  /* IP addresses initialization without DHCP (IPv4) */
	ipaddr_aton(STATIC_IP, &ipaddr);
	ipaddr_aton(STATIC_MASK, &netmask);
	ipaddr_aton(STATIC_GW, &gw);
#else
    ip_addr_set_zero_ip4(&ipaddr);
 800ff2e:	4b27      	ldr	r3, [pc, #156]	@ (800ffcc <MX_LWIP_Init+0xa4>)
 800ff30:	2200      	movs	r2, #0
 800ff32:	601a      	str	r2, [r3, #0]
    ip_addr_set_zero_ip4(&netmask);
 800ff34:	4b26      	ldr	r3, [pc, #152]	@ (800ffd0 <MX_LWIP_Init+0xa8>)
 800ff36:	2200      	movs	r2, #0
 800ff38:	601a      	str	r2, [r3, #0]
    ip_addr_set_zero_ip4(&gw);
 800ff3a:	4b26      	ldr	r3, [pc, #152]	@ (800ffd4 <MX_LWIP_Init+0xac>)
 800ff3c:	2200      	movs	r2, #0
 800ff3e:	601a      	str	r2, [r3, #0]
#endif
	/* USER CODE END IP_ADDRESSES */

  /* Initilialize the LwIP stack with RTOS */
  tcpip_init( NULL, NULL );
 800ff40:	2100      	movs	r1, #0
 800ff42:	2000      	movs	r0, #0
 800ff44:	f7ff ffd0 	bl	800fee8 <tcpip_init_wrap>
//  IP4_ADDR(&ipaddr, IP_ADDRESS[0], IP_ADDRESS[1], IP_ADDRESS[2], IP_ADDRESS[3]);
//  IP4_ADDR(&netmask, NETMASK_ADDRESS[0], NETMASK_ADDRESS[1] , NETMASK_ADDRESS[2], NETMASK_ADDRESS[3]);
//  IP4_ADDR(&gw, GATEWAY_ADDRESS[0], GATEWAY_ADDRESS[1], GATEWAY_ADDRESS[2], GATEWAY_ADDRESS[3]);

  /* add the network interface (IPv4/IPv6) with RTOS */
  netif_add(&gnetif, &ipaddr, &netmask, &gw, NULL, &ethernetif_init, &tcpip_input);
 800ff48:	4b23      	ldr	r3, [pc, #140]	@ (800ffd8 <MX_LWIP_Init+0xb0>)
 800ff4a:	9302      	str	r3, [sp, #8]
 800ff4c:	4b23      	ldr	r3, [pc, #140]	@ (800ffdc <MX_LWIP_Init+0xb4>)
 800ff4e:	9301      	str	r3, [sp, #4]
 800ff50:	2300      	movs	r3, #0
 800ff52:	9300      	str	r3, [sp, #0]
 800ff54:	4b1f      	ldr	r3, [pc, #124]	@ (800ffd4 <MX_LWIP_Init+0xac>)
 800ff56:	4a1e      	ldr	r2, [pc, #120]	@ (800ffd0 <MX_LWIP_Init+0xa8>)
 800ff58:	491c      	ldr	r1, [pc, #112]	@ (800ffcc <MX_LWIP_Init+0xa4>)
 800ff5a:	4821      	ldr	r0, [pc, #132]	@ (800ffe0 <MX_LWIP_Init+0xb8>)
 800ff5c:	f009 fffa 	bl	8019f54 <netif_add>

  /* Registers the default network interface */
  netif_set_default(&gnetif);
 800ff60:	481f      	ldr	r0, [pc, #124]	@ (800ffe0 <MX_LWIP_Init+0xb8>)
 800ff62:	f00a f9b5 	bl	801a2d0 <netif_set_default>

  if (netif_is_link_up(&gnetif))
 800ff66:	4b1e      	ldr	r3, [pc, #120]	@ (800ffe0 <MX_LWIP_Init+0xb8>)
 800ff68:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 800ff6c:	089b      	lsrs	r3, r3, #2
 800ff6e:	f003 0301 	and.w	r3, r3, #1
 800ff72:	b2db      	uxtb	r3, r3
 800ff74:	2b00      	cmp	r3, #0
 800ff76:	d003      	beq.n	800ff80 <MX_LWIP_Init+0x58>
  {
    /* When the netif is fully configured this function must be called */
    netif_set_up(&gnetif);
 800ff78:	4819      	ldr	r0, [pc, #100]	@ (800ffe0 <MX_LWIP_Init+0xb8>)
 800ff7a:	f00a f9b9 	bl	801a2f0 <netif_set_up>
 800ff7e:	e002      	b.n	800ff86 <MX_LWIP_Init+0x5e>
  }
  else
  {
    /* When the netif link is down this function must be called */
    netif_set_down(&gnetif);
 800ff80:	4817      	ldr	r0, [pc, #92]	@ (800ffe0 <MX_LWIP_Init+0xb8>)
 800ff82:	f00a fa23 	bl	801a3cc <netif_set_down>
  }

  /* Set the link callback function, this function is called on change of link status*/
  netif_set_link_callback(&gnetif, ethernet_link_status_updated);
 800ff86:	4917      	ldr	r1, [pc, #92]	@ (800ffe4 <MX_LWIP_Init+0xbc>)
 800ff88:	4815      	ldr	r0, [pc, #84]	@ (800ffe0 <MX_LWIP_Init+0xb8>)
 800ff8a:	f00a fabf 	bl	801a50c <netif_set_link_callback>

  /* Create the Ethernet link handler thread */
/* USER CODE BEGIN H7_OS_THREAD_NEW_CMSIS_RTOS_V2 */
  memset(&attributes, 0x0, sizeof(osThreadAttr_t));
 800ff8e:	2224      	movs	r2, #36	@ 0x24
 800ff90:	2100      	movs	r1, #0
 800ff92:	4815      	ldr	r0, [pc, #84]	@ (800ffe8 <MX_LWIP_Init+0xc0>)
 800ff94:	f01a faa4 	bl	802a4e0 <memset>
  attributes.name = "EthLink";
 800ff98:	4b13      	ldr	r3, [pc, #76]	@ (800ffe8 <MX_LWIP_Init+0xc0>)
 800ff9a:	4a14      	ldr	r2, [pc, #80]	@ (800ffec <MX_LWIP_Init+0xc4>)
 800ff9c:	601a      	str	r2, [r3, #0]
  attributes.stack_size = INTERFACE_THREAD_STACK_SIZE * 2;
 800ff9e:	4b12      	ldr	r3, [pc, #72]	@ (800ffe8 <MX_LWIP_Init+0xc0>)
 800ffa0:	f44f 6200 	mov.w	r2, #2048	@ 0x800
 800ffa4:	615a      	str	r2, [r3, #20]
  attributes.priority = osPriorityBelowNormal;
 800ffa6:	4b10      	ldr	r3, [pc, #64]	@ (800ffe8 <MX_LWIP_Init+0xc0>)
 800ffa8:	2210      	movs	r2, #16
 800ffaa:	619a      	str	r2, [r3, #24]
  osThreadNew(ethernet_link_thread, &gnetif, &attributes);
 800ffac:	4a0e      	ldr	r2, [pc, #56]	@ (800ffe8 <MX_LWIP_Init+0xc0>)
 800ffae:	490c      	ldr	r1, [pc, #48]	@ (800ffe0 <MX_LWIP_Init+0xb8>)
 800ffb0:	480f      	ldr	r0, [pc, #60]	@ (800fff0 <MX_LWIP_Init+0xc8>)
 800ffb2:	f000 feee 	bl	8010d92 <osThreadNew>
/* USER CODE END H7_OS_THREAD_NEW_CMSIS_RTOS_V2 */

/* USER CODE BEGIN 3 */
  /* Start DHCP negotiation for a network interface (IPv4) */
#if USE_DHCP
  netif_set_up(&gnetif);
 800ffb6:	480a      	ldr	r0, [pc, #40]	@ (800ffe0 <MX_LWIP_Init+0xb8>)
 800ffb8:	f00a f99a 	bl	801a2f0 <netif_set_up>
  dhcp_start(&gnetif);
 800ffbc:	4808      	ldr	r0, [pc, #32]	@ (800ffe0 <MX_LWIP_Init+0xb8>)
 800ffbe:	f012 fc87 	bl	80228d0 <dhcp_start>
#else
  netif_set_addr(&gnetif, ip_2_ip4(&ipaddr), ip_2_ip4(&netmask), ip_2_ip4(&gw));
#endif
  /* ETH_CODE: call UNLOCK_TCPIP_CORE after we are done */
  UNLOCK_TCPIP_CORE();
 800ffc2:	f000 fd4d 	bl	8010a60 <sys_unlock_tcpip_core>

/* USER CODE END 3 */
}
 800ffc6:	bf00      	nop
 800ffc8:	46bd      	mov	sp, r7
 800ffca:	bd80      	pop	{r7, pc}
 800ffcc:	2400227c 	.word	0x2400227c
 800ffd0:	24002280 	.word	0x24002280
 800ffd4:	24002284 	.word	0x24002284
 800ffd8:	0801918d 	.word	0x0801918d
 800ffdc:	080104a9 	.word	0x080104a9
 800ffe0:	24002244 	.word	0x24002244
 800ffe4:	0800fff5 	.word	0x0800fff5
 800ffe8:	24002288 	.word	0x24002288
 800ffec:	0802d26c 	.word	0x0802d26c
 800fff0:	08010779 	.word	0x08010779

0800fff4 <ethernet_link_status_updated>:
  * @brief  Notify the User about the network interface config status
  * @param  netif: the network interface
  * @retval None
  */
static void ethernet_link_status_updated(struct netif *netif)
{
 800fff4:	b480      	push	{r7}
 800fff6:	b083      	sub	sp, #12
 800fff8:	af00      	add	r7, sp, #0
 800fffa:	6078      	str	r0, [r7, #4]
  else /* netif is down */
  {
/* USER CODE BEGIN 6 */
/* USER CODE END 6 */
  }
}
 800fffc:	bf00      	nop
 800fffe:	370c      	adds	r7, #12
 8010000:	46bd      	mov	sp, r7
 8010002:	f85d 7b04 	ldr.w	r7, [sp], #4
 8010006:	4770      	bx	lr

08010008 <HAL_ETH_RxCpltCallback>:
  * @brief  Ethernet Rx Transfer completed callback
  * @param  handlerEth: ETH handler
  * @retval None
  */
void HAL_ETH_RxCpltCallback(ETH_HandleTypeDef *handlerEth)
{
 8010008:	b580      	push	{r7, lr}
 801000a:	b082      	sub	sp, #8
 801000c:	af00      	add	r7, sp, #0
 801000e:	6078      	str	r0, [r7, #4]
  osSemaphoreRelease(RxPktSemaphore);
 8010010:	4b04      	ldr	r3, [pc, #16]	@ (8010024 <HAL_ETH_RxCpltCallback+0x1c>)
 8010012:	681b      	ldr	r3, [r3, #0]
 8010014:	4618      	mov	r0, r3
 8010016:	f001 f9f1 	bl	80113fc <osSemaphoreRelease>
}
 801001a:	bf00      	nop
 801001c:	3708      	adds	r7, #8
 801001e:	46bd      	mov	sp, r7
 8010020:	bd80      	pop	{r7, pc}
 8010022:	bf00      	nop
 8010024:	240022b4 	.word	0x240022b4

08010028 <HAL_ETH_TxCpltCallback>:
  * @brief  Ethernet Tx Transfer completed callback
  * @param  handlerEth: ETH handler
  * @retval None
  */
void HAL_ETH_TxCpltCallback(ETH_HandleTypeDef *handlerEth)
{
 8010028:	b580      	push	{r7, lr}
 801002a:	b082      	sub	sp, #8
 801002c:	af00      	add	r7, sp, #0
 801002e:	6078      	str	r0, [r7, #4]
  osSemaphoreRelease(TxPktSemaphore);
 8010030:	4b04      	ldr	r3, [pc, #16]	@ (8010044 <HAL_ETH_TxCpltCallback+0x1c>)
 8010032:	681b      	ldr	r3, [r3, #0]
 8010034:	4618      	mov	r0, r3
 8010036:	f001 f9e1 	bl	80113fc <osSemaphoreRelease>
}
 801003a:	bf00      	nop
 801003c:	3708      	adds	r7, #8
 801003e:	46bd      	mov	sp, r7
 8010040:	bd80      	pop	{r7, pc}
 8010042:	bf00      	nop
 8010044:	240022b8 	.word	0x240022b8

08010048 <HAL_ETH_ErrorCallback>:
  * @brief  Ethernet DMA transfer error callback
  * @param  handlerEth: ETH handler
  * @retval None
  */
void HAL_ETH_ErrorCallback(ETH_HandleTypeDef *handlerEth)
{
 8010048:	b580      	push	{r7, lr}
 801004a:	b082      	sub	sp, #8
 801004c:	af00      	add	r7, sp, #0
 801004e:	6078      	str	r0, [r7, #4]
  if((HAL_ETH_GetDMAError(handlerEth) & ETH_DMACSR_RBU) == ETH_DMACSR_RBU)
 8010050:	6878      	ldr	r0, [r7, #4]
 8010052:	f7f8 fe95 	bl	8008d80 <HAL_ETH_GetDMAError>
 8010056:	4603      	mov	r3, r0
 8010058:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 801005c:	2b80      	cmp	r3, #128	@ 0x80
 801005e:	d104      	bne.n	801006a <HAL_ETH_ErrorCallback+0x22>
  {
     osSemaphoreRelease(RxPktSemaphore);
 8010060:	4b04      	ldr	r3, [pc, #16]	@ (8010074 <HAL_ETH_ErrorCallback+0x2c>)
 8010062:	681b      	ldr	r3, [r3, #0]
 8010064:	4618      	mov	r0, r3
 8010066:	f001 f9c9 	bl	80113fc <osSemaphoreRelease>
  }
}
 801006a:	bf00      	nop
 801006c:	3708      	adds	r7, #8
 801006e:	46bd      	mov	sp, r7
 8010070:	bd80      	pop	{r7, pc}
 8010072:	bf00      	nop
 8010074:	240022b4 	.word	0x240022b4

08010078 <low_level_init>:
 *
 * @param netif the already initialized lwip network interface structure
 *        for this ethernetif
 */
static void low_level_init(struct netif *netif)
{
 8010078:	b580      	push	{r7, lr}
 801007a:	b0aa      	sub	sp, #168	@ 0xa8
 801007c:	af00      	add	r7, sp, #0
 801007e:	6078      	str	r0, [r7, #4]
  HAL_StatusTypeDef hal_eth_init_status = HAL_OK;
 8010080:	2300      	movs	r3, #0
 8010082:	f887 309f 	strb.w	r3, [r7, #159]	@ 0x9f
/* USER CODE BEGIN OS_THREAD_ATTR_CMSIS_RTOS_V2 */
  osThreadAttr_t attributes;
/* USER CODE END OS_THREAD_ATTR_CMSIS_RTOS_V2 */
  uint32_t duplex, speed = 0;
 8010086:	2300      	movs	r3, #0
 8010088:	f8c7 30a0 	str.w	r3, [r7, #160]	@ 0xa0
  int32_t PHYLinkState = 0;
 801008c:	2300      	movs	r3, #0
 801008e:	f8c7 3098 	str.w	r3, [r7, #152]	@ 0x98
  ETH_MACConfigTypeDef MACConf = {0};
 8010092:	f107 0310 	add.w	r3, r7, #16
 8010096:	2264      	movs	r2, #100	@ 0x64
 8010098:	2100      	movs	r1, #0
 801009a:	4618      	mov	r0, r3
 801009c:	f01a fa20 	bl	802a4e0 <memset>
  /* Start ETH HAL Init */

   uint8_t MACAddr[6] ;
  heth.Instance = ETH;
 80100a0:	4b86      	ldr	r3, [pc, #536]	@ (80102bc <low_level_init+0x244>)
 80100a2:	4a87      	ldr	r2, [pc, #540]	@ (80102c0 <low_level_init+0x248>)
 80100a4:	601a      	str	r2, [r3, #0]
//  MACAddr[1] = 0x80;
//  MACAddr[2] = 0xE1;
//  MACAddr[3] = 0x00;
//  MACAddr[4] = 0x00;
//  MACAddr[5] = 0x00;
    MACAddr[0] = 0x7C;
 80100a6:	237c      	movs	r3, #124	@ 0x7c
 80100a8:	723b      	strb	r3, [r7, #8]
    MACAddr[1] = 0xF6;
 80100aa:	23f6      	movs	r3, #246	@ 0xf6
 80100ac:	727b      	strb	r3, [r7, #9]
    MACAddr[2] = 0x66;
 80100ae:	2366      	movs	r3, #102	@ 0x66
 80100b0:	72bb      	strb	r3, [r7, #10]
    MACAddr[3] = 0xE4;
 80100b2:	23e4      	movs	r3, #228	@ 0xe4
 80100b4:	72fb      	strb	r3, [r7, #11]
    MACAddr[4] = 0xB5;
 80100b6:	23b5      	movs	r3, #181	@ 0xb5
 80100b8:	733b      	strb	r3, [r7, #12]
    MACAddr[5] = 0x41;
 80100ba:	2341      	movs	r3, #65	@ 0x41
 80100bc:	737b      	strb	r3, [r7, #13]
  heth.Init.MACAddr = &MACAddr[0];
 80100be:	4a7f      	ldr	r2, [pc, #508]	@ (80102bc <low_level_init+0x244>)
 80100c0:	f107 0308 	add.w	r3, r7, #8
 80100c4:	6053      	str	r3, [r2, #4]
  heth.Init.MediaInterface = HAL_ETH_MII_MODE;
 80100c6:	4b7d      	ldr	r3, [pc, #500]	@ (80102bc <low_level_init+0x244>)
 80100c8:	2200      	movs	r2, #0
 80100ca:	721a      	strb	r2, [r3, #8]
  heth.Init.TxDesc = DMATxDscrTab;
 80100cc:	4b7b      	ldr	r3, [pc, #492]	@ (80102bc <low_level_init+0x244>)
 80100ce:	4a7d      	ldr	r2, [pc, #500]	@ (80102c4 <low_level_init+0x24c>)
 80100d0:	60da      	str	r2, [r3, #12]
  heth.Init.RxDesc = DMARxDscrTab;
 80100d2:	4b7a      	ldr	r3, [pc, #488]	@ (80102bc <low_level_init+0x244>)
 80100d4:	4a7c      	ldr	r2, [pc, #496]	@ (80102c8 <low_level_init+0x250>)
 80100d6:	611a      	str	r2, [r3, #16]
  heth.Init.RxBuffLen = 1536;
 80100d8:	4b78      	ldr	r3, [pc, #480]	@ (80102bc <low_level_init+0x244>)
 80100da:	f44f 62c0 	mov.w	r2, #1536	@ 0x600
 80100de:	615a      	str	r2, [r3, #20]

  /* USER CODE BEGIN MACADDRESS */

  /* USER CODE END MACADDRESS */

  hal_eth_init_status = HAL_ETH_Init(&heth);
 80100e0:	4876      	ldr	r0, [pc, #472]	@ (80102bc <low_level_init+0x244>)
 80100e2:	f7f7 fe81 	bl	8007de8 <HAL_ETH_Init>
 80100e6:	4603      	mov	r3, r0
 80100e8:	f887 309f 	strb.w	r3, [r7, #159]	@ 0x9f

  memset(&TxConfig, 0 , sizeof(ETH_TxPacketConfig));
 80100ec:	2238      	movs	r2, #56	@ 0x38
 80100ee:	2100      	movs	r1, #0
 80100f0:	4876      	ldr	r0, [pc, #472]	@ (80102cc <low_level_init+0x254>)
 80100f2:	f01a f9f5 	bl	802a4e0 <memset>
  TxConfig.Attributes = ETH_TX_PACKETS_FEATURES_CSUM | ETH_TX_PACKETS_FEATURES_CRCPAD;
 80100f6:	4b75      	ldr	r3, [pc, #468]	@ (80102cc <low_level_init+0x254>)
 80100f8:	2221      	movs	r2, #33	@ 0x21
 80100fa:	601a      	str	r2, [r3, #0]
  TxConfig.ChecksumCtrl = ETH_CHECKSUM_IPHDR_PAYLOAD_INSERT_PHDR_CALC;
 80100fc:	4b73      	ldr	r3, [pc, #460]	@ (80102cc <low_level_init+0x254>)
 80100fe:	f44f 3240 	mov.w	r2, #196608	@ 0x30000
 8010102:	615a      	str	r2, [r3, #20]
  TxConfig.CRCPadCtrl = ETH_CRC_PAD_INSERT;
 8010104:	4b71      	ldr	r3, [pc, #452]	@ (80102cc <low_level_init+0x254>)
 8010106:	2200      	movs	r2, #0
 8010108:	611a      	str	r2, [r3, #16]

  /* End ETH HAL Init */

  /* Initialize the RX POOL */
  LWIP_MEMPOOL_INIT(RX_POOL);
 801010a:	4871      	ldr	r0, [pc, #452]	@ (80102d0 <low_level_init+0x258>)
 801010c:	f009 fddc 	bl	8019cc8 <memp_init_pool>

#if LWIP_ARP || LWIP_ETHERNET

  /* set MAC hardware address length */
  netif->hwaddr_len = ETH_HWADDR_LEN;
 8010110:	687b      	ldr	r3, [r7, #4]
 8010112:	2206      	movs	r2, #6
 8010114:	f883 2030 	strb.w	r2, [r3, #48]	@ 0x30

  /* set MAC hardware address */
  netif->hwaddr[0] =  heth.Init.MACAddr[0];
 8010118:	4b68      	ldr	r3, [pc, #416]	@ (80102bc <low_level_init+0x244>)
 801011a:	685b      	ldr	r3, [r3, #4]
 801011c:	781a      	ldrb	r2, [r3, #0]
 801011e:	687b      	ldr	r3, [r7, #4]
 8010120:	f883 202a 	strb.w	r2, [r3, #42]	@ 0x2a
  netif->hwaddr[1] =  heth.Init.MACAddr[1];
 8010124:	4b65      	ldr	r3, [pc, #404]	@ (80102bc <low_level_init+0x244>)
 8010126:	685b      	ldr	r3, [r3, #4]
 8010128:	785a      	ldrb	r2, [r3, #1]
 801012a:	687b      	ldr	r3, [r7, #4]
 801012c:	f883 202b 	strb.w	r2, [r3, #43]	@ 0x2b
  netif->hwaddr[2] =  heth.Init.MACAddr[2];
 8010130:	4b62      	ldr	r3, [pc, #392]	@ (80102bc <low_level_init+0x244>)
 8010132:	685b      	ldr	r3, [r3, #4]
 8010134:	789a      	ldrb	r2, [r3, #2]
 8010136:	687b      	ldr	r3, [r7, #4]
 8010138:	f883 202c 	strb.w	r2, [r3, #44]	@ 0x2c
  netif->hwaddr[3] =  heth.Init.MACAddr[3];
 801013c:	4b5f      	ldr	r3, [pc, #380]	@ (80102bc <low_level_init+0x244>)
 801013e:	685b      	ldr	r3, [r3, #4]
 8010140:	78da      	ldrb	r2, [r3, #3]
 8010142:	687b      	ldr	r3, [r7, #4]
 8010144:	f883 202d 	strb.w	r2, [r3, #45]	@ 0x2d
  netif->hwaddr[4] =  heth.Init.MACAddr[4];
 8010148:	4b5c      	ldr	r3, [pc, #368]	@ (80102bc <low_level_init+0x244>)
 801014a:	685b      	ldr	r3, [r3, #4]
 801014c:	791a      	ldrb	r2, [r3, #4]
 801014e:	687b      	ldr	r3, [r7, #4]
 8010150:	f883 202e 	strb.w	r2, [r3, #46]	@ 0x2e
  netif->hwaddr[5] =  heth.Init.MACAddr[5];
 8010154:	4b59      	ldr	r3, [pc, #356]	@ (80102bc <low_level_init+0x244>)
 8010156:	685b      	ldr	r3, [r3, #4]
 8010158:	795a      	ldrb	r2, [r3, #5]
 801015a:	687b      	ldr	r3, [r7, #4]
 801015c:	f883 202f 	strb.w	r2, [r3, #47]	@ 0x2f

  /* maximum transfer unit */
  netif->mtu = ETH_MAX_PAYLOAD;
 8010160:	687b      	ldr	r3, [r7, #4]
 8010162:	f240 52dc 	movw	r2, #1500	@ 0x5dc
 8010166:	851a      	strh	r2, [r3, #40]	@ 0x28

  /* Accept broadcast address and ARP traffic */
  /* don't set NETIF_FLAG_ETHARP if this device is not an ethernet one */
  #if LWIP_ARP
    netif->flags |= NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP;
 8010168:	687b      	ldr	r3, [r7, #4]
 801016a:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 801016e:	f043 030a 	orr.w	r3, r3, #10
 8010172:	b2da      	uxtb	r2, r3
 8010174:	687b      	ldr	r3, [r7, #4]
 8010176:	f883 2031 	strb.w	r2, [r3, #49]	@ 0x31
  #else
    netif->flags |= NETIF_FLAG_BROADCAST;
  #endif /* LWIP_ARP */

  /* create a binary semaphore used for informing ethernetif of frame reception */
  RxPktSemaphore = osSemaphoreNew(1, 1, NULL);
 801017a:	2200      	movs	r2, #0
 801017c:	2101      	movs	r1, #1
 801017e:	2001      	movs	r0, #1
 8010180:	f001 f860 	bl	8011244 <osSemaphoreNew>
 8010184:	4603      	mov	r3, r0
 8010186:	4a53      	ldr	r2, [pc, #332]	@ (80102d4 <low_level_init+0x25c>)
 8010188:	6013      	str	r3, [r2, #0]

  /* create a binary semaphore used for informing ethernetif of frame transmission */
  TxPktSemaphore = osSemaphoreNew(1, 1, NULL);
 801018a:	2200      	movs	r2, #0
 801018c:	2101      	movs	r1, #1
 801018e:	2001      	movs	r0, #1
 8010190:	f001 f858 	bl	8011244 <osSemaphoreNew>
 8010194:	4603      	mov	r3, r0
 8010196:	4a50      	ldr	r2, [pc, #320]	@ (80102d8 <low_level_init+0x260>)
 8010198:	6013      	str	r3, [r2, #0]

  /* create the task that handles the ETH_MAC */
/* USER CODE BEGIN OS_THREAD_NEW_CMSIS_RTOS_V2 */
  memset(&attributes, 0x0, sizeof(osThreadAttr_t));
 801019a:	f107 0374 	add.w	r3, r7, #116	@ 0x74
 801019e:	2224      	movs	r2, #36	@ 0x24
 80101a0:	2100      	movs	r1, #0
 80101a2:	4618      	mov	r0, r3
 80101a4:	f01a f99c 	bl	802a4e0 <memset>
  attributes.name = "EthIf";
 80101a8:	4b4c      	ldr	r3, [pc, #304]	@ (80102dc <low_level_init+0x264>)
 80101aa:	677b      	str	r3, [r7, #116]	@ 0x74
  attributes.stack_size = INTERFACE_THREAD_STACK_SIZE;
 80101ac:	f44f 6380 	mov.w	r3, #1024	@ 0x400
 80101b0:	f8c7 3088 	str.w	r3, [r7, #136]	@ 0x88
  attributes.priority = osPriorityRealtime;
 80101b4:	2330      	movs	r3, #48	@ 0x30
 80101b6:	f8c7 308c 	str.w	r3, [r7, #140]	@ 0x8c
  osThreadNew(ethernetif_input, netif, &attributes);
 80101ba:	f107 0374 	add.w	r3, r7, #116	@ 0x74
 80101be:	461a      	mov	r2, r3
 80101c0:	6879      	ldr	r1, [r7, #4]
 80101c2:	4847      	ldr	r0, [pc, #284]	@ (80102e0 <low_level_init+0x268>)
 80101c4:	f000 fde5 	bl	8010d92 <osThreadNew>

/* USER CODE BEGIN PHY_PRE_CONFIG */

/* USER CODE END PHY_PRE_CONFIG */
  /* Set PHY IO functions */
  DP83848_RegisterBusIO(&DP83848, &DP83848_IOCtx);
 80101c8:	4946      	ldr	r1, [pc, #280]	@ (80102e4 <low_level_init+0x26c>)
 80101ca:	4847      	ldr	r0, [pc, #284]	@ (80102e8 <low_level_init+0x270>)
 80101cc:	f7f4 fee1 	bl	8004f92 <DP83848_RegisterBusIO>

  /* Initialize the DP83848 ETH PHY */
  DP83848_Init(&DP83848);
 80101d0:	4845      	ldr	r0, [pc, #276]	@ (80102e8 <low_level_init+0x270>)
 80101d2:	f7f4 ff10 	bl	8004ff6 <DP83848_Init>

  if (hal_eth_init_status == HAL_OK)
 80101d6:	f897 309f 	ldrb.w	r3, [r7, #159]	@ 0x9f
 80101da:	2b00      	cmp	r3, #0
 80101dc:	d168      	bne.n	80102b0 <low_level_init+0x238>
  {
    PHYLinkState = DP83848_GetLinkState(&DP83848);
 80101de:	4842      	ldr	r0, [pc, #264]	@ (80102e8 <low_level_init+0x270>)
 80101e0:	f7f4 ff56 	bl	8005090 <DP83848_GetLinkState>
 80101e4:	f8c7 0098 	str.w	r0, [r7, #152]	@ 0x98

    /* Get link state */
    if(PHYLinkState <= DP83848_STATUS_LINK_DOWN)
 80101e8:	f8d7 3098 	ldr.w	r3, [r7, #152]	@ 0x98
 80101ec:	2b01      	cmp	r3, #1
 80101ee:	dc06      	bgt.n	80101fe <low_level_init+0x186>
    {
      netif_set_link_down(netif);
 80101f0:	6878      	ldr	r0, [r7, #4]
 80101f2:	f00a f959 	bl	801a4a8 <netif_set_link_down>
      netif_set_down(netif);
 80101f6:	6878      	ldr	r0, [r7, #4]
 80101f8:	f00a f8e8 	bl	801a3cc <netif_set_down>
#endif /* LWIP_ARP || LWIP_ETHERNET */

/* USER CODE BEGIN LOW_LEVEL_INIT */

/* USER CODE END LOW_LEVEL_INIT */
}
 80101fc:	e05a      	b.n	80102b4 <low_level_init+0x23c>
      switch (PHYLinkState)
 80101fe:	f8d7 3098 	ldr.w	r3, [r7, #152]	@ 0x98
 8010202:	3b02      	subs	r3, #2
 8010204:	2b03      	cmp	r3, #3
 8010206:	d82b      	bhi.n	8010260 <low_level_init+0x1e8>
 8010208:	a201      	add	r2, pc, #4	@ (adr r2, 8010210 <low_level_init+0x198>)
 801020a:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 801020e:	bf00      	nop
 8010210:	08010221 	.word	0x08010221
 8010214:	08010233 	.word	0x08010233
 8010218:	08010243 	.word	0x08010243
 801021c:	08010253 	.word	0x08010253
        duplex = ETH_FULLDUPLEX_MODE;
 8010220:	f44f 5300 	mov.w	r3, #8192	@ 0x2000
 8010224:	f8c7 30a4 	str.w	r3, [r7, #164]	@ 0xa4
        speed = ETH_SPEED_100M;
 8010228:	f44f 4380 	mov.w	r3, #16384	@ 0x4000
 801022c:	f8c7 30a0 	str.w	r3, [r7, #160]	@ 0xa0
        break;
 8010230:	e01f      	b.n	8010272 <low_level_init+0x1fa>
        duplex = ETH_HALFDUPLEX_MODE;
 8010232:	2300      	movs	r3, #0
 8010234:	f8c7 30a4 	str.w	r3, [r7, #164]	@ 0xa4
        speed = ETH_SPEED_100M;
 8010238:	f44f 4380 	mov.w	r3, #16384	@ 0x4000
 801023c:	f8c7 30a0 	str.w	r3, [r7, #160]	@ 0xa0
        break;
 8010240:	e017      	b.n	8010272 <low_level_init+0x1fa>
        duplex = ETH_FULLDUPLEX_MODE;
 8010242:	f44f 5300 	mov.w	r3, #8192	@ 0x2000
 8010246:	f8c7 30a4 	str.w	r3, [r7, #164]	@ 0xa4
        speed = ETH_SPEED_10M;
 801024a:	2300      	movs	r3, #0
 801024c:	f8c7 30a0 	str.w	r3, [r7, #160]	@ 0xa0
        break;
 8010250:	e00f      	b.n	8010272 <low_level_init+0x1fa>
        duplex = ETH_HALFDUPLEX_MODE;
 8010252:	2300      	movs	r3, #0
 8010254:	f8c7 30a4 	str.w	r3, [r7, #164]	@ 0xa4
        speed = ETH_SPEED_10M;
 8010258:	2300      	movs	r3, #0
 801025a:	f8c7 30a0 	str.w	r3, [r7, #160]	@ 0xa0
        break;
 801025e:	e008      	b.n	8010272 <low_level_init+0x1fa>
        duplex = ETH_FULLDUPLEX_MODE;
 8010260:	f44f 5300 	mov.w	r3, #8192	@ 0x2000
 8010264:	f8c7 30a4 	str.w	r3, [r7, #164]	@ 0xa4
        speed = ETH_SPEED_100M;
 8010268:	f44f 4380 	mov.w	r3, #16384	@ 0x4000
 801026c:	f8c7 30a0 	str.w	r3, [r7, #160]	@ 0xa0
        break;
 8010270:	bf00      	nop
    HAL_ETH_GetMACConfig(&heth, &MACConf);
 8010272:	f107 0310 	add.w	r3, r7, #16
 8010276:	4619      	mov	r1, r3
 8010278:	4810      	ldr	r0, [pc, #64]	@ (80102bc <low_level_init+0x244>)
 801027a:	f7f8 fb43 	bl	8008904 <HAL_ETH_GetMACConfig>
    MACConf.DuplexMode = duplex;
 801027e:	f8d7 30a4 	ldr.w	r3, [r7, #164]	@ 0xa4
 8010282:	62bb      	str	r3, [r7, #40]	@ 0x28
    MACConf.Speed = speed;
 8010284:	f8d7 30a0 	ldr.w	r3, [r7, #160]	@ 0xa0
 8010288:	627b      	str	r3, [r7, #36]	@ 0x24
    HAL_ETH_SetMACConfig(&heth, &MACConf);
 801028a:	f107 0310 	add.w	r3, r7, #16
 801028e:	4619      	mov	r1, r3
 8010290:	480a      	ldr	r0, [pc, #40]	@ (80102bc <low_level_init+0x244>)
 8010292:	f7f8 fd0b 	bl	8008cac <HAL_ETH_SetMACConfig>
    HAL_ETH_Start_IT(&heth);
 8010296:	4809      	ldr	r0, [pc, #36]	@ (80102bc <low_level_init+0x244>)
 8010298:	f7f7 fea4 	bl	8007fe4 <HAL_ETH_Start_IT>
    netif_set_up(netif);
 801029c:	6878      	ldr	r0, [r7, #4]
 801029e:	f00a f827 	bl	801a2f0 <netif_set_up>
    netif_set_link_up(netif);
 80102a2:	6878      	ldr	r0, [r7, #4]
 80102a4:	f00a f8c6 	bl	801a434 <netif_set_link_up>
    ethernetif_notify_conn_changed(netif);
 80102a8:	6878      	ldr	r0, [r7, #4]
 80102aa:	f000 fb1b 	bl	80108e4 <ethernetif_notify_conn_changed>
}
 80102ae:	e001      	b.n	80102b4 <low_level_init+0x23c>
    Error_Handler();
 80102b0:	f7f2 f9ca 	bl	8002648 <Error_Handler>
}
 80102b4:	bf00      	nop
 80102b6:	37a8      	adds	r7, #168	@ 0xa8
 80102b8:	46bd      	mov	sp, r7
 80102ba:	bd80      	pop	{r7, pc}
 80102bc:	240022bc 	.word	0x240022bc
 80102c0:	40028000 	.word	0x40028000
 80102c4:	24040100 	.word	0x24040100
 80102c8:	24040000 	.word	0x24040000
 80102cc:	2400236c 	.word	0x2400236c
 80102d0:	08031348 	.word	0x08031348
 80102d4:	240022b4 	.word	0x240022b4
 80102d8:	240022b8 	.word	0x240022b8
 80102dc:	0802d28c 	.word	0x0802d28c
 80102e0:	08010455 	.word	0x08010455
 80102e4:	24000034 	.word	0x24000034
 80102e8:	240023a4 	.word	0x240023a4

080102ec <low_level_output>:
 *       to become available since the stack doesn't retry to send a packet
 *       dropped because of memory failure (except for the TCP timers).
 */

static err_t low_level_output(struct netif *netif, struct pbuf *p)
{
 80102ec:	b580      	push	{r7, lr}
 80102ee:	b092      	sub	sp, #72	@ 0x48
 80102f0:	af00      	add	r7, sp, #0
 80102f2:	6078      	str	r0, [r7, #4]
 80102f4:	6039      	str	r1, [r7, #0]
  uint32_t i = 0U;
 80102f6:	2300      	movs	r3, #0
 80102f8:	647b      	str	r3, [r7, #68]	@ 0x44
  struct pbuf *q = NULL;
 80102fa:	2300      	movs	r3, #0
 80102fc:	643b      	str	r3, [r7, #64]	@ 0x40
  err_t errval = ERR_OK;
 80102fe:	2300      	movs	r3, #0
 8010300:	f887 303f 	strb.w	r3, [r7, #63]	@ 0x3f
  ETH_BufferTypeDef Txbuffer[ETH_TX_DESC_CNT] = {0};
 8010304:	f107 030c 	add.w	r3, r7, #12
 8010308:	2230      	movs	r2, #48	@ 0x30
 801030a:	2100      	movs	r1, #0
 801030c:	4618      	mov	r0, r3
 801030e:	f01a f8e7 	bl	802a4e0 <memset>

  memset(Txbuffer, 0 , ETH_TX_DESC_CNT*sizeof(ETH_BufferTypeDef));
 8010312:	f107 030c 	add.w	r3, r7, #12
 8010316:	2230      	movs	r2, #48	@ 0x30
 8010318:	2100      	movs	r1, #0
 801031a:	4618      	mov	r0, r3
 801031c:	f01a f8e0 	bl	802a4e0 <memset>

  for(q = p; q != NULL; q = q->next)
 8010320:	683b      	ldr	r3, [r7, #0]
 8010322:	643b      	str	r3, [r7, #64]	@ 0x40
 8010324:	e045      	b.n	80103b2 <low_level_output+0xc6>
  {
    if(i >= ETH_TX_DESC_CNT)
 8010326:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 8010328:	2b03      	cmp	r3, #3
 801032a:	d902      	bls.n	8010332 <low_level_output+0x46>
      return ERR_IF;
 801032c:	f06f 030b 	mvn.w	r3, #11
 8010330:	e06c      	b.n	801040c <low_level_output+0x120>

    Txbuffer[i].buffer = q->payload;
 8010332:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8010334:	6859      	ldr	r1, [r3, #4]
 8010336:	6c7a      	ldr	r2, [r7, #68]	@ 0x44
 8010338:	4613      	mov	r3, r2
 801033a:	005b      	lsls	r3, r3, #1
 801033c:	4413      	add	r3, r2
 801033e:	009b      	lsls	r3, r3, #2
 8010340:	3348      	adds	r3, #72	@ 0x48
 8010342:	443b      	add	r3, r7
 8010344:	3b3c      	subs	r3, #60	@ 0x3c
 8010346:	6019      	str	r1, [r3, #0]
    Txbuffer[i].len = q->len;
 8010348:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801034a:	895b      	ldrh	r3, [r3, #10]
 801034c:	4619      	mov	r1, r3
 801034e:	6c7a      	ldr	r2, [r7, #68]	@ 0x44
 8010350:	4613      	mov	r3, r2
 8010352:	005b      	lsls	r3, r3, #1
 8010354:	4413      	add	r3, r2
 8010356:	009b      	lsls	r3, r3, #2
 8010358:	3348      	adds	r3, #72	@ 0x48
 801035a:	443b      	add	r3, r7
 801035c:	3b38      	subs	r3, #56	@ 0x38
 801035e:	6019      	str	r1, [r3, #0]

    if(i>0)
 8010360:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 8010362:	2b00      	cmp	r3, #0
 8010364:	d011      	beq.n	801038a <low_level_output+0x9e>
    {
      Txbuffer[i-1].next = &Txbuffer[i];
 8010366:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 8010368:	1e5a      	subs	r2, r3, #1
 801036a:	f107 000c 	add.w	r0, r7, #12
 801036e:	6c79      	ldr	r1, [r7, #68]	@ 0x44
 8010370:	460b      	mov	r3, r1
 8010372:	005b      	lsls	r3, r3, #1
 8010374:	440b      	add	r3, r1
 8010376:	009b      	lsls	r3, r3, #2
 8010378:	18c1      	adds	r1, r0, r3
 801037a:	4613      	mov	r3, r2
 801037c:	005b      	lsls	r3, r3, #1
 801037e:	4413      	add	r3, r2
 8010380:	009b      	lsls	r3, r3, #2
 8010382:	3348      	adds	r3, #72	@ 0x48
 8010384:	443b      	add	r3, r7
 8010386:	3b34      	subs	r3, #52	@ 0x34
 8010388:	6019      	str	r1, [r3, #0]
    }

    if(q->next == NULL)
 801038a:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801038c:	681b      	ldr	r3, [r3, #0]
 801038e:	2b00      	cmp	r3, #0
 8010390:	d109      	bne.n	80103a6 <low_level_output+0xba>
    {
      Txbuffer[i].next = NULL;
 8010392:	6c7a      	ldr	r2, [r7, #68]	@ 0x44
 8010394:	4613      	mov	r3, r2
 8010396:	005b      	lsls	r3, r3, #1
 8010398:	4413      	add	r3, r2
 801039a:	009b      	lsls	r3, r3, #2
 801039c:	3348      	adds	r3, #72	@ 0x48
 801039e:	443b      	add	r3, r7
 80103a0:	3b34      	subs	r3, #52	@ 0x34
 80103a2:	2200      	movs	r2, #0
 80103a4:	601a      	str	r2, [r3, #0]
    }

    i++;
 80103a6:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 80103a8:	3301      	adds	r3, #1
 80103aa:	647b      	str	r3, [r7, #68]	@ 0x44
  for(q = p; q != NULL; q = q->next)
 80103ac:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 80103ae:	681b      	ldr	r3, [r3, #0]
 80103b0:	643b      	str	r3, [r7, #64]	@ 0x40
 80103b2:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 80103b4:	2b00      	cmp	r3, #0
 80103b6:	d1b6      	bne.n	8010326 <low_level_output+0x3a>
  }

  TxConfig.Length = p->tot_len;
 80103b8:	683b      	ldr	r3, [r7, #0]
 80103ba:	891b      	ldrh	r3, [r3, #8]
 80103bc:	461a      	mov	r2, r3
 80103be:	4b15      	ldr	r3, [pc, #84]	@ (8010414 <low_level_output+0x128>)
 80103c0:	605a      	str	r2, [r3, #4]
  TxConfig.TxBuffer = Txbuffer;
 80103c2:	4a14      	ldr	r2, [pc, #80]	@ (8010414 <low_level_output+0x128>)
 80103c4:	f107 030c 	add.w	r3, r7, #12
 80103c8:	6093      	str	r3, [r2, #8]
  TxConfig.pData = p;
 80103ca:	4a12      	ldr	r2, [pc, #72]	@ (8010414 <low_level_output+0x128>)
 80103cc:	683b      	ldr	r3, [r7, #0]
 80103ce:	6353      	str	r3, [r2, #52]	@ 0x34

  pbuf_ref(p);
 80103d0:	6838      	ldr	r0, [r7, #0]
 80103d2:	f00a fd21 	bl	801ae18 <pbuf_ref>
#if 1
  if (HAL_ETH_Transmit_IT(&heth, &TxConfig) == HAL_OK) {
 80103d6:	490f      	ldr	r1, [pc, #60]	@ (8010414 <low_level_output+0x128>)
 80103d8:	480f      	ldr	r0, [pc, #60]	@ (8010418 <low_level_output+0x12c>)
 80103da:	f7f7 feef 	bl	80081bc <HAL_ETH_Transmit_IT>
 80103de:	4603      	mov	r3, r0
 80103e0:	2b00      	cmp	r3, #0
 80103e2:	d10e      	bne.n	8010402 <low_level_output+0x116>
    while(osSemaphoreAcquire(TxPktSemaphore, TIME_WAITING_FOR_INPUT)!=osOK)
 80103e4:	bf00      	nop
 80103e6:	4b0d      	ldr	r3, [pc, #52]	@ (801041c <low_level_output+0x130>)
 80103e8:	681b      	ldr	r3, [r3, #0]
 80103ea:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 80103ee:	4618      	mov	r0, r3
 80103f0:	f000 ffb2 	bl	8011358 <osSemaphoreAcquire>
 80103f4:	4603      	mov	r3, r0
 80103f6:	2b00      	cmp	r3, #0
 80103f8:	d1f5      	bne.n	80103e6 <low_level_output+0xfa>
    {
    }
//	osSemaphoreAcquire(TxPktSemaphore, pdMS_TO_TICKS(1000));
    HAL_ETH_ReleaseTxPacket(&heth);
 80103fa:	4807      	ldr	r0, [pc, #28]	@ (8010418 <low_level_output+0x12c>)
 80103fc:	f7f8 f865 	bl	80084ca <HAL_ETH_ReleaseTxPacket>
 8010400:	e002      	b.n	8010408 <low_level_output+0x11c>
  } else {
    pbuf_free(p);
 8010402:	6838      	ldr	r0, [r7, #0]
 8010404:	f00a fc62 	bl	801accc <pbuf_free>
  HAL_ETH_Transmit_IT(&heth, &TxConfig);
  osSemaphoreAcquire(TxPktSemaphore, pdMS_TO_TICKS(100));
  HAL_ETH_ReleaseTxPacket(&heth);
#endif

  return errval;
 8010408:	f997 303f 	ldrsb.w	r3, [r7, #63]	@ 0x3f
}
 801040c:	4618      	mov	r0, r3
 801040e:	3748      	adds	r7, #72	@ 0x48
 8010410:	46bd      	mov	sp, r7
 8010412:	bd80      	pop	{r7, pc}
 8010414:	2400236c 	.word	0x2400236c
 8010418:	240022bc 	.word	0x240022bc
 801041c:	240022b8 	.word	0x240022b8

08010420 <low_level_input>:
 * @param netif the lwip network interface structure for this ethernetif
 * @return a pbuf filled with the received packet (including MAC header)
 *         NULL on memory error
   */
static struct pbuf * low_level_input(struct netif *netif)
{
 8010420:	b580      	push	{r7, lr}
 8010422:	b084      	sub	sp, #16
 8010424:	af00      	add	r7, sp, #0
 8010426:	6078      	str	r0, [r7, #4]
  struct pbuf *p = NULL;
 8010428:	2300      	movs	r3, #0
 801042a:	60fb      	str	r3, [r7, #12]

  if(RxAllocStatus == RX_ALLOC_OK)
 801042c:	4b07      	ldr	r3, [pc, #28]	@ (801044c <low_level_input+0x2c>)
 801042e:	781b      	ldrb	r3, [r3, #0]
 8010430:	2b00      	cmp	r3, #0
 8010432:	d105      	bne.n	8010440 <low_level_input+0x20>
  {
    HAL_ETH_ReadData(&heth, (void **)&p);
 8010434:	f107 030c 	add.w	r3, r7, #12
 8010438:	4619      	mov	r1, r3
 801043a:	4805      	ldr	r0, [pc, #20]	@ (8010450 <low_level_input+0x30>)
 801043c:	f7f7 ff0f 	bl	800825e <HAL_ETH_ReadData>
  }

  return p;
 8010440:	68fb      	ldr	r3, [r7, #12]
}
 8010442:	4618      	mov	r0, r3
 8010444:	3710      	adds	r7, #16
 8010446:	46bd      	mov	sp, r7
 8010448:	bd80      	pop	{r7, pc}
 801044a:	bf00      	nop
 801044c:	240022b0 	.word	0x240022b0
 8010450:	240022bc 	.word	0x240022bc

08010454 <ethernetif_input>:
 * the appropriate input function is called.
 *
 * @param netif the lwip network interface structure for this ethernetif
 */
void ethernetif_input(void* argument)
{
 8010454:	b580      	push	{r7, lr}
 8010456:	b084      	sub	sp, #16
 8010458:	af00      	add	r7, sp, #0
 801045a:	6078      	str	r0, [r7, #4]
  struct pbuf *p = NULL;
 801045c:	2300      	movs	r3, #0
 801045e:	60fb      	str	r3, [r7, #12]
  struct netif *netif = (struct netif *) argument;
 8010460:	687b      	ldr	r3, [r7, #4]
 8010462:	60bb      	str	r3, [r7, #8]

  for( ;; )
  {
    if (osSemaphoreAcquire(RxPktSemaphore, TIME_WAITING_FOR_INPUT) == osOK)
 8010464:	4b0f      	ldr	r3, [pc, #60]	@ (80104a4 <ethernetif_input+0x50>)
 8010466:	681b      	ldr	r3, [r3, #0]
 8010468:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 801046c:	4618      	mov	r0, r3
 801046e:	f000 ff73 	bl	8011358 <osSemaphoreAcquire>
 8010472:	4603      	mov	r3, r0
 8010474:	2b00      	cmp	r3, #0
 8010476:	d1f5      	bne.n	8010464 <ethernetif_input+0x10>
    {
      do
      {
        p = low_level_input( netif );
 8010478:	68b8      	ldr	r0, [r7, #8]
 801047a:	f7ff ffd1 	bl	8010420 <low_level_input>
 801047e:	60f8      	str	r0, [r7, #12]
        if (p != NULL)
 8010480:	68fb      	ldr	r3, [r7, #12]
 8010482:	2b00      	cmp	r3, #0
 8010484:	d00a      	beq.n	801049c <ethernetif_input+0x48>
        {
          if (netif->input( p, netif) != ERR_OK )
 8010486:	68bb      	ldr	r3, [r7, #8]
 8010488:	691b      	ldr	r3, [r3, #16]
 801048a:	68b9      	ldr	r1, [r7, #8]
 801048c:	68f8      	ldr	r0, [r7, #12]
 801048e:	4798      	blx	r3
 8010490:	4603      	mov	r3, r0
 8010492:	2b00      	cmp	r3, #0
 8010494:	d002      	beq.n	801049c <ethernetif_input+0x48>
          {
            pbuf_free(p);
 8010496:	68f8      	ldr	r0, [r7, #12]
 8010498:	f00a fc18 	bl	801accc <pbuf_free>
          }
        }
      } while(p!=NULL);
 801049c:	68fb      	ldr	r3, [r7, #12]
 801049e:	2b00      	cmp	r3, #0
 80104a0:	d1ea      	bne.n	8010478 <ethernetif_input+0x24>
    if (osSemaphoreAcquire(RxPktSemaphore, TIME_WAITING_FOR_INPUT) == osOK)
 80104a2:	e7df      	b.n	8010464 <ethernetif_input+0x10>
 80104a4:	240022b4 	.word	0x240022b4

080104a8 <ethernetif_init>:
 * @return ERR_OK if the loopif is initialized
 *         ERR_MEM if private data couldn't be allocated
 *         any other err_t on error
 */
err_t ethernetif_init(struct netif *netif)
{
 80104a8:	b580      	push	{r7, lr}
 80104aa:	b082      	sub	sp, #8
 80104ac:	af00      	add	r7, sp, #0
 80104ae:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT("netif != NULL", (netif != NULL));
 80104b0:	687b      	ldr	r3, [r7, #4]
 80104b2:	2b00      	cmp	r3, #0
 80104b4:	d106      	bne.n	80104c4 <ethernetif_init+0x1c>
 80104b6:	4b0e      	ldr	r3, [pc, #56]	@ (80104f0 <ethernetif_init+0x48>)
 80104b8:	f240 2235 	movw	r2, #565	@ 0x235
 80104bc:	490d      	ldr	r1, [pc, #52]	@ (80104f4 <ethernetif_init+0x4c>)
 80104be:	480e      	ldr	r0, [pc, #56]	@ (80104f8 <ethernetif_init+0x50>)
 80104c0:	f019 fe7c 	bl	802a1bc <iprintf>
   * The last argument should be replaced with your link speed, in units
   * of bits per second.
   */
  // MIB2_INIT_NETIF(netif, snmp_ifType_ethernet_csmacd, LINK_SPEED_OF_YOUR_NETIF_IN_BPS);

  netif->name[0] = IFNAME0;
 80104c4:	687b      	ldr	r3, [r7, #4]
 80104c6:	2273      	movs	r2, #115	@ 0x73
 80104c8:	f883 2032 	strb.w	r2, [r3, #50]	@ 0x32
  netif->name[1] = IFNAME1;
 80104cc:	687b      	ldr	r3, [r7, #4]
 80104ce:	2274      	movs	r2, #116	@ 0x74
 80104d0:	f883 2033 	strb.w	r2, [r3, #51]	@ 0x33
   * is available...) */

#if LWIP_IPV4
#if LWIP_ARP || LWIP_ETHERNET
#if LWIP_ARP
  netif->output = etharp_output;
 80104d4:	687b      	ldr	r3, [r7, #4]
 80104d6:	4a09      	ldr	r2, [pc, #36]	@ (80104fc <ethernetif_init+0x54>)
 80104d8:	615a      	str	r2, [r3, #20]

#if LWIP_IPV6
  netif->output_ip6 = ethip6_output;
#endif /* LWIP_IPV6 */

  netif->linkoutput = low_level_output;
 80104da:	687b      	ldr	r3, [r7, #4]
 80104dc:	4a08      	ldr	r2, [pc, #32]	@ (8010500 <ethernetif_init+0x58>)
 80104de:	619a      	str	r2, [r3, #24]

  /* initialize the hardware */
  low_level_init(netif);
 80104e0:	6878      	ldr	r0, [r7, #4]
 80104e2:	f7ff fdc9 	bl	8010078 <low_level_init>

  return ERR_OK;
 80104e6:	2300      	movs	r3, #0
}
 80104e8:	4618      	mov	r0, r3
 80104ea:	3708      	adds	r7, #8
 80104ec:	46bd      	mov	sp, r7
 80104ee:	bd80      	pop	{r7, pc}
 80104f0:	0802d294 	.word	0x0802d294
 80104f4:	0802d2b0 	.word	0x0802d2b0
 80104f8:	0802d2c0 	.word	0x0802d2c0
 80104fc:	0802482d 	.word	0x0802482d
 8010500:	080102ed 	.word	0x080102ed

08010504 <pbuf_free_custom>:
  * @brief  Custom Rx pbuf free callback
  * @param  pbuf: pbuf to be freed
  * @retval None
  */
void pbuf_free_custom(struct pbuf *p)
{
 8010504:	b580      	push	{r7, lr}
 8010506:	b084      	sub	sp, #16
 8010508:	af00      	add	r7, sp, #0
 801050a:	6078      	str	r0, [r7, #4]
  struct pbuf_custom* custom_pbuf = (struct pbuf_custom*)p;
 801050c:	687b      	ldr	r3, [r7, #4]
 801050e:	60fb      	str	r3, [r7, #12]
  LWIP_MEMPOOL_FREE(RX_POOL, custom_pbuf);
 8010510:	68f9      	ldr	r1, [r7, #12]
 8010512:	4809      	ldr	r0, [pc, #36]	@ (8010538 <pbuf_free_custom+0x34>)
 8010514:	f009 fcc8 	bl	8019ea8 <memp_free_pool>

  /* If the Rx Buffer Pool was exhausted, signal the ethernetif_input task to
   * call HAL_ETH_GetRxDataBuffer to rebuild the Rx descriptors. */

  if (RxAllocStatus == RX_ALLOC_ERROR)
 8010518:	4b08      	ldr	r3, [pc, #32]	@ (801053c <pbuf_free_custom+0x38>)
 801051a:	781b      	ldrb	r3, [r3, #0]
 801051c:	2b01      	cmp	r3, #1
 801051e:	d107      	bne.n	8010530 <pbuf_free_custom+0x2c>
  {
    RxAllocStatus = RX_ALLOC_OK;
 8010520:	4b06      	ldr	r3, [pc, #24]	@ (801053c <pbuf_free_custom+0x38>)
 8010522:	2200      	movs	r2, #0
 8010524:	701a      	strb	r2, [r3, #0]
    osSemaphoreRelease(RxPktSemaphore);
 8010526:	4b06      	ldr	r3, [pc, #24]	@ (8010540 <pbuf_free_custom+0x3c>)
 8010528:	681b      	ldr	r3, [r3, #0]
 801052a:	4618      	mov	r0, r3
 801052c:	f000 ff66 	bl	80113fc <osSemaphoreRelease>
  }
}
 8010530:	bf00      	nop
 8010532:	3710      	adds	r7, #16
 8010534:	46bd      	mov	sp, r7
 8010536:	bd80      	pop	{r7, pc}
 8010538:	08031348 	.word	0x08031348
 801053c:	240022b0 	.word	0x240022b0
 8010540:	240022b4 	.word	0x240022b4

08010544 <sys_now>:
*         when LWIP_TIMERS == 1 and NO_SYS == 1
* @param  None
* @retval Current Time value
*/
u32_t sys_now(void)
{
 8010544:	b580      	push	{r7, lr}
 8010546:	af00      	add	r7, sp, #0
  return HAL_GetTick();
 8010548:	f7f4 fe7a 	bl	8005240 <HAL_GetTick>
 801054c:	4603      	mov	r3, r0
}
 801054e:	4618      	mov	r0, r3
 8010550:	bd80      	pop	{r7, pc}
	...

08010554 <HAL_ETH_MspInit>:
  * @param  ethHandle: ETH handle
  * @retval None
  */

void HAL_ETH_MspInit(ETH_HandleTypeDef* ethHandle)
{
 8010554:	b580      	push	{r7, lr}
 8010556:	b08e      	sub	sp, #56	@ 0x38
 8010558:	af00      	add	r7, sp, #0
 801055a:	6078      	str	r0, [r7, #4]
  GPIO_InitTypeDef GPIO_InitStruct = {0};
 801055c:	f107 0324 	add.w	r3, r7, #36	@ 0x24
 8010560:	2200      	movs	r2, #0
 8010562:	601a      	str	r2, [r3, #0]
 8010564:	605a      	str	r2, [r3, #4]
 8010566:	609a      	str	r2, [r3, #8]
 8010568:	60da      	str	r2, [r3, #12]
 801056a:	611a      	str	r2, [r3, #16]
  if(ethHandle->Instance==ETH)
 801056c:	687b      	ldr	r3, [r7, #4]
 801056e:	681b      	ldr	r3, [r3, #0]
 8010570:	4a55      	ldr	r2, [pc, #340]	@ (80106c8 <HAL_ETH_MspInit+0x174>)
 8010572:	4293      	cmp	r3, r2
 8010574:	f040 80a4 	bne.w	80106c0 <HAL_ETH_MspInit+0x16c>
  {
  /* USER CODE BEGIN ETH_MspInit 0 */

  /* USER CODE END ETH_MspInit 0 */
    /* Enable Peripheral clock */
    __HAL_RCC_ETH1MAC_CLK_ENABLE();
 8010578:	4b54      	ldr	r3, [pc, #336]	@ (80106cc <HAL_ETH_MspInit+0x178>)
 801057a:	f8d3 30d8 	ldr.w	r3, [r3, #216]	@ 0xd8
 801057e:	4a53      	ldr	r2, [pc, #332]	@ (80106cc <HAL_ETH_MspInit+0x178>)
 8010580:	f443 4300 	orr.w	r3, r3, #32768	@ 0x8000
 8010584:	f8c2 30d8 	str.w	r3, [r2, #216]	@ 0xd8
 8010588:	4b50      	ldr	r3, [pc, #320]	@ (80106cc <HAL_ETH_MspInit+0x178>)
 801058a:	f8d3 30d8 	ldr.w	r3, [r3, #216]	@ 0xd8
 801058e:	f403 4300 	and.w	r3, r3, #32768	@ 0x8000
 8010592:	623b      	str	r3, [r7, #32]
 8010594:	6a3b      	ldr	r3, [r7, #32]
    __HAL_RCC_ETH1TX_CLK_ENABLE();
 8010596:	4b4d      	ldr	r3, [pc, #308]	@ (80106cc <HAL_ETH_MspInit+0x178>)
 8010598:	f8d3 30d8 	ldr.w	r3, [r3, #216]	@ 0xd8
 801059c:	4a4b      	ldr	r2, [pc, #300]	@ (80106cc <HAL_ETH_MspInit+0x178>)
 801059e:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
 80105a2:	f8c2 30d8 	str.w	r3, [r2, #216]	@ 0xd8
 80105a6:	4b49      	ldr	r3, [pc, #292]	@ (80106cc <HAL_ETH_MspInit+0x178>)
 80105a8:	f8d3 30d8 	ldr.w	r3, [r3, #216]	@ 0xd8
 80105ac:	f403 3380 	and.w	r3, r3, #65536	@ 0x10000
 80105b0:	61fb      	str	r3, [r7, #28]
 80105b2:	69fb      	ldr	r3, [r7, #28]
    __HAL_RCC_ETH1RX_CLK_ENABLE();
 80105b4:	4b45      	ldr	r3, [pc, #276]	@ (80106cc <HAL_ETH_MspInit+0x178>)
 80105b6:	f8d3 30d8 	ldr.w	r3, [r3, #216]	@ 0xd8
 80105ba:	4a44      	ldr	r2, [pc, #272]	@ (80106cc <HAL_ETH_MspInit+0x178>)
 80105bc:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 80105c0:	f8c2 30d8 	str.w	r3, [r2, #216]	@ 0xd8
 80105c4:	4b41      	ldr	r3, [pc, #260]	@ (80106cc <HAL_ETH_MspInit+0x178>)
 80105c6:	f8d3 30d8 	ldr.w	r3, [r3, #216]	@ 0xd8
 80105ca:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
 80105ce:	61bb      	str	r3, [r7, #24]
 80105d0:	69bb      	ldr	r3, [r7, #24]

    __HAL_RCC_GPIOC_CLK_ENABLE();
 80105d2:	4b3e      	ldr	r3, [pc, #248]	@ (80106cc <HAL_ETH_MspInit+0x178>)
 80105d4:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 80105d8:	4a3c      	ldr	r2, [pc, #240]	@ (80106cc <HAL_ETH_MspInit+0x178>)
 80105da:	f043 0304 	orr.w	r3, r3, #4
 80105de:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 80105e2:	4b3a      	ldr	r3, [pc, #232]	@ (80106cc <HAL_ETH_MspInit+0x178>)
 80105e4:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 80105e8:	f003 0304 	and.w	r3, r3, #4
 80105ec:	617b      	str	r3, [r7, #20]
 80105ee:	697b      	ldr	r3, [r7, #20]
    __HAL_RCC_GPIOA_CLK_ENABLE();
 80105f0:	4b36      	ldr	r3, [pc, #216]	@ (80106cc <HAL_ETH_MspInit+0x178>)
 80105f2:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 80105f6:	4a35      	ldr	r2, [pc, #212]	@ (80106cc <HAL_ETH_MspInit+0x178>)
 80105f8:	f043 0301 	orr.w	r3, r3, #1
 80105fc:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 8010600:	4b32      	ldr	r3, [pc, #200]	@ (80106cc <HAL_ETH_MspInit+0x178>)
 8010602:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8010606:	f003 0301 	and.w	r3, r3, #1
 801060a:	613b      	str	r3, [r7, #16]
 801060c:	693b      	ldr	r3, [r7, #16]
    __HAL_RCC_GPIOB_CLK_ENABLE();
 801060e:	4b2f      	ldr	r3, [pc, #188]	@ (80106cc <HAL_ETH_MspInit+0x178>)
 8010610:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8010614:	4a2d      	ldr	r2, [pc, #180]	@ (80106cc <HAL_ETH_MspInit+0x178>)
 8010616:	f043 0302 	orr.w	r3, r3, #2
 801061a:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 801061e:	4b2b      	ldr	r3, [pc, #172]	@ (80106cc <HAL_ETH_MspInit+0x178>)
 8010620:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8010624:	f003 0302 	and.w	r3, r3, #2
 8010628:	60fb      	str	r3, [r7, #12]
 801062a:	68fb      	ldr	r3, [r7, #12]
    PB11     ------> ETH_TX_EN
    PB12     ------> ETH_TXD0
    PB13     ------> ETH_TXD1
    PB8     ------> ETH_TXD3
    */
    GPIO_InitStruct.Pin = GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3|GPIO_PIN_4
 801062c:	233e      	movs	r3, #62	@ 0x3e
 801062e:	627b      	str	r3, [r7, #36]	@ 0x24
                          |GPIO_PIN_5;
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 8010630:	2302      	movs	r3, #2
 8010632:	62bb      	str	r3, [r7, #40]	@ 0x28
    GPIO_InitStruct.Pull = GPIO_NOPULL;
 8010634:	2300      	movs	r3, #0
 8010636:	62fb      	str	r3, [r7, #44]	@ 0x2c
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
 8010638:	2303      	movs	r3, #3
 801063a:	633b      	str	r3, [r7, #48]	@ 0x30
    GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
 801063c:	230b      	movs	r3, #11
 801063e:	637b      	str	r3, [r7, #52]	@ 0x34
    HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
 8010640:	f107 0324 	add.w	r3, r7, #36	@ 0x24
 8010644:	4619      	mov	r1, r3
 8010646:	4822      	ldr	r0, [pc, #136]	@ (80106d0 <HAL_ETH_MspInit+0x17c>)
 8010648:	f7f9 f92a 	bl	80098a0 <HAL_GPIO_Init>

    GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3
 801064c:	238f      	movs	r3, #143	@ 0x8f
 801064e:	627b      	str	r3, [r7, #36]	@ 0x24
                          |GPIO_PIN_7;
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 8010650:	2302      	movs	r3, #2
 8010652:	62bb      	str	r3, [r7, #40]	@ 0x28
    GPIO_InitStruct.Pull = GPIO_NOPULL;
 8010654:	2300      	movs	r3, #0
 8010656:	62fb      	str	r3, [r7, #44]	@ 0x2c
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
 8010658:	2303      	movs	r3, #3
 801065a:	633b      	str	r3, [r7, #48]	@ 0x30
    GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
 801065c:	230b      	movs	r3, #11
 801065e:	637b      	str	r3, [r7, #52]	@ 0x34
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 8010660:	f107 0324 	add.w	r3, r7, #36	@ 0x24
 8010664:	4619      	mov	r1, r3
 8010666:	481b      	ldr	r0, [pc, #108]	@ (80106d4 <HAL_ETH_MspInit+0x180>)
 8010668:	f7f9 f91a 	bl	80098a0 <HAL_GPIO_Init>

    GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_11|GPIO_PIN_12
 801066c:	f643 1303 	movw	r3, #14595	@ 0x3903
 8010670:	627b      	str	r3, [r7, #36]	@ 0x24
                          |GPIO_PIN_13|GPIO_PIN_8;
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 8010672:	2302      	movs	r3, #2
 8010674:	62bb      	str	r3, [r7, #40]	@ 0x28
    GPIO_InitStruct.Pull = GPIO_NOPULL;
 8010676:	2300      	movs	r3, #0
 8010678:	62fb      	str	r3, [r7, #44]	@ 0x2c
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
 801067a:	2303      	movs	r3, #3
 801067c:	633b      	str	r3, [r7, #48]	@ 0x30
    GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
 801067e:	230b      	movs	r3, #11
 8010680:	637b      	str	r3, [r7, #52]	@ 0x34
    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 8010682:	f107 0324 	add.w	r3, r7, #36	@ 0x24
 8010686:	4619      	mov	r1, r3
 8010688:	4813      	ldr	r0, [pc, #76]	@ (80106d8 <HAL_ETH_MspInit+0x184>)
 801068a:	f7f9 f909 	bl	80098a0 <HAL_GPIO_Init>

    GPIO_InitStruct.Pin = GPIO_PIN_10;
 801068e:	f44f 6380 	mov.w	r3, #1024	@ 0x400
 8010692:	627b      	str	r3, [r7, #36]	@ 0x24
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 8010694:	2302      	movs	r3, #2
 8010696:	62bb      	str	r3, [r7, #40]	@ 0x28
    GPIO_InitStruct.Pull = GPIO_NOPULL;
 8010698:	2300      	movs	r3, #0
 801069a:	62fb      	str	r3, [r7, #44]	@ 0x2c
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
 801069c:	2303      	movs	r3, #3
 801069e:	633b      	str	r3, [r7, #48]	@ 0x30
    GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
 80106a0:	230b      	movs	r3, #11
 80106a2:	637b      	str	r3, [r7, #52]	@ 0x34
    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 80106a4:	f107 0324 	add.w	r3, r7, #36	@ 0x24
 80106a8:	4619      	mov	r1, r3
 80106aa:	480b      	ldr	r0, [pc, #44]	@ (80106d8 <HAL_ETH_MspInit+0x184>)
 80106ac:	f7f9 f8f8 	bl	80098a0 <HAL_GPIO_Init>

    /* Peripheral interrupt init */
    HAL_NVIC_SetPriority(ETH_IRQn, 5, 0);
 80106b0:	2200      	movs	r2, #0
 80106b2:	2105      	movs	r1, #5
 80106b4:	203d      	movs	r0, #61	@ 0x3d
 80106b6:	f7f4 fecb 	bl	8005450 <HAL_NVIC_SetPriority>
    HAL_NVIC_EnableIRQ(ETH_IRQn);
 80106ba:	203d      	movs	r0, #61	@ 0x3d
 80106bc:	f7f4 fee2 	bl	8005484 <HAL_NVIC_EnableIRQ>
  /* USER CODE BEGIN ETH_MspInit 1 */

  /* USER CODE END ETH_MspInit 1 */
  }
}
 80106c0:	bf00      	nop
 80106c2:	3738      	adds	r7, #56	@ 0x38
 80106c4:	46bd      	mov	sp, r7
 80106c6:	bd80      	pop	{r7, pc}
 80106c8:	40028000 	.word	0x40028000
 80106cc:	58024400 	.word	0x58024400
 80106d0:	58020800 	.word	0x58020800
 80106d4:	58020000 	.word	0x58020000
 80106d8:	58020400 	.word	0x58020400

080106dc <ETH_PHY_IO_Init>:
  * @brief  Initializes the MDIO interface GPIO and clocks.
  * @param  None
  * @retval 0 if OK, -1 if ERROR
  */
int32_t ETH_PHY_IO_Init(void)
{
 80106dc:	b580      	push	{r7, lr}
 80106de:	af00      	add	r7, sp, #0
  /* We assume that MDIO GPIO configuration is already done
     in the ETH_MspInit() else it should be done here
  */

  /* Configure the MDIO Clock */
  HAL_ETH_SetMDIOClockRange(&heth);
 80106e0:	4802      	ldr	r0, [pc, #8]	@ (80106ec <ETH_PHY_IO_Init+0x10>)
 80106e2:	f7f8 fafd 	bl	8008ce0 <HAL_ETH_SetMDIOClockRange>

  return 0;
 80106e6:	2300      	movs	r3, #0
}
 80106e8:	4618      	mov	r0, r3
 80106ea:	bd80      	pop	{r7, pc}
 80106ec:	240022bc 	.word	0x240022bc

080106f0 <ETH_PHY_IO_DeInit>:
  * @brief  De-Initializes the MDIO interface .
  * @param  None
  * @retval 0 if OK, -1 if ERROR
  */
int32_t ETH_PHY_IO_DeInit (void)
{
 80106f0:	b480      	push	{r7}
 80106f2:	af00      	add	r7, sp, #0
  return 0;
 80106f4:	2300      	movs	r3, #0
}
 80106f6:	4618      	mov	r0, r3
 80106f8:	46bd      	mov	sp, r7
 80106fa:	f85d 7b04 	ldr.w	r7, [sp], #4
 80106fe:	4770      	bx	lr

08010700 <ETH_PHY_IO_ReadReg>:
  * @param  RegAddr: PHY register address
  * @param  pRegVal: pointer to hold the register value
  * @retval 0 if OK -1 if Error
  */
int32_t ETH_PHY_IO_ReadReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t *pRegVal)
{
 8010700:	b580      	push	{r7, lr}
 8010702:	b084      	sub	sp, #16
 8010704:	af00      	add	r7, sp, #0
 8010706:	60f8      	str	r0, [r7, #12]
 8010708:	60b9      	str	r1, [r7, #8]
 801070a:	607a      	str	r2, [r7, #4]
  if(HAL_ETH_ReadPHYRegister(&heth, DevAddr, RegAddr, pRegVal) != HAL_OK)
 801070c:	687b      	ldr	r3, [r7, #4]
 801070e:	68ba      	ldr	r2, [r7, #8]
 8010710:	68f9      	ldr	r1, [r7, #12]
 8010712:	4807      	ldr	r0, [pc, #28]	@ (8010730 <ETH_PHY_IO_ReadReg+0x30>)
 8010714:	f7f8 f84e 	bl	80087b4 <HAL_ETH_ReadPHYRegister>
 8010718:	4603      	mov	r3, r0
 801071a:	2b00      	cmp	r3, #0
 801071c:	d002      	beq.n	8010724 <ETH_PHY_IO_ReadReg+0x24>
  {
    return -1;
 801071e:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8010722:	e000      	b.n	8010726 <ETH_PHY_IO_ReadReg+0x26>
  }

  return 0;
 8010724:	2300      	movs	r3, #0
}
 8010726:	4618      	mov	r0, r3
 8010728:	3710      	adds	r7, #16
 801072a:	46bd      	mov	sp, r7
 801072c:	bd80      	pop	{r7, pc}
 801072e:	bf00      	nop
 8010730:	240022bc 	.word	0x240022bc

08010734 <ETH_PHY_IO_WriteReg>:
  * @param  RegAddr: PHY register address
  * @param  RegVal: Value to be written
  * @retval 0 if OK -1 if Error
  */
int32_t ETH_PHY_IO_WriteReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t RegVal)
{
 8010734:	b580      	push	{r7, lr}
 8010736:	b084      	sub	sp, #16
 8010738:	af00      	add	r7, sp, #0
 801073a:	60f8      	str	r0, [r7, #12]
 801073c:	60b9      	str	r1, [r7, #8]
 801073e:	607a      	str	r2, [r7, #4]
  if(HAL_ETH_WritePHYRegister(&heth, DevAddr, RegAddr, RegVal) != HAL_OK)
 8010740:	687b      	ldr	r3, [r7, #4]
 8010742:	68ba      	ldr	r2, [r7, #8]
 8010744:	68f9      	ldr	r1, [r7, #12]
 8010746:	4807      	ldr	r0, [pc, #28]	@ (8010764 <ETH_PHY_IO_WriteReg+0x30>)
 8010748:	f7f8 f888 	bl	800885c <HAL_ETH_WritePHYRegister>
 801074c:	4603      	mov	r3, r0
 801074e:	2b00      	cmp	r3, #0
 8010750:	d002      	beq.n	8010758 <ETH_PHY_IO_WriteReg+0x24>
  {
    return -1;
 8010752:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8010756:	e000      	b.n	801075a <ETH_PHY_IO_WriteReg+0x26>
  }

  return 0;
 8010758:	2300      	movs	r3, #0
}
 801075a:	4618      	mov	r0, r3
 801075c:	3710      	adds	r7, #16
 801075e:	46bd      	mov	sp, r7
 8010760:	bd80      	pop	{r7, pc}
 8010762:	bf00      	nop
 8010764:	240022bc 	.word	0x240022bc

08010768 <ETH_PHY_IO_GetTick>:
/**
  * @brief  Get the time in millisecons used for internal PHY driver process.
  * @retval Time value
  */
int32_t ETH_PHY_IO_GetTick(void)
{
 8010768:	b580      	push	{r7, lr}
 801076a:	af00      	add	r7, sp, #0
  return HAL_GetTick();
 801076c:	f7f4 fd68 	bl	8005240 <HAL_GetTick>
 8010770:	4603      	mov	r3, r0
}
 8010772:	4618      	mov	r0, r3
 8010774:	bd80      	pop	{r7, pc}
	...

08010778 <ethernet_link_thread>:
/**
  * @brief  Check the ETH link state then update ETH driver and netif link accordingly.
  * @retval None
  */
void ethernet_link_thread(void* argument)
{
 8010778:	b580      	push	{r7, lr}
 801077a:	b0a2      	sub	sp, #136	@ 0x88
 801077c:	af00      	add	r7, sp, #0
 801077e:	6078      	str	r0, [r7, #4]
  ETH_MACConfigTypeDef MACConf = {0};
 8010780:	f107 0310 	add.w	r3, r7, #16
 8010784:	2264      	movs	r2, #100	@ 0x64
 8010786:	2100      	movs	r1, #0
 8010788:	4618      	mov	r0, r3
 801078a:	f019 fea9 	bl	802a4e0 <memset>
  int32_t PHYLinkState = 0;
 801078e:	2300      	movs	r3, #0
 8010790:	67bb      	str	r3, [r7, #120]	@ 0x78
  uint32_t linkchanged = 0U, speed = 0U, duplex = 0U;
 8010792:	2300      	movs	r3, #0
 8010794:	f8c7 3084 	str.w	r3, [r7, #132]	@ 0x84
 8010798:	2300      	movs	r3, #0
 801079a:	f8c7 3080 	str.w	r3, [r7, #128]	@ 0x80
 801079e:	2300      	movs	r3, #0
 80107a0:	67fb      	str	r3, [r7, #124]	@ 0x7c

  struct netif *netif = (struct netif *) argument;
 80107a2:	687b      	ldr	r3, [r7, #4]
 80107a4:	677b      	str	r3, [r7, #116]	@ 0x74
/* USER CODE BEGIN ETH link init */

#if USE_DHCP
  enum dhcp_states DHCP_state = DHCP_START;
 80107a6:	2301      	movs	r3, #1
 80107a8:	73fb      	strb	r3, [r7, #15]
//  LOCK_TCPIP_CORE();
/* USER CODE END ETH link init */

  for(;;)
  {
  PHYLinkState = DP83848_GetLinkState(&DP83848);
 80107aa:	484a      	ldr	r0, [pc, #296]	@ (80108d4 <ethernet_link_thread+0x15c>)
 80107ac:	f7f4 fc70 	bl	8005090 <DP83848_GetLinkState>
 80107b0:	67b8      	str	r0, [r7, #120]	@ 0x78

  if(netif_is_link_up(netif) && (PHYLinkState <= DP83848_STATUS_LINK_DOWN))
 80107b2:	6f7b      	ldr	r3, [r7, #116]	@ 0x74
 80107b4:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 80107b8:	089b      	lsrs	r3, r3, #2
 80107ba:	f003 0301 	and.w	r3, r3, #1
 80107be:	b2db      	uxtb	r3, r3
 80107c0:	2b00      	cmp	r3, #0
 80107c2:	d013      	beq.n	80107ec <ethernet_link_thread+0x74>
 80107c4:	6fbb      	ldr	r3, [r7, #120]	@ 0x78
 80107c6:	2b01      	cmp	r3, #1
 80107c8:	dc10      	bgt.n	80107ec <ethernet_link_thread+0x74>
  {
    HAL_ETH_Stop_IT(&heth);
 80107ca:	4843      	ldr	r0, [pc, #268]	@ (80108d8 <ethernet_link_thread+0x160>)
 80107cc:	f7f7 fc7e 	bl	80080cc <HAL_ETH_Stop_IT>
    LOCK_TCPIP_CORE();
 80107d0:	f000 f936 	bl	8010a40 <sys_lock_tcpip_core>
    netif_set_down(netif);
 80107d4:	6f78      	ldr	r0, [r7, #116]	@ 0x74
 80107d6:	f009 fdf9 	bl	801a3cc <netif_set_down>
    netif_set_link_down(netif);
 80107da:	6f78      	ldr	r0, [r7, #116]	@ 0x74
 80107dc:	f009 fe64 	bl	801a4a8 <netif_set_link_down>
    UNLOCK_TCPIP_CORE();
 80107e0:	f000 f93e 	bl	8010a60 <sys_unlock_tcpip_core>
    printf("Link down...\r\n");
 80107e4:	483d      	ldr	r0, [pc, #244]	@ (80108dc <ethernet_link_thread+0x164>)
 80107e6:	f019 fd51 	bl	802a28c <puts>
 80107ea:	e067      	b.n	80108bc <ethernet_link_thread+0x144>
  }
  else if(!netif_is_link_up(netif) && (PHYLinkState > DP83848_STATUS_LINK_DOWN))
 80107ec:	6f7b      	ldr	r3, [r7, #116]	@ 0x74
 80107ee:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 80107f2:	f003 0304 	and.w	r3, r3, #4
 80107f6:	2b00      	cmp	r3, #0
 80107f8:	d160      	bne.n	80108bc <ethernet_link_thread+0x144>
 80107fa:	6fbb      	ldr	r3, [r7, #120]	@ 0x78
 80107fc:	2b01      	cmp	r3, #1
 80107fe:	dd5d      	ble.n	80108bc <ethernet_link_thread+0x144>
  {
    switch (PHYLinkState)
 8010800:	6fbb      	ldr	r3, [r7, #120]	@ 0x78
 8010802:	3b02      	subs	r3, #2
 8010804:	2b03      	cmp	r3, #3
 8010806:	d833      	bhi.n	8010870 <ethernet_link_thread+0xf8>
 8010808:	a201      	add	r2, pc, #4	@ (adr r2, 8010810 <ethernet_link_thread+0x98>)
 801080a:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 801080e:	bf00      	nop
 8010810:	08010821 	.word	0x08010821
 8010814:	08010837 	.word	0x08010837
 8010818:	0801084b 	.word	0x0801084b
 801081c:	0801085f 	.word	0x0801085f
    {
    case DP83848_STATUS_100MBITS_FULLDUPLEX:
      duplex = ETH_FULLDUPLEX_MODE;
 8010820:	f44f 5300 	mov.w	r3, #8192	@ 0x2000
 8010824:	67fb      	str	r3, [r7, #124]	@ 0x7c
      speed = ETH_SPEED_100M;
 8010826:	f44f 4380 	mov.w	r3, #16384	@ 0x4000
 801082a:	f8c7 3080 	str.w	r3, [r7, #128]	@ 0x80
      linkchanged = 1;
 801082e:	2301      	movs	r3, #1
 8010830:	f8c7 3084 	str.w	r3, [r7, #132]	@ 0x84
      break;
 8010834:	e01d      	b.n	8010872 <ethernet_link_thread+0xfa>
    case DP83848_STATUS_100MBITS_HALFDUPLEX:
      duplex = ETH_HALFDUPLEX_MODE;
 8010836:	2300      	movs	r3, #0
 8010838:	67fb      	str	r3, [r7, #124]	@ 0x7c
      speed = ETH_SPEED_100M;
 801083a:	f44f 4380 	mov.w	r3, #16384	@ 0x4000
 801083e:	f8c7 3080 	str.w	r3, [r7, #128]	@ 0x80
      linkchanged = 1;
 8010842:	2301      	movs	r3, #1
 8010844:	f8c7 3084 	str.w	r3, [r7, #132]	@ 0x84
      break;
 8010848:	e013      	b.n	8010872 <ethernet_link_thread+0xfa>
    case DP83848_STATUS_10MBITS_FULLDUPLEX:
      duplex = ETH_FULLDUPLEX_MODE;
 801084a:	f44f 5300 	mov.w	r3, #8192	@ 0x2000
 801084e:	67fb      	str	r3, [r7, #124]	@ 0x7c
      speed = ETH_SPEED_10M;
 8010850:	2300      	movs	r3, #0
 8010852:	f8c7 3080 	str.w	r3, [r7, #128]	@ 0x80
      linkchanged = 1;
 8010856:	2301      	movs	r3, #1
 8010858:	f8c7 3084 	str.w	r3, [r7, #132]	@ 0x84
      break;
 801085c:	e009      	b.n	8010872 <ethernet_link_thread+0xfa>
    case DP83848_STATUS_10MBITS_HALFDUPLEX:
      duplex = ETH_HALFDUPLEX_MODE;
 801085e:	2300      	movs	r3, #0
 8010860:	67fb      	str	r3, [r7, #124]	@ 0x7c
      speed = ETH_SPEED_10M;
 8010862:	2300      	movs	r3, #0
 8010864:	f8c7 3080 	str.w	r3, [r7, #128]	@ 0x80
      linkchanged = 1;
 8010868:	2301      	movs	r3, #1
 801086a:	f8c7 3084 	str.w	r3, [r7, #132]	@ 0x84
      break;
 801086e:	e000      	b.n	8010872 <ethernet_link_thread+0xfa>
    default:
      break;
 8010870:	bf00      	nop
    }

    if(linkchanged)
 8010872:	f8d7 3084 	ldr.w	r3, [r7, #132]	@ 0x84
 8010876:	2b00      	cmp	r3, #0
 8010878:	d020      	beq.n	80108bc <ethernet_link_thread+0x144>
    {
      /* Get MAC Config MAC */
      HAL_ETH_GetMACConfig(&heth, &MACConf);
 801087a:	f107 0310 	add.w	r3, r7, #16
 801087e:	4619      	mov	r1, r3
 8010880:	4815      	ldr	r0, [pc, #84]	@ (80108d8 <ethernet_link_thread+0x160>)
 8010882:	f7f8 f83f 	bl	8008904 <HAL_ETH_GetMACConfig>
      MACConf.DuplexMode = duplex;
 8010886:	6ffb      	ldr	r3, [r7, #124]	@ 0x7c
 8010888:	62bb      	str	r3, [r7, #40]	@ 0x28
      MACConf.Speed = speed;
 801088a:	f8d7 3080 	ldr.w	r3, [r7, #128]	@ 0x80
 801088e:	627b      	str	r3, [r7, #36]	@ 0x24
      HAL_ETH_SetMACConfig(&heth, &MACConf);
 8010890:	f107 0310 	add.w	r3, r7, #16
 8010894:	4619      	mov	r1, r3
 8010896:	4810      	ldr	r0, [pc, #64]	@ (80108d8 <ethernet_link_thread+0x160>)
 8010898:	f7f8 fa08 	bl	8008cac <HAL_ETH_SetMACConfig>
      HAL_ETH_Start_IT(&heth);
 801089c:	480e      	ldr	r0, [pc, #56]	@ (80108d8 <ethernet_link_thread+0x160>)
 801089e:	f7f7 fba1 	bl	8007fe4 <HAL_ETH_Start_IT>
      LOCK_TCPIP_CORE();
 80108a2:	f000 f8cd 	bl	8010a40 <sys_lock_tcpip_core>
      netif_set_up(netif);
 80108a6:	6f78      	ldr	r0, [r7, #116]	@ 0x74
 80108a8:	f009 fd22 	bl	801a2f0 <netif_set_up>
      netif_set_link_up(netif);
 80108ac:	6f78      	ldr	r0, [r7, #116]	@ 0x74
 80108ae:	f009 fdc1 	bl	801a434 <netif_set_link_up>
      UNLOCK_TCPIP_CORE();
 80108b2:	f000 f8d5 	bl	8010a60 <sys_unlock_tcpip_core>
      printf("Link up...\r\n");
 80108b6:	480a      	ldr	r0, [pc, #40]	@ (80108e0 <ethernet_link_thread+0x168>)
 80108b8:	f019 fce8 	bl	802a28c <puts>
    }
  }

/* USER CODE BEGIN ETH link Thread core code for User BSP */
#if USE_DHCP
  dhcp_sm(netif, &DHCP_state);
 80108bc:	f107 030f 	add.w	r3, r7, #15
 80108c0:	4619      	mov	r1, r3
 80108c2:	6f78      	ldr	r0, [r7, #116]	@ 0x74
 80108c4:	f000 f922 	bl	8010b0c <dhcp_sm>
#endif
  /* ETH_CODE: workaround to call LOCK_TCPIP_CORE when accessing netif link functions*/
//  UNLOCK_TCPIP_CORE();
  osDelay(pdMS_TO_TICKS(500));
 80108c8:	f44f 70fa 	mov.w	r0, #500	@ 0x1f4
 80108cc:	f000 faff 	bl	8010ece <osDelay>
//  LOCK_TCPIP_CORE();
  continue; /* skip next osDelay */
 80108d0:	bf00      	nop
  PHYLinkState = DP83848_GetLinkState(&DP83848);
 80108d2:	e76a      	b.n	80107aa <ethernet_link_thread+0x32>
 80108d4:	240023a4 	.word	0x240023a4
 80108d8:	240022bc 	.word	0x240022bc
 80108dc:	0802d2e8 	.word	0x0802d2e8
 80108e0:	0802d2f8 	.word	0x0802d2f8

080108e4 <ethernetif_notify_conn_changed>:
  * @brief  This function notify user about link status changement.
  * @param  netif: the network interface
  * @retval None
  */
__weak void ethernetif_notify_conn_changed(struct netif *netif)
{
 80108e4:	b480      	push	{r7}
 80108e6:	b083      	sub	sp, #12
 80108e8:	af00      	add	r7, sp, #0
 80108ea:	6078      	str	r0, [r7, #4]
  /* NOTE : This is function could be implemented in user file
            when the callback is needed,
  */
}
 80108ec:	bf00      	nop
 80108ee:	370c      	adds	r7, #12
 80108f0:	46bd      	mov	sp, r7
 80108f2:	f85d 7b04 	ldr.w	r7, [sp], #4
 80108f6:	4770      	bx	lr

080108f8 <HAL_ETH_RxAllocateCallback>:
void HAL_ETH_RxAllocateCallback(uint8_t **buff)
{
 80108f8:	b580      	push	{r7, lr}
 80108fa:	b086      	sub	sp, #24
 80108fc:	af02      	add	r7, sp, #8
 80108fe:	6078      	str	r0, [r7, #4]
/* USER CODE BEGIN HAL ETH RxAllocateCallback */
  struct pbuf_custom *p = LWIP_MEMPOOL_ALLOC(RX_POOL);
 8010900:	4812      	ldr	r0, [pc, #72]	@ (801094c <HAL_ETH_RxAllocateCallback+0x54>)
 8010902:	f009 fa5d 	bl	8019dc0 <memp_malloc_pool>
 8010906:	60f8      	str	r0, [r7, #12]
  if (p)
 8010908:	68fb      	ldr	r3, [r7, #12]
 801090a:	2b00      	cmp	r3, #0
 801090c:	d014      	beq.n	8010938 <HAL_ETH_RxAllocateCallback+0x40>
  {
    /* Get the buff from the struct pbuf address. */
    *buff = (uint8_t *)p + offsetof(RxBuff_t, buff);
 801090e:	68fb      	ldr	r3, [r7, #12]
 8010910:	f103 0220 	add.w	r2, r3, #32
 8010914:	687b      	ldr	r3, [r7, #4]
 8010916:	601a      	str	r2, [r3, #0]
    p->custom_free_function = pbuf_free_custom;
 8010918:	68fb      	ldr	r3, [r7, #12]
 801091a:	4a0d      	ldr	r2, [pc, #52]	@ (8010950 <HAL_ETH_RxAllocateCallback+0x58>)
 801091c:	611a      	str	r2, [r3, #16]
    /* Initialize the struct pbuf.
    * This must be performed whenever a buffer's allocated because it may be
    * changed by lwIP or the app, e.g., pbuf_free decrements ref. */
    pbuf_alloced_custom(PBUF_RAW, 0, PBUF_REF, p, *buff, ETH_RX_BUFFER_SIZE);
 801091e:	687b      	ldr	r3, [r7, #4]
 8010920:	681b      	ldr	r3, [r3, #0]
 8010922:	f44f 62c0 	mov.w	r2, #1536	@ 0x600
 8010926:	9201      	str	r2, [sp, #4]
 8010928:	9300      	str	r3, [sp, #0]
 801092a:	68fb      	ldr	r3, [r7, #12]
 801092c:	2241      	movs	r2, #65	@ 0x41
 801092e:	2100      	movs	r1, #0
 8010930:	2000      	movs	r0, #0
 8010932:	f009 ffe1 	bl	801a8f8 <pbuf_alloced_custom>
  {
    RxAllocStatus = RX_ALLOC_ERROR;
    *buff = NULL;
  }
/* USER CODE END HAL ETH RxAllocateCallback */
}
 8010936:	e005      	b.n	8010944 <HAL_ETH_RxAllocateCallback+0x4c>
    RxAllocStatus = RX_ALLOC_ERROR;
 8010938:	4b06      	ldr	r3, [pc, #24]	@ (8010954 <HAL_ETH_RxAllocateCallback+0x5c>)
 801093a:	2201      	movs	r2, #1
 801093c:	701a      	strb	r2, [r3, #0]
    *buff = NULL;
 801093e:	687b      	ldr	r3, [r7, #4]
 8010940:	2200      	movs	r2, #0
 8010942:	601a      	str	r2, [r3, #0]
}
 8010944:	bf00      	nop
 8010946:	3710      	adds	r7, #16
 8010948:	46bd      	mov	sp, r7
 801094a:	bd80      	pop	{r7, pc}
 801094c:	08031348 	.word	0x08031348
 8010950:	08010505 	.word	0x08010505
 8010954:	240022b0 	.word	0x240022b0

08010958 <HAL_ETH_RxLinkCallback>:

void HAL_ETH_RxLinkCallback(void **pStart, void **pEnd, uint8_t *buff, uint16_t Length)
{
 8010958:	b480      	push	{r7}
 801095a:	b08d      	sub	sp, #52	@ 0x34
 801095c:	af00      	add	r7, sp, #0
 801095e:	60f8      	str	r0, [r7, #12]
 8010960:	60b9      	str	r1, [r7, #8]
 8010962:	607a      	str	r2, [r7, #4]
 8010964:	807b      	strh	r3, [r7, #2]
/* USER CODE BEGIN HAL ETH RxLinkCallback */

  struct pbuf **ppStart = (struct pbuf **)pStart;
 8010966:	68fb      	ldr	r3, [r7, #12]
 8010968:	62bb      	str	r3, [r7, #40]	@ 0x28
  struct pbuf **ppEnd = (struct pbuf **)pEnd;
 801096a:	68bb      	ldr	r3, [r7, #8]
 801096c:	627b      	str	r3, [r7, #36]	@ 0x24
  struct pbuf *p = NULL;
 801096e:	2300      	movs	r3, #0
 8010970:	62fb      	str	r3, [r7, #44]	@ 0x2c

  /* Get the struct pbuf from the buff address. */
  p = (struct pbuf *)(buff - offsetof(RxBuff_t, buff));
 8010972:	687b      	ldr	r3, [r7, #4]
 8010974:	3b20      	subs	r3, #32
 8010976:	62fb      	str	r3, [r7, #44]	@ 0x2c
  p->next = NULL;
 8010978:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801097a:	2200      	movs	r2, #0
 801097c:	601a      	str	r2, [r3, #0]
  p->tot_len = 0;
 801097e:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8010980:	2200      	movs	r2, #0
 8010982:	811a      	strh	r2, [r3, #8]
  p->len = Length;
 8010984:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8010986:	887a      	ldrh	r2, [r7, #2]
 8010988:	815a      	strh	r2, [r3, #10]

  /* Chain the buffer. */
  if (!*ppStart)
 801098a:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801098c:	681b      	ldr	r3, [r3, #0]
 801098e:	2b00      	cmp	r3, #0
 8010990:	d103      	bne.n	801099a <HAL_ETH_RxLinkCallback+0x42>
  {
    /* The first buffer of the packet. */
    *ppStart = p;
 8010992:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8010994:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 8010996:	601a      	str	r2, [r3, #0]
 8010998:	e003      	b.n	80109a2 <HAL_ETH_RxLinkCallback+0x4a>
  }
  else
  {
    /* Chain the buffer to the end of the packet. */
    (*ppEnd)->next = p;
 801099a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801099c:	681b      	ldr	r3, [r3, #0]
 801099e:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 80109a0:	601a      	str	r2, [r3, #0]
  }
  *ppEnd  = p;
 80109a2:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80109a4:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 80109a6:	601a      	str	r2, [r3, #0]

  /* Update the total length of all the buffers of the chain. Each pbuf in the chain should have its tot_len
   * set to its own length, plus the length of all the following pbufs in the chain. */
  for (p = *ppStart; p != NULL; p = p->next)
 80109a8:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80109aa:	681b      	ldr	r3, [r3, #0]
 80109ac:	62fb      	str	r3, [r7, #44]	@ 0x2c
 80109ae:	e009      	b.n	80109c4 <HAL_ETH_RxLinkCallback+0x6c>
  {
    p->tot_len += Length;
 80109b0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80109b2:	891a      	ldrh	r2, [r3, #8]
 80109b4:	887b      	ldrh	r3, [r7, #2]
 80109b6:	4413      	add	r3, r2
 80109b8:	b29a      	uxth	r2, r3
 80109ba:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80109bc:	811a      	strh	r2, [r3, #8]
  for (p = *ppStart; p != NULL; p = p->next)
 80109be:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80109c0:	681b      	ldr	r3, [r3, #0]
 80109c2:	62fb      	str	r3, [r7, #44]	@ 0x2c
 80109c4:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80109c6:	2b00      	cmp	r3, #0
 80109c8:	d1f2      	bne.n	80109b0 <HAL_ETH_RxLinkCallback+0x58>
  }

  /* Invalidate data cache because Rx DMA's writing to physical memory makes it stale. */
  SCB_InvalidateDCache_by_Addr((uint32_t *)buff, Length);
 80109ca:	887b      	ldrh	r3, [r7, #2]
 80109cc:	687a      	ldr	r2, [r7, #4]
 80109ce:	623a      	str	r2, [r7, #32]
 80109d0:	61fb      	str	r3, [r7, #28]
  \param[in]   dsize   size of memory block (in number of bytes)
*/
__STATIC_FORCEINLINE void SCB_InvalidateDCache_by_Addr (void *addr, int32_t dsize)
{
  #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
    if ( dsize > 0 ) { 
 80109d2:	69fb      	ldr	r3, [r7, #28]
 80109d4:	2b00      	cmp	r3, #0
 80109d6:	dd1d      	ble.n	8010a14 <HAL_ETH_RxLinkCallback+0xbc>
       int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U));
 80109d8:	6a3b      	ldr	r3, [r7, #32]
 80109da:	f003 021f 	and.w	r2, r3, #31
 80109de:	69fb      	ldr	r3, [r7, #28]
 80109e0:	4413      	add	r3, r2
 80109e2:	61bb      	str	r3, [r7, #24]
      uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */;
 80109e4:	6a3b      	ldr	r3, [r7, #32]
 80109e6:	617b      	str	r3, [r7, #20]
  __ASM volatile ("dsb 0xF":::"memory");
 80109e8:	f3bf 8f4f 	dsb	sy
}
 80109ec:	bf00      	nop
    
      __DSB();

      do {
        SCB->DCIMVAC = op_addr;             /* register accepts only 32byte aligned values, only bits 31..5 are valid */
 80109ee:	4a0d      	ldr	r2, [pc, #52]	@ (8010a24 <HAL_ETH_RxLinkCallback+0xcc>)
 80109f0:	697b      	ldr	r3, [r7, #20]
 80109f2:	f8c2 325c 	str.w	r3, [r2, #604]	@ 0x25c
        op_addr += __SCB_DCACHE_LINE_SIZE;
 80109f6:	697b      	ldr	r3, [r7, #20]
 80109f8:	3320      	adds	r3, #32
 80109fa:	617b      	str	r3, [r7, #20]
        op_size -= __SCB_DCACHE_LINE_SIZE;
 80109fc:	69bb      	ldr	r3, [r7, #24]
 80109fe:	3b20      	subs	r3, #32
 8010a00:	61bb      	str	r3, [r7, #24]
      } while ( op_size > 0 );
 8010a02:	69bb      	ldr	r3, [r7, #24]
 8010a04:	2b00      	cmp	r3, #0
 8010a06:	dcf2      	bgt.n	80109ee <HAL_ETH_RxLinkCallback+0x96>
  __ASM volatile ("dsb 0xF":::"memory");
 8010a08:	f3bf 8f4f 	dsb	sy
}
 8010a0c:	bf00      	nop
  __ASM volatile ("isb 0xF":::"memory");
 8010a0e:	f3bf 8f6f 	isb	sy
}
 8010a12:	bf00      	nop

      __DSB();
      __ISB();
    }
  #endif
}
 8010a14:	bf00      	nop

/* USER CODE END HAL ETH RxLinkCallback */
}
 8010a16:	bf00      	nop
 8010a18:	3734      	adds	r7, #52	@ 0x34
 8010a1a:	46bd      	mov	sp, r7
 8010a1c:	f85d 7b04 	ldr.w	r7, [sp], #4
 8010a20:	4770      	bx	lr
 8010a22:	bf00      	nop
 8010a24:	e000ed00 	.word	0xe000ed00

08010a28 <HAL_ETH_TxFreeCallback>:

void HAL_ETH_TxFreeCallback(uint32_t * buff)
{
 8010a28:	b580      	push	{r7, lr}
 8010a2a:	b082      	sub	sp, #8
 8010a2c:	af00      	add	r7, sp, #0
 8010a2e:	6078      	str	r0, [r7, #4]
/* USER CODE BEGIN HAL ETH TxFreeCallback */

  pbuf_free((struct pbuf *)buff);
 8010a30:	6878      	ldr	r0, [r7, #4]
 8010a32:	f00a f94b 	bl	801accc <pbuf_free>

/* USER CODE END HAL ETH TxFreeCallback */
}
 8010a36:	bf00      	nop
 8010a38:	3708      	adds	r7, #8
 8010a3a:	46bd      	mov	sp, r7
 8010a3c:	bd80      	pop	{r7, pc}
	...

08010a40 <sys_lock_tcpip_core>:
/* ETH_CODE: add functions needed for proper multithreading support and check */

static osThreadId_t lwip_core_lock_holder_thread_id;
static osThreadId_t lwip_tcpip_thread_id;

void sys_lock_tcpip_core(void){
 8010a40:	b580      	push	{r7, lr}
 8010a42:	af00      	add	r7, sp, #0
	sys_mutex_lock(&lock_tcpip_core);
 8010a44:	4804      	ldr	r0, [pc, #16]	@ (8010a58 <sys_lock_tcpip_core+0x18>)
 8010a46:	f016 f8e7 	bl	8026c18 <sys_mutex_lock>
	lwip_core_lock_holder_thread_id = osThreadGetId();
 8010a4a:	f000 fa35 	bl	8010eb8 <osThreadGetId>
 8010a4e:	4603      	mov	r3, r0
 8010a50:	4a02      	ldr	r2, [pc, #8]	@ (8010a5c <sys_lock_tcpip_core+0x1c>)
 8010a52:	6013      	str	r3, [r2, #0]
}
 8010a54:	bf00      	nop
 8010a56:	bd80      	pop	{r7, pc}
 8010a58:	24024404 	.word	0x24024404
 8010a5c:	240023c4 	.word	0x240023c4

08010a60 <sys_unlock_tcpip_core>:

void sys_unlock_tcpip_core(void){
 8010a60:	b580      	push	{r7, lr}
 8010a62:	af00      	add	r7, sp, #0
	lwip_core_lock_holder_thread_id = 0;
 8010a64:	4b03      	ldr	r3, [pc, #12]	@ (8010a74 <sys_unlock_tcpip_core+0x14>)
 8010a66:	2200      	movs	r2, #0
 8010a68:	601a      	str	r2, [r3, #0]
	sys_mutex_unlock(&lock_tcpip_core);
 8010a6a:	4803      	ldr	r0, [pc, #12]	@ (8010a78 <sys_unlock_tcpip_core+0x18>)
 8010a6c:	f016 f8e3 	bl	8026c36 <sys_mutex_unlock>
}
 8010a70:	bf00      	nop
 8010a72:	bd80      	pop	{r7, pc}
 8010a74:	240023c4 	.word	0x240023c4
 8010a78:	24024404 	.word	0x24024404

08010a7c <sys_check_core_locking>:

void sys_check_core_locking(void){
 8010a7c:	b580      	push	{r7, lr}
 8010a7e:	b082      	sub	sp, #8
 8010a80:	af00      	add	r7, sp, #0
  /* Embedded systems should check we are NOT in an interrupt context here */

  LWIP_ASSERT("Function called from interrupt context", (SCB->ICSR & SCB_ICSR_VECTACTIVE_Msk) == 0);
 8010a82:	4b15      	ldr	r3, [pc, #84]	@ (8010ad8 <sys_check_core_locking+0x5c>)
 8010a84:	685b      	ldr	r3, [r3, #4]
 8010a86:	f3c3 0308 	ubfx	r3, r3, #0, #9
 8010a8a:	2b00      	cmp	r3, #0
 8010a8c:	d006      	beq.n	8010a9c <sys_check_core_locking+0x20>
 8010a8e:	4b13      	ldr	r3, [pc, #76]	@ (8010adc <sys_check_core_locking+0x60>)
 8010a90:	f240 4216 	movw	r2, #1046	@ 0x416
 8010a94:	4912      	ldr	r1, [pc, #72]	@ (8010ae0 <sys_check_core_locking+0x64>)
 8010a96:	4813      	ldr	r0, [pc, #76]	@ (8010ae4 <sys_check_core_locking+0x68>)
 8010a98:	f019 fb90 	bl	802a1bc <iprintf>

  if (lwip_tcpip_thread_id != 0) {
 8010a9c:	4b12      	ldr	r3, [pc, #72]	@ (8010ae8 <sys_check_core_locking+0x6c>)
 8010a9e:	681b      	ldr	r3, [r3, #0]
 8010aa0:	2b00      	cmp	r3, #0
 8010aa2:	d014      	beq.n	8010ace <sys_check_core_locking+0x52>
	  osThreadId_t current_thread_id = osThreadGetId();
 8010aa4:	f000 fa08 	bl	8010eb8 <osThreadGetId>
 8010aa8:	6078      	str	r0, [r7, #4]

#if LWIP_TCPIP_CORE_LOCKING
	LWIP_ASSERT("Function called without core lock", current_thread_id == lwip_core_lock_holder_thread_id);
 8010aaa:	4b10      	ldr	r3, [pc, #64]	@ (8010aec <sys_check_core_locking+0x70>)
 8010aac:	681b      	ldr	r3, [r3, #0]
 8010aae:	687a      	ldr	r2, [r7, #4]
 8010ab0:	429a      	cmp	r2, r3
 8010ab2:	d006      	beq.n	8010ac2 <sys_check_core_locking+0x46>
 8010ab4:	4b09      	ldr	r3, [pc, #36]	@ (8010adc <sys_check_core_locking+0x60>)
 8010ab6:	f240 421c 	movw	r2, #1052	@ 0x41c
 8010aba:	490d      	ldr	r1, [pc, #52]	@ (8010af0 <sys_check_core_locking+0x74>)
 8010abc:	4809      	ldr	r0, [pc, #36]	@ (8010ae4 <sys_check_core_locking+0x68>)
 8010abe:	f019 fb7d 	bl	802a1bc <iprintf>
	/* ETH_CODE: to easily check that example has correct handling of core lock
	 * This will trigger breakpoint (__BKPT)
	 */
#warning Below check should be removed in production code
	if(current_thread_id != lwip_core_lock_holder_thread_id) __BKPT(0);
 8010ac2:	4b0a      	ldr	r3, [pc, #40]	@ (8010aec <sys_check_core_locking+0x70>)
 8010ac4:	681b      	ldr	r3, [r3, #0]
 8010ac6:	687a      	ldr	r2, [r7, #4]
 8010ac8:	429a      	cmp	r2, r3
 8010aca:	d000      	beq.n	8010ace <sys_check_core_locking+0x52>
 8010acc:	be00      	bkpt	0x0000
#else /* LWIP_TCPIP_CORE_LOCKING */
	LWIP_ASSERT("Function called from wrong thread", current_thread_id == lwip_tcpip_thread_id);
#endif /* LWIP_TCPIP_CORE_LOCKING */
	LWIP_UNUSED_ARG(current_thread_id); /* for LWIP_NOASSERT */
  }
}
 8010ace:	bf00      	nop
 8010ad0:	3708      	adds	r7, #8
 8010ad2:	46bd      	mov	sp, r7
 8010ad4:	bd80      	pop	{r7, pc}
 8010ad6:	bf00      	nop
 8010ad8:	e000ed00 	.word	0xe000ed00
 8010adc:	0802d294 	.word	0x0802d294
 8010ae0:	0802d304 	.word	0x0802d304
 8010ae4:	0802d2c0 	.word	0x0802d2c0
 8010ae8:	240023c8 	.word	0x240023c8
 8010aec:	240023c4 	.word	0x240023c4
 8010af0:	0802d32c 	.word	0x0802d32c

08010af4 <sys_mark_tcpip_thread>:
void sys_mark_tcpip_thread(void){
 8010af4:	b580      	push	{r7, lr}
 8010af6:	af00      	add	r7, sp, #0
	lwip_tcpip_thread_id = osThreadGetId();
 8010af8:	f000 f9de 	bl	8010eb8 <osThreadGetId>
 8010afc:	4603      	mov	r3, r0
 8010afe:	4a02      	ldr	r2, [pc, #8]	@ (8010b08 <sys_mark_tcpip_thread+0x14>)
 8010b00:	6013      	str	r3, [r2, #0]
}
 8010b02:	bf00      	nop
 8010b04:	bd80      	pop	{r7, pc}
 8010b06:	bf00      	nop
 8010b08:	240023c8 	.word	0x240023c8

08010b0c <dhcp_sm>:

#if USE_DHCP
void dhcp_sm(struct netif *netif, enum dhcp_states *state)
{
 8010b0c:	b580      	push	{r7, lr}
 8010b0e:	b08c      	sub	sp, #48	@ 0x30
 8010b10:	af00      	add	r7, sp, #0
 8010b12:	6078      	str	r0, [r7, #4]
 8010b14:	6039      	str	r1, [r7, #0]
	ip_addr_t gw;
#ifdef DHCP_USER_LOGS
	uint8_t iptxt[20];
#endif

	switch(*state)
 8010b16:	683b      	ldr	r3, [r7, #0]
 8010b18:	781b      	ldrb	r3, [r3, #0]
 8010b1a:	2b03      	cmp	r3, #3
 8010b1c:	d072      	beq.n	8010c04 <dhcp_sm+0xf8>
 8010b1e:	2b03      	cmp	r3, #3
 8010b20:	dc7b      	bgt.n	8010c1a <dhcp_sm+0x10e>
 8010b22:	2b01      	cmp	r3, #1
 8010b24:	d002      	beq.n	8010b2c <dhcp_sm+0x20>
 8010b26:	2b02      	cmp	r3, #2
 8010b28:	d00a      	beq.n	8010b40 <dhcp_sm+0x34>
	    	{
	    		*state = DHCP_START;
	    	}
	    	break;
	    default:
	    	break;
 8010b2a:	e076      	b.n	8010c1a <dhcp_sm+0x10e>
	    	*state = DHCP_WAIT_ADDRESS;
 8010b2c:	683b      	ldr	r3, [r7, #0]
 8010b2e:	2202      	movs	r2, #2
 8010b30:	701a      	strb	r2, [r3, #0]
	    	dhcp = (struct dhcp *)netif_get_client_data(netif, LWIP_NETIF_CLIENT_DATA_INDEX_DHCP);
 8010b32:	687b      	ldr	r3, [r7, #4]
 8010b34:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8010b36:	62fb      	str	r3, [r7, #44]	@ 0x2c
			printf("  State: Looking for DHCP server ...\n");
 8010b38:	483c      	ldr	r0, [pc, #240]	@ (8010c2c <dhcp_sm+0x120>)
 8010b3a:	f019 fba7 	bl	802a28c <puts>
	    	break;
 8010b3e:	e071      	b.n	8010c24 <dhcp_sm+0x118>
	    	if (dhcp_supplied_address(netif))
 8010b40:	6878      	ldr	r0, [r7, #4]
 8010b42:	f013 f9cd 	bl	8023ee0 <dhcp_supplied_address>
 8010b46:	4603      	mov	r3, r0
 8010b48:	2b00      	cmp	r3, #0
 8010b4a:	d015      	beq.n	8010b78 <dhcp_sm+0x6c>
	    		*state = DHCP_ADDRESS_ASSIGNED;
 8010b4c:	683b      	ldr	r3, [r7, #0]
 8010b4e:	2203      	movs	r2, #3
 8010b50:	701a      	strb	r2, [r3, #0]
				sprintf((char *)iptxt, "%s", ip4addr_ntoa((const ip4_addr_t *)&netif->ip_addr));
 8010b52:	687b      	ldr	r3, [r7, #4]
 8010b54:	3304      	adds	r3, #4
 8010b56:	4618      	mov	r0, r3
 8010b58:	f014 ff5a 	bl	8025a10 <ip4addr_ntoa>
 8010b5c:	4602      	mov	r2, r0
 8010b5e:	f107 030c 	add.w	r3, r7, #12
 8010b62:	4933      	ldr	r1, [pc, #204]	@ (8010c30 <dhcp_sm+0x124>)
 8010b64:	4618      	mov	r0, r3
 8010b66:	f019 fb99 	bl	802a29c <siprintf>
				printf("IP address assigned by a DHCP server: %s\n", iptxt);
 8010b6a:	f107 030c 	add.w	r3, r7, #12
 8010b6e:	4619      	mov	r1, r3
 8010b70:	4830      	ldr	r0, [pc, #192]	@ (8010c34 <dhcp_sm+0x128>)
 8010b72:	f019 fb23 	bl	802a1bc <iprintf>
	    	break;
 8010b76:	e052      	b.n	8010c1e <dhcp_sm+0x112>
	    		dhcp = (struct dhcp *)netif_get_client_data(netif, LWIP_NETIF_CLIENT_DATA_INDEX_DHCP);
 8010b78:	687b      	ldr	r3, [r7, #4]
 8010b7a:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8010b7c:	62fb      	str	r3, [r7, #44]	@ 0x2c
				if (dhcp->tries > MAX_DHCP_TRIES)
 8010b7e:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8010b80:	799b      	ldrb	r3, [r3, #6]
 8010b82:	2b04      	cmp	r3, #4
 8010b84:	d94b      	bls.n	8010c1e <dhcp_sm+0x112>
					*state = DHCP_TIMEOUT;
 8010b86:	683b      	ldr	r3, [r7, #0]
 8010b88:	2204      	movs	r2, #4
 8010b8a:	701a      	strb	r2, [r3, #0]
					LOCK_TCPIP_CORE();
 8010b8c:	f7ff ff58 	bl	8010a40 <sys_lock_tcpip_core>
					dhcp_stop(netif);
 8010b90:	6878      	ldr	r0, [r7, #4]
 8010b92:	f012 fbfd 	bl	8023390 <dhcp_stop>
					UNLOCK_TCPIP_CORE();
 8010b96:	f7ff ff63 	bl	8010a60 <sys_unlock_tcpip_core>
					ipaddr_aton(STATIC_IP, &ipaddr);
 8010b9a:	f107 0328 	add.w	r3, r7, #40	@ 0x28
 8010b9e:	4619      	mov	r1, r3
 8010ba0:	4825      	ldr	r0, [pc, #148]	@ (8010c38 <dhcp_sm+0x12c>)
 8010ba2:	f014 fe0b 	bl	80257bc <ip4addr_aton>
					ipaddr_aton(STATIC_MASK, &netmask);
 8010ba6:	f107 0324 	add.w	r3, r7, #36	@ 0x24
 8010baa:	4619      	mov	r1, r3
 8010bac:	4823      	ldr	r0, [pc, #140]	@ (8010c3c <dhcp_sm+0x130>)
 8010bae:	f014 fe05 	bl	80257bc <ip4addr_aton>
					ipaddr_aton(STATIC_GW, &gw);
 8010bb2:	f107 0320 	add.w	r3, r7, #32
 8010bb6:	4619      	mov	r1, r3
 8010bb8:	4821      	ldr	r0, [pc, #132]	@ (8010c40 <dhcp_sm+0x134>)
 8010bba:	f014 fdff 	bl	80257bc <ip4addr_aton>
					LOCK_TCPIP_CORE();
 8010bbe:	f7ff ff3f 	bl	8010a40 <sys_lock_tcpip_core>
					netif_set_addr(netif, ip_2_ip4(&ipaddr), ip_2_ip4(&netmask), ip_2_ip4(&gw));
 8010bc2:	f107 0320 	add.w	r3, r7, #32
 8010bc6:	f107 0224 	add.w	r2, r7, #36	@ 0x24
 8010bca:	f107 0128 	add.w	r1, r7, #40	@ 0x28
 8010bce:	6878      	ldr	r0, [r7, #4]
 8010bd0:	f009 fb32 	bl	801a238 <netif_set_addr>
					UNLOCK_TCPIP_CORE();
 8010bd4:	f7ff ff44 	bl	8010a60 <sys_unlock_tcpip_core>
					sprintf((char *)iptxt, "%s", ip4addr_ntoa((const ip4_addr_t *)&netif->ip_addr));
 8010bd8:	687b      	ldr	r3, [r7, #4]
 8010bda:	3304      	adds	r3, #4
 8010bdc:	4618      	mov	r0, r3
 8010bde:	f014 ff17 	bl	8025a10 <ip4addr_ntoa>
 8010be2:	4602      	mov	r2, r0
 8010be4:	f107 030c 	add.w	r3, r7, #12
 8010be8:	4911      	ldr	r1, [pc, #68]	@ (8010c30 <dhcp_sm+0x124>)
 8010bea:	4618      	mov	r0, r3
 8010bec:	f019 fb56 	bl	802a29c <siprintf>
					printf("DHCP Timeout !! \n");
 8010bf0:	4814      	ldr	r0, [pc, #80]	@ (8010c44 <dhcp_sm+0x138>)
 8010bf2:	f019 fb4b 	bl	802a28c <puts>
					printf("Static IP address: %s\n", iptxt);
 8010bf6:	f107 030c 	add.w	r3, r7, #12
 8010bfa:	4619      	mov	r1, r3
 8010bfc:	4812      	ldr	r0, [pc, #72]	@ (8010c48 <dhcp_sm+0x13c>)
 8010bfe:	f019 fadd 	bl	802a1bc <iprintf>
	    	break;
 8010c02:	e00c      	b.n	8010c1e <dhcp_sm+0x112>
	    	dhcp = (struct dhcp *)netif_get_client_data(netif, LWIP_NETIF_CLIENT_DATA_INDEX_DHCP);
 8010c04:	687b      	ldr	r3, [r7, #4]
 8010c06:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8010c08:	62fb      	str	r3, [r7, #44]	@ 0x2c
	    	if(dhcp->state == 3)
 8010c0a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8010c0c:	795b      	ldrb	r3, [r3, #5]
 8010c0e:	2b03      	cmp	r3, #3
 8010c10:	d107      	bne.n	8010c22 <dhcp_sm+0x116>
	    		*state = DHCP_START;
 8010c12:	683b      	ldr	r3, [r7, #0]
 8010c14:	2201      	movs	r2, #1
 8010c16:	701a      	strb	r2, [r3, #0]
	    	break;
 8010c18:	e003      	b.n	8010c22 <dhcp_sm+0x116>
	    	break;
 8010c1a:	bf00      	nop
 8010c1c:	e002      	b.n	8010c24 <dhcp_sm+0x118>
	    	break;
 8010c1e:	bf00      	nop
 8010c20:	e000      	b.n	8010c24 <dhcp_sm+0x118>
	    	break;
 8010c22:	bf00      	nop
	    }
}
 8010c24:	bf00      	nop
 8010c26:	3730      	adds	r7, #48	@ 0x30
 8010c28:	46bd      	mov	sp, r7
 8010c2a:	bd80      	pop	{r7, pc}
 8010c2c:	0802d350 	.word	0x0802d350
 8010c30:	0802d378 	.word	0x0802d378
 8010c34:	0802d37c 	.word	0x0802d37c
 8010c38:	0802d3a8 	.word	0x0802d3a8
 8010c3c:	0802d3b8 	.word	0x0802d3b8
 8010c40:	0802d3c8 	.word	0x0802d3c8
 8010c44:	0802d3d4 	.word	0x0802d3d4
 8010c48:	0802d3e8 	.word	0x0802d3e8

08010c4c <__NVIC_SetPriority>:
{
 8010c4c:	b480      	push	{r7}
 8010c4e:	b083      	sub	sp, #12
 8010c50:	af00      	add	r7, sp, #0
 8010c52:	4603      	mov	r3, r0
 8010c54:	6039      	str	r1, [r7, #0]
 8010c56:	80fb      	strh	r3, [r7, #6]
  if ((int32_t)(IRQn) >= 0)
 8010c58:	f9b7 3006 	ldrsh.w	r3, [r7, #6]
 8010c5c:	2b00      	cmp	r3, #0
 8010c5e:	db0a      	blt.n	8010c76 <__NVIC_SetPriority+0x2a>
    NVIC->IP[((uint32_t)IRQn)]                = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 8010c60:	683b      	ldr	r3, [r7, #0]
 8010c62:	b2da      	uxtb	r2, r3
 8010c64:	490c      	ldr	r1, [pc, #48]	@ (8010c98 <__NVIC_SetPriority+0x4c>)
 8010c66:	f9b7 3006 	ldrsh.w	r3, [r7, #6]
 8010c6a:	0112      	lsls	r2, r2, #4
 8010c6c:	b2d2      	uxtb	r2, r2
 8010c6e:	440b      	add	r3, r1
 8010c70:	f883 2300 	strb.w	r2, [r3, #768]	@ 0x300
}
 8010c74:	e00a      	b.n	8010c8c <__NVIC_SetPriority+0x40>
    SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 8010c76:	683b      	ldr	r3, [r7, #0]
 8010c78:	b2da      	uxtb	r2, r3
 8010c7a:	4908      	ldr	r1, [pc, #32]	@ (8010c9c <__NVIC_SetPriority+0x50>)
 8010c7c:	88fb      	ldrh	r3, [r7, #6]
 8010c7e:	f003 030f 	and.w	r3, r3, #15
 8010c82:	3b04      	subs	r3, #4
 8010c84:	0112      	lsls	r2, r2, #4
 8010c86:	b2d2      	uxtb	r2, r2
 8010c88:	440b      	add	r3, r1
 8010c8a:	761a      	strb	r2, [r3, #24]
}
 8010c8c:	bf00      	nop
 8010c8e:	370c      	adds	r7, #12
 8010c90:	46bd      	mov	sp, r7
 8010c92:	f85d 7b04 	ldr.w	r7, [sp], #4
 8010c96:	4770      	bx	lr
 8010c98:	e000e100 	.word	0xe000e100
 8010c9c:	e000ed00 	.word	0xe000ed00

08010ca0 <SysTick_Handler>:

/*
  SysTick handler implementation that also clears overflow flag.
*/
#if (USE_CUSTOM_SYSTICK_HANDLER_IMPLEMENTATION == 0)
void SysTick_Handler (void) {
 8010ca0:	b580      	push	{r7, lr}
 8010ca2:	af00      	add	r7, sp, #0
  /* Clear overflow flag */
  SysTick->CTRL;
 8010ca4:	4b05      	ldr	r3, [pc, #20]	@ (8010cbc <SysTick_Handler+0x1c>)
 8010ca6:	681b      	ldr	r3, [r3, #0]

  if (xTaskGetSchedulerState() != taskSCHEDULER_NOT_STARTED) {
 8010ca8:	f003 f9d8 	bl	801405c <xTaskGetSchedulerState>
 8010cac:	4603      	mov	r3, r0
 8010cae:	2b01      	cmp	r3, #1
 8010cb0:	d001      	beq.n	8010cb6 <SysTick_Handler+0x16>
    /* Call tick handler */
    xPortSysTickHandler();
 8010cb2:	f004 fbc1 	bl	8015438 <xPortSysTickHandler>
  }
}
 8010cb6:	bf00      	nop
 8010cb8:	bd80      	pop	{r7, pc}
 8010cba:	bf00      	nop
 8010cbc:	e000e010 	.word	0xe000e010

08010cc0 <SVC_Setup>:
#endif /* SysTick */

/*
  Setup SVC to reset value.
*/
__STATIC_INLINE void SVC_Setup (void) {
 8010cc0:	b580      	push	{r7, lr}
 8010cc2:	af00      	add	r7, sp, #0
#if (__ARM_ARCH_7A__ == 0U)
  /* Service Call interrupt might be configured before kernel start     */
  /* and when its priority is lower or equal to BASEPRI, svc intruction */
  /* causes a Hard Fault.                                               */
  NVIC_SetPriority (SVCall_IRQ_NBR, 0U);
 8010cc4:	2100      	movs	r1, #0
 8010cc6:	f06f 0004 	mvn.w	r0, #4
 8010cca:	f7ff ffbf 	bl	8010c4c <__NVIC_SetPriority>
#endif
}
 8010cce:	bf00      	nop
 8010cd0:	bd80      	pop	{r7, pc}
	...

08010cd4 <osKernelInitialize>:
static uint32_t OS_Tick_GetOverflow (void);
/* Get OS Tick interval */
static uint32_t OS_Tick_GetInterval (void);
/*---------------------------------------------------------------------------*/

osStatus_t osKernelInitialize (void) {
 8010cd4:	b480      	push	{r7}
 8010cd6:	b083      	sub	sp, #12
 8010cd8:	af00      	add	r7, sp, #0
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 8010cda:	f3ef 8305 	mrs	r3, IPSR
 8010cde:	603b      	str	r3, [r7, #0]
  return(result);
 8010ce0:	683b      	ldr	r3, [r7, #0]
  osStatus_t stat;

  if (IS_IRQ()) {
 8010ce2:	2b00      	cmp	r3, #0
 8010ce4:	d003      	beq.n	8010cee <osKernelInitialize+0x1a>
    stat = osErrorISR;
 8010ce6:	f06f 0305 	mvn.w	r3, #5
 8010cea:	607b      	str	r3, [r7, #4]
 8010cec:	e00c      	b.n	8010d08 <osKernelInitialize+0x34>
  }
  else {
    if (KernelState == osKernelInactive) {
 8010cee:	4b0a      	ldr	r3, [pc, #40]	@ (8010d18 <osKernelInitialize+0x44>)
 8010cf0:	681b      	ldr	r3, [r3, #0]
 8010cf2:	2b00      	cmp	r3, #0
 8010cf4:	d105      	bne.n	8010d02 <osKernelInitialize+0x2e>
        EvrFreeRTOSSetup(0U);
      #endif
      #if defined(USE_FreeRTOS_HEAP_5) && (HEAP_5_REGION_SETUP == 1)
        vPortDefineHeapRegions (configHEAP_5_REGIONS);
      #endif
      KernelState = osKernelReady;
 8010cf6:	4b08      	ldr	r3, [pc, #32]	@ (8010d18 <osKernelInitialize+0x44>)
 8010cf8:	2201      	movs	r2, #1
 8010cfa:	601a      	str	r2, [r3, #0]
      stat = osOK;
 8010cfc:	2300      	movs	r3, #0
 8010cfe:	607b      	str	r3, [r7, #4]
 8010d00:	e002      	b.n	8010d08 <osKernelInitialize+0x34>
    } else {
      stat = osError;
 8010d02:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8010d06:	607b      	str	r3, [r7, #4]
    }
  }

  return (stat);
 8010d08:	687b      	ldr	r3, [r7, #4]
}
 8010d0a:	4618      	mov	r0, r3
 8010d0c:	370c      	adds	r7, #12
 8010d0e:	46bd      	mov	sp, r7
 8010d10:	f85d 7b04 	ldr.w	r7, [sp], #4
 8010d14:	4770      	bx	lr
 8010d16:	bf00      	nop
 8010d18:	240023cc 	.word	0x240023cc

08010d1c <osKernelStart>:
  }

  return (state);
}

osStatus_t osKernelStart (void) {
 8010d1c:	b580      	push	{r7, lr}
 8010d1e:	b082      	sub	sp, #8
 8010d20:	af00      	add	r7, sp, #0
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 8010d22:	f3ef 8305 	mrs	r3, IPSR
 8010d26:	603b      	str	r3, [r7, #0]
  return(result);
 8010d28:	683b      	ldr	r3, [r7, #0]
  osStatus_t stat;

  if (IS_IRQ()) {
 8010d2a:	2b00      	cmp	r3, #0
 8010d2c:	d003      	beq.n	8010d36 <osKernelStart+0x1a>
    stat = osErrorISR;
 8010d2e:	f06f 0305 	mvn.w	r3, #5
 8010d32:	607b      	str	r3, [r7, #4]
 8010d34:	e010      	b.n	8010d58 <osKernelStart+0x3c>
  }
  else {
    if (KernelState == osKernelReady) {
 8010d36:	4b0b      	ldr	r3, [pc, #44]	@ (8010d64 <osKernelStart+0x48>)
 8010d38:	681b      	ldr	r3, [r3, #0]
 8010d3a:	2b01      	cmp	r3, #1
 8010d3c:	d109      	bne.n	8010d52 <osKernelStart+0x36>
      /* Ensure SVC priority is at the reset value */
      SVC_Setup();
 8010d3e:	f7ff ffbf 	bl	8010cc0 <SVC_Setup>
      /* Change state to enable IRQ masking check */
      KernelState = osKernelRunning;
 8010d42:	4b08      	ldr	r3, [pc, #32]	@ (8010d64 <osKernelStart+0x48>)
 8010d44:	2202      	movs	r2, #2
 8010d46:	601a      	str	r2, [r3, #0]
      /* Start the kernel scheduler */
      vTaskStartScheduler();
 8010d48:	f002 fccc 	bl	80136e4 <vTaskStartScheduler>
      stat = osOK;
 8010d4c:	2300      	movs	r3, #0
 8010d4e:	607b      	str	r3, [r7, #4]
 8010d50:	e002      	b.n	8010d58 <osKernelStart+0x3c>
    } else {
      stat = osError;
 8010d52:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8010d56:	607b      	str	r3, [r7, #4]
    }
  }

  return (stat);
 8010d58:	687b      	ldr	r3, [r7, #4]
}
 8010d5a:	4618      	mov	r0, r3
 8010d5c:	3708      	adds	r7, #8
 8010d5e:	46bd      	mov	sp, r7
 8010d60:	bd80      	pop	{r7, pc}
 8010d62:	bf00      	nop
 8010d64:	240023cc 	.word	0x240023cc

08010d68 <osKernelGetTickCount>:
  }

  return (lock);
}

uint32_t osKernelGetTickCount (void) {
 8010d68:	b580      	push	{r7, lr}
 8010d6a:	b082      	sub	sp, #8
 8010d6c:	af00      	add	r7, sp, #0
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 8010d6e:	f3ef 8305 	mrs	r3, IPSR
 8010d72:	603b      	str	r3, [r7, #0]
  return(result);
 8010d74:	683b      	ldr	r3, [r7, #0]
  TickType_t ticks;

  if (IS_IRQ()) {
 8010d76:	2b00      	cmp	r3, #0
 8010d78:	d003      	beq.n	8010d82 <osKernelGetTickCount+0x1a>
    ticks = xTaskGetTickCountFromISR();
 8010d7a:	f002 fddf 	bl	801393c <xTaskGetTickCountFromISR>
 8010d7e:	6078      	str	r0, [r7, #4]
 8010d80:	e002      	b.n	8010d88 <osKernelGetTickCount+0x20>
  } else {
    ticks = xTaskGetTickCount();
 8010d82:	f002 fdcb 	bl	801391c <xTaskGetTickCount>
 8010d86:	6078      	str	r0, [r7, #4]
  }

  return (ticks);
 8010d88:	687b      	ldr	r3, [r7, #4]
}
 8010d8a:	4618      	mov	r0, r3
 8010d8c:	3708      	adds	r7, #8
 8010d8e:	46bd      	mov	sp, r7
 8010d90:	bd80      	pop	{r7, pc}

08010d92 <osThreadNew>:
  return (configCPU_CLOCK_HZ);
}

/*---------------------------------------------------------------------------*/

osThreadId_t osThreadNew (osThreadFunc_t func, void *argument, const osThreadAttr_t *attr) {
 8010d92:	b580      	push	{r7, lr}
 8010d94:	b08e      	sub	sp, #56	@ 0x38
 8010d96:	af04      	add	r7, sp, #16
 8010d98:	60f8      	str	r0, [r7, #12]
 8010d9a:	60b9      	str	r1, [r7, #8]
 8010d9c:	607a      	str	r2, [r7, #4]
  uint32_t stack;
  TaskHandle_t hTask;
  UBaseType_t prio;
  int32_t mem;

  hTask = NULL;
 8010d9e:	2300      	movs	r3, #0
 8010da0:	613b      	str	r3, [r7, #16]
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 8010da2:	f3ef 8305 	mrs	r3, IPSR
 8010da6:	617b      	str	r3, [r7, #20]
  return(result);
 8010da8:	697b      	ldr	r3, [r7, #20]

  if (!IS_IRQ() && (func != NULL)) {
 8010daa:	2b00      	cmp	r3, #0
 8010dac:	d17f      	bne.n	8010eae <osThreadNew+0x11c>
 8010dae:	68fb      	ldr	r3, [r7, #12]
 8010db0:	2b00      	cmp	r3, #0
 8010db2:	d07c      	beq.n	8010eae <osThreadNew+0x11c>
    stack = configMINIMAL_STACK_SIZE;
 8010db4:	f44f 7300 	mov.w	r3, #512	@ 0x200
 8010db8:	623b      	str	r3, [r7, #32]
    prio  = (UBaseType_t)osPriorityNormal;
 8010dba:	2318      	movs	r3, #24
 8010dbc:	61fb      	str	r3, [r7, #28]

    name = NULL;
 8010dbe:	2300      	movs	r3, #0
 8010dc0:	627b      	str	r3, [r7, #36]	@ 0x24
    mem  = -1;
 8010dc2:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8010dc6:	61bb      	str	r3, [r7, #24]

    if (attr != NULL) {
 8010dc8:	687b      	ldr	r3, [r7, #4]
 8010dca:	2b00      	cmp	r3, #0
 8010dcc:	d045      	beq.n	8010e5a <osThreadNew+0xc8>
      if (attr->name != NULL) {
 8010dce:	687b      	ldr	r3, [r7, #4]
 8010dd0:	681b      	ldr	r3, [r3, #0]
 8010dd2:	2b00      	cmp	r3, #0
 8010dd4:	d002      	beq.n	8010ddc <osThreadNew+0x4a>
        name = attr->name;
 8010dd6:	687b      	ldr	r3, [r7, #4]
 8010dd8:	681b      	ldr	r3, [r3, #0]
 8010dda:	627b      	str	r3, [r7, #36]	@ 0x24
      }
      if (attr->priority != osPriorityNone) {
 8010ddc:	687b      	ldr	r3, [r7, #4]
 8010dde:	699b      	ldr	r3, [r3, #24]
 8010de0:	2b00      	cmp	r3, #0
 8010de2:	d002      	beq.n	8010dea <osThreadNew+0x58>
        prio = (UBaseType_t)attr->priority;
 8010de4:	687b      	ldr	r3, [r7, #4]
 8010de6:	699b      	ldr	r3, [r3, #24]
 8010de8:	61fb      	str	r3, [r7, #28]
      }

      if ((prio < osPriorityIdle) || (prio > osPriorityISR) || ((attr->attr_bits & osThreadJoinable) == osThreadJoinable)) {
 8010dea:	69fb      	ldr	r3, [r7, #28]
 8010dec:	2b00      	cmp	r3, #0
 8010dee:	d008      	beq.n	8010e02 <osThreadNew+0x70>
 8010df0:	69fb      	ldr	r3, [r7, #28]
 8010df2:	2b38      	cmp	r3, #56	@ 0x38
 8010df4:	d805      	bhi.n	8010e02 <osThreadNew+0x70>
 8010df6:	687b      	ldr	r3, [r7, #4]
 8010df8:	685b      	ldr	r3, [r3, #4]
 8010dfa:	f003 0301 	and.w	r3, r3, #1
 8010dfe:	2b00      	cmp	r3, #0
 8010e00:	d001      	beq.n	8010e06 <osThreadNew+0x74>
        return (NULL);
 8010e02:	2300      	movs	r3, #0
 8010e04:	e054      	b.n	8010eb0 <osThreadNew+0x11e>
      }

      if (attr->stack_size > 0U) {
 8010e06:	687b      	ldr	r3, [r7, #4]
 8010e08:	695b      	ldr	r3, [r3, #20]
 8010e0a:	2b00      	cmp	r3, #0
 8010e0c:	d003      	beq.n	8010e16 <osThreadNew+0x84>
        /* In FreeRTOS stack is not in bytes, but in sizeof(StackType_t) which is 4 on ARM ports.       */
        /* Stack size should be therefore 4 byte aligned in order to avoid division caused side effects */
        stack = attr->stack_size / sizeof(StackType_t);
 8010e0e:	687b      	ldr	r3, [r7, #4]
 8010e10:	695b      	ldr	r3, [r3, #20]
 8010e12:	089b      	lsrs	r3, r3, #2
 8010e14:	623b      	str	r3, [r7, #32]
      }

      if ((attr->cb_mem    != NULL) && (attr->cb_size    >= sizeof(StaticTask_t)) &&
 8010e16:	687b      	ldr	r3, [r7, #4]
 8010e18:	689b      	ldr	r3, [r3, #8]
 8010e1a:	2b00      	cmp	r3, #0
 8010e1c:	d00e      	beq.n	8010e3c <osThreadNew+0xaa>
 8010e1e:	687b      	ldr	r3, [r7, #4]
 8010e20:	68db      	ldr	r3, [r3, #12]
 8010e22:	2ba7      	cmp	r3, #167	@ 0xa7
 8010e24:	d90a      	bls.n	8010e3c <osThreadNew+0xaa>
          (attr->stack_mem != NULL) && (attr->stack_size >  0U)) {
 8010e26:	687b      	ldr	r3, [r7, #4]
 8010e28:	691b      	ldr	r3, [r3, #16]
      if ((attr->cb_mem    != NULL) && (attr->cb_size    >= sizeof(StaticTask_t)) &&
 8010e2a:	2b00      	cmp	r3, #0
 8010e2c:	d006      	beq.n	8010e3c <osThreadNew+0xaa>
          (attr->stack_mem != NULL) && (attr->stack_size >  0U)) {
 8010e2e:	687b      	ldr	r3, [r7, #4]
 8010e30:	695b      	ldr	r3, [r3, #20]
 8010e32:	2b00      	cmp	r3, #0
 8010e34:	d002      	beq.n	8010e3c <osThreadNew+0xaa>
        mem = 1;
 8010e36:	2301      	movs	r3, #1
 8010e38:	61bb      	str	r3, [r7, #24]
 8010e3a:	e010      	b.n	8010e5e <osThreadNew+0xcc>
      }
      else {
        if ((attr->cb_mem == NULL) && (attr->cb_size == 0U) && (attr->stack_mem == NULL)) {
 8010e3c:	687b      	ldr	r3, [r7, #4]
 8010e3e:	689b      	ldr	r3, [r3, #8]
 8010e40:	2b00      	cmp	r3, #0
 8010e42:	d10c      	bne.n	8010e5e <osThreadNew+0xcc>
 8010e44:	687b      	ldr	r3, [r7, #4]
 8010e46:	68db      	ldr	r3, [r3, #12]
 8010e48:	2b00      	cmp	r3, #0
 8010e4a:	d108      	bne.n	8010e5e <osThreadNew+0xcc>
 8010e4c:	687b      	ldr	r3, [r7, #4]
 8010e4e:	691b      	ldr	r3, [r3, #16]
 8010e50:	2b00      	cmp	r3, #0
 8010e52:	d104      	bne.n	8010e5e <osThreadNew+0xcc>
          mem = 0;
 8010e54:	2300      	movs	r3, #0
 8010e56:	61bb      	str	r3, [r7, #24]
 8010e58:	e001      	b.n	8010e5e <osThreadNew+0xcc>
        }
      }
    }
    else {
      mem = 0;
 8010e5a:	2300      	movs	r3, #0
 8010e5c:	61bb      	str	r3, [r7, #24]
    }

    if (mem == 1) {
 8010e5e:	69bb      	ldr	r3, [r7, #24]
 8010e60:	2b01      	cmp	r3, #1
 8010e62:	d110      	bne.n	8010e86 <osThreadNew+0xf4>
      #if (configSUPPORT_STATIC_ALLOCATION == 1)
        hTask = xTaskCreateStatic ((TaskFunction_t)func, name, stack, argument, prio, (StackType_t  *)attr->stack_mem,
 8010e64:	687b      	ldr	r3, [r7, #4]
 8010e66:	691b      	ldr	r3, [r3, #16]
                                                                                      (StaticTask_t *)attr->cb_mem);
 8010e68:	687a      	ldr	r2, [r7, #4]
 8010e6a:	6892      	ldr	r2, [r2, #8]
        hTask = xTaskCreateStatic ((TaskFunction_t)func, name, stack, argument, prio, (StackType_t  *)attr->stack_mem,
 8010e6c:	9202      	str	r2, [sp, #8]
 8010e6e:	9301      	str	r3, [sp, #4]
 8010e70:	69fb      	ldr	r3, [r7, #28]
 8010e72:	9300      	str	r3, [sp, #0]
 8010e74:	68bb      	ldr	r3, [r7, #8]
 8010e76:	6a3a      	ldr	r2, [r7, #32]
 8010e78:	6a79      	ldr	r1, [r7, #36]	@ 0x24
 8010e7a:	68f8      	ldr	r0, [r7, #12]
 8010e7c:	f002 fa3e 	bl	80132fc <xTaskCreateStatic>
 8010e80:	4603      	mov	r3, r0
 8010e82:	613b      	str	r3, [r7, #16]
 8010e84:	e013      	b.n	8010eae <osThreadNew+0x11c>
      #endif
    }
    else {
      if (mem == 0) {
 8010e86:	69bb      	ldr	r3, [r7, #24]
 8010e88:	2b00      	cmp	r3, #0
 8010e8a:	d110      	bne.n	8010eae <osThreadNew+0x11c>
        #if (configSUPPORT_DYNAMIC_ALLOCATION == 1)
          if (xTaskCreate ((TaskFunction_t)func, name, (uint16_t)stack, argument, prio, &hTask) != pdPASS) {
 8010e8c:	6a3b      	ldr	r3, [r7, #32]
 8010e8e:	b29a      	uxth	r2, r3
 8010e90:	f107 0310 	add.w	r3, r7, #16
 8010e94:	9301      	str	r3, [sp, #4]
 8010e96:	69fb      	ldr	r3, [r7, #28]
 8010e98:	9300      	str	r3, [sp, #0]
 8010e9a:	68bb      	ldr	r3, [r7, #8]
 8010e9c:	6a79      	ldr	r1, [r7, #36]	@ 0x24
 8010e9e:	68f8      	ldr	r0, [r7, #12]
 8010ea0:	f002 fa8c 	bl	80133bc <xTaskCreate>
 8010ea4:	4603      	mov	r3, r0
 8010ea6:	2b01      	cmp	r3, #1
 8010ea8:	d001      	beq.n	8010eae <osThreadNew+0x11c>
            hTask = NULL;
 8010eaa:	2300      	movs	r3, #0
 8010eac:	613b      	str	r3, [r7, #16]
        #endif
      }
    }
  }

  return ((osThreadId_t)hTask);
 8010eae:	693b      	ldr	r3, [r7, #16]
}
 8010eb0:	4618      	mov	r0, r3
 8010eb2:	3728      	adds	r7, #40	@ 0x28
 8010eb4:	46bd      	mov	sp, r7
 8010eb6:	bd80      	pop	{r7, pc}

08010eb8 <osThreadGetId>:
  }

  return (name);
}

osThreadId_t osThreadGetId (void) {
 8010eb8:	b580      	push	{r7, lr}
 8010eba:	b082      	sub	sp, #8
 8010ebc:	af00      	add	r7, sp, #0
  osThreadId_t id;

  id = (osThreadId_t)xTaskGetCurrentTaskHandle();
 8010ebe:	f003 f8bd 	bl	801403c <xTaskGetCurrentTaskHandle>
 8010ec2:	6078      	str	r0, [r7, #4]

  return (id);
 8010ec4:	687b      	ldr	r3, [r7, #4]
}
 8010ec6:	4618      	mov	r0, r3
 8010ec8:	3708      	adds	r7, #8
 8010eca:	46bd      	mov	sp, r7
 8010ecc:	bd80      	pop	{r7, pc}

08010ece <osDelay>:
  /* Return flags before clearing */
  return (rflags);
}
#endif /* (configUSE_OS2_THREAD_FLAGS == 1) */

osStatus_t osDelay (uint32_t ticks) {
 8010ece:	b580      	push	{r7, lr}
 8010ed0:	b084      	sub	sp, #16
 8010ed2:	af00      	add	r7, sp, #0
 8010ed4:	6078      	str	r0, [r7, #4]
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 8010ed6:	f3ef 8305 	mrs	r3, IPSR
 8010eda:	60bb      	str	r3, [r7, #8]
  return(result);
 8010edc:	68bb      	ldr	r3, [r7, #8]
  osStatus_t stat;

  if (IS_IRQ()) {
 8010ede:	2b00      	cmp	r3, #0
 8010ee0:	d003      	beq.n	8010eea <osDelay+0x1c>
    stat = osErrorISR;
 8010ee2:	f06f 0305 	mvn.w	r3, #5
 8010ee6:	60fb      	str	r3, [r7, #12]
 8010ee8:	e007      	b.n	8010efa <osDelay+0x2c>
  }
  else {
    stat = osOK;
 8010eea:	2300      	movs	r3, #0
 8010eec:	60fb      	str	r3, [r7, #12]

    if (ticks != 0U) {
 8010eee:	687b      	ldr	r3, [r7, #4]
 8010ef0:	2b00      	cmp	r3, #0
 8010ef2:	d002      	beq.n	8010efa <osDelay+0x2c>
      vTaskDelay(ticks);
 8010ef4:	6878      	ldr	r0, [r7, #4]
 8010ef6:	f002 fbbf 	bl	8013678 <vTaskDelay>
    }
  }

  return (stat);
 8010efa:	68fb      	ldr	r3, [r7, #12]
}
 8010efc:	4618      	mov	r0, r3
 8010efe:	3710      	adds	r7, #16
 8010f00:	46bd      	mov	sp, r7
 8010f02:	bd80      	pop	{r7, pc}

08010f04 <TimerCallback>:
}

/*---------------------------------------------------------------------------*/
#if (configUSE_OS2_TIMER == 1)

static void TimerCallback (TimerHandle_t hTimer) {
 8010f04:	b580      	push	{r7, lr}
 8010f06:	b084      	sub	sp, #16
 8010f08:	af00      	add	r7, sp, #0
 8010f0a:	6078      	str	r0, [r7, #4]
  TimerCallback_t *callb;

  callb = (TimerCallback_t *)pvTimerGetTimerID (hTimer);
 8010f0c:	6878      	ldr	r0, [r7, #4]
 8010f0e:	f004 f8ad 	bl	801506c <pvTimerGetTimerID>
 8010f12:	60f8      	str	r0, [r7, #12]

  if (callb != NULL) {
 8010f14:	68fb      	ldr	r3, [r7, #12]
 8010f16:	2b00      	cmp	r3, #0
 8010f18:	d005      	beq.n	8010f26 <TimerCallback+0x22>
    callb->func (callb->arg);
 8010f1a:	68fb      	ldr	r3, [r7, #12]
 8010f1c:	681b      	ldr	r3, [r3, #0]
 8010f1e:	68fa      	ldr	r2, [r7, #12]
 8010f20:	6852      	ldr	r2, [r2, #4]
 8010f22:	4610      	mov	r0, r2
 8010f24:	4798      	blx	r3
  }
}
 8010f26:	bf00      	nop
 8010f28:	3710      	adds	r7, #16
 8010f2a:	46bd      	mov	sp, r7
 8010f2c:	bd80      	pop	{r7, pc}
	...

08010f30 <osTimerNew>:

osTimerId_t osTimerNew (osTimerFunc_t func, osTimerType_t type, void *argument, const osTimerAttr_t *attr) {
 8010f30:	b580      	push	{r7, lr}
 8010f32:	b08c      	sub	sp, #48	@ 0x30
 8010f34:	af02      	add	r7, sp, #8
 8010f36:	60f8      	str	r0, [r7, #12]
 8010f38:	607a      	str	r2, [r7, #4]
 8010f3a:	603b      	str	r3, [r7, #0]
 8010f3c:	460b      	mov	r3, r1
 8010f3e:	72fb      	strb	r3, [r7, #11]
  TimerHandle_t hTimer;
  TimerCallback_t *callb;
  UBaseType_t reload;
  int32_t mem;

  hTimer = NULL;
 8010f40:	2300      	movs	r3, #0
 8010f42:	623b      	str	r3, [r7, #32]
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 8010f44:	f3ef 8305 	mrs	r3, IPSR
 8010f48:	613b      	str	r3, [r7, #16]
  return(result);
 8010f4a:	693b      	ldr	r3, [r7, #16]

  if (!IS_IRQ() && (func != NULL)) {
 8010f4c:	2b00      	cmp	r3, #0
 8010f4e:	d163      	bne.n	8011018 <osTimerNew+0xe8>
 8010f50:	68fb      	ldr	r3, [r7, #12]
 8010f52:	2b00      	cmp	r3, #0
 8010f54:	d060      	beq.n	8011018 <osTimerNew+0xe8>
    /* Allocate memory to store callback function and argument */
    callb = pvPortMalloc (sizeof(TimerCallback_t));
 8010f56:	2008      	movs	r0, #8
 8010f58:	f004 fb00 	bl	801555c <pvPortMalloc>
 8010f5c:	6178      	str	r0, [r7, #20]

    if (callb != NULL) {
 8010f5e:	697b      	ldr	r3, [r7, #20]
 8010f60:	2b00      	cmp	r3, #0
 8010f62:	d059      	beq.n	8011018 <osTimerNew+0xe8>
      callb->func = func;
 8010f64:	697b      	ldr	r3, [r7, #20]
 8010f66:	68fa      	ldr	r2, [r7, #12]
 8010f68:	601a      	str	r2, [r3, #0]
      callb->arg  = argument;
 8010f6a:	697b      	ldr	r3, [r7, #20]
 8010f6c:	687a      	ldr	r2, [r7, #4]
 8010f6e:	605a      	str	r2, [r3, #4]

      if (type == osTimerOnce) {
 8010f70:	7afb      	ldrb	r3, [r7, #11]
 8010f72:	2b00      	cmp	r3, #0
 8010f74:	d102      	bne.n	8010f7c <osTimerNew+0x4c>
        reload = pdFALSE;
 8010f76:	2300      	movs	r3, #0
 8010f78:	61fb      	str	r3, [r7, #28]
 8010f7a:	e001      	b.n	8010f80 <osTimerNew+0x50>
      } else {
        reload = pdTRUE;
 8010f7c:	2301      	movs	r3, #1
 8010f7e:	61fb      	str	r3, [r7, #28]
      }

      mem  = -1;
 8010f80:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8010f84:	61bb      	str	r3, [r7, #24]
      name = NULL;
 8010f86:	2300      	movs	r3, #0
 8010f88:	627b      	str	r3, [r7, #36]	@ 0x24

      if (attr != NULL) {
 8010f8a:	683b      	ldr	r3, [r7, #0]
 8010f8c:	2b00      	cmp	r3, #0
 8010f8e:	d01c      	beq.n	8010fca <osTimerNew+0x9a>
        if (attr->name != NULL) {
 8010f90:	683b      	ldr	r3, [r7, #0]
 8010f92:	681b      	ldr	r3, [r3, #0]
 8010f94:	2b00      	cmp	r3, #0
 8010f96:	d002      	beq.n	8010f9e <osTimerNew+0x6e>
          name = attr->name;
 8010f98:	683b      	ldr	r3, [r7, #0]
 8010f9a:	681b      	ldr	r3, [r3, #0]
 8010f9c:	627b      	str	r3, [r7, #36]	@ 0x24
        }

        if ((attr->cb_mem != NULL) && (attr->cb_size >= sizeof(StaticTimer_t))) {
 8010f9e:	683b      	ldr	r3, [r7, #0]
 8010fa0:	689b      	ldr	r3, [r3, #8]
 8010fa2:	2b00      	cmp	r3, #0
 8010fa4:	d006      	beq.n	8010fb4 <osTimerNew+0x84>
 8010fa6:	683b      	ldr	r3, [r7, #0]
 8010fa8:	68db      	ldr	r3, [r3, #12]
 8010faa:	2b2b      	cmp	r3, #43	@ 0x2b
 8010fac:	d902      	bls.n	8010fb4 <osTimerNew+0x84>
          mem = 1;
 8010fae:	2301      	movs	r3, #1
 8010fb0:	61bb      	str	r3, [r7, #24]
 8010fb2:	e00c      	b.n	8010fce <osTimerNew+0x9e>
        }
        else {
          if ((attr->cb_mem == NULL) && (attr->cb_size == 0U)) {
 8010fb4:	683b      	ldr	r3, [r7, #0]
 8010fb6:	689b      	ldr	r3, [r3, #8]
 8010fb8:	2b00      	cmp	r3, #0
 8010fba:	d108      	bne.n	8010fce <osTimerNew+0x9e>
 8010fbc:	683b      	ldr	r3, [r7, #0]
 8010fbe:	68db      	ldr	r3, [r3, #12]
 8010fc0:	2b00      	cmp	r3, #0
 8010fc2:	d104      	bne.n	8010fce <osTimerNew+0x9e>
            mem = 0;
 8010fc4:	2300      	movs	r3, #0
 8010fc6:	61bb      	str	r3, [r7, #24]
 8010fc8:	e001      	b.n	8010fce <osTimerNew+0x9e>
          }
        }
      }
      else {
        mem = 0;
 8010fca:	2300      	movs	r3, #0
 8010fcc:	61bb      	str	r3, [r7, #24]
      }

      if (mem == 1) {
 8010fce:	69bb      	ldr	r3, [r7, #24]
 8010fd0:	2b01      	cmp	r3, #1
 8010fd2:	d10c      	bne.n	8010fee <osTimerNew+0xbe>
        #if (configSUPPORT_STATIC_ALLOCATION == 1)
          hTimer = xTimerCreateStatic (name, 1, reload, callb, TimerCallback, (StaticTimer_t *)attr->cb_mem);
 8010fd4:	683b      	ldr	r3, [r7, #0]
 8010fd6:	689b      	ldr	r3, [r3, #8]
 8010fd8:	9301      	str	r3, [sp, #4]
 8010fda:	4b12      	ldr	r3, [pc, #72]	@ (8011024 <osTimerNew+0xf4>)
 8010fdc:	9300      	str	r3, [sp, #0]
 8010fde:	697b      	ldr	r3, [r7, #20]
 8010fe0:	69fa      	ldr	r2, [r7, #28]
 8010fe2:	2101      	movs	r1, #1
 8010fe4:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 8010fe6:	f003 fcb4 	bl	8014952 <xTimerCreateStatic>
 8010fea:	6238      	str	r0, [r7, #32]
 8010fec:	e00b      	b.n	8011006 <osTimerNew+0xd6>
        #endif
      }
      else {
        if (mem == 0) {
 8010fee:	69bb      	ldr	r3, [r7, #24]
 8010ff0:	2b00      	cmp	r3, #0
 8010ff2:	d108      	bne.n	8011006 <osTimerNew+0xd6>
          #if (configSUPPORT_DYNAMIC_ALLOCATION == 1)
            hTimer = xTimerCreate (name, 1, reload, callb, TimerCallback);
 8010ff4:	4b0b      	ldr	r3, [pc, #44]	@ (8011024 <osTimerNew+0xf4>)
 8010ff6:	9300      	str	r3, [sp, #0]
 8010ff8:	697b      	ldr	r3, [r7, #20]
 8010ffa:	69fa      	ldr	r2, [r7, #28]
 8010ffc:	2101      	movs	r1, #1
 8010ffe:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 8011000:	f003 fc86 	bl	8014910 <xTimerCreate>
 8011004:	6238      	str	r0, [r7, #32]
          #endif
        }
      }

      if ((hTimer == NULL) && (callb != NULL)) {
 8011006:	6a3b      	ldr	r3, [r7, #32]
 8011008:	2b00      	cmp	r3, #0
 801100a:	d105      	bne.n	8011018 <osTimerNew+0xe8>
 801100c:	697b      	ldr	r3, [r7, #20]
 801100e:	2b00      	cmp	r3, #0
 8011010:	d002      	beq.n	8011018 <osTimerNew+0xe8>
        vPortFree (callb);
 8011012:	6978      	ldr	r0, [r7, #20]
 8011014:	f004 fb70 	bl	80156f8 <vPortFree>
      }
    }
  }

  return ((osTimerId_t)hTimer);
 8011018:	6a3b      	ldr	r3, [r7, #32]
}
 801101a:	4618      	mov	r0, r3
 801101c:	3728      	adds	r7, #40	@ 0x28
 801101e:	46bd      	mov	sp, r7
 8011020:	bd80      	pop	{r7, pc}
 8011022:	bf00      	nop
 8011024:	08010f05 	.word	0x08010f05

08011028 <osMutexNew>:
}

/*---------------------------------------------------------------------------*/
#if (configUSE_OS2_MUTEX == 1)

osMutexId_t osMutexNew (const osMutexAttr_t *attr) {
 8011028:	b580      	push	{r7, lr}
 801102a:	b088      	sub	sp, #32
 801102c:	af00      	add	r7, sp, #0
 801102e:	6078      	str	r0, [r7, #4]
  int32_t  mem;
  #if (configQUEUE_REGISTRY_SIZE > 0)
  const char *name;
  #endif

  hMutex = NULL;
 8011030:	2300      	movs	r3, #0
 8011032:	61fb      	str	r3, [r7, #28]
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 8011034:	f3ef 8305 	mrs	r3, IPSR
 8011038:	60bb      	str	r3, [r7, #8]
  return(result);
 801103a:	68bb      	ldr	r3, [r7, #8]

  if (!IS_IRQ()) {
 801103c:	2b00      	cmp	r3, #0
 801103e:	d174      	bne.n	801112a <osMutexNew+0x102>
    if (attr != NULL) {
 8011040:	687b      	ldr	r3, [r7, #4]
 8011042:	2b00      	cmp	r3, #0
 8011044:	d003      	beq.n	801104e <osMutexNew+0x26>
      type = attr->attr_bits;
 8011046:	687b      	ldr	r3, [r7, #4]
 8011048:	685b      	ldr	r3, [r3, #4]
 801104a:	61bb      	str	r3, [r7, #24]
 801104c:	e001      	b.n	8011052 <osMutexNew+0x2a>
    } else {
      type = 0U;
 801104e:	2300      	movs	r3, #0
 8011050:	61bb      	str	r3, [r7, #24]
    }

    if ((type & osMutexRecursive) == osMutexRecursive) {
 8011052:	69bb      	ldr	r3, [r7, #24]
 8011054:	f003 0301 	and.w	r3, r3, #1
 8011058:	2b00      	cmp	r3, #0
 801105a:	d002      	beq.n	8011062 <osMutexNew+0x3a>
      rmtx = 1U;
 801105c:	2301      	movs	r3, #1
 801105e:	617b      	str	r3, [r7, #20]
 8011060:	e001      	b.n	8011066 <osMutexNew+0x3e>
    } else {
      rmtx = 0U;
 8011062:	2300      	movs	r3, #0
 8011064:	617b      	str	r3, [r7, #20]
    }

    if ((type & osMutexRobust) != osMutexRobust) {
 8011066:	69bb      	ldr	r3, [r7, #24]
 8011068:	f003 0308 	and.w	r3, r3, #8
 801106c:	2b00      	cmp	r3, #0
 801106e:	d15c      	bne.n	801112a <osMutexNew+0x102>
      mem = -1;
 8011070:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8011074:	613b      	str	r3, [r7, #16]

      if (attr != NULL) {
 8011076:	687b      	ldr	r3, [r7, #4]
 8011078:	2b00      	cmp	r3, #0
 801107a:	d015      	beq.n	80110a8 <osMutexNew+0x80>
        if ((attr->cb_mem != NULL) && (attr->cb_size >= sizeof(StaticSemaphore_t))) {
 801107c:	687b      	ldr	r3, [r7, #4]
 801107e:	689b      	ldr	r3, [r3, #8]
 8011080:	2b00      	cmp	r3, #0
 8011082:	d006      	beq.n	8011092 <osMutexNew+0x6a>
 8011084:	687b      	ldr	r3, [r7, #4]
 8011086:	68db      	ldr	r3, [r3, #12]
 8011088:	2b4f      	cmp	r3, #79	@ 0x4f
 801108a:	d902      	bls.n	8011092 <osMutexNew+0x6a>
          mem = 1;
 801108c:	2301      	movs	r3, #1
 801108e:	613b      	str	r3, [r7, #16]
 8011090:	e00c      	b.n	80110ac <osMutexNew+0x84>
        }
        else {
          if ((attr->cb_mem == NULL) && (attr->cb_size == 0U)) {
 8011092:	687b      	ldr	r3, [r7, #4]
 8011094:	689b      	ldr	r3, [r3, #8]
 8011096:	2b00      	cmp	r3, #0
 8011098:	d108      	bne.n	80110ac <osMutexNew+0x84>
 801109a:	687b      	ldr	r3, [r7, #4]
 801109c:	68db      	ldr	r3, [r3, #12]
 801109e:	2b00      	cmp	r3, #0
 80110a0:	d104      	bne.n	80110ac <osMutexNew+0x84>
            mem = 0;
 80110a2:	2300      	movs	r3, #0
 80110a4:	613b      	str	r3, [r7, #16]
 80110a6:	e001      	b.n	80110ac <osMutexNew+0x84>
          }
        }
      }
      else {
        mem = 0;
 80110a8:	2300      	movs	r3, #0
 80110aa:	613b      	str	r3, [r7, #16]
      }

      if (mem == 1) {
 80110ac:	693b      	ldr	r3, [r7, #16]
 80110ae:	2b01      	cmp	r3, #1
 80110b0:	d112      	bne.n	80110d8 <osMutexNew+0xb0>
        #if (configSUPPORT_STATIC_ALLOCATION == 1)
          if (rmtx != 0U) {
 80110b2:	697b      	ldr	r3, [r7, #20]
 80110b4:	2b00      	cmp	r3, #0
 80110b6:	d007      	beq.n	80110c8 <osMutexNew+0xa0>
            #if (configUSE_RECURSIVE_MUTEXES == 1)
            hMutex = xSemaphoreCreateRecursiveMutexStatic (attr->cb_mem);
 80110b8:	687b      	ldr	r3, [r7, #4]
 80110ba:	689b      	ldr	r3, [r3, #8]
 80110bc:	4619      	mov	r1, r3
 80110be:	2004      	movs	r0, #4
 80110c0:	f000 fdd9 	bl	8011c76 <xQueueCreateMutexStatic>
 80110c4:	61f8      	str	r0, [r7, #28]
 80110c6:	e016      	b.n	80110f6 <osMutexNew+0xce>
            #endif
          }
          else {
            hMutex = xSemaphoreCreateMutexStatic (attr->cb_mem);
 80110c8:	687b      	ldr	r3, [r7, #4]
 80110ca:	689b      	ldr	r3, [r3, #8]
 80110cc:	4619      	mov	r1, r3
 80110ce:	2001      	movs	r0, #1
 80110d0:	f000 fdd1 	bl	8011c76 <xQueueCreateMutexStatic>
 80110d4:	61f8      	str	r0, [r7, #28]
 80110d6:	e00e      	b.n	80110f6 <osMutexNew+0xce>
          }
        #endif
      }
      else {
        if (mem == 0) {
 80110d8:	693b      	ldr	r3, [r7, #16]
 80110da:	2b00      	cmp	r3, #0
 80110dc:	d10b      	bne.n	80110f6 <osMutexNew+0xce>
          #if (configSUPPORT_DYNAMIC_ALLOCATION == 1)
            if (rmtx != 0U) {
 80110de:	697b      	ldr	r3, [r7, #20]
 80110e0:	2b00      	cmp	r3, #0
 80110e2:	d004      	beq.n	80110ee <osMutexNew+0xc6>
              #if (configUSE_RECURSIVE_MUTEXES == 1)
              hMutex = xSemaphoreCreateRecursiveMutex ();
 80110e4:	2004      	movs	r0, #4
 80110e6:	f000 fdae 	bl	8011c46 <xQueueCreateMutex>
 80110ea:	61f8      	str	r0, [r7, #28]
 80110ec:	e003      	b.n	80110f6 <osMutexNew+0xce>
              #endif
            } else {
              hMutex = xSemaphoreCreateMutex ();
 80110ee:	2001      	movs	r0, #1
 80110f0:	f000 fda9 	bl	8011c46 <xQueueCreateMutex>
 80110f4:	61f8      	str	r0, [r7, #28]
          #endif
        }
      }

      #if (configQUEUE_REGISTRY_SIZE > 0)
      if (hMutex != NULL) {
 80110f6:	69fb      	ldr	r3, [r7, #28]
 80110f8:	2b00      	cmp	r3, #0
 80110fa:	d00c      	beq.n	8011116 <osMutexNew+0xee>
        if (attr != NULL) {
 80110fc:	687b      	ldr	r3, [r7, #4]
 80110fe:	2b00      	cmp	r3, #0
 8011100:	d003      	beq.n	801110a <osMutexNew+0xe2>
          name = attr->name;
 8011102:	687b      	ldr	r3, [r7, #4]
 8011104:	681b      	ldr	r3, [r3, #0]
 8011106:	60fb      	str	r3, [r7, #12]
 8011108:	e001      	b.n	801110e <osMutexNew+0xe6>
        } else {
          name = NULL;
 801110a:	2300      	movs	r3, #0
 801110c:	60fb      	str	r3, [r7, #12]
        }
        vQueueAddToRegistry (hMutex, name);
 801110e:	68f9      	ldr	r1, [r7, #12]
 8011110:	69f8      	ldr	r0, [r7, #28]
 8011112:	f001 fcd3 	bl	8012abc <vQueueAddToRegistry>
      }
      #endif

      if ((hMutex != NULL) && (rmtx != 0U)) {
 8011116:	69fb      	ldr	r3, [r7, #28]
 8011118:	2b00      	cmp	r3, #0
 801111a:	d006      	beq.n	801112a <osMutexNew+0x102>
 801111c:	697b      	ldr	r3, [r7, #20]
 801111e:	2b00      	cmp	r3, #0
 8011120:	d003      	beq.n	801112a <osMutexNew+0x102>
        hMutex = (SemaphoreHandle_t)((uint32_t)hMutex | 1U);
 8011122:	69fb      	ldr	r3, [r7, #28]
 8011124:	f043 0301 	orr.w	r3, r3, #1
 8011128:	61fb      	str	r3, [r7, #28]
      }
    }
  }

  return ((osMutexId_t)hMutex);
 801112a:	69fb      	ldr	r3, [r7, #28]
}
 801112c:	4618      	mov	r0, r3
 801112e:	3720      	adds	r7, #32
 8011130:	46bd      	mov	sp, r7
 8011132:	bd80      	pop	{r7, pc}

08011134 <osMutexAcquire>:

osStatus_t osMutexAcquire (osMutexId_t mutex_id, uint32_t timeout) {
 8011134:	b580      	push	{r7, lr}
 8011136:	b086      	sub	sp, #24
 8011138:	af00      	add	r7, sp, #0
 801113a:	6078      	str	r0, [r7, #4]
 801113c:	6039      	str	r1, [r7, #0]
  SemaphoreHandle_t hMutex;
  osStatus_t stat;
  uint32_t rmtx;

  hMutex = (SemaphoreHandle_t)((uint32_t)mutex_id & ~1U);
 801113e:	687b      	ldr	r3, [r7, #4]
 8011140:	f023 0301 	bic.w	r3, r3, #1
 8011144:	613b      	str	r3, [r7, #16]

  rmtx = (uint32_t)mutex_id & 1U;
 8011146:	687b      	ldr	r3, [r7, #4]
 8011148:	f003 0301 	and.w	r3, r3, #1
 801114c:	60fb      	str	r3, [r7, #12]

  stat = osOK;
 801114e:	2300      	movs	r3, #0
 8011150:	617b      	str	r3, [r7, #20]
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 8011152:	f3ef 8305 	mrs	r3, IPSR
 8011156:	60bb      	str	r3, [r7, #8]
  return(result);
 8011158:	68bb      	ldr	r3, [r7, #8]

  if (IS_IRQ()) {
 801115a:	2b00      	cmp	r3, #0
 801115c:	d003      	beq.n	8011166 <osMutexAcquire+0x32>
    stat = osErrorISR;
 801115e:	f06f 0305 	mvn.w	r3, #5
 8011162:	617b      	str	r3, [r7, #20]
 8011164:	e02c      	b.n	80111c0 <osMutexAcquire+0x8c>
  }
  else if (hMutex == NULL) {
 8011166:	693b      	ldr	r3, [r7, #16]
 8011168:	2b00      	cmp	r3, #0
 801116a:	d103      	bne.n	8011174 <osMutexAcquire+0x40>
    stat = osErrorParameter;
 801116c:	f06f 0303 	mvn.w	r3, #3
 8011170:	617b      	str	r3, [r7, #20]
 8011172:	e025      	b.n	80111c0 <osMutexAcquire+0x8c>
  }
  else {
    if (rmtx != 0U) {
 8011174:	68fb      	ldr	r3, [r7, #12]
 8011176:	2b00      	cmp	r3, #0
 8011178:	d011      	beq.n	801119e <osMutexAcquire+0x6a>
      #if (configUSE_RECURSIVE_MUTEXES == 1)
      if (xSemaphoreTakeRecursive (hMutex, timeout) != pdPASS) {
 801117a:	6839      	ldr	r1, [r7, #0]
 801117c:	6938      	ldr	r0, [r7, #16]
 801117e:	f000 fdca 	bl	8011d16 <xQueueTakeMutexRecursive>
 8011182:	4603      	mov	r3, r0
 8011184:	2b01      	cmp	r3, #1
 8011186:	d01b      	beq.n	80111c0 <osMutexAcquire+0x8c>
        if (timeout != 0U) {
 8011188:	683b      	ldr	r3, [r7, #0]
 801118a:	2b00      	cmp	r3, #0
 801118c:	d003      	beq.n	8011196 <osMutexAcquire+0x62>
          stat = osErrorTimeout;
 801118e:	f06f 0301 	mvn.w	r3, #1
 8011192:	617b      	str	r3, [r7, #20]
 8011194:	e014      	b.n	80111c0 <osMutexAcquire+0x8c>
        } else {
          stat = osErrorResource;
 8011196:	f06f 0302 	mvn.w	r3, #2
 801119a:	617b      	str	r3, [r7, #20]
 801119c:	e010      	b.n	80111c0 <osMutexAcquire+0x8c>
        }
      }
      #endif
    }
    else {
      if (xSemaphoreTake (hMutex, timeout) != pdPASS) {
 801119e:	6839      	ldr	r1, [r7, #0]
 80111a0:	6938      	ldr	r0, [r7, #16]
 80111a2:	f001 f96f 	bl	8012484 <xQueueSemaphoreTake>
 80111a6:	4603      	mov	r3, r0
 80111a8:	2b01      	cmp	r3, #1
 80111aa:	d009      	beq.n	80111c0 <osMutexAcquire+0x8c>
        if (timeout != 0U) {
 80111ac:	683b      	ldr	r3, [r7, #0]
 80111ae:	2b00      	cmp	r3, #0
 80111b0:	d003      	beq.n	80111ba <osMutexAcquire+0x86>
          stat = osErrorTimeout;
 80111b2:	f06f 0301 	mvn.w	r3, #1
 80111b6:	617b      	str	r3, [r7, #20]
 80111b8:	e002      	b.n	80111c0 <osMutexAcquire+0x8c>
        } else {
          stat = osErrorResource;
 80111ba:	f06f 0302 	mvn.w	r3, #2
 80111be:	617b      	str	r3, [r7, #20]
        }
      }
    }
  }

  return (stat);
 80111c0:	697b      	ldr	r3, [r7, #20]
}
 80111c2:	4618      	mov	r0, r3
 80111c4:	3718      	adds	r7, #24
 80111c6:	46bd      	mov	sp, r7
 80111c8:	bd80      	pop	{r7, pc}

080111ca <osMutexRelease>:

osStatus_t osMutexRelease (osMutexId_t mutex_id) {
 80111ca:	b580      	push	{r7, lr}
 80111cc:	b086      	sub	sp, #24
 80111ce:	af00      	add	r7, sp, #0
 80111d0:	6078      	str	r0, [r7, #4]
  SemaphoreHandle_t hMutex;
  osStatus_t stat;
  uint32_t rmtx;

  hMutex = (SemaphoreHandle_t)((uint32_t)mutex_id & ~1U);
 80111d2:	687b      	ldr	r3, [r7, #4]
 80111d4:	f023 0301 	bic.w	r3, r3, #1
 80111d8:	613b      	str	r3, [r7, #16]

  rmtx = (uint32_t)mutex_id & 1U;
 80111da:	687b      	ldr	r3, [r7, #4]
 80111dc:	f003 0301 	and.w	r3, r3, #1
 80111e0:	60fb      	str	r3, [r7, #12]

  stat = osOK;
 80111e2:	2300      	movs	r3, #0
 80111e4:	617b      	str	r3, [r7, #20]
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 80111e6:	f3ef 8305 	mrs	r3, IPSR
 80111ea:	60bb      	str	r3, [r7, #8]
  return(result);
 80111ec:	68bb      	ldr	r3, [r7, #8]

  if (IS_IRQ()) {
 80111ee:	2b00      	cmp	r3, #0
 80111f0:	d003      	beq.n	80111fa <osMutexRelease+0x30>
    stat = osErrorISR;
 80111f2:	f06f 0305 	mvn.w	r3, #5
 80111f6:	617b      	str	r3, [r7, #20]
 80111f8:	e01f      	b.n	801123a <osMutexRelease+0x70>
  }
  else if (hMutex == NULL) {
 80111fa:	693b      	ldr	r3, [r7, #16]
 80111fc:	2b00      	cmp	r3, #0
 80111fe:	d103      	bne.n	8011208 <osMutexRelease+0x3e>
    stat = osErrorParameter;
 8011200:	f06f 0303 	mvn.w	r3, #3
 8011204:	617b      	str	r3, [r7, #20]
 8011206:	e018      	b.n	801123a <osMutexRelease+0x70>
  }
  else {
    if (rmtx != 0U) {
 8011208:	68fb      	ldr	r3, [r7, #12]
 801120a:	2b00      	cmp	r3, #0
 801120c:	d009      	beq.n	8011222 <osMutexRelease+0x58>
      #if (configUSE_RECURSIVE_MUTEXES == 1)
      if (xSemaphoreGiveRecursive (hMutex) != pdPASS) {
 801120e:	6938      	ldr	r0, [r7, #16]
 8011210:	f000 fd4c 	bl	8011cac <xQueueGiveMutexRecursive>
 8011214:	4603      	mov	r3, r0
 8011216:	2b01      	cmp	r3, #1
 8011218:	d00f      	beq.n	801123a <osMutexRelease+0x70>
        stat = osErrorResource;
 801121a:	f06f 0302 	mvn.w	r3, #2
 801121e:	617b      	str	r3, [r7, #20]
 8011220:	e00b      	b.n	801123a <osMutexRelease+0x70>
      }
      #endif
    }
    else {
      if (xSemaphoreGive (hMutex) != pdPASS) {
 8011222:	2300      	movs	r3, #0
 8011224:	2200      	movs	r2, #0
 8011226:	2100      	movs	r1, #0
 8011228:	6938      	ldr	r0, [r7, #16]
 801122a:	f000 fe19 	bl	8011e60 <xQueueGenericSend>
 801122e:	4603      	mov	r3, r0
 8011230:	2b01      	cmp	r3, #1
 8011232:	d002      	beq.n	801123a <osMutexRelease+0x70>
        stat = osErrorResource;
 8011234:	f06f 0302 	mvn.w	r3, #2
 8011238:	617b      	str	r3, [r7, #20]
      }
    }
  }

  return (stat);
 801123a:	697b      	ldr	r3, [r7, #20]
}
 801123c:	4618      	mov	r0, r3
 801123e:	3718      	adds	r7, #24
 8011240:	46bd      	mov	sp, r7
 8011242:	bd80      	pop	{r7, pc}

08011244 <osSemaphoreNew>:
}
#endif /* (configUSE_OS2_MUTEX == 1) */

/*---------------------------------------------------------------------------*/

osSemaphoreId_t osSemaphoreNew (uint32_t max_count, uint32_t initial_count, const osSemaphoreAttr_t *attr) {
 8011244:	b580      	push	{r7, lr}
 8011246:	b08a      	sub	sp, #40	@ 0x28
 8011248:	af02      	add	r7, sp, #8
 801124a:	60f8      	str	r0, [r7, #12]
 801124c:	60b9      	str	r1, [r7, #8]
 801124e:	607a      	str	r2, [r7, #4]
  int32_t mem;
  #if (configQUEUE_REGISTRY_SIZE > 0)
  const char *name;
  #endif

  hSemaphore = NULL;
 8011250:	2300      	movs	r3, #0
 8011252:	61fb      	str	r3, [r7, #28]
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 8011254:	f3ef 8305 	mrs	r3, IPSR
 8011258:	613b      	str	r3, [r7, #16]
  return(result);
 801125a:	693b      	ldr	r3, [r7, #16]

  if (!IS_IRQ() && (max_count > 0U) && (initial_count <= max_count)) {
 801125c:	2b00      	cmp	r3, #0
 801125e:	d175      	bne.n	801134c <osSemaphoreNew+0x108>
 8011260:	68fb      	ldr	r3, [r7, #12]
 8011262:	2b00      	cmp	r3, #0
 8011264:	d072      	beq.n	801134c <osSemaphoreNew+0x108>
 8011266:	68ba      	ldr	r2, [r7, #8]
 8011268:	68fb      	ldr	r3, [r7, #12]
 801126a:	429a      	cmp	r2, r3
 801126c:	d86e      	bhi.n	801134c <osSemaphoreNew+0x108>
    mem = -1;
 801126e:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8011272:	61bb      	str	r3, [r7, #24]

    if (attr != NULL) {
 8011274:	687b      	ldr	r3, [r7, #4]
 8011276:	2b00      	cmp	r3, #0
 8011278:	d015      	beq.n	80112a6 <osSemaphoreNew+0x62>
      if ((attr->cb_mem != NULL) && (attr->cb_size >= sizeof(StaticSemaphore_t))) {
 801127a:	687b      	ldr	r3, [r7, #4]
 801127c:	689b      	ldr	r3, [r3, #8]
 801127e:	2b00      	cmp	r3, #0
 8011280:	d006      	beq.n	8011290 <osSemaphoreNew+0x4c>
 8011282:	687b      	ldr	r3, [r7, #4]
 8011284:	68db      	ldr	r3, [r3, #12]
 8011286:	2b4f      	cmp	r3, #79	@ 0x4f
 8011288:	d902      	bls.n	8011290 <osSemaphoreNew+0x4c>
        mem = 1;
 801128a:	2301      	movs	r3, #1
 801128c:	61bb      	str	r3, [r7, #24]
 801128e:	e00c      	b.n	80112aa <osSemaphoreNew+0x66>
      }
      else {
        if ((attr->cb_mem == NULL) && (attr->cb_size == 0U)) {
 8011290:	687b      	ldr	r3, [r7, #4]
 8011292:	689b      	ldr	r3, [r3, #8]
 8011294:	2b00      	cmp	r3, #0
 8011296:	d108      	bne.n	80112aa <osSemaphoreNew+0x66>
 8011298:	687b      	ldr	r3, [r7, #4]
 801129a:	68db      	ldr	r3, [r3, #12]
 801129c:	2b00      	cmp	r3, #0
 801129e:	d104      	bne.n	80112aa <osSemaphoreNew+0x66>
          mem = 0;
 80112a0:	2300      	movs	r3, #0
 80112a2:	61bb      	str	r3, [r7, #24]
 80112a4:	e001      	b.n	80112aa <osSemaphoreNew+0x66>
        }
      }
    }
    else {
      mem = 0;
 80112a6:	2300      	movs	r3, #0
 80112a8:	61bb      	str	r3, [r7, #24]
    }

    if (mem != -1) {
 80112aa:	69bb      	ldr	r3, [r7, #24]
 80112ac:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 80112b0:	d04c      	beq.n	801134c <osSemaphoreNew+0x108>
      if (max_count == 1U) {
 80112b2:	68fb      	ldr	r3, [r7, #12]
 80112b4:	2b01      	cmp	r3, #1
 80112b6:	d128      	bne.n	801130a <osSemaphoreNew+0xc6>
        if (mem == 1) {
 80112b8:	69bb      	ldr	r3, [r7, #24]
 80112ba:	2b01      	cmp	r3, #1
 80112bc:	d10a      	bne.n	80112d4 <osSemaphoreNew+0x90>
          #if (configSUPPORT_STATIC_ALLOCATION == 1)
            hSemaphore = xSemaphoreCreateBinaryStatic ((StaticSemaphore_t *)attr->cb_mem);
 80112be:	687b      	ldr	r3, [r7, #4]
 80112c0:	689b      	ldr	r3, [r3, #8]
 80112c2:	2203      	movs	r2, #3
 80112c4:	9200      	str	r2, [sp, #0]
 80112c6:	2200      	movs	r2, #0
 80112c8:	2100      	movs	r1, #0
 80112ca:	2001      	movs	r0, #1
 80112cc:	f000 fbc6 	bl	8011a5c <xQueueGenericCreateStatic>
 80112d0:	61f8      	str	r0, [r7, #28]
 80112d2:	e005      	b.n	80112e0 <osSemaphoreNew+0x9c>
          #endif
        }
        else {
          #if (configSUPPORT_DYNAMIC_ALLOCATION == 1)
            hSemaphore = xSemaphoreCreateBinary();
 80112d4:	2203      	movs	r2, #3
 80112d6:	2100      	movs	r1, #0
 80112d8:	2001      	movs	r0, #1
 80112da:	f000 fc3c 	bl	8011b56 <xQueueGenericCreate>
 80112de:	61f8      	str	r0, [r7, #28]
          #endif
        }

        if ((hSemaphore != NULL) && (initial_count != 0U)) {
 80112e0:	69fb      	ldr	r3, [r7, #28]
 80112e2:	2b00      	cmp	r3, #0
 80112e4:	d022      	beq.n	801132c <osSemaphoreNew+0xe8>
 80112e6:	68bb      	ldr	r3, [r7, #8]
 80112e8:	2b00      	cmp	r3, #0
 80112ea:	d01f      	beq.n	801132c <osSemaphoreNew+0xe8>
          if (xSemaphoreGive (hSemaphore) != pdPASS) {
 80112ec:	2300      	movs	r3, #0
 80112ee:	2200      	movs	r2, #0
 80112f0:	2100      	movs	r1, #0
 80112f2:	69f8      	ldr	r0, [r7, #28]
 80112f4:	f000 fdb4 	bl	8011e60 <xQueueGenericSend>
 80112f8:	4603      	mov	r3, r0
 80112fa:	2b01      	cmp	r3, #1
 80112fc:	d016      	beq.n	801132c <osSemaphoreNew+0xe8>
            vSemaphoreDelete (hSemaphore);
 80112fe:	69f8      	ldr	r0, [r7, #28]
 8011300:	f001 fa90 	bl	8012824 <vQueueDelete>
            hSemaphore = NULL;
 8011304:	2300      	movs	r3, #0
 8011306:	61fb      	str	r3, [r7, #28]
 8011308:	e010      	b.n	801132c <osSemaphoreNew+0xe8>
          }
        }
      }
      else {
        if (mem == 1) {
 801130a:	69bb      	ldr	r3, [r7, #24]
 801130c:	2b01      	cmp	r3, #1
 801130e:	d108      	bne.n	8011322 <osSemaphoreNew+0xde>
          #if (configSUPPORT_STATIC_ALLOCATION == 1)
            hSemaphore = xSemaphoreCreateCountingStatic (max_count, initial_count, (StaticSemaphore_t *)attr->cb_mem);
 8011310:	687b      	ldr	r3, [r7, #4]
 8011312:	689b      	ldr	r3, [r3, #8]
 8011314:	461a      	mov	r2, r3
 8011316:	68b9      	ldr	r1, [r7, #8]
 8011318:	68f8      	ldr	r0, [r7, #12]
 801131a:	f000 fd33 	bl	8011d84 <xQueueCreateCountingSemaphoreStatic>
 801131e:	61f8      	str	r0, [r7, #28]
 8011320:	e004      	b.n	801132c <osSemaphoreNew+0xe8>
          #endif
        }
        else {
          #if (configSUPPORT_DYNAMIC_ALLOCATION == 1)
            hSemaphore = xSemaphoreCreateCounting (max_count, initial_count);
 8011322:	68b9      	ldr	r1, [r7, #8]
 8011324:	68f8      	ldr	r0, [r7, #12]
 8011326:	f000 fd66 	bl	8011df6 <xQueueCreateCountingSemaphore>
 801132a:	61f8      	str	r0, [r7, #28]
          #endif
        }
      }
      
      #if (configQUEUE_REGISTRY_SIZE > 0)
      if (hSemaphore != NULL) {
 801132c:	69fb      	ldr	r3, [r7, #28]
 801132e:	2b00      	cmp	r3, #0
 8011330:	d00c      	beq.n	801134c <osSemaphoreNew+0x108>
        if (attr != NULL) {
 8011332:	687b      	ldr	r3, [r7, #4]
 8011334:	2b00      	cmp	r3, #0
 8011336:	d003      	beq.n	8011340 <osSemaphoreNew+0xfc>
          name = attr->name;
 8011338:	687b      	ldr	r3, [r7, #4]
 801133a:	681b      	ldr	r3, [r3, #0]
 801133c:	617b      	str	r3, [r7, #20]
 801133e:	e001      	b.n	8011344 <osSemaphoreNew+0x100>
        } else {
          name = NULL;
 8011340:	2300      	movs	r3, #0
 8011342:	617b      	str	r3, [r7, #20]
        }
        vQueueAddToRegistry (hSemaphore, name);
 8011344:	6979      	ldr	r1, [r7, #20]
 8011346:	69f8      	ldr	r0, [r7, #28]
 8011348:	f001 fbb8 	bl	8012abc <vQueueAddToRegistry>
      }
      #endif
    }
  }

  return ((osSemaphoreId_t)hSemaphore);
 801134c:	69fb      	ldr	r3, [r7, #28]
}
 801134e:	4618      	mov	r0, r3
 8011350:	3720      	adds	r7, #32
 8011352:	46bd      	mov	sp, r7
 8011354:	bd80      	pop	{r7, pc}
	...

08011358 <osSemaphoreAcquire>:

osStatus_t osSemaphoreAcquire (osSemaphoreId_t semaphore_id, uint32_t timeout) {
 8011358:	b580      	push	{r7, lr}
 801135a:	b086      	sub	sp, #24
 801135c:	af00      	add	r7, sp, #0
 801135e:	6078      	str	r0, [r7, #4]
 8011360:	6039      	str	r1, [r7, #0]
  SemaphoreHandle_t hSemaphore = (SemaphoreHandle_t)semaphore_id;
 8011362:	687b      	ldr	r3, [r7, #4]
 8011364:	613b      	str	r3, [r7, #16]
  osStatus_t stat;
  BaseType_t yield;

  stat = osOK;
 8011366:	2300      	movs	r3, #0
 8011368:	617b      	str	r3, [r7, #20]

  if (hSemaphore == NULL) {
 801136a:	693b      	ldr	r3, [r7, #16]
 801136c:	2b00      	cmp	r3, #0
 801136e:	d103      	bne.n	8011378 <osSemaphoreAcquire+0x20>
    stat = osErrorParameter;
 8011370:	f06f 0303 	mvn.w	r3, #3
 8011374:	617b      	str	r3, [r7, #20]
 8011376:	e039      	b.n	80113ec <osSemaphoreAcquire+0x94>
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 8011378:	f3ef 8305 	mrs	r3, IPSR
 801137c:	60fb      	str	r3, [r7, #12]
  return(result);
 801137e:	68fb      	ldr	r3, [r7, #12]
  }
  else if (IS_IRQ()) {
 8011380:	2b00      	cmp	r3, #0
 8011382:	d022      	beq.n	80113ca <osSemaphoreAcquire+0x72>
    if (timeout != 0U) {
 8011384:	683b      	ldr	r3, [r7, #0]
 8011386:	2b00      	cmp	r3, #0
 8011388:	d003      	beq.n	8011392 <osSemaphoreAcquire+0x3a>
      stat = osErrorParameter;
 801138a:	f06f 0303 	mvn.w	r3, #3
 801138e:	617b      	str	r3, [r7, #20]
 8011390:	e02c      	b.n	80113ec <osSemaphoreAcquire+0x94>
    }
    else {
      yield = pdFALSE;
 8011392:	2300      	movs	r3, #0
 8011394:	60bb      	str	r3, [r7, #8]

      if (xSemaphoreTakeFromISR (hSemaphore, &yield) != pdPASS) {
 8011396:	f107 0308 	add.w	r3, r7, #8
 801139a:	461a      	mov	r2, r3
 801139c:	2100      	movs	r1, #0
 801139e:	6938      	ldr	r0, [r7, #16]
 80113a0:	f001 f980 	bl	80126a4 <xQueueReceiveFromISR>
 80113a4:	4603      	mov	r3, r0
 80113a6:	2b01      	cmp	r3, #1
 80113a8:	d003      	beq.n	80113b2 <osSemaphoreAcquire+0x5a>
        stat = osErrorResource;
 80113aa:	f06f 0302 	mvn.w	r3, #2
 80113ae:	617b      	str	r3, [r7, #20]
 80113b0:	e01c      	b.n	80113ec <osSemaphoreAcquire+0x94>
      } else {
        portYIELD_FROM_ISR (yield);
 80113b2:	68bb      	ldr	r3, [r7, #8]
 80113b4:	2b00      	cmp	r3, #0
 80113b6:	d019      	beq.n	80113ec <osSemaphoreAcquire+0x94>
 80113b8:	4b0f      	ldr	r3, [pc, #60]	@ (80113f8 <osSemaphoreAcquire+0xa0>)
 80113ba:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 80113be:	601a      	str	r2, [r3, #0]
 80113c0:	f3bf 8f4f 	dsb	sy
 80113c4:	f3bf 8f6f 	isb	sy
 80113c8:	e010      	b.n	80113ec <osSemaphoreAcquire+0x94>
      }
    }
  }
  else {
    if (xSemaphoreTake (hSemaphore, (TickType_t)timeout) != pdPASS) {
 80113ca:	6839      	ldr	r1, [r7, #0]
 80113cc:	6938      	ldr	r0, [r7, #16]
 80113ce:	f001 f859 	bl	8012484 <xQueueSemaphoreTake>
 80113d2:	4603      	mov	r3, r0
 80113d4:	2b01      	cmp	r3, #1
 80113d6:	d009      	beq.n	80113ec <osSemaphoreAcquire+0x94>
      if (timeout != 0U) {
 80113d8:	683b      	ldr	r3, [r7, #0]
 80113da:	2b00      	cmp	r3, #0
 80113dc:	d003      	beq.n	80113e6 <osSemaphoreAcquire+0x8e>
        stat = osErrorTimeout;
 80113de:	f06f 0301 	mvn.w	r3, #1
 80113e2:	617b      	str	r3, [r7, #20]
 80113e4:	e002      	b.n	80113ec <osSemaphoreAcquire+0x94>
      } else {
        stat = osErrorResource;
 80113e6:	f06f 0302 	mvn.w	r3, #2
 80113ea:	617b      	str	r3, [r7, #20]
      }
    }
  }

  return (stat);
 80113ec:	697b      	ldr	r3, [r7, #20]
}
 80113ee:	4618      	mov	r0, r3
 80113f0:	3718      	adds	r7, #24
 80113f2:	46bd      	mov	sp, r7
 80113f4:	bd80      	pop	{r7, pc}
 80113f6:	bf00      	nop
 80113f8:	e000ed04 	.word	0xe000ed04

080113fc <osSemaphoreRelease>:

osStatus_t osSemaphoreRelease (osSemaphoreId_t semaphore_id) {
 80113fc:	b580      	push	{r7, lr}
 80113fe:	b086      	sub	sp, #24
 8011400:	af00      	add	r7, sp, #0
 8011402:	6078      	str	r0, [r7, #4]
  SemaphoreHandle_t hSemaphore = (SemaphoreHandle_t)semaphore_id;
 8011404:	687b      	ldr	r3, [r7, #4]
 8011406:	613b      	str	r3, [r7, #16]
  osStatus_t stat;
  BaseType_t yield;

  stat = osOK;
 8011408:	2300      	movs	r3, #0
 801140a:	617b      	str	r3, [r7, #20]

  if (hSemaphore == NULL) {
 801140c:	693b      	ldr	r3, [r7, #16]
 801140e:	2b00      	cmp	r3, #0
 8011410:	d103      	bne.n	801141a <osSemaphoreRelease+0x1e>
    stat = osErrorParameter;
 8011412:	f06f 0303 	mvn.w	r3, #3
 8011416:	617b      	str	r3, [r7, #20]
 8011418:	e02c      	b.n	8011474 <osSemaphoreRelease+0x78>
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 801141a:	f3ef 8305 	mrs	r3, IPSR
 801141e:	60fb      	str	r3, [r7, #12]
  return(result);
 8011420:	68fb      	ldr	r3, [r7, #12]
  }
  else if (IS_IRQ()) {
 8011422:	2b00      	cmp	r3, #0
 8011424:	d01a      	beq.n	801145c <osSemaphoreRelease+0x60>
    yield = pdFALSE;
 8011426:	2300      	movs	r3, #0
 8011428:	60bb      	str	r3, [r7, #8]

    if (xSemaphoreGiveFromISR (hSemaphore, &yield) != pdTRUE) {
 801142a:	f107 0308 	add.w	r3, r7, #8
 801142e:	4619      	mov	r1, r3
 8011430:	6938      	ldr	r0, [r7, #16]
 8011432:	f000 feb5 	bl	80121a0 <xQueueGiveFromISR>
 8011436:	4603      	mov	r3, r0
 8011438:	2b01      	cmp	r3, #1
 801143a:	d003      	beq.n	8011444 <osSemaphoreRelease+0x48>
      stat = osErrorResource;
 801143c:	f06f 0302 	mvn.w	r3, #2
 8011440:	617b      	str	r3, [r7, #20]
 8011442:	e017      	b.n	8011474 <osSemaphoreRelease+0x78>
    } else {
      portYIELD_FROM_ISR (yield);
 8011444:	68bb      	ldr	r3, [r7, #8]
 8011446:	2b00      	cmp	r3, #0
 8011448:	d014      	beq.n	8011474 <osSemaphoreRelease+0x78>
 801144a:	4b0d      	ldr	r3, [pc, #52]	@ (8011480 <osSemaphoreRelease+0x84>)
 801144c:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8011450:	601a      	str	r2, [r3, #0]
 8011452:	f3bf 8f4f 	dsb	sy
 8011456:	f3bf 8f6f 	isb	sy
 801145a:	e00b      	b.n	8011474 <osSemaphoreRelease+0x78>
    }
  }
  else {
    if (xSemaphoreGive (hSemaphore) != pdPASS) {
 801145c:	2300      	movs	r3, #0
 801145e:	2200      	movs	r2, #0
 8011460:	2100      	movs	r1, #0
 8011462:	6938      	ldr	r0, [r7, #16]
 8011464:	f000 fcfc 	bl	8011e60 <xQueueGenericSend>
 8011468:	4603      	mov	r3, r0
 801146a:	2b01      	cmp	r3, #1
 801146c:	d002      	beq.n	8011474 <osSemaphoreRelease+0x78>
      stat = osErrorResource;
 801146e:	f06f 0302 	mvn.w	r3, #2
 8011472:	617b      	str	r3, [r7, #20]
    }
  }

  return (stat);
 8011474:	697b      	ldr	r3, [r7, #20]
}
 8011476:	4618      	mov	r0, r3
 8011478:	3718      	adds	r7, #24
 801147a:	46bd      	mov	sp, r7
 801147c:	bd80      	pop	{r7, pc}
 801147e:	bf00      	nop
 8011480:	e000ed04 	.word	0xe000ed04

08011484 <osSemaphoreDelete>:
  }

  return (count);
}

osStatus_t osSemaphoreDelete (osSemaphoreId_t semaphore_id) {
 8011484:	b580      	push	{r7, lr}
 8011486:	b086      	sub	sp, #24
 8011488:	af00      	add	r7, sp, #0
 801148a:	6078      	str	r0, [r7, #4]
  SemaphoreHandle_t hSemaphore = (SemaphoreHandle_t)semaphore_id;
 801148c:	687b      	ldr	r3, [r7, #4]
 801148e:	613b      	str	r3, [r7, #16]
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 8011490:	f3ef 8305 	mrs	r3, IPSR
 8011494:	60fb      	str	r3, [r7, #12]
  return(result);
 8011496:	68fb      	ldr	r3, [r7, #12]
  osStatus_t stat;

#ifndef USE_FreeRTOS_HEAP_1
  if (IS_IRQ()) {
 8011498:	2b00      	cmp	r3, #0
 801149a:	d003      	beq.n	80114a4 <osSemaphoreDelete+0x20>
    stat = osErrorISR;
 801149c:	f06f 0305 	mvn.w	r3, #5
 80114a0:	617b      	str	r3, [r7, #20]
 80114a2:	e00e      	b.n	80114c2 <osSemaphoreDelete+0x3e>
  }
  else if (hSemaphore == NULL) {
 80114a4:	693b      	ldr	r3, [r7, #16]
 80114a6:	2b00      	cmp	r3, #0
 80114a8:	d103      	bne.n	80114b2 <osSemaphoreDelete+0x2e>
    stat = osErrorParameter;
 80114aa:	f06f 0303 	mvn.w	r3, #3
 80114ae:	617b      	str	r3, [r7, #20]
 80114b0:	e007      	b.n	80114c2 <osSemaphoreDelete+0x3e>
  }
  else {
    #if (configQUEUE_REGISTRY_SIZE > 0)
    vQueueUnregisterQueue (hSemaphore);
 80114b2:	6938      	ldr	r0, [r7, #16]
 80114b4:	f001 fb2c 	bl	8012b10 <vQueueUnregisterQueue>
    #endif

    stat = osOK;
 80114b8:	2300      	movs	r3, #0
 80114ba:	617b      	str	r3, [r7, #20]
    vSemaphoreDelete (hSemaphore);
 80114bc:	6938      	ldr	r0, [r7, #16]
 80114be:	f001 f9b1 	bl	8012824 <vQueueDelete>
  }
#else
  stat = osError;
#endif

  return (stat);
 80114c2:	697b      	ldr	r3, [r7, #20]
}
 80114c4:	4618      	mov	r0, r3
 80114c6:	3718      	adds	r7, #24
 80114c8:	46bd      	mov	sp, r7
 80114ca:	bd80      	pop	{r7, pc}

080114cc <osMessageQueueNew>:

/*---------------------------------------------------------------------------*/

osMessageQueueId_t osMessageQueueNew (uint32_t msg_count, uint32_t msg_size, const osMessageQueueAttr_t *attr) {
 80114cc:	b580      	push	{r7, lr}
 80114ce:	b08a      	sub	sp, #40	@ 0x28
 80114d0:	af02      	add	r7, sp, #8
 80114d2:	60f8      	str	r0, [r7, #12]
 80114d4:	60b9      	str	r1, [r7, #8]
 80114d6:	607a      	str	r2, [r7, #4]
  int32_t mem;
  #if (configQUEUE_REGISTRY_SIZE > 0)
  const char *name;
  #endif

  hQueue = NULL;
 80114d8:	2300      	movs	r3, #0
 80114da:	61fb      	str	r3, [r7, #28]
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 80114dc:	f3ef 8305 	mrs	r3, IPSR
 80114e0:	613b      	str	r3, [r7, #16]
  return(result);
 80114e2:	693b      	ldr	r3, [r7, #16]

  if (!IS_IRQ() && (msg_count > 0U) && (msg_size > 0U)) {
 80114e4:	2b00      	cmp	r3, #0
 80114e6:	d15f      	bne.n	80115a8 <osMessageQueueNew+0xdc>
 80114e8:	68fb      	ldr	r3, [r7, #12]
 80114ea:	2b00      	cmp	r3, #0
 80114ec:	d05c      	beq.n	80115a8 <osMessageQueueNew+0xdc>
 80114ee:	68bb      	ldr	r3, [r7, #8]
 80114f0:	2b00      	cmp	r3, #0
 80114f2:	d059      	beq.n	80115a8 <osMessageQueueNew+0xdc>
    mem = -1;
 80114f4:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80114f8:	61bb      	str	r3, [r7, #24]

    if (attr != NULL) {
 80114fa:	687b      	ldr	r3, [r7, #4]
 80114fc:	2b00      	cmp	r3, #0
 80114fe:	d029      	beq.n	8011554 <osMessageQueueNew+0x88>
      if ((attr->cb_mem != NULL) && (attr->cb_size >= sizeof(StaticQueue_t)) &&
 8011500:	687b      	ldr	r3, [r7, #4]
 8011502:	689b      	ldr	r3, [r3, #8]
 8011504:	2b00      	cmp	r3, #0
 8011506:	d012      	beq.n	801152e <osMessageQueueNew+0x62>
 8011508:	687b      	ldr	r3, [r7, #4]
 801150a:	68db      	ldr	r3, [r3, #12]
 801150c:	2b4f      	cmp	r3, #79	@ 0x4f
 801150e:	d90e      	bls.n	801152e <osMessageQueueNew+0x62>
          (attr->mq_mem != NULL) && (attr->mq_size >= (msg_count * msg_size))) {
 8011510:	687b      	ldr	r3, [r7, #4]
 8011512:	691b      	ldr	r3, [r3, #16]
      if ((attr->cb_mem != NULL) && (attr->cb_size >= sizeof(StaticQueue_t)) &&
 8011514:	2b00      	cmp	r3, #0
 8011516:	d00a      	beq.n	801152e <osMessageQueueNew+0x62>
          (attr->mq_mem != NULL) && (attr->mq_size >= (msg_count * msg_size))) {
 8011518:	687b      	ldr	r3, [r7, #4]
 801151a:	695a      	ldr	r2, [r3, #20]
 801151c:	68fb      	ldr	r3, [r7, #12]
 801151e:	68b9      	ldr	r1, [r7, #8]
 8011520:	fb01 f303 	mul.w	r3, r1, r3
 8011524:	429a      	cmp	r2, r3
 8011526:	d302      	bcc.n	801152e <osMessageQueueNew+0x62>
        mem = 1;
 8011528:	2301      	movs	r3, #1
 801152a:	61bb      	str	r3, [r7, #24]
 801152c:	e014      	b.n	8011558 <osMessageQueueNew+0x8c>
      }
      else {
        if ((attr->cb_mem == NULL) && (attr->cb_size == 0U) &&
 801152e:	687b      	ldr	r3, [r7, #4]
 8011530:	689b      	ldr	r3, [r3, #8]
 8011532:	2b00      	cmp	r3, #0
 8011534:	d110      	bne.n	8011558 <osMessageQueueNew+0x8c>
 8011536:	687b      	ldr	r3, [r7, #4]
 8011538:	68db      	ldr	r3, [r3, #12]
 801153a:	2b00      	cmp	r3, #0
 801153c:	d10c      	bne.n	8011558 <osMessageQueueNew+0x8c>
            (attr->mq_mem == NULL) && (attr->mq_size == 0U)) {
 801153e:	687b      	ldr	r3, [r7, #4]
 8011540:	691b      	ldr	r3, [r3, #16]
        if ((attr->cb_mem == NULL) && (attr->cb_size == 0U) &&
 8011542:	2b00      	cmp	r3, #0
 8011544:	d108      	bne.n	8011558 <osMessageQueueNew+0x8c>
            (attr->mq_mem == NULL) && (attr->mq_size == 0U)) {
 8011546:	687b      	ldr	r3, [r7, #4]
 8011548:	695b      	ldr	r3, [r3, #20]
 801154a:	2b00      	cmp	r3, #0
 801154c:	d104      	bne.n	8011558 <osMessageQueueNew+0x8c>
          mem = 0;
 801154e:	2300      	movs	r3, #0
 8011550:	61bb      	str	r3, [r7, #24]
 8011552:	e001      	b.n	8011558 <osMessageQueueNew+0x8c>
        }
      }
    }
    else {
      mem = 0;
 8011554:	2300      	movs	r3, #0
 8011556:	61bb      	str	r3, [r7, #24]
    }

    if (mem == 1) {
 8011558:	69bb      	ldr	r3, [r7, #24]
 801155a:	2b01      	cmp	r3, #1
 801155c:	d10b      	bne.n	8011576 <osMessageQueueNew+0xaa>
      #if (configSUPPORT_STATIC_ALLOCATION == 1)
        hQueue = xQueueCreateStatic (msg_count, msg_size, attr->mq_mem, attr->cb_mem);
 801155e:	687b      	ldr	r3, [r7, #4]
 8011560:	691a      	ldr	r2, [r3, #16]
 8011562:	687b      	ldr	r3, [r7, #4]
 8011564:	689b      	ldr	r3, [r3, #8]
 8011566:	2100      	movs	r1, #0
 8011568:	9100      	str	r1, [sp, #0]
 801156a:	68b9      	ldr	r1, [r7, #8]
 801156c:	68f8      	ldr	r0, [r7, #12]
 801156e:	f000 fa75 	bl	8011a5c <xQueueGenericCreateStatic>
 8011572:	61f8      	str	r0, [r7, #28]
 8011574:	e008      	b.n	8011588 <osMessageQueueNew+0xbc>
      #endif
    }
    else {
      if (mem == 0) {
 8011576:	69bb      	ldr	r3, [r7, #24]
 8011578:	2b00      	cmp	r3, #0
 801157a:	d105      	bne.n	8011588 <osMessageQueueNew+0xbc>
        #if (configSUPPORT_DYNAMIC_ALLOCATION == 1)
          hQueue = xQueueCreate (msg_count, msg_size);
 801157c:	2200      	movs	r2, #0
 801157e:	68b9      	ldr	r1, [r7, #8]
 8011580:	68f8      	ldr	r0, [r7, #12]
 8011582:	f000 fae8 	bl	8011b56 <xQueueGenericCreate>
 8011586:	61f8      	str	r0, [r7, #28]
        #endif
      }
    }

    #if (configQUEUE_REGISTRY_SIZE > 0)
    if (hQueue != NULL) {
 8011588:	69fb      	ldr	r3, [r7, #28]
 801158a:	2b00      	cmp	r3, #0
 801158c:	d00c      	beq.n	80115a8 <osMessageQueueNew+0xdc>
      if (attr != NULL) {
 801158e:	687b      	ldr	r3, [r7, #4]
 8011590:	2b00      	cmp	r3, #0
 8011592:	d003      	beq.n	801159c <osMessageQueueNew+0xd0>
        name = attr->name;
 8011594:	687b      	ldr	r3, [r7, #4]
 8011596:	681b      	ldr	r3, [r3, #0]
 8011598:	617b      	str	r3, [r7, #20]
 801159a:	e001      	b.n	80115a0 <osMessageQueueNew+0xd4>
      } else {
        name = NULL;
 801159c:	2300      	movs	r3, #0
 801159e:	617b      	str	r3, [r7, #20]
      }
      vQueueAddToRegistry (hQueue, name);
 80115a0:	6979      	ldr	r1, [r7, #20]
 80115a2:	69f8      	ldr	r0, [r7, #28]
 80115a4:	f001 fa8a 	bl	8012abc <vQueueAddToRegistry>
    }
    #endif

  }

  return ((osMessageQueueId_t)hQueue);
 80115a8:	69fb      	ldr	r3, [r7, #28]
}
 80115aa:	4618      	mov	r0, r3
 80115ac:	3720      	adds	r7, #32
 80115ae:	46bd      	mov	sp, r7
 80115b0:	bd80      	pop	{r7, pc}
	...

080115b4 <osMessageQueuePut>:

osStatus_t osMessageQueuePut (osMessageQueueId_t mq_id, const void *msg_ptr, uint8_t msg_prio, uint32_t timeout) {
 80115b4:	b580      	push	{r7, lr}
 80115b6:	b088      	sub	sp, #32
 80115b8:	af00      	add	r7, sp, #0
 80115ba:	60f8      	str	r0, [r7, #12]
 80115bc:	60b9      	str	r1, [r7, #8]
 80115be:	603b      	str	r3, [r7, #0]
 80115c0:	4613      	mov	r3, r2
 80115c2:	71fb      	strb	r3, [r7, #7]
  QueueHandle_t hQueue = (QueueHandle_t)mq_id;
 80115c4:	68fb      	ldr	r3, [r7, #12]
 80115c6:	61bb      	str	r3, [r7, #24]
  osStatus_t stat;
  BaseType_t yield;

  (void)msg_prio; /* Message priority is ignored */

  stat = osOK;
 80115c8:	2300      	movs	r3, #0
 80115ca:	61fb      	str	r3, [r7, #28]
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 80115cc:	f3ef 8305 	mrs	r3, IPSR
 80115d0:	617b      	str	r3, [r7, #20]
  return(result);
 80115d2:	697b      	ldr	r3, [r7, #20]

  if (IS_IRQ()) {
 80115d4:	2b00      	cmp	r3, #0
 80115d6:	d028      	beq.n	801162a <osMessageQueuePut+0x76>
    if ((hQueue == NULL) || (msg_ptr == NULL) || (timeout != 0U)) {
 80115d8:	69bb      	ldr	r3, [r7, #24]
 80115da:	2b00      	cmp	r3, #0
 80115dc:	d005      	beq.n	80115ea <osMessageQueuePut+0x36>
 80115de:	68bb      	ldr	r3, [r7, #8]
 80115e0:	2b00      	cmp	r3, #0
 80115e2:	d002      	beq.n	80115ea <osMessageQueuePut+0x36>
 80115e4:	683b      	ldr	r3, [r7, #0]
 80115e6:	2b00      	cmp	r3, #0
 80115e8:	d003      	beq.n	80115f2 <osMessageQueuePut+0x3e>
      stat = osErrorParameter;
 80115ea:	f06f 0303 	mvn.w	r3, #3
 80115ee:	61fb      	str	r3, [r7, #28]
 80115f0:	e038      	b.n	8011664 <osMessageQueuePut+0xb0>
    }
    else {
      yield = pdFALSE;
 80115f2:	2300      	movs	r3, #0
 80115f4:	613b      	str	r3, [r7, #16]

      if (xQueueSendToBackFromISR (hQueue, msg_ptr, &yield) != pdTRUE) {
 80115f6:	f107 0210 	add.w	r2, r7, #16
 80115fa:	2300      	movs	r3, #0
 80115fc:	68b9      	ldr	r1, [r7, #8]
 80115fe:	69b8      	ldr	r0, [r7, #24]
 8011600:	f000 fd30 	bl	8012064 <xQueueGenericSendFromISR>
 8011604:	4603      	mov	r3, r0
 8011606:	2b01      	cmp	r3, #1
 8011608:	d003      	beq.n	8011612 <osMessageQueuePut+0x5e>
        stat = osErrorResource;
 801160a:	f06f 0302 	mvn.w	r3, #2
 801160e:	61fb      	str	r3, [r7, #28]
 8011610:	e028      	b.n	8011664 <osMessageQueuePut+0xb0>
      } else {
        portYIELD_FROM_ISR (yield);
 8011612:	693b      	ldr	r3, [r7, #16]
 8011614:	2b00      	cmp	r3, #0
 8011616:	d025      	beq.n	8011664 <osMessageQueuePut+0xb0>
 8011618:	4b15      	ldr	r3, [pc, #84]	@ (8011670 <osMessageQueuePut+0xbc>)
 801161a:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 801161e:	601a      	str	r2, [r3, #0]
 8011620:	f3bf 8f4f 	dsb	sy
 8011624:	f3bf 8f6f 	isb	sy
 8011628:	e01c      	b.n	8011664 <osMessageQueuePut+0xb0>
      }
    }
  }
  else {
    if ((hQueue == NULL) || (msg_ptr == NULL)) {
 801162a:	69bb      	ldr	r3, [r7, #24]
 801162c:	2b00      	cmp	r3, #0
 801162e:	d002      	beq.n	8011636 <osMessageQueuePut+0x82>
 8011630:	68bb      	ldr	r3, [r7, #8]
 8011632:	2b00      	cmp	r3, #0
 8011634:	d103      	bne.n	801163e <osMessageQueuePut+0x8a>
      stat = osErrorParameter;
 8011636:	f06f 0303 	mvn.w	r3, #3
 801163a:	61fb      	str	r3, [r7, #28]
 801163c:	e012      	b.n	8011664 <osMessageQueuePut+0xb0>
    }
    else {
      if (xQueueSendToBack (hQueue, msg_ptr, (TickType_t)timeout) != pdPASS) {
 801163e:	2300      	movs	r3, #0
 8011640:	683a      	ldr	r2, [r7, #0]
 8011642:	68b9      	ldr	r1, [r7, #8]
 8011644:	69b8      	ldr	r0, [r7, #24]
 8011646:	f000 fc0b 	bl	8011e60 <xQueueGenericSend>
 801164a:	4603      	mov	r3, r0
 801164c:	2b01      	cmp	r3, #1
 801164e:	d009      	beq.n	8011664 <osMessageQueuePut+0xb0>
        if (timeout != 0U) {
 8011650:	683b      	ldr	r3, [r7, #0]
 8011652:	2b00      	cmp	r3, #0
 8011654:	d003      	beq.n	801165e <osMessageQueuePut+0xaa>
          stat = osErrorTimeout;
 8011656:	f06f 0301 	mvn.w	r3, #1
 801165a:	61fb      	str	r3, [r7, #28]
 801165c:	e002      	b.n	8011664 <osMessageQueuePut+0xb0>
        } else {
          stat = osErrorResource;
 801165e:	f06f 0302 	mvn.w	r3, #2
 8011662:	61fb      	str	r3, [r7, #28]
        }
      }
    }
  }

  return (stat);
 8011664:	69fb      	ldr	r3, [r7, #28]
}
 8011666:	4618      	mov	r0, r3
 8011668:	3720      	adds	r7, #32
 801166a:	46bd      	mov	sp, r7
 801166c:	bd80      	pop	{r7, pc}
 801166e:	bf00      	nop
 8011670:	e000ed04 	.word	0xe000ed04

08011674 <osMessageQueueGet>:

osStatus_t osMessageQueueGet (osMessageQueueId_t mq_id, void *msg_ptr, uint8_t *msg_prio, uint32_t timeout) {
 8011674:	b580      	push	{r7, lr}
 8011676:	b088      	sub	sp, #32
 8011678:	af00      	add	r7, sp, #0
 801167a:	60f8      	str	r0, [r7, #12]
 801167c:	60b9      	str	r1, [r7, #8]
 801167e:	607a      	str	r2, [r7, #4]
 8011680:	603b      	str	r3, [r7, #0]
  QueueHandle_t hQueue = (QueueHandle_t)mq_id;
 8011682:	68fb      	ldr	r3, [r7, #12]
 8011684:	61bb      	str	r3, [r7, #24]
  osStatus_t stat;
  BaseType_t yield;

  (void)msg_prio; /* Message priority is ignored */

  stat = osOK;
 8011686:	2300      	movs	r3, #0
 8011688:	61fb      	str	r3, [r7, #28]
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 801168a:	f3ef 8305 	mrs	r3, IPSR
 801168e:	617b      	str	r3, [r7, #20]
  return(result);
 8011690:	697b      	ldr	r3, [r7, #20]

  if (IS_IRQ()) {
 8011692:	2b00      	cmp	r3, #0
 8011694:	d028      	beq.n	80116e8 <osMessageQueueGet+0x74>
    if ((hQueue == NULL) || (msg_ptr == NULL) || (timeout != 0U)) {
 8011696:	69bb      	ldr	r3, [r7, #24]
 8011698:	2b00      	cmp	r3, #0
 801169a:	d005      	beq.n	80116a8 <osMessageQueueGet+0x34>
 801169c:	68bb      	ldr	r3, [r7, #8]
 801169e:	2b00      	cmp	r3, #0
 80116a0:	d002      	beq.n	80116a8 <osMessageQueueGet+0x34>
 80116a2:	683b      	ldr	r3, [r7, #0]
 80116a4:	2b00      	cmp	r3, #0
 80116a6:	d003      	beq.n	80116b0 <osMessageQueueGet+0x3c>
      stat = osErrorParameter;
 80116a8:	f06f 0303 	mvn.w	r3, #3
 80116ac:	61fb      	str	r3, [r7, #28]
 80116ae:	e037      	b.n	8011720 <osMessageQueueGet+0xac>
    }
    else {
      yield = pdFALSE;
 80116b0:	2300      	movs	r3, #0
 80116b2:	613b      	str	r3, [r7, #16]

      if (xQueueReceiveFromISR (hQueue, msg_ptr, &yield) != pdPASS) {
 80116b4:	f107 0310 	add.w	r3, r7, #16
 80116b8:	461a      	mov	r2, r3
 80116ba:	68b9      	ldr	r1, [r7, #8]
 80116bc:	69b8      	ldr	r0, [r7, #24]
 80116be:	f000 fff1 	bl	80126a4 <xQueueReceiveFromISR>
 80116c2:	4603      	mov	r3, r0
 80116c4:	2b01      	cmp	r3, #1
 80116c6:	d003      	beq.n	80116d0 <osMessageQueueGet+0x5c>
        stat = osErrorResource;
 80116c8:	f06f 0302 	mvn.w	r3, #2
 80116cc:	61fb      	str	r3, [r7, #28]
 80116ce:	e027      	b.n	8011720 <osMessageQueueGet+0xac>
      } else {
        portYIELD_FROM_ISR (yield);
 80116d0:	693b      	ldr	r3, [r7, #16]
 80116d2:	2b00      	cmp	r3, #0
 80116d4:	d024      	beq.n	8011720 <osMessageQueueGet+0xac>
 80116d6:	4b15      	ldr	r3, [pc, #84]	@ (801172c <osMessageQueueGet+0xb8>)
 80116d8:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 80116dc:	601a      	str	r2, [r3, #0]
 80116de:	f3bf 8f4f 	dsb	sy
 80116e2:	f3bf 8f6f 	isb	sy
 80116e6:	e01b      	b.n	8011720 <osMessageQueueGet+0xac>
      }
    }
  }
  else {
    if ((hQueue == NULL) || (msg_ptr == NULL)) {
 80116e8:	69bb      	ldr	r3, [r7, #24]
 80116ea:	2b00      	cmp	r3, #0
 80116ec:	d002      	beq.n	80116f4 <osMessageQueueGet+0x80>
 80116ee:	68bb      	ldr	r3, [r7, #8]
 80116f0:	2b00      	cmp	r3, #0
 80116f2:	d103      	bne.n	80116fc <osMessageQueueGet+0x88>
      stat = osErrorParameter;
 80116f4:	f06f 0303 	mvn.w	r3, #3
 80116f8:	61fb      	str	r3, [r7, #28]
 80116fa:	e011      	b.n	8011720 <osMessageQueueGet+0xac>
    }
    else {
      if (xQueueReceive (hQueue, msg_ptr, (TickType_t)timeout) != pdPASS) {
 80116fc:	683a      	ldr	r2, [r7, #0]
 80116fe:	68b9      	ldr	r1, [r7, #8]
 8011700:	69b8      	ldr	r0, [r7, #24]
 8011702:	f000 fddd 	bl	80122c0 <xQueueReceive>
 8011706:	4603      	mov	r3, r0
 8011708:	2b01      	cmp	r3, #1
 801170a:	d009      	beq.n	8011720 <osMessageQueueGet+0xac>
        if (timeout != 0U) {
 801170c:	683b      	ldr	r3, [r7, #0]
 801170e:	2b00      	cmp	r3, #0
 8011710:	d003      	beq.n	801171a <osMessageQueueGet+0xa6>
          stat = osErrorTimeout;
 8011712:	f06f 0301 	mvn.w	r3, #1
 8011716:	61fb      	str	r3, [r7, #28]
 8011718:	e002      	b.n	8011720 <osMessageQueueGet+0xac>
        } else {
          stat = osErrorResource;
 801171a:	f06f 0302 	mvn.w	r3, #2
 801171e:	61fb      	str	r3, [r7, #28]
        }
      }
    }
  }

  return (stat);
 8011720:	69fb      	ldr	r3, [r7, #28]
}
 8011722:	4618      	mov	r0, r3
 8011724:	3720      	adds	r7, #32
 8011726:	46bd      	mov	sp, r7
 8011728:	bd80      	pop	{r7, pc}
 801172a:	bf00      	nop
 801172c:	e000ed04 	.word	0xe000ed04

08011730 <osMessageQueueGetCount>:
  }

  return (size);
}

uint32_t osMessageQueueGetCount (osMessageQueueId_t mq_id) {
 8011730:	b580      	push	{r7, lr}
 8011732:	b086      	sub	sp, #24
 8011734:	af00      	add	r7, sp, #0
 8011736:	6078      	str	r0, [r7, #4]
  QueueHandle_t hQueue = (QueueHandle_t)mq_id;
 8011738:	687b      	ldr	r3, [r7, #4]
 801173a:	613b      	str	r3, [r7, #16]
  UBaseType_t count;

  if (hQueue == NULL) {
 801173c:	693b      	ldr	r3, [r7, #16]
 801173e:	2b00      	cmp	r3, #0
 8011740:	d102      	bne.n	8011748 <osMessageQueueGetCount+0x18>
    count = 0U;
 8011742:	2300      	movs	r3, #0
 8011744:	617b      	str	r3, [r7, #20]
 8011746:	e00e      	b.n	8011766 <osMessageQueueGetCount+0x36>
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 8011748:	f3ef 8305 	mrs	r3, IPSR
 801174c:	60fb      	str	r3, [r7, #12]
  return(result);
 801174e:	68fb      	ldr	r3, [r7, #12]
  }
  else if (IS_IRQ()) {
 8011750:	2b00      	cmp	r3, #0
 8011752:	d004      	beq.n	801175e <osMessageQueueGetCount+0x2e>
    count = uxQueueMessagesWaitingFromISR (hQueue);
 8011754:	6938      	ldr	r0, [r7, #16]
 8011756:	f001 f846 	bl	80127e6 <uxQueueMessagesWaitingFromISR>
 801175a:	6178      	str	r0, [r7, #20]
 801175c:	e003      	b.n	8011766 <osMessageQueueGetCount+0x36>
  }
  else {
    count = uxQueueMessagesWaiting (hQueue);
 801175e:	6938      	ldr	r0, [r7, #16]
 8011760:	f001 f822 	bl	80127a8 <uxQueueMessagesWaiting>
 8011764:	6178      	str	r0, [r7, #20]
  }

  return ((uint32_t)count);
 8011766:	697b      	ldr	r3, [r7, #20]
}
 8011768:	4618      	mov	r0, r3
 801176a:	3718      	adds	r7, #24
 801176c:	46bd      	mov	sp, r7
 801176e:	bd80      	pop	{r7, pc}

08011770 <osMessageQueueDelete>:
  }

  return (stat);
}

osStatus_t osMessageQueueDelete (osMessageQueueId_t mq_id) {
 8011770:	b580      	push	{r7, lr}
 8011772:	b086      	sub	sp, #24
 8011774:	af00      	add	r7, sp, #0
 8011776:	6078      	str	r0, [r7, #4]
  QueueHandle_t hQueue = (QueueHandle_t)mq_id;
 8011778:	687b      	ldr	r3, [r7, #4]
 801177a:	613b      	str	r3, [r7, #16]
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 801177c:	f3ef 8305 	mrs	r3, IPSR
 8011780:	60fb      	str	r3, [r7, #12]
  return(result);
 8011782:	68fb      	ldr	r3, [r7, #12]
  osStatus_t stat;

#ifndef USE_FreeRTOS_HEAP_1
  if (IS_IRQ()) {
 8011784:	2b00      	cmp	r3, #0
 8011786:	d003      	beq.n	8011790 <osMessageQueueDelete+0x20>
    stat = osErrorISR;
 8011788:	f06f 0305 	mvn.w	r3, #5
 801178c:	617b      	str	r3, [r7, #20]
 801178e:	e00e      	b.n	80117ae <osMessageQueueDelete+0x3e>
  }
  else if (hQueue == NULL) {
 8011790:	693b      	ldr	r3, [r7, #16]
 8011792:	2b00      	cmp	r3, #0
 8011794:	d103      	bne.n	801179e <osMessageQueueDelete+0x2e>
    stat = osErrorParameter;
 8011796:	f06f 0303 	mvn.w	r3, #3
 801179a:	617b      	str	r3, [r7, #20]
 801179c:	e007      	b.n	80117ae <osMessageQueueDelete+0x3e>
  }
  else {
    #if (configQUEUE_REGISTRY_SIZE > 0)
    vQueueUnregisterQueue (hQueue);
 801179e:	6938      	ldr	r0, [r7, #16]
 80117a0:	f001 f9b6 	bl	8012b10 <vQueueUnregisterQueue>
    #endif

    stat = osOK;
 80117a4:	2300      	movs	r3, #0
 80117a6:	617b      	str	r3, [r7, #20]
    vQueueDelete (hQueue);
 80117a8:	6938      	ldr	r0, [r7, #16]
 80117aa:	f001 f83b 	bl	8012824 <vQueueDelete>
  }
#else
  stat = osError;
#endif

  return (stat);
 80117ae:	697b      	ldr	r3, [r7, #20]
}
 80117b0:	4618      	mov	r0, r3
 80117b2:	3718      	adds	r7, #24
 80117b4:	46bd      	mov	sp, r7
 80117b6:	bd80      	pop	{r7, pc}

080117b8 <vApplicationGetIdleTaskMemory>:

/*
  vApplicationGetIdleTaskMemory gets called when configSUPPORT_STATIC_ALLOCATION
  equals to 1 and is required for static memory allocation support.
*/
__WEAK void vApplicationGetIdleTaskMemory (StaticTask_t **ppxIdleTaskTCBBuffer, StackType_t **ppxIdleTaskStackBuffer, uint32_t *pulIdleTaskStackSize) {
 80117b8:	b480      	push	{r7}
 80117ba:	b085      	sub	sp, #20
 80117bc:	af00      	add	r7, sp, #0
 80117be:	60f8      	str	r0, [r7, #12]
 80117c0:	60b9      	str	r1, [r7, #8]
 80117c2:	607a      	str	r2, [r7, #4]
  /* Idle task control block and stack */
  static StaticTask_t Idle_TCB;
  static StackType_t  Idle_Stack[configMINIMAL_STACK_SIZE];

  *ppxIdleTaskTCBBuffer   = &Idle_TCB;
 80117c4:	68fb      	ldr	r3, [r7, #12]
 80117c6:	4a07      	ldr	r2, [pc, #28]	@ (80117e4 <vApplicationGetIdleTaskMemory+0x2c>)
 80117c8:	601a      	str	r2, [r3, #0]
  *ppxIdleTaskStackBuffer = &Idle_Stack[0];
 80117ca:	68bb      	ldr	r3, [r7, #8]
 80117cc:	4a06      	ldr	r2, [pc, #24]	@ (80117e8 <vApplicationGetIdleTaskMemory+0x30>)
 80117ce:	601a      	str	r2, [r3, #0]
  *pulIdleTaskStackSize   = (uint32_t)configMINIMAL_STACK_SIZE;
 80117d0:	687b      	ldr	r3, [r7, #4]
 80117d2:	f44f 7200 	mov.w	r2, #512	@ 0x200
 80117d6:	601a      	str	r2, [r3, #0]
}
 80117d8:	bf00      	nop
 80117da:	3714      	adds	r7, #20
 80117dc:	46bd      	mov	sp, r7
 80117de:	f85d 7b04 	ldr.w	r7, [sp], #4
 80117e2:	4770      	bx	lr
 80117e4:	240023d0 	.word	0x240023d0
 80117e8:	24002478 	.word	0x24002478

080117ec <vApplicationGetTimerTaskMemory>:

/*
  vApplicationGetTimerTaskMemory gets called when configSUPPORT_STATIC_ALLOCATION
  equals to 1 and is required for static memory allocation support.
*/
__WEAK void vApplicationGetTimerTaskMemory (StaticTask_t **ppxTimerTaskTCBBuffer, StackType_t **ppxTimerTaskStackBuffer, uint32_t *pulTimerTaskStackSize) {
 80117ec:	b480      	push	{r7}
 80117ee:	b085      	sub	sp, #20
 80117f0:	af00      	add	r7, sp, #0
 80117f2:	60f8      	str	r0, [r7, #12]
 80117f4:	60b9      	str	r1, [r7, #8]
 80117f6:	607a      	str	r2, [r7, #4]
  /* Timer task control block and stack */
  static StaticTask_t Timer_TCB;
  static StackType_t  Timer_Stack[configTIMER_TASK_STACK_DEPTH];

  *ppxTimerTaskTCBBuffer   = &Timer_TCB;
 80117f8:	68fb      	ldr	r3, [r7, #12]
 80117fa:	4a07      	ldr	r2, [pc, #28]	@ (8011818 <vApplicationGetTimerTaskMemory+0x2c>)
 80117fc:	601a      	str	r2, [r3, #0]
  *ppxTimerTaskStackBuffer = &Timer_Stack[0];
 80117fe:	68bb      	ldr	r3, [r7, #8]
 8011800:	4a06      	ldr	r2, [pc, #24]	@ (801181c <vApplicationGetTimerTaskMemory+0x30>)
 8011802:	601a      	str	r2, [r3, #0]
  *pulTimerTaskStackSize   = (uint32_t)configTIMER_TASK_STACK_DEPTH;
 8011804:	687b      	ldr	r3, [r7, #4]
 8011806:	f44f 6280 	mov.w	r2, #1024	@ 0x400
 801180a:	601a      	str	r2, [r3, #0]
}
 801180c:	bf00      	nop
 801180e:	3714      	adds	r7, #20
 8011810:	46bd      	mov	sp, r7
 8011812:	f85d 7b04 	ldr.w	r7, [sp], #4
 8011816:	4770      	bx	lr
 8011818:	24002c78 	.word	0x24002c78
 801181c:	24002d20 	.word	0x24002d20

08011820 <vListInitialise>:
/*-----------------------------------------------------------
 * PUBLIC LIST API documented in list.h
 *----------------------------------------------------------*/

void vListInitialise( List_t * const pxList )
{
 8011820:	b480      	push	{r7}
 8011822:	b083      	sub	sp, #12
 8011824:	af00      	add	r7, sp, #0
 8011826:	6078      	str	r0, [r7, #4]
	/* The list structure contains a list item which is used to mark the
	end of the list.  To initialise the list the list end is inserted
	as the only list entry. */
	pxList->pxIndex = ( ListItem_t * ) &( pxList->xListEnd );			/*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM.  This is checked and valid. */
 8011828:	687b      	ldr	r3, [r7, #4]
 801182a:	f103 0208 	add.w	r2, r3, #8
 801182e:	687b      	ldr	r3, [r7, #4]
 8011830:	605a      	str	r2, [r3, #4]

	/* The list end value is the highest possible value in the list to
	ensure it remains at the end of the list. */
	pxList->xListEnd.xItemValue = portMAX_DELAY;
 8011832:	687b      	ldr	r3, [r7, #4]
 8011834:	f04f 32ff 	mov.w	r2, #4294967295	@ 0xffffffff
 8011838:	609a      	str	r2, [r3, #8]

	/* The list end next and previous pointers point to itself so we know
	when the list is empty. */
	pxList->xListEnd.pxNext = ( ListItem_t * ) &( pxList->xListEnd );	/*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM.  This is checked and valid. */
 801183a:	687b      	ldr	r3, [r7, #4]
 801183c:	f103 0208 	add.w	r2, r3, #8
 8011840:	687b      	ldr	r3, [r7, #4]
 8011842:	60da      	str	r2, [r3, #12]
	pxList->xListEnd.pxPrevious = ( ListItem_t * ) &( pxList->xListEnd );/*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM.  This is checked and valid. */
 8011844:	687b      	ldr	r3, [r7, #4]
 8011846:	f103 0208 	add.w	r2, r3, #8
 801184a:	687b      	ldr	r3, [r7, #4]
 801184c:	611a      	str	r2, [r3, #16]

	pxList->uxNumberOfItems = ( UBaseType_t ) 0U;
 801184e:	687b      	ldr	r3, [r7, #4]
 8011850:	2200      	movs	r2, #0
 8011852:	601a      	str	r2, [r3, #0]

	/* Write known values into the list if
	configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
	listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList );
	listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList );
}
 8011854:	bf00      	nop
 8011856:	370c      	adds	r7, #12
 8011858:	46bd      	mov	sp, r7
 801185a:	f85d 7b04 	ldr.w	r7, [sp], #4
 801185e:	4770      	bx	lr

08011860 <vListInitialiseItem>:
/*-----------------------------------------------------------*/

void vListInitialiseItem( ListItem_t * const pxItem )
{
 8011860:	b480      	push	{r7}
 8011862:	b083      	sub	sp, #12
 8011864:	af00      	add	r7, sp, #0
 8011866:	6078      	str	r0, [r7, #4]
	/* Make sure the list item is not recorded as being on a list. */
	pxItem->pxContainer = NULL;
 8011868:	687b      	ldr	r3, [r7, #4]
 801186a:	2200      	movs	r2, #0
 801186c:	611a      	str	r2, [r3, #16]

	/* Write known values into the list item if
	configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
	listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem );
	listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem );
}
 801186e:	bf00      	nop
 8011870:	370c      	adds	r7, #12
 8011872:	46bd      	mov	sp, r7
 8011874:	f85d 7b04 	ldr.w	r7, [sp], #4
 8011878:	4770      	bx	lr

0801187a <vListInsertEnd>:
/*-----------------------------------------------------------*/

void vListInsertEnd( List_t * const pxList, ListItem_t * const pxNewListItem )
{
 801187a:	b480      	push	{r7}
 801187c:	b085      	sub	sp, #20
 801187e:	af00      	add	r7, sp, #0
 8011880:	6078      	str	r0, [r7, #4]
 8011882:	6039      	str	r1, [r7, #0]
ListItem_t * const pxIndex = pxList->pxIndex;
 8011884:	687b      	ldr	r3, [r7, #4]
 8011886:	685b      	ldr	r3, [r3, #4]
 8011888:	60fb      	str	r3, [r7, #12]
	listTEST_LIST_ITEM_INTEGRITY( pxNewListItem );

	/* Insert a new list item into pxList, but rather than sort the list,
	makes the new list item the last item to be removed by a call to
	listGET_OWNER_OF_NEXT_ENTRY(). */
	pxNewListItem->pxNext = pxIndex;
 801188a:	683b      	ldr	r3, [r7, #0]
 801188c:	68fa      	ldr	r2, [r7, #12]
 801188e:	605a      	str	r2, [r3, #4]
	pxNewListItem->pxPrevious = pxIndex->pxPrevious;
 8011890:	68fb      	ldr	r3, [r7, #12]
 8011892:	689a      	ldr	r2, [r3, #8]
 8011894:	683b      	ldr	r3, [r7, #0]
 8011896:	609a      	str	r2, [r3, #8]

	/* Only used during decision coverage testing. */
	mtCOVERAGE_TEST_DELAY();

	pxIndex->pxPrevious->pxNext = pxNewListItem;
 8011898:	68fb      	ldr	r3, [r7, #12]
 801189a:	689b      	ldr	r3, [r3, #8]
 801189c:	683a      	ldr	r2, [r7, #0]
 801189e:	605a      	str	r2, [r3, #4]
	pxIndex->pxPrevious = pxNewListItem;
 80118a0:	68fb      	ldr	r3, [r7, #12]
 80118a2:	683a      	ldr	r2, [r7, #0]
 80118a4:	609a      	str	r2, [r3, #8]

	/* Remember which list the item is in. */
	pxNewListItem->pxContainer = pxList;
 80118a6:	683b      	ldr	r3, [r7, #0]
 80118a8:	687a      	ldr	r2, [r7, #4]
 80118aa:	611a      	str	r2, [r3, #16]

	( pxList->uxNumberOfItems )++;
 80118ac:	687b      	ldr	r3, [r7, #4]
 80118ae:	681b      	ldr	r3, [r3, #0]
 80118b0:	1c5a      	adds	r2, r3, #1
 80118b2:	687b      	ldr	r3, [r7, #4]
 80118b4:	601a      	str	r2, [r3, #0]
}
 80118b6:	bf00      	nop
 80118b8:	3714      	adds	r7, #20
 80118ba:	46bd      	mov	sp, r7
 80118bc:	f85d 7b04 	ldr.w	r7, [sp], #4
 80118c0:	4770      	bx	lr

080118c2 <vListInsert>:
/*-----------------------------------------------------------*/

void vListInsert( List_t * const pxList, ListItem_t * const pxNewListItem )
{
 80118c2:	b480      	push	{r7}
 80118c4:	b085      	sub	sp, #20
 80118c6:	af00      	add	r7, sp, #0
 80118c8:	6078      	str	r0, [r7, #4]
 80118ca:	6039      	str	r1, [r7, #0]
ListItem_t *pxIterator;
const TickType_t xValueOfInsertion = pxNewListItem->xItemValue;
 80118cc:	683b      	ldr	r3, [r7, #0]
 80118ce:	681b      	ldr	r3, [r3, #0]
 80118d0:	60bb      	str	r3, [r7, #8]
	new list item should be placed after it.  This ensures that TCBs which are
	stored in ready lists (all of which have the same xItemValue value) get a
	share of the CPU.  However, if the xItemValue is the same as the back marker
	the iteration loop below will not end.  Therefore the value is checked
	first, and the algorithm slightly modified if necessary. */
	if( xValueOfInsertion == portMAX_DELAY )
 80118d2:	68bb      	ldr	r3, [r7, #8]
 80118d4:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 80118d8:	d103      	bne.n	80118e2 <vListInsert+0x20>
	{
		pxIterator = pxList->xListEnd.pxPrevious;
 80118da:	687b      	ldr	r3, [r7, #4]
 80118dc:	691b      	ldr	r3, [r3, #16]
 80118de:	60fb      	str	r3, [r7, #12]
 80118e0:	e00c      	b.n	80118fc <vListInsert+0x3a>
			4) Using a queue or semaphore before it has been initialised or
			   before the scheduler has been started (are interrupts firing
			   before vTaskStartScheduler() has been called?).
		**********************************************************************/

		for( pxIterator = ( ListItem_t * ) &( pxList->xListEnd ); pxIterator->pxNext->xItemValue <= xValueOfInsertion; pxIterator = pxIterator->pxNext ) /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM.  This is checked and valid. *//*lint !e440 The iterator moves to a different value, not xValueOfInsertion. */
 80118e2:	687b      	ldr	r3, [r7, #4]
 80118e4:	3308      	adds	r3, #8
 80118e6:	60fb      	str	r3, [r7, #12]
 80118e8:	e002      	b.n	80118f0 <vListInsert+0x2e>
 80118ea:	68fb      	ldr	r3, [r7, #12]
 80118ec:	685b      	ldr	r3, [r3, #4]
 80118ee:	60fb      	str	r3, [r7, #12]
 80118f0:	68fb      	ldr	r3, [r7, #12]
 80118f2:	685b      	ldr	r3, [r3, #4]
 80118f4:	681b      	ldr	r3, [r3, #0]
 80118f6:	68ba      	ldr	r2, [r7, #8]
 80118f8:	429a      	cmp	r2, r3
 80118fa:	d2f6      	bcs.n	80118ea <vListInsert+0x28>
			/* There is nothing to do here, just iterating to the wanted
			insertion position. */
		}
	}

	pxNewListItem->pxNext = pxIterator->pxNext;
 80118fc:	68fb      	ldr	r3, [r7, #12]
 80118fe:	685a      	ldr	r2, [r3, #4]
 8011900:	683b      	ldr	r3, [r7, #0]
 8011902:	605a      	str	r2, [r3, #4]
	pxNewListItem->pxNext->pxPrevious = pxNewListItem;
 8011904:	683b      	ldr	r3, [r7, #0]
 8011906:	685b      	ldr	r3, [r3, #4]
 8011908:	683a      	ldr	r2, [r7, #0]
 801190a:	609a      	str	r2, [r3, #8]
	pxNewListItem->pxPrevious = pxIterator;
 801190c:	683b      	ldr	r3, [r7, #0]
 801190e:	68fa      	ldr	r2, [r7, #12]
 8011910:	609a      	str	r2, [r3, #8]
	pxIterator->pxNext = pxNewListItem;
 8011912:	68fb      	ldr	r3, [r7, #12]
 8011914:	683a      	ldr	r2, [r7, #0]
 8011916:	605a      	str	r2, [r3, #4]

	/* Remember which list the item is in.  This allows fast removal of the
	item later. */
	pxNewListItem->pxContainer = pxList;
 8011918:	683b      	ldr	r3, [r7, #0]
 801191a:	687a      	ldr	r2, [r7, #4]
 801191c:	611a      	str	r2, [r3, #16]

	( pxList->uxNumberOfItems )++;
 801191e:	687b      	ldr	r3, [r7, #4]
 8011920:	681b      	ldr	r3, [r3, #0]
 8011922:	1c5a      	adds	r2, r3, #1
 8011924:	687b      	ldr	r3, [r7, #4]
 8011926:	601a      	str	r2, [r3, #0]
}
 8011928:	bf00      	nop
 801192a:	3714      	adds	r7, #20
 801192c:	46bd      	mov	sp, r7
 801192e:	f85d 7b04 	ldr.w	r7, [sp], #4
 8011932:	4770      	bx	lr

08011934 <uxListRemove>:
/*-----------------------------------------------------------*/

UBaseType_t uxListRemove( ListItem_t * const pxItemToRemove )
{
 8011934:	b480      	push	{r7}
 8011936:	b085      	sub	sp, #20
 8011938:	af00      	add	r7, sp, #0
 801193a:	6078      	str	r0, [r7, #4]
/* The list item knows which list it is in.  Obtain the list from the list
item. */
List_t * const pxList = pxItemToRemove->pxContainer;
 801193c:	687b      	ldr	r3, [r7, #4]
 801193e:	691b      	ldr	r3, [r3, #16]
 8011940:	60fb      	str	r3, [r7, #12]

	pxItemToRemove->pxNext->pxPrevious = pxItemToRemove->pxPrevious;
 8011942:	687b      	ldr	r3, [r7, #4]
 8011944:	685b      	ldr	r3, [r3, #4]
 8011946:	687a      	ldr	r2, [r7, #4]
 8011948:	6892      	ldr	r2, [r2, #8]
 801194a:	609a      	str	r2, [r3, #8]
	pxItemToRemove->pxPrevious->pxNext = pxItemToRemove->pxNext;
 801194c:	687b      	ldr	r3, [r7, #4]
 801194e:	689b      	ldr	r3, [r3, #8]
 8011950:	687a      	ldr	r2, [r7, #4]
 8011952:	6852      	ldr	r2, [r2, #4]
 8011954:	605a      	str	r2, [r3, #4]

	/* Only used during decision coverage testing. */
	mtCOVERAGE_TEST_DELAY();

	/* Make sure the index is left pointing to a valid item. */
	if( pxList->pxIndex == pxItemToRemove )
 8011956:	68fb      	ldr	r3, [r7, #12]
 8011958:	685b      	ldr	r3, [r3, #4]
 801195a:	687a      	ldr	r2, [r7, #4]
 801195c:	429a      	cmp	r2, r3
 801195e:	d103      	bne.n	8011968 <uxListRemove+0x34>
	{
		pxList->pxIndex = pxItemToRemove->pxPrevious;
 8011960:	687b      	ldr	r3, [r7, #4]
 8011962:	689a      	ldr	r2, [r3, #8]
 8011964:	68fb      	ldr	r3, [r7, #12]
 8011966:	605a      	str	r2, [r3, #4]
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}

	pxItemToRemove->pxContainer = NULL;
 8011968:	687b      	ldr	r3, [r7, #4]
 801196a:	2200      	movs	r2, #0
 801196c:	611a      	str	r2, [r3, #16]
	( pxList->uxNumberOfItems )--;
 801196e:	68fb      	ldr	r3, [r7, #12]
 8011970:	681b      	ldr	r3, [r3, #0]
 8011972:	1e5a      	subs	r2, r3, #1
 8011974:	68fb      	ldr	r3, [r7, #12]
 8011976:	601a      	str	r2, [r3, #0]

	return pxList->uxNumberOfItems;
 8011978:	68fb      	ldr	r3, [r7, #12]
 801197a:	681b      	ldr	r3, [r3, #0]
}
 801197c:	4618      	mov	r0, r3
 801197e:	3714      	adds	r7, #20
 8011980:	46bd      	mov	sp, r7
 8011982:	f85d 7b04 	ldr.w	r7, [sp], #4
 8011986:	4770      	bx	lr

08011988 <xQueueGenericReset>:
	}														\
	taskEXIT_CRITICAL()
/*-----------------------------------------------------------*/

BaseType_t xQueueGenericReset( QueueHandle_t xQueue, BaseType_t xNewQueue )
{
 8011988:	b580      	push	{r7, lr}
 801198a:	b084      	sub	sp, #16
 801198c:	af00      	add	r7, sp, #0
 801198e:	6078      	str	r0, [r7, #4]
 8011990:	6039      	str	r1, [r7, #0]
Queue_t * const pxQueue = xQueue;
 8011992:	687b      	ldr	r3, [r7, #4]
 8011994:	60fb      	str	r3, [r7, #12]

	configASSERT( pxQueue );
 8011996:	68fb      	ldr	r3, [r7, #12]
 8011998:	2b00      	cmp	r3, #0
 801199a:	d10b      	bne.n	80119b4 <xQueueGenericReset+0x2c>

portFORCE_INLINE static void vPortRaiseBASEPRI( void )
{
uint32_t ulNewBASEPRI;

	__asm volatile
 801199c:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80119a0:	f383 8811 	msr	BASEPRI, r3
 80119a4:	f3bf 8f6f 	isb	sy
 80119a8:	f3bf 8f4f 	dsb	sy
 80119ac:	60bb      	str	r3, [r7, #8]
		"	msr basepri, %0											\n" \
		"	isb														\n" \
		"	dsb														\n" \
		:"=r" (ulNewBASEPRI) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
	);
}
 80119ae:	bf00      	nop
 80119b0:	bf00      	nop
 80119b2:	e7fd      	b.n	80119b0 <xQueueGenericReset+0x28>

	taskENTER_CRITICAL();
 80119b4:	f003 fcb0 	bl	8015318 <vPortEnterCritical>
	{
		pxQueue->u.xQueue.pcTail = pxQueue->pcHead + ( pxQueue->uxLength * pxQueue->uxItemSize ); /*lint !e9016 Pointer arithmetic allowed on char types, especially when it assists conveying intent. */
 80119b8:	68fb      	ldr	r3, [r7, #12]
 80119ba:	681a      	ldr	r2, [r3, #0]
 80119bc:	68fb      	ldr	r3, [r7, #12]
 80119be:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 80119c0:	68f9      	ldr	r1, [r7, #12]
 80119c2:	6c09      	ldr	r1, [r1, #64]	@ 0x40
 80119c4:	fb01 f303 	mul.w	r3, r1, r3
 80119c8:	441a      	add	r2, r3
 80119ca:	68fb      	ldr	r3, [r7, #12]
 80119cc:	609a      	str	r2, [r3, #8]
		pxQueue->uxMessagesWaiting = ( UBaseType_t ) 0U;
 80119ce:	68fb      	ldr	r3, [r7, #12]
 80119d0:	2200      	movs	r2, #0
 80119d2:	639a      	str	r2, [r3, #56]	@ 0x38
		pxQueue->pcWriteTo = pxQueue->pcHead;
 80119d4:	68fb      	ldr	r3, [r7, #12]
 80119d6:	681a      	ldr	r2, [r3, #0]
 80119d8:	68fb      	ldr	r3, [r7, #12]
 80119da:	605a      	str	r2, [r3, #4]
		pxQueue->u.xQueue.pcReadFrom = pxQueue->pcHead + ( ( pxQueue->uxLength - 1U ) * pxQueue->uxItemSize ); /*lint !e9016 Pointer arithmetic allowed on char types, especially when it assists conveying intent. */
 80119dc:	68fb      	ldr	r3, [r7, #12]
 80119de:	681a      	ldr	r2, [r3, #0]
 80119e0:	68fb      	ldr	r3, [r7, #12]
 80119e2:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 80119e4:	3b01      	subs	r3, #1
 80119e6:	68f9      	ldr	r1, [r7, #12]
 80119e8:	6c09      	ldr	r1, [r1, #64]	@ 0x40
 80119ea:	fb01 f303 	mul.w	r3, r1, r3
 80119ee:	441a      	add	r2, r3
 80119f0:	68fb      	ldr	r3, [r7, #12]
 80119f2:	60da      	str	r2, [r3, #12]
		pxQueue->cRxLock = queueUNLOCKED;
 80119f4:	68fb      	ldr	r3, [r7, #12]
 80119f6:	22ff      	movs	r2, #255	@ 0xff
 80119f8:	f883 2044 	strb.w	r2, [r3, #68]	@ 0x44
		pxQueue->cTxLock = queueUNLOCKED;
 80119fc:	68fb      	ldr	r3, [r7, #12]
 80119fe:	22ff      	movs	r2, #255	@ 0xff
 8011a00:	f883 2045 	strb.w	r2, [r3, #69]	@ 0x45

		if( xNewQueue == pdFALSE )
 8011a04:	683b      	ldr	r3, [r7, #0]
 8011a06:	2b00      	cmp	r3, #0
 8011a08:	d114      	bne.n	8011a34 <xQueueGenericReset+0xac>
			/* If there are tasks blocked waiting to read from the queue, then
			the tasks will remain blocked as after this function exits the queue
			will still be empty.  If there are tasks blocked waiting to write to
			the queue, then one should be unblocked as after this function exits
			it will be possible to write to it. */
			if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
 8011a0a:	68fb      	ldr	r3, [r7, #12]
 8011a0c:	691b      	ldr	r3, [r3, #16]
 8011a0e:	2b00      	cmp	r3, #0
 8011a10:	d01a      	beq.n	8011a48 <xQueueGenericReset+0xc0>
			{
				if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
 8011a12:	68fb      	ldr	r3, [r7, #12]
 8011a14:	3310      	adds	r3, #16
 8011a16:	4618      	mov	r0, r3
 8011a18:	f002 f922 	bl	8013c60 <xTaskRemoveFromEventList>
 8011a1c:	4603      	mov	r3, r0
 8011a1e:	2b00      	cmp	r3, #0
 8011a20:	d012      	beq.n	8011a48 <xQueueGenericReset+0xc0>
				{
					queueYIELD_IF_USING_PREEMPTION();
 8011a22:	4b0d      	ldr	r3, [pc, #52]	@ (8011a58 <xQueueGenericReset+0xd0>)
 8011a24:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8011a28:	601a      	str	r2, [r3, #0]
 8011a2a:	f3bf 8f4f 	dsb	sy
 8011a2e:	f3bf 8f6f 	isb	sy
 8011a32:	e009      	b.n	8011a48 <xQueueGenericReset+0xc0>
			}
		}
		else
		{
			/* Ensure the event queues start in the correct state. */
			vListInitialise( &( pxQueue->xTasksWaitingToSend ) );
 8011a34:	68fb      	ldr	r3, [r7, #12]
 8011a36:	3310      	adds	r3, #16
 8011a38:	4618      	mov	r0, r3
 8011a3a:	f7ff fef1 	bl	8011820 <vListInitialise>
			vListInitialise( &( pxQueue->xTasksWaitingToReceive ) );
 8011a3e:	68fb      	ldr	r3, [r7, #12]
 8011a40:	3324      	adds	r3, #36	@ 0x24
 8011a42:	4618      	mov	r0, r3
 8011a44:	f7ff feec 	bl	8011820 <vListInitialise>
		}
	}
	taskEXIT_CRITICAL();
 8011a48:	f003 fc98 	bl	801537c <vPortExitCritical>

	/* A value is returned for calling semantic consistency with previous
	versions. */
	return pdPASS;
 8011a4c:	2301      	movs	r3, #1
}
 8011a4e:	4618      	mov	r0, r3
 8011a50:	3710      	adds	r7, #16
 8011a52:	46bd      	mov	sp, r7
 8011a54:	bd80      	pop	{r7, pc}
 8011a56:	bf00      	nop
 8011a58:	e000ed04 	.word	0xe000ed04

08011a5c <xQueueGenericCreateStatic>:
/*-----------------------------------------------------------*/

#if( configSUPPORT_STATIC_ALLOCATION == 1 )

	QueueHandle_t xQueueGenericCreateStatic( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, uint8_t *pucQueueStorage, StaticQueue_t *pxStaticQueue, const uint8_t ucQueueType )
	{
 8011a5c:	b580      	push	{r7, lr}
 8011a5e:	b08e      	sub	sp, #56	@ 0x38
 8011a60:	af02      	add	r7, sp, #8
 8011a62:	60f8      	str	r0, [r7, #12]
 8011a64:	60b9      	str	r1, [r7, #8]
 8011a66:	607a      	str	r2, [r7, #4]
 8011a68:	603b      	str	r3, [r7, #0]
	Queue_t *pxNewQueue;

		configASSERT( uxQueueLength > ( UBaseType_t ) 0 );
 8011a6a:	68fb      	ldr	r3, [r7, #12]
 8011a6c:	2b00      	cmp	r3, #0
 8011a6e:	d10b      	bne.n	8011a88 <xQueueGenericCreateStatic+0x2c>
	__asm volatile
 8011a70:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8011a74:	f383 8811 	msr	BASEPRI, r3
 8011a78:	f3bf 8f6f 	isb	sy
 8011a7c:	f3bf 8f4f 	dsb	sy
 8011a80:	62bb      	str	r3, [r7, #40]	@ 0x28
}
 8011a82:	bf00      	nop
 8011a84:	bf00      	nop
 8011a86:	e7fd      	b.n	8011a84 <xQueueGenericCreateStatic+0x28>

		/* The StaticQueue_t structure and the queue storage area must be
		supplied. */
		configASSERT( pxStaticQueue != NULL );
 8011a88:	683b      	ldr	r3, [r7, #0]
 8011a8a:	2b00      	cmp	r3, #0
 8011a8c:	d10b      	bne.n	8011aa6 <xQueueGenericCreateStatic+0x4a>
	__asm volatile
 8011a8e:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8011a92:	f383 8811 	msr	BASEPRI, r3
 8011a96:	f3bf 8f6f 	isb	sy
 8011a9a:	f3bf 8f4f 	dsb	sy
 8011a9e:	627b      	str	r3, [r7, #36]	@ 0x24
}
 8011aa0:	bf00      	nop
 8011aa2:	bf00      	nop
 8011aa4:	e7fd      	b.n	8011aa2 <xQueueGenericCreateStatic+0x46>

		/* A queue storage area should be provided if the item size is not 0, and
		should not be provided if the item size is 0. */
		configASSERT( !( ( pucQueueStorage != NULL ) && ( uxItemSize == 0 ) ) );
 8011aa6:	687b      	ldr	r3, [r7, #4]
 8011aa8:	2b00      	cmp	r3, #0
 8011aaa:	d002      	beq.n	8011ab2 <xQueueGenericCreateStatic+0x56>
 8011aac:	68bb      	ldr	r3, [r7, #8]
 8011aae:	2b00      	cmp	r3, #0
 8011ab0:	d001      	beq.n	8011ab6 <xQueueGenericCreateStatic+0x5a>
 8011ab2:	2301      	movs	r3, #1
 8011ab4:	e000      	b.n	8011ab8 <xQueueGenericCreateStatic+0x5c>
 8011ab6:	2300      	movs	r3, #0
 8011ab8:	2b00      	cmp	r3, #0
 8011aba:	d10b      	bne.n	8011ad4 <xQueueGenericCreateStatic+0x78>
	__asm volatile
 8011abc:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8011ac0:	f383 8811 	msr	BASEPRI, r3
 8011ac4:	f3bf 8f6f 	isb	sy
 8011ac8:	f3bf 8f4f 	dsb	sy
 8011acc:	623b      	str	r3, [r7, #32]
}
 8011ace:	bf00      	nop
 8011ad0:	bf00      	nop
 8011ad2:	e7fd      	b.n	8011ad0 <xQueueGenericCreateStatic+0x74>
		configASSERT( !( ( pucQueueStorage == NULL ) && ( uxItemSize != 0 ) ) );
 8011ad4:	687b      	ldr	r3, [r7, #4]
 8011ad6:	2b00      	cmp	r3, #0
 8011ad8:	d102      	bne.n	8011ae0 <xQueueGenericCreateStatic+0x84>
 8011ada:	68bb      	ldr	r3, [r7, #8]
 8011adc:	2b00      	cmp	r3, #0
 8011ade:	d101      	bne.n	8011ae4 <xQueueGenericCreateStatic+0x88>
 8011ae0:	2301      	movs	r3, #1
 8011ae2:	e000      	b.n	8011ae6 <xQueueGenericCreateStatic+0x8a>
 8011ae4:	2300      	movs	r3, #0
 8011ae6:	2b00      	cmp	r3, #0
 8011ae8:	d10b      	bne.n	8011b02 <xQueueGenericCreateStatic+0xa6>
	__asm volatile
 8011aea:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8011aee:	f383 8811 	msr	BASEPRI, r3
 8011af2:	f3bf 8f6f 	isb	sy
 8011af6:	f3bf 8f4f 	dsb	sy
 8011afa:	61fb      	str	r3, [r7, #28]
}
 8011afc:	bf00      	nop
 8011afe:	bf00      	nop
 8011b00:	e7fd      	b.n	8011afe <xQueueGenericCreateStatic+0xa2>
		#if( configASSERT_DEFINED == 1 )
		{
			/* Sanity check that the size of the structure used to declare a
			variable of type StaticQueue_t or StaticSemaphore_t equals the size of
			the real queue and semaphore structures. */
			volatile size_t xSize = sizeof( StaticQueue_t );
 8011b02:	2350      	movs	r3, #80	@ 0x50
 8011b04:	617b      	str	r3, [r7, #20]
			configASSERT( xSize == sizeof( Queue_t ) );
 8011b06:	697b      	ldr	r3, [r7, #20]
 8011b08:	2b50      	cmp	r3, #80	@ 0x50
 8011b0a:	d00b      	beq.n	8011b24 <xQueueGenericCreateStatic+0xc8>
	__asm volatile
 8011b0c:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8011b10:	f383 8811 	msr	BASEPRI, r3
 8011b14:	f3bf 8f6f 	isb	sy
 8011b18:	f3bf 8f4f 	dsb	sy
 8011b1c:	61bb      	str	r3, [r7, #24]
}
 8011b1e:	bf00      	nop
 8011b20:	bf00      	nop
 8011b22:	e7fd      	b.n	8011b20 <xQueueGenericCreateStatic+0xc4>
			( void ) xSize; /* Keeps lint quiet when configASSERT() is not defined. */
 8011b24:	697b      	ldr	r3, [r7, #20]
		#endif /* configASSERT_DEFINED */

		/* The address of a statically allocated queue was passed in, use it.
		The address of a statically allocated storage area was also passed in
		but is already set. */
		pxNewQueue = ( Queue_t * ) pxStaticQueue; /*lint !e740 !e9087 Unusual cast is ok as the structures are designed to have the same alignment, and the size is checked by an assert. */
 8011b26:	683b      	ldr	r3, [r7, #0]
 8011b28:	62fb      	str	r3, [r7, #44]	@ 0x2c

		if( pxNewQueue != NULL )
 8011b2a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8011b2c:	2b00      	cmp	r3, #0
 8011b2e:	d00d      	beq.n	8011b4c <xQueueGenericCreateStatic+0xf0>
			#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
			{
				/* Queues can be allocated wither statically or dynamically, so
				note this queue was allocated statically in case the queue is
				later deleted. */
				pxNewQueue->ucStaticallyAllocated = pdTRUE;
 8011b30:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8011b32:	2201      	movs	r2, #1
 8011b34:	f883 2046 	strb.w	r2, [r3, #70]	@ 0x46
			}
			#endif /* configSUPPORT_DYNAMIC_ALLOCATION */

			prvInitialiseNewQueue( uxQueueLength, uxItemSize, pucQueueStorage, ucQueueType, pxNewQueue );
 8011b38:	f897 2038 	ldrb.w	r2, [r7, #56]	@ 0x38
 8011b3c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8011b3e:	9300      	str	r3, [sp, #0]
 8011b40:	4613      	mov	r3, r2
 8011b42:	687a      	ldr	r2, [r7, #4]
 8011b44:	68b9      	ldr	r1, [r7, #8]
 8011b46:	68f8      	ldr	r0, [r7, #12]
 8011b48:	f000 f840 	bl	8011bcc <prvInitialiseNewQueue>
		{
			traceQUEUE_CREATE_FAILED( ucQueueType );
			mtCOVERAGE_TEST_MARKER();
		}

		return pxNewQueue;
 8011b4c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
	}
 8011b4e:	4618      	mov	r0, r3
 8011b50:	3730      	adds	r7, #48	@ 0x30
 8011b52:	46bd      	mov	sp, r7
 8011b54:	bd80      	pop	{r7, pc}

08011b56 <xQueueGenericCreate>:
/*-----------------------------------------------------------*/

#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )

	QueueHandle_t xQueueGenericCreate( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, const uint8_t ucQueueType )
	{
 8011b56:	b580      	push	{r7, lr}
 8011b58:	b08a      	sub	sp, #40	@ 0x28
 8011b5a:	af02      	add	r7, sp, #8
 8011b5c:	60f8      	str	r0, [r7, #12]
 8011b5e:	60b9      	str	r1, [r7, #8]
 8011b60:	4613      	mov	r3, r2
 8011b62:	71fb      	strb	r3, [r7, #7]
	Queue_t *pxNewQueue;
	size_t xQueueSizeInBytes;
	uint8_t *pucQueueStorage;

		configASSERT( uxQueueLength > ( UBaseType_t ) 0 );
 8011b64:	68fb      	ldr	r3, [r7, #12]
 8011b66:	2b00      	cmp	r3, #0
 8011b68:	d10b      	bne.n	8011b82 <xQueueGenericCreate+0x2c>
	__asm volatile
 8011b6a:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8011b6e:	f383 8811 	msr	BASEPRI, r3
 8011b72:	f3bf 8f6f 	isb	sy
 8011b76:	f3bf 8f4f 	dsb	sy
 8011b7a:	613b      	str	r3, [r7, #16]
}
 8011b7c:	bf00      	nop
 8011b7e:	bf00      	nop
 8011b80:	e7fd      	b.n	8011b7e <xQueueGenericCreate+0x28>

		/* Allocate enough space to hold the maximum number of items that
		can be in the queue at any time.  It is valid for uxItemSize to be
		zero in the case the queue is used as a semaphore. */
		xQueueSizeInBytes = ( size_t ) ( uxQueueLength * uxItemSize ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
 8011b82:	68fb      	ldr	r3, [r7, #12]
 8011b84:	68ba      	ldr	r2, [r7, #8]
 8011b86:	fb02 f303 	mul.w	r3, r2, r3
 8011b8a:	61fb      	str	r3, [r7, #28]
		alignment requirements of the Queue_t structure - which in this case
		is an int8_t *.  Therefore, whenever the stack alignment requirements
		are greater than or equal to the pointer to char requirements the cast
		is safe.  In other cases alignment requirements are not strict (one or
		two bytes). */
		pxNewQueue = ( Queue_t * ) pvPortMalloc( sizeof( Queue_t ) + xQueueSizeInBytes ); /*lint !e9087 !e9079 see comment above. */
 8011b8c:	69fb      	ldr	r3, [r7, #28]
 8011b8e:	3350      	adds	r3, #80	@ 0x50
 8011b90:	4618      	mov	r0, r3
 8011b92:	f003 fce3 	bl	801555c <pvPortMalloc>
 8011b96:	61b8      	str	r0, [r7, #24]

		if( pxNewQueue != NULL )
 8011b98:	69bb      	ldr	r3, [r7, #24]
 8011b9a:	2b00      	cmp	r3, #0
 8011b9c:	d011      	beq.n	8011bc2 <xQueueGenericCreate+0x6c>
		{
			/* Jump past the queue structure to find the location of the queue
			storage area. */
			pucQueueStorage = ( uint8_t * ) pxNewQueue;
 8011b9e:	69bb      	ldr	r3, [r7, #24]
 8011ba0:	617b      	str	r3, [r7, #20]
			pucQueueStorage += sizeof( Queue_t ); /*lint !e9016 Pointer arithmetic allowed on char types, especially when it assists conveying intent. */
 8011ba2:	697b      	ldr	r3, [r7, #20]
 8011ba4:	3350      	adds	r3, #80	@ 0x50
 8011ba6:	617b      	str	r3, [r7, #20]
			#if( configSUPPORT_STATIC_ALLOCATION == 1 )
			{
				/* Queues can be created either statically or dynamically, so
				note this task was created dynamically in case it is later
				deleted. */
				pxNewQueue->ucStaticallyAllocated = pdFALSE;
 8011ba8:	69bb      	ldr	r3, [r7, #24]
 8011baa:	2200      	movs	r2, #0
 8011bac:	f883 2046 	strb.w	r2, [r3, #70]	@ 0x46
			}
			#endif /* configSUPPORT_STATIC_ALLOCATION */

			prvInitialiseNewQueue( uxQueueLength, uxItemSize, pucQueueStorage, ucQueueType, pxNewQueue );
 8011bb0:	79fa      	ldrb	r2, [r7, #7]
 8011bb2:	69bb      	ldr	r3, [r7, #24]
 8011bb4:	9300      	str	r3, [sp, #0]
 8011bb6:	4613      	mov	r3, r2
 8011bb8:	697a      	ldr	r2, [r7, #20]
 8011bba:	68b9      	ldr	r1, [r7, #8]
 8011bbc:	68f8      	ldr	r0, [r7, #12]
 8011bbe:	f000 f805 	bl	8011bcc <prvInitialiseNewQueue>
		{
			traceQUEUE_CREATE_FAILED( ucQueueType );
			mtCOVERAGE_TEST_MARKER();
		}

		return pxNewQueue;
 8011bc2:	69bb      	ldr	r3, [r7, #24]
	}
 8011bc4:	4618      	mov	r0, r3
 8011bc6:	3720      	adds	r7, #32
 8011bc8:	46bd      	mov	sp, r7
 8011bca:	bd80      	pop	{r7, pc}

08011bcc <prvInitialiseNewQueue>:

#endif /* configSUPPORT_STATIC_ALLOCATION */
/*-----------------------------------------------------------*/

static void prvInitialiseNewQueue( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, uint8_t *pucQueueStorage, const uint8_t ucQueueType, Queue_t *pxNewQueue )
{
 8011bcc:	b580      	push	{r7, lr}
 8011bce:	b084      	sub	sp, #16
 8011bd0:	af00      	add	r7, sp, #0
 8011bd2:	60f8      	str	r0, [r7, #12]
 8011bd4:	60b9      	str	r1, [r7, #8]
 8011bd6:	607a      	str	r2, [r7, #4]
 8011bd8:	70fb      	strb	r3, [r7, #3]
	/* Remove compiler warnings about unused parameters should
	configUSE_TRACE_FACILITY not be set to 1. */
	( void ) ucQueueType;

	if( uxItemSize == ( UBaseType_t ) 0 )
 8011bda:	68bb      	ldr	r3, [r7, #8]
 8011bdc:	2b00      	cmp	r3, #0
 8011bde:	d103      	bne.n	8011be8 <prvInitialiseNewQueue+0x1c>
	{
		/* No RAM was allocated for the queue storage area, but PC head cannot
		be set to NULL because NULL is used as a key to say the queue is used as
		a mutex.  Therefore just set pcHead to point to the queue as a benign
		value that is known to be within the memory map. */
		pxNewQueue->pcHead = ( int8_t * ) pxNewQueue;
 8011be0:	69bb      	ldr	r3, [r7, #24]
 8011be2:	69ba      	ldr	r2, [r7, #24]
 8011be4:	601a      	str	r2, [r3, #0]
 8011be6:	e002      	b.n	8011bee <prvInitialiseNewQueue+0x22>
	}
	else
	{
		/* Set the head to the start of the queue storage area. */
		pxNewQueue->pcHead = ( int8_t * ) pucQueueStorage;
 8011be8:	69bb      	ldr	r3, [r7, #24]
 8011bea:	687a      	ldr	r2, [r7, #4]
 8011bec:	601a      	str	r2, [r3, #0]
	}

	/* Initialise the queue members as described where the queue type is
	defined. */
	pxNewQueue->uxLength = uxQueueLength;
 8011bee:	69bb      	ldr	r3, [r7, #24]
 8011bf0:	68fa      	ldr	r2, [r7, #12]
 8011bf2:	63da      	str	r2, [r3, #60]	@ 0x3c
	pxNewQueue->uxItemSize = uxItemSize;
 8011bf4:	69bb      	ldr	r3, [r7, #24]
 8011bf6:	68ba      	ldr	r2, [r7, #8]
 8011bf8:	641a      	str	r2, [r3, #64]	@ 0x40
	( void ) xQueueGenericReset( pxNewQueue, pdTRUE );
 8011bfa:	2101      	movs	r1, #1
 8011bfc:	69b8      	ldr	r0, [r7, #24]
 8011bfe:	f7ff fec3 	bl	8011988 <xQueueGenericReset>

	#if ( configUSE_TRACE_FACILITY == 1 )
	{
		pxNewQueue->ucQueueType = ucQueueType;
 8011c02:	69bb      	ldr	r3, [r7, #24]
 8011c04:	78fa      	ldrb	r2, [r7, #3]
 8011c06:	f883 204c 	strb.w	r2, [r3, #76]	@ 0x4c
		pxNewQueue->pxQueueSetContainer = NULL;
	}
	#endif /* configUSE_QUEUE_SETS */

	traceQUEUE_CREATE( pxNewQueue );
}
 8011c0a:	bf00      	nop
 8011c0c:	3710      	adds	r7, #16
 8011c0e:	46bd      	mov	sp, r7
 8011c10:	bd80      	pop	{r7, pc}

08011c12 <prvInitialiseMutex>:
/*-----------------------------------------------------------*/

#if( configUSE_MUTEXES == 1 )

	static void prvInitialiseMutex( Queue_t *pxNewQueue )
	{
 8011c12:	b580      	push	{r7, lr}
 8011c14:	b082      	sub	sp, #8
 8011c16:	af00      	add	r7, sp, #0
 8011c18:	6078      	str	r0, [r7, #4]
		if( pxNewQueue != NULL )
 8011c1a:	687b      	ldr	r3, [r7, #4]
 8011c1c:	2b00      	cmp	r3, #0
 8011c1e:	d00e      	beq.n	8011c3e <prvInitialiseMutex+0x2c>
		{
			/* The queue create function will set all the queue structure members
			correctly for a generic queue, but this function is creating a
			mutex.  Overwrite those members that need to be set differently -
			in particular the information required for priority inheritance. */
			pxNewQueue->u.xSemaphore.xMutexHolder = NULL;
 8011c20:	687b      	ldr	r3, [r7, #4]
 8011c22:	2200      	movs	r2, #0
 8011c24:	609a      	str	r2, [r3, #8]
			pxNewQueue->uxQueueType = queueQUEUE_IS_MUTEX;
 8011c26:	687b      	ldr	r3, [r7, #4]
 8011c28:	2200      	movs	r2, #0
 8011c2a:	601a      	str	r2, [r3, #0]

			/* In case this is a recursive mutex. */
			pxNewQueue->u.xSemaphore.uxRecursiveCallCount = 0;
 8011c2c:	687b      	ldr	r3, [r7, #4]
 8011c2e:	2200      	movs	r2, #0
 8011c30:	60da      	str	r2, [r3, #12]

			traceCREATE_MUTEX( pxNewQueue );

			/* Start with the semaphore in the expected state. */
			( void ) xQueueGenericSend( pxNewQueue, NULL, ( TickType_t ) 0U, queueSEND_TO_BACK );
 8011c32:	2300      	movs	r3, #0
 8011c34:	2200      	movs	r2, #0
 8011c36:	2100      	movs	r1, #0
 8011c38:	6878      	ldr	r0, [r7, #4]
 8011c3a:	f000 f911 	bl	8011e60 <xQueueGenericSend>
		}
		else
		{
			traceCREATE_MUTEX_FAILED();
		}
	}
 8011c3e:	bf00      	nop
 8011c40:	3708      	adds	r7, #8
 8011c42:	46bd      	mov	sp, r7
 8011c44:	bd80      	pop	{r7, pc}

08011c46 <xQueueCreateMutex>:
/*-----------------------------------------------------------*/

#if( ( configUSE_MUTEXES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )

	QueueHandle_t xQueueCreateMutex( const uint8_t ucQueueType )
	{
 8011c46:	b580      	push	{r7, lr}
 8011c48:	b086      	sub	sp, #24
 8011c4a:	af00      	add	r7, sp, #0
 8011c4c:	4603      	mov	r3, r0
 8011c4e:	71fb      	strb	r3, [r7, #7]
	QueueHandle_t xNewQueue;
	const UBaseType_t uxMutexLength = ( UBaseType_t ) 1, uxMutexSize = ( UBaseType_t ) 0;
 8011c50:	2301      	movs	r3, #1
 8011c52:	617b      	str	r3, [r7, #20]
 8011c54:	2300      	movs	r3, #0
 8011c56:	613b      	str	r3, [r7, #16]

		xNewQueue = xQueueGenericCreate( uxMutexLength, uxMutexSize, ucQueueType );
 8011c58:	79fb      	ldrb	r3, [r7, #7]
 8011c5a:	461a      	mov	r2, r3
 8011c5c:	6939      	ldr	r1, [r7, #16]
 8011c5e:	6978      	ldr	r0, [r7, #20]
 8011c60:	f7ff ff79 	bl	8011b56 <xQueueGenericCreate>
 8011c64:	60f8      	str	r0, [r7, #12]
		prvInitialiseMutex( ( Queue_t * ) xNewQueue );
 8011c66:	68f8      	ldr	r0, [r7, #12]
 8011c68:	f7ff ffd3 	bl	8011c12 <prvInitialiseMutex>

		return xNewQueue;
 8011c6c:	68fb      	ldr	r3, [r7, #12]
	}
 8011c6e:	4618      	mov	r0, r3
 8011c70:	3718      	adds	r7, #24
 8011c72:	46bd      	mov	sp, r7
 8011c74:	bd80      	pop	{r7, pc}

08011c76 <xQueueCreateMutexStatic>:
/*-----------------------------------------------------------*/

#if( ( configUSE_MUTEXES == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )

	QueueHandle_t xQueueCreateMutexStatic( const uint8_t ucQueueType, StaticQueue_t *pxStaticQueue )
	{
 8011c76:	b580      	push	{r7, lr}
 8011c78:	b088      	sub	sp, #32
 8011c7a:	af02      	add	r7, sp, #8
 8011c7c:	4603      	mov	r3, r0
 8011c7e:	6039      	str	r1, [r7, #0]
 8011c80:	71fb      	strb	r3, [r7, #7]
	QueueHandle_t xNewQueue;
	const UBaseType_t uxMutexLength = ( UBaseType_t ) 1, uxMutexSize = ( UBaseType_t ) 0;
 8011c82:	2301      	movs	r3, #1
 8011c84:	617b      	str	r3, [r7, #20]
 8011c86:	2300      	movs	r3, #0
 8011c88:	613b      	str	r3, [r7, #16]

		/* Prevent compiler warnings about unused parameters if
		configUSE_TRACE_FACILITY does not equal 1. */
		( void ) ucQueueType;

		xNewQueue = xQueueGenericCreateStatic( uxMutexLength, uxMutexSize, NULL, pxStaticQueue, ucQueueType );
 8011c8a:	79fb      	ldrb	r3, [r7, #7]
 8011c8c:	9300      	str	r3, [sp, #0]
 8011c8e:	683b      	ldr	r3, [r7, #0]
 8011c90:	2200      	movs	r2, #0
 8011c92:	6939      	ldr	r1, [r7, #16]
 8011c94:	6978      	ldr	r0, [r7, #20]
 8011c96:	f7ff fee1 	bl	8011a5c <xQueueGenericCreateStatic>
 8011c9a:	60f8      	str	r0, [r7, #12]
		prvInitialiseMutex( ( Queue_t * ) xNewQueue );
 8011c9c:	68f8      	ldr	r0, [r7, #12]
 8011c9e:	f7ff ffb8 	bl	8011c12 <prvInitialiseMutex>

		return xNewQueue;
 8011ca2:	68fb      	ldr	r3, [r7, #12]
	}
 8011ca4:	4618      	mov	r0, r3
 8011ca6:	3718      	adds	r7, #24
 8011ca8:	46bd      	mov	sp, r7
 8011caa:	bd80      	pop	{r7, pc}

08011cac <xQueueGiveMutexRecursive>:
/*-----------------------------------------------------------*/

#if ( configUSE_RECURSIVE_MUTEXES == 1 )

	BaseType_t xQueueGiveMutexRecursive( QueueHandle_t xMutex )
	{
 8011cac:	b590      	push	{r4, r7, lr}
 8011cae:	b087      	sub	sp, #28
 8011cb0:	af00      	add	r7, sp, #0
 8011cb2:	6078      	str	r0, [r7, #4]
	BaseType_t xReturn;
	Queue_t * const pxMutex = ( Queue_t * ) xMutex;
 8011cb4:	687b      	ldr	r3, [r7, #4]
 8011cb6:	613b      	str	r3, [r7, #16]

		configASSERT( pxMutex );
 8011cb8:	693b      	ldr	r3, [r7, #16]
 8011cba:	2b00      	cmp	r3, #0
 8011cbc:	d10b      	bne.n	8011cd6 <xQueueGiveMutexRecursive+0x2a>
	__asm volatile
 8011cbe:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8011cc2:	f383 8811 	msr	BASEPRI, r3
 8011cc6:	f3bf 8f6f 	isb	sy
 8011cca:	f3bf 8f4f 	dsb	sy
 8011cce:	60fb      	str	r3, [r7, #12]
}
 8011cd0:	bf00      	nop
 8011cd2:	bf00      	nop
 8011cd4:	e7fd      	b.n	8011cd2 <xQueueGiveMutexRecursive+0x26>
		change outside of this task.  If this task does not hold the mutex then
		pxMutexHolder can never coincidentally equal the tasks handle, and as
		this is the only condition we are interested in it does not matter if
		pxMutexHolder is accessed simultaneously by another task.  Therefore no
		mutual exclusion is required to test the pxMutexHolder variable. */
		if( pxMutex->u.xSemaphore.xMutexHolder == xTaskGetCurrentTaskHandle() )
 8011cd6:	693b      	ldr	r3, [r7, #16]
 8011cd8:	689c      	ldr	r4, [r3, #8]
 8011cda:	f002 f9af 	bl	801403c <xTaskGetCurrentTaskHandle>
 8011cde:	4603      	mov	r3, r0
 8011ce0:	429c      	cmp	r4, r3
 8011ce2:	d111      	bne.n	8011d08 <xQueueGiveMutexRecursive+0x5c>
			/* uxRecursiveCallCount cannot be zero if xMutexHolder is equal to
			the task handle, therefore no underflow check is required.  Also,
			uxRecursiveCallCount is only modified by the mutex holder, and as
			there can only be one, no mutual exclusion is required to modify the
			uxRecursiveCallCount member. */
			( pxMutex->u.xSemaphore.uxRecursiveCallCount )--;
 8011ce4:	693b      	ldr	r3, [r7, #16]
 8011ce6:	68db      	ldr	r3, [r3, #12]
 8011ce8:	1e5a      	subs	r2, r3, #1
 8011cea:	693b      	ldr	r3, [r7, #16]
 8011cec:	60da      	str	r2, [r3, #12]

			/* Has the recursive call count unwound to 0? */
			if( pxMutex->u.xSemaphore.uxRecursiveCallCount == ( UBaseType_t ) 0 )
 8011cee:	693b      	ldr	r3, [r7, #16]
 8011cf0:	68db      	ldr	r3, [r3, #12]
 8011cf2:	2b00      	cmp	r3, #0
 8011cf4:	d105      	bne.n	8011d02 <xQueueGiveMutexRecursive+0x56>
			{
				/* Return the mutex.  This will automatically unblock any other
				task that might be waiting to access the mutex. */
				( void ) xQueueGenericSend( pxMutex, NULL, queueMUTEX_GIVE_BLOCK_TIME, queueSEND_TO_BACK );
 8011cf6:	2300      	movs	r3, #0
 8011cf8:	2200      	movs	r2, #0
 8011cfa:	2100      	movs	r1, #0
 8011cfc:	6938      	ldr	r0, [r7, #16]
 8011cfe:	f000 f8af 	bl	8011e60 <xQueueGenericSend>
			else
			{
				mtCOVERAGE_TEST_MARKER();
			}

			xReturn = pdPASS;
 8011d02:	2301      	movs	r3, #1
 8011d04:	617b      	str	r3, [r7, #20]
 8011d06:	e001      	b.n	8011d0c <xQueueGiveMutexRecursive+0x60>
		}
		else
		{
			/* The mutex cannot be given because the calling task is not the
			holder. */
			xReturn = pdFAIL;
 8011d08:	2300      	movs	r3, #0
 8011d0a:	617b      	str	r3, [r7, #20]

			traceGIVE_MUTEX_RECURSIVE_FAILED( pxMutex );
		}

		return xReturn;
 8011d0c:	697b      	ldr	r3, [r7, #20]
	}
 8011d0e:	4618      	mov	r0, r3
 8011d10:	371c      	adds	r7, #28
 8011d12:	46bd      	mov	sp, r7
 8011d14:	bd90      	pop	{r4, r7, pc}

08011d16 <xQueueTakeMutexRecursive>:
/*-----------------------------------------------------------*/

#if ( configUSE_RECURSIVE_MUTEXES == 1 )

	BaseType_t xQueueTakeMutexRecursive( QueueHandle_t xMutex, TickType_t xTicksToWait )
	{
 8011d16:	b590      	push	{r4, r7, lr}
 8011d18:	b087      	sub	sp, #28
 8011d1a:	af00      	add	r7, sp, #0
 8011d1c:	6078      	str	r0, [r7, #4]
 8011d1e:	6039      	str	r1, [r7, #0]
	BaseType_t xReturn;
	Queue_t * const pxMutex = ( Queue_t * ) xMutex;
 8011d20:	687b      	ldr	r3, [r7, #4]
 8011d22:	613b      	str	r3, [r7, #16]

		configASSERT( pxMutex );
 8011d24:	693b      	ldr	r3, [r7, #16]
 8011d26:	2b00      	cmp	r3, #0
 8011d28:	d10b      	bne.n	8011d42 <xQueueTakeMutexRecursive+0x2c>
	__asm volatile
 8011d2a:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8011d2e:	f383 8811 	msr	BASEPRI, r3
 8011d32:	f3bf 8f6f 	isb	sy
 8011d36:	f3bf 8f4f 	dsb	sy
 8011d3a:	60fb      	str	r3, [r7, #12]
}
 8011d3c:	bf00      	nop
 8011d3e:	bf00      	nop
 8011d40:	e7fd      	b.n	8011d3e <xQueueTakeMutexRecursive+0x28>
		/* Comments regarding mutual exclusion as per those within
		xQueueGiveMutexRecursive(). */

		traceTAKE_MUTEX_RECURSIVE( pxMutex );

		if( pxMutex->u.xSemaphore.xMutexHolder == xTaskGetCurrentTaskHandle() )
 8011d42:	693b      	ldr	r3, [r7, #16]
 8011d44:	689c      	ldr	r4, [r3, #8]
 8011d46:	f002 f979 	bl	801403c <xTaskGetCurrentTaskHandle>
 8011d4a:	4603      	mov	r3, r0
 8011d4c:	429c      	cmp	r4, r3
 8011d4e:	d107      	bne.n	8011d60 <xQueueTakeMutexRecursive+0x4a>
		{
			( pxMutex->u.xSemaphore.uxRecursiveCallCount )++;
 8011d50:	693b      	ldr	r3, [r7, #16]
 8011d52:	68db      	ldr	r3, [r3, #12]
 8011d54:	1c5a      	adds	r2, r3, #1
 8011d56:	693b      	ldr	r3, [r7, #16]
 8011d58:	60da      	str	r2, [r3, #12]
			xReturn = pdPASS;
 8011d5a:	2301      	movs	r3, #1
 8011d5c:	617b      	str	r3, [r7, #20]
 8011d5e:	e00c      	b.n	8011d7a <xQueueTakeMutexRecursive+0x64>
		}
		else
		{
			xReturn = xQueueSemaphoreTake( pxMutex, xTicksToWait );
 8011d60:	6839      	ldr	r1, [r7, #0]
 8011d62:	6938      	ldr	r0, [r7, #16]
 8011d64:	f000 fb8e 	bl	8012484 <xQueueSemaphoreTake>
 8011d68:	6178      	str	r0, [r7, #20]

			/* pdPASS will only be returned if the mutex was successfully
			obtained.  The calling task may have entered the Blocked state
			before reaching here. */
			if( xReturn != pdFAIL )
 8011d6a:	697b      	ldr	r3, [r7, #20]
 8011d6c:	2b00      	cmp	r3, #0
 8011d6e:	d004      	beq.n	8011d7a <xQueueTakeMutexRecursive+0x64>
			{
				( pxMutex->u.xSemaphore.uxRecursiveCallCount )++;
 8011d70:	693b      	ldr	r3, [r7, #16]
 8011d72:	68db      	ldr	r3, [r3, #12]
 8011d74:	1c5a      	adds	r2, r3, #1
 8011d76:	693b      	ldr	r3, [r7, #16]
 8011d78:	60da      	str	r2, [r3, #12]
			{
				traceTAKE_MUTEX_RECURSIVE_FAILED( pxMutex );
			}
		}

		return xReturn;
 8011d7a:	697b      	ldr	r3, [r7, #20]
	}
 8011d7c:	4618      	mov	r0, r3
 8011d7e:	371c      	adds	r7, #28
 8011d80:	46bd      	mov	sp, r7
 8011d82:	bd90      	pop	{r4, r7, pc}

08011d84 <xQueueCreateCountingSemaphoreStatic>:
/*-----------------------------------------------------------*/

#if( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )

	QueueHandle_t xQueueCreateCountingSemaphoreStatic( const UBaseType_t uxMaxCount, const UBaseType_t uxInitialCount, StaticQueue_t *pxStaticQueue )
	{
 8011d84:	b580      	push	{r7, lr}
 8011d86:	b08a      	sub	sp, #40	@ 0x28
 8011d88:	af02      	add	r7, sp, #8
 8011d8a:	60f8      	str	r0, [r7, #12]
 8011d8c:	60b9      	str	r1, [r7, #8]
 8011d8e:	607a      	str	r2, [r7, #4]
	QueueHandle_t xHandle;

		configASSERT( uxMaxCount != 0 );
 8011d90:	68fb      	ldr	r3, [r7, #12]
 8011d92:	2b00      	cmp	r3, #0
 8011d94:	d10b      	bne.n	8011dae <xQueueCreateCountingSemaphoreStatic+0x2a>
	__asm volatile
 8011d96:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8011d9a:	f383 8811 	msr	BASEPRI, r3
 8011d9e:	f3bf 8f6f 	isb	sy
 8011da2:	f3bf 8f4f 	dsb	sy
 8011da6:	61bb      	str	r3, [r7, #24]
}
 8011da8:	bf00      	nop
 8011daa:	bf00      	nop
 8011dac:	e7fd      	b.n	8011daa <xQueueCreateCountingSemaphoreStatic+0x26>
		configASSERT( uxInitialCount <= uxMaxCount );
 8011dae:	68ba      	ldr	r2, [r7, #8]
 8011db0:	68fb      	ldr	r3, [r7, #12]
 8011db2:	429a      	cmp	r2, r3
 8011db4:	d90b      	bls.n	8011dce <xQueueCreateCountingSemaphoreStatic+0x4a>
	__asm volatile
 8011db6:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8011dba:	f383 8811 	msr	BASEPRI, r3
 8011dbe:	f3bf 8f6f 	isb	sy
 8011dc2:	f3bf 8f4f 	dsb	sy
 8011dc6:	617b      	str	r3, [r7, #20]
}
 8011dc8:	bf00      	nop
 8011dca:	bf00      	nop
 8011dcc:	e7fd      	b.n	8011dca <xQueueCreateCountingSemaphoreStatic+0x46>

		xHandle = xQueueGenericCreateStatic( uxMaxCount, queueSEMAPHORE_QUEUE_ITEM_LENGTH, NULL, pxStaticQueue, queueQUEUE_TYPE_COUNTING_SEMAPHORE );
 8011dce:	2302      	movs	r3, #2
 8011dd0:	9300      	str	r3, [sp, #0]
 8011dd2:	687b      	ldr	r3, [r7, #4]
 8011dd4:	2200      	movs	r2, #0
 8011dd6:	2100      	movs	r1, #0
 8011dd8:	68f8      	ldr	r0, [r7, #12]
 8011dda:	f7ff fe3f 	bl	8011a5c <xQueueGenericCreateStatic>
 8011dde:	61f8      	str	r0, [r7, #28]

		if( xHandle != NULL )
 8011de0:	69fb      	ldr	r3, [r7, #28]
 8011de2:	2b00      	cmp	r3, #0
 8011de4:	d002      	beq.n	8011dec <xQueueCreateCountingSemaphoreStatic+0x68>
		{
			( ( Queue_t * ) xHandle )->uxMessagesWaiting = uxInitialCount;
 8011de6:	69fb      	ldr	r3, [r7, #28]
 8011de8:	68ba      	ldr	r2, [r7, #8]
 8011dea:	639a      	str	r2, [r3, #56]	@ 0x38
		else
		{
			traceCREATE_COUNTING_SEMAPHORE_FAILED();
		}

		return xHandle;
 8011dec:	69fb      	ldr	r3, [r7, #28]
	}
 8011dee:	4618      	mov	r0, r3
 8011df0:	3720      	adds	r7, #32
 8011df2:	46bd      	mov	sp, r7
 8011df4:	bd80      	pop	{r7, pc}

08011df6 <xQueueCreateCountingSemaphore>:
/*-----------------------------------------------------------*/

#if( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )

	QueueHandle_t xQueueCreateCountingSemaphore( const UBaseType_t uxMaxCount, const UBaseType_t uxInitialCount )
	{
 8011df6:	b580      	push	{r7, lr}
 8011df8:	b086      	sub	sp, #24
 8011dfa:	af00      	add	r7, sp, #0
 8011dfc:	6078      	str	r0, [r7, #4]
 8011dfe:	6039      	str	r1, [r7, #0]
	QueueHandle_t xHandle;

		configASSERT( uxMaxCount != 0 );
 8011e00:	687b      	ldr	r3, [r7, #4]
 8011e02:	2b00      	cmp	r3, #0
 8011e04:	d10b      	bne.n	8011e1e <xQueueCreateCountingSemaphore+0x28>
	__asm volatile
 8011e06:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8011e0a:	f383 8811 	msr	BASEPRI, r3
 8011e0e:	f3bf 8f6f 	isb	sy
 8011e12:	f3bf 8f4f 	dsb	sy
 8011e16:	613b      	str	r3, [r7, #16]
}
 8011e18:	bf00      	nop
 8011e1a:	bf00      	nop
 8011e1c:	e7fd      	b.n	8011e1a <xQueueCreateCountingSemaphore+0x24>
		configASSERT( uxInitialCount <= uxMaxCount );
 8011e1e:	683a      	ldr	r2, [r7, #0]
 8011e20:	687b      	ldr	r3, [r7, #4]
 8011e22:	429a      	cmp	r2, r3
 8011e24:	d90b      	bls.n	8011e3e <xQueueCreateCountingSemaphore+0x48>
	__asm volatile
 8011e26:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8011e2a:	f383 8811 	msr	BASEPRI, r3
 8011e2e:	f3bf 8f6f 	isb	sy
 8011e32:	f3bf 8f4f 	dsb	sy
 8011e36:	60fb      	str	r3, [r7, #12]
}
 8011e38:	bf00      	nop
 8011e3a:	bf00      	nop
 8011e3c:	e7fd      	b.n	8011e3a <xQueueCreateCountingSemaphore+0x44>

		xHandle = xQueueGenericCreate( uxMaxCount, queueSEMAPHORE_QUEUE_ITEM_LENGTH, queueQUEUE_TYPE_COUNTING_SEMAPHORE );
 8011e3e:	2202      	movs	r2, #2
 8011e40:	2100      	movs	r1, #0
 8011e42:	6878      	ldr	r0, [r7, #4]
 8011e44:	f7ff fe87 	bl	8011b56 <xQueueGenericCreate>
 8011e48:	6178      	str	r0, [r7, #20]

		if( xHandle != NULL )
 8011e4a:	697b      	ldr	r3, [r7, #20]
 8011e4c:	2b00      	cmp	r3, #0
 8011e4e:	d002      	beq.n	8011e56 <xQueueCreateCountingSemaphore+0x60>
		{
			( ( Queue_t * ) xHandle )->uxMessagesWaiting = uxInitialCount;
 8011e50:	697b      	ldr	r3, [r7, #20]
 8011e52:	683a      	ldr	r2, [r7, #0]
 8011e54:	639a      	str	r2, [r3, #56]	@ 0x38
		else
		{
			traceCREATE_COUNTING_SEMAPHORE_FAILED();
		}

		return xHandle;
 8011e56:	697b      	ldr	r3, [r7, #20]
	}
 8011e58:	4618      	mov	r0, r3
 8011e5a:	3718      	adds	r7, #24
 8011e5c:	46bd      	mov	sp, r7
 8011e5e:	bd80      	pop	{r7, pc}

08011e60 <xQueueGenericSend>:

#endif /* ( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) */
/*-----------------------------------------------------------*/

BaseType_t xQueueGenericSend( QueueHandle_t xQueue, const void * const pvItemToQueue, TickType_t xTicksToWait, const BaseType_t xCopyPosition )
{
 8011e60:	b580      	push	{r7, lr}
 8011e62:	b08e      	sub	sp, #56	@ 0x38
 8011e64:	af00      	add	r7, sp, #0
 8011e66:	60f8      	str	r0, [r7, #12]
 8011e68:	60b9      	str	r1, [r7, #8]
 8011e6a:	607a      	str	r2, [r7, #4]
 8011e6c:	603b      	str	r3, [r7, #0]
BaseType_t xEntryTimeSet = pdFALSE, xYieldRequired;
 8011e6e:	2300      	movs	r3, #0
 8011e70:	637b      	str	r3, [r7, #52]	@ 0x34
TimeOut_t xTimeOut;
Queue_t * const pxQueue = xQueue;
 8011e72:	68fb      	ldr	r3, [r7, #12]
 8011e74:	633b      	str	r3, [r7, #48]	@ 0x30

	configASSERT( pxQueue );
 8011e76:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8011e78:	2b00      	cmp	r3, #0
 8011e7a:	d10b      	bne.n	8011e94 <xQueueGenericSend+0x34>
	__asm volatile
 8011e7c:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8011e80:	f383 8811 	msr	BASEPRI, r3
 8011e84:	f3bf 8f6f 	isb	sy
 8011e88:	f3bf 8f4f 	dsb	sy
 8011e8c:	62bb      	str	r3, [r7, #40]	@ 0x28
}
 8011e8e:	bf00      	nop
 8011e90:	bf00      	nop
 8011e92:	e7fd      	b.n	8011e90 <xQueueGenericSend+0x30>
	configASSERT( !( ( pvItemToQueue == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) );
 8011e94:	68bb      	ldr	r3, [r7, #8]
 8011e96:	2b00      	cmp	r3, #0
 8011e98:	d103      	bne.n	8011ea2 <xQueueGenericSend+0x42>
 8011e9a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8011e9c:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8011e9e:	2b00      	cmp	r3, #0
 8011ea0:	d101      	bne.n	8011ea6 <xQueueGenericSend+0x46>
 8011ea2:	2301      	movs	r3, #1
 8011ea4:	e000      	b.n	8011ea8 <xQueueGenericSend+0x48>
 8011ea6:	2300      	movs	r3, #0
 8011ea8:	2b00      	cmp	r3, #0
 8011eaa:	d10b      	bne.n	8011ec4 <xQueueGenericSend+0x64>
	__asm volatile
 8011eac:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8011eb0:	f383 8811 	msr	BASEPRI, r3
 8011eb4:	f3bf 8f6f 	isb	sy
 8011eb8:	f3bf 8f4f 	dsb	sy
 8011ebc:	627b      	str	r3, [r7, #36]	@ 0x24
}
 8011ebe:	bf00      	nop
 8011ec0:	bf00      	nop
 8011ec2:	e7fd      	b.n	8011ec0 <xQueueGenericSend+0x60>
	configASSERT( !( ( xCopyPosition == queueOVERWRITE ) && ( pxQueue->uxLength != 1 ) ) );
 8011ec4:	683b      	ldr	r3, [r7, #0]
 8011ec6:	2b02      	cmp	r3, #2
 8011ec8:	d103      	bne.n	8011ed2 <xQueueGenericSend+0x72>
 8011eca:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8011ecc:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 8011ece:	2b01      	cmp	r3, #1
 8011ed0:	d101      	bne.n	8011ed6 <xQueueGenericSend+0x76>
 8011ed2:	2301      	movs	r3, #1
 8011ed4:	e000      	b.n	8011ed8 <xQueueGenericSend+0x78>
 8011ed6:	2300      	movs	r3, #0
 8011ed8:	2b00      	cmp	r3, #0
 8011eda:	d10b      	bne.n	8011ef4 <xQueueGenericSend+0x94>
	__asm volatile
 8011edc:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8011ee0:	f383 8811 	msr	BASEPRI, r3
 8011ee4:	f3bf 8f6f 	isb	sy
 8011ee8:	f3bf 8f4f 	dsb	sy
 8011eec:	623b      	str	r3, [r7, #32]
}
 8011eee:	bf00      	nop
 8011ef0:	bf00      	nop
 8011ef2:	e7fd      	b.n	8011ef0 <xQueueGenericSend+0x90>
	#if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )
	{
		configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) );
 8011ef4:	f002 f8b2 	bl	801405c <xTaskGetSchedulerState>
 8011ef8:	4603      	mov	r3, r0
 8011efa:	2b00      	cmp	r3, #0
 8011efc:	d102      	bne.n	8011f04 <xQueueGenericSend+0xa4>
 8011efe:	687b      	ldr	r3, [r7, #4]
 8011f00:	2b00      	cmp	r3, #0
 8011f02:	d101      	bne.n	8011f08 <xQueueGenericSend+0xa8>
 8011f04:	2301      	movs	r3, #1
 8011f06:	e000      	b.n	8011f0a <xQueueGenericSend+0xaa>
 8011f08:	2300      	movs	r3, #0
 8011f0a:	2b00      	cmp	r3, #0
 8011f0c:	d10b      	bne.n	8011f26 <xQueueGenericSend+0xc6>
	__asm volatile
 8011f0e:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8011f12:	f383 8811 	msr	BASEPRI, r3
 8011f16:	f3bf 8f6f 	isb	sy
 8011f1a:	f3bf 8f4f 	dsb	sy
 8011f1e:	61fb      	str	r3, [r7, #28]
}
 8011f20:	bf00      	nop
 8011f22:	bf00      	nop
 8011f24:	e7fd      	b.n	8011f22 <xQueueGenericSend+0xc2>
	/*lint -save -e904 This function relaxes the coding standard somewhat to
	allow return statements within the function itself.  This is done in the
	interest of execution time efficiency. */
	for( ;; )
	{
		taskENTER_CRITICAL();
 8011f26:	f003 f9f7 	bl	8015318 <vPortEnterCritical>
		{
			/* Is there room on the queue now?  The running task must be the
			highest priority task wanting to access the queue.  If the head item
			in the queue is to be overwritten then it does not matter if the
			queue is full. */
			if( ( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) || ( xCopyPosition == queueOVERWRITE ) )
 8011f2a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8011f2c:	6b9a      	ldr	r2, [r3, #56]	@ 0x38
 8011f2e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8011f30:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 8011f32:	429a      	cmp	r2, r3
 8011f34:	d302      	bcc.n	8011f3c <xQueueGenericSend+0xdc>
 8011f36:	683b      	ldr	r3, [r7, #0]
 8011f38:	2b02      	cmp	r3, #2
 8011f3a:	d129      	bne.n	8011f90 <xQueueGenericSend+0x130>
						}
					}
				}
				#else /* configUSE_QUEUE_SETS */
				{
					xYieldRequired = prvCopyDataToQueue( pxQueue, pvItemToQueue, xCopyPosition );
 8011f3c:	683a      	ldr	r2, [r7, #0]
 8011f3e:	68b9      	ldr	r1, [r7, #8]
 8011f40:	6b38      	ldr	r0, [r7, #48]	@ 0x30
 8011f42:	f000 fcab 	bl	801289c <prvCopyDataToQueue>
 8011f46:	62f8      	str	r0, [r7, #44]	@ 0x2c

					/* If there was a task waiting for data to arrive on the
					queue then unblock it now. */
					if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
 8011f48:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8011f4a:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8011f4c:	2b00      	cmp	r3, #0
 8011f4e:	d010      	beq.n	8011f72 <xQueueGenericSend+0x112>
					{
						if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
 8011f50:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8011f52:	3324      	adds	r3, #36	@ 0x24
 8011f54:	4618      	mov	r0, r3
 8011f56:	f001 fe83 	bl	8013c60 <xTaskRemoveFromEventList>
 8011f5a:	4603      	mov	r3, r0
 8011f5c:	2b00      	cmp	r3, #0
 8011f5e:	d013      	beq.n	8011f88 <xQueueGenericSend+0x128>
						{
							/* The unblocked task has a priority higher than
							our own so yield immediately.  Yes it is ok to do
							this from within the critical section - the kernel
							takes care of that. */
							queueYIELD_IF_USING_PREEMPTION();
 8011f60:	4b3f      	ldr	r3, [pc, #252]	@ (8012060 <xQueueGenericSend+0x200>)
 8011f62:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8011f66:	601a      	str	r2, [r3, #0]
 8011f68:	f3bf 8f4f 	dsb	sy
 8011f6c:	f3bf 8f6f 	isb	sy
 8011f70:	e00a      	b.n	8011f88 <xQueueGenericSend+0x128>
						else
						{
							mtCOVERAGE_TEST_MARKER();
						}
					}
					else if( xYieldRequired != pdFALSE )
 8011f72:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8011f74:	2b00      	cmp	r3, #0
 8011f76:	d007      	beq.n	8011f88 <xQueueGenericSend+0x128>
					{
						/* This path is a special case that will only get
						executed if the task was holding multiple mutexes and
						the mutexes were given back in an order that is
						different to that in which they were taken. */
						queueYIELD_IF_USING_PREEMPTION();
 8011f78:	4b39      	ldr	r3, [pc, #228]	@ (8012060 <xQueueGenericSend+0x200>)
 8011f7a:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8011f7e:	601a      	str	r2, [r3, #0]
 8011f80:	f3bf 8f4f 	dsb	sy
 8011f84:	f3bf 8f6f 	isb	sy
						mtCOVERAGE_TEST_MARKER();
					}
				}
				#endif /* configUSE_QUEUE_SETS */

				taskEXIT_CRITICAL();
 8011f88:	f003 f9f8 	bl	801537c <vPortExitCritical>
				return pdPASS;
 8011f8c:	2301      	movs	r3, #1
 8011f8e:	e063      	b.n	8012058 <xQueueGenericSend+0x1f8>
			}
			else
			{
				if( xTicksToWait == ( TickType_t ) 0 )
 8011f90:	687b      	ldr	r3, [r7, #4]
 8011f92:	2b00      	cmp	r3, #0
 8011f94:	d103      	bne.n	8011f9e <xQueueGenericSend+0x13e>
				{
					/* The queue was full and no block time is specified (or
					the block time has expired) so leave now. */
					taskEXIT_CRITICAL();
 8011f96:	f003 f9f1 	bl	801537c <vPortExitCritical>

					/* Return to the original privilege level before exiting
					the function. */
					traceQUEUE_SEND_FAILED( pxQueue );
					return errQUEUE_FULL;
 8011f9a:	2300      	movs	r3, #0
 8011f9c:	e05c      	b.n	8012058 <xQueueGenericSend+0x1f8>
				}
				else if( xEntryTimeSet == pdFALSE )
 8011f9e:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8011fa0:	2b00      	cmp	r3, #0
 8011fa2:	d106      	bne.n	8011fb2 <xQueueGenericSend+0x152>
				{
					/* The queue was full and a block time was specified so
					configure the timeout structure. */
					vTaskInternalSetTimeOutState( &xTimeOut );
 8011fa4:	f107 0314 	add.w	r3, r7, #20
 8011fa8:	4618      	mov	r0, r3
 8011faa:	f001 fee5 	bl	8013d78 <vTaskInternalSetTimeOutState>
					xEntryTimeSet = pdTRUE;
 8011fae:	2301      	movs	r3, #1
 8011fb0:	637b      	str	r3, [r7, #52]	@ 0x34
					/* Entry time was already set. */
					mtCOVERAGE_TEST_MARKER();
				}
			}
		}
		taskEXIT_CRITICAL();
 8011fb2:	f003 f9e3 	bl	801537c <vPortExitCritical>

		/* Interrupts and other tasks can send to and receive from the queue
		now the critical section has been exited. */

		vTaskSuspendAll();
 8011fb6:	f001 fc05 	bl	80137c4 <vTaskSuspendAll>
		prvLockQueue( pxQueue );
 8011fba:	f003 f9ad 	bl	8015318 <vPortEnterCritical>
 8011fbe:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8011fc0:	f893 3044 	ldrb.w	r3, [r3, #68]	@ 0x44
 8011fc4:	b25b      	sxtb	r3, r3
 8011fc6:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8011fca:	d103      	bne.n	8011fd4 <xQueueGenericSend+0x174>
 8011fcc:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8011fce:	2200      	movs	r2, #0
 8011fd0:	f883 2044 	strb.w	r2, [r3, #68]	@ 0x44
 8011fd4:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8011fd6:	f893 3045 	ldrb.w	r3, [r3, #69]	@ 0x45
 8011fda:	b25b      	sxtb	r3, r3
 8011fdc:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8011fe0:	d103      	bne.n	8011fea <xQueueGenericSend+0x18a>
 8011fe2:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8011fe4:	2200      	movs	r2, #0
 8011fe6:	f883 2045 	strb.w	r2, [r3, #69]	@ 0x45
 8011fea:	f003 f9c7 	bl	801537c <vPortExitCritical>

		/* Update the timeout state to see if it has expired yet. */
		if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE )
 8011fee:	1d3a      	adds	r2, r7, #4
 8011ff0:	f107 0314 	add.w	r3, r7, #20
 8011ff4:	4611      	mov	r1, r2
 8011ff6:	4618      	mov	r0, r3
 8011ff8:	f001 fed4 	bl	8013da4 <xTaskCheckForTimeOut>
 8011ffc:	4603      	mov	r3, r0
 8011ffe:	2b00      	cmp	r3, #0
 8012000:	d124      	bne.n	801204c <xQueueGenericSend+0x1ec>
		{
			if( prvIsQueueFull( pxQueue ) != pdFALSE )
 8012002:	6b38      	ldr	r0, [r7, #48]	@ 0x30
 8012004:	f000 fd42 	bl	8012a8c <prvIsQueueFull>
 8012008:	4603      	mov	r3, r0
 801200a:	2b00      	cmp	r3, #0
 801200c:	d018      	beq.n	8012040 <xQueueGenericSend+0x1e0>
			{
				traceBLOCKING_ON_QUEUE_SEND( pxQueue );
				vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToSend ), xTicksToWait );
 801200e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012010:	3310      	adds	r3, #16
 8012012:	687a      	ldr	r2, [r7, #4]
 8012014:	4611      	mov	r1, r2
 8012016:	4618      	mov	r0, r3
 8012018:	f001 fdd0 	bl	8013bbc <vTaskPlaceOnEventList>
				/* Unlocking the queue means queue events can effect the
				event list.  It is possible that interrupts occurring now
				remove this task from the event list again - but as the
				scheduler is suspended the task will go onto the pending
				ready last instead of the actual ready list. */
				prvUnlockQueue( pxQueue );
 801201c:	6b38      	ldr	r0, [r7, #48]	@ 0x30
 801201e:	f000 fccd 	bl	80129bc <prvUnlockQueue>
				/* Resuming the scheduler will move tasks from the pending
				ready list into the ready list - so it is feasible that this
				task is already in a ready list before it yields - in which
				case the yield will not cause a context switch unless there
				is also a higher priority task in the pending ready list. */
				if( xTaskResumeAll() == pdFALSE )
 8012022:	f001 fbdd 	bl	80137e0 <xTaskResumeAll>
 8012026:	4603      	mov	r3, r0
 8012028:	2b00      	cmp	r3, #0
 801202a:	f47f af7c 	bne.w	8011f26 <xQueueGenericSend+0xc6>
				{
					portYIELD_WITHIN_API();
 801202e:	4b0c      	ldr	r3, [pc, #48]	@ (8012060 <xQueueGenericSend+0x200>)
 8012030:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8012034:	601a      	str	r2, [r3, #0]
 8012036:	f3bf 8f4f 	dsb	sy
 801203a:	f3bf 8f6f 	isb	sy
 801203e:	e772      	b.n	8011f26 <xQueueGenericSend+0xc6>
				}
			}
			else
			{
				/* Try again. */
				prvUnlockQueue( pxQueue );
 8012040:	6b38      	ldr	r0, [r7, #48]	@ 0x30
 8012042:	f000 fcbb 	bl	80129bc <prvUnlockQueue>
				( void ) xTaskResumeAll();
 8012046:	f001 fbcb 	bl	80137e0 <xTaskResumeAll>
 801204a:	e76c      	b.n	8011f26 <xQueueGenericSend+0xc6>
			}
		}
		else
		{
			/* The timeout has expired. */
			prvUnlockQueue( pxQueue );
 801204c:	6b38      	ldr	r0, [r7, #48]	@ 0x30
 801204e:	f000 fcb5 	bl	80129bc <prvUnlockQueue>
			( void ) xTaskResumeAll();
 8012052:	f001 fbc5 	bl	80137e0 <xTaskResumeAll>

			traceQUEUE_SEND_FAILED( pxQueue );
			return errQUEUE_FULL;
 8012056:	2300      	movs	r3, #0
		}
	} /*lint -restore */
}
 8012058:	4618      	mov	r0, r3
 801205a:	3738      	adds	r7, #56	@ 0x38
 801205c:	46bd      	mov	sp, r7
 801205e:	bd80      	pop	{r7, pc}
 8012060:	e000ed04 	.word	0xe000ed04

08012064 <xQueueGenericSendFromISR>:
/*-----------------------------------------------------------*/

BaseType_t xQueueGenericSendFromISR( QueueHandle_t xQueue, const void * const pvItemToQueue, BaseType_t * const pxHigherPriorityTaskWoken, const BaseType_t xCopyPosition )
{
 8012064:	b580      	push	{r7, lr}
 8012066:	b090      	sub	sp, #64	@ 0x40
 8012068:	af00      	add	r7, sp, #0
 801206a:	60f8      	str	r0, [r7, #12]
 801206c:	60b9      	str	r1, [r7, #8]
 801206e:	607a      	str	r2, [r7, #4]
 8012070:	603b      	str	r3, [r7, #0]
BaseType_t xReturn;
UBaseType_t uxSavedInterruptStatus;
Queue_t * const pxQueue = xQueue;
 8012072:	68fb      	ldr	r3, [r7, #12]
 8012074:	63bb      	str	r3, [r7, #56]	@ 0x38

	configASSERT( pxQueue );
 8012076:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8012078:	2b00      	cmp	r3, #0
 801207a:	d10b      	bne.n	8012094 <xQueueGenericSendFromISR+0x30>
	__asm volatile
 801207c:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012080:	f383 8811 	msr	BASEPRI, r3
 8012084:	f3bf 8f6f 	isb	sy
 8012088:	f3bf 8f4f 	dsb	sy
 801208c:	62bb      	str	r3, [r7, #40]	@ 0x28
}
 801208e:	bf00      	nop
 8012090:	bf00      	nop
 8012092:	e7fd      	b.n	8012090 <xQueueGenericSendFromISR+0x2c>
	configASSERT( !( ( pvItemToQueue == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) );
 8012094:	68bb      	ldr	r3, [r7, #8]
 8012096:	2b00      	cmp	r3, #0
 8012098:	d103      	bne.n	80120a2 <xQueueGenericSendFromISR+0x3e>
 801209a:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801209c:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 801209e:	2b00      	cmp	r3, #0
 80120a0:	d101      	bne.n	80120a6 <xQueueGenericSendFromISR+0x42>
 80120a2:	2301      	movs	r3, #1
 80120a4:	e000      	b.n	80120a8 <xQueueGenericSendFromISR+0x44>
 80120a6:	2300      	movs	r3, #0
 80120a8:	2b00      	cmp	r3, #0
 80120aa:	d10b      	bne.n	80120c4 <xQueueGenericSendFromISR+0x60>
	__asm volatile
 80120ac:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80120b0:	f383 8811 	msr	BASEPRI, r3
 80120b4:	f3bf 8f6f 	isb	sy
 80120b8:	f3bf 8f4f 	dsb	sy
 80120bc:	627b      	str	r3, [r7, #36]	@ 0x24
}
 80120be:	bf00      	nop
 80120c0:	bf00      	nop
 80120c2:	e7fd      	b.n	80120c0 <xQueueGenericSendFromISR+0x5c>
	configASSERT( !( ( xCopyPosition == queueOVERWRITE ) && ( pxQueue->uxLength != 1 ) ) );
 80120c4:	683b      	ldr	r3, [r7, #0]
 80120c6:	2b02      	cmp	r3, #2
 80120c8:	d103      	bne.n	80120d2 <xQueueGenericSendFromISR+0x6e>
 80120ca:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 80120cc:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 80120ce:	2b01      	cmp	r3, #1
 80120d0:	d101      	bne.n	80120d6 <xQueueGenericSendFromISR+0x72>
 80120d2:	2301      	movs	r3, #1
 80120d4:	e000      	b.n	80120d8 <xQueueGenericSendFromISR+0x74>
 80120d6:	2300      	movs	r3, #0
 80120d8:	2b00      	cmp	r3, #0
 80120da:	d10b      	bne.n	80120f4 <xQueueGenericSendFromISR+0x90>
	__asm volatile
 80120dc:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80120e0:	f383 8811 	msr	BASEPRI, r3
 80120e4:	f3bf 8f6f 	isb	sy
 80120e8:	f3bf 8f4f 	dsb	sy
 80120ec:	623b      	str	r3, [r7, #32]
}
 80120ee:	bf00      	nop
 80120f0:	bf00      	nop
 80120f2:	e7fd      	b.n	80120f0 <xQueueGenericSendFromISR+0x8c>
	that have been assigned a priority at or (logically) below the maximum
	system call	interrupt priority.  FreeRTOS maintains a separate interrupt
	safe API to ensure interrupt entry is as fast and as simple as possible.
	More information (albeit Cortex-M specific) is provided on the following
	link: http://www.freertos.org/RTOS-Cortex-M3-M4.html */
	portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
 80120f4:	f003 f9f0 	bl	80154d8 <vPortValidateInterruptPriority>

portFORCE_INLINE static uint32_t ulPortRaiseBASEPRI( void )
{
uint32_t ulOriginalBASEPRI, ulNewBASEPRI;

	__asm volatile
 80120f8:	f3ef 8211 	mrs	r2, BASEPRI
 80120fc:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012100:	f383 8811 	msr	BASEPRI, r3
 8012104:	f3bf 8f6f 	isb	sy
 8012108:	f3bf 8f4f 	dsb	sy
 801210c:	61fa      	str	r2, [r7, #28]
 801210e:	61bb      	str	r3, [r7, #24]
		:"=r" (ulOriginalBASEPRI), "=r" (ulNewBASEPRI) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
	);

	/* This return will not be reached but is necessary to prevent compiler
	warnings. */
	return ulOriginalBASEPRI;
 8012110:	69fb      	ldr	r3, [r7, #28]
	/* Similar to xQueueGenericSend, except without blocking if there is no room
	in the queue.  Also don't directly wake a task that was blocked on a queue
	read, instead return a flag to say whether a context switch is required or
	not (i.e. has a task with a higher priority than us been woken by this
	post). */
	uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
 8012112:	637b      	str	r3, [r7, #52]	@ 0x34
	{
		if( ( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) || ( xCopyPosition == queueOVERWRITE ) )
 8012114:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8012116:	6b9a      	ldr	r2, [r3, #56]	@ 0x38
 8012118:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801211a:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 801211c:	429a      	cmp	r2, r3
 801211e:	d302      	bcc.n	8012126 <xQueueGenericSendFromISR+0xc2>
 8012120:	683b      	ldr	r3, [r7, #0]
 8012122:	2b02      	cmp	r3, #2
 8012124:	d12f      	bne.n	8012186 <xQueueGenericSendFromISR+0x122>
		{
			const int8_t cTxLock = pxQueue->cTxLock;
 8012126:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8012128:	f893 3045 	ldrb.w	r3, [r3, #69]	@ 0x45
 801212c:	f887 3033 	strb.w	r3, [r7, #51]	@ 0x33
			const UBaseType_t uxPreviousMessagesWaiting = pxQueue->uxMessagesWaiting;
 8012130:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8012132:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 8012134:	62fb      	str	r3, [r7, #44]	@ 0x2c
			/* Semaphores use xQueueGiveFromISR(), so pxQueue will not be a
			semaphore or mutex.  That means prvCopyDataToQueue() cannot result
			in a task disinheriting a priority and prvCopyDataToQueue() can be
			called here even though the disinherit function does not check if
			the scheduler is suspended before accessing the ready lists. */
			( void ) prvCopyDataToQueue( pxQueue, pvItemToQueue, xCopyPosition );
 8012136:	683a      	ldr	r2, [r7, #0]
 8012138:	68b9      	ldr	r1, [r7, #8]
 801213a:	6bb8      	ldr	r0, [r7, #56]	@ 0x38
 801213c:	f000 fbae 	bl	801289c <prvCopyDataToQueue>

			/* The event list is not altered if the queue is locked.  This will
			be done when the queue is unlocked later. */
			if( cTxLock == queueUNLOCKED )
 8012140:	f997 3033 	ldrsb.w	r3, [r7, #51]	@ 0x33
 8012144:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8012148:	d112      	bne.n	8012170 <xQueueGenericSendFromISR+0x10c>
						}
					}
				}
				#else /* configUSE_QUEUE_SETS */
				{
					if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
 801214a:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801214c:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801214e:	2b00      	cmp	r3, #0
 8012150:	d016      	beq.n	8012180 <xQueueGenericSendFromISR+0x11c>
					{
						if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
 8012152:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8012154:	3324      	adds	r3, #36	@ 0x24
 8012156:	4618      	mov	r0, r3
 8012158:	f001 fd82 	bl	8013c60 <xTaskRemoveFromEventList>
 801215c:	4603      	mov	r3, r0
 801215e:	2b00      	cmp	r3, #0
 8012160:	d00e      	beq.n	8012180 <xQueueGenericSendFromISR+0x11c>
						{
							/* The task waiting has a higher priority so record that a
							context	switch is required. */
							if( pxHigherPriorityTaskWoken != NULL )
 8012162:	687b      	ldr	r3, [r7, #4]
 8012164:	2b00      	cmp	r3, #0
 8012166:	d00b      	beq.n	8012180 <xQueueGenericSendFromISR+0x11c>
							{
								*pxHigherPriorityTaskWoken = pdTRUE;
 8012168:	687b      	ldr	r3, [r7, #4]
 801216a:	2201      	movs	r2, #1
 801216c:	601a      	str	r2, [r3, #0]
 801216e:	e007      	b.n	8012180 <xQueueGenericSendFromISR+0x11c>
			}
			else
			{
				/* Increment the lock count so the task that unlocks the queue
				knows that data was posted while it was locked. */
				pxQueue->cTxLock = ( int8_t ) ( cTxLock + 1 );
 8012170:	f897 3033 	ldrb.w	r3, [r7, #51]	@ 0x33
 8012174:	3301      	adds	r3, #1
 8012176:	b2db      	uxtb	r3, r3
 8012178:	b25a      	sxtb	r2, r3
 801217a:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801217c:	f883 2045 	strb.w	r2, [r3, #69]	@ 0x45
			}

			xReturn = pdPASS;
 8012180:	2301      	movs	r3, #1
 8012182:	63fb      	str	r3, [r7, #60]	@ 0x3c
		{
 8012184:	e001      	b.n	801218a <xQueueGenericSendFromISR+0x126>
		}
		else
		{
			traceQUEUE_SEND_FROM_ISR_FAILED( pxQueue );
			xReturn = errQUEUE_FULL;
 8012186:	2300      	movs	r3, #0
 8012188:	63fb      	str	r3, [r7, #60]	@ 0x3c
 801218a:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 801218c:	617b      	str	r3, [r7, #20]
}
/*-----------------------------------------------------------*/

portFORCE_INLINE static void vPortSetBASEPRI( uint32_t ulNewMaskValue )
{
	__asm volatile
 801218e:	697b      	ldr	r3, [r7, #20]
 8012190:	f383 8811 	msr	BASEPRI, r3
	(
		"	msr basepri, %0	" :: "r" ( ulNewMaskValue ) : "memory"
	);
}
 8012194:	bf00      	nop
		}
	}
	portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );

	return xReturn;
 8012196:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
}
 8012198:	4618      	mov	r0, r3
 801219a:	3740      	adds	r7, #64	@ 0x40
 801219c:	46bd      	mov	sp, r7
 801219e:	bd80      	pop	{r7, pc}

080121a0 <xQueueGiveFromISR>:
/*-----------------------------------------------------------*/

BaseType_t xQueueGiveFromISR( QueueHandle_t xQueue, BaseType_t * const pxHigherPriorityTaskWoken )
{
 80121a0:	b580      	push	{r7, lr}
 80121a2:	b08e      	sub	sp, #56	@ 0x38
 80121a4:	af00      	add	r7, sp, #0
 80121a6:	6078      	str	r0, [r7, #4]
 80121a8:	6039      	str	r1, [r7, #0]
BaseType_t xReturn;
UBaseType_t uxSavedInterruptStatus;
Queue_t * const pxQueue = xQueue;
 80121aa:	687b      	ldr	r3, [r7, #4]
 80121ac:	633b      	str	r3, [r7, #48]	@ 0x30
	item size is 0.  Don't directly wake a task that was blocked on a queue
	read, instead return a flag to say whether a context switch is required or
	not (i.e. has a task with a higher priority than us been woken by this
	post). */

	configASSERT( pxQueue );
 80121ae:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80121b0:	2b00      	cmp	r3, #0
 80121b2:	d10b      	bne.n	80121cc <xQueueGiveFromISR+0x2c>
	__asm volatile
 80121b4:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80121b8:	f383 8811 	msr	BASEPRI, r3
 80121bc:	f3bf 8f6f 	isb	sy
 80121c0:	f3bf 8f4f 	dsb	sy
 80121c4:	623b      	str	r3, [r7, #32]
}
 80121c6:	bf00      	nop
 80121c8:	bf00      	nop
 80121ca:	e7fd      	b.n	80121c8 <xQueueGiveFromISR+0x28>

	/* xQueueGenericSendFromISR() should be used instead of xQueueGiveFromISR()
	if the item size is not 0. */
	configASSERT( pxQueue->uxItemSize == 0 );
 80121cc:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80121ce:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 80121d0:	2b00      	cmp	r3, #0
 80121d2:	d00b      	beq.n	80121ec <xQueueGiveFromISR+0x4c>
	__asm volatile
 80121d4:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80121d8:	f383 8811 	msr	BASEPRI, r3
 80121dc:	f3bf 8f6f 	isb	sy
 80121e0:	f3bf 8f4f 	dsb	sy
 80121e4:	61fb      	str	r3, [r7, #28]
}
 80121e6:	bf00      	nop
 80121e8:	bf00      	nop
 80121ea:	e7fd      	b.n	80121e8 <xQueueGiveFromISR+0x48>

	/* Normally a mutex would not be given from an interrupt, especially if
	there is a mutex holder, as priority inheritance makes no sense for an
	interrupts, only tasks. */
	configASSERT( !( ( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX ) && ( pxQueue->u.xSemaphore.xMutexHolder != NULL ) ) );
 80121ec:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80121ee:	681b      	ldr	r3, [r3, #0]
 80121f0:	2b00      	cmp	r3, #0
 80121f2:	d103      	bne.n	80121fc <xQueueGiveFromISR+0x5c>
 80121f4:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80121f6:	689b      	ldr	r3, [r3, #8]
 80121f8:	2b00      	cmp	r3, #0
 80121fa:	d101      	bne.n	8012200 <xQueueGiveFromISR+0x60>
 80121fc:	2301      	movs	r3, #1
 80121fe:	e000      	b.n	8012202 <xQueueGiveFromISR+0x62>
 8012200:	2300      	movs	r3, #0
 8012202:	2b00      	cmp	r3, #0
 8012204:	d10b      	bne.n	801221e <xQueueGiveFromISR+0x7e>
	__asm volatile
 8012206:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801220a:	f383 8811 	msr	BASEPRI, r3
 801220e:	f3bf 8f6f 	isb	sy
 8012212:	f3bf 8f4f 	dsb	sy
 8012216:	61bb      	str	r3, [r7, #24]
}
 8012218:	bf00      	nop
 801221a:	bf00      	nop
 801221c:	e7fd      	b.n	801221a <xQueueGiveFromISR+0x7a>
	that have been assigned a priority at or (logically) below the maximum
	system call	interrupt priority.  FreeRTOS maintains a separate interrupt
	safe API to ensure interrupt entry is as fast and as simple as possible.
	More information (albeit Cortex-M specific) is provided on the following
	link: http://www.freertos.org/RTOS-Cortex-M3-M4.html */
	portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
 801221e:	f003 f95b 	bl	80154d8 <vPortValidateInterruptPriority>
	__asm volatile
 8012222:	f3ef 8211 	mrs	r2, BASEPRI
 8012226:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801222a:	f383 8811 	msr	BASEPRI, r3
 801222e:	f3bf 8f6f 	isb	sy
 8012232:	f3bf 8f4f 	dsb	sy
 8012236:	617a      	str	r2, [r7, #20]
 8012238:	613b      	str	r3, [r7, #16]
	return ulOriginalBASEPRI;
 801223a:	697b      	ldr	r3, [r7, #20]

	uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
 801223c:	62fb      	str	r3, [r7, #44]	@ 0x2c
	{
		const UBaseType_t uxMessagesWaiting = pxQueue->uxMessagesWaiting;
 801223e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012240:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 8012242:	62bb      	str	r3, [r7, #40]	@ 0x28

		/* When the queue is used to implement a semaphore no data is ever
		moved through the queue but it is still valid to see if the queue 'has
		space'. */
		if( uxMessagesWaiting < pxQueue->uxLength )
 8012244:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012246:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 8012248:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 801224a:	429a      	cmp	r2, r3
 801224c:	d22b      	bcs.n	80122a6 <xQueueGiveFromISR+0x106>
		{
			const int8_t cTxLock = pxQueue->cTxLock;
 801224e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012250:	f893 3045 	ldrb.w	r3, [r3, #69]	@ 0x45
 8012254:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
			holder - and if there is a mutex holder then the mutex cannot be
			given from an ISR.  As this is the ISR version of the function it
			can be assumed there is no mutex holder and no need to determine if
			priority disinheritance is needed.  Simply increase the count of
			messages (semaphores) available. */
			pxQueue->uxMessagesWaiting = uxMessagesWaiting + ( UBaseType_t ) 1;
 8012258:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801225a:	1c5a      	adds	r2, r3, #1
 801225c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801225e:	639a      	str	r2, [r3, #56]	@ 0x38

			/* The event list is not altered if the queue is locked.  This will
			be done when the queue is unlocked later. */
			if( cTxLock == queueUNLOCKED )
 8012260:	f997 3027 	ldrsb.w	r3, [r7, #39]	@ 0x27
 8012264:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8012268:	d112      	bne.n	8012290 <xQueueGiveFromISR+0xf0>
						}
					}
				}
				#else /* configUSE_QUEUE_SETS */
				{
					if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
 801226a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801226c:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801226e:	2b00      	cmp	r3, #0
 8012270:	d016      	beq.n	80122a0 <xQueueGiveFromISR+0x100>
					{
						if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
 8012272:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012274:	3324      	adds	r3, #36	@ 0x24
 8012276:	4618      	mov	r0, r3
 8012278:	f001 fcf2 	bl	8013c60 <xTaskRemoveFromEventList>
 801227c:	4603      	mov	r3, r0
 801227e:	2b00      	cmp	r3, #0
 8012280:	d00e      	beq.n	80122a0 <xQueueGiveFromISR+0x100>
						{
							/* The task waiting has a higher priority so record that a
							context	switch is required. */
							if( pxHigherPriorityTaskWoken != NULL )
 8012282:	683b      	ldr	r3, [r7, #0]
 8012284:	2b00      	cmp	r3, #0
 8012286:	d00b      	beq.n	80122a0 <xQueueGiveFromISR+0x100>
							{
								*pxHigherPriorityTaskWoken = pdTRUE;
 8012288:	683b      	ldr	r3, [r7, #0]
 801228a:	2201      	movs	r2, #1
 801228c:	601a      	str	r2, [r3, #0]
 801228e:	e007      	b.n	80122a0 <xQueueGiveFromISR+0x100>
			}
			else
			{
				/* Increment the lock count so the task that unlocks the queue
				knows that data was posted while it was locked. */
				pxQueue->cTxLock = ( int8_t ) ( cTxLock + 1 );
 8012290:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 8012294:	3301      	adds	r3, #1
 8012296:	b2db      	uxtb	r3, r3
 8012298:	b25a      	sxtb	r2, r3
 801229a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801229c:	f883 2045 	strb.w	r2, [r3, #69]	@ 0x45
			}

			xReturn = pdPASS;
 80122a0:	2301      	movs	r3, #1
 80122a2:	637b      	str	r3, [r7, #52]	@ 0x34
 80122a4:	e001      	b.n	80122aa <xQueueGiveFromISR+0x10a>
		}
		else
		{
			traceQUEUE_SEND_FROM_ISR_FAILED( pxQueue );
			xReturn = errQUEUE_FULL;
 80122a6:	2300      	movs	r3, #0
 80122a8:	637b      	str	r3, [r7, #52]	@ 0x34
 80122aa:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80122ac:	60fb      	str	r3, [r7, #12]
	__asm volatile
 80122ae:	68fb      	ldr	r3, [r7, #12]
 80122b0:	f383 8811 	msr	BASEPRI, r3
}
 80122b4:	bf00      	nop
		}
	}
	portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );

	return xReturn;
 80122b6:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
}
 80122b8:	4618      	mov	r0, r3
 80122ba:	3738      	adds	r7, #56	@ 0x38
 80122bc:	46bd      	mov	sp, r7
 80122be:	bd80      	pop	{r7, pc}

080122c0 <xQueueReceive>:
/*-----------------------------------------------------------*/

BaseType_t xQueueReceive( QueueHandle_t xQueue, void * const pvBuffer, TickType_t xTicksToWait )
{
 80122c0:	b580      	push	{r7, lr}
 80122c2:	b08c      	sub	sp, #48	@ 0x30
 80122c4:	af00      	add	r7, sp, #0
 80122c6:	60f8      	str	r0, [r7, #12]
 80122c8:	60b9      	str	r1, [r7, #8]
 80122ca:	607a      	str	r2, [r7, #4]
BaseType_t xEntryTimeSet = pdFALSE;
 80122cc:	2300      	movs	r3, #0
 80122ce:	62fb      	str	r3, [r7, #44]	@ 0x2c
TimeOut_t xTimeOut;
Queue_t * const pxQueue = xQueue;
 80122d0:	68fb      	ldr	r3, [r7, #12]
 80122d2:	62bb      	str	r3, [r7, #40]	@ 0x28

	/* Check the pointer is not NULL. */
	configASSERT( ( pxQueue ) );
 80122d4:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80122d6:	2b00      	cmp	r3, #0
 80122d8:	d10b      	bne.n	80122f2 <xQueueReceive+0x32>
	__asm volatile
 80122da:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80122de:	f383 8811 	msr	BASEPRI, r3
 80122e2:	f3bf 8f6f 	isb	sy
 80122e6:	f3bf 8f4f 	dsb	sy
 80122ea:	623b      	str	r3, [r7, #32]
}
 80122ec:	bf00      	nop
 80122ee:	bf00      	nop
 80122f0:	e7fd      	b.n	80122ee <xQueueReceive+0x2e>

	/* The buffer into which data is received can only be NULL if the data size
	is zero (so no data is copied into the buffer. */
	configASSERT( !( ( ( pvBuffer ) == NULL ) && ( ( pxQueue )->uxItemSize != ( UBaseType_t ) 0U ) ) );
 80122f2:	68bb      	ldr	r3, [r7, #8]
 80122f4:	2b00      	cmp	r3, #0
 80122f6:	d103      	bne.n	8012300 <xQueueReceive+0x40>
 80122f8:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80122fa:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 80122fc:	2b00      	cmp	r3, #0
 80122fe:	d101      	bne.n	8012304 <xQueueReceive+0x44>
 8012300:	2301      	movs	r3, #1
 8012302:	e000      	b.n	8012306 <xQueueReceive+0x46>
 8012304:	2300      	movs	r3, #0
 8012306:	2b00      	cmp	r3, #0
 8012308:	d10b      	bne.n	8012322 <xQueueReceive+0x62>
	__asm volatile
 801230a:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801230e:	f383 8811 	msr	BASEPRI, r3
 8012312:	f3bf 8f6f 	isb	sy
 8012316:	f3bf 8f4f 	dsb	sy
 801231a:	61fb      	str	r3, [r7, #28]
}
 801231c:	bf00      	nop
 801231e:	bf00      	nop
 8012320:	e7fd      	b.n	801231e <xQueueReceive+0x5e>

	/* Cannot block if the scheduler is suspended. */
	#if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )
	{
		configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) );
 8012322:	f001 fe9b 	bl	801405c <xTaskGetSchedulerState>
 8012326:	4603      	mov	r3, r0
 8012328:	2b00      	cmp	r3, #0
 801232a:	d102      	bne.n	8012332 <xQueueReceive+0x72>
 801232c:	687b      	ldr	r3, [r7, #4]
 801232e:	2b00      	cmp	r3, #0
 8012330:	d101      	bne.n	8012336 <xQueueReceive+0x76>
 8012332:	2301      	movs	r3, #1
 8012334:	e000      	b.n	8012338 <xQueueReceive+0x78>
 8012336:	2300      	movs	r3, #0
 8012338:	2b00      	cmp	r3, #0
 801233a:	d10b      	bne.n	8012354 <xQueueReceive+0x94>
	__asm volatile
 801233c:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012340:	f383 8811 	msr	BASEPRI, r3
 8012344:	f3bf 8f6f 	isb	sy
 8012348:	f3bf 8f4f 	dsb	sy
 801234c:	61bb      	str	r3, [r7, #24]
}
 801234e:	bf00      	nop
 8012350:	bf00      	nop
 8012352:	e7fd      	b.n	8012350 <xQueueReceive+0x90>
	/*lint -save -e904  This function relaxes the coding standard somewhat to
	allow return statements within the function itself.  This is done in the
	interest of execution time efficiency. */
	for( ;; )
	{
		taskENTER_CRITICAL();
 8012354:	f002 ffe0 	bl	8015318 <vPortEnterCritical>
		{
			const UBaseType_t uxMessagesWaiting = pxQueue->uxMessagesWaiting;
 8012358:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801235a:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 801235c:	627b      	str	r3, [r7, #36]	@ 0x24

			/* Is there data in the queue now?  To be running the calling task
			must be the highest priority task wanting to access the queue. */
			if( uxMessagesWaiting > ( UBaseType_t ) 0 )
 801235e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8012360:	2b00      	cmp	r3, #0
 8012362:	d01f      	beq.n	80123a4 <xQueueReceive+0xe4>
			{
				/* Data available, remove one item. */
				prvCopyDataFromQueue( pxQueue, pvBuffer );
 8012364:	68b9      	ldr	r1, [r7, #8]
 8012366:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 8012368:	f000 fb02 	bl	8012970 <prvCopyDataFromQueue>
				traceQUEUE_RECEIVE( pxQueue );
				pxQueue->uxMessagesWaiting = uxMessagesWaiting - ( UBaseType_t ) 1;
 801236c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801236e:	1e5a      	subs	r2, r3, #1
 8012370:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8012372:	639a      	str	r2, [r3, #56]	@ 0x38

				/* There is now space in the queue, were any tasks waiting to
				post to the queue?  If so, unblock the highest priority waiting
				task. */
				if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
 8012374:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8012376:	691b      	ldr	r3, [r3, #16]
 8012378:	2b00      	cmp	r3, #0
 801237a:	d00f      	beq.n	801239c <xQueueReceive+0xdc>
				{
					if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
 801237c:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801237e:	3310      	adds	r3, #16
 8012380:	4618      	mov	r0, r3
 8012382:	f001 fc6d 	bl	8013c60 <xTaskRemoveFromEventList>
 8012386:	4603      	mov	r3, r0
 8012388:	2b00      	cmp	r3, #0
 801238a:	d007      	beq.n	801239c <xQueueReceive+0xdc>
					{
						queueYIELD_IF_USING_PREEMPTION();
 801238c:	4b3c      	ldr	r3, [pc, #240]	@ (8012480 <xQueueReceive+0x1c0>)
 801238e:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8012392:	601a      	str	r2, [r3, #0]
 8012394:	f3bf 8f4f 	dsb	sy
 8012398:	f3bf 8f6f 	isb	sy
				else
				{
					mtCOVERAGE_TEST_MARKER();
				}

				taskEXIT_CRITICAL();
 801239c:	f002 ffee 	bl	801537c <vPortExitCritical>
				return pdPASS;
 80123a0:	2301      	movs	r3, #1
 80123a2:	e069      	b.n	8012478 <xQueueReceive+0x1b8>
			}
			else
			{
				if( xTicksToWait == ( TickType_t ) 0 )
 80123a4:	687b      	ldr	r3, [r7, #4]
 80123a6:	2b00      	cmp	r3, #0
 80123a8:	d103      	bne.n	80123b2 <xQueueReceive+0xf2>
				{
					/* The queue was empty and no block time is specified (or
					the block time has expired) so leave now. */
					taskEXIT_CRITICAL();
 80123aa:	f002 ffe7 	bl	801537c <vPortExitCritical>
					traceQUEUE_RECEIVE_FAILED( pxQueue );
					return errQUEUE_EMPTY;
 80123ae:	2300      	movs	r3, #0
 80123b0:	e062      	b.n	8012478 <xQueueReceive+0x1b8>
				}
				else if( xEntryTimeSet == pdFALSE )
 80123b2:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80123b4:	2b00      	cmp	r3, #0
 80123b6:	d106      	bne.n	80123c6 <xQueueReceive+0x106>
				{
					/* The queue was empty and a block time was specified so
					configure the timeout structure. */
					vTaskInternalSetTimeOutState( &xTimeOut );
 80123b8:	f107 0310 	add.w	r3, r7, #16
 80123bc:	4618      	mov	r0, r3
 80123be:	f001 fcdb 	bl	8013d78 <vTaskInternalSetTimeOutState>
					xEntryTimeSet = pdTRUE;
 80123c2:	2301      	movs	r3, #1
 80123c4:	62fb      	str	r3, [r7, #44]	@ 0x2c
					/* Entry time was already set. */
					mtCOVERAGE_TEST_MARKER();
				}
			}
		}
		taskEXIT_CRITICAL();
 80123c6:	f002 ffd9 	bl	801537c <vPortExitCritical>

		/* Interrupts and other tasks can send to and receive from the queue
		now the critical section has been exited. */

		vTaskSuspendAll();
 80123ca:	f001 f9fb 	bl	80137c4 <vTaskSuspendAll>
		prvLockQueue( pxQueue );
 80123ce:	f002 ffa3 	bl	8015318 <vPortEnterCritical>
 80123d2:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80123d4:	f893 3044 	ldrb.w	r3, [r3, #68]	@ 0x44
 80123d8:	b25b      	sxtb	r3, r3
 80123da:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 80123de:	d103      	bne.n	80123e8 <xQueueReceive+0x128>
 80123e0:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80123e2:	2200      	movs	r2, #0
 80123e4:	f883 2044 	strb.w	r2, [r3, #68]	@ 0x44
 80123e8:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80123ea:	f893 3045 	ldrb.w	r3, [r3, #69]	@ 0x45
 80123ee:	b25b      	sxtb	r3, r3
 80123f0:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 80123f4:	d103      	bne.n	80123fe <xQueueReceive+0x13e>
 80123f6:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80123f8:	2200      	movs	r2, #0
 80123fa:	f883 2045 	strb.w	r2, [r3, #69]	@ 0x45
 80123fe:	f002 ffbd 	bl	801537c <vPortExitCritical>

		/* Update the timeout state to see if it has expired yet. */
		if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE )
 8012402:	1d3a      	adds	r2, r7, #4
 8012404:	f107 0310 	add.w	r3, r7, #16
 8012408:	4611      	mov	r1, r2
 801240a:	4618      	mov	r0, r3
 801240c:	f001 fcca 	bl	8013da4 <xTaskCheckForTimeOut>
 8012410:	4603      	mov	r3, r0
 8012412:	2b00      	cmp	r3, #0
 8012414:	d123      	bne.n	801245e <xQueueReceive+0x19e>
		{
			/* The timeout has not expired.  If the queue is still empty place
			the task on the list of tasks waiting to receive from the queue. */
			if( prvIsQueueEmpty( pxQueue ) != pdFALSE )
 8012416:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 8012418:	f000 fb22 	bl	8012a60 <prvIsQueueEmpty>
 801241c:	4603      	mov	r3, r0
 801241e:	2b00      	cmp	r3, #0
 8012420:	d017      	beq.n	8012452 <xQueueReceive+0x192>
			{
				traceBLOCKING_ON_QUEUE_RECEIVE( pxQueue );
				vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait );
 8012422:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8012424:	3324      	adds	r3, #36	@ 0x24
 8012426:	687a      	ldr	r2, [r7, #4]
 8012428:	4611      	mov	r1, r2
 801242a:	4618      	mov	r0, r3
 801242c:	f001 fbc6 	bl	8013bbc <vTaskPlaceOnEventList>
				prvUnlockQueue( pxQueue );
 8012430:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 8012432:	f000 fac3 	bl	80129bc <prvUnlockQueue>
				if( xTaskResumeAll() == pdFALSE )
 8012436:	f001 f9d3 	bl	80137e0 <xTaskResumeAll>
 801243a:	4603      	mov	r3, r0
 801243c:	2b00      	cmp	r3, #0
 801243e:	d189      	bne.n	8012354 <xQueueReceive+0x94>
				{
					portYIELD_WITHIN_API();
 8012440:	4b0f      	ldr	r3, [pc, #60]	@ (8012480 <xQueueReceive+0x1c0>)
 8012442:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8012446:	601a      	str	r2, [r3, #0]
 8012448:	f3bf 8f4f 	dsb	sy
 801244c:	f3bf 8f6f 	isb	sy
 8012450:	e780      	b.n	8012354 <xQueueReceive+0x94>
			}
			else
			{
				/* The queue contains data again.  Loop back to try and read the
				data. */
				prvUnlockQueue( pxQueue );
 8012452:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 8012454:	f000 fab2 	bl	80129bc <prvUnlockQueue>
				( void ) xTaskResumeAll();
 8012458:	f001 f9c2 	bl	80137e0 <xTaskResumeAll>
 801245c:	e77a      	b.n	8012354 <xQueueReceive+0x94>
		}
		else
		{
			/* Timed out.  If there is no data in the queue exit, otherwise loop
			back and attempt to read the data. */
			prvUnlockQueue( pxQueue );
 801245e:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 8012460:	f000 faac 	bl	80129bc <prvUnlockQueue>
			( void ) xTaskResumeAll();
 8012464:	f001 f9bc 	bl	80137e0 <xTaskResumeAll>

			if( prvIsQueueEmpty( pxQueue ) != pdFALSE )
 8012468:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 801246a:	f000 faf9 	bl	8012a60 <prvIsQueueEmpty>
 801246e:	4603      	mov	r3, r0
 8012470:	2b00      	cmp	r3, #0
 8012472:	f43f af6f 	beq.w	8012354 <xQueueReceive+0x94>
			{
				traceQUEUE_RECEIVE_FAILED( pxQueue );
				return errQUEUE_EMPTY;
 8012476:	2300      	movs	r3, #0
			{
				mtCOVERAGE_TEST_MARKER();
			}
		}
	} /*lint -restore */
}
 8012478:	4618      	mov	r0, r3
 801247a:	3730      	adds	r7, #48	@ 0x30
 801247c:	46bd      	mov	sp, r7
 801247e:	bd80      	pop	{r7, pc}
 8012480:	e000ed04 	.word	0xe000ed04

08012484 <xQueueSemaphoreTake>:
/*-----------------------------------------------------------*/

BaseType_t xQueueSemaphoreTake( QueueHandle_t xQueue, TickType_t xTicksToWait )
{
 8012484:	b580      	push	{r7, lr}
 8012486:	b08e      	sub	sp, #56	@ 0x38
 8012488:	af00      	add	r7, sp, #0
 801248a:	6078      	str	r0, [r7, #4]
 801248c:	6039      	str	r1, [r7, #0]
BaseType_t xEntryTimeSet = pdFALSE;
 801248e:	2300      	movs	r3, #0
 8012490:	637b      	str	r3, [r7, #52]	@ 0x34
TimeOut_t xTimeOut;
Queue_t * const pxQueue = xQueue;
 8012492:	687b      	ldr	r3, [r7, #4]
 8012494:	62fb      	str	r3, [r7, #44]	@ 0x2c

#if( configUSE_MUTEXES == 1 )
	BaseType_t xInheritanceOccurred = pdFALSE;
 8012496:	2300      	movs	r3, #0
 8012498:	633b      	str	r3, [r7, #48]	@ 0x30
#endif

	/* Check the queue pointer is not NULL. */
	configASSERT( ( pxQueue ) );
 801249a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801249c:	2b00      	cmp	r3, #0
 801249e:	d10b      	bne.n	80124b8 <xQueueSemaphoreTake+0x34>
	__asm volatile
 80124a0:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80124a4:	f383 8811 	msr	BASEPRI, r3
 80124a8:	f3bf 8f6f 	isb	sy
 80124ac:	f3bf 8f4f 	dsb	sy
 80124b0:	623b      	str	r3, [r7, #32]
}
 80124b2:	bf00      	nop
 80124b4:	bf00      	nop
 80124b6:	e7fd      	b.n	80124b4 <xQueueSemaphoreTake+0x30>

	/* Check this really is a semaphore, in which case the item size will be
	0. */
	configASSERT( pxQueue->uxItemSize == 0 );
 80124b8:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80124ba:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 80124bc:	2b00      	cmp	r3, #0
 80124be:	d00b      	beq.n	80124d8 <xQueueSemaphoreTake+0x54>
	__asm volatile
 80124c0:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80124c4:	f383 8811 	msr	BASEPRI, r3
 80124c8:	f3bf 8f6f 	isb	sy
 80124cc:	f3bf 8f4f 	dsb	sy
 80124d0:	61fb      	str	r3, [r7, #28]
}
 80124d2:	bf00      	nop
 80124d4:	bf00      	nop
 80124d6:	e7fd      	b.n	80124d4 <xQueueSemaphoreTake+0x50>

	/* Cannot block if the scheduler is suspended. */
	#if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )
	{
		configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) );
 80124d8:	f001 fdc0 	bl	801405c <xTaskGetSchedulerState>
 80124dc:	4603      	mov	r3, r0
 80124de:	2b00      	cmp	r3, #0
 80124e0:	d102      	bne.n	80124e8 <xQueueSemaphoreTake+0x64>
 80124e2:	683b      	ldr	r3, [r7, #0]
 80124e4:	2b00      	cmp	r3, #0
 80124e6:	d101      	bne.n	80124ec <xQueueSemaphoreTake+0x68>
 80124e8:	2301      	movs	r3, #1
 80124ea:	e000      	b.n	80124ee <xQueueSemaphoreTake+0x6a>
 80124ec:	2300      	movs	r3, #0
 80124ee:	2b00      	cmp	r3, #0
 80124f0:	d10b      	bne.n	801250a <xQueueSemaphoreTake+0x86>
	__asm volatile
 80124f2:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80124f6:	f383 8811 	msr	BASEPRI, r3
 80124fa:	f3bf 8f6f 	isb	sy
 80124fe:	f3bf 8f4f 	dsb	sy
 8012502:	61bb      	str	r3, [r7, #24]
}
 8012504:	bf00      	nop
 8012506:	bf00      	nop
 8012508:	e7fd      	b.n	8012506 <xQueueSemaphoreTake+0x82>
	/*lint -save -e904 This function relaxes the coding standard somewhat to allow return
	statements within the function itself.  This is done in the interest
	of execution time efficiency. */
	for( ;; )
	{
		taskENTER_CRITICAL();
 801250a:	f002 ff05 	bl	8015318 <vPortEnterCritical>
		{
			/* Semaphores are queues with an item size of 0, and where the
			number of messages in the queue is the semaphore's count value. */
			const UBaseType_t uxSemaphoreCount = pxQueue->uxMessagesWaiting;
 801250e:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8012510:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 8012512:	62bb      	str	r3, [r7, #40]	@ 0x28

			/* Is there data in the queue now?  To be running the calling task
			must be the highest priority task wanting to access the queue. */
			if( uxSemaphoreCount > ( UBaseType_t ) 0 )
 8012514:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8012516:	2b00      	cmp	r3, #0
 8012518:	d024      	beq.n	8012564 <xQueueSemaphoreTake+0xe0>
			{
				traceQUEUE_RECEIVE( pxQueue );

				/* Semaphores are queues with a data size of zero and where the
				messages waiting is the semaphore's count.  Reduce the count. */
				pxQueue->uxMessagesWaiting = uxSemaphoreCount - ( UBaseType_t ) 1;
 801251a:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801251c:	1e5a      	subs	r2, r3, #1
 801251e:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8012520:	639a      	str	r2, [r3, #56]	@ 0x38

				#if ( configUSE_MUTEXES == 1 )
				{
					if( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX )
 8012522:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8012524:	681b      	ldr	r3, [r3, #0]
 8012526:	2b00      	cmp	r3, #0
 8012528:	d104      	bne.n	8012534 <xQueueSemaphoreTake+0xb0>
					{
						/* Record the information required to implement
						priority inheritance should it become necessary. */
						pxQueue->u.xSemaphore.xMutexHolder = pvTaskIncrementMutexHeldCount();
 801252a:	f001 ff11 	bl	8014350 <pvTaskIncrementMutexHeldCount>
 801252e:	4602      	mov	r2, r0
 8012530:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8012532:	609a      	str	r2, [r3, #8]
				}
				#endif /* configUSE_MUTEXES */

				/* Check to see if other tasks are blocked waiting to give the
				semaphore, and if so, unblock the highest priority such task. */
				if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
 8012534:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8012536:	691b      	ldr	r3, [r3, #16]
 8012538:	2b00      	cmp	r3, #0
 801253a:	d00f      	beq.n	801255c <xQueueSemaphoreTake+0xd8>
				{
					if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
 801253c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801253e:	3310      	adds	r3, #16
 8012540:	4618      	mov	r0, r3
 8012542:	f001 fb8d 	bl	8013c60 <xTaskRemoveFromEventList>
 8012546:	4603      	mov	r3, r0
 8012548:	2b00      	cmp	r3, #0
 801254a:	d007      	beq.n	801255c <xQueueSemaphoreTake+0xd8>
					{
						queueYIELD_IF_USING_PREEMPTION();
 801254c:	4b54      	ldr	r3, [pc, #336]	@ (80126a0 <xQueueSemaphoreTake+0x21c>)
 801254e:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8012552:	601a      	str	r2, [r3, #0]
 8012554:	f3bf 8f4f 	dsb	sy
 8012558:	f3bf 8f6f 	isb	sy
				else
				{
					mtCOVERAGE_TEST_MARKER();
				}

				taskEXIT_CRITICAL();
 801255c:	f002 ff0e 	bl	801537c <vPortExitCritical>
				return pdPASS;
 8012560:	2301      	movs	r3, #1
 8012562:	e098      	b.n	8012696 <xQueueSemaphoreTake+0x212>
			}
			else
			{
				if( xTicksToWait == ( TickType_t ) 0 )
 8012564:	683b      	ldr	r3, [r7, #0]
 8012566:	2b00      	cmp	r3, #0
 8012568:	d112      	bne.n	8012590 <xQueueSemaphoreTake+0x10c>
					/* For inheritance to have occurred there must have been an
					initial timeout, and an adjusted timeout cannot become 0, as
					if it were 0 the function would have exited. */
					#if( configUSE_MUTEXES == 1 )
					{
						configASSERT( xInheritanceOccurred == pdFALSE );
 801256a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801256c:	2b00      	cmp	r3, #0
 801256e:	d00b      	beq.n	8012588 <xQueueSemaphoreTake+0x104>
	__asm volatile
 8012570:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012574:	f383 8811 	msr	BASEPRI, r3
 8012578:	f3bf 8f6f 	isb	sy
 801257c:	f3bf 8f4f 	dsb	sy
 8012580:	617b      	str	r3, [r7, #20]
}
 8012582:	bf00      	nop
 8012584:	bf00      	nop
 8012586:	e7fd      	b.n	8012584 <xQueueSemaphoreTake+0x100>
					}
					#endif /* configUSE_MUTEXES */

					/* The semaphore count was 0 and no block time is specified
					(or the block time has expired) so exit now. */
					taskEXIT_CRITICAL();
 8012588:	f002 fef8 	bl	801537c <vPortExitCritical>
					traceQUEUE_RECEIVE_FAILED( pxQueue );
					return errQUEUE_EMPTY;
 801258c:	2300      	movs	r3, #0
 801258e:	e082      	b.n	8012696 <xQueueSemaphoreTake+0x212>
				}
				else if( xEntryTimeSet == pdFALSE )
 8012590:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8012592:	2b00      	cmp	r3, #0
 8012594:	d106      	bne.n	80125a4 <xQueueSemaphoreTake+0x120>
				{
					/* The semaphore count was 0 and a block time was specified
					so configure the timeout structure ready to block. */
					vTaskInternalSetTimeOutState( &xTimeOut );
 8012596:	f107 030c 	add.w	r3, r7, #12
 801259a:	4618      	mov	r0, r3
 801259c:	f001 fbec 	bl	8013d78 <vTaskInternalSetTimeOutState>
					xEntryTimeSet = pdTRUE;
 80125a0:	2301      	movs	r3, #1
 80125a2:	637b      	str	r3, [r7, #52]	@ 0x34
					/* Entry time was already set. */
					mtCOVERAGE_TEST_MARKER();
				}
			}
		}
		taskEXIT_CRITICAL();
 80125a4:	f002 feea 	bl	801537c <vPortExitCritical>

		/* Interrupts and other tasks can give to and take from the semaphore
		now the critical section has been exited. */

		vTaskSuspendAll();
 80125a8:	f001 f90c 	bl	80137c4 <vTaskSuspendAll>
		prvLockQueue( pxQueue );
 80125ac:	f002 feb4 	bl	8015318 <vPortEnterCritical>
 80125b0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80125b2:	f893 3044 	ldrb.w	r3, [r3, #68]	@ 0x44
 80125b6:	b25b      	sxtb	r3, r3
 80125b8:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 80125bc:	d103      	bne.n	80125c6 <xQueueSemaphoreTake+0x142>
 80125be:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80125c0:	2200      	movs	r2, #0
 80125c2:	f883 2044 	strb.w	r2, [r3, #68]	@ 0x44
 80125c6:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80125c8:	f893 3045 	ldrb.w	r3, [r3, #69]	@ 0x45
 80125cc:	b25b      	sxtb	r3, r3
 80125ce:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 80125d2:	d103      	bne.n	80125dc <xQueueSemaphoreTake+0x158>
 80125d4:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80125d6:	2200      	movs	r2, #0
 80125d8:	f883 2045 	strb.w	r2, [r3, #69]	@ 0x45
 80125dc:	f002 fece 	bl	801537c <vPortExitCritical>

		/* Update the timeout state to see if it has expired yet. */
		if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE )
 80125e0:	463a      	mov	r2, r7
 80125e2:	f107 030c 	add.w	r3, r7, #12
 80125e6:	4611      	mov	r1, r2
 80125e8:	4618      	mov	r0, r3
 80125ea:	f001 fbdb 	bl	8013da4 <xTaskCheckForTimeOut>
 80125ee:	4603      	mov	r3, r0
 80125f0:	2b00      	cmp	r3, #0
 80125f2:	d132      	bne.n	801265a <xQueueSemaphoreTake+0x1d6>
		{
			/* A block time is specified and not expired.  If the semaphore
			count is 0 then enter the Blocked state to wait for a semaphore to
			become available.  As semaphores are implemented with queues the
			queue being empty is equivalent to the semaphore count being 0. */
			if( prvIsQueueEmpty( pxQueue ) != pdFALSE )
 80125f4:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 80125f6:	f000 fa33 	bl	8012a60 <prvIsQueueEmpty>
 80125fa:	4603      	mov	r3, r0
 80125fc:	2b00      	cmp	r3, #0
 80125fe:	d026      	beq.n	801264e <xQueueSemaphoreTake+0x1ca>
			{
				traceBLOCKING_ON_QUEUE_RECEIVE( pxQueue );

				#if ( configUSE_MUTEXES == 1 )
				{
					if( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX )
 8012600:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8012602:	681b      	ldr	r3, [r3, #0]
 8012604:	2b00      	cmp	r3, #0
 8012606:	d109      	bne.n	801261c <xQueueSemaphoreTake+0x198>
					{
						taskENTER_CRITICAL();
 8012608:	f002 fe86 	bl	8015318 <vPortEnterCritical>
						{
							xInheritanceOccurred = xTaskPriorityInherit( pxQueue->u.xSemaphore.xMutexHolder );
 801260c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801260e:	689b      	ldr	r3, [r3, #8]
 8012610:	4618      	mov	r0, r3
 8012612:	f001 fd41 	bl	8014098 <xTaskPriorityInherit>
 8012616:	6338      	str	r0, [r7, #48]	@ 0x30
						}
						taskEXIT_CRITICAL();
 8012618:	f002 feb0 	bl	801537c <vPortExitCritical>
						mtCOVERAGE_TEST_MARKER();
					}
				}
				#endif

				vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait );
 801261c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801261e:	3324      	adds	r3, #36	@ 0x24
 8012620:	683a      	ldr	r2, [r7, #0]
 8012622:	4611      	mov	r1, r2
 8012624:	4618      	mov	r0, r3
 8012626:	f001 fac9 	bl	8013bbc <vTaskPlaceOnEventList>
				prvUnlockQueue( pxQueue );
 801262a:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 801262c:	f000 f9c6 	bl	80129bc <prvUnlockQueue>
				if( xTaskResumeAll() == pdFALSE )
 8012630:	f001 f8d6 	bl	80137e0 <xTaskResumeAll>
 8012634:	4603      	mov	r3, r0
 8012636:	2b00      	cmp	r3, #0
 8012638:	f47f af67 	bne.w	801250a <xQueueSemaphoreTake+0x86>
				{
					portYIELD_WITHIN_API();
 801263c:	4b18      	ldr	r3, [pc, #96]	@ (80126a0 <xQueueSemaphoreTake+0x21c>)
 801263e:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8012642:	601a      	str	r2, [r3, #0]
 8012644:	f3bf 8f4f 	dsb	sy
 8012648:	f3bf 8f6f 	isb	sy
 801264c:	e75d      	b.n	801250a <xQueueSemaphoreTake+0x86>
			}
			else
			{
				/* There was no timeout and the semaphore count was not 0, so
				attempt to take the semaphore again. */
				prvUnlockQueue( pxQueue );
 801264e:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 8012650:	f000 f9b4 	bl	80129bc <prvUnlockQueue>
				( void ) xTaskResumeAll();
 8012654:	f001 f8c4 	bl	80137e0 <xTaskResumeAll>
 8012658:	e757      	b.n	801250a <xQueueSemaphoreTake+0x86>
			}
		}
		else
		{
			/* Timed out. */
			prvUnlockQueue( pxQueue );
 801265a:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 801265c:	f000 f9ae 	bl	80129bc <prvUnlockQueue>
			( void ) xTaskResumeAll();
 8012660:	f001 f8be 	bl	80137e0 <xTaskResumeAll>

			/* If the semaphore count is 0 exit now as the timeout has
			expired.  Otherwise return to attempt to take the semaphore that is
			known to be available.  As semaphores are implemented by queues the
			queue being empty is equivalent to the semaphore count being 0. */
			if( prvIsQueueEmpty( pxQueue ) != pdFALSE )
 8012664:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 8012666:	f000 f9fb 	bl	8012a60 <prvIsQueueEmpty>
 801266a:	4603      	mov	r3, r0
 801266c:	2b00      	cmp	r3, #0
 801266e:	f43f af4c 	beq.w	801250a <xQueueSemaphoreTake+0x86>
				#if ( configUSE_MUTEXES == 1 )
				{
					/* xInheritanceOccurred could only have be set if
					pxQueue->uxQueueType == queueQUEUE_IS_MUTEX so no need to
					test the mutex type again to check it is actually a mutex. */
					if( xInheritanceOccurred != pdFALSE )
 8012672:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012674:	2b00      	cmp	r3, #0
 8012676:	d00d      	beq.n	8012694 <xQueueSemaphoreTake+0x210>
					{
						taskENTER_CRITICAL();
 8012678:	f002 fe4e 	bl	8015318 <vPortEnterCritical>
							/* This task blocking on the mutex caused another
							task to inherit this task's priority.  Now this task
							has timed out the priority should be disinherited
							again, but only as low as the next highest priority
							task that is waiting for the same mutex. */
							uxHighestWaitingPriority = prvGetDisinheritPriorityAfterTimeout( pxQueue );
 801267c:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 801267e:	f000 f8f5 	bl	801286c <prvGetDisinheritPriorityAfterTimeout>
 8012682:	6278      	str	r0, [r7, #36]	@ 0x24
							vTaskPriorityDisinheritAfterTimeout( pxQueue->u.xSemaphore.xMutexHolder, uxHighestWaitingPriority );
 8012684:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8012686:	689b      	ldr	r3, [r3, #8]
 8012688:	6a79      	ldr	r1, [r7, #36]	@ 0x24
 801268a:	4618      	mov	r0, r3
 801268c:	f001 fddc 	bl	8014248 <vTaskPriorityDisinheritAfterTimeout>
						}
						taskEXIT_CRITICAL();
 8012690:	f002 fe74 	bl	801537c <vPortExitCritical>
					}
				}
				#endif /* configUSE_MUTEXES */

				traceQUEUE_RECEIVE_FAILED( pxQueue );
				return errQUEUE_EMPTY;
 8012694:	2300      	movs	r3, #0
			{
				mtCOVERAGE_TEST_MARKER();
			}
		}
	} /*lint -restore */
}
 8012696:	4618      	mov	r0, r3
 8012698:	3738      	adds	r7, #56	@ 0x38
 801269a:	46bd      	mov	sp, r7
 801269c:	bd80      	pop	{r7, pc}
 801269e:	bf00      	nop
 80126a0:	e000ed04 	.word	0xe000ed04

080126a4 <xQueueReceiveFromISR>:
	} /*lint -restore */
}
/*-----------------------------------------------------------*/

BaseType_t xQueueReceiveFromISR( QueueHandle_t xQueue, void * const pvBuffer, BaseType_t * const pxHigherPriorityTaskWoken )
{
 80126a4:	b580      	push	{r7, lr}
 80126a6:	b08e      	sub	sp, #56	@ 0x38
 80126a8:	af00      	add	r7, sp, #0
 80126aa:	60f8      	str	r0, [r7, #12]
 80126ac:	60b9      	str	r1, [r7, #8]
 80126ae:	607a      	str	r2, [r7, #4]
BaseType_t xReturn;
UBaseType_t uxSavedInterruptStatus;
Queue_t * const pxQueue = xQueue;
 80126b0:	68fb      	ldr	r3, [r7, #12]
 80126b2:	633b      	str	r3, [r7, #48]	@ 0x30

	configASSERT( pxQueue );
 80126b4:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80126b6:	2b00      	cmp	r3, #0
 80126b8:	d10b      	bne.n	80126d2 <xQueueReceiveFromISR+0x2e>
	__asm volatile
 80126ba:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80126be:	f383 8811 	msr	BASEPRI, r3
 80126c2:	f3bf 8f6f 	isb	sy
 80126c6:	f3bf 8f4f 	dsb	sy
 80126ca:	623b      	str	r3, [r7, #32]
}
 80126cc:	bf00      	nop
 80126ce:	bf00      	nop
 80126d0:	e7fd      	b.n	80126ce <xQueueReceiveFromISR+0x2a>
	configASSERT( !( ( pvBuffer == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) );
 80126d2:	68bb      	ldr	r3, [r7, #8]
 80126d4:	2b00      	cmp	r3, #0
 80126d6:	d103      	bne.n	80126e0 <xQueueReceiveFromISR+0x3c>
 80126d8:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80126da:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 80126dc:	2b00      	cmp	r3, #0
 80126de:	d101      	bne.n	80126e4 <xQueueReceiveFromISR+0x40>
 80126e0:	2301      	movs	r3, #1
 80126e2:	e000      	b.n	80126e6 <xQueueReceiveFromISR+0x42>
 80126e4:	2300      	movs	r3, #0
 80126e6:	2b00      	cmp	r3, #0
 80126e8:	d10b      	bne.n	8012702 <xQueueReceiveFromISR+0x5e>
	__asm volatile
 80126ea:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80126ee:	f383 8811 	msr	BASEPRI, r3
 80126f2:	f3bf 8f6f 	isb	sy
 80126f6:	f3bf 8f4f 	dsb	sy
 80126fa:	61fb      	str	r3, [r7, #28]
}
 80126fc:	bf00      	nop
 80126fe:	bf00      	nop
 8012700:	e7fd      	b.n	80126fe <xQueueReceiveFromISR+0x5a>
	that have been assigned a priority at or (logically) below the maximum
	system call	interrupt priority.  FreeRTOS maintains a separate interrupt
	safe API to ensure interrupt entry is as fast and as simple as possible.
	More information (albeit Cortex-M specific) is provided on the following
	link: http://www.freertos.org/RTOS-Cortex-M3-M4.html */
	portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
 8012702:	f002 fee9 	bl	80154d8 <vPortValidateInterruptPriority>
	__asm volatile
 8012706:	f3ef 8211 	mrs	r2, BASEPRI
 801270a:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801270e:	f383 8811 	msr	BASEPRI, r3
 8012712:	f3bf 8f6f 	isb	sy
 8012716:	f3bf 8f4f 	dsb	sy
 801271a:	61ba      	str	r2, [r7, #24]
 801271c:	617b      	str	r3, [r7, #20]
	return ulOriginalBASEPRI;
 801271e:	69bb      	ldr	r3, [r7, #24]

	uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
 8012720:	62fb      	str	r3, [r7, #44]	@ 0x2c
	{
		const UBaseType_t uxMessagesWaiting = pxQueue->uxMessagesWaiting;
 8012722:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012724:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 8012726:	62bb      	str	r3, [r7, #40]	@ 0x28

		/* Cannot block in an ISR, so check there is data available. */
		if( uxMessagesWaiting > ( UBaseType_t ) 0 )
 8012728:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801272a:	2b00      	cmp	r3, #0
 801272c:	d02f      	beq.n	801278e <xQueueReceiveFromISR+0xea>
		{
			const int8_t cRxLock = pxQueue->cRxLock;
 801272e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012730:	f893 3044 	ldrb.w	r3, [r3, #68]	@ 0x44
 8012734:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27

			traceQUEUE_RECEIVE_FROM_ISR( pxQueue );

			prvCopyDataFromQueue( pxQueue, pvBuffer );
 8012738:	68b9      	ldr	r1, [r7, #8]
 801273a:	6b38      	ldr	r0, [r7, #48]	@ 0x30
 801273c:	f000 f918 	bl	8012970 <prvCopyDataFromQueue>
			pxQueue->uxMessagesWaiting = uxMessagesWaiting - ( UBaseType_t ) 1;
 8012740:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8012742:	1e5a      	subs	r2, r3, #1
 8012744:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012746:	639a      	str	r2, [r3, #56]	@ 0x38

			/* If the queue is locked the event list will not be modified.
			Instead update the lock count so the task that unlocks the queue
			will know that an ISR has removed data while the queue was
			locked. */
			if( cRxLock == queueUNLOCKED )
 8012748:	f997 3027 	ldrsb.w	r3, [r7, #39]	@ 0x27
 801274c:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8012750:	d112      	bne.n	8012778 <xQueueReceiveFromISR+0xd4>
			{
				if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
 8012752:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012754:	691b      	ldr	r3, [r3, #16]
 8012756:	2b00      	cmp	r3, #0
 8012758:	d016      	beq.n	8012788 <xQueueReceiveFromISR+0xe4>
				{
					if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
 801275a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801275c:	3310      	adds	r3, #16
 801275e:	4618      	mov	r0, r3
 8012760:	f001 fa7e 	bl	8013c60 <xTaskRemoveFromEventList>
 8012764:	4603      	mov	r3, r0
 8012766:	2b00      	cmp	r3, #0
 8012768:	d00e      	beq.n	8012788 <xQueueReceiveFromISR+0xe4>
					{
						/* The task waiting has a higher priority than us so
						force a context switch. */
						if( pxHigherPriorityTaskWoken != NULL )
 801276a:	687b      	ldr	r3, [r7, #4]
 801276c:	2b00      	cmp	r3, #0
 801276e:	d00b      	beq.n	8012788 <xQueueReceiveFromISR+0xe4>
						{
							*pxHigherPriorityTaskWoken = pdTRUE;
 8012770:	687b      	ldr	r3, [r7, #4]
 8012772:	2201      	movs	r2, #1
 8012774:	601a      	str	r2, [r3, #0]
 8012776:	e007      	b.n	8012788 <xQueueReceiveFromISR+0xe4>
			}
			else
			{
				/* Increment the lock count so the task that unlocks the queue
				knows that data was removed while it was locked. */
				pxQueue->cRxLock = ( int8_t ) ( cRxLock + 1 );
 8012778:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 801277c:	3301      	adds	r3, #1
 801277e:	b2db      	uxtb	r3, r3
 8012780:	b25a      	sxtb	r2, r3
 8012782:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012784:	f883 2044 	strb.w	r2, [r3, #68]	@ 0x44
			}

			xReturn = pdPASS;
 8012788:	2301      	movs	r3, #1
 801278a:	637b      	str	r3, [r7, #52]	@ 0x34
 801278c:	e001      	b.n	8012792 <xQueueReceiveFromISR+0xee>
		}
		else
		{
			xReturn = pdFAIL;
 801278e:	2300      	movs	r3, #0
 8012790:	637b      	str	r3, [r7, #52]	@ 0x34
 8012792:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8012794:	613b      	str	r3, [r7, #16]
	__asm volatile
 8012796:	693b      	ldr	r3, [r7, #16]
 8012798:	f383 8811 	msr	BASEPRI, r3
}
 801279c:	bf00      	nop
			traceQUEUE_RECEIVE_FROM_ISR_FAILED( pxQueue );
		}
	}
	portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );

	return xReturn;
 801279e:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
}
 80127a0:	4618      	mov	r0, r3
 80127a2:	3738      	adds	r7, #56	@ 0x38
 80127a4:	46bd      	mov	sp, r7
 80127a6:	bd80      	pop	{r7, pc}

080127a8 <uxQueueMessagesWaiting>:
	return xReturn;
}
/*-----------------------------------------------------------*/

UBaseType_t uxQueueMessagesWaiting( const QueueHandle_t xQueue )
{
 80127a8:	b580      	push	{r7, lr}
 80127aa:	b084      	sub	sp, #16
 80127ac:	af00      	add	r7, sp, #0
 80127ae:	6078      	str	r0, [r7, #4]
UBaseType_t uxReturn;

	configASSERT( xQueue );
 80127b0:	687b      	ldr	r3, [r7, #4]
 80127b2:	2b00      	cmp	r3, #0
 80127b4:	d10b      	bne.n	80127ce <uxQueueMessagesWaiting+0x26>
	__asm volatile
 80127b6:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80127ba:	f383 8811 	msr	BASEPRI, r3
 80127be:	f3bf 8f6f 	isb	sy
 80127c2:	f3bf 8f4f 	dsb	sy
 80127c6:	60bb      	str	r3, [r7, #8]
}
 80127c8:	bf00      	nop
 80127ca:	bf00      	nop
 80127cc:	e7fd      	b.n	80127ca <uxQueueMessagesWaiting+0x22>

	taskENTER_CRITICAL();
 80127ce:	f002 fda3 	bl	8015318 <vPortEnterCritical>
	{
		uxReturn = ( ( Queue_t * ) xQueue )->uxMessagesWaiting;
 80127d2:	687b      	ldr	r3, [r7, #4]
 80127d4:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 80127d6:	60fb      	str	r3, [r7, #12]
	}
	taskEXIT_CRITICAL();
 80127d8:	f002 fdd0 	bl	801537c <vPortExitCritical>

	return uxReturn;
 80127dc:	68fb      	ldr	r3, [r7, #12]
} /*lint !e818 Pointer cannot be declared const as xQueue is a typedef not pointer. */
 80127de:	4618      	mov	r0, r3
 80127e0:	3710      	adds	r7, #16
 80127e2:	46bd      	mov	sp, r7
 80127e4:	bd80      	pop	{r7, pc}

080127e6 <uxQueueMessagesWaitingFromISR>:
	return uxReturn;
} /*lint !e818 Pointer cannot be declared const as xQueue is a typedef not pointer. */
/*-----------------------------------------------------------*/

UBaseType_t uxQueueMessagesWaitingFromISR( const QueueHandle_t xQueue )
{
 80127e6:	b480      	push	{r7}
 80127e8:	b087      	sub	sp, #28
 80127ea:	af00      	add	r7, sp, #0
 80127ec:	6078      	str	r0, [r7, #4]
UBaseType_t uxReturn;
Queue_t * const pxQueue = xQueue;
 80127ee:	687b      	ldr	r3, [r7, #4]
 80127f0:	617b      	str	r3, [r7, #20]

	configASSERT( pxQueue );
 80127f2:	697b      	ldr	r3, [r7, #20]
 80127f4:	2b00      	cmp	r3, #0
 80127f6:	d10b      	bne.n	8012810 <uxQueueMessagesWaitingFromISR+0x2a>
	__asm volatile
 80127f8:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80127fc:	f383 8811 	msr	BASEPRI, r3
 8012800:	f3bf 8f6f 	isb	sy
 8012804:	f3bf 8f4f 	dsb	sy
 8012808:	60fb      	str	r3, [r7, #12]
}
 801280a:	bf00      	nop
 801280c:	bf00      	nop
 801280e:	e7fd      	b.n	801280c <uxQueueMessagesWaitingFromISR+0x26>
	uxReturn = pxQueue->uxMessagesWaiting;
 8012810:	697b      	ldr	r3, [r7, #20]
 8012812:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 8012814:	613b      	str	r3, [r7, #16]

	return uxReturn;
 8012816:	693b      	ldr	r3, [r7, #16]
} /*lint !e818 Pointer cannot be declared const as xQueue is a typedef not pointer. */
 8012818:	4618      	mov	r0, r3
 801281a:	371c      	adds	r7, #28
 801281c:	46bd      	mov	sp, r7
 801281e:	f85d 7b04 	ldr.w	r7, [sp], #4
 8012822:	4770      	bx	lr

08012824 <vQueueDelete>:
/*-----------------------------------------------------------*/

void vQueueDelete( QueueHandle_t xQueue )
{
 8012824:	b580      	push	{r7, lr}
 8012826:	b084      	sub	sp, #16
 8012828:	af00      	add	r7, sp, #0
 801282a:	6078      	str	r0, [r7, #4]
Queue_t * const pxQueue = xQueue;
 801282c:	687b      	ldr	r3, [r7, #4]
 801282e:	60fb      	str	r3, [r7, #12]

	configASSERT( pxQueue );
 8012830:	68fb      	ldr	r3, [r7, #12]
 8012832:	2b00      	cmp	r3, #0
 8012834:	d10b      	bne.n	801284e <vQueueDelete+0x2a>
	__asm volatile
 8012836:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801283a:	f383 8811 	msr	BASEPRI, r3
 801283e:	f3bf 8f6f 	isb	sy
 8012842:	f3bf 8f4f 	dsb	sy
 8012846:	60bb      	str	r3, [r7, #8]
}
 8012848:	bf00      	nop
 801284a:	bf00      	nop
 801284c:	e7fd      	b.n	801284a <vQueueDelete+0x26>
	traceQUEUE_DELETE( pxQueue );

	#if ( configQUEUE_REGISTRY_SIZE > 0 )
	{
		vQueueUnregisterQueue( pxQueue );
 801284e:	68f8      	ldr	r0, [r7, #12]
 8012850:	f000 f95e 	bl	8012b10 <vQueueUnregisterQueue>
	}
	#elif( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )
	{
		/* The queue could have been allocated statically or dynamically, so
		check before attempting to free the memory. */
		if( pxQueue->ucStaticallyAllocated == ( uint8_t ) pdFALSE )
 8012854:	68fb      	ldr	r3, [r7, #12]
 8012856:	f893 3046 	ldrb.w	r3, [r3, #70]	@ 0x46
 801285a:	2b00      	cmp	r3, #0
 801285c:	d102      	bne.n	8012864 <vQueueDelete+0x40>
		{
			vPortFree( pxQueue );
 801285e:	68f8      	ldr	r0, [r7, #12]
 8012860:	f002 ff4a 	bl	80156f8 <vPortFree>
		/* The queue must have been statically allocated, so is not going to be
		deleted.  Avoid compiler warnings about the unused parameter. */
		( void ) pxQueue;
	}
	#endif /* configSUPPORT_DYNAMIC_ALLOCATION */
}
 8012864:	bf00      	nop
 8012866:	3710      	adds	r7, #16
 8012868:	46bd      	mov	sp, r7
 801286a:	bd80      	pop	{r7, pc}

0801286c <prvGetDisinheritPriorityAfterTimeout>:
/*-----------------------------------------------------------*/

#if( configUSE_MUTEXES == 1 )

	static UBaseType_t prvGetDisinheritPriorityAfterTimeout( const Queue_t * const pxQueue )
	{
 801286c:	b480      	push	{r7}
 801286e:	b085      	sub	sp, #20
 8012870:	af00      	add	r7, sp, #0
 8012872:	6078      	str	r0, [r7, #4]
		priority, but the waiting task times out, then the holder should
		disinherit the priority - but only down to the highest priority of any
		other tasks that are waiting for the same mutex.  For this purpose,
		return the priority of the highest priority task that is waiting for the
		mutex. */
		if( listCURRENT_LIST_LENGTH( &( pxQueue->xTasksWaitingToReceive ) ) > 0U )
 8012874:	687b      	ldr	r3, [r7, #4]
 8012876:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8012878:	2b00      	cmp	r3, #0
 801287a:	d006      	beq.n	801288a <prvGetDisinheritPriorityAfterTimeout+0x1e>
		{
			uxHighestPriorityOfWaitingTasks = ( UBaseType_t ) configMAX_PRIORITIES - ( UBaseType_t ) listGET_ITEM_VALUE_OF_HEAD_ENTRY( &( pxQueue->xTasksWaitingToReceive ) );
 801287c:	687b      	ldr	r3, [r7, #4]
 801287e:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8012880:	681b      	ldr	r3, [r3, #0]
 8012882:	f1c3 0338 	rsb	r3, r3, #56	@ 0x38
 8012886:	60fb      	str	r3, [r7, #12]
 8012888:	e001      	b.n	801288e <prvGetDisinheritPriorityAfterTimeout+0x22>
		}
		else
		{
			uxHighestPriorityOfWaitingTasks = tskIDLE_PRIORITY;
 801288a:	2300      	movs	r3, #0
 801288c:	60fb      	str	r3, [r7, #12]
		}

		return uxHighestPriorityOfWaitingTasks;
 801288e:	68fb      	ldr	r3, [r7, #12]
	}
 8012890:	4618      	mov	r0, r3
 8012892:	3714      	adds	r7, #20
 8012894:	46bd      	mov	sp, r7
 8012896:	f85d 7b04 	ldr.w	r7, [sp], #4
 801289a:	4770      	bx	lr

0801289c <prvCopyDataToQueue>:

#endif /* configUSE_MUTEXES */
/*-----------------------------------------------------------*/

static BaseType_t prvCopyDataToQueue( Queue_t * const pxQueue, const void *pvItemToQueue, const BaseType_t xPosition )
{
 801289c:	b580      	push	{r7, lr}
 801289e:	b086      	sub	sp, #24
 80128a0:	af00      	add	r7, sp, #0
 80128a2:	60f8      	str	r0, [r7, #12]
 80128a4:	60b9      	str	r1, [r7, #8]
 80128a6:	607a      	str	r2, [r7, #4]
BaseType_t xReturn = pdFALSE;
 80128a8:	2300      	movs	r3, #0
 80128aa:	617b      	str	r3, [r7, #20]
UBaseType_t uxMessagesWaiting;

	/* This function is called from a critical section. */

	uxMessagesWaiting = pxQueue->uxMessagesWaiting;
 80128ac:	68fb      	ldr	r3, [r7, #12]
 80128ae:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 80128b0:	613b      	str	r3, [r7, #16]

	if( pxQueue->uxItemSize == ( UBaseType_t ) 0 )
 80128b2:	68fb      	ldr	r3, [r7, #12]
 80128b4:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 80128b6:	2b00      	cmp	r3, #0
 80128b8:	d10d      	bne.n	80128d6 <prvCopyDataToQueue+0x3a>
	{
		#if ( configUSE_MUTEXES == 1 )
		{
			if( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX )
 80128ba:	68fb      	ldr	r3, [r7, #12]
 80128bc:	681b      	ldr	r3, [r3, #0]
 80128be:	2b00      	cmp	r3, #0
 80128c0:	d14d      	bne.n	801295e <prvCopyDataToQueue+0xc2>
			{
				/* The mutex is no longer being held. */
				xReturn = xTaskPriorityDisinherit( pxQueue->u.xSemaphore.xMutexHolder );
 80128c2:	68fb      	ldr	r3, [r7, #12]
 80128c4:	689b      	ldr	r3, [r3, #8]
 80128c6:	4618      	mov	r0, r3
 80128c8:	f001 fc4e 	bl	8014168 <xTaskPriorityDisinherit>
 80128cc:	6178      	str	r0, [r7, #20]
				pxQueue->u.xSemaphore.xMutexHolder = NULL;
 80128ce:	68fb      	ldr	r3, [r7, #12]
 80128d0:	2200      	movs	r2, #0
 80128d2:	609a      	str	r2, [r3, #8]
 80128d4:	e043      	b.n	801295e <prvCopyDataToQueue+0xc2>
				mtCOVERAGE_TEST_MARKER();
			}
		}
		#endif /* configUSE_MUTEXES */
	}
	else if( xPosition == queueSEND_TO_BACK )
 80128d6:	687b      	ldr	r3, [r7, #4]
 80128d8:	2b00      	cmp	r3, #0
 80128da:	d119      	bne.n	8012910 <prvCopyDataToQueue+0x74>
	{
		( void ) memcpy( ( void * ) pxQueue->pcWriteTo, pvItemToQueue, ( size_t ) pxQueue->uxItemSize ); /*lint !e961 !e418 !e9087 MISRA exception as the casts are only redundant for some ports, plus previous logic ensures a null pointer can only be passed to memcpy() if the copy size is 0.  Cast to void required by function signature and safe as no alignment requirement and copy length specified in bytes. */
 80128dc:	68fb      	ldr	r3, [r7, #12]
 80128de:	6858      	ldr	r0, [r3, #4]
 80128e0:	68fb      	ldr	r3, [r7, #12]
 80128e2:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 80128e4:	461a      	mov	r2, r3
 80128e6:	68b9      	ldr	r1, [r7, #8]
 80128e8:	f017 fef1 	bl	802a6ce <memcpy>
		pxQueue->pcWriteTo += pxQueue->uxItemSize; /*lint !e9016 Pointer arithmetic on char types ok, especially in this use case where it is the clearest way of conveying intent. */
 80128ec:	68fb      	ldr	r3, [r7, #12]
 80128ee:	685a      	ldr	r2, [r3, #4]
 80128f0:	68fb      	ldr	r3, [r7, #12]
 80128f2:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 80128f4:	441a      	add	r2, r3
 80128f6:	68fb      	ldr	r3, [r7, #12]
 80128f8:	605a      	str	r2, [r3, #4]
		if( pxQueue->pcWriteTo >= pxQueue->u.xQueue.pcTail ) /*lint !e946 MISRA exception justified as comparison of pointers is the cleanest solution. */
 80128fa:	68fb      	ldr	r3, [r7, #12]
 80128fc:	685a      	ldr	r2, [r3, #4]
 80128fe:	68fb      	ldr	r3, [r7, #12]
 8012900:	689b      	ldr	r3, [r3, #8]
 8012902:	429a      	cmp	r2, r3
 8012904:	d32b      	bcc.n	801295e <prvCopyDataToQueue+0xc2>
		{
			pxQueue->pcWriteTo = pxQueue->pcHead;
 8012906:	68fb      	ldr	r3, [r7, #12]
 8012908:	681a      	ldr	r2, [r3, #0]
 801290a:	68fb      	ldr	r3, [r7, #12]
 801290c:	605a      	str	r2, [r3, #4]
 801290e:	e026      	b.n	801295e <prvCopyDataToQueue+0xc2>
			mtCOVERAGE_TEST_MARKER();
		}
	}
	else
	{
		( void ) memcpy( ( void * ) pxQueue->u.xQueue.pcReadFrom, pvItemToQueue, ( size_t ) pxQueue->uxItemSize ); /*lint !e961 !e9087 !e418 MISRA exception as the casts are only redundant for some ports.  Cast to void required by function signature and safe as no alignment requirement and copy length specified in bytes.  Assert checks null pointer only used when length is 0. */
 8012910:	68fb      	ldr	r3, [r7, #12]
 8012912:	68d8      	ldr	r0, [r3, #12]
 8012914:	68fb      	ldr	r3, [r7, #12]
 8012916:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8012918:	461a      	mov	r2, r3
 801291a:	68b9      	ldr	r1, [r7, #8]
 801291c:	f017 fed7 	bl	802a6ce <memcpy>
		pxQueue->u.xQueue.pcReadFrom -= pxQueue->uxItemSize;
 8012920:	68fb      	ldr	r3, [r7, #12]
 8012922:	68da      	ldr	r2, [r3, #12]
 8012924:	68fb      	ldr	r3, [r7, #12]
 8012926:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8012928:	425b      	negs	r3, r3
 801292a:	441a      	add	r2, r3
 801292c:	68fb      	ldr	r3, [r7, #12]
 801292e:	60da      	str	r2, [r3, #12]
		if( pxQueue->u.xQueue.pcReadFrom < pxQueue->pcHead ) /*lint !e946 MISRA exception justified as comparison of pointers is the cleanest solution. */
 8012930:	68fb      	ldr	r3, [r7, #12]
 8012932:	68da      	ldr	r2, [r3, #12]
 8012934:	68fb      	ldr	r3, [r7, #12]
 8012936:	681b      	ldr	r3, [r3, #0]
 8012938:	429a      	cmp	r2, r3
 801293a:	d207      	bcs.n	801294c <prvCopyDataToQueue+0xb0>
		{
			pxQueue->u.xQueue.pcReadFrom = ( pxQueue->u.xQueue.pcTail - pxQueue->uxItemSize );
 801293c:	68fb      	ldr	r3, [r7, #12]
 801293e:	689a      	ldr	r2, [r3, #8]
 8012940:	68fb      	ldr	r3, [r7, #12]
 8012942:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8012944:	425b      	negs	r3, r3
 8012946:	441a      	add	r2, r3
 8012948:	68fb      	ldr	r3, [r7, #12]
 801294a:	60da      	str	r2, [r3, #12]
		else
		{
			mtCOVERAGE_TEST_MARKER();
		}

		if( xPosition == queueOVERWRITE )
 801294c:	687b      	ldr	r3, [r7, #4]
 801294e:	2b02      	cmp	r3, #2
 8012950:	d105      	bne.n	801295e <prvCopyDataToQueue+0xc2>
		{
			if( uxMessagesWaiting > ( UBaseType_t ) 0 )
 8012952:	693b      	ldr	r3, [r7, #16]
 8012954:	2b00      	cmp	r3, #0
 8012956:	d002      	beq.n	801295e <prvCopyDataToQueue+0xc2>
			{
				/* An item is not being added but overwritten, so subtract
				one from the recorded number of items in the queue so when
				one is added again below the number of recorded items remains
				correct. */
				--uxMessagesWaiting;
 8012958:	693b      	ldr	r3, [r7, #16]
 801295a:	3b01      	subs	r3, #1
 801295c:	613b      	str	r3, [r7, #16]
		{
			mtCOVERAGE_TEST_MARKER();
		}
	}

	pxQueue->uxMessagesWaiting = uxMessagesWaiting + ( UBaseType_t ) 1;
 801295e:	693b      	ldr	r3, [r7, #16]
 8012960:	1c5a      	adds	r2, r3, #1
 8012962:	68fb      	ldr	r3, [r7, #12]
 8012964:	639a      	str	r2, [r3, #56]	@ 0x38

	return xReturn;
 8012966:	697b      	ldr	r3, [r7, #20]
}
 8012968:	4618      	mov	r0, r3
 801296a:	3718      	adds	r7, #24
 801296c:	46bd      	mov	sp, r7
 801296e:	bd80      	pop	{r7, pc}

08012970 <prvCopyDataFromQueue>:
/*-----------------------------------------------------------*/

static void prvCopyDataFromQueue( Queue_t * const pxQueue, void * const pvBuffer )
{
 8012970:	b580      	push	{r7, lr}
 8012972:	b082      	sub	sp, #8
 8012974:	af00      	add	r7, sp, #0
 8012976:	6078      	str	r0, [r7, #4]
 8012978:	6039      	str	r1, [r7, #0]
	if( pxQueue->uxItemSize != ( UBaseType_t ) 0 )
 801297a:	687b      	ldr	r3, [r7, #4]
 801297c:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 801297e:	2b00      	cmp	r3, #0
 8012980:	d018      	beq.n	80129b4 <prvCopyDataFromQueue+0x44>
	{
		pxQueue->u.xQueue.pcReadFrom += pxQueue->uxItemSize; /*lint !e9016 Pointer arithmetic on char types ok, especially in this use case where it is the clearest way of conveying intent. */
 8012982:	687b      	ldr	r3, [r7, #4]
 8012984:	68da      	ldr	r2, [r3, #12]
 8012986:	687b      	ldr	r3, [r7, #4]
 8012988:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 801298a:	441a      	add	r2, r3
 801298c:	687b      	ldr	r3, [r7, #4]
 801298e:	60da      	str	r2, [r3, #12]
		if( pxQueue->u.xQueue.pcReadFrom >= pxQueue->u.xQueue.pcTail ) /*lint !e946 MISRA exception justified as use of the relational operator is the cleanest solutions. */
 8012990:	687b      	ldr	r3, [r7, #4]
 8012992:	68da      	ldr	r2, [r3, #12]
 8012994:	687b      	ldr	r3, [r7, #4]
 8012996:	689b      	ldr	r3, [r3, #8]
 8012998:	429a      	cmp	r2, r3
 801299a:	d303      	bcc.n	80129a4 <prvCopyDataFromQueue+0x34>
		{
			pxQueue->u.xQueue.pcReadFrom = pxQueue->pcHead;
 801299c:	687b      	ldr	r3, [r7, #4]
 801299e:	681a      	ldr	r2, [r3, #0]
 80129a0:	687b      	ldr	r3, [r7, #4]
 80129a2:	60da      	str	r2, [r3, #12]
		}
		else
		{
			mtCOVERAGE_TEST_MARKER();
		}
		( void ) memcpy( ( void * ) pvBuffer, ( void * ) pxQueue->u.xQueue.pcReadFrom, ( size_t ) pxQueue->uxItemSize ); /*lint !e961 !e418 !e9087 MISRA exception as the casts are only redundant for some ports.  Also previous logic ensures a null pointer can only be passed to memcpy() when the count is 0.  Cast to void required by function signature and safe as no alignment requirement and copy length specified in bytes. */
 80129a4:	687b      	ldr	r3, [r7, #4]
 80129a6:	68d9      	ldr	r1, [r3, #12]
 80129a8:	687b      	ldr	r3, [r7, #4]
 80129aa:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 80129ac:	461a      	mov	r2, r3
 80129ae:	6838      	ldr	r0, [r7, #0]
 80129b0:	f017 fe8d 	bl	802a6ce <memcpy>
	}
}
 80129b4:	bf00      	nop
 80129b6:	3708      	adds	r7, #8
 80129b8:	46bd      	mov	sp, r7
 80129ba:	bd80      	pop	{r7, pc}

080129bc <prvUnlockQueue>:
/*-----------------------------------------------------------*/

static void prvUnlockQueue( Queue_t * const pxQueue )
{
 80129bc:	b580      	push	{r7, lr}
 80129be:	b084      	sub	sp, #16
 80129c0:	af00      	add	r7, sp, #0
 80129c2:	6078      	str	r0, [r7, #4]

	/* The lock counts contains the number of extra data items placed or
	removed from the queue while the queue was locked.  When a queue is
	locked items can be added or removed, but the event lists cannot be
	updated. */
	taskENTER_CRITICAL();
 80129c4:	f002 fca8 	bl	8015318 <vPortEnterCritical>
	{
		int8_t cTxLock = pxQueue->cTxLock;
 80129c8:	687b      	ldr	r3, [r7, #4]
 80129ca:	f893 3045 	ldrb.w	r3, [r3, #69]	@ 0x45
 80129ce:	73fb      	strb	r3, [r7, #15]

		/* See if data was added to the queue while it was locked. */
		while( cTxLock > queueLOCKED_UNMODIFIED )
 80129d0:	e011      	b.n	80129f6 <prvUnlockQueue+0x3a>
			}
			#else /* configUSE_QUEUE_SETS */
			{
				/* Tasks that are removed from the event list will get added to
				the pending ready list as the scheduler is still suspended. */
				if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
 80129d2:	687b      	ldr	r3, [r7, #4]
 80129d4:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 80129d6:	2b00      	cmp	r3, #0
 80129d8:	d012      	beq.n	8012a00 <prvUnlockQueue+0x44>
				{
					if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
 80129da:	687b      	ldr	r3, [r7, #4]
 80129dc:	3324      	adds	r3, #36	@ 0x24
 80129de:	4618      	mov	r0, r3
 80129e0:	f001 f93e 	bl	8013c60 <xTaskRemoveFromEventList>
 80129e4:	4603      	mov	r3, r0
 80129e6:	2b00      	cmp	r3, #0
 80129e8:	d001      	beq.n	80129ee <prvUnlockQueue+0x32>
					{
						/* The task waiting has a higher priority so record that
						a context switch is required. */
						vTaskMissedYield();
 80129ea:	f001 fa3f 	bl	8013e6c <vTaskMissedYield>
					break;
				}
			}
			#endif /* configUSE_QUEUE_SETS */

			--cTxLock;
 80129ee:	7bfb      	ldrb	r3, [r7, #15]
 80129f0:	3b01      	subs	r3, #1
 80129f2:	b2db      	uxtb	r3, r3
 80129f4:	73fb      	strb	r3, [r7, #15]
		while( cTxLock > queueLOCKED_UNMODIFIED )
 80129f6:	f997 300f 	ldrsb.w	r3, [r7, #15]
 80129fa:	2b00      	cmp	r3, #0
 80129fc:	dce9      	bgt.n	80129d2 <prvUnlockQueue+0x16>
 80129fe:	e000      	b.n	8012a02 <prvUnlockQueue+0x46>
					break;
 8012a00:	bf00      	nop
		}

		pxQueue->cTxLock = queueUNLOCKED;
 8012a02:	687b      	ldr	r3, [r7, #4]
 8012a04:	22ff      	movs	r2, #255	@ 0xff
 8012a06:	f883 2045 	strb.w	r2, [r3, #69]	@ 0x45
	}
	taskEXIT_CRITICAL();
 8012a0a:	f002 fcb7 	bl	801537c <vPortExitCritical>

	/* Do the same for the Rx lock. */
	taskENTER_CRITICAL();
 8012a0e:	f002 fc83 	bl	8015318 <vPortEnterCritical>
	{
		int8_t cRxLock = pxQueue->cRxLock;
 8012a12:	687b      	ldr	r3, [r7, #4]
 8012a14:	f893 3044 	ldrb.w	r3, [r3, #68]	@ 0x44
 8012a18:	73bb      	strb	r3, [r7, #14]

		while( cRxLock > queueLOCKED_UNMODIFIED )
 8012a1a:	e011      	b.n	8012a40 <prvUnlockQueue+0x84>
		{
			if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
 8012a1c:	687b      	ldr	r3, [r7, #4]
 8012a1e:	691b      	ldr	r3, [r3, #16]
 8012a20:	2b00      	cmp	r3, #0
 8012a22:	d012      	beq.n	8012a4a <prvUnlockQueue+0x8e>
			{
				if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
 8012a24:	687b      	ldr	r3, [r7, #4]
 8012a26:	3310      	adds	r3, #16
 8012a28:	4618      	mov	r0, r3
 8012a2a:	f001 f919 	bl	8013c60 <xTaskRemoveFromEventList>
 8012a2e:	4603      	mov	r3, r0
 8012a30:	2b00      	cmp	r3, #0
 8012a32:	d001      	beq.n	8012a38 <prvUnlockQueue+0x7c>
				{
					vTaskMissedYield();
 8012a34:	f001 fa1a 	bl	8013e6c <vTaskMissedYield>
				else
				{
					mtCOVERAGE_TEST_MARKER();
				}

				--cRxLock;
 8012a38:	7bbb      	ldrb	r3, [r7, #14]
 8012a3a:	3b01      	subs	r3, #1
 8012a3c:	b2db      	uxtb	r3, r3
 8012a3e:	73bb      	strb	r3, [r7, #14]
		while( cRxLock > queueLOCKED_UNMODIFIED )
 8012a40:	f997 300e 	ldrsb.w	r3, [r7, #14]
 8012a44:	2b00      	cmp	r3, #0
 8012a46:	dce9      	bgt.n	8012a1c <prvUnlockQueue+0x60>
 8012a48:	e000      	b.n	8012a4c <prvUnlockQueue+0x90>
			}
			else
			{
				break;
 8012a4a:	bf00      	nop
			}
		}

		pxQueue->cRxLock = queueUNLOCKED;
 8012a4c:	687b      	ldr	r3, [r7, #4]
 8012a4e:	22ff      	movs	r2, #255	@ 0xff
 8012a50:	f883 2044 	strb.w	r2, [r3, #68]	@ 0x44
	}
	taskEXIT_CRITICAL();
 8012a54:	f002 fc92 	bl	801537c <vPortExitCritical>
}
 8012a58:	bf00      	nop
 8012a5a:	3710      	adds	r7, #16
 8012a5c:	46bd      	mov	sp, r7
 8012a5e:	bd80      	pop	{r7, pc}

08012a60 <prvIsQueueEmpty>:
/*-----------------------------------------------------------*/

static BaseType_t prvIsQueueEmpty( const Queue_t *pxQueue )
{
 8012a60:	b580      	push	{r7, lr}
 8012a62:	b084      	sub	sp, #16
 8012a64:	af00      	add	r7, sp, #0
 8012a66:	6078      	str	r0, [r7, #4]
BaseType_t xReturn;

	taskENTER_CRITICAL();
 8012a68:	f002 fc56 	bl	8015318 <vPortEnterCritical>
	{
		if( pxQueue->uxMessagesWaiting == ( UBaseType_t )  0 )
 8012a6c:	687b      	ldr	r3, [r7, #4]
 8012a6e:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 8012a70:	2b00      	cmp	r3, #0
 8012a72:	d102      	bne.n	8012a7a <prvIsQueueEmpty+0x1a>
		{
			xReturn = pdTRUE;
 8012a74:	2301      	movs	r3, #1
 8012a76:	60fb      	str	r3, [r7, #12]
 8012a78:	e001      	b.n	8012a7e <prvIsQueueEmpty+0x1e>
		}
		else
		{
			xReturn = pdFALSE;
 8012a7a:	2300      	movs	r3, #0
 8012a7c:	60fb      	str	r3, [r7, #12]
		}
	}
	taskEXIT_CRITICAL();
 8012a7e:	f002 fc7d 	bl	801537c <vPortExitCritical>

	return xReturn;
 8012a82:	68fb      	ldr	r3, [r7, #12]
}
 8012a84:	4618      	mov	r0, r3
 8012a86:	3710      	adds	r7, #16
 8012a88:	46bd      	mov	sp, r7
 8012a8a:	bd80      	pop	{r7, pc}

08012a8c <prvIsQueueFull>:
	return xReturn;
} /*lint !e818 xQueue could not be pointer to const because it is a typedef. */
/*-----------------------------------------------------------*/

static BaseType_t prvIsQueueFull( const Queue_t *pxQueue )
{
 8012a8c:	b580      	push	{r7, lr}
 8012a8e:	b084      	sub	sp, #16
 8012a90:	af00      	add	r7, sp, #0
 8012a92:	6078      	str	r0, [r7, #4]
BaseType_t xReturn;

	taskENTER_CRITICAL();
 8012a94:	f002 fc40 	bl	8015318 <vPortEnterCritical>
	{
		if( pxQueue->uxMessagesWaiting == pxQueue->uxLength )
 8012a98:	687b      	ldr	r3, [r7, #4]
 8012a9a:	6b9a      	ldr	r2, [r3, #56]	@ 0x38
 8012a9c:	687b      	ldr	r3, [r7, #4]
 8012a9e:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 8012aa0:	429a      	cmp	r2, r3
 8012aa2:	d102      	bne.n	8012aaa <prvIsQueueFull+0x1e>
		{
			xReturn = pdTRUE;
 8012aa4:	2301      	movs	r3, #1
 8012aa6:	60fb      	str	r3, [r7, #12]
 8012aa8:	e001      	b.n	8012aae <prvIsQueueFull+0x22>
		}
		else
		{
			xReturn = pdFALSE;
 8012aaa:	2300      	movs	r3, #0
 8012aac:	60fb      	str	r3, [r7, #12]
		}
	}
	taskEXIT_CRITICAL();
 8012aae:	f002 fc65 	bl	801537c <vPortExitCritical>

	return xReturn;
 8012ab2:	68fb      	ldr	r3, [r7, #12]
}
 8012ab4:	4618      	mov	r0, r3
 8012ab6:	3710      	adds	r7, #16
 8012ab8:	46bd      	mov	sp, r7
 8012aba:	bd80      	pop	{r7, pc}

08012abc <vQueueAddToRegistry>:
/*-----------------------------------------------------------*/

#if ( configQUEUE_REGISTRY_SIZE > 0 )

	void vQueueAddToRegistry( QueueHandle_t xQueue, const char *pcQueueName ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
	{
 8012abc:	b480      	push	{r7}
 8012abe:	b085      	sub	sp, #20
 8012ac0:	af00      	add	r7, sp, #0
 8012ac2:	6078      	str	r0, [r7, #4]
 8012ac4:	6039      	str	r1, [r7, #0]
	UBaseType_t ux;

		/* See if there is an empty space in the registry.  A NULL name denotes
		a free slot. */
		for( ux = ( UBaseType_t ) 0U; ux < ( UBaseType_t ) configQUEUE_REGISTRY_SIZE; ux++ )
 8012ac6:	2300      	movs	r3, #0
 8012ac8:	60fb      	str	r3, [r7, #12]
 8012aca:	e014      	b.n	8012af6 <vQueueAddToRegistry+0x3a>
		{
			if( xQueueRegistry[ ux ].pcQueueName == NULL )
 8012acc:	4a0f      	ldr	r2, [pc, #60]	@ (8012b0c <vQueueAddToRegistry+0x50>)
 8012ace:	68fb      	ldr	r3, [r7, #12]
 8012ad0:	f852 3033 	ldr.w	r3, [r2, r3, lsl #3]
 8012ad4:	2b00      	cmp	r3, #0
 8012ad6:	d10b      	bne.n	8012af0 <vQueueAddToRegistry+0x34>
			{
				/* Store the information on this queue. */
				xQueueRegistry[ ux ].pcQueueName = pcQueueName;
 8012ad8:	490c      	ldr	r1, [pc, #48]	@ (8012b0c <vQueueAddToRegistry+0x50>)
 8012ada:	68fb      	ldr	r3, [r7, #12]
 8012adc:	683a      	ldr	r2, [r7, #0]
 8012ade:	f841 2033 	str.w	r2, [r1, r3, lsl #3]
				xQueueRegistry[ ux ].xHandle = xQueue;
 8012ae2:	4a0a      	ldr	r2, [pc, #40]	@ (8012b0c <vQueueAddToRegistry+0x50>)
 8012ae4:	68fb      	ldr	r3, [r7, #12]
 8012ae6:	00db      	lsls	r3, r3, #3
 8012ae8:	4413      	add	r3, r2
 8012aea:	687a      	ldr	r2, [r7, #4]
 8012aec:	605a      	str	r2, [r3, #4]

				traceQUEUE_REGISTRY_ADD( xQueue, pcQueueName );
				break;
 8012aee:	e006      	b.n	8012afe <vQueueAddToRegistry+0x42>
		for( ux = ( UBaseType_t ) 0U; ux < ( UBaseType_t ) configQUEUE_REGISTRY_SIZE; ux++ )
 8012af0:	68fb      	ldr	r3, [r7, #12]
 8012af2:	3301      	adds	r3, #1
 8012af4:	60fb      	str	r3, [r7, #12]
 8012af6:	68fb      	ldr	r3, [r7, #12]
 8012af8:	2b07      	cmp	r3, #7
 8012afa:	d9e7      	bls.n	8012acc <vQueueAddToRegistry+0x10>
			else
			{
				mtCOVERAGE_TEST_MARKER();
			}
		}
	}
 8012afc:	bf00      	nop
 8012afe:	bf00      	nop
 8012b00:	3714      	adds	r7, #20
 8012b02:	46bd      	mov	sp, r7
 8012b04:	f85d 7b04 	ldr.w	r7, [sp], #4
 8012b08:	4770      	bx	lr
 8012b0a:	bf00      	nop
 8012b0c:	24003d20 	.word	0x24003d20

08012b10 <vQueueUnregisterQueue>:
/*-----------------------------------------------------------*/

#if ( configQUEUE_REGISTRY_SIZE > 0 )

	void vQueueUnregisterQueue( QueueHandle_t xQueue )
	{
 8012b10:	b480      	push	{r7}
 8012b12:	b085      	sub	sp, #20
 8012b14:	af00      	add	r7, sp, #0
 8012b16:	6078      	str	r0, [r7, #4]
	UBaseType_t ux;

		/* See if the handle of the queue being unregistered in actually in the
		registry. */
		for( ux = ( UBaseType_t ) 0U; ux < ( UBaseType_t ) configQUEUE_REGISTRY_SIZE; ux++ )
 8012b18:	2300      	movs	r3, #0
 8012b1a:	60fb      	str	r3, [r7, #12]
 8012b1c:	e016      	b.n	8012b4c <vQueueUnregisterQueue+0x3c>
		{
			if( xQueueRegistry[ ux ].xHandle == xQueue )
 8012b1e:	4a10      	ldr	r2, [pc, #64]	@ (8012b60 <vQueueUnregisterQueue+0x50>)
 8012b20:	68fb      	ldr	r3, [r7, #12]
 8012b22:	00db      	lsls	r3, r3, #3
 8012b24:	4413      	add	r3, r2
 8012b26:	685b      	ldr	r3, [r3, #4]
 8012b28:	687a      	ldr	r2, [r7, #4]
 8012b2a:	429a      	cmp	r2, r3
 8012b2c:	d10b      	bne.n	8012b46 <vQueueUnregisterQueue+0x36>
			{
				/* Set the name to NULL to show that this slot if free again. */
				xQueueRegistry[ ux ].pcQueueName = NULL;
 8012b2e:	4a0c      	ldr	r2, [pc, #48]	@ (8012b60 <vQueueUnregisterQueue+0x50>)
 8012b30:	68fb      	ldr	r3, [r7, #12]
 8012b32:	2100      	movs	r1, #0
 8012b34:	f842 1033 	str.w	r1, [r2, r3, lsl #3]

				/* Set the handle to NULL to ensure the same queue handle cannot
				appear in the registry twice if it is added, removed, then
				added again. */
				xQueueRegistry[ ux ].xHandle = ( QueueHandle_t ) 0;
 8012b38:	4a09      	ldr	r2, [pc, #36]	@ (8012b60 <vQueueUnregisterQueue+0x50>)
 8012b3a:	68fb      	ldr	r3, [r7, #12]
 8012b3c:	00db      	lsls	r3, r3, #3
 8012b3e:	4413      	add	r3, r2
 8012b40:	2200      	movs	r2, #0
 8012b42:	605a      	str	r2, [r3, #4]
				break;
 8012b44:	e006      	b.n	8012b54 <vQueueUnregisterQueue+0x44>
		for( ux = ( UBaseType_t ) 0U; ux < ( UBaseType_t ) configQUEUE_REGISTRY_SIZE; ux++ )
 8012b46:	68fb      	ldr	r3, [r7, #12]
 8012b48:	3301      	adds	r3, #1
 8012b4a:	60fb      	str	r3, [r7, #12]
 8012b4c:	68fb      	ldr	r3, [r7, #12]
 8012b4e:	2b07      	cmp	r3, #7
 8012b50:	d9e5      	bls.n	8012b1e <vQueueUnregisterQueue+0xe>
			{
				mtCOVERAGE_TEST_MARKER();
			}
		}

	} /*lint !e818 xQueue could not be pointer to const because it is a typedef. */
 8012b52:	bf00      	nop
 8012b54:	bf00      	nop
 8012b56:	3714      	adds	r7, #20
 8012b58:	46bd      	mov	sp, r7
 8012b5a:	f85d 7b04 	ldr.w	r7, [sp], #4
 8012b5e:	4770      	bx	lr
 8012b60:	24003d20 	.word	0x24003d20

08012b64 <vQueueWaitForMessageRestricted>:
/*-----------------------------------------------------------*/

#if ( configUSE_TIMERS == 1 )

	void vQueueWaitForMessageRestricted( QueueHandle_t xQueue, TickType_t xTicksToWait, const BaseType_t xWaitIndefinitely )
	{
 8012b64:	b580      	push	{r7, lr}
 8012b66:	b086      	sub	sp, #24
 8012b68:	af00      	add	r7, sp, #0
 8012b6a:	60f8      	str	r0, [r7, #12]
 8012b6c:	60b9      	str	r1, [r7, #8]
 8012b6e:	607a      	str	r2, [r7, #4]
	Queue_t * const pxQueue = xQueue;
 8012b70:	68fb      	ldr	r3, [r7, #12]
 8012b72:	617b      	str	r3, [r7, #20]
		will not actually cause the task to block, just place it on a blocked
		list.  It will not block until the scheduler is unlocked - at which
		time a yield will be performed.  If an item is added to the queue while
		the queue is locked, and the calling task blocks on the queue, then the
		calling task will be immediately unblocked when the queue is unlocked. */
		prvLockQueue( pxQueue );
 8012b74:	f002 fbd0 	bl	8015318 <vPortEnterCritical>
 8012b78:	697b      	ldr	r3, [r7, #20]
 8012b7a:	f893 3044 	ldrb.w	r3, [r3, #68]	@ 0x44
 8012b7e:	b25b      	sxtb	r3, r3
 8012b80:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8012b84:	d103      	bne.n	8012b8e <vQueueWaitForMessageRestricted+0x2a>
 8012b86:	697b      	ldr	r3, [r7, #20]
 8012b88:	2200      	movs	r2, #0
 8012b8a:	f883 2044 	strb.w	r2, [r3, #68]	@ 0x44
 8012b8e:	697b      	ldr	r3, [r7, #20]
 8012b90:	f893 3045 	ldrb.w	r3, [r3, #69]	@ 0x45
 8012b94:	b25b      	sxtb	r3, r3
 8012b96:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8012b9a:	d103      	bne.n	8012ba4 <vQueueWaitForMessageRestricted+0x40>
 8012b9c:	697b      	ldr	r3, [r7, #20]
 8012b9e:	2200      	movs	r2, #0
 8012ba0:	f883 2045 	strb.w	r2, [r3, #69]	@ 0x45
 8012ba4:	f002 fbea 	bl	801537c <vPortExitCritical>
		if( pxQueue->uxMessagesWaiting == ( UBaseType_t ) 0U )
 8012ba8:	697b      	ldr	r3, [r7, #20]
 8012baa:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 8012bac:	2b00      	cmp	r3, #0
 8012bae:	d106      	bne.n	8012bbe <vQueueWaitForMessageRestricted+0x5a>
		{
			/* There is nothing in the queue, block for the specified period. */
			vTaskPlaceOnEventListRestricted( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait, xWaitIndefinitely );
 8012bb0:	697b      	ldr	r3, [r7, #20]
 8012bb2:	3324      	adds	r3, #36	@ 0x24
 8012bb4:	687a      	ldr	r2, [r7, #4]
 8012bb6:	68b9      	ldr	r1, [r7, #8]
 8012bb8:	4618      	mov	r0, r3
 8012bba:	f001 f825 	bl	8013c08 <vTaskPlaceOnEventListRestricted>
		}
		else
		{
			mtCOVERAGE_TEST_MARKER();
		}
		prvUnlockQueue( pxQueue );
 8012bbe:	6978      	ldr	r0, [r7, #20]
 8012bc0:	f7ff fefc 	bl	80129bc <prvUnlockQueue>
	}
 8012bc4:	bf00      	nop
 8012bc6:	3718      	adds	r7, #24
 8012bc8:	46bd      	mov	sp, r7
 8012bca:	bd80      	pop	{r7, pc}

08012bcc <xStreamBufferGenericCreate>:
/*-----------------------------------------------------------*/

#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )

	StreamBufferHandle_t xStreamBufferGenericCreate( size_t xBufferSizeBytes, size_t xTriggerLevelBytes, BaseType_t xIsMessageBuffer )
	{
 8012bcc:	b580      	push	{r7, lr}
 8012bce:	b08c      	sub	sp, #48	@ 0x30
 8012bd0:	af02      	add	r7, sp, #8
 8012bd2:	60f8      	str	r0, [r7, #12]
 8012bd4:	60b9      	str	r1, [r7, #8]
 8012bd6:	607a      	str	r2, [r7, #4]

		/* In case the stream buffer is going to be used as a message buffer
		(that is, it will hold discrete messages with a little meta data that
		says how big the next message is) check the buffer will be large enough
		to hold at least one message. */
		if( xIsMessageBuffer == pdTRUE )
 8012bd8:	687b      	ldr	r3, [r7, #4]
 8012bda:	2b01      	cmp	r3, #1
 8012bdc:	d111      	bne.n	8012c02 <xStreamBufferGenericCreate+0x36>
		{
			/* Is a message buffer but not statically allocated. */
			ucFlags = sbFLAGS_IS_MESSAGE_BUFFER;
 8012bde:	2301      	movs	r3, #1
 8012be0:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
			configASSERT( xBufferSizeBytes > sbBYTES_TO_STORE_MESSAGE_LENGTH );
 8012be4:	68fb      	ldr	r3, [r7, #12]
 8012be6:	2b04      	cmp	r3, #4
 8012be8:	d81d      	bhi.n	8012c26 <xStreamBufferGenericCreate+0x5a>
	__asm volatile
 8012bea:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012bee:	f383 8811 	msr	BASEPRI, r3
 8012bf2:	f3bf 8f6f 	isb	sy
 8012bf6:	f3bf 8f4f 	dsb	sy
 8012bfa:	61fb      	str	r3, [r7, #28]
}
 8012bfc:	bf00      	nop
 8012bfe:	bf00      	nop
 8012c00:	e7fd      	b.n	8012bfe <xStreamBufferGenericCreate+0x32>
		}
		else
		{
			/* Not a message buffer and not statically allocated. */
			ucFlags = 0;
 8012c02:	2300      	movs	r3, #0
 8012c04:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
			configASSERT( xBufferSizeBytes > 0 );
 8012c08:	68fb      	ldr	r3, [r7, #12]
 8012c0a:	2b00      	cmp	r3, #0
 8012c0c:	d10b      	bne.n	8012c26 <xStreamBufferGenericCreate+0x5a>
	__asm volatile
 8012c0e:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012c12:	f383 8811 	msr	BASEPRI, r3
 8012c16:	f3bf 8f6f 	isb	sy
 8012c1a:	f3bf 8f4f 	dsb	sy
 8012c1e:	61bb      	str	r3, [r7, #24]
}
 8012c20:	bf00      	nop
 8012c22:	bf00      	nop
 8012c24:	e7fd      	b.n	8012c22 <xStreamBufferGenericCreate+0x56>
		}
		configASSERT( xTriggerLevelBytes <= xBufferSizeBytes );
 8012c26:	68ba      	ldr	r2, [r7, #8]
 8012c28:	68fb      	ldr	r3, [r7, #12]
 8012c2a:	429a      	cmp	r2, r3
 8012c2c:	d90b      	bls.n	8012c46 <xStreamBufferGenericCreate+0x7a>
	__asm volatile
 8012c2e:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012c32:	f383 8811 	msr	BASEPRI, r3
 8012c36:	f3bf 8f6f 	isb	sy
 8012c3a:	f3bf 8f4f 	dsb	sy
 8012c3e:	617b      	str	r3, [r7, #20]
}
 8012c40:	bf00      	nop
 8012c42:	bf00      	nop
 8012c44:	e7fd      	b.n	8012c42 <xStreamBufferGenericCreate+0x76>

		/* A trigger level of 0 would cause a waiting task to unblock even when
		the buffer was empty. */
		if( xTriggerLevelBytes == ( size_t ) 0 )
 8012c46:	68bb      	ldr	r3, [r7, #8]
 8012c48:	2b00      	cmp	r3, #0
 8012c4a:	d101      	bne.n	8012c50 <xStreamBufferGenericCreate+0x84>
		{
			xTriggerLevelBytes = ( size_t ) 1;
 8012c4c:	2301      	movs	r3, #1
 8012c4e:	60bb      	str	r3, [r7, #8]
		and the buffer follows immediately after.  The requested size is
		incremented so the free space is returned as the user would expect -
		this is a quirk of the implementation that means otherwise the free
		space would be reported as one byte smaller than would be logically
		expected. */
		xBufferSizeBytes++;
 8012c50:	68fb      	ldr	r3, [r7, #12]
 8012c52:	3301      	adds	r3, #1
 8012c54:	60fb      	str	r3, [r7, #12]
		pucAllocatedMemory = ( uint8_t * ) pvPortMalloc( xBufferSizeBytes + sizeof( StreamBuffer_t ) ); /*lint !e9079 malloc() only returns void*. */
 8012c56:	68fb      	ldr	r3, [r7, #12]
 8012c58:	3324      	adds	r3, #36	@ 0x24
 8012c5a:	4618      	mov	r0, r3
 8012c5c:	f002 fc7e 	bl	801555c <pvPortMalloc>
 8012c60:	6238      	str	r0, [r7, #32]

		if( pucAllocatedMemory != NULL )
 8012c62:	6a3b      	ldr	r3, [r7, #32]
 8012c64:	2b00      	cmp	r3, #0
 8012c66:	d00a      	beq.n	8012c7e <xStreamBufferGenericCreate+0xb2>
		{
			prvInitialiseNewStreamBuffer( ( StreamBuffer_t * ) pucAllocatedMemory, /* Structure at the start of the allocated memory. */ /*lint !e9087 Safe cast as allocated memory is aligned. */ /*lint !e826 Area is not too small and alignment is guaranteed provided malloc() behaves as expected and returns aligned buffer. */
 8012c68:	6a3b      	ldr	r3, [r7, #32]
 8012c6a:	f103 0124 	add.w	r1, r3, #36	@ 0x24
 8012c6e:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 8012c72:	9300      	str	r3, [sp, #0]
 8012c74:	68bb      	ldr	r3, [r7, #8]
 8012c76:	68fa      	ldr	r2, [r7, #12]
 8012c78:	6a38      	ldr	r0, [r7, #32]
 8012c7a:	f000 fb0b 	bl	8013294 <prvInitialiseNewStreamBuffer>
		else
		{
			traceSTREAM_BUFFER_CREATE_FAILED( xIsMessageBuffer );
		}

		return ( StreamBufferHandle_t ) pucAllocatedMemory; /*lint !e9087 !e826 Safe cast as allocated memory is aligned. */
 8012c7e:	6a3b      	ldr	r3, [r7, #32]
	}
 8012c80:	4618      	mov	r0, r3
 8012c82:	3728      	adds	r7, #40	@ 0x28
 8012c84:	46bd      	mov	sp, r7
 8012c86:	bd80      	pop	{r7, pc}

08012c88 <xStreamBufferSpacesAvailable>:
	return xReturn;
}
/*-----------------------------------------------------------*/

size_t xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer )
{
 8012c88:	b480      	push	{r7}
 8012c8a:	b087      	sub	sp, #28
 8012c8c:	af00      	add	r7, sp, #0
 8012c8e:	6078      	str	r0, [r7, #4]
const StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
 8012c90:	687b      	ldr	r3, [r7, #4]
 8012c92:	613b      	str	r3, [r7, #16]
size_t xSpace;

	configASSERT( pxStreamBuffer );
 8012c94:	693b      	ldr	r3, [r7, #16]
 8012c96:	2b00      	cmp	r3, #0
 8012c98:	d10b      	bne.n	8012cb2 <xStreamBufferSpacesAvailable+0x2a>
	__asm volatile
 8012c9a:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012c9e:	f383 8811 	msr	BASEPRI, r3
 8012ca2:	f3bf 8f6f 	isb	sy
 8012ca6:	f3bf 8f4f 	dsb	sy
 8012caa:	60fb      	str	r3, [r7, #12]
}
 8012cac:	bf00      	nop
 8012cae:	bf00      	nop
 8012cb0:	e7fd      	b.n	8012cae <xStreamBufferSpacesAvailable+0x26>

	xSpace = pxStreamBuffer->xLength + pxStreamBuffer->xTail;
 8012cb2:	693b      	ldr	r3, [r7, #16]
 8012cb4:	689a      	ldr	r2, [r3, #8]
 8012cb6:	693b      	ldr	r3, [r7, #16]
 8012cb8:	681b      	ldr	r3, [r3, #0]
 8012cba:	4413      	add	r3, r2
 8012cbc:	617b      	str	r3, [r7, #20]
	xSpace -= pxStreamBuffer->xHead;
 8012cbe:	693b      	ldr	r3, [r7, #16]
 8012cc0:	685b      	ldr	r3, [r3, #4]
 8012cc2:	697a      	ldr	r2, [r7, #20]
 8012cc4:	1ad3      	subs	r3, r2, r3
 8012cc6:	617b      	str	r3, [r7, #20]
	xSpace -= ( size_t ) 1;
 8012cc8:	697b      	ldr	r3, [r7, #20]
 8012cca:	3b01      	subs	r3, #1
 8012ccc:	617b      	str	r3, [r7, #20]

	if( xSpace >= pxStreamBuffer->xLength )
 8012cce:	693b      	ldr	r3, [r7, #16]
 8012cd0:	689b      	ldr	r3, [r3, #8]
 8012cd2:	697a      	ldr	r2, [r7, #20]
 8012cd4:	429a      	cmp	r2, r3
 8012cd6:	d304      	bcc.n	8012ce2 <xStreamBufferSpacesAvailable+0x5a>
	{
		xSpace -= pxStreamBuffer->xLength;
 8012cd8:	693b      	ldr	r3, [r7, #16]
 8012cda:	689b      	ldr	r3, [r3, #8]
 8012cdc:	697a      	ldr	r2, [r7, #20]
 8012cde:	1ad3      	subs	r3, r2, r3
 8012ce0:	617b      	str	r3, [r7, #20]
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}

	return xSpace;
 8012ce2:	697b      	ldr	r3, [r7, #20]
}
 8012ce4:	4618      	mov	r0, r3
 8012ce6:	371c      	adds	r7, #28
 8012ce8:	46bd      	mov	sp, r7
 8012cea:	f85d 7b04 	ldr.w	r7, [sp], #4
 8012cee:	4770      	bx	lr

08012cf0 <xStreamBufferSend>:

size_t xStreamBufferSend( StreamBufferHandle_t xStreamBuffer,
						  const void *pvTxData,
						  size_t xDataLengthBytes,
						  TickType_t xTicksToWait )
{
 8012cf0:	b580      	push	{r7, lr}
 8012cf2:	b090      	sub	sp, #64	@ 0x40
 8012cf4:	af02      	add	r7, sp, #8
 8012cf6:	60f8      	str	r0, [r7, #12]
 8012cf8:	60b9      	str	r1, [r7, #8]
 8012cfa:	607a      	str	r2, [r7, #4]
 8012cfc:	603b      	str	r3, [r7, #0]
StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
 8012cfe:	68fb      	ldr	r3, [r7, #12]
 8012d00:	62fb      	str	r3, [r7, #44]	@ 0x2c
size_t xReturn, xSpace = 0;
 8012d02:	2300      	movs	r3, #0
 8012d04:	637b      	str	r3, [r7, #52]	@ 0x34
size_t xRequiredSpace = xDataLengthBytes;
 8012d06:	687b      	ldr	r3, [r7, #4]
 8012d08:	633b      	str	r3, [r7, #48]	@ 0x30
TimeOut_t xTimeOut;

	configASSERT( pvTxData );
 8012d0a:	68bb      	ldr	r3, [r7, #8]
 8012d0c:	2b00      	cmp	r3, #0
 8012d0e:	d10b      	bne.n	8012d28 <xStreamBufferSend+0x38>
	__asm volatile
 8012d10:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012d14:	f383 8811 	msr	BASEPRI, r3
 8012d18:	f3bf 8f6f 	isb	sy
 8012d1c:	f3bf 8f4f 	dsb	sy
 8012d20:	627b      	str	r3, [r7, #36]	@ 0x24
}
 8012d22:	bf00      	nop
 8012d24:	bf00      	nop
 8012d26:	e7fd      	b.n	8012d24 <xStreamBufferSend+0x34>
	configASSERT( pxStreamBuffer );
 8012d28:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8012d2a:	2b00      	cmp	r3, #0
 8012d2c:	d10b      	bne.n	8012d46 <xStreamBufferSend+0x56>
	__asm volatile
 8012d2e:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012d32:	f383 8811 	msr	BASEPRI, r3
 8012d36:	f3bf 8f6f 	isb	sy
 8012d3a:	f3bf 8f4f 	dsb	sy
 8012d3e:	623b      	str	r3, [r7, #32]
}
 8012d40:	bf00      	nop
 8012d42:	bf00      	nop
 8012d44:	e7fd      	b.n	8012d42 <xStreamBufferSend+0x52>

	/* This send function is used to write to both message buffers and stream
	buffers.  If this is a message buffer then the space needed must be
	increased by the amount of bytes needed to store the length of the
	message. */
	if( ( pxStreamBuffer->ucFlags & sbFLAGS_IS_MESSAGE_BUFFER ) != ( uint8_t ) 0 )
 8012d46:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8012d48:	7f1b      	ldrb	r3, [r3, #28]
 8012d4a:	f003 0301 	and.w	r3, r3, #1
 8012d4e:	2b00      	cmp	r3, #0
 8012d50:	d012      	beq.n	8012d78 <xStreamBufferSend+0x88>
	{
		xRequiredSpace += sbBYTES_TO_STORE_MESSAGE_LENGTH;
 8012d52:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012d54:	3304      	adds	r3, #4
 8012d56:	633b      	str	r3, [r7, #48]	@ 0x30

		/* Overflow? */
		configASSERT( xRequiredSpace > xDataLengthBytes );
 8012d58:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 8012d5a:	687b      	ldr	r3, [r7, #4]
 8012d5c:	429a      	cmp	r2, r3
 8012d5e:	d80b      	bhi.n	8012d78 <xStreamBufferSend+0x88>
	__asm volatile
 8012d60:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012d64:	f383 8811 	msr	BASEPRI, r3
 8012d68:	f3bf 8f6f 	isb	sy
 8012d6c:	f3bf 8f4f 	dsb	sy
 8012d70:	61fb      	str	r3, [r7, #28]
}
 8012d72:	bf00      	nop
 8012d74:	bf00      	nop
 8012d76:	e7fd      	b.n	8012d74 <xStreamBufferSend+0x84>
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}

	if( xTicksToWait != ( TickType_t ) 0 )
 8012d78:	683b      	ldr	r3, [r7, #0]
 8012d7a:	2b00      	cmp	r3, #0
 8012d7c:	d03f      	beq.n	8012dfe <xStreamBufferSend+0x10e>
	{
		vTaskSetTimeOutState( &xTimeOut );
 8012d7e:	f107 0310 	add.w	r3, r7, #16
 8012d82:	4618      	mov	r0, r3
 8012d84:	f000 ffd0 	bl	8013d28 <vTaskSetTimeOutState>

		do
		{
			/* Wait until the required number of bytes are free in the message
			buffer. */
			taskENTER_CRITICAL();
 8012d88:	f002 fac6 	bl	8015318 <vPortEnterCritical>
			{
				xSpace = xStreamBufferSpacesAvailable( pxStreamBuffer );
 8012d8c:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 8012d8e:	f7ff ff7b 	bl	8012c88 <xStreamBufferSpacesAvailable>
 8012d92:	6378      	str	r0, [r7, #52]	@ 0x34

				if( xSpace < xRequiredSpace )
 8012d94:	6b7a      	ldr	r2, [r7, #52]	@ 0x34
 8012d96:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012d98:	429a      	cmp	r2, r3
 8012d9a:	d218      	bcs.n	8012dce <xStreamBufferSend+0xde>
				{
					/* Clear notification state as going to wait for space. */
					( void ) xTaskNotifyStateClear( NULL );
 8012d9c:	2000      	movs	r0, #0
 8012d9e:	f001 fcf3 	bl	8014788 <xTaskNotifyStateClear>

					/* Should only be one writer. */
					configASSERT( pxStreamBuffer->xTaskWaitingToSend == NULL );
 8012da2:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8012da4:	695b      	ldr	r3, [r3, #20]
 8012da6:	2b00      	cmp	r3, #0
 8012da8:	d00b      	beq.n	8012dc2 <xStreamBufferSend+0xd2>
	__asm volatile
 8012daa:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012dae:	f383 8811 	msr	BASEPRI, r3
 8012db2:	f3bf 8f6f 	isb	sy
 8012db6:	f3bf 8f4f 	dsb	sy
 8012dba:	61bb      	str	r3, [r7, #24]
}
 8012dbc:	bf00      	nop
 8012dbe:	bf00      	nop
 8012dc0:	e7fd      	b.n	8012dbe <xStreamBufferSend+0xce>
					pxStreamBuffer->xTaskWaitingToSend = xTaskGetCurrentTaskHandle();
 8012dc2:	f001 f93b 	bl	801403c <xTaskGetCurrentTaskHandle>
 8012dc6:	4602      	mov	r2, r0
 8012dc8:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8012dca:	615a      	str	r2, [r3, #20]
 8012dcc:	e002      	b.n	8012dd4 <xStreamBufferSend+0xe4>
				}
				else
				{
					taskEXIT_CRITICAL();
 8012dce:	f002 fad5 	bl	801537c <vPortExitCritical>
					break;
 8012dd2:	e014      	b.n	8012dfe <xStreamBufferSend+0x10e>
				}
			}
			taskEXIT_CRITICAL();
 8012dd4:	f002 fad2 	bl	801537c <vPortExitCritical>

			traceBLOCKING_ON_STREAM_BUFFER_SEND( xStreamBuffer );
			( void ) xTaskNotifyWait( ( uint32_t ) 0, ( uint32_t ) 0, NULL, xTicksToWait );
 8012dd8:	683b      	ldr	r3, [r7, #0]
 8012dda:	2200      	movs	r2, #0
 8012ddc:	2100      	movs	r1, #0
 8012dde:	2000      	movs	r0, #0
 8012de0:	f001 faca 	bl	8014378 <xTaskNotifyWait>
			pxStreamBuffer->xTaskWaitingToSend = NULL;
 8012de4:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8012de6:	2200      	movs	r2, #0
 8012de8:	615a      	str	r2, [r3, #20]

		} while( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE );
 8012dea:	463a      	mov	r2, r7
 8012dec:	f107 0310 	add.w	r3, r7, #16
 8012df0:	4611      	mov	r1, r2
 8012df2:	4618      	mov	r0, r3
 8012df4:	f000 ffd6 	bl	8013da4 <xTaskCheckForTimeOut>
 8012df8:	4603      	mov	r3, r0
 8012dfa:	2b00      	cmp	r3, #0
 8012dfc:	d0c4      	beq.n	8012d88 <xStreamBufferSend+0x98>
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}

	if( xSpace == ( size_t ) 0 )
 8012dfe:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8012e00:	2b00      	cmp	r3, #0
 8012e02:	d103      	bne.n	8012e0c <xStreamBufferSend+0x11c>
	{
		xSpace = xStreamBufferSpacesAvailable( pxStreamBuffer );
 8012e04:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 8012e06:	f7ff ff3f 	bl	8012c88 <xStreamBufferSpacesAvailable>
 8012e0a:	6378      	str	r0, [r7, #52]	@ 0x34
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}

	xReturn = prvWriteMessageToBuffer( pxStreamBuffer, pvTxData, xDataLengthBytes, xSpace, xRequiredSpace );
 8012e0c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012e0e:	9300      	str	r3, [sp, #0]
 8012e10:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8012e12:	687a      	ldr	r2, [r7, #4]
 8012e14:	68b9      	ldr	r1, [r7, #8]
 8012e16:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 8012e18:	f000 f823 	bl	8012e62 <prvWriteMessageToBuffer>
 8012e1c:	62b8      	str	r0, [r7, #40]	@ 0x28

	if( xReturn > ( size_t ) 0 )
 8012e1e:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8012e20:	2b00      	cmp	r3, #0
 8012e22:	d019      	beq.n	8012e58 <xStreamBufferSend+0x168>
	{
		traceSTREAM_BUFFER_SEND( xStreamBuffer, xReturn );

		/* Was a task waiting for the data? */
		if( prvBytesInBuffer( pxStreamBuffer ) >= pxStreamBuffer->xTriggerLevelBytes )
 8012e24:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 8012e26:	f000 fa15 	bl	8013254 <prvBytesInBuffer>
 8012e2a:	4602      	mov	r2, r0
 8012e2c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8012e2e:	68db      	ldr	r3, [r3, #12]
 8012e30:	429a      	cmp	r2, r3
 8012e32:	d311      	bcc.n	8012e58 <xStreamBufferSend+0x168>
		{
			sbSEND_COMPLETED( pxStreamBuffer );
 8012e34:	f000 fcc6 	bl	80137c4 <vTaskSuspendAll>
 8012e38:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8012e3a:	691b      	ldr	r3, [r3, #16]
 8012e3c:	2b00      	cmp	r3, #0
 8012e3e:	d009      	beq.n	8012e54 <xStreamBufferSend+0x164>
 8012e40:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8012e42:	6918      	ldr	r0, [r3, #16]
 8012e44:	2300      	movs	r3, #0
 8012e46:	2200      	movs	r2, #0
 8012e48:	2100      	movs	r1, #0
 8012e4a:	f001 faf5 	bl	8014438 <xTaskGenericNotify>
 8012e4e:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8012e50:	2200      	movs	r2, #0
 8012e52:	611a      	str	r2, [r3, #16]
 8012e54:	f000 fcc4 	bl	80137e0 <xTaskResumeAll>
	{
		mtCOVERAGE_TEST_MARKER();
		traceSTREAM_BUFFER_SEND_FAILED( xStreamBuffer );
	}

	return xReturn;
 8012e58:	6abb      	ldr	r3, [r7, #40]	@ 0x28
}
 8012e5a:	4618      	mov	r0, r3
 8012e5c:	3738      	adds	r7, #56	@ 0x38
 8012e5e:	46bd      	mov	sp, r7
 8012e60:	bd80      	pop	{r7, pc}

08012e62 <prvWriteMessageToBuffer>:
static size_t prvWriteMessageToBuffer( StreamBuffer_t * const pxStreamBuffer,
									   const void * pvTxData,
									   size_t xDataLengthBytes,
									   size_t xSpace,
									   size_t xRequiredSpace )
{
 8012e62:	b580      	push	{r7, lr}
 8012e64:	b086      	sub	sp, #24
 8012e66:	af00      	add	r7, sp, #0
 8012e68:	60f8      	str	r0, [r7, #12]
 8012e6a:	60b9      	str	r1, [r7, #8]
 8012e6c:	607a      	str	r2, [r7, #4]
 8012e6e:	603b      	str	r3, [r7, #0]
	BaseType_t xShouldWrite;
	size_t xReturn;

	if( xSpace == ( size_t ) 0 )
 8012e70:	683b      	ldr	r3, [r7, #0]
 8012e72:	2b00      	cmp	r3, #0
 8012e74:	d102      	bne.n	8012e7c <prvWriteMessageToBuffer+0x1a>
	{
		/* Doesn't matter if this is a stream buffer or a message buffer, there
		is no space to write. */
		xShouldWrite = pdFALSE;
 8012e76:	2300      	movs	r3, #0
 8012e78:	617b      	str	r3, [r7, #20]
 8012e7a:	e01d      	b.n	8012eb8 <prvWriteMessageToBuffer+0x56>
	}
	else if( ( pxStreamBuffer->ucFlags & sbFLAGS_IS_MESSAGE_BUFFER ) == ( uint8_t ) 0 )
 8012e7c:	68fb      	ldr	r3, [r7, #12]
 8012e7e:	7f1b      	ldrb	r3, [r3, #28]
 8012e80:	f003 0301 	and.w	r3, r3, #1
 8012e84:	2b00      	cmp	r3, #0
 8012e86:	d108      	bne.n	8012e9a <prvWriteMessageToBuffer+0x38>
	{
		/* This is a stream buffer, as opposed to a message buffer, so writing a
		stream of bytes rather than discrete messages.  Write as many bytes as
		possible. */
		xShouldWrite = pdTRUE;
 8012e88:	2301      	movs	r3, #1
 8012e8a:	617b      	str	r3, [r7, #20]
		xDataLengthBytes = configMIN( xDataLengthBytes, xSpace );
 8012e8c:	687a      	ldr	r2, [r7, #4]
 8012e8e:	683b      	ldr	r3, [r7, #0]
 8012e90:	4293      	cmp	r3, r2
 8012e92:	bf28      	it	cs
 8012e94:	4613      	movcs	r3, r2
 8012e96:	607b      	str	r3, [r7, #4]
 8012e98:	e00e      	b.n	8012eb8 <prvWriteMessageToBuffer+0x56>
	}
	else if( xSpace >= xRequiredSpace )
 8012e9a:	683a      	ldr	r2, [r7, #0]
 8012e9c:	6a3b      	ldr	r3, [r7, #32]
 8012e9e:	429a      	cmp	r2, r3
 8012ea0:	d308      	bcc.n	8012eb4 <prvWriteMessageToBuffer+0x52>
	{
		/* This is a message buffer, as opposed to a stream buffer, and there
		is enough space to write both the message length and the message itself
		into the buffer.  Start by writing the length of the data, the data
		itself will be written later in this function. */
		xShouldWrite = pdTRUE;
 8012ea2:	2301      	movs	r3, #1
 8012ea4:	617b      	str	r3, [r7, #20]
		( void ) prvWriteBytesToBuffer( pxStreamBuffer, ( const uint8_t * ) &( xDataLengthBytes ), sbBYTES_TO_STORE_MESSAGE_LENGTH );
 8012ea6:	1d3b      	adds	r3, r7, #4
 8012ea8:	2204      	movs	r2, #4
 8012eaa:	4619      	mov	r1, r3
 8012eac:	68f8      	ldr	r0, [r7, #12]
 8012eae:	f000 f8df 	bl	8013070 <prvWriteBytesToBuffer>
 8012eb2:	e001      	b.n	8012eb8 <prvWriteMessageToBuffer+0x56>
	}
	else
	{
		/* There is space available, but not enough space. */
		xShouldWrite = pdFALSE;
 8012eb4:	2300      	movs	r3, #0
 8012eb6:	617b      	str	r3, [r7, #20]
	}

	if( xShouldWrite != pdFALSE )
 8012eb8:	697b      	ldr	r3, [r7, #20]
 8012eba:	2b00      	cmp	r3, #0
 8012ebc:	d007      	beq.n	8012ece <prvWriteMessageToBuffer+0x6c>
	{
		/* Writes the data itself. */
		xReturn = prvWriteBytesToBuffer( pxStreamBuffer, ( const uint8_t * ) pvTxData, xDataLengthBytes ); /*lint !e9079 Storage buffer is implemented as uint8_t for ease of sizing, alighment and access. */
 8012ebe:	687b      	ldr	r3, [r7, #4]
 8012ec0:	461a      	mov	r2, r3
 8012ec2:	68b9      	ldr	r1, [r7, #8]
 8012ec4:	68f8      	ldr	r0, [r7, #12]
 8012ec6:	f000 f8d3 	bl	8013070 <prvWriteBytesToBuffer>
 8012eca:	6138      	str	r0, [r7, #16]
 8012ecc:	e001      	b.n	8012ed2 <prvWriteMessageToBuffer+0x70>
	}
	else
	{
		xReturn = 0;
 8012ece:	2300      	movs	r3, #0
 8012ed0:	613b      	str	r3, [r7, #16]
	}

	return xReturn;
 8012ed2:	693b      	ldr	r3, [r7, #16]
}
 8012ed4:	4618      	mov	r0, r3
 8012ed6:	3718      	adds	r7, #24
 8012ed8:	46bd      	mov	sp, r7
 8012eda:	bd80      	pop	{r7, pc}

08012edc <xStreamBufferReceive>:

size_t xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer,
							 void *pvRxData,
							 size_t xBufferLengthBytes,
							 TickType_t xTicksToWait )
{
 8012edc:	b580      	push	{r7, lr}
 8012ede:	b08e      	sub	sp, #56	@ 0x38
 8012ee0:	af02      	add	r7, sp, #8
 8012ee2:	60f8      	str	r0, [r7, #12]
 8012ee4:	60b9      	str	r1, [r7, #8]
 8012ee6:	607a      	str	r2, [r7, #4]
 8012ee8:	603b      	str	r3, [r7, #0]
StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
 8012eea:	68fb      	ldr	r3, [r7, #12]
 8012eec:	623b      	str	r3, [r7, #32]
size_t xReceivedLength = 0, xBytesAvailable, xBytesToStoreMessageLength;
 8012eee:	2300      	movs	r3, #0
 8012ef0:	62fb      	str	r3, [r7, #44]	@ 0x2c

	configASSERT( pvRxData );
 8012ef2:	68bb      	ldr	r3, [r7, #8]
 8012ef4:	2b00      	cmp	r3, #0
 8012ef6:	d10b      	bne.n	8012f10 <xStreamBufferReceive+0x34>
	__asm volatile
 8012ef8:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012efc:	f383 8811 	msr	BASEPRI, r3
 8012f00:	f3bf 8f6f 	isb	sy
 8012f04:	f3bf 8f4f 	dsb	sy
 8012f08:	61fb      	str	r3, [r7, #28]
}
 8012f0a:	bf00      	nop
 8012f0c:	bf00      	nop
 8012f0e:	e7fd      	b.n	8012f0c <xStreamBufferReceive+0x30>
	configASSERT( pxStreamBuffer );
 8012f10:	6a3b      	ldr	r3, [r7, #32]
 8012f12:	2b00      	cmp	r3, #0
 8012f14:	d10b      	bne.n	8012f2e <xStreamBufferReceive+0x52>
	__asm volatile
 8012f16:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012f1a:	f383 8811 	msr	BASEPRI, r3
 8012f1e:	f3bf 8f6f 	isb	sy
 8012f22:	f3bf 8f4f 	dsb	sy
 8012f26:	61bb      	str	r3, [r7, #24]
}
 8012f28:	bf00      	nop
 8012f2a:	bf00      	nop
 8012f2c:	e7fd      	b.n	8012f2a <xStreamBufferReceive+0x4e>
	/* This receive function is used by both message buffers, which store
	discrete messages, and stream buffers, which store a continuous stream of
	bytes.  Discrete messages include an additional
	sbBYTES_TO_STORE_MESSAGE_LENGTH bytes that hold the length of the
	message. */
	if( ( pxStreamBuffer->ucFlags & sbFLAGS_IS_MESSAGE_BUFFER ) != ( uint8_t ) 0 )
 8012f2e:	6a3b      	ldr	r3, [r7, #32]
 8012f30:	7f1b      	ldrb	r3, [r3, #28]
 8012f32:	f003 0301 	and.w	r3, r3, #1
 8012f36:	2b00      	cmp	r3, #0
 8012f38:	d002      	beq.n	8012f40 <xStreamBufferReceive+0x64>
	{
		xBytesToStoreMessageLength = sbBYTES_TO_STORE_MESSAGE_LENGTH;
 8012f3a:	2304      	movs	r3, #4
 8012f3c:	627b      	str	r3, [r7, #36]	@ 0x24
 8012f3e:	e001      	b.n	8012f44 <xStreamBufferReceive+0x68>
	}
	else
	{
		xBytesToStoreMessageLength = 0;
 8012f40:	2300      	movs	r3, #0
 8012f42:	627b      	str	r3, [r7, #36]	@ 0x24
	}

	if( xTicksToWait != ( TickType_t ) 0 )
 8012f44:	683b      	ldr	r3, [r7, #0]
 8012f46:	2b00      	cmp	r3, #0
 8012f48:	d035      	beq.n	8012fb6 <xStreamBufferReceive+0xda>
	{
		/* Checking if there is data and clearing the notification state must be
		performed atomically. */
		taskENTER_CRITICAL();
 8012f4a:	f002 f9e5 	bl	8015318 <vPortEnterCritical>
		{
			xBytesAvailable = prvBytesInBuffer( pxStreamBuffer );
 8012f4e:	6a38      	ldr	r0, [r7, #32]
 8012f50:	f000 f980 	bl	8013254 <prvBytesInBuffer>
 8012f54:	62b8      	str	r0, [r7, #40]	@ 0x28
			/* If this function was invoked by a message buffer read then
			xBytesToStoreMessageLength holds the number of bytes used to hold
			the length of the next discrete message.  If this function was
			invoked by a stream buffer read then xBytesToStoreMessageLength will
			be 0. */
			if( xBytesAvailable <= xBytesToStoreMessageLength )
 8012f56:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 8012f58:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8012f5a:	429a      	cmp	r2, r3
 8012f5c:	d817      	bhi.n	8012f8e <xStreamBufferReceive+0xb2>
			{
				/* Clear notification state as going to wait for data. */
				( void ) xTaskNotifyStateClear( NULL );
 8012f5e:	2000      	movs	r0, #0
 8012f60:	f001 fc12 	bl	8014788 <xTaskNotifyStateClear>

				/* Should only be one reader. */
				configASSERT( pxStreamBuffer->xTaskWaitingToReceive == NULL );
 8012f64:	6a3b      	ldr	r3, [r7, #32]
 8012f66:	691b      	ldr	r3, [r3, #16]
 8012f68:	2b00      	cmp	r3, #0
 8012f6a:	d00b      	beq.n	8012f84 <xStreamBufferReceive+0xa8>
	__asm volatile
 8012f6c:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012f70:	f383 8811 	msr	BASEPRI, r3
 8012f74:	f3bf 8f6f 	isb	sy
 8012f78:	f3bf 8f4f 	dsb	sy
 8012f7c:	617b      	str	r3, [r7, #20]
}
 8012f7e:	bf00      	nop
 8012f80:	bf00      	nop
 8012f82:	e7fd      	b.n	8012f80 <xStreamBufferReceive+0xa4>
				pxStreamBuffer->xTaskWaitingToReceive = xTaskGetCurrentTaskHandle();
 8012f84:	f001 f85a 	bl	801403c <xTaskGetCurrentTaskHandle>
 8012f88:	4602      	mov	r2, r0
 8012f8a:	6a3b      	ldr	r3, [r7, #32]
 8012f8c:	611a      	str	r2, [r3, #16]
			else
			{
				mtCOVERAGE_TEST_MARKER();
			}
		}
		taskEXIT_CRITICAL();
 8012f8e:	f002 f9f5 	bl	801537c <vPortExitCritical>

		if( xBytesAvailable <= xBytesToStoreMessageLength )
 8012f92:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 8012f94:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8012f96:	429a      	cmp	r2, r3
 8012f98:	d811      	bhi.n	8012fbe <xStreamBufferReceive+0xe2>
		{
			/* Wait for data to be available. */
			traceBLOCKING_ON_STREAM_BUFFER_RECEIVE( xStreamBuffer );
			( void ) xTaskNotifyWait( ( uint32_t ) 0, ( uint32_t ) 0, NULL, xTicksToWait );
 8012f9a:	683b      	ldr	r3, [r7, #0]
 8012f9c:	2200      	movs	r2, #0
 8012f9e:	2100      	movs	r1, #0
 8012fa0:	2000      	movs	r0, #0
 8012fa2:	f001 f9e9 	bl	8014378 <xTaskNotifyWait>
			pxStreamBuffer->xTaskWaitingToReceive = NULL;
 8012fa6:	6a3b      	ldr	r3, [r7, #32]
 8012fa8:	2200      	movs	r2, #0
 8012faa:	611a      	str	r2, [r3, #16]

			/* Recheck the data available after blocking. */
			xBytesAvailable = prvBytesInBuffer( pxStreamBuffer );
 8012fac:	6a38      	ldr	r0, [r7, #32]
 8012fae:	f000 f951 	bl	8013254 <prvBytesInBuffer>
 8012fb2:	62b8      	str	r0, [r7, #40]	@ 0x28
 8012fb4:	e003      	b.n	8012fbe <xStreamBufferReceive+0xe2>
			mtCOVERAGE_TEST_MARKER();
		}
	}
	else
	{
		xBytesAvailable = prvBytesInBuffer( pxStreamBuffer );
 8012fb6:	6a38      	ldr	r0, [r7, #32]
 8012fb8:	f000 f94c 	bl	8013254 <prvBytesInBuffer>
 8012fbc:	62b8      	str	r0, [r7, #40]	@ 0x28
	/* Whether receiving a discrete message (where xBytesToStoreMessageLength
	holds the number of bytes used to store the message length) or a stream of
	bytes (where xBytesToStoreMessageLength is zero), the number of bytes
	available must be greater than xBytesToStoreMessageLength to be able to
	read bytes from the buffer. */
	if( xBytesAvailable > xBytesToStoreMessageLength )
 8012fbe:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 8012fc0:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8012fc2:	429a      	cmp	r2, r3
 8012fc4:	d91d      	bls.n	8013002 <xStreamBufferReceive+0x126>
	{
		xReceivedLength = prvReadMessageFromBuffer( pxStreamBuffer, pvRxData, xBufferLengthBytes, xBytesAvailable, xBytesToStoreMessageLength );
 8012fc6:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8012fc8:	9300      	str	r3, [sp, #0]
 8012fca:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8012fcc:	687a      	ldr	r2, [r7, #4]
 8012fce:	68b9      	ldr	r1, [r7, #8]
 8012fd0:	6a38      	ldr	r0, [r7, #32]
 8012fd2:	f000 f81b 	bl	801300c <prvReadMessageFromBuffer>
 8012fd6:	62f8      	str	r0, [r7, #44]	@ 0x2c

		/* Was a task waiting for space in the buffer? */
		if( xReceivedLength != ( size_t ) 0 )
 8012fd8:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8012fda:	2b00      	cmp	r3, #0
 8012fdc:	d011      	beq.n	8013002 <xStreamBufferReceive+0x126>
		{
			traceSTREAM_BUFFER_RECEIVE( xStreamBuffer, xReceivedLength );
			sbRECEIVE_COMPLETED( pxStreamBuffer );
 8012fde:	f000 fbf1 	bl	80137c4 <vTaskSuspendAll>
 8012fe2:	6a3b      	ldr	r3, [r7, #32]
 8012fe4:	695b      	ldr	r3, [r3, #20]
 8012fe6:	2b00      	cmp	r3, #0
 8012fe8:	d009      	beq.n	8012ffe <xStreamBufferReceive+0x122>
 8012fea:	6a3b      	ldr	r3, [r7, #32]
 8012fec:	6958      	ldr	r0, [r3, #20]
 8012fee:	2300      	movs	r3, #0
 8012ff0:	2200      	movs	r2, #0
 8012ff2:	2100      	movs	r1, #0
 8012ff4:	f001 fa20 	bl	8014438 <xTaskGenericNotify>
 8012ff8:	6a3b      	ldr	r3, [r7, #32]
 8012ffa:	2200      	movs	r2, #0
 8012ffc:	615a      	str	r2, [r3, #20]
 8012ffe:	f000 fbef 	bl	80137e0 <xTaskResumeAll>
	{
		traceSTREAM_BUFFER_RECEIVE_FAILED( xStreamBuffer );
		mtCOVERAGE_TEST_MARKER();
	}

	return xReceivedLength;
 8013002:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
}
 8013004:	4618      	mov	r0, r3
 8013006:	3730      	adds	r7, #48	@ 0x30
 8013008:	46bd      	mov	sp, r7
 801300a:	bd80      	pop	{r7, pc}

0801300c <prvReadMessageFromBuffer>:
static size_t prvReadMessageFromBuffer( StreamBuffer_t *pxStreamBuffer,
										void *pvRxData,
										size_t xBufferLengthBytes,
										size_t xBytesAvailable,
										size_t xBytesToStoreMessageLength )
{
 801300c:	b580      	push	{r7, lr}
 801300e:	b088      	sub	sp, #32
 8013010:	af00      	add	r7, sp, #0
 8013012:	60f8      	str	r0, [r7, #12]
 8013014:	60b9      	str	r1, [r7, #8]
 8013016:	607a      	str	r2, [r7, #4]
 8013018:	603b      	str	r3, [r7, #0]
size_t xOriginalTail, xReceivedLength, xNextMessageLength;
configMESSAGE_BUFFER_LENGTH_TYPE xTempNextMessageLength;

	if( xBytesToStoreMessageLength != ( size_t ) 0 )
 801301a:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801301c:	2b00      	cmp	r3, #0
 801301e:	d019      	beq.n	8013054 <prvReadMessageFromBuffer+0x48>
	{
		/* A discrete message is being received.  First receive the length
		of the message.  A copy of the tail is stored so the buffer can be
		returned to its prior state if the length of the message is too
		large for the provided buffer. */
		xOriginalTail = pxStreamBuffer->xTail;
 8013020:	68fb      	ldr	r3, [r7, #12]
 8013022:	681b      	ldr	r3, [r3, #0]
 8013024:	61bb      	str	r3, [r7, #24]
		( void ) prvReadBytesFromBuffer( pxStreamBuffer, ( uint8_t * ) &xTempNextMessageLength, xBytesToStoreMessageLength, xBytesAvailable );
 8013026:	f107 0110 	add.w	r1, r7, #16
 801302a:	683b      	ldr	r3, [r7, #0]
 801302c:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 801302e:	68f8      	ldr	r0, [r7, #12]
 8013030:	f000 f893 	bl	801315a <prvReadBytesFromBuffer>
		xNextMessageLength = ( size_t ) xTempNextMessageLength;
 8013034:	693b      	ldr	r3, [r7, #16]
 8013036:	61fb      	str	r3, [r7, #28]

		/* Reduce the number of bytes available by the number of bytes just
		read out. */
		xBytesAvailable -= xBytesToStoreMessageLength;
 8013038:	683a      	ldr	r2, [r7, #0]
 801303a:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801303c:	1ad3      	subs	r3, r2, r3
 801303e:	603b      	str	r3, [r7, #0]

		/* Check there is enough space in the buffer provided by the
		user. */
		if( xNextMessageLength > xBufferLengthBytes )
 8013040:	69fa      	ldr	r2, [r7, #28]
 8013042:	687b      	ldr	r3, [r7, #4]
 8013044:	429a      	cmp	r2, r3
 8013046:	d907      	bls.n	8013058 <prvReadMessageFromBuffer+0x4c>
		{
			/* The user has provided insufficient space to read the message
			so return the buffer to its previous state (so the length of
			the message is in the buffer again). */
			pxStreamBuffer->xTail = xOriginalTail;
 8013048:	68fb      	ldr	r3, [r7, #12]
 801304a:	69ba      	ldr	r2, [r7, #24]
 801304c:	601a      	str	r2, [r3, #0]
			xNextMessageLength = 0;
 801304e:	2300      	movs	r3, #0
 8013050:	61fb      	str	r3, [r7, #28]
 8013052:	e001      	b.n	8013058 <prvReadMessageFromBuffer+0x4c>
	}
	else
	{
		/* A stream of bytes is being received (as opposed to a discrete
		message), so read as many bytes as possible. */
		xNextMessageLength = xBufferLengthBytes;
 8013054:	687b      	ldr	r3, [r7, #4]
 8013056:	61fb      	str	r3, [r7, #28]
	}

	/* Read the actual data. */
	xReceivedLength = prvReadBytesFromBuffer( pxStreamBuffer, ( uint8_t * ) pvRxData, xNextMessageLength, xBytesAvailable ); /*lint !e9079 Data storage area is implemented as uint8_t array for ease of sizing, indexing and alignment. */
 8013058:	683b      	ldr	r3, [r7, #0]
 801305a:	69fa      	ldr	r2, [r7, #28]
 801305c:	68b9      	ldr	r1, [r7, #8]
 801305e:	68f8      	ldr	r0, [r7, #12]
 8013060:	f000 f87b 	bl	801315a <prvReadBytesFromBuffer>
 8013064:	6178      	str	r0, [r7, #20]

	return xReceivedLength;
 8013066:	697b      	ldr	r3, [r7, #20]
}
 8013068:	4618      	mov	r0, r3
 801306a:	3720      	adds	r7, #32
 801306c:	46bd      	mov	sp, r7
 801306e:	bd80      	pop	{r7, pc}

08013070 <prvWriteBytesToBuffer>:
	return xReturn;
}
/*-----------------------------------------------------------*/

static size_t prvWriteBytesToBuffer( StreamBuffer_t * const pxStreamBuffer, const uint8_t *pucData, size_t xCount )
{
 8013070:	b580      	push	{r7, lr}
 8013072:	b08a      	sub	sp, #40	@ 0x28
 8013074:	af00      	add	r7, sp, #0
 8013076:	60f8      	str	r0, [r7, #12]
 8013078:	60b9      	str	r1, [r7, #8]
 801307a:	607a      	str	r2, [r7, #4]
size_t xNextHead, xFirstLength;

	configASSERT( xCount > ( size_t ) 0 );
 801307c:	687b      	ldr	r3, [r7, #4]
 801307e:	2b00      	cmp	r3, #0
 8013080:	d10b      	bne.n	801309a <prvWriteBytesToBuffer+0x2a>
	__asm volatile
 8013082:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8013086:	f383 8811 	msr	BASEPRI, r3
 801308a:	f3bf 8f6f 	isb	sy
 801308e:	f3bf 8f4f 	dsb	sy
 8013092:	61fb      	str	r3, [r7, #28]
}
 8013094:	bf00      	nop
 8013096:	bf00      	nop
 8013098:	e7fd      	b.n	8013096 <prvWriteBytesToBuffer+0x26>

	xNextHead = pxStreamBuffer->xHead;
 801309a:	68fb      	ldr	r3, [r7, #12]
 801309c:	685b      	ldr	r3, [r3, #4]
 801309e:	627b      	str	r3, [r7, #36]	@ 0x24

	/* Calculate the number of bytes that can be added in the first write -
	which may be less than the total number of bytes that need to be added if
	the buffer will wrap back to the beginning. */
	xFirstLength = configMIN( pxStreamBuffer->xLength - xNextHead, xCount );
 80130a0:	68fb      	ldr	r3, [r7, #12]
 80130a2:	689a      	ldr	r2, [r3, #8]
 80130a4:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80130a6:	1ad3      	subs	r3, r2, r3
 80130a8:	687a      	ldr	r2, [r7, #4]
 80130aa:	4293      	cmp	r3, r2
 80130ac:	bf28      	it	cs
 80130ae:	4613      	movcs	r3, r2
 80130b0:	623b      	str	r3, [r7, #32]

	/* Write as many bytes as can be written in the first write. */
	configASSERT( ( xNextHead + xFirstLength ) <= pxStreamBuffer->xLength );
 80130b2:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 80130b4:	6a3b      	ldr	r3, [r7, #32]
 80130b6:	441a      	add	r2, r3
 80130b8:	68fb      	ldr	r3, [r7, #12]
 80130ba:	689b      	ldr	r3, [r3, #8]
 80130bc:	429a      	cmp	r2, r3
 80130be:	d90b      	bls.n	80130d8 <prvWriteBytesToBuffer+0x68>
	__asm volatile
 80130c0:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80130c4:	f383 8811 	msr	BASEPRI, r3
 80130c8:	f3bf 8f6f 	isb	sy
 80130cc:	f3bf 8f4f 	dsb	sy
 80130d0:	61bb      	str	r3, [r7, #24]
}
 80130d2:	bf00      	nop
 80130d4:	bf00      	nop
 80130d6:	e7fd      	b.n	80130d4 <prvWriteBytesToBuffer+0x64>
	( void ) memcpy( ( void* ) ( &( pxStreamBuffer->pucBuffer[ xNextHead ] ) ), ( const void * ) pucData, xFirstLength ); /*lint !e9087 memcpy() requires void *. */
 80130d8:	68fb      	ldr	r3, [r7, #12]
 80130da:	699a      	ldr	r2, [r3, #24]
 80130dc:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80130de:	4413      	add	r3, r2
 80130e0:	6a3a      	ldr	r2, [r7, #32]
 80130e2:	68b9      	ldr	r1, [r7, #8]
 80130e4:	4618      	mov	r0, r3
 80130e6:	f017 faf2 	bl	802a6ce <memcpy>

	/* If the number of bytes written was less than the number that could be
	written in the first write... */
	if( xCount > xFirstLength )
 80130ea:	687a      	ldr	r2, [r7, #4]
 80130ec:	6a3b      	ldr	r3, [r7, #32]
 80130ee:	429a      	cmp	r2, r3
 80130f0:	d91d      	bls.n	801312e <prvWriteBytesToBuffer+0xbe>
	{
		/* ...then write the remaining bytes to the start of the buffer. */
		configASSERT( ( xCount - xFirstLength ) <= pxStreamBuffer->xLength );
 80130f2:	687a      	ldr	r2, [r7, #4]
 80130f4:	6a3b      	ldr	r3, [r7, #32]
 80130f6:	1ad2      	subs	r2, r2, r3
 80130f8:	68fb      	ldr	r3, [r7, #12]
 80130fa:	689b      	ldr	r3, [r3, #8]
 80130fc:	429a      	cmp	r2, r3
 80130fe:	d90b      	bls.n	8013118 <prvWriteBytesToBuffer+0xa8>
	__asm volatile
 8013100:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8013104:	f383 8811 	msr	BASEPRI, r3
 8013108:	f3bf 8f6f 	isb	sy
 801310c:	f3bf 8f4f 	dsb	sy
 8013110:	617b      	str	r3, [r7, #20]
}
 8013112:	bf00      	nop
 8013114:	bf00      	nop
 8013116:	e7fd      	b.n	8013114 <prvWriteBytesToBuffer+0xa4>
		( void ) memcpy( ( void * ) pxStreamBuffer->pucBuffer, ( const void * ) &( pucData[ xFirstLength ] ), xCount - xFirstLength ); /*lint !e9087 memcpy() requires void *. */
 8013118:	68fb      	ldr	r3, [r7, #12]
 801311a:	6998      	ldr	r0, [r3, #24]
 801311c:	68ba      	ldr	r2, [r7, #8]
 801311e:	6a3b      	ldr	r3, [r7, #32]
 8013120:	18d1      	adds	r1, r2, r3
 8013122:	687a      	ldr	r2, [r7, #4]
 8013124:	6a3b      	ldr	r3, [r7, #32]
 8013126:	1ad3      	subs	r3, r2, r3
 8013128:	461a      	mov	r2, r3
 801312a:	f017 fad0 	bl	802a6ce <memcpy>
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}

	xNextHead += xCount;
 801312e:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8013130:	687b      	ldr	r3, [r7, #4]
 8013132:	4413      	add	r3, r2
 8013134:	627b      	str	r3, [r7, #36]	@ 0x24
	if( xNextHead >= pxStreamBuffer->xLength )
 8013136:	68fb      	ldr	r3, [r7, #12]
 8013138:	689b      	ldr	r3, [r3, #8]
 801313a:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 801313c:	429a      	cmp	r2, r3
 801313e:	d304      	bcc.n	801314a <prvWriteBytesToBuffer+0xda>
	{
		xNextHead -= pxStreamBuffer->xLength;
 8013140:	68fb      	ldr	r3, [r7, #12]
 8013142:	689b      	ldr	r3, [r3, #8]
 8013144:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8013146:	1ad3      	subs	r3, r2, r3
 8013148:	627b      	str	r3, [r7, #36]	@ 0x24
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}

	pxStreamBuffer->xHead = xNextHead;
 801314a:	68fb      	ldr	r3, [r7, #12]
 801314c:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 801314e:	605a      	str	r2, [r3, #4]

	return xCount;
 8013150:	687b      	ldr	r3, [r7, #4]
}
 8013152:	4618      	mov	r0, r3
 8013154:	3728      	adds	r7, #40	@ 0x28
 8013156:	46bd      	mov	sp, r7
 8013158:	bd80      	pop	{r7, pc}

0801315a <prvReadBytesFromBuffer>:
/*-----------------------------------------------------------*/

static size_t prvReadBytesFromBuffer( StreamBuffer_t *pxStreamBuffer, uint8_t *pucData, size_t xMaxCount, size_t xBytesAvailable )
{
 801315a:	b580      	push	{r7, lr}
 801315c:	b08a      	sub	sp, #40	@ 0x28
 801315e:	af00      	add	r7, sp, #0
 8013160:	60f8      	str	r0, [r7, #12]
 8013162:	60b9      	str	r1, [r7, #8]
 8013164:	607a      	str	r2, [r7, #4]
 8013166:	603b      	str	r3, [r7, #0]
size_t xCount, xFirstLength, xNextTail;

	/* Use the minimum of the wanted bytes and the available bytes. */
	xCount = configMIN( xBytesAvailable, xMaxCount );
 8013168:	687a      	ldr	r2, [r7, #4]
 801316a:	683b      	ldr	r3, [r7, #0]
 801316c:	4293      	cmp	r3, r2
 801316e:	bf28      	it	cs
 8013170:	4613      	movcs	r3, r2
 8013172:	623b      	str	r3, [r7, #32]

	if( xCount > ( size_t ) 0 )
 8013174:	6a3b      	ldr	r3, [r7, #32]
 8013176:	2b00      	cmp	r3, #0
 8013178:	d067      	beq.n	801324a <prvReadBytesFromBuffer+0xf0>
	{
		xNextTail = pxStreamBuffer->xTail;
 801317a:	68fb      	ldr	r3, [r7, #12]
 801317c:	681b      	ldr	r3, [r3, #0]
 801317e:	627b      	str	r3, [r7, #36]	@ 0x24

		/* Calculate the number of bytes that can be read - which may be
		less than the number wanted if the data wraps around to the start of
		the buffer. */
		xFirstLength = configMIN( pxStreamBuffer->xLength - xNextTail, xCount );
 8013180:	68fb      	ldr	r3, [r7, #12]
 8013182:	689a      	ldr	r2, [r3, #8]
 8013184:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8013186:	1ad3      	subs	r3, r2, r3
 8013188:	6a3a      	ldr	r2, [r7, #32]
 801318a:	4293      	cmp	r3, r2
 801318c:	bf28      	it	cs
 801318e:	4613      	movcs	r3, r2
 8013190:	61fb      	str	r3, [r7, #28]

		/* Obtain the number of bytes it is possible to obtain in the first
		read.  Asserts check bounds of read and write. */
		configASSERT( xFirstLength <= xMaxCount );
 8013192:	69fa      	ldr	r2, [r7, #28]
 8013194:	687b      	ldr	r3, [r7, #4]
 8013196:	429a      	cmp	r2, r3
 8013198:	d90b      	bls.n	80131b2 <prvReadBytesFromBuffer+0x58>
	__asm volatile
 801319a:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801319e:	f383 8811 	msr	BASEPRI, r3
 80131a2:	f3bf 8f6f 	isb	sy
 80131a6:	f3bf 8f4f 	dsb	sy
 80131aa:	61bb      	str	r3, [r7, #24]
}
 80131ac:	bf00      	nop
 80131ae:	bf00      	nop
 80131b0:	e7fd      	b.n	80131ae <prvReadBytesFromBuffer+0x54>
		configASSERT( ( xNextTail + xFirstLength ) <= pxStreamBuffer->xLength );
 80131b2:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 80131b4:	69fb      	ldr	r3, [r7, #28]
 80131b6:	441a      	add	r2, r3
 80131b8:	68fb      	ldr	r3, [r7, #12]
 80131ba:	689b      	ldr	r3, [r3, #8]
 80131bc:	429a      	cmp	r2, r3
 80131be:	d90b      	bls.n	80131d8 <prvReadBytesFromBuffer+0x7e>
	__asm volatile
 80131c0:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80131c4:	f383 8811 	msr	BASEPRI, r3
 80131c8:	f3bf 8f6f 	isb	sy
 80131cc:	f3bf 8f4f 	dsb	sy
 80131d0:	617b      	str	r3, [r7, #20]
}
 80131d2:	bf00      	nop
 80131d4:	bf00      	nop
 80131d6:	e7fd      	b.n	80131d4 <prvReadBytesFromBuffer+0x7a>
		( void ) memcpy( ( void * ) pucData, ( const void * ) &( pxStreamBuffer->pucBuffer[ xNextTail ] ), xFirstLength ); /*lint !e9087 memcpy() requires void *. */
 80131d8:	68fb      	ldr	r3, [r7, #12]
 80131da:	699a      	ldr	r2, [r3, #24]
 80131dc:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80131de:	4413      	add	r3, r2
 80131e0:	69fa      	ldr	r2, [r7, #28]
 80131e2:	4619      	mov	r1, r3
 80131e4:	68b8      	ldr	r0, [r7, #8]
 80131e6:	f017 fa72 	bl	802a6ce <memcpy>

		/* If the total number of wanted bytes is greater than the number
		that could be read in the first read... */
		if( xCount > xFirstLength )
 80131ea:	6a3a      	ldr	r2, [r7, #32]
 80131ec:	69fb      	ldr	r3, [r7, #28]
 80131ee:	429a      	cmp	r2, r3
 80131f0:	d91a      	bls.n	8013228 <prvReadBytesFromBuffer+0xce>
		{
			/*...then read the remaining bytes from the start of the buffer. */
			configASSERT( xCount <= xMaxCount );
 80131f2:	6a3a      	ldr	r2, [r7, #32]
 80131f4:	687b      	ldr	r3, [r7, #4]
 80131f6:	429a      	cmp	r2, r3
 80131f8:	d90b      	bls.n	8013212 <prvReadBytesFromBuffer+0xb8>
	__asm volatile
 80131fa:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80131fe:	f383 8811 	msr	BASEPRI, r3
 8013202:	f3bf 8f6f 	isb	sy
 8013206:	f3bf 8f4f 	dsb	sy
 801320a:	613b      	str	r3, [r7, #16]
}
 801320c:	bf00      	nop
 801320e:	bf00      	nop
 8013210:	e7fd      	b.n	801320e <prvReadBytesFromBuffer+0xb4>
			( void ) memcpy( ( void * ) &( pucData[ xFirstLength ] ), ( void * ) ( pxStreamBuffer->pucBuffer ), xCount - xFirstLength ); /*lint !e9087 memcpy() requires void *. */
 8013212:	68ba      	ldr	r2, [r7, #8]
 8013214:	69fb      	ldr	r3, [r7, #28]
 8013216:	18d0      	adds	r0, r2, r3
 8013218:	68fb      	ldr	r3, [r7, #12]
 801321a:	6999      	ldr	r1, [r3, #24]
 801321c:	6a3a      	ldr	r2, [r7, #32]
 801321e:	69fb      	ldr	r3, [r7, #28]
 8013220:	1ad3      	subs	r3, r2, r3
 8013222:	461a      	mov	r2, r3
 8013224:	f017 fa53 	bl	802a6ce <memcpy>
			mtCOVERAGE_TEST_MARKER();
		}

		/* Move the tail pointer to effectively remove the data read from
		the buffer. */
		xNextTail += xCount;
 8013228:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 801322a:	6a3b      	ldr	r3, [r7, #32]
 801322c:	4413      	add	r3, r2
 801322e:	627b      	str	r3, [r7, #36]	@ 0x24

		if( xNextTail >= pxStreamBuffer->xLength )
 8013230:	68fb      	ldr	r3, [r7, #12]
 8013232:	689b      	ldr	r3, [r3, #8]
 8013234:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8013236:	429a      	cmp	r2, r3
 8013238:	d304      	bcc.n	8013244 <prvReadBytesFromBuffer+0xea>
		{
			xNextTail -= pxStreamBuffer->xLength;
 801323a:	68fb      	ldr	r3, [r7, #12]
 801323c:	689b      	ldr	r3, [r3, #8]
 801323e:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8013240:	1ad3      	subs	r3, r2, r3
 8013242:	627b      	str	r3, [r7, #36]	@ 0x24
		}

		pxStreamBuffer->xTail = xNextTail;
 8013244:	68fb      	ldr	r3, [r7, #12]
 8013246:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8013248:	601a      	str	r2, [r3, #0]
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}

	return xCount;
 801324a:	6a3b      	ldr	r3, [r7, #32]
}
 801324c:	4618      	mov	r0, r3
 801324e:	3728      	adds	r7, #40	@ 0x28
 8013250:	46bd      	mov	sp, r7
 8013252:	bd80      	pop	{r7, pc}

08013254 <prvBytesInBuffer>:
/*-----------------------------------------------------------*/

static size_t prvBytesInBuffer( const StreamBuffer_t * const pxStreamBuffer )
{
 8013254:	b480      	push	{r7}
 8013256:	b085      	sub	sp, #20
 8013258:	af00      	add	r7, sp, #0
 801325a:	6078      	str	r0, [r7, #4]
/* Returns the distance between xTail and xHead. */
size_t xCount;

	xCount = pxStreamBuffer->xLength + pxStreamBuffer->xHead;
 801325c:	687b      	ldr	r3, [r7, #4]
 801325e:	689a      	ldr	r2, [r3, #8]
 8013260:	687b      	ldr	r3, [r7, #4]
 8013262:	685b      	ldr	r3, [r3, #4]
 8013264:	4413      	add	r3, r2
 8013266:	60fb      	str	r3, [r7, #12]
	xCount -= pxStreamBuffer->xTail;
 8013268:	687b      	ldr	r3, [r7, #4]
 801326a:	681b      	ldr	r3, [r3, #0]
 801326c:	68fa      	ldr	r2, [r7, #12]
 801326e:	1ad3      	subs	r3, r2, r3
 8013270:	60fb      	str	r3, [r7, #12]
	if ( xCount >= pxStreamBuffer->xLength )
 8013272:	687b      	ldr	r3, [r7, #4]
 8013274:	689b      	ldr	r3, [r3, #8]
 8013276:	68fa      	ldr	r2, [r7, #12]
 8013278:	429a      	cmp	r2, r3
 801327a:	d304      	bcc.n	8013286 <prvBytesInBuffer+0x32>
	{
		xCount -= pxStreamBuffer->xLength;
 801327c:	687b      	ldr	r3, [r7, #4]
 801327e:	689b      	ldr	r3, [r3, #8]
 8013280:	68fa      	ldr	r2, [r7, #12]
 8013282:	1ad3      	subs	r3, r2, r3
 8013284:	60fb      	str	r3, [r7, #12]
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}

	return xCount;
 8013286:	68fb      	ldr	r3, [r7, #12]
}
 8013288:	4618      	mov	r0, r3
 801328a:	3714      	adds	r7, #20
 801328c:	46bd      	mov	sp, r7
 801328e:	f85d 7b04 	ldr.w	r7, [sp], #4
 8013292:	4770      	bx	lr

08013294 <prvInitialiseNewStreamBuffer>:
static void prvInitialiseNewStreamBuffer( StreamBuffer_t * const pxStreamBuffer,
										  uint8_t * const pucBuffer,
										  size_t xBufferSizeBytes,
										  size_t xTriggerLevelBytes,
										  uint8_t ucFlags )
{
 8013294:	b580      	push	{r7, lr}
 8013296:	b086      	sub	sp, #24
 8013298:	af00      	add	r7, sp, #0
 801329a:	60f8      	str	r0, [r7, #12]
 801329c:	60b9      	str	r1, [r7, #8]
 801329e:	607a      	str	r2, [r7, #4]
 80132a0:	603b      	str	r3, [r7, #0]
	#if( configASSERT_DEFINED == 1 )
	{
		/* The value written just has to be identifiable when looking at the
		memory.  Don't use 0xA5 as that is the stack fill value and could
		result in confusion as to what is actually being observed. */
		const BaseType_t xWriteValue = 0x55;
 80132a2:	2355      	movs	r3, #85	@ 0x55
 80132a4:	617b      	str	r3, [r7, #20]
		configASSERT( memset( pucBuffer, ( int ) xWriteValue, xBufferSizeBytes ) == pucBuffer );
 80132a6:	687a      	ldr	r2, [r7, #4]
 80132a8:	6979      	ldr	r1, [r7, #20]
 80132aa:	68b8      	ldr	r0, [r7, #8]
 80132ac:	f017 f918 	bl	802a4e0 <memset>
 80132b0:	4602      	mov	r2, r0
 80132b2:	68bb      	ldr	r3, [r7, #8]
 80132b4:	4293      	cmp	r3, r2
 80132b6:	d00b      	beq.n	80132d0 <prvInitialiseNewStreamBuffer+0x3c>
	__asm volatile
 80132b8:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80132bc:	f383 8811 	msr	BASEPRI, r3
 80132c0:	f3bf 8f6f 	isb	sy
 80132c4:	f3bf 8f4f 	dsb	sy
 80132c8:	613b      	str	r3, [r7, #16]
}
 80132ca:	bf00      	nop
 80132cc:	bf00      	nop
 80132ce:	e7fd      	b.n	80132cc <prvInitialiseNewStreamBuffer+0x38>
	} /*lint !e529 !e438 xWriteValue is only used if configASSERT() is defined. */
	#endif

	( void ) memset( ( void * ) pxStreamBuffer, 0x00, sizeof( StreamBuffer_t ) ); /*lint !e9087 memset() requires void *. */
 80132d0:	2224      	movs	r2, #36	@ 0x24
 80132d2:	2100      	movs	r1, #0
 80132d4:	68f8      	ldr	r0, [r7, #12]
 80132d6:	f017 f903 	bl	802a4e0 <memset>
	pxStreamBuffer->pucBuffer = pucBuffer;
 80132da:	68fb      	ldr	r3, [r7, #12]
 80132dc:	68ba      	ldr	r2, [r7, #8]
 80132de:	619a      	str	r2, [r3, #24]
	pxStreamBuffer->xLength = xBufferSizeBytes;
 80132e0:	68fb      	ldr	r3, [r7, #12]
 80132e2:	687a      	ldr	r2, [r7, #4]
 80132e4:	609a      	str	r2, [r3, #8]
	pxStreamBuffer->xTriggerLevelBytes = xTriggerLevelBytes;
 80132e6:	68fb      	ldr	r3, [r7, #12]
 80132e8:	683a      	ldr	r2, [r7, #0]
 80132ea:	60da      	str	r2, [r3, #12]
	pxStreamBuffer->ucFlags = ucFlags;
 80132ec:	68fb      	ldr	r3, [r7, #12]
 80132ee:	f897 2020 	ldrb.w	r2, [r7, #32]
 80132f2:	771a      	strb	r2, [r3, #28]
}
 80132f4:	bf00      	nop
 80132f6:	3718      	adds	r7, #24
 80132f8:	46bd      	mov	sp, r7
 80132fa:	bd80      	pop	{r7, pc}

080132fc <xTaskCreateStatic>:
									const uint32_t ulStackDepth,
									void * const pvParameters,
									UBaseType_t uxPriority,
									StackType_t * const puxStackBuffer,
									StaticTask_t * const pxTaskBuffer )
	{
 80132fc:	b580      	push	{r7, lr}
 80132fe:	b08e      	sub	sp, #56	@ 0x38
 8013300:	af04      	add	r7, sp, #16
 8013302:	60f8      	str	r0, [r7, #12]
 8013304:	60b9      	str	r1, [r7, #8]
 8013306:	607a      	str	r2, [r7, #4]
 8013308:	603b      	str	r3, [r7, #0]
	TCB_t *pxNewTCB;
	TaskHandle_t xReturn;

		configASSERT( puxStackBuffer != NULL );
 801330a:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 801330c:	2b00      	cmp	r3, #0
 801330e:	d10b      	bne.n	8013328 <xTaskCreateStatic+0x2c>
	__asm volatile
 8013310:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8013314:	f383 8811 	msr	BASEPRI, r3
 8013318:	f3bf 8f6f 	isb	sy
 801331c:	f3bf 8f4f 	dsb	sy
 8013320:	623b      	str	r3, [r7, #32]
}
 8013322:	bf00      	nop
 8013324:	bf00      	nop
 8013326:	e7fd      	b.n	8013324 <xTaskCreateStatic+0x28>
		configASSERT( pxTaskBuffer != NULL );
 8013328:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801332a:	2b00      	cmp	r3, #0
 801332c:	d10b      	bne.n	8013346 <xTaskCreateStatic+0x4a>
	__asm volatile
 801332e:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8013332:	f383 8811 	msr	BASEPRI, r3
 8013336:	f3bf 8f6f 	isb	sy
 801333a:	f3bf 8f4f 	dsb	sy
 801333e:	61fb      	str	r3, [r7, #28]
}
 8013340:	bf00      	nop
 8013342:	bf00      	nop
 8013344:	e7fd      	b.n	8013342 <xTaskCreateStatic+0x46>
		#if( configASSERT_DEFINED == 1 )
		{
			/* Sanity check that the size of the structure used to declare a
			variable of type StaticTask_t equals the size of the real task
			structure. */
			volatile size_t xSize = sizeof( StaticTask_t );
 8013346:	23a8      	movs	r3, #168	@ 0xa8
 8013348:	613b      	str	r3, [r7, #16]
			configASSERT( xSize == sizeof( TCB_t ) );
 801334a:	693b      	ldr	r3, [r7, #16]
 801334c:	2ba8      	cmp	r3, #168	@ 0xa8
 801334e:	d00b      	beq.n	8013368 <xTaskCreateStatic+0x6c>
	__asm volatile
 8013350:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8013354:	f383 8811 	msr	BASEPRI, r3
 8013358:	f3bf 8f6f 	isb	sy
 801335c:	f3bf 8f4f 	dsb	sy
 8013360:	61bb      	str	r3, [r7, #24]
}
 8013362:	bf00      	nop
 8013364:	bf00      	nop
 8013366:	e7fd      	b.n	8013364 <xTaskCreateStatic+0x68>
			( void ) xSize; /* Prevent lint warning when configASSERT() is not used. */
 8013368:	693b      	ldr	r3, [r7, #16]
		}
		#endif /* configASSERT_DEFINED */


		if( ( pxTaskBuffer != NULL ) && ( puxStackBuffer != NULL ) )
 801336a:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801336c:	2b00      	cmp	r3, #0
 801336e:	d01e      	beq.n	80133ae <xTaskCreateStatic+0xb2>
 8013370:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8013372:	2b00      	cmp	r3, #0
 8013374:	d01b      	beq.n	80133ae <xTaskCreateStatic+0xb2>
		{
			/* The memory used for the task's TCB and stack are passed into this
			function - use them. */
			pxNewTCB = ( TCB_t * ) pxTaskBuffer; /*lint !e740 !e9087 Unusual cast is ok as the structures are designed to have the same alignment, and the size is checked by an assert. */
 8013376:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8013378:	627b      	str	r3, [r7, #36]	@ 0x24
			pxNewTCB->pxStack = ( StackType_t * ) puxStackBuffer;
 801337a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801337c:	6b7a      	ldr	r2, [r7, #52]	@ 0x34
 801337e:	631a      	str	r2, [r3, #48]	@ 0x30

			#if( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 ) /*lint !e731 !e9029 Macro has been consolidated for readability reasons. */
			{
				/* Tasks can be created statically or dynamically, so note this
				task was created statically in case the task is later deleted. */
				pxNewTCB->ucStaticallyAllocated = tskSTATICALLY_ALLOCATED_STACK_AND_TCB;
 8013380:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8013382:	2202      	movs	r2, #2
 8013384:	f883 20a5 	strb.w	r2, [r3, #165]	@ 0xa5
			}
			#endif /* tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE */

			prvInitialiseNewTask( pxTaskCode, pcName, ulStackDepth, pvParameters, uxPriority, &xReturn, pxNewTCB, NULL );
 8013388:	2300      	movs	r3, #0
 801338a:	9303      	str	r3, [sp, #12]
 801338c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801338e:	9302      	str	r3, [sp, #8]
 8013390:	f107 0314 	add.w	r3, r7, #20
 8013394:	9301      	str	r3, [sp, #4]
 8013396:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013398:	9300      	str	r3, [sp, #0]
 801339a:	683b      	ldr	r3, [r7, #0]
 801339c:	687a      	ldr	r2, [r7, #4]
 801339e:	68b9      	ldr	r1, [r7, #8]
 80133a0:	68f8      	ldr	r0, [r7, #12]
 80133a2:	f000 f851 	bl	8013448 <prvInitialiseNewTask>
			prvAddNewTaskToReadyList( pxNewTCB );
 80133a6:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 80133a8:	f000 f8f6 	bl	8013598 <prvAddNewTaskToReadyList>
 80133ac:	e001      	b.n	80133b2 <xTaskCreateStatic+0xb6>
		}
		else
		{
			xReturn = NULL;
 80133ae:	2300      	movs	r3, #0
 80133b0:	617b      	str	r3, [r7, #20]
		}

		return xReturn;
 80133b2:	697b      	ldr	r3, [r7, #20]
	}
 80133b4:	4618      	mov	r0, r3
 80133b6:	3728      	adds	r7, #40	@ 0x28
 80133b8:	46bd      	mov	sp, r7
 80133ba:	bd80      	pop	{r7, pc}

080133bc <xTaskCreate>:
							const char * const pcName,		/*lint !e971 Unqualified char types are allowed for strings and single characters only. */
							const configSTACK_DEPTH_TYPE usStackDepth,
							void * const pvParameters,
							UBaseType_t uxPriority,
							TaskHandle_t * const pxCreatedTask )
	{
 80133bc:	b580      	push	{r7, lr}
 80133be:	b08c      	sub	sp, #48	@ 0x30
 80133c0:	af04      	add	r7, sp, #16
 80133c2:	60f8      	str	r0, [r7, #12]
 80133c4:	60b9      	str	r1, [r7, #8]
 80133c6:	603b      	str	r3, [r7, #0]
 80133c8:	4613      	mov	r3, r2
 80133ca:	80fb      	strh	r3, [r7, #6]
		#else /* portSTACK_GROWTH */
		{
		StackType_t *pxStack;

			/* Allocate space for the stack used by the task being created. */
			pxStack = pvPortMalloc( ( ( ( size_t ) usStackDepth ) * sizeof( StackType_t ) ) ); /*lint !e9079 All values returned by pvPortMalloc() have at least the alignment required by the MCU's stack and this allocation is the stack. */
 80133cc:	88fb      	ldrh	r3, [r7, #6]
 80133ce:	009b      	lsls	r3, r3, #2
 80133d0:	4618      	mov	r0, r3
 80133d2:	f002 f8c3 	bl	801555c <pvPortMalloc>
 80133d6:	6178      	str	r0, [r7, #20]

			if( pxStack != NULL )
 80133d8:	697b      	ldr	r3, [r7, #20]
 80133da:	2b00      	cmp	r3, #0
 80133dc:	d00e      	beq.n	80133fc <xTaskCreate+0x40>
			{
				/* Allocate space for the TCB. */
				pxNewTCB = ( TCB_t * ) pvPortMalloc( sizeof( TCB_t ) ); /*lint !e9087 !e9079 All values returned by pvPortMalloc() have at least the alignment required by the MCU's stack, and the first member of TCB_t is always a pointer to the task's stack. */
 80133de:	20a8      	movs	r0, #168	@ 0xa8
 80133e0:	f002 f8bc 	bl	801555c <pvPortMalloc>
 80133e4:	61f8      	str	r0, [r7, #28]

				if( pxNewTCB != NULL )
 80133e6:	69fb      	ldr	r3, [r7, #28]
 80133e8:	2b00      	cmp	r3, #0
 80133ea:	d003      	beq.n	80133f4 <xTaskCreate+0x38>
				{
					/* Store the stack location in the TCB. */
					pxNewTCB->pxStack = pxStack;
 80133ec:	69fb      	ldr	r3, [r7, #28]
 80133ee:	697a      	ldr	r2, [r7, #20]
 80133f0:	631a      	str	r2, [r3, #48]	@ 0x30
 80133f2:	e005      	b.n	8013400 <xTaskCreate+0x44>
				}
				else
				{
					/* The stack cannot be used as the TCB was not created.  Free
					it again. */
					vPortFree( pxStack );
 80133f4:	6978      	ldr	r0, [r7, #20]
 80133f6:	f002 f97f 	bl	80156f8 <vPortFree>
 80133fa:	e001      	b.n	8013400 <xTaskCreate+0x44>
				}
			}
			else
			{
				pxNewTCB = NULL;
 80133fc:	2300      	movs	r3, #0
 80133fe:	61fb      	str	r3, [r7, #28]
			}
		}
		#endif /* portSTACK_GROWTH */

		if( pxNewTCB != NULL )
 8013400:	69fb      	ldr	r3, [r7, #28]
 8013402:	2b00      	cmp	r3, #0
 8013404:	d017      	beq.n	8013436 <xTaskCreate+0x7a>
		{
			#if( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 ) /*lint !e9029 !e731 Macro has been consolidated for readability reasons. */
			{
				/* Tasks can be created statically or dynamically, so note this
				task was created dynamically in case it is later deleted. */
				pxNewTCB->ucStaticallyAllocated = tskDYNAMICALLY_ALLOCATED_STACK_AND_TCB;
 8013406:	69fb      	ldr	r3, [r7, #28]
 8013408:	2200      	movs	r2, #0
 801340a:	f883 20a5 	strb.w	r2, [r3, #165]	@ 0xa5
			}
			#endif /* tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE */

			prvInitialiseNewTask( pxTaskCode, pcName, ( uint32_t ) usStackDepth, pvParameters, uxPriority, pxCreatedTask, pxNewTCB, NULL );
 801340e:	88fa      	ldrh	r2, [r7, #6]
 8013410:	2300      	movs	r3, #0
 8013412:	9303      	str	r3, [sp, #12]
 8013414:	69fb      	ldr	r3, [r7, #28]
 8013416:	9302      	str	r3, [sp, #8]
 8013418:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801341a:	9301      	str	r3, [sp, #4]
 801341c:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801341e:	9300      	str	r3, [sp, #0]
 8013420:	683b      	ldr	r3, [r7, #0]
 8013422:	68b9      	ldr	r1, [r7, #8]
 8013424:	68f8      	ldr	r0, [r7, #12]
 8013426:	f000 f80f 	bl	8013448 <prvInitialiseNewTask>
			prvAddNewTaskToReadyList( pxNewTCB );
 801342a:	69f8      	ldr	r0, [r7, #28]
 801342c:	f000 f8b4 	bl	8013598 <prvAddNewTaskToReadyList>
			xReturn = pdPASS;
 8013430:	2301      	movs	r3, #1
 8013432:	61bb      	str	r3, [r7, #24]
 8013434:	e002      	b.n	801343c <xTaskCreate+0x80>
		}
		else
		{
			xReturn = errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY;
 8013436:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 801343a:	61bb      	str	r3, [r7, #24]
		}

		return xReturn;
 801343c:	69bb      	ldr	r3, [r7, #24]
	}
 801343e:	4618      	mov	r0, r3
 8013440:	3720      	adds	r7, #32
 8013442:	46bd      	mov	sp, r7
 8013444:	bd80      	pop	{r7, pc}
	...

08013448 <prvInitialiseNewTask>:
									void * const pvParameters,
									UBaseType_t uxPriority,
									TaskHandle_t * const pxCreatedTask,
									TCB_t *pxNewTCB,
									const MemoryRegion_t * const xRegions )
{
 8013448:	b580      	push	{r7, lr}
 801344a:	b088      	sub	sp, #32
 801344c:	af00      	add	r7, sp, #0
 801344e:	60f8      	str	r0, [r7, #12]
 8013450:	60b9      	str	r1, [r7, #8]
 8013452:	607a      	str	r2, [r7, #4]
 8013454:	603b      	str	r3, [r7, #0]

	/* Avoid dependency on memset() if it is not required. */
	#if( tskSET_NEW_STACKS_TO_KNOWN_VALUE == 1 )
	{
		/* Fill the stack with a known value to assist debugging. */
		( void ) memset( pxNewTCB->pxStack, ( int ) tskSTACK_FILL_BYTE, ( size_t ) ulStackDepth * sizeof( StackType_t ) );
 8013456:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013458:	6b18      	ldr	r0, [r3, #48]	@ 0x30
 801345a:	687b      	ldr	r3, [r7, #4]
 801345c:	009b      	lsls	r3, r3, #2
 801345e:	461a      	mov	r2, r3
 8013460:	21a5      	movs	r1, #165	@ 0xa5
 8013462:	f017 f83d 	bl	802a4e0 <memset>
	grows from high memory to low (as per the 80x86) or vice versa.
	portSTACK_GROWTH is used to make the result positive or negative as required
	by the port. */
	#if( portSTACK_GROWTH < 0 )
	{
		pxTopOfStack = &( pxNewTCB->pxStack[ ulStackDepth - ( uint32_t ) 1 ] );
 8013466:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013468:	6b1a      	ldr	r2, [r3, #48]	@ 0x30
 801346a:	6879      	ldr	r1, [r7, #4]
 801346c:	f06f 4340 	mvn.w	r3, #3221225472	@ 0xc0000000
 8013470:	440b      	add	r3, r1
 8013472:	009b      	lsls	r3, r3, #2
 8013474:	4413      	add	r3, r2
 8013476:	61bb      	str	r3, [r7, #24]
		pxTopOfStack = ( StackType_t * ) ( ( ( portPOINTER_SIZE_TYPE ) pxTopOfStack ) & ( ~( ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) ) ); /*lint !e923 !e9033 !e9078 MISRA exception.  Avoiding casts between pointers and integers is not practical.  Size differences accounted for using portPOINTER_SIZE_TYPE type.  Checked by assert(). */
 8013478:	69bb      	ldr	r3, [r7, #24]
 801347a:	f023 0307 	bic.w	r3, r3, #7
 801347e:	61bb      	str	r3, [r7, #24]

		/* Check the alignment of the calculated top of stack is correct. */
		configASSERT( ( ( ( portPOINTER_SIZE_TYPE ) pxTopOfStack & ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) == 0UL ) );
 8013480:	69bb      	ldr	r3, [r7, #24]
 8013482:	f003 0307 	and.w	r3, r3, #7
 8013486:	2b00      	cmp	r3, #0
 8013488:	d00b      	beq.n	80134a2 <prvInitialiseNewTask+0x5a>
	__asm volatile
 801348a:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801348e:	f383 8811 	msr	BASEPRI, r3
 8013492:	f3bf 8f6f 	isb	sy
 8013496:	f3bf 8f4f 	dsb	sy
 801349a:	617b      	str	r3, [r7, #20]
}
 801349c:	bf00      	nop
 801349e:	bf00      	nop
 80134a0:	e7fd      	b.n	801349e <prvInitialiseNewTask+0x56>
		pxNewTCB->pxEndOfStack = pxNewTCB->pxStack + ( ulStackDepth - ( uint32_t ) 1 );
	}
	#endif /* portSTACK_GROWTH */

	/* Store the task name in the TCB. */
	if( pcName != NULL )
 80134a2:	68bb      	ldr	r3, [r7, #8]
 80134a4:	2b00      	cmp	r3, #0
 80134a6:	d01f      	beq.n	80134e8 <prvInitialiseNewTask+0xa0>
	{
		for( x = ( UBaseType_t ) 0; x < ( UBaseType_t ) configMAX_TASK_NAME_LEN; x++ )
 80134a8:	2300      	movs	r3, #0
 80134aa:	61fb      	str	r3, [r7, #28]
 80134ac:	e012      	b.n	80134d4 <prvInitialiseNewTask+0x8c>
		{
			pxNewTCB->pcTaskName[ x ] = pcName[ x ];
 80134ae:	68ba      	ldr	r2, [r7, #8]
 80134b0:	69fb      	ldr	r3, [r7, #28]
 80134b2:	4413      	add	r3, r2
 80134b4:	7819      	ldrb	r1, [r3, #0]
 80134b6:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 80134b8:	69fb      	ldr	r3, [r7, #28]
 80134ba:	4413      	add	r3, r2
 80134bc:	3334      	adds	r3, #52	@ 0x34
 80134be:	460a      	mov	r2, r1
 80134c0:	701a      	strb	r2, [r3, #0]

			/* Don't copy all configMAX_TASK_NAME_LEN if the string is shorter than
			configMAX_TASK_NAME_LEN characters just in case the memory after the
			string is not accessible (extremely unlikely). */
			if( pcName[ x ] == ( char ) 0x00 )
 80134c2:	68ba      	ldr	r2, [r7, #8]
 80134c4:	69fb      	ldr	r3, [r7, #28]
 80134c6:	4413      	add	r3, r2
 80134c8:	781b      	ldrb	r3, [r3, #0]
 80134ca:	2b00      	cmp	r3, #0
 80134cc:	d006      	beq.n	80134dc <prvInitialiseNewTask+0x94>
		for( x = ( UBaseType_t ) 0; x < ( UBaseType_t ) configMAX_TASK_NAME_LEN; x++ )
 80134ce:	69fb      	ldr	r3, [r7, #28]
 80134d0:	3301      	adds	r3, #1
 80134d2:	61fb      	str	r3, [r7, #28]
 80134d4:	69fb      	ldr	r3, [r7, #28]
 80134d6:	2b0f      	cmp	r3, #15
 80134d8:	d9e9      	bls.n	80134ae <prvInitialiseNewTask+0x66>
 80134da:	e000      	b.n	80134de <prvInitialiseNewTask+0x96>
			{
				break;
 80134dc:	bf00      	nop
			}
		}

		/* Ensure the name string is terminated in the case that the string length
		was greater or equal to configMAX_TASK_NAME_LEN. */
		pxNewTCB->pcTaskName[ configMAX_TASK_NAME_LEN - 1 ] = '\0';
 80134de:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80134e0:	2200      	movs	r2, #0
 80134e2:	f883 2043 	strb.w	r2, [r3, #67]	@ 0x43
 80134e6:	e003      	b.n	80134f0 <prvInitialiseNewTask+0xa8>
	}
	else
	{
		/* The task has not been given a name, so just ensure there is a NULL
		terminator when it is read out. */
		pxNewTCB->pcTaskName[ 0 ] = 0x00;
 80134e8:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80134ea:	2200      	movs	r2, #0
 80134ec:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34
	}

	/* This is used as an array index so must ensure it's not too large.  First
	remove the privilege bit if one is present. */
	if( uxPriority >= ( UBaseType_t ) configMAX_PRIORITIES )
 80134f0:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80134f2:	2b37      	cmp	r3, #55	@ 0x37
 80134f4:	d901      	bls.n	80134fa <prvInitialiseNewTask+0xb2>
	{
		uxPriority = ( UBaseType_t ) configMAX_PRIORITIES - ( UBaseType_t ) 1U;
 80134f6:	2337      	movs	r3, #55	@ 0x37
 80134f8:	62bb      	str	r3, [r7, #40]	@ 0x28
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}

	pxNewTCB->uxPriority = uxPriority;
 80134fa:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80134fc:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 80134fe:	62da      	str	r2, [r3, #44]	@ 0x2c
	#if ( configUSE_MUTEXES == 1 )
	{
		pxNewTCB->uxBasePriority = uxPriority;
 8013500:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013502:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 8013504:	64da      	str	r2, [r3, #76]	@ 0x4c
		pxNewTCB->uxMutexesHeld = 0;
 8013506:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013508:	2200      	movs	r2, #0
 801350a:	651a      	str	r2, [r3, #80]	@ 0x50
	}
	#endif /* configUSE_MUTEXES */

	vListInitialiseItem( &( pxNewTCB->xStateListItem ) );
 801350c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801350e:	3304      	adds	r3, #4
 8013510:	4618      	mov	r0, r3
 8013512:	f7fe f9a5 	bl	8011860 <vListInitialiseItem>
	vListInitialiseItem( &( pxNewTCB->xEventListItem ) );
 8013516:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013518:	3318      	adds	r3, #24
 801351a:	4618      	mov	r0, r3
 801351c:	f7fe f9a0 	bl	8011860 <vListInitialiseItem>

	/* Set the pxNewTCB as a link back from the ListItem_t.  This is so we can get
	back to	the containing TCB from a generic item in a list. */
	listSET_LIST_ITEM_OWNER( &( pxNewTCB->xStateListItem ), pxNewTCB );
 8013520:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013522:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 8013524:	611a      	str	r2, [r3, #16]

	/* Event lists are always in priority order. */
	listSET_LIST_ITEM_VALUE( &( pxNewTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
 8013526:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8013528:	f1c3 0238 	rsb	r2, r3, #56	@ 0x38
 801352c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801352e:	619a      	str	r2, [r3, #24]
	listSET_LIST_ITEM_OWNER( &( pxNewTCB->xEventListItem ), pxNewTCB );
 8013530:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013532:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 8013534:	625a      	str	r2, [r3, #36]	@ 0x24
	}
	#endif

	#if ( configUSE_TASK_NOTIFICATIONS == 1 )
	{
		pxNewTCB->ulNotifiedValue = 0;
 8013536:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013538:	2200      	movs	r2, #0
 801353a:	f8c3 20a0 	str.w	r2, [r3, #160]	@ 0xa0
		pxNewTCB->ucNotifyState = taskNOT_WAITING_NOTIFICATION;
 801353e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013540:	2200      	movs	r2, #0
 8013542:	f883 20a4 	strb.w	r2, [r3, #164]	@ 0xa4
	#if ( configUSE_NEWLIB_REENTRANT == 1 )
	{
		/* Initialise this task's Newlib reent structure.
		See the third party link http://www.nadler.com/embedded/newlibAndFreeRTOS.html
		for additional information. */
		_REENT_INIT_PTR( ( &( pxNewTCB->xNewLib_reent ) ) );
 8013546:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013548:	3354      	adds	r3, #84	@ 0x54
 801354a:	224c      	movs	r2, #76	@ 0x4c
 801354c:	2100      	movs	r1, #0
 801354e:	4618      	mov	r0, r3
 8013550:	f016 ffc6 	bl	802a4e0 <memset>
 8013554:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013556:	4a0d      	ldr	r2, [pc, #52]	@ (801358c <prvInitialiseNewTask+0x144>)
 8013558:	659a      	str	r2, [r3, #88]	@ 0x58
 801355a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801355c:	4a0c      	ldr	r2, [pc, #48]	@ (8013590 <prvInitialiseNewTask+0x148>)
 801355e:	65da      	str	r2, [r3, #92]	@ 0x5c
 8013560:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013562:	4a0c      	ldr	r2, [pc, #48]	@ (8013594 <prvInitialiseNewTask+0x14c>)
 8013564:	661a      	str	r2, [r3, #96]	@ 0x60
			}
			#endif /* portSTACK_GROWTH */
		}
		#else /* portHAS_STACK_OVERFLOW_CHECKING */
		{
			pxNewTCB->pxTopOfStack = pxPortInitialiseStack( pxTopOfStack, pxTaskCode, pvParameters );
 8013566:	683a      	ldr	r2, [r7, #0]
 8013568:	68f9      	ldr	r1, [r7, #12]
 801356a:	69b8      	ldr	r0, [r7, #24]
 801356c:	f001 fda0 	bl	80150b0 <pxPortInitialiseStack>
 8013570:	4602      	mov	r2, r0
 8013572:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013574:	601a      	str	r2, [r3, #0]
		}
		#endif /* portHAS_STACK_OVERFLOW_CHECKING */
	}
	#endif /* portUSING_MPU_WRAPPERS */

	if( pxCreatedTask != NULL )
 8013576:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8013578:	2b00      	cmp	r3, #0
 801357a:	d002      	beq.n	8013582 <prvInitialiseNewTask+0x13a>
	{
		/* Pass the handle out in an anonymous way.  The handle can be used to
		change the created task's priority, delete the created task, etc.*/
		*pxCreatedTask = ( TaskHandle_t ) pxNewTCB;
 801357c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801357e:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 8013580:	601a      	str	r2, [r3, #0]
	}
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}
}
 8013582:	bf00      	nop
 8013584:	3720      	adds	r7, #32
 8013586:	46bd      	mov	sp, r7
 8013588:	bd80      	pop	{r7, pc}
 801358a:	bf00      	nop
 801358c:	2402b114 	.word	0x2402b114
 8013590:	2402b17c 	.word	0x2402b17c
 8013594:	2402b1e4 	.word	0x2402b1e4

08013598 <prvAddNewTaskToReadyList>:
/*-----------------------------------------------------------*/

static void prvAddNewTaskToReadyList( TCB_t *pxNewTCB )
{
 8013598:	b580      	push	{r7, lr}
 801359a:	b082      	sub	sp, #8
 801359c:	af00      	add	r7, sp, #0
 801359e:	6078      	str	r0, [r7, #4]
	/* Ensure interrupts don't access the task lists while the lists are being
	updated. */
	taskENTER_CRITICAL();
 80135a0:	f001 feba 	bl	8015318 <vPortEnterCritical>
	{
		uxCurrentNumberOfTasks++;
 80135a4:	4b2d      	ldr	r3, [pc, #180]	@ (801365c <prvAddNewTaskToReadyList+0xc4>)
 80135a6:	681b      	ldr	r3, [r3, #0]
 80135a8:	3301      	adds	r3, #1
 80135aa:	4a2c      	ldr	r2, [pc, #176]	@ (801365c <prvAddNewTaskToReadyList+0xc4>)
 80135ac:	6013      	str	r3, [r2, #0]
		if( pxCurrentTCB == NULL )
 80135ae:	4b2c      	ldr	r3, [pc, #176]	@ (8013660 <prvAddNewTaskToReadyList+0xc8>)
 80135b0:	681b      	ldr	r3, [r3, #0]
 80135b2:	2b00      	cmp	r3, #0
 80135b4:	d109      	bne.n	80135ca <prvAddNewTaskToReadyList+0x32>
		{
			/* There are no other tasks, or all the other tasks are in
			the suspended state - make this the current task. */
			pxCurrentTCB = pxNewTCB;
 80135b6:	4a2a      	ldr	r2, [pc, #168]	@ (8013660 <prvAddNewTaskToReadyList+0xc8>)
 80135b8:	687b      	ldr	r3, [r7, #4]
 80135ba:	6013      	str	r3, [r2, #0]

			if( uxCurrentNumberOfTasks == ( UBaseType_t ) 1 )
 80135bc:	4b27      	ldr	r3, [pc, #156]	@ (801365c <prvAddNewTaskToReadyList+0xc4>)
 80135be:	681b      	ldr	r3, [r3, #0]
 80135c0:	2b01      	cmp	r3, #1
 80135c2:	d110      	bne.n	80135e6 <prvAddNewTaskToReadyList+0x4e>
			{
				/* This is the first task to be created so do the preliminary
				initialisation required.  We will not recover if this call
				fails, but we will report the failure. */
				prvInitialiseTaskLists();
 80135c4:	f000 fc76 	bl	8013eb4 <prvInitialiseTaskLists>
 80135c8:	e00d      	b.n	80135e6 <prvAddNewTaskToReadyList+0x4e>
		else
		{
			/* If the scheduler is not already running, make this task the
			current task if it is the highest priority task to be created
			so far. */
			if( xSchedulerRunning == pdFALSE )
 80135ca:	4b26      	ldr	r3, [pc, #152]	@ (8013664 <prvAddNewTaskToReadyList+0xcc>)
 80135cc:	681b      	ldr	r3, [r3, #0]
 80135ce:	2b00      	cmp	r3, #0
 80135d0:	d109      	bne.n	80135e6 <prvAddNewTaskToReadyList+0x4e>
			{
				if( pxCurrentTCB->uxPriority <= pxNewTCB->uxPriority )
 80135d2:	4b23      	ldr	r3, [pc, #140]	@ (8013660 <prvAddNewTaskToReadyList+0xc8>)
 80135d4:	681b      	ldr	r3, [r3, #0]
 80135d6:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 80135d8:	687b      	ldr	r3, [r7, #4]
 80135da:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80135dc:	429a      	cmp	r2, r3
 80135de:	d802      	bhi.n	80135e6 <prvAddNewTaskToReadyList+0x4e>
				{
					pxCurrentTCB = pxNewTCB;
 80135e0:	4a1f      	ldr	r2, [pc, #124]	@ (8013660 <prvAddNewTaskToReadyList+0xc8>)
 80135e2:	687b      	ldr	r3, [r7, #4]
 80135e4:	6013      	str	r3, [r2, #0]
			{
				mtCOVERAGE_TEST_MARKER();
			}
		}

		uxTaskNumber++;
 80135e6:	4b20      	ldr	r3, [pc, #128]	@ (8013668 <prvAddNewTaskToReadyList+0xd0>)
 80135e8:	681b      	ldr	r3, [r3, #0]
 80135ea:	3301      	adds	r3, #1
 80135ec:	4a1e      	ldr	r2, [pc, #120]	@ (8013668 <prvAddNewTaskToReadyList+0xd0>)
 80135ee:	6013      	str	r3, [r2, #0]

		#if ( configUSE_TRACE_FACILITY == 1 )
		{
			/* Add a counter into the TCB for tracing only. */
			pxNewTCB->uxTCBNumber = uxTaskNumber;
 80135f0:	4b1d      	ldr	r3, [pc, #116]	@ (8013668 <prvAddNewTaskToReadyList+0xd0>)
 80135f2:	681a      	ldr	r2, [r3, #0]
 80135f4:	687b      	ldr	r3, [r7, #4]
 80135f6:	645a      	str	r2, [r3, #68]	@ 0x44
		}
		#endif /* configUSE_TRACE_FACILITY */
		traceTASK_CREATE( pxNewTCB );

		prvAddTaskToReadyList( pxNewTCB );
 80135f8:	687b      	ldr	r3, [r7, #4]
 80135fa:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 80135fc:	4b1b      	ldr	r3, [pc, #108]	@ (801366c <prvAddNewTaskToReadyList+0xd4>)
 80135fe:	681b      	ldr	r3, [r3, #0]
 8013600:	429a      	cmp	r2, r3
 8013602:	d903      	bls.n	801360c <prvAddNewTaskToReadyList+0x74>
 8013604:	687b      	ldr	r3, [r7, #4]
 8013606:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8013608:	4a18      	ldr	r2, [pc, #96]	@ (801366c <prvAddNewTaskToReadyList+0xd4>)
 801360a:	6013      	str	r3, [r2, #0]
 801360c:	687b      	ldr	r3, [r7, #4]
 801360e:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8013610:	4613      	mov	r3, r2
 8013612:	009b      	lsls	r3, r3, #2
 8013614:	4413      	add	r3, r2
 8013616:	009b      	lsls	r3, r3, #2
 8013618:	4a15      	ldr	r2, [pc, #84]	@ (8013670 <prvAddNewTaskToReadyList+0xd8>)
 801361a:	441a      	add	r2, r3
 801361c:	687b      	ldr	r3, [r7, #4]
 801361e:	3304      	adds	r3, #4
 8013620:	4619      	mov	r1, r3
 8013622:	4610      	mov	r0, r2
 8013624:	f7fe f929 	bl	801187a <vListInsertEnd>

		portSETUP_TCB( pxNewTCB );
	}
	taskEXIT_CRITICAL();
 8013628:	f001 fea8 	bl	801537c <vPortExitCritical>

	if( xSchedulerRunning != pdFALSE )
 801362c:	4b0d      	ldr	r3, [pc, #52]	@ (8013664 <prvAddNewTaskToReadyList+0xcc>)
 801362e:	681b      	ldr	r3, [r3, #0]
 8013630:	2b00      	cmp	r3, #0
 8013632:	d00e      	beq.n	8013652 <prvAddNewTaskToReadyList+0xba>
	{
		/* If the created task is of a higher priority than the current task
		then it should run now. */
		if( pxCurrentTCB->uxPriority < pxNewTCB->uxPriority )
 8013634:	4b0a      	ldr	r3, [pc, #40]	@ (8013660 <prvAddNewTaskToReadyList+0xc8>)
 8013636:	681b      	ldr	r3, [r3, #0]
 8013638:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 801363a:	687b      	ldr	r3, [r7, #4]
 801363c:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 801363e:	429a      	cmp	r2, r3
 8013640:	d207      	bcs.n	8013652 <prvAddNewTaskToReadyList+0xba>
		{
			taskYIELD_IF_USING_PREEMPTION();
 8013642:	4b0c      	ldr	r3, [pc, #48]	@ (8013674 <prvAddNewTaskToReadyList+0xdc>)
 8013644:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8013648:	601a      	str	r2, [r3, #0]
 801364a:	f3bf 8f4f 	dsb	sy
 801364e:	f3bf 8f6f 	isb	sy
	}
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}
}
 8013652:	bf00      	nop
 8013654:	3708      	adds	r7, #8
 8013656:	46bd      	mov	sp, r7
 8013658:	bd80      	pop	{r7, pc}
 801365a:	bf00      	nop
 801365c:	24004234 	.word	0x24004234
 8013660:	24003d60 	.word	0x24003d60
 8013664:	24004240 	.word	0x24004240
 8013668:	24004250 	.word	0x24004250
 801366c:	2400423c 	.word	0x2400423c
 8013670:	24003d64 	.word	0x24003d64
 8013674:	e000ed04 	.word	0xe000ed04

08013678 <vTaskDelay>:
/*-----------------------------------------------------------*/

#if ( INCLUDE_vTaskDelay == 1 )

	void vTaskDelay( const TickType_t xTicksToDelay )
	{
 8013678:	b580      	push	{r7, lr}
 801367a:	b084      	sub	sp, #16
 801367c:	af00      	add	r7, sp, #0
 801367e:	6078      	str	r0, [r7, #4]
	BaseType_t xAlreadyYielded = pdFALSE;
 8013680:	2300      	movs	r3, #0
 8013682:	60fb      	str	r3, [r7, #12]

		/* A delay time of zero just forces a reschedule. */
		if( xTicksToDelay > ( TickType_t ) 0U )
 8013684:	687b      	ldr	r3, [r7, #4]
 8013686:	2b00      	cmp	r3, #0
 8013688:	d018      	beq.n	80136bc <vTaskDelay+0x44>
		{
			configASSERT( uxSchedulerSuspended == 0 );
 801368a:	4b14      	ldr	r3, [pc, #80]	@ (80136dc <vTaskDelay+0x64>)
 801368c:	681b      	ldr	r3, [r3, #0]
 801368e:	2b00      	cmp	r3, #0
 8013690:	d00b      	beq.n	80136aa <vTaskDelay+0x32>
	__asm volatile
 8013692:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8013696:	f383 8811 	msr	BASEPRI, r3
 801369a:	f3bf 8f6f 	isb	sy
 801369e:	f3bf 8f4f 	dsb	sy
 80136a2:	60bb      	str	r3, [r7, #8]
}
 80136a4:	bf00      	nop
 80136a6:	bf00      	nop
 80136a8:	e7fd      	b.n	80136a6 <vTaskDelay+0x2e>
			vTaskSuspendAll();
 80136aa:	f000 f88b 	bl	80137c4 <vTaskSuspendAll>
				list or removed from the blocked list until the scheduler
				is resumed.

				This task cannot be in an event list as it is the currently
				executing task. */
				prvAddCurrentTaskToDelayedList( xTicksToDelay, pdFALSE );
 80136ae:	2100      	movs	r1, #0
 80136b0:	6878      	ldr	r0, [r7, #4]
 80136b2:	f001 f88f 	bl	80147d4 <prvAddCurrentTaskToDelayedList>
			}
			xAlreadyYielded = xTaskResumeAll();
 80136b6:	f000 f893 	bl	80137e0 <xTaskResumeAll>
 80136ba:	60f8      	str	r0, [r7, #12]
			mtCOVERAGE_TEST_MARKER();
		}

		/* Force a reschedule if xTaskResumeAll has not already done so, we may
		have put ourselves to sleep. */
		if( xAlreadyYielded == pdFALSE )
 80136bc:	68fb      	ldr	r3, [r7, #12]
 80136be:	2b00      	cmp	r3, #0
 80136c0:	d107      	bne.n	80136d2 <vTaskDelay+0x5a>
		{
			portYIELD_WITHIN_API();
 80136c2:	4b07      	ldr	r3, [pc, #28]	@ (80136e0 <vTaskDelay+0x68>)
 80136c4:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 80136c8:	601a      	str	r2, [r3, #0]
 80136ca:	f3bf 8f4f 	dsb	sy
 80136ce:	f3bf 8f6f 	isb	sy
		}
		else
		{
			mtCOVERAGE_TEST_MARKER();
		}
	}
 80136d2:	bf00      	nop
 80136d4:	3710      	adds	r7, #16
 80136d6:	46bd      	mov	sp, r7
 80136d8:	bd80      	pop	{r7, pc}
 80136da:	bf00      	nop
 80136dc:	2400425c 	.word	0x2400425c
 80136e0:	e000ed04 	.word	0xe000ed04

080136e4 <vTaskStartScheduler>:

#endif /* ( ( INCLUDE_xTaskResumeFromISR == 1 ) && ( INCLUDE_vTaskSuspend == 1 ) ) */
/*-----------------------------------------------------------*/

void vTaskStartScheduler( void )
{
 80136e4:	b580      	push	{r7, lr}
 80136e6:	b08a      	sub	sp, #40	@ 0x28
 80136e8:	af04      	add	r7, sp, #16
BaseType_t xReturn;

	/* Add the idle task at the lowest priority. */
	#if( configSUPPORT_STATIC_ALLOCATION == 1 )
	{
		StaticTask_t *pxIdleTaskTCBBuffer = NULL;
 80136ea:	2300      	movs	r3, #0
 80136ec:	60bb      	str	r3, [r7, #8]
		StackType_t *pxIdleTaskStackBuffer = NULL;
 80136ee:	2300      	movs	r3, #0
 80136f0:	607b      	str	r3, [r7, #4]
		uint32_t ulIdleTaskStackSize;

		/* The Idle task is created using user provided RAM - obtain the
		address of the RAM then create the idle task. */
		vApplicationGetIdleTaskMemory( &pxIdleTaskTCBBuffer, &pxIdleTaskStackBuffer, &ulIdleTaskStackSize );
 80136f2:	463a      	mov	r2, r7
 80136f4:	1d39      	adds	r1, r7, #4
 80136f6:	f107 0308 	add.w	r3, r7, #8
 80136fa:	4618      	mov	r0, r3
 80136fc:	f7fe f85c 	bl	80117b8 <vApplicationGetIdleTaskMemory>
		xIdleTaskHandle = xTaskCreateStatic(	prvIdleTask,
 8013700:	6839      	ldr	r1, [r7, #0]
 8013702:	687b      	ldr	r3, [r7, #4]
 8013704:	68ba      	ldr	r2, [r7, #8]
 8013706:	9202      	str	r2, [sp, #8]
 8013708:	9301      	str	r3, [sp, #4]
 801370a:	2300      	movs	r3, #0
 801370c:	9300      	str	r3, [sp, #0]
 801370e:	2300      	movs	r3, #0
 8013710:	460a      	mov	r2, r1
 8013712:	4924      	ldr	r1, [pc, #144]	@ (80137a4 <vTaskStartScheduler+0xc0>)
 8013714:	4824      	ldr	r0, [pc, #144]	@ (80137a8 <vTaskStartScheduler+0xc4>)
 8013716:	f7ff fdf1 	bl	80132fc <xTaskCreateStatic>
 801371a:	4603      	mov	r3, r0
 801371c:	4a23      	ldr	r2, [pc, #140]	@ (80137ac <vTaskStartScheduler+0xc8>)
 801371e:	6013      	str	r3, [r2, #0]
												( void * ) NULL, /*lint !e961.  The cast is not redundant for all compilers. */
												portPRIVILEGE_BIT, /* In effect ( tskIDLE_PRIORITY | portPRIVILEGE_BIT ), but tskIDLE_PRIORITY is zero. */
												pxIdleTaskStackBuffer,
												pxIdleTaskTCBBuffer ); /*lint !e961 MISRA exception, justified as it is not a redundant explicit cast to all supported compilers. */

		if( xIdleTaskHandle != NULL )
 8013720:	4b22      	ldr	r3, [pc, #136]	@ (80137ac <vTaskStartScheduler+0xc8>)
 8013722:	681b      	ldr	r3, [r3, #0]
 8013724:	2b00      	cmp	r3, #0
 8013726:	d002      	beq.n	801372e <vTaskStartScheduler+0x4a>
		{
			xReturn = pdPASS;
 8013728:	2301      	movs	r3, #1
 801372a:	617b      	str	r3, [r7, #20]
 801372c:	e001      	b.n	8013732 <vTaskStartScheduler+0x4e>
		}
		else
		{
			xReturn = pdFAIL;
 801372e:	2300      	movs	r3, #0
 8013730:	617b      	str	r3, [r7, #20]
	}
	#endif /* configSUPPORT_STATIC_ALLOCATION */

	#if ( configUSE_TIMERS == 1 )
	{
		if( xReturn == pdPASS )
 8013732:	697b      	ldr	r3, [r7, #20]
 8013734:	2b01      	cmp	r3, #1
 8013736:	d102      	bne.n	801373e <vTaskStartScheduler+0x5a>
		{
			xReturn = xTimerCreateTimerTask();
 8013738:	f001 f8a0 	bl	801487c <xTimerCreateTimerTask>
 801373c:	6178      	str	r0, [r7, #20]
			mtCOVERAGE_TEST_MARKER();
		}
	}
	#endif /* configUSE_TIMERS */

	if( xReturn == pdPASS )
 801373e:	697b      	ldr	r3, [r7, #20]
 8013740:	2b01      	cmp	r3, #1
 8013742:	d11b      	bne.n	801377c <vTaskStartScheduler+0x98>
	__asm volatile
 8013744:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8013748:	f383 8811 	msr	BASEPRI, r3
 801374c:	f3bf 8f6f 	isb	sy
 8013750:	f3bf 8f4f 	dsb	sy
 8013754:	613b      	str	r3, [r7, #16]
}
 8013756:	bf00      	nop
		{
			/* Switch Newlib's _impure_ptr variable to point to the _reent
			structure specific to the task that will run first.
			See the third party link http://www.nadler.com/embedded/newlibAndFreeRTOS.html
			for additional information. */
			_impure_ptr = &( pxCurrentTCB->xNewLib_reent );
 8013758:	4b15      	ldr	r3, [pc, #84]	@ (80137b0 <vTaskStartScheduler+0xcc>)
 801375a:	681b      	ldr	r3, [r3, #0]
 801375c:	3354      	adds	r3, #84	@ 0x54
 801375e:	4a15      	ldr	r2, [pc, #84]	@ (80137b4 <vTaskStartScheduler+0xd0>)
 8013760:	6013      	str	r3, [r2, #0]
		}
		#endif /* configUSE_NEWLIB_REENTRANT */

		xNextTaskUnblockTime = portMAX_DELAY;
 8013762:	4b15      	ldr	r3, [pc, #84]	@ (80137b8 <vTaskStartScheduler+0xd4>)
 8013764:	f04f 32ff 	mov.w	r2, #4294967295	@ 0xffffffff
 8013768:	601a      	str	r2, [r3, #0]
		xSchedulerRunning = pdTRUE;
 801376a:	4b14      	ldr	r3, [pc, #80]	@ (80137bc <vTaskStartScheduler+0xd8>)
 801376c:	2201      	movs	r2, #1
 801376e:	601a      	str	r2, [r3, #0]
		xTickCount = ( TickType_t ) configINITIAL_TICK_COUNT;
 8013770:	4b13      	ldr	r3, [pc, #76]	@ (80137c0 <vTaskStartScheduler+0xdc>)
 8013772:	2200      	movs	r2, #0
 8013774:	601a      	str	r2, [r3, #0]

		traceTASK_SWITCHED_IN();

		/* Setting up the timer tick is hardware specific and thus in the
		portable interface. */
		if( xPortStartScheduler() != pdFALSE )
 8013776:	f001 fd2b 	bl	80151d0 <xPortStartScheduler>
	}

	/* Prevent compiler warnings if INCLUDE_xTaskGetIdleTaskHandle is set to 0,
	meaning xIdleTaskHandle is not used anywhere else. */
	( void ) xIdleTaskHandle;
}
 801377a:	e00f      	b.n	801379c <vTaskStartScheduler+0xb8>
		configASSERT( xReturn != errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY );
 801377c:	697b      	ldr	r3, [r7, #20]
 801377e:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8013782:	d10b      	bne.n	801379c <vTaskStartScheduler+0xb8>
	__asm volatile
 8013784:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8013788:	f383 8811 	msr	BASEPRI, r3
 801378c:	f3bf 8f6f 	isb	sy
 8013790:	f3bf 8f4f 	dsb	sy
 8013794:	60fb      	str	r3, [r7, #12]
}
 8013796:	bf00      	nop
 8013798:	bf00      	nop
 801379a:	e7fd      	b.n	8013798 <vTaskStartScheduler+0xb4>
}
 801379c:	bf00      	nop
 801379e:	3718      	adds	r7, #24
 80137a0:	46bd      	mov	sp, r7
 80137a2:	bd80      	pop	{r7, pc}
 80137a4:	0802d400 	.word	0x0802d400
 80137a8:	08013e85 	.word	0x08013e85
 80137ac:	24004258 	.word	0x24004258
 80137b0:	24003d60 	.word	0x24003d60
 80137b4:	240001d4 	.word	0x240001d4
 80137b8:	24004254 	.word	0x24004254
 80137bc:	24004240 	.word	0x24004240
 80137c0:	24004238 	.word	0x24004238

080137c4 <vTaskSuspendAll>:
	vPortEndScheduler();
}
/*----------------------------------------------------------*/

void vTaskSuspendAll( void )
{
 80137c4:	b480      	push	{r7}
 80137c6:	af00      	add	r7, sp, #0
	do not otherwise exhibit real time behaviour. */
	portSOFTWARE_BARRIER();

	/* The scheduler is suspended if uxSchedulerSuspended is non-zero.  An increment
	is used to allow calls to vTaskSuspendAll() to nest. */
	++uxSchedulerSuspended;
 80137c8:	4b04      	ldr	r3, [pc, #16]	@ (80137dc <vTaskSuspendAll+0x18>)
 80137ca:	681b      	ldr	r3, [r3, #0]
 80137cc:	3301      	adds	r3, #1
 80137ce:	4a03      	ldr	r2, [pc, #12]	@ (80137dc <vTaskSuspendAll+0x18>)
 80137d0:	6013      	str	r3, [r2, #0]

	/* Enforces ordering for ports and optimised compilers that may otherwise place
	the above increment elsewhere. */
	portMEMORY_BARRIER();
}
 80137d2:	bf00      	nop
 80137d4:	46bd      	mov	sp, r7
 80137d6:	f85d 7b04 	ldr.w	r7, [sp], #4
 80137da:	4770      	bx	lr
 80137dc:	2400425c 	.word	0x2400425c

080137e0 <xTaskResumeAll>:

#endif /* configUSE_TICKLESS_IDLE */
/*----------------------------------------------------------*/

BaseType_t xTaskResumeAll( void )
{
 80137e0:	b580      	push	{r7, lr}
 80137e2:	b084      	sub	sp, #16
 80137e4:	af00      	add	r7, sp, #0
TCB_t *pxTCB = NULL;
 80137e6:	2300      	movs	r3, #0
 80137e8:	60fb      	str	r3, [r7, #12]
BaseType_t xAlreadyYielded = pdFALSE;
 80137ea:	2300      	movs	r3, #0
 80137ec:	60bb      	str	r3, [r7, #8]

	/* If uxSchedulerSuspended is zero then this function does not match a
	previous call to vTaskSuspendAll(). */
	configASSERT( uxSchedulerSuspended );
 80137ee:	4b42      	ldr	r3, [pc, #264]	@ (80138f8 <xTaskResumeAll+0x118>)
 80137f0:	681b      	ldr	r3, [r3, #0]
 80137f2:	2b00      	cmp	r3, #0
 80137f4:	d10b      	bne.n	801380e <xTaskResumeAll+0x2e>
	__asm volatile
 80137f6:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80137fa:	f383 8811 	msr	BASEPRI, r3
 80137fe:	f3bf 8f6f 	isb	sy
 8013802:	f3bf 8f4f 	dsb	sy
 8013806:	603b      	str	r3, [r7, #0]
}
 8013808:	bf00      	nop
 801380a:	bf00      	nop
 801380c:	e7fd      	b.n	801380a <xTaskResumeAll+0x2a>
	/* It is possible that an ISR caused a task to be removed from an event
	list while the scheduler was suspended.  If this was the case then the
	removed task will have been added to the xPendingReadyList.  Once the
	scheduler has been resumed it is safe to move all the pending ready
	tasks from this list into their appropriate ready list. */
	taskENTER_CRITICAL();
 801380e:	f001 fd83 	bl	8015318 <vPortEnterCritical>
	{
		--uxSchedulerSuspended;
 8013812:	4b39      	ldr	r3, [pc, #228]	@ (80138f8 <xTaskResumeAll+0x118>)
 8013814:	681b      	ldr	r3, [r3, #0]
 8013816:	3b01      	subs	r3, #1
 8013818:	4a37      	ldr	r2, [pc, #220]	@ (80138f8 <xTaskResumeAll+0x118>)
 801381a:	6013      	str	r3, [r2, #0]

		if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
 801381c:	4b36      	ldr	r3, [pc, #216]	@ (80138f8 <xTaskResumeAll+0x118>)
 801381e:	681b      	ldr	r3, [r3, #0]
 8013820:	2b00      	cmp	r3, #0
 8013822:	d162      	bne.n	80138ea <xTaskResumeAll+0x10a>
		{
			if( uxCurrentNumberOfTasks > ( UBaseType_t ) 0U )
 8013824:	4b35      	ldr	r3, [pc, #212]	@ (80138fc <xTaskResumeAll+0x11c>)
 8013826:	681b      	ldr	r3, [r3, #0]
 8013828:	2b00      	cmp	r3, #0
 801382a:	d05e      	beq.n	80138ea <xTaskResumeAll+0x10a>
			{
				/* Move any readied tasks from the pending list into the
				appropriate ready list. */
				while( listLIST_IS_EMPTY( &xPendingReadyList ) == pdFALSE )
 801382c:	e02f      	b.n	801388e <xTaskResumeAll+0xae>
				{
					pxTCB = listGET_OWNER_OF_HEAD_ENTRY( ( &xPendingReadyList ) ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
 801382e:	4b34      	ldr	r3, [pc, #208]	@ (8013900 <xTaskResumeAll+0x120>)
 8013830:	68db      	ldr	r3, [r3, #12]
 8013832:	68db      	ldr	r3, [r3, #12]
 8013834:	60fb      	str	r3, [r7, #12]
					( void ) uxListRemove( &( pxTCB->xEventListItem ) );
 8013836:	68fb      	ldr	r3, [r7, #12]
 8013838:	3318      	adds	r3, #24
 801383a:	4618      	mov	r0, r3
 801383c:	f7fe f87a 	bl	8011934 <uxListRemove>
					( void ) uxListRemove( &( pxTCB->xStateListItem ) );
 8013840:	68fb      	ldr	r3, [r7, #12]
 8013842:	3304      	adds	r3, #4
 8013844:	4618      	mov	r0, r3
 8013846:	f7fe f875 	bl	8011934 <uxListRemove>
					prvAddTaskToReadyList( pxTCB );
 801384a:	68fb      	ldr	r3, [r7, #12]
 801384c:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 801384e:	4b2d      	ldr	r3, [pc, #180]	@ (8013904 <xTaskResumeAll+0x124>)
 8013850:	681b      	ldr	r3, [r3, #0]
 8013852:	429a      	cmp	r2, r3
 8013854:	d903      	bls.n	801385e <xTaskResumeAll+0x7e>
 8013856:	68fb      	ldr	r3, [r7, #12]
 8013858:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 801385a:	4a2a      	ldr	r2, [pc, #168]	@ (8013904 <xTaskResumeAll+0x124>)
 801385c:	6013      	str	r3, [r2, #0]
 801385e:	68fb      	ldr	r3, [r7, #12]
 8013860:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8013862:	4613      	mov	r3, r2
 8013864:	009b      	lsls	r3, r3, #2
 8013866:	4413      	add	r3, r2
 8013868:	009b      	lsls	r3, r3, #2
 801386a:	4a27      	ldr	r2, [pc, #156]	@ (8013908 <xTaskResumeAll+0x128>)
 801386c:	441a      	add	r2, r3
 801386e:	68fb      	ldr	r3, [r7, #12]
 8013870:	3304      	adds	r3, #4
 8013872:	4619      	mov	r1, r3
 8013874:	4610      	mov	r0, r2
 8013876:	f7fe f800 	bl	801187a <vListInsertEnd>

					/* If the moved task has a priority higher than the current
					task then a yield must be performed. */
					if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority )
 801387a:	68fb      	ldr	r3, [r7, #12]
 801387c:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 801387e:	4b23      	ldr	r3, [pc, #140]	@ (801390c <xTaskResumeAll+0x12c>)
 8013880:	681b      	ldr	r3, [r3, #0]
 8013882:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8013884:	429a      	cmp	r2, r3
 8013886:	d302      	bcc.n	801388e <xTaskResumeAll+0xae>
					{
						xYieldPending = pdTRUE;
 8013888:	4b21      	ldr	r3, [pc, #132]	@ (8013910 <xTaskResumeAll+0x130>)
 801388a:	2201      	movs	r2, #1
 801388c:	601a      	str	r2, [r3, #0]
				while( listLIST_IS_EMPTY( &xPendingReadyList ) == pdFALSE )
 801388e:	4b1c      	ldr	r3, [pc, #112]	@ (8013900 <xTaskResumeAll+0x120>)
 8013890:	681b      	ldr	r3, [r3, #0]
 8013892:	2b00      	cmp	r3, #0
 8013894:	d1cb      	bne.n	801382e <xTaskResumeAll+0x4e>
					{
						mtCOVERAGE_TEST_MARKER();
					}
				}

				if( pxTCB != NULL )
 8013896:	68fb      	ldr	r3, [r7, #12]
 8013898:	2b00      	cmp	r3, #0
 801389a:	d001      	beq.n	80138a0 <xTaskResumeAll+0xc0>
					which may have prevented the next unblock time from being
					re-calculated, in which case re-calculate it now.  Mainly
					important for low power tickless implementations, where
					this can prevent an unnecessary exit from low power
					state. */
					prvResetNextTaskUnblockTime();
 801389c:	f000 fbae 	bl	8013ffc <prvResetNextTaskUnblockTime>
				/* If any ticks occurred while the scheduler was suspended then
				they should be processed now.  This ensures the tick count does
				not	slip, and that any delayed tasks are resumed at the correct
				time. */
				{
					TickType_t xPendedCounts = xPendedTicks; /* Non-volatile copy. */
 80138a0:	4b1c      	ldr	r3, [pc, #112]	@ (8013914 <xTaskResumeAll+0x134>)
 80138a2:	681b      	ldr	r3, [r3, #0]
 80138a4:	607b      	str	r3, [r7, #4]

					if( xPendedCounts > ( TickType_t ) 0U )
 80138a6:	687b      	ldr	r3, [r7, #4]
 80138a8:	2b00      	cmp	r3, #0
 80138aa:	d010      	beq.n	80138ce <xTaskResumeAll+0xee>
					{
						do
						{
							if( xTaskIncrementTick() != pdFALSE )
 80138ac:	f000 f858 	bl	8013960 <xTaskIncrementTick>
 80138b0:	4603      	mov	r3, r0
 80138b2:	2b00      	cmp	r3, #0
 80138b4:	d002      	beq.n	80138bc <xTaskResumeAll+0xdc>
							{
								xYieldPending = pdTRUE;
 80138b6:	4b16      	ldr	r3, [pc, #88]	@ (8013910 <xTaskResumeAll+0x130>)
 80138b8:	2201      	movs	r2, #1
 80138ba:	601a      	str	r2, [r3, #0]
							}
							else
							{
								mtCOVERAGE_TEST_MARKER();
							}
							--xPendedCounts;
 80138bc:	687b      	ldr	r3, [r7, #4]
 80138be:	3b01      	subs	r3, #1
 80138c0:	607b      	str	r3, [r7, #4]
						} while( xPendedCounts > ( TickType_t ) 0U );
 80138c2:	687b      	ldr	r3, [r7, #4]
 80138c4:	2b00      	cmp	r3, #0
 80138c6:	d1f1      	bne.n	80138ac <xTaskResumeAll+0xcc>

						xPendedTicks = 0;
 80138c8:	4b12      	ldr	r3, [pc, #72]	@ (8013914 <xTaskResumeAll+0x134>)
 80138ca:	2200      	movs	r2, #0
 80138cc:	601a      	str	r2, [r3, #0]
					{
						mtCOVERAGE_TEST_MARKER();
					}
				}

				if( xYieldPending != pdFALSE )
 80138ce:	4b10      	ldr	r3, [pc, #64]	@ (8013910 <xTaskResumeAll+0x130>)
 80138d0:	681b      	ldr	r3, [r3, #0]
 80138d2:	2b00      	cmp	r3, #0
 80138d4:	d009      	beq.n	80138ea <xTaskResumeAll+0x10a>
				{
					#if( configUSE_PREEMPTION != 0 )
					{
						xAlreadyYielded = pdTRUE;
 80138d6:	2301      	movs	r3, #1
 80138d8:	60bb      	str	r3, [r7, #8]
					}
					#endif
					taskYIELD_IF_USING_PREEMPTION();
 80138da:	4b0f      	ldr	r3, [pc, #60]	@ (8013918 <xTaskResumeAll+0x138>)
 80138dc:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 80138e0:	601a      	str	r2, [r3, #0]
 80138e2:	f3bf 8f4f 	dsb	sy
 80138e6:	f3bf 8f6f 	isb	sy
		else
		{
			mtCOVERAGE_TEST_MARKER();
		}
	}
	taskEXIT_CRITICAL();
 80138ea:	f001 fd47 	bl	801537c <vPortExitCritical>

	return xAlreadyYielded;
 80138ee:	68bb      	ldr	r3, [r7, #8]
}
 80138f0:	4618      	mov	r0, r3
 80138f2:	3710      	adds	r7, #16
 80138f4:	46bd      	mov	sp, r7
 80138f6:	bd80      	pop	{r7, pc}
 80138f8:	2400425c 	.word	0x2400425c
 80138fc:	24004234 	.word	0x24004234
 8013900:	240041f4 	.word	0x240041f4
 8013904:	2400423c 	.word	0x2400423c
 8013908:	24003d64 	.word	0x24003d64
 801390c:	24003d60 	.word	0x24003d60
 8013910:	24004248 	.word	0x24004248
 8013914:	24004244 	.word	0x24004244
 8013918:	e000ed04 	.word	0xe000ed04

0801391c <xTaskGetTickCount>:
/*-----------------------------------------------------------*/

TickType_t xTaskGetTickCount( void )
{
 801391c:	b480      	push	{r7}
 801391e:	b083      	sub	sp, #12
 8013920:	af00      	add	r7, sp, #0
TickType_t xTicks;

	/* Critical section required if running on a 16 bit processor. */
	portTICK_TYPE_ENTER_CRITICAL();
	{
		xTicks = xTickCount;
 8013922:	4b05      	ldr	r3, [pc, #20]	@ (8013938 <xTaskGetTickCount+0x1c>)
 8013924:	681b      	ldr	r3, [r3, #0]
 8013926:	607b      	str	r3, [r7, #4]
	}
	portTICK_TYPE_EXIT_CRITICAL();

	return xTicks;
 8013928:	687b      	ldr	r3, [r7, #4]
}
 801392a:	4618      	mov	r0, r3
 801392c:	370c      	adds	r7, #12
 801392e:	46bd      	mov	sp, r7
 8013930:	f85d 7b04 	ldr.w	r7, [sp], #4
 8013934:	4770      	bx	lr
 8013936:	bf00      	nop
 8013938:	24004238 	.word	0x24004238

0801393c <xTaskGetTickCountFromISR>:
/*-----------------------------------------------------------*/

TickType_t xTaskGetTickCountFromISR( void )
{
 801393c:	b580      	push	{r7, lr}
 801393e:	b082      	sub	sp, #8
 8013940:	af00      	add	r7, sp, #0
	that have been assigned a priority at or (logically) below the maximum
	system call	interrupt priority.  FreeRTOS maintains a separate interrupt
	safe API to ensure interrupt entry is as fast and as simple as possible.
	More information (albeit Cortex-M specific) is provided on the following
	link: https://www.freertos.org/RTOS-Cortex-M3-M4.html */
	portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
 8013942:	f001 fdc9 	bl	80154d8 <vPortValidateInterruptPriority>

	uxSavedInterruptStatus = portTICK_TYPE_SET_INTERRUPT_MASK_FROM_ISR();
 8013946:	2300      	movs	r3, #0
 8013948:	607b      	str	r3, [r7, #4]
	{
		xReturn = xTickCount;
 801394a:	4b04      	ldr	r3, [pc, #16]	@ (801395c <xTaskGetTickCountFromISR+0x20>)
 801394c:	681b      	ldr	r3, [r3, #0]
 801394e:	603b      	str	r3, [r7, #0]
	}
	portTICK_TYPE_CLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );

	return xReturn;
 8013950:	683b      	ldr	r3, [r7, #0]
}
 8013952:	4618      	mov	r0, r3
 8013954:	3708      	adds	r7, #8
 8013956:	46bd      	mov	sp, r7
 8013958:	bd80      	pop	{r7, pc}
 801395a:	bf00      	nop
 801395c:	24004238 	.word	0x24004238

08013960 <xTaskIncrementTick>:

#endif /* INCLUDE_xTaskAbortDelay */
/*----------------------------------------------------------*/

BaseType_t xTaskIncrementTick( void )
{
 8013960:	b580      	push	{r7, lr}
 8013962:	b086      	sub	sp, #24
 8013964:	af00      	add	r7, sp, #0
TCB_t * pxTCB;
TickType_t xItemValue;
BaseType_t xSwitchRequired = pdFALSE;
 8013966:	2300      	movs	r3, #0
 8013968:	617b      	str	r3, [r7, #20]

	/* Called by the portable layer each time a tick interrupt occurs.
	Increments the tick then checks to see if the new tick value will cause any
	tasks to be unblocked. */
	traceTASK_INCREMENT_TICK( xTickCount );
	if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
 801396a:	4b4f      	ldr	r3, [pc, #316]	@ (8013aa8 <xTaskIncrementTick+0x148>)
 801396c:	681b      	ldr	r3, [r3, #0]
 801396e:	2b00      	cmp	r3, #0
 8013970:	f040 8090 	bne.w	8013a94 <xTaskIncrementTick+0x134>
	{
		/* Minor optimisation.  The tick count cannot change in this
		block. */
		const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
 8013974:	4b4d      	ldr	r3, [pc, #308]	@ (8013aac <xTaskIncrementTick+0x14c>)
 8013976:	681b      	ldr	r3, [r3, #0]
 8013978:	3301      	adds	r3, #1
 801397a:	613b      	str	r3, [r7, #16]

		/* Increment the RTOS tick, switching the delayed and overflowed
		delayed lists if it wraps to 0. */
		xTickCount = xConstTickCount;
 801397c:	4a4b      	ldr	r2, [pc, #300]	@ (8013aac <xTaskIncrementTick+0x14c>)
 801397e:	693b      	ldr	r3, [r7, #16]
 8013980:	6013      	str	r3, [r2, #0]

		if( xConstTickCount == ( TickType_t ) 0U ) /*lint !e774 'if' does not always evaluate to false as it is looking for an overflow. */
 8013982:	693b      	ldr	r3, [r7, #16]
 8013984:	2b00      	cmp	r3, #0
 8013986:	d121      	bne.n	80139cc <xTaskIncrementTick+0x6c>
		{
			taskSWITCH_DELAYED_LISTS();
 8013988:	4b49      	ldr	r3, [pc, #292]	@ (8013ab0 <xTaskIncrementTick+0x150>)
 801398a:	681b      	ldr	r3, [r3, #0]
 801398c:	681b      	ldr	r3, [r3, #0]
 801398e:	2b00      	cmp	r3, #0
 8013990:	d00b      	beq.n	80139aa <xTaskIncrementTick+0x4a>
	__asm volatile
 8013992:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8013996:	f383 8811 	msr	BASEPRI, r3
 801399a:	f3bf 8f6f 	isb	sy
 801399e:	f3bf 8f4f 	dsb	sy
 80139a2:	603b      	str	r3, [r7, #0]
}
 80139a4:	bf00      	nop
 80139a6:	bf00      	nop
 80139a8:	e7fd      	b.n	80139a6 <xTaskIncrementTick+0x46>
 80139aa:	4b41      	ldr	r3, [pc, #260]	@ (8013ab0 <xTaskIncrementTick+0x150>)
 80139ac:	681b      	ldr	r3, [r3, #0]
 80139ae:	60fb      	str	r3, [r7, #12]
 80139b0:	4b40      	ldr	r3, [pc, #256]	@ (8013ab4 <xTaskIncrementTick+0x154>)
 80139b2:	681b      	ldr	r3, [r3, #0]
 80139b4:	4a3e      	ldr	r2, [pc, #248]	@ (8013ab0 <xTaskIncrementTick+0x150>)
 80139b6:	6013      	str	r3, [r2, #0]
 80139b8:	4a3e      	ldr	r2, [pc, #248]	@ (8013ab4 <xTaskIncrementTick+0x154>)
 80139ba:	68fb      	ldr	r3, [r7, #12]
 80139bc:	6013      	str	r3, [r2, #0]
 80139be:	4b3e      	ldr	r3, [pc, #248]	@ (8013ab8 <xTaskIncrementTick+0x158>)
 80139c0:	681b      	ldr	r3, [r3, #0]
 80139c2:	3301      	adds	r3, #1
 80139c4:	4a3c      	ldr	r2, [pc, #240]	@ (8013ab8 <xTaskIncrementTick+0x158>)
 80139c6:	6013      	str	r3, [r2, #0]
 80139c8:	f000 fb18 	bl	8013ffc <prvResetNextTaskUnblockTime>

		/* See if this tick has made a timeout expire.  Tasks are stored in
		the	queue in the order of their wake time - meaning once one task
		has been found whose block time has not expired there is no need to
		look any further down the list. */
		if( xConstTickCount >= xNextTaskUnblockTime )
 80139cc:	4b3b      	ldr	r3, [pc, #236]	@ (8013abc <xTaskIncrementTick+0x15c>)
 80139ce:	681b      	ldr	r3, [r3, #0]
 80139d0:	693a      	ldr	r2, [r7, #16]
 80139d2:	429a      	cmp	r2, r3
 80139d4:	d349      	bcc.n	8013a6a <xTaskIncrementTick+0x10a>
		{
			for( ;; )
			{
				if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )
 80139d6:	4b36      	ldr	r3, [pc, #216]	@ (8013ab0 <xTaskIncrementTick+0x150>)
 80139d8:	681b      	ldr	r3, [r3, #0]
 80139da:	681b      	ldr	r3, [r3, #0]
 80139dc:	2b00      	cmp	r3, #0
 80139de:	d104      	bne.n	80139ea <xTaskIncrementTick+0x8a>
					/* The delayed list is empty.  Set xNextTaskUnblockTime
					to the maximum possible value so it is extremely
					unlikely that the
					if( xTickCount >= xNextTaskUnblockTime ) test will pass
					next time through. */
					xNextTaskUnblockTime = portMAX_DELAY; /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
 80139e0:	4b36      	ldr	r3, [pc, #216]	@ (8013abc <xTaskIncrementTick+0x15c>)
 80139e2:	f04f 32ff 	mov.w	r2, #4294967295	@ 0xffffffff
 80139e6:	601a      	str	r2, [r3, #0]
					break;
 80139e8:	e03f      	b.n	8013a6a <xTaskIncrementTick+0x10a>
				{
					/* The delayed list is not empty, get the value of the
					item at the head of the delayed list.  This is the time
					at which the task at the head of the delayed list must
					be removed from the Blocked state. */
					pxTCB = listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
 80139ea:	4b31      	ldr	r3, [pc, #196]	@ (8013ab0 <xTaskIncrementTick+0x150>)
 80139ec:	681b      	ldr	r3, [r3, #0]
 80139ee:	68db      	ldr	r3, [r3, #12]
 80139f0:	68db      	ldr	r3, [r3, #12]
 80139f2:	60bb      	str	r3, [r7, #8]
					xItemValue = listGET_LIST_ITEM_VALUE( &( pxTCB->xStateListItem ) );
 80139f4:	68bb      	ldr	r3, [r7, #8]
 80139f6:	685b      	ldr	r3, [r3, #4]
 80139f8:	607b      	str	r3, [r7, #4]

					if( xConstTickCount < xItemValue )
 80139fa:	693a      	ldr	r2, [r7, #16]
 80139fc:	687b      	ldr	r3, [r7, #4]
 80139fe:	429a      	cmp	r2, r3
 8013a00:	d203      	bcs.n	8013a0a <xTaskIncrementTick+0xaa>
						/* It is not time to unblock this item yet, but the
						item value is the time at which the task at the head
						of the blocked list must be removed from the Blocked
						state -	so record the item value in
						xNextTaskUnblockTime. */
						xNextTaskUnblockTime = xItemValue;
 8013a02:	4a2e      	ldr	r2, [pc, #184]	@ (8013abc <xTaskIncrementTick+0x15c>)
 8013a04:	687b      	ldr	r3, [r7, #4]
 8013a06:	6013      	str	r3, [r2, #0]
						break; /*lint !e9011 Code structure here is deedmed easier to understand with multiple breaks. */
 8013a08:	e02f      	b.n	8013a6a <xTaskIncrementTick+0x10a>
					{
						mtCOVERAGE_TEST_MARKER();
					}

					/* It is time to remove the item from the Blocked state. */
					( void ) uxListRemove( &( pxTCB->xStateListItem ) );
 8013a0a:	68bb      	ldr	r3, [r7, #8]
 8013a0c:	3304      	adds	r3, #4
 8013a0e:	4618      	mov	r0, r3
 8013a10:	f7fd ff90 	bl	8011934 <uxListRemove>

					/* Is the task waiting on an event also?  If so remove
					it from the event list. */
					if( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) != NULL )
 8013a14:	68bb      	ldr	r3, [r7, #8]
 8013a16:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 8013a18:	2b00      	cmp	r3, #0
 8013a1a:	d004      	beq.n	8013a26 <xTaskIncrementTick+0xc6>
					{
						( void ) uxListRemove( &( pxTCB->xEventListItem ) );
 8013a1c:	68bb      	ldr	r3, [r7, #8]
 8013a1e:	3318      	adds	r3, #24
 8013a20:	4618      	mov	r0, r3
 8013a22:	f7fd ff87 	bl	8011934 <uxListRemove>
						mtCOVERAGE_TEST_MARKER();
					}

					/* Place the unblocked task into the appropriate ready
					list. */
					prvAddTaskToReadyList( pxTCB );
 8013a26:	68bb      	ldr	r3, [r7, #8]
 8013a28:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8013a2a:	4b25      	ldr	r3, [pc, #148]	@ (8013ac0 <xTaskIncrementTick+0x160>)
 8013a2c:	681b      	ldr	r3, [r3, #0]
 8013a2e:	429a      	cmp	r2, r3
 8013a30:	d903      	bls.n	8013a3a <xTaskIncrementTick+0xda>
 8013a32:	68bb      	ldr	r3, [r7, #8]
 8013a34:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8013a36:	4a22      	ldr	r2, [pc, #136]	@ (8013ac0 <xTaskIncrementTick+0x160>)
 8013a38:	6013      	str	r3, [r2, #0]
 8013a3a:	68bb      	ldr	r3, [r7, #8]
 8013a3c:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8013a3e:	4613      	mov	r3, r2
 8013a40:	009b      	lsls	r3, r3, #2
 8013a42:	4413      	add	r3, r2
 8013a44:	009b      	lsls	r3, r3, #2
 8013a46:	4a1f      	ldr	r2, [pc, #124]	@ (8013ac4 <xTaskIncrementTick+0x164>)
 8013a48:	441a      	add	r2, r3
 8013a4a:	68bb      	ldr	r3, [r7, #8]
 8013a4c:	3304      	adds	r3, #4
 8013a4e:	4619      	mov	r1, r3
 8013a50:	4610      	mov	r0, r2
 8013a52:	f7fd ff12 	bl	801187a <vListInsertEnd>
					{
						/* Preemption is on, but a context switch should
						only be performed if the unblocked task has a
						priority that is equal to or higher than the
						currently executing task. */
						if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority )
 8013a56:	68bb      	ldr	r3, [r7, #8]
 8013a58:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8013a5a:	4b1b      	ldr	r3, [pc, #108]	@ (8013ac8 <xTaskIncrementTick+0x168>)
 8013a5c:	681b      	ldr	r3, [r3, #0]
 8013a5e:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8013a60:	429a      	cmp	r2, r3
 8013a62:	d3b8      	bcc.n	80139d6 <xTaskIncrementTick+0x76>
						{
							xSwitchRequired = pdTRUE;
 8013a64:	2301      	movs	r3, #1
 8013a66:	617b      	str	r3, [r7, #20]
				if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )
 8013a68:	e7b5      	b.n	80139d6 <xTaskIncrementTick+0x76>
		/* Tasks of equal priority to the currently running task will share
		processing time (time slice) if preemption is on, and the application
		writer has not explicitly turned time slicing off. */
		#if ( ( configUSE_PREEMPTION == 1 ) && ( configUSE_TIME_SLICING == 1 ) )
		{
			if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ pxCurrentTCB->uxPriority ] ) ) > ( UBaseType_t ) 1 )
 8013a6a:	4b17      	ldr	r3, [pc, #92]	@ (8013ac8 <xTaskIncrementTick+0x168>)
 8013a6c:	681b      	ldr	r3, [r3, #0]
 8013a6e:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8013a70:	4914      	ldr	r1, [pc, #80]	@ (8013ac4 <xTaskIncrementTick+0x164>)
 8013a72:	4613      	mov	r3, r2
 8013a74:	009b      	lsls	r3, r3, #2
 8013a76:	4413      	add	r3, r2
 8013a78:	009b      	lsls	r3, r3, #2
 8013a7a:	440b      	add	r3, r1
 8013a7c:	681b      	ldr	r3, [r3, #0]
 8013a7e:	2b01      	cmp	r3, #1
 8013a80:	d901      	bls.n	8013a86 <xTaskIncrementTick+0x126>
			{
				xSwitchRequired = pdTRUE;
 8013a82:	2301      	movs	r3, #1
 8013a84:	617b      	str	r3, [r7, #20]
		}
		#endif /* configUSE_TICK_HOOK */

		#if ( configUSE_PREEMPTION == 1 )
		{
			if( xYieldPending != pdFALSE )
 8013a86:	4b11      	ldr	r3, [pc, #68]	@ (8013acc <xTaskIncrementTick+0x16c>)
 8013a88:	681b      	ldr	r3, [r3, #0]
 8013a8a:	2b00      	cmp	r3, #0
 8013a8c:	d007      	beq.n	8013a9e <xTaskIncrementTick+0x13e>
			{
				xSwitchRequired = pdTRUE;
 8013a8e:	2301      	movs	r3, #1
 8013a90:	617b      	str	r3, [r7, #20]
 8013a92:	e004      	b.n	8013a9e <xTaskIncrementTick+0x13e>
		}
		#endif /* configUSE_PREEMPTION */
	}
	else
	{
		++xPendedTicks;
 8013a94:	4b0e      	ldr	r3, [pc, #56]	@ (8013ad0 <xTaskIncrementTick+0x170>)
 8013a96:	681b      	ldr	r3, [r3, #0]
 8013a98:	3301      	adds	r3, #1
 8013a9a:	4a0d      	ldr	r2, [pc, #52]	@ (8013ad0 <xTaskIncrementTick+0x170>)
 8013a9c:	6013      	str	r3, [r2, #0]
			vApplicationTickHook();
		}
		#endif
	}

	return xSwitchRequired;
 8013a9e:	697b      	ldr	r3, [r7, #20]
}
 8013aa0:	4618      	mov	r0, r3
 8013aa2:	3718      	adds	r7, #24
 8013aa4:	46bd      	mov	sp, r7
 8013aa6:	bd80      	pop	{r7, pc}
 8013aa8:	2400425c 	.word	0x2400425c
 8013aac:	24004238 	.word	0x24004238
 8013ab0:	240041ec 	.word	0x240041ec
 8013ab4:	240041f0 	.word	0x240041f0
 8013ab8:	2400424c 	.word	0x2400424c
 8013abc:	24004254 	.word	0x24004254
 8013ac0:	2400423c 	.word	0x2400423c
 8013ac4:	24003d64 	.word	0x24003d64
 8013ac8:	24003d60 	.word	0x24003d60
 8013acc:	24004248 	.word	0x24004248
 8013ad0:	24004244 	.word	0x24004244

08013ad4 <vTaskSwitchContext>:

#endif /* configUSE_APPLICATION_TASK_TAG */
/*-----------------------------------------------------------*/

void vTaskSwitchContext( void )
{
 8013ad4:	b580      	push	{r7, lr}
 8013ad6:	b084      	sub	sp, #16
 8013ad8:	af00      	add	r7, sp, #0
	if( uxSchedulerSuspended != ( UBaseType_t ) pdFALSE )
 8013ada:	4b32      	ldr	r3, [pc, #200]	@ (8013ba4 <vTaskSwitchContext+0xd0>)
 8013adc:	681b      	ldr	r3, [r3, #0]
 8013ade:	2b00      	cmp	r3, #0
 8013ae0:	d003      	beq.n	8013aea <vTaskSwitchContext+0x16>
	{
		/* The scheduler is currently suspended - do not allow a context
		switch. */
		xYieldPending = pdTRUE;
 8013ae2:	4b31      	ldr	r3, [pc, #196]	@ (8013ba8 <vTaskSwitchContext+0xd4>)
 8013ae4:	2201      	movs	r2, #1
 8013ae6:	601a      	str	r2, [r3, #0]
			for additional information. */
			_impure_ptr = &( pxCurrentTCB->xNewLib_reent );
		}
		#endif /* configUSE_NEWLIB_REENTRANT */
	}
}
 8013ae8:	e058      	b.n	8013b9c <vTaskSwitchContext+0xc8>
		xYieldPending = pdFALSE;
 8013aea:	4b2f      	ldr	r3, [pc, #188]	@ (8013ba8 <vTaskSwitchContext+0xd4>)
 8013aec:	2200      	movs	r2, #0
 8013aee:	601a      	str	r2, [r3, #0]
		taskCHECK_FOR_STACK_OVERFLOW();
 8013af0:	4b2e      	ldr	r3, [pc, #184]	@ (8013bac <vTaskSwitchContext+0xd8>)
 8013af2:	681b      	ldr	r3, [r3, #0]
 8013af4:	681a      	ldr	r2, [r3, #0]
 8013af6:	4b2d      	ldr	r3, [pc, #180]	@ (8013bac <vTaskSwitchContext+0xd8>)
 8013af8:	681b      	ldr	r3, [r3, #0]
 8013afa:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8013afc:	429a      	cmp	r2, r3
 8013afe:	d808      	bhi.n	8013b12 <vTaskSwitchContext+0x3e>
 8013b00:	4b2a      	ldr	r3, [pc, #168]	@ (8013bac <vTaskSwitchContext+0xd8>)
 8013b02:	681a      	ldr	r2, [r3, #0]
 8013b04:	4b29      	ldr	r3, [pc, #164]	@ (8013bac <vTaskSwitchContext+0xd8>)
 8013b06:	681b      	ldr	r3, [r3, #0]
 8013b08:	3334      	adds	r3, #52	@ 0x34
 8013b0a:	4619      	mov	r1, r3
 8013b0c:	4610      	mov	r0, r2
 8013b0e:	f7ee f8c8 	bl	8001ca2 <vApplicationStackOverflowHook>
		taskSELECT_HIGHEST_PRIORITY_TASK(); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
 8013b12:	4b27      	ldr	r3, [pc, #156]	@ (8013bb0 <vTaskSwitchContext+0xdc>)
 8013b14:	681b      	ldr	r3, [r3, #0]
 8013b16:	60fb      	str	r3, [r7, #12]
 8013b18:	e011      	b.n	8013b3e <vTaskSwitchContext+0x6a>
 8013b1a:	68fb      	ldr	r3, [r7, #12]
 8013b1c:	2b00      	cmp	r3, #0
 8013b1e:	d10b      	bne.n	8013b38 <vTaskSwitchContext+0x64>
	__asm volatile
 8013b20:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8013b24:	f383 8811 	msr	BASEPRI, r3
 8013b28:	f3bf 8f6f 	isb	sy
 8013b2c:	f3bf 8f4f 	dsb	sy
 8013b30:	607b      	str	r3, [r7, #4]
}
 8013b32:	bf00      	nop
 8013b34:	bf00      	nop
 8013b36:	e7fd      	b.n	8013b34 <vTaskSwitchContext+0x60>
 8013b38:	68fb      	ldr	r3, [r7, #12]
 8013b3a:	3b01      	subs	r3, #1
 8013b3c:	60fb      	str	r3, [r7, #12]
 8013b3e:	491d      	ldr	r1, [pc, #116]	@ (8013bb4 <vTaskSwitchContext+0xe0>)
 8013b40:	68fa      	ldr	r2, [r7, #12]
 8013b42:	4613      	mov	r3, r2
 8013b44:	009b      	lsls	r3, r3, #2
 8013b46:	4413      	add	r3, r2
 8013b48:	009b      	lsls	r3, r3, #2
 8013b4a:	440b      	add	r3, r1
 8013b4c:	681b      	ldr	r3, [r3, #0]
 8013b4e:	2b00      	cmp	r3, #0
 8013b50:	d0e3      	beq.n	8013b1a <vTaskSwitchContext+0x46>
 8013b52:	68fa      	ldr	r2, [r7, #12]
 8013b54:	4613      	mov	r3, r2
 8013b56:	009b      	lsls	r3, r3, #2
 8013b58:	4413      	add	r3, r2
 8013b5a:	009b      	lsls	r3, r3, #2
 8013b5c:	4a15      	ldr	r2, [pc, #84]	@ (8013bb4 <vTaskSwitchContext+0xe0>)
 8013b5e:	4413      	add	r3, r2
 8013b60:	60bb      	str	r3, [r7, #8]
 8013b62:	68bb      	ldr	r3, [r7, #8]
 8013b64:	685b      	ldr	r3, [r3, #4]
 8013b66:	685a      	ldr	r2, [r3, #4]
 8013b68:	68bb      	ldr	r3, [r7, #8]
 8013b6a:	605a      	str	r2, [r3, #4]
 8013b6c:	68bb      	ldr	r3, [r7, #8]
 8013b6e:	685a      	ldr	r2, [r3, #4]
 8013b70:	68bb      	ldr	r3, [r7, #8]
 8013b72:	3308      	adds	r3, #8
 8013b74:	429a      	cmp	r2, r3
 8013b76:	d104      	bne.n	8013b82 <vTaskSwitchContext+0xae>
 8013b78:	68bb      	ldr	r3, [r7, #8]
 8013b7a:	685b      	ldr	r3, [r3, #4]
 8013b7c:	685a      	ldr	r2, [r3, #4]
 8013b7e:	68bb      	ldr	r3, [r7, #8]
 8013b80:	605a      	str	r2, [r3, #4]
 8013b82:	68bb      	ldr	r3, [r7, #8]
 8013b84:	685b      	ldr	r3, [r3, #4]
 8013b86:	68db      	ldr	r3, [r3, #12]
 8013b88:	4a08      	ldr	r2, [pc, #32]	@ (8013bac <vTaskSwitchContext+0xd8>)
 8013b8a:	6013      	str	r3, [r2, #0]
 8013b8c:	4a08      	ldr	r2, [pc, #32]	@ (8013bb0 <vTaskSwitchContext+0xdc>)
 8013b8e:	68fb      	ldr	r3, [r7, #12]
 8013b90:	6013      	str	r3, [r2, #0]
			_impure_ptr = &( pxCurrentTCB->xNewLib_reent );
 8013b92:	4b06      	ldr	r3, [pc, #24]	@ (8013bac <vTaskSwitchContext+0xd8>)
 8013b94:	681b      	ldr	r3, [r3, #0]
 8013b96:	3354      	adds	r3, #84	@ 0x54
 8013b98:	4a07      	ldr	r2, [pc, #28]	@ (8013bb8 <vTaskSwitchContext+0xe4>)
 8013b9a:	6013      	str	r3, [r2, #0]
}
 8013b9c:	bf00      	nop
 8013b9e:	3710      	adds	r7, #16
 8013ba0:	46bd      	mov	sp, r7
 8013ba2:	bd80      	pop	{r7, pc}
 8013ba4:	2400425c 	.word	0x2400425c
 8013ba8:	24004248 	.word	0x24004248
 8013bac:	24003d60 	.word	0x24003d60
 8013bb0:	2400423c 	.word	0x2400423c
 8013bb4:	24003d64 	.word	0x24003d64
 8013bb8:	240001d4 	.word	0x240001d4

08013bbc <vTaskPlaceOnEventList>:
/*-----------------------------------------------------------*/

void vTaskPlaceOnEventList( List_t * const pxEventList, const TickType_t xTicksToWait )
{
 8013bbc:	b580      	push	{r7, lr}
 8013bbe:	b084      	sub	sp, #16
 8013bc0:	af00      	add	r7, sp, #0
 8013bc2:	6078      	str	r0, [r7, #4]
 8013bc4:	6039      	str	r1, [r7, #0]
	configASSERT( pxEventList );
 8013bc6:	687b      	ldr	r3, [r7, #4]
 8013bc8:	2b00      	cmp	r3, #0
 8013bca:	d10b      	bne.n	8013be4 <vTaskPlaceOnEventList+0x28>
	__asm volatile
 8013bcc:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8013bd0:	f383 8811 	msr	BASEPRI, r3
 8013bd4:	f3bf 8f6f 	isb	sy
 8013bd8:	f3bf 8f4f 	dsb	sy
 8013bdc:	60fb      	str	r3, [r7, #12]
}
 8013bde:	bf00      	nop
 8013be0:	bf00      	nop
 8013be2:	e7fd      	b.n	8013be0 <vTaskPlaceOnEventList+0x24>

	/* Place the event list item of the TCB in the appropriate event list.
	This is placed in the list in priority order so the highest priority task
	is the first to be woken by the event.  The queue that contains the event
	list is locked, preventing simultaneous access from interrupts. */
	vListInsert( pxEventList, &( pxCurrentTCB->xEventListItem ) );
 8013be4:	4b07      	ldr	r3, [pc, #28]	@ (8013c04 <vTaskPlaceOnEventList+0x48>)
 8013be6:	681b      	ldr	r3, [r3, #0]
 8013be8:	3318      	adds	r3, #24
 8013bea:	4619      	mov	r1, r3
 8013bec:	6878      	ldr	r0, [r7, #4]
 8013bee:	f7fd fe68 	bl	80118c2 <vListInsert>

	prvAddCurrentTaskToDelayedList( xTicksToWait, pdTRUE );
 8013bf2:	2101      	movs	r1, #1
 8013bf4:	6838      	ldr	r0, [r7, #0]
 8013bf6:	f000 fded 	bl	80147d4 <prvAddCurrentTaskToDelayedList>
}
 8013bfa:	bf00      	nop
 8013bfc:	3710      	adds	r7, #16
 8013bfe:	46bd      	mov	sp, r7
 8013c00:	bd80      	pop	{r7, pc}
 8013c02:	bf00      	nop
 8013c04:	24003d60 	.word	0x24003d60

08013c08 <vTaskPlaceOnEventListRestricted>:
/*-----------------------------------------------------------*/

#if( configUSE_TIMERS == 1 )

	void vTaskPlaceOnEventListRestricted( List_t * const pxEventList, TickType_t xTicksToWait, const BaseType_t xWaitIndefinitely )
	{
 8013c08:	b580      	push	{r7, lr}
 8013c0a:	b086      	sub	sp, #24
 8013c0c:	af00      	add	r7, sp, #0
 8013c0e:	60f8      	str	r0, [r7, #12]
 8013c10:	60b9      	str	r1, [r7, #8]
 8013c12:	607a      	str	r2, [r7, #4]
		configASSERT( pxEventList );
 8013c14:	68fb      	ldr	r3, [r7, #12]
 8013c16:	2b00      	cmp	r3, #0
 8013c18:	d10b      	bne.n	8013c32 <vTaskPlaceOnEventListRestricted+0x2a>
	__asm volatile
 8013c1a:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8013c1e:	f383 8811 	msr	BASEPRI, r3
 8013c22:	f3bf 8f6f 	isb	sy
 8013c26:	f3bf 8f4f 	dsb	sy
 8013c2a:	617b      	str	r3, [r7, #20]
}
 8013c2c:	bf00      	nop
 8013c2e:	bf00      	nop
 8013c30:	e7fd      	b.n	8013c2e <vTaskPlaceOnEventListRestricted+0x26>

		/* Place the event list item of the TCB in the appropriate event list.
		In this case it is assume that this is the only task that is going to
		be waiting on this event list, so the faster vListInsertEnd() function
		can be used in place of vListInsert. */
		vListInsertEnd( pxEventList, &( pxCurrentTCB->xEventListItem ) );
 8013c32:	4b0a      	ldr	r3, [pc, #40]	@ (8013c5c <vTaskPlaceOnEventListRestricted+0x54>)
 8013c34:	681b      	ldr	r3, [r3, #0]
 8013c36:	3318      	adds	r3, #24
 8013c38:	4619      	mov	r1, r3
 8013c3a:	68f8      	ldr	r0, [r7, #12]
 8013c3c:	f7fd fe1d 	bl	801187a <vListInsertEnd>

		/* If the task should block indefinitely then set the block time to a
		value that will be recognised as an indefinite delay inside the
		prvAddCurrentTaskToDelayedList() function. */
		if( xWaitIndefinitely != pdFALSE )
 8013c40:	687b      	ldr	r3, [r7, #4]
 8013c42:	2b00      	cmp	r3, #0
 8013c44:	d002      	beq.n	8013c4c <vTaskPlaceOnEventListRestricted+0x44>
		{
			xTicksToWait = portMAX_DELAY;
 8013c46:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8013c4a:	60bb      	str	r3, [r7, #8]
		}

		traceTASK_DELAY_UNTIL( ( xTickCount + xTicksToWait ) );
		prvAddCurrentTaskToDelayedList( xTicksToWait, xWaitIndefinitely );
 8013c4c:	6879      	ldr	r1, [r7, #4]
 8013c4e:	68b8      	ldr	r0, [r7, #8]
 8013c50:	f000 fdc0 	bl	80147d4 <prvAddCurrentTaskToDelayedList>
	}
 8013c54:	bf00      	nop
 8013c56:	3718      	adds	r7, #24
 8013c58:	46bd      	mov	sp, r7
 8013c5a:	bd80      	pop	{r7, pc}
 8013c5c:	24003d60 	.word	0x24003d60

08013c60 <xTaskRemoveFromEventList>:

#endif /* configUSE_TIMERS */
/*-----------------------------------------------------------*/

BaseType_t xTaskRemoveFromEventList( const List_t * const pxEventList )
{
 8013c60:	b580      	push	{r7, lr}
 8013c62:	b086      	sub	sp, #24
 8013c64:	af00      	add	r7, sp, #0
 8013c66:	6078      	str	r0, [r7, #4]
	get called - the lock count on the queue will get modified instead.  This
	means exclusive access to the event list is guaranteed here.

	This function assumes that a check has already been made to ensure that
	pxEventList is not empty. */
	pxUnblockedTCB = listGET_OWNER_OF_HEAD_ENTRY( pxEventList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
 8013c68:	687b      	ldr	r3, [r7, #4]
 8013c6a:	68db      	ldr	r3, [r3, #12]
 8013c6c:	68db      	ldr	r3, [r3, #12]
 8013c6e:	613b      	str	r3, [r7, #16]
	configASSERT( pxUnblockedTCB );
 8013c70:	693b      	ldr	r3, [r7, #16]
 8013c72:	2b00      	cmp	r3, #0
 8013c74:	d10b      	bne.n	8013c8e <xTaskRemoveFromEventList+0x2e>
	__asm volatile
 8013c76:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8013c7a:	f383 8811 	msr	BASEPRI, r3
 8013c7e:	f3bf 8f6f 	isb	sy
 8013c82:	f3bf 8f4f 	dsb	sy
 8013c86:	60fb      	str	r3, [r7, #12]
}
 8013c88:	bf00      	nop
 8013c8a:	bf00      	nop
 8013c8c:	e7fd      	b.n	8013c8a <xTaskRemoveFromEventList+0x2a>
	( void ) uxListRemove( &( pxUnblockedTCB->xEventListItem ) );
 8013c8e:	693b      	ldr	r3, [r7, #16]
 8013c90:	3318      	adds	r3, #24
 8013c92:	4618      	mov	r0, r3
 8013c94:	f7fd fe4e 	bl	8011934 <uxListRemove>

	if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
 8013c98:	4b1d      	ldr	r3, [pc, #116]	@ (8013d10 <xTaskRemoveFromEventList+0xb0>)
 8013c9a:	681b      	ldr	r3, [r3, #0]
 8013c9c:	2b00      	cmp	r3, #0
 8013c9e:	d11d      	bne.n	8013cdc <xTaskRemoveFromEventList+0x7c>
	{
		( void ) uxListRemove( &( pxUnblockedTCB->xStateListItem ) );
 8013ca0:	693b      	ldr	r3, [r7, #16]
 8013ca2:	3304      	adds	r3, #4
 8013ca4:	4618      	mov	r0, r3
 8013ca6:	f7fd fe45 	bl	8011934 <uxListRemove>
		prvAddTaskToReadyList( pxUnblockedTCB );
 8013caa:	693b      	ldr	r3, [r7, #16]
 8013cac:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8013cae:	4b19      	ldr	r3, [pc, #100]	@ (8013d14 <xTaskRemoveFromEventList+0xb4>)
 8013cb0:	681b      	ldr	r3, [r3, #0]
 8013cb2:	429a      	cmp	r2, r3
 8013cb4:	d903      	bls.n	8013cbe <xTaskRemoveFromEventList+0x5e>
 8013cb6:	693b      	ldr	r3, [r7, #16]
 8013cb8:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8013cba:	4a16      	ldr	r2, [pc, #88]	@ (8013d14 <xTaskRemoveFromEventList+0xb4>)
 8013cbc:	6013      	str	r3, [r2, #0]
 8013cbe:	693b      	ldr	r3, [r7, #16]
 8013cc0:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8013cc2:	4613      	mov	r3, r2
 8013cc4:	009b      	lsls	r3, r3, #2
 8013cc6:	4413      	add	r3, r2
 8013cc8:	009b      	lsls	r3, r3, #2
 8013cca:	4a13      	ldr	r2, [pc, #76]	@ (8013d18 <xTaskRemoveFromEventList+0xb8>)
 8013ccc:	441a      	add	r2, r3
 8013cce:	693b      	ldr	r3, [r7, #16]
 8013cd0:	3304      	adds	r3, #4
 8013cd2:	4619      	mov	r1, r3
 8013cd4:	4610      	mov	r0, r2
 8013cd6:	f7fd fdd0 	bl	801187a <vListInsertEnd>
 8013cda:	e005      	b.n	8013ce8 <xTaskRemoveFromEventList+0x88>
	}
	else
	{
		/* The delayed and ready lists cannot be accessed, so hold this task
		pending until the scheduler is resumed. */
		vListInsertEnd( &( xPendingReadyList ), &( pxUnblockedTCB->xEventListItem ) );
 8013cdc:	693b      	ldr	r3, [r7, #16]
 8013cde:	3318      	adds	r3, #24
 8013ce0:	4619      	mov	r1, r3
 8013ce2:	480e      	ldr	r0, [pc, #56]	@ (8013d1c <xTaskRemoveFromEventList+0xbc>)
 8013ce4:	f7fd fdc9 	bl	801187a <vListInsertEnd>
	}

	if( pxUnblockedTCB->uxPriority > pxCurrentTCB->uxPriority )
 8013ce8:	693b      	ldr	r3, [r7, #16]
 8013cea:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8013cec:	4b0c      	ldr	r3, [pc, #48]	@ (8013d20 <xTaskRemoveFromEventList+0xc0>)
 8013cee:	681b      	ldr	r3, [r3, #0]
 8013cf0:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8013cf2:	429a      	cmp	r2, r3
 8013cf4:	d905      	bls.n	8013d02 <xTaskRemoveFromEventList+0xa2>
	{
		/* Return true if the task removed from the event list has a higher
		priority than the calling task.  This allows the calling task to know if
		it should force a context switch now. */
		xReturn = pdTRUE;
 8013cf6:	2301      	movs	r3, #1
 8013cf8:	617b      	str	r3, [r7, #20]

		/* Mark that a yield is pending in case the user is not using the
		"xHigherPriorityTaskWoken" parameter to an ISR safe FreeRTOS function. */
		xYieldPending = pdTRUE;
 8013cfa:	4b0a      	ldr	r3, [pc, #40]	@ (8013d24 <xTaskRemoveFromEventList+0xc4>)
 8013cfc:	2201      	movs	r2, #1
 8013cfe:	601a      	str	r2, [r3, #0]
 8013d00:	e001      	b.n	8013d06 <xTaskRemoveFromEventList+0xa6>
	}
	else
	{
		xReturn = pdFALSE;
 8013d02:	2300      	movs	r3, #0
 8013d04:	617b      	str	r3, [r7, #20]
	}

	return xReturn;
 8013d06:	697b      	ldr	r3, [r7, #20]
}
 8013d08:	4618      	mov	r0, r3
 8013d0a:	3718      	adds	r7, #24
 8013d0c:	46bd      	mov	sp, r7
 8013d0e:	bd80      	pop	{r7, pc}
 8013d10:	2400425c 	.word	0x2400425c
 8013d14:	2400423c 	.word	0x2400423c
 8013d18:	24003d64 	.word	0x24003d64
 8013d1c:	240041f4 	.word	0x240041f4
 8013d20:	24003d60 	.word	0x24003d60
 8013d24:	24004248 	.word	0x24004248

08013d28 <vTaskSetTimeOutState>:
	}
}
/*-----------------------------------------------------------*/

void vTaskSetTimeOutState( TimeOut_t * const pxTimeOut )
{
 8013d28:	b580      	push	{r7, lr}
 8013d2a:	b084      	sub	sp, #16
 8013d2c:	af00      	add	r7, sp, #0
 8013d2e:	6078      	str	r0, [r7, #4]
	configASSERT( pxTimeOut );
 8013d30:	687b      	ldr	r3, [r7, #4]
 8013d32:	2b00      	cmp	r3, #0
 8013d34:	d10b      	bne.n	8013d4e <vTaskSetTimeOutState+0x26>
	__asm volatile
 8013d36:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8013d3a:	f383 8811 	msr	BASEPRI, r3
 8013d3e:	f3bf 8f6f 	isb	sy
 8013d42:	f3bf 8f4f 	dsb	sy
 8013d46:	60fb      	str	r3, [r7, #12]
}
 8013d48:	bf00      	nop
 8013d4a:	bf00      	nop
 8013d4c:	e7fd      	b.n	8013d4a <vTaskSetTimeOutState+0x22>
	taskENTER_CRITICAL();
 8013d4e:	f001 fae3 	bl	8015318 <vPortEnterCritical>
	{
		pxTimeOut->xOverflowCount = xNumOfOverflows;
 8013d52:	4b07      	ldr	r3, [pc, #28]	@ (8013d70 <vTaskSetTimeOutState+0x48>)
 8013d54:	681a      	ldr	r2, [r3, #0]
 8013d56:	687b      	ldr	r3, [r7, #4]
 8013d58:	601a      	str	r2, [r3, #0]
		pxTimeOut->xTimeOnEntering = xTickCount;
 8013d5a:	4b06      	ldr	r3, [pc, #24]	@ (8013d74 <vTaskSetTimeOutState+0x4c>)
 8013d5c:	681a      	ldr	r2, [r3, #0]
 8013d5e:	687b      	ldr	r3, [r7, #4]
 8013d60:	605a      	str	r2, [r3, #4]
	}
	taskEXIT_CRITICAL();
 8013d62:	f001 fb0b 	bl	801537c <vPortExitCritical>
}
 8013d66:	bf00      	nop
 8013d68:	3710      	adds	r7, #16
 8013d6a:	46bd      	mov	sp, r7
 8013d6c:	bd80      	pop	{r7, pc}
 8013d6e:	bf00      	nop
 8013d70:	2400424c 	.word	0x2400424c
 8013d74:	24004238 	.word	0x24004238

08013d78 <vTaskInternalSetTimeOutState>:
/*-----------------------------------------------------------*/

void vTaskInternalSetTimeOutState( TimeOut_t * const pxTimeOut )
{
 8013d78:	b480      	push	{r7}
 8013d7a:	b083      	sub	sp, #12
 8013d7c:	af00      	add	r7, sp, #0
 8013d7e:	6078      	str	r0, [r7, #4]
	/* For internal use only as it does not use a critical section. */
	pxTimeOut->xOverflowCount = xNumOfOverflows;
 8013d80:	4b06      	ldr	r3, [pc, #24]	@ (8013d9c <vTaskInternalSetTimeOutState+0x24>)
 8013d82:	681a      	ldr	r2, [r3, #0]
 8013d84:	687b      	ldr	r3, [r7, #4]
 8013d86:	601a      	str	r2, [r3, #0]
	pxTimeOut->xTimeOnEntering = xTickCount;
 8013d88:	4b05      	ldr	r3, [pc, #20]	@ (8013da0 <vTaskInternalSetTimeOutState+0x28>)
 8013d8a:	681a      	ldr	r2, [r3, #0]
 8013d8c:	687b      	ldr	r3, [r7, #4]
 8013d8e:	605a      	str	r2, [r3, #4]
}
 8013d90:	bf00      	nop
 8013d92:	370c      	adds	r7, #12
 8013d94:	46bd      	mov	sp, r7
 8013d96:	f85d 7b04 	ldr.w	r7, [sp], #4
 8013d9a:	4770      	bx	lr
 8013d9c:	2400424c 	.word	0x2400424c
 8013da0:	24004238 	.word	0x24004238

08013da4 <xTaskCheckForTimeOut>:
/*-----------------------------------------------------------*/

BaseType_t xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, TickType_t * const pxTicksToWait )
{
 8013da4:	b580      	push	{r7, lr}
 8013da6:	b088      	sub	sp, #32
 8013da8:	af00      	add	r7, sp, #0
 8013daa:	6078      	str	r0, [r7, #4]
 8013dac:	6039      	str	r1, [r7, #0]
BaseType_t xReturn;

	configASSERT( pxTimeOut );
 8013dae:	687b      	ldr	r3, [r7, #4]
 8013db0:	2b00      	cmp	r3, #0
 8013db2:	d10b      	bne.n	8013dcc <xTaskCheckForTimeOut+0x28>
	__asm volatile
 8013db4:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8013db8:	f383 8811 	msr	BASEPRI, r3
 8013dbc:	f3bf 8f6f 	isb	sy
 8013dc0:	f3bf 8f4f 	dsb	sy
 8013dc4:	613b      	str	r3, [r7, #16]
}
 8013dc6:	bf00      	nop
 8013dc8:	bf00      	nop
 8013dca:	e7fd      	b.n	8013dc8 <xTaskCheckForTimeOut+0x24>
	configASSERT( pxTicksToWait );
 8013dcc:	683b      	ldr	r3, [r7, #0]
 8013dce:	2b00      	cmp	r3, #0
 8013dd0:	d10b      	bne.n	8013dea <xTaskCheckForTimeOut+0x46>
	__asm volatile
 8013dd2:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8013dd6:	f383 8811 	msr	BASEPRI, r3
 8013dda:	f3bf 8f6f 	isb	sy
 8013dde:	f3bf 8f4f 	dsb	sy
 8013de2:	60fb      	str	r3, [r7, #12]
}
 8013de4:	bf00      	nop
 8013de6:	bf00      	nop
 8013de8:	e7fd      	b.n	8013de6 <xTaskCheckForTimeOut+0x42>

	taskENTER_CRITICAL();
 8013dea:	f001 fa95 	bl	8015318 <vPortEnterCritical>
	{
		/* Minor optimisation.  The tick count cannot change in this block. */
		const TickType_t xConstTickCount = xTickCount;
 8013dee:	4b1d      	ldr	r3, [pc, #116]	@ (8013e64 <xTaskCheckForTimeOut+0xc0>)
 8013df0:	681b      	ldr	r3, [r3, #0]
 8013df2:	61bb      	str	r3, [r7, #24]
		const TickType_t xElapsedTime = xConstTickCount - pxTimeOut->xTimeOnEntering;
 8013df4:	687b      	ldr	r3, [r7, #4]
 8013df6:	685b      	ldr	r3, [r3, #4]
 8013df8:	69ba      	ldr	r2, [r7, #24]
 8013dfa:	1ad3      	subs	r3, r2, r3
 8013dfc:	617b      	str	r3, [r7, #20]
			}
			else
		#endif

		#if ( INCLUDE_vTaskSuspend == 1 )
			if( *pxTicksToWait == portMAX_DELAY )
 8013dfe:	683b      	ldr	r3, [r7, #0]
 8013e00:	681b      	ldr	r3, [r3, #0]
 8013e02:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8013e06:	d102      	bne.n	8013e0e <xTaskCheckForTimeOut+0x6a>
			{
				/* If INCLUDE_vTaskSuspend is set to 1 and the block time
				specified is the maximum block time then the task should block
				indefinitely, and therefore never time out. */
				xReturn = pdFALSE;
 8013e08:	2300      	movs	r3, #0
 8013e0a:	61fb      	str	r3, [r7, #28]
 8013e0c:	e023      	b.n	8013e56 <xTaskCheckForTimeOut+0xb2>
			}
			else
		#endif

		if( ( xNumOfOverflows != pxTimeOut->xOverflowCount ) && ( xConstTickCount >= pxTimeOut->xTimeOnEntering ) ) /*lint !e525 Indentation preferred as is to make code within pre-processor directives clearer. */
 8013e0e:	687b      	ldr	r3, [r7, #4]
 8013e10:	681a      	ldr	r2, [r3, #0]
 8013e12:	4b15      	ldr	r3, [pc, #84]	@ (8013e68 <xTaskCheckForTimeOut+0xc4>)
 8013e14:	681b      	ldr	r3, [r3, #0]
 8013e16:	429a      	cmp	r2, r3
 8013e18:	d007      	beq.n	8013e2a <xTaskCheckForTimeOut+0x86>
 8013e1a:	687b      	ldr	r3, [r7, #4]
 8013e1c:	685b      	ldr	r3, [r3, #4]
 8013e1e:	69ba      	ldr	r2, [r7, #24]
 8013e20:	429a      	cmp	r2, r3
 8013e22:	d302      	bcc.n	8013e2a <xTaskCheckForTimeOut+0x86>
			/* The tick count is greater than the time at which
			vTaskSetTimeout() was called, but has also overflowed since
			vTaskSetTimeOut() was called.  It must have wrapped all the way
			around and gone past again. This passed since vTaskSetTimeout()
			was called. */
			xReturn = pdTRUE;
 8013e24:	2301      	movs	r3, #1
 8013e26:	61fb      	str	r3, [r7, #28]
 8013e28:	e015      	b.n	8013e56 <xTaskCheckForTimeOut+0xb2>
		}
		else if( xElapsedTime < *pxTicksToWait ) /*lint !e961 Explicit casting is only redundant with some compilers, whereas others require it to prevent integer conversion errors. */
 8013e2a:	683b      	ldr	r3, [r7, #0]
 8013e2c:	681b      	ldr	r3, [r3, #0]
 8013e2e:	697a      	ldr	r2, [r7, #20]
 8013e30:	429a      	cmp	r2, r3
 8013e32:	d20b      	bcs.n	8013e4c <xTaskCheckForTimeOut+0xa8>
		{
			/* Not a genuine timeout. Adjust parameters for time remaining. */
			*pxTicksToWait -= xElapsedTime;
 8013e34:	683b      	ldr	r3, [r7, #0]
 8013e36:	681a      	ldr	r2, [r3, #0]
 8013e38:	697b      	ldr	r3, [r7, #20]
 8013e3a:	1ad2      	subs	r2, r2, r3
 8013e3c:	683b      	ldr	r3, [r7, #0]
 8013e3e:	601a      	str	r2, [r3, #0]
			vTaskInternalSetTimeOutState( pxTimeOut );
 8013e40:	6878      	ldr	r0, [r7, #4]
 8013e42:	f7ff ff99 	bl	8013d78 <vTaskInternalSetTimeOutState>
			xReturn = pdFALSE;
 8013e46:	2300      	movs	r3, #0
 8013e48:	61fb      	str	r3, [r7, #28]
 8013e4a:	e004      	b.n	8013e56 <xTaskCheckForTimeOut+0xb2>
		}
		else
		{
			*pxTicksToWait = 0;
 8013e4c:	683b      	ldr	r3, [r7, #0]
 8013e4e:	2200      	movs	r2, #0
 8013e50:	601a      	str	r2, [r3, #0]
			xReturn = pdTRUE;
 8013e52:	2301      	movs	r3, #1
 8013e54:	61fb      	str	r3, [r7, #28]
		}
	}
	taskEXIT_CRITICAL();
 8013e56:	f001 fa91 	bl	801537c <vPortExitCritical>

	return xReturn;
 8013e5a:	69fb      	ldr	r3, [r7, #28]
}
 8013e5c:	4618      	mov	r0, r3
 8013e5e:	3720      	adds	r7, #32
 8013e60:	46bd      	mov	sp, r7
 8013e62:	bd80      	pop	{r7, pc}
 8013e64:	24004238 	.word	0x24004238
 8013e68:	2400424c 	.word	0x2400424c

08013e6c <vTaskMissedYield>:
/*-----------------------------------------------------------*/

void vTaskMissedYield( void )
{
 8013e6c:	b480      	push	{r7}
 8013e6e:	af00      	add	r7, sp, #0
	xYieldPending = pdTRUE;
 8013e70:	4b03      	ldr	r3, [pc, #12]	@ (8013e80 <vTaskMissedYield+0x14>)
 8013e72:	2201      	movs	r2, #1
 8013e74:	601a      	str	r2, [r3, #0]
}
 8013e76:	bf00      	nop
 8013e78:	46bd      	mov	sp, r7
 8013e7a:	f85d 7b04 	ldr.w	r7, [sp], #4
 8013e7e:	4770      	bx	lr
 8013e80:	24004248 	.word	0x24004248

08013e84 <prvIdleTask>:
 *
 * void prvIdleTask( void *pvParameters );
 *
 */
static portTASK_FUNCTION( prvIdleTask, pvParameters )
{
 8013e84:	b580      	push	{r7, lr}
 8013e86:	b082      	sub	sp, #8
 8013e88:	af00      	add	r7, sp, #0
 8013e8a:	6078      	str	r0, [r7, #4]

	for( ;; )
	{
		/* See if any tasks have deleted themselves - if so then the idle task
		is responsible for freeing the deleted task's TCB and stack. */
		prvCheckTasksWaitingTermination();
 8013e8c:	f000 f852 	bl	8013f34 <prvCheckTasksWaitingTermination>

			A critical region is not required here as we are just reading from
			the list, and an occasional incorrect value will not matter.  If
			the ready list at the idle priority contains more than one task
			then a task other than the idle task is ready to execute. */
			if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ tskIDLE_PRIORITY ] ) ) > ( UBaseType_t ) 1 )
 8013e90:	4b06      	ldr	r3, [pc, #24]	@ (8013eac <prvIdleTask+0x28>)
 8013e92:	681b      	ldr	r3, [r3, #0]
 8013e94:	2b01      	cmp	r3, #1
 8013e96:	d9f9      	bls.n	8013e8c <prvIdleTask+0x8>
			{
				taskYIELD();
 8013e98:	4b05      	ldr	r3, [pc, #20]	@ (8013eb0 <prvIdleTask+0x2c>)
 8013e9a:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8013e9e:	601a      	str	r2, [r3, #0]
 8013ea0:	f3bf 8f4f 	dsb	sy
 8013ea4:	f3bf 8f6f 	isb	sy
		prvCheckTasksWaitingTermination();
 8013ea8:	e7f0      	b.n	8013e8c <prvIdleTask+0x8>
 8013eaa:	bf00      	nop
 8013eac:	24003d64 	.word	0x24003d64
 8013eb0:	e000ed04 	.word	0xe000ed04

08013eb4 <prvInitialiseTaskLists>:

#endif /* portUSING_MPU_WRAPPERS */
/*-----------------------------------------------------------*/

static void prvInitialiseTaskLists( void )
{
 8013eb4:	b580      	push	{r7, lr}
 8013eb6:	b082      	sub	sp, #8
 8013eb8:	af00      	add	r7, sp, #0
UBaseType_t uxPriority;

	for( uxPriority = ( UBaseType_t ) 0U; uxPriority < ( UBaseType_t ) configMAX_PRIORITIES; uxPriority++ )
 8013eba:	2300      	movs	r3, #0
 8013ebc:	607b      	str	r3, [r7, #4]
 8013ebe:	e00c      	b.n	8013eda <prvInitialiseTaskLists+0x26>
	{
		vListInitialise( &( pxReadyTasksLists[ uxPriority ] ) );
 8013ec0:	687a      	ldr	r2, [r7, #4]
 8013ec2:	4613      	mov	r3, r2
 8013ec4:	009b      	lsls	r3, r3, #2
 8013ec6:	4413      	add	r3, r2
 8013ec8:	009b      	lsls	r3, r3, #2
 8013eca:	4a12      	ldr	r2, [pc, #72]	@ (8013f14 <prvInitialiseTaskLists+0x60>)
 8013ecc:	4413      	add	r3, r2
 8013ece:	4618      	mov	r0, r3
 8013ed0:	f7fd fca6 	bl	8011820 <vListInitialise>
	for( uxPriority = ( UBaseType_t ) 0U; uxPriority < ( UBaseType_t ) configMAX_PRIORITIES; uxPriority++ )
 8013ed4:	687b      	ldr	r3, [r7, #4]
 8013ed6:	3301      	adds	r3, #1
 8013ed8:	607b      	str	r3, [r7, #4]
 8013eda:	687b      	ldr	r3, [r7, #4]
 8013edc:	2b37      	cmp	r3, #55	@ 0x37
 8013ede:	d9ef      	bls.n	8013ec0 <prvInitialiseTaskLists+0xc>
	}

	vListInitialise( &xDelayedTaskList1 );
 8013ee0:	480d      	ldr	r0, [pc, #52]	@ (8013f18 <prvInitialiseTaskLists+0x64>)
 8013ee2:	f7fd fc9d 	bl	8011820 <vListInitialise>
	vListInitialise( &xDelayedTaskList2 );
 8013ee6:	480d      	ldr	r0, [pc, #52]	@ (8013f1c <prvInitialiseTaskLists+0x68>)
 8013ee8:	f7fd fc9a 	bl	8011820 <vListInitialise>
	vListInitialise( &xPendingReadyList );
 8013eec:	480c      	ldr	r0, [pc, #48]	@ (8013f20 <prvInitialiseTaskLists+0x6c>)
 8013eee:	f7fd fc97 	bl	8011820 <vListInitialise>

	#if ( INCLUDE_vTaskDelete == 1 )
	{
		vListInitialise( &xTasksWaitingTermination );
 8013ef2:	480c      	ldr	r0, [pc, #48]	@ (8013f24 <prvInitialiseTaskLists+0x70>)
 8013ef4:	f7fd fc94 	bl	8011820 <vListInitialise>
	}
	#endif /* INCLUDE_vTaskDelete */

	#if ( INCLUDE_vTaskSuspend == 1 )
	{
		vListInitialise( &xSuspendedTaskList );
 8013ef8:	480b      	ldr	r0, [pc, #44]	@ (8013f28 <prvInitialiseTaskLists+0x74>)
 8013efa:	f7fd fc91 	bl	8011820 <vListInitialise>
	}
	#endif /* INCLUDE_vTaskSuspend */

	/* Start with pxDelayedTaskList using list1 and the pxOverflowDelayedTaskList
	using list2. */
	pxDelayedTaskList = &xDelayedTaskList1;
 8013efe:	4b0b      	ldr	r3, [pc, #44]	@ (8013f2c <prvInitialiseTaskLists+0x78>)
 8013f00:	4a05      	ldr	r2, [pc, #20]	@ (8013f18 <prvInitialiseTaskLists+0x64>)
 8013f02:	601a      	str	r2, [r3, #0]
	pxOverflowDelayedTaskList = &xDelayedTaskList2;
 8013f04:	4b0a      	ldr	r3, [pc, #40]	@ (8013f30 <prvInitialiseTaskLists+0x7c>)
 8013f06:	4a05      	ldr	r2, [pc, #20]	@ (8013f1c <prvInitialiseTaskLists+0x68>)
 8013f08:	601a      	str	r2, [r3, #0]
}
 8013f0a:	bf00      	nop
 8013f0c:	3708      	adds	r7, #8
 8013f0e:	46bd      	mov	sp, r7
 8013f10:	bd80      	pop	{r7, pc}
 8013f12:	bf00      	nop
 8013f14:	24003d64 	.word	0x24003d64
 8013f18:	240041c4 	.word	0x240041c4
 8013f1c:	240041d8 	.word	0x240041d8
 8013f20:	240041f4 	.word	0x240041f4
 8013f24:	24004208 	.word	0x24004208
 8013f28:	24004220 	.word	0x24004220
 8013f2c:	240041ec 	.word	0x240041ec
 8013f30:	240041f0 	.word	0x240041f0

08013f34 <prvCheckTasksWaitingTermination>:
/*-----------------------------------------------------------*/

static void prvCheckTasksWaitingTermination( void )
{
 8013f34:	b580      	push	{r7, lr}
 8013f36:	b082      	sub	sp, #8
 8013f38:	af00      	add	r7, sp, #0
	{
		TCB_t *pxTCB;

		/* uxDeletedTasksWaitingCleanUp is used to prevent taskENTER_CRITICAL()
		being called too often in the idle task. */
		while( uxDeletedTasksWaitingCleanUp > ( UBaseType_t ) 0U )
 8013f3a:	e019      	b.n	8013f70 <prvCheckTasksWaitingTermination+0x3c>
		{
			taskENTER_CRITICAL();
 8013f3c:	f001 f9ec 	bl	8015318 <vPortEnterCritical>
			{
				pxTCB = listGET_OWNER_OF_HEAD_ENTRY( ( &xTasksWaitingTermination ) ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
 8013f40:	4b10      	ldr	r3, [pc, #64]	@ (8013f84 <prvCheckTasksWaitingTermination+0x50>)
 8013f42:	68db      	ldr	r3, [r3, #12]
 8013f44:	68db      	ldr	r3, [r3, #12]
 8013f46:	607b      	str	r3, [r7, #4]
				( void ) uxListRemove( &( pxTCB->xStateListItem ) );
 8013f48:	687b      	ldr	r3, [r7, #4]
 8013f4a:	3304      	adds	r3, #4
 8013f4c:	4618      	mov	r0, r3
 8013f4e:	f7fd fcf1 	bl	8011934 <uxListRemove>
				--uxCurrentNumberOfTasks;
 8013f52:	4b0d      	ldr	r3, [pc, #52]	@ (8013f88 <prvCheckTasksWaitingTermination+0x54>)
 8013f54:	681b      	ldr	r3, [r3, #0]
 8013f56:	3b01      	subs	r3, #1
 8013f58:	4a0b      	ldr	r2, [pc, #44]	@ (8013f88 <prvCheckTasksWaitingTermination+0x54>)
 8013f5a:	6013      	str	r3, [r2, #0]
				--uxDeletedTasksWaitingCleanUp;
 8013f5c:	4b0b      	ldr	r3, [pc, #44]	@ (8013f8c <prvCheckTasksWaitingTermination+0x58>)
 8013f5e:	681b      	ldr	r3, [r3, #0]
 8013f60:	3b01      	subs	r3, #1
 8013f62:	4a0a      	ldr	r2, [pc, #40]	@ (8013f8c <prvCheckTasksWaitingTermination+0x58>)
 8013f64:	6013      	str	r3, [r2, #0]
			}
			taskEXIT_CRITICAL();
 8013f66:	f001 fa09 	bl	801537c <vPortExitCritical>

			prvDeleteTCB( pxTCB );
 8013f6a:	6878      	ldr	r0, [r7, #4]
 8013f6c:	f000 f810 	bl	8013f90 <prvDeleteTCB>
		while( uxDeletedTasksWaitingCleanUp > ( UBaseType_t ) 0U )
 8013f70:	4b06      	ldr	r3, [pc, #24]	@ (8013f8c <prvCheckTasksWaitingTermination+0x58>)
 8013f72:	681b      	ldr	r3, [r3, #0]
 8013f74:	2b00      	cmp	r3, #0
 8013f76:	d1e1      	bne.n	8013f3c <prvCheckTasksWaitingTermination+0x8>
		}
	}
	#endif /* INCLUDE_vTaskDelete */
}
 8013f78:	bf00      	nop
 8013f7a:	bf00      	nop
 8013f7c:	3708      	adds	r7, #8
 8013f7e:	46bd      	mov	sp, r7
 8013f80:	bd80      	pop	{r7, pc}
 8013f82:	bf00      	nop
 8013f84:	24004208 	.word	0x24004208
 8013f88:	24004234 	.word	0x24004234
 8013f8c:	2400421c 	.word	0x2400421c

08013f90 <prvDeleteTCB>:
/*-----------------------------------------------------------*/

#if ( INCLUDE_vTaskDelete == 1 )

	static void prvDeleteTCB( TCB_t *pxTCB )
	{
 8013f90:	b580      	push	{r7, lr}
 8013f92:	b084      	sub	sp, #16
 8013f94:	af00      	add	r7, sp, #0
 8013f96:	6078      	str	r0, [r7, #4]
		to the task to free any memory allocated at the application level.
		See the third party link http://www.nadler.com/embedded/newlibAndFreeRTOS.html
		for additional information. */
		#if ( configUSE_NEWLIB_REENTRANT == 1 )
		{
			_reclaim_reent( &( pxTCB->xNewLib_reent ) );
 8013f98:	687b      	ldr	r3, [r7, #4]
 8013f9a:	3354      	adds	r3, #84	@ 0x54
 8013f9c:	4618      	mov	r0, r3
 8013f9e:	f016 facd 	bl	802a53c <_reclaim_reent>
		#elif( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 ) /*lint !e731 !e9029 Macro has been consolidated for readability reasons. */
		{
			/* The task could have been allocated statically or dynamically, so
			check what was statically allocated before trying to free the
			memory. */
			if( pxTCB->ucStaticallyAllocated == tskDYNAMICALLY_ALLOCATED_STACK_AND_TCB )
 8013fa2:	687b      	ldr	r3, [r7, #4]
 8013fa4:	f893 30a5 	ldrb.w	r3, [r3, #165]	@ 0xa5
 8013fa8:	2b00      	cmp	r3, #0
 8013faa:	d108      	bne.n	8013fbe <prvDeleteTCB+0x2e>
			{
				/* Both the stack and TCB were allocated dynamically, so both
				must be freed. */
				vPortFree( pxTCB->pxStack );
 8013fac:	687b      	ldr	r3, [r7, #4]
 8013fae:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8013fb0:	4618      	mov	r0, r3
 8013fb2:	f001 fba1 	bl	80156f8 <vPortFree>
				vPortFree( pxTCB );
 8013fb6:	6878      	ldr	r0, [r7, #4]
 8013fb8:	f001 fb9e 	bl	80156f8 <vPortFree>
				configASSERT( pxTCB->ucStaticallyAllocated == tskSTATICALLY_ALLOCATED_STACK_AND_TCB	);
				mtCOVERAGE_TEST_MARKER();
			}
		}
		#endif /* configSUPPORT_DYNAMIC_ALLOCATION */
	}
 8013fbc:	e019      	b.n	8013ff2 <prvDeleteTCB+0x62>
			else if( pxTCB->ucStaticallyAllocated == tskSTATICALLY_ALLOCATED_STACK_ONLY )
 8013fbe:	687b      	ldr	r3, [r7, #4]
 8013fc0:	f893 30a5 	ldrb.w	r3, [r3, #165]	@ 0xa5
 8013fc4:	2b01      	cmp	r3, #1
 8013fc6:	d103      	bne.n	8013fd0 <prvDeleteTCB+0x40>
				vPortFree( pxTCB );
 8013fc8:	6878      	ldr	r0, [r7, #4]
 8013fca:	f001 fb95 	bl	80156f8 <vPortFree>
	}
 8013fce:	e010      	b.n	8013ff2 <prvDeleteTCB+0x62>
				configASSERT( pxTCB->ucStaticallyAllocated == tskSTATICALLY_ALLOCATED_STACK_AND_TCB	);
 8013fd0:	687b      	ldr	r3, [r7, #4]
 8013fd2:	f893 30a5 	ldrb.w	r3, [r3, #165]	@ 0xa5
 8013fd6:	2b02      	cmp	r3, #2
 8013fd8:	d00b      	beq.n	8013ff2 <prvDeleteTCB+0x62>
	__asm volatile
 8013fda:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8013fde:	f383 8811 	msr	BASEPRI, r3
 8013fe2:	f3bf 8f6f 	isb	sy
 8013fe6:	f3bf 8f4f 	dsb	sy
 8013fea:	60fb      	str	r3, [r7, #12]
}
 8013fec:	bf00      	nop
 8013fee:	bf00      	nop
 8013ff0:	e7fd      	b.n	8013fee <prvDeleteTCB+0x5e>
	}
 8013ff2:	bf00      	nop
 8013ff4:	3710      	adds	r7, #16
 8013ff6:	46bd      	mov	sp, r7
 8013ff8:	bd80      	pop	{r7, pc}
	...

08013ffc <prvResetNextTaskUnblockTime>:

#endif /* INCLUDE_vTaskDelete */
/*-----------------------------------------------------------*/

static void prvResetNextTaskUnblockTime( void )
{
 8013ffc:	b480      	push	{r7}
 8013ffe:	b083      	sub	sp, #12
 8014000:	af00      	add	r7, sp, #0
TCB_t *pxTCB;

	if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )
 8014002:	4b0c      	ldr	r3, [pc, #48]	@ (8014034 <prvResetNextTaskUnblockTime+0x38>)
 8014004:	681b      	ldr	r3, [r3, #0]
 8014006:	681b      	ldr	r3, [r3, #0]
 8014008:	2b00      	cmp	r3, #0
 801400a:	d104      	bne.n	8014016 <prvResetNextTaskUnblockTime+0x1a>
	{
		/* The new current delayed list is empty.  Set xNextTaskUnblockTime to
		the maximum possible value so it is	extremely unlikely that the
		if( xTickCount >= xNextTaskUnblockTime ) test will pass until
		there is an item in the delayed list. */
		xNextTaskUnblockTime = portMAX_DELAY;
 801400c:	4b0a      	ldr	r3, [pc, #40]	@ (8014038 <prvResetNextTaskUnblockTime+0x3c>)
 801400e:	f04f 32ff 	mov.w	r2, #4294967295	@ 0xffffffff
 8014012:	601a      	str	r2, [r3, #0]
		which the task at the head of the delayed list should be removed
		from the Blocked state. */
		( pxTCB ) = listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
		xNextTaskUnblockTime = listGET_LIST_ITEM_VALUE( &( ( pxTCB )->xStateListItem ) );
	}
}
 8014014:	e008      	b.n	8014028 <prvResetNextTaskUnblockTime+0x2c>
		( pxTCB ) = listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
 8014016:	4b07      	ldr	r3, [pc, #28]	@ (8014034 <prvResetNextTaskUnblockTime+0x38>)
 8014018:	681b      	ldr	r3, [r3, #0]
 801401a:	68db      	ldr	r3, [r3, #12]
 801401c:	68db      	ldr	r3, [r3, #12]
 801401e:	607b      	str	r3, [r7, #4]
		xNextTaskUnblockTime = listGET_LIST_ITEM_VALUE( &( ( pxTCB )->xStateListItem ) );
 8014020:	687b      	ldr	r3, [r7, #4]
 8014022:	685b      	ldr	r3, [r3, #4]
 8014024:	4a04      	ldr	r2, [pc, #16]	@ (8014038 <prvResetNextTaskUnblockTime+0x3c>)
 8014026:	6013      	str	r3, [r2, #0]
}
 8014028:	bf00      	nop
 801402a:	370c      	adds	r7, #12
 801402c:	46bd      	mov	sp, r7
 801402e:	f85d 7b04 	ldr.w	r7, [sp], #4
 8014032:	4770      	bx	lr
 8014034:	240041ec 	.word	0x240041ec
 8014038:	24004254 	.word	0x24004254

0801403c <xTaskGetCurrentTaskHandle>:
/*-----------------------------------------------------------*/

#if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) )

	TaskHandle_t xTaskGetCurrentTaskHandle( void )
	{
 801403c:	b480      	push	{r7}
 801403e:	b083      	sub	sp, #12
 8014040:	af00      	add	r7, sp, #0
	TaskHandle_t xReturn;

		/* A critical section is not required as this is not called from
		an interrupt and the current TCB will always be the same for any
		individual execution thread. */
		xReturn = pxCurrentTCB;
 8014042:	4b05      	ldr	r3, [pc, #20]	@ (8014058 <xTaskGetCurrentTaskHandle+0x1c>)
 8014044:	681b      	ldr	r3, [r3, #0]
 8014046:	607b      	str	r3, [r7, #4]

		return xReturn;
 8014048:	687b      	ldr	r3, [r7, #4]
	}
 801404a:	4618      	mov	r0, r3
 801404c:	370c      	adds	r7, #12
 801404e:	46bd      	mov	sp, r7
 8014050:	f85d 7b04 	ldr.w	r7, [sp], #4
 8014054:	4770      	bx	lr
 8014056:	bf00      	nop
 8014058:	24003d60 	.word	0x24003d60

0801405c <xTaskGetSchedulerState>:
/*-----------------------------------------------------------*/

#if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )

	BaseType_t xTaskGetSchedulerState( void )
	{
 801405c:	b480      	push	{r7}
 801405e:	b083      	sub	sp, #12
 8014060:	af00      	add	r7, sp, #0
	BaseType_t xReturn;

		if( xSchedulerRunning == pdFALSE )
 8014062:	4b0b      	ldr	r3, [pc, #44]	@ (8014090 <xTaskGetSchedulerState+0x34>)
 8014064:	681b      	ldr	r3, [r3, #0]
 8014066:	2b00      	cmp	r3, #0
 8014068:	d102      	bne.n	8014070 <xTaskGetSchedulerState+0x14>
		{
			xReturn = taskSCHEDULER_NOT_STARTED;
 801406a:	2301      	movs	r3, #1
 801406c:	607b      	str	r3, [r7, #4]
 801406e:	e008      	b.n	8014082 <xTaskGetSchedulerState+0x26>
		}
		else
		{
			if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
 8014070:	4b08      	ldr	r3, [pc, #32]	@ (8014094 <xTaskGetSchedulerState+0x38>)
 8014072:	681b      	ldr	r3, [r3, #0]
 8014074:	2b00      	cmp	r3, #0
 8014076:	d102      	bne.n	801407e <xTaskGetSchedulerState+0x22>
			{
				xReturn = taskSCHEDULER_RUNNING;
 8014078:	2302      	movs	r3, #2
 801407a:	607b      	str	r3, [r7, #4]
 801407c:	e001      	b.n	8014082 <xTaskGetSchedulerState+0x26>
			}
			else
			{
				xReturn = taskSCHEDULER_SUSPENDED;
 801407e:	2300      	movs	r3, #0
 8014080:	607b      	str	r3, [r7, #4]
			}
		}

		return xReturn;
 8014082:	687b      	ldr	r3, [r7, #4]
	}
 8014084:	4618      	mov	r0, r3
 8014086:	370c      	adds	r7, #12
 8014088:	46bd      	mov	sp, r7
 801408a:	f85d 7b04 	ldr.w	r7, [sp], #4
 801408e:	4770      	bx	lr
 8014090:	24004240 	.word	0x24004240
 8014094:	2400425c 	.word	0x2400425c

08014098 <xTaskPriorityInherit>:
/*-----------------------------------------------------------*/

#if ( configUSE_MUTEXES == 1 )

	BaseType_t xTaskPriorityInherit( TaskHandle_t const pxMutexHolder )
	{
 8014098:	b580      	push	{r7, lr}
 801409a:	b084      	sub	sp, #16
 801409c:	af00      	add	r7, sp, #0
 801409e:	6078      	str	r0, [r7, #4]
	TCB_t * const pxMutexHolderTCB = pxMutexHolder;
 80140a0:	687b      	ldr	r3, [r7, #4]
 80140a2:	60bb      	str	r3, [r7, #8]
	BaseType_t xReturn = pdFALSE;
 80140a4:	2300      	movs	r3, #0
 80140a6:	60fb      	str	r3, [r7, #12]

		/* If the mutex was given back by an interrupt while the queue was
		locked then the mutex holder might now be NULL.  _RB_ Is this still
		needed as interrupts can no longer use mutexes? */
		if( pxMutexHolder != NULL )
 80140a8:	687b      	ldr	r3, [r7, #4]
 80140aa:	2b00      	cmp	r3, #0
 80140ac:	d051      	beq.n	8014152 <xTaskPriorityInherit+0xba>
		{
			/* If the holder of the mutex has a priority below the priority of
			the task attempting to obtain the mutex then it will temporarily
			inherit the priority of the task attempting to obtain the mutex. */
			if( pxMutexHolderTCB->uxPriority < pxCurrentTCB->uxPriority )
 80140ae:	68bb      	ldr	r3, [r7, #8]
 80140b0:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 80140b2:	4b2a      	ldr	r3, [pc, #168]	@ (801415c <xTaskPriorityInherit+0xc4>)
 80140b4:	681b      	ldr	r3, [r3, #0]
 80140b6:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80140b8:	429a      	cmp	r2, r3
 80140ba:	d241      	bcs.n	8014140 <xTaskPriorityInherit+0xa8>
			{
				/* Adjust the mutex holder state to account for its new
				priority.  Only reset the event list item value if the value is
				not being used for anything else. */
				if( ( listGET_LIST_ITEM_VALUE( &( pxMutexHolderTCB->xEventListItem ) ) & taskEVENT_LIST_ITEM_VALUE_IN_USE ) == 0UL )
 80140bc:	68bb      	ldr	r3, [r7, #8]
 80140be:	699b      	ldr	r3, [r3, #24]
 80140c0:	2b00      	cmp	r3, #0
 80140c2:	db06      	blt.n	80140d2 <xTaskPriorityInherit+0x3a>
				{
					listSET_LIST_ITEM_VALUE( &( pxMutexHolderTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) pxCurrentTCB->uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
 80140c4:	4b25      	ldr	r3, [pc, #148]	@ (801415c <xTaskPriorityInherit+0xc4>)
 80140c6:	681b      	ldr	r3, [r3, #0]
 80140c8:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80140ca:	f1c3 0238 	rsb	r2, r3, #56	@ 0x38
 80140ce:	68bb      	ldr	r3, [r7, #8]
 80140d0:	619a      	str	r2, [r3, #24]
					mtCOVERAGE_TEST_MARKER();
				}

				/* If the task being modified is in the ready state it will need
				to be moved into a new list. */
				if( listIS_CONTAINED_WITHIN( &( pxReadyTasksLists[ pxMutexHolderTCB->uxPriority ] ), &( pxMutexHolderTCB->xStateListItem ) ) != pdFALSE )
 80140d2:	68bb      	ldr	r3, [r7, #8]
 80140d4:	6959      	ldr	r1, [r3, #20]
 80140d6:	68bb      	ldr	r3, [r7, #8]
 80140d8:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 80140da:	4613      	mov	r3, r2
 80140dc:	009b      	lsls	r3, r3, #2
 80140de:	4413      	add	r3, r2
 80140e0:	009b      	lsls	r3, r3, #2
 80140e2:	4a1f      	ldr	r2, [pc, #124]	@ (8014160 <xTaskPriorityInherit+0xc8>)
 80140e4:	4413      	add	r3, r2
 80140e6:	4299      	cmp	r1, r3
 80140e8:	d122      	bne.n	8014130 <xTaskPriorityInherit+0x98>
				{
					if( uxListRemove( &( pxMutexHolderTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
 80140ea:	68bb      	ldr	r3, [r7, #8]
 80140ec:	3304      	adds	r3, #4
 80140ee:	4618      	mov	r0, r3
 80140f0:	f7fd fc20 	bl	8011934 <uxListRemove>
					{
						mtCOVERAGE_TEST_MARKER();
					}

					/* Inherit the priority before being moved into the new list. */
					pxMutexHolderTCB->uxPriority = pxCurrentTCB->uxPriority;
 80140f4:	4b19      	ldr	r3, [pc, #100]	@ (801415c <xTaskPriorityInherit+0xc4>)
 80140f6:	681b      	ldr	r3, [r3, #0]
 80140f8:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 80140fa:	68bb      	ldr	r3, [r7, #8]
 80140fc:	62da      	str	r2, [r3, #44]	@ 0x2c
					prvAddTaskToReadyList( pxMutexHolderTCB );
 80140fe:	68bb      	ldr	r3, [r7, #8]
 8014100:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8014102:	4b18      	ldr	r3, [pc, #96]	@ (8014164 <xTaskPriorityInherit+0xcc>)
 8014104:	681b      	ldr	r3, [r3, #0]
 8014106:	429a      	cmp	r2, r3
 8014108:	d903      	bls.n	8014112 <xTaskPriorityInherit+0x7a>
 801410a:	68bb      	ldr	r3, [r7, #8]
 801410c:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 801410e:	4a15      	ldr	r2, [pc, #84]	@ (8014164 <xTaskPriorityInherit+0xcc>)
 8014110:	6013      	str	r3, [r2, #0]
 8014112:	68bb      	ldr	r3, [r7, #8]
 8014114:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8014116:	4613      	mov	r3, r2
 8014118:	009b      	lsls	r3, r3, #2
 801411a:	4413      	add	r3, r2
 801411c:	009b      	lsls	r3, r3, #2
 801411e:	4a10      	ldr	r2, [pc, #64]	@ (8014160 <xTaskPriorityInherit+0xc8>)
 8014120:	441a      	add	r2, r3
 8014122:	68bb      	ldr	r3, [r7, #8]
 8014124:	3304      	adds	r3, #4
 8014126:	4619      	mov	r1, r3
 8014128:	4610      	mov	r0, r2
 801412a:	f7fd fba6 	bl	801187a <vListInsertEnd>
 801412e:	e004      	b.n	801413a <xTaskPriorityInherit+0xa2>
				}
				else
				{
					/* Just inherit the priority. */
					pxMutexHolderTCB->uxPriority = pxCurrentTCB->uxPriority;
 8014130:	4b0a      	ldr	r3, [pc, #40]	@ (801415c <xTaskPriorityInherit+0xc4>)
 8014132:	681b      	ldr	r3, [r3, #0]
 8014134:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8014136:	68bb      	ldr	r3, [r7, #8]
 8014138:	62da      	str	r2, [r3, #44]	@ 0x2c
				}

				traceTASK_PRIORITY_INHERIT( pxMutexHolderTCB, pxCurrentTCB->uxPriority );

				/* Inheritance occurred. */
				xReturn = pdTRUE;
 801413a:	2301      	movs	r3, #1
 801413c:	60fb      	str	r3, [r7, #12]
 801413e:	e008      	b.n	8014152 <xTaskPriorityInherit+0xba>
			}
			else
			{
				if( pxMutexHolderTCB->uxBasePriority < pxCurrentTCB->uxPriority )
 8014140:	68bb      	ldr	r3, [r7, #8]
 8014142:	6cda      	ldr	r2, [r3, #76]	@ 0x4c
 8014144:	4b05      	ldr	r3, [pc, #20]	@ (801415c <xTaskPriorityInherit+0xc4>)
 8014146:	681b      	ldr	r3, [r3, #0]
 8014148:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 801414a:	429a      	cmp	r2, r3
 801414c:	d201      	bcs.n	8014152 <xTaskPriorityInherit+0xba>
					current priority of the mutex holder is not lower than the
					priority of the task attempting to take the mutex.
					Therefore the mutex holder must have already inherited a
					priority, but inheritance would have occurred if that had
					not been the case. */
					xReturn = pdTRUE;
 801414e:	2301      	movs	r3, #1
 8014150:	60fb      	str	r3, [r7, #12]
		else
		{
			mtCOVERAGE_TEST_MARKER();
		}

		return xReturn;
 8014152:	68fb      	ldr	r3, [r7, #12]
	}
 8014154:	4618      	mov	r0, r3
 8014156:	3710      	adds	r7, #16
 8014158:	46bd      	mov	sp, r7
 801415a:	bd80      	pop	{r7, pc}
 801415c:	24003d60 	.word	0x24003d60
 8014160:	24003d64 	.word	0x24003d64
 8014164:	2400423c 	.word	0x2400423c

08014168 <xTaskPriorityDisinherit>:
/*-----------------------------------------------------------*/

#if ( configUSE_MUTEXES == 1 )

	BaseType_t xTaskPriorityDisinherit( TaskHandle_t const pxMutexHolder )
	{
 8014168:	b580      	push	{r7, lr}
 801416a:	b086      	sub	sp, #24
 801416c:	af00      	add	r7, sp, #0
 801416e:	6078      	str	r0, [r7, #4]
	TCB_t * const pxTCB = pxMutexHolder;
 8014170:	687b      	ldr	r3, [r7, #4]
 8014172:	613b      	str	r3, [r7, #16]
	BaseType_t xReturn = pdFALSE;
 8014174:	2300      	movs	r3, #0
 8014176:	617b      	str	r3, [r7, #20]

		if( pxMutexHolder != NULL )
 8014178:	687b      	ldr	r3, [r7, #4]
 801417a:	2b00      	cmp	r3, #0
 801417c:	d058      	beq.n	8014230 <xTaskPriorityDisinherit+0xc8>
		{
			/* A task can only have an inherited priority if it holds the mutex.
			If the mutex is held by a task then it cannot be given from an
			interrupt, and if a mutex is given by the holding task then it must
			be the running state task. */
			configASSERT( pxTCB == pxCurrentTCB );
 801417e:	4b2f      	ldr	r3, [pc, #188]	@ (801423c <xTaskPriorityDisinherit+0xd4>)
 8014180:	681b      	ldr	r3, [r3, #0]
 8014182:	693a      	ldr	r2, [r7, #16]
 8014184:	429a      	cmp	r2, r3
 8014186:	d00b      	beq.n	80141a0 <xTaskPriorityDisinherit+0x38>
	__asm volatile
 8014188:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801418c:	f383 8811 	msr	BASEPRI, r3
 8014190:	f3bf 8f6f 	isb	sy
 8014194:	f3bf 8f4f 	dsb	sy
 8014198:	60fb      	str	r3, [r7, #12]
}
 801419a:	bf00      	nop
 801419c:	bf00      	nop
 801419e:	e7fd      	b.n	801419c <xTaskPriorityDisinherit+0x34>
			configASSERT( pxTCB->uxMutexesHeld );
 80141a0:	693b      	ldr	r3, [r7, #16]
 80141a2:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 80141a4:	2b00      	cmp	r3, #0
 80141a6:	d10b      	bne.n	80141c0 <xTaskPriorityDisinherit+0x58>
	__asm volatile
 80141a8:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80141ac:	f383 8811 	msr	BASEPRI, r3
 80141b0:	f3bf 8f6f 	isb	sy
 80141b4:	f3bf 8f4f 	dsb	sy
 80141b8:	60bb      	str	r3, [r7, #8]
}
 80141ba:	bf00      	nop
 80141bc:	bf00      	nop
 80141be:	e7fd      	b.n	80141bc <xTaskPriorityDisinherit+0x54>
			( pxTCB->uxMutexesHeld )--;
 80141c0:	693b      	ldr	r3, [r7, #16]
 80141c2:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 80141c4:	1e5a      	subs	r2, r3, #1
 80141c6:	693b      	ldr	r3, [r7, #16]
 80141c8:	651a      	str	r2, [r3, #80]	@ 0x50

			/* Has the holder of the mutex inherited the priority of another
			task? */
			if( pxTCB->uxPriority != pxTCB->uxBasePriority )
 80141ca:	693b      	ldr	r3, [r7, #16]
 80141cc:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 80141ce:	693b      	ldr	r3, [r7, #16]
 80141d0:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 80141d2:	429a      	cmp	r2, r3
 80141d4:	d02c      	beq.n	8014230 <xTaskPriorityDisinherit+0xc8>
			{
				/* Only disinherit if no other mutexes are held. */
				if( pxTCB->uxMutexesHeld == ( UBaseType_t ) 0 )
 80141d6:	693b      	ldr	r3, [r7, #16]
 80141d8:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 80141da:	2b00      	cmp	r3, #0
 80141dc:	d128      	bne.n	8014230 <xTaskPriorityDisinherit+0xc8>
					/* A task can only have an inherited priority if it holds
					the mutex.  If the mutex is held by a task then it cannot be
					given from an interrupt, and if a mutex is given by the
					holding task then it must be the running state task.  Remove
					the holding task from the ready/delayed list. */
					if( uxListRemove( &( pxTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
 80141de:	693b      	ldr	r3, [r7, #16]
 80141e0:	3304      	adds	r3, #4
 80141e2:	4618      	mov	r0, r3
 80141e4:	f7fd fba6 	bl	8011934 <uxListRemove>
					}

					/* Disinherit the priority before adding the task into the
					new	ready list. */
					traceTASK_PRIORITY_DISINHERIT( pxTCB, pxTCB->uxBasePriority );
					pxTCB->uxPriority = pxTCB->uxBasePriority;
 80141e8:	693b      	ldr	r3, [r7, #16]
 80141ea:	6cda      	ldr	r2, [r3, #76]	@ 0x4c
 80141ec:	693b      	ldr	r3, [r7, #16]
 80141ee:	62da      	str	r2, [r3, #44]	@ 0x2c

					/* Reset the event list item value.  It cannot be in use for
					any other purpose if this task is running, and it must be
					running to give back the mutex. */
					listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) pxTCB->uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
 80141f0:	693b      	ldr	r3, [r7, #16]
 80141f2:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80141f4:	f1c3 0238 	rsb	r2, r3, #56	@ 0x38
 80141f8:	693b      	ldr	r3, [r7, #16]
 80141fa:	619a      	str	r2, [r3, #24]
					prvAddTaskToReadyList( pxTCB );
 80141fc:	693b      	ldr	r3, [r7, #16]
 80141fe:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8014200:	4b0f      	ldr	r3, [pc, #60]	@ (8014240 <xTaskPriorityDisinherit+0xd8>)
 8014202:	681b      	ldr	r3, [r3, #0]
 8014204:	429a      	cmp	r2, r3
 8014206:	d903      	bls.n	8014210 <xTaskPriorityDisinherit+0xa8>
 8014208:	693b      	ldr	r3, [r7, #16]
 801420a:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 801420c:	4a0c      	ldr	r2, [pc, #48]	@ (8014240 <xTaskPriorityDisinherit+0xd8>)
 801420e:	6013      	str	r3, [r2, #0]
 8014210:	693b      	ldr	r3, [r7, #16]
 8014212:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8014214:	4613      	mov	r3, r2
 8014216:	009b      	lsls	r3, r3, #2
 8014218:	4413      	add	r3, r2
 801421a:	009b      	lsls	r3, r3, #2
 801421c:	4a09      	ldr	r2, [pc, #36]	@ (8014244 <xTaskPriorityDisinherit+0xdc>)
 801421e:	441a      	add	r2, r3
 8014220:	693b      	ldr	r3, [r7, #16]
 8014222:	3304      	adds	r3, #4
 8014224:	4619      	mov	r1, r3
 8014226:	4610      	mov	r0, r2
 8014228:	f7fd fb27 	bl	801187a <vListInsertEnd>
					in an order different to that in which they were taken.
					If a context switch did not occur when the first mutex was
					returned, even if a task was waiting on it, then a context
					switch should occur when the last mutex is returned whether
					a task is waiting on it or not. */
					xReturn = pdTRUE;
 801422c:	2301      	movs	r3, #1
 801422e:	617b      	str	r3, [r7, #20]
		else
		{
			mtCOVERAGE_TEST_MARKER();
		}

		return xReturn;
 8014230:	697b      	ldr	r3, [r7, #20]
	}
 8014232:	4618      	mov	r0, r3
 8014234:	3718      	adds	r7, #24
 8014236:	46bd      	mov	sp, r7
 8014238:	bd80      	pop	{r7, pc}
 801423a:	bf00      	nop
 801423c:	24003d60 	.word	0x24003d60
 8014240:	2400423c 	.word	0x2400423c
 8014244:	24003d64 	.word	0x24003d64

08014248 <vTaskPriorityDisinheritAfterTimeout>:
/*-----------------------------------------------------------*/

#if ( configUSE_MUTEXES == 1 )

	void vTaskPriorityDisinheritAfterTimeout( TaskHandle_t const pxMutexHolder, UBaseType_t uxHighestPriorityWaitingTask )
	{
 8014248:	b580      	push	{r7, lr}
 801424a:	b088      	sub	sp, #32
 801424c:	af00      	add	r7, sp, #0
 801424e:	6078      	str	r0, [r7, #4]
 8014250:	6039      	str	r1, [r7, #0]
	TCB_t * const pxTCB = pxMutexHolder;
 8014252:	687b      	ldr	r3, [r7, #4]
 8014254:	61bb      	str	r3, [r7, #24]
	UBaseType_t uxPriorityUsedOnEntry, uxPriorityToUse;
	const UBaseType_t uxOnlyOneMutexHeld = ( UBaseType_t ) 1;
 8014256:	2301      	movs	r3, #1
 8014258:	617b      	str	r3, [r7, #20]

		if( pxMutexHolder != NULL )
 801425a:	687b      	ldr	r3, [r7, #4]
 801425c:	2b00      	cmp	r3, #0
 801425e:	d06c      	beq.n	801433a <vTaskPriorityDisinheritAfterTimeout+0xf2>
		{
			/* If pxMutexHolder is not NULL then the holder must hold at least
			one mutex. */
			configASSERT( pxTCB->uxMutexesHeld );
 8014260:	69bb      	ldr	r3, [r7, #24]
 8014262:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 8014264:	2b00      	cmp	r3, #0
 8014266:	d10b      	bne.n	8014280 <vTaskPriorityDisinheritAfterTimeout+0x38>
	__asm volatile
 8014268:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801426c:	f383 8811 	msr	BASEPRI, r3
 8014270:	f3bf 8f6f 	isb	sy
 8014274:	f3bf 8f4f 	dsb	sy
 8014278:	60fb      	str	r3, [r7, #12]
}
 801427a:	bf00      	nop
 801427c:	bf00      	nop
 801427e:	e7fd      	b.n	801427c <vTaskPriorityDisinheritAfterTimeout+0x34>

			/* Determine the priority to which the priority of the task that
			holds the mutex should be set.  This will be the greater of the
			holding task's base priority and the priority of the highest
			priority task that is waiting to obtain the mutex. */
			if( pxTCB->uxBasePriority < uxHighestPriorityWaitingTask )
 8014280:	69bb      	ldr	r3, [r7, #24]
 8014282:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 8014284:	683a      	ldr	r2, [r7, #0]
 8014286:	429a      	cmp	r2, r3
 8014288:	d902      	bls.n	8014290 <vTaskPriorityDisinheritAfterTimeout+0x48>
			{
				uxPriorityToUse = uxHighestPriorityWaitingTask;
 801428a:	683b      	ldr	r3, [r7, #0]
 801428c:	61fb      	str	r3, [r7, #28]
 801428e:	e002      	b.n	8014296 <vTaskPriorityDisinheritAfterTimeout+0x4e>
			}
			else
			{
				uxPriorityToUse = pxTCB->uxBasePriority;
 8014290:	69bb      	ldr	r3, [r7, #24]
 8014292:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 8014294:	61fb      	str	r3, [r7, #28]
			}

			/* Does the priority need to change? */
			if( pxTCB->uxPriority != uxPriorityToUse )
 8014296:	69bb      	ldr	r3, [r7, #24]
 8014298:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 801429a:	69fa      	ldr	r2, [r7, #28]
 801429c:	429a      	cmp	r2, r3
 801429e:	d04c      	beq.n	801433a <vTaskPriorityDisinheritAfterTimeout+0xf2>
			{
				/* Only disinherit if no other mutexes are held.  This is a
				simplification in the priority inheritance implementation.  If
				the task that holds the mutex is also holding other mutexes then
				the other mutexes may have caused the priority inheritance. */
				if( pxTCB->uxMutexesHeld == uxOnlyOneMutexHeld )
 80142a0:	69bb      	ldr	r3, [r7, #24]
 80142a2:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 80142a4:	697a      	ldr	r2, [r7, #20]
 80142a6:	429a      	cmp	r2, r3
 80142a8:	d147      	bne.n	801433a <vTaskPriorityDisinheritAfterTimeout+0xf2>
				{
					/* If a task has timed out because it already holds the
					mutex it was trying to obtain then it cannot of inherited
					its own priority. */
					configASSERT( pxTCB != pxCurrentTCB );
 80142aa:	4b26      	ldr	r3, [pc, #152]	@ (8014344 <vTaskPriorityDisinheritAfterTimeout+0xfc>)
 80142ac:	681b      	ldr	r3, [r3, #0]
 80142ae:	69ba      	ldr	r2, [r7, #24]
 80142b0:	429a      	cmp	r2, r3
 80142b2:	d10b      	bne.n	80142cc <vTaskPriorityDisinheritAfterTimeout+0x84>
	__asm volatile
 80142b4:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80142b8:	f383 8811 	msr	BASEPRI, r3
 80142bc:	f3bf 8f6f 	isb	sy
 80142c0:	f3bf 8f4f 	dsb	sy
 80142c4:	60bb      	str	r3, [r7, #8]
}
 80142c6:	bf00      	nop
 80142c8:	bf00      	nop
 80142ca:	e7fd      	b.n	80142c8 <vTaskPriorityDisinheritAfterTimeout+0x80>

					/* Disinherit the priority, remembering the previous
					priority to facilitate determining the subject task's
					state. */
					traceTASK_PRIORITY_DISINHERIT( pxTCB, pxTCB->uxBasePriority );
					uxPriorityUsedOnEntry = pxTCB->uxPriority;
 80142cc:	69bb      	ldr	r3, [r7, #24]
 80142ce:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80142d0:	613b      	str	r3, [r7, #16]
					pxTCB->uxPriority = uxPriorityToUse;
 80142d2:	69bb      	ldr	r3, [r7, #24]
 80142d4:	69fa      	ldr	r2, [r7, #28]
 80142d6:	62da      	str	r2, [r3, #44]	@ 0x2c

					/* Only reset the event list item value if the value is not
					being used for anything else. */
					if( ( listGET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ) ) & taskEVENT_LIST_ITEM_VALUE_IN_USE ) == 0UL )
 80142d8:	69bb      	ldr	r3, [r7, #24]
 80142da:	699b      	ldr	r3, [r3, #24]
 80142dc:	2b00      	cmp	r3, #0
 80142de:	db04      	blt.n	80142ea <vTaskPriorityDisinheritAfterTimeout+0xa2>
					{
						listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) uxPriorityToUse ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
 80142e0:	69fb      	ldr	r3, [r7, #28]
 80142e2:	f1c3 0238 	rsb	r2, r3, #56	@ 0x38
 80142e6:	69bb      	ldr	r3, [r7, #24]
 80142e8:	619a      	str	r2, [r3, #24]
					then the task that holds the mutex could be in either the
					Ready, Blocked or Suspended states.  Only remove the task
					from its current state list if it is in the Ready state as
					the task's priority is going to change and there is one
					Ready list per priority. */
					if( listIS_CONTAINED_WITHIN( &( pxReadyTasksLists[ uxPriorityUsedOnEntry ] ), &( pxTCB->xStateListItem ) ) != pdFALSE )
 80142ea:	69bb      	ldr	r3, [r7, #24]
 80142ec:	6959      	ldr	r1, [r3, #20]
 80142ee:	693a      	ldr	r2, [r7, #16]
 80142f0:	4613      	mov	r3, r2
 80142f2:	009b      	lsls	r3, r3, #2
 80142f4:	4413      	add	r3, r2
 80142f6:	009b      	lsls	r3, r3, #2
 80142f8:	4a13      	ldr	r2, [pc, #76]	@ (8014348 <vTaskPriorityDisinheritAfterTimeout+0x100>)
 80142fa:	4413      	add	r3, r2
 80142fc:	4299      	cmp	r1, r3
 80142fe:	d11c      	bne.n	801433a <vTaskPriorityDisinheritAfterTimeout+0xf2>
					{
						if( uxListRemove( &( pxTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
 8014300:	69bb      	ldr	r3, [r7, #24]
 8014302:	3304      	adds	r3, #4
 8014304:	4618      	mov	r0, r3
 8014306:	f7fd fb15 	bl	8011934 <uxListRemove>
						else
						{
							mtCOVERAGE_TEST_MARKER();
						}

						prvAddTaskToReadyList( pxTCB );
 801430a:	69bb      	ldr	r3, [r7, #24]
 801430c:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 801430e:	4b0f      	ldr	r3, [pc, #60]	@ (801434c <vTaskPriorityDisinheritAfterTimeout+0x104>)
 8014310:	681b      	ldr	r3, [r3, #0]
 8014312:	429a      	cmp	r2, r3
 8014314:	d903      	bls.n	801431e <vTaskPriorityDisinheritAfterTimeout+0xd6>
 8014316:	69bb      	ldr	r3, [r7, #24]
 8014318:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 801431a:	4a0c      	ldr	r2, [pc, #48]	@ (801434c <vTaskPriorityDisinheritAfterTimeout+0x104>)
 801431c:	6013      	str	r3, [r2, #0]
 801431e:	69bb      	ldr	r3, [r7, #24]
 8014320:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8014322:	4613      	mov	r3, r2
 8014324:	009b      	lsls	r3, r3, #2
 8014326:	4413      	add	r3, r2
 8014328:	009b      	lsls	r3, r3, #2
 801432a:	4a07      	ldr	r2, [pc, #28]	@ (8014348 <vTaskPriorityDisinheritAfterTimeout+0x100>)
 801432c:	441a      	add	r2, r3
 801432e:	69bb      	ldr	r3, [r7, #24]
 8014330:	3304      	adds	r3, #4
 8014332:	4619      	mov	r1, r3
 8014334:	4610      	mov	r0, r2
 8014336:	f7fd faa0 	bl	801187a <vListInsertEnd>
		}
		else
		{
			mtCOVERAGE_TEST_MARKER();
		}
	}
 801433a:	bf00      	nop
 801433c:	3720      	adds	r7, #32
 801433e:	46bd      	mov	sp, r7
 8014340:	bd80      	pop	{r7, pc}
 8014342:	bf00      	nop
 8014344:	24003d60 	.word	0x24003d60
 8014348:	24003d64 	.word	0x24003d64
 801434c:	2400423c 	.word	0x2400423c

08014350 <pvTaskIncrementMutexHeldCount>:
/*-----------------------------------------------------------*/

#if ( configUSE_MUTEXES == 1 )

	TaskHandle_t pvTaskIncrementMutexHeldCount( void )
	{
 8014350:	b480      	push	{r7}
 8014352:	af00      	add	r7, sp, #0
		/* If xSemaphoreCreateMutex() is called before any tasks have been created
		then pxCurrentTCB will be NULL. */
		if( pxCurrentTCB != NULL )
 8014354:	4b07      	ldr	r3, [pc, #28]	@ (8014374 <pvTaskIncrementMutexHeldCount+0x24>)
 8014356:	681b      	ldr	r3, [r3, #0]
 8014358:	2b00      	cmp	r3, #0
 801435a:	d004      	beq.n	8014366 <pvTaskIncrementMutexHeldCount+0x16>
		{
			( pxCurrentTCB->uxMutexesHeld )++;
 801435c:	4b05      	ldr	r3, [pc, #20]	@ (8014374 <pvTaskIncrementMutexHeldCount+0x24>)
 801435e:	681b      	ldr	r3, [r3, #0]
 8014360:	6d1a      	ldr	r2, [r3, #80]	@ 0x50
 8014362:	3201      	adds	r2, #1
 8014364:	651a      	str	r2, [r3, #80]	@ 0x50
		}

		return pxCurrentTCB;
 8014366:	4b03      	ldr	r3, [pc, #12]	@ (8014374 <pvTaskIncrementMutexHeldCount+0x24>)
 8014368:	681b      	ldr	r3, [r3, #0]
	}
 801436a:	4618      	mov	r0, r3
 801436c:	46bd      	mov	sp, r7
 801436e:	f85d 7b04 	ldr.w	r7, [sp], #4
 8014372:	4770      	bx	lr
 8014374:	24003d60 	.word	0x24003d60

08014378 <xTaskNotifyWait>:
/*-----------------------------------------------------------*/

#if( configUSE_TASK_NOTIFICATIONS == 1 )

	BaseType_t xTaskNotifyWait( uint32_t ulBitsToClearOnEntry, uint32_t ulBitsToClearOnExit, uint32_t *pulNotificationValue, TickType_t xTicksToWait )
	{
 8014378:	b580      	push	{r7, lr}
 801437a:	b086      	sub	sp, #24
 801437c:	af00      	add	r7, sp, #0
 801437e:	60f8      	str	r0, [r7, #12]
 8014380:	60b9      	str	r1, [r7, #8]
 8014382:	607a      	str	r2, [r7, #4]
 8014384:	603b      	str	r3, [r7, #0]
	BaseType_t xReturn;

		taskENTER_CRITICAL();
 8014386:	f000 ffc7 	bl	8015318 <vPortEnterCritical>
		{
			/* Only block if a notification is not already pending. */
			if( pxCurrentTCB->ucNotifyState != taskNOTIFICATION_RECEIVED )
 801438a:	4b29      	ldr	r3, [pc, #164]	@ (8014430 <xTaskNotifyWait+0xb8>)
 801438c:	681b      	ldr	r3, [r3, #0]
 801438e:	f893 30a4 	ldrb.w	r3, [r3, #164]	@ 0xa4
 8014392:	b2db      	uxtb	r3, r3
 8014394:	2b02      	cmp	r3, #2
 8014396:	d01c      	beq.n	80143d2 <xTaskNotifyWait+0x5a>
			{
				/* Clear bits in the task's notification value as bits may get
				set	by the notifying task or interrupt.  This can be used to
				clear the value to zero. */
				pxCurrentTCB->ulNotifiedValue &= ~ulBitsToClearOnEntry;
 8014398:	4b25      	ldr	r3, [pc, #148]	@ (8014430 <xTaskNotifyWait+0xb8>)
 801439a:	681b      	ldr	r3, [r3, #0]
 801439c:	f8d3 10a0 	ldr.w	r1, [r3, #160]	@ 0xa0
 80143a0:	68fa      	ldr	r2, [r7, #12]
 80143a2:	43d2      	mvns	r2, r2
 80143a4:	400a      	ands	r2, r1
 80143a6:	f8c3 20a0 	str.w	r2, [r3, #160]	@ 0xa0

				/* Mark this task as waiting for a notification. */
				pxCurrentTCB->ucNotifyState = taskWAITING_NOTIFICATION;
 80143aa:	4b21      	ldr	r3, [pc, #132]	@ (8014430 <xTaskNotifyWait+0xb8>)
 80143ac:	681b      	ldr	r3, [r3, #0]
 80143ae:	2201      	movs	r2, #1
 80143b0:	f883 20a4 	strb.w	r2, [r3, #164]	@ 0xa4

				if( xTicksToWait > ( TickType_t ) 0 )
 80143b4:	683b      	ldr	r3, [r7, #0]
 80143b6:	2b00      	cmp	r3, #0
 80143b8:	d00b      	beq.n	80143d2 <xTaskNotifyWait+0x5a>
				{
					prvAddCurrentTaskToDelayedList( xTicksToWait, pdTRUE );
 80143ba:	2101      	movs	r1, #1
 80143bc:	6838      	ldr	r0, [r7, #0]
 80143be:	f000 fa09 	bl	80147d4 <prvAddCurrentTaskToDelayedList>

					/* All ports are written to allow a yield in a critical
					section (some will yield immediately, others wait until the
					critical section exits) - but it is not something that
					application code should ever do. */
					portYIELD_WITHIN_API();
 80143c2:	4b1c      	ldr	r3, [pc, #112]	@ (8014434 <xTaskNotifyWait+0xbc>)
 80143c4:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 80143c8:	601a      	str	r2, [r3, #0]
 80143ca:	f3bf 8f4f 	dsb	sy
 80143ce:	f3bf 8f6f 	isb	sy
			else
			{
				mtCOVERAGE_TEST_MARKER();
			}
		}
		taskEXIT_CRITICAL();
 80143d2:	f000 ffd3 	bl	801537c <vPortExitCritical>

		taskENTER_CRITICAL();
 80143d6:	f000 ff9f 	bl	8015318 <vPortEnterCritical>
		{
			traceTASK_NOTIFY_WAIT();

			if( pulNotificationValue != NULL )
 80143da:	687b      	ldr	r3, [r7, #4]
 80143dc:	2b00      	cmp	r3, #0
 80143de:	d005      	beq.n	80143ec <xTaskNotifyWait+0x74>
			{
				/* Output the current notification value, which may or may not
				have changed. */
				*pulNotificationValue = pxCurrentTCB->ulNotifiedValue;
 80143e0:	4b13      	ldr	r3, [pc, #76]	@ (8014430 <xTaskNotifyWait+0xb8>)
 80143e2:	681b      	ldr	r3, [r3, #0]
 80143e4:	f8d3 20a0 	ldr.w	r2, [r3, #160]	@ 0xa0
 80143e8:	687b      	ldr	r3, [r7, #4]
 80143ea:	601a      	str	r2, [r3, #0]

			/* If ucNotifyValue is set then either the task never entered the
			blocked state (because a notification was already pending) or the
			task unblocked because of a notification.  Otherwise the task
			unblocked because of a timeout. */
			if( pxCurrentTCB->ucNotifyState != taskNOTIFICATION_RECEIVED )
 80143ec:	4b10      	ldr	r3, [pc, #64]	@ (8014430 <xTaskNotifyWait+0xb8>)
 80143ee:	681b      	ldr	r3, [r3, #0]
 80143f0:	f893 30a4 	ldrb.w	r3, [r3, #164]	@ 0xa4
 80143f4:	b2db      	uxtb	r3, r3
 80143f6:	2b02      	cmp	r3, #2
 80143f8:	d002      	beq.n	8014400 <xTaskNotifyWait+0x88>
			{
				/* A notification was not received. */
				xReturn = pdFALSE;
 80143fa:	2300      	movs	r3, #0
 80143fc:	617b      	str	r3, [r7, #20]
 80143fe:	e00a      	b.n	8014416 <xTaskNotifyWait+0x9e>
			}
			else
			{
				/* A notification was already pending or a notification was
				received while the task was waiting. */
				pxCurrentTCB->ulNotifiedValue &= ~ulBitsToClearOnExit;
 8014400:	4b0b      	ldr	r3, [pc, #44]	@ (8014430 <xTaskNotifyWait+0xb8>)
 8014402:	681b      	ldr	r3, [r3, #0]
 8014404:	f8d3 10a0 	ldr.w	r1, [r3, #160]	@ 0xa0
 8014408:	68ba      	ldr	r2, [r7, #8]
 801440a:	43d2      	mvns	r2, r2
 801440c:	400a      	ands	r2, r1
 801440e:	f8c3 20a0 	str.w	r2, [r3, #160]	@ 0xa0
				xReturn = pdTRUE;
 8014412:	2301      	movs	r3, #1
 8014414:	617b      	str	r3, [r7, #20]
			}

			pxCurrentTCB->ucNotifyState = taskNOT_WAITING_NOTIFICATION;
 8014416:	4b06      	ldr	r3, [pc, #24]	@ (8014430 <xTaskNotifyWait+0xb8>)
 8014418:	681b      	ldr	r3, [r3, #0]
 801441a:	2200      	movs	r2, #0
 801441c:	f883 20a4 	strb.w	r2, [r3, #164]	@ 0xa4
		}
		taskEXIT_CRITICAL();
 8014420:	f000 ffac 	bl	801537c <vPortExitCritical>

		return xReturn;
 8014424:	697b      	ldr	r3, [r7, #20]
	}
 8014426:	4618      	mov	r0, r3
 8014428:	3718      	adds	r7, #24
 801442a:	46bd      	mov	sp, r7
 801442c:	bd80      	pop	{r7, pc}
 801442e:	bf00      	nop
 8014430:	24003d60 	.word	0x24003d60
 8014434:	e000ed04 	.word	0xe000ed04

08014438 <xTaskGenericNotify>:
/*-----------------------------------------------------------*/

#if( configUSE_TASK_NOTIFICATIONS == 1 )

	BaseType_t xTaskGenericNotify( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotificationValue )
	{
 8014438:	b580      	push	{r7, lr}
 801443a:	b08a      	sub	sp, #40	@ 0x28
 801443c:	af00      	add	r7, sp, #0
 801443e:	60f8      	str	r0, [r7, #12]
 8014440:	60b9      	str	r1, [r7, #8]
 8014442:	603b      	str	r3, [r7, #0]
 8014444:	4613      	mov	r3, r2
 8014446:	71fb      	strb	r3, [r7, #7]
	TCB_t * pxTCB;
	BaseType_t xReturn = pdPASS;
 8014448:	2301      	movs	r3, #1
 801444a:	627b      	str	r3, [r7, #36]	@ 0x24
	uint8_t ucOriginalNotifyState;

		configASSERT( xTaskToNotify );
 801444c:	68fb      	ldr	r3, [r7, #12]
 801444e:	2b00      	cmp	r3, #0
 8014450:	d10b      	bne.n	801446a <xTaskGenericNotify+0x32>
	__asm volatile
 8014452:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8014456:	f383 8811 	msr	BASEPRI, r3
 801445a:	f3bf 8f6f 	isb	sy
 801445e:	f3bf 8f4f 	dsb	sy
 8014462:	61bb      	str	r3, [r7, #24]
}
 8014464:	bf00      	nop
 8014466:	bf00      	nop
 8014468:	e7fd      	b.n	8014466 <xTaskGenericNotify+0x2e>
		pxTCB = xTaskToNotify;
 801446a:	68fb      	ldr	r3, [r7, #12]
 801446c:	623b      	str	r3, [r7, #32]

		taskENTER_CRITICAL();
 801446e:	f000 ff53 	bl	8015318 <vPortEnterCritical>
		{
			if( pulPreviousNotificationValue != NULL )
 8014472:	683b      	ldr	r3, [r7, #0]
 8014474:	2b00      	cmp	r3, #0
 8014476:	d004      	beq.n	8014482 <xTaskGenericNotify+0x4a>
			{
				*pulPreviousNotificationValue = pxTCB->ulNotifiedValue;
 8014478:	6a3b      	ldr	r3, [r7, #32]
 801447a:	f8d3 20a0 	ldr.w	r2, [r3, #160]	@ 0xa0
 801447e:	683b      	ldr	r3, [r7, #0]
 8014480:	601a      	str	r2, [r3, #0]
			}

			ucOriginalNotifyState = pxTCB->ucNotifyState;
 8014482:	6a3b      	ldr	r3, [r7, #32]
 8014484:	f893 30a4 	ldrb.w	r3, [r3, #164]	@ 0xa4
 8014488:	77fb      	strb	r3, [r7, #31]

			pxTCB->ucNotifyState = taskNOTIFICATION_RECEIVED;
 801448a:	6a3b      	ldr	r3, [r7, #32]
 801448c:	2202      	movs	r2, #2
 801448e:	f883 20a4 	strb.w	r2, [r3, #164]	@ 0xa4

			switch( eAction )
 8014492:	79fb      	ldrb	r3, [r7, #7]
 8014494:	2b04      	cmp	r3, #4
 8014496:	d82e      	bhi.n	80144f6 <xTaskGenericNotify+0xbe>
 8014498:	a201      	add	r2, pc, #4	@ (adr r2, 80144a0 <xTaskGenericNotify+0x68>)
 801449a:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 801449e:	bf00      	nop
 80144a0:	0801451b 	.word	0x0801451b
 80144a4:	080144b5 	.word	0x080144b5
 80144a8:	080144c7 	.word	0x080144c7
 80144ac:	080144d7 	.word	0x080144d7
 80144b0:	080144e1 	.word	0x080144e1
			{
				case eSetBits	:
					pxTCB->ulNotifiedValue |= ulValue;
 80144b4:	6a3b      	ldr	r3, [r7, #32]
 80144b6:	f8d3 20a0 	ldr.w	r2, [r3, #160]	@ 0xa0
 80144ba:	68bb      	ldr	r3, [r7, #8]
 80144bc:	431a      	orrs	r2, r3
 80144be:	6a3b      	ldr	r3, [r7, #32]
 80144c0:	f8c3 20a0 	str.w	r2, [r3, #160]	@ 0xa0
					break;
 80144c4:	e02c      	b.n	8014520 <xTaskGenericNotify+0xe8>

				case eIncrement	:
					( pxTCB->ulNotifiedValue )++;
 80144c6:	6a3b      	ldr	r3, [r7, #32]
 80144c8:	f8d3 30a0 	ldr.w	r3, [r3, #160]	@ 0xa0
 80144cc:	1c5a      	adds	r2, r3, #1
 80144ce:	6a3b      	ldr	r3, [r7, #32]
 80144d0:	f8c3 20a0 	str.w	r2, [r3, #160]	@ 0xa0
					break;
 80144d4:	e024      	b.n	8014520 <xTaskGenericNotify+0xe8>

				case eSetValueWithOverwrite	:
					pxTCB->ulNotifiedValue = ulValue;
 80144d6:	6a3b      	ldr	r3, [r7, #32]
 80144d8:	68ba      	ldr	r2, [r7, #8]
 80144da:	f8c3 20a0 	str.w	r2, [r3, #160]	@ 0xa0
					break;
 80144de:	e01f      	b.n	8014520 <xTaskGenericNotify+0xe8>

				case eSetValueWithoutOverwrite :
					if( ucOriginalNotifyState != taskNOTIFICATION_RECEIVED )
 80144e0:	7ffb      	ldrb	r3, [r7, #31]
 80144e2:	2b02      	cmp	r3, #2
 80144e4:	d004      	beq.n	80144f0 <xTaskGenericNotify+0xb8>
					{
						pxTCB->ulNotifiedValue = ulValue;
 80144e6:	6a3b      	ldr	r3, [r7, #32]
 80144e8:	68ba      	ldr	r2, [r7, #8]
 80144ea:	f8c3 20a0 	str.w	r2, [r3, #160]	@ 0xa0
					else
					{
						/* The value could not be written to the task. */
						xReturn = pdFAIL;
					}
					break;
 80144ee:	e017      	b.n	8014520 <xTaskGenericNotify+0xe8>
						xReturn = pdFAIL;
 80144f0:	2300      	movs	r3, #0
 80144f2:	627b      	str	r3, [r7, #36]	@ 0x24
					break;
 80144f4:	e014      	b.n	8014520 <xTaskGenericNotify+0xe8>

				default:
					/* Should not get here if all enums are handled.
					Artificially force an assert by testing a value the
					compiler can't assume is const. */
					configASSERT( pxTCB->ulNotifiedValue == ~0UL );
 80144f6:	6a3b      	ldr	r3, [r7, #32]
 80144f8:	f8d3 30a0 	ldr.w	r3, [r3, #160]	@ 0xa0
 80144fc:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8014500:	d00d      	beq.n	801451e <xTaskGenericNotify+0xe6>
	__asm volatile
 8014502:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8014506:	f383 8811 	msr	BASEPRI, r3
 801450a:	f3bf 8f6f 	isb	sy
 801450e:	f3bf 8f4f 	dsb	sy
 8014512:	617b      	str	r3, [r7, #20]
}
 8014514:	bf00      	nop
 8014516:	bf00      	nop
 8014518:	e7fd      	b.n	8014516 <xTaskGenericNotify+0xde>
					break;
 801451a:	bf00      	nop
 801451c:	e000      	b.n	8014520 <xTaskGenericNotify+0xe8>

					break;
 801451e:	bf00      	nop

			traceTASK_NOTIFY();

			/* If the task is in the blocked state specifically to wait for a
			notification then unblock it now. */
			if( ucOriginalNotifyState == taskWAITING_NOTIFICATION )
 8014520:	7ffb      	ldrb	r3, [r7, #31]
 8014522:	2b01      	cmp	r3, #1
 8014524:	d13b      	bne.n	801459e <xTaskGenericNotify+0x166>
			{
				( void ) uxListRemove( &( pxTCB->xStateListItem ) );
 8014526:	6a3b      	ldr	r3, [r7, #32]
 8014528:	3304      	adds	r3, #4
 801452a:	4618      	mov	r0, r3
 801452c:	f7fd fa02 	bl	8011934 <uxListRemove>
				prvAddTaskToReadyList( pxTCB );
 8014530:	6a3b      	ldr	r3, [r7, #32]
 8014532:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8014534:	4b1d      	ldr	r3, [pc, #116]	@ (80145ac <xTaskGenericNotify+0x174>)
 8014536:	681b      	ldr	r3, [r3, #0]
 8014538:	429a      	cmp	r2, r3
 801453a:	d903      	bls.n	8014544 <xTaskGenericNotify+0x10c>
 801453c:	6a3b      	ldr	r3, [r7, #32]
 801453e:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8014540:	4a1a      	ldr	r2, [pc, #104]	@ (80145ac <xTaskGenericNotify+0x174>)
 8014542:	6013      	str	r3, [r2, #0]
 8014544:	6a3b      	ldr	r3, [r7, #32]
 8014546:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8014548:	4613      	mov	r3, r2
 801454a:	009b      	lsls	r3, r3, #2
 801454c:	4413      	add	r3, r2
 801454e:	009b      	lsls	r3, r3, #2
 8014550:	4a17      	ldr	r2, [pc, #92]	@ (80145b0 <xTaskGenericNotify+0x178>)
 8014552:	441a      	add	r2, r3
 8014554:	6a3b      	ldr	r3, [r7, #32]
 8014556:	3304      	adds	r3, #4
 8014558:	4619      	mov	r1, r3
 801455a:	4610      	mov	r0, r2
 801455c:	f7fd f98d 	bl	801187a <vListInsertEnd>

				/* The task should not have been on an event list. */
				configASSERT( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) == NULL );
 8014560:	6a3b      	ldr	r3, [r7, #32]
 8014562:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 8014564:	2b00      	cmp	r3, #0
 8014566:	d00b      	beq.n	8014580 <xTaskGenericNotify+0x148>
	__asm volatile
 8014568:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801456c:	f383 8811 	msr	BASEPRI, r3
 8014570:	f3bf 8f6f 	isb	sy
 8014574:	f3bf 8f4f 	dsb	sy
 8014578:	613b      	str	r3, [r7, #16]
}
 801457a:	bf00      	nop
 801457c:	bf00      	nop
 801457e:	e7fd      	b.n	801457c <xTaskGenericNotify+0x144>
					earliest possible time. */
					prvResetNextTaskUnblockTime();
				}
				#endif

				if( pxTCB->uxPriority > pxCurrentTCB->uxPriority )
 8014580:	6a3b      	ldr	r3, [r7, #32]
 8014582:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8014584:	4b0b      	ldr	r3, [pc, #44]	@ (80145b4 <xTaskGenericNotify+0x17c>)
 8014586:	681b      	ldr	r3, [r3, #0]
 8014588:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 801458a:	429a      	cmp	r2, r3
 801458c:	d907      	bls.n	801459e <xTaskGenericNotify+0x166>
				{
					/* The notified task has a priority above the currently
					executing task so a yield is required. */
					taskYIELD_IF_USING_PREEMPTION();
 801458e:	4b0a      	ldr	r3, [pc, #40]	@ (80145b8 <xTaskGenericNotify+0x180>)
 8014590:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8014594:	601a      	str	r2, [r3, #0]
 8014596:	f3bf 8f4f 	dsb	sy
 801459a:	f3bf 8f6f 	isb	sy
			else
			{
				mtCOVERAGE_TEST_MARKER();
			}
		}
		taskEXIT_CRITICAL();
 801459e:	f000 feed 	bl	801537c <vPortExitCritical>

		return xReturn;
 80145a2:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
	}
 80145a4:	4618      	mov	r0, r3
 80145a6:	3728      	adds	r7, #40	@ 0x28
 80145a8:	46bd      	mov	sp, r7
 80145aa:	bd80      	pop	{r7, pc}
 80145ac:	2400423c 	.word	0x2400423c
 80145b0:	24003d64 	.word	0x24003d64
 80145b4:	24003d60 	.word	0x24003d60
 80145b8:	e000ed04 	.word	0xe000ed04

080145bc <xTaskGenericNotifyFromISR>:
/*-----------------------------------------------------------*/

#if( configUSE_TASK_NOTIFICATIONS == 1 )

	BaseType_t xTaskGenericNotifyFromISR( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotificationValue, BaseType_t *pxHigherPriorityTaskWoken )
	{
 80145bc:	b580      	push	{r7, lr}
 80145be:	b08e      	sub	sp, #56	@ 0x38
 80145c0:	af00      	add	r7, sp, #0
 80145c2:	60f8      	str	r0, [r7, #12]
 80145c4:	60b9      	str	r1, [r7, #8]
 80145c6:	603b      	str	r3, [r7, #0]
 80145c8:	4613      	mov	r3, r2
 80145ca:	71fb      	strb	r3, [r7, #7]
	TCB_t * pxTCB;
	uint8_t ucOriginalNotifyState;
	BaseType_t xReturn = pdPASS;
 80145cc:	2301      	movs	r3, #1
 80145ce:	637b      	str	r3, [r7, #52]	@ 0x34
	UBaseType_t uxSavedInterruptStatus;

		configASSERT( xTaskToNotify );
 80145d0:	68fb      	ldr	r3, [r7, #12]
 80145d2:	2b00      	cmp	r3, #0
 80145d4:	d10b      	bne.n	80145ee <xTaskGenericNotifyFromISR+0x32>
	__asm volatile
 80145d6:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80145da:	f383 8811 	msr	BASEPRI, r3
 80145de:	f3bf 8f6f 	isb	sy
 80145e2:	f3bf 8f4f 	dsb	sy
 80145e6:	627b      	str	r3, [r7, #36]	@ 0x24
}
 80145e8:	bf00      	nop
 80145ea:	bf00      	nop
 80145ec:	e7fd      	b.n	80145ea <xTaskGenericNotifyFromISR+0x2e>
		below the maximum system call interrupt priority.  FreeRTOS maintains a
		separate interrupt safe API to ensure interrupt entry is as fast and as
		simple as possible.  More information (albeit Cortex-M specific) is
		provided on the following link:
		http://www.freertos.org/RTOS-Cortex-M3-M4.html */
		portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
 80145ee:	f000 ff73 	bl	80154d8 <vPortValidateInterruptPriority>

		pxTCB = xTaskToNotify;
 80145f2:	68fb      	ldr	r3, [r7, #12]
 80145f4:	633b      	str	r3, [r7, #48]	@ 0x30
	__asm volatile
 80145f6:	f3ef 8211 	mrs	r2, BASEPRI
 80145fa:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80145fe:	f383 8811 	msr	BASEPRI, r3
 8014602:	f3bf 8f6f 	isb	sy
 8014606:	f3bf 8f4f 	dsb	sy
 801460a:	623a      	str	r2, [r7, #32]
 801460c:	61fb      	str	r3, [r7, #28]
	return ulOriginalBASEPRI;
 801460e:	6a3b      	ldr	r3, [r7, #32]

		uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
 8014610:	62fb      	str	r3, [r7, #44]	@ 0x2c
		{
			if( pulPreviousNotificationValue != NULL )
 8014612:	683b      	ldr	r3, [r7, #0]
 8014614:	2b00      	cmp	r3, #0
 8014616:	d004      	beq.n	8014622 <xTaskGenericNotifyFromISR+0x66>
			{
				*pulPreviousNotificationValue = pxTCB->ulNotifiedValue;
 8014618:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801461a:	f8d3 20a0 	ldr.w	r2, [r3, #160]	@ 0xa0
 801461e:	683b      	ldr	r3, [r7, #0]
 8014620:	601a      	str	r2, [r3, #0]
			}

			ucOriginalNotifyState = pxTCB->ucNotifyState;
 8014622:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8014624:	f893 30a4 	ldrb.w	r3, [r3, #164]	@ 0xa4
 8014628:	f887 302b 	strb.w	r3, [r7, #43]	@ 0x2b
			pxTCB->ucNotifyState = taskNOTIFICATION_RECEIVED;
 801462c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801462e:	2202      	movs	r2, #2
 8014630:	f883 20a4 	strb.w	r2, [r3, #164]	@ 0xa4

			switch( eAction )
 8014634:	79fb      	ldrb	r3, [r7, #7]
 8014636:	2b04      	cmp	r3, #4
 8014638:	d82e      	bhi.n	8014698 <xTaskGenericNotifyFromISR+0xdc>
 801463a:	a201      	add	r2, pc, #4	@ (adr r2, 8014640 <xTaskGenericNotifyFromISR+0x84>)
 801463c:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 8014640:	080146bd 	.word	0x080146bd
 8014644:	08014655 	.word	0x08014655
 8014648:	08014667 	.word	0x08014667
 801464c:	08014677 	.word	0x08014677
 8014650:	08014681 	.word	0x08014681
			{
				case eSetBits	:
					pxTCB->ulNotifiedValue |= ulValue;
 8014654:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8014656:	f8d3 20a0 	ldr.w	r2, [r3, #160]	@ 0xa0
 801465a:	68bb      	ldr	r3, [r7, #8]
 801465c:	431a      	orrs	r2, r3
 801465e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8014660:	f8c3 20a0 	str.w	r2, [r3, #160]	@ 0xa0
					break;
 8014664:	e02d      	b.n	80146c2 <xTaskGenericNotifyFromISR+0x106>

				case eIncrement	:
					( pxTCB->ulNotifiedValue )++;
 8014666:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8014668:	f8d3 30a0 	ldr.w	r3, [r3, #160]	@ 0xa0
 801466c:	1c5a      	adds	r2, r3, #1
 801466e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8014670:	f8c3 20a0 	str.w	r2, [r3, #160]	@ 0xa0
					break;
 8014674:	e025      	b.n	80146c2 <xTaskGenericNotifyFromISR+0x106>

				case eSetValueWithOverwrite	:
					pxTCB->ulNotifiedValue = ulValue;
 8014676:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8014678:	68ba      	ldr	r2, [r7, #8]
 801467a:	f8c3 20a0 	str.w	r2, [r3, #160]	@ 0xa0
					break;
 801467e:	e020      	b.n	80146c2 <xTaskGenericNotifyFromISR+0x106>

				case eSetValueWithoutOverwrite :
					if( ucOriginalNotifyState != taskNOTIFICATION_RECEIVED )
 8014680:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 8014684:	2b02      	cmp	r3, #2
 8014686:	d004      	beq.n	8014692 <xTaskGenericNotifyFromISR+0xd6>
					{
						pxTCB->ulNotifiedValue = ulValue;
 8014688:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801468a:	68ba      	ldr	r2, [r7, #8]
 801468c:	f8c3 20a0 	str.w	r2, [r3, #160]	@ 0xa0
					else
					{
						/* The value could not be written to the task. */
						xReturn = pdFAIL;
					}
					break;
 8014690:	e017      	b.n	80146c2 <xTaskGenericNotifyFromISR+0x106>
						xReturn = pdFAIL;
 8014692:	2300      	movs	r3, #0
 8014694:	637b      	str	r3, [r7, #52]	@ 0x34
					break;
 8014696:	e014      	b.n	80146c2 <xTaskGenericNotifyFromISR+0x106>

				default:
					/* Should not get here if all enums are handled.
					Artificially force an assert by testing a value the
					compiler can't assume is const. */
					configASSERT( pxTCB->ulNotifiedValue == ~0UL );
 8014698:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801469a:	f8d3 30a0 	ldr.w	r3, [r3, #160]	@ 0xa0
 801469e:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 80146a2:	d00d      	beq.n	80146c0 <xTaskGenericNotifyFromISR+0x104>
	__asm volatile
 80146a4:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80146a8:	f383 8811 	msr	BASEPRI, r3
 80146ac:	f3bf 8f6f 	isb	sy
 80146b0:	f3bf 8f4f 	dsb	sy
 80146b4:	61bb      	str	r3, [r7, #24]
}
 80146b6:	bf00      	nop
 80146b8:	bf00      	nop
 80146ba:	e7fd      	b.n	80146b8 <xTaskGenericNotifyFromISR+0xfc>
					break;
 80146bc:	bf00      	nop
 80146be:	e000      	b.n	80146c2 <xTaskGenericNotifyFromISR+0x106>
					break;
 80146c0:	bf00      	nop

			traceTASK_NOTIFY_FROM_ISR();

			/* If the task is in the blocked state specifically to wait for a
			notification then unblock it now. */
			if( ucOriginalNotifyState == taskWAITING_NOTIFICATION )
 80146c2:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 80146c6:	2b01      	cmp	r3, #1
 80146c8:	d147      	bne.n	801475a <xTaskGenericNotifyFromISR+0x19e>
			{
				/* The task should not have been on an event list. */
				configASSERT( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) == NULL );
 80146ca:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80146cc:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 80146ce:	2b00      	cmp	r3, #0
 80146d0:	d00b      	beq.n	80146ea <xTaskGenericNotifyFromISR+0x12e>
	__asm volatile
 80146d2:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80146d6:	f383 8811 	msr	BASEPRI, r3
 80146da:	f3bf 8f6f 	isb	sy
 80146de:	f3bf 8f4f 	dsb	sy
 80146e2:	617b      	str	r3, [r7, #20]
}
 80146e4:	bf00      	nop
 80146e6:	bf00      	nop
 80146e8:	e7fd      	b.n	80146e6 <xTaskGenericNotifyFromISR+0x12a>

				if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
 80146ea:	4b21      	ldr	r3, [pc, #132]	@ (8014770 <xTaskGenericNotifyFromISR+0x1b4>)
 80146ec:	681b      	ldr	r3, [r3, #0]
 80146ee:	2b00      	cmp	r3, #0
 80146f0:	d11d      	bne.n	801472e <xTaskGenericNotifyFromISR+0x172>
				{
					( void ) uxListRemove( &( pxTCB->xStateListItem ) );
 80146f2:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80146f4:	3304      	adds	r3, #4
 80146f6:	4618      	mov	r0, r3
 80146f8:	f7fd f91c 	bl	8011934 <uxListRemove>
					prvAddTaskToReadyList( pxTCB );
 80146fc:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80146fe:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8014700:	4b1c      	ldr	r3, [pc, #112]	@ (8014774 <xTaskGenericNotifyFromISR+0x1b8>)
 8014702:	681b      	ldr	r3, [r3, #0]
 8014704:	429a      	cmp	r2, r3
 8014706:	d903      	bls.n	8014710 <xTaskGenericNotifyFromISR+0x154>
 8014708:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801470a:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 801470c:	4a19      	ldr	r2, [pc, #100]	@ (8014774 <xTaskGenericNotifyFromISR+0x1b8>)
 801470e:	6013      	str	r3, [r2, #0]
 8014710:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8014712:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8014714:	4613      	mov	r3, r2
 8014716:	009b      	lsls	r3, r3, #2
 8014718:	4413      	add	r3, r2
 801471a:	009b      	lsls	r3, r3, #2
 801471c:	4a16      	ldr	r2, [pc, #88]	@ (8014778 <xTaskGenericNotifyFromISR+0x1bc>)
 801471e:	441a      	add	r2, r3
 8014720:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8014722:	3304      	adds	r3, #4
 8014724:	4619      	mov	r1, r3
 8014726:	4610      	mov	r0, r2
 8014728:	f7fd f8a7 	bl	801187a <vListInsertEnd>
 801472c:	e005      	b.n	801473a <xTaskGenericNotifyFromISR+0x17e>
				}
				else
				{
					/* The delayed and ready lists cannot be accessed, so hold
					this task pending until the scheduler is resumed. */
					vListInsertEnd( &( xPendingReadyList ), &( pxTCB->xEventListItem ) );
 801472e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8014730:	3318      	adds	r3, #24
 8014732:	4619      	mov	r1, r3
 8014734:	4811      	ldr	r0, [pc, #68]	@ (801477c <xTaskGenericNotifyFromISR+0x1c0>)
 8014736:	f7fd f8a0 	bl	801187a <vListInsertEnd>
				}

				if( pxTCB->uxPriority > pxCurrentTCB->uxPriority )
 801473a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801473c:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 801473e:	4b10      	ldr	r3, [pc, #64]	@ (8014780 <xTaskGenericNotifyFromISR+0x1c4>)
 8014740:	681b      	ldr	r3, [r3, #0]
 8014742:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8014744:	429a      	cmp	r2, r3
 8014746:	d908      	bls.n	801475a <xTaskGenericNotifyFromISR+0x19e>
				{
					/* The notified task has a priority above the currently
					executing task so a yield is required. */
					if( pxHigherPriorityTaskWoken != NULL )
 8014748:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801474a:	2b00      	cmp	r3, #0
 801474c:	d002      	beq.n	8014754 <xTaskGenericNotifyFromISR+0x198>
					{
						*pxHigherPriorityTaskWoken = pdTRUE;
 801474e:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8014750:	2201      	movs	r2, #1
 8014752:	601a      	str	r2, [r3, #0]
					}

					/* Mark that a yield is pending in case the user is not
					using the "xHigherPriorityTaskWoken" parameter to an ISR
					safe FreeRTOS function. */
					xYieldPending = pdTRUE;
 8014754:	4b0b      	ldr	r3, [pc, #44]	@ (8014784 <xTaskGenericNotifyFromISR+0x1c8>)
 8014756:	2201      	movs	r2, #1
 8014758:	601a      	str	r2, [r3, #0]
 801475a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801475c:	613b      	str	r3, [r7, #16]
	__asm volatile
 801475e:	693b      	ldr	r3, [r7, #16]
 8014760:	f383 8811 	msr	BASEPRI, r3
}
 8014764:	bf00      	nop
				}
			}
		}
		portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );

		return xReturn;
 8014766:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
	}
 8014768:	4618      	mov	r0, r3
 801476a:	3738      	adds	r7, #56	@ 0x38
 801476c:	46bd      	mov	sp, r7
 801476e:	bd80      	pop	{r7, pc}
 8014770:	2400425c 	.word	0x2400425c
 8014774:	2400423c 	.word	0x2400423c
 8014778:	24003d64 	.word	0x24003d64
 801477c:	240041f4 	.word	0x240041f4
 8014780:	24003d60 	.word	0x24003d60
 8014784:	24004248 	.word	0x24004248

08014788 <xTaskNotifyStateClear>:
/*-----------------------------------------------------------*/

#if( configUSE_TASK_NOTIFICATIONS == 1 )

	BaseType_t xTaskNotifyStateClear( TaskHandle_t xTask )
	{
 8014788:	b580      	push	{r7, lr}
 801478a:	b084      	sub	sp, #16
 801478c:	af00      	add	r7, sp, #0
 801478e:	6078      	str	r0, [r7, #4]
	TCB_t *pxTCB;
	BaseType_t xReturn;

		/* If null is passed in here then it is the calling task that is having
		its notification state cleared. */
		pxTCB = prvGetTCBFromHandle( xTask );
 8014790:	687b      	ldr	r3, [r7, #4]
 8014792:	2b00      	cmp	r3, #0
 8014794:	d102      	bne.n	801479c <xTaskNotifyStateClear+0x14>
 8014796:	4b0e      	ldr	r3, [pc, #56]	@ (80147d0 <xTaskNotifyStateClear+0x48>)
 8014798:	681b      	ldr	r3, [r3, #0]
 801479a:	e000      	b.n	801479e <xTaskNotifyStateClear+0x16>
 801479c:	687b      	ldr	r3, [r7, #4]
 801479e:	60bb      	str	r3, [r7, #8]

		taskENTER_CRITICAL();
 80147a0:	f000 fdba 	bl	8015318 <vPortEnterCritical>
		{
			if( pxTCB->ucNotifyState == taskNOTIFICATION_RECEIVED )
 80147a4:	68bb      	ldr	r3, [r7, #8]
 80147a6:	f893 30a4 	ldrb.w	r3, [r3, #164]	@ 0xa4
 80147aa:	b2db      	uxtb	r3, r3
 80147ac:	2b02      	cmp	r3, #2
 80147ae:	d106      	bne.n	80147be <xTaskNotifyStateClear+0x36>
			{
				pxTCB->ucNotifyState = taskNOT_WAITING_NOTIFICATION;
 80147b0:	68bb      	ldr	r3, [r7, #8]
 80147b2:	2200      	movs	r2, #0
 80147b4:	f883 20a4 	strb.w	r2, [r3, #164]	@ 0xa4
				xReturn = pdPASS;
 80147b8:	2301      	movs	r3, #1
 80147ba:	60fb      	str	r3, [r7, #12]
 80147bc:	e001      	b.n	80147c2 <xTaskNotifyStateClear+0x3a>
			}
			else
			{
				xReturn = pdFAIL;
 80147be:	2300      	movs	r3, #0
 80147c0:	60fb      	str	r3, [r7, #12]
			}
		}
		taskEXIT_CRITICAL();
 80147c2:	f000 fddb 	bl	801537c <vPortExitCritical>

		return xReturn;
 80147c6:	68fb      	ldr	r3, [r7, #12]
	}
 80147c8:	4618      	mov	r0, r3
 80147ca:	3710      	adds	r7, #16
 80147cc:	46bd      	mov	sp, r7
 80147ce:	bd80      	pop	{r7, pc}
 80147d0:	24003d60 	.word	0x24003d60

080147d4 <prvAddCurrentTaskToDelayedList>:

#endif
/*-----------------------------------------------------------*/

static void prvAddCurrentTaskToDelayedList( TickType_t xTicksToWait, const BaseType_t xCanBlockIndefinitely )
{
 80147d4:	b580      	push	{r7, lr}
 80147d6:	b084      	sub	sp, #16
 80147d8:	af00      	add	r7, sp, #0
 80147da:	6078      	str	r0, [r7, #4]
 80147dc:	6039      	str	r1, [r7, #0]
TickType_t xTimeToWake;
const TickType_t xConstTickCount = xTickCount;
 80147de:	4b21      	ldr	r3, [pc, #132]	@ (8014864 <prvAddCurrentTaskToDelayedList+0x90>)
 80147e0:	681b      	ldr	r3, [r3, #0]
 80147e2:	60fb      	str	r3, [r7, #12]
	}
	#endif

	/* Remove the task from the ready list before adding it to the blocked list
	as the same list item is used for both lists. */
	if( uxListRemove( &( pxCurrentTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
 80147e4:	4b20      	ldr	r3, [pc, #128]	@ (8014868 <prvAddCurrentTaskToDelayedList+0x94>)
 80147e6:	681b      	ldr	r3, [r3, #0]
 80147e8:	3304      	adds	r3, #4
 80147ea:	4618      	mov	r0, r3
 80147ec:	f7fd f8a2 	bl	8011934 <uxListRemove>
		mtCOVERAGE_TEST_MARKER();
	}

	#if ( INCLUDE_vTaskSuspend == 1 )
	{
		if( ( xTicksToWait == portMAX_DELAY ) && ( xCanBlockIndefinitely != pdFALSE ) )
 80147f0:	687b      	ldr	r3, [r7, #4]
 80147f2:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 80147f6:	d10a      	bne.n	801480e <prvAddCurrentTaskToDelayedList+0x3a>
 80147f8:	683b      	ldr	r3, [r7, #0]
 80147fa:	2b00      	cmp	r3, #0
 80147fc:	d007      	beq.n	801480e <prvAddCurrentTaskToDelayedList+0x3a>
		{
			/* Add the task to the suspended task list instead of a delayed task
			list to ensure it is not woken by a timing event.  It will block
			indefinitely. */
			vListInsertEnd( &xSuspendedTaskList, &( pxCurrentTCB->xStateListItem ) );
 80147fe:	4b1a      	ldr	r3, [pc, #104]	@ (8014868 <prvAddCurrentTaskToDelayedList+0x94>)
 8014800:	681b      	ldr	r3, [r3, #0]
 8014802:	3304      	adds	r3, #4
 8014804:	4619      	mov	r1, r3
 8014806:	4819      	ldr	r0, [pc, #100]	@ (801486c <prvAddCurrentTaskToDelayedList+0x98>)
 8014808:	f7fd f837 	bl	801187a <vListInsertEnd>

		/* Avoid compiler warning when INCLUDE_vTaskSuspend is not 1. */
		( void ) xCanBlockIndefinitely;
	}
	#endif /* INCLUDE_vTaskSuspend */
}
 801480c:	e026      	b.n	801485c <prvAddCurrentTaskToDelayedList+0x88>
			xTimeToWake = xConstTickCount + xTicksToWait;
 801480e:	68fa      	ldr	r2, [r7, #12]
 8014810:	687b      	ldr	r3, [r7, #4]
 8014812:	4413      	add	r3, r2
 8014814:	60bb      	str	r3, [r7, #8]
			listSET_LIST_ITEM_VALUE( &( pxCurrentTCB->xStateListItem ), xTimeToWake );
 8014816:	4b14      	ldr	r3, [pc, #80]	@ (8014868 <prvAddCurrentTaskToDelayedList+0x94>)
 8014818:	681b      	ldr	r3, [r3, #0]
 801481a:	68ba      	ldr	r2, [r7, #8]
 801481c:	605a      	str	r2, [r3, #4]
			if( xTimeToWake < xConstTickCount )
 801481e:	68ba      	ldr	r2, [r7, #8]
 8014820:	68fb      	ldr	r3, [r7, #12]
 8014822:	429a      	cmp	r2, r3
 8014824:	d209      	bcs.n	801483a <prvAddCurrentTaskToDelayedList+0x66>
				vListInsert( pxOverflowDelayedTaskList, &( pxCurrentTCB->xStateListItem ) );
 8014826:	4b12      	ldr	r3, [pc, #72]	@ (8014870 <prvAddCurrentTaskToDelayedList+0x9c>)
 8014828:	681a      	ldr	r2, [r3, #0]
 801482a:	4b0f      	ldr	r3, [pc, #60]	@ (8014868 <prvAddCurrentTaskToDelayedList+0x94>)
 801482c:	681b      	ldr	r3, [r3, #0]
 801482e:	3304      	adds	r3, #4
 8014830:	4619      	mov	r1, r3
 8014832:	4610      	mov	r0, r2
 8014834:	f7fd f845 	bl	80118c2 <vListInsert>
}
 8014838:	e010      	b.n	801485c <prvAddCurrentTaskToDelayedList+0x88>
				vListInsert( pxDelayedTaskList, &( pxCurrentTCB->xStateListItem ) );
 801483a:	4b0e      	ldr	r3, [pc, #56]	@ (8014874 <prvAddCurrentTaskToDelayedList+0xa0>)
 801483c:	681a      	ldr	r2, [r3, #0]
 801483e:	4b0a      	ldr	r3, [pc, #40]	@ (8014868 <prvAddCurrentTaskToDelayedList+0x94>)
 8014840:	681b      	ldr	r3, [r3, #0]
 8014842:	3304      	adds	r3, #4
 8014844:	4619      	mov	r1, r3
 8014846:	4610      	mov	r0, r2
 8014848:	f7fd f83b 	bl	80118c2 <vListInsert>
				if( xTimeToWake < xNextTaskUnblockTime )
 801484c:	4b0a      	ldr	r3, [pc, #40]	@ (8014878 <prvAddCurrentTaskToDelayedList+0xa4>)
 801484e:	681b      	ldr	r3, [r3, #0]
 8014850:	68ba      	ldr	r2, [r7, #8]
 8014852:	429a      	cmp	r2, r3
 8014854:	d202      	bcs.n	801485c <prvAddCurrentTaskToDelayedList+0x88>
					xNextTaskUnblockTime = xTimeToWake;
 8014856:	4a08      	ldr	r2, [pc, #32]	@ (8014878 <prvAddCurrentTaskToDelayedList+0xa4>)
 8014858:	68bb      	ldr	r3, [r7, #8]
 801485a:	6013      	str	r3, [r2, #0]
}
 801485c:	bf00      	nop
 801485e:	3710      	adds	r7, #16
 8014860:	46bd      	mov	sp, r7
 8014862:	bd80      	pop	{r7, pc}
 8014864:	24004238 	.word	0x24004238
 8014868:	24003d60 	.word	0x24003d60
 801486c:	24004220 	.word	0x24004220
 8014870:	240041f0 	.word	0x240041f0
 8014874:	240041ec 	.word	0x240041ec
 8014878:	24004254 	.word	0x24004254

0801487c <xTimerCreateTimerTask>:
									TimerCallbackFunction_t pxCallbackFunction,
									Timer_t *pxNewTimer ) PRIVILEGED_FUNCTION;
/*-----------------------------------------------------------*/

BaseType_t xTimerCreateTimerTask( void )
{
 801487c:	b580      	push	{r7, lr}
 801487e:	b08a      	sub	sp, #40	@ 0x28
 8014880:	af04      	add	r7, sp, #16
BaseType_t xReturn = pdFAIL;
 8014882:	2300      	movs	r3, #0
 8014884:	617b      	str	r3, [r7, #20]

	/* This function is called when the scheduler is started if
	configUSE_TIMERS is set to 1.  Check that the infrastructure used by the
	timer service task has been created/initialised.  If timers have already
	been created then the initialisation will already have been performed. */
	prvCheckForValidListAndQueue();
 8014886:	f000 fbb1 	bl	8014fec <prvCheckForValidListAndQueue>

	if( xTimerQueue != NULL )
 801488a:	4b1d      	ldr	r3, [pc, #116]	@ (8014900 <xTimerCreateTimerTask+0x84>)
 801488c:	681b      	ldr	r3, [r3, #0]
 801488e:	2b00      	cmp	r3, #0
 8014890:	d021      	beq.n	80148d6 <xTimerCreateTimerTask+0x5a>
	{
		#if( configSUPPORT_STATIC_ALLOCATION == 1 )
		{
			StaticTask_t *pxTimerTaskTCBBuffer = NULL;
 8014892:	2300      	movs	r3, #0
 8014894:	60fb      	str	r3, [r7, #12]
			StackType_t *pxTimerTaskStackBuffer = NULL;
 8014896:	2300      	movs	r3, #0
 8014898:	60bb      	str	r3, [r7, #8]
			uint32_t ulTimerTaskStackSize;

			vApplicationGetTimerTaskMemory( &pxTimerTaskTCBBuffer, &pxTimerTaskStackBuffer, &ulTimerTaskStackSize );
 801489a:	1d3a      	adds	r2, r7, #4
 801489c:	f107 0108 	add.w	r1, r7, #8
 80148a0:	f107 030c 	add.w	r3, r7, #12
 80148a4:	4618      	mov	r0, r3
 80148a6:	f7fc ffa1 	bl	80117ec <vApplicationGetTimerTaskMemory>
			xTimerTaskHandle = xTaskCreateStatic(	prvTimerTask,
 80148aa:	6879      	ldr	r1, [r7, #4]
 80148ac:	68bb      	ldr	r3, [r7, #8]
 80148ae:	68fa      	ldr	r2, [r7, #12]
 80148b0:	9202      	str	r2, [sp, #8]
 80148b2:	9301      	str	r3, [sp, #4]
 80148b4:	2302      	movs	r3, #2
 80148b6:	9300      	str	r3, [sp, #0]
 80148b8:	2300      	movs	r3, #0
 80148ba:	460a      	mov	r2, r1
 80148bc:	4911      	ldr	r1, [pc, #68]	@ (8014904 <xTimerCreateTimerTask+0x88>)
 80148be:	4812      	ldr	r0, [pc, #72]	@ (8014908 <xTimerCreateTimerTask+0x8c>)
 80148c0:	f7fe fd1c 	bl	80132fc <xTaskCreateStatic>
 80148c4:	4603      	mov	r3, r0
 80148c6:	4a11      	ldr	r2, [pc, #68]	@ (801490c <xTimerCreateTimerTask+0x90>)
 80148c8:	6013      	str	r3, [r2, #0]
													NULL,
													( ( UBaseType_t ) configTIMER_TASK_PRIORITY ) | portPRIVILEGE_BIT,
													pxTimerTaskStackBuffer,
													pxTimerTaskTCBBuffer );

			if( xTimerTaskHandle != NULL )
 80148ca:	4b10      	ldr	r3, [pc, #64]	@ (801490c <xTimerCreateTimerTask+0x90>)
 80148cc:	681b      	ldr	r3, [r3, #0]
 80148ce:	2b00      	cmp	r3, #0
 80148d0:	d001      	beq.n	80148d6 <xTimerCreateTimerTask+0x5a>
			{
				xReturn = pdPASS;
 80148d2:	2301      	movs	r3, #1
 80148d4:	617b      	str	r3, [r7, #20]
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}

	configASSERT( xReturn );
 80148d6:	697b      	ldr	r3, [r7, #20]
 80148d8:	2b00      	cmp	r3, #0
 80148da:	d10b      	bne.n	80148f4 <xTimerCreateTimerTask+0x78>
	__asm volatile
 80148dc:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80148e0:	f383 8811 	msr	BASEPRI, r3
 80148e4:	f3bf 8f6f 	isb	sy
 80148e8:	f3bf 8f4f 	dsb	sy
 80148ec:	613b      	str	r3, [r7, #16]
}
 80148ee:	bf00      	nop
 80148f0:	bf00      	nop
 80148f2:	e7fd      	b.n	80148f0 <xTimerCreateTimerTask+0x74>
	return xReturn;
 80148f4:	697b      	ldr	r3, [r7, #20]
}
 80148f6:	4618      	mov	r0, r3
 80148f8:	3718      	adds	r7, #24
 80148fa:	46bd      	mov	sp, r7
 80148fc:	bd80      	pop	{r7, pc}
 80148fe:	bf00      	nop
 8014900:	24004290 	.word	0x24004290
 8014904:	0802d408 	.word	0x0802d408
 8014908:	08014b85 	.word	0x08014b85
 801490c:	24004294 	.word	0x24004294

08014910 <xTimerCreate>:
	TimerHandle_t xTimerCreate(	const char * const pcTimerName,			/*lint !e971 Unqualified char types are allowed for strings and single characters only. */
								const TickType_t xTimerPeriodInTicks,
								const UBaseType_t uxAutoReload,
								void * const pvTimerID,
								TimerCallbackFunction_t pxCallbackFunction )
	{
 8014910:	b580      	push	{r7, lr}
 8014912:	b088      	sub	sp, #32
 8014914:	af02      	add	r7, sp, #8
 8014916:	60f8      	str	r0, [r7, #12]
 8014918:	60b9      	str	r1, [r7, #8]
 801491a:	607a      	str	r2, [r7, #4]
 801491c:	603b      	str	r3, [r7, #0]
	Timer_t *pxNewTimer;

		pxNewTimer = ( Timer_t * ) pvPortMalloc( sizeof( Timer_t ) ); /*lint !e9087 !e9079 All values returned by pvPortMalloc() have at least the alignment required by the MCU's stack, and the first member of Timer_t is always a pointer to the timer's mame. */
 801491e:	202c      	movs	r0, #44	@ 0x2c
 8014920:	f000 fe1c 	bl	801555c <pvPortMalloc>
 8014924:	6178      	str	r0, [r7, #20]

		if( pxNewTimer != NULL )
 8014926:	697b      	ldr	r3, [r7, #20]
 8014928:	2b00      	cmp	r3, #0
 801492a:	d00d      	beq.n	8014948 <xTimerCreate+0x38>
		{
			/* Status is thus far zero as the timer is not created statically
			and has not been started.  The auto-reload bit may get set in
			prvInitialiseNewTimer. */
			pxNewTimer->ucStatus = 0x00;
 801492c:	697b      	ldr	r3, [r7, #20]
 801492e:	2200      	movs	r2, #0
 8014930:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
			prvInitialiseNewTimer( pcTimerName, xTimerPeriodInTicks, uxAutoReload, pvTimerID, pxCallbackFunction, pxNewTimer );
 8014934:	697b      	ldr	r3, [r7, #20]
 8014936:	9301      	str	r3, [sp, #4]
 8014938:	6a3b      	ldr	r3, [r7, #32]
 801493a:	9300      	str	r3, [sp, #0]
 801493c:	683b      	ldr	r3, [r7, #0]
 801493e:	687a      	ldr	r2, [r7, #4]
 8014940:	68b9      	ldr	r1, [r7, #8]
 8014942:	68f8      	ldr	r0, [r7, #12]
 8014944:	f000 f845 	bl	80149d2 <prvInitialiseNewTimer>
		}

		return pxNewTimer;
 8014948:	697b      	ldr	r3, [r7, #20]
	}
 801494a:	4618      	mov	r0, r3
 801494c:	3718      	adds	r7, #24
 801494e:	46bd      	mov	sp, r7
 8014950:	bd80      	pop	{r7, pc}

08014952 <xTimerCreateStatic>:
										const TickType_t xTimerPeriodInTicks,
										const UBaseType_t uxAutoReload,
										void * const pvTimerID,
										TimerCallbackFunction_t pxCallbackFunction,
										StaticTimer_t *pxTimerBuffer )
	{
 8014952:	b580      	push	{r7, lr}
 8014954:	b08a      	sub	sp, #40	@ 0x28
 8014956:	af02      	add	r7, sp, #8
 8014958:	60f8      	str	r0, [r7, #12]
 801495a:	60b9      	str	r1, [r7, #8]
 801495c:	607a      	str	r2, [r7, #4]
 801495e:	603b      	str	r3, [r7, #0]
		#if( configASSERT_DEFINED == 1 )
		{
			/* Sanity check that the size of the structure used to declare a
			variable of type StaticTimer_t equals the size of the real timer
			structure. */
			volatile size_t xSize = sizeof( StaticTimer_t );
 8014960:	232c      	movs	r3, #44	@ 0x2c
 8014962:	613b      	str	r3, [r7, #16]
			configASSERT( xSize == sizeof( Timer_t ) );
 8014964:	693b      	ldr	r3, [r7, #16]
 8014966:	2b2c      	cmp	r3, #44	@ 0x2c
 8014968:	d00b      	beq.n	8014982 <xTimerCreateStatic+0x30>
	__asm volatile
 801496a:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801496e:	f383 8811 	msr	BASEPRI, r3
 8014972:	f3bf 8f6f 	isb	sy
 8014976:	f3bf 8f4f 	dsb	sy
 801497a:	61bb      	str	r3, [r7, #24]
}
 801497c:	bf00      	nop
 801497e:	bf00      	nop
 8014980:	e7fd      	b.n	801497e <xTimerCreateStatic+0x2c>
			( void ) xSize; /* Keeps lint quiet when configASSERT() is not defined. */
 8014982:	693b      	ldr	r3, [r7, #16]
		}
		#endif /* configASSERT_DEFINED */

		/* A pointer to a StaticTimer_t structure MUST be provided, use it. */
		configASSERT( pxTimerBuffer );
 8014984:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8014986:	2b00      	cmp	r3, #0
 8014988:	d10b      	bne.n	80149a2 <xTimerCreateStatic+0x50>
	__asm volatile
 801498a:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801498e:	f383 8811 	msr	BASEPRI, r3
 8014992:	f3bf 8f6f 	isb	sy
 8014996:	f3bf 8f4f 	dsb	sy
 801499a:	617b      	str	r3, [r7, #20]
}
 801499c:	bf00      	nop
 801499e:	bf00      	nop
 80149a0:	e7fd      	b.n	801499e <xTimerCreateStatic+0x4c>
		pxNewTimer = ( Timer_t * ) pxTimerBuffer; /*lint !e740 !e9087 StaticTimer_t is a pointer to a Timer_t, so guaranteed to be aligned and sized correctly (checked by an assert()), so this is safe. */
 80149a2:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80149a4:	61fb      	str	r3, [r7, #28]

		if( pxNewTimer != NULL )
 80149a6:	69fb      	ldr	r3, [r7, #28]
 80149a8:	2b00      	cmp	r3, #0
 80149aa:	d00d      	beq.n	80149c8 <xTimerCreateStatic+0x76>
		{
			/* Timers can be created statically or dynamically so note this
			timer was created statically in case it is later deleted.  The
			auto-reload bit may get set in prvInitialiseNewTimer(). */
			pxNewTimer->ucStatus = tmrSTATUS_IS_STATICALLY_ALLOCATED;
 80149ac:	69fb      	ldr	r3, [r7, #28]
 80149ae:	2202      	movs	r2, #2
 80149b0:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28

			prvInitialiseNewTimer( pcTimerName, xTimerPeriodInTicks, uxAutoReload, pvTimerID, pxCallbackFunction, pxNewTimer );
 80149b4:	69fb      	ldr	r3, [r7, #28]
 80149b6:	9301      	str	r3, [sp, #4]
 80149b8:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80149ba:	9300      	str	r3, [sp, #0]
 80149bc:	683b      	ldr	r3, [r7, #0]
 80149be:	687a      	ldr	r2, [r7, #4]
 80149c0:	68b9      	ldr	r1, [r7, #8]
 80149c2:	68f8      	ldr	r0, [r7, #12]
 80149c4:	f000 f805 	bl	80149d2 <prvInitialiseNewTimer>
		}

		return pxNewTimer;
 80149c8:	69fb      	ldr	r3, [r7, #28]
	}
 80149ca:	4618      	mov	r0, r3
 80149cc:	3720      	adds	r7, #32
 80149ce:	46bd      	mov	sp, r7
 80149d0:	bd80      	pop	{r7, pc}

080149d2 <prvInitialiseNewTimer>:
									const TickType_t xTimerPeriodInTicks,
									const UBaseType_t uxAutoReload,
									void * const pvTimerID,
									TimerCallbackFunction_t pxCallbackFunction,
									Timer_t *pxNewTimer )
{
 80149d2:	b580      	push	{r7, lr}
 80149d4:	b086      	sub	sp, #24
 80149d6:	af00      	add	r7, sp, #0
 80149d8:	60f8      	str	r0, [r7, #12]
 80149da:	60b9      	str	r1, [r7, #8]
 80149dc:	607a      	str	r2, [r7, #4]
 80149de:	603b      	str	r3, [r7, #0]
	/* 0 is not a valid value for xTimerPeriodInTicks. */
	configASSERT( ( xTimerPeriodInTicks > 0 ) );
 80149e0:	68bb      	ldr	r3, [r7, #8]
 80149e2:	2b00      	cmp	r3, #0
 80149e4:	d10b      	bne.n	80149fe <prvInitialiseNewTimer+0x2c>
	__asm volatile
 80149e6:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80149ea:	f383 8811 	msr	BASEPRI, r3
 80149ee:	f3bf 8f6f 	isb	sy
 80149f2:	f3bf 8f4f 	dsb	sy
 80149f6:	617b      	str	r3, [r7, #20]
}
 80149f8:	bf00      	nop
 80149fa:	bf00      	nop
 80149fc:	e7fd      	b.n	80149fa <prvInitialiseNewTimer+0x28>

	if( pxNewTimer != NULL )
 80149fe:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8014a00:	2b00      	cmp	r3, #0
 8014a02:	d01e      	beq.n	8014a42 <prvInitialiseNewTimer+0x70>
	{
		/* Ensure the infrastructure used by the timer service task has been
		created/initialised. */
		prvCheckForValidListAndQueue();
 8014a04:	f000 faf2 	bl	8014fec <prvCheckForValidListAndQueue>

		/* Initialise the timer structure members using the function
		parameters. */
		pxNewTimer->pcTimerName = pcTimerName;
 8014a08:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8014a0a:	68fa      	ldr	r2, [r7, #12]
 8014a0c:	601a      	str	r2, [r3, #0]
		pxNewTimer->xTimerPeriodInTicks = xTimerPeriodInTicks;
 8014a0e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8014a10:	68ba      	ldr	r2, [r7, #8]
 8014a12:	619a      	str	r2, [r3, #24]
		pxNewTimer->pvTimerID = pvTimerID;
 8014a14:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8014a16:	683a      	ldr	r2, [r7, #0]
 8014a18:	61da      	str	r2, [r3, #28]
		pxNewTimer->pxCallbackFunction = pxCallbackFunction;
 8014a1a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8014a1c:	6a3a      	ldr	r2, [r7, #32]
 8014a1e:	621a      	str	r2, [r3, #32]
		vListInitialiseItem( &( pxNewTimer->xTimerListItem ) );
 8014a20:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8014a22:	3304      	adds	r3, #4
 8014a24:	4618      	mov	r0, r3
 8014a26:	f7fc ff1b 	bl	8011860 <vListInitialiseItem>
		if( uxAutoReload != pdFALSE )
 8014a2a:	687b      	ldr	r3, [r7, #4]
 8014a2c:	2b00      	cmp	r3, #0
 8014a2e:	d008      	beq.n	8014a42 <prvInitialiseNewTimer+0x70>
		{
			pxNewTimer->ucStatus |= tmrSTATUS_IS_AUTORELOAD;
 8014a30:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8014a32:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8014a36:	f043 0304 	orr.w	r3, r3, #4
 8014a3a:	b2da      	uxtb	r2, r3
 8014a3c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8014a3e:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
		}
		traceTIMER_CREATE( pxNewTimer );
	}
}
 8014a42:	bf00      	nop
 8014a44:	3718      	adds	r7, #24
 8014a46:	46bd      	mov	sp, r7
 8014a48:	bd80      	pop	{r7, pc}
	...

08014a4c <xTimerGenericCommand>:
/*-----------------------------------------------------------*/

BaseType_t xTimerGenericCommand( TimerHandle_t xTimer, const BaseType_t xCommandID, const TickType_t xOptionalValue, BaseType_t * const pxHigherPriorityTaskWoken, const TickType_t xTicksToWait )
{
 8014a4c:	b580      	push	{r7, lr}
 8014a4e:	b08a      	sub	sp, #40	@ 0x28
 8014a50:	af00      	add	r7, sp, #0
 8014a52:	60f8      	str	r0, [r7, #12]
 8014a54:	60b9      	str	r1, [r7, #8]
 8014a56:	607a      	str	r2, [r7, #4]
 8014a58:	603b      	str	r3, [r7, #0]
BaseType_t xReturn = pdFAIL;
 8014a5a:	2300      	movs	r3, #0
 8014a5c:	627b      	str	r3, [r7, #36]	@ 0x24
DaemonTaskMessage_t xMessage;

	configASSERT( xTimer );
 8014a5e:	68fb      	ldr	r3, [r7, #12]
 8014a60:	2b00      	cmp	r3, #0
 8014a62:	d10b      	bne.n	8014a7c <xTimerGenericCommand+0x30>
	__asm volatile
 8014a64:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8014a68:	f383 8811 	msr	BASEPRI, r3
 8014a6c:	f3bf 8f6f 	isb	sy
 8014a70:	f3bf 8f4f 	dsb	sy
 8014a74:	623b      	str	r3, [r7, #32]
}
 8014a76:	bf00      	nop
 8014a78:	bf00      	nop
 8014a7a:	e7fd      	b.n	8014a78 <xTimerGenericCommand+0x2c>

	/* Send a message to the timer service task to perform a particular action
	on a particular timer definition. */
	if( xTimerQueue != NULL )
 8014a7c:	4b19      	ldr	r3, [pc, #100]	@ (8014ae4 <xTimerGenericCommand+0x98>)
 8014a7e:	681b      	ldr	r3, [r3, #0]
 8014a80:	2b00      	cmp	r3, #0
 8014a82:	d02a      	beq.n	8014ada <xTimerGenericCommand+0x8e>
	{
		/* Send a command to the timer service task to start the xTimer timer. */
		xMessage.xMessageID = xCommandID;
 8014a84:	68bb      	ldr	r3, [r7, #8]
 8014a86:	613b      	str	r3, [r7, #16]
		xMessage.u.xTimerParameters.xMessageValue = xOptionalValue;
 8014a88:	687b      	ldr	r3, [r7, #4]
 8014a8a:	617b      	str	r3, [r7, #20]
		xMessage.u.xTimerParameters.pxTimer = xTimer;
 8014a8c:	68fb      	ldr	r3, [r7, #12]
 8014a8e:	61bb      	str	r3, [r7, #24]

		if( xCommandID < tmrFIRST_FROM_ISR_COMMAND )
 8014a90:	68bb      	ldr	r3, [r7, #8]
 8014a92:	2b05      	cmp	r3, #5
 8014a94:	dc18      	bgt.n	8014ac8 <xTimerGenericCommand+0x7c>
		{
			if( xTaskGetSchedulerState() == taskSCHEDULER_RUNNING )
 8014a96:	f7ff fae1 	bl	801405c <xTaskGetSchedulerState>
 8014a9a:	4603      	mov	r3, r0
 8014a9c:	2b02      	cmp	r3, #2
 8014a9e:	d109      	bne.n	8014ab4 <xTimerGenericCommand+0x68>
			{
				xReturn = xQueueSendToBack( xTimerQueue, &xMessage, xTicksToWait );
 8014aa0:	4b10      	ldr	r3, [pc, #64]	@ (8014ae4 <xTimerGenericCommand+0x98>)
 8014aa2:	6818      	ldr	r0, [r3, #0]
 8014aa4:	f107 0110 	add.w	r1, r7, #16
 8014aa8:	2300      	movs	r3, #0
 8014aaa:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 8014aac:	f7fd f9d8 	bl	8011e60 <xQueueGenericSend>
 8014ab0:	6278      	str	r0, [r7, #36]	@ 0x24
 8014ab2:	e012      	b.n	8014ada <xTimerGenericCommand+0x8e>
			}
			else
			{
				xReturn = xQueueSendToBack( xTimerQueue, &xMessage, tmrNO_DELAY );
 8014ab4:	4b0b      	ldr	r3, [pc, #44]	@ (8014ae4 <xTimerGenericCommand+0x98>)
 8014ab6:	6818      	ldr	r0, [r3, #0]
 8014ab8:	f107 0110 	add.w	r1, r7, #16
 8014abc:	2300      	movs	r3, #0
 8014abe:	2200      	movs	r2, #0
 8014ac0:	f7fd f9ce 	bl	8011e60 <xQueueGenericSend>
 8014ac4:	6278      	str	r0, [r7, #36]	@ 0x24
 8014ac6:	e008      	b.n	8014ada <xTimerGenericCommand+0x8e>
			}
		}
		else
		{
			xReturn = xQueueSendToBackFromISR( xTimerQueue, &xMessage, pxHigherPriorityTaskWoken );
 8014ac8:	4b06      	ldr	r3, [pc, #24]	@ (8014ae4 <xTimerGenericCommand+0x98>)
 8014aca:	6818      	ldr	r0, [r3, #0]
 8014acc:	f107 0110 	add.w	r1, r7, #16
 8014ad0:	2300      	movs	r3, #0
 8014ad2:	683a      	ldr	r2, [r7, #0]
 8014ad4:	f7fd fac6 	bl	8012064 <xQueueGenericSendFromISR>
 8014ad8:	6278      	str	r0, [r7, #36]	@ 0x24
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}

	return xReturn;
 8014ada:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
}
 8014adc:	4618      	mov	r0, r3
 8014ade:	3728      	adds	r7, #40	@ 0x28
 8014ae0:	46bd      	mov	sp, r7
 8014ae2:	bd80      	pop	{r7, pc}
 8014ae4:	24004290 	.word	0x24004290

08014ae8 <prvProcessExpiredTimer>:
	return pxTimer->pcTimerName;
}
/*-----------------------------------------------------------*/

static void prvProcessExpiredTimer( const TickType_t xNextExpireTime, const TickType_t xTimeNow )
{
 8014ae8:	b580      	push	{r7, lr}
 8014aea:	b088      	sub	sp, #32
 8014aec:	af02      	add	r7, sp, #8
 8014aee:	6078      	str	r0, [r7, #4]
 8014af0:	6039      	str	r1, [r7, #0]
BaseType_t xResult;
Timer_t * const pxTimer = ( Timer_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxCurrentTimerList ); /*lint !e9087 !e9079 void * is used as this macro is used with tasks and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
 8014af2:	4b23      	ldr	r3, [pc, #140]	@ (8014b80 <prvProcessExpiredTimer+0x98>)
 8014af4:	681b      	ldr	r3, [r3, #0]
 8014af6:	68db      	ldr	r3, [r3, #12]
 8014af8:	68db      	ldr	r3, [r3, #12]
 8014afa:	617b      	str	r3, [r7, #20]

	/* Remove the timer from the list of active timers.  A check has already
	been performed to ensure the list is not empty. */
	( void ) uxListRemove( &( pxTimer->xTimerListItem ) );
 8014afc:	697b      	ldr	r3, [r7, #20]
 8014afe:	3304      	adds	r3, #4
 8014b00:	4618      	mov	r0, r3
 8014b02:	f7fc ff17 	bl	8011934 <uxListRemove>
	traceTIMER_EXPIRED( pxTimer );

	/* If the timer is an auto-reload timer then calculate the next
	expiry time and re-insert the timer in the list of active timers. */
	if( ( pxTimer->ucStatus & tmrSTATUS_IS_AUTORELOAD ) != 0 )
 8014b06:	697b      	ldr	r3, [r7, #20]
 8014b08:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8014b0c:	f003 0304 	and.w	r3, r3, #4
 8014b10:	2b00      	cmp	r3, #0
 8014b12:	d023      	beq.n	8014b5c <prvProcessExpiredTimer+0x74>
	{
		/* The timer is inserted into a list using a time relative to anything
		other than the current time.  It will therefore be inserted into the
		correct list relative to the time this task thinks it is now. */
		if( prvInsertTimerInActiveList( pxTimer, ( xNextExpireTime + pxTimer->xTimerPeriodInTicks ), xTimeNow, xNextExpireTime ) != pdFALSE )
 8014b14:	697b      	ldr	r3, [r7, #20]
 8014b16:	699a      	ldr	r2, [r3, #24]
 8014b18:	687b      	ldr	r3, [r7, #4]
 8014b1a:	18d1      	adds	r1, r2, r3
 8014b1c:	687b      	ldr	r3, [r7, #4]
 8014b1e:	683a      	ldr	r2, [r7, #0]
 8014b20:	6978      	ldr	r0, [r7, #20]
 8014b22:	f000 f8d5 	bl	8014cd0 <prvInsertTimerInActiveList>
 8014b26:	4603      	mov	r3, r0
 8014b28:	2b00      	cmp	r3, #0
 8014b2a:	d020      	beq.n	8014b6e <prvProcessExpiredTimer+0x86>
		{
			/* The timer expired before it was added to the active timer
			list.  Reload it now.  */
			xResult = xTimerGenericCommand( pxTimer, tmrCOMMAND_START_DONT_TRACE, xNextExpireTime, NULL, tmrNO_DELAY );
 8014b2c:	2300      	movs	r3, #0
 8014b2e:	9300      	str	r3, [sp, #0]
 8014b30:	2300      	movs	r3, #0
 8014b32:	687a      	ldr	r2, [r7, #4]
 8014b34:	2100      	movs	r1, #0
 8014b36:	6978      	ldr	r0, [r7, #20]
 8014b38:	f7ff ff88 	bl	8014a4c <xTimerGenericCommand>
 8014b3c:	6138      	str	r0, [r7, #16]
			configASSERT( xResult );
 8014b3e:	693b      	ldr	r3, [r7, #16]
 8014b40:	2b00      	cmp	r3, #0
 8014b42:	d114      	bne.n	8014b6e <prvProcessExpiredTimer+0x86>
	__asm volatile
 8014b44:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8014b48:	f383 8811 	msr	BASEPRI, r3
 8014b4c:	f3bf 8f6f 	isb	sy
 8014b50:	f3bf 8f4f 	dsb	sy
 8014b54:	60fb      	str	r3, [r7, #12]
}
 8014b56:	bf00      	nop
 8014b58:	bf00      	nop
 8014b5a:	e7fd      	b.n	8014b58 <prvProcessExpiredTimer+0x70>
			mtCOVERAGE_TEST_MARKER();
		}
	}
	else
	{
		pxTimer->ucStatus &= ~tmrSTATUS_IS_ACTIVE;
 8014b5c:	697b      	ldr	r3, [r7, #20]
 8014b5e:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8014b62:	f023 0301 	bic.w	r3, r3, #1
 8014b66:	b2da      	uxtb	r2, r3
 8014b68:	697b      	ldr	r3, [r7, #20]
 8014b6a:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
		mtCOVERAGE_TEST_MARKER();
	}

	/* Call the timer callback. */
	pxTimer->pxCallbackFunction( ( TimerHandle_t ) pxTimer );
 8014b6e:	697b      	ldr	r3, [r7, #20]
 8014b70:	6a1b      	ldr	r3, [r3, #32]
 8014b72:	6978      	ldr	r0, [r7, #20]
 8014b74:	4798      	blx	r3
}
 8014b76:	bf00      	nop
 8014b78:	3718      	adds	r7, #24
 8014b7a:	46bd      	mov	sp, r7
 8014b7c:	bd80      	pop	{r7, pc}
 8014b7e:	bf00      	nop
 8014b80:	24004288 	.word	0x24004288

08014b84 <prvTimerTask>:
/*-----------------------------------------------------------*/

static portTASK_FUNCTION( prvTimerTask, pvParameters )
{
 8014b84:	b580      	push	{r7, lr}
 8014b86:	b084      	sub	sp, #16
 8014b88:	af00      	add	r7, sp, #0
 8014b8a:	6078      	str	r0, [r7, #4]

	for( ;; )
	{
		/* Query the timers list to see if it contains any timers, and if so,
		obtain the time at which the next timer will expire. */
		xNextExpireTime = prvGetNextExpireTime( &xListWasEmpty );
 8014b8c:	f107 0308 	add.w	r3, r7, #8
 8014b90:	4618      	mov	r0, r3
 8014b92:	f000 f859 	bl	8014c48 <prvGetNextExpireTime>
 8014b96:	60f8      	str	r0, [r7, #12]

		/* If a timer has expired, process it.  Otherwise, block this task
		until either a timer does expire, or a command is received. */
		prvProcessTimerOrBlockTask( xNextExpireTime, xListWasEmpty );
 8014b98:	68bb      	ldr	r3, [r7, #8]
 8014b9a:	4619      	mov	r1, r3
 8014b9c:	68f8      	ldr	r0, [r7, #12]
 8014b9e:	f000 f805 	bl	8014bac <prvProcessTimerOrBlockTask>

		/* Empty the command queue. */
		prvProcessReceivedCommands();
 8014ba2:	f000 f8d7 	bl	8014d54 <prvProcessReceivedCommands>
		xNextExpireTime = prvGetNextExpireTime( &xListWasEmpty );
 8014ba6:	bf00      	nop
 8014ba8:	e7f0      	b.n	8014b8c <prvTimerTask+0x8>
	...

08014bac <prvProcessTimerOrBlockTask>:
	}
}
/*-----------------------------------------------------------*/

static void prvProcessTimerOrBlockTask( const TickType_t xNextExpireTime, BaseType_t xListWasEmpty )
{
 8014bac:	b580      	push	{r7, lr}
 8014bae:	b084      	sub	sp, #16
 8014bb0:	af00      	add	r7, sp, #0
 8014bb2:	6078      	str	r0, [r7, #4]
 8014bb4:	6039      	str	r1, [r7, #0]
TickType_t xTimeNow;
BaseType_t xTimerListsWereSwitched;

	vTaskSuspendAll();
 8014bb6:	f7fe fe05 	bl	80137c4 <vTaskSuspendAll>
		/* Obtain the time now to make an assessment as to whether the timer
		has expired or not.  If obtaining the time causes the lists to switch
		then don't process this timer as any timers that remained in the list
		when the lists were switched will have been processed within the
		prvSampleTimeNow() function. */
		xTimeNow = prvSampleTimeNow( &xTimerListsWereSwitched );
 8014bba:	f107 0308 	add.w	r3, r7, #8
 8014bbe:	4618      	mov	r0, r3
 8014bc0:	f000 f866 	bl	8014c90 <prvSampleTimeNow>
 8014bc4:	60f8      	str	r0, [r7, #12]
		if( xTimerListsWereSwitched == pdFALSE )
 8014bc6:	68bb      	ldr	r3, [r7, #8]
 8014bc8:	2b00      	cmp	r3, #0
 8014bca:	d130      	bne.n	8014c2e <prvProcessTimerOrBlockTask+0x82>
		{
			/* The tick count has not overflowed, has the timer expired? */
			if( ( xListWasEmpty == pdFALSE ) && ( xNextExpireTime <= xTimeNow ) )
 8014bcc:	683b      	ldr	r3, [r7, #0]
 8014bce:	2b00      	cmp	r3, #0
 8014bd0:	d10a      	bne.n	8014be8 <prvProcessTimerOrBlockTask+0x3c>
 8014bd2:	687a      	ldr	r2, [r7, #4]
 8014bd4:	68fb      	ldr	r3, [r7, #12]
 8014bd6:	429a      	cmp	r2, r3
 8014bd8:	d806      	bhi.n	8014be8 <prvProcessTimerOrBlockTask+0x3c>
			{
				( void ) xTaskResumeAll();
 8014bda:	f7fe fe01 	bl	80137e0 <xTaskResumeAll>
				prvProcessExpiredTimer( xNextExpireTime, xTimeNow );
 8014bde:	68f9      	ldr	r1, [r7, #12]
 8014be0:	6878      	ldr	r0, [r7, #4]
 8014be2:	f7ff ff81 	bl	8014ae8 <prvProcessExpiredTimer>
		else
		{
			( void ) xTaskResumeAll();
		}
	}
}
 8014be6:	e024      	b.n	8014c32 <prvProcessTimerOrBlockTask+0x86>
				if( xListWasEmpty != pdFALSE )
 8014be8:	683b      	ldr	r3, [r7, #0]
 8014bea:	2b00      	cmp	r3, #0
 8014bec:	d008      	beq.n	8014c00 <prvProcessTimerOrBlockTask+0x54>
					xListWasEmpty = listLIST_IS_EMPTY( pxOverflowTimerList );
 8014bee:	4b13      	ldr	r3, [pc, #76]	@ (8014c3c <prvProcessTimerOrBlockTask+0x90>)
 8014bf0:	681b      	ldr	r3, [r3, #0]
 8014bf2:	681b      	ldr	r3, [r3, #0]
 8014bf4:	2b00      	cmp	r3, #0
 8014bf6:	d101      	bne.n	8014bfc <prvProcessTimerOrBlockTask+0x50>
 8014bf8:	2301      	movs	r3, #1
 8014bfa:	e000      	b.n	8014bfe <prvProcessTimerOrBlockTask+0x52>
 8014bfc:	2300      	movs	r3, #0
 8014bfe:	603b      	str	r3, [r7, #0]
				vQueueWaitForMessageRestricted( xTimerQueue, ( xNextExpireTime - xTimeNow ), xListWasEmpty );
 8014c00:	4b0f      	ldr	r3, [pc, #60]	@ (8014c40 <prvProcessTimerOrBlockTask+0x94>)
 8014c02:	6818      	ldr	r0, [r3, #0]
 8014c04:	687a      	ldr	r2, [r7, #4]
 8014c06:	68fb      	ldr	r3, [r7, #12]
 8014c08:	1ad3      	subs	r3, r2, r3
 8014c0a:	683a      	ldr	r2, [r7, #0]
 8014c0c:	4619      	mov	r1, r3
 8014c0e:	f7fd ffa9 	bl	8012b64 <vQueueWaitForMessageRestricted>
				if( xTaskResumeAll() == pdFALSE )
 8014c12:	f7fe fde5 	bl	80137e0 <xTaskResumeAll>
 8014c16:	4603      	mov	r3, r0
 8014c18:	2b00      	cmp	r3, #0
 8014c1a:	d10a      	bne.n	8014c32 <prvProcessTimerOrBlockTask+0x86>
					portYIELD_WITHIN_API();
 8014c1c:	4b09      	ldr	r3, [pc, #36]	@ (8014c44 <prvProcessTimerOrBlockTask+0x98>)
 8014c1e:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8014c22:	601a      	str	r2, [r3, #0]
 8014c24:	f3bf 8f4f 	dsb	sy
 8014c28:	f3bf 8f6f 	isb	sy
}
 8014c2c:	e001      	b.n	8014c32 <prvProcessTimerOrBlockTask+0x86>
			( void ) xTaskResumeAll();
 8014c2e:	f7fe fdd7 	bl	80137e0 <xTaskResumeAll>
}
 8014c32:	bf00      	nop
 8014c34:	3710      	adds	r7, #16
 8014c36:	46bd      	mov	sp, r7
 8014c38:	bd80      	pop	{r7, pc}
 8014c3a:	bf00      	nop
 8014c3c:	2400428c 	.word	0x2400428c
 8014c40:	24004290 	.word	0x24004290
 8014c44:	e000ed04 	.word	0xe000ed04

08014c48 <prvGetNextExpireTime>:
/*-----------------------------------------------------------*/

static TickType_t prvGetNextExpireTime( BaseType_t * const pxListWasEmpty )
{
 8014c48:	b480      	push	{r7}
 8014c4a:	b085      	sub	sp, #20
 8014c4c:	af00      	add	r7, sp, #0
 8014c4e:	6078      	str	r0, [r7, #4]
	the timer with the nearest expiry time will expire.  If there are no
	active timers then just set the next expire time to 0.  That will cause
	this task to unblock when the tick count overflows, at which point the
	timer lists will be switched and the next expiry time can be
	re-assessed.  */
	*pxListWasEmpty = listLIST_IS_EMPTY( pxCurrentTimerList );
 8014c50:	4b0e      	ldr	r3, [pc, #56]	@ (8014c8c <prvGetNextExpireTime+0x44>)
 8014c52:	681b      	ldr	r3, [r3, #0]
 8014c54:	681b      	ldr	r3, [r3, #0]
 8014c56:	2b00      	cmp	r3, #0
 8014c58:	d101      	bne.n	8014c5e <prvGetNextExpireTime+0x16>
 8014c5a:	2201      	movs	r2, #1
 8014c5c:	e000      	b.n	8014c60 <prvGetNextExpireTime+0x18>
 8014c5e:	2200      	movs	r2, #0
 8014c60:	687b      	ldr	r3, [r7, #4]
 8014c62:	601a      	str	r2, [r3, #0]
	if( *pxListWasEmpty == pdFALSE )
 8014c64:	687b      	ldr	r3, [r7, #4]
 8014c66:	681b      	ldr	r3, [r3, #0]
 8014c68:	2b00      	cmp	r3, #0
 8014c6a:	d105      	bne.n	8014c78 <prvGetNextExpireTime+0x30>
	{
		xNextExpireTime = listGET_ITEM_VALUE_OF_HEAD_ENTRY( pxCurrentTimerList );
 8014c6c:	4b07      	ldr	r3, [pc, #28]	@ (8014c8c <prvGetNextExpireTime+0x44>)
 8014c6e:	681b      	ldr	r3, [r3, #0]
 8014c70:	68db      	ldr	r3, [r3, #12]
 8014c72:	681b      	ldr	r3, [r3, #0]
 8014c74:	60fb      	str	r3, [r7, #12]
 8014c76:	e001      	b.n	8014c7c <prvGetNextExpireTime+0x34>
	}
	else
	{
		/* Ensure the task unblocks when the tick count rolls over. */
		xNextExpireTime = ( TickType_t ) 0U;
 8014c78:	2300      	movs	r3, #0
 8014c7a:	60fb      	str	r3, [r7, #12]
	}

	return xNextExpireTime;
 8014c7c:	68fb      	ldr	r3, [r7, #12]
}
 8014c7e:	4618      	mov	r0, r3
 8014c80:	3714      	adds	r7, #20
 8014c82:	46bd      	mov	sp, r7
 8014c84:	f85d 7b04 	ldr.w	r7, [sp], #4
 8014c88:	4770      	bx	lr
 8014c8a:	bf00      	nop
 8014c8c:	24004288 	.word	0x24004288

08014c90 <prvSampleTimeNow>:
/*-----------------------------------------------------------*/

static TickType_t prvSampleTimeNow( BaseType_t * const pxTimerListsWereSwitched )
{
 8014c90:	b580      	push	{r7, lr}
 8014c92:	b084      	sub	sp, #16
 8014c94:	af00      	add	r7, sp, #0
 8014c96:	6078      	str	r0, [r7, #4]
TickType_t xTimeNow;
PRIVILEGED_DATA static TickType_t xLastTime = ( TickType_t ) 0U; /*lint !e956 Variable is only accessible to one task. */

	xTimeNow = xTaskGetTickCount();
 8014c98:	f7fe fe40 	bl	801391c <xTaskGetTickCount>
 8014c9c:	60f8      	str	r0, [r7, #12]

	if( xTimeNow < xLastTime )
 8014c9e:	4b0b      	ldr	r3, [pc, #44]	@ (8014ccc <prvSampleTimeNow+0x3c>)
 8014ca0:	681b      	ldr	r3, [r3, #0]
 8014ca2:	68fa      	ldr	r2, [r7, #12]
 8014ca4:	429a      	cmp	r2, r3
 8014ca6:	d205      	bcs.n	8014cb4 <prvSampleTimeNow+0x24>
	{
		prvSwitchTimerLists();
 8014ca8:	f000 f93a 	bl	8014f20 <prvSwitchTimerLists>
		*pxTimerListsWereSwitched = pdTRUE;
 8014cac:	687b      	ldr	r3, [r7, #4]
 8014cae:	2201      	movs	r2, #1
 8014cb0:	601a      	str	r2, [r3, #0]
 8014cb2:	e002      	b.n	8014cba <prvSampleTimeNow+0x2a>
	}
	else
	{
		*pxTimerListsWereSwitched = pdFALSE;
 8014cb4:	687b      	ldr	r3, [r7, #4]
 8014cb6:	2200      	movs	r2, #0
 8014cb8:	601a      	str	r2, [r3, #0]
	}

	xLastTime = xTimeNow;
 8014cba:	4a04      	ldr	r2, [pc, #16]	@ (8014ccc <prvSampleTimeNow+0x3c>)
 8014cbc:	68fb      	ldr	r3, [r7, #12]
 8014cbe:	6013      	str	r3, [r2, #0]

	return xTimeNow;
 8014cc0:	68fb      	ldr	r3, [r7, #12]
}
 8014cc2:	4618      	mov	r0, r3
 8014cc4:	3710      	adds	r7, #16
 8014cc6:	46bd      	mov	sp, r7
 8014cc8:	bd80      	pop	{r7, pc}
 8014cca:	bf00      	nop
 8014ccc:	24004298 	.word	0x24004298

08014cd0 <prvInsertTimerInActiveList>:
/*-----------------------------------------------------------*/

static BaseType_t prvInsertTimerInActiveList( Timer_t * const pxTimer, const TickType_t xNextExpiryTime, const TickType_t xTimeNow, const TickType_t xCommandTime )
{
 8014cd0:	b580      	push	{r7, lr}
 8014cd2:	b086      	sub	sp, #24
 8014cd4:	af00      	add	r7, sp, #0
 8014cd6:	60f8      	str	r0, [r7, #12]
 8014cd8:	60b9      	str	r1, [r7, #8]
 8014cda:	607a      	str	r2, [r7, #4]
 8014cdc:	603b      	str	r3, [r7, #0]
BaseType_t xProcessTimerNow = pdFALSE;
 8014cde:	2300      	movs	r3, #0
 8014ce0:	617b      	str	r3, [r7, #20]

	listSET_LIST_ITEM_VALUE( &( pxTimer->xTimerListItem ), xNextExpiryTime );
 8014ce2:	68fb      	ldr	r3, [r7, #12]
 8014ce4:	68ba      	ldr	r2, [r7, #8]
 8014ce6:	605a      	str	r2, [r3, #4]
	listSET_LIST_ITEM_OWNER( &( pxTimer->xTimerListItem ), pxTimer );
 8014ce8:	68fb      	ldr	r3, [r7, #12]
 8014cea:	68fa      	ldr	r2, [r7, #12]
 8014cec:	611a      	str	r2, [r3, #16]

	if( xNextExpiryTime <= xTimeNow )
 8014cee:	68ba      	ldr	r2, [r7, #8]
 8014cf0:	687b      	ldr	r3, [r7, #4]
 8014cf2:	429a      	cmp	r2, r3
 8014cf4:	d812      	bhi.n	8014d1c <prvInsertTimerInActiveList+0x4c>
	{
		/* Has the expiry time elapsed between the command to start/reset a
		timer was issued, and the time the command was processed? */
		if( ( ( TickType_t ) ( xTimeNow - xCommandTime ) ) >= pxTimer->xTimerPeriodInTicks ) /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
 8014cf6:	687a      	ldr	r2, [r7, #4]
 8014cf8:	683b      	ldr	r3, [r7, #0]
 8014cfa:	1ad2      	subs	r2, r2, r3
 8014cfc:	68fb      	ldr	r3, [r7, #12]
 8014cfe:	699b      	ldr	r3, [r3, #24]
 8014d00:	429a      	cmp	r2, r3
 8014d02:	d302      	bcc.n	8014d0a <prvInsertTimerInActiveList+0x3a>
		{
			/* The time between a command being issued and the command being
			processed actually exceeds the timers period.  */
			xProcessTimerNow = pdTRUE;
 8014d04:	2301      	movs	r3, #1
 8014d06:	617b      	str	r3, [r7, #20]
 8014d08:	e01b      	b.n	8014d42 <prvInsertTimerInActiveList+0x72>
		}
		else
		{
			vListInsert( pxOverflowTimerList, &( pxTimer->xTimerListItem ) );
 8014d0a:	4b10      	ldr	r3, [pc, #64]	@ (8014d4c <prvInsertTimerInActiveList+0x7c>)
 8014d0c:	681a      	ldr	r2, [r3, #0]
 8014d0e:	68fb      	ldr	r3, [r7, #12]
 8014d10:	3304      	adds	r3, #4
 8014d12:	4619      	mov	r1, r3
 8014d14:	4610      	mov	r0, r2
 8014d16:	f7fc fdd4 	bl	80118c2 <vListInsert>
 8014d1a:	e012      	b.n	8014d42 <prvInsertTimerInActiveList+0x72>
		}
	}
	else
	{
		if( ( xTimeNow < xCommandTime ) && ( xNextExpiryTime >= xCommandTime ) )
 8014d1c:	687a      	ldr	r2, [r7, #4]
 8014d1e:	683b      	ldr	r3, [r7, #0]
 8014d20:	429a      	cmp	r2, r3
 8014d22:	d206      	bcs.n	8014d32 <prvInsertTimerInActiveList+0x62>
 8014d24:	68ba      	ldr	r2, [r7, #8]
 8014d26:	683b      	ldr	r3, [r7, #0]
 8014d28:	429a      	cmp	r2, r3
 8014d2a:	d302      	bcc.n	8014d32 <prvInsertTimerInActiveList+0x62>
		{
			/* If, since the command was issued, the tick count has overflowed
			but the expiry time has not, then the timer must have already passed
			its expiry time and should be processed immediately. */
			xProcessTimerNow = pdTRUE;
 8014d2c:	2301      	movs	r3, #1
 8014d2e:	617b      	str	r3, [r7, #20]
 8014d30:	e007      	b.n	8014d42 <prvInsertTimerInActiveList+0x72>
		}
		else
		{
			vListInsert( pxCurrentTimerList, &( pxTimer->xTimerListItem ) );
 8014d32:	4b07      	ldr	r3, [pc, #28]	@ (8014d50 <prvInsertTimerInActiveList+0x80>)
 8014d34:	681a      	ldr	r2, [r3, #0]
 8014d36:	68fb      	ldr	r3, [r7, #12]
 8014d38:	3304      	adds	r3, #4
 8014d3a:	4619      	mov	r1, r3
 8014d3c:	4610      	mov	r0, r2
 8014d3e:	f7fc fdc0 	bl	80118c2 <vListInsert>
		}
	}

	return xProcessTimerNow;
 8014d42:	697b      	ldr	r3, [r7, #20]
}
 8014d44:	4618      	mov	r0, r3
 8014d46:	3718      	adds	r7, #24
 8014d48:	46bd      	mov	sp, r7
 8014d4a:	bd80      	pop	{r7, pc}
 8014d4c:	2400428c 	.word	0x2400428c
 8014d50:	24004288 	.word	0x24004288

08014d54 <prvProcessReceivedCommands>:
/*-----------------------------------------------------------*/

static void	prvProcessReceivedCommands( void )
{
 8014d54:	b580      	push	{r7, lr}
 8014d56:	b08e      	sub	sp, #56	@ 0x38
 8014d58:	af02      	add	r7, sp, #8
DaemonTaskMessage_t xMessage;
Timer_t *pxTimer;
BaseType_t xTimerListsWereSwitched, xResult;
TickType_t xTimeNow;

	while( xQueueReceive( xTimerQueue, &xMessage, tmrNO_DELAY ) != pdFAIL ) /*lint !e603 xMessage does not have to be initialised as it is passed out, not in, and it is not used unless xQueueReceive() returns pdTRUE. */
 8014d5a:	e0ce      	b.n	8014efa <prvProcessReceivedCommands+0x1a6>
	{
		#if ( INCLUDE_xTimerPendFunctionCall == 1 )
		{
			/* Negative commands are pended function calls rather than timer
			commands. */
			if( xMessage.xMessageID < ( BaseType_t ) 0 )
 8014d5c:	687b      	ldr	r3, [r7, #4]
 8014d5e:	2b00      	cmp	r3, #0
 8014d60:	da19      	bge.n	8014d96 <prvProcessReceivedCommands+0x42>
			{
				const CallbackParameters_t * const pxCallback = &( xMessage.u.xCallbackParameters );
 8014d62:	1d3b      	adds	r3, r7, #4
 8014d64:	3304      	adds	r3, #4
 8014d66:	62fb      	str	r3, [r7, #44]	@ 0x2c

				/* The timer uses the xCallbackParameters member to request a
				callback be executed.  Check the callback is not NULL. */
				configASSERT( pxCallback );
 8014d68:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8014d6a:	2b00      	cmp	r3, #0
 8014d6c:	d10b      	bne.n	8014d86 <prvProcessReceivedCommands+0x32>
	__asm volatile
 8014d6e:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8014d72:	f383 8811 	msr	BASEPRI, r3
 8014d76:	f3bf 8f6f 	isb	sy
 8014d7a:	f3bf 8f4f 	dsb	sy
 8014d7e:	61fb      	str	r3, [r7, #28]
}
 8014d80:	bf00      	nop
 8014d82:	bf00      	nop
 8014d84:	e7fd      	b.n	8014d82 <prvProcessReceivedCommands+0x2e>

				/* Call the function. */
				pxCallback->pxCallbackFunction( pxCallback->pvParameter1, pxCallback->ulParameter2 );
 8014d86:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8014d88:	681b      	ldr	r3, [r3, #0]
 8014d8a:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 8014d8c:	6850      	ldr	r0, [r2, #4]
 8014d8e:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 8014d90:	6892      	ldr	r2, [r2, #8]
 8014d92:	4611      	mov	r1, r2
 8014d94:	4798      	blx	r3
		}
		#endif /* INCLUDE_xTimerPendFunctionCall */

		/* Commands that are positive are timer commands rather than pended
		function calls. */
		if( xMessage.xMessageID >= ( BaseType_t ) 0 )
 8014d96:	687b      	ldr	r3, [r7, #4]
 8014d98:	2b00      	cmp	r3, #0
 8014d9a:	f2c0 80ae 	blt.w	8014efa <prvProcessReceivedCommands+0x1a6>
		{
			/* The messages uses the xTimerParameters member to work on a
			software timer. */
			pxTimer = xMessage.u.xTimerParameters.pxTimer;
 8014d9e:	68fb      	ldr	r3, [r7, #12]
 8014da0:	62bb      	str	r3, [r7, #40]	@ 0x28

			if( listIS_CONTAINED_WITHIN( NULL, &( pxTimer->xTimerListItem ) ) == pdFALSE ) /*lint !e961. The cast is only redundant when NULL is passed into the macro. */
 8014da2:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8014da4:	695b      	ldr	r3, [r3, #20]
 8014da6:	2b00      	cmp	r3, #0
 8014da8:	d004      	beq.n	8014db4 <prvProcessReceivedCommands+0x60>
			{
				/* The timer is in a list, remove it. */
				( void ) uxListRemove( &( pxTimer->xTimerListItem ) );
 8014daa:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8014dac:	3304      	adds	r3, #4
 8014dae:	4618      	mov	r0, r3
 8014db0:	f7fc fdc0 	bl	8011934 <uxListRemove>
			it must be present in the function call.  prvSampleTimeNow() must be
			called after the message is received from xTimerQueue so there is no
			possibility of a higher priority task adding a message to the message
			queue with a time that is ahead of the timer daemon task (because it
			pre-empted the timer daemon task after the xTimeNow value was set). */
			xTimeNow = prvSampleTimeNow( &xTimerListsWereSwitched );
 8014db4:	463b      	mov	r3, r7
 8014db6:	4618      	mov	r0, r3
 8014db8:	f7ff ff6a 	bl	8014c90 <prvSampleTimeNow>
 8014dbc:	6278      	str	r0, [r7, #36]	@ 0x24

			switch( xMessage.xMessageID )
 8014dbe:	687b      	ldr	r3, [r7, #4]
 8014dc0:	2b09      	cmp	r3, #9
 8014dc2:	f200 8097 	bhi.w	8014ef4 <prvProcessReceivedCommands+0x1a0>
 8014dc6:	a201      	add	r2, pc, #4	@ (adr r2, 8014dcc <prvProcessReceivedCommands+0x78>)
 8014dc8:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 8014dcc:	08014df5 	.word	0x08014df5
 8014dd0:	08014df5 	.word	0x08014df5
 8014dd4:	08014df5 	.word	0x08014df5
 8014dd8:	08014e6b 	.word	0x08014e6b
 8014ddc:	08014e7f 	.word	0x08014e7f
 8014de0:	08014ecb 	.word	0x08014ecb
 8014de4:	08014df5 	.word	0x08014df5
 8014de8:	08014df5 	.word	0x08014df5
 8014dec:	08014e6b 	.word	0x08014e6b
 8014df0:	08014e7f 	.word	0x08014e7f
				case tmrCOMMAND_START_FROM_ISR :
				case tmrCOMMAND_RESET :
				case tmrCOMMAND_RESET_FROM_ISR :
				case tmrCOMMAND_START_DONT_TRACE :
					/* Start or restart a timer. */
					pxTimer->ucStatus |= tmrSTATUS_IS_ACTIVE;
 8014df4:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8014df6:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8014dfa:	f043 0301 	orr.w	r3, r3, #1
 8014dfe:	b2da      	uxtb	r2, r3
 8014e00:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8014e02:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
					if( prvInsertTimerInActiveList( pxTimer,  xMessage.u.xTimerParameters.xMessageValue + pxTimer->xTimerPeriodInTicks, xTimeNow, xMessage.u.xTimerParameters.xMessageValue ) != pdFALSE )
 8014e06:	68ba      	ldr	r2, [r7, #8]
 8014e08:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8014e0a:	699b      	ldr	r3, [r3, #24]
 8014e0c:	18d1      	adds	r1, r2, r3
 8014e0e:	68bb      	ldr	r3, [r7, #8]
 8014e10:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8014e12:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 8014e14:	f7ff ff5c 	bl	8014cd0 <prvInsertTimerInActiveList>
 8014e18:	4603      	mov	r3, r0
 8014e1a:	2b00      	cmp	r3, #0
 8014e1c:	d06c      	beq.n	8014ef8 <prvProcessReceivedCommands+0x1a4>
					{
						/* The timer expired before it was added to the active
						timer list.  Process it now. */
						pxTimer->pxCallbackFunction( ( TimerHandle_t ) pxTimer );
 8014e1e:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8014e20:	6a1b      	ldr	r3, [r3, #32]
 8014e22:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 8014e24:	4798      	blx	r3
						traceTIMER_EXPIRED( pxTimer );

						if( ( pxTimer->ucStatus & tmrSTATUS_IS_AUTORELOAD ) != 0 )
 8014e26:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8014e28:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8014e2c:	f003 0304 	and.w	r3, r3, #4
 8014e30:	2b00      	cmp	r3, #0
 8014e32:	d061      	beq.n	8014ef8 <prvProcessReceivedCommands+0x1a4>
						{
							xResult = xTimerGenericCommand( pxTimer, tmrCOMMAND_START_DONT_TRACE, xMessage.u.xTimerParameters.xMessageValue + pxTimer->xTimerPeriodInTicks, NULL, tmrNO_DELAY );
 8014e34:	68ba      	ldr	r2, [r7, #8]
 8014e36:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8014e38:	699b      	ldr	r3, [r3, #24]
 8014e3a:	441a      	add	r2, r3
 8014e3c:	2300      	movs	r3, #0
 8014e3e:	9300      	str	r3, [sp, #0]
 8014e40:	2300      	movs	r3, #0
 8014e42:	2100      	movs	r1, #0
 8014e44:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 8014e46:	f7ff fe01 	bl	8014a4c <xTimerGenericCommand>
 8014e4a:	6238      	str	r0, [r7, #32]
							configASSERT( xResult );
 8014e4c:	6a3b      	ldr	r3, [r7, #32]
 8014e4e:	2b00      	cmp	r3, #0
 8014e50:	d152      	bne.n	8014ef8 <prvProcessReceivedCommands+0x1a4>
	__asm volatile
 8014e52:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8014e56:	f383 8811 	msr	BASEPRI, r3
 8014e5a:	f3bf 8f6f 	isb	sy
 8014e5e:	f3bf 8f4f 	dsb	sy
 8014e62:	61bb      	str	r3, [r7, #24]
}
 8014e64:	bf00      	nop
 8014e66:	bf00      	nop
 8014e68:	e7fd      	b.n	8014e66 <prvProcessReceivedCommands+0x112>
					break;

				case tmrCOMMAND_STOP :
				case tmrCOMMAND_STOP_FROM_ISR :
					/* The timer has already been removed from the active list. */
					pxTimer->ucStatus &= ~tmrSTATUS_IS_ACTIVE;
 8014e6a:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8014e6c:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8014e70:	f023 0301 	bic.w	r3, r3, #1
 8014e74:	b2da      	uxtb	r2, r3
 8014e76:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8014e78:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
					break;
 8014e7c:	e03d      	b.n	8014efa <prvProcessReceivedCommands+0x1a6>

				case tmrCOMMAND_CHANGE_PERIOD :
				case tmrCOMMAND_CHANGE_PERIOD_FROM_ISR :
					pxTimer->ucStatus |= tmrSTATUS_IS_ACTIVE;
 8014e7e:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8014e80:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8014e84:	f043 0301 	orr.w	r3, r3, #1
 8014e88:	b2da      	uxtb	r2, r3
 8014e8a:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8014e8c:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
					pxTimer->xTimerPeriodInTicks = xMessage.u.xTimerParameters.xMessageValue;
 8014e90:	68ba      	ldr	r2, [r7, #8]
 8014e92:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8014e94:	619a      	str	r2, [r3, #24]
					configASSERT( ( pxTimer->xTimerPeriodInTicks > 0 ) );
 8014e96:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8014e98:	699b      	ldr	r3, [r3, #24]
 8014e9a:	2b00      	cmp	r3, #0
 8014e9c:	d10b      	bne.n	8014eb6 <prvProcessReceivedCommands+0x162>
	__asm volatile
 8014e9e:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8014ea2:	f383 8811 	msr	BASEPRI, r3
 8014ea6:	f3bf 8f6f 	isb	sy
 8014eaa:	f3bf 8f4f 	dsb	sy
 8014eae:	617b      	str	r3, [r7, #20]
}
 8014eb0:	bf00      	nop
 8014eb2:	bf00      	nop
 8014eb4:	e7fd      	b.n	8014eb2 <prvProcessReceivedCommands+0x15e>
					be longer or shorter than the old one.  The command time is
					therefore set to the current time, and as the period cannot
					be zero the next expiry time can only be in the future,
					meaning (unlike for the xTimerStart() case above) there is
					no fail case that needs to be handled here. */
					( void ) prvInsertTimerInActiveList( pxTimer, ( xTimeNow + pxTimer->xTimerPeriodInTicks ), xTimeNow, xTimeNow );
 8014eb6:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8014eb8:	699a      	ldr	r2, [r3, #24]
 8014eba:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8014ebc:	18d1      	adds	r1, r2, r3
 8014ebe:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8014ec0:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8014ec2:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 8014ec4:	f7ff ff04 	bl	8014cd0 <prvInsertTimerInActiveList>
					break;
 8014ec8:	e017      	b.n	8014efa <prvProcessReceivedCommands+0x1a6>
					#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
					{
						/* The timer has already been removed from the active list,
						just free up the memory if the memory was dynamically
						allocated. */
						if( ( pxTimer->ucStatus & tmrSTATUS_IS_STATICALLY_ALLOCATED ) == ( uint8_t ) 0 )
 8014eca:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8014ecc:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8014ed0:	f003 0302 	and.w	r3, r3, #2
 8014ed4:	2b00      	cmp	r3, #0
 8014ed6:	d103      	bne.n	8014ee0 <prvProcessReceivedCommands+0x18c>
						{
							vPortFree( pxTimer );
 8014ed8:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 8014eda:	f000 fc0d 	bl	80156f8 <vPortFree>
						no need to free the memory - just mark the timer as
						"not active". */
						pxTimer->ucStatus &= ~tmrSTATUS_IS_ACTIVE;
					}
					#endif /* configSUPPORT_DYNAMIC_ALLOCATION */
					break;
 8014ede:	e00c      	b.n	8014efa <prvProcessReceivedCommands+0x1a6>
							pxTimer->ucStatus &= ~tmrSTATUS_IS_ACTIVE;
 8014ee0:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8014ee2:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8014ee6:	f023 0301 	bic.w	r3, r3, #1
 8014eea:	b2da      	uxtb	r2, r3
 8014eec:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8014eee:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
					break;
 8014ef2:	e002      	b.n	8014efa <prvProcessReceivedCommands+0x1a6>

				default	:
					/* Don't expect to get here. */
					break;
 8014ef4:	bf00      	nop
 8014ef6:	e000      	b.n	8014efa <prvProcessReceivedCommands+0x1a6>
					break;
 8014ef8:	bf00      	nop
	while( xQueueReceive( xTimerQueue, &xMessage, tmrNO_DELAY ) != pdFAIL ) /*lint !e603 xMessage does not have to be initialised as it is passed out, not in, and it is not used unless xQueueReceive() returns pdTRUE. */
 8014efa:	4b08      	ldr	r3, [pc, #32]	@ (8014f1c <prvProcessReceivedCommands+0x1c8>)
 8014efc:	681b      	ldr	r3, [r3, #0]
 8014efe:	1d39      	adds	r1, r7, #4
 8014f00:	2200      	movs	r2, #0
 8014f02:	4618      	mov	r0, r3
 8014f04:	f7fd f9dc 	bl	80122c0 <xQueueReceive>
 8014f08:	4603      	mov	r3, r0
 8014f0a:	2b00      	cmp	r3, #0
 8014f0c:	f47f af26 	bne.w	8014d5c <prvProcessReceivedCommands+0x8>
			}
		}
	}
}
 8014f10:	bf00      	nop
 8014f12:	bf00      	nop
 8014f14:	3730      	adds	r7, #48	@ 0x30
 8014f16:	46bd      	mov	sp, r7
 8014f18:	bd80      	pop	{r7, pc}
 8014f1a:	bf00      	nop
 8014f1c:	24004290 	.word	0x24004290

08014f20 <prvSwitchTimerLists>:
/*-----------------------------------------------------------*/

static void prvSwitchTimerLists( void )
{
 8014f20:	b580      	push	{r7, lr}
 8014f22:	b088      	sub	sp, #32
 8014f24:	af02      	add	r7, sp, #8

	/* The tick count has overflowed.  The timer lists must be switched.
	If there are any timers still referenced from the current timer list
	then they must have expired and should be processed before the lists
	are switched. */
	while( listLIST_IS_EMPTY( pxCurrentTimerList ) == pdFALSE )
 8014f26:	e049      	b.n	8014fbc <prvSwitchTimerLists+0x9c>
	{
		xNextExpireTime = listGET_ITEM_VALUE_OF_HEAD_ENTRY( pxCurrentTimerList );
 8014f28:	4b2e      	ldr	r3, [pc, #184]	@ (8014fe4 <prvSwitchTimerLists+0xc4>)
 8014f2a:	681b      	ldr	r3, [r3, #0]
 8014f2c:	68db      	ldr	r3, [r3, #12]
 8014f2e:	681b      	ldr	r3, [r3, #0]
 8014f30:	613b      	str	r3, [r7, #16]

		/* Remove the timer from the list. */
		pxTimer = ( Timer_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxCurrentTimerList ); /*lint !e9087 !e9079 void * is used as this macro is used with tasks and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
 8014f32:	4b2c      	ldr	r3, [pc, #176]	@ (8014fe4 <prvSwitchTimerLists+0xc4>)
 8014f34:	681b      	ldr	r3, [r3, #0]
 8014f36:	68db      	ldr	r3, [r3, #12]
 8014f38:	68db      	ldr	r3, [r3, #12]
 8014f3a:	60fb      	str	r3, [r7, #12]
		( void ) uxListRemove( &( pxTimer->xTimerListItem ) );
 8014f3c:	68fb      	ldr	r3, [r7, #12]
 8014f3e:	3304      	adds	r3, #4
 8014f40:	4618      	mov	r0, r3
 8014f42:	f7fc fcf7 	bl	8011934 <uxListRemove>
		traceTIMER_EXPIRED( pxTimer );

		/* Execute its callback, then send a command to restart the timer if
		it is an auto-reload timer.  It cannot be restarted here as the lists
		have not yet been switched. */
		pxTimer->pxCallbackFunction( ( TimerHandle_t ) pxTimer );
 8014f46:	68fb      	ldr	r3, [r7, #12]
 8014f48:	6a1b      	ldr	r3, [r3, #32]
 8014f4a:	68f8      	ldr	r0, [r7, #12]
 8014f4c:	4798      	blx	r3

		if( ( pxTimer->ucStatus & tmrSTATUS_IS_AUTORELOAD ) != 0 )
 8014f4e:	68fb      	ldr	r3, [r7, #12]
 8014f50:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8014f54:	f003 0304 	and.w	r3, r3, #4
 8014f58:	2b00      	cmp	r3, #0
 8014f5a:	d02f      	beq.n	8014fbc <prvSwitchTimerLists+0x9c>
			the timer going into the same timer list then it has already expired
			and the timer should be re-inserted into the current list so it is
			processed again within this loop.  Otherwise a command should be sent
			to restart the timer to ensure it is only inserted into a list after
			the lists have been swapped. */
			xReloadTime = ( xNextExpireTime + pxTimer->xTimerPeriodInTicks );
 8014f5c:	68fb      	ldr	r3, [r7, #12]
 8014f5e:	699b      	ldr	r3, [r3, #24]
 8014f60:	693a      	ldr	r2, [r7, #16]
 8014f62:	4413      	add	r3, r2
 8014f64:	60bb      	str	r3, [r7, #8]
			if( xReloadTime > xNextExpireTime )
 8014f66:	68ba      	ldr	r2, [r7, #8]
 8014f68:	693b      	ldr	r3, [r7, #16]
 8014f6a:	429a      	cmp	r2, r3
 8014f6c:	d90e      	bls.n	8014f8c <prvSwitchTimerLists+0x6c>
			{
				listSET_LIST_ITEM_VALUE( &( pxTimer->xTimerListItem ), xReloadTime );
 8014f6e:	68fb      	ldr	r3, [r7, #12]
 8014f70:	68ba      	ldr	r2, [r7, #8]
 8014f72:	605a      	str	r2, [r3, #4]
				listSET_LIST_ITEM_OWNER( &( pxTimer->xTimerListItem ), pxTimer );
 8014f74:	68fb      	ldr	r3, [r7, #12]
 8014f76:	68fa      	ldr	r2, [r7, #12]
 8014f78:	611a      	str	r2, [r3, #16]
				vListInsert( pxCurrentTimerList, &( pxTimer->xTimerListItem ) );
 8014f7a:	4b1a      	ldr	r3, [pc, #104]	@ (8014fe4 <prvSwitchTimerLists+0xc4>)
 8014f7c:	681a      	ldr	r2, [r3, #0]
 8014f7e:	68fb      	ldr	r3, [r7, #12]
 8014f80:	3304      	adds	r3, #4
 8014f82:	4619      	mov	r1, r3
 8014f84:	4610      	mov	r0, r2
 8014f86:	f7fc fc9c 	bl	80118c2 <vListInsert>
 8014f8a:	e017      	b.n	8014fbc <prvSwitchTimerLists+0x9c>
			}
			else
			{
				xResult = xTimerGenericCommand( pxTimer, tmrCOMMAND_START_DONT_TRACE, xNextExpireTime, NULL, tmrNO_DELAY );
 8014f8c:	2300      	movs	r3, #0
 8014f8e:	9300      	str	r3, [sp, #0]
 8014f90:	2300      	movs	r3, #0
 8014f92:	693a      	ldr	r2, [r7, #16]
 8014f94:	2100      	movs	r1, #0
 8014f96:	68f8      	ldr	r0, [r7, #12]
 8014f98:	f7ff fd58 	bl	8014a4c <xTimerGenericCommand>
 8014f9c:	6078      	str	r0, [r7, #4]
				configASSERT( xResult );
 8014f9e:	687b      	ldr	r3, [r7, #4]
 8014fa0:	2b00      	cmp	r3, #0
 8014fa2:	d10b      	bne.n	8014fbc <prvSwitchTimerLists+0x9c>
	__asm volatile
 8014fa4:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8014fa8:	f383 8811 	msr	BASEPRI, r3
 8014fac:	f3bf 8f6f 	isb	sy
 8014fb0:	f3bf 8f4f 	dsb	sy
 8014fb4:	603b      	str	r3, [r7, #0]
}
 8014fb6:	bf00      	nop
 8014fb8:	bf00      	nop
 8014fba:	e7fd      	b.n	8014fb8 <prvSwitchTimerLists+0x98>
	while( listLIST_IS_EMPTY( pxCurrentTimerList ) == pdFALSE )
 8014fbc:	4b09      	ldr	r3, [pc, #36]	@ (8014fe4 <prvSwitchTimerLists+0xc4>)
 8014fbe:	681b      	ldr	r3, [r3, #0]
 8014fc0:	681b      	ldr	r3, [r3, #0]
 8014fc2:	2b00      	cmp	r3, #0
 8014fc4:	d1b0      	bne.n	8014f28 <prvSwitchTimerLists+0x8>
		{
			mtCOVERAGE_TEST_MARKER();
		}
	}

	pxTemp = pxCurrentTimerList;
 8014fc6:	4b07      	ldr	r3, [pc, #28]	@ (8014fe4 <prvSwitchTimerLists+0xc4>)
 8014fc8:	681b      	ldr	r3, [r3, #0]
 8014fca:	617b      	str	r3, [r7, #20]
	pxCurrentTimerList = pxOverflowTimerList;
 8014fcc:	4b06      	ldr	r3, [pc, #24]	@ (8014fe8 <prvSwitchTimerLists+0xc8>)
 8014fce:	681b      	ldr	r3, [r3, #0]
 8014fd0:	4a04      	ldr	r2, [pc, #16]	@ (8014fe4 <prvSwitchTimerLists+0xc4>)
 8014fd2:	6013      	str	r3, [r2, #0]
	pxOverflowTimerList = pxTemp;
 8014fd4:	4a04      	ldr	r2, [pc, #16]	@ (8014fe8 <prvSwitchTimerLists+0xc8>)
 8014fd6:	697b      	ldr	r3, [r7, #20]
 8014fd8:	6013      	str	r3, [r2, #0]
}
 8014fda:	bf00      	nop
 8014fdc:	3718      	adds	r7, #24
 8014fde:	46bd      	mov	sp, r7
 8014fe0:	bd80      	pop	{r7, pc}
 8014fe2:	bf00      	nop
 8014fe4:	24004288 	.word	0x24004288
 8014fe8:	2400428c 	.word	0x2400428c

08014fec <prvCheckForValidListAndQueue>:
/*-----------------------------------------------------------*/

static void prvCheckForValidListAndQueue( void )
{
 8014fec:	b580      	push	{r7, lr}
 8014fee:	b082      	sub	sp, #8
 8014ff0:	af02      	add	r7, sp, #8
	/* Check that the list from which active timers are referenced, and the
	queue used to communicate with the timer service, have been
	initialised. */
	taskENTER_CRITICAL();
 8014ff2:	f000 f991 	bl	8015318 <vPortEnterCritical>
	{
		if( xTimerQueue == NULL )
 8014ff6:	4b15      	ldr	r3, [pc, #84]	@ (801504c <prvCheckForValidListAndQueue+0x60>)
 8014ff8:	681b      	ldr	r3, [r3, #0]
 8014ffa:	2b00      	cmp	r3, #0
 8014ffc:	d120      	bne.n	8015040 <prvCheckForValidListAndQueue+0x54>
		{
			vListInitialise( &xActiveTimerList1 );
 8014ffe:	4814      	ldr	r0, [pc, #80]	@ (8015050 <prvCheckForValidListAndQueue+0x64>)
 8015000:	f7fc fc0e 	bl	8011820 <vListInitialise>
			vListInitialise( &xActiveTimerList2 );
 8015004:	4813      	ldr	r0, [pc, #76]	@ (8015054 <prvCheckForValidListAndQueue+0x68>)
 8015006:	f7fc fc0b 	bl	8011820 <vListInitialise>
			pxCurrentTimerList = &xActiveTimerList1;
 801500a:	4b13      	ldr	r3, [pc, #76]	@ (8015058 <prvCheckForValidListAndQueue+0x6c>)
 801500c:	4a10      	ldr	r2, [pc, #64]	@ (8015050 <prvCheckForValidListAndQueue+0x64>)
 801500e:	601a      	str	r2, [r3, #0]
			pxOverflowTimerList = &xActiveTimerList2;
 8015010:	4b12      	ldr	r3, [pc, #72]	@ (801505c <prvCheckForValidListAndQueue+0x70>)
 8015012:	4a10      	ldr	r2, [pc, #64]	@ (8015054 <prvCheckForValidListAndQueue+0x68>)
 8015014:	601a      	str	r2, [r3, #0]
				/* The timer queue is allocated statically in case
				configSUPPORT_DYNAMIC_ALLOCATION is 0. */
				static StaticQueue_t xStaticTimerQueue; /*lint !e956 Ok to declare in this manner to prevent additional conditional compilation guards in other locations. */
				static uint8_t ucStaticTimerQueueStorage[ ( size_t ) configTIMER_QUEUE_LENGTH * sizeof( DaemonTaskMessage_t ) ]; /*lint !e956 Ok to declare in this manner to prevent additional conditional compilation guards in other locations. */

				xTimerQueue = xQueueCreateStatic( ( UBaseType_t ) configTIMER_QUEUE_LENGTH, ( UBaseType_t ) sizeof( DaemonTaskMessage_t ), &( ucStaticTimerQueueStorage[ 0 ] ), &xStaticTimerQueue );
 8015016:	2300      	movs	r3, #0
 8015018:	9300      	str	r3, [sp, #0]
 801501a:	4b11      	ldr	r3, [pc, #68]	@ (8015060 <prvCheckForValidListAndQueue+0x74>)
 801501c:	4a11      	ldr	r2, [pc, #68]	@ (8015064 <prvCheckForValidListAndQueue+0x78>)
 801501e:	2110      	movs	r1, #16
 8015020:	200a      	movs	r0, #10
 8015022:	f7fc fd1b 	bl	8011a5c <xQueueGenericCreateStatic>
 8015026:	4603      	mov	r3, r0
 8015028:	4a08      	ldr	r2, [pc, #32]	@ (801504c <prvCheckForValidListAndQueue+0x60>)
 801502a:	6013      	str	r3, [r2, #0]
			}
			#endif

			#if ( configQUEUE_REGISTRY_SIZE > 0 )
			{
				if( xTimerQueue != NULL )
 801502c:	4b07      	ldr	r3, [pc, #28]	@ (801504c <prvCheckForValidListAndQueue+0x60>)
 801502e:	681b      	ldr	r3, [r3, #0]
 8015030:	2b00      	cmp	r3, #0
 8015032:	d005      	beq.n	8015040 <prvCheckForValidListAndQueue+0x54>
				{
					vQueueAddToRegistry( xTimerQueue, "TmrQ" );
 8015034:	4b05      	ldr	r3, [pc, #20]	@ (801504c <prvCheckForValidListAndQueue+0x60>)
 8015036:	681b      	ldr	r3, [r3, #0]
 8015038:	490b      	ldr	r1, [pc, #44]	@ (8015068 <prvCheckForValidListAndQueue+0x7c>)
 801503a:	4618      	mov	r0, r3
 801503c:	f7fd fd3e 	bl	8012abc <vQueueAddToRegistry>
		else
		{
			mtCOVERAGE_TEST_MARKER();
		}
	}
	taskEXIT_CRITICAL();
 8015040:	f000 f99c 	bl	801537c <vPortExitCritical>
}
 8015044:	bf00      	nop
 8015046:	46bd      	mov	sp, r7
 8015048:	bd80      	pop	{r7, pc}
 801504a:	bf00      	nop
 801504c:	24004290 	.word	0x24004290
 8015050:	24004260 	.word	0x24004260
 8015054:	24004274 	.word	0x24004274
 8015058:	24004288 	.word	0x24004288
 801505c:	2400428c 	.word	0x2400428c
 8015060:	2400433c 	.word	0x2400433c
 8015064:	2400429c 	.word	0x2400429c
 8015068:	0802d410 	.word	0x0802d410

0801506c <pvTimerGetTimerID>:
	return xReturn;
} /*lint !e818 Can't be pointer to const due to the typedef. */
/*-----------------------------------------------------------*/

void *pvTimerGetTimerID( const TimerHandle_t xTimer )
{
 801506c:	b580      	push	{r7, lr}
 801506e:	b086      	sub	sp, #24
 8015070:	af00      	add	r7, sp, #0
 8015072:	6078      	str	r0, [r7, #4]
Timer_t * const pxTimer = xTimer;
 8015074:	687b      	ldr	r3, [r7, #4]
 8015076:	617b      	str	r3, [r7, #20]
void *pvReturn;

	configASSERT( xTimer );
 8015078:	687b      	ldr	r3, [r7, #4]
 801507a:	2b00      	cmp	r3, #0
 801507c:	d10b      	bne.n	8015096 <pvTimerGetTimerID+0x2a>
	__asm volatile
 801507e:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8015082:	f383 8811 	msr	BASEPRI, r3
 8015086:	f3bf 8f6f 	isb	sy
 801508a:	f3bf 8f4f 	dsb	sy
 801508e:	60fb      	str	r3, [r7, #12]
}
 8015090:	bf00      	nop
 8015092:	bf00      	nop
 8015094:	e7fd      	b.n	8015092 <pvTimerGetTimerID+0x26>

	taskENTER_CRITICAL();
 8015096:	f000 f93f 	bl	8015318 <vPortEnterCritical>
	{
		pvReturn = pxTimer->pvTimerID;
 801509a:	697b      	ldr	r3, [r7, #20]
 801509c:	69db      	ldr	r3, [r3, #28]
 801509e:	613b      	str	r3, [r7, #16]
	}
	taskEXIT_CRITICAL();
 80150a0:	f000 f96c 	bl	801537c <vPortExitCritical>

	return pvReturn;
 80150a4:	693b      	ldr	r3, [r7, #16]
}
 80150a6:	4618      	mov	r0, r3
 80150a8:	3718      	adds	r7, #24
 80150aa:	46bd      	mov	sp, r7
 80150ac:	bd80      	pop	{r7, pc}
	...

080150b0 <pxPortInitialiseStack>:

/*
 * See header file for description.
 */
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
{
 80150b0:	b480      	push	{r7}
 80150b2:	b085      	sub	sp, #20
 80150b4:	af00      	add	r7, sp, #0
 80150b6:	60f8      	str	r0, [r7, #12]
 80150b8:	60b9      	str	r1, [r7, #8]
 80150ba:	607a      	str	r2, [r7, #4]
	/* Simulate the stack frame as it would be created by a context switch
	interrupt. */

	/* Offset added to account for the way the MCU uses the stack on entry/exit
	of interrupts, and to ensure alignment. */
	pxTopOfStack--;
 80150bc:	68fb      	ldr	r3, [r7, #12]
 80150be:	3b04      	subs	r3, #4
 80150c0:	60fb      	str	r3, [r7, #12]

	*pxTopOfStack = portINITIAL_XPSR;	/* xPSR */
 80150c2:	68fb      	ldr	r3, [r7, #12]
 80150c4:	f04f 7280 	mov.w	r2, #16777216	@ 0x1000000
 80150c8:	601a      	str	r2, [r3, #0]
	pxTopOfStack--;
 80150ca:	68fb      	ldr	r3, [r7, #12]
 80150cc:	3b04      	subs	r3, #4
 80150ce:	60fb      	str	r3, [r7, #12]
	*pxTopOfStack = ( ( StackType_t ) pxCode ) & portSTART_ADDRESS_MASK;	/* PC */
 80150d0:	68bb      	ldr	r3, [r7, #8]
 80150d2:	f023 0201 	bic.w	r2, r3, #1
 80150d6:	68fb      	ldr	r3, [r7, #12]
 80150d8:	601a      	str	r2, [r3, #0]
	pxTopOfStack--;
 80150da:	68fb      	ldr	r3, [r7, #12]
 80150dc:	3b04      	subs	r3, #4
 80150de:	60fb      	str	r3, [r7, #12]
	*pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS;	/* LR */
 80150e0:	4a0c      	ldr	r2, [pc, #48]	@ (8015114 <pxPortInitialiseStack+0x64>)
 80150e2:	68fb      	ldr	r3, [r7, #12]
 80150e4:	601a      	str	r2, [r3, #0]

	/* Save code space by skipping register initialisation. */
	pxTopOfStack -= 5;	/* R12, R3, R2 and R1. */
 80150e6:	68fb      	ldr	r3, [r7, #12]
 80150e8:	3b14      	subs	r3, #20
 80150ea:	60fb      	str	r3, [r7, #12]
	*pxTopOfStack = ( StackType_t ) pvParameters;	/* R0 */
 80150ec:	687a      	ldr	r2, [r7, #4]
 80150ee:	68fb      	ldr	r3, [r7, #12]
 80150f0:	601a      	str	r2, [r3, #0]

	/* A save method is being used that requires each task to maintain its
	own exec return value. */
	pxTopOfStack--;
 80150f2:	68fb      	ldr	r3, [r7, #12]
 80150f4:	3b04      	subs	r3, #4
 80150f6:	60fb      	str	r3, [r7, #12]
	*pxTopOfStack = portINITIAL_EXC_RETURN;
 80150f8:	68fb      	ldr	r3, [r7, #12]
 80150fa:	f06f 0202 	mvn.w	r2, #2
 80150fe:	601a      	str	r2, [r3, #0]

	pxTopOfStack -= 8;	/* R11, R10, R9, R8, R7, R6, R5 and R4. */
 8015100:	68fb      	ldr	r3, [r7, #12]
 8015102:	3b20      	subs	r3, #32
 8015104:	60fb      	str	r3, [r7, #12]

	return pxTopOfStack;
 8015106:	68fb      	ldr	r3, [r7, #12]
}
 8015108:	4618      	mov	r0, r3
 801510a:	3714      	adds	r7, #20
 801510c:	46bd      	mov	sp, r7
 801510e:	f85d 7b04 	ldr.w	r7, [sp], #4
 8015112:	4770      	bx	lr
 8015114:	08015119 	.word	0x08015119

08015118 <prvTaskExitError>:
/*-----------------------------------------------------------*/

static void prvTaskExitError( void )
{
 8015118:	b480      	push	{r7}
 801511a:	b085      	sub	sp, #20
 801511c:	af00      	add	r7, sp, #0
volatile uint32_t ulDummy = 0;
 801511e:	2300      	movs	r3, #0
 8015120:	607b      	str	r3, [r7, #4]
	its caller as there is nothing to return to.  If a task wants to exit it
	should instead call vTaskDelete( NULL ).

	Artificially force an assert() to be triggered if configASSERT() is
	defined, then stop here so application writers can catch the error. */
	configASSERT( uxCriticalNesting == ~0UL );
 8015122:	4b13      	ldr	r3, [pc, #76]	@ (8015170 <prvTaskExitError+0x58>)
 8015124:	681b      	ldr	r3, [r3, #0]
 8015126:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 801512a:	d00b      	beq.n	8015144 <prvTaskExitError+0x2c>
	__asm volatile
 801512c:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8015130:	f383 8811 	msr	BASEPRI, r3
 8015134:	f3bf 8f6f 	isb	sy
 8015138:	f3bf 8f4f 	dsb	sy
 801513c:	60fb      	str	r3, [r7, #12]
}
 801513e:	bf00      	nop
 8015140:	bf00      	nop
 8015142:	e7fd      	b.n	8015140 <prvTaskExitError+0x28>
	__asm volatile
 8015144:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8015148:	f383 8811 	msr	BASEPRI, r3
 801514c:	f3bf 8f6f 	isb	sy
 8015150:	f3bf 8f4f 	dsb	sy
 8015154:	60bb      	str	r3, [r7, #8]
}
 8015156:	bf00      	nop
	portDISABLE_INTERRUPTS();
	while( ulDummy == 0 )
 8015158:	bf00      	nop
 801515a:	687b      	ldr	r3, [r7, #4]
 801515c:	2b00      	cmp	r3, #0
 801515e:	d0fc      	beq.n	801515a <prvTaskExitError+0x42>
		about code appearing after this function is called - making ulDummy
		volatile makes the compiler think the function could return and
		therefore not output an 'unreachable code' warning for code that appears
		after it. */
	}
}
 8015160:	bf00      	nop
 8015162:	bf00      	nop
 8015164:	3714      	adds	r7, #20
 8015166:	46bd      	mov	sp, r7
 8015168:	f85d 7b04 	ldr.w	r7, [sp], #4
 801516c:	4770      	bx	lr
 801516e:	bf00      	nop
 8015170:	24000048 	.word	0x24000048
	...

08015180 <SVC_Handler>:
/*-----------------------------------------------------------*/

void vPortSVCHandler( void )
{
	__asm volatile (
 8015180:	4b07      	ldr	r3, [pc, #28]	@ (80151a0 <pxCurrentTCBConst2>)
 8015182:	6819      	ldr	r1, [r3, #0]
 8015184:	6808      	ldr	r0, [r1, #0]
 8015186:	e8b0 4ff0 	ldmia.w	r0!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 801518a:	f380 8809 	msr	PSP, r0
 801518e:	f3bf 8f6f 	isb	sy
 8015192:	f04f 0000 	mov.w	r0, #0
 8015196:	f380 8811 	msr	BASEPRI, r0
 801519a:	4770      	bx	lr
 801519c:	f3af 8000 	nop.w

080151a0 <pxCurrentTCBConst2>:
 80151a0:	24003d60 	.word	0x24003d60
					"	bx r14							\n"
					"									\n"
					"	.align 4						\n"
					"pxCurrentTCBConst2: .word pxCurrentTCB				\n"
				);
}
 80151a4:	bf00      	nop
 80151a6:	bf00      	nop

080151a8 <prvPortStartFirstTask>:
{
	/* Start the first task.  This also clears the bit that indicates the FPU is
	in use in case the FPU was used before the scheduler was started - which
	would otherwise result in the unnecessary leaving of space in the SVC stack
	for lazy saving of FPU registers. */
	__asm volatile(
 80151a8:	4808      	ldr	r0, [pc, #32]	@ (80151cc <prvPortStartFirstTask+0x24>)
 80151aa:	6800      	ldr	r0, [r0, #0]
 80151ac:	6800      	ldr	r0, [r0, #0]
 80151ae:	f380 8808 	msr	MSP, r0
 80151b2:	f04f 0000 	mov.w	r0, #0
 80151b6:	f380 8814 	msr	CONTROL, r0
 80151ba:	b662      	cpsie	i
 80151bc:	b661      	cpsie	f
 80151be:	f3bf 8f4f 	dsb	sy
 80151c2:	f3bf 8f6f 	isb	sy
 80151c6:	df00      	svc	0
 80151c8:	bf00      	nop
					" dsb					\n"
					" isb					\n"
					" svc 0					\n" /* System call to start first task. */
					" nop					\n"
				);
}
 80151ca:	bf00      	nop
 80151cc:	e000ed08 	.word	0xe000ed08

080151d0 <xPortStartScheduler>:

/*
 * See header file for description.
 */
BaseType_t xPortStartScheduler( void )
{
 80151d0:	b580      	push	{r7, lr}
 80151d2:	b086      	sub	sp, #24
 80151d4:	af00      	add	r7, sp, #0
	configASSERT( configMAX_SYSCALL_INTERRUPT_PRIORITY );

	/* This port can be used on all revisions of the Cortex-M7 core other than
	the r0p1 parts.  r0p1 parts should use the port from the
	/source/portable/GCC/ARM_CM7/r0p1 directory. */
	configASSERT( portCPUID != portCORTEX_M7_r0p1_ID );
 80151d6:	4b47      	ldr	r3, [pc, #284]	@ (80152f4 <xPortStartScheduler+0x124>)
 80151d8:	681b      	ldr	r3, [r3, #0]
 80151da:	4a47      	ldr	r2, [pc, #284]	@ (80152f8 <xPortStartScheduler+0x128>)
 80151dc:	4293      	cmp	r3, r2
 80151de:	d10b      	bne.n	80151f8 <xPortStartScheduler+0x28>
	__asm volatile
 80151e0:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80151e4:	f383 8811 	msr	BASEPRI, r3
 80151e8:	f3bf 8f6f 	isb	sy
 80151ec:	f3bf 8f4f 	dsb	sy
 80151f0:	613b      	str	r3, [r7, #16]
}
 80151f2:	bf00      	nop
 80151f4:	bf00      	nop
 80151f6:	e7fd      	b.n	80151f4 <xPortStartScheduler+0x24>
	configASSERT( portCPUID != portCORTEX_M7_r0p0_ID );
 80151f8:	4b3e      	ldr	r3, [pc, #248]	@ (80152f4 <xPortStartScheduler+0x124>)
 80151fa:	681b      	ldr	r3, [r3, #0]
 80151fc:	4a3f      	ldr	r2, [pc, #252]	@ (80152fc <xPortStartScheduler+0x12c>)
 80151fe:	4293      	cmp	r3, r2
 8015200:	d10b      	bne.n	801521a <xPortStartScheduler+0x4a>
	__asm volatile
 8015202:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8015206:	f383 8811 	msr	BASEPRI, r3
 801520a:	f3bf 8f6f 	isb	sy
 801520e:	f3bf 8f4f 	dsb	sy
 8015212:	60fb      	str	r3, [r7, #12]
}
 8015214:	bf00      	nop
 8015216:	bf00      	nop
 8015218:	e7fd      	b.n	8015216 <xPortStartScheduler+0x46>

	#if( configASSERT_DEFINED == 1 )
	{
		volatile uint32_t ulOriginalPriority;
		volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
 801521a:	4b39      	ldr	r3, [pc, #228]	@ (8015300 <xPortStartScheduler+0x130>)
 801521c:	617b      	str	r3, [r7, #20]
		functions can be called.  ISR safe functions are those that end in
		"FromISR".  FreeRTOS maintains separate thread and ISR API functions to
		ensure interrupt entry is as fast and simple as possible.

		Save the interrupt priority value that is about to be clobbered. */
		ulOriginalPriority = *pucFirstUserPriorityRegister;
 801521e:	697b      	ldr	r3, [r7, #20]
 8015220:	781b      	ldrb	r3, [r3, #0]
 8015222:	b2db      	uxtb	r3, r3
 8015224:	607b      	str	r3, [r7, #4]

		/* Determine the number of priority bits available.  First write to all
		possible bits. */
		*pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
 8015226:	697b      	ldr	r3, [r7, #20]
 8015228:	22ff      	movs	r2, #255	@ 0xff
 801522a:	701a      	strb	r2, [r3, #0]

		/* Read the value back to see how many bits stuck. */
		ucMaxPriorityValue = *pucFirstUserPriorityRegister;
 801522c:	697b      	ldr	r3, [r7, #20]
 801522e:	781b      	ldrb	r3, [r3, #0]
 8015230:	b2db      	uxtb	r3, r3
 8015232:	70fb      	strb	r3, [r7, #3]

		/* Use the same mask on the maximum system call priority. */
		ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
 8015234:	78fb      	ldrb	r3, [r7, #3]
 8015236:	b2db      	uxtb	r3, r3
 8015238:	f003 0350 	and.w	r3, r3, #80	@ 0x50
 801523c:	b2da      	uxtb	r2, r3
 801523e:	4b31      	ldr	r3, [pc, #196]	@ (8015304 <xPortStartScheduler+0x134>)
 8015240:	701a      	strb	r2, [r3, #0]

		/* Calculate the maximum acceptable priority group value for the number
		of bits read back. */
		ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
 8015242:	4b31      	ldr	r3, [pc, #196]	@ (8015308 <xPortStartScheduler+0x138>)
 8015244:	2207      	movs	r2, #7
 8015246:	601a      	str	r2, [r3, #0]
		while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
 8015248:	e009      	b.n	801525e <xPortStartScheduler+0x8e>
		{
			ulMaxPRIGROUPValue--;
 801524a:	4b2f      	ldr	r3, [pc, #188]	@ (8015308 <xPortStartScheduler+0x138>)
 801524c:	681b      	ldr	r3, [r3, #0]
 801524e:	3b01      	subs	r3, #1
 8015250:	4a2d      	ldr	r2, [pc, #180]	@ (8015308 <xPortStartScheduler+0x138>)
 8015252:	6013      	str	r3, [r2, #0]
			ucMaxPriorityValue <<= ( uint8_t ) 0x01;
 8015254:	78fb      	ldrb	r3, [r7, #3]
 8015256:	b2db      	uxtb	r3, r3
 8015258:	005b      	lsls	r3, r3, #1
 801525a:	b2db      	uxtb	r3, r3
 801525c:	70fb      	strb	r3, [r7, #3]
		while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
 801525e:	78fb      	ldrb	r3, [r7, #3]
 8015260:	b2db      	uxtb	r3, r3
 8015262:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 8015266:	2b80      	cmp	r3, #128	@ 0x80
 8015268:	d0ef      	beq.n	801524a <xPortStartScheduler+0x7a>
		#ifdef configPRIO_BITS
		{
			/* Check the FreeRTOS configuration that defines the number of
			priority bits matches the number of priority bits actually queried
			from the hardware. */
			configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == configPRIO_BITS );
 801526a:	4b27      	ldr	r3, [pc, #156]	@ (8015308 <xPortStartScheduler+0x138>)
 801526c:	681b      	ldr	r3, [r3, #0]
 801526e:	f1c3 0307 	rsb	r3, r3, #7
 8015272:	2b04      	cmp	r3, #4
 8015274:	d00b      	beq.n	801528e <xPortStartScheduler+0xbe>
	__asm volatile
 8015276:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801527a:	f383 8811 	msr	BASEPRI, r3
 801527e:	f3bf 8f6f 	isb	sy
 8015282:	f3bf 8f4f 	dsb	sy
 8015286:	60bb      	str	r3, [r7, #8]
}
 8015288:	bf00      	nop
 801528a:	bf00      	nop
 801528c:	e7fd      	b.n	801528a <xPortStartScheduler+0xba>
		}
		#endif

		/* Shift the priority group value back to its position within the AIRCR
		register. */
		ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;
 801528e:	4b1e      	ldr	r3, [pc, #120]	@ (8015308 <xPortStartScheduler+0x138>)
 8015290:	681b      	ldr	r3, [r3, #0]
 8015292:	021b      	lsls	r3, r3, #8
 8015294:	4a1c      	ldr	r2, [pc, #112]	@ (8015308 <xPortStartScheduler+0x138>)
 8015296:	6013      	str	r3, [r2, #0]
		ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK;
 8015298:	4b1b      	ldr	r3, [pc, #108]	@ (8015308 <xPortStartScheduler+0x138>)
 801529a:	681b      	ldr	r3, [r3, #0]
 801529c:	f403 63e0 	and.w	r3, r3, #1792	@ 0x700
 80152a0:	4a19      	ldr	r2, [pc, #100]	@ (8015308 <xPortStartScheduler+0x138>)
 80152a2:	6013      	str	r3, [r2, #0]

		/* Restore the clobbered interrupt priority register to its original
		value. */
		*pucFirstUserPriorityRegister = ulOriginalPriority;
 80152a4:	687b      	ldr	r3, [r7, #4]
 80152a6:	b2da      	uxtb	r2, r3
 80152a8:	697b      	ldr	r3, [r7, #20]
 80152aa:	701a      	strb	r2, [r3, #0]
	}
	#endif /* conifgASSERT_DEFINED */

	/* Make PendSV and SysTick the lowest priority interrupts. */
	portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
 80152ac:	4b17      	ldr	r3, [pc, #92]	@ (801530c <xPortStartScheduler+0x13c>)
 80152ae:	681b      	ldr	r3, [r3, #0]
 80152b0:	4a16      	ldr	r2, [pc, #88]	@ (801530c <xPortStartScheduler+0x13c>)
 80152b2:	f443 0370 	orr.w	r3, r3, #15728640	@ 0xf00000
 80152b6:	6013      	str	r3, [r2, #0]
	portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
 80152b8:	4b14      	ldr	r3, [pc, #80]	@ (801530c <xPortStartScheduler+0x13c>)
 80152ba:	681b      	ldr	r3, [r3, #0]
 80152bc:	4a13      	ldr	r2, [pc, #76]	@ (801530c <xPortStartScheduler+0x13c>)
 80152be:	f043 4370 	orr.w	r3, r3, #4026531840	@ 0xf0000000
 80152c2:	6013      	str	r3, [r2, #0]

	/* Start the timer that generates the tick ISR.  Interrupts are disabled
	here already. */
	vPortSetupTimerInterrupt();
 80152c4:	f000 f8da 	bl	801547c <vPortSetupTimerInterrupt>

	/* Initialise the critical nesting count ready for the first task. */
	uxCriticalNesting = 0;
 80152c8:	4b11      	ldr	r3, [pc, #68]	@ (8015310 <xPortStartScheduler+0x140>)
 80152ca:	2200      	movs	r2, #0
 80152cc:	601a      	str	r2, [r3, #0]

	/* Ensure the VFP is enabled - it should be anyway. */
	vPortEnableVFP();
 80152ce:	f000 f8f9 	bl	80154c4 <vPortEnableVFP>

	/* Lazy save always. */
	*( portFPCCR ) |= portASPEN_AND_LSPEN_BITS;
 80152d2:	4b10      	ldr	r3, [pc, #64]	@ (8015314 <xPortStartScheduler+0x144>)
 80152d4:	681b      	ldr	r3, [r3, #0]
 80152d6:	4a0f      	ldr	r2, [pc, #60]	@ (8015314 <xPortStartScheduler+0x144>)
 80152d8:	f043 4340 	orr.w	r3, r3, #3221225472	@ 0xc0000000
 80152dc:	6013      	str	r3, [r2, #0]

	/* Start the first task. */
	prvPortStartFirstTask();
 80152de:	f7ff ff63 	bl	80151a8 <prvPortStartFirstTask>
	exit error function to prevent compiler warnings about a static function
	not being called in the case that the application writer overrides this
	functionality by defining configTASK_RETURN_ADDRESS.  Call
	vTaskSwitchContext() so link time optimisation does not remove the
	symbol. */
	vTaskSwitchContext();
 80152e2:	f7fe fbf7 	bl	8013ad4 <vTaskSwitchContext>
	prvTaskExitError();
 80152e6:	f7ff ff17 	bl	8015118 <prvTaskExitError>

	/* Should not get here! */
	return 0;
 80152ea:	2300      	movs	r3, #0
}
 80152ec:	4618      	mov	r0, r3
 80152ee:	3718      	adds	r7, #24
 80152f0:	46bd      	mov	sp, r7
 80152f2:	bd80      	pop	{r7, pc}
 80152f4:	e000ed00 	.word	0xe000ed00
 80152f8:	410fc271 	.word	0x410fc271
 80152fc:	410fc270 	.word	0x410fc270
 8015300:	e000e400 	.word	0xe000e400
 8015304:	2400438c 	.word	0x2400438c
 8015308:	24004390 	.word	0x24004390
 801530c:	e000ed20 	.word	0xe000ed20
 8015310:	24000048 	.word	0x24000048
 8015314:	e000ef34 	.word	0xe000ef34

08015318 <vPortEnterCritical>:
	configASSERT( uxCriticalNesting == 1000UL );
}
/*-----------------------------------------------------------*/

void vPortEnterCritical( void )
{
 8015318:	b480      	push	{r7}
 801531a:	b083      	sub	sp, #12
 801531c:	af00      	add	r7, sp, #0
	__asm volatile
 801531e:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8015322:	f383 8811 	msr	BASEPRI, r3
 8015326:	f3bf 8f6f 	isb	sy
 801532a:	f3bf 8f4f 	dsb	sy
 801532e:	607b      	str	r3, [r7, #4]
}
 8015330:	bf00      	nop
	portDISABLE_INTERRUPTS();
	uxCriticalNesting++;
 8015332:	4b10      	ldr	r3, [pc, #64]	@ (8015374 <vPortEnterCritical+0x5c>)
 8015334:	681b      	ldr	r3, [r3, #0]
 8015336:	3301      	adds	r3, #1
 8015338:	4a0e      	ldr	r2, [pc, #56]	@ (8015374 <vPortEnterCritical+0x5c>)
 801533a:	6013      	str	r3, [r2, #0]
	/* This is not the interrupt safe version of the enter critical function so
	assert() if it is being called from an interrupt context.  Only API
	functions that end in "FromISR" can be used in an interrupt.  Only assert if
	the critical nesting count is 1 to protect against recursive calls if the
	assert function also uses a critical section. */
	if( uxCriticalNesting == 1 )
 801533c:	4b0d      	ldr	r3, [pc, #52]	@ (8015374 <vPortEnterCritical+0x5c>)
 801533e:	681b      	ldr	r3, [r3, #0]
 8015340:	2b01      	cmp	r3, #1
 8015342:	d110      	bne.n	8015366 <vPortEnterCritical+0x4e>
	{
		configASSERT( ( portNVIC_INT_CTRL_REG & portVECTACTIVE_MASK ) == 0 );
 8015344:	4b0c      	ldr	r3, [pc, #48]	@ (8015378 <vPortEnterCritical+0x60>)
 8015346:	681b      	ldr	r3, [r3, #0]
 8015348:	b2db      	uxtb	r3, r3
 801534a:	2b00      	cmp	r3, #0
 801534c:	d00b      	beq.n	8015366 <vPortEnterCritical+0x4e>
	__asm volatile
 801534e:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8015352:	f383 8811 	msr	BASEPRI, r3
 8015356:	f3bf 8f6f 	isb	sy
 801535a:	f3bf 8f4f 	dsb	sy
 801535e:	603b      	str	r3, [r7, #0]
}
 8015360:	bf00      	nop
 8015362:	bf00      	nop
 8015364:	e7fd      	b.n	8015362 <vPortEnterCritical+0x4a>
	}
}
 8015366:	bf00      	nop
 8015368:	370c      	adds	r7, #12
 801536a:	46bd      	mov	sp, r7
 801536c:	f85d 7b04 	ldr.w	r7, [sp], #4
 8015370:	4770      	bx	lr
 8015372:	bf00      	nop
 8015374:	24000048 	.word	0x24000048
 8015378:	e000ed04 	.word	0xe000ed04

0801537c <vPortExitCritical>:
/*-----------------------------------------------------------*/

void vPortExitCritical( void )
{
 801537c:	b480      	push	{r7}
 801537e:	b083      	sub	sp, #12
 8015380:	af00      	add	r7, sp, #0
	configASSERT( uxCriticalNesting );
 8015382:	4b12      	ldr	r3, [pc, #72]	@ (80153cc <vPortExitCritical+0x50>)
 8015384:	681b      	ldr	r3, [r3, #0]
 8015386:	2b00      	cmp	r3, #0
 8015388:	d10b      	bne.n	80153a2 <vPortExitCritical+0x26>
	__asm volatile
 801538a:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801538e:	f383 8811 	msr	BASEPRI, r3
 8015392:	f3bf 8f6f 	isb	sy
 8015396:	f3bf 8f4f 	dsb	sy
 801539a:	607b      	str	r3, [r7, #4]
}
 801539c:	bf00      	nop
 801539e:	bf00      	nop
 80153a0:	e7fd      	b.n	801539e <vPortExitCritical+0x22>
	uxCriticalNesting--;
 80153a2:	4b0a      	ldr	r3, [pc, #40]	@ (80153cc <vPortExitCritical+0x50>)
 80153a4:	681b      	ldr	r3, [r3, #0]
 80153a6:	3b01      	subs	r3, #1
 80153a8:	4a08      	ldr	r2, [pc, #32]	@ (80153cc <vPortExitCritical+0x50>)
 80153aa:	6013      	str	r3, [r2, #0]
	if( uxCriticalNesting == 0 )
 80153ac:	4b07      	ldr	r3, [pc, #28]	@ (80153cc <vPortExitCritical+0x50>)
 80153ae:	681b      	ldr	r3, [r3, #0]
 80153b0:	2b00      	cmp	r3, #0
 80153b2:	d105      	bne.n	80153c0 <vPortExitCritical+0x44>
 80153b4:	2300      	movs	r3, #0
 80153b6:	603b      	str	r3, [r7, #0]
	__asm volatile
 80153b8:	683b      	ldr	r3, [r7, #0]
 80153ba:	f383 8811 	msr	BASEPRI, r3
}
 80153be:	bf00      	nop
	{
		portENABLE_INTERRUPTS();
	}
}
 80153c0:	bf00      	nop
 80153c2:	370c      	adds	r7, #12
 80153c4:	46bd      	mov	sp, r7
 80153c6:	f85d 7b04 	ldr.w	r7, [sp], #4
 80153ca:	4770      	bx	lr
 80153cc:	24000048 	.word	0x24000048

080153d0 <PendSV_Handler>:

void xPortPendSVHandler( void )
{
	/* This is a naked function. */

	__asm volatile
 80153d0:	f3ef 8009 	mrs	r0, PSP
 80153d4:	f3bf 8f6f 	isb	sy
 80153d8:	4b15      	ldr	r3, [pc, #84]	@ (8015430 <pxCurrentTCBConst>)
 80153da:	681a      	ldr	r2, [r3, #0]
 80153dc:	f01e 0f10 	tst.w	lr, #16
 80153e0:	bf08      	it	eq
 80153e2:	ed20 8a10 	vstmdbeq	r0!, {s16-s31}
 80153e6:	e920 4ff0 	stmdb	r0!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 80153ea:	6010      	str	r0, [r2, #0]
 80153ec:	e92d 0009 	stmdb	sp!, {r0, r3}
 80153f0:	f04f 0050 	mov.w	r0, #80	@ 0x50
 80153f4:	f380 8811 	msr	BASEPRI, r0
 80153f8:	f3bf 8f4f 	dsb	sy
 80153fc:	f3bf 8f6f 	isb	sy
 8015400:	f7fe fb68 	bl	8013ad4 <vTaskSwitchContext>
 8015404:	f04f 0000 	mov.w	r0, #0
 8015408:	f380 8811 	msr	BASEPRI, r0
 801540c:	bc09      	pop	{r0, r3}
 801540e:	6819      	ldr	r1, [r3, #0]
 8015410:	6808      	ldr	r0, [r1, #0]
 8015412:	e8b0 4ff0 	ldmia.w	r0!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 8015416:	f01e 0f10 	tst.w	lr, #16
 801541a:	bf08      	it	eq
 801541c:	ecb0 8a10 	vldmiaeq	r0!, {s16-s31}
 8015420:	f380 8809 	msr	PSP, r0
 8015424:	f3bf 8f6f 	isb	sy
 8015428:	4770      	bx	lr
 801542a:	bf00      	nop
 801542c:	f3af 8000 	nop.w

08015430 <pxCurrentTCBConst>:
 8015430:	24003d60 	.word	0x24003d60
	"										\n"
	"	.align 4							\n"
	"pxCurrentTCBConst: .word pxCurrentTCB	\n"
	::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY)
	);
}
 8015434:	bf00      	nop
 8015436:	bf00      	nop

08015438 <xPortSysTickHandler>:
/*-----------------------------------------------------------*/

void xPortSysTickHandler( void )
{
 8015438:	b580      	push	{r7, lr}
 801543a:	b082      	sub	sp, #8
 801543c:	af00      	add	r7, sp, #0
	__asm volatile
 801543e:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8015442:	f383 8811 	msr	BASEPRI, r3
 8015446:	f3bf 8f6f 	isb	sy
 801544a:	f3bf 8f4f 	dsb	sy
 801544e:	607b      	str	r3, [r7, #4]
}
 8015450:	bf00      	nop
	save and then restore the interrupt mask value as its value is already
	known. */
	portDISABLE_INTERRUPTS();
	{
		/* Increment the RTOS tick. */
		if( xTaskIncrementTick() != pdFALSE )
 8015452:	f7fe fa85 	bl	8013960 <xTaskIncrementTick>
 8015456:	4603      	mov	r3, r0
 8015458:	2b00      	cmp	r3, #0
 801545a:	d003      	beq.n	8015464 <xPortSysTickHandler+0x2c>
		{
			/* A context switch is required.  Context switching is performed in
			the PendSV interrupt.  Pend the PendSV interrupt. */
			portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
 801545c:	4b06      	ldr	r3, [pc, #24]	@ (8015478 <xPortSysTickHandler+0x40>)
 801545e:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8015462:	601a      	str	r2, [r3, #0]
 8015464:	2300      	movs	r3, #0
 8015466:	603b      	str	r3, [r7, #0]
	__asm volatile
 8015468:	683b      	ldr	r3, [r7, #0]
 801546a:	f383 8811 	msr	BASEPRI, r3
}
 801546e:	bf00      	nop
		}
	}
	portENABLE_INTERRUPTS();
}
 8015470:	bf00      	nop
 8015472:	3708      	adds	r7, #8
 8015474:	46bd      	mov	sp, r7
 8015476:	bd80      	pop	{r7, pc}
 8015478:	e000ed04 	.word	0xe000ed04

0801547c <vPortSetupTimerInterrupt>:
/*
 * Setup the systick timer to generate the tick interrupts at the required
 * frequency.
 */
__attribute__(( weak )) void vPortSetupTimerInterrupt( void )
{
 801547c:	b480      	push	{r7}
 801547e:	af00      	add	r7, sp, #0
		ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
	}
	#endif /* configUSE_TICKLESS_IDLE */

	/* Stop and clear the SysTick. */
	portNVIC_SYSTICK_CTRL_REG = 0UL;
 8015480:	4b0b      	ldr	r3, [pc, #44]	@ (80154b0 <vPortSetupTimerInterrupt+0x34>)
 8015482:	2200      	movs	r2, #0
 8015484:	601a      	str	r2, [r3, #0]
	portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
 8015486:	4b0b      	ldr	r3, [pc, #44]	@ (80154b4 <vPortSetupTimerInterrupt+0x38>)
 8015488:	2200      	movs	r2, #0
 801548a:	601a      	str	r2, [r3, #0]

	/* Configure SysTick to interrupt at the requested rate. */
	portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
 801548c:	4b0a      	ldr	r3, [pc, #40]	@ (80154b8 <vPortSetupTimerInterrupt+0x3c>)
 801548e:	681b      	ldr	r3, [r3, #0]
 8015490:	4a0a      	ldr	r2, [pc, #40]	@ (80154bc <vPortSetupTimerInterrupt+0x40>)
 8015492:	fba2 2303 	umull	r2, r3, r2, r3
 8015496:	099b      	lsrs	r3, r3, #6
 8015498:	4a09      	ldr	r2, [pc, #36]	@ (80154c0 <vPortSetupTimerInterrupt+0x44>)
 801549a:	3b01      	subs	r3, #1
 801549c:	6013      	str	r3, [r2, #0]
	portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
 801549e:	4b04      	ldr	r3, [pc, #16]	@ (80154b0 <vPortSetupTimerInterrupt+0x34>)
 80154a0:	2207      	movs	r2, #7
 80154a2:	601a      	str	r2, [r3, #0]
}
 80154a4:	bf00      	nop
 80154a6:	46bd      	mov	sp, r7
 80154a8:	f85d 7b04 	ldr.w	r7, [sp], #4
 80154ac:	4770      	bx	lr
 80154ae:	bf00      	nop
 80154b0:	e000e010 	.word	0xe000e010
 80154b4:	e000e018 	.word	0xe000e018
 80154b8:	2400000c 	.word	0x2400000c
 80154bc:	10624dd3 	.word	0x10624dd3
 80154c0:	e000e014 	.word	0xe000e014

080154c4 <vPortEnableVFP>:
/*-----------------------------------------------------------*/

/* This is a naked function. */
static void vPortEnableVFP( void )
{
	__asm volatile
 80154c4:	f8df 000c 	ldr.w	r0, [pc, #12]	@ 80154d4 <vPortEnableVFP+0x10>
 80154c8:	6801      	ldr	r1, [r0, #0]
 80154ca:	f441 0170 	orr.w	r1, r1, #15728640	@ 0xf00000
 80154ce:	6001      	str	r1, [r0, #0]
 80154d0:	4770      	bx	lr
		"								\n"
		"	orr r1, r1, #( 0xf << 20 )	\n" /* Enable CP10 and CP11 coprocessors, then save back. */
		"	str r1, [r0]				\n"
		"	bx r14						"
	);
}
 80154d2:	bf00      	nop
 80154d4:	e000ed88 	.word	0xe000ed88

080154d8 <vPortValidateInterruptPriority>:
/*-----------------------------------------------------------*/

#if( configASSERT_DEFINED == 1 )

	void vPortValidateInterruptPriority( void )
	{
 80154d8:	b480      	push	{r7}
 80154da:	b085      	sub	sp, #20
 80154dc:	af00      	add	r7, sp, #0
	uint32_t ulCurrentInterrupt;
	uint8_t ucCurrentPriority;

		/* Obtain the number of the currently executing interrupt. */
		__asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" );
 80154de:	f3ef 8305 	mrs	r3, IPSR
 80154e2:	60fb      	str	r3, [r7, #12]

		/* Is the interrupt number a user defined interrupt? */
		if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )
 80154e4:	68fb      	ldr	r3, [r7, #12]
 80154e6:	2b0f      	cmp	r3, #15
 80154e8:	d915      	bls.n	8015516 <vPortValidateInterruptPriority+0x3e>
		{
			/* Look up the interrupt's priority. */
			ucCurrentPriority = pcInterruptPriorityRegisters[ ulCurrentInterrupt ];
 80154ea:	4a18      	ldr	r2, [pc, #96]	@ (801554c <vPortValidateInterruptPriority+0x74>)
 80154ec:	68fb      	ldr	r3, [r7, #12]
 80154ee:	4413      	add	r3, r2
 80154f0:	781b      	ldrb	r3, [r3, #0]
 80154f2:	72fb      	strb	r3, [r7, #11]
			interrupt entry is as fast and simple as possible.

			The following links provide detailed information:
			http://www.freertos.org/RTOS-Cortex-M3-M4.html
			http://www.freertos.org/FAQHelp.html */
			configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );
 80154f4:	4b16      	ldr	r3, [pc, #88]	@ (8015550 <vPortValidateInterruptPriority+0x78>)
 80154f6:	781b      	ldrb	r3, [r3, #0]
 80154f8:	7afa      	ldrb	r2, [r7, #11]
 80154fa:	429a      	cmp	r2, r3
 80154fc:	d20b      	bcs.n	8015516 <vPortValidateInterruptPriority+0x3e>
	__asm volatile
 80154fe:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8015502:	f383 8811 	msr	BASEPRI, r3
 8015506:	f3bf 8f6f 	isb	sy
 801550a:	f3bf 8f4f 	dsb	sy
 801550e:	607b      	str	r3, [r7, #4]
}
 8015510:	bf00      	nop
 8015512:	bf00      	nop
 8015514:	e7fd      	b.n	8015512 <vPortValidateInterruptPriority+0x3a>
		configuration then the correct setting can be achieved on all Cortex-M
		devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the
		scheduler.  Note however that some vendor specific peripheral libraries
		assume a non-zero priority group setting, in which cases using a value
		of zero will result in unpredictable behaviour. */
		configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );
 8015516:	4b0f      	ldr	r3, [pc, #60]	@ (8015554 <vPortValidateInterruptPriority+0x7c>)
 8015518:	681b      	ldr	r3, [r3, #0]
 801551a:	f403 62e0 	and.w	r2, r3, #1792	@ 0x700
 801551e:	4b0e      	ldr	r3, [pc, #56]	@ (8015558 <vPortValidateInterruptPriority+0x80>)
 8015520:	681b      	ldr	r3, [r3, #0]
 8015522:	429a      	cmp	r2, r3
 8015524:	d90b      	bls.n	801553e <vPortValidateInterruptPriority+0x66>
	__asm volatile
 8015526:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801552a:	f383 8811 	msr	BASEPRI, r3
 801552e:	f3bf 8f6f 	isb	sy
 8015532:	f3bf 8f4f 	dsb	sy
 8015536:	603b      	str	r3, [r7, #0]
}
 8015538:	bf00      	nop
 801553a:	bf00      	nop
 801553c:	e7fd      	b.n	801553a <vPortValidateInterruptPriority+0x62>
	}
 801553e:	bf00      	nop
 8015540:	3714      	adds	r7, #20
 8015542:	46bd      	mov	sp, r7
 8015544:	f85d 7b04 	ldr.w	r7, [sp], #4
 8015548:	4770      	bx	lr
 801554a:	bf00      	nop
 801554c:	e000e3f0 	.word	0xe000e3f0
 8015550:	2400438c 	.word	0x2400438c
 8015554:	e000ed0c 	.word	0xe000ed0c
 8015558:	24004390 	.word	0x24004390

0801555c <pvPortMalloc>:
static size_t xBlockAllocatedBit = 0;

/*-----------------------------------------------------------*/

void *pvPortMalloc( size_t xWantedSize )
{
 801555c:	b580      	push	{r7, lr}
 801555e:	b08a      	sub	sp, #40	@ 0x28
 8015560:	af00      	add	r7, sp, #0
 8015562:	6078      	str	r0, [r7, #4]
BlockLink_t *pxBlock, *pxPreviousBlock, *pxNewBlockLink;
void *pvReturn = NULL;
 8015564:	2300      	movs	r3, #0
 8015566:	61fb      	str	r3, [r7, #28]

	vTaskSuspendAll();
 8015568:	f7fe f92c 	bl	80137c4 <vTaskSuspendAll>
	{
		/* If this is the first call to malloc then the heap will require
		initialisation to setup the list of free blocks. */
		if( pxEnd == NULL )
 801556c:	4b5c      	ldr	r3, [pc, #368]	@ (80156e0 <pvPortMalloc+0x184>)
 801556e:	681b      	ldr	r3, [r3, #0]
 8015570:	2b00      	cmp	r3, #0
 8015572:	d101      	bne.n	8015578 <pvPortMalloc+0x1c>
		{
			prvHeapInit();
 8015574:	f000 f924 	bl	80157c0 <prvHeapInit>

		/* Check the requested block size is not so large that the top bit is
		set.  The top bit of the block size member of the BlockLink_t structure
		is used to determine who owns the block - the application or the
		kernel, so it must be free. */
		if( ( xWantedSize & xBlockAllocatedBit ) == 0 )
 8015578:	4b5a      	ldr	r3, [pc, #360]	@ (80156e4 <pvPortMalloc+0x188>)
 801557a:	681a      	ldr	r2, [r3, #0]
 801557c:	687b      	ldr	r3, [r7, #4]
 801557e:	4013      	ands	r3, r2
 8015580:	2b00      	cmp	r3, #0
 8015582:	f040 8095 	bne.w	80156b0 <pvPortMalloc+0x154>
		{
			/* The wanted size is increased so it can contain a BlockLink_t
			structure in addition to the requested amount of bytes. */
			if( xWantedSize > 0 )
 8015586:	687b      	ldr	r3, [r7, #4]
 8015588:	2b00      	cmp	r3, #0
 801558a:	d01e      	beq.n	80155ca <pvPortMalloc+0x6e>
			{
				xWantedSize += xHeapStructSize;
 801558c:	2208      	movs	r2, #8
 801558e:	687b      	ldr	r3, [r7, #4]
 8015590:	4413      	add	r3, r2
 8015592:	607b      	str	r3, [r7, #4]

				/* Ensure that blocks are always aligned to the required number
				of bytes. */
				if( ( xWantedSize & portBYTE_ALIGNMENT_MASK ) != 0x00 )
 8015594:	687b      	ldr	r3, [r7, #4]
 8015596:	f003 0307 	and.w	r3, r3, #7
 801559a:	2b00      	cmp	r3, #0
 801559c:	d015      	beq.n	80155ca <pvPortMalloc+0x6e>
				{
					/* Byte alignment required. */
					xWantedSize += ( portBYTE_ALIGNMENT - ( xWantedSize & portBYTE_ALIGNMENT_MASK ) );
 801559e:	687b      	ldr	r3, [r7, #4]
 80155a0:	f023 0307 	bic.w	r3, r3, #7
 80155a4:	3308      	adds	r3, #8
 80155a6:	607b      	str	r3, [r7, #4]
					configASSERT( ( xWantedSize & portBYTE_ALIGNMENT_MASK ) == 0 );
 80155a8:	687b      	ldr	r3, [r7, #4]
 80155aa:	f003 0307 	and.w	r3, r3, #7
 80155ae:	2b00      	cmp	r3, #0
 80155b0:	d00b      	beq.n	80155ca <pvPortMalloc+0x6e>
	__asm volatile
 80155b2:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80155b6:	f383 8811 	msr	BASEPRI, r3
 80155ba:	f3bf 8f6f 	isb	sy
 80155be:	f3bf 8f4f 	dsb	sy
 80155c2:	617b      	str	r3, [r7, #20]
}
 80155c4:	bf00      	nop
 80155c6:	bf00      	nop
 80155c8:	e7fd      	b.n	80155c6 <pvPortMalloc+0x6a>
			else
			{
				mtCOVERAGE_TEST_MARKER();
			}

			if( ( xWantedSize > 0 ) && ( xWantedSize <= xFreeBytesRemaining ) )
 80155ca:	687b      	ldr	r3, [r7, #4]
 80155cc:	2b00      	cmp	r3, #0
 80155ce:	d06f      	beq.n	80156b0 <pvPortMalloc+0x154>
 80155d0:	4b45      	ldr	r3, [pc, #276]	@ (80156e8 <pvPortMalloc+0x18c>)
 80155d2:	681b      	ldr	r3, [r3, #0]
 80155d4:	687a      	ldr	r2, [r7, #4]
 80155d6:	429a      	cmp	r2, r3
 80155d8:	d86a      	bhi.n	80156b0 <pvPortMalloc+0x154>
			{
				/* Traverse the list from the start	(lowest address) block until
				one	of adequate size is found. */
				pxPreviousBlock = &xStart;
 80155da:	4b44      	ldr	r3, [pc, #272]	@ (80156ec <pvPortMalloc+0x190>)
 80155dc:	623b      	str	r3, [r7, #32]
				pxBlock = xStart.pxNextFreeBlock;
 80155de:	4b43      	ldr	r3, [pc, #268]	@ (80156ec <pvPortMalloc+0x190>)
 80155e0:	681b      	ldr	r3, [r3, #0]
 80155e2:	627b      	str	r3, [r7, #36]	@ 0x24
				while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) )
 80155e4:	e004      	b.n	80155f0 <pvPortMalloc+0x94>
				{
					pxPreviousBlock = pxBlock;
 80155e6:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80155e8:	623b      	str	r3, [r7, #32]
					pxBlock = pxBlock->pxNextFreeBlock;
 80155ea:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80155ec:	681b      	ldr	r3, [r3, #0]
 80155ee:	627b      	str	r3, [r7, #36]	@ 0x24
				while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) )
 80155f0:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80155f2:	685b      	ldr	r3, [r3, #4]
 80155f4:	687a      	ldr	r2, [r7, #4]
 80155f6:	429a      	cmp	r2, r3
 80155f8:	d903      	bls.n	8015602 <pvPortMalloc+0xa6>
 80155fa:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80155fc:	681b      	ldr	r3, [r3, #0]
 80155fe:	2b00      	cmp	r3, #0
 8015600:	d1f1      	bne.n	80155e6 <pvPortMalloc+0x8a>
				}

				/* If the end marker was reached then a block of adequate size
				was	not found. */
				if( pxBlock != pxEnd )
 8015602:	4b37      	ldr	r3, [pc, #220]	@ (80156e0 <pvPortMalloc+0x184>)
 8015604:	681b      	ldr	r3, [r3, #0]
 8015606:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8015608:	429a      	cmp	r2, r3
 801560a:	d051      	beq.n	80156b0 <pvPortMalloc+0x154>
				{
					/* Return the memory space pointed to - jumping over the
					BlockLink_t structure at its start. */
					pvReturn = ( void * ) ( ( ( uint8_t * ) pxPreviousBlock->pxNextFreeBlock ) + xHeapStructSize );
 801560c:	6a3b      	ldr	r3, [r7, #32]
 801560e:	681b      	ldr	r3, [r3, #0]
 8015610:	2208      	movs	r2, #8
 8015612:	4413      	add	r3, r2
 8015614:	61fb      	str	r3, [r7, #28]

					/* This block is being returned for use so must be taken out
					of the list of free blocks. */
					pxPreviousBlock->pxNextFreeBlock = pxBlock->pxNextFreeBlock;
 8015616:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8015618:	681a      	ldr	r2, [r3, #0]
 801561a:	6a3b      	ldr	r3, [r7, #32]
 801561c:	601a      	str	r2, [r3, #0]

					/* If the block is larger than required it can be split into
					two. */
					if( ( pxBlock->xBlockSize - xWantedSize ) > heapMINIMUM_BLOCK_SIZE )
 801561e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8015620:	685a      	ldr	r2, [r3, #4]
 8015622:	687b      	ldr	r3, [r7, #4]
 8015624:	1ad2      	subs	r2, r2, r3
 8015626:	2308      	movs	r3, #8
 8015628:	005b      	lsls	r3, r3, #1
 801562a:	429a      	cmp	r2, r3
 801562c:	d920      	bls.n	8015670 <pvPortMalloc+0x114>
					{
						/* This block is to be split into two.  Create a new
						block following the number of bytes requested. The void
						cast is used to prevent byte alignment warnings from the
						compiler. */
						pxNewBlockLink = ( void * ) ( ( ( uint8_t * ) pxBlock ) + xWantedSize );
 801562e:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8015630:	687b      	ldr	r3, [r7, #4]
 8015632:	4413      	add	r3, r2
 8015634:	61bb      	str	r3, [r7, #24]
						configASSERT( ( ( ( size_t ) pxNewBlockLink ) & portBYTE_ALIGNMENT_MASK ) == 0 );
 8015636:	69bb      	ldr	r3, [r7, #24]
 8015638:	f003 0307 	and.w	r3, r3, #7
 801563c:	2b00      	cmp	r3, #0
 801563e:	d00b      	beq.n	8015658 <pvPortMalloc+0xfc>
	__asm volatile
 8015640:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8015644:	f383 8811 	msr	BASEPRI, r3
 8015648:	f3bf 8f6f 	isb	sy
 801564c:	f3bf 8f4f 	dsb	sy
 8015650:	613b      	str	r3, [r7, #16]
}
 8015652:	bf00      	nop
 8015654:	bf00      	nop
 8015656:	e7fd      	b.n	8015654 <pvPortMalloc+0xf8>

						/* Calculate the sizes of two blocks split from the
						single block. */
						pxNewBlockLink->xBlockSize = pxBlock->xBlockSize - xWantedSize;
 8015658:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801565a:	685a      	ldr	r2, [r3, #4]
 801565c:	687b      	ldr	r3, [r7, #4]
 801565e:	1ad2      	subs	r2, r2, r3
 8015660:	69bb      	ldr	r3, [r7, #24]
 8015662:	605a      	str	r2, [r3, #4]
						pxBlock->xBlockSize = xWantedSize;
 8015664:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8015666:	687a      	ldr	r2, [r7, #4]
 8015668:	605a      	str	r2, [r3, #4]

						/* Insert the new block into the list of free blocks. */
						prvInsertBlockIntoFreeList( pxNewBlockLink );
 801566a:	69b8      	ldr	r0, [r7, #24]
 801566c:	f000 f90a 	bl	8015884 <prvInsertBlockIntoFreeList>
					else
					{
						mtCOVERAGE_TEST_MARKER();
					}

					xFreeBytesRemaining -= pxBlock->xBlockSize;
 8015670:	4b1d      	ldr	r3, [pc, #116]	@ (80156e8 <pvPortMalloc+0x18c>)
 8015672:	681a      	ldr	r2, [r3, #0]
 8015674:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8015676:	685b      	ldr	r3, [r3, #4]
 8015678:	1ad3      	subs	r3, r2, r3
 801567a:	4a1b      	ldr	r2, [pc, #108]	@ (80156e8 <pvPortMalloc+0x18c>)
 801567c:	6013      	str	r3, [r2, #0]

					if( xFreeBytesRemaining < xMinimumEverFreeBytesRemaining )
 801567e:	4b1a      	ldr	r3, [pc, #104]	@ (80156e8 <pvPortMalloc+0x18c>)
 8015680:	681a      	ldr	r2, [r3, #0]
 8015682:	4b1b      	ldr	r3, [pc, #108]	@ (80156f0 <pvPortMalloc+0x194>)
 8015684:	681b      	ldr	r3, [r3, #0]
 8015686:	429a      	cmp	r2, r3
 8015688:	d203      	bcs.n	8015692 <pvPortMalloc+0x136>
					{
						xMinimumEverFreeBytesRemaining = xFreeBytesRemaining;
 801568a:	4b17      	ldr	r3, [pc, #92]	@ (80156e8 <pvPortMalloc+0x18c>)
 801568c:	681b      	ldr	r3, [r3, #0]
 801568e:	4a18      	ldr	r2, [pc, #96]	@ (80156f0 <pvPortMalloc+0x194>)
 8015690:	6013      	str	r3, [r2, #0]
						mtCOVERAGE_TEST_MARKER();
					}

					/* The block is being returned - it is allocated and owned
					by the application and has no "next" block. */
					pxBlock->xBlockSize |= xBlockAllocatedBit;
 8015692:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8015694:	685a      	ldr	r2, [r3, #4]
 8015696:	4b13      	ldr	r3, [pc, #76]	@ (80156e4 <pvPortMalloc+0x188>)
 8015698:	681b      	ldr	r3, [r3, #0]
 801569a:	431a      	orrs	r2, r3
 801569c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801569e:	605a      	str	r2, [r3, #4]
					pxBlock->pxNextFreeBlock = NULL;
 80156a0:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80156a2:	2200      	movs	r2, #0
 80156a4:	601a      	str	r2, [r3, #0]
					xNumberOfSuccessfulAllocations++;
 80156a6:	4b13      	ldr	r3, [pc, #76]	@ (80156f4 <pvPortMalloc+0x198>)
 80156a8:	681b      	ldr	r3, [r3, #0]
 80156aa:	3301      	adds	r3, #1
 80156ac:	4a11      	ldr	r2, [pc, #68]	@ (80156f4 <pvPortMalloc+0x198>)
 80156ae:	6013      	str	r3, [r2, #0]
			mtCOVERAGE_TEST_MARKER();
		}

		traceMALLOC( pvReturn, xWantedSize );
	}
	( void ) xTaskResumeAll();
 80156b0:	f7fe f896 	bl	80137e0 <xTaskResumeAll>
			mtCOVERAGE_TEST_MARKER();
		}
	}
	#endif

	configASSERT( ( ( ( size_t ) pvReturn ) & ( size_t ) portBYTE_ALIGNMENT_MASK ) == 0 );
 80156b4:	69fb      	ldr	r3, [r7, #28]
 80156b6:	f003 0307 	and.w	r3, r3, #7
 80156ba:	2b00      	cmp	r3, #0
 80156bc:	d00b      	beq.n	80156d6 <pvPortMalloc+0x17a>
	__asm volatile
 80156be:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80156c2:	f383 8811 	msr	BASEPRI, r3
 80156c6:	f3bf 8f6f 	isb	sy
 80156ca:	f3bf 8f4f 	dsb	sy
 80156ce:	60fb      	str	r3, [r7, #12]
}
 80156d0:	bf00      	nop
 80156d2:	bf00      	nop
 80156d4:	e7fd      	b.n	80156d2 <pvPortMalloc+0x176>
	return pvReturn;
 80156d6:	69fb      	ldr	r3, [r7, #28]
}
 80156d8:	4618      	mov	r0, r3
 80156da:	3728      	adds	r7, #40	@ 0x28
 80156dc:	46bd      	mov	sp, r7
 80156de:	bd80      	pop	{r7, pc}
 80156e0:	2402439c 	.word	0x2402439c
 80156e4:	240243b0 	.word	0x240243b0
 80156e8:	240243a0 	.word	0x240243a0
 80156ec:	24024394 	.word	0x24024394
 80156f0:	240243a4 	.word	0x240243a4
 80156f4:	240243a8 	.word	0x240243a8

080156f8 <vPortFree>:
/*-----------------------------------------------------------*/

void vPortFree( void *pv )
{
 80156f8:	b580      	push	{r7, lr}
 80156fa:	b086      	sub	sp, #24
 80156fc:	af00      	add	r7, sp, #0
 80156fe:	6078      	str	r0, [r7, #4]
uint8_t *puc = ( uint8_t * ) pv;
 8015700:	687b      	ldr	r3, [r7, #4]
 8015702:	617b      	str	r3, [r7, #20]
BlockLink_t *pxLink;

	if( pv != NULL )
 8015704:	687b      	ldr	r3, [r7, #4]
 8015706:	2b00      	cmp	r3, #0
 8015708:	d04f      	beq.n	80157aa <vPortFree+0xb2>
	{
		/* The memory being freed will have an BlockLink_t structure immediately
		before it. */
		puc -= xHeapStructSize;
 801570a:	2308      	movs	r3, #8
 801570c:	425b      	negs	r3, r3
 801570e:	697a      	ldr	r2, [r7, #20]
 8015710:	4413      	add	r3, r2
 8015712:	617b      	str	r3, [r7, #20]

		/* This casting is to keep the compiler from issuing warnings. */
		pxLink = ( void * ) puc;
 8015714:	697b      	ldr	r3, [r7, #20]
 8015716:	613b      	str	r3, [r7, #16]

		/* Check the block is actually allocated. */
		configASSERT( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 );
 8015718:	693b      	ldr	r3, [r7, #16]
 801571a:	685a      	ldr	r2, [r3, #4]
 801571c:	4b25      	ldr	r3, [pc, #148]	@ (80157b4 <vPortFree+0xbc>)
 801571e:	681b      	ldr	r3, [r3, #0]
 8015720:	4013      	ands	r3, r2
 8015722:	2b00      	cmp	r3, #0
 8015724:	d10b      	bne.n	801573e <vPortFree+0x46>
	__asm volatile
 8015726:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801572a:	f383 8811 	msr	BASEPRI, r3
 801572e:	f3bf 8f6f 	isb	sy
 8015732:	f3bf 8f4f 	dsb	sy
 8015736:	60fb      	str	r3, [r7, #12]
}
 8015738:	bf00      	nop
 801573a:	bf00      	nop
 801573c:	e7fd      	b.n	801573a <vPortFree+0x42>
		configASSERT( pxLink->pxNextFreeBlock == NULL );
 801573e:	693b      	ldr	r3, [r7, #16]
 8015740:	681b      	ldr	r3, [r3, #0]
 8015742:	2b00      	cmp	r3, #0
 8015744:	d00b      	beq.n	801575e <vPortFree+0x66>
	__asm volatile
 8015746:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801574a:	f383 8811 	msr	BASEPRI, r3
 801574e:	f3bf 8f6f 	isb	sy
 8015752:	f3bf 8f4f 	dsb	sy
 8015756:	60bb      	str	r3, [r7, #8]
}
 8015758:	bf00      	nop
 801575a:	bf00      	nop
 801575c:	e7fd      	b.n	801575a <vPortFree+0x62>

		if( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 )
 801575e:	693b      	ldr	r3, [r7, #16]
 8015760:	685a      	ldr	r2, [r3, #4]
 8015762:	4b14      	ldr	r3, [pc, #80]	@ (80157b4 <vPortFree+0xbc>)
 8015764:	681b      	ldr	r3, [r3, #0]
 8015766:	4013      	ands	r3, r2
 8015768:	2b00      	cmp	r3, #0
 801576a:	d01e      	beq.n	80157aa <vPortFree+0xb2>
		{
			if( pxLink->pxNextFreeBlock == NULL )
 801576c:	693b      	ldr	r3, [r7, #16]
 801576e:	681b      	ldr	r3, [r3, #0]
 8015770:	2b00      	cmp	r3, #0
 8015772:	d11a      	bne.n	80157aa <vPortFree+0xb2>
			{
				/* The block is being returned to the heap - it is no longer
				allocated. */
				pxLink->xBlockSize &= ~xBlockAllocatedBit;
 8015774:	693b      	ldr	r3, [r7, #16]
 8015776:	685a      	ldr	r2, [r3, #4]
 8015778:	4b0e      	ldr	r3, [pc, #56]	@ (80157b4 <vPortFree+0xbc>)
 801577a:	681b      	ldr	r3, [r3, #0]
 801577c:	43db      	mvns	r3, r3
 801577e:	401a      	ands	r2, r3
 8015780:	693b      	ldr	r3, [r7, #16]
 8015782:	605a      	str	r2, [r3, #4]

				vTaskSuspendAll();
 8015784:	f7fe f81e 	bl	80137c4 <vTaskSuspendAll>
				{
					/* Add this block to the list of free blocks. */
					xFreeBytesRemaining += pxLink->xBlockSize;
 8015788:	693b      	ldr	r3, [r7, #16]
 801578a:	685a      	ldr	r2, [r3, #4]
 801578c:	4b0a      	ldr	r3, [pc, #40]	@ (80157b8 <vPortFree+0xc0>)
 801578e:	681b      	ldr	r3, [r3, #0]
 8015790:	4413      	add	r3, r2
 8015792:	4a09      	ldr	r2, [pc, #36]	@ (80157b8 <vPortFree+0xc0>)
 8015794:	6013      	str	r3, [r2, #0]
					traceFREE( pv, pxLink->xBlockSize );
					prvInsertBlockIntoFreeList( ( ( BlockLink_t * ) pxLink ) );
 8015796:	6938      	ldr	r0, [r7, #16]
 8015798:	f000 f874 	bl	8015884 <prvInsertBlockIntoFreeList>
					xNumberOfSuccessfulFrees++;
 801579c:	4b07      	ldr	r3, [pc, #28]	@ (80157bc <vPortFree+0xc4>)
 801579e:	681b      	ldr	r3, [r3, #0]
 80157a0:	3301      	adds	r3, #1
 80157a2:	4a06      	ldr	r2, [pc, #24]	@ (80157bc <vPortFree+0xc4>)
 80157a4:	6013      	str	r3, [r2, #0]
				}
				( void ) xTaskResumeAll();
 80157a6:	f7fe f81b 	bl	80137e0 <xTaskResumeAll>
		else
		{
			mtCOVERAGE_TEST_MARKER();
		}
	}
}
 80157aa:	bf00      	nop
 80157ac:	3718      	adds	r7, #24
 80157ae:	46bd      	mov	sp, r7
 80157b0:	bd80      	pop	{r7, pc}
 80157b2:	bf00      	nop
 80157b4:	240243b0 	.word	0x240243b0
 80157b8:	240243a0 	.word	0x240243a0
 80157bc:	240243ac 	.word	0x240243ac

080157c0 <prvHeapInit>:
	/* This just exists to keep the linker quiet. */
}
/*-----------------------------------------------------------*/

static void prvHeapInit( void )
{
 80157c0:	b480      	push	{r7}
 80157c2:	b085      	sub	sp, #20
 80157c4:	af00      	add	r7, sp, #0
BlockLink_t *pxFirstFreeBlock;
uint8_t *pucAlignedHeap;
size_t uxAddress;
size_t xTotalHeapSize = configTOTAL_HEAP_SIZE;
 80157c6:	f44f 3300 	mov.w	r3, #131072	@ 0x20000
 80157ca:	60bb      	str	r3, [r7, #8]

	/* Ensure the heap starts on a correctly aligned boundary. */
	uxAddress = ( size_t ) ucHeap;
 80157cc:	4b27      	ldr	r3, [pc, #156]	@ (801586c <prvHeapInit+0xac>)
 80157ce:	60fb      	str	r3, [r7, #12]

	if( ( uxAddress & portBYTE_ALIGNMENT_MASK ) != 0 )
 80157d0:	68fb      	ldr	r3, [r7, #12]
 80157d2:	f003 0307 	and.w	r3, r3, #7
 80157d6:	2b00      	cmp	r3, #0
 80157d8:	d00c      	beq.n	80157f4 <prvHeapInit+0x34>
	{
		uxAddress += ( portBYTE_ALIGNMENT - 1 );
 80157da:	68fb      	ldr	r3, [r7, #12]
 80157dc:	3307      	adds	r3, #7
 80157de:	60fb      	str	r3, [r7, #12]
		uxAddress &= ~( ( size_t ) portBYTE_ALIGNMENT_MASK );
 80157e0:	68fb      	ldr	r3, [r7, #12]
 80157e2:	f023 0307 	bic.w	r3, r3, #7
 80157e6:	60fb      	str	r3, [r7, #12]
		xTotalHeapSize -= uxAddress - ( size_t ) ucHeap;
 80157e8:	68ba      	ldr	r2, [r7, #8]
 80157ea:	68fb      	ldr	r3, [r7, #12]
 80157ec:	1ad3      	subs	r3, r2, r3
 80157ee:	4a1f      	ldr	r2, [pc, #124]	@ (801586c <prvHeapInit+0xac>)
 80157f0:	4413      	add	r3, r2
 80157f2:	60bb      	str	r3, [r7, #8]
	}

	pucAlignedHeap = ( uint8_t * ) uxAddress;
 80157f4:	68fb      	ldr	r3, [r7, #12]
 80157f6:	607b      	str	r3, [r7, #4]

	/* xStart is used to hold a pointer to the first item in the list of free
	blocks.  The void cast is used to prevent compiler warnings. */
	xStart.pxNextFreeBlock = ( void * ) pucAlignedHeap;
 80157f8:	4a1d      	ldr	r2, [pc, #116]	@ (8015870 <prvHeapInit+0xb0>)
 80157fa:	687b      	ldr	r3, [r7, #4]
 80157fc:	6013      	str	r3, [r2, #0]
	xStart.xBlockSize = ( size_t ) 0;
 80157fe:	4b1c      	ldr	r3, [pc, #112]	@ (8015870 <prvHeapInit+0xb0>)
 8015800:	2200      	movs	r2, #0
 8015802:	605a      	str	r2, [r3, #4]

	/* pxEnd is used to mark the end of the list of free blocks and is inserted
	at the end of the heap space. */
	uxAddress = ( ( size_t ) pucAlignedHeap ) + xTotalHeapSize;
 8015804:	687b      	ldr	r3, [r7, #4]
 8015806:	68ba      	ldr	r2, [r7, #8]
 8015808:	4413      	add	r3, r2
 801580a:	60fb      	str	r3, [r7, #12]
	uxAddress -= xHeapStructSize;
 801580c:	2208      	movs	r2, #8
 801580e:	68fb      	ldr	r3, [r7, #12]
 8015810:	1a9b      	subs	r3, r3, r2
 8015812:	60fb      	str	r3, [r7, #12]
	uxAddress &= ~( ( size_t ) portBYTE_ALIGNMENT_MASK );
 8015814:	68fb      	ldr	r3, [r7, #12]
 8015816:	f023 0307 	bic.w	r3, r3, #7
 801581a:	60fb      	str	r3, [r7, #12]
	pxEnd = ( void * ) uxAddress;
 801581c:	68fb      	ldr	r3, [r7, #12]
 801581e:	4a15      	ldr	r2, [pc, #84]	@ (8015874 <prvHeapInit+0xb4>)
 8015820:	6013      	str	r3, [r2, #0]
	pxEnd->xBlockSize = 0;
 8015822:	4b14      	ldr	r3, [pc, #80]	@ (8015874 <prvHeapInit+0xb4>)
 8015824:	681b      	ldr	r3, [r3, #0]
 8015826:	2200      	movs	r2, #0
 8015828:	605a      	str	r2, [r3, #4]
	pxEnd->pxNextFreeBlock = NULL;
 801582a:	4b12      	ldr	r3, [pc, #72]	@ (8015874 <prvHeapInit+0xb4>)
 801582c:	681b      	ldr	r3, [r3, #0]
 801582e:	2200      	movs	r2, #0
 8015830:	601a      	str	r2, [r3, #0]

	/* To start with there is a single free block that is sized to take up the
	entire heap space, minus the space taken by pxEnd. */
	pxFirstFreeBlock = ( void * ) pucAlignedHeap;
 8015832:	687b      	ldr	r3, [r7, #4]
 8015834:	603b      	str	r3, [r7, #0]
	pxFirstFreeBlock->xBlockSize = uxAddress - ( size_t ) pxFirstFreeBlock;
 8015836:	683b      	ldr	r3, [r7, #0]
 8015838:	68fa      	ldr	r2, [r7, #12]
 801583a:	1ad2      	subs	r2, r2, r3
 801583c:	683b      	ldr	r3, [r7, #0]
 801583e:	605a      	str	r2, [r3, #4]
	pxFirstFreeBlock->pxNextFreeBlock = pxEnd;
 8015840:	4b0c      	ldr	r3, [pc, #48]	@ (8015874 <prvHeapInit+0xb4>)
 8015842:	681a      	ldr	r2, [r3, #0]
 8015844:	683b      	ldr	r3, [r7, #0]
 8015846:	601a      	str	r2, [r3, #0]

	/* Only one block exists - and it covers the entire usable heap space. */
	xMinimumEverFreeBytesRemaining = pxFirstFreeBlock->xBlockSize;
 8015848:	683b      	ldr	r3, [r7, #0]
 801584a:	685b      	ldr	r3, [r3, #4]
 801584c:	4a0a      	ldr	r2, [pc, #40]	@ (8015878 <prvHeapInit+0xb8>)
 801584e:	6013      	str	r3, [r2, #0]
	xFreeBytesRemaining = pxFirstFreeBlock->xBlockSize;
 8015850:	683b      	ldr	r3, [r7, #0]
 8015852:	685b      	ldr	r3, [r3, #4]
 8015854:	4a09      	ldr	r2, [pc, #36]	@ (801587c <prvHeapInit+0xbc>)
 8015856:	6013      	str	r3, [r2, #0]

	/* Work out the position of the top bit in a size_t variable. */
	xBlockAllocatedBit = ( ( size_t ) 1 ) << ( ( sizeof( size_t ) * heapBITS_PER_BYTE ) - 1 );
 8015858:	4b09      	ldr	r3, [pc, #36]	@ (8015880 <prvHeapInit+0xc0>)
 801585a:	f04f 4200 	mov.w	r2, #2147483648	@ 0x80000000
 801585e:	601a      	str	r2, [r3, #0]
}
 8015860:	bf00      	nop
 8015862:	3714      	adds	r7, #20
 8015864:	46bd      	mov	sp, r7
 8015866:	f85d 7b04 	ldr.w	r7, [sp], #4
 801586a:	4770      	bx	lr
 801586c:	24004394 	.word	0x24004394
 8015870:	24024394 	.word	0x24024394
 8015874:	2402439c 	.word	0x2402439c
 8015878:	240243a4 	.word	0x240243a4
 801587c:	240243a0 	.word	0x240243a0
 8015880:	240243b0 	.word	0x240243b0

08015884 <prvInsertBlockIntoFreeList>:
/*-----------------------------------------------------------*/

static void prvInsertBlockIntoFreeList( BlockLink_t *pxBlockToInsert )
{
 8015884:	b480      	push	{r7}
 8015886:	b085      	sub	sp, #20
 8015888:	af00      	add	r7, sp, #0
 801588a:	6078      	str	r0, [r7, #4]
BlockLink_t *pxIterator;
uint8_t *puc;

	/* Iterate through the list until a block is found that has a higher address
	than the block being inserted. */
	for( pxIterator = &xStart; pxIterator->pxNextFreeBlock < pxBlockToInsert; pxIterator = pxIterator->pxNextFreeBlock )
 801588c:	4b28      	ldr	r3, [pc, #160]	@ (8015930 <prvInsertBlockIntoFreeList+0xac>)
 801588e:	60fb      	str	r3, [r7, #12]
 8015890:	e002      	b.n	8015898 <prvInsertBlockIntoFreeList+0x14>
 8015892:	68fb      	ldr	r3, [r7, #12]
 8015894:	681b      	ldr	r3, [r3, #0]
 8015896:	60fb      	str	r3, [r7, #12]
 8015898:	68fb      	ldr	r3, [r7, #12]
 801589a:	681b      	ldr	r3, [r3, #0]
 801589c:	687a      	ldr	r2, [r7, #4]
 801589e:	429a      	cmp	r2, r3
 80158a0:	d8f7      	bhi.n	8015892 <prvInsertBlockIntoFreeList+0xe>
		/* Nothing to do here, just iterate to the right position. */
	}

	/* Do the block being inserted, and the block it is being inserted after
	make a contiguous block of memory? */
	puc = ( uint8_t * ) pxIterator;
 80158a2:	68fb      	ldr	r3, [r7, #12]
 80158a4:	60bb      	str	r3, [r7, #8]
	if( ( puc + pxIterator->xBlockSize ) == ( uint8_t * ) pxBlockToInsert )
 80158a6:	68fb      	ldr	r3, [r7, #12]
 80158a8:	685b      	ldr	r3, [r3, #4]
 80158aa:	68ba      	ldr	r2, [r7, #8]
 80158ac:	4413      	add	r3, r2
 80158ae:	687a      	ldr	r2, [r7, #4]
 80158b0:	429a      	cmp	r2, r3
 80158b2:	d108      	bne.n	80158c6 <prvInsertBlockIntoFreeList+0x42>
	{
		pxIterator->xBlockSize += pxBlockToInsert->xBlockSize;
 80158b4:	68fb      	ldr	r3, [r7, #12]
 80158b6:	685a      	ldr	r2, [r3, #4]
 80158b8:	687b      	ldr	r3, [r7, #4]
 80158ba:	685b      	ldr	r3, [r3, #4]
 80158bc:	441a      	add	r2, r3
 80158be:	68fb      	ldr	r3, [r7, #12]
 80158c0:	605a      	str	r2, [r3, #4]
		pxBlockToInsert = pxIterator;
 80158c2:	68fb      	ldr	r3, [r7, #12]
 80158c4:	607b      	str	r3, [r7, #4]
		mtCOVERAGE_TEST_MARKER();
	}

	/* Do the block being inserted, and the block it is being inserted before
	make a contiguous block of memory? */
	puc = ( uint8_t * ) pxBlockToInsert;
 80158c6:	687b      	ldr	r3, [r7, #4]
 80158c8:	60bb      	str	r3, [r7, #8]
	if( ( puc + pxBlockToInsert->xBlockSize ) == ( uint8_t * ) pxIterator->pxNextFreeBlock )
 80158ca:	687b      	ldr	r3, [r7, #4]
 80158cc:	685b      	ldr	r3, [r3, #4]
 80158ce:	68ba      	ldr	r2, [r7, #8]
 80158d0:	441a      	add	r2, r3
 80158d2:	68fb      	ldr	r3, [r7, #12]
 80158d4:	681b      	ldr	r3, [r3, #0]
 80158d6:	429a      	cmp	r2, r3
 80158d8:	d118      	bne.n	801590c <prvInsertBlockIntoFreeList+0x88>
	{
		if( pxIterator->pxNextFreeBlock != pxEnd )
 80158da:	68fb      	ldr	r3, [r7, #12]
 80158dc:	681a      	ldr	r2, [r3, #0]
 80158de:	4b15      	ldr	r3, [pc, #84]	@ (8015934 <prvInsertBlockIntoFreeList+0xb0>)
 80158e0:	681b      	ldr	r3, [r3, #0]
 80158e2:	429a      	cmp	r2, r3
 80158e4:	d00d      	beq.n	8015902 <prvInsertBlockIntoFreeList+0x7e>
		{
			/* Form one big block from the two blocks. */
			pxBlockToInsert->xBlockSize += pxIterator->pxNextFreeBlock->xBlockSize;
 80158e6:	687b      	ldr	r3, [r7, #4]
 80158e8:	685a      	ldr	r2, [r3, #4]
 80158ea:	68fb      	ldr	r3, [r7, #12]
 80158ec:	681b      	ldr	r3, [r3, #0]
 80158ee:	685b      	ldr	r3, [r3, #4]
 80158f0:	441a      	add	r2, r3
 80158f2:	687b      	ldr	r3, [r7, #4]
 80158f4:	605a      	str	r2, [r3, #4]
			pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock->pxNextFreeBlock;
 80158f6:	68fb      	ldr	r3, [r7, #12]
 80158f8:	681b      	ldr	r3, [r3, #0]
 80158fa:	681a      	ldr	r2, [r3, #0]
 80158fc:	687b      	ldr	r3, [r7, #4]
 80158fe:	601a      	str	r2, [r3, #0]
 8015900:	e008      	b.n	8015914 <prvInsertBlockIntoFreeList+0x90>
		}
		else
		{
			pxBlockToInsert->pxNextFreeBlock = pxEnd;
 8015902:	4b0c      	ldr	r3, [pc, #48]	@ (8015934 <prvInsertBlockIntoFreeList+0xb0>)
 8015904:	681a      	ldr	r2, [r3, #0]
 8015906:	687b      	ldr	r3, [r7, #4]
 8015908:	601a      	str	r2, [r3, #0]
 801590a:	e003      	b.n	8015914 <prvInsertBlockIntoFreeList+0x90>
		}
	}
	else
	{
		pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock;
 801590c:	68fb      	ldr	r3, [r7, #12]
 801590e:	681a      	ldr	r2, [r3, #0]
 8015910:	687b      	ldr	r3, [r7, #4]
 8015912:	601a      	str	r2, [r3, #0]

	/* If the block being inserted plugged a gab, so was merged with the block
	before and the block after, then it's pxNextFreeBlock pointer will have
	already been set, and should not be set here as that would make it point
	to itself. */
	if( pxIterator != pxBlockToInsert )
 8015914:	68fa      	ldr	r2, [r7, #12]
 8015916:	687b      	ldr	r3, [r7, #4]
 8015918:	429a      	cmp	r2, r3
 801591a:	d002      	beq.n	8015922 <prvInsertBlockIntoFreeList+0x9e>
	{
		pxIterator->pxNextFreeBlock = pxBlockToInsert;
 801591c:	68fb      	ldr	r3, [r7, #12]
 801591e:	687a      	ldr	r2, [r7, #4]
 8015920:	601a      	str	r2, [r3, #0]
	}
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}
}
 8015922:	bf00      	nop
 8015924:	3714      	adds	r7, #20
 8015926:	46bd      	mov	sp, r7
 8015928:	f85d 7b04 	ldr.w	r7, [sp], #4
 801592c:	4770      	bx	lr
 801592e:	bf00      	nop
 8015930:	24024394 	.word	0x24024394
 8015934:	2402439c 	.word	0x2402439c

08015938 <netconn_apimsg>:
 * @param apimsg a struct containing the function to call and its parameters
 * @return ERR_OK if the function was called, another err_t if not
 */
static err_t
netconn_apimsg(tcpip_callback_fn fn, struct api_msg *apimsg)
{
 8015938:	b580      	push	{r7, lr}
 801593a:	b084      	sub	sp, #16
 801593c:	af00      	add	r7, sp, #0
 801593e:	6078      	str	r0, [r7, #4]
 8015940:	6039      	str	r1, [r7, #0]
  err_t err;

#ifdef LWIP_DEBUG
  /* catch functions that don't set err */
  apimsg->err = ERR_VAL;
 8015942:	683b      	ldr	r3, [r7, #0]
 8015944:	22fa      	movs	r2, #250	@ 0xfa
 8015946:	711a      	strb	r2, [r3, #4]

#if LWIP_NETCONN_SEM_PER_THREAD
  apimsg->op_completed_sem = LWIP_NETCONN_THREAD_SEM_GET();
#endif /* LWIP_NETCONN_SEM_PER_THREAD */

  err = tcpip_send_msg_wait_sem(fn, apimsg, LWIP_API_MSG_SEM(apimsg));
 8015948:	683b      	ldr	r3, [r7, #0]
 801594a:	681b      	ldr	r3, [r3, #0]
 801594c:	330c      	adds	r3, #12
 801594e:	461a      	mov	r2, r3
 8015950:	6839      	ldr	r1, [r7, #0]
 8015952:	6878      	ldr	r0, [r7, #4]
 8015954:	f003 fc7c 	bl	8019250 <tcpip_send_msg_wait_sem>
 8015958:	4603      	mov	r3, r0
 801595a:	73fb      	strb	r3, [r7, #15]
  if (err == ERR_OK) {
 801595c:	f997 300f 	ldrsb.w	r3, [r7, #15]
 8015960:	2b00      	cmp	r3, #0
 8015962:	d103      	bne.n	801596c <netconn_apimsg+0x34>
    return apimsg->err;
 8015964:	683b      	ldr	r3, [r7, #0]
 8015966:	f993 3004 	ldrsb.w	r3, [r3, #4]
 801596a:	e001      	b.n	8015970 <netconn_apimsg+0x38>
  }
  return err;
 801596c:	f997 300f 	ldrsb.w	r3, [r7, #15]
}
 8015970:	4618      	mov	r0, r3
 8015972:	3710      	adds	r7, #16
 8015974:	46bd      	mov	sp, r7
 8015976:	bd80      	pop	{r7, pc}

08015978 <netconn_new_with_proto_and_callback>:
 * @return a newly allocated struct netconn or
 *         NULL on memory error
 */
struct netconn *
netconn_new_with_proto_and_callback(enum netconn_type t, u8_t proto, netconn_callback callback)
{
 8015978:	b580      	push	{r7, lr}
 801597a:	b08c      	sub	sp, #48	@ 0x30
 801597c:	af00      	add	r7, sp, #0
 801597e:	4603      	mov	r3, r0
 8015980:	603a      	str	r2, [r7, #0]
 8015982:	71fb      	strb	r3, [r7, #7]
 8015984:	460b      	mov	r3, r1
 8015986:	71bb      	strb	r3, [r7, #6]
  struct netconn *conn;
  API_MSG_VAR_DECLARE(msg);
  API_MSG_VAR_ALLOC_RETURN_NULL(msg);

  conn = netconn_alloc(t, callback);
 8015988:	79fb      	ldrb	r3, [r7, #7]
 801598a:	6839      	ldr	r1, [r7, #0]
 801598c:	4618      	mov	r0, r3
 801598e:	f001 f8ad 	bl	8016aec <netconn_alloc>
 8015992:	62f8      	str	r0, [r7, #44]	@ 0x2c
  if (conn != NULL) {
 8015994:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8015996:	2b00      	cmp	r3, #0
 8015998:	d054      	beq.n	8015a44 <netconn_new_with_proto_and_callback+0xcc>
    err_t err;

    API_MSG_VAR_REF(msg).msg.n.proto = proto;
 801599a:	79bb      	ldrb	r3, [r7, #6]
 801599c:	743b      	strb	r3, [r7, #16]
    API_MSG_VAR_REF(msg).conn = conn;
 801599e:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80159a0:	60bb      	str	r3, [r7, #8]
    err = netconn_apimsg(lwip_netconn_do_newconn, &API_MSG_VAR_REF(msg));
 80159a2:	f107 0308 	add.w	r3, r7, #8
 80159a6:	4619      	mov	r1, r3
 80159a8:	4829      	ldr	r0, [pc, #164]	@ (8015a50 <netconn_new_with_proto_and_callback+0xd8>)
 80159aa:	f7ff ffc5 	bl	8015938 <netconn_apimsg>
 80159ae:	4603      	mov	r3, r0
 80159b0:	f887 302b 	strb.w	r3, [r7, #43]	@ 0x2b
    if (err != ERR_OK) {
 80159b4:	f997 302b 	ldrsb.w	r3, [r7, #43]	@ 0x2b
 80159b8:	2b00      	cmp	r3, #0
 80159ba:	d043      	beq.n	8015a44 <netconn_new_with_proto_and_callback+0xcc>
      LWIP_ASSERT("freeing conn without freeing pcb", conn->pcb.tcp == NULL);
 80159bc:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80159be:	685b      	ldr	r3, [r3, #4]
 80159c0:	2b00      	cmp	r3, #0
 80159c2:	d005      	beq.n	80159d0 <netconn_new_with_proto_and_callback+0x58>
 80159c4:	4b23      	ldr	r3, [pc, #140]	@ (8015a54 <netconn_new_with_proto_and_callback+0xdc>)
 80159c6:	22a3      	movs	r2, #163	@ 0xa3
 80159c8:	4923      	ldr	r1, [pc, #140]	@ (8015a58 <netconn_new_with_proto_and_callback+0xe0>)
 80159ca:	4824      	ldr	r0, [pc, #144]	@ (8015a5c <netconn_new_with_proto_and_callback+0xe4>)
 80159cc:	f014 fbf6 	bl	802a1bc <iprintf>
      LWIP_ASSERT("conn has no recvmbox", sys_mbox_valid(&conn->recvmbox));
 80159d0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80159d2:	3310      	adds	r3, #16
 80159d4:	4618      	mov	r0, r3
 80159d6:	f011 f851 	bl	8026a7c <sys_mbox_valid>
 80159da:	4603      	mov	r3, r0
 80159dc:	2b00      	cmp	r3, #0
 80159de:	d105      	bne.n	80159ec <netconn_new_with_proto_and_callback+0x74>
 80159e0:	4b1c      	ldr	r3, [pc, #112]	@ (8015a54 <netconn_new_with_proto_and_callback+0xdc>)
 80159e2:	22a4      	movs	r2, #164	@ 0xa4
 80159e4:	491e      	ldr	r1, [pc, #120]	@ (8015a60 <netconn_new_with_proto_and_callback+0xe8>)
 80159e6:	481d      	ldr	r0, [pc, #116]	@ (8015a5c <netconn_new_with_proto_and_callback+0xe4>)
 80159e8:	f014 fbe8 	bl	802a1bc <iprintf>
#if LWIP_TCP
      LWIP_ASSERT("conn->acceptmbox shouldn't exist", !sys_mbox_valid(&conn->acceptmbox));
 80159ec:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80159ee:	3314      	adds	r3, #20
 80159f0:	4618      	mov	r0, r3
 80159f2:	f011 f843 	bl	8026a7c <sys_mbox_valid>
 80159f6:	4603      	mov	r3, r0
 80159f8:	2b00      	cmp	r3, #0
 80159fa:	d005      	beq.n	8015a08 <netconn_new_with_proto_and_callback+0x90>
 80159fc:	4b15      	ldr	r3, [pc, #84]	@ (8015a54 <netconn_new_with_proto_and_callback+0xdc>)
 80159fe:	22a6      	movs	r2, #166	@ 0xa6
 8015a00:	4918      	ldr	r1, [pc, #96]	@ (8015a64 <netconn_new_with_proto_and_callback+0xec>)
 8015a02:	4816      	ldr	r0, [pc, #88]	@ (8015a5c <netconn_new_with_proto_and_callback+0xe4>)
 8015a04:	f014 fbda 	bl	802a1bc <iprintf>
#endif /* LWIP_TCP */
#if !LWIP_NETCONN_SEM_PER_THREAD
      LWIP_ASSERT("conn has no op_completed", sys_sem_valid(&conn->op_completed));
 8015a08:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8015a0a:	330c      	adds	r3, #12
 8015a0c:	4618      	mov	r0, r3
 8015a0e:	f011 f8c3 	bl	8026b98 <sys_sem_valid>
 8015a12:	4603      	mov	r3, r0
 8015a14:	2b00      	cmp	r3, #0
 8015a16:	d105      	bne.n	8015a24 <netconn_new_with_proto_and_callback+0xac>
 8015a18:	4b0e      	ldr	r3, [pc, #56]	@ (8015a54 <netconn_new_with_proto_and_callback+0xdc>)
 8015a1a:	22a9      	movs	r2, #169	@ 0xa9
 8015a1c:	4912      	ldr	r1, [pc, #72]	@ (8015a68 <netconn_new_with_proto_and_callback+0xf0>)
 8015a1e:	480f      	ldr	r0, [pc, #60]	@ (8015a5c <netconn_new_with_proto_and_callback+0xe4>)
 8015a20:	f014 fbcc 	bl	802a1bc <iprintf>
      sys_sem_free(&conn->op_completed);
 8015a24:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8015a26:	330c      	adds	r3, #12
 8015a28:	4618      	mov	r0, r3
 8015a2a:	f011 f8a8 	bl	8026b7e <sys_sem_free>
#endif /* !LWIP_NETCONN_SEM_PER_THREAD */
      sys_mbox_free(&conn->recvmbox);
 8015a2e:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8015a30:	3310      	adds	r3, #16
 8015a32:	4618      	mov	r0, r3
 8015a34:	f010 ffae 	bl	8026994 <sys_mbox_free>
      memp_free(MEMP_NETCONN, conn);
 8015a38:	6af9      	ldr	r1, [r7, #44]	@ 0x2c
 8015a3a:	2007      	movs	r0, #7
 8015a3c:	f004 fa58 	bl	8019ef0 <memp_free>
      API_MSG_VAR_FREE(msg);
      return NULL;
 8015a40:	2300      	movs	r3, #0
 8015a42:	e000      	b.n	8015a46 <netconn_new_with_proto_and_callback+0xce>
    }
  }
  API_MSG_VAR_FREE(msg);
  return conn;
 8015a44:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
}
 8015a46:	4618      	mov	r0, r3
 8015a48:	3730      	adds	r7, #48	@ 0x30
 8015a4a:	46bd      	mov	sp, r7
 8015a4c:	bd80      	pop	{r7, pc}
 8015a4e:	bf00      	nop
 8015a50:	08016ac1 	.word	0x08016ac1
 8015a54:	0802d418 	.word	0x0802d418
 8015a58:	0802d44c 	.word	0x0802d44c
 8015a5c:	0802d470 	.word	0x0802d470
 8015a60:	0802d498 	.word	0x0802d498
 8015a64:	0802d4b0 	.word	0x0802d4b0
 8015a68:	0802d4d4 	.word	0x0802d4d4

08015a6c <netconn_prepare_delete>:
 * @param conn the netconn to delete
 * @return ERR_OK if the connection was deleted
 */
err_t
netconn_prepare_delete(struct netconn *conn)
{
 8015a6c:	b580      	push	{r7, lr}
 8015a6e:	b08c      	sub	sp, #48	@ 0x30
 8015a70:	af00      	add	r7, sp, #0
 8015a72:	6078      	str	r0, [r7, #4]
  err_t err;
  API_MSG_VAR_DECLARE(msg);

  /* No ASSERT here because possible to get a (conn == NULL) if we got an accept error */
  if (conn == NULL) {
 8015a74:	687b      	ldr	r3, [r7, #4]
 8015a76:	2b00      	cmp	r3, #0
 8015a78:	d101      	bne.n	8015a7e <netconn_prepare_delete+0x12>
    return ERR_OK;
 8015a7a:	2300      	movs	r3, #0
 8015a7c:	e014      	b.n	8015aa8 <netconn_prepare_delete+0x3c>
  }

  API_MSG_VAR_ALLOC(msg);
  API_MSG_VAR_REF(msg).conn = conn;
 8015a7e:	687b      	ldr	r3, [r7, #4]
 8015a80:	60fb      	str	r3, [r7, #12]
  /* get the time we started, which is later compared to
     sys_now() + conn->send_timeout */
  API_MSG_VAR_REF(msg).msg.sd.time_started = sys_now();
#else /* LWIP_SO_SNDTIMEO || LWIP_SO_LINGER */
#if LWIP_TCP
  API_MSG_VAR_REF(msg).msg.sd.polls_left =
 8015a82:	2329      	movs	r3, #41	@ 0x29
 8015a84:	757b      	strb	r3, [r7, #21]
    ((LWIP_TCP_CLOSE_TIMEOUT_MS_DEFAULT + TCP_SLOW_INTERVAL - 1) / TCP_SLOW_INTERVAL) + 1;
#endif /* LWIP_TCP */
#endif /* LWIP_SO_SNDTIMEO || LWIP_SO_LINGER */
  err = netconn_apimsg(lwip_netconn_do_delconn, &API_MSG_VAR_REF(msg));
 8015a86:	f107 030c 	add.w	r3, r7, #12
 8015a8a:	4619      	mov	r1, r3
 8015a8c:	4808      	ldr	r0, [pc, #32]	@ (8015ab0 <netconn_prepare_delete+0x44>)
 8015a8e:	f7ff ff53 	bl	8015938 <netconn_apimsg>
 8015a92:	4603      	mov	r3, r0
 8015a94:	f887 302f 	strb.w	r3, [r7, #47]	@ 0x2f
  API_MSG_VAR_FREE(msg);

  if (err != ERR_OK) {
 8015a98:	f997 302f 	ldrsb.w	r3, [r7, #47]	@ 0x2f
 8015a9c:	2b00      	cmp	r3, #0
 8015a9e:	d002      	beq.n	8015aa6 <netconn_prepare_delete+0x3a>
    return err;
 8015aa0:	f997 302f 	ldrsb.w	r3, [r7, #47]	@ 0x2f
 8015aa4:	e000      	b.n	8015aa8 <netconn_prepare_delete+0x3c>
  }
  return ERR_OK;
 8015aa6:	2300      	movs	r3, #0
}
 8015aa8:	4618      	mov	r0, r3
 8015aaa:	3730      	adds	r7, #48	@ 0x30
 8015aac:	46bd      	mov	sp, r7
 8015aae:	bd80      	pop	{r7, pc}
 8015ab0:	08017045 	.word	0x08017045

08015ab4 <netconn_delete>:
 * @param conn the netconn to delete
 * @return ERR_OK if the connection was deleted
 */
err_t
netconn_delete(struct netconn *conn)
{
 8015ab4:	b580      	push	{r7, lr}
 8015ab6:	b084      	sub	sp, #16
 8015ab8:	af00      	add	r7, sp, #0
 8015aba:	6078      	str	r0, [r7, #4]
  err_t err;

  /* No ASSERT here because possible to get a (conn == NULL) if we got an accept error */
  if (conn == NULL) {
 8015abc:	687b      	ldr	r3, [r7, #4]
 8015abe:	2b00      	cmp	r3, #0
 8015ac0:	d101      	bne.n	8015ac6 <netconn_delete+0x12>
    return ERR_OK;
 8015ac2:	2300      	movs	r3, #0
 8015ac4:	e00d      	b.n	8015ae2 <netconn_delete+0x2e>
    /* Already called netconn_prepare_delete() before */
    err = ERR_OK;
  } else
#endif /* LWIP_NETCONN_FULLDUPLEX */
  {
    err = netconn_prepare_delete(conn);
 8015ac6:	6878      	ldr	r0, [r7, #4]
 8015ac8:	f7ff ffd0 	bl	8015a6c <netconn_prepare_delete>
 8015acc:	4603      	mov	r3, r0
 8015ace:	73fb      	strb	r3, [r7, #15]
  }
  if (err == ERR_OK) {
 8015ad0:	f997 300f 	ldrsb.w	r3, [r7, #15]
 8015ad4:	2b00      	cmp	r3, #0
 8015ad6:	d102      	bne.n	8015ade <netconn_delete+0x2a>
    netconn_free(conn);
 8015ad8:	6878      	ldr	r0, [r7, #4]
 8015ada:	f001 f881 	bl	8016be0 <netconn_free>
  }
  return err;
 8015ade:	f997 300f 	ldrsb.w	r3, [r7, #15]
}
 8015ae2:	4618      	mov	r0, r3
 8015ae4:	3710      	adds	r7, #16
 8015ae6:	46bd      	mov	sp, r7
 8015ae8:	bd80      	pop	{r7, pc}
	...

08015aec <netconn_getaddr>:
 * @return ERR_CONN for invalid connections
 *         ERR_OK if the information was retrieved
 */
err_t
netconn_getaddr(struct netconn *conn, ip_addr_t *addr, u16_t *port, u8_t local)
{
 8015aec:	b580      	push	{r7, lr}
 8015aee:	b08e      	sub	sp, #56	@ 0x38
 8015af0:	af00      	add	r7, sp, #0
 8015af2:	60f8      	str	r0, [r7, #12]
 8015af4:	60b9      	str	r1, [r7, #8]
 8015af6:	607a      	str	r2, [r7, #4]
 8015af8:	70fb      	strb	r3, [r7, #3]
  API_MSG_VAR_DECLARE(msg);
  err_t err;

  LWIP_ERROR("netconn_getaddr: invalid conn", (conn != NULL), return ERR_ARG;);
 8015afa:	68fb      	ldr	r3, [r7, #12]
 8015afc:	2b00      	cmp	r3, #0
 8015afe:	d109      	bne.n	8015b14 <netconn_getaddr+0x28>
 8015b00:	4b1d      	ldr	r3, [pc, #116]	@ (8015b78 <netconn_getaddr+0x8c>)
 8015b02:	f44f 7289 	mov.w	r2, #274	@ 0x112
 8015b06:	491d      	ldr	r1, [pc, #116]	@ (8015b7c <netconn_getaddr+0x90>)
 8015b08:	481d      	ldr	r0, [pc, #116]	@ (8015b80 <netconn_getaddr+0x94>)
 8015b0a:	f014 fb57 	bl	802a1bc <iprintf>
 8015b0e:	f06f 030f 	mvn.w	r3, #15
 8015b12:	e02d      	b.n	8015b70 <netconn_getaddr+0x84>
  LWIP_ERROR("netconn_getaddr: invalid addr", (addr != NULL), return ERR_ARG;);
 8015b14:	68bb      	ldr	r3, [r7, #8]
 8015b16:	2b00      	cmp	r3, #0
 8015b18:	d109      	bne.n	8015b2e <netconn_getaddr+0x42>
 8015b1a:	4b17      	ldr	r3, [pc, #92]	@ (8015b78 <netconn_getaddr+0x8c>)
 8015b1c:	f240 1213 	movw	r2, #275	@ 0x113
 8015b20:	4918      	ldr	r1, [pc, #96]	@ (8015b84 <netconn_getaddr+0x98>)
 8015b22:	4817      	ldr	r0, [pc, #92]	@ (8015b80 <netconn_getaddr+0x94>)
 8015b24:	f014 fb4a 	bl	802a1bc <iprintf>
 8015b28:	f06f 030f 	mvn.w	r3, #15
 8015b2c:	e020      	b.n	8015b70 <netconn_getaddr+0x84>
  LWIP_ERROR("netconn_getaddr: invalid port", (port != NULL), return ERR_ARG;);
 8015b2e:	687b      	ldr	r3, [r7, #4]
 8015b30:	2b00      	cmp	r3, #0
 8015b32:	d109      	bne.n	8015b48 <netconn_getaddr+0x5c>
 8015b34:	4b10      	ldr	r3, [pc, #64]	@ (8015b78 <netconn_getaddr+0x8c>)
 8015b36:	f44f 728a 	mov.w	r2, #276	@ 0x114
 8015b3a:	4913      	ldr	r1, [pc, #76]	@ (8015b88 <netconn_getaddr+0x9c>)
 8015b3c:	4810      	ldr	r0, [pc, #64]	@ (8015b80 <netconn_getaddr+0x94>)
 8015b3e:	f014 fb3d 	bl	802a1bc <iprintf>
 8015b42:	f06f 030f 	mvn.w	r3, #15
 8015b46:	e013      	b.n	8015b70 <netconn_getaddr+0x84>

  API_MSG_VAR_ALLOC(msg);
  API_MSG_VAR_REF(msg).conn = conn;
 8015b48:	68fb      	ldr	r3, [r7, #12]
 8015b4a:	617b      	str	r3, [r7, #20]
  API_MSG_VAR_REF(msg).msg.ad.local = local;
 8015b4c:	78fb      	ldrb	r3, [r7, #3]
 8015b4e:	f887 3024 	strb.w	r3, [r7, #36]	@ 0x24
#if LWIP_MPU_COMPATIBLE
  err = netconn_apimsg(lwip_netconn_do_getaddr, &API_MSG_VAR_REF(msg));
  *addr = msg->msg.ad.ipaddr;
  *port = msg->msg.ad.port;
#else /* LWIP_MPU_COMPATIBLE */
  msg.msg.ad.ipaddr = addr;
 8015b52:	68bb      	ldr	r3, [r7, #8]
 8015b54:	61fb      	str	r3, [r7, #28]
  msg.msg.ad.port = port;
 8015b56:	687b      	ldr	r3, [r7, #4]
 8015b58:	623b      	str	r3, [r7, #32]
  err = netconn_apimsg(lwip_netconn_do_getaddr, &msg);
 8015b5a:	f107 0314 	add.w	r3, r7, #20
 8015b5e:	4619      	mov	r1, r3
 8015b60:	480a      	ldr	r0, [pc, #40]	@ (8015b8c <netconn_getaddr+0xa0>)
 8015b62:	f7ff fee9 	bl	8015938 <netconn_apimsg>
 8015b66:	4603      	mov	r3, r0
 8015b68:	f887 3037 	strb.w	r3, [r7, #55]	@ 0x37
#endif /* LWIP_MPU_COMPATIBLE */
  API_MSG_VAR_FREE(msg);

  return err;
 8015b6c:	f997 3037 	ldrsb.w	r3, [r7, #55]	@ 0x37
}
 8015b70:	4618      	mov	r0, r3
 8015b72:	3738      	adds	r7, #56	@ 0x38
 8015b74:	46bd      	mov	sp, r7
 8015b76:	bd80      	pop	{r7, pc}
 8015b78:	0802d418 	.word	0x0802d418
 8015b7c:	0802d4f0 	.word	0x0802d4f0
 8015b80:	0802d470 	.word	0x0802d470
 8015b84:	0802d510 	.word	0x0802d510
 8015b88:	0802d530 	.word	0x0802d530
 8015b8c:	08017aa1 	.word	0x08017aa1

08015b90 <netconn_connect>:
 * @param port the remote port to connect to (no used for RAW)
 * @return ERR_OK if connected, return value of tcp_/udp_/raw_connect otherwise
 */
err_t
netconn_connect(struct netconn *conn, const ip_addr_t *addr, u16_t port)
{
 8015b90:	b580      	push	{r7, lr}
 8015b92:	b08e      	sub	sp, #56	@ 0x38
 8015b94:	af00      	add	r7, sp, #0
 8015b96:	60f8      	str	r0, [r7, #12]
 8015b98:	60b9      	str	r1, [r7, #8]
 8015b9a:	4613      	mov	r3, r2
 8015b9c:	80fb      	strh	r3, [r7, #6]
  API_MSG_VAR_DECLARE(msg);
  err_t err;

  LWIP_ERROR("netconn_connect: invalid conn", (conn != NULL), return ERR_ARG;);
 8015b9e:	68fb      	ldr	r3, [r7, #12]
 8015ba0:	2b00      	cmp	r3, #0
 8015ba2:	d109      	bne.n	8015bb8 <netconn_connect+0x28>
 8015ba4:	4b11      	ldr	r3, [pc, #68]	@ (8015bec <netconn_connect+0x5c>)
 8015ba6:	f44f 72bf 	mov.w	r2, #382	@ 0x17e
 8015baa:	4911      	ldr	r1, [pc, #68]	@ (8015bf0 <netconn_connect+0x60>)
 8015bac:	4811      	ldr	r0, [pc, #68]	@ (8015bf4 <netconn_connect+0x64>)
 8015bae:	f014 fb05 	bl	802a1bc <iprintf>
 8015bb2:	f06f 030f 	mvn.w	r3, #15
 8015bb6:	e015      	b.n	8015be4 <netconn_connect+0x54>

#if LWIP_IPV4
  /* Don't propagate NULL pointer (IP_ADDR_ANY alias) to subsequent functions */
  if (addr == NULL) {
 8015bb8:	68bb      	ldr	r3, [r7, #8]
 8015bba:	2b00      	cmp	r3, #0
 8015bbc:	d101      	bne.n	8015bc2 <netconn_connect+0x32>
    addr = IP4_ADDR_ANY;
 8015bbe:	4b0e      	ldr	r3, [pc, #56]	@ (8015bf8 <netconn_connect+0x68>)
 8015bc0:	60bb      	str	r3, [r7, #8]
  }
#endif /* LWIP_IPV4 */

  API_MSG_VAR_ALLOC(msg);
  API_MSG_VAR_REF(msg).conn = conn;
 8015bc2:	68fb      	ldr	r3, [r7, #12]
 8015bc4:	617b      	str	r3, [r7, #20]
  API_MSG_VAR_REF(msg).msg.bc.ipaddr = API_MSG_VAR_REF(addr);
 8015bc6:	68bb      	ldr	r3, [r7, #8]
 8015bc8:	61fb      	str	r3, [r7, #28]
  API_MSG_VAR_REF(msg).msg.bc.port = port;
 8015bca:	88fb      	ldrh	r3, [r7, #6]
 8015bcc:	843b      	strh	r3, [r7, #32]
  err = netconn_apimsg(lwip_netconn_do_connect, &API_MSG_VAR_REF(msg));
 8015bce:	f107 0314 	add.w	r3, r7, #20
 8015bd2:	4619      	mov	r1, r3
 8015bd4:	4809      	ldr	r0, [pc, #36]	@ (8015bfc <netconn_connect+0x6c>)
 8015bd6:	f7ff feaf 	bl	8015938 <netconn_apimsg>
 8015bda:	4603      	mov	r3, r0
 8015bdc:	f887 3037 	strb.w	r3, [r7, #55]	@ 0x37
  API_MSG_VAR_FREE(msg);

  return err;
 8015be0:	f997 3037 	ldrsb.w	r3, [r7, #55]	@ 0x37
}
 8015be4:	4618      	mov	r0, r3
 8015be6:	3738      	adds	r7, #56	@ 0x38
 8015be8:	46bd      	mov	sp, r7
 8015bea:	bd80      	pop	{r7, pc}
 8015bec:	0802d418 	.word	0x0802d418
 8015bf0:	0802d58c 	.word	0x0802d58c
 8015bf4:	0802d470 	.word	0x0802d470
 8015bf8:	080314f4 	.word	0x080314f4
 8015bfc:	08017331 	.word	0x08017331

08015c00 <netconn_disconnect>:
 * @param conn the netconn to disconnect
 * @return See @ref err_t
 */
err_t
netconn_disconnect(struct netconn *conn)
{
 8015c00:	b580      	push	{r7, lr}
 8015c02:	b08c      	sub	sp, #48	@ 0x30
 8015c04:	af00      	add	r7, sp, #0
 8015c06:	6078      	str	r0, [r7, #4]
  API_MSG_VAR_DECLARE(msg);
  err_t err;

  LWIP_ERROR("netconn_disconnect: invalid conn", (conn != NULL), return ERR_ARG;);
 8015c08:	687b      	ldr	r3, [r7, #4]
 8015c0a:	2b00      	cmp	r3, #0
 8015c0c:	d109      	bne.n	8015c22 <netconn_disconnect+0x22>
 8015c0e:	4b0d      	ldr	r3, [pc, #52]	@ (8015c44 <netconn_disconnect+0x44>)
 8015c10:	f44f 72cf 	mov.w	r2, #414	@ 0x19e
 8015c14:	490c      	ldr	r1, [pc, #48]	@ (8015c48 <netconn_disconnect+0x48>)
 8015c16:	480d      	ldr	r0, [pc, #52]	@ (8015c4c <netconn_disconnect+0x4c>)
 8015c18:	f014 fad0 	bl	802a1bc <iprintf>
 8015c1c:	f06f 030f 	mvn.w	r3, #15
 8015c20:	e00c      	b.n	8015c3c <netconn_disconnect+0x3c>

  API_MSG_VAR_ALLOC(msg);
  API_MSG_VAR_REF(msg).conn = conn;
 8015c22:	687b      	ldr	r3, [r7, #4]
 8015c24:	60fb      	str	r3, [r7, #12]
  err = netconn_apimsg(lwip_netconn_do_disconnect, &API_MSG_VAR_REF(msg));
 8015c26:	f107 030c 	add.w	r3, r7, #12
 8015c2a:	4619      	mov	r1, r3
 8015c2c:	4808      	ldr	r0, [pc, #32]	@ (8015c50 <netconn_disconnect+0x50>)
 8015c2e:	f7ff fe83 	bl	8015938 <netconn_apimsg>
 8015c32:	4603      	mov	r3, r0
 8015c34:	f887 302f 	strb.w	r3, [r7, #47]	@ 0x2f
  API_MSG_VAR_FREE(msg);

  return err;
 8015c38:	f997 302f 	ldrsb.w	r3, [r7, #47]	@ 0x2f
}
 8015c3c:	4618      	mov	r0, r3
 8015c3e:	3730      	adds	r7, #48	@ 0x30
 8015c40:	46bd      	mov	sp, r7
 8015c42:	bd80      	pop	{r7, pc}
 8015c44:	0802d418 	.word	0x0802d418
 8015c48:	0802d5ac 	.word	0x0802d5ac
 8015c4c:	0802d470 	.word	0x0802d470
 8015c50:	080174b1 	.word	0x080174b1

08015c54 <netconn_recv_data>:
 *         ERR_WOULDBLOCK if the netconn is nonblocking but would block to wait for data
 *         ERR_TIMEOUT if the netconn has a receive timeout and no data was received
 */
static err_t
netconn_recv_data(struct netconn *conn, void **new_buf, u8_t apiflags)
{
 8015c54:	b580      	push	{r7, lr}
 8015c56:	b08a      	sub	sp, #40	@ 0x28
 8015c58:	af00      	add	r7, sp, #0
 8015c5a:	60f8      	str	r0, [r7, #12]
 8015c5c:	60b9      	str	r1, [r7, #8]
 8015c5e:	4613      	mov	r3, r2
 8015c60:	71fb      	strb	r3, [r7, #7]
  void *buf = NULL;
 8015c62:	2300      	movs	r3, #0
 8015c64:	61bb      	str	r3, [r7, #24]
  u16_t len;

  LWIP_ERROR("netconn_recv: invalid pointer", (new_buf != NULL), return ERR_ARG;);
 8015c66:	68bb      	ldr	r3, [r7, #8]
 8015c68:	2b00      	cmp	r3, #0
 8015c6a:	d109      	bne.n	8015c80 <netconn_recv_data+0x2c>
 8015c6c:	4b64      	ldr	r3, [pc, #400]	@ (8015e00 <netconn_recv_data+0x1ac>)
 8015c6e:	f44f 7212 	mov.w	r2, #584	@ 0x248
 8015c72:	4964      	ldr	r1, [pc, #400]	@ (8015e04 <netconn_recv_data+0x1b0>)
 8015c74:	4864      	ldr	r0, [pc, #400]	@ (8015e08 <netconn_recv_data+0x1b4>)
 8015c76:	f014 faa1 	bl	802a1bc <iprintf>
 8015c7a:	f06f 030f 	mvn.w	r3, #15
 8015c7e:	e0bb      	b.n	8015df8 <netconn_recv_data+0x1a4>
  *new_buf = NULL;
 8015c80:	68bb      	ldr	r3, [r7, #8]
 8015c82:	2200      	movs	r2, #0
 8015c84:	601a      	str	r2, [r3, #0]
  LWIP_ERROR("netconn_recv: invalid conn",    (conn != NULL),    return ERR_ARG;);
 8015c86:	68fb      	ldr	r3, [r7, #12]
 8015c88:	2b00      	cmp	r3, #0
 8015c8a:	d109      	bne.n	8015ca0 <netconn_recv_data+0x4c>
 8015c8c:	4b5c      	ldr	r3, [pc, #368]	@ (8015e00 <netconn_recv_data+0x1ac>)
 8015c8e:	f240 224a 	movw	r2, #586	@ 0x24a
 8015c92:	495e      	ldr	r1, [pc, #376]	@ (8015e0c <netconn_recv_data+0x1b8>)
 8015c94:	485c      	ldr	r0, [pc, #368]	@ (8015e08 <netconn_recv_data+0x1b4>)
 8015c96:	f014 fa91 	bl	802a1bc <iprintf>
 8015c9a:	f06f 030f 	mvn.w	r3, #15
 8015c9e:	e0ab      	b.n	8015df8 <netconn_recv_data+0x1a4>

  if (!NETCONN_RECVMBOX_WAITABLE(conn)) {
 8015ca0:	68fb      	ldr	r3, [r7, #12]
 8015ca2:	3310      	adds	r3, #16
 8015ca4:	4618      	mov	r0, r3
 8015ca6:	f010 fee9 	bl	8026a7c <sys_mbox_valid>
 8015caa:	4603      	mov	r3, r0
 8015cac:	2b00      	cmp	r3, #0
 8015cae:	d10e      	bne.n	8015cce <netconn_recv_data+0x7a>
    err_t err = netconn_err(conn);
 8015cb0:	68f8      	ldr	r0, [r7, #12]
 8015cb2:	f000 fb1f 	bl	80162f4 <netconn_err>
 8015cb6:	4603      	mov	r3, r0
 8015cb8:	77fb      	strb	r3, [r7, #31]
    if (err != ERR_OK) {
 8015cba:	f997 301f 	ldrsb.w	r3, [r7, #31]
 8015cbe:	2b00      	cmp	r3, #0
 8015cc0:	d002      	beq.n	8015cc8 <netconn_recv_data+0x74>
      /* return pending error */
      return err;
 8015cc2:	f997 301f 	ldrsb.w	r3, [r7, #31]
 8015cc6:	e097      	b.n	8015df8 <netconn_recv_data+0x1a4>
    }
    return ERR_CONN;
 8015cc8:	f06f 030a 	mvn.w	r3, #10
 8015ccc:	e094      	b.n	8015df8 <netconn_recv_data+0x1a4>
  }

  NETCONN_MBOX_WAITING_INC(conn);
  if (netconn_is_nonblocking(conn) || (apiflags & NETCONN_DONTBLOCK) ||
 8015cce:	68fb      	ldr	r3, [r7, #12]
 8015cd0:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8015cd4:	f003 0302 	and.w	r3, r3, #2
 8015cd8:	2b00      	cmp	r3, #0
 8015cda:	d110      	bne.n	8015cfe <netconn_recv_data+0xaa>
 8015cdc:	79fb      	ldrb	r3, [r7, #7]
 8015cde:	f003 0304 	and.w	r3, r3, #4
 8015ce2:	2b00      	cmp	r3, #0
 8015ce4:	d10b      	bne.n	8015cfe <netconn_recv_data+0xaa>
      (conn->flags & NETCONN_FLAG_MBOXCLOSED) || (conn->pending_err != ERR_OK)) {
 8015ce6:	68fb      	ldr	r3, [r7, #12]
 8015ce8:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8015cec:	f003 0301 	and.w	r3, r3, #1
  if (netconn_is_nonblocking(conn) || (apiflags & NETCONN_DONTBLOCK) ||
 8015cf0:	2b00      	cmp	r3, #0
 8015cf2:	d104      	bne.n	8015cfe <netconn_recv_data+0xaa>
      (conn->flags & NETCONN_FLAG_MBOXCLOSED) || (conn->pending_err != ERR_OK)) {
 8015cf4:	68fb      	ldr	r3, [r7, #12]
 8015cf6:	f993 3008 	ldrsb.w	r3, [r3, #8]
 8015cfa:	2b00      	cmp	r3, #0
 8015cfc:	d025      	beq.n	8015d4a <netconn_recv_data+0xf6>
    if (sys_arch_mbox_tryfetch(&conn->recvmbox, &buf) == SYS_ARCH_TIMEOUT) {
 8015cfe:	68fb      	ldr	r3, [r7, #12]
 8015d00:	3310      	adds	r3, #16
 8015d02:	f107 0218 	add.w	r2, r7, #24
 8015d06:	4611      	mov	r1, r2
 8015d08:	4618      	mov	r0, r3
 8015d0a:	f010 fea0 	bl	8026a4e <sys_arch_mbox_tryfetch>
 8015d0e:	4603      	mov	r3, r0
 8015d10:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8015d14:	d12a      	bne.n	8015d6c <netconn_recv_data+0x118>
      err_t err;
      NETCONN_MBOX_WAITING_DEC(conn);
      err = netconn_err(conn);
 8015d16:	68f8      	ldr	r0, [r7, #12]
 8015d18:	f000 faec 	bl	80162f4 <netconn_err>
 8015d1c:	4603      	mov	r3, r0
 8015d1e:	f887 3025 	strb.w	r3, [r7, #37]	@ 0x25
      if (err != ERR_OK) {
 8015d22:	f997 3025 	ldrsb.w	r3, [r7, #37]	@ 0x25
 8015d26:	2b00      	cmp	r3, #0
 8015d28:	d002      	beq.n	8015d30 <netconn_recv_data+0xdc>
        /* return pending error */
        return err;
 8015d2a:	f997 3025 	ldrsb.w	r3, [r7, #37]	@ 0x25
 8015d2e:	e063      	b.n	8015df8 <netconn_recv_data+0x1a4>
      }
      if (conn->flags & NETCONN_FLAG_MBOXCLOSED) {
 8015d30:	68fb      	ldr	r3, [r7, #12]
 8015d32:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8015d36:	f003 0301 	and.w	r3, r3, #1
 8015d3a:	2b00      	cmp	r3, #0
 8015d3c:	d002      	beq.n	8015d44 <netconn_recv_data+0xf0>
        return ERR_CONN;
 8015d3e:	f06f 030a 	mvn.w	r3, #10
 8015d42:	e059      	b.n	8015df8 <netconn_recv_data+0x1a4>
      }
      return ERR_WOULDBLOCK;
 8015d44:	f06f 0306 	mvn.w	r3, #6
 8015d48:	e056      	b.n	8015df8 <netconn_recv_data+0x1a4>
    }
  } else {
#if LWIP_SO_RCVTIMEO
    if (sys_arch_mbox_fetch(&conn->recvmbox, &buf, conn->recv_timeout) == SYS_ARCH_TIMEOUT) {
 8015d4a:	68fb      	ldr	r3, [r7, #12]
 8015d4c:	f103 0010 	add.w	r0, r3, #16
 8015d50:	68fb      	ldr	r3, [r7, #12]
 8015d52:	69da      	ldr	r2, [r3, #28]
 8015d54:	f107 0318 	add.w	r3, r7, #24
 8015d58:	4619      	mov	r1, r3
 8015d5a:	f010 fe47 	bl	80269ec <sys_arch_mbox_fetch>
 8015d5e:	4603      	mov	r3, r0
 8015d60:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8015d64:	d102      	bne.n	8015d6c <netconn_recv_data+0x118>
      NETCONN_MBOX_WAITING_DEC(conn);
      return ERR_TIMEOUT;
 8015d66:	f06f 0302 	mvn.w	r3, #2
 8015d6a:	e045      	b.n	8015df8 <netconn_recv_data+0x1a4>
  }
#endif

#if LWIP_TCP
#if (LWIP_UDP || LWIP_RAW)
  if (NETCONNTYPE_GROUP(conn->type) == NETCONN_TCP)
 8015d6c:	68fb      	ldr	r3, [r7, #12]
 8015d6e:	781b      	ldrb	r3, [r3, #0]
 8015d70:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8015d74:	2b10      	cmp	r3, #16
 8015d76:	d117      	bne.n	8015da8 <netconn_recv_data+0x154>
#endif /* (LWIP_UDP || LWIP_RAW) */
  {
    err_t err;
    /* Check if this is an error message or a pbuf */
    if (lwip_netconn_is_err_msg(buf, &err)) {
 8015d78:	69bb      	ldr	r3, [r7, #24]
 8015d7a:	f107 0217 	add.w	r2, r7, #23
 8015d7e:	4611      	mov	r1, r2
 8015d80:	4618      	mov	r0, r3
 8015d82:	f000 fb09 	bl	8016398 <lwip_netconn_is_err_msg>
 8015d86:	4603      	mov	r3, r0
 8015d88:	2b00      	cmp	r3, #0
 8015d8a:	d009      	beq.n	8015da0 <netconn_recv_data+0x14c>
      /* new_buf has been zeroed above already */
      if (err == ERR_CLSD) {
 8015d8c:	f997 3017 	ldrsb.w	r3, [r7, #23]
 8015d90:	f113 0f0f 	cmn.w	r3, #15
 8015d94:	d101      	bne.n	8015d9a <netconn_recv_data+0x146>
        /* connection closed translates to ERR_OK with *new_buf == NULL */
        return ERR_OK;
 8015d96:	2300      	movs	r3, #0
 8015d98:	e02e      	b.n	8015df8 <netconn_recv_data+0x1a4>
      }
      return err;
 8015d9a:	f997 3017 	ldrsb.w	r3, [r7, #23]
 8015d9e:	e02b      	b.n	8015df8 <netconn_recv_data+0x1a4>
    }
    len = ((struct pbuf *)buf)->tot_len;
 8015da0:	69bb      	ldr	r3, [r7, #24]
 8015da2:	891b      	ldrh	r3, [r3, #8]
 8015da4:	84fb      	strh	r3, [r7, #38]	@ 0x26
 8015da6:	e00d      	b.n	8015dc4 <netconn_recv_data+0x170>
#if LWIP_TCP && (LWIP_UDP || LWIP_RAW)
  else
#endif /* LWIP_TCP && (LWIP_UDP || LWIP_RAW) */
#if (LWIP_UDP || LWIP_RAW)
  {
    LWIP_ASSERT("buf != NULL", buf != NULL);
 8015da8:	69bb      	ldr	r3, [r7, #24]
 8015daa:	2b00      	cmp	r3, #0
 8015dac:	d106      	bne.n	8015dbc <netconn_recv_data+0x168>
 8015dae:	4b14      	ldr	r3, [pc, #80]	@ (8015e00 <netconn_recv_data+0x1ac>)
 8015db0:	f240 2291 	movw	r2, #657	@ 0x291
 8015db4:	4916      	ldr	r1, [pc, #88]	@ (8015e10 <netconn_recv_data+0x1bc>)
 8015db6:	4814      	ldr	r0, [pc, #80]	@ (8015e08 <netconn_recv_data+0x1b4>)
 8015db8:	f014 fa00 	bl	802a1bc <iprintf>
    len = netbuf_len((struct netbuf *)buf);
 8015dbc:	69bb      	ldr	r3, [r7, #24]
 8015dbe:	681b      	ldr	r3, [r3, #0]
 8015dc0:	891b      	ldrh	r3, [r3, #8]
 8015dc2:	84fb      	strh	r3, [r7, #38]	@ 0x26
  }
#endif /* (LWIP_UDP || LWIP_RAW) */

#if LWIP_SO_RCVBUF
  SYS_ARCH_DEC(conn->recv_avail, len);
 8015dc4:	f010 ff64 	bl	8026c90 <sys_arch_protect>
 8015dc8:	6238      	str	r0, [r7, #32]
 8015dca:	68fb      	ldr	r3, [r7, #12]
 8015dcc:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 8015dce:	8cfb      	ldrh	r3, [r7, #38]	@ 0x26
 8015dd0:	1ad2      	subs	r2, r2, r3
 8015dd2:	68fb      	ldr	r3, [r7, #12]
 8015dd4:	625a      	str	r2, [r3, #36]	@ 0x24
 8015dd6:	6a38      	ldr	r0, [r7, #32]
 8015dd8:	f010 ff68 	bl	8026cac <sys_arch_unprotect>
#endif /* LWIP_SO_RCVBUF */
  /* Register event with callback */
  API_EVENT(conn, NETCONN_EVT_RCVMINUS, len);
 8015ddc:	68fb      	ldr	r3, [r7, #12]
 8015dde:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8015de0:	2b00      	cmp	r3, #0
 8015de2:	d005      	beq.n	8015df0 <netconn_recv_data+0x19c>
 8015de4:	68fb      	ldr	r3, [r7, #12]
 8015de6:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8015de8:	8cfa      	ldrh	r2, [r7, #38]	@ 0x26
 8015dea:	2101      	movs	r1, #1
 8015dec:	68f8      	ldr	r0, [r7, #12]
 8015dee:	4798      	blx	r3

  LWIP_DEBUGF(API_LIB_DEBUG, ("netconn_recv_data: received %p, len=%"U16_F"\n", buf, len));

  *new_buf = buf;
 8015df0:	69ba      	ldr	r2, [r7, #24]
 8015df2:	68bb      	ldr	r3, [r7, #8]
 8015df4:	601a      	str	r2, [r3, #0]
  /* don't set conn->last_err: it's only ERR_OK, anyway */
  return ERR_OK;
 8015df6:	2300      	movs	r3, #0
}
 8015df8:	4618      	mov	r0, r3
 8015dfa:	3728      	adds	r7, #40	@ 0x28
 8015dfc:	46bd      	mov	sp, r7
 8015dfe:	bd80      	pop	{r7, pc}
 8015e00:	0802d418 	.word	0x0802d418
 8015e04:	0802d630 	.word	0x0802d630
 8015e08:	0802d470 	.word	0x0802d470
 8015e0c:	0802d650 	.word	0x0802d650
 8015e10:	0802d66c 	.word	0x0802d66c

08015e14 <netconn_tcp_recvd_msg>:

#if LWIP_TCP
static err_t
netconn_tcp_recvd_msg(struct netconn *conn, size_t len, struct api_msg *msg)
{
 8015e14:	b580      	push	{r7, lr}
 8015e16:	b084      	sub	sp, #16
 8015e18:	af00      	add	r7, sp, #0
 8015e1a:	60f8      	str	r0, [r7, #12]
 8015e1c:	60b9      	str	r1, [r7, #8]
 8015e1e:	607a      	str	r2, [r7, #4]
  LWIP_ERROR("netconn_recv_tcp_pbuf: invalid conn", (conn != NULL) &&
 8015e20:	68fb      	ldr	r3, [r7, #12]
 8015e22:	2b00      	cmp	r3, #0
 8015e24:	d005      	beq.n	8015e32 <netconn_tcp_recvd_msg+0x1e>
 8015e26:	68fb      	ldr	r3, [r7, #12]
 8015e28:	781b      	ldrb	r3, [r3, #0]
 8015e2a:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8015e2e:	2b10      	cmp	r3, #16
 8015e30:	d009      	beq.n	8015e46 <netconn_tcp_recvd_msg+0x32>
 8015e32:	4b0c      	ldr	r3, [pc, #48]	@ (8015e64 <netconn_tcp_recvd_msg+0x50>)
 8015e34:	f240 22a7 	movw	r2, #679	@ 0x2a7
 8015e38:	490b      	ldr	r1, [pc, #44]	@ (8015e68 <netconn_tcp_recvd_msg+0x54>)
 8015e3a:	480c      	ldr	r0, [pc, #48]	@ (8015e6c <netconn_tcp_recvd_msg+0x58>)
 8015e3c:	f014 f9be 	bl	802a1bc <iprintf>
 8015e40:	f06f 030f 	mvn.w	r3, #15
 8015e44:	e00a      	b.n	8015e5c <netconn_tcp_recvd_msg+0x48>
             NETCONNTYPE_GROUP(netconn_type(conn)) == NETCONN_TCP, return ERR_ARG;);

  msg->conn = conn;
 8015e46:	687b      	ldr	r3, [r7, #4]
 8015e48:	68fa      	ldr	r2, [r7, #12]
 8015e4a:	601a      	str	r2, [r3, #0]
  msg->msg.r.len = len;
 8015e4c:	687b      	ldr	r3, [r7, #4]
 8015e4e:	68ba      	ldr	r2, [r7, #8]
 8015e50:	609a      	str	r2, [r3, #8]

  return netconn_apimsg(lwip_netconn_do_recv, msg);
 8015e52:	6879      	ldr	r1, [r7, #4]
 8015e54:	4806      	ldr	r0, [pc, #24]	@ (8015e70 <netconn_tcp_recvd_msg+0x5c>)
 8015e56:	f7ff fd6f 	bl	8015938 <netconn_apimsg>
 8015e5a:	4603      	mov	r3, r0
}
 8015e5c:	4618      	mov	r0, r3
 8015e5e:	3710      	adds	r7, #16
 8015e60:	46bd      	mov	sp, r7
 8015e62:	bd80      	pop	{r7, pc}
 8015e64:	0802d418 	.word	0x0802d418
 8015e68:	0802d678 	.word	0x0802d678
 8015e6c:	0802d470 	.word	0x0802d470
 8015e70:	08017587 	.word	0x08017587

08015e74 <netconn_tcp_recvd>:

err_t
netconn_tcp_recvd(struct netconn *conn, size_t len)
{
 8015e74:	b580      	push	{r7, lr}
 8015e76:	b08c      	sub	sp, #48	@ 0x30
 8015e78:	af00      	add	r7, sp, #0
 8015e7a:	6078      	str	r0, [r7, #4]
 8015e7c:	6039      	str	r1, [r7, #0]
  err_t err;
  API_MSG_VAR_DECLARE(msg);
  LWIP_ERROR("netconn_recv_tcp_pbuf: invalid conn", (conn != NULL) &&
 8015e7e:	687b      	ldr	r3, [r7, #4]
 8015e80:	2b00      	cmp	r3, #0
 8015e82:	d005      	beq.n	8015e90 <netconn_tcp_recvd+0x1c>
 8015e84:	687b      	ldr	r3, [r7, #4]
 8015e86:	781b      	ldrb	r3, [r3, #0]
 8015e88:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8015e8c:	2b10      	cmp	r3, #16
 8015e8e:	d009      	beq.n	8015ea4 <netconn_tcp_recvd+0x30>
 8015e90:	4b0c      	ldr	r3, [pc, #48]	@ (8015ec4 <netconn_tcp_recvd+0x50>)
 8015e92:	f240 22b5 	movw	r2, #693	@ 0x2b5
 8015e96:	490c      	ldr	r1, [pc, #48]	@ (8015ec8 <netconn_tcp_recvd+0x54>)
 8015e98:	480c      	ldr	r0, [pc, #48]	@ (8015ecc <netconn_tcp_recvd+0x58>)
 8015e9a:	f014 f98f 	bl	802a1bc <iprintf>
 8015e9e:	f06f 030f 	mvn.w	r3, #15
 8015ea2:	e00b      	b.n	8015ebc <netconn_tcp_recvd+0x48>
             NETCONNTYPE_GROUP(netconn_type(conn)) == NETCONN_TCP, return ERR_ARG;);

  API_MSG_VAR_ALLOC(msg);
  err = netconn_tcp_recvd_msg(conn, len, &API_VAR_REF(msg));
 8015ea4:	f107 030c 	add.w	r3, r7, #12
 8015ea8:	461a      	mov	r2, r3
 8015eaa:	6839      	ldr	r1, [r7, #0]
 8015eac:	6878      	ldr	r0, [r7, #4]
 8015eae:	f7ff ffb1 	bl	8015e14 <netconn_tcp_recvd_msg>
 8015eb2:	4603      	mov	r3, r0
 8015eb4:	f887 302f 	strb.w	r3, [r7, #47]	@ 0x2f
  API_MSG_VAR_FREE(msg);
  return err;
 8015eb8:	f997 302f 	ldrsb.w	r3, [r7, #47]	@ 0x2f
}
 8015ebc:	4618      	mov	r0, r3
 8015ebe:	3730      	adds	r7, #48	@ 0x30
 8015ec0:	46bd      	mov	sp, r7
 8015ec2:	bd80      	pop	{r7, pc}
 8015ec4:	0802d418 	.word	0x0802d418
 8015ec8:	0802d678 	.word	0x0802d678
 8015ecc:	0802d470 	.word	0x0802d470

08015ed0 <netconn_recv_data_tcp>:

static err_t
netconn_recv_data_tcp(struct netconn *conn, struct pbuf **new_buf, u8_t apiflags)
{
 8015ed0:	b580      	push	{r7, lr}
 8015ed2:	b090      	sub	sp, #64	@ 0x40
 8015ed4:	af00      	add	r7, sp, #0
 8015ed6:	60f8      	str	r0, [r7, #12]
 8015ed8:	60b9      	str	r1, [r7, #8]
 8015eda:	4613      	mov	r3, r2
 8015edc:	71fb      	strb	r3, [r7, #7]
  API_MSG_VAR_DECLARE(msg);
#if LWIP_MPU_COMPATIBLE
  msg = NULL;
#endif

  if (!NETCONN_RECVMBOX_WAITABLE(conn)) {
 8015ede:	68fb      	ldr	r3, [r7, #12]
 8015ee0:	3310      	adds	r3, #16
 8015ee2:	4618      	mov	r0, r3
 8015ee4:	f010 fdca 	bl	8026a7c <sys_mbox_valid>
 8015ee8:	4603      	mov	r3, r0
 8015eea:	2b00      	cmp	r3, #0
 8015eec:	d102      	bne.n	8015ef4 <netconn_recv_data_tcp+0x24>
    /* This only happens when calling this function more than once *after* receiving FIN */
    return ERR_CONN;
 8015eee:	f06f 030a 	mvn.w	r3, #10
 8015ef2:	e072      	b.n	8015fda <netconn_recv_data_tcp+0x10a>
  }
  if (netconn_is_flag_set(conn, NETCONN_FIN_RX_PENDING)) {
 8015ef4:	68fb      	ldr	r3, [r7, #12]
 8015ef6:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8015efa:	b25b      	sxtb	r3, r3
 8015efc:	2b00      	cmp	r3, #0
 8015efe:	da09      	bge.n	8015f14 <netconn_recv_data_tcp+0x44>
    netconn_clear_flags(conn, NETCONN_FIN_RX_PENDING);
 8015f00:	68fb      	ldr	r3, [r7, #12]
 8015f02:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8015f06:	f003 037f 	and.w	r3, r3, #127	@ 0x7f
 8015f0a:	b2da      	uxtb	r2, r3
 8015f0c:	68fb      	ldr	r3, [r7, #12]
 8015f0e:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
    goto handle_fin;
 8015f12:	e03b      	b.n	8015f8c <netconn_recv_data_tcp+0xbc>
    /* need to allocate API message here so empty message pool does not result in event loss
      * see bug #47512: MPU_COMPATIBLE may fail on empty pool */
    API_MSG_VAR_ALLOC(msg);
  }

  err = netconn_recv_data(conn, (void **)new_buf, apiflags);
 8015f14:	79fb      	ldrb	r3, [r7, #7]
 8015f16:	461a      	mov	r2, r3
 8015f18:	68b9      	ldr	r1, [r7, #8]
 8015f1a:	68f8      	ldr	r0, [r7, #12]
 8015f1c:	f7ff fe9a 	bl	8015c54 <netconn_recv_data>
 8015f20:	4603      	mov	r3, r0
 8015f22:	f887 303f 	strb.w	r3, [r7, #63]	@ 0x3f
  if (err != ERR_OK) {
 8015f26:	f997 303f 	ldrsb.w	r3, [r7, #63]	@ 0x3f
 8015f2a:	2b00      	cmp	r3, #0
 8015f2c:	d002      	beq.n	8015f34 <netconn_recv_data_tcp+0x64>
    if (!(apiflags & NETCONN_NOAUTORCVD)) {
      API_MSG_VAR_FREE(msg);
    }
    return err;
 8015f2e:	f997 303f 	ldrsb.w	r3, [r7, #63]	@ 0x3f
 8015f32:	e052      	b.n	8015fda <netconn_recv_data_tcp+0x10a>
  }
  buf = *new_buf;
 8015f34:	68bb      	ldr	r3, [r7, #8]
 8015f36:	681b      	ldr	r3, [r3, #0]
 8015f38:	63bb      	str	r3, [r7, #56]	@ 0x38
  if (!(apiflags & NETCONN_NOAUTORCVD)) {
 8015f3a:	79fb      	ldrb	r3, [r7, #7]
 8015f3c:	f003 0308 	and.w	r3, r3, #8
 8015f40:	2b00      	cmp	r3, #0
 8015f42:	d10e      	bne.n	8015f62 <netconn_recv_data_tcp+0x92>
    /* Let the stack know that we have taken the data. */
    u16_t len = buf ? buf->tot_len : 1;
 8015f44:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8015f46:	2b00      	cmp	r3, #0
 8015f48:	d002      	beq.n	8015f50 <netconn_recv_data_tcp+0x80>
 8015f4a:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8015f4c:	891b      	ldrh	r3, [r3, #8]
 8015f4e:	e000      	b.n	8015f52 <netconn_recv_data_tcp+0x82>
 8015f50:	2301      	movs	r3, #1
 8015f52:	86fb      	strh	r3, [r7, #54]	@ 0x36
    /* don't care for the return value of lwip_netconn_do_recv */
    /* @todo: this should really be fixed, e.g. by retrying in poll on error */
    netconn_tcp_recvd_msg(conn, len,  &API_VAR_REF(msg));
 8015f54:	8efb      	ldrh	r3, [r7, #54]	@ 0x36
 8015f56:	f107 0214 	add.w	r2, r7, #20
 8015f5a:	4619      	mov	r1, r3
 8015f5c:	68f8      	ldr	r0, [r7, #12]
 8015f5e:	f7ff ff59 	bl	8015e14 <netconn_tcp_recvd_msg>
    API_MSG_VAR_FREE(msg);
  }

  /* If we are closed, we indicate that we no longer wish to use the socket */
  if (buf == NULL) {
 8015f62:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8015f64:	2b00      	cmp	r3, #0
 8015f66:	d136      	bne.n	8015fd6 <netconn_recv_data_tcp+0x106>
    if (apiflags & NETCONN_NOFIN) {
 8015f68:	79fb      	ldrb	r3, [r7, #7]
 8015f6a:	f003 0310 	and.w	r3, r3, #16
 8015f6e:	2b00      	cmp	r3, #0
 8015f70:	d00b      	beq.n	8015f8a <netconn_recv_data_tcp+0xba>
      /* received a FIN but the caller cannot handle it right now:
         re-enqueue it and return "no data" */
      netconn_set_flags(conn, NETCONN_FIN_RX_PENDING);
 8015f72:	68fb      	ldr	r3, [r7, #12]
 8015f74:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8015f78:	f063 037f 	orn	r3, r3, #127	@ 0x7f
 8015f7c:	b2da      	uxtb	r2, r3
 8015f7e:	68fb      	ldr	r3, [r7, #12]
 8015f80:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
      return ERR_WOULDBLOCK;
 8015f84:	f06f 0306 	mvn.w	r3, #6
 8015f88:	e027      	b.n	8015fda <netconn_recv_data_tcp+0x10a>
    } else {
handle_fin:
 8015f8a:	bf00      	nop
      API_EVENT(conn, NETCONN_EVT_RCVMINUS, 0);
 8015f8c:	68fb      	ldr	r3, [r7, #12]
 8015f8e:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8015f90:	2b00      	cmp	r3, #0
 8015f92:	d005      	beq.n	8015fa0 <netconn_recv_data_tcp+0xd0>
 8015f94:	68fb      	ldr	r3, [r7, #12]
 8015f96:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8015f98:	2200      	movs	r2, #0
 8015f9a:	2101      	movs	r1, #1
 8015f9c:	68f8      	ldr	r0, [r7, #12]
 8015f9e:	4798      	blx	r3
      if (conn->pcb.ip == NULL) {
 8015fa0:	68fb      	ldr	r3, [r7, #12]
 8015fa2:	685b      	ldr	r3, [r3, #4]
 8015fa4:	2b00      	cmp	r3, #0
 8015fa6:	d10f      	bne.n	8015fc8 <netconn_recv_data_tcp+0xf8>
        /* race condition: RST during recv */
        err = netconn_err(conn);
 8015fa8:	68f8      	ldr	r0, [r7, #12]
 8015faa:	f000 f9a3 	bl	80162f4 <netconn_err>
 8015fae:	4603      	mov	r3, r0
 8015fb0:	f887 303f 	strb.w	r3, [r7, #63]	@ 0x3f
        if (err != ERR_OK) {
 8015fb4:	f997 303f 	ldrsb.w	r3, [r7, #63]	@ 0x3f
 8015fb8:	2b00      	cmp	r3, #0
 8015fba:	d002      	beq.n	8015fc2 <netconn_recv_data_tcp+0xf2>
          return err;
 8015fbc:	f997 303f 	ldrsb.w	r3, [r7, #63]	@ 0x3f
 8015fc0:	e00b      	b.n	8015fda <netconn_recv_data_tcp+0x10a>
        }
        return ERR_RST;
 8015fc2:	f06f 030d 	mvn.w	r3, #13
 8015fc6:	e008      	b.n	8015fda <netconn_recv_data_tcp+0x10a>
      }
      /* RX side is closed, so deallocate the recvmbox */
      netconn_close_shutdown(conn, NETCONN_SHUT_RD);
 8015fc8:	2101      	movs	r1, #1
 8015fca:	68f8      	ldr	r0, [r7, #12]
 8015fcc:	f000 f962 	bl	8016294 <netconn_close_shutdown>
      /* Don' store ERR_CLSD as conn->err since we are only half-closed */
      return ERR_CLSD;
 8015fd0:	f06f 030e 	mvn.w	r3, #14
 8015fd4:	e001      	b.n	8015fda <netconn_recv_data_tcp+0x10a>
    }
  }
  return err;
 8015fd6:	f997 303f 	ldrsb.w	r3, [r7, #63]	@ 0x3f
}
 8015fda:	4618      	mov	r0, r3
 8015fdc:	3740      	adds	r7, #64	@ 0x40
 8015fde:	46bd      	mov	sp, r7
 8015fe0:	bd80      	pop	{r7, pc}
	...

08015fe4 <netconn_recv_tcp_pbuf_flags>:
 *                memory error or another error, @see netconn_recv_data)
 *         ERR_ARG if conn is not a TCP netconn
 */
err_t
netconn_recv_tcp_pbuf_flags(struct netconn *conn, struct pbuf **new_buf, u8_t apiflags)
{
 8015fe4:	b580      	push	{r7, lr}
 8015fe6:	b084      	sub	sp, #16
 8015fe8:	af00      	add	r7, sp, #0
 8015fea:	60f8      	str	r0, [r7, #12]
 8015fec:	60b9      	str	r1, [r7, #8]
 8015fee:	4613      	mov	r3, r2
 8015ff0:	71fb      	strb	r3, [r7, #7]
  LWIP_ERROR("netconn_recv_tcp_pbuf: invalid conn", (conn != NULL) &&
 8015ff2:	68fb      	ldr	r3, [r7, #12]
 8015ff4:	2b00      	cmp	r3, #0
 8015ff6:	d005      	beq.n	8016004 <netconn_recv_tcp_pbuf_flags+0x20>
 8015ff8:	68fb      	ldr	r3, [r7, #12]
 8015ffa:	781b      	ldrb	r3, [r3, #0]
 8015ffc:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8016000:	2b10      	cmp	r3, #16
 8016002:	d009      	beq.n	8016018 <netconn_recv_tcp_pbuf_flags+0x34>
 8016004:	4b0a      	ldr	r3, [pc, #40]	@ (8016030 <netconn_recv_tcp_pbuf_flags+0x4c>)
 8016006:	f240 3225 	movw	r2, #805	@ 0x325
 801600a:	490a      	ldr	r1, [pc, #40]	@ (8016034 <netconn_recv_tcp_pbuf_flags+0x50>)
 801600c:	480a      	ldr	r0, [pc, #40]	@ (8016038 <netconn_recv_tcp_pbuf_flags+0x54>)
 801600e:	f014 f8d5 	bl	802a1bc <iprintf>
 8016012:	f06f 030f 	mvn.w	r3, #15
 8016016:	e006      	b.n	8016026 <netconn_recv_tcp_pbuf_flags+0x42>
             NETCONNTYPE_GROUP(netconn_type(conn)) == NETCONN_TCP, return ERR_ARG;);

  return netconn_recv_data_tcp(conn, new_buf, apiflags);
 8016018:	79fb      	ldrb	r3, [r7, #7]
 801601a:	461a      	mov	r2, r3
 801601c:	68b9      	ldr	r1, [r7, #8]
 801601e:	68f8      	ldr	r0, [r7, #12]
 8016020:	f7ff ff56 	bl	8015ed0 <netconn_recv_data_tcp>
 8016024:	4603      	mov	r3, r0
}
 8016026:	4618      	mov	r0, r3
 8016028:	3710      	adds	r7, #16
 801602a:	46bd      	mov	sp, r7
 801602c:	bd80      	pop	{r7, pc}
 801602e:	bf00      	nop
 8016030:	0802d418 	.word	0x0802d418
 8016034:	0802d678 	.word	0x0802d678
 8016038:	0802d470 	.word	0x0802d470

0801603c <netconn_recv_udp_raw_netbuf_flags>:
 *                memory error or another error)
 *         ERR_ARG if conn is not a UDP/RAW netconn
 */
err_t
netconn_recv_udp_raw_netbuf_flags(struct netconn *conn, struct netbuf **new_buf, u8_t apiflags)
{
 801603c:	b580      	push	{r7, lr}
 801603e:	b084      	sub	sp, #16
 8016040:	af00      	add	r7, sp, #0
 8016042:	60f8      	str	r0, [r7, #12]
 8016044:	60b9      	str	r1, [r7, #8]
 8016046:	4613      	mov	r3, r2
 8016048:	71fb      	strb	r3, [r7, #7]
  LWIP_ERROR("netconn_recv_udp_raw_netbuf: invalid conn", (conn != NULL) &&
 801604a:	68fb      	ldr	r3, [r7, #12]
 801604c:	2b00      	cmp	r3, #0
 801604e:	d005      	beq.n	801605c <netconn_recv_udp_raw_netbuf_flags+0x20>
 8016050:	68fb      	ldr	r3, [r7, #12]
 8016052:	781b      	ldrb	r3, [r3, #0]
 8016054:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8016058:	2b10      	cmp	r3, #16
 801605a:	d109      	bne.n	8016070 <netconn_recv_udp_raw_netbuf_flags+0x34>
 801605c:	4b0a      	ldr	r3, [pc, #40]	@ (8016088 <netconn_recv_udp_raw_netbuf_flags+0x4c>)
 801605e:	f44f 7253 	mov.w	r2, #844	@ 0x34c
 8016062:	490a      	ldr	r1, [pc, #40]	@ (801608c <netconn_recv_udp_raw_netbuf_flags+0x50>)
 8016064:	480a      	ldr	r0, [pc, #40]	@ (8016090 <netconn_recv_udp_raw_netbuf_flags+0x54>)
 8016066:	f014 f8a9 	bl	802a1bc <iprintf>
 801606a:	f06f 030f 	mvn.w	r3, #15
 801606e:	e006      	b.n	801607e <netconn_recv_udp_raw_netbuf_flags+0x42>
             NETCONNTYPE_GROUP(netconn_type(conn)) != NETCONN_TCP, return ERR_ARG;);

  return netconn_recv_data(conn, (void **)new_buf, apiflags);
 8016070:	79fb      	ldrb	r3, [r7, #7]
 8016072:	461a      	mov	r2, r3
 8016074:	68b9      	ldr	r1, [r7, #8]
 8016076:	68f8      	ldr	r0, [r7, #12]
 8016078:	f7ff fdec 	bl	8015c54 <netconn_recv_data>
 801607c:	4603      	mov	r3, r0
}
 801607e:	4618      	mov	r0, r3
 8016080:	3710      	adds	r7, #16
 8016082:	46bd      	mov	sp, r7
 8016084:	bd80      	pop	{r7, pc}
 8016086:	bf00      	nop
 8016088:	0802d418 	.word	0x0802d418
 801608c:	0802d69c 	.word	0x0802d69c
 8016090:	0802d470 	.word	0x0802d470

08016094 <netconn_send>:
 * @param buf a netbuf containing the data to send
 * @return ERR_OK if data was sent, any other err_t on error
 */
err_t
netconn_send(struct netconn *conn, struct netbuf *buf)
{
 8016094:	b580      	push	{r7, lr}
 8016096:	b08c      	sub	sp, #48	@ 0x30
 8016098:	af00      	add	r7, sp, #0
 801609a:	6078      	str	r0, [r7, #4]
 801609c:	6039      	str	r1, [r7, #0]
  API_MSG_VAR_DECLARE(msg);
  err_t err;

  LWIP_ERROR("netconn_send: invalid conn",  (conn != NULL), return ERR_ARG;);
 801609e:	687b      	ldr	r3, [r7, #4]
 80160a0:	2b00      	cmp	r3, #0
 80160a2:	d109      	bne.n	80160b8 <netconn_send+0x24>
 80160a4:	4b0e      	ldr	r3, [pc, #56]	@ (80160e0 <netconn_send+0x4c>)
 80160a6:	f240 32b2 	movw	r2, #946	@ 0x3b2
 80160aa:	490e      	ldr	r1, [pc, #56]	@ (80160e4 <netconn_send+0x50>)
 80160ac:	480e      	ldr	r0, [pc, #56]	@ (80160e8 <netconn_send+0x54>)
 80160ae:	f014 f885 	bl	802a1bc <iprintf>
 80160b2:	f06f 030f 	mvn.w	r3, #15
 80160b6:	e00e      	b.n	80160d6 <netconn_send+0x42>

  LWIP_DEBUGF(API_LIB_DEBUG, ("netconn_send: sending %"U16_F" bytes\n", buf->p->tot_len));

  API_MSG_VAR_ALLOC(msg);
  API_MSG_VAR_REF(msg).conn = conn;
 80160b8:	687b      	ldr	r3, [r7, #4]
 80160ba:	60fb      	str	r3, [r7, #12]
  API_MSG_VAR_REF(msg).msg.b = buf;
 80160bc:	683b      	ldr	r3, [r7, #0]
 80160be:	617b      	str	r3, [r7, #20]
  err = netconn_apimsg(lwip_netconn_do_send, &API_MSG_VAR_REF(msg));
 80160c0:	f107 030c 	add.w	r3, r7, #12
 80160c4:	4619      	mov	r1, r3
 80160c6:	4809      	ldr	r0, [pc, #36]	@ (80160ec <netconn_send+0x58>)
 80160c8:	f7ff fc36 	bl	8015938 <netconn_apimsg>
 80160cc:	4603      	mov	r3, r0
 80160ce:	f887 302f 	strb.w	r3, [r7, #47]	@ 0x2f
  API_MSG_VAR_FREE(msg);

  return err;
 80160d2:	f997 302f 	ldrsb.w	r3, [r7, #47]	@ 0x2f
}
 80160d6:	4618      	mov	r0, r3
 80160d8:	3730      	adds	r7, #48	@ 0x30
 80160da:	46bd      	mov	sp, r7
 80160dc:	bd80      	pop	{r7, pc}
 80160de:	bf00      	nop
 80160e0:	0802d418 	.word	0x0802d418
 80160e4:	0802d6d4 	.word	0x0802d6d4
 80160e8:	0802d470 	.word	0x0802d470
 80160ec:	080174ed 	.word	0x080174ed

080160f0 <netconn_write_partly>:
 * @return ERR_OK if data was sent, any other err_t on error
 */
err_t
netconn_write_partly(struct netconn *conn, const void *dataptr, size_t size,
                     u8_t apiflags, size_t *bytes_written)
{
 80160f0:	b580      	push	{r7, lr}
 80160f2:	b088      	sub	sp, #32
 80160f4:	af02      	add	r7, sp, #8
 80160f6:	60f8      	str	r0, [r7, #12]
 80160f8:	60b9      	str	r1, [r7, #8]
 80160fa:	607a      	str	r2, [r7, #4]
 80160fc:	70fb      	strb	r3, [r7, #3]
  struct netvector vector;
  vector.ptr = dataptr;
 80160fe:	68bb      	ldr	r3, [r7, #8]
 8016100:	613b      	str	r3, [r7, #16]
  vector.len = size;
 8016102:	687b      	ldr	r3, [r7, #4]
 8016104:	617b      	str	r3, [r7, #20]
  return netconn_write_vectors_partly(conn, &vector, 1, apiflags, bytes_written);
 8016106:	78fa      	ldrb	r2, [r7, #3]
 8016108:	f107 0110 	add.w	r1, r7, #16
 801610c:	6a3b      	ldr	r3, [r7, #32]
 801610e:	9300      	str	r3, [sp, #0]
 8016110:	4613      	mov	r3, r2
 8016112:	2201      	movs	r2, #1
 8016114:	68f8      	ldr	r0, [r7, #12]
 8016116:	f000 f805 	bl	8016124 <netconn_write_vectors_partly>
 801611a:	4603      	mov	r3, r0
}
 801611c:	4618      	mov	r0, r3
 801611e:	3718      	adds	r7, #24
 8016120:	46bd      	mov	sp, r7
 8016122:	bd80      	pop	{r7, pc}

08016124 <netconn_write_vectors_partly>:
 * @return ERR_OK if data was sent, any other err_t on error
 */
err_t
netconn_write_vectors_partly(struct netconn *conn, struct netvector *vectors, u16_t vectorcnt,
                             u8_t apiflags, size_t *bytes_written)
{
 8016124:	b580      	push	{r7, lr}
 8016126:	b092      	sub	sp, #72	@ 0x48
 8016128:	af00      	add	r7, sp, #0
 801612a:	60f8      	str	r0, [r7, #12]
 801612c:	60b9      	str	r1, [r7, #8]
 801612e:	4611      	mov	r1, r2
 8016130:	461a      	mov	r2, r3
 8016132:	460b      	mov	r3, r1
 8016134:	80fb      	strh	r3, [r7, #6]
 8016136:	4613      	mov	r3, r2
 8016138:	717b      	strb	r3, [r7, #5]
  err_t err;
  u8_t dontblock;
  size_t size;
  int i;

  LWIP_ERROR("netconn_write: invalid conn",  (conn != NULL), return ERR_ARG;);
 801613a:	68fb      	ldr	r3, [r7, #12]
 801613c:	2b00      	cmp	r3, #0
 801613e:	d109      	bne.n	8016154 <netconn_write_vectors_partly+0x30>
 8016140:	4b4e      	ldr	r3, [pc, #312]	@ (801627c <netconn_write_vectors_partly+0x158>)
 8016142:	f240 32ee 	movw	r2, #1006	@ 0x3ee
 8016146:	494e      	ldr	r1, [pc, #312]	@ (8016280 <netconn_write_vectors_partly+0x15c>)
 8016148:	484e      	ldr	r0, [pc, #312]	@ (8016284 <netconn_write_vectors_partly+0x160>)
 801614a:	f014 f837 	bl	802a1bc <iprintf>
 801614e:	f06f 030f 	mvn.w	r3, #15
 8016152:	e08f      	b.n	8016274 <netconn_write_vectors_partly+0x150>
  LWIP_ERROR("netconn_write: invalid conn->type",  (NETCONNTYPE_GROUP(conn->type) == NETCONN_TCP), return ERR_VAL;);
 8016154:	68fb      	ldr	r3, [r7, #12]
 8016156:	781b      	ldrb	r3, [r3, #0]
 8016158:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 801615c:	2b10      	cmp	r3, #16
 801615e:	d009      	beq.n	8016174 <netconn_write_vectors_partly+0x50>
 8016160:	4b46      	ldr	r3, [pc, #280]	@ (801627c <netconn_write_vectors_partly+0x158>)
 8016162:	f240 32ef 	movw	r2, #1007	@ 0x3ef
 8016166:	4948      	ldr	r1, [pc, #288]	@ (8016288 <netconn_write_vectors_partly+0x164>)
 8016168:	4846      	ldr	r0, [pc, #280]	@ (8016284 <netconn_write_vectors_partly+0x160>)
 801616a:	f014 f827 	bl	802a1bc <iprintf>
 801616e:	f06f 0305 	mvn.w	r3, #5
 8016172:	e07f      	b.n	8016274 <netconn_write_vectors_partly+0x150>
  dontblock = netconn_is_nonblocking(conn) || (apiflags & NETCONN_DONTBLOCK);
 8016174:	68fb      	ldr	r3, [r7, #12]
 8016176:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 801617a:	f003 0302 	and.w	r3, r3, #2
 801617e:	2b00      	cmp	r3, #0
 8016180:	d104      	bne.n	801618c <netconn_write_vectors_partly+0x68>
 8016182:	797b      	ldrb	r3, [r7, #5]
 8016184:	f003 0304 	and.w	r3, r3, #4
 8016188:	2b00      	cmp	r3, #0
 801618a:	d001      	beq.n	8016190 <netconn_write_vectors_partly+0x6c>
 801618c:	2301      	movs	r3, #1
 801618e:	e000      	b.n	8016192 <netconn_write_vectors_partly+0x6e>
 8016190:	2300      	movs	r3, #0
 8016192:	f887 303f 	strb.w	r3, [r7, #63]	@ 0x3f
#if LWIP_SO_SNDTIMEO
  if (conn->send_timeout != 0) {
    dontblock = 1;
  }
#endif /* LWIP_SO_SNDTIMEO */
  if (dontblock && !bytes_written) {
 8016196:	f897 303f 	ldrb.w	r3, [r7, #63]	@ 0x3f
 801619a:	2b00      	cmp	r3, #0
 801619c:	d005      	beq.n	80161aa <netconn_write_vectors_partly+0x86>
 801619e:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 80161a0:	2b00      	cmp	r3, #0
 80161a2:	d102      	bne.n	80161aa <netconn_write_vectors_partly+0x86>
    /* This implies netconn_write() cannot be used for non-blocking send, since
       it has no way to return the number of bytes written. */
    return ERR_VAL;
 80161a4:	f06f 0305 	mvn.w	r3, #5
 80161a8:	e064      	b.n	8016274 <netconn_write_vectors_partly+0x150>
  }

  /* sum up the total size */
  size = 0;
 80161aa:	2300      	movs	r3, #0
 80161ac:	647b      	str	r3, [r7, #68]	@ 0x44
  for (i = 0; i < vectorcnt; i++) {
 80161ae:	2300      	movs	r3, #0
 80161b0:	643b      	str	r3, [r7, #64]	@ 0x40
 80161b2:	e015      	b.n	80161e0 <netconn_write_vectors_partly+0xbc>
    size += vectors[i].len;
 80161b4:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 80161b6:	00db      	lsls	r3, r3, #3
 80161b8:	68ba      	ldr	r2, [r7, #8]
 80161ba:	4413      	add	r3, r2
 80161bc:	685b      	ldr	r3, [r3, #4]
 80161be:	6c7a      	ldr	r2, [r7, #68]	@ 0x44
 80161c0:	4413      	add	r3, r2
 80161c2:	647b      	str	r3, [r7, #68]	@ 0x44
    if (size < vectors[i].len) {
 80161c4:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 80161c6:	00db      	lsls	r3, r3, #3
 80161c8:	68ba      	ldr	r2, [r7, #8]
 80161ca:	4413      	add	r3, r2
 80161cc:	685b      	ldr	r3, [r3, #4]
 80161ce:	6c7a      	ldr	r2, [r7, #68]	@ 0x44
 80161d0:	429a      	cmp	r2, r3
 80161d2:	d202      	bcs.n	80161da <netconn_write_vectors_partly+0xb6>
      /* overflow */
      return ERR_VAL;
 80161d4:	f06f 0305 	mvn.w	r3, #5
 80161d8:	e04c      	b.n	8016274 <netconn_write_vectors_partly+0x150>
  for (i = 0; i < vectorcnt; i++) {
 80161da:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 80161dc:	3301      	adds	r3, #1
 80161de:	643b      	str	r3, [r7, #64]	@ 0x40
 80161e0:	88fb      	ldrh	r3, [r7, #6]
 80161e2:	6c3a      	ldr	r2, [r7, #64]	@ 0x40
 80161e4:	429a      	cmp	r2, r3
 80161e6:	dbe5      	blt.n	80161b4 <netconn_write_vectors_partly+0x90>
    }
  }
  if (size == 0) {
 80161e8:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 80161ea:	2b00      	cmp	r3, #0
 80161ec:	d101      	bne.n	80161f2 <netconn_write_vectors_partly+0xce>
    return ERR_OK;
 80161ee:	2300      	movs	r3, #0
 80161f0:	e040      	b.n	8016274 <netconn_write_vectors_partly+0x150>
  } else if (size > SSIZE_MAX) {
 80161f2:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 80161f4:	2b00      	cmp	r3, #0
 80161f6:	da0a      	bge.n	801620e <netconn_write_vectors_partly+0xea>
    ssize_t limited;
    /* this is required by the socket layer (cannot send full size_t range) */
    if (!bytes_written) {
 80161f8:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 80161fa:	2b00      	cmp	r3, #0
 80161fc:	d102      	bne.n	8016204 <netconn_write_vectors_partly+0xe0>
      return ERR_VAL;
 80161fe:	f06f 0305 	mvn.w	r3, #5
 8016202:	e037      	b.n	8016274 <netconn_write_vectors_partly+0x150>
    }
    /* limit the amount of data to send */
    limited = SSIZE_MAX;
 8016204:	f06f 4300 	mvn.w	r3, #2147483648	@ 0x80000000
 8016208:	63bb      	str	r3, [r7, #56]	@ 0x38
    size = (size_t)limited;
 801620a:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801620c:	647b      	str	r3, [r7, #68]	@ 0x44
  }

  API_MSG_VAR_ALLOC(msg);
  /* non-blocking write sends as much  */
  API_MSG_VAR_REF(msg).conn = conn;
 801620e:	68fb      	ldr	r3, [r7, #12]
 8016210:	617b      	str	r3, [r7, #20]
  API_MSG_VAR_REF(msg).msg.w.vector = vectors;
 8016212:	68bb      	ldr	r3, [r7, #8]
 8016214:	61fb      	str	r3, [r7, #28]
  API_MSG_VAR_REF(msg).msg.w.vector_cnt = vectorcnt;
 8016216:	88fb      	ldrh	r3, [r7, #6]
 8016218:	843b      	strh	r3, [r7, #32]
  API_MSG_VAR_REF(msg).msg.w.vector_off = 0;
 801621a:	2300      	movs	r3, #0
 801621c:	627b      	str	r3, [r7, #36]	@ 0x24
  API_MSG_VAR_REF(msg).msg.w.apiflags = apiflags;
 801621e:	797b      	ldrb	r3, [r7, #5]
 8016220:	f887 3030 	strb.w	r3, [r7, #48]	@ 0x30
  API_MSG_VAR_REF(msg).msg.w.len = size;
 8016224:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 8016226:	62bb      	str	r3, [r7, #40]	@ 0x28
  API_MSG_VAR_REF(msg).msg.w.offset = 0;
 8016228:	2300      	movs	r3, #0
 801622a:	62fb      	str	r3, [r7, #44]	@ 0x2c
#endif /* LWIP_SO_SNDTIMEO */

  /* For locking the core: this _can_ be delayed on low memory/low send buffer,
     but if it is, this is done inside api_msg.c:do_write(), so we can use the
     non-blocking version here. */
  err = netconn_apimsg(lwip_netconn_do_write, &API_MSG_VAR_REF(msg));
 801622c:	f107 0314 	add.w	r3, r7, #20
 8016230:	4619      	mov	r1, r3
 8016232:	4816      	ldr	r0, [pc, #88]	@ (801628c <netconn_write_vectors_partly+0x168>)
 8016234:	f7ff fb80 	bl	8015938 <netconn_apimsg>
 8016238:	4603      	mov	r3, r0
 801623a:	f887 3037 	strb.w	r3, [r7, #55]	@ 0x37
  if (err == ERR_OK) {
 801623e:	f997 3037 	ldrsb.w	r3, [r7, #55]	@ 0x37
 8016242:	2b00      	cmp	r3, #0
 8016244:	d114      	bne.n	8016270 <netconn_write_vectors_partly+0x14c>
    if (bytes_written != NULL) {
 8016246:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 8016248:	2b00      	cmp	r3, #0
 801624a:	d002      	beq.n	8016252 <netconn_write_vectors_partly+0x12e>
      *bytes_written = API_MSG_VAR_REF(msg).msg.w.offset;
 801624c:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 801624e:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 8016250:	601a      	str	r2, [r3, #0]
    }
    /* for blocking, check all requested bytes were written, NOTE: send_timeout is
       treated as dontblock (see dontblock assignment above) */
    if (!dontblock) {
 8016252:	f897 303f 	ldrb.w	r3, [r7, #63]	@ 0x3f
 8016256:	2b00      	cmp	r3, #0
 8016258:	d10a      	bne.n	8016270 <netconn_write_vectors_partly+0x14c>
      LWIP_ASSERT("do_write failed to write all bytes", API_MSG_VAR_REF(msg).msg.w.offset == size);
 801625a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801625c:	6c7a      	ldr	r2, [r7, #68]	@ 0x44
 801625e:	429a      	cmp	r2, r3
 8016260:	d006      	beq.n	8016270 <netconn_write_vectors_partly+0x14c>
 8016262:	4b06      	ldr	r3, [pc, #24]	@ (801627c <netconn_write_vectors_partly+0x158>)
 8016264:	f44f 6286 	mov.w	r2, #1072	@ 0x430
 8016268:	4909      	ldr	r1, [pc, #36]	@ (8016290 <netconn_write_vectors_partly+0x16c>)
 801626a:	4806      	ldr	r0, [pc, #24]	@ (8016284 <netconn_write_vectors_partly+0x160>)
 801626c:	f013 ffa6 	bl	802a1bc <iprintf>
    }
  }
  API_MSG_VAR_FREE(msg);

  return err;
 8016270:	f997 3037 	ldrsb.w	r3, [r7, #55]	@ 0x37
}
 8016274:	4618      	mov	r0, r3
 8016276:	3748      	adds	r7, #72	@ 0x48
 8016278:	46bd      	mov	sp, r7
 801627a:	bd80      	pop	{r7, pc}
 801627c:	0802d418 	.word	0x0802d418
 8016280:	0802d6f0 	.word	0x0802d6f0
 8016284:	0802d470 	.word	0x0802d470
 8016288:	0802d70c 	.word	0x0802d70c
 801628c:	08017991 	.word	0x08017991
 8016290:	0802d730 	.word	0x0802d730

08016294 <netconn_close_shutdown>:
 * @param how fully close or only shutdown one side?
 * @return ERR_OK if the netconn was closed, any other err_t on error
 */
static err_t
netconn_close_shutdown(struct netconn *conn, u8_t how)
{
 8016294:	b580      	push	{r7, lr}
 8016296:	b08c      	sub	sp, #48	@ 0x30
 8016298:	af00      	add	r7, sp, #0
 801629a:	6078      	str	r0, [r7, #4]
 801629c:	460b      	mov	r3, r1
 801629e:	70fb      	strb	r3, [r7, #3]
  API_MSG_VAR_DECLARE(msg);
  err_t err;
  LWIP_UNUSED_ARG(how);

  LWIP_ERROR("netconn_close: invalid conn",  (conn != NULL), return ERR_ARG;);
 80162a0:	687b      	ldr	r3, [r7, #4]
 80162a2:	2b00      	cmp	r3, #0
 80162a4:	d109      	bne.n	80162ba <netconn_close_shutdown+0x26>
 80162a6:	4b0f      	ldr	r3, [pc, #60]	@ (80162e4 <netconn_close_shutdown+0x50>)
 80162a8:	f240 4247 	movw	r2, #1095	@ 0x447
 80162ac:	490e      	ldr	r1, [pc, #56]	@ (80162e8 <netconn_close_shutdown+0x54>)
 80162ae:	480f      	ldr	r0, [pc, #60]	@ (80162ec <netconn_close_shutdown+0x58>)
 80162b0:	f013 ff84 	bl	802a1bc <iprintf>
 80162b4:	f06f 030f 	mvn.w	r3, #15
 80162b8:	e010      	b.n	80162dc <netconn_close_shutdown+0x48>

  API_MSG_VAR_ALLOC(msg);
  API_MSG_VAR_REF(msg).conn = conn;
 80162ba:	687b      	ldr	r3, [r7, #4]
 80162bc:	60fb      	str	r3, [r7, #12]
#if LWIP_TCP
  /* shutting down both ends is the same as closing */
  API_MSG_VAR_REF(msg).msg.sd.shut = how;
 80162be:	78fb      	ldrb	r3, [r7, #3]
 80162c0:	753b      	strb	r3, [r7, #20]
#if LWIP_SO_SNDTIMEO || LWIP_SO_LINGER
  /* get the time we started, which is later compared to
     sys_now() + conn->send_timeout */
  API_MSG_VAR_REF(msg).msg.sd.time_started = sys_now();
#else /* LWIP_SO_SNDTIMEO || LWIP_SO_LINGER */
  API_MSG_VAR_REF(msg).msg.sd.polls_left =
 80162c2:	2329      	movs	r3, #41	@ 0x29
 80162c4:	757b      	strb	r3, [r7, #21]
    ((LWIP_TCP_CLOSE_TIMEOUT_MS_DEFAULT + TCP_SLOW_INTERVAL - 1) / TCP_SLOW_INTERVAL) + 1;
#endif /* LWIP_SO_SNDTIMEO || LWIP_SO_LINGER */
#endif /* LWIP_TCP */
  err = netconn_apimsg(lwip_netconn_do_close, &API_MSG_VAR_REF(msg));
 80162c6:	f107 030c 	add.w	r3, r7, #12
 80162ca:	4619      	mov	r1, r3
 80162cc:	4808      	ldr	r0, [pc, #32]	@ (80162f0 <netconn_close_shutdown+0x5c>)
 80162ce:	f7ff fb33 	bl	8015938 <netconn_apimsg>
 80162d2:	4603      	mov	r3, r0
 80162d4:	f887 302f 	strb.w	r3, [r7, #47]	@ 0x2f
  API_MSG_VAR_FREE(msg);

  return err;
 80162d8:	f997 302f 	ldrsb.w	r3, [r7, #47]	@ 0x2f
}
 80162dc:	4618      	mov	r0, r3
 80162de:	3730      	adds	r7, #48	@ 0x30
 80162e0:	46bd      	mov	sp, r7
 80162e2:	bd80      	pop	{r7, pc}
 80162e4:	0802d418 	.word	0x0802d418
 80162e8:	0802d754 	.word	0x0802d754
 80162ec:	0802d470 	.word	0x0802d470
 80162f0:	08017bad 	.word	0x08017bad

080162f4 <netconn_err>:
 * @param conn the netconn to get the error from
 * @return and pending error or ERR_OK if no error was pending
 */
err_t
netconn_err(struct netconn *conn)
{
 80162f4:	b580      	push	{r7, lr}
 80162f6:	b084      	sub	sp, #16
 80162f8:	af00      	add	r7, sp, #0
 80162fa:	6078      	str	r0, [r7, #4]
  err_t err;
  SYS_ARCH_DECL_PROTECT(lev);
  if (conn == NULL) {
 80162fc:	687b      	ldr	r3, [r7, #4]
 80162fe:	2b00      	cmp	r3, #0
 8016300:	d101      	bne.n	8016306 <netconn_err+0x12>
    return ERR_OK;
 8016302:	2300      	movs	r3, #0
 8016304:	e00d      	b.n	8016322 <netconn_err+0x2e>
  }
  SYS_ARCH_PROTECT(lev);
 8016306:	f010 fcc3 	bl	8026c90 <sys_arch_protect>
 801630a:	60f8      	str	r0, [r7, #12]
  err = conn->pending_err;
 801630c:	687b      	ldr	r3, [r7, #4]
 801630e:	7a1b      	ldrb	r3, [r3, #8]
 8016310:	72fb      	strb	r3, [r7, #11]
  conn->pending_err = ERR_OK;
 8016312:	687b      	ldr	r3, [r7, #4]
 8016314:	2200      	movs	r2, #0
 8016316:	721a      	strb	r2, [r3, #8]
  SYS_ARCH_UNPROTECT(lev);
 8016318:	68f8      	ldr	r0, [r7, #12]
 801631a:	f010 fcc7 	bl	8026cac <sys_arch_unprotect>
  return err;
 801631e:	f997 300b 	ldrsb.w	r3, [r7, #11]
}
 8016322:	4618      	mov	r0, r3
 8016324:	3710      	adds	r7, #16
 8016326:	46bd      	mov	sp, r7
 8016328:	bd80      	pop	{r7, pc}
	...

0801632c <lwip_netconn_err_to_msg>:
const u8_t netconn_closed = 0;

/** Translate an error to a unique void* passed via an mbox */
static void *
lwip_netconn_err_to_msg(err_t err)
{
 801632c:	b580      	push	{r7, lr}
 801632e:	b082      	sub	sp, #8
 8016330:	af00      	add	r7, sp, #0
 8016332:	4603      	mov	r3, r0
 8016334:	71fb      	strb	r3, [r7, #7]
  switch (err) {
 8016336:	f997 3007 	ldrsb.w	r3, [r7, #7]
 801633a:	f113 0f0d 	cmn.w	r3, #13
 801633e:	d009      	beq.n	8016354 <lwip_netconn_err_to_msg+0x28>
 8016340:	f113 0f0d 	cmn.w	r3, #13
 8016344:	dc0c      	bgt.n	8016360 <lwip_netconn_err_to_msg+0x34>
 8016346:	f113 0f0f 	cmn.w	r3, #15
 801634a:	d007      	beq.n	801635c <lwip_netconn_err_to_msg+0x30>
 801634c:	f113 0f0e 	cmn.w	r3, #14
 8016350:	d002      	beq.n	8016358 <lwip_netconn_err_to_msg+0x2c>
 8016352:	e005      	b.n	8016360 <lwip_netconn_err_to_msg+0x34>
    case ERR_ABRT:
      return LWIP_CONST_CAST(void *, &netconn_aborted);
 8016354:	4b0a      	ldr	r3, [pc, #40]	@ (8016380 <lwip_netconn_err_to_msg+0x54>)
 8016356:	e00e      	b.n	8016376 <lwip_netconn_err_to_msg+0x4a>
    case ERR_RST:
      return LWIP_CONST_CAST(void *, &netconn_reset);
 8016358:	4b0a      	ldr	r3, [pc, #40]	@ (8016384 <lwip_netconn_err_to_msg+0x58>)
 801635a:	e00c      	b.n	8016376 <lwip_netconn_err_to_msg+0x4a>
    case ERR_CLSD:
      return LWIP_CONST_CAST(void *, &netconn_closed);
 801635c:	4b0a      	ldr	r3, [pc, #40]	@ (8016388 <lwip_netconn_err_to_msg+0x5c>)
 801635e:	e00a      	b.n	8016376 <lwip_netconn_err_to_msg+0x4a>
    default:
      LWIP_ASSERT("unhandled error", err == ERR_OK);
 8016360:	f997 3007 	ldrsb.w	r3, [r7, #7]
 8016364:	2b00      	cmp	r3, #0
 8016366:	d005      	beq.n	8016374 <lwip_netconn_err_to_msg+0x48>
 8016368:	4b08      	ldr	r3, [pc, #32]	@ (801638c <lwip_netconn_err_to_msg+0x60>)
 801636a:	227d      	movs	r2, #125	@ 0x7d
 801636c:	4908      	ldr	r1, [pc, #32]	@ (8016390 <lwip_netconn_err_to_msg+0x64>)
 801636e:	4809      	ldr	r0, [pc, #36]	@ (8016394 <lwip_netconn_err_to_msg+0x68>)
 8016370:	f013 ff24 	bl	802a1bc <iprintf>
      return NULL;
 8016374:	2300      	movs	r3, #0
  }
}
 8016376:	4618      	mov	r0, r3
 8016378:	3708      	adds	r7, #8
 801637a:	46bd      	mov	sp, r7
 801637c:	bd80      	pop	{r7, pc}
 801637e:	bf00      	nop
 8016380:	08031358 	.word	0x08031358
 8016384:	08031359 	.word	0x08031359
 8016388:	0803135a 	.word	0x0803135a
 801638c:	0802d770 	.word	0x0802d770
 8016390:	0802d7a4 	.word	0x0802d7a4
 8016394:	0802d7b4 	.word	0x0802d7b4

08016398 <lwip_netconn_is_err_msg>:

int
lwip_netconn_is_err_msg(void *msg, err_t *err)
{
 8016398:	b580      	push	{r7, lr}
 801639a:	b082      	sub	sp, #8
 801639c:	af00      	add	r7, sp, #0
 801639e:	6078      	str	r0, [r7, #4]
 80163a0:	6039      	str	r1, [r7, #0]
  LWIP_ASSERT("err != NULL", err != NULL);
 80163a2:	683b      	ldr	r3, [r7, #0]
 80163a4:	2b00      	cmp	r3, #0
 80163a6:	d105      	bne.n	80163b4 <lwip_netconn_is_err_msg+0x1c>
 80163a8:	4b12      	ldr	r3, [pc, #72]	@ (80163f4 <lwip_netconn_is_err_msg+0x5c>)
 80163aa:	2285      	movs	r2, #133	@ 0x85
 80163ac:	4912      	ldr	r1, [pc, #72]	@ (80163f8 <lwip_netconn_is_err_msg+0x60>)
 80163ae:	4813      	ldr	r0, [pc, #76]	@ (80163fc <lwip_netconn_is_err_msg+0x64>)
 80163b0:	f013 ff04 	bl	802a1bc <iprintf>

  if (msg == &netconn_aborted) {
 80163b4:	687b      	ldr	r3, [r7, #4]
 80163b6:	4a12      	ldr	r2, [pc, #72]	@ (8016400 <lwip_netconn_is_err_msg+0x68>)
 80163b8:	4293      	cmp	r3, r2
 80163ba:	d104      	bne.n	80163c6 <lwip_netconn_is_err_msg+0x2e>
    *err = ERR_ABRT;
 80163bc:	683b      	ldr	r3, [r7, #0]
 80163be:	22f3      	movs	r2, #243	@ 0xf3
 80163c0:	701a      	strb	r2, [r3, #0]
    return 1;
 80163c2:	2301      	movs	r3, #1
 80163c4:	e012      	b.n	80163ec <lwip_netconn_is_err_msg+0x54>
  } else if (msg == &netconn_reset) {
 80163c6:	687b      	ldr	r3, [r7, #4]
 80163c8:	4a0e      	ldr	r2, [pc, #56]	@ (8016404 <lwip_netconn_is_err_msg+0x6c>)
 80163ca:	4293      	cmp	r3, r2
 80163cc:	d104      	bne.n	80163d8 <lwip_netconn_is_err_msg+0x40>
    *err = ERR_RST;
 80163ce:	683b      	ldr	r3, [r7, #0]
 80163d0:	22f2      	movs	r2, #242	@ 0xf2
 80163d2:	701a      	strb	r2, [r3, #0]
    return 1;
 80163d4:	2301      	movs	r3, #1
 80163d6:	e009      	b.n	80163ec <lwip_netconn_is_err_msg+0x54>
  } else if (msg == &netconn_closed) {
 80163d8:	687b      	ldr	r3, [r7, #4]
 80163da:	4a0b      	ldr	r2, [pc, #44]	@ (8016408 <lwip_netconn_is_err_msg+0x70>)
 80163dc:	4293      	cmp	r3, r2
 80163de:	d104      	bne.n	80163ea <lwip_netconn_is_err_msg+0x52>
    *err = ERR_CLSD;
 80163e0:	683b      	ldr	r3, [r7, #0]
 80163e2:	22f1      	movs	r2, #241	@ 0xf1
 80163e4:	701a      	strb	r2, [r3, #0]
    return 1;
 80163e6:	2301      	movs	r3, #1
 80163e8:	e000      	b.n	80163ec <lwip_netconn_is_err_msg+0x54>
  }
  return 0;
 80163ea:	2300      	movs	r3, #0
}
 80163ec:	4618      	mov	r0, r3
 80163ee:	3708      	adds	r7, #8
 80163f0:	46bd      	mov	sp, r7
 80163f2:	bd80      	pop	{r7, pc}
 80163f4:	0802d770 	.word	0x0802d770
 80163f8:	0802d7dc 	.word	0x0802d7dc
 80163fc:	0802d7b4 	.word	0x0802d7b4
 8016400:	08031358 	.word	0x08031358
 8016404:	08031359 	.word	0x08031359
 8016408:	0803135a 	.word	0x0803135a

0801640c <recv_udp>:
 * @see udp.h (struct udp_pcb.recv) for parameters
 */
static void
recv_udp(void *arg, struct udp_pcb *pcb, struct pbuf *p,
         const ip_addr_t *addr, u16_t port)
{
 801640c:	b580      	push	{r7, lr}
 801640e:	b08a      	sub	sp, #40	@ 0x28
 8016410:	af00      	add	r7, sp, #0
 8016412:	60f8      	str	r0, [r7, #12]
 8016414:	60b9      	str	r1, [r7, #8]
 8016416:	607a      	str	r2, [r7, #4]
 8016418:	603b      	str	r3, [r7, #0]
#if LWIP_SO_RCVBUF
  int recv_avail;
#endif /* LWIP_SO_RCVBUF */

  LWIP_UNUSED_ARG(pcb); /* only used for asserts... */
  LWIP_ASSERT("recv_udp must have a pcb argument", pcb != NULL);
 801641a:	68bb      	ldr	r3, [r7, #8]
 801641c:	2b00      	cmp	r3, #0
 801641e:	d105      	bne.n	801642c <recv_udp+0x20>
 8016420:	4b43      	ldr	r3, [pc, #268]	@ (8016530 <recv_udp+0x124>)
 8016422:	22e5      	movs	r2, #229	@ 0xe5
 8016424:	4943      	ldr	r1, [pc, #268]	@ (8016534 <recv_udp+0x128>)
 8016426:	4844      	ldr	r0, [pc, #272]	@ (8016538 <recv_udp+0x12c>)
 8016428:	f013 fec8 	bl	802a1bc <iprintf>
  LWIP_ASSERT("recv_udp must have an argument", arg != NULL);
 801642c:	68fb      	ldr	r3, [r7, #12]
 801642e:	2b00      	cmp	r3, #0
 8016430:	d105      	bne.n	801643e <recv_udp+0x32>
 8016432:	4b3f      	ldr	r3, [pc, #252]	@ (8016530 <recv_udp+0x124>)
 8016434:	22e6      	movs	r2, #230	@ 0xe6
 8016436:	4941      	ldr	r1, [pc, #260]	@ (801653c <recv_udp+0x130>)
 8016438:	483f      	ldr	r0, [pc, #252]	@ (8016538 <recv_udp+0x12c>)
 801643a:	f013 febf 	bl	802a1bc <iprintf>
  conn = (struct netconn *)arg;
 801643e:	68fb      	ldr	r3, [r7, #12]
 8016440:	627b      	str	r3, [r7, #36]	@ 0x24

  if (conn == NULL) {
 8016442:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8016444:	2b00      	cmp	r3, #0
 8016446:	d103      	bne.n	8016450 <recv_udp+0x44>
    pbuf_free(p);
 8016448:	6878      	ldr	r0, [r7, #4]
 801644a:	f004 fc3f 	bl	801accc <pbuf_free>
    return;
 801644e:	e06b      	b.n	8016528 <recv_udp+0x11c>
  }

  LWIP_ASSERT("recv_udp: recv for wrong pcb!", conn->pcb.udp == pcb);
 8016450:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8016452:	685b      	ldr	r3, [r3, #4]
 8016454:	68ba      	ldr	r2, [r7, #8]
 8016456:	429a      	cmp	r2, r3
 8016458:	d005      	beq.n	8016466 <recv_udp+0x5a>
 801645a:	4b35      	ldr	r3, [pc, #212]	@ (8016530 <recv_udp+0x124>)
 801645c:	22ee      	movs	r2, #238	@ 0xee
 801645e:	4938      	ldr	r1, [pc, #224]	@ (8016540 <recv_udp+0x134>)
 8016460:	4835      	ldr	r0, [pc, #212]	@ (8016538 <recv_udp+0x12c>)
 8016462:	f013 feab 	bl	802a1bc <iprintf>

#if LWIP_SO_RCVBUF
  SYS_ARCH_GET(conn->recv_avail, recv_avail);
 8016466:	f010 fc13 	bl	8026c90 <sys_arch_protect>
 801646a:	6238      	str	r0, [r7, #32]
 801646c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801646e:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8016470:	61fb      	str	r3, [r7, #28]
 8016472:	6a38      	ldr	r0, [r7, #32]
 8016474:	f010 fc1a 	bl	8026cac <sys_arch_unprotect>
  if (!NETCONN_MBOX_VALID(conn, &conn->recvmbox) ||
 8016478:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801647a:	3310      	adds	r3, #16
 801647c:	4618      	mov	r0, r3
 801647e:	f010 fafd 	bl	8026a7c <sys_mbox_valid>
 8016482:	4603      	mov	r3, r0
 8016484:	2b00      	cmp	r3, #0
 8016486:	d008      	beq.n	801649a <recv_udp+0x8e>
      ((recv_avail + (int)(p->tot_len)) > conn->recv_bufsize)) {
 8016488:	687b      	ldr	r3, [r7, #4]
 801648a:	891b      	ldrh	r3, [r3, #8]
 801648c:	461a      	mov	r2, r3
 801648e:	69fb      	ldr	r3, [r7, #28]
 8016490:	441a      	add	r2, r3
 8016492:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8016494:	6a1b      	ldr	r3, [r3, #32]
  if (!NETCONN_MBOX_VALID(conn, &conn->recvmbox) ||
 8016496:	429a      	cmp	r2, r3
 8016498:	dd03      	ble.n	80164a2 <recv_udp+0x96>
#else  /* LWIP_SO_RCVBUF */
  if (!NETCONN_MBOX_VALID(conn, &conn->recvmbox)) {
#endif /* LWIP_SO_RCVBUF */
    pbuf_free(p);
 801649a:	6878      	ldr	r0, [r7, #4]
 801649c:	f004 fc16 	bl	801accc <pbuf_free>
    return;
 80164a0:	e042      	b.n	8016528 <recv_udp+0x11c>
  }

  buf = (struct netbuf *)memp_malloc(MEMP_NETBUF);
 80164a2:	2006      	movs	r0, #6
 80164a4:	f003 fcae 	bl	8019e04 <memp_malloc>
 80164a8:	61b8      	str	r0, [r7, #24]
  if (buf == NULL) {
 80164aa:	69bb      	ldr	r3, [r7, #24]
 80164ac:	2b00      	cmp	r3, #0
 80164ae:	d103      	bne.n	80164b8 <recv_udp+0xac>
    pbuf_free(p);
 80164b0:	6878      	ldr	r0, [r7, #4]
 80164b2:	f004 fc0b 	bl	801accc <pbuf_free>
    return;
 80164b6:	e037      	b.n	8016528 <recv_udp+0x11c>
  } else {
    buf->p = p;
 80164b8:	69bb      	ldr	r3, [r7, #24]
 80164ba:	687a      	ldr	r2, [r7, #4]
 80164bc:	601a      	str	r2, [r3, #0]
    buf->ptr = p;
 80164be:	69bb      	ldr	r3, [r7, #24]
 80164c0:	687a      	ldr	r2, [r7, #4]
 80164c2:	605a      	str	r2, [r3, #4]
    ip_addr_set(&buf->addr, addr);
 80164c4:	683b      	ldr	r3, [r7, #0]
 80164c6:	2b00      	cmp	r3, #0
 80164c8:	d002      	beq.n	80164d0 <recv_udp+0xc4>
 80164ca:	683b      	ldr	r3, [r7, #0]
 80164cc:	681b      	ldr	r3, [r3, #0]
 80164ce:	e000      	b.n	80164d2 <recv_udp+0xc6>
 80164d0:	2300      	movs	r3, #0
 80164d2:	69ba      	ldr	r2, [r7, #24]
 80164d4:	6093      	str	r3, [r2, #8]
    buf->port = port;
 80164d6:	69bb      	ldr	r3, [r7, #24]
 80164d8:	8e3a      	ldrh	r2, [r7, #48]	@ 0x30
 80164da:	819a      	strh	r2, [r3, #12]
      buf->toport_chksum = udphdr->dest;
    }
#endif /* LWIP_NETBUF_RECVINFO */
  }

  len = p->tot_len;
 80164dc:	687b      	ldr	r3, [r7, #4]
 80164de:	891b      	ldrh	r3, [r3, #8]
 80164e0:	82fb      	strh	r3, [r7, #22]
  if (sys_mbox_trypost(&conn->recvmbox, buf) != ERR_OK) {
 80164e2:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80164e4:	3310      	adds	r3, #16
 80164e6:	69b9      	ldr	r1, [r7, #24]
 80164e8:	4618      	mov	r0, r3
 80164ea:	f010 fa65 	bl	80269b8 <sys_mbox_trypost>
 80164ee:	4603      	mov	r3, r0
 80164f0:	2b00      	cmp	r3, #0
 80164f2:	d003      	beq.n	80164fc <recv_udp+0xf0>
    netbuf_delete(buf);
 80164f4:	69b8      	ldr	r0, [r7, #24]
 80164f6:	f001 fbff 	bl	8017cf8 <netbuf_delete>
    return;
 80164fa:	e015      	b.n	8016528 <recv_udp+0x11c>
  } else {
#if LWIP_SO_RCVBUF
    SYS_ARCH_INC(conn->recv_avail, len);
 80164fc:	f010 fbc8 	bl	8026c90 <sys_arch_protect>
 8016500:	6138      	str	r0, [r7, #16]
 8016502:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8016504:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 8016506:	8afb      	ldrh	r3, [r7, #22]
 8016508:	441a      	add	r2, r3
 801650a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801650c:	625a      	str	r2, [r3, #36]	@ 0x24
 801650e:	6938      	ldr	r0, [r7, #16]
 8016510:	f010 fbcc 	bl	8026cac <sys_arch_unprotect>
#endif /* LWIP_SO_RCVBUF */
    /* Register event with callback */
    API_EVENT(conn, NETCONN_EVT_RCVPLUS, len);
 8016514:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8016516:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8016518:	2b00      	cmp	r3, #0
 801651a:	d005      	beq.n	8016528 <recv_udp+0x11c>
 801651c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801651e:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8016520:	8afa      	ldrh	r2, [r7, #22]
 8016522:	2100      	movs	r1, #0
 8016524:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 8016526:	4798      	blx	r3
  }
}
 8016528:	3728      	adds	r7, #40	@ 0x28
 801652a:	46bd      	mov	sp, r7
 801652c:	bd80      	pop	{r7, pc}
 801652e:	bf00      	nop
 8016530:	0802d770 	.word	0x0802d770
 8016534:	0802d7e8 	.word	0x0802d7e8
 8016538:	0802d7b4 	.word	0x0802d7b4
 801653c:	0802d80c 	.word	0x0802d80c
 8016540:	0802d82c 	.word	0x0802d82c

08016544 <recv_tcp>:
 *
 * @see tcp.h (struct tcp_pcb.recv) for parameters and return value
 */
static err_t
recv_tcp(void *arg, struct tcp_pcb *pcb, struct pbuf *p, err_t err)
{
 8016544:	b580      	push	{r7, lr}
 8016546:	b088      	sub	sp, #32
 8016548:	af00      	add	r7, sp, #0
 801654a:	60f8      	str	r0, [r7, #12]
 801654c:	60b9      	str	r1, [r7, #8]
 801654e:	607a      	str	r2, [r7, #4]
 8016550:	70fb      	strb	r3, [r7, #3]
  struct netconn *conn;
  u16_t len;
  void *msg;

  LWIP_UNUSED_ARG(pcb);
  LWIP_ASSERT("recv_tcp must have a pcb argument", pcb != NULL);
 8016552:	68bb      	ldr	r3, [r7, #8]
 8016554:	2b00      	cmp	r3, #0
 8016556:	d106      	bne.n	8016566 <recv_tcp+0x22>
 8016558:	4b3c      	ldr	r3, [pc, #240]	@ (801664c <recv_tcp+0x108>)
 801655a:	f44f 7296 	mov.w	r2, #300	@ 0x12c
 801655e:	493c      	ldr	r1, [pc, #240]	@ (8016650 <recv_tcp+0x10c>)
 8016560:	483c      	ldr	r0, [pc, #240]	@ (8016654 <recv_tcp+0x110>)
 8016562:	f013 fe2b 	bl	802a1bc <iprintf>
  LWIP_ASSERT("recv_tcp must have an argument", arg != NULL);
 8016566:	68fb      	ldr	r3, [r7, #12]
 8016568:	2b00      	cmp	r3, #0
 801656a:	d106      	bne.n	801657a <recv_tcp+0x36>
 801656c:	4b37      	ldr	r3, [pc, #220]	@ (801664c <recv_tcp+0x108>)
 801656e:	f240 122d 	movw	r2, #301	@ 0x12d
 8016572:	4939      	ldr	r1, [pc, #228]	@ (8016658 <recv_tcp+0x114>)
 8016574:	4837      	ldr	r0, [pc, #220]	@ (8016654 <recv_tcp+0x110>)
 8016576:	f013 fe21 	bl	802a1bc <iprintf>
  LWIP_ASSERT("err != ERR_OK unhandled", err == ERR_OK);
 801657a:	f997 3003 	ldrsb.w	r3, [r7, #3]
 801657e:	2b00      	cmp	r3, #0
 8016580:	d006      	beq.n	8016590 <recv_tcp+0x4c>
 8016582:	4b32      	ldr	r3, [pc, #200]	@ (801664c <recv_tcp+0x108>)
 8016584:	f44f 7297 	mov.w	r2, #302	@ 0x12e
 8016588:	4934      	ldr	r1, [pc, #208]	@ (801665c <recv_tcp+0x118>)
 801658a:	4832      	ldr	r0, [pc, #200]	@ (8016654 <recv_tcp+0x110>)
 801658c:	f013 fe16 	bl	802a1bc <iprintf>
  LWIP_UNUSED_ARG(err); /* for LWIP_NOASSERT */
  conn = (struct netconn *)arg;
 8016590:	68fb      	ldr	r3, [r7, #12]
 8016592:	617b      	str	r3, [r7, #20]

  if (conn == NULL) {
 8016594:	697b      	ldr	r3, [r7, #20]
 8016596:	2b00      	cmp	r3, #0
 8016598:	d102      	bne.n	80165a0 <recv_tcp+0x5c>
    return ERR_VAL;
 801659a:	f06f 0305 	mvn.w	r3, #5
 801659e:	e051      	b.n	8016644 <recv_tcp+0x100>
  }
  LWIP_ASSERT("recv_tcp: recv for wrong pcb!", conn->pcb.tcp == pcb);
 80165a0:	697b      	ldr	r3, [r7, #20]
 80165a2:	685b      	ldr	r3, [r3, #4]
 80165a4:	68ba      	ldr	r2, [r7, #8]
 80165a6:	429a      	cmp	r2, r3
 80165a8:	d006      	beq.n	80165b8 <recv_tcp+0x74>
 80165aa:	4b28      	ldr	r3, [pc, #160]	@ (801664c <recv_tcp+0x108>)
 80165ac:	f240 1235 	movw	r2, #309	@ 0x135
 80165b0:	492b      	ldr	r1, [pc, #172]	@ (8016660 <recv_tcp+0x11c>)
 80165b2:	4828      	ldr	r0, [pc, #160]	@ (8016654 <recv_tcp+0x110>)
 80165b4:	f013 fe02 	bl	802a1bc <iprintf>

  if (!NETCONN_MBOX_VALID(conn, &conn->recvmbox)) {
 80165b8:	697b      	ldr	r3, [r7, #20]
 80165ba:	3310      	adds	r3, #16
 80165bc:	4618      	mov	r0, r3
 80165be:	f010 fa5d 	bl	8026a7c <sys_mbox_valid>
 80165c2:	4603      	mov	r3, r0
 80165c4:	2b00      	cmp	r3, #0
 80165c6:	d10d      	bne.n	80165e4 <recv_tcp+0xa0>
    /* recvmbox already deleted */
    if (p != NULL) {
 80165c8:	687b      	ldr	r3, [r7, #4]
 80165ca:	2b00      	cmp	r3, #0
 80165cc:	d008      	beq.n	80165e0 <recv_tcp+0x9c>
      tcp_recved(pcb, p->tot_len);
 80165ce:	687b      	ldr	r3, [r7, #4]
 80165d0:	891b      	ldrh	r3, [r3, #8]
 80165d2:	4619      	mov	r1, r3
 80165d4:	68b8      	ldr	r0, [r7, #8]
 80165d6:	f005 f9e5 	bl	801b9a4 <tcp_recved>
      pbuf_free(p);
 80165da:	6878      	ldr	r0, [r7, #4]
 80165dc:	f004 fb76 	bl	801accc <pbuf_free>
    }
    return ERR_OK;
 80165e0:	2300      	movs	r3, #0
 80165e2:	e02f      	b.n	8016644 <recv_tcp+0x100>
  }
  /* Unlike for UDP or RAW pcbs, don't check for available space
     using recv_avail since that could break the connection
     (data is already ACKed) */

  if (p != NULL) {
 80165e4:	687b      	ldr	r3, [r7, #4]
 80165e6:	2b00      	cmp	r3, #0
 80165e8:	d005      	beq.n	80165f6 <recv_tcp+0xb2>
    msg = p;
 80165ea:	687b      	ldr	r3, [r7, #4]
 80165ec:	61bb      	str	r3, [r7, #24]
    len = p->tot_len;
 80165ee:	687b      	ldr	r3, [r7, #4]
 80165f0:	891b      	ldrh	r3, [r3, #8]
 80165f2:	83fb      	strh	r3, [r7, #30]
 80165f4:	e003      	b.n	80165fe <recv_tcp+0xba>
  } else {
    msg = LWIP_CONST_CAST(void *, &netconn_closed);
 80165f6:	4b1b      	ldr	r3, [pc, #108]	@ (8016664 <recv_tcp+0x120>)
 80165f8:	61bb      	str	r3, [r7, #24]
    len = 0;
 80165fa:	2300      	movs	r3, #0
 80165fc:	83fb      	strh	r3, [r7, #30]
  }

  if (sys_mbox_trypost(&conn->recvmbox, msg) != ERR_OK) {
 80165fe:	697b      	ldr	r3, [r7, #20]
 8016600:	3310      	adds	r3, #16
 8016602:	69b9      	ldr	r1, [r7, #24]
 8016604:	4618      	mov	r0, r3
 8016606:	f010 f9d7 	bl	80269b8 <sys_mbox_trypost>
 801660a:	4603      	mov	r3, r0
 801660c:	2b00      	cmp	r3, #0
 801660e:	d002      	beq.n	8016616 <recv_tcp+0xd2>
    /* don't deallocate p: it is presented to us later again from tcp_fasttmr! */
    return ERR_MEM;
 8016610:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8016614:	e016      	b.n	8016644 <recv_tcp+0x100>
  } else {
#if LWIP_SO_RCVBUF
    SYS_ARCH_INC(conn->recv_avail, len);
 8016616:	f010 fb3b 	bl	8026c90 <sys_arch_protect>
 801661a:	6138      	str	r0, [r7, #16]
 801661c:	697b      	ldr	r3, [r7, #20]
 801661e:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 8016620:	8bfb      	ldrh	r3, [r7, #30]
 8016622:	441a      	add	r2, r3
 8016624:	697b      	ldr	r3, [r7, #20]
 8016626:	625a      	str	r2, [r3, #36]	@ 0x24
 8016628:	6938      	ldr	r0, [r7, #16]
 801662a:	f010 fb3f 	bl	8026cac <sys_arch_unprotect>
#endif /* LWIP_SO_RCVBUF */
    /* Register event with callback */
    API_EVENT(conn, NETCONN_EVT_RCVPLUS, len);
 801662e:	697b      	ldr	r3, [r7, #20]
 8016630:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8016632:	2b00      	cmp	r3, #0
 8016634:	d005      	beq.n	8016642 <recv_tcp+0xfe>
 8016636:	697b      	ldr	r3, [r7, #20]
 8016638:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 801663a:	8bfa      	ldrh	r2, [r7, #30]
 801663c:	2100      	movs	r1, #0
 801663e:	6978      	ldr	r0, [r7, #20]
 8016640:	4798      	blx	r3
  }

  return ERR_OK;
 8016642:	2300      	movs	r3, #0
}
 8016644:	4618      	mov	r0, r3
 8016646:	3720      	adds	r7, #32
 8016648:	46bd      	mov	sp, r7
 801664a:	bd80      	pop	{r7, pc}
 801664c:	0802d770 	.word	0x0802d770
 8016650:	0802d84c 	.word	0x0802d84c
 8016654:	0802d7b4 	.word	0x0802d7b4
 8016658:	0802d870 	.word	0x0802d870
 801665c:	0802d890 	.word	0x0802d890
 8016660:	0802d8a8 	.word	0x0802d8a8
 8016664:	0803135a 	.word	0x0803135a

08016668 <poll_tcp>:
 *
 * @see tcp.h (struct tcp_pcb.poll) for parameters and return value
 */
static err_t
poll_tcp(void *arg, struct tcp_pcb *pcb)
{
 8016668:	b580      	push	{r7, lr}
 801666a:	b084      	sub	sp, #16
 801666c:	af00      	add	r7, sp, #0
 801666e:	6078      	str	r0, [r7, #4]
 8016670:	6039      	str	r1, [r7, #0]
  struct netconn *conn = (struct netconn *)arg;
 8016672:	687b      	ldr	r3, [r7, #4]
 8016674:	60fb      	str	r3, [r7, #12]

  LWIP_UNUSED_ARG(pcb);
  LWIP_ASSERT("conn != NULL", (conn != NULL));
 8016676:	68fb      	ldr	r3, [r7, #12]
 8016678:	2b00      	cmp	r3, #0
 801667a:	d106      	bne.n	801668a <poll_tcp+0x22>
 801667c:	4b2b      	ldr	r3, [pc, #172]	@ (801672c <poll_tcp+0xc4>)
 801667e:	f44f 72b5 	mov.w	r2, #362	@ 0x16a
 8016682:	492b      	ldr	r1, [pc, #172]	@ (8016730 <poll_tcp+0xc8>)
 8016684:	482b      	ldr	r0, [pc, #172]	@ (8016734 <poll_tcp+0xcc>)
 8016686:	f013 fd99 	bl	802a1bc <iprintf>

  if (conn->state == NETCONN_WRITE) {
 801668a:	68fb      	ldr	r3, [r7, #12]
 801668c:	785b      	ldrb	r3, [r3, #1]
 801668e:	2b01      	cmp	r3, #1
 8016690:	d104      	bne.n	801669c <poll_tcp+0x34>
    lwip_netconn_do_writemore(conn  WRITE_DELAYED);
 8016692:	2101      	movs	r1, #1
 8016694:	68f8      	ldr	r0, [r7, #12]
 8016696:	f000 ffab 	bl	80175f0 <lwip_netconn_do_writemore>
 801669a:	e016      	b.n	80166ca <poll_tcp+0x62>
  } else if (conn->state == NETCONN_CLOSE) {
 801669c:	68fb      	ldr	r3, [r7, #12]
 801669e:	785b      	ldrb	r3, [r3, #1]
 80166a0:	2b04      	cmp	r3, #4
 80166a2:	d112      	bne.n	80166ca <poll_tcp+0x62>
#if !LWIP_SO_SNDTIMEO && !LWIP_SO_LINGER
    if (conn->current_msg && conn->current_msg->msg.sd.polls_left) {
 80166a4:	68fb      	ldr	r3, [r7, #12]
 80166a6:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80166a8:	2b00      	cmp	r3, #0
 80166aa:	d00a      	beq.n	80166c2 <poll_tcp+0x5a>
 80166ac:	68fb      	ldr	r3, [r7, #12]
 80166ae:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80166b0:	7a5b      	ldrb	r3, [r3, #9]
 80166b2:	2b00      	cmp	r3, #0
 80166b4:	d005      	beq.n	80166c2 <poll_tcp+0x5a>
      conn->current_msg->msg.sd.polls_left--;
 80166b6:	68fb      	ldr	r3, [r7, #12]
 80166b8:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80166ba:	7a5a      	ldrb	r2, [r3, #9]
 80166bc:	3a01      	subs	r2, #1
 80166be:	b2d2      	uxtb	r2, r2
 80166c0:	725a      	strb	r2, [r3, #9]
    }
#endif /* !LWIP_SO_SNDTIMEO && !LWIP_SO_LINGER */
    lwip_netconn_do_close_internal(conn  WRITE_DELAYED);
 80166c2:	2101      	movs	r1, #1
 80166c4:	68f8      	ldr	r0, [r7, #12]
 80166c6:	f000 fb53 	bl	8016d70 <lwip_netconn_do_close_internal>
  }
  /* @todo: implement connect timeout here? */

  /* Did a nonblocking write fail before? Then check available write-space. */
  if (conn->flags & NETCONN_FLAG_CHECK_WRITESPACE) {
 80166ca:	68fb      	ldr	r3, [r7, #12]
 80166cc:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 80166d0:	f003 0310 	and.w	r3, r3, #16
 80166d4:	2b00      	cmp	r3, #0
 80166d6:	d024      	beq.n	8016722 <poll_tcp+0xba>
    /* If the queued byte- or pbuf-count drops below the configured low-water limit,
       let select mark this pcb as writable again. */
    if ((conn->pcb.tcp != NULL) && (tcp_sndbuf(conn->pcb.tcp) > TCP_SNDLOWAT) &&
 80166d8:	68fb      	ldr	r3, [r7, #12]
 80166da:	685b      	ldr	r3, [r3, #4]
 80166dc:	2b00      	cmp	r3, #0
 80166de:	d020      	beq.n	8016722 <poll_tcp+0xba>
 80166e0:	68fb      	ldr	r3, [r7, #12]
 80166e2:	685b      	ldr	r3, [r3, #4]
 80166e4:	f8b3 3064 	ldrh.w	r3, [r3, #100]	@ 0x64
 80166e8:	f640 3269 	movw	r2, #2921	@ 0xb69
 80166ec:	4293      	cmp	r3, r2
 80166ee:	d918      	bls.n	8016722 <poll_tcp+0xba>
        (tcp_sndqueuelen(conn->pcb.tcp) < TCP_SNDQUEUELOWAT)) {
 80166f0:	68fb      	ldr	r3, [r7, #12]
 80166f2:	685b      	ldr	r3, [r3, #4]
 80166f4:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
    if ((conn->pcb.tcp != NULL) && (tcp_sndbuf(conn->pcb.tcp) > TCP_SNDLOWAT) &&
 80166f8:	2b07      	cmp	r3, #7
 80166fa:	d812      	bhi.n	8016722 <poll_tcp+0xba>
      netconn_clear_flags(conn, NETCONN_FLAG_CHECK_WRITESPACE);
 80166fc:	68fb      	ldr	r3, [r7, #12]
 80166fe:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8016702:	f023 0310 	bic.w	r3, r3, #16
 8016706:	b2da      	uxtb	r2, r3
 8016708:	68fb      	ldr	r3, [r7, #12]
 801670a:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
      API_EVENT(conn, NETCONN_EVT_SENDPLUS, 0);
 801670e:	68fb      	ldr	r3, [r7, #12]
 8016710:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8016712:	2b00      	cmp	r3, #0
 8016714:	d005      	beq.n	8016722 <poll_tcp+0xba>
 8016716:	68fb      	ldr	r3, [r7, #12]
 8016718:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 801671a:	2200      	movs	r2, #0
 801671c:	2102      	movs	r1, #2
 801671e:	68f8      	ldr	r0, [r7, #12]
 8016720:	4798      	blx	r3
    }
  }

  return ERR_OK;
 8016722:	2300      	movs	r3, #0
}
 8016724:	4618      	mov	r0, r3
 8016726:	3710      	adds	r7, #16
 8016728:	46bd      	mov	sp, r7
 801672a:	bd80      	pop	{r7, pc}
 801672c:	0802d770 	.word	0x0802d770
 8016730:	0802d8c8 	.word	0x0802d8c8
 8016734:	0802d7b4 	.word	0x0802d7b4

08016738 <sent_tcp>:
 *
 * @see tcp.h (struct tcp_pcb.sent) for parameters and return value
 */
static err_t
sent_tcp(void *arg, struct tcp_pcb *pcb, u16_t len)
{
 8016738:	b580      	push	{r7, lr}
 801673a:	b086      	sub	sp, #24
 801673c:	af00      	add	r7, sp, #0
 801673e:	60f8      	str	r0, [r7, #12]
 8016740:	60b9      	str	r1, [r7, #8]
 8016742:	4613      	mov	r3, r2
 8016744:	80fb      	strh	r3, [r7, #6]
  struct netconn *conn = (struct netconn *)arg;
 8016746:	68fb      	ldr	r3, [r7, #12]
 8016748:	617b      	str	r3, [r7, #20]

  LWIP_UNUSED_ARG(pcb);
  LWIP_ASSERT("conn != NULL", (conn != NULL));
 801674a:	697b      	ldr	r3, [r7, #20]
 801674c:	2b00      	cmp	r3, #0
 801674e:	d106      	bne.n	801675e <sent_tcp+0x26>
 8016750:	4b22      	ldr	r3, [pc, #136]	@ (80167dc <sent_tcp+0xa4>)
 8016752:	f240 1293 	movw	r2, #403	@ 0x193
 8016756:	4922      	ldr	r1, [pc, #136]	@ (80167e0 <sent_tcp+0xa8>)
 8016758:	4822      	ldr	r0, [pc, #136]	@ (80167e4 <sent_tcp+0xac>)
 801675a:	f013 fd2f 	bl	802a1bc <iprintf>

  if (conn) {
 801675e:	697b      	ldr	r3, [r7, #20]
 8016760:	2b00      	cmp	r3, #0
 8016762:	d035      	beq.n	80167d0 <sent_tcp+0x98>
    if (conn->state == NETCONN_WRITE) {
 8016764:	697b      	ldr	r3, [r7, #20]
 8016766:	785b      	ldrb	r3, [r3, #1]
 8016768:	2b01      	cmp	r3, #1
 801676a:	d104      	bne.n	8016776 <sent_tcp+0x3e>
      lwip_netconn_do_writemore(conn  WRITE_DELAYED);
 801676c:	2101      	movs	r1, #1
 801676e:	6978      	ldr	r0, [r7, #20]
 8016770:	f000 ff3e 	bl	80175f0 <lwip_netconn_do_writemore>
 8016774:	e007      	b.n	8016786 <sent_tcp+0x4e>
    } else if (conn->state == NETCONN_CLOSE) {
 8016776:	697b      	ldr	r3, [r7, #20]
 8016778:	785b      	ldrb	r3, [r3, #1]
 801677a:	2b04      	cmp	r3, #4
 801677c:	d103      	bne.n	8016786 <sent_tcp+0x4e>
      lwip_netconn_do_close_internal(conn  WRITE_DELAYED);
 801677e:	2101      	movs	r1, #1
 8016780:	6978      	ldr	r0, [r7, #20]
 8016782:	f000 faf5 	bl	8016d70 <lwip_netconn_do_close_internal>
    }

    /* If the queued byte- or pbuf-count drops below the configured low-water limit,
       let select mark this pcb as writable again. */
    if ((conn->pcb.tcp != NULL) && (tcp_sndbuf(conn->pcb.tcp) > TCP_SNDLOWAT) &&
 8016786:	697b      	ldr	r3, [r7, #20]
 8016788:	685b      	ldr	r3, [r3, #4]
 801678a:	2b00      	cmp	r3, #0
 801678c:	d020      	beq.n	80167d0 <sent_tcp+0x98>
 801678e:	697b      	ldr	r3, [r7, #20]
 8016790:	685b      	ldr	r3, [r3, #4]
 8016792:	f8b3 3064 	ldrh.w	r3, [r3, #100]	@ 0x64
 8016796:	f640 3269 	movw	r2, #2921	@ 0xb69
 801679a:	4293      	cmp	r3, r2
 801679c:	d918      	bls.n	80167d0 <sent_tcp+0x98>
        (tcp_sndqueuelen(conn->pcb.tcp) < TCP_SNDQUEUELOWAT)) {
 801679e:	697b      	ldr	r3, [r7, #20]
 80167a0:	685b      	ldr	r3, [r3, #4]
 80167a2:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
    if ((conn->pcb.tcp != NULL) && (tcp_sndbuf(conn->pcb.tcp) > TCP_SNDLOWAT) &&
 80167a6:	2b07      	cmp	r3, #7
 80167a8:	d812      	bhi.n	80167d0 <sent_tcp+0x98>
      netconn_clear_flags(conn, NETCONN_FLAG_CHECK_WRITESPACE);
 80167aa:	697b      	ldr	r3, [r7, #20]
 80167ac:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 80167b0:	f023 0310 	bic.w	r3, r3, #16
 80167b4:	b2da      	uxtb	r2, r3
 80167b6:	697b      	ldr	r3, [r7, #20]
 80167b8:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
      API_EVENT(conn, NETCONN_EVT_SENDPLUS, len);
 80167bc:	697b      	ldr	r3, [r7, #20]
 80167be:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 80167c0:	2b00      	cmp	r3, #0
 80167c2:	d005      	beq.n	80167d0 <sent_tcp+0x98>
 80167c4:	697b      	ldr	r3, [r7, #20]
 80167c6:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 80167c8:	88fa      	ldrh	r2, [r7, #6]
 80167ca:	2102      	movs	r1, #2
 80167cc:	6978      	ldr	r0, [r7, #20]
 80167ce:	4798      	blx	r3
    }
  }

  return ERR_OK;
 80167d0:	2300      	movs	r3, #0
}
 80167d2:	4618      	mov	r0, r3
 80167d4:	3718      	adds	r7, #24
 80167d6:	46bd      	mov	sp, r7
 80167d8:	bd80      	pop	{r7, pc}
 80167da:	bf00      	nop
 80167dc:	0802d770 	.word	0x0802d770
 80167e0:	0802d8c8 	.word	0x0802d8c8
 80167e4:	0802d7b4 	.word	0x0802d7b4

080167e8 <err_tcp>:
 *
 * @see tcp.h (struct tcp_pcb.err) for parameters
 */
static void
err_tcp(void *arg, err_t err)
{
 80167e8:	b580      	push	{r7, lr}
 80167ea:	b088      	sub	sp, #32
 80167ec:	af00      	add	r7, sp, #0
 80167ee:	6078      	str	r0, [r7, #4]
 80167f0:	460b      	mov	r3, r1
 80167f2:	70fb      	strb	r3, [r7, #3]
  struct netconn *conn;
  enum netconn_state old_state;
  void *mbox_msg;
  SYS_ARCH_DECL_PROTECT(lev);

  conn = (struct netconn *)arg;
 80167f4:	687b      	ldr	r3, [r7, #4]
 80167f6:	61fb      	str	r3, [r7, #28]
  LWIP_ASSERT("conn != NULL", (conn != NULL));
 80167f8:	69fb      	ldr	r3, [r7, #28]
 80167fa:	2b00      	cmp	r3, #0
 80167fc:	d106      	bne.n	801680c <err_tcp+0x24>
 80167fe:	4b61      	ldr	r3, [pc, #388]	@ (8016984 <err_tcp+0x19c>)
 8016800:	f44f 72dc 	mov.w	r2, #440	@ 0x1b8
 8016804:	4960      	ldr	r1, [pc, #384]	@ (8016988 <err_tcp+0x1a0>)
 8016806:	4861      	ldr	r0, [pc, #388]	@ (801698c <err_tcp+0x1a4>)
 8016808:	f013 fcd8 	bl	802a1bc <iprintf>

  SYS_ARCH_PROTECT(lev);
 801680c:	f010 fa40 	bl	8026c90 <sys_arch_protect>
 8016810:	61b8      	str	r0, [r7, #24]

  /* when err is called, the pcb is deallocated, so delete the reference */
  conn->pcb.tcp = NULL;
 8016812:	69fb      	ldr	r3, [r7, #28]
 8016814:	2200      	movs	r2, #0
 8016816:	605a      	str	r2, [r3, #4]
  /* store pending error */
  conn->pending_err = err;
 8016818:	69fb      	ldr	r3, [r7, #28]
 801681a:	78fa      	ldrb	r2, [r7, #3]
 801681c:	721a      	strb	r2, [r3, #8]
  /* prevent application threads from blocking on 'recvmbox'/'acceptmbox' */
  conn->flags |= NETCONN_FLAG_MBOXCLOSED;
 801681e:	69fb      	ldr	r3, [r7, #28]
 8016820:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8016824:	f043 0301 	orr.w	r3, r3, #1
 8016828:	b2da      	uxtb	r2, r3
 801682a:	69fb      	ldr	r3, [r7, #28]
 801682c:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28

  /* reset conn->state now before waking up other threads */
  old_state = conn->state;
 8016830:	69fb      	ldr	r3, [r7, #28]
 8016832:	785b      	ldrb	r3, [r3, #1]
 8016834:	75fb      	strb	r3, [r7, #23]
  conn->state = NETCONN_NONE;
 8016836:	69fb      	ldr	r3, [r7, #28]
 8016838:	2200      	movs	r2, #0
 801683a:	705a      	strb	r2, [r3, #1]

  SYS_ARCH_UNPROTECT(lev);
 801683c:	69b8      	ldr	r0, [r7, #24]
 801683e:	f010 fa35 	bl	8026cac <sys_arch_unprotect>

  /* Notify the user layer about a connection error. Used to signal select. */
  API_EVENT(conn, NETCONN_EVT_ERROR, 0);
 8016842:	69fb      	ldr	r3, [r7, #28]
 8016844:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8016846:	2b00      	cmp	r3, #0
 8016848:	d005      	beq.n	8016856 <err_tcp+0x6e>
 801684a:	69fb      	ldr	r3, [r7, #28]
 801684c:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 801684e:	2200      	movs	r2, #0
 8016850:	2104      	movs	r1, #4
 8016852:	69f8      	ldr	r0, [r7, #28]
 8016854:	4798      	blx	r3
  /* Try to release selects pending on 'read' or 'write', too.
     They will get an error if they actually try to read or write. */
  API_EVENT(conn, NETCONN_EVT_RCVPLUS, 0);
 8016856:	69fb      	ldr	r3, [r7, #28]
 8016858:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 801685a:	2b00      	cmp	r3, #0
 801685c:	d005      	beq.n	801686a <err_tcp+0x82>
 801685e:	69fb      	ldr	r3, [r7, #28]
 8016860:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8016862:	2200      	movs	r2, #0
 8016864:	2100      	movs	r1, #0
 8016866:	69f8      	ldr	r0, [r7, #28]
 8016868:	4798      	blx	r3
  API_EVENT(conn, NETCONN_EVT_SENDPLUS, 0);
 801686a:	69fb      	ldr	r3, [r7, #28]
 801686c:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 801686e:	2b00      	cmp	r3, #0
 8016870:	d005      	beq.n	801687e <err_tcp+0x96>
 8016872:	69fb      	ldr	r3, [r7, #28]
 8016874:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8016876:	2200      	movs	r2, #0
 8016878:	2102      	movs	r1, #2
 801687a:	69f8      	ldr	r0, [r7, #28]
 801687c:	4798      	blx	r3

  mbox_msg = lwip_netconn_err_to_msg(err);
 801687e:	f997 3003 	ldrsb.w	r3, [r7, #3]
 8016882:	4618      	mov	r0, r3
 8016884:	f7ff fd52 	bl	801632c <lwip_netconn_err_to_msg>
 8016888:	6138      	str	r0, [r7, #16]
  /* pass error message to recvmbox to wake up pending recv */
  if (NETCONN_MBOX_VALID(conn, &conn->recvmbox)) {
 801688a:	69fb      	ldr	r3, [r7, #28]
 801688c:	3310      	adds	r3, #16
 801688e:	4618      	mov	r0, r3
 8016890:	f010 f8f4 	bl	8026a7c <sys_mbox_valid>
 8016894:	4603      	mov	r3, r0
 8016896:	2b00      	cmp	r3, #0
 8016898:	d005      	beq.n	80168a6 <err_tcp+0xbe>
    /* use trypost to prevent deadlock */
    sys_mbox_trypost(&conn->recvmbox, mbox_msg);
 801689a:	69fb      	ldr	r3, [r7, #28]
 801689c:	3310      	adds	r3, #16
 801689e:	6939      	ldr	r1, [r7, #16]
 80168a0:	4618      	mov	r0, r3
 80168a2:	f010 f889 	bl	80269b8 <sys_mbox_trypost>
  }
  /* pass error message to acceptmbox to wake up pending accept */
  if (NETCONN_MBOX_VALID(conn, &conn->acceptmbox)) {
 80168a6:	69fb      	ldr	r3, [r7, #28]
 80168a8:	3314      	adds	r3, #20
 80168aa:	4618      	mov	r0, r3
 80168ac:	f010 f8e6 	bl	8026a7c <sys_mbox_valid>
 80168b0:	4603      	mov	r3, r0
 80168b2:	2b00      	cmp	r3, #0
 80168b4:	d005      	beq.n	80168c2 <err_tcp+0xda>
    /* use trypost to preven deadlock */
    sys_mbox_trypost(&conn->acceptmbox, mbox_msg);
 80168b6:	69fb      	ldr	r3, [r7, #28]
 80168b8:	3314      	adds	r3, #20
 80168ba:	6939      	ldr	r1, [r7, #16]
 80168bc:	4618      	mov	r0, r3
 80168be:	f010 f87b 	bl	80269b8 <sys_mbox_trypost>
  }

  if ((old_state == NETCONN_WRITE) || (old_state == NETCONN_CLOSE) ||
 80168c2:	7dfb      	ldrb	r3, [r7, #23]
 80168c4:	2b01      	cmp	r3, #1
 80168c6:	d005      	beq.n	80168d4 <err_tcp+0xec>
 80168c8:	7dfb      	ldrb	r3, [r7, #23]
 80168ca:	2b04      	cmp	r3, #4
 80168cc:	d002      	beq.n	80168d4 <err_tcp+0xec>
 80168ce:	7dfb      	ldrb	r3, [r7, #23]
 80168d0:	2b03      	cmp	r3, #3
 80168d2:	d146      	bne.n	8016962 <err_tcp+0x17a>
      (old_state == NETCONN_CONNECT)) {
    /* calling lwip_netconn_do_writemore/lwip_netconn_do_close_internal is not necessary
       since the pcb has already been deleted! */
    int was_nonblocking_connect = IN_NONBLOCKING_CONNECT(conn);
 80168d4:	69fb      	ldr	r3, [r7, #28]
 80168d6:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 80168da:	f003 0304 	and.w	r3, r3, #4
 80168de:	2b00      	cmp	r3, #0
 80168e0:	bf14      	ite	ne
 80168e2:	2301      	movne	r3, #1
 80168e4:	2300      	moveq	r3, #0
 80168e6:	b2db      	uxtb	r3, r3
 80168e8:	60fb      	str	r3, [r7, #12]
    SET_NONBLOCKING_CONNECT(conn, 0);
 80168ea:	69fb      	ldr	r3, [r7, #28]
 80168ec:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 80168f0:	f023 0304 	bic.w	r3, r3, #4
 80168f4:	b2da      	uxtb	r2, r3
 80168f6:	69fb      	ldr	r3, [r7, #28]
 80168f8:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28

    if (!was_nonblocking_connect) {
 80168fc:	68fb      	ldr	r3, [r7, #12]
 80168fe:	2b00      	cmp	r3, #0
 8016900:	d13b      	bne.n	801697a <err_tcp+0x192>
      sys_sem_t *op_completed_sem;
      /* set error return code */
      LWIP_ASSERT("conn->current_msg != NULL", conn->current_msg != NULL);
 8016902:	69fb      	ldr	r3, [r7, #28]
 8016904:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016906:	2b00      	cmp	r3, #0
 8016908:	d106      	bne.n	8016918 <err_tcp+0x130>
 801690a:	4b1e      	ldr	r3, [pc, #120]	@ (8016984 <err_tcp+0x19c>)
 801690c:	f44f 72f3 	mov.w	r2, #486	@ 0x1e6
 8016910:	491f      	ldr	r1, [pc, #124]	@ (8016990 <err_tcp+0x1a8>)
 8016912:	481e      	ldr	r0, [pc, #120]	@ (801698c <err_tcp+0x1a4>)
 8016914:	f013 fc52 	bl	802a1bc <iprintf>
      if (old_state == NETCONN_CLOSE) {
 8016918:	7dfb      	ldrb	r3, [r7, #23]
 801691a:	2b04      	cmp	r3, #4
 801691c:	d104      	bne.n	8016928 <err_tcp+0x140>
        /* let close succeed: the connection is closed after all... */
        conn->current_msg->err = ERR_OK;
 801691e:	69fb      	ldr	r3, [r7, #28]
 8016920:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016922:	2200      	movs	r2, #0
 8016924:	711a      	strb	r2, [r3, #4]
 8016926:	e003      	b.n	8016930 <err_tcp+0x148>
      } else {
        /* Write and connect fail */
        conn->current_msg->err = err;
 8016928:	69fb      	ldr	r3, [r7, #28]
 801692a:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 801692c:	78fa      	ldrb	r2, [r7, #3]
 801692e:	711a      	strb	r2, [r3, #4]
      }
      op_completed_sem = LWIP_API_MSG_SEM(conn->current_msg);
 8016930:	69fb      	ldr	r3, [r7, #28]
 8016932:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016934:	681b      	ldr	r3, [r3, #0]
 8016936:	330c      	adds	r3, #12
 8016938:	60bb      	str	r3, [r7, #8]
      LWIP_ASSERT("inavlid op_completed_sem", sys_sem_valid(op_completed_sem));
 801693a:	68b8      	ldr	r0, [r7, #8]
 801693c:	f010 f92c 	bl	8026b98 <sys_sem_valid>
 8016940:	4603      	mov	r3, r0
 8016942:	2b00      	cmp	r3, #0
 8016944:	d106      	bne.n	8016954 <err_tcp+0x16c>
 8016946:	4b0f      	ldr	r3, [pc, #60]	@ (8016984 <err_tcp+0x19c>)
 8016948:	f240 12ef 	movw	r2, #495	@ 0x1ef
 801694c:	4911      	ldr	r1, [pc, #68]	@ (8016994 <err_tcp+0x1ac>)
 801694e:	480f      	ldr	r0, [pc, #60]	@ (801698c <err_tcp+0x1a4>)
 8016950:	f013 fc34 	bl	802a1bc <iprintf>
      conn->current_msg = NULL;
 8016954:	69fb      	ldr	r3, [r7, #28]
 8016956:	2200      	movs	r2, #0
 8016958:	62da      	str	r2, [r3, #44]	@ 0x2c
      /* wake up the waiting task */
      sys_sem_signal(op_completed_sem);
 801695a:	68b8      	ldr	r0, [r7, #8]
 801695c:	f010 f902 	bl	8026b64 <sys_sem_signal>
      (old_state == NETCONN_CONNECT)) {
 8016960:	e00b      	b.n	801697a <err_tcp+0x192>
    } else {
      /* @todo: test what happens for error on nonblocking connect */
    }
  } else {
    LWIP_ASSERT("conn->current_msg == NULL", conn->current_msg == NULL);
 8016962:	69fb      	ldr	r3, [r7, #28]
 8016964:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016966:	2b00      	cmp	r3, #0
 8016968:	d008      	beq.n	801697c <err_tcp+0x194>
 801696a:	4b06      	ldr	r3, [pc, #24]	@ (8016984 <err_tcp+0x19c>)
 801696c:	f240 12f7 	movw	r2, #503	@ 0x1f7
 8016970:	4909      	ldr	r1, [pc, #36]	@ (8016998 <err_tcp+0x1b0>)
 8016972:	4806      	ldr	r0, [pc, #24]	@ (801698c <err_tcp+0x1a4>)
 8016974:	f013 fc22 	bl	802a1bc <iprintf>
  }
}
 8016978:	e000      	b.n	801697c <err_tcp+0x194>
      (old_state == NETCONN_CONNECT)) {
 801697a:	bf00      	nop
}
 801697c:	bf00      	nop
 801697e:	3720      	adds	r7, #32
 8016980:	46bd      	mov	sp, r7
 8016982:	bd80      	pop	{r7, pc}
 8016984:	0802d770 	.word	0x0802d770
 8016988:	0802d8c8 	.word	0x0802d8c8
 801698c:	0802d7b4 	.word	0x0802d7b4
 8016990:	0802d8d8 	.word	0x0802d8d8
 8016994:	0802d8f4 	.word	0x0802d8f4
 8016998:	0802d910 	.word	0x0802d910

0801699c <setup_tcp>:
 *
 * @param conn the TCP netconn to setup
 */
static void
setup_tcp(struct netconn *conn)
{
 801699c:	b580      	push	{r7, lr}
 801699e:	b084      	sub	sp, #16
 80169a0:	af00      	add	r7, sp, #0
 80169a2:	6078      	str	r0, [r7, #4]
  struct tcp_pcb *pcb;

  pcb = conn->pcb.tcp;
 80169a4:	687b      	ldr	r3, [r7, #4]
 80169a6:	685b      	ldr	r3, [r3, #4]
 80169a8:	60fb      	str	r3, [r7, #12]
  tcp_arg(pcb, conn);
 80169aa:	6879      	ldr	r1, [r7, #4]
 80169ac:	68f8      	ldr	r0, [r7, #12]
 80169ae:	f005 ffe3 	bl	801c978 <tcp_arg>
  tcp_recv(pcb, recv_tcp);
 80169b2:	490a      	ldr	r1, [pc, #40]	@ (80169dc <setup_tcp+0x40>)
 80169b4:	68f8      	ldr	r0, [r7, #12]
 80169b6:	f005 fff1 	bl	801c99c <tcp_recv>
  tcp_sent(pcb, sent_tcp);
 80169ba:	4909      	ldr	r1, [pc, #36]	@ (80169e0 <setup_tcp+0x44>)
 80169bc:	68f8      	ldr	r0, [r7, #12]
 80169be:	f006 f811 	bl	801c9e4 <tcp_sent>
  tcp_poll(pcb, poll_tcp, NETCONN_TCP_POLL_INTERVAL);
 80169c2:	2202      	movs	r2, #2
 80169c4:	4907      	ldr	r1, [pc, #28]	@ (80169e4 <setup_tcp+0x48>)
 80169c6:	68f8      	ldr	r0, [r7, #12]
 80169c8:	f006 f86c 	bl	801caa4 <tcp_poll>
  tcp_err(pcb, err_tcp);
 80169cc:	4906      	ldr	r1, [pc, #24]	@ (80169e8 <setup_tcp+0x4c>)
 80169ce:	68f8      	ldr	r0, [r7, #12]
 80169d0:	f006 f82c 	bl	801ca2c <tcp_err>
}
 80169d4:	bf00      	nop
 80169d6:	3710      	adds	r7, #16
 80169d8:	46bd      	mov	sp, r7
 80169da:	bd80      	pop	{r7, pc}
 80169dc:	08016545 	.word	0x08016545
 80169e0:	08016739 	.word	0x08016739
 80169e4:	08016669 	.word	0x08016669
 80169e8:	080167e9 	.word	0x080167e9

080169ec <pcb_new>:
 *
 * @param msg the api_msg describing the connection type
 */
static void
pcb_new(struct api_msg *msg)
{
 80169ec:	b590      	push	{r4, r7, lr}
 80169ee:	b085      	sub	sp, #20
 80169f0:	af00      	add	r7, sp, #0
 80169f2:	6078      	str	r0, [r7, #4]
  enum lwip_ip_addr_type iptype = IPADDR_TYPE_V4;
 80169f4:	2300      	movs	r3, #0
 80169f6:	73fb      	strb	r3, [r7, #15]

  LWIP_ASSERT("pcb_new: pcb already allocated", msg->conn->pcb.tcp == NULL);
 80169f8:	687b      	ldr	r3, [r7, #4]
 80169fa:	681b      	ldr	r3, [r3, #0]
 80169fc:	685b      	ldr	r3, [r3, #4]
 80169fe:	2b00      	cmp	r3, #0
 8016a00:	d006      	beq.n	8016a10 <pcb_new+0x24>
 8016a02:	4b2b      	ldr	r3, [pc, #172]	@ (8016ab0 <pcb_new+0xc4>)
 8016a04:	f240 2265 	movw	r2, #613	@ 0x265
 8016a08:	492a      	ldr	r1, [pc, #168]	@ (8016ab4 <pcb_new+0xc8>)
 8016a0a:	482b      	ldr	r0, [pc, #172]	@ (8016ab8 <pcb_new+0xcc>)
 8016a0c:	f013 fbd6 	bl	802a1bc <iprintf>
    iptype = IPADDR_TYPE_ANY;
  }
#endif

  /* Allocate a PCB for this connection */
  switch (NETCONNTYPE_GROUP(msg->conn->type)) {
 8016a10:	687b      	ldr	r3, [r7, #4]
 8016a12:	681b      	ldr	r3, [r3, #0]
 8016a14:	781b      	ldrb	r3, [r3, #0]
 8016a16:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8016a1a:	2b10      	cmp	r3, #16
 8016a1c:	d022      	beq.n	8016a64 <pcb_new+0x78>
 8016a1e:	2b20      	cmp	r3, #32
 8016a20:	d133      	bne.n	8016a8a <pcb_new+0x9e>
      }
      break;
#endif /* LWIP_RAW */
#if LWIP_UDP
    case NETCONN_UDP:
      msg->conn->pcb.udp = udp_new_ip_type(iptype);
 8016a22:	687b      	ldr	r3, [r7, #4]
 8016a24:	681c      	ldr	r4, [r3, #0]
 8016a26:	7bfb      	ldrb	r3, [r7, #15]
 8016a28:	4618      	mov	r0, r3
 8016a2a:	f00b fb94 	bl	8022156 <udp_new_ip_type>
 8016a2e:	4603      	mov	r3, r0
 8016a30:	6063      	str	r3, [r4, #4]
      if (msg->conn->pcb.udp != NULL) {
 8016a32:	687b      	ldr	r3, [r7, #4]
 8016a34:	681b      	ldr	r3, [r3, #0]
 8016a36:	685b      	ldr	r3, [r3, #4]
 8016a38:	2b00      	cmp	r3, #0
 8016a3a:	d02a      	beq.n	8016a92 <pcb_new+0xa6>
#if LWIP_UDPLITE
        if (NETCONNTYPE_ISUDPLITE(msg->conn->type)) {
          udp_setflags(msg->conn->pcb.udp, UDP_FLAGS_UDPLITE);
        }
#endif /* LWIP_UDPLITE */
        if (NETCONNTYPE_ISUDPNOCHKSUM(msg->conn->type)) {
 8016a3c:	687b      	ldr	r3, [r7, #4]
 8016a3e:	681b      	ldr	r3, [r3, #0]
 8016a40:	781b      	ldrb	r3, [r3, #0]
 8016a42:	2b22      	cmp	r3, #34	@ 0x22
 8016a44:	d104      	bne.n	8016a50 <pcb_new+0x64>
          udp_setflags(msg->conn->pcb.udp, UDP_FLAGS_NOCHKSUM);
 8016a46:	687b      	ldr	r3, [r7, #4]
 8016a48:	681b      	ldr	r3, [r3, #0]
 8016a4a:	685b      	ldr	r3, [r3, #4]
 8016a4c:	2201      	movs	r2, #1
 8016a4e:	741a      	strb	r2, [r3, #16]
        }
        udp_recv(msg->conn->pcb.udp, recv_udp, msg->conn);
 8016a50:	687b      	ldr	r3, [r7, #4]
 8016a52:	681b      	ldr	r3, [r3, #0]
 8016a54:	6858      	ldr	r0, [r3, #4]
 8016a56:	687b      	ldr	r3, [r7, #4]
 8016a58:	681b      	ldr	r3, [r3, #0]
 8016a5a:	461a      	mov	r2, r3
 8016a5c:	4917      	ldr	r1, [pc, #92]	@ (8016abc <pcb_new+0xd0>)
 8016a5e:	f00b fafb 	bl	8022058 <udp_recv>
      }
      break;
 8016a62:	e016      	b.n	8016a92 <pcb_new+0xa6>
#endif /* LWIP_UDP */
#if LWIP_TCP
    case NETCONN_TCP:
      msg->conn->pcb.tcp = tcp_new_ip_type(iptype);
 8016a64:	687b      	ldr	r3, [r7, #4]
 8016a66:	681c      	ldr	r4, [r3, #0]
 8016a68:	7bfb      	ldrb	r3, [r7, #15]
 8016a6a:	4618      	mov	r0, r3
 8016a6c:	f005 ff76 	bl	801c95c <tcp_new_ip_type>
 8016a70:	4603      	mov	r3, r0
 8016a72:	6063      	str	r3, [r4, #4]
      if (msg->conn->pcb.tcp != NULL) {
 8016a74:	687b      	ldr	r3, [r7, #4]
 8016a76:	681b      	ldr	r3, [r3, #0]
 8016a78:	685b      	ldr	r3, [r3, #4]
 8016a7a:	2b00      	cmp	r3, #0
 8016a7c:	d00b      	beq.n	8016a96 <pcb_new+0xaa>
        setup_tcp(msg->conn);
 8016a7e:	687b      	ldr	r3, [r7, #4]
 8016a80:	681b      	ldr	r3, [r3, #0]
 8016a82:	4618      	mov	r0, r3
 8016a84:	f7ff ff8a 	bl	801699c <setup_tcp>
      }
      break;
 8016a88:	e005      	b.n	8016a96 <pcb_new+0xaa>
#endif /* LWIP_TCP */
    default:
      /* Unsupported netconn type, e.g. protocol disabled */
      msg->err = ERR_VAL;
 8016a8a:	687b      	ldr	r3, [r7, #4]
 8016a8c:	22fa      	movs	r2, #250	@ 0xfa
 8016a8e:	711a      	strb	r2, [r3, #4]
      return;
 8016a90:	e00a      	b.n	8016aa8 <pcb_new+0xbc>
      break;
 8016a92:	bf00      	nop
 8016a94:	e000      	b.n	8016a98 <pcb_new+0xac>
      break;
 8016a96:	bf00      	nop
  }
  if (msg->conn->pcb.ip == NULL) {
 8016a98:	687b      	ldr	r3, [r7, #4]
 8016a9a:	681b      	ldr	r3, [r3, #0]
 8016a9c:	685b      	ldr	r3, [r3, #4]
 8016a9e:	2b00      	cmp	r3, #0
 8016aa0:	d102      	bne.n	8016aa8 <pcb_new+0xbc>
    msg->err = ERR_MEM;
 8016aa2:	687b      	ldr	r3, [r7, #4]
 8016aa4:	22ff      	movs	r2, #255	@ 0xff
 8016aa6:	711a      	strb	r2, [r3, #4]
  }
}
 8016aa8:	3714      	adds	r7, #20
 8016aaa:	46bd      	mov	sp, r7
 8016aac:	bd90      	pop	{r4, r7, pc}
 8016aae:	bf00      	nop
 8016ab0:	0802d770 	.word	0x0802d770
 8016ab4:	0802d954 	.word	0x0802d954
 8016ab8:	0802d7b4 	.word	0x0802d7b4
 8016abc:	0801640d 	.word	0x0801640d

08016ac0 <lwip_netconn_do_newconn>:
 *
 * @param m the api_msg describing the connection type
 */
void
lwip_netconn_do_newconn(void *m)
{
 8016ac0:	b580      	push	{r7, lr}
 8016ac2:	b084      	sub	sp, #16
 8016ac4:	af00      	add	r7, sp, #0
 8016ac6:	6078      	str	r0, [r7, #4]
  struct api_msg *msg = (struct api_msg *)m;
 8016ac8:	687b      	ldr	r3, [r7, #4]
 8016aca:	60fb      	str	r3, [r7, #12]

  msg->err = ERR_OK;
 8016acc:	68fb      	ldr	r3, [r7, #12]
 8016ace:	2200      	movs	r2, #0
 8016ad0:	711a      	strb	r2, [r3, #4]
  if (msg->conn->pcb.tcp == NULL) {
 8016ad2:	68fb      	ldr	r3, [r7, #12]
 8016ad4:	681b      	ldr	r3, [r3, #0]
 8016ad6:	685b      	ldr	r3, [r3, #4]
 8016ad8:	2b00      	cmp	r3, #0
 8016ada:	d102      	bne.n	8016ae2 <lwip_netconn_do_newconn+0x22>
    pcb_new(msg);
 8016adc:	68f8      	ldr	r0, [r7, #12]
 8016ade:	f7ff ff85 	bl	80169ec <pcb_new>
  /* Else? This "new" connection already has a PCB allocated. */
  /* Is this an error condition? Should it be deleted? */
  /* We currently just are happy and return. */

  TCPIP_APIMSG_ACK(msg);
}
 8016ae2:	bf00      	nop
 8016ae4:	3710      	adds	r7, #16
 8016ae6:	46bd      	mov	sp, r7
 8016ae8:	bd80      	pop	{r7, pc}
	...

08016aec <netconn_alloc>:
 * @return a newly allocated struct netconn or
 *         NULL on memory error
 */
struct netconn *
netconn_alloc(enum netconn_type t, netconn_callback callback)
{
 8016aec:	b580      	push	{r7, lr}
 8016aee:	b086      	sub	sp, #24
 8016af0:	af00      	add	r7, sp, #0
 8016af2:	4603      	mov	r3, r0
 8016af4:	6039      	str	r1, [r7, #0]
 8016af6:	71fb      	strb	r3, [r7, #7]
  struct netconn *conn;
  int size;
  u8_t init_flags = 0;
 8016af8:	2300      	movs	r3, #0
 8016afa:	74fb      	strb	r3, [r7, #19]

  conn = (struct netconn *)memp_malloc(MEMP_NETCONN);
 8016afc:	2007      	movs	r0, #7
 8016afe:	f003 f981 	bl	8019e04 <memp_malloc>
 8016b02:	60f8      	str	r0, [r7, #12]
  if (conn == NULL) {
 8016b04:	68fb      	ldr	r3, [r7, #12]
 8016b06:	2b00      	cmp	r3, #0
 8016b08:	d101      	bne.n	8016b0e <netconn_alloc+0x22>
    return NULL;
 8016b0a:	2300      	movs	r3, #0
 8016b0c:	e05c      	b.n	8016bc8 <netconn_alloc+0xdc>
  }

  conn->pending_err = ERR_OK;
 8016b0e:	68fb      	ldr	r3, [r7, #12]
 8016b10:	2200      	movs	r2, #0
 8016b12:	721a      	strb	r2, [r3, #8]
  conn->type = t;
 8016b14:	68fb      	ldr	r3, [r7, #12]
 8016b16:	79fa      	ldrb	r2, [r7, #7]
 8016b18:	701a      	strb	r2, [r3, #0]
  conn->pcb.tcp = NULL;
 8016b1a:	68fb      	ldr	r3, [r7, #12]
 8016b1c:	2200      	movs	r2, #0
 8016b1e:	605a      	str	r2, [r3, #4]

  /* If all sizes are the same, every compiler should optimize this switch to nothing */
  switch (NETCONNTYPE_GROUP(t)) {
 8016b20:	79fb      	ldrb	r3, [r7, #7]
 8016b22:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8016b26:	2b10      	cmp	r3, #16
 8016b28:	d004      	beq.n	8016b34 <netconn_alloc+0x48>
 8016b2a:	2b20      	cmp	r3, #32
 8016b2c:	d105      	bne.n	8016b3a <netconn_alloc+0x4e>
      size = DEFAULT_RAW_RECVMBOX_SIZE;
      break;
#endif /* LWIP_RAW */
#if LWIP_UDP
    case NETCONN_UDP:
      size = DEFAULT_UDP_RECVMBOX_SIZE;
 8016b2e:	2306      	movs	r3, #6
 8016b30:	617b      	str	r3, [r7, #20]
#if LWIP_NETBUF_RECVINFO
      init_flags |= NETCONN_FLAG_PKTINFO;
#endif /* LWIP_NETBUF_RECVINFO */
      break;
 8016b32:	e00a      	b.n	8016b4a <netconn_alloc+0x5e>
#endif /* LWIP_UDP */
#if LWIP_TCP
    case NETCONN_TCP:
      size = DEFAULT_TCP_RECVMBOX_SIZE;
 8016b34:	2306      	movs	r3, #6
 8016b36:	617b      	str	r3, [r7, #20]
      break;
 8016b38:	e007      	b.n	8016b4a <netconn_alloc+0x5e>
#endif /* LWIP_TCP */
    default:
      LWIP_ASSERT("netconn_alloc: undefined netconn_type", 0);
 8016b3a:	4b25      	ldr	r3, [pc, #148]	@ (8016bd0 <netconn_alloc+0xe4>)
 8016b3c:	f240 22e5 	movw	r2, #741	@ 0x2e5
 8016b40:	4924      	ldr	r1, [pc, #144]	@ (8016bd4 <netconn_alloc+0xe8>)
 8016b42:	4825      	ldr	r0, [pc, #148]	@ (8016bd8 <netconn_alloc+0xec>)
 8016b44:	f013 fb3a 	bl	802a1bc <iprintf>
      goto free_and_return;
 8016b48:	e039      	b.n	8016bbe <netconn_alloc+0xd2>
  }

  if (sys_mbox_new(&conn->recvmbox, size) != ERR_OK) {
 8016b4a:	68fb      	ldr	r3, [r7, #12]
 8016b4c:	3310      	adds	r3, #16
 8016b4e:	6979      	ldr	r1, [r7, #20]
 8016b50:	4618      	mov	r0, r3
 8016b52:	f00f ff05 	bl	8026960 <sys_mbox_new>
 8016b56:	4603      	mov	r3, r0
 8016b58:	2b00      	cmp	r3, #0
 8016b5a:	d12f      	bne.n	8016bbc <netconn_alloc+0xd0>
    goto free_and_return;
  }
#if !LWIP_NETCONN_SEM_PER_THREAD
  if (sys_sem_new(&conn->op_completed, 0) != ERR_OK) {
 8016b5c:	68fb      	ldr	r3, [r7, #12]
 8016b5e:	330c      	adds	r3, #12
 8016b60:	2100      	movs	r1, #0
 8016b62:	4618      	mov	r0, r3
 8016b64:	f00f ffa8 	bl	8026ab8 <sys_sem_new>
 8016b68:	4603      	mov	r3, r0
 8016b6a:	2b00      	cmp	r3, #0
 8016b6c:	d005      	beq.n	8016b7a <netconn_alloc+0x8e>
    sys_mbox_free(&conn->recvmbox);
 8016b6e:	68fb      	ldr	r3, [r7, #12]
 8016b70:	3310      	adds	r3, #16
 8016b72:	4618      	mov	r0, r3
 8016b74:	f00f ff0e 	bl	8026994 <sys_mbox_free>
    goto free_and_return;
 8016b78:	e021      	b.n	8016bbe <netconn_alloc+0xd2>
  }
#endif

#if LWIP_TCP
  sys_mbox_set_invalid(&conn->acceptmbox);
 8016b7a:	68fb      	ldr	r3, [r7, #12]
 8016b7c:	3314      	adds	r3, #20
 8016b7e:	4618      	mov	r0, r3
 8016b80:	f00f ff8d 	bl	8026a9e <sys_mbox_set_invalid>
#endif
  conn->state        = NETCONN_NONE;
 8016b84:	68fb      	ldr	r3, [r7, #12]
 8016b86:	2200      	movs	r2, #0
 8016b88:	705a      	strb	r2, [r3, #1]
#if LWIP_SOCKET
  /* initialize socket to -1 since 0 is a valid socket */
  conn->socket       = -1;
 8016b8a:	68fb      	ldr	r3, [r7, #12]
 8016b8c:	f04f 32ff 	mov.w	r2, #4294967295	@ 0xffffffff
 8016b90:	619a      	str	r2, [r3, #24]
#endif /* LWIP_SOCKET */
  conn->callback     = callback;
 8016b92:	68fb      	ldr	r3, [r7, #12]
 8016b94:	683a      	ldr	r2, [r7, #0]
 8016b96:	631a      	str	r2, [r3, #48]	@ 0x30
#if LWIP_TCP
  conn->current_msg  = NULL;
 8016b98:	68fb      	ldr	r3, [r7, #12]
 8016b9a:	2200      	movs	r2, #0
 8016b9c:	62da      	str	r2, [r3, #44]	@ 0x2c
#endif /* LWIP_TCP */
#if LWIP_SO_SNDTIMEO
  conn->send_timeout = 0;
#endif /* LWIP_SO_SNDTIMEO */
#if LWIP_SO_RCVTIMEO
  conn->recv_timeout = 0;
 8016b9e:	68fb      	ldr	r3, [r7, #12]
 8016ba0:	2200      	movs	r2, #0
 8016ba2:	61da      	str	r2, [r3, #28]
#endif /* LWIP_SO_RCVTIMEO */
#if LWIP_SO_RCVBUF
  conn->recv_bufsize = RECV_BUFSIZE_DEFAULT;
 8016ba4:	68fb      	ldr	r3, [r7, #12]
 8016ba6:	4a0d      	ldr	r2, [pc, #52]	@ (8016bdc <netconn_alloc+0xf0>)
 8016ba8:	621a      	str	r2, [r3, #32]
  conn->recv_avail   = 0;
 8016baa:	68fb      	ldr	r3, [r7, #12]
 8016bac:	2200      	movs	r2, #0
 8016bae:	625a      	str	r2, [r3, #36]	@ 0x24
#endif /* LWIP_SO_RCVBUF */
#if LWIP_SO_LINGER
  conn->linger = -1;
#endif /* LWIP_SO_LINGER */
  conn->flags = init_flags;
 8016bb0:	68fb      	ldr	r3, [r7, #12]
 8016bb2:	7cfa      	ldrb	r2, [r7, #19]
 8016bb4:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
  return conn;
 8016bb8:	68fb      	ldr	r3, [r7, #12]
 8016bba:	e005      	b.n	8016bc8 <netconn_alloc+0xdc>
    goto free_and_return;
 8016bbc:	bf00      	nop
free_and_return:
  memp_free(MEMP_NETCONN, conn);
 8016bbe:	68f9      	ldr	r1, [r7, #12]
 8016bc0:	2007      	movs	r0, #7
 8016bc2:	f003 f995 	bl	8019ef0 <memp_free>
  return NULL;
 8016bc6:	2300      	movs	r3, #0
}
 8016bc8:	4618      	mov	r0, r3
 8016bca:	3718      	adds	r7, #24
 8016bcc:	46bd      	mov	sp, r7
 8016bce:	bd80      	pop	{r7, pc}
 8016bd0:	0802d770 	.word	0x0802d770
 8016bd4:	0802d974 	.word	0x0802d974
 8016bd8:	0802d7b4 	.word	0x0802d7b4
 8016bdc:	77359400 	.word	0x77359400

08016be0 <netconn_free>:
 *
 * @param conn the netconn to free
 */
void
netconn_free(struct netconn *conn)
{
 8016be0:	b580      	push	{r7, lr}
 8016be2:	b082      	sub	sp, #8
 8016be4:	af00      	add	r7, sp, #0
 8016be6:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT("PCB must be deallocated outside this function", conn->pcb.tcp == NULL);
 8016be8:	687b      	ldr	r3, [r7, #4]
 8016bea:	685b      	ldr	r3, [r3, #4]
 8016bec:	2b00      	cmp	r3, #0
 8016bee:	d006      	beq.n	8016bfe <netconn_free+0x1e>
 8016bf0:	4b1b      	ldr	r3, [pc, #108]	@ (8016c60 <netconn_free+0x80>)
 8016bf2:	f44f 7247 	mov.w	r2, #796	@ 0x31c
 8016bf6:	491b      	ldr	r1, [pc, #108]	@ (8016c64 <netconn_free+0x84>)
 8016bf8:	481b      	ldr	r0, [pc, #108]	@ (8016c68 <netconn_free+0x88>)
 8016bfa:	f013 fadf 	bl	802a1bc <iprintf>
#if LWIP_NETCONN_FULLDUPLEX
  /* in fullduplex, netconn is drained here */
  netconn_drain(conn);
#endif /* LWIP_NETCONN_FULLDUPLEX */

  LWIP_ASSERT("recvmbox must be deallocated before calling this function",
 8016bfe:	687b      	ldr	r3, [r7, #4]
 8016c00:	3310      	adds	r3, #16
 8016c02:	4618      	mov	r0, r3
 8016c04:	f00f ff3a 	bl	8026a7c <sys_mbox_valid>
 8016c08:	4603      	mov	r3, r0
 8016c0a:	2b00      	cmp	r3, #0
 8016c0c:	d006      	beq.n	8016c1c <netconn_free+0x3c>
 8016c0e:	4b14      	ldr	r3, [pc, #80]	@ (8016c60 <netconn_free+0x80>)
 8016c10:	f240 3223 	movw	r2, #803	@ 0x323
 8016c14:	4915      	ldr	r1, [pc, #84]	@ (8016c6c <netconn_free+0x8c>)
 8016c16:	4814      	ldr	r0, [pc, #80]	@ (8016c68 <netconn_free+0x88>)
 8016c18:	f013 fad0 	bl	802a1bc <iprintf>
              !sys_mbox_valid(&conn->recvmbox));
#if LWIP_TCP
  LWIP_ASSERT("acceptmbox must be deallocated before calling this function",
 8016c1c:	687b      	ldr	r3, [r7, #4]
 8016c1e:	3314      	adds	r3, #20
 8016c20:	4618      	mov	r0, r3
 8016c22:	f00f ff2b 	bl	8026a7c <sys_mbox_valid>
 8016c26:	4603      	mov	r3, r0
 8016c28:	2b00      	cmp	r3, #0
 8016c2a:	d006      	beq.n	8016c3a <netconn_free+0x5a>
 8016c2c:	4b0c      	ldr	r3, [pc, #48]	@ (8016c60 <netconn_free+0x80>)
 8016c2e:	f240 3226 	movw	r2, #806	@ 0x326
 8016c32:	490f      	ldr	r1, [pc, #60]	@ (8016c70 <netconn_free+0x90>)
 8016c34:	480c      	ldr	r0, [pc, #48]	@ (8016c68 <netconn_free+0x88>)
 8016c36:	f013 fac1 	bl	802a1bc <iprintf>
              !sys_mbox_valid(&conn->acceptmbox));
#endif /* LWIP_TCP */

#if !LWIP_NETCONN_SEM_PER_THREAD
  sys_sem_free(&conn->op_completed);
 8016c3a:	687b      	ldr	r3, [r7, #4]
 8016c3c:	330c      	adds	r3, #12
 8016c3e:	4618      	mov	r0, r3
 8016c40:	f00f ff9d 	bl	8026b7e <sys_sem_free>
  sys_sem_set_invalid(&conn->op_completed);
 8016c44:	687b      	ldr	r3, [r7, #4]
 8016c46:	330c      	adds	r3, #12
 8016c48:	4618      	mov	r0, r3
 8016c4a:	f00f ffb6 	bl	8026bba <sys_sem_set_invalid>
#endif

  memp_free(MEMP_NETCONN, conn);
 8016c4e:	6879      	ldr	r1, [r7, #4]
 8016c50:	2007      	movs	r0, #7
 8016c52:	f003 f94d 	bl	8019ef0 <memp_free>
}
 8016c56:	bf00      	nop
 8016c58:	3708      	adds	r7, #8
 8016c5a:	46bd      	mov	sp, r7
 8016c5c:	bd80      	pop	{r7, pc}
 8016c5e:	bf00      	nop
 8016c60:	0802d770 	.word	0x0802d770
 8016c64:	0802d99c 	.word	0x0802d99c
 8016c68:	0802d7b4 	.word	0x0802d7b4
 8016c6c:	0802d9cc 	.word	0x0802d9cc
 8016c70:	0802da08 	.word	0x0802da08

08016c74 <netconn_drain>:
 * @bytes_drained bytes drained from recvmbox
 * @accepts_drained pending connections drained from acceptmbox
 */
static void
netconn_drain(struct netconn *conn)
{
 8016c74:	b580      	push	{r7, lr}
 8016c76:	b086      	sub	sp, #24
 8016c78:	af00      	add	r7, sp, #0
 8016c7a:	6078      	str	r0, [r7, #4]
#if LWIP_NETCONN_FULLDUPLEX
  LWIP_ASSERT("netconn marked closed", conn->flags & NETCONN_FLAG_MBOXINVALID);
#endif /* LWIP_NETCONN_FULLDUPLEX */

  /* Delete and drain the recvmbox. */
  if (sys_mbox_valid(&conn->recvmbox)) {
 8016c7c:	687b      	ldr	r3, [r7, #4]
 8016c7e:	3310      	adds	r3, #16
 8016c80:	4618      	mov	r0, r3
 8016c82:	f00f fefb 	bl	8026a7c <sys_mbox_valid>
 8016c86:	4603      	mov	r3, r0
 8016c88:	2b00      	cmp	r3, #0
 8016c8a:	d02f      	beq.n	8016cec <netconn_drain+0x78>
    while (sys_mbox_tryfetch(&conn->recvmbox, &mem) != SYS_MBOX_EMPTY) {
 8016c8c:	e018      	b.n	8016cc0 <netconn_drain+0x4c>
#if LWIP_NETCONN_FULLDUPLEX
      if (!lwip_netconn_is_deallocated_msg(mem))
#endif /* LWIP_NETCONN_FULLDUPLEX */
      {
#if LWIP_TCP
        if (NETCONNTYPE_GROUP(conn->type) == NETCONN_TCP) {
 8016c8e:	687b      	ldr	r3, [r7, #4]
 8016c90:	781b      	ldrb	r3, [r3, #0]
 8016c92:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8016c96:	2b10      	cmp	r3, #16
 8016c98:	d10e      	bne.n	8016cb8 <netconn_drain+0x44>
          err_t err;
          if (!lwip_netconn_is_err_msg(mem, &err)) {
 8016c9a:	693b      	ldr	r3, [r7, #16]
 8016c9c:	f107 020f 	add.w	r2, r7, #15
 8016ca0:	4611      	mov	r1, r2
 8016ca2:	4618      	mov	r0, r3
 8016ca4:	f7ff fb78 	bl	8016398 <lwip_netconn_is_err_msg>
 8016ca8:	4603      	mov	r3, r0
 8016caa:	2b00      	cmp	r3, #0
 8016cac:	d108      	bne.n	8016cc0 <netconn_drain+0x4c>
            pbuf_free((struct pbuf *)mem);
 8016cae:	693b      	ldr	r3, [r7, #16]
 8016cb0:	4618      	mov	r0, r3
 8016cb2:	f004 f80b 	bl	801accc <pbuf_free>
 8016cb6:	e003      	b.n	8016cc0 <netconn_drain+0x4c>
          }
        } else
#endif /* LWIP_TCP */
        {
          netbuf_delete((struct netbuf *)mem);
 8016cb8:	693b      	ldr	r3, [r7, #16]
 8016cba:	4618      	mov	r0, r3
 8016cbc:	f001 f81c 	bl	8017cf8 <netbuf_delete>
    while (sys_mbox_tryfetch(&conn->recvmbox, &mem) != SYS_MBOX_EMPTY) {
 8016cc0:	687b      	ldr	r3, [r7, #4]
 8016cc2:	3310      	adds	r3, #16
 8016cc4:	f107 0210 	add.w	r2, r7, #16
 8016cc8:	4611      	mov	r1, r2
 8016cca:	4618      	mov	r0, r3
 8016ccc:	f00f febf 	bl	8026a4e <sys_arch_mbox_tryfetch>
 8016cd0:	4603      	mov	r3, r0
 8016cd2:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8016cd6:	d1da      	bne.n	8016c8e <netconn_drain+0x1a>
        }
      }
    }
    sys_mbox_free(&conn->recvmbox);
 8016cd8:	687b      	ldr	r3, [r7, #4]
 8016cda:	3310      	adds	r3, #16
 8016cdc:	4618      	mov	r0, r3
 8016cde:	f00f fe59 	bl	8026994 <sys_mbox_free>
    sys_mbox_set_invalid(&conn->recvmbox);
 8016ce2:	687b      	ldr	r3, [r7, #4]
 8016ce4:	3310      	adds	r3, #16
 8016ce6:	4618      	mov	r0, r3
 8016ce8:	f00f fed9 	bl	8026a9e <sys_mbox_set_invalid>
  }

  /* Delete and drain the acceptmbox. */
#if LWIP_TCP
  if (sys_mbox_valid(&conn->acceptmbox)) {
 8016cec:	687b      	ldr	r3, [r7, #4]
 8016cee:	3314      	adds	r3, #20
 8016cf0:	4618      	mov	r0, r3
 8016cf2:	f00f fec3 	bl	8026a7c <sys_mbox_valid>
 8016cf6:	4603      	mov	r3, r0
 8016cf8:	2b00      	cmp	r3, #0
 8016cfa:	d034      	beq.n	8016d66 <netconn_drain+0xf2>
    while (sys_mbox_tryfetch(&conn->acceptmbox, &mem) != SYS_MBOX_EMPTY) {
 8016cfc:	e01d      	b.n	8016d3a <netconn_drain+0xc6>
#if LWIP_NETCONN_FULLDUPLEX
      if (!lwip_netconn_is_deallocated_msg(mem))
#endif /* LWIP_NETCONN_FULLDUPLEX */
      {
        err_t err;
        if (!lwip_netconn_is_err_msg(mem, &err)) {
 8016cfe:	693b      	ldr	r3, [r7, #16]
 8016d00:	f107 020e 	add.w	r2, r7, #14
 8016d04:	4611      	mov	r1, r2
 8016d06:	4618      	mov	r0, r3
 8016d08:	f7ff fb46 	bl	8016398 <lwip_netconn_is_err_msg>
 8016d0c:	4603      	mov	r3, r0
 8016d0e:	2b00      	cmp	r3, #0
 8016d10:	d113      	bne.n	8016d3a <netconn_drain+0xc6>
          struct netconn *newconn = (struct netconn *)mem;
 8016d12:	693b      	ldr	r3, [r7, #16]
 8016d14:	617b      	str	r3, [r7, #20]
          /* Only tcp pcbs have an acceptmbox, so no need to check conn->type */
          /* pcb might be set to NULL already by err_tcp() */
          /* drain recvmbox */
          netconn_drain(newconn);
 8016d16:	6978      	ldr	r0, [r7, #20]
 8016d18:	f7ff ffac 	bl	8016c74 <netconn_drain>
          if (newconn->pcb.tcp != NULL) {
 8016d1c:	697b      	ldr	r3, [r7, #20]
 8016d1e:	685b      	ldr	r3, [r3, #4]
 8016d20:	2b00      	cmp	r3, #0
 8016d22:	d007      	beq.n	8016d34 <netconn_drain+0xc0>
            tcp_abort(newconn->pcb.tcp);
 8016d24:	697b      	ldr	r3, [r7, #20]
 8016d26:	685b      	ldr	r3, [r3, #4]
 8016d28:	4618      	mov	r0, r3
 8016d2a:	f004 fdd5 	bl	801b8d8 <tcp_abort>
            newconn->pcb.tcp = NULL;
 8016d2e:	697b      	ldr	r3, [r7, #20]
 8016d30:	2200      	movs	r2, #0
 8016d32:	605a      	str	r2, [r3, #4]
          }
          netconn_free(newconn);
 8016d34:	6978      	ldr	r0, [r7, #20]
 8016d36:	f7ff ff53 	bl	8016be0 <netconn_free>
    while (sys_mbox_tryfetch(&conn->acceptmbox, &mem) != SYS_MBOX_EMPTY) {
 8016d3a:	687b      	ldr	r3, [r7, #4]
 8016d3c:	3314      	adds	r3, #20
 8016d3e:	f107 0210 	add.w	r2, r7, #16
 8016d42:	4611      	mov	r1, r2
 8016d44:	4618      	mov	r0, r3
 8016d46:	f00f fe82 	bl	8026a4e <sys_arch_mbox_tryfetch>
 8016d4a:	4603      	mov	r3, r0
 8016d4c:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8016d50:	d1d5      	bne.n	8016cfe <netconn_drain+0x8a>
        }
      }
    }
    sys_mbox_free(&conn->acceptmbox);
 8016d52:	687b      	ldr	r3, [r7, #4]
 8016d54:	3314      	adds	r3, #20
 8016d56:	4618      	mov	r0, r3
 8016d58:	f00f fe1c 	bl	8026994 <sys_mbox_free>
    sys_mbox_set_invalid(&conn->acceptmbox);
 8016d5c:	687b      	ldr	r3, [r7, #4]
 8016d5e:	3314      	adds	r3, #20
 8016d60:	4618      	mov	r0, r3
 8016d62:	f00f fe9c 	bl	8026a9e <sys_mbox_set_invalid>
  }
#endif /* LWIP_TCP */
}
 8016d66:	bf00      	nop
 8016d68:	3718      	adds	r7, #24
 8016d6a:	46bd      	mov	sp, r7
 8016d6c:	bd80      	pop	{r7, pc}
	...

08016d70 <lwip_netconn_do_close_internal>:
 *
 * @param conn the TCP netconn to close
 */
static err_t
lwip_netconn_do_close_internal(struct netconn *conn  WRITE_DELAYED_PARAM)
{
 8016d70:	b580      	push	{r7, lr}
 8016d72:	b086      	sub	sp, #24
 8016d74:	af00      	add	r7, sp, #0
 8016d76:	6078      	str	r0, [r7, #4]
 8016d78:	460b      	mov	r3, r1
 8016d7a:	70fb      	strb	r3, [r7, #3]
  err_t err;
  u8_t shut, shut_rx, shut_tx, shut_close;
  u8_t close_finished = 0;
 8016d7c:	2300      	movs	r3, #0
 8016d7e:	757b      	strb	r3, [r7, #21]
  struct tcp_pcb *tpcb;
#if LWIP_SO_LINGER
  u8_t linger_wait_required = 0;
#endif /* LWIP_SO_LINGER */

  LWIP_ASSERT("invalid conn", (conn != NULL));
 8016d80:	687b      	ldr	r3, [r7, #4]
 8016d82:	2b00      	cmp	r3, #0
 8016d84:	d106      	bne.n	8016d94 <lwip_netconn_do_close_internal+0x24>
 8016d86:	4b87      	ldr	r3, [pc, #540]	@ (8016fa4 <lwip_netconn_do_close_internal+0x234>)
 8016d88:	f240 32a2 	movw	r2, #930	@ 0x3a2
 8016d8c:	4986      	ldr	r1, [pc, #536]	@ (8016fa8 <lwip_netconn_do_close_internal+0x238>)
 8016d8e:	4887      	ldr	r0, [pc, #540]	@ (8016fac <lwip_netconn_do_close_internal+0x23c>)
 8016d90:	f013 fa14 	bl	802a1bc <iprintf>
  LWIP_ASSERT("this is for tcp netconns only", (NETCONNTYPE_GROUP(conn->type) == NETCONN_TCP));
 8016d94:	687b      	ldr	r3, [r7, #4]
 8016d96:	781b      	ldrb	r3, [r3, #0]
 8016d98:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8016d9c:	2b10      	cmp	r3, #16
 8016d9e:	d006      	beq.n	8016dae <lwip_netconn_do_close_internal+0x3e>
 8016da0:	4b80      	ldr	r3, [pc, #512]	@ (8016fa4 <lwip_netconn_do_close_internal+0x234>)
 8016da2:	f240 32a3 	movw	r2, #931	@ 0x3a3
 8016da6:	4982      	ldr	r1, [pc, #520]	@ (8016fb0 <lwip_netconn_do_close_internal+0x240>)
 8016da8:	4880      	ldr	r0, [pc, #512]	@ (8016fac <lwip_netconn_do_close_internal+0x23c>)
 8016daa:	f013 fa07 	bl	802a1bc <iprintf>
  LWIP_ASSERT("conn must be in state NETCONN_CLOSE", (conn->state == NETCONN_CLOSE));
 8016dae:	687b      	ldr	r3, [r7, #4]
 8016db0:	785b      	ldrb	r3, [r3, #1]
 8016db2:	2b04      	cmp	r3, #4
 8016db4:	d006      	beq.n	8016dc4 <lwip_netconn_do_close_internal+0x54>
 8016db6:	4b7b      	ldr	r3, [pc, #492]	@ (8016fa4 <lwip_netconn_do_close_internal+0x234>)
 8016db8:	f44f 7269 	mov.w	r2, #932	@ 0x3a4
 8016dbc:	497d      	ldr	r1, [pc, #500]	@ (8016fb4 <lwip_netconn_do_close_internal+0x244>)
 8016dbe:	487b      	ldr	r0, [pc, #492]	@ (8016fac <lwip_netconn_do_close_internal+0x23c>)
 8016dc0:	f013 f9fc 	bl	802a1bc <iprintf>
  LWIP_ASSERT("pcb already closed", (conn->pcb.tcp != NULL));
 8016dc4:	687b      	ldr	r3, [r7, #4]
 8016dc6:	685b      	ldr	r3, [r3, #4]
 8016dc8:	2b00      	cmp	r3, #0
 8016dca:	d106      	bne.n	8016dda <lwip_netconn_do_close_internal+0x6a>
 8016dcc:	4b75      	ldr	r3, [pc, #468]	@ (8016fa4 <lwip_netconn_do_close_internal+0x234>)
 8016dce:	f240 32a5 	movw	r2, #933	@ 0x3a5
 8016dd2:	4979      	ldr	r1, [pc, #484]	@ (8016fb8 <lwip_netconn_do_close_internal+0x248>)
 8016dd4:	4875      	ldr	r0, [pc, #468]	@ (8016fac <lwip_netconn_do_close_internal+0x23c>)
 8016dd6:	f013 f9f1 	bl	802a1bc <iprintf>
  LWIP_ASSERT("conn->current_msg != NULL", conn->current_msg != NULL);
 8016dda:	687b      	ldr	r3, [r7, #4]
 8016ddc:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016dde:	2b00      	cmp	r3, #0
 8016de0:	d106      	bne.n	8016df0 <lwip_netconn_do_close_internal+0x80>
 8016de2:	4b70      	ldr	r3, [pc, #448]	@ (8016fa4 <lwip_netconn_do_close_internal+0x234>)
 8016de4:	f240 32a6 	movw	r2, #934	@ 0x3a6
 8016de8:	4974      	ldr	r1, [pc, #464]	@ (8016fbc <lwip_netconn_do_close_internal+0x24c>)
 8016dea:	4870      	ldr	r0, [pc, #448]	@ (8016fac <lwip_netconn_do_close_internal+0x23c>)
 8016dec:	f013 f9e6 	bl	802a1bc <iprintf>

  tpcb = conn->pcb.tcp;
 8016df0:	687b      	ldr	r3, [r7, #4]
 8016df2:	685b      	ldr	r3, [r3, #4]
 8016df4:	613b      	str	r3, [r7, #16]
  shut = conn->current_msg->msg.sd.shut;
 8016df6:	687b      	ldr	r3, [r7, #4]
 8016df8:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016dfa:	7a1b      	ldrb	r3, [r3, #8]
 8016dfc:	73fb      	strb	r3, [r7, #15]
  shut_rx = shut & NETCONN_SHUT_RD;
 8016dfe:	7bfb      	ldrb	r3, [r7, #15]
 8016e00:	f003 0301 	and.w	r3, r3, #1
 8016e04:	73bb      	strb	r3, [r7, #14]
  shut_tx = shut & NETCONN_SHUT_WR;
 8016e06:	7bfb      	ldrb	r3, [r7, #15]
 8016e08:	f003 0302 	and.w	r3, r3, #2
 8016e0c:	737b      	strb	r3, [r7, #13]
  /* shutting down both ends is the same as closing
     (also if RD or WR side was shut down before already) */
  if (shut == NETCONN_SHUT_RDWR) {
 8016e0e:	7bfb      	ldrb	r3, [r7, #15]
 8016e10:	2b03      	cmp	r3, #3
 8016e12:	d102      	bne.n	8016e1a <lwip_netconn_do_close_internal+0xaa>
    shut_close = 1;
 8016e14:	2301      	movs	r3, #1
 8016e16:	75bb      	strb	r3, [r7, #22]
 8016e18:	e01f      	b.n	8016e5a <lwip_netconn_do_close_internal+0xea>
  } else if (shut_rx &&
 8016e1a:	7bbb      	ldrb	r3, [r7, #14]
 8016e1c:	2b00      	cmp	r3, #0
 8016e1e:	d00e      	beq.n	8016e3e <lwip_netconn_do_close_internal+0xce>
             ((tpcb->state == FIN_WAIT_1) ||
 8016e20:	693b      	ldr	r3, [r7, #16]
 8016e22:	7d1b      	ldrb	r3, [r3, #20]
  } else if (shut_rx &&
 8016e24:	2b05      	cmp	r3, #5
 8016e26:	d007      	beq.n	8016e38 <lwip_netconn_do_close_internal+0xc8>
              (tpcb->state == FIN_WAIT_2) ||
 8016e28:	693b      	ldr	r3, [r7, #16]
 8016e2a:	7d1b      	ldrb	r3, [r3, #20]
             ((tpcb->state == FIN_WAIT_1) ||
 8016e2c:	2b06      	cmp	r3, #6
 8016e2e:	d003      	beq.n	8016e38 <lwip_netconn_do_close_internal+0xc8>
              (tpcb->state == CLOSING))) {
 8016e30:	693b      	ldr	r3, [r7, #16]
 8016e32:	7d1b      	ldrb	r3, [r3, #20]
              (tpcb->state == FIN_WAIT_2) ||
 8016e34:	2b08      	cmp	r3, #8
 8016e36:	d102      	bne.n	8016e3e <lwip_netconn_do_close_internal+0xce>
    shut_close = 1;
 8016e38:	2301      	movs	r3, #1
 8016e3a:	75bb      	strb	r3, [r7, #22]
 8016e3c:	e00d      	b.n	8016e5a <lwip_netconn_do_close_internal+0xea>
  } else if (shut_tx && ((tpcb->flags & TF_RXCLOSED) != 0)) {
 8016e3e:	7b7b      	ldrb	r3, [r7, #13]
 8016e40:	2b00      	cmp	r3, #0
 8016e42:	d008      	beq.n	8016e56 <lwip_netconn_do_close_internal+0xe6>
 8016e44:	693b      	ldr	r3, [r7, #16]
 8016e46:	8b5b      	ldrh	r3, [r3, #26]
 8016e48:	f003 0310 	and.w	r3, r3, #16
 8016e4c:	2b00      	cmp	r3, #0
 8016e4e:	d002      	beq.n	8016e56 <lwip_netconn_do_close_internal+0xe6>
    shut_close = 1;
 8016e50:	2301      	movs	r3, #1
 8016e52:	75bb      	strb	r3, [r7, #22]
 8016e54:	e001      	b.n	8016e5a <lwip_netconn_do_close_internal+0xea>
  } else {
    shut_close = 0;
 8016e56:	2300      	movs	r3, #0
 8016e58:	75bb      	strb	r3, [r7, #22]
  }

  /* Set back some callback pointers */
  if (shut_close) {
 8016e5a:	7dbb      	ldrb	r3, [r7, #22]
 8016e5c:	2b00      	cmp	r3, #0
 8016e5e:	d003      	beq.n	8016e68 <lwip_netconn_do_close_internal+0xf8>
    tcp_arg(tpcb, NULL);
 8016e60:	2100      	movs	r1, #0
 8016e62:	6938      	ldr	r0, [r7, #16]
 8016e64:	f005 fd88 	bl	801c978 <tcp_arg>
  }
  if (tpcb->state == LISTEN) {
 8016e68:	693b      	ldr	r3, [r7, #16]
 8016e6a:	7d1b      	ldrb	r3, [r3, #20]
 8016e6c:	2b01      	cmp	r3, #1
 8016e6e:	d104      	bne.n	8016e7a <lwip_netconn_do_close_internal+0x10a>
    tcp_accept(tpcb, NULL);
 8016e70:	2100      	movs	r1, #0
 8016e72:	6938      	ldr	r0, [r7, #16]
 8016e74:	f005 fdfe 	bl	801ca74 <tcp_accept>
 8016e78:	e01d      	b.n	8016eb6 <lwip_netconn_do_close_internal+0x146>
  } else {
    /* some callbacks have to be reset if tcp_close is not successful */
    if (shut_rx) {
 8016e7a:	7bbb      	ldrb	r3, [r7, #14]
 8016e7c:	2b00      	cmp	r3, #0
 8016e7e:	d007      	beq.n	8016e90 <lwip_netconn_do_close_internal+0x120>
      tcp_recv(tpcb, NULL);
 8016e80:	2100      	movs	r1, #0
 8016e82:	6938      	ldr	r0, [r7, #16]
 8016e84:	f005 fd8a 	bl	801c99c <tcp_recv>
      tcp_accept(tpcb, NULL);
 8016e88:	2100      	movs	r1, #0
 8016e8a:	6938      	ldr	r0, [r7, #16]
 8016e8c:	f005 fdf2 	bl	801ca74 <tcp_accept>
    }
    if (shut_tx) {
 8016e90:	7b7b      	ldrb	r3, [r7, #13]
 8016e92:	2b00      	cmp	r3, #0
 8016e94:	d003      	beq.n	8016e9e <lwip_netconn_do_close_internal+0x12e>
      tcp_sent(tpcb, NULL);
 8016e96:	2100      	movs	r1, #0
 8016e98:	6938      	ldr	r0, [r7, #16]
 8016e9a:	f005 fda3 	bl	801c9e4 <tcp_sent>
    }
    if (shut_close) {
 8016e9e:	7dbb      	ldrb	r3, [r7, #22]
 8016ea0:	2b00      	cmp	r3, #0
 8016ea2:	d008      	beq.n	8016eb6 <lwip_netconn_do_close_internal+0x146>
      tcp_poll(tpcb, NULL, 0);
 8016ea4:	2200      	movs	r2, #0
 8016ea6:	2100      	movs	r1, #0
 8016ea8:	6938      	ldr	r0, [r7, #16]
 8016eaa:	f005 fdfb 	bl	801caa4 <tcp_poll>
      tcp_err(tpcb, NULL);
 8016eae:	2100      	movs	r1, #0
 8016eb0:	6938      	ldr	r0, [r7, #16]
 8016eb2:	f005 fdbb 	bl	801ca2c <tcp_err>
    }
  }
  /* Try to close the connection */
  if (shut_close) {
 8016eb6:	7dbb      	ldrb	r3, [r7, #22]
 8016eb8:	2b00      	cmp	r3, #0
 8016eba:	d005      	beq.n	8016ec8 <lwip_netconn_do_close_internal+0x158>
      }
    }
    if ((err == ERR_OK) && (tpcb != NULL))
#endif /* LWIP_SO_LINGER */
    {
      err = tcp_close(tpcb);
 8016ebc:	6938      	ldr	r0, [r7, #16]
 8016ebe:	f004 fbbf 	bl	801b640 <tcp_close>
 8016ec2:	4603      	mov	r3, r0
 8016ec4:	75fb      	strb	r3, [r7, #23]
 8016ec6:	e007      	b.n	8016ed8 <lwip_netconn_do_close_internal+0x168>
    }
  } else {
    err = tcp_shutdown(tpcb, shut_rx, shut_tx);
 8016ec8:	7bbb      	ldrb	r3, [r7, #14]
 8016eca:	7b7a      	ldrb	r2, [r7, #13]
 8016ecc:	4619      	mov	r1, r3
 8016ece:	6938      	ldr	r0, [r7, #16]
 8016ed0:	f004 fbe4 	bl	801b69c <tcp_shutdown>
 8016ed4:	4603      	mov	r3, r0
 8016ed6:	75fb      	strb	r3, [r7, #23]
  }
  if (err == ERR_OK) {
 8016ed8:	f997 3017 	ldrsb.w	r3, [r7, #23]
 8016edc:	2b00      	cmp	r3, #0
 8016ede:	d102      	bne.n	8016ee6 <lwip_netconn_do_close_internal+0x176>
    close_finished = 1;
 8016ee0:	2301      	movs	r3, #1
 8016ee2:	757b      	strb	r3, [r7, #21]
 8016ee4:	e016      	b.n	8016f14 <lwip_netconn_do_close_internal+0x1a4>
      close_finished = 0;
      err = ERR_INPROGRESS;
    }
#endif /* LWIP_SO_LINGER */
  } else {
    if (err == ERR_MEM) {
 8016ee6:	f997 3017 	ldrsb.w	r3, [r7, #23]
 8016eea:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8016eee:	d10f      	bne.n	8016f10 <lwip_netconn_do_close_internal+0x1a0>
        close_timeout = conn->linger * 1000U;
      }
#endif
      if ((s32_t)(sys_now() - conn->current_msg->msg.sd.time_started) >= close_timeout) {
#else /* LWIP_SO_SNDTIMEO || LWIP_SO_LINGER */
      if (conn->current_msg->msg.sd.polls_left == 0) {
 8016ef0:	687b      	ldr	r3, [r7, #4]
 8016ef2:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016ef4:	7a5b      	ldrb	r3, [r3, #9]
 8016ef6:	2b00      	cmp	r3, #0
 8016ef8:	d10c      	bne.n	8016f14 <lwip_netconn_do_close_internal+0x1a4>
#endif /* LWIP_SO_SNDTIMEO || LWIP_SO_LINGER */
        close_finished = 1;
 8016efa:	2301      	movs	r3, #1
 8016efc:	757b      	strb	r3, [r7, #21]
        if (shut_close) {
 8016efe:	7dbb      	ldrb	r3, [r7, #22]
 8016f00:	2b00      	cmp	r3, #0
 8016f02:	d007      	beq.n	8016f14 <lwip_netconn_do_close_internal+0x1a4>
          /* in this case, we want to RST the connection */
          tcp_abort(tpcb);
 8016f04:	6938      	ldr	r0, [r7, #16]
 8016f06:	f004 fce7 	bl	801b8d8 <tcp_abort>
          err = ERR_OK;
 8016f0a:	2300      	movs	r3, #0
 8016f0c:	75fb      	strb	r3, [r7, #23]
 8016f0e:	e001      	b.n	8016f14 <lwip_netconn_do_close_internal+0x1a4>
        }
      }
    } else {
      /* Closing failed for a non-memory error: give up */
      close_finished = 1;
 8016f10:	2301      	movs	r3, #1
 8016f12:	757b      	strb	r3, [r7, #21]
    }
  }
  if (close_finished) {
 8016f14:	7d7b      	ldrb	r3, [r7, #21]
 8016f16:	2b00      	cmp	r3, #0
 8016f18:	d052      	beq.n	8016fc0 <lwip_netconn_do_close_internal+0x250>
    /* Closing done (succeeded, non-memory error, nonblocking error or timeout) */
    sys_sem_t *op_completed_sem = LWIP_API_MSG_SEM(conn->current_msg);
 8016f1a:	687b      	ldr	r3, [r7, #4]
 8016f1c:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016f1e:	681b      	ldr	r3, [r3, #0]
 8016f20:	330c      	adds	r3, #12
 8016f22:	60bb      	str	r3, [r7, #8]
    conn->current_msg->err = err;
 8016f24:	687b      	ldr	r3, [r7, #4]
 8016f26:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016f28:	7dfa      	ldrb	r2, [r7, #23]
 8016f2a:	711a      	strb	r2, [r3, #4]
    conn->current_msg = NULL;
 8016f2c:	687b      	ldr	r3, [r7, #4]
 8016f2e:	2200      	movs	r2, #0
 8016f30:	62da      	str	r2, [r3, #44]	@ 0x2c
    conn->state = NETCONN_NONE;
 8016f32:	687b      	ldr	r3, [r7, #4]
 8016f34:	2200      	movs	r2, #0
 8016f36:	705a      	strb	r2, [r3, #1]
    if (err == ERR_OK) {
 8016f38:	f997 3017 	ldrsb.w	r3, [r7, #23]
 8016f3c:	2b00      	cmp	r3, #0
 8016f3e:	d129      	bne.n	8016f94 <lwip_netconn_do_close_internal+0x224>
      if (shut_close) {
 8016f40:	7dbb      	ldrb	r3, [r7, #22]
 8016f42:	2b00      	cmp	r3, #0
 8016f44:	d00c      	beq.n	8016f60 <lwip_netconn_do_close_internal+0x1f0>
        /* Set back some callback pointers as conn is going away */
        conn->pcb.tcp = NULL;
 8016f46:	687b      	ldr	r3, [r7, #4]
 8016f48:	2200      	movs	r2, #0
 8016f4a:	605a      	str	r2, [r3, #4]
        /* Trigger select() in socket layer. Make sure everybody notices activity
         on the connection, error first! */
        API_EVENT(conn, NETCONN_EVT_ERROR, 0);
 8016f4c:	687b      	ldr	r3, [r7, #4]
 8016f4e:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8016f50:	2b00      	cmp	r3, #0
 8016f52:	d005      	beq.n	8016f60 <lwip_netconn_do_close_internal+0x1f0>
 8016f54:	687b      	ldr	r3, [r7, #4]
 8016f56:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8016f58:	2200      	movs	r2, #0
 8016f5a:	2104      	movs	r1, #4
 8016f5c:	6878      	ldr	r0, [r7, #4]
 8016f5e:	4798      	blx	r3
      }
      if (shut_rx) {
 8016f60:	7bbb      	ldrb	r3, [r7, #14]
 8016f62:	2b00      	cmp	r3, #0
 8016f64:	d009      	beq.n	8016f7a <lwip_netconn_do_close_internal+0x20a>
        API_EVENT(conn, NETCONN_EVT_RCVPLUS, 0);
 8016f66:	687b      	ldr	r3, [r7, #4]
 8016f68:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8016f6a:	2b00      	cmp	r3, #0
 8016f6c:	d005      	beq.n	8016f7a <lwip_netconn_do_close_internal+0x20a>
 8016f6e:	687b      	ldr	r3, [r7, #4]
 8016f70:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8016f72:	2200      	movs	r2, #0
 8016f74:	2100      	movs	r1, #0
 8016f76:	6878      	ldr	r0, [r7, #4]
 8016f78:	4798      	blx	r3
      }
      if (shut_tx) {
 8016f7a:	7b7b      	ldrb	r3, [r7, #13]
 8016f7c:	2b00      	cmp	r3, #0
 8016f7e:	d009      	beq.n	8016f94 <lwip_netconn_do_close_internal+0x224>
        API_EVENT(conn, NETCONN_EVT_SENDPLUS, 0);
 8016f80:	687b      	ldr	r3, [r7, #4]
 8016f82:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8016f84:	2b00      	cmp	r3, #0
 8016f86:	d005      	beq.n	8016f94 <lwip_netconn_do_close_internal+0x224>
 8016f88:	687b      	ldr	r3, [r7, #4]
 8016f8a:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8016f8c:	2200      	movs	r2, #0
 8016f8e:	2102      	movs	r1, #2
 8016f90:	6878      	ldr	r0, [r7, #4]
 8016f92:	4798      	blx	r3
      }
    }
#if LWIP_TCPIP_CORE_LOCKING
    if (delayed)
 8016f94:	78fb      	ldrb	r3, [r7, #3]
 8016f96:	2b00      	cmp	r3, #0
 8016f98:	d002      	beq.n	8016fa0 <lwip_netconn_do_close_internal+0x230>
#endif
    {
      /* wake up the application task */
      sys_sem_signal(op_completed_sem);
 8016f9a:	68b8      	ldr	r0, [r7, #8]
 8016f9c:	f00f fde2 	bl	8026b64 <sys_sem_signal>
    }
    return ERR_OK;
 8016fa0:	2300      	movs	r3, #0
 8016fa2:	e03c      	b.n	801701e <lwip_netconn_do_close_internal+0x2ae>
 8016fa4:	0802d770 	.word	0x0802d770
 8016fa8:	0802da44 	.word	0x0802da44
 8016fac:	0802d7b4 	.word	0x0802d7b4
 8016fb0:	0802da54 	.word	0x0802da54
 8016fb4:	0802da74 	.word	0x0802da74
 8016fb8:	0802da98 	.word	0x0802da98
 8016fbc:	0802d8d8 	.word	0x0802d8d8
  }
  if (!close_finished) {
 8016fc0:	7d7b      	ldrb	r3, [r7, #21]
 8016fc2:	2b00      	cmp	r3, #0
 8016fc4:	d11e      	bne.n	8017004 <lwip_netconn_do_close_internal+0x294>
    /* Closing failed and we want to wait: restore some of the callbacks */
    /* Closing of listen pcb will never fail! */
    LWIP_ASSERT("Closing a listen pcb may not fail!", (tpcb->state != LISTEN));
 8016fc6:	693b      	ldr	r3, [r7, #16]
 8016fc8:	7d1b      	ldrb	r3, [r3, #20]
 8016fca:	2b01      	cmp	r3, #1
 8016fcc:	d106      	bne.n	8016fdc <lwip_netconn_do_close_internal+0x26c>
 8016fce:	4b16      	ldr	r3, [pc, #88]	@ (8017028 <lwip_netconn_do_close_internal+0x2b8>)
 8016fd0:	f240 4241 	movw	r2, #1089	@ 0x441
 8016fd4:	4915      	ldr	r1, [pc, #84]	@ (801702c <lwip_netconn_do_close_internal+0x2bc>)
 8016fd6:	4816      	ldr	r0, [pc, #88]	@ (8017030 <lwip_netconn_do_close_internal+0x2c0>)
 8016fd8:	f013 f8f0 	bl	802a1bc <iprintf>
    if (shut_tx) {
 8016fdc:	7b7b      	ldrb	r3, [r7, #13]
 8016fde:	2b00      	cmp	r3, #0
 8016fe0:	d003      	beq.n	8016fea <lwip_netconn_do_close_internal+0x27a>
      tcp_sent(tpcb, sent_tcp);
 8016fe2:	4914      	ldr	r1, [pc, #80]	@ (8017034 <lwip_netconn_do_close_internal+0x2c4>)
 8016fe4:	6938      	ldr	r0, [r7, #16]
 8016fe6:	f005 fcfd 	bl	801c9e4 <tcp_sent>
    }
    /* when waiting for close, set up poll interval to 500ms */
    tcp_poll(tpcb, poll_tcp, 1);
 8016fea:	2201      	movs	r2, #1
 8016fec:	4912      	ldr	r1, [pc, #72]	@ (8017038 <lwip_netconn_do_close_internal+0x2c8>)
 8016fee:	6938      	ldr	r0, [r7, #16]
 8016ff0:	f005 fd58 	bl	801caa4 <tcp_poll>
    tcp_err(tpcb, err_tcp);
 8016ff4:	4911      	ldr	r1, [pc, #68]	@ (801703c <lwip_netconn_do_close_internal+0x2cc>)
 8016ff6:	6938      	ldr	r0, [r7, #16]
 8016ff8:	f005 fd18 	bl	801ca2c <tcp_err>
    tcp_arg(tpcb, conn);
 8016ffc:	6879      	ldr	r1, [r7, #4]
 8016ffe:	6938      	ldr	r0, [r7, #16]
 8017000:	f005 fcba 	bl	801c978 <tcp_arg>
    /* don't restore recv callback: we don't want to receive any more data */
  }
  /* If closing didn't succeed, we get called again either
     from poll_tcp or from sent_tcp */
  LWIP_ASSERT("err != ERR_OK", err != ERR_OK);
 8017004:	f997 3017 	ldrsb.w	r3, [r7, #23]
 8017008:	2b00      	cmp	r3, #0
 801700a:	d106      	bne.n	801701a <lwip_netconn_do_close_internal+0x2aa>
 801700c:	4b06      	ldr	r3, [pc, #24]	@ (8017028 <lwip_netconn_do_close_internal+0x2b8>)
 801700e:	f240 424d 	movw	r2, #1101	@ 0x44d
 8017012:	490b      	ldr	r1, [pc, #44]	@ (8017040 <lwip_netconn_do_close_internal+0x2d0>)
 8017014:	4806      	ldr	r0, [pc, #24]	@ (8017030 <lwip_netconn_do_close_internal+0x2c0>)
 8017016:	f013 f8d1 	bl	802a1bc <iprintf>
  return err;
 801701a:	f997 3017 	ldrsb.w	r3, [r7, #23]
}
 801701e:	4618      	mov	r0, r3
 8017020:	3718      	adds	r7, #24
 8017022:	46bd      	mov	sp, r7
 8017024:	bd80      	pop	{r7, pc}
 8017026:	bf00      	nop
 8017028:	0802d770 	.word	0x0802d770
 801702c:	0802daac 	.word	0x0802daac
 8017030:	0802d7b4 	.word	0x0802d7b4
 8017034:	08016739 	.word	0x08016739
 8017038:	08016669 	.word	0x08016669
 801703c:	080167e9 	.word	0x080167e9
 8017040:	0802dad0 	.word	0x0802dad0

08017044 <lwip_netconn_do_delconn>:
 *
 * @param m the api_msg pointing to the connection
 */
void
lwip_netconn_do_delconn(void *m)
{
 8017044:	b580      	push	{r7, lr}
 8017046:	b084      	sub	sp, #16
 8017048:	af00      	add	r7, sp, #0
 801704a:	6078      	str	r0, [r7, #4]
  struct api_msg *msg = (struct api_msg *)m;
 801704c:	687b      	ldr	r3, [r7, #4]
 801704e:	60fb      	str	r3, [r7, #12]

  enum netconn_state state = msg->conn->state;
 8017050:	68fb      	ldr	r3, [r7, #12]
 8017052:	681b      	ldr	r3, [r3, #0]
 8017054:	785b      	ldrb	r3, [r3, #1]
 8017056:	72fb      	strb	r3, [r7, #11]
  LWIP_ASSERT("netconn state error", /* this only happens for TCP netconns */
 8017058:	7afb      	ldrb	r3, [r7, #11]
 801705a:	2b00      	cmp	r3, #0
 801705c:	d00d      	beq.n	801707a <lwip_netconn_do_delconn+0x36>
 801705e:	68fb      	ldr	r3, [r7, #12]
 8017060:	681b      	ldr	r3, [r3, #0]
 8017062:	781b      	ldrb	r3, [r3, #0]
 8017064:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8017068:	2b10      	cmp	r3, #16
 801706a:	d006      	beq.n	801707a <lwip_netconn_do_delconn+0x36>
 801706c:	4b60      	ldr	r3, [pc, #384]	@ (80171f0 <lwip_netconn_do_delconn+0x1ac>)
 801706e:	f240 425e 	movw	r2, #1118	@ 0x45e
 8017072:	4960      	ldr	r1, [pc, #384]	@ (80171f4 <lwip_netconn_do_delconn+0x1b0>)
 8017074:	4860      	ldr	r0, [pc, #384]	@ (80171f8 <lwip_netconn_do_delconn+0x1b4>)
 8017076:	f013 f8a1 	bl	802a1bc <iprintf>
      msg->conn->state = NETCONN_NONE;
      sys_sem_signal(op_completed_sem);
    }
  }
#else /* LWIP_NETCONN_FULLDUPLEX */
  if (((state != NETCONN_NONE) &&
 801707a:	7afb      	ldrb	r3, [r7, #11]
 801707c:	2b00      	cmp	r3, #0
 801707e:	d005      	beq.n	801708c <lwip_netconn_do_delconn+0x48>
 8017080:	7afb      	ldrb	r3, [r7, #11]
 8017082:	2b02      	cmp	r3, #2
 8017084:	d002      	beq.n	801708c <lwip_netconn_do_delconn+0x48>
       (state != NETCONN_LISTEN) &&
 8017086:	7afb      	ldrb	r3, [r7, #11]
 8017088:	2b03      	cmp	r3, #3
 801708a:	d10a      	bne.n	80170a2 <lwip_netconn_do_delconn+0x5e>
       (state != NETCONN_CONNECT)) ||
 801708c:	7afb      	ldrb	r3, [r7, #11]
 801708e:	2b03      	cmp	r3, #3
 8017090:	d10b      	bne.n	80170aa <lwip_netconn_do_delconn+0x66>
      ((state == NETCONN_CONNECT) && !IN_NONBLOCKING_CONNECT(msg->conn))) {
 8017092:	68fb      	ldr	r3, [r7, #12]
 8017094:	681b      	ldr	r3, [r3, #0]
 8017096:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 801709a:	f003 0304 	and.w	r3, r3, #4
 801709e:	2b00      	cmp	r3, #0
 80170a0:	d103      	bne.n	80170aa <lwip_netconn_do_delconn+0x66>
    /* This means either a blocking write or blocking connect is running
       (nonblocking write returns and sets state to NONE) */
    msg->err = ERR_INPROGRESS;
 80170a2:	68fb      	ldr	r3, [r7, #12]
 80170a4:	22fb      	movs	r2, #251	@ 0xfb
 80170a6:	711a      	strb	r2, [r3, #4]
 80170a8:	e096      	b.n	80171d8 <lwip_netconn_do_delconn+0x194>
  } else
#endif /* LWIP_NETCONN_FULLDUPLEX */
  {
    LWIP_ASSERT("blocking connect in progress",
 80170aa:	7afb      	ldrb	r3, [r7, #11]
 80170ac:	2b03      	cmp	r3, #3
 80170ae:	d10e      	bne.n	80170ce <lwip_netconn_do_delconn+0x8a>
 80170b0:	68fb      	ldr	r3, [r7, #12]
 80170b2:	681b      	ldr	r3, [r3, #0]
 80170b4:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 80170b8:	f003 0304 	and.w	r3, r3, #4
 80170bc:	2b00      	cmp	r3, #0
 80170be:	d106      	bne.n	80170ce <lwip_netconn_do_delconn+0x8a>
 80170c0:	4b4b      	ldr	r3, [pc, #300]	@ (80171f0 <lwip_netconn_do_delconn+0x1ac>)
 80170c2:	f240 427a 	movw	r2, #1146	@ 0x47a
 80170c6:	494d      	ldr	r1, [pc, #308]	@ (80171fc <lwip_netconn_do_delconn+0x1b8>)
 80170c8:	484b      	ldr	r0, [pc, #300]	@ (80171f8 <lwip_netconn_do_delconn+0x1b4>)
 80170ca:	f013 f877 	bl	802a1bc <iprintf>
                (state != NETCONN_CONNECT) || IN_NONBLOCKING_CONNECT(msg->conn));
    msg->err = ERR_OK;
 80170ce:	68fb      	ldr	r3, [r7, #12]
 80170d0:	2200      	movs	r2, #0
 80170d2:	711a      	strb	r2, [r3, #4]
#if LWIP_NETCONN_FULLDUPLEX
    /* Mark mboxes invalid */
    netconn_mark_mbox_invalid(msg->conn);
#else /* LWIP_NETCONN_FULLDUPLEX */
    netconn_drain(msg->conn);
 80170d4:	68fb      	ldr	r3, [r7, #12]
 80170d6:	681b      	ldr	r3, [r3, #0]
 80170d8:	4618      	mov	r0, r3
 80170da:	f7ff fdcb 	bl	8016c74 <netconn_drain>
#endif /* LWIP_NETCONN_FULLDUPLEX */

    if (msg->conn->pcb.tcp != NULL) {
 80170de:	68fb      	ldr	r3, [r7, #12]
 80170e0:	681b      	ldr	r3, [r3, #0]
 80170e2:	685b      	ldr	r3, [r3, #4]
 80170e4:	2b00      	cmp	r3, #0
 80170e6:	d05d      	beq.n	80171a4 <lwip_netconn_do_delconn+0x160>

      switch (NETCONNTYPE_GROUP(msg->conn->type)) {
 80170e8:	68fb      	ldr	r3, [r7, #12]
 80170ea:	681b      	ldr	r3, [r3, #0]
 80170ec:	781b      	ldrb	r3, [r3, #0]
 80170ee:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 80170f2:	2b10      	cmp	r3, #16
 80170f4:	d00d      	beq.n	8017112 <lwip_netconn_do_delconn+0xce>
 80170f6:	2b20      	cmp	r3, #32
 80170f8:	d14f      	bne.n	801719a <lwip_netconn_do_delconn+0x156>
          raw_remove(msg->conn->pcb.raw);
          break;
#endif /* LWIP_RAW */
#if LWIP_UDP
        case NETCONN_UDP:
          msg->conn->pcb.udp->recv_arg = NULL;
 80170fa:	68fb      	ldr	r3, [r7, #12]
 80170fc:	681b      	ldr	r3, [r3, #0]
 80170fe:	685b      	ldr	r3, [r3, #4]
 8017100:	2200      	movs	r2, #0
 8017102:	61da      	str	r2, [r3, #28]
          udp_remove(msg->conn->pcb.udp);
 8017104:	68fb      	ldr	r3, [r7, #12]
 8017106:	681b      	ldr	r3, [r3, #0]
 8017108:	685b      	ldr	r3, [r3, #4]
 801710a:	4618      	mov	r0, r3
 801710c:	f00a ffc6 	bl	802209c <udp_remove>
          break;
 8017110:	e044      	b.n	801719c <lwip_netconn_do_delconn+0x158>
#endif /* LWIP_UDP */
#if LWIP_TCP
        case NETCONN_TCP:
          LWIP_ASSERT("already writing or closing", msg->conn->current_msg == NULL);
 8017112:	68fb      	ldr	r3, [r7, #12]
 8017114:	681b      	ldr	r3, [r3, #0]
 8017116:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017118:	2b00      	cmp	r3, #0
 801711a:	d006      	beq.n	801712a <lwip_netconn_do_delconn+0xe6>
 801711c:	4b34      	ldr	r3, [pc, #208]	@ (80171f0 <lwip_netconn_do_delconn+0x1ac>)
 801711e:	f240 4294 	movw	r2, #1172	@ 0x494
 8017122:	4937      	ldr	r1, [pc, #220]	@ (8017200 <lwip_netconn_do_delconn+0x1bc>)
 8017124:	4834      	ldr	r0, [pc, #208]	@ (80171f8 <lwip_netconn_do_delconn+0x1b4>)
 8017126:	f013 f849 	bl	802a1bc <iprintf>
          msg->conn->state = NETCONN_CLOSE;
 801712a:	68fb      	ldr	r3, [r7, #12]
 801712c:	681b      	ldr	r3, [r3, #0]
 801712e:	2204      	movs	r2, #4
 8017130:	705a      	strb	r2, [r3, #1]
          msg->msg.sd.shut = NETCONN_SHUT_RDWR;
 8017132:	68fb      	ldr	r3, [r7, #12]
 8017134:	2203      	movs	r2, #3
 8017136:	721a      	strb	r2, [r3, #8]
          msg->conn->current_msg = msg;
 8017138:	68fb      	ldr	r3, [r7, #12]
 801713a:	681b      	ldr	r3, [r3, #0]
 801713c:	68fa      	ldr	r2, [r7, #12]
 801713e:	62da      	str	r2, [r3, #44]	@ 0x2c
#if LWIP_TCPIP_CORE_LOCKING
          if (lwip_netconn_do_close_internal(msg->conn, 0) != ERR_OK) {
 8017140:	68fb      	ldr	r3, [r7, #12]
 8017142:	681b      	ldr	r3, [r3, #0]
 8017144:	2100      	movs	r1, #0
 8017146:	4618      	mov	r0, r3
 8017148:	f7ff fe12 	bl	8016d70 <lwip_netconn_do_close_internal>
 801714c:	4603      	mov	r3, r0
 801714e:	2b00      	cmp	r3, #0
 8017150:	d049      	beq.n	80171e6 <lwip_netconn_do_delconn+0x1a2>
            LWIP_ASSERT("state!", msg->conn->state == NETCONN_CLOSE);
 8017152:	68fb      	ldr	r3, [r7, #12]
 8017154:	681b      	ldr	r3, [r3, #0]
 8017156:	785b      	ldrb	r3, [r3, #1]
 8017158:	2b04      	cmp	r3, #4
 801715a:	d006      	beq.n	801716a <lwip_netconn_do_delconn+0x126>
 801715c:	4b24      	ldr	r3, [pc, #144]	@ (80171f0 <lwip_netconn_do_delconn+0x1ac>)
 801715e:	f240 429a 	movw	r2, #1178	@ 0x49a
 8017162:	4928      	ldr	r1, [pc, #160]	@ (8017204 <lwip_netconn_do_delconn+0x1c0>)
 8017164:	4824      	ldr	r0, [pc, #144]	@ (80171f8 <lwip_netconn_do_delconn+0x1b4>)
 8017166:	f013 f829 	bl	802a1bc <iprintf>
            UNLOCK_TCPIP_CORE();
 801716a:	f7f9 fc79 	bl	8010a60 <sys_unlock_tcpip_core>
            sys_arch_sem_wait(LWIP_API_MSG_SEM(msg), 0);
 801716e:	68fb      	ldr	r3, [r7, #12]
 8017170:	681b      	ldr	r3, [r3, #0]
 8017172:	330c      	adds	r3, #12
 8017174:	2100      	movs	r1, #0
 8017176:	4618      	mov	r0, r3
 8017178:	f00f fcc3 	bl	8026b02 <sys_arch_sem_wait>
            LOCK_TCPIP_CORE();
 801717c:	f7f9 fc60 	bl	8010a40 <sys_lock_tcpip_core>
            LWIP_ASSERT("state!", msg->conn->state == NETCONN_NONE);
 8017180:	68fb      	ldr	r3, [r7, #12]
 8017182:	681b      	ldr	r3, [r3, #0]
 8017184:	785b      	ldrb	r3, [r3, #1]
 8017186:	2b00      	cmp	r3, #0
 8017188:	d02d      	beq.n	80171e6 <lwip_netconn_do_delconn+0x1a2>
 801718a:	4b19      	ldr	r3, [pc, #100]	@ (80171f0 <lwip_netconn_do_delconn+0x1ac>)
 801718c:	f240 429e 	movw	r2, #1182	@ 0x49e
 8017190:	491c      	ldr	r1, [pc, #112]	@ (8017204 <lwip_netconn_do_delconn+0x1c0>)
 8017192:	4819      	ldr	r0, [pc, #100]	@ (80171f8 <lwip_netconn_do_delconn+0x1b4>)
 8017194:	f013 f812 	bl	802a1bc <iprintf>
#else /* LWIP_TCPIP_CORE_LOCKING */
          lwip_netconn_do_close_internal(msg->conn);
#endif /* LWIP_TCPIP_CORE_LOCKING */
          /* API_EVENT is called inside lwip_netconn_do_close_internal, before releasing
             the application thread, so we can return at this point! */
          return;
 8017198:	e025      	b.n	80171e6 <lwip_netconn_do_delconn+0x1a2>
#endif /* LWIP_TCP */
        default:
          break;
 801719a:	bf00      	nop
      }
      msg->conn->pcb.tcp = NULL;
 801719c:	68fb      	ldr	r3, [r7, #12]
 801719e:	681b      	ldr	r3, [r3, #0]
 80171a0:	2200      	movs	r2, #0
 80171a2:	605a      	str	r2, [r3, #4]
    }
    /* tcp netconns don't come here! */

    /* @todo: this lets select make the socket readable and writable,
       which is wrong! errfd instead? */
    API_EVENT(msg->conn, NETCONN_EVT_RCVPLUS, 0);
 80171a4:	68fb      	ldr	r3, [r7, #12]
 80171a6:	681b      	ldr	r3, [r3, #0]
 80171a8:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 80171aa:	2b00      	cmp	r3, #0
 80171ac:	d007      	beq.n	80171be <lwip_netconn_do_delconn+0x17a>
 80171ae:	68fb      	ldr	r3, [r7, #12]
 80171b0:	681b      	ldr	r3, [r3, #0]
 80171b2:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 80171b4:	68fa      	ldr	r2, [r7, #12]
 80171b6:	6810      	ldr	r0, [r2, #0]
 80171b8:	2200      	movs	r2, #0
 80171ba:	2100      	movs	r1, #0
 80171bc:	4798      	blx	r3
    API_EVENT(msg->conn, NETCONN_EVT_SENDPLUS, 0);
 80171be:	68fb      	ldr	r3, [r7, #12]
 80171c0:	681b      	ldr	r3, [r3, #0]
 80171c2:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 80171c4:	2b00      	cmp	r3, #0
 80171c6:	d007      	beq.n	80171d8 <lwip_netconn_do_delconn+0x194>
 80171c8:	68fb      	ldr	r3, [r7, #12]
 80171ca:	681b      	ldr	r3, [r3, #0]
 80171cc:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 80171ce:	68fa      	ldr	r2, [r7, #12]
 80171d0:	6810      	ldr	r0, [r2, #0]
 80171d2:	2200      	movs	r2, #0
 80171d4:	2102      	movs	r1, #2
 80171d6:	4798      	blx	r3
  }
  if (sys_sem_valid(LWIP_API_MSG_SEM(msg))) {
 80171d8:	68fb      	ldr	r3, [r7, #12]
 80171da:	681b      	ldr	r3, [r3, #0]
 80171dc:	330c      	adds	r3, #12
 80171de:	4618      	mov	r0, r3
 80171e0:	f00f fcda 	bl	8026b98 <sys_sem_valid>
 80171e4:	e000      	b.n	80171e8 <lwip_netconn_do_delconn+0x1a4>
          return;
 80171e6:	bf00      	nop
    TCPIP_APIMSG_ACK(msg);
  }
}
 80171e8:	3710      	adds	r7, #16
 80171ea:	46bd      	mov	sp, r7
 80171ec:	bd80      	pop	{r7, pc}
 80171ee:	bf00      	nop
 80171f0:	0802d770 	.word	0x0802d770
 80171f4:	0802dae0 	.word	0x0802dae0
 80171f8:	0802d7b4 	.word	0x0802d7b4
 80171fc:	0802daf4 	.word	0x0802daf4
 8017200:	0802db14 	.word	0x0802db14
 8017204:	0802db30 	.word	0x0802db30

08017208 <lwip_netconn_do_connected>:
 *
 * @see tcp.h (struct tcp_pcb.connected) for parameters and return values
 */
static err_t
lwip_netconn_do_connected(void *arg, struct tcp_pcb *pcb, err_t err)
{
 8017208:	b580      	push	{r7, lr}
 801720a:	b088      	sub	sp, #32
 801720c:	af00      	add	r7, sp, #0
 801720e:	60f8      	str	r0, [r7, #12]
 8017210:	60b9      	str	r1, [r7, #8]
 8017212:	4613      	mov	r3, r2
 8017214:	71fb      	strb	r3, [r7, #7]
  struct netconn *conn;
  int was_blocking;
  sys_sem_t *op_completed_sem = NULL;
 8017216:	2300      	movs	r3, #0
 8017218:	61fb      	str	r3, [r7, #28]

  LWIP_UNUSED_ARG(pcb);

  conn = (struct netconn *)arg;
 801721a:	68fb      	ldr	r3, [r7, #12]
 801721c:	61bb      	str	r3, [r7, #24]

  if (conn == NULL) {
 801721e:	69bb      	ldr	r3, [r7, #24]
 8017220:	2b00      	cmp	r3, #0
 8017222:	d102      	bne.n	801722a <lwip_netconn_do_connected+0x22>
    return ERR_VAL;
 8017224:	f06f 0305 	mvn.w	r3, #5
 8017228:	e074      	b.n	8017314 <lwip_netconn_do_connected+0x10c>
  }

  LWIP_ASSERT("conn->state == NETCONN_CONNECT", conn->state == NETCONN_CONNECT);
 801722a:	69bb      	ldr	r3, [r7, #24]
 801722c:	785b      	ldrb	r3, [r3, #1]
 801722e:	2b03      	cmp	r3, #3
 8017230:	d006      	beq.n	8017240 <lwip_netconn_do_connected+0x38>
 8017232:	4b3a      	ldr	r3, [pc, #232]	@ (801731c <lwip_netconn_do_connected+0x114>)
 8017234:	f240 5223 	movw	r2, #1315	@ 0x523
 8017238:	4939      	ldr	r1, [pc, #228]	@ (8017320 <lwip_netconn_do_connected+0x118>)
 801723a:	483a      	ldr	r0, [pc, #232]	@ (8017324 <lwip_netconn_do_connected+0x11c>)
 801723c:	f012 ffbe 	bl	802a1bc <iprintf>
  LWIP_ASSERT("(conn->current_msg != NULL) || conn->in_non_blocking_connect",
 8017240:	69bb      	ldr	r3, [r7, #24]
 8017242:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017244:	2b00      	cmp	r3, #0
 8017246:	d10d      	bne.n	8017264 <lwip_netconn_do_connected+0x5c>
 8017248:	69bb      	ldr	r3, [r7, #24]
 801724a:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 801724e:	f003 0304 	and.w	r3, r3, #4
 8017252:	2b00      	cmp	r3, #0
 8017254:	d106      	bne.n	8017264 <lwip_netconn_do_connected+0x5c>
 8017256:	4b31      	ldr	r3, [pc, #196]	@ (801731c <lwip_netconn_do_connected+0x114>)
 8017258:	f240 5224 	movw	r2, #1316	@ 0x524
 801725c:	4932      	ldr	r1, [pc, #200]	@ (8017328 <lwip_netconn_do_connected+0x120>)
 801725e:	4831      	ldr	r0, [pc, #196]	@ (8017324 <lwip_netconn_do_connected+0x11c>)
 8017260:	f012 ffac 	bl	802a1bc <iprintf>
              (conn->current_msg != NULL) || IN_NONBLOCKING_CONNECT(conn));

  if (conn->current_msg != NULL) {
 8017264:	69bb      	ldr	r3, [r7, #24]
 8017266:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017268:	2b00      	cmp	r3, #0
 801726a:	d008      	beq.n	801727e <lwip_netconn_do_connected+0x76>
    conn->current_msg->err = err;
 801726c:	69bb      	ldr	r3, [r7, #24]
 801726e:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017270:	79fa      	ldrb	r2, [r7, #7]
 8017272:	711a      	strb	r2, [r3, #4]
    op_completed_sem = LWIP_API_MSG_SEM(conn->current_msg);
 8017274:	69bb      	ldr	r3, [r7, #24]
 8017276:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017278:	681b      	ldr	r3, [r3, #0]
 801727a:	330c      	adds	r3, #12
 801727c:	61fb      	str	r3, [r7, #28]
  }
  if ((NETCONNTYPE_GROUP(conn->type) == NETCONN_TCP) && (err == ERR_OK)) {
 801727e:	69bb      	ldr	r3, [r7, #24]
 8017280:	781b      	ldrb	r3, [r3, #0]
 8017282:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8017286:	2b10      	cmp	r3, #16
 8017288:	d106      	bne.n	8017298 <lwip_netconn_do_connected+0x90>
 801728a:	f997 3007 	ldrsb.w	r3, [r7, #7]
 801728e:	2b00      	cmp	r3, #0
 8017290:	d102      	bne.n	8017298 <lwip_netconn_do_connected+0x90>
    setup_tcp(conn);
 8017292:	69b8      	ldr	r0, [r7, #24]
 8017294:	f7ff fb82 	bl	801699c <setup_tcp>
  }
  was_blocking = !IN_NONBLOCKING_CONNECT(conn);
 8017298:	69bb      	ldr	r3, [r7, #24]
 801729a:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 801729e:	f003 0304 	and.w	r3, r3, #4
 80172a2:	2b00      	cmp	r3, #0
 80172a4:	bf0c      	ite	eq
 80172a6:	2301      	moveq	r3, #1
 80172a8:	2300      	movne	r3, #0
 80172aa:	b2db      	uxtb	r3, r3
 80172ac:	617b      	str	r3, [r7, #20]
  SET_NONBLOCKING_CONNECT(conn, 0);
 80172ae:	69bb      	ldr	r3, [r7, #24]
 80172b0:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 80172b4:	f023 0304 	bic.w	r3, r3, #4
 80172b8:	b2da      	uxtb	r2, r3
 80172ba:	69bb      	ldr	r3, [r7, #24]
 80172bc:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
  LWIP_ASSERT("blocking connect state error",
 80172c0:	697b      	ldr	r3, [r7, #20]
 80172c2:	2b00      	cmp	r3, #0
 80172c4:	d002      	beq.n	80172cc <lwip_netconn_do_connected+0xc4>
 80172c6:	69fb      	ldr	r3, [r7, #28]
 80172c8:	2b00      	cmp	r3, #0
 80172ca:	d10c      	bne.n	80172e6 <lwip_netconn_do_connected+0xde>
 80172cc:	697b      	ldr	r3, [r7, #20]
 80172ce:	2b00      	cmp	r3, #0
 80172d0:	d102      	bne.n	80172d8 <lwip_netconn_do_connected+0xd0>
 80172d2:	69fb      	ldr	r3, [r7, #28]
 80172d4:	2b00      	cmp	r3, #0
 80172d6:	d006      	beq.n	80172e6 <lwip_netconn_do_connected+0xde>
 80172d8:	4b10      	ldr	r3, [pc, #64]	@ (801731c <lwip_netconn_do_connected+0x114>)
 80172da:	f44f 62a6 	mov.w	r2, #1328	@ 0x530
 80172de:	4913      	ldr	r1, [pc, #76]	@ (801732c <lwip_netconn_do_connected+0x124>)
 80172e0:	4810      	ldr	r0, [pc, #64]	@ (8017324 <lwip_netconn_do_connected+0x11c>)
 80172e2:	f012 ff6b 	bl	802a1bc <iprintf>
              (was_blocking && op_completed_sem != NULL) ||
              (!was_blocking && op_completed_sem == NULL));
  conn->current_msg = NULL;
 80172e6:	69bb      	ldr	r3, [r7, #24]
 80172e8:	2200      	movs	r2, #0
 80172ea:	62da      	str	r2, [r3, #44]	@ 0x2c
  conn->state = NETCONN_NONE;
 80172ec:	69bb      	ldr	r3, [r7, #24]
 80172ee:	2200      	movs	r2, #0
 80172f0:	705a      	strb	r2, [r3, #1]
  API_EVENT(conn, NETCONN_EVT_SENDPLUS, 0);
 80172f2:	69bb      	ldr	r3, [r7, #24]
 80172f4:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 80172f6:	2b00      	cmp	r3, #0
 80172f8:	d005      	beq.n	8017306 <lwip_netconn_do_connected+0xfe>
 80172fa:	69bb      	ldr	r3, [r7, #24]
 80172fc:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 80172fe:	2200      	movs	r2, #0
 8017300:	2102      	movs	r1, #2
 8017302:	69b8      	ldr	r0, [r7, #24]
 8017304:	4798      	blx	r3

  if (was_blocking) {
 8017306:	697b      	ldr	r3, [r7, #20]
 8017308:	2b00      	cmp	r3, #0
 801730a:	d002      	beq.n	8017312 <lwip_netconn_do_connected+0x10a>
    sys_sem_signal(op_completed_sem);
 801730c:	69f8      	ldr	r0, [r7, #28]
 801730e:	f00f fc29 	bl	8026b64 <sys_sem_signal>
  }
  return ERR_OK;
 8017312:	2300      	movs	r3, #0
}
 8017314:	4618      	mov	r0, r3
 8017316:	3720      	adds	r7, #32
 8017318:	46bd      	mov	sp, r7
 801731a:	bd80      	pop	{r7, pc}
 801731c:	0802d770 	.word	0x0802d770
 8017320:	0802db38 	.word	0x0802db38
 8017324:	0802d7b4 	.word	0x0802d7b4
 8017328:	0802db58 	.word	0x0802db58
 801732c:	0802db98 	.word	0x0802db98

08017330 <lwip_netconn_do_connect>:
 * @param m the api_msg pointing to the connection and containing
 *          the IP address and port to connect to
 */
void
lwip_netconn_do_connect(void *m)
{
 8017330:	b580      	push	{r7, lr}
 8017332:	b086      	sub	sp, #24
 8017334:	af00      	add	r7, sp, #0
 8017336:	6078      	str	r0, [r7, #4]
  struct api_msg *msg = (struct api_msg *)m;
 8017338:	687b      	ldr	r3, [r7, #4]
 801733a:	613b      	str	r3, [r7, #16]
  err_t err;

  if (msg->conn->pcb.tcp == NULL) {
 801733c:	693b      	ldr	r3, [r7, #16]
 801733e:	681b      	ldr	r3, [r3, #0]
 8017340:	685b      	ldr	r3, [r3, #4]
 8017342:	2b00      	cmp	r3, #0
 8017344:	d102      	bne.n	801734c <lwip_netconn_do_connect+0x1c>
    /* This may happen when calling netconn_connect() a second time */
    err = ERR_CLSD;
 8017346:	23f1      	movs	r3, #241	@ 0xf1
 8017348:	75fb      	strb	r3, [r7, #23]
 801734a:	e09e      	b.n	801748a <lwip_netconn_do_connect+0x15a>
  } else {
    switch (NETCONNTYPE_GROUP(msg->conn->type)) {
 801734c:	693b      	ldr	r3, [r7, #16]
 801734e:	681b      	ldr	r3, [r3, #0]
 8017350:	781b      	ldrb	r3, [r3, #0]
 8017352:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8017356:	2b10      	cmp	r3, #16
 8017358:	d00f      	beq.n	801737a <lwip_netconn_do_connect+0x4a>
 801735a:	2b20      	cmp	r3, #32
 801735c:	f040 808a 	bne.w	8017474 <lwip_netconn_do_connect+0x144>
        err = raw_connect(msg->conn->pcb.raw, API_EXPR_REF(msg->msg.bc.ipaddr));
        break;
#endif /* LWIP_RAW */
#if LWIP_UDP
      case NETCONN_UDP:
        err = udp_connect(msg->conn->pcb.udp, API_EXPR_REF(msg->msg.bc.ipaddr), msg->msg.bc.port);
 8017360:	693b      	ldr	r3, [r7, #16]
 8017362:	681b      	ldr	r3, [r3, #0]
 8017364:	6858      	ldr	r0, [r3, #4]
 8017366:	693b      	ldr	r3, [r7, #16]
 8017368:	6899      	ldr	r1, [r3, #8]
 801736a:	693b      	ldr	r3, [r7, #16]
 801736c:	899b      	ldrh	r3, [r3, #12]
 801736e:	461a      	mov	r2, r3
 8017370:	f00a fdd8 	bl	8021f24 <udp_connect>
 8017374:	4603      	mov	r3, r0
 8017376:	75fb      	strb	r3, [r7, #23]
        break;
 8017378:	e087      	b.n	801748a <lwip_netconn_do_connect+0x15a>
#endif /* LWIP_UDP */
#if LWIP_TCP
      case NETCONN_TCP:
        /* Prevent connect while doing any other action. */
        if (msg->conn->state == NETCONN_CONNECT) {
 801737a:	693b      	ldr	r3, [r7, #16]
 801737c:	681b      	ldr	r3, [r3, #0]
 801737e:	785b      	ldrb	r3, [r3, #1]
 8017380:	2b03      	cmp	r3, #3
 8017382:	d102      	bne.n	801738a <lwip_netconn_do_connect+0x5a>
          err = ERR_ALREADY;
 8017384:	23f7      	movs	r3, #247	@ 0xf7
 8017386:	75fb      	strb	r3, [r7, #23]
#endif /* LWIP_TCPIP_CORE_LOCKING */
              return;
            }
          }
        }
        break;
 8017388:	e07e      	b.n	8017488 <lwip_netconn_do_connect+0x158>
        } else if (msg->conn->state != NETCONN_NONE) {
 801738a:	693b      	ldr	r3, [r7, #16]
 801738c:	681b      	ldr	r3, [r3, #0]
 801738e:	785b      	ldrb	r3, [r3, #1]
 8017390:	2b00      	cmp	r3, #0
 8017392:	d002      	beq.n	801739a <lwip_netconn_do_connect+0x6a>
          err = ERR_ISCONN;
 8017394:	23f6      	movs	r3, #246	@ 0xf6
 8017396:	75fb      	strb	r3, [r7, #23]
        break;
 8017398:	e076      	b.n	8017488 <lwip_netconn_do_connect+0x158>
          setup_tcp(msg->conn);
 801739a:	693b      	ldr	r3, [r7, #16]
 801739c:	681b      	ldr	r3, [r3, #0]
 801739e:	4618      	mov	r0, r3
 80173a0:	f7ff fafc 	bl	801699c <setup_tcp>
          err = tcp_connect(msg->conn->pcb.tcp, API_EXPR_REF(msg->msg.bc.ipaddr),
 80173a4:	693b      	ldr	r3, [r7, #16]
 80173a6:	681b      	ldr	r3, [r3, #0]
 80173a8:	6858      	ldr	r0, [r3, #4]
 80173aa:	693b      	ldr	r3, [r7, #16]
 80173ac:	6899      	ldr	r1, [r3, #8]
 80173ae:	693b      	ldr	r3, [r7, #16]
 80173b0:	899a      	ldrh	r2, [r3, #12]
 80173b2:	4b3a      	ldr	r3, [pc, #232]	@ (801749c <lwip_netconn_do_connect+0x16c>)
 80173b4:	f004 fb90 	bl	801bad8 <tcp_connect>
 80173b8:	4603      	mov	r3, r0
 80173ba:	75fb      	strb	r3, [r7, #23]
          if (err == ERR_OK) {
 80173bc:	f997 3017 	ldrsb.w	r3, [r7, #23]
 80173c0:	2b00      	cmp	r3, #0
 80173c2:	d161      	bne.n	8017488 <lwip_netconn_do_connect+0x158>
            u8_t non_blocking = netconn_is_nonblocking(msg->conn);
 80173c4:	693b      	ldr	r3, [r7, #16]
 80173c6:	681b      	ldr	r3, [r3, #0]
 80173c8:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 80173cc:	f003 0302 	and.w	r3, r3, #2
 80173d0:	2b00      	cmp	r3, #0
 80173d2:	bf14      	ite	ne
 80173d4:	2301      	movne	r3, #1
 80173d6:	2300      	moveq	r3, #0
 80173d8:	b2db      	uxtb	r3, r3
 80173da:	73fb      	strb	r3, [r7, #15]
            msg->conn->state = NETCONN_CONNECT;
 80173dc:	693b      	ldr	r3, [r7, #16]
 80173de:	681b      	ldr	r3, [r3, #0]
 80173e0:	2203      	movs	r2, #3
 80173e2:	705a      	strb	r2, [r3, #1]
            SET_NONBLOCKING_CONNECT(msg->conn, non_blocking);
 80173e4:	7bfb      	ldrb	r3, [r7, #15]
 80173e6:	2b00      	cmp	r3, #0
 80173e8:	d00b      	beq.n	8017402 <lwip_netconn_do_connect+0xd2>
 80173ea:	693b      	ldr	r3, [r7, #16]
 80173ec:	681b      	ldr	r3, [r3, #0]
 80173ee:	f893 2028 	ldrb.w	r2, [r3, #40]	@ 0x28
 80173f2:	693b      	ldr	r3, [r7, #16]
 80173f4:	681b      	ldr	r3, [r3, #0]
 80173f6:	f042 0204 	orr.w	r2, r2, #4
 80173fa:	b2d2      	uxtb	r2, r2
 80173fc:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
 8017400:	e00a      	b.n	8017418 <lwip_netconn_do_connect+0xe8>
 8017402:	693b      	ldr	r3, [r7, #16]
 8017404:	681b      	ldr	r3, [r3, #0]
 8017406:	f893 2028 	ldrb.w	r2, [r3, #40]	@ 0x28
 801740a:	693b      	ldr	r3, [r7, #16]
 801740c:	681b      	ldr	r3, [r3, #0]
 801740e:	f022 0204 	bic.w	r2, r2, #4
 8017412:	b2d2      	uxtb	r2, r2
 8017414:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
            if (non_blocking) {
 8017418:	7bfb      	ldrb	r3, [r7, #15]
 801741a:	2b00      	cmp	r3, #0
 801741c:	d002      	beq.n	8017424 <lwip_netconn_do_connect+0xf4>
              err = ERR_INPROGRESS;
 801741e:	23fb      	movs	r3, #251	@ 0xfb
 8017420:	75fb      	strb	r3, [r7, #23]
        break;
 8017422:	e031      	b.n	8017488 <lwip_netconn_do_connect+0x158>
              msg->conn->current_msg = msg;
 8017424:	693b      	ldr	r3, [r7, #16]
 8017426:	681b      	ldr	r3, [r3, #0]
 8017428:	693a      	ldr	r2, [r7, #16]
 801742a:	62da      	str	r2, [r3, #44]	@ 0x2c
              LWIP_ASSERT("state!", msg->conn->state == NETCONN_CONNECT);
 801742c:	693b      	ldr	r3, [r7, #16]
 801742e:	681b      	ldr	r3, [r3, #0]
 8017430:	785b      	ldrb	r3, [r3, #1]
 8017432:	2b03      	cmp	r3, #3
 8017434:	d006      	beq.n	8017444 <lwip_netconn_do_connect+0x114>
 8017436:	4b1a      	ldr	r3, [pc, #104]	@ (80174a0 <lwip_netconn_do_connect+0x170>)
 8017438:	f44f 62ae 	mov.w	r2, #1392	@ 0x570
 801743c:	4919      	ldr	r1, [pc, #100]	@ (80174a4 <lwip_netconn_do_connect+0x174>)
 801743e:	481a      	ldr	r0, [pc, #104]	@ (80174a8 <lwip_netconn_do_connect+0x178>)
 8017440:	f012 febc 	bl	802a1bc <iprintf>
              UNLOCK_TCPIP_CORE();
 8017444:	f7f9 fb0c 	bl	8010a60 <sys_unlock_tcpip_core>
              sys_arch_sem_wait(LWIP_API_MSG_SEM(msg), 0);
 8017448:	693b      	ldr	r3, [r7, #16]
 801744a:	681b      	ldr	r3, [r3, #0]
 801744c:	330c      	adds	r3, #12
 801744e:	2100      	movs	r1, #0
 8017450:	4618      	mov	r0, r3
 8017452:	f00f fb56 	bl	8026b02 <sys_arch_sem_wait>
              LOCK_TCPIP_CORE();
 8017456:	f7f9 faf3 	bl	8010a40 <sys_lock_tcpip_core>
              LWIP_ASSERT("state!", msg->conn->state != NETCONN_CONNECT);
 801745a:	693b      	ldr	r3, [r7, #16]
 801745c:	681b      	ldr	r3, [r3, #0]
 801745e:	785b      	ldrb	r3, [r3, #1]
 8017460:	2b03      	cmp	r3, #3
 8017462:	d116      	bne.n	8017492 <lwip_netconn_do_connect+0x162>
 8017464:	4b0e      	ldr	r3, [pc, #56]	@ (80174a0 <lwip_netconn_do_connect+0x170>)
 8017466:	f240 5274 	movw	r2, #1396	@ 0x574
 801746a:	490e      	ldr	r1, [pc, #56]	@ (80174a4 <lwip_netconn_do_connect+0x174>)
 801746c:	480e      	ldr	r0, [pc, #56]	@ (80174a8 <lwip_netconn_do_connect+0x178>)
 801746e:	f012 fea5 	bl	802a1bc <iprintf>
              return;
 8017472:	e00e      	b.n	8017492 <lwip_netconn_do_connect+0x162>
#endif /* LWIP_TCP */
      default:
        LWIP_ERROR("Invalid netconn type", 0, do {
 8017474:	4b0a      	ldr	r3, [pc, #40]	@ (80174a0 <lwip_netconn_do_connect+0x170>)
 8017476:	f240 527d 	movw	r2, #1405	@ 0x57d
 801747a:	490c      	ldr	r1, [pc, #48]	@ (80174ac <lwip_netconn_do_connect+0x17c>)
 801747c:	480a      	ldr	r0, [pc, #40]	@ (80174a8 <lwip_netconn_do_connect+0x178>)
 801747e:	f012 fe9d 	bl	802a1bc <iprintf>
 8017482:	23fa      	movs	r3, #250	@ 0xfa
 8017484:	75fb      	strb	r3, [r7, #23]
          err = ERR_VAL;
        } while (0));
        break;
 8017486:	e000      	b.n	801748a <lwip_netconn_do_connect+0x15a>
        break;
 8017488:	bf00      	nop
    }
  }
  msg->err = err;
 801748a:	693b      	ldr	r3, [r7, #16]
 801748c:	7dfa      	ldrb	r2, [r7, #23]
 801748e:	711a      	strb	r2, [r3, #4]
 8017490:	e000      	b.n	8017494 <lwip_netconn_do_connect+0x164>
              return;
 8017492:	bf00      	nop
  /* For all other protocols, netconn_connect() calls netconn_apimsg(),
     so use TCPIP_APIMSG_ACK() here. */
  TCPIP_APIMSG_ACK(msg);
}
 8017494:	3718      	adds	r7, #24
 8017496:	46bd      	mov	sp, r7
 8017498:	bd80      	pop	{r7, pc}
 801749a:	bf00      	nop
 801749c:	08017209 	.word	0x08017209
 80174a0:	0802d770 	.word	0x0802d770
 80174a4:	0802db30 	.word	0x0802db30
 80174a8:	0802d7b4 	.word	0x0802d7b4
 80174ac:	0802dbb8 	.word	0x0802dbb8

080174b0 <lwip_netconn_do_disconnect>:
 *
 * @param m the api_msg pointing to the connection to disconnect
 */
void
lwip_netconn_do_disconnect(void *m)
{
 80174b0:	b580      	push	{r7, lr}
 80174b2:	b084      	sub	sp, #16
 80174b4:	af00      	add	r7, sp, #0
 80174b6:	6078      	str	r0, [r7, #4]
  struct api_msg *msg = (struct api_msg *)m;
 80174b8:	687b      	ldr	r3, [r7, #4]
 80174ba:	60fb      	str	r3, [r7, #12]

#if LWIP_UDP
  if (NETCONNTYPE_GROUP(msg->conn->type) == NETCONN_UDP) {
 80174bc:	68fb      	ldr	r3, [r7, #12]
 80174be:	681b      	ldr	r3, [r3, #0]
 80174c0:	781b      	ldrb	r3, [r3, #0]
 80174c2:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 80174c6:	2b20      	cmp	r3, #32
 80174c8:	d109      	bne.n	80174de <lwip_netconn_do_disconnect+0x2e>
    udp_disconnect(msg->conn->pcb.udp);
 80174ca:	68fb      	ldr	r3, [r7, #12]
 80174cc:	681b      	ldr	r3, [r3, #0]
 80174ce:	685b      	ldr	r3, [r3, #4]
 80174d0:	4618      	mov	r0, r3
 80174d2:	f00a fd97 	bl	8022004 <udp_disconnect>
    msg->err = ERR_OK;
 80174d6:	68fb      	ldr	r3, [r7, #12]
 80174d8:	2200      	movs	r2, #0
 80174da:	711a      	strb	r2, [r3, #4]
#endif /* LWIP_UDP */
  {
    msg->err = ERR_VAL;
  }
  TCPIP_APIMSG_ACK(msg);
}
 80174dc:	e002      	b.n	80174e4 <lwip_netconn_do_disconnect+0x34>
    msg->err = ERR_VAL;
 80174de:	68fb      	ldr	r3, [r7, #12]
 80174e0:	22fa      	movs	r2, #250	@ 0xfa
 80174e2:	711a      	strb	r2, [r3, #4]
}
 80174e4:	bf00      	nop
 80174e6:	3710      	adds	r7, #16
 80174e8:	46bd      	mov	sp, r7
 80174ea:	bd80      	pop	{r7, pc}

080174ec <lwip_netconn_do_send>:
 *
 * @param m the api_msg pointing to the connection
 */
void
lwip_netconn_do_send(void *m)
{
 80174ec:	b580      	push	{r7, lr}
 80174ee:	b084      	sub	sp, #16
 80174f0:	af00      	add	r7, sp, #0
 80174f2:	6078      	str	r0, [r7, #4]
  struct api_msg *msg = (struct api_msg *)m;
 80174f4:	687b      	ldr	r3, [r7, #4]
 80174f6:	60bb      	str	r3, [r7, #8]

  err_t err = netconn_err(msg->conn);
 80174f8:	68bb      	ldr	r3, [r7, #8]
 80174fa:	681b      	ldr	r3, [r3, #0]
 80174fc:	4618      	mov	r0, r3
 80174fe:	f7fe fef9 	bl	80162f4 <netconn_err>
 8017502:	4603      	mov	r3, r0
 8017504:	73fb      	strb	r3, [r7, #15]
  if (err == ERR_OK) {
 8017506:	f997 300f 	ldrsb.w	r3, [r7, #15]
 801750a:	2b00      	cmp	r3, #0
 801750c:	d134      	bne.n	8017578 <lwip_netconn_do_send+0x8c>
    if (msg->conn->pcb.tcp != NULL) {
 801750e:	68bb      	ldr	r3, [r7, #8]
 8017510:	681b      	ldr	r3, [r3, #0]
 8017512:	685b      	ldr	r3, [r3, #4]
 8017514:	2b00      	cmp	r3, #0
 8017516:	d02d      	beq.n	8017574 <lwip_netconn_do_send+0x88>
      switch (NETCONNTYPE_GROUP(msg->conn->type)) {
 8017518:	68bb      	ldr	r3, [r7, #8]
 801751a:	681b      	ldr	r3, [r3, #0]
 801751c:	781b      	ldrb	r3, [r3, #0]
 801751e:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8017522:	2b20      	cmp	r3, #32
 8017524:	d123      	bne.n	801756e <lwip_netconn_do_send+0x82>
            err = udp_sendto_chksum(msg->conn->pcb.udp, msg->msg.b->p,
                                    &msg->msg.b->addr, msg->msg.b->port,
                                    msg->msg.b->flags & NETBUF_FLAG_CHKSUM, msg->msg.b->toport_chksum);
          }
#else /* LWIP_CHECKSUM_ON_COPY */
          if (ip_addr_isany_val(msg->msg.b->addr) || IP_IS_ANY_TYPE_VAL(msg->msg.b->addr)) {
 8017526:	68bb      	ldr	r3, [r7, #8]
 8017528:	689b      	ldr	r3, [r3, #8]
 801752a:	689b      	ldr	r3, [r3, #8]
 801752c:	2b00      	cmp	r3, #0
 801752e:	d10c      	bne.n	801754a <lwip_netconn_do_send+0x5e>
            err = udp_send(msg->conn->pcb.udp, msg->msg.b->p);
 8017530:	68bb      	ldr	r3, [r7, #8]
 8017532:	681b      	ldr	r3, [r3, #0]
 8017534:	685a      	ldr	r2, [r3, #4]
 8017536:	68bb      	ldr	r3, [r7, #8]
 8017538:	689b      	ldr	r3, [r3, #8]
 801753a:	681b      	ldr	r3, [r3, #0]
 801753c:	4619      	mov	r1, r3
 801753e:	4610      	mov	r0, r2
 8017540:	f00a fa7a 	bl	8021a38 <udp_send>
 8017544:	4603      	mov	r3, r0
 8017546:	73fb      	strb	r3, [r7, #15]
          } else {
            err = udp_sendto(msg->conn->pcb.udp, msg->msg.b->p, &msg->msg.b->addr, msg->msg.b->port);
          }
#endif /* LWIP_CHECKSUM_ON_COPY */
          break;
 8017548:	e016      	b.n	8017578 <lwip_netconn_do_send+0x8c>
            err = udp_sendto(msg->conn->pcb.udp, msg->msg.b->p, &msg->msg.b->addr, msg->msg.b->port);
 801754a:	68bb      	ldr	r3, [r7, #8]
 801754c:	681b      	ldr	r3, [r3, #0]
 801754e:	6858      	ldr	r0, [r3, #4]
 8017550:	68bb      	ldr	r3, [r7, #8]
 8017552:	689b      	ldr	r3, [r3, #8]
 8017554:	6819      	ldr	r1, [r3, #0]
 8017556:	68bb      	ldr	r3, [r7, #8]
 8017558:	689b      	ldr	r3, [r3, #8]
 801755a:	f103 0208 	add.w	r2, r3, #8
 801755e:	68bb      	ldr	r3, [r7, #8]
 8017560:	689b      	ldr	r3, [r3, #8]
 8017562:	899b      	ldrh	r3, [r3, #12]
 8017564:	f00a fa9c 	bl	8021aa0 <udp_sendto>
 8017568:	4603      	mov	r3, r0
 801756a:	73fb      	strb	r3, [r7, #15]
          break;
 801756c:	e004      	b.n	8017578 <lwip_netconn_do_send+0x8c>
#endif /* LWIP_UDP */
        default:
          err = ERR_CONN;
 801756e:	23f5      	movs	r3, #245	@ 0xf5
 8017570:	73fb      	strb	r3, [r7, #15]
          break;
 8017572:	e001      	b.n	8017578 <lwip_netconn_do_send+0x8c>
      }
    } else {
      err = ERR_CONN;
 8017574:	23f5      	movs	r3, #245	@ 0xf5
 8017576:	73fb      	strb	r3, [r7, #15]
    }
  }
  msg->err = err;
 8017578:	68bb      	ldr	r3, [r7, #8]
 801757a:	7bfa      	ldrb	r2, [r7, #15]
 801757c:	711a      	strb	r2, [r3, #4]
  TCPIP_APIMSG_ACK(msg);
}
 801757e:	bf00      	nop
 8017580:	3710      	adds	r7, #16
 8017582:	46bd      	mov	sp, r7
 8017584:	bd80      	pop	{r7, pc}

08017586 <lwip_netconn_do_recv>:
 *
 * @param m the api_msg pointing to the connection
 */
void
lwip_netconn_do_recv(void *m)
{
 8017586:	b580      	push	{r7, lr}
 8017588:	b086      	sub	sp, #24
 801758a:	af00      	add	r7, sp, #0
 801758c:	6078      	str	r0, [r7, #4]
  struct api_msg *msg = (struct api_msg *)m;
 801758e:	687b      	ldr	r3, [r7, #4]
 8017590:	613b      	str	r3, [r7, #16]

  msg->err = ERR_OK;
 8017592:	693b      	ldr	r3, [r7, #16]
 8017594:	2200      	movs	r2, #0
 8017596:	711a      	strb	r2, [r3, #4]
  if (msg->conn->pcb.tcp != NULL) {
 8017598:	693b      	ldr	r3, [r7, #16]
 801759a:	681b      	ldr	r3, [r3, #0]
 801759c:	685b      	ldr	r3, [r3, #4]
 801759e:	2b00      	cmp	r3, #0
 80175a0:	d022      	beq.n	80175e8 <lwip_netconn_do_recv+0x62>
    if (NETCONNTYPE_GROUP(msg->conn->type) == NETCONN_TCP) {
 80175a2:	693b      	ldr	r3, [r7, #16]
 80175a4:	681b      	ldr	r3, [r3, #0]
 80175a6:	781b      	ldrb	r3, [r3, #0]
 80175a8:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 80175ac:	2b10      	cmp	r3, #16
 80175ae:	d11b      	bne.n	80175e8 <lwip_netconn_do_recv+0x62>
      size_t remaining = msg->msg.r.len;
 80175b0:	693b      	ldr	r3, [r7, #16]
 80175b2:	689b      	ldr	r3, [r3, #8]
 80175b4:	617b      	str	r3, [r7, #20]
      do {
        u16_t recved = (u16_t)((remaining > 0xffff) ? 0xffff : remaining);
 80175b6:	697b      	ldr	r3, [r7, #20]
 80175b8:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 80175bc:	d202      	bcs.n	80175c4 <lwip_netconn_do_recv+0x3e>
 80175be:	697b      	ldr	r3, [r7, #20]
 80175c0:	b29b      	uxth	r3, r3
 80175c2:	e001      	b.n	80175c8 <lwip_netconn_do_recv+0x42>
 80175c4:	f64f 73ff 	movw	r3, #65535	@ 0xffff
 80175c8:	81fb      	strh	r3, [r7, #14]
        tcp_recved(msg->conn->pcb.tcp, recved);
 80175ca:	693b      	ldr	r3, [r7, #16]
 80175cc:	681b      	ldr	r3, [r3, #0]
 80175ce:	685b      	ldr	r3, [r3, #4]
 80175d0:	89fa      	ldrh	r2, [r7, #14]
 80175d2:	4611      	mov	r1, r2
 80175d4:	4618      	mov	r0, r3
 80175d6:	f004 f9e5 	bl	801b9a4 <tcp_recved>
        remaining -= recved;
 80175da:	89fb      	ldrh	r3, [r7, #14]
 80175dc:	697a      	ldr	r2, [r7, #20]
 80175de:	1ad3      	subs	r3, r2, r3
 80175e0:	617b      	str	r3, [r7, #20]
      } while (remaining != 0);
 80175e2:	697b      	ldr	r3, [r7, #20]
 80175e4:	2b00      	cmp	r3, #0
 80175e6:	d1e6      	bne.n	80175b6 <lwip_netconn_do_recv+0x30>
    }
  }
  TCPIP_APIMSG_ACK(msg);
}
 80175e8:	bf00      	nop
 80175ea:	3718      	adds	r7, #24
 80175ec:	46bd      	mov	sp, r7
 80175ee:	bd80      	pop	{r7, pc}

080175f0 <lwip_netconn_do_writemore>:
 * @return ERR_OK
 *         ERR_MEM if LWIP_TCPIP_CORE_LOCKING=1 and sending hasn't yet finished
 */
static err_t
lwip_netconn_do_writemore(struct netconn *conn  WRITE_DELAYED_PARAM)
{
 80175f0:	b580      	push	{r7, lr}
 80175f2:	b088      	sub	sp, #32
 80175f4:	af00      	add	r7, sp, #0
 80175f6:	6078      	str	r0, [r7, #4]
 80175f8:	460b      	mov	r3, r1
 80175fa:	70fb      	strb	r3, [r7, #3]
  err_t err;
  const void *dataptr;
  u16_t len, available;
  u8_t write_finished = 0;
 80175fc:	2300      	movs	r3, #0
 80175fe:	76fb      	strb	r3, [r7, #27]
  size_t diff;
  u8_t dontblock;
  u8_t apiflags;
  u8_t write_more;

  LWIP_ASSERT("conn != NULL", conn != NULL);
 8017600:	687b      	ldr	r3, [r7, #4]
 8017602:	2b00      	cmp	r3, #0
 8017604:	d106      	bne.n	8017614 <lwip_netconn_do_writemore+0x24>
 8017606:	4b61      	ldr	r3, [pc, #388]	@ (801778c <lwip_netconn_do_writemore+0x19c>)
 8017608:	f240 6273 	movw	r2, #1651	@ 0x673
 801760c:	4960      	ldr	r1, [pc, #384]	@ (8017790 <lwip_netconn_do_writemore+0x1a0>)
 801760e:	4861      	ldr	r0, [pc, #388]	@ (8017794 <lwip_netconn_do_writemore+0x1a4>)
 8017610:	f012 fdd4 	bl	802a1bc <iprintf>
  LWIP_ASSERT("conn->state == NETCONN_WRITE", (conn->state == NETCONN_WRITE));
 8017614:	687b      	ldr	r3, [r7, #4]
 8017616:	785b      	ldrb	r3, [r3, #1]
 8017618:	2b01      	cmp	r3, #1
 801761a:	d006      	beq.n	801762a <lwip_netconn_do_writemore+0x3a>
 801761c:	4b5b      	ldr	r3, [pc, #364]	@ (801778c <lwip_netconn_do_writemore+0x19c>)
 801761e:	f240 6274 	movw	r2, #1652	@ 0x674
 8017622:	495d      	ldr	r1, [pc, #372]	@ (8017798 <lwip_netconn_do_writemore+0x1a8>)
 8017624:	485b      	ldr	r0, [pc, #364]	@ (8017794 <lwip_netconn_do_writemore+0x1a4>)
 8017626:	f012 fdc9 	bl	802a1bc <iprintf>
  LWIP_ASSERT("conn->current_msg != NULL", conn->current_msg != NULL);
 801762a:	687b      	ldr	r3, [r7, #4]
 801762c:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 801762e:	2b00      	cmp	r3, #0
 8017630:	d106      	bne.n	8017640 <lwip_netconn_do_writemore+0x50>
 8017632:	4b56      	ldr	r3, [pc, #344]	@ (801778c <lwip_netconn_do_writemore+0x19c>)
 8017634:	f240 6275 	movw	r2, #1653	@ 0x675
 8017638:	4958      	ldr	r1, [pc, #352]	@ (801779c <lwip_netconn_do_writemore+0x1ac>)
 801763a:	4856      	ldr	r0, [pc, #344]	@ (8017794 <lwip_netconn_do_writemore+0x1a4>)
 801763c:	f012 fdbe 	bl	802a1bc <iprintf>
  LWIP_ASSERT("conn->pcb.tcp != NULL", conn->pcb.tcp != NULL);
 8017640:	687b      	ldr	r3, [r7, #4]
 8017642:	685b      	ldr	r3, [r3, #4]
 8017644:	2b00      	cmp	r3, #0
 8017646:	d106      	bne.n	8017656 <lwip_netconn_do_writemore+0x66>
 8017648:	4b50      	ldr	r3, [pc, #320]	@ (801778c <lwip_netconn_do_writemore+0x19c>)
 801764a:	f240 6276 	movw	r2, #1654	@ 0x676
 801764e:	4954      	ldr	r1, [pc, #336]	@ (80177a0 <lwip_netconn_do_writemore+0x1b0>)
 8017650:	4850      	ldr	r0, [pc, #320]	@ (8017794 <lwip_netconn_do_writemore+0x1a4>)
 8017652:	f012 fdb3 	bl	802a1bc <iprintf>
  LWIP_ASSERT("conn->current_msg->msg.w.offset < conn->current_msg->msg.w.len",
 8017656:	687b      	ldr	r3, [r7, #4]
 8017658:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 801765a:	699a      	ldr	r2, [r3, #24]
 801765c:	687b      	ldr	r3, [r7, #4]
 801765e:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017660:	695b      	ldr	r3, [r3, #20]
 8017662:	429a      	cmp	r2, r3
 8017664:	d306      	bcc.n	8017674 <lwip_netconn_do_writemore+0x84>
 8017666:	4b49      	ldr	r3, [pc, #292]	@ (801778c <lwip_netconn_do_writemore+0x19c>)
 8017668:	f240 6277 	movw	r2, #1655	@ 0x677
 801766c:	494d      	ldr	r1, [pc, #308]	@ (80177a4 <lwip_netconn_do_writemore+0x1b4>)
 801766e:	4849      	ldr	r0, [pc, #292]	@ (8017794 <lwip_netconn_do_writemore+0x1a4>)
 8017670:	f012 fda4 	bl	802a1bc <iprintf>
              conn->current_msg->msg.w.offset < conn->current_msg->msg.w.len);
  LWIP_ASSERT("conn->current_msg->msg.w.vector_cnt > 0", conn->current_msg->msg.w.vector_cnt > 0);
 8017674:	687b      	ldr	r3, [r7, #4]
 8017676:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017678:	899b      	ldrh	r3, [r3, #12]
 801767a:	2b00      	cmp	r3, #0
 801767c:	d106      	bne.n	801768c <lwip_netconn_do_writemore+0x9c>
 801767e:	4b43      	ldr	r3, [pc, #268]	@ (801778c <lwip_netconn_do_writemore+0x19c>)
 8017680:	f240 6279 	movw	r2, #1657	@ 0x679
 8017684:	4948      	ldr	r1, [pc, #288]	@ (80177a8 <lwip_netconn_do_writemore+0x1b8>)
 8017686:	4843      	ldr	r0, [pc, #268]	@ (8017794 <lwip_netconn_do_writemore+0x1a4>)
 8017688:	f012 fd98 	bl	802a1bc <iprintf>

  apiflags = conn->current_msg->msg.w.apiflags;
 801768c:	687b      	ldr	r3, [r7, #4]
 801768e:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017690:	7f1b      	ldrb	r3, [r3, #28]
 8017692:	76bb      	strb	r3, [r7, #26]
  dontblock = netconn_is_nonblocking(conn) || (apiflags & NETCONN_DONTBLOCK);
 8017694:	687b      	ldr	r3, [r7, #4]
 8017696:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 801769a:	f003 0302 	and.w	r3, r3, #2
 801769e:	2b00      	cmp	r3, #0
 80176a0:	d104      	bne.n	80176ac <lwip_netconn_do_writemore+0xbc>
 80176a2:	7ebb      	ldrb	r3, [r7, #26]
 80176a4:	f003 0304 	and.w	r3, r3, #4
 80176a8:	2b00      	cmp	r3, #0
 80176aa:	d001      	beq.n	80176b0 <lwip_netconn_do_writemore+0xc0>
 80176ac:	2301      	movs	r3, #1
 80176ae:	e000      	b.n	80176b2 <lwip_netconn_do_writemore+0xc2>
 80176b0:	2300      	movs	r3, #0
 80176b2:	763b      	strb	r3, [r7, #24]
    }
  } else
#endif /* LWIP_SO_SNDTIMEO */
  {
    do {
      dataptr = (const u8_t *)conn->current_msg->msg.w.vector->ptr + conn->current_msg->msg.w.vector_off;
 80176b4:	687b      	ldr	r3, [r7, #4]
 80176b6:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80176b8:	689b      	ldr	r3, [r3, #8]
 80176ba:	681a      	ldr	r2, [r3, #0]
 80176bc:	687b      	ldr	r3, [r7, #4]
 80176be:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80176c0:	691b      	ldr	r3, [r3, #16]
 80176c2:	4413      	add	r3, r2
 80176c4:	617b      	str	r3, [r7, #20]
      diff = conn->current_msg->msg.w.vector->len - conn->current_msg->msg.w.vector_off;
 80176c6:	687b      	ldr	r3, [r7, #4]
 80176c8:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80176ca:	689b      	ldr	r3, [r3, #8]
 80176cc:	685a      	ldr	r2, [r3, #4]
 80176ce:	687b      	ldr	r3, [r7, #4]
 80176d0:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80176d2:	691b      	ldr	r3, [r3, #16]
 80176d4:	1ad3      	subs	r3, r2, r3
 80176d6:	613b      	str	r3, [r7, #16]
      if (diff > 0xffffUL) { /* max_u16_t */
 80176d8:	693b      	ldr	r3, [r7, #16]
 80176da:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 80176de:	d307      	bcc.n	80176f0 <lwip_netconn_do_writemore+0x100>
        len = 0xffff;
 80176e0:	f64f 73ff 	movw	r3, #65535	@ 0xffff
 80176e4:	83bb      	strh	r3, [r7, #28]
        apiflags |= TCP_WRITE_FLAG_MORE;
 80176e6:	7ebb      	ldrb	r3, [r7, #26]
 80176e8:	f043 0302 	orr.w	r3, r3, #2
 80176ec:	76bb      	strb	r3, [r7, #26]
 80176ee:	e001      	b.n	80176f4 <lwip_netconn_do_writemore+0x104>
      } else {
        len = (u16_t)diff;
 80176f0:	693b      	ldr	r3, [r7, #16]
 80176f2:	83bb      	strh	r3, [r7, #28]
      }
      available = tcp_sndbuf(conn->pcb.tcp);
 80176f4:	687b      	ldr	r3, [r7, #4]
 80176f6:	685b      	ldr	r3, [r3, #4]
 80176f8:	f8b3 3064 	ldrh.w	r3, [r3, #100]	@ 0x64
 80176fc:	81fb      	strh	r3, [r7, #14]
      if (available < len) {
 80176fe:	89fa      	ldrh	r2, [r7, #14]
 8017700:	8bbb      	ldrh	r3, [r7, #28]
 8017702:	429a      	cmp	r2, r3
 8017704:	d216      	bcs.n	8017734 <lwip_netconn_do_writemore+0x144>
        /* don't try to write more than sendbuf */
        len = available;
 8017706:	89fb      	ldrh	r3, [r7, #14]
 8017708:	83bb      	strh	r3, [r7, #28]
        if (dontblock) {
 801770a:	7e3b      	ldrb	r3, [r7, #24]
 801770c:	2b00      	cmp	r3, #0
 801770e:	d00d      	beq.n	801772c <lwip_netconn_do_writemore+0x13c>
          if (!len) {
 8017710:	8bbb      	ldrh	r3, [r7, #28]
 8017712:	2b00      	cmp	r3, #0
 8017714:	d10e      	bne.n	8017734 <lwip_netconn_do_writemore+0x144>
            /* set error according to partial write or not */
            err = (conn->current_msg->msg.w.offset == 0) ? ERR_WOULDBLOCK : ERR_OK;
 8017716:	687b      	ldr	r3, [r7, #4]
 8017718:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 801771a:	699b      	ldr	r3, [r3, #24]
 801771c:	2b00      	cmp	r3, #0
 801771e:	d102      	bne.n	8017726 <lwip_netconn_do_writemore+0x136>
 8017720:	f06f 0306 	mvn.w	r3, #6
 8017724:	e000      	b.n	8017728 <lwip_netconn_do_writemore+0x138>
 8017726:	2300      	movs	r3, #0
 8017728:	77fb      	strb	r3, [r7, #31]
            goto err_mem;
 801772a:	e08f      	b.n	801784c <lwip_netconn_do_writemore+0x25c>
          }
        } else {
          apiflags |= TCP_WRITE_FLAG_MORE;
 801772c:	7ebb      	ldrb	r3, [r7, #26]
 801772e:	f043 0302 	orr.w	r3, r3, #2
 8017732:	76bb      	strb	r3, [r7, #26]
        }
      }
      LWIP_ASSERT("lwip_netconn_do_writemore: invalid length!",
 8017734:	687b      	ldr	r3, [r7, #4]
 8017736:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017738:	691a      	ldr	r2, [r3, #16]
 801773a:	8bbb      	ldrh	r3, [r7, #28]
 801773c:	441a      	add	r2, r3
 801773e:	687b      	ldr	r3, [r7, #4]
 8017740:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017742:	689b      	ldr	r3, [r3, #8]
 8017744:	685b      	ldr	r3, [r3, #4]
 8017746:	429a      	cmp	r2, r3
 8017748:	d906      	bls.n	8017758 <lwip_netconn_do_writemore+0x168>
 801774a:	4b10      	ldr	r3, [pc, #64]	@ (801778c <lwip_netconn_do_writemore+0x19c>)
 801774c:	f240 62a3 	movw	r2, #1699	@ 0x6a3
 8017750:	4916      	ldr	r1, [pc, #88]	@ (80177ac <lwip_netconn_do_writemore+0x1bc>)
 8017752:	4810      	ldr	r0, [pc, #64]	@ (8017794 <lwip_netconn_do_writemore+0x1a4>)
 8017754:	f012 fd32 	bl	802a1bc <iprintf>
                  ((conn->current_msg->msg.w.vector_off + len) <= conn->current_msg->msg.w.vector->len));
      /* we should loop around for more sending in the following cases:
           1) We couldn't finish the current vector because of 16-bit size limitations.
              tcp_write() and tcp_sndbuf() both are limited to 16-bit sizes
           2) We are sending the remainder of the current vector and have more */
      if ((len == 0xffff && diff > 0xffffUL) ||
 8017758:	8bbb      	ldrh	r3, [r7, #28]
 801775a:	f64f 72ff 	movw	r2, #65535	@ 0xffff
 801775e:	4293      	cmp	r3, r2
 8017760:	d103      	bne.n	801776a <lwip_netconn_do_writemore+0x17a>
 8017762:	693b      	ldr	r3, [r7, #16]
 8017764:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 8017768:	d209      	bcs.n	801777e <lwip_netconn_do_writemore+0x18e>
          (len == (u16_t)diff && conn->current_msg->msg.w.vector_cnt > 1)) {
 801776a:	693b      	ldr	r3, [r7, #16]
 801776c:	b29b      	uxth	r3, r3
      if ((len == 0xffff && diff > 0xffffUL) ||
 801776e:	8bba      	ldrh	r2, [r7, #28]
 8017770:	429a      	cmp	r2, r3
 8017772:	d11d      	bne.n	80177b0 <lwip_netconn_do_writemore+0x1c0>
          (len == (u16_t)diff && conn->current_msg->msg.w.vector_cnt > 1)) {
 8017774:	687b      	ldr	r3, [r7, #4]
 8017776:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017778:	899b      	ldrh	r3, [r3, #12]
 801777a:	2b01      	cmp	r3, #1
 801777c:	d918      	bls.n	80177b0 <lwip_netconn_do_writemore+0x1c0>
        write_more = 1;
 801777e:	2301      	movs	r3, #1
 8017780:	767b      	strb	r3, [r7, #25]
        apiflags |= TCP_WRITE_FLAG_MORE;
 8017782:	7ebb      	ldrb	r3, [r7, #26]
 8017784:	f043 0302 	orr.w	r3, r3, #2
 8017788:	76bb      	strb	r3, [r7, #26]
 801778a:	e013      	b.n	80177b4 <lwip_netconn_do_writemore+0x1c4>
 801778c:	0802d770 	.word	0x0802d770
 8017790:	0802d8c8 	.word	0x0802d8c8
 8017794:	0802d7b4 	.word	0x0802d7b4
 8017798:	0802dbd0 	.word	0x0802dbd0
 801779c:	0802d8d8 	.word	0x0802d8d8
 80177a0:	0802dbf0 	.word	0x0802dbf0
 80177a4:	0802dc08 	.word	0x0802dc08
 80177a8:	0802dc48 	.word	0x0802dc48
 80177ac:	0802dc70 	.word	0x0802dc70
      } else {
        write_more = 0;
 80177b0:	2300      	movs	r3, #0
 80177b2:	767b      	strb	r3, [r7, #25]
      }
      err = tcp_write(conn->pcb.tcp, dataptr, len, apiflags);
 80177b4:	687b      	ldr	r3, [r7, #4]
 80177b6:	6858      	ldr	r0, [r3, #4]
 80177b8:	7ebb      	ldrb	r3, [r7, #26]
 80177ba:	8bba      	ldrh	r2, [r7, #28]
 80177bc:	6979      	ldr	r1, [r7, #20]
 80177be:	f008 f827 	bl	801f810 <tcp_write>
 80177c2:	4603      	mov	r3, r0
 80177c4:	77fb      	strb	r3, [r7, #31]
      if (err == ERR_OK) {
 80177c6:	f997 301f 	ldrsb.w	r3, [r7, #31]
 80177ca:	2b00      	cmp	r3, #0
 80177cc:	d12c      	bne.n	8017828 <lwip_netconn_do_writemore+0x238>
        conn->current_msg->msg.w.offset += len;
 80177ce:	687b      	ldr	r3, [r7, #4]
 80177d0:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80177d2:	6999      	ldr	r1, [r3, #24]
 80177d4:	8bba      	ldrh	r2, [r7, #28]
 80177d6:	687b      	ldr	r3, [r7, #4]
 80177d8:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80177da:	440a      	add	r2, r1
 80177dc:	619a      	str	r2, [r3, #24]
        conn->current_msg->msg.w.vector_off += len;
 80177de:	687b      	ldr	r3, [r7, #4]
 80177e0:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80177e2:	6919      	ldr	r1, [r3, #16]
 80177e4:	8bba      	ldrh	r2, [r7, #28]
 80177e6:	687b      	ldr	r3, [r7, #4]
 80177e8:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80177ea:	440a      	add	r2, r1
 80177ec:	611a      	str	r2, [r3, #16]
        /* check if current vector is finished */
        if (conn->current_msg->msg.w.vector_off == conn->current_msg->msg.w.vector->len) {
 80177ee:	687b      	ldr	r3, [r7, #4]
 80177f0:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80177f2:	691a      	ldr	r2, [r3, #16]
 80177f4:	687b      	ldr	r3, [r7, #4]
 80177f6:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80177f8:	689b      	ldr	r3, [r3, #8]
 80177fa:	685b      	ldr	r3, [r3, #4]
 80177fc:	429a      	cmp	r2, r3
 80177fe:	d113      	bne.n	8017828 <lwip_netconn_do_writemore+0x238>
          conn->current_msg->msg.w.vector_cnt--;
 8017800:	687b      	ldr	r3, [r7, #4]
 8017802:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017804:	899a      	ldrh	r2, [r3, #12]
 8017806:	3a01      	subs	r2, #1
 8017808:	b292      	uxth	r2, r2
 801780a:	819a      	strh	r2, [r3, #12]
          /* if we have additional vectors, move on to them */
          if (conn->current_msg->msg.w.vector_cnt > 0) {
 801780c:	687b      	ldr	r3, [r7, #4]
 801780e:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017810:	899b      	ldrh	r3, [r3, #12]
 8017812:	2b00      	cmp	r3, #0
 8017814:	d008      	beq.n	8017828 <lwip_netconn_do_writemore+0x238>
            conn->current_msg->msg.w.vector++;
 8017816:	687b      	ldr	r3, [r7, #4]
 8017818:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 801781a:	689a      	ldr	r2, [r3, #8]
 801781c:	3208      	adds	r2, #8
 801781e:	609a      	str	r2, [r3, #8]
            conn->current_msg->msg.w.vector_off = 0;
 8017820:	687b      	ldr	r3, [r7, #4]
 8017822:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017824:	2200      	movs	r2, #0
 8017826:	611a      	str	r2, [r3, #16]
          }
        }
      }
    } while (write_more && err == ERR_OK);
 8017828:	7e7b      	ldrb	r3, [r7, #25]
 801782a:	2b00      	cmp	r3, #0
 801782c:	d004      	beq.n	8017838 <lwip_netconn_do_writemore+0x248>
 801782e:	f997 301f 	ldrsb.w	r3, [r7, #31]
 8017832:	2b00      	cmp	r3, #0
 8017834:	f43f af3e 	beq.w	80176b4 <lwip_netconn_do_writemore+0xc4>
    /* if OK or memory error, check available space */
    if ((err == ERR_OK) || (err == ERR_MEM)) {
 8017838:	f997 301f 	ldrsb.w	r3, [r7, #31]
 801783c:	2b00      	cmp	r3, #0
 801783e:	d004      	beq.n	801784a <lwip_netconn_do_writemore+0x25a>
 8017840:	f997 301f 	ldrsb.w	r3, [r7, #31]
 8017844:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8017848:	d137      	bne.n	80178ba <lwip_netconn_do_writemore+0x2ca>
err_mem:
 801784a:	bf00      	nop
      if (dontblock && (conn->current_msg->msg.w.offset < conn->current_msg->msg.w.len)) {
 801784c:	7e3b      	ldrb	r3, [r7, #24]
 801784e:	2b00      	cmp	r3, #0
 8017850:	d01b      	beq.n	801788a <lwip_netconn_do_writemore+0x29a>
 8017852:	687b      	ldr	r3, [r7, #4]
 8017854:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017856:	699a      	ldr	r2, [r3, #24]
 8017858:	687b      	ldr	r3, [r7, #4]
 801785a:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 801785c:	695b      	ldr	r3, [r3, #20]
 801785e:	429a      	cmp	r2, r3
 8017860:	d213      	bcs.n	801788a <lwip_netconn_do_writemore+0x29a>
        /* non-blocking write did not write everything: mark the pcb non-writable
           and let poll_tcp check writable space to mark the pcb writable again */
        API_EVENT(conn, NETCONN_EVT_SENDMINUS, 0);
 8017862:	687b      	ldr	r3, [r7, #4]
 8017864:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8017866:	2b00      	cmp	r3, #0
 8017868:	d005      	beq.n	8017876 <lwip_netconn_do_writemore+0x286>
 801786a:	687b      	ldr	r3, [r7, #4]
 801786c:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 801786e:	2200      	movs	r2, #0
 8017870:	2103      	movs	r1, #3
 8017872:	6878      	ldr	r0, [r7, #4]
 8017874:	4798      	blx	r3
        conn->flags |= NETCONN_FLAG_CHECK_WRITESPACE;
 8017876:	687b      	ldr	r3, [r7, #4]
 8017878:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 801787c:	f043 0310 	orr.w	r3, r3, #16
 8017880:	b2da      	uxtb	r2, r3
 8017882:	687b      	ldr	r3, [r7, #4]
 8017884:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
 8017888:	e017      	b.n	80178ba <lwip_netconn_do_writemore+0x2ca>
      } else if ((tcp_sndbuf(conn->pcb.tcp) <= TCP_SNDLOWAT) ||
 801788a:	687b      	ldr	r3, [r7, #4]
 801788c:	685b      	ldr	r3, [r3, #4]
 801788e:	f8b3 3064 	ldrh.w	r3, [r3, #100]	@ 0x64
 8017892:	f640 3269 	movw	r2, #2921	@ 0xb69
 8017896:	4293      	cmp	r3, r2
 8017898:	d905      	bls.n	80178a6 <lwip_netconn_do_writemore+0x2b6>
                 (tcp_sndqueuelen(conn->pcb.tcp) >= TCP_SNDQUEUELOWAT)) {
 801789a:	687b      	ldr	r3, [r7, #4]
 801789c:	685b      	ldr	r3, [r3, #4]
 801789e:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
      } else if ((tcp_sndbuf(conn->pcb.tcp) <= TCP_SNDLOWAT) ||
 80178a2:	2b07      	cmp	r3, #7
 80178a4:	d909      	bls.n	80178ba <lwip_netconn_do_writemore+0x2ca>
        /* The queued byte- or pbuf-count exceeds the configured low-water limit,
           let select mark this pcb as non-writable. */
        API_EVENT(conn, NETCONN_EVT_SENDMINUS, 0);
 80178a6:	687b      	ldr	r3, [r7, #4]
 80178a8:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 80178aa:	2b00      	cmp	r3, #0
 80178ac:	d005      	beq.n	80178ba <lwip_netconn_do_writemore+0x2ca>
 80178ae:	687b      	ldr	r3, [r7, #4]
 80178b0:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 80178b2:	2200      	movs	r2, #0
 80178b4:	2103      	movs	r1, #3
 80178b6:	6878      	ldr	r0, [r7, #4]
 80178b8:	4798      	blx	r3
      }
    }

    if (err == ERR_OK) {
 80178ba:	f997 301f 	ldrsb.w	r3, [r7, #31]
 80178be:	2b00      	cmp	r3, #0
 80178c0:	d11d      	bne.n	80178fe <lwip_netconn_do_writemore+0x30e>
      err_t out_err;
      if ((conn->current_msg->msg.w.offset == conn->current_msg->msg.w.len) || dontblock) {
 80178c2:	687b      	ldr	r3, [r7, #4]
 80178c4:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80178c6:	699a      	ldr	r2, [r3, #24]
 80178c8:	687b      	ldr	r3, [r7, #4]
 80178ca:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80178cc:	695b      	ldr	r3, [r3, #20]
 80178ce:	429a      	cmp	r2, r3
 80178d0:	d002      	beq.n	80178d8 <lwip_netconn_do_writemore+0x2e8>
 80178d2:	7e3b      	ldrb	r3, [r7, #24]
 80178d4:	2b00      	cmp	r3, #0
 80178d6:	d001      	beq.n	80178dc <lwip_netconn_do_writemore+0x2ec>
        /* return sent length (caller reads length from msg.w.offset) */
        write_finished = 1;
 80178d8:	2301      	movs	r3, #1
 80178da:	76fb      	strb	r3, [r7, #27]
      }
      out_err = tcp_output(conn->pcb.tcp);
 80178dc:	687b      	ldr	r3, [r7, #4]
 80178de:	685b      	ldr	r3, [r3, #4]
 80178e0:	4618      	mov	r0, r3
 80178e2:	f008 fddf 	bl	80204a4 <tcp_output>
 80178e6:	4603      	mov	r3, r0
 80178e8:	733b      	strb	r3, [r7, #12]
      if (out_err == ERR_RTE) {
 80178ea:	f997 300c 	ldrsb.w	r3, [r7, #12]
 80178ee:	f113 0f04 	cmn.w	r3, #4
 80178f2:	d12c      	bne.n	801794e <lwip_netconn_do_writemore+0x35e>
        /* If tcp_output fails because no route is found,
           don't try writing any more but return the error
           to the application thread. */
        err = out_err;
 80178f4:	7b3b      	ldrb	r3, [r7, #12]
 80178f6:	77fb      	strb	r3, [r7, #31]
        write_finished = 1;
 80178f8:	2301      	movs	r3, #1
 80178fa:	76fb      	strb	r3, [r7, #27]
 80178fc:	e027      	b.n	801794e <lwip_netconn_do_writemore+0x35e>
      }
    } else if (err == ERR_MEM) {
 80178fe:	f997 301f 	ldrsb.w	r3, [r7, #31]
 8017902:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8017906:	d120      	bne.n	801794a <lwip_netconn_do_writemore+0x35a>
         For blocking sockets, we do NOT return to the application
         thread, since ERR_MEM is only a temporary error! Non-blocking
         will remain non-writable until sent_tcp/poll_tcp is called */

      /* tcp_write returned ERR_MEM, try tcp_output anyway */
      err_t out_err = tcp_output(conn->pcb.tcp);
 8017908:	687b      	ldr	r3, [r7, #4]
 801790a:	685b      	ldr	r3, [r3, #4]
 801790c:	4618      	mov	r0, r3
 801790e:	f008 fdc9 	bl	80204a4 <tcp_output>
 8017912:	4603      	mov	r3, r0
 8017914:	737b      	strb	r3, [r7, #13]
      if (out_err == ERR_RTE) {
 8017916:	f997 300d 	ldrsb.w	r3, [r7, #13]
 801791a:	f113 0f04 	cmn.w	r3, #4
 801791e:	d104      	bne.n	801792a <lwip_netconn_do_writemore+0x33a>
        /* If tcp_output fails because no route is found,
           don't try writing any more but return the error
           to the application thread. */
        err = out_err;
 8017920:	7b7b      	ldrb	r3, [r7, #13]
 8017922:	77fb      	strb	r3, [r7, #31]
        write_finished = 1;
 8017924:	2301      	movs	r3, #1
 8017926:	76fb      	strb	r3, [r7, #27]
 8017928:	e011      	b.n	801794e <lwip_netconn_do_writemore+0x35e>
      } else if (dontblock) {
 801792a:	7e3b      	ldrb	r3, [r7, #24]
 801792c:	2b00      	cmp	r3, #0
 801792e:	d00e      	beq.n	801794e <lwip_netconn_do_writemore+0x35e>
        /* non-blocking write is done on ERR_MEM, set error according
           to partial write or not */
        err = (conn->current_msg->msg.w.offset == 0) ? ERR_WOULDBLOCK : ERR_OK;
 8017930:	687b      	ldr	r3, [r7, #4]
 8017932:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017934:	699b      	ldr	r3, [r3, #24]
 8017936:	2b00      	cmp	r3, #0
 8017938:	d102      	bne.n	8017940 <lwip_netconn_do_writemore+0x350>
 801793a:	f06f 0306 	mvn.w	r3, #6
 801793e:	e000      	b.n	8017942 <lwip_netconn_do_writemore+0x352>
 8017940:	2300      	movs	r3, #0
 8017942:	77fb      	strb	r3, [r7, #31]
        write_finished = 1;
 8017944:	2301      	movs	r3, #1
 8017946:	76fb      	strb	r3, [r7, #27]
 8017948:	e001      	b.n	801794e <lwip_netconn_do_writemore+0x35e>
      }
    } else {
      /* On errors != ERR_MEM, we don't try writing any more but return
         the error to the application thread. */
      write_finished = 1;
 801794a:	2301      	movs	r3, #1
 801794c:	76fb      	strb	r3, [r7, #27]
    }
  }
  if (write_finished) {
 801794e:	7efb      	ldrb	r3, [r7, #27]
 8017950:	2b00      	cmp	r3, #0
 8017952:	d015      	beq.n	8017980 <lwip_netconn_do_writemore+0x390>
    /* everything was written: set back connection state
       and back to application task */
    sys_sem_t *op_completed_sem = LWIP_API_MSG_SEM(conn->current_msg);
 8017954:	687b      	ldr	r3, [r7, #4]
 8017956:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017958:	681b      	ldr	r3, [r3, #0]
 801795a:	330c      	adds	r3, #12
 801795c:	60bb      	str	r3, [r7, #8]
    conn->current_msg->err = err;
 801795e:	687b      	ldr	r3, [r7, #4]
 8017960:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017962:	7ffa      	ldrb	r2, [r7, #31]
 8017964:	711a      	strb	r2, [r3, #4]
    conn->current_msg = NULL;
 8017966:	687b      	ldr	r3, [r7, #4]
 8017968:	2200      	movs	r2, #0
 801796a:	62da      	str	r2, [r3, #44]	@ 0x2c
    conn->state = NETCONN_NONE;
 801796c:	687b      	ldr	r3, [r7, #4]
 801796e:	2200      	movs	r2, #0
 8017970:	705a      	strb	r2, [r3, #1]
#if LWIP_TCPIP_CORE_LOCKING
    if (delayed)
 8017972:	78fb      	ldrb	r3, [r7, #3]
 8017974:	2b00      	cmp	r3, #0
 8017976:	d006      	beq.n	8017986 <lwip_netconn_do_writemore+0x396>
#endif
    {
      sys_sem_signal(op_completed_sem);
 8017978:	68b8      	ldr	r0, [r7, #8]
 801797a:	f00f f8f3 	bl	8026b64 <sys_sem_signal>
 801797e:	e002      	b.n	8017986 <lwip_netconn_do_writemore+0x396>
    }
  }
#if LWIP_TCPIP_CORE_LOCKING
  else {
    return ERR_MEM;
 8017980:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8017984:	e000      	b.n	8017988 <lwip_netconn_do_writemore+0x398>
  }
#endif
  return ERR_OK;
 8017986:	2300      	movs	r3, #0
}
 8017988:	4618      	mov	r0, r3
 801798a:	3720      	adds	r7, #32
 801798c:	46bd      	mov	sp, r7
 801798e:	bd80      	pop	{r7, pc}

08017990 <lwip_netconn_do_write>:
 *
 * @param m the api_msg pointing to the connection
 */
void
lwip_netconn_do_write(void *m)
{
 8017990:	b580      	push	{r7, lr}
 8017992:	b084      	sub	sp, #16
 8017994:	af00      	add	r7, sp, #0
 8017996:	6078      	str	r0, [r7, #4]
  struct api_msg *msg = (struct api_msg *)m;
 8017998:	687b      	ldr	r3, [r7, #4]
 801799a:	60bb      	str	r3, [r7, #8]

  err_t err = netconn_err(msg->conn);
 801799c:	68bb      	ldr	r3, [r7, #8]
 801799e:	681b      	ldr	r3, [r3, #0]
 80179a0:	4618      	mov	r0, r3
 80179a2:	f7fe fca7 	bl	80162f4 <netconn_err>
 80179a6:	4603      	mov	r3, r0
 80179a8:	73fb      	strb	r3, [r7, #15]
  if (err == ERR_OK) {
 80179aa:	f997 300f 	ldrsb.w	r3, [r7, #15]
 80179ae:	2b00      	cmp	r3, #0
 80179b0:	d164      	bne.n	8017a7c <lwip_netconn_do_write+0xec>
    if (NETCONNTYPE_GROUP(msg->conn->type) == NETCONN_TCP) {
 80179b2:	68bb      	ldr	r3, [r7, #8]
 80179b4:	681b      	ldr	r3, [r3, #0]
 80179b6:	781b      	ldrb	r3, [r3, #0]
 80179b8:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 80179bc:	2b10      	cmp	r3, #16
 80179be:	d15b      	bne.n	8017a78 <lwip_netconn_do_write+0xe8>
#if LWIP_TCP
      if (msg->conn->state != NETCONN_NONE) {
 80179c0:	68bb      	ldr	r3, [r7, #8]
 80179c2:	681b      	ldr	r3, [r3, #0]
 80179c4:	785b      	ldrb	r3, [r3, #1]
 80179c6:	2b00      	cmp	r3, #0
 80179c8:	d002      	beq.n	80179d0 <lwip_netconn_do_write+0x40>
        /* netconn is connecting, closing or in blocking write */
        err = ERR_INPROGRESS;
 80179ca:	23fb      	movs	r3, #251	@ 0xfb
 80179cc:	73fb      	strb	r3, [r7, #15]
 80179ce:	e055      	b.n	8017a7c <lwip_netconn_do_write+0xec>
      } else if (msg->conn->pcb.tcp != NULL) {
 80179d0:	68bb      	ldr	r3, [r7, #8]
 80179d2:	681b      	ldr	r3, [r3, #0]
 80179d4:	685b      	ldr	r3, [r3, #4]
 80179d6:	2b00      	cmp	r3, #0
 80179d8:	d04b      	beq.n	8017a72 <lwip_netconn_do_write+0xe2>
        msg->conn->state = NETCONN_WRITE;
 80179da:	68bb      	ldr	r3, [r7, #8]
 80179dc:	681b      	ldr	r3, [r3, #0]
 80179de:	2201      	movs	r2, #1
 80179e0:	705a      	strb	r2, [r3, #1]
        /* set all the variables used by lwip_netconn_do_writemore */
        LWIP_ASSERT("already writing or closing", msg->conn->current_msg == NULL);
 80179e2:	68bb      	ldr	r3, [r7, #8]
 80179e4:	681b      	ldr	r3, [r3, #0]
 80179e6:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80179e8:	2b00      	cmp	r3, #0
 80179ea:	d006      	beq.n	80179fa <lwip_netconn_do_write+0x6a>
 80179ec:	4b27      	ldr	r3, [pc, #156]	@ (8017a8c <lwip_netconn_do_write+0xfc>)
 80179ee:	f240 7223 	movw	r2, #1827	@ 0x723
 80179f2:	4927      	ldr	r1, [pc, #156]	@ (8017a90 <lwip_netconn_do_write+0x100>)
 80179f4:	4827      	ldr	r0, [pc, #156]	@ (8017a94 <lwip_netconn_do_write+0x104>)
 80179f6:	f012 fbe1 	bl	802a1bc <iprintf>
        LWIP_ASSERT("msg->msg.w.len != 0", msg->msg.w.len != 0);
 80179fa:	68bb      	ldr	r3, [r7, #8]
 80179fc:	695b      	ldr	r3, [r3, #20]
 80179fe:	2b00      	cmp	r3, #0
 8017a00:	d106      	bne.n	8017a10 <lwip_netconn_do_write+0x80>
 8017a02:	4b22      	ldr	r3, [pc, #136]	@ (8017a8c <lwip_netconn_do_write+0xfc>)
 8017a04:	f240 7224 	movw	r2, #1828	@ 0x724
 8017a08:	4923      	ldr	r1, [pc, #140]	@ (8017a98 <lwip_netconn_do_write+0x108>)
 8017a0a:	4822      	ldr	r0, [pc, #136]	@ (8017a94 <lwip_netconn_do_write+0x104>)
 8017a0c:	f012 fbd6 	bl	802a1bc <iprintf>
        msg->conn->current_msg = msg;
 8017a10:	68bb      	ldr	r3, [r7, #8]
 8017a12:	681b      	ldr	r3, [r3, #0]
 8017a14:	68ba      	ldr	r2, [r7, #8]
 8017a16:	62da      	str	r2, [r3, #44]	@ 0x2c
#if LWIP_TCPIP_CORE_LOCKING
        if (lwip_netconn_do_writemore(msg->conn, 0) != ERR_OK) {
 8017a18:	68bb      	ldr	r3, [r7, #8]
 8017a1a:	681b      	ldr	r3, [r3, #0]
 8017a1c:	2100      	movs	r1, #0
 8017a1e:	4618      	mov	r0, r3
 8017a20:	f7ff fde6 	bl	80175f0 <lwip_netconn_do_writemore>
 8017a24:	4603      	mov	r3, r0
 8017a26:	2b00      	cmp	r3, #0
 8017a28:	d02c      	beq.n	8017a84 <lwip_netconn_do_write+0xf4>
          LWIP_ASSERT("state!", msg->conn->state == NETCONN_WRITE);
 8017a2a:	68bb      	ldr	r3, [r7, #8]
 8017a2c:	681b      	ldr	r3, [r3, #0]
 8017a2e:	785b      	ldrb	r3, [r3, #1]
 8017a30:	2b01      	cmp	r3, #1
 8017a32:	d006      	beq.n	8017a42 <lwip_netconn_do_write+0xb2>
 8017a34:	4b15      	ldr	r3, [pc, #84]	@ (8017a8c <lwip_netconn_do_write+0xfc>)
 8017a36:	f44f 62e5 	mov.w	r2, #1832	@ 0x728
 8017a3a:	4918      	ldr	r1, [pc, #96]	@ (8017a9c <lwip_netconn_do_write+0x10c>)
 8017a3c:	4815      	ldr	r0, [pc, #84]	@ (8017a94 <lwip_netconn_do_write+0x104>)
 8017a3e:	f012 fbbd 	bl	802a1bc <iprintf>
          UNLOCK_TCPIP_CORE();
 8017a42:	f7f9 f80d 	bl	8010a60 <sys_unlock_tcpip_core>
          sys_arch_sem_wait(LWIP_API_MSG_SEM(msg), 0);
 8017a46:	68bb      	ldr	r3, [r7, #8]
 8017a48:	681b      	ldr	r3, [r3, #0]
 8017a4a:	330c      	adds	r3, #12
 8017a4c:	2100      	movs	r1, #0
 8017a4e:	4618      	mov	r0, r3
 8017a50:	f00f f857 	bl	8026b02 <sys_arch_sem_wait>
          LOCK_TCPIP_CORE();
 8017a54:	f7f8 fff4 	bl	8010a40 <sys_lock_tcpip_core>
          LWIP_ASSERT("state!", msg->conn->state != NETCONN_WRITE);
 8017a58:	68bb      	ldr	r3, [r7, #8]
 8017a5a:	681b      	ldr	r3, [r3, #0]
 8017a5c:	785b      	ldrb	r3, [r3, #1]
 8017a5e:	2b01      	cmp	r3, #1
 8017a60:	d110      	bne.n	8017a84 <lwip_netconn_do_write+0xf4>
 8017a62:	4b0a      	ldr	r3, [pc, #40]	@ (8017a8c <lwip_netconn_do_write+0xfc>)
 8017a64:	f240 722c 	movw	r2, #1836	@ 0x72c
 8017a68:	490c      	ldr	r1, [pc, #48]	@ (8017a9c <lwip_netconn_do_write+0x10c>)
 8017a6a:	480a      	ldr	r0, [pc, #40]	@ (8017a94 <lwip_netconn_do_write+0x104>)
 8017a6c:	f012 fba6 	bl	802a1bc <iprintf>
#else /* LWIP_TCPIP_CORE_LOCKING */
        lwip_netconn_do_writemore(msg->conn);
#endif /* LWIP_TCPIP_CORE_LOCKING */
        /* for both cases: if lwip_netconn_do_writemore was called, don't ACK the APIMSG
           since lwip_netconn_do_writemore ACKs it! */
        return;
 8017a70:	e008      	b.n	8017a84 <lwip_netconn_do_write+0xf4>
      } else {
        err = ERR_CONN;
 8017a72:	23f5      	movs	r3, #245	@ 0xf5
 8017a74:	73fb      	strb	r3, [r7, #15]
 8017a76:	e001      	b.n	8017a7c <lwip_netconn_do_write+0xec>
#else /* LWIP_TCP */
      err = ERR_VAL;
#endif /* LWIP_TCP */
#if (LWIP_UDP || LWIP_RAW)
    } else {
      err = ERR_VAL;
 8017a78:	23fa      	movs	r3, #250	@ 0xfa
 8017a7a:	73fb      	strb	r3, [r7, #15]
#endif /* (LWIP_UDP || LWIP_RAW) */
    }
  }
  msg->err = err;
 8017a7c:	68bb      	ldr	r3, [r7, #8]
 8017a7e:	7bfa      	ldrb	r2, [r7, #15]
 8017a80:	711a      	strb	r2, [r3, #4]
 8017a82:	e000      	b.n	8017a86 <lwip_netconn_do_write+0xf6>
        return;
 8017a84:	bf00      	nop
  TCPIP_APIMSG_ACK(msg);
}
 8017a86:	3710      	adds	r7, #16
 8017a88:	46bd      	mov	sp, r7
 8017a8a:	bd80      	pop	{r7, pc}
 8017a8c:	0802d770 	.word	0x0802d770
 8017a90:	0802db14 	.word	0x0802db14
 8017a94:	0802d7b4 	.word	0x0802d7b4
 8017a98:	0802dc9c 	.word	0x0802dc9c
 8017a9c:	0802db30 	.word	0x0802db30

08017aa0 <lwip_netconn_do_getaddr>:
 *
 * @param m the api_msg pointing to the connection
 */
void
lwip_netconn_do_getaddr(void *m)
{
 8017aa0:	b580      	push	{r7, lr}
 8017aa2:	b084      	sub	sp, #16
 8017aa4:	af00      	add	r7, sp, #0
 8017aa6:	6078      	str	r0, [r7, #4]
  struct api_msg *msg = (struct api_msg *)m;
 8017aa8:	687b      	ldr	r3, [r7, #4]
 8017aaa:	60fb      	str	r3, [r7, #12]

  if (msg->conn->pcb.ip != NULL) {
 8017aac:	68fb      	ldr	r3, [r7, #12]
 8017aae:	681b      	ldr	r3, [r3, #0]
 8017ab0:	685b      	ldr	r3, [r3, #4]
 8017ab2:	2b00      	cmp	r3, #0
 8017ab4:	d06b      	beq.n	8017b8e <lwip_netconn_do_getaddr+0xee>
    if (msg->msg.ad.local) {
 8017ab6:	68fb      	ldr	r3, [r7, #12]
 8017ab8:	7c1b      	ldrb	r3, [r3, #16]
 8017aba:	2b00      	cmp	r3, #0
 8017abc:	d007      	beq.n	8017ace <lwip_netconn_do_getaddr+0x2e>
      ip_addr_copy(API_EXPR_DEREF(msg->msg.ad.ipaddr),
 8017abe:	68fb      	ldr	r3, [r7, #12]
 8017ac0:	681b      	ldr	r3, [r3, #0]
 8017ac2:	685a      	ldr	r2, [r3, #4]
 8017ac4:	68fb      	ldr	r3, [r7, #12]
 8017ac6:	689b      	ldr	r3, [r3, #8]
 8017ac8:	6812      	ldr	r2, [r2, #0]
 8017aca:	601a      	str	r2, [r3, #0]
 8017acc:	e006      	b.n	8017adc <lwip_netconn_do_getaddr+0x3c>
                   msg->conn->pcb.ip->local_ip);
    } else {
      ip_addr_copy(API_EXPR_DEREF(msg->msg.ad.ipaddr),
 8017ace:	68fb      	ldr	r3, [r7, #12]
 8017ad0:	681b      	ldr	r3, [r3, #0]
 8017ad2:	685a      	ldr	r2, [r3, #4]
 8017ad4:	68fb      	ldr	r3, [r7, #12]
 8017ad6:	689b      	ldr	r3, [r3, #8]
 8017ad8:	6852      	ldr	r2, [r2, #4]
 8017ada:	601a      	str	r2, [r3, #0]
                   msg->conn->pcb.ip->remote_ip);
    }

    msg->err = ERR_OK;
 8017adc:	68fb      	ldr	r3, [r7, #12]
 8017ade:	2200      	movs	r2, #0
 8017ae0:	711a      	strb	r2, [r3, #4]
    switch (NETCONNTYPE_GROUP(msg->conn->type)) {
 8017ae2:	68fb      	ldr	r3, [r7, #12]
 8017ae4:	681b      	ldr	r3, [r3, #0]
 8017ae6:	781b      	ldrb	r3, [r3, #0]
 8017ae8:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8017aec:	2b10      	cmp	r3, #16
 8017aee:	d021      	beq.n	8017b34 <lwip_netconn_do_getaddr+0x94>
 8017af0:	2b20      	cmp	r3, #32
 8017af2:	d144      	bne.n	8017b7e <lwip_netconn_do_getaddr+0xde>
        }
        break;
#endif /* LWIP_RAW */
#if LWIP_UDP
      case NETCONN_UDP:
        if (msg->msg.ad.local) {
 8017af4:	68fb      	ldr	r3, [r7, #12]
 8017af6:	7c1b      	ldrb	r3, [r3, #16]
 8017af8:	2b00      	cmp	r3, #0
 8017afa:	d007      	beq.n	8017b0c <lwip_netconn_do_getaddr+0x6c>
          API_EXPR_DEREF(msg->msg.ad.port) = msg->conn->pcb.udp->local_port;
 8017afc:	68fb      	ldr	r3, [r7, #12]
 8017afe:	681b      	ldr	r3, [r3, #0]
 8017b00:	685a      	ldr	r2, [r3, #4]
 8017b02:	68fb      	ldr	r3, [r7, #12]
 8017b04:	68db      	ldr	r3, [r3, #12]
 8017b06:	8a52      	ldrh	r2, [r2, #18]
 8017b08:	801a      	strh	r2, [r3, #0]
            msg->err = ERR_CONN;
          } else {
            API_EXPR_DEREF(msg->msg.ad.port) = msg->conn->pcb.udp->remote_port;
          }
        }
        break;
 8017b0a:	e044      	b.n	8017b96 <lwip_netconn_do_getaddr+0xf6>
          if ((msg->conn->pcb.udp->flags & UDP_FLAGS_CONNECTED) == 0) {
 8017b0c:	68fb      	ldr	r3, [r7, #12]
 8017b0e:	681b      	ldr	r3, [r3, #0]
 8017b10:	685b      	ldr	r3, [r3, #4]
 8017b12:	7c1b      	ldrb	r3, [r3, #16]
 8017b14:	f003 0304 	and.w	r3, r3, #4
 8017b18:	2b00      	cmp	r3, #0
 8017b1a:	d103      	bne.n	8017b24 <lwip_netconn_do_getaddr+0x84>
            msg->err = ERR_CONN;
 8017b1c:	68fb      	ldr	r3, [r7, #12]
 8017b1e:	22f5      	movs	r2, #245	@ 0xf5
 8017b20:	711a      	strb	r2, [r3, #4]
        break;
 8017b22:	e038      	b.n	8017b96 <lwip_netconn_do_getaddr+0xf6>
            API_EXPR_DEREF(msg->msg.ad.port) = msg->conn->pcb.udp->remote_port;
 8017b24:	68fb      	ldr	r3, [r7, #12]
 8017b26:	681b      	ldr	r3, [r3, #0]
 8017b28:	685a      	ldr	r2, [r3, #4]
 8017b2a:	68fb      	ldr	r3, [r7, #12]
 8017b2c:	68db      	ldr	r3, [r3, #12]
 8017b2e:	8a92      	ldrh	r2, [r2, #20]
 8017b30:	801a      	strh	r2, [r3, #0]
        break;
 8017b32:	e030      	b.n	8017b96 <lwip_netconn_do_getaddr+0xf6>
#endif /* LWIP_UDP */
#if LWIP_TCP
      case NETCONN_TCP:
        if ((msg->msg.ad.local == 0) &&
 8017b34:	68fb      	ldr	r3, [r7, #12]
 8017b36:	7c1b      	ldrb	r3, [r3, #16]
 8017b38:	2b00      	cmp	r3, #0
 8017b3a:	d10f      	bne.n	8017b5c <lwip_netconn_do_getaddr+0xbc>
            ((msg->conn->pcb.tcp->state == CLOSED) || (msg->conn->pcb.tcp->state == LISTEN))) {
 8017b3c:	68fb      	ldr	r3, [r7, #12]
 8017b3e:	681b      	ldr	r3, [r3, #0]
 8017b40:	685b      	ldr	r3, [r3, #4]
 8017b42:	7d1b      	ldrb	r3, [r3, #20]
        if ((msg->msg.ad.local == 0) &&
 8017b44:	2b00      	cmp	r3, #0
 8017b46:	d005      	beq.n	8017b54 <lwip_netconn_do_getaddr+0xb4>
            ((msg->conn->pcb.tcp->state == CLOSED) || (msg->conn->pcb.tcp->state == LISTEN))) {
 8017b48:	68fb      	ldr	r3, [r7, #12]
 8017b4a:	681b      	ldr	r3, [r3, #0]
 8017b4c:	685b      	ldr	r3, [r3, #4]
 8017b4e:	7d1b      	ldrb	r3, [r3, #20]
 8017b50:	2b01      	cmp	r3, #1
 8017b52:	d103      	bne.n	8017b5c <lwip_netconn_do_getaddr+0xbc>
          /* pcb is not connected and remote name is requested */
          msg->err = ERR_CONN;
 8017b54:	68fb      	ldr	r3, [r7, #12]
 8017b56:	22f5      	movs	r2, #245	@ 0xf5
 8017b58:	711a      	strb	r2, [r3, #4]
        } else {
          API_EXPR_DEREF(msg->msg.ad.port) = (msg->msg.ad.local ? msg->conn->pcb.tcp->local_port : msg->conn->pcb.tcp->remote_port);
        }
        break;
 8017b5a:	e01c      	b.n	8017b96 <lwip_netconn_do_getaddr+0xf6>
          API_EXPR_DEREF(msg->msg.ad.port) = (msg->msg.ad.local ? msg->conn->pcb.tcp->local_port : msg->conn->pcb.tcp->remote_port);
 8017b5c:	68fb      	ldr	r3, [r7, #12]
 8017b5e:	7c1b      	ldrb	r3, [r3, #16]
 8017b60:	2b00      	cmp	r3, #0
 8017b62:	d004      	beq.n	8017b6e <lwip_netconn_do_getaddr+0xce>
 8017b64:	68fb      	ldr	r3, [r7, #12]
 8017b66:	681b      	ldr	r3, [r3, #0]
 8017b68:	685b      	ldr	r3, [r3, #4]
 8017b6a:	8adb      	ldrh	r3, [r3, #22]
 8017b6c:	e003      	b.n	8017b76 <lwip_netconn_do_getaddr+0xd6>
 8017b6e:	68fb      	ldr	r3, [r7, #12]
 8017b70:	681b      	ldr	r3, [r3, #0]
 8017b72:	685b      	ldr	r3, [r3, #4]
 8017b74:	8b1b      	ldrh	r3, [r3, #24]
 8017b76:	68fa      	ldr	r2, [r7, #12]
 8017b78:	68d2      	ldr	r2, [r2, #12]
 8017b7a:	8013      	strh	r3, [r2, #0]
        break;
 8017b7c:	e00b      	b.n	8017b96 <lwip_netconn_do_getaddr+0xf6>
#endif /* LWIP_TCP */
      default:
        LWIP_ASSERT("invalid netconn_type", 0);
 8017b7e:	4b08      	ldr	r3, [pc, #32]	@ (8017ba0 <lwip_netconn_do_getaddr+0x100>)
 8017b80:	f240 727d 	movw	r2, #1917	@ 0x77d
 8017b84:	4907      	ldr	r1, [pc, #28]	@ (8017ba4 <lwip_netconn_do_getaddr+0x104>)
 8017b86:	4808      	ldr	r0, [pc, #32]	@ (8017ba8 <lwip_netconn_do_getaddr+0x108>)
 8017b88:	f012 fb18 	bl	802a1bc <iprintf>
        break;
 8017b8c:	e003      	b.n	8017b96 <lwip_netconn_do_getaddr+0xf6>
    }
  } else {
    msg->err = ERR_CONN;
 8017b8e:	68fb      	ldr	r3, [r7, #12]
 8017b90:	22f5      	movs	r2, #245	@ 0xf5
 8017b92:	711a      	strb	r2, [r3, #4]
  }
  TCPIP_APIMSG_ACK(msg);
}
 8017b94:	bf00      	nop
 8017b96:	bf00      	nop
 8017b98:	3710      	adds	r7, #16
 8017b9a:	46bd      	mov	sp, r7
 8017b9c:	bd80      	pop	{r7, pc}
 8017b9e:	bf00      	nop
 8017ba0:	0802d770 	.word	0x0802d770
 8017ba4:	0802dcb0 	.word	0x0802dcb0
 8017ba8:	0802d7b4 	.word	0x0802d7b4

08017bac <lwip_netconn_do_close>:
 *
 * @param m the api_msg pointing to the connection
 */
void
lwip_netconn_do_close(void *m)
{
 8017bac:	b580      	push	{r7, lr}
 8017bae:	b084      	sub	sp, #16
 8017bb0:	af00      	add	r7, sp, #0
 8017bb2:	6078      	str	r0, [r7, #4]
  struct api_msg *msg = (struct api_msg *)m;
 8017bb4:	687b      	ldr	r3, [r7, #4]
 8017bb6:	60fb      	str	r3, [r7, #12]

#if LWIP_TCP
  enum netconn_state state = msg->conn->state;
 8017bb8:	68fb      	ldr	r3, [r7, #12]
 8017bba:	681b      	ldr	r3, [r3, #0]
 8017bbc:	785b      	ldrb	r3, [r3, #1]
 8017bbe:	72fb      	strb	r3, [r7, #11]
  /* First check if this is a TCP netconn and if it is in a correct state
      (LISTEN doesn't support half shutdown) */
  if ((msg->conn->pcb.tcp != NULL) &&
 8017bc0:	68fb      	ldr	r3, [r7, #12]
 8017bc2:	681b      	ldr	r3, [r3, #0]
 8017bc4:	685b      	ldr	r3, [r3, #4]
 8017bc6:	2b00      	cmp	r3, #0
 8017bc8:	d067      	beq.n	8017c9a <lwip_netconn_do_close+0xee>
      (NETCONNTYPE_GROUP(msg->conn->type) == NETCONN_TCP) &&
 8017bca:	68fb      	ldr	r3, [r7, #12]
 8017bcc:	681b      	ldr	r3, [r3, #0]
 8017bce:	781b      	ldrb	r3, [r3, #0]
 8017bd0:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
  if ((msg->conn->pcb.tcp != NULL) &&
 8017bd4:	2b10      	cmp	r3, #16
 8017bd6:	d160      	bne.n	8017c9a <lwip_netconn_do_close+0xee>
      ((msg->msg.sd.shut == NETCONN_SHUT_RDWR) || (state != NETCONN_LISTEN))) {
 8017bd8:	68fb      	ldr	r3, [r7, #12]
 8017bda:	7a1b      	ldrb	r3, [r3, #8]
      (NETCONNTYPE_GROUP(msg->conn->type) == NETCONN_TCP) &&
 8017bdc:	2b03      	cmp	r3, #3
 8017bde:	d002      	beq.n	8017be6 <lwip_netconn_do_close+0x3a>
      ((msg->msg.sd.shut == NETCONN_SHUT_RDWR) || (state != NETCONN_LISTEN))) {
 8017be0:	7afb      	ldrb	r3, [r7, #11]
 8017be2:	2b02      	cmp	r3, #2
 8017be4:	d059      	beq.n	8017c9a <lwip_netconn_do_close+0xee>
    /* Check if we are in a connected state */
    if (state == NETCONN_CONNECT) {
 8017be6:	7afb      	ldrb	r3, [r7, #11]
 8017be8:	2b03      	cmp	r3, #3
 8017bea:	d103      	bne.n	8017bf4 <lwip_netconn_do_close+0x48>
      /* TCP connect in progress: cannot shutdown */
      msg->err = ERR_CONN;
 8017bec:	68fb      	ldr	r3, [r7, #12]
 8017bee:	22f5      	movs	r2, #245	@ 0xf5
 8017bf0:	711a      	strb	r2, [r3, #4]
    if (state == NETCONN_CONNECT) {
 8017bf2:	e057      	b.n	8017ca4 <lwip_netconn_do_close+0xf8>
    } else if (state == NETCONN_WRITE) {
 8017bf4:	7afb      	ldrb	r3, [r7, #11]
 8017bf6:	2b01      	cmp	r3, #1
 8017bf8:	d103      	bne.n	8017c02 <lwip_netconn_do_close+0x56>
        msg->err = tcp_shutdown(msg->conn->pcb.tcp, 1, 0);
      }
    }
    if (state == NETCONN_NONE) {
#else /* LWIP_NETCONN_FULLDUPLEX */
      msg->err = ERR_INPROGRESS;
 8017bfa:	68fb      	ldr	r3, [r7, #12]
 8017bfc:	22fb      	movs	r2, #251	@ 0xfb
 8017bfe:	711a      	strb	r2, [r3, #4]
    if (state == NETCONN_CONNECT) {
 8017c00:	e050      	b.n	8017ca4 <lwip_netconn_do_close+0xf8>
    } else {
#endif /* LWIP_NETCONN_FULLDUPLEX */
      if (msg->msg.sd.shut & NETCONN_SHUT_RD) {
 8017c02:	68fb      	ldr	r3, [r7, #12]
 8017c04:	7a1b      	ldrb	r3, [r3, #8]
 8017c06:	f003 0301 	and.w	r3, r3, #1
 8017c0a:	2b00      	cmp	r3, #0
 8017c0c:	d004      	beq.n	8017c18 <lwip_netconn_do_close+0x6c>
#if LWIP_NETCONN_FULLDUPLEX
        /* Mark mboxes invalid */
        netconn_mark_mbox_invalid(msg->conn);
#else /* LWIP_NETCONN_FULLDUPLEX */
        netconn_drain(msg->conn);
 8017c0e:	68fb      	ldr	r3, [r7, #12]
 8017c10:	681b      	ldr	r3, [r3, #0]
 8017c12:	4618      	mov	r0, r3
 8017c14:	f7ff f82e 	bl	8016c74 <netconn_drain>
#endif /* LWIP_NETCONN_FULLDUPLEX */
      }
      LWIP_ASSERT("already writing or closing", msg->conn->current_msg == NULL);
 8017c18:	68fb      	ldr	r3, [r7, #12]
 8017c1a:	681b      	ldr	r3, [r3, #0]
 8017c1c:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017c1e:	2b00      	cmp	r3, #0
 8017c20:	d006      	beq.n	8017c30 <lwip_netconn_do_close+0x84>
 8017c22:	4b22      	ldr	r3, [pc, #136]	@ (8017cac <lwip_netconn_do_close+0x100>)
 8017c24:	f240 72bd 	movw	r2, #1981	@ 0x7bd
 8017c28:	4921      	ldr	r1, [pc, #132]	@ (8017cb0 <lwip_netconn_do_close+0x104>)
 8017c2a:	4822      	ldr	r0, [pc, #136]	@ (8017cb4 <lwip_netconn_do_close+0x108>)
 8017c2c:	f012 fac6 	bl	802a1bc <iprintf>
      msg->conn->state = NETCONN_CLOSE;
 8017c30:	68fb      	ldr	r3, [r7, #12]
 8017c32:	681b      	ldr	r3, [r3, #0]
 8017c34:	2204      	movs	r2, #4
 8017c36:	705a      	strb	r2, [r3, #1]
      msg->conn->current_msg = msg;
 8017c38:	68fb      	ldr	r3, [r7, #12]
 8017c3a:	681b      	ldr	r3, [r3, #0]
 8017c3c:	68fa      	ldr	r2, [r7, #12]
 8017c3e:	62da      	str	r2, [r3, #44]	@ 0x2c
#if LWIP_TCPIP_CORE_LOCKING
      if (lwip_netconn_do_close_internal(msg->conn, 0) != ERR_OK) {
 8017c40:	68fb      	ldr	r3, [r7, #12]
 8017c42:	681b      	ldr	r3, [r3, #0]
 8017c44:	2100      	movs	r1, #0
 8017c46:	4618      	mov	r0, r3
 8017c48:	f7ff f892 	bl	8016d70 <lwip_netconn_do_close_internal>
 8017c4c:	4603      	mov	r3, r0
 8017c4e:	2b00      	cmp	r3, #0
 8017c50:	d027      	beq.n	8017ca2 <lwip_netconn_do_close+0xf6>
        LWIP_ASSERT("state!", msg->conn->state == NETCONN_CLOSE);
 8017c52:	68fb      	ldr	r3, [r7, #12]
 8017c54:	681b      	ldr	r3, [r3, #0]
 8017c56:	785b      	ldrb	r3, [r3, #1]
 8017c58:	2b04      	cmp	r3, #4
 8017c5a:	d006      	beq.n	8017c6a <lwip_netconn_do_close+0xbe>
 8017c5c:	4b13      	ldr	r3, [pc, #76]	@ (8017cac <lwip_netconn_do_close+0x100>)
 8017c5e:	f240 72c2 	movw	r2, #1986	@ 0x7c2
 8017c62:	4915      	ldr	r1, [pc, #84]	@ (8017cb8 <lwip_netconn_do_close+0x10c>)
 8017c64:	4813      	ldr	r0, [pc, #76]	@ (8017cb4 <lwip_netconn_do_close+0x108>)
 8017c66:	f012 faa9 	bl	802a1bc <iprintf>
        UNLOCK_TCPIP_CORE();
 8017c6a:	f7f8 fef9 	bl	8010a60 <sys_unlock_tcpip_core>
        sys_arch_sem_wait(LWIP_API_MSG_SEM(msg), 0);
 8017c6e:	68fb      	ldr	r3, [r7, #12]
 8017c70:	681b      	ldr	r3, [r3, #0]
 8017c72:	330c      	adds	r3, #12
 8017c74:	2100      	movs	r1, #0
 8017c76:	4618      	mov	r0, r3
 8017c78:	f00e ff43 	bl	8026b02 <sys_arch_sem_wait>
        LOCK_TCPIP_CORE();
 8017c7c:	f7f8 fee0 	bl	8010a40 <sys_lock_tcpip_core>
        LWIP_ASSERT("state!", msg->conn->state == NETCONN_NONE);
 8017c80:	68fb      	ldr	r3, [r7, #12]
 8017c82:	681b      	ldr	r3, [r3, #0]
 8017c84:	785b      	ldrb	r3, [r3, #1]
 8017c86:	2b00      	cmp	r3, #0
 8017c88:	d00b      	beq.n	8017ca2 <lwip_netconn_do_close+0xf6>
 8017c8a:	4b08      	ldr	r3, [pc, #32]	@ (8017cac <lwip_netconn_do_close+0x100>)
 8017c8c:	f240 72c6 	movw	r2, #1990	@ 0x7c6
 8017c90:	4909      	ldr	r1, [pc, #36]	@ (8017cb8 <lwip_netconn_do_close+0x10c>)
 8017c92:	4808      	ldr	r0, [pc, #32]	@ (8017cb4 <lwip_netconn_do_close+0x108>)
 8017c94:	f012 fa92 	bl	802a1bc <iprintf>
      }
#else /* LWIP_TCPIP_CORE_LOCKING */
      lwip_netconn_do_close_internal(msg->conn);
#endif /* LWIP_TCPIP_CORE_LOCKING */
      /* for tcp netconns, lwip_netconn_do_close_internal ACKs the message */
      return;
 8017c98:	e003      	b.n	8017ca2 <lwip_netconn_do_close+0xf6>
    }
  } else
#endif /* LWIP_TCP */
  {
    msg->err = ERR_CONN;
 8017c9a:	68fb      	ldr	r3, [r7, #12]
 8017c9c:	22f5      	movs	r2, #245	@ 0xf5
 8017c9e:	711a      	strb	r2, [r3, #4]
 8017ca0:	e000      	b.n	8017ca4 <lwip_netconn_do_close+0xf8>
      return;
 8017ca2:	bf00      	nop
  }
  TCPIP_APIMSG_ACK(msg);
}
 8017ca4:	3710      	adds	r7, #16
 8017ca6:	46bd      	mov	sp, r7
 8017ca8:	bd80      	pop	{r7, pc}
 8017caa:	bf00      	nop
 8017cac:	0802d770 	.word	0x0802d770
 8017cb0:	0802db14 	.word	0x0802db14
 8017cb4:	0802d7b4 	.word	0x0802d7b4
 8017cb8:	0802db30 	.word	0x0802db30

08017cbc <err_to_errno>:
  EIO            /* ERR_ARG        -16     Illegal argument.        */
};

int
err_to_errno(err_t err)
{
 8017cbc:	b480      	push	{r7}
 8017cbe:	b083      	sub	sp, #12
 8017cc0:	af00      	add	r7, sp, #0
 8017cc2:	4603      	mov	r3, r0
 8017cc4:	71fb      	strb	r3, [r7, #7]
  if ((err > 0) || (-err >= (err_t)LWIP_ARRAYSIZE(err_to_errno_table))) {
 8017cc6:	f997 3007 	ldrsb.w	r3, [r7, #7]
 8017cca:	2b00      	cmp	r3, #0
 8017ccc:	dc04      	bgt.n	8017cd8 <err_to_errno+0x1c>
 8017cce:	f997 3007 	ldrsb.w	r3, [r7, #7]
 8017cd2:	f113 0f10 	cmn.w	r3, #16
 8017cd6:	da01      	bge.n	8017cdc <err_to_errno+0x20>
    return EIO;
 8017cd8:	2305      	movs	r3, #5
 8017cda:	e005      	b.n	8017ce8 <err_to_errno+0x2c>
  }
  return err_to_errno_table[-err];
 8017cdc:	f997 3007 	ldrsb.w	r3, [r7, #7]
 8017ce0:	425b      	negs	r3, r3
 8017ce2:	4a04      	ldr	r2, [pc, #16]	@ (8017cf4 <err_to_errno+0x38>)
 8017ce4:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
}
 8017ce8:	4618      	mov	r0, r3
 8017cea:	370c      	adds	r7, #12
 8017cec:	46bd      	mov	sp, r7
 8017cee:	f85d 7b04 	ldr.w	r7, [sp], #4
 8017cf2:	4770      	bx	lr
 8017cf4:	0803135c 	.word	0x0803135c

08017cf8 <netbuf_delete>:
 *
 * @param buf pointer to a netbuf allocated by netbuf_new()
 */
void
netbuf_delete(struct netbuf *buf)
{
 8017cf8:	b580      	push	{r7, lr}
 8017cfa:	b082      	sub	sp, #8
 8017cfc:	af00      	add	r7, sp, #0
 8017cfe:	6078      	str	r0, [r7, #4]
  if (buf != NULL) {
 8017d00:	687b      	ldr	r3, [r7, #4]
 8017d02:	2b00      	cmp	r3, #0
 8017d04:	d013      	beq.n	8017d2e <netbuf_delete+0x36>
    if (buf->p != NULL) {
 8017d06:	687b      	ldr	r3, [r7, #4]
 8017d08:	681b      	ldr	r3, [r3, #0]
 8017d0a:	2b00      	cmp	r3, #0
 8017d0c:	d00b      	beq.n	8017d26 <netbuf_delete+0x2e>
      pbuf_free(buf->p);
 8017d0e:	687b      	ldr	r3, [r7, #4]
 8017d10:	681b      	ldr	r3, [r3, #0]
 8017d12:	4618      	mov	r0, r3
 8017d14:	f002 ffda 	bl	801accc <pbuf_free>
      buf->p = buf->ptr = NULL;
 8017d18:	687b      	ldr	r3, [r7, #4]
 8017d1a:	2200      	movs	r2, #0
 8017d1c:	605a      	str	r2, [r3, #4]
 8017d1e:	687b      	ldr	r3, [r7, #4]
 8017d20:	685a      	ldr	r2, [r3, #4]
 8017d22:	687b      	ldr	r3, [r7, #4]
 8017d24:	601a      	str	r2, [r3, #0]
    }
    memp_free(MEMP_NETBUF, buf);
 8017d26:	6879      	ldr	r1, [r7, #4]
 8017d28:	2006      	movs	r0, #6
 8017d2a:	f002 f8e1 	bl	8019ef0 <memp_free>
  }
}
 8017d2e:	bf00      	nop
 8017d30:	3708      	adds	r7, #8
 8017d32:	46bd      	mov	sp, r7
 8017d34:	bd80      	pop	{r7, pc}
	...

08017d38 <netbuf_free>:
 *
 * @param buf pointer to the netbuf which contains the packet buffer to free
 */
void
netbuf_free(struct netbuf *buf)
{
 8017d38:	b580      	push	{r7, lr}
 8017d3a:	b082      	sub	sp, #8
 8017d3c:	af00      	add	r7, sp, #0
 8017d3e:	6078      	str	r0, [r7, #4]
  LWIP_ERROR("netbuf_free: invalid buf", (buf != NULL), return;);
 8017d40:	687b      	ldr	r3, [r7, #4]
 8017d42:	2b00      	cmp	r3, #0
 8017d44:	d106      	bne.n	8017d54 <netbuf_free+0x1c>
 8017d46:	4b0d      	ldr	r3, [pc, #52]	@ (8017d7c <netbuf_free+0x44>)
 8017d48:	2281      	movs	r2, #129	@ 0x81
 8017d4a:	490d      	ldr	r1, [pc, #52]	@ (8017d80 <netbuf_free+0x48>)
 8017d4c:	480d      	ldr	r0, [pc, #52]	@ (8017d84 <netbuf_free+0x4c>)
 8017d4e:	f012 fa35 	bl	802a1bc <iprintf>
 8017d52:	e00f      	b.n	8017d74 <netbuf_free+0x3c>
  if (buf->p != NULL) {
 8017d54:	687b      	ldr	r3, [r7, #4]
 8017d56:	681b      	ldr	r3, [r3, #0]
 8017d58:	2b00      	cmp	r3, #0
 8017d5a:	d004      	beq.n	8017d66 <netbuf_free+0x2e>
    pbuf_free(buf->p);
 8017d5c:	687b      	ldr	r3, [r7, #4]
 8017d5e:	681b      	ldr	r3, [r3, #0]
 8017d60:	4618      	mov	r0, r3
 8017d62:	f002 ffb3 	bl	801accc <pbuf_free>
  }
  buf->p = buf->ptr = NULL;
 8017d66:	687b      	ldr	r3, [r7, #4]
 8017d68:	2200      	movs	r2, #0
 8017d6a:	605a      	str	r2, [r3, #4]
 8017d6c:	687b      	ldr	r3, [r7, #4]
 8017d6e:	685a      	ldr	r2, [r3, #4]
 8017d70:	687b      	ldr	r3, [r7, #4]
 8017d72:	601a      	str	r2, [r3, #0]
#if LWIP_CHECKSUM_ON_COPY
  buf->flags = 0;
  buf->toport_chksum = 0;
#endif /* LWIP_CHECKSUM_ON_COPY */
}
 8017d74:	3708      	adds	r7, #8
 8017d76:	46bd      	mov	sp, r7
 8017d78:	bd80      	pop	{r7, pc}
 8017d7a:	bf00      	nop
 8017d7c:	0802dcc8 	.word	0x0802dcc8
 8017d80:	0802dd64 	.word	0x0802dd64
 8017d84:	0802dd18 	.word	0x0802dd18

08017d88 <netbuf_ref>:
 * @return ERR_OK if data is referenced
 *         ERR_MEM if data couldn't be referenced due to lack of memory
 */
err_t
netbuf_ref(struct netbuf *buf, const void *dataptr, u16_t size)
{
 8017d88:	b580      	push	{r7, lr}
 8017d8a:	b084      	sub	sp, #16
 8017d8c:	af00      	add	r7, sp, #0
 8017d8e:	60f8      	str	r0, [r7, #12]
 8017d90:	60b9      	str	r1, [r7, #8]
 8017d92:	4613      	mov	r3, r2
 8017d94:	80fb      	strh	r3, [r7, #6]
  LWIP_ERROR("netbuf_ref: invalid buf", (buf != NULL), return ERR_ARG;);
 8017d96:	68fb      	ldr	r3, [r7, #12]
 8017d98:	2b00      	cmp	r3, #0
 8017d9a:	d108      	bne.n	8017dae <netbuf_ref+0x26>
 8017d9c:	4b1c      	ldr	r3, [pc, #112]	@ (8017e10 <netbuf_ref+0x88>)
 8017d9e:	2299      	movs	r2, #153	@ 0x99
 8017da0:	491c      	ldr	r1, [pc, #112]	@ (8017e14 <netbuf_ref+0x8c>)
 8017da2:	481d      	ldr	r0, [pc, #116]	@ (8017e18 <netbuf_ref+0x90>)
 8017da4:	f012 fa0a 	bl	802a1bc <iprintf>
 8017da8:	f06f 030f 	mvn.w	r3, #15
 8017dac:	e02b      	b.n	8017e06 <netbuf_ref+0x7e>
  if (buf->p != NULL) {
 8017dae:	68fb      	ldr	r3, [r7, #12]
 8017db0:	681b      	ldr	r3, [r3, #0]
 8017db2:	2b00      	cmp	r3, #0
 8017db4:	d004      	beq.n	8017dc0 <netbuf_ref+0x38>
    pbuf_free(buf->p);
 8017db6:	68fb      	ldr	r3, [r7, #12]
 8017db8:	681b      	ldr	r3, [r3, #0]
 8017dba:	4618      	mov	r0, r3
 8017dbc:	f002 ff86 	bl	801accc <pbuf_free>
  }
  buf->p = pbuf_alloc(PBUF_TRANSPORT, 0, PBUF_REF);
 8017dc0:	2241      	movs	r2, #65	@ 0x41
 8017dc2:	2100      	movs	r1, #0
 8017dc4:	2036      	movs	r0, #54	@ 0x36
 8017dc6:	f002 fc6b 	bl	801a6a0 <pbuf_alloc>
 8017dca:	4602      	mov	r2, r0
 8017dcc:	68fb      	ldr	r3, [r7, #12]
 8017dce:	601a      	str	r2, [r3, #0]
  if (buf->p == NULL) {
 8017dd0:	68fb      	ldr	r3, [r7, #12]
 8017dd2:	681b      	ldr	r3, [r3, #0]
 8017dd4:	2b00      	cmp	r3, #0
 8017dd6:	d105      	bne.n	8017de4 <netbuf_ref+0x5c>
    buf->ptr = NULL;
 8017dd8:	68fb      	ldr	r3, [r7, #12]
 8017dda:	2200      	movs	r2, #0
 8017ddc:	605a      	str	r2, [r3, #4]
    return ERR_MEM;
 8017dde:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8017de2:	e010      	b.n	8017e06 <netbuf_ref+0x7e>
  }
  ((struct pbuf_rom *)buf->p)->payload = dataptr;
 8017de4:	68fb      	ldr	r3, [r7, #12]
 8017de6:	681b      	ldr	r3, [r3, #0]
 8017de8:	68ba      	ldr	r2, [r7, #8]
 8017dea:	605a      	str	r2, [r3, #4]
  buf->p->len = buf->p->tot_len = size;
 8017dec:	68fb      	ldr	r3, [r7, #12]
 8017dee:	681b      	ldr	r3, [r3, #0]
 8017df0:	88fa      	ldrh	r2, [r7, #6]
 8017df2:	811a      	strh	r2, [r3, #8]
 8017df4:	68fa      	ldr	r2, [r7, #12]
 8017df6:	6812      	ldr	r2, [r2, #0]
 8017df8:	891b      	ldrh	r3, [r3, #8]
 8017dfa:	8153      	strh	r3, [r2, #10]
  buf->ptr = buf->p;
 8017dfc:	68fb      	ldr	r3, [r7, #12]
 8017dfe:	681a      	ldr	r2, [r3, #0]
 8017e00:	68fb      	ldr	r3, [r7, #12]
 8017e02:	605a      	str	r2, [r3, #4]
  return ERR_OK;
 8017e04:	2300      	movs	r3, #0
}
 8017e06:	4618      	mov	r0, r3
 8017e08:	3710      	adds	r7, #16
 8017e0a:	46bd      	mov	sp, r7
 8017e0c:	bd80      	pop	{r7, pc}
 8017e0e:	bf00      	nop
 8017e10:	0802dcc8 	.word	0x0802dcc8
 8017e14:	0802dd80 	.word	0x0802dd80
 8017e18:	0802dd18 	.word	0x0802dd18

08017e1c <tryget_socket_unconn_nouse>:
#endif /* LWIP_NETCONN_FULLDUPLEX */

/* Translate a socket 'int' into a pointer (only fails if the index is invalid) */
static struct lwip_sock *
tryget_socket_unconn_nouse(int fd)
{
 8017e1c:	b480      	push	{r7}
 8017e1e:	b085      	sub	sp, #20
 8017e20:	af00      	add	r7, sp, #0
 8017e22:	6078      	str	r0, [r7, #4]
  int s = fd - LWIP_SOCKET_OFFSET;
 8017e24:	687b      	ldr	r3, [r7, #4]
 8017e26:	60fb      	str	r3, [r7, #12]
  if ((s < 0) || (s >= NUM_SOCKETS)) {
 8017e28:	68fb      	ldr	r3, [r7, #12]
 8017e2a:	2b00      	cmp	r3, #0
 8017e2c:	db02      	blt.n	8017e34 <tryget_socket_unconn_nouse+0x18>
 8017e2e:	68fb      	ldr	r3, [r7, #12]
 8017e30:	2b03      	cmp	r3, #3
 8017e32:	dd01      	ble.n	8017e38 <tryget_socket_unconn_nouse+0x1c>
    LWIP_DEBUGF(SOCKETS_DEBUG, ("tryget_socket_unconn(%d): invalid\n", fd));
    return NULL;
 8017e34:	2300      	movs	r3, #0
 8017e36:	e003      	b.n	8017e40 <tryget_socket_unconn_nouse+0x24>
  }
  return &sockets[s];
 8017e38:	68fb      	ldr	r3, [r7, #12]
 8017e3a:	011b      	lsls	r3, r3, #4
 8017e3c:	4a03      	ldr	r2, [pc, #12]	@ (8017e4c <tryget_socket_unconn_nouse+0x30>)
 8017e3e:	4413      	add	r3, r2
}
 8017e40:	4618      	mov	r0, r3
 8017e42:	3714      	adds	r7, #20
 8017e44:	46bd      	mov	sp, r7
 8017e46:	f85d 7b04 	ldr.w	r7, [sp], #4
 8017e4a:	4770      	bx	lr
 8017e4c:	240243b4 	.word	0x240243b4

08017e50 <tryget_socket_unconn>:
}

/* Translate a socket 'int' into a pointer (only fails if the index is invalid) */
static struct lwip_sock *
tryget_socket_unconn(int fd)
{
 8017e50:	b580      	push	{r7, lr}
 8017e52:	b084      	sub	sp, #16
 8017e54:	af00      	add	r7, sp, #0
 8017e56:	6078      	str	r0, [r7, #4]
  struct lwip_sock *ret = tryget_socket_unconn_nouse(fd);
 8017e58:	6878      	ldr	r0, [r7, #4]
 8017e5a:	f7ff ffdf 	bl	8017e1c <tryget_socket_unconn_nouse>
 8017e5e:	60f8      	str	r0, [r7, #12]
  if (ret != NULL) {
    if (!sock_inc_used(ret)) {
      return NULL;
    }
  }
  return ret;
 8017e60:	68fb      	ldr	r3, [r7, #12]
}
 8017e62:	4618      	mov	r0, r3
 8017e64:	3710      	adds	r7, #16
 8017e66:	46bd      	mov	sp, r7
 8017e68:	bd80      	pop	{r7, pc}

08017e6a <tryget_socket>:
 * @param fd externally used socket index
 * @return struct lwip_sock for the socket or NULL if not found
 */
static struct lwip_sock *
tryget_socket(int fd)
{
 8017e6a:	b580      	push	{r7, lr}
 8017e6c:	b084      	sub	sp, #16
 8017e6e:	af00      	add	r7, sp, #0
 8017e70:	6078      	str	r0, [r7, #4]
  struct lwip_sock *sock = tryget_socket_unconn(fd);
 8017e72:	6878      	ldr	r0, [r7, #4]
 8017e74:	f7ff ffec 	bl	8017e50 <tryget_socket_unconn>
 8017e78:	60f8      	str	r0, [r7, #12]
  if (sock != NULL) {
 8017e7a:	68fb      	ldr	r3, [r7, #12]
 8017e7c:	2b00      	cmp	r3, #0
 8017e7e:	d005      	beq.n	8017e8c <tryget_socket+0x22>
    if (sock->conn) {
 8017e80:	68fb      	ldr	r3, [r7, #12]
 8017e82:	681b      	ldr	r3, [r3, #0]
 8017e84:	2b00      	cmp	r3, #0
 8017e86:	d001      	beq.n	8017e8c <tryget_socket+0x22>
      return sock;
 8017e88:	68fb      	ldr	r3, [r7, #12]
 8017e8a:	e000      	b.n	8017e8e <tryget_socket+0x24>
    }
    done_socket(sock);
  }
  return NULL;
 8017e8c:	2300      	movs	r3, #0
}
 8017e8e:	4618      	mov	r0, r3
 8017e90:	3710      	adds	r7, #16
 8017e92:	46bd      	mov	sp, r7
 8017e94:	bd80      	pop	{r7, pc}
	...

08017e98 <get_socket>:
 * @param fd externally used socket index
 * @return struct lwip_sock for the socket or NULL if not found
 */
static struct lwip_sock *
get_socket(int fd)
{
 8017e98:	b580      	push	{r7, lr}
 8017e9a:	b084      	sub	sp, #16
 8017e9c:	af00      	add	r7, sp, #0
 8017e9e:	6078      	str	r0, [r7, #4]
  struct lwip_sock *sock = tryget_socket(fd);
 8017ea0:	6878      	ldr	r0, [r7, #4]
 8017ea2:	f7ff ffe2 	bl	8017e6a <tryget_socket>
 8017ea6:	60f8      	str	r0, [r7, #12]
  if (!sock) {
 8017ea8:	68fb      	ldr	r3, [r7, #12]
 8017eaa:	2b00      	cmp	r3, #0
 8017eac:	d104      	bne.n	8017eb8 <get_socket+0x20>
    if ((fd < LWIP_SOCKET_OFFSET) || (fd >= (LWIP_SOCKET_OFFSET + NUM_SOCKETS))) {
      LWIP_DEBUGF(SOCKETS_DEBUG, ("get_socket(%d): invalid\n", fd));
    }
    set_errno(EBADF);
 8017eae:	4b05      	ldr	r3, [pc, #20]	@ (8017ec4 <get_socket+0x2c>)
 8017eb0:	2209      	movs	r2, #9
 8017eb2:	601a      	str	r2, [r3, #0]
    return NULL;
 8017eb4:	2300      	movs	r3, #0
 8017eb6:	e000      	b.n	8017eba <get_socket+0x22>
  }
  return sock;
 8017eb8:	68fb      	ldr	r3, [r7, #12]
}
 8017eba:	4618      	mov	r0, r3
 8017ebc:	3710      	adds	r7, #16
 8017ebe:	46bd      	mov	sp, r7
 8017ec0:	bd80      	pop	{r7, pc}
 8017ec2:	bf00      	nop
 8017ec4:	2402b250 	.word	0x2402b250

08017ec8 <alloc_socket>:
 *                 0 if socket has been created by socket()
 * @return the index of the new socket; -1 on error
 */
static int
alloc_socket(struct netconn *newconn, int accepted)
{
 8017ec8:	b580      	push	{r7, lr}
 8017eca:	b084      	sub	sp, #16
 8017ecc:	af00      	add	r7, sp, #0
 8017ece:	6078      	str	r0, [r7, #4]
 8017ed0:	6039      	str	r1, [r7, #0]
  int i;
  SYS_ARCH_DECL_PROTECT(lev);
  LWIP_UNUSED_ARG(accepted);

  /* allocate a new socket identifier */
  for (i = 0; i < NUM_SOCKETS; ++i) {
 8017ed2:	2300      	movs	r3, #0
 8017ed4:	60fb      	str	r3, [r7, #12]
 8017ed6:	e052      	b.n	8017f7e <alloc_socket+0xb6>
    /* Protect socket array */
    SYS_ARCH_PROTECT(lev);
 8017ed8:	f00e feda 	bl	8026c90 <sys_arch_protect>
 8017edc:	60b8      	str	r0, [r7, #8]
    if (!sockets[i].conn) {
 8017ede:	4a2c      	ldr	r2, [pc, #176]	@ (8017f90 <alloc_socket+0xc8>)
 8017ee0:	68fb      	ldr	r3, [r7, #12]
 8017ee2:	011b      	lsls	r3, r3, #4
 8017ee4:	4413      	add	r3, r2
 8017ee6:	681b      	ldr	r3, [r3, #0]
 8017ee8:	2b00      	cmp	r3, #0
 8017eea:	d142      	bne.n	8017f72 <alloc_socket+0xaa>
        continue;
      }
      sockets[i].fd_used    = 1;
      sockets[i].fd_free_pending = 0;
#endif
      sockets[i].conn       = newconn;
 8017eec:	4a28      	ldr	r2, [pc, #160]	@ (8017f90 <alloc_socket+0xc8>)
 8017eee:	68fb      	ldr	r3, [r7, #12]
 8017ef0:	011b      	lsls	r3, r3, #4
 8017ef2:	4413      	add	r3, r2
 8017ef4:	687a      	ldr	r2, [r7, #4]
 8017ef6:	601a      	str	r2, [r3, #0]
      /* The socket is not yet known to anyone, so no need to protect
         after having marked it as used. */
      SYS_ARCH_UNPROTECT(lev);
 8017ef8:	68b8      	ldr	r0, [r7, #8]
 8017efa:	f00e fed7 	bl	8026cac <sys_arch_unprotect>
      sockets[i].lastdata.pbuf = NULL;
 8017efe:	4a24      	ldr	r2, [pc, #144]	@ (8017f90 <alloc_socket+0xc8>)
 8017f00:	68fb      	ldr	r3, [r7, #12]
 8017f02:	011b      	lsls	r3, r3, #4
 8017f04:	4413      	add	r3, r2
 8017f06:	3304      	adds	r3, #4
 8017f08:	2200      	movs	r2, #0
 8017f0a:	601a      	str	r2, [r3, #0]
#if LWIP_SOCKET_SELECT || LWIP_SOCKET_POLL
      LWIP_ASSERT("sockets[i].select_waiting == 0", sockets[i].select_waiting == 0);
 8017f0c:	4a20      	ldr	r2, [pc, #128]	@ (8017f90 <alloc_socket+0xc8>)
 8017f0e:	68fb      	ldr	r3, [r7, #12]
 8017f10:	011b      	lsls	r3, r3, #4
 8017f12:	4413      	add	r3, r2
 8017f14:	330e      	adds	r3, #14
 8017f16:	781b      	ldrb	r3, [r3, #0]
 8017f18:	2b00      	cmp	r3, #0
 8017f1a:	d006      	beq.n	8017f2a <alloc_socket+0x62>
 8017f1c:	4b1d      	ldr	r3, [pc, #116]	@ (8017f94 <alloc_socket+0xcc>)
 8017f1e:	f240 220e 	movw	r2, #526	@ 0x20e
 8017f22:	491d      	ldr	r1, [pc, #116]	@ (8017f98 <alloc_socket+0xd0>)
 8017f24:	481d      	ldr	r0, [pc, #116]	@ (8017f9c <alloc_socket+0xd4>)
 8017f26:	f012 f949 	bl	802a1bc <iprintf>
      sockets[i].rcvevent   = 0;
 8017f2a:	4a19      	ldr	r2, [pc, #100]	@ (8017f90 <alloc_socket+0xc8>)
 8017f2c:	68fb      	ldr	r3, [r7, #12]
 8017f2e:	011b      	lsls	r3, r3, #4
 8017f30:	4413      	add	r3, r2
 8017f32:	3308      	adds	r3, #8
 8017f34:	2200      	movs	r2, #0
 8017f36:	801a      	strh	r2, [r3, #0]
      /* TCP sendbuf is empty, but the socket is not yet writable until connected
       * (unless it has been created by accept()). */
      sockets[i].sendevent  = (NETCONNTYPE_GROUP(newconn->type) == NETCONN_TCP ? (accepted != 0) : 1);
 8017f38:	687b      	ldr	r3, [r7, #4]
 8017f3a:	781b      	ldrb	r3, [r3, #0]
 8017f3c:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8017f40:	2b10      	cmp	r3, #16
 8017f42:	d102      	bne.n	8017f4a <alloc_socket+0x82>
 8017f44:	683b      	ldr	r3, [r7, #0]
 8017f46:	2b00      	cmp	r3, #0
 8017f48:	d001      	beq.n	8017f4e <alloc_socket+0x86>
 8017f4a:	2301      	movs	r3, #1
 8017f4c:	e000      	b.n	8017f50 <alloc_socket+0x88>
 8017f4e:	2300      	movs	r3, #0
 8017f50:	b299      	uxth	r1, r3
 8017f52:	4a0f      	ldr	r2, [pc, #60]	@ (8017f90 <alloc_socket+0xc8>)
 8017f54:	68fb      	ldr	r3, [r7, #12]
 8017f56:	011b      	lsls	r3, r3, #4
 8017f58:	4413      	add	r3, r2
 8017f5a:	330a      	adds	r3, #10
 8017f5c:	460a      	mov	r2, r1
 8017f5e:	801a      	strh	r2, [r3, #0]
      sockets[i].errevent   = 0;
 8017f60:	4a0b      	ldr	r2, [pc, #44]	@ (8017f90 <alloc_socket+0xc8>)
 8017f62:	68fb      	ldr	r3, [r7, #12]
 8017f64:	011b      	lsls	r3, r3, #4
 8017f66:	4413      	add	r3, r2
 8017f68:	330c      	adds	r3, #12
 8017f6a:	2200      	movs	r2, #0
 8017f6c:	801a      	strh	r2, [r3, #0]
#endif /* LWIP_SOCKET_SELECT || LWIP_SOCKET_POLL */
      return i + LWIP_SOCKET_OFFSET;
 8017f6e:	68fb      	ldr	r3, [r7, #12]
 8017f70:	e00a      	b.n	8017f88 <alloc_socket+0xc0>
    }
    SYS_ARCH_UNPROTECT(lev);
 8017f72:	68b8      	ldr	r0, [r7, #8]
 8017f74:	f00e fe9a 	bl	8026cac <sys_arch_unprotect>
  for (i = 0; i < NUM_SOCKETS; ++i) {
 8017f78:	68fb      	ldr	r3, [r7, #12]
 8017f7a:	3301      	adds	r3, #1
 8017f7c:	60fb      	str	r3, [r7, #12]
 8017f7e:	68fb      	ldr	r3, [r7, #12]
 8017f80:	2b03      	cmp	r3, #3
 8017f82:	dda9      	ble.n	8017ed8 <alloc_socket+0x10>
  }
  return -1;
 8017f84:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
}
 8017f88:	4618      	mov	r0, r3
 8017f8a:	3710      	adds	r7, #16
 8017f8c:	46bd      	mov	sp, r7
 8017f8e:	bd80      	pop	{r7, pc}
 8017f90:	240243b4 	.word	0x240243b4
 8017f94:	0802de60 	.word	0x0802de60
 8017f98:	0802de94 	.word	0x0802de94
 8017f9c:	0802deb4 	.word	0x0802deb4

08017fa0 <free_socket_locked>:
 * @param lastdata lastdata is stored here, must be freed externally
 */
static int
free_socket_locked(struct lwip_sock *sock, int is_tcp, struct netconn **conn,
                   union lwip_sock_lastdata *lastdata)
{
 8017fa0:	b480      	push	{r7}
 8017fa2:	b085      	sub	sp, #20
 8017fa4:	af00      	add	r7, sp, #0
 8017fa6:	60f8      	str	r0, [r7, #12]
 8017fa8:	60b9      	str	r1, [r7, #8]
 8017faa:	607a      	str	r2, [r7, #4]
 8017fac:	603b      	str	r3, [r7, #0]
  }
#else /* LWIP_NETCONN_FULLDUPLEX */
  LWIP_UNUSED_ARG(is_tcp);
#endif /* LWIP_NETCONN_FULLDUPLEX */

  *lastdata = sock->lastdata;
 8017fae:	683b      	ldr	r3, [r7, #0]
 8017fb0:	68fa      	ldr	r2, [r7, #12]
 8017fb2:	6852      	ldr	r2, [r2, #4]
 8017fb4:	601a      	str	r2, [r3, #0]
  sock->lastdata.pbuf = NULL;
 8017fb6:	68fb      	ldr	r3, [r7, #12]
 8017fb8:	2200      	movs	r2, #0
 8017fba:	605a      	str	r2, [r3, #4]
  *conn = sock->conn;
 8017fbc:	68fb      	ldr	r3, [r7, #12]
 8017fbe:	681a      	ldr	r2, [r3, #0]
 8017fc0:	687b      	ldr	r3, [r7, #4]
 8017fc2:	601a      	str	r2, [r3, #0]
  sock->conn = NULL;
 8017fc4:	68fb      	ldr	r3, [r7, #12]
 8017fc6:	2200      	movs	r2, #0
 8017fc8:	601a      	str	r2, [r3, #0]
  return 1;
 8017fca:	2301      	movs	r3, #1
}
 8017fcc:	4618      	mov	r0, r3
 8017fce:	3714      	adds	r7, #20
 8017fd0:	46bd      	mov	sp, r7
 8017fd2:	f85d 7b04 	ldr.w	r7, [sp], #4
 8017fd6:	4770      	bx	lr

08017fd8 <free_socket_free_elements>:

/** Free a socket's leftover members.
 */
static void
free_socket_free_elements(int is_tcp, struct netconn *conn, union lwip_sock_lastdata *lastdata)
{
 8017fd8:	b580      	push	{r7, lr}
 8017fda:	b084      	sub	sp, #16
 8017fdc:	af00      	add	r7, sp, #0
 8017fde:	60f8      	str	r0, [r7, #12]
 8017fe0:	60b9      	str	r1, [r7, #8]
 8017fe2:	607a      	str	r2, [r7, #4]
  if (lastdata->pbuf != NULL) {
 8017fe4:	687b      	ldr	r3, [r7, #4]
 8017fe6:	681b      	ldr	r3, [r3, #0]
 8017fe8:	2b00      	cmp	r3, #0
 8017fea:	d00d      	beq.n	8018008 <free_socket_free_elements+0x30>
    if (is_tcp) {
 8017fec:	68fb      	ldr	r3, [r7, #12]
 8017fee:	2b00      	cmp	r3, #0
 8017ff0:	d005      	beq.n	8017ffe <free_socket_free_elements+0x26>
      pbuf_free(lastdata->pbuf);
 8017ff2:	687b      	ldr	r3, [r7, #4]
 8017ff4:	681b      	ldr	r3, [r3, #0]
 8017ff6:	4618      	mov	r0, r3
 8017ff8:	f002 fe68 	bl	801accc <pbuf_free>
 8017ffc:	e004      	b.n	8018008 <free_socket_free_elements+0x30>
    } else {
      netbuf_delete(lastdata->netbuf);
 8017ffe:	687b      	ldr	r3, [r7, #4]
 8018000:	681b      	ldr	r3, [r3, #0]
 8018002:	4618      	mov	r0, r3
 8018004:	f7ff fe78 	bl	8017cf8 <netbuf_delete>
    }
  }
  if (conn != NULL) {
 8018008:	68bb      	ldr	r3, [r7, #8]
 801800a:	2b00      	cmp	r3, #0
 801800c:	d002      	beq.n	8018014 <free_socket_free_elements+0x3c>
    /* netconn_prepare_delete() has already been called, here we only free the conn */
    netconn_delete(conn);
 801800e:	68b8      	ldr	r0, [r7, #8]
 8018010:	f7fd fd50 	bl	8015ab4 <netconn_delete>
  }
}
 8018014:	bf00      	nop
 8018016:	3710      	adds	r7, #16
 8018018:	46bd      	mov	sp, r7
 801801a:	bd80      	pop	{r7, pc}

0801801c <free_socket>:
 * @param sock the socket to free
 * @param is_tcp != 0 for TCP sockets, used to free lastdata
 */
static void
free_socket(struct lwip_sock *sock, int is_tcp)
{
 801801c:	b580      	push	{r7, lr}
 801801e:	b086      	sub	sp, #24
 8018020:	af00      	add	r7, sp, #0
 8018022:	6078      	str	r0, [r7, #4]
 8018024:	6039      	str	r1, [r7, #0]
  struct netconn *conn;
  union lwip_sock_lastdata lastdata;
  SYS_ARCH_DECL_PROTECT(lev);

  /* Protect socket array */
  SYS_ARCH_PROTECT(lev);
 8018026:	f00e fe33 	bl	8026c90 <sys_arch_protect>
 801802a:	6178      	str	r0, [r7, #20]

  freed = free_socket_locked(sock, is_tcp, &conn, &lastdata);
 801802c:	f107 0308 	add.w	r3, r7, #8
 8018030:	f107 020c 	add.w	r2, r7, #12
 8018034:	6839      	ldr	r1, [r7, #0]
 8018036:	6878      	ldr	r0, [r7, #4]
 8018038:	f7ff ffb2 	bl	8017fa0 <free_socket_locked>
 801803c:	6138      	str	r0, [r7, #16]
  SYS_ARCH_UNPROTECT(lev);
 801803e:	6978      	ldr	r0, [r7, #20]
 8018040:	f00e fe34 	bl	8026cac <sys_arch_unprotect>
  /* don't use 'sock' after this line, as another task might have allocated it */

  if (freed) {
 8018044:	693b      	ldr	r3, [r7, #16]
 8018046:	2b00      	cmp	r3, #0
 8018048:	d006      	beq.n	8018058 <free_socket+0x3c>
    free_socket_free_elements(is_tcp, conn, &lastdata);
 801804a:	68fb      	ldr	r3, [r7, #12]
 801804c:	f107 0208 	add.w	r2, r7, #8
 8018050:	4619      	mov	r1, r3
 8018052:	6838      	ldr	r0, [r7, #0]
 8018054:	f7ff ffc0 	bl	8017fd8 <free_socket_free_elements>
  }
}
 8018058:	bf00      	nop
 801805a:	3718      	adds	r7, #24
 801805c:	46bd      	mov	sp, r7
 801805e:	bd80      	pop	{r7, pc}

08018060 <lwip_close>:
  return 0;
}

int
lwip_close(int s)
{
 8018060:	b580      	push	{r7, lr}
 8018062:	b086      	sub	sp, #24
 8018064:	af00      	add	r7, sp, #0
 8018066:	6078      	str	r0, [r7, #4]
  struct lwip_sock *sock;
  int is_tcp = 0;
 8018068:	2300      	movs	r3, #0
 801806a:	617b      	str	r3, [r7, #20]
  err_t err;

  LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_close(%d)\n", s));

  sock = get_socket(s);
 801806c:	6878      	ldr	r0, [r7, #4]
 801806e:	f7ff ff13 	bl	8017e98 <get_socket>
 8018072:	6138      	str	r0, [r7, #16]
  if (!sock) {
 8018074:	693b      	ldr	r3, [r7, #16]
 8018076:	2b00      	cmp	r3, #0
 8018078:	d102      	bne.n	8018080 <lwip_close+0x20>
    return -1;
 801807a:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 801807e:	e039      	b.n	80180f4 <lwip_close+0x94>
  }

  if (sock->conn != NULL) {
 8018080:	693b      	ldr	r3, [r7, #16]
 8018082:	681b      	ldr	r3, [r3, #0]
 8018084:	2b00      	cmp	r3, #0
 8018086:	d00b      	beq.n	80180a0 <lwip_close+0x40>
    is_tcp = NETCONNTYPE_GROUP(netconn_type(sock->conn)) == NETCONN_TCP;
 8018088:	693b      	ldr	r3, [r7, #16]
 801808a:	681b      	ldr	r3, [r3, #0]
 801808c:	781b      	ldrb	r3, [r3, #0]
 801808e:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8018092:	2b10      	cmp	r3, #16
 8018094:	bf0c      	ite	eq
 8018096:	2301      	moveq	r3, #1
 8018098:	2300      	movne	r3, #0
 801809a:	b2db      	uxtb	r3, r3
 801809c:	617b      	str	r3, [r7, #20]
 801809e:	e00a      	b.n	80180b6 <lwip_close+0x56>
  } else {
    LWIP_ASSERT("sock->lastdata == NULL", sock->lastdata.pbuf == NULL);
 80180a0:	693b      	ldr	r3, [r7, #16]
 80180a2:	685b      	ldr	r3, [r3, #4]
 80180a4:	2b00      	cmp	r3, #0
 80180a6:	d006      	beq.n	80180b6 <lwip_close+0x56>
 80180a8:	4b14      	ldr	r3, [pc, #80]	@ (80180fc <lwip_close+0x9c>)
 80180aa:	f44f 7245 	mov.w	r2, #788	@ 0x314
 80180ae:	4914      	ldr	r1, [pc, #80]	@ (8018100 <lwip_close+0xa0>)
 80180b0:	4814      	ldr	r0, [pc, #80]	@ (8018104 <lwip_close+0xa4>)
 80180b2:	f012 f883 	bl	802a1bc <iprintf>
#if LWIP_IPV6_MLD
  /* drop all possibly joined MLD6 memberships */
  lwip_socket_drop_registered_mld6_memberships(s);
#endif /* LWIP_IPV6_MLD */

  err = netconn_prepare_delete(sock->conn);
 80180b6:	693b      	ldr	r3, [r7, #16]
 80180b8:	681b      	ldr	r3, [r3, #0]
 80180ba:	4618      	mov	r0, r3
 80180bc:	f7fd fcd6 	bl	8015a6c <netconn_prepare_delete>
 80180c0:	4603      	mov	r3, r0
 80180c2:	73fb      	strb	r3, [r7, #15]
  if (err != ERR_OK) {
 80180c4:	f997 300f 	ldrsb.w	r3, [r7, #15]
 80180c8:	2b00      	cmp	r3, #0
 80180ca:	d00e      	beq.n	80180ea <lwip_close+0x8a>
    sock_set_errno(sock, err_to_errno(err));
 80180cc:	f997 300f 	ldrsb.w	r3, [r7, #15]
 80180d0:	4618      	mov	r0, r3
 80180d2:	f7ff fdf3 	bl	8017cbc <err_to_errno>
 80180d6:	60b8      	str	r0, [r7, #8]
 80180d8:	68bb      	ldr	r3, [r7, #8]
 80180da:	2b00      	cmp	r3, #0
 80180dc:	d002      	beq.n	80180e4 <lwip_close+0x84>
 80180de:	4a0a      	ldr	r2, [pc, #40]	@ (8018108 <lwip_close+0xa8>)
 80180e0:	68bb      	ldr	r3, [r7, #8]
 80180e2:	6013      	str	r3, [r2, #0]
    done_socket(sock);
    return -1;
 80180e4:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80180e8:	e004      	b.n	80180f4 <lwip_close+0x94>
  }

  free_socket(sock, is_tcp);
 80180ea:	6979      	ldr	r1, [r7, #20]
 80180ec:	6938      	ldr	r0, [r7, #16]
 80180ee:	f7ff ff95 	bl	801801c <free_socket>
  set_errno(0);
  return 0;
 80180f2:	2300      	movs	r3, #0
}
 80180f4:	4618      	mov	r0, r3
 80180f6:	3718      	adds	r7, #24
 80180f8:	46bd      	mov	sp, r7
 80180fa:	bd80      	pop	{r7, pc}
 80180fc:	0802de60 	.word	0x0802de60
 8018100:	0802df20 	.word	0x0802df20
 8018104:	0802deb4 	.word	0x0802deb4
 8018108:	2402b250 	.word	0x2402b250

0801810c <lwip_connect>:

int
lwip_connect(int s, const struct sockaddr *name, socklen_t namelen)
{
 801810c:	b580      	push	{r7, lr}
 801810e:	b08a      	sub	sp, #40	@ 0x28
 8018110:	af00      	add	r7, sp, #0
 8018112:	60f8      	str	r0, [r7, #12]
 8018114:	60b9      	str	r1, [r7, #8]
 8018116:	607a      	str	r2, [r7, #4]
  struct lwip_sock *sock;
  err_t err;

  sock = get_socket(s);
 8018118:	68f8      	ldr	r0, [r7, #12]
 801811a:	f7ff febd 	bl	8017e98 <get_socket>
 801811e:	6278      	str	r0, [r7, #36]	@ 0x24
  if (!sock) {
 8018120:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8018122:	2b00      	cmp	r3, #0
 8018124:	d102      	bne.n	801812c <lwip_connect+0x20>
    return -1;
 8018126:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 801812a:	e062      	b.n	80181f2 <lwip_connect+0xe6>
    done_socket(sock);
    return -1;
  }

  LWIP_UNUSED_ARG(namelen);
  if (name->sa_family == AF_UNSPEC) {
 801812c:	68bb      	ldr	r3, [r7, #8]
 801812e:	785b      	ldrb	r3, [r3, #1]
 8018130:	2b00      	cmp	r3, #0
 8018132:	d108      	bne.n	8018146 <lwip_connect+0x3a>
    LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_connect(%d, AF_UNSPEC)\n", s));
    err = netconn_disconnect(sock->conn);
 8018134:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8018136:	681b      	ldr	r3, [r3, #0]
 8018138:	4618      	mov	r0, r3
 801813a:	f7fd fd61 	bl	8015c00 <netconn_disconnect>
 801813e:	4603      	mov	r3, r0
 8018140:	f887 3021 	strb.w	r3, [r7, #33]	@ 0x21
 8018144:	e039      	b.n	80181ba <lwip_connect+0xae>
  } else {
    ip_addr_t remote_addr;
    u16_t remote_port;

    /* check size, family and alignment of 'name' */
    LWIP_ERROR("lwip_connect: invalid address", IS_SOCK_ADDR_LEN_VALID(namelen) &&
 8018146:	687b      	ldr	r3, [r7, #4]
 8018148:	2b10      	cmp	r3, #16
 801814a:	d10c      	bne.n	8018166 <lwip_connect+0x5a>
 801814c:	68bb      	ldr	r3, [r7, #8]
 801814e:	785b      	ldrb	r3, [r3, #1]
 8018150:	2b00      	cmp	r3, #0
 8018152:	d003      	beq.n	801815c <lwip_connect+0x50>
 8018154:	68bb      	ldr	r3, [r7, #8]
 8018156:	785b      	ldrb	r3, [r3, #1]
 8018158:	2b02      	cmp	r3, #2
 801815a:	d104      	bne.n	8018166 <lwip_connect+0x5a>
 801815c:	68bb      	ldr	r3, [r7, #8]
 801815e:	f003 0303 	and.w	r3, r3, #3
 8018162:	2b00      	cmp	r3, #0
 8018164:	d014      	beq.n	8018190 <lwip_connect+0x84>
 8018166:	4b25      	ldr	r3, [pc, #148]	@ (80181fc <lwip_connect+0xf0>)
 8018168:	f240 3247 	movw	r2, #839	@ 0x347
 801816c:	4924      	ldr	r1, [pc, #144]	@ (8018200 <lwip_connect+0xf4>)
 801816e:	4825      	ldr	r0, [pc, #148]	@ (8018204 <lwip_connect+0xf8>)
 8018170:	f012 f824 	bl	802a1bc <iprintf>
 8018174:	f06f 000f 	mvn.w	r0, #15
 8018178:	f7ff fda0 	bl	8017cbc <err_to_errno>
 801817c:	61f8      	str	r0, [r7, #28]
 801817e:	69fb      	ldr	r3, [r7, #28]
 8018180:	2b00      	cmp	r3, #0
 8018182:	d002      	beq.n	801818a <lwip_connect+0x7e>
 8018184:	4a20      	ldr	r2, [pc, #128]	@ (8018208 <lwip_connect+0xfc>)
 8018186:	69fb      	ldr	r3, [r7, #28]
 8018188:	6013      	str	r3, [r2, #0]
 801818a:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 801818e:	e030      	b.n	80181f2 <lwip_connect+0xe6>
               IS_SOCK_ADDR_TYPE_VALID_OR_UNSPEC(name) && IS_SOCK_ADDR_ALIGNED(name),
               sock_set_errno(sock, err_to_errno(ERR_ARG)); done_socket(sock); return -1;);

    SOCKADDR_TO_IPADDR_PORT(name, &remote_addr, remote_port);
 8018190:	68bb      	ldr	r3, [r7, #8]
 8018192:	685b      	ldr	r3, [r3, #4]
 8018194:	613b      	str	r3, [r7, #16]
 8018196:	68bb      	ldr	r3, [r7, #8]
 8018198:	885b      	ldrh	r3, [r3, #2]
 801819a:	4618      	mov	r0, r3
 801819c:	f001 f8b4 	bl	8019308 <lwip_htons>
 80181a0:	4603      	mov	r3, r0
 80181a2:	847b      	strh	r3, [r7, #34]	@ 0x22
      unmap_ipv4_mapped_ipv6(ip_2_ip4(&remote_addr), ip_2_ip6(&remote_addr));
      IP_SET_TYPE_VAL(remote_addr, IPADDR_TYPE_V4);
    }
#endif /* LWIP_IPV4 && LWIP_IPV6 */

    err = netconn_connect(sock->conn, &remote_addr, remote_port);
 80181a4:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80181a6:	681b      	ldr	r3, [r3, #0]
 80181a8:	8c7a      	ldrh	r2, [r7, #34]	@ 0x22
 80181aa:	f107 0110 	add.w	r1, r7, #16
 80181ae:	4618      	mov	r0, r3
 80181b0:	f7fd fcee 	bl	8015b90 <netconn_connect>
 80181b4:	4603      	mov	r3, r0
 80181b6:	f887 3021 	strb.w	r3, [r7, #33]	@ 0x21
  }

  if (err != ERR_OK) {
 80181ba:	f997 3021 	ldrsb.w	r3, [r7, #33]	@ 0x21
 80181be:	2b00      	cmp	r3, #0
 80181c0:	d00e      	beq.n	80181e0 <lwip_connect+0xd4>
    LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_connect(%d) failed, err=%d\n", s, err));
    sock_set_errno(sock, err_to_errno(err));
 80181c2:	f997 3021 	ldrsb.w	r3, [r7, #33]	@ 0x21
 80181c6:	4618      	mov	r0, r3
 80181c8:	f7ff fd78 	bl	8017cbc <err_to_errno>
 80181cc:	6178      	str	r0, [r7, #20]
 80181ce:	697b      	ldr	r3, [r7, #20]
 80181d0:	2b00      	cmp	r3, #0
 80181d2:	d002      	beq.n	80181da <lwip_connect+0xce>
 80181d4:	4a0c      	ldr	r2, [pc, #48]	@ (8018208 <lwip_connect+0xfc>)
 80181d6:	697b      	ldr	r3, [r7, #20]
 80181d8:	6013      	str	r3, [r2, #0]
    done_socket(sock);
    return -1;
 80181da:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80181de:	e008      	b.n	80181f2 <lwip_connect+0xe6>
  }

  LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_connect(%d) succeeded\n", s));
  sock_set_errno(sock, 0);
 80181e0:	2300      	movs	r3, #0
 80181e2:	61bb      	str	r3, [r7, #24]
 80181e4:	69bb      	ldr	r3, [r7, #24]
 80181e6:	2b00      	cmp	r3, #0
 80181e8:	d002      	beq.n	80181f0 <lwip_connect+0xe4>
 80181ea:	4a07      	ldr	r2, [pc, #28]	@ (8018208 <lwip_connect+0xfc>)
 80181ec:	69bb      	ldr	r3, [r7, #24]
 80181ee:	6013      	str	r3, [r2, #0]
  done_socket(sock);
  return 0;
 80181f0:	2300      	movs	r3, #0
}
 80181f2:	4618      	mov	r0, r3
 80181f4:	3728      	adds	r7, #40	@ 0x28
 80181f6:	46bd      	mov	sp, r7
 80181f8:	bd80      	pop	{r7, pc}
 80181fa:	bf00      	nop
 80181fc:	0802de60 	.word	0x0802de60
 8018200:	0802df38 	.word	0x0802df38
 8018204:	0802deb4 	.word	0x0802deb4
 8018208:	2402b250 	.word	0x2402b250

0801820c <lwip_recv_tcp>:
 * until "len" bytes are received or we're otherwise done.
 * Keeps sock->lastdata for peeking or partly copying.
 */
static ssize_t
lwip_recv_tcp(struct lwip_sock *sock, void *mem, size_t len, int flags)
{
 801820c:	b580      	push	{r7, lr}
 801820e:	b08c      	sub	sp, #48	@ 0x30
 8018210:	af00      	add	r7, sp, #0
 8018212:	60f8      	str	r0, [r7, #12]
 8018214:	60b9      	str	r1, [r7, #8]
 8018216:	607a      	str	r2, [r7, #4]
 8018218:	603b      	str	r3, [r7, #0]
  u8_t apiflags = NETCONN_NOAUTORCVD;
 801821a:	2308      	movs	r3, #8
 801821c:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
  ssize_t recvd = 0;
 8018220:	2300      	movs	r3, #0
 8018222:	62bb      	str	r3, [r7, #40]	@ 0x28
  ssize_t recv_left = (len <= SSIZE_MAX) ? (ssize_t)len : SSIZE_MAX;
 8018224:	687b      	ldr	r3, [r7, #4]
 8018226:	2b00      	cmp	r3, #0
 8018228:	db01      	blt.n	801822e <lwip_recv_tcp+0x22>
 801822a:	687b      	ldr	r3, [r7, #4]
 801822c:	e001      	b.n	8018232 <lwip_recv_tcp+0x26>
 801822e:	f06f 4300 	mvn.w	r3, #2147483648	@ 0x80000000
 8018232:	627b      	str	r3, [r7, #36]	@ 0x24

  LWIP_ASSERT("no socket given", sock != NULL);
 8018234:	68fb      	ldr	r3, [r7, #12]
 8018236:	2b00      	cmp	r3, #0
 8018238:	d106      	bne.n	8018248 <lwip_recv_tcp+0x3c>
 801823a:	4b74      	ldr	r3, [pc, #464]	@ (801840c <lwip_recv_tcp+0x200>)
 801823c:	f240 329e 	movw	r2, #926	@ 0x39e
 8018240:	4973      	ldr	r1, [pc, #460]	@ (8018410 <lwip_recv_tcp+0x204>)
 8018242:	4874      	ldr	r0, [pc, #464]	@ (8018414 <lwip_recv_tcp+0x208>)
 8018244:	f011 ffba 	bl	802a1bc <iprintf>
  LWIP_ASSERT("this should be checked internally", NETCONNTYPE_GROUP(netconn_type(sock->conn)) == NETCONN_TCP);
 8018248:	68fb      	ldr	r3, [r7, #12]
 801824a:	681b      	ldr	r3, [r3, #0]
 801824c:	781b      	ldrb	r3, [r3, #0]
 801824e:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8018252:	2b10      	cmp	r3, #16
 8018254:	d006      	beq.n	8018264 <lwip_recv_tcp+0x58>
 8018256:	4b6d      	ldr	r3, [pc, #436]	@ (801840c <lwip_recv_tcp+0x200>)
 8018258:	f240 329f 	movw	r2, #927	@ 0x39f
 801825c:	496e      	ldr	r1, [pc, #440]	@ (8018418 <lwip_recv_tcp+0x20c>)
 801825e:	486d      	ldr	r0, [pc, #436]	@ (8018414 <lwip_recv_tcp+0x208>)
 8018260:	f011 ffac 	bl	802a1bc <iprintf>

  if (flags & MSG_DONTWAIT) {
 8018264:	683b      	ldr	r3, [r7, #0]
 8018266:	f003 0308 	and.w	r3, r3, #8
 801826a:	2b00      	cmp	r3, #0
 801826c:	d005      	beq.n	801827a <lwip_recv_tcp+0x6e>
    apiflags |= NETCONN_DONTBLOCK;
 801826e:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 8018272:	f043 0304 	orr.w	r3, r3, #4
 8018276:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
    err_t err;
    u16_t copylen;

    LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recv_tcp: top while sock->lastdata=%p\n", (void *)sock->lastdata.pbuf));
    /* Check if there is data left from the last recv operation. */
    if (sock->lastdata.pbuf) {
 801827a:	68fb      	ldr	r3, [r7, #12]
 801827c:	685b      	ldr	r3, [r3, #4]
 801827e:	2b00      	cmp	r3, #0
 8018280:	d003      	beq.n	801828a <lwip_recv_tcp+0x7e>
      p = sock->lastdata.pbuf;
 8018282:	68fb      	ldr	r3, [r7, #12]
 8018284:	685b      	ldr	r3, [r3, #4]
 8018286:	617b      	str	r3, [r7, #20]
 8018288:	e036      	b.n	80182f8 <lwip_recv_tcp+0xec>
    } else {
      /* No data was left from the previous operation, so we try to get
         some from the network. */
      err = netconn_recv_tcp_pbuf_flags(sock->conn, &p, apiflags);
 801828a:	68fb      	ldr	r3, [r7, #12]
 801828c:	681b      	ldr	r3, [r3, #0]
 801828e:	f897 2023 	ldrb.w	r2, [r7, #35]	@ 0x23
 8018292:	f107 0114 	add.w	r1, r7, #20
 8018296:	4618      	mov	r0, r3
 8018298:	f7fd fea4 	bl	8015fe4 <netconn_recv_tcp_pbuf_flags>
 801829c:	4603      	mov	r3, r0
 801829e:	f887 3022 	strb.w	r3, [r7, #34]	@ 0x22
      LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recv_tcp: netconn_recv err=%d, pbuf=%p\n",
                                  err, (void *)p));

      if (err != ERR_OK) {
 80182a2:	f997 3022 	ldrsb.w	r3, [r7, #34]	@ 0x22
 80182a6:	2b00      	cmp	r3, #0
 80182a8:	d019      	beq.n	80182de <lwip_recv_tcp+0xd2>
        if (recvd > 0) {
 80182aa:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80182ac:	2b00      	cmp	r3, #0
 80182ae:	f300 808d 	bgt.w	80183cc <lwip_recv_tcp+0x1c0>
          goto lwip_recv_tcp_done;
        }
        /* We should really do some error checking here. */
        LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recv_tcp: p == NULL, error is \"%s\"!\n",
                                    lwip_strerr(err)));
        sock_set_errno(sock, err_to_errno(err));
 80182b2:	f997 3022 	ldrsb.w	r3, [r7, #34]	@ 0x22
 80182b6:	4618      	mov	r0, r3
 80182b8:	f7ff fd00 	bl	8017cbc <err_to_errno>
 80182bc:	61f8      	str	r0, [r7, #28]
 80182be:	69fb      	ldr	r3, [r7, #28]
 80182c0:	2b00      	cmp	r3, #0
 80182c2:	d002      	beq.n	80182ca <lwip_recv_tcp+0xbe>
 80182c4:	4a55      	ldr	r2, [pc, #340]	@ (801841c <lwip_recv_tcp+0x210>)
 80182c6:	69fb      	ldr	r3, [r7, #28]
 80182c8:	6013      	str	r3, [r2, #0]
        if (err == ERR_CLSD) {
 80182ca:	f997 3022 	ldrsb.w	r3, [r7, #34]	@ 0x22
 80182ce:	f113 0f0f 	cmn.w	r3, #15
 80182d2:	d101      	bne.n	80182d8 <lwip_recv_tcp+0xcc>
          return 0;
 80182d4:	2300      	movs	r3, #0
 80182d6:	e094      	b.n	8018402 <lwip_recv_tcp+0x1f6>
        } else {
          return -1;
 80182d8:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80182dc:	e091      	b.n	8018402 <lwip_recv_tcp+0x1f6>
        }
      }
      LWIP_ASSERT("p != NULL", p != NULL);
 80182de:	697b      	ldr	r3, [r7, #20]
 80182e0:	2b00      	cmp	r3, #0
 80182e2:	d106      	bne.n	80182f2 <lwip_recv_tcp+0xe6>
 80182e4:	4b49      	ldr	r3, [pc, #292]	@ (801840c <lwip_recv_tcp+0x200>)
 80182e6:	f240 32c5 	movw	r2, #965	@ 0x3c5
 80182ea:	494d      	ldr	r1, [pc, #308]	@ (8018420 <lwip_recv_tcp+0x214>)
 80182ec:	4849      	ldr	r0, [pc, #292]	@ (8018414 <lwip_recv_tcp+0x208>)
 80182ee:	f011 ff65 	bl	802a1bc <iprintf>
      sock->lastdata.pbuf = p;
 80182f2:	697a      	ldr	r2, [r7, #20]
 80182f4:	68fb      	ldr	r3, [r7, #12]
 80182f6:	605a      	str	r2, [r3, #4]
    }

    LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recv_tcp: buflen=%"U16_F" recv_left=%d off=%d\n",
                                p->tot_len, (int)recv_left, (int)recvd));

    if (recv_left > p->tot_len) {
 80182f8:	697b      	ldr	r3, [r7, #20]
 80182fa:	891b      	ldrh	r3, [r3, #8]
 80182fc:	461a      	mov	r2, r3
 80182fe:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8018300:	4293      	cmp	r3, r2
 8018302:	dd03      	ble.n	801830c <lwip_recv_tcp+0x100>
      copylen = p->tot_len;
 8018304:	697b      	ldr	r3, [r7, #20]
 8018306:	891b      	ldrh	r3, [r3, #8]
 8018308:	85fb      	strh	r3, [r7, #46]	@ 0x2e
 801830a:	e001      	b.n	8018310 <lwip_recv_tcp+0x104>
    } else {
      copylen = (u16_t)recv_left;
 801830c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801830e:	85fb      	strh	r3, [r7, #46]	@ 0x2e
    }
    if (recvd + copylen < recvd) {
 8018310:	8dfa      	ldrh	r2, [r7, #46]	@ 0x2e
 8018312:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8018314:	4413      	add	r3, r2
 8018316:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 8018318:	429a      	cmp	r2, r3
 801831a:	dd03      	ble.n	8018324 <lwip_recv_tcp+0x118>
      /* overflow */
      copylen = (u16_t)(SSIZE_MAX - recvd);
 801831c:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801831e:	b29b      	uxth	r3, r3
 8018320:	43db      	mvns	r3, r3
 8018322:	85fb      	strh	r3, [r7, #46]	@ 0x2e
    }

    /* copy the contents of the received buffer into
    the supplied memory pointer mem */
    pbuf_copy_partial(p, (u8_t *)mem + recvd, copylen, 0);
 8018324:	6978      	ldr	r0, [r7, #20]
 8018326:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8018328:	68ba      	ldr	r2, [r7, #8]
 801832a:	18d1      	adds	r1, r2, r3
 801832c:	8dfa      	ldrh	r2, [r7, #46]	@ 0x2e
 801832e:	2300      	movs	r3, #0
 8018330:	f002 fed2 	bl	801b0d8 <pbuf_copy_partial>

    recvd += copylen;
 8018334:	8dfb      	ldrh	r3, [r7, #46]	@ 0x2e
 8018336:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 8018338:	4413      	add	r3, r2
 801833a:	62bb      	str	r3, [r7, #40]	@ 0x28

    /* TCP combines multiple pbufs for one recv */
    LWIP_ASSERT("invalid copylen, len would underflow", recv_left >= copylen);
 801833c:	8dfb      	ldrh	r3, [r7, #46]	@ 0x2e
 801833e:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8018340:	429a      	cmp	r2, r3
 8018342:	da06      	bge.n	8018352 <lwip_recv_tcp+0x146>
 8018344:	4b31      	ldr	r3, [pc, #196]	@ (801840c <lwip_recv_tcp+0x200>)
 8018346:	f240 32dd 	movw	r2, #989	@ 0x3dd
 801834a:	4936      	ldr	r1, [pc, #216]	@ (8018424 <lwip_recv_tcp+0x218>)
 801834c:	4831      	ldr	r0, [pc, #196]	@ (8018414 <lwip_recv_tcp+0x208>)
 801834e:	f011 ff35 	bl	802a1bc <iprintf>
    recv_left -= copylen;
 8018352:	8dfb      	ldrh	r3, [r7, #46]	@ 0x2e
 8018354:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8018356:	1ad3      	subs	r3, r2, r3
 8018358:	627b      	str	r3, [r7, #36]	@ 0x24

    /* Unless we peek the incoming message... */
    if ((flags & MSG_PEEK) == 0) {
 801835a:	683b      	ldr	r3, [r7, #0]
 801835c:	f003 0301 	and.w	r3, r3, #1
 8018360:	2b00      	cmp	r3, #0
 8018362:	d123      	bne.n	80183ac <lwip_recv_tcp+0x1a0>
      /* ... check if there is data left in the pbuf */
      LWIP_ASSERT("invalid copylen", p->tot_len >= copylen);
 8018364:	697b      	ldr	r3, [r7, #20]
 8018366:	891b      	ldrh	r3, [r3, #8]
 8018368:	8dfa      	ldrh	r2, [r7, #46]	@ 0x2e
 801836a:	429a      	cmp	r2, r3
 801836c:	d906      	bls.n	801837c <lwip_recv_tcp+0x170>
 801836e:	4b27      	ldr	r3, [pc, #156]	@ (801840c <lwip_recv_tcp+0x200>)
 8018370:	f240 32e3 	movw	r2, #995	@ 0x3e3
 8018374:	492c      	ldr	r1, [pc, #176]	@ (8018428 <lwip_recv_tcp+0x21c>)
 8018376:	4827      	ldr	r0, [pc, #156]	@ (8018414 <lwip_recv_tcp+0x208>)
 8018378:	f011 ff20 	bl	802a1bc <iprintf>
      if (p->tot_len - copylen > 0) {
 801837c:	697b      	ldr	r3, [r7, #20]
 801837e:	891b      	ldrh	r3, [r3, #8]
 8018380:	461a      	mov	r2, r3
 8018382:	8dfb      	ldrh	r3, [r7, #46]	@ 0x2e
 8018384:	1ad3      	subs	r3, r2, r3
 8018386:	2b00      	cmp	r3, #0
 8018388:	dd09      	ble.n	801839e <lwip_recv_tcp+0x192>
        /* If so, it should be saved in the sock structure for the next recv call.
           We store the pbuf but hide/free the consumed data: */
        sock->lastdata.pbuf = pbuf_free_header(p, copylen);
 801838a:	697b      	ldr	r3, [r7, #20]
 801838c:	8dfa      	ldrh	r2, [r7, #46]	@ 0x2e
 801838e:	4611      	mov	r1, r2
 8018390:	4618      	mov	r0, r3
 8018392:	f002 fc68 	bl	801ac66 <pbuf_free_header>
 8018396:	4602      	mov	r2, r0
 8018398:	68fb      	ldr	r3, [r7, #12]
 801839a:	605a      	str	r2, [r3, #4]
 801839c:	e006      	b.n	80183ac <lwip_recv_tcp+0x1a0>
        LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recv_tcp: lastdata now pbuf=%p\n", (void *)sock->lastdata.pbuf));
      } else {
        sock->lastdata.pbuf = NULL;
 801839e:	68fb      	ldr	r3, [r7, #12]
 80183a0:	2200      	movs	r2, #0
 80183a2:	605a      	str	r2, [r3, #4]
        LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recv_tcp: deleting pbuf=%p\n", (void *)p));
        pbuf_free(p);
 80183a4:	697b      	ldr	r3, [r7, #20]
 80183a6:	4618      	mov	r0, r3
 80183a8:	f002 fc90 	bl	801accc <pbuf_free>
      }
    }
    /* once we have some data to return, only add more if we don't need to wait */
    apiflags |= NETCONN_DONTBLOCK | NETCONN_NOFIN;
 80183ac:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 80183b0:	f043 0314 	orr.w	r3, r3, #20
 80183b4:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
    /* @todo: do we need to support peeking more than one pbuf? */
  } while ((recv_left > 0) && !(flags & MSG_PEEK));
 80183b8:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80183ba:	2b00      	cmp	r3, #0
 80183bc:	dd08      	ble.n	80183d0 <lwip_recv_tcp+0x1c4>
 80183be:	683b      	ldr	r3, [r7, #0]
 80183c0:	f003 0301 	and.w	r3, r3, #1
 80183c4:	2b00      	cmp	r3, #0
 80183c6:	f43f af58 	beq.w	801827a <lwip_recv_tcp+0x6e>
lwip_recv_tcp_done:
 80183ca:	e001      	b.n	80183d0 <lwip_recv_tcp+0x1c4>
          goto lwip_recv_tcp_done;
 80183cc:	bf00      	nop
 80183ce:	e000      	b.n	80183d2 <lwip_recv_tcp+0x1c6>
lwip_recv_tcp_done:
 80183d0:	bf00      	nop
  if ((recvd > 0) && !(flags & MSG_PEEK)) {
 80183d2:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80183d4:	2b00      	cmp	r3, #0
 80183d6:	dd0b      	ble.n	80183f0 <lwip_recv_tcp+0x1e4>
 80183d8:	683b      	ldr	r3, [r7, #0]
 80183da:	f003 0301 	and.w	r3, r3, #1
 80183de:	2b00      	cmp	r3, #0
 80183e0:	d106      	bne.n	80183f0 <lwip_recv_tcp+0x1e4>
    /* ensure window update after copying all data */
    netconn_tcp_recvd(sock->conn, (size_t)recvd);
 80183e2:	68fb      	ldr	r3, [r7, #12]
 80183e4:	681b      	ldr	r3, [r3, #0]
 80183e6:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 80183e8:	4611      	mov	r1, r2
 80183ea:	4618      	mov	r0, r3
 80183ec:	f7fd fd42 	bl	8015e74 <netconn_tcp_recvd>
  }
  sock_set_errno(sock, 0);
 80183f0:	2300      	movs	r3, #0
 80183f2:	61bb      	str	r3, [r7, #24]
 80183f4:	69bb      	ldr	r3, [r7, #24]
 80183f6:	2b00      	cmp	r3, #0
 80183f8:	d002      	beq.n	8018400 <lwip_recv_tcp+0x1f4>
 80183fa:	4a08      	ldr	r2, [pc, #32]	@ (801841c <lwip_recv_tcp+0x210>)
 80183fc:	69bb      	ldr	r3, [r7, #24]
 80183fe:	6013      	str	r3, [r2, #0]
  return recvd;
 8018400:	6abb      	ldr	r3, [r7, #40]	@ 0x28
}
 8018402:	4618      	mov	r0, r3
 8018404:	3730      	adds	r7, #48	@ 0x30
 8018406:	46bd      	mov	sp, r7
 8018408:	bd80      	pop	{r7, pc}
 801840a:	bf00      	nop
 801840c:	0802de60 	.word	0x0802de60
 8018410:	0802df58 	.word	0x0802df58
 8018414:	0802deb4 	.word	0x0802deb4
 8018418:	0802df68 	.word	0x0802df68
 801841c:	2402b250 	.word	0x2402b250
 8018420:	0802df8c 	.word	0x0802df8c
 8018424:	0802df98 	.word	0x0802df98
 8018428:	0802dfc0 	.word	0x0802dfc0

0801842c <lwip_sock_make_addr>:

/* Convert a netbuf's address data to struct sockaddr */
static int
lwip_sock_make_addr(struct netconn *conn, ip_addr_t *fromaddr, u16_t port,
                    struct sockaddr *from, socklen_t *fromlen)
{
 801842c:	b590      	push	{r4, r7, lr}
 801842e:	b08b      	sub	sp, #44	@ 0x2c
 8018430:	af00      	add	r7, sp, #0
 8018432:	60f8      	str	r0, [r7, #12]
 8018434:	60b9      	str	r1, [r7, #8]
 8018436:	603b      	str	r3, [r7, #0]
 8018438:	4613      	mov	r3, r2
 801843a:	80fb      	strh	r3, [r7, #6]
  int truncated = 0;
 801843c:	2300      	movs	r3, #0
 801843e:	627b      	str	r3, [r7, #36]	@ 0x24
  union sockaddr_aligned saddr;

  LWIP_UNUSED_ARG(conn);

  LWIP_ASSERT("fromaddr != NULL", fromaddr != NULL);
 8018440:	68bb      	ldr	r3, [r7, #8]
 8018442:	2b00      	cmp	r3, #0
 8018444:	d106      	bne.n	8018454 <lwip_sock_make_addr+0x28>
 8018446:	4b2b      	ldr	r3, [pc, #172]	@ (80184f4 <lwip_sock_make_addr+0xc8>)
 8018448:	f240 4207 	movw	r2, #1031	@ 0x407
 801844c:	492a      	ldr	r1, [pc, #168]	@ (80184f8 <lwip_sock_make_addr+0xcc>)
 801844e:	482b      	ldr	r0, [pc, #172]	@ (80184fc <lwip_sock_make_addr+0xd0>)
 8018450:	f011 feb4 	bl	802a1bc <iprintf>
  LWIP_ASSERT("from != NULL", from != NULL);
 8018454:	683b      	ldr	r3, [r7, #0]
 8018456:	2b00      	cmp	r3, #0
 8018458:	d106      	bne.n	8018468 <lwip_sock_make_addr+0x3c>
 801845a:	4b26      	ldr	r3, [pc, #152]	@ (80184f4 <lwip_sock_make_addr+0xc8>)
 801845c:	f44f 6281 	mov.w	r2, #1032	@ 0x408
 8018460:	4927      	ldr	r1, [pc, #156]	@ (8018500 <lwip_sock_make_addr+0xd4>)
 8018462:	4826      	ldr	r0, [pc, #152]	@ (80184fc <lwip_sock_make_addr+0xd0>)
 8018464:	f011 feaa 	bl	802a1bc <iprintf>
  LWIP_ASSERT("fromlen != NULL", fromlen != NULL);
 8018468:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801846a:	2b00      	cmp	r3, #0
 801846c:	d106      	bne.n	801847c <lwip_sock_make_addr+0x50>
 801846e:	4b21      	ldr	r3, [pc, #132]	@ (80184f4 <lwip_sock_make_addr+0xc8>)
 8018470:	f240 4209 	movw	r2, #1033	@ 0x409
 8018474:	4923      	ldr	r1, [pc, #140]	@ (8018504 <lwip_sock_make_addr+0xd8>)
 8018476:	4821      	ldr	r0, [pc, #132]	@ (80184fc <lwip_sock_make_addr+0xd0>)
 8018478:	f011 fea0 	bl	802a1bc <iprintf>
    ip4_2_ipv4_mapped_ipv6(ip_2_ip6(fromaddr), ip_2_ip4(fromaddr));
    IP_SET_TYPE(fromaddr, IPADDR_TYPE_V6);
  }
#endif /* LWIP_IPV4 && LWIP_IPV6 */

  IPADDR_PORT_TO_SOCKADDR(&saddr, fromaddr, port);
 801847c:	f107 0314 	add.w	r3, r7, #20
 8018480:	2210      	movs	r2, #16
 8018482:	701a      	strb	r2, [r3, #0]
 8018484:	f107 0314 	add.w	r3, r7, #20
 8018488:	2202      	movs	r2, #2
 801848a:	705a      	strb	r2, [r3, #1]
 801848c:	f107 0414 	add.w	r4, r7, #20
 8018490:	88fb      	ldrh	r3, [r7, #6]
 8018492:	4618      	mov	r0, r3
 8018494:	f000 ff38 	bl	8019308 <lwip_htons>
 8018498:	4603      	mov	r3, r0
 801849a:	8063      	strh	r3, [r4, #2]
 801849c:	f107 0314 	add.w	r3, r7, #20
 80184a0:	68ba      	ldr	r2, [r7, #8]
 80184a2:	6812      	ldr	r2, [r2, #0]
 80184a4:	605a      	str	r2, [r3, #4]
 80184a6:	f107 0314 	add.w	r3, r7, #20
 80184aa:	3308      	adds	r3, #8
 80184ac:	2208      	movs	r2, #8
 80184ae:	2100      	movs	r1, #0
 80184b0:	4618      	mov	r0, r3
 80184b2:	f012 f815 	bl	802a4e0 <memset>
  if (*fromlen < saddr.sa.sa_len) {
 80184b6:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 80184b8:	681b      	ldr	r3, [r3, #0]
 80184ba:	7d3a      	ldrb	r2, [r7, #20]
 80184bc:	4293      	cmp	r3, r2
 80184be:	d202      	bcs.n	80184c6 <lwip_sock_make_addr+0x9a>
    truncated = 1;
 80184c0:	2301      	movs	r3, #1
 80184c2:	627b      	str	r3, [r7, #36]	@ 0x24
 80184c4:	e008      	b.n	80184d8 <lwip_sock_make_addr+0xac>
  } else if (*fromlen > saddr.sa.sa_len) {
 80184c6:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 80184c8:	681b      	ldr	r3, [r3, #0]
 80184ca:	7d3a      	ldrb	r2, [r7, #20]
 80184cc:	4293      	cmp	r3, r2
 80184ce:	d903      	bls.n	80184d8 <lwip_sock_make_addr+0xac>
    *fromlen = saddr.sa.sa_len;
 80184d0:	7d3b      	ldrb	r3, [r7, #20]
 80184d2:	461a      	mov	r2, r3
 80184d4:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 80184d6:	601a      	str	r2, [r3, #0]
  }
  MEMCPY(from, &saddr, *fromlen);
 80184d8:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 80184da:	681a      	ldr	r2, [r3, #0]
 80184dc:	f107 0314 	add.w	r3, r7, #20
 80184e0:	4619      	mov	r1, r3
 80184e2:	6838      	ldr	r0, [r7, #0]
 80184e4:	f012 f8f3 	bl	802a6ce <memcpy>
  return truncated;
 80184e8:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
}
 80184ea:	4618      	mov	r0, r3
 80184ec:	372c      	adds	r7, #44	@ 0x2c
 80184ee:	46bd      	mov	sp, r7
 80184f0:	bd90      	pop	{r4, r7, pc}
 80184f2:	bf00      	nop
 80184f4:	0802de60 	.word	0x0802de60
 80184f8:	0802dfd0 	.word	0x0802dfd0
 80184fc:	0802deb4 	.word	0x0802deb4
 8018500:	0802dfe4 	.word	0x0802dfe4
 8018504:	0802dff4 	.word	0x0802dff4

08018508 <lwip_recv_tcp_from>:

#if LWIP_TCP
/* Helper function to get a tcp socket's remote address info */
static int
lwip_recv_tcp_from(struct lwip_sock *sock, struct sockaddr *from, socklen_t *fromlen, const char *dbg_fn, int dbg_s, ssize_t dbg_ret)
{
 8018508:	b580      	push	{r7, lr}
 801850a:	b088      	sub	sp, #32
 801850c:	af02      	add	r7, sp, #8
 801850e:	60f8      	str	r0, [r7, #12]
 8018510:	60b9      	str	r1, [r7, #8]
 8018512:	607a      	str	r2, [r7, #4]
 8018514:	603b      	str	r3, [r7, #0]
  if (sock == NULL) {
 8018516:	68fb      	ldr	r3, [r7, #12]
 8018518:	2b00      	cmp	r3, #0
 801851a:	d101      	bne.n	8018520 <lwip_recv_tcp_from+0x18>
    return 0;
 801851c:	2300      	movs	r3, #0
 801851e:	e021      	b.n	8018564 <lwip_recv_tcp_from+0x5c>
  LWIP_UNUSED_ARG(dbg_fn);
  LWIP_UNUSED_ARG(dbg_s);
  LWIP_UNUSED_ARG(dbg_ret);

#if !SOCKETS_DEBUG
  if (from && fromlen)
 8018520:	68bb      	ldr	r3, [r7, #8]
 8018522:	2b00      	cmp	r3, #0
 8018524:	d01d      	beq.n	8018562 <lwip_recv_tcp_from+0x5a>
 8018526:	687b      	ldr	r3, [r7, #4]
 8018528:	2b00      	cmp	r3, #0
 801852a:	d01a      	beq.n	8018562 <lwip_recv_tcp_from+0x5a>
#endif /* !SOCKETS_DEBUG */
  {
    /* get remote addr/port from tcp_pcb */
    u16_t port;
    ip_addr_t tmpaddr;
    netconn_getaddr(sock->conn, &tmpaddr, &port, 0);
 801852c:	68fb      	ldr	r3, [r7, #12]
 801852e:	6818      	ldr	r0, [r3, #0]
 8018530:	f107 0216 	add.w	r2, r7, #22
 8018534:	f107 0110 	add.w	r1, r7, #16
 8018538:	2300      	movs	r3, #0
 801853a:	f7fd fad7 	bl	8015aec <netconn_getaddr>
    LWIP_DEBUGF(SOCKETS_DEBUG, ("%s(%d):  addr=", dbg_fn, dbg_s));
    ip_addr_debug_print_val(SOCKETS_DEBUG, tmpaddr);
    LWIP_DEBUGF(SOCKETS_DEBUG, (" port=%"U16_F" len=%d\n", port, (int)dbg_ret));
    if (from && fromlen) {
 801853e:	68bb      	ldr	r3, [r7, #8]
 8018540:	2b00      	cmp	r3, #0
 8018542:	d00e      	beq.n	8018562 <lwip_recv_tcp_from+0x5a>
 8018544:	687b      	ldr	r3, [r7, #4]
 8018546:	2b00      	cmp	r3, #0
 8018548:	d00b      	beq.n	8018562 <lwip_recv_tcp_from+0x5a>
      return lwip_sock_make_addr(sock->conn, &tmpaddr, port, from, fromlen);
 801854a:	68fb      	ldr	r3, [r7, #12]
 801854c:	6818      	ldr	r0, [r3, #0]
 801854e:	8afa      	ldrh	r2, [r7, #22]
 8018550:	f107 0110 	add.w	r1, r7, #16
 8018554:	687b      	ldr	r3, [r7, #4]
 8018556:	9300      	str	r3, [sp, #0]
 8018558:	68bb      	ldr	r3, [r7, #8]
 801855a:	f7ff ff67 	bl	801842c <lwip_sock_make_addr>
 801855e:	4603      	mov	r3, r0
 8018560:	e000      	b.n	8018564 <lwip_recv_tcp_from+0x5c>
    }
  }
  return 0;
 8018562:	2300      	movs	r3, #0
}
 8018564:	4618      	mov	r0, r3
 8018566:	3718      	adds	r7, #24
 8018568:	46bd      	mov	sp, r7
 801856a:	bd80      	pop	{r7, pc}

0801856c <lwip_recvfrom_udp_raw>:
/* Helper function to receive a netbuf from a udp or raw netconn.
 * Keeps sock->lastdata for peeking.
 */
static err_t
lwip_recvfrom_udp_raw(struct lwip_sock *sock, int flags, struct msghdr *msg, u16_t *datagram_len, int dbg_s)
{
 801856c:	b590      	push	{r4, r7, lr}
 801856e:	b08d      	sub	sp, #52	@ 0x34
 8018570:	af02      	add	r7, sp, #8
 8018572:	60f8      	str	r0, [r7, #12]
 8018574:	60b9      	str	r1, [r7, #8]
 8018576:	607a      	str	r2, [r7, #4]
 8018578:	603b      	str	r3, [r7, #0]
  err_t err;
  u16_t buflen, copylen, copied;
  int i;

  LWIP_UNUSED_ARG(dbg_s);
  LWIP_ERROR("lwip_recvfrom_udp_raw: invalid arguments", (msg->msg_iov != NULL) || (msg->msg_iovlen <= 0), return ERR_ARG;);
 801857a:	687b      	ldr	r3, [r7, #4]
 801857c:	689b      	ldr	r3, [r3, #8]
 801857e:	2b00      	cmp	r3, #0
 8018580:	d10d      	bne.n	801859e <lwip_recvfrom_udp_raw+0x32>
 8018582:	687b      	ldr	r3, [r7, #4]
 8018584:	68db      	ldr	r3, [r3, #12]
 8018586:	2b00      	cmp	r3, #0
 8018588:	dd09      	ble.n	801859e <lwip_recvfrom_udp_raw+0x32>
 801858a:	4b5e      	ldr	r3, [pc, #376]	@ (8018704 <lwip_recvfrom_udp_raw+0x198>)
 801858c:	f240 4249 	movw	r2, #1097	@ 0x449
 8018590:	495d      	ldr	r1, [pc, #372]	@ (8018708 <lwip_recvfrom_udp_raw+0x19c>)
 8018592:	485e      	ldr	r0, [pc, #376]	@ (801870c <lwip_recvfrom_udp_raw+0x1a0>)
 8018594:	f011 fe12 	bl	802a1bc <iprintf>
 8018598:	f06f 030f 	mvn.w	r3, #15
 801859c:	e0ae      	b.n	80186fc <lwip_recvfrom_udp_raw+0x190>

  if (flags & MSG_DONTWAIT) {
 801859e:	68bb      	ldr	r3, [r7, #8]
 80185a0:	f003 0308 	and.w	r3, r3, #8
 80185a4:	2b00      	cmp	r3, #0
 80185a6:	d003      	beq.n	80185b0 <lwip_recvfrom_udp_raw+0x44>
    apiflags = NETCONN_DONTBLOCK;
 80185a8:	2304      	movs	r3, #4
 80185aa:	f887 3026 	strb.w	r3, [r7, #38]	@ 0x26
 80185ae:	e002      	b.n	80185b6 <lwip_recvfrom_udp_raw+0x4a>
  } else {
    apiflags = 0;
 80185b0:	2300      	movs	r3, #0
 80185b2:	f887 3026 	strb.w	r3, [r7, #38]	@ 0x26
  }

  LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recvfrom_udp_raw[UDP/RAW]: top sock->lastdata=%p\n", (void *)sock->lastdata.netbuf));
  /* Check if there is data left from the last recv operation. */
  buf = sock->lastdata.netbuf;
 80185b6:	68fb      	ldr	r3, [r7, #12]
 80185b8:	685b      	ldr	r3, [r3, #4]
 80185ba:	613b      	str	r3, [r7, #16]
  if (buf == NULL) {
 80185bc:	693b      	ldr	r3, [r7, #16]
 80185be:	2b00      	cmp	r3, #0
 80185c0:	d11f      	bne.n	8018602 <lwip_recvfrom_udp_raw+0x96>
    /* No data was left from the previous operation, so we try to get
        some from the network. */
    err = netconn_recv_udp_raw_netbuf_flags(sock->conn, &buf, apiflags);
 80185c2:	68fb      	ldr	r3, [r7, #12]
 80185c4:	681b      	ldr	r3, [r3, #0]
 80185c6:	f897 2026 	ldrb.w	r2, [r7, #38]	@ 0x26
 80185ca:	f107 0110 	add.w	r1, r7, #16
 80185ce:	4618      	mov	r0, r3
 80185d0:	f7fd fd34 	bl	801603c <netconn_recv_udp_raw_netbuf_flags>
 80185d4:	4603      	mov	r3, r0
 80185d6:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
    LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recvfrom_udp_raw[UDP/RAW]: netconn_recv err=%d, netbuf=%p\n",
                                err, (void *)buf));

    if (err != ERR_OK) {
 80185da:	f997 3027 	ldrsb.w	r3, [r7, #39]	@ 0x27
 80185de:	2b00      	cmp	r3, #0
 80185e0:	d002      	beq.n	80185e8 <lwip_recvfrom_udp_raw+0x7c>
      return err;
 80185e2:	f997 3027 	ldrsb.w	r3, [r7, #39]	@ 0x27
 80185e6:	e089      	b.n	80186fc <lwip_recvfrom_udp_raw+0x190>
    }
    LWIP_ASSERT("buf != NULL", buf != NULL);
 80185e8:	693b      	ldr	r3, [r7, #16]
 80185ea:	2b00      	cmp	r3, #0
 80185ec:	d106      	bne.n	80185fc <lwip_recvfrom_udp_raw+0x90>
 80185ee:	4b45      	ldr	r3, [pc, #276]	@ (8018704 <lwip_recvfrom_udp_raw+0x198>)
 80185f0:	f240 425e 	movw	r2, #1118	@ 0x45e
 80185f4:	4946      	ldr	r1, [pc, #280]	@ (8018710 <lwip_recvfrom_udp_raw+0x1a4>)
 80185f6:	4845      	ldr	r0, [pc, #276]	@ (801870c <lwip_recvfrom_udp_raw+0x1a0>)
 80185f8:	f011 fde0 	bl	802a1bc <iprintf>
    sock->lastdata.netbuf = buf;
 80185fc:	693a      	ldr	r2, [r7, #16]
 80185fe:	68fb      	ldr	r3, [r7, #12]
 8018600:	605a      	str	r2, [r3, #4]
  }
  buflen = buf->p->tot_len;
 8018602:	693b      	ldr	r3, [r7, #16]
 8018604:	681b      	ldr	r3, [r3, #0]
 8018606:	891b      	ldrh	r3, [r3, #8]
 8018608:	837b      	strh	r3, [r7, #26]
  LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recvfrom_udp_raw: buflen=%"U16_F"\n", buflen));

  copied = 0;
 801860a:	2300      	movs	r3, #0
 801860c:	847b      	strh	r3, [r7, #34]	@ 0x22
  /* copy the pbuf payload into the iovs */
  for (i = 0; (i < msg->msg_iovlen) && (copied < buflen); i++) {
 801860e:	2300      	movs	r3, #0
 8018610:	61fb      	str	r3, [r7, #28]
 8018612:	e029      	b.n	8018668 <lwip_recvfrom_udp_raw+0xfc>
    u16_t len_left = (u16_t)(buflen - copied);
 8018614:	8b7a      	ldrh	r2, [r7, #26]
 8018616:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 8018618:	1ad3      	subs	r3, r2, r3
 801861a:	833b      	strh	r3, [r7, #24]
    if (msg->msg_iov[i].iov_len > len_left) {
 801861c:	687b      	ldr	r3, [r7, #4]
 801861e:	689a      	ldr	r2, [r3, #8]
 8018620:	69fb      	ldr	r3, [r7, #28]
 8018622:	00db      	lsls	r3, r3, #3
 8018624:	4413      	add	r3, r2
 8018626:	685a      	ldr	r2, [r3, #4]
 8018628:	8b3b      	ldrh	r3, [r7, #24]
 801862a:	429a      	cmp	r2, r3
 801862c:	d902      	bls.n	8018634 <lwip_recvfrom_udp_raw+0xc8>
      copylen = len_left;
 801862e:	8b3b      	ldrh	r3, [r7, #24]
 8018630:	84bb      	strh	r3, [r7, #36]	@ 0x24
 8018632:	e006      	b.n	8018642 <lwip_recvfrom_udp_raw+0xd6>
    } else {
      copylen = (u16_t)msg->msg_iov[i].iov_len;
 8018634:	687b      	ldr	r3, [r7, #4]
 8018636:	689a      	ldr	r2, [r3, #8]
 8018638:	69fb      	ldr	r3, [r7, #28]
 801863a:	00db      	lsls	r3, r3, #3
 801863c:	4413      	add	r3, r2
 801863e:	685b      	ldr	r3, [r3, #4]
 8018640:	84bb      	strh	r3, [r7, #36]	@ 0x24
    }

    /* copy the contents of the received buffer into
        the supplied memory buffer */
    pbuf_copy_partial(buf->p, (u8_t *)msg->msg_iov[i].iov_base, copylen, copied);
 8018642:	693b      	ldr	r3, [r7, #16]
 8018644:	6818      	ldr	r0, [r3, #0]
 8018646:	687b      	ldr	r3, [r7, #4]
 8018648:	689a      	ldr	r2, [r3, #8]
 801864a:	69fb      	ldr	r3, [r7, #28]
 801864c:	00db      	lsls	r3, r3, #3
 801864e:	4413      	add	r3, r2
 8018650:	6819      	ldr	r1, [r3, #0]
 8018652:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 8018654:	8cba      	ldrh	r2, [r7, #36]	@ 0x24
 8018656:	f002 fd3f 	bl	801b0d8 <pbuf_copy_partial>
    copied = (u16_t)(copied + copylen);
 801865a:	8c7a      	ldrh	r2, [r7, #34]	@ 0x22
 801865c:	8cbb      	ldrh	r3, [r7, #36]	@ 0x24
 801865e:	4413      	add	r3, r2
 8018660:	847b      	strh	r3, [r7, #34]	@ 0x22
  for (i = 0; (i < msg->msg_iovlen) && (copied < buflen); i++) {
 8018662:	69fb      	ldr	r3, [r7, #28]
 8018664:	3301      	adds	r3, #1
 8018666:	61fb      	str	r3, [r7, #28]
 8018668:	687b      	ldr	r3, [r7, #4]
 801866a:	68db      	ldr	r3, [r3, #12]
 801866c:	69fa      	ldr	r2, [r7, #28]
 801866e:	429a      	cmp	r2, r3
 8018670:	da03      	bge.n	801867a <lwip_recvfrom_udp_raw+0x10e>
 8018672:	8c7a      	ldrh	r2, [r7, #34]	@ 0x22
 8018674:	8b7b      	ldrh	r3, [r7, #26]
 8018676:	429a      	cmp	r2, r3
 8018678:	d3cc      	bcc.n	8018614 <lwip_recvfrom_udp_raw+0xa8>
  }

  /* Check to see from where the data was.*/
#if !SOCKETS_DEBUG
  if (msg->msg_name && msg->msg_namelen)
 801867a:	687b      	ldr	r3, [r7, #4]
 801867c:	681b      	ldr	r3, [r3, #0]
 801867e:	2b00      	cmp	r3, #0
 8018680:	d01a      	beq.n	80186b8 <lwip_recvfrom_udp_raw+0x14c>
 8018682:	687b      	ldr	r3, [r7, #4]
 8018684:	685b      	ldr	r3, [r3, #4]
 8018686:	2b00      	cmp	r3, #0
 8018688:	d016      	beq.n	80186b8 <lwip_recvfrom_udp_raw+0x14c>
#endif /* !SOCKETS_DEBUG */
  {
    LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recvfrom_udp_raw(%d):  addr=", dbg_s));
    ip_addr_debug_print_val(SOCKETS_DEBUG, *netbuf_fromaddr(buf));
    LWIP_DEBUGF(SOCKETS_DEBUG, (" port=%"U16_F" len=%d\n", netbuf_fromport(buf), copied));
    if (msg->msg_name && msg->msg_namelen) {
 801868a:	687b      	ldr	r3, [r7, #4]
 801868c:	681b      	ldr	r3, [r3, #0]
 801868e:	2b00      	cmp	r3, #0
 8018690:	d012      	beq.n	80186b8 <lwip_recvfrom_udp_raw+0x14c>
 8018692:	687b      	ldr	r3, [r7, #4]
 8018694:	685b      	ldr	r3, [r3, #4]
 8018696:	2b00      	cmp	r3, #0
 8018698:	d00e      	beq.n	80186b8 <lwip_recvfrom_udp_raw+0x14c>
      lwip_sock_make_addr(sock->conn, netbuf_fromaddr(buf), netbuf_fromport(buf),
 801869a:	68fb      	ldr	r3, [r7, #12]
 801869c:	6818      	ldr	r0, [r3, #0]
 801869e:	693b      	ldr	r3, [r7, #16]
 80186a0:	f103 0108 	add.w	r1, r3, #8
 80186a4:	693b      	ldr	r3, [r7, #16]
 80186a6:	899a      	ldrh	r2, [r3, #12]
                          (struct sockaddr *)msg->msg_name, &msg->msg_namelen);
 80186a8:	687b      	ldr	r3, [r7, #4]
 80186aa:	681c      	ldr	r4, [r3, #0]
      lwip_sock_make_addr(sock->conn, netbuf_fromaddr(buf), netbuf_fromport(buf),
 80186ac:	687b      	ldr	r3, [r7, #4]
 80186ae:	3304      	adds	r3, #4
 80186b0:	9300      	str	r3, [sp, #0]
 80186b2:	4623      	mov	r3, r4
 80186b4:	f7ff feba 	bl	801842c <lwip_sock_make_addr>
    }
  }

  /* Initialize flag output */
  msg->msg_flags = 0;
 80186b8:	687b      	ldr	r3, [r7, #4]
 80186ba:	2200      	movs	r2, #0
 80186bc:	619a      	str	r2, [r3, #24]

  if (msg->msg_control) {
 80186be:	687b      	ldr	r3, [r7, #4]
 80186c0:	691b      	ldr	r3, [r3, #16]
 80186c2:	2b00      	cmp	r3, #0
 80186c4:	d007      	beq.n	80186d6 <lwip_recvfrom_udp_raw+0x16a>
    u8_t wrote_msg = 0;
 80186c6:	2300      	movs	r3, #0
 80186c8:	75fb      	strb	r3, [r7, #23]
#endif /* LWIP_IPV4 */
      }
    }
#endif /* LWIP_NETBUF_RECVINFO */

    if (!wrote_msg) {
 80186ca:	7dfb      	ldrb	r3, [r7, #23]
 80186cc:	2b00      	cmp	r3, #0
 80186ce:	d102      	bne.n	80186d6 <lwip_recvfrom_udp_raw+0x16a>
      msg->msg_controllen = 0;
 80186d0:	687b      	ldr	r3, [r7, #4]
 80186d2:	2200      	movs	r2, #0
 80186d4:	615a      	str	r2, [r3, #20]
    }
  }

  /* If we don't peek the incoming message: zero lastdata pointer and free the netbuf */
  if ((flags & MSG_PEEK) == 0) {
 80186d6:	68bb      	ldr	r3, [r7, #8]
 80186d8:	f003 0301 	and.w	r3, r3, #1
 80186dc:	2b00      	cmp	r3, #0
 80186de:	d106      	bne.n	80186ee <lwip_recvfrom_udp_raw+0x182>
    sock->lastdata.netbuf = NULL;
 80186e0:	68fb      	ldr	r3, [r7, #12]
 80186e2:	2200      	movs	r2, #0
 80186e4:	605a      	str	r2, [r3, #4]
    netbuf_delete(buf);
 80186e6:	693b      	ldr	r3, [r7, #16]
 80186e8:	4618      	mov	r0, r3
 80186ea:	f7ff fb05 	bl	8017cf8 <netbuf_delete>
  }
  if (datagram_len) {
 80186ee:	683b      	ldr	r3, [r7, #0]
 80186f0:	2b00      	cmp	r3, #0
 80186f2:	d002      	beq.n	80186fa <lwip_recvfrom_udp_raw+0x18e>
    *datagram_len = buflen;
 80186f4:	683b      	ldr	r3, [r7, #0]
 80186f6:	8b7a      	ldrh	r2, [r7, #26]
 80186f8:	801a      	strh	r2, [r3, #0]
  }
  return ERR_OK;
 80186fa:	2300      	movs	r3, #0
}
 80186fc:	4618      	mov	r0, r3
 80186fe:	372c      	adds	r7, #44	@ 0x2c
 8018700:	46bd      	mov	sp, r7
 8018702:	bd90      	pop	{r4, r7, pc}
 8018704:	0802de60 	.word	0x0802de60
 8018708:	0802e004 	.word	0x0802e004
 801870c:	0802deb4 	.word	0x0802deb4
 8018710:	0802e030 	.word	0x0802e030

08018714 <lwip_recvfrom>:

ssize_t
lwip_recvfrom(int s, void *mem, size_t len, int flags,
              struct sockaddr *from, socklen_t *fromlen)
{
 8018714:	b580      	push	{r7, lr}
 8018716:	b096      	sub	sp, #88	@ 0x58
 8018718:	af02      	add	r7, sp, #8
 801871a:	60f8      	str	r0, [r7, #12]
 801871c:	60b9      	str	r1, [r7, #8]
 801871e:	607a      	str	r2, [r7, #4]
 8018720:	603b      	str	r3, [r7, #0]
  struct lwip_sock *sock;
  ssize_t ret;

  LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recvfrom(%d, %p, %"SZT_F", 0x%x, ..)\n", s, mem, len, flags));
  sock = get_socket(s);
 8018722:	68f8      	ldr	r0, [r7, #12]
 8018724:	f7ff fbb8 	bl	8017e98 <get_socket>
 8018728:	64f8      	str	r0, [r7, #76]	@ 0x4c
  if (!sock) {
 801872a:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 801872c:	2b00      	cmp	r3, #0
 801872e:	d102      	bne.n	8018736 <lwip_recvfrom+0x22>
    return -1;
 8018730:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8018734:	e078      	b.n	8018828 <lwip_recvfrom+0x114>
  }
#if LWIP_TCP
  if (NETCONNTYPE_GROUP(netconn_type(sock->conn)) == NETCONN_TCP) {
 8018736:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 8018738:	681b      	ldr	r3, [r3, #0]
 801873a:	781b      	ldrb	r3, [r3, #0]
 801873c:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8018740:	2b10      	cmp	r3, #16
 8018742:	d112      	bne.n	801876a <lwip_recvfrom+0x56>
    ret = lwip_recv_tcp(sock, mem, len, flags);
 8018744:	683b      	ldr	r3, [r7, #0]
 8018746:	687a      	ldr	r2, [r7, #4]
 8018748:	68b9      	ldr	r1, [r7, #8]
 801874a:	6cf8      	ldr	r0, [r7, #76]	@ 0x4c
 801874c:	f7ff fd5e 	bl	801820c <lwip_recv_tcp>
 8018750:	6478      	str	r0, [r7, #68]	@ 0x44
    lwip_recv_tcp_from(sock, from, fromlen, "lwip_recvfrom", s, ret);
 8018752:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 8018754:	9301      	str	r3, [sp, #4]
 8018756:	68fb      	ldr	r3, [r7, #12]
 8018758:	9300      	str	r3, [sp, #0]
 801875a:	4b35      	ldr	r3, [pc, #212]	@ (8018830 <lwip_recvfrom+0x11c>)
 801875c:	6dfa      	ldr	r2, [r7, #92]	@ 0x5c
 801875e:	6db9      	ldr	r1, [r7, #88]	@ 0x58
 8018760:	6cf8      	ldr	r0, [r7, #76]	@ 0x4c
 8018762:	f7ff fed1 	bl	8018508 <lwip_recv_tcp_from>
    done_socket(sock);
    return ret;
 8018766:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 8018768:	e05e      	b.n	8018828 <lwip_recvfrom+0x114>
  } else
#endif
  {
    u16_t datagram_len = 0;
 801876a:	2300      	movs	r3, #0
 801876c:	877b      	strh	r3, [r7, #58]	@ 0x3a
    struct iovec vec;
    struct msghdr msg;
    err_t err;
    vec.iov_base = mem;
 801876e:	68bb      	ldr	r3, [r7, #8]
 8018770:	633b      	str	r3, [r7, #48]	@ 0x30
    vec.iov_len = len;
 8018772:	687b      	ldr	r3, [r7, #4]
 8018774:	637b      	str	r3, [r7, #52]	@ 0x34
    msg.msg_control = NULL;
 8018776:	2300      	movs	r3, #0
 8018778:	627b      	str	r3, [r7, #36]	@ 0x24
    msg.msg_controllen = 0;
 801877a:	2300      	movs	r3, #0
 801877c:	62bb      	str	r3, [r7, #40]	@ 0x28
    msg.msg_flags = 0;
 801877e:	2300      	movs	r3, #0
 8018780:	62fb      	str	r3, [r7, #44]	@ 0x2c
    msg.msg_iov = &vec;
 8018782:	f107 0330 	add.w	r3, r7, #48	@ 0x30
 8018786:	61fb      	str	r3, [r7, #28]
    msg.msg_iovlen = 1;
 8018788:	2301      	movs	r3, #1
 801878a:	623b      	str	r3, [r7, #32]
    msg.msg_name = from;
 801878c:	6dbb      	ldr	r3, [r7, #88]	@ 0x58
 801878e:	617b      	str	r3, [r7, #20]
    msg.msg_namelen = (fromlen ? *fromlen : 0);
 8018790:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 8018792:	2b00      	cmp	r3, #0
 8018794:	d002      	beq.n	801879c <lwip_recvfrom+0x88>
 8018796:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 8018798:	681b      	ldr	r3, [r3, #0]
 801879a:	e000      	b.n	801879e <lwip_recvfrom+0x8a>
 801879c:	2300      	movs	r3, #0
 801879e:	61bb      	str	r3, [r7, #24]
    err = lwip_recvfrom_udp_raw(sock, flags, &msg, &datagram_len, s);
 80187a0:	f107 013a 	add.w	r1, r7, #58	@ 0x3a
 80187a4:	f107 0214 	add.w	r2, r7, #20
 80187a8:	68fb      	ldr	r3, [r7, #12]
 80187aa:	9300      	str	r3, [sp, #0]
 80187ac:	460b      	mov	r3, r1
 80187ae:	6839      	ldr	r1, [r7, #0]
 80187b0:	6cf8      	ldr	r0, [r7, #76]	@ 0x4c
 80187b2:	f7ff fedb 	bl	801856c <lwip_recvfrom_udp_raw>
 80187b6:	4603      	mov	r3, r0
 80187b8:	f887 304b 	strb.w	r3, [r7, #75]	@ 0x4b
    if (err != ERR_OK) {
 80187bc:	f997 304b 	ldrsb.w	r3, [r7, #75]	@ 0x4b
 80187c0:	2b00      	cmp	r3, #0
 80187c2:	d00e      	beq.n	80187e2 <lwip_recvfrom+0xce>
      LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recvfrom[UDP/RAW](%d): buf == NULL, error is \"%s\"!\n",
                                  s, lwip_strerr(err)));
      sock_set_errno(sock, err_to_errno(err));
 80187c4:	f997 304b 	ldrsb.w	r3, [r7, #75]	@ 0x4b
 80187c8:	4618      	mov	r0, r3
 80187ca:	f7ff fa77 	bl	8017cbc <err_to_errno>
 80187ce:	63f8      	str	r0, [r7, #60]	@ 0x3c
 80187d0:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 80187d2:	2b00      	cmp	r3, #0
 80187d4:	d002      	beq.n	80187dc <lwip_recvfrom+0xc8>
 80187d6:	4a17      	ldr	r2, [pc, #92]	@ (8018834 <lwip_recvfrom+0x120>)
 80187d8:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 80187da:	6013      	str	r3, [r2, #0]
      done_socket(sock);
      return -1;
 80187dc:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80187e0:	e022      	b.n	8018828 <lwip_recvfrom+0x114>
    }
    ret = (ssize_t)LWIP_MIN(LWIP_MIN(len, datagram_len), SSIZE_MAX);
 80187e2:	8f7b      	ldrh	r3, [r7, #58]	@ 0x3a
 80187e4:	461a      	mov	r2, r3
 80187e6:	687b      	ldr	r3, [r7, #4]
 80187e8:	4293      	cmp	r3, r2
 80187ea:	bf28      	it	cs
 80187ec:	4613      	movcs	r3, r2
 80187ee:	f06f 4200 	mvn.w	r2, #2147483648	@ 0x80000000
 80187f2:	4293      	cmp	r3, r2
 80187f4:	d206      	bcs.n	8018804 <lwip_recvfrom+0xf0>
 80187f6:	8f7b      	ldrh	r3, [r7, #58]	@ 0x3a
 80187f8:	461a      	mov	r2, r3
 80187fa:	687b      	ldr	r3, [r7, #4]
 80187fc:	4293      	cmp	r3, r2
 80187fe:	bf28      	it	cs
 8018800:	4613      	movcs	r3, r2
 8018802:	e001      	b.n	8018808 <lwip_recvfrom+0xf4>
 8018804:	f06f 4300 	mvn.w	r3, #2147483648	@ 0x80000000
 8018808:	647b      	str	r3, [r7, #68]	@ 0x44
    if (fromlen) {
 801880a:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 801880c:	2b00      	cmp	r3, #0
 801880e:	d002      	beq.n	8018816 <lwip_recvfrom+0x102>
      *fromlen = msg.msg_namelen;
 8018810:	69ba      	ldr	r2, [r7, #24]
 8018812:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 8018814:	601a      	str	r2, [r3, #0]
    }
  }

  sock_set_errno(sock, 0);
 8018816:	2300      	movs	r3, #0
 8018818:	643b      	str	r3, [r7, #64]	@ 0x40
 801881a:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801881c:	2b00      	cmp	r3, #0
 801881e:	d002      	beq.n	8018826 <lwip_recvfrom+0x112>
 8018820:	4a04      	ldr	r2, [pc, #16]	@ (8018834 <lwip_recvfrom+0x120>)
 8018822:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8018824:	6013      	str	r3, [r2, #0]
  done_socket(sock);
  return ret;
 8018826:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
}
 8018828:	4618      	mov	r0, r3
 801882a:	3750      	adds	r7, #80	@ 0x50
 801882c:	46bd      	mov	sp, r7
 801882e:	bd80      	pop	{r7, pc}
 8018830:	0802e03c 	.word	0x0802e03c
 8018834:	2402b250 	.word	0x2402b250

08018838 <lwip_recv>:
  return lwip_recvmsg(s, &msg, 0);
}

ssize_t
lwip_recv(int s, void *mem, size_t len, int flags)
{
 8018838:	b580      	push	{r7, lr}
 801883a:	b086      	sub	sp, #24
 801883c:	af02      	add	r7, sp, #8
 801883e:	60f8      	str	r0, [r7, #12]
 8018840:	60b9      	str	r1, [r7, #8]
 8018842:	607a      	str	r2, [r7, #4]
 8018844:	603b      	str	r3, [r7, #0]
  return lwip_recvfrom(s, mem, len, flags, NULL, NULL);
 8018846:	2300      	movs	r3, #0
 8018848:	9301      	str	r3, [sp, #4]
 801884a:	2300      	movs	r3, #0
 801884c:	9300      	str	r3, [sp, #0]
 801884e:	683b      	ldr	r3, [r7, #0]
 8018850:	687a      	ldr	r2, [r7, #4]
 8018852:	68b9      	ldr	r1, [r7, #8]
 8018854:	68f8      	ldr	r0, [r7, #12]
 8018856:	f7ff ff5d 	bl	8018714 <lwip_recvfrom>
 801885a:	4603      	mov	r3, r0
}
 801885c:	4618      	mov	r0, r3
 801885e:	3710      	adds	r7, #16
 8018860:	46bd      	mov	sp, r7
 8018862:	bd80      	pop	{r7, pc}

08018864 <lwip_send>:
#endif /* LWIP_UDP || LWIP_RAW */
}

ssize_t
lwip_send(int s, const void *data, size_t size, int flags)
{
 8018864:	b580      	push	{r7, lr}
 8018866:	b08a      	sub	sp, #40	@ 0x28
 8018868:	af02      	add	r7, sp, #8
 801886a:	60f8      	str	r0, [r7, #12]
 801886c:	60b9      	str	r1, [r7, #8]
 801886e:	607a      	str	r2, [r7, #4]
 8018870:	603b      	str	r3, [r7, #0]
  size_t written;

  LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_send(%d, data=%p, size=%"SZT_F", flags=0x%x)\n",
                              s, data, size, flags));

  sock = get_socket(s);
 8018872:	68f8      	ldr	r0, [r7, #12]
 8018874:	f7ff fb10 	bl	8017e98 <get_socket>
 8018878:	61f8      	str	r0, [r7, #28]
  if (!sock) {
 801887a:	69fb      	ldr	r3, [r7, #28]
 801887c:	2b00      	cmp	r3, #0
 801887e:	d102      	bne.n	8018886 <lwip_send+0x22>
    return -1;
 8018880:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8018884:	e046      	b.n	8018914 <lwip_send+0xb0>
  }

  if (NETCONNTYPE_GROUP(netconn_type(sock->conn)) != NETCONN_TCP) {
 8018886:	69fb      	ldr	r3, [r7, #28]
 8018888:	681b      	ldr	r3, [r3, #0]
 801888a:	781b      	ldrb	r3, [r3, #0]
 801888c:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8018890:	2b10      	cmp	r3, #16
 8018892:	d00b      	beq.n	80188ac <lwip_send+0x48>
#if (LWIP_UDP || LWIP_RAW)
    done_socket(sock);
    return lwip_sendto(s, data, size, flags, NULL, 0);
 8018894:	2300      	movs	r3, #0
 8018896:	9301      	str	r3, [sp, #4]
 8018898:	2300      	movs	r3, #0
 801889a:	9300      	str	r3, [sp, #0]
 801889c:	683b      	ldr	r3, [r7, #0]
 801889e:	687a      	ldr	r2, [r7, #4]
 80188a0:	68b9      	ldr	r1, [r7, #8]
 80188a2:	68f8      	ldr	r0, [r7, #12]
 80188a4:	f000 f83c 	bl	8018920 <lwip_sendto>
 80188a8:	4603      	mov	r3, r0
 80188aa:	e033      	b.n	8018914 <lwip_send+0xb0>
    return -1;
#endif /* (LWIP_UDP || LWIP_RAW) */
  }

  write_flags = (u8_t)(NETCONN_COPY |
                       ((flags & MSG_MORE)     ? NETCONN_MORE      : 0) |
 80188ac:	683b      	ldr	r3, [r7, #0]
 80188ae:	f003 0310 	and.w	r3, r3, #16
  write_flags = (u8_t)(NETCONN_COPY |
 80188b2:	2b00      	cmp	r3, #0
 80188b4:	d001      	beq.n	80188ba <lwip_send+0x56>
 80188b6:	2203      	movs	r2, #3
 80188b8:	e000      	b.n	80188bc <lwip_send+0x58>
 80188ba:	2201      	movs	r2, #1
                       ((flags & MSG_MORE)     ? NETCONN_MORE      : 0) |
 80188bc:	683b      	ldr	r3, [r7, #0]
 80188be:	105b      	asrs	r3, r3, #1
 80188c0:	b25b      	sxtb	r3, r3
 80188c2:	f003 0304 	and.w	r3, r3, #4
 80188c6:	b25b      	sxtb	r3, r3
 80188c8:	4313      	orrs	r3, r2
 80188ca:	b25b      	sxtb	r3, r3
  write_flags = (u8_t)(NETCONN_COPY |
 80188cc:	76fb      	strb	r3, [r7, #27]
                       ((flags & MSG_DONTWAIT) ? NETCONN_DONTBLOCK : 0));
  written = 0;
 80188ce:	2300      	movs	r3, #0
 80188d0:	613b      	str	r3, [r7, #16]
  err = netconn_write_partly(sock->conn, data, size, write_flags, &written);
 80188d2:	69fb      	ldr	r3, [r7, #28]
 80188d4:	6818      	ldr	r0, [r3, #0]
 80188d6:	7efa      	ldrb	r2, [r7, #27]
 80188d8:	f107 0310 	add.w	r3, r7, #16
 80188dc:	9300      	str	r3, [sp, #0]
 80188de:	4613      	mov	r3, r2
 80188e0:	687a      	ldr	r2, [r7, #4]
 80188e2:	68b9      	ldr	r1, [r7, #8]
 80188e4:	f7fd fc04 	bl	80160f0 <netconn_write_partly>
 80188e8:	4603      	mov	r3, r0
 80188ea:	76bb      	strb	r3, [r7, #26]

  LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_send(%d) err=%d written=%"SZT_F"\n", s, err, written));
  sock_set_errno(sock, err_to_errno(err));
 80188ec:	f997 301a 	ldrsb.w	r3, [r7, #26]
 80188f0:	4618      	mov	r0, r3
 80188f2:	f7ff f9e3 	bl	8017cbc <err_to_errno>
 80188f6:	6178      	str	r0, [r7, #20]
 80188f8:	697b      	ldr	r3, [r7, #20]
 80188fa:	2b00      	cmp	r3, #0
 80188fc:	d002      	beq.n	8018904 <lwip_send+0xa0>
 80188fe:	4a07      	ldr	r2, [pc, #28]	@ (801891c <lwip_send+0xb8>)
 8018900:	697b      	ldr	r3, [r7, #20]
 8018902:	6013      	str	r3, [r2, #0]
  done_socket(sock);
  /* casting 'written' to ssize_t is OK here since the netconn API limits it to SSIZE_MAX */
  return (err == ERR_OK ? (ssize_t)written : -1);
 8018904:	f997 301a 	ldrsb.w	r3, [r7, #26]
 8018908:	2b00      	cmp	r3, #0
 801890a:	d101      	bne.n	8018910 <lwip_send+0xac>
 801890c:	693b      	ldr	r3, [r7, #16]
 801890e:	e001      	b.n	8018914 <lwip_send+0xb0>
 8018910:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
}
 8018914:	4618      	mov	r0, r3
 8018916:	3720      	adds	r7, #32
 8018918:	46bd      	mov	sp, r7
 801891a:	bd80      	pop	{r7, pc}
 801891c:	2402b250 	.word	0x2402b250

08018920 <lwip_sendto>:
}

ssize_t
lwip_sendto(int s, const void *data, size_t size, int flags,
            const struct sockaddr *to, socklen_t tolen)
{
 8018920:	b580      	push	{r7, lr}
 8018922:	b08e      	sub	sp, #56	@ 0x38
 8018924:	af00      	add	r7, sp, #0
 8018926:	60f8      	str	r0, [r7, #12]
 8018928:	60b9      	str	r1, [r7, #8]
 801892a:	607a      	str	r2, [r7, #4]
 801892c:	603b      	str	r3, [r7, #0]
  err_t err;
  u16_t short_size;
  u16_t remote_port;
  struct netbuf buf;

  sock = get_socket(s);
 801892e:	68f8      	ldr	r0, [r7, #12]
 8018930:	f7ff fab2 	bl	8017e98 <get_socket>
 8018934:	6338      	str	r0, [r7, #48]	@ 0x30
  if (!sock) {
 8018936:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8018938:	2b00      	cmp	r3, #0
 801893a:	d102      	bne.n	8018942 <lwip_sendto+0x22>
    return -1;
 801893c:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8018940:	e093      	b.n	8018a6a <lwip_sendto+0x14a>
  }

  if (NETCONNTYPE_GROUP(netconn_type(sock->conn)) == NETCONN_TCP) {
 8018942:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8018944:	681b      	ldr	r3, [r3, #0]
 8018946:	781b      	ldrb	r3, [r3, #0]
 8018948:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 801894c:	2b10      	cmp	r3, #16
 801894e:	d107      	bne.n	8018960 <lwip_sendto+0x40>
#if LWIP_TCP
    done_socket(sock);
    return lwip_send(s, data, size, flags);
 8018950:	683b      	ldr	r3, [r7, #0]
 8018952:	687a      	ldr	r2, [r7, #4]
 8018954:	68b9      	ldr	r1, [r7, #8]
 8018956:	68f8      	ldr	r0, [r7, #12]
 8018958:	f7ff ff84 	bl	8018864 <lwip_send>
 801895c:	4603      	mov	r3, r0
 801895e:	e084      	b.n	8018a6a <lwip_sendto+0x14a>
    done_socket(sock);
    return -1;
#endif /* LWIP_TCP */
  }

  if (size > LWIP_MIN(0xFFFF, SSIZE_MAX)) {
 8018960:	687b      	ldr	r3, [r7, #4]
 8018962:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 8018966:	d30a      	bcc.n	801897e <lwip_sendto+0x5e>
    /* cannot fit into one datagram (at least for us) */
    sock_set_errno(sock, EMSGSIZE);
 8018968:	235a      	movs	r3, #90	@ 0x5a
 801896a:	623b      	str	r3, [r7, #32]
 801896c:	6a3b      	ldr	r3, [r7, #32]
 801896e:	2b00      	cmp	r3, #0
 8018970:	d002      	beq.n	8018978 <lwip_sendto+0x58>
 8018972:	4a40      	ldr	r2, [pc, #256]	@ (8018a74 <lwip_sendto+0x154>)
 8018974:	6a3b      	ldr	r3, [r7, #32]
 8018976:	6013      	str	r3, [r2, #0]
    done_socket(sock);
    return -1;
 8018978:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 801897c:	e075      	b.n	8018a6a <lwip_sendto+0x14a>
  }
  short_size = (u16_t)size;
 801897e:	687b      	ldr	r3, [r7, #4]
 8018980:	85fb      	strh	r3, [r7, #46]	@ 0x2e
  LWIP_ERROR("lwip_sendto: invalid address", (((to == NULL) && (tolen == 0)) ||
 8018982:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8018984:	2b00      	cmp	r3, #0
 8018986:	d102      	bne.n	801898e <lwip_sendto+0x6e>
 8018988:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 801898a:	2b00      	cmp	r3, #0
 801898c:	d023      	beq.n	80189d6 <lwip_sendto+0xb6>
 801898e:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 8018990:	2b10      	cmp	r3, #16
 8018992:	d10b      	bne.n	80189ac <lwip_sendto+0x8c>
 8018994:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8018996:	2b00      	cmp	r3, #0
 8018998:	d008      	beq.n	80189ac <lwip_sendto+0x8c>
 801899a:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801899c:	785b      	ldrb	r3, [r3, #1]
 801899e:	2b02      	cmp	r3, #2
 80189a0:	d104      	bne.n	80189ac <lwip_sendto+0x8c>
 80189a2:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 80189a4:	f003 0303 	and.w	r3, r3, #3
 80189a8:	2b00      	cmp	r3, #0
 80189aa:	d014      	beq.n	80189d6 <lwip_sendto+0xb6>
 80189ac:	4b32      	ldr	r3, [pc, #200]	@ (8018a78 <lwip_sendto+0x158>)
 80189ae:	f240 6252 	movw	r2, #1618	@ 0x652
 80189b2:	4932      	ldr	r1, [pc, #200]	@ (8018a7c <lwip_sendto+0x15c>)
 80189b4:	4832      	ldr	r0, [pc, #200]	@ (8018a80 <lwip_sendto+0x160>)
 80189b6:	f011 fc01 	bl	802a1bc <iprintf>
 80189ba:	f06f 000f 	mvn.w	r0, #15
 80189be:	f7ff f97d 	bl	8017cbc <err_to_errno>
 80189c2:	62b8      	str	r0, [r7, #40]	@ 0x28
 80189c4:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80189c6:	2b00      	cmp	r3, #0
 80189c8:	d002      	beq.n	80189d0 <lwip_sendto+0xb0>
 80189ca:	4a2a      	ldr	r2, [pc, #168]	@ (8018a74 <lwip_sendto+0x154>)
 80189cc:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80189ce:	6013      	str	r3, [r2, #0]
 80189d0:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80189d4:	e049      	b.n	8018a6a <lwip_sendto+0x14a>
              ((to != NULL) && (IS_SOCK_ADDR_TYPE_VALID(to) && IS_SOCK_ADDR_ALIGNED(to))))),
             sock_set_errno(sock, err_to_errno(ERR_ARG)); done_socket(sock); return -1;);
  LWIP_UNUSED_ARG(tolen);

  /* initialize a buffer */
  buf.p = buf.ptr = NULL;
 80189d6:	2300      	movs	r3, #0
 80189d8:	617b      	str	r3, [r7, #20]
 80189da:	697b      	ldr	r3, [r7, #20]
 80189dc:	613b      	str	r3, [r7, #16]
#if LWIP_CHECKSUM_ON_COPY
  buf.flags = 0;
#endif /* LWIP_CHECKSUM_ON_COPY */
  if (to) {
 80189de:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 80189e0:	2b00      	cmp	r3, #0
 80189e2:	d00a      	beq.n	80189fa <lwip_sendto+0xda>
    SOCKADDR_TO_IPADDR_PORT(to, &buf.addr, remote_port);
 80189e4:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 80189e6:	685b      	ldr	r3, [r3, #4]
 80189e8:	61bb      	str	r3, [r7, #24]
 80189ea:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 80189ec:	885b      	ldrh	r3, [r3, #2]
 80189ee:	4618      	mov	r0, r3
 80189f0:	f000 fc8a 	bl	8019308 <lwip_htons>
 80189f4:	4603      	mov	r3, r0
 80189f6:	86fb      	strh	r3, [r7, #54]	@ 0x36
 80189f8:	e003      	b.n	8018a02 <lwip_sendto+0xe2>
  } else {
    remote_port = 0;
 80189fa:	2300      	movs	r3, #0
 80189fc:	86fb      	strh	r3, [r7, #54]	@ 0x36
    ip_addr_set_any(NETCONNTYPE_ISIPV6(netconn_type(sock->conn)), &buf.addr);
 80189fe:	2300      	movs	r3, #0
 8018a00:	61bb      	str	r3, [r7, #24]
  }
  netbuf_fromport(&buf) = remote_port;
 8018a02:	8efb      	ldrh	r3, [r7, #54]	@ 0x36
 8018a04:	83bb      	strh	r3, [r7, #28]
      MEMCPY(buf.p->payload, data, short_size);
    }
    err = ERR_OK;
  }
#else /* LWIP_NETIF_TX_SINGLE_PBUF */
  err = netbuf_ref(&buf, data, short_size);
 8018a06:	8dfa      	ldrh	r2, [r7, #46]	@ 0x2e
 8018a08:	f107 0310 	add.w	r3, r7, #16
 8018a0c:	68b9      	ldr	r1, [r7, #8]
 8018a0e:	4618      	mov	r0, r3
 8018a10:	f7ff f9ba 	bl	8017d88 <netbuf_ref>
 8018a14:	4603      	mov	r3, r0
 8018a16:	f887 302d 	strb.w	r3, [r7, #45]	@ 0x2d
#endif /* LWIP_NETIF_TX_SINGLE_PBUF */
  if (err == ERR_OK) {
 8018a1a:	f997 302d 	ldrsb.w	r3, [r7, #45]	@ 0x2d
 8018a1e:	2b00      	cmp	r3, #0
 8018a20:	d10a      	bne.n	8018a38 <lwip_sendto+0x118>
      IP_SET_TYPE_VAL(buf.addr, IPADDR_TYPE_V4);
    }
#endif /* LWIP_IPV4 && LWIP_IPV6 */

    /* send the data */
    err = netconn_send(sock->conn, &buf);
 8018a22:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8018a24:	681b      	ldr	r3, [r3, #0]
 8018a26:	f107 0210 	add.w	r2, r7, #16
 8018a2a:	4611      	mov	r1, r2
 8018a2c:	4618      	mov	r0, r3
 8018a2e:	f7fd fb31 	bl	8016094 <netconn_send>
 8018a32:	4603      	mov	r3, r0
 8018a34:	f887 302d 	strb.w	r3, [r7, #45]	@ 0x2d
  }

  /* deallocated the buffer */
  netbuf_free(&buf);
 8018a38:	f107 0310 	add.w	r3, r7, #16
 8018a3c:	4618      	mov	r0, r3
 8018a3e:	f7ff f97b 	bl	8017d38 <netbuf_free>

  sock_set_errno(sock, err_to_errno(err));
 8018a42:	f997 302d 	ldrsb.w	r3, [r7, #45]	@ 0x2d
 8018a46:	4618      	mov	r0, r3
 8018a48:	f7ff f938 	bl	8017cbc <err_to_errno>
 8018a4c:	6278      	str	r0, [r7, #36]	@ 0x24
 8018a4e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8018a50:	2b00      	cmp	r3, #0
 8018a52:	d002      	beq.n	8018a5a <lwip_sendto+0x13a>
 8018a54:	4a07      	ldr	r2, [pc, #28]	@ (8018a74 <lwip_sendto+0x154>)
 8018a56:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8018a58:	6013      	str	r3, [r2, #0]
  done_socket(sock);
  return (err == ERR_OK ? short_size : -1);
 8018a5a:	f997 302d 	ldrsb.w	r3, [r7, #45]	@ 0x2d
 8018a5e:	2b00      	cmp	r3, #0
 8018a60:	d101      	bne.n	8018a66 <lwip_sendto+0x146>
 8018a62:	8dfb      	ldrh	r3, [r7, #46]	@ 0x2e
 8018a64:	e001      	b.n	8018a6a <lwip_sendto+0x14a>
 8018a66:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
}
 8018a6a:	4618      	mov	r0, r3
 8018a6c:	3738      	adds	r7, #56	@ 0x38
 8018a6e:	46bd      	mov	sp, r7
 8018a70:	bd80      	pop	{r7, pc}
 8018a72:	bf00      	nop
 8018a74:	2402b250 	.word	0x2402b250
 8018a78:	0802de60 	.word	0x0802de60
 8018a7c:	0802e140 	.word	0x0802e140
 8018a80:	0802deb4 	.word	0x0802deb4

08018a84 <lwip_socket>:

int
lwip_socket(int domain, int type, int protocol)
{
 8018a84:	b580      	push	{r7, lr}
 8018a86:	b086      	sub	sp, #24
 8018a88:	af00      	add	r7, sp, #0
 8018a8a:	60f8      	str	r0, [r7, #12]
 8018a8c:	60b9      	str	r1, [r7, #8]
 8018a8e:	607a      	str	r2, [r7, #4]
  int i;

  LWIP_UNUSED_ARG(domain); /* @todo: check this */

  /* create a netconn */
  switch (type) {
 8018a90:	68bb      	ldr	r3, [r7, #8]
 8018a92:	2b03      	cmp	r3, #3
 8018a94:	d009      	beq.n	8018aaa <lwip_socket+0x26>
 8018a96:	68bb      	ldr	r3, [r7, #8]
 8018a98:	2b03      	cmp	r3, #3
 8018a9a:	dc23      	bgt.n	8018ae4 <lwip_socket+0x60>
 8018a9c:	68bb      	ldr	r3, [r7, #8]
 8018a9e:	2b01      	cmp	r3, #1
 8018aa0:	d019      	beq.n	8018ad6 <lwip_socket+0x52>
 8018aa2:	68bb      	ldr	r3, [r7, #8]
 8018aa4:	2b02      	cmp	r3, #2
 8018aa6:	d009      	beq.n	8018abc <lwip_socket+0x38>
 8018aa8:	e01c      	b.n	8018ae4 <lwip_socket+0x60>
    case SOCK_RAW:
      conn = netconn_new_with_proto_and_callback(DOMAIN_TO_NETCONN_TYPE(domain, NETCONN_RAW),
 8018aaa:	687b      	ldr	r3, [r7, #4]
 8018aac:	b2db      	uxtb	r3, r3
 8018aae:	4a22      	ldr	r2, [pc, #136]	@ (8018b38 <lwip_socket+0xb4>)
 8018ab0:	4619      	mov	r1, r3
 8018ab2:	2040      	movs	r0, #64	@ 0x40
 8018ab4:	f7fc ff60 	bl	8015978 <netconn_new_with_proto_and_callback>
 8018ab8:	6178      	str	r0, [r7, #20]
             (u8_t)protocol, DEFAULT_SOCKET_EVENTCB);
      LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_socket(%s, SOCK_RAW, %d) = ",
                                  domain == PF_INET ? "PF_INET" : "UNKNOWN", protocol));
      break;
 8018aba:	e019      	b.n	8018af0 <lwip_socket+0x6c>
    case SOCK_DGRAM:
      conn = netconn_new_with_callback(DOMAIN_TO_NETCONN_TYPE(domain,
 8018abc:	687b      	ldr	r3, [r7, #4]
 8018abe:	2b88      	cmp	r3, #136	@ 0x88
 8018ac0:	d101      	bne.n	8018ac6 <lwip_socket+0x42>
 8018ac2:	2321      	movs	r3, #33	@ 0x21
 8018ac4:	e000      	b.n	8018ac8 <lwip_socket+0x44>
 8018ac6:	2320      	movs	r3, #32
 8018ac8:	4a1b      	ldr	r2, [pc, #108]	@ (8018b38 <lwip_socket+0xb4>)
 8018aca:	2100      	movs	r1, #0
 8018acc:	4618      	mov	r0, r3
 8018ace:	f7fc ff53 	bl	8015978 <netconn_new_with_proto_and_callback>
 8018ad2:	6178      	str	r0, [r7, #20]
      if (conn) {
        /* netconn layer enables pktinfo by default, sockets default to off */
        conn->flags &= ~NETCONN_FLAG_PKTINFO;
      }
#endif /* LWIP_NETBUF_RECVINFO */
      break;
 8018ad4:	e00c      	b.n	8018af0 <lwip_socket+0x6c>
    case SOCK_STREAM:
      conn = netconn_new_with_callback(DOMAIN_TO_NETCONN_TYPE(domain, NETCONN_TCP), DEFAULT_SOCKET_EVENTCB);
 8018ad6:	4a18      	ldr	r2, [pc, #96]	@ (8018b38 <lwip_socket+0xb4>)
 8018ad8:	2100      	movs	r1, #0
 8018ada:	2010      	movs	r0, #16
 8018adc:	f7fc ff4c 	bl	8015978 <netconn_new_with_proto_and_callback>
 8018ae0:	6178      	str	r0, [r7, #20]
      LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_socket(%s, SOCK_STREAM, %d) = ",
                                  domain == PF_INET ? "PF_INET" : "UNKNOWN", protocol));
      break;
 8018ae2:	e005      	b.n	8018af0 <lwip_socket+0x6c>
    default:
      LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_socket(%d, %d/UNKNOWN, %d) = -1\n",
                                  domain, type, protocol));
      set_errno(EINVAL);
 8018ae4:	4b15      	ldr	r3, [pc, #84]	@ (8018b3c <lwip_socket+0xb8>)
 8018ae6:	2216      	movs	r2, #22
 8018ae8:	601a      	str	r2, [r3, #0]
      return -1;
 8018aea:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8018aee:	e01e      	b.n	8018b2e <lwip_socket+0xaa>
  }

  if (!conn) {
 8018af0:	697b      	ldr	r3, [r7, #20]
 8018af2:	2b00      	cmp	r3, #0
 8018af4:	d105      	bne.n	8018b02 <lwip_socket+0x7e>
    LWIP_DEBUGF(SOCKETS_DEBUG, ("-1 / ENOBUFS (could not create netconn)\n"));
    set_errno(ENOBUFS);
 8018af6:	4b11      	ldr	r3, [pc, #68]	@ (8018b3c <lwip_socket+0xb8>)
 8018af8:	2269      	movs	r2, #105	@ 0x69
 8018afa:	601a      	str	r2, [r3, #0]
    return -1;
 8018afc:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8018b00:	e015      	b.n	8018b2e <lwip_socket+0xaa>
  }

  i = alloc_socket(conn, 0);
 8018b02:	2100      	movs	r1, #0
 8018b04:	6978      	ldr	r0, [r7, #20]
 8018b06:	f7ff f9df 	bl	8017ec8 <alloc_socket>
 8018b0a:	6138      	str	r0, [r7, #16]

  if (i == -1) {
 8018b0c:	693b      	ldr	r3, [r7, #16]
 8018b0e:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8018b12:	d108      	bne.n	8018b26 <lwip_socket+0xa2>
    netconn_delete(conn);
 8018b14:	6978      	ldr	r0, [r7, #20]
 8018b16:	f7fc ffcd 	bl	8015ab4 <netconn_delete>
    set_errno(ENFILE);
 8018b1a:	4b08      	ldr	r3, [pc, #32]	@ (8018b3c <lwip_socket+0xb8>)
 8018b1c:	2217      	movs	r2, #23
 8018b1e:	601a      	str	r2, [r3, #0]
    return -1;
 8018b20:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8018b24:	e003      	b.n	8018b2e <lwip_socket+0xaa>
  }
  conn->socket = i;
 8018b26:	697b      	ldr	r3, [r7, #20]
 8018b28:	693a      	ldr	r2, [r7, #16]
 8018b2a:	619a      	str	r2, [r3, #24]
  done_socket(&sockets[i - LWIP_SOCKET_OFFSET]);
  LWIP_DEBUGF(SOCKETS_DEBUG, ("%d\n", i));
  set_errno(0);
  return i;
 8018b2c:	693b      	ldr	r3, [r7, #16]
}
 8018b2e:	4618      	mov	r0, r3
 8018b30:	3718      	adds	r7, #24
 8018b32:	46bd      	mov	sp, r7
 8018b34:	bd80      	pop	{r7, pc}
 8018b36:	bf00      	nop
 8018b38:	08018bc9 	.word	0x08018bc9
 8018b3c:	2402b250 	.word	0x2402b250

08018b40 <lwip_poll_should_wake>:
 * Check whether event_callback should wake up a thread waiting in
 * lwip_poll.
 */
static int
lwip_poll_should_wake(const struct lwip_select_cb *scb, int fd, int has_recvevent, int has_sendevent, int has_errevent)
{
 8018b40:	b480      	push	{r7}
 8018b42:	b087      	sub	sp, #28
 8018b44:	af00      	add	r7, sp, #0
 8018b46:	60f8      	str	r0, [r7, #12]
 8018b48:	60b9      	str	r1, [r7, #8]
 8018b4a:	607a      	str	r2, [r7, #4]
 8018b4c:	603b      	str	r3, [r7, #0]
  nfds_t fdi;
  for (fdi = 0; fdi < scb->poll_nfds; fdi++) {
 8018b4e:	2300      	movs	r3, #0
 8018b50:	617b      	str	r3, [r7, #20]
 8018b52:	e02c      	b.n	8018bae <lwip_poll_should_wake+0x6e>
    const struct pollfd *pollfd = &scb->poll_fds[fdi];
 8018b54:	68fb      	ldr	r3, [r7, #12]
 8018b56:	695a      	ldr	r2, [r3, #20]
 8018b58:	697b      	ldr	r3, [r7, #20]
 8018b5a:	00db      	lsls	r3, r3, #3
 8018b5c:	4413      	add	r3, r2
 8018b5e:	613b      	str	r3, [r7, #16]
    if (pollfd->fd == fd) {
 8018b60:	693b      	ldr	r3, [r7, #16]
 8018b62:	681b      	ldr	r3, [r3, #0]
 8018b64:	68ba      	ldr	r2, [r7, #8]
 8018b66:	429a      	cmp	r2, r3
 8018b68:	d11e      	bne.n	8018ba8 <lwip_poll_should_wake+0x68>
      /* Do not update pollfd->revents right here;
         that would be a data race because lwip_pollscan
         accesses revents without protecting. */
      if (has_recvevent && (pollfd->events & POLLIN) != 0) {
 8018b6a:	687b      	ldr	r3, [r7, #4]
 8018b6c:	2b00      	cmp	r3, #0
 8018b6e:	d009      	beq.n	8018b84 <lwip_poll_should_wake+0x44>
 8018b70:	693b      	ldr	r3, [r7, #16]
 8018b72:	f9b3 3004 	ldrsh.w	r3, [r3, #4]
 8018b76:	b29b      	uxth	r3, r3
 8018b78:	f003 0301 	and.w	r3, r3, #1
 8018b7c:	2b00      	cmp	r3, #0
 8018b7e:	d001      	beq.n	8018b84 <lwip_poll_should_wake+0x44>
        return 1;
 8018b80:	2301      	movs	r3, #1
 8018b82:	e01a      	b.n	8018bba <lwip_poll_should_wake+0x7a>
      }
      if (has_sendevent && (pollfd->events & POLLOUT) != 0) {
 8018b84:	683b      	ldr	r3, [r7, #0]
 8018b86:	2b00      	cmp	r3, #0
 8018b88:	d009      	beq.n	8018b9e <lwip_poll_should_wake+0x5e>
 8018b8a:	693b      	ldr	r3, [r7, #16]
 8018b8c:	f9b3 3004 	ldrsh.w	r3, [r3, #4]
 8018b90:	b29b      	uxth	r3, r3
 8018b92:	f003 0302 	and.w	r3, r3, #2
 8018b96:	2b00      	cmp	r3, #0
 8018b98:	d001      	beq.n	8018b9e <lwip_poll_should_wake+0x5e>
        return 1;
 8018b9a:	2301      	movs	r3, #1
 8018b9c:	e00d      	b.n	8018bba <lwip_poll_should_wake+0x7a>
      }
      if (has_errevent) {
 8018b9e:	6a3b      	ldr	r3, [r7, #32]
 8018ba0:	2b00      	cmp	r3, #0
 8018ba2:	d001      	beq.n	8018ba8 <lwip_poll_should_wake+0x68>
        /* POLLERR is output only. */
        return 1;
 8018ba4:	2301      	movs	r3, #1
 8018ba6:	e008      	b.n	8018bba <lwip_poll_should_wake+0x7a>
  for (fdi = 0; fdi < scb->poll_nfds; fdi++) {
 8018ba8:	697b      	ldr	r3, [r7, #20]
 8018baa:	3301      	adds	r3, #1
 8018bac:	617b      	str	r3, [r7, #20]
 8018bae:	68fb      	ldr	r3, [r7, #12]
 8018bb0:	699b      	ldr	r3, [r3, #24]
 8018bb2:	697a      	ldr	r2, [r7, #20]
 8018bb4:	429a      	cmp	r2, r3
 8018bb6:	d3cd      	bcc.n	8018b54 <lwip_poll_should_wake+0x14>
      }
    }
  }
  return 0;
 8018bb8:	2300      	movs	r3, #0
}
 8018bba:	4618      	mov	r0, r3
 8018bbc:	371c      	adds	r7, #28
 8018bbe:	46bd      	mov	sp, r7
 8018bc0:	f85d 7b04 	ldr.w	r7, [sp], #4
 8018bc4:	4770      	bx	lr
	...

08018bc8 <event_callback>:
 *   NETCONN_EVT_ERROR
 * This requirement will be asserted in select_check_waiters()
 */
static void
event_callback(struct netconn *conn, enum netconn_evt evt, u16_t len)
{
 8018bc8:	b580      	push	{r7, lr}
 8018bca:	b08a      	sub	sp, #40	@ 0x28
 8018bcc:	af00      	add	r7, sp, #0
 8018bce:	6078      	str	r0, [r7, #4]
 8018bd0:	460b      	mov	r3, r1
 8018bd2:	70fb      	strb	r3, [r7, #3]
 8018bd4:	4613      	mov	r3, r2
 8018bd6:	803b      	strh	r3, [r7, #0]
  SYS_ARCH_DECL_PROTECT(lev);

  LWIP_UNUSED_ARG(len);

  /* Get socket */
  if (conn) {
 8018bd8:	687b      	ldr	r3, [r7, #4]
 8018bda:	2b00      	cmp	r3, #0
 8018bdc:	f000 80a4 	beq.w	8018d28 <event_callback+0x160>
    s = conn->socket;
 8018be0:	687b      	ldr	r3, [r7, #4]
 8018be2:	699b      	ldr	r3, [r3, #24]
 8018be4:	627b      	str	r3, [r7, #36]	@ 0x24
    if (s < 0) {
 8018be6:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8018be8:	2b00      	cmp	r3, #0
 8018bea:	da18      	bge.n	8018c1e <event_callback+0x56>
      /* Data comes in right away after an accept, even though
       * the server task might not have created a new socket yet.
       * Just count down (or up) if that's the case and we
       * will use the data later. Note that only receive events
       * can happen before the new socket is set up. */
      SYS_ARCH_PROTECT(lev);
 8018bec:	f00e f850 	bl	8026c90 <sys_arch_protect>
 8018bf0:	61f8      	str	r0, [r7, #28]
      if (conn->socket < 0) {
 8018bf2:	687b      	ldr	r3, [r7, #4]
 8018bf4:	699b      	ldr	r3, [r3, #24]
 8018bf6:	2b00      	cmp	r3, #0
 8018bf8:	da0b      	bge.n	8018c12 <event_callback+0x4a>
        if (evt == NETCONN_EVT_RCVPLUS) {
 8018bfa:	78fb      	ldrb	r3, [r7, #3]
 8018bfc:	2b00      	cmp	r3, #0
 8018bfe:	d104      	bne.n	8018c0a <event_callback+0x42>
          /* conn->socket is -1 on initialization
             lwip_accept adjusts sock->recvevent if conn->socket < -1 */
          conn->socket--;
 8018c00:	687b      	ldr	r3, [r7, #4]
 8018c02:	699b      	ldr	r3, [r3, #24]
 8018c04:	1e5a      	subs	r2, r3, #1
 8018c06:	687b      	ldr	r3, [r7, #4]
 8018c08:	619a      	str	r2, [r3, #24]
        }
        SYS_ARCH_UNPROTECT(lev);
 8018c0a:	69f8      	ldr	r0, [r7, #28]
 8018c0c:	f00e f84e 	bl	8026cac <sys_arch_unprotect>
        return;
 8018c10:	e08d      	b.n	8018d2e <event_callback+0x166>
      }
      s = conn->socket;
 8018c12:	687b      	ldr	r3, [r7, #4]
 8018c14:	699b      	ldr	r3, [r3, #24]
 8018c16:	627b      	str	r3, [r7, #36]	@ 0x24
      SYS_ARCH_UNPROTECT(lev);
 8018c18:	69f8      	ldr	r0, [r7, #28]
 8018c1a:	f00e f847 	bl	8026cac <sys_arch_unprotect>
    }

    sock = get_socket(s);
 8018c1e:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 8018c20:	f7ff f93a 	bl	8017e98 <get_socket>
 8018c24:	61b8      	str	r0, [r7, #24]
    if (!sock) {
 8018c26:	69bb      	ldr	r3, [r7, #24]
 8018c28:	2b00      	cmp	r3, #0
 8018c2a:	d07f      	beq.n	8018d2c <event_callback+0x164>
    }
  } else {
    return;
  }

  check_waiters = 1;
 8018c2c:	2301      	movs	r3, #1
 8018c2e:	623b      	str	r3, [r7, #32]
  SYS_ARCH_PROTECT(lev);
 8018c30:	f00e f82e 	bl	8026c90 <sys_arch_protect>
 8018c34:	61f8      	str	r0, [r7, #28]
  /* Set event as required */
  switch (evt) {
 8018c36:	78fb      	ldrb	r3, [r7, #3]
 8018c38:	2b04      	cmp	r3, #4
 8018c3a:	d83e      	bhi.n	8018cba <event_callback+0xf2>
 8018c3c:	a201      	add	r2, pc, #4	@ (adr r2, 8018c44 <event_callback+0x7c>)
 8018c3e:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 8018c42:	bf00      	nop
 8018c44:	08018c59 	.word	0x08018c59
 8018c48:	08018c7b 	.word	0x08018c7b
 8018c4c:	08018c93 	.word	0x08018c93
 8018c50:	08018ca7 	.word	0x08018ca7
 8018c54:	08018cb3 	.word	0x08018cb3
    case NETCONN_EVT_RCVPLUS:
      sock->rcvevent++;
 8018c58:	69bb      	ldr	r3, [r7, #24]
 8018c5a:	f9b3 3008 	ldrsh.w	r3, [r3, #8]
 8018c5e:	b29b      	uxth	r3, r3
 8018c60:	3301      	adds	r3, #1
 8018c62:	b29b      	uxth	r3, r3
 8018c64:	b21a      	sxth	r2, r3
 8018c66:	69bb      	ldr	r3, [r7, #24]
 8018c68:	811a      	strh	r2, [r3, #8]
      if (sock->rcvevent > 1) {
 8018c6a:	69bb      	ldr	r3, [r7, #24]
 8018c6c:	f9b3 3008 	ldrsh.w	r3, [r3, #8]
 8018c70:	2b01      	cmp	r3, #1
 8018c72:	dd2a      	ble.n	8018cca <event_callback+0x102>
        check_waiters = 0;
 8018c74:	2300      	movs	r3, #0
 8018c76:	623b      	str	r3, [r7, #32]
      }
      break;
 8018c78:	e027      	b.n	8018cca <event_callback+0x102>
    case NETCONN_EVT_RCVMINUS:
      sock->rcvevent--;
 8018c7a:	69bb      	ldr	r3, [r7, #24]
 8018c7c:	f9b3 3008 	ldrsh.w	r3, [r3, #8]
 8018c80:	b29b      	uxth	r3, r3
 8018c82:	3b01      	subs	r3, #1
 8018c84:	b29b      	uxth	r3, r3
 8018c86:	b21a      	sxth	r2, r3
 8018c88:	69bb      	ldr	r3, [r7, #24]
 8018c8a:	811a      	strh	r2, [r3, #8]
      check_waiters = 0;
 8018c8c:	2300      	movs	r3, #0
 8018c8e:	623b      	str	r3, [r7, #32]
      break;
 8018c90:	e01c      	b.n	8018ccc <event_callback+0x104>
    case NETCONN_EVT_SENDPLUS:
      if (sock->sendevent) {
 8018c92:	69bb      	ldr	r3, [r7, #24]
 8018c94:	895b      	ldrh	r3, [r3, #10]
 8018c96:	2b00      	cmp	r3, #0
 8018c98:	d001      	beq.n	8018c9e <event_callback+0xd6>
        check_waiters = 0;
 8018c9a:	2300      	movs	r3, #0
 8018c9c:	623b      	str	r3, [r7, #32]
      }
      sock->sendevent = 1;
 8018c9e:	69bb      	ldr	r3, [r7, #24]
 8018ca0:	2201      	movs	r2, #1
 8018ca2:	815a      	strh	r2, [r3, #10]
      break;
 8018ca4:	e012      	b.n	8018ccc <event_callback+0x104>
    case NETCONN_EVT_SENDMINUS:
      sock->sendevent = 0;
 8018ca6:	69bb      	ldr	r3, [r7, #24]
 8018ca8:	2200      	movs	r2, #0
 8018caa:	815a      	strh	r2, [r3, #10]
      check_waiters = 0;
 8018cac:	2300      	movs	r3, #0
 8018cae:	623b      	str	r3, [r7, #32]
      break;
 8018cb0:	e00c      	b.n	8018ccc <event_callback+0x104>
    case NETCONN_EVT_ERROR:
      sock->errevent = 1;
 8018cb2:	69bb      	ldr	r3, [r7, #24]
 8018cb4:	2201      	movs	r2, #1
 8018cb6:	819a      	strh	r2, [r3, #12]
      break;
 8018cb8:	e008      	b.n	8018ccc <event_callback+0x104>
    default:
      LWIP_ASSERT("unknown event", 0);
 8018cba:	4b1e      	ldr	r3, [pc, #120]	@ (8018d34 <event_callback+0x16c>)
 8018cbc:	f44f 621f 	mov.w	r2, #2544	@ 0x9f0
 8018cc0:	491d      	ldr	r1, [pc, #116]	@ (8018d38 <event_callback+0x170>)
 8018cc2:	481e      	ldr	r0, [pc, #120]	@ (8018d3c <event_callback+0x174>)
 8018cc4:	f011 fa7a 	bl	802a1bc <iprintf>
      break;
 8018cc8:	e000      	b.n	8018ccc <event_callback+0x104>
      break;
 8018cca:	bf00      	nop
  }

  if (sock->select_waiting && check_waiters) {
 8018ccc:	69bb      	ldr	r3, [r7, #24]
 8018cce:	7b9b      	ldrb	r3, [r3, #14]
 8018cd0:	2b00      	cmp	r3, #0
 8018cd2:	d025      	beq.n	8018d20 <event_callback+0x158>
 8018cd4:	6a3b      	ldr	r3, [r7, #32]
 8018cd6:	2b00      	cmp	r3, #0
 8018cd8:	d022      	beq.n	8018d20 <event_callback+0x158>
    /* Save which events are active */
    int has_recvevent, has_sendevent, has_errevent;
    has_recvevent = sock->rcvevent > 0;
 8018cda:	69bb      	ldr	r3, [r7, #24]
 8018cdc:	f9b3 3008 	ldrsh.w	r3, [r3, #8]
 8018ce0:	2b00      	cmp	r3, #0
 8018ce2:	bfcc      	ite	gt
 8018ce4:	2301      	movgt	r3, #1
 8018ce6:	2300      	movle	r3, #0
 8018ce8:	b2db      	uxtb	r3, r3
 8018cea:	617b      	str	r3, [r7, #20]
    has_sendevent = sock->sendevent != 0;
 8018cec:	69bb      	ldr	r3, [r7, #24]
 8018cee:	895b      	ldrh	r3, [r3, #10]
 8018cf0:	2b00      	cmp	r3, #0
 8018cf2:	bf14      	ite	ne
 8018cf4:	2301      	movne	r3, #1
 8018cf6:	2300      	moveq	r3, #0
 8018cf8:	b2db      	uxtb	r3, r3
 8018cfa:	613b      	str	r3, [r7, #16]
    has_errevent = sock->errevent != 0;
 8018cfc:	69bb      	ldr	r3, [r7, #24]
 8018cfe:	899b      	ldrh	r3, [r3, #12]
 8018d00:	2b00      	cmp	r3, #0
 8018d02:	bf14      	ite	ne
 8018d04:	2301      	movne	r3, #1
 8018d06:	2300      	moveq	r3, #0
 8018d08:	b2db      	uxtb	r3, r3
 8018d0a:	60fb      	str	r3, [r7, #12]
    SYS_ARCH_UNPROTECT(lev);
 8018d0c:	69f8      	ldr	r0, [r7, #28]
 8018d0e:	f00d ffcd 	bl	8026cac <sys_arch_unprotect>
    /* Check any select calls waiting on this socket */
    select_check_waiters(s, has_recvevent, has_sendevent, has_errevent);
 8018d12:	68fb      	ldr	r3, [r7, #12]
 8018d14:	693a      	ldr	r2, [r7, #16]
 8018d16:	6979      	ldr	r1, [r7, #20]
 8018d18:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 8018d1a:	f000 f811 	bl	8018d40 <select_check_waiters>
  if (sock->select_waiting && check_waiters) {
 8018d1e:	e006      	b.n	8018d2e <event_callback+0x166>
  } else {
    SYS_ARCH_UNPROTECT(lev);
 8018d20:	69f8      	ldr	r0, [r7, #28]
 8018d22:	f00d ffc3 	bl	8026cac <sys_arch_unprotect>
 8018d26:	e002      	b.n	8018d2e <event_callback+0x166>
    return;
 8018d28:	bf00      	nop
 8018d2a:	e000      	b.n	8018d2e <event_callback+0x166>
      return;
 8018d2c:	bf00      	nop
  }
  done_socket(sock);
}
 8018d2e:	3728      	adds	r7, #40	@ 0x28
 8018d30:	46bd      	mov	sp, r7
 8018d32:	bd80      	pop	{r7, pc}
 8018d34:	0802de60 	.word	0x0802de60
 8018d38:	0802e1dc 	.word	0x0802e1dc
 8018d3c:	0802deb4 	.word	0x0802deb4

08018d40 <select_check_waiters>:
 * of the loop, thus creating a possibility where a thread could modify the
 * select_cb_list during our UNPROTECT/PROTECT. We use a generational counter to
 * detect this change and restart the list walk. The list is expected to be small
 */
static void select_check_waiters(int s, int has_recvevent, int has_sendevent, int has_errevent)
{
 8018d40:	b580      	push	{r7, lr}
 8018d42:	b088      	sub	sp, #32
 8018d44:	af02      	add	r7, sp, #8
 8018d46:	60f8      	str	r0, [r7, #12]
 8018d48:	60b9      	str	r1, [r7, #8]
 8018d4a:	607a      	str	r2, [r7, #4]
 8018d4c:	603b      	str	r3, [r7, #0]
#if !LWIP_TCPIP_CORE_LOCKING
  int last_select_cb_ctr;
  SYS_ARCH_DECL_PROTECT(lev);
#endif /* !LWIP_TCPIP_CORE_LOCKING */

  LWIP_ASSERT_CORE_LOCKED();
 8018d4e:	f7f7 fe95 	bl	8010a7c <sys_check_core_locking>
  SYS_ARCH_PROTECT(lev);
again:
  /* remember the state of select_cb_list to detect changes */
  last_select_cb_ctr = select_cb_ctr;
#endif /* !LWIP_TCPIP_CORE_LOCKING */
  for (scb = select_cb_list; scb != NULL; scb = scb->next) {
 8018d52:	4b42      	ldr	r3, [pc, #264]	@ (8018e5c <select_check_waiters+0x11c>)
 8018d54:	681b      	ldr	r3, [r3, #0]
 8018d56:	617b      	str	r3, [r7, #20]
 8018d58:	e078      	b.n	8018e4c <select_check_waiters+0x10c>
    if (scb->sem_signalled == 0) {
 8018d5a:	697b      	ldr	r3, [r7, #20]
 8018d5c:	69db      	ldr	r3, [r3, #28]
 8018d5e:	2b00      	cmp	r3, #0
 8018d60:	d171      	bne.n	8018e46 <select_check_waiters+0x106>
      /* semaphore not signalled yet */
      int do_signal = 0;
 8018d62:	2300      	movs	r3, #0
 8018d64:	613b      	str	r3, [r7, #16]
#if LWIP_SOCKET_POLL
      if (scb->poll_fds != NULL) {
 8018d66:	697b      	ldr	r3, [r7, #20]
 8018d68:	695b      	ldr	r3, [r3, #20]
 8018d6a:	2b00      	cmp	r3, #0
 8018d6c:	d009      	beq.n	8018d82 <select_check_waiters+0x42>
        do_signal = lwip_poll_should_wake(scb, s, has_recvevent, has_sendevent, has_errevent);
 8018d6e:	683b      	ldr	r3, [r7, #0]
 8018d70:	9300      	str	r3, [sp, #0]
 8018d72:	687b      	ldr	r3, [r7, #4]
 8018d74:	68ba      	ldr	r2, [r7, #8]
 8018d76:	68f9      	ldr	r1, [r7, #12]
 8018d78:	6978      	ldr	r0, [r7, #20]
 8018d7a:	f7ff fee1 	bl	8018b40 <lwip_poll_should_wake>
 8018d7e:	6138      	str	r0, [r7, #16]
 8018d80:	e056      	b.n	8018e30 <select_check_waiters+0xf0>
      else
#endif /* LWIP_SOCKET_SELECT && LWIP_SOCKET_POLL */
#if LWIP_SOCKET_SELECT
      {
        /* Test this select call for our socket */
        if (has_recvevent) {
 8018d82:	68bb      	ldr	r3, [r7, #8]
 8018d84:	2b00      	cmp	r3, #0
 8018d86:	d017      	beq.n	8018db8 <select_check_waiters+0x78>
          if (scb->readset && FD_ISSET(s, scb->readset)) {
 8018d88:	697b      	ldr	r3, [r7, #20]
 8018d8a:	689b      	ldr	r3, [r3, #8]
 8018d8c:	2b00      	cmp	r3, #0
 8018d8e:	d013      	beq.n	8018db8 <select_check_waiters+0x78>
 8018d90:	697b      	ldr	r3, [r7, #20]
 8018d92:	689a      	ldr	r2, [r3, #8]
 8018d94:	68fb      	ldr	r3, [r7, #12]
 8018d96:	2b00      	cmp	r3, #0
 8018d98:	da00      	bge.n	8018d9c <select_check_waiters+0x5c>
 8018d9a:	331f      	adds	r3, #31
 8018d9c:	115b      	asrs	r3, r3, #5
 8018d9e:	f852 2023 	ldr.w	r2, [r2, r3, lsl #2]
 8018da2:	68fb      	ldr	r3, [r7, #12]
 8018da4:	f003 031f 	and.w	r3, r3, #31
 8018da8:	fa22 f303 	lsr.w	r3, r2, r3
 8018dac:	f003 0301 	and.w	r3, r3, #1
 8018db0:	2b00      	cmp	r3, #0
 8018db2:	d001      	beq.n	8018db8 <select_check_waiters+0x78>
            do_signal = 1;
 8018db4:	2301      	movs	r3, #1
 8018db6:	613b      	str	r3, [r7, #16]
          }
        }
        if (has_sendevent) {
 8018db8:	687b      	ldr	r3, [r7, #4]
 8018dba:	2b00      	cmp	r3, #0
 8018dbc:	d01a      	beq.n	8018df4 <select_check_waiters+0xb4>
          if (!do_signal && scb->writeset && FD_ISSET(s, scb->writeset)) {
 8018dbe:	693b      	ldr	r3, [r7, #16]
 8018dc0:	2b00      	cmp	r3, #0
 8018dc2:	d117      	bne.n	8018df4 <select_check_waiters+0xb4>
 8018dc4:	697b      	ldr	r3, [r7, #20]
 8018dc6:	68db      	ldr	r3, [r3, #12]
 8018dc8:	2b00      	cmp	r3, #0
 8018dca:	d013      	beq.n	8018df4 <select_check_waiters+0xb4>
 8018dcc:	697b      	ldr	r3, [r7, #20]
 8018dce:	68da      	ldr	r2, [r3, #12]
 8018dd0:	68fb      	ldr	r3, [r7, #12]
 8018dd2:	2b00      	cmp	r3, #0
 8018dd4:	da00      	bge.n	8018dd8 <select_check_waiters+0x98>
 8018dd6:	331f      	adds	r3, #31
 8018dd8:	115b      	asrs	r3, r3, #5
 8018dda:	f852 2023 	ldr.w	r2, [r2, r3, lsl #2]
 8018dde:	68fb      	ldr	r3, [r7, #12]
 8018de0:	f003 031f 	and.w	r3, r3, #31
 8018de4:	fa22 f303 	lsr.w	r3, r2, r3
 8018de8:	f003 0301 	and.w	r3, r3, #1
 8018dec:	2b00      	cmp	r3, #0
 8018dee:	d001      	beq.n	8018df4 <select_check_waiters+0xb4>
            do_signal = 1;
 8018df0:	2301      	movs	r3, #1
 8018df2:	613b      	str	r3, [r7, #16]
          }
        }
        if (has_errevent) {
 8018df4:	683b      	ldr	r3, [r7, #0]
 8018df6:	2b00      	cmp	r3, #0
 8018df8:	d01a      	beq.n	8018e30 <select_check_waiters+0xf0>
          if (!do_signal && scb->exceptset && FD_ISSET(s, scb->exceptset)) {
 8018dfa:	693b      	ldr	r3, [r7, #16]
 8018dfc:	2b00      	cmp	r3, #0
 8018dfe:	d117      	bne.n	8018e30 <select_check_waiters+0xf0>
 8018e00:	697b      	ldr	r3, [r7, #20]
 8018e02:	691b      	ldr	r3, [r3, #16]
 8018e04:	2b00      	cmp	r3, #0
 8018e06:	d013      	beq.n	8018e30 <select_check_waiters+0xf0>
 8018e08:	697b      	ldr	r3, [r7, #20]
 8018e0a:	691a      	ldr	r2, [r3, #16]
 8018e0c:	68fb      	ldr	r3, [r7, #12]
 8018e0e:	2b00      	cmp	r3, #0
 8018e10:	da00      	bge.n	8018e14 <select_check_waiters+0xd4>
 8018e12:	331f      	adds	r3, #31
 8018e14:	115b      	asrs	r3, r3, #5
 8018e16:	f852 2023 	ldr.w	r2, [r2, r3, lsl #2]
 8018e1a:	68fb      	ldr	r3, [r7, #12]
 8018e1c:	f003 031f 	and.w	r3, r3, #31
 8018e20:	fa22 f303 	lsr.w	r3, r2, r3
 8018e24:	f003 0301 	and.w	r3, r3, #1
 8018e28:	2b00      	cmp	r3, #0
 8018e2a:	d001      	beq.n	8018e30 <select_check_waiters+0xf0>
            do_signal = 1;
 8018e2c:	2301      	movs	r3, #1
 8018e2e:	613b      	str	r3, [r7, #16]
          }
        }
      }
#endif /* LWIP_SOCKET_SELECT */
      if (do_signal) {
 8018e30:	693b      	ldr	r3, [r7, #16]
 8018e32:	2b00      	cmp	r3, #0
 8018e34:	d007      	beq.n	8018e46 <select_check_waiters+0x106>
        scb->sem_signalled = 1;
 8018e36:	697b      	ldr	r3, [r7, #20]
 8018e38:	2201      	movs	r2, #1
 8018e3a:	61da      	str	r2, [r3, #28]
        /* For !LWIP_TCPIP_CORE_LOCKING, we don't call SYS_ARCH_UNPROTECT() before signaling
           the semaphore, as this might lead to the select thread taking itself off the list,
           invalidating the semaphore. */
        sys_sem_signal(SELECT_SEM_PTR(scb->sem));
 8018e3c:	697b      	ldr	r3, [r7, #20]
 8018e3e:	3320      	adds	r3, #32
 8018e40:	4618      	mov	r0, r3
 8018e42:	f00d fe8f 	bl	8026b64 <sys_sem_signal>
  for (scb = select_cb_list; scb != NULL; scb = scb->next) {
 8018e46:	697b      	ldr	r3, [r7, #20]
 8018e48:	681b      	ldr	r3, [r3, #0]
 8018e4a:	617b      	str	r3, [r7, #20]
 8018e4c:	697b      	ldr	r3, [r7, #20]
 8018e4e:	2b00      	cmp	r3, #0
 8018e50:	d183      	bne.n	8018d5a <select_check_waiters+0x1a>
    /* remember the state of select_cb_list to detect changes */
    last_select_cb_ctr = select_cb_ctr;
  }
  SYS_ARCH_UNPROTECT(lev);
#endif
}
 8018e52:	bf00      	nop
 8018e54:	bf00      	nop
 8018e56:	3718      	adds	r7, #24
 8018e58:	46bd      	mov	sp, r7
 8018e5a:	bd80      	pop	{r7, pc}
 8018e5c:	240243f4 	.word	0x240243f4

08018e60 <lwip_ioctl>:
  return err;
}

int
lwip_ioctl(int s, long cmd, void *argp)
{
 8018e60:	b580      	push	{r7, lr}
 8018e62:	b08c      	sub	sp, #48	@ 0x30
 8018e64:	af00      	add	r7, sp, #0
 8018e66:	60f8      	str	r0, [r7, #12]
 8018e68:	60b9      	str	r1, [r7, #8]
 8018e6a:	607a      	str	r2, [r7, #4]
  struct lwip_sock *sock = get_socket(s);
 8018e6c:	68f8      	ldr	r0, [r7, #12]
 8018e6e:	f7ff f813 	bl	8017e98 <get_socket>
 8018e72:	6278      	str	r0, [r7, #36]	@ 0x24
  u8_t val;
#if LWIP_SO_RCVBUF
  int recv_avail;
#endif /* LWIP_SO_RCVBUF */

  if (!sock) {
 8018e74:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8018e76:	2b00      	cmp	r3, #0
 8018e78:	d102      	bne.n	8018e80 <lwip_ioctl+0x20>
    return -1;
 8018e7a:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8018e7e:	e089      	b.n	8018f94 <lwip_ioctl+0x134>
  }

  switch (cmd) {
 8018e80:	68bb      	ldr	r3, [r7, #8]
 8018e82:	4a46      	ldr	r2, [pc, #280]	@ (8018f9c <lwip_ioctl+0x13c>)
 8018e84:	4293      	cmp	r3, r2
 8018e86:	d048      	beq.n	8018f1a <lwip_ioctl+0xba>
 8018e88:	68bb      	ldr	r3, [r7, #8]
 8018e8a:	4a45      	ldr	r2, [pc, #276]	@ (8018fa0 <lwip_ioctl+0x140>)
 8018e8c:	4293      	cmp	r3, r2
 8018e8e:	d176      	bne.n	8018f7e <lwip_ioctl+0x11e>
#if LWIP_SO_RCVBUF || LWIP_FIONREAD_LINUXMODE
    case FIONREAD:
      if (!argp) {
 8018e90:	687b      	ldr	r3, [r7, #4]
 8018e92:	2b00      	cmp	r3, #0
 8018e94:	d10a      	bne.n	8018eac <lwip_ioctl+0x4c>
        sock_set_errno(sock, EINVAL);
 8018e96:	2316      	movs	r3, #22
 8018e98:	61bb      	str	r3, [r7, #24]
 8018e9a:	69bb      	ldr	r3, [r7, #24]
 8018e9c:	2b00      	cmp	r3, #0
 8018e9e:	d002      	beq.n	8018ea6 <lwip_ioctl+0x46>
 8018ea0:	4a40      	ldr	r2, [pc, #256]	@ (8018fa4 <lwip_ioctl+0x144>)
 8018ea2:	69bb      	ldr	r3, [r7, #24]
 8018ea4:	6013      	str	r3, [r2, #0]
        done_socket(sock);
        return -1;
 8018ea6:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8018eaa:	e073      	b.n	8018f94 <lwip_ioctl+0x134>
      }
#endif /* LWIP_FIONREAD_LINUXMODE */

#if LWIP_SO_RCVBUF
      /* we come here if either LWIP_FIONREAD_LINUXMODE==0 or this is a TCP socket */
      SYS_ARCH_GET(sock->conn->recv_avail, recv_avail);
 8018eac:	f00d fef0 	bl	8026c90 <sys_arch_protect>
 8018eb0:	6238      	str	r0, [r7, #32]
 8018eb2:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8018eb4:	681b      	ldr	r3, [r3, #0]
 8018eb6:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8018eb8:	62fb      	str	r3, [r7, #44]	@ 0x2c
 8018eba:	6a38      	ldr	r0, [r7, #32]
 8018ebc:	f00d fef6 	bl	8026cac <sys_arch_unprotect>
      if (recv_avail < 0) {
 8018ec0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8018ec2:	2b00      	cmp	r3, #0
 8018ec4:	da01      	bge.n	8018eca <lwip_ioctl+0x6a>
        recv_avail = 0;
 8018ec6:	2300      	movs	r3, #0
 8018ec8:	62fb      	str	r3, [r7, #44]	@ 0x2c
      }

      /* Check if there is data left from the last recv operation. /maq 041215 */
      if (sock->lastdata.netbuf) {
 8018eca:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8018ecc:	685b      	ldr	r3, [r3, #4]
 8018ece:	2b00      	cmp	r3, #0
 8018ed0:	d016      	beq.n	8018f00 <lwip_ioctl+0xa0>
        if (NETCONNTYPE_GROUP(netconn_type(sock->conn)) == NETCONN_TCP) {
 8018ed2:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8018ed4:	681b      	ldr	r3, [r3, #0]
 8018ed6:	781b      	ldrb	r3, [r3, #0]
 8018ed8:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8018edc:	2b10      	cmp	r3, #16
 8018ede:	d107      	bne.n	8018ef0 <lwip_ioctl+0x90>
          recv_avail += sock->lastdata.pbuf->tot_len;
 8018ee0:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8018ee2:	685b      	ldr	r3, [r3, #4]
 8018ee4:	891b      	ldrh	r3, [r3, #8]
 8018ee6:	461a      	mov	r2, r3
 8018ee8:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8018eea:	4413      	add	r3, r2
 8018eec:	62fb      	str	r3, [r7, #44]	@ 0x2c
 8018eee:	e007      	b.n	8018f00 <lwip_ioctl+0xa0>
        } else {
          recv_avail += sock->lastdata.netbuf->p->tot_len;
 8018ef0:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8018ef2:	685b      	ldr	r3, [r3, #4]
 8018ef4:	681b      	ldr	r3, [r3, #0]
 8018ef6:	891b      	ldrh	r3, [r3, #8]
 8018ef8:	461a      	mov	r2, r3
 8018efa:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8018efc:	4413      	add	r3, r2
 8018efe:	62fb      	str	r3, [r7, #44]	@ 0x2c
        }
      }
      *((int *)argp) = recv_avail;
 8018f00:	687b      	ldr	r3, [r7, #4]
 8018f02:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 8018f04:	601a      	str	r2, [r3, #0]

      LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_ioctl(%d, FIONREAD, %p) = %"U16_F"\n", s, argp, *((u16_t *)argp)));
      sock_set_errno(sock, 0);
 8018f06:	2300      	movs	r3, #0
 8018f08:	61fb      	str	r3, [r7, #28]
 8018f0a:	69fb      	ldr	r3, [r7, #28]
 8018f0c:	2b00      	cmp	r3, #0
 8018f0e:	d002      	beq.n	8018f16 <lwip_ioctl+0xb6>
 8018f10:	4a24      	ldr	r2, [pc, #144]	@ (8018fa4 <lwip_ioctl+0x144>)
 8018f12:	69fb      	ldr	r3, [r7, #28]
 8018f14:	6013      	str	r3, [r2, #0]
      done_socket(sock);
      return 0;
 8018f16:	2300      	movs	r3, #0
 8018f18:	e03c      	b.n	8018f94 <lwip_ioctl+0x134>
      break;
#endif /* LWIP_SO_RCVBUF */
#endif /* LWIP_SO_RCVBUF || LWIP_FIONREAD_LINUXMODE */

    case (long)FIONBIO:
      val = 0;
 8018f1a:	2300      	movs	r3, #0
 8018f1c:	f887 302b 	strb.w	r3, [r7, #43]	@ 0x2b
      if (argp && *(int *)argp) {
 8018f20:	687b      	ldr	r3, [r7, #4]
 8018f22:	2b00      	cmp	r3, #0
 8018f24:	d006      	beq.n	8018f34 <lwip_ioctl+0xd4>
 8018f26:	687b      	ldr	r3, [r7, #4]
 8018f28:	681b      	ldr	r3, [r3, #0]
 8018f2a:	2b00      	cmp	r3, #0
 8018f2c:	d002      	beq.n	8018f34 <lwip_ioctl+0xd4>
        val = 1;
 8018f2e:	2301      	movs	r3, #1
 8018f30:	f887 302b 	strb.w	r3, [r7, #43]	@ 0x2b
      }
      netconn_set_nonblocking(sock->conn, val);
 8018f34:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 8018f38:	2b00      	cmp	r3, #0
 8018f3a:	d00b      	beq.n	8018f54 <lwip_ioctl+0xf4>
 8018f3c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8018f3e:	681b      	ldr	r3, [r3, #0]
 8018f40:	f893 2028 	ldrb.w	r2, [r3, #40]	@ 0x28
 8018f44:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8018f46:	681b      	ldr	r3, [r3, #0]
 8018f48:	f042 0202 	orr.w	r2, r2, #2
 8018f4c:	b2d2      	uxtb	r2, r2
 8018f4e:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
 8018f52:	e00a      	b.n	8018f6a <lwip_ioctl+0x10a>
 8018f54:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8018f56:	681b      	ldr	r3, [r3, #0]
 8018f58:	f893 2028 	ldrb.w	r2, [r3, #40]	@ 0x28
 8018f5c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8018f5e:	681b      	ldr	r3, [r3, #0]
 8018f60:	f022 0202 	bic.w	r2, r2, #2
 8018f64:	b2d2      	uxtb	r2, r2
 8018f66:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
      LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_ioctl(%d, FIONBIO, %d)\n", s, val));
      sock_set_errno(sock, 0);
 8018f6a:	2300      	movs	r3, #0
 8018f6c:	617b      	str	r3, [r7, #20]
 8018f6e:	697b      	ldr	r3, [r7, #20]
 8018f70:	2b00      	cmp	r3, #0
 8018f72:	d002      	beq.n	8018f7a <lwip_ioctl+0x11a>
 8018f74:	4a0b      	ldr	r2, [pc, #44]	@ (8018fa4 <lwip_ioctl+0x144>)
 8018f76:	697b      	ldr	r3, [r7, #20]
 8018f78:	6013      	str	r3, [r2, #0]
      done_socket(sock);
      return 0;
 8018f7a:	2300      	movs	r3, #0
 8018f7c:	e00a      	b.n	8018f94 <lwip_ioctl+0x134>

    default:
      break;
 8018f7e:	bf00      	nop
  } /* switch (cmd) */
  LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_ioctl(%d, UNIMPL: 0x%lx, %p)\n", s, cmd, argp));
  sock_set_errno(sock, ENOSYS); /* not yet implemented */
 8018f80:	2326      	movs	r3, #38	@ 0x26
 8018f82:	613b      	str	r3, [r7, #16]
 8018f84:	693b      	ldr	r3, [r7, #16]
 8018f86:	2b00      	cmp	r3, #0
 8018f88:	d002      	beq.n	8018f90 <lwip_ioctl+0x130>
 8018f8a:	4a06      	ldr	r2, [pc, #24]	@ (8018fa4 <lwip_ioctl+0x144>)
 8018f8c:	693b      	ldr	r3, [r7, #16]
 8018f8e:	6013      	str	r3, [r2, #0]
  done_socket(sock);
  return -1;
 8018f90:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
}
 8018f94:	4618      	mov	r0, r3
 8018f96:	3730      	adds	r7, #48	@ 0x30
 8018f98:	46bd      	mov	sp, r7
 8018f9a:	bd80      	pop	{r7, pc}
 8018f9c:	8004667e 	.word	0x8004667e
 8018fa0:	4004667f 	.word	0x4004667f
 8018fa4:	2402b250 	.word	0x2402b250

08018fa8 <tcpip_timeouts_mbox_fetch>:
 * @param mbox the mbox to fetch the message from
 * @param msg the place to store the message
 */
static void
tcpip_timeouts_mbox_fetch(sys_mbox_t *mbox, void **msg)
{
 8018fa8:	b580      	push	{r7, lr}
 8018faa:	b084      	sub	sp, #16
 8018fac:	af00      	add	r7, sp, #0
 8018fae:	6078      	str	r0, [r7, #4]
 8018fb0:	6039      	str	r1, [r7, #0]
  u32_t sleeptime, res;

again:
  LWIP_ASSERT_CORE_LOCKED();
 8018fb2:	f7f7 fd63 	bl	8010a7c <sys_check_core_locking>

  sleeptime = sys_timeouts_sleeptime();
 8018fb6:	f008 fb41 	bl	802163c <sys_timeouts_sleeptime>
 8018fba:	60f8      	str	r0, [r7, #12]
  if (sleeptime == SYS_TIMEOUTS_SLEEPTIME_INFINITE) {
 8018fbc:	68fb      	ldr	r3, [r7, #12]
 8018fbe:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8018fc2:	d109      	bne.n	8018fd8 <tcpip_timeouts_mbox_fetch+0x30>
    UNLOCK_TCPIP_CORE();
 8018fc4:	f7f7 fd4c 	bl	8010a60 <sys_unlock_tcpip_core>
    sys_arch_mbox_fetch(mbox, msg, 0);
 8018fc8:	2200      	movs	r2, #0
 8018fca:	6839      	ldr	r1, [r7, #0]
 8018fcc:	6878      	ldr	r0, [r7, #4]
 8018fce:	f00d fd0d 	bl	80269ec <sys_arch_mbox_fetch>
    LOCK_TCPIP_CORE();
 8018fd2:	f7f7 fd35 	bl	8010a40 <sys_lock_tcpip_core>
    return;
 8018fd6:	e016      	b.n	8019006 <tcpip_timeouts_mbox_fetch+0x5e>
  } else if (sleeptime == 0) {
 8018fd8:	68fb      	ldr	r3, [r7, #12]
 8018fda:	2b00      	cmp	r3, #0
 8018fdc:	d102      	bne.n	8018fe4 <tcpip_timeouts_mbox_fetch+0x3c>
    sys_check_timeouts();
 8018fde:	f008 faf1 	bl	80215c4 <sys_check_timeouts>
    /* We try again to fetch a message from the mbox. */
    goto again;
 8018fe2:	e7e6      	b.n	8018fb2 <tcpip_timeouts_mbox_fetch+0xa>
  }

  UNLOCK_TCPIP_CORE();
 8018fe4:	f7f7 fd3c 	bl	8010a60 <sys_unlock_tcpip_core>
  res = sys_arch_mbox_fetch(mbox, msg, sleeptime);
 8018fe8:	68fa      	ldr	r2, [r7, #12]
 8018fea:	6839      	ldr	r1, [r7, #0]
 8018fec:	6878      	ldr	r0, [r7, #4]
 8018fee:	f00d fcfd 	bl	80269ec <sys_arch_mbox_fetch>
 8018ff2:	60b8      	str	r0, [r7, #8]
  LOCK_TCPIP_CORE();
 8018ff4:	f7f7 fd24 	bl	8010a40 <sys_lock_tcpip_core>
  if (res == SYS_ARCH_TIMEOUT) {
 8018ff8:	68bb      	ldr	r3, [r7, #8]
 8018ffa:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8018ffe:	d102      	bne.n	8019006 <tcpip_timeouts_mbox_fetch+0x5e>
    /* If a SYS_ARCH_TIMEOUT value is returned, a timeout occurred
       before a message could be fetched. */
    sys_check_timeouts();
 8019000:	f008 fae0 	bl	80215c4 <sys_check_timeouts>
    /* We try again to fetch a message from the mbox. */
    goto again;
 8019004:	e7d5      	b.n	8018fb2 <tcpip_timeouts_mbox_fetch+0xa>
  }
}
 8019006:	3710      	adds	r7, #16
 8019008:	46bd      	mov	sp, r7
 801900a:	bd80      	pop	{r7, pc}

0801900c <tcpip_thread>:
 *
 * @param arg unused argument
 */
static void
tcpip_thread(void *arg)
{
 801900c:	b580      	push	{r7, lr}
 801900e:	b084      	sub	sp, #16
 8019010:	af00      	add	r7, sp, #0
 8019012:	6078      	str	r0, [r7, #4]
  struct tcpip_msg *msg;
  LWIP_UNUSED_ARG(arg);

  LWIP_MARK_TCPIP_THREAD();
 8019014:	f7f7 fd6e 	bl	8010af4 <sys_mark_tcpip_thread>

  LOCK_TCPIP_CORE();
 8019018:	f7f7 fd12 	bl	8010a40 <sys_lock_tcpip_core>
  if (tcpip_init_done != NULL) {
 801901c:	4b0f      	ldr	r3, [pc, #60]	@ (801905c <tcpip_thread+0x50>)
 801901e:	681b      	ldr	r3, [r3, #0]
 8019020:	2b00      	cmp	r3, #0
 8019022:	d005      	beq.n	8019030 <tcpip_thread+0x24>
    tcpip_init_done(tcpip_init_done_arg);
 8019024:	4b0d      	ldr	r3, [pc, #52]	@ (801905c <tcpip_thread+0x50>)
 8019026:	681b      	ldr	r3, [r3, #0]
 8019028:	4a0d      	ldr	r2, [pc, #52]	@ (8019060 <tcpip_thread+0x54>)
 801902a:	6812      	ldr	r2, [r2, #0]
 801902c:	4610      	mov	r0, r2
 801902e:	4798      	blx	r3
  }

  while (1) {                          /* MAIN Loop */
    LWIP_TCPIP_THREAD_ALIVE();
    /* wait for a message, timeouts are processed while waiting */
    TCPIP_MBOX_FETCH(&tcpip_mbox, (void **)&msg);
 8019030:	f107 030c 	add.w	r3, r7, #12
 8019034:	4619      	mov	r1, r3
 8019036:	480b      	ldr	r0, [pc, #44]	@ (8019064 <tcpip_thread+0x58>)
 8019038:	f7ff ffb6 	bl	8018fa8 <tcpip_timeouts_mbox_fetch>
    if (msg == NULL) {
 801903c:	68fb      	ldr	r3, [r7, #12]
 801903e:	2b00      	cmp	r3, #0
 8019040:	d106      	bne.n	8019050 <tcpip_thread+0x44>
      LWIP_DEBUGF(TCPIP_DEBUG, ("tcpip_thread: invalid message: NULL\n"));
      LWIP_ASSERT("tcpip_thread: invalid message", 0);
 8019042:	4b09      	ldr	r3, [pc, #36]	@ (8019068 <tcpip_thread+0x5c>)
 8019044:	2291      	movs	r2, #145	@ 0x91
 8019046:	4909      	ldr	r1, [pc, #36]	@ (801906c <tcpip_thread+0x60>)
 8019048:	4809      	ldr	r0, [pc, #36]	@ (8019070 <tcpip_thread+0x64>)
 801904a:	f011 f8b7 	bl	802a1bc <iprintf>
      continue;
 801904e:	e003      	b.n	8019058 <tcpip_thread+0x4c>
    }
    tcpip_thread_handle_msg(msg);
 8019050:	68fb      	ldr	r3, [r7, #12]
 8019052:	4618      	mov	r0, r3
 8019054:	f000 f80e 	bl	8019074 <tcpip_thread_handle_msg>
    TCPIP_MBOX_FETCH(&tcpip_mbox, (void **)&msg);
 8019058:	e7ea      	b.n	8019030 <tcpip_thread+0x24>
 801905a:	bf00      	nop
 801905c:	240243f8 	.word	0x240243f8
 8019060:	240243fc 	.word	0x240243fc
 8019064:	24024400 	.word	0x24024400
 8019068:	0802e230 	.word	0x0802e230
 801906c:	0802e260 	.word	0x0802e260
 8019070:	0802e280 	.word	0x0802e280

08019074 <tcpip_thread_handle_msg>:
/* Handle a single tcpip_msg
 * This is in its own function for access by tests only.
 */
static void
tcpip_thread_handle_msg(struct tcpip_msg *msg)
{
 8019074:	b580      	push	{r7, lr}
 8019076:	b082      	sub	sp, #8
 8019078:	af00      	add	r7, sp, #0
 801907a:	6078      	str	r0, [r7, #4]
  switch (msg->type) {
 801907c:	687b      	ldr	r3, [r7, #4]
 801907e:	781b      	ldrb	r3, [r3, #0]
 8019080:	2b02      	cmp	r3, #2
 8019082:	d026      	beq.n	80190d2 <tcpip_thread_handle_msg+0x5e>
 8019084:	2b02      	cmp	r3, #2
 8019086:	dc2b      	bgt.n	80190e0 <tcpip_thread_handle_msg+0x6c>
 8019088:	2b00      	cmp	r3, #0
 801908a:	d002      	beq.n	8019092 <tcpip_thread_handle_msg+0x1e>
 801908c:	2b01      	cmp	r3, #1
 801908e:	d015      	beq.n	80190bc <tcpip_thread_handle_msg+0x48>
 8019090:	e026      	b.n	80190e0 <tcpip_thread_handle_msg+0x6c>
#endif /* !LWIP_TCPIP_CORE_LOCKING */

#if !LWIP_TCPIP_CORE_LOCKING_INPUT
    case TCPIP_MSG_INPKT:
      LWIP_DEBUGF(TCPIP_DEBUG, ("tcpip_thread: PACKET %p\n", (void *)msg));
      if (msg->msg.inp.input_fn(msg->msg.inp.p, msg->msg.inp.netif) != ERR_OK) {
 8019092:	687b      	ldr	r3, [r7, #4]
 8019094:	68db      	ldr	r3, [r3, #12]
 8019096:	687a      	ldr	r2, [r7, #4]
 8019098:	6850      	ldr	r0, [r2, #4]
 801909a:	687a      	ldr	r2, [r7, #4]
 801909c:	6892      	ldr	r2, [r2, #8]
 801909e:	4611      	mov	r1, r2
 80190a0:	4798      	blx	r3
 80190a2:	4603      	mov	r3, r0
 80190a4:	2b00      	cmp	r3, #0
 80190a6:	d004      	beq.n	80190b2 <tcpip_thread_handle_msg+0x3e>
        pbuf_free(msg->msg.inp.p);
 80190a8:	687b      	ldr	r3, [r7, #4]
 80190aa:	685b      	ldr	r3, [r3, #4]
 80190ac:	4618      	mov	r0, r3
 80190ae:	f001 fe0d 	bl	801accc <pbuf_free>
      }
      memp_free(MEMP_TCPIP_MSG_INPKT, msg);
 80190b2:	6879      	ldr	r1, [r7, #4]
 80190b4:	2009      	movs	r0, #9
 80190b6:	f000 ff1b 	bl	8019ef0 <memp_free>
      break;
 80190ba:	e018      	b.n	80190ee <tcpip_thread_handle_msg+0x7a>
      break;
#endif /* LWIP_TCPIP_TIMEOUT && LWIP_TIMERS */

    case TCPIP_MSG_CALLBACK:
      LWIP_DEBUGF(TCPIP_DEBUG, ("tcpip_thread: CALLBACK %p\n", (void *)msg));
      msg->msg.cb.function(msg->msg.cb.ctx);
 80190bc:	687b      	ldr	r3, [r7, #4]
 80190be:	685b      	ldr	r3, [r3, #4]
 80190c0:	687a      	ldr	r2, [r7, #4]
 80190c2:	6892      	ldr	r2, [r2, #8]
 80190c4:	4610      	mov	r0, r2
 80190c6:	4798      	blx	r3
      memp_free(MEMP_TCPIP_MSG_API, msg);
 80190c8:	6879      	ldr	r1, [r7, #4]
 80190ca:	2008      	movs	r0, #8
 80190cc:	f000 ff10 	bl	8019ef0 <memp_free>
      break;
 80190d0:	e00d      	b.n	80190ee <tcpip_thread_handle_msg+0x7a>

    case TCPIP_MSG_CALLBACK_STATIC:
      LWIP_DEBUGF(TCPIP_DEBUG, ("tcpip_thread: CALLBACK_STATIC %p\n", (void *)msg));
      msg->msg.cb.function(msg->msg.cb.ctx);
 80190d2:	687b      	ldr	r3, [r7, #4]
 80190d4:	685b      	ldr	r3, [r3, #4]
 80190d6:	687a      	ldr	r2, [r7, #4]
 80190d8:	6892      	ldr	r2, [r2, #8]
 80190da:	4610      	mov	r0, r2
 80190dc:	4798      	blx	r3
      break;
 80190de:	e006      	b.n	80190ee <tcpip_thread_handle_msg+0x7a>

    default:
      LWIP_DEBUGF(TCPIP_DEBUG, ("tcpip_thread: invalid message: %d\n", msg->type));
      LWIP_ASSERT("tcpip_thread: invalid message", 0);
 80190e0:	4b05      	ldr	r3, [pc, #20]	@ (80190f8 <tcpip_thread_handle_msg+0x84>)
 80190e2:	22cf      	movs	r2, #207	@ 0xcf
 80190e4:	4905      	ldr	r1, [pc, #20]	@ (80190fc <tcpip_thread_handle_msg+0x88>)
 80190e6:	4806      	ldr	r0, [pc, #24]	@ (8019100 <tcpip_thread_handle_msg+0x8c>)
 80190e8:	f011 f868 	bl	802a1bc <iprintf>
      break;
 80190ec:	bf00      	nop
  }
}
 80190ee:	bf00      	nop
 80190f0:	3708      	adds	r7, #8
 80190f2:	46bd      	mov	sp, r7
 80190f4:	bd80      	pop	{r7, pc}
 80190f6:	bf00      	nop
 80190f8:	0802e230 	.word	0x0802e230
 80190fc:	0802e260 	.word	0x0802e260
 8019100:	0802e280 	.word	0x0802e280

08019104 <tcpip_inpkt>:
 * @param inp the network interface on which the packet was received
 * @param input_fn input function to call
 */
err_t
tcpip_inpkt(struct pbuf *p, struct netif *inp, netif_input_fn input_fn)
{
 8019104:	b580      	push	{r7, lr}
 8019106:	b086      	sub	sp, #24
 8019108:	af00      	add	r7, sp, #0
 801910a:	60f8      	str	r0, [r7, #12]
 801910c:	60b9      	str	r1, [r7, #8]
 801910e:	607a      	str	r2, [r7, #4]
  UNLOCK_TCPIP_CORE();
  return ret;
#else /* LWIP_TCPIP_CORE_LOCKING_INPUT */
  struct tcpip_msg *msg;

  LWIP_ASSERT("Invalid mbox", sys_mbox_valid_val(tcpip_mbox));
 8019110:	481a      	ldr	r0, [pc, #104]	@ (801917c <tcpip_inpkt+0x78>)
 8019112:	f00d fcb3 	bl	8026a7c <sys_mbox_valid>
 8019116:	4603      	mov	r3, r0
 8019118:	2b00      	cmp	r3, #0
 801911a:	d105      	bne.n	8019128 <tcpip_inpkt+0x24>
 801911c:	4b18      	ldr	r3, [pc, #96]	@ (8019180 <tcpip_inpkt+0x7c>)
 801911e:	22fc      	movs	r2, #252	@ 0xfc
 8019120:	4918      	ldr	r1, [pc, #96]	@ (8019184 <tcpip_inpkt+0x80>)
 8019122:	4819      	ldr	r0, [pc, #100]	@ (8019188 <tcpip_inpkt+0x84>)
 8019124:	f011 f84a 	bl	802a1bc <iprintf>

  msg = (struct tcpip_msg *)memp_malloc(MEMP_TCPIP_MSG_INPKT);
 8019128:	2009      	movs	r0, #9
 801912a:	f000 fe6b 	bl	8019e04 <memp_malloc>
 801912e:	6178      	str	r0, [r7, #20]
  if (msg == NULL) {
 8019130:	697b      	ldr	r3, [r7, #20]
 8019132:	2b00      	cmp	r3, #0
 8019134:	d102      	bne.n	801913c <tcpip_inpkt+0x38>
    return ERR_MEM;
 8019136:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 801913a:	e01a      	b.n	8019172 <tcpip_inpkt+0x6e>
  }

  msg->type = TCPIP_MSG_INPKT;
 801913c:	697b      	ldr	r3, [r7, #20]
 801913e:	2200      	movs	r2, #0
 8019140:	701a      	strb	r2, [r3, #0]
  msg->msg.inp.p = p;
 8019142:	697b      	ldr	r3, [r7, #20]
 8019144:	68fa      	ldr	r2, [r7, #12]
 8019146:	605a      	str	r2, [r3, #4]
  msg->msg.inp.netif = inp;
 8019148:	697b      	ldr	r3, [r7, #20]
 801914a:	68ba      	ldr	r2, [r7, #8]
 801914c:	609a      	str	r2, [r3, #8]
  msg->msg.inp.input_fn = input_fn;
 801914e:	697b      	ldr	r3, [r7, #20]
 8019150:	687a      	ldr	r2, [r7, #4]
 8019152:	60da      	str	r2, [r3, #12]
  if (sys_mbox_trypost(&tcpip_mbox, msg) != ERR_OK) {
 8019154:	6979      	ldr	r1, [r7, #20]
 8019156:	4809      	ldr	r0, [pc, #36]	@ (801917c <tcpip_inpkt+0x78>)
 8019158:	f00d fc2e 	bl	80269b8 <sys_mbox_trypost>
 801915c:	4603      	mov	r3, r0
 801915e:	2b00      	cmp	r3, #0
 8019160:	d006      	beq.n	8019170 <tcpip_inpkt+0x6c>
    memp_free(MEMP_TCPIP_MSG_INPKT, msg);
 8019162:	6979      	ldr	r1, [r7, #20]
 8019164:	2009      	movs	r0, #9
 8019166:	f000 fec3 	bl	8019ef0 <memp_free>
    return ERR_MEM;
 801916a:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 801916e:	e000      	b.n	8019172 <tcpip_inpkt+0x6e>
  }
  return ERR_OK;
 8019170:	2300      	movs	r3, #0
#endif /* LWIP_TCPIP_CORE_LOCKING_INPUT */
}
 8019172:	4618      	mov	r0, r3
 8019174:	3718      	adds	r7, #24
 8019176:	46bd      	mov	sp, r7
 8019178:	bd80      	pop	{r7, pc}
 801917a:	bf00      	nop
 801917c:	24024400 	.word	0x24024400
 8019180:	0802e230 	.word	0x0802e230
 8019184:	0802e2a8 	.word	0x0802e2a8
 8019188:	0802e280 	.word	0x0802e280

0801918c <tcpip_input>:
 *          NETIF_FLAG_ETHERNET flags)
 * @param inp the network interface on which the packet was received
 */
err_t
tcpip_input(struct pbuf *p, struct netif *inp)
{
 801918c:	b580      	push	{r7, lr}
 801918e:	b082      	sub	sp, #8
 8019190:	af00      	add	r7, sp, #0
 8019192:	6078      	str	r0, [r7, #4]
 8019194:	6039      	str	r1, [r7, #0]
#if LWIP_ETHERNET
  if (inp->flags & (NETIF_FLAG_ETHARP | NETIF_FLAG_ETHERNET)) {
 8019196:	683b      	ldr	r3, [r7, #0]
 8019198:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 801919c:	f003 0318 	and.w	r3, r3, #24
 80191a0:	2b00      	cmp	r3, #0
 80191a2:	d006      	beq.n	80191b2 <tcpip_input+0x26>
    return tcpip_inpkt(p, inp, ethernet_input);
 80191a4:	4a08      	ldr	r2, [pc, #32]	@ (80191c8 <tcpip_input+0x3c>)
 80191a6:	6839      	ldr	r1, [r7, #0]
 80191a8:	6878      	ldr	r0, [r7, #4]
 80191aa:	f7ff ffab 	bl	8019104 <tcpip_inpkt>
 80191ae:	4603      	mov	r3, r0
 80191b0:	e005      	b.n	80191be <tcpip_input+0x32>
  } else
#endif /* LWIP_ETHERNET */
    return tcpip_inpkt(p, inp, ip_input);
 80191b2:	4a06      	ldr	r2, [pc, #24]	@ (80191cc <tcpip_input+0x40>)
 80191b4:	6839      	ldr	r1, [r7, #0]
 80191b6:	6878      	ldr	r0, [r7, #4]
 80191b8:	f7ff ffa4 	bl	8019104 <tcpip_inpkt>
 80191bc:	4603      	mov	r3, r0
}
 80191be:	4618      	mov	r0, r3
 80191c0:	3708      	adds	r7, #8
 80191c2:	46bd      	mov	sp, r7
 80191c4:	bd80      	pop	{r7, pc}
 80191c6:	bf00      	nop
 80191c8:	080267ad 	.word	0x080267ad
 80191cc:	080252d5 	.word	0x080252d5

080191d0 <tcpip_try_callback>:
 *
 * @see tcpip_callback
 */
err_t
tcpip_try_callback(tcpip_callback_fn function, void *ctx)
{
 80191d0:	b580      	push	{r7, lr}
 80191d2:	b084      	sub	sp, #16
 80191d4:	af00      	add	r7, sp, #0
 80191d6:	6078      	str	r0, [r7, #4]
 80191d8:	6039      	str	r1, [r7, #0]
  struct tcpip_msg *msg;

  LWIP_ASSERT("Invalid mbox", sys_mbox_valid_val(tcpip_mbox));
 80191da:	4819      	ldr	r0, [pc, #100]	@ (8019240 <tcpip_try_callback+0x70>)
 80191dc:	f00d fc4e 	bl	8026a7c <sys_mbox_valid>
 80191e0:	4603      	mov	r3, r0
 80191e2:	2b00      	cmp	r3, #0
 80191e4:	d106      	bne.n	80191f4 <tcpip_try_callback+0x24>
 80191e6:	4b17      	ldr	r3, [pc, #92]	@ (8019244 <tcpip_try_callback+0x74>)
 80191e8:	f240 125d 	movw	r2, #349	@ 0x15d
 80191ec:	4916      	ldr	r1, [pc, #88]	@ (8019248 <tcpip_try_callback+0x78>)
 80191ee:	4817      	ldr	r0, [pc, #92]	@ (801924c <tcpip_try_callback+0x7c>)
 80191f0:	f010 ffe4 	bl	802a1bc <iprintf>

  msg = (struct tcpip_msg *)memp_malloc(MEMP_TCPIP_MSG_API);
 80191f4:	2008      	movs	r0, #8
 80191f6:	f000 fe05 	bl	8019e04 <memp_malloc>
 80191fa:	60f8      	str	r0, [r7, #12]
  if (msg == NULL) {
 80191fc:	68fb      	ldr	r3, [r7, #12]
 80191fe:	2b00      	cmp	r3, #0
 8019200:	d102      	bne.n	8019208 <tcpip_try_callback+0x38>
    return ERR_MEM;
 8019202:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8019206:	e017      	b.n	8019238 <tcpip_try_callback+0x68>
  }

  msg->type = TCPIP_MSG_CALLBACK;
 8019208:	68fb      	ldr	r3, [r7, #12]
 801920a:	2201      	movs	r2, #1
 801920c:	701a      	strb	r2, [r3, #0]
  msg->msg.cb.function = function;
 801920e:	68fb      	ldr	r3, [r7, #12]
 8019210:	687a      	ldr	r2, [r7, #4]
 8019212:	605a      	str	r2, [r3, #4]
  msg->msg.cb.ctx = ctx;
 8019214:	68fb      	ldr	r3, [r7, #12]
 8019216:	683a      	ldr	r2, [r7, #0]
 8019218:	609a      	str	r2, [r3, #8]

  if (sys_mbox_trypost(&tcpip_mbox, msg) != ERR_OK) {
 801921a:	68f9      	ldr	r1, [r7, #12]
 801921c:	4808      	ldr	r0, [pc, #32]	@ (8019240 <tcpip_try_callback+0x70>)
 801921e:	f00d fbcb 	bl	80269b8 <sys_mbox_trypost>
 8019222:	4603      	mov	r3, r0
 8019224:	2b00      	cmp	r3, #0
 8019226:	d006      	beq.n	8019236 <tcpip_try_callback+0x66>
    memp_free(MEMP_TCPIP_MSG_API, msg);
 8019228:	68f9      	ldr	r1, [r7, #12]
 801922a:	2008      	movs	r0, #8
 801922c:	f000 fe60 	bl	8019ef0 <memp_free>
    return ERR_MEM;
 8019230:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8019234:	e000      	b.n	8019238 <tcpip_try_callback+0x68>
  }
  return ERR_OK;
 8019236:	2300      	movs	r3, #0
}
 8019238:	4618      	mov	r0, r3
 801923a:	3710      	adds	r7, #16
 801923c:	46bd      	mov	sp, r7
 801923e:	bd80      	pop	{r7, pc}
 8019240:	24024400 	.word	0x24024400
 8019244:	0802e230 	.word	0x0802e230
 8019248:	0802e2a8 	.word	0x0802e2a8
 801924c:	0802e280 	.word	0x0802e280

08019250 <tcpip_send_msg_wait_sem>:
 * @param sem semaphore to wait on
 * @return ERR_OK if the function was called, another err_t if not
 */
err_t
tcpip_send_msg_wait_sem(tcpip_callback_fn fn, void *apimsg, sys_sem_t *sem)
{
 8019250:	b580      	push	{r7, lr}
 8019252:	b084      	sub	sp, #16
 8019254:	af00      	add	r7, sp, #0
 8019256:	60f8      	str	r0, [r7, #12]
 8019258:	60b9      	str	r1, [r7, #8]
 801925a:	607a      	str	r2, [r7, #4]
#if LWIP_TCPIP_CORE_LOCKING
  LWIP_UNUSED_ARG(sem);
  LOCK_TCPIP_CORE();
 801925c:	f7f7 fbf0 	bl	8010a40 <sys_lock_tcpip_core>
  fn(apimsg);
 8019260:	68fb      	ldr	r3, [r7, #12]
 8019262:	68b8      	ldr	r0, [r7, #8]
 8019264:	4798      	blx	r3
  UNLOCK_TCPIP_CORE();
 8019266:	f7f7 fbfb 	bl	8010a60 <sys_unlock_tcpip_core>
  return ERR_OK;
 801926a:	2300      	movs	r3, #0
  sys_mbox_post(&tcpip_mbox, &TCPIP_MSG_VAR_REF(msg));
  sys_arch_sem_wait(sem, 0);
  TCPIP_MSG_VAR_FREE(msg);
  return ERR_OK;
#endif /* LWIP_TCPIP_CORE_LOCKING */
}
 801926c:	4618      	mov	r0, r3
 801926e:	3710      	adds	r7, #16
 8019270:	46bd      	mov	sp, r7
 8019272:	bd80      	pop	{r7, pc}

08019274 <tcpip_init>:
 * @param initfunc a function to call when tcpip_thread is running and finished initializing
 * @param arg argument to pass to initfunc
 */
void
tcpip_init(tcpip_init_done_fn initfunc, void *arg)
{
 8019274:	b580      	push	{r7, lr}
 8019276:	b084      	sub	sp, #16
 8019278:	af02      	add	r7, sp, #8
 801927a:	6078      	str	r0, [r7, #4]
 801927c:	6039      	str	r1, [r7, #0]
  lwip_init();
 801927e:	f000 f92d 	bl	80194dc <lwip_init>

  tcpip_init_done = initfunc;
 8019282:	4a17      	ldr	r2, [pc, #92]	@ (80192e0 <tcpip_init+0x6c>)
 8019284:	687b      	ldr	r3, [r7, #4]
 8019286:	6013      	str	r3, [r2, #0]
  tcpip_init_done_arg = arg;
 8019288:	4a16      	ldr	r2, [pc, #88]	@ (80192e4 <tcpip_init+0x70>)
 801928a:	683b      	ldr	r3, [r7, #0]
 801928c:	6013      	str	r3, [r2, #0]
  if (sys_mbox_new(&tcpip_mbox, TCPIP_MBOX_SIZE) != ERR_OK) {
 801928e:	2106      	movs	r1, #6
 8019290:	4815      	ldr	r0, [pc, #84]	@ (80192e8 <tcpip_init+0x74>)
 8019292:	f00d fb65 	bl	8026960 <sys_mbox_new>
 8019296:	4603      	mov	r3, r0
 8019298:	2b00      	cmp	r3, #0
 801929a:	d006      	beq.n	80192aa <tcpip_init+0x36>
    LWIP_ASSERT("failed to create tcpip_thread mbox", 0);
 801929c:	4b13      	ldr	r3, [pc, #76]	@ (80192ec <tcpip_init+0x78>)
 801929e:	f240 2261 	movw	r2, #609	@ 0x261
 80192a2:	4913      	ldr	r1, [pc, #76]	@ (80192f0 <tcpip_init+0x7c>)
 80192a4:	4813      	ldr	r0, [pc, #76]	@ (80192f4 <tcpip_init+0x80>)
 80192a6:	f010 ff89 	bl	802a1bc <iprintf>
  }
#if LWIP_TCPIP_CORE_LOCKING
  if (sys_mutex_new(&lock_tcpip_core) != ERR_OK) {
 80192aa:	4813      	ldr	r0, [pc, #76]	@ (80192f8 <tcpip_init+0x84>)
 80192ac:	f00d fc9e 	bl	8026bec <sys_mutex_new>
 80192b0:	4603      	mov	r3, r0
 80192b2:	2b00      	cmp	r3, #0
 80192b4:	d006      	beq.n	80192c4 <tcpip_init+0x50>
    LWIP_ASSERT("failed to create lock_tcpip_core", 0);
 80192b6:	4b0d      	ldr	r3, [pc, #52]	@ (80192ec <tcpip_init+0x78>)
 80192b8:	f240 2265 	movw	r2, #613	@ 0x265
 80192bc:	490f      	ldr	r1, [pc, #60]	@ (80192fc <tcpip_init+0x88>)
 80192be:	480d      	ldr	r0, [pc, #52]	@ (80192f4 <tcpip_init+0x80>)
 80192c0:	f010 ff7c 	bl	802a1bc <iprintf>
  }
#endif /* LWIP_TCPIP_CORE_LOCKING */

  sys_thread_new(TCPIP_THREAD_NAME, tcpip_thread, NULL, TCPIP_THREAD_STACKSIZE, TCPIP_THREAD_PRIO);
 80192c4:	2330      	movs	r3, #48	@ 0x30
 80192c6:	9300      	str	r3, [sp, #0]
 80192c8:	f44f 5380 	mov.w	r3, #4096	@ 0x1000
 80192cc:	2200      	movs	r2, #0
 80192ce:	490c      	ldr	r1, [pc, #48]	@ (8019300 <tcpip_init+0x8c>)
 80192d0:	480c      	ldr	r0, [pc, #48]	@ (8019304 <tcpip_init+0x90>)
 80192d2:	f00d fcbd 	bl	8026c50 <sys_thread_new>
}
 80192d6:	bf00      	nop
 80192d8:	3708      	adds	r7, #8
 80192da:	46bd      	mov	sp, r7
 80192dc:	bd80      	pop	{r7, pc}
 80192de:	bf00      	nop
 80192e0:	240243f8 	.word	0x240243f8
 80192e4:	240243fc 	.word	0x240243fc
 80192e8:	24024400 	.word	0x24024400
 80192ec:	0802e230 	.word	0x0802e230
 80192f0:	0802e2b8 	.word	0x0802e2b8
 80192f4:	0802e280 	.word	0x0802e280
 80192f8:	24024404 	.word	0x24024404
 80192fc:	0802e2dc 	.word	0x0802e2dc
 8019300:	0801900d 	.word	0x0801900d
 8019304:	0802e300 	.word	0x0802e300

08019308 <lwip_htons>:
 * @param n u16_t in host byte order
 * @return n in network byte order
 */
u16_t
lwip_htons(u16_t n)
{
 8019308:	b480      	push	{r7}
 801930a:	b083      	sub	sp, #12
 801930c:	af00      	add	r7, sp, #0
 801930e:	4603      	mov	r3, r0
 8019310:	80fb      	strh	r3, [r7, #6]
  return PP_HTONS(n);
 8019312:	88fb      	ldrh	r3, [r7, #6]
 8019314:	021b      	lsls	r3, r3, #8
 8019316:	b21a      	sxth	r2, r3
 8019318:	88fb      	ldrh	r3, [r7, #6]
 801931a:	0a1b      	lsrs	r3, r3, #8
 801931c:	b29b      	uxth	r3, r3
 801931e:	b21b      	sxth	r3, r3
 8019320:	4313      	orrs	r3, r2
 8019322:	b21b      	sxth	r3, r3
 8019324:	b29b      	uxth	r3, r3
}
 8019326:	4618      	mov	r0, r3
 8019328:	370c      	adds	r7, #12
 801932a:	46bd      	mov	sp, r7
 801932c:	f85d 7b04 	ldr.w	r7, [sp], #4
 8019330:	4770      	bx	lr

08019332 <lwip_htonl>:
 * @param n u32_t in host byte order
 * @return n in network byte order
 */
u32_t
lwip_htonl(u32_t n)
{
 8019332:	b480      	push	{r7}
 8019334:	b083      	sub	sp, #12
 8019336:	af00      	add	r7, sp, #0
 8019338:	6078      	str	r0, [r7, #4]
  return PP_HTONL(n);
 801933a:	687b      	ldr	r3, [r7, #4]
 801933c:	061a      	lsls	r2, r3, #24
 801933e:	687b      	ldr	r3, [r7, #4]
 8019340:	021b      	lsls	r3, r3, #8
 8019342:	f403 037f 	and.w	r3, r3, #16711680	@ 0xff0000
 8019346:	431a      	orrs	r2, r3
 8019348:	687b      	ldr	r3, [r7, #4]
 801934a:	0a1b      	lsrs	r3, r3, #8
 801934c:	f403 437f 	and.w	r3, r3, #65280	@ 0xff00
 8019350:	431a      	orrs	r2, r3
 8019352:	687b      	ldr	r3, [r7, #4]
 8019354:	0e1b      	lsrs	r3, r3, #24
 8019356:	4313      	orrs	r3, r2
}
 8019358:	4618      	mov	r0, r3
 801935a:	370c      	adds	r7, #12
 801935c:	46bd      	mov	sp, r7
 801935e:	f85d 7b04 	ldr.w	r7, [sp], #4
 8019362:	4770      	bx	lr

08019364 <lwip_standard_chksum>:
 * @param len length of data to be summed
 * @return host order (!) lwip checksum (non-inverted Internet sum)
 */
u16_t
lwip_standard_chksum(const void *dataptr, int len)
{
 8019364:	b480      	push	{r7}
 8019366:	b089      	sub	sp, #36	@ 0x24
 8019368:	af00      	add	r7, sp, #0
 801936a:	6078      	str	r0, [r7, #4]
 801936c:	6039      	str	r1, [r7, #0]
  const u8_t *pb = (const u8_t *)dataptr;
 801936e:	687b      	ldr	r3, [r7, #4]
 8019370:	61fb      	str	r3, [r7, #28]
  const u16_t *ps;
  u16_t t = 0;
 8019372:	2300      	movs	r3, #0
 8019374:	81fb      	strh	r3, [r7, #14]
  u32_t sum = 0;
 8019376:	2300      	movs	r3, #0
 8019378:	617b      	str	r3, [r7, #20]
  int odd = ((mem_ptr_t)pb & 1);
 801937a:	69fb      	ldr	r3, [r7, #28]
 801937c:	f003 0301 	and.w	r3, r3, #1
 8019380:	613b      	str	r3, [r7, #16]

  /* Get aligned to u16_t */
  if (odd && len > 0) {
 8019382:	693b      	ldr	r3, [r7, #16]
 8019384:	2b00      	cmp	r3, #0
 8019386:	d00d      	beq.n	80193a4 <lwip_standard_chksum+0x40>
 8019388:	683b      	ldr	r3, [r7, #0]
 801938a:	2b00      	cmp	r3, #0
 801938c:	dd0a      	ble.n	80193a4 <lwip_standard_chksum+0x40>
    ((u8_t *)&t)[1] = *pb++;
 801938e:	69fa      	ldr	r2, [r7, #28]
 8019390:	1c53      	adds	r3, r2, #1
 8019392:	61fb      	str	r3, [r7, #28]
 8019394:	f107 030e 	add.w	r3, r7, #14
 8019398:	3301      	adds	r3, #1
 801939a:	7812      	ldrb	r2, [r2, #0]
 801939c:	701a      	strb	r2, [r3, #0]
    len--;
 801939e:	683b      	ldr	r3, [r7, #0]
 80193a0:	3b01      	subs	r3, #1
 80193a2:	603b      	str	r3, [r7, #0]
  }

  /* Add the bulk of the data */
  ps = (const u16_t *)(const void *)pb;
 80193a4:	69fb      	ldr	r3, [r7, #28]
 80193a6:	61bb      	str	r3, [r7, #24]
  while (len > 1) {
 80193a8:	e00a      	b.n	80193c0 <lwip_standard_chksum+0x5c>
    sum += *ps++;
 80193aa:	69bb      	ldr	r3, [r7, #24]
 80193ac:	1c9a      	adds	r2, r3, #2
 80193ae:	61ba      	str	r2, [r7, #24]
 80193b0:	881b      	ldrh	r3, [r3, #0]
 80193b2:	461a      	mov	r2, r3
 80193b4:	697b      	ldr	r3, [r7, #20]
 80193b6:	4413      	add	r3, r2
 80193b8:	617b      	str	r3, [r7, #20]
    len -= 2;
 80193ba:	683b      	ldr	r3, [r7, #0]
 80193bc:	3b02      	subs	r3, #2
 80193be:	603b      	str	r3, [r7, #0]
  while (len > 1) {
 80193c0:	683b      	ldr	r3, [r7, #0]
 80193c2:	2b01      	cmp	r3, #1
 80193c4:	dcf1      	bgt.n	80193aa <lwip_standard_chksum+0x46>
  }

  /* Consume left-over byte, if any */
  if (len > 0) {
 80193c6:	683b      	ldr	r3, [r7, #0]
 80193c8:	2b00      	cmp	r3, #0
 80193ca:	dd04      	ble.n	80193d6 <lwip_standard_chksum+0x72>
    ((u8_t *)&t)[0] = *(const u8_t *)ps;
 80193cc:	f107 030e 	add.w	r3, r7, #14
 80193d0:	69ba      	ldr	r2, [r7, #24]
 80193d2:	7812      	ldrb	r2, [r2, #0]
 80193d4:	701a      	strb	r2, [r3, #0]
  }

  /* Add end bytes */
  sum += t;
 80193d6:	89fb      	ldrh	r3, [r7, #14]
 80193d8:	461a      	mov	r2, r3
 80193da:	697b      	ldr	r3, [r7, #20]
 80193dc:	4413      	add	r3, r2
 80193de:	617b      	str	r3, [r7, #20]

  /* Fold 32-bit sum to 16 bits
     calling this twice is probably faster than if statements... */
  sum = FOLD_U32T(sum);
 80193e0:	697b      	ldr	r3, [r7, #20]
 80193e2:	0c1a      	lsrs	r2, r3, #16
 80193e4:	697b      	ldr	r3, [r7, #20]
 80193e6:	b29b      	uxth	r3, r3
 80193e8:	4413      	add	r3, r2
 80193ea:	617b      	str	r3, [r7, #20]
  sum = FOLD_U32T(sum);
 80193ec:	697b      	ldr	r3, [r7, #20]
 80193ee:	0c1a      	lsrs	r2, r3, #16
 80193f0:	697b      	ldr	r3, [r7, #20]
 80193f2:	b29b      	uxth	r3, r3
 80193f4:	4413      	add	r3, r2
 80193f6:	617b      	str	r3, [r7, #20]

  /* Swap if alignment was odd */
  if (odd) {
 80193f8:	693b      	ldr	r3, [r7, #16]
 80193fa:	2b00      	cmp	r3, #0
 80193fc:	d007      	beq.n	801940e <lwip_standard_chksum+0xaa>
    sum = SWAP_BYTES_IN_WORD(sum);
 80193fe:	697b      	ldr	r3, [r7, #20]
 8019400:	021b      	lsls	r3, r3, #8
 8019402:	b29a      	uxth	r2, r3
 8019404:	697b      	ldr	r3, [r7, #20]
 8019406:	0a1b      	lsrs	r3, r3, #8
 8019408:	b2db      	uxtb	r3, r3
 801940a:	4313      	orrs	r3, r2
 801940c:	617b      	str	r3, [r7, #20]
  }

  return (u16_t)sum;
 801940e:	697b      	ldr	r3, [r7, #20]
 8019410:	b29b      	uxth	r3, r3
}
 8019412:	4618      	mov	r0, r3
 8019414:	3724      	adds	r7, #36	@ 0x24
 8019416:	46bd      	mov	sp, r7
 8019418:	f85d 7b04 	ldr.w	r7, [sp], #4
 801941c:	4770      	bx	lr

0801941e <inet_chksum>:
 * @return checksum (as u16_t) to be saved directly in the protocol header
 */

u16_t
inet_chksum(const void *dataptr, u16_t len)
{
 801941e:	b580      	push	{r7, lr}
 8019420:	b082      	sub	sp, #8
 8019422:	af00      	add	r7, sp, #0
 8019424:	6078      	str	r0, [r7, #4]
 8019426:	460b      	mov	r3, r1
 8019428:	807b      	strh	r3, [r7, #2]
  return (u16_t)~(unsigned int)LWIP_CHKSUM(dataptr, len);
 801942a:	887b      	ldrh	r3, [r7, #2]
 801942c:	4619      	mov	r1, r3
 801942e:	6878      	ldr	r0, [r7, #4]
 8019430:	f7ff ff98 	bl	8019364 <lwip_standard_chksum>
 8019434:	4603      	mov	r3, r0
 8019436:	43db      	mvns	r3, r3
 8019438:	b29b      	uxth	r3, r3
}
 801943a:	4618      	mov	r0, r3
 801943c:	3708      	adds	r7, #8
 801943e:	46bd      	mov	sp, r7
 8019440:	bd80      	pop	{r7, pc}

08019442 <inet_chksum_pbuf>:
 * @param p pbuf chain over that the checksum should be calculated
 * @return checksum (as u16_t) to be saved directly in the protocol header
 */
u16_t
inet_chksum_pbuf(struct pbuf *p)
{
 8019442:	b580      	push	{r7, lr}
 8019444:	b086      	sub	sp, #24
 8019446:	af00      	add	r7, sp, #0
 8019448:	6078      	str	r0, [r7, #4]
  u32_t acc;
  struct pbuf *q;
  int swapped = 0;
 801944a:	2300      	movs	r3, #0
 801944c:	60fb      	str	r3, [r7, #12]

  acc = 0;
 801944e:	2300      	movs	r3, #0
 8019450:	617b      	str	r3, [r7, #20]
  for (q = p; q != NULL; q = q->next) {
 8019452:	687b      	ldr	r3, [r7, #4]
 8019454:	613b      	str	r3, [r7, #16]
 8019456:	e02b      	b.n	80194b0 <inet_chksum_pbuf+0x6e>
    acc += LWIP_CHKSUM(q->payload, q->len);
 8019458:	693b      	ldr	r3, [r7, #16]
 801945a:	685a      	ldr	r2, [r3, #4]
 801945c:	693b      	ldr	r3, [r7, #16]
 801945e:	895b      	ldrh	r3, [r3, #10]
 8019460:	4619      	mov	r1, r3
 8019462:	4610      	mov	r0, r2
 8019464:	f7ff ff7e 	bl	8019364 <lwip_standard_chksum>
 8019468:	4603      	mov	r3, r0
 801946a:	461a      	mov	r2, r3
 801946c:	697b      	ldr	r3, [r7, #20]
 801946e:	4413      	add	r3, r2
 8019470:	617b      	str	r3, [r7, #20]
    acc = FOLD_U32T(acc);
 8019472:	697b      	ldr	r3, [r7, #20]
 8019474:	0c1a      	lsrs	r2, r3, #16
 8019476:	697b      	ldr	r3, [r7, #20]
 8019478:	b29b      	uxth	r3, r3
 801947a:	4413      	add	r3, r2
 801947c:	617b      	str	r3, [r7, #20]
    if (q->len % 2 != 0) {
 801947e:	693b      	ldr	r3, [r7, #16]
 8019480:	895b      	ldrh	r3, [r3, #10]
 8019482:	f003 0301 	and.w	r3, r3, #1
 8019486:	b29b      	uxth	r3, r3
 8019488:	2b00      	cmp	r3, #0
 801948a:	d00e      	beq.n	80194aa <inet_chksum_pbuf+0x68>
      swapped = !swapped;
 801948c:	68fb      	ldr	r3, [r7, #12]
 801948e:	2b00      	cmp	r3, #0
 8019490:	bf0c      	ite	eq
 8019492:	2301      	moveq	r3, #1
 8019494:	2300      	movne	r3, #0
 8019496:	b2db      	uxtb	r3, r3
 8019498:	60fb      	str	r3, [r7, #12]
      acc = SWAP_BYTES_IN_WORD(acc);
 801949a:	697b      	ldr	r3, [r7, #20]
 801949c:	021b      	lsls	r3, r3, #8
 801949e:	b29a      	uxth	r2, r3
 80194a0:	697b      	ldr	r3, [r7, #20]
 80194a2:	0a1b      	lsrs	r3, r3, #8
 80194a4:	b2db      	uxtb	r3, r3
 80194a6:	4313      	orrs	r3, r2
 80194a8:	617b      	str	r3, [r7, #20]
  for (q = p; q != NULL; q = q->next) {
 80194aa:	693b      	ldr	r3, [r7, #16]
 80194ac:	681b      	ldr	r3, [r3, #0]
 80194ae:	613b      	str	r3, [r7, #16]
 80194b0:	693b      	ldr	r3, [r7, #16]
 80194b2:	2b00      	cmp	r3, #0
 80194b4:	d1d0      	bne.n	8019458 <inet_chksum_pbuf+0x16>
    }
  }

  if (swapped) {
 80194b6:	68fb      	ldr	r3, [r7, #12]
 80194b8:	2b00      	cmp	r3, #0
 80194ba:	d007      	beq.n	80194cc <inet_chksum_pbuf+0x8a>
    acc = SWAP_BYTES_IN_WORD(acc);
 80194bc:	697b      	ldr	r3, [r7, #20]
 80194be:	021b      	lsls	r3, r3, #8
 80194c0:	b29a      	uxth	r2, r3
 80194c2:	697b      	ldr	r3, [r7, #20]
 80194c4:	0a1b      	lsrs	r3, r3, #8
 80194c6:	b2db      	uxtb	r3, r3
 80194c8:	4313      	orrs	r3, r2
 80194ca:	617b      	str	r3, [r7, #20]
  }
  return (u16_t)~(acc & 0xffffUL);
 80194cc:	697b      	ldr	r3, [r7, #20]
 80194ce:	b29b      	uxth	r3, r3
 80194d0:	43db      	mvns	r3, r3
 80194d2:	b29b      	uxth	r3, r3
}
 80194d4:	4618      	mov	r0, r3
 80194d6:	3718      	adds	r7, #24
 80194d8:	46bd      	mov	sp, r7
 80194da:	bd80      	pop	{r7, pc}

080194dc <lwip_init>:
 * Initialize all modules.
 * Use this in NO_SYS mode. Use tcpip_init() otherwise.
 */
void
lwip_init(void)
{
 80194dc:	b580      	push	{r7, lr}
 80194de:	b082      	sub	sp, #8
 80194e0:	af00      	add	r7, sp, #0
#ifndef LWIP_SKIP_CONST_CHECK
  int a = 0;
 80194e2:	2300      	movs	r3, #0
 80194e4:	607b      	str	r3, [r7, #4]
#endif

  /* Modules initialization */
  stats_init();
#if !NO_SYS
  sys_init();
 80194e6:	f00d fb75 	bl	8026bd4 <sys_init>
#endif /* !NO_SYS */
  mem_init();
 80194ea:	f000 f8d3 	bl	8019694 <mem_init>
  memp_init();
 80194ee:	f000 fc1b 	bl	8019d28 <memp_init>
  pbuf_init();
  netif_init();
 80194f2:	f000 fd27 	bl	8019f44 <netif_init>
#endif /* LWIP_IPV4 */
#if LWIP_RAW
  raw_init();
#endif /* LWIP_RAW */
#if LWIP_UDP
  udp_init();
 80194f6:	f008 f8db 	bl	80216b0 <udp_init>
#endif /* LWIP_UDP */
#if LWIP_TCP
  tcp_init();
 80194fa:	f001 fe91 	bl	801b220 <tcp_init>
#if PPP_SUPPORT
  ppp_init();
#endif

#if LWIP_TIMERS
  sys_timeouts_init();
 80194fe:	f008 f817 	bl	8021530 <sys_timeouts_init>
#endif /* LWIP_TIMERS */
}
 8019502:	bf00      	nop
 8019504:	3708      	adds	r7, #8
 8019506:	46bd      	mov	sp, r7
 8019508:	bd80      	pop	{r7, pc}
	...

0801950c <ptr_to_mem>:
#define mem_overflow_check_element(mem)
#endif /* MEM_OVERFLOW_CHECK */

static struct mem *
ptr_to_mem(mem_size_t ptr)
{
 801950c:	b480      	push	{r7}
 801950e:	b083      	sub	sp, #12
 8019510:	af00      	add	r7, sp, #0
 8019512:	6078      	str	r0, [r7, #4]
  return (struct mem *)(void *)&ram[ptr];
 8019514:	4b04      	ldr	r3, [pc, #16]	@ (8019528 <ptr_to_mem+0x1c>)
 8019516:	681a      	ldr	r2, [r3, #0]
 8019518:	687b      	ldr	r3, [r7, #4]
 801951a:	4413      	add	r3, r2
}
 801951c:	4618      	mov	r0, r3
 801951e:	370c      	adds	r7, #12
 8019520:	46bd      	mov	sp, r7
 8019522:	f85d 7b04 	ldr.w	r7, [sp], #4
 8019526:	4770      	bx	lr
 8019528:	24024420 	.word	0x24024420

0801952c <mem_to_ptr>:

static mem_size_t
mem_to_ptr(void *mem)
{
 801952c:	b480      	push	{r7}
 801952e:	b083      	sub	sp, #12
 8019530:	af00      	add	r7, sp, #0
 8019532:	6078      	str	r0, [r7, #4]
  return (mem_size_t)((u8_t *)mem - ram);
 8019534:	4b04      	ldr	r3, [pc, #16]	@ (8019548 <mem_to_ptr+0x1c>)
 8019536:	681b      	ldr	r3, [r3, #0]
 8019538:	687a      	ldr	r2, [r7, #4]
 801953a:	1ad3      	subs	r3, r2, r3
}
 801953c:	4618      	mov	r0, r3
 801953e:	370c      	adds	r7, #12
 8019540:	46bd      	mov	sp, r7
 8019542:	f85d 7b04 	ldr.w	r7, [sp], #4
 8019546:	4770      	bx	lr
 8019548:	24024420 	.word	0x24024420

0801954c <plug_holes>:
 * This assumes access to the heap is protected by the calling function
 * already.
 */
static void
plug_holes(struct mem *mem)
{
 801954c:	b590      	push	{r4, r7, lr}
 801954e:	b085      	sub	sp, #20
 8019550:	af00      	add	r7, sp, #0
 8019552:	6078      	str	r0, [r7, #4]
  struct mem *nmem;
  struct mem *pmem;

  LWIP_ASSERT("plug_holes: mem >= ram", (u8_t *)mem >= ram);
 8019554:	4b45      	ldr	r3, [pc, #276]	@ (801966c <plug_holes+0x120>)
 8019556:	681b      	ldr	r3, [r3, #0]
 8019558:	687a      	ldr	r2, [r7, #4]
 801955a:	429a      	cmp	r2, r3
 801955c:	d206      	bcs.n	801956c <plug_holes+0x20>
 801955e:	4b44      	ldr	r3, [pc, #272]	@ (8019670 <plug_holes+0x124>)
 8019560:	f240 12df 	movw	r2, #479	@ 0x1df
 8019564:	4943      	ldr	r1, [pc, #268]	@ (8019674 <plug_holes+0x128>)
 8019566:	4844      	ldr	r0, [pc, #272]	@ (8019678 <plug_holes+0x12c>)
 8019568:	f010 fe28 	bl	802a1bc <iprintf>
  LWIP_ASSERT("plug_holes: mem < ram_end", (u8_t *)mem < (u8_t *)ram_end);
 801956c:	4b43      	ldr	r3, [pc, #268]	@ (801967c <plug_holes+0x130>)
 801956e:	681b      	ldr	r3, [r3, #0]
 8019570:	687a      	ldr	r2, [r7, #4]
 8019572:	429a      	cmp	r2, r3
 8019574:	d306      	bcc.n	8019584 <plug_holes+0x38>
 8019576:	4b3e      	ldr	r3, [pc, #248]	@ (8019670 <plug_holes+0x124>)
 8019578:	f44f 72f0 	mov.w	r2, #480	@ 0x1e0
 801957c:	4940      	ldr	r1, [pc, #256]	@ (8019680 <plug_holes+0x134>)
 801957e:	483e      	ldr	r0, [pc, #248]	@ (8019678 <plug_holes+0x12c>)
 8019580:	f010 fe1c 	bl	802a1bc <iprintf>
  LWIP_ASSERT("plug_holes: mem->used == 0", mem->used == 0);
 8019584:	687b      	ldr	r3, [r7, #4]
 8019586:	7a1b      	ldrb	r3, [r3, #8]
 8019588:	2b00      	cmp	r3, #0
 801958a:	d006      	beq.n	801959a <plug_holes+0x4e>
 801958c:	4b38      	ldr	r3, [pc, #224]	@ (8019670 <plug_holes+0x124>)
 801958e:	f240 12e1 	movw	r2, #481	@ 0x1e1
 8019592:	493c      	ldr	r1, [pc, #240]	@ (8019684 <plug_holes+0x138>)
 8019594:	4838      	ldr	r0, [pc, #224]	@ (8019678 <plug_holes+0x12c>)
 8019596:	f010 fe11 	bl	802a1bc <iprintf>

  /* plug hole forward */
  LWIP_ASSERT("plug_holes: mem->next <= MEM_SIZE_ALIGNED", mem->next <= MEM_SIZE_ALIGNED);
 801959a:	687b      	ldr	r3, [r7, #4]
 801959c:	681b      	ldr	r3, [r3, #0]
 801959e:	4a3a      	ldr	r2, [pc, #232]	@ (8019688 <plug_holes+0x13c>)
 80195a0:	4293      	cmp	r3, r2
 80195a2:	d906      	bls.n	80195b2 <plug_holes+0x66>
 80195a4:	4b32      	ldr	r3, [pc, #200]	@ (8019670 <plug_holes+0x124>)
 80195a6:	f44f 72f2 	mov.w	r2, #484	@ 0x1e4
 80195aa:	4938      	ldr	r1, [pc, #224]	@ (801968c <plug_holes+0x140>)
 80195ac:	4832      	ldr	r0, [pc, #200]	@ (8019678 <plug_holes+0x12c>)
 80195ae:	f010 fe05 	bl	802a1bc <iprintf>

  nmem = ptr_to_mem(mem->next);
 80195b2:	687b      	ldr	r3, [r7, #4]
 80195b4:	681b      	ldr	r3, [r3, #0]
 80195b6:	4618      	mov	r0, r3
 80195b8:	f7ff ffa8 	bl	801950c <ptr_to_mem>
 80195bc:	60f8      	str	r0, [r7, #12]
  if (mem != nmem && nmem->used == 0 && (u8_t *)nmem != (u8_t *)ram_end) {
 80195be:	687a      	ldr	r2, [r7, #4]
 80195c0:	68fb      	ldr	r3, [r7, #12]
 80195c2:	429a      	cmp	r2, r3
 80195c4:	d024      	beq.n	8019610 <plug_holes+0xc4>
 80195c6:	68fb      	ldr	r3, [r7, #12]
 80195c8:	7a1b      	ldrb	r3, [r3, #8]
 80195ca:	2b00      	cmp	r3, #0
 80195cc:	d120      	bne.n	8019610 <plug_holes+0xc4>
 80195ce:	4b2b      	ldr	r3, [pc, #172]	@ (801967c <plug_holes+0x130>)
 80195d0:	681b      	ldr	r3, [r3, #0]
 80195d2:	68fa      	ldr	r2, [r7, #12]
 80195d4:	429a      	cmp	r2, r3
 80195d6:	d01b      	beq.n	8019610 <plug_holes+0xc4>
    /* if mem->next is unused and not end of ram, combine mem and mem->next */
    if (lfree == nmem) {
 80195d8:	4b2d      	ldr	r3, [pc, #180]	@ (8019690 <plug_holes+0x144>)
 80195da:	681b      	ldr	r3, [r3, #0]
 80195dc:	68fa      	ldr	r2, [r7, #12]
 80195de:	429a      	cmp	r2, r3
 80195e0:	d102      	bne.n	80195e8 <plug_holes+0x9c>
      lfree = mem;
 80195e2:	4a2b      	ldr	r2, [pc, #172]	@ (8019690 <plug_holes+0x144>)
 80195e4:	687b      	ldr	r3, [r7, #4]
 80195e6:	6013      	str	r3, [r2, #0]
    }
    mem->next = nmem->next;
 80195e8:	68fb      	ldr	r3, [r7, #12]
 80195ea:	681a      	ldr	r2, [r3, #0]
 80195ec:	687b      	ldr	r3, [r7, #4]
 80195ee:	601a      	str	r2, [r3, #0]
    if (nmem->next != MEM_SIZE_ALIGNED) {
 80195f0:	68fb      	ldr	r3, [r7, #12]
 80195f2:	681b      	ldr	r3, [r3, #0]
 80195f4:	4a24      	ldr	r2, [pc, #144]	@ (8019688 <plug_holes+0x13c>)
 80195f6:	4293      	cmp	r3, r2
 80195f8:	d00a      	beq.n	8019610 <plug_holes+0xc4>
      ptr_to_mem(nmem->next)->prev = mem_to_ptr(mem);
 80195fa:	68fb      	ldr	r3, [r7, #12]
 80195fc:	681b      	ldr	r3, [r3, #0]
 80195fe:	4618      	mov	r0, r3
 8019600:	f7ff ff84 	bl	801950c <ptr_to_mem>
 8019604:	4604      	mov	r4, r0
 8019606:	6878      	ldr	r0, [r7, #4]
 8019608:	f7ff ff90 	bl	801952c <mem_to_ptr>
 801960c:	4603      	mov	r3, r0
 801960e:	6063      	str	r3, [r4, #4]
    }
  }

  /* plug hole backward */
  pmem = ptr_to_mem(mem->prev);
 8019610:	687b      	ldr	r3, [r7, #4]
 8019612:	685b      	ldr	r3, [r3, #4]
 8019614:	4618      	mov	r0, r3
 8019616:	f7ff ff79 	bl	801950c <ptr_to_mem>
 801961a:	60b8      	str	r0, [r7, #8]
  if (pmem != mem && pmem->used == 0) {
 801961c:	68ba      	ldr	r2, [r7, #8]
 801961e:	687b      	ldr	r3, [r7, #4]
 8019620:	429a      	cmp	r2, r3
 8019622:	d01f      	beq.n	8019664 <plug_holes+0x118>
 8019624:	68bb      	ldr	r3, [r7, #8]
 8019626:	7a1b      	ldrb	r3, [r3, #8]
 8019628:	2b00      	cmp	r3, #0
 801962a:	d11b      	bne.n	8019664 <plug_holes+0x118>
    /* if mem->prev is unused, combine mem and mem->prev */
    if (lfree == mem) {
 801962c:	4b18      	ldr	r3, [pc, #96]	@ (8019690 <plug_holes+0x144>)
 801962e:	681b      	ldr	r3, [r3, #0]
 8019630:	687a      	ldr	r2, [r7, #4]
 8019632:	429a      	cmp	r2, r3
 8019634:	d102      	bne.n	801963c <plug_holes+0xf0>
      lfree = pmem;
 8019636:	4a16      	ldr	r2, [pc, #88]	@ (8019690 <plug_holes+0x144>)
 8019638:	68bb      	ldr	r3, [r7, #8]
 801963a:	6013      	str	r3, [r2, #0]
    }
    pmem->next = mem->next;
 801963c:	687b      	ldr	r3, [r7, #4]
 801963e:	681a      	ldr	r2, [r3, #0]
 8019640:	68bb      	ldr	r3, [r7, #8]
 8019642:	601a      	str	r2, [r3, #0]
    if (mem->next != MEM_SIZE_ALIGNED) {
 8019644:	687b      	ldr	r3, [r7, #4]
 8019646:	681b      	ldr	r3, [r3, #0]
 8019648:	4a0f      	ldr	r2, [pc, #60]	@ (8019688 <plug_holes+0x13c>)
 801964a:	4293      	cmp	r3, r2
 801964c:	d00a      	beq.n	8019664 <plug_holes+0x118>
      ptr_to_mem(mem->next)->prev = mem_to_ptr(pmem);
 801964e:	687b      	ldr	r3, [r7, #4]
 8019650:	681b      	ldr	r3, [r3, #0]
 8019652:	4618      	mov	r0, r3
 8019654:	f7ff ff5a 	bl	801950c <ptr_to_mem>
 8019658:	4604      	mov	r4, r0
 801965a:	68b8      	ldr	r0, [r7, #8]
 801965c:	f7ff ff66 	bl	801952c <mem_to_ptr>
 8019660:	4603      	mov	r3, r0
 8019662:	6063      	str	r3, [r4, #4]
    }
  }
}
 8019664:	bf00      	nop
 8019666:	3714      	adds	r7, #20
 8019668:	46bd      	mov	sp, r7
 801966a:	bd90      	pop	{r4, r7, pc}
 801966c:	24024420 	.word	0x24024420
 8019670:	0802e310 	.word	0x0802e310
 8019674:	0802e340 	.word	0x0802e340
 8019678:	0802e358 	.word	0x0802e358
 801967c:	24024424 	.word	0x24024424
 8019680:	0802e380 	.word	0x0802e380
 8019684:	0802e39c 	.word	0x0802e39c
 8019688:	0001ffe8 	.word	0x0001ffe8
 801968c:	0802e3b8 	.word	0x0802e3b8
 8019690:	2402442c 	.word	0x2402442c

08019694 <mem_init>:
/**
 * Zero the heap and initialize start, end and lowest-free
 */
void
mem_init(void)
{
 8019694:	b580      	push	{r7, lr}
 8019696:	b082      	sub	sp, #8
 8019698:	af00      	add	r7, sp, #0

  LWIP_ASSERT("Sanity check alignment",
              (SIZEOF_STRUCT_MEM & (MEM_ALIGNMENT - 1)) == 0);

  /* align the heap */
  ram = (u8_t *)LWIP_MEM_ALIGN(LWIP_RAM_HEAP_POINTER);
 801969a:	4b1b      	ldr	r3, [pc, #108]	@ (8019708 <mem_init+0x74>)
 801969c:	4a1b      	ldr	r2, [pc, #108]	@ (801970c <mem_init+0x78>)
 801969e:	601a      	str	r2, [r3, #0]
  /* initialize the start of the heap */
  mem = (struct mem *)(void *)ram;
 80196a0:	4b19      	ldr	r3, [pc, #100]	@ (8019708 <mem_init+0x74>)
 80196a2:	681b      	ldr	r3, [r3, #0]
 80196a4:	607b      	str	r3, [r7, #4]
  mem->next = MEM_SIZE_ALIGNED;
 80196a6:	687b      	ldr	r3, [r7, #4]
 80196a8:	4a19      	ldr	r2, [pc, #100]	@ (8019710 <mem_init+0x7c>)
 80196aa:	601a      	str	r2, [r3, #0]
  mem->prev = 0;
 80196ac:	687b      	ldr	r3, [r7, #4]
 80196ae:	2200      	movs	r2, #0
 80196b0:	605a      	str	r2, [r3, #4]
  mem->used = 0;
 80196b2:	687b      	ldr	r3, [r7, #4]
 80196b4:	2200      	movs	r2, #0
 80196b6:	721a      	strb	r2, [r3, #8]
  /* initialize the end of the heap */
  ram_end = ptr_to_mem(MEM_SIZE_ALIGNED);
 80196b8:	4815      	ldr	r0, [pc, #84]	@ (8019710 <mem_init+0x7c>)
 80196ba:	f7ff ff27 	bl	801950c <ptr_to_mem>
 80196be:	4603      	mov	r3, r0
 80196c0:	4a14      	ldr	r2, [pc, #80]	@ (8019714 <mem_init+0x80>)
 80196c2:	6013      	str	r3, [r2, #0]
  ram_end->used = 1;
 80196c4:	4b13      	ldr	r3, [pc, #76]	@ (8019714 <mem_init+0x80>)
 80196c6:	681b      	ldr	r3, [r3, #0]
 80196c8:	2201      	movs	r2, #1
 80196ca:	721a      	strb	r2, [r3, #8]
  ram_end->next = MEM_SIZE_ALIGNED;
 80196cc:	4b11      	ldr	r3, [pc, #68]	@ (8019714 <mem_init+0x80>)
 80196ce:	681b      	ldr	r3, [r3, #0]
 80196d0:	4a0f      	ldr	r2, [pc, #60]	@ (8019710 <mem_init+0x7c>)
 80196d2:	601a      	str	r2, [r3, #0]
  ram_end->prev = MEM_SIZE_ALIGNED;
 80196d4:	4b0f      	ldr	r3, [pc, #60]	@ (8019714 <mem_init+0x80>)
 80196d6:	681b      	ldr	r3, [r3, #0]
 80196d8:	4a0d      	ldr	r2, [pc, #52]	@ (8019710 <mem_init+0x7c>)
 80196da:	605a      	str	r2, [r3, #4]
  MEM_SANITY();

  /* initialize the lowest-free pointer to the start of the heap */
  lfree = (struct mem *)(void *)ram;
 80196dc:	4b0a      	ldr	r3, [pc, #40]	@ (8019708 <mem_init+0x74>)
 80196de:	681b      	ldr	r3, [r3, #0]
 80196e0:	4a0d      	ldr	r2, [pc, #52]	@ (8019718 <mem_init+0x84>)
 80196e2:	6013      	str	r3, [r2, #0]

  MEM_STATS_AVAIL(avail, MEM_SIZE_ALIGNED);

  if (sys_mutex_new(&mem_mutex) != ERR_OK) {
 80196e4:	480d      	ldr	r0, [pc, #52]	@ (801971c <mem_init+0x88>)
 80196e6:	f00d fa81 	bl	8026bec <sys_mutex_new>
 80196ea:	4603      	mov	r3, r0
 80196ec:	2b00      	cmp	r3, #0
 80196ee:	d006      	beq.n	80196fe <mem_init+0x6a>
    LWIP_ASSERT("failed to create mem_mutex", 0);
 80196f0:	4b0b      	ldr	r3, [pc, #44]	@ (8019720 <mem_init+0x8c>)
 80196f2:	f240 221f 	movw	r2, #543	@ 0x21f
 80196f6:	490b      	ldr	r1, [pc, #44]	@ (8019724 <mem_init+0x90>)
 80196f8:	480b      	ldr	r0, [pc, #44]	@ (8019728 <mem_init+0x94>)
 80196fa:	f010 fd5f 	bl	802a1bc <iprintf>
  }
}
 80196fe:	bf00      	nop
 8019700:	3708      	adds	r7, #8
 8019702:	46bd      	mov	sp, r7
 8019704:	bd80      	pop	{r7, pc}
 8019706:	bf00      	nop
 8019708:	24024420 	.word	0x24024420
 801970c:	24020000 	.word	0x24020000
 8019710:	0001ffe8 	.word	0x0001ffe8
 8019714:	24024424 	.word	0x24024424
 8019718:	2402442c 	.word	0x2402442c
 801971c:	24024428 	.word	0x24024428
 8019720:	0802e310 	.word	0x0802e310
 8019724:	0802e3e4 	.word	0x0802e3e4
 8019728:	0802e358 	.word	0x0802e358

0801972c <mem_link_valid>:
/* Check if a struct mem is correctly linked.
 * If not, double-free is a possible reason.
 */
static int
mem_link_valid(struct mem *mem)
{
 801972c:	b580      	push	{r7, lr}
 801972e:	b086      	sub	sp, #24
 8019730:	af00      	add	r7, sp, #0
 8019732:	6078      	str	r0, [r7, #4]
  struct mem *nmem, *pmem;
  mem_size_t rmem_idx;
  rmem_idx = mem_to_ptr(mem);
 8019734:	6878      	ldr	r0, [r7, #4]
 8019736:	f7ff fef9 	bl	801952c <mem_to_ptr>
 801973a:	6178      	str	r0, [r7, #20]
  nmem = ptr_to_mem(mem->next);
 801973c:	687b      	ldr	r3, [r7, #4]
 801973e:	681b      	ldr	r3, [r3, #0]
 8019740:	4618      	mov	r0, r3
 8019742:	f7ff fee3 	bl	801950c <ptr_to_mem>
 8019746:	6138      	str	r0, [r7, #16]
  pmem = ptr_to_mem(mem->prev);
 8019748:	687b      	ldr	r3, [r7, #4]
 801974a:	685b      	ldr	r3, [r3, #4]
 801974c:	4618      	mov	r0, r3
 801974e:	f7ff fedd 	bl	801950c <ptr_to_mem>
 8019752:	60f8      	str	r0, [r7, #12]
  if ((mem->next > MEM_SIZE_ALIGNED) || (mem->prev > MEM_SIZE_ALIGNED) ||
 8019754:	687b      	ldr	r3, [r7, #4]
 8019756:	681b      	ldr	r3, [r3, #0]
 8019758:	4a11      	ldr	r2, [pc, #68]	@ (80197a0 <mem_link_valid+0x74>)
 801975a:	4293      	cmp	r3, r2
 801975c:	d818      	bhi.n	8019790 <mem_link_valid+0x64>
 801975e:	687b      	ldr	r3, [r7, #4]
 8019760:	685b      	ldr	r3, [r3, #4]
 8019762:	4a0f      	ldr	r2, [pc, #60]	@ (80197a0 <mem_link_valid+0x74>)
 8019764:	4293      	cmp	r3, r2
 8019766:	d813      	bhi.n	8019790 <mem_link_valid+0x64>
      ((mem->prev != rmem_idx) && (pmem->next != rmem_idx)) ||
 8019768:	687b      	ldr	r3, [r7, #4]
 801976a:	685b      	ldr	r3, [r3, #4]
  if ((mem->next > MEM_SIZE_ALIGNED) || (mem->prev > MEM_SIZE_ALIGNED) ||
 801976c:	697a      	ldr	r2, [r7, #20]
 801976e:	429a      	cmp	r2, r3
 8019770:	d004      	beq.n	801977c <mem_link_valid+0x50>
      ((mem->prev != rmem_idx) && (pmem->next != rmem_idx)) ||
 8019772:	68fb      	ldr	r3, [r7, #12]
 8019774:	681b      	ldr	r3, [r3, #0]
 8019776:	697a      	ldr	r2, [r7, #20]
 8019778:	429a      	cmp	r2, r3
 801977a:	d109      	bne.n	8019790 <mem_link_valid+0x64>
      ((nmem != ram_end) && (nmem->prev != rmem_idx))) {
 801977c:	4b09      	ldr	r3, [pc, #36]	@ (80197a4 <mem_link_valid+0x78>)
 801977e:	681b      	ldr	r3, [r3, #0]
      ((mem->prev != rmem_idx) && (pmem->next != rmem_idx)) ||
 8019780:	693a      	ldr	r2, [r7, #16]
 8019782:	429a      	cmp	r2, r3
 8019784:	d006      	beq.n	8019794 <mem_link_valid+0x68>
      ((nmem != ram_end) && (nmem->prev != rmem_idx))) {
 8019786:	693b      	ldr	r3, [r7, #16]
 8019788:	685b      	ldr	r3, [r3, #4]
 801978a:	697a      	ldr	r2, [r7, #20]
 801978c:	429a      	cmp	r2, r3
 801978e:	d001      	beq.n	8019794 <mem_link_valid+0x68>
    return 0;
 8019790:	2300      	movs	r3, #0
 8019792:	e000      	b.n	8019796 <mem_link_valid+0x6a>
  }
  return 1;
 8019794:	2301      	movs	r3, #1
}
 8019796:	4618      	mov	r0, r3
 8019798:	3718      	adds	r7, #24
 801979a:	46bd      	mov	sp, r7
 801979c:	bd80      	pop	{r7, pc}
 801979e:	bf00      	nop
 80197a0:	0001ffe8 	.word	0x0001ffe8
 80197a4:	24024424 	.word	0x24024424

080197a8 <mem_free>:
 * @param rmem is the data portion of a struct mem as returned by a previous
 *             call to mem_malloc()
 */
void
mem_free(void *rmem)
{
 80197a8:	b580      	push	{r7, lr}
 80197aa:	b088      	sub	sp, #32
 80197ac:	af00      	add	r7, sp, #0
 80197ae:	6078      	str	r0, [r7, #4]
  struct mem *mem;
  LWIP_MEM_FREE_DECL_PROTECT();

  if (rmem == NULL) {
 80197b0:	687b      	ldr	r3, [r7, #4]
 80197b2:	2b00      	cmp	r3, #0
 80197b4:	d070      	beq.n	8019898 <mem_free+0xf0>
    LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("mem_free(p == NULL) was called.\n"));
    return;
  }
  if ((((mem_ptr_t)rmem) & (MEM_ALIGNMENT - 1)) != 0) {
 80197b6:	687b      	ldr	r3, [r7, #4]
 80197b8:	f003 0303 	and.w	r3, r3, #3
 80197bc:	2b00      	cmp	r3, #0
 80197be:	d00d      	beq.n	80197dc <mem_free+0x34>
    LWIP_MEM_ILLEGAL_FREE("mem_free: sanity check alignment");
 80197c0:	4b37      	ldr	r3, [pc, #220]	@ (80198a0 <mem_free+0xf8>)
 80197c2:	f240 2273 	movw	r2, #627	@ 0x273
 80197c6:	4937      	ldr	r1, [pc, #220]	@ (80198a4 <mem_free+0xfc>)
 80197c8:	4837      	ldr	r0, [pc, #220]	@ (80198a8 <mem_free+0x100>)
 80197ca:	f010 fcf7 	bl	802a1bc <iprintf>
    LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_LEVEL_SEVERE, ("mem_free: sanity check alignment\n"));
    /* protect mem stats from concurrent access */
    MEM_STATS_INC_LOCKED(illegal);
 80197ce:	f00d fa5f 	bl	8026c90 <sys_arch_protect>
 80197d2:	60f8      	str	r0, [r7, #12]
 80197d4:	68f8      	ldr	r0, [r7, #12]
 80197d6:	f00d fa69 	bl	8026cac <sys_arch_unprotect>
    return;
 80197da:	e05e      	b.n	801989a <mem_free+0xf2>
  }

  /* Get the corresponding struct mem: */
  /* cast through void* to get rid of alignment warnings */
  mem = (struct mem *)(void *)((u8_t *)rmem - (SIZEOF_STRUCT_MEM + MEM_SANITY_OFFSET));
 80197dc:	687b      	ldr	r3, [r7, #4]
 80197de:	3b0c      	subs	r3, #12
 80197e0:	61fb      	str	r3, [r7, #28]

  if ((u8_t *)mem < ram || (u8_t *)rmem + MIN_SIZE_ALIGNED > (u8_t *)ram_end) {
 80197e2:	4b32      	ldr	r3, [pc, #200]	@ (80198ac <mem_free+0x104>)
 80197e4:	681b      	ldr	r3, [r3, #0]
 80197e6:	69fa      	ldr	r2, [r7, #28]
 80197e8:	429a      	cmp	r2, r3
 80197ea:	d306      	bcc.n	80197fa <mem_free+0x52>
 80197ec:	687b      	ldr	r3, [r7, #4]
 80197ee:	f103 020c 	add.w	r2, r3, #12
 80197f2:	4b2f      	ldr	r3, [pc, #188]	@ (80198b0 <mem_free+0x108>)
 80197f4:	681b      	ldr	r3, [r3, #0]
 80197f6:	429a      	cmp	r2, r3
 80197f8:	d90d      	bls.n	8019816 <mem_free+0x6e>
    LWIP_MEM_ILLEGAL_FREE("mem_free: illegal memory");
 80197fa:	4b29      	ldr	r3, [pc, #164]	@ (80198a0 <mem_free+0xf8>)
 80197fc:	f240 227f 	movw	r2, #639	@ 0x27f
 8019800:	492c      	ldr	r1, [pc, #176]	@ (80198b4 <mem_free+0x10c>)
 8019802:	4829      	ldr	r0, [pc, #164]	@ (80198a8 <mem_free+0x100>)
 8019804:	f010 fcda 	bl	802a1bc <iprintf>
    LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_LEVEL_SEVERE, ("mem_free: illegal memory\n"));
    /* protect mem stats from concurrent access */
    MEM_STATS_INC_LOCKED(illegal);
 8019808:	f00d fa42 	bl	8026c90 <sys_arch_protect>
 801980c:	6138      	str	r0, [r7, #16]
 801980e:	6938      	ldr	r0, [r7, #16]
 8019810:	f00d fa4c 	bl	8026cac <sys_arch_unprotect>
    return;
 8019814:	e041      	b.n	801989a <mem_free+0xf2>
  }
#if MEM_OVERFLOW_CHECK
  mem_overflow_check_element(mem);
#endif
  /* protect the heap from concurrent access */
  LWIP_MEM_FREE_PROTECT();
 8019816:	4828      	ldr	r0, [pc, #160]	@ (80198b8 <mem_free+0x110>)
 8019818:	f00d f9fe 	bl	8026c18 <sys_mutex_lock>
  /* mem has to be in a used state */
  if (!mem->used) {
 801981c:	69fb      	ldr	r3, [r7, #28]
 801981e:	7a1b      	ldrb	r3, [r3, #8]
 8019820:	2b00      	cmp	r3, #0
 8019822:	d110      	bne.n	8019846 <mem_free+0x9e>
    LWIP_MEM_ILLEGAL_FREE("mem_free: illegal memory: double free");
 8019824:	4b1e      	ldr	r3, [pc, #120]	@ (80198a0 <mem_free+0xf8>)
 8019826:	f44f 7223 	mov.w	r2, #652	@ 0x28c
 801982a:	4924      	ldr	r1, [pc, #144]	@ (80198bc <mem_free+0x114>)
 801982c:	481e      	ldr	r0, [pc, #120]	@ (80198a8 <mem_free+0x100>)
 801982e:	f010 fcc5 	bl	802a1bc <iprintf>
    LWIP_MEM_FREE_UNPROTECT();
 8019832:	4821      	ldr	r0, [pc, #132]	@ (80198b8 <mem_free+0x110>)
 8019834:	f00d f9ff 	bl	8026c36 <sys_mutex_unlock>
    LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_LEVEL_SEVERE, ("mem_free: illegal memory: double free?\n"));
    /* protect mem stats from concurrent access */
    MEM_STATS_INC_LOCKED(illegal);
 8019838:	f00d fa2a 	bl	8026c90 <sys_arch_protect>
 801983c:	6178      	str	r0, [r7, #20]
 801983e:	6978      	ldr	r0, [r7, #20]
 8019840:	f00d fa34 	bl	8026cac <sys_arch_unprotect>
    return;
 8019844:	e029      	b.n	801989a <mem_free+0xf2>
  }

  if (!mem_link_valid(mem)) {
 8019846:	69f8      	ldr	r0, [r7, #28]
 8019848:	f7ff ff70 	bl	801972c <mem_link_valid>
 801984c:	4603      	mov	r3, r0
 801984e:	2b00      	cmp	r3, #0
 8019850:	d110      	bne.n	8019874 <mem_free+0xcc>
    LWIP_MEM_ILLEGAL_FREE("mem_free: illegal memory: non-linked: double free");
 8019852:	4b13      	ldr	r3, [pc, #76]	@ (80198a0 <mem_free+0xf8>)
 8019854:	f240 2295 	movw	r2, #661	@ 0x295
 8019858:	4919      	ldr	r1, [pc, #100]	@ (80198c0 <mem_free+0x118>)
 801985a:	4813      	ldr	r0, [pc, #76]	@ (80198a8 <mem_free+0x100>)
 801985c:	f010 fcae 	bl	802a1bc <iprintf>
    LWIP_MEM_FREE_UNPROTECT();
 8019860:	4815      	ldr	r0, [pc, #84]	@ (80198b8 <mem_free+0x110>)
 8019862:	f00d f9e8 	bl	8026c36 <sys_mutex_unlock>
    LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_LEVEL_SEVERE, ("mem_free: illegal memory: non-linked: double free?\n"));
    /* protect mem stats from concurrent access */
    MEM_STATS_INC_LOCKED(illegal);
 8019866:	f00d fa13 	bl	8026c90 <sys_arch_protect>
 801986a:	61b8      	str	r0, [r7, #24]
 801986c:	69b8      	ldr	r0, [r7, #24]
 801986e:	f00d fa1d 	bl	8026cac <sys_arch_unprotect>
    return;
 8019872:	e012      	b.n	801989a <mem_free+0xf2>
  }

  /* mem is now unused. */
  mem->used = 0;
 8019874:	69fb      	ldr	r3, [r7, #28]
 8019876:	2200      	movs	r2, #0
 8019878:	721a      	strb	r2, [r3, #8]

  if (mem < lfree) {
 801987a:	4b12      	ldr	r3, [pc, #72]	@ (80198c4 <mem_free+0x11c>)
 801987c:	681b      	ldr	r3, [r3, #0]
 801987e:	69fa      	ldr	r2, [r7, #28]
 8019880:	429a      	cmp	r2, r3
 8019882:	d202      	bcs.n	801988a <mem_free+0xe2>
    /* the newly freed struct is now the lowest */
    lfree = mem;
 8019884:	4a0f      	ldr	r2, [pc, #60]	@ (80198c4 <mem_free+0x11c>)
 8019886:	69fb      	ldr	r3, [r7, #28]
 8019888:	6013      	str	r3, [r2, #0]
  }

  MEM_STATS_DEC_USED(used, mem->next - (mem_size_t)(((u8_t *)mem - ram)));

  /* finally, see if prev or next are free also */
  plug_holes(mem);
 801988a:	69f8      	ldr	r0, [r7, #28]
 801988c:	f7ff fe5e 	bl	801954c <plug_holes>
  MEM_SANITY();
#if LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT
  mem_free_count = 1;
#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */
  LWIP_MEM_FREE_UNPROTECT();
 8019890:	4809      	ldr	r0, [pc, #36]	@ (80198b8 <mem_free+0x110>)
 8019892:	f00d f9d0 	bl	8026c36 <sys_mutex_unlock>
 8019896:	e000      	b.n	801989a <mem_free+0xf2>
    return;
 8019898:	bf00      	nop
}
 801989a:	3720      	adds	r7, #32
 801989c:	46bd      	mov	sp, r7
 801989e:	bd80      	pop	{r7, pc}
 80198a0:	0802e310 	.word	0x0802e310
 80198a4:	0802e400 	.word	0x0802e400
 80198a8:	0802e358 	.word	0x0802e358
 80198ac:	24024420 	.word	0x24024420
 80198b0:	24024424 	.word	0x24024424
 80198b4:	0802e424 	.word	0x0802e424
 80198b8:	24024428 	.word	0x24024428
 80198bc:	0802e440 	.word	0x0802e440
 80198c0:	0802e468 	.word	0x0802e468
 80198c4:	2402442c 	.word	0x2402442c

080198c8 <mem_trim>:
 *         or NULL if newsize is > old size, in which case rmem is NOT touched
 *         or freed!
 */
void *
mem_trim(void *rmem, mem_size_t new_size)
{
 80198c8:	b580      	push	{r7, lr}
 80198ca:	b08a      	sub	sp, #40	@ 0x28
 80198cc:	af00      	add	r7, sp, #0
 80198ce:	6078      	str	r0, [r7, #4]
 80198d0:	6039      	str	r1, [r7, #0]
  /* use the FREE_PROTECT here: it protects with sem OR SYS_ARCH_PROTECT */
  LWIP_MEM_FREE_DECL_PROTECT();

  /* Expand the size of the allocated memory region so that we can
     adjust for alignment. */
  newsize = (mem_size_t)LWIP_MEM_ALIGN_SIZE(new_size);
 80198d2:	683b      	ldr	r3, [r7, #0]
 80198d4:	3303      	adds	r3, #3
 80198d6:	f023 0303 	bic.w	r3, r3, #3
 80198da:	627b      	str	r3, [r7, #36]	@ 0x24
  if (newsize < MIN_SIZE_ALIGNED) {
 80198dc:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80198de:	2b0b      	cmp	r3, #11
 80198e0:	d801      	bhi.n	80198e6 <mem_trim+0x1e>
    /* every data block must be at least MIN_SIZE_ALIGNED long */
    newsize = MIN_SIZE_ALIGNED;
 80198e2:	230c      	movs	r3, #12
 80198e4:	627b      	str	r3, [r7, #36]	@ 0x24
  }
#if MEM_OVERFLOW_CHECK
  newsize += MEM_SANITY_REGION_BEFORE_ALIGNED + MEM_SANITY_REGION_AFTER_ALIGNED;
#endif
  if ((newsize > MEM_SIZE_ALIGNED) || (newsize < new_size)) {
 80198e6:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80198e8:	4a6e      	ldr	r2, [pc, #440]	@ (8019aa4 <mem_trim+0x1dc>)
 80198ea:	4293      	cmp	r3, r2
 80198ec:	d803      	bhi.n	80198f6 <mem_trim+0x2e>
 80198ee:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 80198f0:	683b      	ldr	r3, [r7, #0]
 80198f2:	429a      	cmp	r2, r3
 80198f4:	d201      	bcs.n	80198fa <mem_trim+0x32>
    return NULL;
 80198f6:	2300      	movs	r3, #0
 80198f8:	e0d0      	b.n	8019a9c <mem_trim+0x1d4>
  }

  LWIP_ASSERT("mem_trim: legal memory", (u8_t *)rmem >= (u8_t *)ram &&
 80198fa:	4b6b      	ldr	r3, [pc, #428]	@ (8019aa8 <mem_trim+0x1e0>)
 80198fc:	681b      	ldr	r3, [r3, #0]
 80198fe:	687a      	ldr	r2, [r7, #4]
 8019900:	429a      	cmp	r2, r3
 8019902:	d304      	bcc.n	801990e <mem_trim+0x46>
 8019904:	4b69      	ldr	r3, [pc, #420]	@ (8019aac <mem_trim+0x1e4>)
 8019906:	681b      	ldr	r3, [r3, #0]
 8019908:	687a      	ldr	r2, [r7, #4]
 801990a:	429a      	cmp	r2, r3
 801990c:	d306      	bcc.n	801991c <mem_trim+0x54>
 801990e:	4b68      	ldr	r3, [pc, #416]	@ (8019ab0 <mem_trim+0x1e8>)
 8019910:	f240 22d1 	movw	r2, #721	@ 0x2d1
 8019914:	4967      	ldr	r1, [pc, #412]	@ (8019ab4 <mem_trim+0x1ec>)
 8019916:	4868      	ldr	r0, [pc, #416]	@ (8019ab8 <mem_trim+0x1f0>)
 8019918:	f010 fc50 	bl	802a1bc <iprintf>
              (u8_t *)rmem < (u8_t *)ram_end);

  if ((u8_t *)rmem < (u8_t *)ram || (u8_t *)rmem >= (u8_t *)ram_end) {
 801991c:	4b62      	ldr	r3, [pc, #392]	@ (8019aa8 <mem_trim+0x1e0>)
 801991e:	681b      	ldr	r3, [r3, #0]
 8019920:	687a      	ldr	r2, [r7, #4]
 8019922:	429a      	cmp	r2, r3
 8019924:	d304      	bcc.n	8019930 <mem_trim+0x68>
 8019926:	4b61      	ldr	r3, [pc, #388]	@ (8019aac <mem_trim+0x1e4>)
 8019928:	681b      	ldr	r3, [r3, #0]
 801992a:	687a      	ldr	r2, [r7, #4]
 801992c:	429a      	cmp	r2, r3
 801992e:	d307      	bcc.n	8019940 <mem_trim+0x78>
    LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_LEVEL_SEVERE, ("mem_trim: illegal memory\n"));
    /* protect mem stats from concurrent access */
    MEM_STATS_INC_LOCKED(illegal);
 8019930:	f00d f9ae 	bl	8026c90 <sys_arch_protect>
 8019934:	60b8      	str	r0, [r7, #8]
 8019936:	68b8      	ldr	r0, [r7, #8]
 8019938:	f00d f9b8 	bl	8026cac <sys_arch_unprotect>
    return rmem;
 801993c:	687b      	ldr	r3, [r7, #4]
 801993e:	e0ad      	b.n	8019a9c <mem_trim+0x1d4>
  }
  /* Get the corresponding struct mem ... */
  /* cast through void* to get rid of alignment warnings */
  mem = (struct mem *)(void *)((u8_t *)rmem - (SIZEOF_STRUCT_MEM + MEM_SANITY_OFFSET));
 8019940:	687b      	ldr	r3, [r7, #4]
 8019942:	3b0c      	subs	r3, #12
 8019944:	623b      	str	r3, [r7, #32]
#if MEM_OVERFLOW_CHECK
  mem_overflow_check_element(mem);
#endif
  /* ... and its offset pointer */
  ptr = mem_to_ptr(mem);
 8019946:	6a38      	ldr	r0, [r7, #32]
 8019948:	f7ff fdf0 	bl	801952c <mem_to_ptr>
 801994c:	61f8      	str	r0, [r7, #28]

  size = (mem_size_t)((mem_size_t)(mem->next - ptr) - (SIZEOF_STRUCT_MEM + MEM_SANITY_OVERHEAD));
 801994e:	6a3b      	ldr	r3, [r7, #32]
 8019950:	681a      	ldr	r2, [r3, #0]
 8019952:	69fb      	ldr	r3, [r7, #28]
 8019954:	1ad3      	subs	r3, r2, r3
 8019956:	3b0c      	subs	r3, #12
 8019958:	61bb      	str	r3, [r7, #24]
  LWIP_ASSERT("mem_trim can only shrink memory", newsize <= size);
 801995a:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 801995c:	69bb      	ldr	r3, [r7, #24]
 801995e:	429a      	cmp	r2, r3
 8019960:	d906      	bls.n	8019970 <mem_trim+0xa8>
 8019962:	4b53      	ldr	r3, [pc, #332]	@ (8019ab0 <mem_trim+0x1e8>)
 8019964:	f44f 7239 	mov.w	r2, #740	@ 0x2e4
 8019968:	4954      	ldr	r1, [pc, #336]	@ (8019abc <mem_trim+0x1f4>)
 801996a:	4853      	ldr	r0, [pc, #332]	@ (8019ab8 <mem_trim+0x1f0>)
 801996c:	f010 fc26 	bl	802a1bc <iprintf>
  if (newsize > size) {
 8019970:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8019972:	69bb      	ldr	r3, [r7, #24]
 8019974:	429a      	cmp	r2, r3
 8019976:	d901      	bls.n	801997c <mem_trim+0xb4>
    /* not supported */
    return NULL;
 8019978:	2300      	movs	r3, #0
 801997a:	e08f      	b.n	8019a9c <mem_trim+0x1d4>
  }
  if (newsize == size) {
 801997c:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 801997e:	69bb      	ldr	r3, [r7, #24]
 8019980:	429a      	cmp	r2, r3
 8019982:	d101      	bne.n	8019988 <mem_trim+0xc0>
    /* No change in size, simply return */
    return rmem;
 8019984:	687b      	ldr	r3, [r7, #4]
 8019986:	e089      	b.n	8019a9c <mem_trim+0x1d4>
  }

  /* protect the heap from concurrent access */
  LWIP_MEM_FREE_PROTECT();
 8019988:	484d      	ldr	r0, [pc, #308]	@ (8019ac0 <mem_trim+0x1f8>)
 801998a:	f00d f945 	bl	8026c18 <sys_mutex_lock>

  mem2 = ptr_to_mem(mem->next);
 801998e:	6a3b      	ldr	r3, [r7, #32]
 8019990:	681b      	ldr	r3, [r3, #0]
 8019992:	4618      	mov	r0, r3
 8019994:	f7ff fdba 	bl	801950c <ptr_to_mem>
 8019998:	6178      	str	r0, [r7, #20]
  if (mem2->used == 0) {
 801999a:	697b      	ldr	r3, [r7, #20]
 801999c:	7a1b      	ldrb	r3, [r3, #8]
 801999e:	2b00      	cmp	r3, #0
 80199a0:	d13c      	bne.n	8019a1c <mem_trim+0x154>
    /* The next struct is unused, we can simply move it at little */
    mem_size_t next;
    LWIP_ASSERT("invalid next ptr", mem->next != MEM_SIZE_ALIGNED);
 80199a2:	6a3b      	ldr	r3, [r7, #32]
 80199a4:	681b      	ldr	r3, [r3, #0]
 80199a6:	4a3f      	ldr	r2, [pc, #252]	@ (8019aa4 <mem_trim+0x1dc>)
 80199a8:	4293      	cmp	r3, r2
 80199aa:	d106      	bne.n	80199ba <mem_trim+0xf2>
 80199ac:	4b40      	ldr	r3, [pc, #256]	@ (8019ab0 <mem_trim+0x1e8>)
 80199ae:	f240 22f5 	movw	r2, #757	@ 0x2f5
 80199b2:	4944      	ldr	r1, [pc, #272]	@ (8019ac4 <mem_trim+0x1fc>)
 80199b4:	4840      	ldr	r0, [pc, #256]	@ (8019ab8 <mem_trim+0x1f0>)
 80199b6:	f010 fc01 	bl	802a1bc <iprintf>
    /* remember the old next pointer */
    next = mem2->next;
 80199ba:	697b      	ldr	r3, [r7, #20]
 80199bc:	681b      	ldr	r3, [r3, #0]
 80199be:	60fb      	str	r3, [r7, #12]
    /* create new struct mem which is moved directly after the shrinked mem */
    ptr2 = (mem_size_t)(ptr + SIZEOF_STRUCT_MEM + newsize);
 80199c0:	69fa      	ldr	r2, [r7, #28]
 80199c2:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80199c4:	4413      	add	r3, r2
 80199c6:	330c      	adds	r3, #12
 80199c8:	613b      	str	r3, [r7, #16]
    if (lfree == mem2) {
 80199ca:	4b3f      	ldr	r3, [pc, #252]	@ (8019ac8 <mem_trim+0x200>)
 80199cc:	681b      	ldr	r3, [r3, #0]
 80199ce:	697a      	ldr	r2, [r7, #20]
 80199d0:	429a      	cmp	r2, r3
 80199d2:	d105      	bne.n	80199e0 <mem_trim+0x118>
      lfree = ptr_to_mem(ptr2);
 80199d4:	6938      	ldr	r0, [r7, #16]
 80199d6:	f7ff fd99 	bl	801950c <ptr_to_mem>
 80199da:	4603      	mov	r3, r0
 80199dc:	4a3a      	ldr	r2, [pc, #232]	@ (8019ac8 <mem_trim+0x200>)
 80199de:	6013      	str	r3, [r2, #0]
    }
    mem2 = ptr_to_mem(ptr2);
 80199e0:	6938      	ldr	r0, [r7, #16]
 80199e2:	f7ff fd93 	bl	801950c <ptr_to_mem>
 80199e6:	6178      	str	r0, [r7, #20]
    mem2->used = 0;
 80199e8:	697b      	ldr	r3, [r7, #20]
 80199ea:	2200      	movs	r2, #0
 80199ec:	721a      	strb	r2, [r3, #8]
    /* restore the next pointer */
    mem2->next = next;
 80199ee:	697b      	ldr	r3, [r7, #20]
 80199f0:	68fa      	ldr	r2, [r7, #12]
 80199f2:	601a      	str	r2, [r3, #0]
    /* link it back to mem */
    mem2->prev = ptr;
 80199f4:	697b      	ldr	r3, [r7, #20]
 80199f6:	69fa      	ldr	r2, [r7, #28]
 80199f8:	605a      	str	r2, [r3, #4]
    /* link mem to it */
    mem->next = ptr2;
 80199fa:	6a3b      	ldr	r3, [r7, #32]
 80199fc:	693a      	ldr	r2, [r7, #16]
 80199fe:	601a      	str	r2, [r3, #0]
    /* last thing to restore linked list: as we have moved mem2,
     * let 'mem2->next->prev' point to mem2 again. but only if mem2->next is not
     * the end of the heap */
    if (mem2->next != MEM_SIZE_ALIGNED) {
 8019a00:	697b      	ldr	r3, [r7, #20]
 8019a02:	681b      	ldr	r3, [r3, #0]
 8019a04:	4a27      	ldr	r2, [pc, #156]	@ (8019aa4 <mem_trim+0x1dc>)
 8019a06:	4293      	cmp	r3, r2
 8019a08:	d044      	beq.n	8019a94 <mem_trim+0x1cc>
      ptr_to_mem(mem2->next)->prev = ptr2;
 8019a0a:	697b      	ldr	r3, [r7, #20]
 8019a0c:	681b      	ldr	r3, [r3, #0]
 8019a0e:	4618      	mov	r0, r3
 8019a10:	f7ff fd7c 	bl	801950c <ptr_to_mem>
 8019a14:	4602      	mov	r2, r0
 8019a16:	693b      	ldr	r3, [r7, #16]
 8019a18:	6053      	str	r3, [r2, #4]
 8019a1a:	e03b      	b.n	8019a94 <mem_trim+0x1cc>
    }
    MEM_STATS_DEC_USED(used, (size - newsize));
    /* no need to plug holes, we've already done that */
  } else if (newsize + SIZEOF_STRUCT_MEM + MIN_SIZE_ALIGNED <= size) {
 8019a1c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8019a1e:	3318      	adds	r3, #24
 8019a20:	69ba      	ldr	r2, [r7, #24]
 8019a22:	429a      	cmp	r2, r3
 8019a24:	d336      	bcc.n	8019a94 <mem_trim+0x1cc>
     * Old size ('size') must be big enough to contain at least 'newsize' plus a struct mem
     * ('SIZEOF_STRUCT_MEM') with some data ('MIN_SIZE_ALIGNED').
     * @todo we could leave out MIN_SIZE_ALIGNED. We would create an empty
     *       region that couldn't hold data, but when mem->next gets freed,
     *       the 2 regions would be combined, resulting in more free memory */
    ptr2 = (mem_size_t)(ptr + SIZEOF_STRUCT_MEM + newsize);
 8019a26:	69fa      	ldr	r2, [r7, #28]
 8019a28:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8019a2a:	4413      	add	r3, r2
 8019a2c:	330c      	adds	r3, #12
 8019a2e:	613b      	str	r3, [r7, #16]
    LWIP_ASSERT("invalid next ptr", mem->next != MEM_SIZE_ALIGNED);
 8019a30:	6a3b      	ldr	r3, [r7, #32]
 8019a32:	681b      	ldr	r3, [r3, #0]
 8019a34:	4a1b      	ldr	r2, [pc, #108]	@ (8019aa4 <mem_trim+0x1dc>)
 8019a36:	4293      	cmp	r3, r2
 8019a38:	d106      	bne.n	8019a48 <mem_trim+0x180>
 8019a3a:	4b1d      	ldr	r3, [pc, #116]	@ (8019ab0 <mem_trim+0x1e8>)
 8019a3c:	f240 3216 	movw	r2, #790	@ 0x316
 8019a40:	4920      	ldr	r1, [pc, #128]	@ (8019ac4 <mem_trim+0x1fc>)
 8019a42:	481d      	ldr	r0, [pc, #116]	@ (8019ab8 <mem_trim+0x1f0>)
 8019a44:	f010 fbba 	bl	802a1bc <iprintf>
    mem2 = ptr_to_mem(ptr2);
 8019a48:	6938      	ldr	r0, [r7, #16]
 8019a4a:	f7ff fd5f 	bl	801950c <ptr_to_mem>
 8019a4e:	6178      	str	r0, [r7, #20]
    if (mem2 < lfree) {
 8019a50:	4b1d      	ldr	r3, [pc, #116]	@ (8019ac8 <mem_trim+0x200>)
 8019a52:	681b      	ldr	r3, [r3, #0]
 8019a54:	697a      	ldr	r2, [r7, #20]
 8019a56:	429a      	cmp	r2, r3
 8019a58:	d202      	bcs.n	8019a60 <mem_trim+0x198>
      lfree = mem2;
 8019a5a:	4a1b      	ldr	r2, [pc, #108]	@ (8019ac8 <mem_trim+0x200>)
 8019a5c:	697b      	ldr	r3, [r7, #20]
 8019a5e:	6013      	str	r3, [r2, #0]
    }
    mem2->used = 0;
 8019a60:	697b      	ldr	r3, [r7, #20]
 8019a62:	2200      	movs	r2, #0
 8019a64:	721a      	strb	r2, [r3, #8]
    mem2->next = mem->next;
 8019a66:	6a3b      	ldr	r3, [r7, #32]
 8019a68:	681a      	ldr	r2, [r3, #0]
 8019a6a:	697b      	ldr	r3, [r7, #20]
 8019a6c:	601a      	str	r2, [r3, #0]
    mem2->prev = ptr;
 8019a6e:	697b      	ldr	r3, [r7, #20]
 8019a70:	69fa      	ldr	r2, [r7, #28]
 8019a72:	605a      	str	r2, [r3, #4]
    mem->next = ptr2;
 8019a74:	6a3b      	ldr	r3, [r7, #32]
 8019a76:	693a      	ldr	r2, [r7, #16]
 8019a78:	601a      	str	r2, [r3, #0]
    if (mem2->next != MEM_SIZE_ALIGNED) {
 8019a7a:	697b      	ldr	r3, [r7, #20]
 8019a7c:	681b      	ldr	r3, [r3, #0]
 8019a7e:	4a09      	ldr	r2, [pc, #36]	@ (8019aa4 <mem_trim+0x1dc>)
 8019a80:	4293      	cmp	r3, r2
 8019a82:	d007      	beq.n	8019a94 <mem_trim+0x1cc>
      ptr_to_mem(mem2->next)->prev = ptr2;
 8019a84:	697b      	ldr	r3, [r7, #20]
 8019a86:	681b      	ldr	r3, [r3, #0]
 8019a88:	4618      	mov	r0, r3
 8019a8a:	f7ff fd3f 	bl	801950c <ptr_to_mem>
 8019a8e:	4602      	mov	r2, r0
 8019a90:	693b      	ldr	r3, [r7, #16]
 8019a92:	6053      	str	r3, [r2, #4]
#endif
  MEM_SANITY();
#if LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT
  mem_free_count = 1;
#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */
  LWIP_MEM_FREE_UNPROTECT();
 8019a94:	480a      	ldr	r0, [pc, #40]	@ (8019ac0 <mem_trim+0x1f8>)
 8019a96:	f00d f8ce 	bl	8026c36 <sys_mutex_unlock>
  return rmem;
 8019a9a:	687b      	ldr	r3, [r7, #4]
}
 8019a9c:	4618      	mov	r0, r3
 8019a9e:	3728      	adds	r7, #40	@ 0x28
 8019aa0:	46bd      	mov	sp, r7
 8019aa2:	bd80      	pop	{r7, pc}
 8019aa4:	0001ffe8 	.word	0x0001ffe8
 8019aa8:	24024420 	.word	0x24024420
 8019aac:	24024424 	.word	0x24024424
 8019ab0:	0802e310 	.word	0x0802e310
 8019ab4:	0802e49c 	.word	0x0802e49c
 8019ab8:	0802e358 	.word	0x0802e358
 8019abc:	0802e4b4 	.word	0x0802e4b4
 8019ac0:	24024428 	.word	0x24024428
 8019ac4:	0802e4d4 	.word	0x0802e4d4
 8019ac8:	2402442c 	.word	0x2402442c

08019acc <mem_malloc>:
 *
 * Note that the returned value will always be aligned (as defined by MEM_ALIGNMENT).
 */
void *
mem_malloc(mem_size_t size_in)
{
 8019acc:	b580      	push	{r7, lr}
 8019ace:	b088      	sub	sp, #32
 8019ad0:	af00      	add	r7, sp, #0
 8019ad2:	6078      	str	r0, [r7, #4]
#if LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT
  u8_t local_mem_free_count = 0;
#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */
  LWIP_MEM_ALLOC_DECL_PROTECT();

  if (size_in == 0) {
 8019ad4:	687b      	ldr	r3, [r7, #4]
 8019ad6:	2b00      	cmp	r3, #0
 8019ad8:	d101      	bne.n	8019ade <mem_malloc+0x12>
    return NULL;
 8019ada:	2300      	movs	r3, #0
 8019adc:	e0d9      	b.n	8019c92 <mem_malloc+0x1c6>
  }

  /* Expand the size of the allocated memory region so that we can
     adjust for alignment. */
  size = (mem_size_t)LWIP_MEM_ALIGN_SIZE(size_in);
 8019ade:	687b      	ldr	r3, [r7, #4]
 8019ae0:	3303      	adds	r3, #3
 8019ae2:	f023 0303 	bic.w	r3, r3, #3
 8019ae6:	61bb      	str	r3, [r7, #24]
  if (size < MIN_SIZE_ALIGNED) {
 8019ae8:	69bb      	ldr	r3, [r7, #24]
 8019aea:	2b0b      	cmp	r3, #11
 8019aec:	d801      	bhi.n	8019af2 <mem_malloc+0x26>
    /* every data block must be at least MIN_SIZE_ALIGNED long */
    size = MIN_SIZE_ALIGNED;
 8019aee:	230c      	movs	r3, #12
 8019af0:	61bb      	str	r3, [r7, #24]
  }
#if MEM_OVERFLOW_CHECK
  size += MEM_SANITY_REGION_BEFORE_ALIGNED + MEM_SANITY_REGION_AFTER_ALIGNED;
#endif
  if ((size > MEM_SIZE_ALIGNED) || (size < size_in)) {
 8019af2:	69bb      	ldr	r3, [r7, #24]
 8019af4:	4a69      	ldr	r2, [pc, #420]	@ (8019c9c <mem_malloc+0x1d0>)
 8019af6:	4293      	cmp	r3, r2
 8019af8:	d803      	bhi.n	8019b02 <mem_malloc+0x36>
 8019afa:	69ba      	ldr	r2, [r7, #24]
 8019afc:	687b      	ldr	r3, [r7, #4]
 8019afe:	429a      	cmp	r2, r3
 8019b00:	d201      	bcs.n	8019b06 <mem_malloc+0x3a>
    return NULL;
 8019b02:	2300      	movs	r3, #0
 8019b04:	e0c5      	b.n	8019c92 <mem_malloc+0x1c6>
  }

  /* protect the heap from concurrent access */
  sys_mutex_lock(&mem_mutex);
 8019b06:	4866      	ldr	r0, [pc, #408]	@ (8019ca0 <mem_malloc+0x1d4>)
 8019b08:	f00d f886 	bl	8026c18 <sys_mutex_lock>
#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */

    /* Scan through the heap searching for a free block that is big enough,
     * beginning with the lowest free block.
     */
    for (ptr = mem_to_ptr(lfree); ptr < MEM_SIZE_ALIGNED - size;
 8019b0c:	4b65      	ldr	r3, [pc, #404]	@ (8019ca4 <mem_malloc+0x1d8>)
 8019b0e:	681b      	ldr	r3, [r3, #0]
 8019b10:	4618      	mov	r0, r3
 8019b12:	f7ff fd0b 	bl	801952c <mem_to_ptr>
 8019b16:	61f8      	str	r0, [r7, #28]
 8019b18:	e0b0      	b.n	8019c7c <mem_malloc+0x1b0>
         ptr = ptr_to_mem(ptr)->next) {
      mem = ptr_to_mem(ptr);
 8019b1a:	69f8      	ldr	r0, [r7, #28]
 8019b1c:	f7ff fcf6 	bl	801950c <ptr_to_mem>
 8019b20:	6138      	str	r0, [r7, #16]
        local_mem_free_count = 1;
        break;
      }
#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */

      if ((!mem->used) &&
 8019b22:	693b      	ldr	r3, [r7, #16]
 8019b24:	7a1b      	ldrb	r3, [r3, #8]
 8019b26:	2b00      	cmp	r3, #0
 8019b28:	f040 80a2 	bne.w	8019c70 <mem_malloc+0x1a4>
          (mem->next - (ptr + SIZEOF_STRUCT_MEM)) >= size) {
 8019b2c:	693b      	ldr	r3, [r7, #16]
 8019b2e:	681a      	ldr	r2, [r3, #0]
 8019b30:	69fb      	ldr	r3, [r7, #28]
 8019b32:	1ad3      	subs	r3, r2, r3
 8019b34:	3b0c      	subs	r3, #12
      if ((!mem->used) &&
 8019b36:	69ba      	ldr	r2, [r7, #24]
 8019b38:	429a      	cmp	r2, r3
 8019b3a:	f200 8099 	bhi.w	8019c70 <mem_malloc+0x1a4>
        /* mem is not used and at least perfect fit is possible:
         * mem->next - (ptr + SIZEOF_STRUCT_MEM) gives us the 'user data size' of mem */

        if (mem->next - (ptr + SIZEOF_STRUCT_MEM) >= (size + SIZEOF_STRUCT_MEM + MIN_SIZE_ALIGNED)) {
 8019b3e:	693b      	ldr	r3, [r7, #16]
 8019b40:	681a      	ldr	r2, [r3, #0]
 8019b42:	69fb      	ldr	r3, [r7, #28]
 8019b44:	1ad3      	subs	r3, r2, r3
 8019b46:	f1a3 020c 	sub.w	r2, r3, #12
 8019b4a:	69bb      	ldr	r3, [r7, #24]
 8019b4c:	3318      	adds	r3, #24
 8019b4e:	429a      	cmp	r2, r3
 8019b50:	d331      	bcc.n	8019bb6 <mem_malloc+0xea>
           * struct mem would fit in but no data between mem2 and mem2->next
           * @todo we could leave out MIN_SIZE_ALIGNED. We would create an empty
           *       region that couldn't hold data, but when mem->next gets freed,
           *       the 2 regions would be combined, resulting in more free memory
           */
          ptr2 = (mem_size_t)(ptr + SIZEOF_STRUCT_MEM + size);
 8019b52:	69fa      	ldr	r2, [r7, #28]
 8019b54:	69bb      	ldr	r3, [r7, #24]
 8019b56:	4413      	add	r3, r2
 8019b58:	330c      	adds	r3, #12
 8019b5a:	60fb      	str	r3, [r7, #12]
          LWIP_ASSERT("invalid next ptr",ptr2 != MEM_SIZE_ALIGNED);
 8019b5c:	68fb      	ldr	r3, [r7, #12]
 8019b5e:	4a4f      	ldr	r2, [pc, #316]	@ (8019c9c <mem_malloc+0x1d0>)
 8019b60:	4293      	cmp	r3, r2
 8019b62:	d106      	bne.n	8019b72 <mem_malloc+0xa6>
 8019b64:	4b50      	ldr	r3, [pc, #320]	@ (8019ca8 <mem_malloc+0x1dc>)
 8019b66:	f240 3287 	movw	r2, #903	@ 0x387
 8019b6a:	4950      	ldr	r1, [pc, #320]	@ (8019cac <mem_malloc+0x1e0>)
 8019b6c:	4850      	ldr	r0, [pc, #320]	@ (8019cb0 <mem_malloc+0x1e4>)
 8019b6e:	f010 fb25 	bl	802a1bc <iprintf>
          /* create mem2 struct */
          mem2 = ptr_to_mem(ptr2);
 8019b72:	68f8      	ldr	r0, [r7, #12]
 8019b74:	f7ff fcca 	bl	801950c <ptr_to_mem>
 8019b78:	60b8      	str	r0, [r7, #8]
          mem2->used = 0;
 8019b7a:	68bb      	ldr	r3, [r7, #8]
 8019b7c:	2200      	movs	r2, #0
 8019b7e:	721a      	strb	r2, [r3, #8]
          mem2->next = mem->next;
 8019b80:	693b      	ldr	r3, [r7, #16]
 8019b82:	681a      	ldr	r2, [r3, #0]
 8019b84:	68bb      	ldr	r3, [r7, #8]
 8019b86:	601a      	str	r2, [r3, #0]
          mem2->prev = ptr;
 8019b88:	68bb      	ldr	r3, [r7, #8]
 8019b8a:	69fa      	ldr	r2, [r7, #28]
 8019b8c:	605a      	str	r2, [r3, #4]
          /* and insert it between mem and mem->next */
          mem->next = ptr2;
 8019b8e:	693b      	ldr	r3, [r7, #16]
 8019b90:	68fa      	ldr	r2, [r7, #12]
 8019b92:	601a      	str	r2, [r3, #0]
          mem->used = 1;
 8019b94:	693b      	ldr	r3, [r7, #16]
 8019b96:	2201      	movs	r2, #1
 8019b98:	721a      	strb	r2, [r3, #8]

          if (mem2->next != MEM_SIZE_ALIGNED) {
 8019b9a:	68bb      	ldr	r3, [r7, #8]
 8019b9c:	681b      	ldr	r3, [r3, #0]
 8019b9e:	4a3f      	ldr	r2, [pc, #252]	@ (8019c9c <mem_malloc+0x1d0>)
 8019ba0:	4293      	cmp	r3, r2
 8019ba2:	d00b      	beq.n	8019bbc <mem_malloc+0xf0>
            ptr_to_mem(mem2->next)->prev = ptr2;
 8019ba4:	68bb      	ldr	r3, [r7, #8]
 8019ba6:	681b      	ldr	r3, [r3, #0]
 8019ba8:	4618      	mov	r0, r3
 8019baa:	f7ff fcaf 	bl	801950c <ptr_to_mem>
 8019bae:	4602      	mov	r2, r0
 8019bb0:	68fb      	ldr	r3, [r7, #12]
 8019bb2:	6053      	str	r3, [r2, #4]
 8019bb4:	e002      	b.n	8019bbc <mem_malloc+0xf0>
           * take care of this).
           * -> near fit or exact fit: do not split, no mem2 creation
           * also can't move mem->next directly behind mem, since mem->next
           * will always be used at this point!
           */
          mem->used = 1;
 8019bb6:	693b      	ldr	r3, [r7, #16]
 8019bb8:	2201      	movs	r2, #1
 8019bba:	721a      	strb	r2, [r3, #8]
          MEM_STATS_INC_USED(used, mem->next - mem_to_ptr(mem));
        }
#if LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT
mem_malloc_adjust_lfree:
#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */
        if (mem == lfree) {
 8019bbc:	4b39      	ldr	r3, [pc, #228]	@ (8019ca4 <mem_malloc+0x1d8>)
 8019bbe:	681b      	ldr	r3, [r3, #0]
 8019bc0:	693a      	ldr	r2, [r7, #16]
 8019bc2:	429a      	cmp	r2, r3
 8019bc4:	d127      	bne.n	8019c16 <mem_malloc+0x14a>
          struct mem *cur = lfree;
 8019bc6:	4b37      	ldr	r3, [pc, #220]	@ (8019ca4 <mem_malloc+0x1d8>)
 8019bc8:	681b      	ldr	r3, [r3, #0]
 8019bca:	617b      	str	r3, [r7, #20]
          /* Find next free block after mem and update lowest free pointer */
          while (cur->used && cur != ram_end) {
 8019bcc:	e005      	b.n	8019bda <mem_malloc+0x10e>
              /* If mem_free or mem_trim have run, we have to restart since they
                 could have altered our current struct mem or lfree. */
              goto mem_malloc_adjust_lfree;
            }
#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */
            cur = ptr_to_mem(cur->next);
 8019bce:	697b      	ldr	r3, [r7, #20]
 8019bd0:	681b      	ldr	r3, [r3, #0]
 8019bd2:	4618      	mov	r0, r3
 8019bd4:	f7ff fc9a 	bl	801950c <ptr_to_mem>
 8019bd8:	6178      	str	r0, [r7, #20]
          while (cur->used && cur != ram_end) {
 8019bda:	697b      	ldr	r3, [r7, #20]
 8019bdc:	7a1b      	ldrb	r3, [r3, #8]
 8019bde:	2b00      	cmp	r3, #0
 8019be0:	d004      	beq.n	8019bec <mem_malloc+0x120>
 8019be2:	4b34      	ldr	r3, [pc, #208]	@ (8019cb4 <mem_malloc+0x1e8>)
 8019be4:	681b      	ldr	r3, [r3, #0]
 8019be6:	697a      	ldr	r2, [r7, #20]
 8019be8:	429a      	cmp	r2, r3
 8019bea:	d1f0      	bne.n	8019bce <mem_malloc+0x102>
          }
          lfree = cur;
 8019bec:	4a2d      	ldr	r2, [pc, #180]	@ (8019ca4 <mem_malloc+0x1d8>)
 8019bee:	697b      	ldr	r3, [r7, #20]
 8019bf0:	6013      	str	r3, [r2, #0]
          LWIP_ASSERT("mem_malloc: !lfree->used", ((lfree == ram_end) || (!lfree->used)));
 8019bf2:	4b2c      	ldr	r3, [pc, #176]	@ (8019ca4 <mem_malloc+0x1d8>)
 8019bf4:	681a      	ldr	r2, [r3, #0]
 8019bf6:	4b2f      	ldr	r3, [pc, #188]	@ (8019cb4 <mem_malloc+0x1e8>)
 8019bf8:	681b      	ldr	r3, [r3, #0]
 8019bfa:	429a      	cmp	r2, r3
 8019bfc:	d00b      	beq.n	8019c16 <mem_malloc+0x14a>
 8019bfe:	4b29      	ldr	r3, [pc, #164]	@ (8019ca4 <mem_malloc+0x1d8>)
 8019c00:	681b      	ldr	r3, [r3, #0]
 8019c02:	7a1b      	ldrb	r3, [r3, #8]
 8019c04:	2b00      	cmp	r3, #0
 8019c06:	d006      	beq.n	8019c16 <mem_malloc+0x14a>
 8019c08:	4b27      	ldr	r3, [pc, #156]	@ (8019ca8 <mem_malloc+0x1dc>)
 8019c0a:	f240 32b5 	movw	r2, #949	@ 0x3b5
 8019c0e:	492a      	ldr	r1, [pc, #168]	@ (8019cb8 <mem_malloc+0x1ec>)
 8019c10:	4827      	ldr	r0, [pc, #156]	@ (8019cb0 <mem_malloc+0x1e4>)
 8019c12:	f010 fad3 	bl	802a1bc <iprintf>
        }
        LWIP_MEM_ALLOC_UNPROTECT();
        sys_mutex_unlock(&mem_mutex);
 8019c16:	4822      	ldr	r0, [pc, #136]	@ (8019ca0 <mem_malloc+0x1d4>)
 8019c18:	f00d f80d 	bl	8026c36 <sys_mutex_unlock>
        LWIP_ASSERT("mem_malloc: allocated memory not above ram_end.",
 8019c1c:	693a      	ldr	r2, [r7, #16]
 8019c1e:	69bb      	ldr	r3, [r7, #24]
 8019c20:	4413      	add	r3, r2
 8019c22:	330c      	adds	r3, #12
 8019c24:	4a23      	ldr	r2, [pc, #140]	@ (8019cb4 <mem_malloc+0x1e8>)
 8019c26:	6812      	ldr	r2, [r2, #0]
 8019c28:	4293      	cmp	r3, r2
 8019c2a:	d906      	bls.n	8019c3a <mem_malloc+0x16e>
 8019c2c:	4b1e      	ldr	r3, [pc, #120]	@ (8019ca8 <mem_malloc+0x1dc>)
 8019c2e:	f240 32b9 	movw	r2, #953	@ 0x3b9
 8019c32:	4922      	ldr	r1, [pc, #136]	@ (8019cbc <mem_malloc+0x1f0>)
 8019c34:	481e      	ldr	r0, [pc, #120]	@ (8019cb0 <mem_malloc+0x1e4>)
 8019c36:	f010 fac1 	bl	802a1bc <iprintf>
                    (mem_ptr_t)mem + SIZEOF_STRUCT_MEM + size <= (mem_ptr_t)ram_end);
        LWIP_ASSERT("mem_malloc: allocated memory properly aligned.",
 8019c3a:	693b      	ldr	r3, [r7, #16]
 8019c3c:	f003 0303 	and.w	r3, r3, #3
 8019c40:	2b00      	cmp	r3, #0
 8019c42:	d006      	beq.n	8019c52 <mem_malloc+0x186>
 8019c44:	4b18      	ldr	r3, [pc, #96]	@ (8019ca8 <mem_malloc+0x1dc>)
 8019c46:	f240 32bb 	movw	r2, #955	@ 0x3bb
 8019c4a:	491d      	ldr	r1, [pc, #116]	@ (8019cc0 <mem_malloc+0x1f4>)
 8019c4c:	4818      	ldr	r0, [pc, #96]	@ (8019cb0 <mem_malloc+0x1e4>)
 8019c4e:	f010 fab5 	bl	802a1bc <iprintf>
                    ((mem_ptr_t)mem + SIZEOF_STRUCT_MEM) % MEM_ALIGNMENT == 0);
        LWIP_ASSERT("mem_malloc: sanity check alignment",
 8019c52:	693b      	ldr	r3, [r7, #16]
 8019c54:	f003 0303 	and.w	r3, r3, #3
 8019c58:	2b00      	cmp	r3, #0
 8019c5a:	d006      	beq.n	8019c6a <mem_malloc+0x19e>
 8019c5c:	4b12      	ldr	r3, [pc, #72]	@ (8019ca8 <mem_malloc+0x1dc>)
 8019c5e:	f240 32bd 	movw	r2, #957	@ 0x3bd
 8019c62:	4918      	ldr	r1, [pc, #96]	@ (8019cc4 <mem_malloc+0x1f8>)
 8019c64:	4812      	ldr	r0, [pc, #72]	@ (8019cb0 <mem_malloc+0x1e4>)
 8019c66:	f010 faa9 	bl	802a1bc <iprintf>

#if MEM_OVERFLOW_CHECK
        mem_overflow_init_element(mem, size_in);
#endif
        MEM_SANITY();
        return (u8_t *)mem + SIZEOF_STRUCT_MEM + MEM_SANITY_OFFSET;
 8019c6a:	693b      	ldr	r3, [r7, #16]
 8019c6c:	330c      	adds	r3, #12
 8019c6e:	e010      	b.n	8019c92 <mem_malloc+0x1c6>
         ptr = ptr_to_mem(ptr)->next) {
 8019c70:	69f8      	ldr	r0, [r7, #28]
 8019c72:	f7ff fc4b 	bl	801950c <ptr_to_mem>
 8019c76:	4603      	mov	r3, r0
 8019c78:	681b      	ldr	r3, [r3, #0]
 8019c7a:	61fb      	str	r3, [r7, #28]
    for (ptr = mem_to_ptr(lfree); ptr < MEM_SIZE_ALIGNED - size;
 8019c7c:	69ba      	ldr	r2, [r7, #24]
 8019c7e:	4b07      	ldr	r3, [pc, #28]	@ (8019c9c <mem_malloc+0x1d0>)
 8019c80:	1a9b      	subs	r3, r3, r2
 8019c82:	69fa      	ldr	r2, [r7, #28]
 8019c84:	429a      	cmp	r2, r3
 8019c86:	f4ff af48 	bcc.w	8019b1a <mem_malloc+0x4e>
    /* if we got interrupted by a mem_free, try again */
  } while (local_mem_free_count != 0);
#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */
  MEM_STATS_INC(err);
  LWIP_MEM_ALLOC_UNPROTECT();
  sys_mutex_unlock(&mem_mutex);
 8019c8a:	4805      	ldr	r0, [pc, #20]	@ (8019ca0 <mem_malloc+0x1d4>)
 8019c8c:	f00c ffd3 	bl	8026c36 <sys_mutex_unlock>
  LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("mem_malloc: could not allocate %"S16_F" bytes\n", (s16_t)size));
  return NULL;
 8019c90:	2300      	movs	r3, #0
}
 8019c92:	4618      	mov	r0, r3
 8019c94:	3720      	adds	r7, #32
 8019c96:	46bd      	mov	sp, r7
 8019c98:	bd80      	pop	{r7, pc}
 8019c9a:	bf00      	nop
 8019c9c:	0001ffe8 	.word	0x0001ffe8
 8019ca0:	24024428 	.word	0x24024428
 8019ca4:	2402442c 	.word	0x2402442c
 8019ca8:	0802e310 	.word	0x0802e310
 8019cac:	0802e4d4 	.word	0x0802e4d4
 8019cb0:	0802e358 	.word	0x0802e358
 8019cb4:	24024424 	.word	0x24024424
 8019cb8:	0802e4e8 	.word	0x0802e4e8
 8019cbc:	0802e504 	.word	0x0802e504
 8019cc0:	0802e534 	.word	0x0802e534
 8019cc4:	0802e564 	.word	0x0802e564

08019cc8 <memp_init_pool>:
 *
 * @param desc pool to initialize
 */
void
memp_init_pool(const struct memp_desc *desc)
{
 8019cc8:	b480      	push	{r7}
 8019cca:	b085      	sub	sp, #20
 8019ccc:	af00      	add	r7, sp, #0
 8019cce:	6078      	str	r0, [r7, #4]
  LWIP_UNUSED_ARG(desc);
#else
  int i;
  struct memp *memp;

  *desc->tab = NULL;
 8019cd0:	687b      	ldr	r3, [r7, #4]
 8019cd2:	68db      	ldr	r3, [r3, #12]
 8019cd4:	2200      	movs	r2, #0
 8019cd6:	601a      	str	r2, [r3, #0]
  memp = (struct memp *)LWIP_MEM_ALIGN(desc->base);
 8019cd8:	687b      	ldr	r3, [r7, #4]
 8019cda:	689b      	ldr	r3, [r3, #8]
 8019cdc:	3303      	adds	r3, #3
 8019cde:	f023 0303 	bic.w	r3, r3, #3
 8019ce2:	60bb      	str	r3, [r7, #8]
                                       + MEM_SANITY_REGION_AFTER_ALIGNED
#endif
                                      ));
#endif
  /* create a linked list of memp elements */
  for (i = 0; i < desc->num; ++i) {
 8019ce4:	2300      	movs	r3, #0
 8019ce6:	60fb      	str	r3, [r7, #12]
 8019ce8:	e011      	b.n	8019d0e <memp_init_pool+0x46>
    memp->next = *desc->tab;
 8019cea:	687b      	ldr	r3, [r7, #4]
 8019cec:	68db      	ldr	r3, [r3, #12]
 8019cee:	681a      	ldr	r2, [r3, #0]
 8019cf0:	68bb      	ldr	r3, [r7, #8]
 8019cf2:	601a      	str	r2, [r3, #0]
    *desc->tab = memp;
 8019cf4:	687b      	ldr	r3, [r7, #4]
 8019cf6:	68db      	ldr	r3, [r3, #12]
 8019cf8:	68ba      	ldr	r2, [r7, #8]
 8019cfa:	601a      	str	r2, [r3, #0]
#if MEMP_OVERFLOW_CHECK
    memp_overflow_init_element(memp, desc);
#endif /* MEMP_OVERFLOW_CHECK */
    /* cast through void* to get rid of alignment warnings */
    memp = (struct memp *)(void *)((u8_t *)memp + MEMP_SIZE + desc->size
 8019cfc:	687b      	ldr	r3, [r7, #4]
 8019cfe:	889b      	ldrh	r3, [r3, #4]
 8019d00:	461a      	mov	r2, r3
 8019d02:	68bb      	ldr	r3, [r7, #8]
 8019d04:	4413      	add	r3, r2
 8019d06:	60bb      	str	r3, [r7, #8]
  for (i = 0; i < desc->num; ++i) {
 8019d08:	68fb      	ldr	r3, [r7, #12]
 8019d0a:	3301      	adds	r3, #1
 8019d0c:	60fb      	str	r3, [r7, #12]
 8019d0e:	687b      	ldr	r3, [r7, #4]
 8019d10:	88db      	ldrh	r3, [r3, #6]
 8019d12:	461a      	mov	r2, r3
 8019d14:	68fb      	ldr	r3, [r7, #12]
 8019d16:	4293      	cmp	r3, r2
 8019d18:	dbe7      	blt.n	8019cea <memp_init_pool+0x22>
#endif /* !MEMP_MEM_MALLOC */

#if MEMP_STATS && (defined(LWIP_DEBUG) || LWIP_STATS_DISPLAY)
  desc->stats->name  = desc->desc;
#endif /* MEMP_STATS && (defined(LWIP_DEBUG) || LWIP_STATS_DISPLAY) */
}
 8019d1a:	bf00      	nop
 8019d1c:	bf00      	nop
 8019d1e:	3714      	adds	r7, #20
 8019d20:	46bd      	mov	sp, r7
 8019d22:	f85d 7b04 	ldr.w	r7, [sp], #4
 8019d26:	4770      	bx	lr

08019d28 <memp_init>:
 *
 * Carves out memp_memory into linked lists for each pool-type.
 */
void
memp_init(void)
{
 8019d28:	b580      	push	{r7, lr}
 8019d2a:	b082      	sub	sp, #8
 8019d2c:	af00      	add	r7, sp, #0
  u16_t i;

  /* for every pool: */
  for (i = 0; i < LWIP_ARRAYSIZE(memp_pools); i++) {
 8019d2e:	2300      	movs	r3, #0
 8019d30:	80fb      	strh	r3, [r7, #6]
 8019d32:	e009      	b.n	8019d48 <memp_init+0x20>
    memp_init_pool(memp_pools[i]);
 8019d34:	88fb      	ldrh	r3, [r7, #6]
 8019d36:	4a08      	ldr	r2, [pc, #32]	@ (8019d58 <memp_init+0x30>)
 8019d38:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
 8019d3c:	4618      	mov	r0, r3
 8019d3e:	f7ff ffc3 	bl	8019cc8 <memp_init_pool>
  for (i = 0; i < LWIP_ARRAYSIZE(memp_pools); i++) {
 8019d42:	88fb      	ldrh	r3, [r7, #6]
 8019d44:	3301      	adds	r3, #1
 8019d46:	80fb      	strh	r3, [r7, #6]
 8019d48:	88fb      	ldrh	r3, [r7, #6]
 8019d4a:	2b0c      	cmp	r3, #12
 8019d4c:	d9f2      	bls.n	8019d34 <memp_init+0xc>

#if MEMP_OVERFLOW_CHECK >= 2
  /* check everything a first time to see if it worked */
  memp_overflow_check_all();
#endif /* MEMP_OVERFLOW_CHECK >= 2 */
}
 8019d4e:	bf00      	nop
 8019d50:	bf00      	nop
 8019d52:	3708      	adds	r7, #8
 8019d54:	46bd      	mov	sp, r7
 8019d56:	bd80      	pop	{r7, pc}
 8019d58:	08031470 	.word	0x08031470

08019d5c <do_memp_malloc_pool>:
#if !MEMP_OVERFLOW_CHECK
do_memp_malloc_pool(const struct memp_desc *desc)
#else
do_memp_malloc_pool_fn(const struct memp_desc *desc, const char *file, const int line)
#endif
{
 8019d5c:	b580      	push	{r7, lr}
 8019d5e:	b084      	sub	sp, #16
 8019d60:	af00      	add	r7, sp, #0
 8019d62:	6078      	str	r0, [r7, #4]

#if MEMP_MEM_MALLOC
  memp = (struct memp *)mem_malloc(MEMP_SIZE + MEMP_ALIGN_SIZE(desc->size));
  SYS_ARCH_PROTECT(old_level);
#else /* MEMP_MEM_MALLOC */
  SYS_ARCH_PROTECT(old_level);
 8019d64:	f00c ff94 	bl	8026c90 <sys_arch_protect>
 8019d68:	60f8      	str	r0, [r7, #12]

  memp = *desc->tab;
 8019d6a:	687b      	ldr	r3, [r7, #4]
 8019d6c:	68db      	ldr	r3, [r3, #12]
 8019d6e:	681b      	ldr	r3, [r3, #0]
 8019d70:	60bb      	str	r3, [r7, #8]
#endif /* MEMP_MEM_MALLOC */

  if (memp != NULL) {
 8019d72:	68bb      	ldr	r3, [r7, #8]
 8019d74:	2b00      	cmp	r3, #0
 8019d76:	d015      	beq.n	8019da4 <do_memp_malloc_pool+0x48>
#if !MEMP_MEM_MALLOC
#if MEMP_OVERFLOW_CHECK == 1
    memp_overflow_check_element(memp, desc);
#endif /* MEMP_OVERFLOW_CHECK */

    *desc->tab = memp->next;
 8019d78:	687b      	ldr	r3, [r7, #4]
 8019d7a:	68db      	ldr	r3, [r3, #12]
 8019d7c:	68ba      	ldr	r2, [r7, #8]
 8019d7e:	6812      	ldr	r2, [r2, #0]
 8019d80:	601a      	str	r2, [r3, #0]
    memp->line = line;
#if MEMP_MEM_MALLOC
    memp_overflow_init_element(memp, desc);
#endif /* MEMP_MEM_MALLOC */
#endif /* MEMP_OVERFLOW_CHECK */
    LWIP_ASSERT("memp_malloc: memp properly aligned",
 8019d82:	68bb      	ldr	r3, [r7, #8]
 8019d84:	f003 0303 	and.w	r3, r3, #3
 8019d88:	2b00      	cmp	r3, #0
 8019d8a:	d006      	beq.n	8019d9a <do_memp_malloc_pool+0x3e>
 8019d8c:	4b09      	ldr	r3, [pc, #36]	@ (8019db4 <do_memp_malloc_pool+0x58>)
 8019d8e:	f44f 728c 	mov.w	r2, #280	@ 0x118
 8019d92:	4909      	ldr	r1, [pc, #36]	@ (8019db8 <do_memp_malloc_pool+0x5c>)
 8019d94:	4809      	ldr	r0, [pc, #36]	@ (8019dbc <do_memp_malloc_pool+0x60>)
 8019d96:	f010 fa11 	bl	802a1bc <iprintf>
    desc->stats->used++;
    if (desc->stats->used > desc->stats->max) {
      desc->stats->max = desc->stats->used;
    }
#endif
    SYS_ARCH_UNPROTECT(old_level);
 8019d9a:	68f8      	ldr	r0, [r7, #12]
 8019d9c:	f00c ff86 	bl	8026cac <sys_arch_unprotect>
    /* cast through u8_t* to get rid of alignment warnings */
    return ((u8_t *)memp + MEMP_SIZE);
 8019da0:	68bb      	ldr	r3, [r7, #8]
 8019da2:	e003      	b.n	8019dac <do_memp_malloc_pool+0x50>
  } else {
#if MEMP_STATS
    desc->stats->err++;
#endif
    SYS_ARCH_UNPROTECT(old_level);
 8019da4:	68f8      	ldr	r0, [r7, #12]
 8019da6:	f00c ff81 	bl	8026cac <sys_arch_unprotect>
    LWIP_DEBUGF(MEMP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("memp_malloc: out of memory in pool %s\n", desc->desc));
  }

  return NULL;
 8019daa:	2300      	movs	r3, #0
}
 8019dac:	4618      	mov	r0, r3
 8019dae:	3710      	adds	r7, #16
 8019db0:	46bd      	mov	sp, r7
 8019db2:	bd80      	pop	{r7, pc}
 8019db4:	0802e620 	.word	0x0802e620
 8019db8:	0802e650 	.word	0x0802e650
 8019dbc:	0802e674 	.word	0x0802e674

08019dc0 <memp_malloc_pool>:
#if !MEMP_OVERFLOW_CHECK
memp_malloc_pool(const struct memp_desc *desc)
#else
memp_malloc_pool_fn(const struct memp_desc *desc, const char *file, const int line)
#endif
{
 8019dc0:	b580      	push	{r7, lr}
 8019dc2:	b082      	sub	sp, #8
 8019dc4:	af00      	add	r7, sp, #0
 8019dc6:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT("invalid pool desc", desc != NULL);
 8019dc8:	687b      	ldr	r3, [r7, #4]
 8019dca:	2b00      	cmp	r3, #0
 8019dcc:	d106      	bne.n	8019ddc <memp_malloc_pool+0x1c>
 8019dce:	4b0a      	ldr	r3, [pc, #40]	@ (8019df8 <memp_malloc_pool+0x38>)
 8019dd0:	f44f 729e 	mov.w	r2, #316	@ 0x13c
 8019dd4:	4909      	ldr	r1, [pc, #36]	@ (8019dfc <memp_malloc_pool+0x3c>)
 8019dd6:	480a      	ldr	r0, [pc, #40]	@ (8019e00 <memp_malloc_pool+0x40>)
 8019dd8:	f010 f9f0 	bl	802a1bc <iprintf>
  if (desc == NULL) {
 8019ddc:	687b      	ldr	r3, [r7, #4]
 8019dde:	2b00      	cmp	r3, #0
 8019de0:	d101      	bne.n	8019de6 <memp_malloc_pool+0x26>
    return NULL;
 8019de2:	2300      	movs	r3, #0
 8019de4:	e003      	b.n	8019dee <memp_malloc_pool+0x2e>
  }

#if !MEMP_OVERFLOW_CHECK
  return do_memp_malloc_pool(desc);
 8019de6:	6878      	ldr	r0, [r7, #4]
 8019de8:	f7ff ffb8 	bl	8019d5c <do_memp_malloc_pool>
 8019dec:	4603      	mov	r3, r0
#else
  return do_memp_malloc_pool_fn(desc, file, line);
#endif
}
 8019dee:	4618      	mov	r0, r3
 8019df0:	3708      	adds	r7, #8
 8019df2:	46bd      	mov	sp, r7
 8019df4:	bd80      	pop	{r7, pc}
 8019df6:	bf00      	nop
 8019df8:	0802e620 	.word	0x0802e620
 8019dfc:	0802e69c 	.word	0x0802e69c
 8019e00:	0802e674 	.word	0x0802e674

08019e04 <memp_malloc>:
#if !MEMP_OVERFLOW_CHECK
memp_malloc(memp_t type)
#else
memp_malloc_fn(memp_t type, const char *file, const int line)
#endif
{
 8019e04:	b580      	push	{r7, lr}
 8019e06:	b084      	sub	sp, #16
 8019e08:	af00      	add	r7, sp, #0
 8019e0a:	4603      	mov	r3, r0
 8019e0c:	71fb      	strb	r3, [r7, #7]
  void *memp;
  LWIP_ERROR("memp_malloc: type < MEMP_MAX", (type < MEMP_MAX), return NULL;);
 8019e0e:	79fb      	ldrb	r3, [r7, #7]
 8019e10:	2b0c      	cmp	r3, #12
 8019e12:	d908      	bls.n	8019e26 <memp_malloc+0x22>
 8019e14:	4b0a      	ldr	r3, [pc, #40]	@ (8019e40 <memp_malloc+0x3c>)
 8019e16:	f240 1257 	movw	r2, #343	@ 0x157
 8019e1a:	490a      	ldr	r1, [pc, #40]	@ (8019e44 <memp_malloc+0x40>)
 8019e1c:	480a      	ldr	r0, [pc, #40]	@ (8019e48 <memp_malloc+0x44>)
 8019e1e:	f010 f9cd 	bl	802a1bc <iprintf>
 8019e22:	2300      	movs	r3, #0
 8019e24:	e008      	b.n	8019e38 <memp_malloc+0x34>
#if MEMP_OVERFLOW_CHECK >= 2
  memp_overflow_check_all();
#endif /* MEMP_OVERFLOW_CHECK >= 2 */

#if !MEMP_OVERFLOW_CHECK
  memp = do_memp_malloc_pool(memp_pools[type]);
 8019e26:	79fb      	ldrb	r3, [r7, #7]
 8019e28:	4a08      	ldr	r2, [pc, #32]	@ (8019e4c <memp_malloc+0x48>)
 8019e2a:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
 8019e2e:	4618      	mov	r0, r3
 8019e30:	f7ff ff94 	bl	8019d5c <do_memp_malloc_pool>
 8019e34:	60f8      	str	r0, [r7, #12]
#else
  memp = do_memp_malloc_pool_fn(memp_pools[type], file, line);
#endif

  return memp;
 8019e36:	68fb      	ldr	r3, [r7, #12]
}
 8019e38:	4618      	mov	r0, r3
 8019e3a:	3710      	adds	r7, #16
 8019e3c:	46bd      	mov	sp, r7
 8019e3e:	bd80      	pop	{r7, pc}
 8019e40:	0802e620 	.word	0x0802e620
 8019e44:	0802e6b0 	.word	0x0802e6b0
 8019e48:	0802e674 	.word	0x0802e674
 8019e4c:	08031470 	.word	0x08031470

08019e50 <do_memp_free_pool>:

static void
do_memp_free_pool(const struct memp_desc *desc, void *mem)
{
 8019e50:	b580      	push	{r7, lr}
 8019e52:	b084      	sub	sp, #16
 8019e54:	af00      	add	r7, sp, #0
 8019e56:	6078      	str	r0, [r7, #4]
 8019e58:	6039      	str	r1, [r7, #0]
  struct memp *memp;
  SYS_ARCH_DECL_PROTECT(old_level);

  LWIP_ASSERT("memp_free: mem properly aligned",
 8019e5a:	683b      	ldr	r3, [r7, #0]
 8019e5c:	f003 0303 	and.w	r3, r3, #3
 8019e60:	2b00      	cmp	r3, #0
 8019e62:	d006      	beq.n	8019e72 <do_memp_free_pool+0x22>
 8019e64:	4b0d      	ldr	r3, [pc, #52]	@ (8019e9c <do_memp_free_pool+0x4c>)
 8019e66:	f44f 72b6 	mov.w	r2, #364	@ 0x16c
 8019e6a:	490d      	ldr	r1, [pc, #52]	@ (8019ea0 <do_memp_free_pool+0x50>)
 8019e6c:	480d      	ldr	r0, [pc, #52]	@ (8019ea4 <do_memp_free_pool+0x54>)
 8019e6e:	f010 f9a5 	bl	802a1bc <iprintf>
              ((mem_ptr_t)mem % MEM_ALIGNMENT) == 0);

  /* cast through void* to get rid of alignment warnings */
  memp = (struct memp *)(void *)((u8_t *)mem - MEMP_SIZE);
 8019e72:	683b      	ldr	r3, [r7, #0]
 8019e74:	60fb      	str	r3, [r7, #12]

  SYS_ARCH_PROTECT(old_level);
 8019e76:	f00c ff0b 	bl	8026c90 <sys_arch_protect>
 8019e7a:	60b8      	str	r0, [r7, #8]
#if MEMP_MEM_MALLOC
  LWIP_UNUSED_ARG(desc);
  SYS_ARCH_UNPROTECT(old_level);
  mem_free(memp);
#else /* MEMP_MEM_MALLOC */
  memp->next = *desc->tab;
 8019e7c:	687b      	ldr	r3, [r7, #4]
 8019e7e:	68db      	ldr	r3, [r3, #12]
 8019e80:	681a      	ldr	r2, [r3, #0]
 8019e82:	68fb      	ldr	r3, [r7, #12]
 8019e84:	601a      	str	r2, [r3, #0]
  *desc->tab = memp;
 8019e86:	687b      	ldr	r3, [r7, #4]
 8019e88:	68db      	ldr	r3, [r3, #12]
 8019e8a:	68fa      	ldr	r2, [r7, #12]
 8019e8c:	601a      	str	r2, [r3, #0]

#if MEMP_SANITY_CHECK
  LWIP_ASSERT("memp sanity", memp_sanity(desc));
#endif /* MEMP_SANITY_CHECK */

  SYS_ARCH_UNPROTECT(old_level);
 8019e8e:	68b8      	ldr	r0, [r7, #8]
 8019e90:	f00c ff0c 	bl	8026cac <sys_arch_unprotect>
#endif /* !MEMP_MEM_MALLOC */
}
 8019e94:	bf00      	nop
 8019e96:	3710      	adds	r7, #16
 8019e98:	46bd      	mov	sp, r7
 8019e9a:	bd80      	pop	{r7, pc}
 8019e9c:	0802e620 	.word	0x0802e620
 8019ea0:	0802e6d0 	.word	0x0802e6d0
 8019ea4:	0802e674 	.word	0x0802e674

08019ea8 <memp_free_pool>:
 * @param desc the pool where to put mem
 * @param mem the memp element to free
 */
void
memp_free_pool(const struct memp_desc *desc, void *mem)
{
 8019ea8:	b580      	push	{r7, lr}
 8019eaa:	b082      	sub	sp, #8
 8019eac:	af00      	add	r7, sp, #0
 8019eae:	6078      	str	r0, [r7, #4]
 8019eb0:	6039      	str	r1, [r7, #0]
  LWIP_ASSERT("invalid pool desc", desc != NULL);
 8019eb2:	687b      	ldr	r3, [r7, #4]
 8019eb4:	2b00      	cmp	r3, #0
 8019eb6:	d106      	bne.n	8019ec6 <memp_free_pool+0x1e>
 8019eb8:	4b0a      	ldr	r3, [pc, #40]	@ (8019ee4 <memp_free_pool+0x3c>)
 8019eba:	f240 1295 	movw	r2, #405	@ 0x195
 8019ebe:	490a      	ldr	r1, [pc, #40]	@ (8019ee8 <memp_free_pool+0x40>)
 8019ec0:	480a      	ldr	r0, [pc, #40]	@ (8019eec <memp_free_pool+0x44>)
 8019ec2:	f010 f97b 	bl	802a1bc <iprintf>
  if ((desc == NULL) || (mem == NULL)) {
 8019ec6:	687b      	ldr	r3, [r7, #4]
 8019ec8:	2b00      	cmp	r3, #0
 8019eca:	d007      	beq.n	8019edc <memp_free_pool+0x34>
 8019ecc:	683b      	ldr	r3, [r7, #0]
 8019ece:	2b00      	cmp	r3, #0
 8019ed0:	d004      	beq.n	8019edc <memp_free_pool+0x34>
    return;
  }

  do_memp_free_pool(desc, mem);
 8019ed2:	6839      	ldr	r1, [r7, #0]
 8019ed4:	6878      	ldr	r0, [r7, #4]
 8019ed6:	f7ff ffbb 	bl	8019e50 <do_memp_free_pool>
 8019eda:	e000      	b.n	8019ede <memp_free_pool+0x36>
    return;
 8019edc:	bf00      	nop
}
 8019ede:	3708      	adds	r7, #8
 8019ee0:	46bd      	mov	sp, r7
 8019ee2:	bd80      	pop	{r7, pc}
 8019ee4:	0802e620 	.word	0x0802e620
 8019ee8:	0802e69c 	.word	0x0802e69c
 8019eec:	0802e674 	.word	0x0802e674

08019ef0 <memp_free>:
 * @param type the pool where to put mem
 * @param mem the memp element to free
 */
void
memp_free(memp_t type, void *mem)
{
 8019ef0:	b580      	push	{r7, lr}
 8019ef2:	b082      	sub	sp, #8
 8019ef4:	af00      	add	r7, sp, #0
 8019ef6:	4603      	mov	r3, r0
 8019ef8:	6039      	str	r1, [r7, #0]
 8019efa:	71fb      	strb	r3, [r7, #7]
#ifdef LWIP_HOOK_MEMP_AVAILABLE
  struct memp *old_first;
#endif

  LWIP_ERROR("memp_free: type < MEMP_MAX", (type < MEMP_MAX), return;);
 8019efc:	79fb      	ldrb	r3, [r7, #7]
 8019efe:	2b0c      	cmp	r3, #12
 8019f00:	d907      	bls.n	8019f12 <memp_free+0x22>
 8019f02:	4b0c      	ldr	r3, [pc, #48]	@ (8019f34 <memp_free+0x44>)
 8019f04:	f44f 72d5 	mov.w	r2, #426	@ 0x1aa
 8019f08:	490b      	ldr	r1, [pc, #44]	@ (8019f38 <memp_free+0x48>)
 8019f0a:	480c      	ldr	r0, [pc, #48]	@ (8019f3c <memp_free+0x4c>)
 8019f0c:	f010 f956 	bl	802a1bc <iprintf>
 8019f10:	e00c      	b.n	8019f2c <memp_free+0x3c>

  if (mem == NULL) {
 8019f12:	683b      	ldr	r3, [r7, #0]
 8019f14:	2b00      	cmp	r3, #0
 8019f16:	d008      	beq.n	8019f2a <memp_free+0x3a>

#ifdef LWIP_HOOK_MEMP_AVAILABLE
  old_first = *memp_pools[type]->tab;
#endif

  do_memp_free_pool(memp_pools[type], mem);
 8019f18:	79fb      	ldrb	r3, [r7, #7]
 8019f1a:	4a09      	ldr	r2, [pc, #36]	@ (8019f40 <memp_free+0x50>)
 8019f1c:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
 8019f20:	6839      	ldr	r1, [r7, #0]
 8019f22:	4618      	mov	r0, r3
 8019f24:	f7ff ff94 	bl	8019e50 <do_memp_free_pool>
 8019f28:	e000      	b.n	8019f2c <memp_free+0x3c>
    return;
 8019f2a:	bf00      	nop
#ifdef LWIP_HOOK_MEMP_AVAILABLE
  if (old_first == NULL) {
    LWIP_HOOK_MEMP_AVAILABLE(type);
  }
#endif
}
 8019f2c:	3708      	adds	r7, #8
 8019f2e:	46bd      	mov	sp, r7
 8019f30:	bd80      	pop	{r7, pc}
 8019f32:	bf00      	nop
 8019f34:	0802e620 	.word	0x0802e620
 8019f38:	0802e6f0 	.word	0x0802e6f0
 8019f3c:	0802e674 	.word	0x0802e674
 8019f40:	08031470 	.word	0x08031470

08019f44 <netif_init>:
}
#endif /* LWIP_HAVE_LOOPIF */

void
netif_init(void)
{
 8019f44:	b480      	push	{r7}
 8019f46:	af00      	add	r7, sp, #0

  netif_set_link_up(&loop_netif);
  netif_set_up(&loop_netif);

#endif /* LWIP_HAVE_LOOPIF */
}
 8019f48:	bf00      	nop
 8019f4a:	46bd      	mov	sp, r7
 8019f4c:	f85d 7b04 	ldr.w	r7, [sp], #4
 8019f50:	4770      	bx	lr
	...

08019f54 <netif_add>:
netif_add(struct netif *netif,
#if LWIP_IPV4
          const ip4_addr_t *ipaddr, const ip4_addr_t *netmask, const ip4_addr_t *gw,
#endif /* LWIP_IPV4 */
          void *state, netif_init_fn init, netif_input_fn input)
{
 8019f54:	b580      	push	{r7, lr}
 8019f56:	b086      	sub	sp, #24
 8019f58:	af00      	add	r7, sp, #0
 8019f5a:	60f8      	str	r0, [r7, #12]
 8019f5c:	60b9      	str	r1, [r7, #8]
 8019f5e:	607a      	str	r2, [r7, #4]
 8019f60:	603b      	str	r3, [r7, #0]
#if LWIP_IPV6
  s8_t i;
#endif

  LWIP_ASSERT_CORE_LOCKED();
 8019f62:	f7f6 fd8b 	bl	8010a7c <sys_check_core_locking>
    LWIP_ASSERT("single netif already set", 0);
    return NULL;
  }
#endif

  LWIP_ERROR("netif_add: invalid netif", netif != NULL, return NULL);
 8019f66:	68fb      	ldr	r3, [r7, #12]
 8019f68:	2b00      	cmp	r3, #0
 8019f6a:	d108      	bne.n	8019f7e <netif_add+0x2a>
 8019f6c:	4b5b      	ldr	r3, [pc, #364]	@ (801a0dc <netif_add+0x188>)
 8019f6e:	f240 1227 	movw	r2, #295	@ 0x127
 8019f72:	495b      	ldr	r1, [pc, #364]	@ (801a0e0 <netif_add+0x18c>)
 8019f74:	485b      	ldr	r0, [pc, #364]	@ (801a0e4 <netif_add+0x190>)
 8019f76:	f010 f921 	bl	802a1bc <iprintf>
 8019f7a:	2300      	movs	r3, #0
 8019f7c:	e0a9      	b.n	801a0d2 <netif_add+0x17e>
  LWIP_ERROR("netif_add: No init function given", init != NULL, return NULL);
 8019f7e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8019f80:	2b00      	cmp	r3, #0
 8019f82:	d108      	bne.n	8019f96 <netif_add+0x42>
 8019f84:	4b55      	ldr	r3, [pc, #340]	@ (801a0dc <netif_add+0x188>)
 8019f86:	f44f 7294 	mov.w	r2, #296	@ 0x128
 8019f8a:	4957      	ldr	r1, [pc, #348]	@ (801a0e8 <netif_add+0x194>)
 8019f8c:	4855      	ldr	r0, [pc, #340]	@ (801a0e4 <netif_add+0x190>)
 8019f8e:	f010 f915 	bl	802a1bc <iprintf>
 8019f92:	2300      	movs	r3, #0
 8019f94:	e09d      	b.n	801a0d2 <netif_add+0x17e>

#if LWIP_IPV4
  if (ipaddr == NULL) {
 8019f96:	68bb      	ldr	r3, [r7, #8]
 8019f98:	2b00      	cmp	r3, #0
 8019f9a:	d101      	bne.n	8019fa0 <netif_add+0x4c>
    ipaddr = ip_2_ip4(IP4_ADDR_ANY);
 8019f9c:	4b53      	ldr	r3, [pc, #332]	@ (801a0ec <netif_add+0x198>)
 8019f9e:	60bb      	str	r3, [r7, #8]
  }
  if (netmask == NULL) {
 8019fa0:	687b      	ldr	r3, [r7, #4]
 8019fa2:	2b00      	cmp	r3, #0
 8019fa4:	d101      	bne.n	8019faa <netif_add+0x56>
    netmask = ip_2_ip4(IP4_ADDR_ANY);
 8019fa6:	4b51      	ldr	r3, [pc, #324]	@ (801a0ec <netif_add+0x198>)
 8019fa8:	607b      	str	r3, [r7, #4]
  }
  if (gw == NULL) {
 8019faa:	683b      	ldr	r3, [r7, #0]
 8019fac:	2b00      	cmp	r3, #0
 8019fae:	d101      	bne.n	8019fb4 <netif_add+0x60>
    gw = ip_2_ip4(IP4_ADDR_ANY);
 8019fb0:	4b4e      	ldr	r3, [pc, #312]	@ (801a0ec <netif_add+0x198>)
 8019fb2:	603b      	str	r3, [r7, #0]
  }

  /* reset new interface configuration state */
  ip_addr_set_zero_ip4(&netif->ip_addr);
 8019fb4:	68fb      	ldr	r3, [r7, #12]
 8019fb6:	2200      	movs	r2, #0
 8019fb8:	605a      	str	r2, [r3, #4]
  ip_addr_set_zero_ip4(&netif->netmask);
 8019fba:	68fb      	ldr	r3, [r7, #12]
 8019fbc:	2200      	movs	r2, #0
 8019fbe:	609a      	str	r2, [r3, #8]
  ip_addr_set_zero_ip4(&netif->gw);
 8019fc0:	68fb      	ldr	r3, [r7, #12]
 8019fc2:	2200      	movs	r2, #0
 8019fc4:	60da      	str	r2, [r3, #12]
  netif->output = netif_null_output_ip4;
 8019fc6:	68fb      	ldr	r3, [r7, #12]
 8019fc8:	4a49      	ldr	r2, [pc, #292]	@ (801a0f0 <netif_add+0x19c>)
 8019fca:	615a      	str	r2, [r3, #20]
#endif /* LWIP_IPV6_ADDRESS_LIFETIMES */
  }
  netif->output_ip6 = netif_null_output_ip6;
#endif /* LWIP_IPV6 */
  NETIF_SET_CHECKSUM_CTRL(netif, NETIF_CHECKSUM_ENABLE_ALL);
  netif->mtu = 0;
 8019fcc:	68fb      	ldr	r3, [r7, #12]
 8019fce:	2200      	movs	r2, #0
 8019fd0:	851a      	strh	r2, [r3, #40]	@ 0x28
  netif->flags = 0;
 8019fd2:	68fb      	ldr	r3, [r7, #12]
 8019fd4:	2200      	movs	r2, #0
 8019fd6:	f883 2031 	strb.w	r2, [r3, #49]	@ 0x31
#ifdef netif_get_client_data
  memset(netif->client_data, 0, sizeof(netif->client_data));
 8019fda:	68fb      	ldr	r3, [r7, #12]
 8019fdc:	3324      	adds	r3, #36	@ 0x24
 8019fde:	2204      	movs	r2, #4
 8019fe0:	2100      	movs	r1, #0
 8019fe2:	4618      	mov	r0, r3
 8019fe4:	f010 fa7c 	bl	802a4e0 <memset>
#endif /* LWIP_IPV6 */
#if LWIP_NETIF_STATUS_CALLBACK
  netif->status_callback = NULL;
#endif /* LWIP_NETIF_STATUS_CALLBACK */
#if LWIP_NETIF_LINK_CALLBACK
  netif->link_callback = NULL;
 8019fe8:	68fb      	ldr	r3, [r7, #12]
 8019fea:	2200      	movs	r2, #0
 8019fec:	61da      	str	r2, [r3, #28]
  netif->loop_first = NULL;
  netif->loop_last = NULL;
#endif /* ENABLE_LOOPBACK */

  /* remember netif specific state information data */
  netif->state = state;
 8019fee:	68fb      	ldr	r3, [r7, #12]
 8019ff0:	6a3a      	ldr	r2, [r7, #32]
 8019ff2:	621a      	str	r2, [r3, #32]
  netif->num = netif_num;
 8019ff4:	4b3f      	ldr	r3, [pc, #252]	@ (801a0f4 <netif_add+0x1a0>)
 8019ff6:	781a      	ldrb	r2, [r3, #0]
 8019ff8:	68fb      	ldr	r3, [r7, #12]
 8019ffa:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34
  netif->input = input;
 8019ffe:	68fb      	ldr	r3, [r7, #12]
 801a000:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 801a002:	611a      	str	r2, [r3, #16]
#if ENABLE_LOOPBACK && LWIP_LOOPBACK_MAX_PBUFS
  netif->loop_cnt_current = 0;
#endif /* ENABLE_LOOPBACK && LWIP_LOOPBACK_MAX_PBUFS */

#if LWIP_IPV4
  netif_set_addr(netif, ipaddr, netmask, gw);
 801a004:	683b      	ldr	r3, [r7, #0]
 801a006:	687a      	ldr	r2, [r7, #4]
 801a008:	68b9      	ldr	r1, [r7, #8]
 801a00a:	68f8      	ldr	r0, [r7, #12]
 801a00c:	f000 f914 	bl	801a238 <netif_set_addr>
#endif /* LWIP_IPV4 */

  /* call user specified initialization function for netif */
  if (init(netif) != ERR_OK) {
 801a010:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801a012:	68f8      	ldr	r0, [r7, #12]
 801a014:	4798      	blx	r3
 801a016:	4603      	mov	r3, r0
 801a018:	2b00      	cmp	r3, #0
 801a01a:	d001      	beq.n	801a020 <netif_add+0xcc>
    return NULL;
 801a01c:	2300      	movs	r3, #0
 801a01e:	e058      	b.n	801a0d2 <netif_add+0x17e>
     */
  {
    struct netif *netif2;
    int num_netifs;
    do {
      if (netif->num == 255) {
 801a020:	68fb      	ldr	r3, [r7, #12]
 801a022:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 801a026:	2bff      	cmp	r3, #255	@ 0xff
 801a028:	d103      	bne.n	801a032 <netif_add+0xde>
        netif->num = 0;
 801a02a:	68fb      	ldr	r3, [r7, #12]
 801a02c:	2200      	movs	r2, #0
 801a02e:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34
      }
      num_netifs = 0;
 801a032:	2300      	movs	r3, #0
 801a034:	613b      	str	r3, [r7, #16]
      for (netif2 = netif_list; netif2 != NULL; netif2 = netif2->next) {
 801a036:	4b30      	ldr	r3, [pc, #192]	@ (801a0f8 <netif_add+0x1a4>)
 801a038:	681b      	ldr	r3, [r3, #0]
 801a03a:	617b      	str	r3, [r7, #20]
 801a03c:	e02b      	b.n	801a096 <netif_add+0x142>
        LWIP_ASSERT("netif already added", netif2 != netif);
 801a03e:	697a      	ldr	r2, [r7, #20]
 801a040:	68fb      	ldr	r3, [r7, #12]
 801a042:	429a      	cmp	r2, r3
 801a044:	d106      	bne.n	801a054 <netif_add+0x100>
 801a046:	4b25      	ldr	r3, [pc, #148]	@ (801a0dc <netif_add+0x188>)
 801a048:	f240 128b 	movw	r2, #395	@ 0x18b
 801a04c:	492b      	ldr	r1, [pc, #172]	@ (801a0fc <netif_add+0x1a8>)
 801a04e:	4825      	ldr	r0, [pc, #148]	@ (801a0e4 <netif_add+0x190>)
 801a050:	f010 f8b4 	bl	802a1bc <iprintf>
        num_netifs++;
 801a054:	693b      	ldr	r3, [r7, #16]
 801a056:	3301      	adds	r3, #1
 801a058:	613b      	str	r3, [r7, #16]
        LWIP_ASSERT("too many netifs, max. supported number is 255", num_netifs <= 255);
 801a05a:	693b      	ldr	r3, [r7, #16]
 801a05c:	2bff      	cmp	r3, #255	@ 0xff
 801a05e:	dd06      	ble.n	801a06e <netif_add+0x11a>
 801a060:	4b1e      	ldr	r3, [pc, #120]	@ (801a0dc <netif_add+0x188>)
 801a062:	f240 128d 	movw	r2, #397	@ 0x18d
 801a066:	4926      	ldr	r1, [pc, #152]	@ (801a100 <netif_add+0x1ac>)
 801a068:	481e      	ldr	r0, [pc, #120]	@ (801a0e4 <netif_add+0x190>)
 801a06a:	f010 f8a7 	bl	802a1bc <iprintf>
        if (netif2->num == netif->num) {
 801a06e:	697b      	ldr	r3, [r7, #20]
 801a070:	f893 2034 	ldrb.w	r2, [r3, #52]	@ 0x34
 801a074:	68fb      	ldr	r3, [r7, #12]
 801a076:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 801a07a:	429a      	cmp	r2, r3
 801a07c:	d108      	bne.n	801a090 <netif_add+0x13c>
          netif->num++;
 801a07e:	68fb      	ldr	r3, [r7, #12]
 801a080:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 801a084:	3301      	adds	r3, #1
 801a086:	b2da      	uxtb	r2, r3
 801a088:	68fb      	ldr	r3, [r7, #12]
 801a08a:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34
          break;
 801a08e:	e005      	b.n	801a09c <netif_add+0x148>
      for (netif2 = netif_list; netif2 != NULL; netif2 = netif2->next) {
 801a090:	697b      	ldr	r3, [r7, #20]
 801a092:	681b      	ldr	r3, [r3, #0]
 801a094:	617b      	str	r3, [r7, #20]
 801a096:	697b      	ldr	r3, [r7, #20]
 801a098:	2b00      	cmp	r3, #0
 801a09a:	d1d0      	bne.n	801a03e <netif_add+0xea>
        }
      }
    } while (netif2 != NULL);
 801a09c:	697b      	ldr	r3, [r7, #20]
 801a09e:	2b00      	cmp	r3, #0
 801a0a0:	d1be      	bne.n	801a020 <netif_add+0xcc>
  }
  if (netif->num == 254) {
 801a0a2:	68fb      	ldr	r3, [r7, #12]
 801a0a4:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 801a0a8:	2bfe      	cmp	r3, #254	@ 0xfe
 801a0aa:	d103      	bne.n	801a0b4 <netif_add+0x160>
    netif_num = 0;
 801a0ac:	4b11      	ldr	r3, [pc, #68]	@ (801a0f4 <netif_add+0x1a0>)
 801a0ae:	2200      	movs	r2, #0
 801a0b0:	701a      	strb	r2, [r3, #0]
 801a0b2:	e006      	b.n	801a0c2 <netif_add+0x16e>
  } else {
    netif_num = (u8_t)(netif->num + 1);
 801a0b4:	68fb      	ldr	r3, [r7, #12]
 801a0b6:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 801a0ba:	3301      	adds	r3, #1
 801a0bc:	b2da      	uxtb	r2, r3
 801a0be:	4b0d      	ldr	r3, [pc, #52]	@ (801a0f4 <netif_add+0x1a0>)
 801a0c0:	701a      	strb	r2, [r3, #0]
  }

  /* add this netif to the list */
  netif->next = netif_list;
 801a0c2:	4b0d      	ldr	r3, [pc, #52]	@ (801a0f8 <netif_add+0x1a4>)
 801a0c4:	681a      	ldr	r2, [r3, #0]
 801a0c6:	68fb      	ldr	r3, [r7, #12]
 801a0c8:	601a      	str	r2, [r3, #0]
  netif_list = netif;
 801a0ca:	4a0b      	ldr	r2, [pc, #44]	@ (801a0f8 <netif_add+0x1a4>)
 801a0cc:	68fb      	ldr	r3, [r7, #12]
 801a0ce:	6013      	str	r3, [r2, #0]
#endif /* LWIP_IPV4 */
  LWIP_DEBUGF(NETIF_DEBUG, ("\n"));

  netif_invoke_ext_callback(netif, LWIP_NSC_NETIF_ADDED, NULL);

  return netif;
 801a0d0:	68fb      	ldr	r3, [r7, #12]
}
 801a0d2:	4618      	mov	r0, r3
 801a0d4:	3718      	adds	r7, #24
 801a0d6:	46bd      	mov	sp, r7
 801a0d8:	bd80      	pop	{r7, pc}
 801a0da:	bf00      	nop
 801a0dc:	0802e70c 	.word	0x0802e70c
 801a0e0:	0802e7a0 	.word	0x0802e7a0
 801a0e4:	0802e75c 	.word	0x0802e75c
 801a0e8:	0802e7bc 	.word	0x0802e7bc
 801a0ec:	080314f4 	.word	0x080314f4
 801a0f0:	0801a52f 	.word	0x0801a52f
 801a0f4:	2402af54 	.word	0x2402af54
 801a0f8:	2402af4c 	.word	0x2402af4c
 801a0fc:	0802e7e0 	.word	0x0802e7e0
 801a100:	0802e7f4 	.word	0x0802e7f4

0801a104 <netif_do_ip_addr_changed>:

static void
netif_do_ip_addr_changed(const ip_addr_t *old_addr, const ip_addr_t *new_addr)
{
 801a104:	b580      	push	{r7, lr}
 801a106:	b082      	sub	sp, #8
 801a108:	af00      	add	r7, sp, #0
 801a10a:	6078      	str	r0, [r7, #4]
 801a10c:	6039      	str	r1, [r7, #0]
#if LWIP_TCP
  tcp_netif_ip_addr_changed(old_addr, new_addr);
 801a10e:	6839      	ldr	r1, [r7, #0]
 801a110:	6878      	ldr	r0, [r7, #4]
 801a112:	f002 fe6f 	bl	801cdf4 <tcp_netif_ip_addr_changed>
#endif /* LWIP_TCP */
#if LWIP_UDP
  udp_netif_ip_addr_changed(old_addr, new_addr);
 801a116:	6839      	ldr	r1, [r7, #0]
 801a118:	6878      	ldr	r0, [r7, #4]
 801a11a:	f008 f82b 	bl	8022174 <udp_netif_ip_addr_changed>
#endif /* LWIP_UDP */
#if LWIP_RAW
  raw_netif_ip_addr_changed(old_addr, new_addr);
#endif /* LWIP_RAW */
}
 801a11e:	bf00      	nop
 801a120:	3708      	adds	r7, #8
 801a122:	46bd      	mov	sp, r7
 801a124:	bd80      	pop	{r7, pc}
	...

0801a128 <netif_do_set_ipaddr>:

#if LWIP_IPV4
static int
netif_do_set_ipaddr(struct netif *netif, const ip4_addr_t *ipaddr, ip_addr_t *old_addr)
{
 801a128:	b580      	push	{r7, lr}
 801a12a:	b086      	sub	sp, #24
 801a12c:	af00      	add	r7, sp, #0
 801a12e:	60f8      	str	r0, [r7, #12]
 801a130:	60b9      	str	r1, [r7, #8]
 801a132:	607a      	str	r2, [r7, #4]
  LWIP_ASSERT("invalid pointer", ipaddr != NULL);
 801a134:	68bb      	ldr	r3, [r7, #8]
 801a136:	2b00      	cmp	r3, #0
 801a138:	d106      	bne.n	801a148 <netif_do_set_ipaddr+0x20>
 801a13a:	4b1d      	ldr	r3, [pc, #116]	@ (801a1b0 <netif_do_set_ipaddr+0x88>)
 801a13c:	f240 12cb 	movw	r2, #459	@ 0x1cb
 801a140:	491c      	ldr	r1, [pc, #112]	@ (801a1b4 <netif_do_set_ipaddr+0x8c>)
 801a142:	481d      	ldr	r0, [pc, #116]	@ (801a1b8 <netif_do_set_ipaddr+0x90>)
 801a144:	f010 f83a 	bl	802a1bc <iprintf>
  LWIP_ASSERT("invalid pointer", old_addr != NULL);
 801a148:	687b      	ldr	r3, [r7, #4]
 801a14a:	2b00      	cmp	r3, #0
 801a14c:	d106      	bne.n	801a15c <netif_do_set_ipaddr+0x34>
 801a14e:	4b18      	ldr	r3, [pc, #96]	@ (801a1b0 <netif_do_set_ipaddr+0x88>)
 801a150:	f44f 72e6 	mov.w	r2, #460	@ 0x1cc
 801a154:	4917      	ldr	r1, [pc, #92]	@ (801a1b4 <netif_do_set_ipaddr+0x8c>)
 801a156:	4818      	ldr	r0, [pc, #96]	@ (801a1b8 <netif_do_set_ipaddr+0x90>)
 801a158:	f010 f830 	bl	802a1bc <iprintf>

  /* address is actually being changed? */
  if (ip4_addr_cmp(ipaddr, netif_ip4_addr(netif)) == 0) {
 801a15c:	68bb      	ldr	r3, [r7, #8]
 801a15e:	681a      	ldr	r2, [r3, #0]
 801a160:	68fb      	ldr	r3, [r7, #12]
 801a162:	3304      	adds	r3, #4
 801a164:	681b      	ldr	r3, [r3, #0]
 801a166:	429a      	cmp	r2, r3
 801a168:	d01c      	beq.n	801a1a4 <netif_do_set_ipaddr+0x7c>
    ip_addr_t new_addr;
    *ip_2_ip4(&new_addr) = *ipaddr;
 801a16a:	68bb      	ldr	r3, [r7, #8]
 801a16c:	681b      	ldr	r3, [r3, #0]
 801a16e:	617b      	str	r3, [r7, #20]
    IP_SET_TYPE_VAL(new_addr, IPADDR_TYPE_V4);

    ip_addr_copy(*old_addr, *netif_ip_addr4(netif));
 801a170:	68fb      	ldr	r3, [r7, #12]
 801a172:	3304      	adds	r3, #4
 801a174:	681a      	ldr	r2, [r3, #0]
 801a176:	687b      	ldr	r3, [r7, #4]
 801a178:	601a      	str	r2, [r3, #0]

    LWIP_DEBUGF(NETIF_DEBUG | LWIP_DBG_STATE, ("netif_set_ipaddr: netif address being changed\n"));
    netif_do_ip_addr_changed(old_addr, &new_addr);
 801a17a:	f107 0314 	add.w	r3, r7, #20
 801a17e:	4619      	mov	r1, r3
 801a180:	6878      	ldr	r0, [r7, #4]
 801a182:	f7ff ffbf 	bl	801a104 <netif_do_ip_addr_changed>

    mib2_remove_ip4(netif);
    mib2_remove_route_ip4(0, netif);
    /* set new IP address to netif */
    ip4_addr_set(ip_2_ip4(&netif->ip_addr), ipaddr);
 801a186:	68bb      	ldr	r3, [r7, #8]
 801a188:	2b00      	cmp	r3, #0
 801a18a:	d002      	beq.n	801a192 <netif_do_set_ipaddr+0x6a>
 801a18c:	68bb      	ldr	r3, [r7, #8]
 801a18e:	681b      	ldr	r3, [r3, #0]
 801a190:	e000      	b.n	801a194 <netif_do_set_ipaddr+0x6c>
 801a192:	2300      	movs	r3, #0
 801a194:	68fa      	ldr	r2, [r7, #12]
 801a196:	6053      	str	r3, [r2, #4]
    IP_SET_TYPE_VAL(netif->ip_addr, IPADDR_TYPE_V4);
    mib2_add_ip4(netif);
    mib2_add_route_ip4(0, netif);

    netif_issue_reports(netif, NETIF_REPORT_TYPE_IPV4);
 801a198:	2101      	movs	r1, #1
 801a19a:	68f8      	ldr	r0, [r7, #12]
 801a19c:	f000 f8d6 	bl	801a34c <netif_issue_reports>

    NETIF_STATUS_CALLBACK(netif);
    return 1; /* address changed */
 801a1a0:	2301      	movs	r3, #1
 801a1a2:	e000      	b.n	801a1a6 <netif_do_set_ipaddr+0x7e>
  }
  return 0; /* address unchanged */
 801a1a4:	2300      	movs	r3, #0
}
 801a1a6:	4618      	mov	r0, r3
 801a1a8:	3718      	adds	r7, #24
 801a1aa:	46bd      	mov	sp, r7
 801a1ac:	bd80      	pop	{r7, pc}
 801a1ae:	bf00      	nop
 801a1b0:	0802e70c 	.word	0x0802e70c
 801a1b4:	0802e824 	.word	0x0802e824
 801a1b8:	0802e75c 	.word	0x0802e75c

0801a1bc <netif_do_set_netmask>:
  }
}

static int
netif_do_set_netmask(struct netif *netif, const ip4_addr_t *netmask, ip_addr_t *old_nm)
{
 801a1bc:	b480      	push	{r7}
 801a1be:	b085      	sub	sp, #20
 801a1c0:	af00      	add	r7, sp, #0
 801a1c2:	60f8      	str	r0, [r7, #12]
 801a1c4:	60b9      	str	r1, [r7, #8]
 801a1c6:	607a      	str	r2, [r7, #4]
  /* address is actually being changed? */
  if (ip4_addr_cmp(netmask, netif_ip4_netmask(netif)) == 0) {
 801a1c8:	68bb      	ldr	r3, [r7, #8]
 801a1ca:	681a      	ldr	r2, [r3, #0]
 801a1cc:	68fb      	ldr	r3, [r7, #12]
 801a1ce:	3308      	adds	r3, #8
 801a1d0:	681b      	ldr	r3, [r3, #0]
 801a1d2:	429a      	cmp	r2, r3
 801a1d4:	d00a      	beq.n	801a1ec <netif_do_set_netmask+0x30>
#else
    LWIP_UNUSED_ARG(old_nm);
#endif
    mib2_remove_route_ip4(0, netif);
    /* set new netmask to netif */
    ip4_addr_set(ip_2_ip4(&netif->netmask), netmask);
 801a1d6:	68bb      	ldr	r3, [r7, #8]
 801a1d8:	2b00      	cmp	r3, #0
 801a1da:	d002      	beq.n	801a1e2 <netif_do_set_netmask+0x26>
 801a1dc:	68bb      	ldr	r3, [r7, #8]
 801a1de:	681b      	ldr	r3, [r3, #0]
 801a1e0:	e000      	b.n	801a1e4 <netif_do_set_netmask+0x28>
 801a1e2:	2300      	movs	r3, #0
 801a1e4:	68fa      	ldr	r2, [r7, #12]
 801a1e6:	6093      	str	r3, [r2, #8]
                netif->name[0], netif->name[1],
                ip4_addr1_16(netif_ip4_netmask(netif)),
                ip4_addr2_16(netif_ip4_netmask(netif)),
                ip4_addr3_16(netif_ip4_netmask(netif)),
                ip4_addr4_16(netif_ip4_netmask(netif))));
    return 1; /* netmask changed */
 801a1e8:	2301      	movs	r3, #1
 801a1ea:	e000      	b.n	801a1ee <netif_do_set_netmask+0x32>
  }
  return 0; /* netmask unchanged */
 801a1ec:	2300      	movs	r3, #0
}
 801a1ee:	4618      	mov	r0, r3
 801a1f0:	3714      	adds	r7, #20
 801a1f2:	46bd      	mov	sp, r7
 801a1f4:	f85d 7b04 	ldr.w	r7, [sp], #4
 801a1f8:	4770      	bx	lr

0801a1fa <netif_do_set_gw>:
  }
}

static int
netif_do_set_gw(struct netif *netif, const ip4_addr_t *gw, ip_addr_t *old_gw)
{
 801a1fa:	b480      	push	{r7}
 801a1fc:	b085      	sub	sp, #20
 801a1fe:	af00      	add	r7, sp, #0
 801a200:	60f8      	str	r0, [r7, #12]
 801a202:	60b9      	str	r1, [r7, #8]
 801a204:	607a      	str	r2, [r7, #4]
  /* address is actually being changed? */
  if (ip4_addr_cmp(gw, netif_ip4_gw(netif)) == 0) {
 801a206:	68bb      	ldr	r3, [r7, #8]
 801a208:	681a      	ldr	r2, [r3, #0]
 801a20a:	68fb      	ldr	r3, [r7, #12]
 801a20c:	330c      	adds	r3, #12
 801a20e:	681b      	ldr	r3, [r3, #0]
 801a210:	429a      	cmp	r2, r3
 801a212:	d00a      	beq.n	801a22a <netif_do_set_gw+0x30>
    ip_addr_copy(*old_gw, *netif_ip_gw4(netif));
#else
    LWIP_UNUSED_ARG(old_gw);
#endif

    ip4_addr_set(ip_2_ip4(&netif->gw), gw);
 801a214:	68bb      	ldr	r3, [r7, #8]
 801a216:	2b00      	cmp	r3, #0
 801a218:	d002      	beq.n	801a220 <netif_do_set_gw+0x26>
 801a21a:	68bb      	ldr	r3, [r7, #8]
 801a21c:	681b      	ldr	r3, [r3, #0]
 801a21e:	e000      	b.n	801a222 <netif_do_set_gw+0x28>
 801a220:	2300      	movs	r3, #0
 801a222:	68fa      	ldr	r2, [r7, #12]
 801a224:	60d3      	str	r3, [r2, #12]
                netif->name[0], netif->name[1],
                ip4_addr1_16(netif_ip4_gw(netif)),
                ip4_addr2_16(netif_ip4_gw(netif)),
                ip4_addr3_16(netif_ip4_gw(netif)),
                ip4_addr4_16(netif_ip4_gw(netif))));
    return 1; /* gateway changed */
 801a226:	2301      	movs	r3, #1
 801a228:	e000      	b.n	801a22c <netif_do_set_gw+0x32>
  }
  return 0; /* gateway unchanged */
 801a22a:	2300      	movs	r3, #0
}
 801a22c:	4618      	mov	r0, r3
 801a22e:	3714      	adds	r7, #20
 801a230:	46bd      	mov	sp, r7
 801a232:	f85d 7b04 	ldr.w	r7, [sp], #4
 801a236:	4770      	bx	lr

0801a238 <netif_set_addr>:
 * @param gw the new default gateway
 */
void
netif_set_addr(struct netif *netif, const ip4_addr_t *ipaddr, const ip4_addr_t *netmask,
               const ip4_addr_t *gw)
{
 801a238:	b580      	push	{r7, lr}
 801a23a:	b088      	sub	sp, #32
 801a23c:	af00      	add	r7, sp, #0
 801a23e:	60f8      	str	r0, [r7, #12]
 801a240:	60b9      	str	r1, [r7, #8]
 801a242:	607a      	str	r2, [r7, #4]
 801a244:	603b      	str	r3, [r7, #0]
  ip_addr_t old_nm_val;
  ip_addr_t old_gw_val;
  ip_addr_t *old_nm = &old_nm_val;
  ip_addr_t *old_gw = &old_gw_val;
#else
  ip_addr_t *old_nm = NULL;
 801a246:	2300      	movs	r3, #0
 801a248:	61fb      	str	r3, [r7, #28]
  ip_addr_t *old_gw = NULL;
 801a24a:	2300      	movs	r3, #0
 801a24c:	61bb      	str	r3, [r7, #24]
#endif
  ip_addr_t old_addr;
  int remove;

  LWIP_ASSERT_CORE_LOCKED();
 801a24e:	f7f6 fc15 	bl	8010a7c <sys_check_core_locking>

  /* Don't propagate NULL pointer (IPv4 ANY) to subsequent functions */
  if (ipaddr == NULL) {
 801a252:	68bb      	ldr	r3, [r7, #8]
 801a254:	2b00      	cmp	r3, #0
 801a256:	d101      	bne.n	801a25c <netif_set_addr+0x24>
    ipaddr = IP4_ADDR_ANY4;
 801a258:	4b1c      	ldr	r3, [pc, #112]	@ (801a2cc <netif_set_addr+0x94>)
 801a25a:	60bb      	str	r3, [r7, #8]
  }
  if (netmask == NULL) {
 801a25c:	687b      	ldr	r3, [r7, #4]
 801a25e:	2b00      	cmp	r3, #0
 801a260:	d101      	bne.n	801a266 <netif_set_addr+0x2e>
    netmask = IP4_ADDR_ANY4;
 801a262:	4b1a      	ldr	r3, [pc, #104]	@ (801a2cc <netif_set_addr+0x94>)
 801a264:	607b      	str	r3, [r7, #4]
  }
  if (gw == NULL) {
 801a266:	683b      	ldr	r3, [r7, #0]
 801a268:	2b00      	cmp	r3, #0
 801a26a:	d101      	bne.n	801a270 <netif_set_addr+0x38>
    gw = IP4_ADDR_ANY4;
 801a26c:	4b17      	ldr	r3, [pc, #92]	@ (801a2cc <netif_set_addr+0x94>)
 801a26e:	603b      	str	r3, [r7, #0]
  }

  remove = ip4_addr_isany(ipaddr);
 801a270:	68bb      	ldr	r3, [r7, #8]
 801a272:	2b00      	cmp	r3, #0
 801a274:	d003      	beq.n	801a27e <netif_set_addr+0x46>
 801a276:	68bb      	ldr	r3, [r7, #8]
 801a278:	681b      	ldr	r3, [r3, #0]
 801a27a:	2b00      	cmp	r3, #0
 801a27c:	d101      	bne.n	801a282 <netif_set_addr+0x4a>
 801a27e:	2301      	movs	r3, #1
 801a280:	e000      	b.n	801a284 <netif_set_addr+0x4c>
 801a282:	2300      	movs	r3, #0
 801a284:	617b      	str	r3, [r7, #20]
  if (remove) {
 801a286:	697b      	ldr	r3, [r7, #20]
 801a288:	2b00      	cmp	r3, #0
 801a28a:	d006      	beq.n	801a29a <netif_set_addr+0x62>
    /* when removing an address, we have to remove it *before* changing netmask/gw
       to ensure that tcp RST segment can be sent correctly */
    if (netif_do_set_ipaddr(netif, ipaddr, &old_addr)) {
 801a28c:	f107 0310 	add.w	r3, r7, #16
 801a290:	461a      	mov	r2, r3
 801a292:	68b9      	ldr	r1, [r7, #8]
 801a294:	68f8      	ldr	r0, [r7, #12]
 801a296:	f7ff ff47 	bl	801a128 <netif_do_set_ipaddr>
      change_reason |= LWIP_NSC_IPV4_ADDRESS_CHANGED;
      cb_args.ipv4_changed.old_address = &old_addr;
#endif
    }
  }
  if (netif_do_set_netmask(netif, netmask, old_nm)) {
 801a29a:	69fa      	ldr	r2, [r7, #28]
 801a29c:	6879      	ldr	r1, [r7, #4]
 801a29e:	68f8      	ldr	r0, [r7, #12]
 801a2a0:	f7ff ff8c 	bl	801a1bc <netif_do_set_netmask>
#if LWIP_NETIF_EXT_STATUS_CALLBACK
    change_reason |= LWIP_NSC_IPV4_NETMASK_CHANGED;
    cb_args.ipv4_changed.old_netmask = old_nm;
#endif
  }
  if (netif_do_set_gw(netif, gw, old_gw)) {
 801a2a4:	69ba      	ldr	r2, [r7, #24]
 801a2a6:	6839      	ldr	r1, [r7, #0]
 801a2a8:	68f8      	ldr	r0, [r7, #12]
 801a2aa:	f7ff ffa6 	bl	801a1fa <netif_do_set_gw>
#if LWIP_NETIF_EXT_STATUS_CALLBACK
    change_reason |= LWIP_NSC_IPV4_GATEWAY_CHANGED;
    cb_args.ipv4_changed.old_gw = old_gw;
#endif
  }
  if (!remove) {
 801a2ae:	697b      	ldr	r3, [r7, #20]
 801a2b0:	2b00      	cmp	r3, #0
 801a2b2:	d106      	bne.n	801a2c2 <netif_set_addr+0x8a>
    /* set ipaddr last to ensure netmask/gw have been set when status callback is called */
    if (netif_do_set_ipaddr(netif, ipaddr, &old_addr)) {
 801a2b4:	f107 0310 	add.w	r3, r7, #16
 801a2b8:	461a      	mov	r2, r3
 801a2ba:	68b9      	ldr	r1, [r7, #8]
 801a2bc:	68f8      	ldr	r0, [r7, #12]
 801a2be:	f7ff ff33 	bl	801a128 <netif_do_set_ipaddr>
  if (change_reason != LWIP_NSC_NONE) {
    change_reason |= LWIP_NSC_IPV4_SETTINGS_CHANGED;
    netif_invoke_ext_callback(netif, change_reason, &cb_args);
  }
#endif
}
 801a2c2:	bf00      	nop
 801a2c4:	3720      	adds	r7, #32
 801a2c6:	46bd      	mov	sp, r7
 801a2c8:	bd80      	pop	{r7, pc}
 801a2ca:	bf00      	nop
 801a2cc:	080314f4 	.word	0x080314f4

0801a2d0 <netif_set_default>:
 *
 * @param netif the default network interface
 */
void
netif_set_default(struct netif *netif)
{
 801a2d0:	b580      	push	{r7, lr}
 801a2d2:	b082      	sub	sp, #8
 801a2d4:	af00      	add	r7, sp, #0
 801a2d6:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT_CORE_LOCKED();
 801a2d8:	f7f6 fbd0 	bl	8010a7c <sys_check_core_locking>
    mib2_remove_route_ip4(1, netif);
  } else {
    /* install default route */
    mib2_add_route_ip4(1, netif);
  }
  netif_default = netif;
 801a2dc:	4a03      	ldr	r2, [pc, #12]	@ (801a2ec <netif_set_default+0x1c>)
 801a2de:	687b      	ldr	r3, [r7, #4]
 801a2e0:	6013      	str	r3, [r2, #0]
  LWIP_DEBUGF(NETIF_DEBUG, ("netif: setting default interface %c%c\n",
                            netif ? netif->name[0] : '\'', netif ? netif->name[1] : '\''));
}
 801a2e2:	bf00      	nop
 801a2e4:	3708      	adds	r7, #8
 801a2e6:	46bd      	mov	sp, r7
 801a2e8:	bd80      	pop	{r7, pc}
 801a2ea:	bf00      	nop
 801a2ec:	2402af50 	.word	0x2402af50

0801a2f0 <netif_set_up>:
 * Bring an interface up, available for processing
 * traffic.
 */
void
netif_set_up(struct netif *netif)
{
 801a2f0:	b580      	push	{r7, lr}
 801a2f2:	b082      	sub	sp, #8
 801a2f4:	af00      	add	r7, sp, #0
 801a2f6:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT_CORE_LOCKED();
 801a2f8:	f7f6 fbc0 	bl	8010a7c <sys_check_core_locking>

  LWIP_ERROR("netif_set_up: invalid netif", netif != NULL, return);
 801a2fc:	687b      	ldr	r3, [r7, #4]
 801a2fe:	2b00      	cmp	r3, #0
 801a300:	d107      	bne.n	801a312 <netif_set_up+0x22>
 801a302:	4b0f      	ldr	r3, [pc, #60]	@ (801a340 <netif_set_up+0x50>)
 801a304:	f44f 7254 	mov.w	r2, #848	@ 0x350
 801a308:	490e      	ldr	r1, [pc, #56]	@ (801a344 <netif_set_up+0x54>)
 801a30a:	480f      	ldr	r0, [pc, #60]	@ (801a348 <netif_set_up+0x58>)
 801a30c:	f00f ff56 	bl	802a1bc <iprintf>
 801a310:	e013      	b.n	801a33a <netif_set_up+0x4a>

  if (!(netif->flags & NETIF_FLAG_UP)) {
 801a312:	687b      	ldr	r3, [r7, #4]
 801a314:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 801a318:	f003 0301 	and.w	r3, r3, #1
 801a31c:	2b00      	cmp	r3, #0
 801a31e:	d10c      	bne.n	801a33a <netif_set_up+0x4a>
    netif_set_flags(netif, NETIF_FLAG_UP);
 801a320:	687b      	ldr	r3, [r7, #4]
 801a322:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 801a326:	f043 0301 	orr.w	r3, r3, #1
 801a32a:	b2da      	uxtb	r2, r3
 801a32c:	687b      	ldr	r3, [r7, #4]
 801a32e:	f883 2031 	strb.w	r2, [r3, #49]	@ 0x31
      args.status_changed.state = 1;
      netif_invoke_ext_callback(netif, LWIP_NSC_STATUS_CHANGED, &args);
    }
#endif

    netif_issue_reports(netif, NETIF_REPORT_TYPE_IPV4 | NETIF_REPORT_TYPE_IPV6);
 801a332:	2103      	movs	r1, #3
 801a334:	6878      	ldr	r0, [r7, #4]
 801a336:	f000 f809 	bl	801a34c <netif_issue_reports>
#if LWIP_IPV6
    nd6_restart_netif(netif);
#endif /* LWIP_IPV6 */
  }
}
 801a33a:	3708      	adds	r7, #8
 801a33c:	46bd      	mov	sp, r7
 801a33e:	bd80      	pop	{r7, pc}
 801a340:	0802e70c 	.word	0x0802e70c
 801a344:	0802e894 	.word	0x0802e894
 801a348:	0802e75c 	.word	0x0802e75c

0801a34c <netif_issue_reports>:

/** Send ARP/IGMP/MLD/RS events, e.g. on link-up/netif-up or addr-change
 */
static void
netif_issue_reports(struct netif *netif, u8_t report_type)
{
 801a34c:	b580      	push	{r7, lr}
 801a34e:	b082      	sub	sp, #8
 801a350:	af00      	add	r7, sp, #0
 801a352:	6078      	str	r0, [r7, #4]
 801a354:	460b      	mov	r3, r1
 801a356:	70fb      	strb	r3, [r7, #3]
  LWIP_ASSERT("netif_issue_reports: invalid netif", netif != NULL);
 801a358:	687b      	ldr	r3, [r7, #4]
 801a35a:	2b00      	cmp	r3, #0
 801a35c:	d106      	bne.n	801a36c <netif_issue_reports+0x20>
 801a35e:	4b18      	ldr	r3, [pc, #96]	@ (801a3c0 <netif_issue_reports+0x74>)
 801a360:	f240 326d 	movw	r2, #877	@ 0x36d
 801a364:	4917      	ldr	r1, [pc, #92]	@ (801a3c4 <netif_issue_reports+0x78>)
 801a366:	4818      	ldr	r0, [pc, #96]	@ (801a3c8 <netif_issue_reports+0x7c>)
 801a368:	f00f ff28 	bl	802a1bc <iprintf>

  /* Only send reports when both link and admin states are up */
  if (!(netif->flags & NETIF_FLAG_LINK_UP) ||
 801a36c:	687b      	ldr	r3, [r7, #4]
 801a36e:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 801a372:	f003 0304 	and.w	r3, r3, #4
 801a376:	2b00      	cmp	r3, #0
 801a378:	d01e      	beq.n	801a3b8 <netif_issue_reports+0x6c>
      !(netif->flags & NETIF_FLAG_UP)) {
 801a37a:	687b      	ldr	r3, [r7, #4]
 801a37c:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 801a380:	f003 0301 	and.w	r3, r3, #1
  if (!(netif->flags & NETIF_FLAG_LINK_UP) ||
 801a384:	2b00      	cmp	r3, #0
 801a386:	d017      	beq.n	801a3b8 <netif_issue_reports+0x6c>
    return;
  }

#if LWIP_IPV4
  if ((report_type & NETIF_REPORT_TYPE_IPV4) &&
 801a388:	78fb      	ldrb	r3, [r7, #3]
 801a38a:	f003 0301 	and.w	r3, r3, #1
 801a38e:	2b00      	cmp	r3, #0
 801a390:	d013      	beq.n	801a3ba <netif_issue_reports+0x6e>
      !ip4_addr_isany_val(*netif_ip4_addr(netif))) {
 801a392:	687b      	ldr	r3, [r7, #4]
 801a394:	3304      	adds	r3, #4
 801a396:	681b      	ldr	r3, [r3, #0]
  if ((report_type & NETIF_REPORT_TYPE_IPV4) &&
 801a398:	2b00      	cmp	r3, #0
 801a39a:	d00e      	beq.n	801a3ba <netif_issue_reports+0x6e>
#if LWIP_ARP
    /* For Ethernet network interfaces, we would like to send a "gratuitous ARP" */
    if (netif->flags & (NETIF_FLAG_ETHARP)) {
 801a39c:	687b      	ldr	r3, [r7, #4]
 801a39e:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 801a3a2:	f003 0308 	and.w	r3, r3, #8
 801a3a6:	2b00      	cmp	r3, #0
 801a3a8:	d007      	beq.n	801a3ba <netif_issue_reports+0x6e>
      etharp_gratuitous(netif);
 801a3aa:	687b      	ldr	r3, [r7, #4]
 801a3ac:	3304      	adds	r3, #4
 801a3ae:	4619      	mov	r1, r3
 801a3b0:	6878      	ldr	r0, [r7, #4]
 801a3b2:	f00a fd2b 	bl	8024e0c <etharp_request>
 801a3b6:	e000      	b.n	801a3ba <netif_issue_reports+0x6e>
    return;
 801a3b8:	bf00      	nop
    /* send mld memberships */
    mld6_report_groups(netif);
#endif /* LWIP_IPV6_MLD */
  }
#endif /* LWIP_IPV6 */
}
 801a3ba:	3708      	adds	r7, #8
 801a3bc:	46bd      	mov	sp, r7
 801a3be:	bd80      	pop	{r7, pc}
 801a3c0:	0802e70c 	.word	0x0802e70c
 801a3c4:	0802e8b0 	.word	0x0802e8b0
 801a3c8:	0802e75c 	.word	0x0802e75c

0801a3cc <netif_set_down>:
 * @ingroup netif
 * Bring an interface down, disabling any traffic processing.
 */
void
netif_set_down(struct netif *netif)
{
 801a3cc:	b580      	push	{r7, lr}
 801a3ce:	b082      	sub	sp, #8
 801a3d0:	af00      	add	r7, sp, #0
 801a3d2:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT_CORE_LOCKED();
 801a3d4:	f7f6 fb52 	bl	8010a7c <sys_check_core_locking>

  LWIP_ERROR("netif_set_down: invalid netif", netif != NULL, return);
 801a3d8:	687b      	ldr	r3, [r7, #4]
 801a3da:	2b00      	cmp	r3, #0
 801a3dc:	d107      	bne.n	801a3ee <netif_set_down+0x22>
 801a3de:	4b12      	ldr	r3, [pc, #72]	@ (801a428 <netif_set_down+0x5c>)
 801a3e0:	f240 329b 	movw	r2, #923	@ 0x39b
 801a3e4:	4911      	ldr	r1, [pc, #68]	@ (801a42c <netif_set_down+0x60>)
 801a3e6:	4812      	ldr	r0, [pc, #72]	@ (801a430 <netif_set_down+0x64>)
 801a3e8:	f00f fee8 	bl	802a1bc <iprintf>
 801a3ec:	e019      	b.n	801a422 <netif_set_down+0x56>

  if (netif->flags & NETIF_FLAG_UP) {
 801a3ee:	687b      	ldr	r3, [r7, #4]
 801a3f0:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 801a3f4:	f003 0301 	and.w	r3, r3, #1
 801a3f8:	2b00      	cmp	r3, #0
 801a3fa:	d012      	beq.n	801a422 <netif_set_down+0x56>
      args.status_changed.state = 0;
      netif_invoke_ext_callback(netif, LWIP_NSC_STATUS_CHANGED, &args);
    }
#endif

    netif_clear_flags(netif, NETIF_FLAG_UP);
 801a3fc:	687b      	ldr	r3, [r7, #4]
 801a3fe:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 801a402:	f023 0301 	bic.w	r3, r3, #1
 801a406:	b2da      	uxtb	r2, r3
 801a408:	687b      	ldr	r3, [r7, #4]
 801a40a:	f883 2031 	strb.w	r2, [r3, #49]	@ 0x31
    MIB2_COPY_SYSUPTIME_TO(&netif->ts);

#if LWIP_IPV4 && LWIP_ARP
    if (netif->flags & NETIF_FLAG_ETHARP) {
 801a40e:	687b      	ldr	r3, [r7, #4]
 801a410:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 801a414:	f003 0308 	and.w	r3, r3, #8
 801a418:	2b00      	cmp	r3, #0
 801a41a:	d002      	beq.n	801a422 <netif_set_down+0x56>
      etharp_cleanup_netif(netif);
 801a41c:	6878      	ldr	r0, [r7, #4]
 801a41e:	f00a f8ab 	bl	8024578 <etharp_cleanup_netif>
    nd6_cleanup_netif(netif);
#endif /* LWIP_IPV6 */

    NETIF_STATUS_CALLBACK(netif);
  }
}
 801a422:	3708      	adds	r7, #8
 801a424:	46bd      	mov	sp, r7
 801a426:	bd80      	pop	{r7, pc}
 801a428:	0802e70c 	.word	0x0802e70c
 801a42c:	0802e8d4 	.word	0x0802e8d4
 801a430:	0802e75c 	.word	0x0802e75c

0801a434 <netif_set_link_up>:
 * @ingroup netif
 * Called by a driver when its link goes up
 */
void
netif_set_link_up(struct netif *netif)
{
 801a434:	b580      	push	{r7, lr}
 801a436:	b082      	sub	sp, #8
 801a438:	af00      	add	r7, sp, #0
 801a43a:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT_CORE_LOCKED();
 801a43c:	f7f6 fb1e 	bl	8010a7c <sys_check_core_locking>

  LWIP_ERROR("netif_set_link_up: invalid netif", netif != NULL, return);
 801a440:	687b      	ldr	r3, [r7, #4]
 801a442:	2b00      	cmp	r3, #0
 801a444:	d107      	bne.n	801a456 <netif_set_link_up+0x22>
 801a446:	4b15      	ldr	r3, [pc, #84]	@ (801a49c <netif_set_link_up+0x68>)
 801a448:	f44f 7278 	mov.w	r2, #992	@ 0x3e0
 801a44c:	4914      	ldr	r1, [pc, #80]	@ (801a4a0 <netif_set_link_up+0x6c>)
 801a44e:	4815      	ldr	r0, [pc, #84]	@ (801a4a4 <netif_set_link_up+0x70>)
 801a450:	f00f feb4 	bl	802a1bc <iprintf>
 801a454:	e01e      	b.n	801a494 <netif_set_link_up+0x60>

  if (!(netif->flags & NETIF_FLAG_LINK_UP)) {
 801a456:	687b      	ldr	r3, [r7, #4]
 801a458:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 801a45c:	f003 0304 	and.w	r3, r3, #4
 801a460:	2b00      	cmp	r3, #0
 801a462:	d117      	bne.n	801a494 <netif_set_link_up+0x60>
    netif_set_flags(netif, NETIF_FLAG_LINK_UP);
 801a464:	687b      	ldr	r3, [r7, #4]
 801a466:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 801a46a:	f043 0304 	orr.w	r3, r3, #4
 801a46e:	b2da      	uxtb	r2, r3
 801a470:	687b      	ldr	r3, [r7, #4]
 801a472:	f883 2031 	strb.w	r2, [r3, #49]	@ 0x31

#if LWIP_DHCP
    dhcp_network_changed(netif);
 801a476:	6878      	ldr	r0, [r7, #4]
 801a478:	f008 faaa 	bl	80229d0 <dhcp_network_changed>

#if LWIP_AUTOIP
    autoip_network_changed(netif);
#endif /* LWIP_AUTOIP */

    netif_issue_reports(netif, NETIF_REPORT_TYPE_IPV4 | NETIF_REPORT_TYPE_IPV6);
 801a47c:	2103      	movs	r1, #3
 801a47e:	6878      	ldr	r0, [r7, #4]
 801a480:	f7ff ff64 	bl	801a34c <netif_issue_reports>
#if LWIP_IPV6
    nd6_restart_netif(netif);
#endif /* LWIP_IPV6 */

    NETIF_LINK_CALLBACK(netif);
 801a484:	687b      	ldr	r3, [r7, #4]
 801a486:	69db      	ldr	r3, [r3, #28]
 801a488:	2b00      	cmp	r3, #0
 801a48a:	d003      	beq.n	801a494 <netif_set_link_up+0x60>
 801a48c:	687b      	ldr	r3, [r7, #4]
 801a48e:	69db      	ldr	r3, [r3, #28]
 801a490:	6878      	ldr	r0, [r7, #4]
 801a492:	4798      	blx	r3
      args.link_changed.state = 1;
      netif_invoke_ext_callback(netif, LWIP_NSC_LINK_CHANGED, &args);
    }
#endif
  }
}
 801a494:	3708      	adds	r7, #8
 801a496:	46bd      	mov	sp, r7
 801a498:	bd80      	pop	{r7, pc}
 801a49a:	bf00      	nop
 801a49c:	0802e70c 	.word	0x0802e70c
 801a4a0:	0802e8f4 	.word	0x0802e8f4
 801a4a4:	0802e75c 	.word	0x0802e75c

0801a4a8 <netif_set_link_down>:
 * @ingroup netif
 * Called by a driver when its link goes down
 */
void
netif_set_link_down(struct netif *netif)
{
 801a4a8:	b580      	push	{r7, lr}
 801a4aa:	b082      	sub	sp, #8
 801a4ac:	af00      	add	r7, sp, #0
 801a4ae:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT_CORE_LOCKED();
 801a4b0:	f7f6 fae4 	bl	8010a7c <sys_check_core_locking>

  LWIP_ERROR("netif_set_link_down: invalid netif", netif != NULL, return);
 801a4b4:	687b      	ldr	r3, [r7, #4]
 801a4b6:	2b00      	cmp	r3, #0
 801a4b8:	d107      	bne.n	801a4ca <netif_set_link_down+0x22>
 801a4ba:	4b11      	ldr	r3, [pc, #68]	@ (801a500 <netif_set_link_down+0x58>)
 801a4bc:	f240 4206 	movw	r2, #1030	@ 0x406
 801a4c0:	4910      	ldr	r1, [pc, #64]	@ (801a504 <netif_set_link_down+0x5c>)
 801a4c2:	4811      	ldr	r0, [pc, #68]	@ (801a508 <netif_set_link_down+0x60>)
 801a4c4:	f00f fe7a 	bl	802a1bc <iprintf>
 801a4c8:	e017      	b.n	801a4fa <netif_set_link_down+0x52>

  if (netif->flags & NETIF_FLAG_LINK_UP) {
 801a4ca:	687b      	ldr	r3, [r7, #4]
 801a4cc:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 801a4d0:	f003 0304 	and.w	r3, r3, #4
 801a4d4:	2b00      	cmp	r3, #0
 801a4d6:	d010      	beq.n	801a4fa <netif_set_link_down+0x52>
    netif_clear_flags(netif, NETIF_FLAG_LINK_UP);
 801a4d8:	687b      	ldr	r3, [r7, #4]
 801a4da:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 801a4de:	f023 0304 	bic.w	r3, r3, #4
 801a4e2:	b2da      	uxtb	r2, r3
 801a4e4:	687b      	ldr	r3, [r7, #4]
 801a4e6:	f883 2031 	strb.w	r2, [r3, #49]	@ 0x31
    NETIF_LINK_CALLBACK(netif);
 801a4ea:	687b      	ldr	r3, [r7, #4]
 801a4ec:	69db      	ldr	r3, [r3, #28]
 801a4ee:	2b00      	cmp	r3, #0
 801a4f0:	d003      	beq.n	801a4fa <netif_set_link_down+0x52>
 801a4f2:	687b      	ldr	r3, [r7, #4]
 801a4f4:	69db      	ldr	r3, [r3, #28]
 801a4f6:	6878      	ldr	r0, [r7, #4]
 801a4f8:	4798      	blx	r3
      args.link_changed.state = 0;
      netif_invoke_ext_callback(netif, LWIP_NSC_LINK_CHANGED, &args);
    }
#endif
  }
}
 801a4fa:	3708      	adds	r7, #8
 801a4fc:	46bd      	mov	sp, r7
 801a4fe:	bd80      	pop	{r7, pc}
 801a500:	0802e70c 	.word	0x0802e70c
 801a504:	0802e918 	.word	0x0802e918
 801a508:	0802e75c 	.word	0x0802e75c

0801a50c <netif_set_link_callback>:
 * @ingroup netif
 * Set callback to be called when link is brought up/down
 */
void
netif_set_link_callback(struct netif *netif, netif_status_callback_fn link_callback)
{
 801a50c:	b580      	push	{r7, lr}
 801a50e:	b082      	sub	sp, #8
 801a510:	af00      	add	r7, sp, #0
 801a512:	6078      	str	r0, [r7, #4]
 801a514:	6039      	str	r1, [r7, #0]
  LWIP_ASSERT_CORE_LOCKED();
 801a516:	f7f6 fab1 	bl	8010a7c <sys_check_core_locking>

  if (netif) {
 801a51a:	687b      	ldr	r3, [r7, #4]
 801a51c:	2b00      	cmp	r3, #0
 801a51e:	d002      	beq.n	801a526 <netif_set_link_callback+0x1a>
    netif->link_callback = link_callback;
 801a520:	687b      	ldr	r3, [r7, #4]
 801a522:	683a      	ldr	r2, [r7, #0]
 801a524:	61da      	str	r2, [r3, #28]
  }
}
 801a526:	bf00      	nop
 801a528:	3708      	adds	r7, #8
 801a52a:	46bd      	mov	sp, r7
 801a52c:	bd80      	pop	{r7, pc}

0801a52e <netif_null_output_ip4>:
#if LWIP_IPV4
/** Dummy IPv4 output function for netifs not supporting IPv4
 */
static err_t
netif_null_output_ip4(struct netif *netif, struct pbuf *p, const ip4_addr_t *ipaddr)
{
 801a52e:	b480      	push	{r7}
 801a530:	b085      	sub	sp, #20
 801a532:	af00      	add	r7, sp, #0
 801a534:	60f8      	str	r0, [r7, #12]
 801a536:	60b9      	str	r1, [r7, #8]
 801a538:	607a      	str	r2, [r7, #4]
  LWIP_UNUSED_ARG(netif);
  LWIP_UNUSED_ARG(p);
  LWIP_UNUSED_ARG(ipaddr);

  return ERR_IF;
 801a53a:	f06f 030b 	mvn.w	r3, #11
}
 801a53e:	4618      	mov	r0, r3
 801a540:	3714      	adds	r7, #20
 801a542:	46bd      	mov	sp, r7
 801a544:	f85d 7b04 	ldr.w	r7, [sp], #4
 801a548:	4770      	bx	lr
	...

0801a54c <netif_get_by_index>:
*
* @param idx index of netif to find
*/
struct netif *
netif_get_by_index(u8_t idx)
{
 801a54c:	b580      	push	{r7, lr}
 801a54e:	b084      	sub	sp, #16
 801a550:	af00      	add	r7, sp, #0
 801a552:	4603      	mov	r3, r0
 801a554:	71fb      	strb	r3, [r7, #7]
  struct netif *netif;

  LWIP_ASSERT_CORE_LOCKED();
 801a556:	f7f6 fa91 	bl	8010a7c <sys_check_core_locking>

  if (idx != NETIF_NO_INDEX) {
 801a55a:	79fb      	ldrb	r3, [r7, #7]
 801a55c:	2b00      	cmp	r3, #0
 801a55e:	d013      	beq.n	801a588 <netif_get_by_index+0x3c>
    NETIF_FOREACH(netif) {
 801a560:	4b0c      	ldr	r3, [pc, #48]	@ (801a594 <netif_get_by_index+0x48>)
 801a562:	681b      	ldr	r3, [r3, #0]
 801a564:	60fb      	str	r3, [r7, #12]
 801a566:	e00c      	b.n	801a582 <netif_get_by_index+0x36>
      if (idx == netif_get_index(netif)) {
 801a568:	68fb      	ldr	r3, [r7, #12]
 801a56a:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 801a56e:	3301      	adds	r3, #1
 801a570:	b2db      	uxtb	r3, r3
 801a572:	79fa      	ldrb	r2, [r7, #7]
 801a574:	429a      	cmp	r2, r3
 801a576:	d101      	bne.n	801a57c <netif_get_by_index+0x30>
        return netif; /* found! */
 801a578:	68fb      	ldr	r3, [r7, #12]
 801a57a:	e006      	b.n	801a58a <netif_get_by_index+0x3e>
    NETIF_FOREACH(netif) {
 801a57c:	68fb      	ldr	r3, [r7, #12]
 801a57e:	681b      	ldr	r3, [r3, #0]
 801a580:	60fb      	str	r3, [r7, #12]
 801a582:	68fb      	ldr	r3, [r7, #12]
 801a584:	2b00      	cmp	r3, #0
 801a586:	d1ef      	bne.n	801a568 <netif_get_by_index+0x1c>
      }
    }
  }

  return NULL;
 801a588:	2300      	movs	r3, #0
}
 801a58a:	4618      	mov	r0, r3
 801a58c:	3710      	adds	r7, #16
 801a58e:	46bd      	mov	sp, r7
 801a590:	bd80      	pop	{r7, pc}
 801a592:	bf00      	nop
 801a594:	2402af4c 	.word	0x2402af4c

0801a598 <pbuf_free_ooseq>:
#if !NO_SYS
static
#endif /* !NO_SYS */
void
pbuf_free_ooseq(void)
{
 801a598:	b580      	push	{r7, lr}
 801a59a:	b082      	sub	sp, #8
 801a59c:	af00      	add	r7, sp, #0
  struct tcp_pcb *pcb;
  SYS_ARCH_SET(pbuf_free_ooseq_pending, 0);
 801a59e:	f00c fb77 	bl	8026c90 <sys_arch_protect>
 801a5a2:	6038      	str	r0, [r7, #0]
 801a5a4:	4b0d      	ldr	r3, [pc, #52]	@ (801a5dc <pbuf_free_ooseq+0x44>)
 801a5a6:	2200      	movs	r2, #0
 801a5a8:	701a      	strb	r2, [r3, #0]
 801a5aa:	6838      	ldr	r0, [r7, #0]
 801a5ac:	f00c fb7e 	bl	8026cac <sys_arch_unprotect>

  for (pcb = tcp_active_pcbs; NULL != pcb; pcb = pcb->next) {
 801a5b0:	4b0b      	ldr	r3, [pc, #44]	@ (801a5e0 <pbuf_free_ooseq+0x48>)
 801a5b2:	681b      	ldr	r3, [r3, #0]
 801a5b4:	607b      	str	r3, [r7, #4]
 801a5b6:	e00a      	b.n	801a5ce <pbuf_free_ooseq+0x36>
    if (pcb->ooseq != NULL) {
 801a5b8:	687b      	ldr	r3, [r7, #4]
 801a5ba:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801a5bc:	2b00      	cmp	r3, #0
 801a5be:	d003      	beq.n	801a5c8 <pbuf_free_ooseq+0x30>
      /** Free the ooseq pbufs of one PCB only */
      LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_free_ooseq: freeing out-of-sequence pbufs\n"));
      tcp_free_ooseq(pcb);
 801a5c0:	6878      	ldr	r0, [r7, #4]
 801a5c2:	f002 fc55 	bl	801ce70 <tcp_free_ooseq>
      return;
 801a5c6:	e005      	b.n	801a5d4 <pbuf_free_ooseq+0x3c>
  for (pcb = tcp_active_pcbs; NULL != pcb; pcb = pcb->next) {
 801a5c8:	687b      	ldr	r3, [r7, #4]
 801a5ca:	68db      	ldr	r3, [r3, #12]
 801a5cc:	607b      	str	r3, [r7, #4]
 801a5ce:	687b      	ldr	r3, [r7, #4]
 801a5d0:	2b00      	cmp	r3, #0
 801a5d2:	d1f1      	bne.n	801a5b8 <pbuf_free_ooseq+0x20>
    }
  }
}
 801a5d4:	3708      	adds	r7, #8
 801a5d6:	46bd      	mov	sp, r7
 801a5d8:	bd80      	pop	{r7, pc}
 801a5da:	bf00      	nop
 801a5dc:	2402af55 	.word	0x2402af55
 801a5e0:	2402af64 	.word	0x2402af64

0801a5e4 <pbuf_free_ooseq_callback>:
/**
 * Just a callback function for tcpip_callback() that calls pbuf_free_ooseq().
 */
static void
pbuf_free_ooseq_callback(void *arg)
{
 801a5e4:	b580      	push	{r7, lr}
 801a5e6:	b082      	sub	sp, #8
 801a5e8:	af00      	add	r7, sp, #0
 801a5ea:	6078      	str	r0, [r7, #4]
  LWIP_UNUSED_ARG(arg);
  pbuf_free_ooseq();
 801a5ec:	f7ff ffd4 	bl	801a598 <pbuf_free_ooseq>
}
 801a5f0:	bf00      	nop
 801a5f2:	3708      	adds	r7, #8
 801a5f4:	46bd      	mov	sp, r7
 801a5f6:	bd80      	pop	{r7, pc}

0801a5f8 <pbuf_pool_is_empty>:
#endif /* !NO_SYS */

/** Queue a call to pbuf_free_ooseq if not already queued. */
static void
pbuf_pool_is_empty(void)
{
 801a5f8:	b580      	push	{r7, lr}
 801a5fa:	b082      	sub	sp, #8
 801a5fc:	af00      	add	r7, sp, #0
#ifndef PBUF_POOL_FREE_OOSEQ_QUEUE_CALL
  SYS_ARCH_SET(pbuf_free_ooseq_pending, 1);
#else /* PBUF_POOL_FREE_OOSEQ_QUEUE_CALL */
  u8_t queued;
  SYS_ARCH_DECL_PROTECT(old_level);
  SYS_ARCH_PROTECT(old_level);
 801a5fe:	f00c fb47 	bl	8026c90 <sys_arch_protect>
 801a602:	6078      	str	r0, [r7, #4]
  queued = pbuf_free_ooseq_pending;
 801a604:	4b0f      	ldr	r3, [pc, #60]	@ (801a644 <pbuf_pool_is_empty+0x4c>)
 801a606:	781b      	ldrb	r3, [r3, #0]
 801a608:	70fb      	strb	r3, [r7, #3]
  pbuf_free_ooseq_pending = 1;
 801a60a:	4b0e      	ldr	r3, [pc, #56]	@ (801a644 <pbuf_pool_is_empty+0x4c>)
 801a60c:	2201      	movs	r2, #1
 801a60e:	701a      	strb	r2, [r3, #0]
  SYS_ARCH_UNPROTECT(old_level);
 801a610:	6878      	ldr	r0, [r7, #4]
 801a612:	f00c fb4b 	bl	8026cac <sys_arch_unprotect>

  if (!queued) {
 801a616:	78fb      	ldrb	r3, [r7, #3]
 801a618:	2b00      	cmp	r3, #0
 801a61a:	d10f      	bne.n	801a63c <pbuf_pool_is_empty+0x44>
    /* queue a call to pbuf_free_ooseq if not already queued */
    PBUF_POOL_FREE_OOSEQ_QUEUE_CALL();
 801a61c:	2100      	movs	r1, #0
 801a61e:	480a      	ldr	r0, [pc, #40]	@ (801a648 <pbuf_pool_is_empty+0x50>)
 801a620:	f7fe fdd6 	bl	80191d0 <tcpip_try_callback>
 801a624:	4603      	mov	r3, r0
 801a626:	2b00      	cmp	r3, #0
 801a628:	d008      	beq.n	801a63c <pbuf_pool_is_empty+0x44>
 801a62a:	f00c fb31 	bl	8026c90 <sys_arch_protect>
 801a62e:	6078      	str	r0, [r7, #4]
 801a630:	4b04      	ldr	r3, [pc, #16]	@ (801a644 <pbuf_pool_is_empty+0x4c>)
 801a632:	2200      	movs	r2, #0
 801a634:	701a      	strb	r2, [r3, #0]
 801a636:	6878      	ldr	r0, [r7, #4]
 801a638:	f00c fb38 	bl	8026cac <sys_arch_unprotect>
  }
#endif /* PBUF_POOL_FREE_OOSEQ_QUEUE_CALL */
}
 801a63c:	bf00      	nop
 801a63e:	3708      	adds	r7, #8
 801a640:	46bd      	mov	sp, r7
 801a642:	bd80      	pop	{r7, pc}
 801a644:	2402af55 	.word	0x2402af55
 801a648:	0801a5e5 	.word	0x0801a5e5

0801a64c <pbuf_init_alloced_pbuf>:
#endif /* !LWIP_TCP || !TCP_QUEUE_OOSEQ || !PBUF_POOL_FREE_OOSEQ */

/* Initialize members of struct pbuf after allocation */
static void
pbuf_init_alloced_pbuf(struct pbuf *p, void *payload, u16_t tot_len, u16_t len, pbuf_type type, u8_t flags)
{
 801a64c:	b480      	push	{r7}
 801a64e:	b085      	sub	sp, #20
 801a650:	af00      	add	r7, sp, #0
 801a652:	60f8      	str	r0, [r7, #12]
 801a654:	60b9      	str	r1, [r7, #8]
 801a656:	4611      	mov	r1, r2
 801a658:	461a      	mov	r2, r3
 801a65a:	460b      	mov	r3, r1
 801a65c:	80fb      	strh	r3, [r7, #6]
 801a65e:	4613      	mov	r3, r2
 801a660:	80bb      	strh	r3, [r7, #4]
  p->next = NULL;
 801a662:	68fb      	ldr	r3, [r7, #12]
 801a664:	2200      	movs	r2, #0
 801a666:	601a      	str	r2, [r3, #0]
  p->payload = payload;
 801a668:	68fb      	ldr	r3, [r7, #12]
 801a66a:	68ba      	ldr	r2, [r7, #8]
 801a66c:	605a      	str	r2, [r3, #4]
  p->tot_len = tot_len;
 801a66e:	68fb      	ldr	r3, [r7, #12]
 801a670:	88fa      	ldrh	r2, [r7, #6]
 801a672:	811a      	strh	r2, [r3, #8]
  p->len = len;
 801a674:	68fb      	ldr	r3, [r7, #12]
 801a676:	88ba      	ldrh	r2, [r7, #4]
 801a678:	815a      	strh	r2, [r3, #10]
  p->type_internal = (u8_t)type;
 801a67a:	8b3b      	ldrh	r3, [r7, #24]
 801a67c:	b2da      	uxtb	r2, r3
 801a67e:	68fb      	ldr	r3, [r7, #12]
 801a680:	731a      	strb	r2, [r3, #12]
  p->flags = flags;
 801a682:	68fb      	ldr	r3, [r7, #12]
 801a684:	7f3a      	ldrb	r2, [r7, #28]
 801a686:	735a      	strb	r2, [r3, #13]
  p->ref = 1;
 801a688:	68fb      	ldr	r3, [r7, #12]
 801a68a:	2201      	movs	r2, #1
 801a68c:	739a      	strb	r2, [r3, #14]
  p->if_idx = NETIF_NO_INDEX;
 801a68e:	68fb      	ldr	r3, [r7, #12]
 801a690:	2200      	movs	r2, #0
 801a692:	73da      	strb	r2, [r3, #15]
}
 801a694:	bf00      	nop
 801a696:	3714      	adds	r7, #20
 801a698:	46bd      	mov	sp, r7
 801a69a:	f85d 7b04 	ldr.w	r7, [sp], #4
 801a69e:	4770      	bx	lr

0801a6a0 <pbuf_alloc>:
 * @return the allocated pbuf. If multiple pbufs where allocated, this
 * is the first pbuf of a pbuf chain.
 */
struct pbuf *
pbuf_alloc(pbuf_layer layer, u16_t length, pbuf_type type)
{
 801a6a0:	b580      	push	{r7, lr}
 801a6a2:	b08c      	sub	sp, #48	@ 0x30
 801a6a4:	af02      	add	r7, sp, #8
 801a6a6:	4603      	mov	r3, r0
 801a6a8:	71fb      	strb	r3, [r7, #7]
 801a6aa:	460b      	mov	r3, r1
 801a6ac:	80bb      	strh	r3, [r7, #4]
 801a6ae:	4613      	mov	r3, r2
 801a6b0:	807b      	strh	r3, [r7, #2]
  struct pbuf *p;
  u16_t offset = (u16_t)layer;
 801a6b2:	79fb      	ldrb	r3, [r7, #7]
 801a6b4:	847b      	strh	r3, [r7, #34]	@ 0x22
  LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_alloc(length=%"U16_F")\n", length));

  switch (type) {
 801a6b6:	887b      	ldrh	r3, [r7, #2]
 801a6b8:	f5b3 7f20 	cmp.w	r3, #640	@ 0x280
 801a6bc:	f000 8082 	beq.w	801a7c4 <pbuf_alloc+0x124>
 801a6c0:	f5b3 7f20 	cmp.w	r3, #640	@ 0x280
 801a6c4:	f300 80c9 	bgt.w	801a85a <pbuf_alloc+0x1ba>
 801a6c8:	f5b3 7fc1 	cmp.w	r3, #386	@ 0x182
 801a6cc:	d010      	beq.n	801a6f0 <pbuf_alloc+0x50>
 801a6ce:	f5b3 7fc1 	cmp.w	r3, #386	@ 0x182
 801a6d2:	f300 80c2 	bgt.w	801a85a <pbuf_alloc+0x1ba>
 801a6d6:	2b01      	cmp	r3, #1
 801a6d8:	d002      	beq.n	801a6e0 <pbuf_alloc+0x40>
 801a6da:	2b41      	cmp	r3, #65	@ 0x41
 801a6dc:	f040 80bd 	bne.w	801a85a <pbuf_alloc+0x1ba>
    case PBUF_REF: /* fall through */
    case PBUF_ROM:
      p = pbuf_alloc_reference(NULL, length, type);
 801a6e0:	887a      	ldrh	r2, [r7, #2]
 801a6e2:	88bb      	ldrh	r3, [r7, #4]
 801a6e4:	4619      	mov	r1, r3
 801a6e6:	2000      	movs	r0, #0
 801a6e8:	f000 f8d2 	bl	801a890 <pbuf_alloc_reference>
 801a6ec:	6278      	str	r0, [r7, #36]	@ 0x24
      break;
 801a6ee:	e0be      	b.n	801a86e <pbuf_alloc+0x1ce>
    case PBUF_POOL: {
      struct pbuf *q, *last;
      u16_t rem_len; /* remaining length */
      p = NULL;
 801a6f0:	2300      	movs	r3, #0
 801a6f2:	627b      	str	r3, [r7, #36]	@ 0x24
      last = NULL;
 801a6f4:	2300      	movs	r3, #0
 801a6f6:	61fb      	str	r3, [r7, #28]
      rem_len = length;
 801a6f8:	88bb      	ldrh	r3, [r7, #4]
 801a6fa:	837b      	strh	r3, [r7, #26]
      do {
        u16_t qlen;
        q = (struct pbuf *)memp_malloc(MEMP_PBUF_POOL);
 801a6fc:	200c      	movs	r0, #12
 801a6fe:	f7ff fb81 	bl	8019e04 <memp_malloc>
 801a702:	6138      	str	r0, [r7, #16]
        if (q == NULL) {
 801a704:	693b      	ldr	r3, [r7, #16]
 801a706:	2b00      	cmp	r3, #0
 801a708:	d109      	bne.n	801a71e <pbuf_alloc+0x7e>
          PBUF_POOL_IS_EMPTY();
 801a70a:	f7ff ff75 	bl	801a5f8 <pbuf_pool_is_empty>
          /* free chain so far allocated */
          if (p) {
 801a70e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801a710:	2b00      	cmp	r3, #0
 801a712:	d002      	beq.n	801a71a <pbuf_alloc+0x7a>
            pbuf_free(p);
 801a714:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 801a716:	f000 fad9 	bl	801accc <pbuf_free>
          }
          /* bail out unsuccessfully */
          return NULL;
 801a71a:	2300      	movs	r3, #0
 801a71c:	e0a8      	b.n	801a870 <pbuf_alloc+0x1d0>
        }
        qlen = LWIP_MIN(rem_len, (u16_t)(PBUF_POOL_BUFSIZE_ALIGNED - LWIP_MEM_ALIGN_SIZE(offset)));
 801a71e:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 801a720:	3303      	adds	r3, #3
 801a722:	b29b      	uxth	r3, r3
 801a724:	f023 0303 	bic.w	r3, r3, #3
 801a728:	b29a      	uxth	r2, r3
 801a72a:	f240 53ec 	movw	r3, #1516	@ 0x5ec
 801a72e:	1a9b      	subs	r3, r3, r2
 801a730:	b29b      	uxth	r3, r3
 801a732:	8b7a      	ldrh	r2, [r7, #26]
 801a734:	4293      	cmp	r3, r2
 801a736:	bf28      	it	cs
 801a738:	4613      	movcs	r3, r2
 801a73a:	81fb      	strh	r3, [r7, #14]
        pbuf_init_alloced_pbuf(q, LWIP_MEM_ALIGN((void *)((u8_t *)q + SIZEOF_STRUCT_PBUF + offset)),
 801a73c:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 801a73e:	3310      	adds	r3, #16
 801a740:	693a      	ldr	r2, [r7, #16]
 801a742:	4413      	add	r3, r2
 801a744:	3303      	adds	r3, #3
 801a746:	f023 0303 	bic.w	r3, r3, #3
 801a74a:	4618      	mov	r0, r3
 801a74c:	89f9      	ldrh	r1, [r7, #14]
 801a74e:	8b7a      	ldrh	r2, [r7, #26]
 801a750:	2300      	movs	r3, #0
 801a752:	9301      	str	r3, [sp, #4]
 801a754:	887b      	ldrh	r3, [r7, #2]
 801a756:	9300      	str	r3, [sp, #0]
 801a758:	460b      	mov	r3, r1
 801a75a:	4601      	mov	r1, r0
 801a75c:	6938      	ldr	r0, [r7, #16]
 801a75e:	f7ff ff75 	bl	801a64c <pbuf_init_alloced_pbuf>
                               rem_len, qlen, type, 0);
        LWIP_ASSERT("pbuf_alloc: pbuf q->payload properly aligned",
 801a762:	693b      	ldr	r3, [r7, #16]
 801a764:	685b      	ldr	r3, [r3, #4]
 801a766:	f003 0303 	and.w	r3, r3, #3
 801a76a:	2b00      	cmp	r3, #0
 801a76c:	d006      	beq.n	801a77c <pbuf_alloc+0xdc>
 801a76e:	4b42      	ldr	r3, [pc, #264]	@ (801a878 <pbuf_alloc+0x1d8>)
 801a770:	f44f 7280 	mov.w	r2, #256	@ 0x100
 801a774:	4941      	ldr	r1, [pc, #260]	@ (801a87c <pbuf_alloc+0x1dc>)
 801a776:	4842      	ldr	r0, [pc, #264]	@ (801a880 <pbuf_alloc+0x1e0>)
 801a778:	f00f fd20 	bl	802a1bc <iprintf>
                    ((mem_ptr_t)q->payload % MEM_ALIGNMENT) == 0);
        LWIP_ASSERT("PBUF_POOL_BUFSIZE must be bigger than MEM_ALIGNMENT",
 801a77c:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 801a77e:	3303      	adds	r3, #3
 801a780:	f023 0303 	bic.w	r3, r3, #3
 801a784:	f240 52ec 	movw	r2, #1516	@ 0x5ec
 801a788:	4293      	cmp	r3, r2
 801a78a:	d106      	bne.n	801a79a <pbuf_alloc+0xfa>
 801a78c:	4b3a      	ldr	r3, [pc, #232]	@ (801a878 <pbuf_alloc+0x1d8>)
 801a78e:	f44f 7281 	mov.w	r2, #258	@ 0x102
 801a792:	493c      	ldr	r1, [pc, #240]	@ (801a884 <pbuf_alloc+0x1e4>)
 801a794:	483a      	ldr	r0, [pc, #232]	@ (801a880 <pbuf_alloc+0x1e0>)
 801a796:	f00f fd11 	bl	802a1bc <iprintf>
                    (PBUF_POOL_BUFSIZE_ALIGNED - LWIP_MEM_ALIGN_SIZE(offset)) > 0 );
        if (p == NULL) {
 801a79a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801a79c:	2b00      	cmp	r3, #0
 801a79e:	d102      	bne.n	801a7a6 <pbuf_alloc+0x106>
          /* allocated head of pbuf chain (into p) */
          p = q;
 801a7a0:	693b      	ldr	r3, [r7, #16]
 801a7a2:	627b      	str	r3, [r7, #36]	@ 0x24
 801a7a4:	e002      	b.n	801a7ac <pbuf_alloc+0x10c>
        } else {
          /* make previous pbuf point to this pbuf */
          last->next = q;
 801a7a6:	69fb      	ldr	r3, [r7, #28]
 801a7a8:	693a      	ldr	r2, [r7, #16]
 801a7aa:	601a      	str	r2, [r3, #0]
        }
        last = q;
 801a7ac:	693b      	ldr	r3, [r7, #16]
 801a7ae:	61fb      	str	r3, [r7, #28]
        rem_len = (u16_t)(rem_len - qlen);
 801a7b0:	8b7a      	ldrh	r2, [r7, #26]
 801a7b2:	89fb      	ldrh	r3, [r7, #14]
 801a7b4:	1ad3      	subs	r3, r2, r3
 801a7b6:	837b      	strh	r3, [r7, #26]
        offset = 0;
 801a7b8:	2300      	movs	r3, #0
 801a7ba:	847b      	strh	r3, [r7, #34]	@ 0x22
      } while (rem_len > 0);
 801a7bc:	8b7b      	ldrh	r3, [r7, #26]
 801a7be:	2b00      	cmp	r3, #0
 801a7c0:	d19c      	bne.n	801a6fc <pbuf_alloc+0x5c>
      break;
 801a7c2:	e054      	b.n	801a86e <pbuf_alloc+0x1ce>
    }
    case PBUF_RAM: {
      u16_t payload_len = (u16_t)(LWIP_MEM_ALIGN_SIZE(offset) + LWIP_MEM_ALIGN_SIZE(length));
 801a7c4:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 801a7c6:	3303      	adds	r3, #3
 801a7c8:	b29b      	uxth	r3, r3
 801a7ca:	f023 0303 	bic.w	r3, r3, #3
 801a7ce:	b29a      	uxth	r2, r3
 801a7d0:	88bb      	ldrh	r3, [r7, #4]
 801a7d2:	3303      	adds	r3, #3
 801a7d4:	b29b      	uxth	r3, r3
 801a7d6:	f023 0303 	bic.w	r3, r3, #3
 801a7da:	b29b      	uxth	r3, r3
 801a7dc:	4413      	add	r3, r2
 801a7de:	833b      	strh	r3, [r7, #24]
      mem_size_t alloc_len = (mem_size_t)(LWIP_MEM_ALIGN_SIZE(SIZEOF_STRUCT_PBUF) + payload_len);
 801a7e0:	8b3b      	ldrh	r3, [r7, #24]
 801a7e2:	3310      	adds	r3, #16
 801a7e4:	617b      	str	r3, [r7, #20]

      /* bug #50040: Check for integer overflow when calculating alloc_len */
      if ((payload_len < LWIP_MEM_ALIGN_SIZE(length)) ||
 801a7e6:	8b3a      	ldrh	r2, [r7, #24]
 801a7e8:	88bb      	ldrh	r3, [r7, #4]
 801a7ea:	3303      	adds	r3, #3
 801a7ec:	f023 0303 	bic.w	r3, r3, #3
 801a7f0:	429a      	cmp	r2, r3
 801a7f2:	d306      	bcc.n	801a802 <pbuf_alloc+0x162>
          (alloc_len < LWIP_MEM_ALIGN_SIZE(length))) {
 801a7f4:	88bb      	ldrh	r3, [r7, #4]
 801a7f6:	3303      	adds	r3, #3
 801a7f8:	f023 0303 	bic.w	r3, r3, #3
      if ((payload_len < LWIP_MEM_ALIGN_SIZE(length)) ||
 801a7fc:	697a      	ldr	r2, [r7, #20]
 801a7fe:	429a      	cmp	r2, r3
 801a800:	d201      	bcs.n	801a806 <pbuf_alloc+0x166>
        return NULL;
 801a802:	2300      	movs	r3, #0
 801a804:	e034      	b.n	801a870 <pbuf_alloc+0x1d0>
      }

      /* If pbuf is to be allocated in RAM, allocate memory for it. */
      p = (struct pbuf *)mem_malloc(alloc_len);
 801a806:	6978      	ldr	r0, [r7, #20]
 801a808:	f7ff f960 	bl	8019acc <mem_malloc>
 801a80c:	6278      	str	r0, [r7, #36]	@ 0x24
      if (p == NULL) {
 801a80e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801a810:	2b00      	cmp	r3, #0
 801a812:	d101      	bne.n	801a818 <pbuf_alloc+0x178>
        return NULL;
 801a814:	2300      	movs	r3, #0
 801a816:	e02b      	b.n	801a870 <pbuf_alloc+0x1d0>
      }
      pbuf_init_alloced_pbuf(p, LWIP_MEM_ALIGN((void *)((u8_t *)p + SIZEOF_STRUCT_PBUF + offset)),
 801a818:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 801a81a:	3310      	adds	r3, #16
 801a81c:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 801a81e:	4413      	add	r3, r2
 801a820:	3303      	adds	r3, #3
 801a822:	f023 0303 	bic.w	r3, r3, #3
 801a826:	4618      	mov	r0, r3
 801a828:	88b9      	ldrh	r1, [r7, #4]
 801a82a:	88ba      	ldrh	r2, [r7, #4]
 801a82c:	2300      	movs	r3, #0
 801a82e:	9301      	str	r3, [sp, #4]
 801a830:	887b      	ldrh	r3, [r7, #2]
 801a832:	9300      	str	r3, [sp, #0]
 801a834:	460b      	mov	r3, r1
 801a836:	4601      	mov	r1, r0
 801a838:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 801a83a:	f7ff ff07 	bl	801a64c <pbuf_init_alloced_pbuf>
                             length, length, type, 0);
      LWIP_ASSERT("pbuf_alloc: pbuf->payload properly aligned",
 801a83e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801a840:	685b      	ldr	r3, [r3, #4]
 801a842:	f003 0303 	and.w	r3, r3, #3
 801a846:	2b00      	cmp	r3, #0
 801a848:	d010      	beq.n	801a86c <pbuf_alloc+0x1cc>
 801a84a:	4b0b      	ldr	r3, [pc, #44]	@ (801a878 <pbuf_alloc+0x1d8>)
 801a84c:	f44f 7291 	mov.w	r2, #290	@ 0x122
 801a850:	490d      	ldr	r1, [pc, #52]	@ (801a888 <pbuf_alloc+0x1e8>)
 801a852:	480b      	ldr	r0, [pc, #44]	@ (801a880 <pbuf_alloc+0x1e0>)
 801a854:	f00f fcb2 	bl	802a1bc <iprintf>
                  ((mem_ptr_t)p->payload % MEM_ALIGNMENT) == 0);
      break;
 801a858:	e008      	b.n	801a86c <pbuf_alloc+0x1cc>
    }
    default:
      LWIP_ASSERT("pbuf_alloc: erroneous type", 0);
 801a85a:	4b07      	ldr	r3, [pc, #28]	@ (801a878 <pbuf_alloc+0x1d8>)
 801a85c:	f240 1227 	movw	r2, #295	@ 0x127
 801a860:	490a      	ldr	r1, [pc, #40]	@ (801a88c <pbuf_alloc+0x1ec>)
 801a862:	4807      	ldr	r0, [pc, #28]	@ (801a880 <pbuf_alloc+0x1e0>)
 801a864:	f00f fcaa 	bl	802a1bc <iprintf>
      return NULL;
 801a868:	2300      	movs	r3, #0
 801a86a:	e001      	b.n	801a870 <pbuf_alloc+0x1d0>
      break;
 801a86c:	bf00      	nop
  }
  LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_alloc(length=%"U16_F") == %p\n", length, (void *)p));
  return p;
 801a86e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
}
 801a870:	4618      	mov	r0, r3
 801a872:	3728      	adds	r7, #40	@ 0x28
 801a874:	46bd      	mov	sp, r7
 801a876:	bd80      	pop	{r7, pc}
 801a878:	0802e93c 	.word	0x0802e93c
 801a87c:	0802e96c 	.word	0x0802e96c
 801a880:	0802e99c 	.word	0x0802e99c
 801a884:	0802e9c4 	.word	0x0802e9c4
 801a888:	0802e9f8 	.word	0x0802e9f8
 801a88c:	0802ea24 	.word	0x0802ea24

0801a890 <pbuf_alloc_reference>:
 *
 * @return the allocated pbuf.
 */
struct pbuf *
pbuf_alloc_reference(void *payload, u16_t length, pbuf_type type)
{
 801a890:	b580      	push	{r7, lr}
 801a892:	b086      	sub	sp, #24
 801a894:	af02      	add	r7, sp, #8
 801a896:	6078      	str	r0, [r7, #4]
 801a898:	460b      	mov	r3, r1
 801a89a:	807b      	strh	r3, [r7, #2]
 801a89c:	4613      	mov	r3, r2
 801a89e:	803b      	strh	r3, [r7, #0]
  struct pbuf *p;
  LWIP_ASSERT("invalid pbuf_type", (type == PBUF_REF) || (type == PBUF_ROM));
 801a8a0:	883b      	ldrh	r3, [r7, #0]
 801a8a2:	2b41      	cmp	r3, #65	@ 0x41
 801a8a4:	d009      	beq.n	801a8ba <pbuf_alloc_reference+0x2a>
 801a8a6:	883b      	ldrh	r3, [r7, #0]
 801a8a8:	2b01      	cmp	r3, #1
 801a8aa:	d006      	beq.n	801a8ba <pbuf_alloc_reference+0x2a>
 801a8ac:	4b0f      	ldr	r3, [pc, #60]	@ (801a8ec <pbuf_alloc_reference+0x5c>)
 801a8ae:	f44f 72a5 	mov.w	r2, #330	@ 0x14a
 801a8b2:	490f      	ldr	r1, [pc, #60]	@ (801a8f0 <pbuf_alloc_reference+0x60>)
 801a8b4:	480f      	ldr	r0, [pc, #60]	@ (801a8f4 <pbuf_alloc_reference+0x64>)
 801a8b6:	f00f fc81 	bl	802a1bc <iprintf>
  /* only allocate memory for the pbuf structure */
  p = (struct pbuf *)memp_malloc(MEMP_PBUF);
 801a8ba:	200b      	movs	r0, #11
 801a8bc:	f7ff faa2 	bl	8019e04 <memp_malloc>
 801a8c0:	60f8      	str	r0, [r7, #12]
  if (p == NULL) {
 801a8c2:	68fb      	ldr	r3, [r7, #12]
 801a8c4:	2b00      	cmp	r3, #0
 801a8c6:	d101      	bne.n	801a8cc <pbuf_alloc_reference+0x3c>
    LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_LEVEL_SERIOUS,
                ("pbuf_alloc_reference: Could not allocate MEMP_PBUF for PBUF_%s.\n",
                 (type == PBUF_ROM) ? "ROM" : "REF"));
    return NULL;
 801a8c8:	2300      	movs	r3, #0
 801a8ca:	e00b      	b.n	801a8e4 <pbuf_alloc_reference+0x54>
  }
  pbuf_init_alloced_pbuf(p, payload, length, length, type, 0);
 801a8cc:	8879      	ldrh	r1, [r7, #2]
 801a8ce:	887a      	ldrh	r2, [r7, #2]
 801a8d0:	2300      	movs	r3, #0
 801a8d2:	9301      	str	r3, [sp, #4]
 801a8d4:	883b      	ldrh	r3, [r7, #0]
 801a8d6:	9300      	str	r3, [sp, #0]
 801a8d8:	460b      	mov	r3, r1
 801a8da:	6879      	ldr	r1, [r7, #4]
 801a8dc:	68f8      	ldr	r0, [r7, #12]
 801a8de:	f7ff feb5 	bl	801a64c <pbuf_init_alloced_pbuf>
  return p;
 801a8e2:	68fb      	ldr	r3, [r7, #12]
}
 801a8e4:	4618      	mov	r0, r3
 801a8e6:	3710      	adds	r7, #16
 801a8e8:	46bd      	mov	sp, r7
 801a8ea:	bd80      	pop	{r7, pc}
 801a8ec:	0802e93c 	.word	0x0802e93c
 801a8f0:	0802ea40 	.word	0x0802ea40
 801a8f4:	0802e99c 	.word	0x0802e99c

0801a8f8 <pbuf_alloced_custom>:
 *        big enough to hold 'length' plus the header size
 */
struct pbuf *
pbuf_alloced_custom(pbuf_layer l, u16_t length, pbuf_type type, struct pbuf_custom *p,
                    void *payload_mem, u16_t payload_mem_len)
{
 801a8f8:	b580      	push	{r7, lr}
 801a8fa:	b088      	sub	sp, #32
 801a8fc:	af02      	add	r7, sp, #8
 801a8fe:	607b      	str	r3, [r7, #4]
 801a900:	4603      	mov	r3, r0
 801a902:	73fb      	strb	r3, [r7, #15]
 801a904:	460b      	mov	r3, r1
 801a906:	81bb      	strh	r3, [r7, #12]
 801a908:	4613      	mov	r3, r2
 801a90a:	817b      	strh	r3, [r7, #10]
  u16_t offset = (u16_t)l;
 801a90c:	7bfb      	ldrb	r3, [r7, #15]
 801a90e:	827b      	strh	r3, [r7, #18]
  void *payload;
  LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_alloced_custom(length=%"U16_F")\n", length));

  if (LWIP_MEM_ALIGN_SIZE(offset) + length > payload_mem_len) {
 801a910:	8a7b      	ldrh	r3, [r7, #18]
 801a912:	3303      	adds	r3, #3
 801a914:	f023 0203 	bic.w	r2, r3, #3
 801a918:	89bb      	ldrh	r3, [r7, #12]
 801a91a:	441a      	add	r2, r3
 801a91c:	8cbb      	ldrh	r3, [r7, #36]	@ 0x24
 801a91e:	429a      	cmp	r2, r3
 801a920:	d901      	bls.n	801a926 <pbuf_alloced_custom+0x2e>
    LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_LEVEL_WARNING, ("pbuf_alloced_custom(length=%"U16_F") buffer too short\n", length));
    return NULL;
 801a922:	2300      	movs	r3, #0
 801a924:	e018      	b.n	801a958 <pbuf_alloced_custom+0x60>
  }

  if (payload_mem != NULL) {
 801a926:	6a3b      	ldr	r3, [r7, #32]
 801a928:	2b00      	cmp	r3, #0
 801a92a:	d007      	beq.n	801a93c <pbuf_alloced_custom+0x44>
    payload = (u8_t *)payload_mem + LWIP_MEM_ALIGN_SIZE(offset);
 801a92c:	8a7b      	ldrh	r3, [r7, #18]
 801a92e:	3303      	adds	r3, #3
 801a930:	f023 0303 	bic.w	r3, r3, #3
 801a934:	6a3a      	ldr	r2, [r7, #32]
 801a936:	4413      	add	r3, r2
 801a938:	617b      	str	r3, [r7, #20]
 801a93a:	e001      	b.n	801a940 <pbuf_alloced_custom+0x48>
  } else {
    payload = NULL;
 801a93c:	2300      	movs	r3, #0
 801a93e:	617b      	str	r3, [r7, #20]
  }
  pbuf_init_alloced_pbuf(&p->pbuf, payload, length, length, type, PBUF_FLAG_IS_CUSTOM);
 801a940:	6878      	ldr	r0, [r7, #4]
 801a942:	89b9      	ldrh	r1, [r7, #12]
 801a944:	89ba      	ldrh	r2, [r7, #12]
 801a946:	2302      	movs	r3, #2
 801a948:	9301      	str	r3, [sp, #4]
 801a94a:	897b      	ldrh	r3, [r7, #10]
 801a94c:	9300      	str	r3, [sp, #0]
 801a94e:	460b      	mov	r3, r1
 801a950:	6979      	ldr	r1, [r7, #20]
 801a952:	f7ff fe7b 	bl	801a64c <pbuf_init_alloced_pbuf>
  return &p->pbuf;
 801a956:	687b      	ldr	r3, [r7, #4]
}
 801a958:	4618      	mov	r0, r3
 801a95a:	3718      	adds	r7, #24
 801a95c:	46bd      	mov	sp, r7
 801a95e:	bd80      	pop	{r7, pc}

0801a960 <pbuf_realloc>:
 *
 * @note Despite its name, pbuf_realloc cannot grow the size of a pbuf (chain).
 */
void
pbuf_realloc(struct pbuf *p, u16_t new_len)
{
 801a960:	b580      	push	{r7, lr}
 801a962:	b084      	sub	sp, #16
 801a964:	af00      	add	r7, sp, #0
 801a966:	6078      	str	r0, [r7, #4]
 801a968:	460b      	mov	r3, r1
 801a96a:	807b      	strh	r3, [r7, #2]
  struct pbuf *q;
  u16_t rem_len; /* remaining length */
  u16_t shrink;

  LWIP_ASSERT("pbuf_realloc: p != NULL", p != NULL);
 801a96c:	687b      	ldr	r3, [r7, #4]
 801a96e:	2b00      	cmp	r3, #0
 801a970:	d106      	bne.n	801a980 <pbuf_realloc+0x20>
 801a972:	4b39      	ldr	r3, [pc, #228]	@ (801aa58 <pbuf_realloc+0xf8>)
 801a974:	f44f 72cc 	mov.w	r2, #408	@ 0x198
 801a978:	4938      	ldr	r1, [pc, #224]	@ (801aa5c <pbuf_realloc+0xfc>)
 801a97a:	4839      	ldr	r0, [pc, #228]	@ (801aa60 <pbuf_realloc+0x100>)
 801a97c:	f00f fc1e 	bl	802a1bc <iprintf>

  /* desired length larger than current length? */
  if (new_len >= p->tot_len) {
 801a980:	687b      	ldr	r3, [r7, #4]
 801a982:	891b      	ldrh	r3, [r3, #8]
 801a984:	887a      	ldrh	r2, [r7, #2]
 801a986:	429a      	cmp	r2, r3
 801a988:	d261      	bcs.n	801aa4e <pbuf_realloc+0xee>
    return;
  }

  /* the pbuf chain grows by (new_len - p->tot_len) bytes
   * (which may be negative in case of shrinking) */
  shrink = (u16_t)(p->tot_len - new_len);
 801a98a:	687b      	ldr	r3, [r7, #4]
 801a98c:	891a      	ldrh	r2, [r3, #8]
 801a98e:	887b      	ldrh	r3, [r7, #2]
 801a990:	1ad3      	subs	r3, r2, r3
 801a992:	813b      	strh	r3, [r7, #8]

  /* first, step over any pbufs that should remain in the chain */
  rem_len = new_len;
 801a994:	887b      	ldrh	r3, [r7, #2]
 801a996:	817b      	strh	r3, [r7, #10]
  q = p;
 801a998:	687b      	ldr	r3, [r7, #4]
 801a99a:	60fb      	str	r3, [r7, #12]
  /* should this pbuf be kept? */
  while (rem_len > q->len) {
 801a99c:	e018      	b.n	801a9d0 <pbuf_realloc+0x70>
    /* decrease remaining length by pbuf length */
    rem_len = (u16_t)(rem_len - q->len);
 801a99e:	68fb      	ldr	r3, [r7, #12]
 801a9a0:	895b      	ldrh	r3, [r3, #10]
 801a9a2:	897a      	ldrh	r2, [r7, #10]
 801a9a4:	1ad3      	subs	r3, r2, r3
 801a9a6:	817b      	strh	r3, [r7, #10]
    /* decrease total length indicator */
    q->tot_len = (u16_t)(q->tot_len - shrink);
 801a9a8:	68fb      	ldr	r3, [r7, #12]
 801a9aa:	891a      	ldrh	r2, [r3, #8]
 801a9ac:	893b      	ldrh	r3, [r7, #8]
 801a9ae:	1ad3      	subs	r3, r2, r3
 801a9b0:	b29a      	uxth	r2, r3
 801a9b2:	68fb      	ldr	r3, [r7, #12]
 801a9b4:	811a      	strh	r2, [r3, #8]
    /* proceed to next pbuf in chain */
    q = q->next;
 801a9b6:	68fb      	ldr	r3, [r7, #12]
 801a9b8:	681b      	ldr	r3, [r3, #0]
 801a9ba:	60fb      	str	r3, [r7, #12]
    LWIP_ASSERT("pbuf_realloc: q != NULL", q != NULL);
 801a9bc:	68fb      	ldr	r3, [r7, #12]
 801a9be:	2b00      	cmp	r3, #0
 801a9c0:	d106      	bne.n	801a9d0 <pbuf_realloc+0x70>
 801a9c2:	4b25      	ldr	r3, [pc, #148]	@ (801aa58 <pbuf_realloc+0xf8>)
 801a9c4:	f240 12af 	movw	r2, #431	@ 0x1af
 801a9c8:	4926      	ldr	r1, [pc, #152]	@ (801aa64 <pbuf_realloc+0x104>)
 801a9ca:	4825      	ldr	r0, [pc, #148]	@ (801aa60 <pbuf_realloc+0x100>)
 801a9cc:	f00f fbf6 	bl	802a1bc <iprintf>
  while (rem_len > q->len) {
 801a9d0:	68fb      	ldr	r3, [r7, #12]
 801a9d2:	895b      	ldrh	r3, [r3, #10]
 801a9d4:	897a      	ldrh	r2, [r7, #10]
 801a9d6:	429a      	cmp	r2, r3
 801a9d8:	d8e1      	bhi.n	801a99e <pbuf_realloc+0x3e>
  /* we have now reached the new last pbuf (in q) */
  /* rem_len == desired length for pbuf q */

  /* shrink allocated memory for PBUF_RAM */
  /* (other types merely adjust their length fields */
  if (pbuf_match_allocsrc(q, PBUF_TYPE_ALLOC_SRC_MASK_STD_HEAP) && (rem_len != q->len)
 801a9da:	68fb      	ldr	r3, [r7, #12]
 801a9dc:	7b1b      	ldrb	r3, [r3, #12]
 801a9de:	f003 030f 	and.w	r3, r3, #15
 801a9e2:	2b00      	cmp	r3, #0
 801a9e4:	d11f      	bne.n	801aa26 <pbuf_realloc+0xc6>
 801a9e6:	68fb      	ldr	r3, [r7, #12]
 801a9e8:	895b      	ldrh	r3, [r3, #10]
 801a9ea:	897a      	ldrh	r2, [r7, #10]
 801a9ec:	429a      	cmp	r2, r3
 801a9ee:	d01a      	beq.n	801aa26 <pbuf_realloc+0xc6>
#if LWIP_SUPPORT_CUSTOM_PBUF
      && ((q->flags & PBUF_FLAG_IS_CUSTOM) == 0)
 801a9f0:	68fb      	ldr	r3, [r7, #12]
 801a9f2:	7b5b      	ldrb	r3, [r3, #13]
 801a9f4:	f003 0302 	and.w	r3, r3, #2
 801a9f8:	2b00      	cmp	r3, #0
 801a9fa:	d114      	bne.n	801aa26 <pbuf_realloc+0xc6>
#endif /* LWIP_SUPPORT_CUSTOM_PBUF */
     ) {
    /* reallocate and adjust the length of the pbuf that will be split */
    q = (struct pbuf *)mem_trim(q, (mem_size_t)(((u8_t *)q->payload - (u8_t *)q) + rem_len));
 801a9fc:	68fb      	ldr	r3, [r7, #12]
 801a9fe:	685a      	ldr	r2, [r3, #4]
 801aa00:	68fb      	ldr	r3, [r7, #12]
 801aa02:	1ad2      	subs	r2, r2, r3
 801aa04:	897b      	ldrh	r3, [r7, #10]
 801aa06:	4413      	add	r3, r2
 801aa08:	4619      	mov	r1, r3
 801aa0a:	68f8      	ldr	r0, [r7, #12]
 801aa0c:	f7fe ff5c 	bl	80198c8 <mem_trim>
 801aa10:	60f8      	str	r0, [r7, #12]
    LWIP_ASSERT("mem_trim returned q == NULL", q != NULL);
 801aa12:	68fb      	ldr	r3, [r7, #12]
 801aa14:	2b00      	cmp	r3, #0
 801aa16:	d106      	bne.n	801aa26 <pbuf_realloc+0xc6>
 801aa18:	4b0f      	ldr	r3, [pc, #60]	@ (801aa58 <pbuf_realloc+0xf8>)
 801aa1a:	f240 12bd 	movw	r2, #445	@ 0x1bd
 801aa1e:	4912      	ldr	r1, [pc, #72]	@ (801aa68 <pbuf_realloc+0x108>)
 801aa20:	480f      	ldr	r0, [pc, #60]	@ (801aa60 <pbuf_realloc+0x100>)
 801aa22:	f00f fbcb 	bl	802a1bc <iprintf>
  }
  /* adjust length fields for new last pbuf */
  q->len = rem_len;
 801aa26:	68fb      	ldr	r3, [r7, #12]
 801aa28:	897a      	ldrh	r2, [r7, #10]
 801aa2a:	815a      	strh	r2, [r3, #10]
  q->tot_len = q->len;
 801aa2c:	68fb      	ldr	r3, [r7, #12]
 801aa2e:	895a      	ldrh	r2, [r3, #10]
 801aa30:	68fb      	ldr	r3, [r7, #12]
 801aa32:	811a      	strh	r2, [r3, #8]

  /* any remaining pbufs in chain? */
  if (q->next != NULL) {
 801aa34:	68fb      	ldr	r3, [r7, #12]
 801aa36:	681b      	ldr	r3, [r3, #0]
 801aa38:	2b00      	cmp	r3, #0
 801aa3a:	d004      	beq.n	801aa46 <pbuf_realloc+0xe6>
    /* free remaining pbufs in chain */
    pbuf_free(q->next);
 801aa3c:	68fb      	ldr	r3, [r7, #12]
 801aa3e:	681b      	ldr	r3, [r3, #0]
 801aa40:	4618      	mov	r0, r3
 801aa42:	f000 f943 	bl	801accc <pbuf_free>
  }
  /* q is last packet in chain */
  q->next = NULL;
 801aa46:	68fb      	ldr	r3, [r7, #12]
 801aa48:	2200      	movs	r2, #0
 801aa4a:	601a      	str	r2, [r3, #0]
 801aa4c:	e000      	b.n	801aa50 <pbuf_realloc+0xf0>
    return;
 801aa4e:	bf00      	nop

}
 801aa50:	3710      	adds	r7, #16
 801aa52:	46bd      	mov	sp, r7
 801aa54:	bd80      	pop	{r7, pc}
 801aa56:	bf00      	nop
 801aa58:	0802e93c 	.word	0x0802e93c
 801aa5c:	0802ea54 	.word	0x0802ea54
 801aa60:	0802e99c 	.word	0x0802e99c
 801aa64:	0802ea6c 	.word	0x0802ea6c
 801aa68:	0802ea84 	.word	0x0802ea84

0801aa6c <pbuf_add_header_impl>:
 * @return non-zero on failure, zero on success.
 *
 */
static u8_t
pbuf_add_header_impl(struct pbuf *p, size_t header_size_increment, u8_t force)
{
 801aa6c:	b580      	push	{r7, lr}
 801aa6e:	b086      	sub	sp, #24
 801aa70:	af00      	add	r7, sp, #0
 801aa72:	60f8      	str	r0, [r7, #12]
 801aa74:	60b9      	str	r1, [r7, #8]
 801aa76:	4613      	mov	r3, r2
 801aa78:	71fb      	strb	r3, [r7, #7]
  u16_t type_internal;
  void *payload;
  u16_t increment_magnitude;

  LWIP_ASSERT("p != NULL", p != NULL);
 801aa7a:	68fb      	ldr	r3, [r7, #12]
 801aa7c:	2b00      	cmp	r3, #0
 801aa7e:	d106      	bne.n	801aa8e <pbuf_add_header_impl+0x22>
 801aa80:	4b2b      	ldr	r3, [pc, #172]	@ (801ab30 <pbuf_add_header_impl+0xc4>)
 801aa82:	f240 12df 	movw	r2, #479	@ 0x1df
 801aa86:	492b      	ldr	r1, [pc, #172]	@ (801ab34 <pbuf_add_header_impl+0xc8>)
 801aa88:	482b      	ldr	r0, [pc, #172]	@ (801ab38 <pbuf_add_header_impl+0xcc>)
 801aa8a:	f00f fb97 	bl	802a1bc <iprintf>
  if ((p == NULL) || (header_size_increment > 0xFFFF)) {
 801aa8e:	68fb      	ldr	r3, [r7, #12]
 801aa90:	2b00      	cmp	r3, #0
 801aa92:	d003      	beq.n	801aa9c <pbuf_add_header_impl+0x30>
 801aa94:	68bb      	ldr	r3, [r7, #8]
 801aa96:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 801aa9a:	d301      	bcc.n	801aaa0 <pbuf_add_header_impl+0x34>
    return 1;
 801aa9c:	2301      	movs	r3, #1
 801aa9e:	e043      	b.n	801ab28 <pbuf_add_header_impl+0xbc>
  }
  if (header_size_increment == 0) {
 801aaa0:	68bb      	ldr	r3, [r7, #8]
 801aaa2:	2b00      	cmp	r3, #0
 801aaa4:	d101      	bne.n	801aaaa <pbuf_add_header_impl+0x3e>
    return 0;
 801aaa6:	2300      	movs	r3, #0
 801aaa8:	e03e      	b.n	801ab28 <pbuf_add_header_impl+0xbc>
  }

  increment_magnitude = (u16_t)header_size_increment;
 801aaaa:	68bb      	ldr	r3, [r7, #8]
 801aaac:	827b      	strh	r3, [r7, #18]
  /* Do not allow tot_len to wrap as a result. */
  if ((u16_t)(increment_magnitude + p->tot_len) < increment_magnitude) {
 801aaae:	68fb      	ldr	r3, [r7, #12]
 801aab0:	891a      	ldrh	r2, [r3, #8]
 801aab2:	8a7b      	ldrh	r3, [r7, #18]
 801aab4:	4413      	add	r3, r2
 801aab6:	b29b      	uxth	r3, r3
 801aab8:	8a7a      	ldrh	r2, [r7, #18]
 801aaba:	429a      	cmp	r2, r3
 801aabc:	d901      	bls.n	801aac2 <pbuf_add_header_impl+0x56>
    return 1;
 801aabe:	2301      	movs	r3, #1
 801aac0:	e032      	b.n	801ab28 <pbuf_add_header_impl+0xbc>
  }

  type_internal = p->type_internal;
 801aac2:	68fb      	ldr	r3, [r7, #12]
 801aac4:	7b1b      	ldrb	r3, [r3, #12]
 801aac6:	823b      	strh	r3, [r7, #16]

  /* pbuf types containing payloads? */
  if (type_internal & PBUF_TYPE_FLAG_STRUCT_DATA_CONTIGUOUS) {
 801aac8:	8a3b      	ldrh	r3, [r7, #16]
 801aaca:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 801aace:	2b00      	cmp	r3, #0
 801aad0:	d00c      	beq.n	801aaec <pbuf_add_header_impl+0x80>
    /* set new payload pointer */
    payload = (u8_t *)p->payload - header_size_increment;
 801aad2:	68fb      	ldr	r3, [r7, #12]
 801aad4:	685a      	ldr	r2, [r3, #4]
 801aad6:	68bb      	ldr	r3, [r7, #8]
 801aad8:	425b      	negs	r3, r3
 801aada:	4413      	add	r3, r2
 801aadc:	617b      	str	r3, [r7, #20]
    /* boundary check fails? */
    if ((u8_t *)payload < (u8_t *)p + SIZEOF_STRUCT_PBUF) {
 801aade:	68fb      	ldr	r3, [r7, #12]
 801aae0:	3310      	adds	r3, #16
 801aae2:	697a      	ldr	r2, [r7, #20]
 801aae4:	429a      	cmp	r2, r3
 801aae6:	d20d      	bcs.n	801ab04 <pbuf_add_header_impl+0x98>
      LWIP_DEBUGF( PBUF_DEBUG | LWIP_DBG_TRACE,
                   ("pbuf_add_header: failed as %p < %p (not enough space for new header size)\n",
                    (void *)payload, (void *)((u8_t *)p + SIZEOF_STRUCT_PBUF)));
      /* bail out unsuccessfully */
      return 1;
 801aae8:	2301      	movs	r3, #1
 801aaea:	e01d      	b.n	801ab28 <pbuf_add_header_impl+0xbc>
    }
    /* pbuf types referring to external payloads? */
  } else {
    /* hide a header in the payload? */
    if (force) {
 801aaec:	79fb      	ldrb	r3, [r7, #7]
 801aaee:	2b00      	cmp	r3, #0
 801aaf0:	d006      	beq.n	801ab00 <pbuf_add_header_impl+0x94>
      payload = (u8_t *)p->payload - header_size_increment;
 801aaf2:	68fb      	ldr	r3, [r7, #12]
 801aaf4:	685a      	ldr	r2, [r3, #4]
 801aaf6:	68bb      	ldr	r3, [r7, #8]
 801aaf8:	425b      	negs	r3, r3
 801aafa:	4413      	add	r3, r2
 801aafc:	617b      	str	r3, [r7, #20]
 801aafe:	e001      	b.n	801ab04 <pbuf_add_header_impl+0x98>
    } else {
      /* cannot expand payload to front (yet!)
       * bail out unsuccessfully */
      return 1;
 801ab00:	2301      	movs	r3, #1
 801ab02:	e011      	b.n	801ab28 <pbuf_add_header_impl+0xbc>
  }
  LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_add_header: old %p new %p (%"U16_F")\n",
              (void *)p->payload, (void *)payload, increment_magnitude));

  /* modify pbuf fields */
  p->payload = payload;
 801ab04:	68fb      	ldr	r3, [r7, #12]
 801ab06:	697a      	ldr	r2, [r7, #20]
 801ab08:	605a      	str	r2, [r3, #4]
  p->len = (u16_t)(p->len + increment_magnitude);
 801ab0a:	68fb      	ldr	r3, [r7, #12]
 801ab0c:	895a      	ldrh	r2, [r3, #10]
 801ab0e:	8a7b      	ldrh	r3, [r7, #18]
 801ab10:	4413      	add	r3, r2
 801ab12:	b29a      	uxth	r2, r3
 801ab14:	68fb      	ldr	r3, [r7, #12]
 801ab16:	815a      	strh	r2, [r3, #10]
  p->tot_len = (u16_t)(p->tot_len + increment_magnitude);
 801ab18:	68fb      	ldr	r3, [r7, #12]
 801ab1a:	891a      	ldrh	r2, [r3, #8]
 801ab1c:	8a7b      	ldrh	r3, [r7, #18]
 801ab1e:	4413      	add	r3, r2
 801ab20:	b29a      	uxth	r2, r3
 801ab22:	68fb      	ldr	r3, [r7, #12]
 801ab24:	811a      	strh	r2, [r3, #8]


  return 0;
 801ab26:	2300      	movs	r3, #0
}
 801ab28:	4618      	mov	r0, r3
 801ab2a:	3718      	adds	r7, #24
 801ab2c:	46bd      	mov	sp, r7
 801ab2e:	bd80      	pop	{r7, pc}
 801ab30:	0802e93c 	.word	0x0802e93c
 801ab34:	0802eaa0 	.word	0x0802eaa0
 801ab38:	0802e99c 	.word	0x0802e99c

0801ab3c <pbuf_add_header>:
 * @return non-zero on failure, zero on success.
 *
 */
u8_t
pbuf_add_header(struct pbuf *p, size_t header_size_increment)
{
 801ab3c:	b580      	push	{r7, lr}
 801ab3e:	b082      	sub	sp, #8
 801ab40:	af00      	add	r7, sp, #0
 801ab42:	6078      	str	r0, [r7, #4]
 801ab44:	6039      	str	r1, [r7, #0]
  return pbuf_add_header_impl(p, header_size_increment, 0);
 801ab46:	2200      	movs	r2, #0
 801ab48:	6839      	ldr	r1, [r7, #0]
 801ab4a:	6878      	ldr	r0, [r7, #4]
 801ab4c:	f7ff ff8e 	bl	801aa6c <pbuf_add_header_impl>
 801ab50:	4603      	mov	r3, r0
}
 801ab52:	4618      	mov	r0, r3
 801ab54:	3708      	adds	r7, #8
 801ab56:	46bd      	mov	sp, r7
 801ab58:	bd80      	pop	{r7, pc}
	...

0801ab5c <pbuf_remove_header>:
 * @return non-zero on failure, zero on success.
 *
 */
u8_t
pbuf_remove_header(struct pbuf *p, size_t header_size_decrement)
{
 801ab5c:	b580      	push	{r7, lr}
 801ab5e:	b084      	sub	sp, #16
 801ab60:	af00      	add	r7, sp, #0
 801ab62:	6078      	str	r0, [r7, #4]
 801ab64:	6039      	str	r1, [r7, #0]
  void *payload;
  u16_t increment_magnitude;

  LWIP_ASSERT("p != NULL", p != NULL);
 801ab66:	687b      	ldr	r3, [r7, #4]
 801ab68:	2b00      	cmp	r3, #0
 801ab6a:	d106      	bne.n	801ab7a <pbuf_remove_header+0x1e>
 801ab6c:	4b20      	ldr	r3, [pc, #128]	@ (801abf0 <pbuf_remove_header+0x94>)
 801ab6e:	f240 224b 	movw	r2, #587	@ 0x24b
 801ab72:	4920      	ldr	r1, [pc, #128]	@ (801abf4 <pbuf_remove_header+0x98>)
 801ab74:	4820      	ldr	r0, [pc, #128]	@ (801abf8 <pbuf_remove_header+0x9c>)
 801ab76:	f00f fb21 	bl	802a1bc <iprintf>
  if ((p == NULL) || (header_size_decrement > 0xFFFF)) {
 801ab7a:	687b      	ldr	r3, [r7, #4]
 801ab7c:	2b00      	cmp	r3, #0
 801ab7e:	d003      	beq.n	801ab88 <pbuf_remove_header+0x2c>
 801ab80:	683b      	ldr	r3, [r7, #0]
 801ab82:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 801ab86:	d301      	bcc.n	801ab8c <pbuf_remove_header+0x30>
    return 1;
 801ab88:	2301      	movs	r3, #1
 801ab8a:	e02c      	b.n	801abe6 <pbuf_remove_header+0x8a>
  }
  if (header_size_decrement == 0) {
 801ab8c:	683b      	ldr	r3, [r7, #0]
 801ab8e:	2b00      	cmp	r3, #0
 801ab90:	d101      	bne.n	801ab96 <pbuf_remove_header+0x3a>
    return 0;
 801ab92:	2300      	movs	r3, #0
 801ab94:	e027      	b.n	801abe6 <pbuf_remove_header+0x8a>
  }

  increment_magnitude = (u16_t)header_size_decrement;
 801ab96:	683b      	ldr	r3, [r7, #0]
 801ab98:	81fb      	strh	r3, [r7, #14]
  /* Check that we aren't going to move off the end of the pbuf */
  LWIP_ERROR("increment_magnitude <= p->len", (increment_magnitude <= p->len), return 1;);
 801ab9a:	687b      	ldr	r3, [r7, #4]
 801ab9c:	895b      	ldrh	r3, [r3, #10]
 801ab9e:	89fa      	ldrh	r2, [r7, #14]
 801aba0:	429a      	cmp	r2, r3
 801aba2:	d908      	bls.n	801abb6 <pbuf_remove_header+0x5a>
 801aba4:	4b12      	ldr	r3, [pc, #72]	@ (801abf0 <pbuf_remove_header+0x94>)
 801aba6:	f240 2255 	movw	r2, #597	@ 0x255
 801abaa:	4914      	ldr	r1, [pc, #80]	@ (801abfc <pbuf_remove_header+0xa0>)
 801abac:	4812      	ldr	r0, [pc, #72]	@ (801abf8 <pbuf_remove_header+0x9c>)
 801abae:	f00f fb05 	bl	802a1bc <iprintf>
 801abb2:	2301      	movs	r3, #1
 801abb4:	e017      	b.n	801abe6 <pbuf_remove_header+0x8a>

  /* remember current payload pointer */
  payload = p->payload;
 801abb6:	687b      	ldr	r3, [r7, #4]
 801abb8:	685b      	ldr	r3, [r3, #4]
 801abba:	60bb      	str	r3, [r7, #8]
  LWIP_UNUSED_ARG(payload); /* only used in LWIP_DEBUGF below */

  /* increase payload pointer (guarded by length check above) */
  p->payload = (u8_t *)p->payload + header_size_decrement;
 801abbc:	687b      	ldr	r3, [r7, #4]
 801abbe:	685a      	ldr	r2, [r3, #4]
 801abc0:	683b      	ldr	r3, [r7, #0]
 801abc2:	441a      	add	r2, r3
 801abc4:	687b      	ldr	r3, [r7, #4]
 801abc6:	605a      	str	r2, [r3, #4]
  /* modify pbuf length fields */
  p->len = (u16_t)(p->len - increment_magnitude);
 801abc8:	687b      	ldr	r3, [r7, #4]
 801abca:	895a      	ldrh	r2, [r3, #10]
 801abcc:	89fb      	ldrh	r3, [r7, #14]
 801abce:	1ad3      	subs	r3, r2, r3
 801abd0:	b29a      	uxth	r2, r3
 801abd2:	687b      	ldr	r3, [r7, #4]
 801abd4:	815a      	strh	r2, [r3, #10]
  p->tot_len = (u16_t)(p->tot_len - increment_magnitude);
 801abd6:	687b      	ldr	r3, [r7, #4]
 801abd8:	891a      	ldrh	r2, [r3, #8]
 801abda:	89fb      	ldrh	r3, [r7, #14]
 801abdc:	1ad3      	subs	r3, r2, r3
 801abde:	b29a      	uxth	r2, r3
 801abe0:	687b      	ldr	r3, [r7, #4]
 801abe2:	811a      	strh	r2, [r3, #8]

  LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_remove_header: old %p new %p (%"U16_F")\n",
              (void *)payload, (void *)p->payload, increment_magnitude));

  return 0;
 801abe4:	2300      	movs	r3, #0
}
 801abe6:	4618      	mov	r0, r3
 801abe8:	3710      	adds	r7, #16
 801abea:	46bd      	mov	sp, r7
 801abec:	bd80      	pop	{r7, pc}
 801abee:	bf00      	nop
 801abf0:	0802e93c 	.word	0x0802e93c
 801abf4:	0802eaa0 	.word	0x0802eaa0
 801abf8:	0802e99c 	.word	0x0802e99c
 801abfc:	0802eaac 	.word	0x0802eaac

0801ac00 <pbuf_header_impl>:

static u8_t
pbuf_header_impl(struct pbuf *p, s16_t header_size_increment, u8_t force)
{
 801ac00:	b580      	push	{r7, lr}
 801ac02:	b082      	sub	sp, #8
 801ac04:	af00      	add	r7, sp, #0
 801ac06:	6078      	str	r0, [r7, #4]
 801ac08:	460b      	mov	r3, r1
 801ac0a:	807b      	strh	r3, [r7, #2]
 801ac0c:	4613      	mov	r3, r2
 801ac0e:	707b      	strb	r3, [r7, #1]
  if (header_size_increment < 0) {
 801ac10:	f9b7 3002 	ldrsh.w	r3, [r7, #2]
 801ac14:	2b00      	cmp	r3, #0
 801ac16:	da08      	bge.n	801ac2a <pbuf_header_impl+0x2a>
    return pbuf_remove_header(p, (size_t) - header_size_increment);
 801ac18:	f9b7 3002 	ldrsh.w	r3, [r7, #2]
 801ac1c:	425b      	negs	r3, r3
 801ac1e:	4619      	mov	r1, r3
 801ac20:	6878      	ldr	r0, [r7, #4]
 801ac22:	f7ff ff9b 	bl	801ab5c <pbuf_remove_header>
 801ac26:	4603      	mov	r3, r0
 801ac28:	e007      	b.n	801ac3a <pbuf_header_impl+0x3a>
  } else {
    return pbuf_add_header_impl(p, (size_t)header_size_increment, force);
 801ac2a:	f9b7 3002 	ldrsh.w	r3, [r7, #2]
 801ac2e:	787a      	ldrb	r2, [r7, #1]
 801ac30:	4619      	mov	r1, r3
 801ac32:	6878      	ldr	r0, [r7, #4]
 801ac34:	f7ff ff1a 	bl	801aa6c <pbuf_add_header_impl>
 801ac38:	4603      	mov	r3, r0
  }
}
 801ac3a:	4618      	mov	r0, r3
 801ac3c:	3708      	adds	r7, #8
 801ac3e:	46bd      	mov	sp, r7
 801ac40:	bd80      	pop	{r7, pc}

0801ac42 <pbuf_header_force>:
 * Same as pbuf_header but does not check if 'header_size > 0' is allowed.
 * This is used internally only, to allow PBUF_REF for RX.
 */
u8_t
pbuf_header_force(struct pbuf *p, s16_t header_size_increment)
{
 801ac42:	b580      	push	{r7, lr}
 801ac44:	b082      	sub	sp, #8
 801ac46:	af00      	add	r7, sp, #0
 801ac48:	6078      	str	r0, [r7, #4]
 801ac4a:	460b      	mov	r3, r1
 801ac4c:	807b      	strh	r3, [r7, #2]
  return pbuf_header_impl(p, header_size_increment, 1);
 801ac4e:	f9b7 3002 	ldrsh.w	r3, [r7, #2]
 801ac52:	2201      	movs	r2, #1
 801ac54:	4619      	mov	r1, r3
 801ac56:	6878      	ldr	r0, [r7, #4]
 801ac58:	f7ff ffd2 	bl	801ac00 <pbuf_header_impl>
 801ac5c:	4603      	mov	r3, r0
}
 801ac5e:	4618      	mov	r0, r3
 801ac60:	3708      	adds	r7, #8
 801ac62:	46bd      	mov	sp, r7
 801ac64:	bd80      	pop	{r7, pc}

0801ac66 <pbuf_free_header>:
 *                   takes an u16_t not s16_t!
 * @return the new head pbuf
 */
struct pbuf *
pbuf_free_header(struct pbuf *q, u16_t size)
{
 801ac66:	b580      	push	{r7, lr}
 801ac68:	b086      	sub	sp, #24
 801ac6a:	af00      	add	r7, sp, #0
 801ac6c:	6078      	str	r0, [r7, #4]
 801ac6e:	460b      	mov	r3, r1
 801ac70:	807b      	strh	r3, [r7, #2]
  struct pbuf *p = q;
 801ac72:	687b      	ldr	r3, [r7, #4]
 801ac74:	617b      	str	r3, [r7, #20]
  u16_t free_left = size;
 801ac76:	887b      	ldrh	r3, [r7, #2]
 801ac78:	827b      	strh	r3, [r7, #18]
  while (free_left && p) {
 801ac7a:	e01c      	b.n	801acb6 <pbuf_free_header+0x50>
    if (free_left >= p->len) {
 801ac7c:	697b      	ldr	r3, [r7, #20]
 801ac7e:	895b      	ldrh	r3, [r3, #10]
 801ac80:	8a7a      	ldrh	r2, [r7, #18]
 801ac82:	429a      	cmp	r2, r3
 801ac84:	d310      	bcc.n	801aca8 <pbuf_free_header+0x42>
      struct pbuf *f = p;
 801ac86:	697b      	ldr	r3, [r7, #20]
 801ac88:	60fb      	str	r3, [r7, #12]
      free_left = (u16_t)(free_left - p->len);
 801ac8a:	697b      	ldr	r3, [r7, #20]
 801ac8c:	895b      	ldrh	r3, [r3, #10]
 801ac8e:	8a7a      	ldrh	r2, [r7, #18]
 801ac90:	1ad3      	subs	r3, r2, r3
 801ac92:	827b      	strh	r3, [r7, #18]
      p = p->next;
 801ac94:	697b      	ldr	r3, [r7, #20]
 801ac96:	681b      	ldr	r3, [r3, #0]
 801ac98:	617b      	str	r3, [r7, #20]
      f->next = 0;
 801ac9a:	68fb      	ldr	r3, [r7, #12]
 801ac9c:	2200      	movs	r2, #0
 801ac9e:	601a      	str	r2, [r3, #0]
      pbuf_free(f);
 801aca0:	68f8      	ldr	r0, [r7, #12]
 801aca2:	f000 f813 	bl	801accc <pbuf_free>
 801aca6:	e006      	b.n	801acb6 <pbuf_free_header+0x50>
    } else {
      pbuf_remove_header(p, free_left);
 801aca8:	8a7b      	ldrh	r3, [r7, #18]
 801acaa:	4619      	mov	r1, r3
 801acac:	6978      	ldr	r0, [r7, #20]
 801acae:	f7ff ff55 	bl	801ab5c <pbuf_remove_header>
      free_left = 0;
 801acb2:	2300      	movs	r3, #0
 801acb4:	827b      	strh	r3, [r7, #18]
  while (free_left && p) {
 801acb6:	8a7b      	ldrh	r3, [r7, #18]
 801acb8:	2b00      	cmp	r3, #0
 801acba:	d002      	beq.n	801acc2 <pbuf_free_header+0x5c>
 801acbc:	697b      	ldr	r3, [r7, #20]
 801acbe:	2b00      	cmp	r3, #0
 801acc0:	d1dc      	bne.n	801ac7c <pbuf_free_header+0x16>
    }
  }
  return p;
 801acc2:	697b      	ldr	r3, [r7, #20]
}
 801acc4:	4618      	mov	r0, r3
 801acc6:	3718      	adds	r7, #24
 801acc8:	46bd      	mov	sp, r7
 801acca:	bd80      	pop	{r7, pc}

0801accc <pbuf_free>:
 * 1->1->1 becomes .......
 *
 */
u8_t
pbuf_free(struct pbuf *p)
{
 801accc:	b580      	push	{r7, lr}
 801acce:	b088      	sub	sp, #32
 801acd0:	af00      	add	r7, sp, #0
 801acd2:	6078      	str	r0, [r7, #4]
  u8_t alloc_src;
  struct pbuf *q;
  u8_t count;

  if (p == NULL) {
 801acd4:	687b      	ldr	r3, [r7, #4]
 801acd6:	2b00      	cmp	r3, #0
 801acd8:	d10b      	bne.n	801acf2 <pbuf_free+0x26>
    LWIP_ASSERT("p != NULL", p != NULL);
 801acda:	687b      	ldr	r3, [r7, #4]
 801acdc:	2b00      	cmp	r3, #0
 801acde:	d106      	bne.n	801acee <pbuf_free+0x22>
 801ace0:	4b3b      	ldr	r3, [pc, #236]	@ (801add0 <pbuf_free+0x104>)
 801ace2:	f44f 7237 	mov.w	r2, #732	@ 0x2dc
 801ace6:	493b      	ldr	r1, [pc, #236]	@ (801add4 <pbuf_free+0x108>)
 801ace8:	483b      	ldr	r0, [pc, #236]	@ (801add8 <pbuf_free+0x10c>)
 801acea:	f00f fa67 	bl	802a1bc <iprintf>
    /* if assertions are disabled, proceed with debug output */
    LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_LEVEL_SERIOUS,
                ("pbuf_free(p == NULL) was called.\n"));
    return 0;
 801acee:	2300      	movs	r3, #0
 801acf0:	e069      	b.n	801adc6 <pbuf_free+0xfa>
  }
  LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_free(%p)\n", (void *)p));

  PERF_START;

  count = 0;
 801acf2:	2300      	movs	r3, #0
 801acf4:	77fb      	strb	r3, [r7, #31]
  /* de-allocate all consecutive pbufs from the head of the chain that
   * obtain a zero reference count after decrementing*/
  while (p != NULL) {
 801acf6:	e062      	b.n	801adbe <pbuf_free+0xf2>
    LWIP_PBUF_REF_T ref;
    SYS_ARCH_DECL_PROTECT(old_level);
    /* Since decrementing ref cannot be guaranteed to be a single machine operation
     * we must protect it. We put the new ref into a local variable to prevent
     * further protection. */
    SYS_ARCH_PROTECT(old_level);
 801acf8:	f00b ffca 	bl	8026c90 <sys_arch_protect>
 801acfc:	61b8      	str	r0, [r7, #24]
    /* all pbufs in a chain are referenced at least once */
    LWIP_ASSERT("pbuf_free: p->ref > 0", p->ref > 0);
 801acfe:	687b      	ldr	r3, [r7, #4]
 801ad00:	7b9b      	ldrb	r3, [r3, #14]
 801ad02:	2b00      	cmp	r3, #0
 801ad04:	d106      	bne.n	801ad14 <pbuf_free+0x48>
 801ad06:	4b32      	ldr	r3, [pc, #200]	@ (801add0 <pbuf_free+0x104>)
 801ad08:	f240 22f1 	movw	r2, #753	@ 0x2f1
 801ad0c:	4933      	ldr	r1, [pc, #204]	@ (801addc <pbuf_free+0x110>)
 801ad0e:	4832      	ldr	r0, [pc, #200]	@ (801add8 <pbuf_free+0x10c>)
 801ad10:	f00f fa54 	bl	802a1bc <iprintf>
    /* decrease reference count (number of pointers to pbuf) */
    ref = --(p->ref);
 801ad14:	687b      	ldr	r3, [r7, #4]
 801ad16:	7b9b      	ldrb	r3, [r3, #14]
 801ad18:	3b01      	subs	r3, #1
 801ad1a:	b2da      	uxtb	r2, r3
 801ad1c:	687b      	ldr	r3, [r7, #4]
 801ad1e:	739a      	strb	r2, [r3, #14]
 801ad20:	687b      	ldr	r3, [r7, #4]
 801ad22:	7b9b      	ldrb	r3, [r3, #14]
 801ad24:	75fb      	strb	r3, [r7, #23]
    SYS_ARCH_UNPROTECT(old_level);
 801ad26:	69b8      	ldr	r0, [r7, #24]
 801ad28:	f00b ffc0 	bl	8026cac <sys_arch_unprotect>
    /* this pbuf is no longer referenced to? */
    if (ref == 0) {
 801ad2c:	7dfb      	ldrb	r3, [r7, #23]
 801ad2e:	2b00      	cmp	r3, #0
 801ad30:	d143      	bne.n	801adba <pbuf_free+0xee>
      /* remember next pbuf in chain for next iteration */
      q = p->next;
 801ad32:	687b      	ldr	r3, [r7, #4]
 801ad34:	681b      	ldr	r3, [r3, #0]
 801ad36:	613b      	str	r3, [r7, #16]
      LWIP_DEBUGF( PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_free: deallocating %p\n", (void *)p));
      alloc_src = pbuf_get_allocsrc(p);
 801ad38:	687b      	ldr	r3, [r7, #4]
 801ad3a:	7b1b      	ldrb	r3, [r3, #12]
 801ad3c:	f003 030f 	and.w	r3, r3, #15
 801ad40:	73fb      	strb	r3, [r7, #15]
#if LWIP_SUPPORT_CUSTOM_PBUF
      /* is this a custom pbuf? */
      if ((p->flags & PBUF_FLAG_IS_CUSTOM) != 0) {
 801ad42:	687b      	ldr	r3, [r7, #4]
 801ad44:	7b5b      	ldrb	r3, [r3, #13]
 801ad46:	f003 0302 	and.w	r3, r3, #2
 801ad4a:	2b00      	cmp	r3, #0
 801ad4c:	d011      	beq.n	801ad72 <pbuf_free+0xa6>
        struct pbuf_custom *pc = (struct pbuf_custom *)p;
 801ad4e:	687b      	ldr	r3, [r7, #4]
 801ad50:	60bb      	str	r3, [r7, #8]
        LWIP_ASSERT("pc->custom_free_function != NULL", pc->custom_free_function != NULL);
 801ad52:	68bb      	ldr	r3, [r7, #8]
 801ad54:	691b      	ldr	r3, [r3, #16]
 801ad56:	2b00      	cmp	r3, #0
 801ad58:	d106      	bne.n	801ad68 <pbuf_free+0x9c>
 801ad5a:	4b1d      	ldr	r3, [pc, #116]	@ (801add0 <pbuf_free+0x104>)
 801ad5c:	f240 22ff 	movw	r2, #767	@ 0x2ff
 801ad60:	491f      	ldr	r1, [pc, #124]	@ (801ade0 <pbuf_free+0x114>)
 801ad62:	481d      	ldr	r0, [pc, #116]	@ (801add8 <pbuf_free+0x10c>)
 801ad64:	f00f fa2a 	bl	802a1bc <iprintf>
        pc->custom_free_function(p);
 801ad68:	68bb      	ldr	r3, [r7, #8]
 801ad6a:	691b      	ldr	r3, [r3, #16]
 801ad6c:	6878      	ldr	r0, [r7, #4]
 801ad6e:	4798      	blx	r3
 801ad70:	e01d      	b.n	801adae <pbuf_free+0xe2>
      } else
#endif /* LWIP_SUPPORT_CUSTOM_PBUF */
      {
        /* is this a pbuf from the pool? */
        if (alloc_src == PBUF_TYPE_ALLOC_SRC_MASK_STD_MEMP_PBUF_POOL) {
 801ad72:	7bfb      	ldrb	r3, [r7, #15]
 801ad74:	2b02      	cmp	r3, #2
 801ad76:	d104      	bne.n	801ad82 <pbuf_free+0xb6>
          memp_free(MEMP_PBUF_POOL, p);
 801ad78:	6879      	ldr	r1, [r7, #4]
 801ad7a:	200c      	movs	r0, #12
 801ad7c:	f7ff f8b8 	bl	8019ef0 <memp_free>
 801ad80:	e015      	b.n	801adae <pbuf_free+0xe2>
          /* is this a ROM or RAM referencing pbuf? */
        } else if (alloc_src == PBUF_TYPE_ALLOC_SRC_MASK_STD_MEMP_PBUF) {
 801ad82:	7bfb      	ldrb	r3, [r7, #15]
 801ad84:	2b01      	cmp	r3, #1
 801ad86:	d104      	bne.n	801ad92 <pbuf_free+0xc6>
          memp_free(MEMP_PBUF, p);
 801ad88:	6879      	ldr	r1, [r7, #4]
 801ad8a:	200b      	movs	r0, #11
 801ad8c:	f7ff f8b0 	bl	8019ef0 <memp_free>
 801ad90:	e00d      	b.n	801adae <pbuf_free+0xe2>
          /* type == PBUF_RAM */
        } else if (alloc_src == PBUF_TYPE_ALLOC_SRC_MASK_STD_HEAP) {
 801ad92:	7bfb      	ldrb	r3, [r7, #15]
 801ad94:	2b00      	cmp	r3, #0
 801ad96:	d103      	bne.n	801ada0 <pbuf_free+0xd4>
          mem_free(p);
 801ad98:	6878      	ldr	r0, [r7, #4]
 801ad9a:	f7fe fd05 	bl	80197a8 <mem_free>
 801ad9e:	e006      	b.n	801adae <pbuf_free+0xe2>
        } else {
          /* @todo: support freeing other types */
          LWIP_ASSERT("invalid pbuf type", 0);
 801ada0:	4b0b      	ldr	r3, [pc, #44]	@ (801add0 <pbuf_free+0x104>)
 801ada2:	f240 320f 	movw	r2, #783	@ 0x30f
 801ada6:	490f      	ldr	r1, [pc, #60]	@ (801ade4 <pbuf_free+0x118>)
 801ada8:	480b      	ldr	r0, [pc, #44]	@ (801add8 <pbuf_free+0x10c>)
 801adaa:	f00f fa07 	bl	802a1bc <iprintf>
        }
      }
      count++;
 801adae:	7ffb      	ldrb	r3, [r7, #31]
 801adb0:	3301      	adds	r3, #1
 801adb2:	77fb      	strb	r3, [r7, #31]
      /* proceed to next pbuf */
      p = q;
 801adb4:	693b      	ldr	r3, [r7, #16]
 801adb6:	607b      	str	r3, [r7, #4]
 801adb8:	e001      	b.n	801adbe <pbuf_free+0xf2>
      /* p->ref > 0, this pbuf is still referenced to */
      /* (and so the remaining pbufs in chain as well) */
    } else {
      LWIP_DEBUGF( PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_free: %p has ref %"U16_F", ending here.\n", (void *)p, (u16_t)ref));
      /* stop walking through the chain */
      p = NULL;
 801adba:	2300      	movs	r3, #0
 801adbc:	607b      	str	r3, [r7, #4]
  while (p != NULL) {
 801adbe:	687b      	ldr	r3, [r7, #4]
 801adc0:	2b00      	cmp	r3, #0
 801adc2:	d199      	bne.n	801acf8 <pbuf_free+0x2c>
    }
  }
  PERF_STOP("pbuf_free");
  /* return number of de-allocated pbufs */
  return count;
 801adc4:	7ffb      	ldrb	r3, [r7, #31]
}
 801adc6:	4618      	mov	r0, r3
 801adc8:	3720      	adds	r7, #32
 801adca:	46bd      	mov	sp, r7
 801adcc:	bd80      	pop	{r7, pc}
 801adce:	bf00      	nop
 801add0:	0802e93c 	.word	0x0802e93c
 801add4:	0802eaa0 	.word	0x0802eaa0
 801add8:	0802e99c 	.word	0x0802e99c
 801addc:	0802eacc 	.word	0x0802eacc
 801ade0:	0802eae4 	.word	0x0802eae4
 801ade4:	0802eb08 	.word	0x0802eb08

0801ade8 <pbuf_clen>:
 * @param p first pbuf of chain
 * @return the number of pbufs in a chain
 */
u16_t
pbuf_clen(const struct pbuf *p)
{
 801ade8:	b480      	push	{r7}
 801adea:	b085      	sub	sp, #20
 801adec:	af00      	add	r7, sp, #0
 801adee:	6078      	str	r0, [r7, #4]
  u16_t len;

  len = 0;
 801adf0:	2300      	movs	r3, #0
 801adf2:	81fb      	strh	r3, [r7, #14]
  while (p != NULL) {
 801adf4:	e005      	b.n	801ae02 <pbuf_clen+0x1a>
    ++len;
 801adf6:	89fb      	ldrh	r3, [r7, #14]
 801adf8:	3301      	adds	r3, #1
 801adfa:	81fb      	strh	r3, [r7, #14]
    p = p->next;
 801adfc:	687b      	ldr	r3, [r7, #4]
 801adfe:	681b      	ldr	r3, [r3, #0]
 801ae00:	607b      	str	r3, [r7, #4]
  while (p != NULL) {
 801ae02:	687b      	ldr	r3, [r7, #4]
 801ae04:	2b00      	cmp	r3, #0
 801ae06:	d1f6      	bne.n	801adf6 <pbuf_clen+0xe>
  }
  return len;
 801ae08:	89fb      	ldrh	r3, [r7, #14]
}
 801ae0a:	4618      	mov	r0, r3
 801ae0c:	3714      	adds	r7, #20
 801ae0e:	46bd      	mov	sp, r7
 801ae10:	f85d 7b04 	ldr.w	r7, [sp], #4
 801ae14:	4770      	bx	lr
	...

0801ae18 <pbuf_ref>:
 * @param p pbuf to increase reference counter of
 *
 */
void
pbuf_ref(struct pbuf *p)
{
 801ae18:	b580      	push	{r7, lr}
 801ae1a:	b084      	sub	sp, #16
 801ae1c:	af00      	add	r7, sp, #0
 801ae1e:	6078      	str	r0, [r7, #4]
  /* pbuf given? */
  if (p != NULL) {
 801ae20:	687b      	ldr	r3, [r7, #4]
 801ae22:	2b00      	cmp	r3, #0
 801ae24:	d016      	beq.n	801ae54 <pbuf_ref+0x3c>
    SYS_ARCH_SET(p->ref, (LWIP_PBUF_REF_T)(p->ref + 1));
 801ae26:	f00b ff33 	bl	8026c90 <sys_arch_protect>
 801ae2a:	60f8      	str	r0, [r7, #12]
 801ae2c:	687b      	ldr	r3, [r7, #4]
 801ae2e:	7b9b      	ldrb	r3, [r3, #14]
 801ae30:	3301      	adds	r3, #1
 801ae32:	b2da      	uxtb	r2, r3
 801ae34:	687b      	ldr	r3, [r7, #4]
 801ae36:	739a      	strb	r2, [r3, #14]
 801ae38:	68f8      	ldr	r0, [r7, #12]
 801ae3a:	f00b ff37 	bl	8026cac <sys_arch_unprotect>
    LWIP_ASSERT("pbuf ref overflow", p->ref > 0);
 801ae3e:	687b      	ldr	r3, [r7, #4]
 801ae40:	7b9b      	ldrb	r3, [r3, #14]
 801ae42:	2b00      	cmp	r3, #0
 801ae44:	d106      	bne.n	801ae54 <pbuf_ref+0x3c>
 801ae46:	4b05      	ldr	r3, [pc, #20]	@ (801ae5c <pbuf_ref+0x44>)
 801ae48:	f240 3242 	movw	r2, #834	@ 0x342
 801ae4c:	4904      	ldr	r1, [pc, #16]	@ (801ae60 <pbuf_ref+0x48>)
 801ae4e:	4805      	ldr	r0, [pc, #20]	@ (801ae64 <pbuf_ref+0x4c>)
 801ae50:	f00f f9b4 	bl	802a1bc <iprintf>
  }
}
 801ae54:	bf00      	nop
 801ae56:	3710      	adds	r7, #16
 801ae58:	46bd      	mov	sp, r7
 801ae5a:	bd80      	pop	{r7, pc}
 801ae5c:	0802e93c 	.word	0x0802e93c
 801ae60:	0802eb1c 	.word	0x0802eb1c
 801ae64:	0802e99c 	.word	0x0802e99c

0801ae68 <pbuf_cat>:
 *
 * @see pbuf_chain()
 */
void
pbuf_cat(struct pbuf *h, struct pbuf *t)
{
 801ae68:	b580      	push	{r7, lr}
 801ae6a:	b084      	sub	sp, #16
 801ae6c:	af00      	add	r7, sp, #0
 801ae6e:	6078      	str	r0, [r7, #4]
 801ae70:	6039      	str	r1, [r7, #0]
  struct pbuf *p;

  LWIP_ERROR("(h != NULL) && (t != NULL) (programmer violates API)",
 801ae72:	687b      	ldr	r3, [r7, #4]
 801ae74:	2b00      	cmp	r3, #0
 801ae76:	d002      	beq.n	801ae7e <pbuf_cat+0x16>
 801ae78:	683b      	ldr	r3, [r7, #0]
 801ae7a:	2b00      	cmp	r3, #0
 801ae7c:	d107      	bne.n	801ae8e <pbuf_cat+0x26>
 801ae7e:	4b20      	ldr	r3, [pc, #128]	@ (801af00 <pbuf_cat+0x98>)
 801ae80:	f240 3259 	movw	r2, #857	@ 0x359
 801ae84:	491f      	ldr	r1, [pc, #124]	@ (801af04 <pbuf_cat+0x9c>)
 801ae86:	4820      	ldr	r0, [pc, #128]	@ (801af08 <pbuf_cat+0xa0>)
 801ae88:	f00f f998 	bl	802a1bc <iprintf>
 801ae8c:	e034      	b.n	801aef8 <pbuf_cat+0x90>
             ((h != NULL) && (t != NULL)), return;);

  /* proceed to last pbuf of chain */
  for (p = h; p->next != NULL; p = p->next) {
 801ae8e:	687b      	ldr	r3, [r7, #4]
 801ae90:	60fb      	str	r3, [r7, #12]
 801ae92:	e00a      	b.n	801aeaa <pbuf_cat+0x42>
    /* add total length of second chain to all totals of first chain */
    p->tot_len = (u16_t)(p->tot_len + t->tot_len);
 801ae94:	68fb      	ldr	r3, [r7, #12]
 801ae96:	891a      	ldrh	r2, [r3, #8]
 801ae98:	683b      	ldr	r3, [r7, #0]
 801ae9a:	891b      	ldrh	r3, [r3, #8]
 801ae9c:	4413      	add	r3, r2
 801ae9e:	b29a      	uxth	r2, r3
 801aea0:	68fb      	ldr	r3, [r7, #12]
 801aea2:	811a      	strh	r2, [r3, #8]
  for (p = h; p->next != NULL; p = p->next) {
 801aea4:	68fb      	ldr	r3, [r7, #12]
 801aea6:	681b      	ldr	r3, [r3, #0]
 801aea8:	60fb      	str	r3, [r7, #12]
 801aeaa:	68fb      	ldr	r3, [r7, #12]
 801aeac:	681b      	ldr	r3, [r3, #0]
 801aeae:	2b00      	cmp	r3, #0
 801aeb0:	d1f0      	bne.n	801ae94 <pbuf_cat+0x2c>
  }
  /* { p is last pbuf of first h chain, p->next == NULL } */
  LWIP_ASSERT("p->tot_len == p->len (of last pbuf in chain)", p->tot_len == p->len);
 801aeb2:	68fb      	ldr	r3, [r7, #12]
 801aeb4:	891a      	ldrh	r2, [r3, #8]
 801aeb6:	68fb      	ldr	r3, [r7, #12]
 801aeb8:	895b      	ldrh	r3, [r3, #10]
 801aeba:	429a      	cmp	r2, r3
 801aebc:	d006      	beq.n	801aecc <pbuf_cat+0x64>
 801aebe:	4b10      	ldr	r3, [pc, #64]	@ (801af00 <pbuf_cat+0x98>)
 801aec0:	f240 3262 	movw	r2, #866	@ 0x362
 801aec4:	4911      	ldr	r1, [pc, #68]	@ (801af0c <pbuf_cat+0xa4>)
 801aec6:	4810      	ldr	r0, [pc, #64]	@ (801af08 <pbuf_cat+0xa0>)
 801aec8:	f00f f978 	bl	802a1bc <iprintf>
  LWIP_ASSERT("p->next == NULL", p->next == NULL);
 801aecc:	68fb      	ldr	r3, [r7, #12]
 801aece:	681b      	ldr	r3, [r3, #0]
 801aed0:	2b00      	cmp	r3, #0
 801aed2:	d006      	beq.n	801aee2 <pbuf_cat+0x7a>
 801aed4:	4b0a      	ldr	r3, [pc, #40]	@ (801af00 <pbuf_cat+0x98>)
 801aed6:	f240 3263 	movw	r2, #867	@ 0x363
 801aeda:	490d      	ldr	r1, [pc, #52]	@ (801af10 <pbuf_cat+0xa8>)
 801aedc:	480a      	ldr	r0, [pc, #40]	@ (801af08 <pbuf_cat+0xa0>)
 801aede:	f00f f96d 	bl	802a1bc <iprintf>
  /* add total length of second chain to last pbuf total of first chain */
  p->tot_len = (u16_t)(p->tot_len + t->tot_len);
 801aee2:	68fb      	ldr	r3, [r7, #12]
 801aee4:	891a      	ldrh	r2, [r3, #8]
 801aee6:	683b      	ldr	r3, [r7, #0]
 801aee8:	891b      	ldrh	r3, [r3, #8]
 801aeea:	4413      	add	r3, r2
 801aeec:	b29a      	uxth	r2, r3
 801aeee:	68fb      	ldr	r3, [r7, #12]
 801aef0:	811a      	strh	r2, [r3, #8]
  /* chain last pbuf of head (p) with first of tail (t) */
  p->next = t;
 801aef2:	68fb      	ldr	r3, [r7, #12]
 801aef4:	683a      	ldr	r2, [r7, #0]
 801aef6:	601a      	str	r2, [r3, #0]
  /* p->next now references t, but the caller will drop its reference to t,
   * so netto there is no change to the reference count of t.
   */
}
 801aef8:	3710      	adds	r7, #16
 801aefa:	46bd      	mov	sp, r7
 801aefc:	bd80      	pop	{r7, pc}
 801aefe:	bf00      	nop
 801af00:	0802e93c 	.word	0x0802e93c
 801af04:	0802eb30 	.word	0x0802eb30
 801af08:	0802e99c 	.word	0x0802e99c
 801af0c:	0802eb68 	.word	0x0802eb68
 801af10:	0802eb98 	.word	0x0802eb98

0801af14 <pbuf_chain>:
 * The ->ref field of the first pbuf of the tail chain is adjusted.
 *
 */
void
pbuf_chain(struct pbuf *h, struct pbuf *t)
{
 801af14:	b580      	push	{r7, lr}
 801af16:	b082      	sub	sp, #8
 801af18:	af00      	add	r7, sp, #0
 801af1a:	6078      	str	r0, [r7, #4]
 801af1c:	6039      	str	r1, [r7, #0]
  pbuf_cat(h, t);
 801af1e:	6839      	ldr	r1, [r7, #0]
 801af20:	6878      	ldr	r0, [r7, #4]
 801af22:	f7ff ffa1 	bl	801ae68 <pbuf_cat>
  /* t is now referenced by h */
  pbuf_ref(t);
 801af26:	6838      	ldr	r0, [r7, #0]
 801af28:	f7ff ff76 	bl	801ae18 <pbuf_ref>
  LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_chain: %p references %p\n", (void *)h, (void *)t));
}
 801af2c:	bf00      	nop
 801af2e:	3708      	adds	r7, #8
 801af30:	46bd      	mov	sp, r7
 801af32:	bd80      	pop	{r7, pc}

0801af34 <pbuf_copy>:
 *         ERR_ARG if one of the pbufs is NULL or p_to is not big
 *                 enough to hold p_from
 */
err_t
pbuf_copy(struct pbuf *p_to, const struct pbuf *p_from)
{
 801af34:	b580      	push	{r7, lr}
 801af36:	b086      	sub	sp, #24
 801af38:	af00      	add	r7, sp, #0
 801af3a:	6078      	str	r0, [r7, #4]
 801af3c:	6039      	str	r1, [r7, #0]
  size_t offset_to = 0, offset_from = 0, len;
 801af3e:	2300      	movs	r3, #0
 801af40:	617b      	str	r3, [r7, #20]
 801af42:	2300      	movs	r3, #0
 801af44:	613b      	str	r3, [r7, #16]

  LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_copy(%p, %p)\n",
              (const void *)p_to, (const void *)p_from));

  /* is the target big enough to hold the source? */
  LWIP_ERROR("pbuf_copy: target not big enough to hold source", ((p_to != NULL) &&
 801af46:	687b      	ldr	r3, [r7, #4]
 801af48:	2b00      	cmp	r3, #0
 801af4a:	d008      	beq.n	801af5e <pbuf_copy+0x2a>
 801af4c:	683b      	ldr	r3, [r7, #0]
 801af4e:	2b00      	cmp	r3, #0
 801af50:	d005      	beq.n	801af5e <pbuf_copy+0x2a>
 801af52:	687b      	ldr	r3, [r7, #4]
 801af54:	891a      	ldrh	r2, [r3, #8]
 801af56:	683b      	ldr	r3, [r7, #0]
 801af58:	891b      	ldrh	r3, [r3, #8]
 801af5a:	429a      	cmp	r2, r3
 801af5c:	d209      	bcs.n	801af72 <pbuf_copy+0x3e>
 801af5e:	4b57      	ldr	r3, [pc, #348]	@ (801b0bc <pbuf_copy+0x188>)
 801af60:	f240 32c9 	movw	r2, #969	@ 0x3c9
 801af64:	4956      	ldr	r1, [pc, #344]	@ (801b0c0 <pbuf_copy+0x18c>)
 801af66:	4857      	ldr	r0, [pc, #348]	@ (801b0c4 <pbuf_copy+0x190>)
 801af68:	f00f f928 	bl	802a1bc <iprintf>
 801af6c:	f06f 030f 	mvn.w	r3, #15
 801af70:	e09f      	b.n	801b0b2 <pbuf_copy+0x17e>
             (p_from != NULL) && (p_to->tot_len >= p_from->tot_len)), return ERR_ARG;);

  /* iterate through pbuf chain */
  do {
    /* copy one part of the original chain */
    if ((p_to->len - offset_to) >= (p_from->len - offset_from)) {
 801af72:	687b      	ldr	r3, [r7, #4]
 801af74:	895b      	ldrh	r3, [r3, #10]
 801af76:	461a      	mov	r2, r3
 801af78:	697b      	ldr	r3, [r7, #20]
 801af7a:	1ad2      	subs	r2, r2, r3
 801af7c:	683b      	ldr	r3, [r7, #0]
 801af7e:	895b      	ldrh	r3, [r3, #10]
 801af80:	4619      	mov	r1, r3
 801af82:	693b      	ldr	r3, [r7, #16]
 801af84:	1acb      	subs	r3, r1, r3
 801af86:	429a      	cmp	r2, r3
 801af88:	d306      	bcc.n	801af98 <pbuf_copy+0x64>
      /* complete current p_from fits into current p_to */
      len = p_from->len - offset_from;
 801af8a:	683b      	ldr	r3, [r7, #0]
 801af8c:	895b      	ldrh	r3, [r3, #10]
 801af8e:	461a      	mov	r2, r3
 801af90:	693b      	ldr	r3, [r7, #16]
 801af92:	1ad3      	subs	r3, r2, r3
 801af94:	60fb      	str	r3, [r7, #12]
 801af96:	e005      	b.n	801afa4 <pbuf_copy+0x70>
    } else {
      /* current p_from does not fit into current p_to */
      len = p_to->len - offset_to;
 801af98:	687b      	ldr	r3, [r7, #4]
 801af9a:	895b      	ldrh	r3, [r3, #10]
 801af9c:	461a      	mov	r2, r3
 801af9e:	697b      	ldr	r3, [r7, #20]
 801afa0:	1ad3      	subs	r3, r2, r3
 801afa2:	60fb      	str	r3, [r7, #12]
    }
    MEMCPY((u8_t *)p_to->payload + offset_to, (u8_t *)p_from->payload + offset_from, len);
 801afa4:	687b      	ldr	r3, [r7, #4]
 801afa6:	685a      	ldr	r2, [r3, #4]
 801afa8:	697b      	ldr	r3, [r7, #20]
 801afaa:	18d0      	adds	r0, r2, r3
 801afac:	683b      	ldr	r3, [r7, #0]
 801afae:	685a      	ldr	r2, [r3, #4]
 801afb0:	693b      	ldr	r3, [r7, #16]
 801afb2:	4413      	add	r3, r2
 801afb4:	68fa      	ldr	r2, [r7, #12]
 801afb6:	4619      	mov	r1, r3
 801afb8:	f00f fb89 	bl	802a6ce <memcpy>
    offset_to += len;
 801afbc:	697a      	ldr	r2, [r7, #20]
 801afbe:	68fb      	ldr	r3, [r7, #12]
 801afc0:	4413      	add	r3, r2
 801afc2:	617b      	str	r3, [r7, #20]
    offset_from += len;
 801afc4:	693a      	ldr	r2, [r7, #16]
 801afc6:	68fb      	ldr	r3, [r7, #12]
 801afc8:	4413      	add	r3, r2
 801afca:	613b      	str	r3, [r7, #16]
    LWIP_ASSERT("offset_to <= p_to->len", offset_to <= p_to->len);
 801afcc:	687b      	ldr	r3, [r7, #4]
 801afce:	895b      	ldrh	r3, [r3, #10]
 801afd0:	461a      	mov	r2, r3
 801afd2:	697b      	ldr	r3, [r7, #20]
 801afd4:	4293      	cmp	r3, r2
 801afd6:	d906      	bls.n	801afe6 <pbuf_copy+0xb2>
 801afd8:	4b38      	ldr	r3, [pc, #224]	@ (801b0bc <pbuf_copy+0x188>)
 801afda:	f240 32d9 	movw	r2, #985	@ 0x3d9
 801afde:	493a      	ldr	r1, [pc, #232]	@ (801b0c8 <pbuf_copy+0x194>)
 801afe0:	4838      	ldr	r0, [pc, #224]	@ (801b0c4 <pbuf_copy+0x190>)
 801afe2:	f00f f8eb 	bl	802a1bc <iprintf>
    LWIP_ASSERT("offset_from <= p_from->len", offset_from <= p_from->len);
 801afe6:	683b      	ldr	r3, [r7, #0]
 801afe8:	895b      	ldrh	r3, [r3, #10]
 801afea:	461a      	mov	r2, r3
 801afec:	693b      	ldr	r3, [r7, #16]
 801afee:	4293      	cmp	r3, r2
 801aff0:	d906      	bls.n	801b000 <pbuf_copy+0xcc>
 801aff2:	4b32      	ldr	r3, [pc, #200]	@ (801b0bc <pbuf_copy+0x188>)
 801aff4:	f240 32da 	movw	r2, #986	@ 0x3da
 801aff8:	4934      	ldr	r1, [pc, #208]	@ (801b0cc <pbuf_copy+0x198>)
 801affa:	4832      	ldr	r0, [pc, #200]	@ (801b0c4 <pbuf_copy+0x190>)
 801affc:	f00f f8de 	bl	802a1bc <iprintf>
    if (offset_from >= p_from->len) {
 801b000:	683b      	ldr	r3, [r7, #0]
 801b002:	895b      	ldrh	r3, [r3, #10]
 801b004:	461a      	mov	r2, r3
 801b006:	693b      	ldr	r3, [r7, #16]
 801b008:	4293      	cmp	r3, r2
 801b00a:	d304      	bcc.n	801b016 <pbuf_copy+0xe2>
      /* on to next p_from (if any) */
      offset_from = 0;
 801b00c:	2300      	movs	r3, #0
 801b00e:	613b      	str	r3, [r7, #16]
      p_from = p_from->next;
 801b010:	683b      	ldr	r3, [r7, #0]
 801b012:	681b      	ldr	r3, [r3, #0]
 801b014:	603b      	str	r3, [r7, #0]
    }
    if (offset_to == p_to->len) {
 801b016:	687b      	ldr	r3, [r7, #4]
 801b018:	895b      	ldrh	r3, [r3, #10]
 801b01a:	461a      	mov	r2, r3
 801b01c:	697b      	ldr	r3, [r7, #20]
 801b01e:	4293      	cmp	r3, r2
 801b020:	d114      	bne.n	801b04c <pbuf_copy+0x118>
      /* on to next p_to (if any) */
      offset_to = 0;
 801b022:	2300      	movs	r3, #0
 801b024:	617b      	str	r3, [r7, #20]
      p_to = p_to->next;
 801b026:	687b      	ldr	r3, [r7, #4]
 801b028:	681b      	ldr	r3, [r3, #0]
 801b02a:	607b      	str	r3, [r7, #4]
      LWIP_ERROR("p_to != NULL", (p_to != NULL) || (p_from == NULL), return ERR_ARG;);
 801b02c:	687b      	ldr	r3, [r7, #4]
 801b02e:	2b00      	cmp	r3, #0
 801b030:	d10c      	bne.n	801b04c <pbuf_copy+0x118>
 801b032:	683b      	ldr	r3, [r7, #0]
 801b034:	2b00      	cmp	r3, #0
 801b036:	d009      	beq.n	801b04c <pbuf_copy+0x118>
 801b038:	4b20      	ldr	r3, [pc, #128]	@ (801b0bc <pbuf_copy+0x188>)
 801b03a:	f44f 7279 	mov.w	r2, #996	@ 0x3e4
 801b03e:	4924      	ldr	r1, [pc, #144]	@ (801b0d0 <pbuf_copy+0x19c>)
 801b040:	4820      	ldr	r0, [pc, #128]	@ (801b0c4 <pbuf_copy+0x190>)
 801b042:	f00f f8bb 	bl	802a1bc <iprintf>
 801b046:	f06f 030f 	mvn.w	r3, #15
 801b04a:	e032      	b.n	801b0b2 <pbuf_copy+0x17e>
    }

    if ((p_from != NULL) && (p_from->len == p_from->tot_len)) {
 801b04c:	683b      	ldr	r3, [r7, #0]
 801b04e:	2b00      	cmp	r3, #0
 801b050:	d013      	beq.n	801b07a <pbuf_copy+0x146>
 801b052:	683b      	ldr	r3, [r7, #0]
 801b054:	895a      	ldrh	r2, [r3, #10]
 801b056:	683b      	ldr	r3, [r7, #0]
 801b058:	891b      	ldrh	r3, [r3, #8]
 801b05a:	429a      	cmp	r2, r3
 801b05c:	d10d      	bne.n	801b07a <pbuf_copy+0x146>
      /* don't copy more than one packet! */
      LWIP_ERROR("pbuf_copy() does not allow packet queues!",
 801b05e:	683b      	ldr	r3, [r7, #0]
 801b060:	681b      	ldr	r3, [r3, #0]
 801b062:	2b00      	cmp	r3, #0
 801b064:	d009      	beq.n	801b07a <pbuf_copy+0x146>
 801b066:	4b15      	ldr	r3, [pc, #84]	@ (801b0bc <pbuf_copy+0x188>)
 801b068:	f240 32e9 	movw	r2, #1001	@ 0x3e9
 801b06c:	4919      	ldr	r1, [pc, #100]	@ (801b0d4 <pbuf_copy+0x1a0>)
 801b06e:	4815      	ldr	r0, [pc, #84]	@ (801b0c4 <pbuf_copy+0x190>)
 801b070:	f00f f8a4 	bl	802a1bc <iprintf>
 801b074:	f06f 0305 	mvn.w	r3, #5
 801b078:	e01b      	b.n	801b0b2 <pbuf_copy+0x17e>
                 (p_from->next == NULL), return ERR_VAL;);
    }
    if ((p_to != NULL) && (p_to->len == p_to->tot_len)) {
 801b07a:	687b      	ldr	r3, [r7, #4]
 801b07c:	2b00      	cmp	r3, #0
 801b07e:	d013      	beq.n	801b0a8 <pbuf_copy+0x174>
 801b080:	687b      	ldr	r3, [r7, #4]
 801b082:	895a      	ldrh	r2, [r3, #10]
 801b084:	687b      	ldr	r3, [r7, #4]
 801b086:	891b      	ldrh	r3, [r3, #8]
 801b088:	429a      	cmp	r2, r3
 801b08a:	d10d      	bne.n	801b0a8 <pbuf_copy+0x174>
      /* don't copy more than one packet! */
      LWIP_ERROR("pbuf_copy() does not allow packet queues!",
 801b08c:	687b      	ldr	r3, [r7, #4]
 801b08e:	681b      	ldr	r3, [r3, #0]
 801b090:	2b00      	cmp	r3, #0
 801b092:	d009      	beq.n	801b0a8 <pbuf_copy+0x174>
 801b094:	4b09      	ldr	r3, [pc, #36]	@ (801b0bc <pbuf_copy+0x188>)
 801b096:	f240 32ee 	movw	r2, #1006	@ 0x3ee
 801b09a:	490e      	ldr	r1, [pc, #56]	@ (801b0d4 <pbuf_copy+0x1a0>)
 801b09c:	4809      	ldr	r0, [pc, #36]	@ (801b0c4 <pbuf_copy+0x190>)
 801b09e:	f00f f88d 	bl	802a1bc <iprintf>
 801b0a2:	f06f 0305 	mvn.w	r3, #5
 801b0a6:	e004      	b.n	801b0b2 <pbuf_copy+0x17e>
                 (p_to->next == NULL), return ERR_VAL;);
    }
  } while (p_from);
 801b0a8:	683b      	ldr	r3, [r7, #0]
 801b0aa:	2b00      	cmp	r3, #0
 801b0ac:	f47f af61 	bne.w	801af72 <pbuf_copy+0x3e>
  LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_copy: end of chain reached.\n"));
  return ERR_OK;
 801b0b0:	2300      	movs	r3, #0
}
 801b0b2:	4618      	mov	r0, r3
 801b0b4:	3718      	adds	r7, #24
 801b0b6:	46bd      	mov	sp, r7
 801b0b8:	bd80      	pop	{r7, pc}
 801b0ba:	bf00      	nop
 801b0bc:	0802e93c 	.word	0x0802e93c
 801b0c0:	0802ebe4 	.word	0x0802ebe4
 801b0c4:	0802e99c 	.word	0x0802e99c
 801b0c8:	0802ec14 	.word	0x0802ec14
 801b0cc:	0802ec2c 	.word	0x0802ec2c
 801b0d0:	0802ec48 	.word	0x0802ec48
 801b0d4:	0802ec58 	.word	0x0802ec58

0801b0d8 <pbuf_copy_partial>:
 * @param offset offset into the packet buffer from where to begin copying len bytes
 * @return the number of bytes copied, or 0 on failure
 */
u16_t
pbuf_copy_partial(const struct pbuf *buf, void *dataptr, u16_t len, u16_t offset)
{
 801b0d8:	b580      	push	{r7, lr}
 801b0da:	b088      	sub	sp, #32
 801b0dc:	af00      	add	r7, sp, #0
 801b0de:	60f8      	str	r0, [r7, #12]
 801b0e0:	60b9      	str	r1, [r7, #8]
 801b0e2:	4611      	mov	r1, r2
 801b0e4:	461a      	mov	r2, r3
 801b0e6:	460b      	mov	r3, r1
 801b0e8:	80fb      	strh	r3, [r7, #6]
 801b0ea:	4613      	mov	r3, r2
 801b0ec:	80bb      	strh	r3, [r7, #4]
  const struct pbuf *p;
  u16_t left = 0;
 801b0ee:	2300      	movs	r3, #0
 801b0f0:	837b      	strh	r3, [r7, #26]
  u16_t buf_copy_len;
  u16_t copied_total = 0;
 801b0f2:	2300      	movs	r3, #0
 801b0f4:	82fb      	strh	r3, [r7, #22]

  LWIP_ERROR("pbuf_copy_partial: invalid buf", (buf != NULL), return 0;);
 801b0f6:	68fb      	ldr	r3, [r7, #12]
 801b0f8:	2b00      	cmp	r3, #0
 801b0fa:	d108      	bne.n	801b10e <pbuf_copy_partial+0x36>
 801b0fc:	4b2b      	ldr	r3, [pc, #172]	@ (801b1ac <pbuf_copy_partial+0xd4>)
 801b0fe:	f240 420a 	movw	r2, #1034	@ 0x40a
 801b102:	492b      	ldr	r1, [pc, #172]	@ (801b1b0 <pbuf_copy_partial+0xd8>)
 801b104:	482b      	ldr	r0, [pc, #172]	@ (801b1b4 <pbuf_copy_partial+0xdc>)
 801b106:	f00f f859 	bl	802a1bc <iprintf>
 801b10a:	2300      	movs	r3, #0
 801b10c:	e04a      	b.n	801b1a4 <pbuf_copy_partial+0xcc>
  LWIP_ERROR("pbuf_copy_partial: invalid dataptr", (dataptr != NULL), return 0;);
 801b10e:	68bb      	ldr	r3, [r7, #8]
 801b110:	2b00      	cmp	r3, #0
 801b112:	d108      	bne.n	801b126 <pbuf_copy_partial+0x4e>
 801b114:	4b25      	ldr	r3, [pc, #148]	@ (801b1ac <pbuf_copy_partial+0xd4>)
 801b116:	f240 420b 	movw	r2, #1035	@ 0x40b
 801b11a:	4927      	ldr	r1, [pc, #156]	@ (801b1b8 <pbuf_copy_partial+0xe0>)
 801b11c:	4825      	ldr	r0, [pc, #148]	@ (801b1b4 <pbuf_copy_partial+0xdc>)
 801b11e:	f00f f84d 	bl	802a1bc <iprintf>
 801b122:	2300      	movs	r3, #0
 801b124:	e03e      	b.n	801b1a4 <pbuf_copy_partial+0xcc>

  /* Note some systems use byte copy if dataptr or one of the pbuf payload pointers are unaligned. */
  for (p = buf; len != 0 && p != NULL; p = p->next) {
 801b126:	68fb      	ldr	r3, [r7, #12]
 801b128:	61fb      	str	r3, [r7, #28]
 801b12a:	e034      	b.n	801b196 <pbuf_copy_partial+0xbe>
    if ((offset != 0) && (offset >= p->len)) {
 801b12c:	88bb      	ldrh	r3, [r7, #4]
 801b12e:	2b00      	cmp	r3, #0
 801b130:	d00a      	beq.n	801b148 <pbuf_copy_partial+0x70>
 801b132:	69fb      	ldr	r3, [r7, #28]
 801b134:	895b      	ldrh	r3, [r3, #10]
 801b136:	88ba      	ldrh	r2, [r7, #4]
 801b138:	429a      	cmp	r2, r3
 801b13a:	d305      	bcc.n	801b148 <pbuf_copy_partial+0x70>
      /* don't copy from this buffer -> on to the next */
      offset = (u16_t)(offset - p->len);
 801b13c:	69fb      	ldr	r3, [r7, #28]
 801b13e:	895b      	ldrh	r3, [r3, #10]
 801b140:	88ba      	ldrh	r2, [r7, #4]
 801b142:	1ad3      	subs	r3, r2, r3
 801b144:	80bb      	strh	r3, [r7, #4]
 801b146:	e023      	b.n	801b190 <pbuf_copy_partial+0xb8>
    } else {
      /* copy from this buffer. maybe only partially. */
      buf_copy_len = (u16_t)(p->len - offset);
 801b148:	69fb      	ldr	r3, [r7, #28]
 801b14a:	895a      	ldrh	r2, [r3, #10]
 801b14c:	88bb      	ldrh	r3, [r7, #4]
 801b14e:	1ad3      	subs	r3, r2, r3
 801b150:	833b      	strh	r3, [r7, #24]
      if (buf_copy_len > len) {
 801b152:	8b3a      	ldrh	r2, [r7, #24]
 801b154:	88fb      	ldrh	r3, [r7, #6]
 801b156:	429a      	cmp	r2, r3
 801b158:	d901      	bls.n	801b15e <pbuf_copy_partial+0x86>
        buf_copy_len = len;
 801b15a:	88fb      	ldrh	r3, [r7, #6]
 801b15c:	833b      	strh	r3, [r7, #24]
      }
      /* copy the necessary parts of the buffer */
      MEMCPY(&((char *)dataptr)[left], &((char *)p->payload)[offset], buf_copy_len);
 801b15e:	8b7b      	ldrh	r3, [r7, #26]
 801b160:	68ba      	ldr	r2, [r7, #8]
 801b162:	18d0      	adds	r0, r2, r3
 801b164:	69fb      	ldr	r3, [r7, #28]
 801b166:	685a      	ldr	r2, [r3, #4]
 801b168:	88bb      	ldrh	r3, [r7, #4]
 801b16a:	4413      	add	r3, r2
 801b16c:	8b3a      	ldrh	r2, [r7, #24]
 801b16e:	4619      	mov	r1, r3
 801b170:	f00f faad 	bl	802a6ce <memcpy>
      copied_total = (u16_t)(copied_total + buf_copy_len);
 801b174:	8afa      	ldrh	r2, [r7, #22]
 801b176:	8b3b      	ldrh	r3, [r7, #24]
 801b178:	4413      	add	r3, r2
 801b17a:	82fb      	strh	r3, [r7, #22]
      left = (u16_t)(left + buf_copy_len);
 801b17c:	8b7a      	ldrh	r2, [r7, #26]
 801b17e:	8b3b      	ldrh	r3, [r7, #24]
 801b180:	4413      	add	r3, r2
 801b182:	837b      	strh	r3, [r7, #26]
      len = (u16_t)(len - buf_copy_len);
 801b184:	88fa      	ldrh	r2, [r7, #6]
 801b186:	8b3b      	ldrh	r3, [r7, #24]
 801b188:	1ad3      	subs	r3, r2, r3
 801b18a:	80fb      	strh	r3, [r7, #6]
      offset = 0;
 801b18c:	2300      	movs	r3, #0
 801b18e:	80bb      	strh	r3, [r7, #4]
  for (p = buf; len != 0 && p != NULL; p = p->next) {
 801b190:	69fb      	ldr	r3, [r7, #28]
 801b192:	681b      	ldr	r3, [r3, #0]
 801b194:	61fb      	str	r3, [r7, #28]
 801b196:	88fb      	ldrh	r3, [r7, #6]
 801b198:	2b00      	cmp	r3, #0
 801b19a:	d002      	beq.n	801b1a2 <pbuf_copy_partial+0xca>
 801b19c:	69fb      	ldr	r3, [r7, #28]
 801b19e:	2b00      	cmp	r3, #0
 801b1a0:	d1c4      	bne.n	801b12c <pbuf_copy_partial+0x54>
    }
  }
  return copied_total;
 801b1a2:	8afb      	ldrh	r3, [r7, #22]
}
 801b1a4:	4618      	mov	r0, r3
 801b1a6:	3720      	adds	r7, #32
 801b1a8:	46bd      	mov	sp, r7
 801b1aa:	bd80      	pop	{r7, pc}
 801b1ac:	0802e93c 	.word	0x0802e93c
 801b1b0:	0802ec84 	.word	0x0802ec84
 801b1b4:	0802e99c 	.word	0x0802e99c
 801b1b8:	0802eca4 	.word	0x0802eca4

0801b1bc <pbuf_clone>:
 *
 * @return a new pbuf or NULL if allocation fails
 */
struct pbuf *
pbuf_clone(pbuf_layer layer, pbuf_type type, struct pbuf *p)
{
 801b1bc:	b580      	push	{r7, lr}
 801b1be:	b084      	sub	sp, #16
 801b1c0:	af00      	add	r7, sp, #0
 801b1c2:	4603      	mov	r3, r0
 801b1c4:	603a      	str	r2, [r7, #0]
 801b1c6:	71fb      	strb	r3, [r7, #7]
 801b1c8:	460b      	mov	r3, r1
 801b1ca:	80bb      	strh	r3, [r7, #4]
  struct pbuf *q;
  err_t err;
  q = pbuf_alloc(layer, p->tot_len, type);
 801b1cc:	683b      	ldr	r3, [r7, #0]
 801b1ce:	8919      	ldrh	r1, [r3, #8]
 801b1d0:	88ba      	ldrh	r2, [r7, #4]
 801b1d2:	79fb      	ldrb	r3, [r7, #7]
 801b1d4:	4618      	mov	r0, r3
 801b1d6:	f7ff fa63 	bl	801a6a0 <pbuf_alloc>
 801b1da:	60f8      	str	r0, [r7, #12]
  if (q == NULL) {
 801b1dc:	68fb      	ldr	r3, [r7, #12]
 801b1de:	2b00      	cmp	r3, #0
 801b1e0:	d101      	bne.n	801b1e6 <pbuf_clone+0x2a>
    return NULL;
 801b1e2:	2300      	movs	r3, #0
 801b1e4:	e011      	b.n	801b20a <pbuf_clone+0x4e>
  }
  err = pbuf_copy(q, p);
 801b1e6:	6839      	ldr	r1, [r7, #0]
 801b1e8:	68f8      	ldr	r0, [r7, #12]
 801b1ea:	f7ff fea3 	bl	801af34 <pbuf_copy>
 801b1ee:	4603      	mov	r3, r0
 801b1f0:	72fb      	strb	r3, [r7, #11]
  LWIP_UNUSED_ARG(err); /* in case of LWIP_NOASSERT */
  LWIP_ASSERT("pbuf_copy failed", err == ERR_OK);
 801b1f2:	f997 300b 	ldrsb.w	r3, [r7, #11]
 801b1f6:	2b00      	cmp	r3, #0
 801b1f8:	d006      	beq.n	801b208 <pbuf_clone+0x4c>
 801b1fa:	4b06      	ldr	r3, [pc, #24]	@ (801b214 <pbuf_clone+0x58>)
 801b1fc:	f240 5224 	movw	r2, #1316	@ 0x524
 801b200:	4905      	ldr	r1, [pc, #20]	@ (801b218 <pbuf_clone+0x5c>)
 801b202:	4806      	ldr	r0, [pc, #24]	@ (801b21c <pbuf_clone+0x60>)
 801b204:	f00e ffda 	bl	802a1bc <iprintf>
  return q;
 801b208:	68fb      	ldr	r3, [r7, #12]
}
 801b20a:	4618      	mov	r0, r3
 801b20c:	3710      	adds	r7, #16
 801b20e:	46bd      	mov	sp, r7
 801b210:	bd80      	pop	{r7, pc}
 801b212:	bf00      	nop
 801b214:	0802e93c 	.word	0x0802e93c
 801b218:	0802edb0 	.word	0x0802edb0
 801b21c:	0802e99c 	.word	0x0802e99c

0801b220 <tcp_init>:
/**
 * Initialize this module.
 */
void
tcp_init(void)
{
 801b220:	b580      	push	{r7, lr}
 801b222:	af00      	add	r7, sp, #0
#ifdef LWIP_RAND
  tcp_port = TCP_ENSURE_LOCAL_PORT_RANGE(LWIP_RAND());
 801b224:	f00d fca0 	bl	8028b68 <rand>
 801b228:	4603      	mov	r3, r0
 801b22a:	b29b      	uxth	r3, r3
 801b22c:	f3c3 030d 	ubfx	r3, r3, #0, #14
 801b230:	b29b      	uxth	r3, r3
 801b232:	f5a3 4380 	sub.w	r3, r3, #16384	@ 0x4000
 801b236:	b29a      	uxth	r2, r3
 801b238:	4b01      	ldr	r3, [pc, #4]	@ (801b240 <tcp_init+0x20>)
 801b23a:	801a      	strh	r2, [r3, #0]
#endif /* LWIP_RAND */
}
 801b23c:	bf00      	nop
 801b23e:	bd80      	pop	{r7, pc}
 801b240:	2400004c 	.word	0x2400004c

0801b244 <tcp_free>:

/** Free a tcp pcb */
void
tcp_free(struct tcp_pcb *pcb)
{
 801b244:	b580      	push	{r7, lr}
 801b246:	b082      	sub	sp, #8
 801b248:	af00      	add	r7, sp, #0
 801b24a:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT("tcp_free: LISTEN", pcb->state != LISTEN);
 801b24c:	687b      	ldr	r3, [r7, #4]
 801b24e:	7d1b      	ldrb	r3, [r3, #20]
 801b250:	2b01      	cmp	r3, #1
 801b252:	d105      	bne.n	801b260 <tcp_free+0x1c>
 801b254:	4b06      	ldr	r3, [pc, #24]	@ (801b270 <tcp_free+0x2c>)
 801b256:	22d4      	movs	r2, #212	@ 0xd4
 801b258:	4906      	ldr	r1, [pc, #24]	@ (801b274 <tcp_free+0x30>)
 801b25a:	4807      	ldr	r0, [pc, #28]	@ (801b278 <tcp_free+0x34>)
 801b25c:	f00e ffae 	bl	802a1bc <iprintf>
#if LWIP_TCP_PCB_NUM_EXT_ARGS
  tcp_ext_arg_invoke_callbacks_destroyed(pcb->ext_args);
#endif
  memp_free(MEMP_TCP_PCB, pcb);
 801b260:	6879      	ldr	r1, [r7, #4]
 801b262:	2001      	movs	r0, #1
 801b264:	f7fe fe44 	bl	8019ef0 <memp_free>
}
 801b268:	bf00      	nop
 801b26a:	3708      	adds	r7, #8
 801b26c:	46bd      	mov	sp, r7
 801b26e:	bd80      	pop	{r7, pc}
 801b270:	0802ee3c 	.word	0x0802ee3c
 801b274:	0802ee6c 	.word	0x0802ee6c
 801b278:	0802ee80 	.word	0x0802ee80

0801b27c <tcp_free_listen>:

/** Free a tcp listen pcb */
static void
tcp_free_listen(struct tcp_pcb *pcb)
{
 801b27c:	b580      	push	{r7, lr}
 801b27e:	b082      	sub	sp, #8
 801b280:	af00      	add	r7, sp, #0
 801b282:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT("tcp_free_listen: !LISTEN", pcb->state != LISTEN);
 801b284:	687b      	ldr	r3, [r7, #4]
 801b286:	7d1b      	ldrb	r3, [r3, #20]
 801b288:	2b01      	cmp	r3, #1
 801b28a:	d105      	bne.n	801b298 <tcp_free_listen+0x1c>
 801b28c:	4b06      	ldr	r3, [pc, #24]	@ (801b2a8 <tcp_free_listen+0x2c>)
 801b28e:	22df      	movs	r2, #223	@ 0xdf
 801b290:	4906      	ldr	r1, [pc, #24]	@ (801b2ac <tcp_free_listen+0x30>)
 801b292:	4807      	ldr	r0, [pc, #28]	@ (801b2b0 <tcp_free_listen+0x34>)
 801b294:	f00e ff92 	bl	802a1bc <iprintf>
#if LWIP_TCP_PCB_NUM_EXT_ARGS
  tcp_ext_arg_invoke_callbacks_destroyed(pcb->ext_args);
#endif
  memp_free(MEMP_TCP_PCB_LISTEN, pcb);
 801b298:	6879      	ldr	r1, [r7, #4]
 801b29a:	2002      	movs	r0, #2
 801b29c:	f7fe fe28 	bl	8019ef0 <memp_free>
}
 801b2a0:	bf00      	nop
 801b2a2:	3708      	adds	r7, #8
 801b2a4:	46bd      	mov	sp, r7
 801b2a6:	bd80      	pop	{r7, pc}
 801b2a8:	0802ee3c 	.word	0x0802ee3c
 801b2ac:	0802eea8 	.word	0x0802eea8
 801b2b0:	0802ee80 	.word	0x0802ee80

0801b2b4 <tcp_tmr>:
/**
 * Called periodically to dispatch TCP timers.
 */
void
tcp_tmr(void)
{
 801b2b4:	b580      	push	{r7, lr}
 801b2b6:	af00      	add	r7, sp, #0
  /* Call tcp_fasttmr() every 250 ms */
  tcp_fasttmr();
 801b2b8:	f001 f86a 	bl	801c390 <tcp_fasttmr>

  if (++tcp_timer & 1) {
 801b2bc:	4b07      	ldr	r3, [pc, #28]	@ (801b2dc <tcp_tmr+0x28>)
 801b2be:	781b      	ldrb	r3, [r3, #0]
 801b2c0:	3301      	adds	r3, #1
 801b2c2:	b2da      	uxtb	r2, r3
 801b2c4:	4b05      	ldr	r3, [pc, #20]	@ (801b2dc <tcp_tmr+0x28>)
 801b2c6:	701a      	strb	r2, [r3, #0]
 801b2c8:	4b04      	ldr	r3, [pc, #16]	@ (801b2dc <tcp_tmr+0x28>)
 801b2ca:	781b      	ldrb	r3, [r3, #0]
 801b2cc:	f003 0301 	and.w	r3, r3, #1
 801b2d0:	2b00      	cmp	r3, #0
 801b2d2:	d001      	beq.n	801b2d8 <tcp_tmr+0x24>
    /* Call tcp_slowtmr() every 500 ms, i.e., every other timer
       tcp_tmr() is called. */
    tcp_slowtmr();
 801b2d4:	f000 fd1a 	bl	801bd0c <tcp_slowtmr>
  }
}
 801b2d8:	bf00      	nop
 801b2da:	bd80      	pop	{r7, pc}
 801b2dc:	2402af6d 	.word	0x2402af6d

0801b2e0 <tcp_remove_listener>:
/** Called when a listen pcb is closed. Iterates one pcb list and removes the
 * closed listener pcb from pcb->listener if matching.
 */
static void
tcp_remove_listener(struct tcp_pcb *list, struct tcp_pcb_listen *lpcb)
{
 801b2e0:	b580      	push	{r7, lr}
 801b2e2:	b084      	sub	sp, #16
 801b2e4:	af00      	add	r7, sp, #0
 801b2e6:	6078      	str	r0, [r7, #4]
 801b2e8:	6039      	str	r1, [r7, #0]
  struct tcp_pcb *pcb;

  LWIP_ASSERT("tcp_remove_listener: invalid listener", lpcb != NULL);
 801b2ea:	683b      	ldr	r3, [r7, #0]
 801b2ec:	2b00      	cmp	r3, #0
 801b2ee:	d105      	bne.n	801b2fc <tcp_remove_listener+0x1c>
 801b2f0:	4b0d      	ldr	r3, [pc, #52]	@ (801b328 <tcp_remove_listener+0x48>)
 801b2f2:	22ff      	movs	r2, #255	@ 0xff
 801b2f4:	490d      	ldr	r1, [pc, #52]	@ (801b32c <tcp_remove_listener+0x4c>)
 801b2f6:	480e      	ldr	r0, [pc, #56]	@ (801b330 <tcp_remove_listener+0x50>)
 801b2f8:	f00e ff60 	bl	802a1bc <iprintf>

  for (pcb = list; pcb != NULL; pcb = pcb->next) {
 801b2fc:	687b      	ldr	r3, [r7, #4]
 801b2fe:	60fb      	str	r3, [r7, #12]
 801b300:	e00a      	b.n	801b318 <tcp_remove_listener+0x38>
    if (pcb->listener == lpcb) {
 801b302:	68fb      	ldr	r3, [r7, #12]
 801b304:	6fdb      	ldr	r3, [r3, #124]	@ 0x7c
 801b306:	683a      	ldr	r2, [r7, #0]
 801b308:	429a      	cmp	r2, r3
 801b30a:	d102      	bne.n	801b312 <tcp_remove_listener+0x32>
      pcb->listener = NULL;
 801b30c:	68fb      	ldr	r3, [r7, #12]
 801b30e:	2200      	movs	r2, #0
 801b310:	67da      	str	r2, [r3, #124]	@ 0x7c
  for (pcb = list; pcb != NULL; pcb = pcb->next) {
 801b312:	68fb      	ldr	r3, [r7, #12]
 801b314:	68db      	ldr	r3, [r3, #12]
 801b316:	60fb      	str	r3, [r7, #12]
 801b318:	68fb      	ldr	r3, [r7, #12]
 801b31a:	2b00      	cmp	r3, #0
 801b31c:	d1f1      	bne.n	801b302 <tcp_remove_listener+0x22>
    }
  }
}
 801b31e:	bf00      	nop
 801b320:	bf00      	nop
 801b322:	3710      	adds	r7, #16
 801b324:	46bd      	mov	sp, r7
 801b326:	bd80      	pop	{r7, pc}
 801b328:	0802ee3c 	.word	0x0802ee3c
 801b32c:	0802eec4 	.word	0x0802eec4
 801b330:	0802ee80 	.word	0x0802ee80

0801b334 <tcp_listen_closed>:
/** Called when a listen pcb is closed. Iterates all pcb lists and removes the
 * closed listener pcb from pcb->listener if matching.
 */
static void
tcp_listen_closed(struct tcp_pcb *pcb)
{
 801b334:	b580      	push	{r7, lr}
 801b336:	b084      	sub	sp, #16
 801b338:	af00      	add	r7, sp, #0
 801b33a:	6078      	str	r0, [r7, #4]
#if LWIP_CALLBACK_API || TCP_LISTEN_BACKLOG
  size_t i;
  LWIP_ASSERT("pcb != NULL", pcb != NULL);
 801b33c:	687b      	ldr	r3, [r7, #4]
 801b33e:	2b00      	cmp	r3, #0
 801b340:	d106      	bne.n	801b350 <tcp_listen_closed+0x1c>
 801b342:	4b14      	ldr	r3, [pc, #80]	@ (801b394 <tcp_listen_closed+0x60>)
 801b344:	f240 1211 	movw	r2, #273	@ 0x111
 801b348:	4913      	ldr	r1, [pc, #76]	@ (801b398 <tcp_listen_closed+0x64>)
 801b34a:	4814      	ldr	r0, [pc, #80]	@ (801b39c <tcp_listen_closed+0x68>)
 801b34c:	f00e ff36 	bl	802a1bc <iprintf>
  LWIP_ASSERT("pcb->state == LISTEN", pcb->state == LISTEN);
 801b350:	687b      	ldr	r3, [r7, #4]
 801b352:	7d1b      	ldrb	r3, [r3, #20]
 801b354:	2b01      	cmp	r3, #1
 801b356:	d006      	beq.n	801b366 <tcp_listen_closed+0x32>
 801b358:	4b0e      	ldr	r3, [pc, #56]	@ (801b394 <tcp_listen_closed+0x60>)
 801b35a:	f44f 7289 	mov.w	r2, #274	@ 0x112
 801b35e:	4910      	ldr	r1, [pc, #64]	@ (801b3a0 <tcp_listen_closed+0x6c>)
 801b360:	480e      	ldr	r0, [pc, #56]	@ (801b39c <tcp_listen_closed+0x68>)
 801b362:	f00e ff2b 	bl	802a1bc <iprintf>
  for (i = 1; i < LWIP_ARRAYSIZE(tcp_pcb_lists); i++) {
 801b366:	2301      	movs	r3, #1
 801b368:	60fb      	str	r3, [r7, #12]
 801b36a:	e00b      	b.n	801b384 <tcp_listen_closed+0x50>
    tcp_remove_listener(*tcp_pcb_lists[i], (struct tcp_pcb_listen *)pcb);
 801b36c:	4a0d      	ldr	r2, [pc, #52]	@ (801b3a4 <tcp_listen_closed+0x70>)
 801b36e:	68fb      	ldr	r3, [r7, #12]
 801b370:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
 801b374:	681b      	ldr	r3, [r3, #0]
 801b376:	6879      	ldr	r1, [r7, #4]
 801b378:	4618      	mov	r0, r3
 801b37a:	f7ff ffb1 	bl	801b2e0 <tcp_remove_listener>
  for (i = 1; i < LWIP_ARRAYSIZE(tcp_pcb_lists); i++) {
 801b37e:	68fb      	ldr	r3, [r7, #12]
 801b380:	3301      	adds	r3, #1
 801b382:	60fb      	str	r3, [r7, #12]
 801b384:	68fb      	ldr	r3, [r7, #12]
 801b386:	2b03      	cmp	r3, #3
 801b388:	d9f0      	bls.n	801b36c <tcp_listen_closed+0x38>
  }
#endif
  LWIP_UNUSED_ARG(pcb);
}
 801b38a:	bf00      	nop
 801b38c:	bf00      	nop
 801b38e:	3710      	adds	r7, #16
 801b390:	46bd      	mov	sp, r7
 801b392:	bd80      	pop	{r7, pc}
 801b394:	0802ee3c 	.word	0x0802ee3c
 801b398:	0802eeec 	.word	0x0802eeec
 801b39c:	0802ee80 	.word	0x0802ee80
 801b3a0:	0802eef8 	.word	0x0802eef8
 801b3a4:	080314bc 	.word	0x080314bc

0801b3a8 <tcp_close_shutdown>:
 * @return ERR_OK if connection has been closed
 *         another err_t if closing failed and pcb is not freed
 */
static err_t
tcp_close_shutdown(struct tcp_pcb *pcb, u8_t rst_on_unacked_data)
{
 801b3a8:	b5b0      	push	{r4, r5, r7, lr}
 801b3aa:	b088      	sub	sp, #32
 801b3ac:	af04      	add	r7, sp, #16
 801b3ae:	6078      	str	r0, [r7, #4]
 801b3b0:	460b      	mov	r3, r1
 801b3b2:	70fb      	strb	r3, [r7, #3]
  LWIP_ASSERT("tcp_close_shutdown: invalid pcb", pcb != NULL);
 801b3b4:	687b      	ldr	r3, [r7, #4]
 801b3b6:	2b00      	cmp	r3, #0
 801b3b8:	d106      	bne.n	801b3c8 <tcp_close_shutdown+0x20>
 801b3ba:	4b63      	ldr	r3, [pc, #396]	@ (801b548 <tcp_close_shutdown+0x1a0>)
 801b3bc:	f44f 72af 	mov.w	r2, #350	@ 0x15e
 801b3c0:	4962      	ldr	r1, [pc, #392]	@ (801b54c <tcp_close_shutdown+0x1a4>)
 801b3c2:	4863      	ldr	r0, [pc, #396]	@ (801b550 <tcp_close_shutdown+0x1a8>)
 801b3c4:	f00e fefa 	bl	802a1bc <iprintf>

  if (rst_on_unacked_data && ((pcb->state == ESTABLISHED) || (pcb->state == CLOSE_WAIT))) {
 801b3c8:	78fb      	ldrb	r3, [r7, #3]
 801b3ca:	2b00      	cmp	r3, #0
 801b3cc:	d067      	beq.n	801b49e <tcp_close_shutdown+0xf6>
 801b3ce:	687b      	ldr	r3, [r7, #4]
 801b3d0:	7d1b      	ldrb	r3, [r3, #20]
 801b3d2:	2b04      	cmp	r3, #4
 801b3d4:	d003      	beq.n	801b3de <tcp_close_shutdown+0x36>
 801b3d6:	687b      	ldr	r3, [r7, #4]
 801b3d8:	7d1b      	ldrb	r3, [r3, #20]
 801b3da:	2b07      	cmp	r3, #7
 801b3dc:	d15f      	bne.n	801b49e <tcp_close_shutdown+0xf6>
    if ((pcb->refused_data != NULL) || (pcb->rcv_wnd != TCP_WND_MAX(pcb))) {
 801b3de:	687b      	ldr	r3, [r7, #4]
 801b3e0:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 801b3e2:	2b00      	cmp	r3, #0
 801b3e4:	d105      	bne.n	801b3f2 <tcp_close_shutdown+0x4a>
 801b3e6:	687b      	ldr	r3, [r7, #4]
 801b3e8:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 801b3ea:	f241 62d0 	movw	r2, #5840	@ 0x16d0
 801b3ee:	4293      	cmp	r3, r2
 801b3f0:	d055      	beq.n	801b49e <tcp_close_shutdown+0xf6>
      /* Not all data received by application, send RST to tell the remote
         side about this. */
      LWIP_ASSERT("pcb->flags & TF_RXCLOSED", pcb->flags & TF_RXCLOSED);
 801b3f2:	687b      	ldr	r3, [r7, #4]
 801b3f4:	8b5b      	ldrh	r3, [r3, #26]
 801b3f6:	f003 0310 	and.w	r3, r3, #16
 801b3fa:	2b00      	cmp	r3, #0
 801b3fc:	d106      	bne.n	801b40c <tcp_close_shutdown+0x64>
 801b3fe:	4b52      	ldr	r3, [pc, #328]	@ (801b548 <tcp_close_shutdown+0x1a0>)
 801b400:	f44f 72b2 	mov.w	r2, #356	@ 0x164
 801b404:	4953      	ldr	r1, [pc, #332]	@ (801b554 <tcp_close_shutdown+0x1ac>)
 801b406:	4852      	ldr	r0, [pc, #328]	@ (801b550 <tcp_close_shutdown+0x1a8>)
 801b408:	f00e fed8 	bl	802a1bc <iprintf>

      /* don't call tcp_abort here: we must not deallocate the pcb since
         that might not be expected when calling tcp_close */
      tcp_rst(pcb, pcb->snd_nxt, pcb->rcv_nxt, &pcb->local_ip, &pcb->remote_ip,
 801b40c:	687b      	ldr	r3, [r7, #4]
 801b40e:	6d18      	ldr	r0, [r3, #80]	@ 0x50
 801b410:	687b      	ldr	r3, [r7, #4]
 801b412:	6a5c      	ldr	r4, [r3, #36]	@ 0x24
 801b414:	687d      	ldr	r5, [r7, #4]
 801b416:	687b      	ldr	r3, [r7, #4]
 801b418:	3304      	adds	r3, #4
 801b41a:	687a      	ldr	r2, [r7, #4]
 801b41c:	8ad2      	ldrh	r2, [r2, #22]
 801b41e:	6879      	ldr	r1, [r7, #4]
 801b420:	8b09      	ldrh	r1, [r1, #24]
 801b422:	9102      	str	r1, [sp, #8]
 801b424:	9201      	str	r2, [sp, #4]
 801b426:	9300      	str	r3, [sp, #0]
 801b428:	462b      	mov	r3, r5
 801b42a:	4622      	mov	r2, r4
 801b42c:	4601      	mov	r1, r0
 801b42e:	6878      	ldr	r0, [r7, #4]
 801b430:	f005 fdfa 	bl	8021028 <tcp_rst>
              pcb->local_port, pcb->remote_port);

      tcp_pcb_purge(pcb);
 801b434:	6878      	ldr	r0, [r7, #4]
 801b436:	f001 fb67 	bl	801cb08 <tcp_pcb_purge>
      TCP_RMV_ACTIVE(pcb);
 801b43a:	4b47      	ldr	r3, [pc, #284]	@ (801b558 <tcp_close_shutdown+0x1b0>)
 801b43c:	681b      	ldr	r3, [r3, #0]
 801b43e:	687a      	ldr	r2, [r7, #4]
 801b440:	429a      	cmp	r2, r3
 801b442:	d105      	bne.n	801b450 <tcp_close_shutdown+0xa8>
 801b444:	4b44      	ldr	r3, [pc, #272]	@ (801b558 <tcp_close_shutdown+0x1b0>)
 801b446:	681b      	ldr	r3, [r3, #0]
 801b448:	68db      	ldr	r3, [r3, #12]
 801b44a:	4a43      	ldr	r2, [pc, #268]	@ (801b558 <tcp_close_shutdown+0x1b0>)
 801b44c:	6013      	str	r3, [r2, #0]
 801b44e:	e013      	b.n	801b478 <tcp_close_shutdown+0xd0>
 801b450:	4b41      	ldr	r3, [pc, #260]	@ (801b558 <tcp_close_shutdown+0x1b0>)
 801b452:	681b      	ldr	r3, [r3, #0]
 801b454:	60fb      	str	r3, [r7, #12]
 801b456:	e00c      	b.n	801b472 <tcp_close_shutdown+0xca>
 801b458:	68fb      	ldr	r3, [r7, #12]
 801b45a:	68db      	ldr	r3, [r3, #12]
 801b45c:	687a      	ldr	r2, [r7, #4]
 801b45e:	429a      	cmp	r2, r3
 801b460:	d104      	bne.n	801b46c <tcp_close_shutdown+0xc4>
 801b462:	687b      	ldr	r3, [r7, #4]
 801b464:	68da      	ldr	r2, [r3, #12]
 801b466:	68fb      	ldr	r3, [r7, #12]
 801b468:	60da      	str	r2, [r3, #12]
 801b46a:	e005      	b.n	801b478 <tcp_close_shutdown+0xd0>
 801b46c:	68fb      	ldr	r3, [r7, #12]
 801b46e:	68db      	ldr	r3, [r3, #12]
 801b470:	60fb      	str	r3, [r7, #12]
 801b472:	68fb      	ldr	r3, [r7, #12]
 801b474:	2b00      	cmp	r3, #0
 801b476:	d1ef      	bne.n	801b458 <tcp_close_shutdown+0xb0>
 801b478:	687b      	ldr	r3, [r7, #4]
 801b47a:	2200      	movs	r2, #0
 801b47c:	60da      	str	r2, [r3, #12]
 801b47e:	4b37      	ldr	r3, [pc, #220]	@ (801b55c <tcp_close_shutdown+0x1b4>)
 801b480:	2201      	movs	r2, #1
 801b482:	701a      	strb	r2, [r3, #0]
      /* Deallocate the pcb since we already sent a RST for it */
      if (tcp_input_pcb == pcb) {
 801b484:	4b36      	ldr	r3, [pc, #216]	@ (801b560 <tcp_close_shutdown+0x1b8>)
 801b486:	681b      	ldr	r3, [r3, #0]
 801b488:	687a      	ldr	r2, [r7, #4]
 801b48a:	429a      	cmp	r2, r3
 801b48c:	d102      	bne.n	801b494 <tcp_close_shutdown+0xec>
        /* prevent using a deallocated pcb: free it from tcp_input later */
        tcp_trigger_input_pcb_close();
 801b48e:	f003 ffff 	bl	801f490 <tcp_trigger_input_pcb_close>
 801b492:	e002      	b.n	801b49a <tcp_close_shutdown+0xf2>
      } else {
        tcp_free(pcb);
 801b494:	6878      	ldr	r0, [r7, #4]
 801b496:	f7ff fed5 	bl	801b244 <tcp_free>
      }
      return ERR_OK;
 801b49a:	2300      	movs	r3, #0
 801b49c:	e050      	b.n	801b540 <tcp_close_shutdown+0x198>
    }
  }

  /* - states which free the pcb are handled here,
     - states which send FIN and change state are handled in tcp_close_shutdown_fin() */
  switch (pcb->state) {
 801b49e:	687b      	ldr	r3, [r7, #4]
 801b4a0:	7d1b      	ldrb	r3, [r3, #20]
 801b4a2:	2b02      	cmp	r3, #2
 801b4a4:	d03b      	beq.n	801b51e <tcp_close_shutdown+0x176>
 801b4a6:	2b02      	cmp	r3, #2
 801b4a8:	dc44      	bgt.n	801b534 <tcp_close_shutdown+0x18c>
 801b4aa:	2b00      	cmp	r3, #0
 801b4ac:	d002      	beq.n	801b4b4 <tcp_close_shutdown+0x10c>
 801b4ae:	2b01      	cmp	r3, #1
 801b4b0:	d02a      	beq.n	801b508 <tcp_close_shutdown+0x160>
 801b4b2:	e03f      	b.n	801b534 <tcp_close_shutdown+0x18c>
       * and the user needs some way to free it should the need arise.
       * Calling tcp_close() with a pcb that has already been closed, (i.e. twice)
       * or for a pcb that has been used and then entered the CLOSED state
       * is erroneous, but this should never happen as the pcb has in those cases
       * been freed, and so any remaining handles are bogus. */
      if (pcb->local_port != 0) {
 801b4b4:	687b      	ldr	r3, [r7, #4]
 801b4b6:	8adb      	ldrh	r3, [r3, #22]
 801b4b8:	2b00      	cmp	r3, #0
 801b4ba:	d021      	beq.n	801b500 <tcp_close_shutdown+0x158>
        TCP_RMV(&tcp_bound_pcbs, pcb);
 801b4bc:	4b29      	ldr	r3, [pc, #164]	@ (801b564 <tcp_close_shutdown+0x1bc>)
 801b4be:	681b      	ldr	r3, [r3, #0]
 801b4c0:	687a      	ldr	r2, [r7, #4]
 801b4c2:	429a      	cmp	r2, r3
 801b4c4:	d105      	bne.n	801b4d2 <tcp_close_shutdown+0x12a>
 801b4c6:	4b27      	ldr	r3, [pc, #156]	@ (801b564 <tcp_close_shutdown+0x1bc>)
 801b4c8:	681b      	ldr	r3, [r3, #0]
 801b4ca:	68db      	ldr	r3, [r3, #12]
 801b4cc:	4a25      	ldr	r2, [pc, #148]	@ (801b564 <tcp_close_shutdown+0x1bc>)
 801b4ce:	6013      	str	r3, [r2, #0]
 801b4d0:	e013      	b.n	801b4fa <tcp_close_shutdown+0x152>
 801b4d2:	4b24      	ldr	r3, [pc, #144]	@ (801b564 <tcp_close_shutdown+0x1bc>)
 801b4d4:	681b      	ldr	r3, [r3, #0]
 801b4d6:	60bb      	str	r3, [r7, #8]
 801b4d8:	e00c      	b.n	801b4f4 <tcp_close_shutdown+0x14c>
 801b4da:	68bb      	ldr	r3, [r7, #8]
 801b4dc:	68db      	ldr	r3, [r3, #12]
 801b4de:	687a      	ldr	r2, [r7, #4]
 801b4e0:	429a      	cmp	r2, r3
 801b4e2:	d104      	bne.n	801b4ee <tcp_close_shutdown+0x146>
 801b4e4:	687b      	ldr	r3, [r7, #4]
 801b4e6:	68da      	ldr	r2, [r3, #12]
 801b4e8:	68bb      	ldr	r3, [r7, #8]
 801b4ea:	60da      	str	r2, [r3, #12]
 801b4ec:	e005      	b.n	801b4fa <tcp_close_shutdown+0x152>
 801b4ee:	68bb      	ldr	r3, [r7, #8]
 801b4f0:	68db      	ldr	r3, [r3, #12]
 801b4f2:	60bb      	str	r3, [r7, #8]
 801b4f4:	68bb      	ldr	r3, [r7, #8]
 801b4f6:	2b00      	cmp	r3, #0
 801b4f8:	d1ef      	bne.n	801b4da <tcp_close_shutdown+0x132>
 801b4fa:	687b      	ldr	r3, [r7, #4]
 801b4fc:	2200      	movs	r2, #0
 801b4fe:	60da      	str	r2, [r3, #12]
      }
      tcp_free(pcb);
 801b500:	6878      	ldr	r0, [r7, #4]
 801b502:	f7ff fe9f 	bl	801b244 <tcp_free>
      break;
 801b506:	e01a      	b.n	801b53e <tcp_close_shutdown+0x196>
    case LISTEN:
      tcp_listen_closed(pcb);
 801b508:	6878      	ldr	r0, [r7, #4]
 801b50a:	f7ff ff13 	bl	801b334 <tcp_listen_closed>
      tcp_pcb_remove(&tcp_listen_pcbs.pcbs, pcb);
 801b50e:	6879      	ldr	r1, [r7, #4]
 801b510:	4815      	ldr	r0, [pc, #84]	@ (801b568 <tcp_close_shutdown+0x1c0>)
 801b512:	f001 fb49 	bl	801cba8 <tcp_pcb_remove>
      tcp_free_listen(pcb);
 801b516:	6878      	ldr	r0, [r7, #4]
 801b518:	f7ff feb0 	bl	801b27c <tcp_free_listen>
      break;
 801b51c:	e00f      	b.n	801b53e <tcp_close_shutdown+0x196>
    case SYN_SENT:
      TCP_PCB_REMOVE_ACTIVE(pcb);
 801b51e:	6879      	ldr	r1, [r7, #4]
 801b520:	480d      	ldr	r0, [pc, #52]	@ (801b558 <tcp_close_shutdown+0x1b0>)
 801b522:	f001 fb41 	bl	801cba8 <tcp_pcb_remove>
 801b526:	4b0d      	ldr	r3, [pc, #52]	@ (801b55c <tcp_close_shutdown+0x1b4>)
 801b528:	2201      	movs	r2, #1
 801b52a:	701a      	strb	r2, [r3, #0]
      tcp_free(pcb);
 801b52c:	6878      	ldr	r0, [r7, #4]
 801b52e:	f7ff fe89 	bl	801b244 <tcp_free>
      MIB2_STATS_INC(mib2.tcpattemptfails);
      break;
 801b532:	e004      	b.n	801b53e <tcp_close_shutdown+0x196>
    default:
      return tcp_close_shutdown_fin(pcb);
 801b534:	6878      	ldr	r0, [r7, #4]
 801b536:	f000 f819 	bl	801b56c <tcp_close_shutdown_fin>
 801b53a:	4603      	mov	r3, r0
 801b53c:	e000      	b.n	801b540 <tcp_close_shutdown+0x198>
  }
  return ERR_OK;
 801b53e:	2300      	movs	r3, #0
}
 801b540:	4618      	mov	r0, r3
 801b542:	3710      	adds	r7, #16
 801b544:	46bd      	mov	sp, r7
 801b546:	bdb0      	pop	{r4, r5, r7, pc}
 801b548:	0802ee3c 	.word	0x0802ee3c
 801b54c:	0802ef10 	.word	0x0802ef10
 801b550:	0802ee80 	.word	0x0802ee80
 801b554:	0802ef30 	.word	0x0802ef30
 801b558:	2402af64 	.word	0x2402af64
 801b55c:	2402af6c 	.word	0x2402af6c
 801b560:	2402afa8 	.word	0x2402afa8
 801b564:	2402af5c 	.word	0x2402af5c
 801b568:	2402af60 	.word	0x2402af60

0801b56c <tcp_close_shutdown_fin>:

static err_t
tcp_close_shutdown_fin(struct tcp_pcb *pcb)
{
 801b56c:	b580      	push	{r7, lr}
 801b56e:	b084      	sub	sp, #16
 801b570:	af00      	add	r7, sp, #0
 801b572:	6078      	str	r0, [r7, #4]
  err_t err;
  LWIP_ASSERT("pcb != NULL", pcb != NULL);
 801b574:	687b      	ldr	r3, [r7, #4]
 801b576:	2b00      	cmp	r3, #0
 801b578:	d106      	bne.n	801b588 <tcp_close_shutdown_fin+0x1c>
 801b57a:	4b2e      	ldr	r3, [pc, #184]	@ (801b634 <tcp_close_shutdown_fin+0xc8>)
 801b57c:	f44f 72ce 	mov.w	r2, #412	@ 0x19c
 801b580:	492d      	ldr	r1, [pc, #180]	@ (801b638 <tcp_close_shutdown_fin+0xcc>)
 801b582:	482e      	ldr	r0, [pc, #184]	@ (801b63c <tcp_close_shutdown_fin+0xd0>)
 801b584:	f00e fe1a 	bl	802a1bc <iprintf>

  switch (pcb->state) {
 801b588:	687b      	ldr	r3, [r7, #4]
 801b58a:	7d1b      	ldrb	r3, [r3, #20]
 801b58c:	2b07      	cmp	r3, #7
 801b58e:	d020      	beq.n	801b5d2 <tcp_close_shutdown_fin+0x66>
 801b590:	2b07      	cmp	r3, #7
 801b592:	dc2b      	bgt.n	801b5ec <tcp_close_shutdown_fin+0x80>
 801b594:	2b03      	cmp	r3, #3
 801b596:	d002      	beq.n	801b59e <tcp_close_shutdown_fin+0x32>
 801b598:	2b04      	cmp	r3, #4
 801b59a:	d00d      	beq.n	801b5b8 <tcp_close_shutdown_fin+0x4c>
 801b59c:	e026      	b.n	801b5ec <tcp_close_shutdown_fin+0x80>
    case SYN_RCVD:
      err = tcp_send_fin(pcb);
 801b59e:	6878      	ldr	r0, [r7, #4]
 801b5a0:	f004 fe42 	bl	8020228 <tcp_send_fin>
 801b5a4:	4603      	mov	r3, r0
 801b5a6:	73fb      	strb	r3, [r7, #15]
      if (err == ERR_OK) {
 801b5a8:	f997 300f 	ldrsb.w	r3, [r7, #15]
 801b5ac:	2b00      	cmp	r3, #0
 801b5ae:	d11f      	bne.n	801b5f0 <tcp_close_shutdown_fin+0x84>
        tcp_backlog_accepted(pcb);
        MIB2_STATS_INC(mib2.tcpattemptfails);
        pcb->state = FIN_WAIT_1;
 801b5b0:	687b      	ldr	r3, [r7, #4]
 801b5b2:	2205      	movs	r2, #5
 801b5b4:	751a      	strb	r2, [r3, #20]
      }
      break;
 801b5b6:	e01b      	b.n	801b5f0 <tcp_close_shutdown_fin+0x84>
    case ESTABLISHED:
      err = tcp_send_fin(pcb);
 801b5b8:	6878      	ldr	r0, [r7, #4]
 801b5ba:	f004 fe35 	bl	8020228 <tcp_send_fin>
 801b5be:	4603      	mov	r3, r0
 801b5c0:	73fb      	strb	r3, [r7, #15]
      if (err == ERR_OK) {
 801b5c2:	f997 300f 	ldrsb.w	r3, [r7, #15]
 801b5c6:	2b00      	cmp	r3, #0
 801b5c8:	d114      	bne.n	801b5f4 <tcp_close_shutdown_fin+0x88>
        MIB2_STATS_INC(mib2.tcpestabresets);
        pcb->state = FIN_WAIT_1;
 801b5ca:	687b      	ldr	r3, [r7, #4]
 801b5cc:	2205      	movs	r2, #5
 801b5ce:	751a      	strb	r2, [r3, #20]
      }
      break;
 801b5d0:	e010      	b.n	801b5f4 <tcp_close_shutdown_fin+0x88>
    case CLOSE_WAIT:
      err = tcp_send_fin(pcb);
 801b5d2:	6878      	ldr	r0, [r7, #4]
 801b5d4:	f004 fe28 	bl	8020228 <tcp_send_fin>
 801b5d8:	4603      	mov	r3, r0
 801b5da:	73fb      	strb	r3, [r7, #15]
      if (err == ERR_OK) {
 801b5dc:	f997 300f 	ldrsb.w	r3, [r7, #15]
 801b5e0:	2b00      	cmp	r3, #0
 801b5e2:	d109      	bne.n	801b5f8 <tcp_close_shutdown_fin+0x8c>
        MIB2_STATS_INC(mib2.tcpestabresets);
        pcb->state = LAST_ACK;
 801b5e4:	687b      	ldr	r3, [r7, #4]
 801b5e6:	2209      	movs	r2, #9
 801b5e8:	751a      	strb	r2, [r3, #20]
      }
      break;
 801b5ea:	e005      	b.n	801b5f8 <tcp_close_shutdown_fin+0x8c>
    default:
      /* Has already been closed, do nothing. */
      return ERR_OK;
 801b5ec:	2300      	movs	r3, #0
 801b5ee:	e01c      	b.n	801b62a <tcp_close_shutdown_fin+0xbe>
      break;
 801b5f0:	bf00      	nop
 801b5f2:	e002      	b.n	801b5fa <tcp_close_shutdown_fin+0x8e>
      break;
 801b5f4:	bf00      	nop
 801b5f6:	e000      	b.n	801b5fa <tcp_close_shutdown_fin+0x8e>
      break;
 801b5f8:	bf00      	nop
  }

  if (err == ERR_OK) {
 801b5fa:	f997 300f 	ldrsb.w	r3, [r7, #15]
 801b5fe:	2b00      	cmp	r3, #0
 801b600:	d103      	bne.n	801b60a <tcp_close_shutdown_fin+0x9e>
    /* To ensure all data has been sent when tcp_close returns, we have
       to make sure tcp_output doesn't fail.
       Since we don't really have to ensure all data has been sent when tcp_close
       returns (unsent data is sent from tcp timer functions, also), we don't care
       for the return value of tcp_output for now. */
    tcp_output(pcb);
 801b602:	6878      	ldr	r0, [r7, #4]
 801b604:	f004 ff4e 	bl	80204a4 <tcp_output>
 801b608:	e00d      	b.n	801b626 <tcp_close_shutdown_fin+0xba>
  } else if (err == ERR_MEM) {
 801b60a:	f997 300f 	ldrsb.w	r3, [r7, #15]
 801b60e:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 801b612:	d108      	bne.n	801b626 <tcp_close_shutdown_fin+0xba>
    /* Mark this pcb for closing. Closing is retried from tcp_tmr. */
    tcp_set_flags(pcb, TF_CLOSEPEND);
 801b614:	687b      	ldr	r3, [r7, #4]
 801b616:	8b5b      	ldrh	r3, [r3, #26]
 801b618:	f043 0308 	orr.w	r3, r3, #8
 801b61c:	b29a      	uxth	r2, r3
 801b61e:	687b      	ldr	r3, [r7, #4]
 801b620:	835a      	strh	r2, [r3, #26]
    /* We have to return ERR_OK from here to indicate to the callers that this
       pcb should not be used any more as it will be freed soon via tcp_tmr.
       This is OK here since sending FIN does not guarantee a time frime for
       actually freeing the pcb, either (it is left in closure states for
       remote ACK or timeout) */
    return ERR_OK;
 801b622:	2300      	movs	r3, #0
 801b624:	e001      	b.n	801b62a <tcp_close_shutdown_fin+0xbe>
  }
  return err;
 801b626:	f997 300f 	ldrsb.w	r3, [r7, #15]
}
 801b62a:	4618      	mov	r0, r3
 801b62c:	3710      	adds	r7, #16
 801b62e:	46bd      	mov	sp, r7
 801b630:	bd80      	pop	{r7, pc}
 801b632:	bf00      	nop
 801b634:	0802ee3c 	.word	0x0802ee3c
 801b638:	0802eeec 	.word	0x0802eeec
 801b63c:	0802ee80 	.word	0x0802ee80

0801b640 <tcp_close>:
 * @return ERR_OK if connection has been closed
 *         another err_t if closing failed and pcb is not freed
 */
err_t
tcp_close(struct tcp_pcb *pcb)
{
 801b640:	b580      	push	{r7, lr}
 801b642:	b082      	sub	sp, #8
 801b644:	af00      	add	r7, sp, #0
 801b646:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT_CORE_LOCKED();
 801b648:	f7f5 fa18 	bl	8010a7c <sys_check_core_locking>

  LWIP_ERROR("tcp_close: invalid pcb", pcb != NULL, return ERR_ARG);
 801b64c:	687b      	ldr	r3, [r7, #4]
 801b64e:	2b00      	cmp	r3, #0
 801b650:	d109      	bne.n	801b666 <tcp_close+0x26>
 801b652:	4b0f      	ldr	r3, [pc, #60]	@ (801b690 <tcp_close+0x50>)
 801b654:	f44f 72f4 	mov.w	r2, #488	@ 0x1e8
 801b658:	490e      	ldr	r1, [pc, #56]	@ (801b694 <tcp_close+0x54>)
 801b65a:	480f      	ldr	r0, [pc, #60]	@ (801b698 <tcp_close+0x58>)
 801b65c:	f00e fdae 	bl	802a1bc <iprintf>
 801b660:	f06f 030f 	mvn.w	r3, #15
 801b664:	e00f      	b.n	801b686 <tcp_close+0x46>
  LWIP_DEBUGF(TCP_DEBUG, ("tcp_close: closing in "));

  tcp_debug_print_state(pcb->state);

  if (pcb->state != LISTEN) {
 801b666:	687b      	ldr	r3, [r7, #4]
 801b668:	7d1b      	ldrb	r3, [r3, #20]
 801b66a:	2b01      	cmp	r3, #1
 801b66c:	d006      	beq.n	801b67c <tcp_close+0x3c>
    /* Set a flag not to receive any more data... */
    tcp_set_flags(pcb, TF_RXCLOSED);
 801b66e:	687b      	ldr	r3, [r7, #4]
 801b670:	8b5b      	ldrh	r3, [r3, #26]
 801b672:	f043 0310 	orr.w	r3, r3, #16
 801b676:	b29a      	uxth	r2, r3
 801b678:	687b      	ldr	r3, [r7, #4]
 801b67a:	835a      	strh	r2, [r3, #26]
  }
  /* ... and close */
  return tcp_close_shutdown(pcb, 1);
 801b67c:	2101      	movs	r1, #1
 801b67e:	6878      	ldr	r0, [r7, #4]
 801b680:	f7ff fe92 	bl	801b3a8 <tcp_close_shutdown>
 801b684:	4603      	mov	r3, r0
}
 801b686:	4618      	mov	r0, r3
 801b688:	3708      	adds	r7, #8
 801b68a:	46bd      	mov	sp, r7
 801b68c:	bd80      	pop	{r7, pc}
 801b68e:	bf00      	nop
 801b690:	0802ee3c 	.word	0x0802ee3c
 801b694:	0802ef4c 	.word	0x0802ef4c
 801b698:	0802ee80 	.word	0x0802ee80

0801b69c <tcp_shutdown>:
 * @return ERR_OK if shutdown succeeded (or the PCB has already been shut down)
 *         another err_t on error.
 */
err_t
tcp_shutdown(struct tcp_pcb *pcb, int shut_rx, int shut_tx)
{
 801b69c:	b580      	push	{r7, lr}
 801b69e:	b084      	sub	sp, #16
 801b6a0:	af00      	add	r7, sp, #0
 801b6a2:	60f8      	str	r0, [r7, #12]
 801b6a4:	60b9      	str	r1, [r7, #8]
 801b6a6:	607a      	str	r2, [r7, #4]
  LWIP_ASSERT_CORE_LOCKED();
 801b6a8:	f7f5 f9e8 	bl	8010a7c <sys_check_core_locking>

  LWIP_ERROR("tcp_shutdown: invalid pcb", pcb != NULL, return ERR_ARG);
 801b6ac:	68fb      	ldr	r3, [r7, #12]
 801b6ae:	2b00      	cmp	r3, #0
 801b6b0:	d109      	bne.n	801b6c6 <tcp_shutdown+0x2a>
 801b6b2:	4b26      	ldr	r3, [pc, #152]	@ (801b74c <tcp_shutdown+0xb0>)
 801b6b4:	f240 2207 	movw	r2, #519	@ 0x207
 801b6b8:	4925      	ldr	r1, [pc, #148]	@ (801b750 <tcp_shutdown+0xb4>)
 801b6ba:	4826      	ldr	r0, [pc, #152]	@ (801b754 <tcp_shutdown+0xb8>)
 801b6bc:	f00e fd7e 	bl	802a1bc <iprintf>
 801b6c0:	f06f 030f 	mvn.w	r3, #15
 801b6c4:	e03d      	b.n	801b742 <tcp_shutdown+0xa6>

  if (pcb->state == LISTEN) {
 801b6c6:	68fb      	ldr	r3, [r7, #12]
 801b6c8:	7d1b      	ldrb	r3, [r3, #20]
 801b6ca:	2b01      	cmp	r3, #1
 801b6cc:	d102      	bne.n	801b6d4 <tcp_shutdown+0x38>
    return ERR_CONN;
 801b6ce:	f06f 030a 	mvn.w	r3, #10
 801b6d2:	e036      	b.n	801b742 <tcp_shutdown+0xa6>
  }
  if (shut_rx) {
 801b6d4:	68bb      	ldr	r3, [r7, #8]
 801b6d6:	2b00      	cmp	r3, #0
 801b6d8:	d01b      	beq.n	801b712 <tcp_shutdown+0x76>
    /* shut down the receive side: set a flag not to receive any more data... */
    tcp_set_flags(pcb, TF_RXCLOSED);
 801b6da:	68fb      	ldr	r3, [r7, #12]
 801b6dc:	8b5b      	ldrh	r3, [r3, #26]
 801b6de:	f043 0310 	orr.w	r3, r3, #16
 801b6e2:	b29a      	uxth	r2, r3
 801b6e4:	68fb      	ldr	r3, [r7, #12]
 801b6e6:	835a      	strh	r2, [r3, #26]
    if (shut_tx) {
 801b6e8:	687b      	ldr	r3, [r7, #4]
 801b6ea:	2b00      	cmp	r3, #0
 801b6ec:	d005      	beq.n	801b6fa <tcp_shutdown+0x5e>
      /* shutting down the tx AND rx side is the same as closing for the raw API */
      return tcp_close_shutdown(pcb, 1);
 801b6ee:	2101      	movs	r1, #1
 801b6f0:	68f8      	ldr	r0, [r7, #12]
 801b6f2:	f7ff fe59 	bl	801b3a8 <tcp_close_shutdown>
 801b6f6:	4603      	mov	r3, r0
 801b6f8:	e023      	b.n	801b742 <tcp_shutdown+0xa6>
    }
    /* ... and free buffered data */
    if (pcb->refused_data != NULL) {
 801b6fa:	68fb      	ldr	r3, [r7, #12]
 801b6fc:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 801b6fe:	2b00      	cmp	r3, #0
 801b700:	d007      	beq.n	801b712 <tcp_shutdown+0x76>
      pbuf_free(pcb->refused_data);
 801b702:	68fb      	ldr	r3, [r7, #12]
 801b704:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 801b706:	4618      	mov	r0, r3
 801b708:	f7ff fae0 	bl	801accc <pbuf_free>
      pcb->refused_data = NULL;
 801b70c:	68fb      	ldr	r3, [r7, #12]
 801b70e:	2200      	movs	r2, #0
 801b710:	679a      	str	r2, [r3, #120]	@ 0x78
    }
  }
  if (shut_tx) {
 801b712:	687b      	ldr	r3, [r7, #4]
 801b714:	2b00      	cmp	r3, #0
 801b716:	d013      	beq.n	801b740 <tcp_shutdown+0xa4>
    /* This can't happen twice since if it succeeds, the pcb's state is changed.
       Only close in these states as the others directly deallocate the PCB */
    switch (pcb->state) {
 801b718:	68fb      	ldr	r3, [r7, #12]
 801b71a:	7d1b      	ldrb	r3, [r3, #20]
 801b71c:	2b04      	cmp	r3, #4
 801b71e:	dc02      	bgt.n	801b726 <tcp_shutdown+0x8a>
 801b720:	2b03      	cmp	r3, #3
 801b722:	da02      	bge.n	801b72a <tcp_shutdown+0x8e>
 801b724:	e009      	b.n	801b73a <tcp_shutdown+0x9e>
 801b726:	2b07      	cmp	r3, #7
 801b728:	d107      	bne.n	801b73a <tcp_shutdown+0x9e>
      case SYN_RCVD:
      case ESTABLISHED:
      case CLOSE_WAIT:
        return tcp_close_shutdown(pcb, (u8_t)shut_rx);
 801b72a:	68bb      	ldr	r3, [r7, #8]
 801b72c:	b2db      	uxtb	r3, r3
 801b72e:	4619      	mov	r1, r3
 801b730:	68f8      	ldr	r0, [r7, #12]
 801b732:	f7ff fe39 	bl	801b3a8 <tcp_close_shutdown>
 801b736:	4603      	mov	r3, r0
 801b738:	e003      	b.n	801b742 <tcp_shutdown+0xa6>
      default:
        /* Not (yet?) connected, cannot shutdown the TX side as that would bring us
          into CLOSED state, where the PCB is deallocated. */
        return ERR_CONN;
 801b73a:	f06f 030a 	mvn.w	r3, #10
 801b73e:	e000      	b.n	801b742 <tcp_shutdown+0xa6>
    }
  }
  return ERR_OK;
 801b740:	2300      	movs	r3, #0
}
 801b742:	4618      	mov	r0, r3
 801b744:	3710      	adds	r7, #16
 801b746:	46bd      	mov	sp, r7
 801b748:	bd80      	pop	{r7, pc}
 801b74a:	bf00      	nop
 801b74c:	0802ee3c 	.word	0x0802ee3c
 801b750:	0802ef64 	.word	0x0802ef64
 801b754:	0802ee80 	.word	0x0802ee80

0801b758 <tcp_abandon>:
 * @param pcb the tcp_pcb to abort
 * @param reset boolean to indicate whether a reset should be sent
 */
void
tcp_abandon(struct tcp_pcb *pcb, int reset)
{
 801b758:	b580      	push	{r7, lr}
 801b75a:	b08e      	sub	sp, #56	@ 0x38
 801b75c:	af04      	add	r7, sp, #16
 801b75e:	6078      	str	r0, [r7, #4]
 801b760:	6039      	str	r1, [r7, #0]
#if LWIP_CALLBACK_API
  tcp_err_fn errf;
#endif /* LWIP_CALLBACK_API */
  void *errf_arg;

  LWIP_ASSERT_CORE_LOCKED();
 801b762:	f7f5 f98b 	bl	8010a7c <sys_check_core_locking>

  LWIP_ERROR("tcp_abandon: invalid pcb", pcb != NULL, return);
 801b766:	687b      	ldr	r3, [r7, #4]
 801b768:	2b00      	cmp	r3, #0
 801b76a:	d107      	bne.n	801b77c <tcp_abandon+0x24>
 801b76c:	4b52      	ldr	r3, [pc, #328]	@ (801b8b8 <tcp_abandon+0x160>)
 801b76e:	f240 223d 	movw	r2, #573	@ 0x23d
 801b772:	4952      	ldr	r1, [pc, #328]	@ (801b8bc <tcp_abandon+0x164>)
 801b774:	4852      	ldr	r0, [pc, #328]	@ (801b8c0 <tcp_abandon+0x168>)
 801b776:	f00e fd21 	bl	802a1bc <iprintf>
 801b77a:	e099      	b.n	801b8b0 <tcp_abandon+0x158>

  /* pcb->state LISTEN not allowed here */
  LWIP_ASSERT("don't call tcp_abort/tcp_abandon for listen-pcbs",
 801b77c:	687b      	ldr	r3, [r7, #4]
 801b77e:	7d1b      	ldrb	r3, [r3, #20]
 801b780:	2b01      	cmp	r3, #1
 801b782:	d106      	bne.n	801b792 <tcp_abandon+0x3a>
 801b784:	4b4c      	ldr	r3, [pc, #304]	@ (801b8b8 <tcp_abandon+0x160>)
 801b786:	f44f 7210 	mov.w	r2, #576	@ 0x240
 801b78a:	494e      	ldr	r1, [pc, #312]	@ (801b8c4 <tcp_abandon+0x16c>)
 801b78c:	484c      	ldr	r0, [pc, #304]	@ (801b8c0 <tcp_abandon+0x168>)
 801b78e:	f00e fd15 	bl	802a1bc <iprintf>
              pcb->state != LISTEN);
  /* Figure out on which TCP PCB list we are, and remove us. If we
     are in an active state, call the receive function associated with
     the PCB with a NULL argument, and send an RST to the remote end. */
  if (pcb->state == TIME_WAIT) {
 801b792:	687b      	ldr	r3, [r7, #4]
 801b794:	7d1b      	ldrb	r3, [r3, #20]
 801b796:	2b0a      	cmp	r3, #10
 801b798:	d107      	bne.n	801b7aa <tcp_abandon+0x52>
    tcp_pcb_remove(&tcp_tw_pcbs, pcb);
 801b79a:	6879      	ldr	r1, [r7, #4]
 801b79c:	484a      	ldr	r0, [pc, #296]	@ (801b8c8 <tcp_abandon+0x170>)
 801b79e:	f001 fa03 	bl	801cba8 <tcp_pcb_remove>
    tcp_free(pcb);
 801b7a2:	6878      	ldr	r0, [r7, #4]
 801b7a4:	f7ff fd4e 	bl	801b244 <tcp_free>
 801b7a8:	e082      	b.n	801b8b0 <tcp_abandon+0x158>
  } else {
    int send_rst = 0;
 801b7aa:	2300      	movs	r3, #0
 801b7ac:	627b      	str	r3, [r7, #36]	@ 0x24
    u16_t local_port = 0;
 801b7ae:	2300      	movs	r3, #0
 801b7b0:	847b      	strh	r3, [r7, #34]	@ 0x22
    enum tcp_state last_state;
    seqno = pcb->snd_nxt;
 801b7b2:	687b      	ldr	r3, [r7, #4]
 801b7b4:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 801b7b6:	61bb      	str	r3, [r7, #24]
    ackno = pcb->rcv_nxt;
 801b7b8:	687b      	ldr	r3, [r7, #4]
 801b7ba:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801b7bc:	617b      	str	r3, [r7, #20]
#if LWIP_CALLBACK_API
    errf = pcb->errf;
 801b7be:	687b      	ldr	r3, [r7, #4]
 801b7c0:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 801b7c4:	613b      	str	r3, [r7, #16]
#endif /* LWIP_CALLBACK_API */
    errf_arg = pcb->callback_arg;
 801b7c6:	687b      	ldr	r3, [r7, #4]
 801b7c8:	691b      	ldr	r3, [r3, #16]
 801b7ca:	60fb      	str	r3, [r7, #12]
    if (pcb->state == CLOSED) {
 801b7cc:	687b      	ldr	r3, [r7, #4]
 801b7ce:	7d1b      	ldrb	r3, [r3, #20]
 801b7d0:	2b00      	cmp	r3, #0
 801b7d2:	d126      	bne.n	801b822 <tcp_abandon+0xca>
      if (pcb->local_port != 0) {
 801b7d4:	687b      	ldr	r3, [r7, #4]
 801b7d6:	8adb      	ldrh	r3, [r3, #22]
 801b7d8:	2b00      	cmp	r3, #0
 801b7da:	d02e      	beq.n	801b83a <tcp_abandon+0xe2>
        /* bound, not yet opened */
        TCP_RMV(&tcp_bound_pcbs, pcb);
 801b7dc:	4b3b      	ldr	r3, [pc, #236]	@ (801b8cc <tcp_abandon+0x174>)
 801b7de:	681b      	ldr	r3, [r3, #0]
 801b7e0:	687a      	ldr	r2, [r7, #4]
 801b7e2:	429a      	cmp	r2, r3
 801b7e4:	d105      	bne.n	801b7f2 <tcp_abandon+0x9a>
 801b7e6:	4b39      	ldr	r3, [pc, #228]	@ (801b8cc <tcp_abandon+0x174>)
 801b7e8:	681b      	ldr	r3, [r3, #0]
 801b7ea:	68db      	ldr	r3, [r3, #12]
 801b7ec:	4a37      	ldr	r2, [pc, #220]	@ (801b8cc <tcp_abandon+0x174>)
 801b7ee:	6013      	str	r3, [r2, #0]
 801b7f0:	e013      	b.n	801b81a <tcp_abandon+0xc2>
 801b7f2:	4b36      	ldr	r3, [pc, #216]	@ (801b8cc <tcp_abandon+0x174>)
 801b7f4:	681b      	ldr	r3, [r3, #0]
 801b7f6:	61fb      	str	r3, [r7, #28]
 801b7f8:	e00c      	b.n	801b814 <tcp_abandon+0xbc>
 801b7fa:	69fb      	ldr	r3, [r7, #28]
 801b7fc:	68db      	ldr	r3, [r3, #12]
 801b7fe:	687a      	ldr	r2, [r7, #4]
 801b800:	429a      	cmp	r2, r3
 801b802:	d104      	bne.n	801b80e <tcp_abandon+0xb6>
 801b804:	687b      	ldr	r3, [r7, #4]
 801b806:	68da      	ldr	r2, [r3, #12]
 801b808:	69fb      	ldr	r3, [r7, #28]
 801b80a:	60da      	str	r2, [r3, #12]
 801b80c:	e005      	b.n	801b81a <tcp_abandon+0xc2>
 801b80e:	69fb      	ldr	r3, [r7, #28]
 801b810:	68db      	ldr	r3, [r3, #12]
 801b812:	61fb      	str	r3, [r7, #28]
 801b814:	69fb      	ldr	r3, [r7, #28]
 801b816:	2b00      	cmp	r3, #0
 801b818:	d1ef      	bne.n	801b7fa <tcp_abandon+0xa2>
 801b81a:	687b      	ldr	r3, [r7, #4]
 801b81c:	2200      	movs	r2, #0
 801b81e:	60da      	str	r2, [r3, #12]
 801b820:	e00b      	b.n	801b83a <tcp_abandon+0xe2>
      }
    } else {
      send_rst = reset;
 801b822:	683b      	ldr	r3, [r7, #0]
 801b824:	627b      	str	r3, [r7, #36]	@ 0x24
      local_port = pcb->local_port;
 801b826:	687b      	ldr	r3, [r7, #4]
 801b828:	8adb      	ldrh	r3, [r3, #22]
 801b82a:	847b      	strh	r3, [r7, #34]	@ 0x22
      TCP_PCB_REMOVE_ACTIVE(pcb);
 801b82c:	6879      	ldr	r1, [r7, #4]
 801b82e:	4828      	ldr	r0, [pc, #160]	@ (801b8d0 <tcp_abandon+0x178>)
 801b830:	f001 f9ba 	bl	801cba8 <tcp_pcb_remove>
 801b834:	4b27      	ldr	r3, [pc, #156]	@ (801b8d4 <tcp_abandon+0x17c>)
 801b836:	2201      	movs	r2, #1
 801b838:	701a      	strb	r2, [r3, #0]
    }
    if (pcb->unacked != NULL) {
 801b83a:	687b      	ldr	r3, [r7, #4]
 801b83c:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801b83e:	2b00      	cmp	r3, #0
 801b840:	d004      	beq.n	801b84c <tcp_abandon+0xf4>
      tcp_segs_free(pcb->unacked);
 801b842:	687b      	ldr	r3, [r7, #4]
 801b844:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801b846:	4618      	mov	r0, r3
 801b848:	f000 fe84 	bl	801c554 <tcp_segs_free>
    }
    if (pcb->unsent != NULL) {
 801b84c:	687b      	ldr	r3, [r7, #4]
 801b84e:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801b850:	2b00      	cmp	r3, #0
 801b852:	d004      	beq.n	801b85e <tcp_abandon+0x106>
      tcp_segs_free(pcb->unsent);
 801b854:	687b      	ldr	r3, [r7, #4]
 801b856:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801b858:	4618      	mov	r0, r3
 801b85a:	f000 fe7b 	bl	801c554 <tcp_segs_free>
    }
#if TCP_QUEUE_OOSEQ
    if (pcb->ooseq != NULL) {
 801b85e:	687b      	ldr	r3, [r7, #4]
 801b860:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801b862:	2b00      	cmp	r3, #0
 801b864:	d004      	beq.n	801b870 <tcp_abandon+0x118>
      tcp_segs_free(pcb->ooseq);
 801b866:	687b      	ldr	r3, [r7, #4]
 801b868:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801b86a:	4618      	mov	r0, r3
 801b86c:	f000 fe72 	bl	801c554 <tcp_segs_free>
    }
#endif /* TCP_QUEUE_OOSEQ */
    tcp_backlog_accepted(pcb);
    if (send_rst) {
 801b870:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801b872:	2b00      	cmp	r3, #0
 801b874:	d00e      	beq.n	801b894 <tcp_abandon+0x13c>
      LWIP_DEBUGF(TCP_RST_DEBUG, ("tcp_abandon: sending RST\n"));
      tcp_rst(pcb, seqno, ackno, &pcb->local_ip, &pcb->remote_ip, local_port, pcb->remote_port);
 801b876:	6879      	ldr	r1, [r7, #4]
 801b878:	687b      	ldr	r3, [r7, #4]
 801b87a:	3304      	adds	r3, #4
 801b87c:	687a      	ldr	r2, [r7, #4]
 801b87e:	8b12      	ldrh	r2, [r2, #24]
 801b880:	9202      	str	r2, [sp, #8]
 801b882:	8c7a      	ldrh	r2, [r7, #34]	@ 0x22
 801b884:	9201      	str	r2, [sp, #4]
 801b886:	9300      	str	r3, [sp, #0]
 801b888:	460b      	mov	r3, r1
 801b88a:	697a      	ldr	r2, [r7, #20]
 801b88c:	69b9      	ldr	r1, [r7, #24]
 801b88e:	6878      	ldr	r0, [r7, #4]
 801b890:	f005 fbca 	bl	8021028 <tcp_rst>
    }
    last_state = pcb->state;
 801b894:	687b      	ldr	r3, [r7, #4]
 801b896:	7d1b      	ldrb	r3, [r3, #20]
 801b898:	72fb      	strb	r3, [r7, #11]
    tcp_free(pcb);
 801b89a:	6878      	ldr	r0, [r7, #4]
 801b89c:	f7ff fcd2 	bl	801b244 <tcp_free>
    TCP_EVENT_ERR(last_state, errf, errf_arg, ERR_ABRT);
 801b8a0:	693b      	ldr	r3, [r7, #16]
 801b8a2:	2b00      	cmp	r3, #0
 801b8a4:	d004      	beq.n	801b8b0 <tcp_abandon+0x158>
 801b8a6:	693b      	ldr	r3, [r7, #16]
 801b8a8:	f06f 010c 	mvn.w	r1, #12
 801b8ac:	68f8      	ldr	r0, [r7, #12]
 801b8ae:	4798      	blx	r3
  }
}
 801b8b0:	3728      	adds	r7, #40	@ 0x28
 801b8b2:	46bd      	mov	sp, r7
 801b8b4:	bd80      	pop	{r7, pc}
 801b8b6:	bf00      	nop
 801b8b8:	0802ee3c 	.word	0x0802ee3c
 801b8bc:	0802ef80 	.word	0x0802ef80
 801b8c0:	0802ee80 	.word	0x0802ee80
 801b8c4:	0802ef9c 	.word	0x0802ef9c
 801b8c8:	2402af68 	.word	0x2402af68
 801b8cc:	2402af5c 	.word	0x2402af5c
 801b8d0:	2402af64 	.word	0x2402af64
 801b8d4:	2402af6c 	.word	0x2402af6c

0801b8d8 <tcp_abort>:
 *
 * @param pcb the tcp pcb to abort
 */
void
tcp_abort(struct tcp_pcb *pcb)
{
 801b8d8:	b580      	push	{r7, lr}
 801b8da:	b082      	sub	sp, #8
 801b8dc:	af00      	add	r7, sp, #0
 801b8de:	6078      	str	r0, [r7, #4]
  tcp_abandon(pcb, 1);
 801b8e0:	2101      	movs	r1, #1
 801b8e2:	6878      	ldr	r0, [r7, #4]
 801b8e4:	f7ff ff38 	bl	801b758 <tcp_abandon>
}
 801b8e8:	bf00      	nop
 801b8ea:	3708      	adds	r7, #8
 801b8ec:	46bd      	mov	sp, r7
 801b8ee:	bd80      	pop	{r7, pc}

0801b8f0 <tcp_update_rcv_ann_wnd>:
 * Returns how much extra window would be advertised if we sent an
 * update now.
 */
u32_t
tcp_update_rcv_ann_wnd(struct tcp_pcb *pcb)
{
 801b8f0:	b580      	push	{r7, lr}
 801b8f2:	b084      	sub	sp, #16
 801b8f4:	af00      	add	r7, sp, #0
 801b8f6:	6078      	str	r0, [r7, #4]
  u32_t new_right_edge;

  LWIP_ASSERT("tcp_update_rcv_ann_wnd: invalid pcb", pcb != NULL);
 801b8f8:	687b      	ldr	r3, [r7, #4]
 801b8fa:	2b00      	cmp	r3, #0
 801b8fc:	d106      	bne.n	801b90c <tcp_update_rcv_ann_wnd+0x1c>
 801b8fe:	4b25      	ldr	r3, [pc, #148]	@ (801b994 <tcp_update_rcv_ann_wnd+0xa4>)
 801b900:	f240 32a6 	movw	r2, #934	@ 0x3a6
 801b904:	4924      	ldr	r1, [pc, #144]	@ (801b998 <tcp_update_rcv_ann_wnd+0xa8>)
 801b906:	4825      	ldr	r0, [pc, #148]	@ (801b99c <tcp_update_rcv_ann_wnd+0xac>)
 801b908:	f00e fc58 	bl	802a1bc <iprintf>
  new_right_edge = pcb->rcv_nxt + pcb->rcv_wnd;
 801b90c:	687b      	ldr	r3, [r7, #4]
 801b90e:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801b910:	687a      	ldr	r2, [r7, #4]
 801b912:	8d12      	ldrh	r2, [r2, #40]	@ 0x28
 801b914:	4413      	add	r3, r2
 801b916:	60fb      	str	r3, [r7, #12]

  if (TCP_SEQ_GEQ(new_right_edge, pcb->rcv_ann_right_edge + LWIP_MIN((TCP_WND / 2), pcb->mss))) {
 801b918:	687b      	ldr	r3, [r7, #4]
 801b91a:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 801b91c:	687a      	ldr	r2, [r7, #4]
 801b91e:	8e52      	ldrh	r2, [r2, #50]	@ 0x32
 801b920:	f640 3168 	movw	r1, #2920	@ 0xb68
 801b924:	428a      	cmp	r2, r1
 801b926:	bf28      	it	cs
 801b928:	460a      	movcs	r2, r1
 801b92a:	b292      	uxth	r2, r2
 801b92c:	4413      	add	r3, r2
 801b92e:	68fa      	ldr	r2, [r7, #12]
 801b930:	1ad3      	subs	r3, r2, r3
 801b932:	2b00      	cmp	r3, #0
 801b934:	db08      	blt.n	801b948 <tcp_update_rcv_ann_wnd+0x58>
    /* we can advertise more window */
    pcb->rcv_ann_wnd = pcb->rcv_wnd;
 801b936:	687b      	ldr	r3, [r7, #4]
 801b938:	8d1a      	ldrh	r2, [r3, #40]	@ 0x28
 801b93a:	687b      	ldr	r3, [r7, #4]
 801b93c:	855a      	strh	r2, [r3, #42]	@ 0x2a
    return new_right_edge - pcb->rcv_ann_right_edge;
 801b93e:	687b      	ldr	r3, [r7, #4]
 801b940:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 801b942:	68fa      	ldr	r2, [r7, #12]
 801b944:	1ad3      	subs	r3, r2, r3
 801b946:	e020      	b.n	801b98a <tcp_update_rcv_ann_wnd+0x9a>
  } else {
    if (TCP_SEQ_GT(pcb->rcv_nxt, pcb->rcv_ann_right_edge)) {
 801b948:	687b      	ldr	r3, [r7, #4]
 801b94a:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 801b94c:	687b      	ldr	r3, [r7, #4]
 801b94e:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 801b950:	1ad3      	subs	r3, r2, r3
 801b952:	2b00      	cmp	r3, #0
 801b954:	dd03      	ble.n	801b95e <tcp_update_rcv_ann_wnd+0x6e>
      /* Can happen due to other end sending out of advertised window,
       * but within actual available (but not yet advertised) window */
      pcb->rcv_ann_wnd = 0;
 801b956:	687b      	ldr	r3, [r7, #4]
 801b958:	2200      	movs	r2, #0
 801b95a:	855a      	strh	r2, [r3, #42]	@ 0x2a
 801b95c:	e014      	b.n	801b988 <tcp_update_rcv_ann_wnd+0x98>
    } else {
      /* keep the right edge of window constant */
      u32_t new_rcv_ann_wnd = pcb->rcv_ann_right_edge - pcb->rcv_nxt;
 801b95e:	687b      	ldr	r3, [r7, #4]
 801b960:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 801b962:	687b      	ldr	r3, [r7, #4]
 801b964:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801b966:	1ad3      	subs	r3, r2, r3
 801b968:	60bb      	str	r3, [r7, #8]
#if !LWIP_WND_SCALE
      LWIP_ASSERT("new_rcv_ann_wnd <= 0xffff", new_rcv_ann_wnd <= 0xffff);
 801b96a:	68bb      	ldr	r3, [r7, #8]
 801b96c:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 801b970:	d306      	bcc.n	801b980 <tcp_update_rcv_ann_wnd+0x90>
 801b972:	4b08      	ldr	r3, [pc, #32]	@ (801b994 <tcp_update_rcv_ann_wnd+0xa4>)
 801b974:	f240 32b6 	movw	r2, #950	@ 0x3b6
 801b978:	4909      	ldr	r1, [pc, #36]	@ (801b9a0 <tcp_update_rcv_ann_wnd+0xb0>)
 801b97a:	4808      	ldr	r0, [pc, #32]	@ (801b99c <tcp_update_rcv_ann_wnd+0xac>)
 801b97c:	f00e fc1e 	bl	802a1bc <iprintf>
#endif
      pcb->rcv_ann_wnd = (tcpwnd_size_t)new_rcv_ann_wnd;
 801b980:	68bb      	ldr	r3, [r7, #8]
 801b982:	b29a      	uxth	r2, r3
 801b984:	687b      	ldr	r3, [r7, #4]
 801b986:	855a      	strh	r2, [r3, #42]	@ 0x2a
    }
    return 0;
 801b988:	2300      	movs	r3, #0
  }
}
 801b98a:	4618      	mov	r0, r3
 801b98c:	3710      	adds	r7, #16
 801b98e:	46bd      	mov	sp, r7
 801b990:	bd80      	pop	{r7, pc}
 801b992:	bf00      	nop
 801b994:	0802ee3c 	.word	0x0802ee3c
 801b998:	0802f098 	.word	0x0802f098
 801b99c:	0802ee80 	.word	0x0802ee80
 801b9a0:	0802f0bc 	.word	0x0802f0bc

0801b9a4 <tcp_recved>:
 * @param pcb the tcp_pcb for which data is read
 * @param len the amount of bytes that have been read by the application
 */
void
tcp_recved(struct tcp_pcb *pcb, u16_t len)
{
 801b9a4:	b580      	push	{r7, lr}
 801b9a6:	b084      	sub	sp, #16
 801b9a8:	af00      	add	r7, sp, #0
 801b9aa:	6078      	str	r0, [r7, #4]
 801b9ac:	460b      	mov	r3, r1
 801b9ae:	807b      	strh	r3, [r7, #2]
  u32_t wnd_inflation;
  tcpwnd_size_t rcv_wnd;

  LWIP_ASSERT_CORE_LOCKED();
 801b9b0:	f7f5 f864 	bl	8010a7c <sys_check_core_locking>

  LWIP_ERROR("tcp_recved: invalid pcb", pcb != NULL, return);
 801b9b4:	687b      	ldr	r3, [r7, #4]
 801b9b6:	2b00      	cmp	r3, #0
 801b9b8:	d107      	bne.n	801b9ca <tcp_recved+0x26>
 801b9ba:	4b20      	ldr	r3, [pc, #128]	@ (801ba3c <tcp_recved+0x98>)
 801b9bc:	f240 32cf 	movw	r2, #975	@ 0x3cf
 801b9c0:	491f      	ldr	r1, [pc, #124]	@ (801ba40 <tcp_recved+0x9c>)
 801b9c2:	4820      	ldr	r0, [pc, #128]	@ (801ba44 <tcp_recved+0xa0>)
 801b9c4:	f00e fbfa 	bl	802a1bc <iprintf>
 801b9c8:	e034      	b.n	801ba34 <tcp_recved+0x90>

  /* pcb->state LISTEN not allowed here */
  LWIP_ASSERT("don't call tcp_recved for listen-pcbs",
 801b9ca:	687b      	ldr	r3, [r7, #4]
 801b9cc:	7d1b      	ldrb	r3, [r3, #20]
 801b9ce:	2b01      	cmp	r3, #1
 801b9d0:	d106      	bne.n	801b9e0 <tcp_recved+0x3c>
 801b9d2:	4b1a      	ldr	r3, [pc, #104]	@ (801ba3c <tcp_recved+0x98>)
 801b9d4:	f240 32d2 	movw	r2, #978	@ 0x3d2
 801b9d8:	491b      	ldr	r1, [pc, #108]	@ (801ba48 <tcp_recved+0xa4>)
 801b9da:	481a      	ldr	r0, [pc, #104]	@ (801ba44 <tcp_recved+0xa0>)
 801b9dc:	f00e fbee 	bl	802a1bc <iprintf>
              pcb->state != LISTEN);

  rcv_wnd = (tcpwnd_size_t)(pcb->rcv_wnd + len);
 801b9e0:	687b      	ldr	r3, [r7, #4]
 801b9e2:	8d1a      	ldrh	r2, [r3, #40]	@ 0x28
 801b9e4:	887b      	ldrh	r3, [r7, #2]
 801b9e6:	4413      	add	r3, r2
 801b9e8:	81fb      	strh	r3, [r7, #14]
  if ((rcv_wnd > TCP_WND_MAX(pcb)) || (rcv_wnd < pcb->rcv_wnd)) {
 801b9ea:	89fb      	ldrh	r3, [r7, #14]
 801b9ec:	f241 62d0 	movw	r2, #5840	@ 0x16d0
 801b9f0:	4293      	cmp	r3, r2
 801b9f2:	d804      	bhi.n	801b9fe <tcp_recved+0x5a>
 801b9f4:	687b      	ldr	r3, [r7, #4]
 801b9f6:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 801b9f8:	89fa      	ldrh	r2, [r7, #14]
 801b9fa:	429a      	cmp	r2, r3
 801b9fc:	d204      	bcs.n	801ba08 <tcp_recved+0x64>
    /* window got too big or tcpwnd_size_t overflow */
    LWIP_DEBUGF(TCP_DEBUG, ("tcp_recved: window got too big or tcpwnd_size_t overflow\n"));
    pcb->rcv_wnd = TCP_WND_MAX(pcb);
 801b9fe:	687b      	ldr	r3, [r7, #4]
 801ba00:	f241 62d0 	movw	r2, #5840	@ 0x16d0
 801ba04:	851a      	strh	r2, [r3, #40]	@ 0x28
 801ba06:	e002      	b.n	801ba0e <tcp_recved+0x6a>
  } else  {
    pcb->rcv_wnd = rcv_wnd;
 801ba08:	687b      	ldr	r3, [r7, #4]
 801ba0a:	89fa      	ldrh	r2, [r7, #14]
 801ba0c:	851a      	strh	r2, [r3, #40]	@ 0x28
  }

  wnd_inflation = tcp_update_rcv_ann_wnd(pcb);
 801ba0e:	6878      	ldr	r0, [r7, #4]
 801ba10:	f7ff ff6e 	bl	801b8f0 <tcp_update_rcv_ann_wnd>
 801ba14:	60b8      	str	r0, [r7, #8]

  /* If the change in the right edge of window is significant (default
   * watermark is TCP_WND/4), then send an explicit update now.
   * Otherwise wait for a packet to be sent in the normal course of
   * events (or more window to be available later) */
  if (wnd_inflation >= TCP_WND_UPDATE_THRESHOLD) {
 801ba16:	68bb      	ldr	r3, [r7, #8]
 801ba18:	f240 52b3 	movw	r2, #1459	@ 0x5b3
 801ba1c:	4293      	cmp	r3, r2
 801ba1e:	d909      	bls.n	801ba34 <tcp_recved+0x90>
    tcp_ack_now(pcb);
 801ba20:	687b      	ldr	r3, [r7, #4]
 801ba22:	8b5b      	ldrh	r3, [r3, #26]
 801ba24:	f043 0302 	orr.w	r3, r3, #2
 801ba28:	b29a      	uxth	r2, r3
 801ba2a:	687b      	ldr	r3, [r7, #4]
 801ba2c:	835a      	strh	r2, [r3, #26]
    tcp_output(pcb);
 801ba2e:	6878      	ldr	r0, [r7, #4]
 801ba30:	f004 fd38 	bl	80204a4 <tcp_output>
  }

  LWIP_DEBUGF(TCP_DEBUG, ("tcp_recved: received %"U16_F" bytes, wnd %"TCPWNDSIZE_F" (%"TCPWNDSIZE_F").\n",
                          len, pcb->rcv_wnd, (u16_t)(TCP_WND_MAX(pcb) - pcb->rcv_wnd)));
}
 801ba34:	3710      	adds	r7, #16
 801ba36:	46bd      	mov	sp, r7
 801ba38:	bd80      	pop	{r7, pc}
 801ba3a:	bf00      	nop
 801ba3c:	0802ee3c 	.word	0x0802ee3c
 801ba40:	0802f0d8 	.word	0x0802f0d8
 801ba44:	0802ee80 	.word	0x0802ee80
 801ba48:	0802f0f0 	.word	0x0802f0f0

0801ba4c <tcp_new_port>:
 *
 * @return a new (free) local TCP port number
 */
static u16_t
tcp_new_port(void)
{
 801ba4c:	b480      	push	{r7}
 801ba4e:	b083      	sub	sp, #12
 801ba50:	af00      	add	r7, sp, #0
  u8_t i;
  u16_t n = 0;
 801ba52:	2300      	movs	r3, #0
 801ba54:	80bb      	strh	r3, [r7, #4]
  struct tcp_pcb *pcb;

again:
  tcp_port++;
 801ba56:	4b1e      	ldr	r3, [pc, #120]	@ (801bad0 <tcp_new_port+0x84>)
 801ba58:	881b      	ldrh	r3, [r3, #0]
 801ba5a:	3301      	adds	r3, #1
 801ba5c:	b29a      	uxth	r2, r3
 801ba5e:	4b1c      	ldr	r3, [pc, #112]	@ (801bad0 <tcp_new_port+0x84>)
 801ba60:	801a      	strh	r2, [r3, #0]
  if (tcp_port == TCP_LOCAL_PORT_RANGE_END) {
 801ba62:	4b1b      	ldr	r3, [pc, #108]	@ (801bad0 <tcp_new_port+0x84>)
 801ba64:	881b      	ldrh	r3, [r3, #0]
 801ba66:	f64f 72ff 	movw	r2, #65535	@ 0xffff
 801ba6a:	4293      	cmp	r3, r2
 801ba6c:	d103      	bne.n	801ba76 <tcp_new_port+0x2a>
    tcp_port = TCP_LOCAL_PORT_RANGE_START;
 801ba6e:	4b18      	ldr	r3, [pc, #96]	@ (801bad0 <tcp_new_port+0x84>)
 801ba70:	f44f 4240 	mov.w	r2, #49152	@ 0xc000
 801ba74:	801a      	strh	r2, [r3, #0]
  }
  /* Check all PCB lists. */
  for (i = 0; i < NUM_TCP_PCB_LISTS; i++) {
 801ba76:	2300      	movs	r3, #0
 801ba78:	71fb      	strb	r3, [r7, #7]
 801ba7a:	e01e      	b.n	801baba <tcp_new_port+0x6e>
    for (pcb = *tcp_pcb_lists[i]; pcb != NULL; pcb = pcb->next) {
 801ba7c:	79fb      	ldrb	r3, [r7, #7]
 801ba7e:	4a15      	ldr	r2, [pc, #84]	@ (801bad4 <tcp_new_port+0x88>)
 801ba80:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
 801ba84:	681b      	ldr	r3, [r3, #0]
 801ba86:	603b      	str	r3, [r7, #0]
 801ba88:	e011      	b.n	801baae <tcp_new_port+0x62>
      if (pcb->local_port == tcp_port) {
 801ba8a:	683b      	ldr	r3, [r7, #0]
 801ba8c:	8ada      	ldrh	r2, [r3, #22]
 801ba8e:	4b10      	ldr	r3, [pc, #64]	@ (801bad0 <tcp_new_port+0x84>)
 801ba90:	881b      	ldrh	r3, [r3, #0]
 801ba92:	429a      	cmp	r2, r3
 801ba94:	d108      	bne.n	801baa8 <tcp_new_port+0x5c>
        n++;
 801ba96:	88bb      	ldrh	r3, [r7, #4]
 801ba98:	3301      	adds	r3, #1
 801ba9a:	80bb      	strh	r3, [r7, #4]
        if (n > (TCP_LOCAL_PORT_RANGE_END - TCP_LOCAL_PORT_RANGE_START)) {
 801ba9c:	88bb      	ldrh	r3, [r7, #4]
 801ba9e:	f5b3 4f80 	cmp.w	r3, #16384	@ 0x4000
 801baa2:	d3d8      	bcc.n	801ba56 <tcp_new_port+0xa>
          return 0;
 801baa4:	2300      	movs	r3, #0
 801baa6:	e00d      	b.n	801bac4 <tcp_new_port+0x78>
    for (pcb = *tcp_pcb_lists[i]; pcb != NULL; pcb = pcb->next) {
 801baa8:	683b      	ldr	r3, [r7, #0]
 801baaa:	68db      	ldr	r3, [r3, #12]
 801baac:	603b      	str	r3, [r7, #0]
 801baae:	683b      	ldr	r3, [r7, #0]
 801bab0:	2b00      	cmp	r3, #0
 801bab2:	d1ea      	bne.n	801ba8a <tcp_new_port+0x3e>
  for (i = 0; i < NUM_TCP_PCB_LISTS; i++) {
 801bab4:	79fb      	ldrb	r3, [r7, #7]
 801bab6:	3301      	adds	r3, #1
 801bab8:	71fb      	strb	r3, [r7, #7]
 801baba:	79fb      	ldrb	r3, [r7, #7]
 801babc:	2b03      	cmp	r3, #3
 801babe:	d9dd      	bls.n	801ba7c <tcp_new_port+0x30>
        }
        goto again;
      }
    }
  }
  return tcp_port;
 801bac0:	4b03      	ldr	r3, [pc, #12]	@ (801bad0 <tcp_new_port+0x84>)
 801bac2:	881b      	ldrh	r3, [r3, #0]
}
 801bac4:	4618      	mov	r0, r3
 801bac6:	370c      	adds	r7, #12
 801bac8:	46bd      	mov	sp, r7
 801baca:	f85d 7b04 	ldr.w	r7, [sp], #4
 801bace:	4770      	bx	lr
 801bad0:	2400004c 	.word	0x2400004c
 801bad4:	080314bc 	.word	0x080314bc

0801bad8 <tcp_connect>:
 *         other err_t values if connect request couldn't be sent
 */
err_t
tcp_connect(struct tcp_pcb *pcb, const ip_addr_t *ipaddr, u16_t port,
            tcp_connected_fn connected)
{
 801bad8:	b580      	push	{r7, lr}
 801bada:	b08a      	sub	sp, #40	@ 0x28
 801badc:	af00      	add	r7, sp, #0
 801bade:	60f8      	str	r0, [r7, #12]
 801bae0:	60b9      	str	r1, [r7, #8]
 801bae2:	603b      	str	r3, [r7, #0]
 801bae4:	4613      	mov	r3, r2
 801bae6:	80fb      	strh	r3, [r7, #6]
  struct netif *netif = NULL;
 801bae8:	2300      	movs	r3, #0
 801baea:	627b      	str	r3, [r7, #36]	@ 0x24
  err_t ret;
  u32_t iss;
  u16_t old_local_port;

  LWIP_ASSERT_CORE_LOCKED();
 801baec:	f7f4 ffc6 	bl	8010a7c <sys_check_core_locking>

  LWIP_ERROR("tcp_connect: invalid pcb", pcb != NULL, return ERR_ARG);
 801baf0:	68fb      	ldr	r3, [r7, #12]
 801baf2:	2b00      	cmp	r3, #0
 801baf4:	d109      	bne.n	801bb0a <tcp_connect+0x32>
 801baf6:	4b7d      	ldr	r3, [pc, #500]	@ (801bcec <tcp_connect+0x214>)
 801baf8:	f240 4235 	movw	r2, #1077	@ 0x435
 801bafc:	497c      	ldr	r1, [pc, #496]	@ (801bcf0 <tcp_connect+0x218>)
 801bafe:	487d      	ldr	r0, [pc, #500]	@ (801bcf4 <tcp_connect+0x21c>)
 801bb00:	f00e fb5c 	bl	802a1bc <iprintf>
 801bb04:	f06f 030f 	mvn.w	r3, #15
 801bb08:	e0ec      	b.n	801bce4 <tcp_connect+0x20c>
  LWIP_ERROR("tcp_connect: invalid ipaddr", ipaddr != NULL, return ERR_ARG);
 801bb0a:	68bb      	ldr	r3, [r7, #8]
 801bb0c:	2b00      	cmp	r3, #0
 801bb0e:	d109      	bne.n	801bb24 <tcp_connect+0x4c>
 801bb10:	4b76      	ldr	r3, [pc, #472]	@ (801bcec <tcp_connect+0x214>)
 801bb12:	f240 4236 	movw	r2, #1078	@ 0x436
 801bb16:	4978      	ldr	r1, [pc, #480]	@ (801bcf8 <tcp_connect+0x220>)
 801bb18:	4876      	ldr	r0, [pc, #472]	@ (801bcf4 <tcp_connect+0x21c>)
 801bb1a:	f00e fb4f 	bl	802a1bc <iprintf>
 801bb1e:	f06f 030f 	mvn.w	r3, #15
 801bb22:	e0df      	b.n	801bce4 <tcp_connect+0x20c>

  LWIP_ERROR("tcp_connect: can only connect from state CLOSED", pcb->state == CLOSED, return ERR_ISCONN);
 801bb24:	68fb      	ldr	r3, [r7, #12]
 801bb26:	7d1b      	ldrb	r3, [r3, #20]
 801bb28:	2b00      	cmp	r3, #0
 801bb2a:	d009      	beq.n	801bb40 <tcp_connect+0x68>
 801bb2c:	4b6f      	ldr	r3, [pc, #444]	@ (801bcec <tcp_connect+0x214>)
 801bb2e:	f44f 6287 	mov.w	r2, #1080	@ 0x438
 801bb32:	4972      	ldr	r1, [pc, #456]	@ (801bcfc <tcp_connect+0x224>)
 801bb34:	486f      	ldr	r0, [pc, #444]	@ (801bcf4 <tcp_connect+0x21c>)
 801bb36:	f00e fb41 	bl	802a1bc <iprintf>
 801bb3a:	f06f 0309 	mvn.w	r3, #9
 801bb3e:	e0d1      	b.n	801bce4 <tcp_connect+0x20c>

  LWIP_DEBUGF(TCP_DEBUG, ("tcp_connect to port %"U16_F"\n", port));
  ip_addr_set(&pcb->remote_ip, ipaddr);
 801bb40:	68bb      	ldr	r3, [r7, #8]
 801bb42:	2b00      	cmp	r3, #0
 801bb44:	d002      	beq.n	801bb4c <tcp_connect+0x74>
 801bb46:	68bb      	ldr	r3, [r7, #8]
 801bb48:	681b      	ldr	r3, [r3, #0]
 801bb4a:	e000      	b.n	801bb4e <tcp_connect+0x76>
 801bb4c:	2300      	movs	r3, #0
 801bb4e:	68fa      	ldr	r2, [r7, #12]
 801bb50:	6053      	str	r3, [r2, #4]
  pcb->remote_port = port;
 801bb52:	68fb      	ldr	r3, [r7, #12]
 801bb54:	88fa      	ldrh	r2, [r7, #6]
 801bb56:	831a      	strh	r2, [r3, #24]

  if (pcb->netif_idx != NETIF_NO_INDEX) {
 801bb58:	68fb      	ldr	r3, [r7, #12]
 801bb5a:	7a1b      	ldrb	r3, [r3, #8]
 801bb5c:	2b00      	cmp	r3, #0
 801bb5e:	d006      	beq.n	801bb6e <tcp_connect+0x96>
    netif = netif_get_by_index(pcb->netif_idx);
 801bb60:	68fb      	ldr	r3, [r7, #12]
 801bb62:	7a1b      	ldrb	r3, [r3, #8]
 801bb64:	4618      	mov	r0, r3
 801bb66:	f7fe fcf1 	bl	801a54c <netif_get_by_index>
 801bb6a:	6278      	str	r0, [r7, #36]	@ 0x24
 801bb6c:	e005      	b.n	801bb7a <tcp_connect+0xa2>
  } else {
    /* check if we have a route to the remote host */
    netif = ip_route(&pcb->local_ip, &pcb->remote_ip);
 801bb6e:	68fb      	ldr	r3, [r7, #12]
 801bb70:	3304      	adds	r3, #4
 801bb72:	4618      	mov	r0, r3
 801bb74:	f009 fb14 	bl	80251a0 <ip4_route>
 801bb78:	6278      	str	r0, [r7, #36]	@ 0x24
  }
  if (netif == NULL) {
 801bb7a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801bb7c:	2b00      	cmp	r3, #0
 801bb7e:	d102      	bne.n	801bb86 <tcp_connect+0xae>
    /* Don't even try to send a SYN packet if we have no route since that will fail. */
    return ERR_RTE;
 801bb80:	f06f 0303 	mvn.w	r3, #3
 801bb84:	e0ae      	b.n	801bce4 <tcp_connect+0x20c>
  }

  /* check if local IP has been assigned to pcb, if not, get one */
  if (ip_addr_isany(&pcb->local_ip)) {
 801bb86:	68fb      	ldr	r3, [r7, #12]
 801bb88:	2b00      	cmp	r3, #0
 801bb8a:	d003      	beq.n	801bb94 <tcp_connect+0xbc>
 801bb8c:	68fb      	ldr	r3, [r7, #12]
 801bb8e:	681b      	ldr	r3, [r3, #0]
 801bb90:	2b00      	cmp	r3, #0
 801bb92:	d111      	bne.n	801bbb8 <tcp_connect+0xe0>
    const ip_addr_t *local_ip = ip_netif_get_local_ip(netif, ipaddr);
 801bb94:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801bb96:	2b00      	cmp	r3, #0
 801bb98:	d002      	beq.n	801bba0 <tcp_connect+0xc8>
 801bb9a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801bb9c:	3304      	adds	r3, #4
 801bb9e:	e000      	b.n	801bba2 <tcp_connect+0xca>
 801bba0:	2300      	movs	r3, #0
 801bba2:	61fb      	str	r3, [r7, #28]
    if (local_ip == NULL) {
 801bba4:	69fb      	ldr	r3, [r7, #28]
 801bba6:	2b00      	cmp	r3, #0
 801bba8:	d102      	bne.n	801bbb0 <tcp_connect+0xd8>
      return ERR_RTE;
 801bbaa:	f06f 0303 	mvn.w	r3, #3
 801bbae:	e099      	b.n	801bce4 <tcp_connect+0x20c>
    }
    ip_addr_copy(pcb->local_ip, *local_ip);
 801bbb0:	69fb      	ldr	r3, [r7, #28]
 801bbb2:	681a      	ldr	r2, [r3, #0]
 801bbb4:	68fb      	ldr	r3, [r7, #12]
 801bbb6:	601a      	str	r2, [r3, #0]
      ip6_addr_lacks_zone(ip_2_ip6(&pcb->remote_ip), IP6_UNICAST)) {
    ip6_addr_assign_zone(ip_2_ip6(&pcb->remote_ip), IP6_UNICAST, netif);
  }
#endif /* LWIP_IPV6 && LWIP_IPV6_SCOPES */

  old_local_port = pcb->local_port;
 801bbb8:	68fb      	ldr	r3, [r7, #12]
 801bbba:	8adb      	ldrh	r3, [r3, #22]
 801bbbc:	837b      	strh	r3, [r7, #26]
  if (pcb->local_port == 0) {
 801bbbe:	68fb      	ldr	r3, [r7, #12]
 801bbc0:	8adb      	ldrh	r3, [r3, #22]
 801bbc2:	2b00      	cmp	r3, #0
 801bbc4:	d10c      	bne.n	801bbe0 <tcp_connect+0x108>
    pcb->local_port = tcp_new_port();
 801bbc6:	f7ff ff41 	bl	801ba4c <tcp_new_port>
 801bbca:	4603      	mov	r3, r0
 801bbcc:	461a      	mov	r2, r3
 801bbce:	68fb      	ldr	r3, [r7, #12]
 801bbd0:	82da      	strh	r2, [r3, #22]
    if (pcb->local_port == 0) {
 801bbd2:	68fb      	ldr	r3, [r7, #12]
 801bbd4:	8adb      	ldrh	r3, [r3, #22]
 801bbd6:	2b00      	cmp	r3, #0
 801bbd8:	d102      	bne.n	801bbe0 <tcp_connect+0x108>
      return ERR_BUF;
 801bbda:	f06f 0301 	mvn.w	r3, #1
 801bbde:	e081      	b.n	801bce4 <tcp_connect+0x20c>
      }
    }
#endif /* SO_REUSE */
  }

  iss = tcp_next_iss(pcb);
 801bbe0:	68f8      	ldr	r0, [r7, #12]
 801bbe2:	f001 f875 	bl	801ccd0 <tcp_next_iss>
 801bbe6:	6178      	str	r0, [r7, #20]
  pcb->rcv_nxt = 0;
 801bbe8:	68fb      	ldr	r3, [r7, #12]
 801bbea:	2200      	movs	r2, #0
 801bbec:	625a      	str	r2, [r3, #36]	@ 0x24
  pcb->snd_nxt = iss;
 801bbee:	68fb      	ldr	r3, [r7, #12]
 801bbf0:	697a      	ldr	r2, [r7, #20]
 801bbf2:	651a      	str	r2, [r3, #80]	@ 0x50
  pcb->lastack = iss - 1;
 801bbf4:	697b      	ldr	r3, [r7, #20]
 801bbf6:	1e5a      	subs	r2, r3, #1
 801bbf8:	68fb      	ldr	r3, [r7, #12]
 801bbfa:	645a      	str	r2, [r3, #68]	@ 0x44
  pcb->snd_wl2 = iss - 1;
 801bbfc:	697b      	ldr	r3, [r7, #20]
 801bbfe:	1e5a      	subs	r2, r3, #1
 801bc00:	68fb      	ldr	r3, [r7, #12]
 801bc02:	659a      	str	r2, [r3, #88]	@ 0x58
  pcb->snd_lbb = iss - 1;
 801bc04:	697b      	ldr	r3, [r7, #20]
 801bc06:	1e5a      	subs	r2, r3, #1
 801bc08:	68fb      	ldr	r3, [r7, #12]
 801bc0a:	65da      	str	r2, [r3, #92]	@ 0x5c
  /* Start with a window that does not need scaling. When window scaling is
     enabled and used, the window is enlarged when both sides agree on scaling. */
  pcb->rcv_wnd = pcb->rcv_ann_wnd = TCPWND_MIN16(TCP_WND);
 801bc0c:	68fb      	ldr	r3, [r7, #12]
 801bc0e:	f241 62d0 	movw	r2, #5840	@ 0x16d0
 801bc12:	855a      	strh	r2, [r3, #42]	@ 0x2a
 801bc14:	68fb      	ldr	r3, [r7, #12]
 801bc16:	8d5a      	ldrh	r2, [r3, #42]	@ 0x2a
 801bc18:	68fb      	ldr	r3, [r7, #12]
 801bc1a:	851a      	strh	r2, [r3, #40]	@ 0x28
  pcb->rcv_ann_right_edge = pcb->rcv_nxt;
 801bc1c:	68fb      	ldr	r3, [r7, #12]
 801bc1e:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 801bc20:	68fb      	ldr	r3, [r7, #12]
 801bc22:	62da      	str	r2, [r3, #44]	@ 0x2c
  pcb->snd_wnd = TCP_WND;
 801bc24:	68fb      	ldr	r3, [r7, #12]
 801bc26:	f241 62d0 	movw	r2, #5840	@ 0x16d0
 801bc2a:	f8a3 2060 	strh.w	r2, [r3, #96]	@ 0x60
  /* As initial send MSS, we use TCP_MSS but limit it to 536.
     The send MSS is updated when an MSS option is received. */
  pcb->mss = INITIAL_MSS;
 801bc2e:	68fb      	ldr	r3, [r7, #12]
 801bc30:	f44f 7206 	mov.w	r2, #536	@ 0x218
 801bc34:	865a      	strh	r2, [r3, #50]	@ 0x32
#if TCP_CALCULATE_EFF_SEND_MSS
  pcb->mss = tcp_eff_send_mss_netif(pcb->mss, netif, &pcb->remote_ip);
 801bc36:	68fb      	ldr	r3, [r7, #12]
 801bc38:	8e58      	ldrh	r0, [r3, #50]	@ 0x32
 801bc3a:	68fb      	ldr	r3, [r7, #12]
 801bc3c:	3304      	adds	r3, #4
 801bc3e:	461a      	mov	r2, r3
 801bc40:	6a79      	ldr	r1, [r7, #36]	@ 0x24
 801bc42:	f001 f86b 	bl	801cd1c <tcp_eff_send_mss_netif>
 801bc46:	4603      	mov	r3, r0
 801bc48:	461a      	mov	r2, r3
 801bc4a:	68fb      	ldr	r3, [r7, #12]
 801bc4c:	865a      	strh	r2, [r3, #50]	@ 0x32
#endif /* TCP_CALCULATE_EFF_SEND_MSS */
  pcb->cwnd = 1;
 801bc4e:	68fb      	ldr	r3, [r7, #12]
 801bc50:	2201      	movs	r2, #1
 801bc52:	f8a3 2048 	strh.w	r2, [r3, #72]	@ 0x48
#if LWIP_CALLBACK_API
  pcb->connected = connected;
 801bc56:	68fb      	ldr	r3, [r7, #12]
 801bc58:	683a      	ldr	r2, [r7, #0]
 801bc5a:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88
#else /* LWIP_CALLBACK_API */
  LWIP_UNUSED_ARG(connected);
#endif /* LWIP_CALLBACK_API */

  /* Send a SYN together with the MSS option. */
  ret = tcp_enqueue_flags(pcb, TCP_SYN);
 801bc5e:	2102      	movs	r1, #2
 801bc60:	68f8      	ldr	r0, [r7, #12]
 801bc62:	f004 fb31 	bl	80202c8 <tcp_enqueue_flags>
 801bc66:	4603      	mov	r3, r0
 801bc68:	74fb      	strb	r3, [r7, #19]
  if (ret == ERR_OK) {
 801bc6a:	f997 3013 	ldrsb.w	r3, [r7, #19]
 801bc6e:	2b00      	cmp	r3, #0
 801bc70:	d136      	bne.n	801bce0 <tcp_connect+0x208>
    /* SYN segment was enqueued, changed the pcbs state now */
    pcb->state = SYN_SENT;
 801bc72:	68fb      	ldr	r3, [r7, #12]
 801bc74:	2202      	movs	r2, #2
 801bc76:	751a      	strb	r2, [r3, #20]
    if (old_local_port != 0) {
 801bc78:	8b7b      	ldrh	r3, [r7, #26]
 801bc7a:	2b00      	cmp	r3, #0
 801bc7c:	d021      	beq.n	801bcc2 <tcp_connect+0x1ea>
      TCP_RMV(&tcp_bound_pcbs, pcb);
 801bc7e:	4b20      	ldr	r3, [pc, #128]	@ (801bd00 <tcp_connect+0x228>)
 801bc80:	681b      	ldr	r3, [r3, #0]
 801bc82:	68fa      	ldr	r2, [r7, #12]
 801bc84:	429a      	cmp	r2, r3
 801bc86:	d105      	bne.n	801bc94 <tcp_connect+0x1bc>
 801bc88:	4b1d      	ldr	r3, [pc, #116]	@ (801bd00 <tcp_connect+0x228>)
 801bc8a:	681b      	ldr	r3, [r3, #0]
 801bc8c:	68db      	ldr	r3, [r3, #12]
 801bc8e:	4a1c      	ldr	r2, [pc, #112]	@ (801bd00 <tcp_connect+0x228>)
 801bc90:	6013      	str	r3, [r2, #0]
 801bc92:	e013      	b.n	801bcbc <tcp_connect+0x1e4>
 801bc94:	4b1a      	ldr	r3, [pc, #104]	@ (801bd00 <tcp_connect+0x228>)
 801bc96:	681b      	ldr	r3, [r3, #0]
 801bc98:	623b      	str	r3, [r7, #32]
 801bc9a:	e00c      	b.n	801bcb6 <tcp_connect+0x1de>
 801bc9c:	6a3b      	ldr	r3, [r7, #32]
 801bc9e:	68db      	ldr	r3, [r3, #12]
 801bca0:	68fa      	ldr	r2, [r7, #12]
 801bca2:	429a      	cmp	r2, r3
 801bca4:	d104      	bne.n	801bcb0 <tcp_connect+0x1d8>
 801bca6:	68fb      	ldr	r3, [r7, #12]
 801bca8:	68da      	ldr	r2, [r3, #12]
 801bcaa:	6a3b      	ldr	r3, [r7, #32]
 801bcac:	60da      	str	r2, [r3, #12]
 801bcae:	e005      	b.n	801bcbc <tcp_connect+0x1e4>
 801bcb0:	6a3b      	ldr	r3, [r7, #32]
 801bcb2:	68db      	ldr	r3, [r3, #12]
 801bcb4:	623b      	str	r3, [r7, #32]
 801bcb6:	6a3b      	ldr	r3, [r7, #32]
 801bcb8:	2b00      	cmp	r3, #0
 801bcba:	d1ef      	bne.n	801bc9c <tcp_connect+0x1c4>
 801bcbc:	68fb      	ldr	r3, [r7, #12]
 801bcbe:	2200      	movs	r2, #0
 801bcc0:	60da      	str	r2, [r3, #12]
    }
    TCP_REG_ACTIVE(pcb);
 801bcc2:	4b10      	ldr	r3, [pc, #64]	@ (801bd04 <tcp_connect+0x22c>)
 801bcc4:	681a      	ldr	r2, [r3, #0]
 801bcc6:	68fb      	ldr	r3, [r7, #12]
 801bcc8:	60da      	str	r2, [r3, #12]
 801bcca:	4a0e      	ldr	r2, [pc, #56]	@ (801bd04 <tcp_connect+0x22c>)
 801bccc:	68fb      	ldr	r3, [r7, #12]
 801bcce:	6013      	str	r3, [r2, #0]
 801bcd0:	f005 fb6c 	bl	80213ac <tcp_timer_needed>
 801bcd4:	4b0c      	ldr	r3, [pc, #48]	@ (801bd08 <tcp_connect+0x230>)
 801bcd6:	2201      	movs	r2, #1
 801bcd8:	701a      	strb	r2, [r3, #0]
    MIB2_STATS_INC(mib2.tcpactiveopens);

    tcp_output(pcb);
 801bcda:	68f8      	ldr	r0, [r7, #12]
 801bcdc:	f004 fbe2 	bl	80204a4 <tcp_output>
  }
  return ret;
 801bce0:	f997 3013 	ldrsb.w	r3, [r7, #19]
}
 801bce4:	4618      	mov	r0, r3
 801bce6:	3728      	adds	r7, #40	@ 0x28
 801bce8:	46bd      	mov	sp, r7
 801bcea:	bd80      	pop	{r7, pc}
 801bcec:	0802ee3c 	.word	0x0802ee3c
 801bcf0:	0802f118 	.word	0x0802f118
 801bcf4:	0802ee80 	.word	0x0802ee80
 801bcf8:	0802f134 	.word	0x0802f134
 801bcfc:	0802f150 	.word	0x0802f150
 801bd00:	2402af5c 	.word	0x2402af5c
 801bd04:	2402af64 	.word	0x2402af64
 801bd08:	2402af6c 	.word	0x2402af6c

0801bd0c <tcp_slowtmr>:
 *
 * Automatically called from tcp_tmr().
 */
void
tcp_slowtmr(void)
{
 801bd0c:	b5b0      	push	{r4, r5, r7, lr}
 801bd0e:	b090      	sub	sp, #64	@ 0x40
 801bd10:	af04      	add	r7, sp, #16
  tcpwnd_size_t eff_wnd;
  u8_t pcb_remove;      /* flag if a PCB should be removed */
  u8_t pcb_reset;       /* flag if a RST should be sent when removing */
  err_t err;

  err = ERR_OK;
 801bd12:	2300      	movs	r3, #0
 801bd14:	f887 3025 	strb.w	r3, [r7, #37]	@ 0x25

  ++tcp_ticks;
 801bd18:	4b95      	ldr	r3, [pc, #596]	@ (801bf70 <tcp_slowtmr+0x264>)
 801bd1a:	681b      	ldr	r3, [r3, #0]
 801bd1c:	3301      	adds	r3, #1
 801bd1e:	4a94      	ldr	r2, [pc, #592]	@ (801bf70 <tcp_slowtmr+0x264>)
 801bd20:	6013      	str	r3, [r2, #0]
  ++tcp_timer_ctr;
 801bd22:	4b94      	ldr	r3, [pc, #592]	@ (801bf74 <tcp_slowtmr+0x268>)
 801bd24:	781b      	ldrb	r3, [r3, #0]
 801bd26:	3301      	adds	r3, #1
 801bd28:	b2da      	uxtb	r2, r3
 801bd2a:	4b92      	ldr	r3, [pc, #584]	@ (801bf74 <tcp_slowtmr+0x268>)
 801bd2c:	701a      	strb	r2, [r3, #0]
 801bd2e:	e000      	b.n	801bd32 <tcp_slowtmr+0x26>
        prev->polltmr = 0;
        LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: polling application\n"));
        tcp_active_pcbs_changed = 0;
        TCP_EVENT_POLL(prev, err);
        if (tcp_active_pcbs_changed) {
          goto tcp_slowtmr_start;
 801bd30:	bf00      	nop
  prev = NULL;
 801bd32:	2300      	movs	r3, #0
 801bd34:	62bb      	str	r3, [r7, #40]	@ 0x28
  pcb = tcp_active_pcbs;
 801bd36:	4b90      	ldr	r3, [pc, #576]	@ (801bf78 <tcp_slowtmr+0x26c>)
 801bd38:	681b      	ldr	r3, [r3, #0]
 801bd3a:	62fb      	str	r3, [r7, #44]	@ 0x2c
  while (pcb != NULL) {
 801bd3c:	e29d      	b.n	801c27a <tcp_slowtmr+0x56e>
    LWIP_ASSERT("tcp_slowtmr: active pcb->state != CLOSED\n", pcb->state != CLOSED);
 801bd3e:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801bd40:	7d1b      	ldrb	r3, [r3, #20]
 801bd42:	2b00      	cmp	r3, #0
 801bd44:	d106      	bne.n	801bd54 <tcp_slowtmr+0x48>
 801bd46:	4b8d      	ldr	r3, [pc, #564]	@ (801bf7c <tcp_slowtmr+0x270>)
 801bd48:	f240 42be 	movw	r2, #1214	@ 0x4be
 801bd4c:	498c      	ldr	r1, [pc, #560]	@ (801bf80 <tcp_slowtmr+0x274>)
 801bd4e:	488d      	ldr	r0, [pc, #564]	@ (801bf84 <tcp_slowtmr+0x278>)
 801bd50:	f00e fa34 	bl	802a1bc <iprintf>
    LWIP_ASSERT("tcp_slowtmr: active pcb->state != LISTEN\n", pcb->state != LISTEN);
 801bd54:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801bd56:	7d1b      	ldrb	r3, [r3, #20]
 801bd58:	2b01      	cmp	r3, #1
 801bd5a:	d106      	bne.n	801bd6a <tcp_slowtmr+0x5e>
 801bd5c:	4b87      	ldr	r3, [pc, #540]	@ (801bf7c <tcp_slowtmr+0x270>)
 801bd5e:	f240 42bf 	movw	r2, #1215	@ 0x4bf
 801bd62:	4989      	ldr	r1, [pc, #548]	@ (801bf88 <tcp_slowtmr+0x27c>)
 801bd64:	4887      	ldr	r0, [pc, #540]	@ (801bf84 <tcp_slowtmr+0x278>)
 801bd66:	f00e fa29 	bl	802a1bc <iprintf>
    LWIP_ASSERT("tcp_slowtmr: active pcb->state != TIME-WAIT\n", pcb->state != TIME_WAIT);
 801bd6a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801bd6c:	7d1b      	ldrb	r3, [r3, #20]
 801bd6e:	2b0a      	cmp	r3, #10
 801bd70:	d106      	bne.n	801bd80 <tcp_slowtmr+0x74>
 801bd72:	4b82      	ldr	r3, [pc, #520]	@ (801bf7c <tcp_slowtmr+0x270>)
 801bd74:	f44f 6298 	mov.w	r2, #1216	@ 0x4c0
 801bd78:	4984      	ldr	r1, [pc, #528]	@ (801bf8c <tcp_slowtmr+0x280>)
 801bd7a:	4882      	ldr	r0, [pc, #520]	@ (801bf84 <tcp_slowtmr+0x278>)
 801bd7c:	f00e fa1e 	bl	802a1bc <iprintf>
    if (pcb->last_timer == tcp_timer_ctr) {
 801bd80:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801bd82:	7f9a      	ldrb	r2, [r3, #30]
 801bd84:	4b7b      	ldr	r3, [pc, #492]	@ (801bf74 <tcp_slowtmr+0x268>)
 801bd86:	781b      	ldrb	r3, [r3, #0]
 801bd88:	429a      	cmp	r2, r3
 801bd8a:	d105      	bne.n	801bd98 <tcp_slowtmr+0x8c>
      prev = pcb;
 801bd8c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801bd8e:	62bb      	str	r3, [r7, #40]	@ 0x28
      pcb = pcb->next;
 801bd90:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801bd92:	68db      	ldr	r3, [r3, #12]
 801bd94:	62fb      	str	r3, [r7, #44]	@ 0x2c
      continue;
 801bd96:	e270      	b.n	801c27a <tcp_slowtmr+0x56e>
    pcb->last_timer = tcp_timer_ctr;
 801bd98:	4b76      	ldr	r3, [pc, #472]	@ (801bf74 <tcp_slowtmr+0x268>)
 801bd9a:	781a      	ldrb	r2, [r3, #0]
 801bd9c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801bd9e:	779a      	strb	r2, [r3, #30]
    pcb_remove = 0;
 801bda0:	2300      	movs	r3, #0
 801bda2:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
    pcb_reset = 0;
 801bda6:	2300      	movs	r3, #0
 801bda8:	f887 3026 	strb.w	r3, [r7, #38]	@ 0x26
    if (pcb->state == SYN_SENT && pcb->nrtx >= TCP_SYNMAXRTX) {
 801bdac:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801bdae:	7d1b      	ldrb	r3, [r3, #20]
 801bdb0:	2b02      	cmp	r3, #2
 801bdb2:	d10a      	bne.n	801bdca <tcp_slowtmr+0xbe>
 801bdb4:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801bdb6:	f893 3042 	ldrb.w	r3, [r3, #66]	@ 0x42
 801bdba:	2b05      	cmp	r3, #5
 801bdbc:	d905      	bls.n	801bdca <tcp_slowtmr+0xbe>
      ++pcb_remove;
 801bdbe:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 801bdc2:	3301      	adds	r3, #1
 801bdc4:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
      LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: max SYN retries reached\n"));
 801bdc8:	e11e      	b.n	801c008 <tcp_slowtmr+0x2fc>
    } else if (pcb->nrtx >= TCP_MAXRTX) {
 801bdca:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801bdcc:	f893 3042 	ldrb.w	r3, [r3, #66]	@ 0x42
 801bdd0:	2b0b      	cmp	r3, #11
 801bdd2:	d905      	bls.n	801bde0 <tcp_slowtmr+0xd4>
      ++pcb_remove;
 801bdd4:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 801bdd8:	3301      	adds	r3, #1
 801bdda:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
 801bdde:	e113      	b.n	801c008 <tcp_slowtmr+0x2fc>
      if (pcb->persist_backoff > 0) {
 801bde0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801bde2:	f893 3099 	ldrb.w	r3, [r3, #153]	@ 0x99
 801bde6:	2b00      	cmp	r3, #0
 801bde8:	d075      	beq.n	801bed6 <tcp_slowtmr+0x1ca>
        LWIP_ASSERT("tcp_slowtimr: persist ticking with in-flight data", pcb->unacked == NULL);
 801bdea:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801bdec:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801bdee:	2b00      	cmp	r3, #0
 801bdf0:	d006      	beq.n	801be00 <tcp_slowtmr+0xf4>
 801bdf2:	4b62      	ldr	r3, [pc, #392]	@ (801bf7c <tcp_slowtmr+0x270>)
 801bdf4:	f240 42d4 	movw	r2, #1236	@ 0x4d4
 801bdf8:	4965      	ldr	r1, [pc, #404]	@ (801bf90 <tcp_slowtmr+0x284>)
 801bdfa:	4862      	ldr	r0, [pc, #392]	@ (801bf84 <tcp_slowtmr+0x278>)
 801bdfc:	f00e f9de 	bl	802a1bc <iprintf>
        LWIP_ASSERT("tcp_slowtimr: persist ticking with empty send buffer", pcb->unsent != NULL);
 801be00:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801be02:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801be04:	2b00      	cmp	r3, #0
 801be06:	d106      	bne.n	801be16 <tcp_slowtmr+0x10a>
 801be08:	4b5c      	ldr	r3, [pc, #368]	@ (801bf7c <tcp_slowtmr+0x270>)
 801be0a:	f240 42d5 	movw	r2, #1237	@ 0x4d5
 801be0e:	4961      	ldr	r1, [pc, #388]	@ (801bf94 <tcp_slowtmr+0x288>)
 801be10:	485c      	ldr	r0, [pc, #368]	@ (801bf84 <tcp_slowtmr+0x278>)
 801be12:	f00e f9d3 	bl	802a1bc <iprintf>
        if (pcb->persist_probe >= TCP_MAXRTX) {
 801be16:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801be18:	f893 309a 	ldrb.w	r3, [r3, #154]	@ 0x9a
 801be1c:	2b0b      	cmp	r3, #11
 801be1e:	d905      	bls.n	801be2c <tcp_slowtmr+0x120>
          ++pcb_remove; /* max probes reached */
 801be20:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 801be24:	3301      	adds	r3, #1
 801be26:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
 801be2a:	e0ed      	b.n	801c008 <tcp_slowtmr+0x2fc>
          u8_t backoff_cnt = tcp_persist_backoff[pcb->persist_backoff - 1];
 801be2c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801be2e:	f893 3099 	ldrb.w	r3, [r3, #153]	@ 0x99
 801be32:	3b01      	subs	r3, #1
 801be34:	4a58      	ldr	r2, [pc, #352]	@ (801bf98 <tcp_slowtmr+0x28c>)
 801be36:	5cd3      	ldrb	r3, [r2, r3]
 801be38:	747b      	strb	r3, [r7, #17]
          if (pcb->persist_cnt < backoff_cnt) {
 801be3a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801be3c:	f893 3098 	ldrb.w	r3, [r3, #152]	@ 0x98
 801be40:	7c7a      	ldrb	r2, [r7, #17]
 801be42:	429a      	cmp	r2, r3
 801be44:	d907      	bls.n	801be56 <tcp_slowtmr+0x14a>
            pcb->persist_cnt++;
 801be46:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801be48:	f893 3098 	ldrb.w	r3, [r3, #152]	@ 0x98
 801be4c:	3301      	adds	r3, #1
 801be4e:	b2da      	uxtb	r2, r3
 801be50:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801be52:	f883 2098 	strb.w	r2, [r3, #152]	@ 0x98
          if (pcb->persist_cnt >= backoff_cnt) {
 801be56:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801be58:	f893 3098 	ldrb.w	r3, [r3, #152]	@ 0x98
 801be5c:	7c7a      	ldrb	r2, [r7, #17]
 801be5e:	429a      	cmp	r2, r3
 801be60:	f200 80d2 	bhi.w	801c008 <tcp_slowtmr+0x2fc>
            int next_slot = 1; /* increment timer to next slot */
 801be64:	2301      	movs	r3, #1
 801be66:	623b      	str	r3, [r7, #32]
            if (pcb->snd_wnd == 0) {
 801be68:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801be6a:	f8b3 3060 	ldrh.w	r3, [r3, #96]	@ 0x60
 801be6e:	2b00      	cmp	r3, #0
 801be70:	d108      	bne.n	801be84 <tcp_slowtmr+0x178>
              if (tcp_zero_window_probe(pcb) != ERR_OK) {
 801be72:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 801be74:	f005 f9cc 	bl	8021210 <tcp_zero_window_probe>
 801be78:	4603      	mov	r3, r0
 801be7a:	2b00      	cmp	r3, #0
 801be7c:	d014      	beq.n	801bea8 <tcp_slowtmr+0x19c>
                next_slot = 0; /* try probe again with current slot */
 801be7e:	2300      	movs	r3, #0
 801be80:	623b      	str	r3, [r7, #32]
 801be82:	e011      	b.n	801bea8 <tcp_slowtmr+0x19c>
              if (tcp_split_unsent_seg(pcb, (u16_t)pcb->snd_wnd) == ERR_OK) {
 801be84:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801be86:	f8b3 3060 	ldrh.w	r3, [r3, #96]	@ 0x60
 801be8a:	4619      	mov	r1, r3
 801be8c:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 801be8e:	f004 f87f 	bl	801ff90 <tcp_split_unsent_seg>
 801be92:	4603      	mov	r3, r0
 801be94:	2b00      	cmp	r3, #0
 801be96:	d107      	bne.n	801bea8 <tcp_slowtmr+0x19c>
                if (tcp_output(pcb) == ERR_OK) {
 801be98:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 801be9a:	f004 fb03 	bl	80204a4 <tcp_output>
 801be9e:	4603      	mov	r3, r0
 801bea0:	2b00      	cmp	r3, #0
 801bea2:	d101      	bne.n	801bea8 <tcp_slowtmr+0x19c>
                  next_slot = 0;
 801bea4:	2300      	movs	r3, #0
 801bea6:	623b      	str	r3, [r7, #32]
            if (next_slot) {
 801bea8:	6a3b      	ldr	r3, [r7, #32]
 801beaa:	2b00      	cmp	r3, #0
 801beac:	f000 80ac 	beq.w	801c008 <tcp_slowtmr+0x2fc>
              pcb->persist_cnt = 0;
 801beb0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801beb2:	2200      	movs	r2, #0
 801beb4:	f883 2098 	strb.w	r2, [r3, #152]	@ 0x98
              if (pcb->persist_backoff < sizeof(tcp_persist_backoff)) {
 801beb8:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801beba:	f893 3099 	ldrb.w	r3, [r3, #153]	@ 0x99
 801bebe:	2b06      	cmp	r3, #6
 801bec0:	f200 80a2 	bhi.w	801c008 <tcp_slowtmr+0x2fc>
                pcb->persist_backoff++;
 801bec4:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801bec6:	f893 3099 	ldrb.w	r3, [r3, #153]	@ 0x99
 801beca:	3301      	adds	r3, #1
 801becc:	b2da      	uxtb	r2, r3
 801bece:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801bed0:	f883 2099 	strb.w	r2, [r3, #153]	@ 0x99
 801bed4:	e098      	b.n	801c008 <tcp_slowtmr+0x2fc>
        if ((pcb->rtime >= 0) && (pcb->rtime < 0x7FFF)) {
 801bed6:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801bed8:	f9b3 3030 	ldrsh.w	r3, [r3, #48]	@ 0x30
 801bedc:	2b00      	cmp	r3, #0
 801bede:	db0f      	blt.n	801bf00 <tcp_slowtmr+0x1f4>
 801bee0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801bee2:	f9b3 3030 	ldrsh.w	r3, [r3, #48]	@ 0x30
 801bee6:	f647 72ff 	movw	r2, #32767	@ 0x7fff
 801beea:	4293      	cmp	r3, r2
 801beec:	d008      	beq.n	801bf00 <tcp_slowtmr+0x1f4>
          ++pcb->rtime;
 801beee:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801bef0:	f9b3 3030 	ldrsh.w	r3, [r3, #48]	@ 0x30
 801bef4:	b29b      	uxth	r3, r3
 801bef6:	3301      	adds	r3, #1
 801bef8:	b29b      	uxth	r3, r3
 801befa:	b21a      	sxth	r2, r3
 801befc:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801befe:	861a      	strh	r2, [r3, #48]	@ 0x30
        if (pcb->rtime >= pcb->rto) {
 801bf00:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801bf02:	f9b3 2030 	ldrsh.w	r2, [r3, #48]	@ 0x30
 801bf06:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801bf08:	f9b3 3040 	ldrsh.w	r3, [r3, #64]	@ 0x40
 801bf0c:	429a      	cmp	r2, r3
 801bf0e:	db7b      	blt.n	801c008 <tcp_slowtmr+0x2fc>
          if ((tcp_rexmit_rto_prepare(pcb) == ERR_OK) || ((pcb->unacked == NULL) && (pcb->unsent != NULL))) {
 801bf10:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 801bf12:	f004 fdbf 	bl	8020a94 <tcp_rexmit_rto_prepare>
 801bf16:	4603      	mov	r3, r0
 801bf18:	2b00      	cmp	r3, #0
 801bf1a:	d007      	beq.n	801bf2c <tcp_slowtmr+0x220>
 801bf1c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801bf1e:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801bf20:	2b00      	cmp	r3, #0
 801bf22:	d171      	bne.n	801c008 <tcp_slowtmr+0x2fc>
 801bf24:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801bf26:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801bf28:	2b00      	cmp	r3, #0
 801bf2a:	d06d      	beq.n	801c008 <tcp_slowtmr+0x2fc>
            if (pcb->state != SYN_SENT) {
 801bf2c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801bf2e:	7d1b      	ldrb	r3, [r3, #20]
 801bf30:	2b02      	cmp	r3, #2
 801bf32:	d03a      	beq.n	801bfaa <tcp_slowtmr+0x29e>
              u8_t backoff_idx = LWIP_MIN(pcb->nrtx, sizeof(tcp_backoff) - 1);
 801bf34:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801bf36:	f893 3042 	ldrb.w	r3, [r3, #66]	@ 0x42
 801bf3a:	2b0c      	cmp	r3, #12
 801bf3c:	bf28      	it	cs
 801bf3e:	230c      	movcs	r3, #12
 801bf40:	76fb      	strb	r3, [r7, #27]
              int calc_rto = ((pcb->sa >> 3) + pcb->sv) << tcp_backoff[backoff_idx];
 801bf42:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801bf44:	f9b3 303c 	ldrsh.w	r3, [r3, #60]	@ 0x3c
 801bf48:	10db      	asrs	r3, r3, #3
 801bf4a:	b21b      	sxth	r3, r3
 801bf4c:	461a      	mov	r2, r3
 801bf4e:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801bf50:	f9b3 303e 	ldrsh.w	r3, [r3, #62]	@ 0x3e
 801bf54:	4413      	add	r3, r2
 801bf56:	7efa      	ldrb	r2, [r7, #27]
 801bf58:	4910      	ldr	r1, [pc, #64]	@ (801bf9c <tcp_slowtmr+0x290>)
 801bf5a:	5c8a      	ldrb	r2, [r1, r2]
 801bf5c:	4093      	lsls	r3, r2
 801bf5e:	617b      	str	r3, [r7, #20]
              pcb->rto = (s16_t)LWIP_MIN(calc_rto, 0x7FFF);
 801bf60:	697b      	ldr	r3, [r7, #20]
 801bf62:	f647 72fe 	movw	r2, #32766	@ 0x7ffe
 801bf66:	4293      	cmp	r3, r2
 801bf68:	dc1a      	bgt.n	801bfa0 <tcp_slowtmr+0x294>
 801bf6a:	697b      	ldr	r3, [r7, #20]
 801bf6c:	b21a      	sxth	r2, r3
 801bf6e:	e019      	b.n	801bfa4 <tcp_slowtmr+0x298>
 801bf70:	2402af58 	.word	0x2402af58
 801bf74:	2402af6e 	.word	0x2402af6e
 801bf78:	2402af64 	.word	0x2402af64
 801bf7c:	0802ee3c 	.word	0x0802ee3c
 801bf80:	0802f180 	.word	0x0802f180
 801bf84:	0802ee80 	.word	0x0802ee80
 801bf88:	0802f1ac 	.word	0x0802f1ac
 801bf8c:	0802f1d8 	.word	0x0802f1d8
 801bf90:	0802f208 	.word	0x0802f208
 801bf94:	0802f23c 	.word	0x0802f23c
 801bf98:	080314b4 	.word	0x080314b4
 801bf9c:	080314a4 	.word	0x080314a4
 801bfa0:	f647 72ff 	movw	r2, #32767	@ 0x7fff
 801bfa4:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801bfa6:	f8a3 2040 	strh.w	r2, [r3, #64]	@ 0x40
            pcb->rtime = 0;
 801bfaa:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801bfac:	2200      	movs	r2, #0
 801bfae:	861a      	strh	r2, [r3, #48]	@ 0x30
            eff_wnd = LWIP_MIN(pcb->cwnd, pcb->snd_wnd);
 801bfb0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801bfb2:	f8b3 2060 	ldrh.w	r2, [r3, #96]	@ 0x60
 801bfb6:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801bfb8:	f8b3 3048 	ldrh.w	r3, [r3, #72]	@ 0x48
 801bfbc:	4293      	cmp	r3, r2
 801bfbe:	bf28      	it	cs
 801bfc0:	4613      	movcs	r3, r2
 801bfc2:	827b      	strh	r3, [r7, #18]
            pcb->ssthresh = eff_wnd >> 1;
 801bfc4:	8a7b      	ldrh	r3, [r7, #18]
 801bfc6:	085b      	lsrs	r3, r3, #1
 801bfc8:	b29a      	uxth	r2, r3
 801bfca:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801bfcc:	f8a3 204a 	strh.w	r2, [r3, #74]	@ 0x4a
            if (pcb->ssthresh < (tcpwnd_size_t)(pcb->mss << 1)) {
 801bfd0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801bfd2:	f8b3 204a 	ldrh.w	r2, [r3, #74]	@ 0x4a
 801bfd6:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801bfd8:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801bfda:	005b      	lsls	r3, r3, #1
 801bfdc:	b29b      	uxth	r3, r3
 801bfde:	429a      	cmp	r2, r3
 801bfe0:	d206      	bcs.n	801bff0 <tcp_slowtmr+0x2e4>
              pcb->ssthresh = (tcpwnd_size_t)(pcb->mss << 1);
 801bfe2:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801bfe4:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801bfe6:	005b      	lsls	r3, r3, #1
 801bfe8:	b29a      	uxth	r2, r3
 801bfea:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801bfec:	f8a3 204a 	strh.w	r2, [r3, #74]	@ 0x4a
            pcb->cwnd = pcb->mss;
 801bff0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801bff2:	8e5a      	ldrh	r2, [r3, #50]	@ 0x32
 801bff4:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801bff6:	f8a3 2048 	strh.w	r2, [r3, #72]	@ 0x48
            pcb->bytes_acked = 0;
 801bffa:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801bffc:	2200      	movs	r2, #0
 801bffe:	f8a3 206a 	strh.w	r2, [r3, #106]	@ 0x6a
            tcp_rexmit_rto_commit(pcb);
 801c002:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 801c004:	f004 fdc0 	bl	8020b88 <tcp_rexmit_rto_commit>
    if (pcb->state == FIN_WAIT_2) {
 801c008:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c00a:	7d1b      	ldrb	r3, [r3, #20]
 801c00c:	2b06      	cmp	r3, #6
 801c00e:	d111      	bne.n	801c034 <tcp_slowtmr+0x328>
      if (pcb->flags & TF_RXCLOSED) {
 801c010:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c012:	8b5b      	ldrh	r3, [r3, #26]
 801c014:	f003 0310 	and.w	r3, r3, #16
 801c018:	2b00      	cmp	r3, #0
 801c01a:	d00b      	beq.n	801c034 <tcp_slowtmr+0x328>
        if ((u32_t)(tcp_ticks - pcb->tmr) >
 801c01c:	4b9c      	ldr	r3, [pc, #624]	@ (801c290 <tcp_slowtmr+0x584>)
 801c01e:	681a      	ldr	r2, [r3, #0]
 801c020:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c022:	6a1b      	ldr	r3, [r3, #32]
 801c024:	1ad3      	subs	r3, r2, r3
 801c026:	2b28      	cmp	r3, #40	@ 0x28
 801c028:	d904      	bls.n	801c034 <tcp_slowtmr+0x328>
          ++pcb_remove;
 801c02a:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 801c02e:	3301      	adds	r3, #1
 801c030:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
    if (ip_get_option(pcb, SOF_KEEPALIVE) &&
 801c034:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c036:	7a5b      	ldrb	r3, [r3, #9]
 801c038:	f003 0308 	and.w	r3, r3, #8
 801c03c:	2b00      	cmp	r3, #0
 801c03e:	d04a      	beq.n	801c0d6 <tcp_slowtmr+0x3ca>
        ((pcb->state == ESTABLISHED) ||
 801c040:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c042:	7d1b      	ldrb	r3, [r3, #20]
    if (ip_get_option(pcb, SOF_KEEPALIVE) &&
 801c044:	2b04      	cmp	r3, #4
 801c046:	d003      	beq.n	801c050 <tcp_slowtmr+0x344>
         (pcb->state == CLOSE_WAIT))) {
 801c048:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c04a:	7d1b      	ldrb	r3, [r3, #20]
        ((pcb->state == ESTABLISHED) ||
 801c04c:	2b07      	cmp	r3, #7
 801c04e:	d142      	bne.n	801c0d6 <tcp_slowtmr+0x3ca>
      if ((u32_t)(tcp_ticks - pcb->tmr) >
 801c050:	4b8f      	ldr	r3, [pc, #572]	@ (801c290 <tcp_slowtmr+0x584>)
 801c052:	681a      	ldr	r2, [r3, #0]
 801c054:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c056:	6a1b      	ldr	r3, [r3, #32]
 801c058:	1ad2      	subs	r2, r2, r3
          (pcb->keep_idle + TCP_KEEP_DUR(pcb)) / TCP_SLOW_INTERVAL) {
 801c05a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c05c:	f8d3 1094 	ldr.w	r1, [r3, #148]	@ 0x94
 801c060:	4b8c      	ldr	r3, [pc, #560]	@ (801c294 <tcp_slowtmr+0x588>)
 801c062:	440b      	add	r3, r1
 801c064:	498c      	ldr	r1, [pc, #560]	@ (801c298 <tcp_slowtmr+0x58c>)
 801c066:	fba1 1303 	umull	r1, r3, r1, r3
 801c06a:	095b      	lsrs	r3, r3, #5
      if ((u32_t)(tcp_ticks - pcb->tmr) >
 801c06c:	429a      	cmp	r2, r3
 801c06e:	d90a      	bls.n	801c086 <tcp_slowtmr+0x37a>
        ++pcb_remove;
 801c070:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 801c074:	3301      	adds	r3, #1
 801c076:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
        ++pcb_reset;
 801c07a:	f897 3026 	ldrb.w	r3, [r7, #38]	@ 0x26
 801c07e:	3301      	adds	r3, #1
 801c080:	f887 3026 	strb.w	r3, [r7, #38]	@ 0x26
 801c084:	e027      	b.n	801c0d6 <tcp_slowtmr+0x3ca>
      } else if ((u32_t)(tcp_ticks - pcb->tmr) >
 801c086:	4b82      	ldr	r3, [pc, #520]	@ (801c290 <tcp_slowtmr+0x584>)
 801c088:	681a      	ldr	r2, [r3, #0]
 801c08a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c08c:	6a1b      	ldr	r3, [r3, #32]
 801c08e:	1ad2      	subs	r2, r2, r3
                 (pcb->keep_idle + pcb->keep_cnt_sent * TCP_KEEP_INTVL(pcb))
 801c090:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c092:	f8d3 1094 	ldr.w	r1, [r3, #148]	@ 0x94
 801c096:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c098:	f893 309b 	ldrb.w	r3, [r3, #155]	@ 0x9b
 801c09c:	4618      	mov	r0, r3
 801c09e:	4b7f      	ldr	r3, [pc, #508]	@ (801c29c <tcp_slowtmr+0x590>)
 801c0a0:	fb00 f303 	mul.w	r3, r0, r3
 801c0a4:	440b      	add	r3, r1
                 / TCP_SLOW_INTERVAL) {
 801c0a6:	497c      	ldr	r1, [pc, #496]	@ (801c298 <tcp_slowtmr+0x58c>)
 801c0a8:	fba1 1303 	umull	r1, r3, r1, r3
 801c0ac:	095b      	lsrs	r3, r3, #5
      } else if ((u32_t)(tcp_ticks - pcb->tmr) >
 801c0ae:	429a      	cmp	r2, r3
 801c0b0:	d911      	bls.n	801c0d6 <tcp_slowtmr+0x3ca>
        err = tcp_keepalive(pcb);
 801c0b2:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 801c0b4:	f005 f86c 	bl	8021190 <tcp_keepalive>
 801c0b8:	4603      	mov	r3, r0
 801c0ba:	f887 3025 	strb.w	r3, [r7, #37]	@ 0x25
        if (err == ERR_OK) {
 801c0be:	f997 3025 	ldrsb.w	r3, [r7, #37]	@ 0x25
 801c0c2:	2b00      	cmp	r3, #0
 801c0c4:	d107      	bne.n	801c0d6 <tcp_slowtmr+0x3ca>
          pcb->keep_cnt_sent++;
 801c0c6:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c0c8:	f893 309b 	ldrb.w	r3, [r3, #155]	@ 0x9b
 801c0cc:	3301      	adds	r3, #1
 801c0ce:	b2da      	uxtb	r2, r3
 801c0d0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c0d2:	f883 209b 	strb.w	r2, [r3, #155]	@ 0x9b
    if (pcb->ooseq != NULL &&
 801c0d6:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c0d8:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801c0da:	2b00      	cmp	r3, #0
 801c0dc:	d011      	beq.n	801c102 <tcp_slowtmr+0x3f6>
        (tcp_ticks - pcb->tmr >= (u32_t)pcb->rto * TCP_OOSEQ_TIMEOUT)) {
 801c0de:	4b6c      	ldr	r3, [pc, #432]	@ (801c290 <tcp_slowtmr+0x584>)
 801c0e0:	681a      	ldr	r2, [r3, #0]
 801c0e2:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c0e4:	6a1b      	ldr	r3, [r3, #32]
 801c0e6:	1ad2      	subs	r2, r2, r3
 801c0e8:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c0ea:	f9b3 3040 	ldrsh.w	r3, [r3, #64]	@ 0x40
 801c0ee:	4619      	mov	r1, r3
 801c0f0:	460b      	mov	r3, r1
 801c0f2:	005b      	lsls	r3, r3, #1
 801c0f4:	440b      	add	r3, r1
 801c0f6:	005b      	lsls	r3, r3, #1
    if (pcb->ooseq != NULL &&
 801c0f8:	429a      	cmp	r2, r3
 801c0fa:	d302      	bcc.n	801c102 <tcp_slowtmr+0x3f6>
      tcp_free_ooseq(pcb);
 801c0fc:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 801c0fe:	f000 feb7 	bl	801ce70 <tcp_free_ooseq>
    if (pcb->state == SYN_RCVD) {
 801c102:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c104:	7d1b      	ldrb	r3, [r3, #20]
 801c106:	2b03      	cmp	r3, #3
 801c108:	d10b      	bne.n	801c122 <tcp_slowtmr+0x416>
      if ((u32_t)(tcp_ticks - pcb->tmr) >
 801c10a:	4b61      	ldr	r3, [pc, #388]	@ (801c290 <tcp_slowtmr+0x584>)
 801c10c:	681a      	ldr	r2, [r3, #0]
 801c10e:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c110:	6a1b      	ldr	r3, [r3, #32]
 801c112:	1ad3      	subs	r3, r2, r3
 801c114:	2b28      	cmp	r3, #40	@ 0x28
 801c116:	d904      	bls.n	801c122 <tcp_slowtmr+0x416>
        ++pcb_remove;
 801c118:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 801c11c:	3301      	adds	r3, #1
 801c11e:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
    if (pcb->state == LAST_ACK) {
 801c122:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c124:	7d1b      	ldrb	r3, [r3, #20]
 801c126:	2b09      	cmp	r3, #9
 801c128:	d10b      	bne.n	801c142 <tcp_slowtmr+0x436>
      if ((u32_t)(tcp_ticks - pcb->tmr) > 2 * TCP_MSL / TCP_SLOW_INTERVAL) {
 801c12a:	4b59      	ldr	r3, [pc, #356]	@ (801c290 <tcp_slowtmr+0x584>)
 801c12c:	681a      	ldr	r2, [r3, #0]
 801c12e:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c130:	6a1b      	ldr	r3, [r3, #32]
 801c132:	1ad3      	subs	r3, r2, r3
 801c134:	2bf0      	cmp	r3, #240	@ 0xf0
 801c136:	d904      	bls.n	801c142 <tcp_slowtmr+0x436>
        ++pcb_remove;
 801c138:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 801c13c:	3301      	adds	r3, #1
 801c13e:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
    if (pcb_remove) {
 801c142:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 801c146:	2b00      	cmp	r3, #0
 801c148:	d060      	beq.n	801c20c <tcp_slowtmr+0x500>
      tcp_err_fn err_fn = pcb->errf;
 801c14a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c14c:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 801c150:	60fb      	str	r3, [r7, #12]
      tcp_pcb_purge(pcb);
 801c152:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 801c154:	f000 fcd8 	bl	801cb08 <tcp_pcb_purge>
      if (prev != NULL) {
 801c158:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801c15a:	2b00      	cmp	r3, #0
 801c15c:	d010      	beq.n	801c180 <tcp_slowtmr+0x474>
        LWIP_ASSERT("tcp_slowtmr: middle tcp != tcp_active_pcbs", pcb != tcp_active_pcbs);
 801c15e:	4b50      	ldr	r3, [pc, #320]	@ (801c2a0 <tcp_slowtmr+0x594>)
 801c160:	681b      	ldr	r3, [r3, #0]
 801c162:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 801c164:	429a      	cmp	r2, r3
 801c166:	d106      	bne.n	801c176 <tcp_slowtmr+0x46a>
 801c168:	4b4e      	ldr	r3, [pc, #312]	@ (801c2a4 <tcp_slowtmr+0x598>)
 801c16a:	f240 526d 	movw	r2, #1389	@ 0x56d
 801c16e:	494e      	ldr	r1, [pc, #312]	@ (801c2a8 <tcp_slowtmr+0x59c>)
 801c170:	484e      	ldr	r0, [pc, #312]	@ (801c2ac <tcp_slowtmr+0x5a0>)
 801c172:	f00e f823 	bl	802a1bc <iprintf>
        prev->next = pcb->next;
 801c176:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c178:	68da      	ldr	r2, [r3, #12]
 801c17a:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801c17c:	60da      	str	r2, [r3, #12]
 801c17e:	e00f      	b.n	801c1a0 <tcp_slowtmr+0x494>
        LWIP_ASSERT("tcp_slowtmr: first pcb == tcp_active_pcbs", tcp_active_pcbs == pcb);
 801c180:	4b47      	ldr	r3, [pc, #284]	@ (801c2a0 <tcp_slowtmr+0x594>)
 801c182:	681b      	ldr	r3, [r3, #0]
 801c184:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 801c186:	429a      	cmp	r2, r3
 801c188:	d006      	beq.n	801c198 <tcp_slowtmr+0x48c>
 801c18a:	4b46      	ldr	r3, [pc, #280]	@ (801c2a4 <tcp_slowtmr+0x598>)
 801c18c:	f240 5271 	movw	r2, #1393	@ 0x571
 801c190:	4947      	ldr	r1, [pc, #284]	@ (801c2b0 <tcp_slowtmr+0x5a4>)
 801c192:	4846      	ldr	r0, [pc, #280]	@ (801c2ac <tcp_slowtmr+0x5a0>)
 801c194:	f00e f812 	bl	802a1bc <iprintf>
        tcp_active_pcbs = pcb->next;
 801c198:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c19a:	68db      	ldr	r3, [r3, #12]
 801c19c:	4a40      	ldr	r2, [pc, #256]	@ (801c2a0 <tcp_slowtmr+0x594>)
 801c19e:	6013      	str	r3, [r2, #0]
      if (pcb_reset) {
 801c1a0:	f897 3026 	ldrb.w	r3, [r7, #38]	@ 0x26
 801c1a4:	2b00      	cmp	r3, #0
 801c1a6:	d013      	beq.n	801c1d0 <tcp_slowtmr+0x4c4>
        tcp_rst(pcb, pcb->snd_nxt, pcb->rcv_nxt, &pcb->local_ip, &pcb->remote_ip,
 801c1a8:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c1aa:	6d18      	ldr	r0, [r3, #80]	@ 0x50
 801c1ac:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c1ae:	6a5c      	ldr	r4, [r3, #36]	@ 0x24
 801c1b0:	6afd      	ldr	r5, [r7, #44]	@ 0x2c
 801c1b2:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c1b4:	3304      	adds	r3, #4
 801c1b6:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 801c1b8:	8ad2      	ldrh	r2, [r2, #22]
 801c1ba:	6af9      	ldr	r1, [r7, #44]	@ 0x2c
 801c1bc:	8b09      	ldrh	r1, [r1, #24]
 801c1be:	9102      	str	r1, [sp, #8]
 801c1c0:	9201      	str	r2, [sp, #4]
 801c1c2:	9300      	str	r3, [sp, #0]
 801c1c4:	462b      	mov	r3, r5
 801c1c6:	4622      	mov	r2, r4
 801c1c8:	4601      	mov	r1, r0
 801c1ca:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 801c1cc:	f004 ff2c 	bl	8021028 <tcp_rst>
      err_arg = pcb->callback_arg;
 801c1d0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c1d2:	691b      	ldr	r3, [r3, #16]
 801c1d4:	60bb      	str	r3, [r7, #8]
      last_state = pcb->state;
 801c1d6:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c1d8:	7d1b      	ldrb	r3, [r3, #20]
 801c1da:	71fb      	strb	r3, [r7, #7]
      pcb2 = pcb;
 801c1dc:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c1de:	603b      	str	r3, [r7, #0]
      pcb = pcb->next;
 801c1e0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c1e2:	68db      	ldr	r3, [r3, #12]
 801c1e4:	62fb      	str	r3, [r7, #44]	@ 0x2c
      tcp_free(pcb2);
 801c1e6:	6838      	ldr	r0, [r7, #0]
 801c1e8:	f7ff f82c 	bl	801b244 <tcp_free>
      tcp_active_pcbs_changed = 0;
 801c1ec:	4b31      	ldr	r3, [pc, #196]	@ (801c2b4 <tcp_slowtmr+0x5a8>)
 801c1ee:	2200      	movs	r2, #0
 801c1f0:	701a      	strb	r2, [r3, #0]
      TCP_EVENT_ERR(last_state, err_fn, err_arg, ERR_ABRT);
 801c1f2:	68fb      	ldr	r3, [r7, #12]
 801c1f4:	2b00      	cmp	r3, #0
 801c1f6:	d004      	beq.n	801c202 <tcp_slowtmr+0x4f6>
 801c1f8:	68fb      	ldr	r3, [r7, #12]
 801c1fa:	f06f 010c 	mvn.w	r1, #12
 801c1fe:	68b8      	ldr	r0, [r7, #8]
 801c200:	4798      	blx	r3
      if (tcp_active_pcbs_changed) {
 801c202:	4b2c      	ldr	r3, [pc, #176]	@ (801c2b4 <tcp_slowtmr+0x5a8>)
 801c204:	781b      	ldrb	r3, [r3, #0]
 801c206:	2b00      	cmp	r3, #0
 801c208:	d037      	beq.n	801c27a <tcp_slowtmr+0x56e>
        goto tcp_slowtmr_start;
 801c20a:	e592      	b.n	801bd32 <tcp_slowtmr+0x26>
      prev = pcb;
 801c20c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c20e:	62bb      	str	r3, [r7, #40]	@ 0x28
      pcb = pcb->next;
 801c210:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c212:	68db      	ldr	r3, [r3, #12]
 801c214:	62fb      	str	r3, [r7, #44]	@ 0x2c
      ++prev->polltmr;
 801c216:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801c218:	7f1b      	ldrb	r3, [r3, #28]
 801c21a:	3301      	adds	r3, #1
 801c21c:	b2da      	uxtb	r2, r3
 801c21e:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801c220:	771a      	strb	r2, [r3, #28]
      if (prev->polltmr >= prev->pollinterval) {
 801c222:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801c224:	7f1a      	ldrb	r2, [r3, #28]
 801c226:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801c228:	7f5b      	ldrb	r3, [r3, #29]
 801c22a:	429a      	cmp	r2, r3
 801c22c:	d325      	bcc.n	801c27a <tcp_slowtmr+0x56e>
        prev->polltmr = 0;
 801c22e:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801c230:	2200      	movs	r2, #0
 801c232:	771a      	strb	r2, [r3, #28]
        tcp_active_pcbs_changed = 0;
 801c234:	4b1f      	ldr	r3, [pc, #124]	@ (801c2b4 <tcp_slowtmr+0x5a8>)
 801c236:	2200      	movs	r2, #0
 801c238:	701a      	strb	r2, [r3, #0]
        TCP_EVENT_POLL(prev, err);
 801c23a:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801c23c:	f8d3 308c 	ldr.w	r3, [r3, #140]	@ 0x8c
 801c240:	2b00      	cmp	r3, #0
 801c242:	d00b      	beq.n	801c25c <tcp_slowtmr+0x550>
 801c244:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801c246:	f8d3 308c 	ldr.w	r3, [r3, #140]	@ 0x8c
 801c24a:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 801c24c:	6912      	ldr	r2, [r2, #16]
 801c24e:	6ab9      	ldr	r1, [r7, #40]	@ 0x28
 801c250:	4610      	mov	r0, r2
 801c252:	4798      	blx	r3
 801c254:	4603      	mov	r3, r0
 801c256:	f887 3025 	strb.w	r3, [r7, #37]	@ 0x25
 801c25a:	e002      	b.n	801c262 <tcp_slowtmr+0x556>
 801c25c:	2300      	movs	r3, #0
 801c25e:	f887 3025 	strb.w	r3, [r7, #37]	@ 0x25
        if (tcp_active_pcbs_changed) {
 801c262:	4b14      	ldr	r3, [pc, #80]	@ (801c2b4 <tcp_slowtmr+0x5a8>)
 801c264:	781b      	ldrb	r3, [r3, #0]
 801c266:	2b00      	cmp	r3, #0
 801c268:	f47f ad62 	bne.w	801bd30 <tcp_slowtmr+0x24>
        }
        /* if err == ERR_ABRT, 'prev' is already deallocated */
        if (err == ERR_OK) {
 801c26c:	f997 3025 	ldrsb.w	r3, [r7, #37]	@ 0x25
 801c270:	2b00      	cmp	r3, #0
 801c272:	d102      	bne.n	801c27a <tcp_slowtmr+0x56e>
          tcp_output(prev);
 801c274:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 801c276:	f004 f915 	bl	80204a4 <tcp_output>
  while (pcb != NULL) {
 801c27a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c27c:	2b00      	cmp	r3, #0
 801c27e:	f47f ad5e 	bne.w	801bd3e <tcp_slowtmr+0x32>
    }
  }


  /* Steps through all of the TIME-WAIT PCBs. */
  prev = NULL;
 801c282:	2300      	movs	r3, #0
 801c284:	62bb      	str	r3, [r7, #40]	@ 0x28
  pcb = tcp_tw_pcbs;
 801c286:	4b0c      	ldr	r3, [pc, #48]	@ (801c2b8 <tcp_slowtmr+0x5ac>)
 801c288:	681b      	ldr	r3, [r3, #0]
 801c28a:	62fb      	str	r3, [r7, #44]	@ 0x2c
  while (pcb != NULL) {
 801c28c:	e069      	b.n	801c362 <tcp_slowtmr+0x656>
 801c28e:	bf00      	nop
 801c290:	2402af58 	.word	0x2402af58
 801c294:	000a4cb8 	.word	0x000a4cb8
 801c298:	10624dd3 	.word	0x10624dd3
 801c29c:	000124f8 	.word	0x000124f8
 801c2a0:	2402af64 	.word	0x2402af64
 801c2a4:	0802ee3c 	.word	0x0802ee3c
 801c2a8:	0802f274 	.word	0x0802f274
 801c2ac:	0802ee80 	.word	0x0802ee80
 801c2b0:	0802f2a0 	.word	0x0802f2a0
 801c2b4:	2402af6c 	.word	0x2402af6c
 801c2b8:	2402af68 	.word	0x2402af68
    LWIP_ASSERT("tcp_slowtmr: TIME-WAIT pcb->state == TIME-WAIT", pcb->state == TIME_WAIT);
 801c2bc:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c2be:	7d1b      	ldrb	r3, [r3, #20]
 801c2c0:	2b0a      	cmp	r3, #10
 801c2c2:	d006      	beq.n	801c2d2 <tcp_slowtmr+0x5c6>
 801c2c4:	4b2b      	ldr	r3, [pc, #172]	@ (801c374 <tcp_slowtmr+0x668>)
 801c2c6:	f240 52a1 	movw	r2, #1441	@ 0x5a1
 801c2ca:	492b      	ldr	r1, [pc, #172]	@ (801c378 <tcp_slowtmr+0x66c>)
 801c2cc:	482b      	ldr	r0, [pc, #172]	@ (801c37c <tcp_slowtmr+0x670>)
 801c2ce:	f00d ff75 	bl	802a1bc <iprintf>
    pcb_remove = 0;
 801c2d2:	2300      	movs	r3, #0
 801c2d4:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27

    /* Check if this PCB has stayed long enough in TIME-WAIT */
    if ((u32_t)(tcp_ticks - pcb->tmr) > 2 * TCP_MSL / TCP_SLOW_INTERVAL) {
 801c2d8:	4b29      	ldr	r3, [pc, #164]	@ (801c380 <tcp_slowtmr+0x674>)
 801c2da:	681a      	ldr	r2, [r3, #0]
 801c2dc:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c2de:	6a1b      	ldr	r3, [r3, #32]
 801c2e0:	1ad3      	subs	r3, r2, r3
 801c2e2:	2bf0      	cmp	r3, #240	@ 0xf0
 801c2e4:	d904      	bls.n	801c2f0 <tcp_slowtmr+0x5e4>
      ++pcb_remove;
 801c2e6:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 801c2ea:	3301      	adds	r3, #1
 801c2ec:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
    }

    /* If the PCB should be removed, do it. */
    if (pcb_remove) {
 801c2f0:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 801c2f4:	2b00      	cmp	r3, #0
 801c2f6:	d02f      	beq.n	801c358 <tcp_slowtmr+0x64c>
      struct tcp_pcb *pcb2;
      tcp_pcb_purge(pcb);
 801c2f8:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 801c2fa:	f000 fc05 	bl	801cb08 <tcp_pcb_purge>
      /* Remove PCB from tcp_tw_pcbs list. */
      if (prev != NULL) {
 801c2fe:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801c300:	2b00      	cmp	r3, #0
 801c302:	d010      	beq.n	801c326 <tcp_slowtmr+0x61a>
        LWIP_ASSERT("tcp_slowtmr: middle tcp != tcp_tw_pcbs", pcb != tcp_tw_pcbs);
 801c304:	4b1f      	ldr	r3, [pc, #124]	@ (801c384 <tcp_slowtmr+0x678>)
 801c306:	681b      	ldr	r3, [r3, #0]
 801c308:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 801c30a:	429a      	cmp	r2, r3
 801c30c:	d106      	bne.n	801c31c <tcp_slowtmr+0x610>
 801c30e:	4b19      	ldr	r3, [pc, #100]	@ (801c374 <tcp_slowtmr+0x668>)
 801c310:	f240 52af 	movw	r2, #1455	@ 0x5af
 801c314:	491c      	ldr	r1, [pc, #112]	@ (801c388 <tcp_slowtmr+0x67c>)
 801c316:	4819      	ldr	r0, [pc, #100]	@ (801c37c <tcp_slowtmr+0x670>)
 801c318:	f00d ff50 	bl	802a1bc <iprintf>
        prev->next = pcb->next;
 801c31c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c31e:	68da      	ldr	r2, [r3, #12]
 801c320:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801c322:	60da      	str	r2, [r3, #12]
 801c324:	e00f      	b.n	801c346 <tcp_slowtmr+0x63a>
      } else {
        /* This PCB was the first. */
        LWIP_ASSERT("tcp_slowtmr: first pcb == tcp_tw_pcbs", tcp_tw_pcbs == pcb);
 801c326:	4b17      	ldr	r3, [pc, #92]	@ (801c384 <tcp_slowtmr+0x678>)
 801c328:	681b      	ldr	r3, [r3, #0]
 801c32a:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 801c32c:	429a      	cmp	r2, r3
 801c32e:	d006      	beq.n	801c33e <tcp_slowtmr+0x632>
 801c330:	4b10      	ldr	r3, [pc, #64]	@ (801c374 <tcp_slowtmr+0x668>)
 801c332:	f240 52b3 	movw	r2, #1459	@ 0x5b3
 801c336:	4915      	ldr	r1, [pc, #84]	@ (801c38c <tcp_slowtmr+0x680>)
 801c338:	4810      	ldr	r0, [pc, #64]	@ (801c37c <tcp_slowtmr+0x670>)
 801c33a:	f00d ff3f 	bl	802a1bc <iprintf>
        tcp_tw_pcbs = pcb->next;
 801c33e:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c340:	68db      	ldr	r3, [r3, #12]
 801c342:	4a10      	ldr	r2, [pc, #64]	@ (801c384 <tcp_slowtmr+0x678>)
 801c344:	6013      	str	r3, [r2, #0]
      }
      pcb2 = pcb;
 801c346:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c348:	61fb      	str	r3, [r7, #28]
      pcb = pcb->next;
 801c34a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c34c:	68db      	ldr	r3, [r3, #12]
 801c34e:	62fb      	str	r3, [r7, #44]	@ 0x2c
      tcp_free(pcb2);
 801c350:	69f8      	ldr	r0, [r7, #28]
 801c352:	f7fe ff77 	bl	801b244 <tcp_free>
 801c356:	e004      	b.n	801c362 <tcp_slowtmr+0x656>
    } else {
      prev = pcb;
 801c358:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c35a:	62bb      	str	r3, [r7, #40]	@ 0x28
      pcb = pcb->next;
 801c35c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c35e:	68db      	ldr	r3, [r3, #12]
 801c360:	62fb      	str	r3, [r7, #44]	@ 0x2c
  while (pcb != NULL) {
 801c362:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c364:	2b00      	cmp	r3, #0
 801c366:	d1a9      	bne.n	801c2bc <tcp_slowtmr+0x5b0>
    }
  }
}
 801c368:	bf00      	nop
 801c36a:	bf00      	nop
 801c36c:	3730      	adds	r7, #48	@ 0x30
 801c36e:	46bd      	mov	sp, r7
 801c370:	bdb0      	pop	{r4, r5, r7, pc}
 801c372:	bf00      	nop
 801c374:	0802ee3c 	.word	0x0802ee3c
 801c378:	0802f2cc 	.word	0x0802f2cc
 801c37c:	0802ee80 	.word	0x0802ee80
 801c380:	2402af58 	.word	0x2402af58
 801c384:	2402af68 	.word	0x2402af68
 801c388:	0802f2fc 	.word	0x0802f2fc
 801c38c:	0802f324 	.word	0x0802f324

0801c390 <tcp_fasttmr>:
 *
 * Automatically called from tcp_tmr().
 */
void
tcp_fasttmr(void)
{
 801c390:	b580      	push	{r7, lr}
 801c392:	b082      	sub	sp, #8
 801c394:	af00      	add	r7, sp, #0
  struct tcp_pcb *pcb;

  ++tcp_timer_ctr;
 801c396:	4b2d      	ldr	r3, [pc, #180]	@ (801c44c <tcp_fasttmr+0xbc>)
 801c398:	781b      	ldrb	r3, [r3, #0]
 801c39a:	3301      	adds	r3, #1
 801c39c:	b2da      	uxtb	r2, r3
 801c39e:	4b2b      	ldr	r3, [pc, #172]	@ (801c44c <tcp_fasttmr+0xbc>)
 801c3a0:	701a      	strb	r2, [r3, #0]

tcp_fasttmr_start:
  pcb = tcp_active_pcbs;
 801c3a2:	4b2b      	ldr	r3, [pc, #172]	@ (801c450 <tcp_fasttmr+0xc0>)
 801c3a4:	681b      	ldr	r3, [r3, #0]
 801c3a6:	607b      	str	r3, [r7, #4]

  while (pcb != NULL) {
 801c3a8:	e048      	b.n	801c43c <tcp_fasttmr+0xac>
    if (pcb->last_timer != tcp_timer_ctr) {
 801c3aa:	687b      	ldr	r3, [r7, #4]
 801c3ac:	7f9a      	ldrb	r2, [r3, #30]
 801c3ae:	4b27      	ldr	r3, [pc, #156]	@ (801c44c <tcp_fasttmr+0xbc>)
 801c3b0:	781b      	ldrb	r3, [r3, #0]
 801c3b2:	429a      	cmp	r2, r3
 801c3b4:	d03f      	beq.n	801c436 <tcp_fasttmr+0xa6>
      struct tcp_pcb *next;
      pcb->last_timer = tcp_timer_ctr;
 801c3b6:	4b25      	ldr	r3, [pc, #148]	@ (801c44c <tcp_fasttmr+0xbc>)
 801c3b8:	781a      	ldrb	r2, [r3, #0]
 801c3ba:	687b      	ldr	r3, [r7, #4]
 801c3bc:	779a      	strb	r2, [r3, #30]
      /* send delayed ACKs */
      if (pcb->flags & TF_ACK_DELAY) {
 801c3be:	687b      	ldr	r3, [r7, #4]
 801c3c0:	8b5b      	ldrh	r3, [r3, #26]
 801c3c2:	f003 0301 	and.w	r3, r3, #1
 801c3c6:	2b00      	cmp	r3, #0
 801c3c8:	d010      	beq.n	801c3ec <tcp_fasttmr+0x5c>
        LWIP_DEBUGF(TCP_DEBUG, ("tcp_fasttmr: delayed ACK\n"));
        tcp_ack_now(pcb);
 801c3ca:	687b      	ldr	r3, [r7, #4]
 801c3cc:	8b5b      	ldrh	r3, [r3, #26]
 801c3ce:	f043 0302 	orr.w	r3, r3, #2
 801c3d2:	b29a      	uxth	r2, r3
 801c3d4:	687b      	ldr	r3, [r7, #4]
 801c3d6:	835a      	strh	r2, [r3, #26]
        tcp_output(pcb);
 801c3d8:	6878      	ldr	r0, [r7, #4]
 801c3da:	f004 f863 	bl	80204a4 <tcp_output>
        tcp_clear_flags(pcb, TF_ACK_DELAY | TF_ACK_NOW);
 801c3de:	687b      	ldr	r3, [r7, #4]
 801c3e0:	8b5b      	ldrh	r3, [r3, #26]
 801c3e2:	f023 0303 	bic.w	r3, r3, #3
 801c3e6:	b29a      	uxth	r2, r3
 801c3e8:	687b      	ldr	r3, [r7, #4]
 801c3ea:	835a      	strh	r2, [r3, #26]
      }
      /* send pending FIN */
      if (pcb->flags & TF_CLOSEPEND) {
 801c3ec:	687b      	ldr	r3, [r7, #4]
 801c3ee:	8b5b      	ldrh	r3, [r3, #26]
 801c3f0:	f003 0308 	and.w	r3, r3, #8
 801c3f4:	2b00      	cmp	r3, #0
 801c3f6:	d009      	beq.n	801c40c <tcp_fasttmr+0x7c>
        LWIP_DEBUGF(TCP_DEBUG, ("tcp_fasttmr: pending FIN\n"));
        tcp_clear_flags(pcb, TF_CLOSEPEND);
 801c3f8:	687b      	ldr	r3, [r7, #4]
 801c3fa:	8b5b      	ldrh	r3, [r3, #26]
 801c3fc:	f023 0308 	bic.w	r3, r3, #8
 801c400:	b29a      	uxth	r2, r3
 801c402:	687b      	ldr	r3, [r7, #4]
 801c404:	835a      	strh	r2, [r3, #26]
        tcp_close_shutdown_fin(pcb);
 801c406:	6878      	ldr	r0, [r7, #4]
 801c408:	f7ff f8b0 	bl	801b56c <tcp_close_shutdown_fin>
      }

      next = pcb->next;
 801c40c:	687b      	ldr	r3, [r7, #4]
 801c40e:	68db      	ldr	r3, [r3, #12]
 801c410:	603b      	str	r3, [r7, #0]

      /* If there is data which was previously "refused" by upper layer */
      if (pcb->refused_data != NULL) {
 801c412:	687b      	ldr	r3, [r7, #4]
 801c414:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 801c416:	2b00      	cmp	r3, #0
 801c418:	d00a      	beq.n	801c430 <tcp_fasttmr+0xa0>
        tcp_active_pcbs_changed = 0;
 801c41a:	4b0e      	ldr	r3, [pc, #56]	@ (801c454 <tcp_fasttmr+0xc4>)
 801c41c:	2200      	movs	r2, #0
 801c41e:	701a      	strb	r2, [r3, #0]
        tcp_process_refused_data(pcb);
 801c420:	6878      	ldr	r0, [r7, #4]
 801c422:	f000 f819 	bl	801c458 <tcp_process_refused_data>
        if (tcp_active_pcbs_changed) {
 801c426:	4b0b      	ldr	r3, [pc, #44]	@ (801c454 <tcp_fasttmr+0xc4>)
 801c428:	781b      	ldrb	r3, [r3, #0]
 801c42a:	2b00      	cmp	r3, #0
 801c42c:	d000      	beq.n	801c430 <tcp_fasttmr+0xa0>
          /* application callback has changed the pcb list: restart the loop */
          goto tcp_fasttmr_start;
 801c42e:	e7b8      	b.n	801c3a2 <tcp_fasttmr+0x12>
        }
      }
      pcb = next;
 801c430:	683b      	ldr	r3, [r7, #0]
 801c432:	607b      	str	r3, [r7, #4]
 801c434:	e002      	b.n	801c43c <tcp_fasttmr+0xac>
    } else {
      pcb = pcb->next;
 801c436:	687b      	ldr	r3, [r7, #4]
 801c438:	68db      	ldr	r3, [r3, #12]
 801c43a:	607b      	str	r3, [r7, #4]
  while (pcb != NULL) {
 801c43c:	687b      	ldr	r3, [r7, #4]
 801c43e:	2b00      	cmp	r3, #0
 801c440:	d1b3      	bne.n	801c3aa <tcp_fasttmr+0x1a>
    }
  }
}
 801c442:	bf00      	nop
 801c444:	bf00      	nop
 801c446:	3708      	adds	r7, #8
 801c448:	46bd      	mov	sp, r7
 801c44a:	bd80      	pop	{r7, pc}
 801c44c:	2402af6e 	.word	0x2402af6e
 801c450:	2402af64 	.word	0x2402af64
 801c454:	2402af6c 	.word	0x2402af6c

0801c458 <tcp_process_refused_data>:
}

/** Pass pcb->refused_data to the recv callback */
err_t
tcp_process_refused_data(struct tcp_pcb *pcb)
{
 801c458:	b590      	push	{r4, r7, lr}
 801c45a:	b085      	sub	sp, #20
 801c45c:	af00      	add	r7, sp, #0
 801c45e:	6078      	str	r0, [r7, #4]
#if TCP_QUEUE_OOSEQ && LWIP_WND_SCALE
  struct pbuf *rest;
#endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */

  LWIP_ERROR("tcp_process_refused_data: invalid pcb", pcb != NULL, return ERR_ARG);
 801c460:	687b      	ldr	r3, [r7, #4]
 801c462:	2b00      	cmp	r3, #0
 801c464:	d109      	bne.n	801c47a <tcp_process_refused_data+0x22>
 801c466:	4b38      	ldr	r3, [pc, #224]	@ (801c548 <tcp_process_refused_data+0xf0>)
 801c468:	f240 6209 	movw	r2, #1545	@ 0x609
 801c46c:	4937      	ldr	r1, [pc, #220]	@ (801c54c <tcp_process_refused_data+0xf4>)
 801c46e:	4838      	ldr	r0, [pc, #224]	@ (801c550 <tcp_process_refused_data+0xf8>)
 801c470:	f00d fea4 	bl	802a1bc <iprintf>
 801c474:	f06f 030f 	mvn.w	r3, #15
 801c478:	e061      	b.n	801c53e <tcp_process_refused_data+0xe6>
#if TCP_QUEUE_OOSEQ && LWIP_WND_SCALE
  while (pcb->refused_data != NULL)
#endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */
  {
    err_t err;
    u8_t refused_flags = pcb->refused_data->flags;
 801c47a:	687b      	ldr	r3, [r7, #4]
 801c47c:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 801c47e:	7b5b      	ldrb	r3, [r3, #13]
 801c480:	73bb      	strb	r3, [r7, #14]
    /* set pcb->refused_data to NULL in case the callback frees it and then
       closes the pcb */
    struct pbuf *refused_data = pcb->refused_data;
 801c482:	687b      	ldr	r3, [r7, #4]
 801c484:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 801c486:	60bb      	str	r3, [r7, #8]
#if TCP_QUEUE_OOSEQ && LWIP_WND_SCALE
    pbuf_split_64k(refused_data, &rest);
    pcb->refused_data = rest;
#else /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */
    pcb->refused_data = NULL;
 801c488:	687b      	ldr	r3, [r7, #4]
 801c48a:	2200      	movs	r2, #0
 801c48c:	679a      	str	r2, [r3, #120]	@ 0x78
#endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */
    /* Notify again application with data previously received. */
    LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_input: notify kept packet\n"));
    TCP_EVENT_RECV(pcb, refused_data, ERR_OK, err);
 801c48e:	687b      	ldr	r3, [r7, #4]
 801c490:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 801c494:	2b00      	cmp	r3, #0
 801c496:	d00b      	beq.n	801c4b0 <tcp_process_refused_data+0x58>
 801c498:	687b      	ldr	r3, [r7, #4]
 801c49a:	f8d3 4084 	ldr.w	r4, [r3, #132]	@ 0x84
 801c49e:	687b      	ldr	r3, [r7, #4]
 801c4a0:	6918      	ldr	r0, [r3, #16]
 801c4a2:	2300      	movs	r3, #0
 801c4a4:	68ba      	ldr	r2, [r7, #8]
 801c4a6:	6879      	ldr	r1, [r7, #4]
 801c4a8:	47a0      	blx	r4
 801c4aa:	4603      	mov	r3, r0
 801c4ac:	73fb      	strb	r3, [r7, #15]
 801c4ae:	e007      	b.n	801c4c0 <tcp_process_refused_data+0x68>
 801c4b0:	2300      	movs	r3, #0
 801c4b2:	68ba      	ldr	r2, [r7, #8]
 801c4b4:	6879      	ldr	r1, [r7, #4]
 801c4b6:	2000      	movs	r0, #0
 801c4b8:	f000 f8a6 	bl	801c608 <tcp_recv_null>
 801c4bc:	4603      	mov	r3, r0
 801c4be:	73fb      	strb	r3, [r7, #15]
    if (err == ERR_OK) {
 801c4c0:	f997 300f 	ldrsb.w	r3, [r7, #15]
 801c4c4:	2b00      	cmp	r3, #0
 801c4c6:	d12b      	bne.n	801c520 <tcp_process_refused_data+0xc8>
      /* did refused_data include a FIN? */
      if ((refused_flags & PBUF_FLAG_TCP_FIN)
 801c4c8:	7bbb      	ldrb	r3, [r7, #14]
 801c4ca:	f003 0320 	and.w	r3, r3, #32
 801c4ce:	2b00      	cmp	r3, #0
 801c4d0:	d034      	beq.n	801c53c <tcp_process_refused_data+0xe4>
          && (rest == NULL)
#endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */
         ) {
        /* correct rcv_wnd as the application won't call tcp_recved()
           for the FIN's seqno */
        if (pcb->rcv_wnd != TCP_WND_MAX(pcb)) {
 801c4d2:	687b      	ldr	r3, [r7, #4]
 801c4d4:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 801c4d6:	f241 62d0 	movw	r2, #5840	@ 0x16d0
 801c4da:	4293      	cmp	r3, r2
 801c4dc:	d005      	beq.n	801c4ea <tcp_process_refused_data+0x92>
          pcb->rcv_wnd++;
 801c4de:	687b      	ldr	r3, [r7, #4]
 801c4e0:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 801c4e2:	3301      	adds	r3, #1
 801c4e4:	b29a      	uxth	r2, r3
 801c4e6:	687b      	ldr	r3, [r7, #4]
 801c4e8:	851a      	strh	r2, [r3, #40]	@ 0x28
        }
        TCP_EVENT_CLOSED(pcb, err);
 801c4ea:	687b      	ldr	r3, [r7, #4]
 801c4ec:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 801c4f0:	2b00      	cmp	r3, #0
 801c4f2:	d00b      	beq.n	801c50c <tcp_process_refused_data+0xb4>
 801c4f4:	687b      	ldr	r3, [r7, #4]
 801c4f6:	f8d3 4084 	ldr.w	r4, [r3, #132]	@ 0x84
 801c4fa:	687b      	ldr	r3, [r7, #4]
 801c4fc:	6918      	ldr	r0, [r3, #16]
 801c4fe:	2300      	movs	r3, #0
 801c500:	2200      	movs	r2, #0
 801c502:	6879      	ldr	r1, [r7, #4]
 801c504:	47a0      	blx	r4
 801c506:	4603      	mov	r3, r0
 801c508:	73fb      	strb	r3, [r7, #15]
 801c50a:	e001      	b.n	801c510 <tcp_process_refused_data+0xb8>
 801c50c:	2300      	movs	r3, #0
 801c50e:	73fb      	strb	r3, [r7, #15]
        if (err == ERR_ABRT) {
 801c510:	f997 300f 	ldrsb.w	r3, [r7, #15]
 801c514:	f113 0f0d 	cmn.w	r3, #13
 801c518:	d110      	bne.n	801c53c <tcp_process_refused_data+0xe4>
          return ERR_ABRT;
 801c51a:	f06f 030c 	mvn.w	r3, #12
 801c51e:	e00e      	b.n	801c53e <tcp_process_refused_data+0xe6>
        }
      }
    } else if (err == ERR_ABRT) {
 801c520:	f997 300f 	ldrsb.w	r3, [r7, #15]
 801c524:	f113 0f0d 	cmn.w	r3, #13
 801c528:	d102      	bne.n	801c530 <tcp_process_refused_data+0xd8>
      /* if err == ERR_ABRT, 'pcb' is already deallocated */
      /* Drop incoming packets because pcb is "full" (only if the incoming
         segment contains data). */
      LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_input: drop incoming packets, because pcb is \"full\"\n"));
      return ERR_ABRT;
 801c52a:	f06f 030c 	mvn.w	r3, #12
 801c52e:	e006      	b.n	801c53e <tcp_process_refused_data+0xe6>
#if TCP_QUEUE_OOSEQ && LWIP_WND_SCALE
      if (rest != NULL) {
        pbuf_cat(refused_data, rest);
      }
#endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */
      pcb->refused_data = refused_data;
 801c530:	687b      	ldr	r3, [r7, #4]
 801c532:	68ba      	ldr	r2, [r7, #8]
 801c534:	679a      	str	r2, [r3, #120]	@ 0x78
      return ERR_INPROGRESS;
 801c536:	f06f 0304 	mvn.w	r3, #4
 801c53a:	e000      	b.n	801c53e <tcp_process_refused_data+0xe6>
    }
  }
  return ERR_OK;
 801c53c:	2300      	movs	r3, #0
}
 801c53e:	4618      	mov	r0, r3
 801c540:	3714      	adds	r7, #20
 801c542:	46bd      	mov	sp, r7
 801c544:	bd90      	pop	{r4, r7, pc}
 801c546:	bf00      	nop
 801c548:	0802ee3c 	.word	0x0802ee3c
 801c54c:	0802f34c 	.word	0x0802f34c
 801c550:	0802ee80 	.word	0x0802ee80

0801c554 <tcp_segs_free>:
 *
 * @param seg tcp_seg list of TCP segments to free
 */
void
tcp_segs_free(struct tcp_seg *seg)
{
 801c554:	b580      	push	{r7, lr}
 801c556:	b084      	sub	sp, #16
 801c558:	af00      	add	r7, sp, #0
 801c55a:	6078      	str	r0, [r7, #4]
  while (seg != NULL) {
 801c55c:	e007      	b.n	801c56e <tcp_segs_free+0x1a>
    struct tcp_seg *next = seg->next;
 801c55e:	687b      	ldr	r3, [r7, #4]
 801c560:	681b      	ldr	r3, [r3, #0]
 801c562:	60fb      	str	r3, [r7, #12]
    tcp_seg_free(seg);
 801c564:	6878      	ldr	r0, [r7, #4]
 801c566:	f000 f80a 	bl	801c57e <tcp_seg_free>
    seg = next;
 801c56a:	68fb      	ldr	r3, [r7, #12]
 801c56c:	607b      	str	r3, [r7, #4]
  while (seg != NULL) {
 801c56e:	687b      	ldr	r3, [r7, #4]
 801c570:	2b00      	cmp	r3, #0
 801c572:	d1f4      	bne.n	801c55e <tcp_segs_free+0xa>
  }
}
 801c574:	bf00      	nop
 801c576:	bf00      	nop
 801c578:	3710      	adds	r7, #16
 801c57a:	46bd      	mov	sp, r7
 801c57c:	bd80      	pop	{r7, pc}

0801c57e <tcp_seg_free>:
 *
 * @param seg single tcp_seg to free
 */
void
tcp_seg_free(struct tcp_seg *seg)
{
 801c57e:	b580      	push	{r7, lr}
 801c580:	b082      	sub	sp, #8
 801c582:	af00      	add	r7, sp, #0
 801c584:	6078      	str	r0, [r7, #4]
  if (seg != NULL) {
 801c586:	687b      	ldr	r3, [r7, #4]
 801c588:	2b00      	cmp	r3, #0
 801c58a:	d00c      	beq.n	801c5a6 <tcp_seg_free+0x28>
    if (seg->p != NULL) {
 801c58c:	687b      	ldr	r3, [r7, #4]
 801c58e:	685b      	ldr	r3, [r3, #4]
 801c590:	2b00      	cmp	r3, #0
 801c592:	d004      	beq.n	801c59e <tcp_seg_free+0x20>
      pbuf_free(seg->p);
 801c594:	687b      	ldr	r3, [r7, #4]
 801c596:	685b      	ldr	r3, [r3, #4]
 801c598:	4618      	mov	r0, r3
 801c59a:	f7fe fb97 	bl	801accc <pbuf_free>
#if TCP_DEBUG
      seg->p = NULL;
#endif /* TCP_DEBUG */
    }
    memp_free(MEMP_TCP_SEG, seg);
 801c59e:	6879      	ldr	r1, [r7, #4]
 801c5a0:	2003      	movs	r0, #3
 801c5a2:	f7fd fca5 	bl	8019ef0 <memp_free>
  }
}
 801c5a6:	bf00      	nop
 801c5a8:	3708      	adds	r7, #8
 801c5aa:	46bd      	mov	sp, r7
 801c5ac:	bd80      	pop	{r7, pc}
	...

0801c5b0 <tcp_seg_copy>:
 * @param seg the old tcp_seg
 * @return a copy of seg
 */
struct tcp_seg *
tcp_seg_copy(struct tcp_seg *seg)
{
 801c5b0:	b580      	push	{r7, lr}
 801c5b2:	b084      	sub	sp, #16
 801c5b4:	af00      	add	r7, sp, #0
 801c5b6:	6078      	str	r0, [r7, #4]
  struct tcp_seg *cseg;

  LWIP_ASSERT("tcp_seg_copy: invalid seg", seg != NULL);
 801c5b8:	687b      	ldr	r3, [r7, #4]
 801c5ba:	2b00      	cmp	r3, #0
 801c5bc:	d106      	bne.n	801c5cc <tcp_seg_copy+0x1c>
 801c5be:	4b0f      	ldr	r3, [pc, #60]	@ (801c5fc <tcp_seg_copy+0x4c>)
 801c5c0:	f240 6282 	movw	r2, #1666	@ 0x682
 801c5c4:	490e      	ldr	r1, [pc, #56]	@ (801c600 <tcp_seg_copy+0x50>)
 801c5c6:	480f      	ldr	r0, [pc, #60]	@ (801c604 <tcp_seg_copy+0x54>)
 801c5c8:	f00d fdf8 	bl	802a1bc <iprintf>

  cseg = (struct tcp_seg *)memp_malloc(MEMP_TCP_SEG);
 801c5cc:	2003      	movs	r0, #3
 801c5ce:	f7fd fc19 	bl	8019e04 <memp_malloc>
 801c5d2:	60f8      	str	r0, [r7, #12]
  if (cseg == NULL) {
 801c5d4:	68fb      	ldr	r3, [r7, #12]
 801c5d6:	2b00      	cmp	r3, #0
 801c5d8:	d101      	bne.n	801c5de <tcp_seg_copy+0x2e>
    return NULL;
 801c5da:	2300      	movs	r3, #0
 801c5dc:	e00a      	b.n	801c5f4 <tcp_seg_copy+0x44>
  }
  SMEMCPY((u8_t *)cseg, (const u8_t *)seg, sizeof(struct tcp_seg));
 801c5de:	2214      	movs	r2, #20
 801c5e0:	6879      	ldr	r1, [r7, #4]
 801c5e2:	68f8      	ldr	r0, [r7, #12]
 801c5e4:	f00e f873 	bl	802a6ce <memcpy>
  pbuf_ref(cseg->p);
 801c5e8:	68fb      	ldr	r3, [r7, #12]
 801c5ea:	685b      	ldr	r3, [r3, #4]
 801c5ec:	4618      	mov	r0, r3
 801c5ee:	f7fe fc13 	bl	801ae18 <pbuf_ref>
  return cseg;
 801c5f2:	68fb      	ldr	r3, [r7, #12]
}
 801c5f4:	4618      	mov	r0, r3
 801c5f6:	3710      	adds	r7, #16
 801c5f8:	46bd      	mov	sp, r7
 801c5fa:	bd80      	pop	{r7, pc}
 801c5fc:	0802ee3c 	.word	0x0802ee3c
 801c600:	0802f390 	.word	0x0802f390
 801c604:	0802ee80 	.word	0x0802ee80

0801c608 <tcp_recv_null>:
 * Default receive callback that is called if the user didn't register
 * a recv callback for the pcb.
 */
err_t
tcp_recv_null(void *arg, struct tcp_pcb *pcb, struct pbuf *p, err_t err)
{
 801c608:	b580      	push	{r7, lr}
 801c60a:	b084      	sub	sp, #16
 801c60c:	af00      	add	r7, sp, #0
 801c60e:	60f8      	str	r0, [r7, #12]
 801c610:	60b9      	str	r1, [r7, #8]
 801c612:	607a      	str	r2, [r7, #4]
 801c614:	70fb      	strb	r3, [r7, #3]
  LWIP_UNUSED_ARG(arg);

  LWIP_ERROR("tcp_recv_null: invalid pcb", pcb != NULL, return ERR_ARG);
 801c616:	68bb      	ldr	r3, [r7, #8]
 801c618:	2b00      	cmp	r3, #0
 801c61a:	d109      	bne.n	801c630 <tcp_recv_null+0x28>
 801c61c:	4b12      	ldr	r3, [pc, #72]	@ (801c668 <tcp_recv_null+0x60>)
 801c61e:	f44f 62d3 	mov.w	r2, #1688	@ 0x698
 801c622:	4912      	ldr	r1, [pc, #72]	@ (801c66c <tcp_recv_null+0x64>)
 801c624:	4812      	ldr	r0, [pc, #72]	@ (801c670 <tcp_recv_null+0x68>)
 801c626:	f00d fdc9 	bl	802a1bc <iprintf>
 801c62a:	f06f 030f 	mvn.w	r3, #15
 801c62e:	e016      	b.n	801c65e <tcp_recv_null+0x56>

  if (p != NULL) {
 801c630:	687b      	ldr	r3, [r7, #4]
 801c632:	2b00      	cmp	r3, #0
 801c634:	d009      	beq.n	801c64a <tcp_recv_null+0x42>
    tcp_recved(pcb, p->tot_len);
 801c636:	687b      	ldr	r3, [r7, #4]
 801c638:	891b      	ldrh	r3, [r3, #8]
 801c63a:	4619      	mov	r1, r3
 801c63c:	68b8      	ldr	r0, [r7, #8]
 801c63e:	f7ff f9b1 	bl	801b9a4 <tcp_recved>
    pbuf_free(p);
 801c642:	6878      	ldr	r0, [r7, #4]
 801c644:	f7fe fb42 	bl	801accc <pbuf_free>
 801c648:	e008      	b.n	801c65c <tcp_recv_null+0x54>
  } else if (err == ERR_OK) {
 801c64a:	f997 3003 	ldrsb.w	r3, [r7, #3]
 801c64e:	2b00      	cmp	r3, #0
 801c650:	d104      	bne.n	801c65c <tcp_recv_null+0x54>
    return tcp_close(pcb);
 801c652:	68b8      	ldr	r0, [r7, #8]
 801c654:	f7fe fff4 	bl	801b640 <tcp_close>
 801c658:	4603      	mov	r3, r0
 801c65a:	e000      	b.n	801c65e <tcp_recv_null+0x56>
  }
  return ERR_OK;
 801c65c:	2300      	movs	r3, #0
}
 801c65e:	4618      	mov	r0, r3
 801c660:	3710      	adds	r7, #16
 801c662:	46bd      	mov	sp, r7
 801c664:	bd80      	pop	{r7, pc}
 801c666:	bf00      	nop
 801c668:	0802ee3c 	.word	0x0802ee3c
 801c66c:	0802f3ac 	.word	0x0802f3ac
 801c670:	0802ee80 	.word	0x0802ee80

0801c674 <tcp_kill_prio>:
 *
 * @param prio minimum priority
 */
static void
tcp_kill_prio(u8_t prio)
{
 801c674:	b580      	push	{r7, lr}
 801c676:	b086      	sub	sp, #24
 801c678:	af00      	add	r7, sp, #0
 801c67a:	4603      	mov	r3, r0
 801c67c:	71fb      	strb	r3, [r7, #7]
  struct tcp_pcb *pcb, *inactive;
  u32_t inactivity;
  u8_t mprio;

  mprio = LWIP_MIN(TCP_PRIO_MAX, prio);
 801c67e:	f997 3007 	ldrsb.w	r3, [r7, #7]
 801c682:	2b00      	cmp	r3, #0
 801c684:	db01      	blt.n	801c68a <tcp_kill_prio+0x16>
 801c686:	79fb      	ldrb	r3, [r7, #7]
 801c688:	e000      	b.n	801c68c <tcp_kill_prio+0x18>
 801c68a:	237f      	movs	r3, #127	@ 0x7f
 801c68c:	72fb      	strb	r3, [r7, #11]

  /* We want to kill connections with a lower prio, so bail out if 
   * supplied prio is 0 - there can never be a lower prio
   */
  if (mprio == 0) {
 801c68e:	7afb      	ldrb	r3, [r7, #11]
 801c690:	2b00      	cmp	r3, #0
 801c692:	d034      	beq.n	801c6fe <tcp_kill_prio+0x8a>
  /* We only want kill connections with a lower prio, so decrement prio by one 
   * and start searching for oldest connection with same or lower priority than mprio.
   * We want to find the connections with the lowest possible prio, and among
   * these the one with the longest inactivity time.
   */
  mprio--;
 801c694:	7afb      	ldrb	r3, [r7, #11]
 801c696:	3b01      	subs	r3, #1
 801c698:	72fb      	strb	r3, [r7, #11]

  inactivity = 0;
 801c69a:	2300      	movs	r3, #0
 801c69c:	60fb      	str	r3, [r7, #12]
  inactive = NULL;
 801c69e:	2300      	movs	r3, #0
 801c6a0:	613b      	str	r3, [r7, #16]
  for (pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) {
 801c6a2:	4b19      	ldr	r3, [pc, #100]	@ (801c708 <tcp_kill_prio+0x94>)
 801c6a4:	681b      	ldr	r3, [r3, #0]
 801c6a6:	617b      	str	r3, [r7, #20]
 801c6a8:	e01f      	b.n	801c6ea <tcp_kill_prio+0x76>
        /* lower prio is always a kill candidate */
    if ((pcb->prio < mprio) ||
 801c6aa:	697b      	ldr	r3, [r7, #20]
 801c6ac:	7d5b      	ldrb	r3, [r3, #21]
 801c6ae:	7afa      	ldrb	r2, [r7, #11]
 801c6b0:	429a      	cmp	r2, r3
 801c6b2:	d80c      	bhi.n	801c6ce <tcp_kill_prio+0x5a>
        /* longer inactivity is also a kill candidate */
        ((pcb->prio == mprio) && ((u32_t)(tcp_ticks - pcb->tmr) >= inactivity))) {
 801c6b4:	697b      	ldr	r3, [r7, #20]
 801c6b6:	7d5b      	ldrb	r3, [r3, #21]
    if ((pcb->prio < mprio) ||
 801c6b8:	7afa      	ldrb	r2, [r7, #11]
 801c6ba:	429a      	cmp	r2, r3
 801c6bc:	d112      	bne.n	801c6e4 <tcp_kill_prio+0x70>
        ((pcb->prio == mprio) && ((u32_t)(tcp_ticks - pcb->tmr) >= inactivity))) {
 801c6be:	4b13      	ldr	r3, [pc, #76]	@ (801c70c <tcp_kill_prio+0x98>)
 801c6c0:	681a      	ldr	r2, [r3, #0]
 801c6c2:	697b      	ldr	r3, [r7, #20]
 801c6c4:	6a1b      	ldr	r3, [r3, #32]
 801c6c6:	1ad3      	subs	r3, r2, r3
 801c6c8:	68fa      	ldr	r2, [r7, #12]
 801c6ca:	429a      	cmp	r2, r3
 801c6cc:	d80a      	bhi.n	801c6e4 <tcp_kill_prio+0x70>
      inactivity = tcp_ticks - pcb->tmr;
 801c6ce:	4b0f      	ldr	r3, [pc, #60]	@ (801c70c <tcp_kill_prio+0x98>)
 801c6d0:	681a      	ldr	r2, [r3, #0]
 801c6d2:	697b      	ldr	r3, [r7, #20]
 801c6d4:	6a1b      	ldr	r3, [r3, #32]
 801c6d6:	1ad3      	subs	r3, r2, r3
 801c6d8:	60fb      	str	r3, [r7, #12]
      inactive   = pcb;
 801c6da:	697b      	ldr	r3, [r7, #20]
 801c6dc:	613b      	str	r3, [r7, #16]
      mprio      = pcb->prio;
 801c6de:	697b      	ldr	r3, [r7, #20]
 801c6e0:	7d5b      	ldrb	r3, [r3, #21]
 801c6e2:	72fb      	strb	r3, [r7, #11]
  for (pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) {
 801c6e4:	697b      	ldr	r3, [r7, #20]
 801c6e6:	68db      	ldr	r3, [r3, #12]
 801c6e8:	617b      	str	r3, [r7, #20]
 801c6ea:	697b      	ldr	r3, [r7, #20]
 801c6ec:	2b00      	cmp	r3, #0
 801c6ee:	d1dc      	bne.n	801c6aa <tcp_kill_prio+0x36>
    }
  }
  if (inactive != NULL) {
 801c6f0:	693b      	ldr	r3, [r7, #16]
 801c6f2:	2b00      	cmp	r3, #0
 801c6f4:	d004      	beq.n	801c700 <tcp_kill_prio+0x8c>
    LWIP_DEBUGF(TCP_DEBUG, ("tcp_kill_prio: killing oldest PCB %p (%"S32_F")\n",
                            (void *)inactive, inactivity));
    tcp_abort(inactive);
 801c6f6:	6938      	ldr	r0, [r7, #16]
 801c6f8:	f7ff f8ee 	bl	801b8d8 <tcp_abort>
 801c6fc:	e000      	b.n	801c700 <tcp_kill_prio+0x8c>
    return;
 801c6fe:	bf00      	nop
  }
}
 801c700:	3718      	adds	r7, #24
 801c702:	46bd      	mov	sp, r7
 801c704:	bd80      	pop	{r7, pc}
 801c706:	bf00      	nop
 801c708:	2402af64 	.word	0x2402af64
 801c70c:	2402af58 	.word	0x2402af58

0801c710 <tcp_kill_state>:
 * Kills the oldest connection that is in specific state.
 * Called from tcp_alloc() for LAST_ACK and CLOSING if no more connections are available.
 */
static void
tcp_kill_state(enum tcp_state state)
{
 801c710:	b580      	push	{r7, lr}
 801c712:	b086      	sub	sp, #24
 801c714:	af00      	add	r7, sp, #0
 801c716:	4603      	mov	r3, r0
 801c718:	71fb      	strb	r3, [r7, #7]
  struct tcp_pcb *pcb, *inactive;
  u32_t inactivity;

  LWIP_ASSERT("invalid state", (state == CLOSING) || (state == LAST_ACK));
 801c71a:	79fb      	ldrb	r3, [r7, #7]
 801c71c:	2b08      	cmp	r3, #8
 801c71e:	d009      	beq.n	801c734 <tcp_kill_state+0x24>
 801c720:	79fb      	ldrb	r3, [r7, #7]
 801c722:	2b09      	cmp	r3, #9
 801c724:	d006      	beq.n	801c734 <tcp_kill_state+0x24>
 801c726:	4b1a      	ldr	r3, [pc, #104]	@ (801c790 <tcp_kill_state+0x80>)
 801c728:	f240 62dd 	movw	r2, #1757	@ 0x6dd
 801c72c:	4919      	ldr	r1, [pc, #100]	@ (801c794 <tcp_kill_state+0x84>)
 801c72e:	481a      	ldr	r0, [pc, #104]	@ (801c798 <tcp_kill_state+0x88>)
 801c730:	f00d fd44 	bl	802a1bc <iprintf>

  inactivity = 0;
 801c734:	2300      	movs	r3, #0
 801c736:	60fb      	str	r3, [r7, #12]
  inactive = NULL;
 801c738:	2300      	movs	r3, #0
 801c73a:	613b      	str	r3, [r7, #16]
  /* Go through the list of active pcbs and get the oldest pcb that is in state
     CLOSING/LAST_ACK. */
  for (pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) {
 801c73c:	4b17      	ldr	r3, [pc, #92]	@ (801c79c <tcp_kill_state+0x8c>)
 801c73e:	681b      	ldr	r3, [r3, #0]
 801c740:	617b      	str	r3, [r7, #20]
 801c742:	e017      	b.n	801c774 <tcp_kill_state+0x64>
    if (pcb->state == state) {
 801c744:	697b      	ldr	r3, [r7, #20]
 801c746:	7d1b      	ldrb	r3, [r3, #20]
 801c748:	79fa      	ldrb	r2, [r7, #7]
 801c74a:	429a      	cmp	r2, r3
 801c74c:	d10f      	bne.n	801c76e <tcp_kill_state+0x5e>
      if ((u32_t)(tcp_ticks - pcb->tmr) >= inactivity) {
 801c74e:	4b14      	ldr	r3, [pc, #80]	@ (801c7a0 <tcp_kill_state+0x90>)
 801c750:	681a      	ldr	r2, [r3, #0]
 801c752:	697b      	ldr	r3, [r7, #20]
 801c754:	6a1b      	ldr	r3, [r3, #32]
 801c756:	1ad3      	subs	r3, r2, r3
 801c758:	68fa      	ldr	r2, [r7, #12]
 801c75a:	429a      	cmp	r2, r3
 801c75c:	d807      	bhi.n	801c76e <tcp_kill_state+0x5e>
        inactivity = tcp_ticks - pcb->tmr;
 801c75e:	4b10      	ldr	r3, [pc, #64]	@ (801c7a0 <tcp_kill_state+0x90>)
 801c760:	681a      	ldr	r2, [r3, #0]
 801c762:	697b      	ldr	r3, [r7, #20]
 801c764:	6a1b      	ldr	r3, [r3, #32]
 801c766:	1ad3      	subs	r3, r2, r3
 801c768:	60fb      	str	r3, [r7, #12]
        inactive = pcb;
 801c76a:	697b      	ldr	r3, [r7, #20]
 801c76c:	613b      	str	r3, [r7, #16]
  for (pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) {
 801c76e:	697b      	ldr	r3, [r7, #20]
 801c770:	68db      	ldr	r3, [r3, #12]
 801c772:	617b      	str	r3, [r7, #20]
 801c774:	697b      	ldr	r3, [r7, #20]
 801c776:	2b00      	cmp	r3, #0
 801c778:	d1e4      	bne.n	801c744 <tcp_kill_state+0x34>
      }
    }
  }
  if (inactive != NULL) {
 801c77a:	693b      	ldr	r3, [r7, #16]
 801c77c:	2b00      	cmp	r3, #0
 801c77e:	d003      	beq.n	801c788 <tcp_kill_state+0x78>
    LWIP_DEBUGF(TCP_DEBUG, ("tcp_kill_closing: killing oldest %s PCB %p (%"S32_F")\n",
                            tcp_state_str[state], (void *)inactive, inactivity));
    /* Don't send a RST, since no data is lost. */
    tcp_abandon(inactive, 0);
 801c780:	2100      	movs	r1, #0
 801c782:	6938      	ldr	r0, [r7, #16]
 801c784:	f7fe ffe8 	bl	801b758 <tcp_abandon>
  }
}
 801c788:	bf00      	nop
 801c78a:	3718      	adds	r7, #24
 801c78c:	46bd      	mov	sp, r7
 801c78e:	bd80      	pop	{r7, pc}
 801c790:	0802ee3c 	.word	0x0802ee3c
 801c794:	0802f3c8 	.word	0x0802f3c8
 801c798:	0802ee80 	.word	0x0802ee80
 801c79c:	2402af64 	.word	0x2402af64
 801c7a0:	2402af58 	.word	0x2402af58

0801c7a4 <tcp_kill_timewait>:
 * Kills the oldest connection that is in TIME_WAIT state.
 * Called from tcp_alloc() if no more connections are available.
 */
static void
tcp_kill_timewait(void)
{
 801c7a4:	b580      	push	{r7, lr}
 801c7a6:	b084      	sub	sp, #16
 801c7a8:	af00      	add	r7, sp, #0
  struct tcp_pcb *pcb, *inactive;
  u32_t inactivity;

  inactivity = 0;
 801c7aa:	2300      	movs	r3, #0
 801c7ac:	607b      	str	r3, [r7, #4]
  inactive = NULL;
 801c7ae:	2300      	movs	r3, #0
 801c7b0:	60bb      	str	r3, [r7, #8]
  /* Go through the list of TIME_WAIT pcbs and get the oldest pcb. */
  for (pcb = tcp_tw_pcbs; pcb != NULL; pcb = pcb->next) {
 801c7b2:	4b12      	ldr	r3, [pc, #72]	@ (801c7fc <tcp_kill_timewait+0x58>)
 801c7b4:	681b      	ldr	r3, [r3, #0]
 801c7b6:	60fb      	str	r3, [r7, #12]
 801c7b8:	e012      	b.n	801c7e0 <tcp_kill_timewait+0x3c>
    if ((u32_t)(tcp_ticks - pcb->tmr) >= inactivity) {
 801c7ba:	4b11      	ldr	r3, [pc, #68]	@ (801c800 <tcp_kill_timewait+0x5c>)
 801c7bc:	681a      	ldr	r2, [r3, #0]
 801c7be:	68fb      	ldr	r3, [r7, #12]
 801c7c0:	6a1b      	ldr	r3, [r3, #32]
 801c7c2:	1ad3      	subs	r3, r2, r3
 801c7c4:	687a      	ldr	r2, [r7, #4]
 801c7c6:	429a      	cmp	r2, r3
 801c7c8:	d807      	bhi.n	801c7da <tcp_kill_timewait+0x36>
      inactivity = tcp_ticks - pcb->tmr;
 801c7ca:	4b0d      	ldr	r3, [pc, #52]	@ (801c800 <tcp_kill_timewait+0x5c>)
 801c7cc:	681a      	ldr	r2, [r3, #0]
 801c7ce:	68fb      	ldr	r3, [r7, #12]
 801c7d0:	6a1b      	ldr	r3, [r3, #32]
 801c7d2:	1ad3      	subs	r3, r2, r3
 801c7d4:	607b      	str	r3, [r7, #4]
      inactive = pcb;
 801c7d6:	68fb      	ldr	r3, [r7, #12]
 801c7d8:	60bb      	str	r3, [r7, #8]
  for (pcb = tcp_tw_pcbs; pcb != NULL; pcb = pcb->next) {
 801c7da:	68fb      	ldr	r3, [r7, #12]
 801c7dc:	68db      	ldr	r3, [r3, #12]
 801c7de:	60fb      	str	r3, [r7, #12]
 801c7e0:	68fb      	ldr	r3, [r7, #12]
 801c7e2:	2b00      	cmp	r3, #0
 801c7e4:	d1e9      	bne.n	801c7ba <tcp_kill_timewait+0x16>
    }
  }
  if (inactive != NULL) {
 801c7e6:	68bb      	ldr	r3, [r7, #8]
 801c7e8:	2b00      	cmp	r3, #0
 801c7ea:	d002      	beq.n	801c7f2 <tcp_kill_timewait+0x4e>
    LWIP_DEBUGF(TCP_DEBUG, ("tcp_kill_timewait: killing oldest TIME-WAIT PCB %p (%"S32_F")\n",
                            (void *)inactive, inactivity));
    tcp_abort(inactive);
 801c7ec:	68b8      	ldr	r0, [r7, #8]
 801c7ee:	f7ff f873 	bl	801b8d8 <tcp_abort>
  }
}
 801c7f2:	bf00      	nop
 801c7f4:	3710      	adds	r7, #16
 801c7f6:	46bd      	mov	sp, r7
 801c7f8:	bd80      	pop	{r7, pc}
 801c7fa:	bf00      	nop
 801c7fc:	2402af68 	.word	0x2402af68
 801c800:	2402af58 	.word	0x2402af58

0801c804 <tcp_handle_closepend>:
 * now send the FIN (which failed before), the pcb might be in a state that is
 * OK for us to now free it.
 */
static void
tcp_handle_closepend(void)
{
 801c804:	b580      	push	{r7, lr}
 801c806:	b082      	sub	sp, #8
 801c808:	af00      	add	r7, sp, #0
  struct tcp_pcb *pcb = tcp_active_pcbs;
 801c80a:	4b10      	ldr	r3, [pc, #64]	@ (801c84c <tcp_handle_closepend+0x48>)
 801c80c:	681b      	ldr	r3, [r3, #0]
 801c80e:	607b      	str	r3, [r7, #4]

  while (pcb != NULL) {
 801c810:	e014      	b.n	801c83c <tcp_handle_closepend+0x38>
    struct tcp_pcb *next = pcb->next;
 801c812:	687b      	ldr	r3, [r7, #4]
 801c814:	68db      	ldr	r3, [r3, #12]
 801c816:	603b      	str	r3, [r7, #0]
    /* send pending FIN */
    if (pcb->flags & TF_CLOSEPEND) {
 801c818:	687b      	ldr	r3, [r7, #4]
 801c81a:	8b5b      	ldrh	r3, [r3, #26]
 801c81c:	f003 0308 	and.w	r3, r3, #8
 801c820:	2b00      	cmp	r3, #0
 801c822:	d009      	beq.n	801c838 <tcp_handle_closepend+0x34>
      LWIP_DEBUGF(TCP_DEBUG, ("tcp_handle_closepend: pending FIN\n"));
      tcp_clear_flags(pcb, TF_CLOSEPEND);
 801c824:	687b      	ldr	r3, [r7, #4]
 801c826:	8b5b      	ldrh	r3, [r3, #26]
 801c828:	f023 0308 	bic.w	r3, r3, #8
 801c82c:	b29a      	uxth	r2, r3
 801c82e:	687b      	ldr	r3, [r7, #4]
 801c830:	835a      	strh	r2, [r3, #26]
      tcp_close_shutdown_fin(pcb);
 801c832:	6878      	ldr	r0, [r7, #4]
 801c834:	f7fe fe9a 	bl	801b56c <tcp_close_shutdown_fin>
    }
    pcb = next;
 801c838:	683b      	ldr	r3, [r7, #0]
 801c83a:	607b      	str	r3, [r7, #4]
  while (pcb != NULL) {
 801c83c:	687b      	ldr	r3, [r7, #4]
 801c83e:	2b00      	cmp	r3, #0
 801c840:	d1e7      	bne.n	801c812 <tcp_handle_closepend+0xe>
  }
}
 801c842:	bf00      	nop
 801c844:	bf00      	nop
 801c846:	3708      	adds	r7, #8
 801c848:	46bd      	mov	sp, r7
 801c84a:	bd80      	pop	{r7, pc}
 801c84c:	2402af64 	.word	0x2402af64

0801c850 <tcp_alloc>:
 * @param prio priority for the new pcb
 * @return a new tcp_pcb that initially is in state CLOSED
 */
struct tcp_pcb *
tcp_alloc(u8_t prio)
{
 801c850:	b580      	push	{r7, lr}
 801c852:	b084      	sub	sp, #16
 801c854:	af00      	add	r7, sp, #0
 801c856:	4603      	mov	r3, r0
 801c858:	71fb      	strb	r3, [r7, #7]
  struct tcp_pcb *pcb;

  LWIP_ASSERT_CORE_LOCKED();
 801c85a:	f7f4 f90f 	bl	8010a7c <sys_check_core_locking>

  pcb = (struct tcp_pcb *)memp_malloc(MEMP_TCP_PCB);
 801c85e:	2001      	movs	r0, #1
 801c860:	f7fd fad0 	bl	8019e04 <memp_malloc>
 801c864:	60f8      	str	r0, [r7, #12]
  if (pcb == NULL) {
 801c866:	68fb      	ldr	r3, [r7, #12]
 801c868:	2b00      	cmp	r3, #0
 801c86a:	d126      	bne.n	801c8ba <tcp_alloc+0x6a>
    /* Try to send FIN for all pcbs stuck in TF_CLOSEPEND first */
    tcp_handle_closepend();
 801c86c:	f7ff ffca 	bl	801c804 <tcp_handle_closepend>

    /* Try killing oldest connection in TIME-WAIT. */
    LWIP_DEBUGF(TCP_DEBUG, ("tcp_alloc: killing off oldest TIME-WAIT connection\n"));
    tcp_kill_timewait();
 801c870:	f7ff ff98 	bl	801c7a4 <tcp_kill_timewait>
    /* Try to allocate a tcp_pcb again. */
    pcb = (struct tcp_pcb *)memp_malloc(MEMP_TCP_PCB);
 801c874:	2001      	movs	r0, #1
 801c876:	f7fd fac5 	bl	8019e04 <memp_malloc>
 801c87a:	60f8      	str	r0, [r7, #12]
    if (pcb == NULL) {
 801c87c:	68fb      	ldr	r3, [r7, #12]
 801c87e:	2b00      	cmp	r3, #0
 801c880:	d11b      	bne.n	801c8ba <tcp_alloc+0x6a>
      /* Try killing oldest connection in LAST-ACK (these wouldn't go to TIME-WAIT). */
      LWIP_DEBUGF(TCP_DEBUG, ("tcp_alloc: killing off oldest LAST-ACK connection\n"));
      tcp_kill_state(LAST_ACK);
 801c882:	2009      	movs	r0, #9
 801c884:	f7ff ff44 	bl	801c710 <tcp_kill_state>
      /* Try to allocate a tcp_pcb again. */
      pcb = (struct tcp_pcb *)memp_malloc(MEMP_TCP_PCB);
 801c888:	2001      	movs	r0, #1
 801c88a:	f7fd fabb 	bl	8019e04 <memp_malloc>
 801c88e:	60f8      	str	r0, [r7, #12]
      if (pcb == NULL) {
 801c890:	68fb      	ldr	r3, [r7, #12]
 801c892:	2b00      	cmp	r3, #0
 801c894:	d111      	bne.n	801c8ba <tcp_alloc+0x6a>
        /* Try killing oldest connection in CLOSING. */
        LWIP_DEBUGF(TCP_DEBUG, ("tcp_alloc: killing off oldest CLOSING connection\n"));
        tcp_kill_state(CLOSING);
 801c896:	2008      	movs	r0, #8
 801c898:	f7ff ff3a 	bl	801c710 <tcp_kill_state>
        /* Try to allocate a tcp_pcb again. */
        pcb = (struct tcp_pcb *)memp_malloc(MEMP_TCP_PCB);
 801c89c:	2001      	movs	r0, #1
 801c89e:	f7fd fab1 	bl	8019e04 <memp_malloc>
 801c8a2:	60f8      	str	r0, [r7, #12]
        if (pcb == NULL) {
 801c8a4:	68fb      	ldr	r3, [r7, #12]
 801c8a6:	2b00      	cmp	r3, #0
 801c8a8:	d107      	bne.n	801c8ba <tcp_alloc+0x6a>
          /* Try killing oldest active connection with lower priority than the new one. */
          LWIP_DEBUGF(TCP_DEBUG, ("tcp_alloc: killing oldest connection with prio lower than %d\n", prio));
          tcp_kill_prio(prio);
 801c8aa:	79fb      	ldrb	r3, [r7, #7]
 801c8ac:	4618      	mov	r0, r3
 801c8ae:	f7ff fee1 	bl	801c674 <tcp_kill_prio>
          /* Try to allocate a tcp_pcb again. */
          pcb = (struct tcp_pcb *)memp_malloc(MEMP_TCP_PCB);
 801c8b2:	2001      	movs	r0, #1
 801c8b4:	f7fd faa6 	bl	8019e04 <memp_malloc>
 801c8b8:	60f8      	str	r0, [r7, #12]
    if (pcb != NULL) {
      /* adjust err stats: memp_malloc failed above */
      MEMP_STATS_DEC(err, MEMP_TCP_PCB);
    }
  }
  if (pcb != NULL) {
 801c8ba:	68fb      	ldr	r3, [r7, #12]
 801c8bc:	2b00      	cmp	r3, #0
 801c8be:	d03f      	beq.n	801c940 <tcp_alloc+0xf0>
    /* zero out the whole pcb, so there is no need to initialize members to zero */
    memset(pcb, 0, sizeof(struct tcp_pcb));
 801c8c0:	229c      	movs	r2, #156	@ 0x9c
 801c8c2:	2100      	movs	r1, #0
 801c8c4:	68f8      	ldr	r0, [r7, #12]
 801c8c6:	f00d fe0b 	bl	802a4e0 <memset>
    pcb->prio = prio;
 801c8ca:	68fb      	ldr	r3, [r7, #12]
 801c8cc:	79fa      	ldrb	r2, [r7, #7]
 801c8ce:	755a      	strb	r2, [r3, #21]
    pcb->snd_buf = TCP_SND_BUF;
 801c8d0:	68fb      	ldr	r3, [r7, #12]
 801c8d2:	f241 62d0 	movw	r2, #5840	@ 0x16d0
 801c8d6:	f8a3 2064 	strh.w	r2, [r3, #100]	@ 0x64
    /* Start with a window that does not need scaling. When window scaling is
       enabled and used, the window is enlarged when both sides agree on scaling. */
    pcb->rcv_wnd = pcb->rcv_ann_wnd = TCPWND_MIN16(TCP_WND);
 801c8da:	68fb      	ldr	r3, [r7, #12]
 801c8dc:	f241 62d0 	movw	r2, #5840	@ 0x16d0
 801c8e0:	855a      	strh	r2, [r3, #42]	@ 0x2a
 801c8e2:	68fb      	ldr	r3, [r7, #12]
 801c8e4:	8d5a      	ldrh	r2, [r3, #42]	@ 0x2a
 801c8e6:	68fb      	ldr	r3, [r7, #12]
 801c8e8:	851a      	strh	r2, [r3, #40]	@ 0x28
    pcb->ttl = TCP_TTL;
 801c8ea:	68fb      	ldr	r3, [r7, #12]
 801c8ec:	22ff      	movs	r2, #255	@ 0xff
 801c8ee:	72da      	strb	r2, [r3, #11]
    /* As initial send MSS, we use TCP_MSS but limit it to 536.
       The send MSS is updated when an MSS option is received. */
    pcb->mss = INITIAL_MSS;
 801c8f0:	68fb      	ldr	r3, [r7, #12]
 801c8f2:	f44f 7206 	mov.w	r2, #536	@ 0x218
 801c8f6:	865a      	strh	r2, [r3, #50]	@ 0x32
    pcb->rto = 3000 / TCP_SLOW_INTERVAL;
 801c8f8:	68fb      	ldr	r3, [r7, #12]
 801c8fa:	2206      	movs	r2, #6
 801c8fc:	f8a3 2040 	strh.w	r2, [r3, #64]	@ 0x40
    pcb->sv = 3000 / TCP_SLOW_INTERVAL;
 801c900:	68fb      	ldr	r3, [r7, #12]
 801c902:	2206      	movs	r2, #6
 801c904:	87da      	strh	r2, [r3, #62]	@ 0x3e
    pcb->rtime = -1;
 801c906:	68fb      	ldr	r3, [r7, #12]
 801c908:	f64f 72ff 	movw	r2, #65535	@ 0xffff
 801c90c:	861a      	strh	r2, [r3, #48]	@ 0x30
    pcb->cwnd = 1;
 801c90e:	68fb      	ldr	r3, [r7, #12]
 801c910:	2201      	movs	r2, #1
 801c912:	f8a3 2048 	strh.w	r2, [r3, #72]	@ 0x48
    pcb->tmr = tcp_ticks;
 801c916:	4b0d      	ldr	r3, [pc, #52]	@ (801c94c <tcp_alloc+0xfc>)
 801c918:	681a      	ldr	r2, [r3, #0]
 801c91a:	68fb      	ldr	r3, [r7, #12]
 801c91c:	621a      	str	r2, [r3, #32]
    pcb->last_timer = tcp_timer_ctr;
 801c91e:	4b0c      	ldr	r3, [pc, #48]	@ (801c950 <tcp_alloc+0x100>)
 801c920:	781a      	ldrb	r2, [r3, #0]
 801c922:	68fb      	ldr	r3, [r7, #12]
 801c924:	779a      	strb	r2, [r3, #30]
    of using the largest advertised receive window.  We've seen complications with
    receiving TCPs that use window scaling and/or window auto-tuning where the
    initial advertised window is very small and then grows rapidly once the
    connection is established. To avoid these complications, we set ssthresh to the
    largest effective cwnd (amount of in-flight data) that the sender can have. */
    pcb->ssthresh = TCP_SND_BUF;
 801c926:	68fb      	ldr	r3, [r7, #12]
 801c928:	f241 62d0 	movw	r2, #5840	@ 0x16d0
 801c92c:	f8a3 204a 	strh.w	r2, [r3, #74]	@ 0x4a

#if LWIP_CALLBACK_API
    pcb->recv = tcp_recv_null;
 801c930:	68fb      	ldr	r3, [r7, #12]
 801c932:	4a08      	ldr	r2, [pc, #32]	@ (801c954 <tcp_alloc+0x104>)
 801c934:	f8c3 2084 	str.w	r2, [r3, #132]	@ 0x84
#endif /* LWIP_CALLBACK_API */

    /* Init KEEPALIVE timer */
    pcb->keep_idle  = TCP_KEEPIDLE_DEFAULT;
 801c938:	68fb      	ldr	r3, [r7, #12]
 801c93a:	4a07      	ldr	r2, [pc, #28]	@ (801c958 <tcp_alloc+0x108>)
 801c93c:	f8c3 2094 	str.w	r2, [r3, #148]	@ 0x94
#if LWIP_TCP_KEEPALIVE
    pcb->keep_intvl = TCP_KEEPINTVL_DEFAULT;
    pcb->keep_cnt   = TCP_KEEPCNT_DEFAULT;
#endif /* LWIP_TCP_KEEPALIVE */
  }
  return pcb;
 801c940:	68fb      	ldr	r3, [r7, #12]
}
 801c942:	4618      	mov	r0, r3
 801c944:	3710      	adds	r7, #16
 801c946:	46bd      	mov	sp, r7
 801c948:	bd80      	pop	{r7, pc}
 801c94a:	bf00      	nop
 801c94c:	2402af58 	.word	0x2402af58
 801c950:	2402af6e 	.word	0x2402af6e
 801c954:	0801c609 	.word	0x0801c609
 801c958:	006ddd00 	.word	0x006ddd00

0801c95c <tcp_new_ip_type>:
 * supply @ref IPADDR_TYPE_ANY as argument and bind to @ref IP_ANY_TYPE.
 * @return a new tcp_pcb that initially is in state CLOSED
 */
struct tcp_pcb *
tcp_new_ip_type(u8_t type)
{
 801c95c:	b580      	push	{r7, lr}
 801c95e:	b084      	sub	sp, #16
 801c960:	af00      	add	r7, sp, #0
 801c962:	4603      	mov	r3, r0
 801c964:	71fb      	strb	r3, [r7, #7]
  struct tcp_pcb *pcb;
  pcb = tcp_alloc(TCP_PRIO_NORMAL);
 801c966:	2040      	movs	r0, #64	@ 0x40
 801c968:	f7ff ff72 	bl	801c850 <tcp_alloc>
 801c96c:	60f8      	str	r0, [r7, #12]
    IP_SET_TYPE_VAL(pcb->remote_ip, type);
  }
#else
  LWIP_UNUSED_ARG(type);
#endif /* LWIP_IPV4 && LWIP_IPV6 */
  return pcb;
 801c96e:	68fb      	ldr	r3, [r7, #12]
}
 801c970:	4618      	mov	r0, r3
 801c972:	3710      	adds	r7, #16
 801c974:	46bd      	mov	sp, r7
 801c976:	bd80      	pop	{r7, pc}

0801c978 <tcp_arg>:
 * @param pcb tcp_pcb to set the callback argument
 * @param arg void pointer argument to pass to callback functions
 */
void
tcp_arg(struct tcp_pcb *pcb, void *arg)
{
 801c978:	b580      	push	{r7, lr}
 801c97a:	b082      	sub	sp, #8
 801c97c:	af00      	add	r7, sp, #0
 801c97e:	6078      	str	r0, [r7, #4]
 801c980:	6039      	str	r1, [r7, #0]
  LWIP_ASSERT_CORE_LOCKED();
 801c982:	f7f4 f87b 	bl	8010a7c <sys_check_core_locking>
  /* This function is allowed to be called for both listen pcbs and
     connection pcbs. */
  if (pcb != NULL) {
 801c986:	687b      	ldr	r3, [r7, #4]
 801c988:	2b00      	cmp	r3, #0
 801c98a:	d002      	beq.n	801c992 <tcp_arg+0x1a>
    pcb->callback_arg = arg;
 801c98c:	687b      	ldr	r3, [r7, #4]
 801c98e:	683a      	ldr	r2, [r7, #0]
 801c990:	611a      	str	r2, [r3, #16]
  }
}
 801c992:	bf00      	nop
 801c994:	3708      	adds	r7, #8
 801c996:	46bd      	mov	sp, r7
 801c998:	bd80      	pop	{r7, pc}
	...

0801c99c <tcp_recv>:
 * @param pcb tcp_pcb to set the recv callback
 * @param recv callback function to call for this pcb when data is received
 */
void
tcp_recv(struct tcp_pcb *pcb, tcp_recv_fn recv)
{
 801c99c:	b580      	push	{r7, lr}
 801c99e:	b082      	sub	sp, #8
 801c9a0:	af00      	add	r7, sp, #0
 801c9a2:	6078      	str	r0, [r7, #4]
 801c9a4:	6039      	str	r1, [r7, #0]
  LWIP_ASSERT_CORE_LOCKED();
 801c9a6:	f7f4 f869 	bl	8010a7c <sys_check_core_locking>
  if (pcb != NULL) {
 801c9aa:	687b      	ldr	r3, [r7, #4]
 801c9ac:	2b00      	cmp	r3, #0
 801c9ae:	d00e      	beq.n	801c9ce <tcp_recv+0x32>
    LWIP_ASSERT("invalid socket state for recv callback", pcb->state != LISTEN);
 801c9b0:	687b      	ldr	r3, [r7, #4]
 801c9b2:	7d1b      	ldrb	r3, [r3, #20]
 801c9b4:	2b01      	cmp	r3, #1
 801c9b6:	d106      	bne.n	801c9c6 <tcp_recv+0x2a>
 801c9b8:	4b07      	ldr	r3, [pc, #28]	@ (801c9d8 <tcp_recv+0x3c>)
 801c9ba:	f240 72df 	movw	r2, #2015	@ 0x7df
 801c9be:	4907      	ldr	r1, [pc, #28]	@ (801c9dc <tcp_recv+0x40>)
 801c9c0:	4807      	ldr	r0, [pc, #28]	@ (801c9e0 <tcp_recv+0x44>)
 801c9c2:	f00d fbfb 	bl	802a1bc <iprintf>
    pcb->recv = recv;
 801c9c6:	687b      	ldr	r3, [r7, #4]
 801c9c8:	683a      	ldr	r2, [r7, #0]
 801c9ca:	f8c3 2084 	str.w	r2, [r3, #132]	@ 0x84
  }
}
 801c9ce:	bf00      	nop
 801c9d0:	3708      	adds	r7, #8
 801c9d2:	46bd      	mov	sp, r7
 801c9d4:	bd80      	pop	{r7, pc}
 801c9d6:	bf00      	nop
 801c9d8:	0802ee3c 	.word	0x0802ee3c
 801c9dc:	0802f3d8 	.word	0x0802f3d8
 801c9e0:	0802ee80 	.word	0x0802ee80

0801c9e4 <tcp_sent>:
 * @param pcb tcp_pcb to set the sent callback
 * @param sent callback function to call for this pcb when data is successfully sent
 */
void
tcp_sent(struct tcp_pcb *pcb, tcp_sent_fn sent)
{
 801c9e4:	b580      	push	{r7, lr}
 801c9e6:	b082      	sub	sp, #8
 801c9e8:	af00      	add	r7, sp, #0
 801c9ea:	6078      	str	r0, [r7, #4]
 801c9ec:	6039      	str	r1, [r7, #0]
  LWIP_ASSERT_CORE_LOCKED();
 801c9ee:	f7f4 f845 	bl	8010a7c <sys_check_core_locking>
  if (pcb != NULL) {
 801c9f2:	687b      	ldr	r3, [r7, #4]
 801c9f4:	2b00      	cmp	r3, #0
 801c9f6:	d00e      	beq.n	801ca16 <tcp_sent+0x32>
    LWIP_ASSERT("invalid socket state for sent callback", pcb->state != LISTEN);
 801c9f8:	687b      	ldr	r3, [r7, #4]
 801c9fa:	7d1b      	ldrb	r3, [r3, #20]
 801c9fc:	2b01      	cmp	r3, #1
 801c9fe:	d106      	bne.n	801ca0e <tcp_sent+0x2a>
 801ca00:	4b07      	ldr	r3, [pc, #28]	@ (801ca20 <tcp_sent+0x3c>)
 801ca02:	f240 72f3 	movw	r2, #2035	@ 0x7f3
 801ca06:	4907      	ldr	r1, [pc, #28]	@ (801ca24 <tcp_sent+0x40>)
 801ca08:	4807      	ldr	r0, [pc, #28]	@ (801ca28 <tcp_sent+0x44>)
 801ca0a:	f00d fbd7 	bl	802a1bc <iprintf>
    pcb->sent = sent;
 801ca0e:	687b      	ldr	r3, [r7, #4]
 801ca10:	683a      	ldr	r2, [r7, #0]
 801ca12:	f8c3 2080 	str.w	r2, [r3, #128]	@ 0x80
  }
}
 801ca16:	bf00      	nop
 801ca18:	3708      	adds	r7, #8
 801ca1a:	46bd      	mov	sp, r7
 801ca1c:	bd80      	pop	{r7, pc}
 801ca1e:	bf00      	nop
 801ca20:	0802ee3c 	.word	0x0802ee3c
 801ca24:	0802f400 	.word	0x0802f400
 801ca28:	0802ee80 	.word	0x0802ee80

0801ca2c <tcp_err>:
 * @param err callback function to call for this pcb when a fatal error
 *        has occurred on the connection
 */
void
tcp_err(struct tcp_pcb *pcb, tcp_err_fn err)
{
 801ca2c:	b580      	push	{r7, lr}
 801ca2e:	b082      	sub	sp, #8
 801ca30:	af00      	add	r7, sp, #0
 801ca32:	6078      	str	r0, [r7, #4]
 801ca34:	6039      	str	r1, [r7, #0]
  LWIP_ASSERT_CORE_LOCKED();
 801ca36:	f7f4 f821 	bl	8010a7c <sys_check_core_locking>
  if (pcb != NULL) {
 801ca3a:	687b      	ldr	r3, [r7, #4]
 801ca3c:	2b00      	cmp	r3, #0
 801ca3e:	d00e      	beq.n	801ca5e <tcp_err+0x32>
    LWIP_ASSERT("invalid socket state for err callback", pcb->state != LISTEN);
 801ca40:	687b      	ldr	r3, [r7, #4]
 801ca42:	7d1b      	ldrb	r3, [r3, #20]
 801ca44:	2b01      	cmp	r3, #1
 801ca46:	d106      	bne.n	801ca56 <tcp_err+0x2a>
 801ca48:	4b07      	ldr	r3, [pc, #28]	@ (801ca68 <tcp_err+0x3c>)
 801ca4a:	f640 020d 	movw	r2, #2061	@ 0x80d
 801ca4e:	4907      	ldr	r1, [pc, #28]	@ (801ca6c <tcp_err+0x40>)
 801ca50:	4807      	ldr	r0, [pc, #28]	@ (801ca70 <tcp_err+0x44>)
 801ca52:	f00d fbb3 	bl	802a1bc <iprintf>
    pcb->errf = err;
 801ca56:	687b      	ldr	r3, [r7, #4]
 801ca58:	683a      	ldr	r2, [r7, #0]
 801ca5a:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
  }
}
 801ca5e:	bf00      	nop
 801ca60:	3708      	adds	r7, #8
 801ca62:	46bd      	mov	sp, r7
 801ca64:	bd80      	pop	{r7, pc}
 801ca66:	bf00      	nop
 801ca68:	0802ee3c 	.word	0x0802ee3c
 801ca6c:	0802f428 	.word	0x0802f428
 801ca70:	0802ee80 	.word	0x0802ee80

0801ca74 <tcp_accept>:
 * @param accept callback function to call for this pcb when LISTENing
 *        connection has been connected to another host
 */
void
tcp_accept(struct tcp_pcb *pcb, tcp_accept_fn accept)
{
 801ca74:	b580      	push	{r7, lr}
 801ca76:	b084      	sub	sp, #16
 801ca78:	af00      	add	r7, sp, #0
 801ca7a:	6078      	str	r0, [r7, #4]
 801ca7c:	6039      	str	r1, [r7, #0]
  LWIP_ASSERT_CORE_LOCKED();
 801ca7e:	f7f3 fffd 	bl	8010a7c <sys_check_core_locking>
  if ((pcb != NULL) && (pcb->state == LISTEN)) {
 801ca82:	687b      	ldr	r3, [r7, #4]
 801ca84:	2b00      	cmp	r3, #0
 801ca86:	d008      	beq.n	801ca9a <tcp_accept+0x26>
 801ca88:	687b      	ldr	r3, [r7, #4]
 801ca8a:	7d1b      	ldrb	r3, [r3, #20]
 801ca8c:	2b01      	cmp	r3, #1
 801ca8e:	d104      	bne.n	801ca9a <tcp_accept+0x26>
    struct tcp_pcb_listen *lpcb = (struct tcp_pcb_listen *)pcb;
 801ca90:	687b      	ldr	r3, [r7, #4]
 801ca92:	60fb      	str	r3, [r7, #12]
    lpcb->accept = accept;
 801ca94:	68fb      	ldr	r3, [r7, #12]
 801ca96:	683a      	ldr	r2, [r7, #0]
 801ca98:	619a      	str	r2, [r3, #24]
  }
}
 801ca9a:	bf00      	nop
 801ca9c:	3710      	adds	r7, #16
 801ca9e:	46bd      	mov	sp, r7
 801caa0:	bd80      	pop	{r7, pc}
	...

0801caa4 <tcp_poll>:
 * the application may use the polling functionality to call tcp_write()
 * again when the connection has been idle for a while.
 */
void
tcp_poll(struct tcp_pcb *pcb, tcp_poll_fn poll, u8_t interval)
{
 801caa4:	b580      	push	{r7, lr}
 801caa6:	b084      	sub	sp, #16
 801caa8:	af00      	add	r7, sp, #0
 801caaa:	60f8      	str	r0, [r7, #12]
 801caac:	60b9      	str	r1, [r7, #8]
 801caae:	4613      	mov	r3, r2
 801cab0:	71fb      	strb	r3, [r7, #7]
  LWIP_ASSERT_CORE_LOCKED();
 801cab2:	f7f3 ffe3 	bl	8010a7c <sys_check_core_locking>

  LWIP_ERROR("tcp_poll: invalid pcb", pcb != NULL, return);
 801cab6:	68fb      	ldr	r3, [r7, #12]
 801cab8:	2b00      	cmp	r3, #0
 801caba:	d107      	bne.n	801cacc <tcp_poll+0x28>
 801cabc:	4b0e      	ldr	r3, [pc, #56]	@ (801caf8 <tcp_poll+0x54>)
 801cabe:	f640 023d 	movw	r2, #2109	@ 0x83d
 801cac2:	490e      	ldr	r1, [pc, #56]	@ (801cafc <tcp_poll+0x58>)
 801cac4:	480e      	ldr	r0, [pc, #56]	@ (801cb00 <tcp_poll+0x5c>)
 801cac6:	f00d fb79 	bl	802a1bc <iprintf>
 801caca:	e011      	b.n	801caf0 <tcp_poll+0x4c>
  LWIP_ASSERT("invalid socket state for poll", pcb->state != LISTEN);
 801cacc:	68fb      	ldr	r3, [r7, #12]
 801cace:	7d1b      	ldrb	r3, [r3, #20]
 801cad0:	2b01      	cmp	r3, #1
 801cad2:	d106      	bne.n	801cae2 <tcp_poll+0x3e>
 801cad4:	4b08      	ldr	r3, [pc, #32]	@ (801caf8 <tcp_poll+0x54>)
 801cad6:	f640 023e 	movw	r2, #2110	@ 0x83e
 801cada:	490a      	ldr	r1, [pc, #40]	@ (801cb04 <tcp_poll+0x60>)
 801cadc:	4808      	ldr	r0, [pc, #32]	@ (801cb00 <tcp_poll+0x5c>)
 801cade:	f00d fb6d 	bl	802a1bc <iprintf>

#if LWIP_CALLBACK_API
  pcb->poll = poll;
 801cae2:	68fb      	ldr	r3, [r7, #12]
 801cae4:	68ba      	ldr	r2, [r7, #8]
 801cae6:	f8c3 208c 	str.w	r2, [r3, #140]	@ 0x8c
#else /* LWIP_CALLBACK_API */
  LWIP_UNUSED_ARG(poll);
#endif /* LWIP_CALLBACK_API */
  pcb->pollinterval = interval;
 801caea:	68fb      	ldr	r3, [r7, #12]
 801caec:	79fa      	ldrb	r2, [r7, #7]
 801caee:	775a      	strb	r2, [r3, #29]
}
 801caf0:	3710      	adds	r7, #16
 801caf2:	46bd      	mov	sp, r7
 801caf4:	bd80      	pop	{r7, pc}
 801caf6:	bf00      	nop
 801caf8:	0802ee3c 	.word	0x0802ee3c
 801cafc:	0802f450 	.word	0x0802f450
 801cb00:	0802ee80 	.word	0x0802ee80
 801cb04:	0802f468 	.word	0x0802f468

0801cb08 <tcp_pcb_purge>:
 *
 * @param pcb tcp_pcb to purge. The pcb itself is not deallocated!
 */
void
tcp_pcb_purge(struct tcp_pcb *pcb)
{
 801cb08:	b580      	push	{r7, lr}
 801cb0a:	b082      	sub	sp, #8
 801cb0c:	af00      	add	r7, sp, #0
 801cb0e:	6078      	str	r0, [r7, #4]
  LWIP_ERROR("tcp_pcb_purge: invalid pcb", pcb != NULL, return);
 801cb10:	687b      	ldr	r3, [r7, #4]
 801cb12:	2b00      	cmp	r3, #0
 801cb14:	d107      	bne.n	801cb26 <tcp_pcb_purge+0x1e>
 801cb16:	4b21      	ldr	r3, [pc, #132]	@ (801cb9c <tcp_pcb_purge+0x94>)
 801cb18:	f640 0251 	movw	r2, #2129	@ 0x851
 801cb1c:	4920      	ldr	r1, [pc, #128]	@ (801cba0 <tcp_pcb_purge+0x98>)
 801cb1e:	4821      	ldr	r0, [pc, #132]	@ (801cba4 <tcp_pcb_purge+0x9c>)
 801cb20:	f00d fb4c 	bl	802a1bc <iprintf>
 801cb24:	e037      	b.n	801cb96 <tcp_pcb_purge+0x8e>

  if (pcb->state != CLOSED &&
 801cb26:	687b      	ldr	r3, [r7, #4]
 801cb28:	7d1b      	ldrb	r3, [r3, #20]
 801cb2a:	2b00      	cmp	r3, #0
 801cb2c:	d033      	beq.n	801cb96 <tcp_pcb_purge+0x8e>
      pcb->state != TIME_WAIT &&
 801cb2e:	687b      	ldr	r3, [r7, #4]
 801cb30:	7d1b      	ldrb	r3, [r3, #20]
  if (pcb->state != CLOSED &&
 801cb32:	2b0a      	cmp	r3, #10
 801cb34:	d02f      	beq.n	801cb96 <tcp_pcb_purge+0x8e>
      pcb->state != LISTEN) {
 801cb36:	687b      	ldr	r3, [r7, #4]
 801cb38:	7d1b      	ldrb	r3, [r3, #20]
      pcb->state != TIME_WAIT &&
 801cb3a:	2b01      	cmp	r3, #1
 801cb3c:	d02b      	beq.n	801cb96 <tcp_pcb_purge+0x8e>

    LWIP_DEBUGF(TCP_DEBUG, ("tcp_pcb_purge\n"));

    tcp_backlog_accepted(pcb);

    if (pcb->refused_data != NULL) {
 801cb3e:	687b      	ldr	r3, [r7, #4]
 801cb40:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 801cb42:	2b00      	cmp	r3, #0
 801cb44:	d007      	beq.n	801cb56 <tcp_pcb_purge+0x4e>
      LWIP_DEBUGF(TCP_DEBUG, ("tcp_pcb_purge: data left on ->refused_data\n"));
      pbuf_free(pcb->refused_data);
 801cb46:	687b      	ldr	r3, [r7, #4]
 801cb48:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 801cb4a:	4618      	mov	r0, r3
 801cb4c:	f7fe f8be 	bl	801accc <pbuf_free>
      pcb->refused_data = NULL;
 801cb50:	687b      	ldr	r3, [r7, #4]
 801cb52:	2200      	movs	r2, #0
 801cb54:	679a      	str	r2, [r3, #120]	@ 0x78
    }
    if (pcb->unacked != NULL) {
      LWIP_DEBUGF(TCP_DEBUG, ("tcp_pcb_purge: data left on ->unacked\n"));
    }
#if TCP_QUEUE_OOSEQ
    if (pcb->ooseq != NULL) {
 801cb56:	687b      	ldr	r3, [r7, #4]
 801cb58:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801cb5a:	2b00      	cmp	r3, #0
 801cb5c:	d002      	beq.n	801cb64 <tcp_pcb_purge+0x5c>
      LWIP_DEBUGF(TCP_DEBUG, ("tcp_pcb_purge: data left on ->ooseq\n"));
      tcp_free_ooseq(pcb);
 801cb5e:	6878      	ldr	r0, [r7, #4]
 801cb60:	f000 f986 	bl	801ce70 <tcp_free_ooseq>
    }
#endif /* TCP_QUEUE_OOSEQ */

    /* Stop the retransmission timer as it will expect data on unacked
       queue if it fires */
    pcb->rtime = -1;
 801cb64:	687b      	ldr	r3, [r7, #4]
 801cb66:	f64f 72ff 	movw	r2, #65535	@ 0xffff
 801cb6a:	861a      	strh	r2, [r3, #48]	@ 0x30

    tcp_segs_free(pcb->unsent);
 801cb6c:	687b      	ldr	r3, [r7, #4]
 801cb6e:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801cb70:	4618      	mov	r0, r3
 801cb72:	f7ff fcef 	bl	801c554 <tcp_segs_free>
    tcp_segs_free(pcb->unacked);
 801cb76:	687b      	ldr	r3, [r7, #4]
 801cb78:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801cb7a:	4618      	mov	r0, r3
 801cb7c:	f7ff fcea 	bl	801c554 <tcp_segs_free>
    pcb->unacked = pcb->unsent = NULL;
 801cb80:	687b      	ldr	r3, [r7, #4]
 801cb82:	2200      	movs	r2, #0
 801cb84:	66da      	str	r2, [r3, #108]	@ 0x6c
 801cb86:	687b      	ldr	r3, [r7, #4]
 801cb88:	6eda      	ldr	r2, [r3, #108]	@ 0x6c
 801cb8a:	687b      	ldr	r3, [r7, #4]
 801cb8c:	671a      	str	r2, [r3, #112]	@ 0x70
#if TCP_OVERSIZE
    pcb->unsent_oversize = 0;
 801cb8e:	687b      	ldr	r3, [r7, #4]
 801cb90:	2200      	movs	r2, #0
 801cb92:	f8a3 2068 	strh.w	r2, [r3, #104]	@ 0x68
#endif /* TCP_OVERSIZE */
  }
}
 801cb96:	3708      	adds	r7, #8
 801cb98:	46bd      	mov	sp, r7
 801cb9a:	bd80      	pop	{r7, pc}
 801cb9c:	0802ee3c 	.word	0x0802ee3c
 801cba0:	0802f488 	.word	0x0802f488
 801cba4:	0802ee80 	.word	0x0802ee80

0801cba8 <tcp_pcb_remove>:
 * @param pcblist PCB list to purge.
 * @param pcb tcp_pcb to purge. The pcb itself is NOT deallocated!
 */
void
tcp_pcb_remove(struct tcp_pcb **pcblist, struct tcp_pcb *pcb)
{
 801cba8:	b580      	push	{r7, lr}
 801cbaa:	b084      	sub	sp, #16
 801cbac:	af00      	add	r7, sp, #0
 801cbae:	6078      	str	r0, [r7, #4]
 801cbb0:	6039      	str	r1, [r7, #0]
  LWIP_ASSERT("tcp_pcb_remove: invalid pcb", pcb != NULL);
 801cbb2:	683b      	ldr	r3, [r7, #0]
 801cbb4:	2b00      	cmp	r3, #0
 801cbb6:	d106      	bne.n	801cbc6 <tcp_pcb_remove+0x1e>
 801cbb8:	4b3e      	ldr	r3, [pc, #248]	@ (801ccb4 <tcp_pcb_remove+0x10c>)
 801cbba:	f640 0283 	movw	r2, #2179	@ 0x883
 801cbbe:	493e      	ldr	r1, [pc, #248]	@ (801ccb8 <tcp_pcb_remove+0x110>)
 801cbc0:	483e      	ldr	r0, [pc, #248]	@ (801ccbc <tcp_pcb_remove+0x114>)
 801cbc2:	f00d fafb 	bl	802a1bc <iprintf>
  LWIP_ASSERT("tcp_pcb_remove: invalid pcblist", pcblist != NULL);
 801cbc6:	687b      	ldr	r3, [r7, #4]
 801cbc8:	2b00      	cmp	r3, #0
 801cbca:	d106      	bne.n	801cbda <tcp_pcb_remove+0x32>
 801cbcc:	4b39      	ldr	r3, [pc, #228]	@ (801ccb4 <tcp_pcb_remove+0x10c>)
 801cbce:	f640 0284 	movw	r2, #2180	@ 0x884
 801cbd2:	493b      	ldr	r1, [pc, #236]	@ (801ccc0 <tcp_pcb_remove+0x118>)
 801cbd4:	4839      	ldr	r0, [pc, #228]	@ (801ccbc <tcp_pcb_remove+0x114>)
 801cbd6:	f00d faf1 	bl	802a1bc <iprintf>

  TCP_RMV(pcblist, pcb);
 801cbda:	687b      	ldr	r3, [r7, #4]
 801cbdc:	681b      	ldr	r3, [r3, #0]
 801cbde:	683a      	ldr	r2, [r7, #0]
 801cbe0:	429a      	cmp	r2, r3
 801cbe2:	d105      	bne.n	801cbf0 <tcp_pcb_remove+0x48>
 801cbe4:	687b      	ldr	r3, [r7, #4]
 801cbe6:	681b      	ldr	r3, [r3, #0]
 801cbe8:	68da      	ldr	r2, [r3, #12]
 801cbea:	687b      	ldr	r3, [r7, #4]
 801cbec:	601a      	str	r2, [r3, #0]
 801cbee:	e013      	b.n	801cc18 <tcp_pcb_remove+0x70>
 801cbf0:	687b      	ldr	r3, [r7, #4]
 801cbf2:	681b      	ldr	r3, [r3, #0]
 801cbf4:	60fb      	str	r3, [r7, #12]
 801cbf6:	e00c      	b.n	801cc12 <tcp_pcb_remove+0x6a>
 801cbf8:	68fb      	ldr	r3, [r7, #12]
 801cbfa:	68db      	ldr	r3, [r3, #12]
 801cbfc:	683a      	ldr	r2, [r7, #0]
 801cbfe:	429a      	cmp	r2, r3
 801cc00:	d104      	bne.n	801cc0c <tcp_pcb_remove+0x64>
 801cc02:	683b      	ldr	r3, [r7, #0]
 801cc04:	68da      	ldr	r2, [r3, #12]
 801cc06:	68fb      	ldr	r3, [r7, #12]
 801cc08:	60da      	str	r2, [r3, #12]
 801cc0a:	e005      	b.n	801cc18 <tcp_pcb_remove+0x70>
 801cc0c:	68fb      	ldr	r3, [r7, #12]
 801cc0e:	68db      	ldr	r3, [r3, #12]
 801cc10:	60fb      	str	r3, [r7, #12]
 801cc12:	68fb      	ldr	r3, [r7, #12]
 801cc14:	2b00      	cmp	r3, #0
 801cc16:	d1ef      	bne.n	801cbf8 <tcp_pcb_remove+0x50>
 801cc18:	683b      	ldr	r3, [r7, #0]
 801cc1a:	2200      	movs	r2, #0
 801cc1c:	60da      	str	r2, [r3, #12]

  tcp_pcb_purge(pcb);
 801cc1e:	6838      	ldr	r0, [r7, #0]
 801cc20:	f7ff ff72 	bl	801cb08 <tcp_pcb_purge>

  /* if there is an outstanding delayed ACKs, send it */
  if ((pcb->state != TIME_WAIT) &&
 801cc24:	683b      	ldr	r3, [r7, #0]
 801cc26:	7d1b      	ldrb	r3, [r3, #20]
 801cc28:	2b0a      	cmp	r3, #10
 801cc2a:	d013      	beq.n	801cc54 <tcp_pcb_remove+0xac>
      (pcb->state != LISTEN) &&
 801cc2c:	683b      	ldr	r3, [r7, #0]
 801cc2e:	7d1b      	ldrb	r3, [r3, #20]
  if ((pcb->state != TIME_WAIT) &&
 801cc30:	2b01      	cmp	r3, #1
 801cc32:	d00f      	beq.n	801cc54 <tcp_pcb_remove+0xac>
      (pcb->flags & TF_ACK_DELAY)) {
 801cc34:	683b      	ldr	r3, [r7, #0]
 801cc36:	8b5b      	ldrh	r3, [r3, #26]
 801cc38:	f003 0301 	and.w	r3, r3, #1
      (pcb->state != LISTEN) &&
 801cc3c:	2b00      	cmp	r3, #0
 801cc3e:	d009      	beq.n	801cc54 <tcp_pcb_remove+0xac>
    tcp_ack_now(pcb);
 801cc40:	683b      	ldr	r3, [r7, #0]
 801cc42:	8b5b      	ldrh	r3, [r3, #26]
 801cc44:	f043 0302 	orr.w	r3, r3, #2
 801cc48:	b29a      	uxth	r2, r3
 801cc4a:	683b      	ldr	r3, [r7, #0]
 801cc4c:	835a      	strh	r2, [r3, #26]
    tcp_output(pcb);
 801cc4e:	6838      	ldr	r0, [r7, #0]
 801cc50:	f003 fc28 	bl	80204a4 <tcp_output>
  }

  if (pcb->state != LISTEN) {
 801cc54:	683b      	ldr	r3, [r7, #0]
 801cc56:	7d1b      	ldrb	r3, [r3, #20]
 801cc58:	2b01      	cmp	r3, #1
 801cc5a:	d020      	beq.n	801cc9e <tcp_pcb_remove+0xf6>
    LWIP_ASSERT("unsent segments leaking", pcb->unsent == NULL);
 801cc5c:	683b      	ldr	r3, [r7, #0]
 801cc5e:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801cc60:	2b00      	cmp	r3, #0
 801cc62:	d006      	beq.n	801cc72 <tcp_pcb_remove+0xca>
 801cc64:	4b13      	ldr	r3, [pc, #76]	@ (801ccb4 <tcp_pcb_remove+0x10c>)
 801cc66:	f640 0293 	movw	r2, #2195	@ 0x893
 801cc6a:	4916      	ldr	r1, [pc, #88]	@ (801ccc4 <tcp_pcb_remove+0x11c>)
 801cc6c:	4813      	ldr	r0, [pc, #76]	@ (801ccbc <tcp_pcb_remove+0x114>)
 801cc6e:	f00d faa5 	bl	802a1bc <iprintf>
    LWIP_ASSERT("unacked segments leaking", pcb->unacked == NULL);
 801cc72:	683b      	ldr	r3, [r7, #0]
 801cc74:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801cc76:	2b00      	cmp	r3, #0
 801cc78:	d006      	beq.n	801cc88 <tcp_pcb_remove+0xe0>
 801cc7a:	4b0e      	ldr	r3, [pc, #56]	@ (801ccb4 <tcp_pcb_remove+0x10c>)
 801cc7c:	f640 0294 	movw	r2, #2196	@ 0x894
 801cc80:	4911      	ldr	r1, [pc, #68]	@ (801ccc8 <tcp_pcb_remove+0x120>)
 801cc82:	480e      	ldr	r0, [pc, #56]	@ (801ccbc <tcp_pcb_remove+0x114>)
 801cc84:	f00d fa9a 	bl	802a1bc <iprintf>
#if TCP_QUEUE_OOSEQ
    LWIP_ASSERT("ooseq segments leaking", pcb->ooseq == NULL);
 801cc88:	683b      	ldr	r3, [r7, #0]
 801cc8a:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801cc8c:	2b00      	cmp	r3, #0
 801cc8e:	d006      	beq.n	801cc9e <tcp_pcb_remove+0xf6>
 801cc90:	4b08      	ldr	r3, [pc, #32]	@ (801ccb4 <tcp_pcb_remove+0x10c>)
 801cc92:	f640 0296 	movw	r2, #2198	@ 0x896
 801cc96:	490d      	ldr	r1, [pc, #52]	@ (801cccc <tcp_pcb_remove+0x124>)
 801cc98:	4808      	ldr	r0, [pc, #32]	@ (801ccbc <tcp_pcb_remove+0x114>)
 801cc9a:	f00d fa8f 	bl	802a1bc <iprintf>
#endif /* TCP_QUEUE_OOSEQ */
  }

  pcb->state = CLOSED;
 801cc9e:	683b      	ldr	r3, [r7, #0]
 801cca0:	2200      	movs	r2, #0
 801cca2:	751a      	strb	r2, [r3, #20]
  /* reset the local port to prevent the pcb from being 'bound' */
  pcb->local_port = 0;
 801cca4:	683b      	ldr	r3, [r7, #0]
 801cca6:	2200      	movs	r2, #0
 801cca8:	82da      	strh	r2, [r3, #22]

  LWIP_ASSERT("tcp_pcb_remove: tcp_pcbs_sane()", tcp_pcbs_sane());
}
 801ccaa:	bf00      	nop
 801ccac:	3710      	adds	r7, #16
 801ccae:	46bd      	mov	sp, r7
 801ccb0:	bd80      	pop	{r7, pc}
 801ccb2:	bf00      	nop
 801ccb4:	0802ee3c 	.word	0x0802ee3c
 801ccb8:	0802f4a4 	.word	0x0802f4a4
 801ccbc:	0802ee80 	.word	0x0802ee80
 801ccc0:	0802f4c0 	.word	0x0802f4c0
 801ccc4:	0802f4e0 	.word	0x0802f4e0
 801ccc8:	0802f4f8 	.word	0x0802f4f8
 801cccc:	0802f514 	.word	0x0802f514

0801ccd0 <tcp_next_iss>:
 *
 * @return u32_t pseudo random sequence number
 */
u32_t
tcp_next_iss(struct tcp_pcb *pcb)
{
 801ccd0:	b580      	push	{r7, lr}
 801ccd2:	b082      	sub	sp, #8
 801ccd4:	af00      	add	r7, sp, #0
 801ccd6:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT("tcp_next_iss: invalid pcb", pcb != NULL);
  return LWIP_HOOK_TCP_ISN(&pcb->local_ip, pcb->local_port, &pcb->remote_ip, pcb->remote_port);
#else /* LWIP_HOOK_TCP_ISN */
  static u32_t iss = 6510;

  LWIP_ASSERT("tcp_next_iss: invalid pcb", pcb != NULL);
 801ccd8:	687b      	ldr	r3, [r7, #4]
 801ccda:	2b00      	cmp	r3, #0
 801ccdc:	d106      	bne.n	801ccec <tcp_next_iss+0x1c>
 801ccde:	4b0a      	ldr	r3, [pc, #40]	@ (801cd08 <tcp_next_iss+0x38>)
 801cce0:	f640 02af 	movw	r2, #2223	@ 0x8af
 801cce4:	4909      	ldr	r1, [pc, #36]	@ (801cd0c <tcp_next_iss+0x3c>)
 801cce6:	480a      	ldr	r0, [pc, #40]	@ (801cd10 <tcp_next_iss+0x40>)
 801cce8:	f00d fa68 	bl	802a1bc <iprintf>
  LWIP_UNUSED_ARG(pcb);

  iss += tcp_ticks;       /* XXX */
 801ccec:	4b09      	ldr	r3, [pc, #36]	@ (801cd14 <tcp_next_iss+0x44>)
 801ccee:	681a      	ldr	r2, [r3, #0]
 801ccf0:	4b09      	ldr	r3, [pc, #36]	@ (801cd18 <tcp_next_iss+0x48>)
 801ccf2:	681b      	ldr	r3, [r3, #0]
 801ccf4:	4413      	add	r3, r2
 801ccf6:	4a07      	ldr	r2, [pc, #28]	@ (801cd14 <tcp_next_iss+0x44>)
 801ccf8:	6013      	str	r3, [r2, #0]
  return iss;
 801ccfa:	4b06      	ldr	r3, [pc, #24]	@ (801cd14 <tcp_next_iss+0x44>)
 801ccfc:	681b      	ldr	r3, [r3, #0]
#endif /* LWIP_HOOK_TCP_ISN */
}
 801ccfe:	4618      	mov	r0, r3
 801cd00:	3708      	adds	r7, #8
 801cd02:	46bd      	mov	sp, r7
 801cd04:	bd80      	pop	{r7, pc}
 801cd06:	bf00      	nop
 801cd08:	0802ee3c 	.word	0x0802ee3c
 801cd0c:	0802f52c 	.word	0x0802f52c
 801cd10:	0802ee80 	.word	0x0802ee80
 801cd14:	24000050 	.word	0x24000050
 801cd18:	2402af58 	.word	0x2402af58

0801cd1c <tcp_eff_send_mss_netif>:
 * by calculating the minimum of TCP_MSS and the mtu (if set) of the target
 * netif (if not NULL).
 */
u16_t
tcp_eff_send_mss_netif(u16_t sendmss, struct netif *outif, const ip_addr_t *dest)
{
 801cd1c:	b580      	push	{r7, lr}
 801cd1e:	b086      	sub	sp, #24
 801cd20:	af00      	add	r7, sp, #0
 801cd22:	4603      	mov	r3, r0
 801cd24:	60b9      	str	r1, [r7, #8]
 801cd26:	607a      	str	r2, [r7, #4]
 801cd28:	81fb      	strh	r3, [r7, #14]
  u16_t mss_s;
  u16_t mtu;

  LWIP_UNUSED_ARG(dest); /* in case IPv6 is disabled */

  LWIP_ASSERT("tcp_eff_send_mss_netif: invalid dst_ip", dest != NULL);
 801cd2a:	687b      	ldr	r3, [r7, #4]
 801cd2c:	2b00      	cmp	r3, #0
 801cd2e:	d106      	bne.n	801cd3e <tcp_eff_send_mss_netif+0x22>
 801cd30:	4b14      	ldr	r3, [pc, #80]	@ (801cd84 <tcp_eff_send_mss_netif+0x68>)
 801cd32:	f640 02c5 	movw	r2, #2245	@ 0x8c5
 801cd36:	4914      	ldr	r1, [pc, #80]	@ (801cd88 <tcp_eff_send_mss_netif+0x6c>)
 801cd38:	4814      	ldr	r0, [pc, #80]	@ (801cd8c <tcp_eff_send_mss_netif+0x70>)
 801cd3a:	f00d fa3f 	bl	802a1bc <iprintf>
  else
#endif /* LWIP_IPV4 */
#endif /* LWIP_IPV6 */
#if LWIP_IPV4
  {
    if (outif == NULL) {
 801cd3e:	68bb      	ldr	r3, [r7, #8]
 801cd40:	2b00      	cmp	r3, #0
 801cd42:	d101      	bne.n	801cd48 <tcp_eff_send_mss_netif+0x2c>
      return sendmss;
 801cd44:	89fb      	ldrh	r3, [r7, #14]
 801cd46:	e019      	b.n	801cd7c <tcp_eff_send_mss_netif+0x60>
    }
    mtu = outif->mtu;
 801cd48:	68bb      	ldr	r3, [r7, #8]
 801cd4a:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 801cd4c:	82fb      	strh	r3, [r7, #22]
  }
#endif /* LWIP_IPV4 */

  if (mtu != 0) {
 801cd4e:	8afb      	ldrh	r3, [r7, #22]
 801cd50:	2b00      	cmp	r3, #0
 801cd52:	d012      	beq.n	801cd7a <tcp_eff_send_mss_netif+0x5e>
    else
#endif /* LWIP_IPV4 */
#endif /* LWIP_IPV6 */
#if LWIP_IPV4
    {
      offset = IP_HLEN + TCP_HLEN;
 801cd54:	2328      	movs	r3, #40	@ 0x28
 801cd56:	82bb      	strh	r3, [r7, #20]
    }
#endif /* LWIP_IPV4 */
    mss_s = (mtu > offset) ? (u16_t)(mtu - offset) : 0;
 801cd58:	8afa      	ldrh	r2, [r7, #22]
 801cd5a:	8abb      	ldrh	r3, [r7, #20]
 801cd5c:	429a      	cmp	r2, r3
 801cd5e:	d904      	bls.n	801cd6a <tcp_eff_send_mss_netif+0x4e>
 801cd60:	8afa      	ldrh	r2, [r7, #22]
 801cd62:	8abb      	ldrh	r3, [r7, #20]
 801cd64:	1ad3      	subs	r3, r2, r3
 801cd66:	b29b      	uxth	r3, r3
 801cd68:	e000      	b.n	801cd6c <tcp_eff_send_mss_netif+0x50>
 801cd6a:	2300      	movs	r3, #0
 801cd6c:	827b      	strh	r3, [r7, #18]
    /* RFC 1122, chap 4.2.2.6:
     * Eff.snd.MSS = min(SendMSS+20, MMS_S) - TCPhdrsize - IPoptionsize
     * We correct for TCP options in tcp_write(), and don't support IP options.
     */
    sendmss = LWIP_MIN(sendmss, mss_s);
 801cd6e:	8a7a      	ldrh	r2, [r7, #18]
 801cd70:	89fb      	ldrh	r3, [r7, #14]
 801cd72:	4293      	cmp	r3, r2
 801cd74:	bf28      	it	cs
 801cd76:	4613      	movcs	r3, r2
 801cd78:	81fb      	strh	r3, [r7, #14]
  }
  return sendmss;
 801cd7a:	89fb      	ldrh	r3, [r7, #14]
}
 801cd7c:	4618      	mov	r0, r3
 801cd7e:	3718      	adds	r7, #24
 801cd80:	46bd      	mov	sp, r7
 801cd82:	bd80      	pop	{r7, pc}
 801cd84:	0802ee3c 	.word	0x0802ee3c
 801cd88:	0802f548 	.word	0x0802f548
 801cd8c:	0802ee80 	.word	0x0802ee80

0801cd90 <tcp_netif_ip_addr_changed_pcblist>:
#endif /* TCP_CALCULATE_EFF_SEND_MSS */

/** Helper function for tcp_netif_ip_addr_changed() that iterates a pcb list */
static void
tcp_netif_ip_addr_changed_pcblist(const ip_addr_t *old_addr, struct tcp_pcb *pcb_list)
{
 801cd90:	b580      	push	{r7, lr}
 801cd92:	b084      	sub	sp, #16
 801cd94:	af00      	add	r7, sp, #0
 801cd96:	6078      	str	r0, [r7, #4]
 801cd98:	6039      	str	r1, [r7, #0]
  struct tcp_pcb *pcb;
  pcb = pcb_list;
 801cd9a:	683b      	ldr	r3, [r7, #0]
 801cd9c:	60fb      	str	r3, [r7, #12]

  LWIP_ASSERT("tcp_netif_ip_addr_changed_pcblist: invalid old_addr", old_addr != NULL);
 801cd9e:	687b      	ldr	r3, [r7, #4]
 801cda0:	2b00      	cmp	r3, #0
 801cda2:	d119      	bne.n	801cdd8 <tcp_netif_ip_addr_changed_pcblist+0x48>
 801cda4:	4b10      	ldr	r3, [pc, #64]	@ (801cde8 <tcp_netif_ip_addr_changed_pcblist+0x58>)
 801cda6:	f44f 6210 	mov.w	r2, #2304	@ 0x900
 801cdaa:	4910      	ldr	r1, [pc, #64]	@ (801cdec <tcp_netif_ip_addr_changed_pcblist+0x5c>)
 801cdac:	4810      	ldr	r0, [pc, #64]	@ (801cdf0 <tcp_netif_ip_addr_changed_pcblist+0x60>)
 801cdae:	f00d fa05 	bl	802a1bc <iprintf>

  while (pcb != NULL) {
 801cdb2:	e011      	b.n	801cdd8 <tcp_netif_ip_addr_changed_pcblist+0x48>
    /* PCB bound to current local interface address? */
    if (ip_addr_cmp(&pcb->local_ip, old_addr)
 801cdb4:	68fb      	ldr	r3, [r7, #12]
 801cdb6:	681a      	ldr	r2, [r3, #0]
 801cdb8:	687b      	ldr	r3, [r7, #4]
 801cdba:	681b      	ldr	r3, [r3, #0]
 801cdbc:	429a      	cmp	r2, r3
 801cdbe:	d108      	bne.n	801cdd2 <tcp_netif_ip_addr_changed_pcblist+0x42>
        /* connections to link-local addresses must persist (RFC3927 ch. 1.9) */
        && (!IP_IS_V4_VAL(pcb->local_ip) || !ip4_addr_islinklocal(ip_2_ip4(&pcb->local_ip)))
#endif /* LWIP_AUTOIP */
       ) {
      /* this connection must be aborted */
      struct tcp_pcb *next = pcb->next;
 801cdc0:	68fb      	ldr	r3, [r7, #12]
 801cdc2:	68db      	ldr	r3, [r3, #12]
 801cdc4:	60bb      	str	r3, [r7, #8]
      LWIP_DEBUGF(NETIF_DEBUG | LWIP_DBG_STATE, ("netif_set_ipaddr: aborting TCP pcb %p\n", (void *)pcb));
      tcp_abort(pcb);
 801cdc6:	68f8      	ldr	r0, [r7, #12]
 801cdc8:	f7fe fd86 	bl	801b8d8 <tcp_abort>
      pcb = next;
 801cdcc:	68bb      	ldr	r3, [r7, #8]
 801cdce:	60fb      	str	r3, [r7, #12]
 801cdd0:	e002      	b.n	801cdd8 <tcp_netif_ip_addr_changed_pcblist+0x48>
    } else {
      pcb = pcb->next;
 801cdd2:	68fb      	ldr	r3, [r7, #12]
 801cdd4:	68db      	ldr	r3, [r3, #12]
 801cdd6:	60fb      	str	r3, [r7, #12]
  while (pcb != NULL) {
 801cdd8:	68fb      	ldr	r3, [r7, #12]
 801cdda:	2b00      	cmp	r3, #0
 801cddc:	d1ea      	bne.n	801cdb4 <tcp_netif_ip_addr_changed_pcblist+0x24>
    }
  }
}
 801cdde:	bf00      	nop
 801cde0:	bf00      	nop
 801cde2:	3710      	adds	r7, #16
 801cde4:	46bd      	mov	sp, r7
 801cde6:	bd80      	pop	{r7, pc}
 801cde8:	0802ee3c 	.word	0x0802ee3c
 801cdec:	0802f570 	.word	0x0802f570
 801cdf0:	0802ee80 	.word	0x0802ee80

0801cdf4 <tcp_netif_ip_addr_changed>:
 * @param old_addr IP address of the netif before change
 * @param new_addr IP address of the netif after change or NULL if netif has been removed
 */
void
tcp_netif_ip_addr_changed(const ip_addr_t *old_addr, const ip_addr_t *new_addr)
{
 801cdf4:	b580      	push	{r7, lr}
 801cdf6:	b084      	sub	sp, #16
 801cdf8:	af00      	add	r7, sp, #0
 801cdfa:	6078      	str	r0, [r7, #4]
 801cdfc:	6039      	str	r1, [r7, #0]
  struct tcp_pcb_listen *lpcb;

  if (!ip_addr_isany(old_addr)) {
 801cdfe:	687b      	ldr	r3, [r7, #4]
 801ce00:	2b00      	cmp	r3, #0
 801ce02:	d02a      	beq.n	801ce5a <tcp_netif_ip_addr_changed+0x66>
 801ce04:	687b      	ldr	r3, [r7, #4]
 801ce06:	681b      	ldr	r3, [r3, #0]
 801ce08:	2b00      	cmp	r3, #0
 801ce0a:	d026      	beq.n	801ce5a <tcp_netif_ip_addr_changed+0x66>
    tcp_netif_ip_addr_changed_pcblist(old_addr, tcp_active_pcbs);
 801ce0c:	4b15      	ldr	r3, [pc, #84]	@ (801ce64 <tcp_netif_ip_addr_changed+0x70>)
 801ce0e:	681b      	ldr	r3, [r3, #0]
 801ce10:	4619      	mov	r1, r3
 801ce12:	6878      	ldr	r0, [r7, #4]
 801ce14:	f7ff ffbc 	bl	801cd90 <tcp_netif_ip_addr_changed_pcblist>
    tcp_netif_ip_addr_changed_pcblist(old_addr, tcp_bound_pcbs);
 801ce18:	4b13      	ldr	r3, [pc, #76]	@ (801ce68 <tcp_netif_ip_addr_changed+0x74>)
 801ce1a:	681b      	ldr	r3, [r3, #0]
 801ce1c:	4619      	mov	r1, r3
 801ce1e:	6878      	ldr	r0, [r7, #4]
 801ce20:	f7ff ffb6 	bl	801cd90 <tcp_netif_ip_addr_changed_pcblist>

    if (!ip_addr_isany(new_addr)) {
 801ce24:	683b      	ldr	r3, [r7, #0]
 801ce26:	2b00      	cmp	r3, #0
 801ce28:	d017      	beq.n	801ce5a <tcp_netif_ip_addr_changed+0x66>
 801ce2a:	683b      	ldr	r3, [r7, #0]
 801ce2c:	681b      	ldr	r3, [r3, #0]
 801ce2e:	2b00      	cmp	r3, #0
 801ce30:	d013      	beq.n	801ce5a <tcp_netif_ip_addr_changed+0x66>
      /* PCB bound to current local interface address? */
      for (lpcb = tcp_listen_pcbs.listen_pcbs; lpcb != NULL; lpcb = lpcb->next) {
 801ce32:	4b0e      	ldr	r3, [pc, #56]	@ (801ce6c <tcp_netif_ip_addr_changed+0x78>)
 801ce34:	681b      	ldr	r3, [r3, #0]
 801ce36:	60fb      	str	r3, [r7, #12]
 801ce38:	e00c      	b.n	801ce54 <tcp_netif_ip_addr_changed+0x60>
        /* PCB bound to current local interface address? */
        if (ip_addr_cmp(&lpcb->local_ip, old_addr)) {
 801ce3a:	68fb      	ldr	r3, [r7, #12]
 801ce3c:	681a      	ldr	r2, [r3, #0]
 801ce3e:	687b      	ldr	r3, [r7, #4]
 801ce40:	681b      	ldr	r3, [r3, #0]
 801ce42:	429a      	cmp	r2, r3
 801ce44:	d103      	bne.n	801ce4e <tcp_netif_ip_addr_changed+0x5a>
          /* The PCB is listening to the old ipaddr and
            * is set to listen to the new one instead */
          ip_addr_copy(lpcb->local_ip, *new_addr);
 801ce46:	683b      	ldr	r3, [r7, #0]
 801ce48:	681a      	ldr	r2, [r3, #0]
 801ce4a:	68fb      	ldr	r3, [r7, #12]
 801ce4c:	601a      	str	r2, [r3, #0]
      for (lpcb = tcp_listen_pcbs.listen_pcbs; lpcb != NULL; lpcb = lpcb->next) {
 801ce4e:	68fb      	ldr	r3, [r7, #12]
 801ce50:	68db      	ldr	r3, [r3, #12]
 801ce52:	60fb      	str	r3, [r7, #12]
 801ce54:	68fb      	ldr	r3, [r7, #12]
 801ce56:	2b00      	cmp	r3, #0
 801ce58:	d1ef      	bne.n	801ce3a <tcp_netif_ip_addr_changed+0x46>
        }
      }
    }
  }
}
 801ce5a:	bf00      	nop
 801ce5c:	3710      	adds	r7, #16
 801ce5e:	46bd      	mov	sp, r7
 801ce60:	bd80      	pop	{r7, pc}
 801ce62:	bf00      	nop
 801ce64:	2402af64 	.word	0x2402af64
 801ce68:	2402af5c 	.word	0x2402af5c
 801ce6c:	2402af60 	.word	0x2402af60

0801ce70 <tcp_free_ooseq>:

#if TCP_QUEUE_OOSEQ
/* Free all ooseq pbufs (and possibly reset SACK state) */
void
tcp_free_ooseq(struct tcp_pcb *pcb)
{
 801ce70:	b580      	push	{r7, lr}
 801ce72:	b082      	sub	sp, #8
 801ce74:	af00      	add	r7, sp, #0
 801ce76:	6078      	str	r0, [r7, #4]
  if (pcb->ooseq) {
 801ce78:	687b      	ldr	r3, [r7, #4]
 801ce7a:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801ce7c:	2b00      	cmp	r3, #0
 801ce7e:	d007      	beq.n	801ce90 <tcp_free_ooseq+0x20>
    tcp_segs_free(pcb->ooseq);
 801ce80:	687b      	ldr	r3, [r7, #4]
 801ce82:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801ce84:	4618      	mov	r0, r3
 801ce86:	f7ff fb65 	bl	801c554 <tcp_segs_free>
    pcb->ooseq = NULL;
 801ce8a:	687b      	ldr	r3, [r7, #4]
 801ce8c:	2200      	movs	r2, #0
 801ce8e:	675a      	str	r2, [r3, #116]	@ 0x74
#if LWIP_TCP_SACK_OUT
    memset(pcb->rcv_sacks, 0, sizeof(pcb->rcv_sacks));
#endif /* LWIP_TCP_SACK_OUT */
  }
}
 801ce90:	bf00      	nop
 801ce92:	3708      	adds	r7, #8
 801ce94:	46bd      	mov	sp, r7
 801ce96:	bd80      	pop	{r7, pc}

0801ce98 <tcp_input>:
 * @param p received TCP segment to process (p->payload pointing to the TCP header)
 * @param inp network interface on which this segment was received
 */
void
tcp_input(struct pbuf *p, struct netif *inp)
{
 801ce98:	b590      	push	{r4, r7, lr}
 801ce9a:	b08d      	sub	sp, #52	@ 0x34
 801ce9c:	af04      	add	r7, sp, #16
 801ce9e:	6078      	str	r0, [r7, #4]
 801cea0:	6039      	str	r1, [r7, #0]
#endif /* SO_REUSE */
  u8_t hdrlen_bytes;
  err_t err;

  LWIP_UNUSED_ARG(inp);
  LWIP_ASSERT_CORE_LOCKED();
 801cea2:	f7f3 fdeb 	bl	8010a7c <sys_check_core_locking>
  LWIP_ASSERT("tcp_input: invalid pbuf", p != NULL);
 801cea6:	687b      	ldr	r3, [r7, #4]
 801cea8:	2b00      	cmp	r3, #0
 801ceaa:	d105      	bne.n	801ceb8 <tcp_input+0x20>
 801ceac:	4b9b      	ldr	r3, [pc, #620]	@ (801d11c <tcp_input+0x284>)
 801ceae:	2283      	movs	r2, #131	@ 0x83
 801ceb0:	499b      	ldr	r1, [pc, #620]	@ (801d120 <tcp_input+0x288>)
 801ceb2:	489c      	ldr	r0, [pc, #624]	@ (801d124 <tcp_input+0x28c>)
 801ceb4:	f00d f982 	bl	802a1bc <iprintf>
  PERF_START;

  TCP_STATS_INC(tcp.recv);
  MIB2_STATS_INC(mib2.tcpinsegs);

  tcphdr = (struct tcp_hdr *)p->payload;
 801ceb8:	687b      	ldr	r3, [r7, #4]
 801ceba:	685b      	ldr	r3, [r3, #4]
 801cebc:	4a9a      	ldr	r2, [pc, #616]	@ (801d128 <tcp_input+0x290>)
 801cebe:	6013      	str	r3, [r2, #0]
#if TCP_INPUT_DEBUG
  tcp_debug_print(tcphdr);
#endif

  /* Check that TCP header fits in payload */
  if (p->len < TCP_HLEN) {
 801cec0:	687b      	ldr	r3, [r7, #4]
 801cec2:	895b      	ldrh	r3, [r3, #10]
 801cec4:	2b13      	cmp	r3, #19
 801cec6:	f240 83d1 	bls.w	801d66c <tcp_input+0x7d4>
    TCP_STATS_INC(tcp.lenerr);
    goto dropped;
  }

  /* Don't even process incoming broadcasts/multicasts. */
  if (ip_addr_isbroadcast(ip_current_dest_addr(), ip_current_netif()) ||
 801ceca:	4b98      	ldr	r3, [pc, #608]	@ (801d12c <tcp_input+0x294>)
 801cecc:	695b      	ldr	r3, [r3, #20]
 801cece:	4a97      	ldr	r2, [pc, #604]	@ (801d12c <tcp_input+0x294>)
 801ced0:	6812      	ldr	r2, [r2, #0]
 801ced2:	4611      	mov	r1, r2
 801ced4:	4618      	mov	r0, r3
 801ced6:	f008 fc1b 	bl	8025710 <ip4_addr_isbroadcast_u32>
 801ceda:	4603      	mov	r3, r0
 801cedc:	2b00      	cmp	r3, #0
 801cede:	f040 83c7 	bne.w	801d670 <tcp_input+0x7d8>
      ip_addr_ismulticast(ip_current_dest_addr())) {
 801cee2:	4b92      	ldr	r3, [pc, #584]	@ (801d12c <tcp_input+0x294>)
 801cee4:	695b      	ldr	r3, [r3, #20]
 801cee6:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
  if (ip_addr_isbroadcast(ip_current_dest_addr(), ip_current_netif()) ||
 801ceea:	2be0      	cmp	r3, #224	@ 0xe0
 801ceec:	f000 83c0 	beq.w	801d670 <tcp_input+0x7d8>
    }
  }
#endif /* CHECKSUM_CHECK_TCP */

  /* sanity-check header length */
  hdrlen_bytes = TCPH_HDRLEN_BYTES(tcphdr);
 801cef0:	4b8d      	ldr	r3, [pc, #564]	@ (801d128 <tcp_input+0x290>)
 801cef2:	681b      	ldr	r3, [r3, #0]
 801cef4:	899b      	ldrh	r3, [r3, #12]
 801cef6:	b29b      	uxth	r3, r3
 801cef8:	4618      	mov	r0, r3
 801cefa:	f7fc fa05 	bl	8019308 <lwip_htons>
 801cefe:	4603      	mov	r3, r0
 801cf00:	0b1b      	lsrs	r3, r3, #12
 801cf02:	b29b      	uxth	r3, r3
 801cf04:	b2db      	uxtb	r3, r3
 801cf06:	009b      	lsls	r3, r3, #2
 801cf08:	74bb      	strb	r3, [r7, #18]
  if ((hdrlen_bytes < TCP_HLEN) || (hdrlen_bytes > p->tot_len)) {
 801cf0a:	7cbb      	ldrb	r3, [r7, #18]
 801cf0c:	2b13      	cmp	r3, #19
 801cf0e:	f240 83b1 	bls.w	801d674 <tcp_input+0x7dc>
 801cf12:	7cbb      	ldrb	r3, [r7, #18]
 801cf14:	b29a      	uxth	r2, r3
 801cf16:	687b      	ldr	r3, [r7, #4]
 801cf18:	891b      	ldrh	r3, [r3, #8]
 801cf1a:	429a      	cmp	r2, r3
 801cf1c:	f200 83aa 	bhi.w	801d674 <tcp_input+0x7dc>
    goto dropped;
  }

  /* Move the payload pointer in the pbuf so that it points to the
     TCP data instead of the TCP header. */
  tcphdr_optlen = (u16_t)(hdrlen_bytes - TCP_HLEN);
 801cf20:	7cbb      	ldrb	r3, [r7, #18]
 801cf22:	b29b      	uxth	r3, r3
 801cf24:	3b14      	subs	r3, #20
 801cf26:	b29a      	uxth	r2, r3
 801cf28:	4b81      	ldr	r3, [pc, #516]	@ (801d130 <tcp_input+0x298>)
 801cf2a:	801a      	strh	r2, [r3, #0]
  tcphdr_opt2 = NULL;
 801cf2c:	4b81      	ldr	r3, [pc, #516]	@ (801d134 <tcp_input+0x29c>)
 801cf2e:	2200      	movs	r2, #0
 801cf30:	601a      	str	r2, [r3, #0]
  if (p->len >= hdrlen_bytes) {
 801cf32:	687b      	ldr	r3, [r7, #4]
 801cf34:	895a      	ldrh	r2, [r3, #10]
 801cf36:	7cbb      	ldrb	r3, [r7, #18]
 801cf38:	b29b      	uxth	r3, r3
 801cf3a:	429a      	cmp	r2, r3
 801cf3c:	d309      	bcc.n	801cf52 <tcp_input+0xba>
    /* all options are in the first pbuf */
    tcphdr_opt1len = tcphdr_optlen;
 801cf3e:	4b7c      	ldr	r3, [pc, #496]	@ (801d130 <tcp_input+0x298>)
 801cf40:	881a      	ldrh	r2, [r3, #0]
 801cf42:	4b7d      	ldr	r3, [pc, #500]	@ (801d138 <tcp_input+0x2a0>)
 801cf44:	801a      	strh	r2, [r3, #0]
    pbuf_remove_header(p, hdrlen_bytes); /* cannot fail */
 801cf46:	7cbb      	ldrb	r3, [r7, #18]
 801cf48:	4619      	mov	r1, r3
 801cf4a:	6878      	ldr	r0, [r7, #4]
 801cf4c:	f7fd fe06 	bl	801ab5c <pbuf_remove_header>
 801cf50:	e04e      	b.n	801cff0 <tcp_input+0x158>
  } else {
    u16_t opt2len;
    /* TCP header fits into first pbuf, options don't - data is in the next pbuf */
    /* there must be a next pbuf, due to hdrlen_bytes sanity check above */
    LWIP_ASSERT("p->next != NULL", p->next != NULL);
 801cf52:	687b      	ldr	r3, [r7, #4]
 801cf54:	681b      	ldr	r3, [r3, #0]
 801cf56:	2b00      	cmp	r3, #0
 801cf58:	d105      	bne.n	801cf66 <tcp_input+0xce>
 801cf5a:	4b70      	ldr	r3, [pc, #448]	@ (801d11c <tcp_input+0x284>)
 801cf5c:	22c2      	movs	r2, #194	@ 0xc2
 801cf5e:	4977      	ldr	r1, [pc, #476]	@ (801d13c <tcp_input+0x2a4>)
 801cf60:	4870      	ldr	r0, [pc, #448]	@ (801d124 <tcp_input+0x28c>)
 801cf62:	f00d f92b 	bl	802a1bc <iprintf>

    /* advance over the TCP header (cannot fail) */
    pbuf_remove_header(p, TCP_HLEN);
 801cf66:	2114      	movs	r1, #20
 801cf68:	6878      	ldr	r0, [r7, #4]
 801cf6a:	f7fd fdf7 	bl	801ab5c <pbuf_remove_header>

    /* determine how long the first and second parts of the options are */
    tcphdr_opt1len = p->len;
 801cf6e:	687b      	ldr	r3, [r7, #4]
 801cf70:	895a      	ldrh	r2, [r3, #10]
 801cf72:	4b71      	ldr	r3, [pc, #452]	@ (801d138 <tcp_input+0x2a0>)
 801cf74:	801a      	strh	r2, [r3, #0]
    opt2len = (u16_t)(tcphdr_optlen - tcphdr_opt1len);
 801cf76:	4b6e      	ldr	r3, [pc, #440]	@ (801d130 <tcp_input+0x298>)
 801cf78:	881a      	ldrh	r2, [r3, #0]
 801cf7a:	4b6f      	ldr	r3, [pc, #444]	@ (801d138 <tcp_input+0x2a0>)
 801cf7c:	881b      	ldrh	r3, [r3, #0]
 801cf7e:	1ad3      	subs	r3, r2, r3
 801cf80:	823b      	strh	r3, [r7, #16]

    /* options continue in the next pbuf: set p to zero length and hide the
        options in the next pbuf (adjusting p->tot_len) */
    pbuf_remove_header(p, tcphdr_opt1len);
 801cf82:	4b6d      	ldr	r3, [pc, #436]	@ (801d138 <tcp_input+0x2a0>)
 801cf84:	881b      	ldrh	r3, [r3, #0]
 801cf86:	4619      	mov	r1, r3
 801cf88:	6878      	ldr	r0, [r7, #4]
 801cf8a:	f7fd fde7 	bl	801ab5c <pbuf_remove_header>

    /* check that the options fit in the second pbuf */
    if (opt2len > p->next->len) {
 801cf8e:	687b      	ldr	r3, [r7, #4]
 801cf90:	681b      	ldr	r3, [r3, #0]
 801cf92:	895b      	ldrh	r3, [r3, #10]
 801cf94:	8a3a      	ldrh	r2, [r7, #16]
 801cf96:	429a      	cmp	r2, r3
 801cf98:	f200 836e 	bhi.w	801d678 <tcp_input+0x7e0>
      TCP_STATS_INC(tcp.lenerr);
      goto dropped;
    }

    /* remember the pointer to the second part of the options */
    tcphdr_opt2 = (u8_t *)p->next->payload;
 801cf9c:	687b      	ldr	r3, [r7, #4]
 801cf9e:	681b      	ldr	r3, [r3, #0]
 801cfa0:	685b      	ldr	r3, [r3, #4]
 801cfa2:	4a64      	ldr	r2, [pc, #400]	@ (801d134 <tcp_input+0x29c>)
 801cfa4:	6013      	str	r3, [r2, #0]

    /* advance p->next to point after the options, and manually
        adjust p->tot_len to keep it consistent with the changed p->next */
    pbuf_remove_header(p->next, opt2len);
 801cfa6:	687b      	ldr	r3, [r7, #4]
 801cfa8:	681b      	ldr	r3, [r3, #0]
 801cfaa:	8a3a      	ldrh	r2, [r7, #16]
 801cfac:	4611      	mov	r1, r2
 801cfae:	4618      	mov	r0, r3
 801cfb0:	f7fd fdd4 	bl	801ab5c <pbuf_remove_header>
    p->tot_len = (u16_t)(p->tot_len - opt2len);
 801cfb4:	687b      	ldr	r3, [r7, #4]
 801cfb6:	891a      	ldrh	r2, [r3, #8]
 801cfb8:	8a3b      	ldrh	r3, [r7, #16]
 801cfba:	1ad3      	subs	r3, r2, r3
 801cfbc:	b29a      	uxth	r2, r3
 801cfbe:	687b      	ldr	r3, [r7, #4]
 801cfc0:	811a      	strh	r2, [r3, #8]

    LWIP_ASSERT("p->len == 0", p->len == 0);
 801cfc2:	687b      	ldr	r3, [r7, #4]
 801cfc4:	895b      	ldrh	r3, [r3, #10]
 801cfc6:	2b00      	cmp	r3, #0
 801cfc8:	d005      	beq.n	801cfd6 <tcp_input+0x13e>
 801cfca:	4b54      	ldr	r3, [pc, #336]	@ (801d11c <tcp_input+0x284>)
 801cfcc:	22df      	movs	r2, #223	@ 0xdf
 801cfce:	495c      	ldr	r1, [pc, #368]	@ (801d140 <tcp_input+0x2a8>)
 801cfd0:	4854      	ldr	r0, [pc, #336]	@ (801d124 <tcp_input+0x28c>)
 801cfd2:	f00d f8f3 	bl	802a1bc <iprintf>
    LWIP_ASSERT("p->tot_len == p->next->tot_len", p->tot_len == p->next->tot_len);
 801cfd6:	687b      	ldr	r3, [r7, #4]
 801cfd8:	891a      	ldrh	r2, [r3, #8]
 801cfda:	687b      	ldr	r3, [r7, #4]
 801cfdc:	681b      	ldr	r3, [r3, #0]
 801cfde:	891b      	ldrh	r3, [r3, #8]
 801cfe0:	429a      	cmp	r2, r3
 801cfe2:	d005      	beq.n	801cff0 <tcp_input+0x158>
 801cfe4:	4b4d      	ldr	r3, [pc, #308]	@ (801d11c <tcp_input+0x284>)
 801cfe6:	22e0      	movs	r2, #224	@ 0xe0
 801cfe8:	4956      	ldr	r1, [pc, #344]	@ (801d144 <tcp_input+0x2ac>)
 801cfea:	484e      	ldr	r0, [pc, #312]	@ (801d124 <tcp_input+0x28c>)
 801cfec:	f00d f8e6 	bl	802a1bc <iprintf>
  }

  /* Convert fields in TCP header to host byte order. */
  tcphdr->src = lwip_ntohs(tcphdr->src);
 801cff0:	4b4d      	ldr	r3, [pc, #308]	@ (801d128 <tcp_input+0x290>)
 801cff2:	681b      	ldr	r3, [r3, #0]
 801cff4:	881b      	ldrh	r3, [r3, #0]
 801cff6:	b29b      	uxth	r3, r3
 801cff8:	4a4b      	ldr	r2, [pc, #300]	@ (801d128 <tcp_input+0x290>)
 801cffa:	6814      	ldr	r4, [r2, #0]
 801cffc:	4618      	mov	r0, r3
 801cffe:	f7fc f983 	bl	8019308 <lwip_htons>
 801d002:	4603      	mov	r3, r0
 801d004:	8023      	strh	r3, [r4, #0]
  tcphdr->dest = lwip_ntohs(tcphdr->dest);
 801d006:	4b48      	ldr	r3, [pc, #288]	@ (801d128 <tcp_input+0x290>)
 801d008:	681b      	ldr	r3, [r3, #0]
 801d00a:	885b      	ldrh	r3, [r3, #2]
 801d00c:	b29b      	uxth	r3, r3
 801d00e:	4a46      	ldr	r2, [pc, #280]	@ (801d128 <tcp_input+0x290>)
 801d010:	6814      	ldr	r4, [r2, #0]
 801d012:	4618      	mov	r0, r3
 801d014:	f7fc f978 	bl	8019308 <lwip_htons>
 801d018:	4603      	mov	r3, r0
 801d01a:	8063      	strh	r3, [r4, #2]
  seqno = tcphdr->seqno = lwip_ntohl(tcphdr->seqno);
 801d01c:	4b42      	ldr	r3, [pc, #264]	@ (801d128 <tcp_input+0x290>)
 801d01e:	681b      	ldr	r3, [r3, #0]
 801d020:	685b      	ldr	r3, [r3, #4]
 801d022:	4a41      	ldr	r2, [pc, #260]	@ (801d128 <tcp_input+0x290>)
 801d024:	6814      	ldr	r4, [r2, #0]
 801d026:	4618      	mov	r0, r3
 801d028:	f7fc f983 	bl	8019332 <lwip_htonl>
 801d02c:	4603      	mov	r3, r0
 801d02e:	6063      	str	r3, [r4, #4]
 801d030:	6863      	ldr	r3, [r4, #4]
 801d032:	4a45      	ldr	r2, [pc, #276]	@ (801d148 <tcp_input+0x2b0>)
 801d034:	6013      	str	r3, [r2, #0]
  ackno = tcphdr->ackno = lwip_ntohl(tcphdr->ackno);
 801d036:	4b3c      	ldr	r3, [pc, #240]	@ (801d128 <tcp_input+0x290>)
 801d038:	681b      	ldr	r3, [r3, #0]
 801d03a:	689b      	ldr	r3, [r3, #8]
 801d03c:	4a3a      	ldr	r2, [pc, #232]	@ (801d128 <tcp_input+0x290>)
 801d03e:	6814      	ldr	r4, [r2, #0]
 801d040:	4618      	mov	r0, r3
 801d042:	f7fc f976 	bl	8019332 <lwip_htonl>
 801d046:	4603      	mov	r3, r0
 801d048:	60a3      	str	r3, [r4, #8]
 801d04a:	68a3      	ldr	r3, [r4, #8]
 801d04c:	4a3f      	ldr	r2, [pc, #252]	@ (801d14c <tcp_input+0x2b4>)
 801d04e:	6013      	str	r3, [r2, #0]
  tcphdr->wnd = lwip_ntohs(tcphdr->wnd);
 801d050:	4b35      	ldr	r3, [pc, #212]	@ (801d128 <tcp_input+0x290>)
 801d052:	681b      	ldr	r3, [r3, #0]
 801d054:	89db      	ldrh	r3, [r3, #14]
 801d056:	b29b      	uxth	r3, r3
 801d058:	4a33      	ldr	r2, [pc, #204]	@ (801d128 <tcp_input+0x290>)
 801d05a:	6814      	ldr	r4, [r2, #0]
 801d05c:	4618      	mov	r0, r3
 801d05e:	f7fc f953 	bl	8019308 <lwip_htons>
 801d062:	4603      	mov	r3, r0
 801d064:	81e3      	strh	r3, [r4, #14]

  flags = TCPH_FLAGS(tcphdr);
 801d066:	4b30      	ldr	r3, [pc, #192]	@ (801d128 <tcp_input+0x290>)
 801d068:	681b      	ldr	r3, [r3, #0]
 801d06a:	899b      	ldrh	r3, [r3, #12]
 801d06c:	b29b      	uxth	r3, r3
 801d06e:	4618      	mov	r0, r3
 801d070:	f7fc f94a 	bl	8019308 <lwip_htons>
 801d074:	4603      	mov	r3, r0
 801d076:	b2db      	uxtb	r3, r3
 801d078:	f003 033f 	and.w	r3, r3, #63	@ 0x3f
 801d07c:	b2da      	uxtb	r2, r3
 801d07e:	4b34      	ldr	r3, [pc, #208]	@ (801d150 <tcp_input+0x2b8>)
 801d080:	701a      	strb	r2, [r3, #0]
  tcplen = p->tot_len;
 801d082:	687b      	ldr	r3, [r7, #4]
 801d084:	891a      	ldrh	r2, [r3, #8]
 801d086:	4b33      	ldr	r3, [pc, #204]	@ (801d154 <tcp_input+0x2bc>)
 801d088:	801a      	strh	r2, [r3, #0]
  if (flags & (TCP_FIN | TCP_SYN)) {
 801d08a:	4b31      	ldr	r3, [pc, #196]	@ (801d150 <tcp_input+0x2b8>)
 801d08c:	781b      	ldrb	r3, [r3, #0]
 801d08e:	f003 0303 	and.w	r3, r3, #3
 801d092:	2b00      	cmp	r3, #0
 801d094:	d00c      	beq.n	801d0b0 <tcp_input+0x218>
    tcplen++;
 801d096:	4b2f      	ldr	r3, [pc, #188]	@ (801d154 <tcp_input+0x2bc>)
 801d098:	881b      	ldrh	r3, [r3, #0]
 801d09a:	3301      	adds	r3, #1
 801d09c:	b29a      	uxth	r2, r3
 801d09e:	4b2d      	ldr	r3, [pc, #180]	@ (801d154 <tcp_input+0x2bc>)
 801d0a0:	801a      	strh	r2, [r3, #0]
    if (tcplen < p->tot_len) {
 801d0a2:	687b      	ldr	r3, [r7, #4]
 801d0a4:	891a      	ldrh	r2, [r3, #8]
 801d0a6:	4b2b      	ldr	r3, [pc, #172]	@ (801d154 <tcp_input+0x2bc>)
 801d0a8:	881b      	ldrh	r3, [r3, #0]
 801d0aa:	429a      	cmp	r2, r3
 801d0ac:	f200 82e6 	bhi.w	801d67c <tcp_input+0x7e4>
    }
  }

  /* Demultiplex an incoming segment. First, we check if it is destined
     for an active connection. */
  prev = NULL;
 801d0b0:	2300      	movs	r3, #0
 801d0b2:	61fb      	str	r3, [r7, #28]

  for (pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) {
 801d0b4:	4b28      	ldr	r3, [pc, #160]	@ (801d158 <tcp_input+0x2c0>)
 801d0b6:	681b      	ldr	r3, [r3, #0]
 801d0b8:	61bb      	str	r3, [r7, #24]
 801d0ba:	e09d      	b.n	801d1f8 <tcp_input+0x360>
    LWIP_ASSERT("tcp_input: active pcb->state != CLOSED", pcb->state != CLOSED);
 801d0bc:	69bb      	ldr	r3, [r7, #24]
 801d0be:	7d1b      	ldrb	r3, [r3, #20]
 801d0c0:	2b00      	cmp	r3, #0
 801d0c2:	d105      	bne.n	801d0d0 <tcp_input+0x238>
 801d0c4:	4b15      	ldr	r3, [pc, #84]	@ (801d11c <tcp_input+0x284>)
 801d0c6:	22fb      	movs	r2, #251	@ 0xfb
 801d0c8:	4924      	ldr	r1, [pc, #144]	@ (801d15c <tcp_input+0x2c4>)
 801d0ca:	4816      	ldr	r0, [pc, #88]	@ (801d124 <tcp_input+0x28c>)
 801d0cc:	f00d f876 	bl	802a1bc <iprintf>
    LWIP_ASSERT("tcp_input: active pcb->state != TIME-WAIT", pcb->state != TIME_WAIT);
 801d0d0:	69bb      	ldr	r3, [r7, #24]
 801d0d2:	7d1b      	ldrb	r3, [r3, #20]
 801d0d4:	2b0a      	cmp	r3, #10
 801d0d6:	d105      	bne.n	801d0e4 <tcp_input+0x24c>
 801d0d8:	4b10      	ldr	r3, [pc, #64]	@ (801d11c <tcp_input+0x284>)
 801d0da:	22fc      	movs	r2, #252	@ 0xfc
 801d0dc:	4920      	ldr	r1, [pc, #128]	@ (801d160 <tcp_input+0x2c8>)
 801d0de:	4811      	ldr	r0, [pc, #68]	@ (801d124 <tcp_input+0x28c>)
 801d0e0:	f00d f86c 	bl	802a1bc <iprintf>
    LWIP_ASSERT("tcp_input: active pcb->state != LISTEN", pcb->state != LISTEN);
 801d0e4:	69bb      	ldr	r3, [r7, #24]
 801d0e6:	7d1b      	ldrb	r3, [r3, #20]
 801d0e8:	2b01      	cmp	r3, #1
 801d0ea:	d105      	bne.n	801d0f8 <tcp_input+0x260>
 801d0ec:	4b0b      	ldr	r3, [pc, #44]	@ (801d11c <tcp_input+0x284>)
 801d0ee:	22fd      	movs	r2, #253	@ 0xfd
 801d0f0:	491c      	ldr	r1, [pc, #112]	@ (801d164 <tcp_input+0x2cc>)
 801d0f2:	480c      	ldr	r0, [pc, #48]	@ (801d124 <tcp_input+0x28c>)
 801d0f4:	f00d f862 	bl	802a1bc <iprintf>

    /* check if PCB is bound to specific netif */
    if ((pcb->netif_idx != NETIF_NO_INDEX) &&
 801d0f8:	69bb      	ldr	r3, [r7, #24]
 801d0fa:	7a1b      	ldrb	r3, [r3, #8]
 801d0fc:	2b00      	cmp	r3, #0
 801d0fe:	d033      	beq.n	801d168 <tcp_input+0x2d0>
        (pcb->netif_idx != netif_get_index(ip_data.current_input_netif))) {
 801d100:	69bb      	ldr	r3, [r7, #24]
 801d102:	7a1a      	ldrb	r2, [r3, #8]
 801d104:	4b09      	ldr	r3, [pc, #36]	@ (801d12c <tcp_input+0x294>)
 801d106:	685b      	ldr	r3, [r3, #4]
 801d108:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 801d10c:	3301      	adds	r3, #1
 801d10e:	b2db      	uxtb	r3, r3
    if ((pcb->netif_idx != NETIF_NO_INDEX) &&
 801d110:	429a      	cmp	r2, r3
 801d112:	d029      	beq.n	801d168 <tcp_input+0x2d0>
      prev = pcb;
 801d114:	69bb      	ldr	r3, [r7, #24]
 801d116:	61fb      	str	r3, [r7, #28]
      continue;
 801d118:	e06b      	b.n	801d1f2 <tcp_input+0x35a>
 801d11a:	bf00      	nop
 801d11c:	0802f5a4 	.word	0x0802f5a4
 801d120:	0802f5d8 	.word	0x0802f5d8
 801d124:	0802f5f0 	.word	0x0802f5f0
 801d128:	2402af84 	.word	0x2402af84
 801d12c:	24024408 	.word	0x24024408
 801d130:	2402af88 	.word	0x2402af88
 801d134:	2402af8c 	.word	0x2402af8c
 801d138:	2402af8a 	.word	0x2402af8a
 801d13c:	0802f618 	.word	0x0802f618
 801d140:	0802f628 	.word	0x0802f628
 801d144:	0802f634 	.word	0x0802f634
 801d148:	2402af94 	.word	0x2402af94
 801d14c:	2402af98 	.word	0x2402af98
 801d150:	2402afa0 	.word	0x2402afa0
 801d154:	2402af9e 	.word	0x2402af9e
 801d158:	2402af64 	.word	0x2402af64
 801d15c:	0802f654 	.word	0x0802f654
 801d160:	0802f67c 	.word	0x0802f67c
 801d164:	0802f6a8 	.word	0x0802f6a8
    }

    if (pcb->remote_port == tcphdr->src &&
 801d168:	69bb      	ldr	r3, [r7, #24]
 801d16a:	8b1a      	ldrh	r2, [r3, #24]
 801d16c:	4b72      	ldr	r3, [pc, #456]	@ (801d338 <tcp_input+0x4a0>)
 801d16e:	681b      	ldr	r3, [r3, #0]
 801d170:	881b      	ldrh	r3, [r3, #0]
 801d172:	b29b      	uxth	r3, r3
 801d174:	429a      	cmp	r2, r3
 801d176:	d13a      	bne.n	801d1ee <tcp_input+0x356>
        pcb->local_port == tcphdr->dest &&
 801d178:	69bb      	ldr	r3, [r7, #24]
 801d17a:	8ada      	ldrh	r2, [r3, #22]
 801d17c:	4b6e      	ldr	r3, [pc, #440]	@ (801d338 <tcp_input+0x4a0>)
 801d17e:	681b      	ldr	r3, [r3, #0]
 801d180:	885b      	ldrh	r3, [r3, #2]
 801d182:	b29b      	uxth	r3, r3
    if (pcb->remote_port == tcphdr->src &&
 801d184:	429a      	cmp	r2, r3
 801d186:	d132      	bne.n	801d1ee <tcp_input+0x356>
        ip_addr_cmp(&pcb->remote_ip, ip_current_src_addr()) &&
 801d188:	69bb      	ldr	r3, [r7, #24]
 801d18a:	685a      	ldr	r2, [r3, #4]
 801d18c:	4b6b      	ldr	r3, [pc, #428]	@ (801d33c <tcp_input+0x4a4>)
 801d18e:	691b      	ldr	r3, [r3, #16]
        pcb->local_port == tcphdr->dest &&
 801d190:	429a      	cmp	r2, r3
 801d192:	d12c      	bne.n	801d1ee <tcp_input+0x356>
        ip_addr_cmp(&pcb->local_ip, ip_current_dest_addr())) {
 801d194:	69bb      	ldr	r3, [r7, #24]
 801d196:	681a      	ldr	r2, [r3, #0]
 801d198:	4b68      	ldr	r3, [pc, #416]	@ (801d33c <tcp_input+0x4a4>)
 801d19a:	695b      	ldr	r3, [r3, #20]
        ip_addr_cmp(&pcb->remote_ip, ip_current_src_addr()) &&
 801d19c:	429a      	cmp	r2, r3
 801d19e:	d126      	bne.n	801d1ee <tcp_input+0x356>
      /* Move this PCB to the front of the list so that subsequent
         lookups will be faster (we exploit locality in TCP segment
         arrivals). */
      LWIP_ASSERT("tcp_input: pcb->next != pcb (before cache)", pcb->next != pcb);
 801d1a0:	69bb      	ldr	r3, [r7, #24]
 801d1a2:	68db      	ldr	r3, [r3, #12]
 801d1a4:	69ba      	ldr	r2, [r7, #24]
 801d1a6:	429a      	cmp	r2, r3
 801d1a8:	d106      	bne.n	801d1b8 <tcp_input+0x320>
 801d1aa:	4b65      	ldr	r3, [pc, #404]	@ (801d340 <tcp_input+0x4a8>)
 801d1ac:	f240 120d 	movw	r2, #269	@ 0x10d
 801d1b0:	4964      	ldr	r1, [pc, #400]	@ (801d344 <tcp_input+0x4ac>)
 801d1b2:	4865      	ldr	r0, [pc, #404]	@ (801d348 <tcp_input+0x4b0>)
 801d1b4:	f00d f802 	bl	802a1bc <iprintf>
      if (prev != NULL) {
 801d1b8:	69fb      	ldr	r3, [r7, #28]
 801d1ba:	2b00      	cmp	r3, #0
 801d1bc:	d00a      	beq.n	801d1d4 <tcp_input+0x33c>
        prev->next = pcb->next;
 801d1be:	69bb      	ldr	r3, [r7, #24]
 801d1c0:	68da      	ldr	r2, [r3, #12]
 801d1c2:	69fb      	ldr	r3, [r7, #28]
 801d1c4:	60da      	str	r2, [r3, #12]
        pcb->next = tcp_active_pcbs;
 801d1c6:	4b61      	ldr	r3, [pc, #388]	@ (801d34c <tcp_input+0x4b4>)
 801d1c8:	681a      	ldr	r2, [r3, #0]
 801d1ca:	69bb      	ldr	r3, [r7, #24]
 801d1cc:	60da      	str	r2, [r3, #12]
        tcp_active_pcbs = pcb;
 801d1ce:	4a5f      	ldr	r2, [pc, #380]	@ (801d34c <tcp_input+0x4b4>)
 801d1d0:	69bb      	ldr	r3, [r7, #24]
 801d1d2:	6013      	str	r3, [r2, #0]
      } else {
        TCP_STATS_INC(tcp.cachehit);
      }
      LWIP_ASSERT("tcp_input: pcb->next != pcb (after cache)", pcb->next != pcb);
 801d1d4:	69bb      	ldr	r3, [r7, #24]
 801d1d6:	68db      	ldr	r3, [r3, #12]
 801d1d8:	69ba      	ldr	r2, [r7, #24]
 801d1da:	429a      	cmp	r2, r3
 801d1dc:	d111      	bne.n	801d202 <tcp_input+0x36a>
 801d1de:	4b58      	ldr	r3, [pc, #352]	@ (801d340 <tcp_input+0x4a8>)
 801d1e0:	f240 1215 	movw	r2, #277	@ 0x115
 801d1e4:	495a      	ldr	r1, [pc, #360]	@ (801d350 <tcp_input+0x4b8>)
 801d1e6:	4858      	ldr	r0, [pc, #352]	@ (801d348 <tcp_input+0x4b0>)
 801d1e8:	f00c ffe8 	bl	802a1bc <iprintf>
      break;
 801d1ec:	e009      	b.n	801d202 <tcp_input+0x36a>
    }
    prev = pcb;
 801d1ee:	69bb      	ldr	r3, [r7, #24]
 801d1f0:	61fb      	str	r3, [r7, #28]
  for (pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) {
 801d1f2:	69bb      	ldr	r3, [r7, #24]
 801d1f4:	68db      	ldr	r3, [r3, #12]
 801d1f6:	61bb      	str	r3, [r7, #24]
 801d1f8:	69bb      	ldr	r3, [r7, #24]
 801d1fa:	2b00      	cmp	r3, #0
 801d1fc:	f47f af5e 	bne.w	801d0bc <tcp_input+0x224>
 801d200:	e000      	b.n	801d204 <tcp_input+0x36c>
      break;
 801d202:	bf00      	nop
  }

  if (pcb == NULL) {
 801d204:	69bb      	ldr	r3, [r7, #24]
 801d206:	2b00      	cmp	r3, #0
 801d208:	f040 80aa 	bne.w	801d360 <tcp_input+0x4c8>
    /* If it did not go to an active connection, we check the connections
       in the TIME-WAIT state. */
    for (pcb = tcp_tw_pcbs; pcb != NULL; pcb = pcb->next) {
 801d20c:	4b51      	ldr	r3, [pc, #324]	@ (801d354 <tcp_input+0x4bc>)
 801d20e:	681b      	ldr	r3, [r3, #0]
 801d210:	61bb      	str	r3, [r7, #24]
 801d212:	e03f      	b.n	801d294 <tcp_input+0x3fc>
      LWIP_ASSERT("tcp_input: TIME-WAIT pcb->state == TIME-WAIT", pcb->state == TIME_WAIT);
 801d214:	69bb      	ldr	r3, [r7, #24]
 801d216:	7d1b      	ldrb	r3, [r3, #20]
 801d218:	2b0a      	cmp	r3, #10
 801d21a:	d006      	beq.n	801d22a <tcp_input+0x392>
 801d21c:	4b48      	ldr	r3, [pc, #288]	@ (801d340 <tcp_input+0x4a8>)
 801d21e:	f240 121f 	movw	r2, #287	@ 0x11f
 801d222:	494d      	ldr	r1, [pc, #308]	@ (801d358 <tcp_input+0x4c0>)
 801d224:	4848      	ldr	r0, [pc, #288]	@ (801d348 <tcp_input+0x4b0>)
 801d226:	f00c ffc9 	bl	802a1bc <iprintf>

      /* check if PCB is bound to specific netif */
      if ((pcb->netif_idx != NETIF_NO_INDEX) &&
 801d22a:	69bb      	ldr	r3, [r7, #24]
 801d22c:	7a1b      	ldrb	r3, [r3, #8]
 801d22e:	2b00      	cmp	r3, #0
 801d230:	d009      	beq.n	801d246 <tcp_input+0x3ae>
          (pcb->netif_idx != netif_get_index(ip_data.current_input_netif))) {
 801d232:	69bb      	ldr	r3, [r7, #24]
 801d234:	7a1a      	ldrb	r2, [r3, #8]
 801d236:	4b41      	ldr	r3, [pc, #260]	@ (801d33c <tcp_input+0x4a4>)
 801d238:	685b      	ldr	r3, [r3, #4]
 801d23a:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 801d23e:	3301      	adds	r3, #1
 801d240:	b2db      	uxtb	r3, r3
      if ((pcb->netif_idx != NETIF_NO_INDEX) &&
 801d242:	429a      	cmp	r2, r3
 801d244:	d122      	bne.n	801d28c <tcp_input+0x3f4>
        continue;
      }

      if (pcb->remote_port == tcphdr->src &&
 801d246:	69bb      	ldr	r3, [r7, #24]
 801d248:	8b1a      	ldrh	r2, [r3, #24]
 801d24a:	4b3b      	ldr	r3, [pc, #236]	@ (801d338 <tcp_input+0x4a0>)
 801d24c:	681b      	ldr	r3, [r3, #0]
 801d24e:	881b      	ldrh	r3, [r3, #0]
 801d250:	b29b      	uxth	r3, r3
 801d252:	429a      	cmp	r2, r3
 801d254:	d11b      	bne.n	801d28e <tcp_input+0x3f6>
          pcb->local_port == tcphdr->dest &&
 801d256:	69bb      	ldr	r3, [r7, #24]
 801d258:	8ada      	ldrh	r2, [r3, #22]
 801d25a:	4b37      	ldr	r3, [pc, #220]	@ (801d338 <tcp_input+0x4a0>)
 801d25c:	681b      	ldr	r3, [r3, #0]
 801d25e:	885b      	ldrh	r3, [r3, #2]
 801d260:	b29b      	uxth	r3, r3
      if (pcb->remote_port == tcphdr->src &&
 801d262:	429a      	cmp	r2, r3
 801d264:	d113      	bne.n	801d28e <tcp_input+0x3f6>
          ip_addr_cmp(&pcb->remote_ip, ip_current_src_addr()) &&
 801d266:	69bb      	ldr	r3, [r7, #24]
 801d268:	685a      	ldr	r2, [r3, #4]
 801d26a:	4b34      	ldr	r3, [pc, #208]	@ (801d33c <tcp_input+0x4a4>)
 801d26c:	691b      	ldr	r3, [r3, #16]
          pcb->local_port == tcphdr->dest &&
 801d26e:	429a      	cmp	r2, r3
 801d270:	d10d      	bne.n	801d28e <tcp_input+0x3f6>
          ip_addr_cmp(&pcb->local_ip, ip_current_dest_addr())) {
 801d272:	69bb      	ldr	r3, [r7, #24]
 801d274:	681a      	ldr	r2, [r3, #0]
 801d276:	4b31      	ldr	r3, [pc, #196]	@ (801d33c <tcp_input+0x4a4>)
 801d278:	695b      	ldr	r3, [r3, #20]
          ip_addr_cmp(&pcb->remote_ip, ip_current_src_addr()) &&
 801d27a:	429a      	cmp	r2, r3
 801d27c:	d107      	bne.n	801d28e <tcp_input+0x3f6>
#ifdef LWIP_HOOK_TCP_INPACKET_PCB
        if (LWIP_HOOK_TCP_INPACKET_PCB(pcb, tcphdr, tcphdr_optlen, tcphdr_opt1len,
                                       tcphdr_opt2, p) == ERR_OK)
#endif
        {
          tcp_timewait_input(pcb);
 801d27e:	69b8      	ldr	r0, [r7, #24]
 801d280:	f000 fb56 	bl	801d930 <tcp_timewait_input>
        }
        pbuf_free(p);
 801d284:	6878      	ldr	r0, [r7, #4]
 801d286:	f7fd fd21 	bl	801accc <pbuf_free>
        return;
 801d28a:	e1fd      	b.n	801d688 <tcp_input+0x7f0>
        continue;
 801d28c:	bf00      	nop
    for (pcb = tcp_tw_pcbs; pcb != NULL; pcb = pcb->next) {
 801d28e:	69bb      	ldr	r3, [r7, #24]
 801d290:	68db      	ldr	r3, [r3, #12]
 801d292:	61bb      	str	r3, [r7, #24]
 801d294:	69bb      	ldr	r3, [r7, #24]
 801d296:	2b00      	cmp	r3, #0
 801d298:	d1bc      	bne.n	801d214 <tcp_input+0x37c>
      }
    }

    /* Finally, if we still did not get a match, we check all PCBs that
       are LISTENing for incoming connections. */
    prev = NULL;
 801d29a:	2300      	movs	r3, #0
 801d29c:	61fb      	str	r3, [r7, #28]
    for (lpcb = tcp_listen_pcbs.listen_pcbs; lpcb != NULL; lpcb = lpcb->next) {
 801d29e:	4b2f      	ldr	r3, [pc, #188]	@ (801d35c <tcp_input+0x4c4>)
 801d2a0:	681b      	ldr	r3, [r3, #0]
 801d2a2:	617b      	str	r3, [r7, #20]
 801d2a4:	e02a      	b.n	801d2fc <tcp_input+0x464>
      /* check if PCB is bound to specific netif */
      if ((lpcb->netif_idx != NETIF_NO_INDEX) &&
 801d2a6:	697b      	ldr	r3, [r7, #20]
 801d2a8:	7a1b      	ldrb	r3, [r3, #8]
 801d2aa:	2b00      	cmp	r3, #0
 801d2ac:	d00c      	beq.n	801d2c8 <tcp_input+0x430>
          (lpcb->netif_idx != netif_get_index(ip_data.current_input_netif))) {
 801d2ae:	697b      	ldr	r3, [r7, #20]
 801d2b0:	7a1a      	ldrb	r2, [r3, #8]
 801d2b2:	4b22      	ldr	r3, [pc, #136]	@ (801d33c <tcp_input+0x4a4>)
 801d2b4:	685b      	ldr	r3, [r3, #4]
 801d2b6:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 801d2ba:	3301      	adds	r3, #1
 801d2bc:	b2db      	uxtb	r3, r3
      if ((lpcb->netif_idx != NETIF_NO_INDEX) &&
 801d2be:	429a      	cmp	r2, r3
 801d2c0:	d002      	beq.n	801d2c8 <tcp_input+0x430>
        prev = (struct tcp_pcb *)lpcb;
 801d2c2:	697b      	ldr	r3, [r7, #20]
 801d2c4:	61fb      	str	r3, [r7, #28]
        continue;
 801d2c6:	e016      	b.n	801d2f6 <tcp_input+0x45e>
      }

      if (lpcb->local_port == tcphdr->dest) {
 801d2c8:	697b      	ldr	r3, [r7, #20]
 801d2ca:	8ada      	ldrh	r2, [r3, #22]
 801d2cc:	4b1a      	ldr	r3, [pc, #104]	@ (801d338 <tcp_input+0x4a0>)
 801d2ce:	681b      	ldr	r3, [r3, #0]
 801d2d0:	885b      	ldrh	r3, [r3, #2]
 801d2d2:	b29b      	uxth	r3, r3
 801d2d4:	429a      	cmp	r2, r3
 801d2d6:	d10c      	bne.n	801d2f2 <tcp_input+0x45a>
          lpcb_prev = prev;
#else /* SO_REUSE */
          break;
#endif /* SO_REUSE */
        } else if (IP_ADDR_PCB_VERSION_MATCH_EXACT(lpcb, ip_current_dest_addr())) {
          if (ip_addr_cmp(&lpcb->local_ip, ip_current_dest_addr())) {
 801d2d8:	697b      	ldr	r3, [r7, #20]
 801d2da:	681a      	ldr	r2, [r3, #0]
 801d2dc:	4b17      	ldr	r3, [pc, #92]	@ (801d33c <tcp_input+0x4a4>)
 801d2de:	695b      	ldr	r3, [r3, #20]
 801d2e0:	429a      	cmp	r2, r3
 801d2e2:	d00f      	beq.n	801d304 <tcp_input+0x46c>
            /* found an exact match */
            break;
          } else if (ip_addr_isany(&lpcb->local_ip)) {
 801d2e4:	697b      	ldr	r3, [r7, #20]
 801d2e6:	2b00      	cmp	r3, #0
 801d2e8:	d00d      	beq.n	801d306 <tcp_input+0x46e>
 801d2ea:	697b      	ldr	r3, [r7, #20]
 801d2ec:	681b      	ldr	r3, [r3, #0]
 801d2ee:	2b00      	cmp	r3, #0
 801d2f0:	d009      	beq.n	801d306 <tcp_input+0x46e>
            break;
#endif /* SO_REUSE */
          }
        }
      }
      prev = (struct tcp_pcb *)lpcb;
 801d2f2:	697b      	ldr	r3, [r7, #20]
 801d2f4:	61fb      	str	r3, [r7, #28]
    for (lpcb = tcp_listen_pcbs.listen_pcbs; lpcb != NULL; lpcb = lpcb->next) {
 801d2f6:	697b      	ldr	r3, [r7, #20]
 801d2f8:	68db      	ldr	r3, [r3, #12]
 801d2fa:	617b      	str	r3, [r7, #20]
 801d2fc:	697b      	ldr	r3, [r7, #20]
 801d2fe:	2b00      	cmp	r3, #0
 801d300:	d1d1      	bne.n	801d2a6 <tcp_input+0x40e>
 801d302:	e000      	b.n	801d306 <tcp_input+0x46e>
            break;
 801d304:	bf00      	nop
      /* only pass to ANY if no specific local IP has been found */
      lpcb = lpcb_any;
      prev = lpcb_prev;
    }
#endif /* SO_REUSE */
    if (lpcb != NULL) {
 801d306:	697b      	ldr	r3, [r7, #20]
 801d308:	2b00      	cmp	r3, #0
 801d30a:	d029      	beq.n	801d360 <tcp_input+0x4c8>
      /* Move this PCB to the front of the list so that subsequent
         lookups will be faster (we exploit locality in TCP segment
         arrivals). */
      if (prev != NULL) {
 801d30c:	69fb      	ldr	r3, [r7, #28]
 801d30e:	2b00      	cmp	r3, #0
 801d310:	d00a      	beq.n	801d328 <tcp_input+0x490>
        ((struct tcp_pcb_listen *)prev)->next = lpcb->next;
 801d312:	697b      	ldr	r3, [r7, #20]
 801d314:	68da      	ldr	r2, [r3, #12]
 801d316:	69fb      	ldr	r3, [r7, #28]
 801d318:	60da      	str	r2, [r3, #12]
        /* our successor is the remainder of the listening list */
        lpcb->next = tcp_listen_pcbs.listen_pcbs;
 801d31a:	4b10      	ldr	r3, [pc, #64]	@ (801d35c <tcp_input+0x4c4>)
 801d31c:	681a      	ldr	r2, [r3, #0]
 801d31e:	697b      	ldr	r3, [r7, #20]
 801d320:	60da      	str	r2, [r3, #12]
        /* put this listening pcb at the head of the listening list */
        tcp_listen_pcbs.listen_pcbs = lpcb;
 801d322:	4a0e      	ldr	r2, [pc, #56]	@ (801d35c <tcp_input+0x4c4>)
 801d324:	697b      	ldr	r3, [r7, #20]
 801d326:	6013      	str	r3, [r2, #0]
#ifdef LWIP_HOOK_TCP_INPACKET_PCB
      if (LWIP_HOOK_TCP_INPACKET_PCB((struct tcp_pcb *)lpcb, tcphdr, tcphdr_optlen,
                                     tcphdr_opt1len, tcphdr_opt2, p) == ERR_OK)
#endif
      {
        tcp_listen_input(lpcb);
 801d328:	6978      	ldr	r0, [r7, #20]
 801d32a:	f000 fa03 	bl	801d734 <tcp_listen_input>
      }
      pbuf_free(p);
 801d32e:	6878      	ldr	r0, [r7, #4]
 801d330:	f7fd fccc 	bl	801accc <pbuf_free>
      return;
 801d334:	e1a8      	b.n	801d688 <tcp_input+0x7f0>
 801d336:	bf00      	nop
 801d338:	2402af84 	.word	0x2402af84
 801d33c:	24024408 	.word	0x24024408
 801d340:	0802f5a4 	.word	0x0802f5a4
 801d344:	0802f6d0 	.word	0x0802f6d0
 801d348:	0802f5f0 	.word	0x0802f5f0
 801d34c:	2402af64 	.word	0x2402af64
 801d350:	0802f6fc 	.word	0x0802f6fc
 801d354:	2402af68 	.word	0x2402af68
 801d358:	0802f728 	.word	0x0802f728
 801d35c:	2402af60 	.word	0x2402af60
      tcphdr_opt1len, tcphdr_opt2, p) != ERR_OK) {
    pbuf_free(p);
    return;
  }
#endif
  if (pcb != NULL) {
 801d360:	69bb      	ldr	r3, [r7, #24]
 801d362:	2b00      	cmp	r3, #0
 801d364:	f000 8158 	beq.w	801d618 <tcp_input+0x780>
#if TCP_INPUT_DEBUG
    tcp_debug_print_state(pcb->state);
#endif /* TCP_INPUT_DEBUG */

    /* Set up a tcp_seg structure. */
    inseg.next = NULL;
 801d368:	4b95      	ldr	r3, [pc, #596]	@ (801d5c0 <tcp_input+0x728>)
 801d36a:	2200      	movs	r2, #0
 801d36c:	601a      	str	r2, [r3, #0]
    inseg.len = p->tot_len;
 801d36e:	687b      	ldr	r3, [r7, #4]
 801d370:	891a      	ldrh	r2, [r3, #8]
 801d372:	4b93      	ldr	r3, [pc, #588]	@ (801d5c0 <tcp_input+0x728>)
 801d374:	811a      	strh	r2, [r3, #8]
    inseg.p = p;
 801d376:	4a92      	ldr	r2, [pc, #584]	@ (801d5c0 <tcp_input+0x728>)
 801d378:	687b      	ldr	r3, [r7, #4]
 801d37a:	6053      	str	r3, [r2, #4]
    inseg.tcphdr = tcphdr;
 801d37c:	4b91      	ldr	r3, [pc, #580]	@ (801d5c4 <tcp_input+0x72c>)
 801d37e:	681b      	ldr	r3, [r3, #0]
 801d380:	4a8f      	ldr	r2, [pc, #572]	@ (801d5c0 <tcp_input+0x728>)
 801d382:	6113      	str	r3, [r2, #16]

    recv_data = NULL;
 801d384:	4b90      	ldr	r3, [pc, #576]	@ (801d5c8 <tcp_input+0x730>)
 801d386:	2200      	movs	r2, #0
 801d388:	601a      	str	r2, [r3, #0]
    recv_flags = 0;
 801d38a:	4b90      	ldr	r3, [pc, #576]	@ (801d5cc <tcp_input+0x734>)
 801d38c:	2200      	movs	r2, #0
 801d38e:	701a      	strb	r2, [r3, #0]
    recv_acked = 0;
 801d390:	4b8f      	ldr	r3, [pc, #572]	@ (801d5d0 <tcp_input+0x738>)
 801d392:	2200      	movs	r2, #0
 801d394:	801a      	strh	r2, [r3, #0]

    if (flags & TCP_PSH) {
 801d396:	4b8f      	ldr	r3, [pc, #572]	@ (801d5d4 <tcp_input+0x73c>)
 801d398:	781b      	ldrb	r3, [r3, #0]
 801d39a:	f003 0308 	and.w	r3, r3, #8
 801d39e:	2b00      	cmp	r3, #0
 801d3a0:	d006      	beq.n	801d3b0 <tcp_input+0x518>
      p->flags |= PBUF_FLAG_PUSH;
 801d3a2:	687b      	ldr	r3, [r7, #4]
 801d3a4:	7b5b      	ldrb	r3, [r3, #13]
 801d3a6:	f043 0301 	orr.w	r3, r3, #1
 801d3aa:	b2da      	uxtb	r2, r3
 801d3ac:	687b      	ldr	r3, [r7, #4]
 801d3ae:	735a      	strb	r2, [r3, #13]
    }

    /* If there is data which was previously "refused" by upper layer */
    if (pcb->refused_data != NULL) {
 801d3b0:	69bb      	ldr	r3, [r7, #24]
 801d3b2:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 801d3b4:	2b00      	cmp	r3, #0
 801d3b6:	d017      	beq.n	801d3e8 <tcp_input+0x550>
      if ((tcp_process_refused_data(pcb) == ERR_ABRT) ||
 801d3b8:	69b8      	ldr	r0, [r7, #24]
 801d3ba:	f7ff f84d 	bl	801c458 <tcp_process_refused_data>
 801d3be:	4603      	mov	r3, r0
 801d3c0:	f113 0f0d 	cmn.w	r3, #13
 801d3c4:	d007      	beq.n	801d3d6 <tcp_input+0x53e>
          ((pcb->refused_data != NULL) && (tcplen > 0))) {
 801d3c6:	69bb      	ldr	r3, [r7, #24]
 801d3c8:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
      if ((tcp_process_refused_data(pcb) == ERR_ABRT) ||
 801d3ca:	2b00      	cmp	r3, #0
 801d3cc:	d00c      	beq.n	801d3e8 <tcp_input+0x550>
          ((pcb->refused_data != NULL) && (tcplen > 0))) {
 801d3ce:	4b82      	ldr	r3, [pc, #520]	@ (801d5d8 <tcp_input+0x740>)
 801d3d0:	881b      	ldrh	r3, [r3, #0]
 801d3d2:	2b00      	cmp	r3, #0
 801d3d4:	d008      	beq.n	801d3e8 <tcp_input+0x550>
        /* pcb has been aborted or refused data is still refused and the new
           segment contains data */
        if (pcb->rcv_ann_wnd == 0) {
 801d3d6:	69bb      	ldr	r3, [r7, #24]
 801d3d8:	8d5b      	ldrh	r3, [r3, #42]	@ 0x2a
 801d3da:	2b00      	cmp	r3, #0
 801d3dc:	f040 80e4 	bne.w	801d5a8 <tcp_input+0x710>
          /* this is a zero-window probe, we respond to it with current RCV.NXT
          and drop the data segment */
          tcp_send_empty_ack(pcb);
 801d3e0:	69b8      	ldr	r0, [r7, #24]
 801d3e2:	f003 fe73 	bl	80210cc <tcp_send_empty_ack>
        }
        TCP_STATS_INC(tcp.drop);
        MIB2_STATS_INC(mib2.tcpinerrs);
        goto aborted;
 801d3e6:	e0df      	b.n	801d5a8 <tcp_input+0x710>
      }
    }
    tcp_input_pcb = pcb;
 801d3e8:	4a7c      	ldr	r2, [pc, #496]	@ (801d5dc <tcp_input+0x744>)
 801d3ea:	69bb      	ldr	r3, [r7, #24]
 801d3ec:	6013      	str	r3, [r2, #0]
    err = tcp_process(pcb);
 801d3ee:	69b8      	ldr	r0, [r7, #24]
 801d3f0:	f000 fb18 	bl	801da24 <tcp_process>
 801d3f4:	4603      	mov	r3, r0
 801d3f6:	74fb      	strb	r3, [r7, #19]
    /* A return value of ERR_ABRT means that tcp_abort() was called
       and that the pcb has been freed. If so, we don't do anything. */
    if (err != ERR_ABRT) {
 801d3f8:	f997 3013 	ldrsb.w	r3, [r7, #19]
 801d3fc:	f113 0f0d 	cmn.w	r3, #13
 801d400:	f000 80d4 	beq.w	801d5ac <tcp_input+0x714>
      if (recv_flags & TF_RESET) {
 801d404:	4b71      	ldr	r3, [pc, #452]	@ (801d5cc <tcp_input+0x734>)
 801d406:	781b      	ldrb	r3, [r3, #0]
 801d408:	f003 0308 	and.w	r3, r3, #8
 801d40c:	2b00      	cmp	r3, #0
 801d40e:	d015      	beq.n	801d43c <tcp_input+0x5a4>
        /* TF_RESET means that the connection was reset by the other
           end. We then call the error callback to inform the
           application that the connection is dead before we
           deallocate the PCB. */
        TCP_EVENT_ERR(pcb->state, pcb->errf, pcb->callback_arg, ERR_RST);
 801d410:	69bb      	ldr	r3, [r7, #24]
 801d412:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 801d416:	2b00      	cmp	r3, #0
 801d418:	d008      	beq.n	801d42c <tcp_input+0x594>
 801d41a:	69bb      	ldr	r3, [r7, #24]
 801d41c:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 801d420:	69ba      	ldr	r2, [r7, #24]
 801d422:	6912      	ldr	r2, [r2, #16]
 801d424:	f06f 010d 	mvn.w	r1, #13
 801d428:	4610      	mov	r0, r2
 801d42a:	4798      	blx	r3
        tcp_pcb_remove(&tcp_active_pcbs, pcb);
 801d42c:	69b9      	ldr	r1, [r7, #24]
 801d42e:	486c      	ldr	r0, [pc, #432]	@ (801d5e0 <tcp_input+0x748>)
 801d430:	f7ff fbba 	bl	801cba8 <tcp_pcb_remove>
        tcp_free(pcb);
 801d434:	69b8      	ldr	r0, [r7, #24]
 801d436:	f7fd ff05 	bl	801b244 <tcp_free>
 801d43a:	e0da      	b.n	801d5f2 <tcp_input+0x75a>
      } else {
        err = ERR_OK;
 801d43c:	2300      	movs	r3, #0
 801d43e:	74fb      	strb	r3, [r7, #19]
        /* If the application has registered a "sent" function to be
           called when new send buffer space is available, we call it
           now. */
        if (recv_acked > 0) {
 801d440:	4b63      	ldr	r3, [pc, #396]	@ (801d5d0 <tcp_input+0x738>)
 801d442:	881b      	ldrh	r3, [r3, #0]
 801d444:	2b00      	cmp	r3, #0
 801d446:	d01d      	beq.n	801d484 <tcp_input+0x5ec>
          while (acked > 0) {
            acked16 = (u16_t)LWIP_MIN(acked, 0xffffu);
            acked -= acked16;
#else
          {
            acked16 = recv_acked;
 801d448:	4b61      	ldr	r3, [pc, #388]	@ (801d5d0 <tcp_input+0x738>)
 801d44a:	881b      	ldrh	r3, [r3, #0]
 801d44c:	81fb      	strh	r3, [r7, #14]
#endif
            TCP_EVENT_SENT(pcb, (u16_t)acked16, err);
 801d44e:	69bb      	ldr	r3, [r7, #24]
 801d450:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 801d454:	2b00      	cmp	r3, #0
 801d456:	d00a      	beq.n	801d46e <tcp_input+0x5d6>
 801d458:	69bb      	ldr	r3, [r7, #24]
 801d45a:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 801d45e:	69ba      	ldr	r2, [r7, #24]
 801d460:	6910      	ldr	r0, [r2, #16]
 801d462:	89fa      	ldrh	r2, [r7, #14]
 801d464:	69b9      	ldr	r1, [r7, #24]
 801d466:	4798      	blx	r3
 801d468:	4603      	mov	r3, r0
 801d46a:	74fb      	strb	r3, [r7, #19]
 801d46c:	e001      	b.n	801d472 <tcp_input+0x5da>
 801d46e:	2300      	movs	r3, #0
 801d470:	74fb      	strb	r3, [r7, #19]
            if (err == ERR_ABRT) {
 801d472:	f997 3013 	ldrsb.w	r3, [r7, #19]
 801d476:	f113 0f0d 	cmn.w	r3, #13
 801d47a:	f000 8099 	beq.w	801d5b0 <tcp_input+0x718>
              goto aborted;
            }
          }
          recv_acked = 0;
 801d47e:	4b54      	ldr	r3, [pc, #336]	@ (801d5d0 <tcp_input+0x738>)
 801d480:	2200      	movs	r2, #0
 801d482:	801a      	strh	r2, [r3, #0]
        }
        if (tcp_input_delayed_close(pcb)) {
 801d484:	69b8      	ldr	r0, [r7, #24]
 801d486:	f000 f915 	bl	801d6b4 <tcp_input_delayed_close>
 801d48a:	4603      	mov	r3, r0
 801d48c:	2b00      	cmp	r3, #0
 801d48e:	f040 8091 	bne.w	801d5b4 <tcp_input+0x71c>
#if TCP_QUEUE_OOSEQ && LWIP_WND_SCALE
        while (recv_data != NULL) {
          struct pbuf *rest = NULL;
          pbuf_split_64k(recv_data, &rest);
#else /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */
        if (recv_data != NULL) {
 801d492:	4b4d      	ldr	r3, [pc, #308]	@ (801d5c8 <tcp_input+0x730>)
 801d494:	681b      	ldr	r3, [r3, #0]
 801d496:	2b00      	cmp	r3, #0
 801d498:	d041      	beq.n	801d51e <tcp_input+0x686>
#endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */

          LWIP_ASSERT("pcb->refused_data == NULL", pcb->refused_data == NULL);
 801d49a:	69bb      	ldr	r3, [r7, #24]
 801d49c:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 801d49e:	2b00      	cmp	r3, #0
 801d4a0:	d006      	beq.n	801d4b0 <tcp_input+0x618>
 801d4a2:	4b50      	ldr	r3, [pc, #320]	@ (801d5e4 <tcp_input+0x74c>)
 801d4a4:	f44f 72f3 	mov.w	r2, #486	@ 0x1e6
 801d4a8:	494f      	ldr	r1, [pc, #316]	@ (801d5e8 <tcp_input+0x750>)
 801d4aa:	4850      	ldr	r0, [pc, #320]	@ (801d5ec <tcp_input+0x754>)
 801d4ac:	f00c fe86 	bl	802a1bc <iprintf>
          if (pcb->flags & TF_RXCLOSED) {
 801d4b0:	69bb      	ldr	r3, [r7, #24]
 801d4b2:	8b5b      	ldrh	r3, [r3, #26]
 801d4b4:	f003 0310 	and.w	r3, r3, #16
 801d4b8:	2b00      	cmp	r3, #0
 801d4ba:	d008      	beq.n	801d4ce <tcp_input+0x636>
            /* received data although already closed -> abort (send RST) to
               notify the remote host that not all data has been processed */
            pbuf_free(recv_data);
 801d4bc:	4b42      	ldr	r3, [pc, #264]	@ (801d5c8 <tcp_input+0x730>)
 801d4be:	681b      	ldr	r3, [r3, #0]
 801d4c0:	4618      	mov	r0, r3
 801d4c2:	f7fd fc03 	bl	801accc <pbuf_free>
#if TCP_QUEUE_OOSEQ && LWIP_WND_SCALE
            if (rest != NULL) {
              pbuf_free(rest);
            }
#endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */
            tcp_abort(pcb);
 801d4c6:	69b8      	ldr	r0, [r7, #24]
 801d4c8:	f7fe fa06 	bl	801b8d8 <tcp_abort>
            goto aborted;
 801d4cc:	e091      	b.n	801d5f2 <tcp_input+0x75a>
          }

          /* Notify application that data has been received. */
          TCP_EVENT_RECV(pcb, recv_data, ERR_OK, err);
 801d4ce:	69bb      	ldr	r3, [r7, #24]
 801d4d0:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 801d4d4:	2b00      	cmp	r3, #0
 801d4d6:	d00c      	beq.n	801d4f2 <tcp_input+0x65a>
 801d4d8:	69bb      	ldr	r3, [r7, #24]
 801d4da:	f8d3 4084 	ldr.w	r4, [r3, #132]	@ 0x84
 801d4de:	69bb      	ldr	r3, [r7, #24]
 801d4e0:	6918      	ldr	r0, [r3, #16]
 801d4e2:	4b39      	ldr	r3, [pc, #228]	@ (801d5c8 <tcp_input+0x730>)
 801d4e4:	681a      	ldr	r2, [r3, #0]
 801d4e6:	2300      	movs	r3, #0
 801d4e8:	69b9      	ldr	r1, [r7, #24]
 801d4ea:	47a0      	blx	r4
 801d4ec:	4603      	mov	r3, r0
 801d4ee:	74fb      	strb	r3, [r7, #19]
 801d4f0:	e008      	b.n	801d504 <tcp_input+0x66c>
 801d4f2:	4b35      	ldr	r3, [pc, #212]	@ (801d5c8 <tcp_input+0x730>)
 801d4f4:	681a      	ldr	r2, [r3, #0]
 801d4f6:	2300      	movs	r3, #0
 801d4f8:	69b9      	ldr	r1, [r7, #24]
 801d4fa:	2000      	movs	r0, #0
 801d4fc:	f7ff f884 	bl	801c608 <tcp_recv_null>
 801d500:	4603      	mov	r3, r0
 801d502:	74fb      	strb	r3, [r7, #19]
          if (err == ERR_ABRT) {
 801d504:	f997 3013 	ldrsb.w	r3, [r7, #19]
 801d508:	f113 0f0d 	cmn.w	r3, #13
 801d50c:	d054      	beq.n	801d5b8 <tcp_input+0x720>
#endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */
            goto aborted;
          }

          /* If the upper layer can't receive this data, store it */
          if (err != ERR_OK) {
 801d50e:	f997 3013 	ldrsb.w	r3, [r7, #19]
 801d512:	2b00      	cmp	r3, #0
 801d514:	d003      	beq.n	801d51e <tcp_input+0x686>
#if TCP_QUEUE_OOSEQ && LWIP_WND_SCALE
            if (rest != NULL) {
              pbuf_cat(recv_data, rest);
            }
#endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */
            pcb->refused_data = recv_data;
 801d516:	4b2c      	ldr	r3, [pc, #176]	@ (801d5c8 <tcp_input+0x730>)
 801d518:	681a      	ldr	r2, [r3, #0]
 801d51a:	69bb      	ldr	r3, [r7, #24]
 801d51c:	679a      	str	r2, [r3, #120]	@ 0x78
          }
        }

        /* If a FIN segment was received, we call the callback
           function with a NULL buffer to indicate EOF. */
        if (recv_flags & TF_GOT_FIN) {
 801d51e:	4b2b      	ldr	r3, [pc, #172]	@ (801d5cc <tcp_input+0x734>)
 801d520:	781b      	ldrb	r3, [r3, #0]
 801d522:	f003 0320 	and.w	r3, r3, #32
 801d526:	2b00      	cmp	r3, #0
 801d528:	d031      	beq.n	801d58e <tcp_input+0x6f6>
          if (pcb->refused_data != NULL) {
 801d52a:	69bb      	ldr	r3, [r7, #24]
 801d52c:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 801d52e:	2b00      	cmp	r3, #0
 801d530:	d009      	beq.n	801d546 <tcp_input+0x6ae>
            /* Delay this if we have refused data. */
            pcb->refused_data->flags |= PBUF_FLAG_TCP_FIN;
 801d532:	69bb      	ldr	r3, [r7, #24]
 801d534:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 801d536:	7b5a      	ldrb	r2, [r3, #13]
 801d538:	69bb      	ldr	r3, [r7, #24]
 801d53a:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 801d53c:	f042 0220 	orr.w	r2, r2, #32
 801d540:	b2d2      	uxtb	r2, r2
 801d542:	735a      	strb	r2, [r3, #13]
 801d544:	e023      	b.n	801d58e <tcp_input+0x6f6>
          } else {
            /* correct rcv_wnd as the application won't call tcp_recved()
               for the FIN's seqno */
            if (pcb->rcv_wnd != TCP_WND_MAX(pcb)) {
 801d546:	69bb      	ldr	r3, [r7, #24]
 801d548:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 801d54a:	f241 62d0 	movw	r2, #5840	@ 0x16d0
 801d54e:	4293      	cmp	r3, r2
 801d550:	d005      	beq.n	801d55e <tcp_input+0x6c6>
              pcb->rcv_wnd++;
 801d552:	69bb      	ldr	r3, [r7, #24]
 801d554:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 801d556:	3301      	adds	r3, #1
 801d558:	b29a      	uxth	r2, r3
 801d55a:	69bb      	ldr	r3, [r7, #24]
 801d55c:	851a      	strh	r2, [r3, #40]	@ 0x28
            }
            TCP_EVENT_CLOSED(pcb, err);
 801d55e:	69bb      	ldr	r3, [r7, #24]
 801d560:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 801d564:	2b00      	cmp	r3, #0
 801d566:	d00b      	beq.n	801d580 <tcp_input+0x6e8>
 801d568:	69bb      	ldr	r3, [r7, #24]
 801d56a:	f8d3 4084 	ldr.w	r4, [r3, #132]	@ 0x84
 801d56e:	69bb      	ldr	r3, [r7, #24]
 801d570:	6918      	ldr	r0, [r3, #16]
 801d572:	2300      	movs	r3, #0
 801d574:	2200      	movs	r2, #0
 801d576:	69b9      	ldr	r1, [r7, #24]
 801d578:	47a0      	blx	r4
 801d57a:	4603      	mov	r3, r0
 801d57c:	74fb      	strb	r3, [r7, #19]
 801d57e:	e001      	b.n	801d584 <tcp_input+0x6ec>
 801d580:	2300      	movs	r3, #0
 801d582:	74fb      	strb	r3, [r7, #19]
            if (err == ERR_ABRT) {
 801d584:	f997 3013 	ldrsb.w	r3, [r7, #19]
 801d588:	f113 0f0d 	cmn.w	r3, #13
 801d58c:	d016      	beq.n	801d5bc <tcp_input+0x724>
              goto aborted;
            }
          }
        }

        tcp_input_pcb = NULL;
 801d58e:	4b13      	ldr	r3, [pc, #76]	@ (801d5dc <tcp_input+0x744>)
 801d590:	2200      	movs	r2, #0
 801d592:	601a      	str	r2, [r3, #0]
        if (tcp_input_delayed_close(pcb)) {
 801d594:	69b8      	ldr	r0, [r7, #24]
 801d596:	f000 f88d 	bl	801d6b4 <tcp_input_delayed_close>
 801d59a:	4603      	mov	r3, r0
 801d59c:	2b00      	cmp	r3, #0
 801d59e:	d127      	bne.n	801d5f0 <tcp_input+0x758>
          goto aborted;
        }
        /* Try to send something out. */
        tcp_output(pcb);
 801d5a0:	69b8      	ldr	r0, [r7, #24]
 801d5a2:	f002 ff7f 	bl	80204a4 <tcp_output>
 801d5a6:	e024      	b.n	801d5f2 <tcp_input+0x75a>
        goto aborted;
 801d5a8:	bf00      	nop
 801d5aa:	e022      	b.n	801d5f2 <tcp_input+0x75a>
#endif /* TCP_INPUT_DEBUG */
      }
    }
    /* Jump target if pcb has been aborted in a callback (by calling tcp_abort()).
       Below this line, 'pcb' may not be dereferenced! */
aborted:
 801d5ac:	bf00      	nop
 801d5ae:	e020      	b.n	801d5f2 <tcp_input+0x75a>
              goto aborted;
 801d5b0:	bf00      	nop
 801d5b2:	e01e      	b.n	801d5f2 <tcp_input+0x75a>
          goto aborted;
 801d5b4:	bf00      	nop
 801d5b6:	e01c      	b.n	801d5f2 <tcp_input+0x75a>
            goto aborted;
 801d5b8:	bf00      	nop
 801d5ba:	e01a      	b.n	801d5f2 <tcp_input+0x75a>
              goto aborted;
 801d5bc:	bf00      	nop
 801d5be:	e018      	b.n	801d5f2 <tcp_input+0x75a>
 801d5c0:	2402af70 	.word	0x2402af70
 801d5c4:	2402af84 	.word	0x2402af84
 801d5c8:	2402afa4 	.word	0x2402afa4
 801d5cc:	2402afa1 	.word	0x2402afa1
 801d5d0:	2402af9c 	.word	0x2402af9c
 801d5d4:	2402afa0 	.word	0x2402afa0
 801d5d8:	2402af9e 	.word	0x2402af9e
 801d5dc:	2402afa8 	.word	0x2402afa8
 801d5e0:	2402af64 	.word	0x2402af64
 801d5e4:	0802f5a4 	.word	0x0802f5a4
 801d5e8:	0802f758 	.word	0x0802f758
 801d5ec:	0802f5f0 	.word	0x0802f5f0
          goto aborted;
 801d5f0:	bf00      	nop
    tcp_input_pcb = NULL;
 801d5f2:	4b27      	ldr	r3, [pc, #156]	@ (801d690 <tcp_input+0x7f8>)
 801d5f4:	2200      	movs	r2, #0
 801d5f6:	601a      	str	r2, [r3, #0]
    recv_data = NULL;
 801d5f8:	4b26      	ldr	r3, [pc, #152]	@ (801d694 <tcp_input+0x7fc>)
 801d5fa:	2200      	movs	r2, #0
 801d5fc:	601a      	str	r2, [r3, #0]

    /* give up our reference to inseg.p */
    if (inseg.p != NULL) {
 801d5fe:	4b26      	ldr	r3, [pc, #152]	@ (801d698 <tcp_input+0x800>)
 801d600:	685b      	ldr	r3, [r3, #4]
 801d602:	2b00      	cmp	r3, #0
 801d604:	d03f      	beq.n	801d686 <tcp_input+0x7ee>
      pbuf_free(inseg.p);
 801d606:	4b24      	ldr	r3, [pc, #144]	@ (801d698 <tcp_input+0x800>)
 801d608:	685b      	ldr	r3, [r3, #4]
 801d60a:	4618      	mov	r0, r3
 801d60c:	f7fd fb5e 	bl	801accc <pbuf_free>
      inseg.p = NULL;
 801d610:	4b21      	ldr	r3, [pc, #132]	@ (801d698 <tcp_input+0x800>)
 801d612:	2200      	movs	r2, #0
 801d614:	605a      	str	r2, [r3, #4]
    pbuf_free(p);
  }

  LWIP_ASSERT("tcp_input: tcp_pcbs_sane()", tcp_pcbs_sane());
  PERF_STOP("tcp_input");
  return;
 801d616:	e036      	b.n	801d686 <tcp_input+0x7ee>
    if (!(TCPH_FLAGS(tcphdr) & TCP_RST)) {
 801d618:	4b20      	ldr	r3, [pc, #128]	@ (801d69c <tcp_input+0x804>)
 801d61a:	681b      	ldr	r3, [r3, #0]
 801d61c:	899b      	ldrh	r3, [r3, #12]
 801d61e:	b29b      	uxth	r3, r3
 801d620:	4618      	mov	r0, r3
 801d622:	f7fb fe71 	bl	8019308 <lwip_htons>
 801d626:	4603      	mov	r3, r0
 801d628:	b2db      	uxtb	r3, r3
 801d62a:	f003 0304 	and.w	r3, r3, #4
 801d62e:	2b00      	cmp	r3, #0
 801d630:	d118      	bne.n	801d664 <tcp_input+0x7cc>
      tcp_rst(NULL, ackno, seqno + tcplen, ip_current_dest_addr(),
 801d632:	4b1b      	ldr	r3, [pc, #108]	@ (801d6a0 <tcp_input+0x808>)
 801d634:	6819      	ldr	r1, [r3, #0]
 801d636:	4b1b      	ldr	r3, [pc, #108]	@ (801d6a4 <tcp_input+0x80c>)
 801d638:	881b      	ldrh	r3, [r3, #0]
 801d63a:	461a      	mov	r2, r3
 801d63c:	4b1a      	ldr	r3, [pc, #104]	@ (801d6a8 <tcp_input+0x810>)
 801d63e:	681b      	ldr	r3, [r3, #0]
 801d640:	18d0      	adds	r0, r2, r3
              ip_current_src_addr(), tcphdr->dest, tcphdr->src);
 801d642:	4b16      	ldr	r3, [pc, #88]	@ (801d69c <tcp_input+0x804>)
 801d644:	681b      	ldr	r3, [r3, #0]
      tcp_rst(NULL, ackno, seqno + tcplen, ip_current_dest_addr(),
 801d646:	885b      	ldrh	r3, [r3, #2]
 801d648:	b29b      	uxth	r3, r3
              ip_current_src_addr(), tcphdr->dest, tcphdr->src);
 801d64a:	4a14      	ldr	r2, [pc, #80]	@ (801d69c <tcp_input+0x804>)
 801d64c:	6812      	ldr	r2, [r2, #0]
      tcp_rst(NULL, ackno, seqno + tcplen, ip_current_dest_addr(),
 801d64e:	8812      	ldrh	r2, [r2, #0]
 801d650:	b292      	uxth	r2, r2
 801d652:	9202      	str	r2, [sp, #8]
 801d654:	9301      	str	r3, [sp, #4]
 801d656:	4b15      	ldr	r3, [pc, #84]	@ (801d6ac <tcp_input+0x814>)
 801d658:	9300      	str	r3, [sp, #0]
 801d65a:	4b15      	ldr	r3, [pc, #84]	@ (801d6b0 <tcp_input+0x818>)
 801d65c:	4602      	mov	r2, r0
 801d65e:	2000      	movs	r0, #0
 801d660:	f003 fce2 	bl	8021028 <tcp_rst>
    pbuf_free(p);
 801d664:	6878      	ldr	r0, [r7, #4]
 801d666:	f7fd fb31 	bl	801accc <pbuf_free>
  return;
 801d66a:	e00c      	b.n	801d686 <tcp_input+0x7ee>
    goto dropped;
 801d66c:	bf00      	nop
 801d66e:	e006      	b.n	801d67e <tcp_input+0x7e6>
    goto dropped;
 801d670:	bf00      	nop
 801d672:	e004      	b.n	801d67e <tcp_input+0x7e6>
    goto dropped;
 801d674:	bf00      	nop
 801d676:	e002      	b.n	801d67e <tcp_input+0x7e6>
      goto dropped;
 801d678:	bf00      	nop
 801d67a:	e000      	b.n	801d67e <tcp_input+0x7e6>
      goto dropped;
 801d67c:	bf00      	nop
dropped:
  TCP_STATS_INC(tcp.drop);
  MIB2_STATS_INC(mib2.tcpinerrs);
  pbuf_free(p);
 801d67e:	6878      	ldr	r0, [r7, #4]
 801d680:	f7fd fb24 	bl	801accc <pbuf_free>
 801d684:	e000      	b.n	801d688 <tcp_input+0x7f0>
  return;
 801d686:	bf00      	nop
}
 801d688:	3724      	adds	r7, #36	@ 0x24
 801d68a:	46bd      	mov	sp, r7
 801d68c:	bd90      	pop	{r4, r7, pc}
 801d68e:	bf00      	nop
 801d690:	2402afa8 	.word	0x2402afa8
 801d694:	2402afa4 	.word	0x2402afa4
 801d698:	2402af70 	.word	0x2402af70
 801d69c:	2402af84 	.word	0x2402af84
 801d6a0:	2402af98 	.word	0x2402af98
 801d6a4:	2402af9e 	.word	0x2402af9e
 801d6a8:	2402af94 	.word	0x2402af94
 801d6ac:	24024418 	.word	0x24024418
 801d6b0:	2402441c 	.word	0x2402441c

0801d6b4 <tcp_input_delayed_close>:
 * any more.
 * @returns 1 if the pcb has been closed and deallocated, 0 otherwise
 */
static int
tcp_input_delayed_close(struct tcp_pcb *pcb)
{
 801d6b4:	b580      	push	{r7, lr}
 801d6b6:	b082      	sub	sp, #8
 801d6b8:	af00      	add	r7, sp, #0
 801d6ba:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT("tcp_input_delayed_close: invalid pcb", pcb != NULL);
 801d6bc:	687b      	ldr	r3, [r7, #4]
 801d6be:	2b00      	cmp	r3, #0
 801d6c0:	d106      	bne.n	801d6d0 <tcp_input_delayed_close+0x1c>
 801d6c2:	4b17      	ldr	r3, [pc, #92]	@ (801d720 <tcp_input_delayed_close+0x6c>)
 801d6c4:	f240 225a 	movw	r2, #602	@ 0x25a
 801d6c8:	4916      	ldr	r1, [pc, #88]	@ (801d724 <tcp_input_delayed_close+0x70>)
 801d6ca:	4817      	ldr	r0, [pc, #92]	@ (801d728 <tcp_input_delayed_close+0x74>)
 801d6cc:	f00c fd76 	bl	802a1bc <iprintf>

  if (recv_flags & TF_CLOSED) {
 801d6d0:	4b16      	ldr	r3, [pc, #88]	@ (801d72c <tcp_input_delayed_close+0x78>)
 801d6d2:	781b      	ldrb	r3, [r3, #0]
 801d6d4:	f003 0310 	and.w	r3, r3, #16
 801d6d8:	2b00      	cmp	r3, #0
 801d6da:	d01c      	beq.n	801d716 <tcp_input_delayed_close+0x62>
    /* The connection has been closed and we will deallocate the
        PCB. */
    if (!(pcb->flags & TF_RXCLOSED)) {
 801d6dc:	687b      	ldr	r3, [r7, #4]
 801d6de:	8b5b      	ldrh	r3, [r3, #26]
 801d6e0:	f003 0310 	and.w	r3, r3, #16
 801d6e4:	2b00      	cmp	r3, #0
 801d6e6:	d10d      	bne.n	801d704 <tcp_input_delayed_close+0x50>
      /* Connection closed although the application has only shut down the
          tx side: call the PCB's err callback and indicate the closure to
          ensure the application doesn't continue using the PCB. */
      TCP_EVENT_ERR(pcb->state, pcb->errf, pcb->callback_arg, ERR_CLSD);
 801d6e8:	687b      	ldr	r3, [r7, #4]
 801d6ea:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 801d6ee:	2b00      	cmp	r3, #0
 801d6f0:	d008      	beq.n	801d704 <tcp_input_delayed_close+0x50>
 801d6f2:	687b      	ldr	r3, [r7, #4]
 801d6f4:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 801d6f8:	687a      	ldr	r2, [r7, #4]
 801d6fa:	6912      	ldr	r2, [r2, #16]
 801d6fc:	f06f 010e 	mvn.w	r1, #14
 801d700:	4610      	mov	r0, r2
 801d702:	4798      	blx	r3
    }
    tcp_pcb_remove(&tcp_active_pcbs, pcb);
 801d704:	6879      	ldr	r1, [r7, #4]
 801d706:	480a      	ldr	r0, [pc, #40]	@ (801d730 <tcp_input_delayed_close+0x7c>)
 801d708:	f7ff fa4e 	bl	801cba8 <tcp_pcb_remove>
    tcp_free(pcb);
 801d70c:	6878      	ldr	r0, [r7, #4]
 801d70e:	f7fd fd99 	bl	801b244 <tcp_free>
    return 1;
 801d712:	2301      	movs	r3, #1
 801d714:	e000      	b.n	801d718 <tcp_input_delayed_close+0x64>
  }
  return 0;
 801d716:	2300      	movs	r3, #0
}
 801d718:	4618      	mov	r0, r3
 801d71a:	3708      	adds	r7, #8
 801d71c:	46bd      	mov	sp, r7
 801d71e:	bd80      	pop	{r7, pc}
 801d720:	0802f5a4 	.word	0x0802f5a4
 801d724:	0802f774 	.word	0x0802f774
 801d728:	0802f5f0 	.word	0x0802f5f0
 801d72c:	2402afa1 	.word	0x2402afa1
 801d730:	2402af64 	.word	0x2402af64

0801d734 <tcp_listen_input>:
 * @note the segment which arrived is saved in global variables, therefore only the pcb
 *       involved is passed as a parameter to this function
 */
static void
tcp_listen_input(struct tcp_pcb_listen *pcb)
{
 801d734:	b590      	push	{r4, r7, lr}
 801d736:	b08b      	sub	sp, #44	@ 0x2c
 801d738:	af04      	add	r7, sp, #16
 801d73a:	6078      	str	r0, [r7, #4]
  struct tcp_pcb *npcb;
  u32_t iss;
  err_t rc;

  if (flags & TCP_RST) {
 801d73c:	4b6f      	ldr	r3, [pc, #444]	@ (801d8fc <tcp_listen_input+0x1c8>)
 801d73e:	781b      	ldrb	r3, [r3, #0]
 801d740:	f003 0304 	and.w	r3, r3, #4
 801d744:	2b00      	cmp	r3, #0
 801d746:	f040 80d2 	bne.w	801d8ee <tcp_listen_input+0x1ba>
    /* An incoming RST should be ignored. Return. */
    return;
  }

  LWIP_ASSERT("tcp_listen_input: invalid pcb", pcb != NULL);
 801d74a:	687b      	ldr	r3, [r7, #4]
 801d74c:	2b00      	cmp	r3, #0
 801d74e:	d106      	bne.n	801d75e <tcp_listen_input+0x2a>
 801d750:	4b6b      	ldr	r3, [pc, #428]	@ (801d900 <tcp_listen_input+0x1cc>)
 801d752:	f240 2281 	movw	r2, #641	@ 0x281
 801d756:	496b      	ldr	r1, [pc, #428]	@ (801d904 <tcp_listen_input+0x1d0>)
 801d758:	486b      	ldr	r0, [pc, #428]	@ (801d908 <tcp_listen_input+0x1d4>)
 801d75a:	f00c fd2f 	bl	802a1bc <iprintf>

  /* In the LISTEN state, we check for incoming SYN segments,
     creates a new PCB, and responds with a SYN|ACK. */
  if (flags & TCP_ACK) {
 801d75e:	4b67      	ldr	r3, [pc, #412]	@ (801d8fc <tcp_listen_input+0x1c8>)
 801d760:	781b      	ldrb	r3, [r3, #0]
 801d762:	f003 0310 	and.w	r3, r3, #16
 801d766:	2b00      	cmp	r3, #0
 801d768:	d019      	beq.n	801d79e <tcp_listen_input+0x6a>
    /* For incoming segments with the ACK flag set, respond with a
       RST. */
    LWIP_DEBUGF(TCP_RST_DEBUG, ("tcp_listen_input: ACK in LISTEN, sending reset\n"));
    tcp_rst((const struct tcp_pcb *)pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
 801d76a:	4b68      	ldr	r3, [pc, #416]	@ (801d90c <tcp_listen_input+0x1d8>)
 801d76c:	6819      	ldr	r1, [r3, #0]
 801d76e:	4b68      	ldr	r3, [pc, #416]	@ (801d910 <tcp_listen_input+0x1dc>)
 801d770:	881b      	ldrh	r3, [r3, #0]
 801d772:	461a      	mov	r2, r3
 801d774:	4b67      	ldr	r3, [pc, #412]	@ (801d914 <tcp_listen_input+0x1e0>)
 801d776:	681b      	ldr	r3, [r3, #0]
 801d778:	18d0      	adds	r0, r2, r3
            ip_current_src_addr(), tcphdr->dest, tcphdr->src);
 801d77a:	4b67      	ldr	r3, [pc, #412]	@ (801d918 <tcp_listen_input+0x1e4>)
 801d77c:	681b      	ldr	r3, [r3, #0]
    tcp_rst((const struct tcp_pcb *)pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
 801d77e:	885b      	ldrh	r3, [r3, #2]
 801d780:	b29b      	uxth	r3, r3
            ip_current_src_addr(), tcphdr->dest, tcphdr->src);
 801d782:	4a65      	ldr	r2, [pc, #404]	@ (801d918 <tcp_listen_input+0x1e4>)
 801d784:	6812      	ldr	r2, [r2, #0]
    tcp_rst((const struct tcp_pcb *)pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
 801d786:	8812      	ldrh	r2, [r2, #0]
 801d788:	b292      	uxth	r2, r2
 801d78a:	9202      	str	r2, [sp, #8]
 801d78c:	9301      	str	r3, [sp, #4]
 801d78e:	4b63      	ldr	r3, [pc, #396]	@ (801d91c <tcp_listen_input+0x1e8>)
 801d790:	9300      	str	r3, [sp, #0]
 801d792:	4b63      	ldr	r3, [pc, #396]	@ (801d920 <tcp_listen_input+0x1ec>)
 801d794:	4602      	mov	r2, r0
 801d796:	6878      	ldr	r0, [r7, #4]
 801d798:	f003 fc46 	bl	8021028 <tcp_rst>
      tcp_abandon(npcb, 0);
      return;
    }
    tcp_output(npcb);
  }
  return;
 801d79c:	e0a9      	b.n	801d8f2 <tcp_listen_input+0x1be>
  } else if (flags & TCP_SYN) {
 801d79e:	4b57      	ldr	r3, [pc, #348]	@ (801d8fc <tcp_listen_input+0x1c8>)
 801d7a0:	781b      	ldrb	r3, [r3, #0]
 801d7a2:	f003 0302 	and.w	r3, r3, #2
 801d7a6:	2b00      	cmp	r3, #0
 801d7a8:	f000 80a3 	beq.w	801d8f2 <tcp_listen_input+0x1be>
    npcb = tcp_alloc(pcb->prio);
 801d7ac:	687b      	ldr	r3, [r7, #4]
 801d7ae:	7d5b      	ldrb	r3, [r3, #21]
 801d7b0:	4618      	mov	r0, r3
 801d7b2:	f7ff f84d 	bl	801c850 <tcp_alloc>
 801d7b6:	6178      	str	r0, [r7, #20]
    if (npcb == NULL) {
 801d7b8:	697b      	ldr	r3, [r7, #20]
 801d7ba:	2b00      	cmp	r3, #0
 801d7bc:	d111      	bne.n	801d7e2 <tcp_listen_input+0xae>
      TCP_EVENT_ACCEPT(pcb, NULL, pcb->callback_arg, ERR_MEM, err);
 801d7be:	687b      	ldr	r3, [r7, #4]
 801d7c0:	699b      	ldr	r3, [r3, #24]
 801d7c2:	2b00      	cmp	r3, #0
 801d7c4:	d00a      	beq.n	801d7dc <tcp_listen_input+0xa8>
 801d7c6:	687b      	ldr	r3, [r7, #4]
 801d7c8:	699b      	ldr	r3, [r3, #24]
 801d7ca:	687a      	ldr	r2, [r7, #4]
 801d7cc:	6910      	ldr	r0, [r2, #16]
 801d7ce:	f04f 32ff 	mov.w	r2, #4294967295	@ 0xffffffff
 801d7d2:	2100      	movs	r1, #0
 801d7d4:	4798      	blx	r3
 801d7d6:	4603      	mov	r3, r0
 801d7d8:	73bb      	strb	r3, [r7, #14]
      return;
 801d7da:	e08b      	b.n	801d8f4 <tcp_listen_input+0x1c0>
      TCP_EVENT_ACCEPT(pcb, NULL, pcb->callback_arg, ERR_MEM, err);
 801d7dc:	23f0      	movs	r3, #240	@ 0xf0
 801d7de:	73bb      	strb	r3, [r7, #14]
      return;
 801d7e0:	e088      	b.n	801d8f4 <tcp_listen_input+0x1c0>
    ip_addr_copy(npcb->local_ip, *ip_current_dest_addr());
 801d7e2:	4b50      	ldr	r3, [pc, #320]	@ (801d924 <tcp_listen_input+0x1f0>)
 801d7e4:	695a      	ldr	r2, [r3, #20]
 801d7e6:	697b      	ldr	r3, [r7, #20]
 801d7e8:	601a      	str	r2, [r3, #0]
    ip_addr_copy(npcb->remote_ip, *ip_current_src_addr());
 801d7ea:	4b4e      	ldr	r3, [pc, #312]	@ (801d924 <tcp_listen_input+0x1f0>)
 801d7ec:	691a      	ldr	r2, [r3, #16]
 801d7ee:	697b      	ldr	r3, [r7, #20]
 801d7f0:	605a      	str	r2, [r3, #4]
    npcb->local_port = pcb->local_port;
 801d7f2:	687b      	ldr	r3, [r7, #4]
 801d7f4:	8ada      	ldrh	r2, [r3, #22]
 801d7f6:	697b      	ldr	r3, [r7, #20]
 801d7f8:	82da      	strh	r2, [r3, #22]
    npcb->remote_port = tcphdr->src;
 801d7fa:	4b47      	ldr	r3, [pc, #284]	@ (801d918 <tcp_listen_input+0x1e4>)
 801d7fc:	681b      	ldr	r3, [r3, #0]
 801d7fe:	881b      	ldrh	r3, [r3, #0]
 801d800:	b29a      	uxth	r2, r3
 801d802:	697b      	ldr	r3, [r7, #20]
 801d804:	831a      	strh	r2, [r3, #24]
    npcb->state = SYN_RCVD;
 801d806:	697b      	ldr	r3, [r7, #20]
 801d808:	2203      	movs	r2, #3
 801d80a:	751a      	strb	r2, [r3, #20]
    npcb->rcv_nxt = seqno + 1;
 801d80c:	4b41      	ldr	r3, [pc, #260]	@ (801d914 <tcp_listen_input+0x1e0>)
 801d80e:	681b      	ldr	r3, [r3, #0]
 801d810:	1c5a      	adds	r2, r3, #1
 801d812:	697b      	ldr	r3, [r7, #20]
 801d814:	625a      	str	r2, [r3, #36]	@ 0x24
    npcb->rcv_ann_right_edge = npcb->rcv_nxt;
 801d816:	697b      	ldr	r3, [r7, #20]
 801d818:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 801d81a:	697b      	ldr	r3, [r7, #20]
 801d81c:	62da      	str	r2, [r3, #44]	@ 0x2c
    iss = tcp_next_iss(npcb);
 801d81e:	6978      	ldr	r0, [r7, #20]
 801d820:	f7ff fa56 	bl	801ccd0 <tcp_next_iss>
 801d824:	6138      	str	r0, [r7, #16]
    npcb->snd_wl2 = iss;
 801d826:	697b      	ldr	r3, [r7, #20]
 801d828:	693a      	ldr	r2, [r7, #16]
 801d82a:	659a      	str	r2, [r3, #88]	@ 0x58
    npcb->snd_nxt = iss;
 801d82c:	697b      	ldr	r3, [r7, #20]
 801d82e:	693a      	ldr	r2, [r7, #16]
 801d830:	651a      	str	r2, [r3, #80]	@ 0x50
    npcb->lastack = iss;
 801d832:	697b      	ldr	r3, [r7, #20]
 801d834:	693a      	ldr	r2, [r7, #16]
 801d836:	645a      	str	r2, [r3, #68]	@ 0x44
    npcb->snd_lbb = iss;
 801d838:	697b      	ldr	r3, [r7, #20]
 801d83a:	693a      	ldr	r2, [r7, #16]
 801d83c:	65da      	str	r2, [r3, #92]	@ 0x5c
    npcb->snd_wl1 = seqno - 1;/* initialise to seqno-1 to force window update */
 801d83e:	4b35      	ldr	r3, [pc, #212]	@ (801d914 <tcp_listen_input+0x1e0>)
 801d840:	681b      	ldr	r3, [r3, #0]
 801d842:	1e5a      	subs	r2, r3, #1
 801d844:	697b      	ldr	r3, [r7, #20]
 801d846:	655a      	str	r2, [r3, #84]	@ 0x54
    npcb->callback_arg = pcb->callback_arg;
 801d848:	687b      	ldr	r3, [r7, #4]
 801d84a:	691a      	ldr	r2, [r3, #16]
 801d84c:	697b      	ldr	r3, [r7, #20]
 801d84e:	611a      	str	r2, [r3, #16]
    npcb->listener = pcb;
 801d850:	697b      	ldr	r3, [r7, #20]
 801d852:	687a      	ldr	r2, [r7, #4]
 801d854:	67da      	str	r2, [r3, #124]	@ 0x7c
    npcb->so_options = pcb->so_options & SOF_INHERITED;
 801d856:	687b      	ldr	r3, [r7, #4]
 801d858:	7a5b      	ldrb	r3, [r3, #9]
 801d85a:	f003 030c 	and.w	r3, r3, #12
 801d85e:	b2da      	uxtb	r2, r3
 801d860:	697b      	ldr	r3, [r7, #20]
 801d862:	725a      	strb	r2, [r3, #9]
    npcb->netif_idx = pcb->netif_idx;
 801d864:	687b      	ldr	r3, [r7, #4]
 801d866:	7a1a      	ldrb	r2, [r3, #8]
 801d868:	697b      	ldr	r3, [r7, #20]
 801d86a:	721a      	strb	r2, [r3, #8]
    TCP_REG_ACTIVE(npcb);
 801d86c:	4b2e      	ldr	r3, [pc, #184]	@ (801d928 <tcp_listen_input+0x1f4>)
 801d86e:	681a      	ldr	r2, [r3, #0]
 801d870:	697b      	ldr	r3, [r7, #20]
 801d872:	60da      	str	r2, [r3, #12]
 801d874:	4a2c      	ldr	r2, [pc, #176]	@ (801d928 <tcp_listen_input+0x1f4>)
 801d876:	697b      	ldr	r3, [r7, #20]
 801d878:	6013      	str	r3, [r2, #0]
 801d87a:	f003 fd97 	bl	80213ac <tcp_timer_needed>
 801d87e:	4b2b      	ldr	r3, [pc, #172]	@ (801d92c <tcp_listen_input+0x1f8>)
 801d880:	2201      	movs	r2, #1
 801d882:	701a      	strb	r2, [r3, #0]
    tcp_parseopt(npcb);
 801d884:	6978      	ldr	r0, [r7, #20]
 801d886:	f001 fd8b 	bl	801f3a0 <tcp_parseopt>
    npcb->snd_wnd = tcphdr->wnd;
 801d88a:	4b23      	ldr	r3, [pc, #140]	@ (801d918 <tcp_listen_input+0x1e4>)
 801d88c:	681b      	ldr	r3, [r3, #0]
 801d88e:	89db      	ldrh	r3, [r3, #14]
 801d890:	b29a      	uxth	r2, r3
 801d892:	697b      	ldr	r3, [r7, #20]
 801d894:	f8a3 2060 	strh.w	r2, [r3, #96]	@ 0x60
    npcb->snd_wnd_max = npcb->snd_wnd;
 801d898:	697b      	ldr	r3, [r7, #20]
 801d89a:	f8b3 2060 	ldrh.w	r2, [r3, #96]	@ 0x60
 801d89e:	697b      	ldr	r3, [r7, #20]
 801d8a0:	f8a3 2062 	strh.w	r2, [r3, #98]	@ 0x62
    npcb->mss = tcp_eff_send_mss(npcb->mss, &npcb->local_ip, &npcb->remote_ip);
 801d8a4:	697b      	ldr	r3, [r7, #20]
 801d8a6:	8e5c      	ldrh	r4, [r3, #50]	@ 0x32
 801d8a8:	697b      	ldr	r3, [r7, #20]
 801d8aa:	3304      	adds	r3, #4
 801d8ac:	4618      	mov	r0, r3
 801d8ae:	f007 fc77 	bl	80251a0 <ip4_route>
 801d8b2:	4601      	mov	r1, r0
 801d8b4:	697b      	ldr	r3, [r7, #20]
 801d8b6:	3304      	adds	r3, #4
 801d8b8:	461a      	mov	r2, r3
 801d8ba:	4620      	mov	r0, r4
 801d8bc:	f7ff fa2e 	bl	801cd1c <tcp_eff_send_mss_netif>
 801d8c0:	4603      	mov	r3, r0
 801d8c2:	461a      	mov	r2, r3
 801d8c4:	697b      	ldr	r3, [r7, #20]
 801d8c6:	865a      	strh	r2, [r3, #50]	@ 0x32
    rc = tcp_enqueue_flags(npcb, TCP_SYN | TCP_ACK);
 801d8c8:	2112      	movs	r1, #18
 801d8ca:	6978      	ldr	r0, [r7, #20]
 801d8cc:	f002 fcfc 	bl	80202c8 <tcp_enqueue_flags>
 801d8d0:	4603      	mov	r3, r0
 801d8d2:	73fb      	strb	r3, [r7, #15]
    if (rc != ERR_OK) {
 801d8d4:	f997 300f 	ldrsb.w	r3, [r7, #15]
 801d8d8:	2b00      	cmp	r3, #0
 801d8da:	d004      	beq.n	801d8e6 <tcp_listen_input+0x1b2>
      tcp_abandon(npcb, 0);
 801d8dc:	2100      	movs	r1, #0
 801d8de:	6978      	ldr	r0, [r7, #20]
 801d8e0:	f7fd ff3a 	bl	801b758 <tcp_abandon>
      return;
 801d8e4:	e006      	b.n	801d8f4 <tcp_listen_input+0x1c0>
    tcp_output(npcb);
 801d8e6:	6978      	ldr	r0, [r7, #20]
 801d8e8:	f002 fddc 	bl	80204a4 <tcp_output>
  return;
 801d8ec:	e001      	b.n	801d8f2 <tcp_listen_input+0x1be>
    return;
 801d8ee:	bf00      	nop
 801d8f0:	e000      	b.n	801d8f4 <tcp_listen_input+0x1c0>
  return;
 801d8f2:	bf00      	nop
}
 801d8f4:	371c      	adds	r7, #28
 801d8f6:	46bd      	mov	sp, r7
 801d8f8:	bd90      	pop	{r4, r7, pc}
 801d8fa:	bf00      	nop
 801d8fc:	2402afa0 	.word	0x2402afa0
 801d900:	0802f5a4 	.word	0x0802f5a4
 801d904:	0802f79c 	.word	0x0802f79c
 801d908:	0802f5f0 	.word	0x0802f5f0
 801d90c:	2402af98 	.word	0x2402af98
 801d910:	2402af9e 	.word	0x2402af9e
 801d914:	2402af94 	.word	0x2402af94
 801d918:	2402af84 	.word	0x2402af84
 801d91c:	24024418 	.word	0x24024418
 801d920:	2402441c 	.word	0x2402441c
 801d924:	24024408 	.word	0x24024408
 801d928:	2402af64 	.word	0x2402af64
 801d92c:	2402af6c 	.word	0x2402af6c

0801d930 <tcp_timewait_input>:
 * @note the segment which arrived is saved in global variables, therefore only the pcb
 *       involved is passed as a parameter to this function
 */
static void
tcp_timewait_input(struct tcp_pcb *pcb)
{
 801d930:	b580      	push	{r7, lr}
 801d932:	b086      	sub	sp, #24
 801d934:	af04      	add	r7, sp, #16
 801d936:	6078      	str	r0, [r7, #4]
  /* RFC 1337: in TIME_WAIT, ignore RST and ACK FINs + any 'acceptable' segments */
  /* RFC 793 3.9 Event Processing - Segment Arrives:
   * - first check sequence number - we skip that one in TIME_WAIT (always
   *   acceptable since we only send ACKs)
   * - second check the RST bit (... return) */
  if (flags & TCP_RST) {
 801d938:	4b2f      	ldr	r3, [pc, #188]	@ (801d9f8 <tcp_timewait_input+0xc8>)
 801d93a:	781b      	ldrb	r3, [r3, #0]
 801d93c:	f003 0304 	and.w	r3, r3, #4
 801d940:	2b00      	cmp	r3, #0
 801d942:	d153      	bne.n	801d9ec <tcp_timewait_input+0xbc>
    return;
  }

  LWIP_ASSERT("tcp_timewait_input: invalid pcb", pcb != NULL);
 801d944:	687b      	ldr	r3, [r7, #4]
 801d946:	2b00      	cmp	r3, #0
 801d948:	d106      	bne.n	801d958 <tcp_timewait_input+0x28>
 801d94a:	4b2c      	ldr	r3, [pc, #176]	@ (801d9fc <tcp_timewait_input+0xcc>)
 801d94c:	f240 22ee 	movw	r2, #750	@ 0x2ee
 801d950:	492b      	ldr	r1, [pc, #172]	@ (801da00 <tcp_timewait_input+0xd0>)
 801d952:	482c      	ldr	r0, [pc, #176]	@ (801da04 <tcp_timewait_input+0xd4>)
 801d954:	f00c fc32 	bl	802a1bc <iprintf>

  /* - fourth, check the SYN bit, */
  if (flags & TCP_SYN) {
 801d958:	4b27      	ldr	r3, [pc, #156]	@ (801d9f8 <tcp_timewait_input+0xc8>)
 801d95a:	781b      	ldrb	r3, [r3, #0]
 801d95c:	f003 0302 	and.w	r3, r3, #2
 801d960:	2b00      	cmp	r3, #0
 801d962:	d02a      	beq.n	801d9ba <tcp_timewait_input+0x8a>
    /* If an incoming segment is not acceptable, an acknowledgment
       should be sent in reply */
    if (TCP_SEQ_BETWEEN(seqno, pcb->rcv_nxt, pcb->rcv_nxt + pcb->rcv_wnd)) {
 801d964:	4b28      	ldr	r3, [pc, #160]	@ (801da08 <tcp_timewait_input+0xd8>)
 801d966:	681a      	ldr	r2, [r3, #0]
 801d968:	687b      	ldr	r3, [r7, #4]
 801d96a:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801d96c:	1ad3      	subs	r3, r2, r3
 801d96e:	2b00      	cmp	r3, #0
 801d970:	db2d      	blt.n	801d9ce <tcp_timewait_input+0x9e>
 801d972:	4b25      	ldr	r3, [pc, #148]	@ (801da08 <tcp_timewait_input+0xd8>)
 801d974:	681a      	ldr	r2, [r3, #0]
 801d976:	687b      	ldr	r3, [r7, #4]
 801d978:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801d97a:	6879      	ldr	r1, [r7, #4]
 801d97c:	8d09      	ldrh	r1, [r1, #40]	@ 0x28
 801d97e:	440b      	add	r3, r1
 801d980:	1ad3      	subs	r3, r2, r3
 801d982:	2b00      	cmp	r3, #0
 801d984:	dc23      	bgt.n	801d9ce <tcp_timewait_input+0x9e>
      /* If the SYN is in the window it is an error, send a reset */
      tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
 801d986:	4b21      	ldr	r3, [pc, #132]	@ (801da0c <tcp_timewait_input+0xdc>)
 801d988:	6819      	ldr	r1, [r3, #0]
 801d98a:	4b21      	ldr	r3, [pc, #132]	@ (801da10 <tcp_timewait_input+0xe0>)
 801d98c:	881b      	ldrh	r3, [r3, #0]
 801d98e:	461a      	mov	r2, r3
 801d990:	4b1d      	ldr	r3, [pc, #116]	@ (801da08 <tcp_timewait_input+0xd8>)
 801d992:	681b      	ldr	r3, [r3, #0]
 801d994:	18d0      	adds	r0, r2, r3
              ip_current_src_addr(), tcphdr->dest, tcphdr->src);
 801d996:	4b1f      	ldr	r3, [pc, #124]	@ (801da14 <tcp_timewait_input+0xe4>)
 801d998:	681b      	ldr	r3, [r3, #0]
      tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
 801d99a:	885b      	ldrh	r3, [r3, #2]
 801d99c:	b29b      	uxth	r3, r3
              ip_current_src_addr(), tcphdr->dest, tcphdr->src);
 801d99e:	4a1d      	ldr	r2, [pc, #116]	@ (801da14 <tcp_timewait_input+0xe4>)
 801d9a0:	6812      	ldr	r2, [r2, #0]
      tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
 801d9a2:	8812      	ldrh	r2, [r2, #0]
 801d9a4:	b292      	uxth	r2, r2
 801d9a6:	9202      	str	r2, [sp, #8]
 801d9a8:	9301      	str	r3, [sp, #4]
 801d9aa:	4b1b      	ldr	r3, [pc, #108]	@ (801da18 <tcp_timewait_input+0xe8>)
 801d9ac:	9300      	str	r3, [sp, #0]
 801d9ae:	4b1b      	ldr	r3, [pc, #108]	@ (801da1c <tcp_timewait_input+0xec>)
 801d9b0:	4602      	mov	r2, r0
 801d9b2:	6878      	ldr	r0, [r7, #4]
 801d9b4:	f003 fb38 	bl	8021028 <tcp_rst>
      return;
 801d9b8:	e01b      	b.n	801d9f2 <tcp_timewait_input+0xc2>
    }
  } else if (flags & TCP_FIN) {
 801d9ba:	4b0f      	ldr	r3, [pc, #60]	@ (801d9f8 <tcp_timewait_input+0xc8>)
 801d9bc:	781b      	ldrb	r3, [r3, #0]
 801d9be:	f003 0301 	and.w	r3, r3, #1
 801d9c2:	2b00      	cmp	r3, #0
 801d9c4:	d003      	beq.n	801d9ce <tcp_timewait_input+0x9e>
    /* - eighth, check the FIN bit: Remain in the TIME-WAIT state.
         Restart the 2 MSL time-wait timeout.*/
    pcb->tmr = tcp_ticks;
 801d9c6:	4b16      	ldr	r3, [pc, #88]	@ (801da20 <tcp_timewait_input+0xf0>)
 801d9c8:	681a      	ldr	r2, [r3, #0]
 801d9ca:	687b      	ldr	r3, [r7, #4]
 801d9cc:	621a      	str	r2, [r3, #32]
  }

  if ((tcplen > 0)) {
 801d9ce:	4b10      	ldr	r3, [pc, #64]	@ (801da10 <tcp_timewait_input+0xe0>)
 801d9d0:	881b      	ldrh	r3, [r3, #0]
 801d9d2:	2b00      	cmp	r3, #0
 801d9d4:	d00c      	beq.n	801d9f0 <tcp_timewait_input+0xc0>
    /* Acknowledge data, FIN or out-of-window SYN */
    tcp_ack_now(pcb);
 801d9d6:	687b      	ldr	r3, [r7, #4]
 801d9d8:	8b5b      	ldrh	r3, [r3, #26]
 801d9da:	f043 0302 	orr.w	r3, r3, #2
 801d9de:	b29a      	uxth	r2, r3
 801d9e0:	687b      	ldr	r3, [r7, #4]
 801d9e2:	835a      	strh	r2, [r3, #26]
    tcp_output(pcb);
 801d9e4:	6878      	ldr	r0, [r7, #4]
 801d9e6:	f002 fd5d 	bl	80204a4 <tcp_output>
  }
  return;
 801d9ea:	e001      	b.n	801d9f0 <tcp_timewait_input+0xc0>
    return;
 801d9ec:	bf00      	nop
 801d9ee:	e000      	b.n	801d9f2 <tcp_timewait_input+0xc2>
  return;
 801d9f0:	bf00      	nop
}
 801d9f2:	3708      	adds	r7, #8
 801d9f4:	46bd      	mov	sp, r7
 801d9f6:	bd80      	pop	{r7, pc}
 801d9f8:	2402afa0 	.word	0x2402afa0
 801d9fc:	0802f5a4 	.word	0x0802f5a4
 801da00:	0802f7bc 	.word	0x0802f7bc
 801da04:	0802f5f0 	.word	0x0802f5f0
 801da08:	2402af94 	.word	0x2402af94
 801da0c:	2402af98 	.word	0x2402af98
 801da10:	2402af9e 	.word	0x2402af9e
 801da14:	2402af84 	.word	0x2402af84
 801da18:	24024418 	.word	0x24024418
 801da1c:	2402441c 	.word	0x2402441c
 801da20:	2402af58 	.word	0x2402af58

0801da24 <tcp_process>:
 * @note the segment which arrived is saved in global variables, therefore only the pcb
 *       involved is passed as a parameter to this function
 */
static err_t
tcp_process(struct tcp_pcb *pcb)
{
 801da24:	b590      	push	{r4, r7, lr}
 801da26:	b08d      	sub	sp, #52	@ 0x34
 801da28:	af04      	add	r7, sp, #16
 801da2a:	6078      	str	r0, [r7, #4]
  struct tcp_seg *rseg;
  u8_t acceptable = 0;
 801da2c:	2300      	movs	r3, #0
 801da2e:	77fb      	strb	r3, [r7, #31]
  err_t err;

  err = ERR_OK;
 801da30:	2300      	movs	r3, #0
 801da32:	77bb      	strb	r3, [r7, #30]

  LWIP_ASSERT("tcp_process: invalid pcb", pcb != NULL);
 801da34:	687b      	ldr	r3, [r7, #4]
 801da36:	2b00      	cmp	r3, #0
 801da38:	d106      	bne.n	801da48 <tcp_process+0x24>
 801da3a:	4b9d      	ldr	r3, [pc, #628]	@ (801dcb0 <tcp_process+0x28c>)
 801da3c:	f44f 7247 	mov.w	r2, #796	@ 0x31c
 801da40:	499c      	ldr	r1, [pc, #624]	@ (801dcb4 <tcp_process+0x290>)
 801da42:	489d      	ldr	r0, [pc, #628]	@ (801dcb8 <tcp_process+0x294>)
 801da44:	f00c fbba 	bl	802a1bc <iprintf>

  /* Process incoming RST segments. */
  if (flags & TCP_RST) {
 801da48:	4b9c      	ldr	r3, [pc, #624]	@ (801dcbc <tcp_process+0x298>)
 801da4a:	781b      	ldrb	r3, [r3, #0]
 801da4c:	f003 0304 	and.w	r3, r3, #4
 801da50:	2b00      	cmp	r3, #0
 801da52:	d04e      	beq.n	801daf2 <tcp_process+0xce>
    /* First, determine if the reset is acceptable. */
    if (pcb->state == SYN_SENT) {
 801da54:	687b      	ldr	r3, [r7, #4]
 801da56:	7d1b      	ldrb	r3, [r3, #20]
 801da58:	2b02      	cmp	r3, #2
 801da5a:	d108      	bne.n	801da6e <tcp_process+0x4a>
      /* "In the SYN-SENT state (a RST received in response to an initial SYN),
          the RST is acceptable if the ACK field acknowledges the SYN." */
      if (ackno == pcb->snd_nxt) {
 801da5c:	687b      	ldr	r3, [r7, #4]
 801da5e:	6d1a      	ldr	r2, [r3, #80]	@ 0x50
 801da60:	4b97      	ldr	r3, [pc, #604]	@ (801dcc0 <tcp_process+0x29c>)
 801da62:	681b      	ldr	r3, [r3, #0]
 801da64:	429a      	cmp	r2, r3
 801da66:	d123      	bne.n	801dab0 <tcp_process+0x8c>
        acceptable = 1;
 801da68:	2301      	movs	r3, #1
 801da6a:	77fb      	strb	r3, [r7, #31]
 801da6c:	e020      	b.n	801dab0 <tcp_process+0x8c>
      }
    } else {
      /* "In all states except SYN-SENT, all reset (RST) segments are validated
          by checking their SEQ-fields." */
      if (seqno == pcb->rcv_nxt) {
 801da6e:	687b      	ldr	r3, [r7, #4]
 801da70:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 801da72:	4b94      	ldr	r3, [pc, #592]	@ (801dcc4 <tcp_process+0x2a0>)
 801da74:	681b      	ldr	r3, [r3, #0]
 801da76:	429a      	cmp	r2, r3
 801da78:	d102      	bne.n	801da80 <tcp_process+0x5c>
        acceptable = 1;
 801da7a:	2301      	movs	r3, #1
 801da7c:	77fb      	strb	r3, [r7, #31]
 801da7e:	e017      	b.n	801dab0 <tcp_process+0x8c>
      } else  if (TCP_SEQ_BETWEEN(seqno, pcb->rcv_nxt,
 801da80:	4b90      	ldr	r3, [pc, #576]	@ (801dcc4 <tcp_process+0x2a0>)
 801da82:	681a      	ldr	r2, [r3, #0]
 801da84:	687b      	ldr	r3, [r7, #4]
 801da86:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801da88:	1ad3      	subs	r3, r2, r3
 801da8a:	2b00      	cmp	r3, #0
 801da8c:	db10      	blt.n	801dab0 <tcp_process+0x8c>
 801da8e:	4b8d      	ldr	r3, [pc, #564]	@ (801dcc4 <tcp_process+0x2a0>)
 801da90:	681a      	ldr	r2, [r3, #0]
 801da92:	687b      	ldr	r3, [r7, #4]
 801da94:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801da96:	6879      	ldr	r1, [r7, #4]
 801da98:	8d09      	ldrh	r1, [r1, #40]	@ 0x28
 801da9a:	440b      	add	r3, r1
 801da9c:	1ad3      	subs	r3, r2, r3
 801da9e:	2b00      	cmp	r3, #0
 801daa0:	dc06      	bgt.n	801dab0 <tcp_process+0x8c>
                                  pcb->rcv_nxt + pcb->rcv_wnd)) {
        /* If the sequence number is inside the window, we send a challenge ACK
           and wait for a re-send with matching sequence number.
           This follows RFC 5961 section 3.2 and addresses CVE-2004-0230
           (RST spoofing attack), which is present in RFC 793 RST handling. */
        tcp_ack_now(pcb);
 801daa2:	687b      	ldr	r3, [r7, #4]
 801daa4:	8b5b      	ldrh	r3, [r3, #26]
 801daa6:	f043 0302 	orr.w	r3, r3, #2
 801daaa:	b29a      	uxth	r2, r3
 801daac:	687b      	ldr	r3, [r7, #4]
 801daae:	835a      	strh	r2, [r3, #26]
      }
    }

    if (acceptable) {
 801dab0:	7ffb      	ldrb	r3, [r7, #31]
 801dab2:	2b00      	cmp	r3, #0
 801dab4:	d01b      	beq.n	801daee <tcp_process+0xca>
      LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_process: Connection RESET\n"));
      LWIP_ASSERT("tcp_input: pcb->state != CLOSED", pcb->state != CLOSED);
 801dab6:	687b      	ldr	r3, [r7, #4]
 801dab8:	7d1b      	ldrb	r3, [r3, #20]
 801daba:	2b00      	cmp	r3, #0
 801dabc:	d106      	bne.n	801dacc <tcp_process+0xa8>
 801dabe:	4b7c      	ldr	r3, [pc, #496]	@ (801dcb0 <tcp_process+0x28c>)
 801dac0:	f44f 724e 	mov.w	r2, #824	@ 0x338
 801dac4:	4980      	ldr	r1, [pc, #512]	@ (801dcc8 <tcp_process+0x2a4>)
 801dac6:	487c      	ldr	r0, [pc, #496]	@ (801dcb8 <tcp_process+0x294>)
 801dac8:	f00c fb78 	bl	802a1bc <iprintf>
      recv_flags |= TF_RESET;
 801dacc:	4b7f      	ldr	r3, [pc, #508]	@ (801dccc <tcp_process+0x2a8>)
 801dace:	781b      	ldrb	r3, [r3, #0]
 801dad0:	f043 0308 	orr.w	r3, r3, #8
 801dad4:	b2da      	uxtb	r2, r3
 801dad6:	4b7d      	ldr	r3, [pc, #500]	@ (801dccc <tcp_process+0x2a8>)
 801dad8:	701a      	strb	r2, [r3, #0]
      tcp_clear_flags(pcb, TF_ACK_DELAY);
 801dada:	687b      	ldr	r3, [r7, #4]
 801dadc:	8b5b      	ldrh	r3, [r3, #26]
 801dade:	f023 0301 	bic.w	r3, r3, #1
 801dae2:	b29a      	uxth	r2, r3
 801dae4:	687b      	ldr	r3, [r7, #4]
 801dae6:	835a      	strh	r2, [r3, #26]
      return ERR_RST;
 801dae8:	f06f 030d 	mvn.w	r3, #13
 801daec:	e37a      	b.n	801e1e4 <tcp_process+0x7c0>
    } else {
      LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_process: unacceptable reset seqno %"U32_F" rcv_nxt %"U32_F"\n",
                                    seqno, pcb->rcv_nxt));
      LWIP_DEBUGF(TCP_DEBUG, ("tcp_process: unacceptable reset seqno %"U32_F" rcv_nxt %"U32_F"\n",
                              seqno, pcb->rcv_nxt));
      return ERR_OK;
 801daee:	2300      	movs	r3, #0
 801daf0:	e378      	b.n	801e1e4 <tcp_process+0x7c0>
    }
  }

  if ((flags & TCP_SYN) && (pcb->state != SYN_SENT && pcb->state != SYN_RCVD)) {
 801daf2:	4b72      	ldr	r3, [pc, #456]	@ (801dcbc <tcp_process+0x298>)
 801daf4:	781b      	ldrb	r3, [r3, #0]
 801daf6:	f003 0302 	and.w	r3, r3, #2
 801dafa:	2b00      	cmp	r3, #0
 801dafc:	d010      	beq.n	801db20 <tcp_process+0xfc>
 801dafe:	687b      	ldr	r3, [r7, #4]
 801db00:	7d1b      	ldrb	r3, [r3, #20]
 801db02:	2b02      	cmp	r3, #2
 801db04:	d00c      	beq.n	801db20 <tcp_process+0xfc>
 801db06:	687b      	ldr	r3, [r7, #4]
 801db08:	7d1b      	ldrb	r3, [r3, #20]
 801db0a:	2b03      	cmp	r3, #3
 801db0c:	d008      	beq.n	801db20 <tcp_process+0xfc>
    /* Cope with new connection attempt after remote end crashed */
    tcp_ack_now(pcb);
 801db0e:	687b      	ldr	r3, [r7, #4]
 801db10:	8b5b      	ldrh	r3, [r3, #26]
 801db12:	f043 0302 	orr.w	r3, r3, #2
 801db16:	b29a      	uxth	r2, r3
 801db18:	687b      	ldr	r3, [r7, #4]
 801db1a:	835a      	strh	r2, [r3, #26]
    return ERR_OK;
 801db1c:	2300      	movs	r3, #0
 801db1e:	e361      	b.n	801e1e4 <tcp_process+0x7c0>
  }

  if ((pcb->flags & TF_RXCLOSED) == 0) {
 801db20:	687b      	ldr	r3, [r7, #4]
 801db22:	8b5b      	ldrh	r3, [r3, #26]
 801db24:	f003 0310 	and.w	r3, r3, #16
 801db28:	2b00      	cmp	r3, #0
 801db2a:	d103      	bne.n	801db34 <tcp_process+0x110>
    /* Update the PCB (in)activity timer unless rx is closed (see tcp_shutdown) */
    pcb->tmr = tcp_ticks;
 801db2c:	4b68      	ldr	r3, [pc, #416]	@ (801dcd0 <tcp_process+0x2ac>)
 801db2e:	681a      	ldr	r2, [r3, #0]
 801db30:	687b      	ldr	r3, [r7, #4]
 801db32:	621a      	str	r2, [r3, #32]
  }
  pcb->keep_cnt_sent = 0;
 801db34:	687b      	ldr	r3, [r7, #4]
 801db36:	2200      	movs	r2, #0
 801db38:	f883 209b 	strb.w	r2, [r3, #155]	@ 0x9b
  pcb->persist_probe = 0;
 801db3c:	687b      	ldr	r3, [r7, #4]
 801db3e:	2200      	movs	r2, #0
 801db40:	f883 209a 	strb.w	r2, [r3, #154]	@ 0x9a

  tcp_parseopt(pcb);
 801db44:	6878      	ldr	r0, [r7, #4]
 801db46:	f001 fc2b 	bl	801f3a0 <tcp_parseopt>

  /* Do different things depending on the TCP state. */
  switch (pcb->state) {
 801db4a:	687b      	ldr	r3, [r7, #4]
 801db4c:	7d1b      	ldrb	r3, [r3, #20]
 801db4e:	3b02      	subs	r3, #2
 801db50:	2b07      	cmp	r3, #7
 801db52:	f200 8337 	bhi.w	801e1c4 <tcp_process+0x7a0>
 801db56:	a201      	add	r2, pc, #4	@ (adr r2, 801db5c <tcp_process+0x138>)
 801db58:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 801db5c:	0801db7d 	.word	0x0801db7d
 801db60:	0801ddad 	.word	0x0801ddad
 801db64:	0801df25 	.word	0x0801df25
 801db68:	0801df4f 	.word	0x0801df4f
 801db6c:	0801e073 	.word	0x0801e073
 801db70:	0801df25 	.word	0x0801df25
 801db74:	0801e0ff 	.word	0x0801e0ff
 801db78:	0801e18f 	.word	0x0801e18f
    case SYN_SENT:
      LWIP_DEBUGF(TCP_INPUT_DEBUG, ("SYN-SENT: ackno %"U32_F" pcb->snd_nxt %"U32_F" unacked %"U32_F"\n", ackno,
                                    pcb->snd_nxt, lwip_ntohl(pcb->unacked->tcphdr->seqno)));
      /* received SYN ACK with expected sequence number? */
      if ((flags & TCP_ACK) && (flags & TCP_SYN)
 801db7c:	4b4f      	ldr	r3, [pc, #316]	@ (801dcbc <tcp_process+0x298>)
 801db7e:	781b      	ldrb	r3, [r3, #0]
 801db80:	f003 0310 	and.w	r3, r3, #16
 801db84:	2b00      	cmp	r3, #0
 801db86:	f000 80e4 	beq.w	801dd52 <tcp_process+0x32e>
 801db8a:	4b4c      	ldr	r3, [pc, #304]	@ (801dcbc <tcp_process+0x298>)
 801db8c:	781b      	ldrb	r3, [r3, #0]
 801db8e:	f003 0302 	and.w	r3, r3, #2
 801db92:	2b00      	cmp	r3, #0
 801db94:	f000 80dd 	beq.w	801dd52 <tcp_process+0x32e>
          && (ackno == pcb->lastack + 1)) {
 801db98:	687b      	ldr	r3, [r7, #4]
 801db9a:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 801db9c:	1c5a      	adds	r2, r3, #1
 801db9e:	4b48      	ldr	r3, [pc, #288]	@ (801dcc0 <tcp_process+0x29c>)
 801dba0:	681b      	ldr	r3, [r3, #0]
 801dba2:	429a      	cmp	r2, r3
 801dba4:	f040 80d5 	bne.w	801dd52 <tcp_process+0x32e>
        pcb->rcv_nxt = seqno + 1;
 801dba8:	4b46      	ldr	r3, [pc, #280]	@ (801dcc4 <tcp_process+0x2a0>)
 801dbaa:	681b      	ldr	r3, [r3, #0]
 801dbac:	1c5a      	adds	r2, r3, #1
 801dbae:	687b      	ldr	r3, [r7, #4]
 801dbb0:	625a      	str	r2, [r3, #36]	@ 0x24
        pcb->rcv_ann_right_edge = pcb->rcv_nxt;
 801dbb2:	687b      	ldr	r3, [r7, #4]
 801dbb4:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 801dbb6:	687b      	ldr	r3, [r7, #4]
 801dbb8:	62da      	str	r2, [r3, #44]	@ 0x2c
        pcb->lastack = ackno;
 801dbba:	4b41      	ldr	r3, [pc, #260]	@ (801dcc0 <tcp_process+0x29c>)
 801dbbc:	681a      	ldr	r2, [r3, #0]
 801dbbe:	687b      	ldr	r3, [r7, #4]
 801dbc0:	645a      	str	r2, [r3, #68]	@ 0x44
        pcb->snd_wnd = tcphdr->wnd;
 801dbc2:	4b44      	ldr	r3, [pc, #272]	@ (801dcd4 <tcp_process+0x2b0>)
 801dbc4:	681b      	ldr	r3, [r3, #0]
 801dbc6:	89db      	ldrh	r3, [r3, #14]
 801dbc8:	b29a      	uxth	r2, r3
 801dbca:	687b      	ldr	r3, [r7, #4]
 801dbcc:	f8a3 2060 	strh.w	r2, [r3, #96]	@ 0x60
        pcb->snd_wnd_max = pcb->snd_wnd;
 801dbd0:	687b      	ldr	r3, [r7, #4]
 801dbd2:	f8b3 2060 	ldrh.w	r2, [r3, #96]	@ 0x60
 801dbd6:	687b      	ldr	r3, [r7, #4]
 801dbd8:	f8a3 2062 	strh.w	r2, [r3, #98]	@ 0x62
        pcb->snd_wl1 = seqno - 1; /* initialise to seqno - 1 to force window update */
 801dbdc:	4b39      	ldr	r3, [pc, #228]	@ (801dcc4 <tcp_process+0x2a0>)
 801dbde:	681b      	ldr	r3, [r3, #0]
 801dbe0:	1e5a      	subs	r2, r3, #1
 801dbe2:	687b      	ldr	r3, [r7, #4]
 801dbe4:	655a      	str	r2, [r3, #84]	@ 0x54
        pcb->state = ESTABLISHED;
 801dbe6:	687b      	ldr	r3, [r7, #4]
 801dbe8:	2204      	movs	r2, #4
 801dbea:	751a      	strb	r2, [r3, #20]

#if TCP_CALCULATE_EFF_SEND_MSS
        pcb->mss = tcp_eff_send_mss(pcb->mss, &pcb->local_ip, &pcb->remote_ip);
 801dbec:	687b      	ldr	r3, [r7, #4]
 801dbee:	8e5c      	ldrh	r4, [r3, #50]	@ 0x32
 801dbf0:	687b      	ldr	r3, [r7, #4]
 801dbf2:	3304      	adds	r3, #4
 801dbf4:	4618      	mov	r0, r3
 801dbf6:	f007 fad3 	bl	80251a0 <ip4_route>
 801dbfa:	4601      	mov	r1, r0
 801dbfc:	687b      	ldr	r3, [r7, #4]
 801dbfe:	3304      	adds	r3, #4
 801dc00:	461a      	mov	r2, r3
 801dc02:	4620      	mov	r0, r4
 801dc04:	f7ff f88a 	bl	801cd1c <tcp_eff_send_mss_netif>
 801dc08:	4603      	mov	r3, r0
 801dc0a:	461a      	mov	r2, r3
 801dc0c:	687b      	ldr	r3, [r7, #4]
 801dc0e:	865a      	strh	r2, [r3, #50]	@ 0x32
#endif /* TCP_CALCULATE_EFF_SEND_MSS */

        pcb->cwnd = LWIP_TCP_CALC_INITIAL_CWND(pcb->mss);
 801dc10:	687b      	ldr	r3, [r7, #4]
 801dc12:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801dc14:	009a      	lsls	r2, r3, #2
 801dc16:	687b      	ldr	r3, [r7, #4]
 801dc18:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801dc1a:	005b      	lsls	r3, r3, #1
 801dc1c:	f241 111c 	movw	r1, #4380	@ 0x111c
 801dc20:	428b      	cmp	r3, r1
 801dc22:	bf38      	it	cc
 801dc24:	460b      	movcc	r3, r1
 801dc26:	429a      	cmp	r2, r3
 801dc28:	d204      	bcs.n	801dc34 <tcp_process+0x210>
 801dc2a:	687b      	ldr	r3, [r7, #4]
 801dc2c:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801dc2e:	009b      	lsls	r3, r3, #2
 801dc30:	b29b      	uxth	r3, r3
 801dc32:	e00d      	b.n	801dc50 <tcp_process+0x22c>
 801dc34:	687b      	ldr	r3, [r7, #4]
 801dc36:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801dc38:	005b      	lsls	r3, r3, #1
 801dc3a:	f241 121c 	movw	r2, #4380	@ 0x111c
 801dc3e:	4293      	cmp	r3, r2
 801dc40:	d904      	bls.n	801dc4c <tcp_process+0x228>
 801dc42:	687b      	ldr	r3, [r7, #4]
 801dc44:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801dc46:	005b      	lsls	r3, r3, #1
 801dc48:	b29b      	uxth	r3, r3
 801dc4a:	e001      	b.n	801dc50 <tcp_process+0x22c>
 801dc4c:	f241 131c 	movw	r3, #4380	@ 0x111c
 801dc50:	687a      	ldr	r2, [r7, #4]
 801dc52:	f8a2 3048 	strh.w	r3, [r2, #72]	@ 0x48
        LWIP_DEBUGF(TCP_CWND_DEBUG, ("tcp_process (SENT): cwnd %"TCPWNDSIZE_F
                                     " ssthresh %"TCPWNDSIZE_F"\n",
                                     pcb->cwnd, pcb->ssthresh));
        LWIP_ASSERT("pcb->snd_queuelen > 0", (pcb->snd_queuelen > 0));
 801dc56:	687b      	ldr	r3, [r7, #4]
 801dc58:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 801dc5c:	2b00      	cmp	r3, #0
 801dc5e:	d106      	bne.n	801dc6e <tcp_process+0x24a>
 801dc60:	4b13      	ldr	r3, [pc, #76]	@ (801dcb0 <tcp_process+0x28c>)
 801dc62:	f44f 725b 	mov.w	r2, #876	@ 0x36c
 801dc66:	491c      	ldr	r1, [pc, #112]	@ (801dcd8 <tcp_process+0x2b4>)
 801dc68:	4813      	ldr	r0, [pc, #76]	@ (801dcb8 <tcp_process+0x294>)
 801dc6a:	f00c faa7 	bl	802a1bc <iprintf>
        --pcb->snd_queuelen;
 801dc6e:	687b      	ldr	r3, [r7, #4]
 801dc70:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 801dc74:	3b01      	subs	r3, #1
 801dc76:	b29a      	uxth	r2, r3
 801dc78:	687b      	ldr	r3, [r7, #4]
 801dc7a:	f8a3 2066 	strh.w	r2, [r3, #102]	@ 0x66
        LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_process: SYN-SENT --queuelen %"TCPWNDSIZE_F"\n", (tcpwnd_size_t)pcb->snd_queuelen));
        rseg = pcb->unacked;
 801dc7e:	687b      	ldr	r3, [r7, #4]
 801dc80:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801dc82:	617b      	str	r3, [r7, #20]
        if (rseg == NULL) {
 801dc84:	697b      	ldr	r3, [r7, #20]
 801dc86:	2b00      	cmp	r3, #0
 801dc88:	d12a      	bne.n	801dce0 <tcp_process+0x2bc>
          /* might happen if tcp_output fails in tcp_rexmit_rto()
             in which case the segment is on the unsent list */
          rseg = pcb->unsent;
 801dc8a:	687b      	ldr	r3, [r7, #4]
 801dc8c:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801dc8e:	617b      	str	r3, [r7, #20]
          LWIP_ASSERT("no segment to free", rseg != NULL);
 801dc90:	697b      	ldr	r3, [r7, #20]
 801dc92:	2b00      	cmp	r3, #0
 801dc94:	d106      	bne.n	801dca4 <tcp_process+0x280>
 801dc96:	4b06      	ldr	r3, [pc, #24]	@ (801dcb0 <tcp_process+0x28c>)
 801dc98:	f44f 725d 	mov.w	r2, #884	@ 0x374
 801dc9c:	490f      	ldr	r1, [pc, #60]	@ (801dcdc <tcp_process+0x2b8>)
 801dc9e:	4806      	ldr	r0, [pc, #24]	@ (801dcb8 <tcp_process+0x294>)
 801dca0:	f00c fa8c 	bl	802a1bc <iprintf>
          pcb->unsent = rseg->next;
 801dca4:	697b      	ldr	r3, [r7, #20]
 801dca6:	681a      	ldr	r2, [r3, #0]
 801dca8:	687b      	ldr	r3, [r7, #4]
 801dcaa:	66da      	str	r2, [r3, #108]	@ 0x6c
 801dcac:	e01c      	b.n	801dce8 <tcp_process+0x2c4>
 801dcae:	bf00      	nop
 801dcb0:	0802f5a4 	.word	0x0802f5a4
 801dcb4:	0802f7dc 	.word	0x0802f7dc
 801dcb8:	0802f5f0 	.word	0x0802f5f0
 801dcbc:	2402afa0 	.word	0x2402afa0
 801dcc0:	2402af98 	.word	0x2402af98
 801dcc4:	2402af94 	.word	0x2402af94
 801dcc8:	0802f7f8 	.word	0x0802f7f8
 801dccc:	2402afa1 	.word	0x2402afa1
 801dcd0:	2402af58 	.word	0x2402af58
 801dcd4:	2402af84 	.word	0x2402af84
 801dcd8:	0802f818 	.word	0x0802f818
 801dcdc:	0802f830 	.word	0x0802f830
        } else {
          pcb->unacked = rseg->next;
 801dce0:	697b      	ldr	r3, [r7, #20]
 801dce2:	681a      	ldr	r2, [r3, #0]
 801dce4:	687b      	ldr	r3, [r7, #4]
 801dce6:	671a      	str	r2, [r3, #112]	@ 0x70
        }
        tcp_seg_free(rseg);
 801dce8:	6978      	ldr	r0, [r7, #20]
 801dcea:	f7fe fc48 	bl	801c57e <tcp_seg_free>

        /* If there's nothing left to acknowledge, stop the retransmit
           timer, otherwise reset it to start again */
        if (pcb->unacked == NULL) {
 801dcee:	687b      	ldr	r3, [r7, #4]
 801dcf0:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801dcf2:	2b00      	cmp	r3, #0
 801dcf4:	d104      	bne.n	801dd00 <tcp_process+0x2dc>
          pcb->rtime = -1;
 801dcf6:	687b      	ldr	r3, [r7, #4]
 801dcf8:	f64f 72ff 	movw	r2, #65535	@ 0xffff
 801dcfc:	861a      	strh	r2, [r3, #48]	@ 0x30
 801dcfe:	e006      	b.n	801dd0e <tcp_process+0x2ea>
        } else {
          pcb->rtime = 0;
 801dd00:	687b      	ldr	r3, [r7, #4]
 801dd02:	2200      	movs	r2, #0
 801dd04:	861a      	strh	r2, [r3, #48]	@ 0x30
          pcb->nrtx = 0;
 801dd06:	687b      	ldr	r3, [r7, #4]
 801dd08:	2200      	movs	r2, #0
 801dd0a:	f883 2042 	strb.w	r2, [r3, #66]	@ 0x42
        }

        /* Call the user specified function to call when successfully
         * connected. */
        TCP_EVENT_CONNECTED(pcb, ERR_OK, err);
 801dd0e:	687b      	ldr	r3, [r7, #4]
 801dd10:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 801dd14:	2b00      	cmp	r3, #0
 801dd16:	d00a      	beq.n	801dd2e <tcp_process+0x30a>
 801dd18:	687b      	ldr	r3, [r7, #4]
 801dd1a:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 801dd1e:	687a      	ldr	r2, [r7, #4]
 801dd20:	6910      	ldr	r0, [r2, #16]
 801dd22:	2200      	movs	r2, #0
 801dd24:	6879      	ldr	r1, [r7, #4]
 801dd26:	4798      	blx	r3
 801dd28:	4603      	mov	r3, r0
 801dd2a:	77bb      	strb	r3, [r7, #30]
 801dd2c:	e001      	b.n	801dd32 <tcp_process+0x30e>
 801dd2e:	2300      	movs	r3, #0
 801dd30:	77bb      	strb	r3, [r7, #30]
        if (err == ERR_ABRT) {
 801dd32:	f997 301e 	ldrsb.w	r3, [r7, #30]
 801dd36:	f113 0f0d 	cmn.w	r3, #13
 801dd3a:	d102      	bne.n	801dd42 <tcp_process+0x31e>
          return ERR_ABRT;
 801dd3c:	f06f 030c 	mvn.w	r3, #12
 801dd40:	e250      	b.n	801e1e4 <tcp_process+0x7c0>
        }
        tcp_ack_now(pcb);
 801dd42:	687b      	ldr	r3, [r7, #4]
 801dd44:	8b5b      	ldrh	r3, [r3, #26]
 801dd46:	f043 0302 	orr.w	r3, r3, #2
 801dd4a:	b29a      	uxth	r2, r3
 801dd4c:	687b      	ldr	r3, [r7, #4]
 801dd4e:	835a      	strh	r2, [r3, #26]
        if (pcb->nrtx < TCP_SYNMAXRTX) {
          pcb->rtime = 0;
          tcp_rexmit_rto(pcb);
        }
      }
      break;
 801dd50:	e23a      	b.n	801e1c8 <tcp_process+0x7a4>
      else if (flags & TCP_ACK) {
 801dd52:	4b98      	ldr	r3, [pc, #608]	@ (801dfb4 <tcp_process+0x590>)
 801dd54:	781b      	ldrb	r3, [r3, #0]
 801dd56:	f003 0310 	and.w	r3, r3, #16
 801dd5a:	2b00      	cmp	r3, #0
 801dd5c:	f000 8234 	beq.w	801e1c8 <tcp_process+0x7a4>
        tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
 801dd60:	4b95      	ldr	r3, [pc, #596]	@ (801dfb8 <tcp_process+0x594>)
 801dd62:	6819      	ldr	r1, [r3, #0]
 801dd64:	4b95      	ldr	r3, [pc, #596]	@ (801dfbc <tcp_process+0x598>)
 801dd66:	881b      	ldrh	r3, [r3, #0]
 801dd68:	461a      	mov	r2, r3
 801dd6a:	4b95      	ldr	r3, [pc, #596]	@ (801dfc0 <tcp_process+0x59c>)
 801dd6c:	681b      	ldr	r3, [r3, #0]
 801dd6e:	18d0      	adds	r0, r2, r3
                ip_current_src_addr(), tcphdr->dest, tcphdr->src);
 801dd70:	4b94      	ldr	r3, [pc, #592]	@ (801dfc4 <tcp_process+0x5a0>)
 801dd72:	681b      	ldr	r3, [r3, #0]
        tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
 801dd74:	885b      	ldrh	r3, [r3, #2]
 801dd76:	b29b      	uxth	r3, r3
                ip_current_src_addr(), tcphdr->dest, tcphdr->src);
 801dd78:	4a92      	ldr	r2, [pc, #584]	@ (801dfc4 <tcp_process+0x5a0>)
 801dd7a:	6812      	ldr	r2, [r2, #0]
        tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
 801dd7c:	8812      	ldrh	r2, [r2, #0]
 801dd7e:	b292      	uxth	r2, r2
 801dd80:	9202      	str	r2, [sp, #8]
 801dd82:	9301      	str	r3, [sp, #4]
 801dd84:	4b90      	ldr	r3, [pc, #576]	@ (801dfc8 <tcp_process+0x5a4>)
 801dd86:	9300      	str	r3, [sp, #0]
 801dd88:	4b90      	ldr	r3, [pc, #576]	@ (801dfcc <tcp_process+0x5a8>)
 801dd8a:	4602      	mov	r2, r0
 801dd8c:	6878      	ldr	r0, [r7, #4]
 801dd8e:	f003 f94b 	bl	8021028 <tcp_rst>
        if (pcb->nrtx < TCP_SYNMAXRTX) {
 801dd92:	687b      	ldr	r3, [r7, #4]
 801dd94:	f893 3042 	ldrb.w	r3, [r3, #66]	@ 0x42
 801dd98:	2b05      	cmp	r3, #5
 801dd9a:	f200 8215 	bhi.w	801e1c8 <tcp_process+0x7a4>
          pcb->rtime = 0;
 801dd9e:	687b      	ldr	r3, [r7, #4]
 801dda0:	2200      	movs	r2, #0
 801dda2:	861a      	strh	r2, [r3, #48]	@ 0x30
          tcp_rexmit_rto(pcb);
 801dda4:	6878      	ldr	r0, [r7, #4]
 801dda6:	f002 ff17 	bl	8020bd8 <tcp_rexmit_rto>
      break;
 801ddaa:	e20d      	b.n	801e1c8 <tcp_process+0x7a4>
    case SYN_RCVD:
      if (flags & TCP_ACK) {
 801ddac:	4b81      	ldr	r3, [pc, #516]	@ (801dfb4 <tcp_process+0x590>)
 801ddae:	781b      	ldrb	r3, [r3, #0]
 801ddb0:	f003 0310 	and.w	r3, r3, #16
 801ddb4:	2b00      	cmp	r3, #0
 801ddb6:	f000 80a1 	beq.w	801defc <tcp_process+0x4d8>
        /* expected ACK number? */
        if (TCP_SEQ_BETWEEN(ackno, pcb->lastack + 1, pcb->snd_nxt)) {
 801ddba:	4b7f      	ldr	r3, [pc, #508]	@ (801dfb8 <tcp_process+0x594>)
 801ddbc:	681a      	ldr	r2, [r3, #0]
 801ddbe:	687b      	ldr	r3, [r7, #4]
 801ddc0:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 801ddc2:	1ad3      	subs	r3, r2, r3
 801ddc4:	3b01      	subs	r3, #1
 801ddc6:	2b00      	cmp	r3, #0
 801ddc8:	db7e      	blt.n	801dec8 <tcp_process+0x4a4>
 801ddca:	4b7b      	ldr	r3, [pc, #492]	@ (801dfb8 <tcp_process+0x594>)
 801ddcc:	681a      	ldr	r2, [r3, #0]
 801ddce:	687b      	ldr	r3, [r7, #4]
 801ddd0:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 801ddd2:	1ad3      	subs	r3, r2, r3
 801ddd4:	2b00      	cmp	r3, #0
 801ddd6:	dc77      	bgt.n	801dec8 <tcp_process+0x4a4>
          pcb->state = ESTABLISHED;
 801ddd8:	687b      	ldr	r3, [r7, #4]
 801ddda:	2204      	movs	r2, #4
 801dddc:	751a      	strb	r2, [r3, #20]
          LWIP_DEBUGF(TCP_DEBUG, ("TCP connection established %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest));
#if LWIP_CALLBACK_API || TCP_LISTEN_BACKLOG
          if (pcb->listener == NULL) {
 801ddde:	687b      	ldr	r3, [r7, #4]
 801dde0:	6fdb      	ldr	r3, [r3, #124]	@ 0x7c
 801dde2:	2b00      	cmp	r3, #0
 801dde4:	d102      	bne.n	801ddec <tcp_process+0x3c8>
            /* listen pcb might be closed by now */
            err = ERR_VAL;
 801dde6:	23fa      	movs	r3, #250	@ 0xfa
 801dde8:	77bb      	strb	r3, [r7, #30]
 801ddea:	e01d      	b.n	801de28 <tcp_process+0x404>
          } else
#endif /* LWIP_CALLBACK_API || TCP_LISTEN_BACKLOG */
          {
#if LWIP_CALLBACK_API
            LWIP_ASSERT("pcb->listener->accept != NULL", pcb->listener->accept != NULL);
 801ddec:	687b      	ldr	r3, [r7, #4]
 801ddee:	6fdb      	ldr	r3, [r3, #124]	@ 0x7c
 801ddf0:	699b      	ldr	r3, [r3, #24]
 801ddf2:	2b00      	cmp	r3, #0
 801ddf4:	d106      	bne.n	801de04 <tcp_process+0x3e0>
 801ddf6:	4b76      	ldr	r3, [pc, #472]	@ (801dfd0 <tcp_process+0x5ac>)
 801ddf8:	f44f 726a 	mov.w	r2, #936	@ 0x3a8
 801ddfc:	4975      	ldr	r1, [pc, #468]	@ (801dfd4 <tcp_process+0x5b0>)
 801ddfe:	4876      	ldr	r0, [pc, #472]	@ (801dfd8 <tcp_process+0x5b4>)
 801de00:	f00c f9dc 	bl	802a1bc <iprintf>
#endif
            tcp_backlog_accepted(pcb);
            /* Call the accept function. */
            TCP_EVENT_ACCEPT(pcb->listener, pcb, pcb->callback_arg, ERR_OK, err);
 801de04:	687b      	ldr	r3, [r7, #4]
 801de06:	6fdb      	ldr	r3, [r3, #124]	@ 0x7c
 801de08:	699b      	ldr	r3, [r3, #24]
 801de0a:	2b00      	cmp	r3, #0
 801de0c:	d00a      	beq.n	801de24 <tcp_process+0x400>
 801de0e:	687b      	ldr	r3, [r7, #4]
 801de10:	6fdb      	ldr	r3, [r3, #124]	@ 0x7c
 801de12:	699b      	ldr	r3, [r3, #24]
 801de14:	687a      	ldr	r2, [r7, #4]
 801de16:	6910      	ldr	r0, [r2, #16]
 801de18:	2200      	movs	r2, #0
 801de1a:	6879      	ldr	r1, [r7, #4]
 801de1c:	4798      	blx	r3
 801de1e:	4603      	mov	r3, r0
 801de20:	77bb      	strb	r3, [r7, #30]
 801de22:	e001      	b.n	801de28 <tcp_process+0x404>
 801de24:	23f0      	movs	r3, #240	@ 0xf0
 801de26:	77bb      	strb	r3, [r7, #30]
          }
          if (err != ERR_OK) {
 801de28:	f997 301e 	ldrsb.w	r3, [r7, #30]
 801de2c:	2b00      	cmp	r3, #0
 801de2e:	d00a      	beq.n	801de46 <tcp_process+0x422>
            /* If the accept function returns with an error, we abort
             * the connection. */
            /* Already aborted? */
            if (err != ERR_ABRT) {
 801de30:	f997 301e 	ldrsb.w	r3, [r7, #30]
 801de34:	f113 0f0d 	cmn.w	r3, #13
 801de38:	d002      	beq.n	801de40 <tcp_process+0x41c>
              tcp_abort(pcb);
 801de3a:	6878      	ldr	r0, [r7, #4]
 801de3c:	f7fd fd4c 	bl	801b8d8 <tcp_abort>
            }
            return ERR_ABRT;
 801de40:	f06f 030c 	mvn.w	r3, #12
 801de44:	e1ce      	b.n	801e1e4 <tcp_process+0x7c0>
          }
          /* If there was any data contained within this ACK,
           * we'd better pass it on to the application as well. */
          tcp_receive(pcb);
 801de46:	6878      	ldr	r0, [r7, #4]
 801de48:	f000 fae0 	bl	801e40c <tcp_receive>

          /* Prevent ACK for SYN to generate a sent event */
          if (recv_acked != 0) {
 801de4c:	4b63      	ldr	r3, [pc, #396]	@ (801dfdc <tcp_process+0x5b8>)
 801de4e:	881b      	ldrh	r3, [r3, #0]
 801de50:	2b00      	cmp	r3, #0
 801de52:	d005      	beq.n	801de60 <tcp_process+0x43c>
            recv_acked--;
 801de54:	4b61      	ldr	r3, [pc, #388]	@ (801dfdc <tcp_process+0x5b8>)
 801de56:	881b      	ldrh	r3, [r3, #0]
 801de58:	3b01      	subs	r3, #1
 801de5a:	b29a      	uxth	r2, r3
 801de5c:	4b5f      	ldr	r3, [pc, #380]	@ (801dfdc <tcp_process+0x5b8>)
 801de5e:	801a      	strh	r2, [r3, #0]
          }

          pcb->cwnd = LWIP_TCP_CALC_INITIAL_CWND(pcb->mss);
 801de60:	687b      	ldr	r3, [r7, #4]
 801de62:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801de64:	009a      	lsls	r2, r3, #2
 801de66:	687b      	ldr	r3, [r7, #4]
 801de68:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801de6a:	005b      	lsls	r3, r3, #1
 801de6c:	f241 111c 	movw	r1, #4380	@ 0x111c
 801de70:	428b      	cmp	r3, r1
 801de72:	bf38      	it	cc
 801de74:	460b      	movcc	r3, r1
 801de76:	429a      	cmp	r2, r3
 801de78:	d204      	bcs.n	801de84 <tcp_process+0x460>
 801de7a:	687b      	ldr	r3, [r7, #4]
 801de7c:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801de7e:	009b      	lsls	r3, r3, #2
 801de80:	b29b      	uxth	r3, r3
 801de82:	e00d      	b.n	801dea0 <tcp_process+0x47c>
 801de84:	687b      	ldr	r3, [r7, #4]
 801de86:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801de88:	005b      	lsls	r3, r3, #1
 801de8a:	f241 121c 	movw	r2, #4380	@ 0x111c
 801de8e:	4293      	cmp	r3, r2
 801de90:	d904      	bls.n	801de9c <tcp_process+0x478>
 801de92:	687b      	ldr	r3, [r7, #4]
 801de94:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801de96:	005b      	lsls	r3, r3, #1
 801de98:	b29b      	uxth	r3, r3
 801de9a:	e001      	b.n	801dea0 <tcp_process+0x47c>
 801de9c:	f241 131c 	movw	r3, #4380	@ 0x111c
 801dea0:	687a      	ldr	r2, [r7, #4]
 801dea2:	f8a2 3048 	strh.w	r3, [r2, #72]	@ 0x48
          LWIP_DEBUGF(TCP_CWND_DEBUG, ("tcp_process (SYN_RCVD): cwnd %"TCPWNDSIZE_F
                                       " ssthresh %"TCPWNDSIZE_F"\n",
                                       pcb->cwnd, pcb->ssthresh));

          if (recv_flags & TF_GOT_FIN) {
 801dea6:	4b4e      	ldr	r3, [pc, #312]	@ (801dfe0 <tcp_process+0x5bc>)
 801dea8:	781b      	ldrb	r3, [r3, #0]
 801deaa:	f003 0320 	and.w	r3, r3, #32
 801deae:	2b00      	cmp	r3, #0
 801deb0:	d037      	beq.n	801df22 <tcp_process+0x4fe>
            tcp_ack_now(pcb);
 801deb2:	687b      	ldr	r3, [r7, #4]
 801deb4:	8b5b      	ldrh	r3, [r3, #26]
 801deb6:	f043 0302 	orr.w	r3, r3, #2
 801deba:	b29a      	uxth	r2, r3
 801debc:	687b      	ldr	r3, [r7, #4]
 801debe:	835a      	strh	r2, [r3, #26]
            pcb->state = CLOSE_WAIT;
 801dec0:	687b      	ldr	r3, [r7, #4]
 801dec2:	2207      	movs	r2, #7
 801dec4:	751a      	strb	r2, [r3, #20]
          if (recv_flags & TF_GOT_FIN) {
 801dec6:	e02c      	b.n	801df22 <tcp_process+0x4fe>
          }
        } else {
          /* incorrect ACK number, send RST */
          tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
 801dec8:	4b3b      	ldr	r3, [pc, #236]	@ (801dfb8 <tcp_process+0x594>)
 801deca:	6819      	ldr	r1, [r3, #0]
 801decc:	4b3b      	ldr	r3, [pc, #236]	@ (801dfbc <tcp_process+0x598>)
 801dece:	881b      	ldrh	r3, [r3, #0]
 801ded0:	461a      	mov	r2, r3
 801ded2:	4b3b      	ldr	r3, [pc, #236]	@ (801dfc0 <tcp_process+0x59c>)
 801ded4:	681b      	ldr	r3, [r3, #0]
 801ded6:	18d0      	adds	r0, r2, r3
                  ip_current_src_addr(), tcphdr->dest, tcphdr->src);
 801ded8:	4b3a      	ldr	r3, [pc, #232]	@ (801dfc4 <tcp_process+0x5a0>)
 801deda:	681b      	ldr	r3, [r3, #0]
          tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
 801dedc:	885b      	ldrh	r3, [r3, #2]
 801dede:	b29b      	uxth	r3, r3
                  ip_current_src_addr(), tcphdr->dest, tcphdr->src);
 801dee0:	4a38      	ldr	r2, [pc, #224]	@ (801dfc4 <tcp_process+0x5a0>)
 801dee2:	6812      	ldr	r2, [r2, #0]
          tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
 801dee4:	8812      	ldrh	r2, [r2, #0]
 801dee6:	b292      	uxth	r2, r2
 801dee8:	9202      	str	r2, [sp, #8]
 801deea:	9301      	str	r3, [sp, #4]
 801deec:	4b36      	ldr	r3, [pc, #216]	@ (801dfc8 <tcp_process+0x5a4>)
 801deee:	9300      	str	r3, [sp, #0]
 801def0:	4b36      	ldr	r3, [pc, #216]	@ (801dfcc <tcp_process+0x5a8>)
 801def2:	4602      	mov	r2, r0
 801def4:	6878      	ldr	r0, [r7, #4]
 801def6:	f003 f897 	bl	8021028 <tcp_rst>
        }
      } else if ((flags & TCP_SYN) && (seqno == pcb->rcv_nxt - 1)) {
        /* Looks like another copy of the SYN - retransmit our SYN-ACK */
        tcp_rexmit(pcb);
      }
      break;
 801defa:	e167      	b.n	801e1cc <tcp_process+0x7a8>
      } else if ((flags & TCP_SYN) && (seqno == pcb->rcv_nxt - 1)) {
 801defc:	4b2d      	ldr	r3, [pc, #180]	@ (801dfb4 <tcp_process+0x590>)
 801defe:	781b      	ldrb	r3, [r3, #0]
 801df00:	f003 0302 	and.w	r3, r3, #2
 801df04:	2b00      	cmp	r3, #0
 801df06:	f000 8161 	beq.w	801e1cc <tcp_process+0x7a8>
 801df0a:	687b      	ldr	r3, [r7, #4]
 801df0c:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801df0e:	1e5a      	subs	r2, r3, #1
 801df10:	4b2b      	ldr	r3, [pc, #172]	@ (801dfc0 <tcp_process+0x59c>)
 801df12:	681b      	ldr	r3, [r3, #0]
 801df14:	429a      	cmp	r2, r3
 801df16:	f040 8159 	bne.w	801e1cc <tcp_process+0x7a8>
        tcp_rexmit(pcb);
 801df1a:	6878      	ldr	r0, [r7, #4]
 801df1c:	f002 fe7e 	bl	8020c1c <tcp_rexmit>
      break;
 801df20:	e154      	b.n	801e1cc <tcp_process+0x7a8>
 801df22:	e153      	b.n	801e1cc <tcp_process+0x7a8>
    case CLOSE_WAIT:
    /* FALLTHROUGH */
    case ESTABLISHED:
      tcp_receive(pcb);
 801df24:	6878      	ldr	r0, [r7, #4]
 801df26:	f000 fa71 	bl	801e40c <tcp_receive>
      if (recv_flags & TF_GOT_FIN) { /* passive close */
 801df2a:	4b2d      	ldr	r3, [pc, #180]	@ (801dfe0 <tcp_process+0x5bc>)
 801df2c:	781b      	ldrb	r3, [r3, #0]
 801df2e:	f003 0320 	and.w	r3, r3, #32
 801df32:	2b00      	cmp	r3, #0
 801df34:	f000 814c 	beq.w	801e1d0 <tcp_process+0x7ac>
        tcp_ack_now(pcb);
 801df38:	687b      	ldr	r3, [r7, #4]
 801df3a:	8b5b      	ldrh	r3, [r3, #26]
 801df3c:	f043 0302 	orr.w	r3, r3, #2
 801df40:	b29a      	uxth	r2, r3
 801df42:	687b      	ldr	r3, [r7, #4]
 801df44:	835a      	strh	r2, [r3, #26]
        pcb->state = CLOSE_WAIT;
 801df46:	687b      	ldr	r3, [r7, #4]
 801df48:	2207      	movs	r2, #7
 801df4a:	751a      	strb	r2, [r3, #20]
      }
      break;
 801df4c:	e140      	b.n	801e1d0 <tcp_process+0x7ac>
    case FIN_WAIT_1:
      tcp_receive(pcb);
 801df4e:	6878      	ldr	r0, [r7, #4]
 801df50:	f000 fa5c 	bl	801e40c <tcp_receive>
      if (recv_flags & TF_GOT_FIN) {
 801df54:	4b22      	ldr	r3, [pc, #136]	@ (801dfe0 <tcp_process+0x5bc>)
 801df56:	781b      	ldrb	r3, [r3, #0]
 801df58:	f003 0320 	and.w	r3, r3, #32
 801df5c:	2b00      	cmp	r3, #0
 801df5e:	d071      	beq.n	801e044 <tcp_process+0x620>
        if ((flags & TCP_ACK) && (ackno == pcb->snd_nxt) &&
 801df60:	4b14      	ldr	r3, [pc, #80]	@ (801dfb4 <tcp_process+0x590>)
 801df62:	781b      	ldrb	r3, [r3, #0]
 801df64:	f003 0310 	and.w	r3, r3, #16
 801df68:	2b00      	cmp	r3, #0
 801df6a:	d060      	beq.n	801e02e <tcp_process+0x60a>
 801df6c:	687b      	ldr	r3, [r7, #4]
 801df6e:	6d1a      	ldr	r2, [r3, #80]	@ 0x50
 801df70:	4b11      	ldr	r3, [pc, #68]	@ (801dfb8 <tcp_process+0x594>)
 801df72:	681b      	ldr	r3, [r3, #0]
 801df74:	429a      	cmp	r2, r3
 801df76:	d15a      	bne.n	801e02e <tcp_process+0x60a>
            pcb->unsent == NULL) {
 801df78:	687b      	ldr	r3, [r7, #4]
 801df7a:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
        if ((flags & TCP_ACK) && (ackno == pcb->snd_nxt) &&
 801df7c:	2b00      	cmp	r3, #0
 801df7e:	d156      	bne.n	801e02e <tcp_process+0x60a>
          LWIP_DEBUGF(TCP_DEBUG,
                      ("TCP connection closed: FIN_WAIT_1 %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest));
          tcp_ack_now(pcb);
 801df80:	687b      	ldr	r3, [r7, #4]
 801df82:	8b5b      	ldrh	r3, [r3, #26]
 801df84:	f043 0302 	orr.w	r3, r3, #2
 801df88:	b29a      	uxth	r2, r3
 801df8a:	687b      	ldr	r3, [r7, #4]
 801df8c:	835a      	strh	r2, [r3, #26]
          tcp_pcb_purge(pcb);
 801df8e:	6878      	ldr	r0, [r7, #4]
 801df90:	f7fe fdba 	bl	801cb08 <tcp_pcb_purge>
          TCP_RMV_ACTIVE(pcb);
 801df94:	4b13      	ldr	r3, [pc, #76]	@ (801dfe4 <tcp_process+0x5c0>)
 801df96:	681b      	ldr	r3, [r3, #0]
 801df98:	687a      	ldr	r2, [r7, #4]
 801df9a:	429a      	cmp	r2, r3
 801df9c:	d105      	bne.n	801dfaa <tcp_process+0x586>
 801df9e:	4b11      	ldr	r3, [pc, #68]	@ (801dfe4 <tcp_process+0x5c0>)
 801dfa0:	681b      	ldr	r3, [r3, #0]
 801dfa2:	68db      	ldr	r3, [r3, #12]
 801dfa4:	4a0f      	ldr	r2, [pc, #60]	@ (801dfe4 <tcp_process+0x5c0>)
 801dfa6:	6013      	str	r3, [r2, #0]
 801dfa8:	e02e      	b.n	801e008 <tcp_process+0x5e4>
 801dfaa:	4b0e      	ldr	r3, [pc, #56]	@ (801dfe4 <tcp_process+0x5c0>)
 801dfac:	681b      	ldr	r3, [r3, #0]
 801dfae:	613b      	str	r3, [r7, #16]
 801dfb0:	e027      	b.n	801e002 <tcp_process+0x5de>
 801dfb2:	bf00      	nop
 801dfb4:	2402afa0 	.word	0x2402afa0
 801dfb8:	2402af98 	.word	0x2402af98
 801dfbc:	2402af9e 	.word	0x2402af9e
 801dfc0:	2402af94 	.word	0x2402af94
 801dfc4:	2402af84 	.word	0x2402af84
 801dfc8:	24024418 	.word	0x24024418
 801dfcc:	2402441c 	.word	0x2402441c
 801dfd0:	0802f5a4 	.word	0x0802f5a4
 801dfd4:	0802f844 	.word	0x0802f844
 801dfd8:	0802f5f0 	.word	0x0802f5f0
 801dfdc:	2402af9c 	.word	0x2402af9c
 801dfe0:	2402afa1 	.word	0x2402afa1
 801dfe4:	2402af64 	.word	0x2402af64
 801dfe8:	693b      	ldr	r3, [r7, #16]
 801dfea:	68db      	ldr	r3, [r3, #12]
 801dfec:	687a      	ldr	r2, [r7, #4]
 801dfee:	429a      	cmp	r2, r3
 801dff0:	d104      	bne.n	801dffc <tcp_process+0x5d8>
 801dff2:	687b      	ldr	r3, [r7, #4]
 801dff4:	68da      	ldr	r2, [r3, #12]
 801dff6:	693b      	ldr	r3, [r7, #16]
 801dff8:	60da      	str	r2, [r3, #12]
 801dffa:	e005      	b.n	801e008 <tcp_process+0x5e4>
 801dffc:	693b      	ldr	r3, [r7, #16]
 801dffe:	68db      	ldr	r3, [r3, #12]
 801e000:	613b      	str	r3, [r7, #16]
 801e002:	693b      	ldr	r3, [r7, #16]
 801e004:	2b00      	cmp	r3, #0
 801e006:	d1ef      	bne.n	801dfe8 <tcp_process+0x5c4>
 801e008:	687b      	ldr	r3, [r7, #4]
 801e00a:	2200      	movs	r2, #0
 801e00c:	60da      	str	r2, [r3, #12]
 801e00e:	4b77      	ldr	r3, [pc, #476]	@ (801e1ec <tcp_process+0x7c8>)
 801e010:	2201      	movs	r2, #1
 801e012:	701a      	strb	r2, [r3, #0]
          pcb->state = TIME_WAIT;
 801e014:	687b      	ldr	r3, [r7, #4]
 801e016:	220a      	movs	r2, #10
 801e018:	751a      	strb	r2, [r3, #20]
          TCP_REG(&tcp_tw_pcbs, pcb);
 801e01a:	4b75      	ldr	r3, [pc, #468]	@ (801e1f0 <tcp_process+0x7cc>)
 801e01c:	681a      	ldr	r2, [r3, #0]
 801e01e:	687b      	ldr	r3, [r7, #4]
 801e020:	60da      	str	r2, [r3, #12]
 801e022:	4a73      	ldr	r2, [pc, #460]	@ (801e1f0 <tcp_process+0x7cc>)
 801e024:	687b      	ldr	r3, [r7, #4]
 801e026:	6013      	str	r3, [r2, #0]
 801e028:	f003 f9c0 	bl	80213ac <tcp_timer_needed>
        }
      } else if ((flags & TCP_ACK) && (ackno == pcb->snd_nxt) &&
                 pcb->unsent == NULL) {
        pcb->state = FIN_WAIT_2;
      }
      break;
 801e02c:	e0d2      	b.n	801e1d4 <tcp_process+0x7b0>
          tcp_ack_now(pcb);
 801e02e:	687b      	ldr	r3, [r7, #4]
 801e030:	8b5b      	ldrh	r3, [r3, #26]
 801e032:	f043 0302 	orr.w	r3, r3, #2
 801e036:	b29a      	uxth	r2, r3
 801e038:	687b      	ldr	r3, [r7, #4]
 801e03a:	835a      	strh	r2, [r3, #26]
          pcb->state = CLOSING;
 801e03c:	687b      	ldr	r3, [r7, #4]
 801e03e:	2208      	movs	r2, #8
 801e040:	751a      	strb	r2, [r3, #20]
      break;
 801e042:	e0c7      	b.n	801e1d4 <tcp_process+0x7b0>
      } else if ((flags & TCP_ACK) && (ackno == pcb->snd_nxt) &&
 801e044:	4b6b      	ldr	r3, [pc, #428]	@ (801e1f4 <tcp_process+0x7d0>)
 801e046:	781b      	ldrb	r3, [r3, #0]
 801e048:	f003 0310 	and.w	r3, r3, #16
 801e04c:	2b00      	cmp	r3, #0
 801e04e:	f000 80c1 	beq.w	801e1d4 <tcp_process+0x7b0>
 801e052:	687b      	ldr	r3, [r7, #4]
 801e054:	6d1a      	ldr	r2, [r3, #80]	@ 0x50
 801e056:	4b68      	ldr	r3, [pc, #416]	@ (801e1f8 <tcp_process+0x7d4>)
 801e058:	681b      	ldr	r3, [r3, #0]
 801e05a:	429a      	cmp	r2, r3
 801e05c:	f040 80ba 	bne.w	801e1d4 <tcp_process+0x7b0>
                 pcb->unsent == NULL) {
 801e060:	687b      	ldr	r3, [r7, #4]
 801e062:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
      } else if ((flags & TCP_ACK) && (ackno == pcb->snd_nxt) &&
 801e064:	2b00      	cmp	r3, #0
 801e066:	f040 80b5 	bne.w	801e1d4 <tcp_process+0x7b0>
        pcb->state = FIN_WAIT_2;
 801e06a:	687b      	ldr	r3, [r7, #4]
 801e06c:	2206      	movs	r2, #6
 801e06e:	751a      	strb	r2, [r3, #20]
      break;
 801e070:	e0b0      	b.n	801e1d4 <tcp_process+0x7b0>
    case FIN_WAIT_2:
      tcp_receive(pcb);
 801e072:	6878      	ldr	r0, [r7, #4]
 801e074:	f000 f9ca 	bl	801e40c <tcp_receive>
      if (recv_flags & TF_GOT_FIN) {
 801e078:	4b60      	ldr	r3, [pc, #384]	@ (801e1fc <tcp_process+0x7d8>)
 801e07a:	781b      	ldrb	r3, [r3, #0]
 801e07c:	f003 0320 	and.w	r3, r3, #32
 801e080:	2b00      	cmp	r3, #0
 801e082:	f000 80a9 	beq.w	801e1d8 <tcp_process+0x7b4>
        LWIP_DEBUGF(TCP_DEBUG, ("TCP connection closed: FIN_WAIT_2 %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest));
        tcp_ack_now(pcb);
 801e086:	687b      	ldr	r3, [r7, #4]
 801e088:	8b5b      	ldrh	r3, [r3, #26]
 801e08a:	f043 0302 	orr.w	r3, r3, #2
 801e08e:	b29a      	uxth	r2, r3
 801e090:	687b      	ldr	r3, [r7, #4]
 801e092:	835a      	strh	r2, [r3, #26]
        tcp_pcb_purge(pcb);
 801e094:	6878      	ldr	r0, [r7, #4]
 801e096:	f7fe fd37 	bl	801cb08 <tcp_pcb_purge>
        TCP_RMV_ACTIVE(pcb);
 801e09a:	4b59      	ldr	r3, [pc, #356]	@ (801e200 <tcp_process+0x7dc>)
 801e09c:	681b      	ldr	r3, [r3, #0]
 801e09e:	687a      	ldr	r2, [r7, #4]
 801e0a0:	429a      	cmp	r2, r3
 801e0a2:	d105      	bne.n	801e0b0 <tcp_process+0x68c>
 801e0a4:	4b56      	ldr	r3, [pc, #344]	@ (801e200 <tcp_process+0x7dc>)
 801e0a6:	681b      	ldr	r3, [r3, #0]
 801e0a8:	68db      	ldr	r3, [r3, #12]
 801e0aa:	4a55      	ldr	r2, [pc, #340]	@ (801e200 <tcp_process+0x7dc>)
 801e0ac:	6013      	str	r3, [r2, #0]
 801e0ae:	e013      	b.n	801e0d8 <tcp_process+0x6b4>
 801e0b0:	4b53      	ldr	r3, [pc, #332]	@ (801e200 <tcp_process+0x7dc>)
 801e0b2:	681b      	ldr	r3, [r3, #0]
 801e0b4:	60fb      	str	r3, [r7, #12]
 801e0b6:	e00c      	b.n	801e0d2 <tcp_process+0x6ae>
 801e0b8:	68fb      	ldr	r3, [r7, #12]
 801e0ba:	68db      	ldr	r3, [r3, #12]
 801e0bc:	687a      	ldr	r2, [r7, #4]
 801e0be:	429a      	cmp	r2, r3
 801e0c0:	d104      	bne.n	801e0cc <tcp_process+0x6a8>
 801e0c2:	687b      	ldr	r3, [r7, #4]
 801e0c4:	68da      	ldr	r2, [r3, #12]
 801e0c6:	68fb      	ldr	r3, [r7, #12]
 801e0c8:	60da      	str	r2, [r3, #12]
 801e0ca:	e005      	b.n	801e0d8 <tcp_process+0x6b4>
 801e0cc:	68fb      	ldr	r3, [r7, #12]
 801e0ce:	68db      	ldr	r3, [r3, #12]
 801e0d0:	60fb      	str	r3, [r7, #12]
 801e0d2:	68fb      	ldr	r3, [r7, #12]
 801e0d4:	2b00      	cmp	r3, #0
 801e0d6:	d1ef      	bne.n	801e0b8 <tcp_process+0x694>
 801e0d8:	687b      	ldr	r3, [r7, #4]
 801e0da:	2200      	movs	r2, #0
 801e0dc:	60da      	str	r2, [r3, #12]
 801e0de:	4b43      	ldr	r3, [pc, #268]	@ (801e1ec <tcp_process+0x7c8>)
 801e0e0:	2201      	movs	r2, #1
 801e0e2:	701a      	strb	r2, [r3, #0]
        pcb->state = TIME_WAIT;
 801e0e4:	687b      	ldr	r3, [r7, #4]
 801e0e6:	220a      	movs	r2, #10
 801e0e8:	751a      	strb	r2, [r3, #20]
        TCP_REG(&tcp_tw_pcbs, pcb);
 801e0ea:	4b41      	ldr	r3, [pc, #260]	@ (801e1f0 <tcp_process+0x7cc>)
 801e0ec:	681a      	ldr	r2, [r3, #0]
 801e0ee:	687b      	ldr	r3, [r7, #4]
 801e0f0:	60da      	str	r2, [r3, #12]
 801e0f2:	4a3f      	ldr	r2, [pc, #252]	@ (801e1f0 <tcp_process+0x7cc>)
 801e0f4:	687b      	ldr	r3, [r7, #4]
 801e0f6:	6013      	str	r3, [r2, #0]
 801e0f8:	f003 f958 	bl	80213ac <tcp_timer_needed>
      }
      break;
 801e0fc:	e06c      	b.n	801e1d8 <tcp_process+0x7b4>
    case CLOSING:
      tcp_receive(pcb);
 801e0fe:	6878      	ldr	r0, [r7, #4]
 801e100:	f000 f984 	bl	801e40c <tcp_receive>
      if ((flags & TCP_ACK) && ackno == pcb->snd_nxt && pcb->unsent == NULL) {
 801e104:	4b3b      	ldr	r3, [pc, #236]	@ (801e1f4 <tcp_process+0x7d0>)
 801e106:	781b      	ldrb	r3, [r3, #0]
 801e108:	f003 0310 	and.w	r3, r3, #16
 801e10c:	2b00      	cmp	r3, #0
 801e10e:	d065      	beq.n	801e1dc <tcp_process+0x7b8>
 801e110:	687b      	ldr	r3, [r7, #4]
 801e112:	6d1a      	ldr	r2, [r3, #80]	@ 0x50
 801e114:	4b38      	ldr	r3, [pc, #224]	@ (801e1f8 <tcp_process+0x7d4>)
 801e116:	681b      	ldr	r3, [r3, #0]
 801e118:	429a      	cmp	r2, r3
 801e11a:	d15f      	bne.n	801e1dc <tcp_process+0x7b8>
 801e11c:	687b      	ldr	r3, [r7, #4]
 801e11e:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801e120:	2b00      	cmp	r3, #0
 801e122:	d15b      	bne.n	801e1dc <tcp_process+0x7b8>
        LWIP_DEBUGF(TCP_DEBUG, ("TCP connection closed: CLOSING %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest));
        tcp_pcb_purge(pcb);
 801e124:	6878      	ldr	r0, [r7, #4]
 801e126:	f7fe fcef 	bl	801cb08 <tcp_pcb_purge>
        TCP_RMV_ACTIVE(pcb);
 801e12a:	4b35      	ldr	r3, [pc, #212]	@ (801e200 <tcp_process+0x7dc>)
 801e12c:	681b      	ldr	r3, [r3, #0]
 801e12e:	687a      	ldr	r2, [r7, #4]
 801e130:	429a      	cmp	r2, r3
 801e132:	d105      	bne.n	801e140 <tcp_process+0x71c>
 801e134:	4b32      	ldr	r3, [pc, #200]	@ (801e200 <tcp_process+0x7dc>)
 801e136:	681b      	ldr	r3, [r3, #0]
 801e138:	68db      	ldr	r3, [r3, #12]
 801e13a:	4a31      	ldr	r2, [pc, #196]	@ (801e200 <tcp_process+0x7dc>)
 801e13c:	6013      	str	r3, [r2, #0]
 801e13e:	e013      	b.n	801e168 <tcp_process+0x744>
 801e140:	4b2f      	ldr	r3, [pc, #188]	@ (801e200 <tcp_process+0x7dc>)
 801e142:	681b      	ldr	r3, [r3, #0]
 801e144:	61bb      	str	r3, [r7, #24]
 801e146:	e00c      	b.n	801e162 <tcp_process+0x73e>
 801e148:	69bb      	ldr	r3, [r7, #24]
 801e14a:	68db      	ldr	r3, [r3, #12]
 801e14c:	687a      	ldr	r2, [r7, #4]
 801e14e:	429a      	cmp	r2, r3
 801e150:	d104      	bne.n	801e15c <tcp_process+0x738>
 801e152:	687b      	ldr	r3, [r7, #4]
 801e154:	68da      	ldr	r2, [r3, #12]
 801e156:	69bb      	ldr	r3, [r7, #24]
 801e158:	60da      	str	r2, [r3, #12]
 801e15a:	e005      	b.n	801e168 <tcp_process+0x744>
 801e15c:	69bb      	ldr	r3, [r7, #24]
 801e15e:	68db      	ldr	r3, [r3, #12]
 801e160:	61bb      	str	r3, [r7, #24]
 801e162:	69bb      	ldr	r3, [r7, #24]
 801e164:	2b00      	cmp	r3, #0
 801e166:	d1ef      	bne.n	801e148 <tcp_process+0x724>
 801e168:	687b      	ldr	r3, [r7, #4]
 801e16a:	2200      	movs	r2, #0
 801e16c:	60da      	str	r2, [r3, #12]
 801e16e:	4b1f      	ldr	r3, [pc, #124]	@ (801e1ec <tcp_process+0x7c8>)
 801e170:	2201      	movs	r2, #1
 801e172:	701a      	strb	r2, [r3, #0]
        pcb->state = TIME_WAIT;
 801e174:	687b      	ldr	r3, [r7, #4]
 801e176:	220a      	movs	r2, #10
 801e178:	751a      	strb	r2, [r3, #20]
        TCP_REG(&tcp_tw_pcbs, pcb);
 801e17a:	4b1d      	ldr	r3, [pc, #116]	@ (801e1f0 <tcp_process+0x7cc>)
 801e17c:	681a      	ldr	r2, [r3, #0]
 801e17e:	687b      	ldr	r3, [r7, #4]
 801e180:	60da      	str	r2, [r3, #12]
 801e182:	4a1b      	ldr	r2, [pc, #108]	@ (801e1f0 <tcp_process+0x7cc>)
 801e184:	687b      	ldr	r3, [r7, #4]
 801e186:	6013      	str	r3, [r2, #0]
 801e188:	f003 f910 	bl	80213ac <tcp_timer_needed>
      }
      break;
 801e18c:	e026      	b.n	801e1dc <tcp_process+0x7b8>
    case LAST_ACK:
      tcp_receive(pcb);
 801e18e:	6878      	ldr	r0, [r7, #4]
 801e190:	f000 f93c 	bl	801e40c <tcp_receive>
      if ((flags & TCP_ACK) && ackno == pcb->snd_nxt && pcb->unsent == NULL) {
 801e194:	4b17      	ldr	r3, [pc, #92]	@ (801e1f4 <tcp_process+0x7d0>)
 801e196:	781b      	ldrb	r3, [r3, #0]
 801e198:	f003 0310 	and.w	r3, r3, #16
 801e19c:	2b00      	cmp	r3, #0
 801e19e:	d01f      	beq.n	801e1e0 <tcp_process+0x7bc>
 801e1a0:	687b      	ldr	r3, [r7, #4]
 801e1a2:	6d1a      	ldr	r2, [r3, #80]	@ 0x50
 801e1a4:	4b14      	ldr	r3, [pc, #80]	@ (801e1f8 <tcp_process+0x7d4>)
 801e1a6:	681b      	ldr	r3, [r3, #0]
 801e1a8:	429a      	cmp	r2, r3
 801e1aa:	d119      	bne.n	801e1e0 <tcp_process+0x7bc>
 801e1ac:	687b      	ldr	r3, [r7, #4]
 801e1ae:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801e1b0:	2b00      	cmp	r3, #0
 801e1b2:	d115      	bne.n	801e1e0 <tcp_process+0x7bc>
        LWIP_DEBUGF(TCP_DEBUG, ("TCP connection closed: LAST_ACK %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest));
        /* bugfix #21699: don't set pcb->state to CLOSED here or we risk leaking segments */
        recv_flags |= TF_CLOSED;
 801e1b4:	4b11      	ldr	r3, [pc, #68]	@ (801e1fc <tcp_process+0x7d8>)
 801e1b6:	781b      	ldrb	r3, [r3, #0]
 801e1b8:	f043 0310 	orr.w	r3, r3, #16
 801e1bc:	b2da      	uxtb	r2, r3
 801e1be:	4b0f      	ldr	r3, [pc, #60]	@ (801e1fc <tcp_process+0x7d8>)
 801e1c0:	701a      	strb	r2, [r3, #0]
      }
      break;
 801e1c2:	e00d      	b.n	801e1e0 <tcp_process+0x7bc>
    default:
      break;
 801e1c4:	bf00      	nop
 801e1c6:	e00c      	b.n	801e1e2 <tcp_process+0x7be>
      break;
 801e1c8:	bf00      	nop
 801e1ca:	e00a      	b.n	801e1e2 <tcp_process+0x7be>
      break;
 801e1cc:	bf00      	nop
 801e1ce:	e008      	b.n	801e1e2 <tcp_process+0x7be>
      break;
 801e1d0:	bf00      	nop
 801e1d2:	e006      	b.n	801e1e2 <tcp_process+0x7be>
      break;
 801e1d4:	bf00      	nop
 801e1d6:	e004      	b.n	801e1e2 <tcp_process+0x7be>
      break;
 801e1d8:	bf00      	nop
 801e1da:	e002      	b.n	801e1e2 <tcp_process+0x7be>
      break;
 801e1dc:	bf00      	nop
 801e1de:	e000      	b.n	801e1e2 <tcp_process+0x7be>
      break;
 801e1e0:	bf00      	nop
  }
  return ERR_OK;
 801e1e2:	2300      	movs	r3, #0
}
 801e1e4:	4618      	mov	r0, r3
 801e1e6:	3724      	adds	r7, #36	@ 0x24
 801e1e8:	46bd      	mov	sp, r7
 801e1ea:	bd90      	pop	{r4, r7, pc}
 801e1ec:	2402af6c 	.word	0x2402af6c
 801e1f0:	2402af68 	.word	0x2402af68
 801e1f4:	2402afa0 	.word	0x2402afa0
 801e1f8:	2402af98 	.word	0x2402af98
 801e1fc:	2402afa1 	.word	0x2402afa1
 801e200:	2402af64 	.word	0x2402af64

0801e204 <tcp_oos_insert_segment>:
 *
 * Called from tcp_receive()
 */
static void
tcp_oos_insert_segment(struct tcp_seg *cseg, struct tcp_seg *next)
{
 801e204:	b590      	push	{r4, r7, lr}
 801e206:	b085      	sub	sp, #20
 801e208:	af00      	add	r7, sp, #0
 801e20a:	6078      	str	r0, [r7, #4]
 801e20c:	6039      	str	r1, [r7, #0]
  struct tcp_seg *old_seg;

  LWIP_ASSERT("tcp_oos_insert_segment: invalid cseg", cseg != NULL);
 801e20e:	687b      	ldr	r3, [r7, #4]
 801e210:	2b00      	cmp	r3, #0
 801e212:	d106      	bne.n	801e222 <tcp_oos_insert_segment+0x1e>
 801e214:	4b3b      	ldr	r3, [pc, #236]	@ (801e304 <tcp_oos_insert_segment+0x100>)
 801e216:	f240 421f 	movw	r2, #1055	@ 0x41f
 801e21a:	493b      	ldr	r1, [pc, #236]	@ (801e308 <tcp_oos_insert_segment+0x104>)
 801e21c:	483b      	ldr	r0, [pc, #236]	@ (801e30c <tcp_oos_insert_segment+0x108>)
 801e21e:	f00b ffcd 	bl	802a1bc <iprintf>

  if (TCPH_FLAGS(cseg->tcphdr) & TCP_FIN) {
 801e222:	687b      	ldr	r3, [r7, #4]
 801e224:	691b      	ldr	r3, [r3, #16]
 801e226:	899b      	ldrh	r3, [r3, #12]
 801e228:	b29b      	uxth	r3, r3
 801e22a:	4618      	mov	r0, r3
 801e22c:	f7fb f86c 	bl	8019308 <lwip_htons>
 801e230:	4603      	mov	r3, r0
 801e232:	b2db      	uxtb	r3, r3
 801e234:	f003 0301 	and.w	r3, r3, #1
 801e238:	2b00      	cmp	r3, #0
 801e23a:	d028      	beq.n	801e28e <tcp_oos_insert_segment+0x8a>
    /* received segment overlaps all following segments */
    tcp_segs_free(next);
 801e23c:	6838      	ldr	r0, [r7, #0]
 801e23e:	f7fe f989 	bl	801c554 <tcp_segs_free>
    next = NULL;
 801e242:	2300      	movs	r3, #0
 801e244:	603b      	str	r3, [r7, #0]
 801e246:	e056      	b.n	801e2f6 <tcp_oos_insert_segment+0xf2>
       oos queue may have segments with FIN flag */
    while (next &&
           TCP_SEQ_GEQ((seqno + cseg->len),
                       (next->tcphdr->seqno + next->len))) {
      /* cseg with FIN already processed */
      if (TCPH_FLAGS(next->tcphdr) & TCP_FIN) {
 801e248:	683b      	ldr	r3, [r7, #0]
 801e24a:	691b      	ldr	r3, [r3, #16]
 801e24c:	899b      	ldrh	r3, [r3, #12]
 801e24e:	b29b      	uxth	r3, r3
 801e250:	4618      	mov	r0, r3
 801e252:	f7fb f859 	bl	8019308 <lwip_htons>
 801e256:	4603      	mov	r3, r0
 801e258:	b2db      	uxtb	r3, r3
 801e25a:	f003 0301 	and.w	r3, r3, #1
 801e25e:	2b00      	cmp	r3, #0
 801e260:	d00d      	beq.n	801e27e <tcp_oos_insert_segment+0x7a>
        TCPH_SET_FLAG(cseg->tcphdr, TCP_FIN);
 801e262:	687b      	ldr	r3, [r7, #4]
 801e264:	691b      	ldr	r3, [r3, #16]
 801e266:	899b      	ldrh	r3, [r3, #12]
 801e268:	b29c      	uxth	r4, r3
 801e26a:	2001      	movs	r0, #1
 801e26c:	f7fb f84c 	bl	8019308 <lwip_htons>
 801e270:	4603      	mov	r3, r0
 801e272:	461a      	mov	r2, r3
 801e274:	687b      	ldr	r3, [r7, #4]
 801e276:	691b      	ldr	r3, [r3, #16]
 801e278:	4322      	orrs	r2, r4
 801e27a:	b292      	uxth	r2, r2
 801e27c:	819a      	strh	r2, [r3, #12]
      }
      old_seg = next;
 801e27e:	683b      	ldr	r3, [r7, #0]
 801e280:	60fb      	str	r3, [r7, #12]
      next = next->next;
 801e282:	683b      	ldr	r3, [r7, #0]
 801e284:	681b      	ldr	r3, [r3, #0]
 801e286:	603b      	str	r3, [r7, #0]
      tcp_seg_free(old_seg);
 801e288:	68f8      	ldr	r0, [r7, #12]
 801e28a:	f7fe f978 	bl	801c57e <tcp_seg_free>
    while (next &&
 801e28e:	683b      	ldr	r3, [r7, #0]
 801e290:	2b00      	cmp	r3, #0
 801e292:	d00e      	beq.n	801e2b2 <tcp_oos_insert_segment+0xae>
           TCP_SEQ_GEQ((seqno + cseg->len),
 801e294:	687b      	ldr	r3, [r7, #4]
 801e296:	891b      	ldrh	r3, [r3, #8]
 801e298:	461a      	mov	r2, r3
 801e29a:	4b1d      	ldr	r3, [pc, #116]	@ (801e310 <tcp_oos_insert_segment+0x10c>)
 801e29c:	681b      	ldr	r3, [r3, #0]
 801e29e:	441a      	add	r2, r3
 801e2a0:	683b      	ldr	r3, [r7, #0]
 801e2a2:	691b      	ldr	r3, [r3, #16]
 801e2a4:	685b      	ldr	r3, [r3, #4]
 801e2a6:	6839      	ldr	r1, [r7, #0]
 801e2a8:	8909      	ldrh	r1, [r1, #8]
 801e2aa:	440b      	add	r3, r1
 801e2ac:	1ad3      	subs	r3, r2, r3
    while (next &&
 801e2ae:	2b00      	cmp	r3, #0
 801e2b0:	daca      	bge.n	801e248 <tcp_oos_insert_segment+0x44>
    }
    if (next &&
 801e2b2:	683b      	ldr	r3, [r7, #0]
 801e2b4:	2b00      	cmp	r3, #0
 801e2b6:	d01e      	beq.n	801e2f6 <tcp_oos_insert_segment+0xf2>
        TCP_SEQ_GT(seqno + cseg->len, next->tcphdr->seqno)) {
 801e2b8:	687b      	ldr	r3, [r7, #4]
 801e2ba:	891b      	ldrh	r3, [r3, #8]
 801e2bc:	461a      	mov	r2, r3
 801e2be:	4b14      	ldr	r3, [pc, #80]	@ (801e310 <tcp_oos_insert_segment+0x10c>)
 801e2c0:	681b      	ldr	r3, [r3, #0]
 801e2c2:	441a      	add	r2, r3
 801e2c4:	683b      	ldr	r3, [r7, #0]
 801e2c6:	691b      	ldr	r3, [r3, #16]
 801e2c8:	685b      	ldr	r3, [r3, #4]
 801e2ca:	1ad3      	subs	r3, r2, r3
    if (next &&
 801e2cc:	2b00      	cmp	r3, #0
 801e2ce:	dd12      	ble.n	801e2f6 <tcp_oos_insert_segment+0xf2>
      /* We need to trim the incoming segment. */
      cseg->len = (u16_t)(next->tcphdr->seqno - seqno);
 801e2d0:	683b      	ldr	r3, [r7, #0]
 801e2d2:	691b      	ldr	r3, [r3, #16]
 801e2d4:	685b      	ldr	r3, [r3, #4]
 801e2d6:	b29a      	uxth	r2, r3
 801e2d8:	4b0d      	ldr	r3, [pc, #52]	@ (801e310 <tcp_oos_insert_segment+0x10c>)
 801e2da:	681b      	ldr	r3, [r3, #0]
 801e2dc:	b29b      	uxth	r3, r3
 801e2de:	1ad3      	subs	r3, r2, r3
 801e2e0:	b29a      	uxth	r2, r3
 801e2e2:	687b      	ldr	r3, [r7, #4]
 801e2e4:	811a      	strh	r2, [r3, #8]
      pbuf_realloc(cseg->p, cseg->len);
 801e2e6:	687b      	ldr	r3, [r7, #4]
 801e2e8:	685a      	ldr	r2, [r3, #4]
 801e2ea:	687b      	ldr	r3, [r7, #4]
 801e2ec:	891b      	ldrh	r3, [r3, #8]
 801e2ee:	4619      	mov	r1, r3
 801e2f0:	4610      	mov	r0, r2
 801e2f2:	f7fc fb35 	bl	801a960 <pbuf_realloc>
    }
  }
  cseg->next = next;
 801e2f6:	687b      	ldr	r3, [r7, #4]
 801e2f8:	683a      	ldr	r2, [r7, #0]
 801e2fa:	601a      	str	r2, [r3, #0]
}
 801e2fc:	bf00      	nop
 801e2fe:	3714      	adds	r7, #20
 801e300:	46bd      	mov	sp, r7
 801e302:	bd90      	pop	{r4, r7, pc}
 801e304:	0802f5a4 	.word	0x0802f5a4
 801e308:	0802f864 	.word	0x0802f864
 801e30c:	0802f5f0 	.word	0x0802f5f0
 801e310:	2402af94 	.word	0x2402af94

0801e314 <tcp_free_acked_segments>:

/** Remove segments from a list if the incoming ACK acknowledges them */
static struct tcp_seg *
tcp_free_acked_segments(struct tcp_pcb *pcb, struct tcp_seg *seg_list, const char *dbg_list_name,
                        struct tcp_seg *dbg_other_seg_list)
{
 801e314:	b5b0      	push	{r4, r5, r7, lr}
 801e316:	b086      	sub	sp, #24
 801e318:	af00      	add	r7, sp, #0
 801e31a:	60f8      	str	r0, [r7, #12]
 801e31c:	60b9      	str	r1, [r7, #8]
 801e31e:	607a      	str	r2, [r7, #4]
 801e320:	603b      	str	r3, [r7, #0]
  u16_t clen;

  LWIP_UNUSED_ARG(dbg_list_name);
  LWIP_UNUSED_ARG(dbg_other_seg_list);

  while (seg_list != NULL &&
 801e322:	e03e      	b.n	801e3a2 <tcp_free_acked_segments+0x8e>
    LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: removing %"U32_F":%"U32_F" from pcb->%s\n",
                                  lwip_ntohl(seg_list->tcphdr->seqno),
                                  lwip_ntohl(seg_list->tcphdr->seqno) + TCP_TCPLEN(seg_list),
                                  dbg_list_name));

    next = seg_list;
 801e324:	68bb      	ldr	r3, [r7, #8]
 801e326:	617b      	str	r3, [r7, #20]
    seg_list = seg_list->next;
 801e328:	68bb      	ldr	r3, [r7, #8]
 801e32a:	681b      	ldr	r3, [r3, #0]
 801e32c:	60bb      	str	r3, [r7, #8]

    clen = pbuf_clen(next->p);
 801e32e:	697b      	ldr	r3, [r7, #20]
 801e330:	685b      	ldr	r3, [r3, #4]
 801e332:	4618      	mov	r0, r3
 801e334:	f7fc fd58 	bl	801ade8 <pbuf_clen>
 801e338:	4603      	mov	r3, r0
 801e33a:	827b      	strh	r3, [r7, #18]
    LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_receive: queuelen %"TCPWNDSIZE_F" ... ",
                                 (tcpwnd_size_t)pcb->snd_queuelen));
    LWIP_ASSERT("pcb->snd_queuelen >= pbuf_clen(next->p)", (pcb->snd_queuelen >= clen));
 801e33c:	68fb      	ldr	r3, [r7, #12]
 801e33e:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 801e342:	8a7a      	ldrh	r2, [r7, #18]
 801e344:	429a      	cmp	r2, r3
 801e346:	d906      	bls.n	801e356 <tcp_free_acked_segments+0x42>
 801e348:	4b2a      	ldr	r3, [pc, #168]	@ (801e3f4 <tcp_free_acked_segments+0xe0>)
 801e34a:	f240 4257 	movw	r2, #1111	@ 0x457
 801e34e:	492a      	ldr	r1, [pc, #168]	@ (801e3f8 <tcp_free_acked_segments+0xe4>)
 801e350:	482a      	ldr	r0, [pc, #168]	@ (801e3fc <tcp_free_acked_segments+0xe8>)
 801e352:	f00b ff33 	bl	802a1bc <iprintf>

    pcb->snd_queuelen = (u16_t)(pcb->snd_queuelen - clen);
 801e356:	68fb      	ldr	r3, [r7, #12]
 801e358:	f8b3 2066 	ldrh.w	r2, [r3, #102]	@ 0x66
 801e35c:	8a7b      	ldrh	r3, [r7, #18]
 801e35e:	1ad3      	subs	r3, r2, r3
 801e360:	b29a      	uxth	r2, r3
 801e362:	68fb      	ldr	r3, [r7, #12]
 801e364:	f8a3 2066 	strh.w	r2, [r3, #102]	@ 0x66
    recv_acked = (tcpwnd_size_t)(recv_acked + next->len);
 801e368:	697b      	ldr	r3, [r7, #20]
 801e36a:	891a      	ldrh	r2, [r3, #8]
 801e36c:	4b24      	ldr	r3, [pc, #144]	@ (801e400 <tcp_free_acked_segments+0xec>)
 801e36e:	881b      	ldrh	r3, [r3, #0]
 801e370:	4413      	add	r3, r2
 801e372:	b29a      	uxth	r2, r3
 801e374:	4b22      	ldr	r3, [pc, #136]	@ (801e400 <tcp_free_acked_segments+0xec>)
 801e376:	801a      	strh	r2, [r3, #0]
    tcp_seg_free(next);
 801e378:	6978      	ldr	r0, [r7, #20]
 801e37a:	f7fe f900 	bl	801c57e <tcp_seg_free>

    LWIP_DEBUGF(TCP_QLEN_DEBUG, ("%"TCPWNDSIZE_F" (after freeing %s)\n",
                                 (tcpwnd_size_t)pcb->snd_queuelen,
                                 dbg_list_name));
    if (pcb->snd_queuelen != 0) {
 801e37e:	68fb      	ldr	r3, [r7, #12]
 801e380:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 801e384:	2b00      	cmp	r3, #0
 801e386:	d00c      	beq.n	801e3a2 <tcp_free_acked_segments+0x8e>
      LWIP_ASSERT("tcp_receive: valid queue length",
 801e388:	68bb      	ldr	r3, [r7, #8]
 801e38a:	2b00      	cmp	r3, #0
 801e38c:	d109      	bne.n	801e3a2 <tcp_free_acked_segments+0x8e>
 801e38e:	683b      	ldr	r3, [r7, #0]
 801e390:	2b00      	cmp	r3, #0
 801e392:	d106      	bne.n	801e3a2 <tcp_free_acked_segments+0x8e>
 801e394:	4b17      	ldr	r3, [pc, #92]	@ (801e3f4 <tcp_free_acked_segments+0xe0>)
 801e396:	f240 4261 	movw	r2, #1121	@ 0x461
 801e39a:	491a      	ldr	r1, [pc, #104]	@ (801e404 <tcp_free_acked_segments+0xf0>)
 801e39c:	4817      	ldr	r0, [pc, #92]	@ (801e3fc <tcp_free_acked_segments+0xe8>)
 801e39e:	f00b ff0d 	bl	802a1bc <iprintf>
  while (seg_list != NULL &&
 801e3a2:	68bb      	ldr	r3, [r7, #8]
 801e3a4:	2b00      	cmp	r3, #0
 801e3a6:	d020      	beq.n	801e3ea <tcp_free_acked_segments+0xd6>
         TCP_SEQ_LEQ(lwip_ntohl(seg_list->tcphdr->seqno) +
 801e3a8:	68bb      	ldr	r3, [r7, #8]
 801e3aa:	691b      	ldr	r3, [r3, #16]
 801e3ac:	685b      	ldr	r3, [r3, #4]
 801e3ae:	4618      	mov	r0, r3
 801e3b0:	f7fa ffbf 	bl	8019332 <lwip_htonl>
 801e3b4:	4604      	mov	r4, r0
 801e3b6:	68bb      	ldr	r3, [r7, #8]
 801e3b8:	891b      	ldrh	r3, [r3, #8]
 801e3ba:	461d      	mov	r5, r3
 801e3bc:	68bb      	ldr	r3, [r7, #8]
 801e3be:	691b      	ldr	r3, [r3, #16]
 801e3c0:	899b      	ldrh	r3, [r3, #12]
 801e3c2:	b29b      	uxth	r3, r3
 801e3c4:	4618      	mov	r0, r3
 801e3c6:	f7fa ff9f 	bl	8019308 <lwip_htons>
 801e3ca:	4603      	mov	r3, r0
 801e3cc:	b2db      	uxtb	r3, r3
 801e3ce:	f003 0303 	and.w	r3, r3, #3
 801e3d2:	2b00      	cmp	r3, #0
 801e3d4:	d001      	beq.n	801e3da <tcp_free_acked_segments+0xc6>
 801e3d6:	2301      	movs	r3, #1
 801e3d8:	e000      	b.n	801e3dc <tcp_free_acked_segments+0xc8>
 801e3da:	2300      	movs	r3, #0
 801e3dc:	442b      	add	r3, r5
 801e3de:	18e2      	adds	r2, r4, r3
 801e3e0:	4b09      	ldr	r3, [pc, #36]	@ (801e408 <tcp_free_acked_segments+0xf4>)
 801e3e2:	681b      	ldr	r3, [r3, #0]
 801e3e4:	1ad3      	subs	r3, r2, r3
  while (seg_list != NULL &&
 801e3e6:	2b00      	cmp	r3, #0
 801e3e8:	dd9c      	ble.n	801e324 <tcp_free_acked_segments+0x10>
                  seg_list != NULL || dbg_other_seg_list != NULL);
    }
  }
  return seg_list;
 801e3ea:	68bb      	ldr	r3, [r7, #8]
}
 801e3ec:	4618      	mov	r0, r3
 801e3ee:	3718      	adds	r7, #24
 801e3f0:	46bd      	mov	sp, r7
 801e3f2:	bdb0      	pop	{r4, r5, r7, pc}
 801e3f4:	0802f5a4 	.word	0x0802f5a4
 801e3f8:	0802f88c 	.word	0x0802f88c
 801e3fc:	0802f5f0 	.word	0x0802f5f0
 801e400:	2402af9c 	.word	0x2402af9c
 801e404:	0802f8b4 	.word	0x0802f8b4
 801e408:	2402af98 	.word	0x2402af98

0801e40c <tcp_receive>:
 *
 * Called from tcp_process().
 */
static void
tcp_receive(struct tcp_pcb *pcb)
{
 801e40c:	b5b0      	push	{r4, r5, r7, lr}
 801e40e:	b094      	sub	sp, #80	@ 0x50
 801e410:	af00      	add	r7, sp, #0
 801e412:	6078      	str	r0, [r7, #4]
  s16_t m;
  u32_t right_wnd_edge;
  int found_dupack = 0;
 801e414:	2300      	movs	r3, #0
 801e416:	64bb      	str	r3, [r7, #72]	@ 0x48

  LWIP_ASSERT("tcp_receive: invalid pcb", pcb != NULL);
 801e418:	687b      	ldr	r3, [r7, #4]
 801e41a:	2b00      	cmp	r3, #0
 801e41c:	d106      	bne.n	801e42c <tcp_receive+0x20>
 801e41e:	4b91      	ldr	r3, [pc, #580]	@ (801e664 <tcp_receive+0x258>)
 801e420:	f240 427b 	movw	r2, #1147	@ 0x47b
 801e424:	4990      	ldr	r1, [pc, #576]	@ (801e668 <tcp_receive+0x25c>)
 801e426:	4891      	ldr	r0, [pc, #580]	@ (801e66c <tcp_receive+0x260>)
 801e428:	f00b fec8 	bl	802a1bc <iprintf>
  LWIP_ASSERT("tcp_receive: wrong state", pcb->state >= ESTABLISHED);
 801e42c:	687b      	ldr	r3, [r7, #4]
 801e42e:	7d1b      	ldrb	r3, [r3, #20]
 801e430:	2b03      	cmp	r3, #3
 801e432:	d806      	bhi.n	801e442 <tcp_receive+0x36>
 801e434:	4b8b      	ldr	r3, [pc, #556]	@ (801e664 <tcp_receive+0x258>)
 801e436:	f240 427c 	movw	r2, #1148	@ 0x47c
 801e43a:	498d      	ldr	r1, [pc, #564]	@ (801e670 <tcp_receive+0x264>)
 801e43c:	488b      	ldr	r0, [pc, #556]	@ (801e66c <tcp_receive+0x260>)
 801e43e:	f00b febd 	bl	802a1bc <iprintf>

  if (flags & TCP_ACK) {
 801e442:	4b8c      	ldr	r3, [pc, #560]	@ (801e674 <tcp_receive+0x268>)
 801e444:	781b      	ldrb	r3, [r3, #0]
 801e446:	f003 0310 	and.w	r3, r3, #16
 801e44a:	2b00      	cmp	r3, #0
 801e44c:	f000 8264 	beq.w	801e918 <tcp_receive+0x50c>
    right_wnd_edge = pcb->snd_wnd + pcb->snd_wl2;
 801e450:	687b      	ldr	r3, [r7, #4]
 801e452:	f8b3 3060 	ldrh.w	r3, [r3, #96]	@ 0x60
 801e456:	461a      	mov	r2, r3
 801e458:	687b      	ldr	r3, [r7, #4]
 801e45a:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 801e45c:	4413      	add	r3, r2
 801e45e:	633b      	str	r3, [r7, #48]	@ 0x30

    /* Update window. */
    if (TCP_SEQ_LT(pcb->snd_wl1, seqno) ||
 801e460:	687b      	ldr	r3, [r7, #4]
 801e462:	6d5a      	ldr	r2, [r3, #84]	@ 0x54
 801e464:	4b84      	ldr	r3, [pc, #528]	@ (801e678 <tcp_receive+0x26c>)
 801e466:	681b      	ldr	r3, [r3, #0]
 801e468:	1ad3      	subs	r3, r2, r3
 801e46a:	2b00      	cmp	r3, #0
 801e46c:	db1b      	blt.n	801e4a6 <tcp_receive+0x9a>
        (pcb->snd_wl1 == seqno && TCP_SEQ_LT(pcb->snd_wl2, ackno)) ||
 801e46e:	687b      	ldr	r3, [r7, #4]
 801e470:	6d5a      	ldr	r2, [r3, #84]	@ 0x54
 801e472:	4b81      	ldr	r3, [pc, #516]	@ (801e678 <tcp_receive+0x26c>)
 801e474:	681b      	ldr	r3, [r3, #0]
    if (TCP_SEQ_LT(pcb->snd_wl1, seqno) ||
 801e476:	429a      	cmp	r2, r3
 801e478:	d106      	bne.n	801e488 <tcp_receive+0x7c>
        (pcb->snd_wl1 == seqno && TCP_SEQ_LT(pcb->snd_wl2, ackno)) ||
 801e47a:	687b      	ldr	r3, [r7, #4]
 801e47c:	6d9a      	ldr	r2, [r3, #88]	@ 0x58
 801e47e:	4b7f      	ldr	r3, [pc, #508]	@ (801e67c <tcp_receive+0x270>)
 801e480:	681b      	ldr	r3, [r3, #0]
 801e482:	1ad3      	subs	r3, r2, r3
 801e484:	2b00      	cmp	r3, #0
 801e486:	db0e      	blt.n	801e4a6 <tcp_receive+0x9a>
        (pcb->snd_wl2 == ackno && (u32_t)SND_WND_SCALE(pcb, tcphdr->wnd) > pcb->snd_wnd)) {
 801e488:	687b      	ldr	r3, [r7, #4]
 801e48a:	6d9a      	ldr	r2, [r3, #88]	@ 0x58
 801e48c:	4b7b      	ldr	r3, [pc, #492]	@ (801e67c <tcp_receive+0x270>)
 801e48e:	681b      	ldr	r3, [r3, #0]
        (pcb->snd_wl1 == seqno && TCP_SEQ_LT(pcb->snd_wl2, ackno)) ||
 801e490:	429a      	cmp	r2, r3
 801e492:	d125      	bne.n	801e4e0 <tcp_receive+0xd4>
        (pcb->snd_wl2 == ackno && (u32_t)SND_WND_SCALE(pcb, tcphdr->wnd) > pcb->snd_wnd)) {
 801e494:	4b7a      	ldr	r3, [pc, #488]	@ (801e680 <tcp_receive+0x274>)
 801e496:	681b      	ldr	r3, [r3, #0]
 801e498:	89db      	ldrh	r3, [r3, #14]
 801e49a:	b29a      	uxth	r2, r3
 801e49c:	687b      	ldr	r3, [r7, #4]
 801e49e:	f8b3 3060 	ldrh.w	r3, [r3, #96]	@ 0x60
 801e4a2:	429a      	cmp	r2, r3
 801e4a4:	d91c      	bls.n	801e4e0 <tcp_receive+0xd4>
      pcb->snd_wnd = SND_WND_SCALE(pcb, tcphdr->wnd);
 801e4a6:	4b76      	ldr	r3, [pc, #472]	@ (801e680 <tcp_receive+0x274>)
 801e4a8:	681b      	ldr	r3, [r3, #0]
 801e4aa:	89db      	ldrh	r3, [r3, #14]
 801e4ac:	b29a      	uxth	r2, r3
 801e4ae:	687b      	ldr	r3, [r7, #4]
 801e4b0:	f8a3 2060 	strh.w	r2, [r3, #96]	@ 0x60
      /* keep track of the biggest window announced by the remote host to calculate
         the maximum segment size */
      if (pcb->snd_wnd_max < pcb->snd_wnd) {
 801e4b4:	687b      	ldr	r3, [r7, #4]
 801e4b6:	f8b3 2062 	ldrh.w	r2, [r3, #98]	@ 0x62
 801e4ba:	687b      	ldr	r3, [r7, #4]
 801e4bc:	f8b3 3060 	ldrh.w	r3, [r3, #96]	@ 0x60
 801e4c0:	429a      	cmp	r2, r3
 801e4c2:	d205      	bcs.n	801e4d0 <tcp_receive+0xc4>
        pcb->snd_wnd_max = pcb->snd_wnd;
 801e4c4:	687b      	ldr	r3, [r7, #4]
 801e4c6:	f8b3 2060 	ldrh.w	r2, [r3, #96]	@ 0x60
 801e4ca:	687b      	ldr	r3, [r7, #4]
 801e4cc:	f8a3 2062 	strh.w	r2, [r3, #98]	@ 0x62
      }
      pcb->snd_wl1 = seqno;
 801e4d0:	4b69      	ldr	r3, [pc, #420]	@ (801e678 <tcp_receive+0x26c>)
 801e4d2:	681a      	ldr	r2, [r3, #0]
 801e4d4:	687b      	ldr	r3, [r7, #4]
 801e4d6:	655a      	str	r2, [r3, #84]	@ 0x54
      pcb->snd_wl2 = ackno;
 801e4d8:	4b68      	ldr	r3, [pc, #416]	@ (801e67c <tcp_receive+0x270>)
 801e4da:	681a      	ldr	r2, [r3, #0]
 801e4dc:	687b      	ldr	r3, [r7, #4]
 801e4de:	659a      	str	r2, [r3, #88]	@ 0x58
     * If it only passes 1, should reset dupack counter
     *
     */

    /* Clause 1 */
    if (TCP_SEQ_LEQ(ackno, pcb->lastack)) {
 801e4e0:	4b66      	ldr	r3, [pc, #408]	@ (801e67c <tcp_receive+0x270>)
 801e4e2:	681a      	ldr	r2, [r3, #0]
 801e4e4:	687b      	ldr	r3, [r7, #4]
 801e4e6:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 801e4e8:	1ad3      	subs	r3, r2, r3
 801e4ea:	2b00      	cmp	r3, #0
 801e4ec:	dc58      	bgt.n	801e5a0 <tcp_receive+0x194>
      /* Clause 2 */
      if (tcplen == 0) {
 801e4ee:	4b65      	ldr	r3, [pc, #404]	@ (801e684 <tcp_receive+0x278>)
 801e4f0:	881b      	ldrh	r3, [r3, #0]
 801e4f2:	2b00      	cmp	r3, #0
 801e4f4:	d14b      	bne.n	801e58e <tcp_receive+0x182>
        /* Clause 3 */
        if (pcb->snd_wl2 + pcb->snd_wnd == right_wnd_edge) {
 801e4f6:	687b      	ldr	r3, [r7, #4]
 801e4f8:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 801e4fa:	687a      	ldr	r2, [r7, #4]
 801e4fc:	f8b2 2060 	ldrh.w	r2, [r2, #96]	@ 0x60
 801e500:	4413      	add	r3, r2
 801e502:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 801e504:	429a      	cmp	r2, r3
 801e506:	d142      	bne.n	801e58e <tcp_receive+0x182>
          /* Clause 4 */
          if (pcb->rtime >= 0) {
 801e508:	687b      	ldr	r3, [r7, #4]
 801e50a:	f9b3 3030 	ldrsh.w	r3, [r3, #48]	@ 0x30
 801e50e:	2b00      	cmp	r3, #0
 801e510:	db3d      	blt.n	801e58e <tcp_receive+0x182>
            /* Clause 5 */
            if (pcb->lastack == ackno) {
 801e512:	687b      	ldr	r3, [r7, #4]
 801e514:	6c5a      	ldr	r2, [r3, #68]	@ 0x44
 801e516:	4b59      	ldr	r3, [pc, #356]	@ (801e67c <tcp_receive+0x270>)
 801e518:	681b      	ldr	r3, [r3, #0]
 801e51a:	429a      	cmp	r2, r3
 801e51c:	d137      	bne.n	801e58e <tcp_receive+0x182>
              found_dupack = 1;
 801e51e:	2301      	movs	r3, #1
 801e520:	64bb      	str	r3, [r7, #72]	@ 0x48
              if ((u8_t)(pcb->dupacks + 1) > pcb->dupacks) {
 801e522:	687b      	ldr	r3, [r7, #4]
 801e524:	f893 3043 	ldrb.w	r3, [r3, #67]	@ 0x43
 801e528:	2bff      	cmp	r3, #255	@ 0xff
 801e52a:	d007      	beq.n	801e53c <tcp_receive+0x130>
                ++pcb->dupacks;
 801e52c:	687b      	ldr	r3, [r7, #4]
 801e52e:	f893 3043 	ldrb.w	r3, [r3, #67]	@ 0x43
 801e532:	3301      	adds	r3, #1
 801e534:	b2da      	uxtb	r2, r3
 801e536:	687b      	ldr	r3, [r7, #4]
 801e538:	f883 2043 	strb.w	r2, [r3, #67]	@ 0x43
              }
              if (pcb->dupacks > 3) {
 801e53c:	687b      	ldr	r3, [r7, #4]
 801e53e:	f893 3043 	ldrb.w	r3, [r3, #67]	@ 0x43
 801e542:	2b03      	cmp	r3, #3
 801e544:	d91b      	bls.n	801e57e <tcp_receive+0x172>
                /* Inflate the congestion window */
                TCP_WND_INC(pcb->cwnd, pcb->mss);
 801e546:	687b      	ldr	r3, [r7, #4]
 801e548:	f8b3 2048 	ldrh.w	r2, [r3, #72]	@ 0x48
 801e54c:	687b      	ldr	r3, [r7, #4]
 801e54e:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801e550:	4413      	add	r3, r2
 801e552:	b29a      	uxth	r2, r3
 801e554:	687b      	ldr	r3, [r7, #4]
 801e556:	f8b3 3048 	ldrh.w	r3, [r3, #72]	@ 0x48
 801e55a:	429a      	cmp	r2, r3
 801e55c:	d30a      	bcc.n	801e574 <tcp_receive+0x168>
 801e55e:	687b      	ldr	r3, [r7, #4]
 801e560:	f8b3 2048 	ldrh.w	r2, [r3, #72]	@ 0x48
 801e564:	687b      	ldr	r3, [r7, #4]
 801e566:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801e568:	4413      	add	r3, r2
 801e56a:	b29a      	uxth	r2, r3
 801e56c:	687b      	ldr	r3, [r7, #4]
 801e56e:	f8a3 2048 	strh.w	r2, [r3, #72]	@ 0x48
 801e572:	e004      	b.n	801e57e <tcp_receive+0x172>
 801e574:	687b      	ldr	r3, [r7, #4]
 801e576:	f64f 72ff 	movw	r2, #65535	@ 0xffff
 801e57a:	f8a3 2048 	strh.w	r2, [r3, #72]	@ 0x48
              }
              if (pcb->dupacks >= 3) {
 801e57e:	687b      	ldr	r3, [r7, #4]
 801e580:	f893 3043 	ldrb.w	r3, [r3, #67]	@ 0x43
 801e584:	2b02      	cmp	r3, #2
 801e586:	d902      	bls.n	801e58e <tcp_receive+0x182>
                /* Do fast retransmit (checked via TF_INFR, not via dupacks count) */
                tcp_rexmit_fast(pcb);
 801e588:	6878      	ldr	r0, [r7, #4]
 801e58a:	f002 fbb3 	bl	8020cf4 <tcp_rexmit_fast>
          }
        }
      }
      /* If Clause (1) or more is true, but not a duplicate ack, reset
       * count of consecutive duplicate acks */
      if (!found_dupack) {
 801e58e:	6cbb      	ldr	r3, [r7, #72]	@ 0x48
 801e590:	2b00      	cmp	r3, #0
 801e592:	f040 8161 	bne.w	801e858 <tcp_receive+0x44c>
        pcb->dupacks = 0;
 801e596:	687b      	ldr	r3, [r7, #4]
 801e598:	2200      	movs	r2, #0
 801e59a:	f883 2043 	strb.w	r2, [r3, #67]	@ 0x43
 801e59e:	e15b      	b.n	801e858 <tcp_receive+0x44c>
      }
    } else if (TCP_SEQ_BETWEEN(ackno, pcb->lastack + 1, pcb->snd_nxt)) {
 801e5a0:	4b36      	ldr	r3, [pc, #216]	@ (801e67c <tcp_receive+0x270>)
 801e5a2:	681a      	ldr	r2, [r3, #0]
 801e5a4:	687b      	ldr	r3, [r7, #4]
 801e5a6:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 801e5a8:	1ad3      	subs	r3, r2, r3
 801e5aa:	3b01      	subs	r3, #1
 801e5ac:	2b00      	cmp	r3, #0
 801e5ae:	f2c0 814e 	blt.w	801e84e <tcp_receive+0x442>
 801e5b2:	4b32      	ldr	r3, [pc, #200]	@ (801e67c <tcp_receive+0x270>)
 801e5b4:	681a      	ldr	r2, [r3, #0]
 801e5b6:	687b      	ldr	r3, [r7, #4]
 801e5b8:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 801e5ba:	1ad3      	subs	r3, r2, r3
 801e5bc:	2b00      	cmp	r3, #0
 801e5be:	f300 8146 	bgt.w	801e84e <tcp_receive+0x442>
      tcpwnd_size_t acked;

      /* Reset the "IN Fast Retransmit" flag, since we are no longer
         in fast retransmit. Also reset the congestion window to the
         slow start threshold. */
      if (pcb->flags & TF_INFR) {
 801e5c2:	687b      	ldr	r3, [r7, #4]
 801e5c4:	8b5b      	ldrh	r3, [r3, #26]
 801e5c6:	f003 0304 	and.w	r3, r3, #4
 801e5ca:	2b00      	cmp	r3, #0
 801e5cc:	d010      	beq.n	801e5f0 <tcp_receive+0x1e4>
        tcp_clear_flags(pcb, TF_INFR);
 801e5ce:	687b      	ldr	r3, [r7, #4]
 801e5d0:	8b5b      	ldrh	r3, [r3, #26]
 801e5d2:	f023 0304 	bic.w	r3, r3, #4
 801e5d6:	b29a      	uxth	r2, r3
 801e5d8:	687b      	ldr	r3, [r7, #4]
 801e5da:	835a      	strh	r2, [r3, #26]
        pcb->cwnd = pcb->ssthresh;
 801e5dc:	687b      	ldr	r3, [r7, #4]
 801e5de:	f8b3 204a 	ldrh.w	r2, [r3, #74]	@ 0x4a
 801e5e2:	687b      	ldr	r3, [r7, #4]
 801e5e4:	f8a3 2048 	strh.w	r2, [r3, #72]	@ 0x48
        pcb->bytes_acked = 0;
 801e5e8:	687b      	ldr	r3, [r7, #4]
 801e5ea:	2200      	movs	r2, #0
 801e5ec:	f8a3 206a 	strh.w	r2, [r3, #106]	@ 0x6a
      }

      /* Reset the number of retransmissions. */
      pcb->nrtx = 0;
 801e5f0:	687b      	ldr	r3, [r7, #4]
 801e5f2:	2200      	movs	r2, #0
 801e5f4:	f883 2042 	strb.w	r2, [r3, #66]	@ 0x42

      /* Reset the retransmission time-out. */
      pcb->rto = (s16_t)((pcb->sa >> 3) + pcb->sv);
 801e5f8:	687b      	ldr	r3, [r7, #4]
 801e5fa:	f9b3 303c 	ldrsh.w	r3, [r3, #60]	@ 0x3c
 801e5fe:	10db      	asrs	r3, r3, #3
 801e600:	b21b      	sxth	r3, r3
 801e602:	b29a      	uxth	r2, r3
 801e604:	687b      	ldr	r3, [r7, #4]
 801e606:	f9b3 303e 	ldrsh.w	r3, [r3, #62]	@ 0x3e
 801e60a:	b29b      	uxth	r3, r3
 801e60c:	4413      	add	r3, r2
 801e60e:	b29b      	uxth	r3, r3
 801e610:	b21a      	sxth	r2, r3
 801e612:	687b      	ldr	r3, [r7, #4]
 801e614:	f8a3 2040 	strh.w	r2, [r3, #64]	@ 0x40

      /* Record how much data this ACK acks */
      acked = (tcpwnd_size_t)(ackno - pcb->lastack);
 801e618:	4b18      	ldr	r3, [pc, #96]	@ (801e67c <tcp_receive+0x270>)
 801e61a:	681b      	ldr	r3, [r3, #0]
 801e61c:	b29a      	uxth	r2, r3
 801e61e:	687b      	ldr	r3, [r7, #4]
 801e620:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 801e622:	b29b      	uxth	r3, r3
 801e624:	1ad3      	subs	r3, r2, r3
 801e626:	85fb      	strh	r3, [r7, #46]	@ 0x2e

      /* Reset the fast retransmit variables. */
      pcb->dupacks = 0;
 801e628:	687b      	ldr	r3, [r7, #4]
 801e62a:	2200      	movs	r2, #0
 801e62c:	f883 2043 	strb.w	r2, [r3, #67]	@ 0x43
      pcb->lastack = ackno;
 801e630:	4b12      	ldr	r3, [pc, #72]	@ (801e67c <tcp_receive+0x270>)
 801e632:	681a      	ldr	r2, [r3, #0]
 801e634:	687b      	ldr	r3, [r7, #4]
 801e636:	645a      	str	r2, [r3, #68]	@ 0x44

      /* Update the congestion control variables (cwnd and
         ssthresh). */
      if (pcb->state >= ESTABLISHED) {
 801e638:	687b      	ldr	r3, [r7, #4]
 801e63a:	7d1b      	ldrb	r3, [r3, #20]
 801e63c:	2b03      	cmp	r3, #3
 801e63e:	f240 8097 	bls.w	801e770 <tcp_receive+0x364>
        if (pcb->cwnd < pcb->ssthresh) {
 801e642:	687b      	ldr	r3, [r7, #4]
 801e644:	f8b3 2048 	ldrh.w	r2, [r3, #72]	@ 0x48
 801e648:	687b      	ldr	r3, [r7, #4]
 801e64a:	f8b3 304a 	ldrh.w	r3, [r3, #74]	@ 0x4a
 801e64e:	429a      	cmp	r2, r3
 801e650:	d245      	bcs.n	801e6de <tcp_receive+0x2d2>
          tcpwnd_size_t increase;
          /* limit to 1 SMSS segment during period following RTO */
          u8_t num_seg = (pcb->flags & TF_RTO) ? 1 : 2;
 801e652:	687b      	ldr	r3, [r7, #4]
 801e654:	8b5b      	ldrh	r3, [r3, #26]
 801e656:	f403 6300 	and.w	r3, r3, #2048	@ 0x800
 801e65a:	2b00      	cmp	r3, #0
 801e65c:	d014      	beq.n	801e688 <tcp_receive+0x27c>
 801e65e:	2301      	movs	r3, #1
 801e660:	e013      	b.n	801e68a <tcp_receive+0x27e>
 801e662:	bf00      	nop
 801e664:	0802f5a4 	.word	0x0802f5a4
 801e668:	0802f8d4 	.word	0x0802f8d4
 801e66c:	0802f5f0 	.word	0x0802f5f0
 801e670:	0802f8f0 	.word	0x0802f8f0
 801e674:	2402afa0 	.word	0x2402afa0
 801e678:	2402af94 	.word	0x2402af94
 801e67c:	2402af98 	.word	0x2402af98
 801e680:	2402af84 	.word	0x2402af84
 801e684:	2402af9e 	.word	0x2402af9e
 801e688:	2302      	movs	r3, #2
 801e68a:	f887 302d 	strb.w	r3, [r7, #45]	@ 0x2d
          /* RFC 3465, section 2.2 Slow Start */
          increase = LWIP_MIN(acked, (tcpwnd_size_t)(num_seg * pcb->mss));
 801e68e:	f897 302d 	ldrb.w	r3, [r7, #45]	@ 0x2d
 801e692:	b29a      	uxth	r2, r3
 801e694:	687b      	ldr	r3, [r7, #4]
 801e696:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801e698:	fb12 f303 	smulbb	r3, r2, r3
 801e69c:	b29b      	uxth	r3, r3
 801e69e:	8dfa      	ldrh	r2, [r7, #46]	@ 0x2e
 801e6a0:	4293      	cmp	r3, r2
 801e6a2:	bf28      	it	cs
 801e6a4:	4613      	movcs	r3, r2
 801e6a6:	857b      	strh	r3, [r7, #42]	@ 0x2a
          TCP_WND_INC(pcb->cwnd, increase);
 801e6a8:	687b      	ldr	r3, [r7, #4]
 801e6aa:	f8b3 2048 	ldrh.w	r2, [r3, #72]	@ 0x48
 801e6ae:	8d7b      	ldrh	r3, [r7, #42]	@ 0x2a
 801e6b0:	4413      	add	r3, r2
 801e6b2:	b29a      	uxth	r2, r3
 801e6b4:	687b      	ldr	r3, [r7, #4]
 801e6b6:	f8b3 3048 	ldrh.w	r3, [r3, #72]	@ 0x48
 801e6ba:	429a      	cmp	r2, r3
 801e6bc:	d309      	bcc.n	801e6d2 <tcp_receive+0x2c6>
 801e6be:	687b      	ldr	r3, [r7, #4]
 801e6c0:	f8b3 2048 	ldrh.w	r2, [r3, #72]	@ 0x48
 801e6c4:	8d7b      	ldrh	r3, [r7, #42]	@ 0x2a
 801e6c6:	4413      	add	r3, r2
 801e6c8:	b29a      	uxth	r2, r3
 801e6ca:	687b      	ldr	r3, [r7, #4]
 801e6cc:	f8a3 2048 	strh.w	r2, [r3, #72]	@ 0x48
 801e6d0:	e04e      	b.n	801e770 <tcp_receive+0x364>
 801e6d2:	687b      	ldr	r3, [r7, #4]
 801e6d4:	f64f 72ff 	movw	r2, #65535	@ 0xffff
 801e6d8:	f8a3 2048 	strh.w	r2, [r3, #72]	@ 0x48
 801e6dc:	e048      	b.n	801e770 <tcp_receive+0x364>
          LWIP_DEBUGF(TCP_CWND_DEBUG, ("tcp_receive: slow start cwnd %"TCPWNDSIZE_F"\n", pcb->cwnd));
        } else {
          /* RFC 3465, section 2.1 Congestion Avoidance */
          TCP_WND_INC(pcb->bytes_acked, acked);
 801e6de:	687b      	ldr	r3, [r7, #4]
 801e6e0:	f8b3 206a 	ldrh.w	r2, [r3, #106]	@ 0x6a
 801e6e4:	8dfb      	ldrh	r3, [r7, #46]	@ 0x2e
 801e6e6:	4413      	add	r3, r2
 801e6e8:	b29a      	uxth	r2, r3
 801e6ea:	687b      	ldr	r3, [r7, #4]
 801e6ec:	f8b3 306a 	ldrh.w	r3, [r3, #106]	@ 0x6a
 801e6f0:	429a      	cmp	r2, r3
 801e6f2:	d309      	bcc.n	801e708 <tcp_receive+0x2fc>
 801e6f4:	687b      	ldr	r3, [r7, #4]
 801e6f6:	f8b3 206a 	ldrh.w	r2, [r3, #106]	@ 0x6a
 801e6fa:	8dfb      	ldrh	r3, [r7, #46]	@ 0x2e
 801e6fc:	4413      	add	r3, r2
 801e6fe:	b29a      	uxth	r2, r3
 801e700:	687b      	ldr	r3, [r7, #4]
 801e702:	f8a3 206a 	strh.w	r2, [r3, #106]	@ 0x6a
 801e706:	e004      	b.n	801e712 <tcp_receive+0x306>
 801e708:	687b      	ldr	r3, [r7, #4]
 801e70a:	f64f 72ff 	movw	r2, #65535	@ 0xffff
 801e70e:	f8a3 206a 	strh.w	r2, [r3, #106]	@ 0x6a
          if (pcb->bytes_acked >= pcb->cwnd) {
 801e712:	687b      	ldr	r3, [r7, #4]
 801e714:	f8b3 206a 	ldrh.w	r2, [r3, #106]	@ 0x6a
 801e718:	687b      	ldr	r3, [r7, #4]
 801e71a:	f8b3 3048 	ldrh.w	r3, [r3, #72]	@ 0x48
 801e71e:	429a      	cmp	r2, r3
 801e720:	d326      	bcc.n	801e770 <tcp_receive+0x364>
            pcb->bytes_acked = (tcpwnd_size_t)(pcb->bytes_acked - pcb->cwnd);
 801e722:	687b      	ldr	r3, [r7, #4]
 801e724:	f8b3 206a 	ldrh.w	r2, [r3, #106]	@ 0x6a
 801e728:	687b      	ldr	r3, [r7, #4]
 801e72a:	f8b3 3048 	ldrh.w	r3, [r3, #72]	@ 0x48
 801e72e:	1ad3      	subs	r3, r2, r3
 801e730:	b29a      	uxth	r2, r3
 801e732:	687b      	ldr	r3, [r7, #4]
 801e734:	f8a3 206a 	strh.w	r2, [r3, #106]	@ 0x6a
            TCP_WND_INC(pcb->cwnd, pcb->mss);
 801e738:	687b      	ldr	r3, [r7, #4]
 801e73a:	f8b3 2048 	ldrh.w	r2, [r3, #72]	@ 0x48
 801e73e:	687b      	ldr	r3, [r7, #4]
 801e740:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801e742:	4413      	add	r3, r2
 801e744:	b29a      	uxth	r2, r3
 801e746:	687b      	ldr	r3, [r7, #4]
 801e748:	f8b3 3048 	ldrh.w	r3, [r3, #72]	@ 0x48
 801e74c:	429a      	cmp	r2, r3
 801e74e:	d30a      	bcc.n	801e766 <tcp_receive+0x35a>
 801e750:	687b      	ldr	r3, [r7, #4]
 801e752:	f8b3 2048 	ldrh.w	r2, [r3, #72]	@ 0x48
 801e756:	687b      	ldr	r3, [r7, #4]
 801e758:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801e75a:	4413      	add	r3, r2
 801e75c:	b29a      	uxth	r2, r3
 801e75e:	687b      	ldr	r3, [r7, #4]
 801e760:	f8a3 2048 	strh.w	r2, [r3, #72]	@ 0x48
 801e764:	e004      	b.n	801e770 <tcp_receive+0x364>
 801e766:	687b      	ldr	r3, [r7, #4]
 801e768:	f64f 72ff 	movw	r2, #65535	@ 0xffff
 801e76c:	f8a3 2048 	strh.w	r2, [r3, #72]	@ 0x48
                                    pcb->unacked != NULL ?
                                    lwip_ntohl(pcb->unacked->tcphdr->seqno) + TCP_TCPLEN(pcb->unacked) : 0));

      /* Remove segment from the unacknowledged list if the incoming
         ACK acknowledges them. */
      pcb->unacked = tcp_free_acked_segments(pcb, pcb->unacked, "unacked", pcb->unsent);
 801e770:	687b      	ldr	r3, [r7, #4]
 801e772:	6f19      	ldr	r1, [r3, #112]	@ 0x70
 801e774:	687b      	ldr	r3, [r7, #4]
 801e776:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801e778:	4a98      	ldr	r2, [pc, #608]	@ (801e9dc <tcp_receive+0x5d0>)
 801e77a:	6878      	ldr	r0, [r7, #4]
 801e77c:	f7ff fdca 	bl	801e314 <tcp_free_acked_segments>
 801e780:	4602      	mov	r2, r0
 801e782:	687b      	ldr	r3, [r7, #4]
 801e784:	671a      	str	r2, [r3, #112]	@ 0x70
         on the list are acknowledged by the ACK. This may seem
         strange since an "unsent" segment shouldn't be acked. The
         rationale is that lwIP puts all outstanding segments on the
         ->unsent list after a retransmission, so these segments may
         in fact have been sent once. */
      pcb->unsent = tcp_free_acked_segments(pcb, pcb->unsent, "unsent", pcb->unacked);
 801e786:	687b      	ldr	r3, [r7, #4]
 801e788:	6ed9      	ldr	r1, [r3, #108]	@ 0x6c
 801e78a:	687b      	ldr	r3, [r7, #4]
 801e78c:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801e78e:	4a94      	ldr	r2, [pc, #592]	@ (801e9e0 <tcp_receive+0x5d4>)
 801e790:	6878      	ldr	r0, [r7, #4]
 801e792:	f7ff fdbf 	bl	801e314 <tcp_free_acked_segments>
 801e796:	4602      	mov	r2, r0
 801e798:	687b      	ldr	r3, [r7, #4]
 801e79a:	66da      	str	r2, [r3, #108]	@ 0x6c

      /* If there's nothing left to acknowledge, stop the retransmit
         timer, otherwise reset it to start again */
      if (pcb->unacked == NULL) {
 801e79c:	687b      	ldr	r3, [r7, #4]
 801e79e:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801e7a0:	2b00      	cmp	r3, #0
 801e7a2:	d104      	bne.n	801e7ae <tcp_receive+0x3a2>
        pcb->rtime = -1;
 801e7a4:	687b      	ldr	r3, [r7, #4]
 801e7a6:	f64f 72ff 	movw	r2, #65535	@ 0xffff
 801e7aa:	861a      	strh	r2, [r3, #48]	@ 0x30
 801e7ac:	e002      	b.n	801e7b4 <tcp_receive+0x3a8>
      } else {
        pcb->rtime = 0;
 801e7ae:	687b      	ldr	r3, [r7, #4]
 801e7b0:	2200      	movs	r2, #0
 801e7b2:	861a      	strh	r2, [r3, #48]	@ 0x30
      }

      pcb->polltmr = 0;
 801e7b4:	687b      	ldr	r3, [r7, #4]
 801e7b6:	2200      	movs	r2, #0
 801e7b8:	771a      	strb	r2, [r3, #28]

#if TCP_OVERSIZE
      if (pcb->unsent == NULL) {
 801e7ba:	687b      	ldr	r3, [r7, #4]
 801e7bc:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801e7be:	2b00      	cmp	r3, #0
 801e7c0:	d103      	bne.n	801e7ca <tcp_receive+0x3be>
        pcb->unsent_oversize = 0;
 801e7c2:	687b      	ldr	r3, [r7, #4]
 801e7c4:	2200      	movs	r2, #0
 801e7c6:	f8a3 2068 	strh.w	r2, [r3, #104]	@ 0x68
        /* Inform neighbor reachability of forward progress. */
        nd6_reachability_hint(ip6_current_src_addr());
      }
#endif /* LWIP_IPV6 && LWIP_ND6_TCP_REACHABILITY_HINTS*/

      pcb->snd_buf = (tcpwnd_size_t)(pcb->snd_buf + recv_acked);
 801e7ca:	687b      	ldr	r3, [r7, #4]
 801e7cc:	f8b3 2064 	ldrh.w	r2, [r3, #100]	@ 0x64
 801e7d0:	4b84      	ldr	r3, [pc, #528]	@ (801e9e4 <tcp_receive+0x5d8>)
 801e7d2:	881b      	ldrh	r3, [r3, #0]
 801e7d4:	4413      	add	r3, r2
 801e7d6:	b29a      	uxth	r2, r3
 801e7d8:	687b      	ldr	r3, [r7, #4]
 801e7da:	f8a3 2064 	strh.w	r2, [r3, #100]	@ 0x64
      /* check if this ACK ends our retransmission of in-flight data */
      if (pcb->flags & TF_RTO) {
 801e7de:	687b      	ldr	r3, [r7, #4]
 801e7e0:	8b5b      	ldrh	r3, [r3, #26]
 801e7e2:	f403 6300 	and.w	r3, r3, #2048	@ 0x800
 801e7e6:	2b00      	cmp	r3, #0
 801e7e8:	d035      	beq.n	801e856 <tcp_receive+0x44a>
        /* RTO is done if
            1) both queues are empty or
            2) unacked is empty and unsent head contains data not part of RTO or
            3) unacked head contains data not part of RTO */
        if (pcb->unacked == NULL) {
 801e7ea:	687b      	ldr	r3, [r7, #4]
 801e7ec:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801e7ee:	2b00      	cmp	r3, #0
 801e7f0:	d118      	bne.n	801e824 <tcp_receive+0x418>
          if ((pcb->unsent == NULL) ||
 801e7f2:	687b      	ldr	r3, [r7, #4]
 801e7f4:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801e7f6:	2b00      	cmp	r3, #0
 801e7f8:	d00c      	beq.n	801e814 <tcp_receive+0x408>
              (TCP_SEQ_LEQ(pcb->rto_end, lwip_ntohl(pcb->unsent->tcphdr->seqno)))) {
 801e7fa:	687b      	ldr	r3, [r7, #4]
 801e7fc:	6cdc      	ldr	r4, [r3, #76]	@ 0x4c
 801e7fe:	687b      	ldr	r3, [r7, #4]
 801e800:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801e802:	691b      	ldr	r3, [r3, #16]
 801e804:	685b      	ldr	r3, [r3, #4]
 801e806:	4618      	mov	r0, r3
 801e808:	f7fa fd93 	bl	8019332 <lwip_htonl>
 801e80c:	4603      	mov	r3, r0
 801e80e:	1ae3      	subs	r3, r4, r3
          if ((pcb->unsent == NULL) ||
 801e810:	2b00      	cmp	r3, #0
 801e812:	dc20      	bgt.n	801e856 <tcp_receive+0x44a>
            tcp_clear_flags(pcb, TF_RTO);
 801e814:	687b      	ldr	r3, [r7, #4]
 801e816:	8b5b      	ldrh	r3, [r3, #26]
 801e818:	f423 6300 	bic.w	r3, r3, #2048	@ 0x800
 801e81c:	b29a      	uxth	r2, r3
 801e81e:	687b      	ldr	r3, [r7, #4]
 801e820:	835a      	strh	r2, [r3, #26]
    } else if (TCP_SEQ_BETWEEN(ackno, pcb->lastack + 1, pcb->snd_nxt)) {
 801e822:	e018      	b.n	801e856 <tcp_receive+0x44a>
          }
        } else if (TCP_SEQ_LEQ(pcb->rto_end, lwip_ntohl(pcb->unacked->tcphdr->seqno))) {
 801e824:	687b      	ldr	r3, [r7, #4]
 801e826:	6cdc      	ldr	r4, [r3, #76]	@ 0x4c
 801e828:	687b      	ldr	r3, [r7, #4]
 801e82a:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801e82c:	691b      	ldr	r3, [r3, #16]
 801e82e:	685b      	ldr	r3, [r3, #4]
 801e830:	4618      	mov	r0, r3
 801e832:	f7fa fd7e 	bl	8019332 <lwip_htonl>
 801e836:	4603      	mov	r3, r0
 801e838:	1ae3      	subs	r3, r4, r3
 801e83a:	2b00      	cmp	r3, #0
 801e83c:	dc0b      	bgt.n	801e856 <tcp_receive+0x44a>
          tcp_clear_flags(pcb, TF_RTO);
 801e83e:	687b      	ldr	r3, [r7, #4]
 801e840:	8b5b      	ldrh	r3, [r3, #26]
 801e842:	f423 6300 	bic.w	r3, r3, #2048	@ 0x800
 801e846:	b29a      	uxth	r2, r3
 801e848:	687b      	ldr	r3, [r7, #4]
 801e84a:	835a      	strh	r2, [r3, #26]
    } else if (TCP_SEQ_BETWEEN(ackno, pcb->lastack + 1, pcb->snd_nxt)) {
 801e84c:	e003      	b.n	801e856 <tcp_receive+0x44a>
        }
      }
      /* End of ACK for new data processing. */
    } else {
      /* Out of sequence ACK, didn't really ack anything */
      tcp_send_empty_ack(pcb);
 801e84e:	6878      	ldr	r0, [r7, #4]
 801e850:	f002 fc3c 	bl	80210cc <tcp_send_empty_ack>
 801e854:	e000      	b.n	801e858 <tcp_receive+0x44c>
    } else if (TCP_SEQ_BETWEEN(ackno, pcb->lastack + 1, pcb->snd_nxt)) {
 801e856:	bf00      	nop
                                pcb->rttest, pcb->rtseq, ackno));

    /* RTT estimation calculations. This is done by checking if the
       incoming segment acknowledges the segment we use to take a
       round-trip time measurement. */
    if (pcb->rttest && TCP_SEQ_LT(pcb->rtseq, ackno)) {
 801e858:	687b      	ldr	r3, [r7, #4]
 801e85a:	6b5b      	ldr	r3, [r3, #52]	@ 0x34
 801e85c:	2b00      	cmp	r3, #0
 801e85e:	d05b      	beq.n	801e918 <tcp_receive+0x50c>
 801e860:	687b      	ldr	r3, [r7, #4]
 801e862:	6b9a      	ldr	r2, [r3, #56]	@ 0x38
 801e864:	4b60      	ldr	r3, [pc, #384]	@ (801e9e8 <tcp_receive+0x5dc>)
 801e866:	681b      	ldr	r3, [r3, #0]
 801e868:	1ad3      	subs	r3, r2, r3
 801e86a:	2b00      	cmp	r3, #0
 801e86c:	da54      	bge.n	801e918 <tcp_receive+0x50c>
      /* diff between this shouldn't exceed 32K since this are tcp timer ticks
         and a round-trip shouldn't be that long... */
      m = (s16_t)(tcp_ticks - pcb->rttest);
 801e86e:	4b5f      	ldr	r3, [pc, #380]	@ (801e9ec <tcp_receive+0x5e0>)
 801e870:	681b      	ldr	r3, [r3, #0]
 801e872:	b29a      	uxth	r2, r3
 801e874:	687b      	ldr	r3, [r7, #4]
 801e876:	6b5b      	ldr	r3, [r3, #52]	@ 0x34
 801e878:	b29b      	uxth	r3, r3
 801e87a:	1ad3      	subs	r3, r2, r3
 801e87c:	b29b      	uxth	r3, r3
 801e87e:	f8a7 304e 	strh.w	r3, [r7, #78]	@ 0x4e

      LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_receive: experienced rtt %"U16_F" ticks (%"U16_F" msec).\n",
                                  m, (u16_t)(m * TCP_SLOW_INTERVAL)));

      /* This is taken directly from VJs original code in his paper */
      m = (s16_t)(m - (pcb->sa >> 3));
 801e882:	f8b7 204e 	ldrh.w	r2, [r7, #78]	@ 0x4e
 801e886:	687b      	ldr	r3, [r7, #4]
 801e888:	f9b3 303c 	ldrsh.w	r3, [r3, #60]	@ 0x3c
 801e88c:	10db      	asrs	r3, r3, #3
 801e88e:	b21b      	sxth	r3, r3
 801e890:	b29b      	uxth	r3, r3
 801e892:	1ad3      	subs	r3, r2, r3
 801e894:	b29b      	uxth	r3, r3
 801e896:	f8a7 304e 	strh.w	r3, [r7, #78]	@ 0x4e
      pcb->sa = (s16_t)(pcb->sa + m);
 801e89a:	687b      	ldr	r3, [r7, #4]
 801e89c:	f9b3 303c 	ldrsh.w	r3, [r3, #60]	@ 0x3c
 801e8a0:	b29a      	uxth	r2, r3
 801e8a2:	f8b7 304e 	ldrh.w	r3, [r7, #78]	@ 0x4e
 801e8a6:	4413      	add	r3, r2
 801e8a8:	b29b      	uxth	r3, r3
 801e8aa:	b21a      	sxth	r2, r3
 801e8ac:	687b      	ldr	r3, [r7, #4]
 801e8ae:	879a      	strh	r2, [r3, #60]	@ 0x3c
      if (m < 0) {
 801e8b0:	f9b7 304e 	ldrsh.w	r3, [r7, #78]	@ 0x4e
 801e8b4:	2b00      	cmp	r3, #0
 801e8b6:	da05      	bge.n	801e8c4 <tcp_receive+0x4b8>
        m = (s16_t) - m;
 801e8b8:	f8b7 304e 	ldrh.w	r3, [r7, #78]	@ 0x4e
 801e8bc:	425b      	negs	r3, r3
 801e8be:	b29b      	uxth	r3, r3
 801e8c0:	f8a7 304e 	strh.w	r3, [r7, #78]	@ 0x4e
      }
      m = (s16_t)(m - (pcb->sv >> 2));
 801e8c4:	f8b7 204e 	ldrh.w	r2, [r7, #78]	@ 0x4e
 801e8c8:	687b      	ldr	r3, [r7, #4]
 801e8ca:	f9b3 303e 	ldrsh.w	r3, [r3, #62]	@ 0x3e
 801e8ce:	109b      	asrs	r3, r3, #2
 801e8d0:	b21b      	sxth	r3, r3
 801e8d2:	b29b      	uxth	r3, r3
 801e8d4:	1ad3      	subs	r3, r2, r3
 801e8d6:	b29b      	uxth	r3, r3
 801e8d8:	f8a7 304e 	strh.w	r3, [r7, #78]	@ 0x4e
      pcb->sv = (s16_t)(pcb->sv + m);
 801e8dc:	687b      	ldr	r3, [r7, #4]
 801e8de:	f9b3 303e 	ldrsh.w	r3, [r3, #62]	@ 0x3e
 801e8e2:	b29a      	uxth	r2, r3
 801e8e4:	f8b7 304e 	ldrh.w	r3, [r7, #78]	@ 0x4e
 801e8e8:	4413      	add	r3, r2
 801e8ea:	b29b      	uxth	r3, r3
 801e8ec:	b21a      	sxth	r2, r3
 801e8ee:	687b      	ldr	r3, [r7, #4]
 801e8f0:	87da      	strh	r2, [r3, #62]	@ 0x3e
      pcb->rto = (s16_t)((pcb->sa >> 3) + pcb->sv);
 801e8f2:	687b      	ldr	r3, [r7, #4]
 801e8f4:	f9b3 303c 	ldrsh.w	r3, [r3, #60]	@ 0x3c
 801e8f8:	10db      	asrs	r3, r3, #3
 801e8fa:	b21b      	sxth	r3, r3
 801e8fc:	b29a      	uxth	r2, r3
 801e8fe:	687b      	ldr	r3, [r7, #4]
 801e900:	f9b3 303e 	ldrsh.w	r3, [r3, #62]	@ 0x3e
 801e904:	b29b      	uxth	r3, r3
 801e906:	4413      	add	r3, r2
 801e908:	b29b      	uxth	r3, r3
 801e90a:	b21a      	sxth	r2, r3
 801e90c:	687b      	ldr	r3, [r7, #4]
 801e90e:	f8a3 2040 	strh.w	r2, [r3, #64]	@ 0x40

      LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_receive: RTO %"U16_F" (%"U16_F" milliseconds)\n",
                                  pcb->rto, (u16_t)(pcb->rto * TCP_SLOW_INTERVAL)));

      pcb->rttest = 0;
 801e912:	687b      	ldr	r3, [r7, #4]
 801e914:	2200      	movs	r2, #0
 801e916:	635a      	str	r2, [r3, #52]	@ 0x34

  /* If the incoming segment contains data, we must process it
     further unless the pcb already received a FIN.
     (RFC 793, chapter 3.9, "SEGMENT ARRIVES" in states CLOSE-WAIT, CLOSING,
     LAST-ACK and TIME-WAIT: "Ignore the segment text.") */
  if ((tcplen > 0) && (pcb->state < CLOSE_WAIT)) {
 801e918:	4b35      	ldr	r3, [pc, #212]	@ (801e9f0 <tcp_receive+0x5e4>)
 801e91a:	881b      	ldrh	r3, [r3, #0]
 801e91c:	2b00      	cmp	r3, #0
 801e91e:	f000 84df 	beq.w	801f2e0 <tcp_receive+0xed4>
 801e922:	687b      	ldr	r3, [r7, #4]
 801e924:	7d1b      	ldrb	r3, [r3, #20]
 801e926:	2b06      	cmp	r3, #6
 801e928:	f200 84da 	bhi.w	801f2e0 <tcp_receive+0xed4>
       this if the sequence number of the incoming segment is less
       than rcv_nxt, and the sequence number plus the length of the
       segment is larger than rcv_nxt. */
    /*    if (TCP_SEQ_LT(seqno, pcb->rcv_nxt)) {
          if (TCP_SEQ_LT(pcb->rcv_nxt, seqno + tcplen)) {*/
    if (TCP_SEQ_BETWEEN(pcb->rcv_nxt, seqno + 1, seqno + tcplen - 1)) {
 801e92c:	687b      	ldr	r3, [r7, #4]
 801e92e:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 801e930:	4b30      	ldr	r3, [pc, #192]	@ (801e9f4 <tcp_receive+0x5e8>)
 801e932:	681b      	ldr	r3, [r3, #0]
 801e934:	1ad3      	subs	r3, r2, r3
 801e936:	3b01      	subs	r3, #1
 801e938:	2b00      	cmp	r3, #0
 801e93a:	f2c0 808f 	blt.w	801ea5c <tcp_receive+0x650>
 801e93e:	687b      	ldr	r3, [r7, #4]
 801e940:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 801e942:	4b2b      	ldr	r3, [pc, #172]	@ (801e9f0 <tcp_receive+0x5e4>)
 801e944:	881b      	ldrh	r3, [r3, #0]
 801e946:	4619      	mov	r1, r3
 801e948:	4b2a      	ldr	r3, [pc, #168]	@ (801e9f4 <tcp_receive+0x5e8>)
 801e94a:	681b      	ldr	r3, [r3, #0]
 801e94c:	440b      	add	r3, r1
 801e94e:	1ad3      	subs	r3, r2, r3
 801e950:	3301      	adds	r3, #1
 801e952:	2b00      	cmp	r3, #0
 801e954:	f300 8082 	bgt.w	801ea5c <tcp_receive+0x650>

         After we are done with adjusting the pbuf pointers we must
         adjust the ->data pointer in the seg and the segment
         length.*/

      struct pbuf *p = inseg.p;
 801e958:	4b27      	ldr	r3, [pc, #156]	@ (801e9f8 <tcp_receive+0x5ec>)
 801e95a:	685b      	ldr	r3, [r3, #4]
 801e95c:	647b      	str	r3, [r7, #68]	@ 0x44
      u32_t off32 = pcb->rcv_nxt - seqno;
 801e95e:	687b      	ldr	r3, [r7, #4]
 801e960:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 801e962:	4b24      	ldr	r3, [pc, #144]	@ (801e9f4 <tcp_receive+0x5e8>)
 801e964:	681b      	ldr	r3, [r3, #0]
 801e966:	1ad3      	subs	r3, r2, r3
 801e968:	627b      	str	r3, [r7, #36]	@ 0x24
      u16_t new_tot_len, off;
      LWIP_ASSERT("inseg.p != NULL", inseg.p);
 801e96a:	4b23      	ldr	r3, [pc, #140]	@ (801e9f8 <tcp_receive+0x5ec>)
 801e96c:	685b      	ldr	r3, [r3, #4]
 801e96e:	2b00      	cmp	r3, #0
 801e970:	d106      	bne.n	801e980 <tcp_receive+0x574>
 801e972:	4b22      	ldr	r3, [pc, #136]	@ (801e9fc <tcp_receive+0x5f0>)
 801e974:	f240 5294 	movw	r2, #1428	@ 0x594
 801e978:	4921      	ldr	r1, [pc, #132]	@ (801ea00 <tcp_receive+0x5f4>)
 801e97a:	4822      	ldr	r0, [pc, #136]	@ (801ea04 <tcp_receive+0x5f8>)
 801e97c:	f00b fc1e 	bl	802a1bc <iprintf>
      LWIP_ASSERT("insane offset!", (off32 < 0xffff));
 801e980:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801e982:	f64f 72fe 	movw	r2, #65534	@ 0xfffe
 801e986:	4293      	cmp	r3, r2
 801e988:	d906      	bls.n	801e998 <tcp_receive+0x58c>
 801e98a:	4b1c      	ldr	r3, [pc, #112]	@ (801e9fc <tcp_receive+0x5f0>)
 801e98c:	f240 5295 	movw	r2, #1429	@ 0x595
 801e990:	491d      	ldr	r1, [pc, #116]	@ (801ea08 <tcp_receive+0x5fc>)
 801e992:	481c      	ldr	r0, [pc, #112]	@ (801ea04 <tcp_receive+0x5f8>)
 801e994:	f00b fc12 	bl	802a1bc <iprintf>
      off = (u16_t)off32;
 801e998:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801e99a:	f8a7 3042 	strh.w	r3, [r7, #66]	@ 0x42
      LWIP_ASSERT("pbuf too short!", (((s32_t)inseg.p->tot_len) >= off));
 801e99e:	4b16      	ldr	r3, [pc, #88]	@ (801e9f8 <tcp_receive+0x5ec>)
 801e9a0:	685b      	ldr	r3, [r3, #4]
 801e9a2:	891b      	ldrh	r3, [r3, #8]
 801e9a4:	f8b7 2042 	ldrh.w	r2, [r7, #66]	@ 0x42
 801e9a8:	429a      	cmp	r2, r3
 801e9aa:	d906      	bls.n	801e9ba <tcp_receive+0x5ae>
 801e9ac:	4b13      	ldr	r3, [pc, #76]	@ (801e9fc <tcp_receive+0x5f0>)
 801e9ae:	f240 5297 	movw	r2, #1431	@ 0x597
 801e9b2:	4916      	ldr	r1, [pc, #88]	@ (801ea0c <tcp_receive+0x600>)
 801e9b4:	4813      	ldr	r0, [pc, #76]	@ (801ea04 <tcp_receive+0x5f8>)
 801e9b6:	f00b fc01 	bl	802a1bc <iprintf>
      inseg.len -= off;
 801e9ba:	4b0f      	ldr	r3, [pc, #60]	@ (801e9f8 <tcp_receive+0x5ec>)
 801e9bc:	891a      	ldrh	r2, [r3, #8]
 801e9be:	f8b7 3042 	ldrh.w	r3, [r7, #66]	@ 0x42
 801e9c2:	1ad3      	subs	r3, r2, r3
 801e9c4:	b29a      	uxth	r2, r3
 801e9c6:	4b0c      	ldr	r3, [pc, #48]	@ (801e9f8 <tcp_receive+0x5ec>)
 801e9c8:	811a      	strh	r2, [r3, #8]
      new_tot_len = (u16_t)(inseg.p->tot_len - off);
 801e9ca:	4b0b      	ldr	r3, [pc, #44]	@ (801e9f8 <tcp_receive+0x5ec>)
 801e9cc:	685b      	ldr	r3, [r3, #4]
 801e9ce:	891a      	ldrh	r2, [r3, #8]
 801e9d0:	f8b7 3042 	ldrh.w	r3, [r7, #66]	@ 0x42
 801e9d4:	1ad3      	subs	r3, r2, r3
 801e9d6:	847b      	strh	r3, [r7, #34]	@ 0x22
      while (p->len < off) {
 801e9d8:	e02a      	b.n	801ea30 <tcp_receive+0x624>
 801e9da:	bf00      	nop
 801e9dc:	0802f90c 	.word	0x0802f90c
 801e9e0:	0802f914 	.word	0x0802f914
 801e9e4:	2402af9c 	.word	0x2402af9c
 801e9e8:	2402af98 	.word	0x2402af98
 801e9ec:	2402af58 	.word	0x2402af58
 801e9f0:	2402af9e 	.word	0x2402af9e
 801e9f4:	2402af94 	.word	0x2402af94
 801e9f8:	2402af70 	.word	0x2402af70
 801e9fc:	0802f5a4 	.word	0x0802f5a4
 801ea00:	0802f91c 	.word	0x0802f91c
 801ea04:	0802f5f0 	.word	0x0802f5f0
 801ea08:	0802f92c 	.word	0x0802f92c
 801ea0c:	0802f93c 	.word	0x0802f93c
        off -= p->len;
 801ea10:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 801ea12:	895b      	ldrh	r3, [r3, #10]
 801ea14:	f8b7 2042 	ldrh.w	r2, [r7, #66]	@ 0x42
 801ea18:	1ad3      	subs	r3, r2, r3
 801ea1a:	f8a7 3042 	strh.w	r3, [r7, #66]	@ 0x42
        /* all pbufs up to and including this one have len==0, so tot_len is equal */
        p->tot_len = new_tot_len;
 801ea1e:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 801ea20:	8c7a      	ldrh	r2, [r7, #34]	@ 0x22
 801ea22:	811a      	strh	r2, [r3, #8]
        p->len = 0;
 801ea24:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 801ea26:	2200      	movs	r2, #0
 801ea28:	815a      	strh	r2, [r3, #10]
        p = p->next;
 801ea2a:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 801ea2c:	681b      	ldr	r3, [r3, #0]
 801ea2e:	647b      	str	r3, [r7, #68]	@ 0x44
      while (p->len < off) {
 801ea30:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 801ea32:	895b      	ldrh	r3, [r3, #10]
 801ea34:	f8b7 2042 	ldrh.w	r2, [r7, #66]	@ 0x42
 801ea38:	429a      	cmp	r2, r3
 801ea3a:	d8e9      	bhi.n	801ea10 <tcp_receive+0x604>
      }
      /* cannot fail... */
      pbuf_remove_header(p, off);
 801ea3c:	f8b7 3042 	ldrh.w	r3, [r7, #66]	@ 0x42
 801ea40:	4619      	mov	r1, r3
 801ea42:	6c78      	ldr	r0, [r7, #68]	@ 0x44
 801ea44:	f7fc f88a 	bl	801ab5c <pbuf_remove_header>
      inseg.tcphdr->seqno = seqno = pcb->rcv_nxt;
 801ea48:	687b      	ldr	r3, [r7, #4]
 801ea4a:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801ea4c:	4a90      	ldr	r2, [pc, #576]	@ (801ec90 <tcp_receive+0x884>)
 801ea4e:	6013      	str	r3, [r2, #0]
 801ea50:	4b90      	ldr	r3, [pc, #576]	@ (801ec94 <tcp_receive+0x888>)
 801ea52:	691b      	ldr	r3, [r3, #16]
 801ea54:	4a8e      	ldr	r2, [pc, #568]	@ (801ec90 <tcp_receive+0x884>)
 801ea56:	6812      	ldr	r2, [r2, #0]
 801ea58:	605a      	str	r2, [r3, #4]
    if (TCP_SEQ_BETWEEN(pcb->rcv_nxt, seqno + 1, seqno + tcplen - 1)) {
 801ea5a:	e00d      	b.n	801ea78 <tcp_receive+0x66c>
    } else {
      if (TCP_SEQ_LT(seqno, pcb->rcv_nxt)) {
 801ea5c:	4b8c      	ldr	r3, [pc, #560]	@ (801ec90 <tcp_receive+0x884>)
 801ea5e:	681a      	ldr	r2, [r3, #0]
 801ea60:	687b      	ldr	r3, [r7, #4]
 801ea62:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801ea64:	1ad3      	subs	r3, r2, r3
 801ea66:	2b00      	cmp	r3, #0
 801ea68:	da06      	bge.n	801ea78 <tcp_receive+0x66c>
        /* the whole segment is < rcv_nxt */
        /* must be a duplicate of a packet that has already been correctly handled */

        LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: duplicate seqno %"U32_F"\n", seqno));
        tcp_ack_now(pcb);
 801ea6a:	687b      	ldr	r3, [r7, #4]
 801ea6c:	8b5b      	ldrh	r3, [r3, #26]
 801ea6e:	f043 0302 	orr.w	r3, r3, #2
 801ea72:	b29a      	uxth	r2, r3
 801ea74:	687b      	ldr	r3, [r7, #4]
 801ea76:	835a      	strh	r2, [r3, #26]
    }

    /* The sequence number must be within the window (above rcv_nxt
       and below rcv_nxt + rcv_wnd) in order to be further
       processed. */
    if (TCP_SEQ_BETWEEN(seqno, pcb->rcv_nxt,
 801ea78:	4b85      	ldr	r3, [pc, #532]	@ (801ec90 <tcp_receive+0x884>)
 801ea7a:	681a      	ldr	r2, [r3, #0]
 801ea7c:	687b      	ldr	r3, [r7, #4]
 801ea7e:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801ea80:	1ad3      	subs	r3, r2, r3
 801ea82:	2b00      	cmp	r3, #0
 801ea84:	f2c0 8427 	blt.w	801f2d6 <tcp_receive+0xeca>
 801ea88:	4b81      	ldr	r3, [pc, #516]	@ (801ec90 <tcp_receive+0x884>)
 801ea8a:	681a      	ldr	r2, [r3, #0]
 801ea8c:	687b      	ldr	r3, [r7, #4]
 801ea8e:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801ea90:	6879      	ldr	r1, [r7, #4]
 801ea92:	8d09      	ldrh	r1, [r1, #40]	@ 0x28
 801ea94:	440b      	add	r3, r1
 801ea96:	1ad3      	subs	r3, r2, r3
 801ea98:	3301      	adds	r3, #1
 801ea9a:	2b00      	cmp	r3, #0
 801ea9c:	f300 841b 	bgt.w	801f2d6 <tcp_receive+0xeca>
                        pcb->rcv_nxt + pcb->rcv_wnd - 1)) {
      if (pcb->rcv_nxt == seqno) {
 801eaa0:	687b      	ldr	r3, [r7, #4]
 801eaa2:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 801eaa4:	4b7a      	ldr	r3, [pc, #488]	@ (801ec90 <tcp_receive+0x884>)
 801eaa6:	681b      	ldr	r3, [r3, #0]
 801eaa8:	429a      	cmp	r2, r3
 801eaaa:	f040 8298 	bne.w	801efde <tcp_receive+0xbd2>
        /* The incoming segment is the next in sequence. We check if
           we have to trim the end of the segment and update rcv_nxt
           and pass the data to the application. */
        tcplen = TCP_TCPLEN(&inseg);
 801eaae:	4b79      	ldr	r3, [pc, #484]	@ (801ec94 <tcp_receive+0x888>)
 801eab0:	891c      	ldrh	r4, [r3, #8]
 801eab2:	4b78      	ldr	r3, [pc, #480]	@ (801ec94 <tcp_receive+0x888>)
 801eab4:	691b      	ldr	r3, [r3, #16]
 801eab6:	899b      	ldrh	r3, [r3, #12]
 801eab8:	b29b      	uxth	r3, r3
 801eaba:	4618      	mov	r0, r3
 801eabc:	f7fa fc24 	bl	8019308 <lwip_htons>
 801eac0:	4603      	mov	r3, r0
 801eac2:	b2db      	uxtb	r3, r3
 801eac4:	f003 0303 	and.w	r3, r3, #3
 801eac8:	2b00      	cmp	r3, #0
 801eaca:	d001      	beq.n	801ead0 <tcp_receive+0x6c4>
 801eacc:	2301      	movs	r3, #1
 801eace:	e000      	b.n	801ead2 <tcp_receive+0x6c6>
 801ead0:	2300      	movs	r3, #0
 801ead2:	4423      	add	r3, r4
 801ead4:	b29a      	uxth	r2, r3
 801ead6:	4b70      	ldr	r3, [pc, #448]	@ (801ec98 <tcp_receive+0x88c>)
 801ead8:	801a      	strh	r2, [r3, #0]

        if (tcplen > pcb->rcv_wnd) {
 801eada:	687b      	ldr	r3, [r7, #4]
 801eadc:	8d1a      	ldrh	r2, [r3, #40]	@ 0x28
 801eade:	4b6e      	ldr	r3, [pc, #440]	@ (801ec98 <tcp_receive+0x88c>)
 801eae0:	881b      	ldrh	r3, [r3, #0]
 801eae2:	429a      	cmp	r2, r3
 801eae4:	d274      	bcs.n	801ebd0 <tcp_receive+0x7c4>
          LWIP_DEBUGF(TCP_INPUT_DEBUG,
                      ("tcp_receive: other end overran receive window"
                       "seqno %"U32_F" len %"U16_F" right edge %"U32_F"\n",
                       seqno, tcplen, pcb->rcv_nxt + pcb->rcv_wnd));
          if (TCPH_FLAGS(inseg.tcphdr) & TCP_FIN) {
 801eae6:	4b6b      	ldr	r3, [pc, #428]	@ (801ec94 <tcp_receive+0x888>)
 801eae8:	691b      	ldr	r3, [r3, #16]
 801eaea:	899b      	ldrh	r3, [r3, #12]
 801eaec:	b29b      	uxth	r3, r3
 801eaee:	4618      	mov	r0, r3
 801eaf0:	f7fa fc0a 	bl	8019308 <lwip_htons>
 801eaf4:	4603      	mov	r3, r0
 801eaf6:	b2db      	uxtb	r3, r3
 801eaf8:	f003 0301 	and.w	r3, r3, #1
 801eafc:	2b00      	cmp	r3, #0
 801eafe:	d01e      	beq.n	801eb3e <tcp_receive+0x732>
            /* Must remove the FIN from the header as we're trimming
             * that byte of sequence-space from the packet */
            TCPH_FLAGS_SET(inseg.tcphdr, TCPH_FLAGS(inseg.tcphdr) & ~(unsigned int)TCP_FIN);
 801eb00:	4b64      	ldr	r3, [pc, #400]	@ (801ec94 <tcp_receive+0x888>)
 801eb02:	691b      	ldr	r3, [r3, #16]
 801eb04:	899b      	ldrh	r3, [r3, #12]
 801eb06:	b29b      	uxth	r3, r3
 801eb08:	b21b      	sxth	r3, r3
 801eb0a:	f423 537c 	bic.w	r3, r3, #16128	@ 0x3f00
 801eb0e:	b21c      	sxth	r4, r3
 801eb10:	4b60      	ldr	r3, [pc, #384]	@ (801ec94 <tcp_receive+0x888>)
 801eb12:	691b      	ldr	r3, [r3, #16]
 801eb14:	899b      	ldrh	r3, [r3, #12]
 801eb16:	b29b      	uxth	r3, r3
 801eb18:	4618      	mov	r0, r3
 801eb1a:	f7fa fbf5 	bl	8019308 <lwip_htons>
 801eb1e:	4603      	mov	r3, r0
 801eb20:	b2db      	uxtb	r3, r3
 801eb22:	f003 033e 	and.w	r3, r3, #62	@ 0x3e
 801eb26:	b29b      	uxth	r3, r3
 801eb28:	4618      	mov	r0, r3
 801eb2a:	f7fa fbed 	bl	8019308 <lwip_htons>
 801eb2e:	4603      	mov	r3, r0
 801eb30:	b21b      	sxth	r3, r3
 801eb32:	4323      	orrs	r3, r4
 801eb34:	b21a      	sxth	r2, r3
 801eb36:	4b57      	ldr	r3, [pc, #348]	@ (801ec94 <tcp_receive+0x888>)
 801eb38:	691b      	ldr	r3, [r3, #16]
 801eb3a:	b292      	uxth	r2, r2
 801eb3c:	819a      	strh	r2, [r3, #12]
          }
          /* Adjust length of segment to fit in the window. */
          TCPWND_CHECK16(pcb->rcv_wnd);
          inseg.len = (u16_t)pcb->rcv_wnd;
 801eb3e:	687b      	ldr	r3, [r7, #4]
 801eb40:	8d1a      	ldrh	r2, [r3, #40]	@ 0x28
 801eb42:	4b54      	ldr	r3, [pc, #336]	@ (801ec94 <tcp_receive+0x888>)
 801eb44:	811a      	strh	r2, [r3, #8]
          if (TCPH_FLAGS(inseg.tcphdr) & TCP_SYN) {
 801eb46:	4b53      	ldr	r3, [pc, #332]	@ (801ec94 <tcp_receive+0x888>)
 801eb48:	691b      	ldr	r3, [r3, #16]
 801eb4a:	899b      	ldrh	r3, [r3, #12]
 801eb4c:	b29b      	uxth	r3, r3
 801eb4e:	4618      	mov	r0, r3
 801eb50:	f7fa fbda 	bl	8019308 <lwip_htons>
 801eb54:	4603      	mov	r3, r0
 801eb56:	b2db      	uxtb	r3, r3
 801eb58:	f003 0302 	and.w	r3, r3, #2
 801eb5c:	2b00      	cmp	r3, #0
 801eb5e:	d005      	beq.n	801eb6c <tcp_receive+0x760>
            inseg.len -= 1;
 801eb60:	4b4c      	ldr	r3, [pc, #304]	@ (801ec94 <tcp_receive+0x888>)
 801eb62:	891b      	ldrh	r3, [r3, #8]
 801eb64:	3b01      	subs	r3, #1
 801eb66:	b29a      	uxth	r2, r3
 801eb68:	4b4a      	ldr	r3, [pc, #296]	@ (801ec94 <tcp_receive+0x888>)
 801eb6a:	811a      	strh	r2, [r3, #8]
          }
          pbuf_realloc(inseg.p, inseg.len);
 801eb6c:	4b49      	ldr	r3, [pc, #292]	@ (801ec94 <tcp_receive+0x888>)
 801eb6e:	685b      	ldr	r3, [r3, #4]
 801eb70:	4a48      	ldr	r2, [pc, #288]	@ (801ec94 <tcp_receive+0x888>)
 801eb72:	8912      	ldrh	r2, [r2, #8]
 801eb74:	4611      	mov	r1, r2
 801eb76:	4618      	mov	r0, r3
 801eb78:	f7fb fef2 	bl	801a960 <pbuf_realloc>
          tcplen = TCP_TCPLEN(&inseg);
 801eb7c:	4b45      	ldr	r3, [pc, #276]	@ (801ec94 <tcp_receive+0x888>)
 801eb7e:	891c      	ldrh	r4, [r3, #8]
 801eb80:	4b44      	ldr	r3, [pc, #272]	@ (801ec94 <tcp_receive+0x888>)
 801eb82:	691b      	ldr	r3, [r3, #16]
 801eb84:	899b      	ldrh	r3, [r3, #12]
 801eb86:	b29b      	uxth	r3, r3
 801eb88:	4618      	mov	r0, r3
 801eb8a:	f7fa fbbd 	bl	8019308 <lwip_htons>
 801eb8e:	4603      	mov	r3, r0
 801eb90:	b2db      	uxtb	r3, r3
 801eb92:	f003 0303 	and.w	r3, r3, #3
 801eb96:	2b00      	cmp	r3, #0
 801eb98:	d001      	beq.n	801eb9e <tcp_receive+0x792>
 801eb9a:	2301      	movs	r3, #1
 801eb9c:	e000      	b.n	801eba0 <tcp_receive+0x794>
 801eb9e:	2300      	movs	r3, #0
 801eba0:	4423      	add	r3, r4
 801eba2:	b29a      	uxth	r2, r3
 801eba4:	4b3c      	ldr	r3, [pc, #240]	@ (801ec98 <tcp_receive+0x88c>)
 801eba6:	801a      	strh	r2, [r3, #0]
          LWIP_ASSERT("tcp_receive: segment not trimmed correctly to rcv_wnd\n",
 801eba8:	4b3b      	ldr	r3, [pc, #236]	@ (801ec98 <tcp_receive+0x88c>)
 801ebaa:	881b      	ldrh	r3, [r3, #0]
 801ebac:	461a      	mov	r2, r3
 801ebae:	4b38      	ldr	r3, [pc, #224]	@ (801ec90 <tcp_receive+0x884>)
 801ebb0:	681b      	ldr	r3, [r3, #0]
 801ebb2:	441a      	add	r2, r3
 801ebb4:	687b      	ldr	r3, [r7, #4]
 801ebb6:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801ebb8:	6879      	ldr	r1, [r7, #4]
 801ebba:	8d09      	ldrh	r1, [r1, #40]	@ 0x28
 801ebbc:	440b      	add	r3, r1
 801ebbe:	429a      	cmp	r2, r3
 801ebc0:	d006      	beq.n	801ebd0 <tcp_receive+0x7c4>
 801ebc2:	4b36      	ldr	r3, [pc, #216]	@ (801ec9c <tcp_receive+0x890>)
 801ebc4:	f240 52cb 	movw	r2, #1483	@ 0x5cb
 801ebc8:	4935      	ldr	r1, [pc, #212]	@ (801eca0 <tcp_receive+0x894>)
 801ebca:	4836      	ldr	r0, [pc, #216]	@ (801eca4 <tcp_receive+0x898>)
 801ebcc:	f00b faf6 	bl	802a1bc <iprintf>
        }
#if TCP_QUEUE_OOSEQ
        /* Received in-sequence data, adjust ooseq data if:
           - FIN has been received or
           - inseq overlaps with ooseq */
        if (pcb->ooseq != NULL) {
 801ebd0:	687b      	ldr	r3, [r7, #4]
 801ebd2:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801ebd4:	2b00      	cmp	r3, #0
 801ebd6:	f000 80e6 	beq.w	801eda6 <tcp_receive+0x99a>
          if (TCPH_FLAGS(inseg.tcphdr) & TCP_FIN) {
 801ebda:	4b2e      	ldr	r3, [pc, #184]	@ (801ec94 <tcp_receive+0x888>)
 801ebdc:	691b      	ldr	r3, [r3, #16]
 801ebde:	899b      	ldrh	r3, [r3, #12]
 801ebe0:	b29b      	uxth	r3, r3
 801ebe2:	4618      	mov	r0, r3
 801ebe4:	f7fa fb90 	bl	8019308 <lwip_htons>
 801ebe8:	4603      	mov	r3, r0
 801ebea:	b2db      	uxtb	r3, r3
 801ebec:	f003 0301 	and.w	r3, r3, #1
 801ebf0:	2b00      	cmp	r3, #0
 801ebf2:	d010      	beq.n	801ec16 <tcp_receive+0x80a>
            LWIP_DEBUGF(TCP_INPUT_DEBUG,
                        ("tcp_receive: received in-order FIN, binning ooseq queue\n"));
            /* Received in-order FIN means anything that was received
             * out of order must now have been received in-order, so
             * bin the ooseq queue */
            while (pcb->ooseq != NULL) {
 801ebf4:	e00a      	b.n	801ec0c <tcp_receive+0x800>
              struct tcp_seg *old_ooseq = pcb->ooseq;
 801ebf6:	687b      	ldr	r3, [r7, #4]
 801ebf8:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801ebfa:	60fb      	str	r3, [r7, #12]
              pcb->ooseq = pcb->ooseq->next;
 801ebfc:	687b      	ldr	r3, [r7, #4]
 801ebfe:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801ec00:	681a      	ldr	r2, [r3, #0]
 801ec02:	687b      	ldr	r3, [r7, #4]
 801ec04:	675a      	str	r2, [r3, #116]	@ 0x74
              tcp_seg_free(old_ooseq);
 801ec06:	68f8      	ldr	r0, [r7, #12]
 801ec08:	f7fd fcb9 	bl	801c57e <tcp_seg_free>
            while (pcb->ooseq != NULL) {
 801ec0c:	687b      	ldr	r3, [r7, #4]
 801ec0e:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801ec10:	2b00      	cmp	r3, #0
 801ec12:	d1f0      	bne.n	801ebf6 <tcp_receive+0x7ea>
 801ec14:	e0c7      	b.n	801eda6 <tcp_receive+0x99a>
            }
          } else {
            struct tcp_seg *next = pcb->ooseq;
 801ec16:	687b      	ldr	r3, [r7, #4]
 801ec18:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801ec1a:	63fb      	str	r3, [r7, #60]	@ 0x3c
            /* Remove all segments on ooseq that are covered by inseg already.
             * FIN is copied from ooseq to inseg if present. */
            while (next &&
 801ec1c:	e051      	b.n	801ecc2 <tcp_receive+0x8b6>
                   TCP_SEQ_GEQ(seqno + tcplen,
                               next->tcphdr->seqno + next->len)) {
              struct tcp_seg *tmp;
              /* inseg cannot have FIN here (already processed above) */
              if ((TCPH_FLAGS(next->tcphdr) & TCP_FIN) != 0 &&
 801ec1e:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801ec20:	691b      	ldr	r3, [r3, #16]
 801ec22:	899b      	ldrh	r3, [r3, #12]
 801ec24:	b29b      	uxth	r3, r3
 801ec26:	4618      	mov	r0, r3
 801ec28:	f7fa fb6e 	bl	8019308 <lwip_htons>
 801ec2c:	4603      	mov	r3, r0
 801ec2e:	b2db      	uxtb	r3, r3
 801ec30:	f003 0301 	and.w	r3, r3, #1
 801ec34:	2b00      	cmp	r3, #0
 801ec36:	d03c      	beq.n	801ecb2 <tcp_receive+0x8a6>
                  (TCPH_FLAGS(inseg.tcphdr) & TCP_SYN) == 0) {
 801ec38:	4b16      	ldr	r3, [pc, #88]	@ (801ec94 <tcp_receive+0x888>)
 801ec3a:	691b      	ldr	r3, [r3, #16]
 801ec3c:	899b      	ldrh	r3, [r3, #12]
 801ec3e:	b29b      	uxth	r3, r3
 801ec40:	4618      	mov	r0, r3
 801ec42:	f7fa fb61 	bl	8019308 <lwip_htons>
 801ec46:	4603      	mov	r3, r0
 801ec48:	b2db      	uxtb	r3, r3
 801ec4a:	f003 0302 	and.w	r3, r3, #2
              if ((TCPH_FLAGS(next->tcphdr) & TCP_FIN) != 0 &&
 801ec4e:	2b00      	cmp	r3, #0
 801ec50:	d12f      	bne.n	801ecb2 <tcp_receive+0x8a6>
                TCPH_SET_FLAG(inseg.tcphdr, TCP_FIN);
 801ec52:	4b10      	ldr	r3, [pc, #64]	@ (801ec94 <tcp_receive+0x888>)
 801ec54:	691b      	ldr	r3, [r3, #16]
 801ec56:	899b      	ldrh	r3, [r3, #12]
 801ec58:	b29c      	uxth	r4, r3
 801ec5a:	2001      	movs	r0, #1
 801ec5c:	f7fa fb54 	bl	8019308 <lwip_htons>
 801ec60:	4603      	mov	r3, r0
 801ec62:	461a      	mov	r2, r3
 801ec64:	4b0b      	ldr	r3, [pc, #44]	@ (801ec94 <tcp_receive+0x888>)
 801ec66:	691b      	ldr	r3, [r3, #16]
 801ec68:	4322      	orrs	r2, r4
 801ec6a:	b292      	uxth	r2, r2
 801ec6c:	819a      	strh	r2, [r3, #12]
                tcplen = TCP_TCPLEN(&inseg);
 801ec6e:	4b09      	ldr	r3, [pc, #36]	@ (801ec94 <tcp_receive+0x888>)
 801ec70:	891c      	ldrh	r4, [r3, #8]
 801ec72:	4b08      	ldr	r3, [pc, #32]	@ (801ec94 <tcp_receive+0x888>)
 801ec74:	691b      	ldr	r3, [r3, #16]
 801ec76:	899b      	ldrh	r3, [r3, #12]
 801ec78:	b29b      	uxth	r3, r3
 801ec7a:	4618      	mov	r0, r3
 801ec7c:	f7fa fb44 	bl	8019308 <lwip_htons>
 801ec80:	4603      	mov	r3, r0
 801ec82:	b2db      	uxtb	r3, r3
 801ec84:	f003 0303 	and.w	r3, r3, #3
 801ec88:	2b00      	cmp	r3, #0
 801ec8a:	d00d      	beq.n	801eca8 <tcp_receive+0x89c>
 801ec8c:	2301      	movs	r3, #1
 801ec8e:	e00c      	b.n	801ecaa <tcp_receive+0x89e>
 801ec90:	2402af94 	.word	0x2402af94
 801ec94:	2402af70 	.word	0x2402af70
 801ec98:	2402af9e 	.word	0x2402af9e
 801ec9c:	0802f5a4 	.word	0x0802f5a4
 801eca0:	0802f94c 	.word	0x0802f94c
 801eca4:	0802f5f0 	.word	0x0802f5f0
 801eca8:	2300      	movs	r3, #0
 801ecaa:	4423      	add	r3, r4
 801ecac:	b29a      	uxth	r2, r3
 801ecae:	4b98      	ldr	r3, [pc, #608]	@ (801ef10 <tcp_receive+0xb04>)
 801ecb0:	801a      	strh	r2, [r3, #0]
              }
              tmp = next;
 801ecb2:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801ecb4:	613b      	str	r3, [r7, #16]
              next = next->next;
 801ecb6:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801ecb8:	681b      	ldr	r3, [r3, #0]
 801ecba:	63fb      	str	r3, [r7, #60]	@ 0x3c
              tcp_seg_free(tmp);
 801ecbc:	6938      	ldr	r0, [r7, #16]
 801ecbe:	f7fd fc5e 	bl	801c57e <tcp_seg_free>
            while (next &&
 801ecc2:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801ecc4:	2b00      	cmp	r3, #0
 801ecc6:	d00e      	beq.n	801ece6 <tcp_receive+0x8da>
                   TCP_SEQ_GEQ(seqno + tcplen,
 801ecc8:	4b91      	ldr	r3, [pc, #580]	@ (801ef10 <tcp_receive+0xb04>)
 801ecca:	881b      	ldrh	r3, [r3, #0]
 801eccc:	461a      	mov	r2, r3
 801ecce:	4b91      	ldr	r3, [pc, #580]	@ (801ef14 <tcp_receive+0xb08>)
 801ecd0:	681b      	ldr	r3, [r3, #0]
 801ecd2:	441a      	add	r2, r3
 801ecd4:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801ecd6:	691b      	ldr	r3, [r3, #16]
 801ecd8:	685b      	ldr	r3, [r3, #4]
 801ecda:	6bf9      	ldr	r1, [r7, #60]	@ 0x3c
 801ecdc:	8909      	ldrh	r1, [r1, #8]
 801ecde:	440b      	add	r3, r1
 801ece0:	1ad3      	subs	r3, r2, r3
            while (next &&
 801ece2:	2b00      	cmp	r3, #0
 801ece4:	da9b      	bge.n	801ec1e <tcp_receive+0x812>
            }
            /* Now trim right side of inseg if it overlaps with the first
             * segment on ooseq */
            if (next &&
 801ece6:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801ece8:	2b00      	cmp	r3, #0
 801ecea:	d059      	beq.n	801eda0 <tcp_receive+0x994>
                TCP_SEQ_GT(seqno + tcplen,
 801ecec:	4b88      	ldr	r3, [pc, #544]	@ (801ef10 <tcp_receive+0xb04>)
 801ecee:	881b      	ldrh	r3, [r3, #0]
 801ecf0:	461a      	mov	r2, r3
 801ecf2:	4b88      	ldr	r3, [pc, #544]	@ (801ef14 <tcp_receive+0xb08>)
 801ecf4:	681b      	ldr	r3, [r3, #0]
 801ecf6:	441a      	add	r2, r3
 801ecf8:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801ecfa:	691b      	ldr	r3, [r3, #16]
 801ecfc:	685b      	ldr	r3, [r3, #4]
 801ecfe:	1ad3      	subs	r3, r2, r3
            if (next &&
 801ed00:	2b00      	cmp	r3, #0
 801ed02:	dd4d      	ble.n	801eda0 <tcp_receive+0x994>
                           next->tcphdr->seqno)) {
              /* inseg cannot have FIN here (already processed above) */
              inseg.len = (u16_t)(next->tcphdr->seqno - seqno);
 801ed04:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801ed06:	691b      	ldr	r3, [r3, #16]
 801ed08:	685b      	ldr	r3, [r3, #4]
 801ed0a:	b29a      	uxth	r2, r3
 801ed0c:	4b81      	ldr	r3, [pc, #516]	@ (801ef14 <tcp_receive+0xb08>)
 801ed0e:	681b      	ldr	r3, [r3, #0]
 801ed10:	b29b      	uxth	r3, r3
 801ed12:	1ad3      	subs	r3, r2, r3
 801ed14:	b29a      	uxth	r2, r3
 801ed16:	4b80      	ldr	r3, [pc, #512]	@ (801ef18 <tcp_receive+0xb0c>)
 801ed18:	811a      	strh	r2, [r3, #8]
              if (TCPH_FLAGS(inseg.tcphdr) & TCP_SYN) {
 801ed1a:	4b7f      	ldr	r3, [pc, #508]	@ (801ef18 <tcp_receive+0xb0c>)
 801ed1c:	691b      	ldr	r3, [r3, #16]
 801ed1e:	899b      	ldrh	r3, [r3, #12]
 801ed20:	b29b      	uxth	r3, r3
 801ed22:	4618      	mov	r0, r3
 801ed24:	f7fa faf0 	bl	8019308 <lwip_htons>
 801ed28:	4603      	mov	r3, r0
 801ed2a:	b2db      	uxtb	r3, r3
 801ed2c:	f003 0302 	and.w	r3, r3, #2
 801ed30:	2b00      	cmp	r3, #0
 801ed32:	d005      	beq.n	801ed40 <tcp_receive+0x934>
                inseg.len -= 1;
 801ed34:	4b78      	ldr	r3, [pc, #480]	@ (801ef18 <tcp_receive+0xb0c>)
 801ed36:	891b      	ldrh	r3, [r3, #8]
 801ed38:	3b01      	subs	r3, #1
 801ed3a:	b29a      	uxth	r2, r3
 801ed3c:	4b76      	ldr	r3, [pc, #472]	@ (801ef18 <tcp_receive+0xb0c>)
 801ed3e:	811a      	strh	r2, [r3, #8]
              }
              pbuf_realloc(inseg.p, inseg.len);
 801ed40:	4b75      	ldr	r3, [pc, #468]	@ (801ef18 <tcp_receive+0xb0c>)
 801ed42:	685b      	ldr	r3, [r3, #4]
 801ed44:	4a74      	ldr	r2, [pc, #464]	@ (801ef18 <tcp_receive+0xb0c>)
 801ed46:	8912      	ldrh	r2, [r2, #8]
 801ed48:	4611      	mov	r1, r2
 801ed4a:	4618      	mov	r0, r3
 801ed4c:	f7fb fe08 	bl	801a960 <pbuf_realloc>
              tcplen = TCP_TCPLEN(&inseg);
 801ed50:	4b71      	ldr	r3, [pc, #452]	@ (801ef18 <tcp_receive+0xb0c>)
 801ed52:	891c      	ldrh	r4, [r3, #8]
 801ed54:	4b70      	ldr	r3, [pc, #448]	@ (801ef18 <tcp_receive+0xb0c>)
 801ed56:	691b      	ldr	r3, [r3, #16]
 801ed58:	899b      	ldrh	r3, [r3, #12]
 801ed5a:	b29b      	uxth	r3, r3
 801ed5c:	4618      	mov	r0, r3
 801ed5e:	f7fa fad3 	bl	8019308 <lwip_htons>
 801ed62:	4603      	mov	r3, r0
 801ed64:	b2db      	uxtb	r3, r3
 801ed66:	f003 0303 	and.w	r3, r3, #3
 801ed6a:	2b00      	cmp	r3, #0
 801ed6c:	d001      	beq.n	801ed72 <tcp_receive+0x966>
 801ed6e:	2301      	movs	r3, #1
 801ed70:	e000      	b.n	801ed74 <tcp_receive+0x968>
 801ed72:	2300      	movs	r3, #0
 801ed74:	4423      	add	r3, r4
 801ed76:	b29a      	uxth	r2, r3
 801ed78:	4b65      	ldr	r3, [pc, #404]	@ (801ef10 <tcp_receive+0xb04>)
 801ed7a:	801a      	strh	r2, [r3, #0]
              LWIP_ASSERT("tcp_receive: segment not trimmed correctly to ooseq queue\n",
 801ed7c:	4b64      	ldr	r3, [pc, #400]	@ (801ef10 <tcp_receive+0xb04>)
 801ed7e:	881b      	ldrh	r3, [r3, #0]
 801ed80:	461a      	mov	r2, r3
 801ed82:	4b64      	ldr	r3, [pc, #400]	@ (801ef14 <tcp_receive+0xb08>)
 801ed84:	681b      	ldr	r3, [r3, #0]
 801ed86:	441a      	add	r2, r3
 801ed88:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801ed8a:	691b      	ldr	r3, [r3, #16]
 801ed8c:	685b      	ldr	r3, [r3, #4]
 801ed8e:	429a      	cmp	r2, r3
 801ed90:	d006      	beq.n	801eda0 <tcp_receive+0x994>
 801ed92:	4b62      	ldr	r3, [pc, #392]	@ (801ef1c <tcp_receive+0xb10>)
 801ed94:	f240 52fc 	movw	r2, #1532	@ 0x5fc
 801ed98:	4961      	ldr	r1, [pc, #388]	@ (801ef20 <tcp_receive+0xb14>)
 801ed9a:	4862      	ldr	r0, [pc, #392]	@ (801ef24 <tcp_receive+0xb18>)
 801ed9c:	f00b fa0e 	bl	802a1bc <iprintf>
                          (seqno + tcplen) == next->tcphdr->seqno);
            }
            pcb->ooseq = next;
 801eda0:	687b      	ldr	r3, [r7, #4]
 801eda2:	6bfa      	ldr	r2, [r7, #60]	@ 0x3c
 801eda4:	675a      	str	r2, [r3, #116]	@ 0x74
          }
        }
#endif /* TCP_QUEUE_OOSEQ */

        pcb->rcv_nxt = seqno + tcplen;
 801eda6:	4b5a      	ldr	r3, [pc, #360]	@ (801ef10 <tcp_receive+0xb04>)
 801eda8:	881b      	ldrh	r3, [r3, #0]
 801edaa:	461a      	mov	r2, r3
 801edac:	4b59      	ldr	r3, [pc, #356]	@ (801ef14 <tcp_receive+0xb08>)
 801edae:	681b      	ldr	r3, [r3, #0]
 801edb0:	441a      	add	r2, r3
 801edb2:	687b      	ldr	r3, [r7, #4]
 801edb4:	625a      	str	r2, [r3, #36]	@ 0x24

        /* Update the receiver's (our) window. */
        LWIP_ASSERT("tcp_receive: tcplen > rcv_wnd\n", pcb->rcv_wnd >= tcplen);
 801edb6:	687b      	ldr	r3, [r7, #4]
 801edb8:	8d1a      	ldrh	r2, [r3, #40]	@ 0x28
 801edba:	4b55      	ldr	r3, [pc, #340]	@ (801ef10 <tcp_receive+0xb04>)
 801edbc:	881b      	ldrh	r3, [r3, #0]
 801edbe:	429a      	cmp	r2, r3
 801edc0:	d206      	bcs.n	801edd0 <tcp_receive+0x9c4>
 801edc2:	4b56      	ldr	r3, [pc, #344]	@ (801ef1c <tcp_receive+0xb10>)
 801edc4:	f240 6207 	movw	r2, #1543	@ 0x607
 801edc8:	4957      	ldr	r1, [pc, #348]	@ (801ef28 <tcp_receive+0xb1c>)
 801edca:	4856      	ldr	r0, [pc, #344]	@ (801ef24 <tcp_receive+0xb18>)
 801edcc:	f00b f9f6 	bl	802a1bc <iprintf>
        pcb->rcv_wnd -= tcplen;
 801edd0:	687b      	ldr	r3, [r7, #4]
 801edd2:	8d1a      	ldrh	r2, [r3, #40]	@ 0x28
 801edd4:	4b4e      	ldr	r3, [pc, #312]	@ (801ef10 <tcp_receive+0xb04>)
 801edd6:	881b      	ldrh	r3, [r3, #0]
 801edd8:	1ad3      	subs	r3, r2, r3
 801edda:	b29a      	uxth	r2, r3
 801eddc:	687b      	ldr	r3, [r7, #4]
 801edde:	851a      	strh	r2, [r3, #40]	@ 0x28

        tcp_update_rcv_ann_wnd(pcb);
 801ede0:	6878      	ldr	r0, [r7, #4]
 801ede2:	f7fc fd85 	bl	801b8f0 <tcp_update_rcv_ann_wnd>
           chains its data on this pbuf as well.

           If the segment was a FIN, we set the TF_GOT_FIN flag that will
           be used to indicate to the application that the remote side has
           closed its end of the connection. */
        if (inseg.p->tot_len > 0) {
 801ede6:	4b4c      	ldr	r3, [pc, #304]	@ (801ef18 <tcp_receive+0xb0c>)
 801ede8:	685b      	ldr	r3, [r3, #4]
 801edea:	891b      	ldrh	r3, [r3, #8]
 801edec:	2b00      	cmp	r3, #0
 801edee:	d006      	beq.n	801edfe <tcp_receive+0x9f2>
          recv_data = inseg.p;
 801edf0:	4b49      	ldr	r3, [pc, #292]	@ (801ef18 <tcp_receive+0xb0c>)
 801edf2:	685b      	ldr	r3, [r3, #4]
 801edf4:	4a4d      	ldr	r2, [pc, #308]	@ (801ef2c <tcp_receive+0xb20>)
 801edf6:	6013      	str	r3, [r2, #0]
          /* Since this pbuf now is the responsibility of the
             application, we delete our reference to it so that we won't
             (mistakingly) deallocate it. */
          inseg.p = NULL;
 801edf8:	4b47      	ldr	r3, [pc, #284]	@ (801ef18 <tcp_receive+0xb0c>)
 801edfa:	2200      	movs	r2, #0
 801edfc:	605a      	str	r2, [r3, #4]
        }
        if (TCPH_FLAGS(inseg.tcphdr) & TCP_FIN) {
 801edfe:	4b46      	ldr	r3, [pc, #280]	@ (801ef18 <tcp_receive+0xb0c>)
 801ee00:	691b      	ldr	r3, [r3, #16]
 801ee02:	899b      	ldrh	r3, [r3, #12]
 801ee04:	b29b      	uxth	r3, r3
 801ee06:	4618      	mov	r0, r3
 801ee08:	f7fa fa7e 	bl	8019308 <lwip_htons>
 801ee0c:	4603      	mov	r3, r0
 801ee0e:	b2db      	uxtb	r3, r3
 801ee10:	f003 0301 	and.w	r3, r3, #1
 801ee14:	2b00      	cmp	r3, #0
 801ee16:	f000 80b8 	beq.w	801ef8a <tcp_receive+0xb7e>
          LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: received FIN.\n"));
          recv_flags |= TF_GOT_FIN;
 801ee1a:	4b45      	ldr	r3, [pc, #276]	@ (801ef30 <tcp_receive+0xb24>)
 801ee1c:	781b      	ldrb	r3, [r3, #0]
 801ee1e:	f043 0320 	orr.w	r3, r3, #32
 801ee22:	b2da      	uxtb	r2, r3
 801ee24:	4b42      	ldr	r3, [pc, #264]	@ (801ef30 <tcp_receive+0xb24>)
 801ee26:	701a      	strb	r2, [r3, #0]
        }

#if TCP_QUEUE_OOSEQ
        /* We now check if we have segments on the ->ooseq queue that
           are now in sequence. */
        while (pcb->ooseq != NULL &&
 801ee28:	e0af      	b.n	801ef8a <tcp_receive+0xb7e>
               pcb->ooseq->tcphdr->seqno == pcb->rcv_nxt) {

          struct tcp_seg *cseg = pcb->ooseq;
 801ee2a:	687b      	ldr	r3, [r7, #4]
 801ee2c:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801ee2e:	60bb      	str	r3, [r7, #8]
          seqno = pcb->ooseq->tcphdr->seqno;
 801ee30:	687b      	ldr	r3, [r7, #4]
 801ee32:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801ee34:	691b      	ldr	r3, [r3, #16]
 801ee36:	685b      	ldr	r3, [r3, #4]
 801ee38:	4a36      	ldr	r2, [pc, #216]	@ (801ef14 <tcp_receive+0xb08>)
 801ee3a:	6013      	str	r3, [r2, #0]

          pcb->rcv_nxt += TCP_TCPLEN(cseg);
 801ee3c:	68bb      	ldr	r3, [r7, #8]
 801ee3e:	891b      	ldrh	r3, [r3, #8]
 801ee40:	461c      	mov	r4, r3
 801ee42:	68bb      	ldr	r3, [r7, #8]
 801ee44:	691b      	ldr	r3, [r3, #16]
 801ee46:	899b      	ldrh	r3, [r3, #12]
 801ee48:	b29b      	uxth	r3, r3
 801ee4a:	4618      	mov	r0, r3
 801ee4c:	f7fa fa5c 	bl	8019308 <lwip_htons>
 801ee50:	4603      	mov	r3, r0
 801ee52:	b2db      	uxtb	r3, r3
 801ee54:	f003 0303 	and.w	r3, r3, #3
 801ee58:	2b00      	cmp	r3, #0
 801ee5a:	d001      	beq.n	801ee60 <tcp_receive+0xa54>
 801ee5c:	2301      	movs	r3, #1
 801ee5e:	e000      	b.n	801ee62 <tcp_receive+0xa56>
 801ee60:	2300      	movs	r3, #0
 801ee62:	191a      	adds	r2, r3, r4
 801ee64:	687b      	ldr	r3, [r7, #4]
 801ee66:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801ee68:	441a      	add	r2, r3
 801ee6a:	687b      	ldr	r3, [r7, #4]
 801ee6c:	625a      	str	r2, [r3, #36]	@ 0x24
          LWIP_ASSERT("tcp_receive: ooseq tcplen > rcv_wnd\n",
 801ee6e:	687b      	ldr	r3, [r7, #4]
 801ee70:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 801ee72:	461c      	mov	r4, r3
 801ee74:	68bb      	ldr	r3, [r7, #8]
 801ee76:	891b      	ldrh	r3, [r3, #8]
 801ee78:	461d      	mov	r5, r3
 801ee7a:	68bb      	ldr	r3, [r7, #8]
 801ee7c:	691b      	ldr	r3, [r3, #16]
 801ee7e:	899b      	ldrh	r3, [r3, #12]
 801ee80:	b29b      	uxth	r3, r3
 801ee82:	4618      	mov	r0, r3
 801ee84:	f7fa fa40 	bl	8019308 <lwip_htons>
 801ee88:	4603      	mov	r3, r0
 801ee8a:	b2db      	uxtb	r3, r3
 801ee8c:	f003 0303 	and.w	r3, r3, #3
 801ee90:	2b00      	cmp	r3, #0
 801ee92:	d001      	beq.n	801ee98 <tcp_receive+0xa8c>
 801ee94:	2301      	movs	r3, #1
 801ee96:	e000      	b.n	801ee9a <tcp_receive+0xa8e>
 801ee98:	2300      	movs	r3, #0
 801ee9a:	442b      	add	r3, r5
 801ee9c:	429c      	cmp	r4, r3
 801ee9e:	d206      	bcs.n	801eeae <tcp_receive+0xaa2>
 801eea0:	4b1e      	ldr	r3, [pc, #120]	@ (801ef1c <tcp_receive+0xb10>)
 801eea2:	f240 622b 	movw	r2, #1579	@ 0x62b
 801eea6:	4923      	ldr	r1, [pc, #140]	@ (801ef34 <tcp_receive+0xb28>)
 801eea8:	481e      	ldr	r0, [pc, #120]	@ (801ef24 <tcp_receive+0xb18>)
 801eeaa:	f00b f987 	bl	802a1bc <iprintf>
                      pcb->rcv_wnd >= TCP_TCPLEN(cseg));
          pcb->rcv_wnd -= TCP_TCPLEN(cseg);
 801eeae:	68bb      	ldr	r3, [r7, #8]
 801eeb0:	891b      	ldrh	r3, [r3, #8]
 801eeb2:	461c      	mov	r4, r3
 801eeb4:	68bb      	ldr	r3, [r7, #8]
 801eeb6:	691b      	ldr	r3, [r3, #16]
 801eeb8:	899b      	ldrh	r3, [r3, #12]
 801eeba:	b29b      	uxth	r3, r3
 801eebc:	4618      	mov	r0, r3
 801eebe:	f7fa fa23 	bl	8019308 <lwip_htons>
 801eec2:	4603      	mov	r3, r0
 801eec4:	b2db      	uxtb	r3, r3
 801eec6:	f003 0303 	and.w	r3, r3, #3
 801eeca:	2b00      	cmp	r3, #0
 801eecc:	d001      	beq.n	801eed2 <tcp_receive+0xac6>
 801eece:	2301      	movs	r3, #1
 801eed0:	e000      	b.n	801eed4 <tcp_receive+0xac8>
 801eed2:	2300      	movs	r3, #0
 801eed4:	1919      	adds	r1, r3, r4
 801eed6:	687b      	ldr	r3, [r7, #4]
 801eed8:	8d1a      	ldrh	r2, [r3, #40]	@ 0x28
 801eeda:	b28b      	uxth	r3, r1
 801eedc:	1ad3      	subs	r3, r2, r3
 801eede:	b29a      	uxth	r2, r3
 801eee0:	687b      	ldr	r3, [r7, #4]
 801eee2:	851a      	strh	r2, [r3, #40]	@ 0x28

          tcp_update_rcv_ann_wnd(pcb);
 801eee4:	6878      	ldr	r0, [r7, #4]
 801eee6:	f7fc fd03 	bl	801b8f0 <tcp_update_rcv_ann_wnd>

          if (cseg->p->tot_len > 0) {
 801eeea:	68bb      	ldr	r3, [r7, #8]
 801eeec:	685b      	ldr	r3, [r3, #4]
 801eeee:	891b      	ldrh	r3, [r3, #8]
 801eef0:	2b00      	cmp	r3, #0
 801eef2:	d028      	beq.n	801ef46 <tcp_receive+0xb3a>
            /* Chain this pbuf onto the pbuf that we will pass to
               the application. */
            /* With window scaling, this can overflow recv_data->tot_len, but
               that's not a problem since we explicitly fix that before passing
               recv_data to the application. */
            if (recv_data) {
 801eef4:	4b0d      	ldr	r3, [pc, #52]	@ (801ef2c <tcp_receive+0xb20>)
 801eef6:	681b      	ldr	r3, [r3, #0]
 801eef8:	2b00      	cmp	r3, #0
 801eefa:	d01d      	beq.n	801ef38 <tcp_receive+0xb2c>
              pbuf_cat(recv_data, cseg->p);
 801eefc:	4b0b      	ldr	r3, [pc, #44]	@ (801ef2c <tcp_receive+0xb20>)
 801eefe:	681a      	ldr	r2, [r3, #0]
 801ef00:	68bb      	ldr	r3, [r7, #8]
 801ef02:	685b      	ldr	r3, [r3, #4]
 801ef04:	4619      	mov	r1, r3
 801ef06:	4610      	mov	r0, r2
 801ef08:	f7fb ffae 	bl	801ae68 <pbuf_cat>
 801ef0c:	e018      	b.n	801ef40 <tcp_receive+0xb34>
 801ef0e:	bf00      	nop
 801ef10:	2402af9e 	.word	0x2402af9e
 801ef14:	2402af94 	.word	0x2402af94
 801ef18:	2402af70 	.word	0x2402af70
 801ef1c:	0802f5a4 	.word	0x0802f5a4
 801ef20:	0802f984 	.word	0x0802f984
 801ef24:	0802f5f0 	.word	0x0802f5f0
 801ef28:	0802f9c0 	.word	0x0802f9c0
 801ef2c:	2402afa4 	.word	0x2402afa4
 801ef30:	2402afa1 	.word	0x2402afa1
 801ef34:	0802f9e0 	.word	0x0802f9e0
            } else {
              recv_data = cseg->p;
 801ef38:	68bb      	ldr	r3, [r7, #8]
 801ef3a:	685b      	ldr	r3, [r3, #4]
 801ef3c:	4a70      	ldr	r2, [pc, #448]	@ (801f100 <tcp_receive+0xcf4>)
 801ef3e:	6013      	str	r3, [r2, #0]
            }
            cseg->p = NULL;
 801ef40:	68bb      	ldr	r3, [r7, #8]
 801ef42:	2200      	movs	r2, #0
 801ef44:	605a      	str	r2, [r3, #4]
          }
          if (TCPH_FLAGS(cseg->tcphdr) & TCP_FIN) {
 801ef46:	68bb      	ldr	r3, [r7, #8]
 801ef48:	691b      	ldr	r3, [r3, #16]
 801ef4a:	899b      	ldrh	r3, [r3, #12]
 801ef4c:	b29b      	uxth	r3, r3
 801ef4e:	4618      	mov	r0, r3
 801ef50:	f7fa f9da 	bl	8019308 <lwip_htons>
 801ef54:	4603      	mov	r3, r0
 801ef56:	b2db      	uxtb	r3, r3
 801ef58:	f003 0301 	and.w	r3, r3, #1
 801ef5c:	2b00      	cmp	r3, #0
 801ef5e:	d00d      	beq.n	801ef7c <tcp_receive+0xb70>
            LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: dequeued FIN.\n"));
            recv_flags |= TF_GOT_FIN;
 801ef60:	4b68      	ldr	r3, [pc, #416]	@ (801f104 <tcp_receive+0xcf8>)
 801ef62:	781b      	ldrb	r3, [r3, #0]
 801ef64:	f043 0320 	orr.w	r3, r3, #32
 801ef68:	b2da      	uxtb	r2, r3
 801ef6a:	4b66      	ldr	r3, [pc, #408]	@ (801f104 <tcp_receive+0xcf8>)
 801ef6c:	701a      	strb	r2, [r3, #0]
            if (pcb->state == ESTABLISHED) { /* force passive close or we can move to active close */
 801ef6e:	687b      	ldr	r3, [r7, #4]
 801ef70:	7d1b      	ldrb	r3, [r3, #20]
 801ef72:	2b04      	cmp	r3, #4
 801ef74:	d102      	bne.n	801ef7c <tcp_receive+0xb70>
              pcb->state = CLOSE_WAIT;
 801ef76:	687b      	ldr	r3, [r7, #4]
 801ef78:	2207      	movs	r2, #7
 801ef7a:	751a      	strb	r2, [r3, #20]
            }
          }

          pcb->ooseq = cseg->next;
 801ef7c:	68bb      	ldr	r3, [r7, #8]
 801ef7e:	681a      	ldr	r2, [r3, #0]
 801ef80:	687b      	ldr	r3, [r7, #4]
 801ef82:	675a      	str	r2, [r3, #116]	@ 0x74
          tcp_seg_free(cseg);
 801ef84:	68b8      	ldr	r0, [r7, #8]
 801ef86:	f7fd fafa 	bl	801c57e <tcp_seg_free>
        while (pcb->ooseq != NULL &&
 801ef8a:	687b      	ldr	r3, [r7, #4]
 801ef8c:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801ef8e:	2b00      	cmp	r3, #0
 801ef90:	d008      	beq.n	801efa4 <tcp_receive+0xb98>
               pcb->ooseq->tcphdr->seqno == pcb->rcv_nxt) {
 801ef92:	687b      	ldr	r3, [r7, #4]
 801ef94:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801ef96:	691b      	ldr	r3, [r3, #16]
 801ef98:	685a      	ldr	r2, [r3, #4]
 801ef9a:	687b      	ldr	r3, [r7, #4]
 801ef9c:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
        while (pcb->ooseq != NULL &&
 801ef9e:	429a      	cmp	r2, r3
 801efa0:	f43f af43 	beq.w	801ee2a <tcp_receive+0xa1e>
#endif /* LWIP_TCP_SACK_OUT */
#endif /* TCP_QUEUE_OOSEQ */


        /* Acknowledge the segment(s). */
        tcp_ack(pcb);
 801efa4:	687b      	ldr	r3, [r7, #4]
 801efa6:	8b5b      	ldrh	r3, [r3, #26]
 801efa8:	f003 0301 	and.w	r3, r3, #1
 801efac:	2b00      	cmp	r3, #0
 801efae:	d00e      	beq.n	801efce <tcp_receive+0xbc2>
 801efb0:	687b      	ldr	r3, [r7, #4]
 801efb2:	8b5b      	ldrh	r3, [r3, #26]
 801efb4:	f023 0301 	bic.w	r3, r3, #1
 801efb8:	b29a      	uxth	r2, r3
 801efba:	687b      	ldr	r3, [r7, #4]
 801efbc:	835a      	strh	r2, [r3, #26]
 801efbe:	687b      	ldr	r3, [r7, #4]
 801efc0:	8b5b      	ldrh	r3, [r3, #26]
 801efc2:	f043 0302 	orr.w	r3, r3, #2
 801efc6:	b29a      	uxth	r2, r3
 801efc8:	687b      	ldr	r3, [r7, #4]
 801efca:	835a      	strh	r2, [r3, #26]
      if (pcb->rcv_nxt == seqno) {
 801efcc:	e187      	b.n	801f2de <tcp_receive+0xed2>
        tcp_ack(pcb);
 801efce:	687b      	ldr	r3, [r7, #4]
 801efd0:	8b5b      	ldrh	r3, [r3, #26]
 801efd2:	f043 0301 	orr.w	r3, r3, #1
 801efd6:	b29a      	uxth	r2, r3
 801efd8:	687b      	ldr	r3, [r7, #4]
 801efda:	835a      	strh	r2, [r3, #26]
      if (pcb->rcv_nxt == seqno) {
 801efdc:	e17f      	b.n	801f2de <tcp_receive+0xed2>
      } else {
        /* We get here if the incoming segment is out-of-sequence. */

#if TCP_QUEUE_OOSEQ
        /* We queue the segment on the ->ooseq queue. */
        if (pcb->ooseq == NULL) {
 801efde:	687b      	ldr	r3, [r7, #4]
 801efe0:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801efe2:	2b00      	cmp	r3, #0
 801efe4:	d106      	bne.n	801eff4 <tcp_receive+0xbe8>
          pcb->ooseq = tcp_seg_copy(&inseg);
 801efe6:	4848      	ldr	r0, [pc, #288]	@ (801f108 <tcp_receive+0xcfc>)
 801efe8:	f7fd fae2 	bl	801c5b0 <tcp_seg_copy>
 801efec:	4602      	mov	r2, r0
 801efee:	687b      	ldr	r3, [r7, #4]
 801eff0:	675a      	str	r2, [r3, #116]	@ 0x74
 801eff2:	e16c      	b.n	801f2ce <tcp_receive+0xec2>
#if LWIP_TCP_SACK_OUT
          /* This is the left edge of the lowest possible SACK range.
             It may start before the newly received segment (possibly adjusted below). */
          u32_t sackbeg = TCP_SEQ_LT(seqno, pcb->ooseq->tcphdr->seqno) ? seqno : pcb->ooseq->tcphdr->seqno;
#endif /* LWIP_TCP_SACK_OUT */
          struct tcp_seg *next, *prev = NULL;
 801eff4:	2300      	movs	r3, #0
 801eff6:	637b      	str	r3, [r7, #52]	@ 0x34
          for (next = pcb->ooseq; next != NULL; next = next->next) {
 801eff8:	687b      	ldr	r3, [r7, #4]
 801effa:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801effc:	63bb      	str	r3, [r7, #56]	@ 0x38
 801effe:	e156      	b.n	801f2ae <tcp_receive+0xea2>
            if (seqno == next->tcphdr->seqno) {
 801f000:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801f002:	691b      	ldr	r3, [r3, #16]
 801f004:	685a      	ldr	r2, [r3, #4]
 801f006:	4b41      	ldr	r3, [pc, #260]	@ (801f10c <tcp_receive+0xd00>)
 801f008:	681b      	ldr	r3, [r3, #0]
 801f00a:	429a      	cmp	r2, r3
 801f00c:	d11d      	bne.n	801f04a <tcp_receive+0xc3e>
              /* The sequence number of the incoming segment is the
                 same as the sequence number of the segment on
                 ->ooseq. We check the lengths to see which one to
                 discard. */
              if (inseg.len > next->len) {
 801f00e:	4b3e      	ldr	r3, [pc, #248]	@ (801f108 <tcp_receive+0xcfc>)
 801f010:	891a      	ldrh	r2, [r3, #8]
 801f012:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801f014:	891b      	ldrh	r3, [r3, #8]
 801f016:	429a      	cmp	r2, r3
 801f018:	f240 814e 	bls.w	801f2b8 <tcp_receive+0xeac>
                /* The incoming segment is larger than the old
                   segment. We replace some segments with the new
                   one. */
                struct tcp_seg *cseg = tcp_seg_copy(&inseg);
 801f01c:	483a      	ldr	r0, [pc, #232]	@ (801f108 <tcp_receive+0xcfc>)
 801f01e:	f7fd fac7 	bl	801c5b0 <tcp_seg_copy>
 801f022:	6178      	str	r0, [r7, #20]
                if (cseg != NULL) {
 801f024:	697b      	ldr	r3, [r7, #20]
 801f026:	2b00      	cmp	r3, #0
 801f028:	f000 8148 	beq.w	801f2bc <tcp_receive+0xeb0>
                  if (prev != NULL) {
 801f02c:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 801f02e:	2b00      	cmp	r3, #0
 801f030:	d003      	beq.n	801f03a <tcp_receive+0xc2e>
                    prev->next = cseg;
 801f032:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 801f034:	697a      	ldr	r2, [r7, #20]
 801f036:	601a      	str	r2, [r3, #0]
 801f038:	e002      	b.n	801f040 <tcp_receive+0xc34>
                  } else {
                    pcb->ooseq = cseg;
 801f03a:	687b      	ldr	r3, [r7, #4]
 801f03c:	697a      	ldr	r2, [r7, #20]
 801f03e:	675a      	str	r2, [r3, #116]	@ 0x74
                  }
                  tcp_oos_insert_segment(cseg, next);
 801f040:	6bb9      	ldr	r1, [r7, #56]	@ 0x38
 801f042:	6978      	ldr	r0, [r7, #20]
 801f044:	f7ff f8de 	bl	801e204 <tcp_oos_insert_segment>
                }
                break;
 801f048:	e138      	b.n	801f2bc <tcp_receive+0xeb0>
                   segment was smaller than the old one; in either
                   case, we ditch the incoming segment. */
                break;
              }
            } else {
              if (prev == NULL) {
 801f04a:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 801f04c:	2b00      	cmp	r3, #0
 801f04e:	d117      	bne.n	801f080 <tcp_receive+0xc74>
                if (TCP_SEQ_LT(seqno, next->tcphdr->seqno)) {
 801f050:	4b2e      	ldr	r3, [pc, #184]	@ (801f10c <tcp_receive+0xd00>)
 801f052:	681a      	ldr	r2, [r3, #0]
 801f054:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801f056:	691b      	ldr	r3, [r3, #16]
 801f058:	685b      	ldr	r3, [r3, #4]
 801f05a:	1ad3      	subs	r3, r2, r3
 801f05c:	2b00      	cmp	r3, #0
 801f05e:	da57      	bge.n	801f110 <tcp_receive+0xd04>
                  /* The sequence number of the incoming segment is lower
                     than the sequence number of the first segment on the
                     queue. We put the incoming segment first on the
                     queue. */
                  struct tcp_seg *cseg = tcp_seg_copy(&inseg);
 801f060:	4829      	ldr	r0, [pc, #164]	@ (801f108 <tcp_receive+0xcfc>)
 801f062:	f7fd faa5 	bl	801c5b0 <tcp_seg_copy>
 801f066:	61b8      	str	r0, [r7, #24]
                  if (cseg != NULL) {
 801f068:	69bb      	ldr	r3, [r7, #24]
 801f06a:	2b00      	cmp	r3, #0
 801f06c:	f000 8128 	beq.w	801f2c0 <tcp_receive+0xeb4>
                    pcb->ooseq = cseg;
 801f070:	687b      	ldr	r3, [r7, #4]
 801f072:	69ba      	ldr	r2, [r7, #24]
 801f074:	675a      	str	r2, [r3, #116]	@ 0x74
                    tcp_oos_insert_segment(cseg, next);
 801f076:	6bb9      	ldr	r1, [r7, #56]	@ 0x38
 801f078:	69b8      	ldr	r0, [r7, #24]
 801f07a:	f7ff f8c3 	bl	801e204 <tcp_oos_insert_segment>
                  }
                  break;
 801f07e:	e11f      	b.n	801f2c0 <tcp_receive+0xeb4>
                }
              } else {
                /*if (TCP_SEQ_LT(prev->tcphdr->seqno, seqno) &&
                  TCP_SEQ_LT(seqno, next->tcphdr->seqno)) {*/
                if (TCP_SEQ_BETWEEN(seqno, prev->tcphdr->seqno + 1, next->tcphdr->seqno - 1)) {
 801f080:	4b22      	ldr	r3, [pc, #136]	@ (801f10c <tcp_receive+0xd00>)
 801f082:	681a      	ldr	r2, [r3, #0]
 801f084:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 801f086:	691b      	ldr	r3, [r3, #16]
 801f088:	685b      	ldr	r3, [r3, #4]
 801f08a:	1ad3      	subs	r3, r2, r3
 801f08c:	3b01      	subs	r3, #1
 801f08e:	2b00      	cmp	r3, #0
 801f090:	db3e      	blt.n	801f110 <tcp_receive+0xd04>
 801f092:	4b1e      	ldr	r3, [pc, #120]	@ (801f10c <tcp_receive+0xd00>)
 801f094:	681a      	ldr	r2, [r3, #0]
 801f096:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801f098:	691b      	ldr	r3, [r3, #16]
 801f09a:	685b      	ldr	r3, [r3, #4]
 801f09c:	1ad3      	subs	r3, r2, r3
 801f09e:	3301      	adds	r3, #1
 801f0a0:	2b00      	cmp	r3, #0
 801f0a2:	dc35      	bgt.n	801f110 <tcp_receive+0xd04>
                  /* The sequence number of the incoming segment is in
                     between the sequence numbers of the previous and
                     the next segment on ->ooseq. We trim trim the previous
                     segment, delete next segments that included in received segment
                     and trim received, if needed. */
                  struct tcp_seg *cseg = tcp_seg_copy(&inseg);
 801f0a4:	4818      	ldr	r0, [pc, #96]	@ (801f108 <tcp_receive+0xcfc>)
 801f0a6:	f7fd fa83 	bl	801c5b0 <tcp_seg_copy>
 801f0aa:	61f8      	str	r0, [r7, #28]
                  if (cseg != NULL) {
 801f0ac:	69fb      	ldr	r3, [r7, #28]
 801f0ae:	2b00      	cmp	r3, #0
 801f0b0:	f000 8108 	beq.w	801f2c4 <tcp_receive+0xeb8>
                    if (TCP_SEQ_GT(prev->tcphdr->seqno + prev->len, seqno)) {
 801f0b4:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 801f0b6:	691b      	ldr	r3, [r3, #16]
 801f0b8:	685b      	ldr	r3, [r3, #4]
 801f0ba:	6b7a      	ldr	r2, [r7, #52]	@ 0x34
 801f0bc:	8912      	ldrh	r2, [r2, #8]
 801f0be:	441a      	add	r2, r3
 801f0c0:	4b12      	ldr	r3, [pc, #72]	@ (801f10c <tcp_receive+0xd00>)
 801f0c2:	681b      	ldr	r3, [r3, #0]
 801f0c4:	1ad3      	subs	r3, r2, r3
 801f0c6:	2b00      	cmp	r3, #0
 801f0c8:	dd12      	ble.n	801f0f0 <tcp_receive+0xce4>
                      /* We need to trim the prev segment. */
                      prev->len = (u16_t)(seqno - prev->tcphdr->seqno);
 801f0ca:	4b10      	ldr	r3, [pc, #64]	@ (801f10c <tcp_receive+0xd00>)
 801f0cc:	681b      	ldr	r3, [r3, #0]
 801f0ce:	b29a      	uxth	r2, r3
 801f0d0:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 801f0d2:	691b      	ldr	r3, [r3, #16]
 801f0d4:	685b      	ldr	r3, [r3, #4]
 801f0d6:	b29b      	uxth	r3, r3
 801f0d8:	1ad3      	subs	r3, r2, r3
 801f0da:	b29a      	uxth	r2, r3
 801f0dc:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 801f0de:	811a      	strh	r2, [r3, #8]
                      pbuf_realloc(prev->p, prev->len);
 801f0e0:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 801f0e2:	685a      	ldr	r2, [r3, #4]
 801f0e4:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 801f0e6:	891b      	ldrh	r3, [r3, #8]
 801f0e8:	4619      	mov	r1, r3
 801f0ea:	4610      	mov	r0, r2
 801f0ec:	f7fb fc38 	bl	801a960 <pbuf_realloc>
                    }
                    prev->next = cseg;
 801f0f0:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 801f0f2:	69fa      	ldr	r2, [r7, #28]
 801f0f4:	601a      	str	r2, [r3, #0]
                    tcp_oos_insert_segment(cseg, next);
 801f0f6:	6bb9      	ldr	r1, [r7, #56]	@ 0x38
 801f0f8:	69f8      	ldr	r0, [r7, #28]
 801f0fa:	f7ff f883 	bl	801e204 <tcp_oos_insert_segment>
                  }
                  break;
 801f0fe:	e0e1      	b.n	801f2c4 <tcp_receive+0xeb8>
 801f100:	2402afa4 	.word	0x2402afa4
 801f104:	2402afa1 	.word	0x2402afa1
 801f108:	2402af70 	.word	0x2402af70
 801f10c:	2402af94 	.word	0x2402af94
#endif /* LWIP_TCP_SACK_OUT */

              /* We don't use 'prev' below, so let's set it to current 'next'.
                 This way even if we break the loop below, 'prev' will be pointing
                 at the segment right in front of the newly added one. */
              prev = next;
 801f110:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801f112:	637b      	str	r3, [r7, #52]	@ 0x34

              /* If the "next" segment is the last segment on the
                 ooseq queue, we add the incoming segment to the end
                 of the list. */
              if (next->next == NULL &&
 801f114:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801f116:	681b      	ldr	r3, [r3, #0]
 801f118:	2b00      	cmp	r3, #0
 801f11a:	f040 80c5 	bne.w	801f2a8 <tcp_receive+0xe9c>
                  TCP_SEQ_GT(seqno, next->tcphdr->seqno)) {
 801f11e:	4b7f      	ldr	r3, [pc, #508]	@ (801f31c <tcp_receive+0xf10>)
 801f120:	681a      	ldr	r2, [r3, #0]
 801f122:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801f124:	691b      	ldr	r3, [r3, #16]
 801f126:	685b      	ldr	r3, [r3, #4]
 801f128:	1ad3      	subs	r3, r2, r3
              if (next->next == NULL &&
 801f12a:	2b00      	cmp	r3, #0
 801f12c:	f340 80bc 	ble.w	801f2a8 <tcp_receive+0xe9c>
                if (TCPH_FLAGS(next->tcphdr) & TCP_FIN) {
 801f130:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801f132:	691b      	ldr	r3, [r3, #16]
 801f134:	899b      	ldrh	r3, [r3, #12]
 801f136:	b29b      	uxth	r3, r3
 801f138:	4618      	mov	r0, r3
 801f13a:	f7fa f8e5 	bl	8019308 <lwip_htons>
 801f13e:	4603      	mov	r3, r0
 801f140:	b2db      	uxtb	r3, r3
 801f142:	f003 0301 	and.w	r3, r3, #1
 801f146:	2b00      	cmp	r3, #0
 801f148:	f040 80be 	bne.w	801f2c8 <tcp_receive+0xebc>
                  /* segment "next" already contains all data */
                  break;
                }
                next->next = tcp_seg_copy(&inseg);
 801f14c:	4874      	ldr	r0, [pc, #464]	@ (801f320 <tcp_receive+0xf14>)
 801f14e:	f7fd fa2f 	bl	801c5b0 <tcp_seg_copy>
 801f152:	4602      	mov	r2, r0
 801f154:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801f156:	601a      	str	r2, [r3, #0]
                if (next->next != NULL) {
 801f158:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801f15a:	681b      	ldr	r3, [r3, #0]
 801f15c:	2b00      	cmp	r3, #0
 801f15e:	f000 80b5 	beq.w	801f2cc <tcp_receive+0xec0>
                  if (TCP_SEQ_GT(next->tcphdr->seqno + next->len, seqno)) {
 801f162:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801f164:	691b      	ldr	r3, [r3, #16]
 801f166:	685b      	ldr	r3, [r3, #4]
 801f168:	6bba      	ldr	r2, [r7, #56]	@ 0x38
 801f16a:	8912      	ldrh	r2, [r2, #8]
 801f16c:	441a      	add	r2, r3
 801f16e:	4b6b      	ldr	r3, [pc, #428]	@ (801f31c <tcp_receive+0xf10>)
 801f170:	681b      	ldr	r3, [r3, #0]
 801f172:	1ad3      	subs	r3, r2, r3
 801f174:	2b00      	cmp	r3, #0
 801f176:	dd12      	ble.n	801f19e <tcp_receive+0xd92>
                    /* We need to trim the last segment. */
                    next->len = (u16_t)(seqno - next->tcphdr->seqno);
 801f178:	4b68      	ldr	r3, [pc, #416]	@ (801f31c <tcp_receive+0xf10>)
 801f17a:	681b      	ldr	r3, [r3, #0]
 801f17c:	b29a      	uxth	r2, r3
 801f17e:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801f180:	691b      	ldr	r3, [r3, #16]
 801f182:	685b      	ldr	r3, [r3, #4]
 801f184:	b29b      	uxth	r3, r3
 801f186:	1ad3      	subs	r3, r2, r3
 801f188:	b29a      	uxth	r2, r3
 801f18a:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801f18c:	811a      	strh	r2, [r3, #8]
                    pbuf_realloc(next->p, next->len);
 801f18e:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801f190:	685a      	ldr	r2, [r3, #4]
 801f192:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801f194:	891b      	ldrh	r3, [r3, #8]
 801f196:	4619      	mov	r1, r3
 801f198:	4610      	mov	r0, r2
 801f19a:	f7fb fbe1 	bl	801a960 <pbuf_realloc>
                  }
                  /* check if the remote side overruns our receive window */
                  if (TCP_SEQ_GT((u32_t)tcplen + seqno, pcb->rcv_nxt + (u32_t)pcb->rcv_wnd)) {
 801f19e:	4b61      	ldr	r3, [pc, #388]	@ (801f324 <tcp_receive+0xf18>)
 801f1a0:	881b      	ldrh	r3, [r3, #0]
 801f1a2:	461a      	mov	r2, r3
 801f1a4:	4b5d      	ldr	r3, [pc, #372]	@ (801f31c <tcp_receive+0xf10>)
 801f1a6:	681b      	ldr	r3, [r3, #0]
 801f1a8:	441a      	add	r2, r3
 801f1aa:	687b      	ldr	r3, [r7, #4]
 801f1ac:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801f1ae:	6879      	ldr	r1, [r7, #4]
 801f1b0:	8d09      	ldrh	r1, [r1, #40]	@ 0x28
 801f1b2:	440b      	add	r3, r1
 801f1b4:	1ad3      	subs	r3, r2, r3
 801f1b6:	2b00      	cmp	r3, #0
 801f1b8:	f340 8088 	ble.w	801f2cc <tcp_receive+0xec0>
                    LWIP_DEBUGF(TCP_INPUT_DEBUG,
                                ("tcp_receive: other end overran receive window"
                                 "seqno %"U32_F" len %"U16_F" right edge %"U32_F"\n",
                                 seqno, tcplen, pcb->rcv_nxt + pcb->rcv_wnd));
                    if (TCPH_FLAGS(next->next->tcphdr) & TCP_FIN) {
 801f1bc:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801f1be:	681b      	ldr	r3, [r3, #0]
 801f1c0:	691b      	ldr	r3, [r3, #16]
 801f1c2:	899b      	ldrh	r3, [r3, #12]
 801f1c4:	b29b      	uxth	r3, r3
 801f1c6:	4618      	mov	r0, r3
 801f1c8:	f7fa f89e 	bl	8019308 <lwip_htons>
 801f1cc:	4603      	mov	r3, r0
 801f1ce:	b2db      	uxtb	r3, r3
 801f1d0:	f003 0301 	and.w	r3, r3, #1
 801f1d4:	2b00      	cmp	r3, #0
 801f1d6:	d021      	beq.n	801f21c <tcp_receive+0xe10>
                      /* Must remove the FIN from the header as we're trimming
                       * that byte of sequence-space from the packet */
                      TCPH_FLAGS_SET(next->next->tcphdr, TCPH_FLAGS(next->next->tcphdr) & ~TCP_FIN);
 801f1d8:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801f1da:	681b      	ldr	r3, [r3, #0]
 801f1dc:	691b      	ldr	r3, [r3, #16]
 801f1de:	899b      	ldrh	r3, [r3, #12]
 801f1e0:	b29b      	uxth	r3, r3
 801f1e2:	b21b      	sxth	r3, r3
 801f1e4:	f423 537c 	bic.w	r3, r3, #16128	@ 0x3f00
 801f1e8:	b21c      	sxth	r4, r3
 801f1ea:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801f1ec:	681b      	ldr	r3, [r3, #0]
 801f1ee:	691b      	ldr	r3, [r3, #16]
 801f1f0:	899b      	ldrh	r3, [r3, #12]
 801f1f2:	b29b      	uxth	r3, r3
 801f1f4:	4618      	mov	r0, r3
 801f1f6:	f7fa f887 	bl	8019308 <lwip_htons>
 801f1fa:	4603      	mov	r3, r0
 801f1fc:	b2db      	uxtb	r3, r3
 801f1fe:	f003 033e 	and.w	r3, r3, #62	@ 0x3e
 801f202:	b29b      	uxth	r3, r3
 801f204:	4618      	mov	r0, r3
 801f206:	f7fa f87f 	bl	8019308 <lwip_htons>
 801f20a:	4603      	mov	r3, r0
 801f20c:	b21b      	sxth	r3, r3
 801f20e:	4323      	orrs	r3, r4
 801f210:	b21a      	sxth	r2, r3
 801f212:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801f214:	681b      	ldr	r3, [r3, #0]
 801f216:	691b      	ldr	r3, [r3, #16]
 801f218:	b292      	uxth	r2, r2
 801f21a:	819a      	strh	r2, [r3, #12]
                    }
                    /* Adjust length of segment to fit in the window. */
                    next->next->len = (u16_t)(pcb->rcv_nxt + pcb->rcv_wnd - seqno);
 801f21c:	687b      	ldr	r3, [r7, #4]
 801f21e:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801f220:	b29a      	uxth	r2, r3
 801f222:	687b      	ldr	r3, [r7, #4]
 801f224:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 801f226:	4413      	add	r3, r2
 801f228:	b299      	uxth	r1, r3
 801f22a:	4b3c      	ldr	r3, [pc, #240]	@ (801f31c <tcp_receive+0xf10>)
 801f22c:	681b      	ldr	r3, [r3, #0]
 801f22e:	b29a      	uxth	r2, r3
 801f230:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801f232:	681b      	ldr	r3, [r3, #0]
 801f234:	1a8a      	subs	r2, r1, r2
 801f236:	b292      	uxth	r2, r2
 801f238:	811a      	strh	r2, [r3, #8]
                    pbuf_realloc(next->next->p, next->next->len);
 801f23a:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801f23c:	681b      	ldr	r3, [r3, #0]
 801f23e:	685a      	ldr	r2, [r3, #4]
 801f240:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801f242:	681b      	ldr	r3, [r3, #0]
 801f244:	891b      	ldrh	r3, [r3, #8]
 801f246:	4619      	mov	r1, r3
 801f248:	4610      	mov	r0, r2
 801f24a:	f7fb fb89 	bl	801a960 <pbuf_realloc>
                    tcplen = TCP_TCPLEN(next->next);
 801f24e:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801f250:	681b      	ldr	r3, [r3, #0]
 801f252:	891c      	ldrh	r4, [r3, #8]
 801f254:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801f256:	681b      	ldr	r3, [r3, #0]
 801f258:	691b      	ldr	r3, [r3, #16]
 801f25a:	899b      	ldrh	r3, [r3, #12]
 801f25c:	b29b      	uxth	r3, r3
 801f25e:	4618      	mov	r0, r3
 801f260:	f7fa f852 	bl	8019308 <lwip_htons>
 801f264:	4603      	mov	r3, r0
 801f266:	b2db      	uxtb	r3, r3
 801f268:	f003 0303 	and.w	r3, r3, #3
 801f26c:	2b00      	cmp	r3, #0
 801f26e:	d001      	beq.n	801f274 <tcp_receive+0xe68>
 801f270:	2301      	movs	r3, #1
 801f272:	e000      	b.n	801f276 <tcp_receive+0xe6a>
 801f274:	2300      	movs	r3, #0
 801f276:	4423      	add	r3, r4
 801f278:	b29a      	uxth	r2, r3
 801f27a:	4b2a      	ldr	r3, [pc, #168]	@ (801f324 <tcp_receive+0xf18>)
 801f27c:	801a      	strh	r2, [r3, #0]
                    LWIP_ASSERT("tcp_receive: segment not trimmed correctly to rcv_wnd\n",
 801f27e:	4b29      	ldr	r3, [pc, #164]	@ (801f324 <tcp_receive+0xf18>)
 801f280:	881b      	ldrh	r3, [r3, #0]
 801f282:	461a      	mov	r2, r3
 801f284:	4b25      	ldr	r3, [pc, #148]	@ (801f31c <tcp_receive+0xf10>)
 801f286:	681b      	ldr	r3, [r3, #0]
 801f288:	441a      	add	r2, r3
 801f28a:	687b      	ldr	r3, [r7, #4]
 801f28c:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801f28e:	6879      	ldr	r1, [r7, #4]
 801f290:	8d09      	ldrh	r1, [r1, #40]	@ 0x28
 801f292:	440b      	add	r3, r1
 801f294:	429a      	cmp	r2, r3
 801f296:	d019      	beq.n	801f2cc <tcp_receive+0xec0>
 801f298:	4b23      	ldr	r3, [pc, #140]	@ (801f328 <tcp_receive+0xf1c>)
 801f29a:	f44f 62df 	mov.w	r2, #1784	@ 0x6f8
 801f29e:	4923      	ldr	r1, [pc, #140]	@ (801f32c <tcp_receive+0xf20>)
 801f2a0:	4823      	ldr	r0, [pc, #140]	@ (801f330 <tcp_receive+0xf24>)
 801f2a2:	f00a ff8b 	bl	802a1bc <iprintf>
                                (seqno + tcplen) == (pcb->rcv_nxt + pcb->rcv_wnd));
                  }
                }
                break;
 801f2a6:	e011      	b.n	801f2cc <tcp_receive+0xec0>
          for (next = pcb->ooseq; next != NULL; next = next->next) {
 801f2a8:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801f2aa:	681b      	ldr	r3, [r3, #0]
 801f2ac:	63bb      	str	r3, [r7, #56]	@ 0x38
 801f2ae:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801f2b0:	2b00      	cmp	r3, #0
 801f2b2:	f47f aea5 	bne.w	801f000 <tcp_receive+0xbf4>
 801f2b6:	e00a      	b.n	801f2ce <tcp_receive+0xec2>
                break;
 801f2b8:	bf00      	nop
 801f2ba:	e008      	b.n	801f2ce <tcp_receive+0xec2>
                break;
 801f2bc:	bf00      	nop
 801f2be:	e006      	b.n	801f2ce <tcp_receive+0xec2>
                  break;
 801f2c0:	bf00      	nop
 801f2c2:	e004      	b.n	801f2ce <tcp_receive+0xec2>
                  break;
 801f2c4:	bf00      	nop
 801f2c6:	e002      	b.n	801f2ce <tcp_receive+0xec2>
                  break;
 801f2c8:	bf00      	nop
 801f2ca:	e000      	b.n	801f2ce <tcp_receive+0xec2>
                break;
 801f2cc:	bf00      	nop
#endif /* TCP_OOSEQ_BYTES_LIMIT || TCP_OOSEQ_PBUFS_LIMIT */
#endif /* TCP_QUEUE_OOSEQ */

        /* We send the ACK packet after we've (potentially) dealt with SACKs,
           so they can be included in the acknowledgment. */
        tcp_send_empty_ack(pcb);
 801f2ce:	6878      	ldr	r0, [r7, #4]
 801f2d0:	f001 fefc 	bl	80210cc <tcp_send_empty_ack>
      if (pcb->rcv_nxt == seqno) {
 801f2d4:	e003      	b.n	801f2de <tcp_receive+0xed2>
      }
    } else {
      /* The incoming segment is not within the window. */
      tcp_send_empty_ack(pcb);
 801f2d6:	6878      	ldr	r0, [r7, #4]
 801f2d8:	f001 fef8 	bl	80210cc <tcp_send_empty_ack>
    if (TCP_SEQ_BETWEEN(seqno, pcb->rcv_nxt,
 801f2dc:	e01a      	b.n	801f314 <tcp_receive+0xf08>
 801f2de:	e019      	b.n	801f314 <tcp_receive+0xf08>
    }
  } else {
    /* Segments with length 0 is taken care of here. Segments that
       fall out of the window are ACKed. */
    if (!TCP_SEQ_BETWEEN(seqno, pcb->rcv_nxt, pcb->rcv_nxt + pcb->rcv_wnd - 1)) {
 801f2e0:	4b0e      	ldr	r3, [pc, #56]	@ (801f31c <tcp_receive+0xf10>)
 801f2e2:	681a      	ldr	r2, [r3, #0]
 801f2e4:	687b      	ldr	r3, [r7, #4]
 801f2e6:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801f2e8:	1ad3      	subs	r3, r2, r3
 801f2ea:	2b00      	cmp	r3, #0
 801f2ec:	db0a      	blt.n	801f304 <tcp_receive+0xef8>
 801f2ee:	4b0b      	ldr	r3, [pc, #44]	@ (801f31c <tcp_receive+0xf10>)
 801f2f0:	681a      	ldr	r2, [r3, #0]
 801f2f2:	687b      	ldr	r3, [r7, #4]
 801f2f4:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801f2f6:	6879      	ldr	r1, [r7, #4]
 801f2f8:	8d09      	ldrh	r1, [r1, #40]	@ 0x28
 801f2fa:	440b      	add	r3, r1
 801f2fc:	1ad3      	subs	r3, r2, r3
 801f2fe:	3301      	adds	r3, #1
 801f300:	2b00      	cmp	r3, #0
 801f302:	dd07      	ble.n	801f314 <tcp_receive+0xf08>
      tcp_ack_now(pcb);
 801f304:	687b      	ldr	r3, [r7, #4]
 801f306:	8b5b      	ldrh	r3, [r3, #26]
 801f308:	f043 0302 	orr.w	r3, r3, #2
 801f30c:	b29a      	uxth	r2, r3
 801f30e:	687b      	ldr	r3, [r7, #4]
 801f310:	835a      	strh	r2, [r3, #26]
    }
  }
}
 801f312:	e7ff      	b.n	801f314 <tcp_receive+0xf08>
 801f314:	bf00      	nop
 801f316:	3750      	adds	r7, #80	@ 0x50
 801f318:	46bd      	mov	sp, r7
 801f31a:	bdb0      	pop	{r4, r5, r7, pc}
 801f31c:	2402af94 	.word	0x2402af94
 801f320:	2402af70 	.word	0x2402af70
 801f324:	2402af9e 	.word	0x2402af9e
 801f328:	0802f5a4 	.word	0x0802f5a4
 801f32c:	0802f94c 	.word	0x0802f94c
 801f330:	0802f5f0 	.word	0x0802f5f0

0801f334 <tcp_get_next_optbyte>:

static u8_t
tcp_get_next_optbyte(void)
{
 801f334:	b480      	push	{r7}
 801f336:	b083      	sub	sp, #12
 801f338:	af00      	add	r7, sp, #0
  u16_t optidx = tcp_optidx++;
 801f33a:	4b15      	ldr	r3, [pc, #84]	@ (801f390 <tcp_get_next_optbyte+0x5c>)
 801f33c:	881b      	ldrh	r3, [r3, #0]
 801f33e:	1c5a      	adds	r2, r3, #1
 801f340:	b291      	uxth	r1, r2
 801f342:	4a13      	ldr	r2, [pc, #76]	@ (801f390 <tcp_get_next_optbyte+0x5c>)
 801f344:	8011      	strh	r1, [r2, #0]
 801f346:	80fb      	strh	r3, [r7, #6]
  if ((tcphdr_opt2 == NULL) || (optidx < tcphdr_opt1len)) {
 801f348:	4b12      	ldr	r3, [pc, #72]	@ (801f394 <tcp_get_next_optbyte+0x60>)
 801f34a:	681b      	ldr	r3, [r3, #0]
 801f34c:	2b00      	cmp	r3, #0
 801f34e:	d004      	beq.n	801f35a <tcp_get_next_optbyte+0x26>
 801f350:	4b11      	ldr	r3, [pc, #68]	@ (801f398 <tcp_get_next_optbyte+0x64>)
 801f352:	881b      	ldrh	r3, [r3, #0]
 801f354:	88fa      	ldrh	r2, [r7, #6]
 801f356:	429a      	cmp	r2, r3
 801f358:	d208      	bcs.n	801f36c <tcp_get_next_optbyte+0x38>
    u8_t *opts = (u8_t *)tcphdr + TCP_HLEN;
 801f35a:	4b10      	ldr	r3, [pc, #64]	@ (801f39c <tcp_get_next_optbyte+0x68>)
 801f35c:	681b      	ldr	r3, [r3, #0]
 801f35e:	3314      	adds	r3, #20
 801f360:	603b      	str	r3, [r7, #0]
    return opts[optidx];
 801f362:	88fb      	ldrh	r3, [r7, #6]
 801f364:	683a      	ldr	r2, [r7, #0]
 801f366:	4413      	add	r3, r2
 801f368:	781b      	ldrb	r3, [r3, #0]
 801f36a:	e00b      	b.n	801f384 <tcp_get_next_optbyte+0x50>
  } else {
    u8_t idx = (u8_t)(optidx - tcphdr_opt1len);
 801f36c:	88fb      	ldrh	r3, [r7, #6]
 801f36e:	b2da      	uxtb	r2, r3
 801f370:	4b09      	ldr	r3, [pc, #36]	@ (801f398 <tcp_get_next_optbyte+0x64>)
 801f372:	881b      	ldrh	r3, [r3, #0]
 801f374:	b2db      	uxtb	r3, r3
 801f376:	1ad3      	subs	r3, r2, r3
 801f378:	717b      	strb	r3, [r7, #5]
    return tcphdr_opt2[idx];
 801f37a:	4b06      	ldr	r3, [pc, #24]	@ (801f394 <tcp_get_next_optbyte+0x60>)
 801f37c:	681a      	ldr	r2, [r3, #0]
 801f37e:	797b      	ldrb	r3, [r7, #5]
 801f380:	4413      	add	r3, r2
 801f382:	781b      	ldrb	r3, [r3, #0]
  }
}
 801f384:	4618      	mov	r0, r3
 801f386:	370c      	adds	r7, #12
 801f388:	46bd      	mov	sp, r7
 801f38a:	f85d 7b04 	ldr.w	r7, [sp], #4
 801f38e:	4770      	bx	lr
 801f390:	2402af90 	.word	0x2402af90
 801f394:	2402af8c 	.word	0x2402af8c
 801f398:	2402af8a 	.word	0x2402af8a
 801f39c:	2402af84 	.word	0x2402af84

0801f3a0 <tcp_parseopt>:
 *
 * @param pcb the tcp_pcb for which a segment arrived
 */
static void
tcp_parseopt(struct tcp_pcb *pcb)
{
 801f3a0:	b580      	push	{r7, lr}
 801f3a2:	b084      	sub	sp, #16
 801f3a4:	af00      	add	r7, sp, #0
 801f3a6:	6078      	str	r0, [r7, #4]
  u16_t mss;
#if LWIP_TCP_TIMESTAMPS
  u32_t tsval;
#endif

  LWIP_ASSERT("tcp_parseopt: invalid pcb", pcb != NULL);
 801f3a8:	687b      	ldr	r3, [r7, #4]
 801f3aa:	2b00      	cmp	r3, #0
 801f3ac:	d106      	bne.n	801f3bc <tcp_parseopt+0x1c>
 801f3ae:	4b33      	ldr	r3, [pc, #204]	@ (801f47c <tcp_parseopt+0xdc>)
 801f3b0:	f240 727d 	movw	r2, #1917	@ 0x77d
 801f3b4:	4932      	ldr	r1, [pc, #200]	@ (801f480 <tcp_parseopt+0xe0>)
 801f3b6:	4833      	ldr	r0, [pc, #204]	@ (801f484 <tcp_parseopt+0xe4>)
 801f3b8:	f00a ff00 	bl	802a1bc <iprintf>

  /* Parse the TCP MSS option, if present. */
  if (tcphdr_optlen != 0) {
 801f3bc:	4b32      	ldr	r3, [pc, #200]	@ (801f488 <tcp_parseopt+0xe8>)
 801f3be:	881b      	ldrh	r3, [r3, #0]
 801f3c0:	2b00      	cmp	r3, #0
 801f3c2:	d057      	beq.n	801f474 <tcp_parseopt+0xd4>
    for (tcp_optidx = 0; tcp_optidx < tcphdr_optlen; ) {
 801f3c4:	4b31      	ldr	r3, [pc, #196]	@ (801f48c <tcp_parseopt+0xec>)
 801f3c6:	2200      	movs	r2, #0
 801f3c8:	801a      	strh	r2, [r3, #0]
 801f3ca:	e047      	b.n	801f45c <tcp_parseopt+0xbc>
      u8_t opt = tcp_get_next_optbyte();
 801f3cc:	f7ff ffb2 	bl	801f334 <tcp_get_next_optbyte>
 801f3d0:	4603      	mov	r3, r0
 801f3d2:	73fb      	strb	r3, [r7, #15]
      switch (opt) {
 801f3d4:	7bfb      	ldrb	r3, [r7, #15]
 801f3d6:	2b02      	cmp	r3, #2
 801f3d8:	d006      	beq.n	801f3e8 <tcp_parseopt+0x48>
 801f3da:	2b02      	cmp	r3, #2
 801f3dc:	dc2b      	bgt.n	801f436 <tcp_parseopt+0x96>
 801f3de:	2b00      	cmp	r3, #0
 801f3e0:	d043      	beq.n	801f46a <tcp_parseopt+0xca>
 801f3e2:	2b01      	cmp	r3, #1
 801f3e4:	d039      	beq.n	801f45a <tcp_parseopt+0xba>
 801f3e6:	e026      	b.n	801f436 <tcp_parseopt+0x96>
          /* NOP option. */
          LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_parseopt: NOP\n"));
          break;
        case LWIP_TCP_OPT_MSS:
          LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_parseopt: MSS\n"));
          if (tcp_get_next_optbyte() != LWIP_TCP_OPT_LEN_MSS || (tcp_optidx - 2 + LWIP_TCP_OPT_LEN_MSS) > tcphdr_optlen) {
 801f3e8:	f7ff ffa4 	bl	801f334 <tcp_get_next_optbyte>
 801f3ec:	4603      	mov	r3, r0
 801f3ee:	2b04      	cmp	r3, #4
 801f3f0:	d13d      	bne.n	801f46e <tcp_parseopt+0xce>
 801f3f2:	4b26      	ldr	r3, [pc, #152]	@ (801f48c <tcp_parseopt+0xec>)
 801f3f4:	881b      	ldrh	r3, [r3, #0]
 801f3f6:	3301      	adds	r3, #1
 801f3f8:	4a23      	ldr	r2, [pc, #140]	@ (801f488 <tcp_parseopt+0xe8>)
 801f3fa:	8812      	ldrh	r2, [r2, #0]
 801f3fc:	4293      	cmp	r3, r2
 801f3fe:	da36      	bge.n	801f46e <tcp_parseopt+0xce>
            /* Bad length */
            LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_parseopt: bad length\n"));
            return;
          }
          /* An MSS option with the right option length. */
          mss = (u16_t)(tcp_get_next_optbyte() << 8);
 801f400:	f7ff ff98 	bl	801f334 <tcp_get_next_optbyte>
 801f404:	4603      	mov	r3, r0
 801f406:	021b      	lsls	r3, r3, #8
 801f408:	81bb      	strh	r3, [r7, #12]
          mss |= tcp_get_next_optbyte();
 801f40a:	f7ff ff93 	bl	801f334 <tcp_get_next_optbyte>
 801f40e:	4603      	mov	r3, r0
 801f410:	461a      	mov	r2, r3
 801f412:	89bb      	ldrh	r3, [r7, #12]
 801f414:	4313      	orrs	r3, r2
 801f416:	81bb      	strh	r3, [r7, #12]
          /* Limit the mss to the configured TCP_MSS and prevent division by zero */
          pcb->mss = ((mss > TCP_MSS) || (mss == 0)) ? TCP_MSS : mss;
 801f418:	89bb      	ldrh	r3, [r7, #12]
 801f41a:	f240 52b4 	movw	r2, #1460	@ 0x5b4
 801f41e:	4293      	cmp	r3, r2
 801f420:	d804      	bhi.n	801f42c <tcp_parseopt+0x8c>
 801f422:	89bb      	ldrh	r3, [r7, #12]
 801f424:	2b00      	cmp	r3, #0
 801f426:	d001      	beq.n	801f42c <tcp_parseopt+0x8c>
 801f428:	89ba      	ldrh	r2, [r7, #12]
 801f42a:	e001      	b.n	801f430 <tcp_parseopt+0x90>
 801f42c:	f240 52b4 	movw	r2, #1460	@ 0x5b4
 801f430:	687b      	ldr	r3, [r7, #4]
 801f432:	865a      	strh	r2, [r3, #50]	@ 0x32
          break;
 801f434:	e012      	b.n	801f45c <tcp_parseopt+0xbc>
          }
          break;
#endif /* LWIP_TCP_SACK_OUT */
        default:
          LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_parseopt: other\n"));
          data = tcp_get_next_optbyte();
 801f436:	f7ff ff7d 	bl	801f334 <tcp_get_next_optbyte>
 801f43a:	4603      	mov	r3, r0
 801f43c:	72fb      	strb	r3, [r7, #11]
          if (data < 2) {
 801f43e:	7afb      	ldrb	r3, [r7, #11]
 801f440:	2b01      	cmp	r3, #1
 801f442:	d916      	bls.n	801f472 <tcp_parseopt+0xd2>
               and we don't process them further. */
            return;
          }
          /* All other options have a length field, so that we easily
             can skip past them. */
          tcp_optidx += data - 2;
 801f444:	7afb      	ldrb	r3, [r7, #11]
 801f446:	b29a      	uxth	r2, r3
 801f448:	4b10      	ldr	r3, [pc, #64]	@ (801f48c <tcp_parseopt+0xec>)
 801f44a:	881b      	ldrh	r3, [r3, #0]
 801f44c:	4413      	add	r3, r2
 801f44e:	b29b      	uxth	r3, r3
 801f450:	3b02      	subs	r3, #2
 801f452:	b29a      	uxth	r2, r3
 801f454:	4b0d      	ldr	r3, [pc, #52]	@ (801f48c <tcp_parseopt+0xec>)
 801f456:	801a      	strh	r2, [r3, #0]
 801f458:	e000      	b.n	801f45c <tcp_parseopt+0xbc>
          break;
 801f45a:	bf00      	nop
    for (tcp_optidx = 0; tcp_optidx < tcphdr_optlen; ) {
 801f45c:	4b0b      	ldr	r3, [pc, #44]	@ (801f48c <tcp_parseopt+0xec>)
 801f45e:	881a      	ldrh	r2, [r3, #0]
 801f460:	4b09      	ldr	r3, [pc, #36]	@ (801f488 <tcp_parseopt+0xe8>)
 801f462:	881b      	ldrh	r3, [r3, #0]
 801f464:	429a      	cmp	r2, r3
 801f466:	d3b1      	bcc.n	801f3cc <tcp_parseopt+0x2c>
 801f468:	e004      	b.n	801f474 <tcp_parseopt+0xd4>
          return;
 801f46a:	bf00      	nop
 801f46c:	e002      	b.n	801f474 <tcp_parseopt+0xd4>
            return;
 801f46e:	bf00      	nop
 801f470:	e000      	b.n	801f474 <tcp_parseopt+0xd4>
            return;
 801f472:	bf00      	nop
      }
    }
  }
}
 801f474:	3710      	adds	r7, #16
 801f476:	46bd      	mov	sp, r7
 801f478:	bd80      	pop	{r7, pc}
 801f47a:	bf00      	nop
 801f47c:	0802f5a4 	.word	0x0802f5a4
 801f480:	0802fa08 	.word	0x0802fa08
 801f484:	0802f5f0 	.word	0x0802f5f0
 801f488:	2402af88 	.word	0x2402af88
 801f48c:	2402af90 	.word	0x2402af90

0801f490 <tcp_trigger_input_pcb_close>:

void
tcp_trigger_input_pcb_close(void)
{
 801f490:	b480      	push	{r7}
 801f492:	af00      	add	r7, sp, #0
  recv_flags |= TF_CLOSED;
 801f494:	4b05      	ldr	r3, [pc, #20]	@ (801f4ac <tcp_trigger_input_pcb_close+0x1c>)
 801f496:	781b      	ldrb	r3, [r3, #0]
 801f498:	f043 0310 	orr.w	r3, r3, #16
 801f49c:	b2da      	uxtb	r2, r3
 801f49e:	4b03      	ldr	r3, [pc, #12]	@ (801f4ac <tcp_trigger_input_pcb_close+0x1c>)
 801f4a0:	701a      	strb	r2, [r3, #0]
}
 801f4a2:	bf00      	nop
 801f4a4:	46bd      	mov	sp, r7
 801f4a6:	f85d 7b04 	ldr.w	r7, [sp], #4
 801f4aa:	4770      	bx	lr
 801f4ac:	2402afa1 	.word	0x2402afa1

0801f4b0 <tcp_route>:
static err_t tcp_output_segment(struct tcp_seg *seg, struct tcp_pcb *pcb, struct netif *netif);

/* tcp_route: common code that returns a fixed bound netif or calls ip_route */
static struct netif *
tcp_route(const struct tcp_pcb *pcb, const ip_addr_t *src, const ip_addr_t *dst)
{
 801f4b0:	b580      	push	{r7, lr}
 801f4b2:	b084      	sub	sp, #16
 801f4b4:	af00      	add	r7, sp, #0
 801f4b6:	60f8      	str	r0, [r7, #12]
 801f4b8:	60b9      	str	r1, [r7, #8]
 801f4ba:	607a      	str	r2, [r7, #4]
  LWIP_UNUSED_ARG(src); /* in case IPv4-only and source-based routing is disabled */

  if ((pcb != NULL) && (pcb->netif_idx != NETIF_NO_INDEX)) {
 801f4bc:	68fb      	ldr	r3, [r7, #12]
 801f4be:	2b00      	cmp	r3, #0
 801f4c0:	d00a      	beq.n	801f4d8 <tcp_route+0x28>
 801f4c2:	68fb      	ldr	r3, [r7, #12]
 801f4c4:	7a1b      	ldrb	r3, [r3, #8]
 801f4c6:	2b00      	cmp	r3, #0
 801f4c8:	d006      	beq.n	801f4d8 <tcp_route+0x28>
    return netif_get_by_index(pcb->netif_idx);
 801f4ca:	68fb      	ldr	r3, [r7, #12]
 801f4cc:	7a1b      	ldrb	r3, [r3, #8]
 801f4ce:	4618      	mov	r0, r3
 801f4d0:	f7fb f83c 	bl	801a54c <netif_get_by_index>
 801f4d4:	4603      	mov	r3, r0
 801f4d6:	e003      	b.n	801f4e0 <tcp_route+0x30>
  } else {
    return ip_route(src, dst);
 801f4d8:	6878      	ldr	r0, [r7, #4]
 801f4da:	f005 fe61 	bl	80251a0 <ip4_route>
 801f4de:	4603      	mov	r3, r0
  }
}
 801f4e0:	4618      	mov	r0, r3
 801f4e2:	3710      	adds	r7, #16
 801f4e4:	46bd      	mov	sp, r7
 801f4e6:	bd80      	pop	{r7, pc}

0801f4e8 <tcp_create_segment>:
 * The TCP header is filled in except ackno and wnd.
 * p is freed on failure.
 */
static struct tcp_seg *
tcp_create_segment(const struct tcp_pcb *pcb, struct pbuf *p, u8_t hdrflags, u32_t seqno, u8_t optflags)
{
 801f4e8:	b590      	push	{r4, r7, lr}
 801f4ea:	b087      	sub	sp, #28
 801f4ec:	af00      	add	r7, sp, #0
 801f4ee:	60f8      	str	r0, [r7, #12]
 801f4f0:	60b9      	str	r1, [r7, #8]
 801f4f2:	603b      	str	r3, [r7, #0]
 801f4f4:	4613      	mov	r3, r2
 801f4f6:	71fb      	strb	r3, [r7, #7]
  struct tcp_seg *seg;
  u8_t optlen;

  LWIP_ASSERT("tcp_create_segment: invalid pcb", pcb != NULL);
 801f4f8:	68fb      	ldr	r3, [r7, #12]
 801f4fa:	2b00      	cmp	r3, #0
 801f4fc:	d105      	bne.n	801f50a <tcp_create_segment+0x22>
 801f4fe:	4b45      	ldr	r3, [pc, #276]	@ (801f614 <tcp_create_segment+0x12c>)
 801f500:	22a3      	movs	r2, #163	@ 0xa3
 801f502:	4945      	ldr	r1, [pc, #276]	@ (801f618 <tcp_create_segment+0x130>)
 801f504:	4845      	ldr	r0, [pc, #276]	@ (801f61c <tcp_create_segment+0x134>)
 801f506:	f00a fe59 	bl	802a1bc <iprintf>
  LWIP_ASSERT("tcp_create_segment: invalid pbuf", p != NULL);
 801f50a:	68bb      	ldr	r3, [r7, #8]
 801f50c:	2b00      	cmp	r3, #0
 801f50e:	d105      	bne.n	801f51c <tcp_create_segment+0x34>
 801f510:	4b40      	ldr	r3, [pc, #256]	@ (801f614 <tcp_create_segment+0x12c>)
 801f512:	22a4      	movs	r2, #164	@ 0xa4
 801f514:	4942      	ldr	r1, [pc, #264]	@ (801f620 <tcp_create_segment+0x138>)
 801f516:	4841      	ldr	r0, [pc, #260]	@ (801f61c <tcp_create_segment+0x134>)
 801f518:	f00a fe50 	bl	802a1bc <iprintf>

  optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(optflags, pcb);
 801f51c:	f897 3028 	ldrb.w	r3, [r7, #40]	@ 0x28
 801f520:	009b      	lsls	r3, r3, #2
 801f522:	b2db      	uxtb	r3, r3
 801f524:	f003 0304 	and.w	r3, r3, #4
 801f528:	75fb      	strb	r3, [r7, #23]

  if ((seg = (struct tcp_seg *)memp_malloc(MEMP_TCP_SEG)) == NULL) {
 801f52a:	2003      	movs	r0, #3
 801f52c:	f7fa fc6a 	bl	8019e04 <memp_malloc>
 801f530:	6138      	str	r0, [r7, #16]
 801f532:	693b      	ldr	r3, [r7, #16]
 801f534:	2b00      	cmp	r3, #0
 801f536:	d104      	bne.n	801f542 <tcp_create_segment+0x5a>
    LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("tcp_create_segment: no memory.\n"));
    pbuf_free(p);
 801f538:	68b8      	ldr	r0, [r7, #8]
 801f53a:	f7fb fbc7 	bl	801accc <pbuf_free>
    return NULL;
 801f53e:	2300      	movs	r3, #0
 801f540:	e063      	b.n	801f60a <tcp_create_segment+0x122>
  }
  seg->flags = optflags;
 801f542:	693b      	ldr	r3, [r7, #16]
 801f544:	f897 2028 	ldrb.w	r2, [r7, #40]	@ 0x28
 801f548:	731a      	strb	r2, [r3, #12]
  seg->next = NULL;
 801f54a:	693b      	ldr	r3, [r7, #16]
 801f54c:	2200      	movs	r2, #0
 801f54e:	601a      	str	r2, [r3, #0]
  seg->p = p;
 801f550:	693b      	ldr	r3, [r7, #16]
 801f552:	68ba      	ldr	r2, [r7, #8]
 801f554:	605a      	str	r2, [r3, #4]
  LWIP_ASSERT("p->tot_len >= optlen", p->tot_len >= optlen);
 801f556:	68bb      	ldr	r3, [r7, #8]
 801f558:	891a      	ldrh	r2, [r3, #8]
 801f55a:	7dfb      	ldrb	r3, [r7, #23]
 801f55c:	b29b      	uxth	r3, r3
 801f55e:	429a      	cmp	r2, r3
 801f560:	d205      	bcs.n	801f56e <tcp_create_segment+0x86>
 801f562:	4b2c      	ldr	r3, [pc, #176]	@ (801f614 <tcp_create_segment+0x12c>)
 801f564:	22b0      	movs	r2, #176	@ 0xb0
 801f566:	492f      	ldr	r1, [pc, #188]	@ (801f624 <tcp_create_segment+0x13c>)
 801f568:	482c      	ldr	r0, [pc, #176]	@ (801f61c <tcp_create_segment+0x134>)
 801f56a:	f00a fe27 	bl	802a1bc <iprintf>
  seg->len = p->tot_len - optlen;
 801f56e:	68bb      	ldr	r3, [r7, #8]
 801f570:	891a      	ldrh	r2, [r3, #8]
 801f572:	7dfb      	ldrb	r3, [r7, #23]
 801f574:	b29b      	uxth	r3, r3
 801f576:	1ad3      	subs	r3, r2, r3
 801f578:	b29a      	uxth	r2, r3
 801f57a:	693b      	ldr	r3, [r7, #16]
 801f57c:	811a      	strh	r2, [r3, #8]
#if TCP_OVERSIZE_DBGCHECK
  seg->oversize_left = 0;
 801f57e:	693b      	ldr	r3, [r7, #16]
 801f580:	2200      	movs	r2, #0
 801f582:	815a      	strh	r2, [r3, #10]
  LWIP_ASSERT("invalid optflags passed: TF_SEG_DATA_CHECKSUMMED",
              (optflags & TF_SEG_DATA_CHECKSUMMED) == 0);
#endif /* TCP_CHECKSUM_ON_COPY */

  /* build TCP header */
  if (pbuf_add_header(p, TCP_HLEN)) {
 801f584:	2114      	movs	r1, #20
 801f586:	68b8      	ldr	r0, [r7, #8]
 801f588:	f7fb fad8 	bl	801ab3c <pbuf_add_header>
 801f58c:	4603      	mov	r3, r0
 801f58e:	2b00      	cmp	r3, #0
 801f590:	d004      	beq.n	801f59c <tcp_create_segment+0xb4>
    LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("tcp_create_segment: no room for TCP header in pbuf.\n"));
    TCP_STATS_INC(tcp.err);
    tcp_seg_free(seg);
 801f592:	6938      	ldr	r0, [r7, #16]
 801f594:	f7fc fff3 	bl	801c57e <tcp_seg_free>
    return NULL;
 801f598:	2300      	movs	r3, #0
 801f59a:	e036      	b.n	801f60a <tcp_create_segment+0x122>
  }
  seg->tcphdr = (struct tcp_hdr *)seg->p->payload;
 801f59c:	693b      	ldr	r3, [r7, #16]
 801f59e:	685b      	ldr	r3, [r3, #4]
 801f5a0:	685a      	ldr	r2, [r3, #4]
 801f5a2:	693b      	ldr	r3, [r7, #16]
 801f5a4:	611a      	str	r2, [r3, #16]
  seg->tcphdr->src = lwip_htons(pcb->local_port);
 801f5a6:	68fb      	ldr	r3, [r7, #12]
 801f5a8:	8ada      	ldrh	r2, [r3, #22]
 801f5aa:	693b      	ldr	r3, [r7, #16]
 801f5ac:	691c      	ldr	r4, [r3, #16]
 801f5ae:	4610      	mov	r0, r2
 801f5b0:	f7f9 feaa 	bl	8019308 <lwip_htons>
 801f5b4:	4603      	mov	r3, r0
 801f5b6:	8023      	strh	r3, [r4, #0]
  seg->tcphdr->dest = lwip_htons(pcb->remote_port);
 801f5b8:	68fb      	ldr	r3, [r7, #12]
 801f5ba:	8b1a      	ldrh	r2, [r3, #24]
 801f5bc:	693b      	ldr	r3, [r7, #16]
 801f5be:	691c      	ldr	r4, [r3, #16]
 801f5c0:	4610      	mov	r0, r2
 801f5c2:	f7f9 fea1 	bl	8019308 <lwip_htons>
 801f5c6:	4603      	mov	r3, r0
 801f5c8:	8063      	strh	r3, [r4, #2]
  seg->tcphdr->seqno = lwip_htonl(seqno);
 801f5ca:	693b      	ldr	r3, [r7, #16]
 801f5cc:	691c      	ldr	r4, [r3, #16]
 801f5ce:	6838      	ldr	r0, [r7, #0]
 801f5d0:	f7f9 feaf 	bl	8019332 <lwip_htonl>
 801f5d4:	4603      	mov	r3, r0
 801f5d6:	6063      	str	r3, [r4, #4]
  /* ackno is set in tcp_output */
  TCPH_HDRLEN_FLAGS_SET(seg->tcphdr, (5 + optlen / 4), hdrflags);
 801f5d8:	7dfb      	ldrb	r3, [r7, #23]
 801f5da:	089b      	lsrs	r3, r3, #2
 801f5dc:	b2db      	uxtb	r3, r3
 801f5de:	3305      	adds	r3, #5
 801f5e0:	b29b      	uxth	r3, r3
 801f5e2:	031b      	lsls	r3, r3, #12
 801f5e4:	b29a      	uxth	r2, r3
 801f5e6:	79fb      	ldrb	r3, [r7, #7]
 801f5e8:	b29b      	uxth	r3, r3
 801f5ea:	4313      	orrs	r3, r2
 801f5ec:	b29a      	uxth	r2, r3
 801f5ee:	693b      	ldr	r3, [r7, #16]
 801f5f0:	691c      	ldr	r4, [r3, #16]
 801f5f2:	4610      	mov	r0, r2
 801f5f4:	f7f9 fe88 	bl	8019308 <lwip_htons>
 801f5f8:	4603      	mov	r3, r0
 801f5fa:	81a3      	strh	r3, [r4, #12]
  /* wnd and chksum are set in tcp_output */
  seg->tcphdr->urgp = 0;
 801f5fc:	693b      	ldr	r3, [r7, #16]
 801f5fe:	691b      	ldr	r3, [r3, #16]
 801f600:	2200      	movs	r2, #0
 801f602:	749a      	strb	r2, [r3, #18]
 801f604:	2200      	movs	r2, #0
 801f606:	74da      	strb	r2, [r3, #19]
  return seg;
 801f608:	693b      	ldr	r3, [r7, #16]
}
 801f60a:	4618      	mov	r0, r3
 801f60c:	371c      	adds	r7, #28
 801f60e:	46bd      	mov	sp, r7
 801f610:	bd90      	pop	{r4, r7, pc}
 801f612:	bf00      	nop
 801f614:	0802fa24 	.word	0x0802fa24
 801f618:	0802fa58 	.word	0x0802fa58
 801f61c:	0802fa78 	.word	0x0802fa78
 801f620:	0802faa0 	.word	0x0802faa0
 801f624:	0802fac4 	.word	0x0802fac4

0801f628 <tcp_pbuf_prealloc>:
#if TCP_OVERSIZE
static struct pbuf *
tcp_pbuf_prealloc(pbuf_layer layer, u16_t length, u16_t max_length,
                  u16_t *oversize, const struct tcp_pcb *pcb, u8_t apiflags,
                  u8_t first_seg)
{
 801f628:	b580      	push	{r7, lr}
 801f62a:	b086      	sub	sp, #24
 801f62c:	af00      	add	r7, sp, #0
 801f62e:	607b      	str	r3, [r7, #4]
 801f630:	4603      	mov	r3, r0
 801f632:	73fb      	strb	r3, [r7, #15]
 801f634:	460b      	mov	r3, r1
 801f636:	81bb      	strh	r3, [r7, #12]
 801f638:	4613      	mov	r3, r2
 801f63a:	817b      	strh	r3, [r7, #10]
  struct pbuf *p;
  u16_t alloc = length;
 801f63c:	89bb      	ldrh	r3, [r7, #12]
 801f63e:	82fb      	strh	r3, [r7, #22]

  LWIP_ASSERT("tcp_pbuf_prealloc: invalid oversize", oversize != NULL);
 801f640:	687b      	ldr	r3, [r7, #4]
 801f642:	2b00      	cmp	r3, #0
 801f644:	d105      	bne.n	801f652 <tcp_pbuf_prealloc+0x2a>
 801f646:	4b30      	ldr	r3, [pc, #192]	@ (801f708 <tcp_pbuf_prealloc+0xe0>)
 801f648:	22e8      	movs	r2, #232	@ 0xe8
 801f64a:	4930      	ldr	r1, [pc, #192]	@ (801f70c <tcp_pbuf_prealloc+0xe4>)
 801f64c:	4830      	ldr	r0, [pc, #192]	@ (801f710 <tcp_pbuf_prealloc+0xe8>)
 801f64e:	f00a fdb5 	bl	802a1bc <iprintf>
  LWIP_ASSERT("tcp_pbuf_prealloc: invalid pcb", pcb != NULL);
 801f652:	6a3b      	ldr	r3, [r7, #32]
 801f654:	2b00      	cmp	r3, #0
 801f656:	d105      	bne.n	801f664 <tcp_pbuf_prealloc+0x3c>
 801f658:	4b2b      	ldr	r3, [pc, #172]	@ (801f708 <tcp_pbuf_prealloc+0xe0>)
 801f65a:	22e9      	movs	r2, #233	@ 0xe9
 801f65c:	492d      	ldr	r1, [pc, #180]	@ (801f714 <tcp_pbuf_prealloc+0xec>)
 801f65e:	482c      	ldr	r0, [pc, #176]	@ (801f710 <tcp_pbuf_prealloc+0xe8>)
 801f660:	f00a fdac 	bl	802a1bc <iprintf>
  LWIP_UNUSED_ARG(pcb);
  LWIP_UNUSED_ARG(apiflags);
  LWIP_UNUSED_ARG(first_seg);
  alloc = max_length;
#else /* LWIP_NETIF_TX_SINGLE_PBUF */
  if (length < max_length) {
 801f664:	89ba      	ldrh	r2, [r7, #12]
 801f666:	897b      	ldrh	r3, [r7, #10]
 801f668:	429a      	cmp	r2, r3
 801f66a:	d221      	bcs.n	801f6b0 <tcp_pbuf_prealloc+0x88>
     *
     * Did the user set TCP_WRITE_FLAG_MORE?
     *
     * Will the Nagle algorithm defer transmission of this segment?
     */
    if ((apiflags & TCP_WRITE_FLAG_MORE) ||
 801f66c:	f897 3024 	ldrb.w	r3, [r7, #36]	@ 0x24
 801f670:	f003 0302 	and.w	r3, r3, #2
 801f674:	2b00      	cmp	r3, #0
 801f676:	d111      	bne.n	801f69c <tcp_pbuf_prealloc+0x74>
        (!(pcb->flags & TF_NODELAY) &&
 801f678:	6a3b      	ldr	r3, [r7, #32]
 801f67a:	8b5b      	ldrh	r3, [r3, #26]
 801f67c:	f003 0340 	and.w	r3, r3, #64	@ 0x40
    if ((apiflags & TCP_WRITE_FLAG_MORE) ||
 801f680:	2b00      	cmp	r3, #0
 801f682:	d115      	bne.n	801f6b0 <tcp_pbuf_prealloc+0x88>
        (!(pcb->flags & TF_NODELAY) &&
 801f684:	f897 3028 	ldrb.w	r3, [r7, #40]	@ 0x28
 801f688:	2b00      	cmp	r3, #0
 801f68a:	d007      	beq.n	801f69c <tcp_pbuf_prealloc+0x74>
         (!first_seg ||
          pcb->unsent != NULL ||
 801f68c:	6a3b      	ldr	r3, [r7, #32]
 801f68e:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
         (!first_seg ||
 801f690:	2b00      	cmp	r3, #0
 801f692:	d103      	bne.n	801f69c <tcp_pbuf_prealloc+0x74>
          pcb->unacked != NULL))) {
 801f694:	6a3b      	ldr	r3, [r7, #32]
 801f696:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
          pcb->unsent != NULL ||
 801f698:	2b00      	cmp	r3, #0
 801f69a:	d009      	beq.n	801f6b0 <tcp_pbuf_prealloc+0x88>
      alloc = LWIP_MIN(max_length, LWIP_MEM_ALIGN_SIZE(TCP_OVERSIZE_CALC_LENGTH(length)));
 801f69c:	89bb      	ldrh	r3, [r7, #12]
 801f69e:	f203 53b7 	addw	r3, r3, #1463	@ 0x5b7
 801f6a2:	f023 0203 	bic.w	r2, r3, #3
 801f6a6:	897b      	ldrh	r3, [r7, #10]
 801f6a8:	4293      	cmp	r3, r2
 801f6aa:	bf28      	it	cs
 801f6ac:	4613      	movcs	r3, r2
 801f6ae:	82fb      	strh	r3, [r7, #22]
    }
  }
#endif /* LWIP_NETIF_TX_SINGLE_PBUF */
  p = pbuf_alloc(layer, alloc, PBUF_RAM);
 801f6b0:	8af9      	ldrh	r1, [r7, #22]
 801f6b2:	7bfb      	ldrb	r3, [r7, #15]
 801f6b4:	f44f 7220 	mov.w	r2, #640	@ 0x280
 801f6b8:	4618      	mov	r0, r3
 801f6ba:	f7fa fff1 	bl	801a6a0 <pbuf_alloc>
 801f6be:	6138      	str	r0, [r7, #16]
  if (p == NULL) {
 801f6c0:	693b      	ldr	r3, [r7, #16]
 801f6c2:	2b00      	cmp	r3, #0
 801f6c4:	d101      	bne.n	801f6ca <tcp_pbuf_prealloc+0xa2>
    return NULL;
 801f6c6:	2300      	movs	r3, #0
 801f6c8:	e019      	b.n	801f6fe <tcp_pbuf_prealloc+0xd6>
  }
  LWIP_ASSERT("need unchained pbuf", p->next == NULL);
 801f6ca:	693b      	ldr	r3, [r7, #16]
 801f6cc:	681b      	ldr	r3, [r3, #0]
 801f6ce:	2b00      	cmp	r3, #0
 801f6d0:	d006      	beq.n	801f6e0 <tcp_pbuf_prealloc+0xb8>
 801f6d2:	4b0d      	ldr	r3, [pc, #52]	@ (801f708 <tcp_pbuf_prealloc+0xe0>)
 801f6d4:	f240 120b 	movw	r2, #267	@ 0x10b
 801f6d8:	490f      	ldr	r1, [pc, #60]	@ (801f718 <tcp_pbuf_prealloc+0xf0>)
 801f6da:	480d      	ldr	r0, [pc, #52]	@ (801f710 <tcp_pbuf_prealloc+0xe8>)
 801f6dc:	f00a fd6e 	bl	802a1bc <iprintf>
  *oversize = p->len - length;
 801f6e0:	693b      	ldr	r3, [r7, #16]
 801f6e2:	895a      	ldrh	r2, [r3, #10]
 801f6e4:	89bb      	ldrh	r3, [r7, #12]
 801f6e6:	1ad3      	subs	r3, r2, r3
 801f6e8:	b29a      	uxth	r2, r3
 801f6ea:	687b      	ldr	r3, [r7, #4]
 801f6ec:	801a      	strh	r2, [r3, #0]
  /* trim p->len to the currently used size */
  p->len = p->tot_len = length;
 801f6ee:	693b      	ldr	r3, [r7, #16]
 801f6f0:	89ba      	ldrh	r2, [r7, #12]
 801f6f2:	811a      	strh	r2, [r3, #8]
 801f6f4:	693b      	ldr	r3, [r7, #16]
 801f6f6:	891a      	ldrh	r2, [r3, #8]
 801f6f8:	693b      	ldr	r3, [r7, #16]
 801f6fa:	815a      	strh	r2, [r3, #10]
  return p;
 801f6fc:	693b      	ldr	r3, [r7, #16]
}
 801f6fe:	4618      	mov	r0, r3
 801f700:	3718      	adds	r7, #24
 801f702:	46bd      	mov	sp, r7
 801f704:	bd80      	pop	{r7, pc}
 801f706:	bf00      	nop
 801f708:	0802fa24 	.word	0x0802fa24
 801f70c:	0802fadc 	.word	0x0802fadc
 801f710:	0802fa78 	.word	0x0802fa78
 801f714:	0802fb00 	.word	0x0802fb00
 801f718:	0802fb20 	.word	0x0802fb20

0801f71c <tcp_write_checks>:
 * @param len length of data to send (checked agains snd_buf)
 * @return ERR_OK if tcp_write is allowed to proceed, another err_t otherwise
 */
static err_t
tcp_write_checks(struct tcp_pcb *pcb, u16_t len)
{
 801f71c:	b580      	push	{r7, lr}
 801f71e:	b082      	sub	sp, #8
 801f720:	af00      	add	r7, sp, #0
 801f722:	6078      	str	r0, [r7, #4]
 801f724:	460b      	mov	r3, r1
 801f726:	807b      	strh	r3, [r7, #2]
  LWIP_ASSERT("tcp_write_checks: invalid pcb", pcb != NULL);
 801f728:	687b      	ldr	r3, [r7, #4]
 801f72a:	2b00      	cmp	r3, #0
 801f72c:	d106      	bne.n	801f73c <tcp_write_checks+0x20>
 801f72e:	4b33      	ldr	r3, [pc, #204]	@ (801f7fc <tcp_write_checks+0xe0>)
 801f730:	f240 1233 	movw	r2, #307	@ 0x133
 801f734:	4932      	ldr	r1, [pc, #200]	@ (801f800 <tcp_write_checks+0xe4>)
 801f736:	4833      	ldr	r0, [pc, #204]	@ (801f804 <tcp_write_checks+0xe8>)
 801f738:	f00a fd40 	bl	802a1bc <iprintf>

  /* connection is in invalid state for data transmission? */
  if ((pcb->state != ESTABLISHED) &&
 801f73c:	687b      	ldr	r3, [r7, #4]
 801f73e:	7d1b      	ldrb	r3, [r3, #20]
 801f740:	2b04      	cmp	r3, #4
 801f742:	d00e      	beq.n	801f762 <tcp_write_checks+0x46>
      (pcb->state != CLOSE_WAIT) &&
 801f744:	687b      	ldr	r3, [r7, #4]
 801f746:	7d1b      	ldrb	r3, [r3, #20]
  if ((pcb->state != ESTABLISHED) &&
 801f748:	2b07      	cmp	r3, #7
 801f74a:	d00a      	beq.n	801f762 <tcp_write_checks+0x46>
      (pcb->state != SYN_SENT) &&
 801f74c:	687b      	ldr	r3, [r7, #4]
 801f74e:	7d1b      	ldrb	r3, [r3, #20]
      (pcb->state != CLOSE_WAIT) &&
 801f750:	2b02      	cmp	r3, #2
 801f752:	d006      	beq.n	801f762 <tcp_write_checks+0x46>
      (pcb->state != SYN_RCVD)) {
 801f754:	687b      	ldr	r3, [r7, #4]
 801f756:	7d1b      	ldrb	r3, [r3, #20]
      (pcb->state != SYN_SENT) &&
 801f758:	2b03      	cmp	r3, #3
 801f75a:	d002      	beq.n	801f762 <tcp_write_checks+0x46>
    LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_STATE | LWIP_DBG_LEVEL_SEVERE, ("tcp_write() called in invalid state\n"));
    return ERR_CONN;
 801f75c:	f06f 030a 	mvn.w	r3, #10
 801f760:	e048      	b.n	801f7f4 <tcp_write_checks+0xd8>
  } else if (len == 0) {
 801f762:	887b      	ldrh	r3, [r7, #2]
 801f764:	2b00      	cmp	r3, #0
 801f766:	d101      	bne.n	801f76c <tcp_write_checks+0x50>
    return ERR_OK;
 801f768:	2300      	movs	r3, #0
 801f76a:	e043      	b.n	801f7f4 <tcp_write_checks+0xd8>
  }

  /* fail on too much data */
  if (len > pcb->snd_buf) {
 801f76c:	687b      	ldr	r3, [r7, #4]
 801f76e:	f8b3 3064 	ldrh.w	r3, [r3, #100]	@ 0x64
 801f772:	887a      	ldrh	r2, [r7, #2]
 801f774:	429a      	cmp	r2, r3
 801f776:	d909      	bls.n	801f78c <tcp_write_checks+0x70>
    LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SEVERE, ("tcp_write: too much data (len=%"U16_F" > snd_buf=%"TCPWNDSIZE_F")\n",
                len, pcb->snd_buf));
    tcp_set_flags(pcb, TF_NAGLEMEMERR);
 801f778:	687b      	ldr	r3, [r7, #4]
 801f77a:	8b5b      	ldrh	r3, [r3, #26]
 801f77c:	f043 0380 	orr.w	r3, r3, #128	@ 0x80
 801f780:	b29a      	uxth	r2, r3
 801f782:	687b      	ldr	r3, [r7, #4]
 801f784:	835a      	strh	r2, [r3, #26]
    return ERR_MEM;
 801f786:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 801f78a:	e033      	b.n	801f7f4 <tcp_write_checks+0xd8>
  LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_write: queuelen: %"TCPWNDSIZE_F"\n", (tcpwnd_size_t)pcb->snd_queuelen));

  /* If total number of pbufs on the unsent/unacked queues exceeds the
   * configured maximum, return an error */
  /* check for configured max queuelen and possible overflow */
  if (pcb->snd_queuelen >= LWIP_MIN(TCP_SND_QUEUELEN, (TCP_SNDQUEUELEN_OVERFLOW + 1))) {
 801f78c:	687b      	ldr	r3, [r7, #4]
 801f78e:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 801f792:	2b0f      	cmp	r3, #15
 801f794:	d909      	bls.n	801f7aa <tcp_write_checks+0x8e>
    LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SEVERE, ("tcp_write: too long queue %"U16_F" (max %"U16_F")\n",
                pcb->snd_queuelen, (u16_t)TCP_SND_QUEUELEN));
    TCP_STATS_INC(tcp.memerr);
    tcp_set_flags(pcb, TF_NAGLEMEMERR);
 801f796:	687b      	ldr	r3, [r7, #4]
 801f798:	8b5b      	ldrh	r3, [r3, #26]
 801f79a:	f043 0380 	orr.w	r3, r3, #128	@ 0x80
 801f79e:	b29a      	uxth	r2, r3
 801f7a0:	687b      	ldr	r3, [r7, #4]
 801f7a2:	835a      	strh	r2, [r3, #26]
    return ERR_MEM;
 801f7a4:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 801f7a8:	e024      	b.n	801f7f4 <tcp_write_checks+0xd8>
  }
  if (pcb->snd_queuelen != 0) {
 801f7aa:	687b      	ldr	r3, [r7, #4]
 801f7ac:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 801f7b0:	2b00      	cmp	r3, #0
 801f7b2:	d00f      	beq.n	801f7d4 <tcp_write_checks+0xb8>
    LWIP_ASSERT("tcp_write: pbufs on queue => at least one queue non-empty",
 801f7b4:	687b      	ldr	r3, [r7, #4]
 801f7b6:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801f7b8:	2b00      	cmp	r3, #0
 801f7ba:	d11a      	bne.n	801f7f2 <tcp_write_checks+0xd6>
 801f7bc:	687b      	ldr	r3, [r7, #4]
 801f7be:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801f7c0:	2b00      	cmp	r3, #0
 801f7c2:	d116      	bne.n	801f7f2 <tcp_write_checks+0xd6>
 801f7c4:	4b0d      	ldr	r3, [pc, #52]	@ (801f7fc <tcp_write_checks+0xe0>)
 801f7c6:	f240 1255 	movw	r2, #341	@ 0x155
 801f7ca:	490f      	ldr	r1, [pc, #60]	@ (801f808 <tcp_write_checks+0xec>)
 801f7cc:	480d      	ldr	r0, [pc, #52]	@ (801f804 <tcp_write_checks+0xe8>)
 801f7ce:	f00a fcf5 	bl	802a1bc <iprintf>
 801f7d2:	e00e      	b.n	801f7f2 <tcp_write_checks+0xd6>
                pcb->unacked != NULL || pcb->unsent != NULL);
  } else {
    LWIP_ASSERT("tcp_write: no pbufs on queue => both queues empty",
 801f7d4:	687b      	ldr	r3, [r7, #4]
 801f7d6:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801f7d8:	2b00      	cmp	r3, #0
 801f7da:	d103      	bne.n	801f7e4 <tcp_write_checks+0xc8>
 801f7dc:	687b      	ldr	r3, [r7, #4]
 801f7de:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801f7e0:	2b00      	cmp	r3, #0
 801f7e2:	d006      	beq.n	801f7f2 <tcp_write_checks+0xd6>
 801f7e4:	4b05      	ldr	r3, [pc, #20]	@ (801f7fc <tcp_write_checks+0xe0>)
 801f7e6:	f44f 72ac 	mov.w	r2, #344	@ 0x158
 801f7ea:	4908      	ldr	r1, [pc, #32]	@ (801f80c <tcp_write_checks+0xf0>)
 801f7ec:	4805      	ldr	r0, [pc, #20]	@ (801f804 <tcp_write_checks+0xe8>)
 801f7ee:	f00a fce5 	bl	802a1bc <iprintf>
                pcb->unacked == NULL && pcb->unsent == NULL);
  }
  return ERR_OK;
 801f7f2:	2300      	movs	r3, #0
}
 801f7f4:	4618      	mov	r0, r3
 801f7f6:	3708      	adds	r7, #8
 801f7f8:	46bd      	mov	sp, r7
 801f7fa:	bd80      	pop	{r7, pc}
 801f7fc:	0802fa24 	.word	0x0802fa24
 801f800:	0802fb34 	.word	0x0802fb34
 801f804:	0802fa78 	.word	0x0802fa78
 801f808:	0802fb54 	.word	0x0802fb54
 801f80c:	0802fb90 	.word	0x0802fb90

0801f810 <tcp_write>:
 * - TCP_WRITE_FLAG_MORE (0x02) for TCP connection, PSH flag will not be set on last segment sent,
 * @return ERR_OK if enqueued, another err_t on error
 */
err_t
tcp_write(struct tcp_pcb *pcb, const void *arg, u16_t len, u8_t apiflags)
{
 801f810:	b590      	push	{r4, r7, lr}
 801f812:	b09d      	sub	sp, #116	@ 0x74
 801f814:	af04      	add	r7, sp, #16
 801f816:	60f8      	str	r0, [r7, #12]
 801f818:	60b9      	str	r1, [r7, #8]
 801f81a:	4611      	mov	r1, r2
 801f81c:	461a      	mov	r2, r3
 801f81e:	460b      	mov	r3, r1
 801f820:	80fb      	strh	r3, [r7, #6]
 801f822:	4613      	mov	r3, r2
 801f824:	717b      	strb	r3, [r7, #5]
  struct pbuf *concat_p = NULL;
 801f826:	2300      	movs	r3, #0
 801f828:	63fb      	str	r3, [r7, #60]	@ 0x3c
  struct tcp_seg *last_unsent = NULL, *seg = NULL, *prev_seg = NULL, *queue = NULL;
 801f82a:	2300      	movs	r3, #0
 801f82c:	643b      	str	r3, [r7, #64]	@ 0x40
 801f82e:	2300      	movs	r3, #0
 801f830:	657b      	str	r3, [r7, #84]	@ 0x54
 801f832:	2300      	movs	r3, #0
 801f834:	653b      	str	r3, [r7, #80]	@ 0x50
 801f836:	2300      	movs	r3, #0
 801f838:	64fb      	str	r3, [r7, #76]	@ 0x4c
  u16_t pos = 0; /* position in 'arg' data */
 801f83a:	2300      	movs	r3, #0
 801f83c:	f8a7 304a 	strh.w	r3, [r7, #74]	@ 0x4a
  u16_t queuelen;
  u8_t optlen;
  u8_t optflags = 0;
 801f840:	2300      	movs	r3, #0
 801f842:	f887 302b 	strb.w	r3, [r7, #43]	@ 0x2b
#if TCP_OVERSIZE
  u16_t oversize = 0;
 801f846:	2300      	movs	r3, #0
 801f848:	82fb      	strh	r3, [r7, #22]
  u16_t oversize_used = 0;
 801f84a:	2300      	movs	r3, #0
 801f84c:	f8a7 3046 	strh.w	r3, [r7, #70]	@ 0x46
#if TCP_OVERSIZE_DBGCHECK
  u16_t oversize_add = 0;
 801f850:	2300      	movs	r3, #0
 801f852:	f8a7 305a 	strh.w	r3, [r7, #90]	@ 0x5a
#endif /* TCP_OVERSIZE_DBGCHECK*/
#endif /* TCP_OVERSIZE */
  u16_t extendlen = 0;
 801f856:	2300      	movs	r3, #0
 801f858:	f8a7 305e 	strh.w	r3, [r7, #94]	@ 0x5e
  u16_t concat_chksummed = 0;
#endif /* TCP_CHECKSUM_ON_COPY */
  err_t err;
  u16_t mss_local;

  LWIP_ERROR("tcp_write: invalid pcb", pcb != NULL, return ERR_ARG);
 801f85c:	68fb      	ldr	r3, [r7, #12]
 801f85e:	2b00      	cmp	r3, #0
 801f860:	d109      	bne.n	801f876 <tcp_write+0x66>
 801f862:	4b9d      	ldr	r3, [pc, #628]	@ (801fad8 <tcp_write+0x2c8>)
 801f864:	f44f 72cf 	mov.w	r2, #414	@ 0x19e
 801f868:	499c      	ldr	r1, [pc, #624]	@ (801fadc <tcp_write+0x2cc>)
 801f86a:	489d      	ldr	r0, [pc, #628]	@ (801fae0 <tcp_write+0x2d0>)
 801f86c:	f00a fca6 	bl	802a1bc <iprintf>
 801f870:	f06f 030f 	mvn.w	r3, #15
 801f874:	e37b      	b.n	801ff6e <tcp_write+0x75e>

  /* don't allocate segments bigger than half the maximum window we ever received */
  mss_local = LWIP_MIN(pcb->mss, TCPWND_MIN16(pcb->snd_wnd_max / 2));
 801f876:	68fb      	ldr	r3, [r7, #12]
 801f878:	f8b3 3062 	ldrh.w	r3, [r3, #98]	@ 0x62
 801f87c:	085b      	lsrs	r3, r3, #1
 801f87e:	b29a      	uxth	r2, r3
 801f880:	68fb      	ldr	r3, [r7, #12]
 801f882:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801f884:	4293      	cmp	r3, r2
 801f886:	bf28      	it	cs
 801f888:	4613      	movcs	r3, r2
 801f88a:	853b      	strh	r3, [r7, #40]	@ 0x28
  mss_local = mss_local ? mss_local : pcb->mss;
 801f88c:	8d3b      	ldrh	r3, [r7, #40]	@ 0x28
 801f88e:	2b00      	cmp	r3, #0
 801f890:	d102      	bne.n	801f898 <tcp_write+0x88>
 801f892:	68fb      	ldr	r3, [r7, #12]
 801f894:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801f896:	e000      	b.n	801f89a <tcp_write+0x8a>
 801f898:	8d3b      	ldrh	r3, [r7, #40]	@ 0x28
 801f89a:	853b      	strh	r3, [r7, #40]	@ 0x28

  LWIP_ASSERT_CORE_LOCKED();
 801f89c:	f7f1 f8ee 	bl	8010a7c <sys_check_core_locking>
  apiflags |= TCP_WRITE_FLAG_COPY;
#endif /* LWIP_NETIF_TX_SINGLE_PBUF */

  LWIP_DEBUGF(TCP_OUTPUT_DEBUG, ("tcp_write(pcb=%p, data=%p, len=%"U16_F", apiflags=%"U16_F")\n",
                                 (void *)pcb, arg, len, (u16_t)apiflags));
  LWIP_ERROR("tcp_write: arg == NULL (programmer violates API)",
 801f8a0:	68bb      	ldr	r3, [r7, #8]
 801f8a2:	2b00      	cmp	r3, #0
 801f8a4:	d109      	bne.n	801f8ba <tcp_write+0xaa>
 801f8a6:	4b8c      	ldr	r3, [pc, #560]	@ (801fad8 <tcp_write+0x2c8>)
 801f8a8:	f240 12ad 	movw	r2, #429	@ 0x1ad
 801f8ac:	498d      	ldr	r1, [pc, #564]	@ (801fae4 <tcp_write+0x2d4>)
 801f8ae:	488c      	ldr	r0, [pc, #560]	@ (801fae0 <tcp_write+0x2d0>)
 801f8b0:	f00a fc84 	bl	802a1bc <iprintf>
 801f8b4:	f06f 030f 	mvn.w	r3, #15
 801f8b8:	e359      	b.n	801ff6e <tcp_write+0x75e>
             arg != NULL, return ERR_ARG;);

  err = tcp_write_checks(pcb, len);
 801f8ba:	88fb      	ldrh	r3, [r7, #6]
 801f8bc:	4619      	mov	r1, r3
 801f8be:	68f8      	ldr	r0, [r7, #12]
 801f8c0:	f7ff ff2c 	bl	801f71c <tcp_write_checks>
 801f8c4:	4603      	mov	r3, r0
 801f8c6:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
  if (err != ERR_OK) {
 801f8ca:	f997 3027 	ldrsb.w	r3, [r7, #39]	@ 0x27
 801f8ce:	2b00      	cmp	r3, #0
 801f8d0:	d002      	beq.n	801f8d8 <tcp_write+0xc8>
    return err;
 801f8d2:	f997 3027 	ldrsb.w	r3, [r7, #39]	@ 0x27
 801f8d6:	e34a      	b.n	801ff6e <tcp_write+0x75e>
  }
  queuelen = pcb->snd_queuelen;
 801f8d8:	68fb      	ldr	r3, [r7, #12]
 801f8da:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 801f8de:	f8a7 3048 	strh.w	r3, [r7, #72]	@ 0x48
    /* ensure that segments can hold at least one data byte... */
    mss_local = LWIP_MAX(mss_local, LWIP_TCP_OPT_LEN_TS + 1);
  } else
#endif /* LWIP_TCP_TIMESTAMPS */
  {
    optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(0, pcb);
 801f8e2:	2300      	movs	r3, #0
 801f8e4:	f887 3026 	strb.w	r3, [r7, #38]	@ 0x26
   *
   * pos records progress as data is segmented.
   */

  /* Find the tail of the unsent queue. */
  if (pcb->unsent != NULL) {
 801f8e8:	68fb      	ldr	r3, [r7, #12]
 801f8ea:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801f8ec:	2b00      	cmp	r3, #0
 801f8ee:	f000 8127 	beq.w	801fb40 <tcp_write+0x330>
    u16_t space;
    u16_t unsent_optlen;

    /* @todo: this could be sped up by keeping last_unsent in the pcb */
    for (last_unsent = pcb->unsent; last_unsent->next != NULL;
 801f8f2:	68fb      	ldr	r3, [r7, #12]
 801f8f4:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801f8f6:	643b      	str	r3, [r7, #64]	@ 0x40
 801f8f8:	e002      	b.n	801f900 <tcp_write+0xf0>
         last_unsent = last_unsent->next);
 801f8fa:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801f8fc:	681b      	ldr	r3, [r3, #0]
 801f8fe:	643b      	str	r3, [r7, #64]	@ 0x40
    for (last_unsent = pcb->unsent; last_unsent->next != NULL;
 801f900:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801f902:	681b      	ldr	r3, [r3, #0]
 801f904:	2b00      	cmp	r3, #0
 801f906:	d1f8      	bne.n	801f8fa <tcp_write+0xea>

    /* Usable space at the end of the last unsent segment */
    unsent_optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(last_unsent->flags, pcb);
 801f908:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801f90a:	7b1b      	ldrb	r3, [r3, #12]
 801f90c:	009b      	lsls	r3, r3, #2
 801f90e:	b29b      	uxth	r3, r3
 801f910:	f003 0304 	and.w	r3, r3, #4
 801f914:	84bb      	strh	r3, [r7, #36]	@ 0x24
    LWIP_ASSERT("mss_local is too small", mss_local >= last_unsent->len + unsent_optlen);
 801f916:	8d3a      	ldrh	r2, [r7, #40]	@ 0x28
 801f918:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801f91a:	891b      	ldrh	r3, [r3, #8]
 801f91c:	4619      	mov	r1, r3
 801f91e:	8cbb      	ldrh	r3, [r7, #36]	@ 0x24
 801f920:	440b      	add	r3, r1
 801f922:	429a      	cmp	r2, r3
 801f924:	da06      	bge.n	801f934 <tcp_write+0x124>
 801f926:	4b6c      	ldr	r3, [pc, #432]	@ (801fad8 <tcp_write+0x2c8>)
 801f928:	f44f 72f3 	mov.w	r2, #486	@ 0x1e6
 801f92c:	496e      	ldr	r1, [pc, #440]	@ (801fae8 <tcp_write+0x2d8>)
 801f92e:	486c      	ldr	r0, [pc, #432]	@ (801fae0 <tcp_write+0x2d0>)
 801f930:	f00a fc44 	bl	802a1bc <iprintf>
    space = mss_local - (last_unsent->len + unsent_optlen);
 801f934:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801f936:	891a      	ldrh	r2, [r3, #8]
 801f938:	8cbb      	ldrh	r3, [r7, #36]	@ 0x24
 801f93a:	4413      	add	r3, r2
 801f93c:	b29b      	uxth	r3, r3
 801f93e:	8d3a      	ldrh	r2, [r7, #40]	@ 0x28
 801f940:	1ad3      	subs	r3, r2, r3
 801f942:	f8a7 305c 	strh.w	r3, [r7, #92]	@ 0x5c
     * function.
     */
#if TCP_OVERSIZE
#if TCP_OVERSIZE_DBGCHECK
    /* check that pcb->unsent_oversize matches last_unsent->oversize_left */
    LWIP_ASSERT("unsent_oversize mismatch (pcb vs. last_unsent)",
 801f946:	68fb      	ldr	r3, [r7, #12]
 801f948:	f8b3 2068 	ldrh.w	r2, [r3, #104]	@ 0x68
 801f94c:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801f94e:	895b      	ldrh	r3, [r3, #10]
 801f950:	429a      	cmp	r2, r3
 801f952:	d006      	beq.n	801f962 <tcp_write+0x152>
 801f954:	4b60      	ldr	r3, [pc, #384]	@ (801fad8 <tcp_write+0x2c8>)
 801f956:	f240 12f3 	movw	r2, #499	@ 0x1f3
 801f95a:	4964      	ldr	r1, [pc, #400]	@ (801faec <tcp_write+0x2dc>)
 801f95c:	4860      	ldr	r0, [pc, #384]	@ (801fae0 <tcp_write+0x2d0>)
 801f95e:	f00a fc2d 	bl	802a1bc <iprintf>
                pcb->unsent_oversize == last_unsent->oversize_left);
#endif /* TCP_OVERSIZE_DBGCHECK */
    oversize = pcb->unsent_oversize;
 801f962:	68fb      	ldr	r3, [r7, #12]
 801f964:	f8b3 3068 	ldrh.w	r3, [r3, #104]	@ 0x68
 801f968:	82fb      	strh	r3, [r7, #22]
    if (oversize > 0) {
 801f96a:	8afb      	ldrh	r3, [r7, #22]
 801f96c:	2b00      	cmp	r3, #0
 801f96e:	d02e      	beq.n	801f9ce <tcp_write+0x1be>
      LWIP_ASSERT("inconsistent oversize vs. space", oversize <= space);
 801f970:	8afb      	ldrh	r3, [r7, #22]
 801f972:	f8b7 205c 	ldrh.w	r2, [r7, #92]	@ 0x5c
 801f976:	429a      	cmp	r2, r3
 801f978:	d206      	bcs.n	801f988 <tcp_write+0x178>
 801f97a:	4b57      	ldr	r3, [pc, #348]	@ (801fad8 <tcp_write+0x2c8>)
 801f97c:	f44f 72fc 	mov.w	r2, #504	@ 0x1f8
 801f980:	495b      	ldr	r1, [pc, #364]	@ (801faf0 <tcp_write+0x2e0>)
 801f982:	4857      	ldr	r0, [pc, #348]	@ (801fae0 <tcp_write+0x2d0>)
 801f984:	f00a fc1a 	bl	802a1bc <iprintf>
      seg = last_unsent;
 801f988:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801f98a:	657b      	str	r3, [r7, #84]	@ 0x54
      oversize_used = LWIP_MIN(space, LWIP_MIN(oversize, len));
 801f98c:	8afb      	ldrh	r3, [r7, #22]
 801f98e:	88fa      	ldrh	r2, [r7, #6]
 801f990:	4293      	cmp	r3, r2
 801f992:	bf28      	it	cs
 801f994:	4613      	movcs	r3, r2
 801f996:	b29b      	uxth	r3, r3
 801f998:	f8b7 205c 	ldrh.w	r2, [r7, #92]	@ 0x5c
 801f99c:	4293      	cmp	r3, r2
 801f99e:	bf28      	it	cs
 801f9a0:	4613      	movcs	r3, r2
 801f9a2:	f8a7 3046 	strh.w	r3, [r7, #70]	@ 0x46
      pos += oversize_used;
 801f9a6:	f8b7 204a 	ldrh.w	r2, [r7, #74]	@ 0x4a
 801f9aa:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 801f9ae:	4413      	add	r3, r2
 801f9b0:	f8a7 304a 	strh.w	r3, [r7, #74]	@ 0x4a
      oversize -= oversize_used;
 801f9b4:	8afa      	ldrh	r2, [r7, #22]
 801f9b6:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 801f9ba:	1ad3      	subs	r3, r2, r3
 801f9bc:	b29b      	uxth	r3, r3
 801f9be:	82fb      	strh	r3, [r7, #22]
      space -= oversize_used;
 801f9c0:	f8b7 205c 	ldrh.w	r2, [r7, #92]	@ 0x5c
 801f9c4:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 801f9c8:	1ad3      	subs	r3, r2, r3
 801f9ca:	f8a7 305c 	strh.w	r3, [r7, #92]	@ 0x5c
    }
    /* now we are either finished or oversize is zero */
    LWIP_ASSERT("inconsistent oversize vs. len", (oversize == 0) || (pos == len));
 801f9ce:	8afb      	ldrh	r3, [r7, #22]
 801f9d0:	2b00      	cmp	r3, #0
 801f9d2:	d00b      	beq.n	801f9ec <tcp_write+0x1dc>
 801f9d4:	f8b7 204a 	ldrh.w	r2, [r7, #74]	@ 0x4a
 801f9d8:	88fb      	ldrh	r3, [r7, #6]
 801f9da:	429a      	cmp	r2, r3
 801f9dc:	d006      	beq.n	801f9ec <tcp_write+0x1dc>
 801f9de:	4b3e      	ldr	r3, [pc, #248]	@ (801fad8 <tcp_write+0x2c8>)
 801f9e0:	f44f 7200 	mov.w	r2, #512	@ 0x200
 801f9e4:	4943      	ldr	r1, [pc, #268]	@ (801faf4 <tcp_write+0x2e4>)
 801f9e6:	483e      	ldr	r0, [pc, #248]	@ (801fae0 <tcp_write+0x2d0>)
 801f9e8:	f00a fbe8 	bl	802a1bc <iprintf>
     *
     * This phase is skipped for LWIP_NETIF_TX_SINGLE_PBUF as we could only execute
     * it after rexmit puts a segment from unacked to unsent and at this point,
     * oversize info is lost.
     */
    if ((pos < len) && (space > 0) && (last_unsent->len > 0)) {
 801f9ec:	f8b7 204a 	ldrh.w	r2, [r7, #74]	@ 0x4a
 801f9f0:	88fb      	ldrh	r3, [r7, #6]
 801f9f2:	429a      	cmp	r2, r3
 801f9f4:	f080 8172 	bcs.w	801fcdc <tcp_write+0x4cc>
 801f9f8:	f8b7 305c 	ldrh.w	r3, [r7, #92]	@ 0x5c
 801f9fc:	2b00      	cmp	r3, #0
 801f9fe:	f000 816d 	beq.w	801fcdc <tcp_write+0x4cc>
 801fa02:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801fa04:	891b      	ldrh	r3, [r3, #8]
 801fa06:	2b00      	cmp	r3, #0
 801fa08:	f000 8168 	beq.w	801fcdc <tcp_write+0x4cc>
      u16_t seglen = LWIP_MIN(space, len - pos);
 801fa0c:	88fa      	ldrh	r2, [r7, #6]
 801fa0e:	f8b7 304a 	ldrh.w	r3, [r7, #74]	@ 0x4a
 801fa12:	1ad2      	subs	r2, r2, r3
 801fa14:	f8b7 305c 	ldrh.w	r3, [r7, #92]	@ 0x5c
 801fa18:	4293      	cmp	r3, r2
 801fa1a:	bfa8      	it	ge
 801fa1c:	4613      	movge	r3, r2
 801fa1e:	847b      	strh	r3, [r7, #34]	@ 0x22
      seg = last_unsent;
 801fa20:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801fa22:	657b      	str	r3, [r7, #84]	@ 0x54

      /* Create a pbuf with a copy or reference to seglen bytes. We
       * can use PBUF_RAW here since the data appears in the middle of
       * a segment. A header will never be prepended. */
      if (apiflags & TCP_WRITE_FLAG_COPY) {
 801fa24:	797b      	ldrb	r3, [r7, #5]
 801fa26:	f003 0301 	and.w	r3, r3, #1
 801fa2a:	2b00      	cmp	r3, #0
 801fa2c:	d02b      	beq.n	801fa86 <tcp_write+0x276>
        /* Data is copied */
        if ((concat_p = tcp_pbuf_prealloc(PBUF_RAW, seglen, space, &oversize, pcb, apiflags, 1)) == NULL) {
 801fa2e:	f107 0016 	add.w	r0, r7, #22
 801fa32:	f8b7 205c 	ldrh.w	r2, [r7, #92]	@ 0x5c
 801fa36:	8c79      	ldrh	r1, [r7, #34]	@ 0x22
 801fa38:	2301      	movs	r3, #1
 801fa3a:	9302      	str	r3, [sp, #8]
 801fa3c:	797b      	ldrb	r3, [r7, #5]
 801fa3e:	9301      	str	r3, [sp, #4]
 801fa40:	68fb      	ldr	r3, [r7, #12]
 801fa42:	9300      	str	r3, [sp, #0]
 801fa44:	4603      	mov	r3, r0
 801fa46:	2000      	movs	r0, #0
 801fa48:	f7ff fdee 	bl	801f628 <tcp_pbuf_prealloc>
 801fa4c:	63f8      	str	r0, [r7, #60]	@ 0x3c
 801fa4e:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801fa50:	2b00      	cmp	r3, #0
 801fa52:	f000 825a 	beq.w	801ff0a <tcp_write+0x6fa>
                      ("tcp_write : could not allocate memory for pbuf copy size %"U16_F"\n",
                       seglen));
          goto memerr;
        }
#if TCP_OVERSIZE_DBGCHECK
        oversize_add = oversize;
 801fa56:	8afb      	ldrh	r3, [r7, #22]
 801fa58:	f8a7 305a 	strh.w	r3, [r7, #90]	@ 0x5a
#endif /* TCP_OVERSIZE_DBGCHECK */
        TCP_DATA_COPY2(concat_p->payload, (const u8_t *)arg + pos, seglen, &concat_chksum, &concat_chksum_swapped);
 801fa5c:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801fa5e:	6858      	ldr	r0, [r3, #4]
 801fa60:	f8b7 304a 	ldrh.w	r3, [r7, #74]	@ 0x4a
 801fa64:	68ba      	ldr	r2, [r7, #8]
 801fa66:	4413      	add	r3, r2
 801fa68:	8c7a      	ldrh	r2, [r7, #34]	@ 0x22
 801fa6a:	4619      	mov	r1, r3
 801fa6c:	f00a fe2f 	bl	802a6ce <memcpy>
#if TCP_CHECKSUM_ON_COPY
        concat_chksummed += seglen;
#endif /* TCP_CHECKSUM_ON_COPY */
        queuelen += pbuf_clen(concat_p);
 801fa70:	6bf8      	ldr	r0, [r7, #60]	@ 0x3c
 801fa72:	f7fb f9b9 	bl	801ade8 <pbuf_clen>
 801fa76:	4603      	mov	r3, r0
 801fa78:	461a      	mov	r2, r3
 801fa7a:	f8b7 3048 	ldrh.w	r3, [r7, #72]	@ 0x48
 801fa7e:	4413      	add	r3, r2
 801fa80:	f8a7 3048 	strh.w	r3, [r7, #72]	@ 0x48
 801fa84:	e055      	b.n	801fb32 <tcp_write+0x322>
      } else {
        /* Data is not copied */
        /* If the last unsent pbuf is of type PBUF_ROM, try to extend it. */
        struct pbuf *p;
        for (p = last_unsent->p; p->next != NULL; p = p->next);
 801fa86:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801fa88:	685b      	ldr	r3, [r3, #4]
 801fa8a:	63bb      	str	r3, [r7, #56]	@ 0x38
 801fa8c:	e002      	b.n	801fa94 <tcp_write+0x284>
 801fa8e:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801fa90:	681b      	ldr	r3, [r3, #0]
 801fa92:	63bb      	str	r3, [r7, #56]	@ 0x38
 801fa94:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801fa96:	681b      	ldr	r3, [r3, #0]
 801fa98:	2b00      	cmp	r3, #0
 801fa9a:	d1f8      	bne.n	801fa8e <tcp_write+0x27e>
        if (((p->type_internal & (PBUF_TYPE_FLAG_STRUCT_DATA_CONTIGUOUS | PBUF_TYPE_FLAG_DATA_VOLATILE)) == 0) &&
 801fa9c:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801fa9e:	7b1b      	ldrb	r3, [r3, #12]
 801faa0:	f003 03c0 	and.w	r3, r3, #192	@ 0xc0
 801faa4:	2b00      	cmp	r3, #0
 801faa6:	d129      	bne.n	801fafc <tcp_write+0x2ec>
            (const u8_t *)p->payload + p->len == (const u8_t *)arg) {
 801faa8:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801faaa:	685b      	ldr	r3, [r3, #4]
 801faac:	6bba      	ldr	r2, [r7, #56]	@ 0x38
 801faae:	8952      	ldrh	r2, [r2, #10]
 801fab0:	4413      	add	r3, r2
        if (((p->type_internal & (PBUF_TYPE_FLAG_STRUCT_DATA_CONTIGUOUS | PBUF_TYPE_FLAG_DATA_VOLATILE)) == 0) &&
 801fab2:	68ba      	ldr	r2, [r7, #8]
 801fab4:	429a      	cmp	r2, r3
 801fab6:	d121      	bne.n	801fafc <tcp_write+0x2ec>
          LWIP_ASSERT("tcp_write: ROM pbufs cannot be oversized", pos == 0);
 801fab8:	f8b7 304a 	ldrh.w	r3, [r7, #74]	@ 0x4a
 801fabc:	2b00      	cmp	r3, #0
 801fabe:	d006      	beq.n	801face <tcp_write+0x2be>
 801fac0:	4b05      	ldr	r3, [pc, #20]	@ (801fad8 <tcp_write+0x2c8>)
 801fac2:	f240 2231 	movw	r2, #561	@ 0x231
 801fac6:	490c      	ldr	r1, [pc, #48]	@ (801faf8 <tcp_write+0x2e8>)
 801fac8:	4805      	ldr	r0, [pc, #20]	@ (801fae0 <tcp_write+0x2d0>)
 801faca:	f00a fb77 	bl	802a1bc <iprintf>
          extendlen = seglen;
 801face:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 801fad0:	f8a7 305e 	strh.w	r3, [r7, #94]	@ 0x5e
 801fad4:	e02d      	b.n	801fb32 <tcp_write+0x322>
 801fad6:	bf00      	nop
 801fad8:	0802fa24 	.word	0x0802fa24
 801fadc:	0802fbc4 	.word	0x0802fbc4
 801fae0:	0802fa78 	.word	0x0802fa78
 801fae4:	0802fbdc 	.word	0x0802fbdc
 801fae8:	0802fc10 	.word	0x0802fc10
 801faec:	0802fc28 	.word	0x0802fc28
 801faf0:	0802fc58 	.word	0x0802fc58
 801faf4:	0802fc78 	.word	0x0802fc78
 801faf8:	0802fc98 	.word	0x0802fc98
        } else {
          if ((concat_p = pbuf_alloc(PBUF_RAW, seglen, PBUF_ROM)) == NULL) {
 801fafc:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 801fafe:	2201      	movs	r2, #1
 801fb00:	4619      	mov	r1, r3
 801fb02:	2000      	movs	r0, #0
 801fb04:	f7fa fdcc 	bl	801a6a0 <pbuf_alloc>
 801fb08:	63f8      	str	r0, [r7, #60]	@ 0x3c
 801fb0a:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801fb0c:	2b00      	cmp	r3, #0
 801fb0e:	f000 81fe 	beq.w	801ff0e <tcp_write+0x6fe>
            LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SERIOUS,
                        ("tcp_write: could not allocate memory for zero-copy pbuf\n"));
            goto memerr;
          }
          /* reference the non-volatile payload data */
          ((struct pbuf_rom *)concat_p)->payload = (const u8_t *)arg + pos;
 801fb12:	f8b7 304a 	ldrh.w	r3, [r7, #74]	@ 0x4a
 801fb16:	68ba      	ldr	r2, [r7, #8]
 801fb18:	441a      	add	r2, r3
 801fb1a:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801fb1c:	605a      	str	r2, [r3, #4]
          queuelen += pbuf_clen(concat_p);
 801fb1e:	6bf8      	ldr	r0, [r7, #60]	@ 0x3c
 801fb20:	f7fb f962 	bl	801ade8 <pbuf_clen>
 801fb24:	4603      	mov	r3, r0
 801fb26:	461a      	mov	r2, r3
 801fb28:	f8b7 3048 	ldrh.w	r3, [r7, #72]	@ 0x48
 801fb2c:	4413      	add	r3, r2
 801fb2e:	f8a7 3048 	strh.w	r3, [r7, #72]	@ 0x48
                           &concat_chksum, &concat_chksum_swapped);
        concat_chksummed += seglen;
#endif /* TCP_CHECKSUM_ON_COPY */
      }

      pos += seglen;
 801fb32:	f8b7 204a 	ldrh.w	r2, [r7, #74]	@ 0x4a
 801fb36:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 801fb38:	4413      	add	r3, r2
 801fb3a:	f8a7 304a 	strh.w	r3, [r7, #74]	@ 0x4a
 801fb3e:	e0cd      	b.n	801fcdc <tcp_write+0x4cc>
    }
#endif /* !LWIP_NETIF_TX_SINGLE_PBUF */
  } else {
#if TCP_OVERSIZE
    LWIP_ASSERT("unsent_oversize mismatch (pcb->unsent is NULL)",
 801fb40:	68fb      	ldr	r3, [r7, #12]
 801fb42:	f8b3 3068 	ldrh.w	r3, [r3, #104]	@ 0x68
 801fb46:	2b00      	cmp	r3, #0
 801fb48:	f000 80c8 	beq.w	801fcdc <tcp_write+0x4cc>
 801fb4c:	4b72      	ldr	r3, [pc, #456]	@ (801fd18 <tcp_write+0x508>)
 801fb4e:	f240 224a 	movw	r2, #586	@ 0x24a
 801fb52:	4972      	ldr	r1, [pc, #456]	@ (801fd1c <tcp_write+0x50c>)
 801fb54:	4872      	ldr	r0, [pc, #456]	@ (801fd20 <tcp_write+0x510>)
 801fb56:	f00a fb31 	bl	802a1bc <iprintf>
   * Phase 3: Create new segments.
   *
   * The new segments are chained together in the local 'queue'
   * variable, ready to be appended to pcb->unsent.
   */
  while (pos < len) {
 801fb5a:	e0bf      	b.n	801fcdc <tcp_write+0x4cc>
    struct pbuf *p;
    u16_t left = len - pos;
 801fb5c:	88fa      	ldrh	r2, [r7, #6]
 801fb5e:	f8b7 304a 	ldrh.w	r3, [r7, #74]	@ 0x4a
 801fb62:	1ad3      	subs	r3, r2, r3
 801fb64:	843b      	strh	r3, [r7, #32]
    u16_t max_len = mss_local - optlen;
 801fb66:	f897 3026 	ldrb.w	r3, [r7, #38]	@ 0x26
 801fb6a:	b29b      	uxth	r3, r3
 801fb6c:	8d3a      	ldrh	r2, [r7, #40]	@ 0x28
 801fb6e:	1ad3      	subs	r3, r2, r3
 801fb70:	83fb      	strh	r3, [r7, #30]
    u16_t seglen = LWIP_MIN(left, max_len);
 801fb72:	8bfa      	ldrh	r2, [r7, #30]
 801fb74:	8c3b      	ldrh	r3, [r7, #32]
 801fb76:	4293      	cmp	r3, r2
 801fb78:	bf28      	it	cs
 801fb7a:	4613      	movcs	r3, r2
 801fb7c:	83bb      	strh	r3, [r7, #28]
#if TCP_CHECKSUM_ON_COPY
    u16_t chksum = 0;
    u8_t chksum_swapped = 0;
#endif /* TCP_CHECKSUM_ON_COPY */

    if (apiflags & TCP_WRITE_FLAG_COPY) {
 801fb7e:	797b      	ldrb	r3, [r7, #5]
 801fb80:	f003 0301 	and.w	r3, r3, #1
 801fb84:	2b00      	cmp	r3, #0
 801fb86:	d036      	beq.n	801fbf6 <tcp_write+0x3e6>
      /* If copy is set, memory should be allocated and data copied
       * into pbuf */
      if ((p = tcp_pbuf_prealloc(PBUF_TRANSPORT, seglen + optlen, mss_local, &oversize, pcb, apiflags, queue == NULL)) == NULL) {
 801fb88:	f897 3026 	ldrb.w	r3, [r7, #38]	@ 0x26
 801fb8c:	b29a      	uxth	r2, r3
 801fb8e:	8bbb      	ldrh	r3, [r7, #28]
 801fb90:	4413      	add	r3, r2
 801fb92:	b299      	uxth	r1, r3
 801fb94:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 801fb96:	2b00      	cmp	r3, #0
 801fb98:	bf0c      	ite	eq
 801fb9a:	2301      	moveq	r3, #1
 801fb9c:	2300      	movne	r3, #0
 801fb9e:	b2db      	uxtb	r3, r3
 801fba0:	f107 0016 	add.w	r0, r7, #22
 801fba4:	8d3a      	ldrh	r2, [r7, #40]	@ 0x28
 801fba6:	9302      	str	r3, [sp, #8]
 801fba8:	797b      	ldrb	r3, [r7, #5]
 801fbaa:	9301      	str	r3, [sp, #4]
 801fbac:	68fb      	ldr	r3, [r7, #12]
 801fbae:	9300      	str	r3, [sp, #0]
 801fbb0:	4603      	mov	r3, r0
 801fbb2:	2036      	movs	r0, #54	@ 0x36
 801fbb4:	f7ff fd38 	bl	801f628 <tcp_pbuf_prealloc>
 801fbb8:	6378      	str	r0, [r7, #52]	@ 0x34
 801fbba:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 801fbbc:	2b00      	cmp	r3, #0
 801fbbe:	f000 81a8 	beq.w	801ff12 <tcp_write+0x702>
        LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("tcp_write : could not allocate memory for pbuf copy size %"U16_F"\n", seglen));
        goto memerr;
      }
      LWIP_ASSERT("tcp_write: check that first pbuf can hold the complete seglen",
 801fbc2:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 801fbc4:	895b      	ldrh	r3, [r3, #10]
 801fbc6:	8bba      	ldrh	r2, [r7, #28]
 801fbc8:	429a      	cmp	r2, r3
 801fbca:	d906      	bls.n	801fbda <tcp_write+0x3ca>
 801fbcc:	4b52      	ldr	r3, [pc, #328]	@ (801fd18 <tcp_write+0x508>)
 801fbce:	f240 2266 	movw	r2, #614	@ 0x266
 801fbd2:	4954      	ldr	r1, [pc, #336]	@ (801fd24 <tcp_write+0x514>)
 801fbd4:	4852      	ldr	r0, [pc, #328]	@ (801fd20 <tcp_write+0x510>)
 801fbd6:	f00a faf1 	bl	802a1bc <iprintf>
                  (p->len >= seglen));
      TCP_DATA_COPY2((char *)p->payload + optlen, (const u8_t *)arg + pos, seglen, &chksum, &chksum_swapped);
 801fbda:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 801fbdc:	685a      	ldr	r2, [r3, #4]
 801fbde:	f897 3026 	ldrb.w	r3, [r7, #38]	@ 0x26
 801fbe2:	18d0      	adds	r0, r2, r3
 801fbe4:	f8b7 304a 	ldrh.w	r3, [r7, #74]	@ 0x4a
 801fbe8:	68ba      	ldr	r2, [r7, #8]
 801fbea:	4413      	add	r3, r2
 801fbec:	8bba      	ldrh	r2, [r7, #28]
 801fbee:	4619      	mov	r1, r3
 801fbf0:	f00a fd6d 	bl	802a6ce <memcpy>
 801fbf4:	e02f      	b.n	801fc56 <tcp_write+0x446>
       * sent out on the link (as it has to be ACKed by the remote
       * party) we can safely use PBUF_ROM instead of PBUF_REF here.
       */
      struct pbuf *p2;
#if TCP_OVERSIZE
      LWIP_ASSERT("oversize == 0", oversize == 0);
 801fbf6:	8afb      	ldrh	r3, [r7, #22]
 801fbf8:	2b00      	cmp	r3, #0
 801fbfa:	d006      	beq.n	801fc0a <tcp_write+0x3fa>
 801fbfc:	4b46      	ldr	r3, [pc, #280]	@ (801fd18 <tcp_write+0x508>)
 801fbfe:	f240 2271 	movw	r2, #625	@ 0x271
 801fc02:	4949      	ldr	r1, [pc, #292]	@ (801fd28 <tcp_write+0x518>)
 801fc04:	4846      	ldr	r0, [pc, #280]	@ (801fd20 <tcp_write+0x510>)
 801fc06:	f00a fad9 	bl	802a1bc <iprintf>
#endif /* TCP_OVERSIZE */
      if ((p2 = pbuf_alloc(PBUF_TRANSPORT, seglen, PBUF_ROM)) == NULL) {
 801fc0a:	8bbb      	ldrh	r3, [r7, #28]
 801fc0c:	2201      	movs	r2, #1
 801fc0e:	4619      	mov	r1, r3
 801fc10:	2036      	movs	r0, #54	@ 0x36
 801fc12:	f7fa fd45 	bl	801a6a0 <pbuf_alloc>
 801fc16:	61b8      	str	r0, [r7, #24]
 801fc18:	69bb      	ldr	r3, [r7, #24]
 801fc1a:	2b00      	cmp	r3, #0
 801fc1c:	f000 817b 	beq.w	801ff16 <tcp_write+0x706>
        chksum_swapped = 1;
        chksum = SWAP_BYTES_IN_WORD(chksum);
      }
#endif /* TCP_CHECKSUM_ON_COPY */
      /* reference the non-volatile payload data */
      ((struct pbuf_rom *)p2)->payload = (const u8_t *)arg + pos;
 801fc20:	f8b7 304a 	ldrh.w	r3, [r7, #74]	@ 0x4a
 801fc24:	68ba      	ldr	r2, [r7, #8]
 801fc26:	441a      	add	r2, r3
 801fc28:	69bb      	ldr	r3, [r7, #24]
 801fc2a:	605a      	str	r2, [r3, #4]

      /* Second, allocate a pbuf for the headers. */
      if ((p = pbuf_alloc(PBUF_TRANSPORT, optlen, PBUF_RAM)) == NULL) {
 801fc2c:	f897 3026 	ldrb.w	r3, [r7, #38]	@ 0x26
 801fc30:	b29b      	uxth	r3, r3
 801fc32:	f44f 7220 	mov.w	r2, #640	@ 0x280
 801fc36:	4619      	mov	r1, r3
 801fc38:	2036      	movs	r0, #54	@ 0x36
 801fc3a:	f7fa fd31 	bl	801a6a0 <pbuf_alloc>
 801fc3e:	6378      	str	r0, [r7, #52]	@ 0x34
 801fc40:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 801fc42:	2b00      	cmp	r3, #0
 801fc44:	d103      	bne.n	801fc4e <tcp_write+0x43e>
        /* If allocation fails, we have to deallocate the data pbuf as
         * well. */
        pbuf_free(p2);
 801fc46:	69b8      	ldr	r0, [r7, #24]
 801fc48:	f7fb f840 	bl	801accc <pbuf_free>
        LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("tcp_write: could not allocate memory for header pbuf\n"));
        goto memerr;
 801fc4c:	e166      	b.n	801ff1c <tcp_write+0x70c>
      }
      /* Concatenate the headers and data pbufs together. */
      pbuf_cat(p/*header*/, p2/*data*/);
 801fc4e:	69b9      	ldr	r1, [r7, #24]
 801fc50:	6b78      	ldr	r0, [r7, #52]	@ 0x34
 801fc52:	f7fb f909 	bl	801ae68 <pbuf_cat>
    }

    queuelen += pbuf_clen(p);
 801fc56:	6b78      	ldr	r0, [r7, #52]	@ 0x34
 801fc58:	f7fb f8c6 	bl	801ade8 <pbuf_clen>
 801fc5c:	4603      	mov	r3, r0
 801fc5e:	461a      	mov	r2, r3
 801fc60:	f8b7 3048 	ldrh.w	r3, [r7, #72]	@ 0x48
 801fc64:	4413      	add	r3, r2
 801fc66:	f8a7 3048 	strh.w	r3, [r7, #72]	@ 0x48

    /* Now that there are more segments queued, we check again if the
     * length of the queue exceeds the configured maximum or
     * overflows. */
    if (queuelen > LWIP_MIN(TCP_SND_QUEUELEN, TCP_SNDQUEUELEN_OVERFLOW)) {
 801fc6a:	f8b7 3048 	ldrh.w	r3, [r7, #72]	@ 0x48
 801fc6e:	2b10      	cmp	r3, #16
 801fc70:	d903      	bls.n	801fc7a <tcp_write+0x46a>
      LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("tcp_write: queue too long %"U16_F" (%d)\n",
                  queuelen, (int)TCP_SND_QUEUELEN));
      pbuf_free(p);
 801fc72:	6b78      	ldr	r0, [r7, #52]	@ 0x34
 801fc74:	f7fb f82a 	bl	801accc <pbuf_free>
      goto memerr;
 801fc78:	e150      	b.n	801ff1c <tcp_write+0x70c>
    }

    if ((seg = tcp_create_segment(pcb, p, 0, pcb->snd_lbb + pos, optflags)) == NULL) {
 801fc7a:	68fb      	ldr	r3, [r7, #12]
 801fc7c:	6dda      	ldr	r2, [r3, #92]	@ 0x5c
 801fc7e:	f8b7 304a 	ldrh.w	r3, [r7, #74]	@ 0x4a
 801fc82:	441a      	add	r2, r3
 801fc84:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 801fc88:	9300      	str	r3, [sp, #0]
 801fc8a:	4613      	mov	r3, r2
 801fc8c:	2200      	movs	r2, #0
 801fc8e:	6b79      	ldr	r1, [r7, #52]	@ 0x34
 801fc90:	68f8      	ldr	r0, [r7, #12]
 801fc92:	f7ff fc29 	bl	801f4e8 <tcp_create_segment>
 801fc96:	6578      	str	r0, [r7, #84]	@ 0x54
 801fc98:	6d7b      	ldr	r3, [r7, #84]	@ 0x54
 801fc9a:	2b00      	cmp	r3, #0
 801fc9c:	f000 813d 	beq.w	801ff1a <tcp_write+0x70a>
      goto memerr;
    }
#if TCP_OVERSIZE_DBGCHECK
    seg->oversize_left = oversize;
 801fca0:	8afa      	ldrh	r2, [r7, #22]
 801fca2:	6d7b      	ldr	r3, [r7, #84]	@ 0x54
 801fca4:	815a      	strh	r2, [r3, #10]
    seg->chksum_swapped = chksum_swapped;
    seg->flags |= TF_SEG_DATA_CHECKSUMMED;
#endif /* TCP_CHECKSUM_ON_COPY */

    /* first segment of to-be-queued data? */
    if (queue == NULL) {
 801fca6:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 801fca8:	2b00      	cmp	r3, #0
 801fcaa:	d102      	bne.n	801fcb2 <tcp_write+0x4a2>
      queue = seg;
 801fcac:	6d7b      	ldr	r3, [r7, #84]	@ 0x54
 801fcae:	64fb      	str	r3, [r7, #76]	@ 0x4c
 801fcb0:	e00c      	b.n	801fccc <tcp_write+0x4bc>
    } else {
      /* Attach the segment to the end of the queued segments */
      LWIP_ASSERT("prev_seg != NULL", prev_seg != NULL);
 801fcb2:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 801fcb4:	2b00      	cmp	r3, #0
 801fcb6:	d106      	bne.n	801fcc6 <tcp_write+0x4b6>
 801fcb8:	4b17      	ldr	r3, [pc, #92]	@ (801fd18 <tcp_write+0x508>)
 801fcba:	f240 22ab 	movw	r2, #683	@ 0x2ab
 801fcbe:	491b      	ldr	r1, [pc, #108]	@ (801fd2c <tcp_write+0x51c>)
 801fcc0:	4817      	ldr	r0, [pc, #92]	@ (801fd20 <tcp_write+0x510>)
 801fcc2:	f00a fa7b 	bl	802a1bc <iprintf>
      prev_seg->next = seg;
 801fcc6:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 801fcc8:	6d7a      	ldr	r2, [r7, #84]	@ 0x54
 801fcca:	601a      	str	r2, [r3, #0]
    }
    /* remember last segment of to-be-queued data for next iteration */
    prev_seg = seg;
 801fccc:	6d7b      	ldr	r3, [r7, #84]	@ 0x54
 801fcce:	653b      	str	r3, [r7, #80]	@ 0x50

    LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_TRACE, ("tcp_write: queueing %"U32_F":%"U32_F"\n",
                lwip_ntohl(seg->tcphdr->seqno),
                lwip_ntohl(seg->tcphdr->seqno) + TCP_TCPLEN(seg)));

    pos += seglen;
 801fcd0:	f8b7 204a 	ldrh.w	r2, [r7, #74]	@ 0x4a
 801fcd4:	8bbb      	ldrh	r3, [r7, #28]
 801fcd6:	4413      	add	r3, r2
 801fcd8:	f8a7 304a 	strh.w	r3, [r7, #74]	@ 0x4a
  while (pos < len) {
 801fcdc:	f8b7 204a 	ldrh.w	r2, [r7, #74]	@ 0x4a
 801fce0:	88fb      	ldrh	r3, [r7, #6]
 801fce2:	429a      	cmp	r2, r3
 801fce4:	f4ff af3a 	bcc.w	801fb5c <tcp_write+0x34c>
  /*
   * All three segmentation phases were successful. We can commit the
   * transaction.
   */
#if TCP_OVERSIZE_DBGCHECK
  if ((last_unsent != NULL) && (oversize_add != 0)) {
 801fce8:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801fcea:	2b00      	cmp	r3, #0
 801fcec:	d00b      	beq.n	801fd06 <tcp_write+0x4f6>
 801fcee:	f8b7 305a 	ldrh.w	r3, [r7, #90]	@ 0x5a
 801fcf2:	2b00      	cmp	r3, #0
 801fcf4:	d007      	beq.n	801fd06 <tcp_write+0x4f6>
    last_unsent->oversize_left += oversize_add;
 801fcf6:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801fcf8:	895a      	ldrh	r2, [r3, #10]
 801fcfa:	f8b7 305a 	ldrh.w	r3, [r7, #90]	@ 0x5a
 801fcfe:	4413      	add	r3, r2
 801fd00:	b29a      	uxth	r2, r3
 801fd02:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801fd04:	815a      	strh	r2, [r3, #10]
  /*
   * Phase 1: If data has been added to the preallocated tail of
   * last_unsent, we update the length fields of the pbuf chain.
   */
#if TCP_OVERSIZE
  if (oversize_used > 0) {
 801fd06:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 801fd0a:	2b00      	cmp	r3, #0
 801fd0c:	d052      	beq.n	801fdb4 <tcp_write+0x5a4>
    struct pbuf *p;
    /* Bump tot_len of whole chain, len of tail */
    for (p = last_unsent->p; p; p = p->next) {
 801fd0e:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801fd10:	685b      	ldr	r3, [r3, #4]
 801fd12:	633b      	str	r3, [r7, #48]	@ 0x30
 801fd14:	e02e      	b.n	801fd74 <tcp_write+0x564>
 801fd16:	bf00      	nop
 801fd18:	0802fa24 	.word	0x0802fa24
 801fd1c:	0802fcc4 	.word	0x0802fcc4
 801fd20:	0802fa78 	.word	0x0802fa78
 801fd24:	0802fcf4 	.word	0x0802fcf4
 801fd28:	0802fd34 	.word	0x0802fd34
 801fd2c:	0802fd44 	.word	0x0802fd44
      p->tot_len += oversize_used;
 801fd30:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801fd32:	891a      	ldrh	r2, [r3, #8]
 801fd34:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 801fd38:	4413      	add	r3, r2
 801fd3a:	b29a      	uxth	r2, r3
 801fd3c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801fd3e:	811a      	strh	r2, [r3, #8]
      if (p->next == NULL) {
 801fd40:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801fd42:	681b      	ldr	r3, [r3, #0]
 801fd44:	2b00      	cmp	r3, #0
 801fd46:	d112      	bne.n	801fd6e <tcp_write+0x55e>
        TCP_DATA_COPY((char *)p->payload + p->len, arg, oversize_used, last_unsent);
 801fd48:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801fd4a:	685b      	ldr	r3, [r3, #4]
 801fd4c:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 801fd4e:	8952      	ldrh	r2, [r2, #10]
 801fd50:	4413      	add	r3, r2
 801fd52:	f8b7 2046 	ldrh.w	r2, [r7, #70]	@ 0x46
 801fd56:	68b9      	ldr	r1, [r7, #8]
 801fd58:	4618      	mov	r0, r3
 801fd5a:	f00a fcb8 	bl	802a6ce <memcpy>
        p->len += oversize_used;
 801fd5e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801fd60:	895a      	ldrh	r2, [r3, #10]
 801fd62:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 801fd66:	4413      	add	r3, r2
 801fd68:	b29a      	uxth	r2, r3
 801fd6a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801fd6c:	815a      	strh	r2, [r3, #10]
    for (p = last_unsent->p; p; p = p->next) {
 801fd6e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801fd70:	681b      	ldr	r3, [r3, #0]
 801fd72:	633b      	str	r3, [r7, #48]	@ 0x30
 801fd74:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801fd76:	2b00      	cmp	r3, #0
 801fd78:	d1da      	bne.n	801fd30 <tcp_write+0x520>
      }
    }
    last_unsent->len += oversize_used;
 801fd7a:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801fd7c:	891a      	ldrh	r2, [r3, #8]
 801fd7e:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 801fd82:	4413      	add	r3, r2
 801fd84:	b29a      	uxth	r2, r3
 801fd86:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801fd88:	811a      	strh	r2, [r3, #8]
#if TCP_OVERSIZE_DBGCHECK
    LWIP_ASSERT("last_unsent->oversize_left >= oversize_used",
 801fd8a:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801fd8c:	895b      	ldrh	r3, [r3, #10]
 801fd8e:	f8b7 2046 	ldrh.w	r2, [r7, #70]	@ 0x46
 801fd92:	429a      	cmp	r2, r3
 801fd94:	d906      	bls.n	801fda4 <tcp_write+0x594>
 801fd96:	4b78      	ldr	r3, [pc, #480]	@ (801ff78 <tcp_write+0x768>)
 801fd98:	f240 22d3 	movw	r2, #723	@ 0x2d3
 801fd9c:	4977      	ldr	r1, [pc, #476]	@ (801ff7c <tcp_write+0x76c>)
 801fd9e:	4878      	ldr	r0, [pc, #480]	@ (801ff80 <tcp_write+0x770>)
 801fda0:	f00a fa0c 	bl	802a1bc <iprintf>
                last_unsent->oversize_left >= oversize_used);
    last_unsent->oversize_left -= oversize_used;
 801fda4:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801fda6:	895a      	ldrh	r2, [r3, #10]
 801fda8:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 801fdac:	1ad3      	subs	r3, r2, r3
 801fdae:	b29a      	uxth	r2, r3
 801fdb0:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801fdb2:	815a      	strh	r2, [r3, #10]
#endif /* TCP_OVERSIZE_DBGCHECK */
  }
  pcb->unsent_oversize = oversize;
 801fdb4:	8afa      	ldrh	r2, [r7, #22]
 801fdb6:	68fb      	ldr	r3, [r7, #12]
 801fdb8:	f8a3 2068 	strh.w	r2, [r3, #104]	@ 0x68

  /*
   * Phase 2: concat_p can be concatenated onto last_unsent->p, unless we
   * determined that the last ROM pbuf can be extended to include the new data.
   */
  if (concat_p != NULL) {
 801fdbc:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801fdbe:	2b00      	cmp	r3, #0
 801fdc0:	d018      	beq.n	801fdf4 <tcp_write+0x5e4>
    LWIP_ASSERT("tcp_write: cannot concatenate when pcb->unsent is empty",
 801fdc2:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801fdc4:	2b00      	cmp	r3, #0
 801fdc6:	d106      	bne.n	801fdd6 <tcp_write+0x5c6>
 801fdc8:	4b6b      	ldr	r3, [pc, #428]	@ (801ff78 <tcp_write+0x768>)
 801fdca:	f44f 7238 	mov.w	r2, #736	@ 0x2e0
 801fdce:	496d      	ldr	r1, [pc, #436]	@ (801ff84 <tcp_write+0x774>)
 801fdd0:	486b      	ldr	r0, [pc, #428]	@ (801ff80 <tcp_write+0x770>)
 801fdd2:	f00a f9f3 	bl	802a1bc <iprintf>
                (last_unsent != NULL));
    pbuf_cat(last_unsent->p, concat_p);
 801fdd6:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801fdd8:	685b      	ldr	r3, [r3, #4]
 801fdda:	6bf9      	ldr	r1, [r7, #60]	@ 0x3c
 801fddc:	4618      	mov	r0, r3
 801fdde:	f7fb f843 	bl	801ae68 <pbuf_cat>
    last_unsent->len += concat_p->tot_len;
 801fde2:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801fde4:	891a      	ldrh	r2, [r3, #8]
 801fde6:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801fde8:	891b      	ldrh	r3, [r3, #8]
 801fdea:	4413      	add	r3, r2
 801fdec:	b29a      	uxth	r2, r3
 801fdee:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801fdf0:	811a      	strh	r2, [r3, #8]
 801fdf2:	e03c      	b.n	801fe6e <tcp_write+0x65e>
  } else if (extendlen > 0) {
 801fdf4:	f8b7 305e 	ldrh.w	r3, [r7, #94]	@ 0x5e
 801fdf8:	2b00      	cmp	r3, #0
 801fdfa:	d038      	beq.n	801fe6e <tcp_write+0x65e>
    struct pbuf *p;
    LWIP_ASSERT("tcp_write: extension of reference requires reference",
 801fdfc:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801fdfe:	2b00      	cmp	r3, #0
 801fe00:	d003      	beq.n	801fe0a <tcp_write+0x5fa>
 801fe02:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801fe04:	685b      	ldr	r3, [r3, #4]
 801fe06:	2b00      	cmp	r3, #0
 801fe08:	d106      	bne.n	801fe18 <tcp_write+0x608>
 801fe0a:	4b5b      	ldr	r3, [pc, #364]	@ (801ff78 <tcp_write+0x768>)
 801fe0c:	f240 22e6 	movw	r2, #742	@ 0x2e6
 801fe10:	495d      	ldr	r1, [pc, #372]	@ (801ff88 <tcp_write+0x778>)
 801fe12:	485b      	ldr	r0, [pc, #364]	@ (801ff80 <tcp_write+0x770>)
 801fe14:	f00a f9d2 	bl	802a1bc <iprintf>
                last_unsent != NULL && last_unsent->p != NULL);
    for (p = last_unsent->p; p->next != NULL; p = p->next) {
 801fe18:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801fe1a:	685b      	ldr	r3, [r3, #4]
 801fe1c:	62fb      	str	r3, [r7, #44]	@ 0x2c
 801fe1e:	e00a      	b.n	801fe36 <tcp_write+0x626>
      p->tot_len += extendlen;
 801fe20:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801fe22:	891a      	ldrh	r2, [r3, #8]
 801fe24:	f8b7 305e 	ldrh.w	r3, [r7, #94]	@ 0x5e
 801fe28:	4413      	add	r3, r2
 801fe2a:	b29a      	uxth	r2, r3
 801fe2c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801fe2e:	811a      	strh	r2, [r3, #8]
    for (p = last_unsent->p; p->next != NULL; p = p->next) {
 801fe30:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801fe32:	681b      	ldr	r3, [r3, #0]
 801fe34:	62fb      	str	r3, [r7, #44]	@ 0x2c
 801fe36:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801fe38:	681b      	ldr	r3, [r3, #0]
 801fe3a:	2b00      	cmp	r3, #0
 801fe3c:	d1f0      	bne.n	801fe20 <tcp_write+0x610>
    }
    p->tot_len += extendlen;
 801fe3e:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801fe40:	891a      	ldrh	r2, [r3, #8]
 801fe42:	f8b7 305e 	ldrh.w	r3, [r7, #94]	@ 0x5e
 801fe46:	4413      	add	r3, r2
 801fe48:	b29a      	uxth	r2, r3
 801fe4a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801fe4c:	811a      	strh	r2, [r3, #8]
    p->len += extendlen;
 801fe4e:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801fe50:	895a      	ldrh	r2, [r3, #10]
 801fe52:	f8b7 305e 	ldrh.w	r3, [r7, #94]	@ 0x5e
 801fe56:	4413      	add	r3, r2
 801fe58:	b29a      	uxth	r2, r3
 801fe5a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801fe5c:	815a      	strh	r2, [r3, #10]
    last_unsent->len += extendlen;
 801fe5e:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801fe60:	891a      	ldrh	r2, [r3, #8]
 801fe62:	f8b7 305e 	ldrh.w	r3, [r7, #94]	@ 0x5e
 801fe66:	4413      	add	r3, r2
 801fe68:	b29a      	uxth	r2, r3
 801fe6a:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801fe6c:	811a      	strh	r2, [r3, #8]

  /*
   * Phase 3: Append queue to pcb->unsent. Queue may be NULL, but that
   * is harmless
   */
  if (last_unsent == NULL) {
 801fe6e:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801fe70:	2b00      	cmp	r3, #0
 801fe72:	d103      	bne.n	801fe7c <tcp_write+0x66c>
    pcb->unsent = queue;
 801fe74:	68fb      	ldr	r3, [r7, #12]
 801fe76:	6cfa      	ldr	r2, [r7, #76]	@ 0x4c
 801fe78:	66da      	str	r2, [r3, #108]	@ 0x6c
 801fe7a:	e002      	b.n	801fe82 <tcp_write+0x672>
  } else {
    last_unsent->next = queue;
 801fe7c:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801fe7e:	6cfa      	ldr	r2, [r7, #76]	@ 0x4c
 801fe80:	601a      	str	r2, [r3, #0]
  }

  /*
   * Finally update the pcb state.
   */
  pcb->snd_lbb += len;
 801fe82:	68fb      	ldr	r3, [r7, #12]
 801fe84:	6dda      	ldr	r2, [r3, #92]	@ 0x5c
 801fe86:	88fb      	ldrh	r3, [r7, #6]
 801fe88:	441a      	add	r2, r3
 801fe8a:	68fb      	ldr	r3, [r7, #12]
 801fe8c:	65da      	str	r2, [r3, #92]	@ 0x5c
  pcb->snd_buf -= len;
 801fe8e:	68fb      	ldr	r3, [r7, #12]
 801fe90:	f8b3 2064 	ldrh.w	r2, [r3, #100]	@ 0x64
 801fe94:	88fb      	ldrh	r3, [r7, #6]
 801fe96:	1ad3      	subs	r3, r2, r3
 801fe98:	b29a      	uxth	r2, r3
 801fe9a:	68fb      	ldr	r3, [r7, #12]
 801fe9c:	f8a3 2064 	strh.w	r2, [r3, #100]	@ 0x64
  pcb->snd_queuelen = queuelen;
 801fea0:	68fb      	ldr	r3, [r7, #12]
 801fea2:	f8b7 2048 	ldrh.w	r2, [r7, #72]	@ 0x48
 801fea6:	f8a3 2066 	strh.w	r2, [r3, #102]	@ 0x66

  LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_write: %"S16_F" (after enqueued)\n",
                               pcb->snd_queuelen));
  if (pcb->snd_queuelen != 0) {
 801feaa:	68fb      	ldr	r3, [r7, #12]
 801feac:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 801feb0:	2b00      	cmp	r3, #0
 801feb2:	d00e      	beq.n	801fed2 <tcp_write+0x6c2>
    LWIP_ASSERT("tcp_write: valid queue length",
 801feb4:	68fb      	ldr	r3, [r7, #12]
 801feb6:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801feb8:	2b00      	cmp	r3, #0
 801feba:	d10a      	bne.n	801fed2 <tcp_write+0x6c2>
 801febc:	68fb      	ldr	r3, [r7, #12]
 801febe:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801fec0:	2b00      	cmp	r3, #0
 801fec2:	d106      	bne.n	801fed2 <tcp_write+0x6c2>
 801fec4:	4b2c      	ldr	r3, [pc, #176]	@ (801ff78 <tcp_write+0x768>)
 801fec6:	f240 3212 	movw	r2, #786	@ 0x312
 801feca:	4930      	ldr	r1, [pc, #192]	@ (801ff8c <tcp_write+0x77c>)
 801fecc:	482c      	ldr	r0, [pc, #176]	@ (801ff80 <tcp_write+0x770>)
 801fece:	f00a f975 	bl	802a1bc <iprintf>
                pcb->unacked != NULL || pcb->unsent != NULL);
  }

  /* Set the PSH flag in the last segment that we enqueued. */
  if (seg != NULL && seg->tcphdr != NULL && ((apiflags & TCP_WRITE_FLAG_MORE) == 0)) {
 801fed2:	6d7b      	ldr	r3, [r7, #84]	@ 0x54
 801fed4:	2b00      	cmp	r3, #0
 801fed6:	d016      	beq.n	801ff06 <tcp_write+0x6f6>
 801fed8:	6d7b      	ldr	r3, [r7, #84]	@ 0x54
 801feda:	691b      	ldr	r3, [r3, #16]
 801fedc:	2b00      	cmp	r3, #0
 801fede:	d012      	beq.n	801ff06 <tcp_write+0x6f6>
 801fee0:	797b      	ldrb	r3, [r7, #5]
 801fee2:	f003 0302 	and.w	r3, r3, #2
 801fee6:	2b00      	cmp	r3, #0
 801fee8:	d10d      	bne.n	801ff06 <tcp_write+0x6f6>
    TCPH_SET_FLAG(seg->tcphdr, TCP_PSH);
 801feea:	6d7b      	ldr	r3, [r7, #84]	@ 0x54
 801feec:	691b      	ldr	r3, [r3, #16]
 801feee:	899b      	ldrh	r3, [r3, #12]
 801fef0:	b29c      	uxth	r4, r3
 801fef2:	2008      	movs	r0, #8
 801fef4:	f7f9 fa08 	bl	8019308 <lwip_htons>
 801fef8:	4603      	mov	r3, r0
 801fefa:	461a      	mov	r2, r3
 801fefc:	6d7b      	ldr	r3, [r7, #84]	@ 0x54
 801fefe:	691b      	ldr	r3, [r3, #16]
 801ff00:	4322      	orrs	r2, r4
 801ff02:	b292      	uxth	r2, r2
 801ff04:	819a      	strh	r2, [r3, #12]
  }

  return ERR_OK;
 801ff06:	2300      	movs	r3, #0
 801ff08:	e031      	b.n	801ff6e <tcp_write+0x75e>
          goto memerr;
 801ff0a:	bf00      	nop
 801ff0c:	e006      	b.n	801ff1c <tcp_write+0x70c>
            goto memerr;
 801ff0e:	bf00      	nop
 801ff10:	e004      	b.n	801ff1c <tcp_write+0x70c>
        goto memerr;
 801ff12:	bf00      	nop
 801ff14:	e002      	b.n	801ff1c <tcp_write+0x70c>
        goto memerr;
 801ff16:	bf00      	nop
 801ff18:	e000      	b.n	801ff1c <tcp_write+0x70c>
      goto memerr;
 801ff1a:	bf00      	nop
memerr:
  tcp_set_flags(pcb, TF_NAGLEMEMERR);
 801ff1c:	68fb      	ldr	r3, [r7, #12]
 801ff1e:	8b5b      	ldrh	r3, [r3, #26]
 801ff20:	f043 0380 	orr.w	r3, r3, #128	@ 0x80
 801ff24:	b29a      	uxth	r2, r3
 801ff26:	68fb      	ldr	r3, [r7, #12]
 801ff28:	835a      	strh	r2, [r3, #26]
  TCP_STATS_INC(tcp.memerr);

  if (concat_p != NULL) {
 801ff2a:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801ff2c:	2b00      	cmp	r3, #0
 801ff2e:	d002      	beq.n	801ff36 <tcp_write+0x726>
    pbuf_free(concat_p);
 801ff30:	6bf8      	ldr	r0, [r7, #60]	@ 0x3c
 801ff32:	f7fa fecb 	bl	801accc <pbuf_free>
  }
  if (queue != NULL) {
 801ff36:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 801ff38:	2b00      	cmp	r3, #0
 801ff3a:	d002      	beq.n	801ff42 <tcp_write+0x732>
    tcp_segs_free(queue);
 801ff3c:	6cf8      	ldr	r0, [r7, #76]	@ 0x4c
 801ff3e:	f7fc fb09 	bl	801c554 <tcp_segs_free>
  }
  if (pcb->snd_queuelen != 0) {
 801ff42:	68fb      	ldr	r3, [r7, #12]
 801ff44:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 801ff48:	2b00      	cmp	r3, #0
 801ff4a:	d00e      	beq.n	801ff6a <tcp_write+0x75a>
    LWIP_ASSERT("tcp_write: valid queue length", pcb->unacked != NULL ||
 801ff4c:	68fb      	ldr	r3, [r7, #12]
 801ff4e:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801ff50:	2b00      	cmp	r3, #0
 801ff52:	d10a      	bne.n	801ff6a <tcp_write+0x75a>
 801ff54:	68fb      	ldr	r3, [r7, #12]
 801ff56:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801ff58:	2b00      	cmp	r3, #0
 801ff5a:	d106      	bne.n	801ff6a <tcp_write+0x75a>
 801ff5c:	4b06      	ldr	r3, [pc, #24]	@ (801ff78 <tcp_write+0x768>)
 801ff5e:	f240 3227 	movw	r2, #807	@ 0x327
 801ff62:	490a      	ldr	r1, [pc, #40]	@ (801ff8c <tcp_write+0x77c>)
 801ff64:	4806      	ldr	r0, [pc, #24]	@ (801ff80 <tcp_write+0x770>)
 801ff66:	f00a f929 	bl	802a1bc <iprintf>
                pcb->unsent != NULL);
  }
  LWIP_DEBUGF(TCP_QLEN_DEBUG | LWIP_DBG_STATE, ("tcp_write: %"S16_F" (with mem err)\n", pcb->snd_queuelen));
  return ERR_MEM;
 801ff6a:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
}
 801ff6e:	4618      	mov	r0, r3
 801ff70:	3764      	adds	r7, #100	@ 0x64
 801ff72:	46bd      	mov	sp, r7
 801ff74:	bd90      	pop	{r4, r7, pc}
 801ff76:	bf00      	nop
 801ff78:	0802fa24 	.word	0x0802fa24
 801ff7c:	0802fd58 	.word	0x0802fd58
 801ff80:	0802fa78 	.word	0x0802fa78
 801ff84:	0802fd84 	.word	0x0802fd84
 801ff88:	0802fdbc 	.word	0x0802fdbc
 801ff8c:	0802fdf4 	.word	0x0802fdf4

0801ff90 <tcp_split_unsent_seg>:
 * @param pcb the tcp_pcb for which to split the unsent head
 * @param split the amount of payload to remain in the head
 */
err_t
tcp_split_unsent_seg(struct tcp_pcb *pcb, u16_t split)
{
 801ff90:	b590      	push	{r4, r7, lr}
 801ff92:	b08b      	sub	sp, #44	@ 0x2c
 801ff94:	af02      	add	r7, sp, #8
 801ff96:	6078      	str	r0, [r7, #4]
 801ff98:	460b      	mov	r3, r1
 801ff9a:	807b      	strh	r3, [r7, #2]
  struct tcp_seg *seg = NULL, *useg = NULL;
 801ff9c:	2300      	movs	r3, #0
 801ff9e:	61bb      	str	r3, [r7, #24]
 801ffa0:	2300      	movs	r3, #0
 801ffa2:	617b      	str	r3, [r7, #20]
  struct pbuf *p = NULL;
 801ffa4:	2300      	movs	r3, #0
 801ffa6:	613b      	str	r3, [r7, #16]
  u16_t chksum = 0;
  u8_t chksum_swapped = 0;
  struct pbuf *q;
#endif /* TCP_CHECKSUM_ON_COPY */

  LWIP_ASSERT("tcp_split_unsent_seg: invalid pcb", pcb != NULL);
 801ffa8:	687b      	ldr	r3, [r7, #4]
 801ffaa:	2b00      	cmp	r3, #0
 801ffac:	d106      	bne.n	801ffbc <tcp_split_unsent_seg+0x2c>
 801ffae:	4b97      	ldr	r3, [pc, #604]	@ (802020c <tcp_split_unsent_seg+0x27c>)
 801ffb0:	f240 324b 	movw	r2, #843	@ 0x34b
 801ffb4:	4996      	ldr	r1, [pc, #600]	@ (8020210 <tcp_split_unsent_seg+0x280>)
 801ffb6:	4897      	ldr	r0, [pc, #604]	@ (8020214 <tcp_split_unsent_seg+0x284>)
 801ffb8:	f00a f900 	bl	802a1bc <iprintf>

  useg = pcb->unsent;
 801ffbc:	687b      	ldr	r3, [r7, #4]
 801ffbe:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801ffc0:	617b      	str	r3, [r7, #20]
  if (useg == NULL) {
 801ffc2:	697b      	ldr	r3, [r7, #20]
 801ffc4:	2b00      	cmp	r3, #0
 801ffc6:	d102      	bne.n	801ffce <tcp_split_unsent_seg+0x3e>
    return ERR_MEM;
 801ffc8:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 801ffcc:	e119      	b.n	8020202 <tcp_split_unsent_seg+0x272>
  }

  if (split == 0) {
 801ffce:	887b      	ldrh	r3, [r7, #2]
 801ffd0:	2b00      	cmp	r3, #0
 801ffd2:	d109      	bne.n	801ffe8 <tcp_split_unsent_seg+0x58>
    LWIP_ASSERT("Can't split segment into length 0", 0);
 801ffd4:	4b8d      	ldr	r3, [pc, #564]	@ (802020c <tcp_split_unsent_seg+0x27c>)
 801ffd6:	f240 3253 	movw	r2, #851	@ 0x353
 801ffda:	498f      	ldr	r1, [pc, #572]	@ (8020218 <tcp_split_unsent_seg+0x288>)
 801ffdc:	488d      	ldr	r0, [pc, #564]	@ (8020214 <tcp_split_unsent_seg+0x284>)
 801ffde:	f00a f8ed 	bl	802a1bc <iprintf>
    return ERR_VAL;
 801ffe2:	f06f 0305 	mvn.w	r3, #5
 801ffe6:	e10c      	b.n	8020202 <tcp_split_unsent_seg+0x272>
  }

  if (useg->len <= split) {
 801ffe8:	697b      	ldr	r3, [r7, #20]
 801ffea:	891b      	ldrh	r3, [r3, #8]
 801ffec:	887a      	ldrh	r2, [r7, #2]
 801ffee:	429a      	cmp	r2, r3
 801fff0:	d301      	bcc.n	801fff6 <tcp_split_unsent_seg+0x66>
    return ERR_OK;
 801fff2:	2300      	movs	r3, #0
 801fff4:	e105      	b.n	8020202 <tcp_split_unsent_seg+0x272>
  }

  LWIP_ASSERT("split <= mss", split <= pcb->mss);
 801fff6:	687b      	ldr	r3, [r7, #4]
 801fff8:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801fffa:	887a      	ldrh	r2, [r7, #2]
 801fffc:	429a      	cmp	r2, r3
 801fffe:	d906      	bls.n	802000e <tcp_split_unsent_seg+0x7e>
 8020000:	4b82      	ldr	r3, [pc, #520]	@ (802020c <tcp_split_unsent_seg+0x27c>)
 8020002:	f240 325b 	movw	r2, #859	@ 0x35b
 8020006:	4985      	ldr	r1, [pc, #532]	@ (802021c <tcp_split_unsent_seg+0x28c>)
 8020008:	4882      	ldr	r0, [pc, #520]	@ (8020214 <tcp_split_unsent_seg+0x284>)
 802000a:	f00a f8d7 	bl	802a1bc <iprintf>
  LWIP_ASSERT("useg->len > 0", useg->len > 0);
 802000e:	697b      	ldr	r3, [r7, #20]
 8020010:	891b      	ldrh	r3, [r3, #8]
 8020012:	2b00      	cmp	r3, #0
 8020014:	d106      	bne.n	8020024 <tcp_split_unsent_seg+0x94>
 8020016:	4b7d      	ldr	r3, [pc, #500]	@ (802020c <tcp_split_unsent_seg+0x27c>)
 8020018:	f44f 7257 	mov.w	r2, #860	@ 0x35c
 802001c:	4980      	ldr	r1, [pc, #512]	@ (8020220 <tcp_split_unsent_seg+0x290>)
 802001e:	487d      	ldr	r0, [pc, #500]	@ (8020214 <tcp_split_unsent_seg+0x284>)
 8020020:	f00a f8cc 	bl	802a1bc <iprintf>
   * to split this packet so we may actually exceed the max value by
   * one!
   */
  LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_enqueue: split_unsent_seg: %u\n", (unsigned int)pcb->snd_queuelen));

  optflags = useg->flags;
 8020024:	697b      	ldr	r3, [r7, #20]
 8020026:	7b1b      	ldrb	r3, [r3, #12]
 8020028:	73fb      	strb	r3, [r7, #15]
#if TCP_CHECKSUM_ON_COPY
  /* Remove since checksum is not stored until after tcp_create_segment() */
  optflags &= ~TF_SEG_DATA_CHECKSUMMED;
#endif /* TCP_CHECKSUM_ON_COPY */
  optlen = LWIP_TCP_OPT_LENGTH(optflags);
 802002a:	7bfb      	ldrb	r3, [r7, #15]
 802002c:	009b      	lsls	r3, r3, #2
 802002e:	b2db      	uxtb	r3, r3
 8020030:	f003 0304 	and.w	r3, r3, #4
 8020034:	73bb      	strb	r3, [r7, #14]
  remainder = useg->len - split;
 8020036:	697b      	ldr	r3, [r7, #20]
 8020038:	891a      	ldrh	r2, [r3, #8]
 802003a:	887b      	ldrh	r3, [r7, #2]
 802003c:	1ad3      	subs	r3, r2, r3
 802003e:	81bb      	strh	r3, [r7, #12]

  /* Create new pbuf for the remainder of the split */
  p = pbuf_alloc(PBUF_TRANSPORT, remainder + optlen, PBUF_RAM);
 8020040:	7bbb      	ldrb	r3, [r7, #14]
 8020042:	b29a      	uxth	r2, r3
 8020044:	89bb      	ldrh	r3, [r7, #12]
 8020046:	4413      	add	r3, r2
 8020048:	b29b      	uxth	r3, r3
 802004a:	f44f 7220 	mov.w	r2, #640	@ 0x280
 802004e:	4619      	mov	r1, r3
 8020050:	2036      	movs	r0, #54	@ 0x36
 8020052:	f7fa fb25 	bl	801a6a0 <pbuf_alloc>
 8020056:	6138      	str	r0, [r7, #16]
  if (p == NULL) {
 8020058:	693b      	ldr	r3, [r7, #16]
 802005a:	2b00      	cmp	r3, #0
 802005c:	f000 80ba 	beq.w	80201d4 <tcp_split_unsent_seg+0x244>
                ("tcp_split_unsent_seg: could not allocate memory for pbuf remainder %u\n", remainder));
    goto memerr;
  }

  /* Offset into the original pbuf is past TCP/IP headers, options, and split amount */
  offset = useg->p->tot_len - useg->len + split;
 8020060:	697b      	ldr	r3, [r7, #20]
 8020062:	685b      	ldr	r3, [r3, #4]
 8020064:	891a      	ldrh	r2, [r3, #8]
 8020066:	697b      	ldr	r3, [r7, #20]
 8020068:	891b      	ldrh	r3, [r3, #8]
 802006a:	1ad3      	subs	r3, r2, r3
 802006c:	b29a      	uxth	r2, r3
 802006e:	887b      	ldrh	r3, [r7, #2]
 8020070:	4413      	add	r3, r2
 8020072:	817b      	strh	r3, [r7, #10]
  /* Copy remainder into new pbuf, headers and options will not be filled out */
  if (pbuf_copy_partial(useg->p, (u8_t *)p->payload + optlen, remainder, offset ) != remainder) {
 8020074:	697b      	ldr	r3, [r7, #20]
 8020076:	6858      	ldr	r0, [r3, #4]
 8020078:	693b      	ldr	r3, [r7, #16]
 802007a:	685a      	ldr	r2, [r3, #4]
 802007c:	7bbb      	ldrb	r3, [r7, #14]
 802007e:	18d1      	adds	r1, r2, r3
 8020080:	897b      	ldrh	r3, [r7, #10]
 8020082:	89ba      	ldrh	r2, [r7, #12]
 8020084:	f7fb f828 	bl	801b0d8 <pbuf_copy_partial>
 8020088:	4603      	mov	r3, r0
 802008a:	461a      	mov	r2, r3
 802008c:	89bb      	ldrh	r3, [r7, #12]
 802008e:	4293      	cmp	r3, r2
 8020090:	f040 80a2 	bne.w	80201d8 <tcp_split_unsent_seg+0x248>
#endif /* TCP_CHECKSUM_ON_COPY */

  /* Options are created when calling tcp_output() */

  /* Migrate flags from original segment */
  split_flags = TCPH_FLAGS(useg->tcphdr);
 8020094:	697b      	ldr	r3, [r7, #20]
 8020096:	691b      	ldr	r3, [r3, #16]
 8020098:	899b      	ldrh	r3, [r3, #12]
 802009a:	b29b      	uxth	r3, r3
 802009c:	4618      	mov	r0, r3
 802009e:	f7f9 f933 	bl	8019308 <lwip_htons>
 80200a2:	4603      	mov	r3, r0
 80200a4:	b2db      	uxtb	r3, r3
 80200a6:	f003 033f 	and.w	r3, r3, #63	@ 0x3f
 80200aa:	77fb      	strb	r3, [r7, #31]
  remainder_flags = 0; /* ACK added in tcp_output() */
 80200ac:	2300      	movs	r3, #0
 80200ae:	77bb      	strb	r3, [r7, #30]

  if (split_flags & TCP_PSH) {
 80200b0:	7ffb      	ldrb	r3, [r7, #31]
 80200b2:	f003 0308 	and.w	r3, r3, #8
 80200b6:	2b00      	cmp	r3, #0
 80200b8:	d007      	beq.n	80200ca <tcp_split_unsent_seg+0x13a>
    split_flags &= ~TCP_PSH;
 80200ba:	7ffb      	ldrb	r3, [r7, #31]
 80200bc:	f023 0308 	bic.w	r3, r3, #8
 80200c0:	77fb      	strb	r3, [r7, #31]
    remainder_flags |= TCP_PSH;
 80200c2:	7fbb      	ldrb	r3, [r7, #30]
 80200c4:	f043 0308 	orr.w	r3, r3, #8
 80200c8:	77bb      	strb	r3, [r7, #30]
  }
  if (split_flags & TCP_FIN) {
 80200ca:	7ffb      	ldrb	r3, [r7, #31]
 80200cc:	f003 0301 	and.w	r3, r3, #1
 80200d0:	2b00      	cmp	r3, #0
 80200d2:	d007      	beq.n	80200e4 <tcp_split_unsent_seg+0x154>
    split_flags &= ~TCP_FIN;
 80200d4:	7ffb      	ldrb	r3, [r7, #31]
 80200d6:	f023 0301 	bic.w	r3, r3, #1
 80200da:	77fb      	strb	r3, [r7, #31]
    remainder_flags |= TCP_FIN;
 80200dc:	7fbb      	ldrb	r3, [r7, #30]
 80200de:	f043 0301 	orr.w	r3, r3, #1
 80200e2:	77bb      	strb	r3, [r7, #30]
  }
  /* SYN should be left on split, RST should not be present with data */

  seg = tcp_create_segment(pcb, p, remainder_flags, lwip_ntohl(useg->tcphdr->seqno) + split, optflags);
 80200e4:	697b      	ldr	r3, [r7, #20]
 80200e6:	691b      	ldr	r3, [r3, #16]
 80200e8:	685b      	ldr	r3, [r3, #4]
 80200ea:	4618      	mov	r0, r3
 80200ec:	f7f9 f921 	bl	8019332 <lwip_htonl>
 80200f0:	4602      	mov	r2, r0
 80200f2:	887b      	ldrh	r3, [r7, #2]
 80200f4:	18d1      	adds	r1, r2, r3
 80200f6:	7fba      	ldrb	r2, [r7, #30]
 80200f8:	7bfb      	ldrb	r3, [r7, #15]
 80200fa:	9300      	str	r3, [sp, #0]
 80200fc:	460b      	mov	r3, r1
 80200fe:	6939      	ldr	r1, [r7, #16]
 8020100:	6878      	ldr	r0, [r7, #4]
 8020102:	f7ff f9f1 	bl	801f4e8 <tcp_create_segment>
 8020106:	61b8      	str	r0, [r7, #24]
  if (seg == NULL) {
 8020108:	69bb      	ldr	r3, [r7, #24]
 802010a:	2b00      	cmp	r3, #0
 802010c:	d066      	beq.n	80201dc <tcp_split_unsent_seg+0x24c>
  seg->chksum_swapped = chksum_swapped;
  seg->flags |= TF_SEG_DATA_CHECKSUMMED;
#endif /* TCP_CHECKSUM_ON_COPY */

  /* Remove this segment from the queue since trimming it may free pbufs */
  pcb->snd_queuelen -= pbuf_clen(useg->p);
 802010e:	697b      	ldr	r3, [r7, #20]
 8020110:	685b      	ldr	r3, [r3, #4]
 8020112:	4618      	mov	r0, r3
 8020114:	f7fa fe68 	bl	801ade8 <pbuf_clen>
 8020118:	4603      	mov	r3, r0
 802011a:	461a      	mov	r2, r3
 802011c:	687b      	ldr	r3, [r7, #4]
 802011e:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 8020122:	1a9b      	subs	r3, r3, r2
 8020124:	b29a      	uxth	r2, r3
 8020126:	687b      	ldr	r3, [r7, #4]
 8020128:	f8a3 2066 	strh.w	r2, [r3, #102]	@ 0x66

  /* Trim the original pbuf into our split size.  At this point our remainder segment must be setup
  successfully because we are modifying the original segment */
  pbuf_realloc(useg->p, useg->p->tot_len - remainder);
 802012c:	697b      	ldr	r3, [r7, #20]
 802012e:	6858      	ldr	r0, [r3, #4]
 8020130:	697b      	ldr	r3, [r7, #20]
 8020132:	685b      	ldr	r3, [r3, #4]
 8020134:	891a      	ldrh	r2, [r3, #8]
 8020136:	89bb      	ldrh	r3, [r7, #12]
 8020138:	1ad3      	subs	r3, r2, r3
 802013a:	b29b      	uxth	r3, r3
 802013c:	4619      	mov	r1, r3
 802013e:	f7fa fc0f 	bl	801a960 <pbuf_realloc>
  useg->len -= remainder;
 8020142:	697b      	ldr	r3, [r7, #20]
 8020144:	891a      	ldrh	r2, [r3, #8]
 8020146:	89bb      	ldrh	r3, [r7, #12]
 8020148:	1ad3      	subs	r3, r2, r3
 802014a:	b29a      	uxth	r2, r3
 802014c:	697b      	ldr	r3, [r7, #20]
 802014e:	811a      	strh	r2, [r3, #8]
  TCPH_SET_FLAG(useg->tcphdr, split_flags);
 8020150:	697b      	ldr	r3, [r7, #20]
 8020152:	691b      	ldr	r3, [r3, #16]
 8020154:	899b      	ldrh	r3, [r3, #12]
 8020156:	b29c      	uxth	r4, r3
 8020158:	7ffb      	ldrb	r3, [r7, #31]
 802015a:	b29b      	uxth	r3, r3
 802015c:	4618      	mov	r0, r3
 802015e:	f7f9 f8d3 	bl	8019308 <lwip_htons>
 8020162:	4603      	mov	r3, r0
 8020164:	461a      	mov	r2, r3
 8020166:	697b      	ldr	r3, [r7, #20]
 8020168:	691b      	ldr	r3, [r3, #16]
 802016a:	4322      	orrs	r2, r4
 802016c:	b292      	uxth	r2, r2
 802016e:	819a      	strh	r2, [r3, #12]
#if TCP_OVERSIZE_DBGCHECK
  /* By trimming, realloc may have actually shrunk the pbuf, so clear oversize_left */
  useg->oversize_left = 0;
 8020170:	697b      	ldr	r3, [r7, #20]
 8020172:	2200      	movs	r2, #0
 8020174:	815a      	strh	r2, [r3, #10]
#endif /* TCP_OVERSIZE_DBGCHECK */

  /* Add back to the queue with new trimmed pbuf */
  pcb->snd_queuelen += pbuf_clen(useg->p);
 8020176:	697b      	ldr	r3, [r7, #20]
 8020178:	685b      	ldr	r3, [r3, #4]
 802017a:	4618      	mov	r0, r3
 802017c:	f7fa fe34 	bl	801ade8 <pbuf_clen>
 8020180:	4603      	mov	r3, r0
 8020182:	461a      	mov	r2, r3
 8020184:	687b      	ldr	r3, [r7, #4]
 8020186:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 802018a:	4413      	add	r3, r2
 802018c:	b29a      	uxth	r2, r3
 802018e:	687b      	ldr	r3, [r7, #4]
 8020190:	f8a3 2066 	strh.w	r2, [r3, #102]	@ 0x66
#endif /* TCP_CHECKSUM_ON_COPY */

  /* Update number of segments on the queues. Note that length now may
   * exceed TCP_SND_QUEUELEN! We don't have to touch pcb->snd_buf
   * because the total amount of data is constant when packet is split */
  pcb->snd_queuelen += pbuf_clen(seg->p);
 8020194:	69bb      	ldr	r3, [r7, #24]
 8020196:	685b      	ldr	r3, [r3, #4]
 8020198:	4618      	mov	r0, r3
 802019a:	f7fa fe25 	bl	801ade8 <pbuf_clen>
 802019e:	4603      	mov	r3, r0
 80201a0:	461a      	mov	r2, r3
 80201a2:	687b      	ldr	r3, [r7, #4]
 80201a4:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 80201a8:	4413      	add	r3, r2
 80201aa:	b29a      	uxth	r2, r3
 80201ac:	687b      	ldr	r3, [r7, #4]
 80201ae:	f8a3 2066 	strh.w	r2, [r3, #102]	@ 0x66

  /* Finally insert remainder into queue after split (which stays head) */
  seg->next = useg->next;
 80201b2:	697b      	ldr	r3, [r7, #20]
 80201b4:	681a      	ldr	r2, [r3, #0]
 80201b6:	69bb      	ldr	r3, [r7, #24]
 80201b8:	601a      	str	r2, [r3, #0]
  useg->next = seg;
 80201ba:	697b      	ldr	r3, [r7, #20]
 80201bc:	69ba      	ldr	r2, [r7, #24]
 80201be:	601a      	str	r2, [r3, #0]

#if TCP_OVERSIZE
  /* If remainder is last segment on the unsent, ensure we clear the oversize amount
   * because the remainder is always sized to the exact remaining amount */
  if (seg->next == NULL) {
 80201c0:	69bb      	ldr	r3, [r7, #24]
 80201c2:	681b      	ldr	r3, [r3, #0]
 80201c4:	2b00      	cmp	r3, #0
 80201c6:	d103      	bne.n	80201d0 <tcp_split_unsent_seg+0x240>
    pcb->unsent_oversize = 0;
 80201c8:	687b      	ldr	r3, [r7, #4]
 80201ca:	2200      	movs	r2, #0
 80201cc:	f8a3 2068 	strh.w	r2, [r3, #104]	@ 0x68
  }
#endif /* TCP_OVERSIZE */

  return ERR_OK;
 80201d0:	2300      	movs	r3, #0
 80201d2:	e016      	b.n	8020202 <tcp_split_unsent_seg+0x272>
    goto memerr;
 80201d4:	bf00      	nop
 80201d6:	e002      	b.n	80201de <tcp_split_unsent_seg+0x24e>
    goto memerr;
 80201d8:	bf00      	nop
 80201da:	e000      	b.n	80201de <tcp_split_unsent_seg+0x24e>
    goto memerr;
 80201dc:	bf00      	nop
memerr:
  TCP_STATS_INC(tcp.memerr);

  LWIP_ASSERT("seg == NULL", seg == NULL);
 80201de:	69bb      	ldr	r3, [r7, #24]
 80201e0:	2b00      	cmp	r3, #0
 80201e2:	d006      	beq.n	80201f2 <tcp_split_unsent_seg+0x262>
 80201e4:	4b09      	ldr	r3, [pc, #36]	@ (802020c <tcp_split_unsent_seg+0x27c>)
 80201e6:	f44f 7276 	mov.w	r2, #984	@ 0x3d8
 80201ea:	490e      	ldr	r1, [pc, #56]	@ (8020224 <tcp_split_unsent_seg+0x294>)
 80201ec:	4809      	ldr	r0, [pc, #36]	@ (8020214 <tcp_split_unsent_seg+0x284>)
 80201ee:	f009 ffe5 	bl	802a1bc <iprintf>
  if (p != NULL) {
 80201f2:	693b      	ldr	r3, [r7, #16]
 80201f4:	2b00      	cmp	r3, #0
 80201f6:	d002      	beq.n	80201fe <tcp_split_unsent_seg+0x26e>
    pbuf_free(p);
 80201f8:	6938      	ldr	r0, [r7, #16]
 80201fa:	f7fa fd67 	bl	801accc <pbuf_free>
  }

  return ERR_MEM;
 80201fe:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
}
 8020202:	4618      	mov	r0, r3
 8020204:	3724      	adds	r7, #36	@ 0x24
 8020206:	46bd      	mov	sp, r7
 8020208:	bd90      	pop	{r4, r7, pc}
 802020a:	bf00      	nop
 802020c:	0802fa24 	.word	0x0802fa24
 8020210:	0802fe14 	.word	0x0802fe14
 8020214:	0802fa78 	.word	0x0802fa78
 8020218:	0802fe38 	.word	0x0802fe38
 802021c:	0802fe5c 	.word	0x0802fe5c
 8020220:	0802fe6c 	.word	0x0802fe6c
 8020224:	0802fe7c 	.word	0x0802fe7c

08020228 <tcp_send_fin>:
 * @param pcb the tcp_pcb over which to send a segment
 * @return ERR_OK if sent, another err_t otherwise
 */
err_t
tcp_send_fin(struct tcp_pcb *pcb)
{
 8020228:	b590      	push	{r4, r7, lr}
 802022a:	b085      	sub	sp, #20
 802022c:	af00      	add	r7, sp, #0
 802022e:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT("tcp_send_fin: invalid pcb", pcb != NULL);
 8020230:	687b      	ldr	r3, [r7, #4]
 8020232:	2b00      	cmp	r3, #0
 8020234:	d106      	bne.n	8020244 <tcp_send_fin+0x1c>
 8020236:	4b21      	ldr	r3, [pc, #132]	@ (80202bc <tcp_send_fin+0x94>)
 8020238:	f240 32eb 	movw	r2, #1003	@ 0x3eb
 802023c:	4920      	ldr	r1, [pc, #128]	@ (80202c0 <tcp_send_fin+0x98>)
 802023e:	4821      	ldr	r0, [pc, #132]	@ (80202c4 <tcp_send_fin+0x9c>)
 8020240:	f009 ffbc 	bl	802a1bc <iprintf>

  /* first, try to add the fin to the last unsent segment */
  if (pcb->unsent != NULL) {
 8020244:	687b      	ldr	r3, [r7, #4]
 8020246:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8020248:	2b00      	cmp	r3, #0
 802024a:	d02e      	beq.n	80202aa <tcp_send_fin+0x82>
    struct tcp_seg *last_unsent;
    for (last_unsent = pcb->unsent; last_unsent->next != NULL;
 802024c:	687b      	ldr	r3, [r7, #4]
 802024e:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8020250:	60fb      	str	r3, [r7, #12]
 8020252:	e002      	b.n	802025a <tcp_send_fin+0x32>
         last_unsent = last_unsent->next);
 8020254:	68fb      	ldr	r3, [r7, #12]
 8020256:	681b      	ldr	r3, [r3, #0]
 8020258:	60fb      	str	r3, [r7, #12]
    for (last_unsent = pcb->unsent; last_unsent->next != NULL;
 802025a:	68fb      	ldr	r3, [r7, #12]
 802025c:	681b      	ldr	r3, [r3, #0]
 802025e:	2b00      	cmp	r3, #0
 8020260:	d1f8      	bne.n	8020254 <tcp_send_fin+0x2c>

    if ((TCPH_FLAGS(last_unsent->tcphdr) & (TCP_SYN | TCP_FIN | TCP_RST)) == 0) {
 8020262:	68fb      	ldr	r3, [r7, #12]
 8020264:	691b      	ldr	r3, [r3, #16]
 8020266:	899b      	ldrh	r3, [r3, #12]
 8020268:	b29b      	uxth	r3, r3
 802026a:	4618      	mov	r0, r3
 802026c:	f7f9 f84c 	bl	8019308 <lwip_htons>
 8020270:	4603      	mov	r3, r0
 8020272:	b2db      	uxtb	r3, r3
 8020274:	f003 0307 	and.w	r3, r3, #7
 8020278:	2b00      	cmp	r3, #0
 802027a:	d116      	bne.n	80202aa <tcp_send_fin+0x82>
      /* no SYN/FIN/RST flag in the header, we can add the FIN flag */
      TCPH_SET_FLAG(last_unsent->tcphdr, TCP_FIN);
 802027c:	68fb      	ldr	r3, [r7, #12]
 802027e:	691b      	ldr	r3, [r3, #16]
 8020280:	899b      	ldrh	r3, [r3, #12]
 8020282:	b29c      	uxth	r4, r3
 8020284:	2001      	movs	r0, #1
 8020286:	f7f9 f83f 	bl	8019308 <lwip_htons>
 802028a:	4603      	mov	r3, r0
 802028c:	461a      	mov	r2, r3
 802028e:	68fb      	ldr	r3, [r7, #12]
 8020290:	691b      	ldr	r3, [r3, #16]
 8020292:	4322      	orrs	r2, r4
 8020294:	b292      	uxth	r2, r2
 8020296:	819a      	strh	r2, [r3, #12]
      tcp_set_flags(pcb, TF_FIN);
 8020298:	687b      	ldr	r3, [r7, #4]
 802029a:	8b5b      	ldrh	r3, [r3, #26]
 802029c:	f043 0320 	orr.w	r3, r3, #32
 80202a0:	b29a      	uxth	r2, r3
 80202a2:	687b      	ldr	r3, [r7, #4]
 80202a4:	835a      	strh	r2, [r3, #26]
      return ERR_OK;
 80202a6:	2300      	movs	r3, #0
 80202a8:	e004      	b.n	80202b4 <tcp_send_fin+0x8c>
    }
  }
  /* no data, no length, flags, copy=1, no optdata */
  return tcp_enqueue_flags(pcb, TCP_FIN);
 80202aa:	2101      	movs	r1, #1
 80202ac:	6878      	ldr	r0, [r7, #4]
 80202ae:	f000 f80b 	bl	80202c8 <tcp_enqueue_flags>
 80202b2:	4603      	mov	r3, r0
}
 80202b4:	4618      	mov	r0, r3
 80202b6:	3714      	adds	r7, #20
 80202b8:	46bd      	mov	sp, r7
 80202ba:	bd90      	pop	{r4, r7, pc}
 80202bc:	0802fa24 	.word	0x0802fa24
 80202c0:	0802fe88 	.word	0x0802fe88
 80202c4:	0802fa78 	.word	0x0802fa78

080202c8 <tcp_enqueue_flags>:
 * @param pcb Protocol control block for the TCP connection.
 * @param flags TCP header flags to set in the outgoing segment.
 */
err_t
tcp_enqueue_flags(struct tcp_pcb *pcb, u8_t flags)
{
 80202c8:	b580      	push	{r7, lr}
 80202ca:	b088      	sub	sp, #32
 80202cc:	af02      	add	r7, sp, #8
 80202ce:	6078      	str	r0, [r7, #4]
 80202d0:	460b      	mov	r3, r1
 80202d2:	70fb      	strb	r3, [r7, #3]
  struct pbuf *p;
  struct tcp_seg *seg;
  u8_t optflags = 0;
 80202d4:	2300      	movs	r3, #0
 80202d6:	75fb      	strb	r3, [r7, #23]
  u8_t optlen = 0;
 80202d8:	2300      	movs	r3, #0
 80202da:	75bb      	strb	r3, [r7, #22]

  LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_enqueue_flags: queuelen: %"U16_F"\n", (u16_t)pcb->snd_queuelen));

  LWIP_ASSERT("tcp_enqueue_flags: need either TCP_SYN or TCP_FIN in flags (programmer violates API)",
 80202dc:	78fb      	ldrb	r3, [r7, #3]
 80202de:	f003 0303 	and.w	r3, r3, #3
 80202e2:	2b00      	cmp	r3, #0
 80202e4:	d106      	bne.n	80202f4 <tcp_enqueue_flags+0x2c>
 80202e6:	4b67      	ldr	r3, [pc, #412]	@ (8020484 <tcp_enqueue_flags+0x1bc>)
 80202e8:	f240 4211 	movw	r2, #1041	@ 0x411
 80202ec:	4966      	ldr	r1, [pc, #408]	@ (8020488 <tcp_enqueue_flags+0x1c0>)
 80202ee:	4867      	ldr	r0, [pc, #412]	@ (802048c <tcp_enqueue_flags+0x1c4>)
 80202f0:	f009 ff64 	bl	802a1bc <iprintf>
              (flags & (TCP_SYN | TCP_FIN)) != 0);
  LWIP_ASSERT("tcp_enqueue_flags: invalid pcb", pcb != NULL);
 80202f4:	687b      	ldr	r3, [r7, #4]
 80202f6:	2b00      	cmp	r3, #0
 80202f8:	d106      	bne.n	8020308 <tcp_enqueue_flags+0x40>
 80202fa:	4b62      	ldr	r3, [pc, #392]	@ (8020484 <tcp_enqueue_flags+0x1bc>)
 80202fc:	f240 4213 	movw	r2, #1043	@ 0x413
 8020300:	4963      	ldr	r1, [pc, #396]	@ (8020490 <tcp_enqueue_flags+0x1c8>)
 8020302:	4862      	ldr	r0, [pc, #392]	@ (802048c <tcp_enqueue_flags+0x1c4>)
 8020304:	f009 ff5a 	bl	802a1bc <iprintf>

  /* No need to check pcb->snd_queuelen if only SYN or FIN are allowed! */

  /* Get options for this segment. This is a special case since this is the
     only place where a SYN can be sent. */
  if (flags & TCP_SYN) {
 8020308:	78fb      	ldrb	r3, [r7, #3]
 802030a:	f003 0302 	and.w	r3, r3, #2
 802030e:	2b00      	cmp	r3, #0
 8020310:	d001      	beq.n	8020316 <tcp_enqueue_flags+0x4e>
    optflags = TF_SEG_OPTS_MSS;
 8020312:	2301      	movs	r3, #1
 8020314:	75fb      	strb	r3, [r7, #23]
    /* Make sure the timestamp option is only included in data segments if we
       agreed about it with the remote host (and in active open SYN segments). */
    optflags |= TF_SEG_OPTS_TS;
  }
#endif /* LWIP_TCP_TIMESTAMPS */
  optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(optflags, pcb);
 8020316:	7dfb      	ldrb	r3, [r7, #23]
 8020318:	009b      	lsls	r3, r3, #2
 802031a:	b2db      	uxtb	r3, r3
 802031c:	f003 0304 	and.w	r3, r3, #4
 8020320:	75bb      	strb	r3, [r7, #22]

  /* Allocate pbuf with room for TCP header + options */
  if ((p = pbuf_alloc(PBUF_TRANSPORT, optlen, PBUF_RAM)) == NULL) {
 8020322:	7dbb      	ldrb	r3, [r7, #22]
 8020324:	b29b      	uxth	r3, r3
 8020326:	f44f 7220 	mov.w	r2, #640	@ 0x280
 802032a:	4619      	mov	r1, r3
 802032c:	2036      	movs	r0, #54	@ 0x36
 802032e:	f7fa f9b7 	bl	801a6a0 <pbuf_alloc>
 8020332:	60f8      	str	r0, [r7, #12]
 8020334:	68fb      	ldr	r3, [r7, #12]
 8020336:	2b00      	cmp	r3, #0
 8020338:	d109      	bne.n	802034e <tcp_enqueue_flags+0x86>
    tcp_set_flags(pcb, TF_NAGLEMEMERR);
 802033a:	687b      	ldr	r3, [r7, #4]
 802033c:	8b5b      	ldrh	r3, [r3, #26]
 802033e:	f043 0380 	orr.w	r3, r3, #128	@ 0x80
 8020342:	b29a      	uxth	r2, r3
 8020344:	687b      	ldr	r3, [r7, #4]
 8020346:	835a      	strh	r2, [r3, #26]
    TCP_STATS_INC(tcp.memerr);
    return ERR_MEM;
 8020348:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 802034c:	e095      	b.n	802047a <tcp_enqueue_flags+0x1b2>
  }
  LWIP_ASSERT("tcp_enqueue_flags: check that first pbuf can hold optlen",
 802034e:	68fb      	ldr	r3, [r7, #12]
 8020350:	895a      	ldrh	r2, [r3, #10]
 8020352:	7dbb      	ldrb	r3, [r7, #22]
 8020354:	b29b      	uxth	r3, r3
 8020356:	429a      	cmp	r2, r3
 8020358:	d206      	bcs.n	8020368 <tcp_enqueue_flags+0xa0>
 802035a:	4b4a      	ldr	r3, [pc, #296]	@ (8020484 <tcp_enqueue_flags+0x1bc>)
 802035c:	f240 4239 	movw	r2, #1081	@ 0x439
 8020360:	494c      	ldr	r1, [pc, #304]	@ (8020494 <tcp_enqueue_flags+0x1cc>)
 8020362:	484a      	ldr	r0, [pc, #296]	@ (802048c <tcp_enqueue_flags+0x1c4>)
 8020364:	f009 ff2a 	bl	802a1bc <iprintf>
              (p->len >= optlen));

  /* Allocate memory for tcp_seg, and fill in fields. */
  if ((seg = tcp_create_segment(pcb, p, flags, pcb->snd_lbb, optflags)) == NULL) {
 8020368:	687b      	ldr	r3, [r7, #4]
 802036a:	6dd9      	ldr	r1, [r3, #92]	@ 0x5c
 802036c:	78fa      	ldrb	r2, [r7, #3]
 802036e:	7dfb      	ldrb	r3, [r7, #23]
 8020370:	9300      	str	r3, [sp, #0]
 8020372:	460b      	mov	r3, r1
 8020374:	68f9      	ldr	r1, [r7, #12]
 8020376:	6878      	ldr	r0, [r7, #4]
 8020378:	f7ff f8b6 	bl	801f4e8 <tcp_create_segment>
 802037c:	60b8      	str	r0, [r7, #8]
 802037e:	68bb      	ldr	r3, [r7, #8]
 8020380:	2b00      	cmp	r3, #0
 8020382:	d109      	bne.n	8020398 <tcp_enqueue_flags+0xd0>
    tcp_set_flags(pcb, TF_NAGLEMEMERR);
 8020384:	687b      	ldr	r3, [r7, #4]
 8020386:	8b5b      	ldrh	r3, [r3, #26]
 8020388:	f043 0380 	orr.w	r3, r3, #128	@ 0x80
 802038c:	b29a      	uxth	r2, r3
 802038e:	687b      	ldr	r3, [r7, #4]
 8020390:	835a      	strh	r2, [r3, #26]
    TCP_STATS_INC(tcp.memerr);
    return ERR_MEM;
 8020392:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8020396:	e070      	b.n	802047a <tcp_enqueue_flags+0x1b2>
  }
  LWIP_ASSERT("seg->tcphdr not aligned", ((mem_ptr_t)seg->tcphdr % LWIP_MIN(MEM_ALIGNMENT, 4)) == 0);
 8020398:	68bb      	ldr	r3, [r7, #8]
 802039a:	691b      	ldr	r3, [r3, #16]
 802039c:	f003 0303 	and.w	r3, r3, #3
 80203a0:	2b00      	cmp	r3, #0
 80203a2:	d006      	beq.n	80203b2 <tcp_enqueue_flags+0xea>
 80203a4:	4b37      	ldr	r3, [pc, #220]	@ (8020484 <tcp_enqueue_flags+0x1bc>)
 80203a6:	f240 4242 	movw	r2, #1090	@ 0x442
 80203aa:	493b      	ldr	r1, [pc, #236]	@ (8020498 <tcp_enqueue_flags+0x1d0>)
 80203ac:	4837      	ldr	r0, [pc, #220]	@ (802048c <tcp_enqueue_flags+0x1c4>)
 80203ae:	f009 ff05 	bl	802a1bc <iprintf>
  LWIP_ASSERT("tcp_enqueue_flags: invalid segment length", seg->len == 0);
 80203b2:	68bb      	ldr	r3, [r7, #8]
 80203b4:	891b      	ldrh	r3, [r3, #8]
 80203b6:	2b00      	cmp	r3, #0
 80203b8:	d006      	beq.n	80203c8 <tcp_enqueue_flags+0x100>
 80203ba:	4b32      	ldr	r3, [pc, #200]	@ (8020484 <tcp_enqueue_flags+0x1bc>)
 80203bc:	f240 4243 	movw	r2, #1091	@ 0x443
 80203c0:	4936      	ldr	r1, [pc, #216]	@ (802049c <tcp_enqueue_flags+0x1d4>)
 80203c2:	4832      	ldr	r0, [pc, #200]	@ (802048c <tcp_enqueue_flags+0x1c4>)
 80203c4:	f009 fefa 	bl	802a1bc <iprintf>
               lwip_ntohl(seg->tcphdr->seqno),
               lwip_ntohl(seg->tcphdr->seqno) + TCP_TCPLEN(seg),
               (u16_t)flags));

  /* Now append seg to pcb->unsent queue */
  if (pcb->unsent == NULL) {
 80203c8:	687b      	ldr	r3, [r7, #4]
 80203ca:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 80203cc:	2b00      	cmp	r3, #0
 80203ce:	d103      	bne.n	80203d8 <tcp_enqueue_flags+0x110>
    pcb->unsent = seg;
 80203d0:	687b      	ldr	r3, [r7, #4]
 80203d2:	68ba      	ldr	r2, [r7, #8]
 80203d4:	66da      	str	r2, [r3, #108]	@ 0x6c
 80203d6:	e00d      	b.n	80203f4 <tcp_enqueue_flags+0x12c>
  } else {
    struct tcp_seg *useg;
    for (useg = pcb->unsent; useg->next != NULL; useg = useg->next);
 80203d8:	687b      	ldr	r3, [r7, #4]
 80203da:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 80203dc:	613b      	str	r3, [r7, #16]
 80203de:	e002      	b.n	80203e6 <tcp_enqueue_flags+0x11e>
 80203e0:	693b      	ldr	r3, [r7, #16]
 80203e2:	681b      	ldr	r3, [r3, #0]
 80203e4:	613b      	str	r3, [r7, #16]
 80203e6:	693b      	ldr	r3, [r7, #16]
 80203e8:	681b      	ldr	r3, [r3, #0]
 80203ea:	2b00      	cmp	r3, #0
 80203ec:	d1f8      	bne.n	80203e0 <tcp_enqueue_flags+0x118>
    useg->next = seg;
 80203ee:	693b      	ldr	r3, [r7, #16]
 80203f0:	68ba      	ldr	r2, [r7, #8]
 80203f2:	601a      	str	r2, [r3, #0]
  }
#if TCP_OVERSIZE
  /* The new unsent tail has no space */
  pcb->unsent_oversize = 0;
 80203f4:	687b      	ldr	r3, [r7, #4]
 80203f6:	2200      	movs	r2, #0
 80203f8:	f8a3 2068 	strh.w	r2, [r3, #104]	@ 0x68
#endif /* TCP_OVERSIZE */

  /* SYN and FIN bump the sequence number */
  if ((flags & TCP_SYN) || (flags & TCP_FIN)) {
 80203fc:	78fb      	ldrb	r3, [r7, #3]
 80203fe:	f003 0302 	and.w	r3, r3, #2
 8020402:	2b00      	cmp	r3, #0
 8020404:	d104      	bne.n	8020410 <tcp_enqueue_flags+0x148>
 8020406:	78fb      	ldrb	r3, [r7, #3]
 8020408:	f003 0301 	and.w	r3, r3, #1
 802040c:	2b00      	cmp	r3, #0
 802040e:	d004      	beq.n	802041a <tcp_enqueue_flags+0x152>
    pcb->snd_lbb++;
 8020410:	687b      	ldr	r3, [r7, #4]
 8020412:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 8020414:	1c5a      	adds	r2, r3, #1
 8020416:	687b      	ldr	r3, [r7, #4]
 8020418:	65da      	str	r2, [r3, #92]	@ 0x5c
    /* optlen does not influence snd_buf */
  }
  if (flags & TCP_FIN) {
 802041a:	78fb      	ldrb	r3, [r7, #3]
 802041c:	f003 0301 	and.w	r3, r3, #1
 8020420:	2b00      	cmp	r3, #0
 8020422:	d006      	beq.n	8020432 <tcp_enqueue_flags+0x16a>
    tcp_set_flags(pcb, TF_FIN);
 8020424:	687b      	ldr	r3, [r7, #4]
 8020426:	8b5b      	ldrh	r3, [r3, #26]
 8020428:	f043 0320 	orr.w	r3, r3, #32
 802042c:	b29a      	uxth	r2, r3
 802042e:	687b      	ldr	r3, [r7, #4]
 8020430:	835a      	strh	r2, [r3, #26]
  }

  /* update number of segments on the queues */
  pcb->snd_queuelen += pbuf_clen(seg->p);
 8020432:	68bb      	ldr	r3, [r7, #8]
 8020434:	685b      	ldr	r3, [r3, #4]
 8020436:	4618      	mov	r0, r3
 8020438:	f7fa fcd6 	bl	801ade8 <pbuf_clen>
 802043c:	4603      	mov	r3, r0
 802043e:	461a      	mov	r2, r3
 8020440:	687b      	ldr	r3, [r7, #4]
 8020442:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 8020446:	4413      	add	r3, r2
 8020448:	b29a      	uxth	r2, r3
 802044a:	687b      	ldr	r3, [r7, #4]
 802044c:	f8a3 2066 	strh.w	r2, [r3, #102]	@ 0x66
  LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_enqueue_flags: %"S16_F" (after enqueued)\n", pcb->snd_queuelen));
  if (pcb->snd_queuelen != 0) {
 8020450:	687b      	ldr	r3, [r7, #4]
 8020452:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 8020456:	2b00      	cmp	r3, #0
 8020458:	d00e      	beq.n	8020478 <tcp_enqueue_flags+0x1b0>
    LWIP_ASSERT("tcp_enqueue_flags: invalid queue length",
 802045a:	687b      	ldr	r3, [r7, #4]
 802045c:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 802045e:	2b00      	cmp	r3, #0
 8020460:	d10a      	bne.n	8020478 <tcp_enqueue_flags+0x1b0>
 8020462:	687b      	ldr	r3, [r7, #4]
 8020464:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8020466:	2b00      	cmp	r3, #0
 8020468:	d106      	bne.n	8020478 <tcp_enqueue_flags+0x1b0>
 802046a:	4b06      	ldr	r3, [pc, #24]	@ (8020484 <tcp_enqueue_flags+0x1bc>)
 802046c:	f240 4265 	movw	r2, #1125	@ 0x465
 8020470:	490b      	ldr	r1, [pc, #44]	@ (80204a0 <tcp_enqueue_flags+0x1d8>)
 8020472:	4806      	ldr	r0, [pc, #24]	@ (802048c <tcp_enqueue_flags+0x1c4>)
 8020474:	f009 fea2 	bl	802a1bc <iprintf>
                pcb->unacked != NULL || pcb->unsent != NULL);
  }

  return ERR_OK;
 8020478:	2300      	movs	r3, #0
}
 802047a:	4618      	mov	r0, r3
 802047c:	3718      	adds	r7, #24
 802047e:	46bd      	mov	sp, r7
 8020480:	bd80      	pop	{r7, pc}
 8020482:	bf00      	nop
 8020484:	0802fa24 	.word	0x0802fa24
 8020488:	0802fea4 	.word	0x0802fea4
 802048c:	0802fa78 	.word	0x0802fa78
 8020490:	0802fefc 	.word	0x0802fefc
 8020494:	0802ff1c 	.word	0x0802ff1c
 8020498:	0802ff58 	.word	0x0802ff58
 802049c:	0802ff70 	.word	0x0802ff70
 80204a0:	0802ff9c 	.word	0x0802ff9c

080204a4 <tcp_output>:
 * @return ERR_OK if data has been sent or nothing to send
 *         another err_t on error
 */
err_t
tcp_output(struct tcp_pcb *pcb)
{
 80204a4:	b5b0      	push	{r4, r5, r7, lr}
 80204a6:	b08a      	sub	sp, #40	@ 0x28
 80204a8:	af00      	add	r7, sp, #0
 80204aa:	6078      	str	r0, [r7, #4]
  struct netif *netif;
#if TCP_CWND_DEBUG
  s16_t i = 0;
#endif /* TCP_CWND_DEBUG */

  LWIP_ASSERT_CORE_LOCKED();
 80204ac:	f7f0 fae6 	bl	8010a7c <sys_check_core_locking>

  LWIP_ASSERT("tcp_output: invalid pcb", pcb != NULL);
 80204b0:	687b      	ldr	r3, [r7, #4]
 80204b2:	2b00      	cmp	r3, #0
 80204b4:	d106      	bne.n	80204c4 <tcp_output+0x20>
 80204b6:	4b8a      	ldr	r3, [pc, #552]	@ (80206e0 <tcp_output+0x23c>)
 80204b8:	f240 42e1 	movw	r2, #1249	@ 0x4e1
 80204bc:	4989      	ldr	r1, [pc, #548]	@ (80206e4 <tcp_output+0x240>)
 80204be:	488a      	ldr	r0, [pc, #552]	@ (80206e8 <tcp_output+0x244>)
 80204c0:	f009 fe7c 	bl	802a1bc <iprintf>
  /* pcb->state LISTEN not allowed here */
  LWIP_ASSERT("don't call tcp_output for listen-pcbs",
 80204c4:	687b      	ldr	r3, [r7, #4]
 80204c6:	7d1b      	ldrb	r3, [r3, #20]
 80204c8:	2b01      	cmp	r3, #1
 80204ca:	d106      	bne.n	80204da <tcp_output+0x36>
 80204cc:	4b84      	ldr	r3, [pc, #528]	@ (80206e0 <tcp_output+0x23c>)
 80204ce:	f240 42e3 	movw	r2, #1251	@ 0x4e3
 80204d2:	4986      	ldr	r1, [pc, #536]	@ (80206ec <tcp_output+0x248>)
 80204d4:	4884      	ldr	r0, [pc, #528]	@ (80206e8 <tcp_output+0x244>)
 80204d6:	f009 fe71 	bl	802a1bc <iprintf>

  /* First, check if we are invoked by the TCP input processing
     code. If so, we do not output anything. Instead, we rely on the
     input processing code to call us when input processing is done
     with. */
  if (tcp_input_pcb == pcb) {
 80204da:	4b85      	ldr	r3, [pc, #532]	@ (80206f0 <tcp_output+0x24c>)
 80204dc:	681b      	ldr	r3, [r3, #0]
 80204de:	687a      	ldr	r2, [r7, #4]
 80204e0:	429a      	cmp	r2, r3
 80204e2:	d101      	bne.n	80204e8 <tcp_output+0x44>
    return ERR_OK;
 80204e4:	2300      	movs	r3, #0
 80204e6:	e1d1      	b.n	802088c <tcp_output+0x3e8>
  }

  wnd = LWIP_MIN(pcb->snd_wnd, pcb->cwnd);
 80204e8:	687b      	ldr	r3, [r7, #4]
 80204ea:	f8b3 2048 	ldrh.w	r2, [r3, #72]	@ 0x48
 80204ee:	687b      	ldr	r3, [r7, #4]
 80204f0:	f8b3 3060 	ldrh.w	r3, [r3, #96]	@ 0x60
 80204f4:	4293      	cmp	r3, r2
 80204f6:	bf28      	it	cs
 80204f8:	4613      	movcs	r3, r2
 80204fa:	b29b      	uxth	r3, r3
 80204fc:	61bb      	str	r3, [r7, #24]

  seg = pcb->unsent;
 80204fe:	687b      	ldr	r3, [r7, #4]
 8020500:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8020502:	627b      	str	r3, [r7, #36]	@ 0x24

  if (seg == NULL) {
 8020504:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8020506:	2b00      	cmp	r3, #0
 8020508:	d10b      	bne.n	8020522 <tcp_output+0x7e>
                                 ", seg == NULL, ack %"U32_F"\n",
                                 pcb->snd_wnd, pcb->cwnd, wnd, pcb->lastack));

    /* If the TF_ACK_NOW flag is set and the ->unsent queue is empty, construct
     * an empty ACK segment and send it. */
    if (pcb->flags & TF_ACK_NOW) {
 802050a:	687b      	ldr	r3, [r7, #4]
 802050c:	8b5b      	ldrh	r3, [r3, #26]
 802050e:	f003 0302 	and.w	r3, r3, #2
 8020512:	2b00      	cmp	r3, #0
 8020514:	f000 81ad 	beq.w	8020872 <tcp_output+0x3ce>
      return tcp_send_empty_ack(pcb);
 8020518:	6878      	ldr	r0, [r7, #4]
 802051a:	f000 fdd7 	bl	80210cc <tcp_send_empty_ack>
 802051e:	4603      	mov	r3, r0
 8020520:	e1b4      	b.n	802088c <tcp_output+0x3e8>
                 pcb->snd_wnd, pcb->cwnd, wnd,
                 lwip_ntohl(seg->tcphdr->seqno) - pcb->lastack + seg->len,
                 lwip_ntohl(seg->tcphdr->seqno), pcb->lastack));
  }

  netif = tcp_route(pcb, &pcb->local_ip, &pcb->remote_ip);
 8020522:	6879      	ldr	r1, [r7, #4]
 8020524:	687b      	ldr	r3, [r7, #4]
 8020526:	3304      	adds	r3, #4
 8020528:	461a      	mov	r2, r3
 802052a:	6878      	ldr	r0, [r7, #4]
 802052c:	f7fe ffc0 	bl	801f4b0 <tcp_route>
 8020530:	6178      	str	r0, [r7, #20]
  if (netif == NULL) {
 8020532:	697b      	ldr	r3, [r7, #20]
 8020534:	2b00      	cmp	r3, #0
 8020536:	d102      	bne.n	802053e <tcp_output+0x9a>
    return ERR_RTE;
 8020538:	f06f 0303 	mvn.w	r3, #3
 802053c:	e1a6      	b.n	802088c <tcp_output+0x3e8>
  }

  /* If we don't have a local IP address, we get one from netif */
  if (ip_addr_isany(&pcb->local_ip)) {
 802053e:	687b      	ldr	r3, [r7, #4]
 8020540:	2b00      	cmp	r3, #0
 8020542:	d003      	beq.n	802054c <tcp_output+0xa8>
 8020544:	687b      	ldr	r3, [r7, #4]
 8020546:	681b      	ldr	r3, [r3, #0]
 8020548:	2b00      	cmp	r3, #0
 802054a:	d111      	bne.n	8020570 <tcp_output+0xcc>
    const ip_addr_t *local_ip = ip_netif_get_local_ip(netif, &pcb->remote_ip);
 802054c:	697b      	ldr	r3, [r7, #20]
 802054e:	2b00      	cmp	r3, #0
 8020550:	d002      	beq.n	8020558 <tcp_output+0xb4>
 8020552:	697b      	ldr	r3, [r7, #20]
 8020554:	3304      	adds	r3, #4
 8020556:	e000      	b.n	802055a <tcp_output+0xb6>
 8020558:	2300      	movs	r3, #0
 802055a:	613b      	str	r3, [r7, #16]
    if (local_ip == NULL) {
 802055c:	693b      	ldr	r3, [r7, #16]
 802055e:	2b00      	cmp	r3, #0
 8020560:	d102      	bne.n	8020568 <tcp_output+0xc4>
      return ERR_RTE;
 8020562:	f06f 0303 	mvn.w	r3, #3
 8020566:	e191      	b.n	802088c <tcp_output+0x3e8>
    }
    ip_addr_copy(pcb->local_ip, *local_ip);
 8020568:	693b      	ldr	r3, [r7, #16]
 802056a:	681a      	ldr	r2, [r3, #0]
 802056c:	687b      	ldr	r3, [r7, #4]
 802056e:	601a      	str	r2, [r3, #0]
  }

  /* Handle the current segment not fitting within the window */
  if (lwip_ntohl(seg->tcphdr->seqno) - pcb->lastack + seg->len > wnd) {
 8020570:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8020572:	691b      	ldr	r3, [r3, #16]
 8020574:	685b      	ldr	r3, [r3, #4]
 8020576:	4618      	mov	r0, r3
 8020578:	f7f8 fedb 	bl	8019332 <lwip_htonl>
 802057c:	4602      	mov	r2, r0
 802057e:	687b      	ldr	r3, [r7, #4]
 8020580:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 8020582:	1ad3      	subs	r3, r2, r3
 8020584:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8020586:	8912      	ldrh	r2, [r2, #8]
 8020588:	4413      	add	r3, r2
 802058a:	69ba      	ldr	r2, [r7, #24]
 802058c:	429a      	cmp	r2, r3
 802058e:	d227      	bcs.n	80205e0 <tcp_output+0x13c>
     * within the remaining (could be 0) send window and RTO timer is not running (we
     * have no in-flight data). If window is still too small after persist timer fires,
     * then we split the segment. We don't consider the congestion window since a cwnd
     * smaller than 1 SMSS implies in-flight data
     */
    if (wnd == pcb->snd_wnd && pcb->unacked == NULL && pcb->persist_backoff == 0) {
 8020590:	687b      	ldr	r3, [r7, #4]
 8020592:	f8b3 3060 	ldrh.w	r3, [r3, #96]	@ 0x60
 8020596:	461a      	mov	r2, r3
 8020598:	69bb      	ldr	r3, [r7, #24]
 802059a:	4293      	cmp	r3, r2
 802059c:	d114      	bne.n	80205c8 <tcp_output+0x124>
 802059e:	687b      	ldr	r3, [r7, #4]
 80205a0:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 80205a2:	2b00      	cmp	r3, #0
 80205a4:	d110      	bne.n	80205c8 <tcp_output+0x124>
 80205a6:	687b      	ldr	r3, [r7, #4]
 80205a8:	f893 3099 	ldrb.w	r3, [r3, #153]	@ 0x99
 80205ac:	2b00      	cmp	r3, #0
 80205ae:	d10b      	bne.n	80205c8 <tcp_output+0x124>
      pcb->persist_cnt = 0;
 80205b0:	687b      	ldr	r3, [r7, #4]
 80205b2:	2200      	movs	r2, #0
 80205b4:	f883 2098 	strb.w	r2, [r3, #152]	@ 0x98
      pcb->persist_backoff = 1;
 80205b8:	687b      	ldr	r3, [r7, #4]
 80205ba:	2201      	movs	r2, #1
 80205bc:	f883 2099 	strb.w	r2, [r3, #153]	@ 0x99
      pcb->persist_probe = 0;
 80205c0:	687b      	ldr	r3, [r7, #4]
 80205c2:	2200      	movs	r2, #0
 80205c4:	f883 209a 	strb.w	r2, [r3, #154]	@ 0x9a
    }
    /* We need an ACK, but can't send data now, so send an empty ACK */
    if (pcb->flags & TF_ACK_NOW) {
 80205c8:	687b      	ldr	r3, [r7, #4]
 80205ca:	8b5b      	ldrh	r3, [r3, #26]
 80205cc:	f003 0302 	and.w	r3, r3, #2
 80205d0:	2b00      	cmp	r3, #0
 80205d2:	f000 8150 	beq.w	8020876 <tcp_output+0x3d2>
      return tcp_send_empty_ack(pcb);
 80205d6:	6878      	ldr	r0, [r7, #4]
 80205d8:	f000 fd78 	bl	80210cc <tcp_send_empty_ack>
 80205dc:	4603      	mov	r3, r0
 80205de:	e155      	b.n	802088c <tcp_output+0x3e8>
    }
    goto output_done;
  }
  /* Stop persist timer, above conditions are not active */
  pcb->persist_backoff = 0;
 80205e0:	687b      	ldr	r3, [r7, #4]
 80205e2:	2200      	movs	r2, #0
 80205e4:	f883 2099 	strb.w	r2, [r3, #153]	@ 0x99

  /* useg should point to last segment on unacked queue */
  useg = pcb->unacked;
 80205e8:	687b      	ldr	r3, [r7, #4]
 80205ea:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 80205ec:	623b      	str	r3, [r7, #32]
  if (useg != NULL) {
 80205ee:	6a3b      	ldr	r3, [r7, #32]
 80205f0:	2b00      	cmp	r3, #0
 80205f2:	f000 811f 	beq.w	8020834 <tcp_output+0x390>
    for (; useg->next != NULL; useg = useg->next);
 80205f6:	e002      	b.n	80205fe <tcp_output+0x15a>
 80205f8:	6a3b      	ldr	r3, [r7, #32]
 80205fa:	681b      	ldr	r3, [r3, #0]
 80205fc:	623b      	str	r3, [r7, #32]
 80205fe:	6a3b      	ldr	r3, [r7, #32]
 8020600:	681b      	ldr	r3, [r3, #0]
 8020602:	2b00      	cmp	r3, #0
 8020604:	d1f8      	bne.n	80205f8 <tcp_output+0x154>
  }
  /* data available and window allows it to be sent? */
  while (seg != NULL &&
 8020606:	e115      	b.n	8020834 <tcp_output+0x390>
         lwip_ntohl(seg->tcphdr->seqno) - pcb->lastack + seg->len <= wnd) {
    LWIP_ASSERT("RST not expected here!",
 8020608:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 802060a:	691b      	ldr	r3, [r3, #16]
 802060c:	899b      	ldrh	r3, [r3, #12]
 802060e:	b29b      	uxth	r3, r3
 8020610:	4618      	mov	r0, r3
 8020612:	f7f8 fe79 	bl	8019308 <lwip_htons>
 8020616:	4603      	mov	r3, r0
 8020618:	b2db      	uxtb	r3, r3
 802061a:	f003 0304 	and.w	r3, r3, #4
 802061e:	2b00      	cmp	r3, #0
 8020620:	d006      	beq.n	8020630 <tcp_output+0x18c>
 8020622:	4b2f      	ldr	r3, [pc, #188]	@ (80206e0 <tcp_output+0x23c>)
 8020624:	f240 5236 	movw	r2, #1334	@ 0x536
 8020628:	4932      	ldr	r1, [pc, #200]	@ (80206f4 <tcp_output+0x250>)
 802062a:	482f      	ldr	r0, [pc, #188]	@ (80206e8 <tcp_output+0x244>)
 802062c:	f009 fdc6 	bl	802a1bc <iprintf>
     * - if tcp_write had a memory error before (prevent delayed ACK timeout) or
     * - if FIN was already enqueued for this PCB (SYN is always alone in a segment -
     *   either seg->next != NULL or pcb->unacked == NULL;
     *   RST is no sent using tcp_write/tcp_output.
     */
    if ((tcp_do_output_nagle(pcb) == 0) &&
 8020630:	687b      	ldr	r3, [r7, #4]
 8020632:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 8020634:	2b00      	cmp	r3, #0
 8020636:	d01f      	beq.n	8020678 <tcp_output+0x1d4>
 8020638:	687b      	ldr	r3, [r7, #4]
 802063a:	8b5b      	ldrh	r3, [r3, #26]
 802063c:	f003 0344 	and.w	r3, r3, #68	@ 0x44
 8020640:	2b00      	cmp	r3, #0
 8020642:	d119      	bne.n	8020678 <tcp_output+0x1d4>
 8020644:	687b      	ldr	r3, [r7, #4]
 8020646:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8020648:	2b00      	cmp	r3, #0
 802064a:	d00b      	beq.n	8020664 <tcp_output+0x1c0>
 802064c:	687b      	ldr	r3, [r7, #4]
 802064e:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8020650:	681b      	ldr	r3, [r3, #0]
 8020652:	2b00      	cmp	r3, #0
 8020654:	d110      	bne.n	8020678 <tcp_output+0x1d4>
 8020656:	687b      	ldr	r3, [r7, #4]
 8020658:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 802065a:	891a      	ldrh	r2, [r3, #8]
 802065c:	687b      	ldr	r3, [r7, #4]
 802065e:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 8020660:	429a      	cmp	r2, r3
 8020662:	d209      	bcs.n	8020678 <tcp_output+0x1d4>
 8020664:	687b      	ldr	r3, [r7, #4]
 8020666:	f8b3 3064 	ldrh.w	r3, [r3, #100]	@ 0x64
 802066a:	2b00      	cmp	r3, #0
 802066c:	d004      	beq.n	8020678 <tcp_output+0x1d4>
 802066e:	687b      	ldr	r3, [r7, #4]
 8020670:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 8020674:	2b0f      	cmp	r3, #15
 8020676:	d901      	bls.n	802067c <tcp_output+0x1d8>
 8020678:	2301      	movs	r3, #1
 802067a:	e000      	b.n	802067e <tcp_output+0x1da>
 802067c:	2300      	movs	r3, #0
 802067e:	2b00      	cmp	r3, #0
 8020680:	d106      	bne.n	8020690 <tcp_output+0x1ec>
        ((pcb->flags & (TF_NAGLEMEMERR | TF_FIN)) == 0)) {
 8020682:	687b      	ldr	r3, [r7, #4]
 8020684:	8b5b      	ldrh	r3, [r3, #26]
 8020686:	f003 03a0 	and.w	r3, r3, #160	@ 0xa0
    if ((tcp_do_output_nagle(pcb) == 0) &&
 802068a:	2b00      	cmp	r3, #0
 802068c:	f000 80e7 	beq.w	802085e <tcp_output+0x3ba>
                                 pcb->lastack,
                                 lwip_ntohl(seg->tcphdr->seqno), pcb->lastack, i));
    ++i;
#endif /* TCP_CWND_DEBUG */

    if (pcb->state != SYN_SENT) {
 8020690:	687b      	ldr	r3, [r7, #4]
 8020692:	7d1b      	ldrb	r3, [r3, #20]
 8020694:	2b02      	cmp	r3, #2
 8020696:	d00d      	beq.n	80206b4 <tcp_output+0x210>
      TCPH_SET_FLAG(seg->tcphdr, TCP_ACK);
 8020698:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 802069a:	691b      	ldr	r3, [r3, #16]
 802069c:	899b      	ldrh	r3, [r3, #12]
 802069e:	b29c      	uxth	r4, r3
 80206a0:	2010      	movs	r0, #16
 80206a2:	f7f8 fe31 	bl	8019308 <lwip_htons>
 80206a6:	4603      	mov	r3, r0
 80206a8:	461a      	mov	r2, r3
 80206aa:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80206ac:	691b      	ldr	r3, [r3, #16]
 80206ae:	4322      	orrs	r2, r4
 80206b0:	b292      	uxth	r2, r2
 80206b2:	819a      	strh	r2, [r3, #12]
    }

    err = tcp_output_segment(seg, pcb, netif);
 80206b4:	697a      	ldr	r2, [r7, #20]
 80206b6:	6879      	ldr	r1, [r7, #4]
 80206b8:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 80206ba:	f000 f90b 	bl	80208d4 <tcp_output_segment>
 80206be:	4603      	mov	r3, r0
 80206c0:	73fb      	strb	r3, [r7, #15]
    if (err != ERR_OK) {
 80206c2:	f997 300f 	ldrsb.w	r3, [r7, #15]
 80206c6:	2b00      	cmp	r3, #0
 80206c8:	d016      	beq.n	80206f8 <tcp_output+0x254>
      /* segment could not be sent, for whatever reason */
      tcp_set_flags(pcb, TF_NAGLEMEMERR);
 80206ca:	687b      	ldr	r3, [r7, #4]
 80206cc:	8b5b      	ldrh	r3, [r3, #26]
 80206ce:	f043 0380 	orr.w	r3, r3, #128	@ 0x80
 80206d2:	b29a      	uxth	r2, r3
 80206d4:	687b      	ldr	r3, [r7, #4]
 80206d6:	835a      	strh	r2, [r3, #26]
      return err;
 80206d8:	f997 300f 	ldrsb.w	r3, [r7, #15]
 80206dc:	e0d6      	b.n	802088c <tcp_output+0x3e8>
 80206de:	bf00      	nop
 80206e0:	0802fa24 	.word	0x0802fa24
 80206e4:	0802ffc4 	.word	0x0802ffc4
 80206e8:	0802fa78 	.word	0x0802fa78
 80206ec:	0802ffdc 	.word	0x0802ffdc
 80206f0:	2402afa8 	.word	0x2402afa8
 80206f4:	08030004 	.word	0x08030004
    }
#if TCP_OVERSIZE_DBGCHECK
    seg->oversize_left = 0;
 80206f8:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80206fa:	2200      	movs	r2, #0
 80206fc:	815a      	strh	r2, [r3, #10]
#endif /* TCP_OVERSIZE_DBGCHECK */
    pcb->unsent = seg->next;
 80206fe:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8020700:	681a      	ldr	r2, [r3, #0]
 8020702:	687b      	ldr	r3, [r7, #4]
 8020704:	66da      	str	r2, [r3, #108]	@ 0x6c
    if (pcb->state != SYN_SENT) {
 8020706:	687b      	ldr	r3, [r7, #4]
 8020708:	7d1b      	ldrb	r3, [r3, #20]
 802070a:	2b02      	cmp	r3, #2
 802070c:	d006      	beq.n	802071c <tcp_output+0x278>
      tcp_clear_flags(pcb, TF_ACK_DELAY | TF_ACK_NOW);
 802070e:	687b      	ldr	r3, [r7, #4]
 8020710:	8b5b      	ldrh	r3, [r3, #26]
 8020712:	f023 0303 	bic.w	r3, r3, #3
 8020716:	b29a      	uxth	r2, r3
 8020718:	687b      	ldr	r3, [r7, #4]
 802071a:	835a      	strh	r2, [r3, #26]
    }
    snd_nxt = lwip_ntohl(seg->tcphdr->seqno) + TCP_TCPLEN(seg);
 802071c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 802071e:	691b      	ldr	r3, [r3, #16]
 8020720:	685b      	ldr	r3, [r3, #4]
 8020722:	4618      	mov	r0, r3
 8020724:	f7f8 fe05 	bl	8019332 <lwip_htonl>
 8020728:	4604      	mov	r4, r0
 802072a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 802072c:	891b      	ldrh	r3, [r3, #8]
 802072e:	461d      	mov	r5, r3
 8020730:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8020732:	691b      	ldr	r3, [r3, #16]
 8020734:	899b      	ldrh	r3, [r3, #12]
 8020736:	b29b      	uxth	r3, r3
 8020738:	4618      	mov	r0, r3
 802073a:	f7f8 fde5 	bl	8019308 <lwip_htons>
 802073e:	4603      	mov	r3, r0
 8020740:	b2db      	uxtb	r3, r3
 8020742:	f003 0303 	and.w	r3, r3, #3
 8020746:	2b00      	cmp	r3, #0
 8020748:	d001      	beq.n	802074e <tcp_output+0x2aa>
 802074a:	2301      	movs	r3, #1
 802074c:	e000      	b.n	8020750 <tcp_output+0x2ac>
 802074e:	2300      	movs	r3, #0
 8020750:	442b      	add	r3, r5
 8020752:	4423      	add	r3, r4
 8020754:	60bb      	str	r3, [r7, #8]
    if (TCP_SEQ_LT(pcb->snd_nxt, snd_nxt)) {
 8020756:	687b      	ldr	r3, [r7, #4]
 8020758:	6d1a      	ldr	r2, [r3, #80]	@ 0x50
 802075a:	68bb      	ldr	r3, [r7, #8]
 802075c:	1ad3      	subs	r3, r2, r3
 802075e:	2b00      	cmp	r3, #0
 8020760:	da02      	bge.n	8020768 <tcp_output+0x2c4>
      pcb->snd_nxt = snd_nxt;
 8020762:	687b      	ldr	r3, [r7, #4]
 8020764:	68ba      	ldr	r2, [r7, #8]
 8020766:	651a      	str	r2, [r3, #80]	@ 0x50
    }
    /* put segment on unacknowledged list if length > 0 */
    if (TCP_TCPLEN(seg) > 0) {
 8020768:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 802076a:	891b      	ldrh	r3, [r3, #8]
 802076c:	461c      	mov	r4, r3
 802076e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8020770:	691b      	ldr	r3, [r3, #16]
 8020772:	899b      	ldrh	r3, [r3, #12]
 8020774:	b29b      	uxth	r3, r3
 8020776:	4618      	mov	r0, r3
 8020778:	f7f8 fdc6 	bl	8019308 <lwip_htons>
 802077c:	4603      	mov	r3, r0
 802077e:	b2db      	uxtb	r3, r3
 8020780:	f003 0303 	and.w	r3, r3, #3
 8020784:	2b00      	cmp	r3, #0
 8020786:	d001      	beq.n	802078c <tcp_output+0x2e8>
 8020788:	2301      	movs	r3, #1
 802078a:	e000      	b.n	802078e <tcp_output+0x2ea>
 802078c:	2300      	movs	r3, #0
 802078e:	4423      	add	r3, r4
 8020790:	2b00      	cmp	r3, #0
 8020792:	d049      	beq.n	8020828 <tcp_output+0x384>
      seg->next = NULL;
 8020794:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8020796:	2200      	movs	r2, #0
 8020798:	601a      	str	r2, [r3, #0]
      /* unacked list is empty? */
      if (pcb->unacked == NULL) {
 802079a:	687b      	ldr	r3, [r7, #4]
 802079c:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 802079e:	2b00      	cmp	r3, #0
 80207a0:	d105      	bne.n	80207ae <tcp_output+0x30a>
        pcb->unacked = seg;
 80207a2:	687b      	ldr	r3, [r7, #4]
 80207a4:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 80207a6:	671a      	str	r2, [r3, #112]	@ 0x70
        useg = seg;
 80207a8:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80207aa:	623b      	str	r3, [r7, #32]
 80207ac:	e03f      	b.n	802082e <tcp_output+0x38a>
        /* unacked list is not empty? */
      } else {
        /* In the case of fast retransmit, the packet should not go to the tail
         * of the unacked queue, but rather somewhere before it. We need to check for
         * this case. -STJ Jul 27, 2004 */
        if (TCP_SEQ_LT(lwip_ntohl(seg->tcphdr->seqno), lwip_ntohl(useg->tcphdr->seqno))) {
 80207ae:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80207b0:	691b      	ldr	r3, [r3, #16]
 80207b2:	685b      	ldr	r3, [r3, #4]
 80207b4:	4618      	mov	r0, r3
 80207b6:	f7f8 fdbc 	bl	8019332 <lwip_htonl>
 80207ba:	4604      	mov	r4, r0
 80207bc:	6a3b      	ldr	r3, [r7, #32]
 80207be:	691b      	ldr	r3, [r3, #16]
 80207c0:	685b      	ldr	r3, [r3, #4]
 80207c2:	4618      	mov	r0, r3
 80207c4:	f7f8 fdb5 	bl	8019332 <lwip_htonl>
 80207c8:	4603      	mov	r3, r0
 80207ca:	1ae3      	subs	r3, r4, r3
 80207cc:	2b00      	cmp	r3, #0
 80207ce:	da24      	bge.n	802081a <tcp_output+0x376>
          /* add segment to before tail of unacked list, keeping the list sorted */
          struct tcp_seg **cur_seg = &(pcb->unacked);
 80207d0:	687b      	ldr	r3, [r7, #4]
 80207d2:	3370      	adds	r3, #112	@ 0x70
 80207d4:	61fb      	str	r3, [r7, #28]
          while (*cur_seg &&
 80207d6:	e002      	b.n	80207de <tcp_output+0x33a>
                 TCP_SEQ_LT(lwip_ntohl((*cur_seg)->tcphdr->seqno), lwip_ntohl(seg->tcphdr->seqno))) {
            cur_seg = &((*cur_seg)->next );
 80207d8:	69fb      	ldr	r3, [r7, #28]
 80207da:	681b      	ldr	r3, [r3, #0]
 80207dc:	61fb      	str	r3, [r7, #28]
          while (*cur_seg &&
 80207de:	69fb      	ldr	r3, [r7, #28]
 80207e0:	681b      	ldr	r3, [r3, #0]
 80207e2:	2b00      	cmp	r3, #0
 80207e4:	d011      	beq.n	802080a <tcp_output+0x366>
                 TCP_SEQ_LT(lwip_ntohl((*cur_seg)->tcphdr->seqno), lwip_ntohl(seg->tcphdr->seqno))) {
 80207e6:	69fb      	ldr	r3, [r7, #28]
 80207e8:	681b      	ldr	r3, [r3, #0]
 80207ea:	691b      	ldr	r3, [r3, #16]
 80207ec:	685b      	ldr	r3, [r3, #4]
 80207ee:	4618      	mov	r0, r3
 80207f0:	f7f8 fd9f 	bl	8019332 <lwip_htonl>
 80207f4:	4604      	mov	r4, r0
 80207f6:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80207f8:	691b      	ldr	r3, [r3, #16]
 80207fa:	685b      	ldr	r3, [r3, #4]
 80207fc:	4618      	mov	r0, r3
 80207fe:	f7f8 fd98 	bl	8019332 <lwip_htonl>
 8020802:	4603      	mov	r3, r0
 8020804:	1ae3      	subs	r3, r4, r3
          while (*cur_seg &&
 8020806:	2b00      	cmp	r3, #0
 8020808:	dbe6      	blt.n	80207d8 <tcp_output+0x334>
          }
          seg->next = (*cur_seg);
 802080a:	69fb      	ldr	r3, [r7, #28]
 802080c:	681a      	ldr	r2, [r3, #0]
 802080e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8020810:	601a      	str	r2, [r3, #0]
          (*cur_seg) = seg;
 8020812:	69fb      	ldr	r3, [r7, #28]
 8020814:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8020816:	601a      	str	r2, [r3, #0]
 8020818:	e009      	b.n	802082e <tcp_output+0x38a>
        } else {
          /* add segment to tail of unacked list */
          useg->next = seg;
 802081a:	6a3b      	ldr	r3, [r7, #32]
 802081c:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 802081e:	601a      	str	r2, [r3, #0]
          useg = useg->next;
 8020820:	6a3b      	ldr	r3, [r7, #32]
 8020822:	681b      	ldr	r3, [r3, #0]
 8020824:	623b      	str	r3, [r7, #32]
 8020826:	e002      	b.n	802082e <tcp_output+0x38a>
        }
      }
      /* do not queue empty segments on the unacked list */
    } else {
      tcp_seg_free(seg);
 8020828:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 802082a:	f7fb fea8 	bl	801c57e <tcp_seg_free>
    }
    seg = pcb->unsent;
 802082e:	687b      	ldr	r3, [r7, #4]
 8020830:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8020832:	627b      	str	r3, [r7, #36]	@ 0x24
  while (seg != NULL &&
 8020834:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8020836:	2b00      	cmp	r3, #0
 8020838:	d012      	beq.n	8020860 <tcp_output+0x3bc>
         lwip_ntohl(seg->tcphdr->seqno) - pcb->lastack + seg->len <= wnd) {
 802083a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 802083c:	691b      	ldr	r3, [r3, #16]
 802083e:	685b      	ldr	r3, [r3, #4]
 8020840:	4618      	mov	r0, r3
 8020842:	f7f8 fd76 	bl	8019332 <lwip_htonl>
 8020846:	4602      	mov	r2, r0
 8020848:	687b      	ldr	r3, [r7, #4]
 802084a:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 802084c:	1ad3      	subs	r3, r2, r3
 802084e:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8020850:	8912      	ldrh	r2, [r2, #8]
 8020852:	4413      	add	r3, r2
  while (seg != NULL &&
 8020854:	69ba      	ldr	r2, [r7, #24]
 8020856:	429a      	cmp	r2, r3
 8020858:	f4bf aed6 	bcs.w	8020608 <tcp_output+0x164>
 802085c:	e000      	b.n	8020860 <tcp_output+0x3bc>
      break;
 802085e:	bf00      	nop
  }
#if TCP_OVERSIZE
  if (pcb->unsent == NULL) {
 8020860:	687b      	ldr	r3, [r7, #4]
 8020862:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8020864:	2b00      	cmp	r3, #0
 8020866:	d108      	bne.n	802087a <tcp_output+0x3d6>
    /* last unsent has been removed, reset unsent_oversize */
    pcb->unsent_oversize = 0;
 8020868:	687b      	ldr	r3, [r7, #4]
 802086a:	2200      	movs	r2, #0
 802086c:	f8a3 2068 	strh.w	r2, [r3, #104]	@ 0x68
 8020870:	e004      	b.n	802087c <tcp_output+0x3d8>
    goto output_done;
 8020872:	bf00      	nop
 8020874:	e002      	b.n	802087c <tcp_output+0x3d8>
    goto output_done;
 8020876:	bf00      	nop
 8020878:	e000      	b.n	802087c <tcp_output+0x3d8>
  }
#endif /* TCP_OVERSIZE */

output_done:
 802087a:	bf00      	nop
  tcp_clear_flags(pcb, TF_NAGLEMEMERR);
 802087c:	687b      	ldr	r3, [r7, #4]
 802087e:	8b5b      	ldrh	r3, [r3, #26]
 8020880:	f023 0380 	bic.w	r3, r3, #128	@ 0x80
 8020884:	b29a      	uxth	r2, r3
 8020886:	687b      	ldr	r3, [r7, #4]
 8020888:	835a      	strh	r2, [r3, #26]
  return ERR_OK;
 802088a:	2300      	movs	r3, #0
}
 802088c:	4618      	mov	r0, r3
 802088e:	3728      	adds	r7, #40	@ 0x28
 8020890:	46bd      	mov	sp, r7
 8020892:	bdb0      	pop	{r4, r5, r7, pc}

08020894 <tcp_output_segment_busy>:
 * @arg seg the tcp segment to check
 * @return 1 if ref != 1, 0 if ref == 1
 */
static int
tcp_output_segment_busy(const struct tcp_seg *seg)
{
 8020894:	b580      	push	{r7, lr}
 8020896:	b082      	sub	sp, #8
 8020898:	af00      	add	r7, sp, #0
 802089a:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT("tcp_output_segment_busy: invalid seg", seg != NULL);
 802089c:	687b      	ldr	r3, [r7, #4]
 802089e:	2b00      	cmp	r3, #0
 80208a0:	d106      	bne.n	80208b0 <tcp_output_segment_busy+0x1c>
 80208a2:	4b09      	ldr	r3, [pc, #36]	@ (80208c8 <tcp_output_segment_busy+0x34>)
 80208a4:	f240 529a 	movw	r2, #1434	@ 0x59a
 80208a8:	4908      	ldr	r1, [pc, #32]	@ (80208cc <tcp_output_segment_busy+0x38>)
 80208aa:	4809      	ldr	r0, [pc, #36]	@ (80208d0 <tcp_output_segment_busy+0x3c>)
 80208ac:	f009 fc86 	bl	802a1bc <iprintf>

  /* We only need to check the first pbuf here:
     If a pbuf is queued for transmission, a driver calls pbuf_ref(),
     which only changes the ref count of the first pbuf */
  if (seg->p->ref != 1) {
 80208b0:	687b      	ldr	r3, [r7, #4]
 80208b2:	685b      	ldr	r3, [r3, #4]
 80208b4:	7b9b      	ldrb	r3, [r3, #14]
 80208b6:	2b01      	cmp	r3, #1
 80208b8:	d001      	beq.n	80208be <tcp_output_segment_busy+0x2a>
    /* other reference found */
    return 1;
 80208ba:	2301      	movs	r3, #1
 80208bc:	e000      	b.n	80208c0 <tcp_output_segment_busy+0x2c>
  }
  /* no other references found */
  return 0;
 80208be:	2300      	movs	r3, #0
}
 80208c0:	4618      	mov	r0, r3
 80208c2:	3708      	adds	r7, #8
 80208c4:	46bd      	mov	sp, r7
 80208c6:	bd80      	pop	{r7, pc}
 80208c8:	0802fa24 	.word	0x0802fa24
 80208cc:	0803001c 	.word	0x0803001c
 80208d0:	0802fa78 	.word	0x0802fa78

080208d4 <tcp_output_segment>:
 * @param pcb the tcp_pcb for the TCP connection used to send the segment
 * @param netif the netif used to send the segment
 */
static err_t
tcp_output_segment(struct tcp_seg *seg, struct tcp_pcb *pcb, struct netif *netif)
{
 80208d4:	b5b0      	push	{r4, r5, r7, lr}
 80208d6:	b08c      	sub	sp, #48	@ 0x30
 80208d8:	af04      	add	r7, sp, #16
 80208da:	60f8      	str	r0, [r7, #12]
 80208dc:	60b9      	str	r1, [r7, #8]
 80208de:	607a      	str	r2, [r7, #4]
  u32_t *opts;
#if TCP_CHECKSUM_ON_COPY
  int seg_chksum_was_swapped = 0;
#endif

  LWIP_ASSERT("tcp_output_segment: invalid seg", seg != NULL);
 80208e0:	68fb      	ldr	r3, [r7, #12]
 80208e2:	2b00      	cmp	r3, #0
 80208e4:	d106      	bne.n	80208f4 <tcp_output_segment+0x20>
 80208e6:	4b64      	ldr	r3, [pc, #400]	@ (8020a78 <tcp_output_segment+0x1a4>)
 80208e8:	f44f 62b7 	mov.w	r2, #1464	@ 0x5b8
 80208ec:	4963      	ldr	r1, [pc, #396]	@ (8020a7c <tcp_output_segment+0x1a8>)
 80208ee:	4864      	ldr	r0, [pc, #400]	@ (8020a80 <tcp_output_segment+0x1ac>)
 80208f0:	f009 fc64 	bl	802a1bc <iprintf>
  LWIP_ASSERT("tcp_output_segment: invalid pcb", pcb != NULL);
 80208f4:	68bb      	ldr	r3, [r7, #8]
 80208f6:	2b00      	cmp	r3, #0
 80208f8:	d106      	bne.n	8020908 <tcp_output_segment+0x34>
 80208fa:	4b5f      	ldr	r3, [pc, #380]	@ (8020a78 <tcp_output_segment+0x1a4>)
 80208fc:	f240 52b9 	movw	r2, #1465	@ 0x5b9
 8020900:	4960      	ldr	r1, [pc, #384]	@ (8020a84 <tcp_output_segment+0x1b0>)
 8020902:	485f      	ldr	r0, [pc, #380]	@ (8020a80 <tcp_output_segment+0x1ac>)
 8020904:	f009 fc5a 	bl	802a1bc <iprintf>
  LWIP_ASSERT("tcp_output_segment: invalid netif", netif != NULL);
 8020908:	687b      	ldr	r3, [r7, #4]
 802090a:	2b00      	cmp	r3, #0
 802090c:	d106      	bne.n	802091c <tcp_output_segment+0x48>
 802090e:	4b5a      	ldr	r3, [pc, #360]	@ (8020a78 <tcp_output_segment+0x1a4>)
 8020910:	f240 52ba 	movw	r2, #1466	@ 0x5ba
 8020914:	495c      	ldr	r1, [pc, #368]	@ (8020a88 <tcp_output_segment+0x1b4>)
 8020916:	485a      	ldr	r0, [pc, #360]	@ (8020a80 <tcp_output_segment+0x1ac>)
 8020918:	f009 fc50 	bl	802a1bc <iprintf>

  if (tcp_output_segment_busy(seg)) {
 802091c:	68f8      	ldr	r0, [r7, #12]
 802091e:	f7ff ffb9 	bl	8020894 <tcp_output_segment_busy>
 8020922:	4603      	mov	r3, r0
 8020924:	2b00      	cmp	r3, #0
 8020926:	d001      	beq.n	802092c <tcp_output_segment+0x58>
    /* This should not happen: rexmit functions should have checked this.
       However, since this function modifies p->len, we must not continue in this case. */
    LWIP_DEBUGF(TCP_RTO_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("tcp_output_segment: segment busy\n"));
    return ERR_OK;
 8020928:	2300      	movs	r3, #0
 802092a:	e0a1      	b.n	8020a70 <tcp_output_segment+0x19c>
  }

  /* The TCP header has already been constructed, but the ackno and
   wnd fields remain. */
  seg->tcphdr->ackno = lwip_htonl(pcb->rcv_nxt);
 802092c:	68bb      	ldr	r3, [r7, #8]
 802092e:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 8020930:	68fb      	ldr	r3, [r7, #12]
 8020932:	691c      	ldr	r4, [r3, #16]
 8020934:	4610      	mov	r0, r2
 8020936:	f7f8 fcfc 	bl	8019332 <lwip_htonl>
 802093a:	4603      	mov	r3, r0
 802093c:	60a3      	str	r3, [r4, #8]
       the window scale option) is never scaled. */
    seg->tcphdr->wnd = lwip_htons(TCPWND_MIN16(pcb->rcv_ann_wnd));
  } else
#endif /* LWIP_WND_SCALE */
  {
    seg->tcphdr->wnd = lwip_htons(TCPWND_MIN16(RCV_WND_SCALE(pcb, pcb->rcv_ann_wnd)));
 802093e:	68bb      	ldr	r3, [r7, #8]
 8020940:	8d5a      	ldrh	r2, [r3, #42]	@ 0x2a
 8020942:	68fb      	ldr	r3, [r7, #12]
 8020944:	691c      	ldr	r4, [r3, #16]
 8020946:	4610      	mov	r0, r2
 8020948:	f7f8 fcde 	bl	8019308 <lwip_htons>
 802094c:	4603      	mov	r3, r0
 802094e:	81e3      	strh	r3, [r4, #14]
  }

  pcb->rcv_ann_right_edge = pcb->rcv_nxt + pcb->rcv_ann_wnd;
 8020950:	68bb      	ldr	r3, [r7, #8]
 8020952:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8020954:	68ba      	ldr	r2, [r7, #8]
 8020956:	8d52      	ldrh	r2, [r2, #42]	@ 0x2a
 8020958:	441a      	add	r2, r3
 802095a:	68bb      	ldr	r3, [r7, #8]
 802095c:	62da      	str	r2, [r3, #44]	@ 0x2c

  /* Add any requested options.  NB MSS option is only set on SYN
     packets, so ignore it here */
  /* cast through void* to get rid of alignment warnings */
  opts = (u32_t *)(void *)(seg->tcphdr + 1);
 802095e:	68fb      	ldr	r3, [r7, #12]
 8020960:	691b      	ldr	r3, [r3, #16]
 8020962:	3314      	adds	r3, #20
 8020964:	61fb      	str	r3, [r7, #28]
  if (seg->flags & TF_SEG_OPTS_MSS) {
 8020966:	68fb      	ldr	r3, [r7, #12]
 8020968:	7b1b      	ldrb	r3, [r3, #12]
 802096a:	f003 0301 	and.w	r3, r3, #1
 802096e:	2b00      	cmp	r3, #0
 8020970:	d015      	beq.n	802099e <tcp_output_segment+0xca>
    u16_t mss;
#if TCP_CALCULATE_EFF_SEND_MSS
    mss = tcp_eff_send_mss_netif(TCP_MSS, netif, &pcb->remote_ip);
 8020972:	68bb      	ldr	r3, [r7, #8]
 8020974:	3304      	adds	r3, #4
 8020976:	461a      	mov	r2, r3
 8020978:	6879      	ldr	r1, [r7, #4]
 802097a:	f240 50b4 	movw	r0, #1460	@ 0x5b4
 802097e:	f7fc f9cd 	bl	801cd1c <tcp_eff_send_mss_netif>
 8020982:	4603      	mov	r3, r0
 8020984:	837b      	strh	r3, [r7, #26]
#else /* TCP_CALCULATE_EFF_SEND_MSS */
    mss = TCP_MSS;
#endif /* TCP_CALCULATE_EFF_SEND_MSS */
    *opts = TCP_BUILD_MSS_OPTION(mss);
 8020986:	8b7b      	ldrh	r3, [r7, #26]
 8020988:	f043 7301 	orr.w	r3, r3, #33816576	@ 0x2040000
 802098c:	4618      	mov	r0, r3
 802098e:	f7f8 fcd0 	bl	8019332 <lwip_htonl>
 8020992:	4602      	mov	r2, r0
 8020994:	69fb      	ldr	r3, [r7, #28]
 8020996:	601a      	str	r2, [r3, #0]
    opts += 1;
 8020998:	69fb      	ldr	r3, [r7, #28]
 802099a:	3304      	adds	r3, #4
 802099c:	61fb      	str	r3, [r7, #28]
  }
#endif

  /* Set retransmission timer running if it is not currently enabled
     This must be set before checking the route. */
  if (pcb->rtime < 0) {
 802099e:	68bb      	ldr	r3, [r7, #8]
 80209a0:	f9b3 3030 	ldrsh.w	r3, [r3, #48]	@ 0x30
 80209a4:	2b00      	cmp	r3, #0
 80209a6:	da02      	bge.n	80209ae <tcp_output_segment+0xda>
    pcb->rtime = 0;
 80209a8:	68bb      	ldr	r3, [r7, #8]
 80209aa:	2200      	movs	r2, #0
 80209ac:	861a      	strh	r2, [r3, #48]	@ 0x30
  }

  if (pcb->rttest == 0) {
 80209ae:	68bb      	ldr	r3, [r7, #8]
 80209b0:	6b5b      	ldr	r3, [r3, #52]	@ 0x34
 80209b2:	2b00      	cmp	r3, #0
 80209b4:	d10c      	bne.n	80209d0 <tcp_output_segment+0xfc>
    pcb->rttest = tcp_ticks;
 80209b6:	4b35      	ldr	r3, [pc, #212]	@ (8020a8c <tcp_output_segment+0x1b8>)
 80209b8:	681a      	ldr	r2, [r3, #0]
 80209ba:	68bb      	ldr	r3, [r7, #8]
 80209bc:	635a      	str	r2, [r3, #52]	@ 0x34
    pcb->rtseq = lwip_ntohl(seg->tcphdr->seqno);
 80209be:	68fb      	ldr	r3, [r7, #12]
 80209c0:	691b      	ldr	r3, [r3, #16]
 80209c2:	685b      	ldr	r3, [r3, #4]
 80209c4:	4618      	mov	r0, r3
 80209c6:	f7f8 fcb4 	bl	8019332 <lwip_htonl>
 80209ca:	4602      	mov	r2, r0
 80209cc:	68bb      	ldr	r3, [r7, #8]
 80209ce:	639a      	str	r2, [r3, #56]	@ 0x38
  }
  LWIP_DEBUGF(TCP_OUTPUT_DEBUG, ("tcp_output_segment: %"U32_F":%"U32_F"\n",
                                 lwip_htonl(seg->tcphdr->seqno), lwip_htonl(seg->tcphdr->seqno) +
                                 seg->len));

  len = (u16_t)((u8_t *)seg->tcphdr - (u8_t *)seg->p->payload);
 80209d0:	68fb      	ldr	r3, [r7, #12]
 80209d2:	691a      	ldr	r2, [r3, #16]
 80209d4:	68fb      	ldr	r3, [r7, #12]
 80209d6:	685b      	ldr	r3, [r3, #4]
 80209d8:	685b      	ldr	r3, [r3, #4]
 80209da:	1ad3      	subs	r3, r2, r3
 80209dc:	833b      	strh	r3, [r7, #24]
  if (len == 0) {
    /** Exclude retransmitted segments from this count. */
    MIB2_STATS_INC(mib2.tcpoutsegs);
  }

  seg->p->len -= len;
 80209de:	68fb      	ldr	r3, [r7, #12]
 80209e0:	685b      	ldr	r3, [r3, #4]
 80209e2:	8959      	ldrh	r1, [r3, #10]
 80209e4:	68fb      	ldr	r3, [r7, #12]
 80209e6:	685b      	ldr	r3, [r3, #4]
 80209e8:	8b3a      	ldrh	r2, [r7, #24]
 80209ea:	1a8a      	subs	r2, r1, r2
 80209ec:	b292      	uxth	r2, r2
 80209ee:	815a      	strh	r2, [r3, #10]
  seg->p->tot_len -= len;
 80209f0:	68fb      	ldr	r3, [r7, #12]
 80209f2:	685b      	ldr	r3, [r3, #4]
 80209f4:	8919      	ldrh	r1, [r3, #8]
 80209f6:	68fb      	ldr	r3, [r7, #12]
 80209f8:	685b      	ldr	r3, [r3, #4]
 80209fa:	8b3a      	ldrh	r2, [r7, #24]
 80209fc:	1a8a      	subs	r2, r1, r2
 80209fe:	b292      	uxth	r2, r2
 8020a00:	811a      	strh	r2, [r3, #8]

  seg->p->payload = seg->tcphdr;
 8020a02:	68fb      	ldr	r3, [r7, #12]
 8020a04:	685b      	ldr	r3, [r3, #4]
 8020a06:	68fa      	ldr	r2, [r7, #12]
 8020a08:	6912      	ldr	r2, [r2, #16]
 8020a0a:	605a      	str	r2, [r3, #4]

  seg->tcphdr->chksum = 0;
 8020a0c:	68fb      	ldr	r3, [r7, #12]
 8020a0e:	691b      	ldr	r3, [r3, #16]
 8020a10:	2200      	movs	r2, #0
 8020a12:	741a      	strb	r2, [r3, #16]
 8020a14:	2200      	movs	r2, #0
 8020a16:	745a      	strb	r2, [r3, #17]

#ifdef LWIP_HOOK_TCP_OUT_ADD_TCPOPTS
  opts = LWIP_HOOK_TCP_OUT_ADD_TCPOPTS(seg->p, seg->tcphdr, pcb, opts);
#endif
  LWIP_ASSERT("options not filled", (u8_t *)opts == ((u8_t *)(seg->tcphdr + 1)) + LWIP_TCP_OPT_LENGTH_SEGMENT(seg->flags, pcb));
 8020a18:	68fb      	ldr	r3, [r7, #12]
 8020a1a:	691a      	ldr	r2, [r3, #16]
 8020a1c:	68fb      	ldr	r3, [r7, #12]
 8020a1e:	7b1b      	ldrb	r3, [r3, #12]
 8020a20:	f003 0301 	and.w	r3, r3, #1
 8020a24:	2b00      	cmp	r3, #0
 8020a26:	d001      	beq.n	8020a2c <tcp_output_segment+0x158>
 8020a28:	2318      	movs	r3, #24
 8020a2a:	e000      	b.n	8020a2e <tcp_output_segment+0x15a>
 8020a2c:	2314      	movs	r3, #20
 8020a2e:	4413      	add	r3, r2
 8020a30:	69fa      	ldr	r2, [r7, #28]
 8020a32:	429a      	cmp	r2, r3
 8020a34:	d006      	beq.n	8020a44 <tcp_output_segment+0x170>
 8020a36:	4b10      	ldr	r3, [pc, #64]	@ (8020a78 <tcp_output_segment+0x1a4>)
 8020a38:	f240 621c 	movw	r2, #1564	@ 0x61c
 8020a3c:	4914      	ldr	r1, [pc, #80]	@ (8020a90 <tcp_output_segment+0x1bc>)
 8020a3e:	4810      	ldr	r0, [pc, #64]	@ (8020a80 <tcp_output_segment+0x1ac>)
 8020a40:	f009 fbbc 	bl	802a1bc <iprintf>
  }
#endif /* CHECKSUM_GEN_TCP */
  TCP_STATS_INC(tcp.xmit);

  NETIF_SET_HINTS(netif, &(pcb->netif_hints));
  err = ip_output_if(seg->p, &pcb->local_ip, &pcb->remote_ip, pcb->ttl,
 8020a44:	68fb      	ldr	r3, [r7, #12]
 8020a46:	6858      	ldr	r0, [r3, #4]
 8020a48:	68b9      	ldr	r1, [r7, #8]
 8020a4a:	68bb      	ldr	r3, [r7, #8]
 8020a4c:	1d1c      	adds	r4, r3, #4
 8020a4e:	68bb      	ldr	r3, [r7, #8]
 8020a50:	7add      	ldrb	r5, [r3, #11]
 8020a52:	68bb      	ldr	r3, [r7, #8]
 8020a54:	7a9b      	ldrb	r3, [r3, #10]
 8020a56:	687a      	ldr	r2, [r7, #4]
 8020a58:	9202      	str	r2, [sp, #8]
 8020a5a:	2206      	movs	r2, #6
 8020a5c:	9201      	str	r2, [sp, #4]
 8020a5e:	9300      	str	r3, [sp, #0]
 8020a60:	462b      	mov	r3, r5
 8020a62:	4622      	mov	r2, r4
 8020a64:	f004 fd7a 	bl	802555c <ip4_output_if>
 8020a68:	4603      	mov	r3, r0
 8020a6a:	75fb      	strb	r3, [r7, #23]
    seg->chksum = SWAP_BYTES_IN_WORD(seg->chksum);
    seg->chksum_swapped = 1;
  }
#endif

  return err;
 8020a6c:	f997 3017 	ldrsb.w	r3, [r7, #23]
}
 8020a70:	4618      	mov	r0, r3
 8020a72:	3720      	adds	r7, #32
 8020a74:	46bd      	mov	sp, r7
 8020a76:	bdb0      	pop	{r4, r5, r7, pc}
 8020a78:	0802fa24 	.word	0x0802fa24
 8020a7c:	08030044 	.word	0x08030044
 8020a80:	0802fa78 	.word	0x0802fa78
 8020a84:	08030064 	.word	0x08030064
 8020a88:	08030084 	.word	0x08030084
 8020a8c:	2402af58 	.word	0x2402af58
 8020a90:	080300a8 	.word	0x080300a8

08020a94 <tcp_rexmit_rto_prepare>:
 *
 * @param pcb the tcp_pcb for which to re-enqueue all unacked segments
 */
err_t
tcp_rexmit_rto_prepare(struct tcp_pcb *pcb)
{
 8020a94:	b5b0      	push	{r4, r5, r7, lr}
 8020a96:	b084      	sub	sp, #16
 8020a98:	af00      	add	r7, sp, #0
 8020a9a:	6078      	str	r0, [r7, #4]
  struct tcp_seg *seg;

  LWIP_ASSERT("tcp_rexmit_rto_prepare: invalid pcb", pcb != NULL);
 8020a9c:	687b      	ldr	r3, [r7, #4]
 8020a9e:	2b00      	cmp	r3, #0
 8020aa0:	d106      	bne.n	8020ab0 <tcp_rexmit_rto_prepare+0x1c>
 8020aa2:	4b36      	ldr	r3, [pc, #216]	@ (8020b7c <tcp_rexmit_rto_prepare+0xe8>)
 8020aa4:	f240 6263 	movw	r2, #1635	@ 0x663
 8020aa8:	4935      	ldr	r1, [pc, #212]	@ (8020b80 <tcp_rexmit_rto_prepare+0xec>)
 8020aaa:	4836      	ldr	r0, [pc, #216]	@ (8020b84 <tcp_rexmit_rto_prepare+0xf0>)
 8020aac:	f009 fb86 	bl	802a1bc <iprintf>

  if (pcb->unacked == NULL) {
 8020ab0:	687b      	ldr	r3, [r7, #4]
 8020ab2:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 8020ab4:	2b00      	cmp	r3, #0
 8020ab6:	d102      	bne.n	8020abe <tcp_rexmit_rto_prepare+0x2a>
    return ERR_VAL;
 8020ab8:	f06f 0305 	mvn.w	r3, #5
 8020abc:	e059      	b.n	8020b72 <tcp_rexmit_rto_prepare+0xde>

  /* Move all unacked segments to the head of the unsent queue.
     However, give up if any of the unsent pbufs are still referenced by the
     netif driver due to deferred transmission. No point loading the link further
     if it is struggling to flush its buffered writes. */
  for (seg = pcb->unacked; seg->next != NULL; seg = seg->next) {
 8020abe:	687b      	ldr	r3, [r7, #4]
 8020ac0:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 8020ac2:	60fb      	str	r3, [r7, #12]
 8020ac4:	e00b      	b.n	8020ade <tcp_rexmit_rto_prepare+0x4a>
    if (tcp_output_segment_busy(seg)) {
 8020ac6:	68f8      	ldr	r0, [r7, #12]
 8020ac8:	f7ff fee4 	bl	8020894 <tcp_output_segment_busy>
 8020acc:	4603      	mov	r3, r0
 8020ace:	2b00      	cmp	r3, #0
 8020ad0:	d002      	beq.n	8020ad8 <tcp_rexmit_rto_prepare+0x44>
      LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_rexmit_rto: segment busy\n"));
      return ERR_VAL;
 8020ad2:	f06f 0305 	mvn.w	r3, #5
 8020ad6:	e04c      	b.n	8020b72 <tcp_rexmit_rto_prepare+0xde>
  for (seg = pcb->unacked; seg->next != NULL; seg = seg->next) {
 8020ad8:	68fb      	ldr	r3, [r7, #12]
 8020ada:	681b      	ldr	r3, [r3, #0]
 8020adc:	60fb      	str	r3, [r7, #12]
 8020ade:	68fb      	ldr	r3, [r7, #12]
 8020ae0:	681b      	ldr	r3, [r3, #0]
 8020ae2:	2b00      	cmp	r3, #0
 8020ae4:	d1ef      	bne.n	8020ac6 <tcp_rexmit_rto_prepare+0x32>
    }
  }
  if (tcp_output_segment_busy(seg)) {
 8020ae6:	68f8      	ldr	r0, [r7, #12]
 8020ae8:	f7ff fed4 	bl	8020894 <tcp_output_segment_busy>
 8020aec:	4603      	mov	r3, r0
 8020aee:	2b00      	cmp	r3, #0
 8020af0:	d002      	beq.n	8020af8 <tcp_rexmit_rto_prepare+0x64>
    LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_rexmit_rto: segment busy\n"));
    return ERR_VAL;
 8020af2:	f06f 0305 	mvn.w	r3, #5
 8020af6:	e03c      	b.n	8020b72 <tcp_rexmit_rto_prepare+0xde>
  }
  /* concatenate unsent queue after unacked queue */
  seg->next = pcb->unsent;
 8020af8:	687b      	ldr	r3, [r7, #4]
 8020afa:	6eda      	ldr	r2, [r3, #108]	@ 0x6c
 8020afc:	68fb      	ldr	r3, [r7, #12]
 8020afe:	601a      	str	r2, [r3, #0]
#if TCP_OVERSIZE_DBGCHECK
  /* if last unsent changed, we need to update unsent_oversize */
  if (pcb->unsent == NULL) {
 8020b00:	687b      	ldr	r3, [r7, #4]
 8020b02:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8020b04:	2b00      	cmp	r3, #0
 8020b06:	d104      	bne.n	8020b12 <tcp_rexmit_rto_prepare+0x7e>
    pcb->unsent_oversize = seg->oversize_left;
 8020b08:	68fb      	ldr	r3, [r7, #12]
 8020b0a:	895a      	ldrh	r2, [r3, #10]
 8020b0c:	687b      	ldr	r3, [r7, #4]
 8020b0e:	f8a3 2068 	strh.w	r2, [r3, #104]	@ 0x68
  }
#endif /* TCP_OVERSIZE_DBGCHECK */
  /* unsent queue is the concatenated queue (of unacked, unsent) */
  pcb->unsent = pcb->unacked;
 8020b12:	687b      	ldr	r3, [r7, #4]
 8020b14:	6f1a      	ldr	r2, [r3, #112]	@ 0x70
 8020b16:	687b      	ldr	r3, [r7, #4]
 8020b18:	66da      	str	r2, [r3, #108]	@ 0x6c
  /* unacked queue is now empty */
  pcb->unacked = NULL;
 8020b1a:	687b      	ldr	r3, [r7, #4]
 8020b1c:	2200      	movs	r2, #0
 8020b1e:	671a      	str	r2, [r3, #112]	@ 0x70

  /* Mark RTO in-progress */
  tcp_set_flags(pcb, TF_RTO);
 8020b20:	687b      	ldr	r3, [r7, #4]
 8020b22:	8b5b      	ldrh	r3, [r3, #26]
 8020b24:	f443 6300 	orr.w	r3, r3, #2048	@ 0x800
 8020b28:	b29a      	uxth	r2, r3
 8020b2a:	687b      	ldr	r3, [r7, #4]
 8020b2c:	835a      	strh	r2, [r3, #26]
  /* Record the next byte following retransmit */
  pcb->rto_end = lwip_ntohl(seg->tcphdr->seqno) + TCP_TCPLEN(seg);
 8020b2e:	68fb      	ldr	r3, [r7, #12]
 8020b30:	691b      	ldr	r3, [r3, #16]
 8020b32:	685b      	ldr	r3, [r3, #4]
 8020b34:	4618      	mov	r0, r3
 8020b36:	f7f8 fbfc 	bl	8019332 <lwip_htonl>
 8020b3a:	4604      	mov	r4, r0
 8020b3c:	68fb      	ldr	r3, [r7, #12]
 8020b3e:	891b      	ldrh	r3, [r3, #8]
 8020b40:	461d      	mov	r5, r3
 8020b42:	68fb      	ldr	r3, [r7, #12]
 8020b44:	691b      	ldr	r3, [r3, #16]
 8020b46:	899b      	ldrh	r3, [r3, #12]
 8020b48:	b29b      	uxth	r3, r3
 8020b4a:	4618      	mov	r0, r3
 8020b4c:	f7f8 fbdc 	bl	8019308 <lwip_htons>
 8020b50:	4603      	mov	r3, r0
 8020b52:	b2db      	uxtb	r3, r3
 8020b54:	f003 0303 	and.w	r3, r3, #3
 8020b58:	2b00      	cmp	r3, #0
 8020b5a:	d001      	beq.n	8020b60 <tcp_rexmit_rto_prepare+0xcc>
 8020b5c:	2301      	movs	r3, #1
 8020b5e:	e000      	b.n	8020b62 <tcp_rexmit_rto_prepare+0xce>
 8020b60:	2300      	movs	r3, #0
 8020b62:	442b      	add	r3, r5
 8020b64:	18e2      	adds	r2, r4, r3
 8020b66:	687b      	ldr	r3, [r7, #4]
 8020b68:	64da      	str	r2, [r3, #76]	@ 0x4c
  /* Don't take any RTT measurements after retransmitting. */
  pcb->rttest = 0;
 8020b6a:	687b      	ldr	r3, [r7, #4]
 8020b6c:	2200      	movs	r2, #0
 8020b6e:	635a      	str	r2, [r3, #52]	@ 0x34

  return ERR_OK;
 8020b70:	2300      	movs	r3, #0
}
 8020b72:	4618      	mov	r0, r3
 8020b74:	3710      	adds	r7, #16
 8020b76:	46bd      	mov	sp, r7
 8020b78:	bdb0      	pop	{r4, r5, r7, pc}
 8020b7a:	bf00      	nop
 8020b7c:	0802fa24 	.word	0x0802fa24
 8020b80:	080300bc 	.word	0x080300bc
 8020b84:	0802fa78 	.word	0x0802fa78

08020b88 <tcp_rexmit_rto_commit>:
 *
 * @param pcb the tcp_pcb for which to re-enqueue all unacked segments
 */
void
tcp_rexmit_rto_commit(struct tcp_pcb *pcb)
{
 8020b88:	b580      	push	{r7, lr}
 8020b8a:	b082      	sub	sp, #8
 8020b8c:	af00      	add	r7, sp, #0
 8020b8e:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT("tcp_rexmit_rto_commit: invalid pcb", pcb != NULL);
 8020b90:	687b      	ldr	r3, [r7, #4]
 8020b92:	2b00      	cmp	r3, #0
 8020b94:	d106      	bne.n	8020ba4 <tcp_rexmit_rto_commit+0x1c>
 8020b96:	4b0d      	ldr	r3, [pc, #52]	@ (8020bcc <tcp_rexmit_rto_commit+0x44>)
 8020b98:	f44f 62d3 	mov.w	r2, #1688	@ 0x698
 8020b9c:	490c      	ldr	r1, [pc, #48]	@ (8020bd0 <tcp_rexmit_rto_commit+0x48>)
 8020b9e:	480d      	ldr	r0, [pc, #52]	@ (8020bd4 <tcp_rexmit_rto_commit+0x4c>)
 8020ba0:	f009 fb0c 	bl	802a1bc <iprintf>

  /* increment number of retransmissions */
  if (pcb->nrtx < 0xFF) {
 8020ba4:	687b      	ldr	r3, [r7, #4]
 8020ba6:	f893 3042 	ldrb.w	r3, [r3, #66]	@ 0x42
 8020baa:	2bff      	cmp	r3, #255	@ 0xff
 8020bac:	d007      	beq.n	8020bbe <tcp_rexmit_rto_commit+0x36>
    ++pcb->nrtx;
 8020bae:	687b      	ldr	r3, [r7, #4]
 8020bb0:	f893 3042 	ldrb.w	r3, [r3, #66]	@ 0x42
 8020bb4:	3301      	adds	r3, #1
 8020bb6:	b2da      	uxtb	r2, r3
 8020bb8:	687b      	ldr	r3, [r7, #4]
 8020bba:	f883 2042 	strb.w	r2, [r3, #66]	@ 0x42
  }
  /* Do the actual retransmission */
  tcp_output(pcb);
 8020bbe:	6878      	ldr	r0, [r7, #4]
 8020bc0:	f7ff fc70 	bl	80204a4 <tcp_output>
}
 8020bc4:	bf00      	nop
 8020bc6:	3708      	adds	r7, #8
 8020bc8:	46bd      	mov	sp, r7
 8020bca:	bd80      	pop	{r7, pc}
 8020bcc:	0802fa24 	.word	0x0802fa24
 8020bd0:	080300e0 	.word	0x080300e0
 8020bd4:	0802fa78 	.word	0x0802fa78

08020bd8 <tcp_rexmit_rto>:
 *
 * @param pcb the tcp_pcb for which to re-enqueue all unacked segments
 */
void
tcp_rexmit_rto(struct tcp_pcb *pcb)
{
 8020bd8:	b580      	push	{r7, lr}
 8020bda:	b082      	sub	sp, #8
 8020bdc:	af00      	add	r7, sp, #0
 8020bde:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT("tcp_rexmit_rto: invalid pcb", pcb != NULL);
 8020be0:	687b      	ldr	r3, [r7, #4]
 8020be2:	2b00      	cmp	r3, #0
 8020be4:	d106      	bne.n	8020bf4 <tcp_rexmit_rto+0x1c>
 8020be6:	4b0a      	ldr	r3, [pc, #40]	@ (8020c10 <tcp_rexmit_rto+0x38>)
 8020be8:	f240 62ad 	movw	r2, #1709	@ 0x6ad
 8020bec:	4909      	ldr	r1, [pc, #36]	@ (8020c14 <tcp_rexmit_rto+0x3c>)
 8020bee:	480a      	ldr	r0, [pc, #40]	@ (8020c18 <tcp_rexmit_rto+0x40>)
 8020bf0:	f009 fae4 	bl	802a1bc <iprintf>

  if (tcp_rexmit_rto_prepare(pcb) == ERR_OK) {
 8020bf4:	6878      	ldr	r0, [r7, #4]
 8020bf6:	f7ff ff4d 	bl	8020a94 <tcp_rexmit_rto_prepare>
 8020bfa:	4603      	mov	r3, r0
 8020bfc:	2b00      	cmp	r3, #0
 8020bfe:	d102      	bne.n	8020c06 <tcp_rexmit_rto+0x2e>
    tcp_rexmit_rto_commit(pcb);
 8020c00:	6878      	ldr	r0, [r7, #4]
 8020c02:	f7ff ffc1 	bl	8020b88 <tcp_rexmit_rto_commit>
  }
}
 8020c06:	bf00      	nop
 8020c08:	3708      	adds	r7, #8
 8020c0a:	46bd      	mov	sp, r7
 8020c0c:	bd80      	pop	{r7, pc}
 8020c0e:	bf00      	nop
 8020c10:	0802fa24 	.word	0x0802fa24
 8020c14:	08030104 	.word	0x08030104
 8020c18:	0802fa78 	.word	0x0802fa78

08020c1c <tcp_rexmit>:
 *
 * @param pcb the tcp_pcb for which to retransmit the first unacked segment
 */
err_t
tcp_rexmit(struct tcp_pcb *pcb)
{
 8020c1c:	b590      	push	{r4, r7, lr}
 8020c1e:	b085      	sub	sp, #20
 8020c20:	af00      	add	r7, sp, #0
 8020c22:	6078      	str	r0, [r7, #4]
  struct tcp_seg *seg;
  struct tcp_seg **cur_seg;

  LWIP_ASSERT("tcp_rexmit: invalid pcb", pcb != NULL);
 8020c24:	687b      	ldr	r3, [r7, #4]
 8020c26:	2b00      	cmp	r3, #0
 8020c28:	d106      	bne.n	8020c38 <tcp_rexmit+0x1c>
 8020c2a:	4b2f      	ldr	r3, [pc, #188]	@ (8020ce8 <tcp_rexmit+0xcc>)
 8020c2c:	f240 62c1 	movw	r2, #1729	@ 0x6c1
 8020c30:	492e      	ldr	r1, [pc, #184]	@ (8020cec <tcp_rexmit+0xd0>)
 8020c32:	482f      	ldr	r0, [pc, #188]	@ (8020cf0 <tcp_rexmit+0xd4>)
 8020c34:	f009 fac2 	bl	802a1bc <iprintf>

  if (pcb->unacked == NULL) {
 8020c38:	687b      	ldr	r3, [r7, #4]
 8020c3a:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 8020c3c:	2b00      	cmp	r3, #0
 8020c3e:	d102      	bne.n	8020c46 <tcp_rexmit+0x2a>
    return ERR_VAL;
 8020c40:	f06f 0305 	mvn.w	r3, #5
 8020c44:	e04c      	b.n	8020ce0 <tcp_rexmit+0xc4>
  }

  seg = pcb->unacked;
 8020c46:	687b      	ldr	r3, [r7, #4]
 8020c48:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 8020c4a:	60bb      	str	r3, [r7, #8]

  /* Give up if the segment is still referenced by the netif driver
     due to deferred transmission. */
  if (tcp_output_segment_busy(seg)) {
 8020c4c:	68b8      	ldr	r0, [r7, #8]
 8020c4e:	f7ff fe21 	bl	8020894 <tcp_output_segment_busy>
 8020c52:	4603      	mov	r3, r0
 8020c54:	2b00      	cmp	r3, #0
 8020c56:	d002      	beq.n	8020c5e <tcp_rexmit+0x42>
    LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_rexmit busy\n"));
    return ERR_VAL;
 8020c58:	f06f 0305 	mvn.w	r3, #5
 8020c5c:	e040      	b.n	8020ce0 <tcp_rexmit+0xc4>
  }

  /* Move the first unacked segment to the unsent queue */
  /* Keep the unsent queue sorted. */
  pcb->unacked = seg->next;
 8020c5e:	68bb      	ldr	r3, [r7, #8]
 8020c60:	681a      	ldr	r2, [r3, #0]
 8020c62:	687b      	ldr	r3, [r7, #4]
 8020c64:	671a      	str	r2, [r3, #112]	@ 0x70

  cur_seg = &(pcb->unsent);
 8020c66:	687b      	ldr	r3, [r7, #4]
 8020c68:	336c      	adds	r3, #108	@ 0x6c
 8020c6a:	60fb      	str	r3, [r7, #12]
  while (*cur_seg &&
 8020c6c:	e002      	b.n	8020c74 <tcp_rexmit+0x58>
         TCP_SEQ_LT(lwip_ntohl((*cur_seg)->tcphdr->seqno), lwip_ntohl(seg->tcphdr->seqno))) {
    cur_seg = &((*cur_seg)->next );
 8020c6e:	68fb      	ldr	r3, [r7, #12]
 8020c70:	681b      	ldr	r3, [r3, #0]
 8020c72:	60fb      	str	r3, [r7, #12]
  while (*cur_seg &&
 8020c74:	68fb      	ldr	r3, [r7, #12]
 8020c76:	681b      	ldr	r3, [r3, #0]
 8020c78:	2b00      	cmp	r3, #0
 8020c7a:	d011      	beq.n	8020ca0 <tcp_rexmit+0x84>
         TCP_SEQ_LT(lwip_ntohl((*cur_seg)->tcphdr->seqno), lwip_ntohl(seg->tcphdr->seqno))) {
 8020c7c:	68fb      	ldr	r3, [r7, #12]
 8020c7e:	681b      	ldr	r3, [r3, #0]
 8020c80:	691b      	ldr	r3, [r3, #16]
 8020c82:	685b      	ldr	r3, [r3, #4]
 8020c84:	4618      	mov	r0, r3
 8020c86:	f7f8 fb54 	bl	8019332 <lwip_htonl>
 8020c8a:	4604      	mov	r4, r0
 8020c8c:	68bb      	ldr	r3, [r7, #8]
 8020c8e:	691b      	ldr	r3, [r3, #16]
 8020c90:	685b      	ldr	r3, [r3, #4]
 8020c92:	4618      	mov	r0, r3
 8020c94:	f7f8 fb4d 	bl	8019332 <lwip_htonl>
 8020c98:	4603      	mov	r3, r0
 8020c9a:	1ae3      	subs	r3, r4, r3
  while (*cur_seg &&
 8020c9c:	2b00      	cmp	r3, #0
 8020c9e:	dbe6      	blt.n	8020c6e <tcp_rexmit+0x52>
  }
  seg->next = *cur_seg;
 8020ca0:	68fb      	ldr	r3, [r7, #12]
 8020ca2:	681a      	ldr	r2, [r3, #0]
 8020ca4:	68bb      	ldr	r3, [r7, #8]
 8020ca6:	601a      	str	r2, [r3, #0]
  *cur_seg = seg;
 8020ca8:	68fb      	ldr	r3, [r7, #12]
 8020caa:	68ba      	ldr	r2, [r7, #8]
 8020cac:	601a      	str	r2, [r3, #0]
#if TCP_OVERSIZE
  if (seg->next == NULL) {
 8020cae:	68bb      	ldr	r3, [r7, #8]
 8020cb0:	681b      	ldr	r3, [r3, #0]
 8020cb2:	2b00      	cmp	r3, #0
 8020cb4:	d103      	bne.n	8020cbe <tcp_rexmit+0xa2>
    /* the retransmitted segment is last in unsent, so reset unsent_oversize */
    pcb->unsent_oversize = 0;
 8020cb6:	687b      	ldr	r3, [r7, #4]
 8020cb8:	2200      	movs	r2, #0
 8020cba:	f8a3 2068 	strh.w	r2, [r3, #104]	@ 0x68
  }
#endif /* TCP_OVERSIZE */

  if (pcb->nrtx < 0xFF) {
 8020cbe:	687b      	ldr	r3, [r7, #4]
 8020cc0:	f893 3042 	ldrb.w	r3, [r3, #66]	@ 0x42
 8020cc4:	2bff      	cmp	r3, #255	@ 0xff
 8020cc6:	d007      	beq.n	8020cd8 <tcp_rexmit+0xbc>
    ++pcb->nrtx;
 8020cc8:	687b      	ldr	r3, [r7, #4]
 8020cca:	f893 3042 	ldrb.w	r3, [r3, #66]	@ 0x42
 8020cce:	3301      	adds	r3, #1
 8020cd0:	b2da      	uxtb	r2, r3
 8020cd2:	687b      	ldr	r3, [r7, #4]
 8020cd4:	f883 2042 	strb.w	r2, [r3, #66]	@ 0x42
  }

  /* Don't take any rtt measurements after retransmitting. */
  pcb->rttest = 0;
 8020cd8:	687b      	ldr	r3, [r7, #4]
 8020cda:	2200      	movs	r2, #0
 8020cdc:	635a      	str	r2, [r3, #52]	@ 0x34

  /* Do the actual retransmission. */
  MIB2_STATS_INC(mib2.tcpretranssegs);
  /* No need to call tcp_output: we are always called from tcp_input()
     and thus tcp_output directly returns. */
  return ERR_OK;
 8020cde:	2300      	movs	r3, #0
}
 8020ce0:	4618      	mov	r0, r3
 8020ce2:	3714      	adds	r7, #20
 8020ce4:	46bd      	mov	sp, r7
 8020ce6:	bd90      	pop	{r4, r7, pc}
 8020ce8:	0802fa24 	.word	0x0802fa24
 8020cec:	08030120 	.word	0x08030120
 8020cf0:	0802fa78 	.word	0x0802fa78

08020cf4 <tcp_rexmit_fast>:
 *
 * @param pcb the tcp_pcb for which to retransmit the first unacked segment
 */
void
tcp_rexmit_fast(struct tcp_pcb *pcb)
{
 8020cf4:	b580      	push	{r7, lr}
 8020cf6:	b082      	sub	sp, #8
 8020cf8:	af00      	add	r7, sp, #0
 8020cfa:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT("tcp_rexmit_fast: invalid pcb", pcb != NULL);
 8020cfc:	687b      	ldr	r3, [r7, #4]
 8020cfe:	2b00      	cmp	r3, #0
 8020d00:	d106      	bne.n	8020d10 <tcp_rexmit_fast+0x1c>
 8020d02:	4b2a      	ldr	r3, [pc, #168]	@ (8020dac <tcp_rexmit_fast+0xb8>)
 8020d04:	f240 62f9 	movw	r2, #1785	@ 0x6f9
 8020d08:	4929      	ldr	r1, [pc, #164]	@ (8020db0 <tcp_rexmit_fast+0xbc>)
 8020d0a:	482a      	ldr	r0, [pc, #168]	@ (8020db4 <tcp_rexmit_fast+0xc0>)
 8020d0c:	f009 fa56 	bl	802a1bc <iprintf>

  if (pcb->unacked != NULL && !(pcb->flags & TF_INFR)) {
 8020d10:	687b      	ldr	r3, [r7, #4]
 8020d12:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 8020d14:	2b00      	cmp	r3, #0
 8020d16:	d045      	beq.n	8020da4 <tcp_rexmit_fast+0xb0>
 8020d18:	687b      	ldr	r3, [r7, #4]
 8020d1a:	8b5b      	ldrh	r3, [r3, #26]
 8020d1c:	f003 0304 	and.w	r3, r3, #4
 8020d20:	2b00      	cmp	r3, #0
 8020d22:	d13f      	bne.n	8020da4 <tcp_rexmit_fast+0xb0>
    LWIP_DEBUGF(TCP_FR_DEBUG,
                ("tcp_receive: dupacks %"U16_F" (%"U32_F
                 "), fast retransmit %"U32_F"\n",
                 (u16_t)pcb->dupacks, pcb->lastack,
                 lwip_ntohl(pcb->unacked->tcphdr->seqno)));
    if (tcp_rexmit(pcb) == ERR_OK) {
 8020d24:	6878      	ldr	r0, [r7, #4]
 8020d26:	f7ff ff79 	bl	8020c1c <tcp_rexmit>
 8020d2a:	4603      	mov	r3, r0
 8020d2c:	2b00      	cmp	r3, #0
 8020d2e:	d139      	bne.n	8020da4 <tcp_rexmit_fast+0xb0>
      /* Set ssthresh to half of the minimum of the current
       * cwnd and the advertised window */
      pcb->ssthresh = LWIP_MIN(pcb->cwnd, pcb->snd_wnd) / 2;
 8020d30:	687b      	ldr	r3, [r7, #4]
 8020d32:	f8b3 2060 	ldrh.w	r2, [r3, #96]	@ 0x60
 8020d36:	687b      	ldr	r3, [r7, #4]
 8020d38:	f8b3 3048 	ldrh.w	r3, [r3, #72]	@ 0x48
 8020d3c:	4293      	cmp	r3, r2
 8020d3e:	bf28      	it	cs
 8020d40:	4613      	movcs	r3, r2
 8020d42:	b29b      	uxth	r3, r3
 8020d44:	2b00      	cmp	r3, #0
 8020d46:	da00      	bge.n	8020d4a <tcp_rexmit_fast+0x56>
 8020d48:	3301      	adds	r3, #1
 8020d4a:	105b      	asrs	r3, r3, #1
 8020d4c:	b29a      	uxth	r2, r3
 8020d4e:	687b      	ldr	r3, [r7, #4]
 8020d50:	f8a3 204a 	strh.w	r2, [r3, #74]	@ 0x4a

      /* The minimum value for ssthresh should be 2 MSS */
      if (pcb->ssthresh < (2U * pcb->mss)) {
 8020d54:	687b      	ldr	r3, [r7, #4]
 8020d56:	f8b3 304a 	ldrh.w	r3, [r3, #74]	@ 0x4a
 8020d5a:	461a      	mov	r2, r3
 8020d5c:	687b      	ldr	r3, [r7, #4]
 8020d5e:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 8020d60:	005b      	lsls	r3, r3, #1
 8020d62:	429a      	cmp	r2, r3
 8020d64:	d206      	bcs.n	8020d74 <tcp_rexmit_fast+0x80>
        LWIP_DEBUGF(TCP_FR_DEBUG,
                    ("tcp_receive: The minimum value for ssthresh %"TCPWNDSIZE_F
                     " should be min 2 mss %"U16_F"...\n",
                     pcb->ssthresh, (u16_t)(2 * pcb->mss)));
        pcb->ssthresh = 2 * pcb->mss;
 8020d66:	687b      	ldr	r3, [r7, #4]
 8020d68:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 8020d6a:	005b      	lsls	r3, r3, #1
 8020d6c:	b29a      	uxth	r2, r3
 8020d6e:	687b      	ldr	r3, [r7, #4]
 8020d70:	f8a3 204a 	strh.w	r2, [r3, #74]	@ 0x4a
      }

      pcb->cwnd = pcb->ssthresh + 3 * pcb->mss;
 8020d74:	687b      	ldr	r3, [r7, #4]
 8020d76:	f8b3 204a 	ldrh.w	r2, [r3, #74]	@ 0x4a
 8020d7a:	687b      	ldr	r3, [r7, #4]
 8020d7c:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 8020d7e:	4619      	mov	r1, r3
 8020d80:	0049      	lsls	r1, r1, #1
 8020d82:	440b      	add	r3, r1
 8020d84:	b29b      	uxth	r3, r3
 8020d86:	4413      	add	r3, r2
 8020d88:	b29a      	uxth	r2, r3
 8020d8a:	687b      	ldr	r3, [r7, #4]
 8020d8c:	f8a3 2048 	strh.w	r2, [r3, #72]	@ 0x48
      tcp_set_flags(pcb, TF_INFR);
 8020d90:	687b      	ldr	r3, [r7, #4]
 8020d92:	8b5b      	ldrh	r3, [r3, #26]
 8020d94:	f043 0304 	orr.w	r3, r3, #4
 8020d98:	b29a      	uxth	r2, r3
 8020d9a:	687b      	ldr	r3, [r7, #4]
 8020d9c:	835a      	strh	r2, [r3, #26]

      /* Reset the retransmission timer to prevent immediate rto retransmissions */
      pcb->rtime = 0;
 8020d9e:	687b      	ldr	r3, [r7, #4]
 8020da0:	2200      	movs	r2, #0
 8020da2:	861a      	strh	r2, [r3, #48]	@ 0x30
    }
  }
}
 8020da4:	bf00      	nop
 8020da6:	3708      	adds	r7, #8
 8020da8:	46bd      	mov	sp, r7
 8020daa:	bd80      	pop	{r7, pc}
 8020dac:	0802fa24 	.word	0x0802fa24
 8020db0:	08030138 	.word	0x08030138
 8020db4:	0802fa78 	.word	0x0802fa78

08020db8 <tcp_output_alloc_header_common>:

static struct pbuf *
tcp_output_alloc_header_common(u32_t ackno, u16_t optlen, u16_t datalen,
                        u32_t seqno_be /* already in network byte order */,
                        u16_t src_port, u16_t dst_port, u8_t flags, u16_t wnd)
{
 8020db8:	b580      	push	{r7, lr}
 8020dba:	b086      	sub	sp, #24
 8020dbc:	af00      	add	r7, sp, #0
 8020dbe:	60f8      	str	r0, [r7, #12]
 8020dc0:	607b      	str	r3, [r7, #4]
 8020dc2:	460b      	mov	r3, r1
 8020dc4:	817b      	strh	r3, [r7, #10]
 8020dc6:	4613      	mov	r3, r2
 8020dc8:	813b      	strh	r3, [r7, #8]
  struct tcp_hdr *tcphdr;
  struct pbuf *p;

  p = pbuf_alloc(PBUF_IP, TCP_HLEN + optlen + datalen, PBUF_RAM);
 8020dca:	897a      	ldrh	r2, [r7, #10]
 8020dcc:	893b      	ldrh	r3, [r7, #8]
 8020dce:	4413      	add	r3, r2
 8020dd0:	b29b      	uxth	r3, r3
 8020dd2:	3314      	adds	r3, #20
 8020dd4:	b29b      	uxth	r3, r3
 8020dd6:	f44f 7220 	mov.w	r2, #640	@ 0x280
 8020dda:	4619      	mov	r1, r3
 8020ddc:	2022      	movs	r0, #34	@ 0x22
 8020dde:	f7f9 fc5f 	bl	801a6a0 <pbuf_alloc>
 8020de2:	6178      	str	r0, [r7, #20]
  if (p != NULL) {
 8020de4:	697b      	ldr	r3, [r7, #20]
 8020de6:	2b00      	cmp	r3, #0
 8020de8:	d04d      	beq.n	8020e86 <tcp_output_alloc_header_common+0xce>
    LWIP_ASSERT("check that first pbuf can hold struct tcp_hdr",
 8020dea:	897b      	ldrh	r3, [r7, #10]
 8020dec:	3313      	adds	r3, #19
 8020dee:	697a      	ldr	r2, [r7, #20]
 8020df0:	8952      	ldrh	r2, [r2, #10]
 8020df2:	4293      	cmp	r3, r2
 8020df4:	db06      	blt.n	8020e04 <tcp_output_alloc_header_common+0x4c>
 8020df6:	4b26      	ldr	r3, [pc, #152]	@ (8020e90 <tcp_output_alloc_header_common+0xd8>)
 8020df8:	f240 7223 	movw	r2, #1827	@ 0x723
 8020dfc:	4925      	ldr	r1, [pc, #148]	@ (8020e94 <tcp_output_alloc_header_common+0xdc>)
 8020dfe:	4826      	ldr	r0, [pc, #152]	@ (8020e98 <tcp_output_alloc_header_common+0xe0>)
 8020e00:	f009 f9dc 	bl	802a1bc <iprintf>
                (p->len >= TCP_HLEN + optlen));
    tcphdr = (struct tcp_hdr *)p->payload;
 8020e04:	697b      	ldr	r3, [r7, #20]
 8020e06:	685b      	ldr	r3, [r3, #4]
 8020e08:	613b      	str	r3, [r7, #16]
    tcphdr->src = lwip_htons(src_port);
 8020e0a:	8c3b      	ldrh	r3, [r7, #32]
 8020e0c:	4618      	mov	r0, r3
 8020e0e:	f7f8 fa7b 	bl	8019308 <lwip_htons>
 8020e12:	4603      	mov	r3, r0
 8020e14:	461a      	mov	r2, r3
 8020e16:	693b      	ldr	r3, [r7, #16]
 8020e18:	801a      	strh	r2, [r3, #0]
    tcphdr->dest = lwip_htons(dst_port);
 8020e1a:	8cbb      	ldrh	r3, [r7, #36]	@ 0x24
 8020e1c:	4618      	mov	r0, r3
 8020e1e:	f7f8 fa73 	bl	8019308 <lwip_htons>
 8020e22:	4603      	mov	r3, r0
 8020e24:	461a      	mov	r2, r3
 8020e26:	693b      	ldr	r3, [r7, #16]
 8020e28:	805a      	strh	r2, [r3, #2]
    tcphdr->seqno = seqno_be;
 8020e2a:	693b      	ldr	r3, [r7, #16]
 8020e2c:	687a      	ldr	r2, [r7, #4]
 8020e2e:	605a      	str	r2, [r3, #4]
    tcphdr->ackno = lwip_htonl(ackno);
 8020e30:	68f8      	ldr	r0, [r7, #12]
 8020e32:	f7f8 fa7e 	bl	8019332 <lwip_htonl>
 8020e36:	4602      	mov	r2, r0
 8020e38:	693b      	ldr	r3, [r7, #16]
 8020e3a:	609a      	str	r2, [r3, #8]
    TCPH_HDRLEN_FLAGS_SET(tcphdr, (5 + optlen / 4), flags);
 8020e3c:	897b      	ldrh	r3, [r7, #10]
 8020e3e:	089b      	lsrs	r3, r3, #2
 8020e40:	b29b      	uxth	r3, r3
 8020e42:	3305      	adds	r3, #5
 8020e44:	b29b      	uxth	r3, r3
 8020e46:	031b      	lsls	r3, r3, #12
 8020e48:	b29a      	uxth	r2, r3
 8020e4a:	f897 3028 	ldrb.w	r3, [r7, #40]	@ 0x28
 8020e4e:	b29b      	uxth	r3, r3
 8020e50:	4313      	orrs	r3, r2
 8020e52:	b29b      	uxth	r3, r3
 8020e54:	4618      	mov	r0, r3
 8020e56:	f7f8 fa57 	bl	8019308 <lwip_htons>
 8020e5a:	4603      	mov	r3, r0
 8020e5c:	461a      	mov	r2, r3
 8020e5e:	693b      	ldr	r3, [r7, #16]
 8020e60:	819a      	strh	r2, [r3, #12]
    tcphdr->wnd = lwip_htons(wnd);
 8020e62:	8dbb      	ldrh	r3, [r7, #44]	@ 0x2c
 8020e64:	4618      	mov	r0, r3
 8020e66:	f7f8 fa4f 	bl	8019308 <lwip_htons>
 8020e6a:	4603      	mov	r3, r0
 8020e6c:	461a      	mov	r2, r3
 8020e6e:	693b      	ldr	r3, [r7, #16]
 8020e70:	81da      	strh	r2, [r3, #14]
    tcphdr->chksum = 0;
 8020e72:	693b      	ldr	r3, [r7, #16]
 8020e74:	2200      	movs	r2, #0
 8020e76:	741a      	strb	r2, [r3, #16]
 8020e78:	2200      	movs	r2, #0
 8020e7a:	745a      	strb	r2, [r3, #17]
    tcphdr->urgp = 0;
 8020e7c:	693b      	ldr	r3, [r7, #16]
 8020e7e:	2200      	movs	r2, #0
 8020e80:	749a      	strb	r2, [r3, #18]
 8020e82:	2200      	movs	r2, #0
 8020e84:	74da      	strb	r2, [r3, #19]
  }
  return p;
 8020e86:	697b      	ldr	r3, [r7, #20]
}
 8020e88:	4618      	mov	r0, r3
 8020e8a:	3718      	adds	r7, #24
 8020e8c:	46bd      	mov	sp, r7
 8020e8e:	bd80      	pop	{r7, pc}
 8020e90:	0802fa24 	.word	0x0802fa24
 8020e94:	08030158 	.word	0x08030158
 8020e98:	0802fa78 	.word	0x0802fa78

08020e9c <tcp_output_alloc_header>:
 * @return pbuf with p->payload being the tcp_hdr
 */
static struct pbuf *
tcp_output_alloc_header(struct tcp_pcb *pcb, u16_t optlen, u16_t datalen,
                        u32_t seqno_be /* already in network byte order */)
{
 8020e9c:	b5b0      	push	{r4, r5, r7, lr}
 8020e9e:	b08a      	sub	sp, #40	@ 0x28
 8020ea0:	af04      	add	r7, sp, #16
 8020ea2:	60f8      	str	r0, [r7, #12]
 8020ea4:	607b      	str	r3, [r7, #4]
 8020ea6:	460b      	mov	r3, r1
 8020ea8:	817b      	strh	r3, [r7, #10]
 8020eaa:	4613      	mov	r3, r2
 8020eac:	813b      	strh	r3, [r7, #8]
  struct pbuf *p;

  LWIP_ASSERT("tcp_output_alloc_header: invalid pcb", pcb != NULL);
 8020eae:	68fb      	ldr	r3, [r7, #12]
 8020eb0:	2b00      	cmp	r3, #0
 8020eb2:	d106      	bne.n	8020ec2 <tcp_output_alloc_header+0x26>
 8020eb4:	4b15      	ldr	r3, [pc, #84]	@ (8020f0c <tcp_output_alloc_header+0x70>)
 8020eb6:	f240 7242 	movw	r2, #1858	@ 0x742
 8020eba:	4915      	ldr	r1, [pc, #84]	@ (8020f10 <tcp_output_alloc_header+0x74>)
 8020ebc:	4815      	ldr	r0, [pc, #84]	@ (8020f14 <tcp_output_alloc_header+0x78>)
 8020ebe:	f009 f97d 	bl	802a1bc <iprintf>

  p = tcp_output_alloc_header_common(pcb->rcv_nxt, optlen, datalen,
 8020ec2:	68fb      	ldr	r3, [r7, #12]
 8020ec4:	6a58      	ldr	r0, [r3, #36]	@ 0x24
 8020ec6:	68fb      	ldr	r3, [r7, #12]
 8020ec8:	8adb      	ldrh	r3, [r3, #22]
 8020eca:	68fa      	ldr	r2, [r7, #12]
 8020ecc:	8b12      	ldrh	r2, [r2, #24]
 8020ece:	68f9      	ldr	r1, [r7, #12]
 8020ed0:	8d49      	ldrh	r1, [r1, #42]	@ 0x2a
 8020ed2:	893d      	ldrh	r5, [r7, #8]
 8020ed4:	897c      	ldrh	r4, [r7, #10]
 8020ed6:	9103      	str	r1, [sp, #12]
 8020ed8:	2110      	movs	r1, #16
 8020eda:	9102      	str	r1, [sp, #8]
 8020edc:	9201      	str	r2, [sp, #4]
 8020ede:	9300      	str	r3, [sp, #0]
 8020ee0:	687b      	ldr	r3, [r7, #4]
 8020ee2:	462a      	mov	r2, r5
 8020ee4:	4621      	mov	r1, r4
 8020ee6:	f7ff ff67 	bl	8020db8 <tcp_output_alloc_header_common>
 8020eea:	6178      	str	r0, [r7, #20]
    seqno_be, pcb->local_port, pcb->remote_port, TCP_ACK,
    TCPWND_MIN16(RCV_WND_SCALE(pcb, pcb->rcv_ann_wnd)));
  if (p != NULL) {
 8020eec:	697b      	ldr	r3, [r7, #20]
 8020eee:	2b00      	cmp	r3, #0
 8020ef0:	d006      	beq.n	8020f00 <tcp_output_alloc_header+0x64>
    /* If we're sending a packet, update the announced right window edge */
    pcb->rcv_ann_right_edge = pcb->rcv_nxt + pcb->rcv_ann_wnd;
 8020ef2:	68fb      	ldr	r3, [r7, #12]
 8020ef4:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8020ef6:	68fa      	ldr	r2, [r7, #12]
 8020ef8:	8d52      	ldrh	r2, [r2, #42]	@ 0x2a
 8020efa:	441a      	add	r2, r3
 8020efc:	68fb      	ldr	r3, [r7, #12]
 8020efe:	62da      	str	r2, [r3, #44]	@ 0x2c
  }
  return p;
 8020f00:	697b      	ldr	r3, [r7, #20]
}
 8020f02:	4618      	mov	r0, r3
 8020f04:	3718      	adds	r7, #24
 8020f06:	46bd      	mov	sp, r7
 8020f08:	bdb0      	pop	{r4, r5, r7, pc}
 8020f0a:	bf00      	nop
 8020f0c:	0802fa24 	.word	0x0802fa24
 8020f10:	08030188 	.word	0x08030188
 8020f14:	0802fa78 	.word	0x0802fa78

08020f18 <tcp_output_fill_options>:

/* Fill in options for control segments */
static void
tcp_output_fill_options(const struct tcp_pcb *pcb, struct pbuf *p, u8_t optflags, u8_t num_sacks)
{
 8020f18:	b580      	push	{r7, lr}
 8020f1a:	b088      	sub	sp, #32
 8020f1c:	af00      	add	r7, sp, #0
 8020f1e:	60f8      	str	r0, [r7, #12]
 8020f20:	60b9      	str	r1, [r7, #8]
 8020f22:	4611      	mov	r1, r2
 8020f24:	461a      	mov	r2, r3
 8020f26:	460b      	mov	r3, r1
 8020f28:	71fb      	strb	r3, [r7, #7]
 8020f2a:	4613      	mov	r3, r2
 8020f2c:	71bb      	strb	r3, [r7, #6]
  struct tcp_hdr *tcphdr;
  u32_t *opts;
  u16_t sacks_len = 0;
 8020f2e:	2300      	movs	r3, #0
 8020f30:	83fb      	strh	r3, [r7, #30]

  LWIP_ASSERT("tcp_output_fill_options: invalid pbuf", p != NULL);
 8020f32:	68bb      	ldr	r3, [r7, #8]
 8020f34:	2b00      	cmp	r3, #0
 8020f36:	d106      	bne.n	8020f46 <tcp_output_fill_options+0x2e>
 8020f38:	4b12      	ldr	r3, [pc, #72]	@ (8020f84 <tcp_output_fill_options+0x6c>)
 8020f3a:	f240 7256 	movw	r2, #1878	@ 0x756
 8020f3e:	4912      	ldr	r1, [pc, #72]	@ (8020f88 <tcp_output_fill_options+0x70>)
 8020f40:	4812      	ldr	r0, [pc, #72]	@ (8020f8c <tcp_output_fill_options+0x74>)
 8020f42:	f009 f93b 	bl	802a1bc <iprintf>

  tcphdr = (struct tcp_hdr *)p->payload;
 8020f46:	68bb      	ldr	r3, [r7, #8]
 8020f48:	685b      	ldr	r3, [r3, #4]
 8020f4a:	61bb      	str	r3, [r7, #24]
  opts = (u32_t *)(void *)(tcphdr + 1);
 8020f4c:	69bb      	ldr	r3, [r7, #24]
 8020f4e:	3314      	adds	r3, #20
 8020f50:	617b      	str	r3, [r7, #20]
  opts = LWIP_HOOK_TCP_OUT_ADD_TCPOPTS(p, tcphdr, pcb, opts);
#endif

  LWIP_UNUSED_ARG(pcb);
  LWIP_UNUSED_ARG(sacks_len);
  LWIP_ASSERT("options not filled", (u8_t *)opts == ((u8_t *)(tcphdr + 1)) + sacks_len * 4 + LWIP_TCP_OPT_LENGTH_SEGMENT(optflags, pcb));
 8020f52:	8bfb      	ldrh	r3, [r7, #30]
 8020f54:	009b      	lsls	r3, r3, #2
 8020f56:	461a      	mov	r2, r3
 8020f58:	79fb      	ldrb	r3, [r7, #7]
 8020f5a:	009b      	lsls	r3, r3, #2
 8020f5c:	f003 0304 	and.w	r3, r3, #4
 8020f60:	4413      	add	r3, r2
 8020f62:	3314      	adds	r3, #20
 8020f64:	69ba      	ldr	r2, [r7, #24]
 8020f66:	4413      	add	r3, r2
 8020f68:	697a      	ldr	r2, [r7, #20]
 8020f6a:	429a      	cmp	r2, r3
 8020f6c:	d006      	beq.n	8020f7c <tcp_output_fill_options+0x64>
 8020f6e:	4b05      	ldr	r3, [pc, #20]	@ (8020f84 <tcp_output_fill_options+0x6c>)
 8020f70:	f240 7275 	movw	r2, #1909	@ 0x775
 8020f74:	4906      	ldr	r1, [pc, #24]	@ (8020f90 <tcp_output_fill_options+0x78>)
 8020f76:	4805      	ldr	r0, [pc, #20]	@ (8020f8c <tcp_output_fill_options+0x74>)
 8020f78:	f009 f920 	bl	802a1bc <iprintf>
  LWIP_UNUSED_ARG(optflags); /* for LWIP_NOASSERT */
  LWIP_UNUSED_ARG(opts); /* for LWIP_NOASSERT */
}
 8020f7c:	bf00      	nop
 8020f7e:	3720      	adds	r7, #32
 8020f80:	46bd      	mov	sp, r7
 8020f82:	bd80      	pop	{r7, pc}
 8020f84:	0802fa24 	.word	0x0802fa24
 8020f88:	080301b0 	.word	0x080301b0
 8020f8c:	0802fa78 	.word	0x0802fa78
 8020f90:	080300a8 	.word	0x080300a8

08020f94 <tcp_output_control_segment>:
 * header checksum and calling ip_output_if while handling netif hints and stats.
 */
static err_t
tcp_output_control_segment(const struct tcp_pcb *pcb, struct pbuf *p,
                           const ip_addr_t *src, const ip_addr_t *dst)
{
 8020f94:	b580      	push	{r7, lr}
 8020f96:	b08a      	sub	sp, #40	@ 0x28
 8020f98:	af04      	add	r7, sp, #16
 8020f9a:	60f8      	str	r0, [r7, #12]
 8020f9c:	60b9      	str	r1, [r7, #8]
 8020f9e:	607a      	str	r2, [r7, #4]
 8020fa0:	603b      	str	r3, [r7, #0]
  err_t err;
  struct netif *netif;

  LWIP_ASSERT("tcp_output_control_segment: invalid pbuf", p != NULL);
 8020fa2:	68bb      	ldr	r3, [r7, #8]
 8020fa4:	2b00      	cmp	r3, #0
 8020fa6:	d106      	bne.n	8020fb6 <tcp_output_control_segment+0x22>
 8020fa8:	4b1c      	ldr	r3, [pc, #112]	@ (802101c <tcp_output_control_segment+0x88>)
 8020faa:	f240 7287 	movw	r2, #1927	@ 0x787
 8020fae:	491c      	ldr	r1, [pc, #112]	@ (8021020 <tcp_output_control_segment+0x8c>)
 8020fb0:	481c      	ldr	r0, [pc, #112]	@ (8021024 <tcp_output_control_segment+0x90>)
 8020fb2:	f009 f903 	bl	802a1bc <iprintf>

  netif = tcp_route(pcb, src, dst);
 8020fb6:	683a      	ldr	r2, [r7, #0]
 8020fb8:	6879      	ldr	r1, [r7, #4]
 8020fba:	68f8      	ldr	r0, [r7, #12]
 8020fbc:	f7fe fa78 	bl	801f4b0 <tcp_route>
 8020fc0:	6138      	str	r0, [r7, #16]
  if (netif == NULL) {
 8020fc2:	693b      	ldr	r3, [r7, #16]
 8020fc4:	2b00      	cmp	r3, #0
 8020fc6:	d102      	bne.n	8020fce <tcp_output_control_segment+0x3a>
    err = ERR_RTE;
 8020fc8:	23fc      	movs	r3, #252	@ 0xfc
 8020fca:	75fb      	strb	r3, [r7, #23]
 8020fcc:	e01c      	b.n	8021008 <tcp_output_control_segment+0x74>
      struct tcp_hdr *tcphdr = (struct tcp_hdr *)p->payload;
      tcphdr->chksum = ip_chksum_pseudo(p, IP_PROTO_TCP, p->tot_len,
                                        src, dst);
    }
#endif
    if (pcb != NULL) {
 8020fce:	68fb      	ldr	r3, [r7, #12]
 8020fd0:	2b00      	cmp	r3, #0
 8020fd2:	d006      	beq.n	8020fe2 <tcp_output_control_segment+0x4e>
      NETIF_SET_HINTS(netif, LWIP_CONST_CAST(struct netif_hint*, &(pcb->netif_hints)));
      ttl = pcb->ttl;
 8020fd4:	68fb      	ldr	r3, [r7, #12]
 8020fd6:	7adb      	ldrb	r3, [r3, #11]
 8020fd8:	75bb      	strb	r3, [r7, #22]
      tos = pcb->tos;
 8020fda:	68fb      	ldr	r3, [r7, #12]
 8020fdc:	7a9b      	ldrb	r3, [r3, #10]
 8020fde:	757b      	strb	r3, [r7, #21]
 8020fe0:	e003      	b.n	8020fea <tcp_output_control_segment+0x56>
    } else {
      /* Send output with hardcoded TTL/HL since we have no access to the pcb */
      ttl = TCP_TTL;
 8020fe2:	23ff      	movs	r3, #255	@ 0xff
 8020fe4:	75bb      	strb	r3, [r7, #22]
      tos = 0;
 8020fe6:	2300      	movs	r3, #0
 8020fe8:	757b      	strb	r3, [r7, #21]
    }
    TCP_STATS_INC(tcp.xmit);
    err = ip_output_if(p, src, dst, ttl, tos, IP_PROTO_TCP, netif);
 8020fea:	7dba      	ldrb	r2, [r7, #22]
 8020fec:	693b      	ldr	r3, [r7, #16]
 8020fee:	9302      	str	r3, [sp, #8]
 8020ff0:	2306      	movs	r3, #6
 8020ff2:	9301      	str	r3, [sp, #4]
 8020ff4:	7d7b      	ldrb	r3, [r7, #21]
 8020ff6:	9300      	str	r3, [sp, #0]
 8020ff8:	4613      	mov	r3, r2
 8020ffa:	683a      	ldr	r2, [r7, #0]
 8020ffc:	6879      	ldr	r1, [r7, #4]
 8020ffe:	68b8      	ldr	r0, [r7, #8]
 8021000:	f004 faac 	bl	802555c <ip4_output_if>
 8021004:	4603      	mov	r3, r0
 8021006:	75fb      	strb	r3, [r7, #23]
    NETIF_RESET_HINTS(netif);
  }
  pbuf_free(p);
 8021008:	68b8      	ldr	r0, [r7, #8]
 802100a:	f7f9 fe5f 	bl	801accc <pbuf_free>
  return err;
 802100e:	f997 3017 	ldrsb.w	r3, [r7, #23]
}
 8021012:	4618      	mov	r0, r3
 8021014:	3718      	adds	r7, #24
 8021016:	46bd      	mov	sp, r7
 8021018:	bd80      	pop	{r7, pc}
 802101a:	bf00      	nop
 802101c:	0802fa24 	.word	0x0802fa24
 8021020:	080301d8 	.word	0x080301d8
 8021024:	0802fa78 	.word	0x0802fa78

08021028 <tcp_rst>:
 */
void
tcp_rst(const struct tcp_pcb *pcb, u32_t seqno, u32_t ackno,
        const ip_addr_t *local_ip, const ip_addr_t *remote_ip,
        u16_t local_port, u16_t remote_port)
{
 8021028:	b590      	push	{r4, r7, lr}
 802102a:	b08b      	sub	sp, #44	@ 0x2c
 802102c:	af04      	add	r7, sp, #16
 802102e:	60f8      	str	r0, [r7, #12]
 8021030:	60b9      	str	r1, [r7, #8]
 8021032:	607a      	str	r2, [r7, #4]
 8021034:	603b      	str	r3, [r7, #0]
  struct pbuf *p;
  u16_t wnd;
  u8_t optlen;

  LWIP_ASSERT("tcp_rst: invalid local_ip", local_ip != NULL);
 8021036:	683b      	ldr	r3, [r7, #0]
 8021038:	2b00      	cmp	r3, #0
 802103a:	d106      	bne.n	802104a <tcp_rst+0x22>
 802103c:	4b1f      	ldr	r3, [pc, #124]	@ (80210bc <tcp_rst+0x94>)
 802103e:	f240 72c4 	movw	r2, #1988	@ 0x7c4
 8021042:	491f      	ldr	r1, [pc, #124]	@ (80210c0 <tcp_rst+0x98>)
 8021044:	481f      	ldr	r0, [pc, #124]	@ (80210c4 <tcp_rst+0x9c>)
 8021046:	f009 f8b9 	bl	802a1bc <iprintf>
  LWIP_ASSERT("tcp_rst: invalid remote_ip", remote_ip != NULL);
 802104a:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 802104c:	2b00      	cmp	r3, #0
 802104e:	d106      	bne.n	802105e <tcp_rst+0x36>
 8021050:	4b1a      	ldr	r3, [pc, #104]	@ (80210bc <tcp_rst+0x94>)
 8021052:	f240 72c5 	movw	r2, #1989	@ 0x7c5
 8021056:	491c      	ldr	r1, [pc, #112]	@ (80210c8 <tcp_rst+0xa0>)
 8021058:	481a      	ldr	r0, [pc, #104]	@ (80210c4 <tcp_rst+0x9c>)
 802105a:	f009 f8af 	bl	802a1bc <iprintf>

  optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(0, pcb);
 802105e:	2300      	movs	r3, #0
 8021060:	75fb      	strb	r3, [r7, #23]

#if LWIP_WND_SCALE
  wnd = PP_HTONS(((TCP_WND >> TCP_RCV_SCALE) & 0xFFFF));
#else
  wnd = PP_HTONS(TCP_WND);
 8021062:	f24d 0316 	movw	r3, #53270	@ 0xd016
 8021066:	82bb      	strh	r3, [r7, #20]
#endif

  p = tcp_output_alloc_header_common(ackno, optlen, 0, lwip_htonl(seqno), local_port,
 8021068:	7dfb      	ldrb	r3, [r7, #23]
 802106a:	b29c      	uxth	r4, r3
 802106c:	68b8      	ldr	r0, [r7, #8]
 802106e:	f7f8 f960 	bl	8019332 <lwip_htonl>
 8021072:	4602      	mov	r2, r0
 8021074:	8abb      	ldrh	r3, [r7, #20]
 8021076:	9303      	str	r3, [sp, #12]
 8021078:	2314      	movs	r3, #20
 802107a:	9302      	str	r3, [sp, #8]
 802107c:	8e3b      	ldrh	r3, [r7, #48]	@ 0x30
 802107e:	9301      	str	r3, [sp, #4]
 8021080:	8dbb      	ldrh	r3, [r7, #44]	@ 0x2c
 8021082:	9300      	str	r3, [sp, #0]
 8021084:	4613      	mov	r3, r2
 8021086:	2200      	movs	r2, #0
 8021088:	4621      	mov	r1, r4
 802108a:	6878      	ldr	r0, [r7, #4]
 802108c:	f7ff fe94 	bl	8020db8 <tcp_output_alloc_header_common>
 8021090:	6138      	str	r0, [r7, #16]
    remote_port, TCP_RST | TCP_ACK, wnd);
  if (p == NULL) {
 8021092:	693b      	ldr	r3, [r7, #16]
 8021094:	2b00      	cmp	r3, #0
 8021096:	d00c      	beq.n	80210b2 <tcp_rst+0x8a>
    LWIP_DEBUGF(TCP_DEBUG, ("tcp_rst: could not allocate memory for pbuf\n"));
    return;
  }
  tcp_output_fill_options(pcb, p, 0, optlen);
 8021098:	7dfb      	ldrb	r3, [r7, #23]
 802109a:	2200      	movs	r2, #0
 802109c:	6939      	ldr	r1, [r7, #16]
 802109e:	68f8      	ldr	r0, [r7, #12]
 80210a0:	f7ff ff3a 	bl	8020f18 <tcp_output_fill_options>

  MIB2_STATS_INC(mib2.tcpoutrsts);

  tcp_output_control_segment(pcb, p, local_ip, remote_ip);
 80210a4:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80210a6:	683a      	ldr	r2, [r7, #0]
 80210a8:	6939      	ldr	r1, [r7, #16]
 80210aa:	68f8      	ldr	r0, [r7, #12]
 80210ac:	f7ff ff72 	bl	8020f94 <tcp_output_control_segment>
 80210b0:	e000      	b.n	80210b4 <tcp_rst+0x8c>
    return;
 80210b2:	bf00      	nop
  LWIP_DEBUGF(TCP_RST_DEBUG, ("tcp_rst: seqno %"U32_F" ackno %"U32_F".\n", seqno, ackno));
}
 80210b4:	371c      	adds	r7, #28
 80210b6:	46bd      	mov	sp, r7
 80210b8:	bd90      	pop	{r4, r7, pc}
 80210ba:	bf00      	nop
 80210bc:	0802fa24 	.word	0x0802fa24
 80210c0:	08030204 	.word	0x08030204
 80210c4:	0802fa78 	.word	0x0802fa78
 80210c8:	08030220 	.word	0x08030220

080210cc <tcp_send_empty_ack>:
 *
 * @param pcb Protocol control block for the TCP connection to send the ACK
 */
err_t
tcp_send_empty_ack(struct tcp_pcb *pcb)
{
 80210cc:	b590      	push	{r4, r7, lr}
 80210ce:	b087      	sub	sp, #28
 80210d0:	af00      	add	r7, sp, #0
 80210d2:	6078      	str	r0, [r7, #4]
  err_t err;
  struct pbuf *p;
  u8_t optlen, optflags = 0;
 80210d4:	2300      	movs	r3, #0
 80210d6:	75fb      	strb	r3, [r7, #23]
  u8_t num_sacks = 0;
 80210d8:	2300      	movs	r3, #0
 80210da:	75bb      	strb	r3, [r7, #22]

  LWIP_ASSERT("tcp_send_empty_ack: invalid pcb", pcb != NULL);
 80210dc:	687b      	ldr	r3, [r7, #4]
 80210de:	2b00      	cmp	r3, #0
 80210e0:	d106      	bne.n	80210f0 <tcp_send_empty_ack+0x24>
 80210e2:	4b28      	ldr	r3, [pc, #160]	@ (8021184 <tcp_send_empty_ack+0xb8>)
 80210e4:	f240 72ea 	movw	r2, #2026	@ 0x7ea
 80210e8:	4927      	ldr	r1, [pc, #156]	@ (8021188 <tcp_send_empty_ack+0xbc>)
 80210ea:	4828      	ldr	r0, [pc, #160]	@ (802118c <tcp_send_empty_ack+0xc0>)
 80210ec:	f009 f866 	bl	802a1bc <iprintf>
#if LWIP_TCP_TIMESTAMPS
  if (pcb->flags & TF_TIMESTAMP) {
    optflags = TF_SEG_OPTS_TS;
  }
#endif
  optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(optflags, pcb);
 80210f0:	7dfb      	ldrb	r3, [r7, #23]
 80210f2:	009b      	lsls	r3, r3, #2
 80210f4:	b2db      	uxtb	r3, r3
 80210f6:	f003 0304 	and.w	r3, r3, #4
 80210fa:	757b      	strb	r3, [r7, #21]
  if ((num_sacks = tcp_get_num_sacks(pcb, optlen)) > 0) {
    optlen += 4 + num_sacks * 8; /* 4 bytes for header (including 2*NOP), plus 8B for each SACK */
  }
#endif

  p = tcp_output_alloc_header(pcb, optlen, 0, lwip_htonl(pcb->snd_nxt));
 80210fc:	7d7b      	ldrb	r3, [r7, #21]
 80210fe:	b29c      	uxth	r4, r3
 8021100:	687b      	ldr	r3, [r7, #4]
 8021102:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 8021104:	4618      	mov	r0, r3
 8021106:	f7f8 f914 	bl	8019332 <lwip_htonl>
 802110a:	4603      	mov	r3, r0
 802110c:	2200      	movs	r2, #0
 802110e:	4621      	mov	r1, r4
 8021110:	6878      	ldr	r0, [r7, #4]
 8021112:	f7ff fec3 	bl	8020e9c <tcp_output_alloc_header>
 8021116:	6138      	str	r0, [r7, #16]
  if (p == NULL) {
 8021118:	693b      	ldr	r3, [r7, #16]
 802111a:	2b00      	cmp	r3, #0
 802111c:	d109      	bne.n	8021132 <tcp_send_empty_ack+0x66>
    /* let tcp_fasttmr retry sending this ACK */
    tcp_set_flags(pcb, TF_ACK_DELAY | TF_ACK_NOW);
 802111e:	687b      	ldr	r3, [r7, #4]
 8021120:	8b5b      	ldrh	r3, [r3, #26]
 8021122:	f043 0303 	orr.w	r3, r3, #3
 8021126:	b29a      	uxth	r2, r3
 8021128:	687b      	ldr	r3, [r7, #4]
 802112a:	835a      	strh	r2, [r3, #26]
    LWIP_DEBUGF(TCP_OUTPUT_DEBUG, ("tcp_output: (ACK) could not allocate pbuf\n"));
    return ERR_BUF;
 802112c:	f06f 0301 	mvn.w	r3, #1
 8021130:	e023      	b.n	802117a <tcp_send_empty_ack+0xae>
  }
  tcp_output_fill_options(pcb, p, optflags, num_sacks);
 8021132:	7dbb      	ldrb	r3, [r7, #22]
 8021134:	7dfa      	ldrb	r2, [r7, #23]
 8021136:	6939      	ldr	r1, [r7, #16]
 8021138:	6878      	ldr	r0, [r7, #4]
 802113a:	f7ff feed 	bl	8020f18 <tcp_output_fill_options>
  pcb->ts_lastacksent = pcb->rcv_nxt;
#endif

  LWIP_DEBUGF(TCP_OUTPUT_DEBUG,
              ("tcp_output: sending ACK for %"U32_F"\n", pcb->rcv_nxt));
  err = tcp_output_control_segment(pcb, p, &pcb->local_ip, &pcb->remote_ip);
 802113e:	687a      	ldr	r2, [r7, #4]
 8021140:	687b      	ldr	r3, [r7, #4]
 8021142:	3304      	adds	r3, #4
 8021144:	6939      	ldr	r1, [r7, #16]
 8021146:	6878      	ldr	r0, [r7, #4]
 8021148:	f7ff ff24 	bl	8020f94 <tcp_output_control_segment>
 802114c:	4603      	mov	r3, r0
 802114e:	73fb      	strb	r3, [r7, #15]
  if (err != ERR_OK) {
 8021150:	f997 300f 	ldrsb.w	r3, [r7, #15]
 8021154:	2b00      	cmp	r3, #0
 8021156:	d007      	beq.n	8021168 <tcp_send_empty_ack+0x9c>
    /* let tcp_fasttmr retry sending this ACK */
    tcp_set_flags(pcb, TF_ACK_DELAY | TF_ACK_NOW);
 8021158:	687b      	ldr	r3, [r7, #4]
 802115a:	8b5b      	ldrh	r3, [r3, #26]
 802115c:	f043 0303 	orr.w	r3, r3, #3
 8021160:	b29a      	uxth	r2, r3
 8021162:	687b      	ldr	r3, [r7, #4]
 8021164:	835a      	strh	r2, [r3, #26]
 8021166:	e006      	b.n	8021176 <tcp_send_empty_ack+0xaa>
  } else {
    /* remove ACK flags from the PCB, as we sent an empty ACK now */
    tcp_clear_flags(pcb, TF_ACK_DELAY | TF_ACK_NOW);
 8021168:	687b      	ldr	r3, [r7, #4]
 802116a:	8b5b      	ldrh	r3, [r3, #26]
 802116c:	f023 0303 	bic.w	r3, r3, #3
 8021170:	b29a      	uxth	r2, r3
 8021172:	687b      	ldr	r3, [r7, #4]
 8021174:	835a      	strh	r2, [r3, #26]
  }

  return err;
 8021176:	f997 300f 	ldrsb.w	r3, [r7, #15]
}
 802117a:	4618      	mov	r0, r3
 802117c:	371c      	adds	r7, #28
 802117e:	46bd      	mov	sp, r7
 8021180:	bd90      	pop	{r4, r7, pc}
 8021182:	bf00      	nop
 8021184:	0802fa24 	.word	0x0802fa24
 8021188:	0803023c 	.word	0x0803023c
 802118c:	0802fa78 	.word	0x0802fa78

08021190 <tcp_keepalive>:
 *
 * @param pcb the tcp_pcb for which to send a keepalive packet
 */
err_t
tcp_keepalive(struct tcp_pcb *pcb)
{
 8021190:	b590      	push	{r4, r7, lr}
 8021192:	b085      	sub	sp, #20
 8021194:	af00      	add	r7, sp, #0
 8021196:	6078      	str	r0, [r7, #4]
  err_t err;
  struct pbuf *p;
  u8_t optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(0, pcb);
 8021198:	2300      	movs	r3, #0
 802119a:	72bb      	strb	r3, [r7, #10]

  LWIP_ASSERT("tcp_keepalive: invalid pcb", pcb != NULL);
 802119c:	687b      	ldr	r3, [r7, #4]
 802119e:	2b00      	cmp	r3, #0
 80211a0:	d106      	bne.n	80211b0 <tcp_keepalive+0x20>
 80211a2:	4b18      	ldr	r3, [pc, #96]	@ (8021204 <tcp_keepalive+0x74>)
 80211a4:	f640 0224 	movw	r2, #2084	@ 0x824
 80211a8:	4917      	ldr	r1, [pc, #92]	@ (8021208 <tcp_keepalive+0x78>)
 80211aa:	4818      	ldr	r0, [pc, #96]	@ (802120c <tcp_keepalive+0x7c>)
 80211ac:	f009 f806 	bl	802a1bc <iprintf>
  LWIP_DEBUGF(TCP_DEBUG, ("\n"));

  LWIP_DEBUGF(TCP_DEBUG, ("tcp_keepalive: tcp_ticks %"U32_F"   pcb->tmr %"U32_F" pcb->keep_cnt_sent %"U16_F"\n",
                          tcp_ticks, pcb->tmr, (u16_t)pcb->keep_cnt_sent));

  p = tcp_output_alloc_header(pcb, optlen, 0, lwip_htonl(pcb->snd_nxt - 1));
 80211b0:	7abb      	ldrb	r3, [r7, #10]
 80211b2:	b29c      	uxth	r4, r3
 80211b4:	687b      	ldr	r3, [r7, #4]
 80211b6:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 80211b8:	3b01      	subs	r3, #1
 80211ba:	4618      	mov	r0, r3
 80211bc:	f7f8 f8b9 	bl	8019332 <lwip_htonl>
 80211c0:	4603      	mov	r3, r0
 80211c2:	2200      	movs	r2, #0
 80211c4:	4621      	mov	r1, r4
 80211c6:	6878      	ldr	r0, [r7, #4]
 80211c8:	f7ff fe68 	bl	8020e9c <tcp_output_alloc_header>
 80211cc:	60f8      	str	r0, [r7, #12]
  if (p == NULL) {
 80211ce:	68fb      	ldr	r3, [r7, #12]
 80211d0:	2b00      	cmp	r3, #0
 80211d2:	d102      	bne.n	80211da <tcp_keepalive+0x4a>
    LWIP_DEBUGF(TCP_DEBUG,
                ("tcp_keepalive: could not allocate memory for pbuf\n"));
    return ERR_MEM;
 80211d4:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80211d8:	e010      	b.n	80211fc <tcp_keepalive+0x6c>
  }
  tcp_output_fill_options(pcb, p, 0, optlen);
 80211da:	7abb      	ldrb	r3, [r7, #10]
 80211dc:	2200      	movs	r2, #0
 80211de:	68f9      	ldr	r1, [r7, #12]
 80211e0:	6878      	ldr	r0, [r7, #4]
 80211e2:	f7ff fe99 	bl	8020f18 <tcp_output_fill_options>
  err = tcp_output_control_segment(pcb, p, &pcb->local_ip, &pcb->remote_ip);
 80211e6:	687a      	ldr	r2, [r7, #4]
 80211e8:	687b      	ldr	r3, [r7, #4]
 80211ea:	3304      	adds	r3, #4
 80211ec:	68f9      	ldr	r1, [r7, #12]
 80211ee:	6878      	ldr	r0, [r7, #4]
 80211f0:	f7ff fed0 	bl	8020f94 <tcp_output_control_segment>
 80211f4:	4603      	mov	r3, r0
 80211f6:	72fb      	strb	r3, [r7, #11]

  LWIP_DEBUGF(TCP_DEBUG, ("tcp_keepalive: seqno %"U32_F" ackno %"U32_F" err %d.\n",
                          pcb->snd_nxt - 1, pcb->rcv_nxt, (int)err));
  return err;
 80211f8:	f997 300b 	ldrsb.w	r3, [r7, #11]
}
 80211fc:	4618      	mov	r0, r3
 80211fe:	3714      	adds	r7, #20
 8021200:	46bd      	mov	sp, r7
 8021202:	bd90      	pop	{r4, r7, pc}
 8021204:	0802fa24 	.word	0x0802fa24
 8021208:	0803025c 	.word	0x0803025c
 802120c:	0802fa78 	.word	0x0802fa78

08021210 <tcp_zero_window_probe>:
 *
 * @param pcb the tcp_pcb for which to send a zero-window probe packet
 */
err_t
tcp_zero_window_probe(struct tcp_pcb *pcb)
{
 8021210:	b590      	push	{r4, r7, lr}
 8021212:	b08b      	sub	sp, #44	@ 0x2c
 8021214:	af00      	add	r7, sp, #0
 8021216:	6078      	str	r0, [r7, #4]
  struct tcp_hdr *tcphdr;
  struct tcp_seg *seg;
  u16_t len;
  u8_t is_fin;
  u32_t snd_nxt;
  u8_t optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(0, pcb);
 8021218:	2300      	movs	r3, #0
 802121a:	74fb      	strb	r3, [r7, #19]

  LWIP_ASSERT("tcp_zero_window_probe: invalid pcb", pcb != NULL);
 802121c:	687b      	ldr	r3, [r7, #4]
 802121e:	2b00      	cmp	r3, #0
 8021220:	d106      	bne.n	8021230 <tcp_zero_window_probe+0x20>
 8021222:	4b4d      	ldr	r3, [pc, #308]	@ (8021358 <tcp_zero_window_probe+0x148>)
 8021224:	f640 024f 	movw	r2, #2127	@ 0x84f
 8021228:	494c      	ldr	r1, [pc, #304]	@ (802135c <tcp_zero_window_probe+0x14c>)
 802122a:	484d      	ldr	r0, [pc, #308]	@ (8021360 <tcp_zero_window_probe+0x150>)
 802122c:	f008 ffc6 	bl	802a1bc <iprintf>
              ("tcp_zero_window_probe: tcp_ticks %"U32_F
               "   pcb->tmr %"U32_F" pcb->keep_cnt_sent %"U16_F"\n",
               tcp_ticks, pcb->tmr, (u16_t)pcb->keep_cnt_sent));

  /* Only consider unsent, persist timer should be off when there is data in-flight */
  seg = pcb->unsent;
 8021230:	687b      	ldr	r3, [r7, #4]
 8021232:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8021234:	627b      	str	r3, [r7, #36]	@ 0x24
  if (seg == NULL) {
 8021236:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8021238:	2b00      	cmp	r3, #0
 802123a:	d101      	bne.n	8021240 <tcp_zero_window_probe+0x30>
    /* Not expected, persist timer should be off when the send buffer is empty */
    return ERR_OK;
 802123c:	2300      	movs	r3, #0
 802123e:	e087      	b.n	8021350 <tcp_zero_window_probe+0x140>

  /* increment probe count. NOTE: we record probe even if it fails
     to actually transmit due to an error. This ensures memory exhaustion/
     routing problem doesn't leave a zero-window pcb as an indefinite zombie.
     RTO mechanism has similar behavior, see pcb->nrtx */
  if (pcb->persist_probe < 0xFF) {
 8021240:	687b      	ldr	r3, [r7, #4]
 8021242:	f893 309a 	ldrb.w	r3, [r3, #154]	@ 0x9a
 8021246:	2bff      	cmp	r3, #255	@ 0xff
 8021248:	d007      	beq.n	802125a <tcp_zero_window_probe+0x4a>
    ++pcb->persist_probe;
 802124a:	687b      	ldr	r3, [r7, #4]
 802124c:	f893 309a 	ldrb.w	r3, [r3, #154]	@ 0x9a
 8021250:	3301      	adds	r3, #1
 8021252:	b2da      	uxtb	r2, r3
 8021254:	687b      	ldr	r3, [r7, #4]
 8021256:	f883 209a 	strb.w	r2, [r3, #154]	@ 0x9a
  }

  is_fin = ((TCPH_FLAGS(seg->tcphdr) & TCP_FIN) != 0) && (seg->len == 0);
 802125a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 802125c:	691b      	ldr	r3, [r3, #16]
 802125e:	899b      	ldrh	r3, [r3, #12]
 8021260:	b29b      	uxth	r3, r3
 8021262:	4618      	mov	r0, r3
 8021264:	f7f8 f850 	bl	8019308 <lwip_htons>
 8021268:	4603      	mov	r3, r0
 802126a:	b2db      	uxtb	r3, r3
 802126c:	f003 0301 	and.w	r3, r3, #1
 8021270:	2b00      	cmp	r3, #0
 8021272:	d005      	beq.n	8021280 <tcp_zero_window_probe+0x70>
 8021274:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8021276:	891b      	ldrh	r3, [r3, #8]
 8021278:	2b00      	cmp	r3, #0
 802127a:	d101      	bne.n	8021280 <tcp_zero_window_probe+0x70>
 802127c:	2301      	movs	r3, #1
 802127e:	e000      	b.n	8021282 <tcp_zero_window_probe+0x72>
 8021280:	2300      	movs	r3, #0
 8021282:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
  /* we want to send one seqno: either FIN or data (no options) */
  len = is_fin ? 0 : 1;
 8021286:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 802128a:	2b00      	cmp	r3, #0
 802128c:	bf0c      	ite	eq
 802128e:	2301      	moveq	r3, #1
 8021290:	2300      	movne	r3, #0
 8021292:	b2db      	uxtb	r3, r3
 8021294:	843b      	strh	r3, [r7, #32]

  p = tcp_output_alloc_header(pcb, optlen, len, seg->tcphdr->seqno);
 8021296:	7cfb      	ldrb	r3, [r7, #19]
 8021298:	b299      	uxth	r1, r3
 802129a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 802129c:	691b      	ldr	r3, [r3, #16]
 802129e:	685b      	ldr	r3, [r3, #4]
 80212a0:	8c3a      	ldrh	r2, [r7, #32]
 80212a2:	6878      	ldr	r0, [r7, #4]
 80212a4:	f7ff fdfa 	bl	8020e9c <tcp_output_alloc_header>
 80212a8:	61f8      	str	r0, [r7, #28]
  if (p == NULL) {
 80212aa:	69fb      	ldr	r3, [r7, #28]
 80212ac:	2b00      	cmp	r3, #0
 80212ae:	d102      	bne.n	80212b6 <tcp_zero_window_probe+0xa6>
    LWIP_DEBUGF(TCP_DEBUG, ("tcp_zero_window_probe: no memory for pbuf\n"));
    return ERR_MEM;
 80212b0:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80212b4:	e04c      	b.n	8021350 <tcp_zero_window_probe+0x140>
  }
  tcphdr = (struct tcp_hdr *)p->payload;
 80212b6:	69fb      	ldr	r3, [r7, #28]
 80212b8:	685b      	ldr	r3, [r3, #4]
 80212ba:	61bb      	str	r3, [r7, #24]

  if (is_fin) {
 80212bc:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 80212c0:	2b00      	cmp	r3, #0
 80212c2:	d011      	beq.n	80212e8 <tcp_zero_window_probe+0xd8>
    /* FIN segment, no data */
    TCPH_FLAGS_SET(tcphdr, TCP_ACK | TCP_FIN);
 80212c4:	69bb      	ldr	r3, [r7, #24]
 80212c6:	899b      	ldrh	r3, [r3, #12]
 80212c8:	b29b      	uxth	r3, r3
 80212ca:	b21b      	sxth	r3, r3
 80212cc:	f423 537c 	bic.w	r3, r3, #16128	@ 0x3f00
 80212d0:	b21c      	sxth	r4, r3
 80212d2:	2011      	movs	r0, #17
 80212d4:	f7f8 f818 	bl	8019308 <lwip_htons>
 80212d8:	4603      	mov	r3, r0
 80212da:	b21b      	sxth	r3, r3
 80212dc:	4323      	orrs	r3, r4
 80212de:	b21b      	sxth	r3, r3
 80212e0:	b29a      	uxth	r2, r3
 80212e2:	69bb      	ldr	r3, [r7, #24]
 80212e4:	819a      	strh	r2, [r3, #12]
 80212e6:	e010      	b.n	802130a <tcp_zero_window_probe+0xfa>
  } else {
    /* Data segment, copy in one byte from the head of the unacked queue */
    char *d = ((char *)p->payload + TCP_HLEN);
 80212e8:	69fb      	ldr	r3, [r7, #28]
 80212ea:	685b      	ldr	r3, [r3, #4]
 80212ec:	3314      	adds	r3, #20
 80212ee:	617b      	str	r3, [r7, #20]
    /* Depending on whether the segment has already been sent (unacked) or not
       (unsent), seg->p->payload points to the IP header or TCP header.
       Ensure we copy the first TCP data byte: */
    pbuf_copy_partial(seg->p, d, 1, seg->p->tot_len - seg->len);
 80212f0:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80212f2:	6858      	ldr	r0, [r3, #4]
 80212f4:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80212f6:	685b      	ldr	r3, [r3, #4]
 80212f8:	891a      	ldrh	r2, [r3, #8]
 80212fa:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80212fc:	891b      	ldrh	r3, [r3, #8]
 80212fe:	1ad3      	subs	r3, r2, r3
 8021300:	b29b      	uxth	r3, r3
 8021302:	2201      	movs	r2, #1
 8021304:	6979      	ldr	r1, [r7, #20]
 8021306:	f7f9 fee7 	bl	801b0d8 <pbuf_copy_partial>
  }

  /* The byte may be acknowledged without the window being opened. */
  snd_nxt = lwip_ntohl(seg->tcphdr->seqno) + 1;
 802130a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 802130c:	691b      	ldr	r3, [r3, #16]
 802130e:	685b      	ldr	r3, [r3, #4]
 8021310:	4618      	mov	r0, r3
 8021312:	f7f8 f80e 	bl	8019332 <lwip_htonl>
 8021316:	4603      	mov	r3, r0
 8021318:	3301      	adds	r3, #1
 802131a:	60fb      	str	r3, [r7, #12]
  if (TCP_SEQ_LT(pcb->snd_nxt, snd_nxt)) {
 802131c:	687b      	ldr	r3, [r7, #4]
 802131e:	6d1a      	ldr	r2, [r3, #80]	@ 0x50
 8021320:	68fb      	ldr	r3, [r7, #12]
 8021322:	1ad3      	subs	r3, r2, r3
 8021324:	2b00      	cmp	r3, #0
 8021326:	da02      	bge.n	802132e <tcp_zero_window_probe+0x11e>
    pcb->snd_nxt = snd_nxt;
 8021328:	687b      	ldr	r3, [r7, #4]
 802132a:	68fa      	ldr	r2, [r7, #12]
 802132c:	651a      	str	r2, [r3, #80]	@ 0x50
  }
  tcp_output_fill_options(pcb, p, 0, optlen);
 802132e:	7cfb      	ldrb	r3, [r7, #19]
 8021330:	2200      	movs	r2, #0
 8021332:	69f9      	ldr	r1, [r7, #28]
 8021334:	6878      	ldr	r0, [r7, #4]
 8021336:	f7ff fdef 	bl	8020f18 <tcp_output_fill_options>

  err = tcp_output_control_segment(pcb, p, &pcb->local_ip, &pcb->remote_ip);
 802133a:	687a      	ldr	r2, [r7, #4]
 802133c:	687b      	ldr	r3, [r7, #4]
 802133e:	3304      	adds	r3, #4
 8021340:	69f9      	ldr	r1, [r7, #28]
 8021342:	6878      	ldr	r0, [r7, #4]
 8021344:	f7ff fe26 	bl	8020f94 <tcp_output_control_segment>
 8021348:	4603      	mov	r3, r0
 802134a:	72fb      	strb	r3, [r7, #11]

  LWIP_DEBUGF(TCP_DEBUG, ("tcp_zero_window_probe: seqno %"U32_F
                          " ackno %"U32_F" err %d.\n",
                          pcb->snd_nxt - 1, pcb->rcv_nxt, (int)err));
  return err;
 802134c:	f997 300b 	ldrsb.w	r3, [r7, #11]
}
 8021350:	4618      	mov	r0, r3
 8021352:	372c      	adds	r7, #44	@ 0x2c
 8021354:	46bd      	mov	sp, r7
 8021356:	bd90      	pop	{r4, r7, pc}
 8021358:	0802fa24 	.word	0x0802fa24
 802135c:	08030278 	.word	0x08030278
 8021360:	0802fa78 	.word	0x0802fa78

08021364 <tcpip_tcp_timer>:
 *
 * @param arg unused argument
 */
static void
tcpip_tcp_timer(void *arg)
{
 8021364:	b580      	push	{r7, lr}
 8021366:	b082      	sub	sp, #8
 8021368:	af00      	add	r7, sp, #0
 802136a:	6078      	str	r0, [r7, #4]
  LWIP_UNUSED_ARG(arg);

  /* call TCP timer handler */
  tcp_tmr();
 802136c:	f7f9 ffa2 	bl	801b2b4 <tcp_tmr>
  /* timer still needed? */
  if (tcp_active_pcbs || tcp_tw_pcbs) {
 8021370:	4b0a      	ldr	r3, [pc, #40]	@ (802139c <tcpip_tcp_timer+0x38>)
 8021372:	681b      	ldr	r3, [r3, #0]
 8021374:	2b00      	cmp	r3, #0
 8021376:	d103      	bne.n	8021380 <tcpip_tcp_timer+0x1c>
 8021378:	4b09      	ldr	r3, [pc, #36]	@ (80213a0 <tcpip_tcp_timer+0x3c>)
 802137a:	681b      	ldr	r3, [r3, #0]
 802137c:	2b00      	cmp	r3, #0
 802137e:	d005      	beq.n	802138c <tcpip_tcp_timer+0x28>
    /* restart timer */
    sys_timeout(TCP_TMR_INTERVAL, tcpip_tcp_timer, NULL);
 8021380:	2200      	movs	r2, #0
 8021382:	4908      	ldr	r1, [pc, #32]	@ (80213a4 <tcpip_tcp_timer+0x40>)
 8021384:	20fa      	movs	r0, #250	@ 0xfa
 8021386:	f000 f8f5 	bl	8021574 <sys_timeout>
 802138a:	e003      	b.n	8021394 <tcpip_tcp_timer+0x30>
  } else {
    /* disable timer */
    tcpip_tcp_timer_active = 0;
 802138c:	4b06      	ldr	r3, [pc, #24]	@ (80213a8 <tcpip_tcp_timer+0x44>)
 802138e:	2200      	movs	r2, #0
 8021390:	601a      	str	r2, [r3, #0]
  }
}
 8021392:	bf00      	nop
 8021394:	bf00      	nop
 8021396:	3708      	adds	r7, #8
 8021398:	46bd      	mov	sp, r7
 802139a:	bd80      	pop	{r7, pc}
 802139c:	2402af64 	.word	0x2402af64
 80213a0:	2402af68 	.word	0x2402af68
 80213a4:	08021365 	.word	0x08021365
 80213a8:	2402afb4 	.word	0x2402afb4

080213ac <tcp_timer_needed>:
 * the reason is to have the TCP timer only running when
 * there are active (or time-wait) PCBs.
 */
void
tcp_timer_needed(void)
{
 80213ac:	b580      	push	{r7, lr}
 80213ae:	af00      	add	r7, sp, #0
  LWIP_ASSERT_CORE_LOCKED();
 80213b0:	f7ef fb64 	bl	8010a7c <sys_check_core_locking>

  /* timer is off but needed again? */
  if (!tcpip_tcp_timer_active && (tcp_active_pcbs || tcp_tw_pcbs)) {
 80213b4:	4b0a      	ldr	r3, [pc, #40]	@ (80213e0 <tcp_timer_needed+0x34>)
 80213b6:	681b      	ldr	r3, [r3, #0]
 80213b8:	2b00      	cmp	r3, #0
 80213ba:	d10f      	bne.n	80213dc <tcp_timer_needed+0x30>
 80213bc:	4b09      	ldr	r3, [pc, #36]	@ (80213e4 <tcp_timer_needed+0x38>)
 80213be:	681b      	ldr	r3, [r3, #0]
 80213c0:	2b00      	cmp	r3, #0
 80213c2:	d103      	bne.n	80213cc <tcp_timer_needed+0x20>
 80213c4:	4b08      	ldr	r3, [pc, #32]	@ (80213e8 <tcp_timer_needed+0x3c>)
 80213c6:	681b      	ldr	r3, [r3, #0]
 80213c8:	2b00      	cmp	r3, #0
 80213ca:	d007      	beq.n	80213dc <tcp_timer_needed+0x30>
    /* enable and start timer */
    tcpip_tcp_timer_active = 1;
 80213cc:	4b04      	ldr	r3, [pc, #16]	@ (80213e0 <tcp_timer_needed+0x34>)
 80213ce:	2201      	movs	r2, #1
 80213d0:	601a      	str	r2, [r3, #0]
    sys_timeout(TCP_TMR_INTERVAL, tcpip_tcp_timer, NULL);
 80213d2:	2200      	movs	r2, #0
 80213d4:	4905      	ldr	r1, [pc, #20]	@ (80213ec <tcp_timer_needed+0x40>)
 80213d6:	20fa      	movs	r0, #250	@ 0xfa
 80213d8:	f000 f8cc 	bl	8021574 <sys_timeout>
  }
}
 80213dc:	bf00      	nop
 80213de:	bd80      	pop	{r7, pc}
 80213e0:	2402afb4 	.word	0x2402afb4
 80213e4:	2402af64 	.word	0x2402af64
 80213e8:	2402af68 	.word	0x2402af68
 80213ec:	08021365 	.word	0x08021365

080213f0 <sys_timeout_abs>:
#if LWIP_DEBUG_TIMERNAMES
sys_timeout_abs(u32_t abs_time, sys_timeout_handler handler, void *arg, const char *handler_name)
#else /* LWIP_DEBUG_TIMERNAMES */
sys_timeout_abs(u32_t abs_time, sys_timeout_handler handler, void *arg)
#endif
{
 80213f0:	b580      	push	{r7, lr}
 80213f2:	b086      	sub	sp, #24
 80213f4:	af00      	add	r7, sp, #0
 80213f6:	60f8      	str	r0, [r7, #12]
 80213f8:	60b9      	str	r1, [r7, #8]
 80213fa:	607a      	str	r2, [r7, #4]
  struct sys_timeo *timeout, *t;

  timeout = (struct sys_timeo *)memp_malloc(MEMP_SYS_TIMEOUT);
 80213fc:	200a      	movs	r0, #10
 80213fe:	f7f8 fd01 	bl	8019e04 <memp_malloc>
 8021402:	6138      	str	r0, [r7, #16]
  if (timeout == NULL) {
 8021404:	693b      	ldr	r3, [r7, #16]
 8021406:	2b00      	cmp	r3, #0
 8021408:	d109      	bne.n	802141e <sys_timeout_abs+0x2e>
    LWIP_ASSERT("sys_timeout: timeout != NULL, pool MEMP_SYS_TIMEOUT is empty", timeout != NULL);
 802140a:	693b      	ldr	r3, [r7, #16]
 802140c:	2b00      	cmp	r3, #0
 802140e:	d151      	bne.n	80214b4 <sys_timeout_abs+0xc4>
 8021410:	4b2a      	ldr	r3, [pc, #168]	@ (80214bc <sys_timeout_abs+0xcc>)
 8021412:	22be      	movs	r2, #190	@ 0xbe
 8021414:	492a      	ldr	r1, [pc, #168]	@ (80214c0 <sys_timeout_abs+0xd0>)
 8021416:	482b      	ldr	r0, [pc, #172]	@ (80214c4 <sys_timeout_abs+0xd4>)
 8021418:	f008 fed0 	bl	802a1bc <iprintf>
    return;
 802141c:	e04a      	b.n	80214b4 <sys_timeout_abs+0xc4>
  }

  timeout->next = NULL;
 802141e:	693b      	ldr	r3, [r7, #16]
 8021420:	2200      	movs	r2, #0
 8021422:	601a      	str	r2, [r3, #0]
  timeout->h = handler;
 8021424:	693b      	ldr	r3, [r7, #16]
 8021426:	68ba      	ldr	r2, [r7, #8]
 8021428:	609a      	str	r2, [r3, #8]
  timeout->arg = arg;
 802142a:	693b      	ldr	r3, [r7, #16]
 802142c:	687a      	ldr	r2, [r7, #4]
 802142e:	60da      	str	r2, [r3, #12]
  timeout->time = abs_time;
 8021430:	693b      	ldr	r3, [r7, #16]
 8021432:	68fa      	ldr	r2, [r7, #12]
 8021434:	605a      	str	r2, [r3, #4]
  timeout->handler_name = handler_name;
  LWIP_DEBUGF(TIMERS_DEBUG, ("sys_timeout: %p abs_time=%"U32_F" handler=%s arg=%p\n",
                             (void *)timeout, abs_time, handler_name, (void *)arg));
#endif /* LWIP_DEBUG_TIMERNAMES */

  if (next_timeout == NULL) {
 8021436:	4b24      	ldr	r3, [pc, #144]	@ (80214c8 <sys_timeout_abs+0xd8>)
 8021438:	681b      	ldr	r3, [r3, #0]
 802143a:	2b00      	cmp	r3, #0
 802143c:	d103      	bne.n	8021446 <sys_timeout_abs+0x56>
    next_timeout = timeout;
 802143e:	4a22      	ldr	r2, [pc, #136]	@ (80214c8 <sys_timeout_abs+0xd8>)
 8021440:	693b      	ldr	r3, [r7, #16]
 8021442:	6013      	str	r3, [r2, #0]
    return;
 8021444:	e037      	b.n	80214b6 <sys_timeout_abs+0xc6>
  }
  if (TIME_LESS_THAN(timeout->time, next_timeout->time)) {
 8021446:	693b      	ldr	r3, [r7, #16]
 8021448:	685a      	ldr	r2, [r3, #4]
 802144a:	4b1f      	ldr	r3, [pc, #124]	@ (80214c8 <sys_timeout_abs+0xd8>)
 802144c:	681b      	ldr	r3, [r3, #0]
 802144e:	685b      	ldr	r3, [r3, #4]
 8021450:	1ad3      	subs	r3, r2, r3
 8021452:	0fdb      	lsrs	r3, r3, #31
 8021454:	f003 0301 	and.w	r3, r3, #1
 8021458:	b2db      	uxtb	r3, r3
 802145a:	2b00      	cmp	r3, #0
 802145c:	d007      	beq.n	802146e <sys_timeout_abs+0x7e>
    timeout->next = next_timeout;
 802145e:	4b1a      	ldr	r3, [pc, #104]	@ (80214c8 <sys_timeout_abs+0xd8>)
 8021460:	681a      	ldr	r2, [r3, #0]
 8021462:	693b      	ldr	r3, [r7, #16]
 8021464:	601a      	str	r2, [r3, #0]
    next_timeout = timeout;
 8021466:	4a18      	ldr	r2, [pc, #96]	@ (80214c8 <sys_timeout_abs+0xd8>)
 8021468:	693b      	ldr	r3, [r7, #16]
 802146a:	6013      	str	r3, [r2, #0]
 802146c:	e023      	b.n	80214b6 <sys_timeout_abs+0xc6>
  } else {
    for (t = next_timeout; t != NULL; t = t->next) {
 802146e:	4b16      	ldr	r3, [pc, #88]	@ (80214c8 <sys_timeout_abs+0xd8>)
 8021470:	681b      	ldr	r3, [r3, #0]
 8021472:	617b      	str	r3, [r7, #20]
 8021474:	e01a      	b.n	80214ac <sys_timeout_abs+0xbc>
      if ((t->next == NULL) || TIME_LESS_THAN(timeout->time, t->next->time)) {
 8021476:	697b      	ldr	r3, [r7, #20]
 8021478:	681b      	ldr	r3, [r3, #0]
 802147a:	2b00      	cmp	r3, #0
 802147c:	d00b      	beq.n	8021496 <sys_timeout_abs+0xa6>
 802147e:	693b      	ldr	r3, [r7, #16]
 8021480:	685a      	ldr	r2, [r3, #4]
 8021482:	697b      	ldr	r3, [r7, #20]
 8021484:	681b      	ldr	r3, [r3, #0]
 8021486:	685b      	ldr	r3, [r3, #4]
 8021488:	1ad3      	subs	r3, r2, r3
 802148a:	0fdb      	lsrs	r3, r3, #31
 802148c:	f003 0301 	and.w	r3, r3, #1
 8021490:	b2db      	uxtb	r3, r3
 8021492:	2b00      	cmp	r3, #0
 8021494:	d007      	beq.n	80214a6 <sys_timeout_abs+0xb6>
        timeout->next = t->next;
 8021496:	697b      	ldr	r3, [r7, #20]
 8021498:	681a      	ldr	r2, [r3, #0]
 802149a:	693b      	ldr	r3, [r7, #16]
 802149c:	601a      	str	r2, [r3, #0]
        t->next = timeout;
 802149e:	697b      	ldr	r3, [r7, #20]
 80214a0:	693a      	ldr	r2, [r7, #16]
 80214a2:	601a      	str	r2, [r3, #0]
        break;
 80214a4:	e007      	b.n	80214b6 <sys_timeout_abs+0xc6>
    for (t = next_timeout; t != NULL; t = t->next) {
 80214a6:	697b      	ldr	r3, [r7, #20]
 80214a8:	681b      	ldr	r3, [r3, #0]
 80214aa:	617b      	str	r3, [r7, #20]
 80214ac:	697b      	ldr	r3, [r7, #20]
 80214ae:	2b00      	cmp	r3, #0
 80214b0:	d1e1      	bne.n	8021476 <sys_timeout_abs+0x86>
 80214b2:	e000      	b.n	80214b6 <sys_timeout_abs+0xc6>
    return;
 80214b4:	bf00      	nop
      }
    }
  }
}
 80214b6:	3718      	adds	r7, #24
 80214b8:	46bd      	mov	sp, r7
 80214ba:	bd80      	pop	{r7, pc}
 80214bc:	0803029c 	.word	0x0803029c
 80214c0:	080302d0 	.word	0x080302d0
 80214c4:	08030310 	.word	0x08030310
 80214c8:	2402afac 	.word	0x2402afac

080214cc <lwip_cyclic_timer>:
#if !LWIP_TESTMODE
static
#endif
void
lwip_cyclic_timer(void *arg)
{
 80214cc:	b580      	push	{r7, lr}
 80214ce:	b086      	sub	sp, #24
 80214d0:	af00      	add	r7, sp, #0
 80214d2:	6078      	str	r0, [r7, #4]
  u32_t now;
  u32_t next_timeout_time;
  const struct lwip_cyclic_timer *cyclic = (const struct lwip_cyclic_timer *)arg;
 80214d4:	687b      	ldr	r3, [r7, #4]
 80214d6:	617b      	str	r3, [r7, #20]

#if LWIP_DEBUG_TIMERNAMES
  LWIP_DEBUGF(TIMERS_DEBUG, ("tcpip: %s()\n", cyclic->handler_name));
#endif
  cyclic->handler();
 80214d8:	697b      	ldr	r3, [r7, #20]
 80214da:	685b      	ldr	r3, [r3, #4]
 80214dc:	4798      	blx	r3

  now = sys_now();
 80214de:	f7ef f831 	bl	8010544 <sys_now>
 80214e2:	6138      	str	r0, [r7, #16]
  next_timeout_time = (u32_t)(current_timeout_due_time + cyclic->interval_ms);  /* overflow handled by TIME_LESS_THAN macro */ 
 80214e4:	697b      	ldr	r3, [r7, #20]
 80214e6:	681a      	ldr	r2, [r3, #0]
 80214e8:	4b0f      	ldr	r3, [pc, #60]	@ (8021528 <lwip_cyclic_timer+0x5c>)
 80214ea:	681b      	ldr	r3, [r3, #0]
 80214ec:	4413      	add	r3, r2
 80214ee:	60fb      	str	r3, [r7, #12]
  if (TIME_LESS_THAN(next_timeout_time, now)) {
 80214f0:	68fa      	ldr	r2, [r7, #12]
 80214f2:	693b      	ldr	r3, [r7, #16]
 80214f4:	1ad3      	subs	r3, r2, r3
 80214f6:	0fdb      	lsrs	r3, r3, #31
 80214f8:	f003 0301 	and.w	r3, r3, #1
 80214fc:	b2db      	uxtb	r3, r3
 80214fe:	2b00      	cmp	r3, #0
 8021500:	d009      	beq.n	8021516 <lwip_cyclic_timer+0x4a>
    /* timer would immediately expire again -> "overload" -> restart without any correction */
#if LWIP_DEBUG_TIMERNAMES
    sys_timeout_abs((u32_t)(now + cyclic->interval_ms), lwip_cyclic_timer, arg, cyclic->handler_name);
#else
    sys_timeout_abs((u32_t)(now + cyclic->interval_ms), lwip_cyclic_timer, arg);
 8021502:	697b      	ldr	r3, [r7, #20]
 8021504:	681a      	ldr	r2, [r3, #0]
 8021506:	693b      	ldr	r3, [r7, #16]
 8021508:	4413      	add	r3, r2
 802150a:	687a      	ldr	r2, [r7, #4]
 802150c:	4907      	ldr	r1, [pc, #28]	@ (802152c <lwip_cyclic_timer+0x60>)
 802150e:	4618      	mov	r0, r3
 8021510:	f7ff ff6e 	bl	80213f0 <sys_timeout_abs>
    sys_timeout_abs(next_timeout_time, lwip_cyclic_timer, arg, cyclic->handler_name);
#else
    sys_timeout_abs(next_timeout_time, lwip_cyclic_timer, arg);
#endif
  }
}
 8021514:	e004      	b.n	8021520 <lwip_cyclic_timer+0x54>
    sys_timeout_abs(next_timeout_time, lwip_cyclic_timer, arg);
 8021516:	687a      	ldr	r2, [r7, #4]
 8021518:	4904      	ldr	r1, [pc, #16]	@ (802152c <lwip_cyclic_timer+0x60>)
 802151a:	68f8      	ldr	r0, [r7, #12]
 802151c:	f7ff ff68 	bl	80213f0 <sys_timeout_abs>
}
 8021520:	bf00      	nop
 8021522:	3718      	adds	r7, #24
 8021524:	46bd      	mov	sp, r7
 8021526:	bd80      	pop	{r7, pc}
 8021528:	2402afb0 	.word	0x2402afb0
 802152c:	080214cd 	.word	0x080214cd

08021530 <sys_timeouts_init>:

/** Initialize this module */
void sys_timeouts_init(void)
{
 8021530:	b580      	push	{r7, lr}
 8021532:	b082      	sub	sp, #8
 8021534:	af00      	add	r7, sp, #0
  size_t i;
  /* tcp_tmr() at index 0 is started on demand */
  for (i = (LWIP_TCP ? 1 : 0); i < LWIP_ARRAYSIZE(lwip_cyclic_timers); i++) {
 8021536:	2301      	movs	r3, #1
 8021538:	607b      	str	r3, [r7, #4]
 802153a:	e00e      	b.n	802155a <sys_timeouts_init+0x2a>
    /* we have to cast via size_t to get rid of const warning
      (this is OK as cyclic_timer() casts back to const* */
    sys_timeout(lwip_cyclic_timers[i].interval_ms, lwip_cyclic_timer, LWIP_CONST_CAST(void *, &lwip_cyclic_timers[i]));
 802153c:	4a0b      	ldr	r2, [pc, #44]	@ (802156c <sys_timeouts_init+0x3c>)
 802153e:	687b      	ldr	r3, [r7, #4]
 8021540:	f852 0033 	ldr.w	r0, [r2, r3, lsl #3]
 8021544:	687b      	ldr	r3, [r7, #4]
 8021546:	00db      	lsls	r3, r3, #3
 8021548:	4a08      	ldr	r2, [pc, #32]	@ (802156c <sys_timeouts_init+0x3c>)
 802154a:	4413      	add	r3, r2
 802154c:	461a      	mov	r2, r3
 802154e:	4908      	ldr	r1, [pc, #32]	@ (8021570 <sys_timeouts_init+0x40>)
 8021550:	f000 f810 	bl	8021574 <sys_timeout>
  for (i = (LWIP_TCP ? 1 : 0); i < LWIP_ARRAYSIZE(lwip_cyclic_timers); i++) {
 8021554:	687b      	ldr	r3, [r7, #4]
 8021556:	3301      	adds	r3, #1
 8021558:	607b      	str	r3, [r7, #4]
 802155a:	687b      	ldr	r3, [r7, #4]
 802155c:	2b04      	cmp	r3, #4
 802155e:	d9ed      	bls.n	802153c <sys_timeouts_init+0xc>
  }
}
 8021560:	bf00      	nop
 8021562:	bf00      	nop
 8021564:	3708      	adds	r7, #8
 8021566:	46bd      	mov	sp, r7
 8021568:	bd80      	pop	{r7, pc}
 802156a:	bf00      	nop
 802156c:	080314cc 	.word	0x080314cc
 8021570:	080214cd 	.word	0x080214cd

08021574 <sys_timeout>:
sys_timeout_debug(u32_t msecs, sys_timeout_handler handler, void *arg, const char *handler_name)
#else /* LWIP_DEBUG_TIMERNAMES */
void
sys_timeout(u32_t msecs, sys_timeout_handler handler, void *arg)
#endif /* LWIP_DEBUG_TIMERNAMES */
{
 8021574:	b580      	push	{r7, lr}
 8021576:	b086      	sub	sp, #24
 8021578:	af00      	add	r7, sp, #0
 802157a:	60f8      	str	r0, [r7, #12]
 802157c:	60b9      	str	r1, [r7, #8]
 802157e:	607a      	str	r2, [r7, #4]
  u32_t next_timeout_time;

  LWIP_ASSERT_CORE_LOCKED();
 8021580:	f7ef fa7c 	bl	8010a7c <sys_check_core_locking>

  LWIP_ASSERT("Timeout time too long, max is LWIP_UINT32_MAX/4 msecs", msecs <= (LWIP_UINT32_MAX / 4));
 8021584:	68fb      	ldr	r3, [r7, #12]
 8021586:	f1b3 4f80 	cmp.w	r3, #1073741824	@ 0x40000000
 802158a:	d306      	bcc.n	802159a <sys_timeout+0x26>
 802158c:	4b0a      	ldr	r3, [pc, #40]	@ (80215b8 <sys_timeout+0x44>)
 802158e:	f240 1229 	movw	r2, #297	@ 0x129
 8021592:	490a      	ldr	r1, [pc, #40]	@ (80215bc <sys_timeout+0x48>)
 8021594:	480a      	ldr	r0, [pc, #40]	@ (80215c0 <sys_timeout+0x4c>)
 8021596:	f008 fe11 	bl	802a1bc <iprintf>

  next_timeout_time = (u32_t)(sys_now() + msecs); /* overflow handled by TIME_LESS_THAN macro */ 
 802159a:	f7ee ffd3 	bl	8010544 <sys_now>
 802159e:	4602      	mov	r2, r0
 80215a0:	68fb      	ldr	r3, [r7, #12]
 80215a2:	4413      	add	r3, r2
 80215a4:	617b      	str	r3, [r7, #20]

#if LWIP_DEBUG_TIMERNAMES
  sys_timeout_abs(next_timeout_time, handler, arg, handler_name);
#else
  sys_timeout_abs(next_timeout_time, handler, arg);
 80215a6:	687a      	ldr	r2, [r7, #4]
 80215a8:	68b9      	ldr	r1, [r7, #8]
 80215aa:	6978      	ldr	r0, [r7, #20]
 80215ac:	f7ff ff20 	bl	80213f0 <sys_timeout_abs>
#endif
}
 80215b0:	bf00      	nop
 80215b2:	3718      	adds	r7, #24
 80215b4:	46bd      	mov	sp, r7
 80215b6:	bd80      	pop	{r7, pc}
 80215b8:	0803029c 	.word	0x0803029c
 80215bc:	08030338 	.word	0x08030338
 80215c0:	08030310 	.word	0x08030310

080215c4 <sys_check_timeouts>:
 *
 * Must be called periodically from your main loop.
 */
void
sys_check_timeouts(void)
{
 80215c4:	b580      	push	{r7, lr}
 80215c6:	b084      	sub	sp, #16
 80215c8:	af00      	add	r7, sp, #0
  u32_t now;

  LWIP_ASSERT_CORE_LOCKED();
 80215ca:	f7ef fa57 	bl	8010a7c <sys_check_core_locking>

  /* Process only timers expired at the start of the function. */
  now = sys_now();
 80215ce:	f7ee ffb9 	bl	8010544 <sys_now>
 80215d2:	60f8      	str	r0, [r7, #12]
    sys_timeout_handler handler;
    void *arg;

    PBUF_CHECK_FREE_OOSEQ();

    tmptimeout = next_timeout;
 80215d4:	4b17      	ldr	r3, [pc, #92]	@ (8021634 <sys_check_timeouts+0x70>)
 80215d6:	681b      	ldr	r3, [r3, #0]
 80215d8:	60bb      	str	r3, [r7, #8]
    if (tmptimeout == NULL) {
 80215da:	68bb      	ldr	r3, [r7, #8]
 80215dc:	2b00      	cmp	r3, #0
 80215de:	d022      	beq.n	8021626 <sys_check_timeouts+0x62>
      return;
    }

    if (TIME_LESS_THAN(now, tmptimeout->time)) {
 80215e0:	68bb      	ldr	r3, [r7, #8]
 80215e2:	685b      	ldr	r3, [r3, #4]
 80215e4:	68fa      	ldr	r2, [r7, #12]
 80215e6:	1ad3      	subs	r3, r2, r3
 80215e8:	0fdb      	lsrs	r3, r3, #31
 80215ea:	f003 0301 	and.w	r3, r3, #1
 80215ee:	b2db      	uxtb	r3, r3
 80215f0:	2b00      	cmp	r3, #0
 80215f2:	d11a      	bne.n	802162a <sys_check_timeouts+0x66>
      return;
    }

    /* Timeout has expired */
    next_timeout = tmptimeout->next;
 80215f4:	68bb      	ldr	r3, [r7, #8]
 80215f6:	681b      	ldr	r3, [r3, #0]
 80215f8:	4a0e      	ldr	r2, [pc, #56]	@ (8021634 <sys_check_timeouts+0x70>)
 80215fa:	6013      	str	r3, [r2, #0]
    handler = tmptimeout->h;
 80215fc:	68bb      	ldr	r3, [r7, #8]
 80215fe:	689b      	ldr	r3, [r3, #8]
 8021600:	607b      	str	r3, [r7, #4]
    arg = tmptimeout->arg;
 8021602:	68bb      	ldr	r3, [r7, #8]
 8021604:	68db      	ldr	r3, [r3, #12]
 8021606:	603b      	str	r3, [r7, #0]
    current_timeout_due_time = tmptimeout->time;
 8021608:	68bb      	ldr	r3, [r7, #8]
 802160a:	685b      	ldr	r3, [r3, #4]
 802160c:	4a0a      	ldr	r2, [pc, #40]	@ (8021638 <sys_check_timeouts+0x74>)
 802160e:	6013      	str	r3, [r2, #0]
    if (handler != NULL) {
      LWIP_DEBUGF(TIMERS_DEBUG, ("sct calling h=%s t=%"U32_F" arg=%p\n",
                                 tmptimeout->handler_name, sys_now() - tmptimeout->time, arg));
    }
#endif /* LWIP_DEBUG_TIMERNAMES */
    memp_free(MEMP_SYS_TIMEOUT, tmptimeout);
 8021610:	68b9      	ldr	r1, [r7, #8]
 8021612:	200a      	movs	r0, #10
 8021614:	f7f8 fc6c 	bl	8019ef0 <memp_free>
    if (handler != NULL) {
 8021618:	687b      	ldr	r3, [r7, #4]
 802161a:	2b00      	cmp	r3, #0
 802161c:	d0da      	beq.n	80215d4 <sys_check_timeouts+0x10>
      handler(arg);
 802161e:	687b      	ldr	r3, [r7, #4]
 8021620:	6838      	ldr	r0, [r7, #0]
 8021622:	4798      	blx	r3
  do {
 8021624:	e7d6      	b.n	80215d4 <sys_check_timeouts+0x10>
      return;
 8021626:	bf00      	nop
 8021628:	e000      	b.n	802162c <sys_check_timeouts+0x68>
      return;
 802162a:	bf00      	nop
    }
    LWIP_TCPIP_THREAD_ALIVE();

    /* Repeat until all expired timers have been called */
  } while (1);
}
 802162c:	3710      	adds	r7, #16
 802162e:	46bd      	mov	sp, r7
 8021630:	bd80      	pop	{r7, pc}
 8021632:	bf00      	nop
 8021634:	2402afac 	.word	0x2402afac
 8021638:	2402afb0 	.word	0x2402afb0

0802163c <sys_timeouts_sleeptime>:
/** Return the time left before the next timeout is due. If no timeouts are
 * enqueued, returns 0xffffffff
 */
u32_t
sys_timeouts_sleeptime(void)
{
 802163c:	b580      	push	{r7, lr}
 802163e:	b082      	sub	sp, #8
 8021640:	af00      	add	r7, sp, #0
  u32_t now;

  LWIP_ASSERT_CORE_LOCKED();
 8021642:	f7ef fa1b 	bl	8010a7c <sys_check_core_locking>

  if (next_timeout == NULL) {
 8021646:	4b16      	ldr	r3, [pc, #88]	@ (80216a0 <sys_timeouts_sleeptime+0x64>)
 8021648:	681b      	ldr	r3, [r3, #0]
 802164a:	2b00      	cmp	r3, #0
 802164c:	d102      	bne.n	8021654 <sys_timeouts_sleeptime+0x18>
    return SYS_TIMEOUTS_SLEEPTIME_INFINITE;
 802164e:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8021652:	e020      	b.n	8021696 <sys_timeouts_sleeptime+0x5a>
  }
  now = sys_now();
 8021654:	f7ee ff76 	bl	8010544 <sys_now>
 8021658:	6078      	str	r0, [r7, #4]
  if (TIME_LESS_THAN(next_timeout->time, now)) {
 802165a:	4b11      	ldr	r3, [pc, #68]	@ (80216a0 <sys_timeouts_sleeptime+0x64>)
 802165c:	681b      	ldr	r3, [r3, #0]
 802165e:	685a      	ldr	r2, [r3, #4]
 8021660:	687b      	ldr	r3, [r7, #4]
 8021662:	1ad3      	subs	r3, r2, r3
 8021664:	0fdb      	lsrs	r3, r3, #31
 8021666:	f003 0301 	and.w	r3, r3, #1
 802166a:	b2db      	uxtb	r3, r3
 802166c:	2b00      	cmp	r3, #0
 802166e:	d001      	beq.n	8021674 <sys_timeouts_sleeptime+0x38>
    return 0;
 8021670:	2300      	movs	r3, #0
 8021672:	e010      	b.n	8021696 <sys_timeouts_sleeptime+0x5a>
  } else {
    u32_t ret = (u32_t)(next_timeout->time - now);
 8021674:	4b0a      	ldr	r3, [pc, #40]	@ (80216a0 <sys_timeouts_sleeptime+0x64>)
 8021676:	681b      	ldr	r3, [r3, #0]
 8021678:	685a      	ldr	r2, [r3, #4]
 802167a:	687b      	ldr	r3, [r7, #4]
 802167c:	1ad3      	subs	r3, r2, r3
 802167e:	603b      	str	r3, [r7, #0]
    LWIP_ASSERT("invalid sleeptime", ret <= LWIP_MAX_TIMEOUT);
 8021680:	683b      	ldr	r3, [r7, #0]
 8021682:	2b00      	cmp	r3, #0
 8021684:	da06      	bge.n	8021694 <sys_timeouts_sleeptime+0x58>
 8021686:	4b07      	ldr	r3, [pc, #28]	@ (80216a4 <sys_timeouts_sleeptime+0x68>)
 8021688:	f44f 72dc 	mov.w	r2, #440	@ 0x1b8
 802168c:	4906      	ldr	r1, [pc, #24]	@ (80216a8 <sys_timeouts_sleeptime+0x6c>)
 802168e:	4807      	ldr	r0, [pc, #28]	@ (80216ac <sys_timeouts_sleeptime+0x70>)
 8021690:	f008 fd94 	bl	802a1bc <iprintf>
    return ret;
 8021694:	683b      	ldr	r3, [r7, #0]
  }
}
 8021696:	4618      	mov	r0, r3
 8021698:	3708      	adds	r7, #8
 802169a:	46bd      	mov	sp, r7
 802169c:	bd80      	pop	{r7, pc}
 802169e:	bf00      	nop
 80216a0:	2402afac 	.word	0x2402afac
 80216a4:	0803029c 	.word	0x0803029c
 80216a8:	08030370 	.word	0x08030370
 80216ac:	08030310 	.word	0x08030310

080216b0 <udp_init>:
/**
 * Initialize this module.
 */
void
udp_init(void)
{
 80216b0:	b580      	push	{r7, lr}
 80216b2:	af00      	add	r7, sp, #0
#ifdef LWIP_RAND
  udp_port = UDP_ENSURE_LOCAL_PORT_RANGE(LWIP_RAND());
 80216b4:	f007 fa58 	bl	8028b68 <rand>
 80216b8:	4603      	mov	r3, r0
 80216ba:	b29b      	uxth	r3, r3
 80216bc:	f3c3 030d 	ubfx	r3, r3, #0, #14
 80216c0:	b29b      	uxth	r3, r3
 80216c2:	f5a3 4380 	sub.w	r3, r3, #16384	@ 0x4000
 80216c6:	b29a      	uxth	r2, r3
 80216c8:	4b01      	ldr	r3, [pc, #4]	@ (80216d0 <udp_init+0x20>)
 80216ca:	801a      	strh	r2, [r3, #0]
#endif /* LWIP_RAND */
}
 80216cc:	bf00      	nop
 80216ce:	bd80      	pop	{r7, pc}
 80216d0:	24000054 	.word	0x24000054

080216d4 <udp_new_port>:
 *
 * @return a new (free) local UDP port number
 */
static u16_t
udp_new_port(void)
{
 80216d4:	b480      	push	{r7}
 80216d6:	b083      	sub	sp, #12
 80216d8:	af00      	add	r7, sp, #0
  u16_t n = 0;
 80216da:	2300      	movs	r3, #0
 80216dc:	80fb      	strh	r3, [r7, #6]
  struct udp_pcb *pcb;

again:
  if (udp_port++ == UDP_LOCAL_PORT_RANGE_END) {
 80216de:	4b17      	ldr	r3, [pc, #92]	@ (802173c <udp_new_port+0x68>)
 80216e0:	881b      	ldrh	r3, [r3, #0]
 80216e2:	1c5a      	adds	r2, r3, #1
 80216e4:	b291      	uxth	r1, r2
 80216e6:	4a15      	ldr	r2, [pc, #84]	@ (802173c <udp_new_port+0x68>)
 80216e8:	8011      	strh	r1, [r2, #0]
 80216ea:	f64f 72ff 	movw	r2, #65535	@ 0xffff
 80216ee:	4293      	cmp	r3, r2
 80216f0:	d103      	bne.n	80216fa <udp_new_port+0x26>
    udp_port = UDP_LOCAL_PORT_RANGE_START;
 80216f2:	4b12      	ldr	r3, [pc, #72]	@ (802173c <udp_new_port+0x68>)
 80216f4:	f44f 4240 	mov.w	r2, #49152	@ 0xc000
 80216f8:	801a      	strh	r2, [r3, #0]
  }
  /* Check all PCBs. */
  for (pcb = udp_pcbs; pcb != NULL; pcb = pcb->next) {
 80216fa:	4b11      	ldr	r3, [pc, #68]	@ (8021740 <udp_new_port+0x6c>)
 80216fc:	681b      	ldr	r3, [r3, #0]
 80216fe:	603b      	str	r3, [r7, #0]
 8021700:	e011      	b.n	8021726 <udp_new_port+0x52>
    if (pcb->local_port == udp_port) {
 8021702:	683b      	ldr	r3, [r7, #0]
 8021704:	8a5a      	ldrh	r2, [r3, #18]
 8021706:	4b0d      	ldr	r3, [pc, #52]	@ (802173c <udp_new_port+0x68>)
 8021708:	881b      	ldrh	r3, [r3, #0]
 802170a:	429a      	cmp	r2, r3
 802170c:	d108      	bne.n	8021720 <udp_new_port+0x4c>
      if (++n > (UDP_LOCAL_PORT_RANGE_END - UDP_LOCAL_PORT_RANGE_START)) {
 802170e:	88fb      	ldrh	r3, [r7, #6]
 8021710:	3301      	adds	r3, #1
 8021712:	80fb      	strh	r3, [r7, #6]
 8021714:	88fb      	ldrh	r3, [r7, #6]
 8021716:	f5b3 4f80 	cmp.w	r3, #16384	@ 0x4000
 802171a:	d3e0      	bcc.n	80216de <udp_new_port+0xa>
        return 0;
 802171c:	2300      	movs	r3, #0
 802171e:	e007      	b.n	8021730 <udp_new_port+0x5c>
  for (pcb = udp_pcbs; pcb != NULL; pcb = pcb->next) {
 8021720:	683b      	ldr	r3, [r7, #0]
 8021722:	68db      	ldr	r3, [r3, #12]
 8021724:	603b      	str	r3, [r7, #0]
 8021726:	683b      	ldr	r3, [r7, #0]
 8021728:	2b00      	cmp	r3, #0
 802172a:	d1ea      	bne.n	8021702 <udp_new_port+0x2e>
      }
      goto again;
    }
  }
  return udp_port;
 802172c:	4b03      	ldr	r3, [pc, #12]	@ (802173c <udp_new_port+0x68>)
 802172e:	881b      	ldrh	r3, [r3, #0]
}
 8021730:	4618      	mov	r0, r3
 8021732:	370c      	adds	r7, #12
 8021734:	46bd      	mov	sp, r7
 8021736:	f85d 7b04 	ldr.w	r7, [sp], #4
 802173a:	4770      	bx	lr
 802173c:	24000054 	.word	0x24000054
 8021740:	2402afb8 	.word	0x2402afb8

08021744 <udp_input_local_match>:
 * @param broadcast 1 if his is an IPv4 broadcast (global or subnet-only), 0 otherwise (only used for IPv4)
 * @return 1 on match, 0 otherwise
 */
static u8_t
udp_input_local_match(struct udp_pcb *pcb, struct netif *inp, u8_t broadcast)
{
 8021744:	b580      	push	{r7, lr}
 8021746:	b084      	sub	sp, #16
 8021748:	af00      	add	r7, sp, #0
 802174a:	60f8      	str	r0, [r7, #12]
 802174c:	60b9      	str	r1, [r7, #8]
 802174e:	4613      	mov	r3, r2
 8021750:	71fb      	strb	r3, [r7, #7]
  LWIP_UNUSED_ARG(inp);       /* in IPv6 only case */
  LWIP_UNUSED_ARG(broadcast); /* in IPv6 only case */

  LWIP_ASSERT("udp_input_local_match: invalid pcb", pcb != NULL);
 8021752:	68fb      	ldr	r3, [r7, #12]
 8021754:	2b00      	cmp	r3, #0
 8021756:	d105      	bne.n	8021764 <udp_input_local_match+0x20>
 8021758:	4b27      	ldr	r3, [pc, #156]	@ (80217f8 <udp_input_local_match+0xb4>)
 802175a:	2287      	movs	r2, #135	@ 0x87
 802175c:	4927      	ldr	r1, [pc, #156]	@ (80217fc <udp_input_local_match+0xb8>)
 802175e:	4828      	ldr	r0, [pc, #160]	@ (8021800 <udp_input_local_match+0xbc>)
 8021760:	f008 fd2c 	bl	802a1bc <iprintf>
  LWIP_ASSERT("udp_input_local_match: invalid netif", inp != NULL);
 8021764:	68bb      	ldr	r3, [r7, #8]
 8021766:	2b00      	cmp	r3, #0
 8021768:	d105      	bne.n	8021776 <udp_input_local_match+0x32>
 802176a:	4b23      	ldr	r3, [pc, #140]	@ (80217f8 <udp_input_local_match+0xb4>)
 802176c:	2288      	movs	r2, #136	@ 0x88
 802176e:	4925      	ldr	r1, [pc, #148]	@ (8021804 <udp_input_local_match+0xc0>)
 8021770:	4823      	ldr	r0, [pc, #140]	@ (8021800 <udp_input_local_match+0xbc>)
 8021772:	f008 fd23 	bl	802a1bc <iprintf>

  /* check if PCB is bound to specific netif */
  if ((pcb->netif_idx != NETIF_NO_INDEX) &&
 8021776:	68fb      	ldr	r3, [r7, #12]
 8021778:	7a1b      	ldrb	r3, [r3, #8]
 802177a:	2b00      	cmp	r3, #0
 802177c:	d00b      	beq.n	8021796 <udp_input_local_match+0x52>
      (pcb->netif_idx != netif_get_index(ip_data.current_input_netif))) {
 802177e:	68fb      	ldr	r3, [r7, #12]
 8021780:	7a1a      	ldrb	r2, [r3, #8]
 8021782:	4b21      	ldr	r3, [pc, #132]	@ (8021808 <udp_input_local_match+0xc4>)
 8021784:	685b      	ldr	r3, [r3, #4]
 8021786:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 802178a:	3301      	adds	r3, #1
 802178c:	b2db      	uxtb	r3, r3
  if ((pcb->netif_idx != NETIF_NO_INDEX) &&
 802178e:	429a      	cmp	r2, r3
 8021790:	d001      	beq.n	8021796 <udp_input_local_match+0x52>
    return 0;
 8021792:	2300      	movs	r3, #0
 8021794:	e02b      	b.n	80217ee <udp_input_local_match+0xaa>
  /* Only need to check PCB if incoming IP version matches PCB IP version */
  if (IP_ADDR_PCB_VERSION_MATCH_EXACT(pcb, ip_current_dest_addr())) {
#if LWIP_IPV4
    /* Special case: IPv4 broadcast: all or broadcasts in my subnet
     * Note: broadcast variable can only be 1 if it is an IPv4 broadcast */
    if (broadcast != 0) {
 8021796:	79fb      	ldrb	r3, [r7, #7]
 8021798:	2b00      	cmp	r3, #0
 802179a:	d018      	beq.n	80217ce <udp_input_local_match+0x8a>
#if IP_SOF_BROADCAST_RECV
      if (ip_get_option(pcb, SOF_BROADCAST))
#endif /* IP_SOF_BROADCAST_RECV */
      {
        if (ip4_addr_isany(ip_2_ip4(&pcb->local_ip)) ||
 802179c:	68fb      	ldr	r3, [r7, #12]
 802179e:	2b00      	cmp	r3, #0
 80217a0:	d013      	beq.n	80217ca <udp_input_local_match+0x86>
 80217a2:	68fb      	ldr	r3, [r7, #12]
 80217a4:	681b      	ldr	r3, [r3, #0]
 80217a6:	2b00      	cmp	r3, #0
 80217a8:	d00f      	beq.n	80217ca <udp_input_local_match+0x86>
            ((ip4_current_dest_addr()->addr == IPADDR_BROADCAST)) ||
 80217aa:	4b17      	ldr	r3, [pc, #92]	@ (8021808 <udp_input_local_match+0xc4>)
 80217ac:	695b      	ldr	r3, [r3, #20]
        if (ip4_addr_isany(ip_2_ip4(&pcb->local_ip)) ||
 80217ae:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 80217b2:	d00a      	beq.n	80217ca <udp_input_local_match+0x86>
            ip4_addr_netcmp(ip_2_ip4(&pcb->local_ip), ip4_current_dest_addr(), netif_ip4_netmask(inp))) {
 80217b4:	68fb      	ldr	r3, [r7, #12]
 80217b6:	681a      	ldr	r2, [r3, #0]
 80217b8:	4b13      	ldr	r3, [pc, #76]	@ (8021808 <udp_input_local_match+0xc4>)
 80217ba:	695b      	ldr	r3, [r3, #20]
 80217bc:	405a      	eors	r2, r3
 80217be:	68bb      	ldr	r3, [r7, #8]
 80217c0:	3308      	adds	r3, #8
 80217c2:	681b      	ldr	r3, [r3, #0]
 80217c4:	4013      	ands	r3, r2
            ((ip4_current_dest_addr()->addr == IPADDR_BROADCAST)) ||
 80217c6:	2b00      	cmp	r3, #0
 80217c8:	d110      	bne.n	80217ec <udp_input_local_match+0xa8>
          return 1;
 80217ca:	2301      	movs	r3, #1
 80217cc:	e00f      	b.n	80217ee <udp_input_local_match+0xaa>
        }
      }
    } else
#endif /* LWIP_IPV4 */
      /* Handle IPv4 and IPv6: all or exact match */
      if (ip_addr_isany(&pcb->local_ip) || ip_addr_cmp(&pcb->local_ip, ip_current_dest_addr())) {
 80217ce:	68fb      	ldr	r3, [r7, #12]
 80217d0:	2b00      	cmp	r3, #0
 80217d2:	d009      	beq.n	80217e8 <udp_input_local_match+0xa4>
 80217d4:	68fb      	ldr	r3, [r7, #12]
 80217d6:	681b      	ldr	r3, [r3, #0]
 80217d8:	2b00      	cmp	r3, #0
 80217da:	d005      	beq.n	80217e8 <udp_input_local_match+0xa4>
 80217dc:	68fb      	ldr	r3, [r7, #12]
 80217de:	681a      	ldr	r2, [r3, #0]
 80217e0:	4b09      	ldr	r3, [pc, #36]	@ (8021808 <udp_input_local_match+0xc4>)
 80217e2:	695b      	ldr	r3, [r3, #20]
 80217e4:	429a      	cmp	r2, r3
 80217e6:	d101      	bne.n	80217ec <udp_input_local_match+0xa8>
        return 1;
 80217e8:	2301      	movs	r3, #1
 80217ea:	e000      	b.n	80217ee <udp_input_local_match+0xaa>
      }
  }

  return 0;
 80217ec:	2300      	movs	r3, #0
}
 80217ee:	4618      	mov	r0, r3
 80217f0:	3710      	adds	r7, #16
 80217f2:	46bd      	mov	sp, r7
 80217f4:	bd80      	pop	{r7, pc}
 80217f6:	bf00      	nop
 80217f8:	08030384 	.word	0x08030384
 80217fc:	080303b4 	.word	0x080303b4
 8021800:	080303d8 	.word	0x080303d8
 8021804:	08030400 	.word	0x08030400
 8021808:	24024408 	.word	0x24024408

0802180c <udp_input>:
 * @param inp network interface on which the datagram was received.
 *
 */
void
udp_input(struct pbuf *p, struct netif *inp)
{
 802180c:	b590      	push	{r4, r7, lr}
 802180e:	b08d      	sub	sp, #52	@ 0x34
 8021810:	af02      	add	r7, sp, #8
 8021812:	6078      	str	r0, [r7, #4]
 8021814:	6039      	str	r1, [r7, #0]
  struct udp_hdr *udphdr;
  struct udp_pcb *pcb, *prev;
  struct udp_pcb *uncon_pcb;
  u16_t src, dest;
  u8_t broadcast;
  u8_t for_us = 0;
 8021816:	2300      	movs	r3, #0
 8021818:	77fb      	strb	r3, [r7, #31]

  LWIP_UNUSED_ARG(inp);

  LWIP_ASSERT_CORE_LOCKED();
 802181a:	f7ef f92f 	bl	8010a7c <sys_check_core_locking>

  LWIP_ASSERT("udp_input: invalid pbuf", p != NULL);
 802181e:	687b      	ldr	r3, [r7, #4]
 8021820:	2b00      	cmp	r3, #0
 8021822:	d105      	bne.n	8021830 <udp_input+0x24>
 8021824:	4b7c      	ldr	r3, [pc, #496]	@ (8021a18 <udp_input+0x20c>)
 8021826:	22cf      	movs	r2, #207	@ 0xcf
 8021828:	497c      	ldr	r1, [pc, #496]	@ (8021a1c <udp_input+0x210>)
 802182a:	487d      	ldr	r0, [pc, #500]	@ (8021a20 <udp_input+0x214>)
 802182c:	f008 fcc6 	bl	802a1bc <iprintf>
  LWIP_ASSERT("udp_input: invalid netif", inp != NULL);
 8021830:	683b      	ldr	r3, [r7, #0]
 8021832:	2b00      	cmp	r3, #0
 8021834:	d105      	bne.n	8021842 <udp_input+0x36>
 8021836:	4b78      	ldr	r3, [pc, #480]	@ (8021a18 <udp_input+0x20c>)
 8021838:	22d0      	movs	r2, #208	@ 0xd0
 802183a:	497a      	ldr	r1, [pc, #488]	@ (8021a24 <udp_input+0x218>)
 802183c:	4878      	ldr	r0, [pc, #480]	@ (8021a20 <udp_input+0x214>)
 802183e:	f008 fcbd 	bl	802a1bc <iprintf>
  PERF_START;

  UDP_STATS_INC(udp.recv);

  /* Check minimum length (UDP header) */
  if (p->len < UDP_HLEN) {
 8021842:	687b      	ldr	r3, [r7, #4]
 8021844:	895b      	ldrh	r3, [r3, #10]
 8021846:	2b07      	cmp	r3, #7
 8021848:	d803      	bhi.n	8021852 <udp_input+0x46>
    LWIP_DEBUGF(UDP_DEBUG,
                ("udp_input: short UDP datagram (%"U16_F" bytes) discarded\n", p->tot_len));
    UDP_STATS_INC(udp.lenerr);
    UDP_STATS_INC(udp.drop);
    MIB2_STATS_INC(mib2.udpinerrors);
    pbuf_free(p);
 802184a:	6878      	ldr	r0, [r7, #4]
 802184c:	f7f9 fa3e 	bl	801accc <pbuf_free>
    goto end;
 8021850:	e0de      	b.n	8021a10 <udp_input+0x204>
  }

  udphdr = (struct udp_hdr *)p->payload;
 8021852:	687b      	ldr	r3, [r7, #4]
 8021854:	685b      	ldr	r3, [r3, #4]
 8021856:	617b      	str	r3, [r7, #20]

  /* is broadcast packet ? */
  broadcast = ip_addr_isbroadcast(ip_current_dest_addr(), ip_current_netif());
 8021858:	4b73      	ldr	r3, [pc, #460]	@ (8021a28 <udp_input+0x21c>)
 802185a:	695b      	ldr	r3, [r3, #20]
 802185c:	4a72      	ldr	r2, [pc, #456]	@ (8021a28 <udp_input+0x21c>)
 802185e:	6812      	ldr	r2, [r2, #0]
 8021860:	4611      	mov	r1, r2
 8021862:	4618      	mov	r0, r3
 8021864:	f003 ff54 	bl	8025710 <ip4_addr_isbroadcast_u32>
 8021868:	4603      	mov	r3, r0
 802186a:	74fb      	strb	r3, [r7, #19]

  LWIP_DEBUGF(UDP_DEBUG, ("udp_input: received datagram of length %"U16_F"\n", p->tot_len));

  /* convert src and dest ports to host byte order */
  src = lwip_ntohs(udphdr->src);
 802186c:	697b      	ldr	r3, [r7, #20]
 802186e:	881b      	ldrh	r3, [r3, #0]
 8021870:	b29b      	uxth	r3, r3
 8021872:	4618      	mov	r0, r3
 8021874:	f7f7 fd48 	bl	8019308 <lwip_htons>
 8021878:	4603      	mov	r3, r0
 802187a:	823b      	strh	r3, [r7, #16]
  dest = lwip_ntohs(udphdr->dest);
 802187c:	697b      	ldr	r3, [r7, #20]
 802187e:	885b      	ldrh	r3, [r3, #2]
 8021880:	b29b      	uxth	r3, r3
 8021882:	4618      	mov	r0, r3
 8021884:	f7f7 fd40 	bl	8019308 <lwip_htons>
 8021888:	4603      	mov	r3, r0
 802188a:	81fb      	strh	r3, [r7, #14]
  ip_addr_debug_print_val(UDP_DEBUG, *ip_current_dest_addr());
  LWIP_DEBUGF(UDP_DEBUG, (", %"U16_F") <-- (", lwip_ntohs(udphdr->dest)));
  ip_addr_debug_print_val(UDP_DEBUG, *ip_current_src_addr());
  LWIP_DEBUGF(UDP_DEBUG, (", %"U16_F")\n", lwip_ntohs(udphdr->src)));

  pcb = NULL;
 802188c:	2300      	movs	r3, #0
 802188e:	623b      	str	r3, [r7, #32]
  prev = NULL;
 8021890:	2300      	movs	r3, #0
 8021892:	627b      	str	r3, [r7, #36]	@ 0x24
  uncon_pcb = NULL;
 8021894:	2300      	movs	r3, #0
 8021896:	61bb      	str	r3, [r7, #24]
  /* Iterate through the UDP pcb list for a matching pcb.
   * 'Perfect match' pcbs (connected to the remote port & ip address) are
   * preferred. If no perfect match is found, the first unconnected pcb that
   * matches the local port and ip address gets the datagram. */
  for (pcb = udp_pcbs; pcb != NULL; pcb = pcb->next) {
 8021898:	4b64      	ldr	r3, [pc, #400]	@ (8021a2c <udp_input+0x220>)
 802189a:	681b      	ldr	r3, [r3, #0]
 802189c:	623b      	str	r3, [r7, #32]
 802189e:	e054      	b.n	802194a <udp_input+0x13e>
    LWIP_DEBUGF(UDP_DEBUG, (", %"U16_F") <-- (", pcb->local_port));
    ip_addr_debug_print_val(UDP_DEBUG, pcb->remote_ip);
    LWIP_DEBUGF(UDP_DEBUG, (", %"U16_F")\n", pcb->remote_port));

    /* compare PCB local addr+port to UDP destination addr+port */
    if ((pcb->local_port == dest) &&
 80218a0:	6a3b      	ldr	r3, [r7, #32]
 80218a2:	8a5b      	ldrh	r3, [r3, #18]
 80218a4:	89fa      	ldrh	r2, [r7, #14]
 80218a6:	429a      	cmp	r2, r3
 80218a8:	d14a      	bne.n	8021940 <udp_input+0x134>
        (udp_input_local_match(pcb, inp, broadcast) != 0)) {
 80218aa:	7cfb      	ldrb	r3, [r7, #19]
 80218ac:	461a      	mov	r2, r3
 80218ae:	6839      	ldr	r1, [r7, #0]
 80218b0:	6a38      	ldr	r0, [r7, #32]
 80218b2:	f7ff ff47 	bl	8021744 <udp_input_local_match>
 80218b6:	4603      	mov	r3, r0
    if ((pcb->local_port == dest) &&
 80218b8:	2b00      	cmp	r3, #0
 80218ba:	d041      	beq.n	8021940 <udp_input+0x134>
      if ((pcb->flags & UDP_FLAGS_CONNECTED) == 0) {
 80218bc:	6a3b      	ldr	r3, [r7, #32]
 80218be:	7c1b      	ldrb	r3, [r3, #16]
 80218c0:	f003 0304 	and.w	r3, r3, #4
 80218c4:	2b00      	cmp	r3, #0
 80218c6:	d11d      	bne.n	8021904 <udp_input+0xf8>
        if (uncon_pcb == NULL) {
 80218c8:	69bb      	ldr	r3, [r7, #24]
 80218ca:	2b00      	cmp	r3, #0
 80218cc:	d102      	bne.n	80218d4 <udp_input+0xc8>
          /* the first unconnected matching PCB */
          uncon_pcb = pcb;
 80218ce:	6a3b      	ldr	r3, [r7, #32]
 80218d0:	61bb      	str	r3, [r7, #24]
 80218d2:	e017      	b.n	8021904 <udp_input+0xf8>
#if LWIP_IPV4
        } else if (broadcast && ip4_current_dest_addr()->addr == IPADDR_BROADCAST) {
 80218d4:	7cfb      	ldrb	r3, [r7, #19]
 80218d6:	2b00      	cmp	r3, #0
 80218d8:	d014      	beq.n	8021904 <udp_input+0xf8>
 80218da:	4b53      	ldr	r3, [pc, #332]	@ (8021a28 <udp_input+0x21c>)
 80218dc:	695b      	ldr	r3, [r3, #20]
 80218de:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 80218e2:	d10f      	bne.n	8021904 <udp_input+0xf8>
          /* global broadcast address (only valid for IPv4; match was checked before) */
          if (!IP_IS_V4_VAL(uncon_pcb->local_ip) || !ip4_addr_cmp(ip_2_ip4(&uncon_pcb->local_ip), netif_ip4_addr(inp))) {
 80218e4:	69bb      	ldr	r3, [r7, #24]
 80218e6:	681a      	ldr	r2, [r3, #0]
 80218e8:	683b      	ldr	r3, [r7, #0]
 80218ea:	3304      	adds	r3, #4
 80218ec:	681b      	ldr	r3, [r3, #0]
 80218ee:	429a      	cmp	r2, r3
 80218f0:	d008      	beq.n	8021904 <udp_input+0xf8>
            /* uncon_pcb does not match the input netif, check this pcb */
            if (IP_IS_V4_VAL(pcb->local_ip) && ip4_addr_cmp(ip_2_ip4(&pcb->local_ip), netif_ip4_addr(inp))) {
 80218f2:	6a3b      	ldr	r3, [r7, #32]
 80218f4:	681a      	ldr	r2, [r3, #0]
 80218f6:	683b      	ldr	r3, [r7, #0]
 80218f8:	3304      	adds	r3, #4
 80218fa:	681b      	ldr	r3, [r3, #0]
 80218fc:	429a      	cmp	r2, r3
 80218fe:	d101      	bne.n	8021904 <udp_input+0xf8>
              /* better match */
              uncon_pcb = pcb;
 8021900:	6a3b      	ldr	r3, [r7, #32]
 8021902:	61bb      	str	r3, [r7, #24]
        }
#endif /* SO_REUSE */
      }

      /* compare PCB remote addr+port to UDP source addr+port */
      if ((pcb->remote_port == src) &&
 8021904:	6a3b      	ldr	r3, [r7, #32]
 8021906:	8a9b      	ldrh	r3, [r3, #20]
 8021908:	8a3a      	ldrh	r2, [r7, #16]
 802190a:	429a      	cmp	r2, r3
 802190c:	d118      	bne.n	8021940 <udp_input+0x134>
          (ip_addr_isany_val(pcb->remote_ip) ||
 802190e:	6a3b      	ldr	r3, [r7, #32]
 8021910:	685b      	ldr	r3, [r3, #4]
      if ((pcb->remote_port == src) &&
 8021912:	2b00      	cmp	r3, #0
 8021914:	d005      	beq.n	8021922 <udp_input+0x116>
           ip_addr_cmp(&pcb->remote_ip, ip_current_src_addr()))) {
 8021916:	6a3b      	ldr	r3, [r7, #32]
 8021918:	685a      	ldr	r2, [r3, #4]
 802191a:	4b43      	ldr	r3, [pc, #268]	@ (8021a28 <udp_input+0x21c>)
 802191c:	691b      	ldr	r3, [r3, #16]
          (ip_addr_isany_val(pcb->remote_ip) ||
 802191e:	429a      	cmp	r2, r3
 8021920:	d10e      	bne.n	8021940 <udp_input+0x134>
        /* the first fully matching PCB */
        if (prev != NULL) {
 8021922:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8021924:	2b00      	cmp	r3, #0
 8021926:	d014      	beq.n	8021952 <udp_input+0x146>
          /* move the pcb to the front of udp_pcbs so that is
             found faster next time */
          prev->next = pcb->next;
 8021928:	6a3b      	ldr	r3, [r7, #32]
 802192a:	68da      	ldr	r2, [r3, #12]
 802192c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 802192e:	60da      	str	r2, [r3, #12]
          pcb->next = udp_pcbs;
 8021930:	4b3e      	ldr	r3, [pc, #248]	@ (8021a2c <udp_input+0x220>)
 8021932:	681a      	ldr	r2, [r3, #0]
 8021934:	6a3b      	ldr	r3, [r7, #32]
 8021936:	60da      	str	r2, [r3, #12]
          udp_pcbs = pcb;
 8021938:	4a3c      	ldr	r2, [pc, #240]	@ (8021a2c <udp_input+0x220>)
 802193a:	6a3b      	ldr	r3, [r7, #32]
 802193c:	6013      	str	r3, [r2, #0]
        } else {
          UDP_STATS_INC(udp.cachehit);
        }
        break;
 802193e:	e008      	b.n	8021952 <udp_input+0x146>
      }
    }

    prev = pcb;
 8021940:	6a3b      	ldr	r3, [r7, #32]
 8021942:	627b      	str	r3, [r7, #36]	@ 0x24
  for (pcb = udp_pcbs; pcb != NULL; pcb = pcb->next) {
 8021944:	6a3b      	ldr	r3, [r7, #32]
 8021946:	68db      	ldr	r3, [r3, #12]
 8021948:	623b      	str	r3, [r7, #32]
 802194a:	6a3b      	ldr	r3, [r7, #32]
 802194c:	2b00      	cmp	r3, #0
 802194e:	d1a7      	bne.n	80218a0 <udp_input+0x94>
 8021950:	e000      	b.n	8021954 <udp_input+0x148>
        break;
 8021952:	bf00      	nop
  }
  /* no fully matching pcb found? then look for an unconnected pcb */
  if (pcb == NULL) {
 8021954:	6a3b      	ldr	r3, [r7, #32]
 8021956:	2b00      	cmp	r3, #0
 8021958:	d101      	bne.n	802195e <udp_input+0x152>
    pcb = uncon_pcb;
 802195a:	69bb      	ldr	r3, [r7, #24]
 802195c:	623b      	str	r3, [r7, #32]
  }

  /* Check checksum if this is a match or if it was directed at us. */
  if (pcb != NULL) {
 802195e:	6a3b      	ldr	r3, [r7, #32]
 8021960:	2b00      	cmp	r3, #0
 8021962:	d002      	beq.n	802196a <udp_input+0x15e>
    for_us = 1;
 8021964:	2301      	movs	r3, #1
 8021966:	77fb      	strb	r3, [r7, #31]
 8021968:	e00a      	b.n	8021980 <udp_input+0x174>
      for_us = netif_get_ip6_addr_match(inp, ip6_current_dest_addr()) >= 0;
    }
#endif /* LWIP_IPV6 */
#if LWIP_IPV4
    if (!ip_current_is_v6()) {
      for_us = ip4_addr_cmp(netif_ip4_addr(inp), ip4_current_dest_addr());
 802196a:	683b      	ldr	r3, [r7, #0]
 802196c:	3304      	adds	r3, #4
 802196e:	681a      	ldr	r2, [r3, #0]
 8021970:	4b2d      	ldr	r3, [pc, #180]	@ (8021a28 <udp_input+0x21c>)
 8021972:	695b      	ldr	r3, [r3, #20]
 8021974:	429a      	cmp	r2, r3
 8021976:	bf0c      	ite	eq
 8021978:	2301      	moveq	r3, #1
 802197a:	2300      	movne	r3, #0
 802197c:	b2db      	uxtb	r3, r3
 802197e:	77fb      	strb	r3, [r7, #31]
    }
#endif /* LWIP_IPV4 */
  }

  if (for_us) {
 8021980:	7ffb      	ldrb	r3, [r7, #31]
 8021982:	2b00      	cmp	r3, #0
 8021984:	d041      	beq.n	8021a0a <udp_input+0x1fe>
          }
        }
      }
    }
#endif /* CHECKSUM_CHECK_UDP */
    if (pbuf_remove_header(p, UDP_HLEN)) {
 8021986:	2108      	movs	r1, #8
 8021988:	6878      	ldr	r0, [r7, #4]
 802198a:	f7f9 f8e7 	bl	801ab5c <pbuf_remove_header>
 802198e:	4603      	mov	r3, r0
 8021990:	2b00      	cmp	r3, #0
 8021992:	d00a      	beq.n	80219aa <udp_input+0x19e>
      /* Can we cope with this failing? Just assert for now */
      LWIP_ASSERT("pbuf_remove_header failed\n", 0);
 8021994:	4b20      	ldr	r3, [pc, #128]	@ (8021a18 <udp_input+0x20c>)
 8021996:	f44f 72b8 	mov.w	r2, #368	@ 0x170
 802199a:	4925      	ldr	r1, [pc, #148]	@ (8021a30 <udp_input+0x224>)
 802199c:	4820      	ldr	r0, [pc, #128]	@ (8021a20 <udp_input+0x214>)
 802199e:	f008 fc0d 	bl	802a1bc <iprintf>
      UDP_STATS_INC(udp.drop);
      MIB2_STATS_INC(mib2.udpinerrors);
      pbuf_free(p);
 80219a2:	6878      	ldr	r0, [r7, #4]
 80219a4:	f7f9 f992 	bl	801accc <pbuf_free>
      goto end;
 80219a8:	e032      	b.n	8021a10 <udp_input+0x204>
    }

    if (pcb != NULL) {
 80219aa:	6a3b      	ldr	r3, [r7, #32]
 80219ac:	2b00      	cmp	r3, #0
 80219ae:	d012      	beq.n	80219d6 <udp_input+0x1ca>
          }
        }
      }
#endif /* SO_REUSE && SO_REUSE_RXTOALL */
      /* callback */
      if (pcb->recv != NULL) {
 80219b0:	6a3b      	ldr	r3, [r7, #32]
 80219b2:	699b      	ldr	r3, [r3, #24]
 80219b4:	2b00      	cmp	r3, #0
 80219b6:	d00a      	beq.n	80219ce <udp_input+0x1c2>
        /* now the recv function is responsible for freeing p */
        pcb->recv(pcb->recv_arg, pcb, p, ip_current_src_addr(), src);
 80219b8:	6a3b      	ldr	r3, [r7, #32]
 80219ba:	699c      	ldr	r4, [r3, #24]
 80219bc:	6a3b      	ldr	r3, [r7, #32]
 80219be:	69d8      	ldr	r0, [r3, #28]
 80219c0:	8a3b      	ldrh	r3, [r7, #16]
 80219c2:	9300      	str	r3, [sp, #0]
 80219c4:	4b1b      	ldr	r3, [pc, #108]	@ (8021a34 <udp_input+0x228>)
 80219c6:	687a      	ldr	r2, [r7, #4]
 80219c8:	6a39      	ldr	r1, [r7, #32]
 80219ca:	47a0      	blx	r4
  } else {
    pbuf_free(p);
  }
end:
  PERF_STOP("udp_input");
  return;
 80219cc:	e021      	b.n	8021a12 <udp_input+0x206>
        pbuf_free(p);
 80219ce:	6878      	ldr	r0, [r7, #4]
 80219d0:	f7f9 f97c 	bl	801accc <pbuf_free>
        goto end;
 80219d4:	e01c      	b.n	8021a10 <udp_input+0x204>
      if (!broadcast && !ip_addr_ismulticast(ip_current_dest_addr())) {
 80219d6:	7cfb      	ldrb	r3, [r7, #19]
 80219d8:	2b00      	cmp	r3, #0
 80219da:	d112      	bne.n	8021a02 <udp_input+0x1f6>
 80219dc:	4b12      	ldr	r3, [pc, #72]	@ (8021a28 <udp_input+0x21c>)
 80219de:	695b      	ldr	r3, [r3, #20]
 80219e0:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 80219e4:	2be0      	cmp	r3, #224	@ 0xe0
 80219e6:	d00c      	beq.n	8021a02 <udp_input+0x1f6>
        pbuf_header_force(p, (s16_t)(ip_current_header_tot_len() + UDP_HLEN));
 80219e8:	4b0f      	ldr	r3, [pc, #60]	@ (8021a28 <udp_input+0x21c>)
 80219ea:	899b      	ldrh	r3, [r3, #12]
 80219ec:	3308      	adds	r3, #8
 80219ee:	b29b      	uxth	r3, r3
 80219f0:	b21b      	sxth	r3, r3
 80219f2:	4619      	mov	r1, r3
 80219f4:	6878      	ldr	r0, [r7, #4]
 80219f6:	f7f9 f924 	bl	801ac42 <pbuf_header_force>
        icmp_port_unreach(ip_current_is_v6(), p);
 80219fa:	2103      	movs	r1, #3
 80219fc:	6878      	ldr	r0, [r7, #4]
 80219fe:	f003 fb3b 	bl	8025078 <icmp_dest_unreach>
      pbuf_free(p);
 8021a02:	6878      	ldr	r0, [r7, #4]
 8021a04:	f7f9 f962 	bl	801accc <pbuf_free>
  return;
 8021a08:	e003      	b.n	8021a12 <udp_input+0x206>
    pbuf_free(p);
 8021a0a:	6878      	ldr	r0, [r7, #4]
 8021a0c:	f7f9 f95e 	bl	801accc <pbuf_free>
  return;
 8021a10:	bf00      	nop
  UDP_STATS_INC(udp.drop);
  MIB2_STATS_INC(mib2.udpinerrors);
  pbuf_free(p);
  PERF_STOP("udp_input");
#endif /* CHECKSUM_CHECK_UDP */
}
 8021a12:	372c      	adds	r7, #44	@ 0x2c
 8021a14:	46bd      	mov	sp, r7
 8021a16:	bd90      	pop	{r4, r7, pc}
 8021a18:	08030384 	.word	0x08030384
 8021a1c:	08030428 	.word	0x08030428
 8021a20:	080303d8 	.word	0x080303d8
 8021a24:	08030440 	.word	0x08030440
 8021a28:	24024408 	.word	0x24024408
 8021a2c:	2402afb8 	.word	0x2402afb8
 8021a30:	0803045c 	.word	0x0803045c
 8021a34:	24024418 	.word	0x24024418

08021a38 <udp_send>:
 *
 * @see udp_disconnect() udp_sendto()
 */
err_t
udp_send(struct udp_pcb *pcb, struct pbuf *p)
{
 8021a38:	b580      	push	{r7, lr}
 8021a3a:	b082      	sub	sp, #8
 8021a3c:	af00      	add	r7, sp, #0
 8021a3e:	6078      	str	r0, [r7, #4]
 8021a40:	6039      	str	r1, [r7, #0]
  LWIP_ERROR("udp_send: invalid pcb", pcb != NULL, return ERR_ARG);
 8021a42:	687b      	ldr	r3, [r7, #4]
 8021a44:	2b00      	cmp	r3, #0
 8021a46:	d109      	bne.n	8021a5c <udp_send+0x24>
 8021a48:	4b11      	ldr	r3, [pc, #68]	@ (8021a90 <udp_send+0x58>)
 8021a4a:	f240 12d5 	movw	r2, #469	@ 0x1d5
 8021a4e:	4911      	ldr	r1, [pc, #68]	@ (8021a94 <udp_send+0x5c>)
 8021a50:	4811      	ldr	r0, [pc, #68]	@ (8021a98 <udp_send+0x60>)
 8021a52:	f008 fbb3 	bl	802a1bc <iprintf>
 8021a56:	f06f 030f 	mvn.w	r3, #15
 8021a5a:	e015      	b.n	8021a88 <udp_send+0x50>
  LWIP_ERROR("udp_send: invalid pbuf", p != NULL, return ERR_ARG);
 8021a5c:	683b      	ldr	r3, [r7, #0]
 8021a5e:	2b00      	cmp	r3, #0
 8021a60:	d109      	bne.n	8021a76 <udp_send+0x3e>
 8021a62:	4b0b      	ldr	r3, [pc, #44]	@ (8021a90 <udp_send+0x58>)
 8021a64:	f44f 72eb 	mov.w	r2, #470	@ 0x1d6
 8021a68:	490c      	ldr	r1, [pc, #48]	@ (8021a9c <udp_send+0x64>)
 8021a6a:	480b      	ldr	r0, [pc, #44]	@ (8021a98 <udp_send+0x60>)
 8021a6c:	f008 fba6 	bl	802a1bc <iprintf>
 8021a70:	f06f 030f 	mvn.w	r3, #15
 8021a74:	e008      	b.n	8021a88 <udp_send+0x50>
  if (IP_IS_ANY_TYPE_VAL(pcb->remote_ip)) {
    return ERR_VAL;
  }

  /* send to the packet using remote ip and port stored in the pcb */
  return udp_sendto(pcb, p, &pcb->remote_ip, pcb->remote_port);
 8021a76:	687b      	ldr	r3, [r7, #4]
 8021a78:	1d1a      	adds	r2, r3, #4
 8021a7a:	687b      	ldr	r3, [r7, #4]
 8021a7c:	8a9b      	ldrh	r3, [r3, #20]
 8021a7e:	6839      	ldr	r1, [r7, #0]
 8021a80:	6878      	ldr	r0, [r7, #4]
 8021a82:	f000 f80d 	bl	8021aa0 <udp_sendto>
 8021a86:	4603      	mov	r3, r0
}
 8021a88:	4618      	mov	r0, r3
 8021a8a:	3708      	adds	r7, #8
 8021a8c:	46bd      	mov	sp, r7
 8021a8e:	bd80      	pop	{r7, pc}
 8021a90:	08030384 	.word	0x08030384
 8021a94:	08030478 	.word	0x08030478
 8021a98:	080303d8 	.word	0x080303d8
 8021a9c:	08030490 	.word	0x08030490

08021aa0 <udp_sendto>:
 * @see udp_disconnect() udp_send()
 */
err_t
udp_sendto(struct udp_pcb *pcb, struct pbuf *p,
           const ip_addr_t *dst_ip, u16_t dst_port)
{
 8021aa0:	b580      	push	{r7, lr}
 8021aa2:	b088      	sub	sp, #32
 8021aa4:	af02      	add	r7, sp, #8
 8021aa6:	60f8      	str	r0, [r7, #12]
 8021aa8:	60b9      	str	r1, [r7, #8]
 8021aaa:	607a      	str	r2, [r7, #4]
 8021aac:	807b      	strh	r3, [r7, #2]
                  u16_t dst_port, u8_t have_chksum, u16_t chksum)
{
#endif /* LWIP_CHECKSUM_ON_COPY && CHECKSUM_GEN_UDP */
  struct netif *netif;

  LWIP_ERROR("udp_sendto: invalid pcb", pcb != NULL, return ERR_ARG);
 8021aae:	68fb      	ldr	r3, [r7, #12]
 8021ab0:	2b00      	cmp	r3, #0
 8021ab2:	d109      	bne.n	8021ac8 <udp_sendto+0x28>
 8021ab4:	4b23      	ldr	r3, [pc, #140]	@ (8021b44 <udp_sendto+0xa4>)
 8021ab6:	f44f 7206 	mov.w	r2, #536	@ 0x218
 8021aba:	4923      	ldr	r1, [pc, #140]	@ (8021b48 <udp_sendto+0xa8>)
 8021abc:	4823      	ldr	r0, [pc, #140]	@ (8021b4c <udp_sendto+0xac>)
 8021abe:	f008 fb7d 	bl	802a1bc <iprintf>
 8021ac2:	f06f 030f 	mvn.w	r3, #15
 8021ac6:	e038      	b.n	8021b3a <udp_sendto+0x9a>
  LWIP_ERROR("udp_sendto: invalid pbuf", p != NULL, return ERR_ARG);
 8021ac8:	68bb      	ldr	r3, [r7, #8]
 8021aca:	2b00      	cmp	r3, #0
 8021acc:	d109      	bne.n	8021ae2 <udp_sendto+0x42>
 8021ace:	4b1d      	ldr	r3, [pc, #116]	@ (8021b44 <udp_sendto+0xa4>)
 8021ad0:	f240 2219 	movw	r2, #537	@ 0x219
 8021ad4:	491e      	ldr	r1, [pc, #120]	@ (8021b50 <udp_sendto+0xb0>)
 8021ad6:	481d      	ldr	r0, [pc, #116]	@ (8021b4c <udp_sendto+0xac>)
 8021ad8:	f008 fb70 	bl	802a1bc <iprintf>
 8021adc:	f06f 030f 	mvn.w	r3, #15
 8021ae0:	e02b      	b.n	8021b3a <udp_sendto+0x9a>
  LWIP_ERROR("udp_sendto: invalid dst_ip", dst_ip != NULL, return ERR_ARG);
 8021ae2:	687b      	ldr	r3, [r7, #4]
 8021ae4:	2b00      	cmp	r3, #0
 8021ae6:	d109      	bne.n	8021afc <udp_sendto+0x5c>
 8021ae8:	4b16      	ldr	r3, [pc, #88]	@ (8021b44 <udp_sendto+0xa4>)
 8021aea:	f240 221a 	movw	r2, #538	@ 0x21a
 8021aee:	4919      	ldr	r1, [pc, #100]	@ (8021b54 <udp_sendto+0xb4>)
 8021af0:	4816      	ldr	r0, [pc, #88]	@ (8021b4c <udp_sendto+0xac>)
 8021af2:	f008 fb63 	bl	802a1bc <iprintf>
 8021af6:	f06f 030f 	mvn.w	r3, #15
 8021afa:	e01e      	b.n	8021b3a <udp_sendto+0x9a>
    return ERR_VAL;
  }

  LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE, ("udp_send\n"));

  if (pcb->netif_idx != NETIF_NO_INDEX) {
 8021afc:	68fb      	ldr	r3, [r7, #12]
 8021afe:	7a1b      	ldrb	r3, [r3, #8]
 8021b00:	2b00      	cmp	r3, #0
 8021b02:	d006      	beq.n	8021b12 <udp_sendto+0x72>
    netif = netif_get_by_index(pcb->netif_idx);
 8021b04:	68fb      	ldr	r3, [r7, #12]
 8021b06:	7a1b      	ldrb	r3, [r3, #8]
 8021b08:	4618      	mov	r0, r3
 8021b0a:	f7f8 fd1f 	bl	801a54c <netif_get_by_index>
 8021b0e:	6178      	str	r0, [r7, #20]
 8021b10:	e003      	b.n	8021b1a <udp_sendto+0x7a>

    if (netif == NULL)
#endif /* LWIP_MULTICAST_TX_OPTIONS */
    {
      /* find the outgoing network interface for this packet */
      netif = ip_route(&pcb->local_ip, dst_ip);
 8021b12:	6878      	ldr	r0, [r7, #4]
 8021b14:	f003 fb44 	bl	80251a0 <ip4_route>
 8021b18:	6178      	str	r0, [r7, #20]
    }
  }

  /* no outgoing network interface could be found? */
  if (netif == NULL) {
 8021b1a:	697b      	ldr	r3, [r7, #20]
 8021b1c:	2b00      	cmp	r3, #0
 8021b1e:	d102      	bne.n	8021b26 <udp_sendto+0x86>
    LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("udp_send: No route to "));
    ip_addr_debug_print(UDP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, dst_ip);
    LWIP_DEBUGF(UDP_DEBUG, ("\n"));
    UDP_STATS_INC(udp.rterr);
    return ERR_RTE;
 8021b20:	f06f 0303 	mvn.w	r3, #3
 8021b24:	e009      	b.n	8021b3a <udp_sendto+0x9a>
  }
#if LWIP_CHECKSUM_ON_COPY && CHECKSUM_GEN_UDP
  return udp_sendto_if_chksum(pcb, p, dst_ip, dst_port, netif, have_chksum, chksum);
#else /* LWIP_CHECKSUM_ON_COPY && CHECKSUM_GEN_UDP */
  return udp_sendto_if(pcb, p, dst_ip, dst_port, netif);
 8021b26:	887a      	ldrh	r2, [r7, #2]
 8021b28:	697b      	ldr	r3, [r7, #20]
 8021b2a:	9300      	str	r3, [sp, #0]
 8021b2c:	4613      	mov	r3, r2
 8021b2e:	687a      	ldr	r2, [r7, #4]
 8021b30:	68b9      	ldr	r1, [r7, #8]
 8021b32:	68f8      	ldr	r0, [r7, #12]
 8021b34:	f000 f810 	bl	8021b58 <udp_sendto_if>
 8021b38:	4603      	mov	r3, r0
#endif /* LWIP_CHECKSUM_ON_COPY && CHECKSUM_GEN_UDP */
}
 8021b3a:	4618      	mov	r0, r3
 8021b3c:	3718      	adds	r7, #24
 8021b3e:	46bd      	mov	sp, r7
 8021b40:	bd80      	pop	{r7, pc}
 8021b42:	bf00      	nop
 8021b44:	08030384 	.word	0x08030384
 8021b48:	080304a8 	.word	0x080304a8
 8021b4c:	080303d8 	.word	0x080303d8
 8021b50:	080304c0 	.word	0x080304c0
 8021b54:	080304dc 	.word	0x080304dc

08021b58 <udp_sendto_if>:
 * @see udp_disconnect() udp_send()
 */
err_t
udp_sendto_if(struct udp_pcb *pcb, struct pbuf *p,
              const ip_addr_t *dst_ip, u16_t dst_port, struct netif *netif)
{
 8021b58:	b580      	push	{r7, lr}
 8021b5a:	b088      	sub	sp, #32
 8021b5c:	af02      	add	r7, sp, #8
 8021b5e:	60f8      	str	r0, [r7, #12]
 8021b60:	60b9      	str	r1, [r7, #8]
 8021b62:	607a      	str	r2, [r7, #4]
 8021b64:	807b      	strh	r3, [r7, #2]
                     u16_t chksum)
{
#endif /* LWIP_CHECKSUM_ON_COPY && CHECKSUM_GEN_UDP */
  const ip_addr_t *src_ip;

  LWIP_ERROR("udp_sendto_if: invalid pcb", pcb != NULL, return ERR_ARG);
 8021b66:	68fb      	ldr	r3, [r7, #12]
 8021b68:	2b00      	cmp	r3, #0
 8021b6a:	d109      	bne.n	8021b80 <udp_sendto_if+0x28>
 8021b6c:	4b2e      	ldr	r3, [pc, #184]	@ (8021c28 <udp_sendto_if+0xd0>)
 8021b6e:	f44f 7220 	mov.w	r2, #640	@ 0x280
 8021b72:	492e      	ldr	r1, [pc, #184]	@ (8021c2c <udp_sendto_if+0xd4>)
 8021b74:	482e      	ldr	r0, [pc, #184]	@ (8021c30 <udp_sendto_if+0xd8>)
 8021b76:	f008 fb21 	bl	802a1bc <iprintf>
 8021b7a:	f06f 030f 	mvn.w	r3, #15
 8021b7e:	e04f      	b.n	8021c20 <udp_sendto_if+0xc8>
  LWIP_ERROR("udp_sendto_if: invalid pbuf", p != NULL, return ERR_ARG);
 8021b80:	68bb      	ldr	r3, [r7, #8]
 8021b82:	2b00      	cmp	r3, #0
 8021b84:	d109      	bne.n	8021b9a <udp_sendto_if+0x42>
 8021b86:	4b28      	ldr	r3, [pc, #160]	@ (8021c28 <udp_sendto_if+0xd0>)
 8021b88:	f240 2281 	movw	r2, #641	@ 0x281
 8021b8c:	4929      	ldr	r1, [pc, #164]	@ (8021c34 <udp_sendto_if+0xdc>)
 8021b8e:	4828      	ldr	r0, [pc, #160]	@ (8021c30 <udp_sendto_if+0xd8>)
 8021b90:	f008 fb14 	bl	802a1bc <iprintf>
 8021b94:	f06f 030f 	mvn.w	r3, #15
 8021b98:	e042      	b.n	8021c20 <udp_sendto_if+0xc8>
  LWIP_ERROR("udp_sendto_if: invalid dst_ip", dst_ip != NULL, return ERR_ARG);
 8021b9a:	687b      	ldr	r3, [r7, #4]
 8021b9c:	2b00      	cmp	r3, #0
 8021b9e:	d109      	bne.n	8021bb4 <udp_sendto_if+0x5c>
 8021ba0:	4b21      	ldr	r3, [pc, #132]	@ (8021c28 <udp_sendto_if+0xd0>)
 8021ba2:	f240 2282 	movw	r2, #642	@ 0x282
 8021ba6:	4924      	ldr	r1, [pc, #144]	@ (8021c38 <udp_sendto_if+0xe0>)
 8021ba8:	4821      	ldr	r0, [pc, #132]	@ (8021c30 <udp_sendto_if+0xd8>)
 8021baa:	f008 fb07 	bl	802a1bc <iprintf>
 8021bae:	f06f 030f 	mvn.w	r3, #15
 8021bb2:	e035      	b.n	8021c20 <udp_sendto_if+0xc8>
  LWIP_ERROR("udp_sendto_if: invalid netif", netif != NULL, return ERR_ARG);
 8021bb4:	6a3b      	ldr	r3, [r7, #32]
 8021bb6:	2b00      	cmp	r3, #0
 8021bb8:	d109      	bne.n	8021bce <udp_sendto_if+0x76>
 8021bba:	4b1b      	ldr	r3, [pc, #108]	@ (8021c28 <udp_sendto_if+0xd0>)
 8021bbc:	f240 2283 	movw	r2, #643	@ 0x283
 8021bc0:	491e      	ldr	r1, [pc, #120]	@ (8021c3c <udp_sendto_if+0xe4>)
 8021bc2:	481b      	ldr	r0, [pc, #108]	@ (8021c30 <udp_sendto_if+0xd8>)
 8021bc4:	f008 fafa 	bl	802a1bc <iprintf>
 8021bc8:	f06f 030f 	mvn.w	r3, #15
 8021bcc:	e028      	b.n	8021c20 <udp_sendto_if+0xc8>
#endif /* LWIP_IPV6 */
#if LWIP_IPV4 && LWIP_IPV6
  else
#endif /* LWIP_IPV4 && LWIP_IPV6 */
#if LWIP_IPV4
    if (ip4_addr_isany(ip_2_ip4(&pcb->local_ip)) ||
 8021bce:	68fb      	ldr	r3, [r7, #12]
 8021bd0:	2b00      	cmp	r3, #0
 8021bd2:	d009      	beq.n	8021be8 <udp_sendto_if+0x90>
 8021bd4:	68fb      	ldr	r3, [r7, #12]
 8021bd6:	681b      	ldr	r3, [r3, #0]
 8021bd8:	2b00      	cmp	r3, #0
 8021bda:	d005      	beq.n	8021be8 <udp_sendto_if+0x90>
        ip4_addr_ismulticast(ip_2_ip4(&pcb->local_ip))) {
 8021bdc:	68fb      	ldr	r3, [r7, #12]
 8021bde:	681b      	ldr	r3, [r3, #0]
 8021be0:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
    if (ip4_addr_isany(ip_2_ip4(&pcb->local_ip)) ||
 8021be4:	2be0      	cmp	r3, #224	@ 0xe0
 8021be6:	d103      	bne.n	8021bf0 <udp_sendto_if+0x98>
      /* if the local_ip is any or multicast
       * use the outgoing network interface IP address as source address */
      src_ip = netif_ip_addr4(netif);
 8021be8:	6a3b      	ldr	r3, [r7, #32]
 8021bea:	3304      	adds	r3, #4
 8021bec:	617b      	str	r3, [r7, #20]
 8021bee:	e00b      	b.n	8021c08 <udp_sendto_if+0xb0>
    } else {
      /* check if UDP PCB local IP address is correct
       * this could be an old address if netif->ip_addr has changed */
      if (!ip4_addr_cmp(ip_2_ip4(&(pcb->local_ip)), netif_ip4_addr(netif))) {
 8021bf0:	68fb      	ldr	r3, [r7, #12]
 8021bf2:	681a      	ldr	r2, [r3, #0]
 8021bf4:	6a3b      	ldr	r3, [r7, #32]
 8021bf6:	3304      	adds	r3, #4
 8021bf8:	681b      	ldr	r3, [r3, #0]
 8021bfa:	429a      	cmp	r2, r3
 8021bfc:	d002      	beq.n	8021c04 <udp_sendto_if+0xac>
        /* local_ip doesn't match, drop the packet */
        return ERR_RTE;
 8021bfe:	f06f 0303 	mvn.w	r3, #3
 8021c02:	e00d      	b.n	8021c20 <udp_sendto_if+0xc8>
      }
      /* use UDP PCB local IP address as source address */
      src_ip = &pcb->local_ip;
 8021c04:	68fb      	ldr	r3, [r7, #12]
 8021c06:	617b      	str	r3, [r7, #20]
    }
#endif /* LWIP_IPV4 */
#if LWIP_CHECKSUM_ON_COPY && CHECKSUM_GEN_UDP
  return udp_sendto_if_src_chksum(pcb, p, dst_ip, dst_port, netif, have_chksum, chksum, src_ip);
#else /* LWIP_CHECKSUM_ON_COPY && CHECKSUM_GEN_UDP */
  return udp_sendto_if_src(pcb, p, dst_ip, dst_port, netif, src_ip);
 8021c08:	887a      	ldrh	r2, [r7, #2]
 8021c0a:	697b      	ldr	r3, [r7, #20]
 8021c0c:	9301      	str	r3, [sp, #4]
 8021c0e:	6a3b      	ldr	r3, [r7, #32]
 8021c10:	9300      	str	r3, [sp, #0]
 8021c12:	4613      	mov	r3, r2
 8021c14:	687a      	ldr	r2, [r7, #4]
 8021c16:	68b9      	ldr	r1, [r7, #8]
 8021c18:	68f8      	ldr	r0, [r7, #12]
 8021c1a:	f000 f811 	bl	8021c40 <udp_sendto_if_src>
 8021c1e:	4603      	mov	r3, r0
#endif /* LWIP_CHECKSUM_ON_COPY && CHECKSUM_GEN_UDP */
}
 8021c20:	4618      	mov	r0, r3
 8021c22:	3718      	adds	r7, #24
 8021c24:	46bd      	mov	sp, r7
 8021c26:	bd80      	pop	{r7, pc}
 8021c28:	08030384 	.word	0x08030384
 8021c2c:	080304f8 	.word	0x080304f8
 8021c30:	080303d8 	.word	0x080303d8
 8021c34:	08030514 	.word	0x08030514
 8021c38:	08030530 	.word	0x08030530
 8021c3c:	08030550 	.word	0x08030550

08021c40 <udp_sendto_if_src>:
/** @ingroup udp_raw
 * Same as @ref udp_sendto_if, but with source address */
err_t
udp_sendto_if_src(struct udp_pcb *pcb, struct pbuf *p,
                  const ip_addr_t *dst_ip, u16_t dst_port, struct netif *netif, const ip_addr_t *src_ip)
{
 8021c40:	b580      	push	{r7, lr}
 8021c42:	b08c      	sub	sp, #48	@ 0x30
 8021c44:	af04      	add	r7, sp, #16
 8021c46:	60f8      	str	r0, [r7, #12]
 8021c48:	60b9      	str	r1, [r7, #8]
 8021c4a:	607a      	str	r2, [r7, #4]
 8021c4c:	807b      	strh	r3, [r7, #2]
  err_t err;
  struct pbuf *q; /* q will be sent down the stack */
  u8_t ip_proto;
  u8_t ttl;

  LWIP_ASSERT_CORE_LOCKED();
 8021c4e:	f7ee ff15 	bl	8010a7c <sys_check_core_locking>

  LWIP_ERROR("udp_sendto_if_src: invalid pcb", pcb != NULL, return ERR_ARG);
 8021c52:	68fb      	ldr	r3, [r7, #12]
 8021c54:	2b00      	cmp	r3, #0
 8021c56:	d109      	bne.n	8021c6c <udp_sendto_if_src+0x2c>
 8021c58:	4b65      	ldr	r3, [pc, #404]	@ (8021df0 <udp_sendto_if_src+0x1b0>)
 8021c5a:	f240 22d1 	movw	r2, #721	@ 0x2d1
 8021c5e:	4965      	ldr	r1, [pc, #404]	@ (8021df4 <udp_sendto_if_src+0x1b4>)
 8021c60:	4865      	ldr	r0, [pc, #404]	@ (8021df8 <udp_sendto_if_src+0x1b8>)
 8021c62:	f008 faab 	bl	802a1bc <iprintf>
 8021c66:	f06f 030f 	mvn.w	r3, #15
 8021c6a:	e0bc      	b.n	8021de6 <udp_sendto_if_src+0x1a6>
  LWIP_ERROR("udp_sendto_if_src: invalid pbuf", p != NULL, return ERR_ARG);
 8021c6c:	68bb      	ldr	r3, [r7, #8]
 8021c6e:	2b00      	cmp	r3, #0
 8021c70:	d109      	bne.n	8021c86 <udp_sendto_if_src+0x46>
 8021c72:	4b5f      	ldr	r3, [pc, #380]	@ (8021df0 <udp_sendto_if_src+0x1b0>)
 8021c74:	f240 22d2 	movw	r2, #722	@ 0x2d2
 8021c78:	4960      	ldr	r1, [pc, #384]	@ (8021dfc <udp_sendto_if_src+0x1bc>)
 8021c7a:	485f      	ldr	r0, [pc, #380]	@ (8021df8 <udp_sendto_if_src+0x1b8>)
 8021c7c:	f008 fa9e 	bl	802a1bc <iprintf>
 8021c80:	f06f 030f 	mvn.w	r3, #15
 8021c84:	e0af      	b.n	8021de6 <udp_sendto_if_src+0x1a6>
  LWIP_ERROR("udp_sendto_if_src: invalid dst_ip", dst_ip != NULL, return ERR_ARG);
 8021c86:	687b      	ldr	r3, [r7, #4]
 8021c88:	2b00      	cmp	r3, #0
 8021c8a:	d109      	bne.n	8021ca0 <udp_sendto_if_src+0x60>
 8021c8c:	4b58      	ldr	r3, [pc, #352]	@ (8021df0 <udp_sendto_if_src+0x1b0>)
 8021c8e:	f240 22d3 	movw	r2, #723	@ 0x2d3
 8021c92:	495b      	ldr	r1, [pc, #364]	@ (8021e00 <udp_sendto_if_src+0x1c0>)
 8021c94:	4858      	ldr	r0, [pc, #352]	@ (8021df8 <udp_sendto_if_src+0x1b8>)
 8021c96:	f008 fa91 	bl	802a1bc <iprintf>
 8021c9a:	f06f 030f 	mvn.w	r3, #15
 8021c9e:	e0a2      	b.n	8021de6 <udp_sendto_if_src+0x1a6>
  LWIP_ERROR("udp_sendto_if_src: invalid src_ip", src_ip != NULL, return ERR_ARG);
 8021ca0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8021ca2:	2b00      	cmp	r3, #0
 8021ca4:	d109      	bne.n	8021cba <udp_sendto_if_src+0x7a>
 8021ca6:	4b52      	ldr	r3, [pc, #328]	@ (8021df0 <udp_sendto_if_src+0x1b0>)
 8021ca8:	f44f 7235 	mov.w	r2, #724	@ 0x2d4
 8021cac:	4955      	ldr	r1, [pc, #340]	@ (8021e04 <udp_sendto_if_src+0x1c4>)
 8021cae:	4852      	ldr	r0, [pc, #328]	@ (8021df8 <udp_sendto_if_src+0x1b8>)
 8021cb0:	f008 fa84 	bl	802a1bc <iprintf>
 8021cb4:	f06f 030f 	mvn.w	r3, #15
 8021cb8:	e095      	b.n	8021de6 <udp_sendto_if_src+0x1a6>
  LWIP_ERROR("udp_sendto_if_src: invalid netif", netif != NULL, return ERR_ARG);
 8021cba:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8021cbc:	2b00      	cmp	r3, #0
 8021cbe:	d109      	bne.n	8021cd4 <udp_sendto_if_src+0x94>
 8021cc0:	4b4b      	ldr	r3, [pc, #300]	@ (8021df0 <udp_sendto_if_src+0x1b0>)
 8021cc2:	f240 22d5 	movw	r2, #725	@ 0x2d5
 8021cc6:	4950      	ldr	r1, [pc, #320]	@ (8021e08 <udp_sendto_if_src+0x1c8>)
 8021cc8:	484b      	ldr	r0, [pc, #300]	@ (8021df8 <udp_sendto_if_src+0x1b8>)
 8021cca:	f008 fa77 	bl	802a1bc <iprintf>
 8021cce:	f06f 030f 	mvn.w	r3, #15
 8021cd2:	e088      	b.n	8021de6 <udp_sendto_if_src+0x1a6>
    return ERR_VAL;
  }
#endif /* LWIP_IPV4 && IP_SOF_BROADCAST */

  /* if the PCB is not yet bound to a port, bind it here */
  if (pcb->local_port == 0) {
 8021cd4:	68fb      	ldr	r3, [r7, #12]
 8021cd6:	8a5b      	ldrh	r3, [r3, #18]
 8021cd8:	2b00      	cmp	r3, #0
 8021cda:	d10f      	bne.n	8021cfc <udp_sendto_if_src+0xbc>
    LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE, ("udp_send: not yet bound to a port, binding now\n"));
    err = udp_bind(pcb, &pcb->local_ip, pcb->local_port);
 8021cdc:	68f9      	ldr	r1, [r7, #12]
 8021cde:	68fb      	ldr	r3, [r7, #12]
 8021ce0:	8a5b      	ldrh	r3, [r3, #18]
 8021ce2:	461a      	mov	r2, r3
 8021ce4:	68f8      	ldr	r0, [r7, #12]
 8021ce6:	f000 f893 	bl	8021e10 <udp_bind>
 8021cea:	4603      	mov	r3, r0
 8021cec:	76fb      	strb	r3, [r7, #27]
    if (err != ERR_OK) {
 8021cee:	f997 301b 	ldrsb.w	r3, [r7, #27]
 8021cf2:	2b00      	cmp	r3, #0
 8021cf4:	d002      	beq.n	8021cfc <udp_sendto_if_src+0xbc>
      LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("udp_send: forced port bind failed\n"));
      return err;
 8021cf6:	f997 301b 	ldrsb.w	r3, [r7, #27]
 8021cfa:	e074      	b.n	8021de6 <udp_sendto_if_src+0x1a6>
    }
  }

  /* packet too large to add a UDP header without causing an overflow? */
  if ((u16_t)(p->tot_len + UDP_HLEN) < p->tot_len) {
 8021cfc:	68bb      	ldr	r3, [r7, #8]
 8021cfe:	891b      	ldrh	r3, [r3, #8]
 8021d00:	f64f 72f7 	movw	r2, #65527	@ 0xfff7
 8021d04:	4293      	cmp	r3, r2
 8021d06:	d902      	bls.n	8021d0e <udp_sendto_if_src+0xce>
    return ERR_MEM;
 8021d08:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8021d0c:	e06b      	b.n	8021de6 <udp_sendto_if_src+0x1a6>
  }
  /* not enough space to add an UDP header to first pbuf in given p chain? */
  if (pbuf_add_header(p, UDP_HLEN)) {
 8021d0e:	2108      	movs	r1, #8
 8021d10:	68b8      	ldr	r0, [r7, #8]
 8021d12:	f7f8 ff13 	bl	801ab3c <pbuf_add_header>
 8021d16:	4603      	mov	r3, r0
 8021d18:	2b00      	cmp	r3, #0
 8021d1a:	d015      	beq.n	8021d48 <udp_sendto_if_src+0x108>
    /* allocate header in a separate new pbuf */
    q = pbuf_alloc(PBUF_IP, UDP_HLEN, PBUF_RAM);
 8021d1c:	f44f 7220 	mov.w	r2, #640	@ 0x280
 8021d20:	2108      	movs	r1, #8
 8021d22:	2022      	movs	r0, #34	@ 0x22
 8021d24:	f7f8 fcbc 	bl	801a6a0 <pbuf_alloc>
 8021d28:	61f8      	str	r0, [r7, #28]
    /* new header pbuf could not be allocated? */
    if (q == NULL) {
 8021d2a:	69fb      	ldr	r3, [r7, #28]
 8021d2c:	2b00      	cmp	r3, #0
 8021d2e:	d102      	bne.n	8021d36 <udp_sendto_if_src+0xf6>
      LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("udp_send: could not allocate header\n"));
      return ERR_MEM;
 8021d30:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8021d34:	e057      	b.n	8021de6 <udp_sendto_if_src+0x1a6>
    }
    if (p->tot_len != 0) {
 8021d36:	68bb      	ldr	r3, [r7, #8]
 8021d38:	891b      	ldrh	r3, [r3, #8]
 8021d3a:	2b00      	cmp	r3, #0
 8021d3c:	d006      	beq.n	8021d4c <udp_sendto_if_src+0x10c>
      /* chain header q in front of given pbuf p (only if p contains data) */
      pbuf_chain(q, p);
 8021d3e:	68b9      	ldr	r1, [r7, #8]
 8021d40:	69f8      	ldr	r0, [r7, #28]
 8021d42:	f7f9 f8e7 	bl	801af14 <pbuf_chain>
 8021d46:	e001      	b.n	8021d4c <udp_sendto_if_src+0x10c>
    LWIP_DEBUGF(UDP_DEBUG,
                ("udp_send: added header pbuf %p before given pbuf %p\n", (void *)q, (void *)p));
  } else {
    /* adding space for header within p succeeded */
    /* first pbuf q equals given pbuf */
    q = p;
 8021d48:	68bb      	ldr	r3, [r7, #8]
 8021d4a:	61fb      	str	r3, [r7, #28]
    LWIP_DEBUGF(UDP_DEBUG, ("udp_send: added header in given pbuf %p\n", (void *)p));
  }
  LWIP_ASSERT("check that first pbuf can hold struct udp_hdr",
 8021d4c:	69fb      	ldr	r3, [r7, #28]
 8021d4e:	895b      	ldrh	r3, [r3, #10]
 8021d50:	2b07      	cmp	r3, #7
 8021d52:	d806      	bhi.n	8021d62 <udp_sendto_if_src+0x122>
 8021d54:	4b26      	ldr	r3, [pc, #152]	@ (8021df0 <udp_sendto_if_src+0x1b0>)
 8021d56:	f240 320d 	movw	r2, #781	@ 0x30d
 8021d5a:	492c      	ldr	r1, [pc, #176]	@ (8021e0c <udp_sendto_if_src+0x1cc>)
 8021d5c:	4826      	ldr	r0, [pc, #152]	@ (8021df8 <udp_sendto_if_src+0x1b8>)
 8021d5e:	f008 fa2d 	bl	802a1bc <iprintf>
              (q->len >= sizeof(struct udp_hdr)));
  /* q now represents the packet to be sent */
  udphdr = (struct udp_hdr *)q->payload;
 8021d62:	69fb      	ldr	r3, [r7, #28]
 8021d64:	685b      	ldr	r3, [r3, #4]
 8021d66:	617b      	str	r3, [r7, #20]
  udphdr->src = lwip_htons(pcb->local_port);
 8021d68:	68fb      	ldr	r3, [r7, #12]
 8021d6a:	8a5b      	ldrh	r3, [r3, #18]
 8021d6c:	4618      	mov	r0, r3
 8021d6e:	f7f7 facb 	bl	8019308 <lwip_htons>
 8021d72:	4603      	mov	r3, r0
 8021d74:	461a      	mov	r2, r3
 8021d76:	697b      	ldr	r3, [r7, #20]
 8021d78:	801a      	strh	r2, [r3, #0]
  udphdr->dest = lwip_htons(dst_port);
 8021d7a:	887b      	ldrh	r3, [r7, #2]
 8021d7c:	4618      	mov	r0, r3
 8021d7e:	f7f7 fac3 	bl	8019308 <lwip_htons>
 8021d82:	4603      	mov	r3, r0
 8021d84:	461a      	mov	r2, r3
 8021d86:	697b      	ldr	r3, [r7, #20]
 8021d88:	805a      	strh	r2, [r3, #2]
  /* in UDP, 0 checksum means 'no checksum' */
  udphdr->chksum = 0x0000;
 8021d8a:	697b      	ldr	r3, [r7, #20]
 8021d8c:	2200      	movs	r2, #0
 8021d8e:	719a      	strb	r2, [r3, #6]
 8021d90:	2200      	movs	r2, #0
 8021d92:	71da      	strb	r2, [r3, #7]
    ip_proto = IP_PROTO_UDPLITE;
  } else
#endif /* LWIP_UDPLITE */
  {      /* UDP */
    LWIP_DEBUGF(UDP_DEBUG, ("udp_send: UDP packet length %"U16_F"\n", q->tot_len));
    udphdr->len = lwip_htons(q->tot_len);
 8021d94:	69fb      	ldr	r3, [r7, #28]
 8021d96:	891b      	ldrh	r3, [r3, #8]
 8021d98:	4618      	mov	r0, r3
 8021d9a:	f7f7 fab5 	bl	8019308 <lwip_htons>
 8021d9e:	4603      	mov	r3, r0
 8021da0:	461a      	mov	r2, r3
 8021da2:	697b      	ldr	r3, [r7, #20]
 8021da4:	809a      	strh	r2, [r3, #4]
        }
        udphdr->chksum = udpchksum;
      }
    }
#endif /* CHECKSUM_GEN_UDP */
    ip_proto = IP_PROTO_UDP;
 8021da6:	2311      	movs	r3, #17
 8021da8:	74fb      	strb	r3, [r7, #19]

  /* Determine TTL to use */
#if LWIP_MULTICAST_TX_OPTIONS
  ttl = (ip_addr_ismulticast(dst_ip) ? udp_get_multicast_ttl(pcb) : pcb->ttl);
#else /* LWIP_MULTICAST_TX_OPTIONS */
  ttl = pcb->ttl;
 8021daa:	68fb      	ldr	r3, [r7, #12]
 8021dac:	7adb      	ldrb	r3, [r3, #11]
 8021dae:	74bb      	strb	r3, [r7, #18]

  LWIP_DEBUGF(UDP_DEBUG, ("udp_send: UDP checksum 0x%04"X16_F"\n", udphdr->chksum));
  LWIP_DEBUGF(UDP_DEBUG, ("udp_send: ip_output_if (,,,,0x%02"X16_F",)\n", (u16_t)ip_proto));
  /* output to IP */
  NETIF_SET_HINTS(netif, &(pcb->netif_hints));
  err = ip_output_if_src(q, src_ip, dst_ip, ttl, pcb->tos, ip_proto, netif);
 8021db0:	68fb      	ldr	r3, [r7, #12]
 8021db2:	7a9b      	ldrb	r3, [r3, #10]
 8021db4:	7cb9      	ldrb	r1, [r7, #18]
 8021db6:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 8021db8:	9202      	str	r2, [sp, #8]
 8021dba:	7cfa      	ldrb	r2, [r7, #19]
 8021dbc:	9201      	str	r2, [sp, #4]
 8021dbe:	9300      	str	r3, [sp, #0]
 8021dc0:	460b      	mov	r3, r1
 8021dc2:	687a      	ldr	r2, [r7, #4]
 8021dc4:	6af9      	ldr	r1, [r7, #44]	@ 0x2c
 8021dc6:	69f8      	ldr	r0, [r7, #28]
 8021dc8:	f003 fbf2 	bl	80255b0 <ip4_output_if_src>
 8021dcc:	4603      	mov	r3, r0
 8021dce:	76fb      	strb	r3, [r7, #27]

  /* @todo: must this be increased even if error occurred? */
  MIB2_STATS_INC(mib2.udpoutdatagrams);

  /* did we chain a separate header pbuf earlier? */
  if (q != p) {
 8021dd0:	69fa      	ldr	r2, [r7, #28]
 8021dd2:	68bb      	ldr	r3, [r7, #8]
 8021dd4:	429a      	cmp	r2, r3
 8021dd6:	d004      	beq.n	8021de2 <udp_sendto_if_src+0x1a2>
    /* free the header pbuf */
    pbuf_free(q);
 8021dd8:	69f8      	ldr	r0, [r7, #28]
 8021dda:	f7f8 ff77 	bl	801accc <pbuf_free>
    q = NULL;
 8021dde:	2300      	movs	r3, #0
 8021de0:	61fb      	str	r3, [r7, #28]
    /* p is still referenced by the caller, and will live on */
  }

  UDP_STATS_INC(udp.xmit);
  return err;
 8021de2:	f997 301b 	ldrsb.w	r3, [r7, #27]
}
 8021de6:	4618      	mov	r0, r3
 8021de8:	3720      	adds	r7, #32
 8021dea:	46bd      	mov	sp, r7
 8021dec:	bd80      	pop	{r7, pc}
 8021dee:	bf00      	nop
 8021df0:	08030384 	.word	0x08030384
 8021df4:	08030570 	.word	0x08030570
 8021df8:	080303d8 	.word	0x080303d8
 8021dfc:	08030590 	.word	0x08030590
 8021e00:	080305b0 	.word	0x080305b0
 8021e04:	080305d4 	.word	0x080305d4
 8021e08:	080305f8 	.word	0x080305f8
 8021e0c:	0803061c 	.word	0x0803061c

08021e10 <udp_bind>:
 *
 * @see udp_disconnect()
 */
err_t
udp_bind(struct udp_pcb *pcb, const ip_addr_t *ipaddr, u16_t port)
{
 8021e10:	b580      	push	{r7, lr}
 8021e12:	b086      	sub	sp, #24
 8021e14:	af00      	add	r7, sp, #0
 8021e16:	60f8      	str	r0, [r7, #12]
 8021e18:	60b9      	str	r1, [r7, #8]
 8021e1a:	4613      	mov	r3, r2
 8021e1c:	80fb      	strh	r3, [r7, #6]
  u8_t rebind;
#if LWIP_IPV6 && LWIP_IPV6_SCOPES
  ip_addr_t zoned_ipaddr;
#endif /* LWIP_IPV6 && LWIP_IPV6_SCOPES */

  LWIP_ASSERT_CORE_LOCKED();
 8021e1e:	f7ee fe2d 	bl	8010a7c <sys_check_core_locking>

#if LWIP_IPV4
  /* Don't propagate NULL pointer (IPv4 ANY) to subsequent functions */
  if (ipaddr == NULL) {
 8021e22:	68bb      	ldr	r3, [r7, #8]
 8021e24:	2b00      	cmp	r3, #0
 8021e26:	d101      	bne.n	8021e2c <udp_bind+0x1c>
    ipaddr = IP4_ADDR_ANY;
 8021e28:	4b39      	ldr	r3, [pc, #228]	@ (8021f10 <udp_bind+0x100>)
 8021e2a:	60bb      	str	r3, [r7, #8]
  }
#else /* LWIP_IPV4 */
  LWIP_ERROR("udp_bind: invalid ipaddr", ipaddr != NULL, return ERR_ARG);
#endif /* LWIP_IPV4 */

  LWIP_ERROR("udp_bind: invalid pcb", pcb != NULL, return ERR_ARG);
 8021e2c:	68fb      	ldr	r3, [r7, #12]
 8021e2e:	2b00      	cmp	r3, #0
 8021e30:	d109      	bne.n	8021e46 <udp_bind+0x36>
 8021e32:	4b38      	ldr	r3, [pc, #224]	@ (8021f14 <udp_bind+0x104>)
 8021e34:	f240 32b7 	movw	r2, #951	@ 0x3b7
 8021e38:	4937      	ldr	r1, [pc, #220]	@ (8021f18 <udp_bind+0x108>)
 8021e3a:	4838      	ldr	r0, [pc, #224]	@ (8021f1c <udp_bind+0x10c>)
 8021e3c:	f008 f9be 	bl	802a1bc <iprintf>
 8021e40:	f06f 030f 	mvn.w	r3, #15
 8021e44:	e060      	b.n	8021f08 <udp_bind+0xf8>

  LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE, ("udp_bind(ipaddr = "));
  ip_addr_debug_print(UDP_DEBUG | LWIP_DBG_TRACE, ipaddr);
  LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE, (", port = %"U16_F")\n", port));

  rebind = 0;
 8021e46:	2300      	movs	r3, #0
 8021e48:	74fb      	strb	r3, [r7, #19]
  /* Check for double bind and rebind of the same pcb */
  for (ipcb = udp_pcbs; ipcb != NULL; ipcb = ipcb->next) {
 8021e4a:	4b35      	ldr	r3, [pc, #212]	@ (8021f20 <udp_bind+0x110>)
 8021e4c:	681b      	ldr	r3, [r3, #0]
 8021e4e:	617b      	str	r3, [r7, #20]
 8021e50:	e009      	b.n	8021e66 <udp_bind+0x56>
    /* is this UDP PCB already on active list? */
    if (pcb == ipcb) {
 8021e52:	68fa      	ldr	r2, [r7, #12]
 8021e54:	697b      	ldr	r3, [r7, #20]
 8021e56:	429a      	cmp	r2, r3
 8021e58:	d102      	bne.n	8021e60 <udp_bind+0x50>
      rebind = 1;
 8021e5a:	2301      	movs	r3, #1
 8021e5c:	74fb      	strb	r3, [r7, #19]
      break;
 8021e5e:	e005      	b.n	8021e6c <udp_bind+0x5c>
  for (ipcb = udp_pcbs; ipcb != NULL; ipcb = ipcb->next) {
 8021e60:	697b      	ldr	r3, [r7, #20]
 8021e62:	68db      	ldr	r3, [r3, #12]
 8021e64:	617b      	str	r3, [r7, #20]
 8021e66:	697b      	ldr	r3, [r7, #20]
 8021e68:	2b00      	cmp	r3, #0
 8021e6a:	d1f2      	bne.n	8021e52 <udp_bind+0x42>
    ipaddr = &zoned_ipaddr;
  }
#endif /* LWIP_IPV6 && LWIP_IPV6_SCOPES */

  /* no port specified? */
  if (port == 0) {
 8021e6c:	88fb      	ldrh	r3, [r7, #6]
 8021e6e:	2b00      	cmp	r3, #0
 8021e70:	d109      	bne.n	8021e86 <udp_bind+0x76>
    port = udp_new_port();
 8021e72:	f7ff fc2f 	bl	80216d4 <udp_new_port>
 8021e76:	4603      	mov	r3, r0
 8021e78:	80fb      	strh	r3, [r7, #6]
    if (port == 0) {
 8021e7a:	88fb      	ldrh	r3, [r7, #6]
 8021e7c:	2b00      	cmp	r3, #0
 8021e7e:	d12c      	bne.n	8021eda <udp_bind+0xca>
      /* no more ports available in local range */
      LWIP_DEBUGF(UDP_DEBUG, ("udp_bind: out of free UDP ports\n"));
      return ERR_USE;
 8021e80:	f06f 0307 	mvn.w	r3, #7
 8021e84:	e040      	b.n	8021f08 <udp_bind+0xf8>
    }
  } else {
    for (ipcb = udp_pcbs; ipcb != NULL; ipcb = ipcb->next) {
 8021e86:	4b26      	ldr	r3, [pc, #152]	@ (8021f20 <udp_bind+0x110>)
 8021e88:	681b      	ldr	r3, [r3, #0]
 8021e8a:	617b      	str	r3, [r7, #20]
 8021e8c:	e022      	b.n	8021ed4 <udp_bind+0xc4>
      if (pcb != ipcb) {
 8021e8e:	68fa      	ldr	r2, [r7, #12]
 8021e90:	697b      	ldr	r3, [r7, #20]
 8021e92:	429a      	cmp	r2, r3
 8021e94:	d01b      	beq.n	8021ece <udp_bind+0xbe>
        if (!ip_get_option(pcb, SOF_REUSEADDR) ||
            !ip_get_option(ipcb, SOF_REUSEADDR))
#endif /* SO_REUSE */
        {
          /* port matches that of PCB in list and REUSEADDR not set -> reject */
          if ((ipcb->local_port == port) &&
 8021e96:	697b      	ldr	r3, [r7, #20]
 8021e98:	8a5b      	ldrh	r3, [r3, #18]
 8021e9a:	88fa      	ldrh	r2, [r7, #6]
 8021e9c:	429a      	cmp	r2, r3
 8021e9e:	d116      	bne.n	8021ece <udp_bind+0xbe>
              /* IP address matches or any IP used? */
              (ip_addr_cmp(&ipcb->local_ip, ipaddr) || ip_addr_isany(ipaddr) ||
 8021ea0:	697b      	ldr	r3, [r7, #20]
 8021ea2:	681a      	ldr	r2, [r3, #0]
 8021ea4:	68bb      	ldr	r3, [r7, #8]
 8021ea6:	681b      	ldr	r3, [r3, #0]
          if ((ipcb->local_port == port) &&
 8021ea8:	429a      	cmp	r2, r3
 8021eaa:	d00d      	beq.n	8021ec8 <udp_bind+0xb8>
              (ip_addr_cmp(&ipcb->local_ip, ipaddr) || ip_addr_isany(ipaddr) ||
 8021eac:	68bb      	ldr	r3, [r7, #8]
 8021eae:	2b00      	cmp	r3, #0
 8021eb0:	d00a      	beq.n	8021ec8 <udp_bind+0xb8>
 8021eb2:	68bb      	ldr	r3, [r7, #8]
 8021eb4:	681b      	ldr	r3, [r3, #0]
 8021eb6:	2b00      	cmp	r3, #0
 8021eb8:	d006      	beq.n	8021ec8 <udp_bind+0xb8>
              ip_addr_isany(&ipcb->local_ip))) {
 8021eba:	697b      	ldr	r3, [r7, #20]
              (ip_addr_cmp(&ipcb->local_ip, ipaddr) || ip_addr_isany(ipaddr) ||
 8021ebc:	2b00      	cmp	r3, #0
 8021ebe:	d003      	beq.n	8021ec8 <udp_bind+0xb8>
              ip_addr_isany(&ipcb->local_ip))) {
 8021ec0:	697b      	ldr	r3, [r7, #20]
 8021ec2:	681b      	ldr	r3, [r3, #0]
 8021ec4:	2b00      	cmp	r3, #0
 8021ec6:	d102      	bne.n	8021ece <udp_bind+0xbe>
            /* other PCB already binds to this local IP and port */
            LWIP_DEBUGF(UDP_DEBUG,
                        ("udp_bind: local port %"U16_F" already bound by another pcb\n", port));
            return ERR_USE;
 8021ec8:	f06f 0307 	mvn.w	r3, #7
 8021ecc:	e01c      	b.n	8021f08 <udp_bind+0xf8>
    for (ipcb = udp_pcbs; ipcb != NULL; ipcb = ipcb->next) {
 8021ece:	697b      	ldr	r3, [r7, #20]
 8021ed0:	68db      	ldr	r3, [r3, #12]
 8021ed2:	617b      	str	r3, [r7, #20]
 8021ed4:	697b      	ldr	r3, [r7, #20]
 8021ed6:	2b00      	cmp	r3, #0
 8021ed8:	d1d9      	bne.n	8021e8e <udp_bind+0x7e>
        }
      }
    }
  }

  ip_addr_set_ipaddr(&pcb->local_ip, ipaddr);
 8021eda:	68bb      	ldr	r3, [r7, #8]
 8021edc:	2b00      	cmp	r3, #0
 8021ede:	d002      	beq.n	8021ee6 <udp_bind+0xd6>
 8021ee0:	68bb      	ldr	r3, [r7, #8]
 8021ee2:	681b      	ldr	r3, [r3, #0]
 8021ee4:	e000      	b.n	8021ee8 <udp_bind+0xd8>
 8021ee6:	2300      	movs	r3, #0
 8021ee8:	68fa      	ldr	r2, [r7, #12]
 8021eea:	6013      	str	r3, [r2, #0]

  pcb->local_port = port;
 8021eec:	68fb      	ldr	r3, [r7, #12]
 8021eee:	88fa      	ldrh	r2, [r7, #6]
 8021ef0:	825a      	strh	r2, [r3, #18]
  mib2_udp_bind(pcb);
  /* pcb not active yet? */
  if (rebind == 0) {
 8021ef2:	7cfb      	ldrb	r3, [r7, #19]
 8021ef4:	2b00      	cmp	r3, #0
 8021ef6:	d106      	bne.n	8021f06 <udp_bind+0xf6>
    /* place the PCB on the active list if not already there */
    pcb->next = udp_pcbs;
 8021ef8:	4b09      	ldr	r3, [pc, #36]	@ (8021f20 <udp_bind+0x110>)
 8021efa:	681a      	ldr	r2, [r3, #0]
 8021efc:	68fb      	ldr	r3, [r7, #12]
 8021efe:	60da      	str	r2, [r3, #12]
    udp_pcbs = pcb;
 8021f00:	4a07      	ldr	r2, [pc, #28]	@ (8021f20 <udp_bind+0x110>)
 8021f02:	68fb      	ldr	r3, [r7, #12]
 8021f04:	6013      	str	r3, [r2, #0]
  }
  LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("udp_bind: bound to "));
  ip_addr_debug_print_val(UDP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, pcb->local_ip);
  LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, (", port %"U16_F")\n", pcb->local_port));
  return ERR_OK;
 8021f06:	2300      	movs	r3, #0
}
 8021f08:	4618      	mov	r0, r3
 8021f0a:	3718      	adds	r7, #24
 8021f0c:	46bd      	mov	sp, r7
 8021f0e:	bd80      	pop	{r7, pc}
 8021f10:	080314f4 	.word	0x080314f4
 8021f14:	08030384 	.word	0x08030384
 8021f18:	0803064c 	.word	0x0803064c
 8021f1c:	080303d8 	.word	0x080303d8
 8021f20:	2402afb8 	.word	0x2402afb8

08021f24 <udp_connect>:
 *
 * @see udp_disconnect()
 */
err_t
udp_connect(struct udp_pcb *pcb, const ip_addr_t *ipaddr, u16_t port)
{
 8021f24:	b580      	push	{r7, lr}
 8021f26:	b086      	sub	sp, #24
 8021f28:	af00      	add	r7, sp, #0
 8021f2a:	60f8      	str	r0, [r7, #12]
 8021f2c:	60b9      	str	r1, [r7, #8]
 8021f2e:	4613      	mov	r3, r2
 8021f30:	80fb      	strh	r3, [r7, #6]
  struct udp_pcb *ipcb;

  LWIP_ASSERT_CORE_LOCKED();
 8021f32:	f7ee fda3 	bl	8010a7c <sys_check_core_locking>

  LWIP_ERROR("udp_connect: invalid pcb", pcb != NULL, return ERR_ARG);
 8021f36:	68fb      	ldr	r3, [r7, #12]
 8021f38:	2b00      	cmp	r3, #0
 8021f3a:	d109      	bne.n	8021f50 <udp_connect+0x2c>
 8021f3c:	4b2c      	ldr	r3, [pc, #176]	@ (8021ff0 <udp_connect+0xcc>)
 8021f3e:	f240 4235 	movw	r2, #1077	@ 0x435
 8021f42:	492c      	ldr	r1, [pc, #176]	@ (8021ff4 <udp_connect+0xd0>)
 8021f44:	482c      	ldr	r0, [pc, #176]	@ (8021ff8 <udp_connect+0xd4>)
 8021f46:	f008 f939 	bl	802a1bc <iprintf>
 8021f4a:	f06f 030f 	mvn.w	r3, #15
 8021f4e:	e04b      	b.n	8021fe8 <udp_connect+0xc4>
  LWIP_ERROR("udp_connect: invalid ipaddr", ipaddr != NULL, return ERR_ARG);
 8021f50:	68bb      	ldr	r3, [r7, #8]
 8021f52:	2b00      	cmp	r3, #0
 8021f54:	d109      	bne.n	8021f6a <udp_connect+0x46>
 8021f56:	4b26      	ldr	r3, [pc, #152]	@ (8021ff0 <udp_connect+0xcc>)
 8021f58:	f240 4236 	movw	r2, #1078	@ 0x436
 8021f5c:	4927      	ldr	r1, [pc, #156]	@ (8021ffc <udp_connect+0xd8>)
 8021f5e:	4826      	ldr	r0, [pc, #152]	@ (8021ff8 <udp_connect+0xd4>)
 8021f60:	f008 f92c 	bl	802a1bc <iprintf>
 8021f64:	f06f 030f 	mvn.w	r3, #15
 8021f68:	e03e      	b.n	8021fe8 <udp_connect+0xc4>

  if (pcb->local_port == 0) {
 8021f6a:	68fb      	ldr	r3, [r7, #12]
 8021f6c:	8a5b      	ldrh	r3, [r3, #18]
 8021f6e:	2b00      	cmp	r3, #0
 8021f70:	d10f      	bne.n	8021f92 <udp_connect+0x6e>
    err_t err = udp_bind(pcb, &pcb->local_ip, pcb->local_port);
 8021f72:	68f9      	ldr	r1, [r7, #12]
 8021f74:	68fb      	ldr	r3, [r7, #12]
 8021f76:	8a5b      	ldrh	r3, [r3, #18]
 8021f78:	461a      	mov	r2, r3
 8021f7a:	68f8      	ldr	r0, [r7, #12]
 8021f7c:	f7ff ff48 	bl	8021e10 <udp_bind>
 8021f80:	4603      	mov	r3, r0
 8021f82:	75fb      	strb	r3, [r7, #23]
    if (err != ERR_OK) {
 8021f84:	f997 3017 	ldrsb.w	r3, [r7, #23]
 8021f88:	2b00      	cmp	r3, #0
 8021f8a:	d002      	beq.n	8021f92 <udp_connect+0x6e>
      return err;
 8021f8c:	f997 3017 	ldrsb.w	r3, [r7, #23]
 8021f90:	e02a      	b.n	8021fe8 <udp_connect+0xc4>
    }
  }

  ip_addr_set_ipaddr(&pcb->remote_ip, ipaddr);
 8021f92:	68bb      	ldr	r3, [r7, #8]
 8021f94:	2b00      	cmp	r3, #0
 8021f96:	d002      	beq.n	8021f9e <udp_connect+0x7a>
 8021f98:	68bb      	ldr	r3, [r7, #8]
 8021f9a:	681b      	ldr	r3, [r3, #0]
 8021f9c:	e000      	b.n	8021fa0 <udp_connect+0x7c>
 8021f9e:	2300      	movs	r3, #0
 8021fa0:	68fa      	ldr	r2, [r7, #12]
 8021fa2:	6053      	str	r3, [r2, #4]
      ip6_addr_lacks_zone(ip_2_ip6(&pcb->remote_ip), IP6_UNKNOWN)) {
    ip6_addr_select_zone(ip_2_ip6(&pcb->remote_ip), ip_2_ip6(&pcb->local_ip));
  }
#endif /* LWIP_IPV6 && LWIP_IPV6_SCOPES */

  pcb->remote_port = port;
 8021fa4:	68fb      	ldr	r3, [r7, #12]
 8021fa6:	88fa      	ldrh	r2, [r7, #6]
 8021fa8:	829a      	strh	r2, [r3, #20]
  pcb->flags |= UDP_FLAGS_CONNECTED;
 8021faa:	68fb      	ldr	r3, [r7, #12]
 8021fac:	7c1b      	ldrb	r3, [r3, #16]
 8021fae:	f043 0304 	orr.w	r3, r3, #4
 8021fb2:	b2da      	uxtb	r2, r3
 8021fb4:	68fb      	ldr	r3, [r7, #12]
 8021fb6:	741a      	strb	r2, [r3, #16]
  ip_addr_debug_print_val(UDP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE,
                          pcb->remote_ip);
  LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, (", port %"U16_F")\n", pcb->remote_port));

  /* Insert UDP PCB into the list of active UDP PCBs. */
  for (ipcb = udp_pcbs; ipcb != NULL; ipcb = ipcb->next) {
 8021fb8:	4b11      	ldr	r3, [pc, #68]	@ (8022000 <udp_connect+0xdc>)
 8021fba:	681b      	ldr	r3, [r3, #0]
 8021fbc:	613b      	str	r3, [r7, #16]
 8021fbe:	e008      	b.n	8021fd2 <udp_connect+0xae>
    if (pcb == ipcb) {
 8021fc0:	68fa      	ldr	r2, [r7, #12]
 8021fc2:	693b      	ldr	r3, [r7, #16]
 8021fc4:	429a      	cmp	r2, r3
 8021fc6:	d101      	bne.n	8021fcc <udp_connect+0xa8>
      /* already on the list, just return */
      return ERR_OK;
 8021fc8:	2300      	movs	r3, #0
 8021fca:	e00d      	b.n	8021fe8 <udp_connect+0xc4>
  for (ipcb = udp_pcbs; ipcb != NULL; ipcb = ipcb->next) {
 8021fcc:	693b      	ldr	r3, [r7, #16]
 8021fce:	68db      	ldr	r3, [r3, #12]
 8021fd0:	613b      	str	r3, [r7, #16]
 8021fd2:	693b      	ldr	r3, [r7, #16]
 8021fd4:	2b00      	cmp	r3, #0
 8021fd6:	d1f3      	bne.n	8021fc0 <udp_connect+0x9c>
    }
  }
  /* PCB not yet on the list, add PCB now */
  pcb->next = udp_pcbs;
 8021fd8:	4b09      	ldr	r3, [pc, #36]	@ (8022000 <udp_connect+0xdc>)
 8021fda:	681a      	ldr	r2, [r3, #0]
 8021fdc:	68fb      	ldr	r3, [r7, #12]
 8021fde:	60da      	str	r2, [r3, #12]
  udp_pcbs = pcb;
 8021fe0:	4a07      	ldr	r2, [pc, #28]	@ (8022000 <udp_connect+0xdc>)
 8021fe2:	68fb      	ldr	r3, [r7, #12]
 8021fe4:	6013      	str	r3, [r2, #0]
  return ERR_OK;
 8021fe6:	2300      	movs	r3, #0
}
 8021fe8:	4618      	mov	r0, r3
 8021fea:	3718      	adds	r7, #24
 8021fec:	46bd      	mov	sp, r7
 8021fee:	bd80      	pop	{r7, pc}
 8021ff0:	08030384 	.word	0x08030384
 8021ff4:	08030664 	.word	0x08030664
 8021ff8:	080303d8 	.word	0x080303d8
 8021ffc:	08030680 	.word	0x08030680
 8022000:	2402afb8 	.word	0x2402afb8

08022004 <udp_disconnect>:
 *
 * @param pcb the udp pcb to disconnect.
 */
void
udp_disconnect(struct udp_pcb *pcb)
{
 8022004:	b580      	push	{r7, lr}
 8022006:	b082      	sub	sp, #8
 8022008:	af00      	add	r7, sp, #0
 802200a:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT_CORE_LOCKED();
 802200c:	f7ee fd36 	bl	8010a7c <sys_check_core_locking>

  LWIP_ERROR("udp_disconnect: invalid pcb", pcb != NULL, return);
 8022010:	687b      	ldr	r3, [r7, #4]
 8022012:	2b00      	cmp	r3, #0
 8022014:	d107      	bne.n	8022026 <udp_disconnect+0x22>
 8022016:	4b0d      	ldr	r3, [pc, #52]	@ (802204c <udp_disconnect+0x48>)
 8022018:	f240 426a 	movw	r2, #1130	@ 0x46a
 802201c:	490c      	ldr	r1, [pc, #48]	@ (8022050 <udp_disconnect+0x4c>)
 802201e:	480d      	ldr	r0, [pc, #52]	@ (8022054 <udp_disconnect+0x50>)
 8022020:	f008 f8cc 	bl	802a1bc <iprintf>
 8022024:	e00f      	b.n	8022046 <udp_disconnect+0x42>
#if LWIP_IPV4 && LWIP_IPV6
  if (IP_IS_ANY_TYPE_VAL(pcb->local_ip)) {
    ip_addr_copy(pcb->remote_ip, *IP_ANY_TYPE);
  } else {
#endif
    ip_addr_set_any(IP_IS_V6_VAL(pcb->remote_ip), &pcb->remote_ip);
 8022026:	687b      	ldr	r3, [r7, #4]
 8022028:	2200      	movs	r2, #0
 802202a:	605a      	str	r2, [r3, #4]
#if LWIP_IPV4 && LWIP_IPV6
  }
#endif
  pcb->remote_port = 0;
 802202c:	687b      	ldr	r3, [r7, #4]
 802202e:	2200      	movs	r2, #0
 8022030:	829a      	strh	r2, [r3, #20]
  pcb->netif_idx = NETIF_NO_INDEX;
 8022032:	687b      	ldr	r3, [r7, #4]
 8022034:	2200      	movs	r2, #0
 8022036:	721a      	strb	r2, [r3, #8]
  /* mark PCB as unconnected */
  udp_clear_flags(pcb, UDP_FLAGS_CONNECTED);
 8022038:	687b      	ldr	r3, [r7, #4]
 802203a:	7c1b      	ldrb	r3, [r3, #16]
 802203c:	f023 0304 	bic.w	r3, r3, #4
 8022040:	b2da      	uxtb	r2, r3
 8022042:	687b      	ldr	r3, [r7, #4]
 8022044:	741a      	strb	r2, [r3, #16]
}
 8022046:	3708      	adds	r7, #8
 8022048:	46bd      	mov	sp, r7
 802204a:	bd80      	pop	{r7, pc}
 802204c:	08030384 	.word	0x08030384
 8022050:	0803069c 	.word	0x0803069c
 8022054:	080303d8 	.word	0x080303d8

08022058 <udp_recv>:
 * @param recv function pointer of the callback function
 * @param recv_arg additional argument to pass to the callback function
 */
void
udp_recv(struct udp_pcb *pcb, udp_recv_fn recv, void *recv_arg)
{
 8022058:	b580      	push	{r7, lr}
 802205a:	b084      	sub	sp, #16
 802205c:	af00      	add	r7, sp, #0
 802205e:	60f8      	str	r0, [r7, #12]
 8022060:	60b9      	str	r1, [r7, #8]
 8022062:	607a      	str	r2, [r7, #4]
  LWIP_ASSERT_CORE_LOCKED();
 8022064:	f7ee fd0a 	bl	8010a7c <sys_check_core_locking>

  LWIP_ERROR("udp_recv: invalid pcb", pcb != NULL, return);
 8022068:	68fb      	ldr	r3, [r7, #12]
 802206a:	2b00      	cmp	r3, #0
 802206c:	d107      	bne.n	802207e <udp_recv+0x26>
 802206e:	4b08      	ldr	r3, [pc, #32]	@ (8022090 <udp_recv+0x38>)
 8022070:	f240 428a 	movw	r2, #1162	@ 0x48a
 8022074:	4907      	ldr	r1, [pc, #28]	@ (8022094 <udp_recv+0x3c>)
 8022076:	4808      	ldr	r0, [pc, #32]	@ (8022098 <udp_recv+0x40>)
 8022078:	f008 f8a0 	bl	802a1bc <iprintf>
 802207c:	e005      	b.n	802208a <udp_recv+0x32>

  /* remember recv() callback and user data */
  pcb->recv = recv;
 802207e:	68fb      	ldr	r3, [r7, #12]
 8022080:	68ba      	ldr	r2, [r7, #8]
 8022082:	619a      	str	r2, [r3, #24]
  pcb->recv_arg = recv_arg;
 8022084:	68fb      	ldr	r3, [r7, #12]
 8022086:	687a      	ldr	r2, [r7, #4]
 8022088:	61da      	str	r2, [r3, #28]
}
 802208a:	3710      	adds	r7, #16
 802208c:	46bd      	mov	sp, r7
 802208e:	bd80      	pop	{r7, pc}
 8022090:	08030384 	.word	0x08030384
 8022094:	080306b8 	.word	0x080306b8
 8022098:	080303d8 	.word	0x080303d8

0802209c <udp_remove>:
 *
 * @see udp_new()
 */
void
udp_remove(struct udp_pcb *pcb)
{
 802209c:	b580      	push	{r7, lr}
 802209e:	b084      	sub	sp, #16
 80220a0:	af00      	add	r7, sp, #0
 80220a2:	6078      	str	r0, [r7, #4]
  struct udp_pcb *pcb2;

  LWIP_ASSERT_CORE_LOCKED();
 80220a4:	f7ee fcea 	bl	8010a7c <sys_check_core_locking>

  LWIP_ERROR("udp_remove: invalid pcb", pcb != NULL, return);
 80220a8:	687b      	ldr	r3, [r7, #4]
 80220aa:	2b00      	cmp	r3, #0
 80220ac:	d107      	bne.n	80220be <udp_remove+0x22>
 80220ae:	4b19      	ldr	r3, [pc, #100]	@ (8022114 <udp_remove+0x78>)
 80220b0:	f240 42a1 	movw	r2, #1185	@ 0x4a1
 80220b4:	4918      	ldr	r1, [pc, #96]	@ (8022118 <udp_remove+0x7c>)
 80220b6:	4819      	ldr	r0, [pc, #100]	@ (802211c <udp_remove+0x80>)
 80220b8:	f008 f880 	bl	802a1bc <iprintf>
 80220bc:	e026      	b.n	802210c <udp_remove+0x70>

  mib2_udp_unbind(pcb);
  /* pcb to be removed is first in list? */
  if (udp_pcbs == pcb) {
 80220be:	4b18      	ldr	r3, [pc, #96]	@ (8022120 <udp_remove+0x84>)
 80220c0:	681b      	ldr	r3, [r3, #0]
 80220c2:	687a      	ldr	r2, [r7, #4]
 80220c4:	429a      	cmp	r2, r3
 80220c6:	d105      	bne.n	80220d4 <udp_remove+0x38>
    /* make list start at 2nd pcb */
    udp_pcbs = udp_pcbs->next;
 80220c8:	4b15      	ldr	r3, [pc, #84]	@ (8022120 <udp_remove+0x84>)
 80220ca:	681b      	ldr	r3, [r3, #0]
 80220cc:	68db      	ldr	r3, [r3, #12]
 80220ce:	4a14      	ldr	r2, [pc, #80]	@ (8022120 <udp_remove+0x84>)
 80220d0:	6013      	str	r3, [r2, #0]
 80220d2:	e017      	b.n	8022104 <udp_remove+0x68>
    /* pcb not 1st in list */
  } else {
    for (pcb2 = udp_pcbs; pcb2 != NULL; pcb2 = pcb2->next) {
 80220d4:	4b12      	ldr	r3, [pc, #72]	@ (8022120 <udp_remove+0x84>)
 80220d6:	681b      	ldr	r3, [r3, #0]
 80220d8:	60fb      	str	r3, [r7, #12]
 80220da:	e010      	b.n	80220fe <udp_remove+0x62>
      /* find pcb in udp_pcbs list */
      if (pcb2->next != NULL && pcb2->next == pcb) {
 80220dc:	68fb      	ldr	r3, [r7, #12]
 80220de:	68db      	ldr	r3, [r3, #12]
 80220e0:	2b00      	cmp	r3, #0
 80220e2:	d009      	beq.n	80220f8 <udp_remove+0x5c>
 80220e4:	68fb      	ldr	r3, [r7, #12]
 80220e6:	68db      	ldr	r3, [r3, #12]
 80220e8:	687a      	ldr	r2, [r7, #4]
 80220ea:	429a      	cmp	r2, r3
 80220ec:	d104      	bne.n	80220f8 <udp_remove+0x5c>
        /* remove pcb from list */
        pcb2->next = pcb->next;
 80220ee:	687b      	ldr	r3, [r7, #4]
 80220f0:	68da      	ldr	r2, [r3, #12]
 80220f2:	68fb      	ldr	r3, [r7, #12]
 80220f4:	60da      	str	r2, [r3, #12]
        break;
 80220f6:	e005      	b.n	8022104 <udp_remove+0x68>
    for (pcb2 = udp_pcbs; pcb2 != NULL; pcb2 = pcb2->next) {
 80220f8:	68fb      	ldr	r3, [r7, #12]
 80220fa:	68db      	ldr	r3, [r3, #12]
 80220fc:	60fb      	str	r3, [r7, #12]
 80220fe:	68fb      	ldr	r3, [r7, #12]
 8022100:	2b00      	cmp	r3, #0
 8022102:	d1eb      	bne.n	80220dc <udp_remove+0x40>
      }
    }
  }
  memp_free(MEMP_UDP_PCB, pcb);
 8022104:	6879      	ldr	r1, [r7, #4]
 8022106:	2000      	movs	r0, #0
 8022108:	f7f7 fef2 	bl	8019ef0 <memp_free>
}
 802210c:	3710      	adds	r7, #16
 802210e:	46bd      	mov	sp, r7
 8022110:	bd80      	pop	{r7, pc}
 8022112:	bf00      	nop
 8022114:	08030384 	.word	0x08030384
 8022118:	080306d0 	.word	0x080306d0
 802211c:	080303d8 	.word	0x080303d8
 8022120:	2402afb8 	.word	0x2402afb8

08022124 <udp_new>:
 *
 * @see udp_remove()
 */
struct udp_pcb *
udp_new(void)
{
 8022124:	b580      	push	{r7, lr}
 8022126:	b082      	sub	sp, #8
 8022128:	af00      	add	r7, sp, #0
  struct udp_pcb *pcb;

  LWIP_ASSERT_CORE_LOCKED();
 802212a:	f7ee fca7 	bl	8010a7c <sys_check_core_locking>

  pcb = (struct udp_pcb *)memp_malloc(MEMP_UDP_PCB);
 802212e:	2000      	movs	r0, #0
 8022130:	f7f7 fe68 	bl	8019e04 <memp_malloc>
 8022134:	6078      	str	r0, [r7, #4]
  /* could allocate UDP PCB? */
  if (pcb != NULL) {
 8022136:	687b      	ldr	r3, [r7, #4]
 8022138:	2b00      	cmp	r3, #0
 802213a:	d007      	beq.n	802214c <udp_new+0x28>
    /* UDP Lite: by initializing to all zeroes, chksum_len is set to 0
     * which means checksum is generated over the whole datagram per default
     * (recommended as default by RFC 3828). */
    /* initialize PCB to all zeroes */
    memset(pcb, 0, sizeof(struct udp_pcb));
 802213c:	2220      	movs	r2, #32
 802213e:	2100      	movs	r1, #0
 8022140:	6878      	ldr	r0, [r7, #4]
 8022142:	f008 f9cd 	bl	802a4e0 <memset>
    pcb->ttl = UDP_TTL;
 8022146:	687b      	ldr	r3, [r7, #4]
 8022148:	22ff      	movs	r2, #255	@ 0xff
 802214a:	72da      	strb	r2, [r3, #11]
#if LWIP_MULTICAST_TX_OPTIONS
    udp_set_multicast_ttl(pcb, UDP_TTL);
#endif /* LWIP_MULTICAST_TX_OPTIONS */
  }
  return pcb;
 802214c:	687b      	ldr	r3, [r7, #4]
}
 802214e:	4618      	mov	r0, r3
 8022150:	3708      	adds	r7, #8
 8022152:	46bd      	mov	sp, r7
 8022154:	bd80      	pop	{r7, pc}

08022156 <udp_new_ip_type>:
 *
 * @see udp_remove()
 */
struct udp_pcb *
udp_new_ip_type(u8_t type)
{
 8022156:	b580      	push	{r7, lr}
 8022158:	b084      	sub	sp, #16
 802215a:	af00      	add	r7, sp, #0
 802215c:	4603      	mov	r3, r0
 802215e:	71fb      	strb	r3, [r7, #7]
  struct udp_pcb *pcb;

  LWIP_ASSERT_CORE_LOCKED();
 8022160:	f7ee fc8c 	bl	8010a7c <sys_check_core_locking>

  pcb = udp_new();
 8022164:	f7ff ffde 	bl	8022124 <udp_new>
 8022168:	60f8      	str	r0, [r7, #12]
    IP_SET_TYPE_VAL(pcb->remote_ip, type);
  }
#else
  LWIP_UNUSED_ARG(type);
#endif /* LWIP_IPV4 && LWIP_IPV6 */
  return pcb;
 802216a:	68fb      	ldr	r3, [r7, #12]
}
 802216c:	4618      	mov	r0, r3
 802216e:	3710      	adds	r7, #16
 8022170:	46bd      	mov	sp, r7
 8022172:	bd80      	pop	{r7, pc}

08022174 <udp_netif_ip_addr_changed>:
 *
 * @param old_addr IP address of the netif before change
 * @param new_addr IP address of the netif after change
 */
void udp_netif_ip_addr_changed(const ip_addr_t *old_addr, const ip_addr_t *new_addr)
{
 8022174:	b480      	push	{r7}
 8022176:	b085      	sub	sp, #20
 8022178:	af00      	add	r7, sp, #0
 802217a:	6078      	str	r0, [r7, #4]
 802217c:	6039      	str	r1, [r7, #0]
  struct udp_pcb *upcb;

  if (!ip_addr_isany(old_addr) && !ip_addr_isany(new_addr)) {
 802217e:	687b      	ldr	r3, [r7, #4]
 8022180:	2b00      	cmp	r3, #0
 8022182:	d01e      	beq.n	80221c2 <udp_netif_ip_addr_changed+0x4e>
 8022184:	687b      	ldr	r3, [r7, #4]
 8022186:	681b      	ldr	r3, [r3, #0]
 8022188:	2b00      	cmp	r3, #0
 802218a:	d01a      	beq.n	80221c2 <udp_netif_ip_addr_changed+0x4e>
 802218c:	683b      	ldr	r3, [r7, #0]
 802218e:	2b00      	cmp	r3, #0
 8022190:	d017      	beq.n	80221c2 <udp_netif_ip_addr_changed+0x4e>
 8022192:	683b      	ldr	r3, [r7, #0]
 8022194:	681b      	ldr	r3, [r3, #0]
 8022196:	2b00      	cmp	r3, #0
 8022198:	d013      	beq.n	80221c2 <udp_netif_ip_addr_changed+0x4e>
    for (upcb = udp_pcbs; upcb != NULL; upcb = upcb->next) {
 802219a:	4b0d      	ldr	r3, [pc, #52]	@ (80221d0 <udp_netif_ip_addr_changed+0x5c>)
 802219c:	681b      	ldr	r3, [r3, #0]
 802219e:	60fb      	str	r3, [r7, #12]
 80221a0:	e00c      	b.n	80221bc <udp_netif_ip_addr_changed+0x48>
      /* PCB bound to current local interface address? */
      if (ip_addr_cmp(&upcb->local_ip, old_addr)) {
 80221a2:	68fb      	ldr	r3, [r7, #12]
 80221a4:	681a      	ldr	r2, [r3, #0]
 80221a6:	687b      	ldr	r3, [r7, #4]
 80221a8:	681b      	ldr	r3, [r3, #0]
 80221aa:	429a      	cmp	r2, r3
 80221ac:	d103      	bne.n	80221b6 <udp_netif_ip_addr_changed+0x42>
        /* The PCB is bound to the old ipaddr and
         * is set to bound to the new one instead */
        ip_addr_copy(upcb->local_ip, *new_addr);
 80221ae:	683b      	ldr	r3, [r7, #0]
 80221b0:	681a      	ldr	r2, [r3, #0]
 80221b2:	68fb      	ldr	r3, [r7, #12]
 80221b4:	601a      	str	r2, [r3, #0]
    for (upcb = udp_pcbs; upcb != NULL; upcb = upcb->next) {
 80221b6:	68fb      	ldr	r3, [r7, #12]
 80221b8:	68db      	ldr	r3, [r3, #12]
 80221ba:	60fb      	str	r3, [r7, #12]
 80221bc:	68fb      	ldr	r3, [r7, #12]
 80221be:	2b00      	cmp	r3, #0
 80221c0:	d1ef      	bne.n	80221a2 <udp_netif_ip_addr_changed+0x2e>
      }
    }
  }
}
 80221c2:	bf00      	nop
 80221c4:	3714      	adds	r7, #20
 80221c6:	46bd      	mov	sp, r7
 80221c8:	f85d 7b04 	ldr.w	r7, [sp], #4
 80221cc:	4770      	bx	lr
 80221ce:	bf00      	nop
 80221d0:	2402afb8 	.word	0x2402afb8

080221d4 <dhcp_inc_pcb_refcount>:
static void dhcp_option_trailer(u16_t options_out_len, u8_t *options, struct pbuf *p_out);

/** Ensure DHCP PCB is allocated and bound */
static err_t
dhcp_inc_pcb_refcount(void)
{
 80221d4:	b580      	push	{r7, lr}
 80221d6:	af00      	add	r7, sp, #0
  if (dhcp_pcb_refcount == 0) {
 80221d8:	4b20      	ldr	r3, [pc, #128]	@ (802225c <dhcp_inc_pcb_refcount+0x88>)
 80221da:	781b      	ldrb	r3, [r3, #0]
 80221dc:	2b00      	cmp	r3, #0
 80221de:	d133      	bne.n	8022248 <dhcp_inc_pcb_refcount+0x74>
    LWIP_ASSERT("dhcp_inc_pcb_refcount(): memory leak", dhcp_pcb == NULL);
 80221e0:	4b1f      	ldr	r3, [pc, #124]	@ (8022260 <dhcp_inc_pcb_refcount+0x8c>)
 80221e2:	681b      	ldr	r3, [r3, #0]
 80221e4:	2b00      	cmp	r3, #0
 80221e6:	d005      	beq.n	80221f4 <dhcp_inc_pcb_refcount+0x20>
 80221e8:	4b1e      	ldr	r3, [pc, #120]	@ (8022264 <dhcp_inc_pcb_refcount+0x90>)
 80221ea:	22e5      	movs	r2, #229	@ 0xe5
 80221ec:	491e      	ldr	r1, [pc, #120]	@ (8022268 <dhcp_inc_pcb_refcount+0x94>)
 80221ee:	481f      	ldr	r0, [pc, #124]	@ (802226c <dhcp_inc_pcb_refcount+0x98>)
 80221f0:	f007 ffe4 	bl	802a1bc <iprintf>

    /* allocate UDP PCB */
    dhcp_pcb = udp_new();
 80221f4:	f7ff ff96 	bl	8022124 <udp_new>
 80221f8:	4603      	mov	r3, r0
 80221fa:	4a19      	ldr	r2, [pc, #100]	@ (8022260 <dhcp_inc_pcb_refcount+0x8c>)
 80221fc:	6013      	str	r3, [r2, #0]

    if (dhcp_pcb == NULL) {
 80221fe:	4b18      	ldr	r3, [pc, #96]	@ (8022260 <dhcp_inc_pcb_refcount+0x8c>)
 8022200:	681b      	ldr	r3, [r3, #0]
 8022202:	2b00      	cmp	r3, #0
 8022204:	d102      	bne.n	802220c <dhcp_inc_pcb_refcount+0x38>
      return ERR_MEM;
 8022206:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 802220a:	e024      	b.n	8022256 <dhcp_inc_pcb_refcount+0x82>
    }

    ip_set_option(dhcp_pcb, SOF_BROADCAST);
 802220c:	4b14      	ldr	r3, [pc, #80]	@ (8022260 <dhcp_inc_pcb_refcount+0x8c>)
 802220e:	681b      	ldr	r3, [r3, #0]
 8022210:	7a5a      	ldrb	r2, [r3, #9]
 8022212:	4b13      	ldr	r3, [pc, #76]	@ (8022260 <dhcp_inc_pcb_refcount+0x8c>)
 8022214:	681b      	ldr	r3, [r3, #0]
 8022216:	f042 0220 	orr.w	r2, r2, #32
 802221a:	b2d2      	uxtb	r2, r2
 802221c:	725a      	strb	r2, [r3, #9]

    /* set up local and remote port for the pcb -> listen on all interfaces on all src/dest IPs */
    udp_bind(dhcp_pcb, IP4_ADDR_ANY, LWIP_IANA_PORT_DHCP_CLIENT);
 802221e:	4b10      	ldr	r3, [pc, #64]	@ (8022260 <dhcp_inc_pcb_refcount+0x8c>)
 8022220:	681b      	ldr	r3, [r3, #0]
 8022222:	2244      	movs	r2, #68	@ 0x44
 8022224:	4912      	ldr	r1, [pc, #72]	@ (8022270 <dhcp_inc_pcb_refcount+0x9c>)
 8022226:	4618      	mov	r0, r3
 8022228:	f7ff fdf2 	bl	8021e10 <udp_bind>
    udp_connect(dhcp_pcb, IP4_ADDR_ANY, LWIP_IANA_PORT_DHCP_SERVER);
 802222c:	4b0c      	ldr	r3, [pc, #48]	@ (8022260 <dhcp_inc_pcb_refcount+0x8c>)
 802222e:	681b      	ldr	r3, [r3, #0]
 8022230:	2243      	movs	r2, #67	@ 0x43
 8022232:	490f      	ldr	r1, [pc, #60]	@ (8022270 <dhcp_inc_pcb_refcount+0x9c>)
 8022234:	4618      	mov	r0, r3
 8022236:	f7ff fe75 	bl	8021f24 <udp_connect>
    udp_recv(dhcp_pcb, dhcp_recv, NULL);
 802223a:	4b09      	ldr	r3, [pc, #36]	@ (8022260 <dhcp_inc_pcb_refcount+0x8c>)
 802223c:	681b      	ldr	r3, [r3, #0]
 802223e:	2200      	movs	r2, #0
 8022240:	490c      	ldr	r1, [pc, #48]	@ (8022274 <dhcp_inc_pcb_refcount+0xa0>)
 8022242:	4618      	mov	r0, r3
 8022244:	f7ff ff08 	bl	8022058 <udp_recv>
  }

  dhcp_pcb_refcount++;
 8022248:	4b04      	ldr	r3, [pc, #16]	@ (802225c <dhcp_inc_pcb_refcount+0x88>)
 802224a:	781b      	ldrb	r3, [r3, #0]
 802224c:	3301      	adds	r3, #1
 802224e:	b2da      	uxtb	r2, r3
 8022250:	4b02      	ldr	r3, [pc, #8]	@ (802225c <dhcp_inc_pcb_refcount+0x88>)
 8022252:	701a      	strb	r2, [r3, #0]

  return ERR_OK;
 8022254:	2300      	movs	r3, #0
}
 8022256:	4618      	mov	r0, r3
 8022258:	bd80      	pop	{r7, pc}
 802225a:	bf00      	nop
 802225c:	2402afe8 	.word	0x2402afe8
 8022260:	2402afe4 	.word	0x2402afe4
 8022264:	080306e8 	.word	0x080306e8
 8022268:	08030720 	.word	0x08030720
 802226c:	08030748 	.word	0x08030748
 8022270:	080314f4 	.word	0x080314f4
 8022274:	08023b45 	.word	0x08023b45

08022278 <dhcp_dec_pcb_refcount>:

/** Free DHCP PCB if the last netif stops using it */
static void
dhcp_dec_pcb_refcount(void)
{
 8022278:	b580      	push	{r7, lr}
 802227a:	af00      	add	r7, sp, #0
  LWIP_ASSERT("dhcp_pcb_refcount(): refcount error", (dhcp_pcb_refcount > 0));
 802227c:	4b0e      	ldr	r3, [pc, #56]	@ (80222b8 <dhcp_dec_pcb_refcount+0x40>)
 802227e:	781b      	ldrb	r3, [r3, #0]
 8022280:	2b00      	cmp	r3, #0
 8022282:	d105      	bne.n	8022290 <dhcp_dec_pcb_refcount+0x18>
 8022284:	4b0d      	ldr	r3, [pc, #52]	@ (80222bc <dhcp_dec_pcb_refcount+0x44>)
 8022286:	22ff      	movs	r2, #255	@ 0xff
 8022288:	490d      	ldr	r1, [pc, #52]	@ (80222c0 <dhcp_dec_pcb_refcount+0x48>)
 802228a:	480e      	ldr	r0, [pc, #56]	@ (80222c4 <dhcp_dec_pcb_refcount+0x4c>)
 802228c:	f007 ff96 	bl	802a1bc <iprintf>
  dhcp_pcb_refcount--;
 8022290:	4b09      	ldr	r3, [pc, #36]	@ (80222b8 <dhcp_dec_pcb_refcount+0x40>)
 8022292:	781b      	ldrb	r3, [r3, #0]
 8022294:	3b01      	subs	r3, #1
 8022296:	b2da      	uxtb	r2, r3
 8022298:	4b07      	ldr	r3, [pc, #28]	@ (80222b8 <dhcp_dec_pcb_refcount+0x40>)
 802229a:	701a      	strb	r2, [r3, #0]

  if (dhcp_pcb_refcount == 0) {
 802229c:	4b06      	ldr	r3, [pc, #24]	@ (80222b8 <dhcp_dec_pcb_refcount+0x40>)
 802229e:	781b      	ldrb	r3, [r3, #0]
 80222a0:	2b00      	cmp	r3, #0
 80222a2:	d107      	bne.n	80222b4 <dhcp_dec_pcb_refcount+0x3c>
    udp_remove(dhcp_pcb);
 80222a4:	4b08      	ldr	r3, [pc, #32]	@ (80222c8 <dhcp_dec_pcb_refcount+0x50>)
 80222a6:	681b      	ldr	r3, [r3, #0]
 80222a8:	4618      	mov	r0, r3
 80222aa:	f7ff fef7 	bl	802209c <udp_remove>
    dhcp_pcb = NULL;
 80222ae:	4b06      	ldr	r3, [pc, #24]	@ (80222c8 <dhcp_dec_pcb_refcount+0x50>)
 80222b0:	2200      	movs	r2, #0
 80222b2:	601a      	str	r2, [r3, #0]
  }
}
 80222b4:	bf00      	nop
 80222b6:	bd80      	pop	{r7, pc}
 80222b8:	2402afe8 	.word	0x2402afe8
 80222bc:	080306e8 	.word	0x080306e8
 80222c0:	08030770 	.word	0x08030770
 80222c4:	08030748 	.word	0x08030748
 80222c8:	2402afe4 	.word	0x2402afe4

080222cc <dhcp_handle_nak>:
 *
 * @param netif the netif under DHCP control
 */
static void
dhcp_handle_nak(struct netif *netif)
{
 80222cc:	b580      	push	{r7, lr}
 80222ce:	b084      	sub	sp, #16
 80222d0:	af00      	add	r7, sp, #0
 80222d2:	6078      	str	r0, [r7, #4]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 80222d4:	687b      	ldr	r3, [r7, #4]
 80222d6:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 80222d8:	60fb      	str	r3, [r7, #12]

  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_handle_nak(netif=%p) %c%c%"U16_F"\n",
              (void *)netif, netif->name[0], netif->name[1], (u16_t)netif->num));
  /* Change to a defined state - set this before assigning the address
     to ensure the callback can use dhcp_supplied_address() */
  dhcp_set_state(dhcp, DHCP_STATE_BACKING_OFF);
 80222da:	210c      	movs	r1, #12
 80222dc:	68f8      	ldr	r0, [r7, #12]
 80222de:	f001 f862 	bl	80233a6 <dhcp_set_state>
  /* remove IP address from interface (must no longer be used, as per RFC2131) */
  netif_set_addr(netif, IP4_ADDR_ANY4, IP4_ADDR_ANY4, IP4_ADDR_ANY4);
 80222e2:	4b06      	ldr	r3, [pc, #24]	@ (80222fc <dhcp_handle_nak+0x30>)
 80222e4:	4a05      	ldr	r2, [pc, #20]	@ (80222fc <dhcp_handle_nak+0x30>)
 80222e6:	4905      	ldr	r1, [pc, #20]	@ (80222fc <dhcp_handle_nak+0x30>)
 80222e8:	6878      	ldr	r0, [r7, #4]
 80222ea:	f7f7 ffa5 	bl	801a238 <netif_set_addr>
  /* We can immediately restart discovery */
  dhcp_discover(netif);
 80222ee:	6878      	ldr	r0, [r7, #4]
 80222f0:	f000 fc4c 	bl	8022b8c <dhcp_discover>
}
 80222f4:	bf00      	nop
 80222f6:	3710      	adds	r7, #16
 80222f8:	46bd      	mov	sp, r7
 80222fa:	bd80      	pop	{r7, pc}
 80222fc:	080314f4 	.word	0x080314f4

08022300 <dhcp_check>:
 *
 * @param netif the netif under DHCP control
 */
static void
dhcp_check(struct netif *netif)
{
 8022300:	b580      	push	{r7, lr}
 8022302:	b084      	sub	sp, #16
 8022304:	af00      	add	r7, sp, #0
 8022306:	6078      	str	r0, [r7, #4]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 8022308:	687b      	ldr	r3, [r7, #4]
 802230a:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 802230c:	60fb      	str	r3, [r7, #12]
  err_t result;
  u16_t msecs;
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_check(netif=%p) %c%c\n", (void *)netif, (s16_t)netif->name[0],
              (s16_t)netif->name[1]));
  dhcp_set_state(dhcp, DHCP_STATE_CHECKING);
 802230e:	2108      	movs	r1, #8
 8022310:	68f8      	ldr	r0, [r7, #12]
 8022312:	f001 f848 	bl	80233a6 <dhcp_set_state>
  /* create an ARP query for the offered IP address, expecting that no host
     responds, as the IP address should not be in use. */
  result = etharp_query(netif, &dhcp->offered_ip_addr, NULL);
 8022316:	68fb      	ldr	r3, [r7, #12]
 8022318:	331c      	adds	r3, #28
 802231a:	2200      	movs	r2, #0
 802231c:	4619      	mov	r1, r3
 802231e:	6878      	ldr	r0, [r7, #4]
 8022320:	f002 fb88 	bl	8024a34 <etharp_query>
 8022324:	4603      	mov	r3, r0
 8022326:	72fb      	strb	r3, [r7, #11]
  if (result != ERR_OK) {
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, ("dhcp_check: could not perform ARP query\n"));
  }
  if (dhcp->tries < 255) {
 8022328:	68fb      	ldr	r3, [r7, #12]
 802232a:	799b      	ldrb	r3, [r3, #6]
 802232c:	2bff      	cmp	r3, #255	@ 0xff
 802232e:	d005      	beq.n	802233c <dhcp_check+0x3c>
    dhcp->tries++;
 8022330:	68fb      	ldr	r3, [r7, #12]
 8022332:	799b      	ldrb	r3, [r3, #6]
 8022334:	3301      	adds	r3, #1
 8022336:	b2da      	uxtb	r2, r3
 8022338:	68fb      	ldr	r3, [r7, #12]
 802233a:	719a      	strb	r2, [r3, #6]
  }
  msecs = 500;
 802233c:	f44f 73fa 	mov.w	r3, #500	@ 0x1f4
 8022340:	813b      	strh	r3, [r7, #8]
  dhcp->request_timeout = (u16_t)((msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS);
 8022342:	893b      	ldrh	r3, [r7, #8]
 8022344:	f203 13f3 	addw	r3, r3, #499	@ 0x1f3
 8022348:	4a06      	ldr	r2, [pc, #24]	@ (8022364 <dhcp_check+0x64>)
 802234a:	fb82 1203 	smull	r1, r2, r2, r3
 802234e:	1152      	asrs	r2, r2, #5
 8022350:	17db      	asrs	r3, r3, #31
 8022352:	1ad3      	subs	r3, r2, r3
 8022354:	b29a      	uxth	r2, r3
 8022356:	68fb      	ldr	r3, [r7, #12]
 8022358:	811a      	strh	r2, [r3, #8]
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_check(): set request timeout %"U16_F" msecs\n", msecs));
}
 802235a:	bf00      	nop
 802235c:	3710      	adds	r7, #16
 802235e:	46bd      	mov	sp, r7
 8022360:	bd80      	pop	{r7, pc}
 8022362:	bf00      	nop
 8022364:	10624dd3 	.word	0x10624dd3

08022368 <dhcp_handle_offer>:
 *
 * @param netif the netif under DHCP control
 */
static void
dhcp_handle_offer(struct netif *netif, struct dhcp_msg *msg_in)
{
 8022368:	b580      	push	{r7, lr}
 802236a:	b084      	sub	sp, #16
 802236c:	af00      	add	r7, sp, #0
 802236e:	6078      	str	r0, [r7, #4]
 8022370:	6039      	str	r1, [r7, #0]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 8022372:	687b      	ldr	r3, [r7, #4]
 8022374:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8022376:	60fb      	str	r3, [r7, #12]

  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_handle_offer(netif=%p) %c%c%"U16_F"\n",
              (void *)netif, netif->name[0], netif->name[1], (u16_t)netif->num));
  /* obtain the server address */
  if (dhcp_option_given(dhcp, DHCP_OPTION_IDX_SERVER_ID)) {
 8022378:	4b0c      	ldr	r3, [pc, #48]	@ (80223ac <dhcp_handle_offer+0x44>)
 802237a:	789b      	ldrb	r3, [r3, #2]
 802237c:	2b00      	cmp	r3, #0
 802237e:	d011      	beq.n	80223a4 <dhcp_handle_offer+0x3c>
    dhcp->request_timeout = 0; /* stop timer */
 8022380:	68fb      	ldr	r3, [r7, #12]
 8022382:	2200      	movs	r2, #0
 8022384:	811a      	strh	r2, [r3, #8]

    ip_addr_set_ip4_u32(&dhcp->server_ip_addr, lwip_htonl(dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_SERVER_ID)));
 8022386:	4b0a      	ldr	r3, [pc, #40]	@ (80223b0 <dhcp_handle_offer+0x48>)
 8022388:	689b      	ldr	r3, [r3, #8]
 802238a:	4618      	mov	r0, r3
 802238c:	f7f6 ffd1 	bl	8019332 <lwip_htonl>
 8022390:	4602      	mov	r2, r0
 8022392:	68fb      	ldr	r3, [r7, #12]
 8022394:	619a      	str	r2, [r3, #24]
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_STATE, ("dhcp_handle_offer(): server 0x%08"X32_F"\n",
                ip4_addr_get_u32(ip_2_ip4(&dhcp->server_ip_addr))));
    /* remember offered address */
    ip4_addr_copy(dhcp->offered_ip_addr, msg_in->yiaddr);
 8022396:	683b      	ldr	r3, [r7, #0]
 8022398:	691a      	ldr	r2, [r3, #16]
 802239a:	68fb      	ldr	r3, [r7, #12]
 802239c:	61da      	str	r2, [r3, #28]
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_STATE, ("dhcp_handle_offer(): offer for 0x%08"X32_F"\n",
                ip4_addr_get_u32(&dhcp->offered_ip_addr)));

    dhcp_select(netif);
 802239e:	6878      	ldr	r0, [r7, #4]
 80223a0:	f000 f808 	bl	80223b4 <dhcp_select>
  } else {
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS,
                ("dhcp_handle_offer(netif=%p) did not get server ID!\n", (void *)netif));
  }
}
 80223a4:	bf00      	nop
 80223a6:	3710      	adds	r7, #16
 80223a8:	46bd      	mov	sp, r7
 80223aa:	bd80      	pop	{r7, pc}
 80223ac:	2402afdc 	.word	0x2402afdc
 80223b0:	2402afbc 	.word	0x2402afbc

080223b4 <dhcp_select>:
 * @param netif the netif under DHCP control
 * @return lwIP specific error (see error.h)
 */
static err_t
dhcp_select(struct netif *netif)
{
 80223b4:	b5b0      	push	{r4, r5, r7, lr}
 80223b6:	b08a      	sub	sp, #40	@ 0x28
 80223b8:	af02      	add	r7, sp, #8
 80223ba:	6078      	str	r0, [r7, #4]
  u16_t msecs;
  u8_t i;
  struct pbuf *p_out;
  u16_t options_out_len;

  LWIP_ERROR("dhcp_select: netif != NULL", (netif != NULL), return ERR_ARG;);
 80223bc:	687b      	ldr	r3, [r7, #4]
 80223be:	2b00      	cmp	r3, #0
 80223c0:	d109      	bne.n	80223d6 <dhcp_select+0x22>
 80223c2:	4b71      	ldr	r3, [pc, #452]	@ (8022588 <dhcp_select+0x1d4>)
 80223c4:	f240 1277 	movw	r2, #375	@ 0x177
 80223c8:	4970      	ldr	r1, [pc, #448]	@ (802258c <dhcp_select+0x1d8>)
 80223ca:	4871      	ldr	r0, [pc, #452]	@ (8022590 <dhcp_select+0x1dc>)
 80223cc:	f007 fef6 	bl	802a1bc <iprintf>
 80223d0:	f06f 030f 	mvn.w	r3, #15
 80223d4:	e0d3      	b.n	802257e <dhcp_select+0x1ca>
  dhcp = netif_dhcp_data(netif);
 80223d6:	687b      	ldr	r3, [r7, #4]
 80223d8:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 80223da:	61bb      	str	r3, [r7, #24]
  LWIP_ERROR("dhcp_select: dhcp != NULL", (dhcp != NULL), return ERR_VAL;);
 80223dc:	69bb      	ldr	r3, [r7, #24]
 80223de:	2b00      	cmp	r3, #0
 80223e0:	d109      	bne.n	80223f6 <dhcp_select+0x42>
 80223e2:	4b69      	ldr	r3, [pc, #420]	@ (8022588 <dhcp_select+0x1d4>)
 80223e4:	f240 1279 	movw	r2, #377	@ 0x179
 80223e8:	496a      	ldr	r1, [pc, #424]	@ (8022594 <dhcp_select+0x1e0>)
 80223ea:	4869      	ldr	r0, [pc, #420]	@ (8022590 <dhcp_select+0x1dc>)
 80223ec:	f007 fee6 	bl	802a1bc <iprintf>
 80223f0:	f06f 0305 	mvn.w	r3, #5
 80223f4:	e0c3      	b.n	802257e <dhcp_select+0x1ca>

  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_select(netif=%p) %c%c%"U16_F"\n", (void *)netif, netif->name[0], netif->name[1], (u16_t)netif->num));
  dhcp_set_state(dhcp, DHCP_STATE_REQUESTING);
 80223f6:	2101      	movs	r1, #1
 80223f8:	69b8      	ldr	r0, [r7, #24]
 80223fa:	f000 ffd4 	bl	80233a6 <dhcp_set_state>

  /* create and initialize the DHCP message header */
  p_out = dhcp_create_msg(netif, dhcp, DHCP_REQUEST, &options_out_len);
 80223fe:	f107 030c 	add.w	r3, r7, #12
 8022402:	2203      	movs	r2, #3
 8022404:	69b9      	ldr	r1, [r7, #24]
 8022406:	6878      	ldr	r0, [r7, #4]
 8022408:	f001 fc66 	bl	8023cd8 <dhcp_create_msg>
 802240c:	6178      	str	r0, [r7, #20]
  if (p_out != NULL) {
 802240e:	697b      	ldr	r3, [r7, #20]
 8022410:	2b00      	cmp	r3, #0
 8022412:	f000 8085 	beq.w	8022520 <dhcp_select+0x16c>
    struct dhcp_msg *msg_out = (struct dhcp_msg *)p_out->payload;
 8022416:	697b      	ldr	r3, [r7, #20]
 8022418:	685b      	ldr	r3, [r3, #4]
 802241a:	613b      	str	r3, [r7, #16]
    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_MAX_MSG_SIZE, DHCP_OPTION_MAX_MSG_SIZE_LEN);
 802241c:	89b8      	ldrh	r0, [r7, #12]
 802241e:	693b      	ldr	r3, [r7, #16]
 8022420:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8022424:	2302      	movs	r3, #2
 8022426:	2239      	movs	r2, #57	@ 0x39
 8022428:	f000 ffd8 	bl	80233dc <dhcp_option>
 802242c:	4603      	mov	r3, r0
 802242e:	81bb      	strh	r3, [r7, #12]
    options_out_len = dhcp_option_short(options_out_len, msg_out->options, DHCP_MAX_MSG_LEN(netif));
 8022430:	89b8      	ldrh	r0, [r7, #12]
 8022432:	693b      	ldr	r3, [r7, #16]
 8022434:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8022438:	687b      	ldr	r3, [r7, #4]
 802243a:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 802243c:	461a      	mov	r2, r3
 802243e:	f001 f827 	bl	8023490 <dhcp_option_short>
 8022442:	4603      	mov	r3, r0
 8022444:	81bb      	strh	r3, [r7, #12]

    /* MUST request the offered IP address */
    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_REQUESTED_IP, 4);
 8022446:	89b8      	ldrh	r0, [r7, #12]
 8022448:	693b      	ldr	r3, [r7, #16]
 802244a:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 802244e:	2304      	movs	r3, #4
 8022450:	2232      	movs	r2, #50	@ 0x32
 8022452:	f000 ffc3 	bl	80233dc <dhcp_option>
 8022456:	4603      	mov	r3, r0
 8022458:	81bb      	strh	r3, [r7, #12]
    options_out_len = dhcp_option_long(options_out_len, msg_out->options, lwip_ntohl(ip4_addr_get_u32(&dhcp->offered_ip_addr)));
 802245a:	89bc      	ldrh	r4, [r7, #12]
 802245c:	693b      	ldr	r3, [r7, #16]
 802245e:	f103 05f0 	add.w	r5, r3, #240	@ 0xf0
 8022462:	69bb      	ldr	r3, [r7, #24]
 8022464:	69db      	ldr	r3, [r3, #28]
 8022466:	4618      	mov	r0, r3
 8022468:	f7f6 ff63 	bl	8019332 <lwip_htonl>
 802246c:	4603      	mov	r3, r0
 802246e:	461a      	mov	r2, r3
 8022470:	4629      	mov	r1, r5
 8022472:	4620      	mov	r0, r4
 8022474:	f001 f83e 	bl	80234f4 <dhcp_option_long>
 8022478:	4603      	mov	r3, r0
 802247a:	81bb      	strh	r3, [r7, #12]

    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_SERVER_ID, 4);
 802247c:	89b8      	ldrh	r0, [r7, #12]
 802247e:	693b      	ldr	r3, [r7, #16]
 8022480:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8022484:	2304      	movs	r3, #4
 8022486:	2236      	movs	r2, #54	@ 0x36
 8022488:	f000 ffa8 	bl	80233dc <dhcp_option>
 802248c:	4603      	mov	r3, r0
 802248e:	81bb      	strh	r3, [r7, #12]
    options_out_len = dhcp_option_long(options_out_len, msg_out->options, lwip_ntohl(ip4_addr_get_u32(ip_2_ip4(&dhcp->server_ip_addr))));
 8022490:	89bc      	ldrh	r4, [r7, #12]
 8022492:	693b      	ldr	r3, [r7, #16]
 8022494:	f103 05f0 	add.w	r5, r3, #240	@ 0xf0
 8022498:	69bb      	ldr	r3, [r7, #24]
 802249a:	699b      	ldr	r3, [r3, #24]
 802249c:	4618      	mov	r0, r3
 802249e:	f7f6 ff48 	bl	8019332 <lwip_htonl>
 80224a2:	4603      	mov	r3, r0
 80224a4:	461a      	mov	r2, r3
 80224a6:	4629      	mov	r1, r5
 80224a8:	4620      	mov	r0, r4
 80224aa:	f001 f823 	bl	80234f4 <dhcp_option_long>
 80224ae:	4603      	mov	r3, r0
 80224b0:	81bb      	strh	r3, [r7, #12]

    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_PARAMETER_REQUEST_LIST, LWIP_ARRAYSIZE(dhcp_discover_request_options));
 80224b2:	89b8      	ldrh	r0, [r7, #12]
 80224b4:	693b      	ldr	r3, [r7, #16]
 80224b6:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 80224ba:	2303      	movs	r3, #3
 80224bc:	2237      	movs	r2, #55	@ 0x37
 80224be:	f000 ff8d 	bl	80233dc <dhcp_option>
 80224c2:	4603      	mov	r3, r0
 80224c4:	81bb      	strh	r3, [r7, #12]
    for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
 80224c6:	2300      	movs	r3, #0
 80224c8:	77fb      	strb	r3, [r7, #31]
 80224ca:	e00e      	b.n	80224ea <dhcp_select+0x136>
      options_out_len = dhcp_option_byte(options_out_len, msg_out->options, dhcp_discover_request_options[i]);
 80224cc:	89b8      	ldrh	r0, [r7, #12]
 80224ce:	693b      	ldr	r3, [r7, #16]
 80224d0:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 80224d4:	7ffb      	ldrb	r3, [r7, #31]
 80224d6:	4a30      	ldr	r2, [pc, #192]	@ (8022598 <dhcp_select+0x1e4>)
 80224d8:	5cd3      	ldrb	r3, [r2, r3]
 80224da:	461a      	mov	r2, r3
 80224dc:	f000 ffb2 	bl	8023444 <dhcp_option_byte>
 80224e0:	4603      	mov	r3, r0
 80224e2:	81bb      	strh	r3, [r7, #12]
    for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
 80224e4:	7ffb      	ldrb	r3, [r7, #31]
 80224e6:	3301      	adds	r3, #1
 80224e8:	77fb      	strb	r3, [r7, #31]
 80224ea:	7ffb      	ldrb	r3, [r7, #31]
 80224ec:	2b02      	cmp	r3, #2
 80224ee:	d9ed      	bls.n	80224cc <dhcp_select+0x118>
#if LWIP_NETIF_HOSTNAME
    options_out_len = dhcp_option_hostname(options_out_len, msg_out->options, netif);
#endif /* LWIP_NETIF_HOSTNAME */

    LWIP_HOOK_DHCP_APPEND_OPTIONS(netif, dhcp, DHCP_STATE_REQUESTING, msg_out, DHCP_REQUEST, &options_out_len);
    dhcp_option_trailer(options_out_len, msg_out->options, p_out);
 80224f0:	89b8      	ldrh	r0, [r7, #12]
 80224f2:	693b      	ldr	r3, [r7, #16]
 80224f4:	33f0      	adds	r3, #240	@ 0xf0
 80224f6:	697a      	ldr	r2, [r7, #20]
 80224f8:	4619      	mov	r1, r3
 80224fa:	f001 fcc3 	bl	8023e84 <dhcp_option_trailer>

    /* send broadcast to any DHCP server */
    result = udp_sendto_if_src(dhcp_pcb, p_out, IP_ADDR_BROADCAST, LWIP_IANA_PORT_DHCP_SERVER, netif, IP4_ADDR_ANY);
 80224fe:	4b27      	ldr	r3, [pc, #156]	@ (802259c <dhcp_select+0x1e8>)
 8022500:	6818      	ldr	r0, [r3, #0]
 8022502:	4b27      	ldr	r3, [pc, #156]	@ (80225a0 <dhcp_select+0x1ec>)
 8022504:	9301      	str	r3, [sp, #4]
 8022506:	687b      	ldr	r3, [r7, #4]
 8022508:	9300      	str	r3, [sp, #0]
 802250a:	2343      	movs	r3, #67	@ 0x43
 802250c:	4a25      	ldr	r2, [pc, #148]	@ (80225a4 <dhcp_select+0x1f0>)
 802250e:	6979      	ldr	r1, [r7, #20]
 8022510:	f7ff fb96 	bl	8021c40 <udp_sendto_if_src>
 8022514:	4603      	mov	r3, r0
 8022516:	77bb      	strb	r3, [r7, #30]
    pbuf_free(p_out);
 8022518:	6978      	ldr	r0, [r7, #20]
 802251a:	f7f8 fbd7 	bl	801accc <pbuf_free>
 802251e:	e001      	b.n	8022524 <dhcp_select+0x170>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_select: REQUESTING\n"));
  } else {
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, ("dhcp_select: could not allocate DHCP request\n"));
    result = ERR_MEM;
 8022520:	23ff      	movs	r3, #255	@ 0xff
 8022522:	77bb      	strb	r3, [r7, #30]
  }
  if (dhcp->tries < 255) {
 8022524:	69bb      	ldr	r3, [r7, #24]
 8022526:	799b      	ldrb	r3, [r3, #6]
 8022528:	2bff      	cmp	r3, #255	@ 0xff
 802252a:	d005      	beq.n	8022538 <dhcp_select+0x184>
    dhcp->tries++;
 802252c:	69bb      	ldr	r3, [r7, #24]
 802252e:	799b      	ldrb	r3, [r3, #6]
 8022530:	3301      	adds	r3, #1
 8022532:	b2da      	uxtb	r2, r3
 8022534:	69bb      	ldr	r3, [r7, #24]
 8022536:	719a      	strb	r2, [r3, #6]
  }
  msecs = (u16_t)((dhcp->tries < 6 ? 1 << dhcp->tries : 60) * 1000);
 8022538:	69bb      	ldr	r3, [r7, #24]
 802253a:	799b      	ldrb	r3, [r3, #6]
 802253c:	2b05      	cmp	r3, #5
 802253e:	d80d      	bhi.n	802255c <dhcp_select+0x1a8>
 8022540:	69bb      	ldr	r3, [r7, #24]
 8022542:	799b      	ldrb	r3, [r3, #6]
 8022544:	461a      	mov	r2, r3
 8022546:	2301      	movs	r3, #1
 8022548:	4093      	lsls	r3, r2
 802254a:	b29b      	uxth	r3, r3
 802254c:	461a      	mov	r2, r3
 802254e:	0152      	lsls	r2, r2, #5
 8022550:	1ad2      	subs	r2, r2, r3
 8022552:	0092      	lsls	r2, r2, #2
 8022554:	4413      	add	r3, r2
 8022556:	00db      	lsls	r3, r3, #3
 8022558:	b29b      	uxth	r3, r3
 802255a:	e001      	b.n	8022560 <dhcp_select+0x1ac>
 802255c:	f64e 2360 	movw	r3, #60000	@ 0xea60
 8022560:	81fb      	strh	r3, [r7, #14]
  dhcp->request_timeout = (u16_t)((msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS);
 8022562:	89fb      	ldrh	r3, [r7, #14]
 8022564:	f203 13f3 	addw	r3, r3, #499	@ 0x1f3
 8022568:	4a0f      	ldr	r2, [pc, #60]	@ (80225a8 <dhcp_select+0x1f4>)
 802256a:	fb82 1203 	smull	r1, r2, r2, r3
 802256e:	1152      	asrs	r2, r2, #5
 8022570:	17db      	asrs	r3, r3, #31
 8022572:	1ad3      	subs	r3, r2, r3
 8022574:	b29a      	uxth	r2, r3
 8022576:	69bb      	ldr	r3, [r7, #24]
 8022578:	811a      	strh	r2, [r3, #8]
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_STATE, ("dhcp_select(): set request timeout %"U16_F" msecs\n", msecs));
  return result;
 802257a:	f997 301e 	ldrsb.w	r3, [r7, #30]
}
 802257e:	4618      	mov	r0, r3
 8022580:	3720      	adds	r7, #32
 8022582:	46bd      	mov	sp, r7
 8022584:	bdb0      	pop	{r4, r5, r7, pc}
 8022586:	bf00      	nop
 8022588:	080306e8 	.word	0x080306e8
 802258c:	08030794 	.word	0x08030794
 8022590:	08030748 	.word	0x08030748
 8022594:	080307b0 	.word	0x080307b0
 8022598:	24000058 	.word	0x24000058
 802259c:	2402afe4 	.word	0x2402afe4
 80225a0:	080314f4 	.word	0x080314f4
 80225a4:	080314f8 	.word	0x080314f8
 80225a8:	10624dd3 	.word	0x10624dd3

080225ac <dhcp_coarse_tmr>:
 * The DHCP timer that checks for lease renewal/rebind timeouts.
 * Must be called once a minute (see @ref DHCP_COARSE_TIMER_SECS).
 */
void
dhcp_coarse_tmr(void)
{
 80225ac:	b580      	push	{r7, lr}
 80225ae:	b082      	sub	sp, #8
 80225b0:	af00      	add	r7, sp, #0
  struct netif *netif;
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_coarse_tmr()\n"));
  /* iterate through all network interfaces */
  NETIF_FOREACH(netif) {
 80225b2:	4b27      	ldr	r3, [pc, #156]	@ (8022650 <dhcp_coarse_tmr+0xa4>)
 80225b4:	681b      	ldr	r3, [r3, #0]
 80225b6:	607b      	str	r3, [r7, #4]
 80225b8:	e042      	b.n	8022640 <dhcp_coarse_tmr+0x94>
    /* only act on DHCP configured interfaces */
    struct dhcp *dhcp = netif_dhcp_data(netif);
 80225ba:	687b      	ldr	r3, [r7, #4]
 80225bc:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 80225be:	603b      	str	r3, [r7, #0]
    if ((dhcp != NULL) && (dhcp->state != DHCP_STATE_OFF)) {
 80225c0:	683b      	ldr	r3, [r7, #0]
 80225c2:	2b00      	cmp	r3, #0
 80225c4:	d039      	beq.n	802263a <dhcp_coarse_tmr+0x8e>
 80225c6:	683b      	ldr	r3, [r7, #0]
 80225c8:	795b      	ldrb	r3, [r3, #5]
 80225ca:	2b00      	cmp	r3, #0
 80225cc:	d035      	beq.n	802263a <dhcp_coarse_tmr+0x8e>
      /* compare lease time to expire timeout */
      if (dhcp->t0_timeout && (++dhcp->lease_used == dhcp->t0_timeout)) {
 80225ce:	683b      	ldr	r3, [r7, #0]
 80225d0:	8a9b      	ldrh	r3, [r3, #20]
 80225d2:	2b00      	cmp	r3, #0
 80225d4:	d012      	beq.n	80225fc <dhcp_coarse_tmr+0x50>
 80225d6:	683b      	ldr	r3, [r7, #0]
 80225d8:	8a5b      	ldrh	r3, [r3, #18]
 80225da:	3301      	adds	r3, #1
 80225dc:	b29a      	uxth	r2, r3
 80225de:	683b      	ldr	r3, [r7, #0]
 80225e0:	825a      	strh	r2, [r3, #18]
 80225e2:	683b      	ldr	r3, [r7, #0]
 80225e4:	8a5a      	ldrh	r2, [r3, #18]
 80225e6:	683b      	ldr	r3, [r7, #0]
 80225e8:	8a9b      	ldrh	r3, [r3, #20]
 80225ea:	429a      	cmp	r2, r3
 80225ec:	d106      	bne.n	80225fc <dhcp_coarse_tmr+0x50>
        LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_coarse_tmr(): t0 timeout\n"));
        /* this clients' lease time has expired */
        dhcp_release_and_stop(netif);
 80225ee:	6878      	ldr	r0, [r7, #4]
 80225f0:	f000 fe32 	bl	8023258 <dhcp_release_and_stop>
        dhcp_start(netif);
 80225f4:	6878      	ldr	r0, [r7, #4]
 80225f6:	f000 f96b 	bl	80228d0 <dhcp_start>
 80225fa:	e01e      	b.n	802263a <dhcp_coarse_tmr+0x8e>
        /* timer is active (non zero), and triggers (zeroes) now? */
      } else if (dhcp->t2_rebind_time && (dhcp->t2_rebind_time-- == 1)) {
 80225fc:	683b      	ldr	r3, [r7, #0]
 80225fe:	8a1b      	ldrh	r3, [r3, #16]
 8022600:	2b00      	cmp	r3, #0
 8022602:	d00b      	beq.n	802261c <dhcp_coarse_tmr+0x70>
 8022604:	683b      	ldr	r3, [r7, #0]
 8022606:	8a1b      	ldrh	r3, [r3, #16]
 8022608:	1e5a      	subs	r2, r3, #1
 802260a:	b291      	uxth	r1, r2
 802260c:	683a      	ldr	r2, [r7, #0]
 802260e:	8211      	strh	r1, [r2, #16]
 8022610:	2b01      	cmp	r3, #1
 8022612:	d103      	bne.n	802261c <dhcp_coarse_tmr+0x70>
        LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_coarse_tmr(): t2 timeout\n"));
        /* this clients' rebind timeout triggered */
        dhcp_t2_timeout(netif);
 8022614:	6878      	ldr	r0, [r7, #4]
 8022616:	f000 f8c7 	bl	80227a8 <dhcp_t2_timeout>
 802261a:	e00e      	b.n	802263a <dhcp_coarse_tmr+0x8e>
        /* timer is active (non zero), and triggers (zeroes) now */
      } else if (dhcp->t1_renew_time && (dhcp->t1_renew_time-- == 1)) {
 802261c:	683b      	ldr	r3, [r7, #0]
 802261e:	89db      	ldrh	r3, [r3, #14]
 8022620:	2b00      	cmp	r3, #0
 8022622:	d00a      	beq.n	802263a <dhcp_coarse_tmr+0x8e>
 8022624:	683b      	ldr	r3, [r7, #0]
 8022626:	89db      	ldrh	r3, [r3, #14]
 8022628:	1e5a      	subs	r2, r3, #1
 802262a:	b291      	uxth	r1, r2
 802262c:	683a      	ldr	r2, [r7, #0]
 802262e:	81d1      	strh	r1, [r2, #14]
 8022630:	2b01      	cmp	r3, #1
 8022632:	d102      	bne.n	802263a <dhcp_coarse_tmr+0x8e>
        LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_coarse_tmr(): t1 timeout\n"));
        /* this clients' renewal timeout triggered */
        dhcp_t1_timeout(netif);
 8022634:	6878      	ldr	r0, [r7, #4]
 8022636:	f000 f888 	bl	802274a <dhcp_t1_timeout>
  NETIF_FOREACH(netif) {
 802263a:	687b      	ldr	r3, [r7, #4]
 802263c:	681b      	ldr	r3, [r3, #0]
 802263e:	607b      	str	r3, [r7, #4]
 8022640:	687b      	ldr	r3, [r7, #4]
 8022642:	2b00      	cmp	r3, #0
 8022644:	d1b9      	bne.n	80225ba <dhcp_coarse_tmr+0xe>
      }
    }
  }
}
 8022646:	bf00      	nop
 8022648:	bf00      	nop
 802264a:	3708      	adds	r7, #8
 802264c:	46bd      	mov	sp, r7
 802264e:	bd80      	pop	{r7, pc}
 8022650:	2402af4c 	.word	0x2402af4c

08022654 <dhcp_fine_tmr>:
 * A DHCP server is expected to respond within a short period of time.
 * This timer checks whether an outstanding DHCP request is timed out.
 */
void
dhcp_fine_tmr(void)
{
 8022654:	b580      	push	{r7, lr}
 8022656:	b082      	sub	sp, #8
 8022658:	af00      	add	r7, sp, #0
  struct netif *netif;
  /* loop through netif's */
  NETIF_FOREACH(netif) {
 802265a:	4b16      	ldr	r3, [pc, #88]	@ (80226b4 <dhcp_fine_tmr+0x60>)
 802265c:	681b      	ldr	r3, [r3, #0]
 802265e:	607b      	str	r3, [r7, #4]
 8022660:	e020      	b.n	80226a4 <dhcp_fine_tmr+0x50>
    struct dhcp *dhcp = netif_dhcp_data(netif);
 8022662:	687b      	ldr	r3, [r7, #4]
 8022664:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8022666:	603b      	str	r3, [r7, #0]
    /* only act on DHCP configured interfaces */
    if (dhcp != NULL) {
 8022668:	683b      	ldr	r3, [r7, #0]
 802266a:	2b00      	cmp	r3, #0
 802266c:	d017      	beq.n	802269e <dhcp_fine_tmr+0x4a>
      /* timer is active (non zero), and is about to trigger now */
      if (dhcp->request_timeout > 1) {
 802266e:	683b      	ldr	r3, [r7, #0]
 8022670:	891b      	ldrh	r3, [r3, #8]
 8022672:	2b01      	cmp	r3, #1
 8022674:	d906      	bls.n	8022684 <dhcp_fine_tmr+0x30>
        dhcp->request_timeout--;
 8022676:	683b      	ldr	r3, [r7, #0]
 8022678:	891b      	ldrh	r3, [r3, #8]
 802267a:	3b01      	subs	r3, #1
 802267c:	b29a      	uxth	r2, r3
 802267e:	683b      	ldr	r3, [r7, #0]
 8022680:	811a      	strh	r2, [r3, #8]
 8022682:	e00c      	b.n	802269e <dhcp_fine_tmr+0x4a>
      } else if (dhcp->request_timeout == 1) {
 8022684:	683b      	ldr	r3, [r7, #0]
 8022686:	891b      	ldrh	r3, [r3, #8]
 8022688:	2b01      	cmp	r3, #1
 802268a:	d108      	bne.n	802269e <dhcp_fine_tmr+0x4a>
        dhcp->request_timeout--;
 802268c:	683b      	ldr	r3, [r7, #0]
 802268e:	891b      	ldrh	r3, [r3, #8]
 8022690:	3b01      	subs	r3, #1
 8022692:	b29a      	uxth	r2, r3
 8022694:	683b      	ldr	r3, [r7, #0]
 8022696:	811a      	strh	r2, [r3, #8]
        /* { dhcp->request_timeout == 0 } */
        LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_fine_tmr(): request timeout\n"));
        /* this client's request timeout triggered */
        dhcp_timeout(netif);
 8022698:	6878      	ldr	r0, [r7, #4]
 802269a:	f000 f80d 	bl	80226b8 <dhcp_timeout>
  NETIF_FOREACH(netif) {
 802269e:	687b      	ldr	r3, [r7, #4]
 80226a0:	681b      	ldr	r3, [r3, #0]
 80226a2:	607b      	str	r3, [r7, #4]
 80226a4:	687b      	ldr	r3, [r7, #4]
 80226a6:	2b00      	cmp	r3, #0
 80226a8:	d1db      	bne.n	8022662 <dhcp_fine_tmr+0xe>
      }
    }
  }
}
 80226aa:	bf00      	nop
 80226ac:	bf00      	nop
 80226ae:	3708      	adds	r7, #8
 80226b0:	46bd      	mov	sp, r7
 80226b2:	bd80      	pop	{r7, pc}
 80226b4:	2402af4c 	.word	0x2402af4c

080226b8 <dhcp_timeout>:
 *
 * @param netif the netif under DHCP control
 */
static void
dhcp_timeout(struct netif *netif)
{
 80226b8:	b580      	push	{r7, lr}
 80226ba:	b084      	sub	sp, #16
 80226bc:	af00      	add	r7, sp, #0
 80226be:	6078      	str	r0, [r7, #4]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 80226c0:	687b      	ldr	r3, [r7, #4]
 80226c2:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 80226c4:	60fb      	str	r3, [r7, #12]

  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_timeout()\n"));
  /* back-off period has passed, or server selection timed out */
  if ((dhcp->state == DHCP_STATE_BACKING_OFF) || (dhcp->state == DHCP_STATE_SELECTING)) {
 80226c6:	68fb      	ldr	r3, [r7, #12]
 80226c8:	795b      	ldrb	r3, [r3, #5]
 80226ca:	2b0c      	cmp	r3, #12
 80226cc:	d003      	beq.n	80226d6 <dhcp_timeout+0x1e>
 80226ce:	68fb      	ldr	r3, [r7, #12]
 80226d0:	795b      	ldrb	r3, [r3, #5]
 80226d2:	2b06      	cmp	r3, #6
 80226d4:	d103      	bne.n	80226de <dhcp_timeout+0x26>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_timeout(): restarting discovery\n"));
    dhcp_discover(netif);
 80226d6:	6878      	ldr	r0, [r7, #4]
 80226d8:	f000 fa58 	bl	8022b8c <dhcp_discover>
      dhcp_reboot(netif);
    } else {
      dhcp_discover(netif);
    }
  }
}
 80226dc:	e031      	b.n	8022742 <dhcp_timeout+0x8a>
  } else if (dhcp->state == DHCP_STATE_REQUESTING) {
 80226de:	68fb      	ldr	r3, [r7, #12]
 80226e0:	795b      	ldrb	r3, [r3, #5]
 80226e2:	2b01      	cmp	r3, #1
 80226e4:	d10e      	bne.n	8022704 <dhcp_timeout+0x4c>
    if (dhcp->tries <= 5) {
 80226e6:	68fb      	ldr	r3, [r7, #12]
 80226e8:	799b      	ldrb	r3, [r3, #6]
 80226ea:	2b05      	cmp	r3, #5
 80226ec:	d803      	bhi.n	80226f6 <dhcp_timeout+0x3e>
      dhcp_select(netif);
 80226ee:	6878      	ldr	r0, [r7, #4]
 80226f0:	f7ff fe60 	bl	80223b4 <dhcp_select>
}
 80226f4:	e025      	b.n	8022742 <dhcp_timeout+0x8a>
      dhcp_release_and_stop(netif);
 80226f6:	6878      	ldr	r0, [r7, #4]
 80226f8:	f000 fdae 	bl	8023258 <dhcp_release_and_stop>
      dhcp_start(netif);
 80226fc:	6878      	ldr	r0, [r7, #4]
 80226fe:	f000 f8e7 	bl	80228d0 <dhcp_start>
}
 8022702:	e01e      	b.n	8022742 <dhcp_timeout+0x8a>
  } else if (dhcp->state == DHCP_STATE_CHECKING) {
 8022704:	68fb      	ldr	r3, [r7, #12]
 8022706:	795b      	ldrb	r3, [r3, #5]
 8022708:	2b08      	cmp	r3, #8
 802270a:	d10b      	bne.n	8022724 <dhcp_timeout+0x6c>
    if (dhcp->tries <= 1) {
 802270c:	68fb      	ldr	r3, [r7, #12]
 802270e:	799b      	ldrb	r3, [r3, #6]
 8022710:	2b01      	cmp	r3, #1
 8022712:	d803      	bhi.n	802271c <dhcp_timeout+0x64>
      dhcp_check(netif);
 8022714:	6878      	ldr	r0, [r7, #4]
 8022716:	f7ff fdf3 	bl	8022300 <dhcp_check>
}
 802271a:	e012      	b.n	8022742 <dhcp_timeout+0x8a>
      dhcp_bind(netif);
 802271c:	6878      	ldr	r0, [r7, #4]
 802271e:	f000 fad7 	bl	8022cd0 <dhcp_bind>
}
 8022722:	e00e      	b.n	8022742 <dhcp_timeout+0x8a>
  } else if (dhcp->state == DHCP_STATE_REBOOTING) {
 8022724:	68fb      	ldr	r3, [r7, #12]
 8022726:	795b      	ldrb	r3, [r3, #5]
 8022728:	2b03      	cmp	r3, #3
 802272a:	d10a      	bne.n	8022742 <dhcp_timeout+0x8a>
    if (dhcp->tries < REBOOT_TRIES) {
 802272c:	68fb      	ldr	r3, [r7, #12]
 802272e:	799b      	ldrb	r3, [r3, #6]
 8022730:	2b01      	cmp	r3, #1
 8022732:	d803      	bhi.n	802273c <dhcp_timeout+0x84>
      dhcp_reboot(netif);
 8022734:	6878      	ldr	r0, [r7, #4]
 8022736:	f000 fcdb 	bl	80230f0 <dhcp_reboot>
}
 802273a:	e002      	b.n	8022742 <dhcp_timeout+0x8a>
      dhcp_discover(netif);
 802273c:	6878      	ldr	r0, [r7, #4]
 802273e:	f000 fa25 	bl	8022b8c <dhcp_discover>
}
 8022742:	bf00      	nop
 8022744:	3710      	adds	r7, #16
 8022746:	46bd      	mov	sp, r7
 8022748:	bd80      	pop	{r7, pc}

0802274a <dhcp_t1_timeout>:
 *
 * @param netif the netif under DHCP control
 */
static void
dhcp_t1_timeout(struct netif *netif)
{
 802274a:	b580      	push	{r7, lr}
 802274c:	b084      	sub	sp, #16
 802274e:	af00      	add	r7, sp, #0
 8022750:	6078      	str	r0, [r7, #4]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 8022752:	687b      	ldr	r3, [r7, #4]
 8022754:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8022756:	60fb      	str	r3, [r7, #12]

  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_STATE, ("dhcp_t1_timeout()\n"));
  if ((dhcp->state == DHCP_STATE_REQUESTING) || (dhcp->state == DHCP_STATE_BOUND) ||
 8022758:	68fb      	ldr	r3, [r7, #12]
 802275a:	795b      	ldrb	r3, [r3, #5]
 802275c:	2b01      	cmp	r3, #1
 802275e:	d007      	beq.n	8022770 <dhcp_t1_timeout+0x26>
 8022760:	68fb      	ldr	r3, [r7, #12]
 8022762:	795b      	ldrb	r3, [r3, #5]
 8022764:	2b0a      	cmp	r3, #10
 8022766:	d003      	beq.n	8022770 <dhcp_t1_timeout+0x26>
      (dhcp->state == DHCP_STATE_RENEWING)) {
 8022768:	68fb      	ldr	r3, [r7, #12]
 802276a:	795b      	ldrb	r3, [r3, #5]
  if ((dhcp->state == DHCP_STATE_REQUESTING) || (dhcp->state == DHCP_STATE_BOUND) ||
 802276c:	2b05      	cmp	r3, #5
 802276e:	d117      	bne.n	80227a0 <dhcp_t1_timeout+0x56>
     * eventually time-out if renew tries fail. */
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE,
                ("dhcp_t1_timeout(): must renew\n"));
    /* This slightly different to RFC2131: DHCPREQUEST will be sent from state
       DHCP_STATE_RENEWING, not DHCP_STATE_BOUND */
    dhcp_renew(netif);
 8022770:	6878      	ldr	r0, [r7, #4]
 8022772:	f000 fb87 	bl	8022e84 <dhcp_renew>
    /* Calculate next timeout */
    if (((dhcp->t2_timeout - dhcp->lease_used) / 2) >= ((60 + DHCP_COARSE_TIMER_SECS / 2) / DHCP_COARSE_TIMER_SECS)) {
 8022776:	68fb      	ldr	r3, [r7, #12]
 8022778:	899b      	ldrh	r3, [r3, #12]
 802277a:	461a      	mov	r2, r3
 802277c:	68fb      	ldr	r3, [r7, #12]
 802277e:	8a5b      	ldrh	r3, [r3, #18]
 8022780:	1ad3      	subs	r3, r2, r3
 8022782:	2b01      	cmp	r3, #1
 8022784:	dd0c      	ble.n	80227a0 <dhcp_t1_timeout+0x56>
      dhcp->t1_renew_time = (u16_t)((dhcp->t2_timeout - dhcp->lease_used) / 2);
 8022786:	68fb      	ldr	r3, [r7, #12]
 8022788:	899b      	ldrh	r3, [r3, #12]
 802278a:	461a      	mov	r2, r3
 802278c:	68fb      	ldr	r3, [r7, #12]
 802278e:	8a5b      	ldrh	r3, [r3, #18]
 8022790:	1ad3      	subs	r3, r2, r3
 8022792:	2b00      	cmp	r3, #0
 8022794:	da00      	bge.n	8022798 <dhcp_t1_timeout+0x4e>
 8022796:	3301      	adds	r3, #1
 8022798:	105b      	asrs	r3, r3, #1
 802279a:	b29a      	uxth	r2, r3
 802279c:	68fb      	ldr	r3, [r7, #12]
 802279e:	81da      	strh	r2, [r3, #14]
    }
  }
}
 80227a0:	bf00      	nop
 80227a2:	3710      	adds	r7, #16
 80227a4:	46bd      	mov	sp, r7
 80227a6:	bd80      	pop	{r7, pc}

080227a8 <dhcp_t2_timeout>:
 *
 * @param netif the netif under DHCP control
 */
static void
dhcp_t2_timeout(struct netif *netif)
{
 80227a8:	b580      	push	{r7, lr}
 80227aa:	b084      	sub	sp, #16
 80227ac:	af00      	add	r7, sp, #0
 80227ae:	6078      	str	r0, [r7, #4]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 80227b0:	687b      	ldr	r3, [r7, #4]
 80227b2:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 80227b4:	60fb      	str	r3, [r7, #12]

  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_t2_timeout()\n"));
  if ((dhcp->state == DHCP_STATE_REQUESTING) || (dhcp->state == DHCP_STATE_BOUND) ||
 80227b6:	68fb      	ldr	r3, [r7, #12]
 80227b8:	795b      	ldrb	r3, [r3, #5]
 80227ba:	2b01      	cmp	r3, #1
 80227bc:	d00b      	beq.n	80227d6 <dhcp_t2_timeout+0x2e>
 80227be:	68fb      	ldr	r3, [r7, #12]
 80227c0:	795b      	ldrb	r3, [r3, #5]
 80227c2:	2b0a      	cmp	r3, #10
 80227c4:	d007      	beq.n	80227d6 <dhcp_t2_timeout+0x2e>
      (dhcp->state == DHCP_STATE_RENEWING) || (dhcp->state == DHCP_STATE_REBINDING)) {
 80227c6:	68fb      	ldr	r3, [r7, #12]
 80227c8:	795b      	ldrb	r3, [r3, #5]
  if ((dhcp->state == DHCP_STATE_REQUESTING) || (dhcp->state == DHCP_STATE_BOUND) ||
 80227ca:	2b05      	cmp	r3, #5
 80227cc:	d003      	beq.n	80227d6 <dhcp_t2_timeout+0x2e>
      (dhcp->state == DHCP_STATE_RENEWING) || (dhcp->state == DHCP_STATE_REBINDING)) {
 80227ce:	68fb      	ldr	r3, [r7, #12]
 80227d0:	795b      	ldrb	r3, [r3, #5]
 80227d2:	2b04      	cmp	r3, #4
 80227d4:	d117      	bne.n	8022806 <dhcp_t2_timeout+0x5e>
    /* just retry to rebind */
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE,
                ("dhcp_t2_timeout(): must rebind\n"));
    /* This slightly different to RFC2131: DHCPREQUEST will be sent from state
       DHCP_STATE_REBINDING, not DHCP_STATE_BOUND */
    dhcp_rebind(netif);
 80227d6:	6878      	ldr	r0, [r7, #4]
 80227d8:	f000 fbf0 	bl	8022fbc <dhcp_rebind>
    /* Calculate next timeout */
    if (((dhcp->t0_timeout - dhcp->lease_used) / 2) >= ((60 + DHCP_COARSE_TIMER_SECS / 2) / DHCP_COARSE_TIMER_SECS)) {
 80227dc:	68fb      	ldr	r3, [r7, #12]
 80227de:	8a9b      	ldrh	r3, [r3, #20]
 80227e0:	461a      	mov	r2, r3
 80227e2:	68fb      	ldr	r3, [r7, #12]
 80227e4:	8a5b      	ldrh	r3, [r3, #18]
 80227e6:	1ad3      	subs	r3, r2, r3
 80227e8:	2b01      	cmp	r3, #1
 80227ea:	dd0c      	ble.n	8022806 <dhcp_t2_timeout+0x5e>
      dhcp->t2_rebind_time = (u16_t)((dhcp->t0_timeout - dhcp->lease_used) / 2);
 80227ec:	68fb      	ldr	r3, [r7, #12]
 80227ee:	8a9b      	ldrh	r3, [r3, #20]
 80227f0:	461a      	mov	r2, r3
 80227f2:	68fb      	ldr	r3, [r7, #12]
 80227f4:	8a5b      	ldrh	r3, [r3, #18]
 80227f6:	1ad3      	subs	r3, r2, r3
 80227f8:	2b00      	cmp	r3, #0
 80227fa:	da00      	bge.n	80227fe <dhcp_t2_timeout+0x56>
 80227fc:	3301      	adds	r3, #1
 80227fe:	105b      	asrs	r3, r3, #1
 8022800:	b29a      	uxth	r2, r3
 8022802:	68fb      	ldr	r3, [r7, #12]
 8022804:	821a      	strh	r2, [r3, #16]
    }
  }
}
 8022806:	bf00      	nop
 8022808:	3710      	adds	r7, #16
 802280a:	46bd      	mov	sp, r7
 802280c:	bd80      	pop	{r7, pc}
	...

08022810 <dhcp_handle_ack>:
 *
 * @param netif the netif under DHCP control
 */
static void
dhcp_handle_ack(struct netif *netif, struct dhcp_msg *msg_in)
{
 8022810:	b580      	push	{r7, lr}
 8022812:	b084      	sub	sp, #16
 8022814:	af00      	add	r7, sp, #0
 8022816:	6078      	str	r0, [r7, #4]
 8022818:	6039      	str	r1, [r7, #0]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 802281a:	687b      	ldr	r3, [r7, #4]
 802281c:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 802281e:	60fb      	str	r3, [r7, #12]
#if LWIP_DHCP_GET_NTP_SRV
  ip4_addr_t ntp_server_addrs[LWIP_DHCP_MAX_NTP_SERVERS];
#endif

  /* clear options we might not get from the ACK */
  ip4_addr_set_zero(&dhcp->offered_sn_mask);
 8022820:	68fb      	ldr	r3, [r7, #12]
 8022822:	2200      	movs	r2, #0
 8022824:	621a      	str	r2, [r3, #32]
  ip4_addr_set_zero(&dhcp->offered_gw_addr);
 8022826:	68fb      	ldr	r3, [r7, #12]
 8022828:	2200      	movs	r2, #0
 802282a:	625a      	str	r2, [r3, #36]	@ 0x24
#if LWIP_DHCP_BOOTP_FILE
  ip4_addr_set_zero(&dhcp->offered_si_addr);
#endif /* LWIP_DHCP_BOOTP_FILE */

  /* lease time given? */
  if (dhcp_option_given(dhcp, DHCP_OPTION_IDX_LEASE_TIME)) {
 802282c:	4b26      	ldr	r3, [pc, #152]	@ (80228c8 <dhcp_handle_ack+0xb8>)
 802282e:	78db      	ldrb	r3, [r3, #3]
 8022830:	2b00      	cmp	r3, #0
 8022832:	d003      	beq.n	802283c <dhcp_handle_ack+0x2c>
    /* remember offered lease time */
    dhcp->offered_t0_lease = dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_LEASE_TIME);
 8022834:	4b25      	ldr	r3, [pc, #148]	@ (80228cc <dhcp_handle_ack+0xbc>)
 8022836:	68da      	ldr	r2, [r3, #12]
 8022838:	68fb      	ldr	r3, [r7, #12]
 802283a:	629a      	str	r2, [r3, #40]	@ 0x28
  }
  /* renewal period given? */
  if (dhcp_option_given(dhcp, DHCP_OPTION_IDX_T1)) {
 802283c:	4b22      	ldr	r3, [pc, #136]	@ (80228c8 <dhcp_handle_ack+0xb8>)
 802283e:	791b      	ldrb	r3, [r3, #4]
 8022840:	2b00      	cmp	r3, #0
 8022842:	d004      	beq.n	802284e <dhcp_handle_ack+0x3e>
    /* remember given renewal period */
    dhcp->offered_t1_renew = dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_T1);
 8022844:	4b21      	ldr	r3, [pc, #132]	@ (80228cc <dhcp_handle_ack+0xbc>)
 8022846:	691a      	ldr	r2, [r3, #16]
 8022848:	68fb      	ldr	r3, [r7, #12]
 802284a:	62da      	str	r2, [r3, #44]	@ 0x2c
 802284c:	e004      	b.n	8022858 <dhcp_handle_ack+0x48>
  } else {
    /* calculate safe periods for renewal */
    dhcp->offered_t1_renew = dhcp->offered_t0_lease / 2;
 802284e:	68fb      	ldr	r3, [r7, #12]
 8022850:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 8022852:	085a      	lsrs	r2, r3, #1
 8022854:	68fb      	ldr	r3, [r7, #12]
 8022856:	62da      	str	r2, [r3, #44]	@ 0x2c
  }

  /* renewal period given? */
  if (dhcp_option_given(dhcp, DHCP_OPTION_IDX_T2)) {
 8022858:	4b1b      	ldr	r3, [pc, #108]	@ (80228c8 <dhcp_handle_ack+0xb8>)
 802285a:	795b      	ldrb	r3, [r3, #5]
 802285c:	2b00      	cmp	r3, #0
 802285e:	d004      	beq.n	802286a <dhcp_handle_ack+0x5a>
    /* remember given rebind period */
    dhcp->offered_t2_rebind = dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_T2);
 8022860:	4b1a      	ldr	r3, [pc, #104]	@ (80228cc <dhcp_handle_ack+0xbc>)
 8022862:	695a      	ldr	r2, [r3, #20]
 8022864:	68fb      	ldr	r3, [r7, #12]
 8022866:	631a      	str	r2, [r3, #48]	@ 0x30
 8022868:	e007      	b.n	802287a <dhcp_handle_ack+0x6a>
  } else {
    /* calculate safe periods for rebinding (offered_t0_lease * 0.875 -> 87.5%)*/
    dhcp->offered_t2_rebind = (dhcp->offered_t0_lease * 7U) / 8U;
 802286a:	68fb      	ldr	r3, [r7, #12]
 802286c:	6a9a      	ldr	r2, [r3, #40]	@ 0x28
 802286e:	4613      	mov	r3, r2
 8022870:	00db      	lsls	r3, r3, #3
 8022872:	1a9b      	subs	r3, r3, r2
 8022874:	08da      	lsrs	r2, r3, #3
 8022876:	68fb      	ldr	r3, [r7, #12]
 8022878:	631a      	str	r2, [r3, #48]	@ 0x30
  }

  /* (y)our internet address */
  ip4_addr_copy(dhcp->offered_ip_addr, msg_in->yiaddr);
 802287a:	683b      	ldr	r3, [r7, #0]
 802287c:	691a      	ldr	r2, [r3, #16]
 802287e:	68fb      	ldr	r3, [r7, #12]
 8022880:	61da      	str	r2, [r3, #28]
     boot file name copied in dhcp_parse_reply if not overloaded */
  ip4_addr_copy(dhcp->offered_si_addr, msg_in->siaddr);
#endif /* LWIP_DHCP_BOOTP_FILE */

  /* subnet mask given? */
  if (dhcp_option_given(dhcp, DHCP_OPTION_IDX_SUBNET_MASK)) {
 8022882:	4b11      	ldr	r3, [pc, #68]	@ (80228c8 <dhcp_handle_ack+0xb8>)
 8022884:	799b      	ldrb	r3, [r3, #6]
 8022886:	2b00      	cmp	r3, #0
 8022888:	d00b      	beq.n	80228a2 <dhcp_handle_ack+0x92>
    /* remember given subnet mask */
    ip4_addr_set_u32(&dhcp->offered_sn_mask, lwip_htonl(dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_SUBNET_MASK)));
 802288a:	4b10      	ldr	r3, [pc, #64]	@ (80228cc <dhcp_handle_ack+0xbc>)
 802288c:	699b      	ldr	r3, [r3, #24]
 802288e:	4618      	mov	r0, r3
 8022890:	f7f6 fd4f 	bl	8019332 <lwip_htonl>
 8022894:	4602      	mov	r2, r0
 8022896:	68fb      	ldr	r3, [r7, #12]
 8022898:	621a      	str	r2, [r3, #32]
    dhcp->subnet_mask_given = 1;
 802289a:	68fb      	ldr	r3, [r7, #12]
 802289c:	2201      	movs	r2, #1
 802289e:	71da      	strb	r2, [r3, #7]
 80228a0:	e002      	b.n	80228a8 <dhcp_handle_ack+0x98>
  } else {
    dhcp->subnet_mask_given = 0;
 80228a2:	68fb      	ldr	r3, [r7, #12]
 80228a4:	2200      	movs	r2, #0
 80228a6:	71da      	strb	r2, [r3, #7]
  }

  /* gateway router */
  if (dhcp_option_given(dhcp, DHCP_OPTION_IDX_ROUTER)) {
 80228a8:	4b07      	ldr	r3, [pc, #28]	@ (80228c8 <dhcp_handle_ack+0xb8>)
 80228aa:	79db      	ldrb	r3, [r3, #7]
 80228ac:	2b00      	cmp	r3, #0
 80228ae:	d007      	beq.n	80228c0 <dhcp_handle_ack+0xb0>
    ip4_addr_set_u32(&dhcp->offered_gw_addr, lwip_htonl(dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_ROUTER)));
 80228b0:	4b06      	ldr	r3, [pc, #24]	@ (80228cc <dhcp_handle_ack+0xbc>)
 80228b2:	69db      	ldr	r3, [r3, #28]
 80228b4:	4618      	mov	r0, r3
 80228b6:	f7f6 fd3c 	bl	8019332 <lwip_htonl>
 80228ba:	4602      	mov	r2, r0
 80228bc:	68fb      	ldr	r3, [r7, #12]
 80228be:	625a      	str	r2, [r3, #36]	@ 0x24
    ip_addr_t dns_addr;
    ip_addr_set_ip4_u32_val(dns_addr, lwip_htonl(dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_DNS_SERVER + n)));
    dns_setserver(n, &dns_addr);
  }
#endif /* LWIP_DHCP_PROVIDE_DNS_SERVERS */
}
 80228c0:	bf00      	nop
 80228c2:	3710      	adds	r7, #16
 80228c4:	46bd      	mov	sp, r7
 80228c6:	bd80      	pop	{r7, pc}
 80228c8:	2402afdc 	.word	0x2402afdc
 80228cc:	2402afbc 	.word	0x2402afbc

080228d0 <dhcp_start>:
 * - ERR_OK - No error
 * - ERR_MEM - Out of memory
 */
err_t
dhcp_start(struct netif *netif)
{
 80228d0:	b580      	push	{r7, lr}
 80228d2:	b084      	sub	sp, #16
 80228d4:	af00      	add	r7, sp, #0
 80228d6:	6078      	str	r0, [r7, #4]
  struct dhcp *dhcp;
  err_t result;

  LWIP_ASSERT_CORE_LOCKED();
 80228d8:	f7ee f8d0 	bl	8010a7c <sys_check_core_locking>
  LWIP_ERROR("netif != NULL", (netif != NULL), return ERR_ARG;);
 80228dc:	687b      	ldr	r3, [r7, #4]
 80228de:	2b00      	cmp	r3, #0
 80228e0:	d109      	bne.n	80228f6 <dhcp_start+0x26>
 80228e2:	4b37      	ldr	r3, [pc, #220]	@ (80229c0 <dhcp_start+0xf0>)
 80228e4:	f240 22e7 	movw	r2, #743	@ 0x2e7
 80228e8:	4936      	ldr	r1, [pc, #216]	@ (80229c4 <dhcp_start+0xf4>)
 80228ea:	4837      	ldr	r0, [pc, #220]	@ (80229c8 <dhcp_start+0xf8>)
 80228ec:	f007 fc66 	bl	802a1bc <iprintf>
 80228f0:	f06f 030f 	mvn.w	r3, #15
 80228f4:	e060      	b.n	80229b8 <dhcp_start+0xe8>
  LWIP_ERROR("netif is not up, old style port?", netif_is_up(netif), return ERR_ARG;);
 80228f6:	687b      	ldr	r3, [r7, #4]
 80228f8:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 80228fc:	f003 0301 	and.w	r3, r3, #1
 8022900:	2b00      	cmp	r3, #0
 8022902:	d109      	bne.n	8022918 <dhcp_start+0x48>
 8022904:	4b2e      	ldr	r3, [pc, #184]	@ (80229c0 <dhcp_start+0xf0>)
 8022906:	f44f 723a 	mov.w	r2, #744	@ 0x2e8
 802290a:	4930      	ldr	r1, [pc, #192]	@ (80229cc <dhcp_start+0xfc>)
 802290c:	482e      	ldr	r0, [pc, #184]	@ (80229c8 <dhcp_start+0xf8>)
 802290e:	f007 fc55 	bl	802a1bc <iprintf>
 8022912:	f06f 030f 	mvn.w	r3, #15
 8022916:	e04f      	b.n	80229b8 <dhcp_start+0xe8>
  dhcp = netif_dhcp_data(netif);
 8022918:	687b      	ldr	r3, [r7, #4]
 802291a:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 802291c:	60fb      	str	r3, [r7, #12]
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_start(netif=%p) %c%c%"U16_F"\n", (void *)netif, netif->name[0], netif->name[1], (u16_t)netif->num));

  /* check MTU of the netif */
  if (netif->mtu < DHCP_MAX_MSG_LEN_MIN_REQUIRED) {
 802291e:	687b      	ldr	r3, [r7, #4]
 8022920:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 8022922:	f5b3 7f10 	cmp.w	r3, #576	@ 0x240
 8022926:	d202      	bcs.n	802292e <dhcp_start+0x5e>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_start(): Cannot use this netif with DHCP: MTU is too small\n"));
    return ERR_MEM;
 8022928:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 802292c:	e044      	b.n	80229b8 <dhcp_start+0xe8>
  }

  /* no DHCP client attached yet? */
  if (dhcp == NULL) {
 802292e:	68fb      	ldr	r3, [r7, #12]
 8022930:	2b00      	cmp	r3, #0
 8022932:	d10d      	bne.n	8022950 <dhcp_start+0x80>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_start(): mallocing new DHCP client\n"));
    dhcp = (struct dhcp *)mem_malloc(sizeof(struct dhcp));
 8022934:	2034      	movs	r0, #52	@ 0x34
 8022936:	f7f7 f8c9 	bl	8019acc <mem_malloc>
 802293a:	60f8      	str	r0, [r7, #12]
    if (dhcp == NULL) {
 802293c:	68fb      	ldr	r3, [r7, #12]
 802293e:	2b00      	cmp	r3, #0
 8022940:	d102      	bne.n	8022948 <dhcp_start+0x78>
      LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_start(): could not allocate dhcp\n"));
      return ERR_MEM;
 8022942:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8022946:	e037      	b.n	80229b8 <dhcp_start+0xe8>
    }

    /* store this dhcp client in the netif */
    netif_set_client_data(netif, LWIP_NETIF_CLIENT_DATA_INDEX_DHCP, dhcp);
 8022948:	687b      	ldr	r3, [r7, #4]
 802294a:	68fa      	ldr	r2, [r7, #12]
 802294c:	625a      	str	r2, [r3, #36]	@ 0x24
 802294e:	e005      	b.n	802295c <dhcp_start+0x8c>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_start(): allocated dhcp"));
    /* already has DHCP client attached */
  } else {
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_start(): restarting DHCP configuration\n"));

    if (dhcp->pcb_allocated != 0) {
 8022950:	68fb      	ldr	r3, [r7, #12]
 8022952:	791b      	ldrb	r3, [r3, #4]
 8022954:	2b00      	cmp	r3, #0
 8022956:	d001      	beq.n	802295c <dhcp_start+0x8c>
      dhcp_dec_pcb_refcount(); /* free DHCP PCB if not needed any more */
 8022958:	f7ff fc8e 	bl	8022278 <dhcp_dec_pcb_refcount>
    }
    /* dhcp is cleared below, no need to reset flag*/
  }

  /* clear data structure */
  memset(dhcp, 0, sizeof(struct dhcp));
 802295c:	2234      	movs	r2, #52	@ 0x34
 802295e:	2100      	movs	r1, #0
 8022960:	68f8      	ldr	r0, [r7, #12]
 8022962:	f007 fdbd 	bl	802a4e0 <memset>
  /* dhcp_set_state(&dhcp, DHCP_STATE_OFF); */

  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_start(): starting DHCP configuration\n"));

  if (dhcp_inc_pcb_refcount() != ERR_OK) { /* ensure DHCP PCB is allocated */
 8022966:	f7ff fc35 	bl	80221d4 <dhcp_inc_pcb_refcount>
 802296a:	4603      	mov	r3, r0
 802296c:	2b00      	cmp	r3, #0
 802296e:	d002      	beq.n	8022976 <dhcp_start+0xa6>
    return ERR_MEM;
 8022970:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8022974:	e020      	b.n	80229b8 <dhcp_start+0xe8>
  }
  dhcp->pcb_allocated = 1;
 8022976:	68fb      	ldr	r3, [r7, #12]
 8022978:	2201      	movs	r2, #1
 802297a:	711a      	strb	r2, [r3, #4]

  if (!netif_is_link_up(netif)) {
 802297c:	687b      	ldr	r3, [r7, #4]
 802297e:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 8022982:	f003 0304 	and.w	r3, r3, #4
 8022986:	2b00      	cmp	r3, #0
 8022988:	d105      	bne.n	8022996 <dhcp_start+0xc6>
    /* set state INIT and wait for dhcp_network_changed() to call dhcp_discover() */
    dhcp_set_state(dhcp, DHCP_STATE_INIT);
 802298a:	2102      	movs	r1, #2
 802298c:	68f8      	ldr	r0, [r7, #12]
 802298e:	f000 fd0a 	bl	80233a6 <dhcp_set_state>
    return ERR_OK;
 8022992:	2300      	movs	r3, #0
 8022994:	e010      	b.n	80229b8 <dhcp_start+0xe8>
  }

  /* (re)start the DHCP negotiation */
  result = dhcp_discover(netif);
 8022996:	6878      	ldr	r0, [r7, #4]
 8022998:	f000 f8f8 	bl	8022b8c <dhcp_discover>
 802299c:	4603      	mov	r3, r0
 802299e:	72fb      	strb	r3, [r7, #11]
  if (result != ERR_OK) {
 80229a0:	f997 300b 	ldrsb.w	r3, [r7, #11]
 80229a4:	2b00      	cmp	r3, #0
 80229a6:	d005      	beq.n	80229b4 <dhcp_start+0xe4>
    /* free resources allocated above */
    dhcp_release_and_stop(netif);
 80229a8:	6878      	ldr	r0, [r7, #4]
 80229aa:	f000 fc55 	bl	8023258 <dhcp_release_and_stop>
    return ERR_MEM;
 80229ae:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80229b2:	e001      	b.n	80229b8 <dhcp_start+0xe8>
  }
  return result;
 80229b4:	f997 300b 	ldrsb.w	r3, [r7, #11]
}
 80229b8:	4618      	mov	r0, r3
 80229ba:	3710      	adds	r7, #16
 80229bc:	46bd      	mov	sp, r7
 80229be:	bd80      	pop	{r7, pc}
 80229c0:	080306e8 	.word	0x080306e8
 80229c4:	080307cc 	.word	0x080307cc
 80229c8:	08030748 	.word	0x08030748
 80229cc:	08030810 	.word	0x08030810

080229d0 <dhcp_network_changed>:
 * This enters the REBOOTING state to verify that the currently bound
 * address is still valid.
 */
void
dhcp_network_changed(struct netif *netif)
{
 80229d0:	b580      	push	{r7, lr}
 80229d2:	b084      	sub	sp, #16
 80229d4:	af00      	add	r7, sp, #0
 80229d6:	6078      	str	r0, [r7, #4]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 80229d8:	687b      	ldr	r3, [r7, #4]
 80229da:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 80229dc:	60fb      	str	r3, [r7, #12]

  if (!dhcp) {
 80229de:	68fb      	ldr	r3, [r7, #12]
 80229e0:	2b00      	cmp	r3, #0
 80229e2:	d025      	beq.n	8022a30 <dhcp_network_changed+0x60>
    return;
  }
  switch (dhcp->state) {
 80229e4:	68fb      	ldr	r3, [r7, #12]
 80229e6:	795b      	ldrb	r3, [r3, #5]
 80229e8:	2b0a      	cmp	r3, #10
 80229ea:	d008      	beq.n	80229fe <dhcp_network_changed+0x2e>
 80229ec:	2b0a      	cmp	r3, #10
 80229ee:	dc0d      	bgt.n	8022a0c <dhcp_network_changed+0x3c>
 80229f0:	2b00      	cmp	r3, #0
 80229f2:	d01f      	beq.n	8022a34 <dhcp_network_changed+0x64>
 80229f4:	2b00      	cmp	r3, #0
 80229f6:	db09      	blt.n	8022a0c <dhcp_network_changed+0x3c>
 80229f8:	3b03      	subs	r3, #3
 80229fa:	2b02      	cmp	r3, #2
 80229fc:	d806      	bhi.n	8022a0c <dhcp_network_changed+0x3c>
    case DHCP_STATE_REBINDING:
    case DHCP_STATE_RENEWING:
    case DHCP_STATE_BOUND:
    case DHCP_STATE_REBOOTING:
      dhcp->tries = 0;
 80229fe:	68fb      	ldr	r3, [r7, #12]
 8022a00:	2200      	movs	r2, #0
 8022a02:	719a      	strb	r2, [r3, #6]
      dhcp_reboot(netif);
 8022a04:	6878      	ldr	r0, [r7, #4]
 8022a06:	f000 fb73 	bl	80230f0 <dhcp_reboot>
      break;
 8022a0a:	e014      	b.n	8022a36 <dhcp_network_changed+0x66>
    case DHCP_STATE_OFF:
      /* stay off */
      break;
    default:
      LWIP_ASSERT("invalid dhcp->state", dhcp->state <= DHCP_STATE_BACKING_OFF);
 8022a0c:	68fb      	ldr	r3, [r7, #12]
 8022a0e:	795b      	ldrb	r3, [r3, #5]
 8022a10:	2b0c      	cmp	r3, #12
 8022a12:	d906      	bls.n	8022a22 <dhcp_network_changed+0x52>
 8022a14:	4b09      	ldr	r3, [pc, #36]	@ (8022a3c <dhcp_network_changed+0x6c>)
 8022a16:	f240 326d 	movw	r2, #877	@ 0x36d
 8022a1a:	4909      	ldr	r1, [pc, #36]	@ (8022a40 <dhcp_network_changed+0x70>)
 8022a1c:	4809      	ldr	r0, [pc, #36]	@ (8022a44 <dhcp_network_changed+0x74>)
 8022a1e:	f007 fbcd 	bl	802a1bc <iprintf>
        autoip_stop(netif);
        dhcp->autoip_coop_state = DHCP_AUTOIP_COOP_STATE_OFF;
      }
#endif /* LWIP_DHCP_AUTOIP_COOP */
      /* ensure we start with short timeouts, even if already discovering */
      dhcp->tries = 0;
 8022a22:	68fb      	ldr	r3, [r7, #12]
 8022a24:	2200      	movs	r2, #0
 8022a26:	719a      	strb	r2, [r3, #6]
      dhcp_discover(netif);
 8022a28:	6878      	ldr	r0, [r7, #4]
 8022a2a:	f000 f8af 	bl	8022b8c <dhcp_discover>
      break;
 8022a2e:	e002      	b.n	8022a36 <dhcp_network_changed+0x66>
    return;
 8022a30:	bf00      	nop
 8022a32:	e000      	b.n	8022a36 <dhcp_network_changed+0x66>
      break;
 8022a34:	bf00      	nop
  }
}
 8022a36:	3710      	adds	r7, #16
 8022a38:	46bd      	mov	sp, r7
 8022a3a:	bd80      	pop	{r7, pc}
 8022a3c:	080306e8 	.word	0x080306e8
 8022a40:	08030834 	.word	0x08030834
 8022a44:	08030748 	.word	0x08030748

08022a48 <dhcp_arp_reply>:
 * @param netif the network interface on which the reply was received
 * @param addr The IP address we received a reply from
 */
void
dhcp_arp_reply(struct netif *netif, const ip4_addr_t *addr)
{
 8022a48:	b580      	push	{r7, lr}
 8022a4a:	b084      	sub	sp, #16
 8022a4c:	af00      	add	r7, sp, #0
 8022a4e:	6078      	str	r0, [r7, #4]
 8022a50:	6039      	str	r1, [r7, #0]
  struct dhcp *dhcp;

  LWIP_ERROR("netif != NULL", (netif != NULL), return;);
 8022a52:	687b      	ldr	r3, [r7, #4]
 8022a54:	2b00      	cmp	r3, #0
 8022a56:	d107      	bne.n	8022a68 <dhcp_arp_reply+0x20>
 8022a58:	4b0e      	ldr	r3, [pc, #56]	@ (8022a94 <dhcp_arp_reply+0x4c>)
 8022a5a:	f240 328b 	movw	r2, #907	@ 0x38b
 8022a5e:	490e      	ldr	r1, [pc, #56]	@ (8022a98 <dhcp_arp_reply+0x50>)
 8022a60:	480e      	ldr	r0, [pc, #56]	@ (8022a9c <dhcp_arp_reply+0x54>)
 8022a62:	f007 fbab 	bl	802a1bc <iprintf>
 8022a66:	e012      	b.n	8022a8e <dhcp_arp_reply+0x46>
  dhcp = netif_dhcp_data(netif);
 8022a68:	687b      	ldr	r3, [r7, #4]
 8022a6a:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8022a6c:	60fb      	str	r3, [r7, #12]
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_arp_reply()\n"));
  /* is a DHCP client doing an ARP check? */
  if ((dhcp != NULL) && (dhcp->state == DHCP_STATE_CHECKING)) {
 8022a6e:	68fb      	ldr	r3, [r7, #12]
 8022a70:	2b00      	cmp	r3, #0
 8022a72:	d00c      	beq.n	8022a8e <dhcp_arp_reply+0x46>
 8022a74:	68fb      	ldr	r3, [r7, #12]
 8022a76:	795b      	ldrb	r3, [r3, #5]
 8022a78:	2b08      	cmp	r3, #8
 8022a7a:	d108      	bne.n	8022a8e <dhcp_arp_reply+0x46>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_arp_reply(): CHECKING, arp reply for 0x%08"X32_F"\n",
                ip4_addr_get_u32(addr)));
    /* did a host respond with the address we
       were offered by the DHCP server? */
    if (ip4_addr_cmp(addr, &dhcp->offered_ip_addr)) {
 8022a7c:	683b      	ldr	r3, [r7, #0]
 8022a7e:	681a      	ldr	r2, [r3, #0]
 8022a80:	68fb      	ldr	r3, [r7, #12]
 8022a82:	69db      	ldr	r3, [r3, #28]
 8022a84:	429a      	cmp	r2, r3
 8022a86:	d102      	bne.n	8022a8e <dhcp_arp_reply+0x46>
      /* we will not accept the offered address */
      LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE | LWIP_DBG_LEVEL_WARNING,
                  ("dhcp_arp_reply(): arp reply matched with offered address, declining\n"));
      dhcp_decline(netif);
 8022a88:	6878      	ldr	r0, [r7, #4]
 8022a8a:	f000 f809 	bl	8022aa0 <dhcp_decline>
    }
  }
}
 8022a8e:	3710      	adds	r7, #16
 8022a90:	46bd      	mov	sp, r7
 8022a92:	bd80      	pop	{r7, pc}
 8022a94:	080306e8 	.word	0x080306e8
 8022a98:	080307cc 	.word	0x080307cc
 8022a9c:	08030748 	.word	0x08030748

08022aa0 <dhcp_decline>:
 *
 * @param netif the netif under DHCP control
 */
static err_t
dhcp_decline(struct netif *netif)
{
 8022aa0:	b5b0      	push	{r4, r5, r7, lr}
 8022aa2:	b08a      	sub	sp, #40	@ 0x28
 8022aa4:	af02      	add	r7, sp, #8
 8022aa6:	6078      	str	r0, [r7, #4]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 8022aa8:	687b      	ldr	r3, [r7, #4]
 8022aaa:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8022aac:	61bb      	str	r3, [r7, #24]
  u16_t msecs;
  struct pbuf *p_out;
  u16_t options_out_len;

  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_decline()\n"));
  dhcp_set_state(dhcp, DHCP_STATE_BACKING_OFF);
 8022aae:	210c      	movs	r1, #12
 8022ab0:	69b8      	ldr	r0, [r7, #24]
 8022ab2:	f000 fc78 	bl	80233a6 <dhcp_set_state>
  /* create and initialize the DHCP message header */
  p_out = dhcp_create_msg(netif, dhcp, DHCP_DECLINE, &options_out_len);
 8022ab6:	f107 030c 	add.w	r3, r7, #12
 8022aba:	2204      	movs	r2, #4
 8022abc:	69b9      	ldr	r1, [r7, #24]
 8022abe:	6878      	ldr	r0, [r7, #4]
 8022ac0:	f001 f90a 	bl	8023cd8 <dhcp_create_msg>
 8022ac4:	6178      	str	r0, [r7, #20]
  if (p_out != NULL) {
 8022ac6:	697b      	ldr	r3, [r7, #20]
 8022ac8:	2b00      	cmp	r3, #0
 8022aca:	d035      	beq.n	8022b38 <dhcp_decline+0x98>
    struct dhcp_msg *msg_out = (struct dhcp_msg *)p_out->payload;
 8022acc:	697b      	ldr	r3, [r7, #20]
 8022ace:	685b      	ldr	r3, [r3, #4]
 8022ad0:	613b      	str	r3, [r7, #16]
    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_REQUESTED_IP, 4);
 8022ad2:	89b8      	ldrh	r0, [r7, #12]
 8022ad4:	693b      	ldr	r3, [r7, #16]
 8022ad6:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8022ada:	2304      	movs	r3, #4
 8022adc:	2232      	movs	r2, #50	@ 0x32
 8022ade:	f000 fc7d 	bl	80233dc <dhcp_option>
 8022ae2:	4603      	mov	r3, r0
 8022ae4:	81bb      	strh	r3, [r7, #12]
    options_out_len = dhcp_option_long(options_out_len, msg_out->options, lwip_ntohl(ip4_addr_get_u32(&dhcp->offered_ip_addr)));
 8022ae6:	89bc      	ldrh	r4, [r7, #12]
 8022ae8:	693b      	ldr	r3, [r7, #16]
 8022aea:	f103 05f0 	add.w	r5, r3, #240	@ 0xf0
 8022aee:	69bb      	ldr	r3, [r7, #24]
 8022af0:	69db      	ldr	r3, [r3, #28]
 8022af2:	4618      	mov	r0, r3
 8022af4:	f7f6 fc1d 	bl	8019332 <lwip_htonl>
 8022af8:	4603      	mov	r3, r0
 8022afa:	461a      	mov	r2, r3
 8022afc:	4629      	mov	r1, r5
 8022afe:	4620      	mov	r0, r4
 8022b00:	f000 fcf8 	bl	80234f4 <dhcp_option_long>
 8022b04:	4603      	mov	r3, r0
 8022b06:	81bb      	strh	r3, [r7, #12]

    LWIP_HOOK_DHCP_APPEND_OPTIONS(netif, dhcp, DHCP_STATE_BACKING_OFF, msg_out, DHCP_DECLINE, &options_out_len);
    dhcp_option_trailer(options_out_len, msg_out->options, p_out);
 8022b08:	89b8      	ldrh	r0, [r7, #12]
 8022b0a:	693b      	ldr	r3, [r7, #16]
 8022b0c:	33f0      	adds	r3, #240	@ 0xf0
 8022b0e:	697a      	ldr	r2, [r7, #20]
 8022b10:	4619      	mov	r1, r3
 8022b12:	f001 f9b7 	bl	8023e84 <dhcp_option_trailer>

    /* per section 4.4.4, broadcast DECLINE messages */
    result = udp_sendto_if_src(dhcp_pcb, p_out, IP_ADDR_BROADCAST, LWIP_IANA_PORT_DHCP_SERVER, netif, IP4_ADDR_ANY);
 8022b16:	4b19      	ldr	r3, [pc, #100]	@ (8022b7c <dhcp_decline+0xdc>)
 8022b18:	6818      	ldr	r0, [r3, #0]
 8022b1a:	4b19      	ldr	r3, [pc, #100]	@ (8022b80 <dhcp_decline+0xe0>)
 8022b1c:	9301      	str	r3, [sp, #4]
 8022b1e:	687b      	ldr	r3, [r7, #4]
 8022b20:	9300      	str	r3, [sp, #0]
 8022b22:	2343      	movs	r3, #67	@ 0x43
 8022b24:	4a17      	ldr	r2, [pc, #92]	@ (8022b84 <dhcp_decline+0xe4>)
 8022b26:	6979      	ldr	r1, [r7, #20]
 8022b28:	f7ff f88a 	bl	8021c40 <udp_sendto_if_src>
 8022b2c:	4603      	mov	r3, r0
 8022b2e:	77fb      	strb	r3, [r7, #31]
    pbuf_free(p_out);
 8022b30:	6978      	ldr	r0, [r7, #20]
 8022b32:	f7f8 f8cb 	bl	801accc <pbuf_free>
 8022b36:	e001      	b.n	8022b3c <dhcp_decline+0x9c>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_decline: BACKING OFF\n"));
  } else {
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS,
                ("dhcp_decline: could not allocate DHCP request\n"));
    result = ERR_MEM;
 8022b38:	23ff      	movs	r3, #255	@ 0xff
 8022b3a:	77fb      	strb	r3, [r7, #31]
  }
  if (dhcp->tries < 255) {
 8022b3c:	69bb      	ldr	r3, [r7, #24]
 8022b3e:	799b      	ldrb	r3, [r3, #6]
 8022b40:	2bff      	cmp	r3, #255	@ 0xff
 8022b42:	d005      	beq.n	8022b50 <dhcp_decline+0xb0>
    dhcp->tries++;
 8022b44:	69bb      	ldr	r3, [r7, #24]
 8022b46:	799b      	ldrb	r3, [r3, #6]
 8022b48:	3301      	adds	r3, #1
 8022b4a:	b2da      	uxtb	r2, r3
 8022b4c:	69bb      	ldr	r3, [r7, #24]
 8022b4e:	719a      	strb	r2, [r3, #6]
  }
  msecs = 10 * 1000;
 8022b50:	f242 7310 	movw	r3, #10000	@ 0x2710
 8022b54:	81fb      	strh	r3, [r7, #14]
  dhcp->request_timeout = (u16_t)((msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS);
 8022b56:	89fb      	ldrh	r3, [r7, #14]
 8022b58:	f203 13f3 	addw	r3, r3, #499	@ 0x1f3
 8022b5c:	4a0a      	ldr	r2, [pc, #40]	@ (8022b88 <dhcp_decline+0xe8>)
 8022b5e:	fb82 1203 	smull	r1, r2, r2, r3
 8022b62:	1152      	asrs	r2, r2, #5
 8022b64:	17db      	asrs	r3, r3, #31
 8022b66:	1ad3      	subs	r3, r2, r3
 8022b68:	b29a      	uxth	r2, r3
 8022b6a:	69bb      	ldr	r3, [r7, #24]
 8022b6c:	811a      	strh	r2, [r3, #8]
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_decline(): set request timeout %"U16_F" msecs\n", msecs));
  return result;
 8022b6e:	f997 301f 	ldrsb.w	r3, [r7, #31]
}
 8022b72:	4618      	mov	r0, r3
 8022b74:	3720      	adds	r7, #32
 8022b76:	46bd      	mov	sp, r7
 8022b78:	bdb0      	pop	{r4, r5, r7, pc}
 8022b7a:	bf00      	nop
 8022b7c:	2402afe4 	.word	0x2402afe4
 8022b80:	080314f4 	.word	0x080314f4
 8022b84:	080314f8 	.word	0x080314f8
 8022b88:	10624dd3 	.word	0x10624dd3

08022b8c <dhcp_discover>:
 *
 * @param netif the netif under DHCP control
 */
static err_t
dhcp_discover(struct netif *netif)
{
 8022b8c:	b580      	push	{r7, lr}
 8022b8e:	b08a      	sub	sp, #40	@ 0x28
 8022b90:	af02      	add	r7, sp, #8
 8022b92:	6078      	str	r0, [r7, #4]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 8022b94:	687b      	ldr	r3, [r7, #4]
 8022b96:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8022b98:	61bb      	str	r3, [r7, #24]
  err_t result = ERR_OK;
 8022b9a:	2300      	movs	r3, #0
 8022b9c:	75fb      	strb	r3, [r7, #23]
  struct pbuf *p_out;
  u16_t options_out_len;

  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_discover()\n"));

  ip4_addr_set_any(&dhcp->offered_ip_addr);
 8022b9e:	69bb      	ldr	r3, [r7, #24]
 8022ba0:	2200      	movs	r2, #0
 8022ba2:	61da      	str	r2, [r3, #28]
  dhcp_set_state(dhcp, DHCP_STATE_SELECTING);
 8022ba4:	2106      	movs	r1, #6
 8022ba6:	69b8      	ldr	r0, [r7, #24]
 8022ba8:	f000 fbfd 	bl	80233a6 <dhcp_set_state>
  /* create and initialize the DHCP message header */
  p_out = dhcp_create_msg(netif, dhcp, DHCP_DISCOVER, &options_out_len);
 8022bac:	f107 0308 	add.w	r3, r7, #8
 8022bb0:	2201      	movs	r2, #1
 8022bb2:	69b9      	ldr	r1, [r7, #24]
 8022bb4:	6878      	ldr	r0, [r7, #4]
 8022bb6:	f001 f88f 	bl	8023cd8 <dhcp_create_msg>
 8022bba:	6138      	str	r0, [r7, #16]
  if (p_out != NULL) {
 8022bbc:	693b      	ldr	r3, [r7, #16]
 8022bbe:	2b00      	cmp	r3, #0
 8022bc0:	d04b      	beq.n	8022c5a <dhcp_discover+0xce>
    struct dhcp_msg *msg_out = (struct dhcp_msg *)p_out->payload;
 8022bc2:	693b      	ldr	r3, [r7, #16]
 8022bc4:	685b      	ldr	r3, [r3, #4]
 8022bc6:	60fb      	str	r3, [r7, #12]
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_discover: making request\n"));

    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_MAX_MSG_SIZE, DHCP_OPTION_MAX_MSG_SIZE_LEN);
 8022bc8:	8938      	ldrh	r0, [r7, #8]
 8022bca:	68fb      	ldr	r3, [r7, #12]
 8022bcc:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8022bd0:	2302      	movs	r3, #2
 8022bd2:	2239      	movs	r2, #57	@ 0x39
 8022bd4:	f000 fc02 	bl	80233dc <dhcp_option>
 8022bd8:	4603      	mov	r3, r0
 8022bda:	813b      	strh	r3, [r7, #8]
    options_out_len = dhcp_option_short(options_out_len, msg_out->options, DHCP_MAX_MSG_LEN(netif));
 8022bdc:	8938      	ldrh	r0, [r7, #8]
 8022bde:	68fb      	ldr	r3, [r7, #12]
 8022be0:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8022be4:	687b      	ldr	r3, [r7, #4]
 8022be6:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 8022be8:	461a      	mov	r2, r3
 8022bea:	f000 fc51 	bl	8023490 <dhcp_option_short>
 8022bee:	4603      	mov	r3, r0
 8022bf0:	813b      	strh	r3, [r7, #8]

    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_PARAMETER_REQUEST_LIST, LWIP_ARRAYSIZE(dhcp_discover_request_options));
 8022bf2:	8938      	ldrh	r0, [r7, #8]
 8022bf4:	68fb      	ldr	r3, [r7, #12]
 8022bf6:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8022bfa:	2303      	movs	r3, #3
 8022bfc:	2237      	movs	r2, #55	@ 0x37
 8022bfe:	f000 fbed 	bl	80233dc <dhcp_option>
 8022c02:	4603      	mov	r3, r0
 8022c04:	813b      	strh	r3, [r7, #8]
    for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
 8022c06:	2300      	movs	r3, #0
 8022c08:	77fb      	strb	r3, [r7, #31]
 8022c0a:	e00e      	b.n	8022c2a <dhcp_discover+0x9e>
      options_out_len = dhcp_option_byte(options_out_len, msg_out->options, dhcp_discover_request_options[i]);
 8022c0c:	8938      	ldrh	r0, [r7, #8]
 8022c0e:	68fb      	ldr	r3, [r7, #12]
 8022c10:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8022c14:	7ffb      	ldrb	r3, [r7, #31]
 8022c16:	4a29      	ldr	r2, [pc, #164]	@ (8022cbc <dhcp_discover+0x130>)
 8022c18:	5cd3      	ldrb	r3, [r2, r3]
 8022c1a:	461a      	mov	r2, r3
 8022c1c:	f000 fc12 	bl	8023444 <dhcp_option_byte>
 8022c20:	4603      	mov	r3, r0
 8022c22:	813b      	strh	r3, [r7, #8]
    for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
 8022c24:	7ffb      	ldrb	r3, [r7, #31]
 8022c26:	3301      	adds	r3, #1
 8022c28:	77fb      	strb	r3, [r7, #31]
 8022c2a:	7ffb      	ldrb	r3, [r7, #31]
 8022c2c:	2b02      	cmp	r3, #2
 8022c2e:	d9ed      	bls.n	8022c0c <dhcp_discover+0x80>
    }
    LWIP_HOOK_DHCP_APPEND_OPTIONS(netif, dhcp, DHCP_STATE_SELECTING, msg_out, DHCP_DISCOVER, &options_out_len);
    dhcp_option_trailer(options_out_len, msg_out->options, p_out);
 8022c30:	8938      	ldrh	r0, [r7, #8]
 8022c32:	68fb      	ldr	r3, [r7, #12]
 8022c34:	33f0      	adds	r3, #240	@ 0xf0
 8022c36:	693a      	ldr	r2, [r7, #16]
 8022c38:	4619      	mov	r1, r3
 8022c3a:	f001 f923 	bl	8023e84 <dhcp_option_trailer>

    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_discover: sendto(DISCOVER, IP_ADDR_BROADCAST, LWIP_IANA_PORT_DHCP_SERVER)\n"));
    udp_sendto_if_src(dhcp_pcb, p_out, IP_ADDR_BROADCAST, LWIP_IANA_PORT_DHCP_SERVER, netif, IP4_ADDR_ANY);
 8022c3e:	4b20      	ldr	r3, [pc, #128]	@ (8022cc0 <dhcp_discover+0x134>)
 8022c40:	6818      	ldr	r0, [r3, #0]
 8022c42:	4b20      	ldr	r3, [pc, #128]	@ (8022cc4 <dhcp_discover+0x138>)
 8022c44:	9301      	str	r3, [sp, #4]
 8022c46:	687b      	ldr	r3, [r7, #4]
 8022c48:	9300      	str	r3, [sp, #0]
 8022c4a:	2343      	movs	r3, #67	@ 0x43
 8022c4c:	4a1e      	ldr	r2, [pc, #120]	@ (8022cc8 <dhcp_discover+0x13c>)
 8022c4e:	6939      	ldr	r1, [r7, #16]
 8022c50:	f7fe fff6 	bl	8021c40 <udp_sendto_if_src>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_discover: deleting()ing\n"));
    pbuf_free(p_out);
 8022c54:	6938      	ldr	r0, [r7, #16]
 8022c56:	f7f8 f839 	bl	801accc <pbuf_free>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_discover: SELECTING\n"));
  } else {
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("dhcp_discover: could not allocate DHCP request\n"));
  }
  if (dhcp->tries < 255) {
 8022c5a:	69bb      	ldr	r3, [r7, #24]
 8022c5c:	799b      	ldrb	r3, [r3, #6]
 8022c5e:	2bff      	cmp	r3, #255	@ 0xff
 8022c60:	d005      	beq.n	8022c6e <dhcp_discover+0xe2>
    dhcp->tries++;
 8022c62:	69bb      	ldr	r3, [r7, #24]
 8022c64:	799b      	ldrb	r3, [r3, #6]
 8022c66:	3301      	adds	r3, #1
 8022c68:	b2da      	uxtb	r2, r3
 8022c6a:	69bb      	ldr	r3, [r7, #24]
 8022c6c:	719a      	strb	r2, [r3, #6]
  if (dhcp->tries >= LWIP_DHCP_AUTOIP_COOP_TRIES && dhcp->autoip_coop_state == DHCP_AUTOIP_COOP_STATE_OFF) {
    dhcp->autoip_coop_state = DHCP_AUTOIP_COOP_STATE_ON;
    autoip_start(netif);
  }
#endif /* LWIP_DHCP_AUTOIP_COOP */
  msecs = (u16_t)((dhcp->tries < 6 ? 1 << dhcp->tries : 60) * 1000);
 8022c6e:	69bb      	ldr	r3, [r7, #24]
 8022c70:	799b      	ldrb	r3, [r3, #6]
 8022c72:	2b05      	cmp	r3, #5
 8022c74:	d80d      	bhi.n	8022c92 <dhcp_discover+0x106>
 8022c76:	69bb      	ldr	r3, [r7, #24]
 8022c78:	799b      	ldrb	r3, [r3, #6]
 8022c7a:	461a      	mov	r2, r3
 8022c7c:	2301      	movs	r3, #1
 8022c7e:	4093      	lsls	r3, r2
 8022c80:	b29b      	uxth	r3, r3
 8022c82:	461a      	mov	r2, r3
 8022c84:	0152      	lsls	r2, r2, #5
 8022c86:	1ad2      	subs	r2, r2, r3
 8022c88:	0092      	lsls	r2, r2, #2
 8022c8a:	4413      	add	r3, r2
 8022c8c:	00db      	lsls	r3, r3, #3
 8022c8e:	b29b      	uxth	r3, r3
 8022c90:	e001      	b.n	8022c96 <dhcp_discover+0x10a>
 8022c92:	f64e 2360 	movw	r3, #60000	@ 0xea60
 8022c96:	817b      	strh	r3, [r7, #10]
  dhcp->request_timeout = (u16_t)((msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS);
 8022c98:	897b      	ldrh	r3, [r7, #10]
 8022c9a:	f203 13f3 	addw	r3, r3, #499	@ 0x1f3
 8022c9e:	4a0b      	ldr	r2, [pc, #44]	@ (8022ccc <dhcp_discover+0x140>)
 8022ca0:	fb82 1203 	smull	r1, r2, r2, r3
 8022ca4:	1152      	asrs	r2, r2, #5
 8022ca6:	17db      	asrs	r3, r3, #31
 8022ca8:	1ad3      	subs	r3, r2, r3
 8022caa:	b29a      	uxth	r2, r3
 8022cac:	69bb      	ldr	r3, [r7, #24]
 8022cae:	811a      	strh	r2, [r3, #8]
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_discover(): set request timeout %"U16_F" msecs\n", msecs));
  return result;
 8022cb0:	f997 3017 	ldrsb.w	r3, [r7, #23]
}
 8022cb4:	4618      	mov	r0, r3
 8022cb6:	3720      	adds	r7, #32
 8022cb8:	46bd      	mov	sp, r7
 8022cba:	bd80      	pop	{r7, pc}
 8022cbc:	24000058 	.word	0x24000058
 8022cc0:	2402afe4 	.word	0x2402afe4
 8022cc4:	080314f4 	.word	0x080314f4
 8022cc8:	080314f8 	.word	0x080314f8
 8022ccc:	10624dd3 	.word	0x10624dd3

08022cd0 <dhcp_bind>:
 *
 * @param netif network interface to bind to the offered address
 */
static void
dhcp_bind(struct netif *netif)
{
 8022cd0:	b580      	push	{r7, lr}
 8022cd2:	b088      	sub	sp, #32
 8022cd4:	af00      	add	r7, sp, #0
 8022cd6:	6078      	str	r0, [r7, #4]
  u32_t timeout;
  struct dhcp *dhcp;
  ip4_addr_t sn_mask, gw_addr;
  LWIP_ERROR("dhcp_bind: netif != NULL", (netif != NULL), return;);
 8022cd8:	687b      	ldr	r3, [r7, #4]
 8022cda:	2b00      	cmp	r3, #0
 8022cdc:	d107      	bne.n	8022cee <dhcp_bind+0x1e>
 8022cde:	4b64      	ldr	r3, [pc, #400]	@ (8022e70 <dhcp_bind+0x1a0>)
 8022ce0:	f240 4215 	movw	r2, #1045	@ 0x415
 8022ce4:	4963      	ldr	r1, [pc, #396]	@ (8022e74 <dhcp_bind+0x1a4>)
 8022ce6:	4864      	ldr	r0, [pc, #400]	@ (8022e78 <dhcp_bind+0x1a8>)
 8022ce8:	f007 fa68 	bl	802a1bc <iprintf>
 8022cec:	e0bc      	b.n	8022e68 <dhcp_bind+0x198>
  dhcp = netif_dhcp_data(netif);
 8022cee:	687b      	ldr	r3, [r7, #4]
 8022cf0:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8022cf2:	61fb      	str	r3, [r7, #28]
  LWIP_ERROR("dhcp_bind: dhcp != NULL", (dhcp != NULL), return;);
 8022cf4:	69fb      	ldr	r3, [r7, #28]
 8022cf6:	2b00      	cmp	r3, #0
 8022cf8:	d107      	bne.n	8022d0a <dhcp_bind+0x3a>
 8022cfa:	4b5d      	ldr	r3, [pc, #372]	@ (8022e70 <dhcp_bind+0x1a0>)
 8022cfc:	f240 4217 	movw	r2, #1047	@ 0x417
 8022d00:	495e      	ldr	r1, [pc, #376]	@ (8022e7c <dhcp_bind+0x1ac>)
 8022d02:	485d      	ldr	r0, [pc, #372]	@ (8022e78 <dhcp_bind+0x1a8>)
 8022d04:	f007 fa5a 	bl	802a1bc <iprintf>
 8022d08:	e0ae      	b.n	8022e68 <dhcp_bind+0x198>
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_bind(netif=%p) %c%c%"U16_F"\n", (void *)netif, netif->name[0], netif->name[1], (u16_t)netif->num));

  /* reset time used of lease */
  dhcp->lease_used = 0;
 8022d0a:	69fb      	ldr	r3, [r7, #28]
 8022d0c:	2200      	movs	r2, #0
 8022d0e:	825a      	strh	r2, [r3, #18]

  if (dhcp->offered_t0_lease != 0xffffffffUL) {
 8022d10:	69fb      	ldr	r3, [r7, #28]
 8022d12:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 8022d14:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8022d18:	d019      	beq.n	8022d4e <dhcp_bind+0x7e>
    /* set renewal period timer */
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_bind(): t0 renewal timer %"U32_F" secs\n", dhcp->offered_t0_lease));
    timeout = (dhcp->offered_t0_lease + DHCP_COARSE_TIMER_SECS / 2) / DHCP_COARSE_TIMER_SECS;
 8022d1a:	69fb      	ldr	r3, [r7, #28]
 8022d1c:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 8022d1e:	331e      	adds	r3, #30
 8022d20:	4a57      	ldr	r2, [pc, #348]	@ (8022e80 <dhcp_bind+0x1b0>)
 8022d22:	fba2 2303 	umull	r2, r3, r2, r3
 8022d26:	095b      	lsrs	r3, r3, #5
 8022d28:	61bb      	str	r3, [r7, #24]
    if (timeout > 0xffff) {
 8022d2a:	69bb      	ldr	r3, [r7, #24]
 8022d2c:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 8022d30:	d302      	bcc.n	8022d38 <dhcp_bind+0x68>
      timeout = 0xffff;
 8022d32:	f64f 73ff 	movw	r3, #65535	@ 0xffff
 8022d36:	61bb      	str	r3, [r7, #24]
    }
    dhcp->t0_timeout = (u16_t)timeout;
 8022d38:	69bb      	ldr	r3, [r7, #24]
 8022d3a:	b29a      	uxth	r2, r3
 8022d3c:	69fb      	ldr	r3, [r7, #28]
 8022d3e:	829a      	strh	r2, [r3, #20]
    if (dhcp->t0_timeout == 0) {
 8022d40:	69fb      	ldr	r3, [r7, #28]
 8022d42:	8a9b      	ldrh	r3, [r3, #20]
 8022d44:	2b00      	cmp	r3, #0
 8022d46:	d102      	bne.n	8022d4e <dhcp_bind+0x7e>
      dhcp->t0_timeout = 1;
 8022d48:	69fb      	ldr	r3, [r7, #28]
 8022d4a:	2201      	movs	r2, #1
 8022d4c:	829a      	strh	r2, [r3, #20]
    }
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_bind(): set request timeout %"U32_F" msecs\n", dhcp->offered_t0_lease * 1000));
  }

  /* temporary DHCP lease? */
  if (dhcp->offered_t1_renew != 0xffffffffUL) {
 8022d4e:	69fb      	ldr	r3, [r7, #28]
 8022d50:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8022d52:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8022d56:	d01d      	beq.n	8022d94 <dhcp_bind+0xc4>
    /* set renewal period timer */
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_bind(): t1 renewal timer %"U32_F" secs\n", dhcp->offered_t1_renew));
    timeout = (dhcp->offered_t1_renew + DHCP_COARSE_TIMER_SECS / 2) / DHCP_COARSE_TIMER_SECS;
 8022d58:	69fb      	ldr	r3, [r7, #28]
 8022d5a:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8022d5c:	331e      	adds	r3, #30
 8022d5e:	4a48      	ldr	r2, [pc, #288]	@ (8022e80 <dhcp_bind+0x1b0>)
 8022d60:	fba2 2303 	umull	r2, r3, r2, r3
 8022d64:	095b      	lsrs	r3, r3, #5
 8022d66:	61bb      	str	r3, [r7, #24]
    if (timeout > 0xffff) {
 8022d68:	69bb      	ldr	r3, [r7, #24]
 8022d6a:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 8022d6e:	d302      	bcc.n	8022d76 <dhcp_bind+0xa6>
      timeout = 0xffff;
 8022d70:	f64f 73ff 	movw	r3, #65535	@ 0xffff
 8022d74:	61bb      	str	r3, [r7, #24]
    }
    dhcp->t1_timeout = (u16_t)timeout;
 8022d76:	69bb      	ldr	r3, [r7, #24]
 8022d78:	b29a      	uxth	r2, r3
 8022d7a:	69fb      	ldr	r3, [r7, #28]
 8022d7c:	815a      	strh	r2, [r3, #10]
    if (dhcp->t1_timeout == 0) {
 8022d7e:	69fb      	ldr	r3, [r7, #28]
 8022d80:	895b      	ldrh	r3, [r3, #10]
 8022d82:	2b00      	cmp	r3, #0
 8022d84:	d102      	bne.n	8022d8c <dhcp_bind+0xbc>
      dhcp->t1_timeout = 1;
 8022d86:	69fb      	ldr	r3, [r7, #28]
 8022d88:	2201      	movs	r2, #1
 8022d8a:	815a      	strh	r2, [r3, #10]
    }
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_bind(): set request timeout %"U32_F" msecs\n", dhcp->offered_t1_renew * 1000));
    dhcp->t1_renew_time = dhcp->t1_timeout;
 8022d8c:	69fb      	ldr	r3, [r7, #28]
 8022d8e:	895a      	ldrh	r2, [r3, #10]
 8022d90:	69fb      	ldr	r3, [r7, #28]
 8022d92:	81da      	strh	r2, [r3, #14]
  }
  /* set renewal period timer */
  if (dhcp->offered_t2_rebind != 0xffffffffUL) {
 8022d94:	69fb      	ldr	r3, [r7, #28]
 8022d96:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8022d98:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8022d9c:	d01d      	beq.n	8022dda <dhcp_bind+0x10a>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_bind(): t2 rebind timer %"U32_F" secs\n", dhcp->offered_t2_rebind));
    timeout = (dhcp->offered_t2_rebind + DHCP_COARSE_TIMER_SECS / 2) / DHCP_COARSE_TIMER_SECS;
 8022d9e:	69fb      	ldr	r3, [r7, #28]
 8022da0:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8022da2:	331e      	adds	r3, #30
 8022da4:	4a36      	ldr	r2, [pc, #216]	@ (8022e80 <dhcp_bind+0x1b0>)
 8022da6:	fba2 2303 	umull	r2, r3, r2, r3
 8022daa:	095b      	lsrs	r3, r3, #5
 8022dac:	61bb      	str	r3, [r7, #24]
    if (timeout > 0xffff) {
 8022dae:	69bb      	ldr	r3, [r7, #24]
 8022db0:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 8022db4:	d302      	bcc.n	8022dbc <dhcp_bind+0xec>
      timeout = 0xffff;
 8022db6:	f64f 73ff 	movw	r3, #65535	@ 0xffff
 8022dba:	61bb      	str	r3, [r7, #24]
    }
    dhcp->t2_timeout = (u16_t)timeout;
 8022dbc:	69bb      	ldr	r3, [r7, #24]
 8022dbe:	b29a      	uxth	r2, r3
 8022dc0:	69fb      	ldr	r3, [r7, #28]
 8022dc2:	819a      	strh	r2, [r3, #12]
    if (dhcp->t2_timeout == 0) {
 8022dc4:	69fb      	ldr	r3, [r7, #28]
 8022dc6:	899b      	ldrh	r3, [r3, #12]
 8022dc8:	2b00      	cmp	r3, #0
 8022dca:	d102      	bne.n	8022dd2 <dhcp_bind+0x102>
      dhcp->t2_timeout = 1;
 8022dcc:	69fb      	ldr	r3, [r7, #28]
 8022dce:	2201      	movs	r2, #1
 8022dd0:	819a      	strh	r2, [r3, #12]
    }
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_bind(): set request timeout %"U32_F" msecs\n", dhcp->offered_t2_rebind * 1000));
    dhcp->t2_rebind_time = dhcp->t2_timeout;
 8022dd2:	69fb      	ldr	r3, [r7, #28]
 8022dd4:	899a      	ldrh	r2, [r3, #12]
 8022dd6:	69fb      	ldr	r3, [r7, #28]
 8022dd8:	821a      	strh	r2, [r3, #16]
  }

  /* If we have sub 1 minute lease, t2 and t1 will kick in at the same time. */
  if ((dhcp->t1_timeout >= dhcp->t2_timeout) && (dhcp->t2_timeout > 0)) {
 8022dda:	69fb      	ldr	r3, [r7, #28]
 8022ddc:	895a      	ldrh	r2, [r3, #10]
 8022dde:	69fb      	ldr	r3, [r7, #28]
 8022de0:	899b      	ldrh	r3, [r3, #12]
 8022de2:	429a      	cmp	r2, r3
 8022de4:	d306      	bcc.n	8022df4 <dhcp_bind+0x124>
 8022de6:	69fb      	ldr	r3, [r7, #28]
 8022de8:	899b      	ldrh	r3, [r3, #12]
 8022dea:	2b00      	cmp	r3, #0
 8022dec:	d002      	beq.n	8022df4 <dhcp_bind+0x124>
    dhcp->t1_timeout = 0;
 8022dee:	69fb      	ldr	r3, [r7, #28]
 8022df0:	2200      	movs	r2, #0
 8022df2:	815a      	strh	r2, [r3, #10]
  }

  if (dhcp->subnet_mask_given) {
 8022df4:	69fb      	ldr	r3, [r7, #28]
 8022df6:	79db      	ldrb	r3, [r3, #7]
 8022df8:	2b00      	cmp	r3, #0
 8022dfa:	d003      	beq.n	8022e04 <dhcp_bind+0x134>
    /* copy offered network mask */
    ip4_addr_copy(sn_mask, dhcp->offered_sn_mask);
 8022dfc:	69fb      	ldr	r3, [r7, #28]
 8022dfe:	6a1b      	ldr	r3, [r3, #32]
 8022e00:	613b      	str	r3, [r7, #16]
 8022e02:	e014      	b.n	8022e2e <dhcp_bind+0x15e>
  } else {
    /* subnet mask not given, choose a safe subnet mask given the network class */
    u8_t first_octet = ip4_addr1(&dhcp->offered_ip_addr);
 8022e04:	69fb      	ldr	r3, [r7, #28]
 8022e06:	331c      	adds	r3, #28
 8022e08:	781b      	ldrb	r3, [r3, #0]
 8022e0a:	75fb      	strb	r3, [r7, #23]
    if (first_octet <= 127) {
 8022e0c:	f997 3017 	ldrsb.w	r3, [r7, #23]
 8022e10:	2b00      	cmp	r3, #0
 8022e12:	db02      	blt.n	8022e1a <dhcp_bind+0x14a>
      ip4_addr_set_u32(&sn_mask, PP_HTONL(0xff000000UL));
 8022e14:	23ff      	movs	r3, #255	@ 0xff
 8022e16:	613b      	str	r3, [r7, #16]
 8022e18:	e009      	b.n	8022e2e <dhcp_bind+0x15e>
    } else if (first_octet >= 192) {
 8022e1a:	7dfb      	ldrb	r3, [r7, #23]
 8022e1c:	2bbf      	cmp	r3, #191	@ 0xbf
 8022e1e:	d903      	bls.n	8022e28 <dhcp_bind+0x158>
      ip4_addr_set_u32(&sn_mask, PP_HTONL(0xffffff00UL));
 8022e20:	f06f 437f 	mvn.w	r3, #4278190080	@ 0xff000000
 8022e24:	613b      	str	r3, [r7, #16]
 8022e26:	e002      	b.n	8022e2e <dhcp_bind+0x15e>
    } else {
      ip4_addr_set_u32(&sn_mask, PP_HTONL(0xffff0000UL));
 8022e28:	f64f 73ff 	movw	r3, #65535	@ 0xffff
 8022e2c:	613b      	str	r3, [r7, #16]
    }
  }

  ip4_addr_copy(gw_addr, dhcp->offered_gw_addr);
 8022e2e:	69fb      	ldr	r3, [r7, #28]
 8022e30:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8022e32:	60fb      	str	r3, [r7, #12]
  /* gateway address not given? */
  if (ip4_addr_isany_val(gw_addr)) {
 8022e34:	68fb      	ldr	r3, [r7, #12]
 8022e36:	2b00      	cmp	r3, #0
 8022e38:	d108      	bne.n	8022e4c <dhcp_bind+0x17c>
    /* copy network address */
    ip4_addr_get_network(&gw_addr, &dhcp->offered_ip_addr, &sn_mask);
 8022e3a:	69fb      	ldr	r3, [r7, #28]
 8022e3c:	69da      	ldr	r2, [r3, #28]
 8022e3e:	693b      	ldr	r3, [r7, #16]
 8022e40:	4013      	ands	r3, r2
 8022e42:	60fb      	str	r3, [r7, #12]
    /* use first host address on network as gateway */
    ip4_addr_set_u32(&gw_addr, ip4_addr_get_u32(&gw_addr) | PP_HTONL(0x00000001UL));
 8022e44:	68fb      	ldr	r3, [r7, #12]
 8022e46:	f043 7380 	orr.w	r3, r3, #16777216	@ 0x1000000
 8022e4a:	60fb      	str	r3, [r7, #12]

  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_STATE, ("dhcp_bind(): IP: 0x%08"X32_F" SN: 0x%08"X32_F" GW: 0x%08"X32_F"\n",
              ip4_addr_get_u32(&dhcp->offered_ip_addr), ip4_addr_get_u32(&sn_mask), ip4_addr_get_u32(&gw_addr)));
  /* netif is now bound to DHCP leased address - set this before assigning the address
     to ensure the callback can use dhcp_supplied_address() */
  dhcp_set_state(dhcp, DHCP_STATE_BOUND);
 8022e4c:	210a      	movs	r1, #10
 8022e4e:	69f8      	ldr	r0, [r7, #28]
 8022e50:	f000 faa9 	bl	80233a6 <dhcp_set_state>

  netif_set_addr(netif, &dhcp->offered_ip_addr, &sn_mask, &gw_addr);
 8022e54:	69fb      	ldr	r3, [r7, #28]
 8022e56:	f103 011c 	add.w	r1, r3, #28
 8022e5a:	f107 030c 	add.w	r3, r7, #12
 8022e5e:	f107 0210 	add.w	r2, r7, #16
 8022e62:	6878      	ldr	r0, [r7, #4]
 8022e64:	f7f7 f9e8 	bl	801a238 <netif_set_addr>
  /* interface is used by routing now that an address is set */
}
 8022e68:	3720      	adds	r7, #32
 8022e6a:	46bd      	mov	sp, r7
 8022e6c:	bd80      	pop	{r7, pc}
 8022e6e:	bf00      	nop
 8022e70:	080306e8 	.word	0x080306e8
 8022e74:	08030848 	.word	0x08030848
 8022e78:	08030748 	.word	0x08030748
 8022e7c:	08030864 	.word	0x08030864
 8022e80:	88888889 	.word	0x88888889

08022e84 <dhcp_renew>:
 *
 * @param netif network interface which must renew its lease
 */
err_t
dhcp_renew(struct netif *netif)
{
 8022e84:	b580      	push	{r7, lr}
 8022e86:	b08a      	sub	sp, #40	@ 0x28
 8022e88:	af02      	add	r7, sp, #8
 8022e8a:	6078      	str	r0, [r7, #4]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 8022e8c:	687b      	ldr	r3, [r7, #4]
 8022e8e:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8022e90:	61bb      	str	r3, [r7, #24]
  u16_t msecs;
  u8_t i;
  struct pbuf *p_out;
  u16_t options_out_len;

  LWIP_ASSERT_CORE_LOCKED();
 8022e92:	f7ed fdf3 	bl	8010a7c <sys_check_core_locking>
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_renew()\n"));
  dhcp_set_state(dhcp, DHCP_STATE_RENEWING);
 8022e96:	2105      	movs	r1, #5
 8022e98:	69b8      	ldr	r0, [r7, #24]
 8022e9a:	f000 fa84 	bl	80233a6 <dhcp_set_state>

  /* create and initialize the DHCP message header */
  p_out = dhcp_create_msg(netif, dhcp, DHCP_REQUEST, &options_out_len);
 8022e9e:	f107 030c 	add.w	r3, r7, #12
 8022ea2:	2203      	movs	r2, #3
 8022ea4:	69b9      	ldr	r1, [r7, #24]
 8022ea6:	6878      	ldr	r0, [r7, #4]
 8022ea8:	f000 ff16 	bl	8023cd8 <dhcp_create_msg>
 8022eac:	6178      	str	r0, [r7, #20]
  if (p_out != NULL) {
 8022eae:	697b      	ldr	r3, [r7, #20]
 8022eb0:	2b00      	cmp	r3, #0
 8022eb2:	d04e      	beq.n	8022f52 <dhcp_renew+0xce>
    struct dhcp_msg *msg_out = (struct dhcp_msg *)p_out->payload;
 8022eb4:	697b      	ldr	r3, [r7, #20]
 8022eb6:	685b      	ldr	r3, [r3, #4]
 8022eb8:	613b      	str	r3, [r7, #16]
    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_MAX_MSG_SIZE, DHCP_OPTION_MAX_MSG_SIZE_LEN);
 8022eba:	89b8      	ldrh	r0, [r7, #12]
 8022ebc:	693b      	ldr	r3, [r7, #16]
 8022ebe:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8022ec2:	2302      	movs	r3, #2
 8022ec4:	2239      	movs	r2, #57	@ 0x39
 8022ec6:	f000 fa89 	bl	80233dc <dhcp_option>
 8022eca:	4603      	mov	r3, r0
 8022ecc:	81bb      	strh	r3, [r7, #12]
    options_out_len = dhcp_option_short(options_out_len, msg_out->options, DHCP_MAX_MSG_LEN(netif));
 8022ece:	89b8      	ldrh	r0, [r7, #12]
 8022ed0:	693b      	ldr	r3, [r7, #16]
 8022ed2:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8022ed6:	687b      	ldr	r3, [r7, #4]
 8022ed8:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 8022eda:	461a      	mov	r2, r3
 8022edc:	f000 fad8 	bl	8023490 <dhcp_option_short>
 8022ee0:	4603      	mov	r3, r0
 8022ee2:	81bb      	strh	r3, [r7, #12]

    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_PARAMETER_REQUEST_LIST, LWIP_ARRAYSIZE(dhcp_discover_request_options));
 8022ee4:	89b8      	ldrh	r0, [r7, #12]
 8022ee6:	693b      	ldr	r3, [r7, #16]
 8022ee8:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8022eec:	2303      	movs	r3, #3
 8022eee:	2237      	movs	r2, #55	@ 0x37
 8022ef0:	f000 fa74 	bl	80233dc <dhcp_option>
 8022ef4:	4603      	mov	r3, r0
 8022ef6:	81bb      	strh	r3, [r7, #12]
    for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
 8022ef8:	2300      	movs	r3, #0
 8022efa:	77bb      	strb	r3, [r7, #30]
 8022efc:	e00e      	b.n	8022f1c <dhcp_renew+0x98>
      options_out_len = dhcp_option_byte(options_out_len, msg_out->options, dhcp_discover_request_options[i]);
 8022efe:	89b8      	ldrh	r0, [r7, #12]
 8022f00:	693b      	ldr	r3, [r7, #16]
 8022f02:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8022f06:	7fbb      	ldrb	r3, [r7, #30]
 8022f08:	4a29      	ldr	r2, [pc, #164]	@ (8022fb0 <dhcp_renew+0x12c>)
 8022f0a:	5cd3      	ldrb	r3, [r2, r3]
 8022f0c:	461a      	mov	r2, r3
 8022f0e:	f000 fa99 	bl	8023444 <dhcp_option_byte>
 8022f12:	4603      	mov	r3, r0
 8022f14:	81bb      	strh	r3, [r7, #12]
    for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
 8022f16:	7fbb      	ldrb	r3, [r7, #30]
 8022f18:	3301      	adds	r3, #1
 8022f1a:	77bb      	strb	r3, [r7, #30]
 8022f1c:	7fbb      	ldrb	r3, [r7, #30]
 8022f1e:	2b02      	cmp	r3, #2
 8022f20:	d9ed      	bls.n	8022efe <dhcp_renew+0x7a>
#if LWIP_NETIF_HOSTNAME
    options_out_len = dhcp_option_hostname(options_out_len, msg_out->options, netif);
#endif /* LWIP_NETIF_HOSTNAME */

    LWIP_HOOK_DHCP_APPEND_OPTIONS(netif, dhcp, DHCP_STATE_RENEWING, msg_out, DHCP_REQUEST, &options_out_len);
    dhcp_option_trailer(options_out_len, msg_out->options, p_out);
 8022f22:	89b8      	ldrh	r0, [r7, #12]
 8022f24:	693b      	ldr	r3, [r7, #16]
 8022f26:	33f0      	adds	r3, #240	@ 0xf0
 8022f28:	697a      	ldr	r2, [r7, #20]
 8022f2a:	4619      	mov	r1, r3
 8022f2c:	f000 ffaa 	bl	8023e84 <dhcp_option_trailer>

    result = udp_sendto_if(dhcp_pcb, p_out, &dhcp->server_ip_addr, LWIP_IANA_PORT_DHCP_SERVER, netif);
 8022f30:	4b20      	ldr	r3, [pc, #128]	@ (8022fb4 <dhcp_renew+0x130>)
 8022f32:	6818      	ldr	r0, [r3, #0]
 8022f34:	69bb      	ldr	r3, [r7, #24]
 8022f36:	f103 0218 	add.w	r2, r3, #24
 8022f3a:	687b      	ldr	r3, [r7, #4]
 8022f3c:	9300      	str	r3, [sp, #0]
 8022f3e:	2343      	movs	r3, #67	@ 0x43
 8022f40:	6979      	ldr	r1, [r7, #20]
 8022f42:	f7fe fe09 	bl	8021b58 <udp_sendto_if>
 8022f46:	4603      	mov	r3, r0
 8022f48:	77fb      	strb	r3, [r7, #31]
    pbuf_free(p_out);
 8022f4a:	6978      	ldr	r0, [r7, #20]
 8022f4c:	f7f7 febe 	bl	801accc <pbuf_free>
 8022f50:	e001      	b.n	8022f56 <dhcp_renew+0xd2>

    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_renew: RENEWING\n"));
  } else {
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("dhcp_renew: could not allocate DHCP request\n"));
    result = ERR_MEM;
 8022f52:	23ff      	movs	r3, #255	@ 0xff
 8022f54:	77fb      	strb	r3, [r7, #31]
  }
  if (dhcp->tries < 255) {
 8022f56:	69bb      	ldr	r3, [r7, #24]
 8022f58:	799b      	ldrb	r3, [r3, #6]
 8022f5a:	2bff      	cmp	r3, #255	@ 0xff
 8022f5c:	d005      	beq.n	8022f6a <dhcp_renew+0xe6>
    dhcp->tries++;
 8022f5e:	69bb      	ldr	r3, [r7, #24]
 8022f60:	799b      	ldrb	r3, [r3, #6]
 8022f62:	3301      	adds	r3, #1
 8022f64:	b2da      	uxtb	r2, r3
 8022f66:	69bb      	ldr	r3, [r7, #24]
 8022f68:	719a      	strb	r2, [r3, #6]
  }
  /* back-off on retries, but to a maximum of 20 seconds */
  msecs = (u16_t)(dhcp->tries < 10 ? dhcp->tries * 2000 : 20 * 1000);
 8022f6a:	69bb      	ldr	r3, [r7, #24]
 8022f6c:	799b      	ldrb	r3, [r3, #6]
 8022f6e:	2b09      	cmp	r3, #9
 8022f70:	d809      	bhi.n	8022f86 <dhcp_renew+0x102>
 8022f72:	69bb      	ldr	r3, [r7, #24]
 8022f74:	799b      	ldrb	r3, [r3, #6]
 8022f76:	461a      	mov	r2, r3
 8022f78:	0152      	lsls	r2, r2, #5
 8022f7a:	1ad2      	subs	r2, r2, r3
 8022f7c:	0092      	lsls	r2, r2, #2
 8022f7e:	4413      	add	r3, r2
 8022f80:	011b      	lsls	r3, r3, #4
 8022f82:	b29b      	uxth	r3, r3
 8022f84:	e001      	b.n	8022f8a <dhcp_renew+0x106>
 8022f86:	f644 6320 	movw	r3, #20000	@ 0x4e20
 8022f8a:	81fb      	strh	r3, [r7, #14]
  dhcp->request_timeout = (u16_t)((msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS);
 8022f8c:	89fb      	ldrh	r3, [r7, #14]
 8022f8e:	f203 13f3 	addw	r3, r3, #499	@ 0x1f3
 8022f92:	4a09      	ldr	r2, [pc, #36]	@ (8022fb8 <dhcp_renew+0x134>)
 8022f94:	fb82 1203 	smull	r1, r2, r2, r3
 8022f98:	1152      	asrs	r2, r2, #5
 8022f9a:	17db      	asrs	r3, r3, #31
 8022f9c:	1ad3      	subs	r3, r2, r3
 8022f9e:	b29a      	uxth	r2, r3
 8022fa0:	69bb      	ldr	r3, [r7, #24]
 8022fa2:	811a      	strh	r2, [r3, #8]
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_renew(): set request timeout %"U16_F" msecs\n", msecs));
  return result;
 8022fa4:	f997 301f 	ldrsb.w	r3, [r7, #31]
}
 8022fa8:	4618      	mov	r0, r3
 8022faa:	3720      	adds	r7, #32
 8022fac:	46bd      	mov	sp, r7
 8022fae:	bd80      	pop	{r7, pc}
 8022fb0:	24000058 	.word	0x24000058
 8022fb4:	2402afe4 	.word	0x2402afe4
 8022fb8:	10624dd3 	.word	0x10624dd3

08022fbc <dhcp_rebind>:
 *
 * @param netif network interface which must rebind with a DHCP server
 */
static err_t
dhcp_rebind(struct netif *netif)
{
 8022fbc:	b580      	push	{r7, lr}
 8022fbe:	b08a      	sub	sp, #40	@ 0x28
 8022fc0:	af02      	add	r7, sp, #8
 8022fc2:	6078      	str	r0, [r7, #4]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 8022fc4:	687b      	ldr	r3, [r7, #4]
 8022fc6:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8022fc8:	61bb      	str	r3, [r7, #24]
  u8_t i;
  struct pbuf *p_out;
  u16_t options_out_len;

  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_rebind()\n"));
  dhcp_set_state(dhcp, DHCP_STATE_REBINDING);
 8022fca:	2104      	movs	r1, #4
 8022fcc:	69b8      	ldr	r0, [r7, #24]
 8022fce:	f000 f9ea 	bl	80233a6 <dhcp_set_state>

  /* create and initialize the DHCP message header */
  p_out = dhcp_create_msg(netif, dhcp, DHCP_REQUEST, &options_out_len);
 8022fd2:	f107 030c 	add.w	r3, r7, #12
 8022fd6:	2203      	movs	r2, #3
 8022fd8:	69b9      	ldr	r1, [r7, #24]
 8022fda:	6878      	ldr	r0, [r7, #4]
 8022fdc:	f000 fe7c 	bl	8023cd8 <dhcp_create_msg>
 8022fe0:	6178      	str	r0, [r7, #20]
  if (p_out != NULL) {
 8022fe2:	697b      	ldr	r3, [r7, #20]
 8022fe4:	2b00      	cmp	r3, #0
 8022fe6:	d04c      	beq.n	8023082 <dhcp_rebind+0xc6>
    struct dhcp_msg *msg_out = (struct dhcp_msg *)p_out->payload;
 8022fe8:	697b      	ldr	r3, [r7, #20]
 8022fea:	685b      	ldr	r3, [r3, #4]
 8022fec:	613b      	str	r3, [r7, #16]
    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_MAX_MSG_SIZE, DHCP_OPTION_MAX_MSG_SIZE_LEN);
 8022fee:	89b8      	ldrh	r0, [r7, #12]
 8022ff0:	693b      	ldr	r3, [r7, #16]
 8022ff2:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8022ff6:	2302      	movs	r3, #2
 8022ff8:	2239      	movs	r2, #57	@ 0x39
 8022ffa:	f000 f9ef 	bl	80233dc <dhcp_option>
 8022ffe:	4603      	mov	r3, r0
 8023000:	81bb      	strh	r3, [r7, #12]
    options_out_len = dhcp_option_short(options_out_len, msg_out->options, DHCP_MAX_MSG_LEN(netif));
 8023002:	89b8      	ldrh	r0, [r7, #12]
 8023004:	693b      	ldr	r3, [r7, #16]
 8023006:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 802300a:	687b      	ldr	r3, [r7, #4]
 802300c:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 802300e:	461a      	mov	r2, r3
 8023010:	f000 fa3e 	bl	8023490 <dhcp_option_short>
 8023014:	4603      	mov	r3, r0
 8023016:	81bb      	strh	r3, [r7, #12]

    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_PARAMETER_REQUEST_LIST, LWIP_ARRAYSIZE(dhcp_discover_request_options));
 8023018:	89b8      	ldrh	r0, [r7, #12]
 802301a:	693b      	ldr	r3, [r7, #16]
 802301c:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8023020:	2303      	movs	r3, #3
 8023022:	2237      	movs	r2, #55	@ 0x37
 8023024:	f000 f9da 	bl	80233dc <dhcp_option>
 8023028:	4603      	mov	r3, r0
 802302a:	81bb      	strh	r3, [r7, #12]
    for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
 802302c:	2300      	movs	r3, #0
 802302e:	77bb      	strb	r3, [r7, #30]
 8023030:	e00e      	b.n	8023050 <dhcp_rebind+0x94>
      options_out_len = dhcp_option_byte(options_out_len, msg_out->options, dhcp_discover_request_options[i]);
 8023032:	89b8      	ldrh	r0, [r7, #12]
 8023034:	693b      	ldr	r3, [r7, #16]
 8023036:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 802303a:	7fbb      	ldrb	r3, [r7, #30]
 802303c:	4a28      	ldr	r2, [pc, #160]	@ (80230e0 <dhcp_rebind+0x124>)
 802303e:	5cd3      	ldrb	r3, [r2, r3]
 8023040:	461a      	mov	r2, r3
 8023042:	f000 f9ff 	bl	8023444 <dhcp_option_byte>
 8023046:	4603      	mov	r3, r0
 8023048:	81bb      	strh	r3, [r7, #12]
    for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
 802304a:	7fbb      	ldrb	r3, [r7, #30]
 802304c:	3301      	adds	r3, #1
 802304e:	77bb      	strb	r3, [r7, #30]
 8023050:	7fbb      	ldrb	r3, [r7, #30]
 8023052:	2b02      	cmp	r3, #2
 8023054:	d9ed      	bls.n	8023032 <dhcp_rebind+0x76>
#if LWIP_NETIF_HOSTNAME
    options_out_len = dhcp_option_hostname(options_out_len, msg_out->options, netif);
#endif /* LWIP_NETIF_HOSTNAME */

    LWIP_HOOK_DHCP_APPEND_OPTIONS(netif, dhcp, DHCP_STATE_REBINDING, msg_out, DHCP_DISCOVER, &options_out_len);
    dhcp_option_trailer(options_out_len, msg_out->options, p_out);
 8023056:	89b8      	ldrh	r0, [r7, #12]
 8023058:	693b      	ldr	r3, [r7, #16]
 802305a:	33f0      	adds	r3, #240	@ 0xf0
 802305c:	697a      	ldr	r2, [r7, #20]
 802305e:	4619      	mov	r1, r3
 8023060:	f000 ff10 	bl	8023e84 <dhcp_option_trailer>

    /* broadcast to server */
    result = udp_sendto_if(dhcp_pcb, p_out, IP_ADDR_BROADCAST, LWIP_IANA_PORT_DHCP_SERVER, netif);
 8023064:	4b1f      	ldr	r3, [pc, #124]	@ (80230e4 <dhcp_rebind+0x128>)
 8023066:	6818      	ldr	r0, [r3, #0]
 8023068:	687b      	ldr	r3, [r7, #4]
 802306a:	9300      	str	r3, [sp, #0]
 802306c:	2343      	movs	r3, #67	@ 0x43
 802306e:	4a1e      	ldr	r2, [pc, #120]	@ (80230e8 <dhcp_rebind+0x12c>)
 8023070:	6979      	ldr	r1, [r7, #20]
 8023072:	f7fe fd71 	bl	8021b58 <udp_sendto_if>
 8023076:	4603      	mov	r3, r0
 8023078:	77fb      	strb	r3, [r7, #31]
    pbuf_free(p_out);
 802307a:	6978      	ldr	r0, [r7, #20]
 802307c:	f7f7 fe26 	bl	801accc <pbuf_free>
 8023080:	e001      	b.n	8023086 <dhcp_rebind+0xca>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_rebind: REBINDING\n"));
  } else {
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("dhcp_rebind: could not allocate DHCP request\n"));
    result = ERR_MEM;
 8023082:	23ff      	movs	r3, #255	@ 0xff
 8023084:	77fb      	strb	r3, [r7, #31]
  }
  if (dhcp->tries < 255) {
 8023086:	69bb      	ldr	r3, [r7, #24]
 8023088:	799b      	ldrb	r3, [r3, #6]
 802308a:	2bff      	cmp	r3, #255	@ 0xff
 802308c:	d005      	beq.n	802309a <dhcp_rebind+0xde>
    dhcp->tries++;
 802308e:	69bb      	ldr	r3, [r7, #24]
 8023090:	799b      	ldrb	r3, [r3, #6]
 8023092:	3301      	adds	r3, #1
 8023094:	b2da      	uxtb	r2, r3
 8023096:	69bb      	ldr	r3, [r7, #24]
 8023098:	719a      	strb	r2, [r3, #6]
  }
  msecs = (u16_t)(dhcp->tries < 10 ? dhcp->tries * 1000 : 10 * 1000);
 802309a:	69bb      	ldr	r3, [r7, #24]
 802309c:	799b      	ldrb	r3, [r3, #6]
 802309e:	2b09      	cmp	r3, #9
 80230a0:	d809      	bhi.n	80230b6 <dhcp_rebind+0xfa>
 80230a2:	69bb      	ldr	r3, [r7, #24]
 80230a4:	799b      	ldrb	r3, [r3, #6]
 80230a6:	461a      	mov	r2, r3
 80230a8:	0152      	lsls	r2, r2, #5
 80230aa:	1ad2      	subs	r2, r2, r3
 80230ac:	0092      	lsls	r2, r2, #2
 80230ae:	4413      	add	r3, r2
 80230b0:	00db      	lsls	r3, r3, #3
 80230b2:	b29b      	uxth	r3, r3
 80230b4:	e001      	b.n	80230ba <dhcp_rebind+0xfe>
 80230b6:	f242 7310 	movw	r3, #10000	@ 0x2710
 80230ba:	81fb      	strh	r3, [r7, #14]
  dhcp->request_timeout = (u16_t)((msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS);
 80230bc:	89fb      	ldrh	r3, [r7, #14]
 80230be:	f203 13f3 	addw	r3, r3, #499	@ 0x1f3
 80230c2:	4a0a      	ldr	r2, [pc, #40]	@ (80230ec <dhcp_rebind+0x130>)
 80230c4:	fb82 1203 	smull	r1, r2, r2, r3
 80230c8:	1152      	asrs	r2, r2, #5
 80230ca:	17db      	asrs	r3, r3, #31
 80230cc:	1ad3      	subs	r3, r2, r3
 80230ce:	b29a      	uxth	r2, r3
 80230d0:	69bb      	ldr	r3, [r7, #24]
 80230d2:	811a      	strh	r2, [r3, #8]
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_rebind(): set request timeout %"U16_F" msecs\n", msecs));
  return result;
 80230d4:	f997 301f 	ldrsb.w	r3, [r7, #31]
}
 80230d8:	4618      	mov	r0, r3
 80230da:	3720      	adds	r7, #32
 80230dc:	46bd      	mov	sp, r7
 80230de:	bd80      	pop	{r7, pc}
 80230e0:	24000058 	.word	0x24000058
 80230e4:	2402afe4 	.word	0x2402afe4
 80230e8:	080314f8 	.word	0x080314f8
 80230ec:	10624dd3 	.word	0x10624dd3

080230f0 <dhcp_reboot>:
 *
 * @param netif network interface which must reboot
 */
static err_t
dhcp_reboot(struct netif *netif)
{
 80230f0:	b5b0      	push	{r4, r5, r7, lr}
 80230f2:	b08a      	sub	sp, #40	@ 0x28
 80230f4:	af02      	add	r7, sp, #8
 80230f6:	6078      	str	r0, [r7, #4]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 80230f8:	687b      	ldr	r3, [r7, #4]
 80230fa:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 80230fc:	61bb      	str	r3, [r7, #24]
  u8_t i;
  struct pbuf *p_out;
  u16_t options_out_len;

  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_reboot()\n"));
  dhcp_set_state(dhcp, DHCP_STATE_REBOOTING);
 80230fe:	2103      	movs	r1, #3
 8023100:	69b8      	ldr	r0, [r7, #24]
 8023102:	f000 f950 	bl	80233a6 <dhcp_set_state>

  /* create and initialize the DHCP message header */
  p_out = dhcp_create_msg(netif, dhcp, DHCP_REQUEST, &options_out_len);
 8023106:	f107 030c 	add.w	r3, r7, #12
 802310a:	2203      	movs	r2, #3
 802310c:	69b9      	ldr	r1, [r7, #24]
 802310e:	6878      	ldr	r0, [r7, #4]
 8023110:	f000 fde2 	bl	8023cd8 <dhcp_create_msg>
 8023114:	6178      	str	r0, [r7, #20]
  if (p_out != NULL) {
 8023116:	697b      	ldr	r3, [r7, #20]
 8023118:	2b00      	cmp	r3, #0
 802311a:	d066      	beq.n	80231ea <dhcp_reboot+0xfa>
    struct dhcp_msg *msg_out = (struct dhcp_msg *)p_out->payload;
 802311c:	697b      	ldr	r3, [r7, #20]
 802311e:	685b      	ldr	r3, [r3, #4]
 8023120:	613b      	str	r3, [r7, #16]
    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_MAX_MSG_SIZE, DHCP_OPTION_MAX_MSG_SIZE_LEN);
 8023122:	89b8      	ldrh	r0, [r7, #12]
 8023124:	693b      	ldr	r3, [r7, #16]
 8023126:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 802312a:	2302      	movs	r3, #2
 802312c:	2239      	movs	r2, #57	@ 0x39
 802312e:	f000 f955 	bl	80233dc <dhcp_option>
 8023132:	4603      	mov	r3, r0
 8023134:	81bb      	strh	r3, [r7, #12]
    options_out_len = dhcp_option_short(options_out_len, msg_out->options, DHCP_MAX_MSG_LEN_MIN_REQUIRED);
 8023136:	89b8      	ldrh	r0, [r7, #12]
 8023138:	693b      	ldr	r3, [r7, #16]
 802313a:	33f0      	adds	r3, #240	@ 0xf0
 802313c:	f44f 7210 	mov.w	r2, #576	@ 0x240
 8023140:	4619      	mov	r1, r3
 8023142:	f000 f9a5 	bl	8023490 <dhcp_option_short>
 8023146:	4603      	mov	r3, r0
 8023148:	81bb      	strh	r3, [r7, #12]

    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_REQUESTED_IP, 4);
 802314a:	89b8      	ldrh	r0, [r7, #12]
 802314c:	693b      	ldr	r3, [r7, #16]
 802314e:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8023152:	2304      	movs	r3, #4
 8023154:	2232      	movs	r2, #50	@ 0x32
 8023156:	f000 f941 	bl	80233dc <dhcp_option>
 802315a:	4603      	mov	r3, r0
 802315c:	81bb      	strh	r3, [r7, #12]
    options_out_len = dhcp_option_long(options_out_len, msg_out->options, lwip_ntohl(ip4_addr_get_u32(&dhcp->offered_ip_addr)));
 802315e:	89bc      	ldrh	r4, [r7, #12]
 8023160:	693b      	ldr	r3, [r7, #16]
 8023162:	f103 05f0 	add.w	r5, r3, #240	@ 0xf0
 8023166:	69bb      	ldr	r3, [r7, #24]
 8023168:	69db      	ldr	r3, [r3, #28]
 802316a:	4618      	mov	r0, r3
 802316c:	f7f6 f8e1 	bl	8019332 <lwip_htonl>
 8023170:	4603      	mov	r3, r0
 8023172:	461a      	mov	r2, r3
 8023174:	4629      	mov	r1, r5
 8023176:	4620      	mov	r0, r4
 8023178:	f000 f9bc 	bl	80234f4 <dhcp_option_long>
 802317c:	4603      	mov	r3, r0
 802317e:	81bb      	strh	r3, [r7, #12]

    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_PARAMETER_REQUEST_LIST, LWIP_ARRAYSIZE(dhcp_discover_request_options));
 8023180:	89b8      	ldrh	r0, [r7, #12]
 8023182:	693b      	ldr	r3, [r7, #16]
 8023184:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8023188:	2303      	movs	r3, #3
 802318a:	2237      	movs	r2, #55	@ 0x37
 802318c:	f000 f926 	bl	80233dc <dhcp_option>
 8023190:	4603      	mov	r3, r0
 8023192:	81bb      	strh	r3, [r7, #12]
    for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
 8023194:	2300      	movs	r3, #0
 8023196:	77bb      	strb	r3, [r7, #30]
 8023198:	e00e      	b.n	80231b8 <dhcp_reboot+0xc8>
      options_out_len = dhcp_option_byte(options_out_len, msg_out->options, dhcp_discover_request_options[i]);
 802319a:	89b8      	ldrh	r0, [r7, #12]
 802319c:	693b      	ldr	r3, [r7, #16]
 802319e:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 80231a2:	7fbb      	ldrb	r3, [r7, #30]
 80231a4:	4a28      	ldr	r2, [pc, #160]	@ (8023248 <dhcp_reboot+0x158>)
 80231a6:	5cd3      	ldrb	r3, [r2, r3]
 80231a8:	461a      	mov	r2, r3
 80231aa:	f000 f94b 	bl	8023444 <dhcp_option_byte>
 80231ae:	4603      	mov	r3, r0
 80231b0:	81bb      	strh	r3, [r7, #12]
    for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
 80231b2:	7fbb      	ldrb	r3, [r7, #30]
 80231b4:	3301      	adds	r3, #1
 80231b6:	77bb      	strb	r3, [r7, #30]
 80231b8:	7fbb      	ldrb	r3, [r7, #30]
 80231ba:	2b02      	cmp	r3, #2
 80231bc:	d9ed      	bls.n	802319a <dhcp_reboot+0xaa>
#if LWIP_NETIF_HOSTNAME
    options_out_len = dhcp_option_hostname(options_out_len, msg_out->options, netif);
#endif /* LWIP_NETIF_HOSTNAME */

    LWIP_HOOK_DHCP_APPEND_OPTIONS(netif, dhcp, DHCP_STATE_REBOOTING, msg_out, DHCP_REQUEST, &options_out_len);
    dhcp_option_trailer(options_out_len, msg_out->options, p_out);
 80231be:	89b8      	ldrh	r0, [r7, #12]
 80231c0:	693b      	ldr	r3, [r7, #16]
 80231c2:	33f0      	adds	r3, #240	@ 0xf0
 80231c4:	697a      	ldr	r2, [r7, #20]
 80231c6:	4619      	mov	r1, r3
 80231c8:	f000 fe5c 	bl	8023e84 <dhcp_option_trailer>

    /* broadcast to server */
    result = udp_sendto_if(dhcp_pcb, p_out, IP_ADDR_BROADCAST, LWIP_IANA_PORT_DHCP_SERVER, netif);
 80231cc:	4b1f      	ldr	r3, [pc, #124]	@ (802324c <dhcp_reboot+0x15c>)
 80231ce:	6818      	ldr	r0, [r3, #0]
 80231d0:	687b      	ldr	r3, [r7, #4]
 80231d2:	9300      	str	r3, [sp, #0]
 80231d4:	2343      	movs	r3, #67	@ 0x43
 80231d6:	4a1e      	ldr	r2, [pc, #120]	@ (8023250 <dhcp_reboot+0x160>)
 80231d8:	6979      	ldr	r1, [r7, #20]
 80231da:	f7fe fcbd 	bl	8021b58 <udp_sendto_if>
 80231de:	4603      	mov	r3, r0
 80231e0:	77fb      	strb	r3, [r7, #31]
    pbuf_free(p_out);
 80231e2:	6978      	ldr	r0, [r7, #20]
 80231e4:	f7f7 fd72 	bl	801accc <pbuf_free>
 80231e8:	e001      	b.n	80231ee <dhcp_reboot+0xfe>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_reboot: REBOOTING\n"));
  } else {
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("dhcp_reboot: could not allocate DHCP request\n"));
    result = ERR_MEM;
 80231ea:	23ff      	movs	r3, #255	@ 0xff
 80231ec:	77fb      	strb	r3, [r7, #31]
  }
  if (dhcp->tries < 255) {
 80231ee:	69bb      	ldr	r3, [r7, #24]
 80231f0:	799b      	ldrb	r3, [r3, #6]
 80231f2:	2bff      	cmp	r3, #255	@ 0xff
 80231f4:	d005      	beq.n	8023202 <dhcp_reboot+0x112>
    dhcp->tries++;
 80231f6:	69bb      	ldr	r3, [r7, #24]
 80231f8:	799b      	ldrb	r3, [r3, #6]
 80231fa:	3301      	adds	r3, #1
 80231fc:	b2da      	uxtb	r2, r3
 80231fe:	69bb      	ldr	r3, [r7, #24]
 8023200:	719a      	strb	r2, [r3, #6]
  }
  msecs = (u16_t)(dhcp->tries < 10 ? dhcp->tries * 1000 : 10 * 1000);
 8023202:	69bb      	ldr	r3, [r7, #24]
 8023204:	799b      	ldrb	r3, [r3, #6]
 8023206:	2b09      	cmp	r3, #9
 8023208:	d809      	bhi.n	802321e <dhcp_reboot+0x12e>
 802320a:	69bb      	ldr	r3, [r7, #24]
 802320c:	799b      	ldrb	r3, [r3, #6]
 802320e:	461a      	mov	r2, r3
 8023210:	0152      	lsls	r2, r2, #5
 8023212:	1ad2      	subs	r2, r2, r3
 8023214:	0092      	lsls	r2, r2, #2
 8023216:	4413      	add	r3, r2
 8023218:	00db      	lsls	r3, r3, #3
 802321a:	b29b      	uxth	r3, r3
 802321c:	e001      	b.n	8023222 <dhcp_reboot+0x132>
 802321e:	f242 7310 	movw	r3, #10000	@ 0x2710
 8023222:	81fb      	strh	r3, [r7, #14]
  dhcp->request_timeout = (u16_t)((msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS);
 8023224:	89fb      	ldrh	r3, [r7, #14]
 8023226:	f203 13f3 	addw	r3, r3, #499	@ 0x1f3
 802322a:	4a0a      	ldr	r2, [pc, #40]	@ (8023254 <dhcp_reboot+0x164>)
 802322c:	fb82 1203 	smull	r1, r2, r2, r3
 8023230:	1152      	asrs	r2, r2, #5
 8023232:	17db      	asrs	r3, r3, #31
 8023234:	1ad3      	subs	r3, r2, r3
 8023236:	b29a      	uxth	r2, r3
 8023238:	69bb      	ldr	r3, [r7, #24]
 802323a:	811a      	strh	r2, [r3, #8]
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_reboot(): set request timeout %"U16_F" msecs\n", msecs));
  return result;
 802323c:	f997 301f 	ldrsb.w	r3, [r7, #31]
}
 8023240:	4618      	mov	r0, r3
 8023242:	3720      	adds	r7, #32
 8023244:	46bd      	mov	sp, r7
 8023246:	bdb0      	pop	{r4, r5, r7, pc}
 8023248:	24000058 	.word	0x24000058
 802324c:	2402afe4 	.word	0x2402afe4
 8023250:	080314f8 	.word	0x080314f8
 8023254:	10624dd3 	.word	0x10624dd3

08023258 <dhcp_release_and_stop>:
 *
 * @param netif network interface
 */
void
dhcp_release_and_stop(struct netif *netif)
{
 8023258:	b5b0      	push	{r4, r5, r7, lr}
 802325a:	b08a      	sub	sp, #40	@ 0x28
 802325c:	af02      	add	r7, sp, #8
 802325e:	6078      	str	r0, [r7, #4]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 8023260:	687b      	ldr	r3, [r7, #4]
 8023262:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8023264:	61fb      	str	r3, [r7, #28]
  ip_addr_t server_ip_addr;

  LWIP_ASSERT_CORE_LOCKED();
 8023266:	f7ed fc09 	bl	8010a7c <sys_check_core_locking>
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_release_and_stop()\n"));
  if (dhcp == NULL) {
 802326a:	69fb      	ldr	r3, [r7, #28]
 802326c:	2b00      	cmp	r3, #0
 802326e:	f000 8084 	beq.w	802337a <dhcp_release_and_stop+0x122>
    return;
  }

  /* already off? -> nothing to do */
  if (dhcp->state == DHCP_STATE_OFF) {
 8023272:	69fb      	ldr	r3, [r7, #28]
 8023274:	795b      	ldrb	r3, [r3, #5]
 8023276:	2b00      	cmp	r3, #0
 8023278:	f000 8081 	beq.w	802337e <dhcp_release_and_stop+0x126>
    return;
  }

  ip_addr_copy(server_ip_addr, dhcp->server_ip_addr);
 802327c:	69fb      	ldr	r3, [r7, #28]
 802327e:	699b      	ldr	r3, [r3, #24]
 8023280:	613b      	str	r3, [r7, #16]

  /* clean old DHCP offer */
  ip_addr_set_zero_ip4(&dhcp->server_ip_addr);
 8023282:	69fb      	ldr	r3, [r7, #28]
 8023284:	2200      	movs	r2, #0
 8023286:	619a      	str	r2, [r3, #24]
  ip4_addr_set_zero(&dhcp->offered_ip_addr);
 8023288:	69fb      	ldr	r3, [r7, #28]
 802328a:	2200      	movs	r2, #0
 802328c:	61da      	str	r2, [r3, #28]
  ip4_addr_set_zero(&dhcp->offered_sn_mask);
 802328e:	69fb      	ldr	r3, [r7, #28]
 8023290:	2200      	movs	r2, #0
 8023292:	621a      	str	r2, [r3, #32]
  ip4_addr_set_zero(&dhcp->offered_gw_addr);
 8023294:	69fb      	ldr	r3, [r7, #28]
 8023296:	2200      	movs	r2, #0
 8023298:	625a      	str	r2, [r3, #36]	@ 0x24
#if LWIP_DHCP_BOOTP_FILE
  ip4_addr_set_zero(&dhcp->offered_si_addr);
#endif /* LWIP_DHCP_BOOTP_FILE */
  dhcp->offered_t0_lease = dhcp->offered_t1_renew = dhcp->offered_t2_rebind = 0;
 802329a:	69fb      	ldr	r3, [r7, #28]
 802329c:	2200      	movs	r2, #0
 802329e:	631a      	str	r2, [r3, #48]	@ 0x30
 80232a0:	69fb      	ldr	r3, [r7, #28]
 80232a2:	6b1a      	ldr	r2, [r3, #48]	@ 0x30
 80232a4:	69fb      	ldr	r3, [r7, #28]
 80232a6:	62da      	str	r2, [r3, #44]	@ 0x2c
 80232a8:	69fb      	ldr	r3, [r7, #28]
 80232aa:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 80232ac:	69fb      	ldr	r3, [r7, #28]
 80232ae:	629a      	str	r2, [r3, #40]	@ 0x28
  dhcp->t1_renew_time = dhcp->t2_rebind_time = dhcp->lease_used = dhcp->t0_timeout = 0;
 80232b0:	69fb      	ldr	r3, [r7, #28]
 80232b2:	2200      	movs	r2, #0
 80232b4:	829a      	strh	r2, [r3, #20]
 80232b6:	69fb      	ldr	r3, [r7, #28]
 80232b8:	8a9a      	ldrh	r2, [r3, #20]
 80232ba:	69fb      	ldr	r3, [r7, #28]
 80232bc:	825a      	strh	r2, [r3, #18]
 80232be:	69fb      	ldr	r3, [r7, #28]
 80232c0:	8a5a      	ldrh	r2, [r3, #18]
 80232c2:	69fb      	ldr	r3, [r7, #28]
 80232c4:	821a      	strh	r2, [r3, #16]
 80232c6:	69fb      	ldr	r3, [r7, #28]
 80232c8:	8a1a      	ldrh	r2, [r3, #16]
 80232ca:	69fb      	ldr	r3, [r7, #28]
 80232cc:	81da      	strh	r2, [r3, #14]

  /* send release message when current IP was assigned via DHCP */
  if (dhcp_supplied_address(netif)) {
 80232ce:	6878      	ldr	r0, [r7, #4]
 80232d0:	f000 fe06 	bl	8023ee0 <dhcp_supplied_address>
 80232d4:	4603      	mov	r3, r0
 80232d6:	2b00      	cmp	r3, #0
 80232d8:	d03b      	beq.n	8023352 <dhcp_release_and_stop+0xfa>
    /* create and initialize the DHCP message header */
    struct pbuf *p_out;
    u16_t options_out_len;
    p_out = dhcp_create_msg(netif, dhcp, DHCP_RELEASE, &options_out_len);
 80232da:	f107 030e 	add.w	r3, r7, #14
 80232de:	2207      	movs	r2, #7
 80232e0:	69f9      	ldr	r1, [r7, #28]
 80232e2:	6878      	ldr	r0, [r7, #4]
 80232e4:	f000 fcf8 	bl	8023cd8 <dhcp_create_msg>
 80232e8:	61b8      	str	r0, [r7, #24]
    if (p_out != NULL) {
 80232ea:	69bb      	ldr	r3, [r7, #24]
 80232ec:	2b00      	cmp	r3, #0
 80232ee:	d030      	beq.n	8023352 <dhcp_release_and_stop+0xfa>
      struct dhcp_msg *msg_out = (struct dhcp_msg *)p_out->payload;
 80232f0:	69bb      	ldr	r3, [r7, #24]
 80232f2:	685b      	ldr	r3, [r3, #4]
 80232f4:	617b      	str	r3, [r7, #20]
      options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_SERVER_ID, 4);
 80232f6:	89f8      	ldrh	r0, [r7, #14]
 80232f8:	697b      	ldr	r3, [r7, #20]
 80232fa:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 80232fe:	2304      	movs	r3, #4
 8023300:	2236      	movs	r2, #54	@ 0x36
 8023302:	f000 f86b 	bl	80233dc <dhcp_option>
 8023306:	4603      	mov	r3, r0
 8023308:	81fb      	strh	r3, [r7, #14]
      options_out_len = dhcp_option_long(options_out_len, msg_out->options, lwip_ntohl(ip4_addr_get_u32(ip_2_ip4(&server_ip_addr))));
 802330a:	89fc      	ldrh	r4, [r7, #14]
 802330c:	697b      	ldr	r3, [r7, #20]
 802330e:	f103 05f0 	add.w	r5, r3, #240	@ 0xf0
 8023312:	693b      	ldr	r3, [r7, #16]
 8023314:	4618      	mov	r0, r3
 8023316:	f7f6 f80c 	bl	8019332 <lwip_htonl>
 802331a:	4603      	mov	r3, r0
 802331c:	461a      	mov	r2, r3
 802331e:	4629      	mov	r1, r5
 8023320:	4620      	mov	r0, r4
 8023322:	f000 f8e7 	bl	80234f4 <dhcp_option_long>
 8023326:	4603      	mov	r3, r0
 8023328:	81fb      	strh	r3, [r7, #14]

      LWIP_HOOK_DHCP_APPEND_OPTIONS(netif, dhcp, dhcp->state, msg_out, DHCP_RELEASE, &options_out_len);
      dhcp_option_trailer(options_out_len, msg_out->options, p_out);
 802332a:	89f8      	ldrh	r0, [r7, #14]
 802332c:	697b      	ldr	r3, [r7, #20]
 802332e:	33f0      	adds	r3, #240	@ 0xf0
 8023330:	69ba      	ldr	r2, [r7, #24]
 8023332:	4619      	mov	r1, r3
 8023334:	f000 fda6 	bl	8023e84 <dhcp_option_trailer>

      udp_sendto_if(dhcp_pcb, p_out, &server_ip_addr, LWIP_IANA_PORT_DHCP_SERVER, netif);
 8023338:	4b13      	ldr	r3, [pc, #76]	@ (8023388 <dhcp_release_and_stop+0x130>)
 802333a:	6818      	ldr	r0, [r3, #0]
 802333c:	f107 0210 	add.w	r2, r7, #16
 8023340:	687b      	ldr	r3, [r7, #4]
 8023342:	9300      	str	r3, [sp, #0]
 8023344:	2343      	movs	r3, #67	@ 0x43
 8023346:	69b9      	ldr	r1, [r7, #24]
 8023348:	f7fe fc06 	bl	8021b58 <udp_sendto_if>
      pbuf_free(p_out);
 802334c:	69b8      	ldr	r0, [r7, #24]
 802334e:	f7f7 fcbd 	bl	801accc <pbuf_free>
      LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("dhcp_release: could not allocate DHCP request\n"));
    }
  }

  /* remove IP address from interface (prevents routing from selecting this interface) */
  netif_set_addr(netif, IP4_ADDR_ANY4, IP4_ADDR_ANY4, IP4_ADDR_ANY4);
 8023352:	4b0e      	ldr	r3, [pc, #56]	@ (802338c <dhcp_release_and_stop+0x134>)
 8023354:	4a0d      	ldr	r2, [pc, #52]	@ (802338c <dhcp_release_and_stop+0x134>)
 8023356:	490d      	ldr	r1, [pc, #52]	@ (802338c <dhcp_release_and_stop+0x134>)
 8023358:	6878      	ldr	r0, [r7, #4]
 802335a:	f7f6 ff6d 	bl	801a238 <netif_set_addr>
    autoip_stop(netif);
    dhcp->autoip_coop_state = DHCP_AUTOIP_COOP_STATE_OFF;
  }
#endif /* LWIP_DHCP_AUTOIP_COOP */

  dhcp_set_state(dhcp, DHCP_STATE_OFF);
 802335e:	2100      	movs	r1, #0
 8023360:	69f8      	ldr	r0, [r7, #28]
 8023362:	f000 f820 	bl	80233a6 <dhcp_set_state>

  if (dhcp->pcb_allocated != 0) {
 8023366:	69fb      	ldr	r3, [r7, #28]
 8023368:	791b      	ldrb	r3, [r3, #4]
 802336a:	2b00      	cmp	r3, #0
 802336c:	d008      	beq.n	8023380 <dhcp_release_and_stop+0x128>
    dhcp_dec_pcb_refcount(); /* free DHCP PCB if not needed any more */
 802336e:	f7fe ff83 	bl	8022278 <dhcp_dec_pcb_refcount>
    dhcp->pcb_allocated = 0;
 8023372:	69fb      	ldr	r3, [r7, #28]
 8023374:	2200      	movs	r2, #0
 8023376:	711a      	strb	r2, [r3, #4]
 8023378:	e002      	b.n	8023380 <dhcp_release_and_stop+0x128>
    return;
 802337a:	bf00      	nop
 802337c:	e000      	b.n	8023380 <dhcp_release_and_stop+0x128>
    return;
 802337e:	bf00      	nop
  }
}
 8023380:	3720      	adds	r7, #32
 8023382:	46bd      	mov	sp, r7
 8023384:	bdb0      	pop	{r4, r5, r7, pc}
 8023386:	bf00      	nop
 8023388:	2402afe4 	.word	0x2402afe4
 802338c:	080314f4 	.word	0x080314f4

08023390 <dhcp_stop>:
 * This function calls dhcp_release_and_stop() internally.
 * @deprecated Use dhcp_release_and_stop() instead.
 */
void
dhcp_stop(struct netif *netif)
{
 8023390:	b580      	push	{r7, lr}
 8023392:	b082      	sub	sp, #8
 8023394:	af00      	add	r7, sp, #0
 8023396:	6078      	str	r0, [r7, #4]
  dhcp_release_and_stop(netif);
 8023398:	6878      	ldr	r0, [r7, #4]
 802339a:	f7ff ff5d 	bl	8023258 <dhcp_release_and_stop>
}
 802339e:	bf00      	nop
 80233a0:	3708      	adds	r7, #8
 80233a2:	46bd      	mov	sp, r7
 80233a4:	bd80      	pop	{r7, pc}

080233a6 <dhcp_set_state>:
 *
 * If the state changed, reset the number of tries.
 */
static void
dhcp_set_state(struct dhcp *dhcp, u8_t new_state)
{
 80233a6:	b480      	push	{r7}
 80233a8:	b083      	sub	sp, #12
 80233aa:	af00      	add	r7, sp, #0
 80233ac:	6078      	str	r0, [r7, #4]
 80233ae:	460b      	mov	r3, r1
 80233b0:	70fb      	strb	r3, [r7, #3]
  if (new_state != dhcp->state) {
 80233b2:	687b      	ldr	r3, [r7, #4]
 80233b4:	795b      	ldrb	r3, [r3, #5]
 80233b6:	78fa      	ldrb	r2, [r7, #3]
 80233b8:	429a      	cmp	r2, r3
 80233ba:	d008      	beq.n	80233ce <dhcp_set_state+0x28>
    dhcp->state = new_state;
 80233bc:	687b      	ldr	r3, [r7, #4]
 80233be:	78fa      	ldrb	r2, [r7, #3]
 80233c0:	715a      	strb	r2, [r3, #5]
    dhcp->tries = 0;
 80233c2:	687b      	ldr	r3, [r7, #4]
 80233c4:	2200      	movs	r2, #0
 80233c6:	719a      	strb	r2, [r3, #6]
    dhcp->request_timeout = 0;
 80233c8:	687b      	ldr	r3, [r7, #4]
 80233ca:	2200      	movs	r2, #0
 80233cc:	811a      	strh	r2, [r3, #8]
  }
}
 80233ce:	bf00      	nop
 80233d0:	370c      	adds	r7, #12
 80233d2:	46bd      	mov	sp, r7
 80233d4:	f85d 7b04 	ldr.w	r7, [sp], #4
 80233d8:	4770      	bx	lr
	...

080233dc <dhcp_option>:
 * DHCP message.
 *
 */
static u16_t
dhcp_option(u16_t options_out_len, u8_t *options, u8_t option_type, u8_t option_len)
{
 80233dc:	b580      	push	{r7, lr}
 80233de:	b082      	sub	sp, #8
 80233e0:	af00      	add	r7, sp, #0
 80233e2:	6039      	str	r1, [r7, #0]
 80233e4:	4611      	mov	r1, r2
 80233e6:	461a      	mov	r2, r3
 80233e8:	4603      	mov	r3, r0
 80233ea:	80fb      	strh	r3, [r7, #6]
 80233ec:	460b      	mov	r3, r1
 80233ee:	717b      	strb	r3, [r7, #5]
 80233f0:	4613      	mov	r3, r2
 80233f2:	713b      	strb	r3, [r7, #4]
  LWIP_ASSERT("dhcp_option: options_out_len + 2 + option_len <= DHCP_OPTIONS_LEN", options_out_len + 2U + option_len <= DHCP_OPTIONS_LEN);
 80233f4:	88fa      	ldrh	r2, [r7, #6]
 80233f6:	793b      	ldrb	r3, [r7, #4]
 80233f8:	4413      	add	r3, r2
 80233fa:	3302      	adds	r3, #2
 80233fc:	2b44      	cmp	r3, #68	@ 0x44
 80233fe:	d906      	bls.n	802340e <dhcp_option+0x32>
 8023400:	4b0d      	ldr	r3, [pc, #52]	@ (8023438 <dhcp_option+0x5c>)
 8023402:	f240 529a 	movw	r2, #1434	@ 0x59a
 8023406:	490d      	ldr	r1, [pc, #52]	@ (802343c <dhcp_option+0x60>)
 8023408:	480d      	ldr	r0, [pc, #52]	@ (8023440 <dhcp_option+0x64>)
 802340a:	f006 fed7 	bl	802a1bc <iprintf>
  options[options_out_len++] = option_type;
 802340e:	88fb      	ldrh	r3, [r7, #6]
 8023410:	1c5a      	adds	r2, r3, #1
 8023412:	80fa      	strh	r2, [r7, #6]
 8023414:	461a      	mov	r2, r3
 8023416:	683b      	ldr	r3, [r7, #0]
 8023418:	4413      	add	r3, r2
 802341a:	797a      	ldrb	r2, [r7, #5]
 802341c:	701a      	strb	r2, [r3, #0]
  options[options_out_len++] = option_len;
 802341e:	88fb      	ldrh	r3, [r7, #6]
 8023420:	1c5a      	adds	r2, r3, #1
 8023422:	80fa      	strh	r2, [r7, #6]
 8023424:	461a      	mov	r2, r3
 8023426:	683b      	ldr	r3, [r7, #0]
 8023428:	4413      	add	r3, r2
 802342a:	793a      	ldrb	r2, [r7, #4]
 802342c:	701a      	strb	r2, [r3, #0]
  return options_out_len;
 802342e:	88fb      	ldrh	r3, [r7, #6]
}
 8023430:	4618      	mov	r0, r3
 8023432:	3708      	adds	r7, #8
 8023434:	46bd      	mov	sp, r7
 8023436:	bd80      	pop	{r7, pc}
 8023438:	080306e8 	.word	0x080306e8
 802343c:	0803087c 	.word	0x0803087c
 8023440:	08030748 	.word	0x08030748

08023444 <dhcp_option_byte>:
 * Concatenate a single byte to the outgoing DHCP message.
 *
 */
static u16_t
dhcp_option_byte(u16_t options_out_len, u8_t *options, u8_t value)
{
 8023444:	b580      	push	{r7, lr}
 8023446:	b082      	sub	sp, #8
 8023448:	af00      	add	r7, sp, #0
 802344a:	4603      	mov	r3, r0
 802344c:	6039      	str	r1, [r7, #0]
 802344e:	80fb      	strh	r3, [r7, #6]
 8023450:	4613      	mov	r3, r2
 8023452:	717b      	strb	r3, [r7, #5]
  LWIP_ASSERT("dhcp_option_byte: options_out_len < DHCP_OPTIONS_LEN", options_out_len < DHCP_OPTIONS_LEN);
 8023454:	88fb      	ldrh	r3, [r7, #6]
 8023456:	2b43      	cmp	r3, #67	@ 0x43
 8023458:	d906      	bls.n	8023468 <dhcp_option_byte+0x24>
 802345a:	4b0a      	ldr	r3, [pc, #40]	@ (8023484 <dhcp_option_byte+0x40>)
 802345c:	f240 52a6 	movw	r2, #1446	@ 0x5a6
 8023460:	4909      	ldr	r1, [pc, #36]	@ (8023488 <dhcp_option_byte+0x44>)
 8023462:	480a      	ldr	r0, [pc, #40]	@ (802348c <dhcp_option_byte+0x48>)
 8023464:	f006 feaa 	bl	802a1bc <iprintf>
  options[options_out_len++] = value;
 8023468:	88fb      	ldrh	r3, [r7, #6]
 802346a:	1c5a      	adds	r2, r3, #1
 802346c:	80fa      	strh	r2, [r7, #6]
 802346e:	461a      	mov	r2, r3
 8023470:	683b      	ldr	r3, [r7, #0]
 8023472:	4413      	add	r3, r2
 8023474:	797a      	ldrb	r2, [r7, #5]
 8023476:	701a      	strb	r2, [r3, #0]
  return options_out_len;
 8023478:	88fb      	ldrh	r3, [r7, #6]
}
 802347a:	4618      	mov	r0, r3
 802347c:	3708      	adds	r7, #8
 802347e:	46bd      	mov	sp, r7
 8023480:	bd80      	pop	{r7, pc}
 8023482:	bf00      	nop
 8023484:	080306e8 	.word	0x080306e8
 8023488:	080308c0 	.word	0x080308c0
 802348c:	08030748 	.word	0x08030748

08023490 <dhcp_option_short>:

static u16_t
dhcp_option_short(u16_t options_out_len, u8_t *options, u16_t value)
{
 8023490:	b580      	push	{r7, lr}
 8023492:	b082      	sub	sp, #8
 8023494:	af00      	add	r7, sp, #0
 8023496:	4603      	mov	r3, r0
 8023498:	6039      	str	r1, [r7, #0]
 802349a:	80fb      	strh	r3, [r7, #6]
 802349c:	4613      	mov	r3, r2
 802349e:	80bb      	strh	r3, [r7, #4]
  LWIP_ASSERT("dhcp_option_short: options_out_len + 2 <= DHCP_OPTIONS_LEN", options_out_len + 2U <= DHCP_OPTIONS_LEN);
 80234a0:	88fb      	ldrh	r3, [r7, #6]
 80234a2:	3302      	adds	r3, #2
 80234a4:	2b44      	cmp	r3, #68	@ 0x44
 80234a6:	d906      	bls.n	80234b6 <dhcp_option_short+0x26>
 80234a8:	4b0f      	ldr	r3, [pc, #60]	@ (80234e8 <dhcp_option_short+0x58>)
 80234aa:	f240 52ae 	movw	r2, #1454	@ 0x5ae
 80234ae:	490f      	ldr	r1, [pc, #60]	@ (80234ec <dhcp_option_short+0x5c>)
 80234b0:	480f      	ldr	r0, [pc, #60]	@ (80234f0 <dhcp_option_short+0x60>)
 80234b2:	f006 fe83 	bl	802a1bc <iprintf>
  options[options_out_len++] = (u8_t)((value & 0xff00U) >> 8);
 80234b6:	88bb      	ldrh	r3, [r7, #4]
 80234b8:	0a1b      	lsrs	r3, r3, #8
 80234ba:	b29a      	uxth	r2, r3
 80234bc:	88fb      	ldrh	r3, [r7, #6]
 80234be:	1c59      	adds	r1, r3, #1
 80234c0:	80f9      	strh	r1, [r7, #6]
 80234c2:	4619      	mov	r1, r3
 80234c4:	683b      	ldr	r3, [r7, #0]
 80234c6:	440b      	add	r3, r1
 80234c8:	b2d2      	uxtb	r2, r2
 80234ca:	701a      	strb	r2, [r3, #0]
  options[options_out_len++] = (u8_t) (value & 0x00ffU);
 80234cc:	88fb      	ldrh	r3, [r7, #6]
 80234ce:	1c5a      	adds	r2, r3, #1
 80234d0:	80fa      	strh	r2, [r7, #6]
 80234d2:	461a      	mov	r2, r3
 80234d4:	683b      	ldr	r3, [r7, #0]
 80234d6:	4413      	add	r3, r2
 80234d8:	88ba      	ldrh	r2, [r7, #4]
 80234da:	b2d2      	uxtb	r2, r2
 80234dc:	701a      	strb	r2, [r3, #0]
  return options_out_len;
 80234de:	88fb      	ldrh	r3, [r7, #6]
}
 80234e0:	4618      	mov	r0, r3
 80234e2:	3708      	adds	r7, #8
 80234e4:	46bd      	mov	sp, r7
 80234e6:	bd80      	pop	{r7, pc}
 80234e8:	080306e8 	.word	0x080306e8
 80234ec:	080308f8 	.word	0x080308f8
 80234f0:	08030748 	.word	0x08030748

080234f4 <dhcp_option_long>:

static u16_t
dhcp_option_long(u16_t options_out_len, u8_t *options, u32_t value)
{
 80234f4:	b580      	push	{r7, lr}
 80234f6:	b084      	sub	sp, #16
 80234f8:	af00      	add	r7, sp, #0
 80234fa:	4603      	mov	r3, r0
 80234fc:	60b9      	str	r1, [r7, #8]
 80234fe:	607a      	str	r2, [r7, #4]
 8023500:	81fb      	strh	r3, [r7, #14]
  LWIP_ASSERT("dhcp_option_long: options_out_len + 4 <= DHCP_OPTIONS_LEN", options_out_len + 4U <= DHCP_OPTIONS_LEN);
 8023502:	89fb      	ldrh	r3, [r7, #14]
 8023504:	3304      	adds	r3, #4
 8023506:	2b44      	cmp	r3, #68	@ 0x44
 8023508:	d906      	bls.n	8023518 <dhcp_option_long+0x24>
 802350a:	4b19      	ldr	r3, [pc, #100]	@ (8023570 <dhcp_option_long+0x7c>)
 802350c:	f240 52b7 	movw	r2, #1463	@ 0x5b7
 8023510:	4918      	ldr	r1, [pc, #96]	@ (8023574 <dhcp_option_long+0x80>)
 8023512:	4819      	ldr	r0, [pc, #100]	@ (8023578 <dhcp_option_long+0x84>)
 8023514:	f006 fe52 	bl	802a1bc <iprintf>
  options[options_out_len++] = (u8_t)((value & 0xff000000UL) >> 24);
 8023518:	687b      	ldr	r3, [r7, #4]
 802351a:	0e1a      	lsrs	r2, r3, #24
 802351c:	89fb      	ldrh	r3, [r7, #14]
 802351e:	1c59      	adds	r1, r3, #1
 8023520:	81f9      	strh	r1, [r7, #14]
 8023522:	4619      	mov	r1, r3
 8023524:	68bb      	ldr	r3, [r7, #8]
 8023526:	440b      	add	r3, r1
 8023528:	b2d2      	uxtb	r2, r2
 802352a:	701a      	strb	r2, [r3, #0]
  options[options_out_len++] = (u8_t)((value & 0x00ff0000UL) >> 16);
 802352c:	687b      	ldr	r3, [r7, #4]
 802352e:	0c1a      	lsrs	r2, r3, #16
 8023530:	89fb      	ldrh	r3, [r7, #14]
 8023532:	1c59      	adds	r1, r3, #1
 8023534:	81f9      	strh	r1, [r7, #14]
 8023536:	4619      	mov	r1, r3
 8023538:	68bb      	ldr	r3, [r7, #8]
 802353a:	440b      	add	r3, r1
 802353c:	b2d2      	uxtb	r2, r2
 802353e:	701a      	strb	r2, [r3, #0]
  options[options_out_len++] = (u8_t)((value & 0x0000ff00UL) >> 8);
 8023540:	687b      	ldr	r3, [r7, #4]
 8023542:	0a1a      	lsrs	r2, r3, #8
 8023544:	89fb      	ldrh	r3, [r7, #14]
 8023546:	1c59      	adds	r1, r3, #1
 8023548:	81f9      	strh	r1, [r7, #14]
 802354a:	4619      	mov	r1, r3
 802354c:	68bb      	ldr	r3, [r7, #8]
 802354e:	440b      	add	r3, r1
 8023550:	b2d2      	uxtb	r2, r2
 8023552:	701a      	strb	r2, [r3, #0]
  options[options_out_len++] = (u8_t)((value & 0x000000ffUL));
 8023554:	89fb      	ldrh	r3, [r7, #14]
 8023556:	1c5a      	adds	r2, r3, #1
 8023558:	81fa      	strh	r2, [r7, #14]
 802355a:	461a      	mov	r2, r3
 802355c:	68bb      	ldr	r3, [r7, #8]
 802355e:	4413      	add	r3, r2
 8023560:	687a      	ldr	r2, [r7, #4]
 8023562:	b2d2      	uxtb	r2, r2
 8023564:	701a      	strb	r2, [r3, #0]
  return options_out_len;
 8023566:	89fb      	ldrh	r3, [r7, #14]
}
 8023568:	4618      	mov	r0, r3
 802356a:	3710      	adds	r7, #16
 802356c:	46bd      	mov	sp, r7
 802356e:	bd80      	pop	{r7, pc}
 8023570:	080306e8 	.word	0x080306e8
 8023574:	08030934 	.word	0x08030934
 8023578:	08030748 	.word	0x08030748

0802357c <dhcp_parse_reply>:
 * use that further on.
 *
 */
static err_t
dhcp_parse_reply(struct pbuf *p, struct dhcp *dhcp)
{
 802357c:	b580      	push	{r7, lr}
 802357e:	b092      	sub	sp, #72	@ 0x48
 8023580:	af00      	add	r7, sp, #0
 8023582:	6078      	str	r0, [r7, #4]
 8023584:	6039      	str	r1, [r7, #0]
  u16_t offset;
  u16_t offset_max;
  u16_t options_idx;
  u16_t options_idx_max;
  struct pbuf *q;
  int parse_file_as_options = 0;
 8023586:	2300      	movs	r3, #0
 8023588:	633b      	str	r3, [r7, #48]	@ 0x30
  int parse_sname_as_options = 0;
 802358a:	2300      	movs	r3, #0
 802358c:	62fb      	str	r3, [r7, #44]	@ 0x2c
#endif

  LWIP_UNUSED_ARG(dhcp);

  /* clear received options */
  dhcp_clear_all_options(dhcp);
 802358e:	2208      	movs	r2, #8
 8023590:	2100      	movs	r1, #0
 8023592:	48b8      	ldr	r0, [pc, #736]	@ (8023874 <dhcp_parse_reply+0x2f8>)
 8023594:	f006 ffa4 	bl	802a4e0 <memset>
  /* check that beginning of dhcp_msg (up to and including chaddr) is in first pbuf */
  if (p->len < DHCP_SNAME_OFS) {
 8023598:	687b      	ldr	r3, [r7, #4]
 802359a:	895b      	ldrh	r3, [r3, #10]
 802359c:	2b2b      	cmp	r3, #43	@ 0x2b
 802359e:	d802      	bhi.n	80235a6 <dhcp_parse_reply+0x2a>
    return ERR_BUF;
 80235a0:	f06f 0301 	mvn.w	r3, #1
 80235a4:	e2b8      	b.n	8023b18 <dhcp_parse_reply+0x59c>
  }
  msg_in = (struct dhcp_msg *)p->payload;
 80235a6:	687b      	ldr	r3, [r7, #4]
 80235a8:	685b      	ldr	r3, [r3, #4]
 80235aa:	61fb      	str	r3, [r7, #28]
#endif /* LWIP_DHCP_BOOTP_FILE */

  /* parse options */

  /* start with options field */
  options_idx = DHCP_OPTIONS_OFS;
 80235ac:	23f0      	movs	r3, #240	@ 0xf0
 80235ae:	87bb      	strh	r3, [r7, #60]	@ 0x3c
  /* parse options to the end of the received packet */
  options_idx_max = p->tot_len;
 80235b0:	687b      	ldr	r3, [r7, #4]
 80235b2:	891b      	ldrh	r3, [r3, #8]
 80235b4:	877b      	strh	r3, [r7, #58]	@ 0x3a
again:
  q = p;
 80235b6:	687b      	ldr	r3, [r7, #4]
 80235b8:	637b      	str	r3, [r7, #52]	@ 0x34
  while ((q != NULL) && (options_idx >= q->len)) {
 80235ba:	e00c      	b.n	80235d6 <dhcp_parse_reply+0x5a>
    options_idx = (u16_t)(options_idx - q->len);
 80235bc:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 80235be:	895b      	ldrh	r3, [r3, #10]
 80235c0:	8fba      	ldrh	r2, [r7, #60]	@ 0x3c
 80235c2:	1ad3      	subs	r3, r2, r3
 80235c4:	87bb      	strh	r3, [r7, #60]	@ 0x3c
    options_idx_max = (u16_t)(options_idx_max - q->len);
 80235c6:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 80235c8:	895b      	ldrh	r3, [r3, #10]
 80235ca:	8f7a      	ldrh	r2, [r7, #58]	@ 0x3a
 80235cc:	1ad3      	subs	r3, r2, r3
 80235ce:	877b      	strh	r3, [r7, #58]	@ 0x3a
    q = q->next;
 80235d0:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 80235d2:	681b      	ldr	r3, [r3, #0]
 80235d4:	637b      	str	r3, [r7, #52]	@ 0x34
  while ((q != NULL) && (options_idx >= q->len)) {
 80235d6:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 80235d8:	2b00      	cmp	r3, #0
 80235da:	d004      	beq.n	80235e6 <dhcp_parse_reply+0x6a>
 80235dc:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 80235de:	895b      	ldrh	r3, [r3, #10]
 80235e0:	8fba      	ldrh	r2, [r7, #60]	@ 0x3c
 80235e2:	429a      	cmp	r2, r3
 80235e4:	d2ea      	bcs.n	80235bc <dhcp_parse_reply+0x40>
  }
  if (q == NULL) {
 80235e6:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 80235e8:	2b00      	cmp	r3, #0
 80235ea:	d102      	bne.n	80235f2 <dhcp_parse_reply+0x76>
    return ERR_BUF;
 80235ec:	f06f 0301 	mvn.w	r3, #1
 80235f0:	e292      	b.n	8023b18 <dhcp_parse_reply+0x59c>
  }
  offset = options_idx;
 80235f2:	8fbb      	ldrh	r3, [r7, #60]	@ 0x3c
 80235f4:	f8a7 3046 	strh.w	r3, [r7, #70]	@ 0x46
  offset_max = options_idx_max;
 80235f8:	8f7b      	ldrh	r3, [r7, #58]	@ 0x3a
 80235fa:	87fb      	strh	r3, [r7, #62]	@ 0x3e
  options = (u8_t *)q->payload;
 80235fc:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 80235fe:	685b      	ldr	r3, [r3, #4]
 8023600:	643b      	str	r3, [r7, #64]	@ 0x40
  /* at least 1 byte to read and no end marker, then at least 3 bytes to read? */
  while ((q != NULL) && (offset < offset_max) && (options[offset] != DHCP_OPTION_END)) {
 8023602:	e247      	b.n	8023a94 <dhcp_parse_reply+0x518>
    u8_t op = options[offset];
 8023604:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 8023608:	6c3a      	ldr	r2, [r7, #64]	@ 0x40
 802360a:	4413      	add	r3, r2
 802360c:	781b      	ldrb	r3, [r3, #0]
 802360e:	76fb      	strb	r3, [r7, #27]
    u8_t len;
    u8_t decode_len = 0;
 8023610:	2300      	movs	r3, #0
 8023612:	f887 302a 	strb.w	r3, [r7, #42]	@ 0x2a
    int decode_idx = -1;
 8023616:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 802361a:	627b      	str	r3, [r7, #36]	@ 0x24
    u16_t val_offset = (u16_t)(offset + 2);
 802361c:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 8023620:	3302      	adds	r3, #2
 8023622:	847b      	strh	r3, [r7, #34]	@ 0x22
    if (val_offset < offset) {
 8023624:	8c7a      	ldrh	r2, [r7, #34]	@ 0x22
 8023626:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 802362a:	429a      	cmp	r2, r3
 802362c:	d202      	bcs.n	8023634 <dhcp_parse_reply+0xb8>
      /* overflow */
      return ERR_BUF;
 802362e:	f06f 0301 	mvn.w	r3, #1
 8023632:	e271      	b.n	8023b18 <dhcp_parse_reply+0x59c>
    }
    /* len byte might be in the next pbuf */
    if ((offset + 1) < q->len) {
 8023634:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 8023638:	3301      	adds	r3, #1
 802363a:	6b7a      	ldr	r2, [r7, #52]	@ 0x34
 802363c:	8952      	ldrh	r2, [r2, #10]
 802363e:	4293      	cmp	r3, r2
 8023640:	da08      	bge.n	8023654 <dhcp_parse_reply+0xd8>
      len = options[offset + 1];
 8023642:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 8023646:	3301      	adds	r3, #1
 8023648:	6c3a      	ldr	r2, [r7, #64]	@ 0x40
 802364a:	4413      	add	r3, r2
 802364c:	781b      	ldrb	r3, [r3, #0]
 802364e:	f887 302b 	strb.w	r3, [r7, #43]	@ 0x2b
 8023652:	e00b      	b.n	802366c <dhcp_parse_reply+0xf0>
    } else {
      len = (q->next != NULL ? ((u8_t *)q->next->payload)[0] : 0);
 8023654:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8023656:	681b      	ldr	r3, [r3, #0]
 8023658:	2b00      	cmp	r3, #0
 802365a:	d004      	beq.n	8023666 <dhcp_parse_reply+0xea>
 802365c:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 802365e:	681b      	ldr	r3, [r3, #0]
 8023660:	685b      	ldr	r3, [r3, #4]
 8023662:	781b      	ldrb	r3, [r3, #0]
 8023664:	e000      	b.n	8023668 <dhcp_parse_reply+0xec>
 8023666:	2300      	movs	r3, #0
 8023668:	f887 302b 	strb.w	r3, [r7, #43]	@ 0x2b
    }
    /* LWIP_DEBUGF(DHCP_DEBUG, ("msg_offset=%"U16_F", q->len=%"U16_F, msg_offset, q->len)); */
    decode_len = len;
 802366c:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 8023670:	f887 302a 	strb.w	r3, [r7, #42]	@ 0x2a
    switch (op) {
 8023674:	7efb      	ldrb	r3, [r7, #27]
 8023676:	2b3b      	cmp	r3, #59	@ 0x3b
 8023678:	f200 812c 	bhi.w	80238d4 <dhcp_parse_reply+0x358>
 802367c:	a201      	add	r2, pc, #4	@ (adr r2, 8023684 <dhcp_parse_reply+0x108>)
 802367e:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 8023682:	bf00      	nop
 8023684:	08023775 	.word	0x08023775
 8023688:	08023785 	.word	0x08023785
 802368c:	080238d5 	.word	0x080238d5
 8023690:	080237a7 	.word	0x080237a7
 8023694:	080238d5 	.word	0x080238d5
 8023698:	080238d5 	.word	0x080238d5
 802369c:	080238d5 	.word	0x080238d5
 80236a0:	080238d5 	.word	0x080238d5
 80236a4:	080238d5 	.word	0x080238d5
 80236a8:	080238d5 	.word	0x080238d5
 80236ac:	080238d5 	.word	0x080238d5
 80236b0:	080238d5 	.word	0x080238d5
 80236b4:	080238d5 	.word	0x080238d5
 80236b8:	080238d5 	.word	0x080238d5
 80236bc:	080238d5 	.word	0x080238d5
 80236c0:	080238d5 	.word	0x080238d5
 80236c4:	080238d5 	.word	0x080238d5
 80236c8:	080238d5 	.word	0x080238d5
 80236cc:	080238d5 	.word	0x080238d5
 80236d0:	080238d5 	.word	0x080238d5
 80236d4:	080238d5 	.word	0x080238d5
 80236d8:	080238d5 	.word	0x080238d5
 80236dc:	080238d5 	.word	0x080238d5
 80236e0:	080238d5 	.word	0x080238d5
 80236e4:	080238d5 	.word	0x080238d5
 80236e8:	080238d5 	.word	0x080238d5
 80236ec:	080238d5 	.word	0x080238d5
 80236f0:	080238d5 	.word	0x080238d5
 80236f4:	080238d5 	.word	0x080238d5
 80236f8:	080238d5 	.word	0x080238d5
 80236fc:	080238d5 	.word	0x080238d5
 8023700:	080238d5 	.word	0x080238d5
 8023704:	080238d5 	.word	0x080238d5
 8023708:	080238d5 	.word	0x080238d5
 802370c:	080238d5 	.word	0x080238d5
 8023710:	080238d5 	.word	0x080238d5
 8023714:	080238d5 	.word	0x080238d5
 8023718:	080238d5 	.word	0x080238d5
 802371c:	080238d5 	.word	0x080238d5
 8023720:	080238d5 	.word	0x080238d5
 8023724:	080238d5 	.word	0x080238d5
 8023728:	080238d5 	.word	0x080238d5
 802372c:	080238d5 	.word	0x080238d5
 8023730:	080238d5 	.word	0x080238d5
 8023734:	080238d5 	.word	0x080238d5
 8023738:	080238d5 	.word	0x080238d5
 802373c:	080238d5 	.word	0x080238d5
 8023740:	080238d5 	.word	0x080238d5
 8023744:	080238d5 	.word	0x080238d5
 8023748:	080238d5 	.word	0x080238d5
 802374c:	080238d5 	.word	0x080238d5
 8023750:	080237d3 	.word	0x080237d3
 8023754:	080237f5 	.word	0x080237f5
 8023758:	08023831 	.word	0x08023831
 802375c:	08023853 	.word	0x08023853
 8023760:	080238d5 	.word	0x080238d5
 8023764:	080238d5 	.word	0x080238d5
 8023768:	080238d5 	.word	0x080238d5
 802376c:	08023891 	.word	0x08023891
 8023770:	080238b3 	.word	0x080238b3
      /* case(DHCP_OPTION_END): handled above */
      case (DHCP_OPTION_PAD):
        /* special option: no len encoded */
        decode_len = len = 0;
 8023774:	2300      	movs	r3, #0
 8023776:	f887 302b 	strb.w	r3, [r7, #43]	@ 0x2b
 802377a:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 802377e:	f887 302a 	strb.w	r3, [r7, #42]	@ 0x2a
        /* will be increased below */
        break;
 8023782:	e0ab      	b.n	80238dc <dhcp_parse_reply+0x360>
      case (DHCP_OPTION_SUBNET_MASK):
        LWIP_ERROR("len == 4", len == 4, return ERR_VAL;);
 8023784:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 8023788:	2b04      	cmp	r3, #4
 802378a:	d009      	beq.n	80237a0 <dhcp_parse_reply+0x224>
 802378c:	4b3a      	ldr	r3, [pc, #232]	@ (8023878 <dhcp_parse_reply+0x2fc>)
 802378e:	f240 622e 	movw	r2, #1582	@ 0x62e
 8023792:	493a      	ldr	r1, [pc, #232]	@ (802387c <dhcp_parse_reply+0x300>)
 8023794:	483a      	ldr	r0, [pc, #232]	@ (8023880 <dhcp_parse_reply+0x304>)
 8023796:	f006 fd11 	bl	802a1bc <iprintf>
 802379a:	f06f 0305 	mvn.w	r3, #5
 802379e:	e1bb      	b.n	8023b18 <dhcp_parse_reply+0x59c>
        decode_idx = DHCP_OPTION_IDX_SUBNET_MASK;
 80237a0:	2306      	movs	r3, #6
 80237a2:	627b      	str	r3, [r7, #36]	@ 0x24
        break;
 80237a4:	e09a      	b.n	80238dc <dhcp_parse_reply+0x360>
      case (DHCP_OPTION_ROUTER):
        decode_len = 4; /* only copy the first given router */
 80237a6:	2304      	movs	r3, #4
 80237a8:	f887 302a 	strb.w	r3, [r7, #42]	@ 0x2a
        LWIP_ERROR("len >= decode_len", len >= decode_len, return ERR_VAL;);
 80237ac:	f897 202b 	ldrb.w	r2, [r7, #43]	@ 0x2b
 80237b0:	f897 302a 	ldrb.w	r3, [r7, #42]	@ 0x2a
 80237b4:	429a      	cmp	r2, r3
 80237b6:	d209      	bcs.n	80237cc <dhcp_parse_reply+0x250>
 80237b8:	4b2f      	ldr	r3, [pc, #188]	@ (8023878 <dhcp_parse_reply+0x2fc>)
 80237ba:	f240 6233 	movw	r2, #1587	@ 0x633
 80237be:	4931      	ldr	r1, [pc, #196]	@ (8023884 <dhcp_parse_reply+0x308>)
 80237c0:	482f      	ldr	r0, [pc, #188]	@ (8023880 <dhcp_parse_reply+0x304>)
 80237c2:	f006 fcfb 	bl	802a1bc <iprintf>
 80237c6:	f06f 0305 	mvn.w	r3, #5
 80237ca:	e1a5      	b.n	8023b18 <dhcp_parse_reply+0x59c>
        decode_idx = DHCP_OPTION_IDX_ROUTER;
 80237cc:	2307      	movs	r3, #7
 80237ce:	627b      	str	r3, [r7, #36]	@ 0x24
        break;
 80237d0:	e084      	b.n	80238dc <dhcp_parse_reply+0x360>
        LWIP_ERROR("len >= decode_len", len >= decode_len, return ERR_VAL;);
        decode_idx = DHCP_OPTION_IDX_DNS_SERVER;
        break;
#endif /* LWIP_DHCP_PROVIDE_DNS_SERVERS */
      case (DHCP_OPTION_LEASE_TIME):
        LWIP_ERROR("len == 4", len == 4, return ERR_VAL;);
 80237d2:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 80237d6:	2b04      	cmp	r3, #4
 80237d8:	d009      	beq.n	80237ee <dhcp_parse_reply+0x272>
 80237da:	4b27      	ldr	r3, [pc, #156]	@ (8023878 <dhcp_parse_reply+0x2fc>)
 80237dc:	f240 6241 	movw	r2, #1601	@ 0x641
 80237e0:	4926      	ldr	r1, [pc, #152]	@ (802387c <dhcp_parse_reply+0x300>)
 80237e2:	4827      	ldr	r0, [pc, #156]	@ (8023880 <dhcp_parse_reply+0x304>)
 80237e4:	f006 fcea 	bl	802a1bc <iprintf>
 80237e8:	f06f 0305 	mvn.w	r3, #5
 80237ec:	e194      	b.n	8023b18 <dhcp_parse_reply+0x59c>
        decode_idx = DHCP_OPTION_IDX_LEASE_TIME;
 80237ee:	2303      	movs	r3, #3
 80237f0:	627b      	str	r3, [r7, #36]	@ 0x24
        break;
 80237f2:	e073      	b.n	80238dc <dhcp_parse_reply+0x360>
        LWIP_ERROR("len >= decode_len", len >= decode_len, return ERR_VAL;);
        decode_idx = DHCP_OPTION_IDX_NTP_SERVER;
        break;
#endif /* LWIP_DHCP_GET_NTP_SRV*/
      case (DHCP_OPTION_OVERLOAD):
        LWIP_ERROR("len == 1", len == 1, return ERR_VAL;);
 80237f4:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 80237f8:	2b01      	cmp	r3, #1
 80237fa:	d009      	beq.n	8023810 <dhcp_parse_reply+0x294>
 80237fc:	4b1e      	ldr	r3, [pc, #120]	@ (8023878 <dhcp_parse_reply+0x2fc>)
 80237fe:	f240 624f 	movw	r2, #1615	@ 0x64f
 8023802:	4921      	ldr	r1, [pc, #132]	@ (8023888 <dhcp_parse_reply+0x30c>)
 8023804:	481e      	ldr	r0, [pc, #120]	@ (8023880 <dhcp_parse_reply+0x304>)
 8023806:	f006 fcd9 	bl	802a1bc <iprintf>
 802380a:	f06f 0305 	mvn.w	r3, #5
 802380e:	e183      	b.n	8023b18 <dhcp_parse_reply+0x59c>
        /* decode overload only in options, not in file/sname: invalid packet */
        LWIP_ERROR("overload in file/sname", options_idx == DHCP_OPTIONS_OFS, return ERR_VAL;);
 8023810:	8fbb      	ldrh	r3, [r7, #60]	@ 0x3c
 8023812:	2bf0      	cmp	r3, #240	@ 0xf0
 8023814:	d009      	beq.n	802382a <dhcp_parse_reply+0x2ae>
 8023816:	4b18      	ldr	r3, [pc, #96]	@ (8023878 <dhcp_parse_reply+0x2fc>)
 8023818:	f240 6251 	movw	r2, #1617	@ 0x651
 802381c:	491b      	ldr	r1, [pc, #108]	@ (802388c <dhcp_parse_reply+0x310>)
 802381e:	4818      	ldr	r0, [pc, #96]	@ (8023880 <dhcp_parse_reply+0x304>)
 8023820:	f006 fccc 	bl	802a1bc <iprintf>
 8023824:	f06f 0305 	mvn.w	r3, #5
 8023828:	e176      	b.n	8023b18 <dhcp_parse_reply+0x59c>
        decode_idx = DHCP_OPTION_IDX_OVERLOAD;
 802382a:	2300      	movs	r3, #0
 802382c:	627b      	str	r3, [r7, #36]	@ 0x24
        break;
 802382e:	e055      	b.n	80238dc <dhcp_parse_reply+0x360>
      case (DHCP_OPTION_MESSAGE_TYPE):
        LWIP_ERROR("len == 1", len == 1, return ERR_VAL;);
 8023830:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 8023834:	2b01      	cmp	r3, #1
 8023836:	d009      	beq.n	802384c <dhcp_parse_reply+0x2d0>
 8023838:	4b0f      	ldr	r3, [pc, #60]	@ (8023878 <dhcp_parse_reply+0x2fc>)
 802383a:	f240 6255 	movw	r2, #1621	@ 0x655
 802383e:	4912      	ldr	r1, [pc, #72]	@ (8023888 <dhcp_parse_reply+0x30c>)
 8023840:	480f      	ldr	r0, [pc, #60]	@ (8023880 <dhcp_parse_reply+0x304>)
 8023842:	f006 fcbb 	bl	802a1bc <iprintf>
 8023846:	f06f 0305 	mvn.w	r3, #5
 802384a:	e165      	b.n	8023b18 <dhcp_parse_reply+0x59c>
        decode_idx = DHCP_OPTION_IDX_MSG_TYPE;
 802384c:	2301      	movs	r3, #1
 802384e:	627b      	str	r3, [r7, #36]	@ 0x24
        break;
 8023850:	e044      	b.n	80238dc <dhcp_parse_reply+0x360>
      case (DHCP_OPTION_SERVER_ID):
        LWIP_ERROR("len == 4", len == 4, return ERR_VAL;);
 8023852:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 8023856:	2b04      	cmp	r3, #4
 8023858:	d009      	beq.n	802386e <dhcp_parse_reply+0x2f2>
 802385a:	4b07      	ldr	r3, [pc, #28]	@ (8023878 <dhcp_parse_reply+0x2fc>)
 802385c:	f240 6259 	movw	r2, #1625	@ 0x659
 8023860:	4906      	ldr	r1, [pc, #24]	@ (802387c <dhcp_parse_reply+0x300>)
 8023862:	4807      	ldr	r0, [pc, #28]	@ (8023880 <dhcp_parse_reply+0x304>)
 8023864:	f006 fcaa 	bl	802a1bc <iprintf>
 8023868:	f06f 0305 	mvn.w	r3, #5
 802386c:	e154      	b.n	8023b18 <dhcp_parse_reply+0x59c>
        decode_idx = DHCP_OPTION_IDX_SERVER_ID;
 802386e:	2302      	movs	r3, #2
 8023870:	627b      	str	r3, [r7, #36]	@ 0x24
        break;
 8023872:	e033      	b.n	80238dc <dhcp_parse_reply+0x360>
 8023874:	2402afdc 	.word	0x2402afdc
 8023878:	080306e8 	.word	0x080306e8
 802387c:	08030970 	.word	0x08030970
 8023880:	08030748 	.word	0x08030748
 8023884:	0803097c 	.word	0x0803097c
 8023888:	08030990 	.word	0x08030990
 802388c:	0803099c 	.word	0x0803099c
      case (DHCP_OPTION_T1):
        LWIP_ERROR("len == 4", len == 4, return ERR_VAL;);
 8023890:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 8023894:	2b04      	cmp	r3, #4
 8023896:	d009      	beq.n	80238ac <dhcp_parse_reply+0x330>
 8023898:	4ba1      	ldr	r3, [pc, #644]	@ (8023b20 <dhcp_parse_reply+0x5a4>)
 802389a:	f240 625d 	movw	r2, #1629	@ 0x65d
 802389e:	49a1      	ldr	r1, [pc, #644]	@ (8023b24 <dhcp_parse_reply+0x5a8>)
 80238a0:	48a1      	ldr	r0, [pc, #644]	@ (8023b28 <dhcp_parse_reply+0x5ac>)
 80238a2:	f006 fc8b 	bl	802a1bc <iprintf>
 80238a6:	f06f 0305 	mvn.w	r3, #5
 80238aa:	e135      	b.n	8023b18 <dhcp_parse_reply+0x59c>
        decode_idx = DHCP_OPTION_IDX_T1;
 80238ac:	2304      	movs	r3, #4
 80238ae:	627b      	str	r3, [r7, #36]	@ 0x24
        break;
 80238b0:	e014      	b.n	80238dc <dhcp_parse_reply+0x360>
      case (DHCP_OPTION_T2):
        LWIP_ERROR("len == 4", len == 4, return ERR_VAL;);
 80238b2:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 80238b6:	2b04      	cmp	r3, #4
 80238b8:	d009      	beq.n	80238ce <dhcp_parse_reply+0x352>
 80238ba:	4b99      	ldr	r3, [pc, #612]	@ (8023b20 <dhcp_parse_reply+0x5a4>)
 80238bc:	f240 6261 	movw	r2, #1633	@ 0x661
 80238c0:	4998      	ldr	r1, [pc, #608]	@ (8023b24 <dhcp_parse_reply+0x5a8>)
 80238c2:	4899      	ldr	r0, [pc, #612]	@ (8023b28 <dhcp_parse_reply+0x5ac>)
 80238c4:	f006 fc7a 	bl	802a1bc <iprintf>
 80238c8:	f06f 0305 	mvn.w	r3, #5
 80238cc:	e124      	b.n	8023b18 <dhcp_parse_reply+0x59c>
        decode_idx = DHCP_OPTION_IDX_T2;
 80238ce:	2305      	movs	r3, #5
 80238d0:	627b      	str	r3, [r7, #36]	@ 0x24
        break;
 80238d2:	e003      	b.n	80238dc <dhcp_parse_reply+0x360>
      default:
        decode_len = 0;
 80238d4:	2300      	movs	r3, #0
 80238d6:	f887 302a 	strb.w	r3, [r7, #42]	@ 0x2a
        LWIP_DEBUGF(DHCP_DEBUG, ("skipping option %"U16_F" in options\n", (u16_t)op));
        LWIP_HOOK_DHCP_PARSE_OPTION(ip_current_netif(), dhcp, dhcp->state, msg_in,
                                    dhcp_option_given(dhcp, DHCP_OPTION_IDX_MSG_TYPE) ? (u8_t)dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_MSG_TYPE) : 0,
                                    op, len, q, val_offset);
        break;
 80238da:	bf00      	nop
    }
    if (op == DHCP_OPTION_PAD) {
 80238dc:	7efb      	ldrb	r3, [r7, #27]
 80238de:	2b00      	cmp	r3, #0
 80238e0:	d105      	bne.n	80238ee <dhcp_parse_reply+0x372>
      offset++;
 80238e2:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 80238e6:	3301      	adds	r3, #1
 80238e8:	f8a7 3046 	strh.w	r3, [r7, #70]	@ 0x46
 80238ec:	e0a4      	b.n	8023a38 <dhcp_parse_reply+0x4bc>
    } else {
      if (offset + len + 2 > 0xFFFF) {
 80238ee:	f8b7 2046 	ldrh.w	r2, [r7, #70]	@ 0x46
 80238f2:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 80238f6:	4413      	add	r3, r2
 80238f8:	f64f 72fd 	movw	r2, #65533	@ 0xfffd
 80238fc:	4293      	cmp	r3, r2
 80238fe:	dd02      	ble.n	8023906 <dhcp_parse_reply+0x38a>
        /* overflow */
        return ERR_BUF;
 8023900:	f06f 0301 	mvn.w	r3, #1
 8023904:	e108      	b.n	8023b18 <dhcp_parse_reply+0x59c>
      }
      offset = (u16_t)(offset + len + 2);
 8023906:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 802390a:	b29a      	uxth	r2, r3
 802390c:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 8023910:	4413      	add	r3, r2
 8023912:	b29b      	uxth	r3, r3
 8023914:	3302      	adds	r3, #2
 8023916:	f8a7 3046 	strh.w	r3, [r7, #70]	@ 0x46
      if (decode_len > 0) {
 802391a:	f897 302a 	ldrb.w	r3, [r7, #42]	@ 0x2a
 802391e:	2b00      	cmp	r3, #0
 8023920:	f000 808a 	beq.w	8023a38 <dhcp_parse_reply+0x4bc>
        u32_t value = 0;
 8023924:	2300      	movs	r3, #0
 8023926:	60fb      	str	r3, [r7, #12]
        u16_t copy_len;
decode_next:
        LWIP_ASSERT("check decode_idx", decode_idx >= 0 && decode_idx < DHCP_OPTION_IDX_MAX);
 8023928:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 802392a:	2b00      	cmp	r3, #0
 802392c:	db02      	blt.n	8023934 <dhcp_parse_reply+0x3b8>
 802392e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8023930:	2b07      	cmp	r3, #7
 8023932:	dd06      	ble.n	8023942 <dhcp_parse_reply+0x3c6>
 8023934:	4b7a      	ldr	r3, [pc, #488]	@ (8023b20 <dhcp_parse_reply+0x5a4>)
 8023936:	f44f 62cf 	mov.w	r2, #1656	@ 0x678
 802393a:	497c      	ldr	r1, [pc, #496]	@ (8023b2c <dhcp_parse_reply+0x5b0>)
 802393c:	487a      	ldr	r0, [pc, #488]	@ (8023b28 <dhcp_parse_reply+0x5ac>)
 802393e:	f006 fc3d 	bl	802a1bc <iprintf>
        if (!dhcp_option_given(dhcp, decode_idx)) {
 8023942:	4a7b      	ldr	r2, [pc, #492]	@ (8023b30 <dhcp_parse_reply+0x5b4>)
 8023944:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8023946:	4413      	add	r3, r2
 8023948:	781b      	ldrb	r3, [r3, #0]
 802394a:	2b00      	cmp	r3, #0
 802394c:	d174      	bne.n	8023a38 <dhcp_parse_reply+0x4bc>
          copy_len = LWIP_MIN(decode_len, 4);
 802394e:	f897 302a 	ldrb.w	r3, [r7, #42]	@ 0x2a
 8023952:	2b04      	cmp	r3, #4
 8023954:	bf28      	it	cs
 8023956:	2304      	movcs	r3, #4
 8023958:	b2db      	uxtb	r3, r3
 802395a:	833b      	strh	r3, [r7, #24]
          if (pbuf_copy_partial(q, &value, copy_len, val_offset) != copy_len) {
 802395c:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 802395e:	8b3a      	ldrh	r2, [r7, #24]
 8023960:	f107 010c 	add.w	r1, r7, #12
 8023964:	6b78      	ldr	r0, [r7, #52]	@ 0x34
 8023966:	f7f7 fbb7 	bl	801b0d8 <pbuf_copy_partial>
 802396a:	4603      	mov	r3, r0
 802396c:	461a      	mov	r2, r3
 802396e:	8b3b      	ldrh	r3, [r7, #24]
 8023970:	4293      	cmp	r3, r2
 8023972:	d002      	beq.n	802397a <dhcp_parse_reply+0x3fe>
            return ERR_BUF;
 8023974:	f06f 0301 	mvn.w	r3, #1
 8023978:	e0ce      	b.n	8023b18 <dhcp_parse_reply+0x59c>
          }
          if (decode_len > 4) {
 802397a:	f897 302a 	ldrb.w	r3, [r7, #42]	@ 0x2a
 802397e:	2b04      	cmp	r3, #4
 8023980:	d933      	bls.n	80239ea <dhcp_parse_reply+0x46e>
            /* decode more than one u32_t */
            u16_t next_val_offset;
            LWIP_ERROR("decode_len %% 4 == 0", decode_len % 4 == 0, return ERR_VAL;);
 8023982:	f897 302a 	ldrb.w	r3, [r7, #42]	@ 0x2a
 8023986:	f003 0303 	and.w	r3, r3, #3
 802398a:	b2db      	uxtb	r3, r3
 802398c:	2b00      	cmp	r3, #0
 802398e:	d009      	beq.n	80239a4 <dhcp_parse_reply+0x428>
 8023990:	4b63      	ldr	r3, [pc, #396]	@ (8023b20 <dhcp_parse_reply+0x5a4>)
 8023992:	f240 6281 	movw	r2, #1665	@ 0x681
 8023996:	4967      	ldr	r1, [pc, #412]	@ (8023b34 <dhcp_parse_reply+0x5b8>)
 8023998:	4863      	ldr	r0, [pc, #396]	@ (8023b28 <dhcp_parse_reply+0x5ac>)
 802399a:	f006 fc0f 	bl	802a1bc <iprintf>
 802399e:	f06f 0305 	mvn.w	r3, #5
 80239a2:	e0b9      	b.n	8023b18 <dhcp_parse_reply+0x59c>
            dhcp_got_option(dhcp, decode_idx);
 80239a4:	4a62      	ldr	r2, [pc, #392]	@ (8023b30 <dhcp_parse_reply+0x5b4>)
 80239a6:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80239a8:	4413      	add	r3, r2
 80239aa:	2201      	movs	r2, #1
 80239ac:	701a      	strb	r2, [r3, #0]
            dhcp_set_option_value(dhcp, decode_idx, lwip_htonl(value));
 80239ae:	68fb      	ldr	r3, [r7, #12]
 80239b0:	4618      	mov	r0, r3
 80239b2:	f7f5 fcbe 	bl	8019332 <lwip_htonl>
 80239b6:	4602      	mov	r2, r0
 80239b8:	495f      	ldr	r1, [pc, #380]	@ (8023b38 <dhcp_parse_reply+0x5bc>)
 80239ba:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80239bc:	f841 2023 	str.w	r2, [r1, r3, lsl #2]
            decode_len = (u8_t)(decode_len - 4);
 80239c0:	f897 302a 	ldrb.w	r3, [r7, #42]	@ 0x2a
 80239c4:	3b04      	subs	r3, #4
 80239c6:	f887 302a 	strb.w	r3, [r7, #42]	@ 0x2a
            next_val_offset = (u16_t)(val_offset + 4);
 80239ca:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 80239cc:	3304      	adds	r3, #4
 80239ce:	82fb      	strh	r3, [r7, #22]
            if (next_val_offset < val_offset) {
 80239d0:	8afa      	ldrh	r2, [r7, #22]
 80239d2:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 80239d4:	429a      	cmp	r2, r3
 80239d6:	d202      	bcs.n	80239de <dhcp_parse_reply+0x462>
              /* overflow */
              return ERR_BUF;
 80239d8:	f06f 0301 	mvn.w	r3, #1
 80239dc:	e09c      	b.n	8023b18 <dhcp_parse_reply+0x59c>
            }
            val_offset = next_val_offset;
 80239de:	8afb      	ldrh	r3, [r7, #22]
 80239e0:	847b      	strh	r3, [r7, #34]	@ 0x22
            decode_idx++;
 80239e2:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80239e4:	3301      	adds	r3, #1
 80239e6:	627b      	str	r3, [r7, #36]	@ 0x24
            goto decode_next;
 80239e8:	e79e      	b.n	8023928 <dhcp_parse_reply+0x3ac>
          } else if (decode_len == 4) {
 80239ea:	f897 302a 	ldrb.w	r3, [r7, #42]	@ 0x2a
 80239ee:	2b04      	cmp	r3, #4
 80239f0:	d106      	bne.n	8023a00 <dhcp_parse_reply+0x484>
            value = lwip_ntohl(value);
 80239f2:	68fb      	ldr	r3, [r7, #12]
 80239f4:	4618      	mov	r0, r3
 80239f6:	f7f5 fc9c 	bl	8019332 <lwip_htonl>
 80239fa:	4603      	mov	r3, r0
 80239fc:	60fb      	str	r3, [r7, #12]
 80239fe:	e011      	b.n	8023a24 <dhcp_parse_reply+0x4a8>
          } else {
            LWIP_ERROR("invalid decode_len", decode_len == 1, return ERR_VAL;);
 8023a00:	f897 302a 	ldrb.w	r3, [r7, #42]	@ 0x2a
 8023a04:	2b01      	cmp	r3, #1
 8023a06:	d009      	beq.n	8023a1c <dhcp_parse_reply+0x4a0>
 8023a08:	4b45      	ldr	r3, [pc, #276]	@ (8023b20 <dhcp_parse_reply+0x5a4>)
 8023a0a:	f44f 62d2 	mov.w	r2, #1680	@ 0x690
 8023a0e:	494b      	ldr	r1, [pc, #300]	@ (8023b3c <dhcp_parse_reply+0x5c0>)
 8023a10:	4845      	ldr	r0, [pc, #276]	@ (8023b28 <dhcp_parse_reply+0x5ac>)
 8023a12:	f006 fbd3 	bl	802a1bc <iprintf>
 8023a16:	f06f 0305 	mvn.w	r3, #5
 8023a1a:	e07d      	b.n	8023b18 <dhcp_parse_reply+0x59c>
            value = ((u8_t *)&value)[0];
 8023a1c:	f107 030c 	add.w	r3, r7, #12
 8023a20:	781b      	ldrb	r3, [r3, #0]
 8023a22:	60fb      	str	r3, [r7, #12]
          }
          dhcp_got_option(dhcp, decode_idx);
 8023a24:	4a42      	ldr	r2, [pc, #264]	@ (8023b30 <dhcp_parse_reply+0x5b4>)
 8023a26:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8023a28:	4413      	add	r3, r2
 8023a2a:	2201      	movs	r2, #1
 8023a2c:	701a      	strb	r2, [r3, #0]
          dhcp_set_option_value(dhcp, decode_idx, value);
 8023a2e:	68fa      	ldr	r2, [r7, #12]
 8023a30:	4941      	ldr	r1, [pc, #260]	@ (8023b38 <dhcp_parse_reply+0x5bc>)
 8023a32:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8023a34:	f841 2023 	str.w	r2, [r1, r3, lsl #2]
        }
      }
    }
    if (offset >= q->len) {
 8023a38:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8023a3a:	895b      	ldrh	r3, [r3, #10]
 8023a3c:	f8b7 2046 	ldrh.w	r2, [r7, #70]	@ 0x46
 8023a40:	429a      	cmp	r2, r3
 8023a42:	d327      	bcc.n	8023a94 <dhcp_parse_reply+0x518>
      offset = (u16_t)(offset - q->len);
 8023a44:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8023a46:	895b      	ldrh	r3, [r3, #10]
 8023a48:	f8b7 2046 	ldrh.w	r2, [r7, #70]	@ 0x46
 8023a4c:	1ad3      	subs	r3, r2, r3
 8023a4e:	f8a7 3046 	strh.w	r3, [r7, #70]	@ 0x46
      offset_max = (u16_t)(offset_max - q->len);
 8023a52:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8023a54:	895b      	ldrh	r3, [r3, #10]
 8023a56:	8ffa      	ldrh	r2, [r7, #62]	@ 0x3e
 8023a58:	1ad3      	subs	r3, r2, r3
 8023a5a:	87fb      	strh	r3, [r7, #62]	@ 0x3e
      if (offset < offset_max) {
 8023a5c:	f8b7 2046 	ldrh.w	r2, [r7, #70]	@ 0x46
 8023a60:	8ffb      	ldrh	r3, [r7, #62]	@ 0x3e
 8023a62:	429a      	cmp	r2, r3
 8023a64:	d213      	bcs.n	8023a8e <dhcp_parse_reply+0x512>
        q = q->next;
 8023a66:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8023a68:	681b      	ldr	r3, [r3, #0]
 8023a6a:	637b      	str	r3, [r7, #52]	@ 0x34
        LWIP_ERROR("next pbuf was null", q != NULL, return ERR_VAL;);
 8023a6c:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8023a6e:	2b00      	cmp	r3, #0
 8023a70:	d109      	bne.n	8023a86 <dhcp_parse_reply+0x50a>
 8023a72:	4b2b      	ldr	r3, [pc, #172]	@ (8023b20 <dhcp_parse_reply+0x5a4>)
 8023a74:	f240 629d 	movw	r2, #1693	@ 0x69d
 8023a78:	4931      	ldr	r1, [pc, #196]	@ (8023b40 <dhcp_parse_reply+0x5c4>)
 8023a7a:	482b      	ldr	r0, [pc, #172]	@ (8023b28 <dhcp_parse_reply+0x5ac>)
 8023a7c:	f006 fb9e 	bl	802a1bc <iprintf>
 8023a80:	f06f 0305 	mvn.w	r3, #5
 8023a84:	e048      	b.n	8023b18 <dhcp_parse_reply+0x59c>
        options = (u8_t *)q->payload;
 8023a86:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8023a88:	685b      	ldr	r3, [r3, #4]
 8023a8a:	643b      	str	r3, [r7, #64]	@ 0x40
 8023a8c:	e002      	b.n	8023a94 <dhcp_parse_reply+0x518>
      } else {
        /* We've run out of bytes, probably no end marker. Don't proceed. */
        return ERR_BUF;
 8023a8e:	f06f 0301 	mvn.w	r3, #1
 8023a92:	e041      	b.n	8023b18 <dhcp_parse_reply+0x59c>
  while ((q != NULL) && (offset < offset_max) && (options[offset] != DHCP_OPTION_END)) {
 8023a94:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8023a96:	2b00      	cmp	r3, #0
 8023a98:	d00c      	beq.n	8023ab4 <dhcp_parse_reply+0x538>
 8023a9a:	f8b7 2046 	ldrh.w	r2, [r7, #70]	@ 0x46
 8023a9e:	8ffb      	ldrh	r3, [r7, #62]	@ 0x3e
 8023aa0:	429a      	cmp	r2, r3
 8023aa2:	d207      	bcs.n	8023ab4 <dhcp_parse_reply+0x538>
 8023aa4:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 8023aa8:	6c3a      	ldr	r2, [r7, #64]	@ 0x40
 8023aaa:	4413      	add	r3, r2
 8023aac:	781b      	ldrb	r3, [r3, #0]
 8023aae:	2bff      	cmp	r3, #255	@ 0xff
 8023ab0:	f47f ada8 	bne.w	8023604 <dhcp_parse_reply+0x88>
      }
    }
  }
  /* is this an overloaded message? */
  if (dhcp_option_given(dhcp, DHCP_OPTION_IDX_OVERLOAD)) {
 8023ab4:	4b1e      	ldr	r3, [pc, #120]	@ (8023b30 <dhcp_parse_reply+0x5b4>)
 8023ab6:	781b      	ldrb	r3, [r3, #0]
 8023ab8:	2b00      	cmp	r3, #0
 8023aba:	d018      	beq.n	8023aee <dhcp_parse_reply+0x572>
    u32_t overload = dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_OVERLOAD);
 8023abc:	4b1e      	ldr	r3, [pc, #120]	@ (8023b38 <dhcp_parse_reply+0x5bc>)
 8023abe:	681b      	ldr	r3, [r3, #0]
 8023ac0:	613b      	str	r3, [r7, #16]
    dhcp_clear_option(dhcp, DHCP_OPTION_IDX_OVERLOAD);
 8023ac2:	4b1b      	ldr	r3, [pc, #108]	@ (8023b30 <dhcp_parse_reply+0x5b4>)
 8023ac4:	2200      	movs	r2, #0
 8023ac6:	701a      	strb	r2, [r3, #0]
    if (overload == DHCP_OVERLOAD_FILE) {
 8023ac8:	693b      	ldr	r3, [r7, #16]
 8023aca:	2b01      	cmp	r3, #1
 8023acc:	d102      	bne.n	8023ad4 <dhcp_parse_reply+0x558>
      parse_file_as_options = 1;
 8023ace:	2301      	movs	r3, #1
 8023ad0:	633b      	str	r3, [r7, #48]	@ 0x30
 8023ad2:	e00c      	b.n	8023aee <dhcp_parse_reply+0x572>
      LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("overloaded file field\n"));
    } else if (overload == DHCP_OVERLOAD_SNAME) {
 8023ad4:	693b      	ldr	r3, [r7, #16]
 8023ad6:	2b02      	cmp	r3, #2
 8023ad8:	d102      	bne.n	8023ae0 <dhcp_parse_reply+0x564>
      parse_sname_as_options = 1;
 8023ada:	2301      	movs	r3, #1
 8023adc:	62fb      	str	r3, [r7, #44]	@ 0x2c
 8023ade:	e006      	b.n	8023aee <dhcp_parse_reply+0x572>
      LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("overloaded sname field\n"));
    } else if (overload == DHCP_OVERLOAD_SNAME_FILE) {
 8023ae0:	693b      	ldr	r3, [r7, #16]
 8023ae2:	2b03      	cmp	r3, #3
 8023ae4:	d103      	bne.n	8023aee <dhcp_parse_reply+0x572>
      parse_sname_as_options = 1;
 8023ae6:	2301      	movs	r3, #1
 8023ae8:	62fb      	str	r3, [r7, #44]	@ 0x2c
      parse_file_as_options = 1;
 8023aea:	2301      	movs	r3, #1
 8023aec:	633b      	str	r3, [r7, #48]	@ 0x30
      LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("overloaded sname and file field\n"));
    } else {
      LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("invalid overload option: %d\n", (int)overload));
    }
  }
  if (parse_file_as_options) {
 8023aee:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8023af0:	2b00      	cmp	r3, #0
 8023af2:	d006      	beq.n	8023b02 <dhcp_parse_reply+0x586>
    /* if both are overloaded, parse file first and then sname (RFC 2131 ch. 4.1) */
    parse_file_as_options = 0;
 8023af4:	2300      	movs	r3, #0
 8023af6:	633b      	str	r3, [r7, #48]	@ 0x30
    options_idx = DHCP_FILE_OFS;
 8023af8:	236c      	movs	r3, #108	@ 0x6c
 8023afa:	87bb      	strh	r3, [r7, #60]	@ 0x3c
    options_idx_max = DHCP_FILE_OFS + DHCP_FILE_LEN;
 8023afc:	23ec      	movs	r3, #236	@ 0xec
 8023afe:	877b      	strh	r3, [r7, #58]	@ 0x3a
#if LWIP_DHCP_BOOTP_FILE
    file_overloaded = 1;
#endif
    goto again;
 8023b00:	e559      	b.n	80235b6 <dhcp_parse_reply+0x3a>
  } else if (parse_sname_as_options) {
 8023b02:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8023b04:	2b00      	cmp	r3, #0
 8023b06:	d006      	beq.n	8023b16 <dhcp_parse_reply+0x59a>
    parse_sname_as_options = 0;
 8023b08:	2300      	movs	r3, #0
 8023b0a:	62fb      	str	r3, [r7, #44]	@ 0x2c
    options_idx = DHCP_SNAME_OFS;
 8023b0c:	232c      	movs	r3, #44	@ 0x2c
 8023b0e:	87bb      	strh	r3, [r7, #60]	@ 0x3c
    options_idx_max = DHCP_SNAME_OFS + DHCP_SNAME_LEN;
 8023b10:	236c      	movs	r3, #108	@ 0x6c
 8023b12:	877b      	strh	r3, [r7, #58]	@ 0x3a
    goto again;
 8023b14:	e54f      	b.n	80235b6 <dhcp_parse_reply+0x3a>
    }
    /* make sure the string is really NULL-terminated */
    dhcp->boot_file_name[DHCP_FILE_LEN-1] = 0;
  }
#endif /* LWIP_DHCP_BOOTP_FILE */ 
  return ERR_OK;
 8023b16:	2300      	movs	r3, #0
}
 8023b18:	4618      	mov	r0, r3
 8023b1a:	3748      	adds	r7, #72	@ 0x48
 8023b1c:	46bd      	mov	sp, r7
 8023b1e:	bd80      	pop	{r7, pc}
 8023b20:	080306e8 	.word	0x080306e8
 8023b24:	08030970 	.word	0x08030970
 8023b28:	08030748 	.word	0x08030748
 8023b2c:	080309b4 	.word	0x080309b4
 8023b30:	2402afdc 	.word	0x2402afdc
 8023b34:	080309c8 	.word	0x080309c8
 8023b38:	2402afbc 	.word	0x2402afbc
 8023b3c:	080309e0 	.word	0x080309e0
 8023b40:	080309f4 	.word	0x080309f4

08023b44 <dhcp_recv>:
/**
 * If an incoming DHCP message is in response to us, then trigger the state machine
 */
static void
dhcp_recv(void *arg, struct udp_pcb *pcb, struct pbuf *p, const ip_addr_t *addr, u16_t port)
{
 8023b44:	b580      	push	{r7, lr}
 8023b46:	b08a      	sub	sp, #40	@ 0x28
 8023b48:	af00      	add	r7, sp, #0
 8023b4a:	60f8      	str	r0, [r7, #12]
 8023b4c:	60b9      	str	r1, [r7, #8]
 8023b4e:	607a      	str	r2, [r7, #4]
 8023b50:	603b      	str	r3, [r7, #0]
  struct netif *netif = ip_current_input_netif();
 8023b52:	4b5e      	ldr	r3, [pc, #376]	@ (8023ccc <dhcp_recv+0x188>)
 8023b54:	685b      	ldr	r3, [r3, #4]
 8023b56:	61fb      	str	r3, [r7, #28]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 8023b58:	69fb      	ldr	r3, [r7, #28]
 8023b5a:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8023b5c:	61bb      	str	r3, [r7, #24]
  struct dhcp_msg *reply_msg = (struct dhcp_msg *)p->payload;
 8023b5e:	687b      	ldr	r3, [r7, #4]
 8023b60:	685b      	ldr	r3, [r3, #4]
 8023b62:	617b      	str	r3, [r7, #20]
  struct dhcp_msg *msg_in;

  LWIP_UNUSED_ARG(arg);

  /* Caught DHCP message from netif that does not have DHCP enabled? -> not interested */
  if ((dhcp == NULL) || (dhcp->pcb_allocated == 0)) {
 8023b64:	69bb      	ldr	r3, [r7, #24]
 8023b66:	2b00      	cmp	r3, #0
 8023b68:	f000 809a 	beq.w	8023ca0 <dhcp_recv+0x15c>
 8023b6c:	69bb      	ldr	r3, [r7, #24]
 8023b6e:	791b      	ldrb	r3, [r3, #4]
 8023b70:	2b00      	cmp	r3, #0
 8023b72:	f000 8095 	beq.w	8023ca0 <dhcp_recv+0x15c>
  /* prevent warnings about unused arguments */
  LWIP_UNUSED_ARG(pcb);
  LWIP_UNUSED_ARG(addr);
  LWIP_UNUSED_ARG(port);

  if (p->len < DHCP_MIN_REPLY_LEN) {
 8023b76:	687b      	ldr	r3, [r7, #4]
 8023b78:	895b      	ldrh	r3, [r3, #10]
 8023b7a:	2b2b      	cmp	r3, #43	@ 0x2b
 8023b7c:	f240 8092 	bls.w	8023ca4 <dhcp_recv+0x160>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, ("DHCP reply message or pbuf too short\n"));
    goto free_pbuf_and_return;
  }

  if (reply_msg->op != DHCP_BOOTREPLY) {
 8023b80:	697b      	ldr	r3, [r7, #20]
 8023b82:	781b      	ldrb	r3, [r3, #0]
 8023b84:	2b02      	cmp	r3, #2
 8023b86:	f040 808f 	bne.w	8023ca8 <dhcp_recv+0x164>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, ("not a DHCP reply message, but type %"U16_F"\n", (u16_t)reply_msg->op));
    goto free_pbuf_and_return;
  }
  /* iterate through hardware address and match against DHCP message */
  for (i = 0; i < netif->hwaddr_len && i < LWIP_MIN(DHCP_CHADDR_LEN, NETIF_MAX_HWADDR_LEN); i++) {
 8023b8a:	2300      	movs	r3, #0
 8023b8c:	74fb      	strb	r3, [r7, #19]
 8023b8e:	e00e      	b.n	8023bae <dhcp_recv+0x6a>
    if (netif->hwaddr[i] != reply_msg->chaddr[i]) {
 8023b90:	7cfb      	ldrb	r3, [r7, #19]
 8023b92:	69fa      	ldr	r2, [r7, #28]
 8023b94:	4413      	add	r3, r2
 8023b96:	f893 202a 	ldrb.w	r2, [r3, #42]	@ 0x2a
 8023b9a:	7cfb      	ldrb	r3, [r7, #19]
 8023b9c:	6979      	ldr	r1, [r7, #20]
 8023b9e:	440b      	add	r3, r1
 8023ba0:	7f1b      	ldrb	r3, [r3, #28]
 8023ba2:	429a      	cmp	r2, r3
 8023ba4:	f040 8082 	bne.w	8023cac <dhcp_recv+0x168>
  for (i = 0; i < netif->hwaddr_len && i < LWIP_MIN(DHCP_CHADDR_LEN, NETIF_MAX_HWADDR_LEN); i++) {
 8023ba8:	7cfb      	ldrb	r3, [r7, #19]
 8023baa:	3301      	adds	r3, #1
 8023bac:	74fb      	strb	r3, [r7, #19]
 8023bae:	69fb      	ldr	r3, [r7, #28]
 8023bb0:	f893 3030 	ldrb.w	r3, [r3, #48]	@ 0x30
 8023bb4:	7cfa      	ldrb	r2, [r7, #19]
 8023bb6:	429a      	cmp	r2, r3
 8023bb8:	d202      	bcs.n	8023bc0 <dhcp_recv+0x7c>
 8023bba:	7cfb      	ldrb	r3, [r7, #19]
 8023bbc:	2b05      	cmp	r3, #5
 8023bbe:	d9e7      	bls.n	8023b90 <dhcp_recv+0x4c>
                   (u16_t)i, (u16_t)netif->hwaddr[i], (u16_t)i, (u16_t)reply_msg->chaddr[i]));
      goto free_pbuf_and_return;
    }
  }
  /* match transaction ID against what we expected */
  if (lwip_ntohl(reply_msg->xid) != dhcp->xid) {
 8023bc0:	697b      	ldr	r3, [r7, #20]
 8023bc2:	685b      	ldr	r3, [r3, #4]
 8023bc4:	4618      	mov	r0, r3
 8023bc6:	f7f5 fbb4 	bl	8019332 <lwip_htonl>
 8023bca:	4602      	mov	r2, r0
 8023bcc:	69bb      	ldr	r3, [r7, #24]
 8023bce:	681b      	ldr	r3, [r3, #0]
 8023bd0:	429a      	cmp	r2, r3
 8023bd2:	d16d      	bne.n	8023cb0 <dhcp_recv+0x16c>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING,
                ("transaction id mismatch reply_msg->xid(%"X32_F")!=dhcp->xid(%"X32_F")\n", lwip_ntohl(reply_msg->xid), dhcp->xid));
    goto free_pbuf_and_return;
  }
  /* option fields could be unfold? */
  if (dhcp_parse_reply(p, dhcp) != ERR_OK) {
 8023bd4:	69b9      	ldr	r1, [r7, #24]
 8023bd6:	6878      	ldr	r0, [r7, #4]
 8023bd8:	f7ff fcd0 	bl	802357c <dhcp_parse_reply>
 8023bdc:	4603      	mov	r3, r0
 8023bde:	2b00      	cmp	r3, #0
 8023be0:	d168      	bne.n	8023cb4 <dhcp_recv+0x170>
    goto free_pbuf_and_return;
  }

  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("searching DHCP_OPTION_MESSAGE_TYPE\n"));
  /* obtain pointer to DHCP message type */
  if (!dhcp_option_given(dhcp, DHCP_OPTION_IDX_MSG_TYPE)) {
 8023be2:	4b3b      	ldr	r3, [pc, #236]	@ (8023cd0 <dhcp_recv+0x18c>)
 8023be4:	785b      	ldrb	r3, [r3, #1]
 8023be6:	2b00      	cmp	r3, #0
 8023be8:	d066      	beq.n	8023cb8 <dhcp_recv+0x174>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, ("DHCP_OPTION_MESSAGE_TYPE option not found\n"));
    goto free_pbuf_and_return;
  }

  msg_in = (struct dhcp_msg *)p->payload;
 8023bea:	687b      	ldr	r3, [r7, #4]
 8023bec:	685b      	ldr	r3, [r3, #4]
 8023bee:	627b      	str	r3, [r7, #36]	@ 0x24
  /* read DHCP message type */
  msg_type = (u8_t)dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_MSG_TYPE);
 8023bf0:	4b38      	ldr	r3, [pc, #224]	@ (8023cd4 <dhcp_recv+0x190>)
 8023bf2:	685b      	ldr	r3, [r3, #4]
 8023bf4:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
  /* message type is DHCP ACK? */
  if (msg_type == DHCP_ACK) {
 8023bf8:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 8023bfc:	2b05      	cmp	r3, #5
 8023bfe:	d12a      	bne.n	8023c56 <dhcp_recv+0x112>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("DHCP_ACK received\n"));
    /* in requesting state? */
    if (dhcp->state == DHCP_STATE_REQUESTING) {
 8023c00:	69bb      	ldr	r3, [r7, #24]
 8023c02:	795b      	ldrb	r3, [r3, #5]
 8023c04:	2b01      	cmp	r3, #1
 8023c06:	d112      	bne.n	8023c2e <dhcp_recv+0xea>
      dhcp_handle_ack(netif, msg_in);
 8023c08:	6a79      	ldr	r1, [r7, #36]	@ 0x24
 8023c0a:	69f8      	ldr	r0, [r7, #28]
 8023c0c:	f7fe fe00 	bl	8022810 <dhcp_handle_ack>
#if DHCP_DOES_ARP_CHECK
      if ((netif->flags & NETIF_FLAG_ETHARP) != 0) {
 8023c10:	69fb      	ldr	r3, [r7, #28]
 8023c12:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 8023c16:	f003 0308 	and.w	r3, r3, #8
 8023c1a:	2b00      	cmp	r3, #0
 8023c1c:	d003      	beq.n	8023c26 <dhcp_recv+0xe2>
        /* check if the acknowledged lease address is already in use */
        dhcp_check(netif);
 8023c1e:	69f8      	ldr	r0, [r7, #28]
 8023c20:	f7fe fb6e 	bl	8022300 <dhcp_check>
 8023c24:	e04b      	b.n	8023cbe <dhcp_recv+0x17a>
      } else {
        /* bind interface to the acknowledged lease address */
        dhcp_bind(netif);
 8023c26:	69f8      	ldr	r0, [r7, #28]
 8023c28:	f7ff f852 	bl	8022cd0 <dhcp_bind>
 8023c2c:	e047      	b.n	8023cbe <dhcp_recv+0x17a>
      /* bind interface to the acknowledged lease address */
      dhcp_bind(netif);
#endif
    }
    /* already bound to the given lease address? */
    else if ((dhcp->state == DHCP_STATE_REBOOTING) || (dhcp->state == DHCP_STATE_REBINDING) ||
 8023c2e:	69bb      	ldr	r3, [r7, #24]
 8023c30:	795b      	ldrb	r3, [r3, #5]
 8023c32:	2b03      	cmp	r3, #3
 8023c34:	d007      	beq.n	8023c46 <dhcp_recv+0x102>
 8023c36:	69bb      	ldr	r3, [r7, #24]
 8023c38:	795b      	ldrb	r3, [r3, #5]
 8023c3a:	2b04      	cmp	r3, #4
 8023c3c:	d003      	beq.n	8023c46 <dhcp_recv+0x102>
             (dhcp->state == DHCP_STATE_RENEWING)) {
 8023c3e:	69bb      	ldr	r3, [r7, #24]
 8023c40:	795b      	ldrb	r3, [r3, #5]
    else if ((dhcp->state == DHCP_STATE_REBOOTING) || (dhcp->state == DHCP_STATE_REBINDING) ||
 8023c42:	2b05      	cmp	r3, #5
 8023c44:	d13b      	bne.n	8023cbe <dhcp_recv+0x17a>
      dhcp_handle_ack(netif, msg_in);
 8023c46:	6a79      	ldr	r1, [r7, #36]	@ 0x24
 8023c48:	69f8      	ldr	r0, [r7, #28]
 8023c4a:	f7fe fde1 	bl	8022810 <dhcp_handle_ack>
      dhcp_bind(netif);
 8023c4e:	69f8      	ldr	r0, [r7, #28]
 8023c50:	f7ff f83e 	bl	8022cd0 <dhcp_bind>
 8023c54:	e033      	b.n	8023cbe <dhcp_recv+0x17a>
    }
  }
  /* received a DHCP_NAK in appropriate state? */
  else if ((msg_type == DHCP_NAK) &&
 8023c56:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 8023c5a:	2b06      	cmp	r3, #6
 8023c5c:	d113      	bne.n	8023c86 <dhcp_recv+0x142>
           ((dhcp->state == DHCP_STATE_REBOOTING) || (dhcp->state == DHCP_STATE_REQUESTING) ||
 8023c5e:	69bb      	ldr	r3, [r7, #24]
 8023c60:	795b      	ldrb	r3, [r3, #5]
  else if ((msg_type == DHCP_NAK) &&
 8023c62:	2b03      	cmp	r3, #3
 8023c64:	d00b      	beq.n	8023c7e <dhcp_recv+0x13a>
           ((dhcp->state == DHCP_STATE_REBOOTING) || (dhcp->state == DHCP_STATE_REQUESTING) ||
 8023c66:	69bb      	ldr	r3, [r7, #24]
 8023c68:	795b      	ldrb	r3, [r3, #5]
 8023c6a:	2b01      	cmp	r3, #1
 8023c6c:	d007      	beq.n	8023c7e <dhcp_recv+0x13a>
            (dhcp->state == DHCP_STATE_REBINDING) || (dhcp->state == DHCP_STATE_RENEWING  ))) {
 8023c6e:	69bb      	ldr	r3, [r7, #24]
 8023c70:	795b      	ldrb	r3, [r3, #5]
           ((dhcp->state == DHCP_STATE_REBOOTING) || (dhcp->state == DHCP_STATE_REQUESTING) ||
 8023c72:	2b04      	cmp	r3, #4
 8023c74:	d003      	beq.n	8023c7e <dhcp_recv+0x13a>
            (dhcp->state == DHCP_STATE_REBINDING) || (dhcp->state == DHCP_STATE_RENEWING  ))) {
 8023c76:	69bb      	ldr	r3, [r7, #24]
 8023c78:	795b      	ldrb	r3, [r3, #5]
 8023c7a:	2b05      	cmp	r3, #5
 8023c7c:	d103      	bne.n	8023c86 <dhcp_recv+0x142>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("DHCP_NAK received\n"));
    dhcp_handle_nak(netif);
 8023c7e:	69f8      	ldr	r0, [r7, #28]
 8023c80:	f7fe fb24 	bl	80222cc <dhcp_handle_nak>
 8023c84:	e01b      	b.n	8023cbe <dhcp_recv+0x17a>
  }
  /* received a DHCP_OFFER in DHCP_STATE_SELECTING state? */
  else if ((msg_type == DHCP_OFFER) && (dhcp->state == DHCP_STATE_SELECTING)) {
 8023c86:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 8023c8a:	2b02      	cmp	r3, #2
 8023c8c:	d116      	bne.n	8023cbc <dhcp_recv+0x178>
 8023c8e:	69bb      	ldr	r3, [r7, #24]
 8023c90:	795b      	ldrb	r3, [r3, #5]
 8023c92:	2b06      	cmp	r3, #6
 8023c94:	d112      	bne.n	8023cbc <dhcp_recv+0x178>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("DHCP_OFFER received in DHCP_STATE_SELECTING state\n"));
    /* remember offered lease */
    dhcp_handle_offer(netif, msg_in);
 8023c96:	6a79      	ldr	r1, [r7, #36]	@ 0x24
 8023c98:	69f8      	ldr	r0, [r7, #28]
 8023c9a:	f7fe fb65 	bl	8022368 <dhcp_handle_offer>
 8023c9e:	e00e      	b.n	8023cbe <dhcp_recv+0x17a>
    goto free_pbuf_and_return;
 8023ca0:	bf00      	nop
 8023ca2:	e00c      	b.n	8023cbe <dhcp_recv+0x17a>
    goto free_pbuf_and_return;
 8023ca4:	bf00      	nop
 8023ca6:	e00a      	b.n	8023cbe <dhcp_recv+0x17a>
    goto free_pbuf_and_return;
 8023ca8:	bf00      	nop
 8023caa:	e008      	b.n	8023cbe <dhcp_recv+0x17a>
      goto free_pbuf_and_return;
 8023cac:	bf00      	nop
 8023cae:	e006      	b.n	8023cbe <dhcp_recv+0x17a>
    goto free_pbuf_and_return;
 8023cb0:	bf00      	nop
 8023cb2:	e004      	b.n	8023cbe <dhcp_recv+0x17a>
    goto free_pbuf_and_return;
 8023cb4:	bf00      	nop
 8023cb6:	e002      	b.n	8023cbe <dhcp_recv+0x17a>
    goto free_pbuf_and_return;
 8023cb8:	bf00      	nop
 8023cba:	e000      	b.n	8023cbe <dhcp_recv+0x17a>
  }

free_pbuf_and_return:
 8023cbc:	bf00      	nop
  pbuf_free(p);
 8023cbe:	6878      	ldr	r0, [r7, #4]
 8023cc0:	f7f7 f804 	bl	801accc <pbuf_free>
}
 8023cc4:	bf00      	nop
 8023cc6:	3728      	adds	r7, #40	@ 0x28
 8023cc8:	46bd      	mov	sp, r7
 8023cca:	bd80      	pop	{r7, pc}
 8023ccc:	24024408 	.word	0x24024408
 8023cd0:	2402afdc 	.word	0x2402afdc
 8023cd4:	2402afbc 	.word	0x2402afbc

08023cd8 <dhcp_create_msg>:
 * @param dhcp dhcp control struct
 * @param message_type message type of the request
 */
static struct pbuf *
dhcp_create_msg(struct netif *netif, struct dhcp *dhcp, u8_t message_type, u16_t *options_out_len)
{
 8023cd8:	b580      	push	{r7, lr}
 8023cda:	b088      	sub	sp, #32
 8023cdc:	af00      	add	r7, sp, #0
 8023cde:	60f8      	str	r0, [r7, #12]
 8023ce0:	60b9      	str	r1, [r7, #8]
 8023ce2:	603b      	str	r3, [r7, #0]
 8023ce4:	4613      	mov	r3, r2
 8023ce6:	71fb      	strb	r3, [r7, #7]
  if (!xid_initialised) {
    xid = DHCP_GLOBAL_XID;
    xid_initialised = !xid_initialised;
  }
#endif
  LWIP_ERROR("dhcp_create_msg: netif != NULL", (netif != NULL), return NULL;);
 8023ce8:	68fb      	ldr	r3, [r7, #12]
 8023cea:	2b00      	cmp	r3, #0
 8023cec:	d108      	bne.n	8023d00 <dhcp_create_msg+0x28>
 8023cee:	4b5f      	ldr	r3, [pc, #380]	@ (8023e6c <dhcp_create_msg+0x194>)
 8023cf0:	f240 7269 	movw	r2, #1897	@ 0x769
 8023cf4:	495e      	ldr	r1, [pc, #376]	@ (8023e70 <dhcp_create_msg+0x198>)
 8023cf6:	485f      	ldr	r0, [pc, #380]	@ (8023e74 <dhcp_create_msg+0x19c>)
 8023cf8:	f006 fa60 	bl	802a1bc <iprintf>
 8023cfc:	2300      	movs	r3, #0
 8023cfe:	e0b1      	b.n	8023e64 <dhcp_create_msg+0x18c>
  LWIP_ERROR("dhcp_create_msg: dhcp != NULL", (dhcp != NULL), return NULL;);
 8023d00:	68bb      	ldr	r3, [r7, #8]
 8023d02:	2b00      	cmp	r3, #0
 8023d04:	d108      	bne.n	8023d18 <dhcp_create_msg+0x40>
 8023d06:	4b59      	ldr	r3, [pc, #356]	@ (8023e6c <dhcp_create_msg+0x194>)
 8023d08:	f240 726a 	movw	r2, #1898	@ 0x76a
 8023d0c:	495a      	ldr	r1, [pc, #360]	@ (8023e78 <dhcp_create_msg+0x1a0>)
 8023d0e:	4859      	ldr	r0, [pc, #356]	@ (8023e74 <dhcp_create_msg+0x19c>)
 8023d10:	f006 fa54 	bl	802a1bc <iprintf>
 8023d14:	2300      	movs	r3, #0
 8023d16:	e0a5      	b.n	8023e64 <dhcp_create_msg+0x18c>
  p_out = pbuf_alloc(PBUF_TRANSPORT, sizeof(struct dhcp_msg), PBUF_RAM);
 8023d18:	f44f 7220 	mov.w	r2, #640	@ 0x280
 8023d1c:	f44f 719a 	mov.w	r1, #308	@ 0x134
 8023d20:	2036      	movs	r0, #54	@ 0x36
 8023d22:	f7f6 fcbd 	bl	801a6a0 <pbuf_alloc>
 8023d26:	61b8      	str	r0, [r7, #24]
  if (p_out == NULL) {
 8023d28:	69bb      	ldr	r3, [r7, #24]
 8023d2a:	2b00      	cmp	r3, #0
 8023d2c:	d101      	bne.n	8023d32 <dhcp_create_msg+0x5a>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS,
                ("dhcp_create_msg(): could not allocate pbuf\n"));
    return NULL;
 8023d2e:	2300      	movs	r3, #0
 8023d30:	e098      	b.n	8023e64 <dhcp_create_msg+0x18c>
  }
  LWIP_ASSERT("dhcp_create_msg: check that first pbuf can hold struct dhcp_msg",
 8023d32:	69bb      	ldr	r3, [r7, #24]
 8023d34:	895b      	ldrh	r3, [r3, #10]
 8023d36:	f5b3 7f9a 	cmp.w	r3, #308	@ 0x134
 8023d3a:	d206      	bcs.n	8023d4a <dhcp_create_msg+0x72>
 8023d3c:	4b4b      	ldr	r3, [pc, #300]	@ (8023e6c <dhcp_create_msg+0x194>)
 8023d3e:	f240 7271 	movw	r2, #1905	@ 0x771
 8023d42:	494e      	ldr	r1, [pc, #312]	@ (8023e7c <dhcp_create_msg+0x1a4>)
 8023d44:	484b      	ldr	r0, [pc, #300]	@ (8023e74 <dhcp_create_msg+0x19c>)
 8023d46:	f006 fa39 	bl	802a1bc <iprintf>
              (p_out->len >= sizeof(struct dhcp_msg)));

  /* DHCP_REQUEST should reuse 'xid' from DHCPOFFER */
  if ((message_type != DHCP_REQUEST) || (dhcp->state == DHCP_STATE_REBOOTING)) {
 8023d4a:	79fb      	ldrb	r3, [r7, #7]
 8023d4c:	2b03      	cmp	r3, #3
 8023d4e:	d103      	bne.n	8023d58 <dhcp_create_msg+0x80>
 8023d50:	68bb      	ldr	r3, [r7, #8]
 8023d52:	795b      	ldrb	r3, [r3, #5]
 8023d54:	2b03      	cmp	r3, #3
 8023d56:	d10d      	bne.n	8023d74 <dhcp_create_msg+0x9c>
    /* reuse transaction identifier in retransmissions */
    if (dhcp->tries == 0) {
 8023d58:	68bb      	ldr	r3, [r7, #8]
 8023d5a:	799b      	ldrb	r3, [r3, #6]
 8023d5c:	2b00      	cmp	r3, #0
 8023d5e:	d105      	bne.n	8023d6c <dhcp_create_msg+0x94>
#if DHCP_CREATE_RAND_XID && defined(LWIP_RAND)
      xid = LWIP_RAND();
 8023d60:	f004 ff02 	bl	8028b68 <rand>
 8023d64:	4603      	mov	r3, r0
 8023d66:	461a      	mov	r2, r3
 8023d68:	4b45      	ldr	r3, [pc, #276]	@ (8023e80 <dhcp_create_msg+0x1a8>)
 8023d6a:	601a      	str	r2, [r3, #0]
#else /* DHCP_CREATE_RAND_XID && defined(LWIP_RAND) */
      xid++;
#endif /* DHCP_CREATE_RAND_XID && defined(LWIP_RAND) */
    }
    dhcp->xid = xid;
 8023d6c:	4b44      	ldr	r3, [pc, #272]	@ (8023e80 <dhcp_create_msg+0x1a8>)
 8023d6e:	681a      	ldr	r2, [r3, #0]
 8023d70:	68bb      	ldr	r3, [r7, #8]
 8023d72:	601a      	str	r2, [r3, #0]
  }
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE,
              ("transaction id xid(%"X32_F")\n", xid));

  msg_out = (struct dhcp_msg *)p_out->payload;
 8023d74:	69bb      	ldr	r3, [r7, #24]
 8023d76:	685b      	ldr	r3, [r3, #4]
 8023d78:	617b      	str	r3, [r7, #20]
  memset(msg_out, 0, sizeof(struct dhcp_msg));
 8023d7a:	f44f 729a 	mov.w	r2, #308	@ 0x134
 8023d7e:	2100      	movs	r1, #0
 8023d80:	6978      	ldr	r0, [r7, #20]
 8023d82:	f006 fbad 	bl	802a4e0 <memset>

  msg_out->op = DHCP_BOOTREQUEST;
 8023d86:	697b      	ldr	r3, [r7, #20]
 8023d88:	2201      	movs	r2, #1
 8023d8a:	701a      	strb	r2, [r3, #0]
  /* @todo: make link layer independent */
  msg_out->htype = LWIP_IANA_HWTYPE_ETHERNET;
 8023d8c:	697b      	ldr	r3, [r7, #20]
 8023d8e:	2201      	movs	r2, #1
 8023d90:	705a      	strb	r2, [r3, #1]
  msg_out->hlen = netif->hwaddr_len;
 8023d92:	68fb      	ldr	r3, [r7, #12]
 8023d94:	f893 2030 	ldrb.w	r2, [r3, #48]	@ 0x30
 8023d98:	697b      	ldr	r3, [r7, #20]
 8023d9a:	709a      	strb	r2, [r3, #2]
  msg_out->xid = lwip_htonl(dhcp->xid);
 8023d9c:	68bb      	ldr	r3, [r7, #8]
 8023d9e:	681b      	ldr	r3, [r3, #0]
 8023da0:	4618      	mov	r0, r3
 8023da2:	f7f5 fac6 	bl	8019332 <lwip_htonl>
 8023da6:	4602      	mov	r2, r0
 8023da8:	697b      	ldr	r3, [r7, #20]
 8023daa:	605a      	str	r2, [r3, #4]
  /* we don't need the broadcast flag since we can receive unicast traffic
     before being fully configured! */
  /* set ciaddr to netif->ip_addr based on message_type and state */
  if ((message_type == DHCP_INFORM) || (message_type == DHCP_DECLINE) || (message_type == DHCP_RELEASE) ||
 8023dac:	79fb      	ldrb	r3, [r7, #7]
 8023dae:	2b08      	cmp	r3, #8
 8023db0:	d010      	beq.n	8023dd4 <dhcp_create_msg+0xfc>
 8023db2:	79fb      	ldrb	r3, [r7, #7]
 8023db4:	2b04      	cmp	r3, #4
 8023db6:	d00d      	beq.n	8023dd4 <dhcp_create_msg+0xfc>
 8023db8:	79fb      	ldrb	r3, [r7, #7]
 8023dba:	2b07      	cmp	r3, #7
 8023dbc:	d00a      	beq.n	8023dd4 <dhcp_create_msg+0xfc>
 8023dbe:	79fb      	ldrb	r3, [r7, #7]
 8023dc0:	2b03      	cmp	r3, #3
 8023dc2:	d10c      	bne.n	8023dde <dhcp_create_msg+0x106>
      ((message_type == DHCP_REQUEST) && /* DHCP_STATE_BOUND not used for sending! */
       ((dhcp->state == DHCP_STATE_RENEWING) || dhcp->state == DHCP_STATE_REBINDING))) {
 8023dc4:	68bb      	ldr	r3, [r7, #8]
 8023dc6:	795b      	ldrb	r3, [r3, #5]
      ((message_type == DHCP_REQUEST) && /* DHCP_STATE_BOUND not used for sending! */
 8023dc8:	2b05      	cmp	r3, #5
 8023dca:	d003      	beq.n	8023dd4 <dhcp_create_msg+0xfc>
       ((dhcp->state == DHCP_STATE_RENEWING) || dhcp->state == DHCP_STATE_REBINDING))) {
 8023dcc:	68bb      	ldr	r3, [r7, #8]
 8023dce:	795b      	ldrb	r3, [r3, #5]
 8023dd0:	2b04      	cmp	r3, #4
 8023dd2:	d104      	bne.n	8023dde <dhcp_create_msg+0x106>
    ip4_addr_copy(msg_out->ciaddr, *netif_ip4_addr(netif));
 8023dd4:	68fb      	ldr	r3, [r7, #12]
 8023dd6:	3304      	adds	r3, #4
 8023dd8:	681a      	ldr	r2, [r3, #0]
 8023dda:	697b      	ldr	r3, [r7, #20]
 8023ddc:	60da      	str	r2, [r3, #12]
  }
  for (i = 0; i < LWIP_MIN(DHCP_CHADDR_LEN, NETIF_MAX_HWADDR_LEN); i++) {
 8023dde:	2300      	movs	r3, #0
 8023de0:	83fb      	strh	r3, [r7, #30]
 8023de2:	e00c      	b.n	8023dfe <dhcp_create_msg+0x126>
    /* copy netif hardware address (padded with zeroes through memset already) */
    msg_out->chaddr[i] = netif->hwaddr[i];
 8023de4:	8bfa      	ldrh	r2, [r7, #30]
 8023de6:	8bfb      	ldrh	r3, [r7, #30]
 8023de8:	68f9      	ldr	r1, [r7, #12]
 8023dea:	440a      	add	r2, r1
 8023dec:	f892 102a 	ldrb.w	r1, [r2, #42]	@ 0x2a
 8023df0:	697a      	ldr	r2, [r7, #20]
 8023df2:	4413      	add	r3, r2
 8023df4:	460a      	mov	r2, r1
 8023df6:	771a      	strb	r2, [r3, #28]
  for (i = 0; i < LWIP_MIN(DHCP_CHADDR_LEN, NETIF_MAX_HWADDR_LEN); i++) {
 8023df8:	8bfb      	ldrh	r3, [r7, #30]
 8023dfa:	3301      	adds	r3, #1
 8023dfc:	83fb      	strh	r3, [r7, #30]
 8023dfe:	8bfb      	ldrh	r3, [r7, #30]
 8023e00:	2b05      	cmp	r3, #5
 8023e02:	d9ef      	bls.n	8023de4 <dhcp_create_msg+0x10c>
  }
  msg_out->cookie = PP_HTONL(DHCP_MAGIC_COOKIE);
 8023e04:	697b      	ldr	r3, [r7, #20]
 8023e06:	2200      	movs	r2, #0
 8023e08:	f042 0263 	orr.w	r2, r2, #99	@ 0x63
 8023e0c:	f883 20ec 	strb.w	r2, [r3, #236]	@ 0xec
 8023e10:	2200      	movs	r2, #0
 8023e12:	f062 027d 	orn	r2, r2, #125	@ 0x7d
 8023e16:	f883 20ed 	strb.w	r2, [r3, #237]	@ 0xed
 8023e1a:	2200      	movs	r2, #0
 8023e1c:	f042 0253 	orr.w	r2, r2, #83	@ 0x53
 8023e20:	f883 20ee 	strb.w	r2, [r3, #238]	@ 0xee
 8023e24:	2200      	movs	r2, #0
 8023e26:	f042 0263 	orr.w	r2, r2, #99	@ 0x63
 8023e2a:	f883 20ef 	strb.w	r2, [r3, #239]	@ 0xef
  /* Add option MESSAGE_TYPE */
  options_out_len_loc = dhcp_option(0, msg_out->options, DHCP_OPTION_MESSAGE_TYPE, DHCP_OPTION_MESSAGE_TYPE_LEN);
 8023e2e:	697b      	ldr	r3, [r7, #20]
 8023e30:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8023e34:	2301      	movs	r3, #1
 8023e36:	2235      	movs	r2, #53	@ 0x35
 8023e38:	2000      	movs	r0, #0
 8023e3a:	f7ff facf 	bl	80233dc <dhcp_option>
 8023e3e:	4603      	mov	r3, r0
 8023e40:	827b      	strh	r3, [r7, #18]
  options_out_len_loc = dhcp_option_byte(options_out_len_loc, msg_out->options, message_type);
 8023e42:	697b      	ldr	r3, [r7, #20]
 8023e44:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8023e48:	79fa      	ldrb	r2, [r7, #7]
 8023e4a:	8a7b      	ldrh	r3, [r7, #18]
 8023e4c:	4618      	mov	r0, r3
 8023e4e:	f7ff faf9 	bl	8023444 <dhcp_option_byte>
 8023e52:	4603      	mov	r3, r0
 8023e54:	827b      	strh	r3, [r7, #18]
  if (options_out_len) {
 8023e56:	683b      	ldr	r3, [r7, #0]
 8023e58:	2b00      	cmp	r3, #0
 8023e5a:	d002      	beq.n	8023e62 <dhcp_create_msg+0x18a>
    *options_out_len = options_out_len_loc;
 8023e5c:	683b      	ldr	r3, [r7, #0]
 8023e5e:	8a7a      	ldrh	r2, [r7, #18]
 8023e60:	801a      	strh	r2, [r3, #0]
  }
  return p_out;
 8023e62:	69bb      	ldr	r3, [r7, #24]
}
 8023e64:	4618      	mov	r0, r3
 8023e66:	3720      	adds	r7, #32
 8023e68:	46bd      	mov	sp, r7
 8023e6a:	bd80      	pop	{r7, pc}
 8023e6c:	080306e8 	.word	0x080306e8
 8023e70:	08030a08 	.word	0x08030a08
 8023e74:	08030748 	.word	0x08030748
 8023e78:	08030a28 	.word	0x08030a28
 8023e7c:	08030a48 	.word	0x08030a48
 8023e80:	2402afec 	.word	0x2402afec

08023e84 <dhcp_option_trailer>:
 * Adds the END option to the DHCP message, and if
 * necessary, up to three padding bytes.
 */
static void
dhcp_option_trailer(u16_t options_out_len, u8_t *options, struct pbuf *p_out)
{
 8023e84:	b580      	push	{r7, lr}
 8023e86:	b084      	sub	sp, #16
 8023e88:	af00      	add	r7, sp, #0
 8023e8a:	4603      	mov	r3, r0
 8023e8c:	60b9      	str	r1, [r7, #8]
 8023e8e:	607a      	str	r2, [r7, #4]
 8023e90:	81fb      	strh	r3, [r7, #14]
  options[options_out_len++] = DHCP_OPTION_END;
 8023e92:	89fb      	ldrh	r3, [r7, #14]
 8023e94:	1c5a      	adds	r2, r3, #1
 8023e96:	81fa      	strh	r2, [r7, #14]
 8023e98:	461a      	mov	r2, r3
 8023e9a:	68bb      	ldr	r3, [r7, #8]
 8023e9c:	4413      	add	r3, r2
 8023e9e:	22ff      	movs	r2, #255	@ 0xff
 8023ea0:	701a      	strb	r2, [r3, #0]
  /* packet is too small, or not 4 byte aligned? */
  while (((options_out_len < DHCP_MIN_OPTIONS_LEN) || (options_out_len & 3)) &&
 8023ea2:	e007      	b.n	8023eb4 <dhcp_option_trailer+0x30>
         (options_out_len < DHCP_OPTIONS_LEN)) {
    /* add a fill/padding byte */
    options[options_out_len++] = 0;
 8023ea4:	89fb      	ldrh	r3, [r7, #14]
 8023ea6:	1c5a      	adds	r2, r3, #1
 8023ea8:	81fa      	strh	r2, [r7, #14]
 8023eaa:	461a      	mov	r2, r3
 8023eac:	68bb      	ldr	r3, [r7, #8]
 8023eae:	4413      	add	r3, r2
 8023eb0:	2200      	movs	r2, #0
 8023eb2:	701a      	strb	r2, [r3, #0]
  while (((options_out_len < DHCP_MIN_OPTIONS_LEN) || (options_out_len & 3)) &&
 8023eb4:	89fb      	ldrh	r3, [r7, #14]
 8023eb6:	2b43      	cmp	r3, #67	@ 0x43
 8023eb8:	d904      	bls.n	8023ec4 <dhcp_option_trailer+0x40>
 8023eba:	89fb      	ldrh	r3, [r7, #14]
 8023ebc:	f003 0303 	and.w	r3, r3, #3
 8023ec0:	2b00      	cmp	r3, #0
 8023ec2:	d002      	beq.n	8023eca <dhcp_option_trailer+0x46>
 8023ec4:	89fb      	ldrh	r3, [r7, #14]
 8023ec6:	2b43      	cmp	r3, #67	@ 0x43
 8023ec8:	d9ec      	bls.n	8023ea4 <dhcp_option_trailer+0x20>
  }
  /* shrink the pbuf to the actual content length */
  pbuf_realloc(p_out, (u16_t)(sizeof(struct dhcp_msg) - DHCP_OPTIONS_LEN + options_out_len));
 8023eca:	89fb      	ldrh	r3, [r7, #14]
 8023ecc:	33f0      	adds	r3, #240	@ 0xf0
 8023ece:	b29b      	uxth	r3, r3
 8023ed0:	4619      	mov	r1, r3
 8023ed2:	6878      	ldr	r0, [r7, #4]
 8023ed4:	f7f6 fd44 	bl	801a960 <pbuf_realloc>
}
 8023ed8:	bf00      	nop
 8023eda:	3710      	adds	r7, #16
 8023edc:	46bd      	mov	sp, r7
 8023ede:	bd80      	pop	{r7, pc}

08023ee0 <dhcp_supplied_address>:
 * @return 1 if DHCP supplied netif->ip_addr (states BOUND or RENEWING),
 *         0 otherwise
 */
u8_t
dhcp_supplied_address(const struct netif *netif)
{
 8023ee0:	b480      	push	{r7}
 8023ee2:	b085      	sub	sp, #20
 8023ee4:	af00      	add	r7, sp, #0
 8023ee6:	6078      	str	r0, [r7, #4]
  if ((netif != NULL) && (netif_dhcp_data(netif) != NULL)) {
 8023ee8:	687b      	ldr	r3, [r7, #4]
 8023eea:	2b00      	cmp	r3, #0
 8023eec:	d017      	beq.n	8023f1e <dhcp_supplied_address+0x3e>
 8023eee:	687b      	ldr	r3, [r7, #4]
 8023ef0:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8023ef2:	2b00      	cmp	r3, #0
 8023ef4:	d013      	beq.n	8023f1e <dhcp_supplied_address+0x3e>
    struct dhcp *dhcp = netif_dhcp_data(netif);
 8023ef6:	687b      	ldr	r3, [r7, #4]
 8023ef8:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8023efa:	60fb      	str	r3, [r7, #12]
    return (dhcp->state == DHCP_STATE_BOUND) || (dhcp->state == DHCP_STATE_RENEWING) ||
 8023efc:	68fb      	ldr	r3, [r7, #12]
 8023efe:	795b      	ldrb	r3, [r3, #5]
 8023f00:	2b0a      	cmp	r3, #10
 8023f02:	d007      	beq.n	8023f14 <dhcp_supplied_address+0x34>
 8023f04:	68fb      	ldr	r3, [r7, #12]
 8023f06:	795b      	ldrb	r3, [r3, #5]
 8023f08:	2b05      	cmp	r3, #5
 8023f0a:	d003      	beq.n	8023f14 <dhcp_supplied_address+0x34>
           (dhcp->state == DHCP_STATE_REBINDING);
 8023f0c:	68fb      	ldr	r3, [r7, #12]
 8023f0e:	795b      	ldrb	r3, [r3, #5]
    return (dhcp->state == DHCP_STATE_BOUND) || (dhcp->state == DHCP_STATE_RENEWING) ||
 8023f10:	2b04      	cmp	r3, #4
 8023f12:	d101      	bne.n	8023f18 <dhcp_supplied_address+0x38>
 8023f14:	2301      	movs	r3, #1
 8023f16:	e000      	b.n	8023f1a <dhcp_supplied_address+0x3a>
 8023f18:	2300      	movs	r3, #0
 8023f1a:	b2db      	uxtb	r3, r3
 8023f1c:	e000      	b.n	8023f20 <dhcp_supplied_address+0x40>
  }
  return 0;
 8023f1e:	2300      	movs	r3, #0
}
 8023f20:	4618      	mov	r0, r3
 8023f22:	3714      	adds	r7, #20
 8023f24:	46bd      	mov	sp, r7
 8023f26:	f85d 7b04 	ldr.w	r7, [sp], #4
 8023f2a:	4770      	bx	lr

08023f2c <etharp_free_entry>:
#endif /* ARP_QUEUEING */

/** Clean up ARP table entries */
static void
etharp_free_entry(int i)
{
 8023f2c:	b580      	push	{r7, lr}
 8023f2e:	b082      	sub	sp, #8
 8023f30:	af00      	add	r7, sp, #0
 8023f32:	6078      	str	r0, [r7, #4]
  /* remove from SNMP ARP index tree */
  mib2_remove_arp_entry(arp_table[i].netif, &arp_table[i].ipaddr);
  /* and empty packet queue */
  if (arp_table[i].q != NULL) {
 8023f34:	492b      	ldr	r1, [pc, #172]	@ (8023fe4 <etharp_free_entry+0xb8>)
 8023f36:	687a      	ldr	r2, [r7, #4]
 8023f38:	4613      	mov	r3, r2
 8023f3a:	005b      	lsls	r3, r3, #1
 8023f3c:	4413      	add	r3, r2
 8023f3e:	00db      	lsls	r3, r3, #3
 8023f40:	440b      	add	r3, r1
 8023f42:	681b      	ldr	r3, [r3, #0]
 8023f44:	2b00      	cmp	r3, #0
 8023f46:	d013      	beq.n	8023f70 <etharp_free_entry+0x44>
    /* remove all queued packets */
    LWIP_DEBUGF(ETHARP_DEBUG, ("etharp_free_entry: freeing entry %"U16_F", packet queue %p.\n", (u16_t)i, (void *)(arp_table[i].q)));
    free_etharp_q(arp_table[i].q);
 8023f48:	4926      	ldr	r1, [pc, #152]	@ (8023fe4 <etharp_free_entry+0xb8>)
 8023f4a:	687a      	ldr	r2, [r7, #4]
 8023f4c:	4613      	mov	r3, r2
 8023f4e:	005b      	lsls	r3, r3, #1
 8023f50:	4413      	add	r3, r2
 8023f52:	00db      	lsls	r3, r3, #3
 8023f54:	440b      	add	r3, r1
 8023f56:	681b      	ldr	r3, [r3, #0]
 8023f58:	4618      	mov	r0, r3
 8023f5a:	f7f6 feb7 	bl	801accc <pbuf_free>
    arp_table[i].q = NULL;
 8023f5e:	4921      	ldr	r1, [pc, #132]	@ (8023fe4 <etharp_free_entry+0xb8>)
 8023f60:	687a      	ldr	r2, [r7, #4]
 8023f62:	4613      	mov	r3, r2
 8023f64:	005b      	lsls	r3, r3, #1
 8023f66:	4413      	add	r3, r2
 8023f68:	00db      	lsls	r3, r3, #3
 8023f6a:	440b      	add	r3, r1
 8023f6c:	2200      	movs	r2, #0
 8023f6e:	601a      	str	r2, [r3, #0]
  }
  /* recycle entry for re-use */
  arp_table[i].state = ETHARP_STATE_EMPTY;
 8023f70:	491c      	ldr	r1, [pc, #112]	@ (8023fe4 <etharp_free_entry+0xb8>)
 8023f72:	687a      	ldr	r2, [r7, #4]
 8023f74:	4613      	mov	r3, r2
 8023f76:	005b      	lsls	r3, r3, #1
 8023f78:	4413      	add	r3, r2
 8023f7a:	00db      	lsls	r3, r3, #3
 8023f7c:	440b      	add	r3, r1
 8023f7e:	3314      	adds	r3, #20
 8023f80:	2200      	movs	r2, #0
 8023f82:	701a      	strb	r2, [r3, #0]
#ifdef LWIP_DEBUG
  /* for debugging, clean out the complete entry */
  arp_table[i].ctime = 0;
 8023f84:	4917      	ldr	r1, [pc, #92]	@ (8023fe4 <etharp_free_entry+0xb8>)
 8023f86:	687a      	ldr	r2, [r7, #4]
 8023f88:	4613      	mov	r3, r2
 8023f8a:	005b      	lsls	r3, r3, #1
 8023f8c:	4413      	add	r3, r2
 8023f8e:	00db      	lsls	r3, r3, #3
 8023f90:	440b      	add	r3, r1
 8023f92:	3312      	adds	r3, #18
 8023f94:	2200      	movs	r2, #0
 8023f96:	801a      	strh	r2, [r3, #0]
  arp_table[i].netif = NULL;
 8023f98:	4912      	ldr	r1, [pc, #72]	@ (8023fe4 <etharp_free_entry+0xb8>)
 8023f9a:	687a      	ldr	r2, [r7, #4]
 8023f9c:	4613      	mov	r3, r2
 8023f9e:	005b      	lsls	r3, r3, #1
 8023fa0:	4413      	add	r3, r2
 8023fa2:	00db      	lsls	r3, r3, #3
 8023fa4:	440b      	add	r3, r1
 8023fa6:	3308      	adds	r3, #8
 8023fa8:	2200      	movs	r2, #0
 8023faa:	601a      	str	r2, [r3, #0]
  ip4_addr_set_zero(&arp_table[i].ipaddr);
 8023fac:	490d      	ldr	r1, [pc, #52]	@ (8023fe4 <etharp_free_entry+0xb8>)
 8023fae:	687a      	ldr	r2, [r7, #4]
 8023fb0:	4613      	mov	r3, r2
 8023fb2:	005b      	lsls	r3, r3, #1
 8023fb4:	4413      	add	r3, r2
 8023fb6:	00db      	lsls	r3, r3, #3
 8023fb8:	440b      	add	r3, r1
 8023fba:	3304      	adds	r3, #4
 8023fbc:	2200      	movs	r2, #0
 8023fbe:	601a      	str	r2, [r3, #0]
  arp_table[i].ethaddr = ethzero;
 8023fc0:	4908      	ldr	r1, [pc, #32]	@ (8023fe4 <etharp_free_entry+0xb8>)
 8023fc2:	687a      	ldr	r2, [r7, #4]
 8023fc4:	4613      	mov	r3, r2
 8023fc6:	005b      	lsls	r3, r3, #1
 8023fc8:	4413      	add	r3, r2
 8023fca:	00db      	lsls	r3, r3, #3
 8023fcc:	440b      	add	r3, r1
 8023fce:	3308      	adds	r3, #8
 8023fd0:	4a05      	ldr	r2, [pc, #20]	@ (8023fe8 <etharp_free_entry+0xbc>)
 8023fd2:	3304      	adds	r3, #4
 8023fd4:	6810      	ldr	r0, [r2, #0]
 8023fd6:	6018      	str	r0, [r3, #0]
 8023fd8:	8892      	ldrh	r2, [r2, #4]
 8023fda:	809a      	strh	r2, [r3, #4]
#endif /* LWIP_DEBUG */
}
 8023fdc:	bf00      	nop
 8023fde:	3708      	adds	r7, #8
 8023fe0:	46bd      	mov	sp, r7
 8023fe2:	bd80      	pop	{r7, pc}
 8023fe4:	2402aff0 	.word	0x2402aff0
 8023fe8:	08031504 	.word	0x08031504

08023fec <etharp_tmr>:
 * This function should be called every ARP_TMR_INTERVAL milliseconds (1 second),
 * in order to expire entries in the ARP table.
 */
void
etharp_tmr(void)
{
 8023fec:	b580      	push	{r7, lr}
 8023fee:	b082      	sub	sp, #8
 8023ff0:	af00      	add	r7, sp, #0
  int i;

  LWIP_DEBUGF(ETHARP_DEBUG, ("etharp_timer\n"));
  /* remove expired entries from the ARP table */
  for (i = 0; i < ARP_TABLE_SIZE; ++i) {
 8023ff2:	2300      	movs	r3, #0
 8023ff4:	607b      	str	r3, [r7, #4]
 8023ff6:	e096      	b.n	8024126 <etharp_tmr+0x13a>
    u8_t state = arp_table[i].state;
 8023ff8:	494f      	ldr	r1, [pc, #316]	@ (8024138 <etharp_tmr+0x14c>)
 8023ffa:	687a      	ldr	r2, [r7, #4]
 8023ffc:	4613      	mov	r3, r2
 8023ffe:	005b      	lsls	r3, r3, #1
 8024000:	4413      	add	r3, r2
 8024002:	00db      	lsls	r3, r3, #3
 8024004:	440b      	add	r3, r1
 8024006:	3314      	adds	r3, #20
 8024008:	781b      	ldrb	r3, [r3, #0]
 802400a:	70fb      	strb	r3, [r7, #3]
    if (state != ETHARP_STATE_EMPTY
 802400c:	78fb      	ldrb	r3, [r7, #3]
 802400e:	2b00      	cmp	r3, #0
 8024010:	f000 8086 	beq.w	8024120 <etharp_tmr+0x134>
#if ETHARP_SUPPORT_STATIC_ENTRIES
        && (state != ETHARP_STATE_STATIC)
#endif /* ETHARP_SUPPORT_STATIC_ENTRIES */
       ) {
      arp_table[i].ctime++;
 8024014:	4948      	ldr	r1, [pc, #288]	@ (8024138 <etharp_tmr+0x14c>)
 8024016:	687a      	ldr	r2, [r7, #4]
 8024018:	4613      	mov	r3, r2
 802401a:	005b      	lsls	r3, r3, #1
 802401c:	4413      	add	r3, r2
 802401e:	00db      	lsls	r3, r3, #3
 8024020:	440b      	add	r3, r1
 8024022:	3312      	adds	r3, #18
 8024024:	881b      	ldrh	r3, [r3, #0]
 8024026:	3301      	adds	r3, #1
 8024028:	b298      	uxth	r0, r3
 802402a:	4943      	ldr	r1, [pc, #268]	@ (8024138 <etharp_tmr+0x14c>)
 802402c:	687a      	ldr	r2, [r7, #4]
 802402e:	4613      	mov	r3, r2
 8024030:	005b      	lsls	r3, r3, #1
 8024032:	4413      	add	r3, r2
 8024034:	00db      	lsls	r3, r3, #3
 8024036:	440b      	add	r3, r1
 8024038:	3312      	adds	r3, #18
 802403a:	4602      	mov	r2, r0
 802403c:	801a      	strh	r2, [r3, #0]
      if ((arp_table[i].ctime >= ARP_MAXAGE) ||
 802403e:	493e      	ldr	r1, [pc, #248]	@ (8024138 <etharp_tmr+0x14c>)
 8024040:	687a      	ldr	r2, [r7, #4]
 8024042:	4613      	mov	r3, r2
 8024044:	005b      	lsls	r3, r3, #1
 8024046:	4413      	add	r3, r2
 8024048:	00db      	lsls	r3, r3, #3
 802404a:	440b      	add	r3, r1
 802404c:	3312      	adds	r3, #18
 802404e:	881b      	ldrh	r3, [r3, #0]
 8024050:	f5b3 7f96 	cmp.w	r3, #300	@ 0x12c
 8024054:	d215      	bcs.n	8024082 <etharp_tmr+0x96>
          ((arp_table[i].state == ETHARP_STATE_PENDING)  &&
 8024056:	4938      	ldr	r1, [pc, #224]	@ (8024138 <etharp_tmr+0x14c>)
 8024058:	687a      	ldr	r2, [r7, #4]
 802405a:	4613      	mov	r3, r2
 802405c:	005b      	lsls	r3, r3, #1
 802405e:	4413      	add	r3, r2
 8024060:	00db      	lsls	r3, r3, #3
 8024062:	440b      	add	r3, r1
 8024064:	3314      	adds	r3, #20
 8024066:	781b      	ldrb	r3, [r3, #0]
      if ((arp_table[i].ctime >= ARP_MAXAGE) ||
 8024068:	2b01      	cmp	r3, #1
 802406a:	d10e      	bne.n	802408a <etharp_tmr+0x9e>
           (arp_table[i].ctime >= ARP_MAXPENDING))) {
 802406c:	4932      	ldr	r1, [pc, #200]	@ (8024138 <etharp_tmr+0x14c>)
 802406e:	687a      	ldr	r2, [r7, #4]
 8024070:	4613      	mov	r3, r2
 8024072:	005b      	lsls	r3, r3, #1
 8024074:	4413      	add	r3, r2
 8024076:	00db      	lsls	r3, r3, #3
 8024078:	440b      	add	r3, r1
 802407a:	3312      	adds	r3, #18
 802407c:	881b      	ldrh	r3, [r3, #0]
          ((arp_table[i].state == ETHARP_STATE_PENDING)  &&
 802407e:	2b04      	cmp	r3, #4
 8024080:	d903      	bls.n	802408a <etharp_tmr+0x9e>
        /* pending or stable entry has become old! */
        LWIP_DEBUGF(ETHARP_DEBUG, ("etharp_timer: expired %s entry %d.\n",
                                   arp_table[i].state >= ETHARP_STATE_STABLE ? "stable" : "pending", i));
        /* clean up entries that have just been expired */
        etharp_free_entry(i);
 8024082:	6878      	ldr	r0, [r7, #4]
 8024084:	f7ff ff52 	bl	8023f2c <etharp_free_entry>
 8024088:	e04a      	b.n	8024120 <etharp_tmr+0x134>
      } else if (arp_table[i].state == ETHARP_STATE_STABLE_REREQUESTING_1) {
 802408a:	492b      	ldr	r1, [pc, #172]	@ (8024138 <etharp_tmr+0x14c>)
 802408c:	687a      	ldr	r2, [r7, #4]
 802408e:	4613      	mov	r3, r2
 8024090:	005b      	lsls	r3, r3, #1
 8024092:	4413      	add	r3, r2
 8024094:	00db      	lsls	r3, r3, #3
 8024096:	440b      	add	r3, r1
 8024098:	3314      	adds	r3, #20
 802409a:	781b      	ldrb	r3, [r3, #0]
 802409c:	2b03      	cmp	r3, #3
 802409e:	d10a      	bne.n	80240b6 <etharp_tmr+0xca>
        /* Don't send more than one request every 2 seconds. */
        arp_table[i].state = ETHARP_STATE_STABLE_REREQUESTING_2;
 80240a0:	4925      	ldr	r1, [pc, #148]	@ (8024138 <etharp_tmr+0x14c>)
 80240a2:	687a      	ldr	r2, [r7, #4]
 80240a4:	4613      	mov	r3, r2
 80240a6:	005b      	lsls	r3, r3, #1
 80240a8:	4413      	add	r3, r2
 80240aa:	00db      	lsls	r3, r3, #3
 80240ac:	440b      	add	r3, r1
 80240ae:	3314      	adds	r3, #20
 80240b0:	2204      	movs	r2, #4
 80240b2:	701a      	strb	r2, [r3, #0]
 80240b4:	e034      	b.n	8024120 <etharp_tmr+0x134>
      } else if (arp_table[i].state == ETHARP_STATE_STABLE_REREQUESTING_2) {
 80240b6:	4920      	ldr	r1, [pc, #128]	@ (8024138 <etharp_tmr+0x14c>)
 80240b8:	687a      	ldr	r2, [r7, #4]
 80240ba:	4613      	mov	r3, r2
 80240bc:	005b      	lsls	r3, r3, #1
 80240be:	4413      	add	r3, r2
 80240c0:	00db      	lsls	r3, r3, #3
 80240c2:	440b      	add	r3, r1
 80240c4:	3314      	adds	r3, #20
 80240c6:	781b      	ldrb	r3, [r3, #0]
 80240c8:	2b04      	cmp	r3, #4
 80240ca:	d10a      	bne.n	80240e2 <etharp_tmr+0xf6>
        /* Reset state to stable, so that the next transmitted packet will
           re-send an ARP request. */
        arp_table[i].state = ETHARP_STATE_STABLE;
 80240cc:	491a      	ldr	r1, [pc, #104]	@ (8024138 <etharp_tmr+0x14c>)
 80240ce:	687a      	ldr	r2, [r7, #4]
 80240d0:	4613      	mov	r3, r2
 80240d2:	005b      	lsls	r3, r3, #1
 80240d4:	4413      	add	r3, r2
 80240d6:	00db      	lsls	r3, r3, #3
 80240d8:	440b      	add	r3, r1
 80240da:	3314      	adds	r3, #20
 80240dc:	2202      	movs	r2, #2
 80240de:	701a      	strb	r2, [r3, #0]
 80240e0:	e01e      	b.n	8024120 <etharp_tmr+0x134>
      } else if (arp_table[i].state == ETHARP_STATE_PENDING) {
 80240e2:	4915      	ldr	r1, [pc, #84]	@ (8024138 <etharp_tmr+0x14c>)
 80240e4:	687a      	ldr	r2, [r7, #4]
 80240e6:	4613      	mov	r3, r2
 80240e8:	005b      	lsls	r3, r3, #1
 80240ea:	4413      	add	r3, r2
 80240ec:	00db      	lsls	r3, r3, #3
 80240ee:	440b      	add	r3, r1
 80240f0:	3314      	adds	r3, #20
 80240f2:	781b      	ldrb	r3, [r3, #0]
 80240f4:	2b01      	cmp	r3, #1
 80240f6:	d113      	bne.n	8024120 <etharp_tmr+0x134>
        /* still pending, resend an ARP query */
        etharp_request(arp_table[i].netif, &arp_table[i].ipaddr);
 80240f8:	490f      	ldr	r1, [pc, #60]	@ (8024138 <etharp_tmr+0x14c>)
 80240fa:	687a      	ldr	r2, [r7, #4]
 80240fc:	4613      	mov	r3, r2
 80240fe:	005b      	lsls	r3, r3, #1
 8024100:	4413      	add	r3, r2
 8024102:	00db      	lsls	r3, r3, #3
 8024104:	440b      	add	r3, r1
 8024106:	3308      	adds	r3, #8
 8024108:	6818      	ldr	r0, [r3, #0]
 802410a:	687a      	ldr	r2, [r7, #4]
 802410c:	4613      	mov	r3, r2
 802410e:	005b      	lsls	r3, r3, #1
 8024110:	4413      	add	r3, r2
 8024112:	00db      	lsls	r3, r3, #3
 8024114:	4a08      	ldr	r2, [pc, #32]	@ (8024138 <etharp_tmr+0x14c>)
 8024116:	4413      	add	r3, r2
 8024118:	3304      	adds	r3, #4
 802411a:	4619      	mov	r1, r3
 802411c:	f000 fe76 	bl	8024e0c <etharp_request>
  for (i = 0; i < ARP_TABLE_SIZE; ++i) {
 8024120:	687b      	ldr	r3, [r7, #4]
 8024122:	3301      	adds	r3, #1
 8024124:	607b      	str	r3, [r7, #4]
 8024126:	687b      	ldr	r3, [r7, #4]
 8024128:	2b09      	cmp	r3, #9
 802412a:	f77f af65 	ble.w	8023ff8 <etharp_tmr+0xc>
      }
    }
  }
}
 802412e:	bf00      	nop
 8024130:	bf00      	nop
 8024132:	3708      	adds	r7, #8
 8024134:	46bd      	mov	sp, r7
 8024136:	bd80      	pop	{r7, pc}
 8024138:	2402aff0 	.word	0x2402aff0

0802413c <etharp_find_entry>:
 * @return The ARP entry index that matched or is created, ERR_MEM if no
 * entry is found or could be recycled.
 */
static s16_t
etharp_find_entry(const ip4_addr_t *ipaddr, u8_t flags, struct netif *netif)
{
 802413c:	b580      	push	{r7, lr}
 802413e:	b08a      	sub	sp, #40	@ 0x28
 8024140:	af00      	add	r7, sp, #0
 8024142:	60f8      	str	r0, [r7, #12]
 8024144:	460b      	mov	r3, r1
 8024146:	607a      	str	r2, [r7, #4]
 8024148:	72fb      	strb	r3, [r7, #11]
  s16_t old_pending = ARP_TABLE_SIZE, old_stable = ARP_TABLE_SIZE;
 802414a:	230a      	movs	r3, #10
 802414c:	843b      	strh	r3, [r7, #32]
 802414e:	230a      	movs	r3, #10
 8024150:	847b      	strh	r3, [r7, #34]	@ 0x22
  s16_t empty = ARP_TABLE_SIZE;
 8024152:	230a      	movs	r3, #10
 8024154:	84bb      	strh	r3, [r7, #36]	@ 0x24
  s16_t i = 0;
 8024156:	2300      	movs	r3, #0
 8024158:	84fb      	strh	r3, [r7, #38]	@ 0x26
  /* oldest entry with packets on queue */
  s16_t old_queue = ARP_TABLE_SIZE;
 802415a:	230a      	movs	r3, #10
 802415c:	83fb      	strh	r3, [r7, #30]
  /* its age */
  u16_t age_queue = 0, age_pending = 0, age_stable = 0;
 802415e:	2300      	movs	r3, #0
 8024160:	83bb      	strh	r3, [r7, #28]
 8024162:	2300      	movs	r3, #0
 8024164:	837b      	strh	r3, [r7, #26]
 8024166:	2300      	movs	r3, #0
 8024168:	833b      	strh	r3, [r7, #24]
   * 4) remember the oldest pending entry with queued packets (if any)
   * 5) search for a matching IP entry, either pending or stable
   *    until 5 matches, or all entries are searched for.
   */

  for (i = 0; i < ARP_TABLE_SIZE; ++i) {
 802416a:	2300      	movs	r3, #0
 802416c:	84fb      	strh	r3, [r7, #38]	@ 0x26
 802416e:	e0ae      	b.n	80242ce <etharp_find_entry+0x192>
    u8_t state = arp_table[i].state;
 8024170:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 8024174:	49a6      	ldr	r1, [pc, #664]	@ (8024410 <etharp_find_entry+0x2d4>)
 8024176:	4613      	mov	r3, r2
 8024178:	005b      	lsls	r3, r3, #1
 802417a:	4413      	add	r3, r2
 802417c:	00db      	lsls	r3, r3, #3
 802417e:	440b      	add	r3, r1
 8024180:	3314      	adds	r3, #20
 8024182:	781b      	ldrb	r3, [r3, #0]
 8024184:	75fb      	strb	r3, [r7, #23]
    /* no empty entry found yet and now we do find one? */
    if ((empty == ARP_TABLE_SIZE) && (state == ETHARP_STATE_EMPTY)) {
 8024186:	f9b7 3024 	ldrsh.w	r3, [r7, #36]	@ 0x24
 802418a:	2b0a      	cmp	r3, #10
 802418c:	d105      	bne.n	802419a <etharp_find_entry+0x5e>
 802418e:	7dfb      	ldrb	r3, [r7, #23]
 8024190:	2b00      	cmp	r3, #0
 8024192:	d102      	bne.n	802419a <etharp_find_entry+0x5e>
      LWIP_DEBUGF(ETHARP_DEBUG, ("etharp_find_entry: found empty entry %d\n", (int)i));
      /* remember first empty entry */
      empty = i;
 8024194:	8cfb      	ldrh	r3, [r7, #38]	@ 0x26
 8024196:	84bb      	strh	r3, [r7, #36]	@ 0x24
 8024198:	e095      	b.n	80242c6 <etharp_find_entry+0x18a>
    } else if (state != ETHARP_STATE_EMPTY) {
 802419a:	7dfb      	ldrb	r3, [r7, #23]
 802419c:	2b00      	cmp	r3, #0
 802419e:	f000 8092 	beq.w	80242c6 <etharp_find_entry+0x18a>
      LWIP_ASSERT("state == ETHARP_STATE_PENDING || state >= ETHARP_STATE_STABLE",
 80241a2:	7dfb      	ldrb	r3, [r7, #23]
 80241a4:	2b01      	cmp	r3, #1
 80241a6:	d009      	beq.n	80241bc <etharp_find_entry+0x80>
 80241a8:	7dfb      	ldrb	r3, [r7, #23]
 80241aa:	2b01      	cmp	r3, #1
 80241ac:	d806      	bhi.n	80241bc <etharp_find_entry+0x80>
 80241ae:	4b99      	ldr	r3, [pc, #612]	@ (8024414 <etharp_find_entry+0x2d8>)
 80241b0:	f240 1223 	movw	r2, #291	@ 0x123
 80241b4:	4998      	ldr	r1, [pc, #608]	@ (8024418 <etharp_find_entry+0x2dc>)
 80241b6:	4899      	ldr	r0, [pc, #612]	@ (802441c <etharp_find_entry+0x2e0>)
 80241b8:	f006 f800 	bl	802a1bc <iprintf>
                  state == ETHARP_STATE_PENDING || state >= ETHARP_STATE_STABLE);
      /* if given, does IP address match IP address in ARP entry? */
      if (ipaddr && ip4_addr_cmp(ipaddr, &arp_table[i].ipaddr)
 80241bc:	68fb      	ldr	r3, [r7, #12]
 80241be:	2b00      	cmp	r3, #0
 80241c0:	d020      	beq.n	8024204 <etharp_find_entry+0xc8>
 80241c2:	68fb      	ldr	r3, [r7, #12]
 80241c4:	6819      	ldr	r1, [r3, #0]
 80241c6:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 80241ca:	4891      	ldr	r0, [pc, #580]	@ (8024410 <etharp_find_entry+0x2d4>)
 80241cc:	4613      	mov	r3, r2
 80241ce:	005b      	lsls	r3, r3, #1
 80241d0:	4413      	add	r3, r2
 80241d2:	00db      	lsls	r3, r3, #3
 80241d4:	4403      	add	r3, r0
 80241d6:	3304      	adds	r3, #4
 80241d8:	681b      	ldr	r3, [r3, #0]
 80241da:	4299      	cmp	r1, r3
 80241dc:	d112      	bne.n	8024204 <etharp_find_entry+0xc8>
#if ETHARP_TABLE_MATCH_NETIF
          && ((netif == NULL) || (netif == arp_table[i].netif))
 80241de:	687b      	ldr	r3, [r7, #4]
 80241e0:	2b00      	cmp	r3, #0
 80241e2:	d00c      	beq.n	80241fe <etharp_find_entry+0xc2>
 80241e4:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 80241e8:	4989      	ldr	r1, [pc, #548]	@ (8024410 <etharp_find_entry+0x2d4>)
 80241ea:	4613      	mov	r3, r2
 80241ec:	005b      	lsls	r3, r3, #1
 80241ee:	4413      	add	r3, r2
 80241f0:	00db      	lsls	r3, r3, #3
 80241f2:	440b      	add	r3, r1
 80241f4:	3308      	adds	r3, #8
 80241f6:	681b      	ldr	r3, [r3, #0]
 80241f8:	687a      	ldr	r2, [r7, #4]
 80241fa:	429a      	cmp	r2, r3
 80241fc:	d102      	bne.n	8024204 <etharp_find_entry+0xc8>
#endif /* ETHARP_TABLE_MATCH_NETIF */
         ) {
        LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_find_entry: found matching entry %d\n", (int)i));
        /* found exact IP address match, simply bail out */
        return i;
 80241fe:	f9b7 3026 	ldrsh.w	r3, [r7, #38]	@ 0x26
 8024202:	e100      	b.n	8024406 <etharp_find_entry+0x2ca>
      }
      /* pending entry? */
      if (state == ETHARP_STATE_PENDING) {
 8024204:	7dfb      	ldrb	r3, [r7, #23]
 8024206:	2b01      	cmp	r3, #1
 8024208:	d140      	bne.n	802428c <etharp_find_entry+0x150>
        /* pending with queued packets? */
        if (arp_table[i].q != NULL) {
 802420a:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 802420e:	4980      	ldr	r1, [pc, #512]	@ (8024410 <etharp_find_entry+0x2d4>)
 8024210:	4613      	mov	r3, r2
 8024212:	005b      	lsls	r3, r3, #1
 8024214:	4413      	add	r3, r2
 8024216:	00db      	lsls	r3, r3, #3
 8024218:	440b      	add	r3, r1
 802421a:	681b      	ldr	r3, [r3, #0]
 802421c:	2b00      	cmp	r3, #0
 802421e:	d01a      	beq.n	8024256 <etharp_find_entry+0x11a>
          if (arp_table[i].ctime >= age_queue) {
 8024220:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 8024224:	497a      	ldr	r1, [pc, #488]	@ (8024410 <etharp_find_entry+0x2d4>)
 8024226:	4613      	mov	r3, r2
 8024228:	005b      	lsls	r3, r3, #1
 802422a:	4413      	add	r3, r2
 802422c:	00db      	lsls	r3, r3, #3
 802422e:	440b      	add	r3, r1
 8024230:	3312      	adds	r3, #18
 8024232:	881b      	ldrh	r3, [r3, #0]
 8024234:	8bba      	ldrh	r2, [r7, #28]
 8024236:	429a      	cmp	r2, r3
 8024238:	d845      	bhi.n	80242c6 <etharp_find_entry+0x18a>
            old_queue = i;
 802423a:	8cfb      	ldrh	r3, [r7, #38]	@ 0x26
 802423c:	83fb      	strh	r3, [r7, #30]
            age_queue = arp_table[i].ctime;
 802423e:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 8024242:	4973      	ldr	r1, [pc, #460]	@ (8024410 <etharp_find_entry+0x2d4>)
 8024244:	4613      	mov	r3, r2
 8024246:	005b      	lsls	r3, r3, #1
 8024248:	4413      	add	r3, r2
 802424a:	00db      	lsls	r3, r3, #3
 802424c:	440b      	add	r3, r1
 802424e:	3312      	adds	r3, #18
 8024250:	881b      	ldrh	r3, [r3, #0]
 8024252:	83bb      	strh	r3, [r7, #28]
 8024254:	e037      	b.n	80242c6 <etharp_find_entry+0x18a>
          }
        } else
          /* pending without queued packets? */
        {
          if (arp_table[i].ctime >= age_pending) {
 8024256:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 802425a:	496d      	ldr	r1, [pc, #436]	@ (8024410 <etharp_find_entry+0x2d4>)
 802425c:	4613      	mov	r3, r2
 802425e:	005b      	lsls	r3, r3, #1
 8024260:	4413      	add	r3, r2
 8024262:	00db      	lsls	r3, r3, #3
 8024264:	440b      	add	r3, r1
 8024266:	3312      	adds	r3, #18
 8024268:	881b      	ldrh	r3, [r3, #0]
 802426a:	8b7a      	ldrh	r2, [r7, #26]
 802426c:	429a      	cmp	r2, r3
 802426e:	d82a      	bhi.n	80242c6 <etharp_find_entry+0x18a>
            old_pending = i;
 8024270:	8cfb      	ldrh	r3, [r7, #38]	@ 0x26
 8024272:	843b      	strh	r3, [r7, #32]
            age_pending = arp_table[i].ctime;
 8024274:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 8024278:	4965      	ldr	r1, [pc, #404]	@ (8024410 <etharp_find_entry+0x2d4>)
 802427a:	4613      	mov	r3, r2
 802427c:	005b      	lsls	r3, r3, #1
 802427e:	4413      	add	r3, r2
 8024280:	00db      	lsls	r3, r3, #3
 8024282:	440b      	add	r3, r1
 8024284:	3312      	adds	r3, #18
 8024286:	881b      	ldrh	r3, [r3, #0]
 8024288:	837b      	strh	r3, [r7, #26]
 802428a:	e01c      	b.n	80242c6 <etharp_find_entry+0x18a>
          }
        }
        /* stable entry? */
      } else if (state >= ETHARP_STATE_STABLE) {
 802428c:	7dfb      	ldrb	r3, [r7, #23]
 802428e:	2b01      	cmp	r3, #1
 8024290:	d919      	bls.n	80242c6 <etharp_find_entry+0x18a>
        /* don't record old_stable for static entries since they never expire */
        if (state < ETHARP_STATE_STATIC)
#endif /* ETHARP_SUPPORT_STATIC_ENTRIES */
        {
          /* remember entry with oldest stable entry in oldest, its age in maxtime */
          if (arp_table[i].ctime >= age_stable) {
 8024292:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 8024296:	495e      	ldr	r1, [pc, #376]	@ (8024410 <etharp_find_entry+0x2d4>)
 8024298:	4613      	mov	r3, r2
 802429a:	005b      	lsls	r3, r3, #1
 802429c:	4413      	add	r3, r2
 802429e:	00db      	lsls	r3, r3, #3
 80242a0:	440b      	add	r3, r1
 80242a2:	3312      	adds	r3, #18
 80242a4:	881b      	ldrh	r3, [r3, #0]
 80242a6:	8b3a      	ldrh	r2, [r7, #24]
 80242a8:	429a      	cmp	r2, r3
 80242aa:	d80c      	bhi.n	80242c6 <etharp_find_entry+0x18a>
            old_stable = i;
 80242ac:	8cfb      	ldrh	r3, [r7, #38]	@ 0x26
 80242ae:	847b      	strh	r3, [r7, #34]	@ 0x22
            age_stable = arp_table[i].ctime;
 80242b0:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 80242b4:	4956      	ldr	r1, [pc, #344]	@ (8024410 <etharp_find_entry+0x2d4>)
 80242b6:	4613      	mov	r3, r2
 80242b8:	005b      	lsls	r3, r3, #1
 80242ba:	4413      	add	r3, r2
 80242bc:	00db      	lsls	r3, r3, #3
 80242be:	440b      	add	r3, r1
 80242c0:	3312      	adds	r3, #18
 80242c2:	881b      	ldrh	r3, [r3, #0]
 80242c4:	833b      	strh	r3, [r7, #24]
  for (i = 0; i < ARP_TABLE_SIZE; ++i) {
 80242c6:	8cfb      	ldrh	r3, [r7, #38]	@ 0x26
 80242c8:	3301      	adds	r3, #1
 80242ca:	b29b      	uxth	r3, r3
 80242cc:	84fb      	strh	r3, [r7, #38]	@ 0x26
 80242ce:	f9b7 3026 	ldrsh.w	r3, [r7, #38]	@ 0x26
 80242d2:	2b09      	cmp	r3, #9
 80242d4:	f77f af4c 	ble.w	8024170 <etharp_find_entry+0x34>
    }
  }
  /* { we have no match } => try to create a new entry */

  /* don't create new entry, only search? */
  if (((flags & ETHARP_FLAG_FIND_ONLY) != 0) ||
 80242d8:	7afb      	ldrb	r3, [r7, #11]
 80242da:	f003 0302 	and.w	r3, r3, #2
 80242de:	2b00      	cmp	r3, #0
 80242e0:	d108      	bne.n	80242f4 <etharp_find_entry+0x1b8>
 80242e2:	f9b7 3024 	ldrsh.w	r3, [r7, #36]	@ 0x24
 80242e6:	2b0a      	cmp	r3, #10
 80242e8:	d107      	bne.n	80242fa <etharp_find_entry+0x1be>
      /* or no empty entry found and not allowed to recycle? */
      ((empty == ARP_TABLE_SIZE) && ((flags & ETHARP_FLAG_TRY_HARD) == 0))) {
 80242ea:	7afb      	ldrb	r3, [r7, #11]
 80242ec:	f003 0301 	and.w	r3, r3, #1
 80242f0:	2b00      	cmp	r3, #0
 80242f2:	d102      	bne.n	80242fa <etharp_find_entry+0x1be>
    LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_find_entry: no empty entry found and not allowed to recycle\n"));
    return (s16_t)ERR_MEM;
 80242f4:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80242f8:	e085      	b.n	8024406 <etharp_find_entry+0x2ca>
   *
   * { ETHARP_FLAG_TRY_HARD is set at this point }
   */

  /* 1) empty entry available? */
  if (empty < ARP_TABLE_SIZE) {
 80242fa:	f9b7 3024 	ldrsh.w	r3, [r7, #36]	@ 0x24
 80242fe:	2b09      	cmp	r3, #9
 8024300:	dc02      	bgt.n	8024308 <etharp_find_entry+0x1cc>
    i = empty;
 8024302:	8cbb      	ldrh	r3, [r7, #36]	@ 0x24
 8024304:	84fb      	strh	r3, [r7, #38]	@ 0x26
 8024306:	e039      	b.n	802437c <etharp_find_entry+0x240>
    LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_find_entry: selecting empty entry %d\n", (int)i));
  } else {
    /* 2) found recyclable stable entry? */
    if (old_stable < ARP_TABLE_SIZE) {
 8024308:	f9b7 3022 	ldrsh.w	r3, [r7, #34]	@ 0x22
 802430c:	2b09      	cmp	r3, #9
 802430e:	dc14      	bgt.n	802433a <etharp_find_entry+0x1fe>
      /* recycle oldest stable*/
      i = old_stable;
 8024310:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 8024312:	84fb      	strh	r3, [r7, #38]	@ 0x26
      LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_find_entry: selecting oldest stable entry %d\n", (int)i));
      /* no queued packets should exist on stable entries */
      LWIP_ASSERT("arp_table[i].q == NULL", arp_table[i].q == NULL);
 8024314:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 8024318:	493d      	ldr	r1, [pc, #244]	@ (8024410 <etharp_find_entry+0x2d4>)
 802431a:	4613      	mov	r3, r2
 802431c:	005b      	lsls	r3, r3, #1
 802431e:	4413      	add	r3, r2
 8024320:	00db      	lsls	r3, r3, #3
 8024322:	440b      	add	r3, r1
 8024324:	681b      	ldr	r3, [r3, #0]
 8024326:	2b00      	cmp	r3, #0
 8024328:	d018      	beq.n	802435c <etharp_find_entry+0x220>
 802432a:	4b3a      	ldr	r3, [pc, #232]	@ (8024414 <etharp_find_entry+0x2d8>)
 802432c:	f240 126d 	movw	r2, #365	@ 0x16d
 8024330:	493b      	ldr	r1, [pc, #236]	@ (8024420 <etharp_find_entry+0x2e4>)
 8024332:	483a      	ldr	r0, [pc, #232]	@ (802441c <etharp_find_entry+0x2e0>)
 8024334:	f005 ff42 	bl	802a1bc <iprintf>
 8024338:	e010      	b.n	802435c <etharp_find_entry+0x220>
      /* 3) found recyclable pending entry without queued packets? */
    } else if (old_pending < ARP_TABLE_SIZE) {
 802433a:	f9b7 3020 	ldrsh.w	r3, [r7, #32]
 802433e:	2b09      	cmp	r3, #9
 8024340:	dc02      	bgt.n	8024348 <etharp_find_entry+0x20c>
      /* recycle oldest pending */
      i = old_pending;
 8024342:	8c3b      	ldrh	r3, [r7, #32]
 8024344:	84fb      	strh	r3, [r7, #38]	@ 0x26
 8024346:	e009      	b.n	802435c <etharp_find_entry+0x220>
      LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_find_entry: selecting oldest pending entry %d (without queue)\n", (int)i));
      /* 4) found recyclable pending entry with queued packets? */
    } else if (old_queue < ARP_TABLE_SIZE) {
 8024348:	f9b7 301e 	ldrsh.w	r3, [r7, #30]
 802434c:	2b09      	cmp	r3, #9
 802434e:	dc02      	bgt.n	8024356 <etharp_find_entry+0x21a>
      /* recycle oldest pending (queued packets are free in etharp_free_entry) */
      i = old_queue;
 8024350:	8bfb      	ldrh	r3, [r7, #30]
 8024352:	84fb      	strh	r3, [r7, #38]	@ 0x26
 8024354:	e002      	b.n	802435c <etharp_find_entry+0x220>
      LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_find_entry: selecting oldest pending entry %d, freeing packet queue %p\n", (int)i, (void *)(arp_table[i].q)));
      /* no empty or recyclable entries found */
    } else {
      LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_find_entry: no empty or recyclable entries found\n"));
      return (s16_t)ERR_MEM;
 8024356:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 802435a:	e054      	b.n	8024406 <etharp_find_entry+0x2ca>
    }

    /* { empty or recyclable entry found } */
    LWIP_ASSERT("i < ARP_TABLE_SIZE", i < ARP_TABLE_SIZE);
 802435c:	f9b7 3026 	ldrsh.w	r3, [r7, #38]	@ 0x26
 8024360:	2b09      	cmp	r3, #9
 8024362:	dd06      	ble.n	8024372 <etharp_find_entry+0x236>
 8024364:	4b2b      	ldr	r3, [pc, #172]	@ (8024414 <etharp_find_entry+0x2d8>)
 8024366:	f240 127f 	movw	r2, #383	@ 0x17f
 802436a:	492e      	ldr	r1, [pc, #184]	@ (8024424 <etharp_find_entry+0x2e8>)
 802436c:	482b      	ldr	r0, [pc, #172]	@ (802441c <etharp_find_entry+0x2e0>)
 802436e:	f005 ff25 	bl	802a1bc <iprintf>
    etharp_free_entry(i);
 8024372:	f9b7 3026 	ldrsh.w	r3, [r7, #38]	@ 0x26
 8024376:	4618      	mov	r0, r3
 8024378:	f7ff fdd8 	bl	8023f2c <etharp_free_entry>
  }

  LWIP_ASSERT("i < ARP_TABLE_SIZE", i < ARP_TABLE_SIZE);
 802437c:	f9b7 3026 	ldrsh.w	r3, [r7, #38]	@ 0x26
 8024380:	2b09      	cmp	r3, #9
 8024382:	dd06      	ble.n	8024392 <etharp_find_entry+0x256>
 8024384:	4b23      	ldr	r3, [pc, #140]	@ (8024414 <etharp_find_entry+0x2d8>)
 8024386:	f240 1283 	movw	r2, #387	@ 0x183
 802438a:	4926      	ldr	r1, [pc, #152]	@ (8024424 <etharp_find_entry+0x2e8>)
 802438c:	4823      	ldr	r0, [pc, #140]	@ (802441c <etharp_find_entry+0x2e0>)
 802438e:	f005 ff15 	bl	802a1bc <iprintf>
  LWIP_ASSERT("arp_table[i].state == ETHARP_STATE_EMPTY",
 8024392:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 8024396:	491e      	ldr	r1, [pc, #120]	@ (8024410 <etharp_find_entry+0x2d4>)
 8024398:	4613      	mov	r3, r2
 802439a:	005b      	lsls	r3, r3, #1
 802439c:	4413      	add	r3, r2
 802439e:	00db      	lsls	r3, r3, #3
 80243a0:	440b      	add	r3, r1
 80243a2:	3314      	adds	r3, #20
 80243a4:	781b      	ldrb	r3, [r3, #0]
 80243a6:	2b00      	cmp	r3, #0
 80243a8:	d006      	beq.n	80243b8 <etharp_find_entry+0x27c>
 80243aa:	4b1a      	ldr	r3, [pc, #104]	@ (8024414 <etharp_find_entry+0x2d8>)
 80243ac:	f44f 72c2 	mov.w	r2, #388	@ 0x184
 80243b0:	491d      	ldr	r1, [pc, #116]	@ (8024428 <etharp_find_entry+0x2ec>)
 80243b2:	481a      	ldr	r0, [pc, #104]	@ (802441c <etharp_find_entry+0x2e0>)
 80243b4:	f005 ff02 	bl	802a1bc <iprintf>
              arp_table[i].state == ETHARP_STATE_EMPTY);

  /* IP address given? */
  if (ipaddr != NULL) {
 80243b8:	68fb      	ldr	r3, [r7, #12]
 80243ba:	2b00      	cmp	r3, #0
 80243bc:	d00b      	beq.n	80243d6 <etharp_find_entry+0x29a>
    /* set IP address */
    ip4_addr_copy(arp_table[i].ipaddr, *ipaddr);
 80243be:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 80243c2:	68fb      	ldr	r3, [r7, #12]
 80243c4:	6819      	ldr	r1, [r3, #0]
 80243c6:	4812      	ldr	r0, [pc, #72]	@ (8024410 <etharp_find_entry+0x2d4>)
 80243c8:	4613      	mov	r3, r2
 80243ca:	005b      	lsls	r3, r3, #1
 80243cc:	4413      	add	r3, r2
 80243ce:	00db      	lsls	r3, r3, #3
 80243d0:	4403      	add	r3, r0
 80243d2:	3304      	adds	r3, #4
 80243d4:	6019      	str	r1, [r3, #0]
  }
  arp_table[i].ctime = 0;
 80243d6:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 80243da:	490d      	ldr	r1, [pc, #52]	@ (8024410 <etharp_find_entry+0x2d4>)
 80243dc:	4613      	mov	r3, r2
 80243de:	005b      	lsls	r3, r3, #1
 80243e0:	4413      	add	r3, r2
 80243e2:	00db      	lsls	r3, r3, #3
 80243e4:	440b      	add	r3, r1
 80243e6:	3312      	adds	r3, #18
 80243e8:	2200      	movs	r2, #0
 80243ea:	801a      	strh	r2, [r3, #0]
#if ETHARP_TABLE_MATCH_NETIF
  arp_table[i].netif = netif;
 80243ec:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 80243f0:	4907      	ldr	r1, [pc, #28]	@ (8024410 <etharp_find_entry+0x2d4>)
 80243f2:	4613      	mov	r3, r2
 80243f4:	005b      	lsls	r3, r3, #1
 80243f6:	4413      	add	r3, r2
 80243f8:	00db      	lsls	r3, r3, #3
 80243fa:	440b      	add	r3, r1
 80243fc:	3308      	adds	r3, #8
 80243fe:	687a      	ldr	r2, [r7, #4]
 8024400:	601a      	str	r2, [r3, #0]
#endif /* ETHARP_TABLE_MATCH_NETIF */
  return (s16_t)i;
 8024402:	f9b7 3026 	ldrsh.w	r3, [r7, #38]	@ 0x26
}
 8024406:	4618      	mov	r0, r3
 8024408:	3728      	adds	r7, #40	@ 0x28
 802440a:	46bd      	mov	sp, r7
 802440c:	bd80      	pop	{r7, pc}
 802440e:	bf00      	nop
 8024410:	2402aff0 	.word	0x2402aff0
 8024414:	08030a88 	.word	0x08030a88
 8024418:	08030ac0 	.word	0x08030ac0
 802441c:	08030b00 	.word	0x08030b00
 8024420:	08030b28 	.word	0x08030b28
 8024424:	08030b40 	.word	0x08030b40
 8024428:	08030b54 	.word	0x08030b54

0802442c <etharp_update_arp_entry>:
 *
 * @see pbuf_free()
 */
static err_t
etharp_update_arp_entry(struct netif *netif, const ip4_addr_t *ipaddr, struct eth_addr *ethaddr, u8_t flags)
{
 802442c:	b580      	push	{r7, lr}
 802442e:	b088      	sub	sp, #32
 8024430:	af02      	add	r7, sp, #8
 8024432:	60f8      	str	r0, [r7, #12]
 8024434:	60b9      	str	r1, [r7, #8]
 8024436:	607a      	str	r2, [r7, #4]
 8024438:	70fb      	strb	r3, [r7, #3]
  s16_t i;
  LWIP_ASSERT("netif->hwaddr_len == ETH_HWADDR_LEN", netif->hwaddr_len == ETH_HWADDR_LEN);
 802443a:	68fb      	ldr	r3, [r7, #12]
 802443c:	f893 3030 	ldrb.w	r3, [r3, #48]	@ 0x30
 8024440:	2b06      	cmp	r3, #6
 8024442:	d006      	beq.n	8024452 <etharp_update_arp_entry+0x26>
 8024444:	4b48      	ldr	r3, [pc, #288]	@ (8024568 <etharp_update_arp_entry+0x13c>)
 8024446:	f240 12a9 	movw	r2, #425	@ 0x1a9
 802444a:	4948      	ldr	r1, [pc, #288]	@ (802456c <etharp_update_arp_entry+0x140>)
 802444c:	4848      	ldr	r0, [pc, #288]	@ (8024570 <etharp_update_arp_entry+0x144>)
 802444e:	f005 feb5 	bl	802a1bc <iprintf>
  LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_update_arp_entry: %"U16_F".%"U16_F".%"U16_F".%"U16_F" - %02"X16_F":%02"X16_F":%02"X16_F":%02"X16_F":%02"X16_F":%02"X16_F"\n",
              ip4_addr1_16(ipaddr), ip4_addr2_16(ipaddr), ip4_addr3_16(ipaddr), ip4_addr4_16(ipaddr),
              (u16_t)ethaddr->addr[0], (u16_t)ethaddr->addr[1], (u16_t)ethaddr->addr[2],
              (u16_t)ethaddr->addr[3], (u16_t)ethaddr->addr[4], (u16_t)ethaddr->addr[5]));
  /* non-unicast address? */
  if (ip4_addr_isany(ipaddr) ||
 8024452:	68bb      	ldr	r3, [r7, #8]
 8024454:	2b00      	cmp	r3, #0
 8024456:	d012      	beq.n	802447e <etharp_update_arp_entry+0x52>
 8024458:	68bb      	ldr	r3, [r7, #8]
 802445a:	681b      	ldr	r3, [r3, #0]
 802445c:	2b00      	cmp	r3, #0
 802445e:	d00e      	beq.n	802447e <etharp_update_arp_entry+0x52>
      ip4_addr_isbroadcast(ipaddr, netif) ||
 8024460:	68bb      	ldr	r3, [r7, #8]
 8024462:	681b      	ldr	r3, [r3, #0]
 8024464:	68f9      	ldr	r1, [r7, #12]
 8024466:	4618      	mov	r0, r3
 8024468:	f001 f952 	bl	8025710 <ip4_addr_isbroadcast_u32>
 802446c:	4603      	mov	r3, r0
  if (ip4_addr_isany(ipaddr) ||
 802446e:	2b00      	cmp	r3, #0
 8024470:	d105      	bne.n	802447e <etharp_update_arp_entry+0x52>
      ip4_addr_ismulticast(ipaddr)) {
 8024472:	68bb      	ldr	r3, [r7, #8]
 8024474:	681b      	ldr	r3, [r3, #0]
 8024476:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
      ip4_addr_isbroadcast(ipaddr, netif) ||
 802447a:	2be0      	cmp	r3, #224	@ 0xe0
 802447c:	d102      	bne.n	8024484 <etharp_update_arp_entry+0x58>
    LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_update_arp_entry: will not add non-unicast IP address to ARP cache\n"));
    return ERR_ARG;
 802447e:	f06f 030f 	mvn.w	r3, #15
 8024482:	e06c      	b.n	802455e <etharp_update_arp_entry+0x132>
  }
  /* find or create ARP entry */
  i = etharp_find_entry(ipaddr, flags, netif);
 8024484:	78fb      	ldrb	r3, [r7, #3]
 8024486:	68fa      	ldr	r2, [r7, #12]
 8024488:	4619      	mov	r1, r3
 802448a:	68b8      	ldr	r0, [r7, #8]
 802448c:	f7ff fe56 	bl	802413c <etharp_find_entry>
 8024490:	4603      	mov	r3, r0
 8024492:	82fb      	strh	r3, [r7, #22]
  /* bail out if no entry could be found */
  if (i < 0) {
 8024494:	f9b7 3016 	ldrsh.w	r3, [r7, #22]
 8024498:	2b00      	cmp	r3, #0
 802449a:	da02      	bge.n	80244a2 <etharp_update_arp_entry+0x76>
    return (err_t)i;
 802449c:	8afb      	ldrh	r3, [r7, #22]
 802449e:	b25b      	sxtb	r3, r3
 80244a0:	e05d      	b.n	802455e <etharp_update_arp_entry+0x132>
    return ERR_VAL;
  } else
#endif /* ETHARP_SUPPORT_STATIC_ENTRIES */
  {
    /* mark it stable */
    arp_table[i].state = ETHARP_STATE_STABLE;
 80244a2:	f9b7 2016 	ldrsh.w	r2, [r7, #22]
 80244a6:	4933      	ldr	r1, [pc, #204]	@ (8024574 <etharp_update_arp_entry+0x148>)
 80244a8:	4613      	mov	r3, r2
 80244aa:	005b      	lsls	r3, r3, #1
 80244ac:	4413      	add	r3, r2
 80244ae:	00db      	lsls	r3, r3, #3
 80244b0:	440b      	add	r3, r1
 80244b2:	3314      	adds	r3, #20
 80244b4:	2202      	movs	r2, #2
 80244b6:	701a      	strb	r2, [r3, #0]
  }

  /* record network interface */
  arp_table[i].netif = netif;
 80244b8:	f9b7 2016 	ldrsh.w	r2, [r7, #22]
 80244bc:	492d      	ldr	r1, [pc, #180]	@ (8024574 <etharp_update_arp_entry+0x148>)
 80244be:	4613      	mov	r3, r2
 80244c0:	005b      	lsls	r3, r3, #1
 80244c2:	4413      	add	r3, r2
 80244c4:	00db      	lsls	r3, r3, #3
 80244c6:	440b      	add	r3, r1
 80244c8:	3308      	adds	r3, #8
 80244ca:	68fa      	ldr	r2, [r7, #12]
 80244cc:	601a      	str	r2, [r3, #0]
  /* insert in SNMP ARP index tree */
  mib2_add_arp_entry(netif, &arp_table[i].ipaddr);

  LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_update_arp_entry: updating stable entry %"S16_F"\n", i));
  /* update address */
  SMEMCPY(&arp_table[i].ethaddr, ethaddr, ETH_HWADDR_LEN);
 80244ce:	f9b7 2016 	ldrsh.w	r2, [r7, #22]
 80244d2:	4613      	mov	r3, r2
 80244d4:	005b      	lsls	r3, r3, #1
 80244d6:	4413      	add	r3, r2
 80244d8:	00db      	lsls	r3, r3, #3
 80244da:	3308      	adds	r3, #8
 80244dc:	4a25      	ldr	r2, [pc, #148]	@ (8024574 <etharp_update_arp_entry+0x148>)
 80244de:	4413      	add	r3, r2
 80244e0:	3304      	adds	r3, #4
 80244e2:	2206      	movs	r2, #6
 80244e4:	6879      	ldr	r1, [r7, #4]
 80244e6:	4618      	mov	r0, r3
 80244e8:	f006 f8f1 	bl	802a6ce <memcpy>
  /* reset time stamp */
  arp_table[i].ctime = 0;
 80244ec:	f9b7 2016 	ldrsh.w	r2, [r7, #22]
 80244f0:	4920      	ldr	r1, [pc, #128]	@ (8024574 <etharp_update_arp_entry+0x148>)
 80244f2:	4613      	mov	r3, r2
 80244f4:	005b      	lsls	r3, r3, #1
 80244f6:	4413      	add	r3, r2
 80244f8:	00db      	lsls	r3, r3, #3
 80244fa:	440b      	add	r3, r1
 80244fc:	3312      	adds	r3, #18
 80244fe:	2200      	movs	r2, #0
 8024500:	801a      	strh	r2, [r3, #0]
    /* get the packet pointer */
    p = q->p;
    /* now queue entry can be freed */
    memp_free(MEMP_ARP_QUEUE, q);
#else /* ARP_QUEUEING */
  if (arp_table[i].q != NULL) {
 8024502:	f9b7 2016 	ldrsh.w	r2, [r7, #22]
 8024506:	491b      	ldr	r1, [pc, #108]	@ (8024574 <etharp_update_arp_entry+0x148>)
 8024508:	4613      	mov	r3, r2
 802450a:	005b      	lsls	r3, r3, #1
 802450c:	4413      	add	r3, r2
 802450e:	00db      	lsls	r3, r3, #3
 8024510:	440b      	add	r3, r1
 8024512:	681b      	ldr	r3, [r3, #0]
 8024514:	2b00      	cmp	r3, #0
 8024516:	d021      	beq.n	802455c <etharp_update_arp_entry+0x130>
    struct pbuf *p = arp_table[i].q;
 8024518:	f9b7 2016 	ldrsh.w	r2, [r7, #22]
 802451c:	4915      	ldr	r1, [pc, #84]	@ (8024574 <etharp_update_arp_entry+0x148>)
 802451e:	4613      	mov	r3, r2
 8024520:	005b      	lsls	r3, r3, #1
 8024522:	4413      	add	r3, r2
 8024524:	00db      	lsls	r3, r3, #3
 8024526:	440b      	add	r3, r1
 8024528:	681b      	ldr	r3, [r3, #0]
 802452a:	613b      	str	r3, [r7, #16]
    arp_table[i].q = NULL;
 802452c:	f9b7 2016 	ldrsh.w	r2, [r7, #22]
 8024530:	4910      	ldr	r1, [pc, #64]	@ (8024574 <etharp_update_arp_entry+0x148>)
 8024532:	4613      	mov	r3, r2
 8024534:	005b      	lsls	r3, r3, #1
 8024536:	4413      	add	r3, r2
 8024538:	00db      	lsls	r3, r3, #3
 802453a:	440b      	add	r3, r1
 802453c:	2200      	movs	r2, #0
 802453e:	601a      	str	r2, [r3, #0]
#endif /* ARP_QUEUEING */
    /* send the queued IP packet */
    ethernet_output(netif, p, (struct eth_addr *)(netif->hwaddr), ethaddr, ETHTYPE_IP);
 8024540:	68fb      	ldr	r3, [r7, #12]
 8024542:	f103 022a 	add.w	r2, r3, #42	@ 0x2a
 8024546:	f44f 6300 	mov.w	r3, #2048	@ 0x800
 802454a:	9300      	str	r3, [sp, #0]
 802454c:	687b      	ldr	r3, [r7, #4]
 802454e:	6939      	ldr	r1, [r7, #16]
 8024550:	68f8      	ldr	r0, [r7, #12]
 8024552:	f002 f9bb 	bl	80268cc <ethernet_output>
    /* free the queued IP packet */
    pbuf_free(p);
 8024556:	6938      	ldr	r0, [r7, #16]
 8024558:	f7f6 fbb8 	bl	801accc <pbuf_free>
  }
  return ERR_OK;
 802455c:	2300      	movs	r3, #0
}
 802455e:	4618      	mov	r0, r3
 8024560:	3718      	adds	r7, #24
 8024562:	46bd      	mov	sp, r7
 8024564:	bd80      	pop	{r7, pc}
 8024566:	bf00      	nop
 8024568:	08030a88 	.word	0x08030a88
 802456c:	08030b80 	.word	0x08030b80
 8024570:	08030b00 	.word	0x08030b00
 8024574:	2402aff0 	.word	0x2402aff0

08024578 <etharp_cleanup_netif>:
 *
 * @param netif points to a network interface
 */
void
etharp_cleanup_netif(struct netif *netif)
{
 8024578:	b580      	push	{r7, lr}
 802457a:	b084      	sub	sp, #16
 802457c:	af00      	add	r7, sp, #0
 802457e:	6078      	str	r0, [r7, #4]
  int i;

  for (i = 0; i < ARP_TABLE_SIZE; ++i) {
 8024580:	2300      	movs	r3, #0
 8024582:	60fb      	str	r3, [r7, #12]
 8024584:	e01e      	b.n	80245c4 <etharp_cleanup_netif+0x4c>
    u8_t state = arp_table[i].state;
 8024586:	4913      	ldr	r1, [pc, #76]	@ (80245d4 <etharp_cleanup_netif+0x5c>)
 8024588:	68fa      	ldr	r2, [r7, #12]
 802458a:	4613      	mov	r3, r2
 802458c:	005b      	lsls	r3, r3, #1
 802458e:	4413      	add	r3, r2
 8024590:	00db      	lsls	r3, r3, #3
 8024592:	440b      	add	r3, r1
 8024594:	3314      	adds	r3, #20
 8024596:	781b      	ldrb	r3, [r3, #0]
 8024598:	72fb      	strb	r3, [r7, #11]
    if ((state != ETHARP_STATE_EMPTY) && (arp_table[i].netif == netif)) {
 802459a:	7afb      	ldrb	r3, [r7, #11]
 802459c:	2b00      	cmp	r3, #0
 802459e:	d00e      	beq.n	80245be <etharp_cleanup_netif+0x46>
 80245a0:	490c      	ldr	r1, [pc, #48]	@ (80245d4 <etharp_cleanup_netif+0x5c>)
 80245a2:	68fa      	ldr	r2, [r7, #12]
 80245a4:	4613      	mov	r3, r2
 80245a6:	005b      	lsls	r3, r3, #1
 80245a8:	4413      	add	r3, r2
 80245aa:	00db      	lsls	r3, r3, #3
 80245ac:	440b      	add	r3, r1
 80245ae:	3308      	adds	r3, #8
 80245b0:	681b      	ldr	r3, [r3, #0]
 80245b2:	687a      	ldr	r2, [r7, #4]
 80245b4:	429a      	cmp	r2, r3
 80245b6:	d102      	bne.n	80245be <etharp_cleanup_netif+0x46>
      etharp_free_entry(i);
 80245b8:	68f8      	ldr	r0, [r7, #12]
 80245ba:	f7ff fcb7 	bl	8023f2c <etharp_free_entry>
  for (i = 0; i < ARP_TABLE_SIZE; ++i) {
 80245be:	68fb      	ldr	r3, [r7, #12]
 80245c0:	3301      	adds	r3, #1
 80245c2:	60fb      	str	r3, [r7, #12]
 80245c4:	68fb      	ldr	r3, [r7, #12]
 80245c6:	2b09      	cmp	r3, #9
 80245c8:	dddd      	ble.n	8024586 <etharp_cleanup_netif+0xe>
    }
  }
}
 80245ca:	bf00      	nop
 80245cc:	bf00      	nop
 80245ce:	3710      	adds	r7, #16
 80245d0:	46bd      	mov	sp, r7
 80245d2:	bd80      	pop	{r7, pc}
 80245d4:	2402aff0 	.word	0x2402aff0

080245d8 <etharp_input>:
 *
 * @see pbuf_free()
 */
void
etharp_input(struct pbuf *p, struct netif *netif)
{
 80245d8:	b5b0      	push	{r4, r5, r7, lr}
 80245da:	b08a      	sub	sp, #40	@ 0x28
 80245dc:	af04      	add	r7, sp, #16
 80245de:	6078      	str	r0, [r7, #4]
 80245e0:	6039      	str	r1, [r7, #0]
  struct etharp_hdr *hdr;
  /* these are aligned properly, whereas the ARP header fields might not be */
  ip4_addr_t sipaddr, dipaddr;
  u8_t for_us;

  LWIP_ASSERT_CORE_LOCKED();
 80245e2:	f7ec fa4b 	bl	8010a7c <sys_check_core_locking>

  LWIP_ERROR("netif != NULL", (netif != NULL), return;);
 80245e6:	683b      	ldr	r3, [r7, #0]
 80245e8:	2b00      	cmp	r3, #0
 80245ea:	d107      	bne.n	80245fc <etharp_input+0x24>
 80245ec:	4b3f      	ldr	r3, [pc, #252]	@ (80246ec <etharp_input+0x114>)
 80245ee:	f240 228a 	movw	r2, #650	@ 0x28a
 80245f2:	493f      	ldr	r1, [pc, #252]	@ (80246f0 <etharp_input+0x118>)
 80245f4:	483f      	ldr	r0, [pc, #252]	@ (80246f4 <etharp_input+0x11c>)
 80245f6:	f005 fde1 	bl	802a1bc <iprintf>
 80245fa:	e074      	b.n	80246e6 <etharp_input+0x10e>

  hdr = (struct etharp_hdr *)p->payload;
 80245fc:	687b      	ldr	r3, [r7, #4]
 80245fe:	685b      	ldr	r3, [r3, #4]
 8024600:	617b      	str	r3, [r7, #20]

  /* RFC 826 "Packet Reception": */
  if ((hdr->hwtype != PP_HTONS(LWIP_IANA_HWTYPE_ETHERNET)) ||
 8024602:	697b      	ldr	r3, [r7, #20]
 8024604:	881b      	ldrh	r3, [r3, #0]
 8024606:	b29b      	uxth	r3, r3
 8024608:	f5b3 7f80 	cmp.w	r3, #256	@ 0x100
 802460c:	d10c      	bne.n	8024628 <etharp_input+0x50>
      (hdr->hwlen != ETH_HWADDR_LEN) ||
 802460e:	697b      	ldr	r3, [r7, #20]
 8024610:	791b      	ldrb	r3, [r3, #4]
  if ((hdr->hwtype != PP_HTONS(LWIP_IANA_HWTYPE_ETHERNET)) ||
 8024612:	2b06      	cmp	r3, #6
 8024614:	d108      	bne.n	8024628 <etharp_input+0x50>
      (hdr->protolen != sizeof(ip4_addr_t)) ||
 8024616:	697b      	ldr	r3, [r7, #20]
 8024618:	795b      	ldrb	r3, [r3, #5]
      (hdr->hwlen != ETH_HWADDR_LEN) ||
 802461a:	2b04      	cmp	r3, #4
 802461c:	d104      	bne.n	8024628 <etharp_input+0x50>
      (hdr->proto != PP_HTONS(ETHTYPE_IP)))  {
 802461e:	697b      	ldr	r3, [r7, #20]
 8024620:	885b      	ldrh	r3, [r3, #2]
 8024622:	b29b      	uxth	r3, r3
      (hdr->protolen != sizeof(ip4_addr_t)) ||
 8024624:	2b08      	cmp	r3, #8
 8024626:	d003      	beq.n	8024630 <etharp_input+0x58>
    LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING,
                ("etharp_input: packet dropped, wrong hw type, hwlen, proto, protolen or ethernet type (%"U16_F"/%"U16_F"/%"U16_F"/%"U16_F")\n",
                 hdr->hwtype, (u16_t)hdr->hwlen, hdr->proto, (u16_t)hdr->protolen));
    ETHARP_STATS_INC(etharp.proterr);
    ETHARP_STATS_INC(etharp.drop);
    pbuf_free(p);
 8024628:	6878      	ldr	r0, [r7, #4]
 802462a:	f7f6 fb4f 	bl	801accc <pbuf_free>
    return;
 802462e:	e05a      	b.n	80246e6 <etharp_input+0x10e>
  autoip_arp_reply(netif, hdr);
#endif /* LWIP_AUTOIP */

  /* Copy struct ip4_addr_wordaligned to aligned ip4_addr, to support compilers without
   * structure packing (not using structure copy which breaks strict-aliasing rules). */
  IPADDR_WORDALIGNED_COPY_TO_IP4_ADDR_T(&sipaddr, &hdr->sipaddr);
 8024630:	697b      	ldr	r3, [r7, #20]
 8024632:	330e      	adds	r3, #14
 8024634:	681b      	ldr	r3, [r3, #0]
 8024636:	60fb      	str	r3, [r7, #12]
  IPADDR_WORDALIGNED_COPY_TO_IP4_ADDR_T(&dipaddr, &hdr->dipaddr);
 8024638:	697b      	ldr	r3, [r7, #20]
 802463a:	3318      	adds	r3, #24
 802463c:	681b      	ldr	r3, [r3, #0]
 802463e:	60bb      	str	r3, [r7, #8]

  /* this interface is not configured? */
  if (ip4_addr_isany_val(*netif_ip4_addr(netif))) {
 8024640:	683b      	ldr	r3, [r7, #0]
 8024642:	3304      	adds	r3, #4
 8024644:	681b      	ldr	r3, [r3, #0]
 8024646:	2b00      	cmp	r3, #0
 8024648:	d102      	bne.n	8024650 <etharp_input+0x78>
    for_us = 0;
 802464a:	2300      	movs	r3, #0
 802464c:	74fb      	strb	r3, [r7, #19]
 802464e:	e009      	b.n	8024664 <etharp_input+0x8c>
  } else {
    /* ARP packet directed to us? */
    for_us = (u8_t)ip4_addr_cmp(&dipaddr, netif_ip4_addr(netif));
 8024650:	68ba      	ldr	r2, [r7, #8]
 8024652:	683b      	ldr	r3, [r7, #0]
 8024654:	3304      	adds	r3, #4
 8024656:	681b      	ldr	r3, [r3, #0]
 8024658:	429a      	cmp	r2, r3
 802465a:	bf0c      	ite	eq
 802465c:	2301      	moveq	r3, #1
 802465e:	2300      	movne	r3, #0
 8024660:	b2db      	uxtb	r3, r3
 8024662:	74fb      	strb	r3, [r7, #19]
  /* ARP message directed to us?
      -> add IP address in ARP cache; assume requester wants to talk to us,
         can result in directly sending the queued packets for this host.
     ARP message not directed to us?
      ->  update the source IP address in the cache, if present */
  etharp_update_arp_entry(netif, &sipaddr, &(hdr->shwaddr),
 8024664:	697b      	ldr	r3, [r7, #20]
 8024666:	f103 0208 	add.w	r2, r3, #8
 802466a:	7cfb      	ldrb	r3, [r7, #19]
 802466c:	2b00      	cmp	r3, #0
 802466e:	d001      	beq.n	8024674 <etharp_input+0x9c>
 8024670:	2301      	movs	r3, #1
 8024672:	e000      	b.n	8024676 <etharp_input+0x9e>
 8024674:	2302      	movs	r3, #2
 8024676:	f107 010c 	add.w	r1, r7, #12
 802467a:	6838      	ldr	r0, [r7, #0]
 802467c:	f7ff fed6 	bl	802442c <etharp_update_arp_entry>
                          for_us ? ETHARP_FLAG_TRY_HARD : ETHARP_FLAG_FIND_ONLY);

  /* now act on the message itself */
  switch (hdr->opcode) {
 8024680:	697b      	ldr	r3, [r7, #20]
 8024682:	88db      	ldrh	r3, [r3, #6]
 8024684:	b29b      	uxth	r3, r3
 8024686:	f5b3 7f80 	cmp.w	r3, #256	@ 0x100
 802468a:	d003      	beq.n	8024694 <etharp_input+0xbc>
 802468c:	f5b3 7f00 	cmp.w	r3, #512	@ 0x200
 8024690:	d01e      	beq.n	80246d0 <etharp_input+0xf8>
#endif /* (LWIP_DHCP && DHCP_DOES_ARP_CHECK) */
      break;
    default:
      LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_input: ARP unknown opcode type %"S16_F"\n", lwip_htons(hdr->opcode)));
      ETHARP_STATS_INC(etharp.err);
      break;
 8024692:	e025      	b.n	80246e0 <etharp_input+0x108>
      if (for_us) {
 8024694:	7cfb      	ldrb	r3, [r7, #19]
 8024696:	2b00      	cmp	r3, #0
 8024698:	d021      	beq.n	80246de <etharp_input+0x106>
                   (struct eth_addr *)netif->hwaddr, &hdr->shwaddr,
 802469a:	683b      	ldr	r3, [r7, #0]
 802469c:	f103 002a 	add.w	r0, r3, #42	@ 0x2a
 80246a0:	697b      	ldr	r3, [r7, #20]
 80246a2:	f103 0408 	add.w	r4, r3, #8
                   (struct eth_addr *)netif->hwaddr, netif_ip4_addr(netif),
 80246a6:	683b      	ldr	r3, [r7, #0]
 80246a8:	f103 052a 	add.w	r5, r3, #42	@ 0x2a
 80246ac:	683b      	ldr	r3, [r7, #0]
 80246ae:	3304      	adds	r3, #4
                   &hdr->shwaddr, &sipaddr,
 80246b0:	697a      	ldr	r2, [r7, #20]
 80246b2:	3208      	adds	r2, #8
        etharp_raw(netif,
 80246b4:	2102      	movs	r1, #2
 80246b6:	9103      	str	r1, [sp, #12]
 80246b8:	f107 010c 	add.w	r1, r7, #12
 80246bc:	9102      	str	r1, [sp, #8]
 80246be:	9201      	str	r2, [sp, #4]
 80246c0:	9300      	str	r3, [sp, #0]
 80246c2:	462b      	mov	r3, r5
 80246c4:	4622      	mov	r2, r4
 80246c6:	4601      	mov	r1, r0
 80246c8:	6838      	ldr	r0, [r7, #0]
 80246ca:	f000 faf1 	bl	8024cb0 <etharp_raw>
      break;
 80246ce:	e006      	b.n	80246de <etharp_input+0x106>
      dhcp_arp_reply(netif, &sipaddr);
 80246d0:	f107 030c 	add.w	r3, r7, #12
 80246d4:	4619      	mov	r1, r3
 80246d6:	6838      	ldr	r0, [r7, #0]
 80246d8:	f7fe f9b6 	bl	8022a48 <dhcp_arp_reply>
      break;
 80246dc:	e000      	b.n	80246e0 <etharp_input+0x108>
      break;
 80246de:	bf00      	nop
  }
  /* free ARP packet */
  pbuf_free(p);
 80246e0:	6878      	ldr	r0, [r7, #4]
 80246e2:	f7f6 faf3 	bl	801accc <pbuf_free>
}
 80246e6:	3718      	adds	r7, #24
 80246e8:	46bd      	mov	sp, r7
 80246ea:	bdb0      	pop	{r4, r5, r7, pc}
 80246ec:	08030a88 	.word	0x08030a88
 80246f0:	08030bd8 	.word	0x08030bd8
 80246f4:	08030b00 	.word	0x08030b00

080246f8 <etharp_output_to_arp_index>:
/** Just a small helper function that sends a pbuf to an ethernet address
 * in the arp_table specified by the index 'arp_idx'.
 */
static err_t
etharp_output_to_arp_index(struct netif *netif, struct pbuf *q, netif_addr_idx_t arp_idx)
{
 80246f8:	b580      	push	{r7, lr}
 80246fa:	b086      	sub	sp, #24
 80246fc:	af02      	add	r7, sp, #8
 80246fe:	60f8      	str	r0, [r7, #12]
 8024700:	60b9      	str	r1, [r7, #8]
 8024702:	4613      	mov	r3, r2
 8024704:	71fb      	strb	r3, [r7, #7]
  LWIP_ASSERT("arp_table[arp_idx].state >= ETHARP_STATE_STABLE",
 8024706:	79fa      	ldrb	r2, [r7, #7]
 8024708:	4944      	ldr	r1, [pc, #272]	@ (802481c <etharp_output_to_arp_index+0x124>)
 802470a:	4613      	mov	r3, r2
 802470c:	005b      	lsls	r3, r3, #1
 802470e:	4413      	add	r3, r2
 8024710:	00db      	lsls	r3, r3, #3
 8024712:	440b      	add	r3, r1
 8024714:	3314      	adds	r3, #20
 8024716:	781b      	ldrb	r3, [r3, #0]
 8024718:	2b01      	cmp	r3, #1
 802471a:	d806      	bhi.n	802472a <etharp_output_to_arp_index+0x32>
 802471c:	4b40      	ldr	r3, [pc, #256]	@ (8024820 <etharp_output_to_arp_index+0x128>)
 802471e:	f240 22ee 	movw	r2, #750	@ 0x2ee
 8024722:	4940      	ldr	r1, [pc, #256]	@ (8024824 <etharp_output_to_arp_index+0x12c>)
 8024724:	4840      	ldr	r0, [pc, #256]	@ (8024828 <etharp_output_to_arp_index+0x130>)
 8024726:	f005 fd49 	bl	802a1bc <iprintf>
              arp_table[arp_idx].state >= ETHARP_STATE_STABLE);
  /* if arp table entry is about to expire: re-request it,
     but only if its state is ETHARP_STATE_STABLE to prevent flooding the
     network with ARP requests if this address is used frequently. */
  if (arp_table[arp_idx].state == ETHARP_STATE_STABLE) {
 802472a:	79fa      	ldrb	r2, [r7, #7]
 802472c:	493b      	ldr	r1, [pc, #236]	@ (802481c <etharp_output_to_arp_index+0x124>)
 802472e:	4613      	mov	r3, r2
 8024730:	005b      	lsls	r3, r3, #1
 8024732:	4413      	add	r3, r2
 8024734:	00db      	lsls	r3, r3, #3
 8024736:	440b      	add	r3, r1
 8024738:	3314      	adds	r3, #20
 802473a:	781b      	ldrb	r3, [r3, #0]
 802473c:	2b02      	cmp	r3, #2
 802473e:	d153      	bne.n	80247e8 <etharp_output_to_arp_index+0xf0>
    if (arp_table[arp_idx].ctime >= ARP_AGE_REREQUEST_USED_BROADCAST) {
 8024740:	79fa      	ldrb	r2, [r7, #7]
 8024742:	4936      	ldr	r1, [pc, #216]	@ (802481c <etharp_output_to_arp_index+0x124>)
 8024744:	4613      	mov	r3, r2
 8024746:	005b      	lsls	r3, r3, #1
 8024748:	4413      	add	r3, r2
 802474a:	00db      	lsls	r3, r3, #3
 802474c:	440b      	add	r3, r1
 802474e:	3312      	adds	r3, #18
 8024750:	881b      	ldrh	r3, [r3, #0]
 8024752:	f5b3 7f8e 	cmp.w	r3, #284	@ 0x11c
 8024756:	d919      	bls.n	802478c <etharp_output_to_arp_index+0x94>
      /* issue a standard request using broadcast */
      if (etharp_request(netif, &arp_table[arp_idx].ipaddr) == ERR_OK) {
 8024758:	79fa      	ldrb	r2, [r7, #7]
 802475a:	4613      	mov	r3, r2
 802475c:	005b      	lsls	r3, r3, #1
 802475e:	4413      	add	r3, r2
 8024760:	00db      	lsls	r3, r3, #3
 8024762:	4a2e      	ldr	r2, [pc, #184]	@ (802481c <etharp_output_to_arp_index+0x124>)
 8024764:	4413      	add	r3, r2
 8024766:	3304      	adds	r3, #4
 8024768:	4619      	mov	r1, r3
 802476a:	68f8      	ldr	r0, [r7, #12]
 802476c:	f000 fb4e 	bl	8024e0c <etharp_request>
 8024770:	4603      	mov	r3, r0
 8024772:	2b00      	cmp	r3, #0
 8024774:	d138      	bne.n	80247e8 <etharp_output_to_arp_index+0xf0>
        arp_table[arp_idx].state = ETHARP_STATE_STABLE_REREQUESTING_1;
 8024776:	79fa      	ldrb	r2, [r7, #7]
 8024778:	4928      	ldr	r1, [pc, #160]	@ (802481c <etharp_output_to_arp_index+0x124>)
 802477a:	4613      	mov	r3, r2
 802477c:	005b      	lsls	r3, r3, #1
 802477e:	4413      	add	r3, r2
 8024780:	00db      	lsls	r3, r3, #3
 8024782:	440b      	add	r3, r1
 8024784:	3314      	adds	r3, #20
 8024786:	2203      	movs	r2, #3
 8024788:	701a      	strb	r2, [r3, #0]
 802478a:	e02d      	b.n	80247e8 <etharp_output_to_arp_index+0xf0>
      }
    } else if (arp_table[arp_idx].ctime >= ARP_AGE_REREQUEST_USED_UNICAST) {
 802478c:	79fa      	ldrb	r2, [r7, #7]
 802478e:	4923      	ldr	r1, [pc, #140]	@ (802481c <etharp_output_to_arp_index+0x124>)
 8024790:	4613      	mov	r3, r2
 8024792:	005b      	lsls	r3, r3, #1
 8024794:	4413      	add	r3, r2
 8024796:	00db      	lsls	r3, r3, #3
 8024798:	440b      	add	r3, r1
 802479a:	3312      	adds	r3, #18
 802479c:	881b      	ldrh	r3, [r3, #0]
 802479e:	f5b3 7f87 	cmp.w	r3, #270	@ 0x10e
 80247a2:	d321      	bcc.n	80247e8 <etharp_output_to_arp_index+0xf0>
      /* issue a unicast request (for 15 seconds) to prevent unnecessary broadcast */
      if (etharp_request_dst(netif, &arp_table[arp_idx].ipaddr, &arp_table[arp_idx].ethaddr) == ERR_OK) {
 80247a4:	79fa      	ldrb	r2, [r7, #7]
 80247a6:	4613      	mov	r3, r2
 80247a8:	005b      	lsls	r3, r3, #1
 80247aa:	4413      	add	r3, r2
 80247ac:	00db      	lsls	r3, r3, #3
 80247ae:	4a1b      	ldr	r2, [pc, #108]	@ (802481c <etharp_output_to_arp_index+0x124>)
 80247b0:	4413      	add	r3, r2
 80247b2:	1d19      	adds	r1, r3, #4
 80247b4:	79fa      	ldrb	r2, [r7, #7]
 80247b6:	4613      	mov	r3, r2
 80247b8:	005b      	lsls	r3, r3, #1
 80247ba:	4413      	add	r3, r2
 80247bc:	00db      	lsls	r3, r3, #3
 80247be:	3308      	adds	r3, #8
 80247c0:	4a16      	ldr	r2, [pc, #88]	@ (802481c <etharp_output_to_arp_index+0x124>)
 80247c2:	4413      	add	r3, r2
 80247c4:	3304      	adds	r3, #4
 80247c6:	461a      	mov	r2, r3
 80247c8:	68f8      	ldr	r0, [r7, #12]
 80247ca:	f000 fafd 	bl	8024dc8 <etharp_request_dst>
 80247ce:	4603      	mov	r3, r0
 80247d0:	2b00      	cmp	r3, #0
 80247d2:	d109      	bne.n	80247e8 <etharp_output_to_arp_index+0xf0>
        arp_table[arp_idx].state = ETHARP_STATE_STABLE_REREQUESTING_1;
 80247d4:	79fa      	ldrb	r2, [r7, #7]
 80247d6:	4911      	ldr	r1, [pc, #68]	@ (802481c <etharp_output_to_arp_index+0x124>)
 80247d8:	4613      	mov	r3, r2
 80247da:	005b      	lsls	r3, r3, #1
 80247dc:	4413      	add	r3, r2
 80247de:	00db      	lsls	r3, r3, #3
 80247e0:	440b      	add	r3, r1
 80247e2:	3314      	adds	r3, #20
 80247e4:	2203      	movs	r2, #3
 80247e6:	701a      	strb	r2, [r3, #0]
      }
    }
  }

  return ethernet_output(netif, q, (struct eth_addr *)(netif->hwaddr), &arp_table[arp_idx].ethaddr, ETHTYPE_IP);
 80247e8:	68fb      	ldr	r3, [r7, #12]
 80247ea:	f103 012a 	add.w	r1, r3, #42	@ 0x2a
 80247ee:	79fa      	ldrb	r2, [r7, #7]
 80247f0:	4613      	mov	r3, r2
 80247f2:	005b      	lsls	r3, r3, #1
 80247f4:	4413      	add	r3, r2
 80247f6:	00db      	lsls	r3, r3, #3
 80247f8:	3308      	adds	r3, #8
 80247fa:	4a08      	ldr	r2, [pc, #32]	@ (802481c <etharp_output_to_arp_index+0x124>)
 80247fc:	4413      	add	r3, r2
 80247fe:	3304      	adds	r3, #4
 8024800:	f44f 6200 	mov.w	r2, #2048	@ 0x800
 8024804:	9200      	str	r2, [sp, #0]
 8024806:	460a      	mov	r2, r1
 8024808:	68b9      	ldr	r1, [r7, #8]
 802480a:	68f8      	ldr	r0, [r7, #12]
 802480c:	f002 f85e 	bl	80268cc <ethernet_output>
 8024810:	4603      	mov	r3, r0
}
 8024812:	4618      	mov	r0, r3
 8024814:	3710      	adds	r7, #16
 8024816:	46bd      	mov	sp, r7
 8024818:	bd80      	pop	{r7, pc}
 802481a:	bf00      	nop
 802481c:	2402aff0 	.word	0x2402aff0
 8024820:	08030a88 	.word	0x08030a88
 8024824:	08030bf8 	.word	0x08030bf8
 8024828:	08030b00 	.word	0x08030b00

0802482c <etharp_output>:
 * - ERR_RTE No route to destination (no gateway to external networks),
 * or the return type of either etharp_query() or ethernet_output().
 */
err_t
etharp_output(struct netif *netif, struct pbuf *q, const ip4_addr_t *ipaddr)
{
 802482c:	b580      	push	{r7, lr}
 802482e:	b08a      	sub	sp, #40	@ 0x28
 8024830:	af02      	add	r7, sp, #8
 8024832:	60f8      	str	r0, [r7, #12]
 8024834:	60b9      	str	r1, [r7, #8]
 8024836:	607a      	str	r2, [r7, #4]
  const struct eth_addr *dest;
  struct eth_addr mcastaddr;
  const ip4_addr_t *dst_addr = ipaddr;
 8024838:	687b      	ldr	r3, [r7, #4]
 802483a:	61bb      	str	r3, [r7, #24]

  LWIP_ASSERT_CORE_LOCKED();
 802483c:	f7ec f91e 	bl	8010a7c <sys_check_core_locking>
  LWIP_ASSERT("netif != NULL", netif != NULL);
 8024840:	68fb      	ldr	r3, [r7, #12]
 8024842:	2b00      	cmp	r3, #0
 8024844:	d106      	bne.n	8024854 <etharp_output+0x28>
 8024846:	4b73      	ldr	r3, [pc, #460]	@ (8024a14 <etharp_output+0x1e8>)
 8024848:	f240 321e 	movw	r2, #798	@ 0x31e
 802484c:	4972      	ldr	r1, [pc, #456]	@ (8024a18 <etharp_output+0x1ec>)
 802484e:	4873      	ldr	r0, [pc, #460]	@ (8024a1c <etharp_output+0x1f0>)
 8024850:	f005 fcb4 	bl	802a1bc <iprintf>
  LWIP_ASSERT("q != NULL", q != NULL);
 8024854:	68bb      	ldr	r3, [r7, #8]
 8024856:	2b00      	cmp	r3, #0
 8024858:	d106      	bne.n	8024868 <etharp_output+0x3c>
 802485a:	4b6e      	ldr	r3, [pc, #440]	@ (8024a14 <etharp_output+0x1e8>)
 802485c:	f240 321f 	movw	r2, #799	@ 0x31f
 8024860:	496f      	ldr	r1, [pc, #444]	@ (8024a20 <etharp_output+0x1f4>)
 8024862:	486e      	ldr	r0, [pc, #440]	@ (8024a1c <etharp_output+0x1f0>)
 8024864:	f005 fcaa 	bl	802a1bc <iprintf>
  LWIP_ASSERT("ipaddr != NULL", ipaddr != NULL);
 8024868:	687b      	ldr	r3, [r7, #4]
 802486a:	2b00      	cmp	r3, #0
 802486c:	d106      	bne.n	802487c <etharp_output+0x50>
 802486e:	4b69      	ldr	r3, [pc, #420]	@ (8024a14 <etharp_output+0x1e8>)
 8024870:	f44f 7248 	mov.w	r2, #800	@ 0x320
 8024874:	496b      	ldr	r1, [pc, #428]	@ (8024a24 <etharp_output+0x1f8>)
 8024876:	4869      	ldr	r0, [pc, #420]	@ (8024a1c <etharp_output+0x1f0>)
 8024878:	f005 fca0 	bl	802a1bc <iprintf>

  /* Determine on destination hardware address. Broadcasts and multicasts
   * are special, other IP addresses are looked up in the ARP table. */

  /* broadcast destination IP address? */
  if (ip4_addr_isbroadcast(ipaddr, netif)) {
 802487c:	687b      	ldr	r3, [r7, #4]
 802487e:	681b      	ldr	r3, [r3, #0]
 8024880:	68f9      	ldr	r1, [r7, #12]
 8024882:	4618      	mov	r0, r3
 8024884:	f000 ff44 	bl	8025710 <ip4_addr_isbroadcast_u32>
 8024888:	4603      	mov	r3, r0
 802488a:	2b00      	cmp	r3, #0
 802488c:	d002      	beq.n	8024894 <etharp_output+0x68>
    /* broadcast on Ethernet also */
    dest = (const struct eth_addr *)&ethbroadcast;
 802488e:	4b66      	ldr	r3, [pc, #408]	@ (8024a28 <etharp_output+0x1fc>)
 8024890:	61fb      	str	r3, [r7, #28]
 8024892:	e0af      	b.n	80249f4 <etharp_output+0x1c8>
    /* multicast destination IP address? */
  } else if (ip4_addr_ismulticast(ipaddr)) {
 8024894:	687b      	ldr	r3, [r7, #4]
 8024896:	681b      	ldr	r3, [r3, #0]
 8024898:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 802489c:	2be0      	cmp	r3, #224	@ 0xe0
 802489e:	d118      	bne.n	80248d2 <etharp_output+0xa6>
    /* Hash IP multicast address to MAC address.*/
    mcastaddr.addr[0] = LL_IP4_MULTICAST_ADDR_0;
 80248a0:	2301      	movs	r3, #1
 80248a2:	743b      	strb	r3, [r7, #16]
    mcastaddr.addr[1] = LL_IP4_MULTICAST_ADDR_1;
 80248a4:	2300      	movs	r3, #0
 80248a6:	747b      	strb	r3, [r7, #17]
    mcastaddr.addr[2] = LL_IP4_MULTICAST_ADDR_2;
 80248a8:	235e      	movs	r3, #94	@ 0x5e
 80248aa:	74bb      	strb	r3, [r7, #18]
    mcastaddr.addr[3] = ip4_addr2(ipaddr) & 0x7f;
 80248ac:	687b      	ldr	r3, [r7, #4]
 80248ae:	3301      	adds	r3, #1
 80248b0:	781b      	ldrb	r3, [r3, #0]
 80248b2:	f003 037f 	and.w	r3, r3, #127	@ 0x7f
 80248b6:	b2db      	uxtb	r3, r3
 80248b8:	74fb      	strb	r3, [r7, #19]
    mcastaddr.addr[4] = ip4_addr3(ipaddr);
 80248ba:	687b      	ldr	r3, [r7, #4]
 80248bc:	3302      	adds	r3, #2
 80248be:	781b      	ldrb	r3, [r3, #0]
 80248c0:	753b      	strb	r3, [r7, #20]
    mcastaddr.addr[5] = ip4_addr4(ipaddr);
 80248c2:	687b      	ldr	r3, [r7, #4]
 80248c4:	3303      	adds	r3, #3
 80248c6:	781b      	ldrb	r3, [r3, #0]
 80248c8:	757b      	strb	r3, [r7, #21]
    /* destination Ethernet address is multicast */
    dest = &mcastaddr;
 80248ca:	f107 0310 	add.w	r3, r7, #16
 80248ce:	61fb      	str	r3, [r7, #28]
 80248d0:	e090      	b.n	80249f4 <etharp_output+0x1c8>
    /* unicast destination IP address? */
  } else {
    netif_addr_idx_t i;
    /* outside local network? if so, this can neither be a global broadcast nor
       a subnet broadcast. */
    if (!ip4_addr_netcmp(ipaddr, netif_ip4_addr(netif), netif_ip4_netmask(netif)) &&
 80248d2:	687b      	ldr	r3, [r7, #4]
 80248d4:	681a      	ldr	r2, [r3, #0]
 80248d6:	68fb      	ldr	r3, [r7, #12]
 80248d8:	3304      	adds	r3, #4
 80248da:	681b      	ldr	r3, [r3, #0]
 80248dc:	405a      	eors	r2, r3
 80248de:	68fb      	ldr	r3, [r7, #12]
 80248e0:	3308      	adds	r3, #8
 80248e2:	681b      	ldr	r3, [r3, #0]
 80248e4:	4013      	ands	r3, r2
 80248e6:	2b00      	cmp	r3, #0
 80248e8:	d012      	beq.n	8024910 <etharp_output+0xe4>
        !ip4_addr_islinklocal(ipaddr)) {
 80248ea:	687b      	ldr	r3, [r7, #4]
 80248ec:	681b      	ldr	r3, [r3, #0]
 80248ee:	b29b      	uxth	r3, r3
    if (!ip4_addr_netcmp(ipaddr, netif_ip4_addr(netif), netif_ip4_netmask(netif)) &&
 80248f0:	f64f 62a9 	movw	r2, #65193	@ 0xfea9
 80248f4:	4293      	cmp	r3, r2
 80248f6:	d00b      	beq.n	8024910 <etharp_output+0xe4>
        dst_addr = LWIP_HOOK_ETHARP_GET_GW(netif, ipaddr);
        if (dst_addr == NULL)
#endif /* LWIP_HOOK_ETHARP_GET_GW */
        {
          /* interface has default gateway? */
          if (!ip4_addr_isany_val(*netif_ip4_gw(netif))) {
 80248f8:	68fb      	ldr	r3, [r7, #12]
 80248fa:	330c      	adds	r3, #12
 80248fc:	681b      	ldr	r3, [r3, #0]
 80248fe:	2b00      	cmp	r3, #0
 8024900:	d003      	beq.n	802490a <etharp_output+0xde>
            /* send to hardware address of default gateway IP address */
            dst_addr = netif_ip4_gw(netif);
 8024902:	68fb      	ldr	r3, [r7, #12]
 8024904:	330c      	adds	r3, #12
 8024906:	61bb      	str	r3, [r7, #24]
 8024908:	e002      	b.n	8024910 <etharp_output+0xe4>
            /* no default gateway available */
          } else {
            /* no route to destination error (default gateway missing) */
            return ERR_RTE;
 802490a:	f06f 0303 	mvn.w	r3, #3
 802490e:	e07d      	b.n	8024a0c <etharp_output+0x1e0>
    if (netif->hints != NULL) {
      /* per-pcb cached entry was given */
      netif_addr_idx_t etharp_cached_entry = netif->hints->addr_hint;
      if (etharp_cached_entry < ARP_TABLE_SIZE) {
#endif /* LWIP_NETIF_HWADDRHINT */
        if ((arp_table[etharp_cached_entry].state >= ETHARP_STATE_STABLE) &&
 8024910:	4b46      	ldr	r3, [pc, #280]	@ (8024a2c <etharp_output+0x200>)
 8024912:	781b      	ldrb	r3, [r3, #0]
 8024914:	4619      	mov	r1, r3
 8024916:	4a46      	ldr	r2, [pc, #280]	@ (8024a30 <etharp_output+0x204>)
 8024918:	460b      	mov	r3, r1
 802491a:	005b      	lsls	r3, r3, #1
 802491c:	440b      	add	r3, r1
 802491e:	00db      	lsls	r3, r3, #3
 8024920:	4413      	add	r3, r2
 8024922:	3314      	adds	r3, #20
 8024924:	781b      	ldrb	r3, [r3, #0]
 8024926:	2b01      	cmp	r3, #1
 8024928:	d925      	bls.n	8024976 <etharp_output+0x14a>
#if ETHARP_TABLE_MATCH_NETIF
            (arp_table[etharp_cached_entry].netif == netif) &&
 802492a:	4b40      	ldr	r3, [pc, #256]	@ (8024a2c <etharp_output+0x200>)
 802492c:	781b      	ldrb	r3, [r3, #0]
 802492e:	4619      	mov	r1, r3
 8024930:	4a3f      	ldr	r2, [pc, #252]	@ (8024a30 <etharp_output+0x204>)
 8024932:	460b      	mov	r3, r1
 8024934:	005b      	lsls	r3, r3, #1
 8024936:	440b      	add	r3, r1
 8024938:	00db      	lsls	r3, r3, #3
 802493a:	4413      	add	r3, r2
 802493c:	3308      	adds	r3, #8
 802493e:	681b      	ldr	r3, [r3, #0]
        if ((arp_table[etharp_cached_entry].state >= ETHARP_STATE_STABLE) &&
 8024940:	68fa      	ldr	r2, [r7, #12]
 8024942:	429a      	cmp	r2, r3
 8024944:	d117      	bne.n	8024976 <etharp_output+0x14a>
#endif
            (ip4_addr_cmp(dst_addr, &arp_table[etharp_cached_entry].ipaddr))) {
 8024946:	69bb      	ldr	r3, [r7, #24]
 8024948:	681a      	ldr	r2, [r3, #0]
 802494a:	4b38      	ldr	r3, [pc, #224]	@ (8024a2c <etharp_output+0x200>)
 802494c:	781b      	ldrb	r3, [r3, #0]
 802494e:	4618      	mov	r0, r3
 8024950:	4937      	ldr	r1, [pc, #220]	@ (8024a30 <etharp_output+0x204>)
 8024952:	4603      	mov	r3, r0
 8024954:	005b      	lsls	r3, r3, #1
 8024956:	4403      	add	r3, r0
 8024958:	00db      	lsls	r3, r3, #3
 802495a:	440b      	add	r3, r1
 802495c:	3304      	adds	r3, #4
 802495e:	681b      	ldr	r3, [r3, #0]
            (arp_table[etharp_cached_entry].netif == netif) &&
 8024960:	429a      	cmp	r2, r3
 8024962:	d108      	bne.n	8024976 <etharp_output+0x14a>
          /* the per-pcb-cached entry is stable and the right one! */
          ETHARP_STATS_INC(etharp.cachehit);
          return etharp_output_to_arp_index(netif, q, etharp_cached_entry);
 8024964:	4b31      	ldr	r3, [pc, #196]	@ (8024a2c <etharp_output+0x200>)
 8024966:	781b      	ldrb	r3, [r3, #0]
 8024968:	461a      	mov	r2, r3
 802496a:	68b9      	ldr	r1, [r7, #8]
 802496c:	68f8      	ldr	r0, [r7, #12]
 802496e:	f7ff fec3 	bl	80246f8 <etharp_output_to_arp_index>
 8024972:	4603      	mov	r3, r0
 8024974:	e04a      	b.n	8024a0c <etharp_output+0x1e0>
    }
#endif /* LWIP_NETIF_HWADDRHINT */

    /* find stable entry: do this here since this is a critical path for
       throughput and etharp_find_entry() is kind of slow */
    for (i = 0; i < ARP_TABLE_SIZE; i++) {
 8024976:	2300      	movs	r3, #0
 8024978:	75fb      	strb	r3, [r7, #23]
 802497a:	e031      	b.n	80249e0 <etharp_output+0x1b4>
      if ((arp_table[i].state >= ETHARP_STATE_STABLE) &&
 802497c:	7dfa      	ldrb	r2, [r7, #23]
 802497e:	492c      	ldr	r1, [pc, #176]	@ (8024a30 <etharp_output+0x204>)
 8024980:	4613      	mov	r3, r2
 8024982:	005b      	lsls	r3, r3, #1
 8024984:	4413      	add	r3, r2
 8024986:	00db      	lsls	r3, r3, #3
 8024988:	440b      	add	r3, r1
 802498a:	3314      	adds	r3, #20
 802498c:	781b      	ldrb	r3, [r3, #0]
 802498e:	2b01      	cmp	r3, #1
 8024990:	d923      	bls.n	80249da <etharp_output+0x1ae>
#if ETHARP_TABLE_MATCH_NETIF
          (arp_table[i].netif == netif) &&
 8024992:	7dfa      	ldrb	r2, [r7, #23]
 8024994:	4926      	ldr	r1, [pc, #152]	@ (8024a30 <etharp_output+0x204>)
 8024996:	4613      	mov	r3, r2
 8024998:	005b      	lsls	r3, r3, #1
 802499a:	4413      	add	r3, r2
 802499c:	00db      	lsls	r3, r3, #3
 802499e:	440b      	add	r3, r1
 80249a0:	3308      	adds	r3, #8
 80249a2:	681b      	ldr	r3, [r3, #0]
      if ((arp_table[i].state >= ETHARP_STATE_STABLE) &&
 80249a4:	68fa      	ldr	r2, [r7, #12]
 80249a6:	429a      	cmp	r2, r3
 80249a8:	d117      	bne.n	80249da <etharp_output+0x1ae>
#endif
          (ip4_addr_cmp(dst_addr, &arp_table[i].ipaddr))) {
 80249aa:	69bb      	ldr	r3, [r7, #24]
 80249ac:	6819      	ldr	r1, [r3, #0]
 80249ae:	7dfa      	ldrb	r2, [r7, #23]
 80249b0:	481f      	ldr	r0, [pc, #124]	@ (8024a30 <etharp_output+0x204>)
 80249b2:	4613      	mov	r3, r2
 80249b4:	005b      	lsls	r3, r3, #1
 80249b6:	4413      	add	r3, r2
 80249b8:	00db      	lsls	r3, r3, #3
 80249ba:	4403      	add	r3, r0
 80249bc:	3304      	adds	r3, #4
 80249be:	681b      	ldr	r3, [r3, #0]
          (arp_table[i].netif == netif) &&
 80249c0:	4299      	cmp	r1, r3
 80249c2:	d10a      	bne.n	80249da <etharp_output+0x1ae>
        /* found an existing, stable entry */
        ETHARP_SET_ADDRHINT(netif, i);
 80249c4:	4a19      	ldr	r2, [pc, #100]	@ (8024a2c <etharp_output+0x200>)
 80249c6:	7dfb      	ldrb	r3, [r7, #23]
 80249c8:	7013      	strb	r3, [r2, #0]
        return etharp_output_to_arp_index(netif, q, i);
 80249ca:	7dfb      	ldrb	r3, [r7, #23]
 80249cc:	461a      	mov	r2, r3
 80249ce:	68b9      	ldr	r1, [r7, #8]
 80249d0:	68f8      	ldr	r0, [r7, #12]
 80249d2:	f7ff fe91 	bl	80246f8 <etharp_output_to_arp_index>
 80249d6:	4603      	mov	r3, r0
 80249d8:	e018      	b.n	8024a0c <etharp_output+0x1e0>
    for (i = 0; i < ARP_TABLE_SIZE; i++) {
 80249da:	7dfb      	ldrb	r3, [r7, #23]
 80249dc:	3301      	adds	r3, #1
 80249de:	75fb      	strb	r3, [r7, #23]
 80249e0:	7dfb      	ldrb	r3, [r7, #23]
 80249e2:	2b09      	cmp	r3, #9
 80249e4:	d9ca      	bls.n	802497c <etharp_output+0x150>
      }
    }
    /* no stable entry found, use the (slower) query function:
       queue on destination Ethernet address belonging to ipaddr */
    return etharp_query(netif, dst_addr, q);
 80249e6:	68ba      	ldr	r2, [r7, #8]
 80249e8:	69b9      	ldr	r1, [r7, #24]
 80249ea:	68f8      	ldr	r0, [r7, #12]
 80249ec:	f000 f822 	bl	8024a34 <etharp_query>
 80249f0:	4603      	mov	r3, r0
 80249f2:	e00b      	b.n	8024a0c <etharp_output+0x1e0>
  }

  /* continuation for multicast/broadcast destinations */
  /* obtain source Ethernet address of the given interface */
  /* send packet directly on the link */
  return ethernet_output(netif, q, (struct eth_addr *)(netif->hwaddr), dest, ETHTYPE_IP);
 80249f4:	68fb      	ldr	r3, [r7, #12]
 80249f6:	f103 022a 	add.w	r2, r3, #42	@ 0x2a
 80249fa:	f44f 6300 	mov.w	r3, #2048	@ 0x800
 80249fe:	9300      	str	r3, [sp, #0]
 8024a00:	69fb      	ldr	r3, [r7, #28]
 8024a02:	68b9      	ldr	r1, [r7, #8]
 8024a04:	68f8      	ldr	r0, [r7, #12]
 8024a06:	f001 ff61 	bl	80268cc <ethernet_output>
 8024a0a:	4603      	mov	r3, r0
}
 8024a0c:	4618      	mov	r0, r3
 8024a0e:	3720      	adds	r7, #32
 8024a10:	46bd      	mov	sp, r7
 8024a12:	bd80      	pop	{r7, pc}
 8024a14:	08030a88 	.word	0x08030a88
 8024a18:	08030bd8 	.word	0x08030bd8
 8024a1c:	08030b00 	.word	0x08030b00
 8024a20:	08030c28 	.word	0x08030c28
 8024a24:	08030bc8 	.word	0x08030bc8
 8024a28:	080314fc 	.word	0x080314fc
 8024a2c:	2402b0e0 	.word	0x2402b0e0
 8024a30:	2402aff0 	.word	0x2402aff0

08024a34 <etharp_query>:
 * - ERR_ARG Non-unicast address given, those will not appear in ARP cache.
 *
 */
err_t
etharp_query(struct netif *netif, const ip4_addr_t *ipaddr, struct pbuf *q)
{
 8024a34:	b580      	push	{r7, lr}
 8024a36:	b08c      	sub	sp, #48	@ 0x30
 8024a38:	af02      	add	r7, sp, #8
 8024a3a:	60f8      	str	r0, [r7, #12]
 8024a3c:	60b9      	str	r1, [r7, #8]
 8024a3e:	607a      	str	r2, [r7, #4]
  struct eth_addr *srcaddr = (struct eth_addr *)netif->hwaddr;
 8024a40:	68fb      	ldr	r3, [r7, #12]
 8024a42:	332a      	adds	r3, #42	@ 0x2a
 8024a44:	617b      	str	r3, [r7, #20]
  err_t result = ERR_MEM;
 8024a46:	23ff      	movs	r3, #255	@ 0xff
 8024a48:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
  int is_new_entry = 0;
 8024a4c:	2300      	movs	r3, #0
 8024a4e:	623b      	str	r3, [r7, #32]
  s16_t i_err;
  netif_addr_idx_t i;

  /* non-unicast address? */
  if (ip4_addr_isbroadcast(ipaddr, netif) ||
 8024a50:	68bb      	ldr	r3, [r7, #8]
 8024a52:	681b      	ldr	r3, [r3, #0]
 8024a54:	68f9      	ldr	r1, [r7, #12]
 8024a56:	4618      	mov	r0, r3
 8024a58:	f000 fe5a 	bl	8025710 <ip4_addr_isbroadcast_u32>
 8024a5c:	4603      	mov	r3, r0
 8024a5e:	2b00      	cmp	r3, #0
 8024a60:	d10c      	bne.n	8024a7c <etharp_query+0x48>
      ip4_addr_ismulticast(ipaddr) ||
 8024a62:	68bb      	ldr	r3, [r7, #8]
 8024a64:	681b      	ldr	r3, [r3, #0]
 8024a66:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
  if (ip4_addr_isbroadcast(ipaddr, netif) ||
 8024a6a:	2be0      	cmp	r3, #224	@ 0xe0
 8024a6c:	d006      	beq.n	8024a7c <etharp_query+0x48>
      ip4_addr_ismulticast(ipaddr) ||
 8024a6e:	68bb      	ldr	r3, [r7, #8]
 8024a70:	2b00      	cmp	r3, #0
 8024a72:	d003      	beq.n	8024a7c <etharp_query+0x48>
      ip4_addr_isany(ipaddr)) {
 8024a74:	68bb      	ldr	r3, [r7, #8]
 8024a76:	681b      	ldr	r3, [r3, #0]
 8024a78:	2b00      	cmp	r3, #0
 8024a7a:	d102      	bne.n	8024a82 <etharp_query+0x4e>
    LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: will not add non-unicast IP address to ARP cache\n"));
    return ERR_ARG;
 8024a7c:	f06f 030f 	mvn.w	r3, #15
 8024a80:	e101      	b.n	8024c86 <etharp_query+0x252>
  }

  /* find entry in ARP cache, ask to create entry if queueing packet */
  i_err = etharp_find_entry(ipaddr, ETHARP_FLAG_TRY_HARD, netif);
 8024a82:	68fa      	ldr	r2, [r7, #12]
 8024a84:	2101      	movs	r1, #1
 8024a86:	68b8      	ldr	r0, [r7, #8]
 8024a88:	f7ff fb58 	bl	802413c <etharp_find_entry>
 8024a8c:	4603      	mov	r3, r0
 8024a8e:	827b      	strh	r3, [r7, #18]

  /* could not find or create entry? */
  if (i_err < 0) {
 8024a90:	f9b7 3012 	ldrsh.w	r3, [r7, #18]
 8024a94:	2b00      	cmp	r3, #0
 8024a96:	da02      	bge.n	8024a9e <etharp_query+0x6a>
    LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: could not create ARP entry\n"));
    if (q) {
      LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: packet dropped\n"));
      ETHARP_STATS_INC(etharp.memerr);
    }
    return (err_t)i_err;
 8024a98:	8a7b      	ldrh	r3, [r7, #18]
 8024a9a:	b25b      	sxtb	r3, r3
 8024a9c:	e0f3      	b.n	8024c86 <etharp_query+0x252>
  }
  LWIP_ASSERT("type overflow", (size_t)i_err < NETIF_ADDR_IDX_MAX);
 8024a9e:	8a7b      	ldrh	r3, [r7, #18]
 8024aa0:	2b7e      	cmp	r3, #126	@ 0x7e
 8024aa2:	d906      	bls.n	8024ab2 <etharp_query+0x7e>
 8024aa4:	4b7a      	ldr	r3, [pc, #488]	@ (8024c90 <etharp_query+0x25c>)
 8024aa6:	f240 32c1 	movw	r2, #961	@ 0x3c1
 8024aaa:	497a      	ldr	r1, [pc, #488]	@ (8024c94 <etharp_query+0x260>)
 8024aac:	487a      	ldr	r0, [pc, #488]	@ (8024c98 <etharp_query+0x264>)
 8024aae:	f005 fb85 	bl	802a1bc <iprintf>
  i = (netif_addr_idx_t)i_err;
 8024ab2:	8a7b      	ldrh	r3, [r7, #18]
 8024ab4:	747b      	strb	r3, [r7, #17]

  /* mark a fresh entry as pending (we just sent a request) */
  if (arp_table[i].state == ETHARP_STATE_EMPTY) {
 8024ab6:	7c7a      	ldrb	r2, [r7, #17]
 8024ab8:	4978      	ldr	r1, [pc, #480]	@ (8024c9c <etharp_query+0x268>)
 8024aba:	4613      	mov	r3, r2
 8024abc:	005b      	lsls	r3, r3, #1
 8024abe:	4413      	add	r3, r2
 8024ac0:	00db      	lsls	r3, r3, #3
 8024ac2:	440b      	add	r3, r1
 8024ac4:	3314      	adds	r3, #20
 8024ac6:	781b      	ldrb	r3, [r3, #0]
 8024ac8:	2b00      	cmp	r3, #0
 8024aca:	d115      	bne.n	8024af8 <etharp_query+0xc4>
    is_new_entry = 1;
 8024acc:	2301      	movs	r3, #1
 8024ace:	623b      	str	r3, [r7, #32]
    arp_table[i].state = ETHARP_STATE_PENDING;
 8024ad0:	7c7a      	ldrb	r2, [r7, #17]
 8024ad2:	4972      	ldr	r1, [pc, #456]	@ (8024c9c <etharp_query+0x268>)
 8024ad4:	4613      	mov	r3, r2
 8024ad6:	005b      	lsls	r3, r3, #1
 8024ad8:	4413      	add	r3, r2
 8024ada:	00db      	lsls	r3, r3, #3
 8024adc:	440b      	add	r3, r1
 8024ade:	3314      	adds	r3, #20
 8024ae0:	2201      	movs	r2, #1
 8024ae2:	701a      	strb	r2, [r3, #0]
    /* record network interface for re-sending arp request in etharp_tmr */
    arp_table[i].netif = netif;
 8024ae4:	7c7a      	ldrb	r2, [r7, #17]
 8024ae6:	496d      	ldr	r1, [pc, #436]	@ (8024c9c <etharp_query+0x268>)
 8024ae8:	4613      	mov	r3, r2
 8024aea:	005b      	lsls	r3, r3, #1
 8024aec:	4413      	add	r3, r2
 8024aee:	00db      	lsls	r3, r3, #3
 8024af0:	440b      	add	r3, r1
 8024af2:	3308      	adds	r3, #8
 8024af4:	68fa      	ldr	r2, [r7, #12]
 8024af6:	601a      	str	r2, [r3, #0]
  }

  /* { i is either a STABLE or (new or existing) PENDING entry } */
  LWIP_ASSERT("arp_table[i].state == PENDING or STABLE",
 8024af8:	7c7a      	ldrb	r2, [r7, #17]
 8024afa:	4968      	ldr	r1, [pc, #416]	@ (8024c9c <etharp_query+0x268>)
 8024afc:	4613      	mov	r3, r2
 8024afe:	005b      	lsls	r3, r3, #1
 8024b00:	4413      	add	r3, r2
 8024b02:	00db      	lsls	r3, r3, #3
 8024b04:	440b      	add	r3, r1
 8024b06:	3314      	adds	r3, #20
 8024b08:	781b      	ldrb	r3, [r3, #0]
 8024b0a:	2b01      	cmp	r3, #1
 8024b0c:	d011      	beq.n	8024b32 <etharp_query+0xfe>
 8024b0e:	7c7a      	ldrb	r2, [r7, #17]
 8024b10:	4962      	ldr	r1, [pc, #392]	@ (8024c9c <etharp_query+0x268>)
 8024b12:	4613      	mov	r3, r2
 8024b14:	005b      	lsls	r3, r3, #1
 8024b16:	4413      	add	r3, r2
 8024b18:	00db      	lsls	r3, r3, #3
 8024b1a:	440b      	add	r3, r1
 8024b1c:	3314      	adds	r3, #20
 8024b1e:	781b      	ldrb	r3, [r3, #0]
 8024b20:	2b01      	cmp	r3, #1
 8024b22:	d806      	bhi.n	8024b32 <etharp_query+0xfe>
 8024b24:	4b5a      	ldr	r3, [pc, #360]	@ (8024c90 <etharp_query+0x25c>)
 8024b26:	f240 32cd 	movw	r2, #973	@ 0x3cd
 8024b2a:	495d      	ldr	r1, [pc, #372]	@ (8024ca0 <etharp_query+0x26c>)
 8024b2c:	485a      	ldr	r0, [pc, #360]	@ (8024c98 <etharp_query+0x264>)
 8024b2e:	f005 fb45 	bl	802a1bc <iprintf>
              ((arp_table[i].state == ETHARP_STATE_PENDING) ||
               (arp_table[i].state >= ETHARP_STATE_STABLE)));

  /* do we have a new entry? or an implicit query request? */
  if (is_new_entry || (q == NULL)) {
 8024b32:	6a3b      	ldr	r3, [r7, #32]
 8024b34:	2b00      	cmp	r3, #0
 8024b36:	d102      	bne.n	8024b3e <etharp_query+0x10a>
 8024b38:	687b      	ldr	r3, [r7, #4]
 8024b3a:	2b00      	cmp	r3, #0
 8024b3c:	d10c      	bne.n	8024b58 <etharp_query+0x124>
    /* try to resolve it; send out ARP request */
    result = etharp_request(netif, ipaddr);
 8024b3e:	68b9      	ldr	r1, [r7, #8]
 8024b40:	68f8      	ldr	r0, [r7, #12]
 8024b42:	f000 f963 	bl	8024e0c <etharp_request>
 8024b46:	4603      	mov	r3, r0
 8024b48:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
      /* ARP request couldn't be sent */
      /* We don't re-send arp request in etharp_tmr, but we still queue packets,
         since this failure could be temporary, and the next packet calling
         etharp_query again could lead to sending the queued packets. */
    }
    if (q == NULL) {
 8024b4c:	687b      	ldr	r3, [r7, #4]
 8024b4e:	2b00      	cmp	r3, #0
 8024b50:	d102      	bne.n	8024b58 <etharp_query+0x124>
      return result;
 8024b52:	f997 3027 	ldrsb.w	r3, [r7, #39]	@ 0x27
 8024b56:	e096      	b.n	8024c86 <etharp_query+0x252>
    }
  }

  /* packet given? */
  LWIP_ASSERT("q != NULL", q != NULL);
 8024b58:	687b      	ldr	r3, [r7, #4]
 8024b5a:	2b00      	cmp	r3, #0
 8024b5c:	d106      	bne.n	8024b6c <etharp_query+0x138>
 8024b5e:	4b4c      	ldr	r3, [pc, #304]	@ (8024c90 <etharp_query+0x25c>)
 8024b60:	f240 32e1 	movw	r2, #993	@ 0x3e1
 8024b64:	494f      	ldr	r1, [pc, #316]	@ (8024ca4 <etharp_query+0x270>)
 8024b66:	484c      	ldr	r0, [pc, #304]	@ (8024c98 <etharp_query+0x264>)
 8024b68:	f005 fb28 	bl	802a1bc <iprintf>
  /* stable entry? */
  if (arp_table[i].state >= ETHARP_STATE_STABLE) {
 8024b6c:	7c7a      	ldrb	r2, [r7, #17]
 8024b6e:	494b      	ldr	r1, [pc, #300]	@ (8024c9c <etharp_query+0x268>)
 8024b70:	4613      	mov	r3, r2
 8024b72:	005b      	lsls	r3, r3, #1
 8024b74:	4413      	add	r3, r2
 8024b76:	00db      	lsls	r3, r3, #3
 8024b78:	440b      	add	r3, r1
 8024b7a:	3314      	adds	r3, #20
 8024b7c:	781b      	ldrb	r3, [r3, #0]
 8024b7e:	2b01      	cmp	r3, #1
 8024b80:	d917      	bls.n	8024bb2 <etharp_query+0x17e>
    /* we have a valid IP->Ethernet address mapping */
    ETHARP_SET_ADDRHINT(netif, i);
 8024b82:	4a49      	ldr	r2, [pc, #292]	@ (8024ca8 <etharp_query+0x274>)
 8024b84:	7c7b      	ldrb	r3, [r7, #17]
 8024b86:	7013      	strb	r3, [r2, #0]
    /* send the packet */
    result = ethernet_output(netif, q, srcaddr, &(arp_table[i].ethaddr), ETHTYPE_IP);
 8024b88:	7c7a      	ldrb	r2, [r7, #17]
 8024b8a:	4613      	mov	r3, r2
 8024b8c:	005b      	lsls	r3, r3, #1
 8024b8e:	4413      	add	r3, r2
 8024b90:	00db      	lsls	r3, r3, #3
 8024b92:	3308      	adds	r3, #8
 8024b94:	4a41      	ldr	r2, [pc, #260]	@ (8024c9c <etharp_query+0x268>)
 8024b96:	4413      	add	r3, r2
 8024b98:	3304      	adds	r3, #4
 8024b9a:	f44f 6200 	mov.w	r2, #2048	@ 0x800
 8024b9e:	9200      	str	r2, [sp, #0]
 8024ba0:	697a      	ldr	r2, [r7, #20]
 8024ba2:	6879      	ldr	r1, [r7, #4]
 8024ba4:	68f8      	ldr	r0, [r7, #12]
 8024ba6:	f001 fe91 	bl	80268cc <ethernet_output>
 8024baa:	4603      	mov	r3, r0
 8024bac:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
 8024bb0:	e067      	b.n	8024c82 <etharp_query+0x24e>
    /* pending entry? (either just created or already pending */
  } else if (arp_table[i].state == ETHARP_STATE_PENDING) {
 8024bb2:	7c7a      	ldrb	r2, [r7, #17]
 8024bb4:	4939      	ldr	r1, [pc, #228]	@ (8024c9c <etharp_query+0x268>)
 8024bb6:	4613      	mov	r3, r2
 8024bb8:	005b      	lsls	r3, r3, #1
 8024bba:	4413      	add	r3, r2
 8024bbc:	00db      	lsls	r3, r3, #3
 8024bbe:	440b      	add	r3, r1
 8024bc0:	3314      	adds	r3, #20
 8024bc2:	781b      	ldrb	r3, [r3, #0]
 8024bc4:	2b01      	cmp	r3, #1
 8024bc6:	d15c      	bne.n	8024c82 <etharp_query+0x24e>
    /* entry is still pending, queue the given packet 'q' */
    struct pbuf *p;
    int copy_needed = 0;
 8024bc8:	2300      	movs	r3, #0
 8024bca:	61bb      	str	r3, [r7, #24]
    /* IF q includes a pbuf that must be copied, copy the whole chain into a
     * new PBUF_RAM. See the definition of PBUF_NEEDS_COPY for details. */
    p = q;
 8024bcc:	687b      	ldr	r3, [r7, #4]
 8024bce:	61fb      	str	r3, [r7, #28]
    while (p) {
 8024bd0:	e01c      	b.n	8024c0c <etharp_query+0x1d8>
      LWIP_ASSERT("no packet queues allowed!", (p->len != p->tot_len) || (p->next == 0));
 8024bd2:	69fb      	ldr	r3, [r7, #28]
 8024bd4:	895a      	ldrh	r2, [r3, #10]
 8024bd6:	69fb      	ldr	r3, [r7, #28]
 8024bd8:	891b      	ldrh	r3, [r3, #8]
 8024bda:	429a      	cmp	r2, r3
 8024bdc:	d10a      	bne.n	8024bf4 <etharp_query+0x1c0>
 8024bde:	69fb      	ldr	r3, [r7, #28]
 8024be0:	681b      	ldr	r3, [r3, #0]
 8024be2:	2b00      	cmp	r3, #0
 8024be4:	d006      	beq.n	8024bf4 <etharp_query+0x1c0>
 8024be6:	4b2a      	ldr	r3, [pc, #168]	@ (8024c90 <etharp_query+0x25c>)
 8024be8:	f240 32f1 	movw	r2, #1009	@ 0x3f1
 8024bec:	492f      	ldr	r1, [pc, #188]	@ (8024cac <etharp_query+0x278>)
 8024bee:	482a      	ldr	r0, [pc, #168]	@ (8024c98 <etharp_query+0x264>)
 8024bf0:	f005 fae4 	bl	802a1bc <iprintf>
      if (PBUF_NEEDS_COPY(p)) {
 8024bf4:	69fb      	ldr	r3, [r7, #28]
 8024bf6:	7b1b      	ldrb	r3, [r3, #12]
 8024bf8:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 8024bfc:	2b00      	cmp	r3, #0
 8024bfe:	d002      	beq.n	8024c06 <etharp_query+0x1d2>
        copy_needed = 1;
 8024c00:	2301      	movs	r3, #1
 8024c02:	61bb      	str	r3, [r7, #24]
        break;
 8024c04:	e005      	b.n	8024c12 <etharp_query+0x1de>
      }
      p = p->next;
 8024c06:	69fb      	ldr	r3, [r7, #28]
 8024c08:	681b      	ldr	r3, [r3, #0]
 8024c0a:	61fb      	str	r3, [r7, #28]
    while (p) {
 8024c0c:	69fb      	ldr	r3, [r7, #28]
 8024c0e:	2b00      	cmp	r3, #0
 8024c10:	d1df      	bne.n	8024bd2 <etharp_query+0x19e>
    }
    if (copy_needed) {
 8024c12:	69bb      	ldr	r3, [r7, #24]
 8024c14:	2b00      	cmp	r3, #0
 8024c16:	d007      	beq.n	8024c28 <etharp_query+0x1f4>
      /* copy the whole packet into new pbufs */
      p = pbuf_clone(PBUF_LINK, PBUF_RAM, q);
 8024c18:	687a      	ldr	r2, [r7, #4]
 8024c1a:	f44f 7120 	mov.w	r1, #640	@ 0x280
 8024c1e:	200e      	movs	r0, #14
 8024c20:	f7f6 facc 	bl	801b1bc <pbuf_clone>
 8024c24:	61f8      	str	r0, [r7, #28]
 8024c26:	e004      	b.n	8024c32 <etharp_query+0x1fe>
    } else {
      /* referencing the old pbuf is enough */
      p = q;
 8024c28:	687b      	ldr	r3, [r7, #4]
 8024c2a:	61fb      	str	r3, [r7, #28]
      pbuf_ref(p);
 8024c2c:	69f8      	ldr	r0, [r7, #28]
 8024c2e:	f7f6 f8f3 	bl	801ae18 <pbuf_ref>
    }
    /* packet could be taken over? */
    if (p != NULL) {
 8024c32:	69fb      	ldr	r3, [r7, #28]
 8024c34:	2b00      	cmp	r3, #0
 8024c36:	d021      	beq.n	8024c7c <etharp_query+0x248>
        LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: could not queue a copy of PBUF_REF packet %p (out of memory)\n", (void *)q));
        result = ERR_MEM;
      }
#else /* ARP_QUEUEING */
      /* always queue one packet per ARP request only, freeing a previously queued packet */
      if (arp_table[i].q != NULL) {
 8024c38:	7c7a      	ldrb	r2, [r7, #17]
 8024c3a:	4918      	ldr	r1, [pc, #96]	@ (8024c9c <etharp_query+0x268>)
 8024c3c:	4613      	mov	r3, r2
 8024c3e:	005b      	lsls	r3, r3, #1
 8024c40:	4413      	add	r3, r2
 8024c42:	00db      	lsls	r3, r3, #3
 8024c44:	440b      	add	r3, r1
 8024c46:	681b      	ldr	r3, [r3, #0]
 8024c48:	2b00      	cmp	r3, #0
 8024c4a:	d00a      	beq.n	8024c62 <etharp_query+0x22e>
        LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: dropped previously queued packet %p for ARP entry %"U16_F"\n", (void *)q, (u16_t)i));
        pbuf_free(arp_table[i].q);
 8024c4c:	7c7a      	ldrb	r2, [r7, #17]
 8024c4e:	4913      	ldr	r1, [pc, #76]	@ (8024c9c <etharp_query+0x268>)
 8024c50:	4613      	mov	r3, r2
 8024c52:	005b      	lsls	r3, r3, #1
 8024c54:	4413      	add	r3, r2
 8024c56:	00db      	lsls	r3, r3, #3
 8024c58:	440b      	add	r3, r1
 8024c5a:	681b      	ldr	r3, [r3, #0]
 8024c5c:	4618      	mov	r0, r3
 8024c5e:	f7f6 f835 	bl	801accc <pbuf_free>
      }
      arp_table[i].q = p;
 8024c62:	7c7a      	ldrb	r2, [r7, #17]
 8024c64:	490d      	ldr	r1, [pc, #52]	@ (8024c9c <etharp_query+0x268>)
 8024c66:	4613      	mov	r3, r2
 8024c68:	005b      	lsls	r3, r3, #1
 8024c6a:	4413      	add	r3, r2
 8024c6c:	00db      	lsls	r3, r3, #3
 8024c6e:	440b      	add	r3, r1
 8024c70:	69fa      	ldr	r2, [r7, #28]
 8024c72:	601a      	str	r2, [r3, #0]
      result = ERR_OK;
 8024c74:	2300      	movs	r3, #0
 8024c76:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
 8024c7a:	e002      	b.n	8024c82 <etharp_query+0x24e>
      LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: queued packet %p on ARP entry %"U16_F"\n", (void *)q, (u16_t)i));
#endif /* ARP_QUEUEING */
    } else {
      ETHARP_STATS_INC(etharp.memerr);
      LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: could not queue a copy of PBUF_REF packet %p (out of memory)\n", (void *)q));
      result = ERR_MEM;
 8024c7c:	23ff      	movs	r3, #255	@ 0xff
 8024c7e:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
    }
  }
  return result;
 8024c82:	f997 3027 	ldrsb.w	r3, [r7, #39]	@ 0x27
}
 8024c86:	4618      	mov	r0, r3
 8024c88:	3728      	adds	r7, #40	@ 0x28
 8024c8a:	46bd      	mov	sp, r7
 8024c8c:	bd80      	pop	{r7, pc}
 8024c8e:	bf00      	nop
 8024c90:	08030a88 	.word	0x08030a88
 8024c94:	08030c34 	.word	0x08030c34
 8024c98:	08030b00 	.word	0x08030b00
 8024c9c:	2402aff0 	.word	0x2402aff0
 8024ca0:	08030c44 	.word	0x08030c44
 8024ca4:	08030c28 	.word	0x08030c28
 8024ca8:	2402b0e0 	.word	0x2402b0e0
 8024cac:	08030c6c 	.word	0x08030c6c

08024cb0 <etharp_raw>:
etharp_raw(struct netif *netif, const struct eth_addr *ethsrc_addr,
           const struct eth_addr *ethdst_addr,
           const struct eth_addr *hwsrc_addr, const ip4_addr_t *ipsrc_addr,
           const struct eth_addr *hwdst_addr, const ip4_addr_t *ipdst_addr,
           const u16_t opcode)
{
 8024cb0:	b580      	push	{r7, lr}
 8024cb2:	b08a      	sub	sp, #40	@ 0x28
 8024cb4:	af02      	add	r7, sp, #8
 8024cb6:	60f8      	str	r0, [r7, #12]
 8024cb8:	60b9      	str	r1, [r7, #8]
 8024cba:	607a      	str	r2, [r7, #4]
 8024cbc:	603b      	str	r3, [r7, #0]
  struct pbuf *p;
  err_t result = ERR_OK;
 8024cbe:	2300      	movs	r3, #0
 8024cc0:	77fb      	strb	r3, [r7, #31]
  struct etharp_hdr *hdr;

  LWIP_ASSERT("netif != NULL", netif != NULL);
 8024cc2:	68fb      	ldr	r3, [r7, #12]
 8024cc4:	2b00      	cmp	r3, #0
 8024cc6:	d106      	bne.n	8024cd6 <etharp_raw+0x26>
 8024cc8:	4b3a      	ldr	r3, [pc, #232]	@ (8024db4 <etharp_raw+0x104>)
 8024cca:	f240 4257 	movw	r2, #1111	@ 0x457
 8024cce:	493a      	ldr	r1, [pc, #232]	@ (8024db8 <etharp_raw+0x108>)
 8024cd0:	483a      	ldr	r0, [pc, #232]	@ (8024dbc <etharp_raw+0x10c>)
 8024cd2:	f005 fa73 	bl	802a1bc <iprintf>

  /* allocate a pbuf for the outgoing ARP request packet */
  p = pbuf_alloc(PBUF_LINK, SIZEOF_ETHARP_HDR, PBUF_RAM);
 8024cd6:	f44f 7220 	mov.w	r2, #640	@ 0x280
 8024cda:	211c      	movs	r1, #28
 8024cdc:	200e      	movs	r0, #14
 8024cde:	f7f5 fcdf 	bl	801a6a0 <pbuf_alloc>
 8024ce2:	61b8      	str	r0, [r7, #24]
  /* could allocate a pbuf for an ARP request? */
  if (p == NULL) {
 8024ce4:	69bb      	ldr	r3, [r7, #24]
 8024ce6:	2b00      	cmp	r3, #0
 8024ce8:	d102      	bne.n	8024cf0 <etharp_raw+0x40>
    LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS,
                ("etharp_raw: could not allocate pbuf for ARP request.\n"));
    ETHARP_STATS_INC(etharp.memerr);
    return ERR_MEM;
 8024cea:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8024cee:	e05d      	b.n	8024dac <etharp_raw+0xfc>
  }
  LWIP_ASSERT("check that first pbuf can hold struct etharp_hdr",
 8024cf0:	69bb      	ldr	r3, [r7, #24]
 8024cf2:	895b      	ldrh	r3, [r3, #10]
 8024cf4:	2b1b      	cmp	r3, #27
 8024cf6:	d806      	bhi.n	8024d06 <etharp_raw+0x56>
 8024cf8:	4b2e      	ldr	r3, [pc, #184]	@ (8024db4 <etharp_raw+0x104>)
 8024cfa:	f240 4262 	movw	r2, #1122	@ 0x462
 8024cfe:	4930      	ldr	r1, [pc, #192]	@ (8024dc0 <etharp_raw+0x110>)
 8024d00:	482e      	ldr	r0, [pc, #184]	@ (8024dbc <etharp_raw+0x10c>)
 8024d02:	f005 fa5b 	bl	802a1bc <iprintf>
              (p->len >= SIZEOF_ETHARP_HDR));

  hdr = (struct etharp_hdr *)p->payload;
 8024d06:	69bb      	ldr	r3, [r7, #24]
 8024d08:	685b      	ldr	r3, [r3, #4]
 8024d0a:	617b      	str	r3, [r7, #20]
  LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_raw: sending raw ARP packet.\n"));
  hdr->opcode = lwip_htons(opcode);
 8024d0c:	8ebb      	ldrh	r3, [r7, #52]	@ 0x34
 8024d0e:	4618      	mov	r0, r3
 8024d10:	f7f4 fafa 	bl	8019308 <lwip_htons>
 8024d14:	4603      	mov	r3, r0
 8024d16:	461a      	mov	r2, r3
 8024d18:	697b      	ldr	r3, [r7, #20]
 8024d1a:	80da      	strh	r2, [r3, #6]

  LWIP_ASSERT("netif->hwaddr_len must be the same as ETH_HWADDR_LEN for etharp!",
 8024d1c:	68fb      	ldr	r3, [r7, #12]
 8024d1e:	f893 3030 	ldrb.w	r3, [r3, #48]	@ 0x30
 8024d22:	2b06      	cmp	r3, #6
 8024d24:	d006      	beq.n	8024d34 <etharp_raw+0x84>
 8024d26:	4b23      	ldr	r3, [pc, #140]	@ (8024db4 <etharp_raw+0x104>)
 8024d28:	f240 4269 	movw	r2, #1129	@ 0x469
 8024d2c:	4925      	ldr	r1, [pc, #148]	@ (8024dc4 <etharp_raw+0x114>)
 8024d2e:	4823      	ldr	r0, [pc, #140]	@ (8024dbc <etharp_raw+0x10c>)
 8024d30:	f005 fa44 	bl	802a1bc <iprintf>
              (netif->hwaddr_len == ETH_HWADDR_LEN));

  /* Write the ARP MAC-Addresses */
  SMEMCPY(&hdr->shwaddr, hwsrc_addr, ETH_HWADDR_LEN);
 8024d34:	697b      	ldr	r3, [r7, #20]
 8024d36:	3308      	adds	r3, #8
 8024d38:	2206      	movs	r2, #6
 8024d3a:	6839      	ldr	r1, [r7, #0]
 8024d3c:	4618      	mov	r0, r3
 8024d3e:	f005 fcc6 	bl	802a6ce <memcpy>
  SMEMCPY(&hdr->dhwaddr, hwdst_addr, ETH_HWADDR_LEN);
 8024d42:	697b      	ldr	r3, [r7, #20]
 8024d44:	3312      	adds	r3, #18
 8024d46:	2206      	movs	r2, #6
 8024d48:	6af9      	ldr	r1, [r7, #44]	@ 0x2c
 8024d4a:	4618      	mov	r0, r3
 8024d4c:	f005 fcbf 	bl	802a6ce <memcpy>
  /* Copy struct ip4_addr_wordaligned to aligned ip4_addr, to support compilers without
   * structure packing. */
  IPADDR_WORDALIGNED_COPY_FROM_IP4_ADDR_T(&hdr->sipaddr, ipsrc_addr);
 8024d50:	697b      	ldr	r3, [r7, #20]
 8024d52:	330e      	adds	r3, #14
 8024d54:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 8024d56:	6812      	ldr	r2, [r2, #0]
 8024d58:	601a      	str	r2, [r3, #0]
  IPADDR_WORDALIGNED_COPY_FROM_IP4_ADDR_T(&hdr->dipaddr, ipdst_addr);
 8024d5a:	697b      	ldr	r3, [r7, #20]
 8024d5c:	3318      	adds	r3, #24
 8024d5e:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 8024d60:	6812      	ldr	r2, [r2, #0]
 8024d62:	601a      	str	r2, [r3, #0]

  hdr->hwtype = PP_HTONS(LWIP_IANA_HWTYPE_ETHERNET);
 8024d64:	697b      	ldr	r3, [r7, #20]
 8024d66:	2200      	movs	r2, #0
 8024d68:	701a      	strb	r2, [r3, #0]
 8024d6a:	2200      	movs	r2, #0
 8024d6c:	f042 0201 	orr.w	r2, r2, #1
 8024d70:	705a      	strb	r2, [r3, #1]
  hdr->proto = PP_HTONS(ETHTYPE_IP);
 8024d72:	697b      	ldr	r3, [r7, #20]
 8024d74:	2200      	movs	r2, #0
 8024d76:	f042 0208 	orr.w	r2, r2, #8
 8024d7a:	709a      	strb	r2, [r3, #2]
 8024d7c:	2200      	movs	r2, #0
 8024d7e:	70da      	strb	r2, [r3, #3]
  /* set hwlen and protolen */
  hdr->hwlen = ETH_HWADDR_LEN;
 8024d80:	697b      	ldr	r3, [r7, #20]
 8024d82:	2206      	movs	r2, #6
 8024d84:	711a      	strb	r2, [r3, #4]
  hdr->protolen = sizeof(ip4_addr_t);
 8024d86:	697b      	ldr	r3, [r7, #20]
 8024d88:	2204      	movs	r2, #4
 8024d8a:	715a      	strb	r2, [r3, #5]
  if (ip4_addr_islinklocal(ipsrc_addr)) {
    ethernet_output(netif, p, ethsrc_addr, &ethbroadcast, ETHTYPE_ARP);
  } else
#endif /* LWIP_AUTOIP */
  {
    ethernet_output(netif, p, ethsrc_addr, ethdst_addr, ETHTYPE_ARP);
 8024d8c:	f640 0306 	movw	r3, #2054	@ 0x806
 8024d90:	9300      	str	r3, [sp, #0]
 8024d92:	687b      	ldr	r3, [r7, #4]
 8024d94:	68ba      	ldr	r2, [r7, #8]
 8024d96:	69b9      	ldr	r1, [r7, #24]
 8024d98:	68f8      	ldr	r0, [r7, #12]
 8024d9a:	f001 fd97 	bl	80268cc <ethernet_output>
  }

  ETHARP_STATS_INC(etharp.xmit);
  /* free ARP query packet */
  pbuf_free(p);
 8024d9e:	69b8      	ldr	r0, [r7, #24]
 8024da0:	f7f5 ff94 	bl	801accc <pbuf_free>
  p = NULL;
 8024da4:	2300      	movs	r3, #0
 8024da6:	61bb      	str	r3, [r7, #24]
  /* could not allocate pbuf for ARP request */

  return result;
 8024da8:	f997 301f 	ldrsb.w	r3, [r7, #31]
}
 8024dac:	4618      	mov	r0, r3
 8024dae:	3720      	adds	r7, #32
 8024db0:	46bd      	mov	sp, r7
 8024db2:	bd80      	pop	{r7, pc}
 8024db4:	08030a88 	.word	0x08030a88
 8024db8:	08030bd8 	.word	0x08030bd8
 8024dbc:	08030b00 	.word	0x08030b00
 8024dc0:	08030c88 	.word	0x08030c88
 8024dc4:	08030cbc 	.word	0x08030cbc

08024dc8 <etharp_request_dst>:
 *         ERR_MEM if the ARP packet couldn't be allocated
 *         any other err_t on failure
 */
static err_t
etharp_request_dst(struct netif *netif, const ip4_addr_t *ipaddr, const struct eth_addr *hw_dst_addr)
{
 8024dc8:	b580      	push	{r7, lr}
 8024dca:	b088      	sub	sp, #32
 8024dcc:	af04      	add	r7, sp, #16
 8024dce:	60f8      	str	r0, [r7, #12]
 8024dd0:	60b9      	str	r1, [r7, #8]
 8024dd2:	607a      	str	r2, [r7, #4]
  return etharp_raw(netif, (struct eth_addr *)netif->hwaddr, hw_dst_addr,
 8024dd4:	68fb      	ldr	r3, [r7, #12]
 8024dd6:	f103 012a 	add.w	r1, r3, #42	@ 0x2a
                    (struct eth_addr *)netif->hwaddr, netif_ip4_addr(netif), &ethzero,
 8024dda:	68fb      	ldr	r3, [r7, #12]
 8024ddc:	f103 002a 	add.w	r0, r3, #42	@ 0x2a
 8024de0:	68fb      	ldr	r3, [r7, #12]
 8024de2:	3304      	adds	r3, #4
  return etharp_raw(netif, (struct eth_addr *)netif->hwaddr, hw_dst_addr,
 8024de4:	2201      	movs	r2, #1
 8024de6:	9203      	str	r2, [sp, #12]
 8024de8:	68ba      	ldr	r2, [r7, #8]
 8024dea:	9202      	str	r2, [sp, #8]
 8024dec:	4a06      	ldr	r2, [pc, #24]	@ (8024e08 <etharp_request_dst+0x40>)
 8024dee:	9201      	str	r2, [sp, #4]
 8024df0:	9300      	str	r3, [sp, #0]
 8024df2:	4603      	mov	r3, r0
 8024df4:	687a      	ldr	r2, [r7, #4]
 8024df6:	68f8      	ldr	r0, [r7, #12]
 8024df8:	f7ff ff5a 	bl	8024cb0 <etharp_raw>
 8024dfc:	4603      	mov	r3, r0
                    ipaddr, ARP_REQUEST);
}
 8024dfe:	4618      	mov	r0, r3
 8024e00:	3710      	adds	r7, #16
 8024e02:	46bd      	mov	sp, r7
 8024e04:	bd80      	pop	{r7, pc}
 8024e06:	bf00      	nop
 8024e08:	08031504 	.word	0x08031504

08024e0c <etharp_request>:
 *         ERR_MEM if the ARP packet couldn't be allocated
 *         any other err_t on failure
 */
err_t
etharp_request(struct netif *netif, const ip4_addr_t *ipaddr)
{
 8024e0c:	b580      	push	{r7, lr}
 8024e0e:	b082      	sub	sp, #8
 8024e10:	af00      	add	r7, sp, #0
 8024e12:	6078      	str	r0, [r7, #4]
 8024e14:	6039      	str	r1, [r7, #0]
  LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_request: sending ARP request.\n"));
  return etharp_request_dst(netif, ipaddr, &ethbroadcast);
 8024e16:	4a05      	ldr	r2, [pc, #20]	@ (8024e2c <etharp_request+0x20>)
 8024e18:	6839      	ldr	r1, [r7, #0]
 8024e1a:	6878      	ldr	r0, [r7, #4]
 8024e1c:	f7ff ffd4 	bl	8024dc8 <etharp_request_dst>
 8024e20:	4603      	mov	r3, r0
}
 8024e22:	4618      	mov	r0, r3
 8024e24:	3708      	adds	r7, #8
 8024e26:	46bd      	mov	sp, r7
 8024e28:	bd80      	pop	{r7, pc}
 8024e2a:	bf00      	nop
 8024e2c:	080314fc 	.word	0x080314fc

08024e30 <icmp_input>:
 * @param p the icmp echo request packet, p->payload pointing to the icmp header
 * @param inp the netif on which this packet was received
 */
void
icmp_input(struct pbuf *p, struct netif *inp)
{
 8024e30:	b580      	push	{r7, lr}
 8024e32:	b08e      	sub	sp, #56	@ 0x38
 8024e34:	af04      	add	r7, sp, #16
 8024e36:	6078      	str	r0, [r7, #4]
 8024e38:	6039      	str	r1, [r7, #0]
  const ip4_addr_t *src;

  ICMP_STATS_INC(icmp.recv);
  MIB2_STATS_INC(mib2.icmpinmsgs);

  iphdr_in = ip4_current_header();
 8024e3a:	4b89      	ldr	r3, [pc, #548]	@ (8025060 <icmp_input+0x230>)
 8024e3c:	689b      	ldr	r3, [r3, #8]
 8024e3e:	627b      	str	r3, [r7, #36]	@ 0x24
  hlen = IPH_HL_BYTES(iphdr_in);
 8024e40:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8024e42:	781b      	ldrb	r3, [r3, #0]
 8024e44:	f003 030f 	and.w	r3, r3, #15
 8024e48:	b2db      	uxtb	r3, r3
 8024e4a:	009b      	lsls	r3, r3, #2
 8024e4c:	b2db      	uxtb	r3, r3
 8024e4e:	847b      	strh	r3, [r7, #34]	@ 0x22
  if (hlen < IP_HLEN) {
 8024e50:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 8024e52:	2b13      	cmp	r3, #19
 8024e54:	f240 80ed 	bls.w	8025032 <icmp_input+0x202>
    LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: short IP header (%"S16_F" bytes) received\n", hlen));
    goto lenerr;
  }
  if (p->len < sizeof(u16_t) * 2) {
 8024e58:	687b      	ldr	r3, [r7, #4]
 8024e5a:	895b      	ldrh	r3, [r3, #10]
 8024e5c:	2b03      	cmp	r3, #3
 8024e5e:	f240 80ea 	bls.w	8025036 <icmp_input+0x206>
    LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: short ICMP (%"U16_F" bytes) received\n", p->tot_len));
    goto lenerr;
  }

  type = *((u8_t *)p->payload);
 8024e62:	687b      	ldr	r3, [r7, #4]
 8024e64:	685b      	ldr	r3, [r3, #4]
 8024e66:	781b      	ldrb	r3, [r3, #0]
 8024e68:	f887 3021 	strb.w	r3, [r7, #33]	@ 0x21
#ifdef LWIP_DEBUG
  code = *(((u8_t *)p->payload) + 1);
 8024e6c:	687b      	ldr	r3, [r7, #4]
 8024e6e:	685b      	ldr	r3, [r3, #4]
 8024e70:	785b      	ldrb	r3, [r3, #1]
 8024e72:	f887 3020 	strb.w	r3, [r7, #32]
  /* if debug is enabled but debug statement below is somehow disabled: */
  LWIP_UNUSED_ARG(code);
#endif /* LWIP_DEBUG */
  switch (type) {
 8024e76:	f897 3021 	ldrb.w	r3, [r7, #33]	@ 0x21
 8024e7a:	2b00      	cmp	r3, #0
 8024e7c:	f000 80d2 	beq.w	8025024 <icmp_input+0x1f4>
 8024e80:	2b08      	cmp	r3, #8
 8024e82:	f040 80d2 	bne.w	802502a <icmp_input+0x1fa>
         (as obviously, an echo request has been sent, too). */
      MIB2_STATS_INC(mib2.icmpinechoreps);
      break;
    case ICMP_ECHO:
      MIB2_STATS_INC(mib2.icmpinechos);
      src = ip4_current_dest_addr();
 8024e86:	4b77      	ldr	r3, [pc, #476]	@ (8025064 <icmp_input+0x234>)
 8024e88:	61fb      	str	r3, [r7, #28]
      /* multicast destination address? */
      if (ip4_addr_ismulticast(ip4_current_dest_addr())) {
 8024e8a:	4b75      	ldr	r3, [pc, #468]	@ (8025060 <icmp_input+0x230>)
 8024e8c:	695b      	ldr	r3, [r3, #20]
 8024e8e:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8024e92:	2be0      	cmp	r3, #224	@ 0xe0
 8024e94:	f000 80d6 	beq.w	8025044 <icmp_input+0x214>
        LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: Not echoing to multicast pings\n"));
        goto icmperr;
#endif /* LWIP_MULTICAST_PING */
      }
      /* broadcast destination address? */
      if (ip4_addr_isbroadcast(ip4_current_dest_addr(), ip_current_netif())) {
 8024e98:	4b71      	ldr	r3, [pc, #452]	@ (8025060 <icmp_input+0x230>)
 8024e9a:	695b      	ldr	r3, [r3, #20]
 8024e9c:	4a70      	ldr	r2, [pc, #448]	@ (8025060 <icmp_input+0x230>)
 8024e9e:	6812      	ldr	r2, [r2, #0]
 8024ea0:	4611      	mov	r1, r2
 8024ea2:	4618      	mov	r0, r3
 8024ea4:	f000 fc34 	bl	8025710 <ip4_addr_isbroadcast_u32>
 8024ea8:	4603      	mov	r3, r0
 8024eaa:	2b00      	cmp	r3, #0
 8024eac:	f040 80cc 	bne.w	8025048 <icmp_input+0x218>
        LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: Not echoing to broadcast pings\n"));
        goto icmperr;
#endif /* LWIP_BROADCAST_PING */
      }
      LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: ping\n"));
      if (p->tot_len < sizeof(struct icmp_echo_hdr)) {
 8024eb0:	687b      	ldr	r3, [r7, #4]
 8024eb2:	891b      	ldrh	r3, [r3, #8]
 8024eb4:	2b07      	cmp	r3, #7
 8024eb6:	f240 80c0 	bls.w	802503a <icmp_input+0x20a>
        LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: bad ICMP echo received\n"));
        goto lenerr;
      }
#if CHECKSUM_CHECK_ICMP
      IF__NETIF_CHECKSUM_ENABLED(inp, NETIF_CHECKSUM_CHECK_ICMP) {
        if (inet_chksum_pbuf(p) != 0) {
 8024eba:	6878      	ldr	r0, [r7, #4]
 8024ebc:	f7f4 fac1 	bl	8019442 <inet_chksum_pbuf>
 8024ec0:	4603      	mov	r3, r0
 8024ec2:	2b00      	cmp	r3, #0
 8024ec4:	d003      	beq.n	8024ece <icmp_input+0x9e>
          LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: checksum failed for received ICMP echo\n"));
          pbuf_free(p);
 8024ec6:	6878      	ldr	r0, [r7, #4]
 8024ec8:	f7f5 ff00 	bl	801accc <pbuf_free>
          ICMP_STATS_INC(icmp.chkerr);
          MIB2_STATS_INC(mib2.icmpinerrors);
          return;
 8024ecc:	e0c5      	b.n	802505a <icmp_input+0x22a>
        }
      }
#endif
#if LWIP_ICMP_ECHO_CHECK_INPUT_PBUF_LEN
      if (pbuf_add_header(p, hlen + PBUF_LINK_HLEN + PBUF_LINK_ENCAPSULATION_HLEN)) {
 8024ece:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 8024ed0:	330e      	adds	r3, #14
 8024ed2:	4619      	mov	r1, r3
 8024ed4:	6878      	ldr	r0, [r7, #4]
 8024ed6:	f7f5 fe31 	bl	801ab3c <pbuf_add_header>
 8024eda:	4603      	mov	r3, r0
 8024edc:	2b00      	cmp	r3, #0
 8024ede:	d04b      	beq.n	8024f78 <icmp_input+0x148>
        /* p is not big enough to contain link headers
         * allocate a new one and copy p into it
         */
        struct pbuf *r;
        u16_t alloc_len = (u16_t)(p->tot_len + hlen);
 8024ee0:	687b      	ldr	r3, [r7, #4]
 8024ee2:	891a      	ldrh	r2, [r3, #8]
 8024ee4:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 8024ee6:	4413      	add	r3, r2
 8024ee8:	837b      	strh	r3, [r7, #26]
        if (alloc_len < p->tot_len) {
 8024eea:	687b      	ldr	r3, [r7, #4]
 8024eec:	891b      	ldrh	r3, [r3, #8]
 8024eee:	8b7a      	ldrh	r2, [r7, #26]
 8024ef0:	429a      	cmp	r2, r3
 8024ef2:	f0c0 80ab 	bcc.w	802504c <icmp_input+0x21c>
          LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: allocating new pbuf failed (tot_len overflow)\n"));
          goto icmperr;
        }
        /* allocate new packet buffer with space for link headers */
        r = pbuf_alloc(PBUF_LINK, alloc_len, PBUF_RAM);
 8024ef6:	8b7b      	ldrh	r3, [r7, #26]
 8024ef8:	f44f 7220 	mov.w	r2, #640	@ 0x280
 8024efc:	4619      	mov	r1, r3
 8024efe:	200e      	movs	r0, #14
 8024f00:	f7f5 fbce 	bl	801a6a0 <pbuf_alloc>
 8024f04:	6178      	str	r0, [r7, #20]
        if (r == NULL) {
 8024f06:	697b      	ldr	r3, [r7, #20]
 8024f08:	2b00      	cmp	r3, #0
 8024f0a:	f000 80a1 	beq.w	8025050 <icmp_input+0x220>
          LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: allocating new pbuf failed\n"));
          goto icmperr;
        }
        if (r->len < hlen + sizeof(struct icmp_echo_hdr)) {
 8024f0e:	697b      	ldr	r3, [r7, #20]
 8024f10:	895b      	ldrh	r3, [r3, #10]
 8024f12:	461a      	mov	r2, r3
 8024f14:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 8024f16:	3308      	adds	r3, #8
 8024f18:	429a      	cmp	r2, r3
 8024f1a:	d203      	bcs.n	8024f24 <icmp_input+0xf4>
          LWIP_DEBUGF(ICMP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("first pbuf cannot hold the ICMP header"));
          pbuf_free(r);
 8024f1c:	6978      	ldr	r0, [r7, #20]
 8024f1e:	f7f5 fed5 	bl	801accc <pbuf_free>
          goto icmperr;
 8024f22:	e096      	b.n	8025052 <icmp_input+0x222>
        }
        /* copy the ip header */
        MEMCPY(r->payload, iphdr_in, hlen);
 8024f24:	697b      	ldr	r3, [r7, #20]
 8024f26:	685b      	ldr	r3, [r3, #4]
 8024f28:	8c7a      	ldrh	r2, [r7, #34]	@ 0x22
 8024f2a:	6a79      	ldr	r1, [r7, #36]	@ 0x24
 8024f2c:	4618      	mov	r0, r3
 8024f2e:	f005 fbce 	bl	802a6ce <memcpy>
        /* switch r->payload back to icmp header (cannot fail) */
        if (pbuf_remove_header(r, hlen)) {
 8024f32:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 8024f34:	4619      	mov	r1, r3
 8024f36:	6978      	ldr	r0, [r7, #20]
 8024f38:	f7f5 fe10 	bl	801ab5c <pbuf_remove_header>
 8024f3c:	4603      	mov	r3, r0
 8024f3e:	2b00      	cmp	r3, #0
 8024f40:	d009      	beq.n	8024f56 <icmp_input+0x126>
          LWIP_ASSERT("icmp_input: moving r->payload to icmp header failed\n", 0);
 8024f42:	4b49      	ldr	r3, [pc, #292]	@ (8025068 <icmp_input+0x238>)
 8024f44:	22b6      	movs	r2, #182	@ 0xb6
 8024f46:	4949      	ldr	r1, [pc, #292]	@ (802506c <icmp_input+0x23c>)
 8024f48:	4849      	ldr	r0, [pc, #292]	@ (8025070 <icmp_input+0x240>)
 8024f4a:	f005 f937 	bl	802a1bc <iprintf>
          pbuf_free(r);
 8024f4e:	6978      	ldr	r0, [r7, #20]
 8024f50:	f7f5 febc 	bl	801accc <pbuf_free>
          goto icmperr;
 8024f54:	e07d      	b.n	8025052 <icmp_input+0x222>
        }
        /* copy the rest of the packet without ip header */
        if (pbuf_copy(r, p) != ERR_OK) {
 8024f56:	6879      	ldr	r1, [r7, #4]
 8024f58:	6978      	ldr	r0, [r7, #20]
 8024f5a:	f7f5 ffeb 	bl	801af34 <pbuf_copy>
 8024f5e:	4603      	mov	r3, r0
 8024f60:	2b00      	cmp	r3, #0
 8024f62:	d003      	beq.n	8024f6c <icmp_input+0x13c>
          LWIP_DEBUGF(ICMP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("icmp_input: copying to new pbuf failed"));
          pbuf_free(r);
 8024f64:	6978      	ldr	r0, [r7, #20]
 8024f66:	f7f5 feb1 	bl	801accc <pbuf_free>
          goto icmperr;
 8024f6a:	e072      	b.n	8025052 <icmp_input+0x222>
        }
        /* free the original p */
        pbuf_free(p);
 8024f6c:	6878      	ldr	r0, [r7, #4]
 8024f6e:	f7f5 fead 	bl	801accc <pbuf_free>
        /* we now have an identical copy of p that has room for link headers */
        p = r;
 8024f72:	697b      	ldr	r3, [r7, #20]
 8024f74:	607b      	str	r3, [r7, #4]
 8024f76:	e00f      	b.n	8024f98 <icmp_input+0x168>
      } else {
        /* restore p->payload to point to icmp header (cannot fail) */
        if (pbuf_remove_header(p, hlen + PBUF_LINK_HLEN + PBUF_LINK_ENCAPSULATION_HLEN)) {
 8024f78:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 8024f7a:	330e      	adds	r3, #14
 8024f7c:	4619      	mov	r1, r3
 8024f7e:	6878      	ldr	r0, [r7, #4]
 8024f80:	f7f5 fdec 	bl	801ab5c <pbuf_remove_header>
 8024f84:	4603      	mov	r3, r0
 8024f86:	2b00      	cmp	r3, #0
 8024f88:	d006      	beq.n	8024f98 <icmp_input+0x168>
          LWIP_ASSERT("icmp_input: restoring original p->payload failed\n", 0);
 8024f8a:	4b37      	ldr	r3, [pc, #220]	@ (8025068 <icmp_input+0x238>)
 8024f8c:	22c7      	movs	r2, #199	@ 0xc7
 8024f8e:	4939      	ldr	r1, [pc, #228]	@ (8025074 <icmp_input+0x244>)
 8024f90:	4837      	ldr	r0, [pc, #220]	@ (8025070 <icmp_input+0x240>)
 8024f92:	f005 f913 	bl	802a1bc <iprintf>
          goto icmperr;
 8024f96:	e05c      	b.n	8025052 <icmp_input+0x222>
      }
#endif /* LWIP_ICMP_ECHO_CHECK_INPUT_PBUF_LEN */
      /* At this point, all checks are OK. */
      /* We generate an answer by switching the dest and src ip addresses,
       * setting the icmp type to ECHO_RESPONSE and updating the checksum. */
      iecho = (struct icmp_echo_hdr *)p->payload;
 8024f98:	687b      	ldr	r3, [r7, #4]
 8024f9a:	685b      	ldr	r3, [r3, #4]
 8024f9c:	613b      	str	r3, [r7, #16]
      if (pbuf_add_header(p, hlen)) {
 8024f9e:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 8024fa0:	4619      	mov	r1, r3
 8024fa2:	6878      	ldr	r0, [r7, #4]
 8024fa4:	f7f5 fdca 	bl	801ab3c <pbuf_add_header>
 8024fa8:	4603      	mov	r3, r0
 8024faa:	2b00      	cmp	r3, #0
 8024fac:	d13c      	bne.n	8025028 <icmp_input+0x1f8>
        LWIP_DEBUGF(ICMP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("Can't move over header in packet"));
      } else {
        err_t ret;
        struct ip_hdr *iphdr = (struct ip_hdr *)p->payload;
 8024fae:	687b      	ldr	r3, [r7, #4]
 8024fb0:	685b      	ldr	r3, [r3, #4]
 8024fb2:	60fb      	str	r3, [r7, #12]
        ip4_addr_copy(iphdr->src, *src);
 8024fb4:	69fb      	ldr	r3, [r7, #28]
 8024fb6:	681a      	ldr	r2, [r3, #0]
 8024fb8:	68fb      	ldr	r3, [r7, #12]
 8024fba:	60da      	str	r2, [r3, #12]
        ip4_addr_copy(iphdr->dest, *ip4_current_src_addr());
 8024fbc:	4b28      	ldr	r3, [pc, #160]	@ (8025060 <icmp_input+0x230>)
 8024fbe:	691a      	ldr	r2, [r3, #16]
 8024fc0:	68fb      	ldr	r3, [r7, #12]
 8024fc2:	611a      	str	r2, [r3, #16]
        ICMPH_TYPE_SET(iecho, ICMP_ER);
 8024fc4:	693b      	ldr	r3, [r7, #16]
 8024fc6:	2200      	movs	r2, #0
 8024fc8:	701a      	strb	r2, [r3, #0]
#if CHECKSUM_GEN_ICMP
        IF__NETIF_CHECKSUM_ENABLED(inp, NETIF_CHECKSUM_GEN_ICMP) {
          /* adjust the checksum */
          if (iecho->chksum > PP_HTONS(0xffffU - (ICMP_ECHO << 8))) {
 8024fca:	693b      	ldr	r3, [r7, #16]
 8024fcc:	885b      	ldrh	r3, [r3, #2]
 8024fce:	b29b      	uxth	r3, r3
 8024fd0:	f64f 72f7 	movw	r2, #65527	@ 0xfff7
 8024fd4:	4293      	cmp	r3, r2
 8024fd6:	d907      	bls.n	8024fe8 <icmp_input+0x1b8>
            iecho->chksum = (u16_t)(iecho->chksum + PP_HTONS((u16_t)(ICMP_ECHO << 8)) + 1);
 8024fd8:	693b      	ldr	r3, [r7, #16]
 8024fda:	885b      	ldrh	r3, [r3, #2]
 8024fdc:	b29b      	uxth	r3, r3
 8024fde:	3309      	adds	r3, #9
 8024fe0:	b29a      	uxth	r2, r3
 8024fe2:	693b      	ldr	r3, [r7, #16]
 8024fe4:	805a      	strh	r2, [r3, #2]
 8024fe6:	e006      	b.n	8024ff6 <icmp_input+0x1c6>
          } else {
            iecho->chksum = (u16_t)(iecho->chksum + PP_HTONS(ICMP_ECHO << 8));
 8024fe8:	693b      	ldr	r3, [r7, #16]
 8024fea:	885b      	ldrh	r3, [r3, #2]
 8024fec:	b29b      	uxth	r3, r3
 8024fee:	3308      	adds	r3, #8
 8024ff0:	b29a      	uxth	r2, r3
 8024ff2:	693b      	ldr	r3, [r7, #16]
 8024ff4:	805a      	strh	r2, [r3, #2]
#else /* CHECKSUM_GEN_ICMP */
        iecho->chksum = 0;
#endif /* CHECKSUM_GEN_ICMP */

        /* Set the correct TTL and recalculate the header checksum. */
        IPH_TTL_SET(iphdr, ICMP_TTL);
 8024ff6:	68fb      	ldr	r3, [r7, #12]
 8024ff8:	22ff      	movs	r2, #255	@ 0xff
 8024ffa:	721a      	strb	r2, [r3, #8]
        IPH_CHKSUM_SET(iphdr, 0);
 8024ffc:	68fb      	ldr	r3, [r7, #12]
 8024ffe:	2200      	movs	r2, #0
 8025000:	729a      	strb	r2, [r3, #10]
 8025002:	2200      	movs	r2, #0
 8025004:	72da      	strb	r2, [r3, #11]
        MIB2_STATS_INC(mib2.icmpoutmsgs);
        /* increase number of echo replies attempted to send */
        MIB2_STATS_INC(mib2.icmpoutechoreps);

        /* send an ICMP packet */
        ret = ip4_output_if(p, src, LWIP_IP_HDRINCL,
 8025006:	683b      	ldr	r3, [r7, #0]
 8025008:	9302      	str	r3, [sp, #8]
 802500a:	2301      	movs	r3, #1
 802500c:	9301      	str	r3, [sp, #4]
 802500e:	2300      	movs	r3, #0
 8025010:	9300      	str	r3, [sp, #0]
 8025012:	23ff      	movs	r3, #255	@ 0xff
 8025014:	2200      	movs	r2, #0
 8025016:	69f9      	ldr	r1, [r7, #28]
 8025018:	6878      	ldr	r0, [r7, #4]
 802501a:	f000 fa9f 	bl	802555c <ip4_output_if>
 802501e:	4603      	mov	r3, r0
 8025020:	72fb      	strb	r3, [r7, #11]
                            ICMP_TTL, 0, IP_PROTO_ICMP, inp);
        if (ret != ERR_OK) {
          LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: ip_output_if returned an error: %s\n", lwip_strerr(ret)));
        }
      }
      break;
 8025022:	e001      	b.n	8025028 <icmp_input+0x1f8>
      break;
 8025024:	bf00      	nop
 8025026:	e000      	b.n	802502a <icmp_input+0x1fa>
      break;
 8025028:	bf00      	nop
      LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: ICMP type %"S16_F" code %"S16_F" not supported.\n",
                               (s16_t)type, (s16_t)code));
      ICMP_STATS_INC(icmp.proterr);
      ICMP_STATS_INC(icmp.drop);
  }
  pbuf_free(p);
 802502a:	6878      	ldr	r0, [r7, #4]
 802502c:	f7f5 fe4e 	bl	801accc <pbuf_free>
  return;
 8025030:	e013      	b.n	802505a <icmp_input+0x22a>
    goto lenerr;
 8025032:	bf00      	nop
 8025034:	e002      	b.n	802503c <icmp_input+0x20c>
    goto lenerr;
 8025036:	bf00      	nop
 8025038:	e000      	b.n	802503c <icmp_input+0x20c>
        goto lenerr;
 802503a:	bf00      	nop
lenerr:
  pbuf_free(p);
 802503c:	6878      	ldr	r0, [r7, #4]
 802503e:	f7f5 fe45 	bl	801accc <pbuf_free>
  ICMP_STATS_INC(icmp.lenerr);
  MIB2_STATS_INC(mib2.icmpinerrors);
  return;
 8025042:	e00a      	b.n	802505a <icmp_input+0x22a>
        goto icmperr;
 8025044:	bf00      	nop
 8025046:	e004      	b.n	8025052 <icmp_input+0x222>
        goto icmperr;
 8025048:	bf00      	nop
 802504a:	e002      	b.n	8025052 <icmp_input+0x222>
          goto icmperr;
 802504c:	bf00      	nop
 802504e:	e000      	b.n	8025052 <icmp_input+0x222>
          goto icmperr;
 8025050:	bf00      	nop
#if LWIP_ICMP_ECHO_CHECK_INPUT_PBUF_LEN || !LWIP_MULTICAST_PING || !LWIP_BROADCAST_PING
icmperr:
  pbuf_free(p);
 8025052:	6878      	ldr	r0, [r7, #4]
 8025054:	f7f5 fe3a 	bl	801accc <pbuf_free>
  ICMP_STATS_INC(icmp.err);
  MIB2_STATS_INC(mib2.icmpinerrors);
  return;
 8025058:	bf00      	nop
#endif /* LWIP_ICMP_ECHO_CHECK_INPUT_PBUF_LEN || !LWIP_MULTICAST_PING || !LWIP_BROADCAST_PING */
}
 802505a:	3728      	adds	r7, #40	@ 0x28
 802505c:	46bd      	mov	sp, r7
 802505e:	bd80      	pop	{r7, pc}
 8025060:	24024408 	.word	0x24024408
 8025064:	2402441c 	.word	0x2402441c
 8025068:	08030d00 	.word	0x08030d00
 802506c:	08030d38 	.word	0x08030d38
 8025070:	08030d70 	.word	0x08030d70
 8025074:	08030d98 	.word	0x08030d98

08025078 <icmp_dest_unreach>:
 *          p->payload pointing to the IP header
 * @param t type of the 'unreachable' packet
 */
void
icmp_dest_unreach(struct pbuf *p, enum icmp_dur_type t)
{
 8025078:	b580      	push	{r7, lr}
 802507a:	b082      	sub	sp, #8
 802507c:	af00      	add	r7, sp, #0
 802507e:	6078      	str	r0, [r7, #4]
 8025080:	460b      	mov	r3, r1
 8025082:	70fb      	strb	r3, [r7, #3]
  MIB2_STATS_INC(mib2.icmpoutdestunreachs);
  icmp_send_response(p, ICMP_DUR, t);
 8025084:	78fb      	ldrb	r3, [r7, #3]
 8025086:	461a      	mov	r2, r3
 8025088:	2103      	movs	r1, #3
 802508a:	6878      	ldr	r0, [r7, #4]
 802508c:	f000 f814 	bl	80250b8 <icmp_send_response>
}
 8025090:	bf00      	nop
 8025092:	3708      	adds	r7, #8
 8025094:	46bd      	mov	sp, r7
 8025096:	bd80      	pop	{r7, pc}

08025098 <icmp_time_exceeded>:
 *          p->payload pointing to the IP header
 * @param t type of the 'time exceeded' packet
 */
void
icmp_time_exceeded(struct pbuf *p, enum icmp_te_type t)
{
 8025098:	b580      	push	{r7, lr}
 802509a:	b082      	sub	sp, #8
 802509c:	af00      	add	r7, sp, #0
 802509e:	6078      	str	r0, [r7, #4]
 80250a0:	460b      	mov	r3, r1
 80250a2:	70fb      	strb	r3, [r7, #3]
  MIB2_STATS_INC(mib2.icmpouttimeexcds);
  icmp_send_response(p, ICMP_TE, t);
 80250a4:	78fb      	ldrb	r3, [r7, #3]
 80250a6:	461a      	mov	r2, r3
 80250a8:	210b      	movs	r1, #11
 80250aa:	6878      	ldr	r0, [r7, #4]
 80250ac:	f000 f804 	bl	80250b8 <icmp_send_response>
}
 80250b0:	bf00      	nop
 80250b2:	3708      	adds	r7, #8
 80250b4:	46bd      	mov	sp, r7
 80250b6:	bd80      	pop	{r7, pc}

080250b8 <icmp_send_response>:
 * @param type Type of the ICMP header
 * @param code Code of the ICMP header
 */
static void
icmp_send_response(struct pbuf *p, u8_t type, u8_t code)
{
 80250b8:	b580      	push	{r7, lr}
 80250ba:	b08c      	sub	sp, #48	@ 0x30
 80250bc:	af04      	add	r7, sp, #16
 80250be:	6078      	str	r0, [r7, #4]
 80250c0:	460b      	mov	r3, r1
 80250c2:	70fb      	strb	r3, [r7, #3]
 80250c4:	4613      	mov	r3, r2
 80250c6:	70bb      	strb	r3, [r7, #2]

  /* increase number of messages attempted to send */
  MIB2_STATS_INC(mib2.icmpoutmsgs);

  /* ICMP header + IP header + 8 bytes of data */
  q = pbuf_alloc(PBUF_IP, sizeof(struct icmp_echo_hdr) + IP_HLEN + ICMP_DEST_UNREACH_DATASIZE,
 80250c8:	f44f 7220 	mov.w	r2, #640	@ 0x280
 80250cc:	2124      	movs	r1, #36	@ 0x24
 80250ce:	2022      	movs	r0, #34	@ 0x22
 80250d0:	f7f5 fae6 	bl	801a6a0 <pbuf_alloc>
 80250d4:	61b8      	str	r0, [r7, #24]
                 PBUF_RAM);
  if (q == NULL) {
 80250d6:	69bb      	ldr	r3, [r7, #24]
 80250d8:	2b00      	cmp	r3, #0
 80250da:	d056      	beq.n	802518a <icmp_send_response+0xd2>
    LWIP_DEBUGF(ICMP_DEBUG, ("icmp_time_exceeded: failed to allocate pbuf for ICMP packet.\n"));
    MIB2_STATS_INC(mib2.icmpouterrors);
    return;
  }
  LWIP_ASSERT("check that first pbuf can hold icmp message",
 80250dc:	69bb      	ldr	r3, [r7, #24]
 80250de:	895b      	ldrh	r3, [r3, #10]
 80250e0:	2b23      	cmp	r3, #35	@ 0x23
 80250e2:	d806      	bhi.n	80250f2 <icmp_send_response+0x3a>
 80250e4:	4b2b      	ldr	r3, [pc, #172]	@ (8025194 <icmp_send_response+0xdc>)
 80250e6:	f44f 72b4 	mov.w	r2, #360	@ 0x168
 80250ea:	492b      	ldr	r1, [pc, #172]	@ (8025198 <icmp_send_response+0xe0>)
 80250ec:	482b      	ldr	r0, [pc, #172]	@ (802519c <icmp_send_response+0xe4>)
 80250ee:	f005 f865 	bl	802a1bc <iprintf>
              (q->len >= (sizeof(struct icmp_echo_hdr) + IP_HLEN + ICMP_DEST_UNREACH_DATASIZE)));

  iphdr = (struct ip_hdr *)p->payload;
 80250f2:	687b      	ldr	r3, [r7, #4]
 80250f4:	685b      	ldr	r3, [r3, #4]
 80250f6:	617b      	str	r3, [r7, #20]
  ip4_addr_debug_print_val(ICMP_DEBUG, iphdr->src);
  LWIP_DEBUGF(ICMP_DEBUG, (" to "));
  ip4_addr_debug_print_val(ICMP_DEBUG, iphdr->dest);
  LWIP_DEBUGF(ICMP_DEBUG, ("\n"));

  icmphdr = (struct icmp_echo_hdr *)q->payload;
 80250f8:	69bb      	ldr	r3, [r7, #24]
 80250fa:	685b      	ldr	r3, [r3, #4]
 80250fc:	613b      	str	r3, [r7, #16]
  icmphdr->type = type;
 80250fe:	693b      	ldr	r3, [r7, #16]
 8025100:	78fa      	ldrb	r2, [r7, #3]
 8025102:	701a      	strb	r2, [r3, #0]
  icmphdr->code = code;
 8025104:	693b      	ldr	r3, [r7, #16]
 8025106:	78ba      	ldrb	r2, [r7, #2]
 8025108:	705a      	strb	r2, [r3, #1]
  icmphdr->id = 0;
 802510a:	693b      	ldr	r3, [r7, #16]
 802510c:	2200      	movs	r2, #0
 802510e:	711a      	strb	r2, [r3, #4]
 8025110:	2200      	movs	r2, #0
 8025112:	715a      	strb	r2, [r3, #5]
  icmphdr->seqno = 0;
 8025114:	693b      	ldr	r3, [r7, #16]
 8025116:	2200      	movs	r2, #0
 8025118:	719a      	strb	r2, [r3, #6]
 802511a:	2200      	movs	r2, #0
 802511c:	71da      	strb	r2, [r3, #7]

  /* copy fields from original packet */
  SMEMCPY((u8_t *)q->payload + sizeof(struct icmp_echo_hdr), (u8_t *)p->payload,
 802511e:	69bb      	ldr	r3, [r7, #24]
 8025120:	685b      	ldr	r3, [r3, #4]
 8025122:	f103 0008 	add.w	r0, r3, #8
 8025126:	687b      	ldr	r3, [r7, #4]
 8025128:	685b      	ldr	r3, [r3, #4]
 802512a:	221c      	movs	r2, #28
 802512c:	4619      	mov	r1, r3
 802512e:	f005 face 	bl	802a6ce <memcpy>
          IP_HLEN + ICMP_DEST_UNREACH_DATASIZE);

  ip4_addr_copy(iphdr_src, iphdr->src);
 8025132:	697b      	ldr	r3, [r7, #20]
 8025134:	68db      	ldr	r3, [r3, #12]
 8025136:	60fb      	str	r3, [r7, #12]
    ip4_addr_t iphdr_dst;
    ip4_addr_copy(iphdr_dst, iphdr->dest);
    netif = ip4_route_src(&iphdr_dst, &iphdr_src);
  }
#else
  netif = ip4_route(&iphdr_src);
 8025138:	f107 030c 	add.w	r3, r7, #12
 802513c:	4618      	mov	r0, r3
 802513e:	f000 f82f 	bl	80251a0 <ip4_route>
 8025142:	61f8      	str	r0, [r7, #28]
#endif
  if (netif != NULL) {
 8025144:	69fb      	ldr	r3, [r7, #28]
 8025146:	2b00      	cmp	r3, #0
 8025148:	d01b      	beq.n	8025182 <icmp_send_response+0xca>
    /* calculate checksum */
    icmphdr->chksum = 0;
 802514a:	693b      	ldr	r3, [r7, #16]
 802514c:	2200      	movs	r2, #0
 802514e:	709a      	strb	r2, [r3, #2]
 8025150:	2200      	movs	r2, #0
 8025152:	70da      	strb	r2, [r3, #3]
#if CHECKSUM_GEN_ICMP
    IF__NETIF_CHECKSUM_ENABLED(netif, NETIF_CHECKSUM_GEN_ICMP) {
      icmphdr->chksum = inet_chksum(icmphdr, q->len);
 8025154:	69bb      	ldr	r3, [r7, #24]
 8025156:	895b      	ldrh	r3, [r3, #10]
 8025158:	4619      	mov	r1, r3
 802515a:	6938      	ldr	r0, [r7, #16]
 802515c:	f7f4 f95f 	bl	801941e <inet_chksum>
 8025160:	4603      	mov	r3, r0
 8025162:	461a      	mov	r2, r3
 8025164:	693b      	ldr	r3, [r7, #16]
 8025166:	805a      	strh	r2, [r3, #2]
    }
#endif
    ICMP_STATS_INC(icmp.xmit);
    ip4_output_if(q, NULL, &iphdr_src, ICMP_TTL, 0, IP_PROTO_ICMP, netif);
 8025168:	f107 020c 	add.w	r2, r7, #12
 802516c:	69fb      	ldr	r3, [r7, #28]
 802516e:	9302      	str	r3, [sp, #8]
 8025170:	2301      	movs	r3, #1
 8025172:	9301      	str	r3, [sp, #4]
 8025174:	2300      	movs	r3, #0
 8025176:	9300      	str	r3, [sp, #0]
 8025178:	23ff      	movs	r3, #255	@ 0xff
 802517a:	2100      	movs	r1, #0
 802517c:	69b8      	ldr	r0, [r7, #24]
 802517e:	f000 f9ed 	bl	802555c <ip4_output_if>
  }
  pbuf_free(q);
 8025182:	69b8      	ldr	r0, [r7, #24]
 8025184:	f7f5 fda2 	bl	801accc <pbuf_free>
 8025188:	e000      	b.n	802518c <icmp_send_response+0xd4>
    return;
 802518a:	bf00      	nop
}
 802518c:	3720      	adds	r7, #32
 802518e:	46bd      	mov	sp, r7
 8025190:	bd80      	pop	{r7, pc}
 8025192:	bf00      	nop
 8025194:	08030d00 	.word	0x08030d00
 8025198:	08030dcc 	.word	0x08030dcc
 802519c:	08030d70 	.word	0x08030d70

080251a0 <ip4_route>:
 * @param dest the destination IP address for which to find the route
 * @return the netif on which to send to reach dest
 */
struct netif *
ip4_route(const ip4_addr_t *dest)
{
 80251a0:	b580      	push	{r7, lr}
 80251a2:	b084      	sub	sp, #16
 80251a4:	af00      	add	r7, sp, #0
 80251a6:	6078      	str	r0, [r7, #4]
#if !LWIP_SINGLE_NETIF
  struct netif *netif;

  LWIP_ASSERT_CORE_LOCKED();
 80251a8:	f7eb fc68 	bl	8010a7c <sys_check_core_locking>

  /* bug #54569: in case LWIP_SINGLE_NETIF=1 and LWIP_DEBUGF() disabled, the following loop is optimized away */
  LWIP_UNUSED_ARG(dest);

  /* iterate through netifs */
  NETIF_FOREACH(netif) {
 80251ac:	4b32      	ldr	r3, [pc, #200]	@ (8025278 <ip4_route+0xd8>)
 80251ae:	681b      	ldr	r3, [r3, #0]
 80251b0:	60fb      	str	r3, [r7, #12]
 80251b2:	e036      	b.n	8025222 <ip4_route+0x82>
    /* is the netif up, does it have a link and a valid address? */
    if (netif_is_up(netif) && netif_is_link_up(netif) && !ip4_addr_isany_val(*netif_ip4_addr(netif))) {
 80251b4:	68fb      	ldr	r3, [r7, #12]
 80251b6:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 80251ba:	f003 0301 	and.w	r3, r3, #1
 80251be:	b2db      	uxtb	r3, r3
 80251c0:	2b00      	cmp	r3, #0
 80251c2:	d02b      	beq.n	802521c <ip4_route+0x7c>
 80251c4:	68fb      	ldr	r3, [r7, #12]
 80251c6:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 80251ca:	089b      	lsrs	r3, r3, #2
 80251cc:	f003 0301 	and.w	r3, r3, #1
 80251d0:	b2db      	uxtb	r3, r3
 80251d2:	2b00      	cmp	r3, #0
 80251d4:	d022      	beq.n	802521c <ip4_route+0x7c>
 80251d6:	68fb      	ldr	r3, [r7, #12]
 80251d8:	3304      	adds	r3, #4
 80251da:	681b      	ldr	r3, [r3, #0]
 80251dc:	2b00      	cmp	r3, #0
 80251de:	d01d      	beq.n	802521c <ip4_route+0x7c>
      /* network mask matches? */
      if (ip4_addr_netcmp(dest, netif_ip4_addr(netif), netif_ip4_netmask(netif))) {
 80251e0:	687b      	ldr	r3, [r7, #4]
 80251e2:	681a      	ldr	r2, [r3, #0]
 80251e4:	68fb      	ldr	r3, [r7, #12]
 80251e6:	3304      	adds	r3, #4
 80251e8:	681b      	ldr	r3, [r3, #0]
 80251ea:	405a      	eors	r2, r3
 80251ec:	68fb      	ldr	r3, [r7, #12]
 80251ee:	3308      	adds	r3, #8
 80251f0:	681b      	ldr	r3, [r3, #0]
 80251f2:	4013      	ands	r3, r2
 80251f4:	2b00      	cmp	r3, #0
 80251f6:	d101      	bne.n	80251fc <ip4_route+0x5c>
        /* return netif on which to forward IP packet */
        return netif;
 80251f8:	68fb      	ldr	r3, [r7, #12]
 80251fa:	e038      	b.n	802526e <ip4_route+0xce>
      }
      /* gateway matches on a non broadcast interface? (i.e. peer in a point to point interface) */
      if (((netif->flags & NETIF_FLAG_BROADCAST) == 0) && ip4_addr_cmp(dest, netif_ip4_gw(netif))) {
 80251fc:	68fb      	ldr	r3, [r7, #12]
 80251fe:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 8025202:	f003 0302 	and.w	r3, r3, #2
 8025206:	2b00      	cmp	r3, #0
 8025208:	d108      	bne.n	802521c <ip4_route+0x7c>
 802520a:	687b      	ldr	r3, [r7, #4]
 802520c:	681a      	ldr	r2, [r3, #0]
 802520e:	68fb      	ldr	r3, [r7, #12]
 8025210:	330c      	adds	r3, #12
 8025212:	681b      	ldr	r3, [r3, #0]
 8025214:	429a      	cmp	r2, r3
 8025216:	d101      	bne.n	802521c <ip4_route+0x7c>
        /* return netif on which to forward IP packet */
        return netif;
 8025218:	68fb      	ldr	r3, [r7, #12]
 802521a:	e028      	b.n	802526e <ip4_route+0xce>
  NETIF_FOREACH(netif) {
 802521c:	68fb      	ldr	r3, [r7, #12]
 802521e:	681b      	ldr	r3, [r3, #0]
 8025220:	60fb      	str	r3, [r7, #12]
 8025222:	68fb      	ldr	r3, [r7, #12]
 8025224:	2b00      	cmp	r3, #0
 8025226:	d1c5      	bne.n	80251b4 <ip4_route+0x14>
    return netif;
  }
#endif
#endif /* !LWIP_SINGLE_NETIF */

  if ((netif_default == NULL) || !netif_is_up(netif_default) || !netif_is_link_up(netif_default) ||
 8025228:	4b14      	ldr	r3, [pc, #80]	@ (802527c <ip4_route+0xdc>)
 802522a:	681b      	ldr	r3, [r3, #0]
 802522c:	2b00      	cmp	r3, #0
 802522e:	d01a      	beq.n	8025266 <ip4_route+0xc6>
 8025230:	4b12      	ldr	r3, [pc, #72]	@ (802527c <ip4_route+0xdc>)
 8025232:	681b      	ldr	r3, [r3, #0]
 8025234:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 8025238:	f003 0301 	and.w	r3, r3, #1
 802523c:	2b00      	cmp	r3, #0
 802523e:	d012      	beq.n	8025266 <ip4_route+0xc6>
 8025240:	4b0e      	ldr	r3, [pc, #56]	@ (802527c <ip4_route+0xdc>)
 8025242:	681b      	ldr	r3, [r3, #0]
 8025244:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 8025248:	f003 0304 	and.w	r3, r3, #4
 802524c:	2b00      	cmp	r3, #0
 802524e:	d00a      	beq.n	8025266 <ip4_route+0xc6>
      ip4_addr_isany_val(*netif_ip4_addr(netif_default)) || ip4_addr_isloopback(dest)) {
 8025250:	4b0a      	ldr	r3, [pc, #40]	@ (802527c <ip4_route+0xdc>)
 8025252:	681b      	ldr	r3, [r3, #0]
 8025254:	3304      	adds	r3, #4
 8025256:	681b      	ldr	r3, [r3, #0]
  if ((netif_default == NULL) || !netif_is_up(netif_default) || !netif_is_link_up(netif_default) ||
 8025258:	2b00      	cmp	r3, #0
 802525a:	d004      	beq.n	8025266 <ip4_route+0xc6>
      ip4_addr_isany_val(*netif_ip4_addr(netif_default)) || ip4_addr_isloopback(dest)) {
 802525c:	687b      	ldr	r3, [r7, #4]
 802525e:	681b      	ldr	r3, [r3, #0]
 8025260:	b2db      	uxtb	r3, r3
 8025262:	2b7f      	cmp	r3, #127	@ 0x7f
 8025264:	d101      	bne.n	802526a <ip4_route+0xca>
       If this is not good enough for you, use LWIP_HOOK_IP4_ROUTE() */
    LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("ip4_route: No route to %"U16_F".%"U16_F".%"U16_F".%"U16_F"\n",
                ip4_addr1_16(dest), ip4_addr2_16(dest), ip4_addr3_16(dest), ip4_addr4_16(dest)));
    IP_STATS_INC(ip.rterr);
    MIB2_STATS_INC(mib2.ipoutnoroutes);
    return NULL;
 8025266:	2300      	movs	r3, #0
 8025268:	e001      	b.n	802526e <ip4_route+0xce>
  }

  return netif_default;
 802526a:	4b04      	ldr	r3, [pc, #16]	@ (802527c <ip4_route+0xdc>)
 802526c:	681b      	ldr	r3, [r3, #0]
}
 802526e:	4618      	mov	r0, r3
 8025270:	3710      	adds	r7, #16
 8025272:	46bd      	mov	sp, r7
 8025274:	bd80      	pop	{r7, pc}
 8025276:	bf00      	nop
 8025278:	2402af4c 	.word	0x2402af4c
 802527c:	2402af50 	.word	0x2402af50

08025280 <ip4_input_accept>:
#endif /* IP_FORWARD */

/** Return true if the current input packet should be accepted on this netif */
static int
ip4_input_accept(struct netif *netif)
{
 8025280:	b580      	push	{r7, lr}
 8025282:	b082      	sub	sp, #8
 8025284:	af00      	add	r7, sp, #0
 8025286:	6078      	str	r0, [r7, #4]
                         ip4_addr_get_u32(ip4_current_dest_addr()) & ip4_addr_get_u32(netif_ip4_netmask(netif)),
                         ip4_addr_get_u32(netif_ip4_addr(netif)) & ip4_addr_get_u32(netif_ip4_netmask(netif)),
                         ip4_addr_get_u32(ip4_current_dest_addr()) & ~ip4_addr_get_u32(netif_ip4_netmask(netif))));

  /* interface is up and configured? */
  if ((netif_is_up(netif)) && (!ip4_addr_isany_val(*netif_ip4_addr(netif)))) {
 8025288:	687b      	ldr	r3, [r7, #4]
 802528a:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 802528e:	f003 0301 	and.w	r3, r3, #1
 8025292:	b2db      	uxtb	r3, r3
 8025294:	2b00      	cmp	r3, #0
 8025296:	d016      	beq.n	80252c6 <ip4_input_accept+0x46>
 8025298:	687b      	ldr	r3, [r7, #4]
 802529a:	3304      	adds	r3, #4
 802529c:	681b      	ldr	r3, [r3, #0]
 802529e:	2b00      	cmp	r3, #0
 80252a0:	d011      	beq.n	80252c6 <ip4_input_accept+0x46>
    /* unicast to this interface address? */
    if (ip4_addr_cmp(ip4_current_dest_addr(), netif_ip4_addr(netif)) ||
 80252a2:	4b0b      	ldr	r3, [pc, #44]	@ (80252d0 <ip4_input_accept+0x50>)
 80252a4:	695a      	ldr	r2, [r3, #20]
 80252a6:	687b      	ldr	r3, [r7, #4]
 80252a8:	3304      	adds	r3, #4
 80252aa:	681b      	ldr	r3, [r3, #0]
 80252ac:	429a      	cmp	r2, r3
 80252ae:	d008      	beq.n	80252c2 <ip4_input_accept+0x42>
        /* or broadcast on this interface network address? */
        ip4_addr_isbroadcast(ip4_current_dest_addr(), netif)
 80252b0:	4b07      	ldr	r3, [pc, #28]	@ (80252d0 <ip4_input_accept+0x50>)
 80252b2:	695b      	ldr	r3, [r3, #20]
 80252b4:	6879      	ldr	r1, [r7, #4]
 80252b6:	4618      	mov	r0, r3
 80252b8:	f000 fa2a 	bl	8025710 <ip4_addr_isbroadcast_u32>
 80252bc:	4603      	mov	r3, r0
    if (ip4_addr_cmp(ip4_current_dest_addr(), netif_ip4_addr(netif)) ||
 80252be:	2b00      	cmp	r3, #0
 80252c0:	d001      	beq.n	80252c6 <ip4_input_accept+0x46>
#endif /* LWIP_NETIF_LOOPBACK && !LWIP_HAVE_LOOPIF */
       ) {
      LWIP_DEBUGF(IP_DEBUG, ("ip4_input: packet accepted on interface %c%c\n",
                             netif->name[0], netif->name[1]));
      /* accept on this netif */
      return 1;
 80252c2:	2301      	movs	r3, #1
 80252c4:	e000      	b.n	80252c8 <ip4_input_accept+0x48>
      /* accept on this netif */
      return 1;
    }
#endif /* LWIP_AUTOIP */
  }
  return 0;
 80252c6:	2300      	movs	r3, #0
}
 80252c8:	4618      	mov	r0, r3
 80252ca:	3708      	adds	r7, #8
 80252cc:	46bd      	mov	sp, r7
 80252ce:	bd80      	pop	{r7, pc}
 80252d0:	24024408 	.word	0x24024408

080252d4 <ip4_input>:
 * @return ERR_OK if the packet was processed (could return ERR_* if it wasn't
 *         processed, but currently always returns ERR_OK)
 */
err_t
ip4_input(struct pbuf *p, struct netif *inp)
{
 80252d4:	b580      	push	{r7, lr}
 80252d6:	b088      	sub	sp, #32
 80252d8:	af00      	add	r7, sp, #0
 80252da:	6078      	str	r0, [r7, #4]
 80252dc:	6039      	str	r1, [r7, #0]
  const struct ip_hdr *iphdr;
  struct netif *netif;
  u16_t iphdr_hlen;
  u16_t iphdr_len;
#if IP_ACCEPT_LINK_LAYER_ADDRESSING || LWIP_IGMP
  int check_ip_src = 1;
 80252de:	2301      	movs	r3, #1
 80252e0:	617b      	str	r3, [r7, #20]
#endif /* IP_ACCEPT_LINK_LAYER_ADDRESSING || LWIP_IGMP */
#if LWIP_RAW
  raw_input_state_t raw_status;
#endif /* LWIP_RAW */

  LWIP_ASSERT_CORE_LOCKED();
 80252e2:	f7eb fbcb 	bl	8010a7c <sys_check_core_locking>

  IP_STATS_INC(ip.recv);
  MIB2_STATS_INC(mib2.ipinreceives);

  /* identify the IP header */
  iphdr = (struct ip_hdr *)p->payload;
 80252e6:	687b      	ldr	r3, [r7, #4]
 80252e8:	685b      	ldr	r3, [r3, #4]
 80252ea:	613b      	str	r3, [r7, #16]
  if (IPH_V(iphdr) != 4) {
 80252ec:	693b      	ldr	r3, [r7, #16]
 80252ee:	781b      	ldrb	r3, [r3, #0]
 80252f0:	091b      	lsrs	r3, r3, #4
 80252f2:	b2db      	uxtb	r3, r3
 80252f4:	2b04      	cmp	r3, #4
 80252f6:	d004      	beq.n	8025302 <ip4_input+0x2e>
    LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_WARNING, ("IP packet dropped due to bad version number %"U16_F"\n", (u16_t)IPH_V(iphdr)));
    ip4_debug_print(p);
    pbuf_free(p);
 80252f8:	6878      	ldr	r0, [r7, #4]
 80252fa:	f7f5 fce7 	bl	801accc <pbuf_free>
    IP_STATS_INC(ip.err);
    IP_STATS_INC(ip.drop);
    MIB2_STATS_INC(mib2.ipinhdrerrors);
    return ERR_OK;
 80252fe:	2300      	movs	r3, #0
 8025300:	e123      	b.n	802554a <ip4_input+0x276>
    return ERR_OK;
  }
#endif

  /* obtain IP header length in bytes */
  iphdr_hlen = IPH_HL_BYTES(iphdr);
 8025302:	693b      	ldr	r3, [r7, #16]
 8025304:	781b      	ldrb	r3, [r3, #0]
 8025306:	f003 030f 	and.w	r3, r3, #15
 802530a:	b2db      	uxtb	r3, r3
 802530c:	009b      	lsls	r3, r3, #2
 802530e:	b2db      	uxtb	r3, r3
 8025310:	81fb      	strh	r3, [r7, #14]
  /* obtain ip length in bytes */
  iphdr_len = lwip_ntohs(IPH_LEN(iphdr));
 8025312:	693b      	ldr	r3, [r7, #16]
 8025314:	885b      	ldrh	r3, [r3, #2]
 8025316:	b29b      	uxth	r3, r3
 8025318:	4618      	mov	r0, r3
 802531a:	f7f3 fff5 	bl	8019308 <lwip_htons>
 802531e:	4603      	mov	r3, r0
 8025320:	837b      	strh	r3, [r7, #26]

  /* Trim pbuf. This is especially required for packets < 60 bytes. */
  if (iphdr_len < p->tot_len) {
 8025322:	687b      	ldr	r3, [r7, #4]
 8025324:	891b      	ldrh	r3, [r3, #8]
 8025326:	8b7a      	ldrh	r2, [r7, #26]
 8025328:	429a      	cmp	r2, r3
 802532a:	d204      	bcs.n	8025336 <ip4_input+0x62>
    pbuf_realloc(p, iphdr_len);
 802532c:	8b7b      	ldrh	r3, [r7, #26]
 802532e:	4619      	mov	r1, r3
 8025330:	6878      	ldr	r0, [r7, #4]
 8025332:	f7f5 fb15 	bl	801a960 <pbuf_realloc>
  }

  /* header length exceeds first pbuf length, or ip length exceeds total pbuf length? */
  if ((iphdr_hlen > p->len) || (iphdr_len > p->tot_len) || (iphdr_hlen < IP_HLEN)) {
 8025336:	687b      	ldr	r3, [r7, #4]
 8025338:	895b      	ldrh	r3, [r3, #10]
 802533a:	89fa      	ldrh	r2, [r7, #14]
 802533c:	429a      	cmp	r2, r3
 802533e:	d807      	bhi.n	8025350 <ip4_input+0x7c>
 8025340:	687b      	ldr	r3, [r7, #4]
 8025342:	891b      	ldrh	r3, [r3, #8]
 8025344:	8b7a      	ldrh	r2, [r7, #26]
 8025346:	429a      	cmp	r2, r3
 8025348:	d802      	bhi.n	8025350 <ip4_input+0x7c>
 802534a:	89fb      	ldrh	r3, [r7, #14]
 802534c:	2b13      	cmp	r3, #19
 802534e:	d804      	bhi.n	802535a <ip4_input+0x86>
      LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS,
                  ("IP (len %"U16_F") is longer than pbuf (len %"U16_F"), IP packet dropped.\n",
                   iphdr_len, p->tot_len));
    }
    /* free (drop) packet pbufs */
    pbuf_free(p);
 8025350:	6878      	ldr	r0, [r7, #4]
 8025352:	f7f5 fcbb 	bl	801accc <pbuf_free>
    IP_STATS_INC(ip.lenerr);
    IP_STATS_INC(ip.drop);
    MIB2_STATS_INC(mib2.ipindiscards);
    return ERR_OK;
 8025356:	2300      	movs	r3, #0
 8025358:	e0f7      	b.n	802554a <ip4_input+0x276>
    }
  }
#endif

  /* copy IP addresses to aligned ip_addr_t */
  ip_addr_copy_from_ip4(ip_data.current_iphdr_dest, iphdr->dest);
 802535a:	693b      	ldr	r3, [r7, #16]
 802535c:	691b      	ldr	r3, [r3, #16]
 802535e:	4a7d      	ldr	r2, [pc, #500]	@ (8025554 <ip4_input+0x280>)
 8025360:	6153      	str	r3, [r2, #20]
  ip_addr_copy_from_ip4(ip_data.current_iphdr_src, iphdr->src);
 8025362:	693b      	ldr	r3, [r7, #16]
 8025364:	68db      	ldr	r3, [r3, #12]
 8025366:	4a7b      	ldr	r2, [pc, #492]	@ (8025554 <ip4_input+0x280>)
 8025368:	6113      	str	r3, [r2, #16]

  /* match packet against an interface, i.e. is this packet for us? */
  if (ip4_addr_ismulticast(ip4_current_dest_addr())) {
 802536a:	4b7a      	ldr	r3, [pc, #488]	@ (8025554 <ip4_input+0x280>)
 802536c:	695b      	ldr	r3, [r3, #20]
 802536e:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8025372:	2be0      	cmp	r3, #224	@ 0xe0
 8025374:	d112      	bne.n	802539c <ip4_input+0xc8>
      netif = inp;
    } else {
      netif = NULL;
    }
#else /* LWIP_IGMP */
    if ((netif_is_up(inp)) && (!ip4_addr_isany_val(*netif_ip4_addr(inp)))) {
 8025376:	683b      	ldr	r3, [r7, #0]
 8025378:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 802537c:	f003 0301 	and.w	r3, r3, #1
 8025380:	b2db      	uxtb	r3, r3
 8025382:	2b00      	cmp	r3, #0
 8025384:	d007      	beq.n	8025396 <ip4_input+0xc2>
 8025386:	683b      	ldr	r3, [r7, #0]
 8025388:	3304      	adds	r3, #4
 802538a:	681b      	ldr	r3, [r3, #0]
 802538c:	2b00      	cmp	r3, #0
 802538e:	d002      	beq.n	8025396 <ip4_input+0xc2>
      netif = inp;
 8025390:	683b      	ldr	r3, [r7, #0]
 8025392:	61fb      	str	r3, [r7, #28]
 8025394:	e02a      	b.n	80253ec <ip4_input+0x118>
    } else {
      netif = NULL;
 8025396:	2300      	movs	r3, #0
 8025398:	61fb      	str	r3, [r7, #28]
 802539a:	e027      	b.n	80253ec <ip4_input+0x118>
    }
#endif /* LWIP_IGMP */
  } else {
    /* start trying with inp. if that's not acceptable, start walking the
       list of configured netifs. */
    if (ip4_input_accept(inp)) {
 802539c:	6838      	ldr	r0, [r7, #0]
 802539e:	f7ff ff6f 	bl	8025280 <ip4_input_accept>
 80253a2:	4603      	mov	r3, r0
 80253a4:	2b00      	cmp	r3, #0
 80253a6:	d002      	beq.n	80253ae <ip4_input+0xda>
      netif = inp;
 80253a8:	683b      	ldr	r3, [r7, #0]
 80253aa:	61fb      	str	r3, [r7, #28]
 80253ac:	e01e      	b.n	80253ec <ip4_input+0x118>
    } else {
      netif = NULL;
 80253ae:	2300      	movs	r3, #0
 80253b0:	61fb      	str	r3, [r7, #28]
#if !LWIP_NETIF_LOOPBACK || LWIP_HAVE_LOOPIF
      /* Packets sent to the loopback address must not be accepted on an
       * interface that does not have the loopback address assigned to it,
       * unless a non-loopback interface is used for loopback traffic. */
      if (!ip4_addr_isloopback(ip4_current_dest_addr()))
 80253b2:	4b68      	ldr	r3, [pc, #416]	@ (8025554 <ip4_input+0x280>)
 80253b4:	695b      	ldr	r3, [r3, #20]
 80253b6:	b2db      	uxtb	r3, r3
 80253b8:	2b7f      	cmp	r3, #127	@ 0x7f
 80253ba:	d017      	beq.n	80253ec <ip4_input+0x118>
#endif /* !LWIP_NETIF_LOOPBACK || LWIP_HAVE_LOOPIF */
      {
#if !LWIP_SINGLE_NETIF
        NETIF_FOREACH(netif) {
 80253bc:	4b66      	ldr	r3, [pc, #408]	@ (8025558 <ip4_input+0x284>)
 80253be:	681b      	ldr	r3, [r3, #0]
 80253c0:	61fb      	str	r3, [r7, #28]
 80253c2:	e00e      	b.n	80253e2 <ip4_input+0x10e>
          if (netif == inp) {
 80253c4:	69fa      	ldr	r2, [r7, #28]
 80253c6:	683b      	ldr	r3, [r7, #0]
 80253c8:	429a      	cmp	r2, r3
 80253ca:	d006      	beq.n	80253da <ip4_input+0x106>
            /* we checked that before already */
            continue;
          }
          if (ip4_input_accept(netif)) {
 80253cc:	69f8      	ldr	r0, [r7, #28]
 80253ce:	f7ff ff57 	bl	8025280 <ip4_input_accept>
 80253d2:	4603      	mov	r3, r0
 80253d4:	2b00      	cmp	r3, #0
 80253d6:	d108      	bne.n	80253ea <ip4_input+0x116>
 80253d8:	e000      	b.n	80253dc <ip4_input+0x108>
            continue;
 80253da:	bf00      	nop
        NETIF_FOREACH(netif) {
 80253dc:	69fb      	ldr	r3, [r7, #28]
 80253de:	681b      	ldr	r3, [r3, #0]
 80253e0:	61fb      	str	r3, [r7, #28]
 80253e2:	69fb      	ldr	r3, [r7, #28]
 80253e4:	2b00      	cmp	r3, #0
 80253e6:	d1ed      	bne.n	80253c4 <ip4_input+0xf0>
 80253e8:	e000      	b.n	80253ec <ip4_input+0x118>
            break;
 80253ea:	bf00      	nop
   * If you want to accept private broadcast communication while a netif is down,
   * define LWIP_IP_ACCEPT_UDP_PORT(dst_port), e.g.:
   *
   * #define LWIP_IP_ACCEPT_UDP_PORT(dst_port) ((dst_port) == PP_NTOHS(12345))
   */
  if (netif == NULL) {
 80253ec:	69fb      	ldr	r3, [r7, #28]
 80253ee:	2b00      	cmp	r3, #0
 80253f0:	d111      	bne.n	8025416 <ip4_input+0x142>
    /* remote port is DHCP server? */
    if (IPH_PROTO(iphdr) == IP_PROTO_UDP) {
 80253f2:	693b      	ldr	r3, [r7, #16]
 80253f4:	7a5b      	ldrb	r3, [r3, #9]
 80253f6:	2b11      	cmp	r3, #17
 80253f8:	d10d      	bne.n	8025416 <ip4_input+0x142>
      const struct udp_hdr *udphdr = (const struct udp_hdr *)((const u8_t *)iphdr + iphdr_hlen);
 80253fa:	89fb      	ldrh	r3, [r7, #14]
 80253fc:	693a      	ldr	r2, [r7, #16]
 80253fe:	4413      	add	r3, r2
 8025400:	60bb      	str	r3, [r7, #8]
      LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_TRACE, ("ip4_input: UDP packet to DHCP client port %"U16_F"\n",
                                              lwip_ntohs(udphdr->dest)));
      if (IP_ACCEPT_LINK_LAYER_ADDRESSED_PORT(udphdr->dest)) {
 8025402:	68bb      	ldr	r3, [r7, #8]
 8025404:	885b      	ldrh	r3, [r3, #2]
 8025406:	b29b      	uxth	r3, r3
 8025408:	f5b3 4f88 	cmp.w	r3, #17408	@ 0x4400
 802540c:	d103      	bne.n	8025416 <ip4_input+0x142>
        LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_TRACE, ("ip4_input: DHCP packet accepted.\n"));
        netif = inp;
 802540e:	683b      	ldr	r3, [r7, #0]
 8025410:	61fb      	str	r3, [r7, #28]
        check_ip_src = 0;
 8025412:	2300      	movs	r3, #0
 8025414:	617b      	str	r3, [r7, #20]
  }
#endif /* IP_ACCEPT_LINK_LAYER_ADDRESSING */

  /* broadcast or multicast packet source address? Compliant with RFC 1122: 3.2.1.3 */
#if LWIP_IGMP || IP_ACCEPT_LINK_LAYER_ADDRESSING
  if (check_ip_src
 8025416:	697b      	ldr	r3, [r7, #20]
 8025418:	2b00      	cmp	r3, #0
 802541a:	d017      	beq.n	802544c <ip4_input+0x178>
#if IP_ACCEPT_LINK_LAYER_ADDRESSING
      /* DHCP servers need 0.0.0.0 to be allowed as source address (RFC 1.1.2.2: 3.2.1.3/a) */
      && !ip4_addr_isany_val(*ip4_current_src_addr())
 802541c:	4b4d      	ldr	r3, [pc, #308]	@ (8025554 <ip4_input+0x280>)
 802541e:	691b      	ldr	r3, [r3, #16]
 8025420:	2b00      	cmp	r3, #0
 8025422:	d013      	beq.n	802544c <ip4_input+0x178>
#endif /* IP_ACCEPT_LINK_LAYER_ADDRESSING */
     )
#endif /* LWIP_IGMP || IP_ACCEPT_LINK_LAYER_ADDRESSING */
  {
    if ((ip4_addr_isbroadcast(ip4_current_src_addr(), inp)) ||
 8025424:	4b4b      	ldr	r3, [pc, #300]	@ (8025554 <ip4_input+0x280>)
 8025426:	691b      	ldr	r3, [r3, #16]
 8025428:	6839      	ldr	r1, [r7, #0]
 802542a:	4618      	mov	r0, r3
 802542c:	f000 f970 	bl	8025710 <ip4_addr_isbroadcast_u32>
 8025430:	4603      	mov	r3, r0
 8025432:	2b00      	cmp	r3, #0
 8025434:	d105      	bne.n	8025442 <ip4_input+0x16e>
        (ip4_addr_ismulticast(ip4_current_src_addr()))) {
 8025436:	4b47      	ldr	r3, [pc, #284]	@ (8025554 <ip4_input+0x280>)
 8025438:	691b      	ldr	r3, [r3, #16]
 802543a:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
    if ((ip4_addr_isbroadcast(ip4_current_src_addr(), inp)) ||
 802543e:	2be0      	cmp	r3, #224	@ 0xe0
 8025440:	d104      	bne.n	802544c <ip4_input+0x178>
      /* packet source is not valid */
      LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, ("ip4_input: packet source is not valid.\n"));
      /* free (drop) packet pbufs */
      pbuf_free(p);
 8025442:	6878      	ldr	r0, [r7, #4]
 8025444:	f7f5 fc42 	bl	801accc <pbuf_free>
      IP_STATS_INC(ip.drop);
      MIB2_STATS_INC(mib2.ipinaddrerrors);
      MIB2_STATS_INC(mib2.ipindiscards);
      return ERR_OK;
 8025448:	2300      	movs	r3, #0
 802544a:	e07e      	b.n	802554a <ip4_input+0x276>
    }
  }

  /* packet not for us? */
  if (netif == NULL) {
 802544c:	69fb      	ldr	r3, [r7, #28]
 802544e:	2b00      	cmp	r3, #0
 8025450:	d104      	bne.n	802545c <ip4_input+0x188>
    {
      IP_STATS_INC(ip.drop);
      MIB2_STATS_INC(mib2.ipinaddrerrors);
      MIB2_STATS_INC(mib2.ipindiscards);
    }
    pbuf_free(p);
 8025452:	6878      	ldr	r0, [r7, #4]
 8025454:	f7f5 fc3a 	bl	801accc <pbuf_free>
    return ERR_OK;
 8025458:	2300      	movs	r3, #0
 802545a:	e076      	b.n	802554a <ip4_input+0x276>
  }
  /* packet consists of multiple fragments? */
  if ((IPH_OFFSET(iphdr) & PP_HTONS(IP_OFFMASK | IP_MF)) != 0) {
 802545c:	693b      	ldr	r3, [r7, #16]
 802545e:	88db      	ldrh	r3, [r3, #6]
 8025460:	b29b      	uxth	r3, r3
 8025462:	461a      	mov	r2, r3
 8025464:	f64f 733f 	movw	r3, #65343	@ 0xff3f
 8025468:	4013      	ands	r3, r2
 802546a:	2b00      	cmp	r3, #0
 802546c:	d00b      	beq.n	8025486 <ip4_input+0x1b2>
#if IP_REASSEMBLY /* packet fragment reassembly code present? */
    LWIP_DEBUGF(IP_DEBUG, ("IP packet is a fragment (id=0x%04"X16_F" tot_len=%"U16_F" len=%"U16_F" MF=%"U16_F" offset=%"U16_F"), calling ip4_reass()\n",
                           lwip_ntohs(IPH_ID(iphdr)), p->tot_len, lwip_ntohs(IPH_LEN(iphdr)), (u16_t)!!(IPH_OFFSET(iphdr) & PP_HTONS(IP_MF)), (u16_t)((lwip_ntohs(IPH_OFFSET(iphdr)) & IP_OFFMASK) * 8)));
    /* reassemble the packet*/
    p = ip4_reass(p);
 802546e:	6878      	ldr	r0, [r7, #4]
 8025470:	f000 fe62 	bl	8026138 <ip4_reass>
 8025474:	6078      	str	r0, [r7, #4]
    /* packet not fully reassembled yet? */
    if (p == NULL) {
 8025476:	687b      	ldr	r3, [r7, #4]
 8025478:	2b00      	cmp	r3, #0
 802547a:	d101      	bne.n	8025480 <ip4_input+0x1ac>
      return ERR_OK;
 802547c:	2300      	movs	r3, #0
 802547e:	e064      	b.n	802554a <ip4_input+0x276>
    }
    iphdr = (const struct ip_hdr *)p->payload;
 8025480:	687b      	ldr	r3, [r7, #4]
 8025482:	685b      	ldr	r3, [r3, #4]
 8025484:	613b      	str	r3, [r7, #16]
  /* send to upper layers */
  LWIP_DEBUGF(IP_DEBUG, ("ip4_input: \n"));
  ip4_debug_print(p);
  LWIP_DEBUGF(IP_DEBUG, ("ip4_input: p->len %"U16_F" p->tot_len %"U16_F"\n", p->len, p->tot_len));

  ip_data.current_netif = netif;
 8025486:	4a33      	ldr	r2, [pc, #204]	@ (8025554 <ip4_input+0x280>)
 8025488:	69fb      	ldr	r3, [r7, #28]
 802548a:	6013      	str	r3, [r2, #0]
  ip_data.current_input_netif = inp;
 802548c:	4a31      	ldr	r2, [pc, #196]	@ (8025554 <ip4_input+0x280>)
 802548e:	683b      	ldr	r3, [r7, #0]
 8025490:	6053      	str	r3, [r2, #4]
  ip_data.current_ip4_header = iphdr;
 8025492:	4a30      	ldr	r2, [pc, #192]	@ (8025554 <ip4_input+0x280>)
 8025494:	693b      	ldr	r3, [r7, #16]
 8025496:	6093      	str	r3, [r2, #8]
  ip_data.current_ip_header_tot_len = IPH_HL_BYTES(iphdr);
 8025498:	693b      	ldr	r3, [r7, #16]
 802549a:	781b      	ldrb	r3, [r3, #0]
 802549c:	f003 030f 	and.w	r3, r3, #15
 80254a0:	b2db      	uxtb	r3, r3
 80254a2:	009b      	lsls	r3, r3, #2
 80254a4:	b2db      	uxtb	r3, r3
 80254a6:	461a      	mov	r2, r3
 80254a8:	4b2a      	ldr	r3, [pc, #168]	@ (8025554 <ip4_input+0x280>)
 80254aa:	819a      	strh	r2, [r3, #12]
  /* raw input did not eat the packet? */
  raw_status = raw_input(p, inp);
  if (raw_status != RAW_INPUT_EATEN)
#endif /* LWIP_RAW */
  {
    pbuf_remove_header(p, iphdr_hlen); /* Move to payload, no check necessary. */
 80254ac:	89fb      	ldrh	r3, [r7, #14]
 80254ae:	4619      	mov	r1, r3
 80254b0:	6878      	ldr	r0, [r7, #4]
 80254b2:	f7f5 fb53 	bl	801ab5c <pbuf_remove_header>

    switch (IPH_PROTO(iphdr)) {
 80254b6:	693b      	ldr	r3, [r7, #16]
 80254b8:	7a5b      	ldrb	r3, [r3, #9]
 80254ba:	2b11      	cmp	r3, #17
 80254bc:	d006      	beq.n	80254cc <ip4_input+0x1f8>
 80254be:	2b11      	cmp	r3, #17
 80254c0:	dc13      	bgt.n	80254ea <ip4_input+0x216>
 80254c2:	2b01      	cmp	r3, #1
 80254c4:	d00c      	beq.n	80254e0 <ip4_input+0x20c>
 80254c6:	2b06      	cmp	r3, #6
 80254c8:	d005      	beq.n	80254d6 <ip4_input+0x202>
 80254ca:	e00e      	b.n	80254ea <ip4_input+0x216>
      case IP_PROTO_UDP:
#if LWIP_UDPLITE
      case IP_PROTO_UDPLITE:
#endif /* LWIP_UDPLITE */
        MIB2_STATS_INC(mib2.ipindelivers);
        udp_input(p, inp);
 80254cc:	6839      	ldr	r1, [r7, #0]
 80254ce:	6878      	ldr	r0, [r7, #4]
 80254d0:	f7fc f99c 	bl	802180c <udp_input>
        break;
 80254d4:	e026      	b.n	8025524 <ip4_input+0x250>
#endif /* LWIP_UDP */
#if LWIP_TCP
      case IP_PROTO_TCP:
        MIB2_STATS_INC(mib2.ipindelivers);
        tcp_input(p, inp);
 80254d6:	6839      	ldr	r1, [r7, #0]
 80254d8:	6878      	ldr	r0, [r7, #4]
 80254da:	f7f7 fcdd 	bl	801ce98 <tcp_input>
        break;
 80254de:	e021      	b.n	8025524 <ip4_input+0x250>
#endif /* LWIP_TCP */
#if LWIP_ICMP
      case IP_PROTO_ICMP:
        MIB2_STATS_INC(mib2.ipindelivers);
        icmp_input(p, inp);
 80254e0:	6839      	ldr	r1, [r7, #0]
 80254e2:	6878      	ldr	r0, [r7, #4]
 80254e4:	f7ff fca4 	bl	8024e30 <icmp_input>
        break;
 80254e8:	e01c      	b.n	8025524 <ip4_input+0x250>
        } else
#endif /* LWIP_RAW */
        {
#if LWIP_ICMP
          /* send ICMP destination protocol unreachable unless is was a broadcast */
          if (!ip4_addr_isbroadcast(ip4_current_dest_addr(), netif) &&
 80254ea:	4b1a      	ldr	r3, [pc, #104]	@ (8025554 <ip4_input+0x280>)
 80254ec:	695b      	ldr	r3, [r3, #20]
 80254ee:	69f9      	ldr	r1, [r7, #28]
 80254f0:	4618      	mov	r0, r3
 80254f2:	f000 f90d 	bl	8025710 <ip4_addr_isbroadcast_u32>
 80254f6:	4603      	mov	r3, r0
 80254f8:	2b00      	cmp	r3, #0
 80254fa:	d10f      	bne.n	802551c <ip4_input+0x248>
              !ip4_addr_ismulticast(ip4_current_dest_addr())) {
 80254fc:	4b15      	ldr	r3, [pc, #84]	@ (8025554 <ip4_input+0x280>)
 80254fe:	695b      	ldr	r3, [r3, #20]
 8025500:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
          if (!ip4_addr_isbroadcast(ip4_current_dest_addr(), netif) &&
 8025504:	2be0      	cmp	r3, #224	@ 0xe0
 8025506:	d009      	beq.n	802551c <ip4_input+0x248>
            pbuf_header_force(p, (s16_t)iphdr_hlen); /* Move to ip header, no check necessary. */
 8025508:	f9b7 300e 	ldrsh.w	r3, [r7, #14]
 802550c:	4619      	mov	r1, r3
 802550e:	6878      	ldr	r0, [r7, #4]
 8025510:	f7f5 fb97 	bl	801ac42 <pbuf_header_force>
            icmp_dest_unreach(p, ICMP_DUR_PROTO);
 8025514:	2102      	movs	r1, #2
 8025516:	6878      	ldr	r0, [r7, #4]
 8025518:	f7ff fdae 	bl	8025078 <icmp_dest_unreach>

          IP_STATS_INC(ip.proterr);
          IP_STATS_INC(ip.drop);
          MIB2_STATS_INC(mib2.ipinunknownprotos);
        }
        pbuf_free(p);
 802551c:	6878      	ldr	r0, [r7, #4]
 802551e:	f7f5 fbd5 	bl	801accc <pbuf_free>
        break;
 8025522:	bf00      	nop
    }
  }

  /* @todo: this is not really necessary... */
  ip_data.current_netif = NULL;
 8025524:	4b0b      	ldr	r3, [pc, #44]	@ (8025554 <ip4_input+0x280>)
 8025526:	2200      	movs	r2, #0
 8025528:	601a      	str	r2, [r3, #0]
  ip_data.current_input_netif = NULL;
 802552a:	4b0a      	ldr	r3, [pc, #40]	@ (8025554 <ip4_input+0x280>)
 802552c:	2200      	movs	r2, #0
 802552e:	605a      	str	r2, [r3, #4]
  ip_data.current_ip4_header = NULL;
 8025530:	4b08      	ldr	r3, [pc, #32]	@ (8025554 <ip4_input+0x280>)
 8025532:	2200      	movs	r2, #0
 8025534:	609a      	str	r2, [r3, #8]
  ip_data.current_ip_header_tot_len = 0;
 8025536:	4b07      	ldr	r3, [pc, #28]	@ (8025554 <ip4_input+0x280>)
 8025538:	2200      	movs	r2, #0
 802553a:	819a      	strh	r2, [r3, #12]
  ip4_addr_set_any(ip4_current_src_addr());
 802553c:	4b05      	ldr	r3, [pc, #20]	@ (8025554 <ip4_input+0x280>)
 802553e:	2200      	movs	r2, #0
 8025540:	611a      	str	r2, [r3, #16]
  ip4_addr_set_any(ip4_current_dest_addr());
 8025542:	4b04      	ldr	r3, [pc, #16]	@ (8025554 <ip4_input+0x280>)
 8025544:	2200      	movs	r2, #0
 8025546:	615a      	str	r2, [r3, #20]

  return ERR_OK;
 8025548:	2300      	movs	r3, #0
}
 802554a:	4618      	mov	r0, r3
 802554c:	3720      	adds	r7, #32
 802554e:	46bd      	mov	sp, r7
 8025550:	bd80      	pop	{r7, pc}
 8025552:	bf00      	nop
 8025554:	24024408 	.word	0x24024408
 8025558:	2402af4c 	.word	0x2402af4c

0802555c <ip4_output_if>:
 */
err_t
ip4_output_if(struct pbuf *p, const ip4_addr_t *src, const ip4_addr_t *dest,
              u8_t ttl, u8_t tos,
              u8_t proto, struct netif *netif)
{
 802555c:	b580      	push	{r7, lr}
 802555e:	b08a      	sub	sp, #40	@ 0x28
 8025560:	af04      	add	r7, sp, #16
 8025562:	60f8      	str	r0, [r7, #12]
 8025564:	60b9      	str	r1, [r7, #8]
 8025566:	607a      	str	r2, [r7, #4]
 8025568:	70fb      	strb	r3, [r7, #3]
ip4_output_if_opt(struct pbuf *p, const ip4_addr_t *src, const ip4_addr_t *dest,
                  u8_t ttl, u8_t tos, u8_t proto, struct netif *netif, void *ip_options,
                  u16_t optlen)
{
#endif /* IP_OPTIONS_SEND */
  const ip4_addr_t *src_used = src;
 802556a:	68bb      	ldr	r3, [r7, #8]
 802556c:	617b      	str	r3, [r7, #20]
  if (dest != LWIP_IP_HDRINCL) {
 802556e:	687b      	ldr	r3, [r7, #4]
 8025570:	2b00      	cmp	r3, #0
 8025572:	d009      	beq.n	8025588 <ip4_output_if+0x2c>
    if (ip4_addr_isany(src)) {
 8025574:	68bb      	ldr	r3, [r7, #8]
 8025576:	2b00      	cmp	r3, #0
 8025578:	d003      	beq.n	8025582 <ip4_output_if+0x26>
 802557a:	68bb      	ldr	r3, [r7, #8]
 802557c:	681b      	ldr	r3, [r3, #0]
 802557e:	2b00      	cmp	r3, #0
 8025580:	d102      	bne.n	8025588 <ip4_output_if+0x2c>
      src_used = netif_ip4_addr(netif);
 8025582:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8025584:	3304      	adds	r3, #4
 8025586:	617b      	str	r3, [r7, #20]

#if IP_OPTIONS_SEND
  return ip4_output_if_opt_src(p, src_used, dest, ttl, tos, proto, netif,
                               ip_options, optlen);
#else /* IP_OPTIONS_SEND */
  return ip4_output_if_src(p, src_used, dest, ttl, tos, proto, netif);
 8025588:	78fa      	ldrb	r2, [r7, #3]
 802558a:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 802558c:	9302      	str	r3, [sp, #8]
 802558e:	f897 3024 	ldrb.w	r3, [r7, #36]	@ 0x24
 8025592:	9301      	str	r3, [sp, #4]
 8025594:	f897 3020 	ldrb.w	r3, [r7, #32]
 8025598:	9300      	str	r3, [sp, #0]
 802559a:	4613      	mov	r3, r2
 802559c:	687a      	ldr	r2, [r7, #4]
 802559e:	6979      	ldr	r1, [r7, #20]
 80255a0:	68f8      	ldr	r0, [r7, #12]
 80255a2:	f000 f805 	bl	80255b0 <ip4_output_if_src>
 80255a6:	4603      	mov	r3, r0
#endif /* IP_OPTIONS_SEND */
}
 80255a8:	4618      	mov	r0, r3
 80255aa:	3718      	adds	r7, #24
 80255ac:	46bd      	mov	sp, r7
 80255ae:	bd80      	pop	{r7, pc}

080255b0 <ip4_output_if_src>:
 */
err_t
ip4_output_if_src(struct pbuf *p, const ip4_addr_t *src, const ip4_addr_t *dest,
                  u8_t ttl, u8_t tos,
                  u8_t proto, struct netif *netif)
{
 80255b0:	b580      	push	{r7, lr}
 80255b2:	b088      	sub	sp, #32
 80255b4:	af00      	add	r7, sp, #0
 80255b6:	60f8      	str	r0, [r7, #12]
 80255b8:	60b9      	str	r1, [r7, #8]
 80255ba:	607a      	str	r2, [r7, #4]
 80255bc:	70fb      	strb	r3, [r7, #3]
  ip4_addr_t dest_addr;
#if CHECKSUM_GEN_IP_INLINE
  u32_t chk_sum = 0;
#endif /* CHECKSUM_GEN_IP_INLINE */

  LWIP_ASSERT_CORE_LOCKED();
 80255be:	f7eb fa5d 	bl	8010a7c <sys_check_core_locking>
  LWIP_IP_CHECK_PBUF_REF_COUNT_FOR_TX(p);
 80255c2:	68fb      	ldr	r3, [r7, #12]
 80255c4:	7b9b      	ldrb	r3, [r3, #14]
 80255c6:	2b01      	cmp	r3, #1
 80255c8:	d006      	beq.n	80255d8 <ip4_output_if_src+0x28>
 80255ca:	4b4b      	ldr	r3, [pc, #300]	@ (80256f8 <ip4_output_if_src+0x148>)
 80255cc:	f44f 7255 	mov.w	r2, #852	@ 0x354
 80255d0:	494a      	ldr	r1, [pc, #296]	@ (80256fc <ip4_output_if_src+0x14c>)
 80255d2:	484b      	ldr	r0, [pc, #300]	@ (8025700 <ip4_output_if_src+0x150>)
 80255d4:	f004 fdf2 	bl	802a1bc <iprintf>

  MIB2_STATS_INC(mib2.ipoutrequests);

  /* Should the IP header be generated or is it already included in p? */
  if (dest != LWIP_IP_HDRINCL) {
 80255d8:	687b      	ldr	r3, [r7, #4]
 80255da:	2b00      	cmp	r3, #0
 80255dc:	d060      	beq.n	80256a0 <ip4_output_if_src+0xf0>
    u16_t ip_hlen = IP_HLEN;
 80255de:	2314      	movs	r3, #20
 80255e0:	837b      	strh	r3, [r7, #26]
      }
#endif /* CHECKSUM_GEN_IP_INLINE */
    }
#endif /* IP_OPTIONS_SEND */
    /* generate IP header */
    if (pbuf_add_header(p, IP_HLEN)) {
 80255e2:	2114      	movs	r1, #20
 80255e4:	68f8      	ldr	r0, [r7, #12]
 80255e6:	f7f5 faa9 	bl	801ab3c <pbuf_add_header>
 80255ea:	4603      	mov	r3, r0
 80255ec:	2b00      	cmp	r3, #0
 80255ee:	d002      	beq.n	80255f6 <ip4_output_if_src+0x46>
      LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("ip4_output: not enough room for IP header in pbuf\n"));

      IP_STATS_INC(ip.err);
      MIB2_STATS_INC(mib2.ipoutdiscards);
      return ERR_BUF;
 80255f0:	f06f 0301 	mvn.w	r3, #1
 80255f4:	e07c      	b.n	80256f0 <ip4_output_if_src+0x140>
    }

    iphdr = (struct ip_hdr *)p->payload;
 80255f6:	68fb      	ldr	r3, [r7, #12]
 80255f8:	685b      	ldr	r3, [r3, #4]
 80255fa:	61fb      	str	r3, [r7, #28]
    LWIP_ASSERT("check that first pbuf can hold struct ip_hdr",
 80255fc:	68fb      	ldr	r3, [r7, #12]
 80255fe:	895b      	ldrh	r3, [r3, #10]
 8025600:	2b13      	cmp	r3, #19
 8025602:	d806      	bhi.n	8025612 <ip4_output_if_src+0x62>
 8025604:	4b3c      	ldr	r3, [pc, #240]	@ (80256f8 <ip4_output_if_src+0x148>)
 8025606:	f44f 7262 	mov.w	r2, #904	@ 0x388
 802560a:	493e      	ldr	r1, [pc, #248]	@ (8025704 <ip4_output_if_src+0x154>)
 802560c:	483c      	ldr	r0, [pc, #240]	@ (8025700 <ip4_output_if_src+0x150>)
 802560e:	f004 fdd5 	bl	802a1bc <iprintf>
                (p->len >= sizeof(struct ip_hdr)));

    IPH_TTL_SET(iphdr, ttl);
 8025612:	69fb      	ldr	r3, [r7, #28]
 8025614:	78fa      	ldrb	r2, [r7, #3]
 8025616:	721a      	strb	r2, [r3, #8]
    IPH_PROTO_SET(iphdr, proto);
 8025618:	69fb      	ldr	r3, [r7, #28]
 802561a:	f897 202c 	ldrb.w	r2, [r7, #44]	@ 0x2c
 802561e:	725a      	strb	r2, [r3, #9]
#if CHECKSUM_GEN_IP_INLINE
    chk_sum += PP_NTOHS(proto | (ttl << 8));
#endif /* CHECKSUM_GEN_IP_INLINE */

    /* dest cannot be NULL here */
    ip4_addr_copy(iphdr->dest, *dest);
 8025620:	687b      	ldr	r3, [r7, #4]
 8025622:	681a      	ldr	r2, [r3, #0]
 8025624:	69fb      	ldr	r3, [r7, #28]
 8025626:	611a      	str	r2, [r3, #16]
#if CHECKSUM_GEN_IP_INLINE
    chk_sum += ip4_addr_get_u32(&iphdr->dest) & 0xFFFF;
    chk_sum += ip4_addr_get_u32(&iphdr->dest) >> 16;
#endif /* CHECKSUM_GEN_IP_INLINE */

    IPH_VHL_SET(iphdr, 4, ip_hlen / 4);
 8025628:	8b7b      	ldrh	r3, [r7, #26]
 802562a:	089b      	lsrs	r3, r3, #2
 802562c:	b29b      	uxth	r3, r3
 802562e:	b2db      	uxtb	r3, r3
 8025630:	f043 0340 	orr.w	r3, r3, #64	@ 0x40
 8025634:	b2da      	uxtb	r2, r3
 8025636:	69fb      	ldr	r3, [r7, #28]
 8025638:	701a      	strb	r2, [r3, #0]
    IPH_TOS_SET(iphdr, tos);
 802563a:	69fb      	ldr	r3, [r7, #28]
 802563c:	f897 2028 	ldrb.w	r2, [r7, #40]	@ 0x28
 8025640:	705a      	strb	r2, [r3, #1]
#if CHECKSUM_GEN_IP_INLINE
    chk_sum += PP_NTOHS(tos | (iphdr->_v_hl << 8));
#endif /* CHECKSUM_GEN_IP_INLINE */
    IPH_LEN_SET(iphdr, lwip_htons(p->tot_len));
 8025642:	68fb      	ldr	r3, [r7, #12]
 8025644:	891b      	ldrh	r3, [r3, #8]
 8025646:	4618      	mov	r0, r3
 8025648:	f7f3 fe5e 	bl	8019308 <lwip_htons>
 802564c:	4603      	mov	r3, r0
 802564e:	461a      	mov	r2, r3
 8025650:	69fb      	ldr	r3, [r7, #28]
 8025652:	805a      	strh	r2, [r3, #2]
#if CHECKSUM_GEN_IP_INLINE
    chk_sum += iphdr->_len;
#endif /* CHECKSUM_GEN_IP_INLINE */
    IPH_OFFSET_SET(iphdr, 0);
 8025654:	69fb      	ldr	r3, [r7, #28]
 8025656:	2200      	movs	r2, #0
 8025658:	719a      	strb	r2, [r3, #6]
 802565a:	2200      	movs	r2, #0
 802565c:	71da      	strb	r2, [r3, #7]
    IPH_ID_SET(iphdr, lwip_htons(ip_id));
 802565e:	4b2a      	ldr	r3, [pc, #168]	@ (8025708 <ip4_output_if_src+0x158>)
 8025660:	881b      	ldrh	r3, [r3, #0]
 8025662:	4618      	mov	r0, r3
 8025664:	f7f3 fe50 	bl	8019308 <lwip_htons>
 8025668:	4603      	mov	r3, r0
 802566a:	461a      	mov	r2, r3
 802566c:	69fb      	ldr	r3, [r7, #28]
 802566e:	809a      	strh	r2, [r3, #4]
#if CHECKSUM_GEN_IP_INLINE
    chk_sum += iphdr->_id;
#endif /* CHECKSUM_GEN_IP_INLINE */
    ++ip_id;
 8025670:	4b25      	ldr	r3, [pc, #148]	@ (8025708 <ip4_output_if_src+0x158>)
 8025672:	881b      	ldrh	r3, [r3, #0]
 8025674:	3301      	adds	r3, #1
 8025676:	b29a      	uxth	r2, r3
 8025678:	4b23      	ldr	r3, [pc, #140]	@ (8025708 <ip4_output_if_src+0x158>)
 802567a:	801a      	strh	r2, [r3, #0]

    if (src == NULL) {
 802567c:	68bb      	ldr	r3, [r7, #8]
 802567e:	2b00      	cmp	r3, #0
 8025680:	d104      	bne.n	802568c <ip4_output_if_src+0xdc>
      ip4_addr_copy(iphdr->src, *IP4_ADDR_ANY4);
 8025682:	4b22      	ldr	r3, [pc, #136]	@ (802570c <ip4_output_if_src+0x15c>)
 8025684:	681a      	ldr	r2, [r3, #0]
 8025686:	69fb      	ldr	r3, [r7, #28]
 8025688:	60da      	str	r2, [r3, #12]
 802568a:	e003      	b.n	8025694 <ip4_output_if_src+0xe4>
    } else {
      /* src cannot be NULL here */
      ip4_addr_copy(iphdr->src, *src);
 802568c:	68bb      	ldr	r3, [r7, #8]
 802568e:	681a      	ldr	r2, [r3, #0]
 8025690:	69fb      	ldr	r3, [r7, #28]
 8025692:	60da      	str	r2, [r3, #12]
    else {
      IPH_CHKSUM_SET(iphdr, 0);
    }
#endif /* LWIP_CHECKSUM_CTRL_PER_NETIF*/
#else /* CHECKSUM_GEN_IP_INLINE */
    IPH_CHKSUM_SET(iphdr, 0);
 8025694:	69fb      	ldr	r3, [r7, #28]
 8025696:	2200      	movs	r2, #0
 8025698:	729a      	strb	r2, [r3, #10]
 802569a:	2200      	movs	r2, #0
 802569c:	72da      	strb	r2, [r3, #11]
 802569e:	e00f      	b.n	80256c0 <ip4_output_if_src+0x110>
    }
#endif /* CHECKSUM_GEN_IP */
#endif /* CHECKSUM_GEN_IP_INLINE */
  } else {
    /* IP header already included in p */
    if (p->len < IP_HLEN) {
 80256a0:	68fb      	ldr	r3, [r7, #12]
 80256a2:	895b      	ldrh	r3, [r3, #10]
 80256a4:	2b13      	cmp	r3, #19
 80256a6:	d802      	bhi.n	80256ae <ip4_output_if_src+0xfe>
      LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("ip4_output: LWIP_IP_HDRINCL but pbuf is too short\n"));
      IP_STATS_INC(ip.err);
      MIB2_STATS_INC(mib2.ipoutdiscards);
      return ERR_BUF;
 80256a8:	f06f 0301 	mvn.w	r3, #1
 80256ac:	e020      	b.n	80256f0 <ip4_output_if_src+0x140>
    }
    iphdr = (struct ip_hdr *)p->payload;
 80256ae:	68fb      	ldr	r3, [r7, #12]
 80256b0:	685b      	ldr	r3, [r3, #4]
 80256b2:	61fb      	str	r3, [r7, #28]
    ip4_addr_copy(dest_addr, iphdr->dest);
 80256b4:	69fb      	ldr	r3, [r7, #28]
 80256b6:	691b      	ldr	r3, [r3, #16]
 80256b8:	617b      	str	r3, [r7, #20]
    dest = &dest_addr;
 80256ba:	f107 0314 	add.w	r3, r7, #20
 80256be:	607b      	str	r3, [r7, #4]
  }
#endif /* LWIP_MULTICAST_TX_OPTIONS */
#endif /* ENABLE_LOOPBACK */
#if IP_FRAG
  /* don't fragment if interface has mtu set to 0 [loopif] */
  if (netif->mtu && (p->tot_len > netif->mtu)) {
 80256c0:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80256c2:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 80256c4:	2b00      	cmp	r3, #0
 80256c6:	d00c      	beq.n	80256e2 <ip4_output_if_src+0x132>
 80256c8:	68fb      	ldr	r3, [r7, #12]
 80256ca:	891a      	ldrh	r2, [r3, #8]
 80256cc:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80256ce:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 80256d0:	429a      	cmp	r2, r3
 80256d2:	d906      	bls.n	80256e2 <ip4_output_if_src+0x132>
    return ip4_frag(p, netif, dest);
 80256d4:	687a      	ldr	r2, [r7, #4]
 80256d6:	6b39      	ldr	r1, [r7, #48]	@ 0x30
 80256d8:	68f8      	ldr	r0, [r7, #12]
 80256da:	f000 ff21 	bl	8026520 <ip4_frag>
 80256de:	4603      	mov	r3, r0
 80256e0:	e006      	b.n	80256f0 <ip4_output_if_src+0x140>
  }
#endif /* IP_FRAG */

  LWIP_DEBUGF(IP_DEBUG, ("ip4_output_if: call netif->output()\n"));
  return netif->output(netif, p, dest);
 80256e2:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80256e4:	695b      	ldr	r3, [r3, #20]
 80256e6:	687a      	ldr	r2, [r7, #4]
 80256e8:	68f9      	ldr	r1, [r7, #12]
 80256ea:	6b38      	ldr	r0, [r7, #48]	@ 0x30
 80256ec:	4798      	blx	r3
 80256ee:	4603      	mov	r3, r0
}
 80256f0:	4618      	mov	r0, r3
 80256f2:	3720      	adds	r7, #32
 80256f4:	46bd      	mov	sp, r7
 80256f6:	bd80      	pop	{r7, pc}
 80256f8:	08030df8 	.word	0x08030df8
 80256fc:	08030e2c 	.word	0x08030e2c
 8025700:	08030e38 	.word	0x08030e38
 8025704:	08030e60 	.word	0x08030e60
 8025708:	2402b0e2 	.word	0x2402b0e2
 802570c:	080314f4 	.word	0x080314f4

08025710 <ip4_addr_isbroadcast_u32>:
 * @param netif the network interface against which the address is checked
 * @return returns non-zero if the address is a broadcast address
 */
u8_t
ip4_addr_isbroadcast_u32(u32_t addr, const struct netif *netif)
{
 8025710:	b480      	push	{r7}
 8025712:	b085      	sub	sp, #20
 8025714:	af00      	add	r7, sp, #0
 8025716:	6078      	str	r0, [r7, #4]
 8025718:	6039      	str	r1, [r7, #0]
  ip4_addr_t ipaddr;
  ip4_addr_set_u32(&ipaddr, addr);
 802571a:	687b      	ldr	r3, [r7, #4]
 802571c:	60fb      	str	r3, [r7, #12]

  /* all ones (broadcast) or all zeroes (old skool broadcast) */
  if ((~addr == IPADDR_ANY) ||
 802571e:	687b      	ldr	r3, [r7, #4]
 8025720:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8025724:	d002      	beq.n	802572c <ip4_addr_isbroadcast_u32+0x1c>
 8025726:	687b      	ldr	r3, [r7, #4]
 8025728:	2b00      	cmp	r3, #0
 802572a:	d101      	bne.n	8025730 <ip4_addr_isbroadcast_u32+0x20>
      (addr == IPADDR_ANY)) {
    return 1;
 802572c:	2301      	movs	r3, #1
 802572e:	e02a      	b.n	8025786 <ip4_addr_isbroadcast_u32+0x76>
    /* no broadcast support on this network interface? */
  } else if ((netif->flags & NETIF_FLAG_BROADCAST) == 0) {
 8025730:	683b      	ldr	r3, [r7, #0]
 8025732:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 8025736:	f003 0302 	and.w	r3, r3, #2
 802573a:	2b00      	cmp	r3, #0
 802573c:	d101      	bne.n	8025742 <ip4_addr_isbroadcast_u32+0x32>
    /* the given address cannot be a broadcast address
     * nor can we check against any broadcast addresses */
    return 0;
 802573e:	2300      	movs	r3, #0
 8025740:	e021      	b.n	8025786 <ip4_addr_isbroadcast_u32+0x76>
    /* address matches network interface address exactly? => no broadcast */
  } else if (addr == ip4_addr_get_u32(netif_ip4_addr(netif))) {
 8025742:	683b      	ldr	r3, [r7, #0]
 8025744:	3304      	adds	r3, #4
 8025746:	681b      	ldr	r3, [r3, #0]
 8025748:	687a      	ldr	r2, [r7, #4]
 802574a:	429a      	cmp	r2, r3
 802574c:	d101      	bne.n	8025752 <ip4_addr_isbroadcast_u32+0x42>
    return 0;
 802574e:	2300      	movs	r3, #0
 8025750:	e019      	b.n	8025786 <ip4_addr_isbroadcast_u32+0x76>
    /*  on the same (sub) network... */
  } else if (ip4_addr_netcmp(&ipaddr, netif_ip4_addr(netif), netif_ip4_netmask(netif))
 8025752:	68fa      	ldr	r2, [r7, #12]
 8025754:	683b      	ldr	r3, [r7, #0]
 8025756:	3304      	adds	r3, #4
 8025758:	681b      	ldr	r3, [r3, #0]
 802575a:	405a      	eors	r2, r3
 802575c:	683b      	ldr	r3, [r7, #0]
 802575e:	3308      	adds	r3, #8
 8025760:	681b      	ldr	r3, [r3, #0]
 8025762:	4013      	ands	r3, r2
 8025764:	2b00      	cmp	r3, #0
 8025766:	d10d      	bne.n	8025784 <ip4_addr_isbroadcast_u32+0x74>
             /* ...and host identifier bits are all ones? =>... */
             && ((addr & ~ip4_addr_get_u32(netif_ip4_netmask(netif))) ==
 8025768:	683b      	ldr	r3, [r7, #0]
 802576a:	3308      	adds	r3, #8
 802576c:	681b      	ldr	r3, [r3, #0]
 802576e:	43da      	mvns	r2, r3
 8025770:	687b      	ldr	r3, [r7, #4]
 8025772:	401a      	ands	r2, r3
                 (IPADDR_BROADCAST & ~ip4_addr_get_u32(netif_ip4_netmask(netif))))) {
 8025774:	683b      	ldr	r3, [r7, #0]
 8025776:	3308      	adds	r3, #8
 8025778:	681b      	ldr	r3, [r3, #0]
 802577a:	43db      	mvns	r3, r3
             && ((addr & ~ip4_addr_get_u32(netif_ip4_netmask(netif))) ==
 802577c:	429a      	cmp	r2, r3
 802577e:	d101      	bne.n	8025784 <ip4_addr_isbroadcast_u32+0x74>
    /* => network broadcast address */
    return 1;
 8025780:	2301      	movs	r3, #1
 8025782:	e000      	b.n	8025786 <ip4_addr_isbroadcast_u32+0x76>
  } else {
    return 0;
 8025784:	2300      	movs	r3, #0
  }
}
 8025786:	4618      	mov	r0, r3
 8025788:	3714      	adds	r7, #20
 802578a:	46bd      	mov	sp, r7
 802578c:	f85d 7b04 	ldr.w	r7, [sp], #4
 8025790:	4770      	bx	lr

08025792 <ipaddr_addr>:
 * @param cp IP address in ascii representation (e.g. "127.0.0.1")
 * @return ip address in network order
 */
u32_t
ipaddr_addr(const char *cp)
{
 8025792:	b580      	push	{r7, lr}
 8025794:	b084      	sub	sp, #16
 8025796:	af00      	add	r7, sp, #0
 8025798:	6078      	str	r0, [r7, #4]
  ip4_addr_t val;

  if (ip4addr_aton(cp, &val)) {
 802579a:	f107 030c 	add.w	r3, r7, #12
 802579e:	4619      	mov	r1, r3
 80257a0:	6878      	ldr	r0, [r7, #4]
 80257a2:	f000 f80b 	bl	80257bc <ip4addr_aton>
 80257a6:	4603      	mov	r3, r0
 80257a8:	2b00      	cmp	r3, #0
 80257aa:	d001      	beq.n	80257b0 <ipaddr_addr+0x1e>
    return ip4_addr_get_u32(&val);
 80257ac:	68fb      	ldr	r3, [r7, #12]
 80257ae:	e001      	b.n	80257b4 <ipaddr_addr+0x22>
  }
  return (IPADDR_NONE);
 80257b0:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
}
 80257b4:	4618      	mov	r0, r3
 80257b6:	3710      	adds	r7, #16
 80257b8:	46bd      	mov	sp, r7
 80257ba:	bd80      	pop	{r7, pc}

080257bc <ip4addr_aton>:
 * @param addr pointer to which to save the ip address in network order
 * @return 1 if cp could be converted to addr, 0 on failure
 */
int
ip4addr_aton(const char *cp, ip4_addr_t *addr)
{
 80257bc:	b580      	push	{r7, lr}
 80257be:	b08a      	sub	sp, #40	@ 0x28
 80257c0:	af00      	add	r7, sp, #0
 80257c2:	6078      	str	r0, [r7, #4]
 80257c4:	6039      	str	r1, [r7, #0]
  u32_t val;
  u8_t base;
  char c;
  u32_t parts[4];
  u32_t *pp = parts;
 80257c6:	f107 030c 	add.w	r3, r7, #12
 80257ca:	61fb      	str	r3, [r7, #28]

  c = *cp;
 80257cc:	687b      	ldr	r3, [r7, #4]
 80257ce:	781b      	ldrb	r3, [r3, #0]
 80257d0:	f887 3022 	strb.w	r3, [r7, #34]	@ 0x22
    /*
     * Collect number up to ``.''.
     * Values are specified as for C:
     * 0x=hex, 0=octal, 1-9=decimal.
     */
    if (!lwip_isdigit(c)) {
 80257d4:	f897 3022 	ldrb.w	r3, [r7, #34]	@ 0x22
 80257d8:	3301      	adds	r3, #1
 80257da:	4a89      	ldr	r2, [pc, #548]	@ (8025a00 <ip4addr_aton+0x244>)
 80257dc:	4413      	add	r3, r2
 80257de:	781b      	ldrb	r3, [r3, #0]
 80257e0:	f003 0304 	and.w	r3, r3, #4
 80257e4:	2b00      	cmp	r3, #0
 80257e6:	d101      	bne.n	80257ec <ip4addr_aton+0x30>
      return 0;
 80257e8:	2300      	movs	r3, #0
 80257ea:	e105      	b.n	80259f8 <ip4addr_aton+0x23c>
    }
    val = 0;
 80257ec:	2300      	movs	r3, #0
 80257ee:	627b      	str	r3, [r7, #36]	@ 0x24
    base = 10;
 80257f0:	230a      	movs	r3, #10
 80257f2:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
    if (c == '0') {
 80257f6:	f897 3022 	ldrb.w	r3, [r7, #34]	@ 0x22
 80257fa:	2b30      	cmp	r3, #48	@ 0x30
 80257fc:	d11c      	bne.n	8025838 <ip4addr_aton+0x7c>
      c = *++cp;
 80257fe:	687b      	ldr	r3, [r7, #4]
 8025800:	3301      	adds	r3, #1
 8025802:	607b      	str	r3, [r7, #4]
 8025804:	687b      	ldr	r3, [r7, #4]
 8025806:	781b      	ldrb	r3, [r3, #0]
 8025808:	f887 3022 	strb.w	r3, [r7, #34]	@ 0x22
      if (c == 'x' || c == 'X') {
 802580c:	f897 3022 	ldrb.w	r3, [r7, #34]	@ 0x22
 8025810:	2b78      	cmp	r3, #120	@ 0x78
 8025812:	d003      	beq.n	802581c <ip4addr_aton+0x60>
 8025814:	f897 3022 	ldrb.w	r3, [r7, #34]	@ 0x22
 8025818:	2b58      	cmp	r3, #88	@ 0x58
 802581a:	d10a      	bne.n	8025832 <ip4addr_aton+0x76>
        base = 16;
 802581c:	2310      	movs	r3, #16
 802581e:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
        c = *++cp;
 8025822:	687b      	ldr	r3, [r7, #4]
 8025824:	3301      	adds	r3, #1
 8025826:	607b      	str	r3, [r7, #4]
 8025828:	687b      	ldr	r3, [r7, #4]
 802582a:	781b      	ldrb	r3, [r3, #0]
 802582c:	f887 3022 	strb.w	r3, [r7, #34]	@ 0x22
 8025830:	e002      	b.n	8025838 <ip4addr_aton+0x7c>
      } else {
        base = 8;
 8025832:	2308      	movs	r3, #8
 8025834:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
      }
    }
    for (;;) {
      if (lwip_isdigit(c)) {
 8025838:	f897 3022 	ldrb.w	r3, [r7, #34]	@ 0x22
 802583c:	3301      	adds	r3, #1
 802583e:	4a70      	ldr	r2, [pc, #448]	@ (8025a00 <ip4addr_aton+0x244>)
 8025840:	4413      	add	r3, r2
 8025842:	781b      	ldrb	r3, [r3, #0]
 8025844:	f003 0304 	and.w	r3, r3, #4
 8025848:	2b00      	cmp	r3, #0
 802584a:	d011      	beq.n	8025870 <ip4addr_aton+0xb4>
        val = (val * base) + (u32_t)(c - '0');
 802584c:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 8025850:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8025852:	fb03 f202 	mul.w	r2, r3, r2
 8025856:	f897 3022 	ldrb.w	r3, [r7, #34]	@ 0x22
 802585a:	4413      	add	r3, r2
 802585c:	3b30      	subs	r3, #48	@ 0x30
 802585e:	627b      	str	r3, [r7, #36]	@ 0x24
        c = *++cp;
 8025860:	687b      	ldr	r3, [r7, #4]
 8025862:	3301      	adds	r3, #1
 8025864:	607b      	str	r3, [r7, #4]
 8025866:	687b      	ldr	r3, [r7, #4]
 8025868:	781b      	ldrb	r3, [r3, #0]
 802586a:	f887 3022 	strb.w	r3, [r7, #34]	@ 0x22
 802586e:	e7e3      	b.n	8025838 <ip4addr_aton+0x7c>
      } else if (base == 16 && lwip_isxdigit(c)) {
 8025870:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 8025874:	2b10      	cmp	r3, #16
 8025876:	d127      	bne.n	80258c8 <ip4addr_aton+0x10c>
 8025878:	f897 3022 	ldrb.w	r3, [r7, #34]	@ 0x22
 802587c:	3301      	adds	r3, #1
 802587e:	4a60      	ldr	r2, [pc, #384]	@ (8025a00 <ip4addr_aton+0x244>)
 8025880:	4413      	add	r3, r2
 8025882:	781b      	ldrb	r3, [r3, #0]
 8025884:	f003 0344 	and.w	r3, r3, #68	@ 0x44
 8025888:	2b00      	cmp	r3, #0
 802588a:	d01d      	beq.n	80258c8 <ip4addr_aton+0x10c>
        val = (val << 4) | (u32_t)(c + 10 - (lwip_islower(c) ? 'a' : 'A'));
 802588c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 802588e:	011b      	lsls	r3, r3, #4
 8025890:	f897 2022 	ldrb.w	r2, [r7, #34]	@ 0x22
 8025894:	f102 010a 	add.w	r1, r2, #10
 8025898:	f897 2022 	ldrb.w	r2, [r7, #34]	@ 0x22
 802589c:	3201      	adds	r2, #1
 802589e:	4858      	ldr	r0, [pc, #352]	@ (8025a00 <ip4addr_aton+0x244>)
 80258a0:	4402      	add	r2, r0
 80258a2:	7812      	ldrb	r2, [r2, #0]
 80258a4:	f002 0203 	and.w	r2, r2, #3
 80258a8:	2a02      	cmp	r2, #2
 80258aa:	d101      	bne.n	80258b0 <ip4addr_aton+0xf4>
 80258ac:	2261      	movs	r2, #97	@ 0x61
 80258ae:	e000      	b.n	80258b2 <ip4addr_aton+0xf6>
 80258b0:	2241      	movs	r2, #65	@ 0x41
 80258b2:	1a8a      	subs	r2, r1, r2
 80258b4:	4313      	orrs	r3, r2
 80258b6:	627b      	str	r3, [r7, #36]	@ 0x24
        c = *++cp;
 80258b8:	687b      	ldr	r3, [r7, #4]
 80258ba:	3301      	adds	r3, #1
 80258bc:	607b      	str	r3, [r7, #4]
 80258be:	687b      	ldr	r3, [r7, #4]
 80258c0:	781b      	ldrb	r3, [r3, #0]
 80258c2:	f887 3022 	strb.w	r3, [r7, #34]	@ 0x22
      if (lwip_isdigit(c)) {
 80258c6:	e7b7      	b.n	8025838 <ip4addr_aton+0x7c>
      } else {
        break;
      }
    }
    if (c == '.') {
 80258c8:	f897 3022 	ldrb.w	r3, [r7, #34]	@ 0x22
 80258cc:	2b2e      	cmp	r3, #46	@ 0x2e
 80258ce:	d114      	bne.n	80258fa <ip4addr_aton+0x13e>
       * Internet format:
       *  a.b.c.d
       *  a.b.c   (with c treated as 16 bits)
       *  a.b (with b treated as 24 bits)
       */
      if (pp >= parts + 3) {
 80258d0:	f107 030c 	add.w	r3, r7, #12
 80258d4:	330c      	adds	r3, #12
 80258d6:	69fa      	ldr	r2, [r7, #28]
 80258d8:	429a      	cmp	r2, r3
 80258da:	d301      	bcc.n	80258e0 <ip4addr_aton+0x124>
        return 0;
 80258dc:	2300      	movs	r3, #0
 80258de:	e08b      	b.n	80259f8 <ip4addr_aton+0x23c>
      }
      *pp++ = val;
 80258e0:	69fb      	ldr	r3, [r7, #28]
 80258e2:	1d1a      	adds	r2, r3, #4
 80258e4:	61fa      	str	r2, [r7, #28]
 80258e6:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 80258e8:	601a      	str	r2, [r3, #0]
      c = *++cp;
 80258ea:	687b      	ldr	r3, [r7, #4]
 80258ec:	3301      	adds	r3, #1
 80258ee:	607b      	str	r3, [r7, #4]
 80258f0:	687b      	ldr	r3, [r7, #4]
 80258f2:	781b      	ldrb	r3, [r3, #0]
 80258f4:	f887 3022 	strb.w	r3, [r7, #34]	@ 0x22
    if (!lwip_isdigit(c)) {
 80258f8:	e76c      	b.n	80257d4 <ip4addr_aton+0x18>
    } else {
      break;
 80258fa:	bf00      	nop
    }
  }
  /*
   * Check for trailing characters.
   */
  if (c != '\0' && !lwip_isspace(c)) {
 80258fc:	f897 3022 	ldrb.w	r3, [r7, #34]	@ 0x22
 8025900:	2b00      	cmp	r3, #0
 8025902:	d00b      	beq.n	802591c <ip4addr_aton+0x160>
 8025904:	f897 3022 	ldrb.w	r3, [r7, #34]	@ 0x22
 8025908:	3301      	adds	r3, #1
 802590a:	4a3d      	ldr	r2, [pc, #244]	@ (8025a00 <ip4addr_aton+0x244>)
 802590c:	4413      	add	r3, r2
 802590e:	781b      	ldrb	r3, [r3, #0]
 8025910:	f003 0308 	and.w	r3, r3, #8
 8025914:	2b00      	cmp	r3, #0
 8025916:	d101      	bne.n	802591c <ip4addr_aton+0x160>
    return 0;
 8025918:	2300      	movs	r3, #0
 802591a:	e06d      	b.n	80259f8 <ip4addr_aton+0x23c>
  }
  /*
   * Concoct the address according to
   * the number of parts specified.
   */
  switch (pp - parts + 1) {
 802591c:	f107 030c 	add.w	r3, r7, #12
 8025920:	69fa      	ldr	r2, [r7, #28]
 8025922:	1ad3      	subs	r3, r2, r3
 8025924:	109b      	asrs	r3, r3, #2
 8025926:	3301      	adds	r3, #1
 8025928:	2b04      	cmp	r3, #4
 802592a:	d853      	bhi.n	80259d4 <ip4addr_aton+0x218>
 802592c:	a201      	add	r2, pc, #4	@ (adr r2, 8025934 <ip4addr_aton+0x178>)
 802592e:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 8025932:	bf00      	nop
 8025934:	08025949 	.word	0x08025949
 8025938:	080259e3 	.word	0x080259e3
 802593c:	0802594d 	.word	0x0802594d
 8025940:	0802596f 	.word	0x0802596f
 8025944:	0802599d 	.word	0x0802599d

    case 0:
      return 0;       /* initial nondigit */
 8025948:	2300      	movs	r3, #0
 802594a:	e055      	b.n	80259f8 <ip4addr_aton+0x23c>

    case 1:             /* a -- 32 bits */
      break;

    case 2:             /* a.b -- 8.24 bits */
      if (val > 0xffffffUL) {
 802594c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 802594e:	f1b3 7f80 	cmp.w	r3, #16777216	@ 0x1000000
 8025952:	d301      	bcc.n	8025958 <ip4addr_aton+0x19c>
        return 0;
 8025954:	2300      	movs	r3, #0
 8025956:	e04f      	b.n	80259f8 <ip4addr_aton+0x23c>
      }
      if (parts[0] > 0xff) {
 8025958:	68fb      	ldr	r3, [r7, #12]
 802595a:	2bff      	cmp	r3, #255	@ 0xff
 802595c:	d901      	bls.n	8025962 <ip4addr_aton+0x1a6>
        return 0;
 802595e:	2300      	movs	r3, #0
 8025960:	e04a      	b.n	80259f8 <ip4addr_aton+0x23c>
      }
      val |= parts[0] << 24;
 8025962:	68fb      	ldr	r3, [r7, #12]
 8025964:	061b      	lsls	r3, r3, #24
 8025966:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8025968:	4313      	orrs	r3, r2
 802596a:	627b      	str	r3, [r7, #36]	@ 0x24
      break;
 802596c:	e03a      	b.n	80259e4 <ip4addr_aton+0x228>

    case 3:             /* a.b.c -- 8.8.16 bits */
      if (val > 0xffff) {
 802596e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8025970:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 8025974:	d301      	bcc.n	802597a <ip4addr_aton+0x1be>
        return 0;
 8025976:	2300      	movs	r3, #0
 8025978:	e03e      	b.n	80259f8 <ip4addr_aton+0x23c>
      }
      if ((parts[0] > 0xff) || (parts[1] > 0xff)) {
 802597a:	68fb      	ldr	r3, [r7, #12]
 802597c:	2bff      	cmp	r3, #255	@ 0xff
 802597e:	d802      	bhi.n	8025986 <ip4addr_aton+0x1ca>
 8025980:	693b      	ldr	r3, [r7, #16]
 8025982:	2bff      	cmp	r3, #255	@ 0xff
 8025984:	d901      	bls.n	802598a <ip4addr_aton+0x1ce>
        return 0;
 8025986:	2300      	movs	r3, #0
 8025988:	e036      	b.n	80259f8 <ip4addr_aton+0x23c>
      }
      val |= (parts[0] << 24) | (parts[1] << 16);
 802598a:	68fb      	ldr	r3, [r7, #12]
 802598c:	061a      	lsls	r2, r3, #24
 802598e:	693b      	ldr	r3, [r7, #16]
 8025990:	041b      	lsls	r3, r3, #16
 8025992:	4313      	orrs	r3, r2
 8025994:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8025996:	4313      	orrs	r3, r2
 8025998:	627b      	str	r3, [r7, #36]	@ 0x24
      break;
 802599a:	e023      	b.n	80259e4 <ip4addr_aton+0x228>

    case 4:             /* a.b.c.d -- 8.8.8.8 bits */
      if (val > 0xff) {
 802599c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 802599e:	2bff      	cmp	r3, #255	@ 0xff
 80259a0:	d901      	bls.n	80259a6 <ip4addr_aton+0x1ea>
        return 0;
 80259a2:	2300      	movs	r3, #0
 80259a4:	e028      	b.n	80259f8 <ip4addr_aton+0x23c>
      }
      if ((parts[0] > 0xff) || (parts[1] > 0xff) || (parts[2] > 0xff)) {
 80259a6:	68fb      	ldr	r3, [r7, #12]
 80259a8:	2bff      	cmp	r3, #255	@ 0xff
 80259aa:	d805      	bhi.n	80259b8 <ip4addr_aton+0x1fc>
 80259ac:	693b      	ldr	r3, [r7, #16]
 80259ae:	2bff      	cmp	r3, #255	@ 0xff
 80259b0:	d802      	bhi.n	80259b8 <ip4addr_aton+0x1fc>
 80259b2:	697b      	ldr	r3, [r7, #20]
 80259b4:	2bff      	cmp	r3, #255	@ 0xff
 80259b6:	d901      	bls.n	80259bc <ip4addr_aton+0x200>
        return 0;
 80259b8:	2300      	movs	r3, #0
 80259ba:	e01d      	b.n	80259f8 <ip4addr_aton+0x23c>
      }
      val |= (parts[0] << 24) | (parts[1] << 16) | (parts[2] << 8);
 80259bc:	68fb      	ldr	r3, [r7, #12]
 80259be:	061a      	lsls	r2, r3, #24
 80259c0:	693b      	ldr	r3, [r7, #16]
 80259c2:	041b      	lsls	r3, r3, #16
 80259c4:	431a      	orrs	r2, r3
 80259c6:	697b      	ldr	r3, [r7, #20]
 80259c8:	021b      	lsls	r3, r3, #8
 80259ca:	4313      	orrs	r3, r2
 80259cc:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 80259ce:	4313      	orrs	r3, r2
 80259d0:	627b      	str	r3, [r7, #36]	@ 0x24
      break;
 80259d2:	e007      	b.n	80259e4 <ip4addr_aton+0x228>
    default:
      LWIP_ASSERT("unhandled", 0);
 80259d4:	4b0b      	ldr	r3, [pc, #44]	@ (8025a04 <ip4addr_aton+0x248>)
 80259d6:	22f9      	movs	r2, #249	@ 0xf9
 80259d8:	490b      	ldr	r1, [pc, #44]	@ (8025a08 <ip4addr_aton+0x24c>)
 80259da:	480c      	ldr	r0, [pc, #48]	@ (8025a0c <ip4addr_aton+0x250>)
 80259dc:	f004 fbee 	bl	802a1bc <iprintf>
      break;
 80259e0:	e000      	b.n	80259e4 <ip4addr_aton+0x228>
      break;
 80259e2:	bf00      	nop
  }
  if (addr) {
 80259e4:	683b      	ldr	r3, [r7, #0]
 80259e6:	2b00      	cmp	r3, #0
 80259e8:	d005      	beq.n	80259f6 <ip4addr_aton+0x23a>
    ip4_addr_set_u32(addr, lwip_htonl(val));
 80259ea:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 80259ec:	f7f3 fca1 	bl	8019332 <lwip_htonl>
 80259f0:	4602      	mov	r2, r0
 80259f2:	683b      	ldr	r3, [r7, #0]
 80259f4:	601a      	str	r2, [r3, #0]
  }
  return 1;
 80259f6:	2301      	movs	r3, #1
}
 80259f8:	4618      	mov	r0, r3
 80259fa:	3728      	adds	r7, #40	@ 0x28
 80259fc:	46bd      	mov	sp, r7
 80259fe:	bd80      	pop	{r7, pc}
 8025a00:	080315d0 	.word	0x080315d0
 8025a04:	08030e90 	.word	0x08030e90
 8025a08:	08030ecc 	.word	0x08030ecc
 8025a0c:	08030ed8 	.word	0x08030ed8

08025a10 <ip4addr_ntoa>:
 * @return pointer to a global static (!) buffer that holds the ASCII
 *         representation of addr
 */
char *
ip4addr_ntoa(const ip4_addr_t *addr)
{
 8025a10:	b580      	push	{r7, lr}
 8025a12:	b082      	sub	sp, #8
 8025a14:	af00      	add	r7, sp, #0
 8025a16:	6078      	str	r0, [r7, #4]
  static char str[IP4ADDR_STRLEN_MAX];
  return ip4addr_ntoa_r(addr, str, IP4ADDR_STRLEN_MAX);
 8025a18:	2210      	movs	r2, #16
 8025a1a:	4904      	ldr	r1, [pc, #16]	@ (8025a2c <ip4addr_ntoa+0x1c>)
 8025a1c:	6878      	ldr	r0, [r7, #4]
 8025a1e:	f000 f807 	bl	8025a30 <ip4addr_ntoa_r>
 8025a22:	4603      	mov	r3, r0
}
 8025a24:	4618      	mov	r0, r3
 8025a26:	3708      	adds	r7, #8
 8025a28:	46bd      	mov	sp, r7
 8025a2a:	bd80      	pop	{r7, pc}
 8025a2c:	2402b0e4 	.word	0x2402b0e4

08025a30 <ip4addr_ntoa_r>:
 * @return either pointer to buf which now holds the ASCII
 *         representation of addr or NULL if buf was too small
 */
char *
ip4addr_ntoa_r(const ip4_addr_t *addr, char *buf, int buflen)
{
 8025a30:	b480      	push	{r7}
 8025a32:	b08d      	sub	sp, #52	@ 0x34
 8025a34:	af00      	add	r7, sp, #0
 8025a36:	60f8      	str	r0, [r7, #12]
 8025a38:	60b9      	str	r1, [r7, #8]
 8025a3a:	607a      	str	r2, [r7, #4]
  char *rp;
  u8_t *ap;
  u8_t rem;
  u8_t n;
  u8_t i;
  int len = 0;
 8025a3c:	2300      	movs	r3, #0
 8025a3e:	623b      	str	r3, [r7, #32]

  s_addr = ip4_addr_get_u32(addr);
 8025a40:	68fb      	ldr	r3, [r7, #12]
 8025a42:	681b      	ldr	r3, [r3, #0]
 8025a44:	61bb      	str	r3, [r7, #24]

  rp = buf;
 8025a46:	68bb      	ldr	r3, [r7, #8]
 8025a48:	62fb      	str	r3, [r7, #44]	@ 0x2c
  ap = (u8_t *)&s_addr;
 8025a4a:	f107 0318 	add.w	r3, r7, #24
 8025a4e:	62bb      	str	r3, [r7, #40]	@ 0x28
  for (n = 0; n < 4; n++) {
 8025a50:	2300      	movs	r3, #0
 8025a52:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
 8025a56:	e058      	b.n	8025b0a <ip4addr_ntoa_r+0xda>
    i = 0;
 8025a58:	2300      	movs	r3, #0
 8025a5a:	f887 3026 	strb.w	r3, [r7, #38]	@ 0x26
    do {
      rem = *ap % (u8_t)10;
 8025a5e:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8025a60:	781a      	ldrb	r2, [r3, #0]
 8025a62:	4b32      	ldr	r3, [pc, #200]	@ (8025b2c <ip4addr_ntoa_r+0xfc>)
 8025a64:	fba3 1302 	umull	r1, r3, r3, r2
 8025a68:	08d9      	lsrs	r1, r3, #3
 8025a6a:	460b      	mov	r3, r1
 8025a6c:	009b      	lsls	r3, r3, #2
 8025a6e:	440b      	add	r3, r1
 8025a70:	005b      	lsls	r3, r3, #1
 8025a72:	1ad3      	subs	r3, r2, r3
 8025a74:	77fb      	strb	r3, [r7, #31]
      *ap /= (u8_t)10;
 8025a76:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8025a78:	781b      	ldrb	r3, [r3, #0]
 8025a7a:	4a2c      	ldr	r2, [pc, #176]	@ (8025b2c <ip4addr_ntoa_r+0xfc>)
 8025a7c:	fba2 2303 	umull	r2, r3, r2, r3
 8025a80:	08db      	lsrs	r3, r3, #3
 8025a82:	b2da      	uxtb	r2, r3
 8025a84:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8025a86:	701a      	strb	r2, [r3, #0]
      inv[i++] = (char)('0' + rem);
 8025a88:	f897 3026 	ldrb.w	r3, [r7, #38]	@ 0x26
 8025a8c:	1c5a      	adds	r2, r3, #1
 8025a8e:	f887 2026 	strb.w	r2, [r7, #38]	@ 0x26
 8025a92:	4619      	mov	r1, r3
 8025a94:	7ffb      	ldrb	r3, [r7, #31]
 8025a96:	3330      	adds	r3, #48	@ 0x30
 8025a98:	b2da      	uxtb	r2, r3
 8025a9a:	f101 0330 	add.w	r3, r1, #48	@ 0x30
 8025a9e:	443b      	add	r3, r7
 8025aa0:	f803 2c1c 	strb.w	r2, [r3, #-28]
    } while (*ap);
 8025aa4:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8025aa6:	781b      	ldrb	r3, [r3, #0]
 8025aa8:	2b00      	cmp	r3, #0
 8025aaa:	d1d8      	bne.n	8025a5e <ip4addr_ntoa_r+0x2e>
    while (i--) {
 8025aac:	e011      	b.n	8025ad2 <ip4addr_ntoa_r+0xa2>
      if (len++ >= buflen) {
 8025aae:	6a3b      	ldr	r3, [r7, #32]
 8025ab0:	1c5a      	adds	r2, r3, #1
 8025ab2:	623a      	str	r2, [r7, #32]
 8025ab4:	687a      	ldr	r2, [r7, #4]
 8025ab6:	429a      	cmp	r2, r3
 8025ab8:	dc01      	bgt.n	8025abe <ip4addr_ntoa_r+0x8e>
        return NULL;
 8025aba:	2300      	movs	r3, #0
 8025abc:	e030      	b.n	8025b20 <ip4addr_ntoa_r+0xf0>
      }
      *rp++ = inv[i];
 8025abe:	f897 2026 	ldrb.w	r2, [r7, #38]	@ 0x26
 8025ac2:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8025ac4:	1c59      	adds	r1, r3, #1
 8025ac6:	62f9      	str	r1, [r7, #44]	@ 0x2c
 8025ac8:	3230      	adds	r2, #48	@ 0x30
 8025aca:	443a      	add	r2, r7
 8025acc:	f812 2c1c 	ldrb.w	r2, [r2, #-28]
 8025ad0:	701a      	strb	r2, [r3, #0]
    while (i--) {
 8025ad2:	f897 3026 	ldrb.w	r3, [r7, #38]	@ 0x26
 8025ad6:	1e5a      	subs	r2, r3, #1
 8025ad8:	f887 2026 	strb.w	r2, [r7, #38]	@ 0x26
 8025adc:	2b00      	cmp	r3, #0
 8025ade:	d1e6      	bne.n	8025aae <ip4addr_ntoa_r+0x7e>
    }
    if (len++ >= buflen) {
 8025ae0:	6a3b      	ldr	r3, [r7, #32]
 8025ae2:	1c5a      	adds	r2, r3, #1
 8025ae4:	623a      	str	r2, [r7, #32]
 8025ae6:	687a      	ldr	r2, [r7, #4]
 8025ae8:	429a      	cmp	r2, r3
 8025aea:	dc01      	bgt.n	8025af0 <ip4addr_ntoa_r+0xc0>
      return NULL;
 8025aec:	2300      	movs	r3, #0
 8025aee:	e017      	b.n	8025b20 <ip4addr_ntoa_r+0xf0>
    }
    *rp++ = '.';
 8025af0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8025af2:	1c5a      	adds	r2, r3, #1
 8025af4:	62fa      	str	r2, [r7, #44]	@ 0x2c
 8025af6:	222e      	movs	r2, #46	@ 0x2e
 8025af8:	701a      	strb	r2, [r3, #0]
    ap++;
 8025afa:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8025afc:	3301      	adds	r3, #1
 8025afe:	62bb      	str	r3, [r7, #40]	@ 0x28
  for (n = 0; n < 4; n++) {
 8025b00:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 8025b04:	3301      	adds	r3, #1
 8025b06:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
 8025b0a:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 8025b0e:	2b03      	cmp	r3, #3
 8025b10:	d9a2      	bls.n	8025a58 <ip4addr_ntoa_r+0x28>
  }
  *--rp = 0;
 8025b12:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8025b14:	3b01      	subs	r3, #1
 8025b16:	62fb      	str	r3, [r7, #44]	@ 0x2c
 8025b18:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8025b1a:	2200      	movs	r2, #0
 8025b1c:	701a      	strb	r2, [r3, #0]
  return buf;
 8025b1e:	68bb      	ldr	r3, [r7, #8]
}
 8025b20:	4618      	mov	r0, r3
 8025b22:	3734      	adds	r7, #52	@ 0x34
 8025b24:	46bd      	mov	sp, r7
 8025b26:	f85d 7b04 	ldr.w	r7, [sp], #4
 8025b2a:	4770      	bx	lr
 8025b2c:	cccccccd 	.word	0xcccccccd

08025b30 <ip_reass_tmr>:
 *
 * Should be called every 1000 msec (defined by IP_TMR_INTERVAL).
 */
void
ip_reass_tmr(void)
{
 8025b30:	b580      	push	{r7, lr}
 8025b32:	b084      	sub	sp, #16
 8025b34:	af00      	add	r7, sp, #0
  struct ip_reassdata *r, *prev = NULL;
 8025b36:	2300      	movs	r3, #0
 8025b38:	60bb      	str	r3, [r7, #8]

  r = reassdatagrams;
 8025b3a:	4b12      	ldr	r3, [pc, #72]	@ (8025b84 <ip_reass_tmr+0x54>)
 8025b3c:	681b      	ldr	r3, [r3, #0]
 8025b3e:	60fb      	str	r3, [r7, #12]
  while (r != NULL) {
 8025b40:	e018      	b.n	8025b74 <ip_reass_tmr+0x44>
    /* Decrement the timer. Once it reaches 0,
     * clean up the incomplete fragment assembly */
    if (r->timer > 0) {
 8025b42:	68fb      	ldr	r3, [r7, #12]
 8025b44:	7fdb      	ldrb	r3, [r3, #31]
 8025b46:	2b00      	cmp	r3, #0
 8025b48:	d00b      	beq.n	8025b62 <ip_reass_tmr+0x32>
      r->timer--;
 8025b4a:	68fb      	ldr	r3, [r7, #12]
 8025b4c:	7fdb      	ldrb	r3, [r3, #31]
 8025b4e:	3b01      	subs	r3, #1
 8025b50:	b2da      	uxtb	r2, r3
 8025b52:	68fb      	ldr	r3, [r7, #12]
 8025b54:	77da      	strb	r2, [r3, #31]
      LWIP_DEBUGF(IP_REASS_DEBUG, ("ip_reass_tmr: timer dec %"U16_F"\n", (u16_t)r->timer));
      prev = r;
 8025b56:	68fb      	ldr	r3, [r7, #12]
 8025b58:	60bb      	str	r3, [r7, #8]
      r = r->next;
 8025b5a:	68fb      	ldr	r3, [r7, #12]
 8025b5c:	681b      	ldr	r3, [r3, #0]
 8025b5e:	60fb      	str	r3, [r7, #12]
 8025b60:	e008      	b.n	8025b74 <ip_reass_tmr+0x44>
    } else {
      /* reassembly timed out */
      struct ip_reassdata *tmp;
      LWIP_DEBUGF(IP_REASS_DEBUG, ("ip_reass_tmr: timer timed out\n"));
      tmp = r;
 8025b62:	68fb      	ldr	r3, [r7, #12]
 8025b64:	607b      	str	r3, [r7, #4]
      /* get the next pointer before freeing */
      r = r->next;
 8025b66:	68fb      	ldr	r3, [r7, #12]
 8025b68:	681b      	ldr	r3, [r3, #0]
 8025b6a:	60fb      	str	r3, [r7, #12]
      /* free the helper struct and all enqueued pbufs */
      ip_reass_free_complete_datagram(tmp, prev);
 8025b6c:	68b9      	ldr	r1, [r7, #8]
 8025b6e:	6878      	ldr	r0, [r7, #4]
 8025b70:	f000 f80a 	bl	8025b88 <ip_reass_free_complete_datagram>
  while (r != NULL) {
 8025b74:	68fb      	ldr	r3, [r7, #12]
 8025b76:	2b00      	cmp	r3, #0
 8025b78:	d1e3      	bne.n	8025b42 <ip_reass_tmr+0x12>
    }
  }
}
 8025b7a:	bf00      	nop
 8025b7c:	bf00      	nop
 8025b7e:	3710      	adds	r7, #16
 8025b80:	46bd      	mov	sp, r7
 8025b82:	bd80      	pop	{r7, pc}
 8025b84:	2402b0f4 	.word	0x2402b0f4

08025b88 <ip_reass_free_complete_datagram>:
 * @param prev the previous datagram in the linked list
 * @return the number of pbufs freed
 */
static int
ip_reass_free_complete_datagram(struct ip_reassdata *ipr, struct ip_reassdata *prev)
{
 8025b88:	b580      	push	{r7, lr}
 8025b8a:	b088      	sub	sp, #32
 8025b8c:	af00      	add	r7, sp, #0
 8025b8e:	6078      	str	r0, [r7, #4]
 8025b90:	6039      	str	r1, [r7, #0]
  u16_t pbufs_freed = 0;
 8025b92:	2300      	movs	r3, #0
 8025b94:	83fb      	strh	r3, [r7, #30]
  u16_t clen;
  struct pbuf *p;
  struct ip_reass_helper *iprh;

  LWIP_ASSERT("prev != ipr", prev != ipr);
 8025b96:	683a      	ldr	r2, [r7, #0]
 8025b98:	687b      	ldr	r3, [r7, #4]
 8025b9a:	429a      	cmp	r2, r3
 8025b9c:	d105      	bne.n	8025baa <ip_reass_free_complete_datagram+0x22>
 8025b9e:	4b45      	ldr	r3, [pc, #276]	@ (8025cb4 <ip_reass_free_complete_datagram+0x12c>)
 8025ba0:	22ab      	movs	r2, #171	@ 0xab
 8025ba2:	4945      	ldr	r1, [pc, #276]	@ (8025cb8 <ip_reass_free_complete_datagram+0x130>)
 8025ba4:	4845      	ldr	r0, [pc, #276]	@ (8025cbc <ip_reass_free_complete_datagram+0x134>)
 8025ba6:	f004 fb09 	bl	802a1bc <iprintf>
  if (prev != NULL) {
 8025baa:	683b      	ldr	r3, [r7, #0]
 8025bac:	2b00      	cmp	r3, #0
 8025bae:	d00a      	beq.n	8025bc6 <ip_reass_free_complete_datagram+0x3e>
    LWIP_ASSERT("prev->next == ipr", prev->next == ipr);
 8025bb0:	683b      	ldr	r3, [r7, #0]
 8025bb2:	681b      	ldr	r3, [r3, #0]
 8025bb4:	687a      	ldr	r2, [r7, #4]
 8025bb6:	429a      	cmp	r2, r3
 8025bb8:	d005      	beq.n	8025bc6 <ip_reass_free_complete_datagram+0x3e>
 8025bba:	4b3e      	ldr	r3, [pc, #248]	@ (8025cb4 <ip_reass_free_complete_datagram+0x12c>)
 8025bbc:	22ad      	movs	r2, #173	@ 0xad
 8025bbe:	4940      	ldr	r1, [pc, #256]	@ (8025cc0 <ip_reass_free_complete_datagram+0x138>)
 8025bc0:	483e      	ldr	r0, [pc, #248]	@ (8025cbc <ip_reass_free_complete_datagram+0x134>)
 8025bc2:	f004 fafb 	bl	802a1bc <iprintf>
  }

  MIB2_STATS_INC(mib2.ipreasmfails);
#if LWIP_ICMP
  iprh = (struct ip_reass_helper *)ipr->p->payload;
 8025bc6:	687b      	ldr	r3, [r7, #4]
 8025bc8:	685b      	ldr	r3, [r3, #4]
 8025bca:	685b      	ldr	r3, [r3, #4]
 8025bcc:	617b      	str	r3, [r7, #20]
  if (iprh->start == 0) {
 8025bce:	697b      	ldr	r3, [r7, #20]
 8025bd0:	889b      	ldrh	r3, [r3, #4]
 8025bd2:	b29b      	uxth	r3, r3
 8025bd4:	2b00      	cmp	r3, #0
 8025bd6:	d12a      	bne.n	8025c2e <ip_reass_free_complete_datagram+0xa6>
    /* The first fragment was received, send ICMP time exceeded. */
    /* First, de-queue the first pbuf from r->p. */
    p = ipr->p;
 8025bd8:	687b      	ldr	r3, [r7, #4]
 8025bda:	685b      	ldr	r3, [r3, #4]
 8025bdc:	61bb      	str	r3, [r7, #24]
    ipr->p = iprh->next_pbuf;
 8025bde:	697b      	ldr	r3, [r7, #20]
 8025be0:	681a      	ldr	r2, [r3, #0]
 8025be2:	687b      	ldr	r3, [r7, #4]
 8025be4:	605a      	str	r2, [r3, #4]
    /* Then, copy the original header into it. */
    SMEMCPY(p->payload, &ipr->iphdr, IP_HLEN);
 8025be6:	69bb      	ldr	r3, [r7, #24]
 8025be8:	6858      	ldr	r0, [r3, #4]
 8025bea:	687b      	ldr	r3, [r7, #4]
 8025bec:	3308      	adds	r3, #8
 8025bee:	2214      	movs	r2, #20
 8025bf0:	4619      	mov	r1, r3
 8025bf2:	f004 fd6c 	bl	802a6ce <memcpy>
    icmp_time_exceeded(p, ICMP_TE_FRAG);
 8025bf6:	2101      	movs	r1, #1
 8025bf8:	69b8      	ldr	r0, [r7, #24]
 8025bfa:	f7ff fa4d 	bl	8025098 <icmp_time_exceeded>
    clen = pbuf_clen(p);
 8025bfe:	69b8      	ldr	r0, [r7, #24]
 8025c00:	f7f5 f8f2 	bl	801ade8 <pbuf_clen>
 8025c04:	4603      	mov	r3, r0
 8025c06:	827b      	strh	r3, [r7, #18]
    LWIP_ASSERT("pbufs_freed + clen <= 0xffff", pbufs_freed + clen <= 0xffff);
 8025c08:	8bfa      	ldrh	r2, [r7, #30]
 8025c0a:	8a7b      	ldrh	r3, [r7, #18]
 8025c0c:	4413      	add	r3, r2
 8025c0e:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 8025c12:	db05      	blt.n	8025c20 <ip_reass_free_complete_datagram+0x98>
 8025c14:	4b27      	ldr	r3, [pc, #156]	@ (8025cb4 <ip_reass_free_complete_datagram+0x12c>)
 8025c16:	22bc      	movs	r2, #188	@ 0xbc
 8025c18:	492a      	ldr	r1, [pc, #168]	@ (8025cc4 <ip_reass_free_complete_datagram+0x13c>)
 8025c1a:	4828      	ldr	r0, [pc, #160]	@ (8025cbc <ip_reass_free_complete_datagram+0x134>)
 8025c1c:	f004 face 	bl	802a1bc <iprintf>
    pbufs_freed = (u16_t)(pbufs_freed + clen);
 8025c20:	8bfa      	ldrh	r2, [r7, #30]
 8025c22:	8a7b      	ldrh	r3, [r7, #18]
 8025c24:	4413      	add	r3, r2
 8025c26:	83fb      	strh	r3, [r7, #30]
    pbuf_free(p);
 8025c28:	69b8      	ldr	r0, [r7, #24]
 8025c2a:	f7f5 f84f 	bl	801accc <pbuf_free>
  }
#endif /* LWIP_ICMP */

  /* First, free all received pbufs.  The individual pbufs need to be released
     separately as they have not yet been chained */
  p = ipr->p;
 8025c2e:	687b      	ldr	r3, [r7, #4]
 8025c30:	685b      	ldr	r3, [r3, #4]
 8025c32:	61bb      	str	r3, [r7, #24]
  while (p != NULL) {
 8025c34:	e01f      	b.n	8025c76 <ip_reass_free_complete_datagram+0xee>
    struct pbuf *pcur;
    iprh = (struct ip_reass_helper *)p->payload;
 8025c36:	69bb      	ldr	r3, [r7, #24]
 8025c38:	685b      	ldr	r3, [r3, #4]
 8025c3a:	617b      	str	r3, [r7, #20]
    pcur = p;
 8025c3c:	69bb      	ldr	r3, [r7, #24]
 8025c3e:	60fb      	str	r3, [r7, #12]
    /* get the next pointer before freeing */
    p = iprh->next_pbuf;
 8025c40:	697b      	ldr	r3, [r7, #20]
 8025c42:	681b      	ldr	r3, [r3, #0]
 8025c44:	61bb      	str	r3, [r7, #24]
    clen = pbuf_clen(pcur);
 8025c46:	68f8      	ldr	r0, [r7, #12]
 8025c48:	f7f5 f8ce 	bl	801ade8 <pbuf_clen>
 8025c4c:	4603      	mov	r3, r0
 8025c4e:	827b      	strh	r3, [r7, #18]
    LWIP_ASSERT("pbufs_freed + clen <= 0xffff", pbufs_freed + clen <= 0xffff);
 8025c50:	8bfa      	ldrh	r2, [r7, #30]
 8025c52:	8a7b      	ldrh	r3, [r7, #18]
 8025c54:	4413      	add	r3, r2
 8025c56:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 8025c5a:	db05      	blt.n	8025c68 <ip_reass_free_complete_datagram+0xe0>
 8025c5c:	4b15      	ldr	r3, [pc, #84]	@ (8025cb4 <ip_reass_free_complete_datagram+0x12c>)
 8025c5e:	22cc      	movs	r2, #204	@ 0xcc
 8025c60:	4918      	ldr	r1, [pc, #96]	@ (8025cc4 <ip_reass_free_complete_datagram+0x13c>)
 8025c62:	4816      	ldr	r0, [pc, #88]	@ (8025cbc <ip_reass_free_complete_datagram+0x134>)
 8025c64:	f004 faaa 	bl	802a1bc <iprintf>
    pbufs_freed = (u16_t)(pbufs_freed + clen);
 8025c68:	8bfa      	ldrh	r2, [r7, #30]
 8025c6a:	8a7b      	ldrh	r3, [r7, #18]
 8025c6c:	4413      	add	r3, r2
 8025c6e:	83fb      	strh	r3, [r7, #30]
    pbuf_free(pcur);
 8025c70:	68f8      	ldr	r0, [r7, #12]
 8025c72:	f7f5 f82b 	bl	801accc <pbuf_free>
  while (p != NULL) {
 8025c76:	69bb      	ldr	r3, [r7, #24]
 8025c78:	2b00      	cmp	r3, #0
 8025c7a:	d1dc      	bne.n	8025c36 <ip_reass_free_complete_datagram+0xae>
  }
  /* Then, unchain the struct ip_reassdata from the list and free it. */
  ip_reass_dequeue_datagram(ipr, prev);
 8025c7c:	6839      	ldr	r1, [r7, #0]
 8025c7e:	6878      	ldr	r0, [r7, #4]
 8025c80:	f000 f8c2 	bl	8025e08 <ip_reass_dequeue_datagram>
  LWIP_ASSERT("ip_reass_pbufcount >= pbufs_freed", ip_reass_pbufcount >= pbufs_freed);
 8025c84:	4b10      	ldr	r3, [pc, #64]	@ (8025cc8 <ip_reass_free_complete_datagram+0x140>)
 8025c86:	881b      	ldrh	r3, [r3, #0]
 8025c88:	8bfa      	ldrh	r2, [r7, #30]
 8025c8a:	429a      	cmp	r2, r3
 8025c8c:	d905      	bls.n	8025c9a <ip_reass_free_complete_datagram+0x112>
 8025c8e:	4b09      	ldr	r3, [pc, #36]	@ (8025cb4 <ip_reass_free_complete_datagram+0x12c>)
 8025c90:	22d2      	movs	r2, #210	@ 0xd2
 8025c92:	490e      	ldr	r1, [pc, #56]	@ (8025ccc <ip_reass_free_complete_datagram+0x144>)
 8025c94:	4809      	ldr	r0, [pc, #36]	@ (8025cbc <ip_reass_free_complete_datagram+0x134>)
 8025c96:	f004 fa91 	bl	802a1bc <iprintf>
  ip_reass_pbufcount = (u16_t)(ip_reass_pbufcount - pbufs_freed);
 8025c9a:	4b0b      	ldr	r3, [pc, #44]	@ (8025cc8 <ip_reass_free_complete_datagram+0x140>)
 8025c9c:	881a      	ldrh	r2, [r3, #0]
 8025c9e:	8bfb      	ldrh	r3, [r7, #30]
 8025ca0:	1ad3      	subs	r3, r2, r3
 8025ca2:	b29a      	uxth	r2, r3
 8025ca4:	4b08      	ldr	r3, [pc, #32]	@ (8025cc8 <ip_reass_free_complete_datagram+0x140>)
 8025ca6:	801a      	strh	r2, [r3, #0]

  return pbufs_freed;
 8025ca8:	8bfb      	ldrh	r3, [r7, #30]
}
 8025caa:	4618      	mov	r0, r3
 8025cac:	3720      	adds	r7, #32
 8025cae:	46bd      	mov	sp, r7
 8025cb0:	bd80      	pop	{r7, pc}
 8025cb2:	bf00      	nop
 8025cb4:	08030f00 	.word	0x08030f00
 8025cb8:	08030f3c 	.word	0x08030f3c
 8025cbc:	08030f48 	.word	0x08030f48
 8025cc0:	08030f70 	.word	0x08030f70
 8025cc4:	08030f84 	.word	0x08030f84
 8025cc8:	2402b0f8 	.word	0x2402b0f8
 8025ccc:	08030fa4 	.word	0x08030fa4

08025cd0 <ip_reass_remove_oldest_datagram>:
 *        (used for freeing other datagrams if not enough space)
 * @return the number of pbufs freed
 */
static int
ip_reass_remove_oldest_datagram(struct ip_hdr *fraghdr, int pbufs_needed)
{
 8025cd0:	b580      	push	{r7, lr}
 8025cd2:	b08a      	sub	sp, #40	@ 0x28
 8025cd4:	af00      	add	r7, sp, #0
 8025cd6:	6078      	str	r0, [r7, #4]
 8025cd8:	6039      	str	r1, [r7, #0]
  /* @todo Can't we simply remove the last datagram in the
   *       linked list behind reassdatagrams?
   */
  struct ip_reassdata *r, *oldest, *prev, *oldest_prev;
  int pbufs_freed = 0, pbufs_freed_current;
 8025cda:	2300      	movs	r3, #0
 8025cdc:	617b      	str	r3, [r7, #20]
  int other_datagrams;

  /* Free datagrams until being allowed to enqueue 'pbufs_needed' pbufs,
   * but don't free the datagram that 'fraghdr' belongs to! */
  do {
    oldest = NULL;
 8025cde:	2300      	movs	r3, #0
 8025ce0:	623b      	str	r3, [r7, #32]
    prev = NULL;
 8025ce2:	2300      	movs	r3, #0
 8025ce4:	61fb      	str	r3, [r7, #28]
    oldest_prev = NULL;
 8025ce6:	2300      	movs	r3, #0
 8025ce8:	61bb      	str	r3, [r7, #24]
    other_datagrams = 0;
 8025cea:	2300      	movs	r3, #0
 8025cec:	613b      	str	r3, [r7, #16]
    r = reassdatagrams;
 8025cee:	4b28      	ldr	r3, [pc, #160]	@ (8025d90 <ip_reass_remove_oldest_datagram+0xc0>)
 8025cf0:	681b      	ldr	r3, [r3, #0]
 8025cf2:	627b      	str	r3, [r7, #36]	@ 0x24
    while (r != NULL) {
 8025cf4:	e030      	b.n	8025d58 <ip_reass_remove_oldest_datagram+0x88>
      if (!IP_ADDRESSES_AND_ID_MATCH(&r->iphdr, fraghdr)) {
 8025cf6:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8025cf8:	695a      	ldr	r2, [r3, #20]
 8025cfa:	687b      	ldr	r3, [r7, #4]
 8025cfc:	68db      	ldr	r3, [r3, #12]
 8025cfe:	429a      	cmp	r2, r3
 8025d00:	d10c      	bne.n	8025d1c <ip_reass_remove_oldest_datagram+0x4c>
 8025d02:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8025d04:	699a      	ldr	r2, [r3, #24]
 8025d06:	687b      	ldr	r3, [r7, #4]
 8025d08:	691b      	ldr	r3, [r3, #16]
 8025d0a:	429a      	cmp	r2, r3
 8025d0c:	d106      	bne.n	8025d1c <ip_reass_remove_oldest_datagram+0x4c>
 8025d0e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8025d10:	899a      	ldrh	r2, [r3, #12]
 8025d12:	687b      	ldr	r3, [r7, #4]
 8025d14:	889b      	ldrh	r3, [r3, #4]
 8025d16:	b29b      	uxth	r3, r3
 8025d18:	429a      	cmp	r2, r3
 8025d1a:	d014      	beq.n	8025d46 <ip_reass_remove_oldest_datagram+0x76>
        /* Not the same datagram as fraghdr */
        other_datagrams++;
 8025d1c:	693b      	ldr	r3, [r7, #16]
 8025d1e:	3301      	adds	r3, #1
 8025d20:	613b      	str	r3, [r7, #16]
        if (oldest == NULL) {
 8025d22:	6a3b      	ldr	r3, [r7, #32]
 8025d24:	2b00      	cmp	r3, #0
 8025d26:	d104      	bne.n	8025d32 <ip_reass_remove_oldest_datagram+0x62>
          oldest = r;
 8025d28:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8025d2a:	623b      	str	r3, [r7, #32]
          oldest_prev = prev;
 8025d2c:	69fb      	ldr	r3, [r7, #28]
 8025d2e:	61bb      	str	r3, [r7, #24]
 8025d30:	e009      	b.n	8025d46 <ip_reass_remove_oldest_datagram+0x76>
        } else if (r->timer <= oldest->timer) {
 8025d32:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8025d34:	7fda      	ldrb	r2, [r3, #31]
 8025d36:	6a3b      	ldr	r3, [r7, #32]
 8025d38:	7fdb      	ldrb	r3, [r3, #31]
 8025d3a:	429a      	cmp	r2, r3
 8025d3c:	d803      	bhi.n	8025d46 <ip_reass_remove_oldest_datagram+0x76>
          /* older than the previous oldest */
          oldest = r;
 8025d3e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8025d40:	623b      	str	r3, [r7, #32]
          oldest_prev = prev;
 8025d42:	69fb      	ldr	r3, [r7, #28]
 8025d44:	61bb      	str	r3, [r7, #24]
        }
      }
      if (r->next != NULL) {
 8025d46:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8025d48:	681b      	ldr	r3, [r3, #0]
 8025d4a:	2b00      	cmp	r3, #0
 8025d4c:	d001      	beq.n	8025d52 <ip_reass_remove_oldest_datagram+0x82>
        prev = r;
 8025d4e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8025d50:	61fb      	str	r3, [r7, #28]
      }
      r = r->next;
 8025d52:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8025d54:	681b      	ldr	r3, [r3, #0]
 8025d56:	627b      	str	r3, [r7, #36]	@ 0x24
    while (r != NULL) {
 8025d58:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8025d5a:	2b00      	cmp	r3, #0
 8025d5c:	d1cb      	bne.n	8025cf6 <ip_reass_remove_oldest_datagram+0x26>
    }
    if (oldest != NULL) {
 8025d5e:	6a3b      	ldr	r3, [r7, #32]
 8025d60:	2b00      	cmp	r3, #0
 8025d62:	d008      	beq.n	8025d76 <ip_reass_remove_oldest_datagram+0xa6>
      pbufs_freed_current = ip_reass_free_complete_datagram(oldest, oldest_prev);
 8025d64:	69b9      	ldr	r1, [r7, #24]
 8025d66:	6a38      	ldr	r0, [r7, #32]
 8025d68:	f7ff ff0e 	bl	8025b88 <ip_reass_free_complete_datagram>
 8025d6c:	60f8      	str	r0, [r7, #12]
      pbufs_freed += pbufs_freed_current;
 8025d6e:	697a      	ldr	r2, [r7, #20]
 8025d70:	68fb      	ldr	r3, [r7, #12]
 8025d72:	4413      	add	r3, r2
 8025d74:	617b      	str	r3, [r7, #20]
    }
  } while ((pbufs_freed < pbufs_needed) && (other_datagrams > 1));
 8025d76:	697a      	ldr	r2, [r7, #20]
 8025d78:	683b      	ldr	r3, [r7, #0]
 8025d7a:	429a      	cmp	r2, r3
 8025d7c:	da02      	bge.n	8025d84 <ip_reass_remove_oldest_datagram+0xb4>
 8025d7e:	693b      	ldr	r3, [r7, #16]
 8025d80:	2b01      	cmp	r3, #1
 8025d82:	dcac      	bgt.n	8025cde <ip_reass_remove_oldest_datagram+0xe>
  return pbufs_freed;
 8025d84:	697b      	ldr	r3, [r7, #20]
}
 8025d86:	4618      	mov	r0, r3
 8025d88:	3728      	adds	r7, #40	@ 0x28
 8025d8a:	46bd      	mov	sp, r7
 8025d8c:	bd80      	pop	{r7, pc}
 8025d8e:	bf00      	nop
 8025d90:	2402b0f4 	.word	0x2402b0f4

08025d94 <ip_reass_enqueue_new_datagram>:
 * @param clen number of pbufs needed to enqueue (used for freeing other datagrams if not enough space)
 * @return A pointer to the queue location into which the fragment was enqueued
 */
static struct ip_reassdata *
ip_reass_enqueue_new_datagram(struct ip_hdr *fraghdr, int clen)
{
 8025d94:	b580      	push	{r7, lr}
 8025d96:	b084      	sub	sp, #16
 8025d98:	af00      	add	r7, sp, #0
 8025d9a:	6078      	str	r0, [r7, #4]
 8025d9c:	6039      	str	r1, [r7, #0]
#if ! IP_REASS_FREE_OLDEST
  LWIP_UNUSED_ARG(clen);
#endif

  /* No matching previous fragment found, allocate a new reassdata struct */
  ipr = (struct ip_reassdata *)memp_malloc(MEMP_REASSDATA);
 8025d9e:	2004      	movs	r0, #4
 8025da0:	f7f4 f830 	bl	8019e04 <memp_malloc>
 8025da4:	60f8      	str	r0, [r7, #12]
  if (ipr == NULL) {
 8025da6:	68fb      	ldr	r3, [r7, #12]
 8025da8:	2b00      	cmp	r3, #0
 8025daa:	d110      	bne.n	8025dce <ip_reass_enqueue_new_datagram+0x3a>
#if IP_REASS_FREE_OLDEST
    if (ip_reass_remove_oldest_datagram(fraghdr, clen) >= clen) {
 8025dac:	6839      	ldr	r1, [r7, #0]
 8025dae:	6878      	ldr	r0, [r7, #4]
 8025db0:	f7ff ff8e 	bl	8025cd0 <ip_reass_remove_oldest_datagram>
 8025db4:	4602      	mov	r2, r0
 8025db6:	683b      	ldr	r3, [r7, #0]
 8025db8:	4293      	cmp	r3, r2
 8025dba:	dc03      	bgt.n	8025dc4 <ip_reass_enqueue_new_datagram+0x30>
      ipr = (struct ip_reassdata *)memp_malloc(MEMP_REASSDATA);
 8025dbc:	2004      	movs	r0, #4
 8025dbe:	f7f4 f821 	bl	8019e04 <memp_malloc>
 8025dc2:	60f8      	str	r0, [r7, #12]
    }
    if (ipr == NULL)
 8025dc4:	68fb      	ldr	r3, [r7, #12]
 8025dc6:	2b00      	cmp	r3, #0
 8025dc8:	d101      	bne.n	8025dce <ip_reass_enqueue_new_datagram+0x3a>
#endif /* IP_REASS_FREE_OLDEST */
    {
      IPFRAG_STATS_INC(ip_frag.memerr);
      LWIP_DEBUGF(IP_REASS_DEBUG, ("Failed to alloc reassdata struct\n"));
      return NULL;
 8025dca:	2300      	movs	r3, #0
 8025dcc:	e016      	b.n	8025dfc <ip_reass_enqueue_new_datagram+0x68>
    }
  }
  memset(ipr, 0, sizeof(struct ip_reassdata));
 8025dce:	2220      	movs	r2, #32
 8025dd0:	2100      	movs	r1, #0
 8025dd2:	68f8      	ldr	r0, [r7, #12]
 8025dd4:	f004 fb84 	bl	802a4e0 <memset>
  ipr->timer = IP_REASS_MAXAGE;
 8025dd8:	68fb      	ldr	r3, [r7, #12]
 8025dda:	220f      	movs	r2, #15
 8025ddc:	77da      	strb	r2, [r3, #31]

  /* enqueue the new structure to the front of the list */
  ipr->next = reassdatagrams;
 8025dde:	4b09      	ldr	r3, [pc, #36]	@ (8025e04 <ip_reass_enqueue_new_datagram+0x70>)
 8025de0:	681a      	ldr	r2, [r3, #0]
 8025de2:	68fb      	ldr	r3, [r7, #12]
 8025de4:	601a      	str	r2, [r3, #0]
  reassdatagrams = ipr;
 8025de6:	4a07      	ldr	r2, [pc, #28]	@ (8025e04 <ip_reass_enqueue_new_datagram+0x70>)
 8025de8:	68fb      	ldr	r3, [r7, #12]
 8025dea:	6013      	str	r3, [r2, #0]
  /* copy the ip header for later tests and input */
  /* @todo: no ip options supported? */
  SMEMCPY(&(ipr->iphdr), fraghdr, IP_HLEN);
 8025dec:	68fb      	ldr	r3, [r7, #12]
 8025dee:	3308      	adds	r3, #8
 8025df0:	2214      	movs	r2, #20
 8025df2:	6879      	ldr	r1, [r7, #4]
 8025df4:	4618      	mov	r0, r3
 8025df6:	f004 fc6a 	bl	802a6ce <memcpy>
  return ipr;
 8025dfa:	68fb      	ldr	r3, [r7, #12]
}
 8025dfc:	4618      	mov	r0, r3
 8025dfe:	3710      	adds	r7, #16
 8025e00:	46bd      	mov	sp, r7
 8025e02:	bd80      	pop	{r7, pc}
 8025e04:	2402b0f4 	.word	0x2402b0f4

08025e08 <ip_reass_dequeue_datagram>:
 * Dequeues a datagram from the datagram queue. Doesn't deallocate the pbufs.
 * @param ipr points to the queue entry to dequeue
 */
static void
ip_reass_dequeue_datagram(struct ip_reassdata *ipr, struct ip_reassdata *prev)
{
 8025e08:	b580      	push	{r7, lr}
 8025e0a:	b082      	sub	sp, #8
 8025e0c:	af00      	add	r7, sp, #0
 8025e0e:	6078      	str	r0, [r7, #4]
 8025e10:	6039      	str	r1, [r7, #0]
  /* dequeue the reass struct  */
  if (reassdatagrams == ipr) {
 8025e12:	4b10      	ldr	r3, [pc, #64]	@ (8025e54 <ip_reass_dequeue_datagram+0x4c>)
 8025e14:	681b      	ldr	r3, [r3, #0]
 8025e16:	687a      	ldr	r2, [r7, #4]
 8025e18:	429a      	cmp	r2, r3
 8025e1a:	d104      	bne.n	8025e26 <ip_reass_dequeue_datagram+0x1e>
    /* it was the first in the list */
    reassdatagrams = ipr->next;
 8025e1c:	687b      	ldr	r3, [r7, #4]
 8025e1e:	681b      	ldr	r3, [r3, #0]
 8025e20:	4a0c      	ldr	r2, [pc, #48]	@ (8025e54 <ip_reass_dequeue_datagram+0x4c>)
 8025e22:	6013      	str	r3, [r2, #0]
 8025e24:	e00d      	b.n	8025e42 <ip_reass_dequeue_datagram+0x3a>
  } else {
    /* it wasn't the first, so it must have a valid 'prev' */
    LWIP_ASSERT("sanity check linked list", prev != NULL);
 8025e26:	683b      	ldr	r3, [r7, #0]
 8025e28:	2b00      	cmp	r3, #0
 8025e2a:	d106      	bne.n	8025e3a <ip_reass_dequeue_datagram+0x32>
 8025e2c:	4b0a      	ldr	r3, [pc, #40]	@ (8025e58 <ip_reass_dequeue_datagram+0x50>)
 8025e2e:	f240 1245 	movw	r2, #325	@ 0x145
 8025e32:	490a      	ldr	r1, [pc, #40]	@ (8025e5c <ip_reass_dequeue_datagram+0x54>)
 8025e34:	480a      	ldr	r0, [pc, #40]	@ (8025e60 <ip_reass_dequeue_datagram+0x58>)
 8025e36:	f004 f9c1 	bl	802a1bc <iprintf>
    prev->next = ipr->next;
 8025e3a:	687b      	ldr	r3, [r7, #4]
 8025e3c:	681a      	ldr	r2, [r3, #0]
 8025e3e:	683b      	ldr	r3, [r7, #0]
 8025e40:	601a      	str	r2, [r3, #0]
  }

  /* now we can free the ip_reassdata struct */
  memp_free(MEMP_REASSDATA, ipr);
 8025e42:	6879      	ldr	r1, [r7, #4]
 8025e44:	2004      	movs	r0, #4
 8025e46:	f7f4 f853 	bl	8019ef0 <memp_free>
}
 8025e4a:	bf00      	nop
 8025e4c:	3708      	adds	r7, #8
 8025e4e:	46bd      	mov	sp, r7
 8025e50:	bd80      	pop	{r7, pc}
 8025e52:	bf00      	nop
 8025e54:	2402b0f4 	.word	0x2402b0f4
 8025e58:	08030f00 	.word	0x08030f00
 8025e5c:	08030fc8 	.word	0x08030fc8
 8025e60:	08030f48 	.word	0x08030f48

08025e64 <ip_reass_chain_frag_into_datagram_and_validate>:
 * @param is_last is 1 if this pbuf has MF==0 (ipr->flags not updated yet)
 * @return see IP_REASS_VALIDATE_* defines
 */
static int
ip_reass_chain_frag_into_datagram_and_validate(struct ip_reassdata *ipr, struct pbuf *new_p, int is_last)
{
 8025e64:	b580      	push	{r7, lr}
 8025e66:	b08c      	sub	sp, #48	@ 0x30
 8025e68:	af00      	add	r7, sp, #0
 8025e6a:	60f8      	str	r0, [r7, #12]
 8025e6c:	60b9      	str	r1, [r7, #8]
 8025e6e:	607a      	str	r2, [r7, #4]
  struct ip_reass_helper *iprh, *iprh_tmp, *iprh_prev = NULL;
 8025e70:	2300      	movs	r3, #0
 8025e72:	62bb      	str	r3, [r7, #40]	@ 0x28
  struct pbuf *q;
  u16_t offset, len;
  u8_t hlen;
  struct ip_hdr *fraghdr;
  int valid = 1;
 8025e74:	2301      	movs	r3, #1
 8025e76:	623b      	str	r3, [r7, #32]

  /* Extract length and fragment offset from current fragment */
  fraghdr = (struct ip_hdr *)new_p->payload;
 8025e78:	68bb      	ldr	r3, [r7, #8]
 8025e7a:	685b      	ldr	r3, [r3, #4]
 8025e7c:	61fb      	str	r3, [r7, #28]
  len = lwip_ntohs(IPH_LEN(fraghdr));
 8025e7e:	69fb      	ldr	r3, [r7, #28]
 8025e80:	885b      	ldrh	r3, [r3, #2]
 8025e82:	b29b      	uxth	r3, r3
 8025e84:	4618      	mov	r0, r3
 8025e86:	f7f3 fa3f 	bl	8019308 <lwip_htons>
 8025e8a:	4603      	mov	r3, r0
 8025e8c:	837b      	strh	r3, [r7, #26]
  hlen = IPH_HL_BYTES(fraghdr);
 8025e8e:	69fb      	ldr	r3, [r7, #28]
 8025e90:	781b      	ldrb	r3, [r3, #0]
 8025e92:	f003 030f 	and.w	r3, r3, #15
 8025e96:	b2db      	uxtb	r3, r3
 8025e98:	009b      	lsls	r3, r3, #2
 8025e9a:	767b      	strb	r3, [r7, #25]
  if (hlen > len) {
 8025e9c:	7e7b      	ldrb	r3, [r7, #25]
 8025e9e:	b29b      	uxth	r3, r3
 8025ea0:	8b7a      	ldrh	r2, [r7, #26]
 8025ea2:	429a      	cmp	r2, r3
 8025ea4:	d202      	bcs.n	8025eac <ip_reass_chain_frag_into_datagram_and_validate+0x48>
    /* invalid datagram */
    return IP_REASS_VALIDATE_PBUF_DROPPED;
 8025ea6:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8025eaa:	e135      	b.n	8026118 <ip_reass_chain_frag_into_datagram_and_validate+0x2b4>
  }
  len = (u16_t)(len - hlen);
 8025eac:	7e7b      	ldrb	r3, [r7, #25]
 8025eae:	b29b      	uxth	r3, r3
 8025eb0:	8b7a      	ldrh	r2, [r7, #26]
 8025eb2:	1ad3      	subs	r3, r2, r3
 8025eb4:	837b      	strh	r3, [r7, #26]
  offset = IPH_OFFSET_BYTES(fraghdr);
 8025eb6:	69fb      	ldr	r3, [r7, #28]
 8025eb8:	88db      	ldrh	r3, [r3, #6]
 8025eba:	b29b      	uxth	r3, r3
 8025ebc:	4618      	mov	r0, r3
 8025ebe:	f7f3 fa23 	bl	8019308 <lwip_htons>
 8025ec2:	4603      	mov	r3, r0
 8025ec4:	f3c3 030c 	ubfx	r3, r3, #0, #13
 8025ec8:	b29b      	uxth	r3, r3
 8025eca:	00db      	lsls	r3, r3, #3
 8025ecc:	82fb      	strh	r3, [r7, #22]
  /* overwrite the fragment's ip header from the pbuf with our helper struct,
   * and setup the embedded helper structure. */
  /* make sure the struct ip_reass_helper fits into the IP header */
  LWIP_ASSERT("sizeof(struct ip_reass_helper) <= IP_HLEN",
              sizeof(struct ip_reass_helper) <= IP_HLEN);
  iprh = (struct ip_reass_helper *)new_p->payload;
 8025ece:	68bb      	ldr	r3, [r7, #8]
 8025ed0:	685b      	ldr	r3, [r3, #4]
 8025ed2:	62fb      	str	r3, [r7, #44]	@ 0x2c
  iprh->next_pbuf = NULL;
 8025ed4:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8025ed6:	2200      	movs	r2, #0
 8025ed8:	701a      	strb	r2, [r3, #0]
 8025eda:	2200      	movs	r2, #0
 8025edc:	705a      	strb	r2, [r3, #1]
 8025ede:	2200      	movs	r2, #0
 8025ee0:	709a      	strb	r2, [r3, #2]
 8025ee2:	2200      	movs	r2, #0
 8025ee4:	70da      	strb	r2, [r3, #3]
  iprh->start = offset;
 8025ee6:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8025ee8:	8afa      	ldrh	r2, [r7, #22]
 8025eea:	809a      	strh	r2, [r3, #4]
  iprh->end = (u16_t)(offset + len);
 8025eec:	8afa      	ldrh	r2, [r7, #22]
 8025eee:	8b7b      	ldrh	r3, [r7, #26]
 8025ef0:	4413      	add	r3, r2
 8025ef2:	b29a      	uxth	r2, r3
 8025ef4:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8025ef6:	80da      	strh	r2, [r3, #6]
  if (iprh->end < offset) {
 8025ef8:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8025efa:	88db      	ldrh	r3, [r3, #6]
 8025efc:	b29b      	uxth	r3, r3
 8025efe:	8afa      	ldrh	r2, [r7, #22]
 8025f00:	429a      	cmp	r2, r3
 8025f02:	d902      	bls.n	8025f0a <ip_reass_chain_frag_into_datagram_and_validate+0xa6>
    /* u16_t overflow, cannot handle this */
    return IP_REASS_VALIDATE_PBUF_DROPPED;
 8025f04:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8025f08:	e106      	b.n	8026118 <ip_reass_chain_frag_into_datagram_and_validate+0x2b4>
  }

  /* Iterate through until we either get to the end of the list (append),
   * or we find one with a larger offset (insert). */
  for (q = ipr->p; q != NULL;) {
 8025f0a:	68fb      	ldr	r3, [r7, #12]
 8025f0c:	685b      	ldr	r3, [r3, #4]
 8025f0e:	627b      	str	r3, [r7, #36]	@ 0x24
 8025f10:	e068      	b.n	8025fe4 <ip_reass_chain_frag_into_datagram_and_validate+0x180>
    iprh_tmp = (struct ip_reass_helper *)q->payload;
 8025f12:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8025f14:	685b      	ldr	r3, [r3, #4]
 8025f16:	613b      	str	r3, [r7, #16]
    if (iprh->start < iprh_tmp->start) {
 8025f18:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8025f1a:	889b      	ldrh	r3, [r3, #4]
 8025f1c:	b29a      	uxth	r2, r3
 8025f1e:	693b      	ldr	r3, [r7, #16]
 8025f20:	889b      	ldrh	r3, [r3, #4]
 8025f22:	b29b      	uxth	r3, r3
 8025f24:	429a      	cmp	r2, r3
 8025f26:	d235      	bcs.n	8025f94 <ip_reass_chain_frag_into_datagram_and_validate+0x130>
      /* the new pbuf should be inserted before this */
      iprh->next_pbuf = q;
 8025f28:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8025f2a:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8025f2c:	601a      	str	r2, [r3, #0]
      if (iprh_prev != NULL) {
 8025f2e:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8025f30:	2b00      	cmp	r3, #0
 8025f32:	d020      	beq.n	8025f76 <ip_reass_chain_frag_into_datagram_and_validate+0x112>
        /* not the fragment with the lowest offset */
#if IP_REASS_CHECK_OVERLAP
        if ((iprh->start < iprh_prev->end) || (iprh->end > iprh_tmp->start)) {
 8025f34:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8025f36:	889b      	ldrh	r3, [r3, #4]
 8025f38:	b29a      	uxth	r2, r3
 8025f3a:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8025f3c:	88db      	ldrh	r3, [r3, #6]
 8025f3e:	b29b      	uxth	r3, r3
 8025f40:	429a      	cmp	r2, r3
 8025f42:	d307      	bcc.n	8025f54 <ip_reass_chain_frag_into_datagram_and_validate+0xf0>
 8025f44:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8025f46:	88db      	ldrh	r3, [r3, #6]
 8025f48:	b29a      	uxth	r2, r3
 8025f4a:	693b      	ldr	r3, [r7, #16]
 8025f4c:	889b      	ldrh	r3, [r3, #4]
 8025f4e:	b29b      	uxth	r3, r3
 8025f50:	429a      	cmp	r2, r3
 8025f52:	d902      	bls.n	8025f5a <ip_reass_chain_frag_into_datagram_and_validate+0xf6>
          /* fragment overlaps with previous or following, throw away */
          return IP_REASS_VALIDATE_PBUF_DROPPED;
 8025f54:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8025f58:	e0de      	b.n	8026118 <ip_reass_chain_frag_into_datagram_and_validate+0x2b4>
        }
#endif /* IP_REASS_CHECK_OVERLAP */
        iprh_prev->next_pbuf = new_p;
 8025f5a:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8025f5c:	68ba      	ldr	r2, [r7, #8]
 8025f5e:	601a      	str	r2, [r3, #0]
        if (iprh_prev->end != iprh->start) {
 8025f60:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8025f62:	88db      	ldrh	r3, [r3, #6]
 8025f64:	b29a      	uxth	r2, r3
 8025f66:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8025f68:	889b      	ldrh	r3, [r3, #4]
 8025f6a:	b29b      	uxth	r3, r3
 8025f6c:	429a      	cmp	r2, r3
 8025f6e:	d03d      	beq.n	8025fec <ip_reass_chain_frag_into_datagram_and_validate+0x188>
          /* There is a fragment missing between the current
           * and the previous fragment */
          valid = 0;
 8025f70:	2300      	movs	r3, #0
 8025f72:	623b      	str	r3, [r7, #32]
        }
#endif /* IP_REASS_CHECK_OVERLAP */
        /* fragment with the lowest offset */
        ipr->p = new_p;
      }
      break;
 8025f74:	e03a      	b.n	8025fec <ip_reass_chain_frag_into_datagram_and_validate+0x188>
        if (iprh->end > iprh_tmp->start) {
 8025f76:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8025f78:	88db      	ldrh	r3, [r3, #6]
 8025f7a:	b29a      	uxth	r2, r3
 8025f7c:	693b      	ldr	r3, [r7, #16]
 8025f7e:	889b      	ldrh	r3, [r3, #4]
 8025f80:	b29b      	uxth	r3, r3
 8025f82:	429a      	cmp	r2, r3
 8025f84:	d902      	bls.n	8025f8c <ip_reass_chain_frag_into_datagram_and_validate+0x128>
          return IP_REASS_VALIDATE_PBUF_DROPPED;
 8025f86:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8025f8a:	e0c5      	b.n	8026118 <ip_reass_chain_frag_into_datagram_and_validate+0x2b4>
        ipr->p = new_p;
 8025f8c:	68fb      	ldr	r3, [r7, #12]
 8025f8e:	68ba      	ldr	r2, [r7, #8]
 8025f90:	605a      	str	r2, [r3, #4]
      break;
 8025f92:	e02b      	b.n	8025fec <ip_reass_chain_frag_into_datagram_and_validate+0x188>
    } else if (iprh->start == iprh_tmp->start) {
 8025f94:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8025f96:	889b      	ldrh	r3, [r3, #4]
 8025f98:	b29a      	uxth	r2, r3
 8025f9a:	693b      	ldr	r3, [r7, #16]
 8025f9c:	889b      	ldrh	r3, [r3, #4]
 8025f9e:	b29b      	uxth	r3, r3
 8025fa0:	429a      	cmp	r2, r3
 8025fa2:	d102      	bne.n	8025faa <ip_reass_chain_frag_into_datagram_and_validate+0x146>
      /* received the same datagram twice: no need to keep the datagram */
      return IP_REASS_VALIDATE_PBUF_DROPPED;
 8025fa4:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8025fa8:	e0b6      	b.n	8026118 <ip_reass_chain_frag_into_datagram_and_validate+0x2b4>
#if IP_REASS_CHECK_OVERLAP
    } else if (iprh->start < iprh_tmp->end) {
 8025faa:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8025fac:	889b      	ldrh	r3, [r3, #4]
 8025fae:	b29a      	uxth	r2, r3
 8025fb0:	693b      	ldr	r3, [r7, #16]
 8025fb2:	88db      	ldrh	r3, [r3, #6]
 8025fb4:	b29b      	uxth	r3, r3
 8025fb6:	429a      	cmp	r2, r3
 8025fb8:	d202      	bcs.n	8025fc0 <ip_reass_chain_frag_into_datagram_and_validate+0x15c>
      /* overlap: no need to keep the new datagram */
      return IP_REASS_VALIDATE_PBUF_DROPPED;
 8025fba:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8025fbe:	e0ab      	b.n	8026118 <ip_reass_chain_frag_into_datagram_and_validate+0x2b4>
#endif /* IP_REASS_CHECK_OVERLAP */
    } else {
      /* Check if the fragments received so far have no holes. */
      if (iprh_prev != NULL) {
 8025fc0:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8025fc2:	2b00      	cmp	r3, #0
 8025fc4:	d009      	beq.n	8025fda <ip_reass_chain_frag_into_datagram_and_validate+0x176>
        if (iprh_prev->end != iprh_tmp->start) {
 8025fc6:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8025fc8:	88db      	ldrh	r3, [r3, #6]
 8025fca:	b29a      	uxth	r2, r3
 8025fcc:	693b      	ldr	r3, [r7, #16]
 8025fce:	889b      	ldrh	r3, [r3, #4]
 8025fd0:	b29b      	uxth	r3, r3
 8025fd2:	429a      	cmp	r2, r3
 8025fd4:	d001      	beq.n	8025fda <ip_reass_chain_frag_into_datagram_and_validate+0x176>
          /* There is a fragment missing between the current
           * and the previous fragment */
          valid = 0;
 8025fd6:	2300      	movs	r3, #0
 8025fd8:	623b      	str	r3, [r7, #32]
        }
      }
    }
    q = iprh_tmp->next_pbuf;
 8025fda:	693b      	ldr	r3, [r7, #16]
 8025fdc:	681b      	ldr	r3, [r3, #0]
 8025fde:	627b      	str	r3, [r7, #36]	@ 0x24
    iprh_prev = iprh_tmp;
 8025fe0:	693b      	ldr	r3, [r7, #16]
 8025fe2:	62bb      	str	r3, [r7, #40]	@ 0x28
  for (q = ipr->p; q != NULL;) {
 8025fe4:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8025fe6:	2b00      	cmp	r3, #0
 8025fe8:	d193      	bne.n	8025f12 <ip_reass_chain_frag_into_datagram_and_validate+0xae>
 8025fea:	e000      	b.n	8025fee <ip_reass_chain_frag_into_datagram_and_validate+0x18a>
      break;
 8025fec:	bf00      	nop
  }

  /* If q is NULL, then we made it to the end of the list. Determine what to do now */
  if (q == NULL) {
 8025fee:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8025ff0:	2b00      	cmp	r3, #0
 8025ff2:	d12d      	bne.n	8026050 <ip_reass_chain_frag_into_datagram_and_validate+0x1ec>
    if (iprh_prev != NULL) {
 8025ff4:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8025ff6:	2b00      	cmp	r3, #0
 8025ff8:	d01c      	beq.n	8026034 <ip_reass_chain_frag_into_datagram_and_validate+0x1d0>
      /* this is (for now), the fragment with the highest offset:
       * chain it to the last fragment */
#if IP_REASS_CHECK_OVERLAP
      LWIP_ASSERT("check fragments don't overlap", iprh_prev->end <= iprh->start);
 8025ffa:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8025ffc:	88db      	ldrh	r3, [r3, #6]
 8025ffe:	b29a      	uxth	r2, r3
 8026000:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8026002:	889b      	ldrh	r3, [r3, #4]
 8026004:	b29b      	uxth	r3, r3
 8026006:	429a      	cmp	r2, r3
 8026008:	d906      	bls.n	8026018 <ip_reass_chain_frag_into_datagram_and_validate+0x1b4>
 802600a:	4b45      	ldr	r3, [pc, #276]	@ (8026120 <ip_reass_chain_frag_into_datagram_and_validate+0x2bc>)
 802600c:	f44f 72db 	mov.w	r2, #438	@ 0x1b6
 8026010:	4944      	ldr	r1, [pc, #272]	@ (8026124 <ip_reass_chain_frag_into_datagram_and_validate+0x2c0>)
 8026012:	4845      	ldr	r0, [pc, #276]	@ (8026128 <ip_reass_chain_frag_into_datagram_and_validate+0x2c4>)
 8026014:	f004 f8d2 	bl	802a1bc <iprintf>
#endif /* IP_REASS_CHECK_OVERLAP */
      iprh_prev->next_pbuf = new_p;
 8026018:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 802601a:	68ba      	ldr	r2, [r7, #8]
 802601c:	601a      	str	r2, [r3, #0]
      if (iprh_prev->end != iprh->start) {
 802601e:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8026020:	88db      	ldrh	r3, [r3, #6]
 8026022:	b29a      	uxth	r2, r3
 8026024:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8026026:	889b      	ldrh	r3, [r3, #4]
 8026028:	b29b      	uxth	r3, r3
 802602a:	429a      	cmp	r2, r3
 802602c:	d010      	beq.n	8026050 <ip_reass_chain_frag_into_datagram_and_validate+0x1ec>
        valid = 0;
 802602e:	2300      	movs	r3, #0
 8026030:	623b      	str	r3, [r7, #32]
 8026032:	e00d      	b.n	8026050 <ip_reass_chain_frag_into_datagram_and_validate+0x1ec>
      }
    } else {
#if IP_REASS_CHECK_OVERLAP
      LWIP_ASSERT("no previous fragment, this must be the first fragment!",
 8026034:	68fb      	ldr	r3, [r7, #12]
 8026036:	685b      	ldr	r3, [r3, #4]
 8026038:	2b00      	cmp	r3, #0
 802603a:	d006      	beq.n	802604a <ip_reass_chain_frag_into_datagram_and_validate+0x1e6>
 802603c:	4b38      	ldr	r3, [pc, #224]	@ (8026120 <ip_reass_chain_frag_into_datagram_and_validate+0x2bc>)
 802603e:	f44f 72df 	mov.w	r2, #446	@ 0x1be
 8026042:	493a      	ldr	r1, [pc, #232]	@ (802612c <ip_reass_chain_frag_into_datagram_and_validate+0x2c8>)
 8026044:	4838      	ldr	r0, [pc, #224]	@ (8026128 <ip_reass_chain_frag_into_datagram_and_validate+0x2c4>)
 8026046:	f004 f8b9 	bl	802a1bc <iprintf>
                  ipr->p == NULL);
#endif /* IP_REASS_CHECK_OVERLAP */
      /* this is the first fragment we ever received for this ip datagram */
      ipr->p = new_p;
 802604a:	68fb      	ldr	r3, [r7, #12]
 802604c:	68ba      	ldr	r2, [r7, #8]
 802604e:	605a      	str	r2, [r3, #4]
    }
  }

  /* At this point, the validation part begins: */
  /* If we already received the last fragment */
  if (is_last || ((ipr->flags & IP_REASS_FLAG_LASTFRAG) != 0)) {
 8026050:	687b      	ldr	r3, [r7, #4]
 8026052:	2b00      	cmp	r3, #0
 8026054:	d105      	bne.n	8026062 <ip_reass_chain_frag_into_datagram_and_validate+0x1fe>
 8026056:	68fb      	ldr	r3, [r7, #12]
 8026058:	7f9b      	ldrb	r3, [r3, #30]
 802605a:	f003 0301 	and.w	r3, r3, #1
 802605e:	2b00      	cmp	r3, #0
 8026060:	d059      	beq.n	8026116 <ip_reass_chain_frag_into_datagram_and_validate+0x2b2>
    /* and had no holes so far */
    if (valid) {
 8026062:	6a3b      	ldr	r3, [r7, #32]
 8026064:	2b00      	cmp	r3, #0
 8026066:	d04f      	beq.n	8026108 <ip_reass_chain_frag_into_datagram_and_validate+0x2a4>
      /* then check if the rest of the fragments is here */
      /* Check if the queue starts with the first datagram */
      if ((ipr->p == NULL) || (((struct ip_reass_helper *)ipr->p->payload)->start != 0)) {
 8026068:	68fb      	ldr	r3, [r7, #12]
 802606a:	685b      	ldr	r3, [r3, #4]
 802606c:	2b00      	cmp	r3, #0
 802606e:	d006      	beq.n	802607e <ip_reass_chain_frag_into_datagram_and_validate+0x21a>
 8026070:	68fb      	ldr	r3, [r7, #12]
 8026072:	685b      	ldr	r3, [r3, #4]
 8026074:	685b      	ldr	r3, [r3, #4]
 8026076:	889b      	ldrh	r3, [r3, #4]
 8026078:	b29b      	uxth	r3, r3
 802607a:	2b00      	cmp	r3, #0
 802607c:	d002      	beq.n	8026084 <ip_reass_chain_frag_into_datagram_and_validate+0x220>
        valid = 0;
 802607e:	2300      	movs	r3, #0
 8026080:	623b      	str	r3, [r7, #32]
 8026082:	e041      	b.n	8026108 <ip_reass_chain_frag_into_datagram_and_validate+0x2a4>
      } else {
        /* and check that there are no holes after this datagram */
        iprh_prev = iprh;
 8026084:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8026086:	62bb      	str	r3, [r7, #40]	@ 0x28
        q = iprh->next_pbuf;
 8026088:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 802608a:	681b      	ldr	r3, [r3, #0]
 802608c:	627b      	str	r3, [r7, #36]	@ 0x24
        while (q != NULL) {
 802608e:	e012      	b.n	80260b6 <ip_reass_chain_frag_into_datagram_and_validate+0x252>
          iprh = (struct ip_reass_helper *)q->payload;
 8026090:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8026092:	685b      	ldr	r3, [r3, #4]
 8026094:	62fb      	str	r3, [r7, #44]	@ 0x2c
          if (iprh_prev->end != iprh->start) {
 8026096:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8026098:	88db      	ldrh	r3, [r3, #6]
 802609a:	b29a      	uxth	r2, r3
 802609c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 802609e:	889b      	ldrh	r3, [r3, #4]
 80260a0:	b29b      	uxth	r3, r3
 80260a2:	429a      	cmp	r2, r3
 80260a4:	d002      	beq.n	80260ac <ip_reass_chain_frag_into_datagram_and_validate+0x248>
            valid = 0;
 80260a6:	2300      	movs	r3, #0
 80260a8:	623b      	str	r3, [r7, #32]
            break;
 80260aa:	e007      	b.n	80260bc <ip_reass_chain_frag_into_datagram_and_validate+0x258>
          }
          iprh_prev = iprh;
 80260ac:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80260ae:	62bb      	str	r3, [r7, #40]	@ 0x28
          q = iprh->next_pbuf;
 80260b0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80260b2:	681b      	ldr	r3, [r3, #0]
 80260b4:	627b      	str	r3, [r7, #36]	@ 0x24
        while (q != NULL) {
 80260b6:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80260b8:	2b00      	cmp	r3, #0
 80260ba:	d1e9      	bne.n	8026090 <ip_reass_chain_frag_into_datagram_and_validate+0x22c>
        }
        /* if still valid, all fragments are received
         * (because to the MF==0 already arrived */
        if (valid) {
 80260bc:	6a3b      	ldr	r3, [r7, #32]
 80260be:	2b00      	cmp	r3, #0
 80260c0:	d022      	beq.n	8026108 <ip_reass_chain_frag_into_datagram_and_validate+0x2a4>
          LWIP_ASSERT("sanity check", ipr->p != NULL);
 80260c2:	68fb      	ldr	r3, [r7, #12]
 80260c4:	685b      	ldr	r3, [r3, #4]
 80260c6:	2b00      	cmp	r3, #0
 80260c8:	d106      	bne.n	80260d8 <ip_reass_chain_frag_into_datagram_and_validate+0x274>
 80260ca:	4b15      	ldr	r3, [pc, #84]	@ (8026120 <ip_reass_chain_frag_into_datagram_and_validate+0x2bc>)
 80260cc:	f240 12df 	movw	r2, #479	@ 0x1df
 80260d0:	4917      	ldr	r1, [pc, #92]	@ (8026130 <ip_reass_chain_frag_into_datagram_and_validate+0x2cc>)
 80260d2:	4815      	ldr	r0, [pc, #84]	@ (8026128 <ip_reass_chain_frag_into_datagram_and_validate+0x2c4>)
 80260d4:	f004 f872 	bl	802a1bc <iprintf>
          LWIP_ASSERT("sanity check",
 80260d8:	68fb      	ldr	r3, [r7, #12]
 80260da:	685b      	ldr	r3, [r3, #4]
 80260dc:	685b      	ldr	r3, [r3, #4]
 80260de:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 80260e0:	429a      	cmp	r2, r3
 80260e2:	d106      	bne.n	80260f2 <ip_reass_chain_frag_into_datagram_and_validate+0x28e>
 80260e4:	4b0e      	ldr	r3, [pc, #56]	@ (8026120 <ip_reass_chain_frag_into_datagram_and_validate+0x2bc>)
 80260e6:	f44f 72f0 	mov.w	r2, #480	@ 0x1e0
 80260ea:	4911      	ldr	r1, [pc, #68]	@ (8026130 <ip_reass_chain_frag_into_datagram_and_validate+0x2cc>)
 80260ec:	480e      	ldr	r0, [pc, #56]	@ (8026128 <ip_reass_chain_frag_into_datagram_and_validate+0x2c4>)
 80260ee:	f004 f865 	bl	802a1bc <iprintf>
                      ((struct ip_reass_helper *)ipr->p->payload) != iprh);
          LWIP_ASSERT("validate_datagram:next_pbuf!=NULL",
 80260f2:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80260f4:	681b      	ldr	r3, [r3, #0]
 80260f6:	2b00      	cmp	r3, #0
 80260f8:	d006      	beq.n	8026108 <ip_reass_chain_frag_into_datagram_and_validate+0x2a4>
 80260fa:	4b09      	ldr	r3, [pc, #36]	@ (8026120 <ip_reass_chain_frag_into_datagram_and_validate+0x2bc>)
 80260fc:	f44f 72f1 	mov.w	r2, #482	@ 0x1e2
 8026100:	490c      	ldr	r1, [pc, #48]	@ (8026134 <ip_reass_chain_frag_into_datagram_and_validate+0x2d0>)
 8026102:	4809      	ldr	r0, [pc, #36]	@ (8026128 <ip_reass_chain_frag_into_datagram_and_validate+0x2c4>)
 8026104:	f004 f85a 	bl	802a1bc <iprintf>
      }
    }
    /* If valid is 0 here, there are some fragments missing in the middle
     * (since MF == 0 has already arrived). Such datagrams simply time out if
     * no more fragments are received... */
    return valid ? IP_REASS_VALIDATE_TELEGRAM_FINISHED : IP_REASS_VALIDATE_PBUF_QUEUED;
 8026108:	6a3b      	ldr	r3, [r7, #32]
 802610a:	2b00      	cmp	r3, #0
 802610c:	bf14      	ite	ne
 802610e:	2301      	movne	r3, #1
 8026110:	2300      	moveq	r3, #0
 8026112:	b2db      	uxtb	r3, r3
 8026114:	e000      	b.n	8026118 <ip_reass_chain_frag_into_datagram_and_validate+0x2b4>
  }
  /* If we come here, not all fragments were received, yet! */
  return IP_REASS_VALIDATE_PBUF_QUEUED; /* not yet valid! */
 8026116:	2300      	movs	r3, #0
}
 8026118:	4618      	mov	r0, r3
 802611a:	3730      	adds	r7, #48	@ 0x30
 802611c:	46bd      	mov	sp, r7
 802611e:	bd80      	pop	{r7, pc}
 8026120:	08030f00 	.word	0x08030f00
 8026124:	08030fe4 	.word	0x08030fe4
 8026128:	08030f48 	.word	0x08030f48
 802612c:	08031004 	.word	0x08031004
 8026130:	0803103c 	.word	0x0803103c
 8026134:	0803104c 	.word	0x0803104c

08026138 <ip4_reass>:
 * @param p points to a pbuf chain of the fragment
 * @return NULL if reassembly is incomplete, ? otherwise
 */
struct pbuf *
ip4_reass(struct pbuf *p)
{
 8026138:	b580      	push	{r7, lr}
 802613a:	b08e      	sub	sp, #56	@ 0x38
 802613c:	af00      	add	r7, sp, #0
 802613e:	6078      	str	r0, [r7, #4]
  int is_last;

  IPFRAG_STATS_INC(ip_frag.recv);
  MIB2_STATS_INC(mib2.ipreasmreqds);

  fraghdr = (struct ip_hdr *)p->payload;
 8026140:	687b      	ldr	r3, [r7, #4]
 8026142:	685b      	ldr	r3, [r3, #4]
 8026144:	62bb      	str	r3, [r7, #40]	@ 0x28

  if (IPH_HL_BYTES(fraghdr) != IP_HLEN) {
 8026146:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8026148:	781b      	ldrb	r3, [r3, #0]
 802614a:	f003 030f 	and.w	r3, r3, #15
 802614e:	b2db      	uxtb	r3, r3
 8026150:	009b      	lsls	r3, r3, #2
 8026152:	b2db      	uxtb	r3, r3
 8026154:	2b14      	cmp	r3, #20
 8026156:	f040 8171 	bne.w	802643c <ip4_reass+0x304>
    LWIP_DEBUGF(IP_REASS_DEBUG, ("ip4_reass: IP options currently not supported!\n"));
    IPFRAG_STATS_INC(ip_frag.err);
    goto nullreturn;
  }

  offset = IPH_OFFSET_BYTES(fraghdr);
 802615a:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 802615c:	88db      	ldrh	r3, [r3, #6]
 802615e:	b29b      	uxth	r3, r3
 8026160:	4618      	mov	r0, r3
 8026162:	f7f3 f8d1 	bl	8019308 <lwip_htons>
 8026166:	4603      	mov	r3, r0
 8026168:	f3c3 030c 	ubfx	r3, r3, #0, #13
 802616c:	b29b      	uxth	r3, r3
 802616e:	00db      	lsls	r3, r3, #3
 8026170:	84fb      	strh	r3, [r7, #38]	@ 0x26
  len = lwip_ntohs(IPH_LEN(fraghdr));
 8026172:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8026174:	885b      	ldrh	r3, [r3, #2]
 8026176:	b29b      	uxth	r3, r3
 8026178:	4618      	mov	r0, r3
 802617a:	f7f3 f8c5 	bl	8019308 <lwip_htons>
 802617e:	4603      	mov	r3, r0
 8026180:	84bb      	strh	r3, [r7, #36]	@ 0x24
  hlen = IPH_HL_BYTES(fraghdr);
 8026182:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8026184:	781b      	ldrb	r3, [r3, #0]
 8026186:	f003 030f 	and.w	r3, r3, #15
 802618a:	b2db      	uxtb	r3, r3
 802618c:	009b      	lsls	r3, r3, #2
 802618e:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
  if (hlen > len) {
 8026192:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 8026196:	b29b      	uxth	r3, r3
 8026198:	8cba      	ldrh	r2, [r7, #36]	@ 0x24
 802619a:	429a      	cmp	r2, r3
 802619c:	f0c0 8150 	bcc.w	8026440 <ip4_reass+0x308>
    /* invalid datagram */
    goto nullreturn;
  }
  len = (u16_t)(len - hlen);
 80261a0:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 80261a4:	b29b      	uxth	r3, r3
 80261a6:	8cba      	ldrh	r2, [r7, #36]	@ 0x24
 80261a8:	1ad3      	subs	r3, r2, r3
 80261aa:	84bb      	strh	r3, [r7, #36]	@ 0x24

  /* Check if we are allowed to enqueue more datagrams. */
  clen = pbuf_clen(p);
 80261ac:	6878      	ldr	r0, [r7, #4]
 80261ae:	f7f4 fe1b 	bl	801ade8 <pbuf_clen>
 80261b2:	4603      	mov	r3, r0
 80261b4:	843b      	strh	r3, [r7, #32]
  if ((ip_reass_pbufcount + clen) > IP_REASS_MAX_PBUFS) {
 80261b6:	4b8c      	ldr	r3, [pc, #560]	@ (80263e8 <ip4_reass+0x2b0>)
 80261b8:	881b      	ldrh	r3, [r3, #0]
 80261ba:	461a      	mov	r2, r3
 80261bc:	8c3b      	ldrh	r3, [r7, #32]
 80261be:	4413      	add	r3, r2
 80261c0:	2b0a      	cmp	r3, #10
 80261c2:	dd10      	ble.n	80261e6 <ip4_reass+0xae>
#if IP_REASS_FREE_OLDEST
    if (!ip_reass_remove_oldest_datagram(fraghdr, clen) ||
 80261c4:	8c3b      	ldrh	r3, [r7, #32]
 80261c6:	4619      	mov	r1, r3
 80261c8:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 80261ca:	f7ff fd81 	bl	8025cd0 <ip_reass_remove_oldest_datagram>
 80261ce:	4603      	mov	r3, r0
 80261d0:	2b00      	cmp	r3, #0
 80261d2:	f000 8137 	beq.w	8026444 <ip4_reass+0x30c>
        ((ip_reass_pbufcount + clen) > IP_REASS_MAX_PBUFS))
 80261d6:	4b84      	ldr	r3, [pc, #528]	@ (80263e8 <ip4_reass+0x2b0>)
 80261d8:	881b      	ldrh	r3, [r3, #0]
 80261da:	461a      	mov	r2, r3
 80261dc:	8c3b      	ldrh	r3, [r7, #32]
 80261de:	4413      	add	r3, r2
    if (!ip_reass_remove_oldest_datagram(fraghdr, clen) ||
 80261e0:	2b0a      	cmp	r3, #10
 80261e2:	f300 812f 	bgt.w	8026444 <ip4_reass+0x30c>
    }
  }

  /* Look for the datagram the fragment belongs to in the current datagram queue,
   * remembering the previous in the queue for later dequeueing. */
  for (ipr = reassdatagrams; ipr != NULL; ipr = ipr->next) {
 80261e6:	4b81      	ldr	r3, [pc, #516]	@ (80263ec <ip4_reass+0x2b4>)
 80261e8:	681b      	ldr	r3, [r3, #0]
 80261ea:	633b      	str	r3, [r7, #48]	@ 0x30
 80261ec:	e015      	b.n	802621a <ip4_reass+0xe2>
    /* Check if the incoming fragment matches the one currently present
       in the reassembly buffer. If so, we proceed with copying the
       fragment into the buffer. */
    if (IP_ADDRESSES_AND_ID_MATCH(&ipr->iphdr, fraghdr)) {
 80261ee:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80261f0:	695a      	ldr	r2, [r3, #20]
 80261f2:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80261f4:	68db      	ldr	r3, [r3, #12]
 80261f6:	429a      	cmp	r2, r3
 80261f8:	d10c      	bne.n	8026214 <ip4_reass+0xdc>
 80261fa:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80261fc:	699a      	ldr	r2, [r3, #24]
 80261fe:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8026200:	691b      	ldr	r3, [r3, #16]
 8026202:	429a      	cmp	r2, r3
 8026204:	d106      	bne.n	8026214 <ip4_reass+0xdc>
 8026206:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8026208:	899a      	ldrh	r2, [r3, #12]
 802620a:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 802620c:	889b      	ldrh	r3, [r3, #4]
 802620e:	b29b      	uxth	r3, r3
 8026210:	429a      	cmp	r2, r3
 8026212:	d006      	beq.n	8026222 <ip4_reass+0xea>
  for (ipr = reassdatagrams; ipr != NULL; ipr = ipr->next) {
 8026214:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8026216:	681b      	ldr	r3, [r3, #0]
 8026218:	633b      	str	r3, [r7, #48]	@ 0x30
 802621a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 802621c:	2b00      	cmp	r3, #0
 802621e:	d1e6      	bne.n	80261ee <ip4_reass+0xb6>
 8026220:	e000      	b.n	8026224 <ip4_reass+0xec>
      LWIP_DEBUGF(IP_REASS_DEBUG, ("ip4_reass: matching previous fragment ID=%"X16_F"\n",
                                   lwip_ntohs(IPH_ID(fraghdr))));
      IPFRAG_STATS_INC(ip_frag.cachehit);
      break;
 8026222:	bf00      	nop
    }
  }

  if (ipr == NULL) {
 8026224:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8026226:	2b00      	cmp	r3, #0
 8026228:	d109      	bne.n	802623e <ip4_reass+0x106>
    /* Enqueue a new datagram into the datagram queue */
    ipr = ip_reass_enqueue_new_datagram(fraghdr, clen);
 802622a:	8c3b      	ldrh	r3, [r7, #32]
 802622c:	4619      	mov	r1, r3
 802622e:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 8026230:	f7ff fdb0 	bl	8025d94 <ip_reass_enqueue_new_datagram>
 8026234:	6338      	str	r0, [r7, #48]	@ 0x30
    /* Bail if unable to enqueue */
    if (ipr == NULL) {
 8026236:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8026238:	2b00      	cmp	r3, #0
 802623a:	d11c      	bne.n	8026276 <ip4_reass+0x13e>
      goto nullreturn;
 802623c:	e105      	b.n	802644a <ip4_reass+0x312>
    }
  } else {
    if (((lwip_ntohs(IPH_OFFSET(fraghdr)) & IP_OFFMASK) == 0) &&
 802623e:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8026240:	88db      	ldrh	r3, [r3, #6]
 8026242:	b29b      	uxth	r3, r3
 8026244:	4618      	mov	r0, r3
 8026246:	f7f3 f85f 	bl	8019308 <lwip_htons>
 802624a:	4603      	mov	r3, r0
 802624c:	f3c3 030c 	ubfx	r3, r3, #0, #13
 8026250:	2b00      	cmp	r3, #0
 8026252:	d110      	bne.n	8026276 <ip4_reass+0x13e>
        ((lwip_ntohs(IPH_OFFSET(&ipr->iphdr)) & IP_OFFMASK) != 0)) {
 8026254:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8026256:	89db      	ldrh	r3, [r3, #14]
 8026258:	4618      	mov	r0, r3
 802625a:	f7f3 f855 	bl	8019308 <lwip_htons>
 802625e:	4603      	mov	r3, r0
 8026260:	f3c3 030c 	ubfx	r3, r3, #0, #13
    if (((lwip_ntohs(IPH_OFFSET(fraghdr)) & IP_OFFMASK) == 0) &&
 8026264:	2b00      	cmp	r3, #0
 8026266:	d006      	beq.n	8026276 <ip4_reass+0x13e>
      /* ipr->iphdr is not the header from the first fragment, but fraghdr is
       * -> copy fraghdr into ipr->iphdr since we want to have the header
       * of the first fragment (for ICMP time exceeded and later, for copying
       * all options, if supported)*/
      SMEMCPY(&ipr->iphdr, fraghdr, IP_HLEN);
 8026268:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 802626a:	3308      	adds	r3, #8
 802626c:	2214      	movs	r2, #20
 802626e:	6ab9      	ldr	r1, [r7, #40]	@ 0x28
 8026270:	4618      	mov	r0, r3
 8026272:	f004 fa2c 	bl	802a6ce <memcpy>

  /* At this point, we have either created a new entry or pointing
   * to an existing one */

  /* check for 'no more fragments', and update queue entry*/
  is_last = (IPH_OFFSET(fraghdr) & PP_NTOHS(IP_MF)) == 0;
 8026276:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8026278:	88db      	ldrh	r3, [r3, #6]
 802627a:	b29b      	uxth	r3, r3
 802627c:	f003 0320 	and.w	r3, r3, #32
 8026280:	2b00      	cmp	r3, #0
 8026282:	bf0c      	ite	eq
 8026284:	2301      	moveq	r3, #1
 8026286:	2300      	movne	r3, #0
 8026288:	b2db      	uxtb	r3, r3
 802628a:	61fb      	str	r3, [r7, #28]
  if (is_last) {
 802628c:	69fb      	ldr	r3, [r7, #28]
 802628e:	2b00      	cmp	r3, #0
 8026290:	d00e      	beq.n	80262b0 <ip4_reass+0x178>
    u16_t datagram_len = (u16_t)(offset + len);
 8026292:	8cfa      	ldrh	r2, [r7, #38]	@ 0x26
 8026294:	8cbb      	ldrh	r3, [r7, #36]	@ 0x24
 8026296:	4413      	add	r3, r2
 8026298:	837b      	strh	r3, [r7, #26]
    if ((datagram_len < offset) || (datagram_len > (0xFFFF - IP_HLEN))) {
 802629a:	8b7a      	ldrh	r2, [r7, #26]
 802629c:	8cfb      	ldrh	r3, [r7, #38]	@ 0x26
 802629e:	429a      	cmp	r2, r3
 80262a0:	f0c0 80a0 	bcc.w	80263e4 <ip4_reass+0x2ac>
 80262a4:	8b7b      	ldrh	r3, [r7, #26]
 80262a6:	f64f 72eb 	movw	r2, #65515	@ 0xffeb
 80262aa:	4293      	cmp	r3, r2
 80262ac:	f200 809a 	bhi.w	80263e4 <ip4_reass+0x2ac>
      goto nullreturn_ipr;
    }
  }
  /* find the right place to insert this pbuf */
  /* @todo: trim pbufs if fragments are overlapping */
  valid = ip_reass_chain_frag_into_datagram_and_validate(ipr, p, is_last);
 80262b0:	69fa      	ldr	r2, [r7, #28]
 80262b2:	6879      	ldr	r1, [r7, #4]
 80262b4:	6b38      	ldr	r0, [r7, #48]	@ 0x30
 80262b6:	f7ff fdd5 	bl	8025e64 <ip_reass_chain_frag_into_datagram_and_validate>
 80262ba:	6178      	str	r0, [r7, #20]
  if (valid == IP_REASS_VALIDATE_PBUF_DROPPED) {
 80262bc:	697b      	ldr	r3, [r7, #20]
 80262be:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 80262c2:	f000 809b 	beq.w	80263fc <ip4_reass+0x2c4>
  /* if we come here, the pbuf has been enqueued */

  /* Track the current number of pbufs current 'in-flight', in order to limit
     the number of fragments that may be enqueued at any one time
     (overflow checked by testing against IP_REASS_MAX_PBUFS) */
  ip_reass_pbufcount = (u16_t)(ip_reass_pbufcount + clen);
 80262c6:	4b48      	ldr	r3, [pc, #288]	@ (80263e8 <ip4_reass+0x2b0>)
 80262c8:	881a      	ldrh	r2, [r3, #0]
 80262ca:	8c3b      	ldrh	r3, [r7, #32]
 80262cc:	4413      	add	r3, r2
 80262ce:	b29a      	uxth	r2, r3
 80262d0:	4b45      	ldr	r3, [pc, #276]	@ (80263e8 <ip4_reass+0x2b0>)
 80262d2:	801a      	strh	r2, [r3, #0]
  if (is_last) {
 80262d4:	69fb      	ldr	r3, [r7, #28]
 80262d6:	2b00      	cmp	r3, #0
 80262d8:	d00d      	beq.n	80262f6 <ip4_reass+0x1be>
    u16_t datagram_len = (u16_t)(offset + len);
 80262da:	8cfa      	ldrh	r2, [r7, #38]	@ 0x26
 80262dc:	8cbb      	ldrh	r3, [r7, #36]	@ 0x24
 80262de:	4413      	add	r3, r2
 80262e0:	827b      	strh	r3, [r7, #18]
    ipr->datagram_len = datagram_len;
 80262e2:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80262e4:	8a7a      	ldrh	r2, [r7, #18]
 80262e6:	839a      	strh	r2, [r3, #28]
    ipr->flags |= IP_REASS_FLAG_LASTFRAG;
 80262e8:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80262ea:	7f9b      	ldrb	r3, [r3, #30]
 80262ec:	f043 0301 	orr.w	r3, r3, #1
 80262f0:	b2da      	uxtb	r2, r3
 80262f2:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80262f4:	779a      	strb	r2, [r3, #30]
    LWIP_DEBUGF(IP_REASS_DEBUG,
                ("ip4_reass: last fragment seen, total len %"S16_F"\n",
                 ipr->datagram_len));
  }

  if (valid == IP_REASS_VALIDATE_TELEGRAM_FINISHED) {
 80262f6:	697b      	ldr	r3, [r7, #20]
 80262f8:	2b01      	cmp	r3, #1
 80262fa:	d171      	bne.n	80263e0 <ip4_reass+0x2a8>
    struct ip_reassdata *ipr_prev;
    /* the totally last fragment (flag more fragments = 0) was received at least
     * once AND all fragments are received */
    u16_t datagram_len = (u16_t)(ipr->datagram_len + IP_HLEN);
 80262fc:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80262fe:	8b9b      	ldrh	r3, [r3, #28]
 8026300:	3314      	adds	r3, #20
 8026302:	823b      	strh	r3, [r7, #16]

    /* save the second pbuf before copying the header over the pointer */
    r = ((struct ip_reass_helper *)ipr->p->payload)->next_pbuf;
 8026304:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8026306:	685b      	ldr	r3, [r3, #4]
 8026308:	685b      	ldr	r3, [r3, #4]
 802630a:	681b      	ldr	r3, [r3, #0]
 802630c:	62fb      	str	r3, [r7, #44]	@ 0x2c

    /* copy the original ip header back to the first pbuf */
    fraghdr = (struct ip_hdr *)(ipr->p->payload);
 802630e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8026310:	685b      	ldr	r3, [r3, #4]
 8026312:	685b      	ldr	r3, [r3, #4]
 8026314:	62bb      	str	r3, [r7, #40]	@ 0x28
    SMEMCPY(fraghdr, &ipr->iphdr, IP_HLEN);
 8026316:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8026318:	3308      	adds	r3, #8
 802631a:	2214      	movs	r2, #20
 802631c:	4619      	mov	r1, r3
 802631e:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 8026320:	f004 f9d5 	bl	802a6ce <memcpy>
    IPH_LEN_SET(fraghdr, lwip_htons(datagram_len));
 8026324:	8a3b      	ldrh	r3, [r7, #16]
 8026326:	4618      	mov	r0, r3
 8026328:	f7f2 ffee 	bl	8019308 <lwip_htons>
 802632c:	4603      	mov	r3, r0
 802632e:	461a      	mov	r2, r3
 8026330:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8026332:	805a      	strh	r2, [r3, #2]
    IPH_OFFSET_SET(fraghdr, 0);
 8026334:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8026336:	2200      	movs	r2, #0
 8026338:	719a      	strb	r2, [r3, #6]
 802633a:	2200      	movs	r2, #0
 802633c:	71da      	strb	r2, [r3, #7]
    IPH_CHKSUM_SET(fraghdr, 0);
 802633e:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8026340:	2200      	movs	r2, #0
 8026342:	729a      	strb	r2, [r3, #10]
 8026344:	2200      	movs	r2, #0
 8026346:	72da      	strb	r2, [r3, #11]
    IF__NETIF_CHECKSUM_ENABLED(ip_current_input_netif(), NETIF_CHECKSUM_GEN_IP) {
      IPH_CHKSUM_SET(fraghdr, inet_chksum(fraghdr, IP_HLEN));
    }
#endif /* CHECKSUM_GEN_IP */

    p = ipr->p;
 8026348:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 802634a:	685b      	ldr	r3, [r3, #4]
 802634c:	607b      	str	r3, [r7, #4]

    /* chain together the pbufs contained within the reass_data list. */
    while (r != NULL) {
 802634e:	e00d      	b.n	802636c <ip4_reass+0x234>
      iprh = (struct ip_reass_helper *)r->payload;
 8026350:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8026352:	685b      	ldr	r3, [r3, #4]
 8026354:	60fb      	str	r3, [r7, #12]

      /* hide the ip header for every succeeding fragment */
      pbuf_remove_header(r, IP_HLEN);
 8026356:	2114      	movs	r1, #20
 8026358:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 802635a:	f7f4 fbff 	bl	801ab5c <pbuf_remove_header>
      pbuf_cat(p, r);
 802635e:	6af9      	ldr	r1, [r7, #44]	@ 0x2c
 8026360:	6878      	ldr	r0, [r7, #4]
 8026362:	f7f4 fd81 	bl	801ae68 <pbuf_cat>
      r = iprh->next_pbuf;
 8026366:	68fb      	ldr	r3, [r7, #12]
 8026368:	681b      	ldr	r3, [r3, #0]
 802636a:	62fb      	str	r3, [r7, #44]	@ 0x2c
    while (r != NULL) {
 802636c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 802636e:	2b00      	cmp	r3, #0
 8026370:	d1ee      	bne.n	8026350 <ip4_reass+0x218>
    }

    /* find the previous entry in the linked list */
    if (ipr == reassdatagrams) {
 8026372:	4b1e      	ldr	r3, [pc, #120]	@ (80263ec <ip4_reass+0x2b4>)
 8026374:	681b      	ldr	r3, [r3, #0]
 8026376:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 8026378:	429a      	cmp	r2, r3
 802637a:	d102      	bne.n	8026382 <ip4_reass+0x24a>
      ipr_prev = NULL;
 802637c:	2300      	movs	r3, #0
 802637e:	637b      	str	r3, [r7, #52]	@ 0x34
 8026380:	e010      	b.n	80263a4 <ip4_reass+0x26c>
    } else {
      for (ipr_prev = reassdatagrams; ipr_prev != NULL; ipr_prev = ipr_prev->next) {
 8026382:	4b1a      	ldr	r3, [pc, #104]	@ (80263ec <ip4_reass+0x2b4>)
 8026384:	681b      	ldr	r3, [r3, #0]
 8026386:	637b      	str	r3, [r7, #52]	@ 0x34
 8026388:	e007      	b.n	802639a <ip4_reass+0x262>
        if (ipr_prev->next == ipr) {
 802638a:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 802638c:	681b      	ldr	r3, [r3, #0]
 802638e:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 8026390:	429a      	cmp	r2, r3
 8026392:	d006      	beq.n	80263a2 <ip4_reass+0x26a>
      for (ipr_prev = reassdatagrams; ipr_prev != NULL; ipr_prev = ipr_prev->next) {
 8026394:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8026396:	681b      	ldr	r3, [r3, #0]
 8026398:	637b      	str	r3, [r7, #52]	@ 0x34
 802639a:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 802639c:	2b00      	cmp	r3, #0
 802639e:	d1f4      	bne.n	802638a <ip4_reass+0x252>
 80263a0:	e000      	b.n	80263a4 <ip4_reass+0x26c>
          break;
 80263a2:	bf00      	nop
        }
      }
    }

    /* release the sources allocate for the fragment queue entry */
    ip_reass_dequeue_datagram(ipr, ipr_prev);
 80263a4:	6b79      	ldr	r1, [r7, #52]	@ 0x34
 80263a6:	6b38      	ldr	r0, [r7, #48]	@ 0x30
 80263a8:	f7ff fd2e 	bl	8025e08 <ip_reass_dequeue_datagram>

    /* and adjust the number of pbufs currently queued for reassembly. */
    clen = pbuf_clen(p);
 80263ac:	6878      	ldr	r0, [r7, #4]
 80263ae:	f7f4 fd1b 	bl	801ade8 <pbuf_clen>
 80263b2:	4603      	mov	r3, r0
 80263b4:	843b      	strh	r3, [r7, #32]
    LWIP_ASSERT("ip_reass_pbufcount >= clen", ip_reass_pbufcount >= clen);
 80263b6:	4b0c      	ldr	r3, [pc, #48]	@ (80263e8 <ip4_reass+0x2b0>)
 80263b8:	881b      	ldrh	r3, [r3, #0]
 80263ba:	8c3a      	ldrh	r2, [r7, #32]
 80263bc:	429a      	cmp	r2, r3
 80263be:	d906      	bls.n	80263ce <ip4_reass+0x296>
 80263c0:	4b0b      	ldr	r3, [pc, #44]	@ (80263f0 <ip4_reass+0x2b8>)
 80263c2:	f240 229b 	movw	r2, #667	@ 0x29b
 80263c6:	490b      	ldr	r1, [pc, #44]	@ (80263f4 <ip4_reass+0x2bc>)
 80263c8:	480b      	ldr	r0, [pc, #44]	@ (80263f8 <ip4_reass+0x2c0>)
 80263ca:	f003 fef7 	bl	802a1bc <iprintf>
    ip_reass_pbufcount = (u16_t)(ip_reass_pbufcount - clen);
 80263ce:	4b06      	ldr	r3, [pc, #24]	@ (80263e8 <ip4_reass+0x2b0>)
 80263d0:	881a      	ldrh	r2, [r3, #0]
 80263d2:	8c3b      	ldrh	r3, [r7, #32]
 80263d4:	1ad3      	subs	r3, r2, r3
 80263d6:	b29a      	uxth	r2, r3
 80263d8:	4b03      	ldr	r3, [pc, #12]	@ (80263e8 <ip4_reass+0x2b0>)
 80263da:	801a      	strh	r2, [r3, #0]

    MIB2_STATS_INC(mib2.ipreasmoks);

    /* Return the pbuf chain */
    return p;
 80263dc:	687b      	ldr	r3, [r7, #4]
 80263de:	e038      	b.n	8026452 <ip4_reass+0x31a>
  }
  /* the datagram is not (yet?) reassembled completely */
  LWIP_DEBUGF(IP_REASS_DEBUG, ("ip_reass_pbufcount: %d out\n", ip_reass_pbufcount));
  return NULL;
 80263e0:	2300      	movs	r3, #0
 80263e2:	e036      	b.n	8026452 <ip4_reass+0x31a>
      goto nullreturn_ipr;
 80263e4:	bf00      	nop
 80263e6:	e00a      	b.n	80263fe <ip4_reass+0x2c6>
 80263e8:	2402b0f8 	.word	0x2402b0f8
 80263ec:	2402b0f4 	.word	0x2402b0f4
 80263f0:	08030f00 	.word	0x08030f00
 80263f4:	08031070 	.word	0x08031070
 80263f8:	08030f48 	.word	0x08030f48
    goto nullreturn_ipr;
 80263fc:	bf00      	nop

nullreturn_ipr:
  LWIP_ASSERT("ipr != NULL", ipr != NULL);
 80263fe:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8026400:	2b00      	cmp	r3, #0
 8026402:	d106      	bne.n	8026412 <ip4_reass+0x2da>
 8026404:	4b15      	ldr	r3, [pc, #84]	@ (802645c <ip4_reass+0x324>)
 8026406:	f44f 722a 	mov.w	r2, #680	@ 0x2a8
 802640a:	4915      	ldr	r1, [pc, #84]	@ (8026460 <ip4_reass+0x328>)
 802640c:	4815      	ldr	r0, [pc, #84]	@ (8026464 <ip4_reass+0x32c>)
 802640e:	f003 fed5 	bl	802a1bc <iprintf>
  if (ipr->p == NULL) {
 8026412:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8026414:	685b      	ldr	r3, [r3, #4]
 8026416:	2b00      	cmp	r3, #0
 8026418:	d116      	bne.n	8026448 <ip4_reass+0x310>
    /* dropped pbuf after creating a new datagram entry: remove the entry, too */
    LWIP_ASSERT("not firstalthough just enqueued", ipr == reassdatagrams);
 802641a:	4b13      	ldr	r3, [pc, #76]	@ (8026468 <ip4_reass+0x330>)
 802641c:	681b      	ldr	r3, [r3, #0]
 802641e:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 8026420:	429a      	cmp	r2, r3
 8026422:	d006      	beq.n	8026432 <ip4_reass+0x2fa>
 8026424:	4b0d      	ldr	r3, [pc, #52]	@ (802645c <ip4_reass+0x324>)
 8026426:	f240 22ab 	movw	r2, #683	@ 0x2ab
 802642a:	4910      	ldr	r1, [pc, #64]	@ (802646c <ip4_reass+0x334>)
 802642c:	480d      	ldr	r0, [pc, #52]	@ (8026464 <ip4_reass+0x32c>)
 802642e:	f003 fec5 	bl	802a1bc <iprintf>
    ip_reass_dequeue_datagram(ipr, NULL);
 8026432:	2100      	movs	r1, #0
 8026434:	6b38      	ldr	r0, [r7, #48]	@ 0x30
 8026436:	f7ff fce7 	bl	8025e08 <ip_reass_dequeue_datagram>
 802643a:	e006      	b.n	802644a <ip4_reass+0x312>
    goto nullreturn;
 802643c:	bf00      	nop
 802643e:	e004      	b.n	802644a <ip4_reass+0x312>
    goto nullreturn;
 8026440:	bf00      	nop
 8026442:	e002      	b.n	802644a <ip4_reass+0x312>
      goto nullreturn;
 8026444:	bf00      	nop
 8026446:	e000      	b.n	802644a <ip4_reass+0x312>
  }

nullreturn:
 8026448:	bf00      	nop
  LWIP_DEBUGF(IP_REASS_DEBUG, ("ip4_reass: nullreturn\n"));
  IPFRAG_STATS_INC(ip_frag.drop);
  pbuf_free(p);
 802644a:	6878      	ldr	r0, [r7, #4]
 802644c:	f7f4 fc3e 	bl	801accc <pbuf_free>
  return NULL;
 8026450:	2300      	movs	r3, #0
}
 8026452:	4618      	mov	r0, r3
 8026454:	3738      	adds	r7, #56	@ 0x38
 8026456:	46bd      	mov	sp, r7
 8026458:	bd80      	pop	{r7, pc}
 802645a:	bf00      	nop
 802645c:	08030f00 	.word	0x08030f00
 8026460:	0803108c 	.word	0x0803108c
 8026464:	08030f48 	.word	0x08030f48
 8026468:	2402b0f4 	.word	0x2402b0f4
 802646c:	08031098 	.word	0x08031098

08026470 <ip_frag_alloc_pbuf_custom_ref>:
#if IP_FRAG
#if !LWIP_NETIF_TX_SINGLE_PBUF
/** Allocate a new struct pbuf_custom_ref */
static struct pbuf_custom_ref *
ip_frag_alloc_pbuf_custom_ref(void)
{
 8026470:	b580      	push	{r7, lr}
 8026472:	af00      	add	r7, sp, #0
  return (struct pbuf_custom_ref *)memp_malloc(MEMP_FRAG_PBUF);
 8026474:	2005      	movs	r0, #5
 8026476:	f7f3 fcc5 	bl	8019e04 <memp_malloc>
 802647a:	4603      	mov	r3, r0
}
 802647c:	4618      	mov	r0, r3
 802647e:	bd80      	pop	{r7, pc}

08026480 <ip_frag_free_pbuf_custom_ref>:

/** Free a struct pbuf_custom_ref */
static void
ip_frag_free_pbuf_custom_ref(struct pbuf_custom_ref *p)
{
 8026480:	b580      	push	{r7, lr}
 8026482:	b082      	sub	sp, #8
 8026484:	af00      	add	r7, sp, #0
 8026486:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT("p != NULL", p != NULL);
 8026488:	687b      	ldr	r3, [r7, #4]
 802648a:	2b00      	cmp	r3, #0
 802648c:	d106      	bne.n	802649c <ip_frag_free_pbuf_custom_ref+0x1c>
 802648e:	4b07      	ldr	r3, [pc, #28]	@ (80264ac <ip_frag_free_pbuf_custom_ref+0x2c>)
 8026490:	f44f 7231 	mov.w	r2, #708	@ 0x2c4
 8026494:	4906      	ldr	r1, [pc, #24]	@ (80264b0 <ip_frag_free_pbuf_custom_ref+0x30>)
 8026496:	4807      	ldr	r0, [pc, #28]	@ (80264b4 <ip_frag_free_pbuf_custom_ref+0x34>)
 8026498:	f003 fe90 	bl	802a1bc <iprintf>
  memp_free(MEMP_FRAG_PBUF, p);
 802649c:	6879      	ldr	r1, [r7, #4]
 802649e:	2005      	movs	r0, #5
 80264a0:	f7f3 fd26 	bl	8019ef0 <memp_free>
}
 80264a4:	bf00      	nop
 80264a6:	3708      	adds	r7, #8
 80264a8:	46bd      	mov	sp, r7
 80264aa:	bd80      	pop	{r7, pc}
 80264ac:	08030f00 	.word	0x08030f00
 80264b0:	080310b8 	.word	0x080310b8
 80264b4:	08030f48 	.word	0x08030f48

080264b8 <ipfrag_free_pbuf_custom>:

/** Free-callback function to free a 'struct pbuf_custom_ref', called by
 * pbuf_free. */
static void
ipfrag_free_pbuf_custom(struct pbuf *p)
{
 80264b8:	b580      	push	{r7, lr}
 80264ba:	b084      	sub	sp, #16
 80264bc:	af00      	add	r7, sp, #0
 80264be:	6078      	str	r0, [r7, #4]
  struct pbuf_custom_ref *pcr = (struct pbuf_custom_ref *)p;
 80264c0:	687b      	ldr	r3, [r7, #4]
 80264c2:	60fb      	str	r3, [r7, #12]
  LWIP_ASSERT("pcr != NULL", pcr != NULL);
 80264c4:	68fb      	ldr	r3, [r7, #12]
 80264c6:	2b00      	cmp	r3, #0
 80264c8:	d106      	bne.n	80264d8 <ipfrag_free_pbuf_custom+0x20>
 80264ca:	4b11      	ldr	r3, [pc, #68]	@ (8026510 <ipfrag_free_pbuf_custom+0x58>)
 80264cc:	f240 22ce 	movw	r2, #718	@ 0x2ce
 80264d0:	4910      	ldr	r1, [pc, #64]	@ (8026514 <ipfrag_free_pbuf_custom+0x5c>)
 80264d2:	4811      	ldr	r0, [pc, #68]	@ (8026518 <ipfrag_free_pbuf_custom+0x60>)
 80264d4:	f003 fe72 	bl	802a1bc <iprintf>
  LWIP_ASSERT("pcr == p", (void *)pcr == (void *)p);
 80264d8:	68fa      	ldr	r2, [r7, #12]
 80264da:	687b      	ldr	r3, [r7, #4]
 80264dc:	429a      	cmp	r2, r3
 80264de:	d006      	beq.n	80264ee <ipfrag_free_pbuf_custom+0x36>
 80264e0:	4b0b      	ldr	r3, [pc, #44]	@ (8026510 <ipfrag_free_pbuf_custom+0x58>)
 80264e2:	f240 22cf 	movw	r2, #719	@ 0x2cf
 80264e6:	490d      	ldr	r1, [pc, #52]	@ (802651c <ipfrag_free_pbuf_custom+0x64>)
 80264e8:	480b      	ldr	r0, [pc, #44]	@ (8026518 <ipfrag_free_pbuf_custom+0x60>)
 80264ea:	f003 fe67 	bl	802a1bc <iprintf>
  if (pcr->original != NULL) {
 80264ee:	68fb      	ldr	r3, [r7, #12]
 80264f0:	695b      	ldr	r3, [r3, #20]
 80264f2:	2b00      	cmp	r3, #0
 80264f4:	d004      	beq.n	8026500 <ipfrag_free_pbuf_custom+0x48>
    pbuf_free(pcr->original);
 80264f6:	68fb      	ldr	r3, [r7, #12]
 80264f8:	695b      	ldr	r3, [r3, #20]
 80264fa:	4618      	mov	r0, r3
 80264fc:	f7f4 fbe6 	bl	801accc <pbuf_free>
  }
  ip_frag_free_pbuf_custom_ref(pcr);
 8026500:	68f8      	ldr	r0, [r7, #12]
 8026502:	f7ff ffbd 	bl	8026480 <ip_frag_free_pbuf_custom_ref>
}
 8026506:	bf00      	nop
 8026508:	3710      	adds	r7, #16
 802650a:	46bd      	mov	sp, r7
 802650c:	bd80      	pop	{r7, pc}
 802650e:	bf00      	nop
 8026510:	08030f00 	.word	0x08030f00
 8026514:	080310c4 	.word	0x080310c4
 8026518:	08030f48 	.word	0x08030f48
 802651c:	080310d0 	.word	0x080310d0

08026520 <ip4_frag>:
 *
 * @return ERR_OK if sent successfully, err_t otherwise
 */
err_t
ip4_frag(struct pbuf *p, struct netif *netif, const ip4_addr_t *dest)
{
 8026520:	b580      	push	{r7, lr}
 8026522:	b094      	sub	sp, #80	@ 0x50
 8026524:	af02      	add	r7, sp, #8
 8026526:	60f8      	str	r0, [r7, #12]
 8026528:	60b9      	str	r1, [r7, #8]
 802652a:	607a      	str	r2, [r7, #4]
  struct pbuf *rambuf;
#if !LWIP_NETIF_TX_SINGLE_PBUF
  struct pbuf *newpbuf;
  u16_t newpbuflen = 0;
 802652c:	2300      	movs	r3, #0
 802652e:	f8a7 3046 	strh.w	r3, [r7, #70]	@ 0x46
  u16_t left_to_copy;
#endif
  struct ip_hdr *original_iphdr;
  struct ip_hdr *iphdr;
  const u16_t nfb = (u16_t)((netif->mtu - IP_HLEN) / 8);
 8026532:	68bb      	ldr	r3, [r7, #8]
 8026534:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 8026536:	3b14      	subs	r3, #20
 8026538:	2b00      	cmp	r3, #0
 802653a:	da00      	bge.n	802653e <ip4_frag+0x1e>
 802653c:	3307      	adds	r3, #7
 802653e:	10db      	asrs	r3, r3, #3
 8026540:	877b      	strh	r3, [r7, #58]	@ 0x3a
  u16_t left, fragsize;
  u16_t ofo;
  int last;
  u16_t poff = IP_HLEN;
 8026542:	2314      	movs	r3, #20
 8026544:	87fb      	strh	r3, [r7, #62]	@ 0x3e
  u16_t tmp;
  int mf_set;

  original_iphdr = (struct ip_hdr *)p->payload;
 8026546:	68fb      	ldr	r3, [r7, #12]
 8026548:	685b      	ldr	r3, [r3, #4]
 802654a:	637b      	str	r3, [r7, #52]	@ 0x34
  iphdr = original_iphdr;
 802654c:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 802654e:	633b      	str	r3, [r7, #48]	@ 0x30
  if (IPH_HL_BYTES(iphdr) != IP_HLEN) {
 8026550:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8026552:	781b      	ldrb	r3, [r3, #0]
 8026554:	f003 030f 	and.w	r3, r3, #15
 8026558:	b2db      	uxtb	r3, r3
 802655a:	009b      	lsls	r3, r3, #2
 802655c:	b2db      	uxtb	r3, r3
 802655e:	2b14      	cmp	r3, #20
 8026560:	d002      	beq.n	8026568 <ip4_frag+0x48>
    /* ip4_frag() does not support IP options */
    return ERR_VAL;
 8026562:	f06f 0305 	mvn.w	r3, #5
 8026566:	e110      	b.n	802678a <ip4_frag+0x26a>
  }
  LWIP_ERROR("ip4_frag(): pbuf too short", p->len >= IP_HLEN, return ERR_VAL);
 8026568:	68fb      	ldr	r3, [r7, #12]
 802656a:	895b      	ldrh	r3, [r3, #10]
 802656c:	2b13      	cmp	r3, #19
 802656e:	d809      	bhi.n	8026584 <ip4_frag+0x64>
 8026570:	4b88      	ldr	r3, [pc, #544]	@ (8026794 <ip4_frag+0x274>)
 8026572:	f44f 723f 	mov.w	r2, #764	@ 0x2fc
 8026576:	4988      	ldr	r1, [pc, #544]	@ (8026798 <ip4_frag+0x278>)
 8026578:	4888      	ldr	r0, [pc, #544]	@ (802679c <ip4_frag+0x27c>)
 802657a:	f003 fe1f 	bl	802a1bc <iprintf>
 802657e:	f06f 0305 	mvn.w	r3, #5
 8026582:	e102      	b.n	802678a <ip4_frag+0x26a>

  /* Save original offset */
  tmp = lwip_ntohs(IPH_OFFSET(iphdr));
 8026584:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8026586:	88db      	ldrh	r3, [r3, #6]
 8026588:	b29b      	uxth	r3, r3
 802658a:	4618      	mov	r0, r3
 802658c:	f7f2 febc 	bl	8019308 <lwip_htons>
 8026590:	4603      	mov	r3, r0
 8026592:	87bb      	strh	r3, [r7, #60]	@ 0x3c
  ofo = tmp & IP_OFFMASK;
 8026594:	8fbb      	ldrh	r3, [r7, #60]	@ 0x3c
 8026596:	f3c3 030c 	ubfx	r3, r3, #0, #13
 802659a:	f8a7 3040 	strh.w	r3, [r7, #64]	@ 0x40
  /* already fragmented? if so, the last fragment we create must have MF, too */
  mf_set = tmp & IP_MF;
 802659e:	8fbb      	ldrh	r3, [r7, #60]	@ 0x3c
 80265a0:	f403 5300 	and.w	r3, r3, #8192	@ 0x2000
 80265a4:	62fb      	str	r3, [r7, #44]	@ 0x2c

  left = (u16_t)(p->tot_len - IP_HLEN);
 80265a6:	68fb      	ldr	r3, [r7, #12]
 80265a8:	891b      	ldrh	r3, [r3, #8]
 80265aa:	3b14      	subs	r3, #20
 80265ac:	f8a7 3042 	strh.w	r3, [r7, #66]	@ 0x42

  while (left) {
 80265b0:	e0e1      	b.n	8026776 <ip4_frag+0x256>
    /* Fill this fragment */
    fragsize = LWIP_MIN(left, (u16_t)(nfb * 8));
 80265b2:	8f7b      	ldrh	r3, [r7, #58]	@ 0x3a
 80265b4:	00db      	lsls	r3, r3, #3
 80265b6:	b29b      	uxth	r3, r3
 80265b8:	f8b7 2042 	ldrh.w	r2, [r7, #66]	@ 0x42
 80265bc:	4293      	cmp	r3, r2
 80265be:	bf28      	it	cs
 80265c0:	4613      	movcs	r3, r2
 80265c2:	857b      	strh	r3, [r7, #42]	@ 0x2a
    /* When not using a static buffer, create a chain of pbufs.
     * The first will be a PBUF_RAM holding the link and IP header.
     * The rest will be PBUF_REFs mirroring the pbuf chain to be fragged,
     * but limited to the size of an mtu.
     */
    rambuf = pbuf_alloc(PBUF_LINK, IP_HLEN, PBUF_RAM);
 80265c4:	f44f 7220 	mov.w	r2, #640	@ 0x280
 80265c8:	2114      	movs	r1, #20
 80265ca:	200e      	movs	r0, #14
 80265cc:	f7f4 f868 	bl	801a6a0 <pbuf_alloc>
 80265d0:	6278      	str	r0, [r7, #36]	@ 0x24
    if (rambuf == NULL) {
 80265d2:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80265d4:	2b00      	cmp	r3, #0
 80265d6:	f000 80d5 	beq.w	8026784 <ip4_frag+0x264>
      goto memerr;
    }
    LWIP_ASSERT("this needs a pbuf in one piece!",
 80265da:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80265dc:	895b      	ldrh	r3, [r3, #10]
 80265de:	2b13      	cmp	r3, #19
 80265e0:	d806      	bhi.n	80265f0 <ip4_frag+0xd0>
 80265e2:	4b6c      	ldr	r3, [pc, #432]	@ (8026794 <ip4_frag+0x274>)
 80265e4:	f44f 7249 	mov.w	r2, #804	@ 0x324
 80265e8:	496d      	ldr	r1, [pc, #436]	@ (80267a0 <ip4_frag+0x280>)
 80265ea:	486c      	ldr	r0, [pc, #432]	@ (802679c <ip4_frag+0x27c>)
 80265ec:	f003 fde6 	bl	802a1bc <iprintf>
                (rambuf->len >= (IP_HLEN)));
    SMEMCPY(rambuf->payload, original_iphdr, IP_HLEN);
 80265f0:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80265f2:	685b      	ldr	r3, [r3, #4]
 80265f4:	2214      	movs	r2, #20
 80265f6:	6b79      	ldr	r1, [r7, #52]	@ 0x34
 80265f8:	4618      	mov	r0, r3
 80265fa:	f004 f868 	bl	802a6ce <memcpy>
    iphdr = (struct ip_hdr *)rambuf->payload;
 80265fe:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8026600:	685b      	ldr	r3, [r3, #4]
 8026602:	633b      	str	r3, [r7, #48]	@ 0x30

    left_to_copy = fragsize;
 8026604:	8d7b      	ldrh	r3, [r7, #42]	@ 0x2a
 8026606:	f8a7 3044 	strh.w	r3, [r7, #68]	@ 0x44
    while (left_to_copy) {
 802660a:	e064      	b.n	80266d6 <ip4_frag+0x1b6>
      struct pbuf_custom_ref *pcr;
      u16_t plen = (u16_t)(p->len - poff);
 802660c:	68fb      	ldr	r3, [r7, #12]
 802660e:	895a      	ldrh	r2, [r3, #10]
 8026610:	8ffb      	ldrh	r3, [r7, #62]	@ 0x3e
 8026612:	1ad3      	subs	r3, r2, r3
 8026614:	83fb      	strh	r3, [r7, #30]
      LWIP_ASSERT("p->len >= poff", p->len >= poff);
 8026616:	68fb      	ldr	r3, [r7, #12]
 8026618:	895b      	ldrh	r3, [r3, #10]
 802661a:	8ffa      	ldrh	r2, [r7, #62]	@ 0x3e
 802661c:	429a      	cmp	r2, r3
 802661e:	d906      	bls.n	802662e <ip4_frag+0x10e>
 8026620:	4b5c      	ldr	r3, [pc, #368]	@ (8026794 <ip4_frag+0x274>)
 8026622:	f240 322d 	movw	r2, #813	@ 0x32d
 8026626:	495f      	ldr	r1, [pc, #380]	@ (80267a4 <ip4_frag+0x284>)
 8026628:	485c      	ldr	r0, [pc, #368]	@ (802679c <ip4_frag+0x27c>)
 802662a:	f003 fdc7 	bl	802a1bc <iprintf>
      newpbuflen = LWIP_MIN(left_to_copy, plen);
 802662e:	8bfa      	ldrh	r2, [r7, #30]
 8026630:	f8b7 3044 	ldrh.w	r3, [r7, #68]	@ 0x44
 8026634:	4293      	cmp	r3, r2
 8026636:	bf28      	it	cs
 8026638:	4613      	movcs	r3, r2
 802663a:	f8a7 3046 	strh.w	r3, [r7, #70]	@ 0x46
      /* Is this pbuf already empty? */
      if (!newpbuflen) {
 802663e:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 8026642:	2b00      	cmp	r3, #0
 8026644:	d105      	bne.n	8026652 <ip4_frag+0x132>
        poff = 0;
 8026646:	2300      	movs	r3, #0
 8026648:	87fb      	strh	r3, [r7, #62]	@ 0x3e
        p = p->next;
 802664a:	68fb      	ldr	r3, [r7, #12]
 802664c:	681b      	ldr	r3, [r3, #0]
 802664e:	60fb      	str	r3, [r7, #12]
        continue;
 8026650:	e041      	b.n	80266d6 <ip4_frag+0x1b6>
      }
      pcr = ip_frag_alloc_pbuf_custom_ref();
 8026652:	f7ff ff0d 	bl	8026470 <ip_frag_alloc_pbuf_custom_ref>
 8026656:	61b8      	str	r0, [r7, #24]
      if (pcr == NULL) {
 8026658:	69bb      	ldr	r3, [r7, #24]
 802665a:	2b00      	cmp	r3, #0
 802665c:	d103      	bne.n	8026666 <ip4_frag+0x146>
        pbuf_free(rambuf);
 802665e:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 8026660:	f7f4 fb34 	bl	801accc <pbuf_free>
        goto memerr;
 8026664:	e08f      	b.n	8026786 <ip4_frag+0x266>
      }
      /* Mirror this pbuf, although we might not need all of it. */
      newpbuf = pbuf_alloced_custom(PBUF_RAW, newpbuflen, PBUF_REF, &pcr->pc,
 8026666:	69b8      	ldr	r0, [r7, #24]
                                    (u8_t *)p->payload + poff, newpbuflen);
 8026668:	68fb      	ldr	r3, [r7, #12]
 802666a:	685a      	ldr	r2, [r3, #4]
      newpbuf = pbuf_alloced_custom(PBUF_RAW, newpbuflen, PBUF_REF, &pcr->pc,
 802666c:	8ffb      	ldrh	r3, [r7, #62]	@ 0x3e
 802666e:	4413      	add	r3, r2
 8026670:	f8b7 1046 	ldrh.w	r1, [r7, #70]	@ 0x46
 8026674:	f8b7 2046 	ldrh.w	r2, [r7, #70]	@ 0x46
 8026678:	9201      	str	r2, [sp, #4]
 802667a:	9300      	str	r3, [sp, #0]
 802667c:	4603      	mov	r3, r0
 802667e:	2241      	movs	r2, #65	@ 0x41
 8026680:	2000      	movs	r0, #0
 8026682:	f7f4 f939 	bl	801a8f8 <pbuf_alloced_custom>
 8026686:	6178      	str	r0, [r7, #20]
      if (newpbuf == NULL) {
 8026688:	697b      	ldr	r3, [r7, #20]
 802668a:	2b00      	cmp	r3, #0
 802668c:	d106      	bne.n	802669c <ip4_frag+0x17c>
        ip_frag_free_pbuf_custom_ref(pcr);
 802668e:	69b8      	ldr	r0, [r7, #24]
 8026690:	f7ff fef6 	bl	8026480 <ip_frag_free_pbuf_custom_ref>
        pbuf_free(rambuf);
 8026694:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 8026696:	f7f4 fb19 	bl	801accc <pbuf_free>
        goto memerr;
 802669a:	e074      	b.n	8026786 <ip4_frag+0x266>
      }
      pbuf_ref(p);
 802669c:	68f8      	ldr	r0, [r7, #12]
 802669e:	f7f4 fbbb 	bl	801ae18 <pbuf_ref>
      pcr->original = p;
 80266a2:	69bb      	ldr	r3, [r7, #24]
 80266a4:	68fa      	ldr	r2, [r7, #12]
 80266a6:	615a      	str	r2, [r3, #20]
      pcr->pc.custom_free_function = ipfrag_free_pbuf_custom;
 80266a8:	69bb      	ldr	r3, [r7, #24]
 80266aa:	4a3f      	ldr	r2, [pc, #252]	@ (80267a8 <ip4_frag+0x288>)
 80266ac:	611a      	str	r2, [r3, #16]

      /* Add it to end of rambuf's chain, but using pbuf_cat, not pbuf_chain
       * so that it is removed when pbuf_dechain is later called on rambuf.
       */
      pbuf_cat(rambuf, newpbuf);
 80266ae:	6979      	ldr	r1, [r7, #20]
 80266b0:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 80266b2:	f7f4 fbd9 	bl	801ae68 <pbuf_cat>
      left_to_copy = (u16_t)(left_to_copy - newpbuflen);
 80266b6:	f8b7 2044 	ldrh.w	r2, [r7, #68]	@ 0x44
 80266ba:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 80266be:	1ad3      	subs	r3, r2, r3
 80266c0:	f8a7 3044 	strh.w	r3, [r7, #68]	@ 0x44
      if (left_to_copy) {
 80266c4:	f8b7 3044 	ldrh.w	r3, [r7, #68]	@ 0x44
 80266c8:	2b00      	cmp	r3, #0
 80266ca:	d004      	beq.n	80266d6 <ip4_frag+0x1b6>
        poff = 0;
 80266cc:	2300      	movs	r3, #0
 80266ce:	87fb      	strh	r3, [r7, #62]	@ 0x3e
        p = p->next;
 80266d0:	68fb      	ldr	r3, [r7, #12]
 80266d2:	681b      	ldr	r3, [r3, #0]
 80266d4:	60fb      	str	r3, [r7, #12]
    while (left_to_copy) {
 80266d6:	f8b7 3044 	ldrh.w	r3, [r7, #68]	@ 0x44
 80266da:	2b00      	cmp	r3, #0
 80266dc:	d196      	bne.n	802660c <ip4_frag+0xec>
      }
    }
    poff = (u16_t)(poff + newpbuflen);
 80266de:	8ffa      	ldrh	r2, [r7, #62]	@ 0x3e
 80266e0:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 80266e4:	4413      	add	r3, r2
 80266e6:	87fb      	strh	r3, [r7, #62]	@ 0x3e
#endif /* LWIP_NETIF_TX_SINGLE_PBUF */

    /* Correct header */
    last = (left <= netif->mtu - IP_HLEN);
 80266e8:	68bb      	ldr	r3, [r7, #8]
 80266ea:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 80266ec:	f1a3 0213 	sub.w	r2, r3, #19
 80266f0:	f8b7 3042 	ldrh.w	r3, [r7, #66]	@ 0x42
 80266f4:	429a      	cmp	r2, r3
 80266f6:	bfcc      	ite	gt
 80266f8:	2301      	movgt	r3, #1
 80266fa:	2300      	movle	r3, #0
 80266fc:	b2db      	uxtb	r3, r3
 80266fe:	623b      	str	r3, [r7, #32]

    /* Set new offset and MF flag */
    tmp = (IP_OFFMASK & (ofo));
 8026700:	f8b7 3040 	ldrh.w	r3, [r7, #64]	@ 0x40
 8026704:	f3c3 030c 	ubfx	r3, r3, #0, #13
 8026708:	87bb      	strh	r3, [r7, #60]	@ 0x3c
    if (!last || mf_set) {
 802670a:	6a3b      	ldr	r3, [r7, #32]
 802670c:	2b00      	cmp	r3, #0
 802670e:	d002      	beq.n	8026716 <ip4_frag+0x1f6>
 8026710:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8026712:	2b00      	cmp	r3, #0
 8026714:	d003      	beq.n	802671e <ip4_frag+0x1fe>
      /* the last fragment has MF set if the input frame had it */
      tmp = tmp | IP_MF;
 8026716:	8fbb      	ldrh	r3, [r7, #60]	@ 0x3c
 8026718:	f443 5300 	orr.w	r3, r3, #8192	@ 0x2000
 802671c:	87bb      	strh	r3, [r7, #60]	@ 0x3c
    }
    IPH_OFFSET_SET(iphdr, lwip_htons(tmp));
 802671e:	8fbb      	ldrh	r3, [r7, #60]	@ 0x3c
 8026720:	4618      	mov	r0, r3
 8026722:	f7f2 fdf1 	bl	8019308 <lwip_htons>
 8026726:	4603      	mov	r3, r0
 8026728:	461a      	mov	r2, r3
 802672a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 802672c:	80da      	strh	r2, [r3, #6]
    IPH_LEN_SET(iphdr, lwip_htons((u16_t)(fragsize + IP_HLEN)));
 802672e:	8d7b      	ldrh	r3, [r7, #42]	@ 0x2a
 8026730:	3314      	adds	r3, #20
 8026732:	b29b      	uxth	r3, r3
 8026734:	4618      	mov	r0, r3
 8026736:	f7f2 fde7 	bl	8019308 <lwip_htons>
 802673a:	4603      	mov	r3, r0
 802673c:	461a      	mov	r2, r3
 802673e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8026740:	805a      	strh	r2, [r3, #2]
    IPH_CHKSUM_SET(iphdr, 0);
 8026742:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8026744:	2200      	movs	r2, #0
 8026746:	729a      	strb	r2, [r3, #10]
 8026748:	2200      	movs	r2, #0
 802674a:	72da      	strb	r2, [r3, #11]
#endif /* CHECKSUM_GEN_IP */

    /* No need for separate header pbuf - we allowed room for it in rambuf
     * when allocated.
     */
    netif->output(netif, rambuf, dest);
 802674c:	68bb      	ldr	r3, [r7, #8]
 802674e:	695b      	ldr	r3, [r3, #20]
 8026750:	687a      	ldr	r2, [r7, #4]
 8026752:	6a79      	ldr	r1, [r7, #36]	@ 0x24
 8026754:	68b8      	ldr	r0, [r7, #8]
 8026756:	4798      	blx	r3
     * recreate it next time round the loop. If we're lucky the hardware
     * will have already sent the packet, the free will really free, and
     * there will be zero memory penalty.
     */

    pbuf_free(rambuf);
 8026758:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 802675a:	f7f4 fab7 	bl	801accc <pbuf_free>
    left = (u16_t)(left - fragsize);
 802675e:	f8b7 2042 	ldrh.w	r2, [r7, #66]	@ 0x42
 8026762:	8d7b      	ldrh	r3, [r7, #42]	@ 0x2a
 8026764:	1ad3      	subs	r3, r2, r3
 8026766:	f8a7 3042 	strh.w	r3, [r7, #66]	@ 0x42
    ofo = (u16_t)(ofo + nfb);
 802676a:	f8b7 2040 	ldrh.w	r2, [r7, #64]	@ 0x40
 802676e:	8f7b      	ldrh	r3, [r7, #58]	@ 0x3a
 8026770:	4413      	add	r3, r2
 8026772:	f8a7 3040 	strh.w	r3, [r7, #64]	@ 0x40
  while (left) {
 8026776:	f8b7 3042 	ldrh.w	r3, [r7, #66]	@ 0x42
 802677a:	2b00      	cmp	r3, #0
 802677c:	f47f af19 	bne.w	80265b2 <ip4_frag+0x92>
  }
  MIB2_STATS_INC(mib2.ipfragoks);
  return ERR_OK;
 8026780:	2300      	movs	r3, #0
 8026782:	e002      	b.n	802678a <ip4_frag+0x26a>
      goto memerr;
 8026784:	bf00      	nop
memerr:
  MIB2_STATS_INC(mib2.ipfragfails);
  return ERR_MEM;
 8026786:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
}
 802678a:	4618      	mov	r0, r3
 802678c:	3748      	adds	r7, #72	@ 0x48
 802678e:	46bd      	mov	sp, r7
 8026790:	bd80      	pop	{r7, pc}
 8026792:	bf00      	nop
 8026794:	08030f00 	.word	0x08030f00
 8026798:	080310dc 	.word	0x080310dc
 802679c:	08030f48 	.word	0x08030f48
 80267a0:	080310f8 	.word	0x080310f8
 80267a4:	08031118 	.word	0x08031118
 80267a8:	080264b9 	.word	0x080264b9

080267ac <ethernet_input>:
 * @see ETHARP_SUPPORT_VLAN
 * @see LWIP_HOOK_VLAN_CHECK
 */
err_t
ethernet_input(struct pbuf *p, struct netif *netif)
{
 80267ac:	b580      	push	{r7, lr}
 80267ae:	b086      	sub	sp, #24
 80267b0:	af00      	add	r7, sp, #0
 80267b2:	6078      	str	r0, [r7, #4]
 80267b4:	6039      	str	r1, [r7, #0]
  struct eth_hdr *ethhdr;
  u16_t type;
#if LWIP_ARP || ETHARP_SUPPORT_VLAN || LWIP_IPV6
  u16_t next_hdr_offset = SIZEOF_ETH_HDR;
 80267b6:	230e      	movs	r3, #14
 80267b8:	82fb      	strh	r3, [r7, #22]
#endif /* LWIP_ARP || ETHARP_SUPPORT_VLAN */

  LWIP_ASSERT_CORE_LOCKED();
 80267ba:	f7ea f95f 	bl	8010a7c <sys_check_core_locking>

  if (p->len <= SIZEOF_ETH_HDR) {
 80267be:	687b      	ldr	r3, [r7, #4]
 80267c0:	895b      	ldrh	r3, [r3, #10]
 80267c2:	2b0e      	cmp	r3, #14
 80267c4:	d96e      	bls.n	80268a4 <ethernet_input+0xf8>
    ETHARP_STATS_INC(etharp.drop);
    MIB2_STATS_NETIF_INC(netif, ifinerrors);
    goto free_and_return;
  }

  if (p->if_idx == NETIF_NO_INDEX) {
 80267c6:	687b      	ldr	r3, [r7, #4]
 80267c8:	7bdb      	ldrb	r3, [r3, #15]
 80267ca:	2b00      	cmp	r3, #0
 80267cc:	d106      	bne.n	80267dc <ethernet_input+0x30>
    p->if_idx = netif_get_index(netif);
 80267ce:	683b      	ldr	r3, [r7, #0]
 80267d0:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 80267d4:	3301      	adds	r3, #1
 80267d6:	b2da      	uxtb	r2, r3
 80267d8:	687b      	ldr	r3, [r7, #4]
 80267da:	73da      	strb	r2, [r3, #15]
  }

  /* points to packet payload, which starts with an Ethernet header */
  ethhdr = (struct eth_hdr *)p->payload;
 80267dc:	687b      	ldr	r3, [r7, #4]
 80267de:	685b      	ldr	r3, [r3, #4]
 80267e0:	613b      	str	r3, [r7, #16]
               (unsigned char)ethhdr->dest.addr[3], (unsigned char)ethhdr->dest.addr[4], (unsigned char)ethhdr->dest.addr[5],
               (unsigned char)ethhdr->src.addr[0],  (unsigned char)ethhdr->src.addr[1],  (unsigned char)ethhdr->src.addr[2],
               (unsigned char)ethhdr->src.addr[3],  (unsigned char)ethhdr->src.addr[4],  (unsigned char)ethhdr->src.addr[5],
               lwip_htons(ethhdr->type)));

  type = ethhdr->type;
 80267e2:	693b      	ldr	r3, [r7, #16]
 80267e4:	7b1a      	ldrb	r2, [r3, #12]
 80267e6:	7b5b      	ldrb	r3, [r3, #13]
 80267e8:	021b      	lsls	r3, r3, #8
 80267ea:	4313      	orrs	r3, r2
 80267ec:	81fb      	strh	r3, [r7, #14]

#if LWIP_ARP_FILTER_NETIF
  netif = LWIP_ARP_FILTER_NETIF_FN(p, netif, lwip_htons(type));
#endif /* LWIP_ARP_FILTER_NETIF*/

  if (ethhdr->dest.addr[0] & 1) {
 80267ee:	693b      	ldr	r3, [r7, #16]
 80267f0:	781b      	ldrb	r3, [r3, #0]
 80267f2:	f003 0301 	and.w	r3, r3, #1
 80267f6:	2b00      	cmp	r3, #0
 80267f8:	d023      	beq.n	8026842 <ethernet_input+0x96>
    /* this might be a multicast or broadcast packet */
    if (ethhdr->dest.addr[0] == LL_IP4_MULTICAST_ADDR_0) {
 80267fa:	693b      	ldr	r3, [r7, #16]
 80267fc:	781b      	ldrb	r3, [r3, #0]
 80267fe:	2b01      	cmp	r3, #1
 8026800:	d10f      	bne.n	8026822 <ethernet_input+0x76>
#if LWIP_IPV4
      if ((ethhdr->dest.addr[1] == LL_IP4_MULTICAST_ADDR_1) &&
 8026802:	693b      	ldr	r3, [r7, #16]
 8026804:	785b      	ldrb	r3, [r3, #1]
 8026806:	2b00      	cmp	r3, #0
 8026808:	d11b      	bne.n	8026842 <ethernet_input+0x96>
          (ethhdr->dest.addr[2] == LL_IP4_MULTICAST_ADDR_2)) {
 802680a:	693b      	ldr	r3, [r7, #16]
 802680c:	789b      	ldrb	r3, [r3, #2]
      if ((ethhdr->dest.addr[1] == LL_IP4_MULTICAST_ADDR_1) &&
 802680e:	2b5e      	cmp	r3, #94	@ 0x5e
 8026810:	d117      	bne.n	8026842 <ethernet_input+0x96>
        /* mark the pbuf as link-layer multicast */
        p->flags |= PBUF_FLAG_LLMCAST;
 8026812:	687b      	ldr	r3, [r7, #4]
 8026814:	7b5b      	ldrb	r3, [r3, #13]
 8026816:	f043 0310 	orr.w	r3, r3, #16
 802681a:	b2da      	uxtb	r2, r3
 802681c:	687b      	ldr	r3, [r7, #4]
 802681e:	735a      	strb	r2, [r3, #13]
 8026820:	e00f      	b.n	8026842 <ethernet_input+0x96>
             (ethhdr->dest.addr[1] == LL_IP6_MULTICAST_ADDR_1)) {
      /* mark the pbuf as link-layer multicast */
      p->flags |= PBUF_FLAG_LLMCAST;
    }
#endif /* LWIP_IPV6 */
    else if (eth_addr_cmp(&ethhdr->dest, &ethbroadcast)) {
 8026822:	693b      	ldr	r3, [r7, #16]
 8026824:	2206      	movs	r2, #6
 8026826:	4928      	ldr	r1, [pc, #160]	@ (80268c8 <ethernet_input+0x11c>)
 8026828:	4618      	mov	r0, r3
 802682a:	f003 fe2f 	bl	802a48c <memcmp>
 802682e:	4603      	mov	r3, r0
 8026830:	2b00      	cmp	r3, #0
 8026832:	d106      	bne.n	8026842 <ethernet_input+0x96>
      /* mark the pbuf as link-layer broadcast */
      p->flags |= PBUF_FLAG_LLBCAST;
 8026834:	687b      	ldr	r3, [r7, #4]
 8026836:	7b5b      	ldrb	r3, [r3, #13]
 8026838:	f043 0308 	orr.w	r3, r3, #8
 802683c:	b2da      	uxtb	r2, r3
 802683e:	687b      	ldr	r3, [r7, #4]
 8026840:	735a      	strb	r2, [r3, #13]
    }
  }

  switch (type) {
 8026842:	89fb      	ldrh	r3, [r7, #14]
 8026844:	2b08      	cmp	r3, #8
 8026846:	d003      	beq.n	8026850 <ethernet_input+0xa4>
 8026848:	f5b3 6fc1 	cmp.w	r3, #1544	@ 0x608
 802684c:	d014      	beq.n	8026878 <ethernet_input+0xcc>
      }
#endif
      ETHARP_STATS_INC(etharp.proterr);
      ETHARP_STATS_INC(etharp.drop);
      MIB2_STATS_NETIF_INC(netif, ifinunknownprotos);
      goto free_and_return;
 802684e:	e032      	b.n	80268b6 <ethernet_input+0x10a>
      if (!(netif->flags & NETIF_FLAG_ETHARP)) {
 8026850:	683b      	ldr	r3, [r7, #0]
 8026852:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 8026856:	f003 0308 	and.w	r3, r3, #8
 802685a:	2b00      	cmp	r3, #0
 802685c:	d024      	beq.n	80268a8 <ethernet_input+0xfc>
      if (pbuf_remove_header(p, next_hdr_offset)) {
 802685e:	8afb      	ldrh	r3, [r7, #22]
 8026860:	4619      	mov	r1, r3
 8026862:	6878      	ldr	r0, [r7, #4]
 8026864:	f7f4 f97a 	bl	801ab5c <pbuf_remove_header>
 8026868:	4603      	mov	r3, r0
 802686a:	2b00      	cmp	r3, #0
 802686c:	d11e      	bne.n	80268ac <ethernet_input+0x100>
        ip4_input(p, netif);
 802686e:	6839      	ldr	r1, [r7, #0]
 8026870:	6878      	ldr	r0, [r7, #4]
 8026872:	f7fe fd2f 	bl	80252d4 <ip4_input>
      break;
 8026876:	e013      	b.n	80268a0 <ethernet_input+0xf4>
      if (!(netif->flags & NETIF_FLAG_ETHARP)) {
 8026878:	683b      	ldr	r3, [r7, #0]
 802687a:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 802687e:	f003 0308 	and.w	r3, r3, #8
 8026882:	2b00      	cmp	r3, #0
 8026884:	d014      	beq.n	80268b0 <ethernet_input+0x104>
      if (pbuf_remove_header(p, next_hdr_offset)) {
 8026886:	8afb      	ldrh	r3, [r7, #22]
 8026888:	4619      	mov	r1, r3
 802688a:	6878      	ldr	r0, [r7, #4]
 802688c:	f7f4 f966 	bl	801ab5c <pbuf_remove_header>
 8026890:	4603      	mov	r3, r0
 8026892:	2b00      	cmp	r3, #0
 8026894:	d10e      	bne.n	80268b4 <ethernet_input+0x108>
        etharp_input(p, netif);
 8026896:	6839      	ldr	r1, [r7, #0]
 8026898:	6878      	ldr	r0, [r7, #4]
 802689a:	f7fd fe9d 	bl	80245d8 <etharp_input>
      break;
 802689e:	bf00      	nop
  }

  /* This means the pbuf is freed or consumed,
     so the caller doesn't have to free it again */
  return ERR_OK;
 80268a0:	2300      	movs	r3, #0
 80268a2:	e00c      	b.n	80268be <ethernet_input+0x112>
    goto free_and_return;
 80268a4:	bf00      	nop
 80268a6:	e006      	b.n	80268b6 <ethernet_input+0x10a>
        goto free_and_return;
 80268a8:	bf00      	nop
 80268aa:	e004      	b.n	80268b6 <ethernet_input+0x10a>
        goto free_and_return;
 80268ac:	bf00      	nop
 80268ae:	e002      	b.n	80268b6 <ethernet_input+0x10a>
        goto free_and_return;
 80268b0:	bf00      	nop
 80268b2:	e000      	b.n	80268b6 <ethernet_input+0x10a>
        goto free_and_return;
 80268b4:	bf00      	nop

free_and_return:
  pbuf_free(p);
 80268b6:	6878      	ldr	r0, [r7, #4]
 80268b8:	f7f4 fa08 	bl	801accc <pbuf_free>
  return ERR_OK;
 80268bc:	2300      	movs	r3, #0
}
 80268be:	4618      	mov	r0, r3
 80268c0:	3718      	adds	r7, #24
 80268c2:	46bd      	mov	sp, r7
 80268c4:	bd80      	pop	{r7, pc}
 80268c6:	bf00      	nop
 80268c8:	080314fc 	.word	0x080314fc

080268cc <ethernet_output>:
 * @return ERR_OK if the packet was sent, any other err_t on failure
 */
err_t
ethernet_output(struct netif * netif, struct pbuf * p,
                const struct eth_addr * src, const struct eth_addr * dst,
                u16_t eth_type) {
 80268cc:	b580      	push	{r7, lr}
 80268ce:	b086      	sub	sp, #24
 80268d0:	af00      	add	r7, sp, #0
 80268d2:	60f8      	str	r0, [r7, #12]
 80268d4:	60b9      	str	r1, [r7, #8]
 80268d6:	607a      	str	r2, [r7, #4]
 80268d8:	603b      	str	r3, [r7, #0]
  struct eth_hdr *ethhdr;
  u16_t eth_type_be = lwip_htons(eth_type);
 80268da:	8c3b      	ldrh	r3, [r7, #32]
 80268dc:	4618      	mov	r0, r3
 80268de:	f7f2 fd13 	bl	8019308 <lwip_htons>
 80268e2:	4603      	mov	r3, r0
 80268e4:	82fb      	strh	r3, [r7, #22]

    eth_type_be = PP_HTONS(ETHTYPE_VLAN);
  } else
#endif /* ETHARP_SUPPORT_VLAN && defined(LWIP_HOOK_VLAN_SET) */
  {
    if (pbuf_add_header(p, SIZEOF_ETH_HDR) != 0) {
 80268e6:	210e      	movs	r1, #14
 80268e8:	68b8      	ldr	r0, [r7, #8]
 80268ea:	f7f4 f927 	bl	801ab3c <pbuf_add_header>
 80268ee:	4603      	mov	r3, r0
 80268f0:	2b00      	cmp	r3, #0
 80268f2:	d127      	bne.n	8026944 <ethernet_output+0x78>
      goto pbuf_header_failed;
    }
  }

  LWIP_ASSERT_CORE_LOCKED();
 80268f4:	f7ea f8c2 	bl	8010a7c <sys_check_core_locking>

  ethhdr = (struct eth_hdr *)p->payload;
 80268f8:	68bb      	ldr	r3, [r7, #8]
 80268fa:	685b      	ldr	r3, [r3, #4]
 80268fc:	613b      	str	r3, [r7, #16]
  ethhdr->type = eth_type_be;
 80268fe:	693b      	ldr	r3, [r7, #16]
 8026900:	8afa      	ldrh	r2, [r7, #22]
 8026902:	819a      	strh	r2, [r3, #12]
  SMEMCPY(&ethhdr->dest, dst, ETH_HWADDR_LEN);
 8026904:	693b      	ldr	r3, [r7, #16]
 8026906:	2206      	movs	r2, #6
 8026908:	6839      	ldr	r1, [r7, #0]
 802690a:	4618      	mov	r0, r3
 802690c:	f003 fedf 	bl	802a6ce <memcpy>
  SMEMCPY(&ethhdr->src,  src, ETH_HWADDR_LEN);
 8026910:	693b      	ldr	r3, [r7, #16]
 8026912:	3306      	adds	r3, #6
 8026914:	2206      	movs	r2, #6
 8026916:	6879      	ldr	r1, [r7, #4]
 8026918:	4618      	mov	r0, r3
 802691a:	f003 fed8 	bl	802a6ce <memcpy>

  LWIP_ASSERT("netif->hwaddr_len must be 6 for ethernet_output!",
 802691e:	68fb      	ldr	r3, [r7, #12]
 8026920:	f893 3030 	ldrb.w	r3, [r3, #48]	@ 0x30
 8026924:	2b06      	cmp	r3, #6
 8026926:	d006      	beq.n	8026936 <ethernet_output+0x6a>
 8026928:	4b0a      	ldr	r3, [pc, #40]	@ (8026954 <ethernet_output+0x88>)
 802692a:	f44f 7299 	mov.w	r2, #306	@ 0x132
 802692e:	490a      	ldr	r1, [pc, #40]	@ (8026958 <ethernet_output+0x8c>)
 8026930:	480a      	ldr	r0, [pc, #40]	@ (802695c <ethernet_output+0x90>)
 8026932:	f003 fc43 	bl	802a1bc <iprintf>
              (netif->hwaddr_len == ETH_HWADDR_LEN));
  LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE,
              ("ethernet_output: sending packet %p\n", (void *)p));

  /* send the packet */
  return netif->linkoutput(netif, p);
 8026936:	68fb      	ldr	r3, [r7, #12]
 8026938:	699b      	ldr	r3, [r3, #24]
 802693a:	68b9      	ldr	r1, [r7, #8]
 802693c:	68f8      	ldr	r0, [r7, #12]
 802693e:	4798      	blx	r3
 8026940:	4603      	mov	r3, r0
 8026942:	e002      	b.n	802694a <ethernet_output+0x7e>
      goto pbuf_header_failed;
 8026944:	bf00      	nop

pbuf_header_failed:
  LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS,
              ("ethernet_output: could not allocate room for header.\n"));
  LINK_STATS_INC(link.lenerr);
  return ERR_BUF;
 8026946:	f06f 0301 	mvn.w	r3, #1
}
 802694a:	4618      	mov	r0, r3
 802694c:	3718      	adds	r7, #24
 802694e:	46bd      	mov	sp, r7
 8026950:	bd80      	pop	{r7, pc}
 8026952:	bf00      	nop
 8026954:	08031128 	.word	0x08031128
 8026958:	08031160 	.word	0x08031160
 802695c:	08031194 	.word	0x08031194

08026960 <sys_mbox_new>:
#endif

/*-----------------------------------------------------------------------------------*/
//  Creates an empty mailbox.
err_t sys_mbox_new(sys_mbox_t *mbox, int size)
{
 8026960:	b580      	push	{r7, lr}
 8026962:	b082      	sub	sp, #8
 8026964:	af00      	add	r7, sp, #0
 8026966:	6078      	str	r0, [r7, #4]
 8026968:	6039      	str	r1, [r7, #0]
#if (osCMSIS < 0x20000U)
  osMessageQDef(QUEUE, size, void *);
  *mbox = osMessageCreate(osMessageQ(QUEUE), NULL);
#else
  *mbox = osMessageQueueNew(size, sizeof(void *), NULL);
 802696a:	683b      	ldr	r3, [r7, #0]
 802696c:	2200      	movs	r2, #0
 802696e:	2104      	movs	r1, #4
 8026970:	4618      	mov	r0, r3
 8026972:	f7ea fdab 	bl	80114cc <osMessageQueueNew>
 8026976:	4602      	mov	r2, r0
 8026978:	687b      	ldr	r3, [r7, #4]
 802697a:	601a      	str	r2, [r3, #0]
  if(lwip_stats.sys.mbox.max < lwip_stats.sys.mbox.used)
  {
    lwip_stats.sys.mbox.max = lwip_stats.sys.mbox.used;
  }
#endif /* SYS_STATS */
  if(*mbox == NULL)
 802697c:	687b      	ldr	r3, [r7, #4]
 802697e:	681b      	ldr	r3, [r3, #0]
 8026980:	2b00      	cmp	r3, #0
 8026982:	d102      	bne.n	802698a <sys_mbox_new+0x2a>
    return ERR_MEM;
 8026984:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8026988:	e000      	b.n	802698c <sys_mbox_new+0x2c>

  return ERR_OK;
 802698a:	2300      	movs	r3, #0
}
 802698c:	4618      	mov	r0, r3
 802698e:	3708      	adds	r7, #8
 8026990:	46bd      	mov	sp, r7
 8026992:	bd80      	pop	{r7, pc}

08026994 <sys_mbox_free>:
  Deallocates a mailbox. If there are messages still present in the
  mailbox when the mailbox is deallocated, it is an indication of a
  programming error in lwIP and the developer should be notified.
*/
void sys_mbox_free(sys_mbox_t *mbox)
{
 8026994:	b580      	push	{r7, lr}
 8026996:	b082      	sub	sp, #8
 8026998:	af00      	add	r7, sp, #0
 802699a:	6078      	str	r0, [r7, #4]
#if (osCMSIS < 0x20000U)
  if(osMessageWaiting(*mbox))
#else
  if(osMessageQueueGetCount(*mbox))
 802699c:	687b      	ldr	r3, [r7, #4]
 802699e:	681b      	ldr	r3, [r3, #0]
 80269a0:	4618      	mov	r0, r3
 80269a2:	f7ea fec5 	bl	8011730 <osMessageQueueGetCount>

  }
#if (osCMSIS < 0x20000U)
  osMessageDelete(*mbox);
#else
  osMessageQueueDelete(*mbox);
 80269a6:	687b      	ldr	r3, [r7, #4]
 80269a8:	681b      	ldr	r3, [r3, #0]
 80269aa:	4618      	mov	r0, r3
 80269ac:	f7ea fee0 	bl	8011770 <osMessageQueueDelete>
#endif
#if SYS_STATS
  --lwip_stats.sys.mbox.used;
#endif /* SYS_STATS */
}
 80269b0:	bf00      	nop
 80269b2:	3708      	adds	r7, #8
 80269b4:	46bd      	mov	sp, r7
 80269b6:	bd80      	pop	{r7, pc}

080269b8 <sys_mbox_trypost>:


/*-----------------------------------------------------------------------------------*/
//   Try to post the "msg" to the mailbox.
err_t sys_mbox_trypost(sys_mbox_t *mbox, void *msg)
{
 80269b8:	b580      	push	{r7, lr}
 80269ba:	b084      	sub	sp, #16
 80269bc:	af00      	add	r7, sp, #0
 80269be:	6078      	str	r0, [r7, #4]
 80269c0:	6039      	str	r1, [r7, #0]
  err_t result;
#if (osCMSIS < 0x20000U)
  if(osMessagePut(*mbox, (uint32_t)msg, 0) == osOK)
#else
  if(osMessageQueuePut(*mbox, &msg, 0, 0) == osOK)
 80269c2:	687b      	ldr	r3, [r7, #4]
 80269c4:	6818      	ldr	r0, [r3, #0]
 80269c6:	4639      	mov	r1, r7
 80269c8:	2300      	movs	r3, #0
 80269ca:	2200      	movs	r2, #0
 80269cc:	f7ea fdf2 	bl	80115b4 <osMessageQueuePut>
 80269d0:	4603      	mov	r3, r0
 80269d2:	2b00      	cmp	r3, #0
 80269d4:	d102      	bne.n	80269dc <sys_mbox_trypost+0x24>
#endif
  {
    result = ERR_OK;
 80269d6:	2300      	movs	r3, #0
 80269d8:	73fb      	strb	r3, [r7, #15]
 80269da:	e001      	b.n	80269e0 <sys_mbox_trypost+0x28>
  }
  else
  {
    // could not post, queue must be full
    result = ERR_MEM;
 80269dc:	23ff      	movs	r3, #255	@ 0xff
 80269de:	73fb      	strb	r3, [r7, #15]
#if SYS_STATS
    lwip_stats.sys.mbox.err++;
#endif /* SYS_STATS */
  }

  return result;
 80269e0:	f997 300f 	ldrsb.w	r3, [r7, #15]
}
 80269e4:	4618      	mov	r0, r3
 80269e6:	3710      	adds	r7, #16
 80269e8:	46bd      	mov	sp, r7
 80269ea:	bd80      	pop	{r7, pc}

080269ec <sys_arch_mbox_fetch>:

  Note that a function with a similar name, sys_mbox_fetch(), is
  implemented by lwIP.
*/
u32_t sys_arch_mbox_fetch(sys_mbox_t *mbox, void **msg, u32_t timeout)
{
 80269ec:	b580      	push	{r7, lr}
 80269ee:	b086      	sub	sp, #24
 80269f0:	af00      	add	r7, sp, #0
 80269f2:	60f8      	str	r0, [r7, #12]
 80269f4:	60b9      	str	r1, [r7, #8]
 80269f6:	607a      	str	r2, [r7, #4]
#if (osCMSIS < 0x20000U)
  osEvent event;
  uint32_t starttime = osKernelSysTick();
#else
  osStatus_t status;
  uint32_t starttime = osKernelGetTickCount();
 80269f8:	f7ea f9b6 	bl	8010d68 <osKernelGetTickCount>
 80269fc:	6178      	str	r0, [r7, #20]
#endif
  if(timeout != 0)
 80269fe:	687b      	ldr	r3, [r7, #4]
 8026a00:	2b00      	cmp	r3, #0
 8026a02:	d013      	beq.n	8026a2c <sys_arch_mbox_fetch+0x40>
    {
      *msg = (void *)event.value.v;
      return (osKernelSysTick() - starttime);
    }
#else
    status = osMessageQueueGet(*mbox, msg, 0, timeout);
 8026a04:	68fb      	ldr	r3, [r7, #12]
 8026a06:	6818      	ldr	r0, [r3, #0]
 8026a08:	687b      	ldr	r3, [r7, #4]
 8026a0a:	2200      	movs	r2, #0
 8026a0c:	68b9      	ldr	r1, [r7, #8]
 8026a0e:	f7ea fe31 	bl	8011674 <osMessageQueueGet>
 8026a12:	6138      	str	r0, [r7, #16]
    if (status == osOK)
 8026a14:	693b      	ldr	r3, [r7, #16]
 8026a16:	2b00      	cmp	r3, #0
 8026a18:	d105      	bne.n	8026a26 <sys_arch_mbox_fetch+0x3a>
    {
      return (osKernelGetTickCount() - starttime);
 8026a1a:	f7ea f9a5 	bl	8010d68 <osKernelGetTickCount>
 8026a1e:	4602      	mov	r2, r0
 8026a20:	697b      	ldr	r3, [r7, #20]
 8026a22:	1ad3      	subs	r3, r2, r3
 8026a24:	e00f      	b.n	8026a46 <sys_arch_mbox_fetch+0x5a>
    }
#endif
    else
    {
      return SYS_ARCH_TIMEOUT;
 8026a26:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8026a2a:	e00c      	b.n	8026a46 <sys_arch_mbox_fetch+0x5a>
#if (osCMSIS < 0x20000U)
    event = osMessageGet (*mbox, osWaitForever);
    *msg = (void *)event.value.v;
    return (osKernelSysTick() - starttime);
#else
    osMessageQueueGet(*mbox, msg, 0, osWaitForever );
 8026a2c:	68fb      	ldr	r3, [r7, #12]
 8026a2e:	6818      	ldr	r0, [r3, #0]
 8026a30:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8026a34:	2200      	movs	r2, #0
 8026a36:	68b9      	ldr	r1, [r7, #8]
 8026a38:	f7ea fe1c 	bl	8011674 <osMessageQueueGet>
    return (osKernelGetTickCount() - starttime);
 8026a3c:	f7ea f994 	bl	8010d68 <osKernelGetTickCount>
 8026a40:	4602      	mov	r2, r0
 8026a42:	697b      	ldr	r3, [r7, #20]
 8026a44:	1ad3      	subs	r3, r2, r3
#endif
  }
}
 8026a46:	4618      	mov	r0, r3
 8026a48:	3718      	adds	r7, #24
 8026a4a:	46bd      	mov	sp, r7
 8026a4c:	bd80      	pop	{r7, pc}

08026a4e <sys_arch_mbox_tryfetch>:
/*
  Similar to sys_arch_mbox_fetch, but if message is not ready immediately, we'll
  return with SYS_MBOX_EMPTY.  On success, 0 is returned.
*/
u32_t sys_arch_mbox_tryfetch(sys_mbox_t *mbox, void **msg)
{
 8026a4e:	b580      	push	{r7, lr}
 8026a50:	b082      	sub	sp, #8
 8026a52:	af00      	add	r7, sp, #0
 8026a54:	6078      	str	r0, [r7, #4]
 8026a56:	6039      	str	r1, [r7, #0]

  if(event.status == osEventMessage)
  {
    *msg = (void *)event.value.v;
#else
  if (osMessageQueueGet(*mbox, msg, 0, 0) == osOK)
 8026a58:	687b      	ldr	r3, [r7, #4]
 8026a5a:	6818      	ldr	r0, [r3, #0]
 8026a5c:	2300      	movs	r3, #0
 8026a5e:	2200      	movs	r2, #0
 8026a60:	6839      	ldr	r1, [r7, #0]
 8026a62:	f7ea fe07 	bl	8011674 <osMessageQueueGet>
 8026a66:	4603      	mov	r3, r0
 8026a68:	2b00      	cmp	r3, #0
 8026a6a:	d101      	bne.n	8026a70 <sys_arch_mbox_tryfetch+0x22>
  {
#endif
    return ERR_OK;
 8026a6c:	2300      	movs	r3, #0
 8026a6e:	e001      	b.n	8026a74 <sys_arch_mbox_tryfetch+0x26>
  }
  else
  {
    return SYS_MBOX_EMPTY;
 8026a70:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
  }
}
 8026a74:	4618      	mov	r0, r3
 8026a76:	3708      	adds	r7, #8
 8026a78:	46bd      	mov	sp, r7
 8026a7a:	bd80      	pop	{r7, pc}

08026a7c <sys_mbox_valid>:
/*----------------------------------------------------------------------------------*/
int sys_mbox_valid(sys_mbox_t *mbox)
{
 8026a7c:	b480      	push	{r7}
 8026a7e:	b083      	sub	sp, #12
 8026a80:	af00      	add	r7, sp, #0
 8026a82:	6078      	str	r0, [r7, #4]
  if (*mbox == SYS_MBOX_NULL)
 8026a84:	687b      	ldr	r3, [r7, #4]
 8026a86:	681b      	ldr	r3, [r3, #0]
 8026a88:	2b00      	cmp	r3, #0
 8026a8a:	d101      	bne.n	8026a90 <sys_mbox_valid+0x14>
    return 0;
 8026a8c:	2300      	movs	r3, #0
 8026a8e:	e000      	b.n	8026a92 <sys_mbox_valid+0x16>
  else
    return 1;
 8026a90:	2301      	movs	r3, #1
}
 8026a92:	4618      	mov	r0, r3
 8026a94:	370c      	adds	r7, #12
 8026a96:	46bd      	mov	sp, r7
 8026a98:	f85d 7b04 	ldr.w	r7, [sp], #4
 8026a9c:	4770      	bx	lr

08026a9e <sys_mbox_set_invalid>:
/*-----------------------------------------------------------------------------------*/
void sys_mbox_set_invalid(sys_mbox_t *mbox)
{
 8026a9e:	b480      	push	{r7}
 8026aa0:	b083      	sub	sp, #12
 8026aa2:	af00      	add	r7, sp, #0
 8026aa4:	6078      	str	r0, [r7, #4]
  *mbox = SYS_MBOX_NULL;
 8026aa6:	687b      	ldr	r3, [r7, #4]
 8026aa8:	2200      	movs	r2, #0
 8026aaa:	601a      	str	r2, [r3, #0]
}
 8026aac:	bf00      	nop
 8026aae:	370c      	adds	r7, #12
 8026ab0:	46bd      	mov	sp, r7
 8026ab2:	f85d 7b04 	ldr.w	r7, [sp], #4
 8026ab6:	4770      	bx	lr

08026ab8 <sys_sem_new>:

/*-----------------------------------------------------------------------------------*/
//  Creates a new semaphore. The "count" argument specifies
//  the initial state of the semaphore.
err_t sys_sem_new(sys_sem_t *sem, u8_t count)
{
 8026ab8:	b580      	push	{r7, lr}
 8026aba:	b082      	sub	sp, #8
 8026abc:	af00      	add	r7, sp, #0
 8026abe:	6078      	str	r0, [r7, #4]
 8026ac0:	460b      	mov	r3, r1
 8026ac2:	70fb      	strb	r3, [r7, #3]
#if (osCMSIS < 0x20000U)
  osSemaphoreDef(SEM);
  *sem = osSemaphoreCreate (osSemaphore(SEM), 1);
#else
  *sem = osSemaphoreNew(UINT16_MAX, count, NULL);
 8026ac4:	78fb      	ldrb	r3, [r7, #3]
 8026ac6:	2200      	movs	r2, #0
 8026ac8:	4619      	mov	r1, r3
 8026aca:	f64f 70ff 	movw	r0, #65535	@ 0xffff
 8026ace:	f7ea fbb9 	bl	8011244 <osSemaphoreNew>
 8026ad2:	4602      	mov	r2, r0
 8026ad4:	687b      	ldr	r3, [r7, #4]
 8026ad6:	601a      	str	r2, [r3, #0]
#endif

  if(*sem == NULL)
 8026ad8:	687b      	ldr	r3, [r7, #4]
 8026ada:	681b      	ldr	r3, [r3, #0]
 8026adc:	2b00      	cmp	r3, #0
 8026ade:	d102      	bne.n	8026ae6 <sys_sem_new+0x2e>
  {
#if SYS_STATS
    ++lwip_stats.sys.sem.err;
#endif /* SYS_STATS */
    return ERR_MEM;
 8026ae0:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8026ae4:	e009      	b.n	8026afa <sys_sem_new+0x42>
  }

  if(count == 0)	// Means it can't be taken
 8026ae6:	78fb      	ldrb	r3, [r7, #3]
 8026ae8:	2b00      	cmp	r3, #0
 8026aea:	d105      	bne.n	8026af8 <sys_sem_new+0x40>
  {
#if (osCMSIS < 0x20000U)
    osSemaphoreWait(*sem, 0);
#else
    osSemaphoreAcquire(*sem, 0);
 8026aec:	687b      	ldr	r3, [r7, #4]
 8026aee:	681b      	ldr	r3, [r3, #0]
 8026af0:	2100      	movs	r1, #0
 8026af2:	4618      	mov	r0, r3
 8026af4:	f7ea fc30 	bl	8011358 <osSemaphoreAcquire>
  if (lwip_stats.sys.sem.max < lwip_stats.sys.sem.used) {
    lwip_stats.sys.sem.max = lwip_stats.sys.sem.used;
  }
#endif /* SYS_STATS */

  return ERR_OK;
 8026af8:	2300      	movs	r3, #0
}
 8026afa:	4618      	mov	r0, r3
 8026afc:	3708      	adds	r7, #8
 8026afe:	46bd      	mov	sp, r7
 8026b00:	bd80      	pop	{r7, pc}

08026b02 <sys_arch_sem_wait>:

  Notice that lwIP implements a function with a similar name,
  sys_sem_wait(), that uses the sys_arch_sem_wait() function.
*/
u32_t sys_arch_sem_wait(sys_sem_t *sem, u32_t timeout)
{
 8026b02:	b580      	push	{r7, lr}
 8026b04:	b084      	sub	sp, #16
 8026b06:	af00      	add	r7, sp, #0
 8026b08:	6078      	str	r0, [r7, #4]
 8026b0a:	6039      	str	r1, [r7, #0]
#if (osCMSIS < 0x20000U)
  uint32_t starttime = osKernelSysTick();
#else
  uint32_t starttime = osKernelGetTickCount();
 8026b0c:	f7ea f92c 	bl	8010d68 <osKernelGetTickCount>
 8026b10:	60f8      	str	r0, [r7, #12]
#endif
  if(timeout != 0)
 8026b12:	683b      	ldr	r3, [r7, #0]
 8026b14:	2b00      	cmp	r3, #0
 8026b16:	d011      	beq.n	8026b3c <sys_arch_sem_wait+0x3a>
#if (osCMSIS < 0x20000U)
    if(osSemaphoreWait (*sem, timeout) == osOK)
    {
      return (osKernelSysTick() - starttime);
#else
    if(osSemaphoreAcquire(*sem, timeout) == osOK)
 8026b18:	687b      	ldr	r3, [r7, #4]
 8026b1a:	681b      	ldr	r3, [r3, #0]
 8026b1c:	6839      	ldr	r1, [r7, #0]
 8026b1e:	4618      	mov	r0, r3
 8026b20:	f7ea fc1a 	bl	8011358 <osSemaphoreAcquire>
 8026b24:	4603      	mov	r3, r0
 8026b26:	2b00      	cmp	r3, #0
 8026b28:	d105      	bne.n	8026b36 <sys_arch_sem_wait+0x34>
    {
        return (osKernelGetTickCount() - starttime);
 8026b2a:	f7ea f91d 	bl	8010d68 <osKernelGetTickCount>
 8026b2e:	4602      	mov	r2, r0
 8026b30:	68fb      	ldr	r3, [r7, #12]
 8026b32:	1ad3      	subs	r3, r2, r3
 8026b34:	e012      	b.n	8026b5c <sys_arch_sem_wait+0x5a>
#endif
    }
    else
    {
      return SYS_ARCH_TIMEOUT;
 8026b36:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8026b3a:	e00f      	b.n	8026b5c <sys_arch_sem_wait+0x5a>
  {
#if (osCMSIS < 0x20000U)
    while(osSemaphoreWait (*sem, osWaitForever) != osOK);
    return (osKernelSysTick() - starttime);
#else
    while(osSemaphoreAcquire(*sem, osWaitForever) != osOK);
 8026b3c:	bf00      	nop
 8026b3e:	687b      	ldr	r3, [r7, #4]
 8026b40:	681b      	ldr	r3, [r3, #0]
 8026b42:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 8026b46:	4618      	mov	r0, r3
 8026b48:	f7ea fc06 	bl	8011358 <osSemaphoreAcquire>
 8026b4c:	4603      	mov	r3, r0
 8026b4e:	2b00      	cmp	r3, #0
 8026b50:	d1f5      	bne.n	8026b3e <sys_arch_sem_wait+0x3c>
    return (osKernelGetTickCount() - starttime);
 8026b52:	f7ea f909 	bl	8010d68 <osKernelGetTickCount>
 8026b56:	4602      	mov	r2, r0
 8026b58:	68fb      	ldr	r3, [r7, #12]
 8026b5a:	1ad3      	subs	r3, r2, r3
#endif
  }
}
 8026b5c:	4618      	mov	r0, r3
 8026b5e:	3710      	adds	r7, #16
 8026b60:	46bd      	mov	sp, r7
 8026b62:	bd80      	pop	{r7, pc}

08026b64 <sys_sem_signal>:

/*-----------------------------------------------------------------------------------*/
// Signals a semaphore
void sys_sem_signal(sys_sem_t *sem)
{
 8026b64:	b580      	push	{r7, lr}
 8026b66:	b082      	sub	sp, #8
 8026b68:	af00      	add	r7, sp, #0
 8026b6a:	6078      	str	r0, [r7, #4]
  osSemaphoreRelease(*sem);
 8026b6c:	687b      	ldr	r3, [r7, #4]
 8026b6e:	681b      	ldr	r3, [r3, #0]
 8026b70:	4618      	mov	r0, r3
 8026b72:	f7ea fc43 	bl	80113fc <osSemaphoreRelease>
}
 8026b76:	bf00      	nop
 8026b78:	3708      	adds	r7, #8
 8026b7a:	46bd      	mov	sp, r7
 8026b7c:	bd80      	pop	{r7, pc}

08026b7e <sys_sem_free>:

/*-----------------------------------------------------------------------------------*/
// Deallocates a semaphore
void sys_sem_free(sys_sem_t *sem)
{
 8026b7e:	b580      	push	{r7, lr}
 8026b80:	b082      	sub	sp, #8
 8026b82:	af00      	add	r7, sp, #0
 8026b84:	6078      	str	r0, [r7, #4]
#if SYS_STATS
  --lwip_stats.sys.sem.used;
#endif /* SYS_STATS */

  osSemaphoreDelete(*sem);
 8026b86:	687b      	ldr	r3, [r7, #4]
 8026b88:	681b      	ldr	r3, [r3, #0]
 8026b8a:	4618      	mov	r0, r3
 8026b8c:	f7ea fc7a 	bl	8011484 <osSemaphoreDelete>
}
 8026b90:	bf00      	nop
 8026b92:	3708      	adds	r7, #8
 8026b94:	46bd      	mov	sp, r7
 8026b96:	bd80      	pop	{r7, pc}

08026b98 <sys_sem_valid>:
/*-----------------------------------------------------------------------------------*/
int sys_sem_valid(sys_sem_t *sem)
{
 8026b98:	b480      	push	{r7}
 8026b9a:	b083      	sub	sp, #12
 8026b9c:	af00      	add	r7, sp, #0
 8026b9e:	6078      	str	r0, [r7, #4]
  if (*sem == SYS_SEM_NULL)
 8026ba0:	687b      	ldr	r3, [r7, #4]
 8026ba2:	681b      	ldr	r3, [r3, #0]
 8026ba4:	2b00      	cmp	r3, #0
 8026ba6:	d101      	bne.n	8026bac <sys_sem_valid+0x14>
    return 0;
 8026ba8:	2300      	movs	r3, #0
 8026baa:	e000      	b.n	8026bae <sys_sem_valid+0x16>
  else
    return 1;
 8026bac:	2301      	movs	r3, #1
}
 8026bae:	4618      	mov	r0, r3
 8026bb0:	370c      	adds	r7, #12
 8026bb2:	46bd      	mov	sp, r7
 8026bb4:	f85d 7b04 	ldr.w	r7, [sp], #4
 8026bb8:	4770      	bx	lr

08026bba <sys_sem_set_invalid>:

/*-----------------------------------------------------------------------------------*/
void sys_sem_set_invalid(sys_sem_t *sem)
{
 8026bba:	b480      	push	{r7}
 8026bbc:	b083      	sub	sp, #12
 8026bbe:	af00      	add	r7, sp, #0
 8026bc0:	6078      	str	r0, [r7, #4]
  *sem = SYS_SEM_NULL;
 8026bc2:	687b      	ldr	r3, [r7, #4]
 8026bc4:	2200      	movs	r2, #0
 8026bc6:	601a      	str	r2, [r3, #0]
}
 8026bc8:	bf00      	nop
 8026bca:	370c      	adds	r7, #12
 8026bcc:	46bd      	mov	sp, r7
 8026bce:	f85d 7b04 	ldr.w	r7, [sp], #4
 8026bd2:	4770      	bx	lr

08026bd4 <sys_init>:
#else
osMutexId_t lwip_sys_mutex;
#endif
// Initialize sys arch
void sys_init(void)
{
 8026bd4:	b580      	push	{r7, lr}
 8026bd6:	af00      	add	r7, sp, #0
#if (osCMSIS < 0x20000U)
  lwip_sys_mutex = osMutexCreate(osMutex(lwip_sys_mutex));
#else
  lwip_sys_mutex = osMutexNew(NULL);
 8026bd8:	2000      	movs	r0, #0
 8026bda:	f7ea fa25 	bl	8011028 <osMutexNew>
 8026bde:	4603      	mov	r3, r0
 8026be0:	4a01      	ldr	r2, [pc, #4]	@ (8026be8 <sys_init+0x14>)
 8026be2:	6013      	str	r3, [r2, #0]
#endif
}
 8026be4:	bf00      	nop
 8026be6:	bd80      	pop	{r7, pc}
 8026be8:	2402b0fc 	.word	0x2402b0fc

08026bec <sys_mutex_new>:
                                      /* Mutexes*/
/*-----------------------------------------------------------------------------------*/
/*-----------------------------------------------------------------------------------*/
#if LWIP_COMPAT_MUTEX == 0
/* Create a new mutex*/
err_t sys_mutex_new(sys_mutex_t *mutex) {
 8026bec:	b580      	push	{r7, lr}
 8026bee:	b082      	sub	sp, #8
 8026bf0:	af00      	add	r7, sp, #0
 8026bf2:	6078      	str	r0, [r7, #4]

#if (osCMSIS < 0x20000U)
  osMutexDef(MUTEX);
  *mutex = osMutexCreate(osMutex(MUTEX));
#else
  *mutex = osMutexNew(NULL);
 8026bf4:	2000      	movs	r0, #0
 8026bf6:	f7ea fa17 	bl	8011028 <osMutexNew>
 8026bfa:	4602      	mov	r2, r0
 8026bfc:	687b      	ldr	r3, [r7, #4]
 8026bfe:	601a      	str	r2, [r3, #0]
#endif

  if(*mutex == NULL)
 8026c00:	687b      	ldr	r3, [r7, #4]
 8026c02:	681b      	ldr	r3, [r3, #0]
 8026c04:	2b00      	cmp	r3, #0
 8026c06:	d102      	bne.n	8026c0e <sys_mutex_new+0x22>
  {
#if SYS_STATS
    ++lwip_stats.sys.mutex.err;
#endif /* SYS_STATS */
    return ERR_MEM;
 8026c08:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8026c0c:	e000      	b.n	8026c10 <sys_mutex_new+0x24>
  ++lwip_stats.sys.mutex.used;
  if (lwip_stats.sys.mutex.max < lwip_stats.sys.mutex.used) {
    lwip_stats.sys.mutex.max = lwip_stats.sys.mutex.used;
  }
#endif /* SYS_STATS */
  return ERR_OK;
 8026c0e:	2300      	movs	r3, #0
}
 8026c10:	4618      	mov	r0, r3
 8026c12:	3708      	adds	r7, #8
 8026c14:	46bd      	mov	sp, r7
 8026c16:	bd80      	pop	{r7, pc}

08026c18 <sys_mutex_lock>:
  osMutexDelete(*mutex);
}
/*-----------------------------------------------------------------------------------*/
/* Lock a mutex*/
void sys_mutex_lock(sys_mutex_t *mutex)
{
 8026c18:	b580      	push	{r7, lr}
 8026c1a:	b082      	sub	sp, #8
 8026c1c:	af00      	add	r7, sp, #0
 8026c1e:	6078      	str	r0, [r7, #4]
#if (osCMSIS < 0x20000U)
  osMutexWait(*mutex, osWaitForever);
#else
  osMutexAcquire(*mutex, osWaitForever);
 8026c20:	687b      	ldr	r3, [r7, #4]
 8026c22:	681b      	ldr	r3, [r3, #0]
 8026c24:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 8026c28:	4618      	mov	r0, r3
 8026c2a:	f7ea fa83 	bl	8011134 <osMutexAcquire>
#endif
}
 8026c2e:	bf00      	nop
 8026c30:	3708      	adds	r7, #8
 8026c32:	46bd      	mov	sp, r7
 8026c34:	bd80      	pop	{r7, pc}

08026c36 <sys_mutex_unlock>:

/*-----------------------------------------------------------------------------------*/
/* Unlock a mutex*/
void sys_mutex_unlock(sys_mutex_t *mutex)
{
 8026c36:	b580      	push	{r7, lr}
 8026c38:	b082      	sub	sp, #8
 8026c3a:	af00      	add	r7, sp, #0
 8026c3c:	6078      	str	r0, [r7, #4]
  osMutexRelease(*mutex);
 8026c3e:	687b      	ldr	r3, [r7, #4]
 8026c40:	681b      	ldr	r3, [r3, #0]
 8026c42:	4618      	mov	r0, r3
 8026c44:	f7ea fac1 	bl	80111ca <osMutexRelease>
}
 8026c48:	bf00      	nop
 8026c4a:	3708      	adds	r7, #8
 8026c4c:	46bd      	mov	sp, r7
 8026c4e:	bd80      	pop	{r7, pc}

08026c50 <sys_thread_new>:
  function "thread()". The "arg" argument will be passed as an argument to the
  thread() function. The id of the new thread is returned. Both the id and
  the priority are system dependent.
*/
sys_thread_t sys_thread_new(const char *name, lwip_thread_fn thread , void *arg, int stacksize, int prio)
{
 8026c50:	b580      	push	{r7, lr}
 8026c52:	b08e      	sub	sp, #56	@ 0x38
 8026c54:	af00      	add	r7, sp, #0
 8026c56:	60f8      	str	r0, [r7, #12]
 8026c58:	60b9      	str	r1, [r7, #8]
 8026c5a:	607a      	str	r2, [r7, #4]
 8026c5c:	603b      	str	r3, [r7, #0]
#if (osCMSIS < 0x20000U)
  const osThreadDef_t os_thread_def = { (char *)name, (os_pthread)thread, (osPriority)prio, 0, stacksize};
  return osThreadCreate(&os_thread_def, arg);
#else
  const osThreadAttr_t attributes = {
 8026c5e:	f107 0314 	add.w	r3, r7, #20
 8026c62:	2224      	movs	r2, #36	@ 0x24
 8026c64:	2100      	movs	r1, #0
 8026c66:	4618      	mov	r0, r3
 8026c68:	f003 fc3a 	bl	802a4e0 <memset>
 8026c6c:	68fb      	ldr	r3, [r7, #12]
 8026c6e:	617b      	str	r3, [r7, #20]
 8026c70:	683b      	ldr	r3, [r7, #0]
 8026c72:	62bb      	str	r3, [r7, #40]	@ 0x28
 8026c74:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8026c76:	62fb      	str	r3, [r7, #44]	@ 0x2c
                        .name = name,
                        .stack_size = stacksize,
                        .priority = (osPriority_t)prio,
                      };
  return osThreadNew(thread, arg, &attributes);
 8026c78:	f107 0314 	add.w	r3, r7, #20
 8026c7c:	461a      	mov	r2, r3
 8026c7e:	6879      	ldr	r1, [r7, #4]
 8026c80:	68b8      	ldr	r0, [r7, #8]
 8026c82:	f7ea f886 	bl	8010d92 <osThreadNew>
 8026c86:	4603      	mov	r3, r0
#endif
}
 8026c88:	4618      	mov	r0, r3
 8026c8a:	3738      	adds	r7, #56	@ 0x38
 8026c8c:	46bd      	mov	sp, r7
 8026c8e:	bd80      	pop	{r7, pc}

08026c90 <sys_arch_protect>:

  Note: This function is based on FreeRTOS API, because no equivalent CMSIS-RTOS
        API is available
*/
sys_prot_t sys_arch_protect(void)
{
 8026c90:	b580      	push	{r7, lr}
 8026c92:	af00      	add	r7, sp, #0
#if (osCMSIS < 0x20000U)
  osMutexWait(lwip_sys_mutex, osWaitForever);
#else
  osMutexAcquire(lwip_sys_mutex, osWaitForever);
 8026c94:	4b04      	ldr	r3, [pc, #16]	@ (8026ca8 <sys_arch_protect+0x18>)
 8026c96:	681b      	ldr	r3, [r3, #0]
 8026c98:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 8026c9c:	4618      	mov	r0, r3
 8026c9e:	f7ea fa49 	bl	8011134 <osMutexAcquire>
#endif
  return (sys_prot_t)1;
 8026ca2:	2301      	movs	r3, #1
}
 8026ca4:	4618      	mov	r0, r3
 8026ca6:	bd80      	pop	{r7, pc}
 8026ca8:	2402b0fc 	.word	0x2402b0fc

08026cac <sys_arch_unprotect>:

  Note: This function is based on FreeRTOS API, because no equivalent CMSIS-RTOS
        API is available
*/
void sys_arch_unprotect(sys_prot_t pval)
{
 8026cac:	b580      	push	{r7, lr}
 8026cae:	b082      	sub	sp, #8
 8026cb0:	af00      	add	r7, sp, #0
 8026cb2:	6078      	str	r0, [r7, #4]
  ( void ) pval;
  osMutexRelease(lwip_sys_mutex);
 8026cb4:	4b04      	ldr	r3, [pc, #16]	@ (8026cc8 <sys_arch_unprotect+0x1c>)
 8026cb6:	681b      	ldr	r3, [r3, #0]
 8026cb8:	4618      	mov	r0, r3
 8026cba:	f7ea fa86 	bl	80111ca <osMutexRelease>
}
 8026cbe:	bf00      	nop
 8026cc0:	3708      	adds	r7, #8
 8026cc2:	46bd      	mov	sp, r7
 8026cc4:	bd80      	pop	{r7, pc}
 8026cc6:	bf00      	nop
 8026cc8:	2402b0fc 	.word	0x2402b0fc

08026ccc <NewMessageData>:
#include <string.h>
//#include "cmsis_os.h"

osMutexId_t mqttMutex;

static void NewMessageData(MessageData* md, MQTTString* aTopicName, MQTTMessage* aMessage) {
 8026ccc:	b480      	push	{r7}
 8026cce:	b085      	sub	sp, #20
 8026cd0:	af00      	add	r7, sp, #0
 8026cd2:	60f8      	str	r0, [r7, #12]
 8026cd4:	60b9      	str	r1, [r7, #8]
 8026cd6:	607a      	str	r2, [r7, #4]
    md->topicName = aTopicName;
 8026cd8:	68fb      	ldr	r3, [r7, #12]
 8026cda:	68ba      	ldr	r2, [r7, #8]
 8026cdc:	605a      	str	r2, [r3, #4]
    md->message = aMessage;
 8026cde:	68fb      	ldr	r3, [r7, #12]
 8026ce0:	687a      	ldr	r2, [r7, #4]
 8026ce2:	601a      	str	r2, [r3, #0]
}
 8026ce4:	bf00      	nop
 8026ce6:	3714      	adds	r7, #20
 8026ce8:	46bd      	mov	sp, r7
 8026cea:	f85d 7b04 	ldr.w	r7, [sp], #4
 8026cee:	4770      	bx	lr

08026cf0 <getNextPacketId>:


static int getNextPacketId(MQTTClient *c) {
 8026cf0:	b480      	push	{r7}
 8026cf2:	b083      	sub	sp, #12
 8026cf4:	af00      	add	r7, sp, #0
 8026cf6:	6078      	str	r0, [r7, #4]
    return c->next_packetid = (c->next_packetid == MAX_PACKET_ID) ? 1 : c->next_packetid + 1;
 8026cf8:	687b      	ldr	r3, [r7, #4]
 8026cfa:	681b      	ldr	r3, [r3, #0]
 8026cfc:	f64f 72ff 	movw	r2, #65535	@ 0xffff
 8026d00:	4293      	cmp	r3, r2
 8026d02:	d003      	beq.n	8026d0c <getNextPacketId+0x1c>
 8026d04:	687b      	ldr	r3, [r7, #4]
 8026d06:	681b      	ldr	r3, [r3, #0]
 8026d08:	3301      	adds	r3, #1
 8026d0a:	e000      	b.n	8026d0e <getNextPacketId+0x1e>
 8026d0c:	2301      	movs	r3, #1
 8026d0e:	687a      	ldr	r2, [r7, #4]
 8026d10:	6013      	str	r3, [r2, #0]
 8026d12:	687b      	ldr	r3, [r7, #4]
 8026d14:	681b      	ldr	r3, [r3, #0]
}
 8026d16:	4618      	mov	r0, r3
 8026d18:	370c      	adds	r7, #12
 8026d1a:	46bd      	mov	sp, r7
 8026d1c:	f85d 7b04 	ldr.w	r7, [sp], #4
 8026d20:	4770      	bx	lr

08026d22 <sendPacket>:


static int sendPacket(MQTTClient* c, int length, Timer* timer)
{
 8026d22:	b5f0      	push	{r4, r5, r6, r7, lr}
 8026d24:	b087      	sub	sp, #28
 8026d26:	af00      	add	r7, sp, #0
 8026d28:	60f8      	str	r0, [r7, #12]
 8026d2a:	60b9      	str	r1, [r7, #8]
 8026d2c:	607a      	str	r2, [r7, #4]
    int rc = FAILURE,
 8026d2e:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8026d32:	617b      	str	r3, [r7, #20]
        sent = 0;
 8026d34:	2300      	movs	r3, #0
 8026d36:	613b      	str	r3, [r7, #16]

    while (sent < length && !TimerIsExpired(timer))
 8026d38:	e018      	b.n	8026d6c <sendPacket+0x4a>
    {
        rc = c->ipstack->mqttwrite(c->ipstack, &c->buf[sent], length, TimerLeftMS(timer));
 8026d3a:	68fb      	ldr	r3, [r7, #12]
 8026d3c:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 8026d3e:	689c      	ldr	r4, [r3, #8]
 8026d40:	68fb      	ldr	r3, [r7, #12]
 8026d42:	6d5d      	ldr	r5, [r3, #84]	@ 0x54
 8026d44:	68fb      	ldr	r3, [r7, #12]
 8026d46:	691a      	ldr	r2, [r3, #16]
 8026d48:	693b      	ldr	r3, [r7, #16]
 8026d4a:	18d6      	adds	r6, r2, r3
 8026d4c:	6878      	ldr	r0, [r7, #4]
 8026d4e:	f000 fed3 	bl	8027af8 <TimerLeftMS>
 8026d52:	4603      	mov	r3, r0
 8026d54:	68ba      	ldr	r2, [r7, #8]
 8026d56:	4631      	mov	r1, r6
 8026d58:	4628      	mov	r0, r5
 8026d5a:	47a0      	blx	r4
 8026d5c:	6178      	str	r0, [r7, #20]
        if (rc < 0)  // there was an error writing the data
 8026d5e:	697b      	ldr	r3, [r7, #20]
 8026d60:	2b00      	cmp	r3, #0
 8026d62:	db0e      	blt.n	8026d82 <sendPacket+0x60>
            break;
        sent += rc;
 8026d64:	693a      	ldr	r2, [r7, #16]
 8026d66:	697b      	ldr	r3, [r7, #20]
 8026d68:	4413      	add	r3, r2
 8026d6a:	613b      	str	r3, [r7, #16]
    while (sent < length && !TimerIsExpired(timer))
 8026d6c:	693a      	ldr	r2, [r7, #16]
 8026d6e:	68bb      	ldr	r3, [r7, #8]
 8026d70:	429a      	cmp	r2, r3
 8026d72:	da07      	bge.n	8026d84 <sendPacket+0x62>
 8026d74:	6878      	ldr	r0, [r7, #4]
 8026d76:	f000 fe7d 	bl	8027a74 <TimerIsExpired>
 8026d7a:	4603      	mov	r3, r0
 8026d7c:	2b00      	cmp	r3, #0
 8026d7e:	d0dc      	beq.n	8026d3a <sendPacket+0x18>
 8026d80:	e000      	b.n	8026d84 <sendPacket+0x62>
            break;
 8026d82:	bf00      	nop
    }
    if (sent == length)
 8026d84:	693a      	ldr	r2, [r7, #16]
 8026d86:	68bb      	ldr	r3, [r7, #8]
 8026d88:	429a      	cmp	r2, r3
 8026d8a:	d10b      	bne.n	8026da4 <sendPacket+0x82>
    {
        TimerCountdown(&c->last_sent, c->keepAliveInterval); // record the fact that we have MQTT_SUCCESSfully sent the packet
 8026d8c:	68fb      	ldr	r3, [r7, #12]
 8026d8e:	f103 0258 	add.w	r2, r3, #88	@ 0x58
 8026d92:	68fb      	ldr	r3, [r7, #12]
 8026d94:	699b      	ldr	r3, [r3, #24]
 8026d96:	4619      	mov	r1, r3
 8026d98:	4610      	mov	r0, r2
 8026d9a:	f000 fe95 	bl	8027ac8 <TimerCountdown>
        rc = MQTT_SUCCESS;
 8026d9e:	2300      	movs	r3, #0
 8026da0:	617b      	str	r3, [r7, #20]
 8026da2:	e002      	b.n	8026daa <sendPacket+0x88>
    }
    else
        rc = FAILURE;
 8026da4:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8026da8:	617b      	str	r3, [r7, #20]
    return rc;
 8026daa:	697b      	ldr	r3, [r7, #20]
}
 8026dac:	4618      	mov	r0, r3
 8026dae:	371c      	adds	r7, #28
 8026db0:	46bd      	mov	sp, r7
 8026db2:	bdf0      	pop	{r4, r5, r6, r7, pc}

08026db4 <MQTTClientInit>:


void MQTTClientInit(MQTTClient* c, Network* network, unsigned int command_timeout_ms,
		unsigned char* sendbuf, size_t sendbuf_size, unsigned char* readbuf, size_t readbuf_size)
{
 8026db4:	b580      	push	{r7, lr}
 8026db6:	b086      	sub	sp, #24
 8026db8:	af00      	add	r7, sp, #0
 8026dba:	60f8      	str	r0, [r7, #12]
 8026dbc:	60b9      	str	r1, [r7, #8]
 8026dbe:	607a      	str	r2, [r7, #4]
 8026dc0:	603b      	str	r3, [r7, #0]
    int i;
    c->ipstack = network;
 8026dc2:	68fb      	ldr	r3, [r7, #12]
 8026dc4:	68ba      	ldr	r2, [r7, #8]
 8026dc6:	655a      	str	r2, [r3, #84]	@ 0x54

    for (i = 0; i < MAX_MESSAGE_HANDLERS; ++i)
 8026dc8:	2300      	movs	r3, #0
 8026dca:	617b      	str	r3, [r7, #20]
 8026dcc:	e008      	b.n	8026de0 <MQTTClientInit+0x2c>
        c->messageHandlers[i].topicFilter = 0;
 8026dce:	68fb      	ldr	r3, [r7, #12]
 8026dd0:	697a      	ldr	r2, [r7, #20]
 8026dd2:	3205      	adds	r2, #5
 8026dd4:	2100      	movs	r1, #0
 8026dd6:	f843 1032 	str.w	r1, [r3, r2, lsl #3]
    for (i = 0; i < MAX_MESSAGE_HANDLERS; ++i)
 8026dda:	697b      	ldr	r3, [r7, #20]
 8026ddc:	3301      	adds	r3, #1
 8026dde:	617b      	str	r3, [r7, #20]
 8026de0:	697b      	ldr	r3, [r7, #20]
 8026de2:	2b04      	cmp	r3, #4
 8026de4:	ddf3      	ble.n	8026dce <MQTTClientInit+0x1a>
    c->command_timeout_ms = command_timeout_ms;
 8026de6:	68fb      	ldr	r3, [r7, #12]
 8026de8:	687a      	ldr	r2, [r7, #4]
 8026dea:	605a      	str	r2, [r3, #4]
    c->buf = sendbuf;
 8026dec:	68fb      	ldr	r3, [r7, #12]
 8026dee:	683a      	ldr	r2, [r7, #0]
 8026df0:	611a      	str	r2, [r3, #16]
    c->buf_size = sendbuf_size;
 8026df2:	68fb      	ldr	r3, [r7, #12]
 8026df4:	6a3a      	ldr	r2, [r7, #32]
 8026df6:	609a      	str	r2, [r3, #8]
    c->readbuf = readbuf;
 8026df8:	68fb      	ldr	r3, [r7, #12]
 8026dfa:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8026dfc:	615a      	str	r2, [r3, #20]
    c->readbuf_size = readbuf_size;
 8026dfe:	68fb      	ldr	r3, [r7, #12]
 8026e00:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 8026e02:	60da      	str	r2, [r3, #12]
    c->isconnected = 0;
 8026e04:	68fb      	ldr	r3, [r7, #12]
 8026e06:	2200      	movs	r2, #0
 8026e08:	621a      	str	r2, [r3, #32]
    c->cleansession = 0;
 8026e0a:	68fb      	ldr	r3, [r7, #12]
 8026e0c:	2200      	movs	r2, #0
 8026e0e:	625a      	str	r2, [r3, #36]	@ 0x24
    c->ping_outstanding = 0;
 8026e10:	68fb      	ldr	r3, [r7, #12]
 8026e12:	2200      	movs	r2, #0
 8026e14:	771a      	strb	r2, [r3, #28]
    c->defaultMessageHandler = NULL;
 8026e16:	68fb      	ldr	r3, [r7, #12]
 8026e18:	2200      	movs	r2, #0
 8026e1a:	651a      	str	r2, [r3, #80]	@ 0x50
	  c->next_packetid = 1;
 8026e1c:	68fb      	ldr	r3, [r7, #12]
 8026e1e:	2201      	movs	r2, #1
 8026e20:	601a      	str	r2, [r3, #0]
    TimerInit(&c->last_sent);
 8026e22:	68fb      	ldr	r3, [r7, #12]
 8026e24:	3358      	adds	r3, #88	@ 0x58
 8026e26:	4618      	mov	r0, r3
 8026e28:	f000 fe7c 	bl	8027b24 <TimerInit>
    TimerInit(&c->last_received);
 8026e2c:	68fb      	ldr	r3, [r7, #12]
 8026e2e:	3360      	adds	r3, #96	@ 0x60
 8026e30:	4618      	mov	r0, r3
 8026e32:	f000 fe77 	bl	8027b24 <TimerInit>
#if defined(MQTT_TASK)
	  MutexInit(&c->mutex);
#endif
	  if(mqttMutex == NULL)
 8026e36:	4b07      	ldr	r3, [pc, #28]	@ (8026e54 <MQTTClientInit+0xa0>)
 8026e38:	681b      	ldr	r3, [r3, #0]
 8026e3a:	2b00      	cmp	r3, #0
 8026e3c:	d105      	bne.n	8026e4a <MQTTClientInit+0x96>
	  {
//		  osMutexDef(mqttMutex);
//		  mqttMutex = osMutexNew(NULL);
		  c->mutex = osMutexNew(NULL);
 8026e3e:	2000      	movs	r0, #0
 8026e40:	f7ea f8f2 	bl	8011028 <osMutexNew>
 8026e44:	4602      	mov	r2, r0
 8026e46:	68fb      	ldr	r3, [r7, #12]
 8026e48:	669a      	str	r2, [r3, #104]	@ 0x68

	  }
}
 8026e4a:	bf00      	nop
 8026e4c:	3718      	adds	r7, #24
 8026e4e:	46bd      	mov	sp, r7
 8026e50:	bd80      	pop	{r7, pc}
 8026e52:	bf00      	nop
 8026e54:	2402b100 	.word	0x2402b100

08026e58 <decodePacket>:


static int decodePacket(MQTTClient* c, int* value, int timeout)
{
 8026e58:	b590      	push	{r4, r7, lr}
 8026e5a:	b08b      	sub	sp, #44	@ 0x2c
 8026e5c:	af00      	add	r7, sp, #0
 8026e5e:	60f8      	str	r0, [r7, #12]
 8026e60:	60b9      	str	r1, [r7, #8]
 8026e62:	607a      	str	r2, [r7, #4]
    unsigned char i;
    int multiplier = 1;
 8026e64:	2301      	movs	r3, #1
 8026e66:	627b      	str	r3, [r7, #36]	@ 0x24
    int len = 0;
 8026e68:	2300      	movs	r3, #0
 8026e6a:	623b      	str	r3, [r7, #32]
    const int MAX_NO_OF_REMAINING_LENGTH_BYTES = 4;
 8026e6c:	2304      	movs	r3, #4
 8026e6e:	61fb      	str	r3, [r7, #28]

    *value = 0;
 8026e70:	68bb      	ldr	r3, [r7, #8]
 8026e72:	2200      	movs	r2, #0
 8026e74:	601a      	str	r2, [r3, #0]
    do
    {
        int rc = MQTTPACKET_READ_ERROR;
 8026e76:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8026e7a:	61bb      	str	r3, [r7, #24]

        if (++len > MAX_NO_OF_REMAINING_LENGTH_BYTES)
 8026e7c:	6a3b      	ldr	r3, [r7, #32]
 8026e7e:	3301      	adds	r3, #1
 8026e80:	623b      	str	r3, [r7, #32]
 8026e82:	6a3a      	ldr	r2, [r7, #32]
 8026e84:	69fb      	ldr	r3, [r7, #28]
 8026e86:	429a      	cmp	r2, r3
 8026e88:	dd03      	ble.n	8026e92 <decodePacket+0x3a>
        {
            rc = MQTTPACKET_READ_ERROR; /* bad data */
 8026e8a:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8026e8e:	61bb      	str	r3, [r7, #24]
            goto exit;
 8026e90:	e021      	b.n	8026ed6 <decodePacket+0x7e>
        }
        rc = c->ipstack->mqttread(c->ipstack, &i, 1, timeout);
 8026e92:	68fb      	ldr	r3, [r7, #12]
 8026e94:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 8026e96:	685c      	ldr	r4, [r3, #4]
 8026e98:	68fb      	ldr	r3, [r7, #12]
 8026e9a:	6d58      	ldr	r0, [r3, #84]	@ 0x54
 8026e9c:	f107 0117 	add.w	r1, r7, #23
 8026ea0:	687b      	ldr	r3, [r7, #4]
 8026ea2:	2201      	movs	r2, #1
 8026ea4:	47a0      	blx	r4
 8026ea6:	61b8      	str	r0, [r7, #24]
        if (rc != 1)
 8026ea8:	69bb      	ldr	r3, [r7, #24]
 8026eaa:	2b01      	cmp	r3, #1
 8026eac:	d112      	bne.n	8026ed4 <decodePacket+0x7c>
            goto exit;
        *value += (i & 127) * multiplier;
 8026eae:	68bb      	ldr	r3, [r7, #8]
 8026eb0:	681a      	ldr	r2, [r3, #0]
 8026eb2:	7dfb      	ldrb	r3, [r7, #23]
 8026eb4:	f003 037f 	and.w	r3, r3, #127	@ 0x7f
 8026eb8:	6a79      	ldr	r1, [r7, #36]	@ 0x24
 8026eba:	fb01 f303 	mul.w	r3, r1, r3
 8026ebe:	441a      	add	r2, r3
 8026ec0:	68bb      	ldr	r3, [r7, #8]
 8026ec2:	601a      	str	r2, [r3, #0]
        multiplier *= 128;
 8026ec4:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8026ec6:	01db      	lsls	r3, r3, #7
 8026ec8:	627b      	str	r3, [r7, #36]	@ 0x24
    } while ((i & 128) != 0);
 8026eca:	7dfb      	ldrb	r3, [r7, #23]
 8026ecc:	b25b      	sxtb	r3, r3
 8026ece:	2b00      	cmp	r3, #0
 8026ed0:	dbd1      	blt.n	8026e76 <decodePacket+0x1e>
exit:
 8026ed2:	e000      	b.n	8026ed6 <decodePacket+0x7e>
            goto exit;
 8026ed4:	bf00      	nop
    return len;
 8026ed6:	6a3b      	ldr	r3, [r7, #32]
}
 8026ed8:	4618      	mov	r0, r3
 8026eda:	372c      	adds	r7, #44	@ 0x2c
 8026edc:	46bd      	mov	sp, r7
 8026ede:	bd90      	pop	{r4, r7, pc}

08026ee0 <readPacket>:


static int readPacket(MQTTClient* c, Timer* timer)
{
 8026ee0:	b5f0      	push	{r4, r5, r6, r7, lr}
 8026ee2:	b089      	sub	sp, #36	@ 0x24
 8026ee4:	af00      	add	r7, sp, #0
 8026ee6:	60f8      	str	r0, [r7, #12]
 8026ee8:	60b9      	str	r1, [r7, #8]
    MQTTHeader header = {0};
 8026eea:	2300      	movs	r3, #0
 8026eec:	617b      	str	r3, [r7, #20]
    int len = 0;
 8026eee:	2300      	movs	r3, #0
 8026ef0:	61bb      	str	r3, [r7, #24]
    int rem_len = 0;
 8026ef2:	2300      	movs	r3, #0
 8026ef4:	613b      	str	r3, [r7, #16]

    /* 1. read the header byte.  This has the packet type in it */
    int rc = c->ipstack->mqttread(c->ipstack, c->readbuf, 1, TimerLeftMS(timer));
 8026ef6:	68fb      	ldr	r3, [r7, #12]
 8026ef8:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 8026efa:	685c      	ldr	r4, [r3, #4]
 8026efc:	68fb      	ldr	r3, [r7, #12]
 8026efe:	6d5d      	ldr	r5, [r3, #84]	@ 0x54
 8026f00:	68fb      	ldr	r3, [r7, #12]
 8026f02:	695e      	ldr	r6, [r3, #20]
 8026f04:	68b8      	ldr	r0, [r7, #8]
 8026f06:	f000 fdf7 	bl	8027af8 <TimerLeftMS>
 8026f0a:	4603      	mov	r3, r0
 8026f0c:	2201      	movs	r2, #1
 8026f0e:	4631      	mov	r1, r6
 8026f10:	4628      	mov	r0, r5
 8026f12:	47a0      	blx	r4
 8026f14:	61f8      	str	r0, [r7, #28]
    if (rc != 1)
 8026f16:	69fb      	ldr	r3, [r7, #28]
 8026f18:	2b01      	cmp	r3, #1
 8026f1a:	d15d      	bne.n	8026fd8 <readPacket+0xf8>
        goto exit;

    len = 1;
 8026f1c:	2301      	movs	r3, #1
 8026f1e:	61bb      	str	r3, [r7, #24]
    /* 2. read the remaining length.  This is variable in itself */
    decodePacket(c, &rem_len, TimerLeftMS(timer));
 8026f20:	68b8      	ldr	r0, [r7, #8]
 8026f22:	f000 fde9 	bl	8027af8 <TimerLeftMS>
 8026f26:	4602      	mov	r2, r0
 8026f28:	f107 0310 	add.w	r3, r7, #16
 8026f2c:	4619      	mov	r1, r3
 8026f2e:	68f8      	ldr	r0, [r7, #12]
 8026f30:	f7ff ff92 	bl	8026e58 <decodePacket>
    len += MQTTPacket_encode(c->readbuf + 1, rem_len); /* put the original remaining length back into the buffer */
 8026f34:	68fb      	ldr	r3, [r7, #12]
 8026f36:	695b      	ldr	r3, [r3, #20]
 8026f38:	3301      	adds	r3, #1
 8026f3a:	693a      	ldr	r2, [r7, #16]
 8026f3c:	4611      	mov	r1, r2
 8026f3e:	4618      	mov	r0, r3
 8026f40:	f001 f959 	bl	80281f6 <MQTTPacket_encode>
 8026f44:	4602      	mov	r2, r0
 8026f46:	69bb      	ldr	r3, [r7, #24]
 8026f48:	4413      	add	r3, r2
 8026f4a:	61bb      	str	r3, [r7, #24]

    if (rem_len > (c->readbuf_size - len))
 8026f4c:	68fb      	ldr	r3, [r7, #12]
 8026f4e:	68da      	ldr	r2, [r3, #12]
 8026f50:	69bb      	ldr	r3, [r7, #24]
 8026f52:	1ad3      	subs	r3, r2, r3
 8026f54:	693a      	ldr	r2, [r7, #16]
 8026f56:	4293      	cmp	r3, r2
 8026f58:	d203      	bcs.n	8026f62 <readPacket+0x82>
    {
        rc = BUFFER_OVERFLOW;
 8026f5a:	f06f 0301 	mvn.w	r3, #1
 8026f5e:	61fb      	str	r3, [r7, #28]
        goto exit;
 8026f60:	e03d      	b.n	8026fde <readPacket+0xfe>
    }

    /* 3. read the rest of the buffer using a callback to supply the rest of the data */
    if (rem_len > 0 && (rc = c->ipstack->mqttread(c->ipstack, c->readbuf + len, rem_len, TimerLeftMS(timer)) != rem_len)) {
 8026f62:	693b      	ldr	r3, [r7, #16]
 8026f64:	2b00      	cmp	r3, #0
 8026f66:	dd20      	ble.n	8026faa <readPacket+0xca>
 8026f68:	68fb      	ldr	r3, [r7, #12]
 8026f6a:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 8026f6c:	685c      	ldr	r4, [r3, #4]
 8026f6e:	68fb      	ldr	r3, [r7, #12]
 8026f70:	6d5d      	ldr	r5, [r3, #84]	@ 0x54
 8026f72:	68fb      	ldr	r3, [r7, #12]
 8026f74:	695a      	ldr	r2, [r3, #20]
 8026f76:	69bb      	ldr	r3, [r7, #24]
 8026f78:	18d6      	adds	r6, r2, r3
 8026f7a:	693b      	ldr	r3, [r7, #16]
 8026f7c:	607b      	str	r3, [r7, #4]
 8026f7e:	68b8      	ldr	r0, [r7, #8]
 8026f80:	f000 fdba 	bl	8027af8 <TimerLeftMS>
 8026f84:	4603      	mov	r3, r0
 8026f86:	687a      	ldr	r2, [r7, #4]
 8026f88:	4631      	mov	r1, r6
 8026f8a:	4628      	mov	r0, r5
 8026f8c:	47a0      	blx	r4
 8026f8e:	4602      	mov	r2, r0
 8026f90:	693b      	ldr	r3, [r7, #16]
 8026f92:	429a      	cmp	r2, r3
 8026f94:	bf14      	ite	ne
 8026f96:	2301      	movne	r3, #1
 8026f98:	2300      	moveq	r3, #0
 8026f9a:	b2db      	uxtb	r3, r3
 8026f9c:	61fb      	str	r3, [r7, #28]
 8026f9e:	69fb      	ldr	r3, [r7, #28]
 8026fa0:	2b00      	cmp	r3, #0
 8026fa2:	d002      	beq.n	8026faa <readPacket+0xca>
        rc = 0;
 8026fa4:	2300      	movs	r3, #0
 8026fa6:	61fb      	str	r3, [r7, #28]
        goto exit;
 8026fa8:	e019      	b.n	8026fde <readPacket+0xfe>
    }

    header.byte = c->readbuf[0];
 8026faa:	68fb      	ldr	r3, [r7, #12]
 8026fac:	695b      	ldr	r3, [r3, #20]
 8026fae:	781b      	ldrb	r3, [r3, #0]
 8026fb0:	753b      	strb	r3, [r7, #20]
    rc = header.bits.type;
 8026fb2:	7d3b      	ldrb	r3, [r7, #20]
 8026fb4:	f3c3 1303 	ubfx	r3, r3, #4, #4
 8026fb8:	b2db      	uxtb	r3, r3
 8026fba:	61fb      	str	r3, [r7, #28]
    if (c->keepAliveInterval > 0)
 8026fbc:	68fb      	ldr	r3, [r7, #12]
 8026fbe:	699b      	ldr	r3, [r3, #24]
 8026fc0:	2b00      	cmp	r3, #0
 8026fc2:	d00b      	beq.n	8026fdc <readPacket+0xfc>
        TimerCountdown(&c->last_received, c->keepAliveInterval); // record the fact that we have MQTT_SUCCESSfully received a packet
 8026fc4:	68fb      	ldr	r3, [r7, #12]
 8026fc6:	f103 0260 	add.w	r2, r3, #96	@ 0x60
 8026fca:	68fb      	ldr	r3, [r7, #12]
 8026fcc:	699b      	ldr	r3, [r3, #24]
 8026fce:	4619      	mov	r1, r3
 8026fd0:	4610      	mov	r0, r2
 8026fd2:	f000 fd79 	bl	8027ac8 <TimerCountdown>
 8026fd6:	e002      	b.n	8026fde <readPacket+0xfe>
        goto exit;
 8026fd8:	bf00      	nop
 8026fda:	e000      	b.n	8026fde <readPacket+0xfe>
exit:
 8026fdc:	bf00      	nop
    return rc;
 8026fde:	69fb      	ldr	r3, [r7, #28]
}
 8026fe0:	4618      	mov	r0, r3
 8026fe2:	3724      	adds	r7, #36	@ 0x24
 8026fe4:	46bd      	mov	sp, r7
 8026fe6:	bdf0      	pop	{r4, r5, r6, r7, pc}

08026fe8 <isTopicMatched>:

// assume topic filter and name is in correct format
// # can only be at end
// + and # can only be next to separator
static char isTopicMatched(char* topicFilter, MQTTString* topicName)
{
 8026fe8:	b480      	push	{r7}
 8026fea:	b087      	sub	sp, #28
 8026fec:	af00      	add	r7, sp, #0
 8026fee:	6078      	str	r0, [r7, #4]
 8026ff0:	6039      	str	r1, [r7, #0]
    char* curf = topicFilter;
 8026ff2:	687b      	ldr	r3, [r7, #4]
 8026ff4:	617b      	str	r3, [r7, #20]
    char* curn = topicName->lenstring.data;
 8026ff6:	683b      	ldr	r3, [r7, #0]
 8026ff8:	689b      	ldr	r3, [r3, #8]
 8026ffa:	613b      	str	r3, [r7, #16]
    char* curn_end = curn + topicName->lenstring.len;
 8026ffc:	683b      	ldr	r3, [r7, #0]
 8026ffe:	685b      	ldr	r3, [r3, #4]
 8027000:	461a      	mov	r2, r3
 8027002:	693b      	ldr	r3, [r7, #16]
 8027004:	4413      	add	r3, r2
 8027006:	60bb      	str	r3, [r7, #8]

    while (*curf && curn < curn_end)
 8027008:	e039      	b.n	802707e <isTopicMatched+0x96>
    {
        if (*curn == '/' && *curf != '/')
 802700a:	693b      	ldr	r3, [r7, #16]
 802700c:	781b      	ldrb	r3, [r3, #0]
 802700e:	2b2f      	cmp	r3, #47	@ 0x2f
 8027010:	d103      	bne.n	802701a <isTopicMatched+0x32>
 8027012:	697b      	ldr	r3, [r7, #20]
 8027014:	781b      	ldrb	r3, [r3, #0]
 8027016:	2b2f      	cmp	r3, #47	@ 0x2f
 8027018:	d13a      	bne.n	8027090 <isTopicMatched+0xa8>
            break;
        if (*curf != '+' && *curf != '#' && *curf != *curn)
 802701a:	697b      	ldr	r3, [r7, #20]
 802701c:	781b      	ldrb	r3, [r3, #0]
 802701e:	2b2b      	cmp	r3, #43	@ 0x2b
 8027020:	d009      	beq.n	8027036 <isTopicMatched+0x4e>
 8027022:	697b      	ldr	r3, [r7, #20]
 8027024:	781b      	ldrb	r3, [r3, #0]
 8027026:	2b23      	cmp	r3, #35	@ 0x23
 8027028:	d005      	beq.n	8027036 <isTopicMatched+0x4e>
 802702a:	697b      	ldr	r3, [r7, #20]
 802702c:	781a      	ldrb	r2, [r3, #0]
 802702e:	693b      	ldr	r3, [r7, #16]
 8027030:	781b      	ldrb	r3, [r3, #0]
 8027032:	429a      	cmp	r2, r3
 8027034:	d12e      	bne.n	8027094 <isTopicMatched+0xac>
            break;
        if (*curf == '+')
 8027036:	697b      	ldr	r3, [r7, #20]
 8027038:	781b      	ldrb	r3, [r3, #0]
 802703a:	2b2b      	cmp	r3, #43	@ 0x2b
 802703c:	d112      	bne.n	8027064 <isTopicMatched+0x7c>
        {   // skip until we meet the next separator, or end of string
            char* nextpos = curn + 1;
 802703e:	693b      	ldr	r3, [r7, #16]
 8027040:	3301      	adds	r3, #1
 8027042:	60fb      	str	r3, [r7, #12]
            while (nextpos < curn_end && *nextpos != '/')
 8027044:	e005      	b.n	8027052 <isTopicMatched+0x6a>
                nextpos = ++curn + 1;
 8027046:	693b      	ldr	r3, [r7, #16]
 8027048:	3301      	adds	r3, #1
 802704a:	613b      	str	r3, [r7, #16]
 802704c:	693b      	ldr	r3, [r7, #16]
 802704e:	3301      	adds	r3, #1
 8027050:	60fb      	str	r3, [r7, #12]
            while (nextpos < curn_end && *nextpos != '/')
 8027052:	68fa      	ldr	r2, [r7, #12]
 8027054:	68bb      	ldr	r3, [r7, #8]
 8027056:	429a      	cmp	r2, r3
 8027058:	d20b      	bcs.n	8027072 <isTopicMatched+0x8a>
 802705a:	68fb      	ldr	r3, [r7, #12]
 802705c:	781b      	ldrb	r3, [r3, #0]
 802705e:	2b2f      	cmp	r3, #47	@ 0x2f
 8027060:	d1f1      	bne.n	8027046 <isTopicMatched+0x5e>
 8027062:	e006      	b.n	8027072 <isTopicMatched+0x8a>
        }
        else if (*curf == '#')
 8027064:	697b      	ldr	r3, [r7, #20]
 8027066:	781b      	ldrb	r3, [r3, #0]
 8027068:	2b23      	cmp	r3, #35	@ 0x23
 802706a:	d102      	bne.n	8027072 <isTopicMatched+0x8a>
            curn = curn_end - 1;    // skip until end of string
 802706c:	68bb      	ldr	r3, [r7, #8]
 802706e:	3b01      	subs	r3, #1
 8027070:	613b      	str	r3, [r7, #16]
        curf++;
 8027072:	697b      	ldr	r3, [r7, #20]
 8027074:	3301      	adds	r3, #1
 8027076:	617b      	str	r3, [r7, #20]
        curn++;
 8027078:	693b      	ldr	r3, [r7, #16]
 802707a:	3301      	adds	r3, #1
 802707c:	613b      	str	r3, [r7, #16]
    while (*curf && curn < curn_end)
 802707e:	697b      	ldr	r3, [r7, #20]
 8027080:	781b      	ldrb	r3, [r3, #0]
 8027082:	2b00      	cmp	r3, #0
 8027084:	d007      	beq.n	8027096 <isTopicMatched+0xae>
 8027086:	693a      	ldr	r2, [r7, #16]
 8027088:	68bb      	ldr	r3, [r7, #8]
 802708a:	429a      	cmp	r2, r3
 802708c:	d3bd      	bcc.n	802700a <isTopicMatched+0x22>
 802708e:	e002      	b.n	8027096 <isTopicMatched+0xae>
            break;
 8027090:	bf00      	nop
 8027092:	e000      	b.n	8027096 <isTopicMatched+0xae>
            break;
 8027094:	bf00      	nop
    };

    return (curn == curn_end) && (*curf == '\0');
 8027096:	693a      	ldr	r2, [r7, #16]
 8027098:	68bb      	ldr	r3, [r7, #8]
 802709a:	429a      	cmp	r2, r3
 802709c:	d105      	bne.n	80270aa <isTopicMatched+0xc2>
 802709e:	697b      	ldr	r3, [r7, #20]
 80270a0:	781b      	ldrb	r3, [r3, #0]
 80270a2:	2b00      	cmp	r3, #0
 80270a4:	d101      	bne.n	80270aa <isTopicMatched+0xc2>
 80270a6:	2301      	movs	r3, #1
 80270a8:	e000      	b.n	80270ac <isTopicMatched+0xc4>
 80270aa:	2300      	movs	r3, #0
 80270ac:	b2db      	uxtb	r3, r3
}
 80270ae:	4618      	mov	r0, r3
 80270b0:	371c      	adds	r7, #28
 80270b2:	46bd      	mov	sp, r7
 80270b4:	f85d 7b04 	ldr.w	r7, [sp], #4
 80270b8:	4770      	bx	lr

080270ba <deliverMessage>:


int deliverMessage(MQTTClient* c, MQTTString* topicName, MQTTMessage* message)
{
 80270ba:	b580      	push	{r7, lr}
 80270bc:	b08a      	sub	sp, #40	@ 0x28
 80270be:	af00      	add	r7, sp, #0
 80270c0:	60f8      	str	r0, [r7, #12]
 80270c2:	60b9      	str	r1, [r7, #8]
 80270c4:	607a      	str	r2, [r7, #4]
    int i;
    int rc = FAILURE;
 80270c6:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80270ca:	623b      	str	r3, [r7, #32]

    // we have to find the right message handler - indexed by topic
    for (i = 0; i < MAX_MESSAGE_HANDLERS; ++i)
 80270cc:	2300      	movs	r3, #0
 80270ce:	627b      	str	r3, [r7, #36]	@ 0x24
 80270d0:	e03c      	b.n	802714c <deliverMessage+0x92>
    {
        if (c->messageHandlers[i].topicFilter != 0 && (MQTTPacket_equals(topicName, (char*)c->messageHandlers[i].topicFilter) ||
 80270d2:	68fb      	ldr	r3, [r7, #12]
 80270d4:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 80270d6:	3205      	adds	r2, #5
 80270d8:	f853 3032 	ldr.w	r3, [r3, r2, lsl #3]
 80270dc:	2b00      	cmp	r3, #0
 80270de:	d032      	beq.n	8027146 <deliverMessage+0x8c>
 80270e0:	68fb      	ldr	r3, [r7, #12]
 80270e2:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 80270e4:	3205      	adds	r2, #5
 80270e6:	f853 3032 	ldr.w	r3, [r3, r2, lsl #3]
 80270ea:	4619      	mov	r1, r3
 80270ec:	68b8      	ldr	r0, [r7, #8]
 80270ee:	f001 fa51 	bl	8028594 <MQTTPacket_equals>
 80270f2:	4603      	mov	r3, r0
 80270f4:	2b00      	cmp	r3, #0
 80270f6:	d10b      	bne.n	8027110 <deliverMessage+0x56>
                isTopicMatched((char*)c->messageHandlers[i].topicFilter, topicName)))
 80270f8:	68fb      	ldr	r3, [r7, #12]
 80270fa:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 80270fc:	3205      	adds	r2, #5
 80270fe:	f853 3032 	ldr.w	r3, [r3, r2, lsl #3]
 8027102:	68b9      	ldr	r1, [r7, #8]
 8027104:	4618      	mov	r0, r3
 8027106:	f7ff ff6f 	bl	8026fe8 <isTopicMatched>
 802710a:	4603      	mov	r3, r0
        if (c->messageHandlers[i].topicFilter != 0 && (MQTTPacket_equals(topicName, (char*)c->messageHandlers[i].topicFilter) ||
 802710c:	2b00      	cmp	r3, #0
 802710e:	d01a      	beq.n	8027146 <deliverMessage+0x8c>
        {
            if (c->messageHandlers[i].fp != NULL)
 8027110:	68fa      	ldr	r2, [r7, #12]
 8027112:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8027114:	3305      	adds	r3, #5
 8027116:	00db      	lsls	r3, r3, #3
 8027118:	4413      	add	r3, r2
 802711a:	685b      	ldr	r3, [r3, #4]
 802711c:	2b00      	cmp	r3, #0
 802711e:	d012      	beq.n	8027146 <deliverMessage+0x8c>
            {
                MessageData md;
                NewMessageData(&md, topicName, message);
 8027120:	f107 0318 	add.w	r3, r7, #24
 8027124:	687a      	ldr	r2, [r7, #4]
 8027126:	68b9      	ldr	r1, [r7, #8]
 8027128:	4618      	mov	r0, r3
 802712a:	f7ff fdcf 	bl	8026ccc <NewMessageData>
                c->messageHandlers[i].fp(&md);
 802712e:	68fa      	ldr	r2, [r7, #12]
 8027130:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8027132:	3305      	adds	r3, #5
 8027134:	00db      	lsls	r3, r3, #3
 8027136:	4413      	add	r3, r2
 8027138:	685b      	ldr	r3, [r3, #4]
 802713a:	f107 0218 	add.w	r2, r7, #24
 802713e:	4610      	mov	r0, r2
 8027140:	4798      	blx	r3
                rc = MQTT_SUCCESS;
 8027142:	2300      	movs	r3, #0
 8027144:	623b      	str	r3, [r7, #32]
    for (i = 0; i < MAX_MESSAGE_HANDLERS; ++i)
 8027146:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8027148:	3301      	adds	r3, #1
 802714a:	627b      	str	r3, [r7, #36]	@ 0x24
 802714c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 802714e:	2b04      	cmp	r3, #4
 8027150:	ddbf      	ble.n	80270d2 <deliverMessage+0x18>
            }
        }
    }

    if (rc == FAILURE && c->defaultMessageHandler != NULL)
 8027152:	6a3b      	ldr	r3, [r7, #32]
 8027154:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8027158:	d112      	bne.n	8027180 <deliverMessage+0xc6>
 802715a:	68fb      	ldr	r3, [r7, #12]
 802715c:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 802715e:	2b00      	cmp	r3, #0
 8027160:	d00e      	beq.n	8027180 <deliverMessage+0xc6>
    {
        MessageData md;
        NewMessageData(&md, topicName, message);
 8027162:	f107 0310 	add.w	r3, r7, #16
 8027166:	687a      	ldr	r2, [r7, #4]
 8027168:	68b9      	ldr	r1, [r7, #8]
 802716a:	4618      	mov	r0, r3
 802716c:	f7ff fdae 	bl	8026ccc <NewMessageData>
        c->defaultMessageHandler(&md);
 8027170:	68fb      	ldr	r3, [r7, #12]
 8027172:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 8027174:	f107 0210 	add.w	r2, r7, #16
 8027178:	4610      	mov	r0, r2
 802717a:	4798      	blx	r3
        rc = MQTT_SUCCESS;
 802717c:	2300      	movs	r3, #0
 802717e:	623b      	str	r3, [r7, #32]
    }

    return rc;
 8027180:	6a3b      	ldr	r3, [r7, #32]
}
 8027182:	4618      	mov	r0, r3
 8027184:	3728      	adds	r7, #40	@ 0x28
 8027186:	46bd      	mov	sp, r7
 8027188:	bd80      	pop	{r7, pc}

0802718a <keepalive>:


int keepalive(MQTTClient* c)
{
 802718a:	b580      	push	{r7, lr}
 802718c:	b086      	sub	sp, #24
 802718e:	af00      	add	r7, sp, #0
 8027190:	6078      	str	r0, [r7, #4]
    int rc = MQTT_SUCCESS;
 8027192:	2300      	movs	r3, #0
 8027194:	617b      	str	r3, [r7, #20]

    if (c->keepAliveInterval == 0)
 8027196:	687b      	ldr	r3, [r7, #4]
 8027198:	699b      	ldr	r3, [r3, #24]
 802719a:	2b00      	cmp	r3, #0
 802719c:	d03e      	beq.n	802721c <keepalive+0x92>
        goto exit;

    if (TimerIsExpired(&c->last_sent) || TimerIsExpired(&c->last_received))
 802719e:	687b      	ldr	r3, [r7, #4]
 80271a0:	3358      	adds	r3, #88	@ 0x58
 80271a2:	4618      	mov	r0, r3
 80271a4:	f000 fc66 	bl	8027a74 <TimerIsExpired>
 80271a8:	4603      	mov	r3, r0
 80271aa:	2b00      	cmp	r3, #0
 80271ac:	d107      	bne.n	80271be <keepalive+0x34>
 80271ae:	687b      	ldr	r3, [r7, #4]
 80271b0:	3360      	adds	r3, #96	@ 0x60
 80271b2:	4618      	mov	r0, r3
 80271b4:	f000 fc5e 	bl	8027a74 <TimerIsExpired>
 80271b8:	4603      	mov	r3, r0
 80271ba:	2b00      	cmp	r3, #0
 80271bc:	d030      	beq.n	8027220 <keepalive+0x96>
    {
        if (c->ping_outstanding)
 80271be:	687b      	ldr	r3, [r7, #4]
 80271c0:	7f1b      	ldrb	r3, [r3, #28]
 80271c2:	2b00      	cmp	r3, #0
 80271c4:	d003      	beq.n	80271ce <keepalive+0x44>
            rc = FAILURE; /* PINGRESP not received in keepalive interval */
 80271c6:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80271ca:	617b      	str	r3, [r7, #20]
 80271cc:	e029      	b.n	8027222 <keepalive+0x98>
        else
        {
            Timer timer;
            TimerInit(&timer);
 80271ce:	f107 0308 	add.w	r3, r7, #8
 80271d2:	4618      	mov	r0, r3
 80271d4:	f000 fca6 	bl	8027b24 <TimerInit>
            TimerCountdownMS(&timer, 1000);
 80271d8:	f107 0308 	add.w	r3, r7, #8
 80271dc:	f44f 717a 	mov.w	r1, #1000	@ 0x3e8
 80271e0:	4618      	mov	r0, r3
 80271e2:	f000 fc5d 	bl	8027aa0 <TimerCountdownMS>
            int len = MQTTSerialize_pingreq(c->buf, c->buf_size);
 80271e6:	687b      	ldr	r3, [r7, #4]
 80271e8:	691a      	ldr	r2, [r3, #16]
 80271ea:	687b      	ldr	r3, [r7, #4]
 80271ec:	689b      	ldr	r3, [r3, #8]
 80271ee:	4619      	mov	r1, r3
 80271f0:	4610      	mov	r0, r2
 80271f2:	f000 ff34 	bl	802805e <MQTTSerialize_pingreq>
 80271f6:	6138      	str	r0, [r7, #16]
            if (len > 0 && (rc = sendPacket(c, len, &timer)) == MQTT_SUCCESS) // send the ping packet
 80271f8:	693b      	ldr	r3, [r7, #16]
 80271fa:	2b00      	cmp	r3, #0
 80271fc:	dd11      	ble.n	8027222 <keepalive+0x98>
 80271fe:	f107 0308 	add.w	r3, r7, #8
 8027202:	461a      	mov	r2, r3
 8027204:	6939      	ldr	r1, [r7, #16]
 8027206:	6878      	ldr	r0, [r7, #4]
 8027208:	f7ff fd8b 	bl	8026d22 <sendPacket>
 802720c:	6178      	str	r0, [r7, #20]
 802720e:	697b      	ldr	r3, [r7, #20]
 8027210:	2b00      	cmp	r3, #0
 8027212:	d106      	bne.n	8027222 <keepalive+0x98>
                c->ping_outstanding = 1;
 8027214:	687b      	ldr	r3, [r7, #4]
 8027216:	2201      	movs	r2, #1
 8027218:	771a      	strb	r2, [r3, #28]
 802721a:	e002      	b.n	8027222 <keepalive+0x98>
        goto exit;
 802721c:	bf00      	nop
 802721e:	e000      	b.n	8027222 <keepalive+0x98>
        }
    }

exit:
 8027220:	bf00      	nop
    return rc;
 8027222:	697b      	ldr	r3, [r7, #20]
}
 8027224:	4618      	mov	r0, r3
 8027226:	3718      	adds	r7, #24
 8027228:	46bd      	mov	sp, r7
 802722a:	bd80      	pop	{r7, pc}

0802722c <MQTTCleanSession>:


void MQTTCleanSession(MQTTClient* c)
{
 802722c:	b480      	push	{r7}
 802722e:	b085      	sub	sp, #20
 8027230:	af00      	add	r7, sp, #0
 8027232:	6078      	str	r0, [r7, #4]
    int i = 0;
 8027234:	2300      	movs	r3, #0
 8027236:	60fb      	str	r3, [r7, #12]

    for (i = 0; i < MAX_MESSAGE_HANDLERS; ++i)
 8027238:	2300      	movs	r3, #0
 802723a:	60fb      	str	r3, [r7, #12]
 802723c:	e008      	b.n	8027250 <MQTTCleanSession+0x24>
        c->messageHandlers[i].topicFilter = NULL;
 802723e:	687b      	ldr	r3, [r7, #4]
 8027240:	68fa      	ldr	r2, [r7, #12]
 8027242:	3205      	adds	r2, #5
 8027244:	2100      	movs	r1, #0
 8027246:	f843 1032 	str.w	r1, [r3, r2, lsl #3]
    for (i = 0; i < MAX_MESSAGE_HANDLERS; ++i)
 802724a:	68fb      	ldr	r3, [r7, #12]
 802724c:	3301      	adds	r3, #1
 802724e:	60fb      	str	r3, [r7, #12]
 8027250:	68fb      	ldr	r3, [r7, #12]
 8027252:	2b04      	cmp	r3, #4
 8027254:	ddf3      	ble.n	802723e <MQTTCleanSession+0x12>
}
 8027256:	bf00      	nop
 8027258:	bf00      	nop
 802725a:	3714      	adds	r7, #20
 802725c:	46bd      	mov	sp, r7
 802725e:	f85d 7b04 	ldr.w	r7, [sp], #4
 8027262:	4770      	bx	lr

08027264 <MQTTCloseSession>:


void MQTTCloseSession(MQTTClient* c)
{
 8027264:	b580      	push	{r7, lr}
 8027266:	b082      	sub	sp, #8
 8027268:	af00      	add	r7, sp, #0
 802726a:	6078      	str	r0, [r7, #4]
    c->ping_outstanding = 0;
 802726c:	687b      	ldr	r3, [r7, #4]
 802726e:	2200      	movs	r2, #0
 8027270:	771a      	strb	r2, [r3, #28]
    c->isconnected = 0;
 8027272:	687b      	ldr	r3, [r7, #4]
 8027274:	2200      	movs	r2, #0
 8027276:	621a      	str	r2, [r3, #32]
    if (c->cleansession)
 8027278:	687b      	ldr	r3, [r7, #4]
 802727a:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 802727c:	2b00      	cmp	r3, #0
 802727e:	d002      	beq.n	8027286 <MQTTCloseSession+0x22>
        MQTTCleanSession(c);
 8027280:	6878      	ldr	r0, [r7, #4]
 8027282:	f7ff ffd3 	bl	802722c <MQTTCleanSession>
}
 8027286:	bf00      	nop
 8027288:	3708      	adds	r7, #8
 802728a:	46bd      	mov	sp, r7
 802728c:	bd80      	pop	{r7, pc}
	...

08027290 <cycle>:


int cycle(MQTTClient* c, Timer* timer)
{
 8027290:	b5f0      	push	{r4, r5, r6, r7, lr}
 8027292:	b095      	sub	sp, #84	@ 0x54
 8027294:	af06      	add	r7, sp, #24
 8027296:	6078      	str	r0, [r7, #4]
 8027298:	6039      	str	r1, [r7, #0]
    int len = 0,
 802729a:	2300      	movs	r3, #0
 802729c:	637b      	str	r3, [r7, #52]	@ 0x34
        rc = MQTT_SUCCESS;
 802729e:	2300      	movs	r3, #0
 80272a0:	633b      	str	r3, [r7, #48]	@ 0x30

    int packet_type = readPacket(c, timer);     /* read the socket, see what work is due */
 80272a2:	6839      	ldr	r1, [r7, #0]
 80272a4:	6878      	ldr	r0, [r7, #4]
 80272a6:	f7ff fe1b 	bl	8026ee0 <readPacket>
 80272aa:	62f8      	str	r0, [r7, #44]	@ 0x2c

    switch (packet_type)
 80272ac:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80272ae:	2b0d      	cmp	r3, #13
 80272b0:	d81e      	bhi.n	80272f0 <cycle+0x60>
 80272b2:	a201      	add	r2, pc, #4	@ (adr r2, 80272b8 <cycle+0x28>)
 80272b4:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 80272b8:	08027447 	.word	0x08027447
 80272bc:	080272f1 	.word	0x080272f1
 80272c0:	08027447 	.word	0x08027447
 80272c4:	080272f7 	.word	0x080272f7
 80272c8:	08027447 	.word	0x08027447
 80272cc:	080273c3 	.word	0x080273c3
 80272d0:	080273c3 	.word	0x080273c3
 80272d4:	08027447 	.word	0x08027447
 80272d8:	080272f1 	.word	0x080272f1
 80272dc:	08027447 	.word	0x08027447
 80272e0:	080272f1 	.word	0x080272f1
 80272e4:	08027447 	.word	0x08027447
 80272e8:	080272f1 	.word	0x080272f1
 80272ec:	0802743f 	.word	0x0802743f
    {
        default:
            /* no more data to read, unrecoverable. Or read packet fails due to unexpected network error */
            rc = packet_type;
 80272f0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80272f2:	633b      	str	r3, [r7, #48]	@ 0x30
            goto exit;
 80272f4:	e0b9      	b.n	802746a <cycle+0x1da>
        case PUBLISH:
        {
            MQTTString topicName;
            MQTTMessage msg;
            int intQoS;
            msg.payloadlen = 0; /* this is a size_t, but deserialize publish sets this as int */
 80272f6:	2300      	movs	r3, #0
 80272f8:	61fb      	str	r3, [r7, #28]
            if (MQTTDeserialize_publish(&msg.dup, &intQoS, &msg.retained, &msg.id, &topicName,
 80272fa:	687b      	ldr	r3, [r7, #4]
 80272fc:	695b      	ldr	r3, [r3, #20]
               (unsigned char**)&msg.payload, (int*)&msg.payloadlen, c->readbuf, c->readbuf_size) != 1)
 80272fe:	687a      	ldr	r2, [r7, #4]
 8027300:	68d2      	ldr	r2, [r2, #12]
            if (MQTTDeserialize_publish(&msg.dup, &intQoS, &msg.retained, &msg.id, &topicName,
 8027302:	4616      	mov	r6, r2
 8027304:	f107 0210 	add.w	r2, r7, #16
 8027308:	1d15      	adds	r5, r2, #4
 802730a:	f107 0210 	add.w	r2, r7, #16
 802730e:	1c54      	adds	r4, r2, #1
 8027310:	f107 010c 	add.w	r1, r7, #12
 8027314:	f107 0210 	add.w	r2, r7, #16
 8027318:	1c90      	adds	r0, r2, #2
 802731a:	9604      	str	r6, [sp, #16]
 802731c:	9303      	str	r3, [sp, #12]
 802731e:	f107 0310 	add.w	r3, r7, #16
 8027322:	330c      	adds	r3, #12
 8027324:	9302      	str	r3, [sp, #8]
 8027326:	f107 0310 	add.w	r3, r7, #16
 802732a:	3308      	adds	r3, #8
 802732c:	9301      	str	r3, [sp, #4]
 802732e:	f107 0320 	add.w	r3, r7, #32
 8027332:	9300      	str	r3, [sp, #0]
 8027334:	462b      	mov	r3, r5
 8027336:	4622      	mov	r2, r4
 8027338:	f000 fea0 	bl	802807c <MQTTDeserialize_publish>
 802733c:	4603      	mov	r3, r0
 802733e:	2b01      	cmp	r3, #1
 8027340:	f040 8090 	bne.w	8027464 <cycle+0x1d4>
                goto exit;
            msg.qos = (enum QoS)intQoS;
 8027344:	68fb      	ldr	r3, [r7, #12]
 8027346:	b2db      	uxtb	r3, r3
 8027348:	743b      	strb	r3, [r7, #16]
            deliverMessage(c, &topicName, &msg);
 802734a:	f107 0210 	add.w	r2, r7, #16
 802734e:	f107 0320 	add.w	r3, r7, #32
 8027352:	4619      	mov	r1, r3
 8027354:	6878      	ldr	r0, [r7, #4]
 8027356:	f7ff feb0 	bl	80270ba <deliverMessage>
            if (msg.qos != QOS0)
 802735a:	7c3b      	ldrb	r3, [r7, #16]
 802735c:	2b00      	cmp	r3, #0
 802735e:	d074      	beq.n	802744a <cycle+0x1ba>
            {
                if (msg.qos == QOS1)
 8027360:	7c3b      	ldrb	r3, [r7, #16]
 8027362:	2b01      	cmp	r3, #1
 8027364:	d10c      	bne.n	8027380 <cycle+0xf0>
                    len = MQTTSerialize_ack(c->buf, c->buf_size, PUBACK, 0, msg.id);
 8027366:	687b      	ldr	r3, [r7, #4]
 8027368:	6918      	ldr	r0, [r3, #16]
 802736a:	687b      	ldr	r3, [r7, #4]
 802736c:	689b      	ldr	r3, [r3, #8]
 802736e:	4619      	mov	r1, r3
 8027370:	8abb      	ldrh	r3, [r7, #20]
 8027372:	9300      	str	r3, [sp, #0]
 8027374:	2300      	movs	r3, #0
 8027376:	2204      	movs	r2, #4
 8027378:	f001 f9d9 	bl	802872e <MQTTSerialize_ack>
 802737c:	6378      	str	r0, [r7, #52]	@ 0x34
 802737e:	e00e      	b.n	802739e <cycle+0x10e>
                else if (msg.qos == QOS2)
 8027380:	7c3b      	ldrb	r3, [r7, #16]
 8027382:	2b02      	cmp	r3, #2
 8027384:	d10b      	bne.n	802739e <cycle+0x10e>
                    len = MQTTSerialize_ack(c->buf, c->buf_size, PUBREC, 0, msg.id);
 8027386:	687b      	ldr	r3, [r7, #4]
 8027388:	6918      	ldr	r0, [r3, #16]
 802738a:	687b      	ldr	r3, [r7, #4]
 802738c:	689b      	ldr	r3, [r3, #8]
 802738e:	4619      	mov	r1, r3
 8027390:	8abb      	ldrh	r3, [r7, #20]
 8027392:	9300      	str	r3, [sp, #0]
 8027394:	2300      	movs	r3, #0
 8027396:	2205      	movs	r2, #5
 8027398:	f001 f9c9 	bl	802872e <MQTTSerialize_ack>
 802739c:	6378      	str	r0, [r7, #52]	@ 0x34
                if (len <= 0)
 802739e:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 80273a0:	2b00      	cmp	r3, #0
 80273a2:	dc03      	bgt.n	80273ac <cycle+0x11c>
                    rc = FAILURE;
 80273a4:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80273a8:	633b      	str	r3, [r7, #48]	@ 0x30
 80273aa:	e005      	b.n	80273b8 <cycle+0x128>
                else
                    rc = sendPacket(c, len, timer);
 80273ac:	683a      	ldr	r2, [r7, #0]
 80273ae:	6b79      	ldr	r1, [r7, #52]	@ 0x34
 80273b0:	6878      	ldr	r0, [r7, #4]
 80273b2:	f7ff fcb6 	bl	8026d22 <sendPacket>
 80273b6:	6338      	str	r0, [r7, #48]	@ 0x30
                if (rc == FAILURE)
 80273b8:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80273ba:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 80273be:	d144      	bne.n	802744a <cycle+0x1ba>
                    goto exit; // there was a problem
 80273c0:	e053      	b.n	802746a <cycle+0x1da>
        case PUBREC:
        case PUBREL:
        {
            unsigned short mypacketid;
            unsigned char dup, type;
            if (MQTTDeserialize_ack(&type, &dup, &mypacketid, c->readbuf, c->readbuf_size) != 1)
 80273c2:	687b      	ldr	r3, [r7, #4]
 80273c4:	695c      	ldr	r4, [r3, #20]
 80273c6:	687b      	ldr	r3, [r7, #4]
 80273c8:	68db      	ldr	r3, [r3, #12]
 80273ca:	f107 020a 	add.w	r2, r7, #10
 80273ce:	f107 0109 	add.w	r1, r7, #9
 80273d2:	f107 0008 	add.w	r0, r7, #8
 80273d6:	9300      	str	r3, [sp, #0]
 80273d8:	4623      	mov	r3, r4
 80273da:	f000 fec1 	bl	8028160 <MQTTDeserialize_ack>
 80273de:	4603      	mov	r3, r0
 80273e0:	2b01      	cmp	r3, #1
 80273e2:	d003      	beq.n	80273ec <cycle+0x15c>
                rc = FAILURE;
 80273e4:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80273e8:	633b      	str	r3, [r7, #48]	@ 0x30
 80273ea:	e023      	b.n	8027434 <cycle+0x1a4>
            else if ((len = MQTTSerialize_ack(c->buf, c->buf_size,
 80273ec:	687b      	ldr	r3, [r7, #4]
 80273ee:	6918      	ldr	r0, [r3, #16]
 80273f0:	687b      	ldr	r3, [r7, #4]
 80273f2:	689b      	ldr	r3, [r3, #8]
 80273f4:	4619      	mov	r1, r3
 80273f6:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80273f8:	2b05      	cmp	r3, #5
 80273fa:	d101      	bne.n	8027400 <cycle+0x170>
 80273fc:	2206      	movs	r2, #6
 80273fe:	e000      	b.n	8027402 <cycle+0x172>
 8027400:	2207      	movs	r2, #7
 8027402:	897b      	ldrh	r3, [r7, #10]
 8027404:	9300      	str	r3, [sp, #0]
 8027406:	2300      	movs	r3, #0
 8027408:	f001 f991 	bl	802872e <MQTTSerialize_ack>
 802740c:	6378      	str	r0, [r7, #52]	@ 0x34
 802740e:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8027410:	2b00      	cmp	r3, #0
 8027412:	dc03      	bgt.n	802741c <cycle+0x18c>
                (packet_type == PUBREC) ? PUBREL : PUBCOMP, 0, mypacketid)) <= 0)
                rc = FAILURE;
 8027414:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8027418:	633b      	str	r3, [r7, #48]	@ 0x30
 802741a:	e00b      	b.n	8027434 <cycle+0x1a4>
            else if ((rc = sendPacket(c, len, timer)) != MQTT_SUCCESS) // send the PUBREL packet
 802741c:	683a      	ldr	r2, [r7, #0]
 802741e:	6b79      	ldr	r1, [r7, #52]	@ 0x34
 8027420:	6878      	ldr	r0, [r7, #4]
 8027422:	f7ff fc7e 	bl	8026d22 <sendPacket>
 8027426:	6338      	str	r0, [r7, #48]	@ 0x30
 8027428:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 802742a:	2b00      	cmp	r3, #0
 802742c:	d002      	beq.n	8027434 <cycle+0x1a4>
                rc = FAILURE; // there was a problem
 802742e:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8027432:	633b      	str	r3, [r7, #48]	@ 0x30
            if (rc == FAILURE)
 8027434:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8027436:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 802743a:	d108      	bne.n	802744e <cycle+0x1be>
                goto exit; // there was a problem
 802743c:	e015      	b.n	802746a <cycle+0x1da>
        }

        case PUBCOMP:
            break;
        case PINGRESP:
            c->ping_outstanding = 0;
 802743e:	687b      	ldr	r3, [r7, #4]
 8027440:	2200      	movs	r2, #0
 8027442:	771a      	strb	r2, [r3, #28]
            break;
 8027444:	e004      	b.n	8027450 <cycle+0x1c0>
            break;
 8027446:	bf00      	nop
 8027448:	e002      	b.n	8027450 <cycle+0x1c0>
            break;
 802744a:	bf00      	nop
 802744c:	e000      	b.n	8027450 <cycle+0x1c0>
            break;
 802744e:	bf00      	nop
    }

    if (keepalive(c) != MQTT_SUCCESS) {
 8027450:	6878      	ldr	r0, [r7, #4]
 8027452:	f7ff fe9a 	bl	802718a <keepalive>
 8027456:	4603      	mov	r3, r0
 8027458:	2b00      	cmp	r3, #0
 802745a:	d005      	beq.n	8027468 <cycle+0x1d8>
        //check only keepalive FAILURE status so that previous FAILURE status can be considered as FAULT
        rc = FAILURE;
 802745c:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8027460:	633b      	str	r3, [r7, #48]	@ 0x30
 8027462:	e002      	b.n	802746a <cycle+0x1da>
                goto exit;
 8027464:	bf00      	nop
 8027466:	e000      	b.n	802746a <cycle+0x1da>
    }

exit:
 8027468:	bf00      	nop
    if (rc == MQTT_SUCCESS)
 802746a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 802746c:	2b00      	cmp	r3, #0
 802746e:	d102      	bne.n	8027476 <cycle+0x1e6>
        rc = packet_type;
 8027470:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8027472:	633b      	str	r3, [r7, #48]	@ 0x30
 8027474:	e006      	b.n	8027484 <cycle+0x1f4>
    else if (c->isconnected)
 8027476:	687b      	ldr	r3, [r7, #4]
 8027478:	6a1b      	ldr	r3, [r3, #32]
 802747a:	2b00      	cmp	r3, #0
 802747c:	d002      	beq.n	8027484 <cycle+0x1f4>
        MQTTCloseSession(c);
 802747e:	6878      	ldr	r0, [r7, #4]
 8027480:	f7ff fef0 	bl	8027264 <MQTTCloseSession>
    return rc;
 8027484:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
}
 8027486:	4618      	mov	r0, r3
 8027488:	373c      	adds	r7, #60	@ 0x3c
 802748a:	46bd      	mov	sp, r7
 802748c:	bdf0      	pop	{r4, r5, r6, r7, pc}
 802748e:	bf00      	nop

08027490 <MQTTYield>:


int MQTTYield(MQTTClient* c, int timeout_ms)
{
 8027490:	b580      	push	{r7, lr}
 8027492:	b086      	sub	sp, #24
 8027494:	af00      	add	r7, sp, #0
 8027496:	6078      	str	r0, [r7, #4]
 8027498:	6039      	str	r1, [r7, #0]
    int rc = MQTT_SUCCESS;
 802749a:	2300      	movs	r3, #0
 802749c:	617b      	str	r3, [r7, #20]
    Timer timer;

    TimerInit(&timer);
 802749e:	f107 030c 	add.w	r3, r7, #12
 80274a2:	4618      	mov	r0, r3
 80274a4:	f000 fb3e 	bl	8027b24 <TimerInit>
    TimerCountdownMS(&timer, timeout_ms);
 80274a8:	683a      	ldr	r2, [r7, #0]
 80274aa:	f107 030c 	add.w	r3, r7, #12
 80274ae:	4611      	mov	r1, r2
 80274b0:	4618      	mov	r0, r3
 80274b2:	f000 faf5 	bl	8027aa0 <TimerCountdownMS>

	  do
    {
        if (cycle(c, &timer) < 0)
 80274b6:	f107 030c 	add.w	r3, r7, #12
 80274ba:	4619      	mov	r1, r3
 80274bc:	6878      	ldr	r0, [r7, #4]
 80274be:	f7ff fee7 	bl	8027290 <cycle>
 80274c2:	4603      	mov	r3, r0
 80274c4:	2b00      	cmp	r3, #0
 80274c6:	da03      	bge.n	80274d0 <MQTTYield+0x40>
        {
            rc = FAILURE;
 80274c8:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80274cc:	617b      	str	r3, [r7, #20]
            break;
 80274ce:	e007      	b.n	80274e0 <MQTTYield+0x50>
        }
  	} while (!TimerIsExpired(&timer));
 80274d0:	f107 030c 	add.w	r3, r7, #12
 80274d4:	4618      	mov	r0, r3
 80274d6:	f000 facd 	bl	8027a74 <TimerIsExpired>
 80274da:	4603      	mov	r3, r0
 80274dc:	2b00      	cmp	r3, #0
 80274de:	d0ea      	beq.n	80274b6 <MQTTYield+0x26>

    return rc;
 80274e0:	697b      	ldr	r3, [r7, #20]
}
 80274e2:	4618      	mov	r0, r3
 80274e4:	3718      	adds	r7, #24
 80274e6:	46bd      	mov	sp, r7
 80274e8:	bd80      	pop	{r7, pc}

080274ea <waitfor>:
}
#endif


int waitfor(MQTTClient* c, int packet_type, Timer* timer)
{
 80274ea:	b580      	push	{r7, lr}
 80274ec:	b086      	sub	sp, #24
 80274ee:	af00      	add	r7, sp, #0
 80274f0:	60f8      	str	r0, [r7, #12]
 80274f2:	60b9      	str	r1, [r7, #8]
 80274f4:	607a      	str	r2, [r7, #4]
    int rc = FAILURE;
 80274f6:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80274fa:	617b      	str	r3, [r7, #20]

    do
    {
        if (TimerIsExpired(timer))
 80274fc:	6878      	ldr	r0, [r7, #4]
 80274fe:	f000 fab9 	bl	8027a74 <TimerIsExpired>
 8027502:	4603      	mov	r3, r0
 8027504:	2b00      	cmp	r3, #0
 8027506:	d10c      	bne.n	8027522 <waitfor+0x38>
            break; // we timed out
        rc = cycle(c, timer);
 8027508:	6879      	ldr	r1, [r7, #4]
 802750a:	68f8      	ldr	r0, [r7, #12]
 802750c:	f7ff fec0 	bl	8027290 <cycle>
 8027510:	6178      	str	r0, [r7, #20]
    }
    while (rc != packet_type && rc >= 0);
 8027512:	697a      	ldr	r2, [r7, #20]
 8027514:	68bb      	ldr	r3, [r7, #8]
 8027516:	429a      	cmp	r2, r3
 8027518:	d004      	beq.n	8027524 <waitfor+0x3a>
 802751a:	697b      	ldr	r3, [r7, #20]
 802751c:	2b00      	cmp	r3, #0
 802751e:	daed      	bge.n	80274fc <waitfor+0x12>
 8027520:	e000      	b.n	8027524 <waitfor+0x3a>
            break; // we timed out
 8027522:	bf00      	nop

    return rc;
 8027524:	697b      	ldr	r3, [r7, #20]
}
 8027526:	4618      	mov	r0, r3
 8027528:	3718      	adds	r7, #24
 802752a:	46bd      	mov	sp, r7
 802752c:	bd80      	pop	{r7, pc}
	...

08027530 <MQTTConnectWithResults>:




int MQTTConnectWithResults(MQTTClient* c, MQTTPacket_connectData* options, MQTTConnackData* data)
{
 8027530:	b580      	push	{r7, lr}
 8027532:	b09e      	sub	sp, #120	@ 0x78
 8027534:	af00      	add	r7, sp, #0
 8027536:	60f8      	str	r0, [r7, #12]
 8027538:	60b9      	str	r1, [r7, #8]
 802753a:	607a      	str	r2, [r7, #4]
    Timer connect_timer;
    int rc = FAILURE;
 802753c:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8027540:	677b      	str	r3, [r7, #116]	@ 0x74
    MQTTPacket_connectData default_options = MQTTPacket_connectData_initializer;
 8027542:	4a49      	ldr	r2, [pc, #292]	@ (8027668 <MQTTConnectWithResults+0x138>)
 8027544:	f107 0310 	add.w	r3, r7, #16
 8027548:	4611      	mov	r1, r2
 802754a:	2258      	movs	r2, #88	@ 0x58
 802754c:	4618      	mov	r0, r3
 802754e:	f003 f8be 	bl	802a6ce <memcpy>
    int len = 0;
 8027552:	2300      	movs	r3, #0
 8027554:	673b      	str	r3, [r7, #112]	@ 0x70

#if defined(MQTT_TASK)
	  MutexLock(&c->mutex);
#endif
//	  osMutexAcquire(mqttMutex, osWaitForever);
	  osMutexAcquire(c->mutex, osWaitForever);
 8027556:	68fb      	ldr	r3, [r7, #12]
 8027558:	6e9b      	ldr	r3, [r3, #104]	@ 0x68
 802755a:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 802755e:	4618      	mov	r0, r3
 8027560:	f7e9 fde8 	bl	8011134 <osMutexAcquire>
	  if (c->isconnected) /* don't send connect packet again if we are already connected */
 8027564:	68fb      	ldr	r3, [r7, #12]
 8027566:	6a1b      	ldr	r3, [r3, #32]
 8027568:	2b00      	cmp	r3, #0
 802756a:	d164      	bne.n	8027636 <MQTTConnectWithResults+0x106>
		  goto exit;

    TimerInit(&connect_timer);
 802756c:	f107 0368 	add.w	r3, r7, #104	@ 0x68
 8027570:	4618      	mov	r0, r3
 8027572:	f000 fad7 	bl	8027b24 <TimerInit>
    TimerCountdownMS(&connect_timer, c->command_timeout_ms);
 8027576:	68fb      	ldr	r3, [r7, #12]
 8027578:	685a      	ldr	r2, [r3, #4]
 802757a:	f107 0368 	add.w	r3, r7, #104	@ 0x68
 802757e:	4611      	mov	r1, r2
 8027580:	4618      	mov	r0, r3
 8027582:	f000 fa8d 	bl	8027aa0 <TimerCountdownMS>

    if (options == 0)
 8027586:	68bb      	ldr	r3, [r7, #8]
 8027588:	2b00      	cmp	r3, #0
 802758a:	d102      	bne.n	8027592 <MQTTConnectWithResults+0x62>
        options = &default_options; /* set default options if none were supplied */
 802758c:	f107 0310 	add.w	r3, r7, #16
 8027590:	60bb      	str	r3, [r7, #8]

    c->keepAliveInterval = options->keepAliveInterval;
 8027592:	68bb      	ldr	r3, [r7, #8]
 8027594:	8b1b      	ldrh	r3, [r3, #24]
 8027596:	461a      	mov	r2, r3
 8027598:	68fb      	ldr	r3, [r7, #12]
 802759a:	619a      	str	r2, [r3, #24]
    c->cleansession = options->cleansession;
 802759c:	68bb      	ldr	r3, [r7, #8]
 802759e:	7e9b      	ldrb	r3, [r3, #26]
 80275a0:	461a      	mov	r2, r3
 80275a2:	68fb      	ldr	r3, [r7, #12]
 80275a4:	625a      	str	r2, [r3, #36]	@ 0x24
    TimerCountdown(&c->last_received, c->keepAliveInterval);
 80275a6:	68fb      	ldr	r3, [r7, #12]
 80275a8:	f103 0260 	add.w	r2, r3, #96	@ 0x60
 80275ac:	68fb      	ldr	r3, [r7, #12]
 80275ae:	699b      	ldr	r3, [r3, #24]
 80275b0:	4619      	mov	r1, r3
 80275b2:	4610      	mov	r0, r2
 80275b4:	f000 fa88 	bl	8027ac8 <TimerCountdown>
    if ((len = MQTTSerialize_connect(c->buf, c->buf_size, options)) <= 0)
 80275b8:	68fb      	ldr	r3, [r7, #12]
 80275ba:	6918      	ldr	r0, [r3, #16]
 80275bc:	68fb      	ldr	r3, [r7, #12]
 80275be:	689b      	ldr	r3, [r3, #8]
 80275c0:	68ba      	ldr	r2, [r7, #8]
 80275c2:	4619      	mov	r1, r3
 80275c4:	f000 fbd2 	bl	8027d6c <MQTTSerialize_connect>
 80275c8:	6738      	str	r0, [r7, #112]	@ 0x70
 80275ca:	6f3b      	ldr	r3, [r7, #112]	@ 0x70
 80275cc:	2b00      	cmp	r3, #0
 80275ce:	dd34      	ble.n	802763a <MQTTConnectWithResults+0x10a>
        goto exit;
    if ((rc = sendPacket(c, len, &connect_timer)) != MQTT_SUCCESS)  // send the connect packet
 80275d0:	f107 0368 	add.w	r3, r7, #104	@ 0x68
 80275d4:	461a      	mov	r2, r3
 80275d6:	6f39      	ldr	r1, [r7, #112]	@ 0x70
 80275d8:	68f8      	ldr	r0, [r7, #12]
 80275da:	f7ff fba2 	bl	8026d22 <sendPacket>
 80275de:	6778      	str	r0, [r7, #116]	@ 0x74
 80275e0:	6f7b      	ldr	r3, [r7, #116]	@ 0x74
 80275e2:	2b00      	cmp	r3, #0
 80275e4:	d12b      	bne.n	802763e <MQTTConnectWithResults+0x10e>
        goto exit; // there was a problem

    // this will be a blocking call, wait for the connack
    if (waitfor(c, CONNACK, &connect_timer) == CONNACK)
 80275e6:	f107 0368 	add.w	r3, r7, #104	@ 0x68
 80275ea:	461a      	mov	r2, r3
 80275ec:	2102      	movs	r1, #2
 80275ee:	68f8      	ldr	r0, [r7, #12]
 80275f0:	f7ff ff7b 	bl	80274ea <waitfor>
 80275f4:	4603      	mov	r3, r0
 80275f6:	2b02      	cmp	r3, #2
 80275f8:	d119      	bne.n	802762e <MQTTConnectWithResults+0xfe>
    {
        data->rc = 0;
 80275fa:	687b      	ldr	r3, [r7, #4]
 80275fc:	2200      	movs	r2, #0
 80275fe:	701a      	strb	r2, [r3, #0]
        data->sessionPresent = 0;
 8027600:	687b      	ldr	r3, [r7, #4]
 8027602:	2200      	movs	r2, #0
 8027604:	705a      	strb	r2, [r3, #1]
        if (MQTTDeserialize_connack(&data->sessionPresent, &data->rc, c->readbuf, c->readbuf_size) == 1)
 8027606:	687b      	ldr	r3, [r7, #4]
 8027608:	1c58      	adds	r0, r3, #1
 802760a:	6879      	ldr	r1, [r7, #4]
 802760c:	68fb      	ldr	r3, [r7, #12]
 802760e:	695a      	ldr	r2, [r3, #20]
 8027610:	68fb      	ldr	r3, [r7, #12]
 8027612:	68db      	ldr	r3, [r3, #12]
 8027614:	f000 fc96 	bl	8027f44 <MQTTDeserialize_connack>
 8027618:	4603      	mov	r3, r0
 802761a:	2b01      	cmp	r3, #1
 802761c:	d103      	bne.n	8027626 <MQTTConnectWithResults+0xf6>
            rc = data->rc;
 802761e:	687b      	ldr	r3, [r7, #4]
 8027620:	781b      	ldrb	r3, [r3, #0]
 8027622:	677b      	str	r3, [r7, #116]	@ 0x74
 8027624:	e00c      	b.n	8027640 <MQTTConnectWithResults+0x110>
//        	rc = MQTT_SUCCESS;
        else
            rc = FAILURE;
 8027626:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 802762a:	677b      	str	r3, [r7, #116]	@ 0x74
 802762c:	e008      	b.n	8027640 <MQTTConnectWithResults+0x110>
    }
    else
        rc = FAILURE;
 802762e:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8027632:	677b      	str	r3, [r7, #116]	@ 0x74
 8027634:	e004      	b.n	8027640 <MQTTConnectWithResults+0x110>
		  goto exit;
 8027636:	bf00      	nop
 8027638:	e002      	b.n	8027640 <MQTTConnectWithResults+0x110>
        goto exit;
 802763a:	bf00      	nop
 802763c:	e000      	b.n	8027640 <MQTTConnectWithResults+0x110>
        goto exit; // there was a problem
 802763e:	bf00      	nop

exit:
    if (rc == MQTT_SUCCESS)
 8027640:	6f7b      	ldr	r3, [r7, #116]	@ 0x74
 8027642:	2b00      	cmp	r3, #0
 8027644:	d105      	bne.n	8027652 <MQTTConnectWithResults+0x122>
    {
        c->isconnected = 1;
 8027646:	68fb      	ldr	r3, [r7, #12]
 8027648:	2201      	movs	r2, #1
 802764a:	621a      	str	r2, [r3, #32]
        c->ping_outstanding = 0;
 802764c:	68fb      	ldr	r3, [r7, #12]
 802764e:	2200      	movs	r2, #0
 8027650:	771a      	strb	r2, [r3, #28]

#if defined(MQTT_TASK)
	  MutexUnlock(&c->mutex);
#endif
//	osMutexRelease(mqttMutex);
	osMutexRelease(c->mutex);
 8027652:	68fb      	ldr	r3, [r7, #12]
 8027654:	6e9b      	ldr	r3, [r3, #104]	@ 0x68
 8027656:	4618      	mov	r0, r3
 8027658:	f7e9 fdb7 	bl	80111ca <osMutexRelease>
    return rc;
 802765c:	6f7b      	ldr	r3, [r7, #116]	@ 0x74
}
 802765e:	4618      	mov	r0, r3
 8027660:	3778      	adds	r7, #120	@ 0x78
 8027662:	46bd      	mov	sp, r7
 8027664:	bd80      	pop	{r7, pc}
 8027666:	bf00      	nop
 8027668:	080311bc 	.word	0x080311bc

0802766c <MQTTConnect>:


int MQTTConnect(MQTTClient* c, MQTTPacket_connectData* options)
{
 802766c:	b580      	push	{r7, lr}
 802766e:	b084      	sub	sp, #16
 8027670:	af00      	add	r7, sp, #0
 8027672:	6078      	str	r0, [r7, #4]
 8027674:	6039      	str	r1, [r7, #0]
    MQTTConnackData data;
    return MQTTConnectWithResults(c, options, &data);
 8027676:	f107 030c 	add.w	r3, r7, #12
 802767a:	461a      	mov	r2, r3
 802767c:	6839      	ldr	r1, [r7, #0]
 802767e:	6878      	ldr	r0, [r7, #4]
 8027680:	f7ff ff56 	bl	8027530 <MQTTConnectWithResults>
 8027684:	4603      	mov	r3, r0
}
 8027686:	4618      	mov	r0, r3
 8027688:	3710      	adds	r7, #16
 802768a:	46bd      	mov	sp, r7
 802768c:	bd80      	pop	{r7, pc}

0802768e <MQTTSetMessageHandler>:


int MQTTSetMessageHandler(MQTTClient* c, const char* topicFilter, messageHandler messageHandler)
{
 802768e:	b580      	push	{r7, lr}
 8027690:	b086      	sub	sp, #24
 8027692:	af00      	add	r7, sp, #0
 8027694:	60f8      	str	r0, [r7, #12]
 8027696:	60b9      	str	r1, [r7, #8]
 8027698:	607a      	str	r2, [r7, #4]
    int rc = FAILURE;
 802769a:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 802769e:	617b      	str	r3, [r7, #20]
    int i = -1;
 80276a0:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80276a4:	613b      	str	r3, [r7, #16]

    /* first check for an existing matching slot */
    for (i = 0; i < MAX_MESSAGE_HANDLERS; ++i)
 80276a6:	2300      	movs	r3, #0
 80276a8:	613b      	str	r3, [r7, #16]
 80276aa:	e028      	b.n	80276fe <MQTTSetMessageHandler+0x70>
    {
        if (c->messageHandlers[i].topicFilter != NULL && strcmp(c->messageHandlers[i].topicFilter, topicFilter) == 0)
 80276ac:	68fb      	ldr	r3, [r7, #12]
 80276ae:	693a      	ldr	r2, [r7, #16]
 80276b0:	3205      	adds	r2, #5
 80276b2:	f853 3032 	ldr.w	r3, [r3, r2, lsl #3]
 80276b6:	2b00      	cmp	r3, #0
 80276b8:	d01e      	beq.n	80276f8 <MQTTSetMessageHandler+0x6a>
 80276ba:	68fb      	ldr	r3, [r7, #12]
 80276bc:	693a      	ldr	r2, [r7, #16]
 80276be:	3205      	adds	r2, #5
 80276c0:	f853 3032 	ldr.w	r3, [r3, r2, lsl #3]
 80276c4:	68b9      	ldr	r1, [r7, #8]
 80276c6:	4618      	mov	r0, r3
 80276c8:	f7d8 fe0a 	bl	80002e0 <strcmp>
 80276cc:	4603      	mov	r3, r0
 80276ce:	2b00      	cmp	r3, #0
 80276d0:	d112      	bne.n	80276f8 <MQTTSetMessageHandler+0x6a>
        {
            if (messageHandler == NULL) /* remove existing */
 80276d2:	687b      	ldr	r3, [r7, #4]
 80276d4:	2b00      	cmp	r3, #0
 80276d6:	d10c      	bne.n	80276f2 <MQTTSetMessageHandler+0x64>
            {
                c->messageHandlers[i].topicFilter = NULL;
 80276d8:	68fb      	ldr	r3, [r7, #12]
 80276da:	693a      	ldr	r2, [r7, #16]
 80276dc:	3205      	adds	r2, #5
 80276de:	2100      	movs	r1, #0
 80276e0:	f843 1032 	str.w	r1, [r3, r2, lsl #3]
                c->messageHandlers[i].fp = NULL;
 80276e4:	68fa      	ldr	r2, [r7, #12]
 80276e6:	693b      	ldr	r3, [r7, #16]
 80276e8:	3305      	adds	r3, #5
 80276ea:	00db      	lsls	r3, r3, #3
 80276ec:	4413      	add	r3, r2
 80276ee:	2200      	movs	r2, #0
 80276f0:	605a      	str	r2, [r3, #4]
            }
            rc = MQTT_SUCCESS; /* return i when adding new subscription */
 80276f2:	2300      	movs	r3, #0
 80276f4:	617b      	str	r3, [r7, #20]
            break;
 80276f6:	e005      	b.n	8027704 <MQTTSetMessageHandler+0x76>
    for (i = 0; i < MAX_MESSAGE_HANDLERS; ++i)
 80276f8:	693b      	ldr	r3, [r7, #16]
 80276fa:	3301      	adds	r3, #1
 80276fc:	613b      	str	r3, [r7, #16]
 80276fe:	693b      	ldr	r3, [r7, #16]
 8027700:	2b04      	cmp	r3, #4
 8027702:	ddd3      	ble.n	80276ac <MQTTSetMessageHandler+0x1e>
        }
    }
    /* if no existing, look for empty slot (unless we are removing) */
    if (messageHandler != NULL) {
 8027704:	687b      	ldr	r3, [r7, #4]
 8027706:	2b00      	cmp	r3, #0
 8027708:	d026      	beq.n	8027758 <MQTTSetMessageHandler+0xca>
        if (rc == FAILURE)
 802770a:	697b      	ldr	r3, [r7, #20]
 802770c:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8027710:	d112      	bne.n	8027738 <MQTTSetMessageHandler+0xaa>
        {
            for (i = 0; i < MAX_MESSAGE_HANDLERS; ++i)
 8027712:	2300      	movs	r3, #0
 8027714:	613b      	str	r3, [r7, #16]
 8027716:	e00c      	b.n	8027732 <MQTTSetMessageHandler+0xa4>
            {
                if (c->messageHandlers[i].topicFilter == NULL)
 8027718:	68fb      	ldr	r3, [r7, #12]
 802771a:	693a      	ldr	r2, [r7, #16]
 802771c:	3205      	adds	r2, #5
 802771e:	f853 3032 	ldr.w	r3, [r3, r2, lsl #3]
 8027722:	2b00      	cmp	r3, #0
 8027724:	d102      	bne.n	802772c <MQTTSetMessageHandler+0x9e>
                {
                    rc = MQTT_SUCCESS;
 8027726:	2300      	movs	r3, #0
 8027728:	617b      	str	r3, [r7, #20]
                    break;
 802772a:	e005      	b.n	8027738 <MQTTSetMessageHandler+0xaa>
            for (i = 0; i < MAX_MESSAGE_HANDLERS; ++i)
 802772c:	693b      	ldr	r3, [r7, #16]
 802772e:	3301      	adds	r3, #1
 8027730:	613b      	str	r3, [r7, #16]
 8027732:	693b      	ldr	r3, [r7, #16]
 8027734:	2b04      	cmp	r3, #4
 8027736:	ddef      	ble.n	8027718 <MQTTSetMessageHandler+0x8a>
                }
            }
        }
        if (i < MAX_MESSAGE_HANDLERS)
 8027738:	693b      	ldr	r3, [r7, #16]
 802773a:	2b04      	cmp	r3, #4
 802773c:	dc0c      	bgt.n	8027758 <MQTTSetMessageHandler+0xca>
        {
            c->messageHandlers[i].topicFilter = topicFilter;
 802773e:	68fb      	ldr	r3, [r7, #12]
 8027740:	693a      	ldr	r2, [r7, #16]
 8027742:	3205      	adds	r2, #5
 8027744:	68b9      	ldr	r1, [r7, #8]
 8027746:	f843 1032 	str.w	r1, [r3, r2, lsl #3]
            c->messageHandlers[i].fp = messageHandler;
 802774a:	68fa      	ldr	r2, [r7, #12]
 802774c:	693b      	ldr	r3, [r7, #16]
 802774e:	3305      	adds	r3, #5
 8027750:	00db      	lsls	r3, r3, #3
 8027752:	4413      	add	r3, r2
 8027754:	687a      	ldr	r2, [r7, #4]
 8027756:	605a      	str	r2, [r3, #4]
        }
    }
    return rc;
 8027758:	697b      	ldr	r3, [r7, #20]
}
 802775a:	4618      	mov	r0, r3
 802775c:	3718      	adds	r7, #24
 802775e:	46bd      	mov	sp, r7
 8027760:	bd80      	pop	{r7, pc}

08027762 <MQTTSubscribeWithResults>:


int MQTTSubscribeWithResults(MQTTClient* c, const char* topicFilter, enum QoS qos,
       messageHandler messageHandler, MQTTSubackData* data)
{
 8027762:	b5b0      	push	{r4, r5, r7, lr}
 8027764:	b094      	sub	sp, #80	@ 0x50
 8027766:	af04      	add	r7, sp, #16
 8027768:	60f8      	str	r0, [r7, #12]
 802776a:	60b9      	str	r1, [r7, #8]
 802776c:	603b      	str	r3, [r7, #0]
 802776e:	4613      	mov	r3, r2
 8027770:	71fb      	strb	r3, [r7, #7]
    int rc = FAILURE;
 8027772:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8027776:	63fb      	str	r3, [r7, #60]	@ 0x3c
    Timer timer;
    int len = 0;
 8027778:	2300      	movs	r3, #0
 802777a:	63bb      	str	r3, [r7, #56]	@ 0x38
    MQTTString topic = MQTTString_initializer;
 802777c:	2300      	movs	r3, #0
 802777e:	627b      	str	r3, [r7, #36]	@ 0x24
 8027780:	2300      	movs	r3, #0
 8027782:	62bb      	str	r3, [r7, #40]	@ 0x28
 8027784:	2300      	movs	r3, #0
 8027786:	62fb      	str	r3, [r7, #44]	@ 0x2c
    topic.cstring = (char *)topicFilter;
 8027788:	68bb      	ldr	r3, [r7, #8]
 802778a:	627b      	str	r3, [r7, #36]	@ 0x24

#if defined(MQTT_TASK)
	  MutexLock(&c->mutex);
#endif
//	  osMutexAcquire(mqttMutex, osWaitForever);
	  osMutexAcquire(c->mutex, osWaitForever);
 802778c:	68fb      	ldr	r3, [r7, #12]
 802778e:	6e9b      	ldr	r3, [r3, #104]	@ 0x68
 8027790:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 8027794:	4618      	mov	r0, r3
 8027796:	f7e9 fccd 	bl	8011134 <osMutexAcquire>
	  if (!c->isconnected)
 802779a:	68fb      	ldr	r3, [r7, #12]
 802779c:	6a1b      	ldr	r3, [r3, #32]
 802779e:	2b00      	cmp	r3, #0
 80277a0:	d069      	beq.n	8027876 <MQTTSubscribeWithResults+0x114>
		    goto exit;

    TimerInit(&timer);
 80277a2:	f107 0330 	add.w	r3, r7, #48	@ 0x30
 80277a6:	4618      	mov	r0, r3
 80277a8:	f000 f9bc 	bl	8027b24 <TimerInit>
    TimerCountdownMS(&timer, c->command_timeout_ms);
 80277ac:	68fb      	ldr	r3, [r7, #12]
 80277ae:	685a      	ldr	r2, [r3, #4]
 80277b0:	f107 0330 	add.w	r3, r7, #48	@ 0x30
 80277b4:	4611      	mov	r1, r2
 80277b6:	4618      	mov	r0, r3
 80277b8:	f000 f972 	bl	8027aa0 <TimerCountdownMS>
    int _qos[1] = {(int)qos};
 80277bc:	79fb      	ldrb	r3, [r7, #7]
 80277be:	623b      	str	r3, [r7, #32]
    len = MQTTSerialize_subscribe(c->buf, c->buf_size, 0, getNextPacketId(c), 1, &topic, _qos);
 80277c0:	68fb      	ldr	r3, [r7, #12]
 80277c2:	691c      	ldr	r4, [r3, #16]
 80277c4:	68fb      	ldr	r3, [r7, #12]
 80277c6:	689b      	ldr	r3, [r3, #8]
 80277c8:	461d      	mov	r5, r3
 80277ca:	68f8      	ldr	r0, [r7, #12]
 80277cc:	f7ff fa90 	bl	8026cf0 <getNextPacketId>
 80277d0:	4603      	mov	r3, r0
 80277d2:	b29a      	uxth	r2, r3
 80277d4:	f107 0320 	add.w	r3, r7, #32
 80277d8:	9302      	str	r3, [sp, #8]
 80277da:	f107 0324 	add.w	r3, r7, #36	@ 0x24
 80277de:	9301      	str	r3, [sp, #4]
 80277e0:	2301      	movs	r3, #1
 80277e2:	9300      	str	r3, [sp, #0]
 80277e4:	4613      	mov	r3, r2
 80277e6:	2200      	movs	r2, #0
 80277e8:	4629      	mov	r1, r5
 80277ea:	4620      	mov	r0, r4
 80277ec:	f001 f81b 	bl	8028826 <MQTTSerialize_subscribe>
 80277f0:	63b8      	str	r0, [r7, #56]	@ 0x38
//    len = MQTTSerialize_subscribe(c->buf, c->buf_size, 0, getNextPacketId(c), 1, &topic, (int*)&qos);
    if (len <= 0)
 80277f2:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 80277f4:	2b00      	cmp	r3, #0
 80277f6:	dd40      	ble.n	802787a <MQTTSubscribeWithResults+0x118>
        goto exit;
    if ((rc = sendPacket(c, len, &timer)) != MQTT_SUCCESS) // send the subscribe packet
 80277f8:	f107 0330 	add.w	r3, r7, #48	@ 0x30
 80277fc:	461a      	mov	r2, r3
 80277fe:	6bb9      	ldr	r1, [r7, #56]	@ 0x38
 8027800:	68f8      	ldr	r0, [r7, #12]
 8027802:	f7ff fa8e 	bl	8026d22 <sendPacket>
 8027806:	63f8      	str	r0, [r7, #60]	@ 0x3c
 8027808:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 802780a:	2b00      	cmp	r3, #0
 802780c:	d137      	bne.n	802787e <MQTTSubscribeWithResults+0x11c>
        goto exit;             // there was a problem

    if (waitfor(c, SUBACK, &timer) == SUBACK)      // wait for suback
 802780e:	f107 0330 	add.w	r3, r7, #48	@ 0x30
 8027812:	461a      	mov	r2, r3
 8027814:	2109      	movs	r1, #9
 8027816:	68f8      	ldr	r0, [r7, #12]
 8027818:	f7ff fe67 	bl	80274ea <waitfor>
 802781c:	4603      	mov	r3, r0
 802781e:	2b09      	cmp	r3, #9
 8027820:	d125      	bne.n	802786e <MQTTSubscribeWithResults+0x10c>
    {
        int count = 0;
 8027822:	2300      	movs	r3, #0
 8027824:	61fb      	str	r3, [r7, #28]
        unsigned short mypacketid;
        data->grantedQoS = QOS0;
 8027826:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 8027828:	2200      	movs	r2, #0
 802782a:	701a      	strb	r2, [r3, #0]
        int _grantedQoS[1] = {(int)&data->grantedQoS};
 802782c:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 802782e:	617b      	str	r3, [r7, #20]
//        if (MQTTDeserialize_suback(&mypacketid, 1, &count, (int*)&data->grantedQoS, c->readbuf, c->readbuf_size) == 1)
        if (MQTTDeserialize_suback(&mypacketid, 1, &count, _grantedQoS, c->readbuf, c->readbuf_size) == 1)
 8027830:	68fb      	ldr	r3, [r7, #12]
 8027832:	695b      	ldr	r3, [r3, #20]
 8027834:	68fa      	ldr	r2, [r7, #12]
 8027836:	68d2      	ldr	r2, [r2, #12]
 8027838:	4614      	mov	r4, r2
 802783a:	f107 0114 	add.w	r1, r7, #20
 802783e:	f107 021c 	add.w	r2, r7, #28
 8027842:	f107 001a 	add.w	r0, r7, #26
 8027846:	9401      	str	r4, [sp, #4]
 8027848:	9300      	str	r3, [sp, #0]
 802784a:	460b      	mov	r3, r1
 802784c:	2101      	movs	r1, #1
 802784e:	f001 f866 	bl	802891e <MQTTDeserialize_suback>
 8027852:	4603      	mov	r3, r0
 8027854:	2b01      	cmp	r3, #1
 8027856:	d113      	bne.n	8027880 <MQTTSubscribeWithResults+0x11e>
        {
            if (data->grantedQoS != 0x80)
 8027858:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 802785a:	781b      	ldrb	r3, [r3, #0]
 802785c:	2b80      	cmp	r3, #128	@ 0x80
 802785e:	d00f      	beq.n	8027880 <MQTTSubscribeWithResults+0x11e>
                rc = MQTTSetMessageHandler(c, topicFilter, messageHandler);
 8027860:	683a      	ldr	r2, [r7, #0]
 8027862:	68b9      	ldr	r1, [r7, #8]
 8027864:	68f8      	ldr	r0, [r7, #12]
 8027866:	f7ff ff12 	bl	802768e <MQTTSetMessageHandler>
 802786a:	63f8      	str	r0, [r7, #60]	@ 0x3c
 802786c:	e008      	b.n	8027880 <MQTTSubscribeWithResults+0x11e>
        }
    }
    else
        rc = FAILURE;
 802786e:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8027872:	63fb      	str	r3, [r7, #60]	@ 0x3c
 8027874:	e004      	b.n	8027880 <MQTTSubscribeWithResults+0x11e>
		    goto exit;
 8027876:	bf00      	nop
 8027878:	e002      	b.n	8027880 <MQTTSubscribeWithResults+0x11e>
        goto exit;
 802787a:	bf00      	nop
 802787c:	e000      	b.n	8027880 <MQTTSubscribeWithResults+0x11e>
        goto exit;             // there was a problem
 802787e:	bf00      	nop

exit:
    if (rc == FAILURE)
 8027880:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 8027882:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8027886:	d102      	bne.n	802788e <MQTTSubscribeWithResults+0x12c>
        MQTTCloseSession(c);
 8027888:	68f8      	ldr	r0, [r7, #12]
 802788a:	f7ff fceb 	bl	8027264 <MQTTCloseSession>
#if defined(MQTT_TASK)
	  MutexUnlock(&c->mutex);
#endif
//	osMutexRelease(mqttMutex);
	osMutexRelease(c->mutex);
 802788e:	68fb      	ldr	r3, [r7, #12]
 8027890:	6e9b      	ldr	r3, [r3, #104]	@ 0x68
 8027892:	4618      	mov	r0, r3
 8027894:	f7e9 fc99 	bl	80111ca <osMutexRelease>
    return rc;
 8027898:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
}
 802789a:	4618      	mov	r0, r3
 802789c:	3740      	adds	r7, #64	@ 0x40
 802789e:	46bd      	mov	sp, r7
 80278a0:	bdb0      	pop	{r4, r5, r7, pc}

080278a2 <MQTTSubscribe>:


int MQTTSubscribe(MQTTClient* c, const char* topicFilter, enum QoS qos,
       messageHandler messageHandler)
{
 80278a2:	b580      	push	{r7, lr}
 80278a4:	b088      	sub	sp, #32
 80278a6:	af02      	add	r7, sp, #8
 80278a8:	60f8      	str	r0, [r7, #12]
 80278aa:	60b9      	str	r1, [r7, #8]
 80278ac:	603b      	str	r3, [r7, #0]
 80278ae:	4613      	mov	r3, r2
 80278b0:	71fb      	strb	r3, [r7, #7]
    MQTTSubackData data;
    return MQTTSubscribeWithResults(c, topicFilter, qos, messageHandler, &data);
 80278b2:	79fa      	ldrb	r2, [r7, #7]
 80278b4:	f107 0314 	add.w	r3, r7, #20
 80278b8:	9300      	str	r3, [sp, #0]
 80278ba:	683b      	ldr	r3, [r7, #0]
 80278bc:	68b9      	ldr	r1, [r7, #8]
 80278be:	68f8      	ldr	r0, [r7, #12]
 80278c0:	f7ff ff4f 	bl	8027762 <MQTTSubscribeWithResults>
 80278c4:	4603      	mov	r3, r0
}
 80278c6:	4618      	mov	r0, r3
 80278c8:	3718      	adds	r7, #24
 80278ca:	46bd      	mov	sp, r7
 80278cc:	bd80      	pop	{r7, pc}

080278ce <MQTTPublish>:
    return rc;
}


int MQTTPublish(MQTTClient* c, const char* topicName, MQTTMessage* message)
{
 80278ce:	b5f0      	push	{r4, r5, r6, r7, lr}
 80278d0:	b097      	sub	sp, #92	@ 0x5c
 80278d2:	af08      	add	r7, sp, #32
 80278d4:	60f8      	str	r0, [r7, #12]
 80278d6:	60b9      	str	r1, [r7, #8]
 80278d8:	607a      	str	r2, [r7, #4]
    int rc = FAILURE;
 80278da:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80278de:	637b      	str	r3, [r7, #52]	@ 0x34
    Timer timer;
    MQTTString topic = MQTTString_initializer;
 80278e0:	2300      	movs	r3, #0
 80278e2:	61fb      	str	r3, [r7, #28]
 80278e4:	2300      	movs	r3, #0
 80278e6:	623b      	str	r3, [r7, #32]
 80278e8:	2300      	movs	r3, #0
 80278ea:	627b      	str	r3, [r7, #36]	@ 0x24
    topic.cstring = (char *)topicName;
 80278ec:	68bb      	ldr	r3, [r7, #8]
 80278ee:	61fb      	str	r3, [r7, #28]
    int len = 0;
 80278f0:	2300      	movs	r3, #0
 80278f2:	633b      	str	r3, [r7, #48]	@ 0x30

#if defined(MQTT_TASK)
	  MutexLock(&c->mutex);
#endif
//	  osMutexAcquire(mqttMutex, osWaitForever);
	  osMutexAcquire(c->mutex, osWaitForever);
 80278f4:	68fb      	ldr	r3, [r7, #12]
 80278f6:	6e9b      	ldr	r3, [r3, #104]	@ 0x68
 80278f8:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 80278fc:	4618      	mov	r0, r3
 80278fe:	f7e9 fc19 	bl	8011134 <osMutexAcquire>
	  if (!c->isconnected)
 8027902:	68fb      	ldr	r3, [r7, #12]
 8027904:	6a1b      	ldr	r3, [r3, #32]
 8027906:	2b00      	cmp	r3, #0
 8027908:	f000 809b 	beq.w	8027a42 <MQTTPublish+0x174>
		    goto exit;

    TimerInit(&timer);
 802790c:	f107 0328 	add.w	r3, r7, #40	@ 0x28
 8027910:	4618      	mov	r0, r3
 8027912:	f000 f907 	bl	8027b24 <TimerInit>
    TimerCountdownMS(&timer, c->command_timeout_ms);
 8027916:	68fb      	ldr	r3, [r7, #12]
 8027918:	685a      	ldr	r2, [r3, #4]
 802791a:	f107 0328 	add.w	r3, r7, #40	@ 0x28
 802791e:	4611      	mov	r1, r2
 8027920:	4618      	mov	r0, r3
 8027922:	f000 f8bd 	bl	8027aa0 <TimerCountdownMS>

    if (message->qos == QOS1 || message->qos == QOS2)
 8027926:	687b      	ldr	r3, [r7, #4]
 8027928:	781b      	ldrb	r3, [r3, #0]
 802792a:	2b01      	cmp	r3, #1
 802792c:	d003      	beq.n	8027936 <MQTTPublish+0x68>
 802792e:	687b      	ldr	r3, [r7, #4]
 8027930:	781b      	ldrb	r3, [r3, #0]
 8027932:	2b02      	cmp	r3, #2
 8027934:	d106      	bne.n	8027944 <MQTTPublish+0x76>
        message->id = getNextPacketId(c);
 8027936:	68f8      	ldr	r0, [r7, #12]
 8027938:	f7ff f9da 	bl	8026cf0 <getNextPacketId>
 802793c:	4603      	mov	r3, r0
 802793e:	b29a      	uxth	r2, r3
 8027940:	687b      	ldr	r3, [r7, #4]
 8027942:	809a      	strh	r2, [r3, #4]

    len = MQTTSerialize_publish(c->buf, c->buf_size, 0, message->qos, message->retained, message->id,
 8027944:	68fb      	ldr	r3, [r7, #12]
 8027946:	691b      	ldr	r3, [r3, #16]
 8027948:	603b      	str	r3, [r7, #0]
 802794a:	68fb      	ldr	r3, [r7, #12]
 802794c:	689b      	ldr	r3, [r3, #8]
 802794e:	469c      	mov	ip, r3
 8027950:	687b      	ldr	r3, [r7, #4]
 8027952:	781b      	ldrb	r3, [r3, #0]
 8027954:	469e      	mov	lr, r3
 8027956:	687b      	ldr	r3, [r7, #4]
 8027958:	785d      	ldrb	r5, [r3, #1]
 802795a:	687b      	ldr	r3, [r7, #4]
 802795c:	889e      	ldrh	r6, [r3, #4]
              topic, (unsigned char*)message->payload, message->payloadlen);
 802795e:	687b      	ldr	r3, [r7, #4]
 8027960:	689b      	ldr	r3, [r3, #8]
 8027962:	687a      	ldr	r2, [r7, #4]
 8027964:	68d2      	ldr	r2, [r2, #12]
    len = MQTTSerialize_publish(c->buf, c->buf_size, 0, message->qos, message->retained, message->id,
 8027966:	9206      	str	r2, [sp, #24]
 8027968:	9305      	str	r3, [sp, #20]
 802796a:	ac02      	add	r4, sp, #8
 802796c:	f107 031c 	add.w	r3, r7, #28
 8027970:	e893 0007 	ldmia.w	r3, {r0, r1, r2}
 8027974:	e884 0007 	stmia.w	r4, {r0, r1, r2}
 8027978:	9601      	str	r6, [sp, #4]
 802797a:	9500      	str	r5, [sp, #0]
 802797c:	4673      	mov	r3, lr
 802797e:	2200      	movs	r2, #0
 8027980:	4661      	mov	r1, ip
 8027982:	6838      	ldr	r0, [r7, #0]
 8027984:	f000 fe5d 	bl	8028642 <MQTTSerialize_publish>
 8027988:	6338      	str	r0, [r7, #48]	@ 0x30
    if (len <= 0)
 802798a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 802798c:	2b00      	cmp	r3, #0
 802798e:	dd5a      	ble.n	8027a46 <MQTTPublish+0x178>
        goto exit;
    if ((rc = sendPacket(c, len, &timer)) != MQTT_SUCCESS) // send the subscribe packet
 8027990:	f107 0328 	add.w	r3, r7, #40	@ 0x28
 8027994:	461a      	mov	r2, r3
 8027996:	6b39      	ldr	r1, [r7, #48]	@ 0x30
 8027998:	68f8      	ldr	r0, [r7, #12]
 802799a:	f7ff f9c2 	bl	8026d22 <sendPacket>
 802799e:	6378      	str	r0, [r7, #52]	@ 0x34
 80279a0:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 80279a2:	2b00      	cmp	r3, #0
 80279a4:	d151      	bne.n	8027a4a <MQTTPublish+0x17c>
        goto exit; // there was a problem

    if (message->qos == QOS1)
 80279a6:	687b      	ldr	r3, [r7, #4]
 80279a8:	781b      	ldrb	r3, [r3, #0]
 80279aa:	2b01      	cmp	r3, #1
 80279ac:	d122      	bne.n	80279f4 <MQTTPublish+0x126>
    {
        if (waitfor(c, PUBACK, &timer) == PUBACK)
 80279ae:	f107 0328 	add.w	r3, r7, #40	@ 0x28
 80279b2:	461a      	mov	r2, r3
 80279b4:	2104      	movs	r1, #4
 80279b6:	68f8      	ldr	r0, [r7, #12]
 80279b8:	f7ff fd97 	bl	80274ea <waitfor>
 80279bc:	4603      	mov	r3, r0
 80279be:	2b04      	cmp	r3, #4
 80279c0:	d114      	bne.n	80279ec <MQTTPublish+0x11e>
        {
            unsigned short mypacketid;
            unsigned char dup, type;
            if (MQTTDeserialize_ack(&type, &dup, &mypacketid, c->readbuf, c->readbuf_size) != 1)
 80279c2:	68fb      	ldr	r3, [r7, #12]
 80279c4:	695c      	ldr	r4, [r3, #20]
 80279c6:	68fb      	ldr	r3, [r7, #12]
 80279c8:	68db      	ldr	r3, [r3, #12]
 80279ca:	f107 021a 	add.w	r2, r7, #26
 80279ce:	f107 0119 	add.w	r1, r7, #25
 80279d2:	f107 0018 	add.w	r0, r7, #24
 80279d6:	9300      	str	r3, [sp, #0]
 80279d8:	4623      	mov	r3, r4
 80279da:	f000 fbc1 	bl	8028160 <MQTTDeserialize_ack>
 80279de:	4603      	mov	r3, r0
 80279e0:	2b01      	cmp	r3, #1
 80279e2:	d035      	beq.n	8027a50 <MQTTPublish+0x182>
                rc = FAILURE;
 80279e4:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80279e8:	637b      	str	r3, [r7, #52]	@ 0x34
 80279ea:	e031      	b.n	8027a50 <MQTTPublish+0x182>
        }
        else
            rc = FAILURE;
 80279ec:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80279f0:	637b      	str	r3, [r7, #52]	@ 0x34
 80279f2:	e02d      	b.n	8027a50 <MQTTPublish+0x182>
    }
    else if (message->qos == QOS2)
 80279f4:	687b      	ldr	r3, [r7, #4]
 80279f6:	781b      	ldrb	r3, [r3, #0]
 80279f8:	2b02      	cmp	r3, #2
 80279fa:	d128      	bne.n	8027a4e <MQTTPublish+0x180>
    {
        if (waitfor(c, PUBCOMP, &timer) == PUBCOMP)
 80279fc:	f107 0328 	add.w	r3, r7, #40	@ 0x28
 8027a00:	461a      	mov	r2, r3
 8027a02:	2107      	movs	r1, #7
 8027a04:	68f8      	ldr	r0, [r7, #12]
 8027a06:	f7ff fd70 	bl	80274ea <waitfor>
 8027a0a:	4603      	mov	r3, r0
 8027a0c:	2b07      	cmp	r3, #7
 8027a0e:	d114      	bne.n	8027a3a <MQTTPublish+0x16c>
        {
            unsigned short mypacketid;
            unsigned char dup, type;
            if (MQTTDeserialize_ack(&type, &dup, &mypacketid, c->readbuf, c->readbuf_size) != 1)
 8027a10:	68fb      	ldr	r3, [r7, #12]
 8027a12:	695c      	ldr	r4, [r3, #20]
 8027a14:	68fb      	ldr	r3, [r7, #12]
 8027a16:	68db      	ldr	r3, [r3, #12]
 8027a18:	f107 0216 	add.w	r2, r7, #22
 8027a1c:	f107 0115 	add.w	r1, r7, #21
 8027a20:	f107 0014 	add.w	r0, r7, #20
 8027a24:	9300      	str	r3, [sp, #0]
 8027a26:	4623      	mov	r3, r4
 8027a28:	f000 fb9a 	bl	8028160 <MQTTDeserialize_ack>
 8027a2c:	4603      	mov	r3, r0
 8027a2e:	2b01      	cmp	r3, #1
 8027a30:	d00e      	beq.n	8027a50 <MQTTPublish+0x182>
                rc = FAILURE;
 8027a32:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8027a36:	637b      	str	r3, [r7, #52]	@ 0x34
 8027a38:	e00a      	b.n	8027a50 <MQTTPublish+0x182>
        }
        else
            rc = FAILURE;
 8027a3a:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8027a3e:	637b      	str	r3, [r7, #52]	@ 0x34
 8027a40:	e006      	b.n	8027a50 <MQTTPublish+0x182>
		    goto exit;
 8027a42:	bf00      	nop
 8027a44:	e004      	b.n	8027a50 <MQTTPublish+0x182>
        goto exit;
 8027a46:	bf00      	nop
 8027a48:	e002      	b.n	8027a50 <MQTTPublish+0x182>
        goto exit; // there was a problem
 8027a4a:	bf00      	nop
 8027a4c:	e000      	b.n	8027a50 <MQTTPublish+0x182>
    }

exit:
 8027a4e:	bf00      	nop
    if (rc == FAILURE)
 8027a50:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8027a52:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8027a56:	d102      	bne.n	8027a5e <MQTTPublish+0x190>
        MQTTCloseSession(c);
 8027a58:	68f8      	ldr	r0, [r7, #12]
 8027a5a:	f7ff fc03 	bl	8027264 <MQTTCloseSession>
#if defined(MQTT_TASK)
	  MutexUnlock(&c->mutex);
#endif
//	  osMutexRelease(mqttMutex);
	  osMutexRelease(c->mutex);
 8027a5e:	68fb      	ldr	r3, [r7, #12]
 8027a60:	6e9b      	ldr	r3, [r3, #104]	@ 0x68
 8027a62:	4618      	mov	r0, r3
 8027a64:	f7e9 fbb1 	bl	80111ca <osMutexRelease>
    return rc;
 8027a68:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
}
 8027a6a:	4618      	mov	r0, r3
 8027a6c:	373c      	adds	r7, #60	@ 0x3c
 8027a6e:	46bd      	mov	sp, r7
 8027a70:	bdf0      	pop	{r4, r5, r6, r7, pc}
	...

08027a74 <TimerIsExpired>:
#define SERVER_IP4	34

uint32_t MilliTimer;

//Timer functions
char TimerIsExpired(Timer *timer) {
 8027a74:	b480      	push	{r7}
 8027a76:	b085      	sub	sp, #20
 8027a78:	af00      	add	r7, sp, #0
 8027a7a:	6078      	str	r0, [r7, #4]
	long left = timer->end_time - MilliTimer;
 8027a7c:	687b      	ldr	r3, [r7, #4]
 8027a7e:	685a      	ldr	r2, [r3, #4]
 8027a80:	4b06      	ldr	r3, [pc, #24]	@ (8027a9c <TimerIsExpired+0x28>)
 8027a82:	681b      	ldr	r3, [r3, #0]
 8027a84:	1ad3      	subs	r3, r2, r3
 8027a86:	60fb      	str	r3, [r7, #12]
	return (left < 0);
 8027a88:	68fb      	ldr	r3, [r7, #12]
 8027a8a:	0fdb      	lsrs	r3, r3, #31
 8027a8c:	b2db      	uxtb	r3, r3
}
 8027a8e:	4618      	mov	r0, r3
 8027a90:	3714      	adds	r7, #20
 8027a92:	46bd      	mov	sp, r7
 8027a94:	f85d 7b04 	ldr.w	r7, [sp], #4
 8027a98:	4770      	bx	lr
 8027a9a:	bf00      	nop
 8027a9c:	2402b104 	.word	0x2402b104

08027aa0 <TimerCountdownMS>:

void TimerCountdownMS(Timer *timer, unsigned int timeout) {
 8027aa0:	b480      	push	{r7}
 8027aa2:	b083      	sub	sp, #12
 8027aa4:	af00      	add	r7, sp, #0
 8027aa6:	6078      	str	r0, [r7, #4]
 8027aa8:	6039      	str	r1, [r7, #0]
	timer->end_time = MilliTimer + timeout;
 8027aaa:	4b06      	ldr	r3, [pc, #24]	@ (8027ac4 <TimerCountdownMS+0x24>)
 8027aac:	681a      	ldr	r2, [r3, #0]
 8027aae:	683b      	ldr	r3, [r7, #0]
 8027ab0:	441a      	add	r2, r3
 8027ab2:	687b      	ldr	r3, [r7, #4]
 8027ab4:	605a      	str	r2, [r3, #4]
}
 8027ab6:	bf00      	nop
 8027ab8:	370c      	adds	r7, #12
 8027aba:	46bd      	mov	sp, r7
 8027abc:	f85d 7b04 	ldr.w	r7, [sp], #4
 8027ac0:	4770      	bx	lr
 8027ac2:	bf00      	nop
 8027ac4:	2402b104 	.word	0x2402b104

08027ac8 <TimerCountdown>:

void TimerCountdown(Timer *timer, unsigned int timeout) {
 8027ac8:	b480      	push	{r7}
 8027aca:	b083      	sub	sp, #12
 8027acc:	af00      	add	r7, sp, #0
 8027ace:	6078      	str	r0, [r7, #4]
 8027ad0:	6039      	str	r1, [r7, #0]
	timer->end_time = MilliTimer + (timeout * 1000);
 8027ad2:	683b      	ldr	r3, [r7, #0]
 8027ad4:	f44f 727a 	mov.w	r2, #1000	@ 0x3e8
 8027ad8:	fb03 f202 	mul.w	r2, r3, r2
 8027adc:	4b05      	ldr	r3, [pc, #20]	@ (8027af4 <TimerCountdown+0x2c>)
 8027ade:	681b      	ldr	r3, [r3, #0]
 8027ae0:	441a      	add	r2, r3
 8027ae2:	687b      	ldr	r3, [r7, #4]
 8027ae4:	605a      	str	r2, [r3, #4]
}
 8027ae6:	bf00      	nop
 8027ae8:	370c      	adds	r7, #12
 8027aea:	46bd      	mov	sp, r7
 8027aec:	f85d 7b04 	ldr.w	r7, [sp], #4
 8027af0:	4770      	bx	lr
 8027af2:	bf00      	nop
 8027af4:	2402b104 	.word	0x2402b104

08027af8 <TimerLeftMS>:

int TimerLeftMS(Timer *timer) {
 8027af8:	b480      	push	{r7}
 8027afa:	b085      	sub	sp, #20
 8027afc:	af00      	add	r7, sp, #0
 8027afe:	6078      	str	r0, [r7, #4]
	long left = timer->end_time - MilliTimer;
 8027b00:	687b      	ldr	r3, [r7, #4]
 8027b02:	685a      	ldr	r2, [r3, #4]
 8027b04:	4b06      	ldr	r3, [pc, #24]	@ (8027b20 <TimerLeftMS+0x28>)
 8027b06:	681b      	ldr	r3, [r3, #0]
 8027b08:	1ad3      	subs	r3, r2, r3
 8027b0a:	60fb      	str	r3, [r7, #12]
	return (left < 0) ? 0 : left;
 8027b0c:	68fb      	ldr	r3, [r7, #12]
 8027b0e:	ea23 73e3 	bic.w	r3, r3, r3, asr #31
}
 8027b12:	4618      	mov	r0, r3
 8027b14:	3714      	adds	r7, #20
 8027b16:	46bd      	mov	sp, r7
 8027b18:	f85d 7b04 	ldr.w	r7, [sp], #4
 8027b1c:	4770      	bx	lr
 8027b1e:	bf00      	nop
 8027b20:	2402b104 	.word	0x2402b104

08027b24 <TimerInit>:

void TimerInit(Timer *timer) {
 8027b24:	b480      	push	{r7}
 8027b26:	b083      	sub	sp, #12
 8027b28:	af00      	add	r7, sp, #0
 8027b2a:	6078      	str	r0, [r7, #4]
	timer->end_time = 0;
 8027b2c:	687b      	ldr	r3, [r7, #4]
 8027b2e:	2200      	movs	r2, #0
 8027b30:	605a      	str	r2, [r3, #4]
}
 8027b32:	bf00      	nop
 8027b34:	370c      	adds	r7, #12
 8027b36:	46bd      	mov	sp, r7
 8027b38:	f85d 7b04 	ldr.w	r7, [sp], #4
 8027b3c:	4770      	bx	lr
	...

08027b40 <NewNetwork>:

#ifdef MQTT_LWIP_SOCKET
void NewNetwork(Network *n) {
 8027b40:	b480      	push	{r7}
 8027b42:	b083      	sub	sp, #12
 8027b44:	af00      	add	r7, sp, #0
 8027b46:	6078      	str	r0, [r7, #4]
	n->socket = 0; //clear
 8027b48:	687b      	ldr	r3, [r7, #4]
 8027b4a:	2200      	movs	r2, #0
 8027b4c:	601a      	str	r2, [r3, #0]
	n->mqttread = net_read; //receive function
 8027b4e:	687b      	ldr	r3, [r7, #4]
 8027b50:	4a06      	ldr	r2, [pc, #24]	@ (8027b6c <NewNetwork+0x2c>)
 8027b52:	605a      	str	r2, [r3, #4]
	n->mqttwrite = net_write; //send function
 8027b54:	687b      	ldr	r3, [r7, #4]
 8027b56:	4a06      	ldr	r2, [pc, #24]	@ (8027b70 <NewNetwork+0x30>)
 8027b58:	609a      	str	r2, [r3, #8]
	n->disconnect = net_disconnect; //disconnection function
 8027b5a:	687b      	ldr	r3, [r7, #4]
 8027b5c:	4a05      	ldr	r2, [pc, #20]	@ (8027b74 <NewNetwork+0x34>)
 8027b5e:	60da      	str	r2, [r3, #12]
}
 8027b60:	bf00      	nop
 8027b62:	370c      	adds	r7, #12
 8027b64:	46bd      	mov	sp, r7
 8027b66:	f85d 7b04 	ldr.w	r7, [sp], #4
 8027b6a:	4770      	bx	lr
 8027b6c:	08027c15 	.word	0x08027c15
 8027b70:	08027c65 	.word	0x08027c65
 8027b74:	08027c8b 	.word	0x08027c8b

08027b78 <ConnectNetwork>:

int ConnectNetwork(Network *n, char *ip, int port) {
 8027b78:	b580      	push	{r7, lr}
 8027b7a:	b088      	sub	sp, #32
 8027b7c:	af00      	add	r7, sp, #0
 8027b7e:	60f8      	str	r0, [r7, #12]
 8027b80:	60b9      	str	r1, [r7, #8]
 8027b82:	607a      	str	r2, [r7, #4]
	struct sockaddr_in server_addr;

	if(n->socket)
 8027b84:	68fb      	ldr	r3, [r7, #12]
 8027b86:	681b      	ldr	r3, [r3, #0]
 8027b88:	2b00      	cmp	r3, #0
 8027b8a:	d004      	beq.n	8027b96 <ConnectNetwork+0x1e>
	{
		close(n->socket);
 8027b8c:	68fb      	ldr	r3, [r7, #12]
 8027b8e:	681b      	ldr	r3, [r3, #0]
 8027b90:	4618      	mov	r0, r3
 8027b92:	f7f0 fa65 	bl	8018060 <lwip_close>
	}

	n->socket = socket(PF_INET, SOCK_STREAM, 0); //create socket
 8027b96:	2200      	movs	r2, #0
 8027b98:	2101      	movs	r1, #1
 8027b9a:	2002      	movs	r0, #2
 8027b9c:	f7f0 ff72 	bl	8018a84 <lwip_socket>
 8027ba0:	4602      	mov	r2, r0
 8027ba2:	68fb      	ldr	r3, [r7, #12]
 8027ba4:	601a      	str	r2, [r3, #0]
	if(n->socket < 0)
 8027ba6:	68fb      	ldr	r3, [r7, #12]
 8027ba8:	681b      	ldr	r3, [r3, #0]
 8027baa:	2b00      	cmp	r3, #0
 8027bac:	da05      	bge.n	8027bba <ConnectNetwork+0x42>
	{
		n->socket = 0;
 8027bae:	68fb      	ldr	r3, [r7, #12]
 8027bb0:	2200      	movs	r2, #0
 8027bb2:	601a      	str	r2, [r3, #0]
		return -1;
 8027bb4:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8027bb8:	e028      	b.n	8027c0c <ConnectNetwork+0x94>
	}

	memset(&server_addr, 0, sizeof(struct sockaddr_in)); //broker address info
 8027bba:	f107 0310 	add.w	r3, r7, #16
 8027bbe:	2210      	movs	r2, #16
 8027bc0:	2100      	movs	r1, #0
 8027bc2:	4618      	mov	r0, r3
 8027bc4:	f002 fc8c 	bl	802a4e0 <memset>
	server_addr.sin_family = AF_INET;
 8027bc8:	2302      	movs	r3, #2
 8027bca:	747b      	strb	r3, [r7, #17]
	server_addr.sin_addr.s_addr = inet_addr(ip);
 8027bcc:	68b8      	ldr	r0, [r7, #8]
 8027bce:	f7fd fde0 	bl	8025792 <ipaddr_addr>
 8027bd2:	4603      	mov	r3, r0
 8027bd4:	617b      	str	r3, [r7, #20]
	server_addr.sin_port = htons(port);
 8027bd6:	687b      	ldr	r3, [r7, #4]
 8027bd8:	b29b      	uxth	r3, r3
 8027bda:	4618      	mov	r0, r3
 8027bdc:	f7f1 fb94 	bl	8019308 <lwip_htons>
 8027be0:	4603      	mov	r3, r0
 8027be2:	827b      	strh	r3, [r7, #18]

	if(connect(n->socket, (struct sockaddr*)&server_addr, sizeof(struct sockaddr_in)) < 0) //connect to the broker
 8027be4:	68fb      	ldr	r3, [r7, #12]
 8027be6:	681b      	ldr	r3, [r3, #0]
 8027be8:	f107 0110 	add.w	r1, r7, #16
 8027bec:	2210      	movs	r2, #16
 8027bee:	4618      	mov	r0, r3
 8027bf0:	f7f0 fa8c 	bl	801810c <lwip_connect>
 8027bf4:	4603      	mov	r3, r0
 8027bf6:	2b00      	cmp	r3, #0
 8027bf8:	da07      	bge.n	8027c0a <ConnectNetwork+0x92>
	{
		close(n->socket);
 8027bfa:	68fb      	ldr	r3, [r7, #12]
 8027bfc:	681b      	ldr	r3, [r3, #0]
 8027bfe:	4618      	mov	r0, r3
 8027c00:	f7f0 fa2e 	bl	8018060 <lwip_close>
		return -1;
 8027c04:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8027c08:	e000      	b.n	8027c0c <ConnectNetwork+0x94>
	}
	return 0;
 8027c0a:	2300      	movs	r3, #0
}
 8027c0c:	4618      	mov	r0, r3
 8027c0e:	3720      	adds	r7, #32
 8027c10:	46bd      	mov	sp, r7
 8027c12:	bd80      	pop	{r7, pc}

08027c14 <net_read>:

int net_read(Network *n, unsigned char *buffer, int len, int timeout_ms) {
 8027c14:	b580      	push	{r7, lr}
 8027c16:	b086      	sub	sp, #24
 8027c18:	af00      	add	r7, sp, #0
 8027c1a:	60f8      	str	r0, [r7, #12]
 8027c1c:	60b9      	str	r1, [r7, #8]
 8027c1e:	607a      	str	r2, [r7, #4]
 8027c20:	603b      	str	r3, [r7, #0]
	int available;

	/* !!! LWIP_SO_RCVBUF must be enabled !!! */
	if(ioctl(n->socket, FIONREAD, &available) < 0) return -1; //check receive buffer
 8027c22:	68fb      	ldr	r3, [r7, #12]
 8027c24:	681b      	ldr	r3, [r3, #0]
 8027c26:	f107 0214 	add.w	r2, r7, #20
 8027c2a:	490d      	ldr	r1, [pc, #52]	@ (8027c60 <net_read+0x4c>)
 8027c2c:	4618      	mov	r0, r3
 8027c2e:	f7f1 f917 	bl	8018e60 <lwip_ioctl>
 8027c32:	4603      	mov	r3, r0
 8027c34:	2b00      	cmp	r3, #0
 8027c36:	da02      	bge.n	8027c3e <net_read+0x2a>
 8027c38:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8027c3c:	e00c      	b.n	8027c58 <net_read+0x44>

	if(available > 0)
 8027c3e:	697b      	ldr	r3, [r7, #20]
 8027c40:	2b00      	cmp	r3, #0
 8027c42:	dd08      	ble.n	8027c56 <net_read+0x42>
	{
		return recv(n->socket, buffer, len, 0);
 8027c44:	68fb      	ldr	r3, [r7, #12]
 8027c46:	6818      	ldr	r0, [r3, #0]
 8027c48:	687a      	ldr	r2, [r7, #4]
 8027c4a:	2300      	movs	r3, #0
 8027c4c:	68b9      	ldr	r1, [r7, #8]
 8027c4e:	f7f0 fdf3 	bl	8018838 <lwip_recv>
 8027c52:	4603      	mov	r3, r0
 8027c54:	e000      	b.n	8027c58 <net_read+0x44>
	}

	return 0;
 8027c56:	2300      	movs	r3, #0
}
 8027c58:	4618      	mov	r0, r3
 8027c5a:	3718      	adds	r7, #24
 8027c5c:	46bd      	mov	sp, r7
 8027c5e:	bd80      	pop	{r7, pc}
 8027c60:	4004667f 	.word	0x4004667f

08027c64 <net_write>:

int net_write(Network *n, unsigned char *buffer, int len, int timeout_ms) {
 8027c64:	b580      	push	{r7, lr}
 8027c66:	b084      	sub	sp, #16
 8027c68:	af00      	add	r7, sp, #0
 8027c6a:	60f8      	str	r0, [r7, #12]
 8027c6c:	60b9      	str	r1, [r7, #8]
 8027c6e:	607a      	str	r2, [r7, #4]
 8027c70:	603b      	str	r3, [r7, #0]
	return send(n->socket, buffer, len, 0);
 8027c72:	68fb      	ldr	r3, [r7, #12]
 8027c74:	6818      	ldr	r0, [r3, #0]
 8027c76:	687a      	ldr	r2, [r7, #4]
 8027c78:	2300      	movs	r3, #0
 8027c7a:	68b9      	ldr	r1, [r7, #8]
 8027c7c:	f7f0 fdf2 	bl	8018864 <lwip_send>
 8027c80:	4603      	mov	r3, r0
}
 8027c82:	4618      	mov	r0, r3
 8027c84:	3710      	adds	r7, #16
 8027c86:	46bd      	mov	sp, r7
 8027c88:	bd80      	pop	{r7, pc}

08027c8a <net_disconnect>:

void net_disconnect(Network *n) {
 8027c8a:	b580      	push	{r7, lr}
 8027c8c:	b082      	sub	sp, #8
 8027c8e:	af00      	add	r7, sp, #0
 8027c90:	6078      	str	r0, [r7, #4]
	close(n->socket);
 8027c92:	687b      	ldr	r3, [r7, #4]
 8027c94:	681b      	ldr	r3, [r3, #0]
 8027c96:	4618      	mov	r0, r3
 8027c98:	f7f0 f9e2 	bl	8018060 <lwip_close>
	n->socket = 0;
 8027c9c:	687b      	ldr	r3, [r7, #4]
 8027c9e:	2200      	movs	r2, #0
 8027ca0:	601a      	str	r2, [r3, #0]
}
 8027ca2:	bf00      	nop
 8027ca4:	3708      	adds	r7, #8
 8027ca6:	46bd      	mov	sp, r7
 8027ca8:	bd80      	pop	{r7, pc}

08027caa <MQTTSerialize_connectLength>:
  * Determines the length of the MQTT connect packet that would be produced using the supplied connect options.
  * @param options the options to be used to build the connect packet
  * @return the length of buffer needed to contain the serialized version of the packet
  */
int MQTTSerialize_connectLength(MQTTPacket_connectData* options)
{
 8027caa:	b590      	push	{r4, r7, lr}
 8027cac:	b085      	sub	sp, #20
 8027cae:	af00      	add	r7, sp, #0
 8027cb0:	6078      	str	r0, [r7, #4]
	int len = 0;
 8027cb2:	2300      	movs	r3, #0
 8027cb4:	60fb      	str	r3, [r7, #12]

	FUNC_ENTRY;

	if (options->MQTTVersion == 3)
 8027cb6:	687b      	ldr	r3, [r7, #4]
 8027cb8:	7a1b      	ldrb	r3, [r3, #8]
 8027cba:	2b03      	cmp	r3, #3
 8027cbc:	d102      	bne.n	8027cc4 <MQTTSerialize_connectLength+0x1a>
		len = 12; /* variable depending on MQTT or MQIsdp */
 8027cbe:	230c      	movs	r3, #12
 8027cc0:	60fb      	str	r3, [r7, #12]
 8027cc2:	e005      	b.n	8027cd0 <MQTTSerialize_connectLength+0x26>
	else if (options->MQTTVersion == 4)
 8027cc4:	687b      	ldr	r3, [r7, #4]
 8027cc6:	7a1b      	ldrb	r3, [r3, #8]
 8027cc8:	2b04      	cmp	r3, #4
 8027cca:	d101      	bne.n	8027cd0 <MQTTSerialize_connectLength+0x26>
		len = 10;
 8027ccc:	230a      	movs	r3, #10
 8027cce:	60fb      	str	r3, [r7, #12]

	len += MQTTstrlen(options->clientID)+2;
 8027cd0:	687b      	ldr	r3, [r7, #4]
 8027cd2:	330c      	adds	r3, #12
 8027cd4:	e893 0007 	ldmia.w	r3, {r0, r1, r2}
 8027cd8:	f000 fc43 	bl	8028562 <MQTTstrlen>
 8027cdc:	4603      	mov	r3, r0
 8027cde:	3302      	adds	r3, #2
 8027ce0:	68fa      	ldr	r2, [r7, #12]
 8027ce2:	4413      	add	r3, r2
 8027ce4:	60fb      	str	r3, [r7, #12]
	if (options->willFlag)
 8027ce6:	687b      	ldr	r3, [r7, #4]
 8027ce8:	7edb      	ldrb	r3, [r3, #27]
 8027cea:	2b00      	cmp	r3, #0
 8027cec:	d013      	beq.n	8027d16 <MQTTSerialize_connectLength+0x6c>
		len += MQTTstrlen(options->will.topicName)+2 + MQTTstrlen(options->will.message)+2;
 8027cee:	687b      	ldr	r3, [r7, #4]
 8027cf0:	3324      	adds	r3, #36	@ 0x24
 8027cf2:	e893 0007 	ldmia.w	r3, {r0, r1, r2}
 8027cf6:	f000 fc34 	bl	8028562 <MQTTstrlen>
 8027cfa:	4603      	mov	r3, r0
 8027cfc:	1c9c      	adds	r4, r3, #2
 8027cfe:	687b      	ldr	r3, [r7, #4]
 8027d00:	3330      	adds	r3, #48	@ 0x30
 8027d02:	e893 0007 	ldmia.w	r3, {r0, r1, r2}
 8027d06:	f000 fc2c 	bl	8028562 <MQTTstrlen>
 8027d0a:	4603      	mov	r3, r0
 8027d0c:	4423      	add	r3, r4
 8027d0e:	3302      	adds	r3, #2
 8027d10:	68fa      	ldr	r2, [r7, #12]
 8027d12:	4413      	add	r3, r2
 8027d14:	60fb      	str	r3, [r7, #12]
	if (options->username.cstring || options->username.lenstring.data)
 8027d16:	687b      	ldr	r3, [r7, #4]
 8027d18:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8027d1a:	2b00      	cmp	r3, #0
 8027d1c:	d103      	bne.n	8027d26 <MQTTSerialize_connectLength+0x7c>
 8027d1e:	687b      	ldr	r3, [r7, #4]
 8027d20:	6c9b      	ldr	r3, [r3, #72]	@ 0x48
 8027d22:	2b00      	cmp	r3, #0
 8027d24:	d00a      	beq.n	8027d3c <MQTTSerialize_connectLength+0x92>
		len += MQTTstrlen(options->username)+2;
 8027d26:	687b      	ldr	r3, [r7, #4]
 8027d28:	3340      	adds	r3, #64	@ 0x40
 8027d2a:	e893 0007 	ldmia.w	r3, {r0, r1, r2}
 8027d2e:	f000 fc18 	bl	8028562 <MQTTstrlen>
 8027d32:	4603      	mov	r3, r0
 8027d34:	3302      	adds	r3, #2
 8027d36:	68fa      	ldr	r2, [r7, #12]
 8027d38:	4413      	add	r3, r2
 8027d3a:	60fb      	str	r3, [r7, #12]
	if (options->password.cstring || options->password.lenstring.data)
 8027d3c:	687b      	ldr	r3, [r7, #4]
 8027d3e:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 8027d40:	2b00      	cmp	r3, #0
 8027d42:	d103      	bne.n	8027d4c <MQTTSerialize_connectLength+0xa2>
 8027d44:	687b      	ldr	r3, [r7, #4]
 8027d46:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 8027d48:	2b00      	cmp	r3, #0
 8027d4a:	d00a      	beq.n	8027d62 <MQTTSerialize_connectLength+0xb8>
		len += MQTTstrlen(options->password)+2;
 8027d4c:	687b      	ldr	r3, [r7, #4]
 8027d4e:	334c      	adds	r3, #76	@ 0x4c
 8027d50:	e893 0007 	ldmia.w	r3, {r0, r1, r2}
 8027d54:	f000 fc05 	bl	8028562 <MQTTstrlen>
 8027d58:	4603      	mov	r3, r0
 8027d5a:	3302      	adds	r3, #2
 8027d5c:	68fa      	ldr	r2, [r7, #12]
 8027d5e:	4413      	add	r3, r2
 8027d60:	60fb      	str	r3, [r7, #12]

	FUNC_EXIT_RC(len);
	return len;
 8027d62:	68fb      	ldr	r3, [r7, #12]
}
 8027d64:	4618      	mov	r0, r3
 8027d66:	3714      	adds	r7, #20
 8027d68:	46bd      	mov	sp, r7
 8027d6a:	bd90      	pop	{r4, r7, pc}

08027d6c <MQTTSerialize_connect>:
  * @param len the length in bytes of the supplied buffer
  * @param options the options to be used to build the connect packet
  * @return serialized length, or error if 0
  */
int MQTTSerialize_connect(unsigned char* buf, int buflen, MQTTPacket_connectData* options)
{
 8027d6c:	b580      	push	{r7, lr}
 8027d6e:	b08a      	sub	sp, #40	@ 0x28
 8027d70:	af00      	add	r7, sp, #0
 8027d72:	60f8      	str	r0, [r7, #12]
 8027d74:	60b9      	str	r1, [r7, #8]
 8027d76:	607a      	str	r2, [r7, #4]
	unsigned char *ptr = buf;
 8027d78:	68fb      	ldr	r3, [r7, #12]
 8027d7a:	61fb      	str	r3, [r7, #28]
	MQTTHeader header = {0};
 8027d7c:	2300      	movs	r3, #0
 8027d7e:	61bb      	str	r3, [r7, #24]
	MQTTConnectFlags flags = {0};
 8027d80:	2300      	movs	r3, #0
 8027d82:	617b      	str	r3, [r7, #20]
	int len = 0;
 8027d84:	2300      	movs	r3, #0
 8027d86:	623b      	str	r3, [r7, #32]
	int rc = -1;
 8027d88:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8027d8c:	627b      	str	r3, [r7, #36]	@ 0x24

	FUNC_ENTRY;
	if (MQTTPacket_len(len = MQTTSerialize_connectLength(options)) > buflen)
 8027d8e:	6878      	ldr	r0, [r7, #4]
 8027d90:	f7ff ff8b 	bl	8027caa <MQTTSerialize_connectLength>
 8027d94:	6238      	str	r0, [r7, #32]
 8027d96:	6a38      	ldr	r0, [r7, #32]
 8027d98:	f000 fa98 	bl	80282cc <MQTTPacket_len>
 8027d9c:	4602      	mov	r2, r0
 8027d9e:	68bb      	ldr	r3, [r7, #8]
 8027da0:	4293      	cmp	r3, r2
 8027da2:	da03      	bge.n	8027dac <MQTTSerialize_connect+0x40>
	{
		rc = MQTTPACKET_BUFFER_TOO_SHORT;
 8027da4:	f06f 0301 	mvn.w	r3, #1
 8027da8:	627b      	str	r3, [r7, #36]	@ 0x24
		goto exit;
 8027daa:	e0c2      	b.n	8027f32 <MQTTSerialize_connect+0x1c6>
	}

	header.byte = 0;
 8027dac:	2300      	movs	r3, #0
 8027dae:	763b      	strb	r3, [r7, #24]
	header.bits.type = CONNECT;
 8027db0:	7e3b      	ldrb	r3, [r7, #24]
 8027db2:	2201      	movs	r2, #1
 8027db4:	f362 1307 	bfi	r3, r2, #4, #4
 8027db8:	763b      	strb	r3, [r7, #24]
	writeChar(&ptr, header.byte); /* write header */
 8027dba:	7e3a      	ldrb	r2, [r7, #24]
 8027dbc:	f107 031c 	add.w	r3, r7, #28
 8027dc0:	4611      	mov	r1, r2
 8027dc2:	4618      	mov	r0, r3
 8027dc4:	f000 fb11 	bl	80283ea <writeChar>

	ptr += MQTTPacket_encode(ptr, len); /* write remaining length */
 8027dc8:	69fb      	ldr	r3, [r7, #28]
 8027dca:	6a39      	ldr	r1, [r7, #32]
 8027dcc:	4618      	mov	r0, r3
 8027dce:	f000 fa12 	bl	80281f6 <MQTTPacket_encode>
 8027dd2:	4602      	mov	r2, r0
 8027dd4:	69fb      	ldr	r3, [r7, #28]
 8027dd6:	4413      	add	r3, r2
 8027dd8:	61fb      	str	r3, [r7, #28]

	if (options->MQTTVersion == 4)
 8027dda:	687b      	ldr	r3, [r7, #4]
 8027ddc:	7a1b      	ldrb	r3, [r3, #8]
 8027dde:	2b04      	cmp	r3, #4
 8027de0:	d10c      	bne.n	8027dfc <MQTTSerialize_connect+0x90>
	{
		writeCString(&ptr, "MQTT");
 8027de2:	f107 031c 	add.w	r3, r7, #28
 8027de6:	4955      	ldr	r1, [pc, #340]	@ (8027f3c <MQTTSerialize_connect+0x1d0>)
 8027de8:	4618      	mov	r0, r3
 8027dea:	f000 fb3c 	bl	8028466 <writeCString>
		writeChar(&ptr, (char) 4);
 8027dee:	f107 031c 	add.w	r3, r7, #28
 8027df2:	2104      	movs	r1, #4
 8027df4:	4618      	mov	r0, r3
 8027df6:	f000 faf8 	bl	80283ea <writeChar>
 8027dfa:	e00b      	b.n	8027e14 <MQTTSerialize_connect+0xa8>
	}
	else
	{
		writeCString(&ptr, "MQIsdp");
 8027dfc:	f107 031c 	add.w	r3, r7, #28
 8027e00:	494f      	ldr	r1, [pc, #316]	@ (8027f40 <MQTTSerialize_connect+0x1d4>)
 8027e02:	4618      	mov	r0, r3
 8027e04:	f000 fb2f 	bl	8028466 <writeCString>
		writeChar(&ptr, (char) 3);
 8027e08:	f107 031c 	add.w	r3, r7, #28
 8027e0c:	2103      	movs	r1, #3
 8027e0e:	4618      	mov	r0, r3
 8027e10:	f000 faeb 	bl	80283ea <writeChar>
	}

	flags.all = 0;
 8027e14:	2300      	movs	r3, #0
 8027e16:	753b      	strb	r3, [r7, #20]
	flags.bits.cleansession = options->cleansession;
 8027e18:	687b      	ldr	r3, [r7, #4]
 8027e1a:	7e9b      	ldrb	r3, [r3, #26]
 8027e1c:	f003 0301 	and.w	r3, r3, #1
 8027e20:	b2da      	uxtb	r2, r3
 8027e22:	7d3b      	ldrb	r3, [r7, #20]
 8027e24:	f362 0341 	bfi	r3, r2, #1, #1
 8027e28:	753b      	strb	r3, [r7, #20]
	flags.bits.will = (options->willFlag) ? 1 : 0;
 8027e2a:	687b      	ldr	r3, [r7, #4]
 8027e2c:	7edb      	ldrb	r3, [r3, #27]
 8027e2e:	2b00      	cmp	r3, #0
 8027e30:	bf14      	ite	ne
 8027e32:	2301      	movne	r3, #1
 8027e34:	2300      	moveq	r3, #0
 8027e36:	b2da      	uxtb	r2, r3
 8027e38:	7d3b      	ldrb	r3, [r7, #20]
 8027e3a:	f362 0382 	bfi	r3, r2, #2, #1
 8027e3e:	753b      	strb	r3, [r7, #20]
	if (flags.bits.will)
 8027e40:	7d3b      	ldrb	r3, [r7, #20]
 8027e42:	f003 0304 	and.w	r3, r3, #4
 8027e46:	b2db      	uxtb	r3, r3
 8027e48:	2b00      	cmp	r3, #0
 8027e4a:	d013      	beq.n	8027e74 <MQTTSerialize_connect+0x108>
	{
		flags.bits.willQoS = options->will.qos;
 8027e4c:	687b      	ldr	r3, [r7, #4]
 8027e4e:	f893 303d 	ldrb.w	r3, [r3, #61]	@ 0x3d
 8027e52:	f003 0303 	and.w	r3, r3, #3
 8027e56:	b2da      	uxtb	r2, r3
 8027e58:	7d3b      	ldrb	r3, [r7, #20]
 8027e5a:	f362 03c4 	bfi	r3, r2, #3, #2
 8027e5e:	753b      	strb	r3, [r7, #20]
		flags.bits.willRetain = options->will.retained;
 8027e60:	687b      	ldr	r3, [r7, #4]
 8027e62:	f893 303c 	ldrb.w	r3, [r3, #60]	@ 0x3c
 8027e66:	f003 0301 	and.w	r3, r3, #1
 8027e6a:	b2da      	uxtb	r2, r3
 8027e6c:	7d3b      	ldrb	r3, [r7, #20]
 8027e6e:	f362 1345 	bfi	r3, r2, #5, #1
 8027e72:	753b      	strb	r3, [r7, #20]
	}

	if (options->username.cstring || options->username.lenstring.data)
 8027e74:	687b      	ldr	r3, [r7, #4]
 8027e76:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8027e78:	2b00      	cmp	r3, #0
 8027e7a:	d103      	bne.n	8027e84 <MQTTSerialize_connect+0x118>
 8027e7c:	687b      	ldr	r3, [r7, #4]
 8027e7e:	6c9b      	ldr	r3, [r3, #72]	@ 0x48
 8027e80:	2b00      	cmp	r3, #0
 8027e82:	d003      	beq.n	8027e8c <MQTTSerialize_connect+0x120>
		flags.bits.username = 1;
 8027e84:	7d3b      	ldrb	r3, [r7, #20]
 8027e86:	f043 0380 	orr.w	r3, r3, #128	@ 0x80
 8027e8a:	753b      	strb	r3, [r7, #20]
	if (options->password.cstring || options->password.lenstring.data)
 8027e8c:	687b      	ldr	r3, [r7, #4]
 8027e8e:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 8027e90:	2b00      	cmp	r3, #0
 8027e92:	d103      	bne.n	8027e9c <MQTTSerialize_connect+0x130>
 8027e94:	687b      	ldr	r3, [r7, #4]
 8027e96:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 8027e98:	2b00      	cmp	r3, #0
 8027e9a:	d003      	beq.n	8027ea4 <MQTTSerialize_connect+0x138>
		flags.bits.password = 1;
 8027e9c:	7d3b      	ldrb	r3, [r7, #20]
 8027e9e:	f043 0340 	orr.w	r3, r3, #64	@ 0x40
 8027ea2:	753b      	strb	r3, [r7, #20]

	writeChar(&ptr, flags.all);
 8027ea4:	7d3a      	ldrb	r2, [r7, #20]
 8027ea6:	f107 031c 	add.w	r3, r7, #28
 8027eaa:	4611      	mov	r1, r2
 8027eac:	4618      	mov	r0, r3
 8027eae:	f000 fa9c 	bl	80283ea <writeChar>
	writeInt(&ptr, options->keepAliveInterval);
 8027eb2:	687b      	ldr	r3, [r7, #4]
 8027eb4:	8b1b      	ldrh	r3, [r3, #24]
 8027eb6:	461a      	mov	r2, r3
 8027eb8:	f107 031c 	add.w	r3, r7, #28
 8027ebc:	4611      	mov	r1, r2
 8027ebe:	4618      	mov	r0, r3
 8027ec0:	f000 faa8 	bl	8028414 <writeInt>
	writeMQTTString(&ptr, options->clientID);
 8027ec4:	687b      	ldr	r3, [r7, #4]
 8027ec6:	f107 001c 	add.w	r0, r7, #28
 8027eca:	330c      	adds	r3, #12
 8027ecc:	cb0e      	ldmia	r3, {r1, r2, r3}
 8027ece:	f000 fae9 	bl	80284a4 <writeMQTTString>
	if (options->willFlag)
 8027ed2:	687b      	ldr	r3, [r7, #4]
 8027ed4:	7edb      	ldrb	r3, [r3, #27]
 8027ed6:	2b00      	cmp	r3, #0
 8027ed8:	d00d      	beq.n	8027ef6 <MQTTSerialize_connect+0x18a>
	{
		writeMQTTString(&ptr, options->will.topicName);
 8027eda:	687b      	ldr	r3, [r7, #4]
 8027edc:	f107 001c 	add.w	r0, r7, #28
 8027ee0:	3324      	adds	r3, #36	@ 0x24
 8027ee2:	cb0e      	ldmia	r3, {r1, r2, r3}
 8027ee4:	f000 fade 	bl	80284a4 <writeMQTTString>
		writeMQTTString(&ptr, options->will.message);
 8027ee8:	687b      	ldr	r3, [r7, #4]
 8027eea:	f107 001c 	add.w	r0, r7, #28
 8027eee:	3330      	adds	r3, #48	@ 0x30
 8027ef0:	cb0e      	ldmia	r3, {r1, r2, r3}
 8027ef2:	f000 fad7 	bl	80284a4 <writeMQTTString>
	}
	if (flags.bits.username)
 8027ef6:	7d3b      	ldrb	r3, [r7, #20]
 8027ef8:	f023 037f 	bic.w	r3, r3, #127	@ 0x7f
 8027efc:	b2db      	uxtb	r3, r3
 8027efe:	2b00      	cmp	r3, #0
 8027f00:	d006      	beq.n	8027f10 <MQTTSerialize_connect+0x1a4>
		writeMQTTString(&ptr, options->username);
 8027f02:	687b      	ldr	r3, [r7, #4]
 8027f04:	f107 001c 	add.w	r0, r7, #28
 8027f08:	3340      	adds	r3, #64	@ 0x40
 8027f0a:	cb0e      	ldmia	r3, {r1, r2, r3}
 8027f0c:	f000 faca 	bl	80284a4 <writeMQTTString>
	if (flags.bits.password)
 8027f10:	7d3b      	ldrb	r3, [r7, #20]
 8027f12:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 8027f16:	b2db      	uxtb	r3, r3
 8027f18:	2b00      	cmp	r3, #0
 8027f1a:	d006      	beq.n	8027f2a <MQTTSerialize_connect+0x1be>
		writeMQTTString(&ptr, options->password);
 8027f1c:	687b      	ldr	r3, [r7, #4]
 8027f1e:	f107 001c 	add.w	r0, r7, #28
 8027f22:	334c      	adds	r3, #76	@ 0x4c
 8027f24:	cb0e      	ldmia	r3, {r1, r2, r3}
 8027f26:	f000 fabd 	bl	80284a4 <writeMQTTString>

	rc = ptr - buf;
 8027f2a:	69fa      	ldr	r2, [r7, #28]
 8027f2c:	68fb      	ldr	r3, [r7, #12]
 8027f2e:	1ad3      	subs	r3, r2, r3
 8027f30:	627b      	str	r3, [r7, #36]	@ 0x24

	exit: FUNC_EXIT_RC(rc);
	return rc;
 8027f32:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
}
 8027f34:	4618      	mov	r0, r3
 8027f36:	3728      	adds	r7, #40	@ 0x28
 8027f38:	46bd      	mov	sp, r7
 8027f3a:	bd80      	pop	{r7, pc}
 8027f3c:	08031214 	.word	0x08031214
 8027f40:	0803121c 	.word	0x0803121c

08027f44 <MQTTDeserialize_connack>:
  * @param buf the raw buffer data, of the correct length determined by the remaining length field
  * @param len the length in bytes of the data in the supplied buffer
  * @return error code.  1 is success, 0 is failure
  */
int MQTTDeserialize_connack(unsigned char* sessionPresent, unsigned char* connack_rc, unsigned char* buf, int buflen)
{
 8027f44:	b580      	push	{r7, lr}
 8027f46:	b08a      	sub	sp, #40	@ 0x28
 8027f48:	af00      	add	r7, sp, #0
 8027f4a:	60f8      	str	r0, [r7, #12]
 8027f4c:	60b9      	str	r1, [r7, #8]
 8027f4e:	607a      	str	r2, [r7, #4]
 8027f50:	603b      	str	r3, [r7, #0]
	MQTTHeader header = {0};
 8027f52:	2300      	movs	r3, #0
 8027f54:	61fb      	str	r3, [r7, #28]
	unsigned char* curdata = buf;
 8027f56:	687b      	ldr	r3, [r7, #4]
 8027f58:	61bb      	str	r3, [r7, #24]
	unsigned char* enddata = NULL;
 8027f5a:	2300      	movs	r3, #0
 8027f5c:	623b      	str	r3, [r7, #32]
	int rc = 0;
 8027f5e:	2300      	movs	r3, #0
 8027f60:	627b      	str	r3, [r7, #36]	@ 0x24
	int mylen;
	MQTTConnackFlags flags = {0};
 8027f62:	2300      	movs	r3, #0
 8027f64:	613b      	str	r3, [r7, #16]

	FUNC_ENTRY;
	header.byte = readChar(&curdata);
 8027f66:	f107 0318 	add.w	r3, r7, #24
 8027f6a:	4618      	mov	r0, r3
 8027f6c:	f000 fa29 	bl	80283c2 <readChar>
 8027f70:	4603      	mov	r3, r0
 8027f72:	773b      	strb	r3, [r7, #28]
	if (header.bits.type != CONNACK)
 8027f74:	7f3b      	ldrb	r3, [r7, #28]
 8027f76:	f023 030f 	bic.w	r3, r3, #15
 8027f7a:	b2db      	uxtb	r3, r3
 8027f7c:	2b20      	cmp	r3, #32
 8027f7e:	d12e      	bne.n	8027fde <MQTTDeserialize_connack+0x9a>
		goto exit;

	curdata += (rc = MQTTPacket_decodeBuf(curdata, &mylen)); /* read remaining length */
 8027f80:	69bb      	ldr	r3, [r7, #24]
 8027f82:	f107 0214 	add.w	r2, r7, #20
 8027f86:	4611      	mov	r1, r2
 8027f88:	4618      	mov	r0, r3
 8027f8a:	f000 f9e9 	bl	8028360 <MQTTPacket_decodeBuf>
 8027f8e:	6278      	str	r0, [r7, #36]	@ 0x24
 8027f90:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8027f92:	69bb      	ldr	r3, [r7, #24]
 8027f94:	4413      	add	r3, r2
 8027f96:	61bb      	str	r3, [r7, #24]
	enddata = curdata + mylen;
 8027f98:	69bb      	ldr	r3, [r7, #24]
 8027f9a:	697a      	ldr	r2, [r7, #20]
 8027f9c:	4413      	add	r3, r2
 8027f9e:	623b      	str	r3, [r7, #32]
	if (enddata - curdata < 2)
 8027fa0:	69bb      	ldr	r3, [r7, #24]
 8027fa2:	6a3a      	ldr	r2, [r7, #32]
 8027fa4:	1ad3      	subs	r3, r2, r3
 8027fa6:	2b01      	cmp	r3, #1
 8027fa8:	dd1b      	ble.n	8027fe2 <MQTTDeserialize_connack+0x9e>
		goto exit;

	flags.all = readChar(&curdata);
 8027faa:	f107 0318 	add.w	r3, r7, #24
 8027fae:	4618      	mov	r0, r3
 8027fb0:	f000 fa07 	bl	80283c2 <readChar>
 8027fb4:	4603      	mov	r3, r0
 8027fb6:	743b      	strb	r3, [r7, #16]
	*sessionPresent = flags.bits.sessionpresent;
 8027fb8:	7c3b      	ldrb	r3, [r7, #16]
 8027fba:	f3c3 0300 	ubfx	r3, r3, #0, #1
 8027fbe:	b2db      	uxtb	r3, r3
 8027fc0:	461a      	mov	r2, r3
 8027fc2:	68fb      	ldr	r3, [r7, #12]
 8027fc4:	701a      	strb	r2, [r3, #0]
	*connack_rc = readChar(&curdata);
 8027fc6:	f107 0318 	add.w	r3, r7, #24
 8027fca:	4618      	mov	r0, r3
 8027fcc:	f000 f9f9 	bl	80283c2 <readChar>
 8027fd0:	4603      	mov	r3, r0
 8027fd2:	461a      	mov	r2, r3
 8027fd4:	68bb      	ldr	r3, [r7, #8]
 8027fd6:	701a      	strb	r2, [r3, #0]

	rc = 1;
 8027fd8:	2301      	movs	r3, #1
 8027fda:	627b      	str	r3, [r7, #36]	@ 0x24
 8027fdc:	e002      	b.n	8027fe4 <MQTTDeserialize_connack+0xa0>
		goto exit;
 8027fde:	bf00      	nop
 8027fe0:	e000      	b.n	8027fe4 <MQTTDeserialize_connack+0xa0>
		goto exit;
 8027fe2:	bf00      	nop
exit:
	FUNC_EXIT_RC(rc);
	return rc;
 8027fe4:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
}
 8027fe6:	4618      	mov	r0, r3
 8027fe8:	3728      	adds	r7, #40	@ 0x28
 8027fea:	46bd      	mov	sp, r7
 8027fec:	bd80      	pop	{r7, pc}

08027fee <MQTTSerialize_zero>:
  * @param buflen the length in bytes of the supplied buffer, to avoid overruns
  * @param packettype the message type
  * @return serialized length, or error if 0
  */
int MQTTSerialize_zero(unsigned char* buf, int buflen, unsigned char packettype)
{
 8027fee:	b580      	push	{r7, lr}
 8027ff0:	b088      	sub	sp, #32
 8027ff2:	af00      	add	r7, sp, #0
 8027ff4:	60f8      	str	r0, [r7, #12]
 8027ff6:	60b9      	str	r1, [r7, #8]
 8027ff8:	4613      	mov	r3, r2
 8027ffa:	71fb      	strb	r3, [r7, #7]
	MQTTHeader header = {0};
 8027ffc:	2300      	movs	r3, #0
 8027ffe:	61bb      	str	r3, [r7, #24]
	int rc = -1;
 8028000:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8028004:	61fb      	str	r3, [r7, #28]
	unsigned char *ptr = buf;
 8028006:	68fb      	ldr	r3, [r7, #12]
 8028008:	617b      	str	r3, [r7, #20]

	FUNC_ENTRY;
	if (buflen < 2)
 802800a:	68bb      	ldr	r3, [r7, #8]
 802800c:	2b01      	cmp	r3, #1
 802800e:	dc03      	bgt.n	8028018 <MQTTSerialize_zero+0x2a>
	{
		rc = MQTTPACKET_BUFFER_TOO_SHORT;
 8028010:	f06f 0301 	mvn.w	r3, #1
 8028014:	61fb      	str	r3, [r7, #28]
		goto exit;
 8028016:	e01d      	b.n	8028054 <MQTTSerialize_zero+0x66>
	}
	header.byte = 0;
 8028018:	2300      	movs	r3, #0
 802801a:	763b      	strb	r3, [r7, #24]
	header.bits.type = packettype;
 802801c:	79fb      	ldrb	r3, [r7, #7]
 802801e:	f003 030f 	and.w	r3, r3, #15
 8028022:	b2da      	uxtb	r2, r3
 8028024:	7e3b      	ldrb	r3, [r7, #24]
 8028026:	f362 1307 	bfi	r3, r2, #4, #4
 802802a:	763b      	strb	r3, [r7, #24]
	writeChar(&ptr, header.byte); /* write header */
 802802c:	7e3a      	ldrb	r2, [r7, #24]
 802802e:	f107 0314 	add.w	r3, r7, #20
 8028032:	4611      	mov	r1, r2
 8028034:	4618      	mov	r0, r3
 8028036:	f000 f9d8 	bl	80283ea <writeChar>

	ptr += MQTTPacket_encode(ptr, 0); /* write remaining length */
 802803a:	697b      	ldr	r3, [r7, #20]
 802803c:	2100      	movs	r1, #0
 802803e:	4618      	mov	r0, r3
 8028040:	f000 f8d9 	bl	80281f6 <MQTTPacket_encode>
 8028044:	4602      	mov	r2, r0
 8028046:	697b      	ldr	r3, [r7, #20]
 8028048:	4413      	add	r3, r2
 802804a:	617b      	str	r3, [r7, #20]
	rc = ptr - buf;
 802804c:	697a      	ldr	r2, [r7, #20]
 802804e:	68fb      	ldr	r3, [r7, #12]
 8028050:	1ad3      	subs	r3, r2, r3
 8028052:	61fb      	str	r3, [r7, #28]
exit:
	FUNC_EXIT_RC(rc);
	return rc;
 8028054:	69fb      	ldr	r3, [r7, #28]
}
 8028056:	4618      	mov	r0, r3
 8028058:	3720      	adds	r7, #32
 802805a:	46bd      	mov	sp, r7
 802805c:	bd80      	pop	{r7, pc}

0802805e <MQTTSerialize_pingreq>:
  * @param buf the buffer into which the packet will be serialized
  * @param buflen the length in bytes of the supplied buffer, to avoid overruns
  * @return serialized length, or error if 0
  */
int MQTTSerialize_pingreq(unsigned char* buf, int buflen)
{
 802805e:	b580      	push	{r7, lr}
 8028060:	b082      	sub	sp, #8
 8028062:	af00      	add	r7, sp, #0
 8028064:	6078      	str	r0, [r7, #4]
 8028066:	6039      	str	r1, [r7, #0]
	return MQTTSerialize_zero(buf, buflen, PINGREQ);
 8028068:	220c      	movs	r2, #12
 802806a:	6839      	ldr	r1, [r7, #0]
 802806c:	6878      	ldr	r0, [r7, #4]
 802806e:	f7ff ffbe 	bl	8027fee <MQTTSerialize_zero>
 8028072:	4603      	mov	r3, r0
}
 8028074:	4618      	mov	r0, r3
 8028076:	3708      	adds	r7, #8
 8028078:	46bd      	mov	sp, r7
 802807a:	bd80      	pop	{r7, pc}

0802807c <MQTTDeserialize_publish>:
  * @param buflen the length in bytes of the data in the supplied buffer
  * @return error code.  1 is success
  */
int MQTTDeserialize_publish(unsigned char* dup, int* qos, unsigned char* retained, unsigned short* packetid, MQTTString* topicName,
		unsigned char** payload, int* payloadlen, unsigned char* buf, int buflen)
{
 802807c:	b580      	push	{r7, lr}
 802807e:	b08a      	sub	sp, #40	@ 0x28
 8028080:	af00      	add	r7, sp, #0
 8028082:	60f8      	str	r0, [r7, #12]
 8028084:	60b9      	str	r1, [r7, #8]
 8028086:	607a      	str	r2, [r7, #4]
 8028088:	603b      	str	r3, [r7, #0]
	MQTTHeader header = {0};
 802808a:	2300      	movs	r3, #0
 802808c:	61fb      	str	r3, [r7, #28]
	unsigned char* curdata = buf;
 802808e:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 8028090:	61bb      	str	r3, [r7, #24]
	unsigned char* enddata = NULL;
 8028092:	2300      	movs	r3, #0
 8028094:	623b      	str	r3, [r7, #32]
	int rc = 0;
 8028096:	2300      	movs	r3, #0
 8028098:	627b      	str	r3, [r7, #36]	@ 0x24
	int mylen = 0;
 802809a:	2300      	movs	r3, #0
 802809c:	617b      	str	r3, [r7, #20]

	FUNC_ENTRY;
	header.byte = readChar(&curdata);
 802809e:	f107 0318 	add.w	r3, r7, #24
 80280a2:	4618      	mov	r0, r3
 80280a4:	f000 f98d 	bl	80283c2 <readChar>
 80280a8:	4603      	mov	r3, r0
 80280aa:	773b      	strb	r3, [r7, #28]
	if (header.bits.type != PUBLISH)
 80280ac:	7f3b      	ldrb	r3, [r7, #28]
 80280ae:	f023 030f 	bic.w	r3, r3, #15
 80280b2:	b2db      	uxtb	r3, r3
 80280b4:	2b30      	cmp	r3, #48	@ 0x30
 80280b6:	d14b      	bne.n	8028150 <MQTTDeserialize_publish+0xd4>
		goto exit;
	*dup = header.bits.dup;
 80280b8:	7f3b      	ldrb	r3, [r7, #28]
 80280ba:	f3c3 03c0 	ubfx	r3, r3, #3, #1
 80280be:	b2db      	uxtb	r3, r3
 80280c0:	461a      	mov	r2, r3
 80280c2:	68fb      	ldr	r3, [r7, #12]
 80280c4:	701a      	strb	r2, [r3, #0]
	*qos = header.bits.qos;
 80280c6:	7f3b      	ldrb	r3, [r7, #28]
 80280c8:	f3c3 0341 	ubfx	r3, r3, #1, #2
 80280cc:	b2db      	uxtb	r3, r3
 80280ce:	461a      	mov	r2, r3
 80280d0:	68bb      	ldr	r3, [r7, #8]
 80280d2:	601a      	str	r2, [r3, #0]
	*retained = header.bits.retain;
 80280d4:	7f3b      	ldrb	r3, [r7, #28]
 80280d6:	f3c3 0300 	ubfx	r3, r3, #0, #1
 80280da:	b2db      	uxtb	r3, r3
 80280dc:	461a      	mov	r2, r3
 80280de:	687b      	ldr	r3, [r7, #4]
 80280e0:	701a      	strb	r2, [r3, #0]

	curdata += (rc = MQTTPacket_decodeBuf(curdata, &mylen)); /* read remaining length */
 80280e2:	69bb      	ldr	r3, [r7, #24]
 80280e4:	f107 0214 	add.w	r2, r7, #20
 80280e8:	4611      	mov	r1, r2
 80280ea:	4618      	mov	r0, r3
 80280ec:	f000 f938 	bl	8028360 <MQTTPacket_decodeBuf>
 80280f0:	6278      	str	r0, [r7, #36]	@ 0x24
 80280f2:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 80280f4:	69bb      	ldr	r3, [r7, #24]
 80280f6:	4413      	add	r3, r2
 80280f8:	61bb      	str	r3, [r7, #24]
	enddata = curdata + mylen;
 80280fa:	69bb      	ldr	r3, [r7, #24]
 80280fc:	697a      	ldr	r2, [r7, #20]
 80280fe:	4413      	add	r3, r2
 8028100:	623b      	str	r3, [r7, #32]

	if (!readMQTTLenString(topicName, &curdata, enddata) ||
 8028102:	f107 0318 	add.w	r3, r7, #24
 8028106:	6a3a      	ldr	r2, [r7, #32]
 8028108:	4619      	mov	r1, r3
 802810a:	6b38      	ldr	r0, [r7, #48]	@ 0x30
 802810c:	f000 f9f8 	bl	8028500 <readMQTTLenString>
 8028110:	4603      	mov	r3, r0
 8028112:	2b00      	cmp	r3, #0
 8028114:	d01e      	beq.n	8028154 <MQTTDeserialize_publish+0xd8>
		enddata - curdata < 0) /* do we have enough data to read the protocol version byte? */
 8028116:	69bb      	ldr	r3, [r7, #24]
 8028118:	6a3a      	ldr	r2, [r7, #32]
 802811a:	1ad3      	subs	r3, r2, r3
	if (!readMQTTLenString(topicName, &curdata, enddata) ||
 802811c:	2b00      	cmp	r3, #0
 802811e:	db19      	blt.n	8028154 <MQTTDeserialize_publish+0xd8>
		goto exit;

	if (*qos > 0)
 8028120:	68bb      	ldr	r3, [r7, #8]
 8028122:	681b      	ldr	r3, [r3, #0]
 8028124:	2b00      	cmp	r3, #0
 8028126:	dd08      	ble.n	802813a <MQTTDeserialize_publish+0xbe>
		*packetid = readInt(&curdata);
 8028128:	f107 0318 	add.w	r3, r7, #24
 802812c:	4618      	mov	r0, r3
 802812e:	f000 f92d 	bl	802838c <readInt>
 8028132:	4603      	mov	r3, r0
 8028134:	b29a      	uxth	r2, r3
 8028136:	683b      	ldr	r3, [r7, #0]
 8028138:	801a      	strh	r2, [r3, #0]

	*payloadlen = enddata - curdata;
 802813a:	69bb      	ldr	r3, [r7, #24]
 802813c:	6a3a      	ldr	r2, [r7, #32]
 802813e:	1ad2      	subs	r2, r2, r3
 8028140:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8028142:	601a      	str	r2, [r3, #0]
	*payload = curdata;
 8028144:	69ba      	ldr	r2, [r7, #24]
 8028146:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8028148:	601a      	str	r2, [r3, #0]
	rc = 1;
 802814a:	2301      	movs	r3, #1
 802814c:	627b      	str	r3, [r7, #36]	@ 0x24
 802814e:	e002      	b.n	8028156 <MQTTDeserialize_publish+0xda>
		goto exit;
 8028150:	bf00      	nop
 8028152:	e000      	b.n	8028156 <MQTTDeserialize_publish+0xda>
		goto exit;
 8028154:	bf00      	nop
exit:
	FUNC_EXIT_RC(rc);
	return rc;
 8028156:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
}
 8028158:	4618      	mov	r0, r3
 802815a:	3728      	adds	r7, #40	@ 0x28
 802815c:	46bd      	mov	sp, r7
 802815e:	bd80      	pop	{r7, pc}

08028160 <MQTTDeserialize_ack>:
  * @param buf the raw buffer data, of the correct length determined by the remaining length field
  * @param buflen the length in bytes of the data in the supplied buffer
  * @return error code.  1 is success, 0 is failure
  */
int MQTTDeserialize_ack(unsigned char* packettype, unsigned char* dup, unsigned short* packetid, unsigned char* buf, int buflen)
{
 8028160:	b580      	push	{r7, lr}
 8028162:	b08a      	sub	sp, #40	@ 0x28
 8028164:	af00      	add	r7, sp, #0
 8028166:	60f8      	str	r0, [r7, #12]
 8028168:	60b9      	str	r1, [r7, #8]
 802816a:	607a      	str	r2, [r7, #4]
 802816c:	603b      	str	r3, [r7, #0]
	MQTTHeader header = {0};
 802816e:	2300      	movs	r3, #0
 8028170:	61fb      	str	r3, [r7, #28]
	unsigned char* curdata = buf;
 8028172:	683b      	ldr	r3, [r7, #0]
 8028174:	61bb      	str	r3, [r7, #24]
	unsigned char* enddata = NULL;
 8028176:	2300      	movs	r3, #0
 8028178:	623b      	str	r3, [r7, #32]
	int rc = 0;
 802817a:	2300      	movs	r3, #0
 802817c:	627b      	str	r3, [r7, #36]	@ 0x24
	int mylen;

	FUNC_ENTRY;
	header.byte = readChar(&curdata);
 802817e:	f107 0318 	add.w	r3, r7, #24
 8028182:	4618      	mov	r0, r3
 8028184:	f000 f91d 	bl	80283c2 <readChar>
 8028188:	4603      	mov	r3, r0
 802818a:	773b      	strb	r3, [r7, #28]
	*dup = header.bits.dup;
 802818c:	7f3b      	ldrb	r3, [r7, #28]
 802818e:	f3c3 03c0 	ubfx	r3, r3, #3, #1
 8028192:	b2db      	uxtb	r3, r3
 8028194:	461a      	mov	r2, r3
 8028196:	68bb      	ldr	r3, [r7, #8]
 8028198:	701a      	strb	r2, [r3, #0]
	*packettype = header.bits.type;
 802819a:	7f3b      	ldrb	r3, [r7, #28]
 802819c:	f3c3 1303 	ubfx	r3, r3, #4, #4
 80281a0:	b2db      	uxtb	r3, r3
 80281a2:	461a      	mov	r2, r3
 80281a4:	68fb      	ldr	r3, [r7, #12]
 80281a6:	701a      	strb	r2, [r3, #0]

	curdata += (rc = MQTTPacket_decodeBuf(curdata, &mylen)); /* read remaining length */
 80281a8:	69bb      	ldr	r3, [r7, #24]
 80281aa:	f107 0214 	add.w	r2, r7, #20
 80281ae:	4611      	mov	r1, r2
 80281b0:	4618      	mov	r0, r3
 80281b2:	f000 f8d5 	bl	8028360 <MQTTPacket_decodeBuf>
 80281b6:	6278      	str	r0, [r7, #36]	@ 0x24
 80281b8:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 80281ba:	69bb      	ldr	r3, [r7, #24]
 80281bc:	4413      	add	r3, r2
 80281be:	61bb      	str	r3, [r7, #24]
	enddata = curdata + mylen;
 80281c0:	69bb      	ldr	r3, [r7, #24]
 80281c2:	697a      	ldr	r2, [r7, #20]
 80281c4:	4413      	add	r3, r2
 80281c6:	623b      	str	r3, [r7, #32]

	if (enddata - curdata < 2)
 80281c8:	69bb      	ldr	r3, [r7, #24]
 80281ca:	6a3a      	ldr	r2, [r7, #32]
 80281cc:	1ad3      	subs	r3, r2, r3
 80281ce:	2b01      	cmp	r3, #1
 80281d0:	dd0b      	ble.n	80281ea <MQTTDeserialize_ack+0x8a>
		goto exit;
	*packetid = readInt(&curdata);
 80281d2:	f107 0318 	add.w	r3, r7, #24
 80281d6:	4618      	mov	r0, r3
 80281d8:	f000 f8d8 	bl	802838c <readInt>
 80281dc:	4603      	mov	r3, r0
 80281de:	b29a      	uxth	r2, r3
 80281e0:	687b      	ldr	r3, [r7, #4]
 80281e2:	801a      	strh	r2, [r3, #0]

	rc = 1;
 80281e4:	2301      	movs	r3, #1
 80281e6:	627b      	str	r3, [r7, #36]	@ 0x24
 80281e8:	e000      	b.n	80281ec <MQTTDeserialize_ack+0x8c>
		goto exit;
 80281ea:	bf00      	nop
exit:
	FUNC_EXIT_RC(rc);
	return rc;
 80281ec:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
}
 80281ee:	4618      	mov	r0, r3
 80281f0:	3728      	adds	r7, #40	@ 0x28
 80281f2:	46bd      	mov	sp, r7
 80281f4:	bd80      	pop	{r7, pc}

080281f6 <MQTTPacket_encode>:
 * @param buf the buffer into which the encoded data is written
 * @param length the length to be encoded
 * @return the number of bytes written to buffer
 */
int MQTTPacket_encode(unsigned char* buf, int length)
{
 80281f6:	b480      	push	{r7}
 80281f8:	b085      	sub	sp, #20
 80281fa:	af00      	add	r7, sp, #0
 80281fc:	6078      	str	r0, [r7, #4]
 80281fe:	6039      	str	r1, [r7, #0]
	int rc = 0;
 8028200:	2300      	movs	r3, #0
 8028202:	60fb      	str	r3, [r7, #12]

	FUNC_ENTRY;
	do
	{
		char d = length % 128;
 8028204:	683b      	ldr	r3, [r7, #0]
 8028206:	425a      	negs	r2, r3
 8028208:	f003 037f 	and.w	r3, r3, #127	@ 0x7f
 802820c:	f002 027f 	and.w	r2, r2, #127	@ 0x7f
 8028210:	bf58      	it	pl
 8028212:	4253      	negpl	r3, r2
 8028214:	72fb      	strb	r3, [r7, #11]
		length /= 128;
 8028216:	683b      	ldr	r3, [r7, #0]
 8028218:	2b00      	cmp	r3, #0
 802821a:	da00      	bge.n	802821e <MQTTPacket_encode+0x28>
 802821c:	337f      	adds	r3, #127	@ 0x7f
 802821e:	11db      	asrs	r3, r3, #7
 8028220:	603b      	str	r3, [r7, #0]
		/* if there are more digits to encode, set the top bit of this digit */
		if (length > 0)
 8028222:	683b      	ldr	r3, [r7, #0]
 8028224:	2b00      	cmp	r3, #0
 8028226:	dd03      	ble.n	8028230 <MQTTPacket_encode+0x3a>
			d |= 0x80;
 8028228:	7afb      	ldrb	r3, [r7, #11]
 802822a:	f063 037f 	orn	r3, r3, #127	@ 0x7f
 802822e:	72fb      	strb	r3, [r7, #11]
		buf[rc++] = d;
 8028230:	68fb      	ldr	r3, [r7, #12]
 8028232:	1c5a      	adds	r2, r3, #1
 8028234:	60fa      	str	r2, [r7, #12]
 8028236:	461a      	mov	r2, r3
 8028238:	687b      	ldr	r3, [r7, #4]
 802823a:	4413      	add	r3, r2
 802823c:	7afa      	ldrb	r2, [r7, #11]
 802823e:	701a      	strb	r2, [r3, #0]
	} while (length > 0);
 8028240:	683b      	ldr	r3, [r7, #0]
 8028242:	2b00      	cmp	r3, #0
 8028244:	dcde      	bgt.n	8028204 <MQTTPacket_encode+0xe>
	FUNC_EXIT_RC(rc);
	return rc;
 8028246:	68fb      	ldr	r3, [r7, #12]
}
 8028248:	4618      	mov	r0, r3
 802824a:	3714      	adds	r7, #20
 802824c:	46bd      	mov	sp, r7
 802824e:	f85d 7b04 	ldr.w	r7, [sp], #4
 8028252:	4770      	bx	lr

08028254 <MQTTPacket_decode>:
 * @param getcharfn pointer to function to read the next character from the data source
 * @param value the decoded length returned
 * @return the number of bytes read from the socket
 */
int MQTTPacket_decode(int (*getcharfn)(unsigned char*, int), int* value)
{
 8028254:	b580      	push	{r7, lr}
 8028256:	b086      	sub	sp, #24
 8028258:	af00      	add	r7, sp, #0
 802825a:	6078      	str	r0, [r7, #4]
 802825c:	6039      	str	r1, [r7, #0]
	unsigned char c;
	int multiplier = 1;
 802825e:	2301      	movs	r3, #1
 8028260:	617b      	str	r3, [r7, #20]
	int len = 0;
 8028262:	2300      	movs	r3, #0
 8028264:	613b      	str	r3, [r7, #16]
#define MAX_NO_OF_REMAINING_LENGTH_BYTES 4

	FUNC_ENTRY;
	*value = 0;
 8028266:	683b      	ldr	r3, [r7, #0]
 8028268:	2200      	movs	r2, #0
 802826a:	601a      	str	r2, [r3, #0]
	do
	{
		int rc = MQTTPACKET_READ_ERROR;
 802826c:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8028270:	60fb      	str	r3, [r7, #12]

		if (++len > MAX_NO_OF_REMAINING_LENGTH_BYTES)
 8028272:	693b      	ldr	r3, [r7, #16]
 8028274:	3301      	adds	r3, #1
 8028276:	613b      	str	r3, [r7, #16]
 8028278:	693b      	ldr	r3, [r7, #16]
 802827a:	2b04      	cmp	r3, #4
 802827c:	dd03      	ble.n	8028286 <MQTTPacket_decode+0x32>
		{
			rc = MQTTPACKET_READ_ERROR;	/* bad data */
 802827e:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8028282:	60fb      	str	r3, [r7, #12]
			goto exit;
 8028284:	e01d      	b.n	80282c2 <MQTTPacket_decode+0x6e>
		}
		rc = (*getcharfn)(&c, 1);
 8028286:	f107 020b 	add.w	r2, r7, #11
 802828a:	687b      	ldr	r3, [r7, #4]
 802828c:	2101      	movs	r1, #1
 802828e:	4610      	mov	r0, r2
 8028290:	4798      	blx	r3
 8028292:	60f8      	str	r0, [r7, #12]
		if (rc != 1)
 8028294:	68fb      	ldr	r3, [r7, #12]
 8028296:	2b01      	cmp	r3, #1
 8028298:	d112      	bne.n	80282c0 <MQTTPacket_decode+0x6c>
			goto exit;
		*value += (c & 127) * multiplier;
 802829a:	683b      	ldr	r3, [r7, #0]
 802829c:	681a      	ldr	r2, [r3, #0]
 802829e:	7afb      	ldrb	r3, [r7, #11]
 80282a0:	f003 037f 	and.w	r3, r3, #127	@ 0x7f
 80282a4:	6979      	ldr	r1, [r7, #20]
 80282a6:	fb01 f303 	mul.w	r3, r1, r3
 80282aa:	441a      	add	r2, r3
 80282ac:	683b      	ldr	r3, [r7, #0]
 80282ae:	601a      	str	r2, [r3, #0]
		multiplier *= 128;
 80282b0:	697b      	ldr	r3, [r7, #20]
 80282b2:	01db      	lsls	r3, r3, #7
 80282b4:	617b      	str	r3, [r7, #20]
	} while ((c & 128) != 0);
 80282b6:	7afb      	ldrb	r3, [r7, #11]
 80282b8:	b25b      	sxtb	r3, r3
 80282ba:	2b00      	cmp	r3, #0
 80282bc:	dbd6      	blt.n	802826c <MQTTPacket_decode+0x18>
exit:
 80282be:	e000      	b.n	80282c2 <MQTTPacket_decode+0x6e>
			goto exit;
 80282c0:	bf00      	nop
	FUNC_EXIT_RC(len);
	return len;
 80282c2:	693b      	ldr	r3, [r7, #16]
}
 80282c4:	4618      	mov	r0, r3
 80282c6:	3718      	adds	r7, #24
 80282c8:	46bd      	mov	sp, r7
 80282ca:	bd80      	pop	{r7, pc}

080282cc <MQTTPacket_len>:


int MQTTPacket_len(int rem_len)
{
 80282cc:	b480      	push	{r7}
 80282ce:	b083      	sub	sp, #12
 80282d0:	af00      	add	r7, sp, #0
 80282d2:	6078      	str	r0, [r7, #4]
	rem_len += 1; /* header byte */
 80282d4:	687b      	ldr	r3, [r7, #4]
 80282d6:	3301      	adds	r3, #1
 80282d8:	607b      	str	r3, [r7, #4]

	/* now remaining_length field */
	if (rem_len < 128)
 80282da:	687b      	ldr	r3, [r7, #4]
 80282dc:	2b7f      	cmp	r3, #127	@ 0x7f
 80282de:	dc03      	bgt.n	80282e8 <MQTTPacket_len+0x1c>
		rem_len += 1;
 80282e0:	687b      	ldr	r3, [r7, #4]
 80282e2:	3301      	adds	r3, #1
 80282e4:	607b      	str	r3, [r7, #4]
 80282e6:	e012      	b.n	802830e <MQTTPacket_len+0x42>
	else if (rem_len < 16384)
 80282e8:	687b      	ldr	r3, [r7, #4]
 80282ea:	f5b3 4f80 	cmp.w	r3, #16384	@ 0x4000
 80282ee:	da03      	bge.n	80282f8 <MQTTPacket_len+0x2c>
		rem_len += 2;
 80282f0:	687b      	ldr	r3, [r7, #4]
 80282f2:	3302      	adds	r3, #2
 80282f4:	607b      	str	r3, [r7, #4]
 80282f6:	e00a      	b.n	802830e <MQTTPacket_len+0x42>
	else if (rem_len < 2097151)
 80282f8:	687b      	ldr	r3, [r7, #4]
 80282fa:	4a08      	ldr	r2, [pc, #32]	@ (802831c <MQTTPacket_len+0x50>)
 80282fc:	4293      	cmp	r3, r2
 80282fe:	dc03      	bgt.n	8028308 <MQTTPacket_len+0x3c>
		rem_len += 3;
 8028300:	687b      	ldr	r3, [r7, #4]
 8028302:	3303      	adds	r3, #3
 8028304:	607b      	str	r3, [r7, #4]
 8028306:	e002      	b.n	802830e <MQTTPacket_len+0x42>
	else
		rem_len += 4;
 8028308:	687b      	ldr	r3, [r7, #4]
 802830a:	3304      	adds	r3, #4
 802830c:	607b      	str	r3, [r7, #4]
	return rem_len;
 802830e:	687b      	ldr	r3, [r7, #4]
}
 8028310:	4618      	mov	r0, r3
 8028312:	370c      	adds	r7, #12
 8028314:	46bd      	mov	sp, r7
 8028316:	f85d 7b04 	ldr.w	r7, [sp], #4
 802831a:	4770      	bx	lr
 802831c:	001ffffe 	.word	0x001ffffe

08028320 <bufchar>:


static unsigned char* bufptr;

int bufchar(unsigned char* c, int count)
{
 8028320:	b480      	push	{r7}
 8028322:	b085      	sub	sp, #20
 8028324:	af00      	add	r7, sp, #0
 8028326:	6078      	str	r0, [r7, #4]
 8028328:	6039      	str	r1, [r7, #0]
	int i;

	for (i = 0; i < count; ++i)
 802832a:	2300      	movs	r3, #0
 802832c:	60fb      	str	r3, [r7, #12]
 802832e:	e00a      	b.n	8028346 <bufchar+0x26>
		*c = *bufptr++;
 8028330:	4b0a      	ldr	r3, [pc, #40]	@ (802835c <bufchar+0x3c>)
 8028332:	681b      	ldr	r3, [r3, #0]
 8028334:	1c5a      	adds	r2, r3, #1
 8028336:	4909      	ldr	r1, [pc, #36]	@ (802835c <bufchar+0x3c>)
 8028338:	600a      	str	r2, [r1, #0]
 802833a:	781a      	ldrb	r2, [r3, #0]
 802833c:	687b      	ldr	r3, [r7, #4]
 802833e:	701a      	strb	r2, [r3, #0]
	for (i = 0; i < count; ++i)
 8028340:	68fb      	ldr	r3, [r7, #12]
 8028342:	3301      	adds	r3, #1
 8028344:	60fb      	str	r3, [r7, #12]
 8028346:	68fa      	ldr	r2, [r7, #12]
 8028348:	683b      	ldr	r3, [r7, #0]
 802834a:	429a      	cmp	r2, r3
 802834c:	dbf0      	blt.n	8028330 <bufchar+0x10>
	return count;
 802834e:	683b      	ldr	r3, [r7, #0]
}
 8028350:	4618      	mov	r0, r3
 8028352:	3714      	adds	r7, #20
 8028354:	46bd      	mov	sp, r7
 8028356:	f85d 7b04 	ldr.w	r7, [sp], #4
 802835a:	4770      	bx	lr
 802835c:	2402b108 	.word	0x2402b108

08028360 <MQTTPacket_decodeBuf>:


int MQTTPacket_decodeBuf(unsigned char* buf, int* value)
{
 8028360:	b580      	push	{r7, lr}
 8028362:	b082      	sub	sp, #8
 8028364:	af00      	add	r7, sp, #0
 8028366:	6078      	str	r0, [r7, #4]
 8028368:	6039      	str	r1, [r7, #0]
	bufptr = buf;
 802836a:	4a06      	ldr	r2, [pc, #24]	@ (8028384 <MQTTPacket_decodeBuf+0x24>)
 802836c:	687b      	ldr	r3, [r7, #4]
 802836e:	6013      	str	r3, [r2, #0]
	return MQTTPacket_decode(bufchar, value);
 8028370:	6839      	ldr	r1, [r7, #0]
 8028372:	4805      	ldr	r0, [pc, #20]	@ (8028388 <MQTTPacket_decodeBuf+0x28>)
 8028374:	f7ff ff6e 	bl	8028254 <MQTTPacket_decode>
 8028378:	4603      	mov	r3, r0
}
 802837a:	4618      	mov	r0, r3
 802837c:	3708      	adds	r7, #8
 802837e:	46bd      	mov	sp, r7
 8028380:	bd80      	pop	{r7, pc}
 8028382:	bf00      	nop
 8028384:	2402b108 	.word	0x2402b108
 8028388:	08028321 	.word	0x08028321

0802838c <readInt>:
 * Calculates an integer from two bytes read from the input buffer
 * @param pptr pointer to the input buffer - incremented by the number of bytes used & returned
 * @return the integer value calculated
 */
int readInt(unsigned char** pptr)
{
 802838c:	b480      	push	{r7}
 802838e:	b085      	sub	sp, #20
 8028390:	af00      	add	r7, sp, #0
 8028392:	6078      	str	r0, [r7, #4]
	unsigned char* ptr = *pptr;
 8028394:	687b      	ldr	r3, [r7, #4]
 8028396:	681b      	ldr	r3, [r3, #0]
 8028398:	60fb      	str	r3, [r7, #12]
	int len = 256*(*ptr) + (*(ptr+1));
 802839a:	68fb      	ldr	r3, [r7, #12]
 802839c:	781b      	ldrb	r3, [r3, #0]
 802839e:	021b      	lsls	r3, r3, #8
 80283a0:	68fa      	ldr	r2, [r7, #12]
 80283a2:	3201      	adds	r2, #1
 80283a4:	7812      	ldrb	r2, [r2, #0]
 80283a6:	4413      	add	r3, r2
 80283a8:	60bb      	str	r3, [r7, #8]
	*pptr += 2;
 80283aa:	687b      	ldr	r3, [r7, #4]
 80283ac:	681b      	ldr	r3, [r3, #0]
 80283ae:	1c9a      	adds	r2, r3, #2
 80283b0:	687b      	ldr	r3, [r7, #4]
 80283b2:	601a      	str	r2, [r3, #0]
	return len;
 80283b4:	68bb      	ldr	r3, [r7, #8]
}
 80283b6:	4618      	mov	r0, r3
 80283b8:	3714      	adds	r7, #20
 80283ba:	46bd      	mov	sp, r7
 80283bc:	f85d 7b04 	ldr.w	r7, [sp], #4
 80283c0:	4770      	bx	lr

080283c2 <readChar>:
 * Reads one character from the input buffer.
 * @param pptr pointer to the input buffer - incremented by the number of bytes used & returned
 * @return the character read
 */
char readChar(unsigned char** pptr)
{
 80283c2:	b480      	push	{r7}
 80283c4:	b085      	sub	sp, #20
 80283c6:	af00      	add	r7, sp, #0
 80283c8:	6078      	str	r0, [r7, #4]
	char c = **pptr;
 80283ca:	687b      	ldr	r3, [r7, #4]
 80283cc:	681b      	ldr	r3, [r3, #0]
 80283ce:	781b      	ldrb	r3, [r3, #0]
 80283d0:	73fb      	strb	r3, [r7, #15]
	(*pptr)++;
 80283d2:	687b      	ldr	r3, [r7, #4]
 80283d4:	681b      	ldr	r3, [r3, #0]
 80283d6:	1c5a      	adds	r2, r3, #1
 80283d8:	687b      	ldr	r3, [r7, #4]
 80283da:	601a      	str	r2, [r3, #0]
	return c;
 80283dc:	7bfb      	ldrb	r3, [r7, #15]
}
 80283de:	4618      	mov	r0, r3
 80283e0:	3714      	adds	r7, #20
 80283e2:	46bd      	mov	sp, r7
 80283e4:	f85d 7b04 	ldr.w	r7, [sp], #4
 80283e8:	4770      	bx	lr

080283ea <writeChar>:
 * Writes one character to an output buffer.
 * @param pptr pointer to the output buffer - incremented by the number of bytes used & returned
 * @param c the character to write
 */
void writeChar(unsigned char** pptr, char c)
{
 80283ea:	b480      	push	{r7}
 80283ec:	b083      	sub	sp, #12
 80283ee:	af00      	add	r7, sp, #0
 80283f0:	6078      	str	r0, [r7, #4]
 80283f2:	460b      	mov	r3, r1
 80283f4:	70fb      	strb	r3, [r7, #3]
	**pptr = c;
 80283f6:	687b      	ldr	r3, [r7, #4]
 80283f8:	681b      	ldr	r3, [r3, #0]
 80283fa:	78fa      	ldrb	r2, [r7, #3]
 80283fc:	701a      	strb	r2, [r3, #0]
	(*pptr)++;
 80283fe:	687b      	ldr	r3, [r7, #4]
 8028400:	681b      	ldr	r3, [r3, #0]
 8028402:	1c5a      	adds	r2, r3, #1
 8028404:	687b      	ldr	r3, [r7, #4]
 8028406:	601a      	str	r2, [r3, #0]
}
 8028408:	bf00      	nop
 802840a:	370c      	adds	r7, #12
 802840c:	46bd      	mov	sp, r7
 802840e:	f85d 7b04 	ldr.w	r7, [sp], #4
 8028412:	4770      	bx	lr

08028414 <writeInt>:
 * Writes an integer as 2 bytes to an output buffer.
 * @param pptr pointer to the output buffer - incremented by the number of bytes used & returned
 * @param anInt the integer to write
 */
void writeInt(unsigned char** pptr, int anInt)
{
 8028414:	b480      	push	{r7}
 8028416:	b083      	sub	sp, #12
 8028418:	af00      	add	r7, sp, #0
 802841a:	6078      	str	r0, [r7, #4]
 802841c:	6039      	str	r1, [r7, #0]
	**pptr = (unsigned char)(anInt / 256);
 802841e:	683b      	ldr	r3, [r7, #0]
 8028420:	2b00      	cmp	r3, #0
 8028422:	da00      	bge.n	8028426 <writeInt+0x12>
 8028424:	33ff      	adds	r3, #255	@ 0xff
 8028426:	121b      	asrs	r3, r3, #8
 8028428:	461a      	mov	r2, r3
 802842a:	687b      	ldr	r3, [r7, #4]
 802842c:	681b      	ldr	r3, [r3, #0]
 802842e:	b2d2      	uxtb	r2, r2
 8028430:	701a      	strb	r2, [r3, #0]
	(*pptr)++;
 8028432:	687b      	ldr	r3, [r7, #4]
 8028434:	681b      	ldr	r3, [r3, #0]
 8028436:	1c5a      	adds	r2, r3, #1
 8028438:	687b      	ldr	r3, [r7, #4]
 802843a:	601a      	str	r2, [r3, #0]
	**pptr = (unsigned char)(anInt % 256);
 802843c:	683b      	ldr	r3, [r7, #0]
 802843e:	425a      	negs	r2, r3
 8028440:	b2db      	uxtb	r3, r3
 8028442:	b2d2      	uxtb	r2, r2
 8028444:	bf58      	it	pl
 8028446:	4253      	negpl	r3, r2
 8028448:	687a      	ldr	r2, [r7, #4]
 802844a:	6812      	ldr	r2, [r2, #0]
 802844c:	b2db      	uxtb	r3, r3
 802844e:	7013      	strb	r3, [r2, #0]
	(*pptr)++;
 8028450:	687b      	ldr	r3, [r7, #4]
 8028452:	681b      	ldr	r3, [r3, #0]
 8028454:	1c5a      	adds	r2, r3, #1
 8028456:	687b      	ldr	r3, [r7, #4]
 8028458:	601a      	str	r2, [r3, #0]
}
 802845a:	bf00      	nop
 802845c:	370c      	adds	r7, #12
 802845e:	46bd      	mov	sp, r7
 8028460:	f85d 7b04 	ldr.w	r7, [sp], #4
 8028464:	4770      	bx	lr

08028466 <writeCString>:
 * Writes a "UTF" string to an output buffer.  Converts C string to length-delimited.
 * @param pptr pointer to the output buffer - incremented by the number of bytes used & returned
 * @param string the C string to write
 */
void writeCString(unsigned char** pptr, const char* string)
{
 8028466:	b580      	push	{r7, lr}
 8028468:	b084      	sub	sp, #16
 802846a:	af00      	add	r7, sp, #0
 802846c:	6078      	str	r0, [r7, #4]
 802846e:	6039      	str	r1, [r7, #0]
	int len = strlen(string);
 8028470:	6838      	ldr	r0, [r7, #0]
 8028472:	f7d7 ff95 	bl	80003a0 <strlen>
 8028476:	4603      	mov	r3, r0
 8028478:	60fb      	str	r3, [r7, #12]
	writeInt(pptr, len);
 802847a:	68f9      	ldr	r1, [r7, #12]
 802847c:	6878      	ldr	r0, [r7, #4]
 802847e:	f7ff ffc9 	bl	8028414 <writeInt>
	memcpy(*pptr, string, len);
 8028482:	687b      	ldr	r3, [r7, #4]
 8028484:	681b      	ldr	r3, [r3, #0]
 8028486:	68fa      	ldr	r2, [r7, #12]
 8028488:	6839      	ldr	r1, [r7, #0]
 802848a:	4618      	mov	r0, r3
 802848c:	f002 f91f 	bl	802a6ce <memcpy>
	*pptr += len;
 8028490:	687b      	ldr	r3, [r7, #4]
 8028492:	681a      	ldr	r2, [r3, #0]
 8028494:	68fb      	ldr	r3, [r7, #12]
 8028496:	441a      	add	r2, r3
 8028498:	687b      	ldr	r3, [r7, #4]
 802849a:	601a      	str	r2, [r3, #0]
}
 802849c:	bf00      	nop
 802849e:	3710      	adds	r7, #16
 80284a0:	46bd      	mov	sp, r7
 80284a2:	bd80      	pop	{r7, pc}

080284a4 <writeMQTTString>:
	return len;
}


void writeMQTTString(unsigned char** pptr, MQTTString mqttstring)
{
 80284a4:	b580      	push	{r7, lr}
 80284a6:	b084      	sub	sp, #16
 80284a8:	af00      	add	r7, sp, #0
 80284aa:	60f8      	str	r0, [r7, #12]
 80284ac:	4638      	mov	r0, r7
 80284ae:	e880 000e 	stmia.w	r0, {r1, r2, r3}
	if (mqttstring.lenstring.len > 0)
 80284b2:	687b      	ldr	r3, [r7, #4]
 80284b4:	2b00      	cmp	r3, #0
 80284b6:	dd12      	ble.n	80284de <writeMQTTString+0x3a>
	{
		writeInt(pptr, mqttstring.lenstring.len);
 80284b8:	687b      	ldr	r3, [r7, #4]
 80284ba:	4619      	mov	r1, r3
 80284bc:	68f8      	ldr	r0, [r7, #12]
 80284be:	f7ff ffa9 	bl	8028414 <writeInt>
		memcpy(*pptr, mqttstring.lenstring.data, mqttstring.lenstring.len);
 80284c2:	68fb      	ldr	r3, [r7, #12]
 80284c4:	681b      	ldr	r3, [r3, #0]
 80284c6:	68b9      	ldr	r1, [r7, #8]
 80284c8:	687a      	ldr	r2, [r7, #4]
 80284ca:	4618      	mov	r0, r3
 80284cc:	f002 f8ff 	bl	802a6ce <memcpy>
		*pptr += mqttstring.lenstring.len;
 80284d0:	68fb      	ldr	r3, [r7, #12]
 80284d2:	681b      	ldr	r3, [r3, #0]
 80284d4:	687a      	ldr	r2, [r7, #4]
 80284d6:	441a      	add	r2, r3
 80284d8:	68fb      	ldr	r3, [r7, #12]
 80284da:	601a      	str	r2, [r3, #0]
	}
	else if (mqttstring.cstring)
		writeCString(pptr, mqttstring.cstring);
	else
		writeInt(pptr, 0);
}
 80284dc:	e00c      	b.n	80284f8 <writeMQTTString+0x54>
	else if (mqttstring.cstring)
 80284de:	683b      	ldr	r3, [r7, #0]
 80284e0:	2b00      	cmp	r3, #0
 80284e2:	d005      	beq.n	80284f0 <writeMQTTString+0x4c>
		writeCString(pptr, mqttstring.cstring);
 80284e4:	683b      	ldr	r3, [r7, #0]
 80284e6:	4619      	mov	r1, r3
 80284e8:	68f8      	ldr	r0, [r7, #12]
 80284ea:	f7ff ffbc 	bl	8028466 <writeCString>
}
 80284ee:	e003      	b.n	80284f8 <writeMQTTString+0x54>
		writeInt(pptr, 0);
 80284f0:	2100      	movs	r1, #0
 80284f2:	68f8      	ldr	r0, [r7, #12]
 80284f4:	f7ff ff8e 	bl	8028414 <writeInt>
}
 80284f8:	bf00      	nop
 80284fa:	3710      	adds	r7, #16
 80284fc:	46bd      	mov	sp, r7
 80284fe:	bd80      	pop	{r7, pc}

08028500 <readMQTTLenString>:
 * @param pptr pointer to the output buffer - incremented by the number of bytes used & returned
 * @param enddata pointer to the end of the data: do not read beyond
 * @return 1 if successful, 0 if not
 */
int readMQTTLenString(MQTTString* mqttstring, unsigned char** pptr, unsigned char* enddata)
{
 8028500:	b580      	push	{r7, lr}
 8028502:	b086      	sub	sp, #24
 8028504:	af00      	add	r7, sp, #0
 8028506:	60f8      	str	r0, [r7, #12]
 8028508:	60b9      	str	r1, [r7, #8]
 802850a:	607a      	str	r2, [r7, #4]
	int rc = 0;
 802850c:	2300      	movs	r3, #0
 802850e:	617b      	str	r3, [r7, #20]

	FUNC_ENTRY;
	/* the first two bytes are the length of the string */
	if (enddata - (*pptr) > 1) /* enough length to read the integer? */
 8028510:	68bb      	ldr	r3, [r7, #8]
 8028512:	681b      	ldr	r3, [r3, #0]
 8028514:	687a      	ldr	r2, [r7, #4]
 8028516:	1ad3      	subs	r3, r2, r3
 8028518:	2b01      	cmp	r3, #1
 802851a:	dd1a      	ble.n	8028552 <readMQTTLenString+0x52>
	{
		mqttstring->lenstring.len = readInt(pptr); /* increments pptr to point past length */
 802851c:	68b8      	ldr	r0, [r7, #8]
 802851e:	f7ff ff35 	bl	802838c <readInt>
 8028522:	4602      	mov	r2, r0
 8028524:	68fb      	ldr	r3, [r7, #12]
 8028526:	605a      	str	r2, [r3, #4]
		if (&(*pptr)[mqttstring->lenstring.len] <= enddata)
 8028528:	68bb      	ldr	r3, [r7, #8]
 802852a:	681b      	ldr	r3, [r3, #0]
 802852c:	68fa      	ldr	r2, [r7, #12]
 802852e:	6852      	ldr	r2, [r2, #4]
 8028530:	4413      	add	r3, r2
 8028532:	687a      	ldr	r2, [r7, #4]
 8028534:	429a      	cmp	r2, r3
 8028536:	d30c      	bcc.n	8028552 <readMQTTLenString+0x52>
		{
			mqttstring->lenstring.data = (char*)*pptr;
 8028538:	68bb      	ldr	r3, [r7, #8]
 802853a:	681a      	ldr	r2, [r3, #0]
 802853c:	68fb      	ldr	r3, [r7, #12]
 802853e:	609a      	str	r2, [r3, #8]
			*pptr += mqttstring->lenstring.len;
 8028540:	68bb      	ldr	r3, [r7, #8]
 8028542:	681b      	ldr	r3, [r3, #0]
 8028544:	68fa      	ldr	r2, [r7, #12]
 8028546:	6852      	ldr	r2, [r2, #4]
 8028548:	441a      	add	r2, r3
 802854a:	68bb      	ldr	r3, [r7, #8]
 802854c:	601a      	str	r2, [r3, #0]
			rc = 1;
 802854e:	2301      	movs	r3, #1
 8028550:	617b      	str	r3, [r7, #20]
		}
	}
	mqttstring->cstring = NULL;
 8028552:	68fb      	ldr	r3, [r7, #12]
 8028554:	2200      	movs	r2, #0
 8028556:	601a      	str	r2, [r3, #0]
	FUNC_EXIT_RC(rc);
	return rc;
 8028558:	697b      	ldr	r3, [r7, #20]
}
 802855a:	4618      	mov	r0, r3
 802855c:	3718      	adds	r7, #24
 802855e:	46bd      	mov	sp, r7
 8028560:	bd80      	pop	{r7, pc}

08028562 <MQTTstrlen>:
 * Return the length of the MQTTstring - C string if there is one, otherwise the length delimited string
 * @param mqttstring the string to return the length of
 * @return the length of the string
 */
int MQTTstrlen(MQTTString mqttstring)
{
 8028562:	b580      	push	{r7, lr}
 8028564:	b086      	sub	sp, #24
 8028566:	af00      	add	r7, sp, #0
 8028568:	1d3b      	adds	r3, r7, #4
 802856a:	e883 0007 	stmia.w	r3, {r0, r1, r2}
	int rc = 0;
 802856e:	2300      	movs	r3, #0
 8028570:	617b      	str	r3, [r7, #20]

	if (mqttstring.cstring)
 8028572:	687b      	ldr	r3, [r7, #4]
 8028574:	2b00      	cmp	r3, #0
 8028576:	d006      	beq.n	8028586 <MQTTstrlen+0x24>
		rc = strlen(mqttstring.cstring);
 8028578:	687b      	ldr	r3, [r7, #4]
 802857a:	4618      	mov	r0, r3
 802857c:	f7d7 ff10 	bl	80003a0 <strlen>
 8028580:	4603      	mov	r3, r0
 8028582:	617b      	str	r3, [r7, #20]
 8028584:	e001      	b.n	802858a <MQTTstrlen+0x28>
	else
		rc = mqttstring.lenstring.len;
 8028586:	68bb      	ldr	r3, [r7, #8]
 8028588:	617b      	str	r3, [r7, #20]
	return rc;
 802858a:	697b      	ldr	r3, [r7, #20]
}
 802858c:	4618      	mov	r0, r3
 802858e:	3718      	adds	r7, #24
 8028590:	46bd      	mov	sp, r7
 8028592:	bd80      	pop	{r7, pc}

08028594 <MQTTPacket_equals>:
 * @param a the MQTTString to compare
 * @param bptr the C string to compare
 * @return boolean - equal or not
 */
int MQTTPacket_equals(MQTTString* a, char* bptr)
{
 8028594:	b580      	push	{r7, lr}
 8028596:	b086      	sub	sp, #24
 8028598:	af00      	add	r7, sp, #0
 802859a:	6078      	str	r0, [r7, #4]
 802859c:	6039      	str	r1, [r7, #0]
	int alen = 0,
 802859e:	2300      	movs	r3, #0
 80285a0:	617b      	str	r3, [r7, #20]
		blen = 0;
 80285a2:	2300      	movs	r3, #0
 80285a4:	60fb      	str	r3, [r7, #12]
	char *aptr;
	
	if (a->cstring)
 80285a6:	687b      	ldr	r3, [r7, #4]
 80285a8:	681b      	ldr	r3, [r3, #0]
 80285aa:	2b00      	cmp	r3, #0
 80285ac:	d00a      	beq.n	80285c4 <MQTTPacket_equals+0x30>
	{
		aptr = a->cstring;
 80285ae:	687b      	ldr	r3, [r7, #4]
 80285b0:	681b      	ldr	r3, [r3, #0]
 80285b2:	613b      	str	r3, [r7, #16]
		alen = strlen(a->cstring);
 80285b4:	687b      	ldr	r3, [r7, #4]
 80285b6:	681b      	ldr	r3, [r3, #0]
 80285b8:	4618      	mov	r0, r3
 80285ba:	f7d7 fef1 	bl	80003a0 <strlen>
 80285be:	4603      	mov	r3, r0
 80285c0:	617b      	str	r3, [r7, #20]
 80285c2:	e005      	b.n	80285d0 <MQTTPacket_equals+0x3c>
	}
	else
	{
		aptr = a->lenstring.data;
 80285c4:	687b      	ldr	r3, [r7, #4]
 80285c6:	689b      	ldr	r3, [r3, #8]
 80285c8:	613b      	str	r3, [r7, #16]
		alen = a->lenstring.len;
 80285ca:	687b      	ldr	r3, [r7, #4]
 80285cc:	685b      	ldr	r3, [r3, #4]
 80285ce:	617b      	str	r3, [r7, #20]
	}
	blen = strlen(bptr);
 80285d0:	6838      	ldr	r0, [r7, #0]
 80285d2:	f7d7 fee5 	bl	80003a0 <strlen>
 80285d6:	4603      	mov	r3, r0
 80285d8:	60fb      	str	r3, [r7, #12]
	
	return (alen == blen) && (strncmp(aptr, bptr, alen) == 0);
 80285da:	697a      	ldr	r2, [r7, #20]
 80285dc:	68fb      	ldr	r3, [r7, #12]
 80285de:	429a      	cmp	r2, r3
 80285e0:	d10a      	bne.n	80285f8 <MQTTPacket_equals+0x64>
 80285e2:	697b      	ldr	r3, [r7, #20]
 80285e4:	461a      	mov	r2, r3
 80285e6:	6839      	ldr	r1, [r7, #0]
 80285e8:	6938      	ldr	r0, [r7, #16]
 80285ea:	f001 ff81 	bl	802a4f0 <strncmp>
 80285ee:	4603      	mov	r3, r0
 80285f0:	2b00      	cmp	r3, #0
 80285f2:	d101      	bne.n	80285f8 <MQTTPacket_equals+0x64>
 80285f4:	2301      	movs	r3, #1
 80285f6:	e000      	b.n	80285fa <MQTTPacket_equals+0x66>
 80285f8:	2300      	movs	r3, #0
}
 80285fa:	4618      	mov	r0, r3
 80285fc:	3718      	adds	r7, #24
 80285fe:	46bd      	mov	sp, r7
 8028600:	bd80      	pop	{r7, pc}

08028602 <MQTTSerialize_publishLength>:
  * @param topicName the topic name to be used in the publish  
  * @param payloadlen the length of the payload to be sent
  * @return the length of buffer needed to contain the serialized version of the packet
  */
int MQTTSerialize_publishLength(int qos, MQTTString topicName, int payloadlen)
{
 8028602:	b580      	push	{r7, lr}
 8028604:	b086      	sub	sp, #24
 8028606:	af00      	add	r7, sp, #0
 8028608:	60f8      	str	r0, [r7, #12]
 802860a:	4638      	mov	r0, r7
 802860c:	e880 000e 	stmia.w	r0, {r1, r2, r3}
	int len = 0;
 8028610:	2300      	movs	r3, #0
 8028612:	617b      	str	r3, [r7, #20]

	len += 2 + MQTTstrlen(topicName) + payloadlen;
 8028614:	463b      	mov	r3, r7
 8028616:	e893 0007 	ldmia.w	r3, {r0, r1, r2}
 802861a:	f7ff ffa2 	bl	8028562 <MQTTstrlen>
 802861e:	4603      	mov	r3, r0
 8028620:	1c9a      	adds	r2, r3, #2
 8028622:	6a3b      	ldr	r3, [r7, #32]
 8028624:	4413      	add	r3, r2
 8028626:	697a      	ldr	r2, [r7, #20]
 8028628:	4413      	add	r3, r2
 802862a:	617b      	str	r3, [r7, #20]
	if (qos > 0)
 802862c:	68fb      	ldr	r3, [r7, #12]
 802862e:	2b00      	cmp	r3, #0
 8028630:	dd02      	ble.n	8028638 <MQTTSerialize_publishLength+0x36>
		len += 2; /* packetid */
 8028632:	697b      	ldr	r3, [r7, #20]
 8028634:	3302      	adds	r3, #2
 8028636:	617b      	str	r3, [r7, #20]
	return len;
 8028638:	697b      	ldr	r3, [r7, #20]
}
 802863a:	4618      	mov	r0, r3
 802863c:	3718      	adds	r7, #24
 802863e:	46bd      	mov	sp, r7
 8028640:	bd80      	pop	{r7, pc}

08028642 <MQTTSerialize_publish>:
  * @param payloadlen integer - the length of the MQTT payload
  * @return the length of the serialized data.  <= 0 indicates error
  */
int MQTTSerialize_publish(unsigned char* buf, int buflen, unsigned char dup, int qos, unsigned char retained, unsigned short packetid,
		MQTTString topicName, unsigned char* payload, int payloadlen)
{
 8028642:	b580      	push	{r7, lr}
 8028644:	b08a      	sub	sp, #40	@ 0x28
 8028646:	af02      	add	r7, sp, #8
 8028648:	60f8      	str	r0, [r7, #12]
 802864a:	60b9      	str	r1, [r7, #8]
 802864c:	603b      	str	r3, [r7, #0]
 802864e:	4613      	mov	r3, r2
 8028650:	71fb      	strb	r3, [r7, #7]
	unsigned char *ptr = buf;
 8028652:	68fb      	ldr	r3, [r7, #12]
 8028654:	617b      	str	r3, [r7, #20]
	MQTTHeader header = {0};
 8028656:	2300      	movs	r3, #0
 8028658:	613b      	str	r3, [r7, #16]
	int rem_len = 0;
 802865a:	2300      	movs	r3, #0
 802865c:	61bb      	str	r3, [r7, #24]
	int rc = 0;
 802865e:	2300      	movs	r3, #0
 8028660:	61fb      	str	r3, [r7, #28]

	FUNC_ENTRY;
	if (MQTTPacket_len(rem_len = MQTTSerialize_publishLength(qos, topicName, payloadlen)) > buflen)
 8028662:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8028664:	9300      	str	r3, [sp, #0]
 8028666:	f107 0330 	add.w	r3, r7, #48	@ 0x30
 802866a:	cb0e      	ldmia	r3, {r1, r2, r3}
 802866c:	6838      	ldr	r0, [r7, #0]
 802866e:	f7ff ffc8 	bl	8028602 <MQTTSerialize_publishLength>
 8028672:	61b8      	str	r0, [r7, #24]
 8028674:	69b8      	ldr	r0, [r7, #24]
 8028676:	f7ff fe29 	bl	80282cc <MQTTPacket_len>
 802867a:	4602      	mov	r2, r0
 802867c:	68bb      	ldr	r3, [r7, #8]
 802867e:	4293      	cmp	r3, r2
 8028680:	da03      	bge.n	802868a <MQTTSerialize_publish+0x48>
	{
		rc = MQTTPACKET_BUFFER_TOO_SHORT;
 8028682:	f06f 0301 	mvn.w	r3, #1
 8028686:	61fb      	str	r3, [r7, #28]
		goto exit;
 8028688:	e04c      	b.n	8028724 <MQTTSerialize_publish+0xe2>
	}

	header.bits.type = PUBLISH;
 802868a:	7c3b      	ldrb	r3, [r7, #16]
 802868c:	2203      	movs	r2, #3
 802868e:	f362 1307 	bfi	r3, r2, #4, #4
 8028692:	743b      	strb	r3, [r7, #16]
	header.bits.dup = dup;
 8028694:	79fb      	ldrb	r3, [r7, #7]
 8028696:	f003 0301 	and.w	r3, r3, #1
 802869a:	b2da      	uxtb	r2, r3
 802869c:	7c3b      	ldrb	r3, [r7, #16]
 802869e:	f362 03c3 	bfi	r3, r2, #3, #1
 80286a2:	743b      	strb	r3, [r7, #16]
	header.bits.qos = qos;
 80286a4:	683b      	ldr	r3, [r7, #0]
 80286a6:	f003 0303 	and.w	r3, r3, #3
 80286aa:	b2da      	uxtb	r2, r3
 80286ac:	7c3b      	ldrb	r3, [r7, #16]
 80286ae:	f362 0342 	bfi	r3, r2, #1, #2
 80286b2:	743b      	strb	r3, [r7, #16]
	header.bits.retain = retained;
 80286b4:	f897 3028 	ldrb.w	r3, [r7, #40]	@ 0x28
 80286b8:	f003 0301 	and.w	r3, r3, #1
 80286bc:	b2da      	uxtb	r2, r3
 80286be:	7c3b      	ldrb	r3, [r7, #16]
 80286c0:	f362 0300 	bfi	r3, r2, #0, #1
 80286c4:	743b      	strb	r3, [r7, #16]
	writeChar(&ptr, header.byte); /* write header */
 80286c6:	7c3a      	ldrb	r2, [r7, #16]
 80286c8:	f107 0314 	add.w	r3, r7, #20
 80286cc:	4611      	mov	r1, r2
 80286ce:	4618      	mov	r0, r3
 80286d0:	f7ff fe8b 	bl	80283ea <writeChar>

	ptr += MQTTPacket_encode(ptr, rem_len); /* write remaining length */;
 80286d4:	697b      	ldr	r3, [r7, #20]
 80286d6:	69b9      	ldr	r1, [r7, #24]
 80286d8:	4618      	mov	r0, r3
 80286da:	f7ff fd8c 	bl	80281f6 <MQTTPacket_encode>
 80286de:	4602      	mov	r2, r0
 80286e0:	697b      	ldr	r3, [r7, #20]
 80286e2:	4413      	add	r3, r2
 80286e4:	617b      	str	r3, [r7, #20]

	writeMQTTString(&ptr, topicName);
 80286e6:	f107 0014 	add.w	r0, r7, #20
 80286ea:	f107 0330 	add.w	r3, r7, #48	@ 0x30
 80286ee:	cb0e      	ldmia	r3, {r1, r2, r3}
 80286f0:	f7ff fed8 	bl	80284a4 <writeMQTTString>

	if (qos > 0)
 80286f4:	683b      	ldr	r3, [r7, #0]
 80286f6:	2b00      	cmp	r3, #0
 80286f8:	dd06      	ble.n	8028708 <MQTTSerialize_publish+0xc6>
		writeInt(&ptr, packetid);
 80286fa:	8dba      	ldrh	r2, [r7, #44]	@ 0x2c
 80286fc:	f107 0314 	add.w	r3, r7, #20
 8028700:	4611      	mov	r1, r2
 8028702:	4618      	mov	r0, r3
 8028704:	f7ff fe86 	bl	8028414 <writeInt>

	memcpy(ptr, payload, payloadlen);
 8028708:	697b      	ldr	r3, [r7, #20]
 802870a:	6c3a      	ldr	r2, [r7, #64]	@ 0x40
 802870c:	6bf9      	ldr	r1, [r7, #60]	@ 0x3c
 802870e:	4618      	mov	r0, r3
 8028710:	f001 ffdd 	bl	802a6ce <memcpy>
	ptr += payloadlen;
 8028714:	697a      	ldr	r2, [r7, #20]
 8028716:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8028718:	4413      	add	r3, r2
 802871a:	617b      	str	r3, [r7, #20]

	rc = ptr - buf;
 802871c:	697a      	ldr	r2, [r7, #20]
 802871e:	68fb      	ldr	r3, [r7, #12]
 8028720:	1ad3      	subs	r3, r2, r3
 8028722:	61fb      	str	r3, [r7, #28]

exit:
	FUNC_EXIT_RC(rc);
	return rc;
 8028724:	69fb      	ldr	r3, [r7, #28]
}
 8028726:	4618      	mov	r0, r3
 8028728:	3720      	adds	r7, #32
 802872a:	46bd      	mov	sp, r7
 802872c:	bd80      	pop	{r7, pc}

0802872e <MQTTSerialize_ack>:
  * @param dup the MQTT dup flag
  * @param packetid the MQTT packet identifier
  * @return serialized length, or error if 0
  */
int MQTTSerialize_ack(unsigned char* buf, int buflen, unsigned char packettype, unsigned char dup, unsigned short packetid)
{
 802872e:	b580      	push	{r7, lr}
 8028730:	b088      	sub	sp, #32
 8028732:	af00      	add	r7, sp, #0
 8028734:	60f8      	str	r0, [r7, #12]
 8028736:	60b9      	str	r1, [r7, #8]
 8028738:	4611      	mov	r1, r2
 802873a:	461a      	mov	r2, r3
 802873c:	460b      	mov	r3, r1
 802873e:	71fb      	strb	r3, [r7, #7]
 8028740:	4613      	mov	r3, r2
 8028742:	71bb      	strb	r3, [r7, #6]
	MQTTHeader header = {0};
 8028744:	2300      	movs	r3, #0
 8028746:	61bb      	str	r3, [r7, #24]
	int rc = 0;
 8028748:	2300      	movs	r3, #0
 802874a:	61fb      	str	r3, [r7, #28]
	unsigned char *ptr = buf;
 802874c:	68fb      	ldr	r3, [r7, #12]
 802874e:	617b      	str	r3, [r7, #20]

	FUNC_ENTRY;
	if (buflen < 4)
 8028750:	68bb      	ldr	r3, [r7, #8]
 8028752:	2b03      	cmp	r3, #3
 8028754:	dc03      	bgt.n	802875e <MQTTSerialize_ack+0x30>
	{
		rc = MQTTPACKET_BUFFER_TOO_SHORT;
 8028756:	f06f 0301 	mvn.w	r3, #1
 802875a:	61fb      	str	r3, [r7, #28]
		goto exit;
 802875c:	e037      	b.n	80287ce <MQTTSerialize_ack+0xa0>
	}
	header.bits.type = packettype;
 802875e:	79fb      	ldrb	r3, [r7, #7]
 8028760:	f003 030f 	and.w	r3, r3, #15
 8028764:	b2da      	uxtb	r2, r3
 8028766:	7e3b      	ldrb	r3, [r7, #24]
 8028768:	f362 1307 	bfi	r3, r2, #4, #4
 802876c:	763b      	strb	r3, [r7, #24]
	header.bits.dup = dup;
 802876e:	79bb      	ldrb	r3, [r7, #6]
 8028770:	f003 0301 	and.w	r3, r3, #1
 8028774:	b2da      	uxtb	r2, r3
 8028776:	7e3b      	ldrb	r3, [r7, #24]
 8028778:	f362 03c3 	bfi	r3, r2, #3, #1
 802877c:	763b      	strb	r3, [r7, #24]
	header.bits.qos = (packettype == PUBREL) ? 1 : 0;
 802877e:	79fb      	ldrb	r3, [r7, #7]
 8028780:	2b06      	cmp	r3, #6
 8028782:	bf0c      	ite	eq
 8028784:	2301      	moveq	r3, #1
 8028786:	2300      	movne	r3, #0
 8028788:	b2db      	uxtb	r3, r3
 802878a:	f003 0303 	and.w	r3, r3, #3
 802878e:	b2da      	uxtb	r2, r3
 8028790:	7e3b      	ldrb	r3, [r7, #24]
 8028792:	f362 0342 	bfi	r3, r2, #1, #2
 8028796:	763b      	strb	r3, [r7, #24]
	writeChar(&ptr, header.byte); /* write header */
 8028798:	7e3a      	ldrb	r2, [r7, #24]
 802879a:	f107 0314 	add.w	r3, r7, #20
 802879e:	4611      	mov	r1, r2
 80287a0:	4618      	mov	r0, r3
 80287a2:	f7ff fe22 	bl	80283ea <writeChar>

	ptr += MQTTPacket_encode(ptr, 2); /* write remaining length */
 80287a6:	697b      	ldr	r3, [r7, #20]
 80287a8:	2102      	movs	r1, #2
 80287aa:	4618      	mov	r0, r3
 80287ac:	f7ff fd23 	bl	80281f6 <MQTTPacket_encode>
 80287b0:	4602      	mov	r2, r0
 80287b2:	697b      	ldr	r3, [r7, #20]
 80287b4:	4413      	add	r3, r2
 80287b6:	617b      	str	r3, [r7, #20]
	writeInt(&ptr, packetid);
 80287b8:	8d3a      	ldrh	r2, [r7, #40]	@ 0x28
 80287ba:	f107 0314 	add.w	r3, r7, #20
 80287be:	4611      	mov	r1, r2
 80287c0:	4618      	mov	r0, r3
 80287c2:	f7ff fe27 	bl	8028414 <writeInt>
	rc = ptr - buf;
 80287c6:	697a      	ldr	r2, [r7, #20]
 80287c8:	68fb      	ldr	r3, [r7, #12]
 80287ca:	1ad3      	subs	r3, r2, r3
 80287cc:	61fb      	str	r3, [r7, #28]
exit:
	FUNC_EXIT_RC(rc);
	return rc;
 80287ce:	69fb      	ldr	r3, [r7, #28]
}
 80287d0:	4618      	mov	r0, r3
 80287d2:	3720      	adds	r7, #32
 80287d4:	46bd      	mov	sp, r7
 80287d6:	bd80      	pop	{r7, pc}

080287d8 <MQTTSerialize_subscribeLength>:
  * @param count the number of topic filter strings in topicFilters
  * @param topicFilters the array of topic filter strings to be used in the publish
  * @return the length of buffer needed to contain the serialized version of the packet
  */
int MQTTSerialize_subscribeLength(int count, MQTTString topicFilters[])
{
 80287d8:	b580      	push	{r7, lr}
 80287da:	b084      	sub	sp, #16
 80287dc:	af00      	add	r7, sp, #0
 80287de:	6078      	str	r0, [r7, #4]
 80287e0:	6039      	str	r1, [r7, #0]
	int i;
	int len = 2; /* packetid */
 80287e2:	2302      	movs	r3, #2
 80287e4:	60bb      	str	r3, [r7, #8]

	for (i = 0; i < count; ++i)
 80287e6:	2300      	movs	r3, #0
 80287e8:	60fb      	str	r3, [r7, #12]
 80287ea:	e013      	b.n	8028814 <MQTTSerialize_subscribeLength+0x3c>
		len += 2 + MQTTstrlen(topicFilters[i]) + 1; /* length + topic + req_qos */
 80287ec:	68fa      	ldr	r2, [r7, #12]
 80287ee:	4613      	mov	r3, r2
 80287f0:	005b      	lsls	r3, r3, #1
 80287f2:	4413      	add	r3, r2
 80287f4:	009b      	lsls	r3, r3, #2
 80287f6:	461a      	mov	r2, r3
 80287f8:	683b      	ldr	r3, [r7, #0]
 80287fa:	4413      	add	r3, r2
 80287fc:	e893 0007 	ldmia.w	r3, {r0, r1, r2}
 8028800:	f7ff feaf 	bl	8028562 <MQTTstrlen>
 8028804:	4603      	mov	r3, r0
 8028806:	3303      	adds	r3, #3
 8028808:	68ba      	ldr	r2, [r7, #8]
 802880a:	4413      	add	r3, r2
 802880c:	60bb      	str	r3, [r7, #8]
	for (i = 0; i < count; ++i)
 802880e:	68fb      	ldr	r3, [r7, #12]
 8028810:	3301      	adds	r3, #1
 8028812:	60fb      	str	r3, [r7, #12]
 8028814:	68fa      	ldr	r2, [r7, #12]
 8028816:	687b      	ldr	r3, [r7, #4]
 8028818:	429a      	cmp	r2, r3
 802881a:	dbe7      	blt.n	80287ec <MQTTSerialize_subscribeLength+0x14>
	return len;
 802881c:	68bb      	ldr	r3, [r7, #8]
}
 802881e:	4618      	mov	r0, r3
 8028820:	3710      	adds	r7, #16
 8028822:	46bd      	mov	sp, r7
 8028824:	bd80      	pop	{r7, pc}

08028826 <MQTTSerialize_subscribe>:
  * @param requestedQoSs - array of requested QoS
  * @return the length of the serialized data.  <= 0 indicates error
  */
int MQTTSerialize_subscribe(unsigned char* buf, int buflen, unsigned char dup, unsigned short packetid, int count,
		MQTTString topicFilters[], int requestedQoSs[])
{
 8028826:	b580      	push	{r7, lr}
 8028828:	b08a      	sub	sp, #40	@ 0x28
 802882a:	af00      	add	r7, sp, #0
 802882c:	60f8      	str	r0, [r7, #12]
 802882e:	60b9      	str	r1, [r7, #8]
 8028830:	4611      	mov	r1, r2
 8028832:	461a      	mov	r2, r3
 8028834:	460b      	mov	r3, r1
 8028836:	71fb      	strb	r3, [r7, #7]
 8028838:	4613      	mov	r3, r2
 802883a:	80bb      	strh	r3, [r7, #4]
	unsigned char *ptr = buf;
 802883c:	68fb      	ldr	r3, [r7, #12]
 802883e:	61bb      	str	r3, [r7, #24]
	MQTTHeader header = {0};
 8028840:	2300      	movs	r3, #0
 8028842:	617b      	str	r3, [r7, #20]
	int rem_len = 0;
 8028844:	2300      	movs	r3, #0
 8028846:	61fb      	str	r3, [r7, #28]
	int rc = 0;
 8028848:	2300      	movs	r3, #0
 802884a:	627b      	str	r3, [r7, #36]	@ 0x24
	int i = 0;
 802884c:	2300      	movs	r3, #0
 802884e:	623b      	str	r3, [r7, #32]

	FUNC_ENTRY;
	if (MQTTPacket_len(rem_len = MQTTSerialize_subscribeLength(count, topicFilters)) > buflen)
 8028850:	6b79      	ldr	r1, [r7, #52]	@ 0x34
 8028852:	6b38      	ldr	r0, [r7, #48]	@ 0x30
 8028854:	f7ff ffc0 	bl	80287d8 <MQTTSerialize_subscribeLength>
 8028858:	61f8      	str	r0, [r7, #28]
 802885a:	69f8      	ldr	r0, [r7, #28]
 802885c:	f7ff fd36 	bl	80282cc <MQTTPacket_len>
 8028860:	4602      	mov	r2, r0
 8028862:	68bb      	ldr	r3, [r7, #8]
 8028864:	4293      	cmp	r3, r2
 8028866:	da03      	bge.n	8028870 <MQTTSerialize_subscribe+0x4a>
	{
		rc = MQTTPACKET_BUFFER_TOO_SHORT;
 8028868:	f06f 0301 	mvn.w	r3, #1
 802886c:	627b      	str	r3, [r7, #36]	@ 0x24
		goto exit;
 802886e:	e051      	b.n	8028914 <MQTTSerialize_subscribe+0xee>
	}

	header.byte = 0;
 8028870:	2300      	movs	r3, #0
 8028872:	753b      	strb	r3, [r7, #20]
	header.bits.type = SUBSCRIBE;
 8028874:	7d3b      	ldrb	r3, [r7, #20]
 8028876:	2208      	movs	r2, #8
 8028878:	f362 1307 	bfi	r3, r2, #4, #4
 802887c:	753b      	strb	r3, [r7, #20]
	header.bits.dup = dup;
 802887e:	79fb      	ldrb	r3, [r7, #7]
 8028880:	f003 0301 	and.w	r3, r3, #1
 8028884:	b2da      	uxtb	r2, r3
 8028886:	7d3b      	ldrb	r3, [r7, #20]
 8028888:	f362 03c3 	bfi	r3, r2, #3, #1
 802888c:	753b      	strb	r3, [r7, #20]
	header.bits.qos = 1;
 802888e:	7d3b      	ldrb	r3, [r7, #20]
 8028890:	2201      	movs	r2, #1
 8028892:	f362 0342 	bfi	r3, r2, #1, #2
 8028896:	753b      	strb	r3, [r7, #20]
	writeChar(&ptr, header.byte); /* write header */
 8028898:	7d3a      	ldrb	r2, [r7, #20]
 802889a:	f107 0318 	add.w	r3, r7, #24
 802889e:	4611      	mov	r1, r2
 80288a0:	4618      	mov	r0, r3
 80288a2:	f7ff fda2 	bl	80283ea <writeChar>

	ptr += MQTTPacket_encode(ptr, rem_len); /* write remaining length */;
 80288a6:	69bb      	ldr	r3, [r7, #24]
 80288a8:	69f9      	ldr	r1, [r7, #28]
 80288aa:	4618      	mov	r0, r3
 80288ac:	f7ff fca3 	bl	80281f6 <MQTTPacket_encode>
 80288b0:	4602      	mov	r2, r0
 80288b2:	69bb      	ldr	r3, [r7, #24]
 80288b4:	4413      	add	r3, r2
 80288b6:	61bb      	str	r3, [r7, #24]

	writeInt(&ptr, packetid);
 80288b8:	88ba      	ldrh	r2, [r7, #4]
 80288ba:	f107 0318 	add.w	r3, r7, #24
 80288be:	4611      	mov	r1, r2
 80288c0:	4618      	mov	r0, r3
 80288c2:	f7ff fda7 	bl	8028414 <writeInt>

	for (i = 0; i < count; ++i)
 80288c6:	2300      	movs	r3, #0
 80288c8:	623b      	str	r3, [r7, #32]
 80288ca:	e01b      	b.n	8028904 <MQTTSerialize_subscribe+0xde>
	{
		writeMQTTString(&ptr, topicFilters[i]);
 80288cc:	6a3a      	ldr	r2, [r7, #32]
 80288ce:	4613      	mov	r3, r2
 80288d0:	005b      	lsls	r3, r3, #1
 80288d2:	4413      	add	r3, r2
 80288d4:	009b      	lsls	r3, r3, #2
 80288d6:	461a      	mov	r2, r3
 80288d8:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 80288da:	4413      	add	r3, r2
 80288dc:	f107 0018 	add.w	r0, r7, #24
 80288e0:	cb0e      	ldmia	r3, {r1, r2, r3}
 80288e2:	f7ff fddf 	bl	80284a4 <writeMQTTString>
		writeChar(&ptr, requestedQoSs[i]);
 80288e6:	6a3b      	ldr	r3, [r7, #32]
 80288e8:	009b      	lsls	r3, r3, #2
 80288ea:	6bba      	ldr	r2, [r7, #56]	@ 0x38
 80288ec:	4413      	add	r3, r2
 80288ee:	681b      	ldr	r3, [r3, #0]
 80288f0:	b2da      	uxtb	r2, r3
 80288f2:	f107 0318 	add.w	r3, r7, #24
 80288f6:	4611      	mov	r1, r2
 80288f8:	4618      	mov	r0, r3
 80288fa:	f7ff fd76 	bl	80283ea <writeChar>
	for (i = 0; i < count; ++i)
 80288fe:	6a3b      	ldr	r3, [r7, #32]
 8028900:	3301      	adds	r3, #1
 8028902:	623b      	str	r3, [r7, #32]
 8028904:	6a3a      	ldr	r2, [r7, #32]
 8028906:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8028908:	429a      	cmp	r2, r3
 802890a:	dbdf      	blt.n	80288cc <MQTTSerialize_subscribe+0xa6>
	}

	rc = ptr - buf;
 802890c:	69ba      	ldr	r2, [r7, #24]
 802890e:	68fb      	ldr	r3, [r7, #12]
 8028910:	1ad3      	subs	r3, r2, r3
 8028912:	627b      	str	r3, [r7, #36]	@ 0x24
exit:
	FUNC_EXIT_RC(rc);
	return rc;
 8028914:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
}
 8028916:	4618      	mov	r0, r3
 8028918:	3728      	adds	r7, #40	@ 0x28
 802891a:	46bd      	mov	sp, r7
 802891c:	bd80      	pop	{r7, pc}

0802891e <MQTTDeserialize_suback>:
  * @param buf the raw buffer data, of the correct length determined by the remaining length field
  * @param buflen the length in bytes of the data in the supplied buffer
  * @return error code.  1 is success, 0 is failure
  */
int MQTTDeserialize_suback(unsigned short* packetid, int maxcount, int* count, int grantedQoSs[], unsigned char* buf, int buflen)
{
 802891e:	b580      	push	{r7, lr}
 8028920:	b08a      	sub	sp, #40	@ 0x28
 8028922:	af00      	add	r7, sp, #0
 8028924:	60f8      	str	r0, [r7, #12]
 8028926:	60b9      	str	r1, [r7, #8]
 8028928:	607a      	str	r2, [r7, #4]
 802892a:	603b      	str	r3, [r7, #0]
	MQTTHeader header = {0};
 802892c:	2300      	movs	r3, #0
 802892e:	61fb      	str	r3, [r7, #28]
	unsigned char* curdata = buf;
 8028930:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8028932:	61bb      	str	r3, [r7, #24]
	unsigned char* enddata = NULL;
 8028934:	2300      	movs	r3, #0
 8028936:	623b      	str	r3, [r7, #32]
	int rc = 0;
 8028938:	2300      	movs	r3, #0
 802893a:	627b      	str	r3, [r7, #36]	@ 0x24
	int mylen;

	FUNC_ENTRY;
	header.byte = readChar(&curdata);
 802893c:	f107 0318 	add.w	r3, r7, #24
 8028940:	4618      	mov	r0, r3
 8028942:	f7ff fd3e 	bl	80283c2 <readChar>
 8028946:	4603      	mov	r3, r0
 8028948:	773b      	strb	r3, [r7, #28]
	if (header.bits.type != SUBACK)
 802894a:	7f3b      	ldrb	r3, [r7, #28]
 802894c:	f023 030f 	bic.w	r3, r3, #15
 8028950:	b2db      	uxtb	r3, r3
 8028952:	2b90      	cmp	r3, #144	@ 0x90
 8028954:	d142      	bne.n	80289dc <MQTTDeserialize_suback+0xbe>
		goto exit;

	curdata += (rc = MQTTPacket_decodeBuf(curdata, &mylen)); /* read remaining length */
 8028956:	69bb      	ldr	r3, [r7, #24]
 8028958:	f107 0214 	add.w	r2, r7, #20
 802895c:	4611      	mov	r1, r2
 802895e:	4618      	mov	r0, r3
 8028960:	f7ff fcfe 	bl	8028360 <MQTTPacket_decodeBuf>
 8028964:	6278      	str	r0, [r7, #36]	@ 0x24
 8028966:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8028968:	69bb      	ldr	r3, [r7, #24]
 802896a:	4413      	add	r3, r2
 802896c:	61bb      	str	r3, [r7, #24]
	enddata = curdata + mylen;
 802896e:	69bb      	ldr	r3, [r7, #24]
 8028970:	697a      	ldr	r2, [r7, #20]
 8028972:	4413      	add	r3, r2
 8028974:	623b      	str	r3, [r7, #32]
	if (enddata - curdata < 2)
 8028976:	69bb      	ldr	r3, [r7, #24]
 8028978:	6a3a      	ldr	r2, [r7, #32]
 802897a:	1ad3      	subs	r3, r2, r3
 802897c:	2b01      	cmp	r3, #1
 802897e:	dd2f      	ble.n	80289e0 <MQTTDeserialize_suback+0xc2>
		goto exit;

	*packetid = readInt(&curdata);
 8028980:	f107 0318 	add.w	r3, r7, #24
 8028984:	4618      	mov	r0, r3
 8028986:	f7ff fd01 	bl	802838c <readInt>
 802898a:	4603      	mov	r3, r0
 802898c:	b29a      	uxth	r2, r3
 802898e:	68fb      	ldr	r3, [r7, #12]
 8028990:	801a      	strh	r2, [r3, #0]

	*count = 0;
 8028992:	687b      	ldr	r3, [r7, #4]
 8028994:	2200      	movs	r2, #0
 8028996:	601a      	str	r2, [r3, #0]
	while (curdata < enddata)
 8028998:	e019      	b.n	80289ce <MQTTDeserialize_suback+0xb0>
	{
		if (*count > maxcount)
 802899a:	687b      	ldr	r3, [r7, #4]
 802899c:	681b      	ldr	r3, [r3, #0]
 802899e:	68ba      	ldr	r2, [r7, #8]
 80289a0:	429a      	cmp	r2, r3
 80289a2:	da03      	bge.n	80289ac <MQTTDeserialize_suback+0x8e>
		{
			rc = -1;
 80289a4:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80289a8:	627b      	str	r3, [r7, #36]	@ 0x24
			goto exit;
 80289aa:	e01a      	b.n	80289e2 <MQTTDeserialize_suback+0xc4>
		}
		grantedQoSs[(*count)++] = readChar(&curdata);
 80289ac:	f107 0318 	add.w	r3, r7, #24
 80289b0:	4618      	mov	r0, r3
 80289b2:	f7ff fd06 	bl	80283c2 <readChar>
 80289b6:	4603      	mov	r3, r0
 80289b8:	4618      	mov	r0, r3
 80289ba:	687b      	ldr	r3, [r7, #4]
 80289bc:	681b      	ldr	r3, [r3, #0]
 80289be:	1c59      	adds	r1, r3, #1
 80289c0:	687a      	ldr	r2, [r7, #4]
 80289c2:	6011      	str	r1, [r2, #0]
 80289c4:	009b      	lsls	r3, r3, #2
 80289c6:	683a      	ldr	r2, [r7, #0]
 80289c8:	4413      	add	r3, r2
 80289ca:	4602      	mov	r2, r0
 80289cc:	601a      	str	r2, [r3, #0]
	while (curdata < enddata)
 80289ce:	69bb      	ldr	r3, [r7, #24]
 80289d0:	6a3a      	ldr	r2, [r7, #32]
 80289d2:	429a      	cmp	r2, r3
 80289d4:	d8e1      	bhi.n	802899a <MQTTDeserialize_suback+0x7c>
	}

	rc = 1;
 80289d6:	2301      	movs	r3, #1
 80289d8:	627b      	str	r3, [r7, #36]	@ 0x24
 80289da:	e002      	b.n	80289e2 <MQTTDeserialize_suback+0xc4>
		goto exit;
 80289dc:	bf00      	nop
 80289de:	e000      	b.n	80289e2 <MQTTDeserialize_suback+0xc4>
		goto exit;
 80289e0:	bf00      	nop
exit:
	FUNC_EXIT_RC(rc);
	return rc;
 80289e2:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
}
 80289e4:	4618      	mov	r0, r3
 80289e6:	3728      	adds	r7, #40	@ 0x28
 80289e8:	46bd      	mov	sp, r7
 80289ea:	bd80      	pop	{r7, pc}

080289ec <malloc>:
 80289ec:	4b02      	ldr	r3, [pc, #8]	@ (80289f8 <malloc+0xc>)
 80289ee:	4601      	mov	r1, r0
 80289f0:	6818      	ldr	r0, [r3, #0]
 80289f2:	f000 b82d 	b.w	8028a50 <_malloc_r>
 80289f6:	bf00      	nop
 80289f8:	240001d4 	.word	0x240001d4

080289fc <free>:
 80289fc:	4b02      	ldr	r3, [pc, #8]	@ (8028a08 <free+0xc>)
 80289fe:	4601      	mov	r1, r0
 8028a00:	6818      	ldr	r0, [r3, #0]
 8028a02:	f002 bc7b 	b.w	802b2fc <_free_r>
 8028a06:	bf00      	nop
 8028a08:	240001d4 	.word	0x240001d4

08028a0c <sbrk_aligned>:
 8028a0c:	b570      	push	{r4, r5, r6, lr}
 8028a0e:	4e0f      	ldr	r6, [pc, #60]	@ (8028a4c <sbrk_aligned+0x40>)
 8028a10:	460c      	mov	r4, r1
 8028a12:	6831      	ldr	r1, [r6, #0]
 8028a14:	4605      	mov	r5, r0
 8028a16:	b911      	cbnz	r1, 8028a1e <sbrk_aligned+0x12>
 8028a18:	f001 fe0a 	bl	802a630 <_sbrk_r>
 8028a1c:	6030      	str	r0, [r6, #0]
 8028a1e:	4621      	mov	r1, r4
 8028a20:	4628      	mov	r0, r5
 8028a22:	f001 fe05 	bl	802a630 <_sbrk_r>
 8028a26:	1c43      	adds	r3, r0, #1
 8028a28:	d103      	bne.n	8028a32 <sbrk_aligned+0x26>
 8028a2a:	f04f 34ff 	mov.w	r4, #4294967295	@ 0xffffffff
 8028a2e:	4620      	mov	r0, r4
 8028a30:	bd70      	pop	{r4, r5, r6, pc}
 8028a32:	1cc4      	adds	r4, r0, #3
 8028a34:	f024 0403 	bic.w	r4, r4, #3
 8028a38:	42a0      	cmp	r0, r4
 8028a3a:	d0f8      	beq.n	8028a2e <sbrk_aligned+0x22>
 8028a3c:	1a21      	subs	r1, r4, r0
 8028a3e:	4628      	mov	r0, r5
 8028a40:	f001 fdf6 	bl	802a630 <_sbrk_r>
 8028a44:	3001      	adds	r0, #1
 8028a46:	d1f2      	bne.n	8028a2e <sbrk_aligned+0x22>
 8028a48:	e7ef      	b.n	8028a2a <sbrk_aligned+0x1e>
 8028a4a:	bf00      	nop
 8028a4c:	2402b10c 	.word	0x2402b10c

08028a50 <_malloc_r>:
 8028a50:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
 8028a54:	1ccd      	adds	r5, r1, #3
 8028a56:	f025 0503 	bic.w	r5, r5, #3
 8028a5a:	3508      	adds	r5, #8
 8028a5c:	2d0c      	cmp	r5, #12
 8028a5e:	bf38      	it	cc
 8028a60:	250c      	movcc	r5, #12
 8028a62:	2d00      	cmp	r5, #0
 8028a64:	4606      	mov	r6, r0
 8028a66:	db01      	blt.n	8028a6c <_malloc_r+0x1c>
 8028a68:	42a9      	cmp	r1, r5
 8028a6a:	d904      	bls.n	8028a76 <_malloc_r+0x26>
 8028a6c:	230c      	movs	r3, #12
 8028a6e:	6033      	str	r3, [r6, #0]
 8028a70:	2000      	movs	r0, #0
 8028a72:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
 8028a76:	f8df 80d4 	ldr.w	r8, [pc, #212]	@ 8028b4c <_malloc_r+0xfc>
 8028a7a:	f000 f869 	bl	8028b50 <__malloc_lock>
 8028a7e:	f8d8 3000 	ldr.w	r3, [r8]
 8028a82:	461c      	mov	r4, r3
 8028a84:	bb44      	cbnz	r4, 8028ad8 <_malloc_r+0x88>
 8028a86:	4629      	mov	r1, r5
 8028a88:	4630      	mov	r0, r6
 8028a8a:	f7ff ffbf 	bl	8028a0c <sbrk_aligned>
 8028a8e:	1c43      	adds	r3, r0, #1
 8028a90:	4604      	mov	r4, r0
 8028a92:	d158      	bne.n	8028b46 <_malloc_r+0xf6>
 8028a94:	f8d8 4000 	ldr.w	r4, [r8]
 8028a98:	4627      	mov	r7, r4
 8028a9a:	2f00      	cmp	r7, #0
 8028a9c:	d143      	bne.n	8028b26 <_malloc_r+0xd6>
 8028a9e:	2c00      	cmp	r4, #0
 8028aa0:	d04b      	beq.n	8028b3a <_malloc_r+0xea>
 8028aa2:	6823      	ldr	r3, [r4, #0]
 8028aa4:	4639      	mov	r1, r7
 8028aa6:	4630      	mov	r0, r6
 8028aa8:	eb04 0903 	add.w	r9, r4, r3
 8028aac:	f001 fdc0 	bl	802a630 <_sbrk_r>
 8028ab0:	4581      	cmp	r9, r0
 8028ab2:	d142      	bne.n	8028b3a <_malloc_r+0xea>
 8028ab4:	6821      	ldr	r1, [r4, #0]
 8028ab6:	1a6d      	subs	r5, r5, r1
 8028ab8:	4629      	mov	r1, r5
 8028aba:	4630      	mov	r0, r6
 8028abc:	f7ff ffa6 	bl	8028a0c <sbrk_aligned>
 8028ac0:	3001      	adds	r0, #1
 8028ac2:	d03a      	beq.n	8028b3a <_malloc_r+0xea>
 8028ac4:	6823      	ldr	r3, [r4, #0]
 8028ac6:	442b      	add	r3, r5
 8028ac8:	6023      	str	r3, [r4, #0]
 8028aca:	f8d8 3000 	ldr.w	r3, [r8]
 8028ace:	685a      	ldr	r2, [r3, #4]
 8028ad0:	bb62      	cbnz	r2, 8028b2c <_malloc_r+0xdc>
 8028ad2:	f8c8 7000 	str.w	r7, [r8]
 8028ad6:	e00f      	b.n	8028af8 <_malloc_r+0xa8>
 8028ad8:	6822      	ldr	r2, [r4, #0]
 8028ada:	1b52      	subs	r2, r2, r5
 8028adc:	d420      	bmi.n	8028b20 <_malloc_r+0xd0>
 8028ade:	2a0b      	cmp	r2, #11
 8028ae0:	d917      	bls.n	8028b12 <_malloc_r+0xc2>
 8028ae2:	1961      	adds	r1, r4, r5
 8028ae4:	42a3      	cmp	r3, r4
 8028ae6:	6025      	str	r5, [r4, #0]
 8028ae8:	bf18      	it	ne
 8028aea:	6059      	strne	r1, [r3, #4]
 8028aec:	6863      	ldr	r3, [r4, #4]
 8028aee:	bf08      	it	eq
 8028af0:	f8c8 1000 	streq.w	r1, [r8]
 8028af4:	5162      	str	r2, [r4, r5]
 8028af6:	604b      	str	r3, [r1, #4]
 8028af8:	4630      	mov	r0, r6
 8028afa:	f000 f82f 	bl	8028b5c <__malloc_unlock>
 8028afe:	f104 000b 	add.w	r0, r4, #11
 8028b02:	1d23      	adds	r3, r4, #4
 8028b04:	f020 0007 	bic.w	r0, r0, #7
 8028b08:	1ac2      	subs	r2, r0, r3
 8028b0a:	bf1c      	itt	ne
 8028b0c:	1a1b      	subne	r3, r3, r0
 8028b0e:	50a3      	strne	r3, [r4, r2]
 8028b10:	e7af      	b.n	8028a72 <_malloc_r+0x22>
 8028b12:	6862      	ldr	r2, [r4, #4]
 8028b14:	42a3      	cmp	r3, r4
 8028b16:	bf0c      	ite	eq
 8028b18:	f8c8 2000 	streq.w	r2, [r8]
 8028b1c:	605a      	strne	r2, [r3, #4]
 8028b1e:	e7eb      	b.n	8028af8 <_malloc_r+0xa8>
 8028b20:	4623      	mov	r3, r4
 8028b22:	6864      	ldr	r4, [r4, #4]
 8028b24:	e7ae      	b.n	8028a84 <_malloc_r+0x34>
 8028b26:	463c      	mov	r4, r7
 8028b28:	687f      	ldr	r7, [r7, #4]
 8028b2a:	e7b6      	b.n	8028a9a <_malloc_r+0x4a>
 8028b2c:	461a      	mov	r2, r3
 8028b2e:	685b      	ldr	r3, [r3, #4]
 8028b30:	42a3      	cmp	r3, r4
 8028b32:	d1fb      	bne.n	8028b2c <_malloc_r+0xdc>
 8028b34:	2300      	movs	r3, #0
 8028b36:	6053      	str	r3, [r2, #4]
 8028b38:	e7de      	b.n	8028af8 <_malloc_r+0xa8>
 8028b3a:	230c      	movs	r3, #12
 8028b3c:	6033      	str	r3, [r6, #0]
 8028b3e:	4630      	mov	r0, r6
 8028b40:	f000 f80c 	bl	8028b5c <__malloc_unlock>
 8028b44:	e794      	b.n	8028a70 <_malloc_r+0x20>
 8028b46:	6005      	str	r5, [r0, #0]
 8028b48:	e7d6      	b.n	8028af8 <_malloc_r+0xa8>
 8028b4a:	bf00      	nop
 8028b4c:	2402b110 	.word	0x2402b110

08028b50 <__malloc_lock>:
 8028b50:	4801      	ldr	r0, [pc, #4]	@ (8028b58 <__malloc_lock+0x8>)
 8028b52:	f001 bdba 	b.w	802a6ca <__retarget_lock_acquire_recursive>
 8028b56:	bf00      	nop
 8028b58:	2402b254 	.word	0x2402b254

08028b5c <__malloc_unlock>:
 8028b5c:	4801      	ldr	r0, [pc, #4]	@ (8028b64 <__malloc_unlock+0x8>)
 8028b5e:	f001 bdb5 	b.w	802a6cc <__retarget_lock_release_recursive>
 8028b62:	bf00      	nop
 8028b64:	2402b254 	.word	0x2402b254

08028b68 <rand>:
 8028b68:	4b16      	ldr	r3, [pc, #88]	@ (8028bc4 <rand+0x5c>)
 8028b6a:	b510      	push	{r4, lr}
 8028b6c:	681c      	ldr	r4, [r3, #0]
 8028b6e:	6b23      	ldr	r3, [r4, #48]	@ 0x30
 8028b70:	b9b3      	cbnz	r3, 8028ba0 <rand+0x38>
 8028b72:	2018      	movs	r0, #24
 8028b74:	f7ff ff3a 	bl	80289ec <malloc>
 8028b78:	4602      	mov	r2, r0
 8028b7a:	6320      	str	r0, [r4, #48]	@ 0x30
 8028b7c:	b920      	cbnz	r0, 8028b88 <rand+0x20>
 8028b7e:	4b12      	ldr	r3, [pc, #72]	@ (8028bc8 <rand+0x60>)
 8028b80:	4812      	ldr	r0, [pc, #72]	@ (8028bcc <rand+0x64>)
 8028b82:	2152      	movs	r1, #82	@ 0x52
 8028b84:	f001 fdbc 	bl	802a700 <__assert_func>
 8028b88:	4911      	ldr	r1, [pc, #68]	@ (8028bd0 <rand+0x68>)
 8028b8a:	4b12      	ldr	r3, [pc, #72]	@ (8028bd4 <rand+0x6c>)
 8028b8c:	e9c0 1300 	strd	r1, r3, [r0]
 8028b90:	4b11      	ldr	r3, [pc, #68]	@ (8028bd8 <rand+0x70>)
 8028b92:	6083      	str	r3, [r0, #8]
 8028b94:	230b      	movs	r3, #11
 8028b96:	8183      	strh	r3, [r0, #12]
 8028b98:	2100      	movs	r1, #0
 8028b9a:	2001      	movs	r0, #1
 8028b9c:	e9c2 0104 	strd	r0, r1, [r2, #16]
 8028ba0:	6b21      	ldr	r1, [r4, #48]	@ 0x30
 8028ba2:	480e      	ldr	r0, [pc, #56]	@ (8028bdc <rand+0x74>)
 8028ba4:	690b      	ldr	r3, [r1, #16]
 8028ba6:	694c      	ldr	r4, [r1, #20]
 8028ba8:	4a0d      	ldr	r2, [pc, #52]	@ (8028be0 <rand+0x78>)
 8028baa:	4358      	muls	r0, r3
 8028bac:	fb02 0004 	mla	r0, r2, r4, r0
 8028bb0:	fba3 3202 	umull	r3, r2, r3, r2
 8028bb4:	3301      	adds	r3, #1
 8028bb6:	eb40 0002 	adc.w	r0, r0, r2
 8028bba:	e9c1 3004 	strd	r3, r0, [r1, #16]
 8028bbe:	f020 4000 	bic.w	r0, r0, #2147483648	@ 0x80000000
 8028bc2:	bd10      	pop	{r4, pc}
 8028bc4:	240001d4 	.word	0x240001d4
 8028bc8:	0803150a 	.word	0x0803150a
 8028bcc:	08031521 	.word	0x08031521
 8028bd0:	abcd330e 	.word	0xabcd330e
 8028bd4:	e66d1234 	.word	0xe66d1234
 8028bd8:	0005deec 	.word	0x0005deec
 8028bdc:	5851f42d 	.word	0x5851f42d
 8028be0:	4c957f2d 	.word	0x4c957f2d

08028be4 <realloc>:
 8028be4:	4b02      	ldr	r3, [pc, #8]	@ (8028bf0 <realloc+0xc>)
 8028be6:	460a      	mov	r2, r1
 8028be8:	4601      	mov	r1, r0
 8028bea:	6818      	ldr	r0, [r3, #0]
 8028bec:	f000 b802 	b.w	8028bf4 <_realloc_r>
 8028bf0:	240001d4 	.word	0x240001d4

08028bf4 <_realloc_r>:
 8028bf4:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
 8028bf8:	4680      	mov	r8, r0
 8028bfa:	4615      	mov	r5, r2
 8028bfc:	460c      	mov	r4, r1
 8028bfe:	b921      	cbnz	r1, 8028c0a <_realloc_r+0x16>
 8028c00:	e8bd 41f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, lr}
 8028c04:	4611      	mov	r1, r2
 8028c06:	f7ff bf23 	b.w	8028a50 <_malloc_r>
 8028c0a:	b92a      	cbnz	r2, 8028c18 <_realloc_r+0x24>
 8028c0c:	f002 fb76 	bl	802b2fc <_free_r>
 8028c10:	2400      	movs	r4, #0
 8028c12:	4620      	mov	r0, r4
 8028c14:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 8028c18:	f003 fbb5 	bl	802c386 <_malloc_usable_size_r>
 8028c1c:	4285      	cmp	r5, r0
 8028c1e:	4606      	mov	r6, r0
 8028c20:	d802      	bhi.n	8028c28 <_realloc_r+0x34>
 8028c22:	ebb5 0f50 	cmp.w	r5, r0, lsr #1
 8028c26:	d8f4      	bhi.n	8028c12 <_realloc_r+0x1e>
 8028c28:	4629      	mov	r1, r5
 8028c2a:	4640      	mov	r0, r8
 8028c2c:	f7ff ff10 	bl	8028a50 <_malloc_r>
 8028c30:	4607      	mov	r7, r0
 8028c32:	2800      	cmp	r0, #0
 8028c34:	d0ec      	beq.n	8028c10 <_realloc_r+0x1c>
 8028c36:	42b5      	cmp	r5, r6
 8028c38:	462a      	mov	r2, r5
 8028c3a:	4621      	mov	r1, r4
 8028c3c:	bf28      	it	cs
 8028c3e:	4632      	movcs	r2, r6
 8028c40:	f001 fd45 	bl	802a6ce <memcpy>
 8028c44:	4621      	mov	r1, r4
 8028c46:	4640      	mov	r0, r8
 8028c48:	f002 fb58 	bl	802b2fc <_free_r>
 8028c4c:	463c      	mov	r4, r7
 8028c4e:	e7e0      	b.n	8028c12 <_realloc_r+0x1e>

08028c50 <sulp>:
 8028c50:	b570      	push	{r4, r5, r6, lr}
 8028c52:	4604      	mov	r4, r0
 8028c54:	460d      	mov	r5, r1
 8028c56:	4616      	mov	r6, r2
 8028c58:	ec45 4b10 	vmov	d0, r4, r5
 8028c5c:	f003 fa58 	bl	802c110 <__ulp>
 8028c60:	b17e      	cbz	r6, 8028c82 <sulp+0x32>
 8028c62:	f3c5 530a 	ubfx	r3, r5, #20, #11
 8028c66:	f1c3 036b 	rsb	r3, r3, #107	@ 0x6b
 8028c6a:	2b00      	cmp	r3, #0
 8028c6c:	dd09      	ble.n	8028c82 <sulp+0x32>
 8028c6e:	051b      	lsls	r3, r3, #20
 8028c70:	f103 517f 	add.w	r1, r3, #1069547520	@ 0x3fc00000
 8028c74:	2000      	movs	r0, #0
 8028c76:	f501 1140 	add.w	r1, r1, #3145728	@ 0x300000
 8028c7a:	ec41 0b17 	vmov	d7, r0, r1
 8028c7e:	ee20 0b07 	vmul.f64	d0, d0, d7
 8028c82:	bd70      	pop	{r4, r5, r6, pc}
 8028c84:	0000      	movs	r0, r0
	...

08028c88 <_strtod_l>:
 8028c88:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 8028c8c:	ed2d 8b0a 	vpush	{d8-d12}
 8028c90:	b097      	sub	sp, #92	@ 0x5c
 8028c92:	4688      	mov	r8, r1
 8028c94:	920e      	str	r2, [sp, #56]	@ 0x38
 8028c96:	2200      	movs	r2, #0
 8028c98:	9212      	str	r2, [sp, #72]	@ 0x48
 8028c9a:	9005      	str	r0, [sp, #20]
 8028c9c:	f04f 0a00 	mov.w	sl, #0
 8028ca0:	f04f 0b00 	mov.w	fp, #0
 8028ca4:	460a      	mov	r2, r1
 8028ca6:	9211      	str	r2, [sp, #68]	@ 0x44
 8028ca8:	7811      	ldrb	r1, [r2, #0]
 8028caa:	292b      	cmp	r1, #43	@ 0x2b
 8028cac:	d04c      	beq.n	8028d48 <_strtod_l+0xc0>
 8028cae:	d839      	bhi.n	8028d24 <_strtod_l+0x9c>
 8028cb0:	290d      	cmp	r1, #13
 8028cb2:	d833      	bhi.n	8028d1c <_strtod_l+0x94>
 8028cb4:	2908      	cmp	r1, #8
 8028cb6:	d833      	bhi.n	8028d20 <_strtod_l+0x98>
 8028cb8:	2900      	cmp	r1, #0
 8028cba:	d03c      	beq.n	8028d36 <_strtod_l+0xae>
 8028cbc:	2200      	movs	r2, #0
 8028cbe:	9208      	str	r2, [sp, #32]
 8028cc0:	9d11      	ldr	r5, [sp, #68]	@ 0x44
 8028cc2:	782a      	ldrb	r2, [r5, #0]
 8028cc4:	2a30      	cmp	r2, #48	@ 0x30
 8028cc6:	f040 80b5 	bne.w	8028e34 <_strtod_l+0x1ac>
 8028cca:	786a      	ldrb	r2, [r5, #1]
 8028ccc:	f002 02df 	and.w	r2, r2, #223	@ 0xdf
 8028cd0:	2a58      	cmp	r2, #88	@ 0x58
 8028cd2:	d170      	bne.n	8028db6 <_strtod_l+0x12e>
 8028cd4:	9302      	str	r3, [sp, #8]
 8028cd6:	9b08      	ldr	r3, [sp, #32]
 8028cd8:	9301      	str	r3, [sp, #4]
 8028cda:	ab12      	add	r3, sp, #72	@ 0x48
 8028cdc:	9300      	str	r3, [sp, #0]
 8028cde:	4a8b      	ldr	r2, [pc, #556]	@ (8028f0c <_strtod_l+0x284>)
 8028ce0:	9805      	ldr	r0, [sp, #20]
 8028ce2:	ab13      	add	r3, sp, #76	@ 0x4c
 8028ce4:	a911      	add	r1, sp, #68	@ 0x44
 8028ce6:	f002 fbbb 	bl	802b460 <__gethex>
 8028cea:	f010 060f 	ands.w	r6, r0, #15
 8028cee:	4604      	mov	r4, r0
 8028cf0:	d005      	beq.n	8028cfe <_strtod_l+0x76>
 8028cf2:	2e06      	cmp	r6, #6
 8028cf4:	d12a      	bne.n	8028d4c <_strtod_l+0xc4>
 8028cf6:	3501      	adds	r5, #1
 8028cf8:	2300      	movs	r3, #0
 8028cfa:	9511      	str	r5, [sp, #68]	@ 0x44
 8028cfc:	9308      	str	r3, [sp, #32]
 8028cfe:	9b0e      	ldr	r3, [sp, #56]	@ 0x38
 8028d00:	2b00      	cmp	r3, #0
 8028d02:	f040 852f 	bne.w	8029764 <_strtod_l+0xadc>
 8028d06:	9b08      	ldr	r3, [sp, #32]
 8028d08:	ec4b ab10 	vmov	d0, sl, fp
 8028d0c:	b1cb      	cbz	r3, 8028d42 <_strtod_l+0xba>
 8028d0e:	eeb1 0b40 	vneg.f64	d0, d0
 8028d12:	b017      	add	sp, #92	@ 0x5c
 8028d14:	ecbd 8b0a 	vpop	{d8-d12}
 8028d18:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 8028d1c:	2920      	cmp	r1, #32
 8028d1e:	d1cd      	bne.n	8028cbc <_strtod_l+0x34>
 8028d20:	3201      	adds	r2, #1
 8028d22:	e7c0      	b.n	8028ca6 <_strtod_l+0x1e>
 8028d24:	292d      	cmp	r1, #45	@ 0x2d
 8028d26:	d1c9      	bne.n	8028cbc <_strtod_l+0x34>
 8028d28:	2101      	movs	r1, #1
 8028d2a:	9108      	str	r1, [sp, #32]
 8028d2c:	1c51      	adds	r1, r2, #1
 8028d2e:	9111      	str	r1, [sp, #68]	@ 0x44
 8028d30:	7852      	ldrb	r2, [r2, #1]
 8028d32:	2a00      	cmp	r2, #0
 8028d34:	d1c4      	bne.n	8028cc0 <_strtod_l+0x38>
 8028d36:	9b0e      	ldr	r3, [sp, #56]	@ 0x38
 8028d38:	f8cd 8044 	str.w	r8, [sp, #68]	@ 0x44
 8028d3c:	2b00      	cmp	r3, #0
 8028d3e:	f040 850f 	bne.w	8029760 <_strtod_l+0xad8>
 8028d42:	ec4b ab10 	vmov	d0, sl, fp
 8028d46:	e7e4      	b.n	8028d12 <_strtod_l+0x8a>
 8028d48:	2100      	movs	r1, #0
 8028d4a:	e7ee      	b.n	8028d2a <_strtod_l+0xa2>
 8028d4c:	9a12      	ldr	r2, [sp, #72]	@ 0x48
 8028d4e:	b13a      	cbz	r2, 8028d60 <_strtod_l+0xd8>
 8028d50:	2135      	movs	r1, #53	@ 0x35
 8028d52:	a814      	add	r0, sp, #80	@ 0x50
 8028d54:	f003 fad3 	bl	802c2fe <__copybits>
 8028d58:	9912      	ldr	r1, [sp, #72]	@ 0x48
 8028d5a:	9805      	ldr	r0, [sp, #20]
 8028d5c:	f002 fea4 	bl	802baa8 <_Bfree>
 8028d60:	1e73      	subs	r3, r6, #1
 8028d62:	9a13      	ldr	r2, [sp, #76]	@ 0x4c
 8028d64:	2b04      	cmp	r3, #4
 8028d66:	d806      	bhi.n	8028d76 <_strtod_l+0xee>
 8028d68:	e8df f003 	tbb	[pc, r3]
 8028d6c:	201d0314 	.word	0x201d0314
 8028d70:	14          	.byte	0x14
 8028d71:	00          	.byte	0x00
 8028d72:	e9dd ab14 	ldrd	sl, fp, [sp, #80]	@ 0x50
 8028d76:	05e3      	lsls	r3, r4, #23
 8028d78:	bf48      	it	mi
 8028d7a:	f04b 4b00 	orrmi.w	fp, fp, #2147483648	@ 0x80000000
 8028d7e:	f02b 4300 	bic.w	r3, fp, #2147483648	@ 0x80000000
 8028d82:	0d1b      	lsrs	r3, r3, #20
 8028d84:	051b      	lsls	r3, r3, #20
 8028d86:	2b00      	cmp	r3, #0
 8028d88:	d1b9      	bne.n	8028cfe <_strtod_l+0x76>
 8028d8a:	f001 fc73 	bl	802a674 <__errno>
 8028d8e:	2322      	movs	r3, #34	@ 0x22
 8028d90:	6003      	str	r3, [r0, #0]
 8028d92:	e7b4      	b.n	8028cfe <_strtod_l+0x76>
 8028d94:	e9dd a314 	ldrd	sl, r3, [sp, #80]	@ 0x50
 8028d98:	f202 4233 	addw	r2, r2, #1075	@ 0x433
 8028d9c:	f423 1380 	bic.w	r3, r3, #1048576	@ 0x100000
 8028da0:	ea43 5b02 	orr.w	fp, r3, r2, lsl #20
 8028da4:	e7e7      	b.n	8028d76 <_strtod_l+0xee>
 8028da6:	f8df b16c 	ldr.w	fp, [pc, #364]	@ 8028f14 <_strtod_l+0x28c>
 8028daa:	e7e4      	b.n	8028d76 <_strtod_l+0xee>
 8028dac:	f06f 4b00 	mvn.w	fp, #2147483648	@ 0x80000000
 8028db0:	f04f 3aff 	mov.w	sl, #4294967295	@ 0xffffffff
 8028db4:	e7df      	b.n	8028d76 <_strtod_l+0xee>
 8028db6:	9b11      	ldr	r3, [sp, #68]	@ 0x44
 8028db8:	1c5a      	adds	r2, r3, #1
 8028dba:	9211      	str	r2, [sp, #68]	@ 0x44
 8028dbc:	785b      	ldrb	r3, [r3, #1]
 8028dbe:	2b30      	cmp	r3, #48	@ 0x30
 8028dc0:	d0f9      	beq.n	8028db6 <_strtod_l+0x12e>
 8028dc2:	2b00      	cmp	r3, #0
 8028dc4:	d09b      	beq.n	8028cfe <_strtod_l+0x76>
 8028dc6:	2301      	movs	r3, #1
 8028dc8:	2600      	movs	r6, #0
 8028dca:	9307      	str	r3, [sp, #28]
 8028dcc:	9b11      	ldr	r3, [sp, #68]	@ 0x44
 8028dce:	930a      	str	r3, [sp, #40]	@ 0x28
 8028dd0:	46b1      	mov	r9, r6
 8028dd2:	4635      	mov	r5, r6
 8028dd4:	220a      	movs	r2, #10
 8028dd6:	9811      	ldr	r0, [sp, #68]	@ 0x44
 8028dd8:	7804      	ldrb	r4, [r0, #0]
 8028dda:	f1a4 0330 	sub.w	r3, r4, #48	@ 0x30
 8028dde:	b2d9      	uxtb	r1, r3
 8028de0:	2909      	cmp	r1, #9
 8028de2:	d929      	bls.n	8028e38 <_strtod_l+0x1b0>
 8028de4:	494a      	ldr	r1, [pc, #296]	@ (8028f10 <_strtod_l+0x288>)
 8028de6:	2201      	movs	r2, #1
 8028de8:	f001 fb82 	bl	802a4f0 <strncmp>
 8028dec:	b378      	cbz	r0, 8028e4e <_strtod_l+0x1c6>
 8028dee:	2000      	movs	r0, #0
 8028df0:	4622      	mov	r2, r4
 8028df2:	462b      	mov	r3, r5
 8028df4:	4607      	mov	r7, r0
 8028df6:	9006      	str	r0, [sp, #24]
 8028df8:	2a65      	cmp	r2, #101	@ 0x65
 8028dfa:	d001      	beq.n	8028e00 <_strtod_l+0x178>
 8028dfc:	2a45      	cmp	r2, #69	@ 0x45
 8028dfe:	d117      	bne.n	8028e30 <_strtod_l+0x1a8>
 8028e00:	b91b      	cbnz	r3, 8028e0a <_strtod_l+0x182>
 8028e02:	9b07      	ldr	r3, [sp, #28]
 8028e04:	4303      	orrs	r3, r0
 8028e06:	d096      	beq.n	8028d36 <_strtod_l+0xae>
 8028e08:	2300      	movs	r3, #0
 8028e0a:	f8dd 8044 	ldr.w	r8, [sp, #68]	@ 0x44
 8028e0e:	f108 0201 	add.w	r2, r8, #1
 8028e12:	9211      	str	r2, [sp, #68]	@ 0x44
 8028e14:	f898 2001 	ldrb.w	r2, [r8, #1]
 8028e18:	2a2b      	cmp	r2, #43	@ 0x2b
 8028e1a:	d06b      	beq.n	8028ef4 <_strtod_l+0x26c>
 8028e1c:	2a2d      	cmp	r2, #45	@ 0x2d
 8028e1e:	d071      	beq.n	8028f04 <_strtod_l+0x27c>
 8028e20:	f04f 0e00 	mov.w	lr, #0
 8028e24:	f1a2 0430 	sub.w	r4, r2, #48	@ 0x30
 8028e28:	2c09      	cmp	r4, #9
 8028e2a:	d979      	bls.n	8028f20 <_strtod_l+0x298>
 8028e2c:	f8cd 8044 	str.w	r8, [sp, #68]	@ 0x44
 8028e30:	2400      	movs	r4, #0
 8028e32:	e094      	b.n	8028f5e <_strtod_l+0x2d6>
 8028e34:	2300      	movs	r3, #0
 8028e36:	e7c7      	b.n	8028dc8 <_strtod_l+0x140>
 8028e38:	2d08      	cmp	r5, #8
 8028e3a:	f100 0001 	add.w	r0, r0, #1
 8028e3e:	bfd4      	ite	le
 8028e40:	fb02 3909 	mlale	r9, r2, r9, r3
 8028e44:	fb02 3606 	mlagt	r6, r2, r6, r3
 8028e48:	3501      	adds	r5, #1
 8028e4a:	9011      	str	r0, [sp, #68]	@ 0x44
 8028e4c:	e7c3      	b.n	8028dd6 <_strtod_l+0x14e>
 8028e4e:	9b11      	ldr	r3, [sp, #68]	@ 0x44
 8028e50:	1c5a      	adds	r2, r3, #1
 8028e52:	9211      	str	r2, [sp, #68]	@ 0x44
 8028e54:	785a      	ldrb	r2, [r3, #1]
 8028e56:	b375      	cbz	r5, 8028eb6 <_strtod_l+0x22e>
 8028e58:	4607      	mov	r7, r0
 8028e5a:	462b      	mov	r3, r5
 8028e5c:	f1a2 0130 	sub.w	r1, r2, #48	@ 0x30
 8028e60:	2909      	cmp	r1, #9
 8028e62:	d913      	bls.n	8028e8c <_strtod_l+0x204>
 8028e64:	2101      	movs	r1, #1
 8028e66:	9106      	str	r1, [sp, #24]
 8028e68:	e7c6      	b.n	8028df8 <_strtod_l+0x170>
 8028e6a:	9b11      	ldr	r3, [sp, #68]	@ 0x44
 8028e6c:	1c5a      	adds	r2, r3, #1
 8028e6e:	9211      	str	r2, [sp, #68]	@ 0x44
 8028e70:	785a      	ldrb	r2, [r3, #1]
 8028e72:	3001      	adds	r0, #1
 8028e74:	2a30      	cmp	r2, #48	@ 0x30
 8028e76:	d0f8      	beq.n	8028e6a <_strtod_l+0x1e2>
 8028e78:	f1a2 0331 	sub.w	r3, r2, #49	@ 0x31
 8028e7c:	2b08      	cmp	r3, #8
 8028e7e:	f200 8476 	bhi.w	802976e <_strtod_l+0xae6>
 8028e82:	9b11      	ldr	r3, [sp, #68]	@ 0x44
 8028e84:	930a      	str	r3, [sp, #40]	@ 0x28
 8028e86:	4607      	mov	r7, r0
 8028e88:	2000      	movs	r0, #0
 8028e8a:	4603      	mov	r3, r0
 8028e8c:	3a30      	subs	r2, #48	@ 0x30
 8028e8e:	f100 0101 	add.w	r1, r0, #1
 8028e92:	d023      	beq.n	8028edc <_strtod_l+0x254>
 8028e94:	440f      	add	r7, r1
 8028e96:	eb00 0c03 	add.w	ip, r0, r3
 8028e9a:	4619      	mov	r1, r3
 8028e9c:	240a      	movs	r4, #10
 8028e9e:	4561      	cmp	r1, ip
 8028ea0:	d10b      	bne.n	8028eba <_strtod_l+0x232>
 8028ea2:	1c5c      	adds	r4, r3, #1
 8028ea4:	4403      	add	r3, r0
 8028ea6:	2b08      	cmp	r3, #8
 8028ea8:	4404      	add	r4, r0
 8028eaa:	dc11      	bgt.n	8028ed0 <_strtod_l+0x248>
 8028eac:	230a      	movs	r3, #10
 8028eae:	fb03 2909 	mla	r9, r3, r9, r2
 8028eb2:	2100      	movs	r1, #0
 8028eb4:	e013      	b.n	8028ede <_strtod_l+0x256>
 8028eb6:	4628      	mov	r0, r5
 8028eb8:	e7dc      	b.n	8028e74 <_strtod_l+0x1ec>
 8028eba:	2908      	cmp	r1, #8
 8028ebc:	f101 0101 	add.w	r1, r1, #1
 8028ec0:	dc02      	bgt.n	8028ec8 <_strtod_l+0x240>
 8028ec2:	fb04 f909 	mul.w	r9, r4, r9
 8028ec6:	e7ea      	b.n	8028e9e <_strtod_l+0x216>
 8028ec8:	2910      	cmp	r1, #16
 8028eca:	bfd8      	it	le
 8028ecc:	4366      	mulle	r6, r4
 8028ece:	e7e6      	b.n	8028e9e <_strtod_l+0x216>
 8028ed0:	2b0f      	cmp	r3, #15
 8028ed2:	dcee      	bgt.n	8028eb2 <_strtod_l+0x22a>
 8028ed4:	230a      	movs	r3, #10
 8028ed6:	fb03 2606 	mla	r6, r3, r6, r2
 8028eda:	e7ea      	b.n	8028eb2 <_strtod_l+0x22a>
 8028edc:	461c      	mov	r4, r3
 8028ede:	9b11      	ldr	r3, [sp, #68]	@ 0x44
 8028ee0:	1c5a      	adds	r2, r3, #1
 8028ee2:	9211      	str	r2, [sp, #68]	@ 0x44
 8028ee4:	785a      	ldrb	r2, [r3, #1]
 8028ee6:	4608      	mov	r0, r1
 8028ee8:	4623      	mov	r3, r4
 8028eea:	e7b7      	b.n	8028e5c <_strtod_l+0x1d4>
 8028eec:	2301      	movs	r3, #1
 8028eee:	2700      	movs	r7, #0
 8028ef0:	9306      	str	r3, [sp, #24]
 8028ef2:	e786      	b.n	8028e02 <_strtod_l+0x17a>
 8028ef4:	f04f 0e00 	mov.w	lr, #0
 8028ef8:	f108 0202 	add.w	r2, r8, #2
 8028efc:	9211      	str	r2, [sp, #68]	@ 0x44
 8028efe:	f898 2002 	ldrb.w	r2, [r8, #2]
 8028f02:	e78f      	b.n	8028e24 <_strtod_l+0x19c>
 8028f04:	f04f 0e01 	mov.w	lr, #1
 8028f08:	e7f6      	b.n	8028ef8 <_strtod_l+0x270>
 8028f0a:	bf00      	nop
 8028f0c:	08031590 	.word	0x08031590
 8028f10:	08031579 	.word	0x08031579
 8028f14:	7ff00000 	.word	0x7ff00000
 8028f18:	9a11      	ldr	r2, [sp, #68]	@ 0x44
 8028f1a:	1c54      	adds	r4, r2, #1
 8028f1c:	9411      	str	r4, [sp, #68]	@ 0x44
 8028f1e:	7852      	ldrb	r2, [r2, #1]
 8028f20:	2a30      	cmp	r2, #48	@ 0x30
 8028f22:	d0f9      	beq.n	8028f18 <_strtod_l+0x290>
 8028f24:	f1a2 0431 	sub.w	r4, r2, #49	@ 0x31
 8028f28:	2c08      	cmp	r4, #8
 8028f2a:	d881      	bhi.n	8028e30 <_strtod_l+0x1a8>
 8028f2c:	f1a2 0c30 	sub.w	ip, r2, #48	@ 0x30
 8028f30:	9a11      	ldr	r2, [sp, #68]	@ 0x44
 8028f32:	9209      	str	r2, [sp, #36]	@ 0x24
 8028f34:	9a11      	ldr	r2, [sp, #68]	@ 0x44
 8028f36:	1c51      	adds	r1, r2, #1
 8028f38:	9111      	str	r1, [sp, #68]	@ 0x44
 8028f3a:	7852      	ldrb	r2, [r2, #1]
 8028f3c:	f1a2 0430 	sub.w	r4, r2, #48	@ 0x30
 8028f40:	2c09      	cmp	r4, #9
 8028f42:	d938      	bls.n	8028fb6 <_strtod_l+0x32e>
 8028f44:	9c09      	ldr	r4, [sp, #36]	@ 0x24
 8028f46:	1b0c      	subs	r4, r1, r4
 8028f48:	2c08      	cmp	r4, #8
 8028f4a:	f644 641f 	movw	r4, #19999	@ 0x4e1f
 8028f4e:	dc02      	bgt.n	8028f56 <_strtod_l+0x2ce>
 8028f50:	4564      	cmp	r4, ip
 8028f52:	bfa8      	it	ge
 8028f54:	4664      	movge	r4, ip
 8028f56:	f1be 0f00 	cmp.w	lr, #0
 8028f5a:	d000      	beq.n	8028f5e <_strtod_l+0x2d6>
 8028f5c:	4264      	negs	r4, r4
 8028f5e:	2b00      	cmp	r3, #0
 8028f60:	d14e      	bne.n	8029000 <_strtod_l+0x378>
 8028f62:	9b07      	ldr	r3, [sp, #28]
 8028f64:	4318      	orrs	r0, r3
 8028f66:	f47f aeca 	bne.w	8028cfe <_strtod_l+0x76>
 8028f6a:	9b06      	ldr	r3, [sp, #24]
 8028f6c:	2b00      	cmp	r3, #0
 8028f6e:	f47f aee2 	bne.w	8028d36 <_strtod_l+0xae>
 8028f72:	2a69      	cmp	r2, #105	@ 0x69
 8028f74:	d027      	beq.n	8028fc6 <_strtod_l+0x33e>
 8028f76:	dc24      	bgt.n	8028fc2 <_strtod_l+0x33a>
 8028f78:	2a49      	cmp	r2, #73	@ 0x49
 8028f7a:	d024      	beq.n	8028fc6 <_strtod_l+0x33e>
 8028f7c:	2a4e      	cmp	r2, #78	@ 0x4e
 8028f7e:	f47f aeda 	bne.w	8028d36 <_strtod_l+0xae>
 8028f82:	4997      	ldr	r1, [pc, #604]	@ (80291e0 <_strtod_l+0x558>)
 8028f84:	a811      	add	r0, sp, #68	@ 0x44
 8028f86:	f002 fc8d 	bl	802b8a4 <__match>
 8028f8a:	2800      	cmp	r0, #0
 8028f8c:	f43f aed3 	beq.w	8028d36 <_strtod_l+0xae>
 8028f90:	9b11      	ldr	r3, [sp, #68]	@ 0x44
 8028f92:	781b      	ldrb	r3, [r3, #0]
 8028f94:	2b28      	cmp	r3, #40	@ 0x28
 8028f96:	d12d      	bne.n	8028ff4 <_strtod_l+0x36c>
 8028f98:	4992      	ldr	r1, [pc, #584]	@ (80291e4 <_strtod_l+0x55c>)
 8028f9a:	aa14      	add	r2, sp, #80	@ 0x50
 8028f9c:	a811      	add	r0, sp, #68	@ 0x44
 8028f9e:	f002 fc95 	bl	802b8cc <__hexnan>
 8028fa2:	2805      	cmp	r0, #5
 8028fa4:	d126      	bne.n	8028ff4 <_strtod_l+0x36c>
 8028fa6:	9b15      	ldr	r3, [sp, #84]	@ 0x54
 8028fa8:	f8dd a050 	ldr.w	sl, [sp, #80]	@ 0x50
 8028fac:	f043 4bff 	orr.w	fp, r3, #2139095040	@ 0x7f800000
 8028fb0:	f44b 0be0 	orr.w	fp, fp, #7340032	@ 0x700000
 8028fb4:	e6a3      	b.n	8028cfe <_strtod_l+0x76>
 8028fb6:	240a      	movs	r4, #10
 8028fb8:	fb04 2c0c 	mla	ip, r4, ip, r2
 8028fbc:	f1ac 0c30 	sub.w	ip, ip, #48	@ 0x30
 8028fc0:	e7b8      	b.n	8028f34 <_strtod_l+0x2ac>
 8028fc2:	2a6e      	cmp	r2, #110	@ 0x6e
 8028fc4:	e7db      	b.n	8028f7e <_strtod_l+0x2f6>
 8028fc6:	4988      	ldr	r1, [pc, #544]	@ (80291e8 <_strtod_l+0x560>)
 8028fc8:	a811      	add	r0, sp, #68	@ 0x44
 8028fca:	f002 fc6b 	bl	802b8a4 <__match>
 8028fce:	2800      	cmp	r0, #0
 8028fd0:	f43f aeb1 	beq.w	8028d36 <_strtod_l+0xae>
 8028fd4:	9b11      	ldr	r3, [sp, #68]	@ 0x44
 8028fd6:	4985      	ldr	r1, [pc, #532]	@ (80291ec <_strtod_l+0x564>)
 8028fd8:	3b01      	subs	r3, #1
 8028fda:	a811      	add	r0, sp, #68	@ 0x44
 8028fdc:	9311      	str	r3, [sp, #68]	@ 0x44
 8028fde:	f002 fc61 	bl	802b8a4 <__match>
 8028fe2:	b910      	cbnz	r0, 8028fea <_strtod_l+0x362>
 8028fe4:	9b11      	ldr	r3, [sp, #68]	@ 0x44
 8028fe6:	3301      	adds	r3, #1
 8028fe8:	9311      	str	r3, [sp, #68]	@ 0x44
 8028fea:	f8df b214 	ldr.w	fp, [pc, #532]	@ 8029200 <_strtod_l+0x578>
 8028fee:	f04f 0a00 	mov.w	sl, #0
 8028ff2:	e684      	b.n	8028cfe <_strtod_l+0x76>
 8028ff4:	487e      	ldr	r0, [pc, #504]	@ (80291f0 <_strtod_l+0x568>)
 8028ff6:	f001 fb7b 	bl	802a6f0 <nan>
 8028ffa:	ec5b ab10 	vmov	sl, fp, d0
 8028ffe:	e67e      	b.n	8028cfe <_strtod_l+0x76>
 8029000:	ee07 9a90 	vmov	s15, r9
 8029004:	1be2      	subs	r2, r4, r7
 8029006:	eeb8 7b67 	vcvt.f64.u32	d7, s15
 802900a:	2d00      	cmp	r5, #0
 802900c:	bf08      	it	eq
 802900e:	461d      	moveq	r5, r3
 8029010:	2b10      	cmp	r3, #16
 8029012:	9209      	str	r2, [sp, #36]	@ 0x24
 8029014:	461a      	mov	r2, r3
 8029016:	bfa8      	it	ge
 8029018:	2210      	movge	r2, #16
 802901a:	2b09      	cmp	r3, #9
 802901c:	ec5b ab17 	vmov	sl, fp, d7
 8029020:	dc15      	bgt.n	802904e <_strtod_l+0x3c6>
 8029022:	1be1      	subs	r1, r4, r7
 8029024:	2900      	cmp	r1, #0
 8029026:	f43f ae6a 	beq.w	8028cfe <_strtod_l+0x76>
 802902a:	eba4 0107 	sub.w	r1, r4, r7
 802902e:	dd72      	ble.n	8029116 <_strtod_l+0x48e>
 8029030:	2916      	cmp	r1, #22
 8029032:	dc59      	bgt.n	80290e8 <_strtod_l+0x460>
 8029034:	4b6f      	ldr	r3, [pc, #444]	@ (80291f4 <_strtod_l+0x56c>)
 8029036:	9a09      	ldr	r2, [sp, #36]	@ 0x24
 8029038:	eb03 03c2 	add.w	r3, r3, r2, lsl #3
 802903c:	ed93 7b00 	vldr	d7, [r3]
 8029040:	ec4b ab16 	vmov	d6, sl, fp
 8029044:	ee27 7b06 	vmul.f64	d7, d7, d6
 8029048:	ec5b ab17 	vmov	sl, fp, d7
 802904c:	e657      	b.n	8028cfe <_strtod_l+0x76>
 802904e:	4969      	ldr	r1, [pc, #420]	@ (80291f4 <_strtod_l+0x56c>)
 8029050:	eb01 01c2 	add.w	r1, r1, r2, lsl #3
 8029054:	ed11 5b12 	vldr	d5, [r1, #-72]	@ 0xffffffb8
 8029058:	ee06 6a90 	vmov	s13, r6
 802905c:	2b0f      	cmp	r3, #15
 802905e:	eeb8 6b66 	vcvt.f64.u32	d6, s13
 8029062:	eea7 6b05 	vfma.f64	d6, d7, d5
 8029066:	ec5b ab16 	vmov	sl, fp, d6
 802906a:	ddda      	ble.n	8029022 <_strtod_l+0x39a>
 802906c:	1a9a      	subs	r2, r3, r2
 802906e:	1be1      	subs	r1, r4, r7
 8029070:	440a      	add	r2, r1
 8029072:	2a00      	cmp	r2, #0
 8029074:	f340 8094 	ble.w	80291a0 <_strtod_l+0x518>
 8029078:	f012 000f 	ands.w	r0, r2, #15
 802907c:	d00a      	beq.n	8029094 <_strtod_l+0x40c>
 802907e:	495d      	ldr	r1, [pc, #372]	@ (80291f4 <_strtod_l+0x56c>)
 8029080:	eb01 01c0 	add.w	r1, r1, r0, lsl #3
 8029084:	ed91 7b00 	vldr	d7, [r1]
 8029088:	ec4b ab16 	vmov	d6, sl, fp
 802908c:	ee27 7b06 	vmul.f64	d7, d7, d6
 8029090:	ec5b ab17 	vmov	sl, fp, d7
 8029094:	f032 020f 	bics.w	r2, r2, #15
 8029098:	d073      	beq.n	8029182 <_strtod_l+0x4fa>
 802909a:	f5b2 7f9a 	cmp.w	r2, #308	@ 0x134
 802909e:	dd47      	ble.n	8029130 <_strtod_l+0x4a8>
 80290a0:	2400      	movs	r4, #0
 80290a2:	4625      	mov	r5, r4
 80290a4:	9407      	str	r4, [sp, #28]
 80290a6:	4626      	mov	r6, r4
 80290a8:	9a05      	ldr	r2, [sp, #20]
 80290aa:	f8df b154 	ldr.w	fp, [pc, #340]	@ 8029200 <_strtod_l+0x578>
 80290ae:	2322      	movs	r3, #34	@ 0x22
 80290b0:	6013      	str	r3, [r2, #0]
 80290b2:	f04f 0a00 	mov.w	sl, #0
 80290b6:	9b07      	ldr	r3, [sp, #28]
 80290b8:	2b00      	cmp	r3, #0
 80290ba:	f43f ae20 	beq.w	8028cfe <_strtod_l+0x76>
 80290be:	9912      	ldr	r1, [sp, #72]	@ 0x48
 80290c0:	9805      	ldr	r0, [sp, #20]
 80290c2:	f002 fcf1 	bl	802baa8 <_Bfree>
 80290c6:	9805      	ldr	r0, [sp, #20]
 80290c8:	4631      	mov	r1, r6
 80290ca:	f002 fced 	bl	802baa8 <_Bfree>
 80290ce:	9805      	ldr	r0, [sp, #20]
 80290d0:	4629      	mov	r1, r5
 80290d2:	f002 fce9 	bl	802baa8 <_Bfree>
 80290d6:	9907      	ldr	r1, [sp, #28]
 80290d8:	9805      	ldr	r0, [sp, #20]
 80290da:	f002 fce5 	bl	802baa8 <_Bfree>
 80290de:	9805      	ldr	r0, [sp, #20]
 80290e0:	4621      	mov	r1, r4
 80290e2:	f002 fce1 	bl	802baa8 <_Bfree>
 80290e6:	e60a      	b.n	8028cfe <_strtod_l+0x76>
 80290e8:	f1c3 0125 	rsb	r1, r3, #37	@ 0x25
 80290ec:	1be0      	subs	r0, r4, r7
 80290ee:	4281      	cmp	r1, r0
 80290f0:	dbbc      	blt.n	802906c <_strtod_l+0x3e4>
 80290f2:	4a40      	ldr	r2, [pc, #256]	@ (80291f4 <_strtod_l+0x56c>)
 80290f4:	f1c3 030f 	rsb	r3, r3, #15
 80290f8:	eb02 01c3 	add.w	r1, r2, r3, lsl #3
 80290fc:	ed91 7b00 	vldr	d7, [r1]
 8029100:	9909      	ldr	r1, [sp, #36]	@ 0x24
 8029102:	ec4b ab16 	vmov	d6, sl, fp
 8029106:	1acb      	subs	r3, r1, r3
 8029108:	eb02 02c3 	add.w	r2, r2, r3, lsl #3
 802910c:	ee27 7b06 	vmul.f64	d7, d7, d6
 8029110:	ed92 6b00 	vldr	d6, [r2]
 8029114:	e796      	b.n	8029044 <_strtod_l+0x3bc>
 8029116:	3116      	adds	r1, #22
 8029118:	dba8      	blt.n	802906c <_strtod_l+0x3e4>
 802911a:	4b36      	ldr	r3, [pc, #216]	@ (80291f4 <_strtod_l+0x56c>)
 802911c:	1b3c      	subs	r4, r7, r4
 802911e:	eb03 04c4 	add.w	r4, r3, r4, lsl #3
 8029122:	ed94 7b00 	vldr	d7, [r4]
 8029126:	ec4b ab16 	vmov	d6, sl, fp
 802912a:	ee86 7b07 	vdiv.f64	d7, d6, d7
 802912e:	e78b      	b.n	8029048 <_strtod_l+0x3c0>
 8029130:	2000      	movs	r0, #0
 8029132:	ec4b ab17 	vmov	d7, sl, fp
 8029136:	4e30      	ldr	r6, [pc, #192]	@ (80291f8 <_strtod_l+0x570>)
 8029138:	1112      	asrs	r2, r2, #4
 802913a:	4601      	mov	r1, r0
 802913c:	2a01      	cmp	r2, #1
 802913e:	dc23      	bgt.n	8029188 <_strtod_l+0x500>
 8029140:	b108      	cbz	r0, 8029146 <_strtod_l+0x4be>
 8029142:	ec5b ab17 	vmov	sl, fp, d7
 8029146:	4a2c      	ldr	r2, [pc, #176]	@ (80291f8 <_strtod_l+0x570>)
 8029148:	482c      	ldr	r0, [pc, #176]	@ (80291fc <_strtod_l+0x574>)
 802914a:	eb02 02c1 	add.w	r2, r2, r1, lsl #3
 802914e:	ed92 7b00 	vldr	d7, [r2]
 8029152:	f1ab 7b54 	sub.w	fp, fp, #55574528	@ 0x3500000
 8029156:	ec4b ab16 	vmov	d6, sl, fp
 802915a:	4a29      	ldr	r2, [pc, #164]	@ (8029200 <_strtod_l+0x578>)
 802915c:	ee27 7b06 	vmul.f64	d7, d7, d6
 8029160:	ee17 1a90 	vmov	r1, s15
 8029164:	400a      	ands	r2, r1
 8029166:	4282      	cmp	r2, r0
 8029168:	ec5b ab17 	vmov	sl, fp, d7
 802916c:	d898      	bhi.n	80290a0 <_strtod_l+0x418>
 802916e:	f5a0 1080 	sub.w	r0, r0, #1048576	@ 0x100000
 8029172:	4282      	cmp	r2, r0
 8029174:	bf86      	itte	hi
 8029176:	f8df b08c 	ldrhi.w	fp, [pc, #140]	@ 8029204 <_strtod_l+0x57c>
 802917a:	f04f 3aff 	movhi.w	sl, #4294967295	@ 0xffffffff
 802917e:	f101 7b54 	addls.w	fp, r1, #55574528	@ 0x3500000
 8029182:	2200      	movs	r2, #0
 8029184:	9206      	str	r2, [sp, #24]
 8029186:	e076      	b.n	8029276 <_strtod_l+0x5ee>
 8029188:	f012 0f01 	tst.w	r2, #1
 802918c:	d004      	beq.n	8029198 <_strtod_l+0x510>
 802918e:	ed96 6b00 	vldr	d6, [r6]
 8029192:	2001      	movs	r0, #1
 8029194:	ee27 7b06 	vmul.f64	d7, d7, d6
 8029198:	3101      	adds	r1, #1
 802919a:	1052      	asrs	r2, r2, #1
 802919c:	3608      	adds	r6, #8
 802919e:	e7cd      	b.n	802913c <_strtod_l+0x4b4>
 80291a0:	d0ef      	beq.n	8029182 <_strtod_l+0x4fa>
 80291a2:	4252      	negs	r2, r2
 80291a4:	f012 000f 	ands.w	r0, r2, #15
 80291a8:	d00a      	beq.n	80291c0 <_strtod_l+0x538>
 80291aa:	4912      	ldr	r1, [pc, #72]	@ (80291f4 <_strtod_l+0x56c>)
 80291ac:	eb01 01c0 	add.w	r1, r1, r0, lsl #3
 80291b0:	ed91 7b00 	vldr	d7, [r1]
 80291b4:	ec4b ab16 	vmov	d6, sl, fp
 80291b8:	ee86 7b07 	vdiv.f64	d7, d6, d7
 80291bc:	ec5b ab17 	vmov	sl, fp, d7
 80291c0:	1112      	asrs	r2, r2, #4
 80291c2:	d0de      	beq.n	8029182 <_strtod_l+0x4fa>
 80291c4:	2a1f      	cmp	r2, #31
 80291c6:	dd1f      	ble.n	8029208 <_strtod_l+0x580>
 80291c8:	2400      	movs	r4, #0
 80291ca:	4625      	mov	r5, r4
 80291cc:	9407      	str	r4, [sp, #28]
 80291ce:	4626      	mov	r6, r4
 80291d0:	9a05      	ldr	r2, [sp, #20]
 80291d2:	2322      	movs	r3, #34	@ 0x22
 80291d4:	f04f 0a00 	mov.w	sl, #0
 80291d8:	f04f 0b00 	mov.w	fp, #0
 80291dc:	6013      	str	r3, [r2, #0]
 80291de:	e76a      	b.n	80290b6 <_strtod_l+0x42e>
 80291e0:	080316de 	.word	0x080316de
 80291e4:	0803157c 	.word	0x0803157c
 80291e8:	080316d6 	.word	0x080316d6
 80291ec:	0803174c 	.word	0x0803174c
 80291f0:	08031748 	.word	0x08031748
 80291f4:	080318b0 	.word	0x080318b0
 80291f8:	08031888 	.word	0x08031888
 80291fc:	7ca00000 	.word	0x7ca00000
 8029200:	7ff00000 	.word	0x7ff00000
 8029204:	7fefffff 	.word	0x7fefffff
 8029208:	f012 0110 	ands.w	r1, r2, #16
 802920c:	bf18      	it	ne
 802920e:	216a      	movne	r1, #106	@ 0x6a
 8029210:	9106      	str	r1, [sp, #24]
 8029212:	ec4b ab17 	vmov	d7, sl, fp
 8029216:	49b0      	ldr	r1, [pc, #704]	@ (80294d8 <_strtod_l+0x850>)
 8029218:	2000      	movs	r0, #0
 802921a:	07d6      	lsls	r6, r2, #31
 802921c:	d504      	bpl.n	8029228 <_strtod_l+0x5a0>
 802921e:	ed91 6b00 	vldr	d6, [r1]
 8029222:	2001      	movs	r0, #1
 8029224:	ee27 7b06 	vmul.f64	d7, d7, d6
 8029228:	1052      	asrs	r2, r2, #1
 802922a:	f101 0108 	add.w	r1, r1, #8
 802922e:	d1f4      	bne.n	802921a <_strtod_l+0x592>
 8029230:	b108      	cbz	r0, 8029236 <_strtod_l+0x5ae>
 8029232:	ec5b ab17 	vmov	sl, fp, d7
 8029236:	9a06      	ldr	r2, [sp, #24]
 8029238:	b1b2      	cbz	r2, 8029268 <_strtod_l+0x5e0>
 802923a:	f3cb 510a 	ubfx	r1, fp, #20, #11
 802923e:	f1c1 026b 	rsb	r2, r1, #107	@ 0x6b
 8029242:	2a00      	cmp	r2, #0
 8029244:	4658      	mov	r0, fp
 8029246:	dd0f      	ble.n	8029268 <_strtod_l+0x5e0>
 8029248:	2a1f      	cmp	r2, #31
 802924a:	dd55      	ble.n	80292f8 <_strtod_l+0x670>
 802924c:	2a34      	cmp	r2, #52	@ 0x34
 802924e:	bfde      	ittt	le
 8029250:	f04f 32ff 	movle.w	r2, #4294967295	@ 0xffffffff
 8029254:	f1c1 014b 	rsble	r1, r1, #75	@ 0x4b
 8029258:	408a      	lslle	r2, r1
 802925a:	f04f 0a00 	mov.w	sl, #0
 802925e:	bfcc      	ite	gt
 8029260:	f04f 7b5c 	movgt.w	fp, #57671680	@ 0x3700000
 8029264:	ea02 0b00 	andle.w	fp, r2, r0
 8029268:	ec4b ab17 	vmov	d7, sl, fp
 802926c:	eeb5 7b40 	vcmp.f64	d7, #0.0
 8029270:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 8029274:	d0a8      	beq.n	80291c8 <_strtod_l+0x540>
 8029276:	990a      	ldr	r1, [sp, #40]	@ 0x28
 8029278:	9805      	ldr	r0, [sp, #20]
 802927a:	f8cd 9000 	str.w	r9, [sp]
 802927e:	462a      	mov	r2, r5
 8029280:	f002 fc7a 	bl	802bb78 <__s2b>
 8029284:	9007      	str	r0, [sp, #28]
 8029286:	2800      	cmp	r0, #0
 8029288:	f43f af0a 	beq.w	80290a0 <_strtod_l+0x418>
 802928c:	9b09      	ldr	r3, [sp, #36]	@ 0x24
 802928e:	1b3f      	subs	r7, r7, r4
 8029290:	2b00      	cmp	r3, #0
 8029292:	bfb4      	ite	lt
 8029294:	463b      	movlt	r3, r7
 8029296:	2300      	movge	r3, #0
 8029298:	930a      	str	r3, [sp, #40]	@ 0x28
 802929a:	9b09      	ldr	r3, [sp, #36]	@ 0x24
 802929c:	ed9f bb8a 	vldr	d11, [pc, #552]	@ 80294c8 <_strtod_l+0x840>
 80292a0:	ea23 73e3 	bic.w	r3, r3, r3, asr #31
 80292a4:	2400      	movs	r4, #0
 80292a6:	930d      	str	r3, [sp, #52]	@ 0x34
 80292a8:	4625      	mov	r5, r4
 80292aa:	9b07      	ldr	r3, [sp, #28]
 80292ac:	9805      	ldr	r0, [sp, #20]
 80292ae:	6859      	ldr	r1, [r3, #4]
 80292b0:	f002 fbba 	bl	802ba28 <_Balloc>
 80292b4:	4606      	mov	r6, r0
 80292b6:	2800      	cmp	r0, #0
 80292b8:	f43f aef6 	beq.w	80290a8 <_strtod_l+0x420>
 80292bc:	9b07      	ldr	r3, [sp, #28]
 80292be:	691a      	ldr	r2, [r3, #16]
 80292c0:	ec4b ab19 	vmov	d9, sl, fp
 80292c4:	3202      	adds	r2, #2
 80292c6:	f103 010c 	add.w	r1, r3, #12
 80292ca:	0092      	lsls	r2, r2, #2
 80292cc:	300c      	adds	r0, #12
 80292ce:	f001 f9fe 	bl	802a6ce <memcpy>
 80292d2:	eeb0 0b49 	vmov.f64	d0, d9
 80292d6:	9805      	ldr	r0, [sp, #20]
 80292d8:	aa14      	add	r2, sp, #80	@ 0x50
 80292da:	a913      	add	r1, sp, #76	@ 0x4c
 80292dc:	f002 ff88 	bl	802c1f0 <__d2b>
 80292e0:	9012      	str	r0, [sp, #72]	@ 0x48
 80292e2:	2800      	cmp	r0, #0
 80292e4:	f43f aee0 	beq.w	80290a8 <_strtod_l+0x420>
 80292e8:	9805      	ldr	r0, [sp, #20]
 80292ea:	2101      	movs	r1, #1
 80292ec:	f002 fcda 	bl	802bca4 <__i2b>
 80292f0:	4605      	mov	r5, r0
 80292f2:	b940      	cbnz	r0, 8029306 <_strtod_l+0x67e>
 80292f4:	2500      	movs	r5, #0
 80292f6:	e6d7      	b.n	80290a8 <_strtod_l+0x420>
 80292f8:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 80292fc:	fa01 f202 	lsl.w	r2, r1, r2
 8029300:	ea02 0a0a 	and.w	sl, r2, sl
 8029304:	e7b0      	b.n	8029268 <_strtod_l+0x5e0>
 8029306:	9f13      	ldr	r7, [sp, #76]	@ 0x4c
 8029308:	9a14      	ldr	r2, [sp, #80]	@ 0x50
 802930a:	2f00      	cmp	r7, #0
 802930c:	bfab      	itete	ge
 802930e:	9b0a      	ldrge	r3, [sp, #40]	@ 0x28
 8029310:	9b0d      	ldrlt	r3, [sp, #52]	@ 0x34
 8029312:	f8dd 8034 	ldrge.w	r8, [sp, #52]	@ 0x34
 8029316:	f8dd 9028 	ldrlt.w	r9, [sp, #40]	@ 0x28
 802931a:	bfac      	ite	ge
 802931c:	eb07 0903 	addge.w	r9, r7, r3
 8029320:	eba3 0807 	sublt.w	r8, r3, r7
 8029324:	9b06      	ldr	r3, [sp, #24]
 8029326:	1aff      	subs	r7, r7, r3
 8029328:	4417      	add	r7, r2
 802932a:	f1c2 0336 	rsb	r3, r2, #54	@ 0x36
 802932e:	4a6b      	ldr	r2, [pc, #428]	@ (80294dc <_strtod_l+0x854>)
 8029330:	3f01      	subs	r7, #1
 8029332:	4297      	cmp	r7, r2
 8029334:	da51      	bge.n	80293da <_strtod_l+0x752>
 8029336:	1bd1      	subs	r1, r2, r7
 8029338:	291f      	cmp	r1, #31
 802933a:	eba3 0301 	sub.w	r3, r3, r1
 802933e:	f04f 0201 	mov.w	r2, #1
 8029342:	dc3e      	bgt.n	80293c2 <_strtod_l+0x73a>
 8029344:	408a      	lsls	r2, r1
 8029346:	920c      	str	r2, [sp, #48]	@ 0x30
 8029348:	2200      	movs	r2, #0
 802934a:	920b      	str	r2, [sp, #44]	@ 0x2c
 802934c:	eb09 0703 	add.w	r7, r9, r3
 8029350:	4498      	add	r8, r3
 8029352:	9b06      	ldr	r3, [sp, #24]
 8029354:	45b9      	cmp	r9, r7
 8029356:	4498      	add	r8, r3
 8029358:	464b      	mov	r3, r9
 802935a:	bfa8      	it	ge
 802935c:	463b      	movge	r3, r7
 802935e:	4543      	cmp	r3, r8
 8029360:	bfa8      	it	ge
 8029362:	4643      	movge	r3, r8
 8029364:	2b00      	cmp	r3, #0
 8029366:	bfc2      	ittt	gt
 8029368:	1aff      	subgt	r7, r7, r3
 802936a:	eba8 0803 	subgt.w	r8, r8, r3
 802936e:	eba9 0903 	subgt.w	r9, r9, r3
 8029372:	9b0a      	ldr	r3, [sp, #40]	@ 0x28
 8029374:	2b00      	cmp	r3, #0
 8029376:	dd16      	ble.n	80293a6 <_strtod_l+0x71e>
 8029378:	4629      	mov	r1, r5
 802937a:	9805      	ldr	r0, [sp, #20]
 802937c:	461a      	mov	r2, r3
 802937e:	f002 fd51 	bl	802be24 <__pow5mult>
 8029382:	4605      	mov	r5, r0
 8029384:	2800      	cmp	r0, #0
 8029386:	d0b5      	beq.n	80292f4 <_strtod_l+0x66c>
 8029388:	4601      	mov	r1, r0
 802938a:	9a12      	ldr	r2, [sp, #72]	@ 0x48
 802938c:	9805      	ldr	r0, [sp, #20]
 802938e:	f002 fc9f 	bl	802bcd0 <__multiply>
 8029392:	900f      	str	r0, [sp, #60]	@ 0x3c
 8029394:	2800      	cmp	r0, #0
 8029396:	f43f ae87 	beq.w	80290a8 <_strtod_l+0x420>
 802939a:	9912      	ldr	r1, [sp, #72]	@ 0x48
 802939c:	9805      	ldr	r0, [sp, #20]
 802939e:	f002 fb83 	bl	802baa8 <_Bfree>
 80293a2:	9b0f      	ldr	r3, [sp, #60]	@ 0x3c
 80293a4:	9312      	str	r3, [sp, #72]	@ 0x48
 80293a6:	2f00      	cmp	r7, #0
 80293a8:	dc1b      	bgt.n	80293e2 <_strtod_l+0x75a>
 80293aa:	9b09      	ldr	r3, [sp, #36]	@ 0x24
 80293ac:	2b00      	cmp	r3, #0
 80293ae:	dd21      	ble.n	80293f4 <_strtod_l+0x76c>
 80293b0:	4631      	mov	r1, r6
 80293b2:	9a0d      	ldr	r2, [sp, #52]	@ 0x34
 80293b4:	9805      	ldr	r0, [sp, #20]
 80293b6:	f002 fd35 	bl	802be24 <__pow5mult>
 80293ba:	4606      	mov	r6, r0
 80293bc:	b9d0      	cbnz	r0, 80293f4 <_strtod_l+0x76c>
 80293be:	2600      	movs	r6, #0
 80293c0:	e672      	b.n	80290a8 <_strtod_l+0x420>
 80293c2:	f1c7 477f 	rsb	r7, r7, #4278190080	@ 0xff000000
 80293c6:	f507 077f 	add.w	r7, r7, #16711680	@ 0xff0000
 80293ca:	f507 477b 	add.w	r7, r7, #64256	@ 0xfb00
 80293ce:	37e2      	adds	r7, #226	@ 0xe2
 80293d0:	fa02 f107 	lsl.w	r1, r2, r7
 80293d4:	910b      	str	r1, [sp, #44]	@ 0x2c
 80293d6:	920c      	str	r2, [sp, #48]	@ 0x30
 80293d8:	e7b8      	b.n	802934c <_strtod_l+0x6c4>
 80293da:	2200      	movs	r2, #0
 80293dc:	920b      	str	r2, [sp, #44]	@ 0x2c
 80293de:	2201      	movs	r2, #1
 80293e0:	e7f9      	b.n	80293d6 <_strtod_l+0x74e>
 80293e2:	9912      	ldr	r1, [sp, #72]	@ 0x48
 80293e4:	9805      	ldr	r0, [sp, #20]
 80293e6:	463a      	mov	r2, r7
 80293e8:	f002 fd76 	bl	802bed8 <__lshift>
 80293ec:	9012      	str	r0, [sp, #72]	@ 0x48
 80293ee:	2800      	cmp	r0, #0
 80293f0:	d1db      	bne.n	80293aa <_strtod_l+0x722>
 80293f2:	e659      	b.n	80290a8 <_strtod_l+0x420>
 80293f4:	f1b8 0f00 	cmp.w	r8, #0
 80293f8:	dd07      	ble.n	802940a <_strtod_l+0x782>
 80293fa:	4631      	mov	r1, r6
 80293fc:	9805      	ldr	r0, [sp, #20]
 80293fe:	4642      	mov	r2, r8
 8029400:	f002 fd6a 	bl	802bed8 <__lshift>
 8029404:	4606      	mov	r6, r0
 8029406:	2800      	cmp	r0, #0
 8029408:	d0d9      	beq.n	80293be <_strtod_l+0x736>
 802940a:	f1b9 0f00 	cmp.w	r9, #0
 802940e:	dd08      	ble.n	8029422 <_strtod_l+0x79a>
 8029410:	4629      	mov	r1, r5
 8029412:	9805      	ldr	r0, [sp, #20]
 8029414:	464a      	mov	r2, r9
 8029416:	f002 fd5f 	bl	802bed8 <__lshift>
 802941a:	4605      	mov	r5, r0
 802941c:	2800      	cmp	r0, #0
 802941e:	f43f ae43 	beq.w	80290a8 <_strtod_l+0x420>
 8029422:	9912      	ldr	r1, [sp, #72]	@ 0x48
 8029424:	9805      	ldr	r0, [sp, #20]
 8029426:	4632      	mov	r2, r6
 8029428:	f002 fdde 	bl	802bfe8 <__mdiff>
 802942c:	4604      	mov	r4, r0
 802942e:	2800      	cmp	r0, #0
 8029430:	f43f ae3a 	beq.w	80290a8 <_strtod_l+0x420>
 8029434:	2300      	movs	r3, #0
 8029436:	f8d0 800c 	ldr.w	r8, [r0, #12]
 802943a:	60c3      	str	r3, [r0, #12]
 802943c:	4629      	mov	r1, r5
 802943e:	f002 fdb7 	bl	802bfb0 <__mcmp>
 8029442:	2800      	cmp	r0, #0
 8029444:	da4e      	bge.n	80294e4 <_strtod_l+0x85c>
 8029446:	ea58 080a 	orrs.w	r8, r8, sl
 802944a:	d174      	bne.n	8029536 <_strtod_l+0x8ae>
 802944c:	f3cb 0313 	ubfx	r3, fp, #0, #20
 8029450:	2b00      	cmp	r3, #0
 8029452:	d170      	bne.n	8029536 <_strtod_l+0x8ae>
 8029454:	f02b 4300 	bic.w	r3, fp, #2147483648	@ 0x80000000
 8029458:	0d1b      	lsrs	r3, r3, #20
 802945a:	051b      	lsls	r3, r3, #20
 802945c:	f1b3 6fd6 	cmp.w	r3, #112197632	@ 0x6b00000
 8029460:	d969      	bls.n	8029536 <_strtod_l+0x8ae>
 8029462:	6963      	ldr	r3, [r4, #20]
 8029464:	b913      	cbnz	r3, 802946c <_strtod_l+0x7e4>
 8029466:	6923      	ldr	r3, [r4, #16]
 8029468:	2b01      	cmp	r3, #1
 802946a:	dd64      	ble.n	8029536 <_strtod_l+0x8ae>
 802946c:	4621      	mov	r1, r4
 802946e:	2201      	movs	r2, #1
 8029470:	9805      	ldr	r0, [sp, #20]
 8029472:	f002 fd31 	bl	802bed8 <__lshift>
 8029476:	4629      	mov	r1, r5
 8029478:	4604      	mov	r4, r0
 802947a:	f002 fd99 	bl	802bfb0 <__mcmp>
 802947e:	2800      	cmp	r0, #0
 8029480:	dd59      	ble.n	8029536 <_strtod_l+0x8ae>
 8029482:	f02b 4300 	bic.w	r3, fp, #2147483648	@ 0x80000000
 8029486:	9a06      	ldr	r2, [sp, #24]
 8029488:	0d1b      	lsrs	r3, r3, #20
 802948a:	051b      	lsls	r3, r3, #20
 802948c:	2a00      	cmp	r2, #0
 802948e:	d070      	beq.n	8029572 <_strtod_l+0x8ea>
 8029490:	f1b3 6fd6 	cmp.w	r3, #112197632	@ 0x6b00000
 8029494:	d86d      	bhi.n	8029572 <_strtod_l+0x8ea>
 8029496:	f1b3 7f5c 	cmp.w	r3, #57671680	@ 0x3700000
 802949a:	f67f ae99 	bls.w	80291d0 <_strtod_l+0x548>
 802949e:	ed9f 7b0c 	vldr	d7, [pc, #48]	@ 80294d0 <_strtod_l+0x848>
 80294a2:	ec4b ab16 	vmov	d6, sl, fp
 80294a6:	4b0e      	ldr	r3, [pc, #56]	@ (80294e0 <_strtod_l+0x858>)
 80294a8:	ee26 7b07 	vmul.f64	d7, d6, d7
 80294ac:	ee17 2a90 	vmov	r2, s15
 80294b0:	4013      	ands	r3, r2
 80294b2:	ec5b ab17 	vmov	sl, fp, d7
 80294b6:	2b00      	cmp	r3, #0
 80294b8:	f47f ae01 	bne.w	80290be <_strtod_l+0x436>
 80294bc:	9a05      	ldr	r2, [sp, #20]
 80294be:	2322      	movs	r3, #34	@ 0x22
 80294c0:	6013      	str	r3, [r2, #0]
 80294c2:	e5fc      	b.n	80290be <_strtod_l+0x436>
 80294c4:	f3af 8000 	nop.w
 80294c8:	ffc00000 	.word	0xffc00000
 80294cc:	41dfffff 	.word	0x41dfffff
 80294d0:	00000000 	.word	0x00000000
 80294d4:	39500000 	.word	0x39500000
 80294d8:	080315a8 	.word	0x080315a8
 80294dc:	fffffc02 	.word	0xfffffc02
 80294e0:	7ff00000 	.word	0x7ff00000
 80294e4:	46d9      	mov	r9, fp
 80294e6:	d15d      	bne.n	80295a4 <_strtod_l+0x91c>
 80294e8:	f3cb 0313 	ubfx	r3, fp, #0, #20
 80294ec:	f1b8 0f00 	cmp.w	r8, #0
 80294f0:	d02a      	beq.n	8029548 <_strtod_l+0x8c0>
 80294f2:	4aab      	ldr	r2, [pc, #684]	@ (80297a0 <_strtod_l+0xb18>)
 80294f4:	4293      	cmp	r3, r2
 80294f6:	d12a      	bne.n	802954e <_strtod_l+0x8c6>
 80294f8:	9b06      	ldr	r3, [sp, #24]
 80294fa:	4652      	mov	r2, sl
 80294fc:	b1fb      	cbz	r3, 802953e <_strtod_l+0x8b6>
 80294fe:	4ba9      	ldr	r3, [pc, #676]	@ (80297a4 <_strtod_l+0xb1c>)
 8029500:	ea0b 0303 	and.w	r3, fp, r3
 8029504:	f1b3 6fd4 	cmp.w	r3, #111149056	@ 0x6a00000
 8029508:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 802950c:	d81a      	bhi.n	8029544 <_strtod_l+0x8bc>
 802950e:	0d1b      	lsrs	r3, r3, #20
 8029510:	f1c3 036b 	rsb	r3, r3, #107	@ 0x6b
 8029514:	fa01 f303 	lsl.w	r3, r1, r3
 8029518:	429a      	cmp	r2, r3
 802951a:	d118      	bne.n	802954e <_strtod_l+0x8c6>
 802951c:	4ba2      	ldr	r3, [pc, #648]	@ (80297a8 <_strtod_l+0xb20>)
 802951e:	4599      	cmp	r9, r3
 8029520:	d102      	bne.n	8029528 <_strtod_l+0x8a0>
 8029522:	3201      	adds	r2, #1
 8029524:	f43f adc0 	beq.w	80290a8 <_strtod_l+0x420>
 8029528:	4b9e      	ldr	r3, [pc, #632]	@ (80297a4 <_strtod_l+0xb1c>)
 802952a:	ea09 0303 	and.w	r3, r9, r3
 802952e:	f503 1b80 	add.w	fp, r3, #1048576	@ 0x100000
 8029532:	f04f 0a00 	mov.w	sl, #0
 8029536:	9b06      	ldr	r3, [sp, #24]
 8029538:	2b00      	cmp	r3, #0
 802953a:	d1b0      	bne.n	802949e <_strtod_l+0x816>
 802953c:	e5bf      	b.n	80290be <_strtod_l+0x436>
 802953e:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8029542:	e7e9      	b.n	8029518 <_strtod_l+0x890>
 8029544:	460b      	mov	r3, r1
 8029546:	e7e7      	b.n	8029518 <_strtod_l+0x890>
 8029548:	ea53 030a 	orrs.w	r3, r3, sl
 802954c:	d099      	beq.n	8029482 <_strtod_l+0x7fa>
 802954e:	9b0b      	ldr	r3, [sp, #44]	@ 0x2c
 8029550:	b1c3      	cbz	r3, 8029584 <_strtod_l+0x8fc>
 8029552:	ea13 0f09 	tst.w	r3, r9
 8029556:	d0ee      	beq.n	8029536 <_strtod_l+0x8ae>
 8029558:	9a06      	ldr	r2, [sp, #24]
 802955a:	4650      	mov	r0, sl
 802955c:	4659      	mov	r1, fp
 802955e:	f1b8 0f00 	cmp.w	r8, #0
 8029562:	d013      	beq.n	802958c <_strtod_l+0x904>
 8029564:	f7ff fb74 	bl	8028c50 <sulp>
 8029568:	ee39 7b00 	vadd.f64	d7, d9, d0
 802956c:	ec5b ab17 	vmov	sl, fp, d7
 8029570:	e7e1      	b.n	8029536 <_strtod_l+0x8ae>
 8029572:	f5a3 1380 	sub.w	r3, r3, #1048576	@ 0x100000
 8029576:	ea6f 5b13 	mvn.w	fp, r3, lsr #20
 802957a:	ea6f 5b0b 	mvn.w	fp, fp, lsl #20
 802957e:	f04f 3aff 	mov.w	sl, #4294967295	@ 0xffffffff
 8029582:	e7d8      	b.n	8029536 <_strtod_l+0x8ae>
 8029584:	9b0c      	ldr	r3, [sp, #48]	@ 0x30
 8029586:	ea13 0f0a 	tst.w	r3, sl
 802958a:	e7e4      	b.n	8029556 <_strtod_l+0x8ce>
 802958c:	f7ff fb60 	bl	8028c50 <sulp>
 8029590:	ee39 0b40 	vsub.f64	d0, d9, d0
 8029594:	eeb5 0b40 	vcmp.f64	d0, #0.0
 8029598:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802959c:	ec5b ab10 	vmov	sl, fp, d0
 80295a0:	d1c9      	bne.n	8029536 <_strtod_l+0x8ae>
 80295a2:	e615      	b.n	80291d0 <_strtod_l+0x548>
 80295a4:	4629      	mov	r1, r5
 80295a6:	4620      	mov	r0, r4
 80295a8:	f002 fe7a 	bl	802c2a0 <__ratio>
 80295ac:	eeb0 7b00 	vmov.f64	d7, #0	@ 0x40000000  2.0
 80295b0:	eeb4 0bc7 	vcmpe.f64	d0, d7
 80295b4:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 80295b8:	d85d      	bhi.n	8029676 <_strtod_l+0x9ee>
 80295ba:	f1b8 0f00 	cmp.w	r8, #0
 80295be:	d164      	bne.n	802968a <_strtod_l+0xa02>
 80295c0:	f1ba 0f00 	cmp.w	sl, #0
 80295c4:	d14b      	bne.n	802965e <_strtod_l+0x9d6>
 80295c6:	f3cb 0313 	ubfx	r3, fp, #0, #20
 80295ca:	eeb7 8b00 	vmov.f64	d8, #112	@ 0x3f800000  1.0
 80295ce:	2b00      	cmp	r3, #0
 80295d0:	d160      	bne.n	8029694 <_strtod_l+0xa0c>
 80295d2:	eeb4 0bc8 	vcmpe.f64	d0, d8
 80295d6:	eeb6 8b00 	vmov.f64	d8, #96	@ 0x3f000000  0.5
 80295da:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 80295de:	d401      	bmi.n	80295e4 <_strtod_l+0x95c>
 80295e0:	ee20 8b08 	vmul.f64	d8, d0, d8
 80295e4:	eeb1 ab48 	vneg.f64	d10, d8
 80295e8:	486e      	ldr	r0, [pc, #440]	@ (80297a4 <_strtod_l+0xb1c>)
 80295ea:	4970      	ldr	r1, [pc, #448]	@ (80297ac <_strtod_l+0xb24>)
 80295ec:	ea09 0700 	and.w	r7, r9, r0
 80295f0:	428f      	cmp	r7, r1
 80295f2:	ec53 2b1a 	vmov	r2, r3, d10
 80295f6:	d17d      	bne.n	80296f4 <_strtod_l+0xa6c>
 80295f8:	f1a9 7b54 	sub.w	fp, r9, #55574528	@ 0x3500000
 80295fc:	ec4b ab1c 	vmov	d12, sl, fp
 8029600:	eeb0 0b4c 	vmov.f64	d0, d12
 8029604:	f002 fd84 	bl	802c110 <__ulp>
 8029608:	4866      	ldr	r0, [pc, #408]	@ (80297a4 <_strtod_l+0xb1c>)
 802960a:	eea0 cb0a 	vfma.f64	d12, d0, d10
 802960e:	ee1c 3a90 	vmov	r3, s25
 8029612:	4a67      	ldr	r2, [pc, #412]	@ (80297b0 <_strtod_l+0xb28>)
 8029614:	ea03 0100 	and.w	r1, r3, r0
 8029618:	4291      	cmp	r1, r2
 802961a:	ec5b ab1c 	vmov	sl, fp, d12
 802961e:	d93c      	bls.n	802969a <_strtod_l+0xa12>
 8029620:	ee19 2a90 	vmov	r2, s19
 8029624:	4b60      	ldr	r3, [pc, #384]	@ (80297a8 <_strtod_l+0xb20>)
 8029626:	429a      	cmp	r2, r3
 8029628:	d104      	bne.n	8029634 <_strtod_l+0x9ac>
 802962a:	ee19 3a10 	vmov	r3, s18
 802962e:	3301      	adds	r3, #1
 8029630:	f43f ad3a 	beq.w	80290a8 <_strtod_l+0x420>
 8029634:	f8df b170 	ldr.w	fp, [pc, #368]	@ 80297a8 <_strtod_l+0xb20>
 8029638:	f04f 3aff 	mov.w	sl, #4294967295	@ 0xffffffff
 802963c:	9912      	ldr	r1, [sp, #72]	@ 0x48
 802963e:	9805      	ldr	r0, [sp, #20]
 8029640:	f002 fa32 	bl	802baa8 <_Bfree>
 8029644:	9805      	ldr	r0, [sp, #20]
 8029646:	4631      	mov	r1, r6
 8029648:	f002 fa2e 	bl	802baa8 <_Bfree>
 802964c:	9805      	ldr	r0, [sp, #20]
 802964e:	4629      	mov	r1, r5
 8029650:	f002 fa2a 	bl	802baa8 <_Bfree>
 8029654:	9805      	ldr	r0, [sp, #20]
 8029656:	4621      	mov	r1, r4
 8029658:	f002 fa26 	bl	802baa8 <_Bfree>
 802965c:	e625      	b.n	80292aa <_strtod_l+0x622>
 802965e:	f1ba 0f01 	cmp.w	sl, #1
 8029662:	d103      	bne.n	802966c <_strtod_l+0x9e4>
 8029664:	f1bb 0f00 	cmp.w	fp, #0
 8029668:	f43f adb2 	beq.w	80291d0 <_strtod_l+0x548>
 802966c:	eebf ab00 	vmov.f64	d10, #240	@ 0xbf800000 -1.0
 8029670:	eeb7 8b00 	vmov.f64	d8, #112	@ 0x3f800000  1.0
 8029674:	e7b8      	b.n	80295e8 <_strtod_l+0x960>
 8029676:	eeb6 8b00 	vmov.f64	d8, #96	@ 0x3f000000  0.5
 802967a:	ee20 8b08 	vmul.f64	d8, d0, d8
 802967e:	f1b8 0f00 	cmp.w	r8, #0
 8029682:	d0af      	beq.n	80295e4 <_strtod_l+0x95c>
 8029684:	eeb0 ab48 	vmov.f64	d10, d8
 8029688:	e7ae      	b.n	80295e8 <_strtod_l+0x960>
 802968a:	eeb7 ab00 	vmov.f64	d10, #112	@ 0x3f800000  1.0
 802968e:	eeb0 8b4a 	vmov.f64	d8, d10
 8029692:	e7a9      	b.n	80295e8 <_strtod_l+0x960>
 8029694:	eebf ab00 	vmov.f64	d10, #240	@ 0xbf800000 -1.0
 8029698:	e7a6      	b.n	80295e8 <_strtod_l+0x960>
 802969a:	f103 7b54 	add.w	fp, r3, #55574528	@ 0x3500000
 802969e:	9b06      	ldr	r3, [sp, #24]
 80296a0:	46d9      	mov	r9, fp
 80296a2:	2b00      	cmp	r3, #0
 80296a4:	d1ca      	bne.n	802963c <_strtod_l+0x9b4>
 80296a6:	f02b 4300 	bic.w	r3, fp, #2147483648	@ 0x80000000
 80296aa:	0d1b      	lsrs	r3, r3, #20
 80296ac:	051b      	lsls	r3, r3, #20
 80296ae:	429f      	cmp	r7, r3
 80296b0:	d1c4      	bne.n	802963c <_strtod_l+0x9b4>
 80296b2:	ec51 0b18 	vmov	r0, r1, d8
 80296b6:	f7d7 f84f 	bl	8000758 <__aeabi_d2lz>
 80296ba:	f7d7 f807 	bl	80006cc <__aeabi_l2d>
 80296be:	f3cb 0913 	ubfx	r9, fp, #0, #20
 80296c2:	ec41 0b17 	vmov	d7, r0, r1
 80296c6:	ea49 090a 	orr.w	r9, r9, sl
 80296ca:	ea59 0908 	orrs.w	r9, r9, r8
 80296ce:	ee38 8b47 	vsub.f64	d8, d8, d7
 80296d2:	d03c      	beq.n	802974e <_strtod_l+0xac6>
 80296d4:	ed9f 7b2c 	vldr	d7, [pc, #176]	@ 8029788 <_strtod_l+0xb00>
 80296d8:	eeb4 8bc7 	vcmpe.f64	d8, d7
 80296dc:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 80296e0:	f53f aced 	bmi.w	80290be <_strtod_l+0x436>
 80296e4:	ed9f 7b2a 	vldr	d7, [pc, #168]	@ 8029790 <_strtod_l+0xb08>
 80296e8:	eeb4 8bc7 	vcmpe.f64	d8, d7
 80296ec:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 80296f0:	dda4      	ble.n	802963c <_strtod_l+0x9b4>
 80296f2:	e4e4      	b.n	80290be <_strtod_l+0x436>
 80296f4:	9906      	ldr	r1, [sp, #24]
 80296f6:	b1e1      	cbz	r1, 8029732 <_strtod_l+0xaaa>
 80296f8:	f1b7 6fd4 	cmp.w	r7, #111149056	@ 0x6a00000
 80296fc:	d819      	bhi.n	8029732 <_strtod_l+0xaaa>
 80296fe:	eeb4 8bcb 	vcmpe.f64	d8, d11
 8029702:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 8029706:	d811      	bhi.n	802972c <_strtod_l+0xaa4>
 8029708:	eebc 8bc8 	vcvt.u32.f64	s16, d8
 802970c:	ee18 3a10 	vmov	r3, s16
 8029710:	2b01      	cmp	r3, #1
 8029712:	bf38      	it	cc
 8029714:	2301      	movcc	r3, #1
 8029716:	ee08 3a10 	vmov	s16, r3
 802971a:	eeb8 8b48 	vcvt.f64.u32	d8, s16
 802971e:	f1b8 0f00 	cmp.w	r8, #0
 8029722:	d111      	bne.n	8029748 <_strtod_l+0xac0>
 8029724:	eeb1 7b48 	vneg.f64	d7, d8
 8029728:	ec53 2b17 	vmov	r2, r3, d7
 802972c:	f103 61d6 	add.w	r1, r3, #112197632	@ 0x6b00000
 8029730:	1bcb      	subs	r3, r1, r7
 8029732:	eeb0 0b49 	vmov.f64	d0, d9
 8029736:	ec43 2b1a 	vmov	d10, r2, r3
 802973a:	f002 fce9 	bl	802c110 <__ulp>
 802973e:	eeaa 9b00 	vfma.f64	d9, d10, d0
 8029742:	ec5b ab19 	vmov	sl, fp, d9
 8029746:	e7aa      	b.n	802969e <_strtod_l+0xa16>
 8029748:	eeb0 7b48 	vmov.f64	d7, d8
 802974c:	e7ec      	b.n	8029728 <_strtod_l+0xaa0>
 802974e:	ed9f 7b12 	vldr	d7, [pc, #72]	@ 8029798 <_strtod_l+0xb10>
 8029752:	eeb4 8bc7 	vcmpe.f64	d8, d7
 8029756:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802975a:	f57f af6f 	bpl.w	802963c <_strtod_l+0x9b4>
 802975e:	e4ae      	b.n	80290be <_strtod_l+0x436>
 8029760:	2300      	movs	r3, #0
 8029762:	9308      	str	r3, [sp, #32]
 8029764:	9a0e      	ldr	r2, [sp, #56]	@ 0x38
 8029766:	9b11      	ldr	r3, [sp, #68]	@ 0x44
 8029768:	6013      	str	r3, [r2, #0]
 802976a:	f7ff bacc 	b.w	8028d06 <_strtod_l+0x7e>
 802976e:	2a65      	cmp	r2, #101	@ 0x65
 8029770:	f43f abbc 	beq.w	8028eec <_strtod_l+0x264>
 8029774:	2a45      	cmp	r2, #69	@ 0x45
 8029776:	f43f abb9 	beq.w	8028eec <_strtod_l+0x264>
 802977a:	2301      	movs	r3, #1
 802977c:	9306      	str	r3, [sp, #24]
 802977e:	f7ff bbf0 	b.w	8028f62 <_strtod_l+0x2da>
 8029782:	bf00      	nop
 8029784:	f3af 8000 	nop.w
 8029788:	94a03595 	.word	0x94a03595
 802978c:	3fdfffff 	.word	0x3fdfffff
 8029790:	35afe535 	.word	0x35afe535
 8029794:	3fe00000 	.word	0x3fe00000
 8029798:	94a03595 	.word	0x94a03595
 802979c:	3fcfffff 	.word	0x3fcfffff
 80297a0:	000fffff 	.word	0x000fffff
 80297a4:	7ff00000 	.word	0x7ff00000
 80297a8:	7fefffff 	.word	0x7fefffff
 80297ac:	7fe00000 	.word	0x7fe00000
 80297b0:	7c9fffff 	.word	0x7c9fffff

080297b4 <strtod>:
 80297b4:	460a      	mov	r2, r1
 80297b6:	4601      	mov	r1, r0
 80297b8:	4802      	ldr	r0, [pc, #8]	@ (80297c4 <strtod+0x10>)
 80297ba:	4b03      	ldr	r3, [pc, #12]	@ (80297c8 <strtod+0x14>)
 80297bc:	6800      	ldr	r0, [r0, #0]
 80297be:	f7ff ba63 	b.w	8028c88 <_strtod_l>
 80297c2:	bf00      	nop
 80297c4:	240001d4 	.word	0x240001d4
 80297c8:	24000068 	.word	0x24000068

080297cc <__cvt>:
 80297cc:	b5f0      	push	{r4, r5, r6, r7, lr}
 80297ce:	ed2d 8b02 	vpush	{d8}
 80297d2:	eeb0 8b40 	vmov.f64	d8, d0
 80297d6:	b085      	sub	sp, #20
 80297d8:	4617      	mov	r7, r2
 80297da:	9d0d      	ldr	r5, [sp, #52]	@ 0x34
 80297dc:	9e0c      	ldr	r6, [sp, #48]	@ 0x30
 80297de:	ee18 2a90 	vmov	r2, s17
 80297e2:	f025 0520 	bic.w	r5, r5, #32
 80297e6:	2a00      	cmp	r2, #0
 80297e8:	bfb6      	itet	lt
 80297ea:	222d      	movlt	r2, #45	@ 0x2d
 80297ec:	2200      	movge	r2, #0
 80297ee:	eeb1 8b40 	vneglt.f64	d8, d0
 80297f2:	2d46      	cmp	r5, #70	@ 0x46
 80297f4:	460c      	mov	r4, r1
 80297f6:	701a      	strb	r2, [r3, #0]
 80297f8:	d004      	beq.n	8029804 <__cvt+0x38>
 80297fa:	2d45      	cmp	r5, #69	@ 0x45
 80297fc:	d100      	bne.n	8029800 <__cvt+0x34>
 80297fe:	3401      	adds	r4, #1
 8029800:	2102      	movs	r1, #2
 8029802:	e000      	b.n	8029806 <__cvt+0x3a>
 8029804:	2103      	movs	r1, #3
 8029806:	ab03      	add	r3, sp, #12
 8029808:	9301      	str	r3, [sp, #4]
 802980a:	ab02      	add	r3, sp, #8
 802980c:	9300      	str	r3, [sp, #0]
 802980e:	4622      	mov	r2, r4
 8029810:	4633      	mov	r3, r6
 8029812:	eeb0 0b48 	vmov.f64	d0, d8
 8029816:	f001 f81b 	bl	802a850 <_dtoa_r>
 802981a:	2d47      	cmp	r5, #71	@ 0x47
 802981c:	d114      	bne.n	8029848 <__cvt+0x7c>
 802981e:	07fb      	lsls	r3, r7, #31
 8029820:	d50a      	bpl.n	8029838 <__cvt+0x6c>
 8029822:	1902      	adds	r2, r0, r4
 8029824:	eeb5 8b40 	vcmp.f64	d8, #0.0
 8029828:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802982c:	bf08      	it	eq
 802982e:	9203      	streq	r2, [sp, #12]
 8029830:	2130      	movs	r1, #48	@ 0x30
 8029832:	9b03      	ldr	r3, [sp, #12]
 8029834:	4293      	cmp	r3, r2
 8029836:	d319      	bcc.n	802986c <__cvt+0xa0>
 8029838:	9b03      	ldr	r3, [sp, #12]
 802983a:	9a0e      	ldr	r2, [sp, #56]	@ 0x38
 802983c:	1a1b      	subs	r3, r3, r0
 802983e:	6013      	str	r3, [r2, #0]
 8029840:	b005      	add	sp, #20
 8029842:	ecbd 8b02 	vpop	{d8}
 8029846:	bdf0      	pop	{r4, r5, r6, r7, pc}
 8029848:	2d46      	cmp	r5, #70	@ 0x46
 802984a:	eb00 0204 	add.w	r2, r0, r4
 802984e:	d1e9      	bne.n	8029824 <__cvt+0x58>
 8029850:	7803      	ldrb	r3, [r0, #0]
 8029852:	2b30      	cmp	r3, #48	@ 0x30
 8029854:	d107      	bne.n	8029866 <__cvt+0x9a>
 8029856:	eeb5 8b40 	vcmp.f64	d8, #0.0
 802985a:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802985e:	bf1c      	itt	ne
 8029860:	f1c4 0401 	rsbne	r4, r4, #1
 8029864:	6034      	strne	r4, [r6, #0]
 8029866:	6833      	ldr	r3, [r6, #0]
 8029868:	441a      	add	r2, r3
 802986a:	e7db      	b.n	8029824 <__cvt+0x58>
 802986c:	1c5c      	adds	r4, r3, #1
 802986e:	9403      	str	r4, [sp, #12]
 8029870:	7019      	strb	r1, [r3, #0]
 8029872:	e7de      	b.n	8029832 <__cvt+0x66>

08029874 <__exponent>:
 8029874:	b5f7      	push	{r0, r1, r2, r4, r5, r6, r7, lr}
 8029876:	2900      	cmp	r1, #0
 8029878:	bfba      	itte	lt
 802987a:	4249      	neglt	r1, r1
 802987c:	232d      	movlt	r3, #45	@ 0x2d
 802987e:	232b      	movge	r3, #43	@ 0x2b
 8029880:	2909      	cmp	r1, #9
 8029882:	7002      	strb	r2, [r0, #0]
 8029884:	7043      	strb	r3, [r0, #1]
 8029886:	dd29      	ble.n	80298dc <__exponent+0x68>
 8029888:	f10d 0307 	add.w	r3, sp, #7
 802988c:	461d      	mov	r5, r3
 802988e:	270a      	movs	r7, #10
 8029890:	461a      	mov	r2, r3
 8029892:	fbb1 f6f7 	udiv	r6, r1, r7
 8029896:	fb07 1416 	mls	r4, r7, r6, r1
 802989a:	3430      	adds	r4, #48	@ 0x30
 802989c:	f802 4c01 	strb.w	r4, [r2, #-1]
 80298a0:	460c      	mov	r4, r1
 80298a2:	2c63      	cmp	r4, #99	@ 0x63
 80298a4:	f103 33ff 	add.w	r3, r3, #4294967295	@ 0xffffffff
 80298a8:	4631      	mov	r1, r6
 80298aa:	dcf1      	bgt.n	8029890 <__exponent+0x1c>
 80298ac:	3130      	adds	r1, #48	@ 0x30
 80298ae:	1e94      	subs	r4, r2, #2
 80298b0:	f803 1c01 	strb.w	r1, [r3, #-1]
 80298b4:	1c41      	adds	r1, r0, #1
 80298b6:	4623      	mov	r3, r4
 80298b8:	42ab      	cmp	r3, r5
 80298ba:	d30a      	bcc.n	80298d2 <__exponent+0x5e>
 80298bc:	f10d 0309 	add.w	r3, sp, #9
 80298c0:	1a9b      	subs	r3, r3, r2
 80298c2:	42ac      	cmp	r4, r5
 80298c4:	bf88      	it	hi
 80298c6:	2300      	movhi	r3, #0
 80298c8:	3302      	adds	r3, #2
 80298ca:	4403      	add	r3, r0
 80298cc:	1a18      	subs	r0, r3, r0
 80298ce:	b003      	add	sp, #12
 80298d0:	bdf0      	pop	{r4, r5, r6, r7, pc}
 80298d2:	f813 6b01 	ldrb.w	r6, [r3], #1
 80298d6:	f801 6f01 	strb.w	r6, [r1, #1]!
 80298da:	e7ed      	b.n	80298b8 <__exponent+0x44>
 80298dc:	2330      	movs	r3, #48	@ 0x30
 80298de:	3130      	adds	r1, #48	@ 0x30
 80298e0:	7083      	strb	r3, [r0, #2]
 80298e2:	70c1      	strb	r1, [r0, #3]
 80298e4:	1d03      	adds	r3, r0, #4
 80298e6:	e7f1      	b.n	80298cc <__exponent+0x58>

080298e8 <_printf_float>:
 80298e8:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 80298ec:	b08d      	sub	sp, #52	@ 0x34
 80298ee:	460c      	mov	r4, r1
 80298f0:	f8dd 8058 	ldr.w	r8, [sp, #88]	@ 0x58
 80298f4:	4616      	mov	r6, r2
 80298f6:	461f      	mov	r7, r3
 80298f8:	4605      	mov	r5, r0
 80298fa:	f000 fe0b 	bl	802a514 <_localeconv_r>
 80298fe:	f8d0 b000 	ldr.w	fp, [r0]
 8029902:	4658      	mov	r0, fp
 8029904:	f7d6 fd4c 	bl	80003a0 <strlen>
 8029908:	2300      	movs	r3, #0
 802990a:	930a      	str	r3, [sp, #40]	@ 0x28
 802990c:	f8d8 3000 	ldr.w	r3, [r8]
 8029910:	f894 9018 	ldrb.w	r9, [r4, #24]
 8029914:	6822      	ldr	r2, [r4, #0]
 8029916:	9005      	str	r0, [sp, #20]
 8029918:	3307      	adds	r3, #7
 802991a:	f023 0307 	bic.w	r3, r3, #7
 802991e:	f103 0108 	add.w	r1, r3, #8
 8029922:	f8c8 1000 	str.w	r1, [r8]
 8029926:	ed93 0b00 	vldr	d0, [r3]
 802992a:	ed9f 6b97 	vldr	d6, [pc, #604]	@ 8029b88 <_printf_float+0x2a0>
 802992e:	eeb0 7bc0 	vabs.f64	d7, d0
 8029932:	eeb4 7b46 	vcmp.f64	d7, d6
 8029936:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802993a:	ed84 0b12 	vstr	d0, [r4, #72]	@ 0x48
 802993e:	dd24      	ble.n	802998a <_printf_float+0xa2>
 8029940:	eeb5 0bc0 	vcmpe.f64	d0, #0.0
 8029944:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 8029948:	d502      	bpl.n	8029950 <_printf_float+0x68>
 802994a:	232d      	movs	r3, #45	@ 0x2d
 802994c:	f884 3043 	strb.w	r3, [r4, #67]	@ 0x43
 8029950:	498f      	ldr	r1, [pc, #572]	@ (8029b90 <_printf_float+0x2a8>)
 8029952:	4b90      	ldr	r3, [pc, #576]	@ (8029b94 <_printf_float+0x2ac>)
 8029954:	f1b9 0f47 	cmp.w	r9, #71	@ 0x47
 8029958:	bf94      	ite	ls
 802995a:	4688      	movls	r8, r1
 802995c:	4698      	movhi	r8, r3
 802995e:	f022 0204 	bic.w	r2, r2, #4
 8029962:	2303      	movs	r3, #3
 8029964:	6123      	str	r3, [r4, #16]
 8029966:	6022      	str	r2, [r4, #0]
 8029968:	f04f 0a00 	mov.w	sl, #0
 802996c:	9700      	str	r7, [sp, #0]
 802996e:	4633      	mov	r3, r6
 8029970:	aa0b      	add	r2, sp, #44	@ 0x2c
 8029972:	4621      	mov	r1, r4
 8029974:	4628      	mov	r0, r5
 8029976:	f000 f9d1 	bl	8029d1c <_printf_common>
 802997a:	3001      	adds	r0, #1
 802997c:	f040 8089 	bne.w	8029a92 <_printf_float+0x1aa>
 8029980:	f04f 30ff 	mov.w	r0, #4294967295	@ 0xffffffff
 8029984:	b00d      	add	sp, #52	@ 0x34
 8029986:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 802998a:	eeb4 0b40 	vcmp.f64	d0, d0
 802998e:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 8029992:	d709      	bvc.n	80299a8 <_printf_float+0xc0>
 8029994:	ee10 3a90 	vmov	r3, s1
 8029998:	2b00      	cmp	r3, #0
 802999a:	bfbc      	itt	lt
 802999c:	232d      	movlt	r3, #45	@ 0x2d
 802999e:	f884 3043 	strblt.w	r3, [r4, #67]	@ 0x43
 80299a2:	497d      	ldr	r1, [pc, #500]	@ (8029b98 <_printf_float+0x2b0>)
 80299a4:	4b7d      	ldr	r3, [pc, #500]	@ (8029b9c <_printf_float+0x2b4>)
 80299a6:	e7d5      	b.n	8029954 <_printf_float+0x6c>
 80299a8:	6863      	ldr	r3, [r4, #4]
 80299aa:	1c59      	adds	r1, r3, #1
 80299ac:	f009 0adf 	and.w	sl, r9, #223	@ 0xdf
 80299b0:	d139      	bne.n	8029a26 <_printf_float+0x13e>
 80299b2:	2306      	movs	r3, #6
 80299b4:	6063      	str	r3, [r4, #4]
 80299b6:	f442 6280 	orr.w	r2, r2, #1024	@ 0x400
 80299ba:	2300      	movs	r3, #0
 80299bc:	6022      	str	r2, [r4, #0]
 80299be:	9303      	str	r3, [sp, #12]
 80299c0:	ab0a      	add	r3, sp, #40	@ 0x28
 80299c2:	e9cd 9301 	strd	r9, r3, [sp, #4]
 80299c6:	ab09      	add	r3, sp, #36	@ 0x24
 80299c8:	9300      	str	r3, [sp, #0]
 80299ca:	6861      	ldr	r1, [r4, #4]
 80299cc:	f10d 0323 	add.w	r3, sp, #35	@ 0x23
 80299d0:	4628      	mov	r0, r5
 80299d2:	f7ff fefb 	bl	80297cc <__cvt>
 80299d6:	f1ba 0f47 	cmp.w	sl, #71	@ 0x47
 80299da:	9909      	ldr	r1, [sp, #36]	@ 0x24
 80299dc:	4680      	mov	r8, r0
 80299de:	d129      	bne.n	8029a34 <_printf_float+0x14c>
 80299e0:	1cc8      	adds	r0, r1, #3
 80299e2:	db02      	blt.n	80299ea <_printf_float+0x102>
 80299e4:	6863      	ldr	r3, [r4, #4]
 80299e6:	4299      	cmp	r1, r3
 80299e8:	dd41      	ble.n	8029a6e <_printf_float+0x186>
 80299ea:	f1a9 0902 	sub.w	r9, r9, #2
 80299ee:	fa5f f989 	uxtb.w	r9, r9
 80299f2:	3901      	subs	r1, #1
 80299f4:	464a      	mov	r2, r9
 80299f6:	f104 0050 	add.w	r0, r4, #80	@ 0x50
 80299fa:	9109      	str	r1, [sp, #36]	@ 0x24
 80299fc:	f7ff ff3a 	bl	8029874 <__exponent>
 8029a00:	9a0a      	ldr	r2, [sp, #40]	@ 0x28
 8029a02:	1813      	adds	r3, r2, r0
 8029a04:	2a01      	cmp	r2, #1
 8029a06:	4682      	mov	sl, r0
 8029a08:	6123      	str	r3, [r4, #16]
 8029a0a:	dc02      	bgt.n	8029a12 <_printf_float+0x12a>
 8029a0c:	6822      	ldr	r2, [r4, #0]
 8029a0e:	07d2      	lsls	r2, r2, #31
 8029a10:	d501      	bpl.n	8029a16 <_printf_float+0x12e>
 8029a12:	3301      	adds	r3, #1
 8029a14:	6123      	str	r3, [r4, #16]
 8029a16:	f89d 3023 	ldrb.w	r3, [sp, #35]	@ 0x23
 8029a1a:	2b00      	cmp	r3, #0
 8029a1c:	d0a6      	beq.n	802996c <_printf_float+0x84>
 8029a1e:	232d      	movs	r3, #45	@ 0x2d
 8029a20:	f884 3043 	strb.w	r3, [r4, #67]	@ 0x43
 8029a24:	e7a2      	b.n	802996c <_printf_float+0x84>
 8029a26:	f1ba 0f47 	cmp.w	sl, #71	@ 0x47
 8029a2a:	d1c4      	bne.n	80299b6 <_printf_float+0xce>
 8029a2c:	2b00      	cmp	r3, #0
 8029a2e:	d1c2      	bne.n	80299b6 <_printf_float+0xce>
 8029a30:	2301      	movs	r3, #1
 8029a32:	e7bf      	b.n	80299b4 <_printf_float+0xcc>
 8029a34:	f1b9 0f65 	cmp.w	r9, #101	@ 0x65
 8029a38:	d9db      	bls.n	80299f2 <_printf_float+0x10a>
 8029a3a:	f1b9 0f66 	cmp.w	r9, #102	@ 0x66
 8029a3e:	d118      	bne.n	8029a72 <_printf_float+0x18a>
 8029a40:	2900      	cmp	r1, #0
 8029a42:	6863      	ldr	r3, [r4, #4]
 8029a44:	dd0b      	ble.n	8029a5e <_printf_float+0x176>
 8029a46:	6121      	str	r1, [r4, #16]
 8029a48:	b913      	cbnz	r3, 8029a50 <_printf_float+0x168>
 8029a4a:	6822      	ldr	r2, [r4, #0]
 8029a4c:	07d0      	lsls	r0, r2, #31
 8029a4e:	d502      	bpl.n	8029a56 <_printf_float+0x16e>
 8029a50:	3301      	adds	r3, #1
 8029a52:	440b      	add	r3, r1
 8029a54:	6123      	str	r3, [r4, #16]
 8029a56:	65a1      	str	r1, [r4, #88]	@ 0x58
 8029a58:	f04f 0a00 	mov.w	sl, #0
 8029a5c:	e7db      	b.n	8029a16 <_printf_float+0x12e>
 8029a5e:	b913      	cbnz	r3, 8029a66 <_printf_float+0x17e>
 8029a60:	6822      	ldr	r2, [r4, #0]
 8029a62:	07d2      	lsls	r2, r2, #31
 8029a64:	d501      	bpl.n	8029a6a <_printf_float+0x182>
 8029a66:	3302      	adds	r3, #2
 8029a68:	e7f4      	b.n	8029a54 <_printf_float+0x16c>
 8029a6a:	2301      	movs	r3, #1
 8029a6c:	e7f2      	b.n	8029a54 <_printf_float+0x16c>
 8029a6e:	f04f 0967 	mov.w	r9, #103	@ 0x67
 8029a72:	9b0a      	ldr	r3, [sp, #40]	@ 0x28
 8029a74:	4299      	cmp	r1, r3
 8029a76:	db05      	blt.n	8029a84 <_printf_float+0x19c>
 8029a78:	6823      	ldr	r3, [r4, #0]
 8029a7a:	6121      	str	r1, [r4, #16]
 8029a7c:	07d8      	lsls	r0, r3, #31
 8029a7e:	d5ea      	bpl.n	8029a56 <_printf_float+0x16e>
 8029a80:	1c4b      	adds	r3, r1, #1
 8029a82:	e7e7      	b.n	8029a54 <_printf_float+0x16c>
 8029a84:	2900      	cmp	r1, #0
 8029a86:	bfd4      	ite	le
 8029a88:	f1c1 0202 	rsble	r2, r1, #2
 8029a8c:	2201      	movgt	r2, #1
 8029a8e:	4413      	add	r3, r2
 8029a90:	e7e0      	b.n	8029a54 <_printf_float+0x16c>
 8029a92:	6823      	ldr	r3, [r4, #0]
 8029a94:	055a      	lsls	r2, r3, #21
 8029a96:	d407      	bmi.n	8029aa8 <_printf_float+0x1c0>
 8029a98:	6923      	ldr	r3, [r4, #16]
 8029a9a:	4642      	mov	r2, r8
 8029a9c:	4631      	mov	r1, r6
 8029a9e:	4628      	mov	r0, r5
 8029aa0:	47b8      	blx	r7
 8029aa2:	3001      	adds	r0, #1
 8029aa4:	d12a      	bne.n	8029afc <_printf_float+0x214>
 8029aa6:	e76b      	b.n	8029980 <_printf_float+0x98>
 8029aa8:	f1b9 0f65 	cmp.w	r9, #101	@ 0x65
 8029aac:	f240 80e0 	bls.w	8029c70 <_printf_float+0x388>
 8029ab0:	ed94 7b12 	vldr	d7, [r4, #72]	@ 0x48
 8029ab4:	eeb5 7b40 	vcmp.f64	d7, #0.0
 8029ab8:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 8029abc:	d133      	bne.n	8029b26 <_printf_float+0x23e>
 8029abe:	4a38      	ldr	r2, [pc, #224]	@ (8029ba0 <_printf_float+0x2b8>)
 8029ac0:	2301      	movs	r3, #1
 8029ac2:	4631      	mov	r1, r6
 8029ac4:	4628      	mov	r0, r5
 8029ac6:	47b8      	blx	r7
 8029ac8:	3001      	adds	r0, #1
 8029aca:	f43f af59 	beq.w	8029980 <_printf_float+0x98>
 8029ace:	e9dd 3809 	ldrd	r3, r8, [sp, #36]	@ 0x24
 8029ad2:	4543      	cmp	r3, r8
 8029ad4:	db02      	blt.n	8029adc <_printf_float+0x1f4>
 8029ad6:	6823      	ldr	r3, [r4, #0]
 8029ad8:	07d8      	lsls	r0, r3, #31
 8029ada:	d50f      	bpl.n	8029afc <_printf_float+0x214>
 8029adc:	9b05      	ldr	r3, [sp, #20]
 8029ade:	465a      	mov	r2, fp
 8029ae0:	4631      	mov	r1, r6
 8029ae2:	4628      	mov	r0, r5
 8029ae4:	47b8      	blx	r7
 8029ae6:	3001      	adds	r0, #1
 8029ae8:	f43f af4a 	beq.w	8029980 <_printf_float+0x98>
 8029aec:	f04f 0900 	mov.w	r9, #0
 8029af0:	f108 38ff 	add.w	r8, r8, #4294967295	@ 0xffffffff
 8029af4:	f104 0a1a 	add.w	sl, r4, #26
 8029af8:	45c8      	cmp	r8, r9
 8029afa:	dc09      	bgt.n	8029b10 <_printf_float+0x228>
 8029afc:	6823      	ldr	r3, [r4, #0]
 8029afe:	079b      	lsls	r3, r3, #30
 8029b00:	f100 8107 	bmi.w	8029d12 <_printf_float+0x42a>
 8029b04:	68e0      	ldr	r0, [r4, #12]
 8029b06:	9b0b      	ldr	r3, [sp, #44]	@ 0x2c
 8029b08:	4298      	cmp	r0, r3
 8029b0a:	bfb8      	it	lt
 8029b0c:	4618      	movlt	r0, r3
 8029b0e:	e739      	b.n	8029984 <_printf_float+0x9c>
 8029b10:	2301      	movs	r3, #1
 8029b12:	4652      	mov	r2, sl
 8029b14:	4631      	mov	r1, r6
 8029b16:	4628      	mov	r0, r5
 8029b18:	47b8      	blx	r7
 8029b1a:	3001      	adds	r0, #1
 8029b1c:	f43f af30 	beq.w	8029980 <_printf_float+0x98>
 8029b20:	f109 0901 	add.w	r9, r9, #1
 8029b24:	e7e8      	b.n	8029af8 <_printf_float+0x210>
 8029b26:	9b09      	ldr	r3, [sp, #36]	@ 0x24
 8029b28:	2b00      	cmp	r3, #0
 8029b2a:	dc3b      	bgt.n	8029ba4 <_printf_float+0x2bc>
 8029b2c:	4a1c      	ldr	r2, [pc, #112]	@ (8029ba0 <_printf_float+0x2b8>)
 8029b2e:	2301      	movs	r3, #1
 8029b30:	4631      	mov	r1, r6
 8029b32:	4628      	mov	r0, r5
 8029b34:	47b8      	blx	r7
 8029b36:	3001      	adds	r0, #1
 8029b38:	f43f af22 	beq.w	8029980 <_printf_float+0x98>
 8029b3c:	e9dd 3909 	ldrd	r3, r9, [sp, #36]	@ 0x24
 8029b40:	ea59 0303 	orrs.w	r3, r9, r3
 8029b44:	d102      	bne.n	8029b4c <_printf_float+0x264>
 8029b46:	6823      	ldr	r3, [r4, #0]
 8029b48:	07d9      	lsls	r1, r3, #31
 8029b4a:	d5d7      	bpl.n	8029afc <_printf_float+0x214>
 8029b4c:	9b05      	ldr	r3, [sp, #20]
 8029b4e:	465a      	mov	r2, fp
 8029b50:	4631      	mov	r1, r6
 8029b52:	4628      	mov	r0, r5
 8029b54:	47b8      	blx	r7
 8029b56:	3001      	adds	r0, #1
 8029b58:	f43f af12 	beq.w	8029980 <_printf_float+0x98>
 8029b5c:	f04f 0a00 	mov.w	sl, #0
 8029b60:	f104 0b1a 	add.w	fp, r4, #26
 8029b64:	9b09      	ldr	r3, [sp, #36]	@ 0x24
 8029b66:	425b      	negs	r3, r3
 8029b68:	4553      	cmp	r3, sl
 8029b6a:	dc01      	bgt.n	8029b70 <_printf_float+0x288>
 8029b6c:	464b      	mov	r3, r9
 8029b6e:	e794      	b.n	8029a9a <_printf_float+0x1b2>
 8029b70:	2301      	movs	r3, #1
 8029b72:	465a      	mov	r2, fp
 8029b74:	4631      	mov	r1, r6
 8029b76:	4628      	mov	r0, r5
 8029b78:	47b8      	blx	r7
 8029b7a:	3001      	adds	r0, #1
 8029b7c:	f43f af00 	beq.w	8029980 <_printf_float+0x98>
 8029b80:	f10a 0a01 	add.w	sl, sl, #1
 8029b84:	e7ee      	b.n	8029b64 <_printf_float+0x27c>
 8029b86:	bf00      	nop
 8029b88:	ffffffff 	.word	0xffffffff
 8029b8c:	7fefffff 	.word	0x7fefffff
 8029b90:	080316d1 	.word	0x080316d1
 8029b94:	080316d5 	.word	0x080316d5
 8029b98:	080316d9 	.word	0x080316d9
 8029b9c:	080316dd 	.word	0x080316dd
 8029ba0:	080316e1 	.word	0x080316e1
 8029ba4:	6da3      	ldr	r3, [r4, #88]	@ 0x58
 8029ba6:	f8dd a028 	ldr.w	sl, [sp, #40]	@ 0x28
 8029baa:	4553      	cmp	r3, sl
 8029bac:	bfa8      	it	ge
 8029bae:	4653      	movge	r3, sl
 8029bb0:	2b00      	cmp	r3, #0
 8029bb2:	4699      	mov	r9, r3
 8029bb4:	dc37      	bgt.n	8029c26 <_printf_float+0x33e>
 8029bb6:	2300      	movs	r3, #0
 8029bb8:	9307      	str	r3, [sp, #28]
 8029bba:	ea29 79e9 	bic.w	r9, r9, r9, asr #31
 8029bbe:	f104 021a 	add.w	r2, r4, #26
 8029bc2:	6da3      	ldr	r3, [r4, #88]	@ 0x58
 8029bc4:	9907      	ldr	r1, [sp, #28]
 8029bc6:	9306      	str	r3, [sp, #24]
 8029bc8:	eba3 0309 	sub.w	r3, r3, r9
 8029bcc:	428b      	cmp	r3, r1
 8029bce:	dc31      	bgt.n	8029c34 <_printf_float+0x34c>
 8029bd0:	9b09      	ldr	r3, [sp, #36]	@ 0x24
 8029bd2:	459a      	cmp	sl, r3
 8029bd4:	dc3b      	bgt.n	8029c4e <_printf_float+0x366>
 8029bd6:	6823      	ldr	r3, [r4, #0]
 8029bd8:	07da      	lsls	r2, r3, #31
 8029bda:	d438      	bmi.n	8029c4e <_printf_float+0x366>
 8029bdc:	9b09      	ldr	r3, [sp, #36]	@ 0x24
 8029bde:	ebaa 0903 	sub.w	r9, sl, r3
 8029be2:	9b06      	ldr	r3, [sp, #24]
 8029be4:	ebaa 0303 	sub.w	r3, sl, r3
 8029be8:	4599      	cmp	r9, r3
 8029bea:	bfa8      	it	ge
 8029bec:	4699      	movge	r9, r3
 8029bee:	f1b9 0f00 	cmp.w	r9, #0
 8029bf2:	dc34      	bgt.n	8029c5e <_printf_float+0x376>
 8029bf4:	f04f 0800 	mov.w	r8, #0
 8029bf8:	ea29 79e9 	bic.w	r9, r9, r9, asr #31
 8029bfc:	f104 0b1a 	add.w	fp, r4, #26
 8029c00:	9b09      	ldr	r3, [sp, #36]	@ 0x24
 8029c02:	ebaa 0303 	sub.w	r3, sl, r3
 8029c06:	eba3 0309 	sub.w	r3, r3, r9
 8029c0a:	4543      	cmp	r3, r8
 8029c0c:	f77f af76 	ble.w	8029afc <_printf_float+0x214>
 8029c10:	2301      	movs	r3, #1
 8029c12:	465a      	mov	r2, fp
 8029c14:	4631      	mov	r1, r6
 8029c16:	4628      	mov	r0, r5
 8029c18:	47b8      	blx	r7
 8029c1a:	3001      	adds	r0, #1
 8029c1c:	f43f aeb0 	beq.w	8029980 <_printf_float+0x98>
 8029c20:	f108 0801 	add.w	r8, r8, #1
 8029c24:	e7ec      	b.n	8029c00 <_printf_float+0x318>
 8029c26:	4642      	mov	r2, r8
 8029c28:	4631      	mov	r1, r6
 8029c2a:	4628      	mov	r0, r5
 8029c2c:	47b8      	blx	r7
 8029c2e:	3001      	adds	r0, #1
 8029c30:	d1c1      	bne.n	8029bb6 <_printf_float+0x2ce>
 8029c32:	e6a5      	b.n	8029980 <_printf_float+0x98>
 8029c34:	2301      	movs	r3, #1
 8029c36:	4631      	mov	r1, r6
 8029c38:	4628      	mov	r0, r5
 8029c3a:	9206      	str	r2, [sp, #24]
 8029c3c:	47b8      	blx	r7
 8029c3e:	3001      	adds	r0, #1
 8029c40:	f43f ae9e 	beq.w	8029980 <_printf_float+0x98>
 8029c44:	9b07      	ldr	r3, [sp, #28]
 8029c46:	9a06      	ldr	r2, [sp, #24]
 8029c48:	3301      	adds	r3, #1
 8029c4a:	9307      	str	r3, [sp, #28]
 8029c4c:	e7b9      	b.n	8029bc2 <_printf_float+0x2da>
 8029c4e:	9b05      	ldr	r3, [sp, #20]
 8029c50:	465a      	mov	r2, fp
 8029c52:	4631      	mov	r1, r6
 8029c54:	4628      	mov	r0, r5
 8029c56:	47b8      	blx	r7
 8029c58:	3001      	adds	r0, #1
 8029c5a:	d1bf      	bne.n	8029bdc <_printf_float+0x2f4>
 8029c5c:	e690      	b.n	8029980 <_printf_float+0x98>
 8029c5e:	9a06      	ldr	r2, [sp, #24]
 8029c60:	464b      	mov	r3, r9
 8029c62:	4442      	add	r2, r8
 8029c64:	4631      	mov	r1, r6
 8029c66:	4628      	mov	r0, r5
 8029c68:	47b8      	blx	r7
 8029c6a:	3001      	adds	r0, #1
 8029c6c:	d1c2      	bne.n	8029bf4 <_printf_float+0x30c>
 8029c6e:	e687      	b.n	8029980 <_printf_float+0x98>
 8029c70:	f8dd 9028 	ldr.w	r9, [sp, #40]	@ 0x28
 8029c74:	f1b9 0f01 	cmp.w	r9, #1
 8029c78:	dc01      	bgt.n	8029c7e <_printf_float+0x396>
 8029c7a:	07db      	lsls	r3, r3, #31
 8029c7c:	d536      	bpl.n	8029cec <_printf_float+0x404>
 8029c7e:	2301      	movs	r3, #1
 8029c80:	4642      	mov	r2, r8
 8029c82:	4631      	mov	r1, r6
 8029c84:	4628      	mov	r0, r5
 8029c86:	47b8      	blx	r7
 8029c88:	3001      	adds	r0, #1
 8029c8a:	f43f ae79 	beq.w	8029980 <_printf_float+0x98>
 8029c8e:	9b05      	ldr	r3, [sp, #20]
 8029c90:	465a      	mov	r2, fp
 8029c92:	4631      	mov	r1, r6
 8029c94:	4628      	mov	r0, r5
 8029c96:	47b8      	blx	r7
 8029c98:	3001      	adds	r0, #1
 8029c9a:	f43f ae71 	beq.w	8029980 <_printf_float+0x98>
 8029c9e:	ed94 7b12 	vldr	d7, [r4, #72]	@ 0x48
 8029ca2:	eeb5 7b40 	vcmp.f64	d7, #0.0
 8029ca6:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 8029caa:	f109 39ff 	add.w	r9, r9, #4294967295	@ 0xffffffff
 8029cae:	d018      	beq.n	8029ce2 <_printf_float+0x3fa>
 8029cb0:	464b      	mov	r3, r9
 8029cb2:	f108 0201 	add.w	r2, r8, #1
 8029cb6:	4631      	mov	r1, r6
 8029cb8:	4628      	mov	r0, r5
 8029cba:	47b8      	blx	r7
 8029cbc:	3001      	adds	r0, #1
 8029cbe:	d10c      	bne.n	8029cda <_printf_float+0x3f2>
 8029cc0:	e65e      	b.n	8029980 <_printf_float+0x98>
 8029cc2:	2301      	movs	r3, #1
 8029cc4:	465a      	mov	r2, fp
 8029cc6:	4631      	mov	r1, r6
 8029cc8:	4628      	mov	r0, r5
 8029cca:	47b8      	blx	r7
 8029ccc:	3001      	adds	r0, #1
 8029cce:	f43f ae57 	beq.w	8029980 <_printf_float+0x98>
 8029cd2:	f108 0801 	add.w	r8, r8, #1
 8029cd6:	45c8      	cmp	r8, r9
 8029cd8:	dbf3      	blt.n	8029cc2 <_printf_float+0x3da>
 8029cda:	4653      	mov	r3, sl
 8029cdc:	f104 0250 	add.w	r2, r4, #80	@ 0x50
 8029ce0:	e6dc      	b.n	8029a9c <_printf_float+0x1b4>
 8029ce2:	f04f 0800 	mov.w	r8, #0
 8029ce6:	f104 0b1a 	add.w	fp, r4, #26
 8029cea:	e7f4      	b.n	8029cd6 <_printf_float+0x3ee>
 8029cec:	2301      	movs	r3, #1
 8029cee:	4642      	mov	r2, r8
 8029cf0:	e7e1      	b.n	8029cb6 <_printf_float+0x3ce>
 8029cf2:	2301      	movs	r3, #1
 8029cf4:	464a      	mov	r2, r9
 8029cf6:	4631      	mov	r1, r6
 8029cf8:	4628      	mov	r0, r5
 8029cfa:	47b8      	blx	r7
 8029cfc:	3001      	adds	r0, #1
 8029cfe:	f43f ae3f 	beq.w	8029980 <_printf_float+0x98>
 8029d02:	f108 0801 	add.w	r8, r8, #1
 8029d06:	68e3      	ldr	r3, [r4, #12]
 8029d08:	990b      	ldr	r1, [sp, #44]	@ 0x2c
 8029d0a:	1a5b      	subs	r3, r3, r1
 8029d0c:	4543      	cmp	r3, r8
 8029d0e:	dcf0      	bgt.n	8029cf2 <_printf_float+0x40a>
 8029d10:	e6f8      	b.n	8029b04 <_printf_float+0x21c>
 8029d12:	f04f 0800 	mov.w	r8, #0
 8029d16:	f104 0919 	add.w	r9, r4, #25
 8029d1a:	e7f4      	b.n	8029d06 <_printf_float+0x41e>

08029d1c <_printf_common>:
 8029d1c:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
 8029d20:	4616      	mov	r6, r2
 8029d22:	4698      	mov	r8, r3
 8029d24:	688a      	ldr	r2, [r1, #8]
 8029d26:	690b      	ldr	r3, [r1, #16]
 8029d28:	f8dd 9020 	ldr.w	r9, [sp, #32]
 8029d2c:	4293      	cmp	r3, r2
 8029d2e:	bfb8      	it	lt
 8029d30:	4613      	movlt	r3, r2
 8029d32:	6033      	str	r3, [r6, #0]
 8029d34:	f891 2043 	ldrb.w	r2, [r1, #67]	@ 0x43
 8029d38:	4607      	mov	r7, r0
 8029d3a:	460c      	mov	r4, r1
 8029d3c:	b10a      	cbz	r2, 8029d42 <_printf_common+0x26>
 8029d3e:	3301      	adds	r3, #1
 8029d40:	6033      	str	r3, [r6, #0]
 8029d42:	6823      	ldr	r3, [r4, #0]
 8029d44:	0699      	lsls	r1, r3, #26
 8029d46:	bf42      	ittt	mi
 8029d48:	6833      	ldrmi	r3, [r6, #0]
 8029d4a:	3302      	addmi	r3, #2
 8029d4c:	6033      	strmi	r3, [r6, #0]
 8029d4e:	6825      	ldr	r5, [r4, #0]
 8029d50:	f015 0506 	ands.w	r5, r5, #6
 8029d54:	d106      	bne.n	8029d64 <_printf_common+0x48>
 8029d56:	f104 0a19 	add.w	sl, r4, #25
 8029d5a:	68e3      	ldr	r3, [r4, #12]
 8029d5c:	6832      	ldr	r2, [r6, #0]
 8029d5e:	1a9b      	subs	r3, r3, r2
 8029d60:	42ab      	cmp	r3, r5
 8029d62:	dc26      	bgt.n	8029db2 <_printf_common+0x96>
 8029d64:	f894 3043 	ldrb.w	r3, [r4, #67]	@ 0x43
 8029d68:	6822      	ldr	r2, [r4, #0]
 8029d6a:	3b00      	subs	r3, #0
 8029d6c:	bf18      	it	ne
 8029d6e:	2301      	movne	r3, #1
 8029d70:	0692      	lsls	r2, r2, #26
 8029d72:	d42b      	bmi.n	8029dcc <_printf_common+0xb0>
 8029d74:	f104 0243 	add.w	r2, r4, #67	@ 0x43
 8029d78:	4641      	mov	r1, r8
 8029d7a:	4638      	mov	r0, r7
 8029d7c:	47c8      	blx	r9
 8029d7e:	3001      	adds	r0, #1
 8029d80:	d01e      	beq.n	8029dc0 <_printf_common+0xa4>
 8029d82:	6823      	ldr	r3, [r4, #0]
 8029d84:	6922      	ldr	r2, [r4, #16]
 8029d86:	f003 0306 	and.w	r3, r3, #6
 8029d8a:	2b04      	cmp	r3, #4
 8029d8c:	bf02      	ittt	eq
 8029d8e:	68e5      	ldreq	r5, [r4, #12]
 8029d90:	6833      	ldreq	r3, [r6, #0]
 8029d92:	1aed      	subeq	r5, r5, r3
 8029d94:	68a3      	ldr	r3, [r4, #8]
 8029d96:	bf0c      	ite	eq
 8029d98:	ea25 75e5 	biceq.w	r5, r5, r5, asr #31
 8029d9c:	2500      	movne	r5, #0
 8029d9e:	4293      	cmp	r3, r2
 8029da0:	bfc4      	itt	gt
 8029da2:	1a9b      	subgt	r3, r3, r2
 8029da4:	18ed      	addgt	r5, r5, r3
 8029da6:	2600      	movs	r6, #0
 8029da8:	341a      	adds	r4, #26
 8029daa:	42b5      	cmp	r5, r6
 8029dac:	d11a      	bne.n	8029de4 <_printf_common+0xc8>
 8029dae:	2000      	movs	r0, #0
 8029db0:	e008      	b.n	8029dc4 <_printf_common+0xa8>
 8029db2:	2301      	movs	r3, #1
 8029db4:	4652      	mov	r2, sl
 8029db6:	4641      	mov	r1, r8
 8029db8:	4638      	mov	r0, r7
 8029dba:	47c8      	blx	r9
 8029dbc:	3001      	adds	r0, #1
 8029dbe:	d103      	bne.n	8029dc8 <_printf_common+0xac>
 8029dc0:	f04f 30ff 	mov.w	r0, #4294967295	@ 0xffffffff
 8029dc4:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 8029dc8:	3501      	adds	r5, #1
 8029dca:	e7c6      	b.n	8029d5a <_printf_common+0x3e>
 8029dcc:	18e1      	adds	r1, r4, r3
 8029dce:	1c5a      	adds	r2, r3, #1
 8029dd0:	2030      	movs	r0, #48	@ 0x30
 8029dd2:	f881 0043 	strb.w	r0, [r1, #67]	@ 0x43
 8029dd6:	4422      	add	r2, r4
 8029dd8:	f894 1045 	ldrb.w	r1, [r4, #69]	@ 0x45
 8029ddc:	f882 1043 	strb.w	r1, [r2, #67]	@ 0x43
 8029de0:	3302      	adds	r3, #2
 8029de2:	e7c7      	b.n	8029d74 <_printf_common+0x58>
 8029de4:	2301      	movs	r3, #1
 8029de6:	4622      	mov	r2, r4
 8029de8:	4641      	mov	r1, r8
 8029dea:	4638      	mov	r0, r7
 8029dec:	47c8      	blx	r9
 8029dee:	3001      	adds	r0, #1
 8029df0:	d0e6      	beq.n	8029dc0 <_printf_common+0xa4>
 8029df2:	3601      	adds	r6, #1
 8029df4:	e7d9      	b.n	8029daa <_printf_common+0x8e>
	...

08029df8 <_printf_i>:
 8029df8:	e92d 47ff 	stmdb	sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, lr}
 8029dfc:	7e0f      	ldrb	r7, [r1, #24]
 8029dfe:	9e0c      	ldr	r6, [sp, #48]	@ 0x30
 8029e00:	2f78      	cmp	r7, #120	@ 0x78
 8029e02:	4691      	mov	r9, r2
 8029e04:	4680      	mov	r8, r0
 8029e06:	460c      	mov	r4, r1
 8029e08:	469a      	mov	sl, r3
 8029e0a:	f101 0243 	add.w	r2, r1, #67	@ 0x43
 8029e0e:	d807      	bhi.n	8029e20 <_printf_i+0x28>
 8029e10:	2f62      	cmp	r7, #98	@ 0x62
 8029e12:	d80a      	bhi.n	8029e2a <_printf_i+0x32>
 8029e14:	2f00      	cmp	r7, #0
 8029e16:	f000 80d2 	beq.w	8029fbe <_printf_i+0x1c6>
 8029e1a:	2f58      	cmp	r7, #88	@ 0x58
 8029e1c:	f000 80b9 	beq.w	8029f92 <_printf_i+0x19a>
 8029e20:	f104 0642 	add.w	r6, r4, #66	@ 0x42
 8029e24:	f884 7042 	strb.w	r7, [r4, #66]	@ 0x42
 8029e28:	e03a      	b.n	8029ea0 <_printf_i+0xa8>
 8029e2a:	f1a7 0363 	sub.w	r3, r7, #99	@ 0x63
 8029e2e:	2b15      	cmp	r3, #21
 8029e30:	d8f6      	bhi.n	8029e20 <_printf_i+0x28>
 8029e32:	a101      	add	r1, pc, #4	@ (adr r1, 8029e38 <_printf_i+0x40>)
 8029e34:	f851 f023 	ldr.w	pc, [r1, r3, lsl #2]
 8029e38:	08029e91 	.word	0x08029e91
 8029e3c:	08029ea5 	.word	0x08029ea5
 8029e40:	08029e21 	.word	0x08029e21
 8029e44:	08029e21 	.word	0x08029e21
 8029e48:	08029e21 	.word	0x08029e21
 8029e4c:	08029e21 	.word	0x08029e21
 8029e50:	08029ea5 	.word	0x08029ea5
 8029e54:	08029e21 	.word	0x08029e21
 8029e58:	08029e21 	.word	0x08029e21
 8029e5c:	08029e21 	.word	0x08029e21
 8029e60:	08029e21 	.word	0x08029e21
 8029e64:	08029fa5 	.word	0x08029fa5
 8029e68:	08029ecf 	.word	0x08029ecf
 8029e6c:	08029f5f 	.word	0x08029f5f
 8029e70:	08029e21 	.word	0x08029e21
 8029e74:	08029e21 	.word	0x08029e21
 8029e78:	08029fc7 	.word	0x08029fc7
 8029e7c:	08029e21 	.word	0x08029e21
 8029e80:	08029ecf 	.word	0x08029ecf
 8029e84:	08029e21 	.word	0x08029e21
 8029e88:	08029e21 	.word	0x08029e21
 8029e8c:	08029f67 	.word	0x08029f67
 8029e90:	6833      	ldr	r3, [r6, #0]
 8029e92:	1d1a      	adds	r2, r3, #4
 8029e94:	681b      	ldr	r3, [r3, #0]
 8029e96:	6032      	str	r2, [r6, #0]
 8029e98:	f104 0642 	add.w	r6, r4, #66	@ 0x42
 8029e9c:	f884 3042 	strb.w	r3, [r4, #66]	@ 0x42
 8029ea0:	2301      	movs	r3, #1
 8029ea2:	e09d      	b.n	8029fe0 <_printf_i+0x1e8>
 8029ea4:	6833      	ldr	r3, [r6, #0]
 8029ea6:	6820      	ldr	r0, [r4, #0]
 8029ea8:	1d19      	adds	r1, r3, #4
 8029eaa:	6031      	str	r1, [r6, #0]
 8029eac:	0606      	lsls	r6, r0, #24
 8029eae:	d501      	bpl.n	8029eb4 <_printf_i+0xbc>
 8029eb0:	681d      	ldr	r5, [r3, #0]
 8029eb2:	e003      	b.n	8029ebc <_printf_i+0xc4>
 8029eb4:	0645      	lsls	r5, r0, #25
 8029eb6:	d5fb      	bpl.n	8029eb0 <_printf_i+0xb8>
 8029eb8:	f9b3 5000 	ldrsh.w	r5, [r3]
 8029ebc:	2d00      	cmp	r5, #0
 8029ebe:	da03      	bge.n	8029ec8 <_printf_i+0xd0>
 8029ec0:	232d      	movs	r3, #45	@ 0x2d
 8029ec2:	426d      	negs	r5, r5
 8029ec4:	f884 3043 	strb.w	r3, [r4, #67]	@ 0x43
 8029ec8:	4859      	ldr	r0, [pc, #356]	@ (802a030 <_printf_i+0x238>)
 8029eca:	230a      	movs	r3, #10
 8029ecc:	e011      	b.n	8029ef2 <_printf_i+0xfa>
 8029ece:	6821      	ldr	r1, [r4, #0]
 8029ed0:	6833      	ldr	r3, [r6, #0]
 8029ed2:	0608      	lsls	r0, r1, #24
 8029ed4:	f853 5b04 	ldr.w	r5, [r3], #4
 8029ed8:	d402      	bmi.n	8029ee0 <_printf_i+0xe8>
 8029eda:	0649      	lsls	r1, r1, #25
 8029edc:	bf48      	it	mi
 8029ede:	b2ad      	uxthmi	r5, r5
 8029ee0:	2f6f      	cmp	r7, #111	@ 0x6f
 8029ee2:	4853      	ldr	r0, [pc, #332]	@ (802a030 <_printf_i+0x238>)
 8029ee4:	6033      	str	r3, [r6, #0]
 8029ee6:	bf14      	ite	ne
 8029ee8:	230a      	movne	r3, #10
 8029eea:	2308      	moveq	r3, #8
 8029eec:	2100      	movs	r1, #0
 8029eee:	f884 1043 	strb.w	r1, [r4, #67]	@ 0x43
 8029ef2:	6866      	ldr	r6, [r4, #4]
 8029ef4:	60a6      	str	r6, [r4, #8]
 8029ef6:	2e00      	cmp	r6, #0
 8029ef8:	bfa2      	ittt	ge
 8029efa:	6821      	ldrge	r1, [r4, #0]
 8029efc:	f021 0104 	bicge.w	r1, r1, #4
 8029f00:	6021      	strge	r1, [r4, #0]
 8029f02:	b90d      	cbnz	r5, 8029f08 <_printf_i+0x110>
 8029f04:	2e00      	cmp	r6, #0
 8029f06:	d04b      	beq.n	8029fa0 <_printf_i+0x1a8>
 8029f08:	4616      	mov	r6, r2
 8029f0a:	fbb5 f1f3 	udiv	r1, r5, r3
 8029f0e:	fb03 5711 	mls	r7, r3, r1, r5
 8029f12:	5dc7      	ldrb	r7, [r0, r7]
 8029f14:	f806 7d01 	strb.w	r7, [r6, #-1]!
 8029f18:	462f      	mov	r7, r5
 8029f1a:	42bb      	cmp	r3, r7
 8029f1c:	460d      	mov	r5, r1
 8029f1e:	d9f4      	bls.n	8029f0a <_printf_i+0x112>
 8029f20:	2b08      	cmp	r3, #8
 8029f22:	d10b      	bne.n	8029f3c <_printf_i+0x144>
 8029f24:	6823      	ldr	r3, [r4, #0]
 8029f26:	07df      	lsls	r7, r3, #31
 8029f28:	d508      	bpl.n	8029f3c <_printf_i+0x144>
 8029f2a:	6923      	ldr	r3, [r4, #16]
 8029f2c:	6861      	ldr	r1, [r4, #4]
 8029f2e:	4299      	cmp	r1, r3
 8029f30:	bfde      	ittt	le
 8029f32:	2330      	movle	r3, #48	@ 0x30
 8029f34:	f806 3c01 	strble.w	r3, [r6, #-1]
 8029f38:	f106 36ff 	addle.w	r6, r6, #4294967295	@ 0xffffffff
 8029f3c:	1b92      	subs	r2, r2, r6
 8029f3e:	6122      	str	r2, [r4, #16]
 8029f40:	f8cd a000 	str.w	sl, [sp]
 8029f44:	464b      	mov	r3, r9
 8029f46:	aa03      	add	r2, sp, #12
 8029f48:	4621      	mov	r1, r4
 8029f4a:	4640      	mov	r0, r8
 8029f4c:	f7ff fee6 	bl	8029d1c <_printf_common>
 8029f50:	3001      	adds	r0, #1
 8029f52:	d14a      	bne.n	8029fea <_printf_i+0x1f2>
 8029f54:	f04f 30ff 	mov.w	r0, #4294967295	@ 0xffffffff
 8029f58:	b004      	add	sp, #16
 8029f5a:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 8029f5e:	6823      	ldr	r3, [r4, #0]
 8029f60:	f043 0320 	orr.w	r3, r3, #32
 8029f64:	6023      	str	r3, [r4, #0]
 8029f66:	4833      	ldr	r0, [pc, #204]	@ (802a034 <_printf_i+0x23c>)
 8029f68:	2778      	movs	r7, #120	@ 0x78
 8029f6a:	f884 7045 	strb.w	r7, [r4, #69]	@ 0x45
 8029f6e:	6823      	ldr	r3, [r4, #0]
 8029f70:	6831      	ldr	r1, [r6, #0]
 8029f72:	061f      	lsls	r7, r3, #24
 8029f74:	f851 5b04 	ldr.w	r5, [r1], #4
 8029f78:	d402      	bmi.n	8029f80 <_printf_i+0x188>
 8029f7a:	065f      	lsls	r7, r3, #25
 8029f7c:	bf48      	it	mi
 8029f7e:	b2ad      	uxthmi	r5, r5
 8029f80:	6031      	str	r1, [r6, #0]
 8029f82:	07d9      	lsls	r1, r3, #31
 8029f84:	bf44      	itt	mi
 8029f86:	f043 0320 	orrmi.w	r3, r3, #32
 8029f8a:	6023      	strmi	r3, [r4, #0]
 8029f8c:	b11d      	cbz	r5, 8029f96 <_printf_i+0x19e>
 8029f8e:	2310      	movs	r3, #16
 8029f90:	e7ac      	b.n	8029eec <_printf_i+0xf4>
 8029f92:	4827      	ldr	r0, [pc, #156]	@ (802a030 <_printf_i+0x238>)
 8029f94:	e7e9      	b.n	8029f6a <_printf_i+0x172>
 8029f96:	6823      	ldr	r3, [r4, #0]
 8029f98:	f023 0320 	bic.w	r3, r3, #32
 8029f9c:	6023      	str	r3, [r4, #0]
 8029f9e:	e7f6      	b.n	8029f8e <_printf_i+0x196>
 8029fa0:	4616      	mov	r6, r2
 8029fa2:	e7bd      	b.n	8029f20 <_printf_i+0x128>
 8029fa4:	6833      	ldr	r3, [r6, #0]
 8029fa6:	6825      	ldr	r5, [r4, #0]
 8029fa8:	6961      	ldr	r1, [r4, #20]
 8029faa:	1d18      	adds	r0, r3, #4
 8029fac:	6030      	str	r0, [r6, #0]
 8029fae:	062e      	lsls	r6, r5, #24
 8029fb0:	681b      	ldr	r3, [r3, #0]
 8029fb2:	d501      	bpl.n	8029fb8 <_printf_i+0x1c0>
 8029fb4:	6019      	str	r1, [r3, #0]
 8029fb6:	e002      	b.n	8029fbe <_printf_i+0x1c6>
 8029fb8:	0668      	lsls	r0, r5, #25
 8029fba:	d5fb      	bpl.n	8029fb4 <_printf_i+0x1bc>
 8029fbc:	8019      	strh	r1, [r3, #0]
 8029fbe:	2300      	movs	r3, #0
 8029fc0:	6123      	str	r3, [r4, #16]
 8029fc2:	4616      	mov	r6, r2
 8029fc4:	e7bc      	b.n	8029f40 <_printf_i+0x148>
 8029fc6:	6833      	ldr	r3, [r6, #0]
 8029fc8:	1d1a      	adds	r2, r3, #4
 8029fca:	6032      	str	r2, [r6, #0]
 8029fcc:	681e      	ldr	r6, [r3, #0]
 8029fce:	6862      	ldr	r2, [r4, #4]
 8029fd0:	2100      	movs	r1, #0
 8029fd2:	4630      	mov	r0, r6
 8029fd4:	f7d6 f994 	bl	8000300 <memchr>
 8029fd8:	b108      	cbz	r0, 8029fde <_printf_i+0x1e6>
 8029fda:	1b80      	subs	r0, r0, r6
 8029fdc:	6060      	str	r0, [r4, #4]
 8029fde:	6863      	ldr	r3, [r4, #4]
 8029fe0:	6123      	str	r3, [r4, #16]
 8029fe2:	2300      	movs	r3, #0
 8029fe4:	f884 3043 	strb.w	r3, [r4, #67]	@ 0x43
 8029fe8:	e7aa      	b.n	8029f40 <_printf_i+0x148>
 8029fea:	6923      	ldr	r3, [r4, #16]
 8029fec:	4632      	mov	r2, r6
 8029fee:	4649      	mov	r1, r9
 8029ff0:	4640      	mov	r0, r8
 8029ff2:	47d0      	blx	sl
 8029ff4:	3001      	adds	r0, #1
 8029ff6:	d0ad      	beq.n	8029f54 <_printf_i+0x15c>
 8029ff8:	6823      	ldr	r3, [r4, #0]
 8029ffa:	079b      	lsls	r3, r3, #30
 8029ffc:	d413      	bmi.n	802a026 <_printf_i+0x22e>
 8029ffe:	68e0      	ldr	r0, [r4, #12]
 802a000:	9b03      	ldr	r3, [sp, #12]
 802a002:	4298      	cmp	r0, r3
 802a004:	bfb8      	it	lt
 802a006:	4618      	movlt	r0, r3
 802a008:	e7a6      	b.n	8029f58 <_printf_i+0x160>
 802a00a:	2301      	movs	r3, #1
 802a00c:	4632      	mov	r2, r6
 802a00e:	4649      	mov	r1, r9
 802a010:	4640      	mov	r0, r8
 802a012:	47d0      	blx	sl
 802a014:	3001      	adds	r0, #1
 802a016:	d09d      	beq.n	8029f54 <_printf_i+0x15c>
 802a018:	3501      	adds	r5, #1
 802a01a:	68e3      	ldr	r3, [r4, #12]
 802a01c:	9903      	ldr	r1, [sp, #12]
 802a01e:	1a5b      	subs	r3, r3, r1
 802a020:	42ab      	cmp	r3, r5
 802a022:	dcf2      	bgt.n	802a00a <_printf_i+0x212>
 802a024:	e7eb      	b.n	8029ffe <_printf_i+0x206>
 802a026:	2500      	movs	r5, #0
 802a028:	f104 0619 	add.w	r6, r4, #25
 802a02c:	e7f5      	b.n	802a01a <_printf_i+0x222>
 802a02e:	bf00      	nop
 802a030:	080316e3 	.word	0x080316e3
 802a034:	080316f4 	.word	0x080316f4

0802a038 <std>:
 802a038:	2300      	movs	r3, #0
 802a03a:	b510      	push	{r4, lr}
 802a03c:	4604      	mov	r4, r0
 802a03e:	e9c0 3300 	strd	r3, r3, [r0]
 802a042:	e9c0 3304 	strd	r3, r3, [r0, #16]
 802a046:	6083      	str	r3, [r0, #8]
 802a048:	8181      	strh	r1, [r0, #12]
 802a04a:	6643      	str	r3, [r0, #100]	@ 0x64
 802a04c:	81c2      	strh	r2, [r0, #14]
 802a04e:	6183      	str	r3, [r0, #24]
 802a050:	4619      	mov	r1, r3
 802a052:	2208      	movs	r2, #8
 802a054:	305c      	adds	r0, #92	@ 0x5c
 802a056:	f000 fa43 	bl	802a4e0 <memset>
 802a05a:	4b0d      	ldr	r3, [pc, #52]	@ (802a090 <std+0x58>)
 802a05c:	6263      	str	r3, [r4, #36]	@ 0x24
 802a05e:	4b0d      	ldr	r3, [pc, #52]	@ (802a094 <std+0x5c>)
 802a060:	62a3      	str	r3, [r4, #40]	@ 0x28
 802a062:	4b0d      	ldr	r3, [pc, #52]	@ (802a098 <std+0x60>)
 802a064:	62e3      	str	r3, [r4, #44]	@ 0x2c
 802a066:	4b0d      	ldr	r3, [pc, #52]	@ (802a09c <std+0x64>)
 802a068:	6323      	str	r3, [r4, #48]	@ 0x30
 802a06a:	4b0d      	ldr	r3, [pc, #52]	@ (802a0a0 <std+0x68>)
 802a06c:	6224      	str	r4, [r4, #32]
 802a06e:	429c      	cmp	r4, r3
 802a070:	d006      	beq.n	802a080 <std+0x48>
 802a072:	f103 0268 	add.w	r2, r3, #104	@ 0x68
 802a076:	4294      	cmp	r4, r2
 802a078:	d002      	beq.n	802a080 <std+0x48>
 802a07a:	33d0      	adds	r3, #208	@ 0xd0
 802a07c:	429c      	cmp	r4, r3
 802a07e:	d105      	bne.n	802a08c <std+0x54>
 802a080:	f104 0058 	add.w	r0, r4, #88	@ 0x58
 802a084:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
 802a088:	f000 bb1e 	b.w	802a6c8 <__retarget_lock_init_recursive>
 802a08c:	bd10      	pop	{r4, pc}
 802a08e:	bf00      	nop
 802a090:	0802a2dd 	.word	0x0802a2dd
 802a094:	0802a2ff 	.word	0x0802a2ff
 802a098:	0802a337 	.word	0x0802a337
 802a09c:	0802a35b 	.word	0x0802a35b
 802a0a0:	2402b114 	.word	0x2402b114

0802a0a4 <stdio_exit_handler>:
 802a0a4:	4a02      	ldr	r2, [pc, #8]	@ (802a0b0 <stdio_exit_handler+0xc>)
 802a0a6:	4903      	ldr	r1, [pc, #12]	@ (802a0b4 <stdio_exit_handler+0x10>)
 802a0a8:	4803      	ldr	r0, [pc, #12]	@ (802a0b8 <stdio_exit_handler+0x14>)
 802a0aa:	f000 b869 	b.w	802a180 <_fwalk_sglue>
 802a0ae:	bf00      	nop
 802a0b0:	2400005c 	.word	0x2400005c
 802a0b4:	0802c9ed 	.word	0x0802c9ed
 802a0b8:	240001d8 	.word	0x240001d8

0802a0bc <cleanup_stdio>:
 802a0bc:	6841      	ldr	r1, [r0, #4]
 802a0be:	4b0c      	ldr	r3, [pc, #48]	@ (802a0f0 <cleanup_stdio+0x34>)
 802a0c0:	4299      	cmp	r1, r3
 802a0c2:	b510      	push	{r4, lr}
 802a0c4:	4604      	mov	r4, r0
 802a0c6:	d001      	beq.n	802a0cc <cleanup_stdio+0x10>
 802a0c8:	f002 fc90 	bl	802c9ec <_fflush_r>
 802a0cc:	68a1      	ldr	r1, [r4, #8]
 802a0ce:	4b09      	ldr	r3, [pc, #36]	@ (802a0f4 <cleanup_stdio+0x38>)
 802a0d0:	4299      	cmp	r1, r3
 802a0d2:	d002      	beq.n	802a0da <cleanup_stdio+0x1e>
 802a0d4:	4620      	mov	r0, r4
 802a0d6:	f002 fc89 	bl	802c9ec <_fflush_r>
 802a0da:	68e1      	ldr	r1, [r4, #12]
 802a0dc:	4b06      	ldr	r3, [pc, #24]	@ (802a0f8 <cleanup_stdio+0x3c>)
 802a0de:	4299      	cmp	r1, r3
 802a0e0:	d004      	beq.n	802a0ec <cleanup_stdio+0x30>
 802a0e2:	4620      	mov	r0, r4
 802a0e4:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
 802a0e8:	f002 bc80 	b.w	802c9ec <_fflush_r>
 802a0ec:	bd10      	pop	{r4, pc}
 802a0ee:	bf00      	nop
 802a0f0:	2402b114 	.word	0x2402b114
 802a0f4:	2402b17c 	.word	0x2402b17c
 802a0f8:	2402b1e4 	.word	0x2402b1e4

0802a0fc <global_stdio_init.part.0>:
 802a0fc:	b510      	push	{r4, lr}
 802a0fe:	4b0b      	ldr	r3, [pc, #44]	@ (802a12c <global_stdio_init.part.0+0x30>)
 802a100:	4c0b      	ldr	r4, [pc, #44]	@ (802a130 <global_stdio_init.part.0+0x34>)
 802a102:	4a0c      	ldr	r2, [pc, #48]	@ (802a134 <global_stdio_init.part.0+0x38>)
 802a104:	601a      	str	r2, [r3, #0]
 802a106:	4620      	mov	r0, r4
 802a108:	2200      	movs	r2, #0
 802a10a:	2104      	movs	r1, #4
 802a10c:	f7ff ff94 	bl	802a038 <std>
 802a110:	f104 0068 	add.w	r0, r4, #104	@ 0x68
 802a114:	2201      	movs	r2, #1
 802a116:	2109      	movs	r1, #9
 802a118:	f7ff ff8e 	bl	802a038 <std>
 802a11c:	f104 00d0 	add.w	r0, r4, #208	@ 0xd0
 802a120:	2202      	movs	r2, #2
 802a122:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
 802a126:	2112      	movs	r1, #18
 802a128:	f7ff bf86 	b.w	802a038 <std>
 802a12c:	2402b24c 	.word	0x2402b24c
 802a130:	2402b114 	.word	0x2402b114
 802a134:	0802a0a5 	.word	0x0802a0a5

0802a138 <__sfp_lock_acquire>:
 802a138:	4801      	ldr	r0, [pc, #4]	@ (802a140 <__sfp_lock_acquire+0x8>)
 802a13a:	f000 bac6 	b.w	802a6ca <__retarget_lock_acquire_recursive>
 802a13e:	bf00      	nop
 802a140:	2402b255 	.word	0x2402b255

0802a144 <__sfp_lock_release>:
 802a144:	4801      	ldr	r0, [pc, #4]	@ (802a14c <__sfp_lock_release+0x8>)
 802a146:	f000 bac1 	b.w	802a6cc <__retarget_lock_release_recursive>
 802a14a:	bf00      	nop
 802a14c:	2402b255 	.word	0x2402b255

0802a150 <__sinit>:
 802a150:	b510      	push	{r4, lr}
 802a152:	4604      	mov	r4, r0
 802a154:	f7ff fff0 	bl	802a138 <__sfp_lock_acquire>
 802a158:	6a23      	ldr	r3, [r4, #32]
 802a15a:	b11b      	cbz	r3, 802a164 <__sinit+0x14>
 802a15c:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
 802a160:	f7ff bff0 	b.w	802a144 <__sfp_lock_release>
 802a164:	4b04      	ldr	r3, [pc, #16]	@ (802a178 <__sinit+0x28>)
 802a166:	6223      	str	r3, [r4, #32]
 802a168:	4b04      	ldr	r3, [pc, #16]	@ (802a17c <__sinit+0x2c>)
 802a16a:	681b      	ldr	r3, [r3, #0]
 802a16c:	2b00      	cmp	r3, #0
 802a16e:	d1f5      	bne.n	802a15c <__sinit+0xc>
 802a170:	f7ff ffc4 	bl	802a0fc <global_stdio_init.part.0>
 802a174:	e7f2      	b.n	802a15c <__sinit+0xc>
 802a176:	bf00      	nop
 802a178:	0802a0bd 	.word	0x0802a0bd
 802a17c:	2402b24c 	.word	0x2402b24c

0802a180 <_fwalk_sglue>:
 802a180:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
 802a184:	4607      	mov	r7, r0
 802a186:	4688      	mov	r8, r1
 802a188:	4614      	mov	r4, r2
 802a18a:	2600      	movs	r6, #0
 802a18c:	e9d4 9501 	ldrd	r9, r5, [r4, #4]
 802a190:	f1b9 0901 	subs.w	r9, r9, #1
 802a194:	d505      	bpl.n	802a1a2 <_fwalk_sglue+0x22>
 802a196:	6824      	ldr	r4, [r4, #0]
 802a198:	2c00      	cmp	r4, #0
 802a19a:	d1f7      	bne.n	802a18c <_fwalk_sglue+0xc>
 802a19c:	4630      	mov	r0, r6
 802a19e:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
 802a1a2:	89ab      	ldrh	r3, [r5, #12]
 802a1a4:	2b01      	cmp	r3, #1
 802a1a6:	d907      	bls.n	802a1b8 <_fwalk_sglue+0x38>
 802a1a8:	f9b5 300e 	ldrsh.w	r3, [r5, #14]
 802a1ac:	3301      	adds	r3, #1
 802a1ae:	d003      	beq.n	802a1b8 <_fwalk_sglue+0x38>
 802a1b0:	4629      	mov	r1, r5
 802a1b2:	4638      	mov	r0, r7
 802a1b4:	47c0      	blx	r8
 802a1b6:	4306      	orrs	r6, r0
 802a1b8:	3568      	adds	r5, #104	@ 0x68
 802a1ba:	e7e9      	b.n	802a190 <_fwalk_sglue+0x10>

0802a1bc <iprintf>:
 802a1bc:	b40f      	push	{r0, r1, r2, r3}
 802a1be:	b507      	push	{r0, r1, r2, lr}
 802a1c0:	4906      	ldr	r1, [pc, #24]	@ (802a1dc <iprintf+0x20>)
 802a1c2:	ab04      	add	r3, sp, #16
 802a1c4:	6808      	ldr	r0, [r1, #0]
 802a1c6:	f853 2b04 	ldr.w	r2, [r3], #4
 802a1ca:	6881      	ldr	r1, [r0, #8]
 802a1cc:	9301      	str	r3, [sp, #4]
 802a1ce:	f002 fa71 	bl	802c6b4 <_vfiprintf_r>
 802a1d2:	b003      	add	sp, #12
 802a1d4:	f85d eb04 	ldr.w	lr, [sp], #4
 802a1d8:	b004      	add	sp, #16
 802a1da:	4770      	bx	lr
 802a1dc:	240001d4 	.word	0x240001d4

0802a1e0 <_puts_r>:
 802a1e0:	6a03      	ldr	r3, [r0, #32]
 802a1e2:	b570      	push	{r4, r5, r6, lr}
 802a1e4:	6884      	ldr	r4, [r0, #8]
 802a1e6:	4605      	mov	r5, r0
 802a1e8:	460e      	mov	r6, r1
 802a1ea:	b90b      	cbnz	r3, 802a1f0 <_puts_r+0x10>
 802a1ec:	f7ff ffb0 	bl	802a150 <__sinit>
 802a1f0:	6e63      	ldr	r3, [r4, #100]	@ 0x64
 802a1f2:	07db      	lsls	r3, r3, #31
 802a1f4:	d405      	bmi.n	802a202 <_puts_r+0x22>
 802a1f6:	89a3      	ldrh	r3, [r4, #12]
 802a1f8:	0598      	lsls	r0, r3, #22
 802a1fa:	d402      	bmi.n	802a202 <_puts_r+0x22>
 802a1fc:	6da0      	ldr	r0, [r4, #88]	@ 0x58
 802a1fe:	f000 fa64 	bl	802a6ca <__retarget_lock_acquire_recursive>
 802a202:	89a3      	ldrh	r3, [r4, #12]
 802a204:	0719      	lsls	r1, r3, #28
 802a206:	d502      	bpl.n	802a20e <_puts_r+0x2e>
 802a208:	6923      	ldr	r3, [r4, #16]
 802a20a:	2b00      	cmp	r3, #0
 802a20c:	d135      	bne.n	802a27a <_puts_r+0x9a>
 802a20e:	4621      	mov	r1, r4
 802a210:	4628      	mov	r0, r5
 802a212:	f000 f8e5 	bl	802a3e0 <__swsetup_r>
 802a216:	b380      	cbz	r0, 802a27a <_puts_r+0x9a>
 802a218:	f04f 35ff 	mov.w	r5, #4294967295	@ 0xffffffff
 802a21c:	6e63      	ldr	r3, [r4, #100]	@ 0x64
 802a21e:	07da      	lsls	r2, r3, #31
 802a220:	d405      	bmi.n	802a22e <_puts_r+0x4e>
 802a222:	89a3      	ldrh	r3, [r4, #12]
 802a224:	059b      	lsls	r3, r3, #22
 802a226:	d402      	bmi.n	802a22e <_puts_r+0x4e>
 802a228:	6da0      	ldr	r0, [r4, #88]	@ 0x58
 802a22a:	f000 fa4f 	bl	802a6cc <__retarget_lock_release_recursive>
 802a22e:	4628      	mov	r0, r5
 802a230:	bd70      	pop	{r4, r5, r6, pc}
 802a232:	2b00      	cmp	r3, #0
 802a234:	da04      	bge.n	802a240 <_puts_r+0x60>
 802a236:	69a2      	ldr	r2, [r4, #24]
 802a238:	429a      	cmp	r2, r3
 802a23a:	dc17      	bgt.n	802a26c <_puts_r+0x8c>
 802a23c:	290a      	cmp	r1, #10
 802a23e:	d015      	beq.n	802a26c <_puts_r+0x8c>
 802a240:	6823      	ldr	r3, [r4, #0]
 802a242:	1c5a      	adds	r2, r3, #1
 802a244:	6022      	str	r2, [r4, #0]
 802a246:	7019      	strb	r1, [r3, #0]
 802a248:	68a3      	ldr	r3, [r4, #8]
 802a24a:	f816 1f01 	ldrb.w	r1, [r6, #1]!
 802a24e:	3b01      	subs	r3, #1
 802a250:	60a3      	str	r3, [r4, #8]
 802a252:	2900      	cmp	r1, #0
 802a254:	d1ed      	bne.n	802a232 <_puts_r+0x52>
 802a256:	2b00      	cmp	r3, #0
 802a258:	da11      	bge.n	802a27e <_puts_r+0x9e>
 802a25a:	4622      	mov	r2, r4
 802a25c:	210a      	movs	r1, #10
 802a25e:	4628      	mov	r0, r5
 802a260:	f000 f87f 	bl	802a362 <__swbuf_r>
 802a264:	3001      	adds	r0, #1
 802a266:	d0d7      	beq.n	802a218 <_puts_r+0x38>
 802a268:	250a      	movs	r5, #10
 802a26a:	e7d7      	b.n	802a21c <_puts_r+0x3c>
 802a26c:	4622      	mov	r2, r4
 802a26e:	4628      	mov	r0, r5
 802a270:	f000 f877 	bl	802a362 <__swbuf_r>
 802a274:	3001      	adds	r0, #1
 802a276:	d1e7      	bne.n	802a248 <_puts_r+0x68>
 802a278:	e7ce      	b.n	802a218 <_puts_r+0x38>
 802a27a:	3e01      	subs	r6, #1
 802a27c:	e7e4      	b.n	802a248 <_puts_r+0x68>
 802a27e:	6823      	ldr	r3, [r4, #0]
 802a280:	1c5a      	adds	r2, r3, #1
 802a282:	6022      	str	r2, [r4, #0]
 802a284:	220a      	movs	r2, #10
 802a286:	701a      	strb	r2, [r3, #0]
 802a288:	e7ee      	b.n	802a268 <_puts_r+0x88>
	...

0802a28c <puts>:
 802a28c:	4b02      	ldr	r3, [pc, #8]	@ (802a298 <puts+0xc>)
 802a28e:	4601      	mov	r1, r0
 802a290:	6818      	ldr	r0, [r3, #0]
 802a292:	f7ff bfa5 	b.w	802a1e0 <_puts_r>
 802a296:	bf00      	nop
 802a298:	240001d4 	.word	0x240001d4

0802a29c <siprintf>:
 802a29c:	b40e      	push	{r1, r2, r3}
 802a29e:	b500      	push	{lr}
 802a2a0:	b09c      	sub	sp, #112	@ 0x70
 802a2a2:	ab1d      	add	r3, sp, #116	@ 0x74
 802a2a4:	9002      	str	r0, [sp, #8]
 802a2a6:	9006      	str	r0, [sp, #24]
 802a2a8:	f06f 4100 	mvn.w	r1, #2147483648	@ 0x80000000
 802a2ac:	4809      	ldr	r0, [pc, #36]	@ (802a2d4 <siprintf+0x38>)
 802a2ae:	9107      	str	r1, [sp, #28]
 802a2b0:	9104      	str	r1, [sp, #16]
 802a2b2:	4909      	ldr	r1, [pc, #36]	@ (802a2d8 <siprintf+0x3c>)
 802a2b4:	f853 2b04 	ldr.w	r2, [r3], #4
 802a2b8:	9105      	str	r1, [sp, #20]
 802a2ba:	6800      	ldr	r0, [r0, #0]
 802a2bc:	9301      	str	r3, [sp, #4]
 802a2be:	a902      	add	r1, sp, #8
 802a2c0:	f002 f8d2 	bl	802c468 <_svfiprintf_r>
 802a2c4:	9b02      	ldr	r3, [sp, #8]
 802a2c6:	2200      	movs	r2, #0
 802a2c8:	701a      	strb	r2, [r3, #0]
 802a2ca:	b01c      	add	sp, #112	@ 0x70
 802a2cc:	f85d eb04 	ldr.w	lr, [sp], #4
 802a2d0:	b003      	add	sp, #12
 802a2d2:	4770      	bx	lr
 802a2d4:	240001d4 	.word	0x240001d4
 802a2d8:	ffff0208 	.word	0xffff0208

0802a2dc <__sread>:
 802a2dc:	b510      	push	{r4, lr}
 802a2de:	460c      	mov	r4, r1
 802a2e0:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 802a2e4:	f000 f992 	bl	802a60c <_read_r>
 802a2e8:	2800      	cmp	r0, #0
 802a2ea:	bfab      	itete	ge
 802a2ec:	6d63      	ldrge	r3, [r4, #84]	@ 0x54
 802a2ee:	89a3      	ldrhlt	r3, [r4, #12]
 802a2f0:	181b      	addge	r3, r3, r0
 802a2f2:	f423 5380 	biclt.w	r3, r3, #4096	@ 0x1000
 802a2f6:	bfac      	ite	ge
 802a2f8:	6563      	strge	r3, [r4, #84]	@ 0x54
 802a2fa:	81a3      	strhlt	r3, [r4, #12]
 802a2fc:	bd10      	pop	{r4, pc}

0802a2fe <__swrite>:
 802a2fe:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
 802a302:	461f      	mov	r7, r3
 802a304:	898b      	ldrh	r3, [r1, #12]
 802a306:	05db      	lsls	r3, r3, #23
 802a308:	4605      	mov	r5, r0
 802a30a:	460c      	mov	r4, r1
 802a30c:	4616      	mov	r6, r2
 802a30e:	d505      	bpl.n	802a31c <__swrite+0x1e>
 802a310:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 802a314:	2302      	movs	r3, #2
 802a316:	2200      	movs	r2, #0
 802a318:	f000 f966 	bl	802a5e8 <_lseek_r>
 802a31c:	89a3      	ldrh	r3, [r4, #12]
 802a31e:	f9b4 100e 	ldrsh.w	r1, [r4, #14]
 802a322:	f423 5380 	bic.w	r3, r3, #4096	@ 0x1000
 802a326:	81a3      	strh	r3, [r4, #12]
 802a328:	4632      	mov	r2, r6
 802a32a:	463b      	mov	r3, r7
 802a32c:	4628      	mov	r0, r5
 802a32e:	e8bd 41f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, lr}
 802a332:	f000 b98d 	b.w	802a650 <_write_r>

0802a336 <__sseek>:
 802a336:	b510      	push	{r4, lr}
 802a338:	460c      	mov	r4, r1
 802a33a:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 802a33e:	f000 f953 	bl	802a5e8 <_lseek_r>
 802a342:	1c43      	adds	r3, r0, #1
 802a344:	89a3      	ldrh	r3, [r4, #12]
 802a346:	bf15      	itete	ne
 802a348:	6560      	strne	r0, [r4, #84]	@ 0x54
 802a34a:	f423 5380 	biceq.w	r3, r3, #4096	@ 0x1000
 802a34e:	f443 5380 	orrne.w	r3, r3, #4096	@ 0x1000
 802a352:	81a3      	strheq	r3, [r4, #12]
 802a354:	bf18      	it	ne
 802a356:	81a3      	strhne	r3, [r4, #12]
 802a358:	bd10      	pop	{r4, pc}

0802a35a <__sclose>:
 802a35a:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 802a35e:	f000 b8dd 	b.w	802a51c <_close_r>

0802a362 <__swbuf_r>:
 802a362:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 802a364:	460e      	mov	r6, r1
 802a366:	4614      	mov	r4, r2
 802a368:	4605      	mov	r5, r0
 802a36a:	b118      	cbz	r0, 802a374 <__swbuf_r+0x12>
 802a36c:	6a03      	ldr	r3, [r0, #32]
 802a36e:	b90b      	cbnz	r3, 802a374 <__swbuf_r+0x12>
 802a370:	f7ff feee 	bl	802a150 <__sinit>
 802a374:	69a3      	ldr	r3, [r4, #24]
 802a376:	60a3      	str	r3, [r4, #8]
 802a378:	89a3      	ldrh	r3, [r4, #12]
 802a37a:	071a      	lsls	r2, r3, #28
 802a37c:	d501      	bpl.n	802a382 <__swbuf_r+0x20>
 802a37e:	6923      	ldr	r3, [r4, #16]
 802a380:	b943      	cbnz	r3, 802a394 <__swbuf_r+0x32>
 802a382:	4621      	mov	r1, r4
 802a384:	4628      	mov	r0, r5
 802a386:	f000 f82b 	bl	802a3e0 <__swsetup_r>
 802a38a:	b118      	cbz	r0, 802a394 <__swbuf_r+0x32>
 802a38c:	f04f 37ff 	mov.w	r7, #4294967295	@ 0xffffffff
 802a390:	4638      	mov	r0, r7
 802a392:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
 802a394:	6823      	ldr	r3, [r4, #0]
 802a396:	6922      	ldr	r2, [r4, #16]
 802a398:	1a98      	subs	r0, r3, r2
 802a39a:	6963      	ldr	r3, [r4, #20]
 802a39c:	b2f6      	uxtb	r6, r6
 802a39e:	4283      	cmp	r3, r0
 802a3a0:	4637      	mov	r7, r6
 802a3a2:	dc05      	bgt.n	802a3b0 <__swbuf_r+0x4e>
 802a3a4:	4621      	mov	r1, r4
 802a3a6:	4628      	mov	r0, r5
 802a3a8:	f002 fb20 	bl	802c9ec <_fflush_r>
 802a3ac:	2800      	cmp	r0, #0
 802a3ae:	d1ed      	bne.n	802a38c <__swbuf_r+0x2a>
 802a3b0:	68a3      	ldr	r3, [r4, #8]
 802a3b2:	3b01      	subs	r3, #1
 802a3b4:	60a3      	str	r3, [r4, #8]
 802a3b6:	6823      	ldr	r3, [r4, #0]
 802a3b8:	1c5a      	adds	r2, r3, #1
 802a3ba:	6022      	str	r2, [r4, #0]
 802a3bc:	701e      	strb	r6, [r3, #0]
 802a3be:	6962      	ldr	r2, [r4, #20]
 802a3c0:	1c43      	adds	r3, r0, #1
 802a3c2:	429a      	cmp	r2, r3
 802a3c4:	d004      	beq.n	802a3d0 <__swbuf_r+0x6e>
 802a3c6:	89a3      	ldrh	r3, [r4, #12]
 802a3c8:	07db      	lsls	r3, r3, #31
 802a3ca:	d5e1      	bpl.n	802a390 <__swbuf_r+0x2e>
 802a3cc:	2e0a      	cmp	r6, #10
 802a3ce:	d1df      	bne.n	802a390 <__swbuf_r+0x2e>
 802a3d0:	4621      	mov	r1, r4
 802a3d2:	4628      	mov	r0, r5
 802a3d4:	f002 fb0a 	bl	802c9ec <_fflush_r>
 802a3d8:	2800      	cmp	r0, #0
 802a3da:	d0d9      	beq.n	802a390 <__swbuf_r+0x2e>
 802a3dc:	e7d6      	b.n	802a38c <__swbuf_r+0x2a>
	...

0802a3e0 <__swsetup_r>:
 802a3e0:	b538      	push	{r3, r4, r5, lr}
 802a3e2:	4b29      	ldr	r3, [pc, #164]	@ (802a488 <__swsetup_r+0xa8>)
 802a3e4:	4605      	mov	r5, r0
 802a3e6:	6818      	ldr	r0, [r3, #0]
 802a3e8:	460c      	mov	r4, r1
 802a3ea:	b118      	cbz	r0, 802a3f4 <__swsetup_r+0x14>
 802a3ec:	6a03      	ldr	r3, [r0, #32]
 802a3ee:	b90b      	cbnz	r3, 802a3f4 <__swsetup_r+0x14>
 802a3f0:	f7ff feae 	bl	802a150 <__sinit>
 802a3f4:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
 802a3f8:	0719      	lsls	r1, r3, #28
 802a3fa:	d422      	bmi.n	802a442 <__swsetup_r+0x62>
 802a3fc:	06da      	lsls	r2, r3, #27
 802a3fe:	d407      	bmi.n	802a410 <__swsetup_r+0x30>
 802a400:	2209      	movs	r2, #9
 802a402:	602a      	str	r2, [r5, #0]
 802a404:	f043 0340 	orr.w	r3, r3, #64	@ 0x40
 802a408:	81a3      	strh	r3, [r4, #12]
 802a40a:	f04f 30ff 	mov.w	r0, #4294967295	@ 0xffffffff
 802a40e:	e033      	b.n	802a478 <__swsetup_r+0x98>
 802a410:	0758      	lsls	r0, r3, #29
 802a412:	d512      	bpl.n	802a43a <__swsetup_r+0x5a>
 802a414:	6b61      	ldr	r1, [r4, #52]	@ 0x34
 802a416:	b141      	cbz	r1, 802a42a <__swsetup_r+0x4a>
 802a418:	f104 0344 	add.w	r3, r4, #68	@ 0x44
 802a41c:	4299      	cmp	r1, r3
 802a41e:	d002      	beq.n	802a426 <__swsetup_r+0x46>
 802a420:	4628      	mov	r0, r5
 802a422:	f000 ff6b 	bl	802b2fc <_free_r>
 802a426:	2300      	movs	r3, #0
 802a428:	6363      	str	r3, [r4, #52]	@ 0x34
 802a42a:	89a3      	ldrh	r3, [r4, #12]
 802a42c:	f023 0324 	bic.w	r3, r3, #36	@ 0x24
 802a430:	81a3      	strh	r3, [r4, #12]
 802a432:	2300      	movs	r3, #0
 802a434:	6063      	str	r3, [r4, #4]
 802a436:	6923      	ldr	r3, [r4, #16]
 802a438:	6023      	str	r3, [r4, #0]
 802a43a:	89a3      	ldrh	r3, [r4, #12]
 802a43c:	f043 0308 	orr.w	r3, r3, #8
 802a440:	81a3      	strh	r3, [r4, #12]
 802a442:	6923      	ldr	r3, [r4, #16]
 802a444:	b94b      	cbnz	r3, 802a45a <__swsetup_r+0x7a>
 802a446:	89a3      	ldrh	r3, [r4, #12]
 802a448:	f403 7320 	and.w	r3, r3, #640	@ 0x280
 802a44c:	f5b3 7f00 	cmp.w	r3, #512	@ 0x200
 802a450:	d003      	beq.n	802a45a <__swsetup_r+0x7a>
 802a452:	4621      	mov	r1, r4
 802a454:	4628      	mov	r0, r5
 802a456:	f002 fb29 	bl	802caac <__smakebuf_r>
 802a45a:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
 802a45e:	f013 0201 	ands.w	r2, r3, #1
 802a462:	d00a      	beq.n	802a47a <__swsetup_r+0x9a>
 802a464:	2200      	movs	r2, #0
 802a466:	60a2      	str	r2, [r4, #8]
 802a468:	6962      	ldr	r2, [r4, #20]
 802a46a:	4252      	negs	r2, r2
 802a46c:	61a2      	str	r2, [r4, #24]
 802a46e:	6922      	ldr	r2, [r4, #16]
 802a470:	b942      	cbnz	r2, 802a484 <__swsetup_r+0xa4>
 802a472:	f013 0080 	ands.w	r0, r3, #128	@ 0x80
 802a476:	d1c5      	bne.n	802a404 <__swsetup_r+0x24>
 802a478:	bd38      	pop	{r3, r4, r5, pc}
 802a47a:	0799      	lsls	r1, r3, #30
 802a47c:	bf58      	it	pl
 802a47e:	6962      	ldrpl	r2, [r4, #20]
 802a480:	60a2      	str	r2, [r4, #8]
 802a482:	e7f4      	b.n	802a46e <__swsetup_r+0x8e>
 802a484:	2000      	movs	r0, #0
 802a486:	e7f7      	b.n	802a478 <__swsetup_r+0x98>
 802a488:	240001d4 	.word	0x240001d4

0802a48c <memcmp>:
 802a48c:	b510      	push	{r4, lr}
 802a48e:	3901      	subs	r1, #1
 802a490:	4402      	add	r2, r0
 802a492:	4290      	cmp	r0, r2
 802a494:	d101      	bne.n	802a49a <memcmp+0xe>
 802a496:	2000      	movs	r0, #0
 802a498:	e005      	b.n	802a4a6 <memcmp+0x1a>
 802a49a:	7803      	ldrb	r3, [r0, #0]
 802a49c:	f811 4f01 	ldrb.w	r4, [r1, #1]!
 802a4a0:	42a3      	cmp	r3, r4
 802a4a2:	d001      	beq.n	802a4a8 <memcmp+0x1c>
 802a4a4:	1b18      	subs	r0, r3, r4
 802a4a6:	bd10      	pop	{r4, pc}
 802a4a8:	3001      	adds	r0, #1
 802a4aa:	e7f2      	b.n	802a492 <memcmp+0x6>

0802a4ac <memmove>:
 802a4ac:	4288      	cmp	r0, r1
 802a4ae:	b510      	push	{r4, lr}
 802a4b0:	eb01 0402 	add.w	r4, r1, r2
 802a4b4:	d902      	bls.n	802a4bc <memmove+0x10>
 802a4b6:	4284      	cmp	r4, r0
 802a4b8:	4623      	mov	r3, r4
 802a4ba:	d807      	bhi.n	802a4cc <memmove+0x20>
 802a4bc:	1e43      	subs	r3, r0, #1
 802a4be:	42a1      	cmp	r1, r4
 802a4c0:	d008      	beq.n	802a4d4 <memmove+0x28>
 802a4c2:	f811 2b01 	ldrb.w	r2, [r1], #1
 802a4c6:	f803 2f01 	strb.w	r2, [r3, #1]!
 802a4ca:	e7f8      	b.n	802a4be <memmove+0x12>
 802a4cc:	4402      	add	r2, r0
 802a4ce:	4601      	mov	r1, r0
 802a4d0:	428a      	cmp	r2, r1
 802a4d2:	d100      	bne.n	802a4d6 <memmove+0x2a>
 802a4d4:	bd10      	pop	{r4, pc}
 802a4d6:	f813 4d01 	ldrb.w	r4, [r3, #-1]!
 802a4da:	f802 4d01 	strb.w	r4, [r2, #-1]!
 802a4de:	e7f7      	b.n	802a4d0 <memmove+0x24>

0802a4e0 <memset>:
 802a4e0:	4402      	add	r2, r0
 802a4e2:	4603      	mov	r3, r0
 802a4e4:	4293      	cmp	r3, r2
 802a4e6:	d100      	bne.n	802a4ea <memset+0xa>
 802a4e8:	4770      	bx	lr
 802a4ea:	f803 1b01 	strb.w	r1, [r3], #1
 802a4ee:	e7f9      	b.n	802a4e4 <memset+0x4>

0802a4f0 <strncmp>:
 802a4f0:	b510      	push	{r4, lr}
 802a4f2:	b16a      	cbz	r2, 802a510 <strncmp+0x20>
 802a4f4:	3901      	subs	r1, #1
 802a4f6:	1884      	adds	r4, r0, r2
 802a4f8:	f810 2b01 	ldrb.w	r2, [r0], #1
 802a4fc:	f811 3f01 	ldrb.w	r3, [r1, #1]!
 802a500:	429a      	cmp	r2, r3
 802a502:	d103      	bne.n	802a50c <strncmp+0x1c>
 802a504:	42a0      	cmp	r0, r4
 802a506:	d001      	beq.n	802a50c <strncmp+0x1c>
 802a508:	2a00      	cmp	r2, #0
 802a50a:	d1f5      	bne.n	802a4f8 <strncmp+0x8>
 802a50c:	1ad0      	subs	r0, r2, r3
 802a50e:	bd10      	pop	{r4, pc}
 802a510:	4610      	mov	r0, r2
 802a512:	e7fc      	b.n	802a50e <strncmp+0x1e>

0802a514 <_localeconv_r>:
 802a514:	4800      	ldr	r0, [pc, #0]	@ (802a518 <_localeconv_r+0x4>)
 802a516:	4770      	bx	lr
 802a518:	24000158 	.word	0x24000158

0802a51c <_close_r>:
 802a51c:	b538      	push	{r3, r4, r5, lr}
 802a51e:	4d06      	ldr	r5, [pc, #24]	@ (802a538 <_close_r+0x1c>)
 802a520:	2300      	movs	r3, #0
 802a522:	4604      	mov	r4, r0
 802a524:	4608      	mov	r0, r1
 802a526:	602b      	str	r3, [r5, #0]
 802a528:	f7d9 fc28 	bl	8003d7c <_close>
 802a52c:	1c43      	adds	r3, r0, #1
 802a52e:	d102      	bne.n	802a536 <_close_r+0x1a>
 802a530:	682b      	ldr	r3, [r5, #0]
 802a532:	b103      	cbz	r3, 802a536 <_close_r+0x1a>
 802a534:	6023      	str	r3, [r4, #0]
 802a536:	bd38      	pop	{r3, r4, r5, pc}
 802a538:	2402b250 	.word	0x2402b250

0802a53c <_reclaim_reent>:
 802a53c:	4b29      	ldr	r3, [pc, #164]	@ (802a5e4 <_reclaim_reent+0xa8>)
 802a53e:	681b      	ldr	r3, [r3, #0]
 802a540:	4283      	cmp	r3, r0
 802a542:	b570      	push	{r4, r5, r6, lr}
 802a544:	4604      	mov	r4, r0
 802a546:	d04b      	beq.n	802a5e0 <_reclaim_reent+0xa4>
 802a548:	69c3      	ldr	r3, [r0, #28]
 802a54a:	b1ab      	cbz	r3, 802a578 <_reclaim_reent+0x3c>
 802a54c:	68db      	ldr	r3, [r3, #12]
 802a54e:	b16b      	cbz	r3, 802a56c <_reclaim_reent+0x30>
 802a550:	2500      	movs	r5, #0
 802a552:	69e3      	ldr	r3, [r4, #28]
 802a554:	68db      	ldr	r3, [r3, #12]
 802a556:	5959      	ldr	r1, [r3, r5]
 802a558:	2900      	cmp	r1, #0
 802a55a:	d13b      	bne.n	802a5d4 <_reclaim_reent+0x98>
 802a55c:	3504      	adds	r5, #4
 802a55e:	2d80      	cmp	r5, #128	@ 0x80
 802a560:	d1f7      	bne.n	802a552 <_reclaim_reent+0x16>
 802a562:	69e3      	ldr	r3, [r4, #28]
 802a564:	4620      	mov	r0, r4
 802a566:	68d9      	ldr	r1, [r3, #12]
 802a568:	f000 fec8 	bl	802b2fc <_free_r>
 802a56c:	69e3      	ldr	r3, [r4, #28]
 802a56e:	6819      	ldr	r1, [r3, #0]
 802a570:	b111      	cbz	r1, 802a578 <_reclaim_reent+0x3c>
 802a572:	4620      	mov	r0, r4
 802a574:	f000 fec2 	bl	802b2fc <_free_r>
 802a578:	6961      	ldr	r1, [r4, #20]
 802a57a:	b111      	cbz	r1, 802a582 <_reclaim_reent+0x46>
 802a57c:	4620      	mov	r0, r4
 802a57e:	f000 febd 	bl	802b2fc <_free_r>
 802a582:	69e1      	ldr	r1, [r4, #28]
 802a584:	b111      	cbz	r1, 802a58c <_reclaim_reent+0x50>
 802a586:	4620      	mov	r0, r4
 802a588:	f000 feb8 	bl	802b2fc <_free_r>
 802a58c:	6b21      	ldr	r1, [r4, #48]	@ 0x30
 802a58e:	b111      	cbz	r1, 802a596 <_reclaim_reent+0x5a>
 802a590:	4620      	mov	r0, r4
 802a592:	f000 feb3 	bl	802b2fc <_free_r>
 802a596:	6b61      	ldr	r1, [r4, #52]	@ 0x34
 802a598:	b111      	cbz	r1, 802a5a0 <_reclaim_reent+0x64>
 802a59a:	4620      	mov	r0, r4
 802a59c:	f000 feae 	bl	802b2fc <_free_r>
 802a5a0:	6ba1      	ldr	r1, [r4, #56]	@ 0x38
 802a5a2:	b111      	cbz	r1, 802a5aa <_reclaim_reent+0x6e>
 802a5a4:	4620      	mov	r0, r4
 802a5a6:	f000 fea9 	bl	802b2fc <_free_r>
 802a5aa:	6ca1      	ldr	r1, [r4, #72]	@ 0x48
 802a5ac:	b111      	cbz	r1, 802a5b4 <_reclaim_reent+0x78>
 802a5ae:	4620      	mov	r0, r4
 802a5b0:	f000 fea4 	bl	802b2fc <_free_r>
 802a5b4:	6c61      	ldr	r1, [r4, #68]	@ 0x44
 802a5b6:	b111      	cbz	r1, 802a5be <_reclaim_reent+0x82>
 802a5b8:	4620      	mov	r0, r4
 802a5ba:	f000 fe9f 	bl	802b2fc <_free_r>
 802a5be:	6ae1      	ldr	r1, [r4, #44]	@ 0x2c
 802a5c0:	b111      	cbz	r1, 802a5c8 <_reclaim_reent+0x8c>
 802a5c2:	4620      	mov	r0, r4
 802a5c4:	f000 fe9a 	bl	802b2fc <_free_r>
 802a5c8:	6a23      	ldr	r3, [r4, #32]
 802a5ca:	b14b      	cbz	r3, 802a5e0 <_reclaim_reent+0xa4>
 802a5cc:	4620      	mov	r0, r4
 802a5ce:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
 802a5d2:	4718      	bx	r3
 802a5d4:	680e      	ldr	r6, [r1, #0]
 802a5d6:	4620      	mov	r0, r4
 802a5d8:	f000 fe90 	bl	802b2fc <_free_r>
 802a5dc:	4631      	mov	r1, r6
 802a5de:	e7bb      	b.n	802a558 <_reclaim_reent+0x1c>
 802a5e0:	bd70      	pop	{r4, r5, r6, pc}
 802a5e2:	bf00      	nop
 802a5e4:	240001d4 	.word	0x240001d4

0802a5e8 <_lseek_r>:
 802a5e8:	b538      	push	{r3, r4, r5, lr}
 802a5ea:	4d07      	ldr	r5, [pc, #28]	@ (802a608 <_lseek_r+0x20>)
 802a5ec:	4604      	mov	r4, r0
 802a5ee:	4608      	mov	r0, r1
 802a5f0:	4611      	mov	r1, r2
 802a5f2:	2200      	movs	r2, #0
 802a5f4:	602a      	str	r2, [r5, #0]
 802a5f6:	461a      	mov	r2, r3
 802a5f8:	f7d9 fbe7 	bl	8003dca <_lseek>
 802a5fc:	1c43      	adds	r3, r0, #1
 802a5fe:	d102      	bne.n	802a606 <_lseek_r+0x1e>
 802a600:	682b      	ldr	r3, [r5, #0]
 802a602:	b103      	cbz	r3, 802a606 <_lseek_r+0x1e>
 802a604:	6023      	str	r3, [r4, #0]
 802a606:	bd38      	pop	{r3, r4, r5, pc}
 802a608:	2402b250 	.word	0x2402b250

0802a60c <_read_r>:
 802a60c:	b538      	push	{r3, r4, r5, lr}
 802a60e:	4d07      	ldr	r5, [pc, #28]	@ (802a62c <_read_r+0x20>)
 802a610:	4604      	mov	r4, r0
 802a612:	4608      	mov	r0, r1
 802a614:	4611      	mov	r1, r2
 802a616:	2200      	movs	r2, #0
 802a618:	602a      	str	r2, [r5, #0]
 802a61a:	461a      	mov	r2, r3
 802a61c:	f7d9 fb75 	bl	8003d0a <_read>
 802a620:	1c43      	adds	r3, r0, #1
 802a622:	d102      	bne.n	802a62a <_read_r+0x1e>
 802a624:	682b      	ldr	r3, [r5, #0]
 802a626:	b103      	cbz	r3, 802a62a <_read_r+0x1e>
 802a628:	6023      	str	r3, [r4, #0]
 802a62a:	bd38      	pop	{r3, r4, r5, pc}
 802a62c:	2402b250 	.word	0x2402b250

0802a630 <_sbrk_r>:
 802a630:	b538      	push	{r3, r4, r5, lr}
 802a632:	4d06      	ldr	r5, [pc, #24]	@ (802a64c <_sbrk_r+0x1c>)
 802a634:	2300      	movs	r3, #0
 802a636:	4604      	mov	r4, r0
 802a638:	4608      	mov	r0, r1
 802a63a:	602b      	str	r3, [r5, #0]
 802a63c:	f7d9 fbd2 	bl	8003de4 <_sbrk>
 802a640:	1c43      	adds	r3, r0, #1
 802a642:	d102      	bne.n	802a64a <_sbrk_r+0x1a>
 802a644:	682b      	ldr	r3, [r5, #0]
 802a646:	b103      	cbz	r3, 802a64a <_sbrk_r+0x1a>
 802a648:	6023      	str	r3, [r4, #0]
 802a64a:	bd38      	pop	{r3, r4, r5, pc}
 802a64c:	2402b250 	.word	0x2402b250

0802a650 <_write_r>:
 802a650:	b538      	push	{r3, r4, r5, lr}
 802a652:	4d07      	ldr	r5, [pc, #28]	@ (802a670 <_write_r+0x20>)
 802a654:	4604      	mov	r4, r0
 802a656:	4608      	mov	r0, r1
 802a658:	4611      	mov	r1, r2
 802a65a:	2200      	movs	r2, #0
 802a65c:	602a      	str	r2, [r5, #0]
 802a65e:	461a      	mov	r2, r3
 802a660:	f7d9 fb70 	bl	8003d44 <_write>
 802a664:	1c43      	adds	r3, r0, #1
 802a666:	d102      	bne.n	802a66e <_write_r+0x1e>
 802a668:	682b      	ldr	r3, [r5, #0]
 802a66a:	b103      	cbz	r3, 802a66e <_write_r+0x1e>
 802a66c:	6023      	str	r3, [r4, #0]
 802a66e:	bd38      	pop	{r3, r4, r5, pc}
 802a670:	2402b250 	.word	0x2402b250

0802a674 <__errno>:
 802a674:	4b01      	ldr	r3, [pc, #4]	@ (802a67c <__errno+0x8>)
 802a676:	6818      	ldr	r0, [r3, #0]
 802a678:	4770      	bx	lr
 802a67a:	bf00      	nop
 802a67c:	240001d4 	.word	0x240001d4

0802a680 <__libc_init_array>:
 802a680:	b570      	push	{r4, r5, r6, lr}
 802a682:	4d0d      	ldr	r5, [pc, #52]	@ (802a6b8 <__libc_init_array+0x38>)
 802a684:	4c0d      	ldr	r4, [pc, #52]	@ (802a6bc <__libc_init_array+0x3c>)
 802a686:	1b64      	subs	r4, r4, r5
 802a688:	10a4      	asrs	r4, r4, #2
 802a68a:	2600      	movs	r6, #0
 802a68c:	42a6      	cmp	r6, r4
 802a68e:	d109      	bne.n	802a6a4 <__libc_init_array+0x24>
 802a690:	4d0b      	ldr	r5, [pc, #44]	@ (802a6c0 <__libc_init_array+0x40>)
 802a692:	4c0c      	ldr	r4, [pc, #48]	@ (802a6c4 <__libc_init_array+0x44>)
 802a694:	f002 fac8 	bl	802cc28 <_init>
 802a698:	1b64      	subs	r4, r4, r5
 802a69a:	10a4      	asrs	r4, r4, #2
 802a69c:	2600      	movs	r6, #0
 802a69e:	42a6      	cmp	r6, r4
 802a6a0:	d105      	bne.n	802a6ae <__libc_init_array+0x2e>
 802a6a2:	bd70      	pop	{r4, r5, r6, pc}
 802a6a4:	f855 3b04 	ldr.w	r3, [r5], #4
 802a6a8:	4798      	blx	r3
 802a6aa:	3601      	adds	r6, #1
 802a6ac:	e7ee      	b.n	802a68c <__libc_init_array+0xc>
 802a6ae:	f855 3b04 	ldr.w	r3, [r5], #4
 802a6b2:	4798      	blx	r3
 802a6b4:	3601      	adds	r6, #1
 802a6b6:	e7f2      	b.n	802a69e <__libc_init_array+0x1e>
 802a6b8:	08031994 	.word	0x08031994
 802a6bc:	08031994 	.word	0x08031994
 802a6c0:	08031994 	.word	0x08031994
 802a6c4:	08031998 	.word	0x08031998

0802a6c8 <__retarget_lock_init_recursive>:
 802a6c8:	4770      	bx	lr

0802a6ca <__retarget_lock_acquire_recursive>:
 802a6ca:	4770      	bx	lr

0802a6cc <__retarget_lock_release_recursive>:
 802a6cc:	4770      	bx	lr

0802a6ce <memcpy>:
 802a6ce:	440a      	add	r2, r1
 802a6d0:	4291      	cmp	r1, r2
 802a6d2:	f100 33ff 	add.w	r3, r0, #4294967295	@ 0xffffffff
 802a6d6:	d100      	bne.n	802a6da <memcpy+0xc>
 802a6d8:	4770      	bx	lr
 802a6da:	b510      	push	{r4, lr}
 802a6dc:	f811 4b01 	ldrb.w	r4, [r1], #1
 802a6e0:	f803 4f01 	strb.w	r4, [r3, #1]!
 802a6e4:	4291      	cmp	r1, r2
 802a6e6:	d1f9      	bne.n	802a6dc <memcpy+0xe>
 802a6e8:	bd10      	pop	{r4, pc}
 802a6ea:	0000      	movs	r0, r0
 802a6ec:	0000      	movs	r0, r0
	...

0802a6f0 <nan>:
 802a6f0:	ed9f 0b01 	vldr	d0, [pc, #4]	@ 802a6f8 <nan+0x8>
 802a6f4:	4770      	bx	lr
 802a6f6:	bf00      	nop
 802a6f8:	00000000 	.word	0x00000000
 802a6fc:	7ff80000 	.word	0x7ff80000

0802a700 <__assert_func>:
 802a700:	b51f      	push	{r0, r1, r2, r3, r4, lr}
 802a702:	4614      	mov	r4, r2
 802a704:	461a      	mov	r2, r3
 802a706:	4b09      	ldr	r3, [pc, #36]	@ (802a72c <__assert_func+0x2c>)
 802a708:	681b      	ldr	r3, [r3, #0]
 802a70a:	4605      	mov	r5, r0
 802a70c:	68d8      	ldr	r0, [r3, #12]
 802a70e:	b954      	cbnz	r4, 802a726 <__assert_func+0x26>
 802a710:	4b07      	ldr	r3, [pc, #28]	@ (802a730 <__assert_func+0x30>)
 802a712:	461c      	mov	r4, r3
 802a714:	e9cd 3401 	strd	r3, r4, [sp, #4]
 802a718:	9100      	str	r1, [sp, #0]
 802a71a:	462b      	mov	r3, r5
 802a71c:	4905      	ldr	r1, [pc, #20]	@ (802a734 <__assert_func+0x34>)
 802a71e:	f002 f98d 	bl	802ca3c <fiprintf>
 802a722:	f002 fa21 	bl	802cb68 <abort>
 802a726:	4b04      	ldr	r3, [pc, #16]	@ (802a738 <__assert_func+0x38>)
 802a728:	e7f4      	b.n	802a714 <__assert_func+0x14>
 802a72a:	bf00      	nop
 802a72c:	240001d4 	.word	0x240001d4
 802a730:	08031748 	.word	0x08031748
 802a734:	0803171a 	.word	0x0803171a
 802a738:	0803170d 	.word	0x0803170d

0802a73c <quorem>:
 802a73c:	e92d 4ff7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
 802a740:	6903      	ldr	r3, [r0, #16]
 802a742:	690c      	ldr	r4, [r1, #16]
 802a744:	42a3      	cmp	r3, r4
 802a746:	4607      	mov	r7, r0
 802a748:	db7e      	blt.n	802a848 <quorem+0x10c>
 802a74a:	3c01      	subs	r4, #1
 802a74c:	f101 0814 	add.w	r8, r1, #20
 802a750:	00a3      	lsls	r3, r4, #2
 802a752:	f100 0514 	add.w	r5, r0, #20
 802a756:	9300      	str	r3, [sp, #0]
 802a758:	eb05 0384 	add.w	r3, r5, r4, lsl #2
 802a75c:	9301      	str	r3, [sp, #4]
 802a75e:	f858 3024 	ldr.w	r3, [r8, r4, lsl #2]
 802a762:	f855 2024 	ldr.w	r2, [r5, r4, lsl #2]
 802a766:	3301      	adds	r3, #1
 802a768:	429a      	cmp	r2, r3
 802a76a:	eb08 0984 	add.w	r9, r8, r4, lsl #2
 802a76e:	fbb2 f6f3 	udiv	r6, r2, r3
 802a772:	d32e      	bcc.n	802a7d2 <quorem+0x96>
 802a774:	f04f 0a00 	mov.w	sl, #0
 802a778:	46c4      	mov	ip, r8
 802a77a:	46ae      	mov	lr, r5
 802a77c:	46d3      	mov	fp, sl
 802a77e:	f85c 3b04 	ldr.w	r3, [ip], #4
 802a782:	b298      	uxth	r0, r3
 802a784:	fb06 a000 	mla	r0, r6, r0, sl
 802a788:	0c02      	lsrs	r2, r0, #16
 802a78a:	0c1b      	lsrs	r3, r3, #16
 802a78c:	fb06 2303 	mla	r3, r6, r3, r2
 802a790:	f8de 2000 	ldr.w	r2, [lr]
 802a794:	b280      	uxth	r0, r0
 802a796:	b292      	uxth	r2, r2
 802a798:	1a12      	subs	r2, r2, r0
 802a79a:	445a      	add	r2, fp
 802a79c:	f8de 0000 	ldr.w	r0, [lr]
 802a7a0:	ea4f 4a13 	mov.w	sl, r3, lsr #16
 802a7a4:	b29b      	uxth	r3, r3
 802a7a6:	ebc3 4322 	rsb	r3, r3, r2, asr #16
 802a7aa:	eb03 4310 	add.w	r3, r3, r0, lsr #16
 802a7ae:	b292      	uxth	r2, r2
 802a7b0:	ea42 4203 	orr.w	r2, r2, r3, lsl #16
 802a7b4:	45e1      	cmp	r9, ip
 802a7b6:	f84e 2b04 	str.w	r2, [lr], #4
 802a7ba:	ea4f 4b23 	mov.w	fp, r3, asr #16
 802a7be:	d2de      	bcs.n	802a77e <quorem+0x42>
 802a7c0:	9b00      	ldr	r3, [sp, #0]
 802a7c2:	58eb      	ldr	r3, [r5, r3]
 802a7c4:	b92b      	cbnz	r3, 802a7d2 <quorem+0x96>
 802a7c6:	9b01      	ldr	r3, [sp, #4]
 802a7c8:	3b04      	subs	r3, #4
 802a7ca:	429d      	cmp	r5, r3
 802a7cc:	461a      	mov	r2, r3
 802a7ce:	d32f      	bcc.n	802a830 <quorem+0xf4>
 802a7d0:	613c      	str	r4, [r7, #16]
 802a7d2:	4638      	mov	r0, r7
 802a7d4:	f001 fbec 	bl	802bfb0 <__mcmp>
 802a7d8:	2800      	cmp	r0, #0
 802a7da:	db25      	blt.n	802a828 <quorem+0xec>
 802a7dc:	4629      	mov	r1, r5
 802a7de:	2000      	movs	r0, #0
 802a7e0:	f858 2b04 	ldr.w	r2, [r8], #4
 802a7e4:	f8d1 c000 	ldr.w	ip, [r1]
 802a7e8:	fa1f fe82 	uxth.w	lr, r2
 802a7ec:	fa1f f38c 	uxth.w	r3, ip
 802a7f0:	eba3 030e 	sub.w	r3, r3, lr
 802a7f4:	4403      	add	r3, r0
 802a7f6:	0c12      	lsrs	r2, r2, #16
 802a7f8:	ebc2 4223 	rsb	r2, r2, r3, asr #16
 802a7fc:	eb02 421c 	add.w	r2, r2, ip, lsr #16
 802a800:	b29b      	uxth	r3, r3
 802a802:	ea43 4302 	orr.w	r3, r3, r2, lsl #16
 802a806:	45c1      	cmp	r9, r8
 802a808:	f841 3b04 	str.w	r3, [r1], #4
 802a80c:	ea4f 4022 	mov.w	r0, r2, asr #16
 802a810:	d2e6      	bcs.n	802a7e0 <quorem+0xa4>
 802a812:	f855 2024 	ldr.w	r2, [r5, r4, lsl #2]
 802a816:	eb05 0384 	add.w	r3, r5, r4, lsl #2
 802a81a:	b922      	cbnz	r2, 802a826 <quorem+0xea>
 802a81c:	3b04      	subs	r3, #4
 802a81e:	429d      	cmp	r5, r3
 802a820:	461a      	mov	r2, r3
 802a822:	d30b      	bcc.n	802a83c <quorem+0x100>
 802a824:	613c      	str	r4, [r7, #16]
 802a826:	3601      	adds	r6, #1
 802a828:	4630      	mov	r0, r6
 802a82a:	b003      	add	sp, #12
 802a82c:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 802a830:	6812      	ldr	r2, [r2, #0]
 802a832:	3b04      	subs	r3, #4
 802a834:	2a00      	cmp	r2, #0
 802a836:	d1cb      	bne.n	802a7d0 <quorem+0x94>
 802a838:	3c01      	subs	r4, #1
 802a83a:	e7c6      	b.n	802a7ca <quorem+0x8e>
 802a83c:	6812      	ldr	r2, [r2, #0]
 802a83e:	3b04      	subs	r3, #4
 802a840:	2a00      	cmp	r2, #0
 802a842:	d1ef      	bne.n	802a824 <quorem+0xe8>
 802a844:	3c01      	subs	r4, #1
 802a846:	e7ea      	b.n	802a81e <quorem+0xe2>
 802a848:	2000      	movs	r0, #0
 802a84a:	e7ee      	b.n	802a82a <quorem+0xee>
 802a84c:	0000      	movs	r0, r0
	...

0802a850 <_dtoa_r>:
 802a850:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 802a854:	ed2d 8b02 	vpush	{d8}
 802a858:	69c7      	ldr	r7, [r0, #28]
 802a85a:	b091      	sub	sp, #68	@ 0x44
 802a85c:	ed8d 0b02 	vstr	d0, [sp, #8]
 802a860:	ec55 4b10 	vmov	r4, r5, d0
 802a864:	9e1c      	ldr	r6, [sp, #112]	@ 0x70
 802a866:	9107      	str	r1, [sp, #28]
 802a868:	4681      	mov	r9, r0
 802a86a:	9209      	str	r2, [sp, #36]	@ 0x24
 802a86c:	930d      	str	r3, [sp, #52]	@ 0x34
 802a86e:	b97f      	cbnz	r7, 802a890 <_dtoa_r+0x40>
 802a870:	2010      	movs	r0, #16
 802a872:	f7fe f8bb 	bl	80289ec <malloc>
 802a876:	4602      	mov	r2, r0
 802a878:	f8c9 001c 	str.w	r0, [r9, #28]
 802a87c:	b920      	cbnz	r0, 802a888 <_dtoa_r+0x38>
 802a87e:	4ba0      	ldr	r3, [pc, #640]	@ (802ab00 <_dtoa_r+0x2b0>)
 802a880:	21ef      	movs	r1, #239	@ 0xef
 802a882:	48a0      	ldr	r0, [pc, #640]	@ (802ab04 <_dtoa_r+0x2b4>)
 802a884:	f7ff ff3c 	bl	802a700 <__assert_func>
 802a888:	e9c0 7701 	strd	r7, r7, [r0, #4]
 802a88c:	6007      	str	r7, [r0, #0]
 802a88e:	60c7      	str	r7, [r0, #12]
 802a890:	f8d9 301c 	ldr.w	r3, [r9, #28]
 802a894:	6819      	ldr	r1, [r3, #0]
 802a896:	b159      	cbz	r1, 802a8b0 <_dtoa_r+0x60>
 802a898:	685a      	ldr	r2, [r3, #4]
 802a89a:	604a      	str	r2, [r1, #4]
 802a89c:	2301      	movs	r3, #1
 802a89e:	4093      	lsls	r3, r2
 802a8a0:	608b      	str	r3, [r1, #8]
 802a8a2:	4648      	mov	r0, r9
 802a8a4:	f001 f900 	bl	802baa8 <_Bfree>
 802a8a8:	f8d9 301c 	ldr.w	r3, [r9, #28]
 802a8ac:	2200      	movs	r2, #0
 802a8ae:	601a      	str	r2, [r3, #0]
 802a8b0:	1e2b      	subs	r3, r5, #0
 802a8b2:	bfbb      	ittet	lt
 802a8b4:	f023 4300 	biclt.w	r3, r3, #2147483648	@ 0x80000000
 802a8b8:	9303      	strlt	r3, [sp, #12]
 802a8ba:	2300      	movge	r3, #0
 802a8bc:	2201      	movlt	r2, #1
 802a8be:	bfac      	ite	ge
 802a8c0:	6033      	strge	r3, [r6, #0]
 802a8c2:	6032      	strlt	r2, [r6, #0]
 802a8c4:	4b90      	ldr	r3, [pc, #576]	@ (802ab08 <_dtoa_r+0x2b8>)
 802a8c6:	9e03      	ldr	r6, [sp, #12]
 802a8c8:	43b3      	bics	r3, r6
 802a8ca:	d110      	bne.n	802a8ee <_dtoa_r+0x9e>
 802a8cc:	9a0d      	ldr	r2, [sp, #52]	@ 0x34
 802a8ce:	f242 730f 	movw	r3, #9999	@ 0x270f
 802a8d2:	6013      	str	r3, [r2, #0]
 802a8d4:	f3c6 0313 	ubfx	r3, r6, #0, #20
 802a8d8:	4323      	orrs	r3, r4
 802a8da:	f000 84de 	beq.w	802b29a <_dtoa_r+0xa4a>
 802a8de:	9b1d      	ldr	r3, [sp, #116]	@ 0x74
 802a8e0:	4f8a      	ldr	r7, [pc, #552]	@ (802ab0c <_dtoa_r+0x2bc>)
 802a8e2:	2b00      	cmp	r3, #0
 802a8e4:	f000 84e0 	beq.w	802b2a8 <_dtoa_r+0xa58>
 802a8e8:	1cfb      	adds	r3, r7, #3
 802a8ea:	f000 bcdb 	b.w	802b2a4 <_dtoa_r+0xa54>
 802a8ee:	ed9d 8b02 	vldr	d8, [sp, #8]
 802a8f2:	eeb5 8b40 	vcmp.f64	d8, #0.0
 802a8f6:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802a8fa:	d10a      	bne.n	802a912 <_dtoa_r+0xc2>
 802a8fc:	9a0d      	ldr	r2, [sp, #52]	@ 0x34
 802a8fe:	2301      	movs	r3, #1
 802a900:	6013      	str	r3, [r2, #0]
 802a902:	9b1d      	ldr	r3, [sp, #116]	@ 0x74
 802a904:	b113      	cbz	r3, 802a90c <_dtoa_r+0xbc>
 802a906:	9a1d      	ldr	r2, [sp, #116]	@ 0x74
 802a908:	4b81      	ldr	r3, [pc, #516]	@ (802ab10 <_dtoa_r+0x2c0>)
 802a90a:	6013      	str	r3, [r2, #0]
 802a90c:	4f81      	ldr	r7, [pc, #516]	@ (802ab14 <_dtoa_r+0x2c4>)
 802a90e:	f000 bccb 	b.w	802b2a8 <_dtoa_r+0xa58>
 802a912:	aa0e      	add	r2, sp, #56	@ 0x38
 802a914:	a90f      	add	r1, sp, #60	@ 0x3c
 802a916:	4648      	mov	r0, r9
 802a918:	eeb0 0b48 	vmov.f64	d0, d8
 802a91c:	f001 fc68 	bl	802c1f0 <__d2b>
 802a920:	f3c6 530a 	ubfx	r3, r6, #20, #11
 802a924:	9a0e      	ldr	r2, [sp, #56]	@ 0x38
 802a926:	9001      	str	r0, [sp, #4]
 802a928:	2b00      	cmp	r3, #0
 802a92a:	d045      	beq.n	802a9b8 <_dtoa_r+0x168>
 802a92c:	eeb0 7b48 	vmov.f64	d7, d8
 802a930:	ee18 1a90 	vmov	r1, s17
 802a934:	f3c1 0113 	ubfx	r1, r1, #0, #20
 802a938:	f041 517f 	orr.w	r1, r1, #1069547520	@ 0x3fc00000
 802a93c:	f441 1140 	orr.w	r1, r1, #3145728	@ 0x300000
 802a940:	f2a3 33ff 	subw	r3, r3, #1023	@ 0x3ff
 802a944:	2500      	movs	r5, #0
 802a946:	ee07 1a90 	vmov	s15, r1
 802a94a:	eeb7 6b08 	vmov.f64	d6, #120	@ 0x3fc00000  1.5
 802a94e:	ed9f 5b66 	vldr	d5, [pc, #408]	@ 802aae8 <_dtoa_r+0x298>
 802a952:	ee37 7b46 	vsub.f64	d7, d7, d6
 802a956:	ed9f 6b66 	vldr	d6, [pc, #408]	@ 802aaf0 <_dtoa_r+0x2a0>
 802a95a:	eea7 6b05 	vfma.f64	d6, d7, d5
 802a95e:	ed9f 5b66 	vldr	d5, [pc, #408]	@ 802aaf8 <_dtoa_r+0x2a8>
 802a962:	ee07 3a90 	vmov	s15, r3
 802a966:	eeb8 4be7 	vcvt.f64.s32	d4, s15
 802a96a:	eeb0 7b46 	vmov.f64	d7, d6
 802a96e:	eea4 7b05 	vfma.f64	d7, d4, d5
 802a972:	eefd 6bc7 	vcvt.s32.f64	s13, d7
 802a976:	eeb5 7bc0 	vcmpe.f64	d7, #0.0
 802a97a:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802a97e:	ee16 8a90 	vmov	r8, s13
 802a982:	d508      	bpl.n	802a996 <_dtoa_r+0x146>
 802a984:	eeb8 6be6 	vcvt.f64.s32	d6, s13
 802a988:	eeb4 6b47 	vcmp.f64	d6, d7
 802a98c:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802a990:	bf18      	it	ne
 802a992:	f108 38ff 	addne.w	r8, r8, #4294967295	@ 0xffffffff
 802a996:	f1b8 0f16 	cmp.w	r8, #22
 802a99a:	d82b      	bhi.n	802a9f4 <_dtoa_r+0x1a4>
 802a99c:	495e      	ldr	r1, [pc, #376]	@ (802ab18 <_dtoa_r+0x2c8>)
 802a99e:	eb01 01c8 	add.w	r1, r1, r8, lsl #3
 802a9a2:	ed91 7b00 	vldr	d7, [r1]
 802a9a6:	eeb4 8bc7 	vcmpe.f64	d8, d7
 802a9aa:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802a9ae:	d501      	bpl.n	802a9b4 <_dtoa_r+0x164>
 802a9b0:	f108 38ff 	add.w	r8, r8, #4294967295	@ 0xffffffff
 802a9b4:	2100      	movs	r1, #0
 802a9b6:	e01e      	b.n	802a9f6 <_dtoa_r+0x1a6>
 802a9b8:	9b0f      	ldr	r3, [sp, #60]	@ 0x3c
 802a9ba:	4413      	add	r3, r2
 802a9bc:	f203 4132 	addw	r1, r3, #1074	@ 0x432
 802a9c0:	2920      	cmp	r1, #32
 802a9c2:	bfc1      	itttt	gt
 802a9c4:	f1c1 0140 	rsbgt	r1, r1, #64	@ 0x40
 802a9c8:	408e      	lslgt	r6, r1
 802a9ca:	f203 4112 	addwgt	r1, r3, #1042	@ 0x412
 802a9ce:	fa24 f101 	lsrgt.w	r1, r4, r1
 802a9d2:	bfd6      	itet	le
 802a9d4:	f1c1 0120 	rsble	r1, r1, #32
 802a9d8:	4331      	orrgt	r1, r6
 802a9da:	fa04 f101 	lslle.w	r1, r4, r1
 802a9de:	ee07 1a90 	vmov	s15, r1
 802a9e2:	eeb8 7b67 	vcvt.f64.u32	d7, s15
 802a9e6:	3b01      	subs	r3, #1
 802a9e8:	ee17 1a90 	vmov	r1, s15
 802a9ec:	2501      	movs	r5, #1
 802a9ee:	f1a1 71f8 	sub.w	r1, r1, #32505856	@ 0x1f00000
 802a9f2:	e7a8      	b.n	802a946 <_dtoa_r+0xf6>
 802a9f4:	2101      	movs	r1, #1
 802a9f6:	1ad2      	subs	r2, r2, r3
 802a9f8:	1e53      	subs	r3, r2, #1
 802a9fa:	9306      	str	r3, [sp, #24]
 802a9fc:	bf45      	ittet	mi
 802a9fe:	f1c2 0301 	rsbmi	r3, r2, #1
 802aa02:	9305      	strmi	r3, [sp, #20]
 802aa04:	2300      	movpl	r3, #0
 802aa06:	2300      	movmi	r3, #0
 802aa08:	bf4c      	ite	mi
 802aa0a:	9306      	strmi	r3, [sp, #24]
 802aa0c:	9305      	strpl	r3, [sp, #20]
 802aa0e:	f1b8 0f00 	cmp.w	r8, #0
 802aa12:	910c      	str	r1, [sp, #48]	@ 0x30
 802aa14:	db18      	blt.n	802aa48 <_dtoa_r+0x1f8>
 802aa16:	9b06      	ldr	r3, [sp, #24]
 802aa18:	f8cd 8028 	str.w	r8, [sp, #40]	@ 0x28
 802aa1c:	4443      	add	r3, r8
 802aa1e:	9306      	str	r3, [sp, #24]
 802aa20:	2300      	movs	r3, #0
 802aa22:	9a07      	ldr	r2, [sp, #28]
 802aa24:	2a09      	cmp	r2, #9
 802aa26:	d849      	bhi.n	802aabc <_dtoa_r+0x26c>
 802aa28:	2a05      	cmp	r2, #5
 802aa2a:	bfc4      	itt	gt
 802aa2c:	3a04      	subgt	r2, #4
 802aa2e:	9207      	strgt	r2, [sp, #28]
 802aa30:	9a07      	ldr	r2, [sp, #28]
 802aa32:	f1a2 0202 	sub.w	r2, r2, #2
 802aa36:	bfcc      	ite	gt
 802aa38:	2400      	movgt	r4, #0
 802aa3a:	2401      	movle	r4, #1
 802aa3c:	2a03      	cmp	r2, #3
 802aa3e:	d848      	bhi.n	802aad2 <_dtoa_r+0x282>
 802aa40:	e8df f002 	tbb	[pc, r2]
 802aa44:	3a2c2e0b 	.word	0x3a2c2e0b
 802aa48:	9b05      	ldr	r3, [sp, #20]
 802aa4a:	2200      	movs	r2, #0
 802aa4c:	eba3 0308 	sub.w	r3, r3, r8
 802aa50:	9305      	str	r3, [sp, #20]
 802aa52:	920a      	str	r2, [sp, #40]	@ 0x28
 802aa54:	f1c8 0300 	rsb	r3, r8, #0
 802aa58:	e7e3      	b.n	802aa22 <_dtoa_r+0x1d2>
 802aa5a:	2200      	movs	r2, #0
 802aa5c:	9208      	str	r2, [sp, #32]
 802aa5e:	9a09      	ldr	r2, [sp, #36]	@ 0x24
 802aa60:	2a00      	cmp	r2, #0
 802aa62:	dc39      	bgt.n	802aad8 <_dtoa_r+0x288>
 802aa64:	f04f 0b01 	mov.w	fp, #1
 802aa68:	46da      	mov	sl, fp
 802aa6a:	465a      	mov	r2, fp
 802aa6c:	f8cd b024 	str.w	fp, [sp, #36]	@ 0x24
 802aa70:	f8d9 701c 	ldr.w	r7, [r9, #28]
 802aa74:	2100      	movs	r1, #0
 802aa76:	2004      	movs	r0, #4
 802aa78:	f100 0614 	add.w	r6, r0, #20
 802aa7c:	4296      	cmp	r6, r2
 802aa7e:	d930      	bls.n	802aae2 <_dtoa_r+0x292>
 802aa80:	6079      	str	r1, [r7, #4]
 802aa82:	4648      	mov	r0, r9
 802aa84:	9304      	str	r3, [sp, #16]
 802aa86:	f000 ffcf 	bl	802ba28 <_Balloc>
 802aa8a:	9b04      	ldr	r3, [sp, #16]
 802aa8c:	4607      	mov	r7, r0
 802aa8e:	2800      	cmp	r0, #0
 802aa90:	d146      	bne.n	802ab20 <_dtoa_r+0x2d0>
 802aa92:	4b22      	ldr	r3, [pc, #136]	@ (802ab1c <_dtoa_r+0x2cc>)
 802aa94:	4602      	mov	r2, r0
 802aa96:	f240 11af 	movw	r1, #431	@ 0x1af
 802aa9a:	e6f2      	b.n	802a882 <_dtoa_r+0x32>
 802aa9c:	2201      	movs	r2, #1
 802aa9e:	e7dd      	b.n	802aa5c <_dtoa_r+0x20c>
 802aaa0:	2200      	movs	r2, #0
 802aaa2:	9208      	str	r2, [sp, #32]
 802aaa4:	9a09      	ldr	r2, [sp, #36]	@ 0x24
 802aaa6:	eb08 0b02 	add.w	fp, r8, r2
 802aaaa:	f10b 0a01 	add.w	sl, fp, #1
 802aaae:	4652      	mov	r2, sl
 802aab0:	2a01      	cmp	r2, #1
 802aab2:	bfb8      	it	lt
 802aab4:	2201      	movlt	r2, #1
 802aab6:	e7db      	b.n	802aa70 <_dtoa_r+0x220>
 802aab8:	2201      	movs	r2, #1
 802aaba:	e7f2      	b.n	802aaa2 <_dtoa_r+0x252>
 802aabc:	2401      	movs	r4, #1
 802aabe:	2200      	movs	r2, #0
 802aac0:	e9cd 2407 	strd	r2, r4, [sp, #28]
 802aac4:	f04f 3bff 	mov.w	fp, #4294967295	@ 0xffffffff
 802aac8:	2100      	movs	r1, #0
 802aaca:	46da      	mov	sl, fp
 802aacc:	2212      	movs	r2, #18
 802aace:	9109      	str	r1, [sp, #36]	@ 0x24
 802aad0:	e7ce      	b.n	802aa70 <_dtoa_r+0x220>
 802aad2:	2201      	movs	r2, #1
 802aad4:	9208      	str	r2, [sp, #32]
 802aad6:	e7f5      	b.n	802aac4 <_dtoa_r+0x274>
 802aad8:	f8dd b024 	ldr.w	fp, [sp, #36]	@ 0x24
 802aadc:	46da      	mov	sl, fp
 802aade:	465a      	mov	r2, fp
 802aae0:	e7c6      	b.n	802aa70 <_dtoa_r+0x220>
 802aae2:	3101      	adds	r1, #1
 802aae4:	0040      	lsls	r0, r0, #1
 802aae6:	e7c7      	b.n	802aa78 <_dtoa_r+0x228>
 802aae8:	636f4361 	.word	0x636f4361
 802aaec:	3fd287a7 	.word	0x3fd287a7
 802aaf0:	8b60c8b3 	.word	0x8b60c8b3
 802aaf4:	3fc68a28 	.word	0x3fc68a28
 802aaf8:	509f79fb 	.word	0x509f79fb
 802aafc:	3fd34413 	.word	0x3fd34413
 802ab00:	0803150a 	.word	0x0803150a
 802ab04:	08031756 	.word	0x08031756
 802ab08:	7ff00000 	.word	0x7ff00000
 802ab0c:	08031752 	.word	0x08031752
 802ab10:	080316e2 	.word	0x080316e2
 802ab14:	080316e1 	.word	0x080316e1
 802ab18:	080318b0 	.word	0x080318b0
 802ab1c:	080317ae 	.word	0x080317ae
 802ab20:	f8d9 201c 	ldr.w	r2, [r9, #28]
 802ab24:	f1ba 0f0e 	cmp.w	sl, #14
 802ab28:	6010      	str	r0, [r2, #0]
 802ab2a:	d86f      	bhi.n	802ac0c <_dtoa_r+0x3bc>
 802ab2c:	2c00      	cmp	r4, #0
 802ab2e:	d06d      	beq.n	802ac0c <_dtoa_r+0x3bc>
 802ab30:	f1b8 0f00 	cmp.w	r8, #0
 802ab34:	f340 80c2 	ble.w	802acbc <_dtoa_r+0x46c>
 802ab38:	4aca      	ldr	r2, [pc, #808]	@ (802ae64 <_dtoa_r+0x614>)
 802ab3a:	f008 010f 	and.w	r1, r8, #15
 802ab3e:	eb02 02c1 	add.w	r2, r2, r1, lsl #3
 802ab42:	f418 7f80 	tst.w	r8, #256	@ 0x100
 802ab46:	ed92 7b00 	vldr	d7, [r2]
 802ab4a:	ea4f 1128 	mov.w	r1, r8, asr #4
 802ab4e:	f000 80a9 	beq.w	802aca4 <_dtoa_r+0x454>
 802ab52:	4ac5      	ldr	r2, [pc, #788]	@ (802ae68 <_dtoa_r+0x618>)
 802ab54:	ed92 6b08 	vldr	d6, [r2, #32]
 802ab58:	ee88 6b06 	vdiv.f64	d6, d8, d6
 802ab5c:	ed8d 6b02 	vstr	d6, [sp, #8]
 802ab60:	f001 010f 	and.w	r1, r1, #15
 802ab64:	2203      	movs	r2, #3
 802ab66:	48c0      	ldr	r0, [pc, #768]	@ (802ae68 <_dtoa_r+0x618>)
 802ab68:	2900      	cmp	r1, #0
 802ab6a:	f040 809d 	bne.w	802aca8 <_dtoa_r+0x458>
 802ab6e:	ed9d 6b02 	vldr	d6, [sp, #8]
 802ab72:	ee86 7b07 	vdiv.f64	d7, d6, d7
 802ab76:	ed8d 7b02 	vstr	d7, [sp, #8]
 802ab7a:	990c      	ldr	r1, [sp, #48]	@ 0x30
 802ab7c:	ed9d 7b02 	vldr	d7, [sp, #8]
 802ab80:	2900      	cmp	r1, #0
 802ab82:	f000 80c1 	beq.w	802ad08 <_dtoa_r+0x4b8>
 802ab86:	eeb7 6b00 	vmov.f64	d6, #112	@ 0x3f800000  1.0
 802ab8a:	eeb4 7bc6 	vcmpe.f64	d7, d6
 802ab8e:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802ab92:	f140 80b9 	bpl.w	802ad08 <_dtoa_r+0x4b8>
 802ab96:	f1ba 0f00 	cmp.w	sl, #0
 802ab9a:	f000 80b5 	beq.w	802ad08 <_dtoa_r+0x4b8>
 802ab9e:	f1bb 0f00 	cmp.w	fp, #0
 802aba2:	dd31      	ble.n	802ac08 <_dtoa_r+0x3b8>
 802aba4:	eeb2 6b04 	vmov.f64	d6, #36	@ 0x41200000  10.0
 802aba8:	ee27 7b06 	vmul.f64	d7, d7, d6
 802abac:	ed8d 7b02 	vstr	d7, [sp, #8]
 802abb0:	f108 31ff 	add.w	r1, r8, #4294967295	@ 0xffffffff
 802abb4:	9104      	str	r1, [sp, #16]
 802abb6:	3201      	adds	r2, #1
 802abb8:	465c      	mov	r4, fp
 802abba:	ed9d 6b02 	vldr	d6, [sp, #8]
 802abbe:	eeb1 5b0c 	vmov.f64	d5, #28	@ 0x40e00000  7.0
 802abc2:	ee07 2a90 	vmov	s15, r2
 802abc6:	eeb8 7be7 	vcvt.f64.s32	d7, s15
 802abca:	eea7 5b06 	vfma.f64	d5, d7, d6
 802abce:	ee15 2a90 	vmov	r2, s11
 802abd2:	ec51 0b15 	vmov	r0, r1, d5
 802abd6:	f1a2 7150 	sub.w	r1, r2, #54525952	@ 0x3400000
 802abda:	2c00      	cmp	r4, #0
 802abdc:	f040 8098 	bne.w	802ad10 <_dtoa_r+0x4c0>
 802abe0:	eeb1 7b04 	vmov.f64	d7, #20	@ 0x40a00000  5.0
 802abe4:	ee36 6b47 	vsub.f64	d6, d6, d7
 802abe8:	ec41 0b17 	vmov	d7, r0, r1
 802abec:	eeb4 6bc7 	vcmpe.f64	d6, d7
 802abf0:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802abf4:	f300 8261 	bgt.w	802b0ba <_dtoa_r+0x86a>
 802abf8:	eeb1 7b47 	vneg.f64	d7, d7
 802abfc:	eeb4 6bc7 	vcmpe.f64	d6, d7
 802ac00:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802ac04:	f100 80f5 	bmi.w	802adf2 <_dtoa_r+0x5a2>
 802ac08:	ed8d 8b02 	vstr	d8, [sp, #8]
 802ac0c:	9a0f      	ldr	r2, [sp, #60]	@ 0x3c
 802ac0e:	2a00      	cmp	r2, #0
 802ac10:	f2c0 812c 	blt.w	802ae6c <_dtoa_r+0x61c>
 802ac14:	f1b8 0f0e 	cmp.w	r8, #14
 802ac18:	f300 8128 	bgt.w	802ae6c <_dtoa_r+0x61c>
 802ac1c:	4b91      	ldr	r3, [pc, #580]	@ (802ae64 <_dtoa_r+0x614>)
 802ac1e:	eb03 03c8 	add.w	r3, r3, r8, lsl #3
 802ac22:	ed93 6b00 	vldr	d6, [r3]
 802ac26:	9b09      	ldr	r3, [sp, #36]	@ 0x24
 802ac28:	2b00      	cmp	r3, #0
 802ac2a:	da03      	bge.n	802ac34 <_dtoa_r+0x3e4>
 802ac2c:	f1ba 0f00 	cmp.w	sl, #0
 802ac30:	f340 80d2 	ble.w	802add8 <_dtoa_r+0x588>
 802ac34:	eeb2 4b04 	vmov.f64	d4, #36	@ 0x41200000  10.0
 802ac38:	ed9d 7b02 	vldr	d7, [sp, #8]
 802ac3c:	463e      	mov	r6, r7
 802ac3e:	ee87 5b06 	vdiv.f64	d5, d7, d6
 802ac42:	eebd 5bc5 	vcvt.s32.f64	s10, d5
 802ac46:	ee15 3a10 	vmov	r3, s10
 802ac4a:	3330      	adds	r3, #48	@ 0x30
 802ac4c:	f806 3b01 	strb.w	r3, [r6], #1
 802ac50:	1bf3      	subs	r3, r6, r7
 802ac52:	459a      	cmp	sl, r3
 802ac54:	eeb8 3bc5 	vcvt.f64.s32	d3, s10
 802ac58:	eea3 7b46 	vfms.f64	d7, d3, d6
 802ac5c:	f040 80f8 	bne.w	802ae50 <_dtoa_r+0x600>
 802ac60:	ee37 7b07 	vadd.f64	d7, d7, d7
 802ac64:	eeb4 7bc6 	vcmpe.f64	d7, d6
 802ac68:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802ac6c:	f300 80dd 	bgt.w	802ae2a <_dtoa_r+0x5da>
 802ac70:	eeb4 7b46 	vcmp.f64	d7, d6
 802ac74:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802ac78:	d104      	bne.n	802ac84 <_dtoa_r+0x434>
 802ac7a:	ee15 3a10 	vmov	r3, s10
 802ac7e:	07db      	lsls	r3, r3, #31
 802ac80:	f100 80d3 	bmi.w	802ae2a <_dtoa_r+0x5da>
 802ac84:	9901      	ldr	r1, [sp, #4]
 802ac86:	4648      	mov	r0, r9
 802ac88:	f000 ff0e 	bl	802baa8 <_Bfree>
 802ac8c:	2300      	movs	r3, #0
 802ac8e:	9a0d      	ldr	r2, [sp, #52]	@ 0x34
 802ac90:	7033      	strb	r3, [r6, #0]
 802ac92:	f108 0301 	add.w	r3, r8, #1
 802ac96:	6013      	str	r3, [r2, #0]
 802ac98:	9b1d      	ldr	r3, [sp, #116]	@ 0x74
 802ac9a:	2b00      	cmp	r3, #0
 802ac9c:	f000 8304 	beq.w	802b2a8 <_dtoa_r+0xa58>
 802aca0:	601e      	str	r6, [r3, #0]
 802aca2:	e301      	b.n	802b2a8 <_dtoa_r+0xa58>
 802aca4:	2202      	movs	r2, #2
 802aca6:	e75e      	b.n	802ab66 <_dtoa_r+0x316>
 802aca8:	07cc      	lsls	r4, r1, #31
 802acaa:	d504      	bpl.n	802acb6 <_dtoa_r+0x466>
 802acac:	ed90 6b00 	vldr	d6, [r0]
 802acb0:	3201      	adds	r2, #1
 802acb2:	ee27 7b06 	vmul.f64	d7, d7, d6
 802acb6:	1049      	asrs	r1, r1, #1
 802acb8:	3008      	adds	r0, #8
 802acba:	e755      	b.n	802ab68 <_dtoa_r+0x318>
 802acbc:	d022      	beq.n	802ad04 <_dtoa_r+0x4b4>
 802acbe:	f1c8 0100 	rsb	r1, r8, #0
 802acc2:	4a68      	ldr	r2, [pc, #416]	@ (802ae64 <_dtoa_r+0x614>)
 802acc4:	f001 000f 	and.w	r0, r1, #15
 802acc8:	eb02 02c0 	add.w	r2, r2, r0, lsl #3
 802accc:	ed92 7b00 	vldr	d7, [r2]
 802acd0:	ee28 7b07 	vmul.f64	d7, d8, d7
 802acd4:	ed8d 7b02 	vstr	d7, [sp, #8]
 802acd8:	4863      	ldr	r0, [pc, #396]	@ (802ae68 <_dtoa_r+0x618>)
 802acda:	1109      	asrs	r1, r1, #4
 802acdc:	2400      	movs	r4, #0
 802acde:	2202      	movs	r2, #2
 802ace0:	b929      	cbnz	r1, 802acee <_dtoa_r+0x49e>
 802ace2:	2c00      	cmp	r4, #0
 802ace4:	f43f af49 	beq.w	802ab7a <_dtoa_r+0x32a>
 802ace8:	ed8d 7b02 	vstr	d7, [sp, #8]
 802acec:	e745      	b.n	802ab7a <_dtoa_r+0x32a>
 802acee:	07ce      	lsls	r6, r1, #31
 802acf0:	d505      	bpl.n	802acfe <_dtoa_r+0x4ae>
 802acf2:	ed90 6b00 	vldr	d6, [r0]
 802acf6:	3201      	adds	r2, #1
 802acf8:	2401      	movs	r4, #1
 802acfa:	ee27 7b06 	vmul.f64	d7, d7, d6
 802acfe:	1049      	asrs	r1, r1, #1
 802ad00:	3008      	adds	r0, #8
 802ad02:	e7ed      	b.n	802ace0 <_dtoa_r+0x490>
 802ad04:	2202      	movs	r2, #2
 802ad06:	e738      	b.n	802ab7a <_dtoa_r+0x32a>
 802ad08:	f8cd 8010 	str.w	r8, [sp, #16]
 802ad0c:	4654      	mov	r4, sl
 802ad0e:	e754      	b.n	802abba <_dtoa_r+0x36a>
 802ad10:	4a54      	ldr	r2, [pc, #336]	@ (802ae64 <_dtoa_r+0x614>)
 802ad12:	eb02 02c4 	add.w	r2, r2, r4, lsl #3
 802ad16:	ed12 4b02 	vldr	d4, [r2, #-8]
 802ad1a:	9a08      	ldr	r2, [sp, #32]
 802ad1c:	ec41 0b17 	vmov	d7, r0, r1
 802ad20:	443c      	add	r4, r7
 802ad22:	b34a      	cbz	r2, 802ad78 <_dtoa_r+0x528>
 802ad24:	eeb6 3b00 	vmov.f64	d3, #96	@ 0x3f000000  0.5
 802ad28:	eeb7 2b00 	vmov.f64	d2, #112	@ 0x3f800000  1.0
 802ad2c:	463e      	mov	r6, r7
 802ad2e:	ee83 5b04 	vdiv.f64	d5, d3, d4
 802ad32:	eeb2 3b04 	vmov.f64	d3, #36	@ 0x41200000  10.0
 802ad36:	ee35 7b47 	vsub.f64	d7, d5, d7
 802ad3a:	eefd 4bc6 	vcvt.s32.f64	s9, d6
 802ad3e:	ee14 2a90 	vmov	r2, s9
 802ad42:	eeb8 5be4 	vcvt.f64.s32	d5, s9
 802ad46:	3230      	adds	r2, #48	@ 0x30
 802ad48:	ee36 6b45 	vsub.f64	d6, d6, d5
 802ad4c:	eeb4 6bc7 	vcmpe.f64	d6, d7
 802ad50:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802ad54:	f806 2b01 	strb.w	r2, [r6], #1
 802ad58:	d438      	bmi.n	802adcc <_dtoa_r+0x57c>
 802ad5a:	ee32 5b46 	vsub.f64	d5, d2, d6
 802ad5e:	eeb4 5bc7 	vcmpe.f64	d5, d7
 802ad62:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802ad66:	d462      	bmi.n	802ae2e <_dtoa_r+0x5de>
 802ad68:	42a6      	cmp	r6, r4
 802ad6a:	f43f af4d 	beq.w	802ac08 <_dtoa_r+0x3b8>
 802ad6e:	ee27 7b03 	vmul.f64	d7, d7, d3
 802ad72:	ee26 6b03 	vmul.f64	d6, d6, d3
 802ad76:	e7e0      	b.n	802ad3a <_dtoa_r+0x4ea>
 802ad78:	4621      	mov	r1, r4
 802ad7a:	463e      	mov	r6, r7
 802ad7c:	ee27 7b04 	vmul.f64	d7, d7, d4
 802ad80:	eeb2 3b04 	vmov.f64	d3, #36	@ 0x41200000  10.0
 802ad84:	eefd 4bc6 	vcvt.s32.f64	s9, d6
 802ad88:	ee14 2a90 	vmov	r2, s9
 802ad8c:	3230      	adds	r2, #48	@ 0x30
 802ad8e:	f806 2b01 	strb.w	r2, [r6], #1
 802ad92:	42a6      	cmp	r6, r4
 802ad94:	eeb8 5be4 	vcvt.f64.s32	d5, s9
 802ad98:	ee36 6b45 	vsub.f64	d6, d6, d5
 802ad9c:	d119      	bne.n	802add2 <_dtoa_r+0x582>
 802ad9e:	eeb6 5b00 	vmov.f64	d5, #96	@ 0x3f000000  0.5
 802ada2:	ee37 4b05 	vadd.f64	d4, d7, d5
 802ada6:	eeb4 6bc4 	vcmpe.f64	d6, d4
 802adaa:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802adae:	dc3e      	bgt.n	802ae2e <_dtoa_r+0x5de>
 802adb0:	ee35 5b47 	vsub.f64	d5, d5, d7
 802adb4:	eeb4 6bc5 	vcmpe.f64	d6, d5
 802adb8:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802adbc:	f57f af24 	bpl.w	802ac08 <_dtoa_r+0x3b8>
 802adc0:	460e      	mov	r6, r1
 802adc2:	3901      	subs	r1, #1
 802adc4:	f816 3c01 	ldrb.w	r3, [r6, #-1]
 802adc8:	2b30      	cmp	r3, #48	@ 0x30
 802adca:	d0f9      	beq.n	802adc0 <_dtoa_r+0x570>
 802adcc:	f8dd 8010 	ldr.w	r8, [sp, #16]
 802add0:	e758      	b.n	802ac84 <_dtoa_r+0x434>
 802add2:	ee26 6b03 	vmul.f64	d6, d6, d3
 802add6:	e7d5      	b.n	802ad84 <_dtoa_r+0x534>
 802add8:	d10b      	bne.n	802adf2 <_dtoa_r+0x5a2>
 802adda:	eeb1 7b04 	vmov.f64	d7, #20	@ 0x40a00000  5.0
 802adde:	ee26 6b07 	vmul.f64	d6, d6, d7
 802ade2:	ed9d 7b02 	vldr	d7, [sp, #8]
 802ade6:	eeb4 6bc7 	vcmpe.f64	d6, d7
 802adea:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802adee:	f2c0 8161 	blt.w	802b0b4 <_dtoa_r+0x864>
 802adf2:	2400      	movs	r4, #0
 802adf4:	4625      	mov	r5, r4
 802adf6:	9b09      	ldr	r3, [sp, #36]	@ 0x24
 802adf8:	43db      	mvns	r3, r3
 802adfa:	9304      	str	r3, [sp, #16]
 802adfc:	463e      	mov	r6, r7
 802adfe:	f04f 0800 	mov.w	r8, #0
 802ae02:	4621      	mov	r1, r4
 802ae04:	4648      	mov	r0, r9
 802ae06:	f000 fe4f 	bl	802baa8 <_Bfree>
 802ae0a:	2d00      	cmp	r5, #0
 802ae0c:	d0de      	beq.n	802adcc <_dtoa_r+0x57c>
 802ae0e:	f1b8 0f00 	cmp.w	r8, #0
 802ae12:	d005      	beq.n	802ae20 <_dtoa_r+0x5d0>
 802ae14:	45a8      	cmp	r8, r5
 802ae16:	d003      	beq.n	802ae20 <_dtoa_r+0x5d0>
 802ae18:	4641      	mov	r1, r8
 802ae1a:	4648      	mov	r0, r9
 802ae1c:	f000 fe44 	bl	802baa8 <_Bfree>
 802ae20:	4629      	mov	r1, r5
 802ae22:	4648      	mov	r0, r9
 802ae24:	f000 fe40 	bl	802baa8 <_Bfree>
 802ae28:	e7d0      	b.n	802adcc <_dtoa_r+0x57c>
 802ae2a:	f8cd 8010 	str.w	r8, [sp, #16]
 802ae2e:	4633      	mov	r3, r6
 802ae30:	461e      	mov	r6, r3
 802ae32:	f813 2d01 	ldrb.w	r2, [r3, #-1]!
 802ae36:	2a39      	cmp	r2, #57	@ 0x39
 802ae38:	d106      	bne.n	802ae48 <_dtoa_r+0x5f8>
 802ae3a:	429f      	cmp	r7, r3
 802ae3c:	d1f8      	bne.n	802ae30 <_dtoa_r+0x5e0>
 802ae3e:	9a04      	ldr	r2, [sp, #16]
 802ae40:	3201      	adds	r2, #1
 802ae42:	9204      	str	r2, [sp, #16]
 802ae44:	2230      	movs	r2, #48	@ 0x30
 802ae46:	703a      	strb	r2, [r7, #0]
 802ae48:	781a      	ldrb	r2, [r3, #0]
 802ae4a:	3201      	adds	r2, #1
 802ae4c:	701a      	strb	r2, [r3, #0]
 802ae4e:	e7bd      	b.n	802adcc <_dtoa_r+0x57c>
 802ae50:	ee27 7b04 	vmul.f64	d7, d7, d4
 802ae54:	eeb5 7b40 	vcmp.f64	d7, #0.0
 802ae58:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802ae5c:	f47f aeef 	bne.w	802ac3e <_dtoa_r+0x3ee>
 802ae60:	e710      	b.n	802ac84 <_dtoa_r+0x434>
 802ae62:	bf00      	nop
 802ae64:	080318b0 	.word	0x080318b0
 802ae68:	08031888 	.word	0x08031888
 802ae6c:	9908      	ldr	r1, [sp, #32]
 802ae6e:	2900      	cmp	r1, #0
 802ae70:	f000 80e3 	beq.w	802b03a <_dtoa_r+0x7ea>
 802ae74:	9907      	ldr	r1, [sp, #28]
 802ae76:	2901      	cmp	r1, #1
 802ae78:	f300 80c8 	bgt.w	802b00c <_dtoa_r+0x7bc>
 802ae7c:	2d00      	cmp	r5, #0
 802ae7e:	f000 80c1 	beq.w	802b004 <_dtoa_r+0x7b4>
 802ae82:	f202 4233 	addw	r2, r2, #1075	@ 0x433
 802ae86:	9e05      	ldr	r6, [sp, #20]
 802ae88:	461c      	mov	r4, r3
 802ae8a:	9304      	str	r3, [sp, #16]
 802ae8c:	9b05      	ldr	r3, [sp, #20]
 802ae8e:	4413      	add	r3, r2
 802ae90:	9305      	str	r3, [sp, #20]
 802ae92:	9b06      	ldr	r3, [sp, #24]
 802ae94:	2101      	movs	r1, #1
 802ae96:	4413      	add	r3, r2
 802ae98:	4648      	mov	r0, r9
 802ae9a:	9306      	str	r3, [sp, #24]
 802ae9c:	f000 ff02 	bl	802bca4 <__i2b>
 802aea0:	9b04      	ldr	r3, [sp, #16]
 802aea2:	4605      	mov	r5, r0
 802aea4:	b166      	cbz	r6, 802aec0 <_dtoa_r+0x670>
 802aea6:	9a06      	ldr	r2, [sp, #24]
 802aea8:	2a00      	cmp	r2, #0
 802aeaa:	dd09      	ble.n	802aec0 <_dtoa_r+0x670>
 802aeac:	42b2      	cmp	r2, r6
 802aeae:	9905      	ldr	r1, [sp, #20]
 802aeb0:	bfa8      	it	ge
 802aeb2:	4632      	movge	r2, r6
 802aeb4:	1a89      	subs	r1, r1, r2
 802aeb6:	9105      	str	r1, [sp, #20]
 802aeb8:	9906      	ldr	r1, [sp, #24]
 802aeba:	1ab6      	subs	r6, r6, r2
 802aebc:	1a8a      	subs	r2, r1, r2
 802aebe:	9206      	str	r2, [sp, #24]
 802aec0:	b1fb      	cbz	r3, 802af02 <_dtoa_r+0x6b2>
 802aec2:	9a08      	ldr	r2, [sp, #32]
 802aec4:	2a00      	cmp	r2, #0
 802aec6:	f000 80bc 	beq.w	802b042 <_dtoa_r+0x7f2>
 802aeca:	b19c      	cbz	r4, 802aef4 <_dtoa_r+0x6a4>
 802aecc:	4629      	mov	r1, r5
 802aece:	4622      	mov	r2, r4
 802aed0:	4648      	mov	r0, r9
 802aed2:	930b      	str	r3, [sp, #44]	@ 0x2c
 802aed4:	f000 ffa6 	bl	802be24 <__pow5mult>
 802aed8:	9a01      	ldr	r2, [sp, #4]
 802aeda:	4601      	mov	r1, r0
 802aedc:	4605      	mov	r5, r0
 802aede:	4648      	mov	r0, r9
 802aee0:	f000 fef6 	bl	802bcd0 <__multiply>
 802aee4:	9901      	ldr	r1, [sp, #4]
 802aee6:	9004      	str	r0, [sp, #16]
 802aee8:	4648      	mov	r0, r9
 802aeea:	f000 fddd 	bl	802baa8 <_Bfree>
 802aeee:	9a04      	ldr	r2, [sp, #16]
 802aef0:	9b0b      	ldr	r3, [sp, #44]	@ 0x2c
 802aef2:	9201      	str	r2, [sp, #4]
 802aef4:	1b1a      	subs	r2, r3, r4
 802aef6:	d004      	beq.n	802af02 <_dtoa_r+0x6b2>
 802aef8:	9901      	ldr	r1, [sp, #4]
 802aefa:	4648      	mov	r0, r9
 802aefc:	f000 ff92 	bl	802be24 <__pow5mult>
 802af00:	9001      	str	r0, [sp, #4]
 802af02:	2101      	movs	r1, #1
 802af04:	4648      	mov	r0, r9
 802af06:	f000 fecd 	bl	802bca4 <__i2b>
 802af0a:	9b0a      	ldr	r3, [sp, #40]	@ 0x28
 802af0c:	4604      	mov	r4, r0
 802af0e:	2b00      	cmp	r3, #0
 802af10:	f000 81d0 	beq.w	802b2b4 <_dtoa_r+0xa64>
 802af14:	461a      	mov	r2, r3
 802af16:	4601      	mov	r1, r0
 802af18:	4648      	mov	r0, r9
 802af1a:	f000 ff83 	bl	802be24 <__pow5mult>
 802af1e:	9b07      	ldr	r3, [sp, #28]
 802af20:	2b01      	cmp	r3, #1
 802af22:	4604      	mov	r4, r0
 802af24:	f300 8095 	bgt.w	802b052 <_dtoa_r+0x802>
 802af28:	9b02      	ldr	r3, [sp, #8]
 802af2a:	2b00      	cmp	r3, #0
 802af2c:	f040 808b 	bne.w	802b046 <_dtoa_r+0x7f6>
 802af30:	9b03      	ldr	r3, [sp, #12]
 802af32:	f3c3 0213 	ubfx	r2, r3, #0, #20
 802af36:	2a00      	cmp	r2, #0
 802af38:	f040 8087 	bne.w	802b04a <_dtoa_r+0x7fa>
 802af3c:	f023 4200 	bic.w	r2, r3, #2147483648	@ 0x80000000
 802af40:	0d12      	lsrs	r2, r2, #20
 802af42:	0512      	lsls	r2, r2, #20
 802af44:	2a00      	cmp	r2, #0
 802af46:	f000 8082 	beq.w	802b04e <_dtoa_r+0x7fe>
 802af4a:	9b05      	ldr	r3, [sp, #20]
 802af4c:	3301      	adds	r3, #1
 802af4e:	9305      	str	r3, [sp, #20]
 802af50:	9b06      	ldr	r3, [sp, #24]
 802af52:	3301      	adds	r3, #1
 802af54:	9306      	str	r3, [sp, #24]
 802af56:	2301      	movs	r3, #1
 802af58:	930b      	str	r3, [sp, #44]	@ 0x2c
 802af5a:	9b0a      	ldr	r3, [sp, #40]	@ 0x28
 802af5c:	2b00      	cmp	r3, #0
 802af5e:	f000 81af 	beq.w	802b2c0 <_dtoa_r+0xa70>
 802af62:	6922      	ldr	r2, [r4, #16]
 802af64:	eb04 0282 	add.w	r2, r4, r2, lsl #2
 802af68:	6910      	ldr	r0, [r2, #16]
 802af6a:	f000 fe4f 	bl	802bc0c <__hi0bits>
 802af6e:	f1c0 0020 	rsb	r0, r0, #32
 802af72:	9b06      	ldr	r3, [sp, #24]
 802af74:	4418      	add	r0, r3
 802af76:	f010 001f 	ands.w	r0, r0, #31
 802af7a:	d076      	beq.n	802b06a <_dtoa_r+0x81a>
 802af7c:	f1c0 0220 	rsb	r2, r0, #32
 802af80:	2a04      	cmp	r2, #4
 802af82:	dd69      	ble.n	802b058 <_dtoa_r+0x808>
 802af84:	9b05      	ldr	r3, [sp, #20]
 802af86:	f1c0 001c 	rsb	r0, r0, #28
 802af8a:	4403      	add	r3, r0
 802af8c:	9305      	str	r3, [sp, #20]
 802af8e:	9b06      	ldr	r3, [sp, #24]
 802af90:	4406      	add	r6, r0
 802af92:	4403      	add	r3, r0
 802af94:	9306      	str	r3, [sp, #24]
 802af96:	9b05      	ldr	r3, [sp, #20]
 802af98:	2b00      	cmp	r3, #0
 802af9a:	dd05      	ble.n	802afa8 <_dtoa_r+0x758>
 802af9c:	9901      	ldr	r1, [sp, #4]
 802af9e:	461a      	mov	r2, r3
 802afa0:	4648      	mov	r0, r9
 802afa2:	f000 ff99 	bl	802bed8 <__lshift>
 802afa6:	9001      	str	r0, [sp, #4]
 802afa8:	9b06      	ldr	r3, [sp, #24]
 802afaa:	2b00      	cmp	r3, #0
 802afac:	dd05      	ble.n	802afba <_dtoa_r+0x76a>
 802afae:	4621      	mov	r1, r4
 802afb0:	461a      	mov	r2, r3
 802afb2:	4648      	mov	r0, r9
 802afb4:	f000 ff90 	bl	802bed8 <__lshift>
 802afb8:	4604      	mov	r4, r0
 802afba:	9b0c      	ldr	r3, [sp, #48]	@ 0x30
 802afbc:	2b00      	cmp	r3, #0
 802afbe:	d056      	beq.n	802b06e <_dtoa_r+0x81e>
 802afc0:	9801      	ldr	r0, [sp, #4]
 802afc2:	4621      	mov	r1, r4
 802afc4:	f000 fff4 	bl	802bfb0 <__mcmp>
 802afc8:	2800      	cmp	r0, #0
 802afca:	da50      	bge.n	802b06e <_dtoa_r+0x81e>
 802afcc:	f108 33ff 	add.w	r3, r8, #4294967295	@ 0xffffffff
 802afd0:	9304      	str	r3, [sp, #16]
 802afd2:	9901      	ldr	r1, [sp, #4]
 802afd4:	2300      	movs	r3, #0
 802afd6:	220a      	movs	r2, #10
 802afd8:	4648      	mov	r0, r9
 802afda:	f000 fd87 	bl	802baec <__multadd>
 802afde:	9b08      	ldr	r3, [sp, #32]
 802afe0:	9001      	str	r0, [sp, #4]
 802afe2:	2b00      	cmp	r3, #0
 802afe4:	f000 816e 	beq.w	802b2c4 <_dtoa_r+0xa74>
 802afe8:	4629      	mov	r1, r5
 802afea:	2300      	movs	r3, #0
 802afec:	220a      	movs	r2, #10
 802afee:	4648      	mov	r0, r9
 802aff0:	f000 fd7c 	bl	802baec <__multadd>
 802aff4:	f1bb 0f00 	cmp.w	fp, #0
 802aff8:	4605      	mov	r5, r0
 802affa:	dc64      	bgt.n	802b0c6 <_dtoa_r+0x876>
 802affc:	9b07      	ldr	r3, [sp, #28]
 802affe:	2b02      	cmp	r3, #2
 802b000:	dc3e      	bgt.n	802b080 <_dtoa_r+0x830>
 802b002:	e060      	b.n	802b0c6 <_dtoa_r+0x876>
 802b004:	9a0e      	ldr	r2, [sp, #56]	@ 0x38
 802b006:	f1c2 0236 	rsb	r2, r2, #54	@ 0x36
 802b00a:	e73c      	b.n	802ae86 <_dtoa_r+0x636>
 802b00c:	f10a 34ff 	add.w	r4, sl, #4294967295	@ 0xffffffff
 802b010:	42a3      	cmp	r3, r4
 802b012:	bfbf      	itttt	lt
 802b014:	1ae2      	sublt	r2, r4, r3
 802b016:	9b0a      	ldrlt	r3, [sp, #40]	@ 0x28
 802b018:	189b      	addlt	r3, r3, r2
 802b01a:	930a      	strlt	r3, [sp, #40]	@ 0x28
 802b01c:	bfae      	itee	ge
 802b01e:	1b1c      	subge	r4, r3, r4
 802b020:	4623      	movlt	r3, r4
 802b022:	2400      	movlt	r4, #0
 802b024:	f1ba 0f00 	cmp.w	sl, #0
 802b028:	bfb5      	itete	lt
 802b02a:	9a05      	ldrlt	r2, [sp, #20]
 802b02c:	9e05      	ldrge	r6, [sp, #20]
 802b02e:	eba2 060a 	sublt.w	r6, r2, sl
 802b032:	4652      	movge	r2, sl
 802b034:	bfb8      	it	lt
 802b036:	2200      	movlt	r2, #0
 802b038:	e727      	b.n	802ae8a <_dtoa_r+0x63a>
 802b03a:	9e05      	ldr	r6, [sp, #20]
 802b03c:	9d08      	ldr	r5, [sp, #32]
 802b03e:	461c      	mov	r4, r3
 802b040:	e730      	b.n	802aea4 <_dtoa_r+0x654>
 802b042:	461a      	mov	r2, r3
 802b044:	e758      	b.n	802aef8 <_dtoa_r+0x6a8>
 802b046:	2300      	movs	r3, #0
 802b048:	e786      	b.n	802af58 <_dtoa_r+0x708>
 802b04a:	9b02      	ldr	r3, [sp, #8]
 802b04c:	e784      	b.n	802af58 <_dtoa_r+0x708>
 802b04e:	920b      	str	r2, [sp, #44]	@ 0x2c
 802b050:	e783      	b.n	802af5a <_dtoa_r+0x70a>
 802b052:	2300      	movs	r3, #0
 802b054:	930b      	str	r3, [sp, #44]	@ 0x2c
 802b056:	e784      	b.n	802af62 <_dtoa_r+0x712>
 802b058:	d09d      	beq.n	802af96 <_dtoa_r+0x746>
 802b05a:	9b05      	ldr	r3, [sp, #20]
 802b05c:	321c      	adds	r2, #28
 802b05e:	4413      	add	r3, r2
 802b060:	9305      	str	r3, [sp, #20]
 802b062:	9b06      	ldr	r3, [sp, #24]
 802b064:	4416      	add	r6, r2
 802b066:	4413      	add	r3, r2
 802b068:	e794      	b.n	802af94 <_dtoa_r+0x744>
 802b06a:	4602      	mov	r2, r0
 802b06c:	e7f5      	b.n	802b05a <_dtoa_r+0x80a>
 802b06e:	f1ba 0f00 	cmp.w	sl, #0
 802b072:	f8cd 8010 	str.w	r8, [sp, #16]
 802b076:	46d3      	mov	fp, sl
 802b078:	dc21      	bgt.n	802b0be <_dtoa_r+0x86e>
 802b07a:	9b07      	ldr	r3, [sp, #28]
 802b07c:	2b02      	cmp	r3, #2
 802b07e:	dd1e      	ble.n	802b0be <_dtoa_r+0x86e>
 802b080:	f1bb 0f00 	cmp.w	fp, #0
 802b084:	f47f aeb7 	bne.w	802adf6 <_dtoa_r+0x5a6>
 802b088:	4621      	mov	r1, r4
 802b08a:	465b      	mov	r3, fp
 802b08c:	2205      	movs	r2, #5
 802b08e:	4648      	mov	r0, r9
 802b090:	f000 fd2c 	bl	802baec <__multadd>
 802b094:	4601      	mov	r1, r0
 802b096:	4604      	mov	r4, r0
 802b098:	9801      	ldr	r0, [sp, #4]
 802b09a:	f000 ff89 	bl	802bfb0 <__mcmp>
 802b09e:	2800      	cmp	r0, #0
 802b0a0:	f77f aea9 	ble.w	802adf6 <_dtoa_r+0x5a6>
 802b0a4:	463e      	mov	r6, r7
 802b0a6:	2331      	movs	r3, #49	@ 0x31
 802b0a8:	f806 3b01 	strb.w	r3, [r6], #1
 802b0ac:	9b04      	ldr	r3, [sp, #16]
 802b0ae:	3301      	adds	r3, #1
 802b0b0:	9304      	str	r3, [sp, #16]
 802b0b2:	e6a4      	b.n	802adfe <_dtoa_r+0x5ae>
 802b0b4:	f8cd 8010 	str.w	r8, [sp, #16]
 802b0b8:	4654      	mov	r4, sl
 802b0ba:	4625      	mov	r5, r4
 802b0bc:	e7f2      	b.n	802b0a4 <_dtoa_r+0x854>
 802b0be:	9b08      	ldr	r3, [sp, #32]
 802b0c0:	2b00      	cmp	r3, #0
 802b0c2:	f000 8103 	beq.w	802b2cc <_dtoa_r+0xa7c>
 802b0c6:	2e00      	cmp	r6, #0
 802b0c8:	dd05      	ble.n	802b0d6 <_dtoa_r+0x886>
 802b0ca:	4629      	mov	r1, r5
 802b0cc:	4632      	mov	r2, r6
 802b0ce:	4648      	mov	r0, r9
 802b0d0:	f000 ff02 	bl	802bed8 <__lshift>
 802b0d4:	4605      	mov	r5, r0
 802b0d6:	9b0b      	ldr	r3, [sp, #44]	@ 0x2c
 802b0d8:	2b00      	cmp	r3, #0
 802b0da:	d058      	beq.n	802b18e <_dtoa_r+0x93e>
 802b0dc:	6869      	ldr	r1, [r5, #4]
 802b0de:	4648      	mov	r0, r9
 802b0e0:	f000 fca2 	bl	802ba28 <_Balloc>
 802b0e4:	4606      	mov	r6, r0
 802b0e6:	b928      	cbnz	r0, 802b0f4 <_dtoa_r+0x8a4>
 802b0e8:	4b82      	ldr	r3, [pc, #520]	@ (802b2f4 <_dtoa_r+0xaa4>)
 802b0ea:	4602      	mov	r2, r0
 802b0ec:	f240 21ef 	movw	r1, #751	@ 0x2ef
 802b0f0:	f7ff bbc7 	b.w	802a882 <_dtoa_r+0x32>
 802b0f4:	692a      	ldr	r2, [r5, #16]
 802b0f6:	3202      	adds	r2, #2
 802b0f8:	0092      	lsls	r2, r2, #2
 802b0fa:	f105 010c 	add.w	r1, r5, #12
 802b0fe:	300c      	adds	r0, #12
 802b100:	f7ff fae5 	bl	802a6ce <memcpy>
 802b104:	2201      	movs	r2, #1
 802b106:	4631      	mov	r1, r6
 802b108:	4648      	mov	r0, r9
 802b10a:	f000 fee5 	bl	802bed8 <__lshift>
 802b10e:	1c7b      	adds	r3, r7, #1
 802b110:	9305      	str	r3, [sp, #20]
 802b112:	eb07 030b 	add.w	r3, r7, fp
 802b116:	9309      	str	r3, [sp, #36]	@ 0x24
 802b118:	9b02      	ldr	r3, [sp, #8]
 802b11a:	f003 0301 	and.w	r3, r3, #1
 802b11e:	46a8      	mov	r8, r5
 802b120:	9308      	str	r3, [sp, #32]
 802b122:	4605      	mov	r5, r0
 802b124:	9b05      	ldr	r3, [sp, #20]
 802b126:	9801      	ldr	r0, [sp, #4]
 802b128:	4621      	mov	r1, r4
 802b12a:	f103 3bff 	add.w	fp, r3, #4294967295	@ 0xffffffff
 802b12e:	f7ff fb05 	bl	802a73c <quorem>
 802b132:	4641      	mov	r1, r8
 802b134:	9002      	str	r0, [sp, #8]
 802b136:	f100 0a30 	add.w	sl, r0, #48	@ 0x30
 802b13a:	9801      	ldr	r0, [sp, #4]
 802b13c:	f000 ff38 	bl	802bfb0 <__mcmp>
 802b140:	462a      	mov	r2, r5
 802b142:	9006      	str	r0, [sp, #24]
 802b144:	4621      	mov	r1, r4
 802b146:	4648      	mov	r0, r9
 802b148:	f000 ff4e 	bl	802bfe8 <__mdiff>
 802b14c:	68c2      	ldr	r2, [r0, #12]
 802b14e:	4606      	mov	r6, r0
 802b150:	b9fa      	cbnz	r2, 802b192 <_dtoa_r+0x942>
 802b152:	4601      	mov	r1, r0
 802b154:	9801      	ldr	r0, [sp, #4]
 802b156:	f000 ff2b 	bl	802bfb0 <__mcmp>
 802b15a:	4602      	mov	r2, r0
 802b15c:	4631      	mov	r1, r6
 802b15e:	4648      	mov	r0, r9
 802b160:	920a      	str	r2, [sp, #40]	@ 0x28
 802b162:	f000 fca1 	bl	802baa8 <_Bfree>
 802b166:	9b07      	ldr	r3, [sp, #28]
 802b168:	9a0a      	ldr	r2, [sp, #40]	@ 0x28
 802b16a:	9e05      	ldr	r6, [sp, #20]
 802b16c:	ea43 0102 	orr.w	r1, r3, r2
 802b170:	9b08      	ldr	r3, [sp, #32]
 802b172:	4319      	orrs	r1, r3
 802b174:	d10f      	bne.n	802b196 <_dtoa_r+0x946>
 802b176:	f1ba 0f39 	cmp.w	sl, #57	@ 0x39
 802b17a:	d028      	beq.n	802b1ce <_dtoa_r+0x97e>
 802b17c:	9b06      	ldr	r3, [sp, #24]
 802b17e:	2b00      	cmp	r3, #0
 802b180:	dd02      	ble.n	802b188 <_dtoa_r+0x938>
 802b182:	9b02      	ldr	r3, [sp, #8]
 802b184:	f103 0a31 	add.w	sl, r3, #49	@ 0x31
 802b188:	f88b a000 	strb.w	sl, [fp]
 802b18c:	e639      	b.n	802ae02 <_dtoa_r+0x5b2>
 802b18e:	4628      	mov	r0, r5
 802b190:	e7bd      	b.n	802b10e <_dtoa_r+0x8be>
 802b192:	2201      	movs	r2, #1
 802b194:	e7e2      	b.n	802b15c <_dtoa_r+0x90c>
 802b196:	9b06      	ldr	r3, [sp, #24]
 802b198:	2b00      	cmp	r3, #0
 802b19a:	db04      	blt.n	802b1a6 <_dtoa_r+0x956>
 802b19c:	9907      	ldr	r1, [sp, #28]
 802b19e:	430b      	orrs	r3, r1
 802b1a0:	9908      	ldr	r1, [sp, #32]
 802b1a2:	430b      	orrs	r3, r1
 802b1a4:	d120      	bne.n	802b1e8 <_dtoa_r+0x998>
 802b1a6:	2a00      	cmp	r2, #0
 802b1a8:	ddee      	ble.n	802b188 <_dtoa_r+0x938>
 802b1aa:	9901      	ldr	r1, [sp, #4]
 802b1ac:	2201      	movs	r2, #1
 802b1ae:	4648      	mov	r0, r9
 802b1b0:	f000 fe92 	bl	802bed8 <__lshift>
 802b1b4:	4621      	mov	r1, r4
 802b1b6:	9001      	str	r0, [sp, #4]
 802b1b8:	f000 fefa 	bl	802bfb0 <__mcmp>
 802b1bc:	2800      	cmp	r0, #0
 802b1be:	dc03      	bgt.n	802b1c8 <_dtoa_r+0x978>
 802b1c0:	d1e2      	bne.n	802b188 <_dtoa_r+0x938>
 802b1c2:	f01a 0f01 	tst.w	sl, #1
 802b1c6:	d0df      	beq.n	802b188 <_dtoa_r+0x938>
 802b1c8:	f1ba 0f39 	cmp.w	sl, #57	@ 0x39
 802b1cc:	d1d9      	bne.n	802b182 <_dtoa_r+0x932>
 802b1ce:	2339      	movs	r3, #57	@ 0x39
 802b1d0:	f88b 3000 	strb.w	r3, [fp]
 802b1d4:	4633      	mov	r3, r6
 802b1d6:	461e      	mov	r6, r3
 802b1d8:	3b01      	subs	r3, #1
 802b1da:	f816 2c01 	ldrb.w	r2, [r6, #-1]
 802b1de:	2a39      	cmp	r2, #57	@ 0x39
 802b1e0:	d053      	beq.n	802b28a <_dtoa_r+0xa3a>
 802b1e2:	3201      	adds	r2, #1
 802b1e4:	701a      	strb	r2, [r3, #0]
 802b1e6:	e60c      	b.n	802ae02 <_dtoa_r+0x5b2>
 802b1e8:	2a00      	cmp	r2, #0
 802b1ea:	dd07      	ble.n	802b1fc <_dtoa_r+0x9ac>
 802b1ec:	f1ba 0f39 	cmp.w	sl, #57	@ 0x39
 802b1f0:	d0ed      	beq.n	802b1ce <_dtoa_r+0x97e>
 802b1f2:	f10a 0301 	add.w	r3, sl, #1
 802b1f6:	f88b 3000 	strb.w	r3, [fp]
 802b1fa:	e602      	b.n	802ae02 <_dtoa_r+0x5b2>
 802b1fc:	9b05      	ldr	r3, [sp, #20]
 802b1fe:	9a05      	ldr	r2, [sp, #20]
 802b200:	f803 ac01 	strb.w	sl, [r3, #-1]
 802b204:	9b09      	ldr	r3, [sp, #36]	@ 0x24
 802b206:	4293      	cmp	r3, r2
 802b208:	d029      	beq.n	802b25e <_dtoa_r+0xa0e>
 802b20a:	9901      	ldr	r1, [sp, #4]
 802b20c:	2300      	movs	r3, #0
 802b20e:	220a      	movs	r2, #10
 802b210:	4648      	mov	r0, r9
 802b212:	f000 fc6b 	bl	802baec <__multadd>
 802b216:	45a8      	cmp	r8, r5
 802b218:	9001      	str	r0, [sp, #4]
 802b21a:	f04f 0300 	mov.w	r3, #0
 802b21e:	f04f 020a 	mov.w	r2, #10
 802b222:	4641      	mov	r1, r8
 802b224:	4648      	mov	r0, r9
 802b226:	d107      	bne.n	802b238 <_dtoa_r+0x9e8>
 802b228:	f000 fc60 	bl	802baec <__multadd>
 802b22c:	4680      	mov	r8, r0
 802b22e:	4605      	mov	r5, r0
 802b230:	9b05      	ldr	r3, [sp, #20]
 802b232:	3301      	adds	r3, #1
 802b234:	9305      	str	r3, [sp, #20]
 802b236:	e775      	b.n	802b124 <_dtoa_r+0x8d4>
 802b238:	f000 fc58 	bl	802baec <__multadd>
 802b23c:	4629      	mov	r1, r5
 802b23e:	4680      	mov	r8, r0
 802b240:	2300      	movs	r3, #0
 802b242:	220a      	movs	r2, #10
 802b244:	4648      	mov	r0, r9
 802b246:	f000 fc51 	bl	802baec <__multadd>
 802b24a:	4605      	mov	r5, r0
 802b24c:	e7f0      	b.n	802b230 <_dtoa_r+0x9e0>
 802b24e:	f1bb 0f00 	cmp.w	fp, #0
 802b252:	bfcc      	ite	gt
 802b254:	465e      	movgt	r6, fp
 802b256:	2601      	movle	r6, #1
 802b258:	443e      	add	r6, r7
 802b25a:	f04f 0800 	mov.w	r8, #0
 802b25e:	9901      	ldr	r1, [sp, #4]
 802b260:	2201      	movs	r2, #1
 802b262:	4648      	mov	r0, r9
 802b264:	f000 fe38 	bl	802bed8 <__lshift>
 802b268:	4621      	mov	r1, r4
 802b26a:	9001      	str	r0, [sp, #4]
 802b26c:	f000 fea0 	bl	802bfb0 <__mcmp>
 802b270:	2800      	cmp	r0, #0
 802b272:	dcaf      	bgt.n	802b1d4 <_dtoa_r+0x984>
 802b274:	d102      	bne.n	802b27c <_dtoa_r+0xa2c>
 802b276:	f01a 0f01 	tst.w	sl, #1
 802b27a:	d1ab      	bne.n	802b1d4 <_dtoa_r+0x984>
 802b27c:	4633      	mov	r3, r6
 802b27e:	461e      	mov	r6, r3
 802b280:	f813 2d01 	ldrb.w	r2, [r3, #-1]!
 802b284:	2a30      	cmp	r2, #48	@ 0x30
 802b286:	d0fa      	beq.n	802b27e <_dtoa_r+0xa2e>
 802b288:	e5bb      	b.n	802ae02 <_dtoa_r+0x5b2>
 802b28a:	429f      	cmp	r7, r3
 802b28c:	d1a3      	bne.n	802b1d6 <_dtoa_r+0x986>
 802b28e:	9b04      	ldr	r3, [sp, #16]
 802b290:	3301      	adds	r3, #1
 802b292:	9304      	str	r3, [sp, #16]
 802b294:	2331      	movs	r3, #49	@ 0x31
 802b296:	703b      	strb	r3, [r7, #0]
 802b298:	e5b3      	b.n	802ae02 <_dtoa_r+0x5b2>
 802b29a:	9b1d      	ldr	r3, [sp, #116]	@ 0x74
 802b29c:	4f16      	ldr	r7, [pc, #88]	@ (802b2f8 <_dtoa_r+0xaa8>)
 802b29e:	b11b      	cbz	r3, 802b2a8 <_dtoa_r+0xa58>
 802b2a0:	f107 0308 	add.w	r3, r7, #8
 802b2a4:	9a1d      	ldr	r2, [sp, #116]	@ 0x74
 802b2a6:	6013      	str	r3, [r2, #0]
 802b2a8:	4638      	mov	r0, r7
 802b2aa:	b011      	add	sp, #68	@ 0x44
 802b2ac:	ecbd 8b02 	vpop	{d8}
 802b2b0:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 802b2b4:	9b07      	ldr	r3, [sp, #28]
 802b2b6:	2b01      	cmp	r3, #1
 802b2b8:	f77f ae36 	ble.w	802af28 <_dtoa_r+0x6d8>
 802b2bc:	9b0a      	ldr	r3, [sp, #40]	@ 0x28
 802b2be:	930b      	str	r3, [sp, #44]	@ 0x2c
 802b2c0:	2001      	movs	r0, #1
 802b2c2:	e656      	b.n	802af72 <_dtoa_r+0x722>
 802b2c4:	f1bb 0f00 	cmp.w	fp, #0
 802b2c8:	f77f aed7 	ble.w	802b07a <_dtoa_r+0x82a>
 802b2cc:	463e      	mov	r6, r7
 802b2ce:	9801      	ldr	r0, [sp, #4]
 802b2d0:	4621      	mov	r1, r4
 802b2d2:	f7ff fa33 	bl	802a73c <quorem>
 802b2d6:	f100 0a30 	add.w	sl, r0, #48	@ 0x30
 802b2da:	f806 ab01 	strb.w	sl, [r6], #1
 802b2de:	1bf2      	subs	r2, r6, r7
 802b2e0:	4593      	cmp	fp, r2
 802b2e2:	ddb4      	ble.n	802b24e <_dtoa_r+0x9fe>
 802b2e4:	9901      	ldr	r1, [sp, #4]
 802b2e6:	2300      	movs	r3, #0
 802b2e8:	220a      	movs	r2, #10
 802b2ea:	4648      	mov	r0, r9
 802b2ec:	f000 fbfe 	bl	802baec <__multadd>
 802b2f0:	9001      	str	r0, [sp, #4]
 802b2f2:	e7ec      	b.n	802b2ce <_dtoa_r+0xa7e>
 802b2f4:	080317ae 	.word	0x080317ae
 802b2f8:	08031749 	.word	0x08031749

0802b2fc <_free_r>:
 802b2fc:	b538      	push	{r3, r4, r5, lr}
 802b2fe:	4605      	mov	r5, r0
 802b300:	2900      	cmp	r1, #0
 802b302:	d041      	beq.n	802b388 <_free_r+0x8c>
 802b304:	f851 3c04 	ldr.w	r3, [r1, #-4]
 802b308:	1f0c      	subs	r4, r1, #4
 802b30a:	2b00      	cmp	r3, #0
 802b30c:	bfb8      	it	lt
 802b30e:	18e4      	addlt	r4, r4, r3
 802b310:	f7fd fc1e 	bl	8028b50 <__malloc_lock>
 802b314:	4a1d      	ldr	r2, [pc, #116]	@ (802b38c <_free_r+0x90>)
 802b316:	6813      	ldr	r3, [r2, #0]
 802b318:	b933      	cbnz	r3, 802b328 <_free_r+0x2c>
 802b31a:	6063      	str	r3, [r4, #4]
 802b31c:	6014      	str	r4, [r2, #0]
 802b31e:	4628      	mov	r0, r5
 802b320:	e8bd 4038 	ldmia.w	sp!, {r3, r4, r5, lr}
 802b324:	f7fd bc1a 	b.w	8028b5c <__malloc_unlock>
 802b328:	42a3      	cmp	r3, r4
 802b32a:	d908      	bls.n	802b33e <_free_r+0x42>
 802b32c:	6820      	ldr	r0, [r4, #0]
 802b32e:	1821      	adds	r1, r4, r0
 802b330:	428b      	cmp	r3, r1
 802b332:	bf01      	itttt	eq
 802b334:	6819      	ldreq	r1, [r3, #0]
 802b336:	685b      	ldreq	r3, [r3, #4]
 802b338:	1809      	addeq	r1, r1, r0
 802b33a:	6021      	streq	r1, [r4, #0]
 802b33c:	e7ed      	b.n	802b31a <_free_r+0x1e>
 802b33e:	461a      	mov	r2, r3
 802b340:	685b      	ldr	r3, [r3, #4]
 802b342:	b10b      	cbz	r3, 802b348 <_free_r+0x4c>
 802b344:	42a3      	cmp	r3, r4
 802b346:	d9fa      	bls.n	802b33e <_free_r+0x42>
 802b348:	6811      	ldr	r1, [r2, #0]
 802b34a:	1850      	adds	r0, r2, r1
 802b34c:	42a0      	cmp	r0, r4
 802b34e:	d10b      	bne.n	802b368 <_free_r+0x6c>
 802b350:	6820      	ldr	r0, [r4, #0]
 802b352:	4401      	add	r1, r0
 802b354:	1850      	adds	r0, r2, r1
 802b356:	4283      	cmp	r3, r0
 802b358:	6011      	str	r1, [r2, #0]
 802b35a:	d1e0      	bne.n	802b31e <_free_r+0x22>
 802b35c:	6818      	ldr	r0, [r3, #0]
 802b35e:	685b      	ldr	r3, [r3, #4]
 802b360:	6053      	str	r3, [r2, #4]
 802b362:	4408      	add	r0, r1
 802b364:	6010      	str	r0, [r2, #0]
 802b366:	e7da      	b.n	802b31e <_free_r+0x22>
 802b368:	d902      	bls.n	802b370 <_free_r+0x74>
 802b36a:	230c      	movs	r3, #12
 802b36c:	602b      	str	r3, [r5, #0]
 802b36e:	e7d6      	b.n	802b31e <_free_r+0x22>
 802b370:	6820      	ldr	r0, [r4, #0]
 802b372:	1821      	adds	r1, r4, r0
 802b374:	428b      	cmp	r3, r1
 802b376:	bf04      	itt	eq
 802b378:	6819      	ldreq	r1, [r3, #0]
 802b37a:	685b      	ldreq	r3, [r3, #4]
 802b37c:	6063      	str	r3, [r4, #4]
 802b37e:	bf04      	itt	eq
 802b380:	1809      	addeq	r1, r1, r0
 802b382:	6021      	streq	r1, [r4, #0]
 802b384:	6054      	str	r4, [r2, #4]
 802b386:	e7ca      	b.n	802b31e <_free_r+0x22>
 802b388:	bd38      	pop	{r3, r4, r5, pc}
 802b38a:	bf00      	nop
 802b38c:	2402b110 	.word	0x2402b110

0802b390 <rshift>:
 802b390:	6903      	ldr	r3, [r0, #16]
 802b392:	ebb3 1f61 	cmp.w	r3, r1, asr #5
 802b396:	e92d 43f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, lr}
 802b39a:	ea4f 1261 	mov.w	r2, r1, asr #5
 802b39e:	f100 0414 	add.w	r4, r0, #20
 802b3a2:	dd45      	ble.n	802b430 <rshift+0xa0>
 802b3a4:	f011 011f 	ands.w	r1, r1, #31
 802b3a8:	eb04 0683 	add.w	r6, r4, r3, lsl #2
 802b3ac:	eb04 0582 	add.w	r5, r4, r2, lsl #2
 802b3b0:	d10c      	bne.n	802b3cc <rshift+0x3c>
 802b3b2:	f100 0710 	add.w	r7, r0, #16
 802b3b6:	4629      	mov	r1, r5
 802b3b8:	42b1      	cmp	r1, r6
 802b3ba:	d334      	bcc.n	802b426 <rshift+0x96>
 802b3bc:	1a9b      	subs	r3, r3, r2
 802b3be:	009b      	lsls	r3, r3, #2
 802b3c0:	1eea      	subs	r2, r5, #3
 802b3c2:	4296      	cmp	r6, r2
 802b3c4:	bf38      	it	cc
 802b3c6:	2300      	movcc	r3, #0
 802b3c8:	4423      	add	r3, r4
 802b3ca:	e015      	b.n	802b3f8 <rshift+0x68>
 802b3cc:	f854 7022 	ldr.w	r7, [r4, r2, lsl #2]
 802b3d0:	f1c1 0820 	rsb	r8, r1, #32
 802b3d4:	40cf      	lsrs	r7, r1
 802b3d6:	f105 0e04 	add.w	lr, r5, #4
 802b3da:	46a1      	mov	r9, r4
 802b3dc:	4576      	cmp	r6, lr
 802b3de:	46f4      	mov	ip, lr
 802b3e0:	d815      	bhi.n	802b40e <rshift+0x7e>
 802b3e2:	1a9a      	subs	r2, r3, r2
 802b3e4:	0092      	lsls	r2, r2, #2
 802b3e6:	3a04      	subs	r2, #4
 802b3e8:	3501      	adds	r5, #1
 802b3ea:	42ae      	cmp	r6, r5
 802b3ec:	bf38      	it	cc
 802b3ee:	2200      	movcc	r2, #0
 802b3f0:	18a3      	adds	r3, r4, r2
 802b3f2:	50a7      	str	r7, [r4, r2]
 802b3f4:	b107      	cbz	r7, 802b3f8 <rshift+0x68>
 802b3f6:	3304      	adds	r3, #4
 802b3f8:	1b1a      	subs	r2, r3, r4
 802b3fa:	42a3      	cmp	r3, r4
 802b3fc:	ea4f 02a2 	mov.w	r2, r2, asr #2
 802b400:	bf08      	it	eq
 802b402:	2300      	moveq	r3, #0
 802b404:	6102      	str	r2, [r0, #16]
 802b406:	bf08      	it	eq
 802b408:	6143      	streq	r3, [r0, #20]
 802b40a:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
 802b40e:	f8dc c000 	ldr.w	ip, [ip]
 802b412:	fa0c fc08 	lsl.w	ip, ip, r8
 802b416:	ea4c 0707 	orr.w	r7, ip, r7
 802b41a:	f849 7b04 	str.w	r7, [r9], #4
 802b41e:	f85e 7b04 	ldr.w	r7, [lr], #4
 802b422:	40cf      	lsrs	r7, r1
 802b424:	e7da      	b.n	802b3dc <rshift+0x4c>
 802b426:	f851 cb04 	ldr.w	ip, [r1], #4
 802b42a:	f847 cf04 	str.w	ip, [r7, #4]!
 802b42e:	e7c3      	b.n	802b3b8 <rshift+0x28>
 802b430:	4623      	mov	r3, r4
 802b432:	e7e1      	b.n	802b3f8 <rshift+0x68>

0802b434 <__hexdig_fun>:
 802b434:	f1a0 0330 	sub.w	r3, r0, #48	@ 0x30
 802b438:	2b09      	cmp	r3, #9
 802b43a:	d802      	bhi.n	802b442 <__hexdig_fun+0xe>
 802b43c:	3820      	subs	r0, #32
 802b43e:	b2c0      	uxtb	r0, r0
 802b440:	4770      	bx	lr
 802b442:	f1a0 0361 	sub.w	r3, r0, #97	@ 0x61
 802b446:	2b05      	cmp	r3, #5
 802b448:	d801      	bhi.n	802b44e <__hexdig_fun+0x1a>
 802b44a:	3847      	subs	r0, #71	@ 0x47
 802b44c:	e7f7      	b.n	802b43e <__hexdig_fun+0xa>
 802b44e:	f1a0 0341 	sub.w	r3, r0, #65	@ 0x41
 802b452:	2b05      	cmp	r3, #5
 802b454:	d801      	bhi.n	802b45a <__hexdig_fun+0x26>
 802b456:	3827      	subs	r0, #39	@ 0x27
 802b458:	e7f1      	b.n	802b43e <__hexdig_fun+0xa>
 802b45a:	2000      	movs	r0, #0
 802b45c:	4770      	bx	lr
	...

0802b460 <__gethex>:
 802b460:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 802b464:	b085      	sub	sp, #20
 802b466:	468a      	mov	sl, r1
 802b468:	9302      	str	r3, [sp, #8]
 802b46a:	680b      	ldr	r3, [r1, #0]
 802b46c:	9001      	str	r0, [sp, #4]
 802b46e:	4690      	mov	r8, r2
 802b470:	1c9c      	adds	r4, r3, #2
 802b472:	46a1      	mov	r9, r4
 802b474:	f814 0b01 	ldrb.w	r0, [r4], #1
 802b478:	2830      	cmp	r0, #48	@ 0x30
 802b47a:	d0fa      	beq.n	802b472 <__gethex+0x12>
 802b47c:	eba9 0303 	sub.w	r3, r9, r3
 802b480:	f1a3 0b02 	sub.w	fp, r3, #2
 802b484:	f7ff ffd6 	bl	802b434 <__hexdig_fun>
 802b488:	4605      	mov	r5, r0
 802b48a:	2800      	cmp	r0, #0
 802b48c:	d168      	bne.n	802b560 <__gethex+0x100>
 802b48e:	49a0      	ldr	r1, [pc, #640]	@ (802b710 <__gethex+0x2b0>)
 802b490:	2201      	movs	r2, #1
 802b492:	4648      	mov	r0, r9
 802b494:	f7ff f82c 	bl	802a4f0 <strncmp>
 802b498:	4607      	mov	r7, r0
 802b49a:	2800      	cmp	r0, #0
 802b49c:	d167      	bne.n	802b56e <__gethex+0x10e>
 802b49e:	f899 0001 	ldrb.w	r0, [r9, #1]
 802b4a2:	4626      	mov	r6, r4
 802b4a4:	f7ff ffc6 	bl	802b434 <__hexdig_fun>
 802b4a8:	2800      	cmp	r0, #0
 802b4aa:	d062      	beq.n	802b572 <__gethex+0x112>
 802b4ac:	4623      	mov	r3, r4
 802b4ae:	7818      	ldrb	r0, [r3, #0]
 802b4b0:	2830      	cmp	r0, #48	@ 0x30
 802b4b2:	4699      	mov	r9, r3
 802b4b4:	f103 0301 	add.w	r3, r3, #1
 802b4b8:	d0f9      	beq.n	802b4ae <__gethex+0x4e>
 802b4ba:	f7ff ffbb 	bl	802b434 <__hexdig_fun>
 802b4be:	fab0 f580 	clz	r5, r0
 802b4c2:	096d      	lsrs	r5, r5, #5
 802b4c4:	f04f 0b01 	mov.w	fp, #1
 802b4c8:	464a      	mov	r2, r9
 802b4ca:	4616      	mov	r6, r2
 802b4cc:	3201      	adds	r2, #1
 802b4ce:	7830      	ldrb	r0, [r6, #0]
 802b4d0:	f7ff ffb0 	bl	802b434 <__hexdig_fun>
 802b4d4:	2800      	cmp	r0, #0
 802b4d6:	d1f8      	bne.n	802b4ca <__gethex+0x6a>
 802b4d8:	498d      	ldr	r1, [pc, #564]	@ (802b710 <__gethex+0x2b0>)
 802b4da:	2201      	movs	r2, #1
 802b4dc:	4630      	mov	r0, r6
 802b4de:	f7ff f807 	bl	802a4f0 <strncmp>
 802b4e2:	2800      	cmp	r0, #0
 802b4e4:	d13f      	bne.n	802b566 <__gethex+0x106>
 802b4e6:	b944      	cbnz	r4, 802b4fa <__gethex+0x9a>
 802b4e8:	1c74      	adds	r4, r6, #1
 802b4ea:	4622      	mov	r2, r4
 802b4ec:	4616      	mov	r6, r2
 802b4ee:	3201      	adds	r2, #1
 802b4f0:	7830      	ldrb	r0, [r6, #0]
 802b4f2:	f7ff ff9f 	bl	802b434 <__hexdig_fun>
 802b4f6:	2800      	cmp	r0, #0
 802b4f8:	d1f8      	bne.n	802b4ec <__gethex+0x8c>
 802b4fa:	1ba4      	subs	r4, r4, r6
 802b4fc:	00a7      	lsls	r7, r4, #2
 802b4fe:	7833      	ldrb	r3, [r6, #0]
 802b500:	f003 03df 	and.w	r3, r3, #223	@ 0xdf
 802b504:	2b50      	cmp	r3, #80	@ 0x50
 802b506:	d13e      	bne.n	802b586 <__gethex+0x126>
 802b508:	7873      	ldrb	r3, [r6, #1]
 802b50a:	2b2b      	cmp	r3, #43	@ 0x2b
 802b50c:	d033      	beq.n	802b576 <__gethex+0x116>
 802b50e:	2b2d      	cmp	r3, #45	@ 0x2d
 802b510:	d034      	beq.n	802b57c <__gethex+0x11c>
 802b512:	1c71      	adds	r1, r6, #1
 802b514:	2400      	movs	r4, #0
 802b516:	7808      	ldrb	r0, [r1, #0]
 802b518:	f7ff ff8c 	bl	802b434 <__hexdig_fun>
 802b51c:	1e43      	subs	r3, r0, #1
 802b51e:	b2db      	uxtb	r3, r3
 802b520:	2b18      	cmp	r3, #24
 802b522:	d830      	bhi.n	802b586 <__gethex+0x126>
 802b524:	f1a0 0210 	sub.w	r2, r0, #16
 802b528:	f811 0f01 	ldrb.w	r0, [r1, #1]!
 802b52c:	f7ff ff82 	bl	802b434 <__hexdig_fun>
 802b530:	f100 3cff 	add.w	ip, r0, #4294967295	@ 0xffffffff
 802b534:	fa5f fc8c 	uxtb.w	ip, ip
 802b538:	f1bc 0f18 	cmp.w	ip, #24
 802b53c:	f04f 030a 	mov.w	r3, #10
 802b540:	d91e      	bls.n	802b580 <__gethex+0x120>
 802b542:	b104      	cbz	r4, 802b546 <__gethex+0xe6>
 802b544:	4252      	negs	r2, r2
 802b546:	4417      	add	r7, r2
 802b548:	f8ca 1000 	str.w	r1, [sl]
 802b54c:	b1ed      	cbz	r5, 802b58a <__gethex+0x12a>
 802b54e:	f1bb 0f00 	cmp.w	fp, #0
 802b552:	bf0c      	ite	eq
 802b554:	2506      	moveq	r5, #6
 802b556:	2500      	movne	r5, #0
 802b558:	4628      	mov	r0, r5
 802b55a:	b005      	add	sp, #20
 802b55c:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 802b560:	2500      	movs	r5, #0
 802b562:	462c      	mov	r4, r5
 802b564:	e7b0      	b.n	802b4c8 <__gethex+0x68>
 802b566:	2c00      	cmp	r4, #0
 802b568:	d1c7      	bne.n	802b4fa <__gethex+0x9a>
 802b56a:	4627      	mov	r7, r4
 802b56c:	e7c7      	b.n	802b4fe <__gethex+0x9e>
 802b56e:	464e      	mov	r6, r9
 802b570:	462f      	mov	r7, r5
 802b572:	2501      	movs	r5, #1
 802b574:	e7c3      	b.n	802b4fe <__gethex+0x9e>
 802b576:	2400      	movs	r4, #0
 802b578:	1cb1      	adds	r1, r6, #2
 802b57a:	e7cc      	b.n	802b516 <__gethex+0xb6>
 802b57c:	2401      	movs	r4, #1
 802b57e:	e7fb      	b.n	802b578 <__gethex+0x118>
 802b580:	fb03 0002 	mla	r0, r3, r2, r0
 802b584:	e7ce      	b.n	802b524 <__gethex+0xc4>
 802b586:	4631      	mov	r1, r6
 802b588:	e7de      	b.n	802b548 <__gethex+0xe8>
 802b58a:	eba6 0309 	sub.w	r3, r6, r9
 802b58e:	3b01      	subs	r3, #1
 802b590:	4629      	mov	r1, r5
 802b592:	2b07      	cmp	r3, #7
 802b594:	dc0a      	bgt.n	802b5ac <__gethex+0x14c>
 802b596:	9801      	ldr	r0, [sp, #4]
 802b598:	f000 fa46 	bl	802ba28 <_Balloc>
 802b59c:	4604      	mov	r4, r0
 802b59e:	b940      	cbnz	r0, 802b5b2 <__gethex+0x152>
 802b5a0:	4b5c      	ldr	r3, [pc, #368]	@ (802b714 <__gethex+0x2b4>)
 802b5a2:	4602      	mov	r2, r0
 802b5a4:	21e4      	movs	r1, #228	@ 0xe4
 802b5a6:	485c      	ldr	r0, [pc, #368]	@ (802b718 <__gethex+0x2b8>)
 802b5a8:	f7ff f8aa 	bl	802a700 <__assert_func>
 802b5ac:	3101      	adds	r1, #1
 802b5ae:	105b      	asrs	r3, r3, #1
 802b5b0:	e7ef      	b.n	802b592 <__gethex+0x132>
 802b5b2:	f100 0a14 	add.w	sl, r0, #20
 802b5b6:	2300      	movs	r3, #0
 802b5b8:	4655      	mov	r5, sl
 802b5ba:	469b      	mov	fp, r3
 802b5bc:	45b1      	cmp	r9, r6
 802b5be:	d337      	bcc.n	802b630 <__gethex+0x1d0>
 802b5c0:	f845 bb04 	str.w	fp, [r5], #4
 802b5c4:	eba5 050a 	sub.w	r5, r5, sl
 802b5c8:	10ad      	asrs	r5, r5, #2
 802b5ca:	6125      	str	r5, [r4, #16]
 802b5cc:	4658      	mov	r0, fp
 802b5ce:	f000 fb1d 	bl	802bc0c <__hi0bits>
 802b5d2:	016d      	lsls	r5, r5, #5
 802b5d4:	f8d8 6000 	ldr.w	r6, [r8]
 802b5d8:	1a2d      	subs	r5, r5, r0
 802b5da:	42b5      	cmp	r5, r6
 802b5dc:	dd54      	ble.n	802b688 <__gethex+0x228>
 802b5de:	1bad      	subs	r5, r5, r6
 802b5e0:	4629      	mov	r1, r5
 802b5e2:	4620      	mov	r0, r4
 802b5e4:	f000 feae 	bl	802c344 <__any_on>
 802b5e8:	4681      	mov	r9, r0
 802b5ea:	b178      	cbz	r0, 802b60c <__gethex+0x1ac>
 802b5ec:	1e6b      	subs	r3, r5, #1
 802b5ee:	1159      	asrs	r1, r3, #5
 802b5f0:	f003 021f 	and.w	r2, r3, #31
 802b5f4:	f85a 1021 	ldr.w	r1, [sl, r1, lsl #2]
 802b5f8:	f04f 0901 	mov.w	r9, #1
 802b5fc:	fa09 f202 	lsl.w	r2, r9, r2
 802b600:	420a      	tst	r2, r1
 802b602:	d003      	beq.n	802b60c <__gethex+0x1ac>
 802b604:	454b      	cmp	r3, r9
 802b606:	dc36      	bgt.n	802b676 <__gethex+0x216>
 802b608:	f04f 0902 	mov.w	r9, #2
 802b60c:	4629      	mov	r1, r5
 802b60e:	4620      	mov	r0, r4
 802b610:	f7ff febe 	bl	802b390 <rshift>
 802b614:	442f      	add	r7, r5
 802b616:	f8d8 3008 	ldr.w	r3, [r8, #8]
 802b61a:	42bb      	cmp	r3, r7
 802b61c:	da42      	bge.n	802b6a4 <__gethex+0x244>
 802b61e:	9801      	ldr	r0, [sp, #4]
 802b620:	4621      	mov	r1, r4
 802b622:	f000 fa41 	bl	802baa8 <_Bfree>
 802b626:	9a0e      	ldr	r2, [sp, #56]	@ 0x38
 802b628:	2300      	movs	r3, #0
 802b62a:	6013      	str	r3, [r2, #0]
 802b62c:	25a3      	movs	r5, #163	@ 0xa3
 802b62e:	e793      	b.n	802b558 <__gethex+0xf8>
 802b630:	f816 2d01 	ldrb.w	r2, [r6, #-1]!
 802b634:	2a2e      	cmp	r2, #46	@ 0x2e
 802b636:	d012      	beq.n	802b65e <__gethex+0x1fe>
 802b638:	2b20      	cmp	r3, #32
 802b63a:	d104      	bne.n	802b646 <__gethex+0x1e6>
 802b63c:	f845 bb04 	str.w	fp, [r5], #4
 802b640:	f04f 0b00 	mov.w	fp, #0
 802b644:	465b      	mov	r3, fp
 802b646:	7830      	ldrb	r0, [r6, #0]
 802b648:	9303      	str	r3, [sp, #12]
 802b64a:	f7ff fef3 	bl	802b434 <__hexdig_fun>
 802b64e:	9b03      	ldr	r3, [sp, #12]
 802b650:	f000 000f 	and.w	r0, r0, #15
 802b654:	4098      	lsls	r0, r3
 802b656:	ea4b 0b00 	orr.w	fp, fp, r0
 802b65a:	3304      	adds	r3, #4
 802b65c:	e7ae      	b.n	802b5bc <__gethex+0x15c>
 802b65e:	45b1      	cmp	r9, r6
 802b660:	d8ea      	bhi.n	802b638 <__gethex+0x1d8>
 802b662:	492b      	ldr	r1, [pc, #172]	@ (802b710 <__gethex+0x2b0>)
 802b664:	9303      	str	r3, [sp, #12]
 802b666:	2201      	movs	r2, #1
 802b668:	4630      	mov	r0, r6
 802b66a:	f7fe ff41 	bl	802a4f0 <strncmp>
 802b66e:	9b03      	ldr	r3, [sp, #12]
 802b670:	2800      	cmp	r0, #0
 802b672:	d1e1      	bne.n	802b638 <__gethex+0x1d8>
 802b674:	e7a2      	b.n	802b5bc <__gethex+0x15c>
 802b676:	1ea9      	subs	r1, r5, #2
 802b678:	4620      	mov	r0, r4
 802b67a:	f000 fe63 	bl	802c344 <__any_on>
 802b67e:	2800      	cmp	r0, #0
 802b680:	d0c2      	beq.n	802b608 <__gethex+0x1a8>
 802b682:	f04f 0903 	mov.w	r9, #3
 802b686:	e7c1      	b.n	802b60c <__gethex+0x1ac>
 802b688:	da09      	bge.n	802b69e <__gethex+0x23e>
 802b68a:	1b75      	subs	r5, r6, r5
 802b68c:	4621      	mov	r1, r4
 802b68e:	9801      	ldr	r0, [sp, #4]
 802b690:	462a      	mov	r2, r5
 802b692:	f000 fc21 	bl	802bed8 <__lshift>
 802b696:	1b7f      	subs	r7, r7, r5
 802b698:	4604      	mov	r4, r0
 802b69a:	f100 0a14 	add.w	sl, r0, #20
 802b69e:	f04f 0900 	mov.w	r9, #0
 802b6a2:	e7b8      	b.n	802b616 <__gethex+0x1b6>
 802b6a4:	f8d8 5004 	ldr.w	r5, [r8, #4]
 802b6a8:	42bd      	cmp	r5, r7
 802b6aa:	dd6f      	ble.n	802b78c <__gethex+0x32c>
 802b6ac:	1bed      	subs	r5, r5, r7
 802b6ae:	42ae      	cmp	r6, r5
 802b6b0:	dc34      	bgt.n	802b71c <__gethex+0x2bc>
 802b6b2:	f8d8 300c 	ldr.w	r3, [r8, #12]
 802b6b6:	2b02      	cmp	r3, #2
 802b6b8:	d022      	beq.n	802b700 <__gethex+0x2a0>
 802b6ba:	2b03      	cmp	r3, #3
 802b6bc:	d024      	beq.n	802b708 <__gethex+0x2a8>
 802b6be:	2b01      	cmp	r3, #1
 802b6c0:	d115      	bne.n	802b6ee <__gethex+0x28e>
 802b6c2:	42ae      	cmp	r6, r5
 802b6c4:	d113      	bne.n	802b6ee <__gethex+0x28e>
 802b6c6:	2e01      	cmp	r6, #1
 802b6c8:	d10b      	bne.n	802b6e2 <__gethex+0x282>
 802b6ca:	9a02      	ldr	r2, [sp, #8]
 802b6cc:	f8d8 3004 	ldr.w	r3, [r8, #4]
 802b6d0:	6013      	str	r3, [r2, #0]
 802b6d2:	2301      	movs	r3, #1
 802b6d4:	6123      	str	r3, [r4, #16]
 802b6d6:	f8ca 3000 	str.w	r3, [sl]
 802b6da:	9b0e      	ldr	r3, [sp, #56]	@ 0x38
 802b6dc:	2562      	movs	r5, #98	@ 0x62
 802b6de:	601c      	str	r4, [r3, #0]
 802b6e0:	e73a      	b.n	802b558 <__gethex+0xf8>
 802b6e2:	1e71      	subs	r1, r6, #1
 802b6e4:	4620      	mov	r0, r4
 802b6e6:	f000 fe2d 	bl	802c344 <__any_on>
 802b6ea:	2800      	cmp	r0, #0
 802b6ec:	d1ed      	bne.n	802b6ca <__gethex+0x26a>
 802b6ee:	9801      	ldr	r0, [sp, #4]
 802b6f0:	4621      	mov	r1, r4
 802b6f2:	f000 f9d9 	bl	802baa8 <_Bfree>
 802b6f6:	9a0e      	ldr	r2, [sp, #56]	@ 0x38
 802b6f8:	2300      	movs	r3, #0
 802b6fa:	6013      	str	r3, [r2, #0]
 802b6fc:	2550      	movs	r5, #80	@ 0x50
 802b6fe:	e72b      	b.n	802b558 <__gethex+0xf8>
 802b700:	9b0f      	ldr	r3, [sp, #60]	@ 0x3c
 802b702:	2b00      	cmp	r3, #0
 802b704:	d1f3      	bne.n	802b6ee <__gethex+0x28e>
 802b706:	e7e0      	b.n	802b6ca <__gethex+0x26a>
 802b708:	9b0f      	ldr	r3, [sp, #60]	@ 0x3c
 802b70a:	2b00      	cmp	r3, #0
 802b70c:	d1dd      	bne.n	802b6ca <__gethex+0x26a>
 802b70e:	e7ee      	b.n	802b6ee <__gethex+0x28e>
 802b710:	08031579 	.word	0x08031579
 802b714:	080317ae 	.word	0x080317ae
 802b718:	080317bf 	.word	0x080317bf
 802b71c:	1e6f      	subs	r7, r5, #1
 802b71e:	f1b9 0f00 	cmp.w	r9, #0
 802b722:	d130      	bne.n	802b786 <__gethex+0x326>
 802b724:	b127      	cbz	r7, 802b730 <__gethex+0x2d0>
 802b726:	4639      	mov	r1, r7
 802b728:	4620      	mov	r0, r4
 802b72a:	f000 fe0b 	bl	802c344 <__any_on>
 802b72e:	4681      	mov	r9, r0
 802b730:	117a      	asrs	r2, r7, #5
 802b732:	2301      	movs	r3, #1
 802b734:	f85a 2022 	ldr.w	r2, [sl, r2, lsl #2]
 802b738:	f007 071f 	and.w	r7, r7, #31
 802b73c:	40bb      	lsls	r3, r7
 802b73e:	4213      	tst	r3, r2
 802b740:	4629      	mov	r1, r5
 802b742:	4620      	mov	r0, r4
 802b744:	bf18      	it	ne
 802b746:	f049 0902 	orrne.w	r9, r9, #2
 802b74a:	f7ff fe21 	bl	802b390 <rshift>
 802b74e:	f8d8 7004 	ldr.w	r7, [r8, #4]
 802b752:	1b76      	subs	r6, r6, r5
 802b754:	2502      	movs	r5, #2
 802b756:	f1b9 0f00 	cmp.w	r9, #0
 802b75a:	d047      	beq.n	802b7ec <__gethex+0x38c>
 802b75c:	f8d8 300c 	ldr.w	r3, [r8, #12]
 802b760:	2b02      	cmp	r3, #2
 802b762:	d015      	beq.n	802b790 <__gethex+0x330>
 802b764:	2b03      	cmp	r3, #3
 802b766:	d017      	beq.n	802b798 <__gethex+0x338>
 802b768:	2b01      	cmp	r3, #1
 802b76a:	d109      	bne.n	802b780 <__gethex+0x320>
 802b76c:	f019 0f02 	tst.w	r9, #2
 802b770:	d006      	beq.n	802b780 <__gethex+0x320>
 802b772:	f8da 3000 	ldr.w	r3, [sl]
 802b776:	ea49 0903 	orr.w	r9, r9, r3
 802b77a:	f019 0f01 	tst.w	r9, #1
 802b77e:	d10e      	bne.n	802b79e <__gethex+0x33e>
 802b780:	f045 0510 	orr.w	r5, r5, #16
 802b784:	e032      	b.n	802b7ec <__gethex+0x38c>
 802b786:	f04f 0901 	mov.w	r9, #1
 802b78a:	e7d1      	b.n	802b730 <__gethex+0x2d0>
 802b78c:	2501      	movs	r5, #1
 802b78e:	e7e2      	b.n	802b756 <__gethex+0x2f6>
 802b790:	9b0f      	ldr	r3, [sp, #60]	@ 0x3c
 802b792:	f1c3 0301 	rsb	r3, r3, #1
 802b796:	930f      	str	r3, [sp, #60]	@ 0x3c
 802b798:	9b0f      	ldr	r3, [sp, #60]	@ 0x3c
 802b79a:	2b00      	cmp	r3, #0
 802b79c:	d0f0      	beq.n	802b780 <__gethex+0x320>
 802b79e:	f8d4 b010 	ldr.w	fp, [r4, #16]
 802b7a2:	f104 0314 	add.w	r3, r4, #20
 802b7a6:	ea4f 0a8b 	mov.w	sl, fp, lsl #2
 802b7aa:	eb03 018b 	add.w	r1, r3, fp, lsl #2
 802b7ae:	f04f 0c00 	mov.w	ip, #0
 802b7b2:	4618      	mov	r0, r3
 802b7b4:	f853 2b04 	ldr.w	r2, [r3], #4
 802b7b8:	f1b2 3fff 	cmp.w	r2, #4294967295	@ 0xffffffff
 802b7bc:	d01b      	beq.n	802b7f6 <__gethex+0x396>
 802b7be:	3201      	adds	r2, #1
 802b7c0:	6002      	str	r2, [r0, #0]
 802b7c2:	2d02      	cmp	r5, #2
 802b7c4:	f104 0314 	add.w	r3, r4, #20
 802b7c8:	d13c      	bne.n	802b844 <__gethex+0x3e4>
 802b7ca:	f8d8 2000 	ldr.w	r2, [r8]
 802b7ce:	3a01      	subs	r2, #1
 802b7d0:	42b2      	cmp	r2, r6
 802b7d2:	d109      	bne.n	802b7e8 <__gethex+0x388>
 802b7d4:	1171      	asrs	r1, r6, #5
 802b7d6:	2201      	movs	r2, #1
 802b7d8:	f853 3021 	ldr.w	r3, [r3, r1, lsl #2]
 802b7dc:	f006 061f 	and.w	r6, r6, #31
 802b7e0:	fa02 f606 	lsl.w	r6, r2, r6
 802b7e4:	421e      	tst	r6, r3
 802b7e6:	d13a      	bne.n	802b85e <__gethex+0x3fe>
 802b7e8:	f045 0520 	orr.w	r5, r5, #32
 802b7ec:	9b0e      	ldr	r3, [sp, #56]	@ 0x38
 802b7ee:	601c      	str	r4, [r3, #0]
 802b7f0:	9b02      	ldr	r3, [sp, #8]
 802b7f2:	601f      	str	r7, [r3, #0]
 802b7f4:	e6b0      	b.n	802b558 <__gethex+0xf8>
 802b7f6:	4299      	cmp	r1, r3
 802b7f8:	f843 cc04 	str.w	ip, [r3, #-4]
 802b7fc:	d8d9      	bhi.n	802b7b2 <__gethex+0x352>
 802b7fe:	68a3      	ldr	r3, [r4, #8]
 802b800:	459b      	cmp	fp, r3
 802b802:	db17      	blt.n	802b834 <__gethex+0x3d4>
 802b804:	6861      	ldr	r1, [r4, #4]
 802b806:	9801      	ldr	r0, [sp, #4]
 802b808:	3101      	adds	r1, #1
 802b80a:	f000 f90d 	bl	802ba28 <_Balloc>
 802b80e:	4681      	mov	r9, r0
 802b810:	b918      	cbnz	r0, 802b81a <__gethex+0x3ba>
 802b812:	4b1a      	ldr	r3, [pc, #104]	@ (802b87c <__gethex+0x41c>)
 802b814:	4602      	mov	r2, r0
 802b816:	2184      	movs	r1, #132	@ 0x84
 802b818:	e6c5      	b.n	802b5a6 <__gethex+0x146>
 802b81a:	6922      	ldr	r2, [r4, #16]
 802b81c:	3202      	adds	r2, #2
 802b81e:	f104 010c 	add.w	r1, r4, #12
 802b822:	0092      	lsls	r2, r2, #2
 802b824:	300c      	adds	r0, #12
 802b826:	f7fe ff52 	bl	802a6ce <memcpy>
 802b82a:	4621      	mov	r1, r4
 802b82c:	9801      	ldr	r0, [sp, #4]
 802b82e:	f000 f93b 	bl	802baa8 <_Bfree>
 802b832:	464c      	mov	r4, r9
 802b834:	6923      	ldr	r3, [r4, #16]
 802b836:	1c5a      	adds	r2, r3, #1
 802b838:	eb04 0383 	add.w	r3, r4, r3, lsl #2
 802b83c:	6122      	str	r2, [r4, #16]
 802b83e:	2201      	movs	r2, #1
 802b840:	615a      	str	r2, [r3, #20]
 802b842:	e7be      	b.n	802b7c2 <__gethex+0x362>
 802b844:	6922      	ldr	r2, [r4, #16]
 802b846:	455a      	cmp	r2, fp
 802b848:	dd0b      	ble.n	802b862 <__gethex+0x402>
 802b84a:	2101      	movs	r1, #1
 802b84c:	4620      	mov	r0, r4
 802b84e:	f7ff fd9f 	bl	802b390 <rshift>
 802b852:	f8d8 3008 	ldr.w	r3, [r8, #8]
 802b856:	3701      	adds	r7, #1
 802b858:	42bb      	cmp	r3, r7
 802b85a:	f6ff aee0 	blt.w	802b61e <__gethex+0x1be>
 802b85e:	2501      	movs	r5, #1
 802b860:	e7c2      	b.n	802b7e8 <__gethex+0x388>
 802b862:	f016 061f 	ands.w	r6, r6, #31
 802b866:	d0fa      	beq.n	802b85e <__gethex+0x3fe>
 802b868:	4453      	add	r3, sl
 802b86a:	f1c6 0620 	rsb	r6, r6, #32
 802b86e:	f853 0c04 	ldr.w	r0, [r3, #-4]
 802b872:	f000 f9cb 	bl	802bc0c <__hi0bits>
 802b876:	42b0      	cmp	r0, r6
 802b878:	dbe7      	blt.n	802b84a <__gethex+0x3ea>
 802b87a:	e7f0      	b.n	802b85e <__gethex+0x3fe>
 802b87c:	080317ae 	.word	0x080317ae

0802b880 <L_shift>:
 802b880:	f1c2 0208 	rsb	r2, r2, #8
 802b884:	0092      	lsls	r2, r2, #2
 802b886:	b570      	push	{r4, r5, r6, lr}
 802b888:	f1c2 0620 	rsb	r6, r2, #32
 802b88c:	6843      	ldr	r3, [r0, #4]
 802b88e:	6804      	ldr	r4, [r0, #0]
 802b890:	fa03 f506 	lsl.w	r5, r3, r6
 802b894:	432c      	orrs	r4, r5
 802b896:	40d3      	lsrs	r3, r2
 802b898:	6004      	str	r4, [r0, #0]
 802b89a:	f840 3f04 	str.w	r3, [r0, #4]!
 802b89e:	4288      	cmp	r0, r1
 802b8a0:	d3f4      	bcc.n	802b88c <L_shift+0xc>
 802b8a2:	bd70      	pop	{r4, r5, r6, pc}

0802b8a4 <__match>:
 802b8a4:	b530      	push	{r4, r5, lr}
 802b8a6:	6803      	ldr	r3, [r0, #0]
 802b8a8:	3301      	adds	r3, #1
 802b8aa:	f811 4b01 	ldrb.w	r4, [r1], #1
 802b8ae:	b914      	cbnz	r4, 802b8b6 <__match+0x12>
 802b8b0:	6003      	str	r3, [r0, #0]
 802b8b2:	2001      	movs	r0, #1
 802b8b4:	bd30      	pop	{r4, r5, pc}
 802b8b6:	f813 2b01 	ldrb.w	r2, [r3], #1
 802b8ba:	f1a2 0541 	sub.w	r5, r2, #65	@ 0x41
 802b8be:	2d19      	cmp	r5, #25
 802b8c0:	bf98      	it	ls
 802b8c2:	3220      	addls	r2, #32
 802b8c4:	42a2      	cmp	r2, r4
 802b8c6:	d0f0      	beq.n	802b8aa <__match+0x6>
 802b8c8:	2000      	movs	r0, #0
 802b8ca:	e7f3      	b.n	802b8b4 <__match+0x10>

0802b8cc <__hexnan>:
 802b8cc:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 802b8d0:	680b      	ldr	r3, [r1, #0]
 802b8d2:	6801      	ldr	r1, [r0, #0]
 802b8d4:	115e      	asrs	r6, r3, #5
 802b8d6:	eb02 0686 	add.w	r6, r2, r6, lsl #2
 802b8da:	f013 031f 	ands.w	r3, r3, #31
 802b8de:	b087      	sub	sp, #28
 802b8e0:	bf18      	it	ne
 802b8e2:	3604      	addne	r6, #4
 802b8e4:	2500      	movs	r5, #0
 802b8e6:	1f37      	subs	r7, r6, #4
 802b8e8:	4682      	mov	sl, r0
 802b8ea:	4690      	mov	r8, r2
 802b8ec:	9301      	str	r3, [sp, #4]
 802b8ee:	f846 5c04 	str.w	r5, [r6, #-4]
 802b8f2:	46b9      	mov	r9, r7
 802b8f4:	463c      	mov	r4, r7
 802b8f6:	9502      	str	r5, [sp, #8]
 802b8f8:	46ab      	mov	fp, r5
 802b8fa:	784a      	ldrb	r2, [r1, #1]
 802b8fc:	1c4b      	adds	r3, r1, #1
 802b8fe:	9303      	str	r3, [sp, #12]
 802b900:	b342      	cbz	r2, 802b954 <__hexnan+0x88>
 802b902:	4610      	mov	r0, r2
 802b904:	9105      	str	r1, [sp, #20]
 802b906:	9204      	str	r2, [sp, #16]
 802b908:	f7ff fd94 	bl	802b434 <__hexdig_fun>
 802b90c:	2800      	cmp	r0, #0
 802b90e:	d151      	bne.n	802b9b4 <__hexnan+0xe8>
 802b910:	9a04      	ldr	r2, [sp, #16]
 802b912:	9905      	ldr	r1, [sp, #20]
 802b914:	2a20      	cmp	r2, #32
 802b916:	d818      	bhi.n	802b94a <__hexnan+0x7e>
 802b918:	9b02      	ldr	r3, [sp, #8]
 802b91a:	459b      	cmp	fp, r3
 802b91c:	dd13      	ble.n	802b946 <__hexnan+0x7a>
 802b91e:	454c      	cmp	r4, r9
 802b920:	d206      	bcs.n	802b930 <__hexnan+0x64>
 802b922:	2d07      	cmp	r5, #7
 802b924:	dc04      	bgt.n	802b930 <__hexnan+0x64>
 802b926:	462a      	mov	r2, r5
 802b928:	4649      	mov	r1, r9
 802b92a:	4620      	mov	r0, r4
 802b92c:	f7ff ffa8 	bl	802b880 <L_shift>
 802b930:	4544      	cmp	r4, r8
 802b932:	d952      	bls.n	802b9da <__hexnan+0x10e>
 802b934:	2300      	movs	r3, #0
 802b936:	f1a4 0904 	sub.w	r9, r4, #4
 802b93a:	f844 3c04 	str.w	r3, [r4, #-4]
 802b93e:	f8cd b008 	str.w	fp, [sp, #8]
 802b942:	464c      	mov	r4, r9
 802b944:	461d      	mov	r5, r3
 802b946:	9903      	ldr	r1, [sp, #12]
 802b948:	e7d7      	b.n	802b8fa <__hexnan+0x2e>
 802b94a:	2a29      	cmp	r2, #41	@ 0x29
 802b94c:	d157      	bne.n	802b9fe <__hexnan+0x132>
 802b94e:	3102      	adds	r1, #2
 802b950:	f8ca 1000 	str.w	r1, [sl]
 802b954:	f1bb 0f00 	cmp.w	fp, #0
 802b958:	d051      	beq.n	802b9fe <__hexnan+0x132>
 802b95a:	454c      	cmp	r4, r9
 802b95c:	d206      	bcs.n	802b96c <__hexnan+0xa0>
 802b95e:	2d07      	cmp	r5, #7
 802b960:	dc04      	bgt.n	802b96c <__hexnan+0xa0>
 802b962:	462a      	mov	r2, r5
 802b964:	4649      	mov	r1, r9
 802b966:	4620      	mov	r0, r4
 802b968:	f7ff ff8a 	bl	802b880 <L_shift>
 802b96c:	4544      	cmp	r4, r8
 802b96e:	d936      	bls.n	802b9de <__hexnan+0x112>
 802b970:	f1a8 0204 	sub.w	r2, r8, #4
 802b974:	4623      	mov	r3, r4
 802b976:	f853 1b04 	ldr.w	r1, [r3], #4
 802b97a:	f842 1f04 	str.w	r1, [r2, #4]!
 802b97e:	429f      	cmp	r7, r3
 802b980:	d2f9      	bcs.n	802b976 <__hexnan+0xaa>
 802b982:	1b3b      	subs	r3, r7, r4
 802b984:	f023 0303 	bic.w	r3, r3, #3
 802b988:	3304      	adds	r3, #4
 802b98a:	3401      	adds	r4, #1
 802b98c:	3e03      	subs	r6, #3
 802b98e:	42b4      	cmp	r4, r6
 802b990:	bf88      	it	hi
 802b992:	2304      	movhi	r3, #4
 802b994:	4443      	add	r3, r8
 802b996:	2200      	movs	r2, #0
 802b998:	f843 2b04 	str.w	r2, [r3], #4
 802b99c:	429f      	cmp	r7, r3
 802b99e:	d2fb      	bcs.n	802b998 <__hexnan+0xcc>
 802b9a0:	683b      	ldr	r3, [r7, #0]
 802b9a2:	b91b      	cbnz	r3, 802b9ac <__hexnan+0xe0>
 802b9a4:	4547      	cmp	r7, r8
 802b9a6:	d128      	bne.n	802b9fa <__hexnan+0x12e>
 802b9a8:	2301      	movs	r3, #1
 802b9aa:	603b      	str	r3, [r7, #0]
 802b9ac:	2005      	movs	r0, #5
 802b9ae:	b007      	add	sp, #28
 802b9b0:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 802b9b4:	3501      	adds	r5, #1
 802b9b6:	2d08      	cmp	r5, #8
 802b9b8:	f10b 0b01 	add.w	fp, fp, #1
 802b9bc:	dd06      	ble.n	802b9cc <__hexnan+0x100>
 802b9be:	4544      	cmp	r4, r8
 802b9c0:	d9c1      	bls.n	802b946 <__hexnan+0x7a>
 802b9c2:	2300      	movs	r3, #0
 802b9c4:	f844 3c04 	str.w	r3, [r4, #-4]
 802b9c8:	2501      	movs	r5, #1
 802b9ca:	3c04      	subs	r4, #4
 802b9cc:	6822      	ldr	r2, [r4, #0]
 802b9ce:	f000 000f 	and.w	r0, r0, #15
 802b9d2:	ea40 1002 	orr.w	r0, r0, r2, lsl #4
 802b9d6:	6020      	str	r0, [r4, #0]
 802b9d8:	e7b5      	b.n	802b946 <__hexnan+0x7a>
 802b9da:	2508      	movs	r5, #8
 802b9dc:	e7b3      	b.n	802b946 <__hexnan+0x7a>
 802b9de:	9b01      	ldr	r3, [sp, #4]
 802b9e0:	2b00      	cmp	r3, #0
 802b9e2:	d0dd      	beq.n	802b9a0 <__hexnan+0xd4>
 802b9e4:	f1c3 0320 	rsb	r3, r3, #32
 802b9e8:	f04f 32ff 	mov.w	r2, #4294967295	@ 0xffffffff
 802b9ec:	40da      	lsrs	r2, r3
 802b9ee:	f856 3c04 	ldr.w	r3, [r6, #-4]
 802b9f2:	4013      	ands	r3, r2
 802b9f4:	f846 3c04 	str.w	r3, [r6, #-4]
 802b9f8:	e7d2      	b.n	802b9a0 <__hexnan+0xd4>
 802b9fa:	3f04      	subs	r7, #4
 802b9fc:	e7d0      	b.n	802b9a0 <__hexnan+0xd4>
 802b9fe:	2004      	movs	r0, #4
 802ba00:	e7d5      	b.n	802b9ae <__hexnan+0xe2>

0802ba02 <__ascii_mbtowc>:
 802ba02:	b082      	sub	sp, #8
 802ba04:	b901      	cbnz	r1, 802ba08 <__ascii_mbtowc+0x6>
 802ba06:	a901      	add	r1, sp, #4
 802ba08:	b142      	cbz	r2, 802ba1c <__ascii_mbtowc+0x1a>
 802ba0a:	b14b      	cbz	r3, 802ba20 <__ascii_mbtowc+0x1e>
 802ba0c:	7813      	ldrb	r3, [r2, #0]
 802ba0e:	600b      	str	r3, [r1, #0]
 802ba10:	7812      	ldrb	r2, [r2, #0]
 802ba12:	1e10      	subs	r0, r2, #0
 802ba14:	bf18      	it	ne
 802ba16:	2001      	movne	r0, #1
 802ba18:	b002      	add	sp, #8
 802ba1a:	4770      	bx	lr
 802ba1c:	4610      	mov	r0, r2
 802ba1e:	e7fb      	b.n	802ba18 <__ascii_mbtowc+0x16>
 802ba20:	f06f 0001 	mvn.w	r0, #1
 802ba24:	e7f8      	b.n	802ba18 <__ascii_mbtowc+0x16>
	...

0802ba28 <_Balloc>:
 802ba28:	b570      	push	{r4, r5, r6, lr}
 802ba2a:	69c6      	ldr	r6, [r0, #28]
 802ba2c:	4604      	mov	r4, r0
 802ba2e:	460d      	mov	r5, r1
 802ba30:	b976      	cbnz	r6, 802ba50 <_Balloc+0x28>
 802ba32:	2010      	movs	r0, #16
 802ba34:	f7fc ffda 	bl	80289ec <malloc>
 802ba38:	4602      	mov	r2, r0
 802ba3a:	61e0      	str	r0, [r4, #28]
 802ba3c:	b920      	cbnz	r0, 802ba48 <_Balloc+0x20>
 802ba3e:	4b18      	ldr	r3, [pc, #96]	@ (802baa0 <_Balloc+0x78>)
 802ba40:	4818      	ldr	r0, [pc, #96]	@ (802baa4 <_Balloc+0x7c>)
 802ba42:	216b      	movs	r1, #107	@ 0x6b
 802ba44:	f7fe fe5c 	bl	802a700 <__assert_func>
 802ba48:	e9c0 6601 	strd	r6, r6, [r0, #4]
 802ba4c:	6006      	str	r6, [r0, #0]
 802ba4e:	60c6      	str	r6, [r0, #12]
 802ba50:	69e6      	ldr	r6, [r4, #28]
 802ba52:	68f3      	ldr	r3, [r6, #12]
 802ba54:	b183      	cbz	r3, 802ba78 <_Balloc+0x50>
 802ba56:	69e3      	ldr	r3, [r4, #28]
 802ba58:	68db      	ldr	r3, [r3, #12]
 802ba5a:	f853 0025 	ldr.w	r0, [r3, r5, lsl #2]
 802ba5e:	b9b8      	cbnz	r0, 802ba90 <_Balloc+0x68>
 802ba60:	2101      	movs	r1, #1
 802ba62:	fa01 f605 	lsl.w	r6, r1, r5
 802ba66:	1d72      	adds	r2, r6, #5
 802ba68:	0092      	lsls	r2, r2, #2
 802ba6a:	4620      	mov	r0, r4
 802ba6c:	f001 f883 	bl	802cb76 <_calloc_r>
 802ba70:	b160      	cbz	r0, 802ba8c <_Balloc+0x64>
 802ba72:	e9c0 5601 	strd	r5, r6, [r0, #4]
 802ba76:	e00e      	b.n	802ba96 <_Balloc+0x6e>
 802ba78:	2221      	movs	r2, #33	@ 0x21
 802ba7a:	2104      	movs	r1, #4
 802ba7c:	4620      	mov	r0, r4
 802ba7e:	f001 f87a 	bl	802cb76 <_calloc_r>
 802ba82:	69e3      	ldr	r3, [r4, #28]
 802ba84:	60f0      	str	r0, [r6, #12]
 802ba86:	68db      	ldr	r3, [r3, #12]
 802ba88:	2b00      	cmp	r3, #0
 802ba8a:	d1e4      	bne.n	802ba56 <_Balloc+0x2e>
 802ba8c:	2000      	movs	r0, #0
 802ba8e:	bd70      	pop	{r4, r5, r6, pc}
 802ba90:	6802      	ldr	r2, [r0, #0]
 802ba92:	f843 2025 	str.w	r2, [r3, r5, lsl #2]
 802ba96:	2300      	movs	r3, #0
 802ba98:	e9c0 3303 	strd	r3, r3, [r0, #12]
 802ba9c:	e7f7      	b.n	802ba8e <_Balloc+0x66>
 802ba9e:	bf00      	nop
 802baa0:	0803150a 	.word	0x0803150a
 802baa4:	0803181f 	.word	0x0803181f

0802baa8 <_Bfree>:
 802baa8:	b570      	push	{r4, r5, r6, lr}
 802baaa:	69c6      	ldr	r6, [r0, #28]
 802baac:	4605      	mov	r5, r0
 802baae:	460c      	mov	r4, r1
 802bab0:	b976      	cbnz	r6, 802bad0 <_Bfree+0x28>
 802bab2:	2010      	movs	r0, #16
 802bab4:	f7fc ff9a 	bl	80289ec <malloc>
 802bab8:	4602      	mov	r2, r0
 802baba:	61e8      	str	r0, [r5, #28]
 802babc:	b920      	cbnz	r0, 802bac8 <_Bfree+0x20>
 802babe:	4b09      	ldr	r3, [pc, #36]	@ (802bae4 <_Bfree+0x3c>)
 802bac0:	4809      	ldr	r0, [pc, #36]	@ (802bae8 <_Bfree+0x40>)
 802bac2:	218f      	movs	r1, #143	@ 0x8f
 802bac4:	f7fe fe1c 	bl	802a700 <__assert_func>
 802bac8:	e9c0 6601 	strd	r6, r6, [r0, #4]
 802bacc:	6006      	str	r6, [r0, #0]
 802bace:	60c6      	str	r6, [r0, #12]
 802bad0:	b13c      	cbz	r4, 802bae2 <_Bfree+0x3a>
 802bad2:	69eb      	ldr	r3, [r5, #28]
 802bad4:	6862      	ldr	r2, [r4, #4]
 802bad6:	68db      	ldr	r3, [r3, #12]
 802bad8:	f853 1022 	ldr.w	r1, [r3, r2, lsl #2]
 802badc:	6021      	str	r1, [r4, #0]
 802bade:	f843 4022 	str.w	r4, [r3, r2, lsl #2]
 802bae2:	bd70      	pop	{r4, r5, r6, pc}
 802bae4:	0803150a 	.word	0x0803150a
 802bae8:	0803181f 	.word	0x0803181f

0802baec <__multadd>:
 802baec:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
 802baf0:	690d      	ldr	r5, [r1, #16]
 802baf2:	4607      	mov	r7, r0
 802baf4:	460c      	mov	r4, r1
 802baf6:	461e      	mov	r6, r3
 802baf8:	f101 0c14 	add.w	ip, r1, #20
 802bafc:	2000      	movs	r0, #0
 802bafe:	f8dc 3000 	ldr.w	r3, [ip]
 802bb02:	b299      	uxth	r1, r3
 802bb04:	fb02 6101 	mla	r1, r2, r1, r6
 802bb08:	0c1e      	lsrs	r6, r3, #16
 802bb0a:	0c0b      	lsrs	r3, r1, #16
 802bb0c:	fb02 3306 	mla	r3, r2, r6, r3
 802bb10:	b289      	uxth	r1, r1
 802bb12:	3001      	adds	r0, #1
 802bb14:	eb01 4103 	add.w	r1, r1, r3, lsl #16
 802bb18:	4285      	cmp	r5, r0
 802bb1a:	f84c 1b04 	str.w	r1, [ip], #4
 802bb1e:	ea4f 4613 	mov.w	r6, r3, lsr #16
 802bb22:	dcec      	bgt.n	802bafe <__multadd+0x12>
 802bb24:	b30e      	cbz	r6, 802bb6a <__multadd+0x7e>
 802bb26:	68a3      	ldr	r3, [r4, #8]
 802bb28:	42ab      	cmp	r3, r5
 802bb2a:	dc19      	bgt.n	802bb60 <__multadd+0x74>
 802bb2c:	6861      	ldr	r1, [r4, #4]
 802bb2e:	4638      	mov	r0, r7
 802bb30:	3101      	adds	r1, #1
 802bb32:	f7ff ff79 	bl	802ba28 <_Balloc>
 802bb36:	4680      	mov	r8, r0
 802bb38:	b928      	cbnz	r0, 802bb46 <__multadd+0x5a>
 802bb3a:	4602      	mov	r2, r0
 802bb3c:	4b0c      	ldr	r3, [pc, #48]	@ (802bb70 <__multadd+0x84>)
 802bb3e:	480d      	ldr	r0, [pc, #52]	@ (802bb74 <__multadd+0x88>)
 802bb40:	21ba      	movs	r1, #186	@ 0xba
 802bb42:	f7fe fddd 	bl	802a700 <__assert_func>
 802bb46:	6922      	ldr	r2, [r4, #16]
 802bb48:	3202      	adds	r2, #2
 802bb4a:	f104 010c 	add.w	r1, r4, #12
 802bb4e:	0092      	lsls	r2, r2, #2
 802bb50:	300c      	adds	r0, #12
 802bb52:	f7fe fdbc 	bl	802a6ce <memcpy>
 802bb56:	4621      	mov	r1, r4
 802bb58:	4638      	mov	r0, r7
 802bb5a:	f7ff ffa5 	bl	802baa8 <_Bfree>
 802bb5e:	4644      	mov	r4, r8
 802bb60:	eb04 0385 	add.w	r3, r4, r5, lsl #2
 802bb64:	3501      	adds	r5, #1
 802bb66:	615e      	str	r6, [r3, #20]
 802bb68:	6125      	str	r5, [r4, #16]
 802bb6a:	4620      	mov	r0, r4
 802bb6c:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 802bb70:	080317ae 	.word	0x080317ae
 802bb74:	0803181f 	.word	0x0803181f

0802bb78 <__s2b>:
 802bb78:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
 802bb7c:	460c      	mov	r4, r1
 802bb7e:	4615      	mov	r5, r2
 802bb80:	461f      	mov	r7, r3
 802bb82:	2209      	movs	r2, #9
 802bb84:	3308      	adds	r3, #8
 802bb86:	4606      	mov	r6, r0
 802bb88:	fb93 f3f2 	sdiv	r3, r3, r2
 802bb8c:	2100      	movs	r1, #0
 802bb8e:	2201      	movs	r2, #1
 802bb90:	429a      	cmp	r2, r3
 802bb92:	db09      	blt.n	802bba8 <__s2b+0x30>
 802bb94:	4630      	mov	r0, r6
 802bb96:	f7ff ff47 	bl	802ba28 <_Balloc>
 802bb9a:	b940      	cbnz	r0, 802bbae <__s2b+0x36>
 802bb9c:	4602      	mov	r2, r0
 802bb9e:	4b19      	ldr	r3, [pc, #100]	@ (802bc04 <__s2b+0x8c>)
 802bba0:	4819      	ldr	r0, [pc, #100]	@ (802bc08 <__s2b+0x90>)
 802bba2:	21d3      	movs	r1, #211	@ 0xd3
 802bba4:	f7fe fdac 	bl	802a700 <__assert_func>
 802bba8:	0052      	lsls	r2, r2, #1
 802bbaa:	3101      	adds	r1, #1
 802bbac:	e7f0      	b.n	802bb90 <__s2b+0x18>
 802bbae:	9b08      	ldr	r3, [sp, #32]
 802bbb0:	6143      	str	r3, [r0, #20]
 802bbb2:	2d09      	cmp	r5, #9
 802bbb4:	f04f 0301 	mov.w	r3, #1
 802bbb8:	6103      	str	r3, [r0, #16]
 802bbba:	dd16      	ble.n	802bbea <__s2b+0x72>
 802bbbc:	f104 0909 	add.w	r9, r4, #9
 802bbc0:	46c8      	mov	r8, r9
 802bbc2:	442c      	add	r4, r5
 802bbc4:	f818 3b01 	ldrb.w	r3, [r8], #1
 802bbc8:	4601      	mov	r1, r0
 802bbca:	3b30      	subs	r3, #48	@ 0x30
 802bbcc:	220a      	movs	r2, #10
 802bbce:	4630      	mov	r0, r6
 802bbd0:	f7ff ff8c 	bl	802baec <__multadd>
 802bbd4:	45a0      	cmp	r8, r4
 802bbd6:	d1f5      	bne.n	802bbc4 <__s2b+0x4c>
 802bbd8:	f1a5 0408 	sub.w	r4, r5, #8
 802bbdc:	444c      	add	r4, r9
 802bbde:	1b2d      	subs	r5, r5, r4
 802bbe0:	1963      	adds	r3, r4, r5
 802bbe2:	42bb      	cmp	r3, r7
 802bbe4:	db04      	blt.n	802bbf0 <__s2b+0x78>
 802bbe6:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
 802bbea:	340a      	adds	r4, #10
 802bbec:	2509      	movs	r5, #9
 802bbee:	e7f6      	b.n	802bbde <__s2b+0x66>
 802bbf0:	f814 3b01 	ldrb.w	r3, [r4], #1
 802bbf4:	4601      	mov	r1, r0
 802bbf6:	3b30      	subs	r3, #48	@ 0x30
 802bbf8:	220a      	movs	r2, #10
 802bbfa:	4630      	mov	r0, r6
 802bbfc:	f7ff ff76 	bl	802baec <__multadd>
 802bc00:	e7ee      	b.n	802bbe0 <__s2b+0x68>
 802bc02:	bf00      	nop
 802bc04:	080317ae 	.word	0x080317ae
 802bc08:	0803181f 	.word	0x0803181f

0802bc0c <__hi0bits>:
 802bc0c:	f5b0 3f80 	cmp.w	r0, #65536	@ 0x10000
 802bc10:	4603      	mov	r3, r0
 802bc12:	bf36      	itet	cc
 802bc14:	0403      	lslcc	r3, r0, #16
 802bc16:	2000      	movcs	r0, #0
 802bc18:	2010      	movcc	r0, #16
 802bc1a:	f1b3 7f80 	cmp.w	r3, #16777216	@ 0x1000000
 802bc1e:	bf3c      	itt	cc
 802bc20:	021b      	lslcc	r3, r3, #8
 802bc22:	3008      	addcc	r0, #8
 802bc24:	f1b3 5f80 	cmp.w	r3, #268435456	@ 0x10000000
 802bc28:	bf3c      	itt	cc
 802bc2a:	011b      	lslcc	r3, r3, #4
 802bc2c:	3004      	addcc	r0, #4
 802bc2e:	f1b3 4f80 	cmp.w	r3, #1073741824	@ 0x40000000
 802bc32:	bf3c      	itt	cc
 802bc34:	009b      	lslcc	r3, r3, #2
 802bc36:	3002      	addcc	r0, #2
 802bc38:	2b00      	cmp	r3, #0
 802bc3a:	db05      	blt.n	802bc48 <__hi0bits+0x3c>
 802bc3c:	f013 4f80 	tst.w	r3, #1073741824	@ 0x40000000
 802bc40:	f100 0001 	add.w	r0, r0, #1
 802bc44:	bf08      	it	eq
 802bc46:	2020      	moveq	r0, #32
 802bc48:	4770      	bx	lr

0802bc4a <__lo0bits>:
 802bc4a:	6803      	ldr	r3, [r0, #0]
 802bc4c:	4602      	mov	r2, r0
 802bc4e:	f013 0007 	ands.w	r0, r3, #7
 802bc52:	d00b      	beq.n	802bc6c <__lo0bits+0x22>
 802bc54:	07d9      	lsls	r1, r3, #31
 802bc56:	d421      	bmi.n	802bc9c <__lo0bits+0x52>
 802bc58:	0798      	lsls	r0, r3, #30
 802bc5a:	bf49      	itett	mi
 802bc5c:	085b      	lsrmi	r3, r3, #1
 802bc5e:	089b      	lsrpl	r3, r3, #2
 802bc60:	2001      	movmi	r0, #1
 802bc62:	6013      	strmi	r3, [r2, #0]
 802bc64:	bf5c      	itt	pl
 802bc66:	6013      	strpl	r3, [r2, #0]
 802bc68:	2002      	movpl	r0, #2
 802bc6a:	4770      	bx	lr
 802bc6c:	b299      	uxth	r1, r3
 802bc6e:	b909      	cbnz	r1, 802bc74 <__lo0bits+0x2a>
 802bc70:	0c1b      	lsrs	r3, r3, #16
 802bc72:	2010      	movs	r0, #16
 802bc74:	b2d9      	uxtb	r1, r3
 802bc76:	b909      	cbnz	r1, 802bc7c <__lo0bits+0x32>
 802bc78:	3008      	adds	r0, #8
 802bc7a:	0a1b      	lsrs	r3, r3, #8
 802bc7c:	0719      	lsls	r1, r3, #28
 802bc7e:	bf04      	itt	eq
 802bc80:	091b      	lsreq	r3, r3, #4
 802bc82:	3004      	addeq	r0, #4
 802bc84:	0799      	lsls	r1, r3, #30
 802bc86:	bf04      	itt	eq
 802bc88:	089b      	lsreq	r3, r3, #2
 802bc8a:	3002      	addeq	r0, #2
 802bc8c:	07d9      	lsls	r1, r3, #31
 802bc8e:	d403      	bmi.n	802bc98 <__lo0bits+0x4e>
 802bc90:	085b      	lsrs	r3, r3, #1
 802bc92:	f100 0001 	add.w	r0, r0, #1
 802bc96:	d003      	beq.n	802bca0 <__lo0bits+0x56>
 802bc98:	6013      	str	r3, [r2, #0]
 802bc9a:	4770      	bx	lr
 802bc9c:	2000      	movs	r0, #0
 802bc9e:	4770      	bx	lr
 802bca0:	2020      	movs	r0, #32
 802bca2:	4770      	bx	lr

0802bca4 <__i2b>:
 802bca4:	b510      	push	{r4, lr}
 802bca6:	460c      	mov	r4, r1
 802bca8:	2101      	movs	r1, #1
 802bcaa:	f7ff febd 	bl	802ba28 <_Balloc>
 802bcae:	4602      	mov	r2, r0
 802bcb0:	b928      	cbnz	r0, 802bcbe <__i2b+0x1a>
 802bcb2:	4b05      	ldr	r3, [pc, #20]	@ (802bcc8 <__i2b+0x24>)
 802bcb4:	4805      	ldr	r0, [pc, #20]	@ (802bccc <__i2b+0x28>)
 802bcb6:	f240 1145 	movw	r1, #325	@ 0x145
 802bcba:	f7fe fd21 	bl	802a700 <__assert_func>
 802bcbe:	2301      	movs	r3, #1
 802bcc0:	6144      	str	r4, [r0, #20]
 802bcc2:	6103      	str	r3, [r0, #16]
 802bcc4:	bd10      	pop	{r4, pc}
 802bcc6:	bf00      	nop
 802bcc8:	080317ae 	.word	0x080317ae
 802bccc:	0803181f 	.word	0x0803181f

0802bcd0 <__multiply>:
 802bcd0:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 802bcd4:	4614      	mov	r4, r2
 802bcd6:	690a      	ldr	r2, [r1, #16]
 802bcd8:	6923      	ldr	r3, [r4, #16]
 802bcda:	429a      	cmp	r2, r3
 802bcdc:	bfa8      	it	ge
 802bcde:	4623      	movge	r3, r4
 802bce0:	460f      	mov	r7, r1
 802bce2:	bfa4      	itt	ge
 802bce4:	460c      	movge	r4, r1
 802bce6:	461f      	movge	r7, r3
 802bce8:	f8d4 a010 	ldr.w	sl, [r4, #16]
 802bcec:	f8d7 9010 	ldr.w	r9, [r7, #16]
 802bcf0:	68a3      	ldr	r3, [r4, #8]
 802bcf2:	6861      	ldr	r1, [r4, #4]
 802bcf4:	eb0a 0609 	add.w	r6, sl, r9
 802bcf8:	42b3      	cmp	r3, r6
 802bcfa:	b085      	sub	sp, #20
 802bcfc:	bfb8      	it	lt
 802bcfe:	3101      	addlt	r1, #1
 802bd00:	f7ff fe92 	bl	802ba28 <_Balloc>
 802bd04:	b930      	cbnz	r0, 802bd14 <__multiply+0x44>
 802bd06:	4602      	mov	r2, r0
 802bd08:	4b44      	ldr	r3, [pc, #272]	@ (802be1c <__multiply+0x14c>)
 802bd0a:	4845      	ldr	r0, [pc, #276]	@ (802be20 <__multiply+0x150>)
 802bd0c:	f44f 71b1 	mov.w	r1, #354	@ 0x162
 802bd10:	f7fe fcf6 	bl	802a700 <__assert_func>
 802bd14:	f100 0514 	add.w	r5, r0, #20
 802bd18:	eb05 0886 	add.w	r8, r5, r6, lsl #2
 802bd1c:	462b      	mov	r3, r5
 802bd1e:	2200      	movs	r2, #0
 802bd20:	4543      	cmp	r3, r8
 802bd22:	d321      	bcc.n	802bd68 <__multiply+0x98>
 802bd24:	f107 0114 	add.w	r1, r7, #20
 802bd28:	f104 0214 	add.w	r2, r4, #20
 802bd2c:	eb02 028a 	add.w	r2, r2, sl, lsl #2
 802bd30:	eb01 0389 	add.w	r3, r1, r9, lsl #2
 802bd34:	9302      	str	r3, [sp, #8]
 802bd36:	1b13      	subs	r3, r2, r4
 802bd38:	3b15      	subs	r3, #21
 802bd3a:	f023 0303 	bic.w	r3, r3, #3
 802bd3e:	3304      	adds	r3, #4
 802bd40:	f104 0715 	add.w	r7, r4, #21
 802bd44:	42ba      	cmp	r2, r7
 802bd46:	bf38      	it	cc
 802bd48:	2304      	movcc	r3, #4
 802bd4a:	9301      	str	r3, [sp, #4]
 802bd4c:	9b02      	ldr	r3, [sp, #8]
 802bd4e:	9103      	str	r1, [sp, #12]
 802bd50:	428b      	cmp	r3, r1
 802bd52:	d80c      	bhi.n	802bd6e <__multiply+0x9e>
 802bd54:	2e00      	cmp	r6, #0
 802bd56:	dd03      	ble.n	802bd60 <__multiply+0x90>
 802bd58:	f858 3d04 	ldr.w	r3, [r8, #-4]!
 802bd5c:	2b00      	cmp	r3, #0
 802bd5e:	d05b      	beq.n	802be18 <__multiply+0x148>
 802bd60:	6106      	str	r6, [r0, #16]
 802bd62:	b005      	add	sp, #20
 802bd64:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 802bd68:	f843 2b04 	str.w	r2, [r3], #4
 802bd6c:	e7d8      	b.n	802bd20 <__multiply+0x50>
 802bd6e:	f8b1 a000 	ldrh.w	sl, [r1]
 802bd72:	f1ba 0f00 	cmp.w	sl, #0
 802bd76:	d024      	beq.n	802bdc2 <__multiply+0xf2>
 802bd78:	f104 0e14 	add.w	lr, r4, #20
 802bd7c:	46a9      	mov	r9, r5
 802bd7e:	f04f 0c00 	mov.w	ip, #0
 802bd82:	f85e 7b04 	ldr.w	r7, [lr], #4
 802bd86:	f8d9 3000 	ldr.w	r3, [r9]
 802bd8a:	fa1f fb87 	uxth.w	fp, r7
 802bd8e:	b29b      	uxth	r3, r3
 802bd90:	fb0a 330b 	mla	r3, sl, fp, r3
 802bd94:	ea4f 4b17 	mov.w	fp, r7, lsr #16
 802bd98:	f8d9 7000 	ldr.w	r7, [r9]
 802bd9c:	4463      	add	r3, ip
 802bd9e:	ea4f 4c17 	mov.w	ip, r7, lsr #16
 802bda2:	fb0a c70b 	mla	r7, sl, fp, ip
 802bda6:	eb07 4713 	add.w	r7, r7, r3, lsr #16
 802bdaa:	b29b      	uxth	r3, r3
 802bdac:	ea43 4307 	orr.w	r3, r3, r7, lsl #16
 802bdb0:	4572      	cmp	r2, lr
 802bdb2:	f849 3b04 	str.w	r3, [r9], #4
 802bdb6:	ea4f 4c17 	mov.w	ip, r7, lsr #16
 802bdba:	d8e2      	bhi.n	802bd82 <__multiply+0xb2>
 802bdbc:	9b01      	ldr	r3, [sp, #4]
 802bdbe:	f845 c003 	str.w	ip, [r5, r3]
 802bdc2:	9b03      	ldr	r3, [sp, #12]
 802bdc4:	f8b3 9002 	ldrh.w	r9, [r3, #2]
 802bdc8:	3104      	adds	r1, #4
 802bdca:	f1b9 0f00 	cmp.w	r9, #0
 802bdce:	d021      	beq.n	802be14 <__multiply+0x144>
 802bdd0:	682b      	ldr	r3, [r5, #0]
 802bdd2:	f104 0c14 	add.w	ip, r4, #20
 802bdd6:	46ae      	mov	lr, r5
 802bdd8:	f04f 0a00 	mov.w	sl, #0
 802bddc:	f8bc b000 	ldrh.w	fp, [ip]
 802bde0:	f8be 7002 	ldrh.w	r7, [lr, #2]
 802bde4:	fb09 770b 	mla	r7, r9, fp, r7
 802bde8:	4457      	add	r7, sl
 802bdea:	b29b      	uxth	r3, r3
 802bdec:	ea43 4307 	orr.w	r3, r3, r7, lsl #16
 802bdf0:	f84e 3b04 	str.w	r3, [lr], #4
 802bdf4:	f85c 3b04 	ldr.w	r3, [ip], #4
 802bdf8:	ea4f 4a13 	mov.w	sl, r3, lsr #16
 802bdfc:	f8be 3000 	ldrh.w	r3, [lr]
 802be00:	fb09 330a 	mla	r3, r9, sl, r3
 802be04:	eb03 4317 	add.w	r3, r3, r7, lsr #16
 802be08:	4562      	cmp	r2, ip
 802be0a:	ea4f 4a13 	mov.w	sl, r3, lsr #16
 802be0e:	d8e5      	bhi.n	802bddc <__multiply+0x10c>
 802be10:	9f01      	ldr	r7, [sp, #4]
 802be12:	51eb      	str	r3, [r5, r7]
 802be14:	3504      	adds	r5, #4
 802be16:	e799      	b.n	802bd4c <__multiply+0x7c>
 802be18:	3e01      	subs	r6, #1
 802be1a:	e79b      	b.n	802bd54 <__multiply+0x84>
 802be1c:	080317ae 	.word	0x080317ae
 802be20:	0803181f 	.word	0x0803181f

0802be24 <__pow5mult>:
 802be24:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
 802be28:	4615      	mov	r5, r2
 802be2a:	f012 0203 	ands.w	r2, r2, #3
 802be2e:	4607      	mov	r7, r0
 802be30:	460e      	mov	r6, r1
 802be32:	d007      	beq.n	802be44 <__pow5mult+0x20>
 802be34:	4c25      	ldr	r4, [pc, #148]	@ (802becc <__pow5mult+0xa8>)
 802be36:	3a01      	subs	r2, #1
 802be38:	2300      	movs	r3, #0
 802be3a:	f854 2022 	ldr.w	r2, [r4, r2, lsl #2]
 802be3e:	f7ff fe55 	bl	802baec <__multadd>
 802be42:	4606      	mov	r6, r0
 802be44:	10ad      	asrs	r5, r5, #2
 802be46:	d03d      	beq.n	802bec4 <__pow5mult+0xa0>
 802be48:	69fc      	ldr	r4, [r7, #28]
 802be4a:	b97c      	cbnz	r4, 802be6c <__pow5mult+0x48>
 802be4c:	2010      	movs	r0, #16
 802be4e:	f7fc fdcd 	bl	80289ec <malloc>
 802be52:	4602      	mov	r2, r0
 802be54:	61f8      	str	r0, [r7, #28]
 802be56:	b928      	cbnz	r0, 802be64 <__pow5mult+0x40>
 802be58:	4b1d      	ldr	r3, [pc, #116]	@ (802bed0 <__pow5mult+0xac>)
 802be5a:	481e      	ldr	r0, [pc, #120]	@ (802bed4 <__pow5mult+0xb0>)
 802be5c:	f240 11b3 	movw	r1, #435	@ 0x1b3
 802be60:	f7fe fc4e 	bl	802a700 <__assert_func>
 802be64:	e9c0 4401 	strd	r4, r4, [r0, #4]
 802be68:	6004      	str	r4, [r0, #0]
 802be6a:	60c4      	str	r4, [r0, #12]
 802be6c:	f8d7 801c 	ldr.w	r8, [r7, #28]
 802be70:	f8d8 4008 	ldr.w	r4, [r8, #8]
 802be74:	b94c      	cbnz	r4, 802be8a <__pow5mult+0x66>
 802be76:	f240 2171 	movw	r1, #625	@ 0x271
 802be7a:	4638      	mov	r0, r7
 802be7c:	f7ff ff12 	bl	802bca4 <__i2b>
 802be80:	2300      	movs	r3, #0
 802be82:	f8c8 0008 	str.w	r0, [r8, #8]
 802be86:	4604      	mov	r4, r0
 802be88:	6003      	str	r3, [r0, #0]
 802be8a:	f04f 0900 	mov.w	r9, #0
 802be8e:	07eb      	lsls	r3, r5, #31
 802be90:	d50a      	bpl.n	802bea8 <__pow5mult+0x84>
 802be92:	4631      	mov	r1, r6
 802be94:	4622      	mov	r2, r4
 802be96:	4638      	mov	r0, r7
 802be98:	f7ff ff1a 	bl	802bcd0 <__multiply>
 802be9c:	4631      	mov	r1, r6
 802be9e:	4680      	mov	r8, r0
 802bea0:	4638      	mov	r0, r7
 802bea2:	f7ff fe01 	bl	802baa8 <_Bfree>
 802bea6:	4646      	mov	r6, r8
 802bea8:	106d      	asrs	r5, r5, #1
 802beaa:	d00b      	beq.n	802bec4 <__pow5mult+0xa0>
 802beac:	6820      	ldr	r0, [r4, #0]
 802beae:	b938      	cbnz	r0, 802bec0 <__pow5mult+0x9c>
 802beb0:	4622      	mov	r2, r4
 802beb2:	4621      	mov	r1, r4
 802beb4:	4638      	mov	r0, r7
 802beb6:	f7ff ff0b 	bl	802bcd0 <__multiply>
 802beba:	6020      	str	r0, [r4, #0]
 802bebc:	f8c0 9000 	str.w	r9, [r0]
 802bec0:	4604      	mov	r4, r0
 802bec2:	e7e4      	b.n	802be8e <__pow5mult+0x6a>
 802bec4:	4630      	mov	r0, r6
 802bec6:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
 802beca:	bf00      	nop
 802becc:	08031878 	.word	0x08031878
 802bed0:	0803150a 	.word	0x0803150a
 802bed4:	0803181f 	.word	0x0803181f

0802bed8 <__lshift>:
 802bed8:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
 802bedc:	460c      	mov	r4, r1
 802bede:	6849      	ldr	r1, [r1, #4]
 802bee0:	6923      	ldr	r3, [r4, #16]
 802bee2:	eb03 1862 	add.w	r8, r3, r2, asr #5
 802bee6:	68a3      	ldr	r3, [r4, #8]
 802bee8:	4607      	mov	r7, r0
 802beea:	4691      	mov	r9, r2
 802beec:	ea4f 1a62 	mov.w	sl, r2, asr #5
 802bef0:	f108 0601 	add.w	r6, r8, #1
 802bef4:	42b3      	cmp	r3, r6
 802bef6:	db0b      	blt.n	802bf10 <__lshift+0x38>
 802bef8:	4638      	mov	r0, r7
 802befa:	f7ff fd95 	bl	802ba28 <_Balloc>
 802befe:	4605      	mov	r5, r0
 802bf00:	b948      	cbnz	r0, 802bf16 <__lshift+0x3e>
 802bf02:	4602      	mov	r2, r0
 802bf04:	4b28      	ldr	r3, [pc, #160]	@ (802bfa8 <__lshift+0xd0>)
 802bf06:	4829      	ldr	r0, [pc, #164]	@ (802bfac <__lshift+0xd4>)
 802bf08:	f44f 71ef 	mov.w	r1, #478	@ 0x1de
 802bf0c:	f7fe fbf8 	bl	802a700 <__assert_func>
 802bf10:	3101      	adds	r1, #1
 802bf12:	005b      	lsls	r3, r3, #1
 802bf14:	e7ee      	b.n	802bef4 <__lshift+0x1c>
 802bf16:	2300      	movs	r3, #0
 802bf18:	f100 0114 	add.w	r1, r0, #20
 802bf1c:	f100 0210 	add.w	r2, r0, #16
 802bf20:	4618      	mov	r0, r3
 802bf22:	4553      	cmp	r3, sl
 802bf24:	db33      	blt.n	802bf8e <__lshift+0xb6>
 802bf26:	6920      	ldr	r0, [r4, #16]
 802bf28:	ea2a 7aea 	bic.w	sl, sl, sl, asr #31
 802bf2c:	f104 0314 	add.w	r3, r4, #20
 802bf30:	f019 091f 	ands.w	r9, r9, #31
 802bf34:	eb01 018a 	add.w	r1, r1, sl, lsl #2
 802bf38:	eb03 0c80 	add.w	ip, r3, r0, lsl #2
 802bf3c:	d02b      	beq.n	802bf96 <__lshift+0xbe>
 802bf3e:	f1c9 0e20 	rsb	lr, r9, #32
 802bf42:	468a      	mov	sl, r1
 802bf44:	2200      	movs	r2, #0
 802bf46:	6818      	ldr	r0, [r3, #0]
 802bf48:	fa00 f009 	lsl.w	r0, r0, r9
 802bf4c:	4310      	orrs	r0, r2
 802bf4e:	f84a 0b04 	str.w	r0, [sl], #4
 802bf52:	f853 2b04 	ldr.w	r2, [r3], #4
 802bf56:	459c      	cmp	ip, r3
 802bf58:	fa22 f20e 	lsr.w	r2, r2, lr
 802bf5c:	d8f3      	bhi.n	802bf46 <__lshift+0x6e>
 802bf5e:	ebac 0304 	sub.w	r3, ip, r4
 802bf62:	3b15      	subs	r3, #21
 802bf64:	f023 0303 	bic.w	r3, r3, #3
 802bf68:	3304      	adds	r3, #4
 802bf6a:	f104 0015 	add.w	r0, r4, #21
 802bf6e:	4584      	cmp	ip, r0
 802bf70:	bf38      	it	cc
 802bf72:	2304      	movcc	r3, #4
 802bf74:	50ca      	str	r2, [r1, r3]
 802bf76:	b10a      	cbz	r2, 802bf7c <__lshift+0xa4>
 802bf78:	f108 0602 	add.w	r6, r8, #2
 802bf7c:	3e01      	subs	r6, #1
 802bf7e:	4638      	mov	r0, r7
 802bf80:	612e      	str	r6, [r5, #16]
 802bf82:	4621      	mov	r1, r4
 802bf84:	f7ff fd90 	bl	802baa8 <_Bfree>
 802bf88:	4628      	mov	r0, r5
 802bf8a:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 802bf8e:	f842 0f04 	str.w	r0, [r2, #4]!
 802bf92:	3301      	adds	r3, #1
 802bf94:	e7c5      	b.n	802bf22 <__lshift+0x4a>
 802bf96:	3904      	subs	r1, #4
 802bf98:	f853 2b04 	ldr.w	r2, [r3], #4
 802bf9c:	f841 2f04 	str.w	r2, [r1, #4]!
 802bfa0:	459c      	cmp	ip, r3
 802bfa2:	d8f9      	bhi.n	802bf98 <__lshift+0xc0>
 802bfa4:	e7ea      	b.n	802bf7c <__lshift+0xa4>
 802bfa6:	bf00      	nop
 802bfa8:	080317ae 	.word	0x080317ae
 802bfac:	0803181f 	.word	0x0803181f

0802bfb0 <__mcmp>:
 802bfb0:	690a      	ldr	r2, [r1, #16]
 802bfb2:	4603      	mov	r3, r0
 802bfb4:	6900      	ldr	r0, [r0, #16]
 802bfb6:	1a80      	subs	r0, r0, r2
 802bfb8:	b530      	push	{r4, r5, lr}
 802bfba:	d10e      	bne.n	802bfda <__mcmp+0x2a>
 802bfbc:	3314      	adds	r3, #20
 802bfbe:	3114      	adds	r1, #20
 802bfc0:	eb03 0482 	add.w	r4, r3, r2, lsl #2
 802bfc4:	eb01 0182 	add.w	r1, r1, r2, lsl #2
 802bfc8:	f854 5d04 	ldr.w	r5, [r4, #-4]!
 802bfcc:	f851 2d04 	ldr.w	r2, [r1, #-4]!
 802bfd0:	4295      	cmp	r5, r2
 802bfd2:	d003      	beq.n	802bfdc <__mcmp+0x2c>
 802bfd4:	d205      	bcs.n	802bfe2 <__mcmp+0x32>
 802bfd6:	f04f 30ff 	mov.w	r0, #4294967295	@ 0xffffffff
 802bfda:	bd30      	pop	{r4, r5, pc}
 802bfdc:	42a3      	cmp	r3, r4
 802bfde:	d3f3      	bcc.n	802bfc8 <__mcmp+0x18>
 802bfe0:	e7fb      	b.n	802bfda <__mcmp+0x2a>
 802bfe2:	2001      	movs	r0, #1
 802bfe4:	e7f9      	b.n	802bfda <__mcmp+0x2a>
	...

0802bfe8 <__mdiff>:
 802bfe8:	e92d 4ff7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
 802bfec:	4689      	mov	r9, r1
 802bfee:	4606      	mov	r6, r0
 802bff0:	4611      	mov	r1, r2
 802bff2:	4648      	mov	r0, r9
 802bff4:	4614      	mov	r4, r2
 802bff6:	f7ff ffdb 	bl	802bfb0 <__mcmp>
 802bffa:	1e05      	subs	r5, r0, #0
 802bffc:	d112      	bne.n	802c024 <__mdiff+0x3c>
 802bffe:	4629      	mov	r1, r5
 802c000:	4630      	mov	r0, r6
 802c002:	f7ff fd11 	bl	802ba28 <_Balloc>
 802c006:	4602      	mov	r2, r0
 802c008:	b928      	cbnz	r0, 802c016 <__mdiff+0x2e>
 802c00a:	4b3f      	ldr	r3, [pc, #252]	@ (802c108 <__mdiff+0x120>)
 802c00c:	f240 2137 	movw	r1, #567	@ 0x237
 802c010:	483e      	ldr	r0, [pc, #248]	@ (802c10c <__mdiff+0x124>)
 802c012:	f7fe fb75 	bl	802a700 <__assert_func>
 802c016:	2301      	movs	r3, #1
 802c018:	e9c0 3504 	strd	r3, r5, [r0, #16]
 802c01c:	4610      	mov	r0, r2
 802c01e:	b003      	add	sp, #12
 802c020:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 802c024:	bfbc      	itt	lt
 802c026:	464b      	movlt	r3, r9
 802c028:	46a1      	movlt	r9, r4
 802c02a:	4630      	mov	r0, r6
 802c02c:	f8d9 1004 	ldr.w	r1, [r9, #4]
 802c030:	bfba      	itte	lt
 802c032:	461c      	movlt	r4, r3
 802c034:	2501      	movlt	r5, #1
 802c036:	2500      	movge	r5, #0
 802c038:	f7ff fcf6 	bl	802ba28 <_Balloc>
 802c03c:	4602      	mov	r2, r0
 802c03e:	b918      	cbnz	r0, 802c048 <__mdiff+0x60>
 802c040:	4b31      	ldr	r3, [pc, #196]	@ (802c108 <__mdiff+0x120>)
 802c042:	f240 2145 	movw	r1, #581	@ 0x245
 802c046:	e7e3      	b.n	802c010 <__mdiff+0x28>
 802c048:	f8d9 7010 	ldr.w	r7, [r9, #16]
 802c04c:	6926      	ldr	r6, [r4, #16]
 802c04e:	60c5      	str	r5, [r0, #12]
 802c050:	f109 0310 	add.w	r3, r9, #16
 802c054:	f109 0514 	add.w	r5, r9, #20
 802c058:	f104 0e14 	add.w	lr, r4, #20
 802c05c:	f100 0b14 	add.w	fp, r0, #20
 802c060:	eb05 0887 	add.w	r8, r5, r7, lsl #2
 802c064:	eb0e 0686 	add.w	r6, lr, r6, lsl #2
 802c068:	9301      	str	r3, [sp, #4]
 802c06a:	46d9      	mov	r9, fp
 802c06c:	f04f 0c00 	mov.w	ip, #0
 802c070:	9b01      	ldr	r3, [sp, #4]
 802c072:	f85e 0b04 	ldr.w	r0, [lr], #4
 802c076:	f853 af04 	ldr.w	sl, [r3, #4]!
 802c07a:	9301      	str	r3, [sp, #4]
 802c07c:	fa1f f38a 	uxth.w	r3, sl
 802c080:	4619      	mov	r1, r3
 802c082:	b283      	uxth	r3, r0
 802c084:	1acb      	subs	r3, r1, r3
 802c086:	0c00      	lsrs	r0, r0, #16
 802c088:	4463      	add	r3, ip
 802c08a:	ebc0 401a 	rsb	r0, r0, sl, lsr #16
 802c08e:	eb00 4023 	add.w	r0, r0, r3, asr #16
 802c092:	b29b      	uxth	r3, r3
 802c094:	ea43 4300 	orr.w	r3, r3, r0, lsl #16
 802c098:	4576      	cmp	r6, lr
 802c09a:	f849 3b04 	str.w	r3, [r9], #4
 802c09e:	ea4f 4c20 	mov.w	ip, r0, asr #16
 802c0a2:	d8e5      	bhi.n	802c070 <__mdiff+0x88>
 802c0a4:	1b33      	subs	r3, r6, r4
 802c0a6:	3b15      	subs	r3, #21
 802c0a8:	f023 0303 	bic.w	r3, r3, #3
 802c0ac:	3415      	adds	r4, #21
 802c0ae:	3304      	adds	r3, #4
 802c0b0:	42a6      	cmp	r6, r4
 802c0b2:	bf38      	it	cc
 802c0b4:	2304      	movcc	r3, #4
 802c0b6:	441d      	add	r5, r3
 802c0b8:	445b      	add	r3, fp
 802c0ba:	461e      	mov	r6, r3
 802c0bc:	462c      	mov	r4, r5
 802c0be:	4544      	cmp	r4, r8
 802c0c0:	d30e      	bcc.n	802c0e0 <__mdiff+0xf8>
 802c0c2:	f108 0103 	add.w	r1, r8, #3
 802c0c6:	1b49      	subs	r1, r1, r5
 802c0c8:	f021 0103 	bic.w	r1, r1, #3
 802c0cc:	3d03      	subs	r5, #3
 802c0ce:	45a8      	cmp	r8, r5
 802c0d0:	bf38      	it	cc
 802c0d2:	2100      	movcc	r1, #0
 802c0d4:	440b      	add	r3, r1
 802c0d6:	f853 1d04 	ldr.w	r1, [r3, #-4]!
 802c0da:	b191      	cbz	r1, 802c102 <__mdiff+0x11a>
 802c0dc:	6117      	str	r7, [r2, #16]
 802c0de:	e79d      	b.n	802c01c <__mdiff+0x34>
 802c0e0:	f854 1b04 	ldr.w	r1, [r4], #4
 802c0e4:	46e6      	mov	lr, ip
 802c0e6:	0c08      	lsrs	r0, r1, #16
 802c0e8:	fa1c fc81 	uxtah	ip, ip, r1
 802c0ec:	4471      	add	r1, lr
 802c0ee:	eb00 402c 	add.w	r0, r0, ip, asr #16
 802c0f2:	b289      	uxth	r1, r1
 802c0f4:	ea41 4100 	orr.w	r1, r1, r0, lsl #16
 802c0f8:	f846 1b04 	str.w	r1, [r6], #4
 802c0fc:	ea4f 4c20 	mov.w	ip, r0, asr #16
 802c100:	e7dd      	b.n	802c0be <__mdiff+0xd6>
 802c102:	3f01      	subs	r7, #1
 802c104:	e7e7      	b.n	802c0d6 <__mdiff+0xee>
 802c106:	bf00      	nop
 802c108:	080317ae 	.word	0x080317ae
 802c10c:	0803181f 	.word	0x0803181f

0802c110 <__ulp>:
 802c110:	b082      	sub	sp, #8
 802c112:	ed8d 0b00 	vstr	d0, [sp]
 802c116:	9a01      	ldr	r2, [sp, #4]
 802c118:	4b0f      	ldr	r3, [pc, #60]	@ (802c158 <__ulp+0x48>)
 802c11a:	4013      	ands	r3, r2
 802c11c:	f1a3 7350 	sub.w	r3, r3, #54525952	@ 0x3400000
 802c120:	2b00      	cmp	r3, #0
 802c122:	dc08      	bgt.n	802c136 <__ulp+0x26>
 802c124:	425b      	negs	r3, r3
 802c126:	f1b3 7fa0 	cmp.w	r3, #20971520	@ 0x1400000
 802c12a:	ea4f 5223 	mov.w	r2, r3, asr #20
 802c12e:	da04      	bge.n	802c13a <__ulp+0x2a>
 802c130:	f44f 2300 	mov.w	r3, #524288	@ 0x80000
 802c134:	4113      	asrs	r3, r2
 802c136:	2200      	movs	r2, #0
 802c138:	e008      	b.n	802c14c <__ulp+0x3c>
 802c13a:	f1a2 0314 	sub.w	r3, r2, #20
 802c13e:	2b1e      	cmp	r3, #30
 802c140:	bfda      	itte	le
 802c142:	f04f 4200 	movle.w	r2, #2147483648	@ 0x80000000
 802c146:	40da      	lsrle	r2, r3
 802c148:	2201      	movgt	r2, #1
 802c14a:	2300      	movs	r3, #0
 802c14c:	4619      	mov	r1, r3
 802c14e:	4610      	mov	r0, r2
 802c150:	ec41 0b10 	vmov	d0, r0, r1
 802c154:	b002      	add	sp, #8
 802c156:	4770      	bx	lr
 802c158:	7ff00000 	.word	0x7ff00000

0802c15c <__b2d>:
 802c15c:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
 802c160:	6906      	ldr	r6, [r0, #16]
 802c162:	f100 0814 	add.w	r8, r0, #20
 802c166:	eb08 0686 	add.w	r6, r8, r6, lsl #2
 802c16a:	1f37      	subs	r7, r6, #4
 802c16c:	f856 2c04 	ldr.w	r2, [r6, #-4]
 802c170:	4610      	mov	r0, r2
 802c172:	f7ff fd4b 	bl	802bc0c <__hi0bits>
 802c176:	f1c0 0320 	rsb	r3, r0, #32
 802c17a:	280a      	cmp	r0, #10
 802c17c:	600b      	str	r3, [r1, #0]
 802c17e:	491b      	ldr	r1, [pc, #108]	@ (802c1ec <__b2d+0x90>)
 802c180:	dc15      	bgt.n	802c1ae <__b2d+0x52>
 802c182:	f1c0 0c0b 	rsb	ip, r0, #11
 802c186:	fa22 f30c 	lsr.w	r3, r2, ip
 802c18a:	45b8      	cmp	r8, r7
 802c18c:	ea43 0501 	orr.w	r5, r3, r1
 802c190:	bf34      	ite	cc
 802c192:	f856 3c08 	ldrcc.w	r3, [r6, #-8]
 802c196:	2300      	movcs	r3, #0
 802c198:	3015      	adds	r0, #21
 802c19a:	fa02 f000 	lsl.w	r0, r2, r0
 802c19e:	fa23 f30c 	lsr.w	r3, r3, ip
 802c1a2:	4303      	orrs	r3, r0
 802c1a4:	461c      	mov	r4, r3
 802c1a6:	ec45 4b10 	vmov	d0, r4, r5
 802c1aa:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 802c1ae:	45b8      	cmp	r8, r7
 802c1b0:	bf3a      	itte	cc
 802c1b2:	f856 3c08 	ldrcc.w	r3, [r6, #-8]
 802c1b6:	f1a6 0708 	subcc.w	r7, r6, #8
 802c1ba:	2300      	movcs	r3, #0
 802c1bc:	380b      	subs	r0, #11
 802c1be:	d012      	beq.n	802c1e6 <__b2d+0x8a>
 802c1c0:	f1c0 0120 	rsb	r1, r0, #32
 802c1c4:	fa23 f401 	lsr.w	r4, r3, r1
 802c1c8:	4082      	lsls	r2, r0
 802c1ca:	4322      	orrs	r2, r4
 802c1cc:	4547      	cmp	r7, r8
 802c1ce:	f042 557f 	orr.w	r5, r2, #1069547520	@ 0x3fc00000
 802c1d2:	bf8c      	ite	hi
 802c1d4:	f857 2c04 	ldrhi.w	r2, [r7, #-4]
 802c1d8:	2200      	movls	r2, #0
 802c1da:	4083      	lsls	r3, r0
 802c1dc:	40ca      	lsrs	r2, r1
 802c1de:	f445 1540 	orr.w	r5, r5, #3145728	@ 0x300000
 802c1e2:	4313      	orrs	r3, r2
 802c1e4:	e7de      	b.n	802c1a4 <__b2d+0x48>
 802c1e6:	ea42 0501 	orr.w	r5, r2, r1
 802c1ea:	e7db      	b.n	802c1a4 <__b2d+0x48>
 802c1ec:	3ff00000 	.word	0x3ff00000

0802c1f0 <__d2b>:
 802c1f0:	e92d 43f7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr}
 802c1f4:	460f      	mov	r7, r1
 802c1f6:	2101      	movs	r1, #1
 802c1f8:	ec59 8b10 	vmov	r8, r9, d0
 802c1fc:	4616      	mov	r6, r2
 802c1fe:	f7ff fc13 	bl	802ba28 <_Balloc>
 802c202:	4604      	mov	r4, r0
 802c204:	b930      	cbnz	r0, 802c214 <__d2b+0x24>
 802c206:	4602      	mov	r2, r0
 802c208:	4b23      	ldr	r3, [pc, #140]	@ (802c298 <__d2b+0xa8>)
 802c20a:	4824      	ldr	r0, [pc, #144]	@ (802c29c <__d2b+0xac>)
 802c20c:	f240 310f 	movw	r1, #783	@ 0x30f
 802c210:	f7fe fa76 	bl	802a700 <__assert_func>
 802c214:	f3c9 550a 	ubfx	r5, r9, #20, #11
 802c218:	f3c9 0313 	ubfx	r3, r9, #0, #20
 802c21c:	b10d      	cbz	r5, 802c222 <__d2b+0x32>
 802c21e:	f443 1380 	orr.w	r3, r3, #1048576	@ 0x100000
 802c222:	9301      	str	r3, [sp, #4]
 802c224:	f1b8 0300 	subs.w	r3, r8, #0
 802c228:	d023      	beq.n	802c272 <__d2b+0x82>
 802c22a:	4668      	mov	r0, sp
 802c22c:	9300      	str	r3, [sp, #0]
 802c22e:	f7ff fd0c 	bl	802bc4a <__lo0bits>
 802c232:	e9dd 1200 	ldrd	r1, r2, [sp]
 802c236:	b1d0      	cbz	r0, 802c26e <__d2b+0x7e>
 802c238:	f1c0 0320 	rsb	r3, r0, #32
 802c23c:	fa02 f303 	lsl.w	r3, r2, r3
 802c240:	430b      	orrs	r3, r1
 802c242:	40c2      	lsrs	r2, r0
 802c244:	6163      	str	r3, [r4, #20]
 802c246:	9201      	str	r2, [sp, #4]
 802c248:	9b01      	ldr	r3, [sp, #4]
 802c24a:	61a3      	str	r3, [r4, #24]
 802c24c:	2b00      	cmp	r3, #0
 802c24e:	bf0c      	ite	eq
 802c250:	2201      	moveq	r2, #1
 802c252:	2202      	movne	r2, #2
 802c254:	6122      	str	r2, [r4, #16]
 802c256:	b1a5      	cbz	r5, 802c282 <__d2b+0x92>
 802c258:	f2a5 4533 	subw	r5, r5, #1075	@ 0x433
 802c25c:	4405      	add	r5, r0
 802c25e:	603d      	str	r5, [r7, #0]
 802c260:	f1c0 0035 	rsb	r0, r0, #53	@ 0x35
 802c264:	6030      	str	r0, [r6, #0]
 802c266:	4620      	mov	r0, r4
 802c268:	b003      	add	sp, #12
 802c26a:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
 802c26e:	6161      	str	r1, [r4, #20]
 802c270:	e7ea      	b.n	802c248 <__d2b+0x58>
 802c272:	a801      	add	r0, sp, #4
 802c274:	f7ff fce9 	bl	802bc4a <__lo0bits>
 802c278:	9b01      	ldr	r3, [sp, #4]
 802c27a:	6163      	str	r3, [r4, #20]
 802c27c:	3020      	adds	r0, #32
 802c27e:	2201      	movs	r2, #1
 802c280:	e7e8      	b.n	802c254 <__d2b+0x64>
 802c282:	eb04 0382 	add.w	r3, r4, r2, lsl #2
 802c286:	f2a0 4032 	subw	r0, r0, #1074	@ 0x432
 802c28a:	6038      	str	r0, [r7, #0]
 802c28c:	6918      	ldr	r0, [r3, #16]
 802c28e:	f7ff fcbd 	bl	802bc0c <__hi0bits>
 802c292:	ebc0 1042 	rsb	r0, r0, r2, lsl #5
 802c296:	e7e5      	b.n	802c264 <__d2b+0x74>
 802c298:	080317ae 	.word	0x080317ae
 802c29c:	0803181f 	.word	0x0803181f

0802c2a0 <__ratio>:
 802c2a0:	e92d 4ff7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
 802c2a4:	4688      	mov	r8, r1
 802c2a6:	4669      	mov	r1, sp
 802c2a8:	4681      	mov	r9, r0
 802c2aa:	f7ff ff57 	bl	802c15c <__b2d>
 802c2ae:	a901      	add	r1, sp, #4
 802c2b0:	4640      	mov	r0, r8
 802c2b2:	ec55 4b10 	vmov	r4, r5, d0
 802c2b6:	f7ff ff51 	bl	802c15c <__b2d>
 802c2ba:	f8d8 3010 	ldr.w	r3, [r8, #16]
 802c2be:	f8d9 2010 	ldr.w	r2, [r9, #16]
 802c2c2:	1ad2      	subs	r2, r2, r3
 802c2c4:	e9dd 3100 	ldrd	r3, r1, [sp]
 802c2c8:	1a5b      	subs	r3, r3, r1
 802c2ca:	eb03 1342 	add.w	r3, r3, r2, lsl #5
 802c2ce:	ec57 6b10 	vmov	r6, r7, d0
 802c2d2:	2b00      	cmp	r3, #0
 802c2d4:	bfd6      	itet	le
 802c2d6:	ebc3 3303 	rsble	r3, r3, r3, lsl #12
 802c2da:	462a      	movgt	r2, r5
 802c2dc:	463a      	movle	r2, r7
 802c2de:	46ab      	mov	fp, r5
 802c2e0:	46a2      	mov	sl, r4
 802c2e2:	bfce      	itee	gt
 802c2e4:	eb02 5b03 	addgt.w	fp, r2, r3, lsl #20
 802c2e8:	eb02 5303 	addle.w	r3, r2, r3, lsl #20
 802c2ec:	ee00 3a90 	vmovle	s1, r3
 802c2f0:	ec4b ab17 	vmov	d7, sl, fp
 802c2f4:	ee87 0b00 	vdiv.f64	d0, d7, d0
 802c2f8:	b003      	add	sp, #12
 802c2fa:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}

0802c2fe <__copybits>:
 802c2fe:	3901      	subs	r1, #1
 802c300:	b570      	push	{r4, r5, r6, lr}
 802c302:	1149      	asrs	r1, r1, #5
 802c304:	6914      	ldr	r4, [r2, #16]
 802c306:	3101      	adds	r1, #1
 802c308:	f102 0314 	add.w	r3, r2, #20
 802c30c:	eb00 0181 	add.w	r1, r0, r1, lsl #2
 802c310:	eb03 0484 	add.w	r4, r3, r4, lsl #2
 802c314:	1f05      	subs	r5, r0, #4
 802c316:	42a3      	cmp	r3, r4
 802c318:	d30c      	bcc.n	802c334 <__copybits+0x36>
 802c31a:	1aa3      	subs	r3, r4, r2
 802c31c:	3b11      	subs	r3, #17
 802c31e:	f023 0303 	bic.w	r3, r3, #3
 802c322:	3211      	adds	r2, #17
 802c324:	42a2      	cmp	r2, r4
 802c326:	bf88      	it	hi
 802c328:	2300      	movhi	r3, #0
 802c32a:	4418      	add	r0, r3
 802c32c:	2300      	movs	r3, #0
 802c32e:	4288      	cmp	r0, r1
 802c330:	d305      	bcc.n	802c33e <__copybits+0x40>
 802c332:	bd70      	pop	{r4, r5, r6, pc}
 802c334:	f853 6b04 	ldr.w	r6, [r3], #4
 802c338:	f845 6f04 	str.w	r6, [r5, #4]!
 802c33c:	e7eb      	b.n	802c316 <__copybits+0x18>
 802c33e:	f840 3b04 	str.w	r3, [r0], #4
 802c342:	e7f4      	b.n	802c32e <__copybits+0x30>

0802c344 <__any_on>:
 802c344:	f100 0214 	add.w	r2, r0, #20
 802c348:	6900      	ldr	r0, [r0, #16]
 802c34a:	114b      	asrs	r3, r1, #5
 802c34c:	4298      	cmp	r0, r3
 802c34e:	b510      	push	{r4, lr}
 802c350:	db11      	blt.n	802c376 <__any_on+0x32>
 802c352:	dd0a      	ble.n	802c36a <__any_on+0x26>
 802c354:	f011 011f 	ands.w	r1, r1, #31
 802c358:	d007      	beq.n	802c36a <__any_on+0x26>
 802c35a:	f852 4023 	ldr.w	r4, [r2, r3, lsl #2]
 802c35e:	fa24 f001 	lsr.w	r0, r4, r1
 802c362:	fa00 f101 	lsl.w	r1, r0, r1
 802c366:	428c      	cmp	r4, r1
 802c368:	d10b      	bne.n	802c382 <__any_on+0x3e>
 802c36a:	eb02 0383 	add.w	r3, r2, r3, lsl #2
 802c36e:	4293      	cmp	r3, r2
 802c370:	d803      	bhi.n	802c37a <__any_on+0x36>
 802c372:	2000      	movs	r0, #0
 802c374:	bd10      	pop	{r4, pc}
 802c376:	4603      	mov	r3, r0
 802c378:	e7f7      	b.n	802c36a <__any_on+0x26>
 802c37a:	f853 1d04 	ldr.w	r1, [r3, #-4]!
 802c37e:	2900      	cmp	r1, #0
 802c380:	d0f5      	beq.n	802c36e <__any_on+0x2a>
 802c382:	2001      	movs	r0, #1
 802c384:	e7f6      	b.n	802c374 <__any_on+0x30>

0802c386 <_malloc_usable_size_r>:
 802c386:	f851 3c04 	ldr.w	r3, [r1, #-4]
 802c38a:	1f18      	subs	r0, r3, #4
 802c38c:	2b00      	cmp	r3, #0
 802c38e:	bfbc      	itt	lt
 802c390:	580b      	ldrlt	r3, [r1, r0]
 802c392:	18c0      	addlt	r0, r0, r3
 802c394:	4770      	bx	lr

0802c396 <__ascii_wctomb>:
 802c396:	4603      	mov	r3, r0
 802c398:	4608      	mov	r0, r1
 802c39a:	b141      	cbz	r1, 802c3ae <__ascii_wctomb+0x18>
 802c39c:	2aff      	cmp	r2, #255	@ 0xff
 802c39e:	d904      	bls.n	802c3aa <__ascii_wctomb+0x14>
 802c3a0:	228a      	movs	r2, #138	@ 0x8a
 802c3a2:	601a      	str	r2, [r3, #0]
 802c3a4:	f04f 30ff 	mov.w	r0, #4294967295	@ 0xffffffff
 802c3a8:	4770      	bx	lr
 802c3aa:	700a      	strb	r2, [r1, #0]
 802c3ac:	2001      	movs	r0, #1
 802c3ae:	4770      	bx	lr

0802c3b0 <__ssputs_r>:
 802c3b0:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
 802c3b4:	688e      	ldr	r6, [r1, #8]
 802c3b6:	461f      	mov	r7, r3
 802c3b8:	42be      	cmp	r6, r7
 802c3ba:	680b      	ldr	r3, [r1, #0]
 802c3bc:	4682      	mov	sl, r0
 802c3be:	460c      	mov	r4, r1
 802c3c0:	4690      	mov	r8, r2
 802c3c2:	d82d      	bhi.n	802c420 <__ssputs_r+0x70>
 802c3c4:	f9b1 200c 	ldrsh.w	r2, [r1, #12]
 802c3c8:	f412 6f90 	tst.w	r2, #1152	@ 0x480
 802c3cc:	d026      	beq.n	802c41c <__ssputs_r+0x6c>
 802c3ce:	6965      	ldr	r5, [r4, #20]
 802c3d0:	6909      	ldr	r1, [r1, #16]
 802c3d2:	eb05 0545 	add.w	r5, r5, r5, lsl #1
 802c3d6:	eba3 0901 	sub.w	r9, r3, r1
 802c3da:	eb05 75d5 	add.w	r5, r5, r5, lsr #31
 802c3de:	1c7b      	adds	r3, r7, #1
 802c3e0:	444b      	add	r3, r9
 802c3e2:	106d      	asrs	r5, r5, #1
 802c3e4:	429d      	cmp	r5, r3
 802c3e6:	bf38      	it	cc
 802c3e8:	461d      	movcc	r5, r3
 802c3ea:	0553      	lsls	r3, r2, #21
 802c3ec:	d527      	bpl.n	802c43e <__ssputs_r+0x8e>
 802c3ee:	4629      	mov	r1, r5
 802c3f0:	f7fc fb2e 	bl	8028a50 <_malloc_r>
 802c3f4:	4606      	mov	r6, r0
 802c3f6:	b360      	cbz	r0, 802c452 <__ssputs_r+0xa2>
 802c3f8:	6921      	ldr	r1, [r4, #16]
 802c3fa:	464a      	mov	r2, r9
 802c3fc:	f7fe f967 	bl	802a6ce <memcpy>
 802c400:	89a3      	ldrh	r3, [r4, #12]
 802c402:	f423 6390 	bic.w	r3, r3, #1152	@ 0x480
 802c406:	f043 0380 	orr.w	r3, r3, #128	@ 0x80
 802c40a:	81a3      	strh	r3, [r4, #12]
 802c40c:	6126      	str	r6, [r4, #16]
 802c40e:	6165      	str	r5, [r4, #20]
 802c410:	444e      	add	r6, r9
 802c412:	eba5 0509 	sub.w	r5, r5, r9
 802c416:	6026      	str	r6, [r4, #0]
 802c418:	60a5      	str	r5, [r4, #8]
 802c41a:	463e      	mov	r6, r7
 802c41c:	42be      	cmp	r6, r7
 802c41e:	d900      	bls.n	802c422 <__ssputs_r+0x72>
 802c420:	463e      	mov	r6, r7
 802c422:	6820      	ldr	r0, [r4, #0]
 802c424:	4632      	mov	r2, r6
 802c426:	4641      	mov	r1, r8
 802c428:	f7fe f840 	bl	802a4ac <memmove>
 802c42c:	68a3      	ldr	r3, [r4, #8]
 802c42e:	1b9b      	subs	r3, r3, r6
 802c430:	60a3      	str	r3, [r4, #8]
 802c432:	6823      	ldr	r3, [r4, #0]
 802c434:	4433      	add	r3, r6
 802c436:	6023      	str	r3, [r4, #0]
 802c438:	2000      	movs	r0, #0
 802c43a:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 802c43e:	462a      	mov	r2, r5
 802c440:	f7fc fbd8 	bl	8028bf4 <_realloc_r>
 802c444:	4606      	mov	r6, r0
 802c446:	2800      	cmp	r0, #0
 802c448:	d1e0      	bne.n	802c40c <__ssputs_r+0x5c>
 802c44a:	6921      	ldr	r1, [r4, #16]
 802c44c:	4650      	mov	r0, sl
 802c44e:	f7fe ff55 	bl	802b2fc <_free_r>
 802c452:	230c      	movs	r3, #12
 802c454:	f8ca 3000 	str.w	r3, [sl]
 802c458:	89a3      	ldrh	r3, [r4, #12]
 802c45a:	f043 0340 	orr.w	r3, r3, #64	@ 0x40
 802c45e:	81a3      	strh	r3, [r4, #12]
 802c460:	f04f 30ff 	mov.w	r0, #4294967295	@ 0xffffffff
 802c464:	e7e9      	b.n	802c43a <__ssputs_r+0x8a>
	...

0802c468 <_svfiprintf_r>:
 802c468:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 802c46c:	4698      	mov	r8, r3
 802c46e:	898b      	ldrh	r3, [r1, #12]
 802c470:	061b      	lsls	r3, r3, #24
 802c472:	b09d      	sub	sp, #116	@ 0x74
 802c474:	4607      	mov	r7, r0
 802c476:	460d      	mov	r5, r1
 802c478:	4614      	mov	r4, r2
 802c47a:	d510      	bpl.n	802c49e <_svfiprintf_r+0x36>
 802c47c:	690b      	ldr	r3, [r1, #16]
 802c47e:	b973      	cbnz	r3, 802c49e <_svfiprintf_r+0x36>
 802c480:	2140      	movs	r1, #64	@ 0x40
 802c482:	f7fc fae5 	bl	8028a50 <_malloc_r>
 802c486:	6028      	str	r0, [r5, #0]
 802c488:	6128      	str	r0, [r5, #16]
 802c48a:	b930      	cbnz	r0, 802c49a <_svfiprintf_r+0x32>
 802c48c:	230c      	movs	r3, #12
 802c48e:	603b      	str	r3, [r7, #0]
 802c490:	f04f 30ff 	mov.w	r0, #4294967295	@ 0xffffffff
 802c494:	b01d      	add	sp, #116	@ 0x74
 802c496:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 802c49a:	2340      	movs	r3, #64	@ 0x40
 802c49c:	616b      	str	r3, [r5, #20]
 802c49e:	2300      	movs	r3, #0
 802c4a0:	9309      	str	r3, [sp, #36]	@ 0x24
 802c4a2:	2320      	movs	r3, #32
 802c4a4:	f88d 3029 	strb.w	r3, [sp, #41]	@ 0x29
 802c4a8:	f8cd 800c 	str.w	r8, [sp, #12]
 802c4ac:	2330      	movs	r3, #48	@ 0x30
 802c4ae:	f8df 819c 	ldr.w	r8, [pc, #412]	@ 802c64c <_svfiprintf_r+0x1e4>
 802c4b2:	f88d 302a 	strb.w	r3, [sp, #42]	@ 0x2a
 802c4b6:	f04f 0901 	mov.w	r9, #1
 802c4ba:	4623      	mov	r3, r4
 802c4bc:	469a      	mov	sl, r3
 802c4be:	f813 2b01 	ldrb.w	r2, [r3], #1
 802c4c2:	b10a      	cbz	r2, 802c4c8 <_svfiprintf_r+0x60>
 802c4c4:	2a25      	cmp	r2, #37	@ 0x25
 802c4c6:	d1f9      	bne.n	802c4bc <_svfiprintf_r+0x54>
 802c4c8:	ebba 0b04 	subs.w	fp, sl, r4
 802c4cc:	d00b      	beq.n	802c4e6 <_svfiprintf_r+0x7e>
 802c4ce:	465b      	mov	r3, fp
 802c4d0:	4622      	mov	r2, r4
 802c4d2:	4629      	mov	r1, r5
 802c4d4:	4638      	mov	r0, r7
 802c4d6:	f7ff ff6b 	bl	802c3b0 <__ssputs_r>
 802c4da:	3001      	adds	r0, #1
 802c4dc:	f000 80a7 	beq.w	802c62e <_svfiprintf_r+0x1c6>
 802c4e0:	9a09      	ldr	r2, [sp, #36]	@ 0x24
 802c4e2:	445a      	add	r2, fp
 802c4e4:	9209      	str	r2, [sp, #36]	@ 0x24
 802c4e6:	f89a 3000 	ldrb.w	r3, [sl]
 802c4ea:	2b00      	cmp	r3, #0
 802c4ec:	f000 809f 	beq.w	802c62e <_svfiprintf_r+0x1c6>
 802c4f0:	2300      	movs	r3, #0
 802c4f2:	f04f 32ff 	mov.w	r2, #4294967295	@ 0xffffffff
 802c4f6:	e9cd 2305 	strd	r2, r3, [sp, #20]
 802c4fa:	f10a 0a01 	add.w	sl, sl, #1
 802c4fe:	9304      	str	r3, [sp, #16]
 802c500:	9307      	str	r3, [sp, #28]
 802c502:	f88d 3053 	strb.w	r3, [sp, #83]	@ 0x53
 802c506:	931a      	str	r3, [sp, #104]	@ 0x68
 802c508:	4654      	mov	r4, sl
 802c50a:	2205      	movs	r2, #5
 802c50c:	f814 1b01 	ldrb.w	r1, [r4], #1
 802c510:	484e      	ldr	r0, [pc, #312]	@ (802c64c <_svfiprintf_r+0x1e4>)
 802c512:	f7d3 fef5 	bl	8000300 <memchr>
 802c516:	9a04      	ldr	r2, [sp, #16]
 802c518:	b9d8      	cbnz	r0, 802c552 <_svfiprintf_r+0xea>
 802c51a:	06d0      	lsls	r0, r2, #27
 802c51c:	bf44      	itt	mi
 802c51e:	2320      	movmi	r3, #32
 802c520:	f88d 3053 	strbmi.w	r3, [sp, #83]	@ 0x53
 802c524:	0711      	lsls	r1, r2, #28
 802c526:	bf44      	itt	mi
 802c528:	232b      	movmi	r3, #43	@ 0x2b
 802c52a:	f88d 3053 	strbmi.w	r3, [sp, #83]	@ 0x53
 802c52e:	f89a 3000 	ldrb.w	r3, [sl]
 802c532:	2b2a      	cmp	r3, #42	@ 0x2a
 802c534:	d015      	beq.n	802c562 <_svfiprintf_r+0xfa>
 802c536:	9a07      	ldr	r2, [sp, #28]
 802c538:	4654      	mov	r4, sl
 802c53a:	2000      	movs	r0, #0
 802c53c:	f04f 0c0a 	mov.w	ip, #10
 802c540:	4621      	mov	r1, r4
 802c542:	f811 3b01 	ldrb.w	r3, [r1], #1
 802c546:	3b30      	subs	r3, #48	@ 0x30
 802c548:	2b09      	cmp	r3, #9
 802c54a:	d94b      	bls.n	802c5e4 <_svfiprintf_r+0x17c>
 802c54c:	b1b0      	cbz	r0, 802c57c <_svfiprintf_r+0x114>
 802c54e:	9207      	str	r2, [sp, #28]
 802c550:	e014      	b.n	802c57c <_svfiprintf_r+0x114>
 802c552:	eba0 0308 	sub.w	r3, r0, r8
 802c556:	fa09 f303 	lsl.w	r3, r9, r3
 802c55a:	4313      	orrs	r3, r2
 802c55c:	9304      	str	r3, [sp, #16]
 802c55e:	46a2      	mov	sl, r4
 802c560:	e7d2      	b.n	802c508 <_svfiprintf_r+0xa0>
 802c562:	9b03      	ldr	r3, [sp, #12]
 802c564:	1d19      	adds	r1, r3, #4
 802c566:	681b      	ldr	r3, [r3, #0]
 802c568:	9103      	str	r1, [sp, #12]
 802c56a:	2b00      	cmp	r3, #0
 802c56c:	bfbb      	ittet	lt
 802c56e:	425b      	neglt	r3, r3
 802c570:	f042 0202 	orrlt.w	r2, r2, #2
 802c574:	9307      	strge	r3, [sp, #28]
 802c576:	9307      	strlt	r3, [sp, #28]
 802c578:	bfb8      	it	lt
 802c57a:	9204      	strlt	r2, [sp, #16]
 802c57c:	7823      	ldrb	r3, [r4, #0]
 802c57e:	2b2e      	cmp	r3, #46	@ 0x2e
 802c580:	d10a      	bne.n	802c598 <_svfiprintf_r+0x130>
 802c582:	7863      	ldrb	r3, [r4, #1]
 802c584:	2b2a      	cmp	r3, #42	@ 0x2a
 802c586:	d132      	bne.n	802c5ee <_svfiprintf_r+0x186>
 802c588:	9b03      	ldr	r3, [sp, #12]
 802c58a:	1d1a      	adds	r2, r3, #4
 802c58c:	681b      	ldr	r3, [r3, #0]
 802c58e:	9203      	str	r2, [sp, #12]
 802c590:	ea43 73e3 	orr.w	r3, r3, r3, asr #31
 802c594:	3402      	adds	r4, #2
 802c596:	9305      	str	r3, [sp, #20]
 802c598:	f8df a0c0 	ldr.w	sl, [pc, #192]	@ 802c65c <_svfiprintf_r+0x1f4>
 802c59c:	7821      	ldrb	r1, [r4, #0]
 802c59e:	2203      	movs	r2, #3
 802c5a0:	4650      	mov	r0, sl
 802c5a2:	f7d3 fead 	bl	8000300 <memchr>
 802c5a6:	b138      	cbz	r0, 802c5b8 <_svfiprintf_r+0x150>
 802c5a8:	9b04      	ldr	r3, [sp, #16]
 802c5aa:	eba0 000a 	sub.w	r0, r0, sl
 802c5ae:	2240      	movs	r2, #64	@ 0x40
 802c5b0:	4082      	lsls	r2, r0
 802c5b2:	4313      	orrs	r3, r2
 802c5b4:	3401      	adds	r4, #1
 802c5b6:	9304      	str	r3, [sp, #16]
 802c5b8:	f814 1b01 	ldrb.w	r1, [r4], #1
 802c5bc:	4824      	ldr	r0, [pc, #144]	@ (802c650 <_svfiprintf_r+0x1e8>)
 802c5be:	f88d 1028 	strb.w	r1, [sp, #40]	@ 0x28
 802c5c2:	2206      	movs	r2, #6
 802c5c4:	f7d3 fe9c 	bl	8000300 <memchr>
 802c5c8:	2800      	cmp	r0, #0
 802c5ca:	d036      	beq.n	802c63a <_svfiprintf_r+0x1d2>
 802c5cc:	4b21      	ldr	r3, [pc, #132]	@ (802c654 <_svfiprintf_r+0x1ec>)
 802c5ce:	bb1b      	cbnz	r3, 802c618 <_svfiprintf_r+0x1b0>
 802c5d0:	9b03      	ldr	r3, [sp, #12]
 802c5d2:	3307      	adds	r3, #7
 802c5d4:	f023 0307 	bic.w	r3, r3, #7
 802c5d8:	3308      	adds	r3, #8
 802c5da:	9303      	str	r3, [sp, #12]
 802c5dc:	9b09      	ldr	r3, [sp, #36]	@ 0x24
 802c5de:	4433      	add	r3, r6
 802c5e0:	9309      	str	r3, [sp, #36]	@ 0x24
 802c5e2:	e76a      	b.n	802c4ba <_svfiprintf_r+0x52>
 802c5e4:	fb0c 3202 	mla	r2, ip, r2, r3
 802c5e8:	460c      	mov	r4, r1
 802c5ea:	2001      	movs	r0, #1
 802c5ec:	e7a8      	b.n	802c540 <_svfiprintf_r+0xd8>
 802c5ee:	2300      	movs	r3, #0
 802c5f0:	3401      	adds	r4, #1
 802c5f2:	9305      	str	r3, [sp, #20]
 802c5f4:	4619      	mov	r1, r3
 802c5f6:	f04f 0c0a 	mov.w	ip, #10
 802c5fa:	4620      	mov	r0, r4
 802c5fc:	f810 2b01 	ldrb.w	r2, [r0], #1
 802c600:	3a30      	subs	r2, #48	@ 0x30
 802c602:	2a09      	cmp	r2, #9
 802c604:	d903      	bls.n	802c60e <_svfiprintf_r+0x1a6>
 802c606:	2b00      	cmp	r3, #0
 802c608:	d0c6      	beq.n	802c598 <_svfiprintf_r+0x130>
 802c60a:	9105      	str	r1, [sp, #20]
 802c60c:	e7c4      	b.n	802c598 <_svfiprintf_r+0x130>
 802c60e:	fb0c 2101 	mla	r1, ip, r1, r2
 802c612:	4604      	mov	r4, r0
 802c614:	2301      	movs	r3, #1
 802c616:	e7f0      	b.n	802c5fa <_svfiprintf_r+0x192>
 802c618:	ab03      	add	r3, sp, #12
 802c61a:	9300      	str	r3, [sp, #0]
 802c61c:	462a      	mov	r2, r5
 802c61e:	4b0e      	ldr	r3, [pc, #56]	@ (802c658 <_svfiprintf_r+0x1f0>)
 802c620:	a904      	add	r1, sp, #16
 802c622:	4638      	mov	r0, r7
 802c624:	f7fd f960 	bl	80298e8 <_printf_float>
 802c628:	1c42      	adds	r2, r0, #1
 802c62a:	4606      	mov	r6, r0
 802c62c:	d1d6      	bne.n	802c5dc <_svfiprintf_r+0x174>
 802c62e:	89ab      	ldrh	r3, [r5, #12]
 802c630:	065b      	lsls	r3, r3, #25
 802c632:	f53f af2d 	bmi.w	802c490 <_svfiprintf_r+0x28>
 802c636:	9809      	ldr	r0, [sp, #36]	@ 0x24
 802c638:	e72c      	b.n	802c494 <_svfiprintf_r+0x2c>
 802c63a:	ab03      	add	r3, sp, #12
 802c63c:	9300      	str	r3, [sp, #0]
 802c63e:	462a      	mov	r2, r5
 802c640:	4b05      	ldr	r3, [pc, #20]	@ (802c658 <_svfiprintf_r+0x1f0>)
 802c642:	a904      	add	r1, sp, #16
 802c644:	4638      	mov	r0, r7
 802c646:	f7fd fbd7 	bl	8029df8 <_printf_i>
 802c64a:	e7ed      	b.n	802c628 <_svfiprintf_r+0x1c0>
 802c64c:	08031978 	.word	0x08031978
 802c650:	08031982 	.word	0x08031982
 802c654:	080298e9 	.word	0x080298e9
 802c658:	0802c3b1 	.word	0x0802c3b1
 802c65c:	0803197e 	.word	0x0803197e

0802c660 <__sfputc_r>:
 802c660:	6893      	ldr	r3, [r2, #8]
 802c662:	3b01      	subs	r3, #1
 802c664:	2b00      	cmp	r3, #0
 802c666:	b410      	push	{r4}
 802c668:	6093      	str	r3, [r2, #8]
 802c66a:	da08      	bge.n	802c67e <__sfputc_r+0x1e>
 802c66c:	6994      	ldr	r4, [r2, #24]
 802c66e:	42a3      	cmp	r3, r4
 802c670:	db01      	blt.n	802c676 <__sfputc_r+0x16>
 802c672:	290a      	cmp	r1, #10
 802c674:	d103      	bne.n	802c67e <__sfputc_r+0x1e>
 802c676:	f85d 4b04 	ldr.w	r4, [sp], #4
 802c67a:	f7fd be72 	b.w	802a362 <__swbuf_r>
 802c67e:	6813      	ldr	r3, [r2, #0]
 802c680:	1c58      	adds	r0, r3, #1
 802c682:	6010      	str	r0, [r2, #0]
 802c684:	7019      	strb	r1, [r3, #0]
 802c686:	4608      	mov	r0, r1
 802c688:	f85d 4b04 	ldr.w	r4, [sp], #4
 802c68c:	4770      	bx	lr

0802c68e <__sfputs_r>:
 802c68e:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 802c690:	4606      	mov	r6, r0
 802c692:	460f      	mov	r7, r1
 802c694:	4614      	mov	r4, r2
 802c696:	18d5      	adds	r5, r2, r3
 802c698:	42ac      	cmp	r4, r5
 802c69a:	d101      	bne.n	802c6a0 <__sfputs_r+0x12>
 802c69c:	2000      	movs	r0, #0
 802c69e:	e007      	b.n	802c6b0 <__sfputs_r+0x22>
 802c6a0:	f814 1b01 	ldrb.w	r1, [r4], #1
 802c6a4:	463a      	mov	r2, r7
 802c6a6:	4630      	mov	r0, r6
 802c6a8:	f7ff ffda 	bl	802c660 <__sfputc_r>
 802c6ac:	1c43      	adds	r3, r0, #1
 802c6ae:	d1f3      	bne.n	802c698 <__sfputs_r+0xa>
 802c6b0:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
	...

0802c6b4 <_vfiprintf_r>:
 802c6b4:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 802c6b8:	460d      	mov	r5, r1
 802c6ba:	b09d      	sub	sp, #116	@ 0x74
 802c6bc:	4614      	mov	r4, r2
 802c6be:	4698      	mov	r8, r3
 802c6c0:	4606      	mov	r6, r0
 802c6c2:	b118      	cbz	r0, 802c6cc <_vfiprintf_r+0x18>
 802c6c4:	6a03      	ldr	r3, [r0, #32]
 802c6c6:	b90b      	cbnz	r3, 802c6cc <_vfiprintf_r+0x18>
 802c6c8:	f7fd fd42 	bl	802a150 <__sinit>
 802c6cc:	6e6b      	ldr	r3, [r5, #100]	@ 0x64
 802c6ce:	07d9      	lsls	r1, r3, #31
 802c6d0:	d405      	bmi.n	802c6de <_vfiprintf_r+0x2a>
 802c6d2:	89ab      	ldrh	r3, [r5, #12]
 802c6d4:	059a      	lsls	r2, r3, #22
 802c6d6:	d402      	bmi.n	802c6de <_vfiprintf_r+0x2a>
 802c6d8:	6da8      	ldr	r0, [r5, #88]	@ 0x58
 802c6da:	f7fd fff6 	bl	802a6ca <__retarget_lock_acquire_recursive>
 802c6de:	89ab      	ldrh	r3, [r5, #12]
 802c6e0:	071b      	lsls	r3, r3, #28
 802c6e2:	d501      	bpl.n	802c6e8 <_vfiprintf_r+0x34>
 802c6e4:	692b      	ldr	r3, [r5, #16]
 802c6e6:	b99b      	cbnz	r3, 802c710 <_vfiprintf_r+0x5c>
 802c6e8:	4629      	mov	r1, r5
 802c6ea:	4630      	mov	r0, r6
 802c6ec:	f7fd fe78 	bl	802a3e0 <__swsetup_r>
 802c6f0:	b170      	cbz	r0, 802c710 <_vfiprintf_r+0x5c>
 802c6f2:	6e6b      	ldr	r3, [r5, #100]	@ 0x64
 802c6f4:	07dc      	lsls	r4, r3, #31
 802c6f6:	d504      	bpl.n	802c702 <_vfiprintf_r+0x4e>
 802c6f8:	f04f 30ff 	mov.w	r0, #4294967295	@ 0xffffffff
 802c6fc:	b01d      	add	sp, #116	@ 0x74
 802c6fe:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 802c702:	89ab      	ldrh	r3, [r5, #12]
 802c704:	0598      	lsls	r0, r3, #22
 802c706:	d4f7      	bmi.n	802c6f8 <_vfiprintf_r+0x44>
 802c708:	6da8      	ldr	r0, [r5, #88]	@ 0x58
 802c70a:	f7fd ffdf 	bl	802a6cc <__retarget_lock_release_recursive>
 802c70e:	e7f3      	b.n	802c6f8 <_vfiprintf_r+0x44>
 802c710:	2300      	movs	r3, #0
 802c712:	9309      	str	r3, [sp, #36]	@ 0x24
 802c714:	2320      	movs	r3, #32
 802c716:	f88d 3029 	strb.w	r3, [sp, #41]	@ 0x29
 802c71a:	f8cd 800c 	str.w	r8, [sp, #12]
 802c71e:	2330      	movs	r3, #48	@ 0x30
 802c720:	f8df 81ac 	ldr.w	r8, [pc, #428]	@ 802c8d0 <_vfiprintf_r+0x21c>
 802c724:	f88d 302a 	strb.w	r3, [sp, #42]	@ 0x2a
 802c728:	f04f 0901 	mov.w	r9, #1
 802c72c:	4623      	mov	r3, r4
 802c72e:	469a      	mov	sl, r3
 802c730:	f813 2b01 	ldrb.w	r2, [r3], #1
 802c734:	b10a      	cbz	r2, 802c73a <_vfiprintf_r+0x86>
 802c736:	2a25      	cmp	r2, #37	@ 0x25
 802c738:	d1f9      	bne.n	802c72e <_vfiprintf_r+0x7a>
 802c73a:	ebba 0b04 	subs.w	fp, sl, r4
 802c73e:	d00b      	beq.n	802c758 <_vfiprintf_r+0xa4>
 802c740:	465b      	mov	r3, fp
 802c742:	4622      	mov	r2, r4
 802c744:	4629      	mov	r1, r5
 802c746:	4630      	mov	r0, r6
 802c748:	f7ff ffa1 	bl	802c68e <__sfputs_r>
 802c74c:	3001      	adds	r0, #1
 802c74e:	f000 80a7 	beq.w	802c8a0 <_vfiprintf_r+0x1ec>
 802c752:	9a09      	ldr	r2, [sp, #36]	@ 0x24
 802c754:	445a      	add	r2, fp
 802c756:	9209      	str	r2, [sp, #36]	@ 0x24
 802c758:	f89a 3000 	ldrb.w	r3, [sl]
 802c75c:	2b00      	cmp	r3, #0
 802c75e:	f000 809f 	beq.w	802c8a0 <_vfiprintf_r+0x1ec>
 802c762:	2300      	movs	r3, #0
 802c764:	f04f 32ff 	mov.w	r2, #4294967295	@ 0xffffffff
 802c768:	e9cd 2305 	strd	r2, r3, [sp, #20]
 802c76c:	f10a 0a01 	add.w	sl, sl, #1
 802c770:	9304      	str	r3, [sp, #16]
 802c772:	9307      	str	r3, [sp, #28]
 802c774:	f88d 3053 	strb.w	r3, [sp, #83]	@ 0x53
 802c778:	931a      	str	r3, [sp, #104]	@ 0x68
 802c77a:	4654      	mov	r4, sl
 802c77c:	2205      	movs	r2, #5
 802c77e:	f814 1b01 	ldrb.w	r1, [r4], #1
 802c782:	4853      	ldr	r0, [pc, #332]	@ (802c8d0 <_vfiprintf_r+0x21c>)
 802c784:	f7d3 fdbc 	bl	8000300 <memchr>
 802c788:	9a04      	ldr	r2, [sp, #16]
 802c78a:	b9d8      	cbnz	r0, 802c7c4 <_vfiprintf_r+0x110>
 802c78c:	06d1      	lsls	r1, r2, #27
 802c78e:	bf44      	itt	mi
 802c790:	2320      	movmi	r3, #32
 802c792:	f88d 3053 	strbmi.w	r3, [sp, #83]	@ 0x53
 802c796:	0713      	lsls	r3, r2, #28
 802c798:	bf44      	itt	mi
 802c79a:	232b      	movmi	r3, #43	@ 0x2b
 802c79c:	f88d 3053 	strbmi.w	r3, [sp, #83]	@ 0x53
 802c7a0:	f89a 3000 	ldrb.w	r3, [sl]
 802c7a4:	2b2a      	cmp	r3, #42	@ 0x2a
 802c7a6:	d015      	beq.n	802c7d4 <_vfiprintf_r+0x120>
 802c7a8:	9a07      	ldr	r2, [sp, #28]
 802c7aa:	4654      	mov	r4, sl
 802c7ac:	2000      	movs	r0, #0
 802c7ae:	f04f 0c0a 	mov.w	ip, #10
 802c7b2:	4621      	mov	r1, r4
 802c7b4:	f811 3b01 	ldrb.w	r3, [r1], #1
 802c7b8:	3b30      	subs	r3, #48	@ 0x30
 802c7ba:	2b09      	cmp	r3, #9
 802c7bc:	d94b      	bls.n	802c856 <_vfiprintf_r+0x1a2>
 802c7be:	b1b0      	cbz	r0, 802c7ee <_vfiprintf_r+0x13a>
 802c7c0:	9207      	str	r2, [sp, #28]
 802c7c2:	e014      	b.n	802c7ee <_vfiprintf_r+0x13a>
 802c7c4:	eba0 0308 	sub.w	r3, r0, r8
 802c7c8:	fa09 f303 	lsl.w	r3, r9, r3
 802c7cc:	4313      	orrs	r3, r2
 802c7ce:	9304      	str	r3, [sp, #16]
 802c7d0:	46a2      	mov	sl, r4
 802c7d2:	e7d2      	b.n	802c77a <_vfiprintf_r+0xc6>
 802c7d4:	9b03      	ldr	r3, [sp, #12]
 802c7d6:	1d19      	adds	r1, r3, #4
 802c7d8:	681b      	ldr	r3, [r3, #0]
 802c7da:	9103      	str	r1, [sp, #12]
 802c7dc:	2b00      	cmp	r3, #0
 802c7de:	bfbb      	ittet	lt
 802c7e0:	425b      	neglt	r3, r3
 802c7e2:	f042 0202 	orrlt.w	r2, r2, #2
 802c7e6:	9307      	strge	r3, [sp, #28]
 802c7e8:	9307      	strlt	r3, [sp, #28]
 802c7ea:	bfb8      	it	lt
 802c7ec:	9204      	strlt	r2, [sp, #16]
 802c7ee:	7823      	ldrb	r3, [r4, #0]
 802c7f0:	2b2e      	cmp	r3, #46	@ 0x2e
 802c7f2:	d10a      	bne.n	802c80a <_vfiprintf_r+0x156>
 802c7f4:	7863      	ldrb	r3, [r4, #1]
 802c7f6:	2b2a      	cmp	r3, #42	@ 0x2a
 802c7f8:	d132      	bne.n	802c860 <_vfiprintf_r+0x1ac>
 802c7fa:	9b03      	ldr	r3, [sp, #12]
 802c7fc:	1d1a      	adds	r2, r3, #4
 802c7fe:	681b      	ldr	r3, [r3, #0]
 802c800:	9203      	str	r2, [sp, #12]
 802c802:	ea43 73e3 	orr.w	r3, r3, r3, asr #31
 802c806:	3402      	adds	r4, #2
 802c808:	9305      	str	r3, [sp, #20]
 802c80a:	f8df a0d4 	ldr.w	sl, [pc, #212]	@ 802c8e0 <_vfiprintf_r+0x22c>
 802c80e:	7821      	ldrb	r1, [r4, #0]
 802c810:	2203      	movs	r2, #3
 802c812:	4650      	mov	r0, sl
 802c814:	f7d3 fd74 	bl	8000300 <memchr>
 802c818:	b138      	cbz	r0, 802c82a <_vfiprintf_r+0x176>
 802c81a:	9b04      	ldr	r3, [sp, #16]
 802c81c:	eba0 000a 	sub.w	r0, r0, sl
 802c820:	2240      	movs	r2, #64	@ 0x40
 802c822:	4082      	lsls	r2, r0
 802c824:	4313      	orrs	r3, r2
 802c826:	3401      	adds	r4, #1
 802c828:	9304      	str	r3, [sp, #16]
 802c82a:	f814 1b01 	ldrb.w	r1, [r4], #1
 802c82e:	4829      	ldr	r0, [pc, #164]	@ (802c8d4 <_vfiprintf_r+0x220>)
 802c830:	f88d 1028 	strb.w	r1, [sp, #40]	@ 0x28
 802c834:	2206      	movs	r2, #6
 802c836:	f7d3 fd63 	bl	8000300 <memchr>
 802c83a:	2800      	cmp	r0, #0
 802c83c:	d03f      	beq.n	802c8be <_vfiprintf_r+0x20a>
 802c83e:	4b26      	ldr	r3, [pc, #152]	@ (802c8d8 <_vfiprintf_r+0x224>)
 802c840:	bb1b      	cbnz	r3, 802c88a <_vfiprintf_r+0x1d6>
 802c842:	9b03      	ldr	r3, [sp, #12]
 802c844:	3307      	adds	r3, #7
 802c846:	f023 0307 	bic.w	r3, r3, #7
 802c84a:	3308      	adds	r3, #8
 802c84c:	9303      	str	r3, [sp, #12]
 802c84e:	9b09      	ldr	r3, [sp, #36]	@ 0x24
 802c850:	443b      	add	r3, r7
 802c852:	9309      	str	r3, [sp, #36]	@ 0x24
 802c854:	e76a      	b.n	802c72c <_vfiprintf_r+0x78>
 802c856:	fb0c 3202 	mla	r2, ip, r2, r3
 802c85a:	460c      	mov	r4, r1
 802c85c:	2001      	movs	r0, #1
 802c85e:	e7a8      	b.n	802c7b2 <_vfiprintf_r+0xfe>
 802c860:	2300      	movs	r3, #0
 802c862:	3401      	adds	r4, #1
 802c864:	9305      	str	r3, [sp, #20]
 802c866:	4619      	mov	r1, r3
 802c868:	f04f 0c0a 	mov.w	ip, #10
 802c86c:	4620      	mov	r0, r4
 802c86e:	f810 2b01 	ldrb.w	r2, [r0], #1
 802c872:	3a30      	subs	r2, #48	@ 0x30
 802c874:	2a09      	cmp	r2, #9
 802c876:	d903      	bls.n	802c880 <_vfiprintf_r+0x1cc>
 802c878:	2b00      	cmp	r3, #0
 802c87a:	d0c6      	beq.n	802c80a <_vfiprintf_r+0x156>
 802c87c:	9105      	str	r1, [sp, #20]
 802c87e:	e7c4      	b.n	802c80a <_vfiprintf_r+0x156>
 802c880:	fb0c 2101 	mla	r1, ip, r1, r2
 802c884:	4604      	mov	r4, r0
 802c886:	2301      	movs	r3, #1
 802c888:	e7f0      	b.n	802c86c <_vfiprintf_r+0x1b8>
 802c88a:	ab03      	add	r3, sp, #12
 802c88c:	9300      	str	r3, [sp, #0]
 802c88e:	462a      	mov	r2, r5
 802c890:	4b12      	ldr	r3, [pc, #72]	@ (802c8dc <_vfiprintf_r+0x228>)
 802c892:	a904      	add	r1, sp, #16
 802c894:	4630      	mov	r0, r6
 802c896:	f7fd f827 	bl	80298e8 <_printf_float>
 802c89a:	4607      	mov	r7, r0
 802c89c:	1c78      	adds	r0, r7, #1
 802c89e:	d1d6      	bne.n	802c84e <_vfiprintf_r+0x19a>
 802c8a0:	6e6b      	ldr	r3, [r5, #100]	@ 0x64
 802c8a2:	07d9      	lsls	r1, r3, #31
 802c8a4:	d405      	bmi.n	802c8b2 <_vfiprintf_r+0x1fe>
 802c8a6:	89ab      	ldrh	r3, [r5, #12]
 802c8a8:	059a      	lsls	r2, r3, #22
 802c8aa:	d402      	bmi.n	802c8b2 <_vfiprintf_r+0x1fe>
 802c8ac:	6da8      	ldr	r0, [r5, #88]	@ 0x58
 802c8ae:	f7fd ff0d 	bl	802a6cc <__retarget_lock_release_recursive>
 802c8b2:	89ab      	ldrh	r3, [r5, #12]
 802c8b4:	065b      	lsls	r3, r3, #25
 802c8b6:	f53f af1f 	bmi.w	802c6f8 <_vfiprintf_r+0x44>
 802c8ba:	9809      	ldr	r0, [sp, #36]	@ 0x24
 802c8bc:	e71e      	b.n	802c6fc <_vfiprintf_r+0x48>
 802c8be:	ab03      	add	r3, sp, #12
 802c8c0:	9300      	str	r3, [sp, #0]
 802c8c2:	462a      	mov	r2, r5
 802c8c4:	4b05      	ldr	r3, [pc, #20]	@ (802c8dc <_vfiprintf_r+0x228>)
 802c8c6:	a904      	add	r1, sp, #16
 802c8c8:	4630      	mov	r0, r6
 802c8ca:	f7fd fa95 	bl	8029df8 <_printf_i>
 802c8ce:	e7e4      	b.n	802c89a <_vfiprintf_r+0x1e6>
 802c8d0:	08031978 	.word	0x08031978
 802c8d4:	08031982 	.word	0x08031982
 802c8d8:	080298e9 	.word	0x080298e9
 802c8dc:	0802c68f 	.word	0x0802c68f
 802c8e0:	0803197e 	.word	0x0803197e

0802c8e4 <__sflush_r>:
 802c8e4:	f9b1 200c 	ldrsh.w	r2, [r1, #12]
 802c8e8:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
 802c8ec:	0716      	lsls	r6, r2, #28
 802c8ee:	4605      	mov	r5, r0
 802c8f0:	460c      	mov	r4, r1
 802c8f2:	d454      	bmi.n	802c99e <__sflush_r+0xba>
 802c8f4:	684b      	ldr	r3, [r1, #4]
 802c8f6:	2b00      	cmp	r3, #0
 802c8f8:	dc02      	bgt.n	802c900 <__sflush_r+0x1c>
 802c8fa:	6c0b      	ldr	r3, [r1, #64]	@ 0x40
 802c8fc:	2b00      	cmp	r3, #0
 802c8fe:	dd48      	ble.n	802c992 <__sflush_r+0xae>
 802c900:	6ae6      	ldr	r6, [r4, #44]	@ 0x2c
 802c902:	2e00      	cmp	r6, #0
 802c904:	d045      	beq.n	802c992 <__sflush_r+0xae>
 802c906:	2300      	movs	r3, #0
 802c908:	f412 5280 	ands.w	r2, r2, #4096	@ 0x1000
 802c90c:	682f      	ldr	r7, [r5, #0]
 802c90e:	6a21      	ldr	r1, [r4, #32]
 802c910:	602b      	str	r3, [r5, #0]
 802c912:	d030      	beq.n	802c976 <__sflush_r+0x92>
 802c914:	6d62      	ldr	r2, [r4, #84]	@ 0x54
 802c916:	89a3      	ldrh	r3, [r4, #12]
 802c918:	0759      	lsls	r1, r3, #29
 802c91a:	d505      	bpl.n	802c928 <__sflush_r+0x44>
 802c91c:	6863      	ldr	r3, [r4, #4]
 802c91e:	1ad2      	subs	r2, r2, r3
 802c920:	6b63      	ldr	r3, [r4, #52]	@ 0x34
 802c922:	b10b      	cbz	r3, 802c928 <__sflush_r+0x44>
 802c924:	6c23      	ldr	r3, [r4, #64]	@ 0x40
 802c926:	1ad2      	subs	r2, r2, r3
 802c928:	2300      	movs	r3, #0
 802c92a:	6ae6      	ldr	r6, [r4, #44]	@ 0x2c
 802c92c:	6a21      	ldr	r1, [r4, #32]
 802c92e:	4628      	mov	r0, r5
 802c930:	47b0      	blx	r6
 802c932:	1c43      	adds	r3, r0, #1
 802c934:	89a3      	ldrh	r3, [r4, #12]
 802c936:	d106      	bne.n	802c946 <__sflush_r+0x62>
 802c938:	6829      	ldr	r1, [r5, #0]
 802c93a:	291d      	cmp	r1, #29
 802c93c:	d82b      	bhi.n	802c996 <__sflush_r+0xb2>
 802c93e:	4a2a      	ldr	r2, [pc, #168]	@ (802c9e8 <__sflush_r+0x104>)
 802c940:	410a      	asrs	r2, r1
 802c942:	07d6      	lsls	r6, r2, #31
 802c944:	d427      	bmi.n	802c996 <__sflush_r+0xb2>
 802c946:	2200      	movs	r2, #0
 802c948:	6062      	str	r2, [r4, #4]
 802c94a:	04d9      	lsls	r1, r3, #19
 802c94c:	6922      	ldr	r2, [r4, #16]
 802c94e:	6022      	str	r2, [r4, #0]
 802c950:	d504      	bpl.n	802c95c <__sflush_r+0x78>
 802c952:	1c42      	adds	r2, r0, #1
 802c954:	d101      	bne.n	802c95a <__sflush_r+0x76>
 802c956:	682b      	ldr	r3, [r5, #0]
 802c958:	b903      	cbnz	r3, 802c95c <__sflush_r+0x78>
 802c95a:	6560      	str	r0, [r4, #84]	@ 0x54
 802c95c:	6b61      	ldr	r1, [r4, #52]	@ 0x34
 802c95e:	602f      	str	r7, [r5, #0]
 802c960:	b1b9      	cbz	r1, 802c992 <__sflush_r+0xae>
 802c962:	f104 0344 	add.w	r3, r4, #68	@ 0x44
 802c966:	4299      	cmp	r1, r3
 802c968:	d002      	beq.n	802c970 <__sflush_r+0x8c>
 802c96a:	4628      	mov	r0, r5
 802c96c:	f7fe fcc6 	bl	802b2fc <_free_r>
 802c970:	2300      	movs	r3, #0
 802c972:	6363      	str	r3, [r4, #52]	@ 0x34
 802c974:	e00d      	b.n	802c992 <__sflush_r+0xae>
 802c976:	2301      	movs	r3, #1
 802c978:	4628      	mov	r0, r5
 802c97a:	47b0      	blx	r6
 802c97c:	4602      	mov	r2, r0
 802c97e:	1c50      	adds	r0, r2, #1
 802c980:	d1c9      	bne.n	802c916 <__sflush_r+0x32>
 802c982:	682b      	ldr	r3, [r5, #0]
 802c984:	2b00      	cmp	r3, #0
 802c986:	d0c6      	beq.n	802c916 <__sflush_r+0x32>
 802c988:	2b1d      	cmp	r3, #29
 802c98a:	d001      	beq.n	802c990 <__sflush_r+0xac>
 802c98c:	2b16      	cmp	r3, #22
 802c98e:	d11e      	bne.n	802c9ce <__sflush_r+0xea>
 802c990:	602f      	str	r7, [r5, #0]
 802c992:	2000      	movs	r0, #0
 802c994:	e022      	b.n	802c9dc <__sflush_r+0xf8>
 802c996:	f043 0340 	orr.w	r3, r3, #64	@ 0x40
 802c99a:	b21b      	sxth	r3, r3
 802c99c:	e01b      	b.n	802c9d6 <__sflush_r+0xf2>
 802c99e:	690f      	ldr	r7, [r1, #16]
 802c9a0:	2f00      	cmp	r7, #0
 802c9a2:	d0f6      	beq.n	802c992 <__sflush_r+0xae>
 802c9a4:	0793      	lsls	r3, r2, #30
 802c9a6:	680e      	ldr	r6, [r1, #0]
 802c9a8:	bf08      	it	eq
 802c9aa:	694b      	ldreq	r3, [r1, #20]
 802c9ac:	600f      	str	r7, [r1, #0]
 802c9ae:	bf18      	it	ne
 802c9b0:	2300      	movne	r3, #0
 802c9b2:	eba6 0807 	sub.w	r8, r6, r7
 802c9b6:	608b      	str	r3, [r1, #8]
 802c9b8:	f1b8 0f00 	cmp.w	r8, #0
 802c9bc:	dde9      	ble.n	802c992 <__sflush_r+0xae>
 802c9be:	6a21      	ldr	r1, [r4, #32]
 802c9c0:	6aa6      	ldr	r6, [r4, #40]	@ 0x28
 802c9c2:	4643      	mov	r3, r8
 802c9c4:	463a      	mov	r2, r7
 802c9c6:	4628      	mov	r0, r5
 802c9c8:	47b0      	blx	r6
 802c9ca:	2800      	cmp	r0, #0
 802c9cc:	dc08      	bgt.n	802c9e0 <__sflush_r+0xfc>
 802c9ce:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
 802c9d2:	f043 0340 	orr.w	r3, r3, #64	@ 0x40
 802c9d6:	81a3      	strh	r3, [r4, #12]
 802c9d8:	f04f 30ff 	mov.w	r0, #4294967295	@ 0xffffffff
 802c9dc:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 802c9e0:	4407      	add	r7, r0
 802c9e2:	eba8 0800 	sub.w	r8, r8, r0
 802c9e6:	e7e7      	b.n	802c9b8 <__sflush_r+0xd4>
 802c9e8:	dfbffffe 	.word	0xdfbffffe

0802c9ec <_fflush_r>:
 802c9ec:	b538      	push	{r3, r4, r5, lr}
 802c9ee:	690b      	ldr	r3, [r1, #16]
 802c9f0:	4605      	mov	r5, r0
 802c9f2:	460c      	mov	r4, r1
 802c9f4:	b913      	cbnz	r3, 802c9fc <_fflush_r+0x10>
 802c9f6:	2500      	movs	r5, #0
 802c9f8:	4628      	mov	r0, r5
 802c9fa:	bd38      	pop	{r3, r4, r5, pc}
 802c9fc:	b118      	cbz	r0, 802ca06 <_fflush_r+0x1a>
 802c9fe:	6a03      	ldr	r3, [r0, #32]
 802ca00:	b90b      	cbnz	r3, 802ca06 <_fflush_r+0x1a>
 802ca02:	f7fd fba5 	bl	802a150 <__sinit>
 802ca06:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
 802ca0a:	2b00      	cmp	r3, #0
 802ca0c:	d0f3      	beq.n	802c9f6 <_fflush_r+0xa>
 802ca0e:	6e62      	ldr	r2, [r4, #100]	@ 0x64
 802ca10:	07d0      	lsls	r0, r2, #31
 802ca12:	d404      	bmi.n	802ca1e <_fflush_r+0x32>
 802ca14:	0599      	lsls	r1, r3, #22
 802ca16:	d402      	bmi.n	802ca1e <_fflush_r+0x32>
 802ca18:	6da0      	ldr	r0, [r4, #88]	@ 0x58
 802ca1a:	f7fd fe56 	bl	802a6ca <__retarget_lock_acquire_recursive>
 802ca1e:	4628      	mov	r0, r5
 802ca20:	4621      	mov	r1, r4
 802ca22:	f7ff ff5f 	bl	802c8e4 <__sflush_r>
 802ca26:	6e63      	ldr	r3, [r4, #100]	@ 0x64
 802ca28:	07da      	lsls	r2, r3, #31
 802ca2a:	4605      	mov	r5, r0
 802ca2c:	d4e4      	bmi.n	802c9f8 <_fflush_r+0xc>
 802ca2e:	89a3      	ldrh	r3, [r4, #12]
 802ca30:	059b      	lsls	r3, r3, #22
 802ca32:	d4e1      	bmi.n	802c9f8 <_fflush_r+0xc>
 802ca34:	6da0      	ldr	r0, [r4, #88]	@ 0x58
 802ca36:	f7fd fe49 	bl	802a6cc <__retarget_lock_release_recursive>
 802ca3a:	e7dd      	b.n	802c9f8 <_fflush_r+0xc>

0802ca3c <fiprintf>:
 802ca3c:	b40e      	push	{r1, r2, r3}
 802ca3e:	b503      	push	{r0, r1, lr}
 802ca40:	4601      	mov	r1, r0
 802ca42:	ab03      	add	r3, sp, #12
 802ca44:	4805      	ldr	r0, [pc, #20]	@ (802ca5c <fiprintf+0x20>)
 802ca46:	f853 2b04 	ldr.w	r2, [r3], #4
 802ca4a:	6800      	ldr	r0, [r0, #0]
 802ca4c:	9301      	str	r3, [sp, #4]
 802ca4e:	f7ff fe31 	bl	802c6b4 <_vfiprintf_r>
 802ca52:	b002      	add	sp, #8
 802ca54:	f85d eb04 	ldr.w	lr, [sp], #4
 802ca58:	b003      	add	sp, #12
 802ca5a:	4770      	bx	lr
 802ca5c:	240001d4 	.word	0x240001d4

0802ca60 <__swhatbuf_r>:
 802ca60:	b570      	push	{r4, r5, r6, lr}
 802ca62:	460c      	mov	r4, r1
 802ca64:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 802ca68:	2900      	cmp	r1, #0
 802ca6a:	b096      	sub	sp, #88	@ 0x58
 802ca6c:	4615      	mov	r5, r2
 802ca6e:	461e      	mov	r6, r3
 802ca70:	da0d      	bge.n	802ca8e <__swhatbuf_r+0x2e>
 802ca72:	89a3      	ldrh	r3, [r4, #12]
 802ca74:	f013 0f80 	tst.w	r3, #128	@ 0x80
 802ca78:	f04f 0100 	mov.w	r1, #0
 802ca7c:	bf14      	ite	ne
 802ca7e:	2340      	movne	r3, #64	@ 0x40
 802ca80:	f44f 6380 	moveq.w	r3, #1024	@ 0x400
 802ca84:	2000      	movs	r0, #0
 802ca86:	6031      	str	r1, [r6, #0]
 802ca88:	602b      	str	r3, [r5, #0]
 802ca8a:	b016      	add	sp, #88	@ 0x58
 802ca8c:	bd70      	pop	{r4, r5, r6, pc}
 802ca8e:	466a      	mov	r2, sp
 802ca90:	f000 f848 	bl	802cb24 <_fstat_r>
 802ca94:	2800      	cmp	r0, #0
 802ca96:	dbec      	blt.n	802ca72 <__swhatbuf_r+0x12>
 802ca98:	9901      	ldr	r1, [sp, #4]
 802ca9a:	f401 4170 	and.w	r1, r1, #61440	@ 0xf000
 802ca9e:	f5a1 5300 	sub.w	r3, r1, #8192	@ 0x2000
 802caa2:	4259      	negs	r1, r3
 802caa4:	4159      	adcs	r1, r3
 802caa6:	f44f 6380 	mov.w	r3, #1024	@ 0x400
 802caaa:	e7eb      	b.n	802ca84 <__swhatbuf_r+0x24>

0802caac <__smakebuf_r>:
 802caac:	898b      	ldrh	r3, [r1, #12]
 802caae:	b5f7      	push	{r0, r1, r2, r4, r5, r6, r7, lr}
 802cab0:	079d      	lsls	r5, r3, #30
 802cab2:	4606      	mov	r6, r0
 802cab4:	460c      	mov	r4, r1
 802cab6:	d507      	bpl.n	802cac8 <__smakebuf_r+0x1c>
 802cab8:	f104 0347 	add.w	r3, r4, #71	@ 0x47
 802cabc:	6023      	str	r3, [r4, #0]
 802cabe:	6123      	str	r3, [r4, #16]
 802cac0:	2301      	movs	r3, #1
 802cac2:	6163      	str	r3, [r4, #20]
 802cac4:	b003      	add	sp, #12
 802cac6:	bdf0      	pop	{r4, r5, r6, r7, pc}
 802cac8:	ab01      	add	r3, sp, #4
 802caca:	466a      	mov	r2, sp
 802cacc:	f7ff ffc8 	bl	802ca60 <__swhatbuf_r>
 802cad0:	9f00      	ldr	r7, [sp, #0]
 802cad2:	4605      	mov	r5, r0
 802cad4:	4639      	mov	r1, r7
 802cad6:	4630      	mov	r0, r6
 802cad8:	f7fb ffba 	bl	8028a50 <_malloc_r>
 802cadc:	b948      	cbnz	r0, 802caf2 <__smakebuf_r+0x46>
 802cade:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
 802cae2:	059a      	lsls	r2, r3, #22
 802cae4:	d4ee      	bmi.n	802cac4 <__smakebuf_r+0x18>
 802cae6:	f023 0303 	bic.w	r3, r3, #3
 802caea:	f043 0302 	orr.w	r3, r3, #2
 802caee:	81a3      	strh	r3, [r4, #12]
 802caf0:	e7e2      	b.n	802cab8 <__smakebuf_r+0xc>
 802caf2:	89a3      	ldrh	r3, [r4, #12]
 802caf4:	6020      	str	r0, [r4, #0]
 802caf6:	f043 0380 	orr.w	r3, r3, #128	@ 0x80
 802cafa:	81a3      	strh	r3, [r4, #12]
 802cafc:	9b01      	ldr	r3, [sp, #4]
 802cafe:	e9c4 0704 	strd	r0, r7, [r4, #16]
 802cb02:	b15b      	cbz	r3, 802cb1c <__smakebuf_r+0x70>
 802cb04:	f9b4 100e 	ldrsh.w	r1, [r4, #14]
 802cb08:	4630      	mov	r0, r6
 802cb0a:	f000 f81d 	bl	802cb48 <_isatty_r>
 802cb0e:	b128      	cbz	r0, 802cb1c <__smakebuf_r+0x70>
 802cb10:	89a3      	ldrh	r3, [r4, #12]
 802cb12:	f023 0303 	bic.w	r3, r3, #3
 802cb16:	f043 0301 	orr.w	r3, r3, #1
 802cb1a:	81a3      	strh	r3, [r4, #12]
 802cb1c:	89a3      	ldrh	r3, [r4, #12]
 802cb1e:	431d      	orrs	r5, r3
 802cb20:	81a5      	strh	r5, [r4, #12]
 802cb22:	e7cf      	b.n	802cac4 <__smakebuf_r+0x18>

0802cb24 <_fstat_r>:
 802cb24:	b538      	push	{r3, r4, r5, lr}
 802cb26:	4d07      	ldr	r5, [pc, #28]	@ (802cb44 <_fstat_r+0x20>)
 802cb28:	2300      	movs	r3, #0
 802cb2a:	4604      	mov	r4, r0
 802cb2c:	4608      	mov	r0, r1
 802cb2e:	4611      	mov	r1, r2
 802cb30:	602b      	str	r3, [r5, #0]
 802cb32:	f7d7 f92f 	bl	8003d94 <_fstat>
 802cb36:	1c43      	adds	r3, r0, #1
 802cb38:	d102      	bne.n	802cb40 <_fstat_r+0x1c>
 802cb3a:	682b      	ldr	r3, [r5, #0]
 802cb3c:	b103      	cbz	r3, 802cb40 <_fstat_r+0x1c>
 802cb3e:	6023      	str	r3, [r4, #0]
 802cb40:	bd38      	pop	{r3, r4, r5, pc}
 802cb42:	bf00      	nop
 802cb44:	2402b250 	.word	0x2402b250

0802cb48 <_isatty_r>:
 802cb48:	b538      	push	{r3, r4, r5, lr}
 802cb4a:	4d06      	ldr	r5, [pc, #24]	@ (802cb64 <_isatty_r+0x1c>)
 802cb4c:	2300      	movs	r3, #0
 802cb4e:	4604      	mov	r4, r0
 802cb50:	4608      	mov	r0, r1
 802cb52:	602b      	str	r3, [r5, #0]
 802cb54:	f7d7 f92e 	bl	8003db4 <_isatty>
 802cb58:	1c43      	adds	r3, r0, #1
 802cb5a:	d102      	bne.n	802cb62 <_isatty_r+0x1a>
 802cb5c:	682b      	ldr	r3, [r5, #0]
 802cb5e:	b103      	cbz	r3, 802cb62 <_isatty_r+0x1a>
 802cb60:	6023      	str	r3, [r4, #0]
 802cb62:	bd38      	pop	{r3, r4, r5, pc}
 802cb64:	2402b250 	.word	0x2402b250

0802cb68 <abort>:
 802cb68:	b508      	push	{r3, lr}
 802cb6a:	2006      	movs	r0, #6
 802cb6c:	f000 f840 	bl	802cbf0 <raise>
 802cb70:	2001      	movs	r0, #1
 802cb72:	f7d7 f8bf 	bl	8003cf4 <_exit>

0802cb76 <_calloc_r>:
 802cb76:	b570      	push	{r4, r5, r6, lr}
 802cb78:	fba1 5402 	umull	r5, r4, r1, r2
 802cb7c:	b93c      	cbnz	r4, 802cb8e <_calloc_r+0x18>
 802cb7e:	4629      	mov	r1, r5
 802cb80:	f7fb ff66 	bl	8028a50 <_malloc_r>
 802cb84:	4606      	mov	r6, r0
 802cb86:	b928      	cbnz	r0, 802cb94 <_calloc_r+0x1e>
 802cb88:	2600      	movs	r6, #0
 802cb8a:	4630      	mov	r0, r6
 802cb8c:	bd70      	pop	{r4, r5, r6, pc}
 802cb8e:	220c      	movs	r2, #12
 802cb90:	6002      	str	r2, [r0, #0]
 802cb92:	e7f9      	b.n	802cb88 <_calloc_r+0x12>
 802cb94:	462a      	mov	r2, r5
 802cb96:	4621      	mov	r1, r4
 802cb98:	f7fd fca2 	bl	802a4e0 <memset>
 802cb9c:	e7f5      	b.n	802cb8a <_calloc_r+0x14>

0802cb9e <_raise_r>:
 802cb9e:	291f      	cmp	r1, #31
 802cba0:	b538      	push	{r3, r4, r5, lr}
 802cba2:	4605      	mov	r5, r0
 802cba4:	460c      	mov	r4, r1
 802cba6:	d904      	bls.n	802cbb2 <_raise_r+0x14>
 802cba8:	2316      	movs	r3, #22
 802cbaa:	6003      	str	r3, [r0, #0]
 802cbac:	f04f 30ff 	mov.w	r0, #4294967295	@ 0xffffffff
 802cbb0:	bd38      	pop	{r3, r4, r5, pc}
 802cbb2:	6bc2      	ldr	r2, [r0, #60]	@ 0x3c
 802cbb4:	b112      	cbz	r2, 802cbbc <_raise_r+0x1e>
 802cbb6:	f852 3021 	ldr.w	r3, [r2, r1, lsl #2]
 802cbba:	b94b      	cbnz	r3, 802cbd0 <_raise_r+0x32>
 802cbbc:	4628      	mov	r0, r5
 802cbbe:	f000 f831 	bl	802cc24 <_getpid_r>
 802cbc2:	4622      	mov	r2, r4
 802cbc4:	4601      	mov	r1, r0
 802cbc6:	4628      	mov	r0, r5
 802cbc8:	e8bd 4038 	ldmia.w	sp!, {r3, r4, r5, lr}
 802cbcc:	f000 b818 	b.w	802cc00 <_kill_r>
 802cbd0:	2b01      	cmp	r3, #1
 802cbd2:	d00a      	beq.n	802cbea <_raise_r+0x4c>
 802cbd4:	1c59      	adds	r1, r3, #1
 802cbd6:	d103      	bne.n	802cbe0 <_raise_r+0x42>
 802cbd8:	2316      	movs	r3, #22
 802cbda:	6003      	str	r3, [r0, #0]
 802cbdc:	2001      	movs	r0, #1
 802cbde:	e7e7      	b.n	802cbb0 <_raise_r+0x12>
 802cbe0:	2100      	movs	r1, #0
 802cbe2:	f842 1024 	str.w	r1, [r2, r4, lsl #2]
 802cbe6:	4620      	mov	r0, r4
 802cbe8:	4798      	blx	r3
 802cbea:	2000      	movs	r0, #0
 802cbec:	e7e0      	b.n	802cbb0 <_raise_r+0x12>
	...

0802cbf0 <raise>:
 802cbf0:	4b02      	ldr	r3, [pc, #8]	@ (802cbfc <raise+0xc>)
 802cbf2:	4601      	mov	r1, r0
 802cbf4:	6818      	ldr	r0, [r3, #0]
 802cbf6:	f7ff bfd2 	b.w	802cb9e <_raise_r>
 802cbfa:	bf00      	nop
 802cbfc:	240001d4 	.word	0x240001d4

0802cc00 <_kill_r>:
 802cc00:	b538      	push	{r3, r4, r5, lr}
 802cc02:	4d07      	ldr	r5, [pc, #28]	@ (802cc20 <_kill_r+0x20>)
 802cc04:	2300      	movs	r3, #0
 802cc06:	4604      	mov	r4, r0
 802cc08:	4608      	mov	r0, r1
 802cc0a:	4611      	mov	r1, r2
 802cc0c:	602b      	str	r3, [r5, #0]
 802cc0e:	f7d7 f85f 	bl	8003cd0 <_kill>
 802cc12:	1c43      	adds	r3, r0, #1
 802cc14:	d102      	bne.n	802cc1c <_kill_r+0x1c>
 802cc16:	682b      	ldr	r3, [r5, #0]
 802cc18:	b103      	cbz	r3, 802cc1c <_kill_r+0x1c>
 802cc1a:	6023      	str	r3, [r4, #0]
 802cc1c:	bd38      	pop	{r3, r4, r5, pc}
 802cc1e:	bf00      	nop
 802cc20:	2402b250 	.word	0x2402b250

0802cc24 <_getpid_r>:
 802cc24:	f7d7 b84c 	b.w	8003cc0 <_getpid>

0802cc28 <_init>:
 802cc28:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 802cc2a:	bf00      	nop
 802cc2c:	bcf8      	pop	{r3, r4, r5, r6, r7}
 802cc2e:	bc08      	pop	{r3}
 802cc30:	469e      	mov	lr, r3
 802cc32:	4770      	bx	lr

0802cc34 <_fini>:
 802cc34:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 802cc36:	bf00      	nop
 802cc38:	bcf8      	pop	{r3, r4, r5, r6, r7}
 802cc3a:	bc08      	pop	{r3}
 802cc3c:	469e      	mov	lr, r3
 802cc3e:	4770      	bx	lr