node-red-STM32/OZE_Main/Debug/OZE_Main.list

OZE_Main.elf:     file format elf32-littlearm

Sections:
Idx Name          Size      VMA       LMA       File off  Algn
  0 .isr_vector   00000298  08000000  08000000  00001000  2**0
                  CONTENTS, ALLOC, LOAD, READONLY, DATA
  1 .text         0002bcf0  080002a0  080002a0  000012a0  2**4
                  CONTENTS, ALLOC, LOAD, READONLY, CODE
  2 .rodata       00004cac  0802bf90  0802bf90  0002cf90  2**3
                  CONTENTS, ALLOC, LOAD, READONLY, DATA
  3 .ARM          00000008  08030c3c  08030c3c  00031c3c  2**2
                  CONTENTS, ALLOC, LOAD, READONLY, DATA
  4 .init_array   00000004  08030c44  08030c44  00031c44  2**2
                  CONTENTS, ALLOC, LOAD, READONLY, DATA
  5 .fini_array   00000004  08030c48  08030c48  00031c48  2**2
                  CONTENTS, ALLOC, LOAD, READONLY, DATA
  6 .data         00000210  24000000  08030c4c  00032000  2**2
                  CONTENTS, ALLOC, LOAD, DATA
  7 .bss          0002a0dc  24000210  08030e5c  00032210  2**2
                  ALLOC
  8 ._user_heap_stack 00000604  2402a2ec  08030e5c  000322ec  2**0
                  ALLOC
  9 .lwip_sec     0001a293  2402a8f0  08030e5c  000328f0  2**2
                  ALLOC
 10 .ARM.attributes 0000002e  00000000  00000000  00032210  2**0
                  CONTENTS, READONLY
 11 .debug_info   00051174  00000000  00000000  0003223e  2**0
                  CONTENTS, READONLY, DEBUGGING, OCTETS
 12 .debug_abbrev 0000b77f  00000000  00000000  000833b2  2**0
                  CONTENTS, READONLY, DEBUGGING, OCTETS
 13 .debug_aranges 00003760  00000000  00000000  0008eb38  2**3
                  CONTENTS, READONLY, DEBUGGING, OCTETS
 14 .debug_rnglists 00002c51  00000000  00000000  00092298  2**0
                  CONTENTS, READONLY, DEBUGGING, OCTETS
 15 .debug_macro  0004f7b2  00000000  00000000  00094ee9  2**0
                  CONTENTS, READONLY, DEBUGGING, OCTETS
 16 .debug_line   00057f39  00000000  00000000  000e469b  2**0
                  CONTENTS, READONLY, DEBUGGING, OCTETS
 17 .debug_str    0018e28d  00000000  00000000  0013c5d4  2**0
                  CONTENTS, READONLY, DEBUGGING, OCTETS
 18 .comment      00000043  00000000  00000000  002ca861  2**0
                  CONTENTS, READONLY
 19 .debug_frame  0000f878  00000000  00000000  002ca8a4  2**2
                  CONTENTS, READONLY, DEBUGGING, OCTETS
 20 .debug_line_str 00000064  00000000  00000000  002da11c  2**0
                  CONTENTS, READONLY, DEBUGGING, OCTETS

Disassembly of section .text:

080002a0 <__do_global_dtors_aux>:
 80002a0:	b510      	push	{r4, lr}
 80002a2:	4c05      	ldr	r4, [pc, #20]	@ (80002b8 <__do_global_dtors_aux+0x18>)
 80002a4:	7823      	ldrb	r3, [r4, #0]
 80002a6:	b933      	cbnz	r3, 80002b6 <__do_global_dtors_aux+0x16>
 80002a8:	4b04      	ldr	r3, [pc, #16]	@ (80002bc <__do_global_dtors_aux+0x1c>)
 80002aa:	b113      	cbz	r3, 80002b2 <__do_global_dtors_aux+0x12>
 80002ac:	4804      	ldr	r0, [pc, #16]	@ (80002c0 <__do_global_dtors_aux+0x20>)
 80002ae:	f3af 8000 	nop.w
 80002b2:	2301      	movs	r3, #1
 80002b4:	7023      	strb	r3, [r4, #0]
 80002b6:	bd10      	pop	{r4, pc}
 80002b8:	24000210 	.word	0x24000210
 80002bc:	00000000 	.word	0x00000000
 80002c0:	0802bf78 	.word	0x0802bf78

080002c4 <frame_dummy>:
 80002c4:	b508      	push	{r3, lr}
 80002c6:	4b03      	ldr	r3, [pc, #12]	@ (80002d4 <frame_dummy+0x10>)
 80002c8:	b11b      	cbz	r3, 80002d2 <frame_dummy+0xe>
 80002ca:	4903      	ldr	r1, [pc, #12]	@ (80002d8 <frame_dummy+0x14>)
 80002cc:	4803      	ldr	r0, [pc, #12]	@ (80002dc <frame_dummy+0x18>)
 80002ce:	f3af 8000 	nop.w
 80002d2:	bd08      	pop	{r3, pc}
 80002d4:	00000000 	.word	0x00000000
 80002d8:	24000214 	.word	0x24000214
 80002dc:	0802bf78 	.word	0x0802bf78

080002e0 <strcmp>:
 80002e0:	f810 2b01 	ldrb.w	r2, [r0], #1
 80002e4:	f811 3b01 	ldrb.w	r3, [r1], #1
 80002e8:	2a01      	cmp	r2, #1
 80002ea:	bf28      	it	cs
 80002ec:	429a      	cmpcs	r2, r3
 80002ee:	d0f7      	beq.n	80002e0 <strcmp>
 80002f0:	1ad0      	subs	r0, r2, r3
 80002f2:	4770      	bx	lr
	...

08000300 <memchr>:
 8000300:	f001 01ff 	and.w	r1, r1, #255	@ 0xff
 8000304:	2a10      	cmp	r2, #16
 8000306:	db2b      	blt.n	8000360 <memchr+0x60>
 8000308:	f010 0f07 	tst.w	r0, #7
 800030c:	d008      	beq.n	8000320 <memchr+0x20>
 800030e:	f810 3b01 	ldrb.w	r3, [r0], #1
 8000312:	3a01      	subs	r2, #1
 8000314:	428b      	cmp	r3, r1
 8000316:	d02d      	beq.n	8000374 <memchr+0x74>
 8000318:	f010 0f07 	tst.w	r0, #7
 800031c:	b342      	cbz	r2, 8000370 <memchr+0x70>
 800031e:	d1f6      	bne.n	800030e <memchr+0xe>
 8000320:	b4f0      	push	{r4, r5, r6, r7}
 8000322:	ea41 2101 	orr.w	r1, r1, r1, lsl #8
 8000326:	ea41 4101 	orr.w	r1, r1, r1, lsl #16
 800032a:	f022 0407 	bic.w	r4, r2, #7
 800032e:	f07f 0700 	mvns.w	r7, #0
 8000332:	2300      	movs	r3, #0
 8000334:	e8f0 5602 	ldrd	r5, r6, [r0], #8
 8000338:	3c08      	subs	r4, #8
 800033a:	ea85 0501 	eor.w	r5, r5, r1
 800033e:	ea86 0601 	eor.w	r6, r6, r1
 8000342:	fa85 f547 	uadd8	r5, r5, r7
 8000346:	faa3 f587 	sel	r5, r3, r7
 800034a:	fa86 f647 	uadd8	r6, r6, r7
 800034e:	faa5 f687 	sel	r6, r5, r7
 8000352:	b98e      	cbnz	r6, 8000378 <memchr+0x78>
 8000354:	d1ee      	bne.n	8000334 <memchr+0x34>
 8000356:	bcf0      	pop	{r4, r5, r6, r7}
 8000358:	f001 01ff 	and.w	r1, r1, #255	@ 0xff
 800035c:	f002 0207 	and.w	r2, r2, #7
 8000360:	b132      	cbz	r2, 8000370 <memchr+0x70>
 8000362:	f810 3b01 	ldrb.w	r3, [r0], #1
 8000366:	3a01      	subs	r2, #1
 8000368:	ea83 0301 	eor.w	r3, r3, r1
 800036c:	b113      	cbz	r3, 8000374 <memchr+0x74>
 800036e:	d1f8      	bne.n	8000362 <memchr+0x62>
 8000370:	2000      	movs	r0, #0
 8000372:	4770      	bx	lr
 8000374:	3801      	subs	r0, #1
 8000376:	4770      	bx	lr
 8000378:	2d00      	cmp	r5, #0
 800037a:	bf06      	itte	eq
 800037c:	4635      	moveq	r5, r6
 800037e:	3803      	subeq	r0, #3
 8000380:	3807      	subne	r0, #7
 8000382:	f015 0f01 	tst.w	r5, #1
 8000386:	d107      	bne.n	8000398 <memchr+0x98>
 8000388:	3001      	adds	r0, #1
 800038a:	f415 7f80 	tst.w	r5, #256	@ 0x100
 800038e:	bf02      	ittt	eq
 8000390:	3001      	addeq	r0, #1
 8000392:	f415 3fc0 	tsteq.w	r5, #98304	@ 0x18000
 8000396:	3001      	addeq	r0, #1
 8000398:	bcf0      	pop	{r4, r5, r6, r7}
 800039a:	3801      	subs	r0, #1
 800039c:	4770      	bx	lr
 800039e:	bf00      	nop

080003a0 <strlen>:
 80003a0:	4603      	mov	r3, r0
 80003a2:	f813 2b01 	ldrb.w	r2, [r3], #1
 80003a6:	2a00      	cmp	r2, #0
 80003a8:	d1fb      	bne.n	80003a2 <strlen+0x2>
 80003aa:	1a18      	subs	r0, r3, r0
 80003ac:	3801      	subs	r0, #1
 80003ae:	4770      	bx	lr

080003b0 <__aeabi_drsub>:
 80003b0:	f081 4100 	eor.w	r1, r1, #2147483648	@ 0x80000000
 80003b4:	e002      	b.n	80003bc <__adddf3>
 80003b6:	bf00      	nop

080003b8 <__aeabi_dsub>:
 80003b8:	f083 4300 	eor.w	r3, r3, #2147483648	@ 0x80000000

080003bc <__adddf3>:
 80003bc:	b530      	push	{r4, r5, lr}
 80003be:	ea4f 0441 	mov.w	r4, r1, lsl #1
 80003c2:	ea4f 0543 	mov.w	r5, r3, lsl #1
 80003c6:	ea94 0f05 	teq	r4, r5
 80003ca:	bf08      	it	eq
 80003cc:	ea90 0f02 	teqeq	r0, r2
 80003d0:	bf1f      	itttt	ne
 80003d2:	ea54 0c00 	orrsne.w	ip, r4, r0
 80003d6:	ea55 0c02 	orrsne.w	ip, r5, r2
 80003da:	ea7f 5c64 	mvnsne.w	ip, r4, asr #21
 80003de:	ea7f 5c65 	mvnsne.w	ip, r5, asr #21
 80003e2:	f000 80e2 	beq.w	80005aa <__adddf3+0x1ee>
 80003e6:	ea4f 5454 	mov.w	r4, r4, lsr #21
 80003ea:	ebd4 5555 	rsbs	r5, r4, r5, lsr #21
 80003ee:	bfb8      	it	lt
 80003f0:	426d      	neglt	r5, r5
 80003f2:	dd0c      	ble.n	800040e <__adddf3+0x52>
 80003f4:	442c      	add	r4, r5
 80003f6:	ea80 0202 	eor.w	r2, r0, r2
 80003fa:	ea81 0303 	eor.w	r3, r1, r3
 80003fe:	ea82 0000 	eor.w	r0, r2, r0
 8000402:	ea83 0101 	eor.w	r1, r3, r1
 8000406:	ea80 0202 	eor.w	r2, r0, r2
 800040a:	ea81 0303 	eor.w	r3, r1, r3
 800040e:	2d36      	cmp	r5, #54	@ 0x36
 8000410:	bf88      	it	hi
 8000412:	bd30      	pophi	{r4, r5, pc}
 8000414:	f011 4f00 	tst.w	r1, #2147483648	@ 0x80000000
 8000418:	ea4f 3101 	mov.w	r1, r1, lsl #12
 800041c:	f44f 1c80 	mov.w	ip, #1048576	@ 0x100000
 8000420:	ea4c 3111 	orr.w	r1, ip, r1, lsr #12
 8000424:	d002      	beq.n	800042c <__adddf3+0x70>
 8000426:	4240      	negs	r0, r0
 8000428:	eb61 0141 	sbc.w	r1, r1, r1, lsl #1
 800042c:	f013 4f00 	tst.w	r3, #2147483648	@ 0x80000000
 8000430:	ea4f 3303 	mov.w	r3, r3, lsl #12
 8000434:	ea4c 3313 	orr.w	r3, ip, r3, lsr #12
 8000438:	d002      	beq.n	8000440 <__adddf3+0x84>
 800043a:	4252      	negs	r2, r2
 800043c:	eb63 0343 	sbc.w	r3, r3, r3, lsl #1
 8000440:	ea94 0f05 	teq	r4, r5
 8000444:	f000 80a7 	beq.w	8000596 <__adddf3+0x1da>
 8000448:	f1a4 0401 	sub.w	r4, r4, #1
 800044c:	f1d5 0e20 	rsbs	lr, r5, #32
 8000450:	db0d      	blt.n	800046e <__adddf3+0xb2>
 8000452:	fa02 fc0e 	lsl.w	ip, r2, lr
 8000456:	fa22 f205 	lsr.w	r2, r2, r5
 800045a:	1880      	adds	r0, r0, r2
 800045c:	f141 0100 	adc.w	r1, r1, #0
 8000460:	fa03 f20e 	lsl.w	r2, r3, lr
 8000464:	1880      	adds	r0, r0, r2
 8000466:	fa43 f305 	asr.w	r3, r3, r5
 800046a:	4159      	adcs	r1, r3
 800046c:	e00e      	b.n	800048c <__adddf3+0xd0>
 800046e:	f1a5 0520 	sub.w	r5, r5, #32
 8000472:	f10e 0e20 	add.w	lr, lr, #32
 8000476:	2a01      	cmp	r2, #1
 8000478:	fa03 fc0e 	lsl.w	ip, r3, lr
 800047c:	bf28      	it	cs
 800047e:	f04c 0c02 	orrcs.w	ip, ip, #2
 8000482:	fa43 f305 	asr.w	r3, r3, r5
 8000486:	18c0      	adds	r0, r0, r3
 8000488:	eb51 71e3 	adcs.w	r1, r1, r3, asr #31
 800048c:	f001 4500 	and.w	r5, r1, #2147483648	@ 0x80000000
 8000490:	d507      	bpl.n	80004a2 <__adddf3+0xe6>
 8000492:	f04f 0e00 	mov.w	lr, #0
 8000496:	f1dc 0c00 	rsbs	ip, ip, #0
 800049a:	eb7e 0000 	sbcs.w	r0, lr, r0
 800049e:	eb6e 0101 	sbc.w	r1, lr, r1
 80004a2:	f5b1 1f80 	cmp.w	r1, #1048576	@ 0x100000
 80004a6:	d31b      	bcc.n	80004e0 <__adddf3+0x124>
 80004a8:	f5b1 1f00 	cmp.w	r1, #2097152	@ 0x200000
 80004ac:	d30c      	bcc.n	80004c8 <__adddf3+0x10c>
 80004ae:	0849      	lsrs	r1, r1, #1
 80004b0:	ea5f 0030 	movs.w	r0, r0, rrx
 80004b4:	ea4f 0c3c 	mov.w	ip, ip, rrx
 80004b8:	f104 0401 	add.w	r4, r4, #1
 80004bc:	ea4f 5244 	mov.w	r2, r4, lsl #21
 80004c0:	f512 0f80 	cmn.w	r2, #4194304	@ 0x400000
 80004c4:	f080 809a 	bcs.w	80005fc <__adddf3+0x240>
 80004c8:	f1bc 4f00 	cmp.w	ip, #2147483648	@ 0x80000000
 80004cc:	bf08      	it	eq
 80004ce:	ea5f 0c50 	movseq.w	ip, r0, lsr #1
 80004d2:	f150 0000 	adcs.w	r0, r0, #0
 80004d6:	eb41 5104 	adc.w	r1, r1, r4, lsl #20
 80004da:	ea41 0105 	orr.w	r1, r1, r5
 80004de:	bd30      	pop	{r4, r5, pc}
 80004e0:	ea5f 0c4c 	movs.w	ip, ip, lsl #1
 80004e4:	4140      	adcs	r0, r0
 80004e6:	eb41 0101 	adc.w	r1, r1, r1
 80004ea:	3c01      	subs	r4, #1
 80004ec:	bf28      	it	cs
 80004ee:	f5b1 1f80 	cmpcs.w	r1, #1048576	@ 0x100000
 80004f2:	d2e9      	bcs.n	80004c8 <__adddf3+0x10c>
 80004f4:	f091 0f00 	teq	r1, #0
 80004f8:	bf04      	itt	eq
 80004fa:	4601      	moveq	r1, r0
 80004fc:	2000      	moveq	r0, #0
 80004fe:	fab1 f381 	clz	r3, r1
 8000502:	bf08      	it	eq
 8000504:	3320      	addeq	r3, #32
 8000506:	f1a3 030b 	sub.w	r3, r3, #11
 800050a:	f1b3 0220 	subs.w	r2, r3, #32
 800050e:	da0c      	bge.n	800052a <__adddf3+0x16e>
 8000510:	320c      	adds	r2, #12
 8000512:	dd08      	ble.n	8000526 <__adddf3+0x16a>
 8000514:	f102 0c14 	add.w	ip, r2, #20
 8000518:	f1c2 020c 	rsb	r2, r2, #12
 800051c:	fa01 f00c 	lsl.w	r0, r1, ip
 8000520:	fa21 f102 	lsr.w	r1, r1, r2
 8000524:	e00c      	b.n	8000540 <__adddf3+0x184>
 8000526:	f102 0214 	add.w	r2, r2, #20
 800052a:	bfd8      	it	le
 800052c:	f1c2 0c20 	rsble	ip, r2, #32
 8000530:	fa01 f102 	lsl.w	r1, r1, r2
 8000534:	fa20 fc0c 	lsr.w	ip, r0, ip
 8000538:	bfdc      	itt	le
 800053a:	ea41 010c 	orrle.w	r1, r1, ip
 800053e:	4090      	lslle	r0, r2
 8000540:	1ae4      	subs	r4, r4, r3
 8000542:	bfa2      	ittt	ge
 8000544:	eb01 5104 	addge.w	r1, r1, r4, lsl #20
 8000548:	4329      	orrge	r1, r5
 800054a:	bd30      	popge	{r4, r5, pc}
 800054c:	ea6f 0404 	mvn.w	r4, r4
 8000550:	3c1f      	subs	r4, #31
 8000552:	da1c      	bge.n	800058e <__adddf3+0x1d2>
 8000554:	340c      	adds	r4, #12
 8000556:	dc0e      	bgt.n	8000576 <__adddf3+0x1ba>
 8000558:	f104 0414 	add.w	r4, r4, #20
 800055c:	f1c4 0220 	rsb	r2, r4, #32
 8000560:	fa20 f004 	lsr.w	r0, r0, r4
 8000564:	fa01 f302 	lsl.w	r3, r1, r2
 8000568:	ea40 0003 	orr.w	r0, r0, r3
 800056c:	fa21 f304 	lsr.w	r3, r1, r4
 8000570:	ea45 0103 	orr.w	r1, r5, r3
 8000574:	bd30      	pop	{r4, r5, pc}
 8000576:	f1c4 040c 	rsb	r4, r4, #12
 800057a:	f1c4 0220 	rsb	r2, r4, #32
 800057e:	fa20 f002 	lsr.w	r0, r0, r2
 8000582:	fa01 f304 	lsl.w	r3, r1, r4
 8000586:	ea40 0003 	orr.w	r0, r0, r3
 800058a:	4629      	mov	r1, r5
 800058c:	bd30      	pop	{r4, r5, pc}
 800058e:	fa21 f004 	lsr.w	r0, r1, r4
 8000592:	4629      	mov	r1, r5
 8000594:	bd30      	pop	{r4, r5, pc}
 8000596:	f094 0f00 	teq	r4, #0
 800059a:	f483 1380 	eor.w	r3, r3, #1048576	@ 0x100000
 800059e:	bf06      	itte	eq
 80005a0:	f481 1180 	eoreq.w	r1, r1, #1048576	@ 0x100000
 80005a4:	3401      	addeq	r4, #1
 80005a6:	3d01      	subne	r5, #1
 80005a8:	e74e      	b.n	8000448 <__adddf3+0x8c>
 80005aa:	ea7f 5c64 	mvns.w	ip, r4, asr #21
 80005ae:	bf18      	it	ne
 80005b0:	ea7f 5c65 	mvnsne.w	ip, r5, asr #21
 80005b4:	d029      	beq.n	800060a <__adddf3+0x24e>
 80005b6:	ea94 0f05 	teq	r4, r5
 80005ba:	bf08      	it	eq
 80005bc:	ea90 0f02 	teqeq	r0, r2
 80005c0:	d005      	beq.n	80005ce <__adddf3+0x212>
 80005c2:	ea54 0c00 	orrs.w	ip, r4, r0
 80005c6:	bf04      	itt	eq
 80005c8:	4619      	moveq	r1, r3
 80005ca:	4610      	moveq	r0, r2
 80005cc:	bd30      	pop	{r4, r5, pc}
 80005ce:	ea91 0f03 	teq	r1, r3
 80005d2:	bf1e      	ittt	ne
 80005d4:	2100      	movne	r1, #0
 80005d6:	2000      	movne	r0, #0
 80005d8:	bd30      	popne	{r4, r5, pc}
 80005da:	ea5f 5c54 	movs.w	ip, r4, lsr #21
 80005de:	d105      	bne.n	80005ec <__adddf3+0x230>
 80005e0:	0040      	lsls	r0, r0, #1
 80005e2:	4149      	adcs	r1, r1
 80005e4:	bf28      	it	cs
 80005e6:	f041 4100 	orrcs.w	r1, r1, #2147483648	@ 0x80000000
 80005ea:	bd30      	pop	{r4, r5, pc}
 80005ec:	f514 0480 	adds.w	r4, r4, #4194304	@ 0x400000
 80005f0:	bf3c      	itt	cc
 80005f2:	f501 1180 	addcc.w	r1, r1, #1048576	@ 0x100000
 80005f6:	bd30      	popcc	{r4, r5, pc}
 80005f8:	f001 4500 	and.w	r5, r1, #2147483648	@ 0x80000000
 80005fc:	f045 41fe 	orr.w	r1, r5, #2130706432	@ 0x7f000000
 8000600:	f441 0170 	orr.w	r1, r1, #15728640	@ 0xf00000
 8000604:	f04f 0000 	mov.w	r0, #0
 8000608:	bd30      	pop	{r4, r5, pc}
 800060a:	ea7f 5c64 	mvns.w	ip, r4, asr #21
 800060e:	bf1a      	itte	ne
 8000610:	4619      	movne	r1, r3
 8000612:	4610      	movne	r0, r2
 8000614:	ea7f 5c65 	mvnseq.w	ip, r5, asr #21
 8000618:	bf1c      	itt	ne
 800061a:	460b      	movne	r3, r1
 800061c:	4602      	movne	r2, r0
 800061e:	ea50 3401 	orrs.w	r4, r0, r1, lsl #12
 8000622:	bf06      	itte	eq
 8000624:	ea52 3503 	orrseq.w	r5, r2, r3, lsl #12
 8000628:	ea91 0f03 	teqeq	r1, r3
 800062c:	f441 2100 	orrne.w	r1, r1, #524288	@ 0x80000
 8000630:	bd30      	pop	{r4, r5, pc}
 8000632:	bf00      	nop

08000634 <__aeabi_ui2d>:
 8000634:	f090 0f00 	teq	r0, #0
 8000638:	bf04      	itt	eq
 800063a:	2100      	moveq	r1, #0
 800063c:	4770      	bxeq	lr
 800063e:	b530      	push	{r4, r5, lr}
 8000640:	f44f 6480 	mov.w	r4, #1024	@ 0x400
 8000644:	f104 0432 	add.w	r4, r4, #50	@ 0x32
 8000648:	f04f 0500 	mov.w	r5, #0
 800064c:	f04f 0100 	mov.w	r1, #0
 8000650:	e750      	b.n	80004f4 <__adddf3+0x138>
 8000652:	bf00      	nop

08000654 <__aeabi_i2d>:
 8000654:	f090 0f00 	teq	r0, #0
 8000658:	bf04      	itt	eq
 800065a:	2100      	moveq	r1, #0
 800065c:	4770      	bxeq	lr
 800065e:	b530      	push	{r4, r5, lr}
 8000660:	f44f 6480 	mov.w	r4, #1024	@ 0x400
 8000664:	f104 0432 	add.w	r4, r4, #50	@ 0x32
 8000668:	f010 4500 	ands.w	r5, r0, #2147483648	@ 0x80000000
 800066c:	bf48      	it	mi
 800066e:	4240      	negmi	r0, r0
 8000670:	f04f 0100 	mov.w	r1, #0
 8000674:	e73e      	b.n	80004f4 <__adddf3+0x138>
 8000676:	bf00      	nop

08000678 <__aeabi_f2d>:
 8000678:	0042      	lsls	r2, r0, #1
 800067a:	ea4f 01e2 	mov.w	r1, r2, asr #3
 800067e:	ea4f 0131 	mov.w	r1, r1, rrx
 8000682:	ea4f 7002 	mov.w	r0, r2, lsl #28
 8000686:	bf1f      	itttt	ne
 8000688:	f012 437f 	andsne.w	r3, r2, #4278190080	@ 0xff000000
 800068c:	f093 4f7f 	teqne	r3, #4278190080	@ 0xff000000
 8000690:	f081 5160 	eorne.w	r1, r1, #939524096	@ 0x38000000
 8000694:	4770      	bxne	lr
 8000696:	f032 427f 	bics.w	r2, r2, #4278190080	@ 0xff000000
 800069a:	bf08      	it	eq
 800069c:	4770      	bxeq	lr
 800069e:	f093 4f7f 	teq	r3, #4278190080	@ 0xff000000
 80006a2:	bf04      	itt	eq
 80006a4:	f441 2100 	orreq.w	r1, r1, #524288	@ 0x80000
 80006a8:	4770      	bxeq	lr
 80006aa:	b530      	push	{r4, r5, lr}
 80006ac:	f44f 7460 	mov.w	r4, #896	@ 0x380
 80006b0:	f001 4500 	and.w	r5, r1, #2147483648	@ 0x80000000
 80006b4:	f021 4100 	bic.w	r1, r1, #2147483648	@ 0x80000000
 80006b8:	e71c      	b.n	80004f4 <__adddf3+0x138>
 80006ba:	bf00      	nop

080006bc <__aeabi_ul2d>:
 80006bc:	ea50 0201 	orrs.w	r2, r0, r1
 80006c0:	bf08      	it	eq
 80006c2:	4770      	bxeq	lr
 80006c4:	b530      	push	{r4, r5, lr}
 80006c6:	f04f 0500 	mov.w	r5, #0
 80006ca:	e00a      	b.n	80006e2 <__aeabi_l2d+0x16>

080006cc <__aeabi_l2d>:
 80006cc:	ea50 0201 	orrs.w	r2, r0, r1
 80006d0:	bf08      	it	eq
 80006d2:	4770      	bxeq	lr
 80006d4:	b530      	push	{r4, r5, lr}
 80006d6:	f011 4500 	ands.w	r5, r1, #2147483648	@ 0x80000000
 80006da:	d502      	bpl.n	80006e2 <__aeabi_l2d+0x16>
 80006dc:	4240      	negs	r0, r0
 80006de:	eb61 0141 	sbc.w	r1, r1, r1, lsl #1
 80006e2:	f44f 6480 	mov.w	r4, #1024	@ 0x400
 80006e6:	f104 0432 	add.w	r4, r4, #50	@ 0x32
 80006ea:	ea5f 5c91 	movs.w	ip, r1, lsr #22
 80006ee:	f43f aed8 	beq.w	80004a2 <__adddf3+0xe6>
 80006f2:	f04f 0203 	mov.w	r2, #3
 80006f6:	ea5f 0cdc 	movs.w	ip, ip, lsr #3
 80006fa:	bf18      	it	ne
 80006fc:	3203      	addne	r2, #3
 80006fe:	ea5f 0cdc 	movs.w	ip, ip, lsr #3
 8000702:	bf18      	it	ne
 8000704:	3203      	addne	r2, #3
 8000706:	eb02 02dc 	add.w	r2, r2, ip, lsr #3
 800070a:	f1c2 0320 	rsb	r3, r2, #32
 800070e:	fa00 fc03 	lsl.w	ip, r0, r3
 8000712:	fa20 f002 	lsr.w	r0, r0, r2
 8000716:	fa01 fe03 	lsl.w	lr, r1, r3
 800071a:	ea40 000e 	orr.w	r0, r0, lr
 800071e:	fa21 f102 	lsr.w	r1, r1, r2
 8000722:	4414      	add	r4, r2
 8000724:	e6bd      	b.n	80004a2 <__adddf3+0xe6>
 8000726:	bf00      	nop

08000728 <__aeabi_uldivmod>:
 8000728:	b953      	cbnz	r3, 8000740 <__aeabi_uldivmod+0x18>
 800072a:	b94a      	cbnz	r2, 8000740 <__aeabi_uldivmod+0x18>
 800072c:	2900      	cmp	r1, #0
 800072e:	bf08      	it	eq
 8000730:	2800      	cmpeq	r0, #0
 8000732:	bf1c      	itt	ne
 8000734:	f04f 31ff 	movne.w	r1, #4294967295	@ 0xffffffff
 8000738:	f04f 30ff 	movne.w	r0, #4294967295	@ 0xffffffff
 800073c:	f000 b9a2 	b.w	8000a84 <__aeabi_idiv0>
 8000740:	f1ad 0c08 	sub.w	ip, sp, #8
 8000744:	e96d ce04 	strd	ip, lr, [sp, #-16]!
 8000748:	f000 f83e 	bl	80007c8 <__udivmoddi4>
 800074c:	f8dd e004 	ldr.w	lr, [sp, #4]
 8000750:	e9dd 2302 	ldrd	r2, r3, [sp, #8]
 8000754:	b004      	add	sp, #16
 8000756:	4770      	bx	lr

08000758 <__aeabi_d2lz>:
 8000758:	b508      	push	{r3, lr}
 800075a:	4602      	mov	r2, r0
 800075c:	460b      	mov	r3, r1
 800075e:	ec43 2b17 	vmov	d7, r2, r3
 8000762:	eeb5 7bc0 	vcmpe.f64	d7, #0.0
 8000766:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 800076a:	d403      	bmi.n	8000774 <__aeabi_d2lz+0x1c>
 800076c:	e8bd 4008 	ldmia.w	sp!, {r3, lr}
 8000770:	f000 b80a 	b.w	8000788 <__aeabi_d2ulz>
 8000774:	eeb1 7b47 	vneg.f64	d7, d7
 8000778:	ec51 0b17 	vmov	r0, r1, d7
 800077c:	f000 f804 	bl	8000788 <__aeabi_d2ulz>
 8000780:	4240      	negs	r0, r0
 8000782:	eb61 0141 	sbc.w	r1, r1, r1, lsl #1
 8000786:	bd08      	pop	{r3, pc}

08000788 <__aeabi_d2ulz>:
 8000788:	ed9f 6b0b 	vldr	d6, [pc, #44]	@ 80007b8 <__aeabi_d2ulz+0x30>
 800078c:	ec41 0b17 	vmov	d7, r0, r1
 8000790:	ed9f 5b0b 	vldr	d5, [pc, #44]	@ 80007c0 <__aeabi_d2ulz+0x38>
 8000794:	ee27 6b06 	vmul.f64	d6, d7, d6
 8000798:	eebc 6bc6 	vcvt.u32.f64	s12, d6
 800079c:	eeb8 4b46 	vcvt.f64.u32	d4, s12
 80007a0:	eea4 7b45 	vfms.f64	d7, d4, d5
 80007a4:	eefc 7bc7 	vcvt.u32.f64	s15, d7
 80007a8:	ee16 1a10 	vmov	r1, s12
 80007ac:	ee17 0a90 	vmov	r0, s15
 80007b0:	4770      	bx	lr
 80007b2:	bf00      	nop
 80007b4:	f3af 8000 	nop.w
 80007b8:	00000000 	.word	0x00000000
 80007bc:	3df00000 	.word	0x3df00000
 80007c0:	00000000 	.word	0x00000000
 80007c4:	41f00000 	.word	0x41f00000

080007c8 <__udivmoddi4>:
 80007c8:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
 80007cc:	9d08      	ldr	r5, [sp, #32]
 80007ce:	460c      	mov	r4, r1
 80007d0:	2b00      	cmp	r3, #0
 80007d2:	d14e      	bne.n	8000872 <__udivmoddi4+0xaa>
 80007d4:	4694      	mov	ip, r2
 80007d6:	458c      	cmp	ip, r1
 80007d8:	4686      	mov	lr, r0
 80007da:	fab2 f282 	clz	r2, r2
 80007de:	d962      	bls.n	80008a6 <__udivmoddi4+0xde>
 80007e0:	b14a      	cbz	r2, 80007f6 <__udivmoddi4+0x2e>
 80007e2:	f1c2 0320 	rsb	r3, r2, #32
 80007e6:	4091      	lsls	r1, r2
 80007e8:	fa20 f303 	lsr.w	r3, r0, r3
 80007ec:	fa0c fc02 	lsl.w	ip, ip, r2
 80007f0:	4319      	orrs	r1, r3
 80007f2:	fa00 fe02 	lsl.w	lr, r0, r2
 80007f6:	ea4f 471c 	mov.w	r7, ip, lsr #16
 80007fa:	fa1f f68c 	uxth.w	r6, ip
 80007fe:	fbb1 f4f7 	udiv	r4, r1, r7
 8000802:	ea4f 431e 	mov.w	r3, lr, lsr #16
 8000806:	fb07 1114 	mls	r1, r7, r4, r1
 800080a:	ea43 4301 	orr.w	r3, r3, r1, lsl #16
 800080e:	fb04 f106 	mul.w	r1, r4, r6
 8000812:	4299      	cmp	r1, r3
 8000814:	d90a      	bls.n	800082c <__udivmoddi4+0x64>
 8000816:	eb1c 0303 	adds.w	r3, ip, r3
 800081a:	f104 30ff 	add.w	r0, r4, #4294967295	@ 0xffffffff
 800081e:	f080 8112 	bcs.w	8000a46 <__udivmoddi4+0x27e>
 8000822:	4299      	cmp	r1, r3
 8000824:	f240 810f 	bls.w	8000a46 <__udivmoddi4+0x27e>
 8000828:	3c02      	subs	r4, #2
 800082a:	4463      	add	r3, ip
 800082c:	1a59      	subs	r1, r3, r1
 800082e:	fa1f f38e 	uxth.w	r3, lr
 8000832:	fbb1 f0f7 	udiv	r0, r1, r7
 8000836:	fb07 1110 	mls	r1, r7, r0, r1
 800083a:	ea43 4301 	orr.w	r3, r3, r1, lsl #16
 800083e:	fb00 f606 	mul.w	r6, r0, r6
 8000842:	429e      	cmp	r6, r3
 8000844:	d90a      	bls.n	800085c <__udivmoddi4+0x94>
 8000846:	eb1c 0303 	adds.w	r3, ip, r3
 800084a:	f100 31ff 	add.w	r1, r0, #4294967295	@ 0xffffffff
 800084e:	f080 80fc 	bcs.w	8000a4a <__udivmoddi4+0x282>
 8000852:	429e      	cmp	r6, r3
 8000854:	f240 80f9 	bls.w	8000a4a <__udivmoddi4+0x282>
 8000858:	4463      	add	r3, ip
 800085a:	3802      	subs	r0, #2
 800085c:	1b9b      	subs	r3, r3, r6
 800085e:	ea40 4004 	orr.w	r0, r0, r4, lsl #16
 8000862:	2100      	movs	r1, #0
 8000864:	b11d      	cbz	r5, 800086e <__udivmoddi4+0xa6>
 8000866:	40d3      	lsrs	r3, r2
 8000868:	2200      	movs	r2, #0
 800086a:	e9c5 3200 	strd	r3, r2, [r5]
 800086e:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 8000872:	428b      	cmp	r3, r1
 8000874:	d905      	bls.n	8000882 <__udivmoddi4+0xba>
 8000876:	b10d      	cbz	r5, 800087c <__udivmoddi4+0xb4>
 8000878:	e9c5 0100 	strd	r0, r1, [r5]
 800087c:	2100      	movs	r1, #0
 800087e:	4608      	mov	r0, r1
 8000880:	e7f5      	b.n	800086e <__udivmoddi4+0xa6>
 8000882:	fab3 f183 	clz	r1, r3
 8000886:	2900      	cmp	r1, #0
 8000888:	d146      	bne.n	8000918 <__udivmoddi4+0x150>
 800088a:	42a3      	cmp	r3, r4
 800088c:	d302      	bcc.n	8000894 <__udivmoddi4+0xcc>
 800088e:	4290      	cmp	r0, r2
 8000890:	f0c0 80f0 	bcc.w	8000a74 <__udivmoddi4+0x2ac>
 8000894:	1a86      	subs	r6, r0, r2
 8000896:	eb64 0303 	sbc.w	r3, r4, r3
 800089a:	2001      	movs	r0, #1
 800089c:	2d00      	cmp	r5, #0
 800089e:	d0e6      	beq.n	800086e <__udivmoddi4+0xa6>
 80008a0:	e9c5 6300 	strd	r6, r3, [r5]
 80008a4:	e7e3      	b.n	800086e <__udivmoddi4+0xa6>
 80008a6:	2a00      	cmp	r2, #0
 80008a8:	f040 8090 	bne.w	80009cc <__udivmoddi4+0x204>
 80008ac:	eba1 040c 	sub.w	r4, r1, ip
 80008b0:	ea4f 481c 	mov.w	r8, ip, lsr #16
 80008b4:	fa1f f78c 	uxth.w	r7, ip
 80008b8:	2101      	movs	r1, #1
 80008ba:	fbb4 f6f8 	udiv	r6, r4, r8
 80008be:	ea4f 431e 	mov.w	r3, lr, lsr #16
 80008c2:	fb08 4416 	mls	r4, r8, r6, r4
 80008c6:	ea43 4304 	orr.w	r3, r3, r4, lsl #16
 80008ca:	fb07 f006 	mul.w	r0, r7, r6
 80008ce:	4298      	cmp	r0, r3
 80008d0:	d908      	bls.n	80008e4 <__udivmoddi4+0x11c>
 80008d2:	eb1c 0303 	adds.w	r3, ip, r3
 80008d6:	f106 34ff 	add.w	r4, r6, #4294967295	@ 0xffffffff
 80008da:	d202      	bcs.n	80008e2 <__udivmoddi4+0x11a>
 80008dc:	4298      	cmp	r0, r3
 80008de:	f200 80cd 	bhi.w	8000a7c <__udivmoddi4+0x2b4>
 80008e2:	4626      	mov	r6, r4
 80008e4:	1a1c      	subs	r4, r3, r0
 80008e6:	fa1f f38e 	uxth.w	r3, lr
 80008ea:	fbb4 f0f8 	udiv	r0, r4, r8
 80008ee:	fb08 4410 	mls	r4, r8, r0, r4
 80008f2:	ea43 4304 	orr.w	r3, r3, r4, lsl #16
 80008f6:	fb00 f707 	mul.w	r7, r0, r7
 80008fa:	429f      	cmp	r7, r3
 80008fc:	d908      	bls.n	8000910 <__udivmoddi4+0x148>
 80008fe:	eb1c 0303 	adds.w	r3, ip, r3
 8000902:	f100 34ff 	add.w	r4, r0, #4294967295	@ 0xffffffff
 8000906:	d202      	bcs.n	800090e <__udivmoddi4+0x146>
 8000908:	429f      	cmp	r7, r3
 800090a:	f200 80b0 	bhi.w	8000a6e <__udivmoddi4+0x2a6>
 800090e:	4620      	mov	r0, r4
 8000910:	1bdb      	subs	r3, r3, r7
 8000912:	ea40 4006 	orr.w	r0, r0, r6, lsl #16
 8000916:	e7a5      	b.n	8000864 <__udivmoddi4+0x9c>
 8000918:	f1c1 0620 	rsb	r6, r1, #32
 800091c:	408b      	lsls	r3, r1
 800091e:	fa22 f706 	lsr.w	r7, r2, r6
 8000922:	431f      	orrs	r7, r3
 8000924:	fa20 fc06 	lsr.w	ip, r0, r6
 8000928:	fa04 f301 	lsl.w	r3, r4, r1
 800092c:	ea43 030c 	orr.w	r3, r3, ip
 8000930:	40f4      	lsrs	r4, r6
 8000932:	fa00 f801 	lsl.w	r8, r0, r1
 8000936:	0c38      	lsrs	r0, r7, #16
 8000938:	ea4f 4913 	mov.w	r9, r3, lsr #16
 800093c:	fbb4 fef0 	udiv	lr, r4, r0
 8000940:	fa1f fc87 	uxth.w	ip, r7
 8000944:	fb00 441e 	mls	r4, r0, lr, r4
 8000948:	ea49 4404 	orr.w	r4, r9, r4, lsl #16
 800094c:	fb0e f90c 	mul.w	r9, lr, ip
 8000950:	45a1      	cmp	r9, r4
 8000952:	fa02 f201 	lsl.w	r2, r2, r1
 8000956:	d90a      	bls.n	800096e <__udivmoddi4+0x1a6>
 8000958:	193c      	adds	r4, r7, r4
 800095a:	f10e 3aff 	add.w	sl, lr, #4294967295	@ 0xffffffff
 800095e:	f080 8084 	bcs.w	8000a6a <__udivmoddi4+0x2a2>
 8000962:	45a1      	cmp	r9, r4
 8000964:	f240 8081 	bls.w	8000a6a <__udivmoddi4+0x2a2>
 8000968:	f1ae 0e02 	sub.w	lr, lr, #2
 800096c:	443c      	add	r4, r7
 800096e:	eba4 0409 	sub.w	r4, r4, r9
 8000972:	fa1f f983 	uxth.w	r9, r3
 8000976:	fbb4 f3f0 	udiv	r3, r4, r0
 800097a:	fb00 4413 	mls	r4, r0, r3, r4
 800097e:	ea49 4404 	orr.w	r4, r9, r4, lsl #16
 8000982:	fb03 fc0c 	mul.w	ip, r3, ip
 8000986:	45a4      	cmp	ip, r4
 8000988:	d907      	bls.n	800099a <__udivmoddi4+0x1d2>
 800098a:	193c      	adds	r4, r7, r4
 800098c:	f103 30ff 	add.w	r0, r3, #4294967295	@ 0xffffffff
 8000990:	d267      	bcs.n	8000a62 <__udivmoddi4+0x29a>
 8000992:	45a4      	cmp	ip, r4
 8000994:	d965      	bls.n	8000a62 <__udivmoddi4+0x29a>
 8000996:	3b02      	subs	r3, #2
 8000998:	443c      	add	r4, r7
 800099a:	ea43 400e 	orr.w	r0, r3, lr, lsl #16
 800099e:	fba0 9302 	umull	r9, r3, r0, r2
 80009a2:	eba4 040c 	sub.w	r4, r4, ip
 80009a6:	429c      	cmp	r4, r3
 80009a8:	46ce      	mov	lr, r9
 80009aa:	469c      	mov	ip, r3
 80009ac:	d351      	bcc.n	8000a52 <__udivmoddi4+0x28a>
 80009ae:	d04e      	beq.n	8000a4e <__udivmoddi4+0x286>
 80009b0:	b155      	cbz	r5, 80009c8 <__udivmoddi4+0x200>
 80009b2:	ebb8 030e 	subs.w	r3, r8, lr
 80009b6:	eb64 040c 	sbc.w	r4, r4, ip
 80009ba:	fa04 f606 	lsl.w	r6, r4, r6
 80009be:	40cb      	lsrs	r3, r1
 80009c0:	431e      	orrs	r6, r3
 80009c2:	40cc      	lsrs	r4, r1
 80009c4:	e9c5 6400 	strd	r6, r4, [r5]
 80009c8:	2100      	movs	r1, #0
 80009ca:	e750      	b.n	800086e <__udivmoddi4+0xa6>
 80009cc:	f1c2 0320 	rsb	r3, r2, #32
 80009d0:	fa20 f103 	lsr.w	r1, r0, r3
 80009d4:	fa0c fc02 	lsl.w	ip, ip, r2
 80009d8:	fa24 f303 	lsr.w	r3, r4, r3
 80009dc:	4094      	lsls	r4, r2
 80009de:	430c      	orrs	r4, r1
 80009e0:	ea4f 481c 	mov.w	r8, ip, lsr #16
 80009e4:	fa00 fe02 	lsl.w	lr, r0, r2
 80009e8:	fa1f f78c 	uxth.w	r7, ip
 80009ec:	fbb3 f0f8 	udiv	r0, r3, r8
 80009f0:	fb08 3110 	mls	r1, r8, r0, r3
 80009f4:	0c23      	lsrs	r3, r4, #16
 80009f6:	ea43 4301 	orr.w	r3, r3, r1, lsl #16
 80009fa:	fb00 f107 	mul.w	r1, r0, r7
 80009fe:	4299      	cmp	r1, r3
 8000a00:	d908      	bls.n	8000a14 <__udivmoddi4+0x24c>
 8000a02:	eb1c 0303 	adds.w	r3, ip, r3
 8000a06:	f100 36ff 	add.w	r6, r0, #4294967295	@ 0xffffffff
 8000a0a:	d22c      	bcs.n	8000a66 <__udivmoddi4+0x29e>
 8000a0c:	4299      	cmp	r1, r3
 8000a0e:	d92a      	bls.n	8000a66 <__udivmoddi4+0x29e>
 8000a10:	3802      	subs	r0, #2
 8000a12:	4463      	add	r3, ip
 8000a14:	1a5b      	subs	r3, r3, r1
 8000a16:	b2a4      	uxth	r4, r4
 8000a18:	fbb3 f1f8 	udiv	r1, r3, r8
 8000a1c:	fb08 3311 	mls	r3, r8, r1, r3
 8000a20:	ea44 4403 	orr.w	r4, r4, r3, lsl #16
 8000a24:	fb01 f307 	mul.w	r3, r1, r7
 8000a28:	42a3      	cmp	r3, r4
 8000a2a:	d908      	bls.n	8000a3e <__udivmoddi4+0x276>
 8000a2c:	eb1c 0404 	adds.w	r4, ip, r4
 8000a30:	f101 36ff 	add.w	r6, r1, #4294967295	@ 0xffffffff
 8000a34:	d213      	bcs.n	8000a5e <__udivmoddi4+0x296>
 8000a36:	42a3      	cmp	r3, r4
 8000a38:	d911      	bls.n	8000a5e <__udivmoddi4+0x296>
 8000a3a:	3902      	subs	r1, #2
 8000a3c:	4464      	add	r4, ip
 8000a3e:	1ae4      	subs	r4, r4, r3
 8000a40:	ea41 4100 	orr.w	r1, r1, r0, lsl #16
 8000a44:	e739      	b.n	80008ba <__udivmoddi4+0xf2>
 8000a46:	4604      	mov	r4, r0
 8000a48:	e6f0      	b.n	800082c <__udivmoddi4+0x64>
 8000a4a:	4608      	mov	r0, r1
 8000a4c:	e706      	b.n	800085c <__udivmoddi4+0x94>
 8000a4e:	45c8      	cmp	r8, r9
 8000a50:	d2ae      	bcs.n	80009b0 <__udivmoddi4+0x1e8>
 8000a52:	ebb9 0e02 	subs.w	lr, r9, r2
 8000a56:	eb63 0c07 	sbc.w	ip, r3, r7
 8000a5a:	3801      	subs	r0, #1
 8000a5c:	e7a8      	b.n	80009b0 <__udivmoddi4+0x1e8>
 8000a5e:	4631      	mov	r1, r6
 8000a60:	e7ed      	b.n	8000a3e <__udivmoddi4+0x276>
 8000a62:	4603      	mov	r3, r0
 8000a64:	e799      	b.n	800099a <__udivmoddi4+0x1d2>
 8000a66:	4630      	mov	r0, r6
 8000a68:	e7d4      	b.n	8000a14 <__udivmoddi4+0x24c>
 8000a6a:	46d6      	mov	lr, sl
 8000a6c:	e77f      	b.n	800096e <__udivmoddi4+0x1a6>
 8000a6e:	4463      	add	r3, ip
 8000a70:	3802      	subs	r0, #2
 8000a72:	e74d      	b.n	8000910 <__udivmoddi4+0x148>
 8000a74:	4606      	mov	r6, r0
 8000a76:	4623      	mov	r3, r4
 8000a78:	4608      	mov	r0, r1
 8000a7a:	e70f      	b.n	800089c <__udivmoddi4+0xd4>
 8000a7c:	3e02      	subs	r6, #2
 8000a7e:	4463      	add	r3, ip
 8000a80:	e730      	b.n	80008e4 <__udivmoddi4+0x11c>
 8000a82:	bf00      	nop

08000a84 <__aeabi_idiv0>:
 8000a84:	4770      	bx	lr
 8000a86:	bf00      	nop

08000a88 <case_insensitive_strcmp>:
    return version;
}

/* Case insensitive string comparison, doesn't consider two NULL pointers equal though */
static int case_insensitive_strcmp(const unsigned char *string1, const unsigned char *string2)
{
 8000a88:	b480      	push	{r7}
 8000a8a:	b085      	sub	sp, #20
 8000a8c:	af00      	add	r7, sp, #0
 8000a8e:	6078      	str	r0, [r7, #4]
 8000a90:	6039      	str	r1, [r7, #0]
    if ((string1 == NULL) || (string2 == NULL))
 8000a92:	687b      	ldr	r3, [r7, #4]
 8000a94:	2b00      	cmp	r3, #0
 8000a96:	d002      	beq.n	8000a9e <case_insensitive_strcmp+0x16>
 8000a98:	683b      	ldr	r3, [r7, #0]
 8000a9a:	2b00      	cmp	r3, #0
 8000a9c:	d101      	bne.n	8000aa2 <case_insensitive_strcmp+0x1a>
    {
        return 1;
 8000a9e:	2301      	movs	r3, #1
 8000aa0:	e056      	b.n	8000b50 <case_insensitive_strcmp+0xc8>
    }

    if (string1 == string2)
 8000aa2:	687a      	ldr	r2, [r7, #4]
 8000aa4:	683b      	ldr	r3, [r7, #0]
 8000aa6:	429a      	cmp	r2, r3
 8000aa8:	d10d      	bne.n	8000ac6 <case_insensitive_strcmp+0x3e>
    {
        return 0;
 8000aaa:	2300      	movs	r3, #0
 8000aac:	e050      	b.n	8000b50 <case_insensitive_strcmp+0xc8>
    }

    for(; tolower(*string1) == tolower(*string2); (void)string1++, string2++)
    {
        if (*string1 == '\0')
 8000aae:	687b      	ldr	r3, [r7, #4]
 8000ab0:	781b      	ldrb	r3, [r3, #0]
 8000ab2:	2b00      	cmp	r3, #0
 8000ab4:	d101      	bne.n	8000aba <case_insensitive_strcmp+0x32>
        {
            return 0;
 8000ab6:	2300      	movs	r3, #0
 8000ab8:	e04a      	b.n	8000b50 <case_insensitive_strcmp+0xc8>
    for(; tolower(*string1) == tolower(*string2); (void)string1++, string2++)
 8000aba:	687b      	ldr	r3, [r7, #4]
 8000abc:	3301      	adds	r3, #1
 8000abe:	607b      	str	r3, [r7, #4]
 8000ac0:	683b      	ldr	r3, [r7, #0]
 8000ac2:	3301      	adds	r3, #1
 8000ac4:	603b      	str	r3, [r7, #0]
 8000ac6:	687b      	ldr	r3, [r7, #4]
 8000ac8:	781b      	ldrb	r3, [r3, #0]
 8000aca:	73fb      	strb	r3, [r7, #15]
 8000acc:	7bfb      	ldrb	r3, [r7, #15]
 8000ace:	3301      	adds	r3, #1
 8000ad0:	4a22      	ldr	r2, [pc, #136]	@ (8000b5c <case_insensitive_strcmp+0xd4>)
 8000ad2:	4413      	add	r3, r2
 8000ad4:	781b      	ldrb	r3, [r3, #0]
 8000ad6:	f003 0303 	and.w	r3, r3, #3
 8000ada:	2b01      	cmp	r3, #1
 8000adc:	d103      	bne.n	8000ae6 <case_insensitive_strcmp+0x5e>
 8000ade:	7bfb      	ldrb	r3, [r7, #15]
 8000ae0:	f103 0220 	add.w	r2, r3, #32
 8000ae4:	e000      	b.n	8000ae8 <case_insensitive_strcmp+0x60>
 8000ae6:	7bfa      	ldrb	r2, [r7, #15]
 8000ae8:	683b      	ldr	r3, [r7, #0]
 8000aea:	781b      	ldrb	r3, [r3, #0]
 8000aec:	73bb      	strb	r3, [r7, #14]
 8000aee:	7bbb      	ldrb	r3, [r7, #14]
 8000af0:	3301      	adds	r3, #1
 8000af2:	491a      	ldr	r1, [pc, #104]	@ (8000b5c <case_insensitive_strcmp+0xd4>)
 8000af4:	440b      	add	r3, r1
 8000af6:	781b      	ldrb	r3, [r3, #0]
 8000af8:	f003 0303 	and.w	r3, r3, #3
 8000afc:	2b01      	cmp	r3, #1
 8000afe:	d102      	bne.n	8000b06 <case_insensitive_strcmp+0x7e>
 8000b00:	7bbb      	ldrb	r3, [r7, #14]
 8000b02:	3320      	adds	r3, #32
 8000b04:	e000      	b.n	8000b08 <case_insensitive_strcmp+0x80>
 8000b06:	7bbb      	ldrb	r3, [r7, #14]
 8000b08:	429a      	cmp	r2, r3
 8000b0a:	d0d0      	beq.n	8000aae <case_insensitive_strcmp+0x26>
        }
    }

    return tolower(*string1) - tolower(*string2);
 8000b0c:	687b      	ldr	r3, [r7, #4]
 8000b0e:	781b      	ldrb	r3, [r3, #0]
 8000b10:	737b      	strb	r3, [r7, #13]
 8000b12:	7b7b      	ldrb	r3, [r7, #13]
 8000b14:	3301      	adds	r3, #1
 8000b16:	4a11      	ldr	r2, [pc, #68]	@ (8000b5c <case_insensitive_strcmp+0xd4>)
 8000b18:	4413      	add	r3, r2
 8000b1a:	781b      	ldrb	r3, [r3, #0]
 8000b1c:	f003 0303 	and.w	r3, r3, #3
 8000b20:	2b01      	cmp	r3, #1
 8000b22:	d103      	bne.n	8000b2c <case_insensitive_strcmp+0xa4>
 8000b24:	7b7b      	ldrb	r3, [r7, #13]
 8000b26:	f103 0220 	add.w	r2, r3, #32
 8000b2a:	e000      	b.n	8000b2e <case_insensitive_strcmp+0xa6>
 8000b2c:	7b7a      	ldrb	r2, [r7, #13]
 8000b2e:	683b      	ldr	r3, [r7, #0]
 8000b30:	781b      	ldrb	r3, [r3, #0]
 8000b32:	733b      	strb	r3, [r7, #12]
 8000b34:	7b3b      	ldrb	r3, [r7, #12]
 8000b36:	3301      	adds	r3, #1
 8000b38:	4908      	ldr	r1, [pc, #32]	@ (8000b5c <case_insensitive_strcmp+0xd4>)
 8000b3a:	440b      	add	r3, r1
 8000b3c:	781b      	ldrb	r3, [r3, #0]
 8000b3e:	f003 0303 	and.w	r3, r3, #3
 8000b42:	2b01      	cmp	r3, #1
 8000b44:	d102      	bne.n	8000b4c <case_insensitive_strcmp+0xc4>
 8000b46:	7b3b      	ldrb	r3, [r7, #12]
 8000b48:	3320      	adds	r3, #32
 8000b4a:	e000      	b.n	8000b4e <case_insensitive_strcmp+0xc6>
 8000b4c:	7b3b      	ldrb	r3, [r7, #12]
 8000b4e:	1ad3      	subs	r3, r2, r3
}
 8000b50:	4618      	mov	r0, r3
 8000b52:	3714      	adds	r7, #20
 8000b54:	46bd      	mov	sp, r7
 8000b56:	f85d 7b04 	ldr.w	r7, [sp], #4
 8000b5a:	4770      	bx	lr
 8000b5c:	08030880 	.word	0x08030880

08000b60 <cJSON_New_Item>:
    }
}

/* Internal constructor. */
static cJSON *cJSON_New_Item(const internal_hooks * const hooks)
{
 8000b60:	b580      	push	{r7, lr}
 8000b62:	b084      	sub	sp, #16
 8000b64:	af00      	add	r7, sp, #0
 8000b66:	6078      	str	r0, [r7, #4]
    cJSON* node = (cJSON*)hooks->allocate(sizeof(cJSON));
 8000b68:	687b      	ldr	r3, [r7, #4]
 8000b6a:	681b      	ldr	r3, [r3, #0]
 8000b6c:	2028      	movs	r0, #40	@ 0x28
 8000b6e:	4798      	blx	r3
 8000b70:	60f8      	str	r0, [r7, #12]
    if (node)
 8000b72:	68fb      	ldr	r3, [r7, #12]
 8000b74:	2b00      	cmp	r3, #0
 8000b76:	d004      	beq.n	8000b82 <cJSON_New_Item+0x22>
    {
        memset(node, '\0', sizeof(cJSON));
 8000b78:	2228      	movs	r2, #40	@ 0x28
 8000b7a:	2100      	movs	r1, #0
 8000b7c:	68f8      	ldr	r0, [r7, #12]
 8000b7e:	f028 fe57 	bl	8029830 <memset>
    }

    return node;
 8000b82:	68fb      	ldr	r3, [r7, #12]
}
 8000b84:	4618      	mov	r0, r3
 8000b86:	3710      	adds	r7, #16
 8000b88:	46bd      	mov	sp, r7
 8000b8a:	bd80      	pop	{r7, pc}

08000b8c <cJSON_Delete>:

/* Delete a cJSON structure. */
CJSON_PUBLIC(void) cJSON_Delete(cJSON *item)
{
 8000b8c:	b580      	push	{r7, lr}
 8000b8e:	b084      	sub	sp, #16
 8000b90:	af00      	add	r7, sp, #0
 8000b92:	6078      	str	r0, [r7, #4]
    cJSON *next = NULL;
 8000b94:	2300      	movs	r3, #0
 8000b96:	60fb      	str	r3, [r7, #12]
    while (item != NULL)
 8000b98:	e03d      	b.n	8000c16 <cJSON_Delete+0x8a>
    {
        next = item->next;
 8000b9a:	687b      	ldr	r3, [r7, #4]
 8000b9c:	681b      	ldr	r3, [r3, #0]
 8000b9e:	60fb      	str	r3, [r7, #12]
        if (!(item->type & cJSON_IsReference) && (item->child != NULL))
 8000ba0:	687b      	ldr	r3, [r7, #4]
 8000ba2:	68db      	ldr	r3, [r3, #12]
 8000ba4:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 8000ba8:	2b00      	cmp	r3, #0
 8000baa:	d108      	bne.n	8000bbe <cJSON_Delete+0x32>
 8000bac:	687b      	ldr	r3, [r7, #4]
 8000bae:	689b      	ldr	r3, [r3, #8]
 8000bb0:	2b00      	cmp	r3, #0
 8000bb2:	d004      	beq.n	8000bbe <cJSON_Delete+0x32>
        {
            cJSON_Delete(item->child);
 8000bb4:	687b      	ldr	r3, [r7, #4]
 8000bb6:	689b      	ldr	r3, [r3, #8]
 8000bb8:	4618      	mov	r0, r3
 8000bba:	f7ff ffe7 	bl	8000b8c <cJSON_Delete>
        }
        if (!(item->type & cJSON_IsReference) && (item->valuestring != NULL))
 8000bbe:	687b      	ldr	r3, [r7, #4]
 8000bc0:	68db      	ldr	r3, [r3, #12]
 8000bc2:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 8000bc6:	2b00      	cmp	r3, #0
 8000bc8:	d10c      	bne.n	8000be4 <cJSON_Delete+0x58>
 8000bca:	687b      	ldr	r3, [r7, #4]
 8000bcc:	691b      	ldr	r3, [r3, #16]
 8000bce:	2b00      	cmp	r3, #0
 8000bd0:	d008      	beq.n	8000be4 <cJSON_Delete+0x58>
        {
            global_hooks.deallocate(item->valuestring);
 8000bd2:	4b15      	ldr	r3, [pc, #84]	@ (8000c28 <cJSON_Delete+0x9c>)
 8000bd4:	685b      	ldr	r3, [r3, #4]
 8000bd6:	687a      	ldr	r2, [r7, #4]
 8000bd8:	6912      	ldr	r2, [r2, #16]
 8000bda:	4610      	mov	r0, r2
 8000bdc:	4798      	blx	r3
            item->valuestring = NULL;
 8000bde:	687b      	ldr	r3, [r7, #4]
 8000be0:	2200      	movs	r2, #0
 8000be2:	611a      	str	r2, [r3, #16]
        }
        if (!(item->type & cJSON_StringIsConst) && (item->string != NULL))
 8000be4:	687b      	ldr	r3, [r7, #4]
 8000be6:	68db      	ldr	r3, [r3, #12]
 8000be8:	f403 7300 	and.w	r3, r3, #512	@ 0x200
 8000bec:	2b00      	cmp	r3, #0
 8000bee:	d10c      	bne.n	8000c0a <cJSON_Delete+0x7e>
 8000bf0:	687b      	ldr	r3, [r7, #4]
 8000bf2:	6a1b      	ldr	r3, [r3, #32]
 8000bf4:	2b00      	cmp	r3, #0
 8000bf6:	d008      	beq.n	8000c0a <cJSON_Delete+0x7e>
        {
            global_hooks.deallocate(item->string);
 8000bf8:	4b0b      	ldr	r3, [pc, #44]	@ (8000c28 <cJSON_Delete+0x9c>)
 8000bfa:	685b      	ldr	r3, [r3, #4]
 8000bfc:	687a      	ldr	r2, [r7, #4]
 8000bfe:	6a12      	ldr	r2, [r2, #32]
 8000c00:	4610      	mov	r0, r2
 8000c02:	4798      	blx	r3
            item->string = NULL;
 8000c04:	687b      	ldr	r3, [r7, #4]
 8000c06:	2200      	movs	r2, #0
 8000c08:	621a      	str	r2, [r3, #32]
        }
        global_hooks.deallocate(item);
 8000c0a:	4b07      	ldr	r3, [pc, #28]	@ (8000c28 <cJSON_Delete+0x9c>)
 8000c0c:	685b      	ldr	r3, [r3, #4]
 8000c0e:	6878      	ldr	r0, [r7, #4]
 8000c10:	4798      	blx	r3
        item = next;
 8000c12:	68fb      	ldr	r3, [r7, #12]
 8000c14:	607b      	str	r3, [r7, #4]
    while (item != NULL)
 8000c16:	687b      	ldr	r3, [r7, #4]
 8000c18:	2b00      	cmp	r3, #0
 8000c1a:	d1be      	bne.n	8000b9a <cJSON_Delete+0xe>
    }
}
 8000c1c:	bf00      	nop
 8000c1e:	bf00      	nop
 8000c20:	3710      	adds	r7, #16
 8000c22:	46bd      	mov	sp, r7
 8000c24:	bd80      	pop	{r7, pc}
 8000c26:	bf00      	nop
 8000c28:	24000000 	.word	0x24000000

08000c2c <get_decimal_point>:

/* get the decimal point character of the current locale */
static unsigned char get_decimal_point(void)
{
 8000c2c:	b480      	push	{r7}
 8000c2e:	af00      	add	r7, sp, #0
#ifdef ENABLE_LOCALES
    struct lconv *lconv = localeconv();
    return (unsigned char) lconv->decimal_point[0];
#else
    return '.';
 8000c30:	232e      	movs	r3, #46	@ 0x2e
#endif
}
 8000c32:	4618      	mov	r0, r3
 8000c34:	46bd      	mov	sp, r7
 8000c36:	f85d 7b04 	ldr.w	r7, [sp], #4
 8000c3a:	4770      	bx	lr
 8000c3c:	0000      	movs	r0, r0
	...

08000c40 <parse_number>:
/* get a pointer to the buffer at the position */
#define buffer_at_offset(buffer) ((buffer)->content + (buffer)->offset)

/* Parse the input text to generate a number, and populate the result into item. */
static cJSON_bool parse_number(cJSON * const item, parse_buffer * const input_buffer)
{
 8000c40:	b580      	push	{r7, lr}
 8000c42:	b098      	sub	sp, #96	@ 0x60
 8000c44:	af00      	add	r7, sp, #0
 8000c46:	6078      	str	r0, [r7, #4]
 8000c48:	6039      	str	r1, [r7, #0]
    double number = 0;
 8000c4a:	f04f 0200 	mov.w	r2, #0
 8000c4e:	f04f 0300 	mov.w	r3, #0
 8000c52:	e9c7 2314 	strd	r2, r3, [r7, #80]	@ 0x50
    unsigned char *after_end = NULL;
 8000c56:	2300      	movs	r3, #0
 8000c58:	64bb      	str	r3, [r7, #72]	@ 0x48
    unsigned char number_c_string[64];
    unsigned char decimal_point = get_decimal_point();
 8000c5a:	f7ff ffe7 	bl	8000c2c <get_decimal_point>
 8000c5e:	4603      	mov	r3, r0
 8000c60:	f887 304f 	strb.w	r3, [r7, #79]	@ 0x4f
    size_t i = 0;
 8000c64:	2300      	movs	r3, #0
 8000c66:	65fb      	str	r3, [r7, #92]	@ 0x5c

    if ((input_buffer == NULL) || (input_buffer->content == NULL))
 8000c68:	683b      	ldr	r3, [r7, #0]
 8000c6a:	2b00      	cmp	r3, #0
 8000c6c:	d003      	beq.n	8000c76 <parse_number+0x36>
 8000c6e:	683b      	ldr	r3, [r7, #0]
 8000c70:	681b      	ldr	r3, [r3, #0]
 8000c72:	2b00      	cmp	r3, #0
 8000c74:	d101      	bne.n	8000c7a <parse_number+0x3a>
    {
        return false;
 8000c76:	2300      	movs	r3, #0
 8000c78:	e09f      	b.n	8000dba <parse_number+0x17a>
    }

    /* copy the number into a temporary buffer and replace '.' with the decimal point
     * of the current locale (for strtod)
     * This also takes care of '\0' not necessarily being available for marking the end of the input */
    for (i = 0; (i < (sizeof(number_c_string) - 1)) && can_access_at_index(input_buffer, i); i++)
 8000c7a:	2300      	movs	r3, #0
 8000c7c:	65fb      	str	r3, [r7, #92]	@ 0x5c
 8000c7e:	e03d      	b.n	8000cfc <parse_number+0xbc>
    {
        switch (buffer_at_offset(input_buffer)[i])
 8000c80:	683b      	ldr	r3, [r7, #0]
 8000c82:	681a      	ldr	r2, [r3, #0]
 8000c84:	683b      	ldr	r3, [r7, #0]
 8000c86:	6899      	ldr	r1, [r3, #8]
 8000c88:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 8000c8a:	440b      	add	r3, r1
 8000c8c:	4413      	add	r3, r2
 8000c8e:	781b      	ldrb	r3, [r3, #0]
 8000c90:	2b45      	cmp	r3, #69	@ 0x45
 8000c92:	dc17      	bgt.n	8000cc4 <parse_number+0x84>
 8000c94:	2b2b      	cmp	r3, #43	@ 0x2b
 8000c96:	db40      	blt.n	8000d1a <parse_number+0xda>
 8000c98:	3b2b      	subs	r3, #43	@ 0x2b
 8000c9a:	2201      	movs	r2, #1
 8000c9c:	409a      	lsls	r2, r3
 8000c9e:	4b4e      	ldr	r3, [pc, #312]	@ (8000dd8 <parse_number+0x198>)
 8000ca0:	4013      	ands	r3, r2
 8000ca2:	2b00      	cmp	r3, #0
 8000ca4:	bf14      	ite	ne
 8000ca6:	2301      	movne	r3, #1
 8000ca8:	2300      	moveq	r3, #0
 8000caa:	b2db      	uxtb	r3, r3
 8000cac:	2b00      	cmp	r3, #0
 8000cae:	d10b      	bne.n	8000cc8 <parse_number+0x88>
 8000cb0:	f002 0308 	and.w	r3, r2, #8
 8000cb4:	2b00      	cmp	r3, #0
 8000cb6:	bf14      	ite	ne
 8000cb8:	2301      	movne	r3, #1
 8000cba:	2300      	moveq	r3, #0
 8000cbc:	b2db      	uxtb	r3, r3
 8000cbe:	2b00      	cmp	r3, #0
 8000cc0:	d111      	bne.n	8000ce6 <parse_number+0xa6>
            case '.':
                number_c_string[i] = decimal_point;
                break;

            default:
                goto loop_end;
 8000cc2:	e02a      	b.n	8000d1a <parse_number+0xda>
        switch (buffer_at_offset(input_buffer)[i])
 8000cc4:	2b65      	cmp	r3, #101	@ 0x65
 8000cc6:	d128      	bne.n	8000d1a <parse_number+0xda>
                number_c_string[i] = buffer_at_offset(input_buffer)[i];
 8000cc8:	683b      	ldr	r3, [r7, #0]
 8000cca:	681a      	ldr	r2, [r3, #0]
 8000ccc:	683b      	ldr	r3, [r7, #0]
 8000cce:	6899      	ldr	r1, [r3, #8]
 8000cd0:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 8000cd2:	440b      	add	r3, r1
 8000cd4:	4413      	add	r3, r2
 8000cd6:	7819      	ldrb	r1, [r3, #0]
 8000cd8:	f107 0208 	add.w	r2, r7, #8
 8000cdc:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 8000cde:	4413      	add	r3, r2
 8000ce0:	460a      	mov	r2, r1
 8000ce2:	701a      	strb	r2, [r3, #0]
                break;
 8000ce4:	e007      	b.n	8000cf6 <parse_number+0xb6>
                number_c_string[i] = decimal_point;
 8000ce6:	f107 0208 	add.w	r2, r7, #8
 8000cea:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 8000cec:	4413      	add	r3, r2
 8000cee:	f897 204f 	ldrb.w	r2, [r7, #79]	@ 0x4f
 8000cf2:	701a      	strb	r2, [r3, #0]
                break;
 8000cf4:	bf00      	nop
    for (i = 0; (i < (sizeof(number_c_string) - 1)) && can_access_at_index(input_buffer, i); i++)
 8000cf6:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 8000cf8:	3301      	adds	r3, #1
 8000cfa:	65fb      	str	r3, [r7, #92]	@ 0x5c
 8000cfc:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 8000cfe:	2b3e      	cmp	r3, #62	@ 0x3e
 8000d00:	d80d      	bhi.n	8000d1e <parse_number+0xde>
 8000d02:	683b      	ldr	r3, [r7, #0]
 8000d04:	2b00      	cmp	r3, #0
 8000d06:	d00a      	beq.n	8000d1e <parse_number+0xde>
 8000d08:	683b      	ldr	r3, [r7, #0]
 8000d0a:	689a      	ldr	r2, [r3, #8]
 8000d0c:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 8000d0e:	441a      	add	r2, r3
 8000d10:	683b      	ldr	r3, [r7, #0]
 8000d12:	685b      	ldr	r3, [r3, #4]
 8000d14:	429a      	cmp	r2, r3
 8000d16:	d3b3      	bcc.n	8000c80 <parse_number+0x40>
        }
    }
loop_end:
 8000d18:	e001      	b.n	8000d1e <parse_number+0xde>
                goto loop_end;
 8000d1a:	bf00      	nop
 8000d1c:	e000      	b.n	8000d20 <parse_number+0xe0>
loop_end:
 8000d1e:	bf00      	nop
    number_c_string[i] = '\0';
 8000d20:	f107 0208 	add.w	r2, r7, #8
 8000d24:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 8000d26:	4413      	add	r3, r2
 8000d28:	2200      	movs	r2, #0
 8000d2a:	701a      	strb	r2, [r3, #0]

    number = strtod((const char*)number_c_string, (char**)&after_end);
 8000d2c:	f107 0248 	add.w	r2, r7, #72	@ 0x48
 8000d30:	f107 0308 	add.w	r3, r7, #8
 8000d34:	4611      	mov	r1, r2
 8000d36:	4618      	mov	r0, r3
 8000d38:	f027 fee4 	bl	8028b04 <strtod>
 8000d3c:	ed87 0b14 	vstr	d0, [r7, #80]	@ 0x50
    if (number_c_string == after_end)
 8000d40:	6cba      	ldr	r2, [r7, #72]	@ 0x48
 8000d42:	f107 0308 	add.w	r3, r7, #8
 8000d46:	429a      	cmp	r2, r3
 8000d48:	d101      	bne.n	8000d4e <parse_number+0x10e>
    {
        return false; /* parse_error */
 8000d4a:	2300      	movs	r3, #0
 8000d4c:	e035      	b.n	8000dba <parse_number+0x17a>
    }

    item->valuedouble = number;
 8000d4e:	6879      	ldr	r1, [r7, #4]
 8000d50:	e9d7 2314 	ldrd	r2, r3, [r7, #80]	@ 0x50
 8000d54:	e9c1 2306 	strd	r2, r3, [r1, #24]

    /* use saturation in case of overflow */
    if (number >= INT_MAX)
 8000d58:	ed97 7b14 	vldr	d7, [r7, #80]	@ 0x50
 8000d5c:	ed9f 6b1a 	vldr	d6, [pc, #104]	@ 8000dc8 <parse_number+0x188>
 8000d60:	eeb4 7bc6 	vcmpe.f64	d7, d6
 8000d64:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 8000d68:	db04      	blt.n	8000d74 <parse_number+0x134>
    {
        item->valueint = INT_MAX;
 8000d6a:	687b      	ldr	r3, [r7, #4]
 8000d6c:	f06f 4200 	mvn.w	r2, #2147483648	@ 0x80000000
 8000d70:	615a      	str	r2, [r3, #20]
 8000d72:	e015      	b.n	8000da0 <parse_number+0x160>
    }
    else if (number <= (double)INT_MIN)
 8000d74:	ed97 7b14 	vldr	d7, [r7, #80]	@ 0x50
 8000d78:	ed9f 6b15 	vldr	d6, [pc, #84]	@ 8000dd0 <parse_number+0x190>
 8000d7c:	eeb4 7bc6 	vcmpe.f64	d7, d6
 8000d80:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 8000d84:	d804      	bhi.n	8000d90 <parse_number+0x150>
    {
        item->valueint = INT_MIN;
 8000d86:	687b      	ldr	r3, [r7, #4]
 8000d88:	f04f 4200 	mov.w	r2, #2147483648	@ 0x80000000
 8000d8c:	615a      	str	r2, [r3, #20]
 8000d8e:	e007      	b.n	8000da0 <parse_number+0x160>
    }
    else
    {
        item->valueint = (int)number;
 8000d90:	ed97 7b14 	vldr	d7, [r7, #80]	@ 0x50
 8000d94:	eefd 7bc7 	vcvt.s32.f64	s15, d7
 8000d98:	ee17 2a90 	vmov	r2, s15
 8000d9c:	687b      	ldr	r3, [r7, #4]
 8000d9e:	615a      	str	r2, [r3, #20]
    }

    item->type = cJSON_Number;
 8000da0:	687b      	ldr	r3, [r7, #4]
 8000da2:	2208      	movs	r2, #8
 8000da4:	60da      	str	r2, [r3, #12]

    input_buffer->offset += (size_t)(after_end - number_c_string);
 8000da6:	683b      	ldr	r3, [r7, #0]
 8000da8:	689b      	ldr	r3, [r3, #8]
 8000daa:	6cb9      	ldr	r1, [r7, #72]	@ 0x48
 8000dac:	f107 0208 	add.w	r2, r7, #8
 8000db0:	1a8a      	subs	r2, r1, r2
 8000db2:	441a      	add	r2, r3
 8000db4:	683b      	ldr	r3, [r7, #0]
 8000db6:	609a      	str	r2, [r3, #8]
    return true;
 8000db8:	2301      	movs	r3, #1
}
 8000dba:	4618      	mov	r0, r3
 8000dbc:	3760      	adds	r7, #96	@ 0x60
 8000dbe:	46bd      	mov	sp, r7
 8000dc0:	bd80      	pop	{r7, pc}
 8000dc2:	bf00      	nop
 8000dc4:	f3af 8000 	nop.w
 8000dc8:	ffc00000 	.word	0xffc00000
 8000dcc:	41dfffff 	.word	0x41dfffff
 8000dd0:	00000000 	.word	0x00000000
 8000dd4:	c1e00000 	.word	0xc1e00000
 8000dd8:	04007fe5 	.word	0x04007fe5

08000ddc <parse_hex4>:
    return true;
}

/* parse 4 digit hexadecimal number */
static unsigned parse_hex4(const unsigned char * const input)
{
 8000ddc:	b480      	push	{r7}
 8000dde:	b085      	sub	sp, #20
 8000de0:	af00      	add	r7, sp, #0
 8000de2:	6078      	str	r0, [r7, #4]
    unsigned int h = 0;
 8000de4:	2300      	movs	r3, #0
 8000de6:	60fb      	str	r3, [r7, #12]
    size_t i = 0;
 8000de8:	2300      	movs	r3, #0
 8000dea:	60bb      	str	r3, [r7, #8]

    for (i = 0; i < 4; i++)
 8000dec:	2300      	movs	r3, #0
 8000dee:	60bb      	str	r3, [r7, #8]
 8000df0:	e04c      	b.n	8000e8c <parse_hex4+0xb0>
    {
        /* parse digit */
        if ((input[i] >= '0') && (input[i] <= '9'))
 8000df2:	687a      	ldr	r2, [r7, #4]
 8000df4:	68bb      	ldr	r3, [r7, #8]
 8000df6:	4413      	add	r3, r2
 8000df8:	781b      	ldrb	r3, [r3, #0]
 8000dfa:	2b2f      	cmp	r3, #47	@ 0x2f
 8000dfc:	d90f      	bls.n	8000e1e <parse_hex4+0x42>
 8000dfe:	687a      	ldr	r2, [r7, #4]
 8000e00:	68bb      	ldr	r3, [r7, #8]
 8000e02:	4413      	add	r3, r2
 8000e04:	781b      	ldrb	r3, [r3, #0]
 8000e06:	2b39      	cmp	r3, #57	@ 0x39
 8000e08:	d809      	bhi.n	8000e1e <parse_hex4+0x42>
        {
            h += (unsigned int) input[i] - '0';
 8000e0a:	687a      	ldr	r2, [r7, #4]
 8000e0c:	68bb      	ldr	r3, [r7, #8]
 8000e0e:	4413      	add	r3, r2
 8000e10:	781b      	ldrb	r3, [r3, #0]
 8000e12:	461a      	mov	r2, r3
 8000e14:	68fb      	ldr	r3, [r7, #12]
 8000e16:	4413      	add	r3, r2
 8000e18:	3b30      	subs	r3, #48	@ 0x30
 8000e1a:	60fb      	str	r3, [r7, #12]
 8000e1c:	e02d      	b.n	8000e7a <parse_hex4+0x9e>
        }
        else if ((input[i] >= 'A') && (input[i] <= 'F'))
 8000e1e:	687a      	ldr	r2, [r7, #4]
 8000e20:	68bb      	ldr	r3, [r7, #8]
 8000e22:	4413      	add	r3, r2
 8000e24:	781b      	ldrb	r3, [r3, #0]
 8000e26:	2b40      	cmp	r3, #64	@ 0x40
 8000e28:	d90f      	bls.n	8000e4a <parse_hex4+0x6e>
 8000e2a:	687a      	ldr	r2, [r7, #4]
 8000e2c:	68bb      	ldr	r3, [r7, #8]
 8000e2e:	4413      	add	r3, r2
 8000e30:	781b      	ldrb	r3, [r3, #0]
 8000e32:	2b46      	cmp	r3, #70	@ 0x46
 8000e34:	d809      	bhi.n	8000e4a <parse_hex4+0x6e>
        {
            h += (unsigned int) 10 + input[i] - 'A';
 8000e36:	687a      	ldr	r2, [r7, #4]
 8000e38:	68bb      	ldr	r3, [r7, #8]
 8000e3a:	4413      	add	r3, r2
 8000e3c:	781b      	ldrb	r3, [r3, #0]
 8000e3e:	461a      	mov	r2, r3
 8000e40:	68fb      	ldr	r3, [r7, #12]
 8000e42:	4413      	add	r3, r2
 8000e44:	3b37      	subs	r3, #55	@ 0x37
 8000e46:	60fb      	str	r3, [r7, #12]
 8000e48:	e017      	b.n	8000e7a <parse_hex4+0x9e>
        }
        else if ((input[i] >= 'a') && (input[i] <= 'f'))
 8000e4a:	687a      	ldr	r2, [r7, #4]
 8000e4c:	68bb      	ldr	r3, [r7, #8]
 8000e4e:	4413      	add	r3, r2
 8000e50:	781b      	ldrb	r3, [r3, #0]
 8000e52:	2b60      	cmp	r3, #96	@ 0x60
 8000e54:	d90f      	bls.n	8000e76 <parse_hex4+0x9a>
 8000e56:	687a      	ldr	r2, [r7, #4]
 8000e58:	68bb      	ldr	r3, [r7, #8]
 8000e5a:	4413      	add	r3, r2
 8000e5c:	781b      	ldrb	r3, [r3, #0]
 8000e5e:	2b66      	cmp	r3, #102	@ 0x66
 8000e60:	d809      	bhi.n	8000e76 <parse_hex4+0x9a>
        {
            h += (unsigned int) 10 + input[i] - 'a';
 8000e62:	687a      	ldr	r2, [r7, #4]
 8000e64:	68bb      	ldr	r3, [r7, #8]
 8000e66:	4413      	add	r3, r2
 8000e68:	781b      	ldrb	r3, [r3, #0]
 8000e6a:	461a      	mov	r2, r3
 8000e6c:	68fb      	ldr	r3, [r7, #12]
 8000e6e:	4413      	add	r3, r2
 8000e70:	3b57      	subs	r3, #87	@ 0x57
 8000e72:	60fb      	str	r3, [r7, #12]
 8000e74:	e001      	b.n	8000e7a <parse_hex4+0x9e>
        }
        else /* invalid */
        {
            return 0;
 8000e76:	2300      	movs	r3, #0
 8000e78:	e00c      	b.n	8000e94 <parse_hex4+0xb8>
        }

        if (i < 3)
 8000e7a:	68bb      	ldr	r3, [r7, #8]
 8000e7c:	2b02      	cmp	r3, #2
 8000e7e:	d802      	bhi.n	8000e86 <parse_hex4+0xaa>
        {
            /* shift left to make place for the next nibble */
            h = h << 4;
 8000e80:	68fb      	ldr	r3, [r7, #12]
 8000e82:	011b      	lsls	r3, r3, #4
 8000e84:	60fb      	str	r3, [r7, #12]
    for (i = 0; i < 4; i++)
 8000e86:	68bb      	ldr	r3, [r7, #8]
 8000e88:	3301      	adds	r3, #1
 8000e8a:	60bb      	str	r3, [r7, #8]
 8000e8c:	68bb      	ldr	r3, [r7, #8]
 8000e8e:	2b03      	cmp	r3, #3
 8000e90:	d9af      	bls.n	8000df2 <parse_hex4+0x16>
        }
    }

    return h;
 8000e92:	68fb      	ldr	r3, [r7, #12]
}
 8000e94:	4618      	mov	r0, r3
 8000e96:	3714      	adds	r7, #20
 8000e98:	46bd      	mov	sp, r7
 8000e9a:	f85d 7b04 	ldr.w	r7, [sp], #4
 8000e9e:	4770      	bx	lr

08000ea0 <utf16_literal_to_utf8>:

/* converts a UTF-16 literal to UTF-8
 * A literal can be one or two sequences of the form \uXXXX */
static unsigned char utf16_literal_to_utf8(const unsigned char * const input_pointer, const unsigned char * const input_end, unsigned char **output_pointer)
{
 8000ea0:	b580      	push	{r7, lr}
 8000ea2:	b08a      	sub	sp, #40	@ 0x28
 8000ea4:	af00      	add	r7, sp, #0
 8000ea6:	60f8      	str	r0, [r7, #12]
 8000ea8:	60b9      	str	r1, [r7, #8]
 8000eaa:	607a      	str	r2, [r7, #4]
    long unsigned int codepoint = 0;
 8000eac:	2300      	movs	r3, #0
 8000eae:	627b      	str	r3, [r7, #36]	@ 0x24
    unsigned int first_code = 0;
 8000eb0:	2300      	movs	r3, #0
 8000eb2:	61fb      	str	r3, [r7, #28]
    const unsigned char *first_sequence = input_pointer;
 8000eb4:	68fb      	ldr	r3, [r7, #12]
 8000eb6:	61bb      	str	r3, [r7, #24]
    unsigned char utf8_length = 0;
 8000eb8:	2300      	movs	r3, #0
 8000eba:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
    unsigned char utf8_position = 0;
 8000ebe:	2300      	movs	r3, #0
 8000ec0:	f887 3022 	strb.w	r3, [r7, #34]	@ 0x22
    unsigned char sequence_length = 0;
 8000ec4:	2300      	movs	r3, #0
 8000ec6:	f887 3021 	strb.w	r3, [r7, #33]	@ 0x21
    unsigned char first_byte_mark = 0;
 8000eca:	2300      	movs	r3, #0
 8000ecc:	f887 3020 	strb.w	r3, [r7, #32]

    if ((input_end - first_sequence) < 6)
 8000ed0:	68ba      	ldr	r2, [r7, #8]
 8000ed2:	69bb      	ldr	r3, [r7, #24]
 8000ed4:	1ad3      	subs	r3, r2, r3
 8000ed6:	2b05      	cmp	r3, #5
 8000ed8:	f340 80b7 	ble.w	800104a <utf16_literal_to_utf8+0x1aa>
        /* input ends unexpectedly */
        goto fail;
    }

    /* get the first utf16 sequence */
    first_code = parse_hex4(first_sequence + 2);
 8000edc:	69bb      	ldr	r3, [r7, #24]
 8000ede:	3302      	adds	r3, #2
 8000ee0:	4618      	mov	r0, r3
 8000ee2:	f7ff ff7b 	bl	8000ddc <parse_hex4>
 8000ee6:	61f8      	str	r0, [r7, #28]

    /* check that the code is valid */
    if (((first_code >= 0xDC00) && (first_code <= 0xDFFF)))
 8000ee8:	69fb      	ldr	r3, [r7, #28]
 8000eea:	f5b3 4f5c 	cmp.w	r3, #56320	@ 0xdc00
 8000eee:	d304      	bcc.n	8000efa <utf16_literal_to_utf8+0x5a>
 8000ef0:	69fb      	ldr	r3, [r7, #28]
 8000ef2:	f5b3 4f60 	cmp.w	r3, #57344	@ 0xe000
 8000ef6:	f0c0 80aa 	bcc.w	800104e <utf16_literal_to_utf8+0x1ae>
    {
        goto fail;
    }

    /* UTF16 surrogate pair */
    if ((first_code >= 0xD800) && (first_code <= 0xDBFF))
 8000efa:	69fb      	ldr	r3, [r7, #28]
 8000efc:	f5b3 4f58 	cmp.w	r3, #55296	@ 0xd800
 8000f00:	d337      	bcc.n	8000f72 <utf16_literal_to_utf8+0xd2>
 8000f02:	69fb      	ldr	r3, [r7, #28]
 8000f04:	f5b3 4f5c 	cmp.w	r3, #56320	@ 0xdc00
 8000f08:	d233      	bcs.n	8000f72 <utf16_literal_to_utf8+0xd2>
    {
        const unsigned char *second_sequence = first_sequence + 6;
 8000f0a:	69bb      	ldr	r3, [r7, #24]
 8000f0c:	3306      	adds	r3, #6
 8000f0e:	617b      	str	r3, [r7, #20]
        unsigned int second_code = 0;
 8000f10:	2300      	movs	r3, #0
 8000f12:	613b      	str	r3, [r7, #16]
        sequence_length = 12; /* \uXXXX\uXXXX */
 8000f14:	230c      	movs	r3, #12
 8000f16:	f887 3021 	strb.w	r3, [r7, #33]	@ 0x21

        if ((input_end - second_sequence) < 6)
 8000f1a:	68ba      	ldr	r2, [r7, #8]
 8000f1c:	697b      	ldr	r3, [r7, #20]
 8000f1e:	1ad3      	subs	r3, r2, r3
 8000f20:	2b05      	cmp	r3, #5
 8000f22:	f340 8096 	ble.w	8001052 <utf16_literal_to_utf8+0x1b2>
        {
            /* input ends unexpectedly */
            goto fail;
        }

        if ((second_sequence[0] != '\\') || (second_sequence[1] != 'u'))
 8000f26:	697b      	ldr	r3, [r7, #20]
 8000f28:	781b      	ldrb	r3, [r3, #0]
 8000f2a:	2b5c      	cmp	r3, #92	@ 0x5c
 8000f2c:	f040 8093 	bne.w	8001056 <utf16_literal_to_utf8+0x1b6>
 8000f30:	697b      	ldr	r3, [r7, #20]
 8000f32:	3301      	adds	r3, #1
 8000f34:	781b      	ldrb	r3, [r3, #0]
 8000f36:	2b75      	cmp	r3, #117	@ 0x75
 8000f38:	f040 808d 	bne.w	8001056 <utf16_literal_to_utf8+0x1b6>
            /* missing second half of the surrogate pair */
            goto fail;
        }

        /* get the second utf16 sequence */
        second_code = parse_hex4(second_sequence + 2);
 8000f3c:	697b      	ldr	r3, [r7, #20]
 8000f3e:	3302      	adds	r3, #2
 8000f40:	4618      	mov	r0, r3
 8000f42:	f7ff ff4b 	bl	8000ddc <parse_hex4>
 8000f46:	6138      	str	r0, [r7, #16]
        /* check that the code is valid */
        if ((second_code < 0xDC00) || (second_code > 0xDFFF))
 8000f48:	693b      	ldr	r3, [r7, #16]
 8000f4a:	f5b3 4f5c 	cmp.w	r3, #56320	@ 0xdc00
 8000f4e:	f0c0 8084 	bcc.w	800105a <utf16_literal_to_utf8+0x1ba>
 8000f52:	693b      	ldr	r3, [r7, #16]
 8000f54:	f5b3 4f60 	cmp.w	r3, #57344	@ 0xe000
 8000f58:	d27f      	bcs.n	800105a <utf16_literal_to_utf8+0x1ba>
            goto fail;
        }


        /* calculate the unicode codepoint from the surrogate pair */
        codepoint = 0x10000 + (((first_code & 0x3FF) << 10) | (second_code & 0x3FF));
 8000f5a:	69fb      	ldr	r3, [r7, #28]
 8000f5c:	029a      	lsls	r2, r3, #10
 8000f5e:	4b43      	ldr	r3, [pc, #268]	@ (800106c <utf16_literal_to_utf8+0x1cc>)
 8000f60:	4013      	ands	r3, r2
 8000f62:	693a      	ldr	r2, [r7, #16]
 8000f64:	f3c2 0209 	ubfx	r2, r2, #0, #10
 8000f68:	4313      	orrs	r3, r2
 8000f6a:	f503 3380 	add.w	r3, r3, #65536	@ 0x10000
 8000f6e:	627b      	str	r3, [r7, #36]	@ 0x24
    {
 8000f70:	e004      	b.n	8000f7c <utf16_literal_to_utf8+0xdc>
    }
    else
    {
        sequence_length = 6; /* \uXXXX */
 8000f72:	2306      	movs	r3, #6
 8000f74:	f887 3021 	strb.w	r3, [r7, #33]	@ 0x21
        codepoint = first_code;
 8000f78:	69fb      	ldr	r3, [r7, #28]
 8000f7a:	627b      	str	r3, [r7, #36]	@ 0x24
    }

    /* encode as UTF-8
     * takes at maximum 4 bytes to encode:
     * 11110xxx 10xxxxxx 10xxxxxx 10xxxxxx */
    if (codepoint < 0x80)
 8000f7c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8000f7e:	2b7f      	cmp	r3, #127	@ 0x7f
 8000f80:	d803      	bhi.n	8000f8a <utf16_literal_to_utf8+0xea>
    {
        /* normal ascii, encoding 0xxxxxxx */
        utf8_length = 1;
 8000f82:	2301      	movs	r3, #1
 8000f84:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
 8000f88:	e01f      	b.n	8000fca <utf16_literal_to_utf8+0x12a>
    }
    else if (codepoint < 0x800)
 8000f8a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8000f8c:	f5b3 6f00 	cmp.w	r3, #2048	@ 0x800
 8000f90:	d206      	bcs.n	8000fa0 <utf16_literal_to_utf8+0x100>
    {
        /* two bytes, encoding 110xxxxx 10xxxxxx */
        utf8_length = 2;
 8000f92:	2302      	movs	r3, #2
 8000f94:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
        first_byte_mark = 0xC0; /* 11000000 */
 8000f98:	23c0      	movs	r3, #192	@ 0xc0
 8000f9a:	f887 3020 	strb.w	r3, [r7, #32]
 8000f9e:	e014      	b.n	8000fca <utf16_literal_to_utf8+0x12a>
    }
    else if (codepoint < 0x10000)
 8000fa0:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8000fa2:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 8000fa6:	d206      	bcs.n	8000fb6 <utf16_literal_to_utf8+0x116>
    {
        /* three bytes, encoding 1110xxxx 10xxxxxx 10xxxxxx */
        utf8_length = 3;
 8000fa8:	2303      	movs	r3, #3
 8000faa:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
        first_byte_mark = 0xE0; /* 11100000 */
 8000fae:	23e0      	movs	r3, #224	@ 0xe0
 8000fb0:	f887 3020 	strb.w	r3, [r7, #32]
 8000fb4:	e009      	b.n	8000fca <utf16_literal_to_utf8+0x12a>
    }
    else if (codepoint <= 0x10FFFF)
 8000fb6:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8000fb8:	f5b3 1f88 	cmp.w	r3, #1114112	@ 0x110000
 8000fbc:	d24f      	bcs.n	800105e <utf16_literal_to_utf8+0x1be>
    {
        /* four bytes, encoding 1110xxxx 10xxxxxx 10xxxxxx 10xxxxxx */
        utf8_length = 4;
 8000fbe:	2304      	movs	r3, #4
 8000fc0:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
        first_byte_mark = 0xF0; /* 11110000 */
 8000fc4:	23f0      	movs	r3, #240	@ 0xf0
 8000fc6:	f887 3020 	strb.w	r3, [r7, #32]
        /* invalid unicode codepoint */
        goto fail;
    }

    /* encode as utf8 */
    for (utf8_position = (unsigned char)(utf8_length - 1); utf8_position > 0; utf8_position--)
 8000fca:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 8000fce:	3b01      	subs	r3, #1
 8000fd0:	f887 3022 	strb.w	r3, [r7, #34]	@ 0x22
 8000fd4:	e015      	b.n	8001002 <utf16_literal_to_utf8+0x162>
    {
        /* 10xxxxxx */
        (*output_pointer)[utf8_position] = (unsigned char)((codepoint | 0x80) & 0xBF);
 8000fd6:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8000fd8:	b2db      	uxtb	r3, r3
 8000fda:	f003 033f 	and.w	r3, r3, #63	@ 0x3f
 8000fde:	b2da      	uxtb	r2, r3
 8000fe0:	687b      	ldr	r3, [r7, #4]
 8000fe2:	6819      	ldr	r1, [r3, #0]
 8000fe4:	f897 3022 	ldrb.w	r3, [r7, #34]	@ 0x22
 8000fe8:	440b      	add	r3, r1
 8000fea:	f062 027f 	orn	r2, r2, #127	@ 0x7f
 8000fee:	b2d2      	uxtb	r2, r2
 8000ff0:	701a      	strb	r2, [r3, #0]
        codepoint >>= 6;
 8000ff2:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8000ff4:	099b      	lsrs	r3, r3, #6
 8000ff6:	627b      	str	r3, [r7, #36]	@ 0x24
    for (utf8_position = (unsigned char)(utf8_length - 1); utf8_position > 0; utf8_position--)
 8000ff8:	f897 3022 	ldrb.w	r3, [r7, #34]	@ 0x22
 8000ffc:	3b01      	subs	r3, #1
 8000ffe:	f887 3022 	strb.w	r3, [r7, #34]	@ 0x22
 8001002:	f897 3022 	ldrb.w	r3, [r7, #34]	@ 0x22
 8001006:	2b00      	cmp	r3, #0
 8001008:	d1e5      	bne.n	8000fd6 <utf16_literal_to_utf8+0x136>
    }
    /* encode first byte */
    if (utf8_length > 1)
 800100a:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 800100e:	2b01      	cmp	r3, #1
 8001010:	d909      	bls.n	8001026 <utf16_literal_to_utf8+0x186>
    {
        (*output_pointer)[0] = (unsigned char)((codepoint | first_byte_mark) & 0xFF);
 8001012:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8001014:	b2d9      	uxtb	r1, r3
 8001016:	687b      	ldr	r3, [r7, #4]
 8001018:	681b      	ldr	r3, [r3, #0]
 800101a:	f897 2020 	ldrb.w	r2, [r7, #32]
 800101e:	430a      	orrs	r2, r1
 8001020:	b2d2      	uxtb	r2, r2
 8001022:	701a      	strb	r2, [r3, #0]
 8001024:	e007      	b.n	8001036 <utf16_literal_to_utf8+0x196>
    }
    else
    {
        (*output_pointer)[0] = (unsigned char)(codepoint & 0x7F);
 8001026:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8001028:	b2da      	uxtb	r2, r3
 800102a:	687b      	ldr	r3, [r7, #4]
 800102c:	681b      	ldr	r3, [r3, #0]
 800102e:	f002 027f 	and.w	r2, r2, #127	@ 0x7f
 8001032:	b2d2      	uxtb	r2, r2
 8001034:	701a      	strb	r2, [r3, #0]
    }

    *output_pointer += utf8_length;
 8001036:	687b      	ldr	r3, [r7, #4]
 8001038:	681a      	ldr	r2, [r3, #0]
 800103a:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 800103e:	441a      	add	r2, r3
 8001040:	687b      	ldr	r3, [r7, #4]
 8001042:	601a      	str	r2, [r3, #0]

    return sequence_length;
 8001044:	f897 3021 	ldrb.w	r3, [r7, #33]	@ 0x21
 8001048:	e00b      	b.n	8001062 <utf16_literal_to_utf8+0x1c2>
        goto fail;
 800104a:	bf00      	nop
 800104c:	e008      	b.n	8001060 <utf16_literal_to_utf8+0x1c0>
        goto fail;
 800104e:	bf00      	nop
 8001050:	e006      	b.n	8001060 <utf16_literal_to_utf8+0x1c0>
            goto fail;
 8001052:	bf00      	nop
 8001054:	e004      	b.n	8001060 <utf16_literal_to_utf8+0x1c0>
            goto fail;
 8001056:	bf00      	nop
 8001058:	e002      	b.n	8001060 <utf16_literal_to_utf8+0x1c0>
            goto fail;
 800105a:	bf00      	nop
 800105c:	e000      	b.n	8001060 <utf16_literal_to_utf8+0x1c0>
        goto fail;
 800105e:	bf00      	nop

fail:
    return 0;
 8001060:	2300      	movs	r3, #0
}
 8001062:	4618      	mov	r0, r3
 8001064:	3728      	adds	r7, #40	@ 0x28
 8001066:	46bd      	mov	sp, r7
 8001068:	bd80      	pop	{r7, pc}
 800106a:	bf00      	nop
 800106c:	000ffc00 	.word	0x000ffc00

08001070 <parse_string>:

/* Parse the input text into an unescaped cinput, and populate item. */
static cJSON_bool parse_string(cJSON * const item, parse_buffer * const input_buffer)
{
 8001070:	b580      	push	{r7, lr}
 8001072:	b08a      	sub	sp, #40	@ 0x28
 8001074:	af00      	add	r7, sp, #0
 8001076:	6078      	str	r0, [r7, #4]
 8001078:	6039      	str	r1, [r7, #0]
    const unsigned char *input_pointer = buffer_at_offset(input_buffer) + 1;
 800107a:	683b      	ldr	r3, [r7, #0]
 800107c:	681a      	ldr	r2, [r3, #0]
 800107e:	683b      	ldr	r3, [r7, #0]
 8001080:	689b      	ldr	r3, [r3, #8]
 8001082:	3301      	adds	r3, #1
 8001084:	4413      	add	r3, r2
 8001086:	627b      	str	r3, [r7, #36]	@ 0x24
    const unsigned char *input_end = buffer_at_offset(input_buffer) + 1;
 8001088:	683b      	ldr	r3, [r7, #0]
 800108a:	681a      	ldr	r2, [r3, #0]
 800108c:	683b      	ldr	r3, [r7, #0]
 800108e:	689b      	ldr	r3, [r3, #8]
 8001090:	3301      	adds	r3, #1
 8001092:	4413      	add	r3, r2
 8001094:	623b      	str	r3, [r7, #32]
    unsigned char *output_pointer = NULL;
 8001096:	2300      	movs	r3, #0
 8001098:	60fb      	str	r3, [r7, #12]
    unsigned char *output = NULL;
 800109a:	2300      	movs	r3, #0
 800109c:	61fb      	str	r3, [r7, #28]

    /* not a string */
    if (buffer_at_offset(input_buffer)[0] != '\"')
 800109e:	683b      	ldr	r3, [r7, #0]
 80010a0:	681a      	ldr	r2, [r3, #0]
 80010a2:	683b      	ldr	r3, [r7, #0]
 80010a4:	689b      	ldr	r3, [r3, #8]
 80010a6:	4413      	add	r3, r2
 80010a8:	781b      	ldrb	r3, [r3, #0]
 80010aa:	2b22      	cmp	r3, #34	@ 0x22
 80010ac:	f040 8103 	bne.w	80012b6 <parse_string+0x246>
        goto fail;
    }

    {
        /* calculate approximate size of the output (overestimate) */
        size_t allocation_length = 0;
 80010b0:	2300      	movs	r3, #0
 80010b2:	613b      	str	r3, [r7, #16]
        size_t skipped_bytes = 0;
 80010b4:	2300      	movs	r3, #0
 80010b6:	61bb      	str	r3, [r7, #24]
        while (((size_t)(input_end - input_buffer->content) < input_buffer->length) && (*input_end != '\"'))
 80010b8:	e017      	b.n	80010ea <parse_string+0x7a>
        {
            /* is escape sequence */
            if (input_end[0] == '\\')
 80010ba:	6a3b      	ldr	r3, [r7, #32]
 80010bc:	781b      	ldrb	r3, [r3, #0]
 80010be:	2b5c      	cmp	r3, #92	@ 0x5c
 80010c0:	d110      	bne.n	80010e4 <parse_string+0x74>
            {
                if ((size_t)(input_end + 1 - input_buffer->content) >= input_buffer->length)
 80010c2:	6a3b      	ldr	r3, [r7, #32]
 80010c4:	1c5a      	adds	r2, r3, #1
 80010c6:	683b      	ldr	r3, [r7, #0]
 80010c8:	681b      	ldr	r3, [r3, #0]
 80010ca:	1ad3      	subs	r3, r2, r3
 80010cc:	461a      	mov	r2, r3
 80010ce:	683b      	ldr	r3, [r7, #0]
 80010d0:	685b      	ldr	r3, [r3, #4]
 80010d2:	429a      	cmp	r2, r3
 80010d4:	f080 80f1 	bcs.w	80012ba <parse_string+0x24a>
                {
                    /* prevent buffer overflow when last input character is a backslash */
                    goto fail;
                }
                skipped_bytes++;
 80010d8:	69bb      	ldr	r3, [r7, #24]
 80010da:	3301      	adds	r3, #1
 80010dc:	61bb      	str	r3, [r7, #24]
                input_end++;
 80010de:	6a3b      	ldr	r3, [r7, #32]
 80010e0:	3301      	adds	r3, #1
 80010e2:	623b      	str	r3, [r7, #32]
            }
            input_end++;
 80010e4:	6a3b      	ldr	r3, [r7, #32]
 80010e6:	3301      	adds	r3, #1
 80010e8:	623b      	str	r3, [r7, #32]
        while (((size_t)(input_end - input_buffer->content) < input_buffer->length) && (*input_end != '\"'))
 80010ea:	683b      	ldr	r3, [r7, #0]
 80010ec:	681b      	ldr	r3, [r3, #0]
 80010ee:	6a3a      	ldr	r2, [r7, #32]
 80010f0:	1ad3      	subs	r3, r2, r3
 80010f2:	461a      	mov	r2, r3
 80010f4:	683b      	ldr	r3, [r7, #0]
 80010f6:	685b      	ldr	r3, [r3, #4]
 80010f8:	429a      	cmp	r2, r3
 80010fa:	d203      	bcs.n	8001104 <parse_string+0x94>
 80010fc:	6a3b      	ldr	r3, [r7, #32]
 80010fe:	781b      	ldrb	r3, [r3, #0]
 8001100:	2b22      	cmp	r3, #34	@ 0x22
 8001102:	d1da      	bne.n	80010ba <parse_string+0x4a>
        }
        if (((size_t)(input_end - input_buffer->content) >= input_buffer->length) || (*input_end != '\"'))
 8001104:	683b      	ldr	r3, [r7, #0]
 8001106:	681b      	ldr	r3, [r3, #0]
 8001108:	6a3a      	ldr	r2, [r7, #32]
 800110a:	1ad3      	subs	r3, r2, r3
 800110c:	461a      	mov	r2, r3
 800110e:	683b      	ldr	r3, [r7, #0]
 8001110:	685b      	ldr	r3, [r3, #4]
 8001112:	429a      	cmp	r2, r3
 8001114:	f080 80d3 	bcs.w	80012be <parse_string+0x24e>
 8001118:	6a3b      	ldr	r3, [r7, #32]
 800111a:	781b      	ldrb	r3, [r3, #0]
 800111c:	2b22      	cmp	r3, #34	@ 0x22
 800111e:	f040 80ce 	bne.w	80012be <parse_string+0x24e>
        {
            goto fail; /* string ended unexpectedly */
        }

        /* This is at most how much we need for the output */
        allocation_length = (size_t) (input_end - buffer_at_offset(input_buffer)) - skipped_bytes;
 8001122:	683b      	ldr	r3, [r7, #0]
 8001124:	681a      	ldr	r2, [r3, #0]
 8001126:	683b      	ldr	r3, [r7, #0]
 8001128:	689b      	ldr	r3, [r3, #8]
 800112a:	4413      	add	r3, r2
 800112c:	6a3a      	ldr	r2, [r7, #32]
 800112e:	1ad3      	subs	r3, r2, r3
 8001130:	461a      	mov	r2, r3
 8001132:	69bb      	ldr	r3, [r7, #24]
 8001134:	1ad3      	subs	r3, r2, r3
 8001136:	613b      	str	r3, [r7, #16]
        output = (unsigned char*)input_buffer->hooks.allocate(allocation_length + sizeof(""));
 8001138:	683b      	ldr	r3, [r7, #0]
 800113a:	691b      	ldr	r3, [r3, #16]
 800113c:	693a      	ldr	r2, [r7, #16]
 800113e:	3201      	adds	r2, #1
 8001140:	4610      	mov	r0, r2
 8001142:	4798      	blx	r3
 8001144:	61f8      	str	r0, [r7, #28]
        if (output == NULL)
 8001146:	69fb      	ldr	r3, [r7, #28]
 8001148:	2b00      	cmp	r3, #0
 800114a:	f000 80ba 	beq.w	80012c2 <parse_string+0x252>
        {
            goto fail; /* allocation failure */
        }
    }

    output_pointer = output;
 800114e:	69fb      	ldr	r3, [r7, #28]
 8001150:	60fb      	str	r3, [r7, #12]
    /* loop through the string literal */
    while (input_pointer < input_end)
 8001152:	e094      	b.n	800127e <parse_string+0x20e>
    {
        if (*input_pointer != '\\')
 8001154:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8001156:	781b      	ldrb	r3, [r3, #0]
 8001158:	2b5c      	cmp	r3, #92	@ 0x5c
 800115a:	d008      	beq.n	800116e <parse_string+0xfe>
        {
            *output_pointer++ = *input_pointer++;
 800115c:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 800115e:	1c53      	adds	r3, r2, #1
 8001160:	627b      	str	r3, [r7, #36]	@ 0x24
 8001162:	68fb      	ldr	r3, [r7, #12]
 8001164:	1c59      	adds	r1, r3, #1
 8001166:	60f9      	str	r1, [r7, #12]
 8001168:	7812      	ldrb	r2, [r2, #0]
 800116a:	701a      	strb	r2, [r3, #0]
 800116c:	e087      	b.n	800127e <parse_string+0x20e>
        }
        /* escape sequence */
        else
        {
            unsigned char sequence_length = 2;
 800116e:	2302      	movs	r3, #2
 8001170:	75fb      	strb	r3, [r7, #23]
            if ((input_end - input_pointer) < 1)
 8001172:	6a3a      	ldr	r2, [r7, #32]
 8001174:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8001176:	1ad3      	subs	r3, r2, r3
 8001178:	2b00      	cmp	r3, #0
 800117a:	f340 80a4 	ble.w	80012c6 <parse_string+0x256>
            {
                goto fail;
            }

            switch (input_pointer[1])
 800117e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8001180:	3301      	adds	r3, #1
 8001182:	781b      	ldrb	r3, [r3, #0]
 8001184:	2b75      	cmp	r3, #117	@ 0x75
 8001186:	f300 80a0 	bgt.w	80012ca <parse_string+0x25a>
 800118a:	2b5c      	cmp	r3, #92	@ 0x5c
 800118c:	da04      	bge.n	8001198 <parse_string+0x128>
 800118e:	2b22      	cmp	r3, #34	@ 0x22
 8001190:	d05c      	beq.n	800124c <parse_string+0x1dc>
 8001192:	2b2f      	cmp	r3, #47	@ 0x2f
 8001194:	d05a      	beq.n	800124c <parse_string+0x1dc>
                        goto fail;
                    }
                    break;

                default:
                    goto fail;
 8001196:	e098      	b.n	80012ca <parse_string+0x25a>
            switch (input_pointer[1])
 8001198:	3b5c      	subs	r3, #92	@ 0x5c
 800119a:	2b19      	cmp	r3, #25
 800119c:	f200 8095 	bhi.w	80012ca <parse_string+0x25a>
 80011a0:	a201      	add	r2, pc, #4	@ (adr r2, 80011a8 <parse_string+0x138>)
 80011a2:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 80011a6:	bf00      	nop
 80011a8:	0800124d 	.word	0x0800124d
 80011ac:	080012cb 	.word	0x080012cb
 80011b0:	080012cb 	.word	0x080012cb
 80011b4:	080012cb 	.word	0x080012cb
 80011b8:	080012cb 	.word	0x080012cb
 80011bc:	080012cb 	.word	0x080012cb
 80011c0:	08001211 	.word	0x08001211
 80011c4:	080012cb 	.word	0x080012cb
 80011c8:	080012cb 	.word	0x080012cb
 80011cc:	080012cb 	.word	0x080012cb
 80011d0:	0800121d 	.word	0x0800121d
 80011d4:	080012cb 	.word	0x080012cb
 80011d8:	080012cb 	.word	0x080012cb
 80011dc:	080012cb 	.word	0x080012cb
 80011e0:	080012cb 	.word	0x080012cb
 80011e4:	080012cb 	.word	0x080012cb
 80011e8:	080012cb 	.word	0x080012cb
 80011ec:	080012cb 	.word	0x080012cb
 80011f0:	08001229 	.word	0x08001229
 80011f4:	080012cb 	.word	0x080012cb
 80011f8:	080012cb 	.word	0x080012cb
 80011fc:	080012cb 	.word	0x080012cb
 8001200:	08001235 	.word	0x08001235
 8001204:	080012cb 	.word	0x080012cb
 8001208:	08001241 	.word	0x08001241
 800120c:	0800125d 	.word	0x0800125d
                    *output_pointer++ = '\b';
 8001210:	68fb      	ldr	r3, [r7, #12]
 8001212:	1c5a      	adds	r2, r3, #1
 8001214:	60fa      	str	r2, [r7, #12]
 8001216:	2208      	movs	r2, #8
 8001218:	701a      	strb	r2, [r3, #0]
                    break;
 800121a:	e02c      	b.n	8001276 <parse_string+0x206>
                    *output_pointer++ = '\f';
 800121c:	68fb      	ldr	r3, [r7, #12]
 800121e:	1c5a      	adds	r2, r3, #1
 8001220:	60fa      	str	r2, [r7, #12]
 8001222:	220c      	movs	r2, #12
 8001224:	701a      	strb	r2, [r3, #0]
                    break;
 8001226:	e026      	b.n	8001276 <parse_string+0x206>
                    *output_pointer++ = '\n';
 8001228:	68fb      	ldr	r3, [r7, #12]
 800122a:	1c5a      	adds	r2, r3, #1
 800122c:	60fa      	str	r2, [r7, #12]
 800122e:	220a      	movs	r2, #10
 8001230:	701a      	strb	r2, [r3, #0]
                    break;
 8001232:	e020      	b.n	8001276 <parse_string+0x206>
                    *output_pointer++ = '\r';
 8001234:	68fb      	ldr	r3, [r7, #12]
 8001236:	1c5a      	adds	r2, r3, #1
 8001238:	60fa      	str	r2, [r7, #12]
 800123a:	220d      	movs	r2, #13
 800123c:	701a      	strb	r2, [r3, #0]
                    break;
 800123e:	e01a      	b.n	8001276 <parse_string+0x206>
                    *output_pointer++ = '\t';
 8001240:	68fb      	ldr	r3, [r7, #12]
 8001242:	1c5a      	adds	r2, r3, #1
 8001244:	60fa      	str	r2, [r7, #12]
 8001246:	2209      	movs	r2, #9
 8001248:	701a      	strb	r2, [r3, #0]
                    break;
 800124a:	e014      	b.n	8001276 <parse_string+0x206>
                    *output_pointer++ = input_pointer[1];
 800124c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800124e:	1c5a      	adds	r2, r3, #1
 8001250:	68fb      	ldr	r3, [r7, #12]
 8001252:	1c59      	adds	r1, r3, #1
 8001254:	60f9      	str	r1, [r7, #12]
 8001256:	7812      	ldrb	r2, [r2, #0]
 8001258:	701a      	strb	r2, [r3, #0]
                    break;
 800125a:	e00c      	b.n	8001276 <parse_string+0x206>
                    sequence_length = utf16_literal_to_utf8(input_pointer, input_end, &output_pointer);
 800125c:	f107 030c 	add.w	r3, r7, #12
 8001260:	461a      	mov	r2, r3
 8001262:	6a39      	ldr	r1, [r7, #32]
 8001264:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 8001266:	f7ff fe1b 	bl	8000ea0 <utf16_literal_to_utf8>
 800126a:	4603      	mov	r3, r0
 800126c:	75fb      	strb	r3, [r7, #23]
                    if (sequence_length == 0)
 800126e:	7dfb      	ldrb	r3, [r7, #23]
 8001270:	2b00      	cmp	r3, #0
 8001272:	d02c      	beq.n	80012ce <parse_string+0x25e>
                    break;
 8001274:	bf00      	nop
            }
            input_pointer += sequence_length;
 8001276:	7dfb      	ldrb	r3, [r7, #23]
 8001278:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 800127a:	4413      	add	r3, r2
 800127c:	627b      	str	r3, [r7, #36]	@ 0x24
    while (input_pointer < input_end)
 800127e:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8001280:	6a3b      	ldr	r3, [r7, #32]
 8001282:	429a      	cmp	r2, r3
 8001284:	f4ff af66 	bcc.w	8001154 <parse_string+0xe4>
        }
    }

    /* zero terminate the output */
    *output_pointer = '\0';
 8001288:	68fb      	ldr	r3, [r7, #12]
 800128a:	2200      	movs	r2, #0
 800128c:	701a      	strb	r2, [r3, #0]

    item->type = cJSON_String;
 800128e:	687b      	ldr	r3, [r7, #4]
 8001290:	2210      	movs	r2, #16
 8001292:	60da      	str	r2, [r3, #12]
    item->valuestring = (char*)output;
 8001294:	687b      	ldr	r3, [r7, #4]
 8001296:	69fa      	ldr	r2, [r7, #28]
 8001298:	611a      	str	r2, [r3, #16]

    input_buffer->offset = (size_t) (input_end - input_buffer->content);
 800129a:	683b      	ldr	r3, [r7, #0]
 800129c:	681b      	ldr	r3, [r3, #0]
 800129e:	6a3a      	ldr	r2, [r7, #32]
 80012a0:	1ad3      	subs	r3, r2, r3
 80012a2:	461a      	mov	r2, r3
 80012a4:	683b      	ldr	r3, [r7, #0]
 80012a6:	609a      	str	r2, [r3, #8]
    input_buffer->offset++;
 80012a8:	683b      	ldr	r3, [r7, #0]
 80012aa:	689b      	ldr	r3, [r3, #8]
 80012ac:	1c5a      	adds	r2, r3, #1
 80012ae:	683b      	ldr	r3, [r7, #0]
 80012b0:	609a      	str	r2, [r3, #8]

    return true;
 80012b2:	2301      	movs	r3, #1
 80012b4:	e020      	b.n	80012f8 <parse_string+0x288>
        goto fail;
 80012b6:	bf00      	nop
 80012b8:	e00a      	b.n	80012d0 <parse_string+0x260>
                    goto fail;
 80012ba:	bf00      	nop
 80012bc:	e008      	b.n	80012d0 <parse_string+0x260>
            goto fail; /* string ended unexpectedly */
 80012be:	bf00      	nop
 80012c0:	e006      	b.n	80012d0 <parse_string+0x260>
            goto fail; /* allocation failure */
 80012c2:	bf00      	nop
 80012c4:	e004      	b.n	80012d0 <parse_string+0x260>
                goto fail;
 80012c6:	bf00      	nop
 80012c8:	e002      	b.n	80012d0 <parse_string+0x260>
                    goto fail;
 80012ca:	bf00      	nop
 80012cc:	e000      	b.n	80012d0 <parse_string+0x260>
                        goto fail;
 80012ce:	bf00      	nop

fail:
    if (output != NULL)
 80012d0:	69fb      	ldr	r3, [r7, #28]
 80012d2:	2b00      	cmp	r3, #0
 80012d4:	d005      	beq.n	80012e2 <parse_string+0x272>
    {
        input_buffer->hooks.deallocate(output);
 80012d6:	683b      	ldr	r3, [r7, #0]
 80012d8:	695b      	ldr	r3, [r3, #20]
 80012da:	69f8      	ldr	r0, [r7, #28]
 80012dc:	4798      	blx	r3
        output = NULL;
 80012de:	2300      	movs	r3, #0
 80012e0:	61fb      	str	r3, [r7, #28]
    }

    if (input_pointer != NULL)
 80012e2:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80012e4:	2b00      	cmp	r3, #0
 80012e6:	d006      	beq.n	80012f6 <parse_string+0x286>
    {
        input_buffer->offset = (size_t)(input_pointer - input_buffer->content);
 80012e8:	683b      	ldr	r3, [r7, #0]
 80012ea:	681b      	ldr	r3, [r3, #0]
 80012ec:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 80012ee:	1ad3      	subs	r3, r2, r3
 80012f0:	461a      	mov	r2, r3
 80012f2:	683b      	ldr	r3, [r7, #0]
 80012f4:	609a      	str	r2, [r3, #8]
    }

    return false;
 80012f6:	2300      	movs	r3, #0
}
 80012f8:	4618      	mov	r0, r3
 80012fa:	3728      	adds	r7, #40	@ 0x28
 80012fc:	46bd      	mov	sp, r7
 80012fe:	bd80      	pop	{r7, pc}

08001300 <buffer_skip_whitespace>:
static cJSON_bool parse_object(cJSON * const item, parse_buffer * const input_buffer);
static cJSON_bool print_object(const cJSON * const item, printbuffer * const output_buffer);

/* Utility to jump whitespace and cr/lf */
static parse_buffer *buffer_skip_whitespace(parse_buffer * const buffer)
{
 8001300:	b480      	push	{r7}
 8001302:	b083      	sub	sp, #12
 8001304:	af00      	add	r7, sp, #0
 8001306:	6078      	str	r0, [r7, #4]
    if ((buffer == NULL) || (buffer->content == NULL))
 8001308:	687b      	ldr	r3, [r7, #4]
 800130a:	2b00      	cmp	r3, #0
 800130c:	d003      	beq.n	8001316 <buffer_skip_whitespace+0x16>
 800130e:	687b      	ldr	r3, [r7, #4]
 8001310:	681b      	ldr	r3, [r3, #0]
 8001312:	2b00      	cmp	r3, #0
 8001314:	d101      	bne.n	800131a <buffer_skip_whitespace+0x1a>
    {
        return NULL;
 8001316:	2300      	movs	r3, #0
 8001318:	e02c      	b.n	8001374 <buffer_skip_whitespace+0x74>
    }

    if (cannot_access_at_index(buffer, 0))
 800131a:	687b      	ldr	r3, [r7, #4]
 800131c:	2b00      	cmp	r3, #0
 800131e:	d005      	beq.n	800132c <buffer_skip_whitespace+0x2c>
 8001320:	687b      	ldr	r3, [r7, #4]
 8001322:	689a      	ldr	r2, [r3, #8]
 8001324:	687b      	ldr	r3, [r7, #4]
 8001326:	685b      	ldr	r3, [r3, #4]
 8001328:	429a      	cmp	r2, r3
 800132a:	d306      	bcc.n	800133a <buffer_skip_whitespace+0x3a>
    {
        return buffer;
 800132c:	687b      	ldr	r3, [r7, #4]
 800132e:	e021      	b.n	8001374 <buffer_skip_whitespace+0x74>
    }

    while (can_access_at_index(buffer, 0) && (buffer_at_offset(buffer)[0] <= 32))
    {
       buffer->offset++;
 8001330:	687b      	ldr	r3, [r7, #4]
 8001332:	689b      	ldr	r3, [r3, #8]
 8001334:	1c5a      	adds	r2, r3, #1
 8001336:	687b      	ldr	r3, [r7, #4]
 8001338:	609a      	str	r2, [r3, #8]
    while (can_access_at_index(buffer, 0) && (buffer_at_offset(buffer)[0] <= 32))
 800133a:	687b      	ldr	r3, [r7, #4]
 800133c:	2b00      	cmp	r3, #0
 800133e:	d00d      	beq.n	800135c <buffer_skip_whitespace+0x5c>
 8001340:	687b      	ldr	r3, [r7, #4]
 8001342:	689a      	ldr	r2, [r3, #8]
 8001344:	687b      	ldr	r3, [r7, #4]
 8001346:	685b      	ldr	r3, [r3, #4]
 8001348:	429a      	cmp	r2, r3
 800134a:	d207      	bcs.n	800135c <buffer_skip_whitespace+0x5c>
 800134c:	687b      	ldr	r3, [r7, #4]
 800134e:	681a      	ldr	r2, [r3, #0]
 8001350:	687b      	ldr	r3, [r7, #4]
 8001352:	689b      	ldr	r3, [r3, #8]
 8001354:	4413      	add	r3, r2
 8001356:	781b      	ldrb	r3, [r3, #0]
 8001358:	2b20      	cmp	r3, #32
 800135a:	d9e9      	bls.n	8001330 <buffer_skip_whitespace+0x30>
    }

    if (buffer->offset == buffer->length)
 800135c:	687b      	ldr	r3, [r7, #4]
 800135e:	689a      	ldr	r2, [r3, #8]
 8001360:	687b      	ldr	r3, [r7, #4]
 8001362:	685b      	ldr	r3, [r3, #4]
 8001364:	429a      	cmp	r2, r3
 8001366:	d104      	bne.n	8001372 <buffer_skip_whitespace+0x72>
    {
        buffer->offset--;
 8001368:	687b      	ldr	r3, [r7, #4]
 800136a:	689b      	ldr	r3, [r3, #8]
 800136c:	1e5a      	subs	r2, r3, #1
 800136e:	687b      	ldr	r3, [r7, #4]
 8001370:	609a      	str	r2, [r3, #8]
    }

    return buffer;
 8001372:	687b      	ldr	r3, [r7, #4]
}
 8001374:	4618      	mov	r0, r3
 8001376:	370c      	adds	r7, #12
 8001378:	46bd      	mov	sp, r7
 800137a:	f85d 7b04 	ldr.w	r7, [sp], #4
 800137e:	4770      	bx	lr

08001380 <skip_utf8_bom>:

/* skip the UTF-8 BOM (byte order mark) if it is at the beginning of a buffer */
static parse_buffer *skip_utf8_bom(parse_buffer * const buffer)
{
 8001380:	b580      	push	{r7, lr}
 8001382:	b082      	sub	sp, #8
 8001384:	af00      	add	r7, sp, #0
 8001386:	6078      	str	r0, [r7, #4]
    if ((buffer == NULL) || (buffer->content == NULL) || (buffer->offset != 0))
 8001388:	687b      	ldr	r3, [r7, #4]
 800138a:	2b00      	cmp	r3, #0
 800138c:	d007      	beq.n	800139e <skip_utf8_bom+0x1e>
 800138e:	687b      	ldr	r3, [r7, #4]
 8001390:	681b      	ldr	r3, [r3, #0]
 8001392:	2b00      	cmp	r3, #0
 8001394:	d003      	beq.n	800139e <skip_utf8_bom+0x1e>
 8001396:	687b      	ldr	r3, [r7, #4]
 8001398:	689b      	ldr	r3, [r3, #8]
 800139a:	2b00      	cmp	r3, #0
 800139c:	d001      	beq.n	80013a2 <skip_utf8_bom+0x22>
    {
        return NULL;
 800139e:	2300      	movs	r3, #0
 80013a0:	e01c      	b.n	80013dc <skip_utf8_bom+0x5c>
    }

    if (can_access_at_index(buffer, 4) && (strncmp((const char*)buffer_at_offset(buffer), "\xEF\xBB\xBF", 3) == 0))
 80013a2:	687b      	ldr	r3, [r7, #4]
 80013a4:	2b00      	cmp	r3, #0
 80013a6:	d018      	beq.n	80013da <skip_utf8_bom+0x5a>
 80013a8:	687b      	ldr	r3, [r7, #4]
 80013aa:	689b      	ldr	r3, [r3, #8]
 80013ac:	1d1a      	adds	r2, r3, #4
 80013ae:	687b      	ldr	r3, [r7, #4]
 80013b0:	685b      	ldr	r3, [r3, #4]
 80013b2:	429a      	cmp	r2, r3
 80013b4:	d211      	bcs.n	80013da <skip_utf8_bom+0x5a>
 80013b6:	687b      	ldr	r3, [r7, #4]
 80013b8:	681a      	ldr	r2, [r3, #0]
 80013ba:	687b      	ldr	r3, [r7, #4]
 80013bc:	689b      	ldr	r3, [r3, #8]
 80013be:	4413      	add	r3, r2
 80013c0:	2203      	movs	r2, #3
 80013c2:	4908      	ldr	r1, [pc, #32]	@ (80013e4 <skip_utf8_bom+0x64>)
 80013c4:	4618      	mov	r0, r3
 80013c6:	f028 fa3b 	bl	8029840 <strncmp>
 80013ca:	4603      	mov	r3, r0
 80013cc:	2b00      	cmp	r3, #0
 80013ce:	d104      	bne.n	80013da <skip_utf8_bom+0x5a>
    {
        buffer->offset += 3;
 80013d0:	687b      	ldr	r3, [r7, #4]
 80013d2:	689b      	ldr	r3, [r3, #8]
 80013d4:	1cda      	adds	r2, r3, #3
 80013d6:	687b      	ldr	r3, [r7, #4]
 80013d8:	609a      	str	r2, [r3, #8]
    }

    return buffer;
 80013da:	687b      	ldr	r3, [r7, #4]
}
 80013dc:	4618      	mov	r0, r3
 80013de:	3708      	adds	r7, #8
 80013e0:	46bd      	mov	sp, r7
 80013e2:	bd80      	pop	{r7, pc}
 80013e4:	0802bfc8 	.word	0x0802bfc8

080013e8 <cJSON_ParseWithOpts>:

CJSON_PUBLIC(cJSON *) cJSON_ParseWithOpts(const char *value, const char **return_parse_end, cJSON_bool require_null_terminated)
{
 80013e8:	b580      	push	{r7, lr}
 80013ea:	b086      	sub	sp, #24
 80013ec:	af00      	add	r7, sp, #0
 80013ee:	60f8      	str	r0, [r7, #12]
 80013f0:	60b9      	str	r1, [r7, #8]
 80013f2:	607a      	str	r2, [r7, #4]
    size_t buffer_length;

    if (NULL == value)
 80013f4:	68fb      	ldr	r3, [r7, #12]
 80013f6:	2b00      	cmp	r3, #0
 80013f8:	d101      	bne.n	80013fe <cJSON_ParseWithOpts+0x16>
    {
        return NULL;
 80013fa:	2300      	movs	r3, #0
 80013fc:	e00c      	b.n	8001418 <cJSON_ParseWithOpts+0x30>
    }

    /* Adding null character size due to require_null_terminated. */
    buffer_length = strlen(value) + sizeof("");
 80013fe:	68f8      	ldr	r0, [r7, #12]
 8001400:	f7fe ffce 	bl	80003a0 <strlen>
 8001404:	4603      	mov	r3, r0
 8001406:	3301      	adds	r3, #1
 8001408:	617b      	str	r3, [r7, #20]

    return cJSON_ParseWithLengthOpts(value, buffer_length, return_parse_end, require_null_terminated);
 800140a:	687b      	ldr	r3, [r7, #4]
 800140c:	68ba      	ldr	r2, [r7, #8]
 800140e:	6979      	ldr	r1, [r7, #20]
 8001410:	68f8      	ldr	r0, [r7, #12]
 8001412:	f000 f805 	bl	8001420 <cJSON_ParseWithLengthOpts>
 8001416:	4603      	mov	r3, r0
}
 8001418:	4618      	mov	r0, r3
 800141a:	3718      	adds	r7, #24
 800141c:	46bd      	mov	sp, r7
 800141e:	bd80      	pop	{r7, pc}

08001420 <cJSON_ParseWithLengthOpts>:

/* Parse an object - create a new root, and populate. */
CJSON_PUBLIC(cJSON *) cJSON_ParseWithLengthOpts(const char *value, size_t buffer_length, const char **return_parse_end, cJSON_bool require_null_terminated)
{
 8001420:	b580      	push	{r7, lr}
 8001422:	b08e      	sub	sp, #56	@ 0x38
 8001424:	af00      	add	r7, sp, #0
 8001426:	60f8      	str	r0, [r7, #12]
 8001428:	60b9      	str	r1, [r7, #8]
 800142a:	607a      	str	r2, [r7, #4]
 800142c:	603b      	str	r3, [r7, #0]
    parse_buffer buffer = { 0, 0, 0, 0, { 0, 0, 0 } };
 800142e:	f107 0318 	add.w	r3, r7, #24
 8001432:	2200      	movs	r2, #0
 8001434:	601a      	str	r2, [r3, #0]
 8001436:	605a      	str	r2, [r3, #4]
 8001438:	609a      	str	r2, [r3, #8]
 800143a:	60da      	str	r2, [r3, #12]
 800143c:	611a      	str	r2, [r3, #16]
 800143e:	615a      	str	r2, [r3, #20]
 8001440:	619a      	str	r2, [r3, #24]
    cJSON *item = NULL;
 8001442:	2300      	movs	r3, #0
 8001444:	637b      	str	r3, [r7, #52]	@ 0x34

    /* reset error position */
    global_error.json = NULL;
 8001446:	4b41      	ldr	r3, [pc, #260]	@ (800154c <cJSON_ParseWithLengthOpts+0x12c>)
 8001448:	2200      	movs	r2, #0
 800144a:	601a      	str	r2, [r3, #0]
    global_error.position = 0;
 800144c:	4b3f      	ldr	r3, [pc, #252]	@ (800154c <cJSON_ParseWithLengthOpts+0x12c>)
 800144e:	2200      	movs	r2, #0
 8001450:	605a      	str	r2, [r3, #4]

    if (value == NULL || 0 == buffer_length)
 8001452:	68fb      	ldr	r3, [r7, #12]
 8001454:	2b00      	cmp	r3, #0
 8001456:	d042      	beq.n	80014de <cJSON_ParseWithLengthOpts+0xbe>
 8001458:	68bb      	ldr	r3, [r7, #8]
 800145a:	2b00      	cmp	r3, #0
 800145c:	d03f      	beq.n	80014de <cJSON_ParseWithLengthOpts+0xbe>
    {
        goto fail;
    }

    buffer.content = (const unsigned char*)value;
 800145e:	68fb      	ldr	r3, [r7, #12]
 8001460:	61bb      	str	r3, [r7, #24]
    buffer.length = buffer_length;
 8001462:	68bb      	ldr	r3, [r7, #8]
 8001464:	61fb      	str	r3, [r7, #28]
    buffer.offset = 0;
 8001466:	2300      	movs	r3, #0
 8001468:	623b      	str	r3, [r7, #32]
    buffer.hooks = global_hooks;
 800146a:	4a39      	ldr	r2, [pc, #228]	@ (8001550 <cJSON_ParseWithLengthOpts+0x130>)
 800146c:	f107 0328 	add.w	r3, r7, #40	@ 0x28
 8001470:	ca07      	ldmia	r2, {r0, r1, r2}
 8001472:	e883 0007 	stmia.w	r3, {r0, r1, r2}

    item = cJSON_New_Item(&global_hooks);
 8001476:	4836      	ldr	r0, [pc, #216]	@ (8001550 <cJSON_ParseWithLengthOpts+0x130>)
 8001478:	f7ff fb72 	bl	8000b60 <cJSON_New_Item>
 800147c:	6378      	str	r0, [r7, #52]	@ 0x34
    if (item == NULL) /* memory fail */
 800147e:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8001480:	2b00      	cmp	r3, #0
 8001482:	d02e      	beq.n	80014e2 <cJSON_ParseWithLengthOpts+0xc2>
    {
        goto fail;
    }

    if (!parse_value(item, buffer_skip_whitespace(skip_utf8_bom(&buffer))))
 8001484:	f107 0318 	add.w	r3, r7, #24
 8001488:	4618      	mov	r0, r3
 800148a:	f7ff ff79 	bl	8001380 <skip_utf8_bom>
 800148e:	4603      	mov	r3, r0
 8001490:	4618      	mov	r0, r3
 8001492:	f7ff ff35 	bl	8001300 <buffer_skip_whitespace>
 8001496:	4603      	mov	r3, r0
 8001498:	4619      	mov	r1, r3
 800149a:	6b78      	ldr	r0, [r7, #52]	@ 0x34
 800149c:	f000 f868 	bl	8001570 <parse_value>
 80014a0:	4603      	mov	r3, r0
 80014a2:	2b00      	cmp	r3, #0
 80014a4:	d01f      	beq.n	80014e6 <cJSON_ParseWithLengthOpts+0xc6>
        /* parse failure. ep is set. */
        goto fail;
    }

    /* if we require null-terminated JSON without appended garbage, skip and then check for a null terminator */
    if (require_null_terminated)
 80014a6:	683b      	ldr	r3, [r7, #0]
 80014a8:	2b00      	cmp	r3, #0
 80014aa:	d00e      	beq.n	80014ca <cJSON_ParseWithLengthOpts+0xaa>
    {
        buffer_skip_whitespace(&buffer);
 80014ac:	f107 0318 	add.w	r3, r7, #24
 80014b0:	4618      	mov	r0, r3
 80014b2:	f7ff ff25 	bl	8001300 <buffer_skip_whitespace>
        if ((buffer.offset >= buffer.length) || buffer_at_offset(&buffer)[0] != '\0')
 80014b6:	6a3a      	ldr	r2, [r7, #32]
 80014b8:	69fb      	ldr	r3, [r7, #28]
 80014ba:	429a      	cmp	r2, r3
 80014bc:	d215      	bcs.n	80014ea <cJSON_ParseWithLengthOpts+0xca>
 80014be:	69ba      	ldr	r2, [r7, #24]
 80014c0:	6a3b      	ldr	r3, [r7, #32]
 80014c2:	4413      	add	r3, r2
 80014c4:	781b      	ldrb	r3, [r3, #0]
 80014c6:	2b00      	cmp	r3, #0
 80014c8:	d10f      	bne.n	80014ea <cJSON_ParseWithLengthOpts+0xca>
        {
            goto fail;
        }
    }
    if (return_parse_end)
 80014ca:	687b      	ldr	r3, [r7, #4]
 80014cc:	2b00      	cmp	r3, #0
 80014ce:	d004      	beq.n	80014da <cJSON_ParseWithLengthOpts+0xba>
    {
        *return_parse_end = (const char*)buffer_at_offset(&buffer);
 80014d0:	69ba      	ldr	r2, [r7, #24]
 80014d2:	6a3b      	ldr	r3, [r7, #32]
 80014d4:	441a      	add	r2, r3
 80014d6:	687b      	ldr	r3, [r7, #4]
 80014d8:	601a      	str	r2, [r3, #0]
    }

    return item;
 80014da:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 80014dc:	e031      	b.n	8001542 <cJSON_ParseWithLengthOpts+0x122>
        goto fail;
 80014de:	bf00      	nop
 80014e0:	e004      	b.n	80014ec <cJSON_ParseWithLengthOpts+0xcc>
        goto fail;
 80014e2:	bf00      	nop
 80014e4:	e002      	b.n	80014ec <cJSON_ParseWithLengthOpts+0xcc>
        goto fail;
 80014e6:	bf00      	nop
 80014e8:	e000      	b.n	80014ec <cJSON_ParseWithLengthOpts+0xcc>
            goto fail;
 80014ea:	bf00      	nop

fail:
    if (item != NULL)
 80014ec:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 80014ee:	2b00      	cmp	r3, #0
 80014f0:	d002      	beq.n	80014f8 <cJSON_ParseWithLengthOpts+0xd8>
    {
        cJSON_Delete(item);
 80014f2:	6b78      	ldr	r0, [r7, #52]	@ 0x34
 80014f4:	f7ff fb4a 	bl	8000b8c <cJSON_Delete>
    }

    if (value != NULL)
 80014f8:	68fb      	ldr	r3, [r7, #12]
 80014fa:	2b00      	cmp	r3, #0
 80014fc:	d020      	beq.n	8001540 <cJSON_ParseWithLengthOpts+0x120>
    {
        error local_error;
        local_error.json = (const unsigned char*)value;
 80014fe:	68fb      	ldr	r3, [r7, #12]
 8001500:	613b      	str	r3, [r7, #16]
        local_error.position = 0;
 8001502:	2300      	movs	r3, #0
 8001504:	617b      	str	r3, [r7, #20]

        if (buffer.offset < buffer.length)
 8001506:	6a3a      	ldr	r2, [r7, #32]
 8001508:	69fb      	ldr	r3, [r7, #28]
 800150a:	429a      	cmp	r2, r3
 800150c:	d202      	bcs.n	8001514 <cJSON_ParseWithLengthOpts+0xf4>
        {
            local_error.position = buffer.offset;
 800150e:	6a3b      	ldr	r3, [r7, #32]
 8001510:	617b      	str	r3, [r7, #20]
 8001512:	e005      	b.n	8001520 <cJSON_ParseWithLengthOpts+0x100>
        }
        else if (buffer.length > 0)
 8001514:	69fb      	ldr	r3, [r7, #28]
 8001516:	2b00      	cmp	r3, #0
 8001518:	d002      	beq.n	8001520 <cJSON_ParseWithLengthOpts+0x100>
        {
            local_error.position = buffer.length - 1;
 800151a:	69fb      	ldr	r3, [r7, #28]
 800151c:	3b01      	subs	r3, #1
 800151e:	617b      	str	r3, [r7, #20]
        }

        if (return_parse_end != NULL)
 8001520:	687b      	ldr	r3, [r7, #4]
 8001522:	2b00      	cmp	r3, #0
 8001524:	d004      	beq.n	8001530 <cJSON_ParseWithLengthOpts+0x110>
        {
            *return_parse_end = (const char*)local_error.json + local_error.position;
 8001526:	693a      	ldr	r2, [r7, #16]
 8001528:	697b      	ldr	r3, [r7, #20]
 800152a:	441a      	add	r2, r3
 800152c:	687b      	ldr	r3, [r7, #4]
 800152e:	601a      	str	r2, [r3, #0]
        }

        global_error = local_error;
 8001530:	4b06      	ldr	r3, [pc, #24]	@ (800154c <cJSON_ParseWithLengthOpts+0x12c>)
 8001532:	461a      	mov	r2, r3
 8001534:	f107 0310 	add.w	r3, r7, #16
 8001538:	e893 0003 	ldmia.w	r3, {r0, r1}
 800153c:	e882 0003 	stmia.w	r2, {r0, r1}
    }

    return NULL;
 8001540:	2300      	movs	r3, #0
}
 8001542:	4618      	mov	r0, r3
 8001544:	3738      	adds	r7, #56	@ 0x38
 8001546:	46bd      	mov	sp, r7
 8001548:	bd80      	pop	{r7, pc}
 800154a:	bf00      	nop
 800154c:	2400022c 	.word	0x2400022c
 8001550:	24000000 	.word	0x24000000

08001554 <cJSON_Parse>:

/* Default options for cJSON_Parse */
CJSON_PUBLIC(cJSON *) cJSON_Parse(const char *value)
{
 8001554:	b580      	push	{r7, lr}
 8001556:	b082      	sub	sp, #8
 8001558:	af00      	add	r7, sp, #0
 800155a:	6078      	str	r0, [r7, #4]
    return cJSON_ParseWithOpts(value, 0, 0);
 800155c:	2200      	movs	r2, #0
 800155e:	2100      	movs	r1, #0
 8001560:	6878      	ldr	r0, [r7, #4]
 8001562:	f7ff ff41 	bl	80013e8 <cJSON_ParseWithOpts>
 8001566:	4603      	mov	r3, r0
}
 8001568:	4618      	mov	r0, r3
 800156a:	3708      	adds	r7, #8
 800156c:	46bd      	mov	sp, r7
 800156e:	bd80      	pop	{r7, pc}

08001570 <parse_value>:
    return print_value(item, &p);
}

/* Parser core - when encountering text, process appropriately. */
static cJSON_bool parse_value(cJSON * const item, parse_buffer * const input_buffer)
{
 8001570:	b580      	push	{r7, lr}
 8001572:	b082      	sub	sp, #8
 8001574:	af00      	add	r7, sp, #0
 8001576:	6078      	str	r0, [r7, #4]
 8001578:	6039      	str	r1, [r7, #0]
    if ((input_buffer == NULL) || (input_buffer->content == NULL))
 800157a:	683b      	ldr	r3, [r7, #0]
 800157c:	2b00      	cmp	r3, #0
 800157e:	d003      	beq.n	8001588 <parse_value+0x18>
 8001580:	683b      	ldr	r3, [r7, #0]
 8001582:	681b      	ldr	r3, [r3, #0]
 8001584:	2b00      	cmp	r3, #0
 8001586:	d101      	bne.n	800158c <parse_value+0x1c>
    {
        return false; /* no input */
 8001588:	2300      	movs	r3, #0
 800158a:	e0d2      	b.n	8001732 <parse_value+0x1c2>
    }

    /* parse the different types of values */
    /* null */
    if (can_read(input_buffer, 4) && (strncmp((const char*)buffer_at_offset(input_buffer), "null", 4) == 0))
 800158c:	683b      	ldr	r3, [r7, #0]
 800158e:	2b00      	cmp	r3, #0
 8001590:	d01d      	beq.n	80015ce <parse_value+0x5e>
 8001592:	683b      	ldr	r3, [r7, #0]
 8001594:	689b      	ldr	r3, [r3, #8]
 8001596:	1d1a      	adds	r2, r3, #4
 8001598:	683b      	ldr	r3, [r7, #0]
 800159a:	685b      	ldr	r3, [r3, #4]
 800159c:	429a      	cmp	r2, r3
 800159e:	d816      	bhi.n	80015ce <parse_value+0x5e>
 80015a0:	683b      	ldr	r3, [r7, #0]
 80015a2:	681a      	ldr	r2, [r3, #0]
 80015a4:	683b      	ldr	r3, [r7, #0]
 80015a6:	689b      	ldr	r3, [r3, #8]
 80015a8:	4413      	add	r3, r2
 80015aa:	2204      	movs	r2, #4
 80015ac:	4963      	ldr	r1, [pc, #396]	@ (800173c <parse_value+0x1cc>)
 80015ae:	4618      	mov	r0, r3
 80015b0:	f028 f946 	bl	8029840 <strncmp>
 80015b4:	4603      	mov	r3, r0
 80015b6:	2b00      	cmp	r3, #0
 80015b8:	d109      	bne.n	80015ce <parse_value+0x5e>
    {
        item->type = cJSON_NULL;
 80015ba:	687b      	ldr	r3, [r7, #4]
 80015bc:	2204      	movs	r2, #4
 80015be:	60da      	str	r2, [r3, #12]
        input_buffer->offset += 4;
 80015c0:	683b      	ldr	r3, [r7, #0]
 80015c2:	689b      	ldr	r3, [r3, #8]
 80015c4:	1d1a      	adds	r2, r3, #4
 80015c6:	683b      	ldr	r3, [r7, #0]
 80015c8:	609a      	str	r2, [r3, #8]
        return true;
 80015ca:	2301      	movs	r3, #1
 80015cc:	e0b1      	b.n	8001732 <parse_value+0x1c2>
    }
    /* false */
    if (can_read(input_buffer, 5) && (strncmp((const char*)buffer_at_offset(input_buffer), "false", 5) == 0))
 80015ce:	683b      	ldr	r3, [r7, #0]
 80015d0:	2b00      	cmp	r3, #0
 80015d2:	d01d      	beq.n	8001610 <parse_value+0xa0>
 80015d4:	683b      	ldr	r3, [r7, #0]
 80015d6:	689b      	ldr	r3, [r3, #8]
 80015d8:	1d5a      	adds	r2, r3, #5
 80015da:	683b      	ldr	r3, [r7, #0]
 80015dc:	685b      	ldr	r3, [r3, #4]
 80015de:	429a      	cmp	r2, r3
 80015e0:	d816      	bhi.n	8001610 <parse_value+0xa0>
 80015e2:	683b      	ldr	r3, [r7, #0]
 80015e4:	681a      	ldr	r2, [r3, #0]
 80015e6:	683b      	ldr	r3, [r7, #0]
 80015e8:	689b      	ldr	r3, [r3, #8]
 80015ea:	4413      	add	r3, r2
 80015ec:	2205      	movs	r2, #5
 80015ee:	4954      	ldr	r1, [pc, #336]	@ (8001740 <parse_value+0x1d0>)
 80015f0:	4618      	mov	r0, r3
 80015f2:	f028 f925 	bl	8029840 <strncmp>
 80015f6:	4603      	mov	r3, r0
 80015f8:	2b00      	cmp	r3, #0
 80015fa:	d109      	bne.n	8001610 <parse_value+0xa0>
    {
        item->type = cJSON_False;
 80015fc:	687b      	ldr	r3, [r7, #4]
 80015fe:	2201      	movs	r2, #1
 8001600:	60da      	str	r2, [r3, #12]
        input_buffer->offset += 5;
 8001602:	683b      	ldr	r3, [r7, #0]
 8001604:	689b      	ldr	r3, [r3, #8]
 8001606:	1d5a      	adds	r2, r3, #5
 8001608:	683b      	ldr	r3, [r7, #0]
 800160a:	609a      	str	r2, [r3, #8]
        return true;
 800160c:	2301      	movs	r3, #1
 800160e:	e090      	b.n	8001732 <parse_value+0x1c2>
    }
    /* true */
    if (can_read(input_buffer, 4) && (strncmp((const char*)buffer_at_offset(input_buffer), "true", 4) == 0))
 8001610:	683b      	ldr	r3, [r7, #0]
 8001612:	2b00      	cmp	r3, #0
 8001614:	d020      	beq.n	8001658 <parse_value+0xe8>
 8001616:	683b      	ldr	r3, [r7, #0]
 8001618:	689b      	ldr	r3, [r3, #8]
 800161a:	1d1a      	adds	r2, r3, #4
 800161c:	683b      	ldr	r3, [r7, #0]
 800161e:	685b      	ldr	r3, [r3, #4]
 8001620:	429a      	cmp	r2, r3
 8001622:	d819      	bhi.n	8001658 <parse_value+0xe8>
 8001624:	683b      	ldr	r3, [r7, #0]
 8001626:	681a      	ldr	r2, [r3, #0]
 8001628:	683b      	ldr	r3, [r7, #0]
 800162a:	689b      	ldr	r3, [r3, #8]
 800162c:	4413      	add	r3, r2
 800162e:	2204      	movs	r2, #4
 8001630:	4944      	ldr	r1, [pc, #272]	@ (8001744 <parse_value+0x1d4>)
 8001632:	4618      	mov	r0, r3
 8001634:	f028 f904 	bl	8029840 <strncmp>
 8001638:	4603      	mov	r3, r0
 800163a:	2b00      	cmp	r3, #0
 800163c:	d10c      	bne.n	8001658 <parse_value+0xe8>
    {
        item->type = cJSON_True;
 800163e:	687b      	ldr	r3, [r7, #4]
 8001640:	2202      	movs	r2, #2
 8001642:	60da      	str	r2, [r3, #12]
        item->valueint = 1;
 8001644:	687b      	ldr	r3, [r7, #4]
 8001646:	2201      	movs	r2, #1
 8001648:	615a      	str	r2, [r3, #20]
        input_buffer->offset += 4;
 800164a:	683b      	ldr	r3, [r7, #0]
 800164c:	689b      	ldr	r3, [r3, #8]
 800164e:	1d1a      	adds	r2, r3, #4
 8001650:	683b      	ldr	r3, [r7, #0]
 8001652:	609a      	str	r2, [r3, #8]
        return true;
 8001654:	2301      	movs	r3, #1
 8001656:	e06c      	b.n	8001732 <parse_value+0x1c2>
    }
    /* string */
    if (can_access_at_index(input_buffer, 0) && (buffer_at_offset(input_buffer)[0] == '\"'))
 8001658:	683b      	ldr	r3, [r7, #0]
 800165a:	2b00      	cmp	r3, #0
 800165c:	d013      	beq.n	8001686 <parse_value+0x116>
 800165e:	683b      	ldr	r3, [r7, #0]
 8001660:	689a      	ldr	r2, [r3, #8]
 8001662:	683b      	ldr	r3, [r7, #0]
 8001664:	685b      	ldr	r3, [r3, #4]
 8001666:	429a      	cmp	r2, r3
 8001668:	d20d      	bcs.n	8001686 <parse_value+0x116>
 800166a:	683b      	ldr	r3, [r7, #0]
 800166c:	681a      	ldr	r2, [r3, #0]
 800166e:	683b      	ldr	r3, [r7, #0]
 8001670:	689b      	ldr	r3, [r3, #8]
 8001672:	4413      	add	r3, r2
 8001674:	781b      	ldrb	r3, [r3, #0]
 8001676:	2b22      	cmp	r3, #34	@ 0x22
 8001678:	d105      	bne.n	8001686 <parse_value+0x116>
    {
        return parse_string(item, input_buffer);
 800167a:	6839      	ldr	r1, [r7, #0]
 800167c:	6878      	ldr	r0, [r7, #4]
 800167e:	f7ff fcf7 	bl	8001070 <parse_string>
 8001682:	4603      	mov	r3, r0
 8001684:	e055      	b.n	8001732 <parse_value+0x1c2>
    }
    /* number */
    if (can_access_at_index(input_buffer, 0) && ((buffer_at_offset(input_buffer)[0] == '-') || ((buffer_at_offset(input_buffer)[0] >= '0') && (buffer_at_offset(input_buffer)[0] <= '9'))))
 8001686:	683b      	ldr	r3, [r7, #0]
 8001688:	2b00      	cmp	r3, #0
 800168a:	d023      	beq.n	80016d4 <parse_value+0x164>
 800168c:	683b      	ldr	r3, [r7, #0]
 800168e:	689a      	ldr	r2, [r3, #8]
 8001690:	683b      	ldr	r3, [r7, #0]
 8001692:	685b      	ldr	r3, [r3, #4]
 8001694:	429a      	cmp	r2, r3
 8001696:	d21d      	bcs.n	80016d4 <parse_value+0x164>
 8001698:	683b      	ldr	r3, [r7, #0]
 800169a:	681a      	ldr	r2, [r3, #0]
 800169c:	683b      	ldr	r3, [r7, #0]
 800169e:	689b      	ldr	r3, [r3, #8]
 80016a0:	4413      	add	r3, r2
 80016a2:	781b      	ldrb	r3, [r3, #0]
 80016a4:	2b2d      	cmp	r3, #45	@ 0x2d
 80016a6:	d00f      	beq.n	80016c8 <parse_value+0x158>
 80016a8:	683b      	ldr	r3, [r7, #0]
 80016aa:	681a      	ldr	r2, [r3, #0]
 80016ac:	683b      	ldr	r3, [r7, #0]
 80016ae:	689b      	ldr	r3, [r3, #8]
 80016b0:	4413      	add	r3, r2
 80016b2:	781b      	ldrb	r3, [r3, #0]
 80016b4:	2b2f      	cmp	r3, #47	@ 0x2f
 80016b6:	d90d      	bls.n	80016d4 <parse_value+0x164>
 80016b8:	683b      	ldr	r3, [r7, #0]
 80016ba:	681a      	ldr	r2, [r3, #0]
 80016bc:	683b      	ldr	r3, [r7, #0]
 80016be:	689b      	ldr	r3, [r3, #8]
 80016c0:	4413      	add	r3, r2
 80016c2:	781b      	ldrb	r3, [r3, #0]
 80016c4:	2b39      	cmp	r3, #57	@ 0x39
 80016c6:	d805      	bhi.n	80016d4 <parse_value+0x164>
    {
        return parse_number(item, input_buffer);
 80016c8:	6839      	ldr	r1, [r7, #0]
 80016ca:	6878      	ldr	r0, [r7, #4]
 80016cc:	f7ff fab8 	bl	8000c40 <parse_number>
 80016d0:	4603      	mov	r3, r0
 80016d2:	e02e      	b.n	8001732 <parse_value+0x1c2>
    }
    /* array */
    if (can_access_at_index(input_buffer, 0) && (buffer_at_offset(input_buffer)[0] == '['))
 80016d4:	683b      	ldr	r3, [r7, #0]
 80016d6:	2b00      	cmp	r3, #0
 80016d8:	d013      	beq.n	8001702 <parse_value+0x192>
 80016da:	683b      	ldr	r3, [r7, #0]
 80016dc:	689a      	ldr	r2, [r3, #8]
 80016de:	683b      	ldr	r3, [r7, #0]
 80016e0:	685b      	ldr	r3, [r3, #4]
 80016e2:	429a      	cmp	r2, r3
 80016e4:	d20d      	bcs.n	8001702 <parse_value+0x192>
 80016e6:	683b      	ldr	r3, [r7, #0]
 80016e8:	681a      	ldr	r2, [r3, #0]
 80016ea:	683b      	ldr	r3, [r7, #0]
 80016ec:	689b      	ldr	r3, [r3, #8]
 80016ee:	4413      	add	r3, r2
 80016f0:	781b      	ldrb	r3, [r3, #0]
 80016f2:	2b5b      	cmp	r3, #91	@ 0x5b
 80016f4:	d105      	bne.n	8001702 <parse_value+0x192>
    {
        return parse_array(item, input_buffer);
 80016f6:	6839      	ldr	r1, [r7, #0]
 80016f8:	6878      	ldr	r0, [r7, #4]
 80016fa:	f000 f825 	bl	8001748 <parse_array>
 80016fe:	4603      	mov	r3, r0
 8001700:	e017      	b.n	8001732 <parse_value+0x1c2>
    }
    /* object */
    if (can_access_at_index(input_buffer, 0) && (buffer_at_offset(input_buffer)[0] == '{'))
 8001702:	683b      	ldr	r3, [r7, #0]
 8001704:	2b00      	cmp	r3, #0
 8001706:	d013      	beq.n	8001730 <parse_value+0x1c0>
 8001708:	683b      	ldr	r3, [r7, #0]
 800170a:	689a      	ldr	r2, [r3, #8]
 800170c:	683b      	ldr	r3, [r7, #0]
 800170e:	685b      	ldr	r3, [r3, #4]
 8001710:	429a      	cmp	r2, r3
 8001712:	d20d      	bcs.n	8001730 <parse_value+0x1c0>
 8001714:	683b      	ldr	r3, [r7, #0]
 8001716:	681a      	ldr	r2, [r3, #0]
 8001718:	683b      	ldr	r3, [r7, #0]
 800171a:	689b      	ldr	r3, [r3, #8]
 800171c:	4413      	add	r3, r2
 800171e:	781b      	ldrb	r3, [r3, #0]
 8001720:	2b7b      	cmp	r3, #123	@ 0x7b
 8001722:	d105      	bne.n	8001730 <parse_value+0x1c0>
    {
        return parse_object(item, input_buffer);
 8001724:	6839      	ldr	r1, [r7, #0]
 8001726:	6878      	ldr	r0, [r7, #4]
 8001728:	f000 f8d2 	bl	80018d0 <parse_object>
 800172c:	4603      	mov	r3, r0
 800172e:	e000      	b.n	8001732 <parse_value+0x1c2>
    }

    return false;
 8001730:	2300      	movs	r3, #0
}
 8001732:	4618      	mov	r0, r3
 8001734:	3708      	adds	r7, #8
 8001736:	46bd      	mov	sp, r7
 8001738:	bd80      	pop	{r7, pc}
 800173a:	bf00      	nop
 800173c:	0802bf9c 	.word	0x0802bf9c
 8001740:	0802bfcc 	.word	0x0802bfcc
 8001744:	0802bfd4 	.word	0x0802bfd4

08001748 <parse_array>:
    }
}

/* Build an array from input text. */
static cJSON_bool parse_array(cJSON * const item, parse_buffer * const input_buffer)
{
 8001748:	b580      	push	{r7, lr}
 800174a:	b086      	sub	sp, #24
 800174c:	af00      	add	r7, sp, #0
 800174e:	6078      	str	r0, [r7, #4]
 8001750:	6039      	str	r1, [r7, #0]
    cJSON *head = NULL; /* head of the linked list */
 8001752:	2300      	movs	r3, #0
 8001754:	617b      	str	r3, [r7, #20]
    cJSON *current_item = NULL;
 8001756:	2300      	movs	r3, #0
 8001758:	613b      	str	r3, [r7, #16]

    if (input_buffer->depth >= CJSON_NESTING_LIMIT)
 800175a:	683b      	ldr	r3, [r7, #0]
 800175c:	68db      	ldr	r3, [r3, #12]
 800175e:	f5b3 7f7a 	cmp.w	r3, #1000	@ 0x3e8
 8001762:	d301      	bcc.n	8001768 <parse_array+0x20>
    {
        return false; /* to deeply nested */
 8001764:	2300      	movs	r3, #0
 8001766:	e0af      	b.n	80018c8 <parse_array+0x180>
    }
    input_buffer->depth++;
 8001768:	683b      	ldr	r3, [r7, #0]
 800176a:	68db      	ldr	r3, [r3, #12]
 800176c:	1c5a      	adds	r2, r3, #1
 800176e:	683b      	ldr	r3, [r7, #0]
 8001770:	60da      	str	r2, [r3, #12]

    if (buffer_at_offset(input_buffer)[0] != '[')
 8001772:	683b      	ldr	r3, [r7, #0]
 8001774:	681a      	ldr	r2, [r3, #0]
 8001776:	683b      	ldr	r3, [r7, #0]
 8001778:	689b      	ldr	r3, [r3, #8]
 800177a:	4413      	add	r3, r2
 800177c:	781b      	ldrb	r3, [r3, #0]
 800177e:	2b5b      	cmp	r3, #91	@ 0x5b
 8001780:	f040 8094 	bne.w	80018ac <parse_array+0x164>
    {
        /* not an array */
        goto fail;
    }

    input_buffer->offset++;
 8001784:	683b      	ldr	r3, [r7, #0]
 8001786:	689b      	ldr	r3, [r3, #8]
 8001788:	1c5a      	adds	r2, r3, #1
 800178a:	683b      	ldr	r3, [r7, #0]
 800178c:	609a      	str	r2, [r3, #8]
    buffer_skip_whitespace(input_buffer);
 800178e:	6838      	ldr	r0, [r7, #0]
 8001790:	f7ff fdb6 	bl	8001300 <buffer_skip_whitespace>
    if (can_access_at_index(input_buffer, 0) && (buffer_at_offset(input_buffer)[0] == ']'))
 8001794:	683b      	ldr	r3, [r7, #0]
 8001796:	2b00      	cmp	r3, #0
 8001798:	d00d      	beq.n	80017b6 <parse_array+0x6e>
 800179a:	683b      	ldr	r3, [r7, #0]
 800179c:	689a      	ldr	r2, [r3, #8]
 800179e:	683b      	ldr	r3, [r7, #0]
 80017a0:	685b      	ldr	r3, [r3, #4]
 80017a2:	429a      	cmp	r2, r3
 80017a4:	d207      	bcs.n	80017b6 <parse_array+0x6e>
 80017a6:	683b      	ldr	r3, [r7, #0]
 80017a8:	681a      	ldr	r2, [r3, #0]
 80017aa:	683b      	ldr	r3, [r7, #0]
 80017ac:	689b      	ldr	r3, [r3, #8]
 80017ae:	4413      	add	r3, r2
 80017b0:	781b      	ldrb	r3, [r3, #0]
 80017b2:	2b5d      	cmp	r3, #93	@ 0x5d
 80017b4:	d061      	beq.n	800187a <parse_array+0x132>
        /* empty array */
        goto success;
    }

    /* check if we skipped to the end of the buffer */
    if (cannot_access_at_index(input_buffer, 0))
 80017b6:	683b      	ldr	r3, [r7, #0]
 80017b8:	2b00      	cmp	r3, #0
 80017ba:	d005      	beq.n	80017c8 <parse_array+0x80>
 80017bc:	683b      	ldr	r3, [r7, #0]
 80017be:	689a      	ldr	r2, [r3, #8]
 80017c0:	683b      	ldr	r3, [r7, #0]
 80017c2:	685b      	ldr	r3, [r3, #4]
 80017c4:	429a      	cmp	r2, r3
 80017c6:	d305      	bcc.n	80017d4 <parse_array+0x8c>
    {
        input_buffer->offset--;
 80017c8:	683b      	ldr	r3, [r7, #0]
 80017ca:	689b      	ldr	r3, [r3, #8]
 80017cc:	1e5a      	subs	r2, r3, #1
 80017ce:	683b      	ldr	r3, [r7, #0]
 80017d0:	609a      	str	r2, [r3, #8]
        goto fail;
 80017d2:	e072      	b.n	80018ba <parse_array+0x172>
    }

    /* step back to character in front of the first element */
    input_buffer->offset--;
 80017d4:	683b      	ldr	r3, [r7, #0]
 80017d6:	689b      	ldr	r3, [r3, #8]
 80017d8:	1e5a      	subs	r2, r3, #1
 80017da:	683b      	ldr	r3, [r7, #0]
 80017dc:	609a      	str	r2, [r3, #8]
    /* loop through the comma separated array elements */
    do
    {
        /* allocate next item */
        cJSON *new_item = cJSON_New_Item(&(input_buffer->hooks));
 80017de:	683b      	ldr	r3, [r7, #0]
 80017e0:	3310      	adds	r3, #16
 80017e2:	4618      	mov	r0, r3
 80017e4:	f7ff f9bc 	bl	8000b60 <cJSON_New_Item>
 80017e8:	60f8      	str	r0, [r7, #12]
        if (new_item == NULL)
 80017ea:	68fb      	ldr	r3, [r7, #12]
 80017ec:	2b00      	cmp	r3, #0
 80017ee:	d05f      	beq.n	80018b0 <parse_array+0x168>
        {
            goto fail; /* allocation failure */
        }

        /* attach next item to list */
        if (head == NULL)
 80017f0:	697b      	ldr	r3, [r7, #20]
 80017f2:	2b00      	cmp	r3, #0
 80017f4:	d104      	bne.n	8001800 <parse_array+0xb8>
        {
            /* start the linked list */
            current_item = head = new_item;
 80017f6:	68fb      	ldr	r3, [r7, #12]
 80017f8:	617b      	str	r3, [r7, #20]
 80017fa:	697b      	ldr	r3, [r7, #20]
 80017fc:	613b      	str	r3, [r7, #16]
 80017fe:	e007      	b.n	8001810 <parse_array+0xc8>
        }
        else
        {
            /* add to the end and advance */
            current_item->next = new_item;
 8001800:	693b      	ldr	r3, [r7, #16]
 8001802:	68fa      	ldr	r2, [r7, #12]
 8001804:	601a      	str	r2, [r3, #0]
            new_item->prev = current_item;
 8001806:	68fb      	ldr	r3, [r7, #12]
 8001808:	693a      	ldr	r2, [r7, #16]
 800180a:	605a      	str	r2, [r3, #4]
            current_item = new_item;
 800180c:	68fb      	ldr	r3, [r7, #12]
 800180e:	613b      	str	r3, [r7, #16]
        }

        /* parse next value */
        input_buffer->offset++;
 8001810:	683b      	ldr	r3, [r7, #0]
 8001812:	689b      	ldr	r3, [r3, #8]
 8001814:	1c5a      	adds	r2, r3, #1
 8001816:	683b      	ldr	r3, [r7, #0]
 8001818:	609a      	str	r2, [r3, #8]
        buffer_skip_whitespace(input_buffer);
 800181a:	6838      	ldr	r0, [r7, #0]
 800181c:	f7ff fd70 	bl	8001300 <buffer_skip_whitespace>
        if (!parse_value(current_item, input_buffer))
 8001820:	6839      	ldr	r1, [r7, #0]
 8001822:	6938      	ldr	r0, [r7, #16]
 8001824:	f7ff fea4 	bl	8001570 <parse_value>
 8001828:	4603      	mov	r3, r0
 800182a:	2b00      	cmp	r3, #0
 800182c:	d042      	beq.n	80018b4 <parse_array+0x16c>
        {
            goto fail; /* failed to parse value */
        }
        buffer_skip_whitespace(input_buffer);
 800182e:	6838      	ldr	r0, [r7, #0]
 8001830:	f7ff fd66 	bl	8001300 <buffer_skip_whitespace>
    }
    while (can_access_at_index(input_buffer, 0) && (buffer_at_offset(input_buffer)[0] == ','));
 8001834:	683b      	ldr	r3, [r7, #0]
 8001836:	2b00      	cmp	r3, #0
 8001838:	d00d      	beq.n	8001856 <parse_array+0x10e>
 800183a:	683b      	ldr	r3, [r7, #0]
 800183c:	689a      	ldr	r2, [r3, #8]
 800183e:	683b      	ldr	r3, [r7, #0]
 8001840:	685b      	ldr	r3, [r3, #4]
 8001842:	429a      	cmp	r2, r3
 8001844:	d207      	bcs.n	8001856 <parse_array+0x10e>
 8001846:	683b      	ldr	r3, [r7, #0]
 8001848:	681a      	ldr	r2, [r3, #0]
 800184a:	683b      	ldr	r3, [r7, #0]
 800184c:	689b      	ldr	r3, [r3, #8]
 800184e:	4413      	add	r3, r2
 8001850:	781b      	ldrb	r3, [r3, #0]
 8001852:	2b2c      	cmp	r3, #44	@ 0x2c
 8001854:	d0c3      	beq.n	80017de <parse_array+0x96>

    if (cannot_access_at_index(input_buffer, 0) || buffer_at_offset(input_buffer)[0] != ']')
 8001856:	683b      	ldr	r3, [r7, #0]
 8001858:	2b00      	cmp	r3, #0
 800185a:	d02d      	beq.n	80018b8 <parse_array+0x170>
 800185c:	683b      	ldr	r3, [r7, #0]
 800185e:	689a      	ldr	r2, [r3, #8]
 8001860:	683b      	ldr	r3, [r7, #0]
 8001862:	685b      	ldr	r3, [r3, #4]
 8001864:	429a      	cmp	r2, r3
 8001866:	d227      	bcs.n	80018b8 <parse_array+0x170>
 8001868:	683b      	ldr	r3, [r7, #0]
 800186a:	681a      	ldr	r2, [r3, #0]
 800186c:	683b      	ldr	r3, [r7, #0]
 800186e:	689b      	ldr	r3, [r3, #8]
 8001870:	4413      	add	r3, r2
 8001872:	781b      	ldrb	r3, [r3, #0]
 8001874:	2b5d      	cmp	r3, #93	@ 0x5d
 8001876:	d11f      	bne.n	80018b8 <parse_array+0x170>
    {
        goto fail; /* expected end of array */
    }

success:
 8001878:	e000      	b.n	800187c <parse_array+0x134>
        goto success;
 800187a:	bf00      	nop
    input_buffer->depth--;
 800187c:	683b      	ldr	r3, [r7, #0]
 800187e:	68db      	ldr	r3, [r3, #12]
 8001880:	1e5a      	subs	r2, r3, #1
 8001882:	683b      	ldr	r3, [r7, #0]
 8001884:	60da      	str	r2, [r3, #12]

    if (head != NULL) {
 8001886:	697b      	ldr	r3, [r7, #20]
 8001888:	2b00      	cmp	r3, #0
 800188a:	d002      	beq.n	8001892 <parse_array+0x14a>
        head->prev = current_item;
 800188c:	697b      	ldr	r3, [r7, #20]
 800188e:	693a      	ldr	r2, [r7, #16]
 8001890:	605a      	str	r2, [r3, #4]
    }

    item->type = cJSON_Array;
 8001892:	687b      	ldr	r3, [r7, #4]
 8001894:	2220      	movs	r2, #32
 8001896:	60da      	str	r2, [r3, #12]
    item->child = head;
 8001898:	687b      	ldr	r3, [r7, #4]
 800189a:	697a      	ldr	r2, [r7, #20]
 800189c:	609a      	str	r2, [r3, #8]

    input_buffer->offset++;
 800189e:	683b      	ldr	r3, [r7, #0]
 80018a0:	689b      	ldr	r3, [r3, #8]
 80018a2:	1c5a      	adds	r2, r3, #1
 80018a4:	683b      	ldr	r3, [r7, #0]
 80018a6:	609a      	str	r2, [r3, #8]

    return true;
 80018a8:	2301      	movs	r3, #1
 80018aa:	e00d      	b.n	80018c8 <parse_array+0x180>
        goto fail;
 80018ac:	bf00      	nop
 80018ae:	e004      	b.n	80018ba <parse_array+0x172>
            goto fail; /* allocation failure */
 80018b0:	bf00      	nop
 80018b2:	e002      	b.n	80018ba <parse_array+0x172>
            goto fail; /* failed to parse value */
 80018b4:	bf00      	nop
 80018b6:	e000      	b.n	80018ba <parse_array+0x172>
        goto fail; /* expected end of array */
 80018b8:	bf00      	nop

fail:
    if (head != NULL)
 80018ba:	697b      	ldr	r3, [r7, #20]
 80018bc:	2b00      	cmp	r3, #0
 80018be:	d002      	beq.n	80018c6 <parse_array+0x17e>
    {
        cJSON_Delete(head);
 80018c0:	6978      	ldr	r0, [r7, #20]
 80018c2:	f7ff f963 	bl	8000b8c <cJSON_Delete>
    }

    return false;
 80018c6:	2300      	movs	r3, #0
}
 80018c8:	4618      	mov	r0, r3
 80018ca:	3718      	adds	r7, #24
 80018cc:	46bd      	mov	sp, r7
 80018ce:	bd80      	pop	{r7, pc}

080018d0 <parse_object>:
    return true;
}

/* Build an object from the text. */
static cJSON_bool parse_object(cJSON * const item, parse_buffer * const input_buffer)
{
 80018d0:	b580      	push	{r7, lr}
 80018d2:	b086      	sub	sp, #24
 80018d4:	af00      	add	r7, sp, #0
 80018d6:	6078      	str	r0, [r7, #4]
 80018d8:	6039      	str	r1, [r7, #0]
    cJSON *head = NULL; /* linked list head */
 80018da:	2300      	movs	r3, #0
 80018dc:	617b      	str	r3, [r7, #20]
    cJSON *current_item = NULL;
 80018de:	2300      	movs	r3, #0
 80018e0:	613b      	str	r3, [r7, #16]

    if (input_buffer->depth >= CJSON_NESTING_LIMIT)
 80018e2:	683b      	ldr	r3, [r7, #0]
 80018e4:	68db      	ldr	r3, [r3, #12]
 80018e6:	f5b3 7f7a 	cmp.w	r3, #1000	@ 0x3e8
 80018ea:	d301      	bcc.n	80018f0 <parse_object+0x20>
    {
        return false; /* to deeply nested */
 80018ec:	2300      	movs	r3, #0
 80018ee:	e0f7      	b.n	8001ae0 <parse_object+0x210>
    }
    input_buffer->depth++;
 80018f0:	683b      	ldr	r3, [r7, #0]
 80018f2:	68db      	ldr	r3, [r3, #12]
 80018f4:	1c5a      	adds	r2, r3, #1
 80018f6:	683b      	ldr	r3, [r7, #0]
 80018f8:	60da      	str	r2, [r3, #12]

    if (cannot_access_at_index(input_buffer, 0) || (buffer_at_offset(input_buffer)[0] != '{'))
 80018fa:	683b      	ldr	r3, [r7, #0]
 80018fc:	2b00      	cmp	r3, #0
 80018fe:	f000 80db 	beq.w	8001ab8 <parse_object+0x1e8>
 8001902:	683b      	ldr	r3, [r7, #0]
 8001904:	689a      	ldr	r2, [r3, #8]
 8001906:	683b      	ldr	r3, [r7, #0]
 8001908:	685b      	ldr	r3, [r3, #4]
 800190a:	429a      	cmp	r2, r3
 800190c:	f080 80d4 	bcs.w	8001ab8 <parse_object+0x1e8>
 8001910:	683b      	ldr	r3, [r7, #0]
 8001912:	681a      	ldr	r2, [r3, #0]
 8001914:	683b      	ldr	r3, [r7, #0]
 8001916:	689b      	ldr	r3, [r3, #8]
 8001918:	4413      	add	r3, r2
 800191a:	781b      	ldrb	r3, [r3, #0]
 800191c:	2b7b      	cmp	r3, #123	@ 0x7b
 800191e:	f040 80cb 	bne.w	8001ab8 <parse_object+0x1e8>
    {
        goto fail; /* not an object */
    }

    input_buffer->offset++;
 8001922:	683b      	ldr	r3, [r7, #0]
 8001924:	689b      	ldr	r3, [r3, #8]
 8001926:	1c5a      	adds	r2, r3, #1
 8001928:	683b      	ldr	r3, [r7, #0]
 800192a:	609a      	str	r2, [r3, #8]
    buffer_skip_whitespace(input_buffer);
 800192c:	6838      	ldr	r0, [r7, #0]
 800192e:	f7ff fce7 	bl	8001300 <buffer_skip_whitespace>
    if (can_access_at_index(input_buffer, 0) && (buffer_at_offset(input_buffer)[0] == '}'))
 8001932:	683b      	ldr	r3, [r7, #0]
 8001934:	2b00      	cmp	r3, #0
 8001936:	d00e      	beq.n	8001956 <parse_object+0x86>
 8001938:	683b      	ldr	r3, [r7, #0]
 800193a:	689a      	ldr	r2, [r3, #8]
 800193c:	683b      	ldr	r3, [r7, #0]
 800193e:	685b      	ldr	r3, [r3, #4]
 8001940:	429a      	cmp	r2, r3
 8001942:	d208      	bcs.n	8001956 <parse_object+0x86>
 8001944:	683b      	ldr	r3, [r7, #0]
 8001946:	681a      	ldr	r2, [r3, #0]
 8001948:	683b      	ldr	r3, [r7, #0]
 800194a:	689b      	ldr	r3, [r3, #8]
 800194c:	4413      	add	r3, r2
 800194e:	781b      	ldrb	r3, [r3, #0]
 8001950:	2b7d      	cmp	r3, #125	@ 0x7d
 8001952:	f000 8098 	beq.w	8001a86 <parse_object+0x1b6>
    {
        goto success; /* empty object */
    }

    /* check if we skipped to the end of the buffer */
    if (cannot_access_at_index(input_buffer, 0))
 8001956:	683b      	ldr	r3, [r7, #0]
 8001958:	2b00      	cmp	r3, #0
 800195a:	d005      	beq.n	8001968 <parse_object+0x98>
 800195c:	683b      	ldr	r3, [r7, #0]
 800195e:	689a      	ldr	r2, [r3, #8]
 8001960:	683b      	ldr	r3, [r7, #0]
 8001962:	685b      	ldr	r3, [r3, #4]
 8001964:	429a      	cmp	r2, r3
 8001966:	d305      	bcc.n	8001974 <parse_object+0xa4>
    {
        input_buffer->offset--;
 8001968:	683b      	ldr	r3, [r7, #0]
 800196a:	689b      	ldr	r3, [r3, #8]
 800196c:	1e5a      	subs	r2, r3, #1
 800196e:	683b      	ldr	r3, [r7, #0]
 8001970:	609a      	str	r2, [r3, #8]
        goto fail;
 8001972:	e0ae      	b.n	8001ad2 <parse_object+0x202>
    }

    /* step back to character in front of the first element */
    input_buffer->offset--;
 8001974:	683b      	ldr	r3, [r7, #0]
 8001976:	689b      	ldr	r3, [r3, #8]
 8001978:	1e5a      	subs	r2, r3, #1
 800197a:	683b      	ldr	r3, [r7, #0]
 800197c:	609a      	str	r2, [r3, #8]
    /* loop through the comma separated array elements */
    do
    {
        /* allocate next item */
        cJSON *new_item = cJSON_New_Item(&(input_buffer->hooks));
 800197e:	683b      	ldr	r3, [r7, #0]
 8001980:	3310      	adds	r3, #16
 8001982:	4618      	mov	r0, r3
 8001984:	f7ff f8ec 	bl	8000b60 <cJSON_New_Item>
 8001988:	60f8      	str	r0, [r7, #12]
        if (new_item == NULL)
 800198a:	68fb      	ldr	r3, [r7, #12]
 800198c:	2b00      	cmp	r3, #0
 800198e:	f000 8095 	beq.w	8001abc <parse_object+0x1ec>
        {
            goto fail; /* allocation failure */
        }

        /* attach next item to list */
        if (head == NULL)
 8001992:	697b      	ldr	r3, [r7, #20]
 8001994:	2b00      	cmp	r3, #0
 8001996:	d104      	bne.n	80019a2 <parse_object+0xd2>
        {
            /* start the linked list */
            current_item = head = new_item;
 8001998:	68fb      	ldr	r3, [r7, #12]
 800199a:	617b      	str	r3, [r7, #20]
 800199c:	697b      	ldr	r3, [r7, #20]
 800199e:	613b      	str	r3, [r7, #16]
 80019a0:	e007      	b.n	80019b2 <parse_object+0xe2>
        }
        else
        {
            /* add to the end and advance */
            current_item->next = new_item;
 80019a2:	693b      	ldr	r3, [r7, #16]
 80019a4:	68fa      	ldr	r2, [r7, #12]
 80019a6:	601a      	str	r2, [r3, #0]
            new_item->prev = current_item;
 80019a8:	68fb      	ldr	r3, [r7, #12]
 80019aa:	693a      	ldr	r2, [r7, #16]
 80019ac:	605a      	str	r2, [r3, #4]
            current_item = new_item;
 80019ae:	68fb      	ldr	r3, [r7, #12]
 80019b0:	613b      	str	r3, [r7, #16]
        }

        if (cannot_access_at_index(input_buffer, 1))
 80019b2:	683b      	ldr	r3, [r7, #0]
 80019b4:	2b00      	cmp	r3, #0
 80019b6:	f000 8083 	beq.w	8001ac0 <parse_object+0x1f0>
 80019ba:	683b      	ldr	r3, [r7, #0]
 80019bc:	689b      	ldr	r3, [r3, #8]
 80019be:	1c5a      	adds	r2, r3, #1
 80019c0:	683b      	ldr	r3, [r7, #0]
 80019c2:	685b      	ldr	r3, [r3, #4]
 80019c4:	429a      	cmp	r2, r3
 80019c6:	d27b      	bcs.n	8001ac0 <parse_object+0x1f0>
        {
            goto fail; /* nothing comes after the comma */
        }

        /* parse the name of the child */
        input_buffer->offset++;
 80019c8:	683b      	ldr	r3, [r7, #0]
 80019ca:	689b      	ldr	r3, [r3, #8]
 80019cc:	1c5a      	adds	r2, r3, #1
 80019ce:	683b      	ldr	r3, [r7, #0]
 80019d0:	609a      	str	r2, [r3, #8]
        buffer_skip_whitespace(input_buffer);
 80019d2:	6838      	ldr	r0, [r7, #0]
 80019d4:	f7ff fc94 	bl	8001300 <buffer_skip_whitespace>
        if (!parse_string(current_item, input_buffer))
 80019d8:	6839      	ldr	r1, [r7, #0]
 80019da:	6938      	ldr	r0, [r7, #16]
 80019dc:	f7ff fb48 	bl	8001070 <parse_string>
 80019e0:	4603      	mov	r3, r0
 80019e2:	2b00      	cmp	r3, #0
 80019e4:	d06e      	beq.n	8001ac4 <parse_object+0x1f4>
        {
            goto fail; /* failed to parse name */
        }
        buffer_skip_whitespace(input_buffer);
 80019e6:	6838      	ldr	r0, [r7, #0]
 80019e8:	f7ff fc8a 	bl	8001300 <buffer_skip_whitespace>

        /* swap valuestring and string, because we parsed the name */
        current_item->string = current_item->valuestring;
 80019ec:	693b      	ldr	r3, [r7, #16]
 80019ee:	691a      	ldr	r2, [r3, #16]
 80019f0:	693b      	ldr	r3, [r7, #16]
 80019f2:	621a      	str	r2, [r3, #32]
        current_item->valuestring = NULL;
 80019f4:	693b      	ldr	r3, [r7, #16]
 80019f6:	2200      	movs	r2, #0
 80019f8:	611a      	str	r2, [r3, #16]

        if (cannot_access_at_index(input_buffer, 0) || (buffer_at_offset(input_buffer)[0] != ':'))
 80019fa:	683b      	ldr	r3, [r7, #0]
 80019fc:	2b00      	cmp	r3, #0
 80019fe:	d063      	beq.n	8001ac8 <parse_object+0x1f8>
 8001a00:	683b      	ldr	r3, [r7, #0]
 8001a02:	689a      	ldr	r2, [r3, #8]
 8001a04:	683b      	ldr	r3, [r7, #0]
 8001a06:	685b      	ldr	r3, [r3, #4]
 8001a08:	429a      	cmp	r2, r3
 8001a0a:	d25d      	bcs.n	8001ac8 <parse_object+0x1f8>
 8001a0c:	683b      	ldr	r3, [r7, #0]
 8001a0e:	681a      	ldr	r2, [r3, #0]
 8001a10:	683b      	ldr	r3, [r7, #0]
 8001a12:	689b      	ldr	r3, [r3, #8]
 8001a14:	4413      	add	r3, r2
 8001a16:	781b      	ldrb	r3, [r3, #0]
 8001a18:	2b3a      	cmp	r3, #58	@ 0x3a
 8001a1a:	d155      	bne.n	8001ac8 <parse_object+0x1f8>
        {
            goto fail; /* invalid object */
        }

        /* parse the value */
        input_buffer->offset++;
 8001a1c:	683b      	ldr	r3, [r7, #0]
 8001a1e:	689b      	ldr	r3, [r3, #8]
 8001a20:	1c5a      	adds	r2, r3, #1
 8001a22:	683b      	ldr	r3, [r7, #0]
 8001a24:	609a      	str	r2, [r3, #8]
        buffer_skip_whitespace(input_buffer);
 8001a26:	6838      	ldr	r0, [r7, #0]
 8001a28:	f7ff fc6a 	bl	8001300 <buffer_skip_whitespace>
        if (!parse_value(current_item, input_buffer))
 8001a2c:	6839      	ldr	r1, [r7, #0]
 8001a2e:	6938      	ldr	r0, [r7, #16]
 8001a30:	f7ff fd9e 	bl	8001570 <parse_value>
 8001a34:	4603      	mov	r3, r0
 8001a36:	2b00      	cmp	r3, #0
 8001a38:	d048      	beq.n	8001acc <parse_object+0x1fc>
        {
            goto fail; /* failed to parse value */
        }
        buffer_skip_whitespace(input_buffer);
 8001a3a:	6838      	ldr	r0, [r7, #0]
 8001a3c:	f7ff fc60 	bl	8001300 <buffer_skip_whitespace>
    }
    while (can_access_at_index(input_buffer, 0) && (buffer_at_offset(input_buffer)[0] == ','));
 8001a40:	683b      	ldr	r3, [r7, #0]
 8001a42:	2b00      	cmp	r3, #0
 8001a44:	d00d      	beq.n	8001a62 <parse_object+0x192>
 8001a46:	683b      	ldr	r3, [r7, #0]
 8001a48:	689a      	ldr	r2, [r3, #8]
 8001a4a:	683b      	ldr	r3, [r7, #0]
 8001a4c:	685b      	ldr	r3, [r3, #4]
 8001a4e:	429a      	cmp	r2, r3
 8001a50:	d207      	bcs.n	8001a62 <parse_object+0x192>
 8001a52:	683b      	ldr	r3, [r7, #0]
 8001a54:	681a      	ldr	r2, [r3, #0]
 8001a56:	683b      	ldr	r3, [r7, #0]
 8001a58:	689b      	ldr	r3, [r3, #8]
 8001a5a:	4413      	add	r3, r2
 8001a5c:	781b      	ldrb	r3, [r3, #0]
 8001a5e:	2b2c      	cmp	r3, #44	@ 0x2c
 8001a60:	d08d      	beq.n	800197e <parse_object+0xae>

    if (cannot_access_at_index(input_buffer, 0) || (buffer_at_offset(input_buffer)[0] != '}'))
 8001a62:	683b      	ldr	r3, [r7, #0]
 8001a64:	2b00      	cmp	r3, #0
 8001a66:	d033      	beq.n	8001ad0 <parse_object+0x200>
 8001a68:	683b      	ldr	r3, [r7, #0]
 8001a6a:	689a      	ldr	r2, [r3, #8]
 8001a6c:	683b      	ldr	r3, [r7, #0]
 8001a6e:	685b      	ldr	r3, [r3, #4]
 8001a70:	429a      	cmp	r2, r3
 8001a72:	d22d      	bcs.n	8001ad0 <parse_object+0x200>
 8001a74:	683b      	ldr	r3, [r7, #0]
 8001a76:	681a      	ldr	r2, [r3, #0]
 8001a78:	683b      	ldr	r3, [r7, #0]
 8001a7a:	689b      	ldr	r3, [r3, #8]
 8001a7c:	4413      	add	r3, r2
 8001a7e:	781b      	ldrb	r3, [r3, #0]
 8001a80:	2b7d      	cmp	r3, #125	@ 0x7d
 8001a82:	d125      	bne.n	8001ad0 <parse_object+0x200>
    {
        goto fail; /* expected end of object */
    }

success:
 8001a84:	e000      	b.n	8001a88 <parse_object+0x1b8>
        goto success; /* empty object */
 8001a86:	bf00      	nop
    input_buffer->depth--;
 8001a88:	683b      	ldr	r3, [r7, #0]
 8001a8a:	68db      	ldr	r3, [r3, #12]
 8001a8c:	1e5a      	subs	r2, r3, #1
 8001a8e:	683b      	ldr	r3, [r7, #0]
 8001a90:	60da      	str	r2, [r3, #12]

    if (head != NULL) {
 8001a92:	697b      	ldr	r3, [r7, #20]
 8001a94:	2b00      	cmp	r3, #0
 8001a96:	d002      	beq.n	8001a9e <parse_object+0x1ce>
        head->prev = current_item;
 8001a98:	697b      	ldr	r3, [r7, #20]
 8001a9a:	693a      	ldr	r2, [r7, #16]
 8001a9c:	605a      	str	r2, [r3, #4]
    }

    item->type = cJSON_Object;
 8001a9e:	687b      	ldr	r3, [r7, #4]
 8001aa0:	2240      	movs	r2, #64	@ 0x40
 8001aa2:	60da      	str	r2, [r3, #12]
    item->child = head;
 8001aa4:	687b      	ldr	r3, [r7, #4]
 8001aa6:	697a      	ldr	r2, [r7, #20]
 8001aa8:	609a      	str	r2, [r3, #8]

    input_buffer->offset++;
 8001aaa:	683b      	ldr	r3, [r7, #0]
 8001aac:	689b      	ldr	r3, [r3, #8]
 8001aae:	1c5a      	adds	r2, r3, #1
 8001ab0:	683b      	ldr	r3, [r7, #0]
 8001ab2:	609a      	str	r2, [r3, #8]
    return true;
 8001ab4:	2301      	movs	r3, #1
 8001ab6:	e013      	b.n	8001ae0 <parse_object+0x210>
        goto fail; /* not an object */
 8001ab8:	bf00      	nop
 8001aba:	e00a      	b.n	8001ad2 <parse_object+0x202>
            goto fail; /* allocation failure */
 8001abc:	bf00      	nop
 8001abe:	e008      	b.n	8001ad2 <parse_object+0x202>
            goto fail; /* nothing comes after the comma */
 8001ac0:	bf00      	nop
 8001ac2:	e006      	b.n	8001ad2 <parse_object+0x202>
            goto fail; /* failed to parse name */
 8001ac4:	bf00      	nop
 8001ac6:	e004      	b.n	8001ad2 <parse_object+0x202>
            goto fail; /* invalid object */
 8001ac8:	bf00      	nop
 8001aca:	e002      	b.n	8001ad2 <parse_object+0x202>
            goto fail; /* failed to parse value */
 8001acc:	bf00      	nop
 8001ace:	e000      	b.n	8001ad2 <parse_object+0x202>
        goto fail; /* expected end of object */
 8001ad0:	bf00      	nop

fail:
    if (head != NULL)
 8001ad2:	697b      	ldr	r3, [r7, #20]
 8001ad4:	2b00      	cmp	r3, #0
 8001ad6:	d002      	beq.n	8001ade <parse_object+0x20e>
    {
        cJSON_Delete(head);
 8001ad8:	6978      	ldr	r0, [r7, #20]
 8001ada:	f7ff f857 	bl	8000b8c <cJSON_Delete>
    }

    return false;
 8001ade:	2300      	movs	r3, #0
}
 8001ae0:	4618      	mov	r0, r3
 8001ae2:	3718      	adds	r7, #24
 8001ae4:	46bd      	mov	sp, r7
 8001ae6:	bd80      	pop	{r7, pc}

08001ae8 <cJSON_GetArraySize>:
    return true;
}

/* Get Array size/item / object item. */
CJSON_PUBLIC(int) cJSON_GetArraySize(const cJSON *array)
{
 8001ae8:	b480      	push	{r7}
 8001aea:	b085      	sub	sp, #20
 8001aec:	af00      	add	r7, sp, #0
 8001aee:	6078      	str	r0, [r7, #4]
    cJSON *child = NULL;
 8001af0:	2300      	movs	r3, #0
 8001af2:	60fb      	str	r3, [r7, #12]
    size_t size = 0;
 8001af4:	2300      	movs	r3, #0
 8001af6:	60bb      	str	r3, [r7, #8]

    if (array == NULL)
 8001af8:	687b      	ldr	r3, [r7, #4]
 8001afa:	2b00      	cmp	r3, #0
 8001afc:	d101      	bne.n	8001b02 <cJSON_GetArraySize+0x1a>
    {
        return 0;
 8001afe:	2300      	movs	r3, #0
 8001b00:	e00d      	b.n	8001b1e <cJSON_GetArraySize+0x36>
    }

    child = array->child;
 8001b02:	687b      	ldr	r3, [r7, #4]
 8001b04:	689b      	ldr	r3, [r3, #8]
 8001b06:	60fb      	str	r3, [r7, #12]

    while(child != NULL)
 8001b08:	e005      	b.n	8001b16 <cJSON_GetArraySize+0x2e>
    {
        size++;
 8001b0a:	68bb      	ldr	r3, [r7, #8]
 8001b0c:	3301      	adds	r3, #1
 8001b0e:	60bb      	str	r3, [r7, #8]
        child = child->next;
 8001b10:	68fb      	ldr	r3, [r7, #12]
 8001b12:	681b      	ldr	r3, [r3, #0]
 8001b14:	60fb      	str	r3, [r7, #12]
    while(child != NULL)
 8001b16:	68fb      	ldr	r3, [r7, #12]
 8001b18:	2b00      	cmp	r3, #0
 8001b1a:	d1f6      	bne.n	8001b0a <cJSON_GetArraySize+0x22>
    }

    /* FIXME: Can overflow here. Cannot be fixed without breaking the API */

    return (int)size;
 8001b1c:	68bb      	ldr	r3, [r7, #8]
}
 8001b1e:	4618      	mov	r0, r3
 8001b20:	3714      	adds	r7, #20
 8001b22:	46bd      	mov	sp, r7
 8001b24:	f85d 7b04 	ldr.w	r7, [sp], #4
 8001b28:	4770      	bx	lr

08001b2a <get_array_item>:

static cJSON* get_array_item(const cJSON *array, size_t index)
{
 8001b2a:	b480      	push	{r7}
 8001b2c:	b085      	sub	sp, #20
 8001b2e:	af00      	add	r7, sp, #0
 8001b30:	6078      	str	r0, [r7, #4]
 8001b32:	6039      	str	r1, [r7, #0]
    cJSON *current_child = NULL;
 8001b34:	2300      	movs	r3, #0
 8001b36:	60fb      	str	r3, [r7, #12]

    if (array == NULL)
 8001b38:	687b      	ldr	r3, [r7, #4]
 8001b3a:	2b00      	cmp	r3, #0
 8001b3c:	d101      	bne.n	8001b42 <get_array_item+0x18>
    {
        return NULL;
 8001b3e:	2300      	movs	r3, #0
 8001b40:	e010      	b.n	8001b64 <get_array_item+0x3a>
    }

    current_child = array->child;
 8001b42:	687b      	ldr	r3, [r7, #4]
 8001b44:	689b      	ldr	r3, [r3, #8]
 8001b46:	60fb      	str	r3, [r7, #12]
    while ((current_child != NULL) && (index > 0))
 8001b48:	e005      	b.n	8001b56 <get_array_item+0x2c>
    {
        index--;
 8001b4a:	683b      	ldr	r3, [r7, #0]
 8001b4c:	3b01      	subs	r3, #1
 8001b4e:	603b      	str	r3, [r7, #0]
        current_child = current_child->next;
 8001b50:	68fb      	ldr	r3, [r7, #12]
 8001b52:	681b      	ldr	r3, [r3, #0]
 8001b54:	60fb      	str	r3, [r7, #12]
    while ((current_child != NULL) && (index > 0))
 8001b56:	68fb      	ldr	r3, [r7, #12]
 8001b58:	2b00      	cmp	r3, #0
 8001b5a:	d002      	beq.n	8001b62 <get_array_item+0x38>
 8001b5c:	683b      	ldr	r3, [r7, #0]
 8001b5e:	2b00      	cmp	r3, #0
 8001b60:	d1f3      	bne.n	8001b4a <get_array_item+0x20>
    }

    return current_child;
 8001b62:	68fb      	ldr	r3, [r7, #12]
}
 8001b64:	4618      	mov	r0, r3
 8001b66:	3714      	adds	r7, #20
 8001b68:	46bd      	mov	sp, r7
 8001b6a:	f85d 7b04 	ldr.w	r7, [sp], #4
 8001b6e:	4770      	bx	lr

08001b70 <cJSON_GetArrayItem>:

CJSON_PUBLIC(cJSON *) cJSON_GetArrayItem(const cJSON *array, int index)
{
 8001b70:	b580      	push	{r7, lr}
 8001b72:	b082      	sub	sp, #8
 8001b74:	af00      	add	r7, sp, #0
 8001b76:	6078      	str	r0, [r7, #4]
 8001b78:	6039      	str	r1, [r7, #0]
    if (index < 0)
 8001b7a:	683b      	ldr	r3, [r7, #0]
 8001b7c:	2b00      	cmp	r3, #0
 8001b7e:	da01      	bge.n	8001b84 <cJSON_GetArrayItem+0x14>
    {
        return NULL;
 8001b80:	2300      	movs	r3, #0
 8001b82:	e005      	b.n	8001b90 <cJSON_GetArrayItem+0x20>
    }

    return get_array_item(array, (size_t)index);
 8001b84:	683b      	ldr	r3, [r7, #0]
 8001b86:	4619      	mov	r1, r3
 8001b88:	6878      	ldr	r0, [r7, #4]
 8001b8a:	f7ff ffce 	bl	8001b2a <get_array_item>
 8001b8e:	4603      	mov	r3, r0
}
 8001b90:	4618      	mov	r0, r3
 8001b92:	3708      	adds	r7, #8
 8001b94:	46bd      	mov	sp, r7
 8001b96:	bd80      	pop	{r7, pc}

08001b98 <get_object_item>:

static cJSON *get_object_item(const cJSON * const object, const char * const name, const cJSON_bool case_sensitive)
{
 8001b98:	b580      	push	{r7, lr}
 8001b9a:	b086      	sub	sp, #24
 8001b9c:	af00      	add	r7, sp, #0
 8001b9e:	60f8      	str	r0, [r7, #12]
 8001ba0:	60b9      	str	r1, [r7, #8]
 8001ba2:	607a      	str	r2, [r7, #4]
    cJSON *current_element = NULL;
 8001ba4:	2300      	movs	r3, #0
 8001ba6:	617b      	str	r3, [r7, #20]

    if ((object == NULL) || (name == NULL))
 8001ba8:	68fb      	ldr	r3, [r7, #12]
 8001baa:	2b00      	cmp	r3, #0
 8001bac:	d002      	beq.n	8001bb4 <get_object_item+0x1c>
 8001bae:	68bb      	ldr	r3, [r7, #8]
 8001bb0:	2b00      	cmp	r3, #0
 8001bb2:	d101      	bne.n	8001bb8 <get_object_item+0x20>
    {
        return NULL;
 8001bb4:	2300      	movs	r3, #0
 8001bb6:	e033      	b.n	8001c20 <get_object_item+0x88>
    }

    current_element = object->child;
 8001bb8:	68fb      	ldr	r3, [r7, #12]
 8001bba:	689b      	ldr	r3, [r3, #8]
 8001bbc:	617b      	str	r3, [r7, #20]
    if (case_sensitive)
 8001bbe:	687b      	ldr	r3, [r7, #4]
 8001bc0:	2b00      	cmp	r3, #0
 8001bc2:	d017      	beq.n	8001bf4 <get_object_item+0x5c>
    {
        while ((current_element != NULL) && (current_element->string != NULL) && (strcmp(name, current_element->string) != 0))
 8001bc4:	e002      	b.n	8001bcc <get_object_item+0x34>
        {
            current_element = current_element->next;
 8001bc6:	697b      	ldr	r3, [r7, #20]
 8001bc8:	681b      	ldr	r3, [r3, #0]
 8001bca:	617b      	str	r3, [r7, #20]
        while ((current_element != NULL) && (current_element->string != NULL) && (strcmp(name, current_element->string) != 0))
 8001bcc:	697b      	ldr	r3, [r7, #20]
 8001bce:	2b00      	cmp	r3, #0
 8001bd0:	d01c      	beq.n	8001c0c <get_object_item+0x74>
 8001bd2:	697b      	ldr	r3, [r7, #20]
 8001bd4:	6a1b      	ldr	r3, [r3, #32]
 8001bd6:	2b00      	cmp	r3, #0
 8001bd8:	d018      	beq.n	8001c0c <get_object_item+0x74>
 8001bda:	697b      	ldr	r3, [r7, #20]
 8001bdc:	6a1b      	ldr	r3, [r3, #32]
 8001bde:	4619      	mov	r1, r3
 8001be0:	68b8      	ldr	r0, [r7, #8]
 8001be2:	f7fe fb7d 	bl	80002e0 <strcmp>
 8001be6:	4603      	mov	r3, r0
 8001be8:	2b00      	cmp	r3, #0
 8001bea:	d1ec      	bne.n	8001bc6 <get_object_item+0x2e>
 8001bec:	e00e      	b.n	8001c0c <get_object_item+0x74>
    }
    else
    {
        while ((current_element != NULL) && (case_insensitive_strcmp((const unsigned char*)name, (const unsigned char*)(current_element->string)) != 0))
        {
            current_element = current_element->next;
 8001bee:	697b      	ldr	r3, [r7, #20]
 8001bf0:	681b      	ldr	r3, [r3, #0]
 8001bf2:	617b      	str	r3, [r7, #20]
        while ((current_element != NULL) && (case_insensitive_strcmp((const unsigned char*)name, (const unsigned char*)(current_element->string)) != 0))
 8001bf4:	697b      	ldr	r3, [r7, #20]
 8001bf6:	2b00      	cmp	r3, #0
 8001bf8:	d008      	beq.n	8001c0c <get_object_item+0x74>
 8001bfa:	697b      	ldr	r3, [r7, #20]
 8001bfc:	6a1b      	ldr	r3, [r3, #32]
 8001bfe:	4619      	mov	r1, r3
 8001c00:	68b8      	ldr	r0, [r7, #8]
 8001c02:	f7fe ff41 	bl	8000a88 <case_insensitive_strcmp>
 8001c06:	4603      	mov	r3, r0
 8001c08:	2b00      	cmp	r3, #0
 8001c0a:	d1f0      	bne.n	8001bee <get_object_item+0x56>
        }
    }

    if ((current_element == NULL) || (current_element->string == NULL)) {
 8001c0c:	697b      	ldr	r3, [r7, #20]
 8001c0e:	2b00      	cmp	r3, #0
 8001c10:	d003      	beq.n	8001c1a <get_object_item+0x82>
 8001c12:	697b      	ldr	r3, [r7, #20]
 8001c14:	6a1b      	ldr	r3, [r3, #32]
 8001c16:	2b00      	cmp	r3, #0
 8001c18:	d101      	bne.n	8001c1e <get_object_item+0x86>
        return NULL;
 8001c1a:	2300      	movs	r3, #0
 8001c1c:	e000      	b.n	8001c20 <get_object_item+0x88>
    }

    return current_element;
 8001c1e:	697b      	ldr	r3, [r7, #20]
}
 8001c20:	4618      	mov	r0, r3
 8001c22:	3718      	adds	r7, #24
 8001c24:	46bd      	mov	sp, r7
 8001c26:	bd80      	pop	{r7, pc}

08001c28 <cJSON_GetObjectItemCaseSensitive>:
{
    return get_object_item(object, string, false);
}

CJSON_PUBLIC(cJSON *) cJSON_GetObjectItemCaseSensitive(const cJSON * const object, const char * const string)
{
 8001c28:	b580      	push	{r7, lr}
 8001c2a:	b082      	sub	sp, #8
 8001c2c:	af00      	add	r7, sp, #0
 8001c2e:	6078      	str	r0, [r7, #4]
 8001c30:	6039      	str	r1, [r7, #0]
    return get_object_item(object, string, true);
 8001c32:	2201      	movs	r2, #1
 8001c34:	6839      	ldr	r1, [r7, #0]
 8001c36:	6878      	ldr	r0, [r7, #4]
 8001c38:	f7ff ffae 	bl	8001b98 <get_object_item>
 8001c3c:	4603      	mov	r3, r0
}
 8001c3e:	4618      	mov	r0, r3
 8001c40:	3708      	adds	r7, #8
 8001c42:	46bd      	mov	sp, r7
 8001c44:	bd80      	pop	{r7, pc}

08001c46 <cJSON_IsNumber>:

    return (item->type & 0xFF) == cJSON_NULL;
}

CJSON_PUBLIC(cJSON_bool) cJSON_IsNumber(const cJSON * const item)
{
 8001c46:	b480      	push	{r7}
 8001c48:	b083      	sub	sp, #12
 8001c4a:	af00      	add	r7, sp, #0
 8001c4c:	6078      	str	r0, [r7, #4]
    if (item == NULL)
 8001c4e:	687b      	ldr	r3, [r7, #4]
 8001c50:	2b00      	cmp	r3, #0
 8001c52:	d101      	bne.n	8001c58 <cJSON_IsNumber+0x12>
    {
        return false;
 8001c54:	2300      	movs	r3, #0
 8001c56:	e007      	b.n	8001c68 <cJSON_IsNumber+0x22>
    }

    return (item->type & 0xFF) == cJSON_Number;
 8001c58:	687b      	ldr	r3, [r7, #4]
 8001c5a:	68db      	ldr	r3, [r3, #12]
 8001c5c:	b2db      	uxtb	r3, r3
 8001c5e:	2b08      	cmp	r3, #8
 8001c60:	bf0c      	ite	eq
 8001c62:	2301      	moveq	r3, #1
 8001c64:	2300      	movne	r3, #0
 8001c66:	b2db      	uxtb	r3, r3
}
 8001c68:	4618      	mov	r0, r3
 8001c6a:	370c      	adds	r7, #12
 8001c6c:	46bd      	mov	sp, r7
 8001c6e:	f85d 7b04 	ldr.w	r7, [sp], #4
 8001c72:	4770      	bx	lr

08001c74 <cJSON_IsArray>:

    return (item->type & 0xFF) == cJSON_String;
}

CJSON_PUBLIC(cJSON_bool) cJSON_IsArray(const cJSON * const item)
{
 8001c74:	b480      	push	{r7}
 8001c76:	b083      	sub	sp, #12
 8001c78:	af00      	add	r7, sp, #0
 8001c7a:	6078      	str	r0, [r7, #4]
    if (item == NULL)
 8001c7c:	687b      	ldr	r3, [r7, #4]
 8001c7e:	2b00      	cmp	r3, #0
 8001c80:	d101      	bne.n	8001c86 <cJSON_IsArray+0x12>
    {
        return false;
 8001c82:	2300      	movs	r3, #0
 8001c84:	e007      	b.n	8001c96 <cJSON_IsArray+0x22>
    }

    return (item->type & 0xFF) == cJSON_Array;
 8001c86:	687b      	ldr	r3, [r7, #4]
 8001c88:	68db      	ldr	r3, [r3, #12]
 8001c8a:	b2db      	uxtb	r3, r3
 8001c8c:	2b20      	cmp	r3, #32
 8001c8e:	bf0c      	ite	eq
 8001c90:	2301      	moveq	r3, #1
 8001c92:	2300      	movne	r3, #0
 8001c94:	b2db      	uxtb	r3, r3
}
 8001c96:	4618      	mov	r0, r3
 8001c98:	370c      	adds	r7, #12
 8001c9a:	46bd      	mov	sp, r7
 8001c9c:	f85d 7b04 	ldr.w	r7, [sp], #4
 8001ca0:	4770      	bx	lr

08001ca2 <vApplicationStackOverflowHook>:
/* Hook prototypes */
void vApplicationStackOverflowHook(xTaskHandle xTask, signed char *pcTaskName);

/* USER CODE BEGIN 4 */
void vApplicationStackOverflowHook(xTaskHandle xTask, signed char *pcTaskName)
{
 8001ca2:	b480      	push	{r7}
 8001ca4:	b083      	sub	sp, #12
 8001ca6:	af00      	add	r7, sp, #0
 8001ca8:	6078      	str	r0, [r7, #4]
 8001caa:	6039      	str	r1, [r7, #0]
   /* Run time stack overflow checking is performed if
   configCHECK_FOR_STACK_OVERFLOW is defined to 1 or 2. This hook function is
   called if a stack overflow is detected. */
}
 8001cac:	bf00      	nop
 8001cae:	370c      	adds	r7, #12
 8001cb0:	46bd      	mov	sp, r7
 8001cb2:	f85d 7b04 	ldr.w	r7, [sp], #4
 8001cb6:	4770      	bx	lr

08001cb8 <main>:
/**
  * @brief  The application entry point.
  * @retval int
  */
int main(void)
{
 8001cb8:	b580      	push	{r7, lr}
 8001cba:	b084      	sub	sp, #16
 8001cbc:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN 1 */

  /* USER CODE END 1 */

  /* MPU Configuration--------------------------------------------------------*/
  MPU_Config();
 8001cbe:	f000 fa5b 	bl	8002178 <MPU_Config>
  \details Turns on I-Cache
  */
__STATIC_FORCEINLINE void SCB_EnableICache (void)
{
  #if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)
    if (SCB->CCR & SCB_CCR_IC_Msk) return;  /* return if ICache is already enabled */
 8001cc2:	4b42      	ldr	r3, [pc, #264]	@ (8001dcc <main+0x114>)
 8001cc4:	695b      	ldr	r3, [r3, #20]
 8001cc6:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
 8001cca:	2b00      	cmp	r3, #0
 8001ccc:	d11b      	bne.n	8001d06 <main+0x4e>
  \details Acts as a special kind of Data Memory Barrier.
           It completes when all explicit memory accesses before this instruction complete.
 */
__STATIC_FORCEINLINE void __DSB(void)
{
  __ASM volatile ("dsb 0xF":::"memory");
 8001cce:	f3bf 8f4f 	dsb	sy
}
 8001cd2:	bf00      	nop
  __ASM volatile ("isb 0xF":::"memory");
 8001cd4:	f3bf 8f6f 	isb	sy
}
 8001cd8:	bf00      	nop

    __DSB();
    __ISB();
    SCB->ICIALLU = 0UL;                     /* invalidate I-Cache */
 8001cda:	4b3c      	ldr	r3, [pc, #240]	@ (8001dcc <main+0x114>)
 8001cdc:	2200      	movs	r2, #0
 8001cde:	f8c3 2250 	str.w	r2, [r3, #592]	@ 0x250
  __ASM volatile ("dsb 0xF":::"memory");
 8001ce2:	f3bf 8f4f 	dsb	sy
}
 8001ce6:	bf00      	nop
  __ASM volatile ("isb 0xF":::"memory");
 8001ce8:	f3bf 8f6f 	isb	sy
}
 8001cec:	bf00      	nop
    __DSB();
    __ISB();
    SCB->CCR |=  (uint32_t)SCB_CCR_IC_Msk;  /* enable I-Cache */
 8001cee:	4b37      	ldr	r3, [pc, #220]	@ (8001dcc <main+0x114>)
 8001cf0:	695b      	ldr	r3, [r3, #20]
 8001cf2:	4a36      	ldr	r2, [pc, #216]	@ (8001dcc <main+0x114>)
 8001cf4:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 8001cf8:	6153      	str	r3, [r2, #20]
  __ASM volatile ("dsb 0xF":::"memory");
 8001cfa:	f3bf 8f4f 	dsb	sy
}
 8001cfe:	bf00      	nop
  __ASM volatile ("isb 0xF":::"memory");
 8001d00:	f3bf 8f6f 	isb	sy
}
 8001d04:	e000      	b.n	8001d08 <main+0x50>
    if (SCB->CCR & SCB_CCR_IC_Msk) return;  /* return if ICache is already enabled */
 8001d06:	bf00      	nop
  #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
    uint32_t ccsidr;
    uint32_t sets;
    uint32_t ways;

    if (SCB->CCR & SCB_CCR_DC_Msk) return;  /* return if DCache is already enabled */
 8001d08:	4b30      	ldr	r3, [pc, #192]	@ (8001dcc <main+0x114>)
 8001d0a:	695b      	ldr	r3, [r3, #20]
 8001d0c:	f403 3380 	and.w	r3, r3, #65536	@ 0x10000
 8001d10:	2b00      	cmp	r3, #0
 8001d12:	d138      	bne.n	8001d86 <main+0xce>

    SCB->CSSELR = 0U;                       /* select Level 1 data cache */
 8001d14:	4b2d      	ldr	r3, [pc, #180]	@ (8001dcc <main+0x114>)
 8001d16:	2200      	movs	r2, #0
 8001d18:	f8c3 2084 	str.w	r2, [r3, #132]	@ 0x84
  __ASM volatile ("dsb 0xF":::"memory");
 8001d1c:	f3bf 8f4f 	dsb	sy
}
 8001d20:	bf00      	nop
    __DSB();

    ccsidr = SCB->CCSIDR;
 8001d22:	4b2a      	ldr	r3, [pc, #168]	@ (8001dcc <main+0x114>)
 8001d24:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 8001d28:	60fb      	str	r3, [r7, #12]

                                            /* invalidate D-Cache */
    sets = (uint32_t)(CCSIDR_SETS(ccsidr));
 8001d2a:	68fb      	ldr	r3, [r7, #12]
 8001d2c:	0b5b      	lsrs	r3, r3, #13
 8001d2e:	f3c3 030e 	ubfx	r3, r3, #0, #15
 8001d32:	60bb      	str	r3, [r7, #8]
    do {
      ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
 8001d34:	68fb      	ldr	r3, [r7, #12]
 8001d36:	08db      	lsrs	r3, r3, #3
 8001d38:	f3c3 0309 	ubfx	r3, r3, #0, #10
 8001d3c:	607b      	str	r3, [r7, #4]
      do {
        SCB->DCISW = (((sets << SCB_DCISW_SET_Pos) & SCB_DCISW_SET_Msk) |
 8001d3e:	68bb      	ldr	r3, [r7, #8]
 8001d40:	015a      	lsls	r2, r3, #5
 8001d42:	f643 73e0 	movw	r3, #16352	@ 0x3fe0
 8001d46:	4013      	ands	r3, r2
                      ((ways << SCB_DCISW_WAY_Pos) & SCB_DCISW_WAY_Msk)  );
 8001d48:	687a      	ldr	r2, [r7, #4]
 8001d4a:	0792      	lsls	r2, r2, #30
        SCB->DCISW = (((sets << SCB_DCISW_SET_Pos) & SCB_DCISW_SET_Msk) |
 8001d4c:	491f      	ldr	r1, [pc, #124]	@ (8001dcc <main+0x114>)
 8001d4e:	4313      	orrs	r3, r2
 8001d50:	f8c1 3260 	str.w	r3, [r1, #608]	@ 0x260
        #if defined ( __CC_ARM )
          __schedule_barrier();
        #endif
      } while (ways-- != 0U);
 8001d54:	687b      	ldr	r3, [r7, #4]
 8001d56:	1e5a      	subs	r2, r3, #1
 8001d58:	607a      	str	r2, [r7, #4]
 8001d5a:	2b00      	cmp	r3, #0
 8001d5c:	d1ef      	bne.n	8001d3e <main+0x86>
    } while(sets-- != 0U);
 8001d5e:	68bb      	ldr	r3, [r7, #8]
 8001d60:	1e5a      	subs	r2, r3, #1
 8001d62:	60ba      	str	r2, [r7, #8]
 8001d64:	2b00      	cmp	r3, #0
 8001d66:	d1e5      	bne.n	8001d34 <main+0x7c>
  __ASM volatile ("dsb 0xF":::"memory");
 8001d68:	f3bf 8f4f 	dsb	sy
}
 8001d6c:	bf00      	nop
    __DSB();

    SCB->CCR |=  (uint32_t)SCB_CCR_DC_Msk;  /* enable D-Cache */
 8001d6e:	4b17      	ldr	r3, [pc, #92]	@ (8001dcc <main+0x114>)
 8001d70:	695b      	ldr	r3, [r3, #20]
 8001d72:	4a16      	ldr	r2, [pc, #88]	@ (8001dcc <main+0x114>)
 8001d74:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
 8001d78:	6153      	str	r3, [r2, #20]
  __ASM volatile ("dsb 0xF":::"memory");
 8001d7a:	f3bf 8f4f 	dsb	sy
}
 8001d7e:	bf00      	nop
  __ASM volatile ("isb 0xF":::"memory");
 8001d80:	f3bf 8f6f 	isb	sy
}
 8001d84:	e000      	b.n	8001d88 <main+0xd0>
    if (SCB->CCR & SCB_CCR_DC_Msk) return;  /* return if DCache is already enabled */
 8001d86:	bf00      	nop
  SCB_EnableDCache();

  /* MCU Configuration--------------------------------------------------------*/

  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
  HAL_Init();
 8001d88:	f002 feb2 	bl	8004af0 <HAL_Init>
  /* USER CODE BEGIN Init */

  /* USER CODE END Init */

  /* Configure the system clock */
  SystemClock_Config();
 8001d8c:	f000 f826 	bl	8001ddc <SystemClock_Config>
  /* USER CODE BEGIN SysInit */

  /* USER CODE END SysInit */

  /* Initialize all configured peripherals */
  MX_GPIO_Init();
 8001d90:	f000 f954 	bl	800203c <MX_GPIO_Init>
  MX_DMA_Init();
 8001d94:	f000 f92a 	bl	8001fec <MX_DMA_Init>
  MX_UART8_Init();
 8001d98:	f000 f8dc 	bl	8001f54 <MX_UART8_Init>
  MX_CRC_Init();
 8001d9c:	f000 f89a 	bl	8001ed4 <MX_CRC_Init>
  MX_RNG_Init();
 8001da0:	f000 f8c2 	bl	8001f28 <MX_RNG_Init>

//  HAL_DMA_RegisterCallback(&hdma_uart8_rx, HAL_DMA_XFER_CPLT_CB_ID, dmaCallback);
  /* USER CODE END 2 */

  /* Init scheduler */
  osKernelInitialize();
 8001da4:	f00e fa90 	bl	80102c8 <osKernelInitialize>
  /* add queues, ... */
  /* USER CODE END RTOS_QUEUES */

  /* Create the thread(s) */
  /* creation of defaultTask */
  defaultTaskHandle = osThreadNew(StartDefaultTask, NULL, &defaultTask_attributes);
 8001da8:	4a09      	ldr	r2, [pc, #36]	@ (8001dd0 <main+0x118>)
 8001daa:	2100      	movs	r1, #0
 8001dac:	4809      	ldr	r0, [pc, #36]	@ (8001dd4 <main+0x11c>)
 8001dae:	f00e faea 	bl	8010386 <osThreadNew>
 8001db2:	4603      	mov	r3, r0
 8001db4:	4a08      	ldr	r2, [pc, #32]	@ (8001dd8 <main+0x120>)
 8001db6:	6013      	str	r3, [r2, #0]

  /* USER CODE BEGIN RTOS_THREADS */
  /* add threads, ... */
  mqtt_cli_init();
 8001db8:	f001 fab0 	bl	800331c <mqtt_cli_init>
  Uart8TasksInit();
 8001dbc:	f001 fff8 	bl	8003db0 <Uart8TasksInit>
#ifdef USER_MOCKS
  MockMeasurmetsTaskInit();
 8001dc0:	f000 fa50 	bl	8002264 <MockMeasurmetsTaskInit>
  /* USER CODE BEGIN RTOS_EVENTS */
  /* add events, ... */
  /* USER CODE END RTOS_EVENTS */

  /* Start scheduler */
  osKernelStart();
 8001dc4:	f00e faa4 	bl	8010310 <osKernelStart>

  /* We should never get here as control is now taken by the scheduler */

  /* Infinite loop */
  /* USER CODE BEGIN WHILE */
  while (1)
 8001dc8:	bf00      	nop
 8001dca:	e7fd      	b.n	8001dc8 <main+0x110>
 8001dcc:	e000ed00 	.word	0xe000ed00
 8001dd0:	08030524 	.word	0x08030524
 8001dd4:	08002161 	.word	0x08002161
 8001dd8:	240003f0 	.word	0x240003f0

08001ddc <SystemClock_Config>:
/**
  * @brief System Clock Configuration
  * @retval None
  */
void SystemClock_Config(void)
{
 8001ddc:	b580      	push	{r7, lr}
 8001dde:	b09c      	sub	sp, #112	@ 0x70
 8001de0:	af00      	add	r7, sp, #0
  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
 8001de2:	f107 0324 	add.w	r3, r7, #36	@ 0x24
 8001de6:	224c      	movs	r2, #76	@ 0x4c
 8001de8:	2100      	movs	r1, #0
 8001dea:	4618      	mov	r0, r3
 8001dec:	f027 fd20 	bl	8029830 <memset>
  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
 8001df0:	1d3b      	adds	r3, r7, #4
 8001df2:	2220      	movs	r2, #32
 8001df4:	2100      	movs	r1, #0
 8001df6:	4618      	mov	r0, r3
 8001df8:	f027 fd1a 	bl	8029830 <memset>

  /** Supply configuration update enable
  */
  HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
 8001dfc:	2002      	movs	r0, #2
 8001dfe:	f007 fbc1 	bl	8009584 <HAL_PWREx_ConfigSupply>

  /** Configure the main internal regulator output voltage
  */
  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
 8001e02:	2300      	movs	r3, #0
 8001e04:	603b      	str	r3, [r7, #0]
 8001e06:	4b31      	ldr	r3, [pc, #196]	@ (8001ecc <SystemClock_Config+0xf0>)
 8001e08:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8001e0a:	4a30      	ldr	r2, [pc, #192]	@ (8001ecc <SystemClock_Config+0xf0>)
 8001e0c:	f023 0301 	bic.w	r3, r3, #1
 8001e10:	62d3      	str	r3, [r2, #44]	@ 0x2c
 8001e12:	4b2e      	ldr	r3, [pc, #184]	@ (8001ecc <SystemClock_Config+0xf0>)
 8001e14:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8001e16:	f003 0301 	and.w	r3, r3, #1
 8001e1a:	603b      	str	r3, [r7, #0]
 8001e1c:	4b2c      	ldr	r3, [pc, #176]	@ (8001ed0 <SystemClock_Config+0xf4>)
 8001e1e:	699b      	ldr	r3, [r3, #24]
 8001e20:	4a2b      	ldr	r2, [pc, #172]	@ (8001ed0 <SystemClock_Config+0xf4>)
 8001e22:	f443 4340 	orr.w	r3, r3, #49152	@ 0xc000
 8001e26:	6193      	str	r3, [r2, #24]
 8001e28:	4b29      	ldr	r3, [pc, #164]	@ (8001ed0 <SystemClock_Config+0xf4>)
 8001e2a:	699b      	ldr	r3, [r3, #24]
 8001e2c:	f403 4340 	and.w	r3, r3, #49152	@ 0xc000
 8001e30:	603b      	str	r3, [r7, #0]
 8001e32:	683b      	ldr	r3, [r7, #0]

  while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
 8001e34:	bf00      	nop
 8001e36:	4b26      	ldr	r3, [pc, #152]	@ (8001ed0 <SystemClock_Config+0xf4>)
 8001e38:	699b      	ldr	r3, [r3, #24]
 8001e3a:	f403 5300 	and.w	r3, r3, #8192	@ 0x2000
 8001e3e:	f5b3 5f00 	cmp.w	r3, #8192	@ 0x2000
 8001e42:	d1f8      	bne.n	8001e36 <SystemClock_Config+0x5a>

  /** Initializes the RCC Oscillators according to the specified parameters
  * in the RCC_OscInitTypeDef structure.
  */
  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48|RCC_OSCILLATORTYPE_HSE;
 8001e44:	2321      	movs	r3, #33	@ 0x21
 8001e46:	627b      	str	r3, [r7, #36]	@ 0x24
  RCC_OscInitStruct.HSEState = RCC_HSE_ON;
 8001e48:	f44f 3380 	mov.w	r3, #65536	@ 0x10000
 8001e4c:	62bb      	str	r3, [r7, #40]	@ 0x28
  RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
 8001e4e:	2301      	movs	r3, #1
 8001e50:	63fb      	str	r3, [r7, #60]	@ 0x3c
  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
 8001e52:	2302      	movs	r3, #2
 8001e54:	64bb      	str	r3, [r7, #72]	@ 0x48
  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
 8001e56:	2302      	movs	r3, #2
 8001e58:	64fb      	str	r3, [r7, #76]	@ 0x4c
  RCC_OscInitStruct.PLL.PLLM = 5;
 8001e5a:	2305      	movs	r3, #5
 8001e5c:	653b      	str	r3, [r7, #80]	@ 0x50
  RCC_OscInitStruct.PLL.PLLN = 160;
 8001e5e:	23a0      	movs	r3, #160	@ 0xa0
 8001e60:	657b      	str	r3, [r7, #84]	@ 0x54
  RCC_OscInitStruct.PLL.PLLP = 2;
 8001e62:	2302      	movs	r3, #2
 8001e64:	65bb      	str	r3, [r7, #88]	@ 0x58
  RCC_OscInitStruct.PLL.PLLQ = 2;
 8001e66:	2302      	movs	r3, #2
 8001e68:	65fb      	str	r3, [r7, #92]	@ 0x5c
  RCC_OscInitStruct.PLL.PLLR = 2;
 8001e6a:	2302      	movs	r3, #2
 8001e6c:	663b      	str	r3, [r7, #96]	@ 0x60
  RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_2;
 8001e6e:	2308      	movs	r3, #8
 8001e70:	667b      	str	r3, [r7, #100]	@ 0x64
  RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE;
 8001e72:	2300      	movs	r3, #0
 8001e74:	66bb      	str	r3, [r7, #104]	@ 0x68
  RCC_OscInitStruct.PLL.PLLFRACN = 0;
 8001e76:	2300      	movs	r3, #0
 8001e78:	66fb      	str	r3, [r7, #108]	@ 0x6c
  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
 8001e7a:	f107 0324 	add.w	r3, r7, #36	@ 0x24
 8001e7e:	4618      	mov	r0, r3
 8001e80:	f007 fbba 	bl	80095f8 <HAL_RCC_OscConfig>
 8001e84:	4603      	mov	r3, r0
 8001e86:	2b00      	cmp	r3, #0
 8001e88:	d001      	beq.n	8001e8e <SystemClock_Config+0xb2>
  {
    Error_Handler();
 8001e8a:	f000 f9e5 	bl	8002258 <Error_Handler>
  }

  /** Initializes the CPU, AHB and APB buses clocks
  */
  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
 8001e8e:	233f      	movs	r3, #63	@ 0x3f
 8001e90:	607b      	str	r3, [r7, #4]
                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2
                              |RCC_CLOCKTYPE_D3PCLK1|RCC_CLOCKTYPE_D1PCLK1;
  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
 8001e92:	2303      	movs	r3, #3
 8001e94:	60bb      	str	r3, [r7, #8]
  RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
 8001e96:	2300      	movs	r3, #0
 8001e98:	60fb      	str	r3, [r7, #12]
  RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2;
 8001e9a:	2308      	movs	r3, #8
 8001e9c:	613b      	str	r3, [r7, #16]
  RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2;
 8001e9e:	2340      	movs	r3, #64	@ 0x40
 8001ea0:	617b      	str	r3, [r7, #20]
  RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2;
 8001ea2:	2340      	movs	r3, #64	@ 0x40
 8001ea4:	61bb      	str	r3, [r7, #24]
  RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2;
 8001ea6:	f44f 6380 	mov.w	r3, #1024	@ 0x400
 8001eaa:	61fb      	str	r3, [r7, #28]
  RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2;
 8001eac:	2340      	movs	r3, #64	@ 0x40
 8001eae:	623b      	str	r3, [r7, #32]

  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
 8001eb0:	1d3b      	adds	r3, r7, #4
 8001eb2:	2102      	movs	r1, #2
 8001eb4:	4618      	mov	r0, r3
 8001eb6:	f007 fff9 	bl	8009eac <HAL_RCC_ClockConfig>
 8001eba:	4603      	mov	r3, r0
 8001ebc:	2b00      	cmp	r3, #0
 8001ebe:	d001      	beq.n	8001ec4 <SystemClock_Config+0xe8>
  {
    Error_Handler();
 8001ec0:	f000 f9ca 	bl	8002258 <Error_Handler>
  }
}
 8001ec4:	bf00      	nop
 8001ec6:	3770      	adds	r7, #112	@ 0x70
 8001ec8:	46bd      	mov	sp, r7
 8001eca:	bd80      	pop	{r7, pc}
 8001ecc:	58000400 	.word	0x58000400
 8001ed0:	58024800 	.word	0x58024800

08001ed4 <MX_CRC_Init>:
  * @brief CRC Initialization Function
  * @param None
  * @retval None
  */
static void MX_CRC_Init(void)
{
 8001ed4:	b580      	push	{r7, lr}
 8001ed6:	af00      	add	r7, sp, #0
  /* USER CODE END CRC_Init 0 */

  /* USER CODE BEGIN CRC_Init 1 */

  /* USER CODE END CRC_Init 1 */
  hcrc.Instance = CRC;
 8001ed8:	4b11      	ldr	r3, [pc, #68]	@ (8001f20 <MX_CRC_Init+0x4c>)
 8001eda:	4a12      	ldr	r2, [pc, #72]	@ (8001f24 <MX_CRC_Init+0x50>)
 8001edc:	601a      	str	r2, [r3, #0]
  hcrc.Init.DefaultPolynomialUse = DEFAULT_POLYNOMIAL_DISABLE;
 8001ede:	4b10      	ldr	r3, [pc, #64]	@ (8001f20 <MX_CRC_Init+0x4c>)
 8001ee0:	2201      	movs	r2, #1
 8001ee2:	711a      	strb	r2, [r3, #4]
  hcrc.Init.DefaultInitValueUse = DEFAULT_INIT_VALUE_ENABLE;
 8001ee4:	4b0e      	ldr	r3, [pc, #56]	@ (8001f20 <MX_CRC_Init+0x4c>)
 8001ee6:	2200      	movs	r2, #0
 8001ee8:	715a      	strb	r2, [r3, #5]
  hcrc.Init.GeneratingPolynomial = 4129;
 8001eea:	4b0d      	ldr	r3, [pc, #52]	@ (8001f20 <MX_CRC_Init+0x4c>)
 8001eec:	f241 0221 	movw	r2, #4129	@ 0x1021
 8001ef0:	609a      	str	r2, [r3, #8]
  hcrc.Init.CRCLength = CRC_POLYLENGTH_16B;
 8001ef2:	4b0b      	ldr	r3, [pc, #44]	@ (8001f20 <MX_CRC_Init+0x4c>)
 8001ef4:	2208      	movs	r2, #8
 8001ef6:	60da      	str	r2, [r3, #12]
  hcrc.Init.InputDataInversionMode = CRC_INPUTDATA_INVERSION_NONE;
 8001ef8:	4b09      	ldr	r3, [pc, #36]	@ (8001f20 <MX_CRC_Init+0x4c>)
 8001efa:	2200      	movs	r2, #0
 8001efc:	615a      	str	r2, [r3, #20]
  hcrc.Init.OutputDataInversionMode = CRC_OUTPUTDATA_INVERSION_DISABLE;
 8001efe:	4b08      	ldr	r3, [pc, #32]	@ (8001f20 <MX_CRC_Init+0x4c>)
 8001f00:	2200      	movs	r2, #0
 8001f02:	619a      	str	r2, [r3, #24]
  hcrc.InputDataFormat = CRC_INPUTDATA_FORMAT_BYTES;
 8001f04:	4b06      	ldr	r3, [pc, #24]	@ (8001f20 <MX_CRC_Init+0x4c>)
 8001f06:	2201      	movs	r2, #1
 8001f08:	621a      	str	r2, [r3, #32]
  if (HAL_CRC_Init(&hcrc) != HAL_OK)
 8001f0a:	4805      	ldr	r0, [pc, #20]	@ (8001f20 <MX_CRC_Init+0x4c>)
 8001f0c:	f002 ffe8 	bl	8004ee0 <HAL_CRC_Init>
 8001f10:	4603      	mov	r3, r0
 8001f12:	2b00      	cmp	r3, #0
 8001f14:	d001      	beq.n	8001f1a <MX_CRC_Init+0x46>
  {
    Error_Handler();
 8001f16:	f000 f99f 	bl	8002258 <Error_Handler>
  }
  /* USER CODE BEGIN CRC_Init 2 */

  /* USER CODE END CRC_Init 2 */

}
 8001f1a:	bf00      	nop
 8001f1c:	bd80      	pop	{r7, pc}
 8001f1e:	bf00      	nop
 8001f20:	24000234 	.word	0x24000234
 8001f24:	58024c00 	.word	0x58024c00

08001f28 <MX_RNG_Init>:
  * @brief RNG Initialization Function
  * @param None
  * @retval None
  */
static void MX_RNG_Init(void)
{
 8001f28:	b580      	push	{r7, lr}
 8001f2a:	af00      	add	r7, sp, #0
  /* USER CODE END RNG_Init 0 */

  /* USER CODE BEGIN RNG_Init 1 */

  /* USER CODE END RNG_Init 1 */
  hrng.Instance = RNG;
 8001f2c:	4b07      	ldr	r3, [pc, #28]	@ (8001f4c <MX_RNG_Init+0x24>)
 8001f2e:	4a08      	ldr	r2, [pc, #32]	@ (8001f50 <MX_RNG_Init+0x28>)
 8001f30:	601a      	str	r2, [r3, #0]
  hrng.Init.ClockErrorDetection = RNG_CED_ENABLE;
 8001f32:	4b06      	ldr	r3, [pc, #24]	@ (8001f4c <MX_RNG_Init+0x24>)
 8001f34:	2200      	movs	r2, #0
 8001f36:	605a      	str	r2, [r3, #4]
  if (HAL_RNG_Init(&hrng) != HAL_OK)
 8001f38:	4804      	ldr	r0, [pc, #16]	@ (8001f4c <MX_RNG_Init+0x24>)
 8001f3a:	f00a f995 	bl	800c268 <HAL_RNG_Init>
 8001f3e:	4603      	mov	r3, r0
 8001f40:	2b00      	cmp	r3, #0
 8001f42:	d001      	beq.n	8001f48 <MX_RNG_Init+0x20>
  {
    Error_Handler();
 8001f44:	f000 f988 	bl	8002258 <Error_Handler>
  }
  /* USER CODE BEGIN RNG_Init 2 */

  /* USER CODE END RNG_Init 2 */

}
 8001f48:	bf00      	nop
 8001f4a:	bd80      	pop	{r7, pc}
 8001f4c:	24000258 	.word	0x24000258
 8001f50:	48021800 	.word	0x48021800

08001f54 <MX_UART8_Init>:
  * @brief UART8 Initialization Function
  * @param None
  * @retval None
  */
static void MX_UART8_Init(void)
{
 8001f54:	b580      	push	{r7, lr}
 8001f56:	af00      	add	r7, sp, #0
  /* USER CODE END UART8_Init 0 */

  /* USER CODE BEGIN UART8_Init 1 */

  /* USER CODE END UART8_Init 1 */
  huart8.Instance = UART8;
 8001f58:	4b22      	ldr	r3, [pc, #136]	@ (8001fe4 <MX_UART8_Init+0x90>)
 8001f5a:	4a23      	ldr	r2, [pc, #140]	@ (8001fe8 <MX_UART8_Init+0x94>)
 8001f5c:	601a      	str	r2, [r3, #0]
  huart8.Init.BaudRate = 115200;
 8001f5e:	4b21      	ldr	r3, [pc, #132]	@ (8001fe4 <MX_UART8_Init+0x90>)
 8001f60:	f44f 32e1 	mov.w	r2, #115200	@ 0x1c200
 8001f64:	605a      	str	r2, [r3, #4]
  huart8.Init.WordLength = UART_WORDLENGTH_8B;
 8001f66:	4b1f      	ldr	r3, [pc, #124]	@ (8001fe4 <MX_UART8_Init+0x90>)
 8001f68:	2200      	movs	r2, #0
 8001f6a:	609a      	str	r2, [r3, #8]
  huart8.Init.StopBits = UART_STOPBITS_1;
 8001f6c:	4b1d      	ldr	r3, [pc, #116]	@ (8001fe4 <MX_UART8_Init+0x90>)
 8001f6e:	2200      	movs	r2, #0
 8001f70:	60da      	str	r2, [r3, #12]
  huart8.Init.Parity = UART_PARITY_NONE;
 8001f72:	4b1c      	ldr	r3, [pc, #112]	@ (8001fe4 <MX_UART8_Init+0x90>)
 8001f74:	2200      	movs	r2, #0
 8001f76:	611a      	str	r2, [r3, #16]
  huart8.Init.Mode = UART_MODE_TX_RX;
 8001f78:	4b1a      	ldr	r3, [pc, #104]	@ (8001fe4 <MX_UART8_Init+0x90>)
 8001f7a:	220c      	movs	r2, #12
 8001f7c:	615a      	str	r2, [r3, #20]
  huart8.Init.HwFlowCtl = UART_HWCONTROL_NONE;
 8001f7e:	4b19      	ldr	r3, [pc, #100]	@ (8001fe4 <MX_UART8_Init+0x90>)
 8001f80:	2200      	movs	r2, #0
 8001f82:	619a      	str	r2, [r3, #24]
  huart8.Init.OverSampling = UART_OVERSAMPLING_16;
 8001f84:	4b17      	ldr	r3, [pc, #92]	@ (8001fe4 <MX_UART8_Init+0x90>)
 8001f86:	2200      	movs	r2, #0
 8001f88:	61da      	str	r2, [r3, #28]
  huart8.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
 8001f8a:	4b16      	ldr	r3, [pc, #88]	@ (8001fe4 <MX_UART8_Init+0x90>)
 8001f8c:	2200      	movs	r2, #0
 8001f8e:	621a      	str	r2, [r3, #32]
  huart8.Init.ClockPrescaler = UART_PRESCALER_DIV1;
 8001f90:	4b14      	ldr	r3, [pc, #80]	@ (8001fe4 <MX_UART8_Init+0x90>)
 8001f92:	2200      	movs	r2, #0
 8001f94:	625a      	str	r2, [r3, #36]	@ 0x24
  huart8.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
 8001f96:	4b13      	ldr	r3, [pc, #76]	@ (8001fe4 <MX_UART8_Init+0x90>)
 8001f98:	2200      	movs	r2, #0
 8001f9a:	629a      	str	r2, [r3, #40]	@ 0x28
  if (HAL_UART_Init(&huart8) != HAL_OK)
 8001f9c:	4811      	ldr	r0, [pc, #68]	@ (8001fe4 <MX_UART8_Init+0x90>)
 8001f9e:	f00a fce9 	bl	800c974 <HAL_UART_Init>
 8001fa2:	4603      	mov	r3, r0
 8001fa4:	2b00      	cmp	r3, #0
 8001fa6:	d001      	beq.n	8001fac <MX_UART8_Init+0x58>
  {
    Error_Handler();
 8001fa8:	f000 f956 	bl	8002258 <Error_Handler>
  }
  if (HAL_UARTEx_SetTxFifoThreshold(&huart8, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
 8001fac:	2100      	movs	r1, #0
 8001fae:	480d      	ldr	r0, [pc, #52]	@ (8001fe4 <MX_UART8_Init+0x90>)
 8001fb0:	f00d f989 	bl	800f2c6 <HAL_UARTEx_SetTxFifoThreshold>
 8001fb4:	4603      	mov	r3, r0
 8001fb6:	2b00      	cmp	r3, #0
 8001fb8:	d001      	beq.n	8001fbe <MX_UART8_Init+0x6a>
  {
    Error_Handler();
 8001fba:	f000 f94d 	bl	8002258 <Error_Handler>
  }
  if (HAL_UARTEx_SetRxFifoThreshold(&huart8, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
 8001fbe:	2100      	movs	r1, #0
 8001fc0:	4808      	ldr	r0, [pc, #32]	@ (8001fe4 <MX_UART8_Init+0x90>)
 8001fc2:	f00d f9be 	bl	800f342 <HAL_UARTEx_SetRxFifoThreshold>
 8001fc6:	4603      	mov	r3, r0
 8001fc8:	2b00      	cmp	r3, #0
 8001fca:	d001      	beq.n	8001fd0 <MX_UART8_Init+0x7c>
  {
    Error_Handler();
 8001fcc:	f000 f944 	bl	8002258 <Error_Handler>
  }
  if (HAL_UARTEx_DisableFifoMode(&huart8) != HAL_OK)
 8001fd0:	4804      	ldr	r0, [pc, #16]	@ (8001fe4 <MX_UART8_Init+0x90>)
 8001fd2:	f00d f93f 	bl	800f254 <HAL_UARTEx_DisableFifoMode>
 8001fd6:	4603      	mov	r3, r0
 8001fd8:	2b00      	cmp	r3, #0
 8001fda:	d001      	beq.n	8001fe0 <MX_UART8_Init+0x8c>
  {
    Error_Handler();
 8001fdc:	f000 f93c 	bl	8002258 <Error_Handler>
  }
  /* USER CODE BEGIN UART8_Init 2 */

  /* USER CODE END UART8_Init 2 */

}
 8001fe0:	bf00      	nop
 8001fe2:	bd80      	pop	{r7, pc}
 8001fe4:	2400026c 	.word	0x2400026c
 8001fe8:	40007c00 	.word	0x40007c00

08001fec <MX_DMA_Init>:

/**
  * Enable DMA controller clock
  */
static void MX_DMA_Init(void)
{
 8001fec:	b580      	push	{r7, lr}
 8001fee:	b082      	sub	sp, #8
 8001ff0:	af00      	add	r7, sp, #0

  /* DMA controller clock enable */
  __HAL_RCC_DMA2_CLK_ENABLE();
 8001ff2:	4b11      	ldr	r3, [pc, #68]	@ (8002038 <MX_DMA_Init+0x4c>)
 8001ff4:	f8d3 30d8 	ldr.w	r3, [r3, #216]	@ 0xd8
 8001ff8:	4a0f      	ldr	r2, [pc, #60]	@ (8002038 <MX_DMA_Init+0x4c>)
 8001ffa:	f043 0302 	orr.w	r3, r3, #2
 8001ffe:	f8c2 30d8 	str.w	r3, [r2, #216]	@ 0xd8
 8002002:	4b0d      	ldr	r3, [pc, #52]	@ (8002038 <MX_DMA_Init+0x4c>)
 8002004:	f8d3 30d8 	ldr.w	r3, [r3, #216]	@ 0xd8
 8002008:	f003 0302 	and.w	r3, r3, #2
 800200c:	607b      	str	r3, [r7, #4]
 800200e:	687b      	ldr	r3, [r7, #4]

  /* DMA interrupt init */
  /* DMA2_Stream6_IRQn interrupt configuration */
  HAL_NVIC_SetPriority(DMA2_Stream6_IRQn, 5, 0);
 8002010:	2200      	movs	r2, #0
 8002012:	2105      	movs	r1, #5
 8002014:	2045      	movs	r0, #69	@ 0x45
 8002016:	f002 fec3 	bl	8004da0 <HAL_NVIC_SetPriority>
  HAL_NVIC_EnableIRQ(DMA2_Stream6_IRQn);
 800201a:	2045      	movs	r0, #69	@ 0x45
 800201c:	f002 feda 	bl	8004dd4 <HAL_NVIC_EnableIRQ>
  /* DMA2_Stream7_IRQn interrupt configuration */
  HAL_NVIC_SetPriority(DMA2_Stream7_IRQn, 5, 0);
 8002020:	2200      	movs	r2, #0
 8002022:	2105      	movs	r1, #5
 8002024:	2046      	movs	r0, #70	@ 0x46
 8002026:	f002 febb 	bl	8004da0 <HAL_NVIC_SetPriority>
  HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn);
 800202a:	2046      	movs	r0, #70	@ 0x46
 800202c:	f002 fed2 	bl	8004dd4 <HAL_NVIC_EnableIRQ>

}
 8002030:	bf00      	nop
 8002032:	3708      	adds	r7, #8
 8002034:	46bd      	mov	sp, r7
 8002036:	bd80      	pop	{r7, pc}
 8002038:	58024400 	.word	0x58024400

0800203c <MX_GPIO_Init>:
  * @brief GPIO Initialization Function
  * @param None
  * @retval None
  */
static void MX_GPIO_Init(void)
{
 800203c:	b580      	push	{r7, lr}
 800203e:	b08c      	sub	sp, #48	@ 0x30
 8002040:	af00      	add	r7, sp, #0
/* USER CODE BEGIN MX_GPIO_Init_1 */
	GPIO_InitTypeDef GPIO_InitStruct = {0};
 8002042:	f107 031c 	add.w	r3, r7, #28
 8002046:	2200      	movs	r2, #0
 8002048:	601a      	str	r2, [r3, #0]
 800204a:	605a      	str	r2, [r3, #4]
 800204c:	609a      	str	r2, [r3, #8]
 800204e:	60da      	str	r2, [r3, #12]
 8002050:	611a      	str	r2, [r3, #16]
/* USER CODE END MX_GPIO_Init_1 */

  /* GPIO Ports Clock Enable */
  __HAL_RCC_GPIOH_CLK_ENABLE();
 8002052:	4b41      	ldr	r3, [pc, #260]	@ (8002158 <MX_GPIO_Init+0x11c>)
 8002054:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8002058:	4a3f      	ldr	r2, [pc, #252]	@ (8002158 <MX_GPIO_Init+0x11c>)
 800205a:	f043 0380 	orr.w	r3, r3, #128	@ 0x80
 800205e:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 8002062:	4b3d      	ldr	r3, [pc, #244]	@ (8002158 <MX_GPIO_Init+0x11c>)
 8002064:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8002068:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 800206c:	61bb      	str	r3, [r7, #24]
 800206e:	69bb      	ldr	r3, [r7, #24]
  __HAL_RCC_GPIOC_CLK_ENABLE();
 8002070:	4b39      	ldr	r3, [pc, #228]	@ (8002158 <MX_GPIO_Init+0x11c>)
 8002072:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8002076:	4a38      	ldr	r2, [pc, #224]	@ (8002158 <MX_GPIO_Init+0x11c>)
 8002078:	f043 0304 	orr.w	r3, r3, #4
 800207c:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 8002080:	4b35      	ldr	r3, [pc, #212]	@ (8002158 <MX_GPIO_Init+0x11c>)
 8002082:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8002086:	f003 0304 	and.w	r3, r3, #4
 800208a:	617b      	str	r3, [r7, #20]
 800208c:	697b      	ldr	r3, [r7, #20]
  __HAL_RCC_GPIOA_CLK_ENABLE();
 800208e:	4b32      	ldr	r3, [pc, #200]	@ (8002158 <MX_GPIO_Init+0x11c>)
 8002090:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8002094:	4a30      	ldr	r2, [pc, #192]	@ (8002158 <MX_GPIO_Init+0x11c>)
 8002096:	f043 0301 	orr.w	r3, r3, #1
 800209a:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 800209e:	4b2e      	ldr	r3, [pc, #184]	@ (8002158 <MX_GPIO_Init+0x11c>)
 80020a0:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 80020a4:	f003 0301 	and.w	r3, r3, #1
 80020a8:	613b      	str	r3, [r7, #16]
 80020aa:	693b      	ldr	r3, [r7, #16]
  __HAL_RCC_GPIOB_CLK_ENABLE();
 80020ac:	4b2a      	ldr	r3, [pc, #168]	@ (8002158 <MX_GPIO_Init+0x11c>)
 80020ae:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 80020b2:	4a29      	ldr	r2, [pc, #164]	@ (8002158 <MX_GPIO_Init+0x11c>)
 80020b4:	f043 0302 	orr.w	r3, r3, #2
 80020b8:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 80020bc:	4b26      	ldr	r3, [pc, #152]	@ (8002158 <MX_GPIO_Init+0x11c>)
 80020be:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 80020c2:	f003 0302 	and.w	r3, r3, #2
 80020c6:	60fb      	str	r3, [r7, #12]
 80020c8:	68fb      	ldr	r3, [r7, #12]
  __HAL_RCC_GPIOE_CLK_ENABLE();
 80020ca:	4b23      	ldr	r3, [pc, #140]	@ (8002158 <MX_GPIO_Init+0x11c>)
 80020cc:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 80020d0:	4a21      	ldr	r2, [pc, #132]	@ (8002158 <MX_GPIO_Init+0x11c>)
 80020d2:	f043 0310 	orr.w	r3, r3, #16
 80020d6:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 80020da:	4b1f      	ldr	r3, [pc, #124]	@ (8002158 <MX_GPIO_Init+0x11c>)
 80020dc:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 80020e0:	f003 0310 	and.w	r3, r3, #16
 80020e4:	60bb      	str	r3, [r7, #8]
 80020e6:	68bb      	ldr	r3, [r7, #8]

/* USER CODE BEGIN MX_GPIO_Init_2 */
  __HAL_RCC_GPIOE_CLK_ENABLE();
 80020e8:	4b1b      	ldr	r3, [pc, #108]	@ (8002158 <MX_GPIO_Init+0x11c>)
 80020ea:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 80020ee:	4a1a      	ldr	r2, [pc, #104]	@ (8002158 <MX_GPIO_Init+0x11c>)
 80020f0:	f043 0310 	orr.w	r3, r3, #16
 80020f4:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 80020f8:	4b17      	ldr	r3, [pc, #92]	@ (8002158 <MX_GPIO_Init+0x11c>)
 80020fa:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 80020fe:	f003 0310 	and.w	r3, r3, #16
 8002102:	607b      	str	r3, [r7, #4]
 8002104:	687b      	ldr	r3, [r7, #4]
  GPIO_InitStruct.Pin = GPIO_PIN_14|GPIO_PIN_15;
 8002106:	f44f 4340 	mov.w	r3, #49152	@ 0xc000
 800210a:	61fb      	str	r3, [r7, #28]
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 800210c:	2301      	movs	r3, #1
 800210e:	623b      	str	r3, [r7, #32]
  GPIO_InitStruct.Pull = GPIO_PULLUP;
 8002110:	2301      	movs	r3, #1
 8002112:	627b      	str	r3, [r7, #36]	@ 0x24
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 8002114:	2300      	movs	r3, #0
 8002116:	62bb      	str	r3, [r7, #40]	@ 0x28
  HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
 8002118:	f107 031c 	add.w	r3, r7, #28
 800211c:	4619      	mov	r1, r3
 800211e:	480f      	ldr	r0, [pc, #60]	@ (800215c <MX_GPIO_Init+0x120>)
 8002120:	f007 f866 	bl	80091f0 <HAL_GPIO_Init>
  HAL_GPIO_WritePin(GPIOE, GPIO_PIN_14, GPIO_PIN_RESET);
 8002124:	2200      	movs	r2, #0
 8002126:	f44f 4180 	mov.w	r1, #16384	@ 0x4000
 800212a:	480c      	ldr	r0, [pc, #48]	@ (800215c <MX_GPIO_Init+0x120>)
 800212c:	f007 fa10 	bl	8009550 <HAL_GPIO_WritePin>
  HAL_Delay(100);
 8002130:	2064      	movs	r0, #100	@ 0x64
 8002132:	f002 fd39 	bl	8004ba8 <HAL_Delay>
  HAL_GPIO_WritePin(GPIOE, GPIO_PIN_14, GPIO_PIN_SET);
 8002136:	2201      	movs	r2, #1
 8002138:	f44f 4180 	mov.w	r1, #16384	@ 0x4000
 800213c:	4807      	ldr	r0, [pc, #28]	@ (800215c <MX_GPIO_Init+0x120>)
 800213e:	f007 fa07 	bl	8009550 <HAL_GPIO_WritePin>
  HAL_GPIO_WritePin(GPIOE, GPIO_PIN_15, GPIO_PIN_SET);
 8002142:	2201      	movs	r2, #1
 8002144:	f44f 4100 	mov.w	r1, #32768	@ 0x8000
 8002148:	4804      	ldr	r0, [pc, #16]	@ (800215c <MX_GPIO_Init+0x120>)
 800214a:	f007 fa01 	bl	8009550 <HAL_GPIO_WritePin>
/* USER CODE END MX_GPIO_Init_2 */
}
 800214e:	bf00      	nop
 8002150:	3730      	adds	r7, #48	@ 0x30
 8002152:	46bd      	mov	sp, r7
 8002154:	bd80      	pop	{r7, pc}
 8002156:	bf00      	nop
 8002158:	58024400 	.word	0x58024400
 800215c:	58021000 	.word	0x58021000

08002160 <StartDefaultTask>:
  * @param  argument: Not used
  * @retval None
  */
/* USER CODE END Header_StartDefaultTask */
void StartDefaultTask(void *argument)
{
 8002160:	b580      	push	{r7, lr}
 8002162:	b082      	sub	sp, #8
 8002164:	af00      	add	r7, sp, #0
 8002166:	6078      	str	r0, [r7, #4]
  /* init code for LWIP */
  MX_LWIP_Init();
 8002168:	f00d f9e8 	bl	800f53c <MX_LWIP_Init>
  /* USER CODE BEGIN 5 */
//  uint8_t data[256] = "DUPA\n";
  /* Infinite loop */
  for(;;)
  {
    osDelay(pdMS_TO_TICKS(1000));
 800216c:	f44f 707a 	mov.w	r0, #1000	@ 0x3e8
 8002170:	f00e f9a7 	bl	80104c2 <osDelay>
 8002174:	e7fa      	b.n	800216c <StartDefaultTask+0xc>
	...

08002178 <MPU_Config>:
}

 /* MPU Configuration */

void MPU_Config(void)
{
 8002178:	b580      	push	{r7, lr}
 800217a:	b084      	sub	sp, #16
 800217c:	af00      	add	r7, sp, #0
  MPU_Region_InitTypeDef MPU_InitStruct = {0};
 800217e:	463b      	mov	r3, r7
 8002180:	2200      	movs	r2, #0
 8002182:	601a      	str	r2, [r3, #0]
 8002184:	605a      	str	r2, [r3, #4]
 8002186:	609a      	str	r2, [r3, #8]
 8002188:	60da      	str	r2, [r3, #12]

  /* Disables the MPU */
  HAL_MPU_Disable();
 800218a:	f002 fe31 	bl	8004df0 <HAL_MPU_Disable>

  /** Initializes and configures the Region and the memory to be protected
  */
  MPU_InitStruct.Enable = MPU_REGION_ENABLE;
 800218e:	2301      	movs	r3, #1
 8002190:	703b      	strb	r3, [r7, #0]
  MPU_InitStruct.Number = MPU_REGION_NUMBER0;
 8002192:	2300      	movs	r3, #0
 8002194:	707b      	strb	r3, [r7, #1]
  MPU_InitStruct.BaseAddress = 0x0;
 8002196:	2300      	movs	r3, #0
 8002198:	607b      	str	r3, [r7, #4]
  MPU_InitStruct.Size = MPU_REGION_SIZE_4GB;
 800219a:	231f      	movs	r3, #31
 800219c:	723b      	strb	r3, [r7, #8]
  MPU_InitStruct.SubRegionDisable = 0x87;
 800219e:	2387      	movs	r3, #135	@ 0x87
 80021a0:	727b      	strb	r3, [r7, #9]
  MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0;
 80021a2:	2300      	movs	r3, #0
 80021a4:	72bb      	strb	r3, [r7, #10]
  MPU_InitStruct.AccessPermission = MPU_REGION_NO_ACCESS;
 80021a6:	2300      	movs	r3, #0
 80021a8:	72fb      	strb	r3, [r7, #11]
  MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_DISABLE;
 80021aa:	2301      	movs	r3, #1
 80021ac:	733b      	strb	r3, [r7, #12]
  MPU_InitStruct.IsShareable = MPU_ACCESS_SHAREABLE;
 80021ae:	2301      	movs	r3, #1
 80021b0:	737b      	strb	r3, [r7, #13]
  MPU_InitStruct.IsCacheable = MPU_ACCESS_NOT_CACHEABLE;
 80021b2:	2300      	movs	r3, #0
 80021b4:	73bb      	strb	r3, [r7, #14]
  MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE;
 80021b6:	2300      	movs	r3, #0
 80021b8:	73fb      	strb	r3, [r7, #15]

  HAL_MPU_ConfigRegion(&MPU_InitStruct);
 80021ba:	463b      	mov	r3, r7
 80021bc:	4618      	mov	r0, r3
 80021be:	f002 fe4f 	bl	8004e60 <HAL_MPU_ConfigRegion>

  /** Initializes and configures the Region and the memory to be protected
  */
  MPU_InitStruct.Number = MPU_REGION_NUMBER1;
 80021c2:	2301      	movs	r3, #1
 80021c4:	707b      	strb	r3, [r7, #1]
  MPU_InitStruct.BaseAddress = 0x24020000;
 80021c6:	4b13      	ldr	r3, [pc, #76]	@ (8002214 <MPU_Config+0x9c>)
 80021c8:	607b      	str	r3, [r7, #4]
  MPU_InitStruct.Size = MPU_REGION_SIZE_128KB;
 80021ca:	2310      	movs	r3, #16
 80021cc:	723b      	strb	r3, [r7, #8]
  MPU_InitStruct.SubRegionDisable = 0x0;
 80021ce:	2300      	movs	r3, #0
 80021d0:	727b      	strb	r3, [r7, #9]
  MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL1;
 80021d2:	2301      	movs	r3, #1
 80021d4:	72bb      	strb	r3, [r7, #10]
  MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS;
 80021d6:	2303      	movs	r3, #3
 80021d8:	72fb      	strb	r3, [r7, #11]
  MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE;
 80021da:	2300      	movs	r3, #0
 80021dc:	737b      	strb	r3, [r7, #13]

  HAL_MPU_ConfigRegion(&MPU_InitStruct);
 80021de:	463b      	mov	r3, r7
 80021e0:	4618      	mov	r0, r3
 80021e2:	f002 fe3d 	bl	8004e60 <HAL_MPU_ConfigRegion>

  /** Initializes and configures the Region and the memory to be protected
  */
  MPU_InitStruct.Number = MPU_REGION_NUMBER2;
 80021e6:	2302      	movs	r3, #2
 80021e8:	707b      	strb	r3, [r7, #1]
  MPU_InitStruct.BaseAddress = 0x24040000;
 80021ea:	4b0b      	ldr	r3, [pc, #44]	@ (8002218 <MPU_Config+0xa0>)
 80021ec:	607b      	str	r3, [r7, #4]
  MPU_InitStruct.Size = MPU_REGION_SIZE_512B;
 80021ee:	2308      	movs	r3, #8
 80021f0:	723b      	strb	r3, [r7, #8]
  MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0;
 80021f2:	2300      	movs	r3, #0
 80021f4:	72bb      	strb	r3, [r7, #10]
  MPU_InitStruct.IsShareable = MPU_ACCESS_SHAREABLE;
 80021f6:	2301      	movs	r3, #1
 80021f8:	737b      	strb	r3, [r7, #13]
  MPU_InitStruct.IsBufferable = MPU_ACCESS_BUFFERABLE;
 80021fa:	2301      	movs	r3, #1
 80021fc:	73fb      	strb	r3, [r7, #15]

  HAL_MPU_ConfigRegion(&MPU_InitStruct);
 80021fe:	463b      	mov	r3, r7
 8002200:	4618      	mov	r0, r3
 8002202:	f002 fe2d 	bl	8004e60 <HAL_MPU_ConfigRegion>
  /* Enables the MPU */
  HAL_MPU_Enable(MPU_PRIVILEGED_DEFAULT);
 8002206:	2004      	movs	r0, #4
 8002208:	f002 fe0a 	bl	8004e20 <HAL_MPU_Enable>

}
 800220c:	bf00      	nop
 800220e:	3710      	adds	r7, #16
 8002210:	46bd      	mov	sp, r7
 8002212:	bd80      	pop	{r7, pc}
 8002214:	24020000 	.word	0x24020000
 8002218:	24040000 	.word	0x24040000

0800221c <HAL_TIM_PeriodElapsedCallback>:
  * a global variable "uwTick" used as application time base.
  * @param  htim : TIM handle
  * @retval None
  */
void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
{
 800221c:	b580      	push	{r7, lr}
 800221e:	b082      	sub	sp, #8
 8002220:	af00      	add	r7, sp, #0
 8002222:	6078      	str	r0, [r7, #4]
  /* USER CODE BEGIN Callback 0 */

  /* USER CODE END Callback 0 */
  if (htim->Instance == TIM6) {
 8002224:	687b      	ldr	r3, [r7, #4]
 8002226:	681b      	ldr	r3, [r3, #0]
 8002228:	4a09      	ldr	r2, [pc, #36]	@ (8002250 <HAL_TIM_PeriodElapsedCallback+0x34>)
 800222a:	4293      	cmp	r3, r2
 800222c:	d101      	bne.n	8002232 <HAL_TIM_PeriodElapsedCallback+0x16>
    HAL_IncTick();
 800222e:	f002 fc9b 	bl	8004b68 <HAL_IncTick>
  }
  /* USER CODE BEGIN Callback 1 */
  if (htim->Instance == TIM6) {
 8002232:	687b      	ldr	r3, [r7, #4]
 8002234:	681b      	ldr	r3, [r3, #0]
 8002236:	4a06      	ldr	r2, [pc, #24]	@ (8002250 <HAL_TIM_PeriodElapsedCallback+0x34>)
 8002238:	4293      	cmp	r3, r2
 800223a:	d104      	bne.n	8002246 <HAL_TIM_PeriodElapsedCallback+0x2a>
    MilliTimer++;
 800223c:	4b05      	ldr	r3, [pc, #20]	@ (8002254 <HAL_TIM_PeriodElapsedCallback+0x38>)
 800223e:	681b      	ldr	r3, [r3, #0]
 8002240:	3301      	adds	r3, #1
 8002242:	4a04      	ldr	r2, [pc, #16]	@ (8002254 <HAL_TIM_PeriodElapsedCallback+0x38>)
 8002244:	6013      	str	r3, [r2, #0]
  }
  /* USER CODE END Callback 1 */
}
 8002246:	bf00      	nop
 8002248:	3708      	adds	r7, #8
 800224a:	46bd      	mov	sp, r7
 800224c:	bd80      	pop	{r7, pc}
 800224e:	bf00      	nop
 8002250:	40001000 	.word	0x40001000
 8002254:	2402a198 	.word	0x2402a198

08002258 <Error_Handler>:
/**
  * @brief  This function is executed in case of error occurrence.
  * @retval None
  */
void Error_Handler(void)
{
 8002258:	b480      	push	{r7}
 800225a:	af00      	add	r7, sp, #0
  __ASM volatile ("cpsid i" : : : "memory");
 800225c:	b672      	cpsid	i
}
 800225e:	bf00      	nop
  /* USER CODE BEGIN Error_Handler_Debug */
  /* User can add his own implementation to report the HAL error return state */
  __disable_irq();
  while (1)
 8002260:	bf00      	nop
 8002262:	e7fd      	b.n	8002260 <Error_Handler+0x8>

08002264 <MockMeasurmetsTaskInit>:
	(void)rng;
	return 0.0;
}
#endif

void MockMeasurmetsTaskInit(void) {
 8002264:	b580      	push	{r7, lr}
 8002266:	b08a      	sub	sp, #40	@ 0x28
 8002268:	af00      	add	r7, sp, #0
	osThreadAttr_t osThreadAttrMockMeasTask = { 0 };
 800226a:	1d3b      	adds	r3, r7, #4
 800226c:	2224      	movs	r2, #36	@ 0x24
 800226e:	2100      	movs	r1, #0
 8002270:	4618      	mov	r0, r3
 8002272:	f027 fadd 	bl	8029830 <memset>
//	osThreadId_t osThreadMockMeasurmetsTaskId;
	osThreadAttrMockMeasTask.name       = "os_thread_mock_measurmets";
 8002276:	4b08      	ldr	r3, [pc, #32]	@ (8002298 <MockMeasurmetsTaskInit+0x34>)
 8002278:	607b      	str	r3, [r7, #4]
	osThreadAttrMockMeasTask.stack_size = configMINIMAL_STACK_SIZE * 2;
 800227a:	f44f 6380 	mov.w	r3, #1024	@ 0x400
 800227e:	61bb      	str	r3, [r7, #24]
	osThreadAttrMockMeasTask.priority   = (osPriority_t)osPriorityNormal;
 8002280:	2318      	movs	r3, #24
 8002282:	61fb      	str	r3, [r7, #28]
//	osThreadMockMeasurmetsTaskId = osThreadNew (MockMeasurmetsTask, NULL, &osThreadAttrMockMeasTask);
	osThreadNew (MockMeasurmetsTask, NULL, &osThreadAttrMockMeasTask);
 8002284:	1d3b      	adds	r3, r7, #4
 8002286:	461a      	mov	r2, r3
 8002288:	2100      	movs	r1, #0
 800228a:	4804      	ldr	r0, [pc, #16]	@ (800229c <MockMeasurmetsTaskInit+0x38>)
 800228c:	f00e f87b 	bl	8010386 <osThreadNew>

}
 8002290:	bf00      	nop
 8002292:	3728      	adds	r7, #40	@ 0x28
 8002294:	46bd      	mov	sp, r7
 8002296:	bd80      	pop	{r7, pc}
 8002298:	0802bff8 	.word	0x0802bff8
 800229c:	080022a1 	.word	0x080022a1

080022a0 <MockMeasurmetsTask>:

void MockMeasurmetsTask (void* argument) {
 80022a0:	b580      	push	{r7, lr}
 80022a2:	b086      	sub	sp, #24
 80022a4:	af00      	add	r7, sp, #0
 80022a6:	6078      	str	r0, [r7, #4]
	uint8_t boardNumber = 0;
 80022a8:	2300      	movs	r3, #0
 80022aa:	75fb      	strb	r3, [r7, #23]
	uint16_t counter = 0;
 80022ac:	2300      	movs	r3, #0
 80022ae:	82bb      	strh	r3, [r7, #20]
    while (pdTRUE) {
    	osMutexAcquire (resMeasurementsMutex, osWaitForever);
 80022b0:	4b04      	ldr	r3, [pc, #16]	@ (80022c4 <MockMeasurmetsTask+0x24>)
 80022b2:	681b      	ldr	r3, [r3, #0]
 80022b4:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 80022b8:	4618      	mov	r0, r3
 80022ba:	f00e f9a3 	bl	8010604 <osMutexAcquire>
		for( boardNumber = 0; boardNumber < SLAVES_COUNT; boardNumber++)
 80022be:	2300      	movs	r3, #0
 80022c0:	75fb      	strb	r3, [r7, #23]
 80022c2:	e2da      	b.n	800287a <MockMeasurmetsTask+0x5da>
 80022c4:	24000594 	.word	0x24000594
		{
			RESMeasurements *resMeas = &resMeasurements[boardNumber];
 80022c8:	7dfa      	ldrb	r2, [r7, #23]
 80022ca:	4613      	mov	r3, r2
 80022cc:	011b      	lsls	r3, r3, #4
 80022ce:	1a9b      	subs	r3, r3, r2
 80022d0:	009b      	lsls	r3, r3, #2
 80022d2:	4adb      	ldr	r2, [pc, #876]	@ (8002640 <MockMeasurmetsTask+0x3a0>)
 80022d4:	4413      	add	r3, r2
 80022d6:	613b      	str	r3, [r7, #16]
			resMeas->voltagePeak[0] = 60 + (0.01 * (counter % 100));
 80022d8:	8abb      	ldrh	r3, [r7, #20]
 80022da:	4ada      	ldr	r2, [pc, #872]	@ (8002644 <MockMeasurmetsTask+0x3a4>)
 80022dc:	fba2 1203 	umull	r1, r2, r2, r3
 80022e0:	0952      	lsrs	r2, r2, #5
 80022e2:	2164      	movs	r1, #100	@ 0x64
 80022e4:	fb01 f202 	mul.w	r2, r1, r2
 80022e8:	1a9b      	subs	r3, r3, r2
 80022ea:	b29b      	uxth	r3, r3
 80022ec:	ee07 3a90 	vmov	s15, r3
 80022f0:	eeb8 7be7 	vcvt.f64.s32	d7, s15
 80022f4:	ed9f 6bc2 	vldr	d6, [pc, #776]	@ 8002600 <MockMeasurmetsTask+0x360>
 80022f8:	ee27 7b06 	vmul.f64	d7, d7, d6
 80022fc:	ed9f 6bc2 	vldr	d6, [pc, #776]	@ 8002608 <MockMeasurmetsTask+0x368>
 8002300:	ee37 7b06 	vadd.f64	d7, d7, d6
 8002304:	eef7 7bc7 	vcvt.f32.f64	s15, d7
 8002308:	693b      	ldr	r3, [r7, #16]
 800230a:	edc3 7a03 	vstr	s15, [r3, #12]
			resMeas->voltagePeak[1] = 61 + (0.01 * (counter % 100));
 800230e:	8abb      	ldrh	r3, [r7, #20]
 8002310:	4acc      	ldr	r2, [pc, #816]	@ (8002644 <MockMeasurmetsTask+0x3a4>)
 8002312:	fba2 1203 	umull	r1, r2, r2, r3
 8002316:	0952      	lsrs	r2, r2, #5
 8002318:	2164      	movs	r1, #100	@ 0x64
 800231a:	fb01 f202 	mul.w	r2, r1, r2
 800231e:	1a9b      	subs	r3, r3, r2
 8002320:	b29b      	uxth	r3, r3
 8002322:	ee07 3a90 	vmov	s15, r3
 8002326:	eeb8 7be7 	vcvt.f64.s32	d7, s15
 800232a:	ed9f 6bb5 	vldr	d6, [pc, #724]	@ 8002600 <MockMeasurmetsTask+0x360>
 800232e:	ee27 7b06 	vmul.f64	d7, d7, d6
 8002332:	ed9f 6bb7 	vldr	d6, [pc, #732]	@ 8002610 <MockMeasurmetsTask+0x370>
 8002336:	ee37 7b06 	vadd.f64	d7, d7, d6
 800233a:	eef7 7bc7 	vcvt.f32.f64	s15, d7
 800233e:	693b      	ldr	r3, [r7, #16]
 8002340:	edc3 7a04 	vstr	s15, [r3, #16]
			resMeas->voltagePeak[2] = 62 + (0.01 * (counter % 100));
 8002344:	8abb      	ldrh	r3, [r7, #20]
 8002346:	4abf      	ldr	r2, [pc, #764]	@ (8002644 <MockMeasurmetsTask+0x3a4>)
 8002348:	fba2 1203 	umull	r1, r2, r2, r3
 800234c:	0952      	lsrs	r2, r2, #5
 800234e:	2164      	movs	r1, #100	@ 0x64
 8002350:	fb01 f202 	mul.w	r2, r1, r2
 8002354:	1a9b      	subs	r3, r3, r2
 8002356:	b29b      	uxth	r3, r3
 8002358:	ee07 3a90 	vmov	s15, r3
 800235c:	eeb8 7be7 	vcvt.f64.s32	d7, s15
 8002360:	ed9f 6ba7 	vldr	d6, [pc, #668]	@ 8002600 <MockMeasurmetsTask+0x360>
 8002364:	ee27 7b06 	vmul.f64	d7, d7, d6
 8002368:	ed9f 6bab 	vldr	d6, [pc, #684]	@ 8002618 <MockMeasurmetsTask+0x378>
 800236c:	ee37 7b06 	vadd.f64	d7, d7, d6
 8002370:	eef7 7bc7 	vcvt.f32.f64	s15, d7
 8002374:	693b      	ldr	r3, [r7, #16]
 8002376:	edc3 7a05 	vstr	s15, [r3, #20]
			resMeas->voltageRMS[0] = 46 + (0.01 * (counter % 100));
 800237a:	8abb      	ldrh	r3, [r7, #20]
 800237c:	4ab1      	ldr	r2, [pc, #708]	@ (8002644 <MockMeasurmetsTask+0x3a4>)
 800237e:	fba2 1203 	umull	r1, r2, r2, r3
 8002382:	0952      	lsrs	r2, r2, #5
 8002384:	2164      	movs	r1, #100	@ 0x64
 8002386:	fb01 f202 	mul.w	r2, r1, r2
 800238a:	1a9b      	subs	r3, r3, r2
 800238c:	b29b      	uxth	r3, r3
 800238e:	ee07 3a90 	vmov	s15, r3
 8002392:	eeb8 7be7 	vcvt.f64.s32	d7, s15
 8002396:	ed9f 6b9a 	vldr	d6, [pc, #616]	@ 8002600 <MockMeasurmetsTask+0x360>
 800239a:	ee27 7b06 	vmul.f64	d7, d7, d6
 800239e:	ed9f 6ba0 	vldr	d6, [pc, #640]	@ 8002620 <MockMeasurmetsTask+0x380>
 80023a2:	ee37 7b06 	vadd.f64	d7, d7, d6
 80023a6:	eef7 7bc7 	vcvt.f32.f64	s15, d7
 80023aa:	693b      	ldr	r3, [r7, #16]
 80023ac:	edc3 7a00 	vstr	s15, [r3]
			resMeas->voltageRMS[1] = 47 + (0.01 * (counter % 100));
 80023b0:	8abb      	ldrh	r3, [r7, #20]
 80023b2:	4aa4      	ldr	r2, [pc, #656]	@ (8002644 <MockMeasurmetsTask+0x3a4>)
 80023b4:	fba2 1203 	umull	r1, r2, r2, r3
 80023b8:	0952      	lsrs	r2, r2, #5
 80023ba:	2164      	movs	r1, #100	@ 0x64
 80023bc:	fb01 f202 	mul.w	r2, r1, r2
 80023c0:	1a9b      	subs	r3, r3, r2
 80023c2:	b29b      	uxth	r3, r3
 80023c4:	ee07 3a90 	vmov	s15, r3
 80023c8:	eeb8 7be7 	vcvt.f64.s32	d7, s15
 80023cc:	ed9f 6b8c 	vldr	d6, [pc, #560]	@ 8002600 <MockMeasurmetsTask+0x360>
 80023d0:	ee27 7b06 	vmul.f64	d7, d7, d6
 80023d4:	ed9f 6b94 	vldr	d6, [pc, #592]	@ 8002628 <MockMeasurmetsTask+0x388>
 80023d8:	ee37 7b06 	vadd.f64	d7, d7, d6
 80023dc:	eef7 7bc7 	vcvt.f32.f64	s15, d7
 80023e0:	693b      	ldr	r3, [r7, #16]
 80023e2:	edc3 7a01 	vstr	s15, [r3, #4]
			resMeas->voltageRMS[2] = 48 + (0.01 * (counter % 100));
 80023e6:	8abb      	ldrh	r3, [r7, #20]
 80023e8:	4a96      	ldr	r2, [pc, #600]	@ (8002644 <MockMeasurmetsTask+0x3a4>)
 80023ea:	fba2 1203 	umull	r1, r2, r2, r3
 80023ee:	0952      	lsrs	r2, r2, #5
 80023f0:	2164      	movs	r1, #100	@ 0x64
 80023f2:	fb01 f202 	mul.w	r2, r1, r2
 80023f6:	1a9b      	subs	r3, r3, r2
 80023f8:	b29b      	uxth	r3, r3
 80023fa:	ee07 3a90 	vmov	s15, r3
 80023fe:	eeb8 7be7 	vcvt.f64.s32	d7, s15
 8002402:	ed9f 6b7f 	vldr	d6, [pc, #508]	@ 8002600 <MockMeasurmetsTask+0x360>
 8002406:	ee27 7b06 	vmul.f64	d7, d7, d6
 800240a:	ed9f 6b89 	vldr	d6, [pc, #548]	@ 8002630 <MockMeasurmetsTask+0x390>
 800240e:	ee37 7b06 	vadd.f64	d7, d7, d6
 8002412:	eef7 7bc7 	vcvt.f32.f64	s15, d7
 8002416:	693b      	ldr	r3, [r7, #16]
 8002418:	edc3 7a02 	vstr	s15, [r3, #8]
			resMeas->currentPeak[0] = 3 + (0.01 * (counter % 100));
 800241c:	8abb      	ldrh	r3, [r7, #20]
 800241e:	4a89      	ldr	r2, [pc, #548]	@ (8002644 <MockMeasurmetsTask+0x3a4>)
 8002420:	fba2 1203 	umull	r1, r2, r2, r3
 8002424:	0952      	lsrs	r2, r2, #5
 8002426:	2164      	movs	r1, #100	@ 0x64
 8002428:	fb01 f202 	mul.w	r2, r1, r2
 800242c:	1a9b      	subs	r3, r3, r2
 800242e:	b29b      	uxth	r3, r3
 8002430:	ee07 3a90 	vmov	s15, r3
 8002434:	eeb8 7be7 	vcvt.f64.s32	d7, s15
 8002438:	ed9f 6b71 	vldr	d6, [pc, #452]	@ 8002600 <MockMeasurmetsTask+0x360>
 800243c:	ee27 7b06 	vmul.f64	d7, d7, d6
 8002440:	eeb0 6b08 	vmov.f64	d6, #8	@ 0x40400000  3.0
 8002444:	ee37 7b06 	vadd.f64	d7, d7, d6
 8002448:	eef7 7bc7 	vcvt.f32.f64	s15, d7
 800244c:	693b      	ldr	r3, [r7, #16]
 800244e:	edc3 7a09 	vstr	s15, [r3, #36]	@ 0x24
			resMeas->currentPeak[1] = 4 + (0.01 * (counter % 100));
 8002452:	8abb      	ldrh	r3, [r7, #20]
 8002454:	4a7b      	ldr	r2, [pc, #492]	@ (8002644 <MockMeasurmetsTask+0x3a4>)
 8002456:	fba2 1203 	umull	r1, r2, r2, r3
 800245a:	0952      	lsrs	r2, r2, #5
 800245c:	2164      	movs	r1, #100	@ 0x64
 800245e:	fb01 f202 	mul.w	r2, r1, r2
 8002462:	1a9b      	subs	r3, r3, r2
 8002464:	b29b      	uxth	r3, r3
 8002466:	ee07 3a90 	vmov	s15, r3
 800246a:	eeb8 7be7 	vcvt.f64.s32	d7, s15
 800246e:	ed9f 6b64 	vldr	d6, [pc, #400]	@ 8002600 <MockMeasurmetsTask+0x360>
 8002472:	ee27 7b06 	vmul.f64	d7, d7, d6
 8002476:	eeb1 6b00 	vmov.f64	d6, #16	@ 0x40800000  4.0
 800247a:	ee37 7b06 	vadd.f64	d7, d7, d6
 800247e:	eef7 7bc7 	vcvt.f32.f64	s15, d7
 8002482:	693b      	ldr	r3, [r7, #16]
 8002484:	edc3 7a0a 	vstr	s15, [r3, #40]	@ 0x28
			resMeas->currentPeak[2] = 5 + (0.01 * (counter % 100));
 8002488:	8abb      	ldrh	r3, [r7, #20]
 800248a:	4a6e      	ldr	r2, [pc, #440]	@ (8002644 <MockMeasurmetsTask+0x3a4>)
 800248c:	fba2 1203 	umull	r1, r2, r2, r3
 8002490:	0952      	lsrs	r2, r2, #5
 8002492:	2164      	movs	r1, #100	@ 0x64
 8002494:	fb01 f202 	mul.w	r2, r1, r2
 8002498:	1a9b      	subs	r3, r3, r2
 800249a:	b29b      	uxth	r3, r3
 800249c:	ee07 3a90 	vmov	s15, r3
 80024a0:	eeb8 7be7 	vcvt.f64.s32	d7, s15
 80024a4:	ed9f 6b56 	vldr	d6, [pc, #344]	@ 8002600 <MockMeasurmetsTask+0x360>
 80024a8:	ee27 7b06 	vmul.f64	d7, d7, d6
 80024ac:	eeb1 6b04 	vmov.f64	d6, #20	@ 0x40a00000  5.0
 80024b0:	ee37 7b06 	vadd.f64	d7, d7, d6
 80024b4:	eef7 7bc7 	vcvt.f32.f64	s15, d7
 80024b8:	693b      	ldr	r3, [r7, #16]
 80024ba:	edc3 7a0b 	vstr	s15, [r3, #44]	@ 0x2c
			resMeas->currentRMS[0] = 1 + (0.01 * (counter % 100));
 80024be:	8abb      	ldrh	r3, [r7, #20]
 80024c0:	4a60      	ldr	r2, [pc, #384]	@ (8002644 <MockMeasurmetsTask+0x3a4>)
 80024c2:	fba2 1203 	umull	r1, r2, r2, r3
 80024c6:	0952      	lsrs	r2, r2, #5
 80024c8:	2164      	movs	r1, #100	@ 0x64
 80024ca:	fb01 f202 	mul.w	r2, r1, r2
 80024ce:	1a9b      	subs	r3, r3, r2
 80024d0:	b29b      	uxth	r3, r3
 80024d2:	ee07 3a90 	vmov	s15, r3
 80024d6:	eeb8 7be7 	vcvt.f64.s32	d7, s15
 80024da:	ed9f 6b49 	vldr	d6, [pc, #292]	@ 8002600 <MockMeasurmetsTask+0x360>
 80024de:	ee27 7b06 	vmul.f64	d7, d7, d6
 80024e2:	eeb7 6b00 	vmov.f64	d6, #112	@ 0x3f800000  1.0
 80024e6:	ee37 7b06 	vadd.f64	d7, d7, d6
 80024ea:	eef7 7bc7 	vcvt.f32.f64	s15, d7
 80024ee:	693b      	ldr	r3, [r7, #16]
 80024f0:	edc3 7a06 	vstr	s15, [r3, #24]
			resMeas->currentRMS[1] = 2 + (0.01 * (counter % 100));
 80024f4:	8abb      	ldrh	r3, [r7, #20]
 80024f6:	4a53      	ldr	r2, [pc, #332]	@ (8002644 <MockMeasurmetsTask+0x3a4>)
 80024f8:	fba2 1203 	umull	r1, r2, r2, r3
 80024fc:	0952      	lsrs	r2, r2, #5
 80024fe:	2164      	movs	r1, #100	@ 0x64
 8002500:	fb01 f202 	mul.w	r2, r1, r2
 8002504:	1a9b      	subs	r3, r3, r2
 8002506:	b29b      	uxth	r3, r3
 8002508:	ee07 3a90 	vmov	s15, r3
 800250c:	eeb8 7be7 	vcvt.f64.s32	d7, s15
 8002510:	ed9f 6b3b 	vldr	d6, [pc, #236]	@ 8002600 <MockMeasurmetsTask+0x360>
 8002514:	ee27 7b06 	vmul.f64	d7, d7, d6
 8002518:	eeb0 6b00 	vmov.f64	d6, #0	@ 0x40000000  2.0
 800251c:	ee37 7b06 	vadd.f64	d7, d7, d6
 8002520:	eef7 7bc7 	vcvt.f32.f64	s15, d7
 8002524:	693b      	ldr	r3, [r7, #16]
 8002526:	edc3 7a07 	vstr	s15, [r3, #28]
			resMeas->currentRMS[2] = 3 + (0.01 * (counter % 100));
 800252a:	8abb      	ldrh	r3, [r7, #20]
 800252c:	4a45      	ldr	r2, [pc, #276]	@ (8002644 <MockMeasurmetsTask+0x3a4>)
 800252e:	fba2 1203 	umull	r1, r2, r2, r3
 8002532:	0952      	lsrs	r2, r2, #5
 8002534:	2164      	movs	r1, #100	@ 0x64
 8002536:	fb01 f202 	mul.w	r2, r1, r2
 800253a:	1a9b      	subs	r3, r3, r2
 800253c:	b29b      	uxth	r3, r3
 800253e:	ee07 3a90 	vmov	s15, r3
 8002542:	eeb8 7be7 	vcvt.f64.s32	d7, s15
 8002546:	ed9f 6b2e 	vldr	d6, [pc, #184]	@ 8002600 <MockMeasurmetsTask+0x360>
 800254a:	ee27 7b06 	vmul.f64	d7, d7, d6
 800254e:	eeb0 6b08 	vmov.f64	d6, #8	@ 0x40400000  3.0
 8002552:	ee37 7b06 	vadd.f64	d7, d7, d6
 8002556:	eef7 7bc7 	vcvt.f32.f64	s15, d7
 800255a:	693b      	ldr	r3, [r7, #16]
 800255c:	edc3 7a08 	vstr	s15, [r3, #32]
			resMeas->power[0] = resMeas->voltagePeak[0] * resMeas->currentRMS[0];
 8002560:	693b      	ldr	r3, [r7, #16]
 8002562:	ed93 7a03 	vldr	s14, [r3, #12]
 8002566:	693b      	ldr	r3, [r7, #16]
 8002568:	edd3 7a06 	vldr	s15, [r3, #24]
 800256c:	ee67 7a27 	vmul.f32	s15, s14, s15
 8002570:	693b      	ldr	r3, [r7, #16]
 8002572:	edc3 7a0c 	vstr	s15, [r3, #48]	@ 0x30
			resMeas->power[1] = resMeas->voltagePeak[1] * resMeas->currentRMS[1];
 8002576:	693b      	ldr	r3, [r7, #16]
 8002578:	ed93 7a04 	vldr	s14, [r3, #16]
 800257c:	693b      	ldr	r3, [r7, #16]
 800257e:	edd3 7a07 	vldr	s15, [r3, #28]
 8002582:	ee67 7a27 	vmul.f32	s15, s14, s15
 8002586:	693b      	ldr	r3, [r7, #16]
 8002588:	edc3 7a0d 	vstr	s15, [r3, #52]	@ 0x34
			resMeas->power[2] = resMeas->voltagePeak[2] * resMeas->currentRMS[2];
 800258c:	693b      	ldr	r3, [r7, #16]
 800258e:	ed93 7a05 	vldr	s14, [r3, #20]
 8002592:	693b      	ldr	r3, [r7, #16]
 8002594:	edd3 7a08 	vldr	s15, [r3, #32]
 8002598:	ee67 7a27 	vmul.f32	s15, s14, s15
 800259c:	693b      	ldr	r3, [r7, #16]
 800259e:	edc3 7a0e 	vstr	s15, [r3, #56]	@ 0x38

			SesnorsInfo* sensors = &sensorsInfo[boardNumber];
 80025a2:	7dfa      	ldrb	r2, [r7, #23]
 80025a4:	4613      	mov	r3, r2
 80025a6:	009b      	lsls	r3, r3, #2
 80025a8:	4413      	add	r3, r2
 80025aa:	00db      	lsls	r3, r3, #3
 80025ac:	4a26      	ldr	r2, [pc, #152]	@ (8002648 <MockMeasurmetsTask+0x3a8>)
 80025ae:	4413      	add	r3, r2
 80025b0:	60fb      	str	r3, [r7, #12]
			sensors->pvTemperature[0] = 50 + (0.01 * (counter % 100));
 80025b2:	8abb      	ldrh	r3, [r7, #20]
 80025b4:	4a23      	ldr	r2, [pc, #140]	@ (8002644 <MockMeasurmetsTask+0x3a4>)
 80025b6:	fba2 1203 	umull	r1, r2, r2, r3
 80025ba:	0952      	lsrs	r2, r2, #5
 80025bc:	2164      	movs	r1, #100	@ 0x64
 80025be:	fb01 f202 	mul.w	r2, r1, r2
 80025c2:	1a9b      	subs	r3, r3, r2
 80025c4:	b29b      	uxth	r3, r3
 80025c6:	ee07 3a90 	vmov	s15, r3
 80025ca:	eeb8 7be7 	vcvt.f64.s32	d7, s15
 80025ce:	ed9f 6b0c 	vldr	d6, [pc, #48]	@ 8002600 <MockMeasurmetsTask+0x360>
 80025d2:	ee27 7b06 	vmul.f64	d7, d7, d6
 80025d6:	ed9f 6b18 	vldr	d6, [pc, #96]	@ 8002638 <MockMeasurmetsTask+0x398>
 80025da:	ee37 7b06 	vadd.f64	d7, d7, d6
 80025de:	eef7 7bc7 	vcvt.f32.f64	s15, d7
 80025e2:	68fb      	ldr	r3, [r7, #12]
 80025e4:	edc3 7a00 	vstr	s15, [r3]
			sensors->pvTemperature[1] = 51 + (0.01 * (counter % 100));
 80025e8:	8abb      	ldrh	r3, [r7, #20]
 80025ea:	4a16      	ldr	r2, [pc, #88]	@ (8002644 <MockMeasurmetsTask+0x3a4>)
 80025ec:	fba2 1203 	umull	r1, r2, r2, r3
 80025f0:	0952      	lsrs	r2, r2, #5
 80025f2:	2164      	movs	r1, #100	@ 0x64
 80025f4:	fb01 f202 	mul.w	r2, r1, r2
 80025f8:	1a9b      	subs	r3, r3, r2
 80025fa:	b29b      	uxth	r3, r3
 80025fc:	e026      	b.n	800264c <MockMeasurmetsTask+0x3ac>
 80025fe:	bf00      	nop
 8002600:	47ae147b 	.word	0x47ae147b
 8002604:	3f847ae1 	.word	0x3f847ae1
 8002608:	00000000 	.word	0x00000000
 800260c:	404e0000 	.word	0x404e0000
 8002610:	00000000 	.word	0x00000000
 8002614:	404e8000 	.word	0x404e8000
 8002618:	00000000 	.word	0x00000000
 800261c:	404f0000 	.word	0x404f0000
 8002620:	00000000 	.word	0x00000000
 8002624:	40470000 	.word	0x40470000
 8002628:	00000000 	.word	0x00000000
 800262c:	40478000 	.word	0x40478000
 8002630:	00000000 	.word	0x00000000
 8002634:	40480000 	.word	0x40480000
 8002638:	00000000 	.word	0x00000000
 800263c:	40490000 	.word	0x40490000
 8002640:	24000404 	.word	0x24000404
 8002644:	51eb851f 	.word	0x51eb851f
 8002648:	240004f4 	.word	0x240004f4
 800264c:	ee07 3a90 	vmov	s15, r3
 8002650:	eeb8 7be7 	vcvt.f64.s32	d7, s15
 8002654:	ed9f 6b98 	vldr	d6, [pc, #608]	@ 80028b8 <MockMeasurmetsTask+0x618>
 8002658:	ee27 7b06 	vmul.f64	d7, d7, d6
 800265c:	ed9f 6b98 	vldr	d6, [pc, #608]	@ 80028c0 <MockMeasurmetsTask+0x620>
 8002660:	ee37 7b06 	vadd.f64	d7, d7, d6
 8002664:	eef7 7bc7 	vcvt.f32.f64	s15, d7
 8002668:	68fb      	ldr	r3, [r7, #12]
 800266a:	edc3 7a01 	vstr	s15, [r3, #4]
			sensors->fanVoltage = 12 + (0.01 * (counter % 100));
 800266e:	8abb      	ldrh	r3, [r7, #20]
 8002670:	4a95      	ldr	r2, [pc, #596]	@ (80028c8 <MockMeasurmetsTask+0x628>)
 8002672:	fba2 1203 	umull	r1, r2, r2, r3
 8002676:	0952      	lsrs	r2, r2, #5
 8002678:	2164      	movs	r1, #100	@ 0x64
 800267a:	fb01 f202 	mul.w	r2, r1, r2
 800267e:	1a9b      	subs	r3, r3, r2
 8002680:	b29b      	uxth	r3, r3
 8002682:	ee07 3a90 	vmov	s15, r3
 8002686:	eeb8 7be7 	vcvt.f64.s32	d7, s15
 800268a:	ed9f 6b8b 	vldr	d6, [pc, #556]	@ 80028b8 <MockMeasurmetsTask+0x618>
 800268e:	ee27 7b06 	vmul.f64	d7, d7, d6
 8002692:	eeb2 6b08 	vmov.f64	d6, #40	@ 0x41400000  12.0
 8002696:	ee37 7b06 	vadd.f64	d7, d7, d6
 800269a:	eef7 7bc7 	vcvt.f32.f64	s15, d7
 800269e:	68fb      	ldr	r3, [r7, #12]
 80026a0:	edc3 7a02 	vstr	s15, [r3, #8]
			sensors->pvEncoder = 15 + (0.01 * (counter % 100));
 80026a4:	8abb      	ldrh	r3, [r7, #20]
 80026a6:	4a88      	ldr	r2, [pc, #544]	@ (80028c8 <MockMeasurmetsTask+0x628>)
 80026a8:	fba2 1203 	umull	r1, r2, r2, r3
 80026ac:	0952      	lsrs	r2, r2, #5
 80026ae:	2164      	movs	r1, #100	@ 0x64
 80026b0:	fb01 f202 	mul.w	r2, r1, r2
 80026b4:	1a9b      	subs	r3, r3, r2
 80026b6:	b29b      	uxth	r3, r3
 80026b8:	ee07 3a90 	vmov	s15, r3
 80026bc:	eeb8 7be7 	vcvt.f64.s32	d7, s15
 80026c0:	ed9f 6b7d 	vldr	d6, [pc, #500]	@ 80028b8 <MockMeasurmetsTask+0x618>
 80026c4:	ee27 7b06 	vmul.f64	d7, d7, d6
 80026c8:	eeb2 6b0e 	vmov.f64	d6, #46	@ 0x41700000  15.0
 80026cc:	ee37 7b06 	vadd.f64	d7, d7, d6
 80026d0:	eef7 7bc7 	vcvt.f32.f64	s15, d7
 80026d4:	68fb      	ldr	r3, [r7, #12]
 80026d6:	edc3 7a03 	vstr	s15, [r3, #12]
			sensors->motorXStatus = (counter % 100) > 50 ? 1 : 0;
 80026da:	8abb      	ldrh	r3, [r7, #20]
 80026dc:	4a7a      	ldr	r2, [pc, #488]	@ (80028c8 <MockMeasurmetsTask+0x628>)
 80026de:	fba2 1203 	umull	r1, r2, r2, r3
 80026e2:	0952      	lsrs	r2, r2, #5
 80026e4:	2164      	movs	r1, #100	@ 0x64
 80026e6:	fb01 f202 	mul.w	r2, r1, r2
 80026ea:	1a9b      	subs	r3, r3, r2
 80026ec:	b29b      	uxth	r3, r3
 80026ee:	2b32      	cmp	r3, #50	@ 0x32
 80026f0:	bf8c      	ite	hi
 80026f2:	2301      	movhi	r3, #1
 80026f4:	2300      	movls	r3, #0
 80026f6:	b2db      	uxtb	r3, r3
 80026f8:	461a      	mov	r2, r3
 80026fa:	68fb      	ldr	r3, [r7, #12]
 80026fc:	741a      	strb	r2, [r3, #16]
			sensors->motorYStatus = (counter % 100) > 75 ? 1 : 0;
 80026fe:	8abb      	ldrh	r3, [r7, #20]
 8002700:	4a71      	ldr	r2, [pc, #452]	@ (80028c8 <MockMeasurmetsTask+0x628>)
 8002702:	fba2 1203 	umull	r1, r2, r2, r3
 8002706:	0952      	lsrs	r2, r2, #5
 8002708:	2164      	movs	r1, #100	@ 0x64
 800270a:	fb01 f202 	mul.w	r2, r1, r2
 800270e:	1a9b      	subs	r3, r3, r2
 8002710:	b29b      	uxth	r3, r3
 8002712:	2b4b      	cmp	r3, #75	@ 0x4b
 8002714:	bf8c      	ite	hi
 8002716:	2301      	movhi	r3, #1
 8002718:	2300      	movls	r3, #0
 800271a:	b2db      	uxtb	r3, r3
 800271c:	461a      	mov	r2, r3
 800271e:	68fb      	ldr	r3, [r7, #12]
 8002720:	745a      	strb	r2, [r3, #17]
			sensors->motorXAveCurrent = 3 + (0.01 * (counter % 100));
 8002722:	8abb      	ldrh	r3, [r7, #20]
 8002724:	4a68      	ldr	r2, [pc, #416]	@ (80028c8 <MockMeasurmetsTask+0x628>)
 8002726:	fba2 1203 	umull	r1, r2, r2, r3
 800272a:	0952      	lsrs	r2, r2, #5
 800272c:	2164      	movs	r1, #100	@ 0x64
 800272e:	fb01 f202 	mul.w	r2, r1, r2
 8002732:	1a9b      	subs	r3, r3, r2
 8002734:	b29b      	uxth	r3, r3
 8002736:	ee07 3a90 	vmov	s15, r3
 800273a:	eeb8 7be7 	vcvt.f64.s32	d7, s15
 800273e:	ed9f 6b5e 	vldr	d6, [pc, #376]	@ 80028b8 <MockMeasurmetsTask+0x618>
 8002742:	ee27 7b06 	vmul.f64	d7, d7, d6
 8002746:	eeb0 6b08 	vmov.f64	d6, #8	@ 0x40400000  3.0
 800274a:	ee37 7b06 	vadd.f64	d7, d7, d6
 800274e:	eef7 7bc7 	vcvt.f32.f64	s15, d7
 8002752:	68fb      	ldr	r3, [r7, #12]
 8002754:	edc3 7a05 	vstr	s15, [r3, #20]
			sensors->motorYAveCurrent = 3 + (0.01 * (counter % 100));
 8002758:	8abb      	ldrh	r3, [r7, #20]
 800275a:	4a5b      	ldr	r2, [pc, #364]	@ (80028c8 <MockMeasurmetsTask+0x628>)
 800275c:	fba2 1203 	umull	r1, r2, r2, r3
 8002760:	0952      	lsrs	r2, r2, #5
 8002762:	2164      	movs	r1, #100	@ 0x64
 8002764:	fb01 f202 	mul.w	r2, r1, r2
 8002768:	1a9b      	subs	r3, r3, r2
 800276a:	b29b      	uxth	r3, r3
 800276c:	ee07 3a90 	vmov	s15, r3
 8002770:	eeb8 7be7 	vcvt.f64.s32	d7, s15
 8002774:	ed9f 6b50 	vldr	d6, [pc, #320]	@ 80028b8 <MockMeasurmetsTask+0x618>
 8002778:	ee27 7b06 	vmul.f64	d7, d7, d6
 800277c:	eeb0 6b08 	vmov.f64	d6, #8	@ 0x40400000  3.0
 8002780:	ee37 7b06 	vadd.f64	d7, d7, d6
 8002784:	eef7 7bc7 	vcvt.f32.f64	s15, d7
 8002788:	68fb      	ldr	r3, [r7, #12]
 800278a:	edc3 7a06 	vstr	s15, [r3, #24]
			sensors->motorXPeakCurrent = 6 + (0.01 * (counter % 100));
 800278e:	8abb      	ldrh	r3, [r7, #20]
 8002790:	4a4d      	ldr	r2, [pc, #308]	@ (80028c8 <MockMeasurmetsTask+0x628>)
 8002792:	fba2 1203 	umull	r1, r2, r2, r3
 8002796:	0952      	lsrs	r2, r2, #5
 8002798:	2164      	movs	r1, #100	@ 0x64
 800279a:	fb01 f202 	mul.w	r2, r1, r2
 800279e:	1a9b      	subs	r3, r3, r2
 80027a0:	b29b      	uxth	r3, r3
 80027a2:	ee07 3a90 	vmov	s15, r3
 80027a6:	eeb8 7be7 	vcvt.f64.s32	d7, s15
 80027aa:	ed9f 6b43 	vldr	d6, [pc, #268]	@ 80028b8 <MockMeasurmetsTask+0x618>
 80027ae:	ee27 7b06 	vmul.f64	d7, d7, d6
 80027b2:	eeb1 6b08 	vmov.f64	d6, #24	@ 0x40c00000  6.0
 80027b6:	ee37 7b06 	vadd.f64	d7, d7, d6
 80027ba:	eef7 7bc7 	vcvt.f32.f64	s15, d7
 80027be:	68fb      	ldr	r3, [r7, #12]
 80027c0:	edc3 7a07 	vstr	s15, [r3, #28]
			sensors->motorYPeakCurrent = 6 + (0.01 * (counter % 100));
 80027c4:	8abb      	ldrh	r3, [r7, #20]
 80027c6:	4a40      	ldr	r2, [pc, #256]	@ (80028c8 <MockMeasurmetsTask+0x628>)
 80027c8:	fba2 1203 	umull	r1, r2, r2, r3
 80027cc:	0952      	lsrs	r2, r2, #5
 80027ce:	2164      	movs	r1, #100	@ 0x64
 80027d0:	fb01 f202 	mul.w	r2, r1, r2
 80027d4:	1a9b      	subs	r3, r3, r2
 80027d6:	b29b      	uxth	r3, r3
 80027d8:	ee07 3a90 	vmov	s15, r3
 80027dc:	eeb8 7be7 	vcvt.f64.s32	d7, s15
 80027e0:	ed9f 6b35 	vldr	d6, [pc, #212]	@ 80028b8 <MockMeasurmetsTask+0x618>
 80027e4:	ee27 7b06 	vmul.f64	d7, d7, d6
 80027e8:	eeb1 6b08 	vmov.f64	d6, #24	@ 0x40c00000  6.0
 80027ec:	ee37 7b06 	vadd.f64	d7, d7, d6
 80027f0:	eef7 7bc7 	vcvt.f32.f64	s15, d7
 80027f4:	68fb      	ldr	r3, [r7, #12]
 80027f6:	edc3 7a08 	vstr	s15, [r3, #32]
			sensors->limitSwitchUp = (counter % 100) > 50 ? 1 : 0;
 80027fa:	8abb      	ldrh	r3, [r7, #20]
 80027fc:	4a32      	ldr	r2, [pc, #200]	@ (80028c8 <MockMeasurmetsTask+0x628>)
 80027fe:	fba2 1203 	umull	r1, r2, r2, r3
 8002802:	0952      	lsrs	r2, r2, #5
 8002804:	2164      	movs	r1, #100	@ 0x64
 8002806:	fb01 f202 	mul.w	r2, r1, r2
 800280a:	1a9b      	subs	r3, r3, r2
 800280c:	b29b      	uxth	r3, r3
 800280e:	2b32      	cmp	r3, #50	@ 0x32
 8002810:	bf8c      	ite	hi
 8002812:	2301      	movhi	r3, #1
 8002814:	2300      	movls	r3, #0
 8002816:	b2db      	uxtb	r3, r3
 8002818:	461a      	mov	r2, r3
 800281a:	68fb      	ldr	r3, [r7, #12]
 800281c:	f883 2024 	strb.w	r2, [r3, #36]	@ 0x24
			sensors->limitSwitchDown = (counter % 100) < 25 ? 1 : 0;
 8002820:	8abb      	ldrh	r3, [r7, #20]
 8002822:	4a29      	ldr	r2, [pc, #164]	@ (80028c8 <MockMeasurmetsTask+0x628>)
 8002824:	fba2 1203 	umull	r1, r2, r2, r3
 8002828:	0952      	lsrs	r2, r2, #5
 800282a:	2164      	movs	r1, #100	@ 0x64
 800282c:	fb01 f202 	mul.w	r2, r1, r2
 8002830:	1a9b      	subs	r3, r3, r2
 8002832:	b29b      	uxth	r3, r3
 8002834:	2b18      	cmp	r3, #24
 8002836:	bf94      	ite	ls
 8002838:	2301      	movls	r3, #1
 800283a:	2300      	movhi	r3, #0
 800283c:	b2db      	uxtb	r3, r3
 800283e:	461a      	mov	r2, r3
 8002840:	68fb      	ldr	r3, [r7, #12]
 8002842:	f883 2025 	strb.w	r2, [r3, #37]	@ 0x25
			sensors->limitSwitchCenter = (counter % 100) > 35 ? 1 : 0;
 8002846:	8abb      	ldrh	r3, [r7, #20]
 8002848:	4a1f      	ldr	r2, [pc, #124]	@ (80028c8 <MockMeasurmetsTask+0x628>)
 800284a:	fba2 1203 	umull	r1, r2, r2, r3
 800284e:	0952      	lsrs	r2, r2, #5
 8002850:	2164      	movs	r1, #100	@ 0x64
 8002852:	fb01 f202 	mul.w	r2, r1, r2
 8002856:	1a9b      	subs	r3, r3, r2
 8002858:	b29b      	uxth	r3, r3
 800285a:	2b23      	cmp	r3, #35	@ 0x23
 800285c:	bf8c      	ite	hi
 800285e:	2301      	movhi	r3, #1
 8002860:	2300      	movls	r3, #0
 8002862:	b2db      	uxtb	r3, r3
 8002864:	461a      	mov	r2, r3
 8002866:	68fb      	ldr	r3, [r7, #12]
 8002868:	f883 2026 	strb.w	r2, [r3, #38]	@ 0x26
			sensors->powerSupplyFailMask = 0;
 800286c:	68fb      	ldr	r3, [r7, #12]
 800286e:	2200      	movs	r2, #0
 8002870:	f883 2027 	strb.w	r2, [r3, #39]	@ 0x27
		for( boardNumber = 0; boardNumber < SLAVES_COUNT; boardNumber++)
 8002874:	7dfb      	ldrb	r3, [r7, #23]
 8002876:	3301      	adds	r3, #1
 8002878:	75fb      	strb	r3, [r7, #23]
 800287a:	7dfb      	ldrb	r3, [r7, #23]
 800287c:	2b03      	cmp	r3, #3
 800287e:	f67f ad23 	bls.w	80022c8 <MockMeasurmetsTask+0x28>
		}
    	osMutexRelease(resMeasurementsMutex);
 8002882:	4b12      	ldr	r3, [pc, #72]	@ (80028cc <MockMeasurmetsTask+0x62c>)
 8002884:	681b      	ldr	r3, [r3, #0]
 8002886:	4618      	mov	r0, r3
 8002888:	f00d ff07 	bl	801069a <osMutexRelease>
    	osMutexAcquire (sensorsInfoMutex, osWaitForever);
 800288c:	4b10      	ldr	r3, [pc, #64]	@ (80028d0 <MockMeasurmetsTask+0x630>)
 800288e:	681b      	ldr	r3, [r3, #0]
 8002890:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 8002894:	4618      	mov	r0, r3
 8002896:	f00d feb5 	bl	8010604 <osMutexAcquire>
    	osMutexRelease(sensorsInfoMutex);
 800289a:	4b0d      	ldr	r3, [pc, #52]	@ (80028d0 <MockMeasurmetsTask+0x630>)
 800289c:	681b      	ldr	r3, [r3, #0]
 800289e:	4618      	mov	r0, r3
 80028a0:	f00d fefb 	bl	801069a <osMutexRelease>
    	counter++;
 80028a4:	8abb      	ldrh	r3, [r7, #20]
 80028a6:	3301      	adds	r3, #1
 80028a8:	82bb      	strh	r3, [r7, #20]
        osDelay (pdMS_TO_TICKS (1000));
 80028aa:	f44f 707a 	mov.w	r0, #1000	@ 0x3e8
 80028ae:	f00d fe08 	bl	80104c2 <osDelay>
    	osMutexAcquire (resMeasurementsMutex, osWaitForever);
 80028b2:	e4fd      	b.n	80022b0 <MockMeasurmetsTask+0x10>
 80028b4:	f3af 8000 	nop.w
 80028b8:	47ae147b 	.word	0x47ae147b
 80028bc:	3f847ae1 	.word	0x3f847ae1
 80028c0:	00000000 	.word	0x00000000
 80028c4:	40498000 	.word	0x40498000
 80028c8:	51eb851f 	.word	0x51eb851f
 80028cc:	24000594 	.word	0x24000594
 80028d0:	24000598 	.word	0x24000598

080028d4 <MqttClientSubTask>:
void MqttClientSubTask(void *argument); //mqtt client subscribe task function
void MqttClientPubTask(void *argument); //mqtt client publish task function
int MqttConnectBroker(void); 				//mqtt broker connect function
void MqttMessageArrived(MessageData *msg); //mqtt message callback function

void MqttClientSubTask (void* argument) {
 80028d4:	b580      	push	{r7, lr}
 80028d6:	b082      	sub	sp, #8
 80028d8:	af00      	add	r7, sp, #0
 80028da:	6078      	str	r0, [r7, #4]
    while (1) {
        // waiting for valid ip address
        if (gnetif.ip_addr.addr == 0 || gnetif.netmask.addr == 0 || gnetif.gw.addr == 0) // system has no valid ip address
 80028dc:	4b16      	ldr	r3, [pc, #88]	@ (8002938 <MqttClientSubTask+0x64>)
 80028de:	685b      	ldr	r3, [r3, #4]
 80028e0:	2b00      	cmp	r3, #0
 80028e2:	d007      	beq.n	80028f4 <MqttClientSubTask+0x20>
 80028e4:	4b14      	ldr	r3, [pc, #80]	@ (8002938 <MqttClientSubTask+0x64>)
 80028e6:	689b      	ldr	r3, [r3, #8]
 80028e8:	2b00      	cmp	r3, #0
 80028ea:	d003      	beq.n	80028f4 <MqttClientSubTask+0x20>
 80028ec:	4b12      	ldr	r3, [pc, #72]	@ (8002938 <MqttClientSubTask+0x64>)
 80028ee:	68db      	ldr	r3, [r3, #12]
 80028f0:	2b00      	cmp	r3, #0
 80028f2:	d104      	bne.n	80028fe <MqttClientSubTask+0x2a>
        {
            osDelay (pdMS_TO_TICKS (1000));
 80028f4:	f44f 707a 	mov.w	r0, #1000	@ 0x3e8
 80028f8:	f00d fde3 	bl	80104c2 <osDelay>
            continue;
 80028fc:	e003      	b.n	8002906 <MqttClientSubTask+0x32>
        } else {
            printf ("DHCP/Static IP O.K.\n");
 80028fe:	480f      	ldr	r0, [pc, #60]	@ (800293c <MqttClientSubTask+0x68>)
 8002900:	f026 fe6c 	bl	80295dc <puts>
            break;
 8002904:	e000      	b.n	8002908 <MqttClientSubTask+0x34>
        if (gnetif.ip_addr.addr == 0 || gnetif.netmask.addr == 0 || gnetif.gw.addr == 0) // system has no valid ip address
 8002906:	e7e9      	b.n	80028dc <MqttClientSubTask+0x8>
        }
    }

    while (1) {
        if (!mqttClient.isconnected) {
 8002908:	4b0d      	ldr	r3, [pc, #52]	@ (8002940 <MqttClientSubTask+0x6c>)
 800290a:	6a1b      	ldr	r3, [r3, #32]
 800290c:	2b00      	cmp	r3, #0
 800290e:	d109      	bne.n	8002924 <MqttClientSubTask+0x50>
            // try to connect to the broker
            if (MqttConnectBroker () != MQTT_SUCCESS) {
 8002910:	f000 fb10 	bl	8002f34 <MqttConnectBroker>
 8002914:	4603      	mov	r3, r0
 8002916:	2b00      	cmp	r3, #0
 8002918:	d0f6      	beq.n	8002908 <MqttClientSubTask+0x34>
                osDelay (pdMS_TO_TICKS (1000));
 800291a:	f44f 707a 	mov.w	r0, #1000	@ 0x3e8
 800291e:	f00d fdd0 	bl	80104c2 <osDelay>
 8002922:	e7f1      	b.n	8002908 <MqttClientSubTask+0x34>
            }
        } else {
            MQTTYield (&mqttClient, 500); // handle timer
 8002924:	f44f 71fa 	mov.w	r1, #500	@ 0x1f4
 8002928:	4805      	ldr	r0, [pc, #20]	@ (8002940 <MqttClientSubTask+0x6c>)
 800292a:	f023 ff59 	bl	80267e0 <MQTTYield>
            osDelay (pdMS_TO_TICKS (100));
 800292e:	2064      	movs	r0, #100	@ 0x64
 8002930:	f00d fdc7 	bl	80104c2 <osDelay>
        if (!mqttClient.isconnected) {
 8002934:	e7e8      	b.n	8002908 <MqttClientSubTask+0x34>
 8002936:	bf00      	nop
 8002938:	240012d8 	.word	0x240012d8
 800293c:	0802c0b0 	.word	0x0802c0b0
 8002940:	240005b4 	.word	0x240005b4

08002944 <MqttClientPubTask>:
        }
    }
}

void MqttClientPubTask (void* argument) {
 8002944:	b580      	push	{r7, lr}
 8002946:	f5ad 7d16 	sub.w	sp, sp, #600	@ 0x258
 800294a:	af04      	add	r7, sp, #16
 800294c:	f507 7312 	add.w	r3, r7, #584	@ 0x248
 8002950:	f5a3 7311 	sub.w	r3, r3, #580	@ 0x244
 8002954:	6018      	str	r0, [r3, #0]
    char messageBuffer[512]  = { 0x00 };
 8002956:	f507 7312 	add.w	r3, r7, #584	@ 0x248
 800295a:	f5a3 7304 	sub.w	r3, r3, #528	@ 0x210
 800295e:	2200      	movs	r2, #0
 8002960:	601a      	str	r2, [r3, #0]
 8002962:	3304      	adds	r3, #4
 8002964:	f44f 72fe 	mov.w	r2, #508	@ 0x1fc
 8002968:	2100      	movs	r1, #0
 800296a:	4618      	mov	r0, r3
 800296c:	f026 ff60 	bl	8029830 <memset>
    char topicTextBuffer[32] = { 0x00 };
 8002970:	f507 7312 	add.w	r3, r7, #584	@ 0x248
 8002974:	f5a3 730c 	sub.w	r3, r3, #560	@ 0x230
 8002978:	2200      	movs	r2, #0
 800297a:	601a      	str	r2, [r3, #0]
 800297c:	3304      	adds	r3, #4
 800297e:	2200      	movs	r2, #0
 8002980:	601a      	str	r2, [r3, #0]
 8002982:	605a      	str	r2, [r3, #4]
 8002984:	609a      	str	r2, [r3, #8]
 8002986:	60da      	str	r2, [r3, #12]
 8002988:	611a      	str	r2, [r3, #16]
 800298a:	615a      	str	r2, [r3, #20]
 800298c:	619a      	str	r2, [r3, #24]
    uint32_t bytesInBuffer   = 0;
 800298e:	2300      	movs	r3, #0
 8002990:	f8c7 3240 	str.w	r3, [r7, #576]	@ 0x240
    uint8_t boardNumber      = 0;
 8002994:	2300      	movs	r3, #0
 8002996:	f887 3247 	strb.w	r3, [r7, #583]	@ 0x247
    MQTTMessage message;

    resMeasurementsMutex = osMutexNew (NULL);
 800299a:	2000      	movs	r0, #0
 800299c:	f00d fdac 	bl	80104f8 <osMutexNew>
 80029a0:	4603      	mov	r3, r0
 80029a2:	4a97      	ldr	r2, [pc, #604]	@ (8002c00 <MqttClientPubTask+0x2bc>)
 80029a4:	6013      	str	r3, [r2, #0]
    sensorsInfoMutex     = osMutexNew (NULL);
 80029a6:	2000      	movs	r0, #0
 80029a8:	f00d fda6 	bl	80104f8 <osMutexNew>
 80029ac:	4603      	mov	r3, r0
 80029ae:	4a95      	ldr	r2, [pc, #596]	@ (8002c04 <MqttClientPubTask+0x2c0>)
 80029b0:	6013      	str	r3, [r2, #0]

    while (1) {
        if (mqttClient.isconnected) {
 80029b2:	4b95      	ldr	r3, [pc, #596]	@ (8002c08 <MqttClientPubTask+0x2c4>)
 80029b4:	6a1b      	ldr	r3, [r3, #32]
 80029b6:	2b00      	cmp	r3, #0
 80029b8:	f000 8295 	beq.w	8002ee6 <MqttClientPubTask+0x5a2>
            if (is_link_up ()) {
 80029bc:	f00c fdae 	bl	800f51c <is_link_up>
 80029c0:	4603      	mov	r3, r0
 80029c2:	2b00      	cmp	r3, #0
 80029c4:	f000 828f 	beq.w	8002ee6 <MqttClientPubTask+0x5a2>
                for (boardNumber = 0; boardNumber < SLAVES_COUNT; boardNumber++) {
 80029c8:	2300      	movs	r3, #0
 80029ca:	f887 3247 	strb.w	r3, [r7, #583]	@ 0x247
 80029ce:	e10e      	b.n	8002bee <MqttClientPubTask+0x2aa>
                    osMutexAcquire (resMeasurementsMutex, osWaitForever);
 80029d0:	4b8b      	ldr	r3, [pc, #556]	@ (8002c00 <MqttClientPubTask+0x2bc>)
 80029d2:	681b      	ldr	r3, [r3, #0]
 80029d4:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 80029d8:	4618      	mov	r0, r3
 80029da:	f00d fe13 	bl	8010604 <osMutexAcquire>
                    RESMeasurements* resMeas = &resMeasurements[boardNumber];
 80029de:	f897 2247 	ldrb.w	r2, [r7, #583]	@ 0x247
 80029e2:	4613      	mov	r3, r2
 80029e4:	011b      	lsls	r3, r3, #4
 80029e6:	1a9b      	subs	r3, r3, r2
 80029e8:	009b      	lsls	r3, r3, #2
 80029ea:	4a88      	ldr	r2, [pc, #544]	@ (8002c0c <MqttClientPubTask+0x2c8>)
 80029ec:	4413      	add	r3, r2
 80029ee:	f8c7 3238 	str.w	r3, [r7, #568]	@ 0x238
                    sprintf (topicTextBuffer, "RESmeasurments/%d", boardNumber + 1);
 80029f2:	f897 3247 	ldrb.w	r3, [r7, #583]	@ 0x247
 80029f6:	1c5a      	adds	r2, r3, #1
 80029f8:	f107 0318 	add.w	r3, r7, #24
 80029fc:	4984      	ldr	r1, [pc, #528]	@ (8002c10 <MqttClientPubTask+0x2cc>)
 80029fe:	4618      	mov	r0, r3
 8002a00:	f026 fdf4 	bl	80295ec <siprintf>
                    bytesInBuffer = sprintf (messageBuffer, "{\"voltageRMS\":[%.2f, %.2f, %.2f], ", resMeas->voltageRMS[0], resMeas->voltageRMS[1], resMeas->voltageRMS[2]);
 8002a04:	f8d7 3238 	ldr.w	r3, [r7, #568]	@ 0x238
 8002a08:	edd3 7a00 	vldr	s15, [r3]
 8002a0c:	eeb7 5ae7 	vcvt.f64.f32	d5, s15
 8002a10:	f8d7 3238 	ldr.w	r3, [r7, #568]	@ 0x238
 8002a14:	edd3 7a01 	vldr	s15, [r3, #4]
 8002a18:	eeb7 7ae7 	vcvt.f64.f32	d7, s15
 8002a1c:	f8d7 3238 	ldr.w	r3, [r7, #568]	@ 0x238
 8002a20:	edd3 6a02 	vldr	s13, [r3, #8]
 8002a24:	eeb7 6ae6 	vcvt.f64.f32	d6, s13
 8002a28:	f107 0038 	add.w	r0, r7, #56	@ 0x38
 8002a2c:	ed8d 6b02 	vstr	d6, [sp, #8]
 8002a30:	ed8d 7b00 	vstr	d7, [sp]
 8002a34:	ec53 2b15 	vmov	r2, r3, d5
 8002a38:	4976      	ldr	r1, [pc, #472]	@ (8002c14 <MqttClientPubTask+0x2d0>)
 8002a3a:	f026 fdd7 	bl	80295ec <siprintf>
 8002a3e:	4603      	mov	r3, r0
 8002a40:	f8c7 3240 	str.w	r3, [r7, #576]	@ 0x240
                    bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"voltagePeak\":[%.2f, %.2f, %.2f], ", resMeas->voltagePeak[0], resMeas->voltagePeak[1], resMeas->voltagePeak[2]);
 8002a44:	f107 0238 	add.w	r2, r7, #56	@ 0x38
 8002a48:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002a4c:	18d0      	adds	r0, r2, r3
 8002a4e:	f8d7 3238 	ldr.w	r3, [r7, #568]	@ 0x238
 8002a52:	edd3 7a03 	vldr	s15, [r3, #12]
 8002a56:	eeb7 5ae7 	vcvt.f64.f32	d5, s15
 8002a5a:	f8d7 3238 	ldr.w	r3, [r7, #568]	@ 0x238
 8002a5e:	edd3 7a04 	vldr	s15, [r3, #16]
 8002a62:	eeb7 7ae7 	vcvt.f64.f32	d7, s15
 8002a66:	f8d7 3238 	ldr.w	r3, [r7, #568]	@ 0x238
 8002a6a:	edd3 6a05 	vldr	s13, [r3, #20]
 8002a6e:	eeb7 6ae6 	vcvt.f64.f32	d6, s13
 8002a72:	ed8d 6b02 	vstr	d6, [sp, #8]
 8002a76:	ed8d 7b00 	vstr	d7, [sp]
 8002a7a:	ec53 2b15 	vmov	r2, r3, d5
 8002a7e:	4966      	ldr	r1, [pc, #408]	@ (8002c18 <MqttClientPubTask+0x2d4>)
 8002a80:	f026 fdb4 	bl	80295ec <siprintf>
 8002a84:	4603      	mov	r3, r0
 8002a86:	461a      	mov	r2, r3
 8002a88:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002a8c:	4413      	add	r3, r2
 8002a8e:	f8c7 3240 	str.w	r3, [r7, #576]	@ 0x240
                    bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"currentRMS\":[%.3f, %.3f, %.3f], ", resMeas->currentRMS[0], resMeas->currentRMS[1], resMeas->currentRMS[2]);
 8002a92:	f107 0238 	add.w	r2, r7, #56	@ 0x38
 8002a96:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002a9a:	18d0      	adds	r0, r2, r3
 8002a9c:	f8d7 3238 	ldr.w	r3, [r7, #568]	@ 0x238
 8002aa0:	edd3 7a06 	vldr	s15, [r3, #24]
 8002aa4:	eeb7 5ae7 	vcvt.f64.f32	d5, s15
 8002aa8:	f8d7 3238 	ldr.w	r3, [r7, #568]	@ 0x238
 8002aac:	edd3 7a07 	vldr	s15, [r3, #28]
 8002ab0:	eeb7 7ae7 	vcvt.f64.f32	d7, s15
 8002ab4:	f8d7 3238 	ldr.w	r3, [r7, #568]	@ 0x238
 8002ab8:	edd3 6a08 	vldr	s13, [r3, #32]
 8002abc:	eeb7 6ae6 	vcvt.f64.f32	d6, s13
 8002ac0:	ed8d 6b02 	vstr	d6, [sp, #8]
 8002ac4:	ed8d 7b00 	vstr	d7, [sp]
 8002ac8:	ec53 2b15 	vmov	r2, r3, d5
 8002acc:	4953      	ldr	r1, [pc, #332]	@ (8002c1c <MqttClientPubTask+0x2d8>)
 8002ace:	f026 fd8d 	bl	80295ec <siprintf>
 8002ad2:	4603      	mov	r3, r0
 8002ad4:	461a      	mov	r2, r3
 8002ad6:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002ada:	4413      	add	r3, r2
 8002adc:	f8c7 3240 	str.w	r3, [r7, #576]	@ 0x240
                    bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"currentPeak\":[%.3f, %.3f, %.3f], ", resMeas->currentPeak[0], resMeas->currentPeak[1], resMeas->currentPeak[2]);
 8002ae0:	f107 0238 	add.w	r2, r7, #56	@ 0x38
 8002ae4:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002ae8:	18d0      	adds	r0, r2, r3
 8002aea:	f8d7 3238 	ldr.w	r3, [r7, #568]	@ 0x238
 8002aee:	edd3 7a09 	vldr	s15, [r3, #36]	@ 0x24
 8002af2:	eeb7 5ae7 	vcvt.f64.f32	d5, s15
 8002af6:	f8d7 3238 	ldr.w	r3, [r7, #568]	@ 0x238
 8002afa:	edd3 7a0a 	vldr	s15, [r3, #40]	@ 0x28
 8002afe:	eeb7 7ae7 	vcvt.f64.f32	d7, s15
 8002b02:	f8d7 3238 	ldr.w	r3, [r7, #568]	@ 0x238
 8002b06:	edd3 6a0b 	vldr	s13, [r3, #44]	@ 0x2c
 8002b0a:	eeb7 6ae6 	vcvt.f64.f32	d6, s13
 8002b0e:	ed8d 6b02 	vstr	d6, [sp, #8]
 8002b12:	ed8d 7b00 	vstr	d7, [sp]
 8002b16:	ec53 2b15 	vmov	r2, r3, d5
 8002b1a:	4941      	ldr	r1, [pc, #260]	@ (8002c20 <MqttClientPubTask+0x2dc>)
 8002b1c:	f026 fd66 	bl	80295ec <siprintf>
 8002b20:	4603      	mov	r3, r0
 8002b22:	461a      	mov	r2, r3
 8002b24:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002b28:	4413      	add	r3, r2
 8002b2a:	f8c7 3240 	str.w	r3, [r7, #576]	@ 0x240
                    bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"power\":[%.2f, %.2f, %.2f], ", resMeas->power[0], resMeas->power[1], resMeas->power[2]);
 8002b2e:	f107 0238 	add.w	r2, r7, #56	@ 0x38
 8002b32:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002b36:	18d0      	adds	r0, r2, r3
 8002b38:	f8d7 3238 	ldr.w	r3, [r7, #568]	@ 0x238
 8002b3c:	edd3 7a0c 	vldr	s15, [r3, #48]	@ 0x30
 8002b40:	eeb7 5ae7 	vcvt.f64.f32	d5, s15
 8002b44:	f8d7 3238 	ldr.w	r3, [r7, #568]	@ 0x238
 8002b48:	edd3 7a0d 	vldr	s15, [r3, #52]	@ 0x34
 8002b4c:	eeb7 7ae7 	vcvt.f64.f32	d7, s15
 8002b50:	f8d7 3238 	ldr.w	r3, [r7, #568]	@ 0x238
 8002b54:	edd3 6a0e 	vldr	s13, [r3, #56]	@ 0x38
 8002b58:	eeb7 6ae6 	vcvt.f64.f32	d6, s13
 8002b5c:	ed8d 6b02 	vstr	d6, [sp, #8]
 8002b60:	ed8d 7b00 	vstr	d7, [sp]
 8002b64:	ec53 2b15 	vmov	r2, r3, d5
 8002b68:	492e      	ldr	r1, [pc, #184]	@ (8002c24 <MqttClientPubTask+0x2e0>)
 8002b6a:	f026 fd3f 	bl	80295ec <siprintf>
 8002b6e:	4603      	mov	r3, r0
 8002b70:	461a      	mov	r2, r3
 8002b72:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002b76:	4413      	add	r3, r2
 8002b78:	f8c7 3240 	str.w	r3, [r7, #576]	@ 0x240
                    bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"lastSeen\": %ld}", lastSeen[boardNumber]);
 8002b7c:	f107 0238 	add.w	r2, r7, #56	@ 0x38
 8002b80:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002b84:	18d0      	adds	r0, r2, r3
 8002b86:	f897 3247 	ldrb.w	r3, [r7, #583]	@ 0x247
 8002b8a:	4a27      	ldr	r2, [pc, #156]	@ (8002c28 <MqttClientPubTask+0x2e4>)
 8002b8c:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
 8002b90:	461a      	mov	r2, r3
 8002b92:	4926      	ldr	r1, [pc, #152]	@ (8002c2c <MqttClientPubTask+0x2e8>)
 8002b94:	f026 fd2a 	bl	80295ec <siprintf>
 8002b98:	4603      	mov	r3, r0
 8002b9a:	461a      	mov	r2, r3
 8002b9c:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002ba0:	4413      	add	r3, r2
 8002ba2:	f8c7 3240 	str.w	r3, [r7, #576]	@ 0x240
                    osMutexRelease (resMeasurementsMutex);
 8002ba6:	4b16      	ldr	r3, [pc, #88]	@ (8002c00 <MqttClientPubTask+0x2bc>)
 8002ba8:	681b      	ldr	r3, [r3, #0]
 8002baa:	4618      	mov	r0, r3
 8002bac:	f00d fd75 	bl	801069a <osMutexRelease>
                    message.payload    = (void*)messageBuffer;
 8002bb0:	f507 7312 	add.w	r3, r7, #584	@ 0x248
 8002bb4:	f5a3 7310 	sub.w	r3, r3, #576	@ 0x240
 8002bb8:	f107 0238 	add.w	r2, r7, #56	@ 0x38
 8002bbc:	609a      	str	r2, [r3, #8]
                    message.payloadlen = strlen (messageBuffer);
 8002bbe:	f107 0338 	add.w	r3, r7, #56	@ 0x38
 8002bc2:	4618      	mov	r0, r3
 8002bc4:	f7fd fbec 	bl	80003a0 <strlen>
 8002bc8:	4602      	mov	r2, r0
 8002bca:	f507 7312 	add.w	r3, r7, #584	@ 0x248
 8002bce:	f5a3 7310 	sub.w	r3, r3, #576	@ 0x240
 8002bd2:	60da      	str	r2, [r3, #12]
                    MQTTPublish (&mqttClient, topicTextBuffer, &message); // publish a message
 8002bd4:	f107 0208 	add.w	r2, r7, #8
 8002bd8:	f107 0318 	add.w	r3, r7, #24
 8002bdc:	4619      	mov	r1, r3
 8002bde:	480a      	ldr	r0, [pc, #40]	@ (8002c08 <MqttClientPubTask+0x2c4>)
 8002be0:	f024 f81d 	bl	8026c1e <MQTTPublish>
                for (boardNumber = 0; boardNumber < SLAVES_COUNT; boardNumber++) {
 8002be4:	f897 3247 	ldrb.w	r3, [r7, #583]	@ 0x247
 8002be8:	3301      	adds	r3, #1
 8002bea:	f887 3247 	strb.w	r3, [r7, #583]	@ 0x247
 8002bee:	f897 3247 	ldrb.w	r3, [r7, #583]	@ 0x247
 8002bf2:	2b03      	cmp	r3, #3
 8002bf4:	f67f aeec 	bls.w	80029d0 <MqttClientPubTask+0x8c>
                }

                for (boardNumber = 0; boardNumber < SLAVES_COUNT; boardNumber++) {
 8002bf8:	2300      	movs	r3, #0
 8002bfa:	f887 3247 	strb.w	r3, [r7, #583]	@ 0x247
 8002bfe:	e16d      	b.n	8002edc <MqttClientPubTask+0x598>
 8002c00:	24000594 	.word	0x24000594
 8002c04:	24000598 	.word	0x24000598
 8002c08:	240005b4 	.word	0x240005b4
 8002c0c:	24000404 	.word	0x24000404
 8002c10:	0802c0c4 	.word	0x0802c0c4
 8002c14:	0802c0d8 	.word	0x0802c0d8
 8002c18:	0802c0fc 	.word	0x0802c0fc
 8002c1c:	0802c120 	.word	0x0802c120
 8002c20:	0802c144 	.word	0x0802c144
 8002c24:	0802c168 	.word	0x0802c168
 8002c28:	240003f4 	.word	0x240003f4
 8002c2c:	0802c188 	.word	0x0802c188
                    osMutexAcquire (sensorsInfoMutex, osWaitForever);
 8002c30:	4baf      	ldr	r3, [pc, #700]	@ (8002ef0 <MqttClientPubTask+0x5ac>)
 8002c32:	681b      	ldr	r3, [r3, #0]
 8002c34:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 8002c38:	4618      	mov	r0, r3
 8002c3a:	f00d fce3 	bl	8010604 <osMutexAcquire>
                    SesnorsInfo* sensors = &sensorsInfo[boardNumber];
 8002c3e:	f897 2247 	ldrb.w	r2, [r7, #583]	@ 0x247
 8002c42:	4613      	mov	r3, r2
 8002c44:	009b      	lsls	r3, r3, #2
 8002c46:	4413      	add	r3, r2
 8002c48:	00db      	lsls	r3, r3, #3
 8002c4a:	4aaa      	ldr	r2, [pc, #680]	@ (8002ef4 <MqttClientPubTask+0x5b0>)
 8002c4c:	4413      	add	r3, r2
 8002c4e:	f8c7 323c 	str.w	r3, [r7, #572]	@ 0x23c
                    sprintf (topicTextBuffer, "Sensors/%d", boardNumber + 1);
 8002c52:	f897 3247 	ldrb.w	r3, [r7, #583]	@ 0x247
 8002c56:	1c5a      	adds	r2, r3, #1
 8002c58:	f107 0318 	add.w	r3, r7, #24
 8002c5c:	49a6      	ldr	r1, [pc, #664]	@ (8002ef8 <MqttClientPubTask+0x5b4>)
 8002c5e:	4618      	mov	r0, r3
 8002c60:	f026 fcc4 	bl	80295ec <siprintf>
                    bytesInBuffer = sprintf (messageBuffer, "{\"pvTemperature\":[%.1f, %.1f], ", sensors->pvTemperature[0], sensors->pvTemperature[1]);
 8002c64:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 8002c68:	edd3 7a00 	vldr	s15, [r3]
 8002c6c:	eeb7 6ae7 	vcvt.f64.f32	d6, s15
 8002c70:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 8002c74:	edd3 7a01 	vldr	s15, [r3, #4]
 8002c78:	eeb7 7ae7 	vcvt.f64.f32	d7, s15
 8002c7c:	f107 0038 	add.w	r0, r7, #56	@ 0x38
 8002c80:	ed8d 7b00 	vstr	d7, [sp]
 8002c84:	ec53 2b16 	vmov	r2, r3, d6
 8002c88:	499c      	ldr	r1, [pc, #624]	@ (8002efc <MqttClientPubTask+0x5b8>)
 8002c8a:	f026 fcaf 	bl	80295ec <siprintf>
 8002c8e:	4603      	mov	r3, r0
 8002c90:	f8c7 3240 	str.w	r3, [r7, #576]	@ 0x240
                    bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"fanVoltage\":%.2f, ", sensors->fanVoltage);
 8002c94:	f107 0238 	add.w	r2, r7, #56	@ 0x38
 8002c98:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002c9c:	18d0      	adds	r0, r2, r3
 8002c9e:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 8002ca2:	edd3 7a02 	vldr	s15, [r3, #8]
 8002ca6:	eeb7 7ae7 	vcvt.f64.f32	d7, s15
 8002caa:	ec53 2b17 	vmov	r2, r3, d7
 8002cae:	4994      	ldr	r1, [pc, #592]	@ (8002f00 <MqttClientPubTask+0x5bc>)
 8002cb0:	f026 fc9c 	bl	80295ec <siprintf>
 8002cb4:	4603      	mov	r3, r0
 8002cb6:	461a      	mov	r2, r3
 8002cb8:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002cbc:	4413      	add	r3, r2
 8002cbe:	f8c7 3240 	str.w	r3, [r7, #576]	@ 0x240
                    bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"pvEncoder\":%.2f, ", sensors->pvEncoder);
 8002cc2:	f107 0238 	add.w	r2, r7, #56	@ 0x38
 8002cc6:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002cca:	18d0      	adds	r0, r2, r3
 8002ccc:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 8002cd0:	edd3 7a03 	vldr	s15, [r3, #12]
 8002cd4:	eeb7 7ae7 	vcvt.f64.f32	d7, s15
 8002cd8:	ec53 2b17 	vmov	r2, r3, d7
 8002cdc:	4989      	ldr	r1, [pc, #548]	@ (8002f04 <MqttClientPubTask+0x5c0>)
 8002cde:	f026 fc85 	bl	80295ec <siprintf>
 8002ce2:	4603      	mov	r3, r0
 8002ce4:	461a      	mov	r2, r3
 8002ce6:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002cea:	4413      	add	r3, r2
 8002cec:	f8c7 3240 	str.w	r3, [r7, #576]	@ 0x240
                    bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"motorXStatus\":%d, ", sensors->motorXStatus);
 8002cf0:	f107 0238 	add.w	r2, r7, #56	@ 0x38
 8002cf4:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002cf8:	18d0      	adds	r0, r2, r3
 8002cfa:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 8002cfe:	7c1b      	ldrb	r3, [r3, #16]
 8002d00:	461a      	mov	r2, r3
 8002d02:	4981      	ldr	r1, [pc, #516]	@ (8002f08 <MqttClientPubTask+0x5c4>)
 8002d04:	f026 fc72 	bl	80295ec <siprintf>
 8002d08:	4603      	mov	r3, r0
 8002d0a:	461a      	mov	r2, r3
 8002d0c:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002d10:	4413      	add	r3, r2
 8002d12:	f8c7 3240 	str.w	r3, [r7, #576]	@ 0x240
                    bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"motorYStatus\":%d, ", sensors->motorYStatus);
 8002d16:	f107 0238 	add.w	r2, r7, #56	@ 0x38
 8002d1a:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002d1e:	18d0      	adds	r0, r2, r3
 8002d20:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 8002d24:	7c5b      	ldrb	r3, [r3, #17]
 8002d26:	461a      	mov	r2, r3
 8002d28:	4978      	ldr	r1, [pc, #480]	@ (8002f0c <MqttClientPubTask+0x5c8>)
 8002d2a:	f026 fc5f 	bl	80295ec <siprintf>
 8002d2e:	4603      	mov	r3, r0
 8002d30:	461a      	mov	r2, r3
 8002d32:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002d36:	4413      	add	r3, r2
 8002d38:	f8c7 3240 	str.w	r3, [r7, #576]	@ 0x240
                    bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"motorXAveCurrent\":%.3f, ", sensors->motorXAveCurrent);
 8002d3c:	f107 0238 	add.w	r2, r7, #56	@ 0x38
 8002d40:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002d44:	18d0      	adds	r0, r2, r3
 8002d46:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 8002d4a:	edd3 7a05 	vldr	s15, [r3, #20]
 8002d4e:	eeb7 7ae7 	vcvt.f64.f32	d7, s15
 8002d52:	ec53 2b17 	vmov	r2, r3, d7
 8002d56:	496e      	ldr	r1, [pc, #440]	@ (8002f10 <MqttClientPubTask+0x5cc>)
 8002d58:	f026 fc48 	bl	80295ec <siprintf>
 8002d5c:	4603      	mov	r3, r0
 8002d5e:	461a      	mov	r2, r3
 8002d60:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002d64:	4413      	add	r3, r2
 8002d66:	f8c7 3240 	str.w	r3, [r7, #576]	@ 0x240
                    bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"motorYAveCurrent\":%.3f, ", sensors->motorYAveCurrent);
 8002d6a:	f107 0238 	add.w	r2, r7, #56	@ 0x38
 8002d6e:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002d72:	18d0      	adds	r0, r2, r3
 8002d74:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 8002d78:	edd3 7a06 	vldr	s15, [r3, #24]
 8002d7c:	eeb7 7ae7 	vcvt.f64.f32	d7, s15
 8002d80:	ec53 2b17 	vmov	r2, r3, d7
 8002d84:	4963      	ldr	r1, [pc, #396]	@ (8002f14 <MqttClientPubTask+0x5d0>)
 8002d86:	f026 fc31 	bl	80295ec <siprintf>
 8002d8a:	4603      	mov	r3, r0
 8002d8c:	461a      	mov	r2, r3
 8002d8e:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002d92:	4413      	add	r3, r2
 8002d94:	f8c7 3240 	str.w	r3, [r7, #576]	@ 0x240
                    bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"motorXPeakCurrent\":%.3f, ", sensors->motorXPeakCurrent);
 8002d98:	f107 0238 	add.w	r2, r7, #56	@ 0x38
 8002d9c:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002da0:	18d0      	adds	r0, r2, r3
 8002da2:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 8002da6:	edd3 7a07 	vldr	s15, [r3, #28]
 8002daa:	eeb7 7ae7 	vcvt.f64.f32	d7, s15
 8002dae:	ec53 2b17 	vmov	r2, r3, d7
 8002db2:	4959      	ldr	r1, [pc, #356]	@ (8002f18 <MqttClientPubTask+0x5d4>)
 8002db4:	f026 fc1a 	bl	80295ec <siprintf>
 8002db8:	4603      	mov	r3, r0
 8002dba:	461a      	mov	r2, r3
 8002dbc:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002dc0:	4413      	add	r3, r2
 8002dc2:	f8c7 3240 	str.w	r3, [r7, #576]	@ 0x240
                    bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"motorYPeakCurrent\":%.3f, ", sensors->motorYPeakCurrent);
 8002dc6:	f107 0238 	add.w	r2, r7, #56	@ 0x38
 8002dca:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002dce:	18d0      	adds	r0, r2, r3
 8002dd0:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 8002dd4:	edd3 7a08 	vldr	s15, [r3, #32]
 8002dd8:	eeb7 7ae7 	vcvt.f64.f32	d7, s15
 8002ddc:	ec53 2b17 	vmov	r2, r3, d7
 8002de0:	494e      	ldr	r1, [pc, #312]	@ (8002f1c <MqttClientPubTask+0x5d8>)
 8002de2:	f026 fc03 	bl	80295ec <siprintf>
 8002de6:	4603      	mov	r3, r0
 8002de8:	461a      	mov	r2, r3
 8002dea:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002dee:	4413      	add	r3, r2
 8002df0:	f8c7 3240 	str.w	r3, [r7, #576]	@ 0x240
                    bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"limitSwitchUp\":%d, ", sensors->limitSwitchUp);
 8002df4:	f107 0238 	add.w	r2, r7, #56	@ 0x38
 8002df8:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002dfc:	18d0      	adds	r0, r2, r3
 8002dfe:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 8002e02:	f893 3024 	ldrb.w	r3, [r3, #36]	@ 0x24
 8002e06:	461a      	mov	r2, r3
 8002e08:	4945      	ldr	r1, [pc, #276]	@ (8002f20 <MqttClientPubTask+0x5dc>)
 8002e0a:	f026 fbef 	bl	80295ec <siprintf>
 8002e0e:	4603      	mov	r3, r0
 8002e10:	461a      	mov	r2, r3
 8002e12:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002e16:	4413      	add	r3, r2
 8002e18:	f8c7 3240 	str.w	r3, [r7, #576]	@ 0x240
                    bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"limitSwitchDown\":%d, ", sensors->limitSwitchDown);
 8002e1c:	f107 0238 	add.w	r2, r7, #56	@ 0x38
 8002e20:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002e24:	18d0      	adds	r0, r2, r3
 8002e26:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 8002e2a:	f893 3025 	ldrb.w	r3, [r3, #37]	@ 0x25
 8002e2e:	461a      	mov	r2, r3
 8002e30:	493c      	ldr	r1, [pc, #240]	@ (8002f24 <MqttClientPubTask+0x5e0>)
 8002e32:	f026 fbdb 	bl	80295ec <siprintf>
 8002e36:	4603      	mov	r3, r0
 8002e38:	461a      	mov	r2, r3
 8002e3a:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002e3e:	4413      	add	r3, r2
 8002e40:	f8c7 3240 	str.w	r3, [r7, #576]	@ 0x240
                    bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"limitSwitchCenter\":%d, ", sensors->limitSwitchCenter);
 8002e44:	f107 0238 	add.w	r2, r7, #56	@ 0x38
 8002e48:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002e4c:	18d0      	adds	r0, r2, r3
 8002e4e:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 8002e52:	f893 3026 	ldrb.w	r3, [r3, #38]	@ 0x26
 8002e56:	461a      	mov	r2, r3
 8002e58:	4933      	ldr	r1, [pc, #204]	@ (8002f28 <MqttClientPubTask+0x5e4>)
 8002e5a:	f026 fbc7 	bl	80295ec <siprintf>
 8002e5e:	4603      	mov	r3, r0
 8002e60:	461a      	mov	r2, r3
 8002e62:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002e66:	4413      	add	r3, r2
 8002e68:	f8c7 3240 	str.w	r3, [r7, #576]	@ 0x240
                    bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"powerSupplyFailMask\":%d}", sensors->powerSupplyFailMask);
 8002e6c:	f107 0238 	add.w	r2, r7, #56	@ 0x38
 8002e70:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002e74:	18d0      	adds	r0, r2, r3
 8002e76:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 8002e7a:	f893 3027 	ldrb.w	r3, [r3, #39]	@ 0x27
 8002e7e:	461a      	mov	r2, r3
 8002e80:	492a      	ldr	r1, [pc, #168]	@ (8002f2c <MqttClientPubTask+0x5e8>)
 8002e82:	f026 fbb3 	bl	80295ec <siprintf>
 8002e86:	4603      	mov	r3, r0
 8002e88:	461a      	mov	r2, r3
 8002e8a:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002e8e:	4413      	add	r3, r2
 8002e90:	f8c7 3240 	str.w	r3, [r7, #576]	@ 0x240

                    osMutexRelease (sensorsInfoMutex);
 8002e94:	4b16      	ldr	r3, [pc, #88]	@ (8002ef0 <MqttClientPubTask+0x5ac>)
 8002e96:	681b      	ldr	r3, [r3, #0]
 8002e98:	4618      	mov	r0, r3
 8002e9a:	f00d fbfe 	bl	801069a <osMutexRelease>
                    message.payload    = (void*)messageBuffer;
 8002e9e:	f507 7312 	add.w	r3, r7, #584	@ 0x248
 8002ea2:	f5a3 7310 	sub.w	r3, r3, #576	@ 0x240
 8002ea6:	f107 0238 	add.w	r2, r7, #56	@ 0x38
 8002eaa:	609a      	str	r2, [r3, #8]
                    message.payloadlen = strlen (messageBuffer);
 8002eac:	f107 0338 	add.w	r3, r7, #56	@ 0x38
 8002eb0:	4618      	mov	r0, r3
 8002eb2:	f7fd fa75 	bl	80003a0 <strlen>
 8002eb6:	4602      	mov	r2, r0
 8002eb8:	f507 7312 	add.w	r3, r7, #584	@ 0x248
 8002ebc:	f5a3 7310 	sub.w	r3, r3, #576	@ 0x240
 8002ec0:	60da      	str	r2, [r3, #12]
                    MQTTPublish (&mqttClient, topicTextBuffer, &message); // publish a message
 8002ec2:	f107 0208 	add.w	r2, r7, #8
 8002ec6:	f107 0318 	add.w	r3, r7, #24
 8002eca:	4619      	mov	r1, r3
 8002ecc:	4818      	ldr	r0, [pc, #96]	@ (8002f30 <MqttClientPubTask+0x5ec>)
 8002ece:	f023 fea6 	bl	8026c1e <MQTTPublish>
                for (boardNumber = 0; boardNumber < SLAVES_COUNT; boardNumber++) {
 8002ed2:	f897 3247 	ldrb.w	r3, [r7, #583]	@ 0x247
 8002ed6:	3301      	adds	r3, #1
 8002ed8:	f887 3247 	strb.w	r3, [r7, #583]	@ 0x247
 8002edc:	f897 3247 	ldrb.w	r3, [r7, #583]	@ 0x247
 8002ee0:	2b03      	cmp	r3, #3
 8002ee2:	f67f aea5 	bls.w	8002c30 <MqttClientPubTask+0x2ec>
                }
            }
        }

        osDelay (pdMS_TO_TICKS (1000));
 8002ee6:	f44f 707a 	mov.w	r0, #1000	@ 0x3e8
 8002eea:	f00d faea 	bl	80104c2 <osDelay>
        if (mqttClient.isconnected) {
 8002eee:	e560      	b.n	80029b2 <MqttClientPubTask+0x6e>
 8002ef0:	24000598 	.word	0x24000598
 8002ef4:	240004f4 	.word	0x240004f4
 8002ef8:	0802c19c 	.word	0x0802c19c
 8002efc:	0802c1a8 	.word	0x0802c1a8
 8002f00:	0802c1c8 	.word	0x0802c1c8
 8002f04:	0802c1dc 	.word	0x0802c1dc
 8002f08:	0802c1f0 	.word	0x0802c1f0
 8002f0c:	0802c204 	.word	0x0802c204
 8002f10:	0802c218 	.word	0x0802c218
 8002f14:	0802c234 	.word	0x0802c234
 8002f18:	0802c250 	.word	0x0802c250
 8002f1c:	0802c26c 	.word	0x0802c26c
 8002f20:	0802c288 	.word	0x0802c288
 8002f24:	0802c2a0 	.word	0x0802c2a0
 8002f28:	0802c2b8 	.word	0x0802c2b8
 8002f2c:	0802c2d4 	.word	0x0802c2d4
 8002f30:	240005b4 	.word	0x240005b4

08002f34 <MqttConnectBroker>:
    }
}

int MqttConnectBroker () {
 8002f34:	b580      	push	{r7, lr}
 8002f36:	b09c      	sub	sp, #112	@ 0x70
 8002f38:	af04      	add	r7, sp, #16
    uint8_t boardNumber = 0;
 8002f3a:	2300      	movs	r3, #0
 8002f3c:	f887 305f 	strb.w	r3, [r7, #95]	@ 0x5f
    int ret;

    NewNetwork (&net);
 8002f40:	4839      	ldr	r0, [pc, #228]	@ (8003028 <MqttConnectBroker+0xf4>)
 8002f42:	f023 ffa5 	bl	8026e90 <NewNetwork>
    ret = ConnectNetwork (&net, BROKER_IP, MQTT_PORT);
 8002f46:	f240 725b 	movw	r2, #1883	@ 0x75b
 8002f4a:	4938      	ldr	r1, [pc, #224]	@ (800302c <MqttConnectBroker+0xf8>)
 8002f4c:	4836      	ldr	r0, [pc, #216]	@ (8003028 <MqttConnectBroker+0xf4>)
 8002f4e:	f023 ffbb 	bl	8026ec8 <ConnectNetwork>
 8002f52:	65b8      	str	r0, [r7, #88]	@ 0x58
    if (ret != MQTT_SUCCESS) {
 8002f54:	6dbb      	ldr	r3, [r7, #88]	@ 0x58
 8002f56:	2b00      	cmp	r3, #0
 8002f58:	d005      	beq.n	8002f66 <MqttConnectBroker+0x32>
        printf ("ConnectNetwork failed.\n");
 8002f5a:	4835      	ldr	r0, [pc, #212]	@ (8003030 <MqttConnectBroker+0xfc>)
 8002f5c:	f026 fb3e 	bl	80295dc <puts>
        return -1;
 8002f60:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8002f64:	e05c      	b.n	8003020 <MqttConnectBroker+0xec>
    }

    MQTTClientInit (&mqttClient, &net, 1000, sndBuffer, sizeof (sndBuffer), rcvBuffer, sizeof (rcvBuffer));
 8002f66:	f44f 6380 	mov.w	r3, #1024	@ 0x400
 8002f6a:	9302      	str	r3, [sp, #8]
 8002f6c:	4b31      	ldr	r3, [pc, #196]	@ (8003034 <MqttConnectBroker+0x100>)
 8002f6e:	9301      	str	r3, [sp, #4]
 8002f70:	f44f 6380 	mov.w	r3, #1024	@ 0x400
 8002f74:	9300      	str	r3, [sp, #0]
 8002f76:	4b30      	ldr	r3, [pc, #192]	@ (8003038 <MqttConnectBroker+0x104>)
 8002f78:	f44f 727a 	mov.w	r2, #1000	@ 0x3e8
 8002f7c:	492a      	ldr	r1, [pc, #168]	@ (8003028 <MqttConnectBroker+0xf4>)
 8002f7e:	482f      	ldr	r0, [pc, #188]	@ (800303c <MqttConnectBroker+0x108>)
 8002f80:	f023 f8c0 	bl	8026104 <MQTTClientInit>

    MQTTPacket_connectData data = MQTTPacket_connectData_initializer;
 8002f84:	4a2e      	ldr	r2, [pc, #184]	@ (8003040 <MqttConnectBroker+0x10c>)
 8002f86:	463b      	mov	r3, r7
 8002f88:	4611      	mov	r1, r2
 8002f8a:	2258      	movs	r2, #88	@ 0x58
 8002f8c:	4618      	mov	r0, r3
 8002f8e:	f026 fd46 	bl	8029a1e <memcpy>
    data.willFlag               = 0;
 8002f92:	2300      	movs	r3, #0
 8002f94:	76fb      	strb	r3, [r7, #27]
    data.MQTTVersion            = 3;
 8002f96:	2303      	movs	r3, #3
 8002f98:	723b      	strb	r3, [r7, #8]
    data.clientID.cstring       = "test_user1";
 8002f9a:	4b2a      	ldr	r3, [pc, #168]	@ (8003044 <MqttConnectBroker+0x110>)
 8002f9c:	60fb      	str	r3, [r7, #12]
    data.username.cstring       = "test_user1";
 8002f9e:	4b29      	ldr	r3, [pc, #164]	@ (8003044 <MqttConnectBroker+0x110>)
 8002fa0:	643b      	str	r3, [r7, #64]	@ 0x40
    data.password.cstring       = "1234";
 8002fa2:	4b29      	ldr	r3, [pc, #164]	@ (8003048 <MqttConnectBroker+0x114>)
 8002fa4:	64fb      	str	r3, [r7, #76]	@ 0x4c
    data.keepAliveInterval      = 100;
 8002fa6:	2364      	movs	r3, #100	@ 0x64
 8002fa8:	833b      	strh	r3, [r7, #24]
    data.cleansession           = 1;
 8002faa:	2301      	movs	r3, #1
 8002fac:	76bb      	strb	r3, [r7, #26]

    ret = MQTTConnect (&mqttClient, &data);
 8002fae:	463b      	mov	r3, r7
 8002fb0:	4619      	mov	r1, r3
 8002fb2:	4822      	ldr	r0, [pc, #136]	@ (800303c <MqttConnectBroker+0x108>)
 8002fb4:	f023 fd02 	bl	80269bc <MQTTConnect>
 8002fb8:	65b8      	str	r0, [r7, #88]	@ 0x58
    if (ret != MQTT_SUCCESS) {
 8002fba:	6dbb      	ldr	r3, [r7, #88]	@ 0x58
 8002fbc:	2b00      	cmp	r3, #0
 8002fbe:	d008      	beq.n	8002fd2 <MqttConnectBroker+0x9e>
        net_disconnect (&net);
 8002fc0:	4819      	ldr	r0, [pc, #100]	@ (8003028 <MqttConnectBroker+0xf4>)
 8002fc2:	f024 f80a 	bl	8026fda <net_disconnect>
        printf ("MQTTConnect failed. Code %d\n", ret);
 8002fc6:	6db9      	ldr	r1, [r7, #88]	@ 0x58
 8002fc8:	4820      	ldr	r0, [pc, #128]	@ (800304c <MqttConnectBroker+0x118>)
 8002fca:	f026 fa9f 	bl	802950c <iprintf>
        return ret;
 8002fce:	6dbb      	ldr	r3, [r7, #88]	@ 0x58
 8002fd0:	e026      	b.n	8003020 <MqttConnectBroker+0xec>
    }

    for (boardNumber = 0; boardNumber < SLAVES_COUNT; boardNumber++) {
 8002fd2:	2300      	movs	r3, #0
 8002fd4:	f887 305f 	strb.w	r3, [r7, #95]	@ 0x5f
 8002fd8:	e01a      	b.n	8003010 <MqttConnectBroker+0xdc>
        ret = MQTTSubscribe (&mqttClient, subscribeTopicNames[boardNumber], QOS0, MqttMessageArrived);
 8002fda:	f897 305f 	ldrb.w	r3, [r7, #95]	@ 0x5f
 8002fde:	4a1c      	ldr	r2, [pc, #112]	@ (8003050 <MqttConnectBroker+0x11c>)
 8002fe0:	f852 1023 	ldr.w	r1, [r2, r3, lsl #2]
 8002fe4:	4b1b      	ldr	r3, [pc, #108]	@ (8003054 <MqttConnectBroker+0x120>)
 8002fe6:	2200      	movs	r2, #0
 8002fe8:	4814      	ldr	r0, [pc, #80]	@ (800303c <MqttConnectBroker+0x108>)
 8002fea:	f023 fe02 	bl	8026bf2 <MQTTSubscribe>
 8002fee:	65b8      	str	r0, [r7, #88]	@ 0x58
        if (ret != MQTT_SUCCESS) {
 8002ff0:	6dbb      	ldr	r3, [r7, #88]	@ 0x58
 8002ff2:	2b00      	cmp	r3, #0
 8002ff4:	d007      	beq.n	8003006 <MqttConnectBroker+0xd2>
            net_disconnect (&net);
 8002ff6:	480c      	ldr	r0, [pc, #48]	@ (8003028 <MqttConnectBroker+0xf4>)
 8002ff8:	f023 ffef 	bl	8026fda <net_disconnect>
            printf ("MQTTSubscribe failed.\n");
 8002ffc:	4816      	ldr	r0, [pc, #88]	@ (8003058 <MqttConnectBroker+0x124>)
 8002ffe:	f026 faed 	bl	80295dc <puts>
            return ret;
 8003002:	6dbb      	ldr	r3, [r7, #88]	@ 0x58
 8003004:	e00c      	b.n	8003020 <MqttConnectBroker+0xec>
    for (boardNumber = 0; boardNumber < SLAVES_COUNT; boardNumber++) {
 8003006:	f897 305f 	ldrb.w	r3, [r7, #95]	@ 0x5f
 800300a:	3301      	adds	r3, #1
 800300c:	f887 305f 	strb.w	r3, [r7, #95]	@ 0x5f
 8003010:	f897 305f 	ldrb.w	r3, [r7, #95]	@ 0x5f
 8003014:	2b03      	cmp	r3, #3
 8003016:	d9e0      	bls.n	8002fda <MqttConnectBroker+0xa6>
        }
    }
    printf ("MQTT_ConnectBroker O.K.\n");
 8003018:	4810      	ldr	r0, [pc, #64]	@ (800305c <MqttConnectBroker+0x128>)
 800301a:	f026 fadf 	bl	80295dc <puts>

    return MQTT_SUCCESS;
 800301e:	2300      	movs	r3, #0
}
 8003020:	4618      	mov	r0, r3
 8003022:	3760      	adds	r7, #96	@ 0x60
 8003024:	46bd      	mov	sp, r7
 8003026:	bd80      	pop	{r7, pc}
 8003028:	240005a4 	.word	0x240005a4
 800302c:	0802c2f0 	.word	0x0802c2f0
 8003030:	0802c300 	.word	0x0802c300
 8003034:	24000a20 	.word	0x24000a20
 8003038:	24000620 	.word	0x24000620
 800303c:	240005b4 	.word	0x240005b4
 8003040:	0802c37c 	.word	0x0802c37c
 8003044:	0802c318 	.word	0x0802c318
 8003048:	0802c324 	.word	0x0802c324
 800304c:	0802c32c 	.word	0x0802c32c
 8003050:	08030548 	.word	0x08030548
 8003054:	08003061 	.word	0x08003061
 8003058:	0802c34c 	.word	0x0802c34c
 800305c:	0802c364 	.word	0x0802c364

08003060 <MqttMessageArrived>:

void MqttMessageArrived (MessageData* msg) {
 8003060:	b580      	push	{r7, lr}
 8003062:	b096      	sub	sp, #88	@ 0x58
 8003064:	af00      	add	r7, sp, #0
 8003066:	6078      	str	r0, [r7, #4]
    SerialProtocolCommands spCommand = spUnknown;
 8003068:	2308      	movs	r3, #8
 800306a:	f887 3057 	strb.w	r3, [r7, #87]	@ 0x57
    BoardNoOverTopic topicForBoard   = unknownBoard;
 800306e:	2305      	movs	r3, #5
 8003070:	f887 3056 	strb.w	r3, [r7, #86]	@ 0x56
    uint8_t boardNumber              = 0;
 8003074:	2300      	movs	r3, #0
 8003076:	f887 3055 	strb.w	r3, [r7, #85]	@ 0x55
    MQTTMessage* message             = msg->message;
 800307a:	687b      	ldr	r3, [r7, #4]
 800307c:	681b      	ldr	r3, [r3, #0]
 800307e:	64bb      	str	r3, [r7, #72]	@ 0x48
    char topicName[32]               = { 0 };
 8003080:	2300      	movs	r3, #0
 8003082:	61bb      	str	r3, [r7, #24]
 8003084:	f107 031c 	add.w	r3, r7, #28
 8003088:	2200      	movs	r2, #0
 800308a:	601a      	str	r2, [r3, #0]
 800308c:	605a      	str	r2, [r3, #4]
 800308e:	609a      	str	r2, [r3, #8]
 8003090:	60da      	str	r2, [r3, #12]
 8003092:	611a      	str	r2, [r3, #16]
 8003094:	615a      	str	r2, [r3, #20]
 8003096:	619a      	str	r2, [r3, #24]
    memcpy (topicName, msg->topicName->lenstring.data, msg->topicName->lenstring.len);
 8003098:	687b      	ldr	r3, [r7, #4]
 800309a:	685b      	ldr	r3, [r3, #4]
 800309c:	6899      	ldr	r1, [r3, #8]
 800309e:	687b      	ldr	r3, [r7, #4]
 80030a0:	685b      	ldr	r3, [r3, #4]
 80030a2:	685b      	ldr	r3, [r3, #4]
 80030a4:	461a      	mov	r2, r3
 80030a6:	f107 0318 	add.w	r3, r7, #24
 80030aa:	4618      	mov	r0, r3
 80030ac:	f026 fcb7 	bl	8029a1e <memcpy>

    for (boardNumber = 0; boardNumber < SLAVES_COUNT; boardNumber++) {
 80030b0:	2300      	movs	r3, #0
 80030b2:	f887 3055 	strb.w	r3, [r7, #85]	@ 0x55
 80030b6:	e017      	b.n	80030e8 <MqttMessageArrived+0x88>
        if (strcmp (topicName, subscribeTopicNames[boardNumber]) == 0) {
 80030b8:	f897 3055 	ldrb.w	r3, [r7, #85]	@ 0x55
 80030bc:	4a8c      	ldr	r2, [pc, #560]	@ (80032f0 <MqttMessageArrived+0x290>)
 80030be:	f852 2023 	ldr.w	r2, [r2, r3, lsl #2]
 80030c2:	f107 0318 	add.w	r3, r7, #24
 80030c6:	4611      	mov	r1, r2
 80030c8:	4618      	mov	r0, r3
 80030ca:	f7fd f909 	bl	80002e0 <strcmp>
 80030ce:	4603      	mov	r3, r0
 80030d0:	2b00      	cmp	r3, #0
 80030d2:	d104      	bne.n	80030de <MqttMessageArrived+0x7e>
            topicForBoard = (BoardNoOverTopic)(boardNumber + 1);
 80030d4:	f897 3055 	ldrb.w	r3, [r7, #85]	@ 0x55
 80030d8:	3301      	adds	r3, #1
 80030da:	f887 3056 	strb.w	r3, [r7, #86]	@ 0x56
    for (boardNumber = 0; boardNumber < SLAVES_COUNT; boardNumber++) {
 80030de:	f897 3055 	ldrb.w	r3, [r7, #85]	@ 0x55
 80030e2:	3301      	adds	r3, #1
 80030e4:	f887 3055 	strb.w	r3, [r7, #85]	@ 0x55
 80030e8:	f897 3055 	ldrb.w	r3, [r7, #85]	@ 0x55
 80030ec:	2b03      	cmp	r3, #3
 80030ee:	d9e3      	bls.n	80030b8 <MqttMessageArrived+0x58>
        }
    }

    cJSON* json             = cJSON_Parse (message->payload);
 80030f0:	6cbb      	ldr	r3, [r7, #72]	@ 0x48
 80030f2:	689b      	ldr	r3, [r3, #8]
 80030f4:	4618      	mov	r0, r3
 80030f6:	f7fe fa2d 	bl	8001554 <cJSON_Parse>
 80030fa:	6478      	str	r0, [r7, #68]	@ 0x44
    const cJSON* objectItem = NULL;
 80030fc:	2300      	movs	r3, #0
 80030fe:	643b      	str	r3, [r7, #64]	@ 0x40
    InterProcessData data   = { 0 };
 8003100:	f107 030c 	add.w	r3, r7, #12
 8003104:	2200      	movs	r2, #0
 8003106:	601a      	str	r2, [r3, #0]
 8003108:	605a      	str	r2, [r3, #4]
 800310a:	609a      	str	r2, [r3, #8]
    for (int topicCmdNumber = 0; topicCmdNumber < 6; topicCmdNumber++) {
 800310c:	2300      	movs	r3, #0
 800310e:	653b      	str	r3, [r7, #80]	@ 0x50
 8003110:	e0d8      	b.n	80032c4 <MqttMessageArrived+0x264>
        spCommand  = spUnknown;
 8003112:	2308      	movs	r3, #8
 8003114:	f887 3057 	strb.w	r3, [r7, #87]	@ 0x57
        objectItem = cJSON_GetObjectItemCaseSensitive (json, topicCommands[topicCmdNumber]);
 8003118:	4a76      	ldr	r2, [pc, #472]	@ (80032f4 <MqttMessageArrived+0x294>)
 800311a:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 800311c:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
 8003120:	4619      	mov	r1, r3
 8003122:	6c78      	ldr	r0, [r7, #68]	@ 0x44
 8003124:	f7fe fd80 	bl	8001c28 <cJSON_GetObjectItemCaseSensitive>
 8003128:	6438      	str	r0, [r7, #64]	@ 0x40
        if (objectItem != NULL) {
 800312a:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 800312c:	2b00      	cmp	r3, #0
 800312e:	f000 80c6 	beq.w	80032be <MqttMessageArrived+0x25e>
            switch (topicCmdNumber) {
 8003132:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 8003134:	2b05      	cmp	r3, #5
 8003136:	d86e      	bhi.n	8003216 <MqttMessageArrived+0x1b6>
 8003138:	a201      	add	r2, pc, #4	@ (adr r2, 8003140 <MqttMessageArrived+0xe0>)
 800313a:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800313e:	bf00      	nop
 8003140:	08003159 	.word	0x08003159
 8003144:	0800315f 	.word	0x0800315f
 8003148:	0800316d 	.word	0x0800316d
 800314c:	080031d7 	.word	0x080031d7
 8003150:	080031e7 	.word	0x080031e7
 8003154:	080031ed 	.word	0x080031ed
            case 0: spCommand = spSetFanSpeed;
 8003158:	2302      	movs	r3, #2
 800315a:	f887 3057 	strb.w	r3, [r7, #87]	@ 0x57
            case 1:
                if (spCommand == spUnknown) {
 800315e:	f897 3057 	ldrb.w	r3, [r7, #87]	@ 0x57
 8003162:	2b08      	cmp	r3, #8
 8003164:	d102      	bne.n	800316c <MqttMessageArrived+0x10c>
                    spCommand = spSetMotorXOn;
 8003166:	2303      	movs	r3, #3
 8003168:	f887 3057 	strb.w	r3, [r7, #87]	@ 0x57
                }
            case 2:
                if (spCommand == spUnknown) {
 800316c:	f897 3057 	ldrb.w	r3, [r7, #87]	@ 0x57
 8003170:	2b08      	cmp	r3, #8
 8003172:	d102      	bne.n	800317a <MqttMessageArrived+0x11a>
                    spCommand = spSetMotorYOn;
 8003174:	2304      	movs	r3, #4
 8003176:	f887 3057 	strb.w	r3, [r7, #87]	@ 0x57
                }
                if (cJSON_IsArray (objectItem)) {
 800317a:	6c38      	ldr	r0, [r7, #64]	@ 0x40
 800317c:	f7fe fd7a 	bl	8001c74 <cJSON_IsArray>
 8003180:	4603      	mov	r3, r0
 8003182:	2b00      	cmp	r3, #0
 8003184:	d049      	beq.n	800321a <MqttMessageArrived+0x1ba>
                    data.spCommand = spCommand;
 8003186:	f897 3057 	ldrb.w	r3, [r7, #87]	@ 0x57
 800318a:	733b      	strb	r3, [r7, #12]
                    int arraySize  = cJSON_GetArraySize (objectItem);
 800318c:	6c38      	ldr	r0, [r7, #64]	@ 0x40
 800318e:	f7fe fcab 	bl	8001ae8 <cJSON_GetArraySize>
 8003192:	63f8      	str	r0, [r7, #60]	@ 0x3c
                    if (arraySize == 2) {
 8003194:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 8003196:	2b02      	cmp	r3, #2
 8003198:	d13f      	bne.n	800321a <MqttMessageArrived+0x1ba>
                        for (int i = 0; i < arraySize; i++) {
 800319a:	2300      	movs	r3, #0
 800319c:	64fb      	str	r3, [r7, #76]	@ 0x4c
 800319e:	e015      	b.n	80031cc <MqttMessageArrived+0x16c>
                            cJSON* item = cJSON_GetArrayItem (objectItem, i);
 80031a0:	6cf9      	ldr	r1, [r7, #76]	@ 0x4c
 80031a2:	6c38      	ldr	r0, [r7, #64]	@ 0x40
 80031a4:	f7fe fce4 	bl	8001b70 <cJSON_GetArrayItem>
 80031a8:	63b8      	str	r0, [r7, #56]	@ 0x38
                            if (cJSON_IsNumber (item)) {
 80031aa:	6bb8      	ldr	r0, [r7, #56]	@ 0x38
 80031ac:	f7fe fd4b 	bl	8001c46 <cJSON_IsNumber>
 80031b0:	4603      	mov	r3, r0
 80031b2:	2b00      	cmp	r3, #0
 80031b4:	d007      	beq.n	80031c6 <MqttMessageArrived+0x166>
                                data.values.integerValues.value[i] = item->valueint;
 80031b6:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 80031b8:	695a      	ldr	r2, [r3, #20]
 80031ba:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 80031bc:	009b      	lsls	r3, r3, #2
 80031be:	3358      	adds	r3, #88	@ 0x58
 80031c0:	443b      	add	r3, r7
 80031c2:	f843 2c48 	str.w	r2, [r3, #-72]
                        for (int i = 0; i < arraySize; i++) {
 80031c6:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 80031c8:	3301      	adds	r3, #1
 80031ca:	64fb      	str	r3, [r7, #76]	@ 0x4c
 80031cc:	6cfa      	ldr	r2, [r7, #76]	@ 0x4c
 80031ce:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 80031d0:	429a      	cmp	r2, r3
 80031d2:	dbe5      	blt.n	80031a0 <MqttMessageArrived+0x140>
                            }
                        }
                    }
                }
                break;
 80031d4:	e021      	b.n	800321a <MqttMessageArrived+0x1ba>
            case 3:
                data.spCommand                     = spSetDiodeOn;
 80031d6:	2307      	movs	r3, #7
 80031d8:	733b      	strb	r3, [r7, #12]
                data.values.integerValues.value[0] = objectItem->valueint;
 80031da:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 80031dc:	695b      	ldr	r3, [r3, #20]
 80031de:	613b      	str	r3, [r7, #16]
                data.values.integerValues.value[1] = 0;
 80031e0:	2300      	movs	r3, #0
 80031e2:	617b      	str	r3, [r7, #20]
                break;
 80031e4:	e01a      	b.n	800321c <MqttMessageArrived+0x1bc>
            case 4: spCommand = spSetmotorXMaxCurrent;
 80031e6:	2305      	movs	r3, #5
 80031e8:	f887 3057 	strb.w	r3, [r7, #87]	@ 0x57
            case 5:
                if (spCommand == spUnknown) {
 80031ec:	f897 3057 	ldrb.w	r3, [r7, #87]	@ 0x57
 80031f0:	2b08      	cmp	r3, #8
 80031f2:	d102      	bne.n	80031fa <MqttMessageArrived+0x19a>
                    spCommand = spSetmotorYMaxCurrent;
 80031f4:	2306      	movs	r3, #6
 80031f6:	f887 3057 	strb.w	r3, [r7, #87]	@ 0x57
                }
                data.spCommand                   = spCommand;
 80031fa:	f897 3057 	ldrb.w	r3, [r7, #87]	@ 0x57
 80031fe:	733b      	strb	r3, [r7, #12]
                data.values.flaotValues.value[0] = objectItem->valuedouble;
 8003200:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8003202:	ed93 7b06 	vldr	d7, [r3, #24]
 8003206:	eef7 7bc7 	vcvt.f32.f64	s15, d7
 800320a:	edc7 7a04 	vstr	s15, [r7, #16]
                data.values.flaotValues.value[1] = 0.0;
 800320e:	f04f 0300 	mov.w	r3, #0
 8003212:	617b      	str	r3, [r7, #20]
                break;
 8003214:	e002      	b.n	800321c <MqttMessageArrived+0x1bc>
            default: break;
 8003216:	bf00      	nop
 8003218:	e000      	b.n	800321c <MqttMessageArrived+0x1bc>
                break;
 800321a:	bf00      	nop
            }

            switch (topicForBoard) {
 800321c:	f897 3056 	ldrb.w	r3, [r7, #86]	@ 0x56
 8003220:	3b01      	subs	r3, #1
 8003222:	2b03      	cmp	r3, #3
 8003224:	d84a      	bhi.n	80032bc <MqttMessageArrived+0x25c>
 8003226:	a201      	add	r2, pc, #4	@ (adr r2, 800322c <MqttMessageArrived+0x1cc>)
 8003228:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800322c:	0800323d 	.word	0x0800323d
 8003230:	0800325d 	.word	0x0800325d
 8003234:	0800327d 	.word	0x0800327d
 8003238:	0800329d 	.word	0x0800329d
                if (uart1TaskData.sendCmdToSlaveQueue != NULL) {
                    osMessageQueuePut (
                    uart1TaskData.sendCmdToSlaveQueue, &data, 0, (TickType_t)100);
                }
#else
                if (uart8TaskData.sendCmdToSlaveQueue != NULL) {
 800323c:	4b2e      	ldr	r3, [pc, #184]	@ (80032f8 <MqttMessageArrived+0x298>)
 800323e:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8003240:	2b00      	cmp	r3, #0
 8003242:	d007      	beq.n	8003254 <MqttMessageArrived+0x1f4>
                    osMessageQueuePut (uart8TaskData.sendCmdToSlaveQueue, &data, 0, (TickType_t)100);
 8003244:	4b2c      	ldr	r3, [pc, #176]	@ (80032f8 <MqttMessageArrived+0x298>)
 8003246:	6ad8      	ldr	r0, [r3, #44]	@ 0x2c
 8003248:	f107 010c 	add.w	r1, r7, #12
 800324c:	2364      	movs	r3, #100	@ 0x64
 800324e:	2200      	movs	r2, #0
 8003250:	f00d fc18 	bl	8010a84 <osMessageQueuePut>
                }
#endif
                printf ("Send cmd to board 1\n");
 8003254:	4829      	ldr	r0, [pc, #164]	@ (80032fc <MqttMessageArrived+0x29c>)
 8003256:	f026 f9c1 	bl	80295dc <puts>
                break;
 800325a:	e030      	b.n	80032be <MqttMessageArrived+0x25e>
            case board_2:
                if (uart3TaskData.sendCmdToSlaveQueue != NULL) {
 800325c:	4b28      	ldr	r3, [pc, #160]	@ (8003300 <MqttMessageArrived+0x2a0>)
 800325e:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8003260:	2b00      	cmp	r3, #0
 8003262:	d007      	beq.n	8003274 <MqttMessageArrived+0x214>
                    osMessageQueuePut (uart3TaskData.sendCmdToSlaveQueue, &data, 0, (TickType_t)100);
 8003264:	4b26      	ldr	r3, [pc, #152]	@ (8003300 <MqttMessageArrived+0x2a0>)
 8003266:	6ad8      	ldr	r0, [r3, #44]	@ 0x2c
 8003268:	f107 010c 	add.w	r1, r7, #12
 800326c:	2364      	movs	r3, #100	@ 0x64
 800326e:	2200      	movs	r2, #0
 8003270:	f00d fc08 	bl	8010a84 <osMessageQueuePut>
                }
                printf ("Send cmd to board 2\n");
 8003274:	4823      	ldr	r0, [pc, #140]	@ (8003304 <MqttMessageArrived+0x2a4>)
 8003276:	f026 f9b1 	bl	80295dc <puts>
                break;
 800327a:	e020      	b.n	80032be <MqttMessageArrived+0x25e>
            case board_3:
                if (uart6TaskData.sendCmdToSlaveQueue != NULL) {
 800327c:	4b22      	ldr	r3, [pc, #136]	@ (8003308 <MqttMessageArrived+0x2a8>)
 800327e:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8003280:	2b00      	cmp	r3, #0
 8003282:	d007      	beq.n	8003294 <MqttMessageArrived+0x234>
                    osMessageQueuePut (uart6TaskData.sendCmdToSlaveQueue, &data, 0, (TickType_t)100);
 8003284:	4b20      	ldr	r3, [pc, #128]	@ (8003308 <MqttMessageArrived+0x2a8>)
 8003286:	6ad8      	ldr	r0, [r3, #44]	@ 0x2c
 8003288:	f107 010c 	add.w	r1, r7, #12
 800328c:	2364      	movs	r3, #100	@ 0x64
 800328e:	2200      	movs	r2, #0
 8003290:	f00d fbf8 	bl	8010a84 <osMessageQueuePut>
                }
                printf ("Send cmd to board 3\n");
 8003294:	481d      	ldr	r0, [pc, #116]	@ (800330c <MqttMessageArrived+0x2ac>)
 8003296:	f026 f9a1 	bl	80295dc <puts>
                break;
 800329a:	e010      	b.n	80032be <MqttMessageArrived+0x25e>
            case board_4:
                if (uart2TaskData.sendCmdToSlaveQueue != NULL) {
 800329c:	4b1c      	ldr	r3, [pc, #112]	@ (8003310 <MqttMessageArrived+0x2b0>)
 800329e:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80032a0:	2b00      	cmp	r3, #0
 80032a2:	d007      	beq.n	80032b4 <MqttMessageArrived+0x254>
                    osMessageQueuePut (uart2TaskData.sendCmdToSlaveQueue, &data, 0, (TickType_t)100);
 80032a4:	4b1a      	ldr	r3, [pc, #104]	@ (8003310 <MqttMessageArrived+0x2b0>)
 80032a6:	6ad8      	ldr	r0, [r3, #44]	@ 0x2c
 80032a8:	f107 010c 	add.w	r1, r7, #12
 80032ac:	2364      	movs	r3, #100	@ 0x64
 80032ae:	2200      	movs	r2, #0
 80032b0:	f00d fbe8 	bl	8010a84 <osMessageQueuePut>
                }
                printf ("Send cmd to board 4\n");
 80032b4:	4817      	ldr	r0, [pc, #92]	@ (8003314 <MqttMessageArrived+0x2b4>)
 80032b6:	f026 f991 	bl	80295dc <puts>
                break;
 80032ba:	e000      	b.n	80032be <MqttMessageArrived+0x25e>
            default: break;
 80032bc:	bf00      	nop
    for (int topicCmdNumber = 0; topicCmdNumber < 6; topicCmdNumber++) {
 80032be:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 80032c0:	3301      	adds	r3, #1
 80032c2:	653b      	str	r3, [r7, #80]	@ 0x50
 80032c4:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 80032c6:	2b05      	cmp	r3, #5
 80032c8:	f77f af23 	ble.w	8003112 <MqttMessageArrived+0xb2>
            }
        }
    }
    cJSON_Delete (json);
 80032cc:	6c78      	ldr	r0, [r7, #68]	@ 0x44
 80032ce:	f7fd fc5d 	bl	8000b8c <cJSON_Delete>

    //    printf ("MQTT MSG[%d]:%s\n", (int)message->payloadlen, (char*)message->payload);

    printf ("MQTT Topic:%s, MSG[%d]:%s\n", topicName, (int)message->payloadlen, (char*)message->payload);
 80032d2:	6cbb      	ldr	r3, [r7, #72]	@ 0x48
 80032d4:	68db      	ldr	r3, [r3, #12]
 80032d6:	461a      	mov	r2, r3
 80032d8:	6cbb      	ldr	r3, [r7, #72]	@ 0x48
 80032da:	689b      	ldr	r3, [r3, #8]
 80032dc:	f107 0118 	add.w	r1, r7, #24
 80032e0:	480d      	ldr	r0, [pc, #52]	@ (8003318 <MqttMessageArrived+0x2b8>)
 80032e2:	f026 f913 	bl	802950c <iprintf>
}
 80032e6:	bf00      	nop
 80032e8:	3758      	adds	r7, #88	@ 0x58
 80032ea:	46bd      	mov	sp, r7
 80032ec:	bd80      	pop	{r7, pc}
 80032ee:	bf00      	nop
 80032f0:	08030548 	.word	0x08030548
 80032f4:	08030558 	.word	0x08030558
 80032f8:	24001218 	.word	0x24001218
 80032fc:	0802c3d4 	.word	0x0802c3d4
 8003300:	24001170 	.word	0x24001170
 8003304:	0802c3e8 	.word	0x0802c3e8
 8003308:	240011a8 	.word	0x240011a8
 800330c:	0802c3fc 	.word	0x0802c3fc
 8003310:	240011e0 	.word	0x240011e0
 8003314:	0802c410 	.word	0x0802c410
 8003318:	0802c424 	.word	0x0802c424

0800331c <mqtt_cli_init>:

void mqtt_cli_init (void) {
 800331c:	b580      	push	{r7, lr}
 800331e:	af00      	add	r7, sp, #0
    mqttClientSubTaskHandle = osThreadNew (MqttClientSubTask, NULL, &mqttClientSubTaskAttr); // subscribe task
 8003320:	4a08      	ldr	r2, [pc, #32]	@ (8003344 <mqtt_cli_init+0x28>)
 8003322:	2100      	movs	r1, #0
 8003324:	4808      	ldr	r0, [pc, #32]	@ (8003348 <mqtt_cli_init+0x2c>)
 8003326:	f00d f82e 	bl	8010386 <osThreadNew>
 800332a:	4603      	mov	r3, r0
 800332c:	4a07      	ldr	r2, [pc, #28]	@ (800334c <mqtt_cli_init+0x30>)
 800332e:	6013      	str	r3, [r2, #0]
    mqttClientPubTaskHandle = osThreadNew (MqttClientPubTask, NULL, &mqttClientPubTaskAttr); // publish task
 8003330:	4a07      	ldr	r2, [pc, #28]	@ (8003350 <mqtt_cli_init+0x34>)
 8003332:	2100      	movs	r1, #0
 8003334:	4807      	ldr	r0, [pc, #28]	@ (8003354 <mqtt_cli_init+0x38>)
 8003336:	f00d f826 	bl	8010386 <osThreadNew>
 800333a:	4603      	mov	r3, r0
 800333c:	4a06      	ldr	r2, [pc, #24]	@ (8003358 <mqtt_cli_init+0x3c>)
 800333e:	6013      	str	r3, [r2, #0]
}
 8003340:	bf00      	nop
 8003342:	bd80      	pop	{r7, pc}
 8003344:	08030570 	.word	0x08030570
 8003348:	080028d5 	.word	0x080028d5
 800334c:	2400059c 	.word	0x2400059c
 8003350:	08030594 	.word	0x08030594
 8003354:	08002945 	.word	0x08002945
 8003358:	240005a0 	.word	0x240005a0

0800335c <WriteDataToBuffer>:
        buff[newBuffPos++] = (uint8_t)((uData >> (i * 8)) & 0xFF);
    }
    *buffPos = newBuffPos;
}

void WriteDataToBuffer (uint8_t* buff, uint16_t* buffPos, void* data, uint8_t dataSize) {
 800335c:	b480      	push	{r7}
 800335e:	b089      	sub	sp, #36	@ 0x24
 8003360:	af00      	add	r7, sp, #0
 8003362:	60f8      	str	r0, [r7, #12]
 8003364:	60b9      	str	r1, [r7, #8]
 8003366:	607a      	str	r2, [r7, #4]
 8003368:	70fb      	strb	r3, [r7, #3]
    uint32_t* uDataPtr = data;
 800336a:	687b      	ldr	r3, [r7, #4]
 800336c:	61bb      	str	r3, [r7, #24]
    uint32_t uData     = *uDataPtr;
 800336e:	69bb      	ldr	r3, [r7, #24]
 8003370:	681b      	ldr	r3, [r3, #0]
 8003372:	617b      	str	r3, [r7, #20]
    uint8_t i          = 0;
 8003374:	2300      	movs	r3, #0
 8003376:	77fb      	strb	r3, [r7, #31]
    uint8_t newBuffPos = *buffPos;
 8003378:	68bb      	ldr	r3, [r7, #8]
 800337a:	881b      	ldrh	r3, [r3, #0]
 800337c:	77bb      	strb	r3, [r7, #30]
    for (i = 0; i < dataSize; i++) {
 800337e:	2300      	movs	r3, #0
 8003380:	77fb      	strb	r3, [r7, #31]
 8003382:	e00e      	b.n	80033a2 <WriteDataToBuffer+0x46>
        buff[newBuffPos++] = (uint8_t)((uData >> (i * 8)) & 0xFF);
 8003384:	7ffb      	ldrb	r3, [r7, #31]
 8003386:	00db      	lsls	r3, r3, #3
 8003388:	697a      	ldr	r2, [r7, #20]
 800338a:	40da      	lsrs	r2, r3
 800338c:	7fbb      	ldrb	r3, [r7, #30]
 800338e:	1c59      	adds	r1, r3, #1
 8003390:	77b9      	strb	r1, [r7, #30]
 8003392:	4619      	mov	r1, r3
 8003394:	68fb      	ldr	r3, [r7, #12]
 8003396:	440b      	add	r3, r1
 8003398:	b2d2      	uxtb	r2, r2
 800339a:	701a      	strb	r2, [r3, #0]
    for (i = 0; i < dataSize; i++) {
 800339c:	7ffb      	ldrb	r3, [r7, #31]
 800339e:	3301      	adds	r3, #1
 80033a0:	77fb      	strb	r3, [r7, #31]
 80033a2:	7ffa      	ldrb	r2, [r7, #31]
 80033a4:	78fb      	ldrb	r3, [r7, #3]
 80033a6:	429a      	cmp	r2, r3
 80033a8:	d3ec      	bcc.n	8003384 <WriteDataToBuffer+0x28>
    }
    *buffPos = newBuffPos;
 80033aa:	7fbb      	ldrb	r3, [r7, #30]
 80033ac:	b29a      	uxth	r2, r3
 80033ae:	68bb      	ldr	r3, [r7, #8]
 80033b0:	801a      	strh	r2, [r3, #0]
}
 80033b2:	bf00      	nop
 80033b4:	3724      	adds	r7, #36	@ 0x24
 80033b6:	46bd      	mov	sp, r7
 80033b8:	f85d 7b04 	ldr.w	r7, [sp], #4
 80033bc:	4770      	bx	lr

080033be <ReadFloatFromBuffer>:

void ReadFloatFromBuffer(uint8_t* buff, uint16_t* buffPos, float* data)
{
 80033be:	b480      	push	{r7}
 80033c0:	b087      	sub	sp, #28
 80033c2:	af00      	add	r7, sp, #0
 80033c4:	60f8      	str	r0, [r7, #12]
 80033c6:	60b9      	str	r1, [r7, #8]
 80033c8:	607a      	str	r2, [r7, #4]
	uint32_t* word =  (uint32_t *)data;
 80033ca:	687b      	ldr	r3, [r7, #4]
 80033cc:	617b      	str	r3, [r7, #20]
	*word = CONVERT_BYTES_TO_WORD(&buff[*buffPos]);
 80033ce:	68bb      	ldr	r3, [r7, #8]
 80033d0:	881b      	ldrh	r3, [r3, #0]
 80033d2:	3303      	adds	r3, #3
 80033d4:	68fa      	ldr	r2, [r7, #12]
 80033d6:	4413      	add	r3, r2
 80033d8:	781b      	ldrb	r3, [r3, #0]
 80033da:	061a      	lsls	r2, r3, #24
 80033dc:	68bb      	ldr	r3, [r7, #8]
 80033de:	881b      	ldrh	r3, [r3, #0]
 80033e0:	3302      	adds	r3, #2
 80033e2:	68f9      	ldr	r1, [r7, #12]
 80033e4:	440b      	add	r3, r1
 80033e6:	781b      	ldrb	r3, [r3, #0]
 80033e8:	041b      	lsls	r3, r3, #16
 80033ea:	431a      	orrs	r2, r3
 80033ec:	68bb      	ldr	r3, [r7, #8]
 80033ee:	881b      	ldrh	r3, [r3, #0]
 80033f0:	3301      	adds	r3, #1
 80033f2:	68f9      	ldr	r1, [r7, #12]
 80033f4:	440b      	add	r3, r1
 80033f6:	781b      	ldrb	r3, [r3, #0]
 80033f8:	021b      	lsls	r3, r3, #8
 80033fa:	4313      	orrs	r3, r2
 80033fc:	68ba      	ldr	r2, [r7, #8]
 80033fe:	8812      	ldrh	r2, [r2, #0]
 8003400:	4611      	mov	r1, r2
 8003402:	68fa      	ldr	r2, [r7, #12]
 8003404:	440a      	add	r2, r1
 8003406:	7812      	ldrb	r2, [r2, #0]
 8003408:	4313      	orrs	r3, r2
 800340a:	461a      	mov	r2, r3
 800340c:	697b      	ldr	r3, [r7, #20]
 800340e:	601a      	str	r2, [r3, #0]
	*buffPos += sizeof(float);
 8003410:	68bb      	ldr	r3, [r7, #8]
 8003412:	881b      	ldrh	r3, [r3, #0]
 8003414:	3304      	adds	r3, #4
 8003416:	b29a      	uxth	r2, r3
 8003418:	68bb      	ldr	r3, [r7, #8]
 800341a:	801a      	strh	r2, [r3, #0]
}
 800341c:	bf00      	nop
 800341e:	371c      	adds	r7, #28
 8003420:	46bd      	mov	sp, r7
 8003422:	f85d 7b04 	ldr.w	r7, [sp], #4
 8003426:	4770      	bx	lr

08003428 <PrepareReqFrame>:

uint16_t PrepareReqFrame (uint8_t* txBuffer, uint16_t frameId, SerialProtocolCommands frameCommand, uint8_t* dataBuffer, uint16_t dataLength) {
 8003428:	b580      	push	{r7, lr}
 800342a:	b086      	sub	sp, #24
 800342c:	af00      	add	r7, sp, #0
 800342e:	60f8      	str	r0, [r7, #12]
 8003430:	607b      	str	r3, [r7, #4]
 8003432:	460b      	mov	r3, r1
 8003434:	817b      	strh	r3, [r7, #10]
 8003436:	4613      	mov	r3, r2
 8003438:	727b      	strb	r3, [r7, #9]
    uint16_t crc         = 0;
 800343a:	2300      	movs	r3, #0
 800343c:	82bb      	strh	r3, [r7, #20]
    uint16_t txBufferPos = 0;
 800343e:	2300      	movs	r3, #0
 8003440:	82fb      	strh	r3, [r7, #22]
    uint16_t frameCmd    = ((uint16_t)frameCommand);
 8003442:	7a7b      	ldrb	r3, [r7, #9]
 8003444:	827b      	strh	r3, [r7, #18]

    memset (txBuffer, 0x00, dataLength);
 8003446:	8c3b      	ldrh	r3, [r7, #32]
 8003448:	461a      	mov	r2, r3
 800344a:	2100      	movs	r1, #0
 800344c:	68f8      	ldr	r0, [r7, #12]
 800344e:	f026 f9ef 	bl	8029830 <memset>
    txBuffer[txBufferPos++] = FRAME_INDICATOR;
 8003452:	8afb      	ldrh	r3, [r7, #22]
 8003454:	1c5a      	adds	r2, r3, #1
 8003456:	82fa      	strh	r2, [r7, #22]
 8003458:	461a      	mov	r2, r3
 800345a:	68fb      	ldr	r3, [r7, #12]
 800345c:	4413      	add	r3, r2
 800345e:	22aa      	movs	r2, #170	@ 0xaa
 8003460:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_FIRST_BYTE (frameId);
 8003462:	8afb      	ldrh	r3, [r7, #22]
 8003464:	1c5a      	adds	r2, r3, #1
 8003466:	82fa      	strh	r2, [r7, #22]
 8003468:	461a      	mov	r2, r3
 800346a:	68fb      	ldr	r3, [r7, #12]
 800346c:	4413      	add	r3, r2
 800346e:	897a      	ldrh	r2, [r7, #10]
 8003470:	b2d2      	uxtb	r2, r2
 8003472:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_SECOND_BYTE (frameId);
 8003474:	897b      	ldrh	r3, [r7, #10]
 8003476:	0a1b      	lsrs	r3, r3, #8
 8003478:	b29a      	uxth	r2, r3
 800347a:	8afb      	ldrh	r3, [r7, #22]
 800347c:	1c59      	adds	r1, r3, #1
 800347e:	82f9      	strh	r1, [r7, #22]
 8003480:	4619      	mov	r1, r3
 8003482:	68fb      	ldr	r3, [r7, #12]
 8003484:	440b      	add	r3, r1
 8003486:	b2d2      	uxtb	r2, r2
 8003488:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_FIRST_BYTE (frameCmd);
 800348a:	8afb      	ldrh	r3, [r7, #22]
 800348c:	1c5a      	adds	r2, r3, #1
 800348e:	82fa      	strh	r2, [r7, #22]
 8003490:	461a      	mov	r2, r3
 8003492:	68fb      	ldr	r3, [r7, #12]
 8003494:	4413      	add	r3, r2
 8003496:	8a7a      	ldrh	r2, [r7, #18]
 8003498:	b2d2      	uxtb	r2, r2
 800349a:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_SECOND_BYTE (frameCmd);
 800349c:	8a7b      	ldrh	r3, [r7, #18]
 800349e:	0a1b      	lsrs	r3, r3, #8
 80034a0:	b29a      	uxth	r2, r3
 80034a2:	8afb      	ldrh	r3, [r7, #22]
 80034a4:	1c59      	adds	r1, r3, #1
 80034a6:	82f9      	strh	r1, [r7, #22]
 80034a8:	4619      	mov	r1, r3
 80034aa:	68fb      	ldr	r3, [r7, #12]
 80034ac:	440b      	add	r3, r1
 80034ae:	b2d2      	uxtb	r2, r2
 80034b0:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_FIRST_BYTE (dataLength);
 80034b2:	8afb      	ldrh	r3, [r7, #22]
 80034b4:	1c5a      	adds	r2, r3, #1
 80034b6:	82fa      	strh	r2, [r7, #22]
 80034b8:	461a      	mov	r2, r3
 80034ba:	68fb      	ldr	r3, [r7, #12]
 80034bc:	4413      	add	r3, r2
 80034be:	8c3a      	ldrh	r2, [r7, #32]
 80034c0:	b2d2      	uxtb	r2, r2
 80034c2:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_SECOND_BYTE (dataLength);
 80034c4:	8c3b      	ldrh	r3, [r7, #32]
 80034c6:	0a1b      	lsrs	r3, r3, #8
 80034c8:	b29a      	uxth	r2, r3
 80034ca:	8afb      	ldrh	r3, [r7, #22]
 80034cc:	1c59      	adds	r1, r3, #1
 80034ce:	82f9      	strh	r1, [r7, #22]
 80034d0:	4619      	mov	r1, r3
 80034d2:	68fb      	ldr	r3, [r7, #12]
 80034d4:	440b      	add	r3, r1
 80034d6:	b2d2      	uxtb	r2, r2
 80034d8:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = 0x00;
 80034da:	8afb      	ldrh	r3, [r7, #22]
 80034dc:	1c5a      	adds	r2, r3, #1
 80034de:	82fa      	strh	r2, [r7, #22]
 80034e0:	461a      	mov	r2, r3
 80034e2:	68fb      	ldr	r3, [r7, #12]
 80034e4:	4413      	add	r3, r2
 80034e6:	2200      	movs	r2, #0
 80034e8:	701a      	strb	r2, [r3, #0]
    if (dataLength > 0) {
 80034ea:	8c3b      	ldrh	r3, [r7, #32]
 80034ec:	2b00      	cmp	r3, #0
 80034ee:	d00b      	beq.n	8003508 <PrepareReqFrame+0xe0>
        memcpy (&txBuffer[txBufferPos], dataBuffer, dataLength);
 80034f0:	8afb      	ldrh	r3, [r7, #22]
 80034f2:	68fa      	ldr	r2, [r7, #12]
 80034f4:	4413      	add	r3, r2
 80034f6:	8c3a      	ldrh	r2, [r7, #32]
 80034f8:	6879      	ldr	r1, [r7, #4]
 80034fa:	4618      	mov	r0, r3
 80034fc:	f026 fa8f 	bl	8029a1e <memcpy>
        txBufferPos += dataLength;
 8003500:	8afa      	ldrh	r2, [r7, #22]
 8003502:	8c3b      	ldrh	r3, [r7, #32]
 8003504:	4413      	add	r3, r2
 8003506:	82fb      	strh	r3, [r7, #22]
    }
    crc = HAL_CRC_Calculate (&hcrc, (uint32_t*)txBuffer, txBufferPos);
 8003508:	8afb      	ldrh	r3, [r7, #22]
 800350a:	461a      	mov	r2, r3
 800350c:	68f9      	ldr	r1, [r7, #12]
 800350e:	480f      	ldr	r0, [pc, #60]	@ (800354c <PrepareReqFrame+0x124>)
 8003510:	f001 fd4a 	bl	8004fa8 <HAL_CRC_Calculate>
 8003514:	4603      	mov	r3, r0
 8003516:	82bb      	strh	r3, [r7, #20]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_FIRST_BYTE (crc);
 8003518:	8afb      	ldrh	r3, [r7, #22]
 800351a:	1c5a      	adds	r2, r3, #1
 800351c:	82fa      	strh	r2, [r7, #22]
 800351e:	461a      	mov	r2, r3
 8003520:	68fb      	ldr	r3, [r7, #12]
 8003522:	4413      	add	r3, r2
 8003524:	8aba      	ldrh	r2, [r7, #20]
 8003526:	b2d2      	uxtb	r2, r2
 8003528:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_SECOND_BYTE (crc);
 800352a:	8abb      	ldrh	r3, [r7, #20]
 800352c:	0a1b      	lsrs	r3, r3, #8
 800352e:	b29a      	uxth	r2, r3
 8003530:	8afb      	ldrh	r3, [r7, #22]
 8003532:	1c59      	adds	r1, r3, #1
 8003534:	82f9      	strh	r1, [r7, #22]
 8003536:	4619      	mov	r1, r3
 8003538:	68fb      	ldr	r3, [r7, #12]
 800353a:	440b      	add	r3, r1
 800353c:	b2d2      	uxtb	r2, r2
 800353e:	701a      	strb	r2, [r3, #0]

    return txBufferPos;
 8003540:	8afb      	ldrh	r3, [r7, #22]
}
 8003542:	4618      	mov	r0, r3
 8003544:	3718      	adds	r7, #24
 8003546:	46bd      	mov	sp, r7
 8003548:	bd80      	pop	{r7, pc}
 800354a:	bf00      	nop
 800354c:	24000234 	.word	0x24000234

08003550 <PrepareRespFrame>:

uint16_t PrepareRespFrame (uint8_t* txBuffer, uint16_t frameId, SerialProtocolCommands frameCommand, SerialProtocolRespStatus respStatus, uint8_t* dataBuffer, uint16_t dataLength) {
 8003550:	b580      	push	{r7, lr}
 8003552:	b084      	sub	sp, #16
 8003554:	af00      	add	r7, sp, #0
 8003556:	6078      	str	r0, [r7, #4]
 8003558:	4608      	mov	r0, r1
 800355a:	4611      	mov	r1, r2
 800355c:	461a      	mov	r2, r3
 800355e:	4603      	mov	r3, r0
 8003560:	807b      	strh	r3, [r7, #2]
 8003562:	460b      	mov	r3, r1
 8003564:	707b      	strb	r3, [r7, #1]
 8003566:	4613      	mov	r3, r2
 8003568:	703b      	strb	r3, [r7, #0]
    uint16_t crc         = 0;
 800356a:	2300      	movs	r3, #0
 800356c:	81bb      	strh	r3, [r7, #12]
    uint16_t txBufferPos = 0;
 800356e:	2300      	movs	r3, #0
 8003570:	81fb      	strh	r3, [r7, #14]
    uint16_t frameCmd = ((uint16_t)frameCommand) | 0x8000; // MSB set means response
 8003572:	787b      	ldrb	r3, [r7, #1]
 8003574:	b21a      	sxth	r2, r3
 8003576:	4b43      	ldr	r3, [pc, #268]	@ (8003684 <PrepareRespFrame+0x134>)
 8003578:	4313      	orrs	r3, r2
 800357a:	b21b      	sxth	r3, r3
 800357c:	817b      	strh	r3, [r7, #10]

    memset (txBuffer, 0x00, dataLength);
 800357e:	8bbb      	ldrh	r3, [r7, #28]
 8003580:	461a      	mov	r2, r3
 8003582:	2100      	movs	r1, #0
 8003584:	6878      	ldr	r0, [r7, #4]
 8003586:	f026 f953 	bl	8029830 <memset>
    txBuffer[txBufferPos++] = FRAME_INDICATOR;
 800358a:	89fb      	ldrh	r3, [r7, #14]
 800358c:	1c5a      	adds	r2, r3, #1
 800358e:	81fa      	strh	r2, [r7, #14]
 8003590:	461a      	mov	r2, r3
 8003592:	687b      	ldr	r3, [r7, #4]
 8003594:	4413      	add	r3, r2
 8003596:	22aa      	movs	r2, #170	@ 0xaa
 8003598:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_FIRST_BYTE (frameId);
 800359a:	89fb      	ldrh	r3, [r7, #14]
 800359c:	1c5a      	adds	r2, r3, #1
 800359e:	81fa      	strh	r2, [r7, #14]
 80035a0:	461a      	mov	r2, r3
 80035a2:	687b      	ldr	r3, [r7, #4]
 80035a4:	4413      	add	r3, r2
 80035a6:	887a      	ldrh	r2, [r7, #2]
 80035a8:	b2d2      	uxtb	r2, r2
 80035aa:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_SECOND_BYTE (frameId);
 80035ac:	887b      	ldrh	r3, [r7, #2]
 80035ae:	0a1b      	lsrs	r3, r3, #8
 80035b0:	b29a      	uxth	r2, r3
 80035b2:	89fb      	ldrh	r3, [r7, #14]
 80035b4:	1c59      	adds	r1, r3, #1
 80035b6:	81f9      	strh	r1, [r7, #14]
 80035b8:	4619      	mov	r1, r3
 80035ba:	687b      	ldr	r3, [r7, #4]
 80035bc:	440b      	add	r3, r1
 80035be:	b2d2      	uxtb	r2, r2
 80035c0:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_FIRST_BYTE (frameCmd);
 80035c2:	89fb      	ldrh	r3, [r7, #14]
 80035c4:	1c5a      	adds	r2, r3, #1
 80035c6:	81fa      	strh	r2, [r7, #14]
 80035c8:	461a      	mov	r2, r3
 80035ca:	687b      	ldr	r3, [r7, #4]
 80035cc:	4413      	add	r3, r2
 80035ce:	897a      	ldrh	r2, [r7, #10]
 80035d0:	b2d2      	uxtb	r2, r2
 80035d2:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_SECOND_BYTE (frameCmd);
 80035d4:	897b      	ldrh	r3, [r7, #10]
 80035d6:	0a1b      	lsrs	r3, r3, #8
 80035d8:	b29a      	uxth	r2, r3
 80035da:	89fb      	ldrh	r3, [r7, #14]
 80035dc:	1c59      	adds	r1, r3, #1
 80035de:	81f9      	strh	r1, [r7, #14]
 80035e0:	4619      	mov	r1, r3
 80035e2:	687b      	ldr	r3, [r7, #4]
 80035e4:	440b      	add	r3, r1
 80035e6:	b2d2      	uxtb	r2, r2
 80035e8:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_FIRST_BYTE (dataLength);
 80035ea:	89fb      	ldrh	r3, [r7, #14]
 80035ec:	1c5a      	adds	r2, r3, #1
 80035ee:	81fa      	strh	r2, [r7, #14]
 80035f0:	461a      	mov	r2, r3
 80035f2:	687b      	ldr	r3, [r7, #4]
 80035f4:	4413      	add	r3, r2
 80035f6:	8bba      	ldrh	r2, [r7, #28]
 80035f8:	b2d2      	uxtb	r2, r2
 80035fa:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_SECOND_BYTE (dataLength);
 80035fc:	8bbb      	ldrh	r3, [r7, #28]
 80035fe:	0a1b      	lsrs	r3, r3, #8
 8003600:	b29a      	uxth	r2, r3
 8003602:	89fb      	ldrh	r3, [r7, #14]
 8003604:	1c59      	adds	r1, r3, #1
 8003606:	81f9      	strh	r1, [r7, #14]
 8003608:	4619      	mov	r1, r3
 800360a:	687b      	ldr	r3, [r7, #4]
 800360c:	440b      	add	r3, r1
 800360e:	b2d2      	uxtb	r2, r2
 8003610:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = (uint8_t)respStatus;
 8003612:	89fb      	ldrh	r3, [r7, #14]
 8003614:	1c5a      	adds	r2, r3, #1
 8003616:	81fa      	strh	r2, [r7, #14]
 8003618:	461a      	mov	r2, r3
 800361a:	687b      	ldr	r3, [r7, #4]
 800361c:	4413      	add	r3, r2
 800361e:	783a      	ldrb	r2, [r7, #0]
 8003620:	701a      	strb	r2, [r3, #0]
    if (dataLength > 0) {
 8003622:	8bbb      	ldrh	r3, [r7, #28]
 8003624:	2b00      	cmp	r3, #0
 8003626:	d00b      	beq.n	8003640 <PrepareRespFrame+0xf0>
        memcpy (&txBuffer[txBufferPos], dataBuffer, dataLength);
 8003628:	89fb      	ldrh	r3, [r7, #14]
 800362a:	687a      	ldr	r2, [r7, #4]
 800362c:	4413      	add	r3, r2
 800362e:	8bba      	ldrh	r2, [r7, #28]
 8003630:	69b9      	ldr	r1, [r7, #24]
 8003632:	4618      	mov	r0, r3
 8003634:	f026 f9f3 	bl	8029a1e <memcpy>
        txBufferPos += dataLength;
 8003638:	89fa      	ldrh	r2, [r7, #14]
 800363a:	8bbb      	ldrh	r3, [r7, #28]
 800363c:	4413      	add	r3, r2
 800363e:	81fb      	strh	r3, [r7, #14]
    }
    crc = HAL_CRC_Calculate (&hcrc, (uint32_t*)txBuffer, txBufferPos);
 8003640:	89fb      	ldrh	r3, [r7, #14]
 8003642:	461a      	mov	r2, r3
 8003644:	6879      	ldr	r1, [r7, #4]
 8003646:	4810      	ldr	r0, [pc, #64]	@ (8003688 <PrepareRespFrame+0x138>)
 8003648:	f001 fcae 	bl	8004fa8 <HAL_CRC_Calculate>
 800364c:	4603      	mov	r3, r0
 800364e:	81bb      	strh	r3, [r7, #12]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_FIRST_BYTE (crc);
 8003650:	89fb      	ldrh	r3, [r7, #14]
 8003652:	1c5a      	adds	r2, r3, #1
 8003654:	81fa      	strh	r2, [r7, #14]
 8003656:	461a      	mov	r2, r3
 8003658:	687b      	ldr	r3, [r7, #4]
 800365a:	4413      	add	r3, r2
 800365c:	89ba      	ldrh	r2, [r7, #12]
 800365e:	b2d2      	uxtb	r2, r2
 8003660:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_SECOND_BYTE (crc);
 8003662:	89bb      	ldrh	r3, [r7, #12]
 8003664:	0a1b      	lsrs	r3, r3, #8
 8003666:	b29a      	uxth	r2, r3
 8003668:	89fb      	ldrh	r3, [r7, #14]
 800366a:	1c59      	adds	r1, r3, #1
 800366c:	81f9      	strh	r1, [r7, #14]
 800366e:	4619      	mov	r1, r3
 8003670:	687b      	ldr	r3, [r7, #4]
 8003672:	440b      	add	r3, r1
 8003674:	b2d2      	uxtb	r2, r2
 8003676:	701a      	strb	r2, [r3, #0]

    return txBufferPos;
 8003678:	89fb      	ldrh	r3, [r7, #14]
}
 800367a:	4618      	mov	r0, r3
 800367c:	3710      	adds	r7, #16
 800367e:	46bd      	mov	sp, r7
 8003680:	bd80      	pop	{r7, pc}
 8003682:	bf00      	nop
 8003684:	ffff8000 	.word	0xffff8000
 8003688:	24000234 	.word	0x24000234

0800368c <HAL_MspInit>:
/* USER CODE END 0 */
/**
  * Initializes the Global MSP.
  */
void HAL_MspInit(void)
{
 800368c:	b580      	push	{r7, lr}
 800368e:	b082      	sub	sp, #8
 8003690:	af00      	add	r7, sp, #0

  /* USER CODE BEGIN MspInit 0 */

  /* USER CODE END MspInit 0 */

  __HAL_RCC_SYSCFG_CLK_ENABLE();
 8003692:	4b10      	ldr	r3, [pc, #64]	@ (80036d4 <HAL_MspInit+0x48>)
 8003694:	f8d3 30f4 	ldr.w	r3, [r3, #244]	@ 0xf4
 8003698:	4a0e      	ldr	r2, [pc, #56]	@ (80036d4 <HAL_MspInit+0x48>)
 800369a:	f043 0302 	orr.w	r3, r3, #2
 800369e:	f8c2 30f4 	str.w	r3, [r2, #244]	@ 0xf4
 80036a2:	4b0c      	ldr	r3, [pc, #48]	@ (80036d4 <HAL_MspInit+0x48>)
 80036a4:	f8d3 30f4 	ldr.w	r3, [r3, #244]	@ 0xf4
 80036a8:	f003 0302 	and.w	r3, r3, #2
 80036ac:	607b      	str	r3, [r7, #4]
 80036ae:	687b      	ldr	r3, [r7, #4]

  /* System interrupt init*/
  /* PendSV_IRQn interrupt configuration */
  HAL_NVIC_SetPriority(PendSV_IRQn, 15, 0);
 80036b0:	2200      	movs	r2, #0
 80036b2:	210f      	movs	r1, #15
 80036b4:	f06f 0001 	mvn.w	r0, #1
 80036b8:	f001 fb72 	bl	8004da0 <HAL_NVIC_SetPriority>

  /* Peripheral interrupt init */
  /* RCC_IRQn interrupt configuration */
  HAL_NVIC_SetPriority(RCC_IRQn, 5, 0);
 80036bc:	2200      	movs	r2, #0
 80036be:	2105      	movs	r1, #5
 80036c0:	2005      	movs	r0, #5
 80036c2:	f001 fb6d 	bl	8004da0 <HAL_NVIC_SetPriority>
  HAL_NVIC_EnableIRQ(RCC_IRQn);
 80036c6:	2005      	movs	r0, #5
 80036c8:	f001 fb84 	bl	8004dd4 <HAL_NVIC_EnableIRQ>

  /* USER CODE BEGIN MspInit 1 */

  /* USER CODE END MspInit 1 */
}
 80036cc:	bf00      	nop
 80036ce:	3708      	adds	r7, #8
 80036d0:	46bd      	mov	sp, r7
 80036d2:	bd80      	pop	{r7, pc}
 80036d4:	58024400 	.word	0x58024400

080036d8 <HAL_CRC_MspInit>:
* This function configures the hardware resources used in this example
* @param hcrc: CRC handle pointer
* @retval None
*/
void HAL_CRC_MspInit(CRC_HandleTypeDef* hcrc)
{
 80036d8:	b480      	push	{r7}
 80036da:	b085      	sub	sp, #20
 80036dc:	af00      	add	r7, sp, #0
 80036de:	6078      	str	r0, [r7, #4]
  if(hcrc->Instance==CRC)
 80036e0:	687b      	ldr	r3, [r7, #4]
 80036e2:	681b      	ldr	r3, [r3, #0]
 80036e4:	4a0b      	ldr	r2, [pc, #44]	@ (8003714 <HAL_CRC_MspInit+0x3c>)
 80036e6:	4293      	cmp	r3, r2
 80036e8:	d10e      	bne.n	8003708 <HAL_CRC_MspInit+0x30>
  {
  /* USER CODE BEGIN CRC_MspInit 0 */

  /* USER CODE END CRC_MspInit 0 */
    /* Peripheral clock enable */
    __HAL_RCC_CRC_CLK_ENABLE();
 80036ea:	4b0b      	ldr	r3, [pc, #44]	@ (8003718 <HAL_CRC_MspInit+0x40>)
 80036ec:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 80036f0:	4a09      	ldr	r2, [pc, #36]	@ (8003718 <HAL_CRC_MspInit+0x40>)
 80036f2:	f443 2300 	orr.w	r3, r3, #524288	@ 0x80000
 80036f6:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 80036fa:	4b07      	ldr	r3, [pc, #28]	@ (8003718 <HAL_CRC_MspInit+0x40>)
 80036fc:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8003700:	f403 2300 	and.w	r3, r3, #524288	@ 0x80000
 8003704:	60fb      	str	r3, [r7, #12]
 8003706:	68fb      	ldr	r3, [r7, #12]
  /* USER CODE BEGIN CRC_MspInit 1 */

  /* USER CODE END CRC_MspInit 1 */
  }

}
 8003708:	bf00      	nop
 800370a:	3714      	adds	r7, #20
 800370c:	46bd      	mov	sp, r7
 800370e:	f85d 7b04 	ldr.w	r7, [sp], #4
 8003712:	4770      	bx	lr
 8003714:	58024c00 	.word	0x58024c00
 8003718:	58024400 	.word	0x58024400

0800371c <HAL_RNG_MspInit>:
* This function configures the hardware resources used in this example
* @param hrng: RNG handle pointer
* @retval None
*/
void HAL_RNG_MspInit(RNG_HandleTypeDef* hrng)
{
 800371c:	b580      	push	{r7, lr}
 800371e:	b0b4      	sub	sp, #208	@ 0xd0
 8003720:	af00      	add	r7, sp, #0
 8003722:	6078      	str	r0, [r7, #4]
  RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
 8003724:	f107 0310 	add.w	r3, r7, #16
 8003728:	22c0      	movs	r2, #192	@ 0xc0
 800372a:	2100      	movs	r1, #0
 800372c:	4618      	mov	r0, r3
 800372e:	f026 f87f 	bl	8029830 <memset>
  if(hrng->Instance==RNG)
 8003732:	687b      	ldr	r3, [r7, #4]
 8003734:	681b      	ldr	r3, [r3, #0]
 8003736:	4a14      	ldr	r2, [pc, #80]	@ (8003788 <HAL_RNG_MspInit+0x6c>)
 8003738:	4293      	cmp	r3, r2
 800373a:	d121      	bne.n	8003780 <HAL_RNG_MspInit+0x64>

  /* USER CODE END RNG_MspInit 0 */

  /** Initializes the peripherals clock
  */
    PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RNG;
 800373c:	f44f 3200 	mov.w	r2, #131072	@ 0x20000
 8003740:	f04f 0300 	mov.w	r3, #0
 8003744:	e9c7 2304 	strd	r2, r3, [r7, #16]
    PeriphClkInitStruct.RngClockSelection = RCC_RNGCLKSOURCE_HSI48;
 8003748:	2300      	movs	r3, #0
 800374a:	f8c7 3090 	str.w	r3, [r7, #144]	@ 0x90
    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
 800374e:	f107 0310 	add.w	r3, r7, #16
 8003752:	4618      	mov	r0, r3
 8003754:	f006 ff78 	bl	800a648 <HAL_RCCEx_PeriphCLKConfig>
 8003758:	4603      	mov	r3, r0
 800375a:	2b00      	cmp	r3, #0
 800375c:	d001      	beq.n	8003762 <HAL_RNG_MspInit+0x46>
    {
      Error_Handler();
 800375e:	f7fe fd7b 	bl	8002258 <Error_Handler>
    }

    /* Peripheral clock enable */
    __HAL_RCC_RNG_CLK_ENABLE();
 8003762:	4b0a      	ldr	r3, [pc, #40]	@ (800378c <HAL_RNG_MspInit+0x70>)
 8003764:	f8d3 30dc 	ldr.w	r3, [r3, #220]	@ 0xdc
 8003768:	4a08      	ldr	r2, [pc, #32]	@ (800378c <HAL_RNG_MspInit+0x70>)
 800376a:	f043 0340 	orr.w	r3, r3, #64	@ 0x40
 800376e:	f8c2 30dc 	str.w	r3, [r2, #220]	@ 0xdc
 8003772:	4b06      	ldr	r3, [pc, #24]	@ (800378c <HAL_RNG_MspInit+0x70>)
 8003774:	f8d3 30dc 	ldr.w	r3, [r3, #220]	@ 0xdc
 8003778:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 800377c:	60fb      	str	r3, [r7, #12]
 800377e:	68fb      	ldr	r3, [r7, #12]
  /* USER CODE BEGIN RNG_MspInit 1 */

  /* USER CODE END RNG_MspInit 1 */
  }

}
 8003780:	bf00      	nop
 8003782:	37d0      	adds	r7, #208	@ 0xd0
 8003784:	46bd      	mov	sp, r7
 8003786:	bd80      	pop	{r7, pc}
 8003788:	48021800 	.word	0x48021800
 800378c:	58024400 	.word	0x58024400

08003790 <HAL_UART_MspInit>:
* This function configures the hardware resources used in this example
* @param huart: UART handle pointer
* @retval None
*/
void HAL_UART_MspInit(UART_HandleTypeDef* huart)
{
 8003790:	b580      	push	{r7, lr}
 8003792:	b0ba      	sub	sp, #232	@ 0xe8
 8003794:	af00      	add	r7, sp, #0
 8003796:	6078      	str	r0, [r7, #4]
  GPIO_InitTypeDef GPIO_InitStruct = {0};
 8003798:	f107 03d4 	add.w	r3, r7, #212	@ 0xd4
 800379c:	2200      	movs	r2, #0
 800379e:	601a      	str	r2, [r3, #0]
 80037a0:	605a      	str	r2, [r3, #4]
 80037a2:	609a      	str	r2, [r3, #8]
 80037a4:	60da      	str	r2, [r3, #12]
 80037a6:	611a      	str	r2, [r3, #16]
  RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
 80037a8:	f107 0310 	add.w	r3, r7, #16
 80037ac:	22c0      	movs	r2, #192	@ 0xc0
 80037ae:	2100      	movs	r1, #0
 80037b0:	4618      	mov	r0, r3
 80037b2:	f026 f83d 	bl	8029830 <memset>
  if(huart->Instance==UART8)
 80037b6:	687b      	ldr	r3, [r7, #4]
 80037b8:	681b      	ldr	r3, [r3, #0]
 80037ba:	4a59      	ldr	r2, [pc, #356]	@ (8003920 <HAL_UART_MspInit+0x190>)
 80037bc:	4293      	cmp	r3, r2
 80037be:	f040 80ab 	bne.w	8003918 <HAL_UART_MspInit+0x188>

  /* USER CODE END UART8_MspInit 0 */

  /** Initializes the peripherals clock
  */
    PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_UART8;
 80037c2:	f04f 0202 	mov.w	r2, #2
 80037c6:	f04f 0300 	mov.w	r3, #0
 80037ca:	e9c7 2304 	strd	r2, r3, [r7, #16]
    PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1;
 80037ce:	2300      	movs	r3, #0
 80037d0:	f8c7 3088 	str.w	r3, [r7, #136]	@ 0x88
    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
 80037d4:	f107 0310 	add.w	r3, r7, #16
 80037d8:	4618      	mov	r0, r3
 80037da:	f006 ff35 	bl	800a648 <HAL_RCCEx_PeriphCLKConfig>
 80037de:	4603      	mov	r3, r0
 80037e0:	2b00      	cmp	r3, #0
 80037e2:	d001      	beq.n	80037e8 <HAL_UART_MspInit+0x58>
    {
      Error_Handler();
 80037e4:	f7fe fd38 	bl	8002258 <Error_Handler>
    }

    /* Peripheral clock enable */
    __HAL_RCC_UART8_CLK_ENABLE();
 80037e8:	4b4e      	ldr	r3, [pc, #312]	@ (8003924 <HAL_UART_MspInit+0x194>)
 80037ea:	f8d3 30e8 	ldr.w	r3, [r3, #232]	@ 0xe8
 80037ee:	4a4d      	ldr	r2, [pc, #308]	@ (8003924 <HAL_UART_MspInit+0x194>)
 80037f0:	f043 4300 	orr.w	r3, r3, #2147483648	@ 0x80000000
 80037f4:	f8c2 30e8 	str.w	r3, [r2, #232]	@ 0xe8
 80037f8:	4b4a      	ldr	r3, [pc, #296]	@ (8003924 <HAL_UART_MspInit+0x194>)
 80037fa:	f8d3 30e8 	ldr.w	r3, [r3, #232]	@ 0xe8
 80037fe:	f003 4300 	and.w	r3, r3, #2147483648	@ 0x80000000
 8003802:	60fb      	str	r3, [r7, #12]
 8003804:	68fb      	ldr	r3, [r7, #12]

    __HAL_RCC_GPIOE_CLK_ENABLE();
 8003806:	4b47      	ldr	r3, [pc, #284]	@ (8003924 <HAL_UART_MspInit+0x194>)
 8003808:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 800380c:	4a45      	ldr	r2, [pc, #276]	@ (8003924 <HAL_UART_MspInit+0x194>)
 800380e:	f043 0310 	orr.w	r3, r3, #16
 8003812:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 8003816:	4b43      	ldr	r3, [pc, #268]	@ (8003924 <HAL_UART_MspInit+0x194>)
 8003818:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 800381c:	f003 0310 	and.w	r3, r3, #16
 8003820:	60bb      	str	r3, [r7, #8]
 8003822:	68bb      	ldr	r3, [r7, #8]
    /**UART8 GPIO Configuration
    PE0     ------> UART8_RX
    PE1     ------> UART8_TX
    */
    GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1;
 8003824:	2303      	movs	r3, #3
 8003826:	f8c7 30d4 	str.w	r3, [r7, #212]	@ 0xd4
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 800382a:	2302      	movs	r3, #2
 800382c:	f8c7 30d8 	str.w	r3, [r7, #216]	@ 0xd8
    GPIO_InitStruct.Pull = GPIO_NOPULL;
 8003830:	2300      	movs	r3, #0
 8003832:	f8c7 30dc 	str.w	r3, [r7, #220]	@ 0xdc
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 8003836:	2300      	movs	r3, #0
 8003838:	f8c7 30e0 	str.w	r3, [r7, #224]	@ 0xe0
    GPIO_InitStruct.Alternate = GPIO_AF8_UART8;
 800383c:	2308      	movs	r3, #8
 800383e:	f8c7 30e4 	str.w	r3, [r7, #228]	@ 0xe4
    HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
 8003842:	f107 03d4 	add.w	r3, r7, #212	@ 0xd4
 8003846:	4619      	mov	r1, r3
 8003848:	4837      	ldr	r0, [pc, #220]	@ (8003928 <HAL_UART_MspInit+0x198>)
 800384a:	f005 fcd1 	bl	80091f0 <HAL_GPIO_Init>

    /* UART8 DMA Init */
    /* UART8_RX Init */
    hdma_uart8_rx.Instance = DMA2_Stream7;
 800384e:	4b37      	ldr	r3, [pc, #220]	@ (800392c <HAL_UART_MspInit+0x19c>)
 8003850:	4a37      	ldr	r2, [pc, #220]	@ (8003930 <HAL_UART_MspInit+0x1a0>)
 8003852:	601a      	str	r2, [r3, #0]
    hdma_uart8_rx.Init.Request = DMA_REQUEST_UART8_RX;
 8003854:	4b35      	ldr	r3, [pc, #212]	@ (800392c <HAL_UART_MspInit+0x19c>)
 8003856:	2251      	movs	r2, #81	@ 0x51
 8003858:	605a      	str	r2, [r3, #4]
    hdma_uart8_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
 800385a:	4b34      	ldr	r3, [pc, #208]	@ (800392c <HAL_UART_MspInit+0x19c>)
 800385c:	2200      	movs	r2, #0
 800385e:	609a      	str	r2, [r3, #8]
    hdma_uart8_rx.Init.PeriphInc = DMA_PINC_DISABLE;
 8003860:	4b32      	ldr	r3, [pc, #200]	@ (800392c <HAL_UART_MspInit+0x19c>)
 8003862:	2200      	movs	r2, #0
 8003864:	60da      	str	r2, [r3, #12]
    hdma_uart8_rx.Init.MemInc = DMA_MINC_ENABLE;
 8003866:	4b31      	ldr	r3, [pc, #196]	@ (800392c <HAL_UART_MspInit+0x19c>)
 8003868:	f44f 6280 	mov.w	r2, #1024	@ 0x400
 800386c:	611a      	str	r2, [r3, #16]
    hdma_uart8_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
 800386e:	4b2f      	ldr	r3, [pc, #188]	@ (800392c <HAL_UART_MspInit+0x19c>)
 8003870:	2200      	movs	r2, #0
 8003872:	615a      	str	r2, [r3, #20]
    hdma_uart8_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
 8003874:	4b2d      	ldr	r3, [pc, #180]	@ (800392c <HAL_UART_MspInit+0x19c>)
 8003876:	2200      	movs	r2, #0
 8003878:	619a      	str	r2, [r3, #24]
    hdma_uart8_rx.Init.Mode = DMA_NORMAL;
 800387a:	4b2c      	ldr	r3, [pc, #176]	@ (800392c <HAL_UART_MspInit+0x19c>)
 800387c:	2200      	movs	r2, #0
 800387e:	61da      	str	r2, [r3, #28]
    hdma_uart8_rx.Init.Priority = DMA_PRIORITY_VERY_HIGH;
 8003880:	4b2a      	ldr	r3, [pc, #168]	@ (800392c <HAL_UART_MspInit+0x19c>)
 8003882:	f44f 3240 	mov.w	r2, #196608	@ 0x30000
 8003886:	621a      	str	r2, [r3, #32]
    hdma_uart8_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
 8003888:	4b28      	ldr	r3, [pc, #160]	@ (800392c <HAL_UART_MspInit+0x19c>)
 800388a:	2200      	movs	r2, #0
 800388c:	625a      	str	r2, [r3, #36]	@ 0x24
    if (HAL_DMA_Init(&hdma_uart8_rx) != HAL_OK)
 800388e:	4827      	ldr	r0, [pc, #156]	@ (800392c <HAL_UART_MspInit+0x19c>)
 8003890:	f001 fd2c 	bl	80052ec <HAL_DMA_Init>
 8003894:	4603      	mov	r3, r0
 8003896:	2b00      	cmp	r3, #0
 8003898:	d001      	beq.n	800389e <HAL_UART_MspInit+0x10e>
    {
      Error_Handler();
 800389a:	f7fe fcdd 	bl	8002258 <Error_Handler>
    }

    __HAL_LINKDMA(huart,hdmarx,hdma_uart8_rx);
 800389e:	687b      	ldr	r3, [r7, #4]
 80038a0:	4a22      	ldr	r2, [pc, #136]	@ (800392c <HAL_UART_MspInit+0x19c>)
 80038a2:	f8c3 2080 	str.w	r2, [r3, #128]	@ 0x80
 80038a6:	4a21      	ldr	r2, [pc, #132]	@ (800392c <HAL_UART_MspInit+0x19c>)
 80038a8:	687b      	ldr	r3, [r7, #4]
 80038aa:	6393      	str	r3, [r2, #56]	@ 0x38

    /* UART8_TX Init */
    hdma_uart8_tx.Instance = DMA2_Stream6;
 80038ac:	4b21      	ldr	r3, [pc, #132]	@ (8003934 <HAL_UART_MspInit+0x1a4>)
 80038ae:	4a22      	ldr	r2, [pc, #136]	@ (8003938 <HAL_UART_MspInit+0x1a8>)
 80038b0:	601a      	str	r2, [r3, #0]
    hdma_uart8_tx.Init.Request = DMA_REQUEST_UART8_TX;
 80038b2:	4b20      	ldr	r3, [pc, #128]	@ (8003934 <HAL_UART_MspInit+0x1a4>)
 80038b4:	2252      	movs	r2, #82	@ 0x52
 80038b6:	605a      	str	r2, [r3, #4]
    hdma_uart8_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
 80038b8:	4b1e      	ldr	r3, [pc, #120]	@ (8003934 <HAL_UART_MspInit+0x1a4>)
 80038ba:	2240      	movs	r2, #64	@ 0x40
 80038bc:	609a      	str	r2, [r3, #8]
    hdma_uart8_tx.Init.PeriphInc = DMA_PINC_DISABLE;
 80038be:	4b1d      	ldr	r3, [pc, #116]	@ (8003934 <HAL_UART_MspInit+0x1a4>)
 80038c0:	2200      	movs	r2, #0
 80038c2:	60da      	str	r2, [r3, #12]
    hdma_uart8_tx.Init.MemInc = DMA_MINC_ENABLE;
 80038c4:	4b1b      	ldr	r3, [pc, #108]	@ (8003934 <HAL_UART_MspInit+0x1a4>)
 80038c6:	f44f 6280 	mov.w	r2, #1024	@ 0x400
 80038ca:	611a      	str	r2, [r3, #16]
    hdma_uart8_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
 80038cc:	4b19      	ldr	r3, [pc, #100]	@ (8003934 <HAL_UART_MspInit+0x1a4>)
 80038ce:	2200      	movs	r2, #0
 80038d0:	615a      	str	r2, [r3, #20]
    hdma_uart8_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
 80038d2:	4b18      	ldr	r3, [pc, #96]	@ (8003934 <HAL_UART_MspInit+0x1a4>)
 80038d4:	2200      	movs	r2, #0
 80038d6:	619a      	str	r2, [r3, #24]
    hdma_uart8_tx.Init.Mode = DMA_NORMAL;
 80038d8:	4b16      	ldr	r3, [pc, #88]	@ (8003934 <HAL_UART_MspInit+0x1a4>)
 80038da:	2200      	movs	r2, #0
 80038dc:	61da      	str	r2, [r3, #28]
    hdma_uart8_tx.Init.Priority = DMA_PRIORITY_VERY_HIGH;
 80038de:	4b15      	ldr	r3, [pc, #84]	@ (8003934 <HAL_UART_MspInit+0x1a4>)
 80038e0:	f44f 3240 	mov.w	r2, #196608	@ 0x30000
 80038e4:	621a      	str	r2, [r3, #32]
    hdma_uart8_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
 80038e6:	4b13      	ldr	r3, [pc, #76]	@ (8003934 <HAL_UART_MspInit+0x1a4>)
 80038e8:	2200      	movs	r2, #0
 80038ea:	625a      	str	r2, [r3, #36]	@ 0x24
    if (HAL_DMA_Init(&hdma_uart8_tx) != HAL_OK)
 80038ec:	4811      	ldr	r0, [pc, #68]	@ (8003934 <HAL_UART_MspInit+0x1a4>)
 80038ee:	f001 fcfd 	bl	80052ec <HAL_DMA_Init>
 80038f2:	4603      	mov	r3, r0
 80038f4:	2b00      	cmp	r3, #0
 80038f6:	d001      	beq.n	80038fc <HAL_UART_MspInit+0x16c>
    {
      Error_Handler();
 80038f8:	f7fe fcae 	bl	8002258 <Error_Handler>
    }

    __HAL_LINKDMA(huart,hdmatx,hdma_uart8_tx);
 80038fc:	687b      	ldr	r3, [r7, #4]
 80038fe:	4a0d      	ldr	r2, [pc, #52]	@ (8003934 <HAL_UART_MspInit+0x1a4>)
 8003900:	67da      	str	r2, [r3, #124]	@ 0x7c
 8003902:	4a0c      	ldr	r2, [pc, #48]	@ (8003934 <HAL_UART_MspInit+0x1a4>)
 8003904:	687b      	ldr	r3, [r7, #4]
 8003906:	6393      	str	r3, [r2, #56]	@ 0x38

    /* UART8 interrupt Init */
    HAL_NVIC_SetPriority(UART8_IRQn, 5, 0);
 8003908:	2200      	movs	r2, #0
 800390a:	2105      	movs	r1, #5
 800390c:	2053      	movs	r0, #83	@ 0x53
 800390e:	f001 fa47 	bl	8004da0 <HAL_NVIC_SetPriority>
    HAL_NVIC_EnableIRQ(UART8_IRQn);
 8003912:	2053      	movs	r0, #83	@ 0x53
 8003914:	f001 fa5e 	bl	8004dd4 <HAL_NVIC_EnableIRQ>
  /* USER CODE BEGIN UART8_MspInit 1 */

  /* USER CODE END UART8_MspInit 1 */
  }

}
 8003918:	bf00      	nop
 800391a:	37e8      	adds	r7, #232	@ 0xe8
 800391c:	46bd      	mov	sp, r7
 800391e:	bd80      	pop	{r7, pc}
 8003920:	40007c00 	.word	0x40007c00
 8003924:	58024400 	.word	0x58024400
 8003928:	58021000 	.word	0x58021000
 800392c:	24000300 	.word	0x24000300
 8003930:	400204b8 	.word	0x400204b8
 8003934:	24000378 	.word	0x24000378
 8003938:	400204a0 	.word	0x400204a0

0800393c <HAL_InitTick>:
  *         reset by HAL_Init() or at any time when clock is configured, by HAL_RCC_ClockConfig().
  * @param  TickPriority: Tick interrupt priority.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
{
 800393c:	b580      	push	{r7, lr}
 800393e:	b090      	sub	sp, #64	@ 0x40
 8003940:	af00      	add	r7, sp, #0
 8003942:	6078      	str	r0, [r7, #4]
  uint32_t              uwTimclock, uwAPB1Prescaler;

  uint32_t              uwPrescalerValue;
  uint32_t              pFLatency;
/*Configure the TIM6 IRQ priority */
  if (TickPriority < (1UL << __NVIC_PRIO_BITS))
 8003944:	687b      	ldr	r3, [r7, #4]
 8003946:	2b0f      	cmp	r3, #15
 8003948:	d827      	bhi.n	800399a <HAL_InitTick+0x5e>
  {
  HAL_NVIC_SetPriority(TIM6_DAC_IRQn, TickPriority ,0U);
 800394a:	2200      	movs	r2, #0
 800394c:	6879      	ldr	r1, [r7, #4]
 800394e:	2036      	movs	r0, #54	@ 0x36
 8003950:	f001 fa26 	bl	8004da0 <HAL_NVIC_SetPriority>

  /* Enable the TIM6 global Interrupt */
  HAL_NVIC_EnableIRQ(TIM6_DAC_IRQn);
 8003954:	2036      	movs	r0, #54	@ 0x36
 8003956:	f001 fa3d 	bl	8004dd4 <HAL_NVIC_EnableIRQ>
    uwTickPrio = TickPriority;
 800395a:	4a29      	ldr	r2, [pc, #164]	@ (8003a00 <HAL_InitTick+0xc4>)
 800395c:	687b      	ldr	r3, [r7, #4]
 800395e:	6013      	str	r3, [r2, #0]
  {
    return HAL_ERROR;
  }

  /* Enable TIM6 clock */
  __HAL_RCC_TIM6_CLK_ENABLE();
 8003960:	4b28      	ldr	r3, [pc, #160]	@ (8003a04 <HAL_InitTick+0xc8>)
 8003962:	f8d3 30e8 	ldr.w	r3, [r3, #232]	@ 0xe8
 8003966:	4a27      	ldr	r2, [pc, #156]	@ (8003a04 <HAL_InitTick+0xc8>)
 8003968:	f043 0310 	orr.w	r3, r3, #16
 800396c:	f8c2 30e8 	str.w	r3, [r2, #232]	@ 0xe8
 8003970:	4b24      	ldr	r3, [pc, #144]	@ (8003a04 <HAL_InitTick+0xc8>)
 8003972:	f8d3 30e8 	ldr.w	r3, [r3, #232]	@ 0xe8
 8003976:	f003 0310 	and.w	r3, r3, #16
 800397a:	60fb      	str	r3, [r7, #12]
 800397c:	68fb      	ldr	r3, [r7, #12]

  /* Get clock configuration */
  HAL_RCC_GetClockConfig(&clkconfig, &pFLatency);
 800397e:	f107 0210 	add.w	r2, r7, #16
 8003982:	f107 0314 	add.w	r3, r7, #20
 8003986:	4611      	mov	r1, r2
 8003988:	4618      	mov	r0, r3
 800398a:	f006 fe1b 	bl	800a5c4 <HAL_RCC_GetClockConfig>

  /* Get APB1 prescaler */
  uwAPB1Prescaler = clkconfig.APB1CLKDivider;
 800398e:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8003990:	63bb      	str	r3, [r7, #56]	@ 0x38
  /* Compute TIM6 clock */
  if (uwAPB1Prescaler == RCC_HCLK_DIV1)
 8003992:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8003994:	2b00      	cmp	r3, #0
 8003996:	d106      	bne.n	80039a6 <HAL_InitTick+0x6a>
 8003998:	e001      	b.n	800399e <HAL_InitTick+0x62>
    return HAL_ERROR;
 800399a:	2301      	movs	r3, #1
 800399c:	e02b      	b.n	80039f6 <HAL_InitTick+0xba>
  {
    uwTimclock = HAL_RCC_GetPCLK1Freq();
 800399e:	f006 fde5 	bl	800a56c <HAL_RCC_GetPCLK1Freq>
 80039a2:	63f8      	str	r0, [r7, #60]	@ 0x3c
 80039a4:	e004      	b.n	80039b0 <HAL_InitTick+0x74>
  }
  else
  {
    uwTimclock = 2UL * HAL_RCC_GetPCLK1Freq();
 80039a6:	f006 fde1 	bl	800a56c <HAL_RCC_GetPCLK1Freq>
 80039aa:	4603      	mov	r3, r0
 80039ac:	005b      	lsls	r3, r3, #1
 80039ae:	63fb      	str	r3, [r7, #60]	@ 0x3c
  }

  /* Compute the prescaler value to have TIM6 counter clock equal to 1MHz */
  uwPrescalerValue = (uint32_t) ((uwTimclock / 1000000U) - 1U);
 80039b0:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 80039b2:	4a15      	ldr	r2, [pc, #84]	@ (8003a08 <HAL_InitTick+0xcc>)
 80039b4:	fba2 2303 	umull	r2, r3, r2, r3
 80039b8:	0c9b      	lsrs	r3, r3, #18
 80039ba:	3b01      	subs	r3, #1
 80039bc:	637b      	str	r3, [r7, #52]	@ 0x34

  /* Initialize TIM6 */
  htim6.Instance = TIM6;
 80039be:	4b13      	ldr	r3, [pc, #76]	@ (8003a0c <HAL_InitTick+0xd0>)
 80039c0:	4a13      	ldr	r2, [pc, #76]	@ (8003a10 <HAL_InitTick+0xd4>)
 80039c2:	601a      	str	r2, [r3, #0]
  + Period = [(TIM6CLK/1000) - 1]. to have a (1/1000) s time base.
  + Prescaler = (uwTimclock/1000000 - 1) to have a 1MHz counter clock.
  + ClockDivision = 0
  + Counter direction = Up
  */
  htim6.Init.Period = (1000000U / 1000U) - 1U;
 80039c4:	4b11      	ldr	r3, [pc, #68]	@ (8003a0c <HAL_InitTick+0xd0>)
 80039c6:	f240 32e7 	movw	r2, #999	@ 0x3e7
 80039ca:	60da      	str	r2, [r3, #12]
  htim6.Init.Prescaler = uwPrescalerValue;
 80039cc:	4a0f      	ldr	r2, [pc, #60]	@ (8003a0c <HAL_InitTick+0xd0>)
 80039ce:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 80039d0:	6053      	str	r3, [r2, #4]
  htim6.Init.ClockDivision = 0;
 80039d2:	4b0e      	ldr	r3, [pc, #56]	@ (8003a0c <HAL_InitTick+0xd0>)
 80039d4:	2200      	movs	r2, #0
 80039d6:	611a      	str	r2, [r3, #16]
  htim6.Init.CounterMode = TIM_COUNTERMODE_UP;
 80039d8:	4b0c      	ldr	r3, [pc, #48]	@ (8003a0c <HAL_InitTick+0xd0>)
 80039da:	2200      	movs	r2, #0
 80039dc:	609a      	str	r2, [r3, #8]

  if(HAL_TIM_Base_Init(&htim6) == HAL_OK)
 80039de:	480b      	ldr	r0, [pc, #44]	@ (8003a0c <HAL_InitTick+0xd0>)
 80039e0:	f008 fcfa 	bl	800c3d8 <HAL_TIM_Base_Init>
 80039e4:	4603      	mov	r3, r0
 80039e6:	2b00      	cmp	r3, #0
 80039e8:	d104      	bne.n	80039f4 <HAL_InitTick+0xb8>
  {
    /* Start the TIM time Base generation in interrupt mode */
    return HAL_TIM_Base_Start_IT(&htim6);
 80039ea:	4808      	ldr	r0, [pc, #32]	@ (8003a0c <HAL_InitTick+0xd0>)
 80039ec:	f008 fd56 	bl	800c49c <HAL_TIM_Base_Start_IT>
 80039f0:	4603      	mov	r3, r0
 80039f2:	e000      	b.n	80039f6 <HAL_InitTick+0xba>
  }

  /* Return function status */
  return HAL_ERROR;
 80039f4:	2301      	movs	r3, #1
}
 80039f6:	4618      	mov	r0, r3
 80039f8:	3740      	adds	r7, #64	@ 0x40
 80039fa:	46bd      	mov	sp, r7
 80039fc:	bd80      	pop	{r7, pc}
 80039fe:	bf00      	nop
 8003a00:	24000018 	.word	0x24000018
 8003a04:	58024400 	.word	0x58024400
 8003a08:	431bde83 	.word	0x431bde83
 8003a0c:	24000e20 	.word	0x24000e20
 8003a10:	40001000 	.word	0x40001000

08003a14 <NMI_Handler>:
/******************************************************************************/
/**
  * @brief This function handles Non maskable interrupt.
  */
void NMI_Handler(void)
{
 8003a14:	b480      	push	{r7}
 8003a16:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */

  /* USER CODE END NonMaskableInt_IRQn 0 */
  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
   while (1)
 8003a18:	bf00      	nop
 8003a1a:	e7fd      	b.n	8003a18 <NMI_Handler+0x4>

08003a1c <HardFault_Handler>:

/**
  * @brief This function handles Hard fault interrupt.
  */
void HardFault_Handler(void)
{
 8003a1c:	b480      	push	{r7}
 8003a1e:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN HardFault_IRQn 0 */

  /* USER CODE END HardFault_IRQn 0 */
  while (1)
 8003a20:	bf00      	nop
 8003a22:	e7fd      	b.n	8003a20 <HardFault_Handler+0x4>

08003a24 <MemManage_Handler>:

/**
  * @brief This function handles Memory management fault.
  */
void MemManage_Handler(void)
{
 8003a24:	b480      	push	{r7}
 8003a26:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN MemoryManagement_IRQn 0 */

  /* USER CODE END MemoryManagement_IRQn 0 */
  while (1)
 8003a28:	bf00      	nop
 8003a2a:	e7fd      	b.n	8003a28 <MemManage_Handler+0x4>

08003a2c <BusFault_Handler>:

/**
  * @brief This function handles Pre-fetch fault, memory access fault.
  */
void BusFault_Handler(void)
{
 8003a2c:	b480      	push	{r7}
 8003a2e:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN BusFault_IRQn 0 */

  /* USER CODE END BusFault_IRQn 0 */
  while (1)
 8003a30:	bf00      	nop
 8003a32:	e7fd      	b.n	8003a30 <BusFault_Handler+0x4>

08003a34 <UsageFault_Handler>:

/**
  * @brief This function handles Undefined instruction or illegal state.
  */
void UsageFault_Handler(void)
{
 8003a34:	b480      	push	{r7}
 8003a36:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN UsageFault_IRQn 0 */

  /* USER CODE END UsageFault_IRQn 0 */
  while (1)
 8003a38:	bf00      	nop
 8003a3a:	e7fd      	b.n	8003a38 <UsageFault_Handler+0x4>

08003a3c <DebugMon_Handler>:

/**
  * @brief This function handles Debug monitor.
  */
void DebugMon_Handler(void)
{
 8003a3c:	b480      	push	{r7}
 8003a3e:	af00      	add	r7, sp, #0

  /* USER CODE END DebugMonitor_IRQn 0 */
  /* USER CODE BEGIN DebugMonitor_IRQn 1 */

  /* USER CODE END DebugMonitor_IRQn 1 */
}
 8003a40:	bf00      	nop
 8003a42:	46bd      	mov	sp, r7
 8003a44:	f85d 7b04 	ldr.w	r7, [sp], #4
 8003a48:	4770      	bx	lr

08003a4a <RCC_IRQHandler>:

/**
  * @brief This function handles RCC global interrupt.
  */
void RCC_IRQHandler(void)
{
 8003a4a:	b480      	push	{r7}
 8003a4c:	af00      	add	r7, sp, #0

  /* USER CODE END RCC_IRQn 0 */
  /* USER CODE BEGIN RCC_IRQn 1 */

  /* USER CODE END RCC_IRQn 1 */
}
 8003a4e:	bf00      	nop
 8003a50:	46bd      	mov	sp, r7
 8003a52:	f85d 7b04 	ldr.w	r7, [sp], #4
 8003a56:	4770      	bx	lr

08003a58 <TIM6_DAC_IRQHandler>:

/**
  * @brief This function handles TIM6 global interrupt, DAC1_CH1 and DAC1_CH2 underrun error interrupts.
  */
void TIM6_DAC_IRQHandler(void)
{
 8003a58:	b580      	push	{r7, lr}
 8003a5a:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN TIM6_DAC_IRQn 0 */

  /* USER CODE END TIM6_DAC_IRQn 0 */
  HAL_TIM_IRQHandler(&htim6);
 8003a5c:	4802      	ldr	r0, [pc, #8]	@ (8003a68 <TIM6_DAC_IRQHandler+0x10>)
 8003a5e:	f008 fd95 	bl	800c58c <HAL_TIM_IRQHandler>
  /* USER CODE BEGIN TIM6_DAC_IRQn 1 */

  /* USER CODE END TIM6_DAC_IRQn 1 */
}
 8003a62:	bf00      	nop
 8003a64:	bd80      	pop	{r7, pc}
 8003a66:	bf00      	nop
 8003a68:	24000e20 	.word	0x24000e20

08003a6c <ETH_IRQHandler>:

/**
  * @brief This function handles Ethernet global interrupt.
  */
void ETH_IRQHandler(void)
{
 8003a6c:	b580      	push	{r7, lr}
 8003a6e:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN ETH_IRQn 0 */

  /* USER CODE END ETH_IRQn 0 */
  HAL_ETH_IRQHandler(&heth);
 8003a70:	4802      	ldr	r0, [pc, #8]	@ (8003a7c <ETH_IRQHandler+0x10>)
 8003a72:	f004 fa35 	bl	8007ee0 <HAL_ETH_IRQHandler>
  /* USER CODE BEGIN ETH_IRQn 1 */

  /* USER CODE END ETH_IRQn 1 */
}
 8003a76:	bf00      	nop
 8003a78:	bd80      	pop	{r7, pc}
 8003a7a:	bf00      	nop
 8003a7c:	24001350 	.word	0x24001350

08003a80 <DMA2_Stream6_IRQHandler>:

/**
  * @brief This function handles DMA2 stream6 global interrupt.
  */
void DMA2_Stream6_IRQHandler(void)
{
 8003a80:	b580      	push	{r7, lr}
 8003a82:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN DMA2_Stream6_IRQn 0 */

  /* USER CODE END DMA2_Stream6_IRQn 0 */
  HAL_DMA_IRQHandler(&hdma_uart8_tx);
 8003a84:	4802      	ldr	r0, [pc, #8]	@ (8003a90 <DMA2_Stream6_IRQHandler+0x10>)
 8003a86:	f002 fcf1 	bl	800646c <HAL_DMA_IRQHandler>
  /* USER CODE BEGIN DMA2_Stream6_IRQn 1 */

  /* USER CODE END DMA2_Stream6_IRQn 1 */
}
 8003a8a:	bf00      	nop
 8003a8c:	bd80      	pop	{r7, pc}
 8003a8e:	bf00      	nop
 8003a90:	24000378 	.word	0x24000378

08003a94 <DMA2_Stream7_IRQHandler>:

/**
  * @brief This function handles DMA2 stream7 global interrupt.
  */
void DMA2_Stream7_IRQHandler(void)
{
 8003a94:	b580      	push	{r7, lr}
 8003a96:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN DMA2_Stream7_IRQn 0 */

  /* USER CODE END DMA2_Stream7_IRQn 0 */
  HAL_DMA_IRQHandler(&hdma_uart8_rx);
 8003a98:	4802      	ldr	r0, [pc, #8]	@ (8003aa4 <DMA2_Stream7_IRQHandler+0x10>)
 8003a9a:	f002 fce7 	bl	800646c <HAL_DMA_IRQHandler>
  /* USER CODE BEGIN DMA2_Stream7_IRQn 1 */

  /* USER CODE END DMA2_Stream7_IRQn 1 */
}
 8003a9e:	bf00      	nop
 8003aa0:	bd80      	pop	{r7, pc}
 8003aa2:	bf00      	nop
 8003aa4:	24000300 	.word	0x24000300

08003aa8 <UART8_IRQHandler>:

/**
  * @brief This function handles UART8 global interrupt.
  */
void UART8_IRQHandler(void)
{
 8003aa8:	b580      	push	{r7, lr}
 8003aaa:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN UART8_IRQn 0 */

  /* USER CODE END UART8_IRQn 0 */
  HAL_UART_IRQHandler(&huart8);
 8003aac:	4802      	ldr	r0, [pc, #8]	@ (8003ab8 <UART8_IRQHandler+0x10>)
 8003aae:	f009 f845 	bl	800cb3c <HAL_UART_IRQHandler>
  /* USER CODE BEGIN UART8_IRQn 1 */

  /* USER CODE END UART8_IRQn 1 */
}
 8003ab2:	bf00      	nop
 8003ab4:	bd80      	pop	{r7, pc}
 8003ab6:	bf00      	nop
 8003ab8:	2400026c 	.word	0x2400026c

08003abc <ITM_SendChar>:
           \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.
  \param [in]     ch  Character to transmit.
  \returns            Character to transmit.
 */
__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
{
 8003abc:	b480      	push	{r7}
 8003abe:	b083      	sub	sp, #12
 8003ac0:	af00      	add	r7, sp, #0
 8003ac2:	6078      	str	r0, [r7, #4]
  if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) &&      /* ITM enabled */
 8003ac4:	f04f 4360 	mov.w	r3, #3758096384	@ 0xe0000000
 8003ac8:	f8d3 3e80 	ldr.w	r3, [r3, #3712]	@ 0xe80
 8003acc:	f003 0301 	and.w	r3, r3, #1
 8003ad0:	2b00      	cmp	r3, #0
 8003ad2:	d013      	beq.n	8003afc <ITM_SendChar+0x40>
      ((ITM->TER & 1UL               ) != 0UL)   )     /* ITM Port #0 enabled */
 8003ad4:	f04f 4360 	mov.w	r3, #3758096384	@ 0xe0000000
 8003ad8:	f8d3 3e00 	ldr.w	r3, [r3, #3584]	@ 0xe00
 8003adc:	f003 0301 	and.w	r3, r3, #1
  if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) &&      /* ITM enabled */
 8003ae0:	2b00      	cmp	r3, #0
 8003ae2:	d00b      	beq.n	8003afc <ITM_SendChar+0x40>
  {
    while (ITM->PORT[0U].u32 == 0UL)
 8003ae4:	e000      	b.n	8003ae8 <ITM_SendChar+0x2c>
    {
      __NOP();
 8003ae6:	bf00      	nop
    while (ITM->PORT[0U].u32 == 0UL)
 8003ae8:	f04f 4360 	mov.w	r3, #3758096384	@ 0xe0000000
 8003aec:	681b      	ldr	r3, [r3, #0]
 8003aee:	2b00      	cmp	r3, #0
 8003af0:	d0f9      	beq.n	8003ae6 <ITM_SendChar+0x2a>
    }
    ITM->PORT[0U].u8 = (uint8_t)ch;
 8003af2:	f04f 4360 	mov.w	r3, #3758096384	@ 0xe0000000
 8003af6:	687a      	ldr	r2, [r7, #4]
 8003af8:	b2d2      	uxtb	r2, r2
 8003afa:	701a      	strb	r2, [r3, #0]
  }
  return (ch);
 8003afc:	687b      	ldr	r3, [r7, #4]
}
 8003afe:	4618      	mov	r0, r3
 8003b00:	370c      	adds	r7, #12
 8003b02:	46bd      	mov	sp, r7
 8003b04:	f85d 7b04 	ldr.w	r7, [sp], #4
 8003b08:	4770      	bx	lr

08003b0a <_getpid>:
void initialise_monitor_handles()
{
}

int _getpid(void)
{
 8003b0a:	b480      	push	{r7}
 8003b0c:	af00      	add	r7, sp, #0
  return 1;
 8003b0e:	2301      	movs	r3, #1
}
 8003b10:	4618      	mov	r0, r3
 8003b12:	46bd      	mov	sp, r7
 8003b14:	f85d 7b04 	ldr.w	r7, [sp], #4
 8003b18:	4770      	bx	lr
	...

08003b1c <_kill>:

int _kill(int pid, int sig)
{
 8003b1c:	b480      	push	{r7}
 8003b1e:	b083      	sub	sp, #12
 8003b20:	af00      	add	r7, sp, #0
 8003b22:	6078      	str	r0, [r7, #4]
 8003b24:	6039      	str	r1, [r7, #0]
  (void)pid;
  (void)sig;
  errno = EINVAL;
 8003b26:	4b05      	ldr	r3, [pc, #20]	@ (8003b3c <_kill+0x20>)
 8003b28:	2216      	movs	r2, #22
 8003b2a:	601a      	str	r2, [r3, #0]
  return -1;
 8003b2c:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
}
 8003b30:	4618      	mov	r0, r3
 8003b32:	370c      	adds	r7, #12
 8003b34:	46bd      	mov	sp, r7
 8003b36:	f85d 7b04 	ldr.w	r7, [sp], #4
 8003b3a:	4770      	bx	lr
 8003b3c:	2402a2e4 	.word	0x2402a2e4

08003b40 <_exit>:

void _exit (int status)
{
 8003b40:	b580      	push	{r7, lr}
 8003b42:	b082      	sub	sp, #8
 8003b44:	af00      	add	r7, sp, #0
 8003b46:	6078      	str	r0, [r7, #4]
  _kill(status, -1);
 8003b48:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 8003b4c:	6878      	ldr	r0, [r7, #4]
 8003b4e:	f7ff ffe5 	bl	8003b1c <_kill>
  while (1) {}    /* Make sure we hang here */
 8003b52:	bf00      	nop
 8003b54:	e7fd      	b.n	8003b52 <_exit+0x12>

08003b56 <_read>:
}

__attribute__((weak)) int _read(int file, char *ptr, int len)
{
 8003b56:	b580      	push	{r7, lr}
 8003b58:	b086      	sub	sp, #24
 8003b5a:	af00      	add	r7, sp, #0
 8003b5c:	60f8      	str	r0, [r7, #12]
 8003b5e:	60b9      	str	r1, [r7, #8]
 8003b60:	607a      	str	r2, [r7, #4]
  (void)file;
  int DataIdx;

  for (DataIdx = 0; DataIdx < len; DataIdx++)
 8003b62:	2300      	movs	r3, #0
 8003b64:	617b      	str	r3, [r7, #20]
 8003b66:	e00a      	b.n	8003b7e <_read+0x28>
  {
    *ptr++ = __io_getchar();
 8003b68:	f3af 8000 	nop.w
 8003b6c:	4601      	mov	r1, r0
 8003b6e:	68bb      	ldr	r3, [r7, #8]
 8003b70:	1c5a      	adds	r2, r3, #1
 8003b72:	60ba      	str	r2, [r7, #8]
 8003b74:	b2ca      	uxtb	r2, r1
 8003b76:	701a      	strb	r2, [r3, #0]
  for (DataIdx = 0; DataIdx < len; DataIdx++)
 8003b78:	697b      	ldr	r3, [r7, #20]
 8003b7a:	3301      	adds	r3, #1
 8003b7c:	617b      	str	r3, [r7, #20]
 8003b7e:	697a      	ldr	r2, [r7, #20]
 8003b80:	687b      	ldr	r3, [r7, #4]
 8003b82:	429a      	cmp	r2, r3
 8003b84:	dbf0      	blt.n	8003b68 <_read+0x12>
  }

  return len;
 8003b86:	687b      	ldr	r3, [r7, #4]
}
 8003b88:	4618      	mov	r0, r3
 8003b8a:	3718      	adds	r7, #24
 8003b8c:	46bd      	mov	sp, r7
 8003b8e:	bd80      	pop	{r7, pc}

08003b90 <_write>:

__attribute__((weak)) int _write(int file, char *ptr, int len)
{
 8003b90:	b580      	push	{r7, lr}
 8003b92:	b086      	sub	sp, #24
 8003b94:	af00      	add	r7, sp, #0
 8003b96:	60f8      	str	r0, [r7, #12]
 8003b98:	60b9      	str	r1, [r7, #8]
 8003b9a:	607a      	str	r2, [r7, #4]
  (void)file;
  int DataIdx;

  for (DataIdx = 0; DataIdx < len; DataIdx++)
 8003b9c:	2300      	movs	r3, #0
 8003b9e:	617b      	str	r3, [r7, #20]
 8003ba0:	e009      	b.n	8003bb6 <_write+0x26>
  {
//    __io_putchar(*ptr++);
	  ITM_SendChar(*ptr++);
 8003ba2:	68bb      	ldr	r3, [r7, #8]
 8003ba4:	1c5a      	adds	r2, r3, #1
 8003ba6:	60ba      	str	r2, [r7, #8]
 8003ba8:	781b      	ldrb	r3, [r3, #0]
 8003baa:	4618      	mov	r0, r3
 8003bac:	f7ff ff86 	bl	8003abc <ITM_SendChar>
  for (DataIdx = 0; DataIdx < len; DataIdx++)
 8003bb0:	697b      	ldr	r3, [r7, #20]
 8003bb2:	3301      	adds	r3, #1
 8003bb4:	617b      	str	r3, [r7, #20]
 8003bb6:	697a      	ldr	r2, [r7, #20]
 8003bb8:	687b      	ldr	r3, [r7, #4]
 8003bba:	429a      	cmp	r2, r3
 8003bbc:	dbf1      	blt.n	8003ba2 <_write+0x12>
  }
  return len;
 8003bbe:	687b      	ldr	r3, [r7, #4]
}
 8003bc0:	4618      	mov	r0, r3
 8003bc2:	3718      	adds	r7, #24
 8003bc4:	46bd      	mov	sp, r7
 8003bc6:	bd80      	pop	{r7, pc}

08003bc8 <_close>:

int _close(int file)
{
 8003bc8:	b480      	push	{r7}
 8003bca:	b083      	sub	sp, #12
 8003bcc:	af00      	add	r7, sp, #0
 8003bce:	6078      	str	r0, [r7, #4]
  (void)file;
  return -1;
 8003bd0:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
}
 8003bd4:	4618      	mov	r0, r3
 8003bd6:	370c      	adds	r7, #12
 8003bd8:	46bd      	mov	sp, r7
 8003bda:	f85d 7b04 	ldr.w	r7, [sp], #4
 8003bde:	4770      	bx	lr

08003be0 <_fstat>:


int _fstat(int file, struct stat *st)
{
 8003be0:	b480      	push	{r7}
 8003be2:	b083      	sub	sp, #12
 8003be4:	af00      	add	r7, sp, #0
 8003be6:	6078      	str	r0, [r7, #4]
 8003be8:	6039      	str	r1, [r7, #0]
  (void)file;
  st->st_mode = S_IFCHR;
 8003bea:	683b      	ldr	r3, [r7, #0]
 8003bec:	f44f 5200 	mov.w	r2, #8192	@ 0x2000
 8003bf0:	605a      	str	r2, [r3, #4]
  return 0;
 8003bf2:	2300      	movs	r3, #0
}
 8003bf4:	4618      	mov	r0, r3
 8003bf6:	370c      	adds	r7, #12
 8003bf8:	46bd      	mov	sp, r7
 8003bfa:	f85d 7b04 	ldr.w	r7, [sp], #4
 8003bfe:	4770      	bx	lr

08003c00 <_isatty>:

int _isatty(int file)
{
 8003c00:	b480      	push	{r7}
 8003c02:	b083      	sub	sp, #12
 8003c04:	af00      	add	r7, sp, #0
 8003c06:	6078      	str	r0, [r7, #4]
  (void)file;
  return 1;
 8003c08:	2301      	movs	r3, #1
}
 8003c0a:	4618      	mov	r0, r3
 8003c0c:	370c      	adds	r7, #12
 8003c0e:	46bd      	mov	sp, r7
 8003c10:	f85d 7b04 	ldr.w	r7, [sp], #4
 8003c14:	4770      	bx	lr

08003c16 <_lseek>:

int _lseek(int file, int ptr, int dir)
{
 8003c16:	b480      	push	{r7}
 8003c18:	b085      	sub	sp, #20
 8003c1a:	af00      	add	r7, sp, #0
 8003c1c:	60f8      	str	r0, [r7, #12]
 8003c1e:	60b9      	str	r1, [r7, #8]
 8003c20:	607a      	str	r2, [r7, #4]
  (void)file;
  (void)ptr;
  (void)dir;
  return 0;
 8003c22:	2300      	movs	r3, #0
}
 8003c24:	4618      	mov	r0, r3
 8003c26:	3714      	adds	r7, #20
 8003c28:	46bd      	mov	sp, r7
 8003c2a:	f85d 7b04 	ldr.w	r7, [sp], #4
 8003c2e:	4770      	bx	lr

08003c30 <_sbrk>:
 *
 * @param incr Memory size
 * @return Pointer to allocated memory
 */
void *_sbrk(ptrdiff_t incr)
{
 8003c30:	b480      	push	{r7}
 8003c32:	b087      	sub	sp, #28
 8003c34:	af00      	add	r7, sp, #0
 8003c36:	6078      	str	r0, [r7, #4]
  extern uint8_t _end; /* Symbol defined in the linker script */
  extern uint8_t _estack; /* Symbol defined in the linker script */
  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
 8003c38:	4a14      	ldr	r2, [pc, #80]	@ (8003c8c <_sbrk+0x5c>)
 8003c3a:	4b15      	ldr	r3, [pc, #84]	@ (8003c90 <_sbrk+0x60>)
 8003c3c:	1ad3      	subs	r3, r2, r3
 8003c3e:	617b      	str	r3, [r7, #20]
  const uint8_t *max_heap = (uint8_t *)stack_limit;
 8003c40:	697b      	ldr	r3, [r7, #20]
 8003c42:	613b      	str	r3, [r7, #16]
  uint8_t *prev_heap_end;

  /* Initialize heap end at first call */
  if (NULL == __sbrk_heap_end)
 8003c44:	4b13      	ldr	r3, [pc, #76]	@ (8003c94 <_sbrk+0x64>)
 8003c46:	681b      	ldr	r3, [r3, #0]
 8003c48:	2b00      	cmp	r3, #0
 8003c4a:	d102      	bne.n	8003c52 <_sbrk+0x22>
  {
    __sbrk_heap_end = &_end;
 8003c4c:	4b11      	ldr	r3, [pc, #68]	@ (8003c94 <_sbrk+0x64>)
 8003c4e:	4a12      	ldr	r2, [pc, #72]	@ (8003c98 <_sbrk+0x68>)
 8003c50:	601a      	str	r2, [r3, #0]
  }

  /* Protect heap from growing into the reserved MSP stack */
  if (__sbrk_heap_end + incr > max_heap)
 8003c52:	4b10      	ldr	r3, [pc, #64]	@ (8003c94 <_sbrk+0x64>)
 8003c54:	681a      	ldr	r2, [r3, #0]
 8003c56:	687b      	ldr	r3, [r7, #4]
 8003c58:	4413      	add	r3, r2
 8003c5a:	693a      	ldr	r2, [r7, #16]
 8003c5c:	429a      	cmp	r2, r3
 8003c5e:	d205      	bcs.n	8003c6c <_sbrk+0x3c>
  {
    errno = ENOMEM;
 8003c60:	4b0e      	ldr	r3, [pc, #56]	@ (8003c9c <_sbrk+0x6c>)
 8003c62:	220c      	movs	r2, #12
 8003c64:	601a      	str	r2, [r3, #0]
    return (void *)-1;
 8003c66:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8003c6a:	e009      	b.n	8003c80 <_sbrk+0x50>
  }

  prev_heap_end = __sbrk_heap_end;
 8003c6c:	4b09      	ldr	r3, [pc, #36]	@ (8003c94 <_sbrk+0x64>)
 8003c6e:	681b      	ldr	r3, [r3, #0]
 8003c70:	60fb      	str	r3, [r7, #12]
  __sbrk_heap_end += incr;
 8003c72:	4b08      	ldr	r3, [pc, #32]	@ (8003c94 <_sbrk+0x64>)
 8003c74:	681a      	ldr	r2, [r3, #0]
 8003c76:	687b      	ldr	r3, [r7, #4]
 8003c78:	4413      	add	r3, r2
 8003c7a:	4a06      	ldr	r2, [pc, #24]	@ (8003c94 <_sbrk+0x64>)
 8003c7c:	6013      	str	r3, [r2, #0]

  return (void *)prev_heap_end;
 8003c7e:	68fb      	ldr	r3, [r7, #12]
}
 8003c80:	4618      	mov	r0, r3
 8003c82:	371c      	adds	r7, #28
 8003c84:	46bd      	mov	sp, r7
 8003c86:	f85d 7b04 	ldr.w	r7, [sp], #4
 8003c8a:	4770      	bx	lr
 8003c8c:	24060000 	.word	0x24060000
 8003c90:	00000400 	.word	0x00000400
 8003c94:	24000e6c 	.word	0x24000e6c
 8003c98:	2402a2f0 	.word	0x2402a2f0
 8003c9c:	2402a2e4 	.word	0x2402a2e4

08003ca0 <SystemInit>:
  *         configuration.
  * @param  None
  * @retval None
  */
void SystemInit (void)
{
 8003ca0:	b480      	push	{r7}
 8003ca2:	af00      	add	r7, sp, #0
 __IO uint32_t tmpreg;
#endif /* DATA_IN_D2_SRAM */

  /* FPU settings ------------------------------------------------------------*/
  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
 8003ca4:	4b37      	ldr	r3, [pc, #220]	@ (8003d84 <SystemInit+0xe4>)
 8003ca6:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 8003caa:	4a36      	ldr	r2, [pc, #216]	@ (8003d84 <SystemInit+0xe4>)
 8003cac:	f443 0370 	orr.w	r3, r3, #15728640	@ 0xf00000
 8003cb0:	f8c2 3088 	str.w	r3, [r2, #136]	@ 0x88
  #endif
  /* Reset the RCC clock configuration to the default reset state ------------*/

   /* Increasing the CPU frequency */
  if(FLASH_LATENCY_DEFAULT  > (READ_BIT((FLASH->ACR), FLASH_ACR_LATENCY)))
 8003cb4:	4b34      	ldr	r3, [pc, #208]	@ (8003d88 <SystemInit+0xe8>)
 8003cb6:	681b      	ldr	r3, [r3, #0]
 8003cb8:	f003 030f 	and.w	r3, r3, #15
 8003cbc:	2b06      	cmp	r3, #6
 8003cbe:	d807      	bhi.n	8003cd0 <SystemInit+0x30>
  {
    /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
    MODIFY_REG(FLASH->ACR, FLASH_ACR_LATENCY, (uint32_t)(FLASH_LATENCY_DEFAULT));
 8003cc0:	4b31      	ldr	r3, [pc, #196]	@ (8003d88 <SystemInit+0xe8>)
 8003cc2:	681b      	ldr	r3, [r3, #0]
 8003cc4:	f023 030f 	bic.w	r3, r3, #15
 8003cc8:	4a2f      	ldr	r2, [pc, #188]	@ (8003d88 <SystemInit+0xe8>)
 8003cca:	f043 0307 	orr.w	r3, r3, #7
 8003cce:	6013      	str	r3, [r2, #0]
  }

  /* Set HSION bit */
  RCC->CR |= RCC_CR_HSION;
 8003cd0:	4b2e      	ldr	r3, [pc, #184]	@ (8003d8c <SystemInit+0xec>)
 8003cd2:	681b      	ldr	r3, [r3, #0]
 8003cd4:	4a2d      	ldr	r2, [pc, #180]	@ (8003d8c <SystemInit+0xec>)
 8003cd6:	f043 0301 	orr.w	r3, r3, #1
 8003cda:	6013      	str	r3, [r2, #0]

  /* Reset CFGR register */
  RCC->CFGR = 0x00000000;
 8003cdc:	4b2b      	ldr	r3, [pc, #172]	@ (8003d8c <SystemInit+0xec>)
 8003cde:	2200      	movs	r2, #0
 8003ce0:	611a      	str	r2, [r3, #16]

  /* Reset HSEON, HSECSSON, CSION, HSI48ON, CSIKERON, PLL1ON, PLL2ON and PLL3ON bits */
  RCC->CR &= 0xEAF6ED7FU;
 8003ce2:	4b2a      	ldr	r3, [pc, #168]	@ (8003d8c <SystemInit+0xec>)
 8003ce4:	681a      	ldr	r2, [r3, #0]
 8003ce6:	4929      	ldr	r1, [pc, #164]	@ (8003d8c <SystemInit+0xec>)
 8003ce8:	4b29      	ldr	r3, [pc, #164]	@ (8003d90 <SystemInit+0xf0>)
 8003cea:	4013      	ands	r3, r2
 8003cec:	600b      	str	r3, [r1, #0]

   /* Decreasing the number of wait states because of lower CPU frequency */
  if(FLASH_LATENCY_DEFAULT  < (READ_BIT((FLASH->ACR), FLASH_ACR_LATENCY)))
 8003cee:	4b26      	ldr	r3, [pc, #152]	@ (8003d88 <SystemInit+0xe8>)
 8003cf0:	681b      	ldr	r3, [r3, #0]
 8003cf2:	f003 0308 	and.w	r3, r3, #8
 8003cf6:	2b00      	cmp	r3, #0
 8003cf8:	d007      	beq.n	8003d0a <SystemInit+0x6a>
  {
    /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
    MODIFY_REG(FLASH->ACR, FLASH_ACR_LATENCY, (uint32_t)(FLASH_LATENCY_DEFAULT));
 8003cfa:	4b23      	ldr	r3, [pc, #140]	@ (8003d88 <SystemInit+0xe8>)
 8003cfc:	681b      	ldr	r3, [r3, #0]
 8003cfe:	f023 030f 	bic.w	r3, r3, #15
 8003d02:	4a21      	ldr	r2, [pc, #132]	@ (8003d88 <SystemInit+0xe8>)
 8003d04:	f043 0307 	orr.w	r3, r3, #7
 8003d08:	6013      	str	r3, [r2, #0]
  }

#if defined(D3_SRAM_BASE)
  /* Reset D1CFGR register */
  RCC->D1CFGR = 0x00000000;
 8003d0a:	4b20      	ldr	r3, [pc, #128]	@ (8003d8c <SystemInit+0xec>)
 8003d0c:	2200      	movs	r2, #0
 8003d0e:	619a      	str	r2, [r3, #24]

  /* Reset D2CFGR register */
  RCC->D2CFGR = 0x00000000;
 8003d10:	4b1e      	ldr	r3, [pc, #120]	@ (8003d8c <SystemInit+0xec>)
 8003d12:	2200      	movs	r2, #0
 8003d14:	61da      	str	r2, [r3, #28]

  /* Reset D3CFGR register */
  RCC->D3CFGR = 0x00000000;
 8003d16:	4b1d      	ldr	r3, [pc, #116]	@ (8003d8c <SystemInit+0xec>)
 8003d18:	2200      	movs	r2, #0
 8003d1a:	621a      	str	r2, [r3, #32]

  /* Reset SRDCFGR register */
  RCC->SRDCFGR = 0x00000000;
#endif
  /* Reset PLLCKSELR register */
  RCC->PLLCKSELR = 0x02020200;
 8003d1c:	4b1b      	ldr	r3, [pc, #108]	@ (8003d8c <SystemInit+0xec>)
 8003d1e:	4a1d      	ldr	r2, [pc, #116]	@ (8003d94 <SystemInit+0xf4>)
 8003d20:	629a      	str	r2, [r3, #40]	@ 0x28

  /* Reset PLLCFGR register */
  RCC->PLLCFGR = 0x01FF0000;
 8003d22:	4b1a      	ldr	r3, [pc, #104]	@ (8003d8c <SystemInit+0xec>)
 8003d24:	4a1c      	ldr	r2, [pc, #112]	@ (8003d98 <SystemInit+0xf8>)
 8003d26:	62da      	str	r2, [r3, #44]	@ 0x2c
  /* Reset PLL1DIVR register */
  RCC->PLL1DIVR = 0x01010280;
 8003d28:	4b18      	ldr	r3, [pc, #96]	@ (8003d8c <SystemInit+0xec>)
 8003d2a:	4a1c      	ldr	r2, [pc, #112]	@ (8003d9c <SystemInit+0xfc>)
 8003d2c:	631a      	str	r2, [r3, #48]	@ 0x30
  /* Reset PLL1FRACR register */
  RCC->PLL1FRACR = 0x00000000;
 8003d2e:	4b17      	ldr	r3, [pc, #92]	@ (8003d8c <SystemInit+0xec>)
 8003d30:	2200      	movs	r2, #0
 8003d32:	635a      	str	r2, [r3, #52]	@ 0x34

  /* Reset PLL2DIVR register */
  RCC->PLL2DIVR = 0x01010280;
 8003d34:	4b15      	ldr	r3, [pc, #84]	@ (8003d8c <SystemInit+0xec>)
 8003d36:	4a19      	ldr	r2, [pc, #100]	@ (8003d9c <SystemInit+0xfc>)
 8003d38:	639a      	str	r2, [r3, #56]	@ 0x38

  /* Reset PLL2FRACR register */

  RCC->PLL2FRACR = 0x00000000;
 8003d3a:	4b14      	ldr	r3, [pc, #80]	@ (8003d8c <SystemInit+0xec>)
 8003d3c:	2200      	movs	r2, #0
 8003d3e:	63da      	str	r2, [r3, #60]	@ 0x3c
  /* Reset PLL3DIVR register */
  RCC->PLL3DIVR = 0x01010280;
 8003d40:	4b12      	ldr	r3, [pc, #72]	@ (8003d8c <SystemInit+0xec>)
 8003d42:	4a16      	ldr	r2, [pc, #88]	@ (8003d9c <SystemInit+0xfc>)
 8003d44:	641a      	str	r2, [r3, #64]	@ 0x40

  /* Reset PLL3FRACR register */
  RCC->PLL3FRACR = 0x00000000;
 8003d46:	4b11      	ldr	r3, [pc, #68]	@ (8003d8c <SystemInit+0xec>)
 8003d48:	2200      	movs	r2, #0
 8003d4a:	645a      	str	r2, [r3, #68]	@ 0x44

  /* Reset HSEBYP bit */
  RCC->CR &= 0xFFFBFFFFU;
 8003d4c:	4b0f      	ldr	r3, [pc, #60]	@ (8003d8c <SystemInit+0xec>)
 8003d4e:	681b      	ldr	r3, [r3, #0]
 8003d50:	4a0e      	ldr	r2, [pc, #56]	@ (8003d8c <SystemInit+0xec>)
 8003d52:	f423 2380 	bic.w	r3, r3, #262144	@ 0x40000
 8003d56:	6013      	str	r3, [r2, #0]

  /* Disable all interrupts */
  RCC->CIER = 0x00000000;
 8003d58:	4b0c      	ldr	r3, [pc, #48]	@ (8003d8c <SystemInit+0xec>)
 8003d5a:	2200      	movs	r2, #0
 8003d5c:	661a      	str	r2, [r3, #96]	@ 0x60

#if (STM32H7_DEV_ID == 0x450UL)
  /* dual core CM7 or single core line */
  if((DBGMCU->IDCODE & 0xFFFF0000U) < 0x20000000U)
 8003d5e:	4b10      	ldr	r3, [pc, #64]	@ (8003da0 <SystemInit+0x100>)
 8003d60:	681a      	ldr	r2, [r3, #0]
 8003d62:	4b10      	ldr	r3, [pc, #64]	@ (8003da4 <SystemInit+0x104>)
 8003d64:	4013      	ands	r3, r2
 8003d66:	f1b3 5f00 	cmp.w	r3, #536870912	@ 0x20000000
 8003d6a:	d202      	bcs.n	8003d72 <SystemInit+0xd2>
  {
    /* if stm32h7 revY*/
    /* Change  the switch matrix read issuing capability to 1 for the AXI SRAM target (Target 7) */
    *((__IO uint32_t*)0x51008108) = 0x000000001U;
 8003d6c:	4b0e      	ldr	r3, [pc, #56]	@ (8003da8 <SystemInit+0x108>)
 8003d6e:	2201      	movs	r2, #1
 8003d70:	601a      	str	r2, [r3, #0]
  /*
   * Disable the FMC bank1 (enabled after reset).
   * This, prevents CPU speculation access on this bank which blocks the use of FMC during
   * 24us. During this time the others FMC master (such as LTDC) cannot use it!
   */
  FMC_Bank1_R->BTCR[0] = 0x000030D2;
 8003d72:	4b0e      	ldr	r3, [pc, #56]	@ (8003dac <SystemInit+0x10c>)
 8003d74:	f243 02d2 	movw	r2, #12498	@ 0x30d2
 8003d78:	601a      	str	r2, [r3, #0]
#if defined(USER_VECT_TAB_ADDRESS)
  SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal D1 AXI-RAM or in Internal FLASH */
#endif /* USER_VECT_TAB_ADDRESS */

#endif /*DUAL_CORE && CORE_CM4*/
}
 8003d7a:	bf00      	nop
 8003d7c:	46bd      	mov	sp, r7
 8003d7e:	f85d 7b04 	ldr.w	r7, [sp], #4
 8003d82:	4770      	bx	lr
 8003d84:	e000ed00 	.word	0xe000ed00
 8003d88:	52002000 	.word	0x52002000
 8003d8c:	58024400 	.word	0x58024400
 8003d90:	eaf6ed7f 	.word	0xeaf6ed7f
 8003d94:	02020200 	.word	0x02020200
 8003d98:	01ff0000 	.word	0x01ff0000
 8003d9c:	01010280 	.word	0x01010280
 8003da0:	5c001000 	.word	0x5c001000
 8003da4:	ffff0000 	.word	0xffff0000
 8003da8:	51008108 	.word	0x51008108
 8003dac:	52004000 	.word	0x52004000

08003db0 <Uart8TasksInit>:
extern osMutexId_t sensorsInfoMutex;

extern RNG_HandleTypeDef hrng;


void Uart8TasksInit (void) {
 8003db0:	b580      	push	{r7, lr}
 8003db2:	b098      	sub	sp, #96	@ 0x60
 8003db4:	af00      	add	r7, sp, #0
    osThreadAttr_t osThreadAttrRxUart = { 0 };
 8003db6:	f107 033c 	add.w	r3, r7, #60	@ 0x3c
 8003dba:	2224      	movs	r2, #36	@ 0x24
 8003dbc:	2100      	movs	r1, #0
 8003dbe:	4618      	mov	r0, r3
 8003dc0:	f025 fd36 	bl	8029830 <memset>
    osThreadAttr_t osThreadAttrTxUart = { 0 };
 8003dc4:	f107 0318 	add.w	r3, r7, #24
 8003dc8:	2224      	movs	r2, #36	@ 0x24
 8003dca:	2100      	movs	r1, #0
 8003dcc:	4618      	mov	r0, r3
 8003dce:	f025 fd2f 	bl	8029830 <memset>
	uart8TaskData.processDataQueue = uart8DecodedFrameDataTaskQueue;
#else
//    uart8TaskData.processDataQueue = NULL;
#endif

	uart8TaskData.processRxDataMsgBuffer = xMessageBufferCreate( INPUT_DATA_BUFF_SIZE );
 8003dd2:	2201      	movs	r2, #1
 8003dd4:	2100      	movs	r1, #0
 8003dd6:	f44f 7080 	mov.w	r0, #256	@ 0x100
 8003dda:	f00e f95f 	bl	801209c <xStreamBufferGenericCreate>
 8003dde:	4603      	mov	r3, r0
 8003de0:	4a2c      	ldr	r2, [pc, #176]	@ (8003e94 <Uart8TasksInit+0xe4>)
 8003de2:	6253      	str	r3, [r2, #36]	@ 0x24
//    uart8TaskData.processDataCb = Uart8ReceivedDataProcessCallback;
    uart8TaskData.processDataCb = NULL;
 8003de4:	4b2b      	ldr	r3, [pc, #172]	@ (8003e94 <Uart8TasksInit+0xe4>)
 8003de6:	2200      	movs	r2, #0
 8003de8:	629a      	str	r2, [r3, #40]	@ 0x28

    osThreadAttrRxUart.name       = "os_thread_uart8_rx";
 8003dea:	4b2b      	ldr	r3, [pc, #172]	@ (8003e98 <Uart8TasksInit+0xe8>)
 8003dec:	63fb      	str	r3, [r7, #60]	@ 0x3c
    osThreadAttrRxUart.stack_size = configMINIMAL_STACK_SIZE * 2;
 8003dee:	f44f 6380 	mov.w	r3, #1024	@ 0x400
 8003df2:	653b      	str	r3, [r7, #80]	@ 0x50
    osThreadAttrRxUart.priority   = (osPriority_t)osPriorityHigh;
 8003df4:	2328      	movs	r3, #40	@ 0x28
 8003df6:	657b      	str	r3, [r7, #84]	@ 0x54

    //	uart8RxSemaphoreDef.name = "uart8RxSemaphore";
    //	uart8RxSemaphore = osSemaphoreNew(1, 1, NULL);

    uart8TaskData.uartRxBuffer          = uart8RxBuffer;
 8003df8:	4b26      	ldr	r3, [pc, #152]	@ (8003e94 <Uart8TasksInit+0xe4>)
 8003dfa:	4a28      	ldr	r2, [pc, #160]	@ (8003e9c <Uart8TasksInit+0xec>)
 8003dfc:	601a      	str	r2, [r3, #0]
    uart8TaskData.uartRxBufferLen       = UART8_RX_BUFF_SIZE;
 8003dfe:	4b25      	ldr	r3, [pc, #148]	@ (8003e94 <Uart8TasksInit+0xe4>)
 8003e00:	f44f 7280 	mov.w	r2, #256	@ 0x100
 8003e04:	809a      	strh	r2, [r3, #4]
    uart8TaskData.uartTxBuffer          = uart8TxBuffer;
 8003e06:	4b23      	ldr	r3, [pc, #140]	@ (8003e94 <Uart8TasksInit+0xe4>)
 8003e08:	4a25      	ldr	r2, [pc, #148]	@ (8003ea0 <Uart8TasksInit+0xf0>)
 8003e0a:	609a      	str	r2, [r3, #8]
    uart8TaskData.uartRxBufferLen       = UART8_TX_BUFF_SIZE;
 8003e0c:	4b21      	ldr	r3, [pc, #132]	@ (8003e94 <Uart8TasksInit+0xe4>)
 8003e0e:	f44f 7280 	mov.w	r2, #256	@ 0x100
 8003e12:	809a      	strh	r2, [r3, #4]
    uart8TaskData.frameData             = uart8TaskFrameData;
 8003e14:	4b1f      	ldr	r3, [pc, #124]	@ (8003e94 <Uart8TasksInit+0xe4>)
 8003e16:	4a23      	ldr	r2, [pc, #140]	@ (8003ea4 <Uart8TasksInit+0xf4>)
 8003e18:	611a      	str	r2, [r3, #16]
    uart8TaskData.frameDataLen          = UART8_RX_BUFF_SIZE;
 8003e1a:	4b1e      	ldr	r3, [pc, #120]	@ (8003e94 <Uart8TasksInit+0xe4>)
 8003e1c:	f44f 7280 	mov.w	r2, #256	@ 0x100
 8003e20:	829a      	strh	r2, [r3, #20]
    uart8TaskData.huart                 = &huart8;
 8003e22:	4b1c      	ldr	r3, [pc, #112]	@ (8003e94 <Uart8TasksInit+0xe4>)
 8003e24:	4a20      	ldr	r2, [pc, #128]	@ (8003ea8 <Uart8TasksInit+0xf8>)
 8003e26:	631a      	str	r2, [r3, #48]	@ 0x30
    uart8TaskData.uartNumber            = 8;
 8003e28:	4b1a      	ldr	r3, [pc, #104]	@ (8003e94 <Uart8TasksInit+0xe4>)
 8003e2a:	2208      	movs	r2, #8
 8003e2c:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34
    uart8TaskData.uartRecieveTaskHandle = osThreadNew (UartRxTask, &uart8TaskData, &osThreadAttrRxUart);
 8003e30:	f107 033c 	add.w	r3, r7, #60	@ 0x3c
 8003e34:	461a      	mov	r2, r3
 8003e36:	4917      	ldr	r1, [pc, #92]	@ (8003e94 <Uart8TasksInit+0xe4>)
 8003e38:	481c      	ldr	r0, [pc, #112]	@ (8003eac <Uart8TasksInit+0xfc>)
 8003e3a:	f00c faa4 	bl	8010386 <osThreadNew>
 8003e3e:	4603      	mov	r3, r0
 8003e40:	4a14      	ldr	r2, [pc, #80]	@ (8003e94 <Uart8TasksInit+0xe4>)
 8003e42:	6193      	str	r3, [r2, #24]


    osMessageQueueAttr_t uartTxMsgQueueAttr = { 0 };
 8003e44:	463b      	mov	r3, r7
 8003e46:	2200      	movs	r2, #0
 8003e48:	601a      	str	r2, [r3, #0]
 8003e4a:	605a      	str	r2, [r3, #4]
 8003e4c:	609a      	str	r2, [r3, #8]
 8003e4e:	60da      	str	r2, [r3, #12]
 8003e50:	611a      	str	r2, [r3, #16]
 8003e52:	615a      	str	r2, [r3, #20]
    uartTxMsgQueueAttr.name                 = "uart8TxMsgQueue";
 8003e54:	4b16      	ldr	r3, [pc, #88]	@ (8003eb0 <Uart8TasksInit+0x100>)
 8003e56:	603b      	str	r3, [r7, #0]
    uart8TaskData.sendCmdToSlaveQueue       = osMessageQueueNew (16, sizeof (InterProcessData), &uartTxMsgQueueAttr);
 8003e58:	463b      	mov	r3, r7
 8003e5a:	461a      	mov	r2, r3
 8003e5c:	210c      	movs	r1, #12
 8003e5e:	2010      	movs	r0, #16
 8003e60:	f00c fd9c 	bl	801099c <osMessageQueueNew>
 8003e64:	4603      	mov	r3, r0
 8003e66:	4a0b      	ldr	r2, [pc, #44]	@ (8003e94 <Uart8TasksInit+0xe4>)
 8003e68:	62d3      	str	r3, [r2, #44]	@ 0x2c

    osThreadAttrTxUart.name              = "os_thread_uart8_tx";
 8003e6a:	4b12      	ldr	r3, [pc, #72]	@ (8003eb4 <Uart8TasksInit+0x104>)
 8003e6c:	61bb      	str	r3, [r7, #24]
    osThreadAttrTxUart.stack_size        = configMINIMAL_STACK_SIZE * 4;
 8003e6e:	f44f 6300 	mov.w	r3, #2048	@ 0x800
 8003e72:	62fb      	str	r3, [r7, #44]	@ 0x2c
    osThreadAttrTxUart.priority          = (osPriority_t)osPriorityNormal;
 8003e74:	2318      	movs	r3, #24
 8003e76:	633b      	str	r3, [r7, #48]	@ 0x30
    uart8TaskData.uartTransmitTaskHandle = osThreadNew (UartTxTask, &uart8TaskData, &osThreadAttrTxUart);
 8003e78:	f107 0318 	add.w	r3, r7, #24
 8003e7c:	461a      	mov	r2, r3
 8003e7e:	4905      	ldr	r1, [pc, #20]	@ (8003e94 <Uart8TasksInit+0xe4>)
 8003e80:	480d      	ldr	r0, [pc, #52]	@ (8003eb8 <Uart8TasksInit+0x108>)
 8003e82:	f00c fa80 	bl	8010386 <osThreadNew>
 8003e86:	4603      	mov	r3, r0
 8003e88:	4a02      	ldr	r2, [pc, #8]	@ (8003e94 <Uart8TasksInit+0xe4>)
 8003e8a:	61d3      	str	r3, [r2, #28]
}
 8003e8c:	bf00      	nop
 8003e8e:	3760      	adds	r7, #96	@ 0x60
 8003e90:	46bd      	mov	sp, r7
 8003e92:	bd80      	pop	{r7, pc}
 8003e94:	24001218 	.word	0x24001218
 8003e98:	0802c440 	.word	0x0802c440
 8003e9c:	24000e70 	.word	0x24000e70
 8003ea0:	24000f70 	.word	0x24000f70
 8003ea4:	24001070 	.word	0x24001070
 8003ea8:	2400026c 	.word	0x2400026c
 8003eac:	08003fb1 	.word	0x08003fb1
 8003eb0:	0802c454 	.word	0x0802c454
 8003eb4:	0802c464 	.word	0x0802c464
 8003eb8:	08004591 	.word	0x08004591

08003ebc <HAL_UART_RxCpltCallback>:

void HAL_UART_RxCpltCallback (UART_HandleTypeDef* huart) {
 8003ebc:	b480      	push	{r7}
 8003ebe:	b083      	sub	sp, #12
 8003ec0:	af00      	add	r7, sp, #0
 8003ec2:	6078      	str	r0, [r7, #4]
    //	osSemaphoreRelease(uart8RxSemaphore);
}
 8003ec4:	bf00      	nop
 8003ec6:	370c      	adds	r7, #12
 8003ec8:	46bd      	mov	sp, r7
 8003eca:	f85d 7b04 	ldr.w	r7, [sp], #4
 8003ece:	4770      	bx	lr

08003ed0 <HAL_UARTEx_RxEventCallback>:

void HAL_UARTEx_RxEventCallback (UART_HandleTypeDef* huart, uint16_t Size) {
 8003ed0:	b580      	push	{r7, lr}
 8003ed2:	b082      	sub	sp, #8
 8003ed4:	af00      	add	r7, sp, #0
 8003ed6:	6078      	str	r0, [r7, #4]
 8003ed8:	460b      	mov	r3, r1
 8003eda:	807b      	strh	r3, [r7, #2]
    if (huart->Instance == UART8) {
 8003edc:	687b      	ldr	r3, [r7, #4]
 8003ede:	681b      	ldr	r3, [r3, #0]
 8003ee0:	4a06      	ldr	r2, [pc, #24]	@ (8003efc <HAL_UARTEx_RxEventCallback+0x2c>)
 8003ee2:	4293      	cmp	r3, r2
 8003ee4:	d105      	bne.n	8003ef2 <HAL_UARTEx_RxEventCallback+0x22>
        HandleUartRxCallback (&uart8TaskData, huart, Size);
 8003ee6:	887b      	ldrh	r3, [r7, #2]
 8003ee8:	461a      	mov	r2, r3
 8003eea:	6879      	ldr	r1, [r7, #4]
 8003eec:	4804      	ldr	r0, [pc, #16]	@ (8003f00 <HAL_UARTEx_RxEventCallback+0x30>)
 8003eee:	f000 f813 	bl	8003f18 <HandleUartRxCallback>
    }
}
 8003ef2:	bf00      	nop
 8003ef4:	3708      	adds	r7, #8
 8003ef6:	46bd      	mov	sp, r7
 8003ef8:	bd80      	pop	{r7, pc}
 8003efa:	bf00      	nop
 8003efc:	40007c00 	.word	0x40007c00
 8003f00:	24001218 	.word	0x24001218

08003f04 <HAL_UART_TxCpltCallback>:

void HAL_UART_TxCpltCallback (UART_HandleTypeDef* huart) {
 8003f04:	b480      	push	{r7}
 8003f06:	b083      	sub	sp, #12
 8003f08:	af00      	add	r7, sp, #0
 8003f0a:	6078      	str	r0, [r7, #4]
    if (huart->Instance == UART8) {
    }
}
 8003f0c:	bf00      	nop
 8003f0e:	370c      	adds	r7, #12
 8003f10:	46bd      	mov	sp, r7
 8003f12:	f85d 7b04 	ldr.w	r7, [sp], #4
 8003f16:	4770      	bx	lr

08003f18 <HandleUartRxCallback>:

void HandleUartRxCallback (UartTaskData* uartTaskData, UART_HandleTypeDef* huart, uint16_t Size) {
 8003f18:	b580      	push	{r7, lr}
 8003f1a:	b088      	sub	sp, #32
 8003f1c:	af02      	add	r7, sp, #8
 8003f1e:	60f8      	str	r0, [r7, #12]
 8003f20:	60b9      	str	r1, [r7, #8]
 8003f22:	4613      	mov	r3, r2
 8003f24:	80fb      	strh	r3, [r7, #6]
    BaseType_t pxHigherPriorityTaskWoken = pdFALSE;
 8003f26:	2300      	movs	r3, #0
 8003f28:	617b      	str	r3, [r7, #20]
    osMutexAcquire (uartTaskData->rxDataBufferMutex, osWaitForever);
 8003f2a:	68fb      	ldr	r3, [r7, #12]
 8003f2c:	6a1b      	ldr	r3, [r3, #32]
 8003f2e:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 8003f32:	4618      	mov	r0, r3
 8003f34:	f00c fb66 	bl	8010604 <osMutexAcquire>
    memcpy (&(uartTaskData->frameData[uartTaskData->frameBytesCount]), uartTaskData->uartRxBuffer, Size);
 8003f38:	68fb      	ldr	r3, [r7, #12]
 8003f3a:	691b      	ldr	r3, [r3, #16]
 8003f3c:	68fa      	ldr	r2, [r7, #12]
 8003f3e:	8ad2      	ldrh	r2, [r2, #22]
 8003f40:	1898      	adds	r0, r3, r2
 8003f42:	68fb      	ldr	r3, [r7, #12]
 8003f44:	681b      	ldr	r3, [r3, #0]
 8003f46:	88fa      	ldrh	r2, [r7, #6]
 8003f48:	4619      	mov	r1, r3
 8003f4a:	f025 fd68 	bl	8029a1e <memcpy>
    uartTaskData->frameBytesCount += Size;
 8003f4e:	68fb      	ldr	r3, [r7, #12]
 8003f50:	8ada      	ldrh	r2, [r3, #22]
 8003f52:	88fb      	ldrh	r3, [r7, #6]
 8003f54:	4413      	add	r3, r2
 8003f56:	b29a      	uxth	r2, r3
 8003f58:	68fb      	ldr	r3, [r7, #12]
 8003f5a:	82da      	strh	r2, [r3, #22]
    osMutexRelease (uartTaskData->rxDataBufferMutex);
 8003f5c:	68fb      	ldr	r3, [r7, #12]
 8003f5e:	6a1b      	ldr	r3, [r3, #32]
 8003f60:	4618      	mov	r0, r3
 8003f62:	f00c fb9a 	bl	801069a <osMutexRelease>
    xTaskNotifyFromISR (uartTaskData->uartRecieveTaskHandle, Size, eSetValueWithOverwrite, &pxHigherPriorityTaskWoken);
 8003f66:	68fb      	ldr	r3, [r7, #12]
 8003f68:	6998      	ldr	r0, [r3, #24]
 8003f6a:	88f9      	ldrh	r1, [r7, #6]
 8003f6c:	f107 0314 	add.w	r3, r7, #20
 8003f70:	9300      	str	r3, [sp, #0]
 8003f72:	2300      	movs	r3, #0
 8003f74:	2203      	movs	r2, #3
 8003f76:	f00f fd89 	bl	8013a8c <xTaskGenericNotifyFromISR>
    //	HAL_UARTEx_ReceiveToIdle_DMA(huart, uart8RxBuffer, UART8_RX_BUFF_SIZE);
    //	__HAL_DMA_DISABLE_IT(&hdma_uart8_rx, DMA_IT_HT);
    HAL_UARTEx_ReceiveToIdle_IT (uartTaskData->huart, uartTaskData->uartRxBuffer, uartTaskData->uartRxBufferLen);
 8003f7a:	68fb      	ldr	r3, [r7, #12]
 8003f7c:	6b18      	ldr	r0, [r3, #48]	@ 0x30
 8003f7e:	68fb      	ldr	r3, [r7, #12]
 8003f80:	6819      	ldr	r1, [r3, #0]
 8003f82:	68fb      	ldr	r3, [r7, #12]
 8003f84:	889b      	ldrh	r3, [r3, #4]
 8003f86:	461a      	mov	r2, r3
 8003f88:	f00b fa19 	bl	800f3be <HAL_UARTEx_ReceiveToIdle_IT>
    portEND_SWITCHING_ISR (pxHigherPriorityTaskWoken);
 8003f8c:	697b      	ldr	r3, [r7, #20]
 8003f8e:	2b00      	cmp	r3, #0
 8003f90:	d007      	beq.n	8003fa2 <HandleUartRxCallback+0x8a>
 8003f92:	4b06      	ldr	r3, [pc, #24]	@ (8003fac <HandleUartRxCallback+0x94>)
 8003f94:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8003f98:	601a      	str	r2, [r3, #0]
 8003f9a:	f3bf 8f4f 	dsb	sy
 8003f9e:	f3bf 8f6f 	isb	sy
}
 8003fa2:	bf00      	nop
 8003fa4:	3718      	adds	r7, #24
 8003fa6:	46bd      	mov	sp, r7
 8003fa8:	bd80      	pop	{r7, pc}
 8003faa:	bf00      	nop
 8003fac:	e000ed04 	.word	0xe000ed04

08003fb0 <UartRxTask>:

void UartRxTask (void* argument) {
 8003fb0:	b580      	push	{r7, lr}
 8003fb2:	b0d2      	sub	sp, #328	@ 0x148
 8003fb4:	af02      	add	r7, sp, #8
 8003fb6:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 8003fba:	f5a3 739e 	sub.w	r3, r3, #316	@ 0x13c
 8003fbe:	6018      	str	r0, [r3, #0]
    UartTaskData* uartTaskData             = (UartTaskData*)argument;
 8003fc0:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 8003fc4:	f5a3 739e 	sub.w	r3, r3, #316	@ 0x13c
 8003fc8:	681b      	ldr	r3, [r3, #0]
 8003fca:	f8c7 312c 	str.w	r3, [r7, #300]	@ 0x12c
    SerialProtocolFrameData spFrameData    = { 0 };
 8003fce:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 8003fd2:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 8003fd6:	4618      	mov	r0, r3
 8003fd8:	f44f 7386 	mov.w	r3, #268	@ 0x10c
 8003fdc:	461a      	mov	r2, r3
 8003fde:	2100      	movs	r1, #0
 8003fe0:	f025 fc26 	bl	8029830 <memset>
    uint32_t bytesRec                      = 0;
 8003fe4:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 8003fe8:	f5a3 739a 	sub.w	r3, r3, #308	@ 0x134
 8003fec:	2200      	movs	r2, #0
 8003fee:	601a      	str	r2, [r3, #0]
    uint32_t crc                           = 0;
 8003ff0:	2300      	movs	r3, #0
 8003ff2:	f8c7 3128 	str.w	r3, [r7, #296]	@ 0x128
    uint16_t frameCommandRaw               = 0x0000;
 8003ff6:	2300      	movs	r3, #0
 8003ff8:	f8a7 3126 	strh.w	r3, [r7, #294]	@ 0x126
    uint16_t frameBytesCount               = 0;
 8003ffc:	2300      	movs	r3, #0
 8003ffe:	f8a7 3124 	strh.w	r3, [r7, #292]	@ 0x124
    uint16_t frameCrc                      = 0;
 8004002:	2300      	movs	r3, #0
 8004004:	f8a7 3122 	strh.w	r3, [r7, #290]	@ 0x122
    uint16_t frameTotalLength              = 0;
 8004008:	2300      	movs	r3, #0
 800400a:	f8a7 313e 	strh.w	r3, [r7, #318]	@ 0x13e
    uint16_t dataToSend                    = 0;
 800400e:	2300      	movs	r3, #0
 8004010:	f8a7 313c 	strh.w	r3, [r7, #316]	@ 0x13c
    portBASE_TYPE crcPass                  = pdFAIL;
 8004014:	2300      	movs	r3, #0
 8004016:	f8c7 3138 	str.w	r3, [r7, #312]	@ 0x138
    portBASE_TYPE proceed                  = pdFALSE;
 800401a:	2300      	movs	r3, #0
 800401c:	f8c7 3134 	str.w	r3, [r7, #308]	@ 0x134
    portBASE_TYPE frameTimeout             = pdFAIL;
 8004020:	2300      	movs	r3, #0
 8004022:	f8c7 311c 	str.w	r3, [r7, #284]	@ 0x11c
    enum SerialReceiverStates receverState = srWaitForHeader;
 8004026:	2300      	movs	r3, #0
 8004028:	f887 3133 	strb.w	r3, [r7, #307]	@ 0x133

    uartTaskData->rxDataBufferMutex = osMutexNew (NULL);
 800402c:	2000      	movs	r0, #0
 800402e:	f00c fa63 	bl	80104f8 <osMutexNew>
 8004032:	4602      	mov	r2, r0
 8004034:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004038:	621a      	str	r2, [r3, #32]
    HAL_UARTEx_ReceiveToIdle_IT (uartTaskData->huart, uartTaskData->uartRxBuffer, uartTaskData->uartRxBufferLen);
 800403a:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 800403e:	6b18      	ldr	r0, [r3, #48]	@ 0x30
 8004040:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004044:	6819      	ldr	r1, [r3, #0]
 8004046:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 800404a:	889b      	ldrh	r3, [r3, #4]
 800404c:	461a      	mov	r2, r3
 800404e:	f00b f9b6 	bl	800f3be <HAL_UARTEx_ReceiveToIdle_IT>
    //	HAL_UARTEx_ReceiveToIdle_DMA(&huart8, uart8RxBuffer, 32);
    while (pdTRUE) {
        //		HAL_UART_Receive_IT(&huart8, uart8RxBuffer, 1);
        //		if(osSemaphoreAcquire(uart8RxSemaphore, pdMS_TO_TICKS(1000)) !=
        // osOK) 		if(xTaskNotifyWait(0, 0, &bytesRec, portMAX_DELAY) == pdTrue)
        frameTimeout = !(xTaskNotifyWait (0, 0, &bytesRec, pdMS_TO_TICKS (FRAME_TIMEOUT_MS)));
 8004052:	f107 020c 	add.w	r2, r7, #12
 8004056:	f44f 63fa 	mov.w	r3, #2000	@ 0x7d0
 800405a:	2100      	movs	r1, #0
 800405c:	2000      	movs	r0, #0
 800405e:	f00f fbf3 	bl	8013848 <xTaskNotifyWait>
 8004062:	4603      	mov	r3, r0
 8004064:	2b00      	cmp	r3, #0
 8004066:	bf0c      	ite	eq
 8004068:	2301      	moveq	r3, #1
 800406a:	2300      	movne	r3, #0
 800406c:	b2db      	uxtb	r3, r3
 800406e:	f8c7 311c 	str.w	r3, [r7, #284]	@ 0x11c

        osMutexAcquire (uartTaskData->rxDataBufferMutex, osWaitForever);
 8004072:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004076:	6a1b      	ldr	r3, [r3, #32]
 8004078:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 800407c:	4618      	mov	r0, r3
 800407e:	f00c fac1 	bl	8010604 <osMutexAcquire>
        frameBytesCount = uartTaskData->frameBytesCount;
 8004082:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004086:	8adb      	ldrh	r3, [r3, #22]
 8004088:	f8a7 3124 	strh.w	r3, [r7, #292]	@ 0x124
        osMutexRelease (uartTaskData->rxDataBufferMutex);
 800408c:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004090:	6a1b      	ldr	r3, [r3, #32]
 8004092:	4618      	mov	r0, r3
 8004094:	f00c fb01 	bl	801069a <osMutexRelease>
        if ((frameTimeout == pdTRUE) && (frameBytesCount > 0)) {
 8004098:	f8d7 311c 	ldr.w	r3, [r7, #284]	@ 0x11c
 800409c:	2b01      	cmp	r3, #1
 800409e:	d10a      	bne.n	80040b6 <UartRxTask+0x106>
 80040a0:	f8b7 3124 	ldrh.w	r3, [r7, #292]	@ 0x124
 80040a4:	2b00      	cmp	r3, #0
 80040a6:	d006      	beq.n	80040b6 <UartRxTask+0x106>
            receverState = srFail;
 80040a8:	2304      	movs	r3, #4
 80040aa:	f887 3133 	strb.w	r3, [r7, #307]	@ 0x133
            proceed      = pdTRUE;
 80040ae:	2301      	movs	r3, #1
 80040b0:	f8c7 3134 	str.w	r3, [r7, #308]	@ 0x134
 80040b4:	e029      	b.n	800410a <UartRxTask+0x15a>
        } else {
            if (frameTimeout == pdFALSE) {
 80040b6:	f8d7 311c 	ldr.w	r3, [r7, #284]	@ 0x11c
 80040ba:	2b00      	cmp	r3, #0
 80040bc:	d111      	bne.n	80040e2 <UartRxTask+0x132>
                proceed = pdTRUE;
 80040be:	2301      	movs	r3, #1
 80040c0:	f8c7 3134 	str.w	r3, [r7, #308]	@ 0x134
#if UART_TASK_LOGS
                printf ("Uart%d: RX bytes received: %ld\n", uartTaskData->uartNumber, bytesRec);
 80040c4:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 80040c8:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 80040cc:	4619      	mov	r1, r3
 80040ce:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 80040d2:	f5a3 739a 	sub.w	r3, r3, #308	@ 0x134
 80040d6:	681b      	ldr	r3, [r3, #0]
 80040d8:	461a      	mov	r2, r3
 80040da:	48c1      	ldr	r0, [pc, #772]	@ (80043e0 <UartRxTask+0x430>)
 80040dc:	f025 fa16 	bl	802950c <iprintf>
 80040e0:	e225      	b.n	800452e <UartRxTask+0x57e>
#endif
            } else {
                if (uartTaskData->huart->RxState == HAL_UART_STATE_READY) {
 80040e2:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 80040e6:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 80040e8:	f8d3 308c 	ldr.w	r3, [r3, #140]	@ 0x8c
 80040ec:	2b20      	cmp	r3, #32
 80040ee:	f040 821e 	bne.w	800452e <UartRxTask+0x57e>
                    HAL_UARTEx_ReceiveToIdle_IT (uartTaskData->huart, uartTaskData->uartRxBuffer, uartTaskData->uartRxBufferLen);
 80040f2:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 80040f6:	6b18      	ldr	r0, [r3, #48]	@ 0x30
 80040f8:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 80040fc:	6819      	ldr	r1, [r3, #0]
 80040fe:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004102:	889b      	ldrh	r3, [r3, #4]
 8004104:	461a      	mov	r2, r3
 8004106:	f00b f95a 	bl	800f3be <HAL_UARTEx_ReceiveToIdle_IT>
                }
            }
        }

        while (proceed) {
 800410a:	e210      	b.n	800452e <UartRxTask+0x57e>
            switch (receverState) {
 800410c:	f897 3133 	ldrb.w	r3, [r7, #307]	@ 0x133
 8004110:	2b04      	cmp	r3, #4
 8004112:	f200 81e7 	bhi.w	80044e4 <UartRxTask+0x534>
 8004116:	a201      	add	r2, pc, #4	@ (adr r2, 800411c <UartRxTask+0x16c>)
 8004118:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800411c:	08004131 	.word	0x08004131
 8004120:	08004293 	.word	0x08004293
 8004124:	08004277 	.word	0x08004277
 8004128:	08004333 	.word	0x08004333
 800412c:	080043ed 	.word	0x080043ed
            case srWaitForHeader:
                osMutexAcquire (uartTaskData->rxDataBufferMutex, osWaitForever);
 8004130:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004134:	6a1b      	ldr	r3, [r3, #32]
 8004136:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 800413a:	4618      	mov	r0, r3
 800413c:	f00c fa62 	bl	8010604 <osMutexAcquire>
                if (uartTaskData->frameData[0] == FRAME_INDICATOR) {
 8004140:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004144:	691b      	ldr	r3, [r3, #16]
 8004146:	781b      	ldrb	r3, [r3, #0]
 8004148:	2baa      	cmp	r3, #170	@ 0xaa
 800414a:	f040 8082 	bne.w	8004252 <UartRxTask+0x2a2>
                    if (frameBytesCount > FRAME_ID_LENGTH) {
 800414e:	f8b7 3124 	ldrh.w	r3, [r7, #292]	@ 0x124
 8004152:	2b02      	cmp	r3, #2
 8004154:	d914      	bls.n	8004180 <UartRxTask+0x1d0>
                        spFrameData.frameHeader.frameId =
                        CONVERT_BYTES_TO_SHORT_WORD (&(uartTaskData->frameData[FRAME_HEADER_LENGTH - FRAME_RESP_STAT_LENGTH - FRAME_DATALEN_LENGTH - FRAME_ID_LENGTH - FRAME_COMMAND_LENGTH]));
 8004156:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 800415a:	691b      	ldr	r3, [r3, #16]
 800415c:	3302      	adds	r3, #2
 800415e:	781b      	ldrb	r3, [r3, #0]
 8004160:	021b      	lsls	r3, r3, #8
 8004162:	b21a      	sxth	r2, r3
 8004164:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004168:	691b      	ldr	r3, [r3, #16]
 800416a:	3301      	adds	r3, #1
 800416c:	781b      	ldrb	r3, [r3, #0]
 800416e:	b21b      	sxth	r3, r3
 8004170:	4313      	orrs	r3, r2
 8004172:	b21b      	sxth	r3, r3
 8004174:	b29a      	uxth	r2, r3
                        spFrameData.frameHeader.frameId =
 8004176:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 800417a:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 800417e:	801a      	strh	r2, [r3, #0]
                    }
                    if (frameBytesCount > FRAME_ID_LENGTH + FRAME_COMMAND_LENGTH) {
 8004180:	f8b7 3124 	ldrh.w	r3, [r7, #292]	@ 0x124
 8004184:	2b04      	cmp	r3, #4
 8004186:	d923      	bls.n	80041d0 <UartRxTask+0x220>
                        frameCommandRaw = CONVERT_BYTES_TO_SHORT_WORD (&(uartTaskData->frameData[FRAME_HEADER_LENGTH - FRAME_RESP_STAT_LENGTH - FRAME_DATALEN_LENGTH - FRAME_COMMAND_LENGTH]));
 8004188:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 800418c:	691b      	ldr	r3, [r3, #16]
 800418e:	3304      	adds	r3, #4
 8004190:	781b      	ldrb	r3, [r3, #0]
 8004192:	021b      	lsls	r3, r3, #8
 8004194:	b21a      	sxth	r2, r3
 8004196:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 800419a:	691b      	ldr	r3, [r3, #16]
 800419c:	3303      	adds	r3, #3
 800419e:	781b      	ldrb	r3, [r3, #0]
 80041a0:	b21b      	sxth	r3, r3
 80041a2:	4313      	orrs	r3, r2
 80041a4:	b21b      	sxth	r3, r3
 80041a6:	f8a7 3126 	strh.w	r3, [r7, #294]	@ 0x126
                        spFrameData.frameHeader.frameCommand    = (SerialProtocolCommands)(frameCommandRaw & 0x7FFF);
 80041aa:	f8b7 3126 	ldrh.w	r3, [r7, #294]	@ 0x126
 80041ae:	b2da      	uxtb	r2, r3
 80041b0:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 80041b4:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 80041b8:	709a      	strb	r2, [r3, #2]
                        spFrameData.frameHeader.isResponseFrame = (frameCommandRaw & 0x8000) != 0 ? pdTRUE : pdFALSE;
 80041ba:	f9b7 3126 	ldrsh.w	r3, [r7, #294]	@ 0x126
 80041be:	13db      	asrs	r3, r3, #15
 80041c0:	b21b      	sxth	r3, r3
 80041c2:	f003 0201 	and.w	r2, r3, #1
 80041c6:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 80041ca:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 80041ce:	609a      	str	r2, [r3, #8]
                    }
                    if ((frameBytesCount > FRAME_ID_LENGTH + FRAME_COMMAND_LENGTH + FRAME_RESP_STAT_LENGTH) && ((spFrameData.frameHeader.frameCommand & 0x8000) != 0)) {
 80041d0:	f8b7 3124 	ldrh.w	r3, [r7, #292]	@ 0x124
 80041d4:	2b05      	cmp	r3, #5
 80041d6:	d913      	bls.n	8004200 <UartRxTask+0x250>
 80041d8:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 80041dc:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 80041e0:	789b      	ldrb	r3, [r3, #2]
 80041e2:	f403 4300 	and.w	r3, r3, #32768	@ 0x8000
 80041e6:	2b00      	cmp	r3, #0
 80041e8:	d00a      	beq.n	8004200 <UartRxTask+0x250>
                        spFrameData.frameHeader.respStatus = (SerialProtocolRespStatus)(uartTaskData->frameData[FRAME_ID_LENGTH + FRAME_COMMAND_LENGTH + FRAME_RESP_STAT_LENGTH]);
 80041ea:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 80041ee:	691b      	ldr	r3, [r3, #16]
 80041f0:	3305      	adds	r3, #5
 80041f2:	781b      	ldrb	r3, [r3, #0]
 80041f4:	b25a      	sxtb	r2, r3
 80041f6:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 80041fa:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 80041fe:	70da      	strb	r2, [r3, #3]
                    }
                    if (frameBytesCount >= FRAME_HEADER_LENGTH) {
 8004200:	f8b7 3124 	ldrh.w	r3, [r7, #292]	@ 0x124
 8004204:	2b07      	cmp	r3, #7
 8004206:	d920      	bls.n	800424a <UartRxTask+0x29a>
                        spFrameData.frameHeader.frameDataLength = CONVERT_BYTES_TO_SHORT_WORD (&(uartTaskData->frameData[FRAME_HEADER_LENGTH - FRAME_RESP_STAT_LENGTH - FRAME_DATALEN_LENGTH]));
 8004208:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 800420c:	691b      	ldr	r3, [r3, #16]
 800420e:	3306      	adds	r3, #6
 8004210:	781b      	ldrb	r3, [r3, #0]
 8004212:	021b      	lsls	r3, r3, #8
 8004214:	b21a      	sxth	r2, r3
 8004216:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 800421a:	691b      	ldr	r3, [r3, #16]
 800421c:	3305      	adds	r3, #5
 800421e:	781b      	ldrb	r3, [r3, #0]
 8004220:	b21b      	sxth	r3, r3
 8004222:	4313      	orrs	r3, r2
 8004224:	b21b      	sxth	r3, r3
 8004226:	b29a      	uxth	r2, r3
 8004228:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 800422c:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 8004230:	809a      	strh	r2, [r3, #4]
                        frameTotalLength                        = FRAME_HEADER_LENGTH + spFrameData.frameHeader.frameDataLength + FRAME_CRC_LENGTH;
 8004232:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 8004236:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 800423a:	889b      	ldrh	r3, [r3, #4]
 800423c:	330a      	adds	r3, #10
 800423e:	f8a7 313e 	strh.w	r3, [r7, #318]	@ 0x13e
                        receverState                            = srRecieveData;
 8004242:	2302      	movs	r3, #2
 8004244:	f887 3133 	strb.w	r3, [r7, #307]	@ 0x133
 8004248:	e00e      	b.n	8004268 <UartRxTask+0x2b8>
                    } else {
                        proceed = pdFALSE;
 800424a:	2300      	movs	r3, #0
 800424c:	f8c7 3134 	str.w	r3, [r7, #308]	@ 0x134
 8004250:	e00a      	b.n	8004268 <UartRxTask+0x2b8>
                    }
                } else {
                    if (frameBytesCount > 0) {
 8004252:	f8b7 3124 	ldrh.w	r3, [r7, #292]	@ 0x124
 8004256:	2b00      	cmp	r3, #0
 8004258:	d003      	beq.n	8004262 <UartRxTask+0x2b2>
                        receverState = srFail;
 800425a:	2304      	movs	r3, #4
 800425c:	f887 3133 	strb.w	r3, [r7, #307]	@ 0x133
 8004260:	e002      	b.n	8004268 <UartRxTask+0x2b8>
                    } else {
                        proceed = pdFALSE;
 8004262:	2300      	movs	r3, #0
 8004264:	f8c7 3134 	str.w	r3, [r7, #308]	@ 0x134
                    }
                }
                osMutexRelease (uartTaskData->rxDataBufferMutex);
 8004268:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 800426c:	6a1b      	ldr	r3, [r3, #32]
 800426e:	4618      	mov	r0, r3
 8004270:	f00c fa13 	bl	801069a <osMutexRelease>
                break;
 8004274:	e15b      	b.n	800452e <UartRxTask+0x57e>
            case srRecieveData:
                if (frameBytesCount >= frameTotalLength) {
 8004276:	f8b7 2124 	ldrh.w	r2, [r7, #292]	@ 0x124
 800427a:	f8b7 313e 	ldrh.w	r3, [r7, #318]	@ 0x13e
 800427e:	429a      	cmp	r2, r3
 8004280:	d303      	bcc.n	800428a <UartRxTask+0x2da>
                    receverState = srCheckCrc;
 8004282:	2301      	movs	r3, #1
 8004284:	f887 3133 	strb.w	r3, [r7, #307]	@ 0x133
                } else {
                    proceed = pdFALSE;
                }
                break;
 8004288:	e151      	b.n	800452e <UartRxTask+0x57e>
                    proceed = pdFALSE;
 800428a:	2300      	movs	r3, #0
 800428c:	f8c7 3134 	str.w	r3, [r7, #308]	@ 0x134
                break;
 8004290:	e14d      	b.n	800452e <UartRxTask+0x57e>
            case srCheckCrc:
                osMutexAcquire (uartTaskData->rxDataBufferMutex, osWaitForever);
 8004292:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004296:	6a1b      	ldr	r3, [r3, #32]
 8004298:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 800429c:	4618      	mov	r0, r3
 800429e:	f00c f9b1 	bl	8010604 <osMutexAcquire>
                frameCrc = CONVERT_BYTES_TO_SHORT_WORD (&(uartTaskData->frameData[frameTotalLength - FRAME_CRC_LENGTH]));
 80042a2:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 80042a6:	691a      	ldr	r2, [r3, #16]
 80042a8:	f8b7 313e 	ldrh.w	r3, [r7, #318]	@ 0x13e
 80042ac:	3b01      	subs	r3, #1
 80042ae:	4413      	add	r3, r2
 80042b0:	781b      	ldrb	r3, [r3, #0]
 80042b2:	021b      	lsls	r3, r3, #8
 80042b4:	b21a      	sxth	r2, r3
 80042b6:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 80042ba:	6919      	ldr	r1, [r3, #16]
 80042bc:	f8b7 313e 	ldrh.w	r3, [r7, #318]	@ 0x13e
 80042c0:	3b02      	subs	r3, #2
 80042c2:	440b      	add	r3, r1
 80042c4:	781b      	ldrb	r3, [r3, #0]
 80042c6:	b21b      	sxth	r3, r3
 80042c8:	4313      	orrs	r3, r2
 80042ca:	b21b      	sxth	r3, r3
 80042cc:	f8a7 3122 	strh.w	r3, [r7, #290]	@ 0x122
                crc      = HAL_CRC_Calculate (&hcrc, (uint32_t*)(uartTaskData->frameData), frameTotalLength - FRAME_CRC_LENGTH);
 80042d0:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 80042d4:	6919      	ldr	r1, [r3, #16]
 80042d6:	f8b7 313e 	ldrh.w	r3, [r7, #318]	@ 0x13e
 80042da:	3b02      	subs	r3, #2
 80042dc:	461a      	mov	r2, r3
 80042de:	4841      	ldr	r0, [pc, #260]	@ (80043e4 <UartRxTask+0x434>)
 80042e0:	f000 fe62 	bl	8004fa8 <HAL_CRC_Calculate>
 80042e4:	f8c7 0128 	str.w	r0, [r7, #296]	@ 0x128
                osMutexRelease (uartTaskData->rxDataBufferMutex);
 80042e8:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 80042ec:	6a1b      	ldr	r3, [r3, #32]
 80042ee:	4618      	mov	r0, r3
 80042f0:	f00c f9d3 	bl	801069a <osMutexRelease>
                crcPass = frameCrc == crc;
 80042f4:	f8b7 3122 	ldrh.w	r3, [r7, #290]	@ 0x122
 80042f8:	f8d7 2128 	ldr.w	r2, [r7, #296]	@ 0x128
 80042fc:	429a      	cmp	r2, r3
 80042fe:	bf0c      	ite	eq
 8004300:	2301      	moveq	r3, #1
 8004302:	2300      	movne	r3, #0
 8004304:	b2db      	uxtb	r3, r3
 8004306:	f8c7 3138 	str.w	r3, [r7, #312]	@ 0x138
                if (crcPass) {
 800430a:	f8d7 3138 	ldr.w	r3, [r7, #312]	@ 0x138
 800430e:	2b00      	cmp	r3, #0
 8004310:	d00b      	beq.n	800432a <UartRxTask+0x37a>
#if UART_TASK_LOGS
                    printf ("Uart%d: Frame CRC PASS\n", uartTaskData->uartNumber);
 8004312:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004316:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 800431a:	4619      	mov	r1, r3
 800431c:	4832      	ldr	r0, [pc, #200]	@ (80043e8 <UartRxTask+0x438>)
 800431e:	f025 f8f5 	bl	802950c <iprintf>
#endif
                    receverState = srExecuteCmd;
 8004322:	2303      	movs	r3, #3
 8004324:	f887 3133 	strb.w	r3, [r7, #307]	@ 0x133
                } else {
                    receverState = srFail;
                }
                break;
 8004328:	e101      	b.n	800452e <UartRxTask+0x57e>
                    receverState = srFail;
 800432a:	2304      	movs	r3, #4
 800432c:	f887 3133 	strb.w	r3, [r7, #307]	@ 0x133
                break;
 8004330:	e0fd      	b.n	800452e <UartRxTask+0x57e>
            case srExecuteCmd:
                if (/*(uartTaskData->processDataQueue != NULL) || */(uartTaskData->processDataCb != NULL) || (uartTaskData->processRxDataMsgBuffer != NULL)) {
 8004332:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004336:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 8004338:	2b00      	cmp	r3, #0
 800433a:	d104      	bne.n	8004346 <UartRxTask+0x396>
 800433c:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004340:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8004342:	2b00      	cmp	r3, #0
 8004344:	d01e      	beq.n	8004384 <UartRxTask+0x3d4>
                    osMutexAcquire (uartTaskData->rxDataBufferMutex, osWaitForever);
 8004346:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 800434a:	6a1b      	ldr	r3, [r3, #32]
 800434c:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 8004350:	4618      	mov	r0, r3
 8004352:	f00c f957 	bl	8010604 <osMutexAcquire>
                    memcpy (spFrameData.dataBuffer, &(uartTaskData->frameData[FRAME_HEADER_LENGTH]), spFrameData.frameHeader.frameDataLength);
 8004356:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 800435a:	691b      	ldr	r3, [r3, #16]
 800435c:	f103 0108 	add.w	r1, r3, #8
 8004360:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 8004364:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 8004368:	889b      	ldrh	r3, [r3, #4]
 800436a:	461a      	mov	r2, r3
 800436c:	f107 0310 	add.w	r3, r7, #16
 8004370:	330c      	adds	r3, #12
 8004372:	4618      	mov	r0, r3
 8004374:	f025 fb53 	bl	8029a1e <memcpy>
                    osMutexRelease (uartTaskData->rxDataBufferMutex);
 8004378:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 800437c:	6a1b      	ldr	r3, [r3, #32]
 800437e:	4618      	mov	r0, r3
 8004380:	f00c f98b 	bl	801069a <osMutexRelease>
                }

//                if (uartTaskData->processDataQueue != NULL) {
//                    osMessageQueuePut (uartTaskData->processDataQueue, &spFrameData, 0, osWaitForever);
//                }
                if (uartTaskData->processRxDataMsgBuffer != NULL) {
 8004384:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004388:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 800438a:	2b00      	cmp	r3, #0
 800438c:	d015      	beq.n	80043ba <UartRxTask+0x40a>
                    if(xMessageBufferSend (uartTaskData->processRxDataMsgBuffer, &spFrameData, sizeof (SerialProtocolFrameHeader) + spFrameData.frameHeader.frameDataLength, pdMS_TO_TICKS (200)) == pdFALSE)
 800438e:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004392:	6a58      	ldr	r0, [r3, #36]	@ 0x24
 8004394:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 8004398:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 800439c:	889b      	ldrh	r3, [r3, #4]
 800439e:	f103 020c 	add.w	r2, r3, #12
 80043a2:	f107 0110 	add.w	r1, r7, #16
 80043a6:	23c8      	movs	r3, #200	@ 0xc8
 80043a8:	f00d ff0a 	bl	80121c0 <xStreamBufferSend>
 80043ac:	4603      	mov	r3, r0
 80043ae:	2b00      	cmp	r3, #0
 80043b0:	d103      	bne.n	80043ba <UartRxTask+0x40a>
                    {
                    	receverState = srFail;
 80043b2:	2304      	movs	r3, #4
 80043b4:	f887 3133 	strb.w	r3, [r7, #307]	@ 0x133
                    	break;
 80043b8:	e0b9      	b.n	800452e <UartRxTask+0x57e>
                    }
                }
                if (uartTaskData->processDataCb != NULL) {
 80043ba:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 80043be:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 80043c0:	2b00      	cmp	r3, #0
 80043c2:	d008      	beq.n	80043d6 <UartRxTask+0x426>
                    uartTaskData->processDataCb (uartTaskData, &spFrameData);
 80043c4:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 80043c8:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 80043ca:	f107 0210 	add.w	r2, r7, #16
 80043ce:	4611      	mov	r1, r2
 80043d0:	f8d7 012c 	ldr.w	r0, [r7, #300]	@ 0x12c
 80043d4:	4798      	blx	r3
                }
                receverState = srFinish;
 80043d6:	2305      	movs	r3, #5
 80043d8:	f887 3133 	strb.w	r3, [r7, #307]	@ 0x133
                break;
 80043dc:	e0a7      	b.n	800452e <UartRxTask+0x57e>
 80043de:	bf00      	nop
 80043e0:	0802c478 	.word	0x0802c478
 80043e4:	24000234 	.word	0x24000234
 80043e8:	0802c498 	.word	0x0802c498
            case srFail:
                dataToSend = 0;
 80043ec:	2300      	movs	r3, #0
 80043ee:	f8a7 313c 	strh.w	r3, [r7, #316]	@ 0x13c
                if ((frameTimeout == pdTRUE) && (frameBytesCount > 2)) {
 80043f2:	f8d7 311c 	ldr.w	r3, [r7, #284]	@ 0x11c
 80043f6:	2b01      	cmp	r3, #1
 80043f8:	d122      	bne.n	8004440 <UartRxTask+0x490>
 80043fa:	f8b7 3124 	ldrh.w	r3, [r7, #292]	@ 0x124
 80043fe:	2b02      	cmp	r3, #2
 8004400:	d91e      	bls.n	8004440 <UartRxTask+0x490>
                    dataToSend = PrepareRespFrame (uart8TxBuffer, spFrameData.frameHeader.frameId, spFrameData.frameHeader.frameCommand, spTimeout, NULL, 0);
 8004402:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 8004406:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 800440a:	8819      	ldrh	r1, [r3, #0]
 800440c:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 8004410:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 8004414:	789a      	ldrb	r2, [r3, #2]
 8004416:	2300      	movs	r3, #0
 8004418:	9301      	str	r3, [sp, #4]
 800441a:	2300      	movs	r3, #0
 800441c:	9300      	str	r3, [sp, #0]
 800441e:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8004422:	4846      	ldr	r0, [pc, #280]	@ (800453c <UartRxTask+0x58c>)
 8004424:	f7ff f894 	bl	8003550 <PrepareRespFrame>
 8004428:	4603      	mov	r3, r0
 800442a:	f8a7 313c 	strh.w	r3, [r7, #316]	@ 0x13c
#if UART_TASK_LOGS
                    printf ("Uart%d: RX data receiver timeout!\n", uartTaskData->uartNumber);
 800442e:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004432:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 8004436:	4619      	mov	r1, r3
 8004438:	4841      	ldr	r0, [pc, #260]	@ (8004540 <UartRxTask+0x590>)
 800443a:	f025 f867 	bl	802950c <iprintf>
 800443e:	e038      	b.n	80044b2 <UartRxTask+0x502>
#endif
                } else if (!crcPass) {
 8004440:	f8d7 3138 	ldr.w	r3, [r7, #312]	@ 0x138
 8004444:	2b00      	cmp	r3, #0
 8004446:	d11e      	bne.n	8004486 <UartRxTask+0x4d6>
                    dataToSend = PrepareRespFrame (uart8TxBuffer, spFrameData.frameHeader.frameId, spFrameData.frameHeader.frameCommand, spCrcFail, NULL, 0);
 8004448:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 800444c:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 8004450:	8819      	ldrh	r1, [r3, #0]
 8004452:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 8004456:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 800445a:	789a      	ldrb	r2, [r3, #2]
 800445c:	2300      	movs	r3, #0
 800445e:	9301      	str	r3, [sp, #4]
 8004460:	2300      	movs	r3, #0
 8004462:	9300      	str	r3, [sp, #0]
 8004464:	f06f 0301 	mvn.w	r3, #1
 8004468:	4834      	ldr	r0, [pc, #208]	@ (800453c <UartRxTask+0x58c>)
 800446a:	f7ff f871 	bl	8003550 <PrepareRespFrame>
 800446e:	4603      	mov	r3, r0
 8004470:	f8a7 313c 	strh.w	r3, [r7, #316]	@ 0x13c
#if UART_TASK_LOGS
                    printf ("Uart%d: Frame CRC FAIL\n", uartTaskData->uartNumber);
 8004474:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004478:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 800447c:	4619      	mov	r1, r3
 800447e:	4831      	ldr	r0, [pc, #196]	@ (8004544 <UartRxTask+0x594>)
 8004480:	f025 f844 	bl	802950c <iprintf>
 8004484:	e015      	b.n	80044b2 <UartRxTask+0x502>
#endif
                }
                else
                {
                	dataToSend = PrepareRespFrame (uart8TxBuffer, spFrameData.frameHeader.frameId, spFrameData.frameHeader.frameCommand, spInternalError, NULL, 0);
 8004486:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 800448a:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 800448e:	8819      	ldrh	r1, [r3, #0]
 8004490:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 8004494:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 8004498:	789a      	ldrb	r2, [r3, #2]
 800449a:	2300      	movs	r3, #0
 800449c:	9301      	str	r3, [sp, #4]
 800449e:	2300      	movs	r3, #0
 80044a0:	9300      	str	r3, [sp, #0]
 80044a2:	f06f 0302 	mvn.w	r3, #2
 80044a6:	4825      	ldr	r0, [pc, #148]	@ (800453c <UartRxTask+0x58c>)
 80044a8:	f7ff f852 	bl	8003550 <PrepareRespFrame>
 80044ac:	4603      	mov	r3, r0
 80044ae:	f8a7 313c 	strh.w	r3, [r7, #316]	@ 0x13c
                }
                if (dataToSend > 0) {
 80044b2:	f8b7 313c 	ldrh.w	r3, [r7, #316]	@ 0x13c
 80044b6:	2b00      	cmp	r3, #0
 80044b8:	d006      	beq.n	80044c8 <UartRxTask+0x518>
                    HAL_UART_Transmit_IT (&huart8, uart8TxBuffer, dataToSend);
 80044ba:	f8b7 313c 	ldrh.w	r3, [r7, #316]	@ 0x13c
 80044be:	461a      	mov	r2, r3
 80044c0:	491e      	ldr	r1, [pc, #120]	@ (800453c <UartRxTask+0x58c>)
 80044c2:	4821      	ldr	r0, [pc, #132]	@ (8004548 <UartRxTask+0x598>)
 80044c4:	f008 faa6 	bl	800ca14 <HAL_UART_Transmit_IT>
                }
#if UART_TASK_LOGS
                printf ("Uart%d: TX bytes sent: %d\n", dataToSend, uartTaskData->uartNumber);
 80044c8:	f8b7 113c 	ldrh.w	r1, [r7, #316]	@ 0x13c
 80044cc:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 80044d0:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 80044d4:	461a      	mov	r2, r3
 80044d6:	481d      	ldr	r0, [pc, #116]	@ (800454c <UartRxTask+0x59c>)
 80044d8:	f025 f818 	bl	802950c <iprintf>
#endif
                receverState = srFinish;
 80044dc:	2305      	movs	r3, #5
 80044de:	f887 3133 	strb.w	r3, [r7, #307]	@ 0x133
                break;
 80044e2:	e024      	b.n	800452e <UartRxTask+0x57e>
            case srFinish:
            default:
                osMutexAcquire (uartTaskData->rxDataBufferMutex, osWaitForever);
 80044e4:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 80044e8:	6a1b      	ldr	r3, [r3, #32]
 80044ea:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 80044ee:	4618      	mov	r0, r3
 80044f0:	f00c f888 	bl	8010604 <osMutexAcquire>
                uartTaskData->frameBytesCount = 0;
 80044f4:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 80044f8:	2200      	movs	r2, #0
 80044fa:	82da      	strh	r2, [r3, #22]
                osMutexRelease (uartTaskData->rxDataBufferMutex);
 80044fc:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004500:	6a1b      	ldr	r3, [r3, #32]
 8004502:	4618      	mov	r0, r3
 8004504:	f00c f8c9 	bl	801069a <osMutexRelease>
                spFrameData.frameHeader.frameCommand = spUnknown;
 8004508:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 800450c:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 8004510:	2208      	movs	r2, #8
 8004512:	709a      	strb	r2, [r3, #2]
                frameTotalLength                     = 0;
 8004514:	2300      	movs	r3, #0
 8004516:	f8a7 313e 	strh.w	r3, [r7, #318]	@ 0x13e
                outputDataBufferPos                  = 0;
 800451a:	4b0d      	ldr	r3, [pc, #52]	@ (8004550 <UartRxTask+0x5a0>)
 800451c:	2200      	movs	r2, #0
 800451e:	801a      	strh	r2, [r3, #0]
                receverState                         = srWaitForHeader;
 8004520:	2300      	movs	r3, #0
 8004522:	f887 3133 	strb.w	r3, [r7, #307]	@ 0x133
                proceed                              = pdFALSE;
 8004526:	2300      	movs	r3, #0
 8004528:	f8c7 3134 	str.w	r3, [r7, #308]	@ 0x134
                break;
 800452c:	bf00      	nop
        while (proceed) {
 800452e:	f8d7 3134 	ldr.w	r3, [r7, #308]	@ 0x134
 8004532:	2b00      	cmp	r3, #0
 8004534:	f47f adea 	bne.w	800410c <UartRxTask+0x15c>
        frameTimeout = !(xTaskNotifyWait (0, 0, &bytesRec, pdMS_TO_TICKS (FRAME_TIMEOUT_MS)));
 8004538:	e58b      	b.n	8004052 <UartRxTask+0xa2>
 800453a:	bf00      	nop
 800453c:	24000f70 	.word	0x24000f70
 8004540:	0802c4b0 	.word	0x0802c4b0
 8004544:	0802c4d4 	.word	0x0802c4d4
 8004548:	2400026c 	.word	0x2400026c
 800454c:	0802c4ec 	.word	0x0802c4ec
 8004550:	240012d0 	.word	0x240012d0

08004554 <ReadMeasSetFromBuffer>:
    printf ("Uart%d: TX bytes sent: %d\n", uartTaskData->uartNumber, dataToSend);
#endif
}

void ReadMeasSetFromBuffer(uint8_t* buff, uint16_t* buffPos, float* dataSet)
{
 8004554:	b580      	push	{r7, lr}
 8004556:	b086      	sub	sp, #24
 8004558:	af00      	add	r7, sp, #0
 800455a:	60f8      	str	r0, [r7, #12]
 800455c:	60b9      	str	r1, [r7, #8]
 800455e:	607a      	str	r2, [r7, #4]
	for(uint8_t i = 0; i < 3; i++)
 8004560:	2300      	movs	r3, #0
 8004562:	75fb      	strb	r3, [r7, #23]
 8004564:	e00b      	b.n	800457e <ReadMeasSetFromBuffer+0x2a>
	{
		ReadFloatFromBuffer(buff, buffPos, &dataSet[i]);
 8004566:	7dfb      	ldrb	r3, [r7, #23]
 8004568:	009b      	lsls	r3, r3, #2
 800456a:	687a      	ldr	r2, [r7, #4]
 800456c:	4413      	add	r3, r2
 800456e:	461a      	mov	r2, r3
 8004570:	68b9      	ldr	r1, [r7, #8]
 8004572:	68f8      	ldr	r0, [r7, #12]
 8004574:	f7fe ff23 	bl	80033be <ReadFloatFromBuffer>
	for(uint8_t i = 0; i < 3; i++)
 8004578:	7dfb      	ldrb	r3, [r7, #23]
 800457a:	3301      	adds	r3, #1
 800457c:	75fb      	strb	r3, [r7, #23]
 800457e:	7dfb      	ldrb	r3, [r7, #23]
 8004580:	2b02      	cmp	r3, #2
 8004582:	d9f0      	bls.n	8004566 <ReadMeasSetFromBuffer+0x12>
	}
}
 8004584:	bf00      	nop
 8004586:	bf00      	nop
 8004588:	3718      	adds	r7, #24
 800458a:	46bd      	mov	sp, r7
 800458c:	bd80      	pop	{r7, pc}
	...

08004590 <UartTxTask>:

void UartTxTask (void* argument) {
 8004590:	b580      	push	{r7, lr}
 8004592:	b0d2      	sub	sp, #328	@ 0x148
 8004594:	af02      	add	r7, sp, #8
 8004596:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 800459a:	f5a3 739e 	sub.w	r3, r3, #316	@ 0x13c
 800459e:	6018      	str	r0, [r3, #0]
    UartTaskData* const uartTaskData  = (UartTaskData*)argument;
 80045a0:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 80045a4:	f5a3 739e 	sub.w	r3, r3, #316	@ 0x13c
 80045a8:	681b      	ldr	r3, [r3, #0]
 80045aa:	f8c7 3138 	str.w	r3, [r7, #312]	@ 0x138
    InterProcessData data             = { 0 };
 80045ae:	f507 738e 	add.w	r3, r7, #284	@ 0x11c
 80045b2:	2200      	movs	r2, #0
 80045b4:	601a      	str	r2, [r3, #0]
 80045b6:	605a      	str	r2, [r3, #4]
 80045b8:	609a      	str	r2, [r3, #8]
    SerialProtocolFrameData frameData = { 0 };
 80045ba:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 80045be:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 80045c2:	4618      	mov	r0, r3
 80045c4:	f44f 7386 	mov.w	r3, #268	@ 0x10c
 80045c8:	461a      	mov	r2, r3
 80045ca:	2100      	movs	r1, #0
 80045cc:	f025 f930 	bl	8029830 <memset>
    size_t bytesInMsg;
    uint16_t frameId                    = 0;
 80045d0:	2300      	movs	r3, #0
 80045d2:	f8a7 3136 	strh.w	r3, [r7, #310]	@ 0x136
    uint32_t rndVal                     = 0;
 80045d6:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 80045da:	f5a3 739a 	sub.w	r3, r3, #308	@ 0x134
 80045de:	2200      	movs	r2, #0
 80045e0:	601a      	str	r2, [r3, #0]
    uint16_t bytesToSend                = 0;
 80045e2:	2300      	movs	r3, #0
 80045e4:	f8a7 3134 	strh.w	r3, [r7, #308]	@ 0x134
    SerialProtocolCommands frameCommand = spUnknown;
 80045e8:	2308      	movs	r3, #8
 80045ea:	f887 3133 	strb.w	r3, [r7, #307]	@ 0x133
    uint16_t inputDataBufferPos = 0;
 80045ee:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 80045f2:	f5a3 739b 	sub.w	r3, r3, #310	@ 0x136
 80045f6:	2200      	movs	r2, #0
 80045f8:	801a      	strh	r2, [r3, #0]

    while (pdTRUE) {
        if (uartTaskData->sendCmdToSlaveQueue != NULL) {
 80045fa:	f8d7 3138 	ldr.w	r3, [r7, #312]	@ 0x138
 80045fe:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8004600:	2b00      	cmp	r3, #0
 8004602:	f000 8129 	beq.w	8004858 <UartTxTask+0x2c8>
            osMessageQueueGet (uartTaskData->sendCmdToSlaveQueue, &data, 0, osWaitForever);
 8004606:	f8d7 3138 	ldr.w	r3, [r7, #312]	@ 0x138
 800460a:	6ad8      	ldr	r0, [r3, #44]	@ 0x2c
 800460c:	f507 718e 	add.w	r1, r7, #284	@ 0x11c
 8004610:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8004614:	2200      	movs	r2, #0
 8004616:	f00c fa95 	bl	8010b44 <osMessageQueueGet>
            HAL_RNG_GenerateRandomNumber (&hrng, &rndVal);
 800461a:	f107 030c 	add.w	r3, r7, #12
 800461e:	4619      	mov	r1, r3
 8004620:	4892      	ldr	r0, [pc, #584]	@ (800486c <UartTxTask+0x2dc>)
 8004622:	f007 fe83 	bl	800c32c <HAL_RNG_GenerateRandomNumber>
            frameId             = (uint16_t)(rndVal & 0xFFFF);
 8004626:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 800462a:	f5a3 739a 	sub.w	r3, r3, #308	@ 0x134
 800462e:	681b      	ldr	r3, [r3, #0]
 8004630:	f8a7 3136 	strh.w	r3, [r7, #310]	@ 0x136
            frameCommand        = data.spCommand;
 8004634:	f897 311c 	ldrb.w	r3, [r7, #284]	@ 0x11c
 8004638:	f887 3133 	strb.w	r3, [r7, #307]	@ 0x133
            outputDataBufferPos = 0;
 800463c:	4b8c      	ldr	r3, [pc, #560]	@ (8004870 <UartTxTask+0x2e0>)
 800463e:	2200      	movs	r2, #0
 8004640:	801a      	strh	r2, [r3, #0]
            memset (outputDataBuffer, 0x00, OUTPUT_DATA_BUFF_SIZE);
 8004642:	2280      	movs	r2, #128	@ 0x80
 8004644:	2100      	movs	r1, #0
 8004646:	488b      	ldr	r0, [pc, #556]	@ (8004874 <UartTxTask+0x2e4>)
 8004648:	f025 f8f2 	bl	8029830 <memset>
            switch (frameCommand) {
 800464c:	f897 3133 	ldrb.w	r3, [r7, #307]	@ 0x133
 8004650:	2b07      	cmp	r3, #7
 8004652:	f200 8106 	bhi.w	8004862 <UartTxTask+0x2d2>
 8004656:	a201      	add	r2, pc, #4	@ (adr r2, 800465c <UartTxTask+0xcc>)
 8004658:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800465c:	080046c5 	.word	0x080046c5
 8004660:	080046c5 	.word	0x080046c5
 8004664:	0800467d 	.word	0x0800467d
 8004668:	0800467d 	.word	0x0800467d
 800466c:	0800467d 	.word	0x0800467d
 8004670:	080046b3 	.word	0x080046b3
 8004674:	080046b3 	.word	0x080046b3
 8004678:	080046a1 	.word	0x080046a1
            case spSetFanSpeed:
            case spSetMotorXOn:
            case spSetMotorYOn:
                WriteDataToBuffer (outputDataBuffer, &outputDataBufferPos, &data.values.integerValues.value[0], sizeof (float));
 800467c:	f507 738e 	add.w	r3, r7, #284	@ 0x11c
 8004680:	1d1a      	adds	r2, r3, #4
 8004682:	2304      	movs	r3, #4
 8004684:	497a      	ldr	r1, [pc, #488]	@ (8004870 <UartTxTask+0x2e0>)
 8004686:	487b      	ldr	r0, [pc, #492]	@ (8004874 <UartTxTask+0x2e4>)
 8004688:	f7fe fe68 	bl	800335c <WriteDataToBuffer>
                WriteDataToBuffer (outputDataBuffer, &outputDataBufferPos, &data.values.integerValues.value[1], sizeof (float));
 800468c:	f507 738e 	add.w	r3, r7, #284	@ 0x11c
 8004690:	f103 0208 	add.w	r2, r3, #8
 8004694:	2304      	movs	r3, #4
 8004696:	4976      	ldr	r1, [pc, #472]	@ (8004870 <UartTxTask+0x2e0>)
 8004698:	4876      	ldr	r0, [pc, #472]	@ (8004874 <UartTxTask+0x2e4>)
 800469a:	f7fe fe5f 	bl	800335c <WriteDataToBuffer>
                break;
 800469e:	e012      	b.n	80046c6 <UartTxTask+0x136>
            case spSetDiodeOn: WriteDataToBuffer (outputDataBuffer, &outputDataBufferPos, &data.values.integerValues.value[0], sizeof (float)); break;
 80046a0:	f507 738e 	add.w	r3, r7, #284	@ 0x11c
 80046a4:	1d1a      	adds	r2, r3, #4
 80046a6:	2304      	movs	r3, #4
 80046a8:	4971      	ldr	r1, [pc, #452]	@ (8004870 <UartTxTask+0x2e0>)
 80046aa:	4872      	ldr	r0, [pc, #456]	@ (8004874 <UartTxTask+0x2e4>)
 80046ac:	f7fe fe56 	bl	800335c <WriteDataToBuffer>
 80046b0:	e009      	b.n	80046c6 <UartTxTask+0x136>
            case spSetmotorXMaxCurrent:
            case spSetmotorYMaxCurrent: WriteDataToBuffer (outputDataBuffer, &outputDataBufferPos, &data.values.flaotValues.value[0], sizeof (float)); break;
 80046b2:	f507 738e 	add.w	r3, r7, #284	@ 0x11c
 80046b6:	1d1a      	adds	r2, r3, #4
 80046b8:	2304      	movs	r3, #4
 80046ba:	496d      	ldr	r1, [pc, #436]	@ (8004870 <UartTxTask+0x2e0>)
 80046bc:	486d      	ldr	r0, [pc, #436]	@ (8004874 <UartTxTask+0x2e4>)
 80046be:	f7fe fe4d 	bl	800335c <WriteDataToBuffer>
 80046c2:	e000      	b.n	80046c6 <UartTxTask+0x136>
            case spGetElectricalMeasurments:
            case spGetSensorMeasurments: break;
 80046c4:	bf00      	nop
            default: continue; break;
            }

            bytesToSend = PrepareReqFrame (uart8TxBuffer, frameId, frameCommand, outputDataBuffer, outputDataBufferPos);
 80046c6:	4b6a      	ldr	r3, [pc, #424]	@ (8004870 <UartTxTask+0x2e0>)
 80046c8:	881b      	ldrh	r3, [r3, #0]
 80046ca:	f897 2133 	ldrb.w	r2, [r7, #307]	@ 0x133
 80046ce:	f8b7 1136 	ldrh.w	r1, [r7, #310]	@ 0x136
 80046d2:	9300      	str	r3, [sp, #0]
 80046d4:	4b67      	ldr	r3, [pc, #412]	@ (8004874 <UartTxTask+0x2e4>)
 80046d6:	4868      	ldr	r0, [pc, #416]	@ (8004878 <UartTxTask+0x2e8>)
 80046d8:	f7fe fea6 	bl	8003428 <PrepareReqFrame>
 80046dc:	4603      	mov	r3, r0
 80046de:	f8a7 3134 	strh.w	r3, [r7, #308]	@ 0x134
            HAL_UART_Transmit_IT (uartTaskData->huart, uart8TxBuffer, bytesToSend);
 80046e2:	f8d7 3138 	ldr.w	r3, [r7, #312]	@ 0x138
 80046e6:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 80046e8:	f8b7 2134 	ldrh.w	r2, [r7, #308]	@ 0x134
 80046ec:	4962      	ldr	r1, [pc, #392]	@ (8004878 <UartTxTask+0x2e8>)
 80046ee:	4618      	mov	r0, r3
 80046f0:	f008 f990 	bl	800ca14 <HAL_UART_Transmit_IT>
            bytesInMsg = xMessageBufferReceive (uartTaskData->processRxDataMsgBuffer, &frameData, INPUT_DATA_BUFF_SIZE, pdMS_TO_TICKS (1000));
 80046f4:	f8d7 3138 	ldr.w	r3, [r7, #312]	@ 0x138
 80046f8:	6a58      	ldr	r0, [r3, #36]	@ 0x24
 80046fa:	f107 0110 	add.w	r1, r7, #16
 80046fe:	f44f 737a 	mov.w	r3, #1000	@ 0x3e8
 8004702:	f44f 7280 	mov.w	r2, #256	@ 0x100
 8004706:	f00d fe51 	bl	80123ac <xStreamBufferReceive>
 800470a:	f8c7 012c 	str.w	r0, [r7, #300]	@ 0x12c
            if (bytesInMsg == 0) {
 800470e:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004712:	2b00      	cmp	r3, #0
 8004714:	d10b      	bne.n	800472e <UartTxTask+0x19e>
#if UART_TASK_LOGS
                printf ("Uart%d: Response timeout for frameId 0x%x\n", uartTaskData->uartNumber, frameId);
 8004716:	f8d7 3138 	ldr.w	r3, [r7, #312]	@ 0x138
 800471a:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 800471e:	4619      	mov	r1, r3
 8004720:	f8b7 3136 	ldrh.w	r3, [r7, #310]	@ 0x136
 8004724:	461a      	mov	r2, r3
 8004726:	4855      	ldr	r0, [pc, #340]	@ (800487c <UartTxTask+0x2ec>)
 8004728:	f024 fef0 	bl	802950c <iprintf>
 800472c:	e765      	b.n	80045fa <UartTxTask+0x6a>
#endif
            } else {
                if ((frameId == frameData.frameHeader.frameId) && (frameData.frameHeader.respStatus == spOK)) {
 800472e:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 8004732:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 8004736:	881b      	ldrh	r3, [r3, #0]
 8004738:	f8b7 2136 	ldrh.w	r2, [r7, #310]	@ 0x136
 800473c:	429a      	cmp	r2, r3
 800473e:	f47f af5c 	bne.w	80045fa <UartTxTask+0x6a>
 8004742:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 8004746:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 800474a:	f993 3003 	ldrsb.w	r3, [r3, #3]
 800474e:	2b00      	cmp	r3, #0
 8004750:	f47f af53 	bne.w	80045fa <UartTxTask+0x6a>
#if UART_TASK_LOGS
                    printf ("Uart%d: Response for frameId 0x%x OK\n", uartTaskData->uartNumber, frameId);
 8004754:	f8d7 3138 	ldr.w	r3, [r7, #312]	@ 0x138
 8004758:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 800475c:	4619      	mov	r1, r3
 800475e:	f8b7 3136 	ldrh.w	r3, [r7, #310]	@ 0x136
 8004762:	461a      	mov	r2, r3
 8004764:	4846      	ldr	r0, [pc, #280]	@ (8004880 <UartTxTask+0x2f0>)
 8004766:	f024 fed1 	bl	802950c <iprintf>
#endif
                    switch(frameData.frameHeader.frameCommand)
 800476a:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 800476e:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 8004772:	789b      	ldrb	r3, [r3, #2]
 8004774:	2b00      	cmp	r3, #0
 8004776:	d176      	bne.n	8004866 <UartTxTask+0x2d6>
                    {
                    case spGetElectricalMeasurments:
                    	uint8_t boardNumber;
                    	osMutexAcquire (resMeasurementsMutex, osWaitForever);
 8004778:	4b42      	ldr	r3, [pc, #264]	@ (8004884 <UartTxTask+0x2f4>)
 800477a:	681b      	ldr	r3, [r3, #0]
 800477c:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 8004780:	4618      	mov	r0, r3
 8004782:	f00b ff3f 	bl	8010604 <osMutexAcquire>
                    	for(boardNumber = 0; boardNumber < SLAVES_COUNT; boardNumber++)
 8004786:	2300      	movs	r3, #0
 8004788:	f887 313f 	strb.w	r3, [r7, #319]	@ 0x13f
 800478c:	e00e      	b.n	80047ac <UartTxTask+0x21c>
                    	{
                    		if(boardToUartNumberMap[boardNumber] == uartTaskData->uartNumber)
 800478e:	f897 313f 	ldrb.w	r3, [r7, #319]	@ 0x13f
 8004792:	4a3d      	ldr	r2, [pc, #244]	@ (8004888 <UartTxTask+0x2f8>)
 8004794:	5cd2      	ldrb	r2, [r2, r3]
 8004796:	f8d7 3138 	ldr.w	r3, [r7, #312]	@ 0x138
 800479a:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 800479e:	429a      	cmp	r2, r3
 80047a0:	d009      	beq.n	80047b6 <UartTxTask+0x226>
                    	for(boardNumber = 0; boardNumber < SLAVES_COUNT; boardNumber++)
 80047a2:	f897 313f 	ldrb.w	r3, [r7, #319]	@ 0x13f
 80047a6:	3301      	adds	r3, #1
 80047a8:	f887 313f 	strb.w	r3, [r7, #319]	@ 0x13f
 80047ac:	f897 313f 	ldrb.w	r3, [r7, #319]	@ 0x13f
 80047b0:	2b03      	cmp	r3, #3
 80047b2:	d9ec      	bls.n	800478e <UartTxTask+0x1fe>
 80047b4:	e000      	b.n	80047b8 <UartTxTask+0x228>
                    		{
                    			break;
 80047b6:	bf00      	nop
                    		}
                    	}
            			RESMeasurements *resMeas = &resMeasurements[boardNumber];
 80047b8:	f897 213f 	ldrb.w	r2, [r7, #319]	@ 0x13f
 80047bc:	4613      	mov	r3, r2
 80047be:	011b      	lsls	r3, r3, #4
 80047c0:	1a9b      	subs	r3, r3, r2
 80047c2:	009b      	lsls	r3, r3, #2
 80047c4:	4a31      	ldr	r2, [pc, #196]	@ (800488c <UartTxTask+0x2fc>)
 80047c6:	4413      	add	r3, r2
 80047c8:	f8c7 3128 	str.w	r3, [r7, #296]	@ 0x128
                    	inputDataBufferPos = 0;
 80047cc:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 80047d0:	f5a3 739b 	sub.w	r3, r3, #310	@ 0x136
 80047d4:	2200      	movs	r2, #0
 80047d6:	801a      	strh	r2, [r3, #0]
                    	ReadMeasSetFromBuffer(frameData.dataBuffer, &inputDataBufferPos, resMeas->voltageRMS);
 80047d8:	f8d7 2128 	ldr.w	r2, [r7, #296]	@ 0x128
 80047dc:	f107 010a 	add.w	r1, r7, #10
 80047e0:	f107 0310 	add.w	r3, r7, #16
 80047e4:	330c      	adds	r3, #12
 80047e6:	4618      	mov	r0, r3
 80047e8:	f7ff feb4 	bl	8004554 <ReadMeasSetFromBuffer>
                    	ReadMeasSetFromBuffer(frameData.dataBuffer, &inputDataBufferPos, resMeas->voltagePeak);
 80047ec:	f8d7 3128 	ldr.w	r3, [r7, #296]	@ 0x128
 80047f0:	f103 020c 	add.w	r2, r3, #12
 80047f4:	f107 010a 	add.w	r1, r7, #10
 80047f8:	f107 0310 	add.w	r3, r7, #16
 80047fc:	330c      	adds	r3, #12
 80047fe:	4618      	mov	r0, r3
 8004800:	f7ff fea8 	bl	8004554 <ReadMeasSetFromBuffer>
                    	ReadMeasSetFromBuffer(frameData.dataBuffer, &inputDataBufferPos, resMeas->currentRMS);
 8004804:	f8d7 3128 	ldr.w	r3, [r7, #296]	@ 0x128
 8004808:	f103 0218 	add.w	r2, r3, #24
 800480c:	f107 010a 	add.w	r1, r7, #10
 8004810:	f107 0310 	add.w	r3, r7, #16
 8004814:	330c      	adds	r3, #12
 8004816:	4618      	mov	r0, r3
 8004818:	f7ff fe9c 	bl	8004554 <ReadMeasSetFromBuffer>
                    	ReadMeasSetFromBuffer(frameData.dataBuffer, &inputDataBufferPos, resMeas->currentPeak);
 800481c:	f8d7 3128 	ldr.w	r3, [r7, #296]	@ 0x128
 8004820:	f103 0224 	add.w	r2, r3, #36	@ 0x24
 8004824:	f107 010a 	add.w	r1, r7, #10
 8004828:	f107 0310 	add.w	r3, r7, #16
 800482c:	330c      	adds	r3, #12
 800482e:	4618      	mov	r0, r3
 8004830:	f7ff fe90 	bl	8004554 <ReadMeasSetFromBuffer>
                    	ReadMeasSetFromBuffer(frameData.dataBuffer, &inputDataBufferPos, resMeas->power);
 8004834:	f8d7 3128 	ldr.w	r3, [r7, #296]	@ 0x128
 8004838:	f103 0230 	add.w	r2, r3, #48	@ 0x30
 800483c:	f107 010a 	add.w	r1, r7, #10
 8004840:	f107 0310 	add.w	r3, r7, #16
 8004844:	330c      	adds	r3, #12
 8004846:	4618      	mov	r0, r3
 8004848:	f7ff fe84 	bl	8004554 <ReadMeasSetFromBuffer>
                    	osMutexRelease(resMeasurementsMutex);
 800484c:	4b0d      	ldr	r3, [pc, #52]	@ (8004884 <UartTxTask+0x2f4>)
 800484e:	681b      	ldr	r3, [r3, #0]
 8004850:	4618      	mov	r0, r3
 8004852:	f00b ff22 	bl	801069a <osMutexRelease>
                    	break;
 8004856:	e007      	b.n	8004868 <UartTxTask+0x2d8>
                    	break;
                    }
                }
            }
        } else {
            osDelay (pdMS_TO_TICKS (1000));
 8004858:	f44f 707a 	mov.w	r0, #1000	@ 0x3e8
 800485c:	f00b fe31 	bl	80104c2 <osDelay>
 8004860:	e6cb      	b.n	80045fa <UartTxTask+0x6a>
            default: continue; break;
 8004862:	bf00      	nop
 8004864:	e6c9      	b.n	80045fa <UartTxTask+0x6a>
                    	break;
 8004866:	bf00      	nop
        if (uartTaskData->sendCmdToSlaveQueue != NULL) {
 8004868:	e6c7      	b.n	80045fa <UartTxTask+0x6a>
 800486a:	bf00      	nop
 800486c:	24000258 	.word	0x24000258
 8004870:	240012d0 	.word	0x240012d0
 8004874:	24001250 	.word	0x24001250
 8004878:	24000f70 	.word	0x24000f70
 800487c:	0802c508 	.word	0x0802c508
 8004880:	0802c534 	.word	0x0802c534
 8004884:	24000594 	.word	0x24000594
 8004888:	24000014 	.word	0x24000014
 800488c:	24000404 	.word	0x24000404

08004890 <Reset_Handler>:

    .section  .text.Reset_Handler
  .weak  Reset_Handler
  .type  Reset_Handler, %function
Reset_Handler:
  ldr   sp, =_estack      /* set stack pointer */
 8004890:	f8df d034 	ldr.w	sp, [pc, #52]	@ 80048c8 <LoopFillZerobss+0xe>

/* Call the clock system initialization function.*/
  bl  SystemInit
 8004894:	f7ff fa04 	bl	8003ca0 <SystemInit>

/* Copy the data segment initializers from flash to SRAM */
  ldr r0, =_sdata
 8004898:	480c      	ldr	r0, [pc, #48]	@ (80048cc <LoopFillZerobss+0x12>)
  ldr r1, =_edata
 800489a:	490d      	ldr	r1, [pc, #52]	@ (80048d0 <LoopFillZerobss+0x16>)
  ldr r2, =_sidata
 800489c:	4a0d      	ldr	r2, [pc, #52]	@ (80048d4 <LoopFillZerobss+0x1a>)
  movs r3, #0
 800489e:	2300      	movs	r3, #0
  b LoopCopyDataInit
 80048a0:	e002      	b.n	80048a8 <LoopCopyDataInit>

080048a2 <CopyDataInit>:

CopyDataInit:
  ldr r4, [r2, r3]
 80048a2:	58d4      	ldr	r4, [r2, r3]
  str r4, [r0, r3]
 80048a4:	50c4      	str	r4, [r0, r3]
  adds r3, r3, #4
 80048a6:	3304      	adds	r3, #4

080048a8 <LoopCopyDataInit>:

LoopCopyDataInit:
  adds r4, r0, r3
 80048a8:	18c4      	adds	r4, r0, r3
  cmp r4, r1
 80048aa:	428c      	cmp	r4, r1
  bcc CopyDataInit
 80048ac:	d3f9      	bcc.n	80048a2 <CopyDataInit>
/* Zero fill the bss segment. */
  ldr r2, =_sbss
 80048ae:	4a0a      	ldr	r2, [pc, #40]	@ (80048d8 <LoopFillZerobss+0x1e>)
  ldr r4, =_ebss
 80048b0:	4c0a      	ldr	r4, [pc, #40]	@ (80048dc <LoopFillZerobss+0x22>)
  movs r3, #0
 80048b2:	2300      	movs	r3, #0
  b LoopFillZerobss
 80048b4:	e001      	b.n	80048ba <LoopFillZerobss>

080048b6 <FillZerobss>:

FillZerobss:
  str  r3, [r2]
 80048b6:	6013      	str	r3, [r2, #0]
  adds r2, r2, #4
 80048b8:	3204      	adds	r2, #4

080048ba <LoopFillZerobss>:

LoopFillZerobss:
  cmp r2, r4
 80048ba:	42a2      	cmp	r2, r4
  bcc FillZerobss
 80048bc:	d3fb      	bcc.n	80048b6 <FillZerobss>

/* Call static constructors */
    bl __libc_init_array
 80048be:	f025 f887 	bl	80299d0 <__libc_init_array>
/* Call the application's entry point.*/
  bl  main
 80048c2:	f7fd f9f9 	bl	8001cb8 <main>
  bx  lr
 80048c6:	4770      	bx	lr
  ldr   sp, =_estack      /* set stack pointer */
 80048c8:	24060000 	.word	0x24060000
  ldr r0, =_sdata
 80048cc:	24000000 	.word	0x24000000
  ldr r1, =_edata
 80048d0:	24000210 	.word	0x24000210
  ldr r2, =_sidata
 80048d4:	08030c4c 	.word	0x08030c4c
  ldr r2, =_sbss
 80048d8:	24000210 	.word	0x24000210
  ldr r4, =_ebss
 80048dc:	2402a2ec 	.word	0x2402a2ec

080048e0 <ADC3_IRQHandler>:
 * @retval None
*/
    .section  .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
  b  Infinite_Loop
 80048e0:	e7fe      	b.n	80048e0 <ADC3_IRQHandler>

080048e2 <DP83848_RegisterBusIO>:
  * @param  ioctx: holds device IO functions.
  * @retval DP83848_STATUS_OK  if OK
  *         DP83848_STATUS_ERROR if missing mandatory function
  */
int32_t  DP83848_RegisterBusIO(dp83848_Object_t *pObj, dp83848_IOCtx_t *ioctx)
{
 80048e2:	b480      	push	{r7}
 80048e4:	b083      	sub	sp, #12
 80048e6:	af00      	add	r7, sp, #0
 80048e8:	6078      	str	r0, [r7, #4]
 80048ea:	6039      	str	r1, [r7, #0]
  if(!pObj || !ioctx->ReadReg || !ioctx->WriteReg || !ioctx->GetTick)
 80048ec:	687b      	ldr	r3, [r7, #4]
 80048ee:	2b00      	cmp	r3, #0
 80048f0:	d00b      	beq.n	800490a <DP83848_RegisterBusIO+0x28>
 80048f2:	683b      	ldr	r3, [r7, #0]
 80048f4:	68db      	ldr	r3, [r3, #12]
 80048f6:	2b00      	cmp	r3, #0
 80048f8:	d007      	beq.n	800490a <DP83848_RegisterBusIO+0x28>
 80048fa:	683b      	ldr	r3, [r7, #0]
 80048fc:	689b      	ldr	r3, [r3, #8]
 80048fe:	2b00      	cmp	r3, #0
 8004900:	d003      	beq.n	800490a <DP83848_RegisterBusIO+0x28>
 8004902:	683b      	ldr	r3, [r7, #0]
 8004904:	691b      	ldr	r3, [r3, #16]
 8004906:	2b00      	cmp	r3, #0
 8004908:	d102      	bne.n	8004910 <DP83848_RegisterBusIO+0x2e>
  {
    return DP83848_STATUS_ERROR;
 800490a:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 800490e:	e014      	b.n	800493a <DP83848_RegisterBusIO+0x58>
  }

  pObj->IO.Init = ioctx->Init;
 8004910:	683b      	ldr	r3, [r7, #0]
 8004912:	681a      	ldr	r2, [r3, #0]
 8004914:	687b      	ldr	r3, [r7, #4]
 8004916:	609a      	str	r2, [r3, #8]
  pObj->IO.DeInit = ioctx->DeInit;
 8004918:	683b      	ldr	r3, [r7, #0]
 800491a:	685a      	ldr	r2, [r3, #4]
 800491c:	687b      	ldr	r3, [r7, #4]
 800491e:	60da      	str	r2, [r3, #12]
  pObj->IO.ReadReg = ioctx->ReadReg;
 8004920:	683b      	ldr	r3, [r7, #0]
 8004922:	68da      	ldr	r2, [r3, #12]
 8004924:	687b      	ldr	r3, [r7, #4]
 8004926:	615a      	str	r2, [r3, #20]
  pObj->IO.WriteReg = ioctx->WriteReg;
 8004928:	683b      	ldr	r3, [r7, #0]
 800492a:	689a      	ldr	r2, [r3, #8]
 800492c:	687b      	ldr	r3, [r7, #4]
 800492e:	611a      	str	r2, [r3, #16]
  pObj->IO.GetTick = ioctx->GetTick;
 8004930:	683b      	ldr	r3, [r7, #0]
 8004932:	691a      	ldr	r2, [r3, #16]
 8004934:	687b      	ldr	r3, [r7, #4]
 8004936:	619a      	str	r2, [r3, #24]

  return DP83848_STATUS_OK;
 8004938:	2300      	movs	r3, #0
}
 800493a:	4618      	mov	r0, r3
 800493c:	370c      	adds	r7, #12
 800493e:	46bd      	mov	sp, r7
 8004940:	f85d 7b04 	ldr.w	r7, [sp], #4
 8004944:	4770      	bx	lr

08004946 <DP83848_Init>:
  * @retval DP83848_STATUS_OK  if OK
  *         DP83848_STATUS_ADDRESS_ERROR if cannot find device address
  *         DP83848_STATUS_READ_ERROR if connot read register
  */
 int32_t DP83848_Init(dp83848_Object_t *pObj)
 {
 8004946:	b580      	push	{r7, lr}
 8004948:	b086      	sub	sp, #24
 800494a:	af00      	add	r7, sp, #0
 800494c:	6078      	str	r0, [r7, #4]
   uint32_t regvalue = 0, addr = 0;
 800494e:	2300      	movs	r3, #0
 8004950:	60fb      	str	r3, [r7, #12]
 8004952:	2300      	movs	r3, #0
 8004954:	617b      	str	r3, [r7, #20]
   int32_t status = DP83848_STATUS_OK;
 8004956:	2300      	movs	r3, #0
 8004958:	613b      	str	r3, [r7, #16]

   if(pObj->Is_Initialized == 0)
 800495a:	687b      	ldr	r3, [r7, #4]
 800495c:	685b      	ldr	r3, [r3, #4]
 800495e:	2b00      	cmp	r3, #0
 8004960:	d139      	bne.n	80049d6 <DP83848_Init+0x90>
   {
     if(pObj->IO.Init != 0)
 8004962:	687b      	ldr	r3, [r7, #4]
 8004964:	689b      	ldr	r3, [r3, #8]
 8004966:	2b00      	cmp	r3, #0
 8004968:	d002      	beq.n	8004970 <DP83848_Init+0x2a>
     {
       /* GPIO and Clocks initialization */
       pObj->IO.Init();
 800496a:	687b      	ldr	r3, [r7, #4]
 800496c:	689b      	ldr	r3, [r3, #8]
 800496e:	4798      	blx	r3
     }

     /* for later check */
     pObj->DevAddr = DP83848_MAX_DEV_ADDR + 1;
 8004970:	687b      	ldr	r3, [r7, #4]
 8004972:	2220      	movs	r2, #32
 8004974:	601a      	str	r2, [r3, #0]

     /* Get the device address from special mode register */
     for(addr = 0; addr <= DP83848_MAX_DEV_ADDR; addr ++)
 8004976:	2300      	movs	r3, #0
 8004978:	617b      	str	r3, [r7, #20]
 800497a:	e01c      	b.n	80049b6 <DP83848_Init+0x70>
     {
       if(pObj->IO.ReadReg(addr, DP83848_SMR, &regvalue) < 0)
 800497c:	687b      	ldr	r3, [r7, #4]
 800497e:	695b      	ldr	r3, [r3, #20]
 8004980:	f107 020c 	add.w	r2, r7, #12
 8004984:	2119      	movs	r1, #25
 8004986:	6978      	ldr	r0, [r7, #20]
 8004988:	4798      	blx	r3
 800498a:	4603      	mov	r3, r0
 800498c:	2b00      	cmp	r3, #0
 800498e:	da03      	bge.n	8004998 <DP83848_Init+0x52>
       {
         status = DP83848_STATUS_READ_ERROR;
 8004990:	f06f 0304 	mvn.w	r3, #4
 8004994:	613b      	str	r3, [r7, #16]
         /* Can't read from this device address
            continue with next address */
         continue;
 8004996:	e00b      	b.n	80049b0 <DP83848_Init+0x6a>
       }

       if((regvalue & DP83848_SMR_PHY_ADDR) == addr)
 8004998:	68fb      	ldr	r3, [r7, #12]
 800499a:	f003 031f 	and.w	r3, r3, #31
 800499e:	697a      	ldr	r2, [r7, #20]
 80049a0:	429a      	cmp	r2, r3
 80049a2:	d105      	bne.n	80049b0 <DP83848_Init+0x6a>
       {
         pObj->DevAddr = addr;
 80049a4:	687b      	ldr	r3, [r7, #4]
 80049a6:	697a      	ldr	r2, [r7, #20]
 80049a8:	601a      	str	r2, [r3, #0]
         status = DP83848_STATUS_OK;
 80049aa:	2300      	movs	r3, #0
 80049ac:	613b      	str	r3, [r7, #16]
         break;
 80049ae:	e005      	b.n	80049bc <DP83848_Init+0x76>
     for(addr = 0; addr <= DP83848_MAX_DEV_ADDR; addr ++)
 80049b0:	697b      	ldr	r3, [r7, #20]
 80049b2:	3301      	adds	r3, #1
 80049b4:	617b      	str	r3, [r7, #20]
 80049b6:	697b      	ldr	r3, [r7, #20]
 80049b8:	2b1f      	cmp	r3, #31
 80049ba:	d9df      	bls.n	800497c <DP83848_Init+0x36>
       }
     }

     if(pObj->DevAddr > DP83848_MAX_DEV_ADDR)
 80049bc:	687b      	ldr	r3, [r7, #4]
 80049be:	681b      	ldr	r3, [r3, #0]
 80049c0:	2b1f      	cmp	r3, #31
 80049c2:	d902      	bls.n	80049ca <DP83848_Init+0x84>
     {
       status = DP83848_STATUS_ADDRESS_ERROR;
 80049c4:	f06f 0302 	mvn.w	r3, #2
 80049c8:	613b      	str	r3, [r7, #16]
     }

     /* if device address is matched */
     if(status == DP83848_STATUS_OK)
 80049ca:	693b      	ldr	r3, [r7, #16]
 80049cc:	2b00      	cmp	r3, #0
 80049ce:	d102      	bne.n	80049d6 <DP83848_Init+0x90>
     {
       pObj->Is_Initialized = 1;
 80049d0:	687b      	ldr	r3, [r7, #4]
 80049d2:	2201      	movs	r2, #1
 80049d4:	605a      	str	r2, [r3, #4]
     }
   }

   return status;
 80049d6:	693b      	ldr	r3, [r7, #16]
 }
 80049d8:	4618      	mov	r0, r3
 80049da:	3718      	adds	r7, #24
 80049dc:	46bd      	mov	sp, r7
 80049de:	bd80      	pop	{r7, pc}

080049e0 <DP83848_GetLinkState>:
  *         DP83848_STATUS_10MBITS_HALFDUPLEX  if 10Mb/s HD
  *         DP83848_STATUS_READ_ERROR if connot read register
  *         DP83848_STATUS_WRITE_ERROR if connot write to register
  */
int32_t DP83848_GetLinkState(dp83848_Object_t *pObj)
{
 80049e0:	b580      	push	{r7, lr}
 80049e2:	b084      	sub	sp, #16
 80049e4:	af00      	add	r7, sp, #0
 80049e6:	6078      	str	r0, [r7, #4]
  uint32_t readval = 0;
 80049e8:	2300      	movs	r3, #0
 80049ea:	60fb      	str	r3, [r7, #12]

  /* Read Status register  */
  if(pObj->IO.ReadReg(pObj->DevAddr, DP83848_BSR, &readval) < 0)
 80049ec:	687b      	ldr	r3, [r7, #4]
 80049ee:	695b      	ldr	r3, [r3, #20]
 80049f0:	687a      	ldr	r2, [r7, #4]
 80049f2:	6810      	ldr	r0, [r2, #0]
 80049f4:	f107 020c 	add.w	r2, r7, #12
 80049f8:	2101      	movs	r1, #1
 80049fa:	4798      	blx	r3
 80049fc:	4603      	mov	r3, r0
 80049fe:	2b00      	cmp	r3, #0
 8004a00:	da02      	bge.n	8004a08 <DP83848_GetLinkState+0x28>
  {
    return DP83848_STATUS_READ_ERROR;
 8004a02:	f06f 0304 	mvn.w	r3, #4
 8004a06:	e06e      	b.n	8004ae6 <DP83848_GetLinkState+0x106>
  }

  /* Read Status register again */
  if(pObj->IO.ReadReg(pObj->DevAddr, DP83848_BSR, &readval) < 0)
 8004a08:	687b      	ldr	r3, [r7, #4]
 8004a0a:	695b      	ldr	r3, [r3, #20]
 8004a0c:	687a      	ldr	r2, [r7, #4]
 8004a0e:	6810      	ldr	r0, [r2, #0]
 8004a10:	f107 020c 	add.w	r2, r7, #12
 8004a14:	2101      	movs	r1, #1
 8004a16:	4798      	blx	r3
 8004a18:	4603      	mov	r3, r0
 8004a1a:	2b00      	cmp	r3, #0
 8004a1c:	da02      	bge.n	8004a24 <DP83848_GetLinkState+0x44>
  {
    return DP83848_STATUS_READ_ERROR;
 8004a1e:	f06f 0304 	mvn.w	r3, #4
 8004a22:	e060      	b.n	8004ae6 <DP83848_GetLinkState+0x106>
  }

  if((readval & DP83848_BSR_LINK_STATUS) == 0)
 8004a24:	68fb      	ldr	r3, [r7, #12]
 8004a26:	f003 0304 	and.w	r3, r3, #4
 8004a2a:	2b00      	cmp	r3, #0
 8004a2c:	d101      	bne.n	8004a32 <DP83848_GetLinkState+0x52>
  {
    /* Return Link Down status */
    return DP83848_STATUS_LINK_DOWN;
 8004a2e:	2301      	movs	r3, #1
 8004a30:	e059      	b.n	8004ae6 <DP83848_GetLinkState+0x106>
  }

  /* Check Auto negotiaition */
  if(pObj->IO.ReadReg(pObj->DevAddr, DP83848_BCR, &readval) < 0)
 8004a32:	687b      	ldr	r3, [r7, #4]
 8004a34:	695b      	ldr	r3, [r3, #20]
 8004a36:	687a      	ldr	r2, [r7, #4]
 8004a38:	6810      	ldr	r0, [r2, #0]
 8004a3a:	f107 020c 	add.w	r2, r7, #12
 8004a3e:	2100      	movs	r1, #0
 8004a40:	4798      	blx	r3
 8004a42:	4603      	mov	r3, r0
 8004a44:	2b00      	cmp	r3, #0
 8004a46:	da02      	bge.n	8004a4e <DP83848_GetLinkState+0x6e>
  {
    return DP83848_STATUS_READ_ERROR;
 8004a48:	f06f 0304 	mvn.w	r3, #4
 8004a4c:	e04b      	b.n	8004ae6 <DP83848_GetLinkState+0x106>
  }

  if((readval & DP83848_BCR_AUTONEGO_EN) != DP83848_BCR_AUTONEGO_EN)
 8004a4e:	68fb      	ldr	r3, [r7, #12]
 8004a50:	f403 5380 	and.w	r3, r3, #4096	@ 0x1000
 8004a54:	2b00      	cmp	r3, #0
 8004a56:	d11b      	bne.n	8004a90 <DP83848_GetLinkState+0xb0>
  {
    if(((readval & DP83848_BCR_SPEED_SELECT) == DP83848_BCR_SPEED_SELECT) && ((readval & DP83848_BCR_DUPLEX_MODE) == DP83848_BCR_DUPLEX_MODE))
 8004a58:	68fb      	ldr	r3, [r7, #12]
 8004a5a:	f403 5300 	and.w	r3, r3, #8192	@ 0x2000
 8004a5e:	2b00      	cmp	r3, #0
 8004a60:	d006      	beq.n	8004a70 <DP83848_GetLinkState+0x90>
 8004a62:	68fb      	ldr	r3, [r7, #12]
 8004a64:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 8004a68:	2b00      	cmp	r3, #0
 8004a6a:	d001      	beq.n	8004a70 <DP83848_GetLinkState+0x90>
    {
      return DP83848_STATUS_100MBITS_FULLDUPLEX;
 8004a6c:	2302      	movs	r3, #2
 8004a6e:	e03a      	b.n	8004ae6 <DP83848_GetLinkState+0x106>
    }
    else if ((readval & DP83848_BCR_SPEED_SELECT) == DP83848_BCR_SPEED_SELECT)
 8004a70:	68fb      	ldr	r3, [r7, #12]
 8004a72:	f403 5300 	and.w	r3, r3, #8192	@ 0x2000
 8004a76:	2b00      	cmp	r3, #0
 8004a78:	d001      	beq.n	8004a7e <DP83848_GetLinkState+0x9e>
    {
      return DP83848_STATUS_100MBITS_HALFDUPLEX;
 8004a7a:	2303      	movs	r3, #3
 8004a7c:	e033      	b.n	8004ae6 <DP83848_GetLinkState+0x106>
    }
    else if ((readval & DP83848_BCR_DUPLEX_MODE) == DP83848_BCR_DUPLEX_MODE)
 8004a7e:	68fb      	ldr	r3, [r7, #12]
 8004a80:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 8004a84:	2b00      	cmp	r3, #0
 8004a86:	d001      	beq.n	8004a8c <DP83848_GetLinkState+0xac>
    {
      return DP83848_STATUS_10MBITS_FULLDUPLEX;
 8004a88:	2304      	movs	r3, #4
 8004a8a:	e02c      	b.n	8004ae6 <DP83848_GetLinkState+0x106>
    }
    else
    {
      return DP83848_STATUS_10MBITS_HALFDUPLEX;
 8004a8c:	2305      	movs	r3, #5
 8004a8e:	e02a      	b.n	8004ae6 <DP83848_GetLinkState+0x106>
    }
  }
  else /* Auto Nego enabled */
  {
    if(pObj->IO.ReadReg(pObj->DevAddr, DP83848_PHYSCSR, &readval) < 0)
 8004a90:	687b      	ldr	r3, [r7, #4]
 8004a92:	695b      	ldr	r3, [r3, #20]
 8004a94:	687a      	ldr	r2, [r7, #4]
 8004a96:	6810      	ldr	r0, [r2, #0]
 8004a98:	f107 020c 	add.w	r2, r7, #12
 8004a9c:	2110      	movs	r1, #16
 8004a9e:	4798      	blx	r3
 8004aa0:	4603      	mov	r3, r0
 8004aa2:	2b00      	cmp	r3, #0
 8004aa4:	da02      	bge.n	8004aac <DP83848_GetLinkState+0xcc>
    {
      return DP83848_STATUS_READ_ERROR;
 8004aa6:	f06f 0304 	mvn.w	r3, #4
 8004aaa:	e01c      	b.n	8004ae6 <DP83848_GetLinkState+0x106>
    }

    /* Check if auto nego not done */
    if((readval & DP83848_PHYSCSR_AUTONEGO_DONE) == 0)
 8004aac:	68fb      	ldr	r3, [r7, #12]
 8004aae:	f003 0310 	and.w	r3, r3, #16
 8004ab2:	2b00      	cmp	r3, #0
 8004ab4:	d101      	bne.n	8004aba <DP83848_GetLinkState+0xda>
    {
      return DP83848_STATUS_AUTONEGO_NOTDONE;
 8004ab6:	2306      	movs	r3, #6
 8004ab8:	e015      	b.n	8004ae6 <DP83848_GetLinkState+0x106>
    }

    if((readval & DP83848_PHYSCSR_HCDSPEEDMASK) == DP83848_PHYSCSR_100BTX_FD)
 8004aba:	68fb      	ldr	r3, [r7, #12]
 8004abc:	f003 0306 	and.w	r3, r3, #6
 8004ac0:	2b04      	cmp	r3, #4
 8004ac2:	d101      	bne.n	8004ac8 <DP83848_GetLinkState+0xe8>
    {
      return DP83848_STATUS_100MBITS_FULLDUPLEX;
 8004ac4:	2302      	movs	r3, #2
 8004ac6:	e00e      	b.n	8004ae6 <DP83848_GetLinkState+0x106>
    }
    else if ((readval & DP83848_PHYSCSR_HCDSPEEDMASK) == DP83848_PHYSCSR_100BTX_HD)
 8004ac8:	68fb      	ldr	r3, [r7, #12]
 8004aca:	f003 0306 	and.w	r3, r3, #6
 8004ace:	2b00      	cmp	r3, #0
 8004ad0:	d101      	bne.n	8004ad6 <DP83848_GetLinkState+0xf6>
    {
      return DP83848_STATUS_100MBITS_HALFDUPLEX;
 8004ad2:	2303      	movs	r3, #3
 8004ad4:	e007      	b.n	8004ae6 <DP83848_GetLinkState+0x106>
    }
    else if ((readval & DP83848_PHYSCSR_HCDSPEEDMASK) == DP83848_PHYSCSR_10BT_FD)
 8004ad6:	68fb      	ldr	r3, [r7, #12]
 8004ad8:	f003 0306 	and.w	r3, r3, #6
 8004adc:	2b06      	cmp	r3, #6
 8004ade:	d101      	bne.n	8004ae4 <DP83848_GetLinkState+0x104>
    {
      return DP83848_STATUS_10MBITS_FULLDUPLEX;
 8004ae0:	2304      	movs	r3, #4
 8004ae2:	e000      	b.n	8004ae6 <DP83848_GetLinkState+0x106>
    }
    else
    {
      return DP83848_STATUS_10MBITS_HALFDUPLEX;
 8004ae4:	2305      	movs	r3, #5
    }
  }
}
 8004ae6:	4618      	mov	r0, r3
 8004ae8:	3710      	adds	r7, #16
 8004aea:	46bd      	mov	sp, r7
 8004aec:	bd80      	pop	{r7, pc}
	...

08004af0 <HAL_Init>:
  *         need to ensure that the SysTick time base is always set to 1 millisecond
  *         to have correct HAL operation.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_Init(void)
{
 8004af0:	b580      	push	{r7, lr}
 8004af2:	b082      	sub	sp, #8
 8004af4:	af00      	add	r7, sp, #0
   __HAL_ART_CONFIG_BASE_ADDRESS(0x08100000UL);  /* Configure the Cortex-M4 ART Base address to the Flash Bank 2 : */
   __HAL_ART_ENABLE();                           /* Enable the Cortex-M4 ART */
#endif /* DUAL_CORE &&  CORE_CM4 */

  /* Set Interrupt Group Priority */
  HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
 8004af6:	2003      	movs	r0, #3
 8004af8:	f000 f947 	bl	8004d8a <HAL_NVIC_SetPriorityGrouping>

  /* Update the SystemCoreClock global variable */
#if defined(RCC_D1CFGR_D1CPRE)
  common_system_clock = HAL_RCC_GetSysClockFreq() >> ((D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_D1CPRE)>> RCC_D1CFGR_D1CPRE_Pos]) & 0x1FU);
 8004afc:	f005 fb8c 	bl	800a218 <HAL_RCC_GetSysClockFreq>
 8004b00:	4602      	mov	r2, r0
 8004b02:	4b15      	ldr	r3, [pc, #84]	@ (8004b58 <HAL_Init+0x68>)
 8004b04:	699b      	ldr	r3, [r3, #24]
 8004b06:	0a1b      	lsrs	r3, r3, #8
 8004b08:	f003 030f 	and.w	r3, r3, #15
 8004b0c:	4913      	ldr	r1, [pc, #76]	@ (8004b5c <HAL_Init+0x6c>)
 8004b0e:	5ccb      	ldrb	r3, [r1, r3]
 8004b10:	f003 031f 	and.w	r3, r3, #31
 8004b14:	fa22 f303 	lsr.w	r3, r2, r3
 8004b18:	607b      	str	r3, [r7, #4]
  common_system_clock = HAL_RCC_GetSysClockFreq() >> ((D1CorePrescTable[(RCC->CDCFGR1 & RCC_CDCFGR1_CDCPRE)>> RCC_CDCFGR1_CDCPRE_Pos]) & 0x1FU);
#endif

  /* Update the SystemD2Clock global variable */
#if defined(RCC_D1CFGR_HPRE)
  SystemD2Clock = (common_system_clock >> ((D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_HPRE)>> RCC_D1CFGR_HPRE_Pos]) & 0x1FU));
 8004b1a:	4b0f      	ldr	r3, [pc, #60]	@ (8004b58 <HAL_Init+0x68>)
 8004b1c:	699b      	ldr	r3, [r3, #24]
 8004b1e:	f003 030f 	and.w	r3, r3, #15
 8004b22:	4a0e      	ldr	r2, [pc, #56]	@ (8004b5c <HAL_Init+0x6c>)
 8004b24:	5cd3      	ldrb	r3, [r2, r3]
 8004b26:	f003 031f 	and.w	r3, r3, #31
 8004b2a:	687a      	ldr	r2, [r7, #4]
 8004b2c:	fa22 f303 	lsr.w	r3, r2, r3
 8004b30:	4a0b      	ldr	r2, [pc, #44]	@ (8004b60 <HAL_Init+0x70>)
 8004b32:	6013      	str	r3, [r2, #0]
#endif

#if defined(DUAL_CORE) && defined(CORE_CM4)
  SystemCoreClock = SystemD2Clock;
#else
  SystemCoreClock = common_system_clock;
 8004b34:	4a0b      	ldr	r2, [pc, #44]	@ (8004b64 <HAL_Init+0x74>)
 8004b36:	687b      	ldr	r3, [r7, #4]
 8004b38:	6013      	str	r3, [r2, #0]
#endif /* DUAL_CORE && CORE_CM4 */

  /* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */
  if(HAL_InitTick(TICK_INT_PRIORITY) != HAL_OK)
 8004b3a:	200f      	movs	r0, #15
 8004b3c:	f7fe fefe 	bl	800393c <HAL_InitTick>
 8004b40:	4603      	mov	r3, r0
 8004b42:	2b00      	cmp	r3, #0
 8004b44:	d001      	beq.n	8004b4a <HAL_Init+0x5a>
  {
    return HAL_ERROR;
 8004b46:	2301      	movs	r3, #1
 8004b48:	e002      	b.n	8004b50 <HAL_Init+0x60>
  }

  /* Init the low level hardware */
  HAL_MspInit();
 8004b4a:	f7fe fd9f 	bl	800368c <HAL_MspInit>

  /* Return function status */
  return HAL_OK;
 8004b4e:	2300      	movs	r3, #0
}
 8004b50:	4618      	mov	r0, r3
 8004b52:	3708      	adds	r7, #8
 8004b54:	46bd      	mov	sp, r7
 8004b56:	bd80      	pop	{r7, pc}
 8004b58:	58024400 	.word	0x58024400
 8004b5c:	080305b8 	.word	0x080305b8
 8004b60:	24000010 	.word	0x24000010
 8004b64:	2400000c 	.word	0x2400000c

08004b68 <HAL_IncTick>:
 * @note This function is declared as __weak to be overwritten in case of other
  *      implementations in user file.
  * @retval None
  */
__weak void HAL_IncTick(void)
{
 8004b68:	b480      	push	{r7}
 8004b6a:	af00      	add	r7, sp, #0
  uwTick += (uint32_t)uwTickFreq;
 8004b6c:	4b06      	ldr	r3, [pc, #24]	@ (8004b88 <HAL_IncTick+0x20>)
 8004b6e:	781b      	ldrb	r3, [r3, #0]
 8004b70:	461a      	mov	r2, r3
 8004b72:	4b06      	ldr	r3, [pc, #24]	@ (8004b8c <HAL_IncTick+0x24>)
 8004b74:	681b      	ldr	r3, [r3, #0]
 8004b76:	4413      	add	r3, r2
 8004b78:	4a04      	ldr	r2, [pc, #16]	@ (8004b8c <HAL_IncTick+0x24>)
 8004b7a:	6013      	str	r3, [r2, #0]
}
 8004b7c:	bf00      	nop
 8004b7e:	46bd      	mov	sp, r7
 8004b80:	f85d 7b04 	ldr.w	r7, [sp], #4
 8004b84:	4770      	bx	lr
 8004b86:	bf00      	nop
 8004b88:	2400001c 	.word	0x2400001c
 8004b8c:	240012d4 	.word	0x240012d4

08004b90 <HAL_GetTick>:
  * @note This function is declared as __weak to be overwritten in case of other
  *       implementations in user file.
  * @retval tick value
  */
__weak uint32_t HAL_GetTick(void)
{
 8004b90:	b480      	push	{r7}
 8004b92:	af00      	add	r7, sp, #0
  return uwTick;
 8004b94:	4b03      	ldr	r3, [pc, #12]	@ (8004ba4 <HAL_GetTick+0x14>)
 8004b96:	681b      	ldr	r3, [r3, #0]
}
 8004b98:	4618      	mov	r0, r3
 8004b9a:	46bd      	mov	sp, r7
 8004b9c:	f85d 7b04 	ldr.w	r7, [sp], #4
 8004ba0:	4770      	bx	lr
 8004ba2:	bf00      	nop
 8004ba4:	240012d4 	.word	0x240012d4

08004ba8 <HAL_Delay>:
  *       implementations in user file.
  * @param Delay  specifies the delay time length, in milliseconds.
  * @retval None
  */
__weak void HAL_Delay(uint32_t Delay)
{
 8004ba8:	b580      	push	{r7, lr}
 8004baa:	b084      	sub	sp, #16
 8004bac:	af00      	add	r7, sp, #0
 8004bae:	6078      	str	r0, [r7, #4]
  uint32_t tickstart = HAL_GetTick();
 8004bb0:	f7ff ffee 	bl	8004b90 <HAL_GetTick>
 8004bb4:	60b8      	str	r0, [r7, #8]
  uint32_t wait = Delay;
 8004bb6:	687b      	ldr	r3, [r7, #4]
 8004bb8:	60fb      	str	r3, [r7, #12]

  /* Add a freq to guarantee minimum wait */
  if (wait < HAL_MAX_DELAY)
 8004bba:	68fb      	ldr	r3, [r7, #12]
 8004bbc:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8004bc0:	d005      	beq.n	8004bce <HAL_Delay+0x26>
  {
    wait += (uint32_t)(uwTickFreq);
 8004bc2:	4b0a      	ldr	r3, [pc, #40]	@ (8004bec <HAL_Delay+0x44>)
 8004bc4:	781b      	ldrb	r3, [r3, #0]
 8004bc6:	461a      	mov	r2, r3
 8004bc8:	68fb      	ldr	r3, [r7, #12]
 8004bca:	4413      	add	r3, r2
 8004bcc:	60fb      	str	r3, [r7, #12]
  }

  while ((HAL_GetTick() - tickstart) < wait)
 8004bce:	bf00      	nop
 8004bd0:	f7ff ffde 	bl	8004b90 <HAL_GetTick>
 8004bd4:	4602      	mov	r2, r0
 8004bd6:	68bb      	ldr	r3, [r7, #8]
 8004bd8:	1ad3      	subs	r3, r2, r3
 8004bda:	68fa      	ldr	r2, [r7, #12]
 8004bdc:	429a      	cmp	r2, r3
 8004bde:	d8f7      	bhi.n	8004bd0 <HAL_Delay+0x28>
  {
  }
}
 8004be0:	bf00      	nop
 8004be2:	bf00      	nop
 8004be4:	3710      	adds	r7, #16
 8004be6:	46bd      	mov	sp, r7
 8004be8:	bd80      	pop	{r7, pc}
 8004bea:	bf00      	nop
 8004bec:	2400001c 	.word	0x2400001c

08004bf0 <HAL_GetREVID>:
/**
  * @brief  Returns the device revision identifier.
  * @retval Device revision identifier
  */
uint32_t HAL_GetREVID(void)
{
 8004bf0:	b480      	push	{r7}
 8004bf2:	af00      	add	r7, sp, #0
   return((DBGMCU->IDCODE) >> 16);
 8004bf4:	4b03      	ldr	r3, [pc, #12]	@ (8004c04 <HAL_GetREVID+0x14>)
 8004bf6:	681b      	ldr	r3, [r3, #0]
 8004bf8:	0c1b      	lsrs	r3, r3, #16
}
 8004bfa:	4618      	mov	r0, r3
 8004bfc:	46bd      	mov	sp, r7
 8004bfe:	f85d 7b04 	ldr.w	r7, [sp], #4
 8004c02:	4770      	bx	lr
 8004c04:	5c001000 	.word	0x5c001000

08004c08 <HAL_SYSCFG_ETHInterfaceSelect>:
  *   @arg SYSCFG_ETH_MII : Select the Media Independent Interface
  *   @arg SYSCFG_ETH_RMII: Select the Reduced Media Independent Interface
  * @retval None
  */
void HAL_SYSCFG_ETHInterfaceSelect(uint32_t SYSCFG_ETHInterface)
{
 8004c08:	b480      	push	{r7}
 8004c0a:	b083      	sub	sp, #12
 8004c0c:	af00      	add	r7, sp, #0
 8004c0e:	6078      	str	r0, [r7, #4]
  /* Check the parameter */
  assert_param(IS_SYSCFG_ETHERNET_CONFIG(SYSCFG_ETHInterface));

  MODIFY_REG(SYSCFG->PMCR, SYSCFG_PMCR_EPIS_SEL, (uint32_t)(SYSCFG_ETHInterface));
 8004c10:	4b06      	ldr	r3, [pc, #24]	@ (8004c2c <HAL_SYSCFG_ETHInterfaceSelect+0x24>)
 8004c12:	685b      	ldr	r3, [r3, #4]
 8004c14:	f423 0260 	bic.w	r2, r3, #14680064	@ 0xe00000
 8004c18:	4904      	ldr	r1, [pc, #16]	@ (8004c2c <HAL_SYSCFG_ETHInterfaceSelect+0x24>)
 8004c1a:	687b      	ldr	r3, [r7, #4]
 8004c1c:	4313      	orrs	r3, r2
 8004c1e:	604b      	str	r3, [r1, #4]
}
 8004c20:	bf00      	nop
 8004c22:	370c      	adds	r7, #12
 8004c24:	46bd      	mov	sp, r7
 8004c26:	f85d 7b04 	ldr.w	r7, [sp], #4
 8004c2a:	4770      	bx	lr
 8004c2c:	58000400 	.word	0x58000400

08004c30 <__NVIC_SetPriorityGrouping>:
{
 8004c30:	b480      	push	{r7}
 8004c32:	b085      	sub	sp, #20
 8004c34:	af00      	add	r7, sp, #0
 8004c36:	6078      	str	r0, [r7, #4]
  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */
 8004c38:	687b      	ldr	r3, [r7, #4]
 8004c3a:	f003 0307 	and.w	r3, r3, #7
 8004c3e:	60fb      	str	r3, [r7, #12]
  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
 8004c40:	4b0b      	ldr	r3, [pc, #44]	@ (8004c70 <__NVIC_SetPriorityGrouping+0x40>)
 8004c42:	68db      	ldr	r3, [r3, #12]
 8004c44:	60bb      	str	r3, [r7, #8]
  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
 8004c46:	68ba      	ldr	r2, [r7, #8]
 8004c48:	f64f 03ff 	movw	r3, #63743	@ 0xf8ff
 8004c4c:	4013      	ands	r3, r2
 8004c4e:	60bb      	str	r3, [r7, #8]
                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos)  );              /* Insert write key and priority group */
 8004c50:	68fb      	ldr	r3, [r7, #12]
 8004c52:	021a      	lsls	r2, r3, #8
                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
 8004c54:	68bb      	ldr	r3, [r7, #8]
 8004c56:	431a      	orrs	r2, r3
  reg_value  =  (reg_value                                   |
 8004c58:	4b06      	ldr	r3, [pc, #24]	@ (8004c74 <__NVIC_SetPriorityGrouping+0x44>)
 8004c5a:	4313      	orrs	r3, r2
 8004c5c:	60bb      	str	r3, [r7, #8]
  SCB->AIRCR =  reg_value;
 8004c5e:	4a04      	ldr	r2, [pc, #16]	@ (8004c70 <__NVIC_SetPriorityGrouping+0x40>)
 8004c60:	68bb      	ldr	r3, [r7, #8]
 8004c62:	60d3      	str	r3, [r2, #12]
}
 8004c64:	bf00      	nop
 8004c66:	3714      	adds	r7, #20
 8004c68:	46bd      	mov	sp, r7
 8004c6a:	f85d 7b04 	ldr.w	r7, [sp], #4
 8004c6e:	4770      	bx	lr
 8004c70:	e000ed00 	.word	0xe000ed00
 8004c74:	05fa0000 	.word	0x05fa0000

08004c78 <__NVIC_GetPriorityGrouping>:
{
 8004c78:	b480      	push	{r7}
 8004c7a:	af00      	add	r7, sp, #0
  return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
 8004c7c:	4b04      	ldr	r3, [pc, #16]	@ (8004c90 <__NVIC_GetPriorityGrouping+0x18>)
 8004c7e:	68db      	ldr	r3, [r3, #12]
 8004c80:	0a1b      	lsrs	r3, r3, #8
 8004c82:	f003 0307 	and.w	r3, r3, #7
}
 8004c86:	4618      	mov	r0, r3
 8004c88:	46bd      	mov	sp, r7
 8004c8a:	f85d 7b04 	ldr.w	r7, [sp], #4
 8004c8e:	4770      	bx	lr
 8004c90:	e000ed00 	.word	0xe000ed00

08004c94 <__NVIC_EnableIRQ>:
{
 8004c94:	b480      	push	{r7}
 8004c96:	b083      	sub	sp, #12
 8004c98:	af00      	add	r7, sp, #0
 8004c9a:	4603      	mov	r3, r0
 8004c9c:	80fb      	strh	r3, [r7, #6]
  if ((int32_t)(IRQn) >= 0)
 8004c9e:	f9b7 3006 	ldrsh.w	r3, [r7, #6]
 8004ca2:	2b00      	cmp	r3, #0
 8004ca4:	db0b      	blt.n	8004cbe <__NVIC_EnableIRQ+0x2a>
    NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
 8004ca6:	88fb      	ldrh	r3, [r7, #6]
 8004ca8:	f003 021f 	and.w	r2, r3, #31
 8004cac:	4907      	ldr	r1, [pc, #28]	@ (8004ccc <__NVIC_EnableIRQ+0x38>)
 8004cae:	f9b7 3006 	ldrsh.w	r3, [r7, #6]
 8004cb2:	095b      	lsrs	r3, r3, #5
 8004cb4:	2001      	movs	r0, #1
 8004cb6:	fa00 f202 	lsl.w	r2, r0, r2
 8004cba:	f841 2023 	str.w	r2, [r1, r3, lsl #2]
}
 8004cbe:	bf00      	nop
 8004cc0:	370c      	adds	r7, #12
 8004cc2:	46bd      	mov	sp, r7
 8004cc4:	f85d 7b04 	ldr.w	r7, [sp], #4
 8004cc8:	4770      	bx	lr
 8004cca:	bf00      	nop
 8004ccc:	e000e100 	.word	0xe000e100

08004cd0 <__NVIC_SetPriority>:
{
 8004cd0:	b480      	push	{r7}
 8004cd2:	b083      	sub	sp, #12
 8004cd4:	af00      	add	r7, sp, #0
 8004cd6:	4603      	mov	r3, r0
 8004cd8:	6039      	str	r1, [r7, #0]
 8004cda:	80fb      	strh	r3, [r7, #6]
  if ((int32_t)(IRQn) >= 0)
 8004cdc:	f9b7 3006 	ldrsh.w	r3, [r7, #6]
 8004ce0:	2b00      	cmp	r3, #0
 8004ce2:	db0a      	blt.n	8004cfa <__NVIC_SetPriority+0x2a>
    NVIC->IP[((uint32_t)IRQn)]                = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 8004ce4:	683b      	ldr	r3, [r7, #0]
 8004ce6:	b2da      	uxtb	r2, r3
 8004ce8:	490c      	ldr	r1, [pc, #48]	@ (8004d1c <__NVIC_SetPriority+0x4c>)
 8004cea:	f9b7 3006 	ldrsh.w	r3, [r7, #6]
 8004cee:	0112      	lsls	r2, r2, #4
 8004cf0:	b2d2      	uxtb	r2, r2
 8004cf2:	440b      	add	r3, r1
 8004cf4:	f883 2300 	strb.w	r2, [r3, #768]	@ 0x300
}
 8004cf8:	e00a      	b.n	8004d10 <__NVIC_SetPriority+0x40>
    SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 8004cfa:	683b      	ldr	r3, [r7, #0]
 8004cfc:	b2da      	uxtb	r2, r3
 8004cfe:	4908      	ldr	r1, [pc, #32]	@ (8004d20 <__NVIC_SetPriority+0x50>)
 8004d00:	88fb      	ldrh	r3, [r7, #6]
 8004d02:	f003 030f 	and.w	r3, r3, #15
 8004d06:	3b04      	subs	r3, #4
 8004d08:	0112      	lsls	r2, r2, #4
 8004d0a:	b2d2      	uxtb	r2, r2
 8004d0c:	440b      	add	r3, r1
 8004d0e:	761a      	strb	r2, [r3, #24]
}
 8004d10:	bf00      	nop
 8004d12:	370c      	adds	r7, #12
 8004d14:	46bd      	mov	sp, r7
 8004d16:	f85d 7b04 	ldr.w	r7, [sp], #4
 8004d1a:	4770      	bx	lr
 8004d1c:	e000e100 	.word	0xe000e100
 8004d20:	e000ed00 	.word	0xe000ed00

08004d24 <NVIC_EncodePriority>:
{
 8004d24:	b480      	push	{r7}
 8004d26:	b089      	sub	sp, #36	@ 0x24
 8004d28:	af00      	add	r7, sp, #0
 8004d2a:	60f8      	str	r0, [r7, #12]
 8004d2c:	60b9      	str	r1, [r7, #8]
 8004d2e:	607a      	str	r2, [r7, #4]
  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
 8004d30:	68fb      	ldr	r3, [r7, #12]
 8004d32:	f003 0307 	and.w	r3, r3, #7
 8004d36:	61fb      	str	r3, [r7, #28]
  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
 8004d38:	69fb      	ldr	r3, [r7, #28]
 8004d3a:	f1c3 0307 	rsb	r3, r3, #7
 8004d3e:	2b04      	cmp	r3, #4
 8004d40:	bf28      	it	cs
 8004d42:	2304      	movcs	r3, #4
 8004d44:	61bb      	str	r3, [r7, #24]
  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
 8004d46:	69fb      	ldr	r3, [r7, #28]
 8004d48:	3304      	adds	r3, #4
 8004d4a:	2b06      	cmp	r3, #6
 8004d4c:	d902      	bls.n	8004d54 <NVIC_EncodePriority+0x30>
 8004d4e:	69fb      	ldr	r3, [r7, #28]
 8004d50:	3b03      	subs	r3, #3
 8004d52:	e000      	b.n	8004d56 <NVIC_EncodePriority+0x32>
 8004d54:	2300      	movs	r3, #0
 8004d56:	617b      	str	r3, [r7, #20]
           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
 8004d58:	f04f 32ff 	mov.w	r2, #4294967295	@ 0xffffffff
 8004d5c:	69bb      	ldr	r3, [r7, #24]
 8004d5e:	fa02 f303 	lsl.w	r3, r2, r3
 8004d62:	43da      	mvns	r2, r3
 8004d64:	68bb      	ldr	r3, [r7, #8]
 8004d66:	401a      	ands	r2, r3
 8004d68:	697b      	ldr	r3, [r7, #20]
 8004d6a:	409a      	lsls	r2, r3
           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
 8004d6c:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 8004d70:	697b      	ldr	r3, [r7, #20]
 8004d72:	fa01 f303 	lsl.w	r3, r1, r3
 8004d76:	43d9      	mvns	r1, r3
 8004d78:	687b      	ldr	r3, [r7, #4]
 8004d7a:	400b      	ands	r3, r1
           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
 8004d7c:	4313      	orrs	r3, r2
}
 8004d7e:	4618      	mov	r0, r3
 8004d80:	3724      	adds	r7, #36	@ 0x24
 8004d82:	46bd      	mov	sp, r7
 8004d84:	f85d 7b04 	ldr.w	r7, [sp], #4
 8004d88:	4770      	bx	lr

08004d8a <HAL_NVIC_SetPriorityGrouping>:
  * @note   When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible.
  *         The pending IRQ priority will be managed only by the subpriority.
  * @retval None
  */
void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
 8004d8a:	b580      	push	{r7, lr}
 8004d8c:	b082      	sub	sp, #8
 8004d8e:	af00      	add	r7, sp, #0
 8004d90:	6078      	str	r0, [r7, #4]
  /* Check the parameters */
  assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));

  /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */
  NVIC_SetPriorityGrouping(PriorityGroup);
 8004d92:	6878      	ldr	r0, [r7, #4]
 8004d94:	f7ff ff4c 	bl	8004c30 <__NVIC_SetPriorityGrouping>
}
 8004d98:	bf00      	nop
 8004d9a:	3708      	adds	r7, #8
 8004d9c:	46bd      	mov	sp, r7
 8004d9e:	bd80      	pop	{r7, pc}

08004da0 <HAL_NVIC_SetPriority>:
  *         This parameter can be a value between 0 and 15
  *         A lower priority value indicates a higher priority.
  * @retval None
  */
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
{
 8004da0:	b580      	push	{r7, lr}
 8004da2:	b086      	sub	sp, #24
 8004da4:	af00      	add	r7, sp, #0
 8004da6:	4603      	mov	r3, r0
 8004da8:	60b9      	str	r1, [r7, #8]
 8004daa:	607a      	str	r2, [r7, #4]
 8004dac:	81fb      	strh	r3, [r7, #14]

  /* Check the parameters */
  assert_param(IS_NVIC_SUB_PRIORITY(SubPriority));
  assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));

  prioritygroup = NVIC_GetPriorityGrouping();
 8004dae:	f7ff ff63 	bl	8004c78 <__NVIC_GetPriorityGrouping>
 8004db2:	6178      	str	r0, [r7, #20]

  NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority));
 8004db4:	687a      	ldr	r2, [r7, #4]
 8004db6:	68b9      	ldr	r1, [r7, #8]
 8004db8:	6978      	ldr	r0, [r7, #20]
 8004dba:	f7ff ffb3 	bl	8004d24 <NVIC_EncodePriority>
 8004dbe:	4602      	mov	r2, r0
 8004dc0:	f9b7 300e 	ldrsh.w	r3, [r7, #14]
 8004dc4:	4611      	mov	r1, r2
 8004dc6:	4618      	mov	r0, r3
 8004dc8:	f7ff ff82 	bl	8004cd0 <__NVIC_SetPriority>
}
 8004dcc:	bf00      	nop
 8004dce:	3718      	adds	r7, #24
 8004dd0:	46bd      	mov	sp, r7
 8004dd2:	bd80      	pop	{r7, pc}

08004dd4 <HAL_NVIC_EnableIRQ>:
  *         This parameter can be an enumerator of IRQn_Type enumeration
  *         (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32h7xxxx.h))
  * @retval None
  */
void HAL_NVIC_EnableIRQ(IRQn_Type IRQn)
{
 8004dd4:	b580      	push	{r7, lr}
 8004dd6:	b082      	sub	sp, #8
 8004dd8:	af00      	add	r7, sp, #0
 8004dda:	4603      	mov	r3, r0
 8004ddc:	80fb      	strh	r3, [r7, #6]
  /* Check the parameters */
  assert_param(IS_NVIC_DEVICE_IRQ(IRQn));

  /* Enable interrupt */
  NVIC_EnableIRQ(IRQn);
 8004dde:	f9b7 3006 	ldrsh.w	r3, [r7, #6]
 8004de2:	4618      	mov	r0, r3
 8004de4:	f7ff ff56 	bl	8004c94 <__NVIC_EnableIRQ>
}
 8004de8:	bf00      	nop
 8004dea:	3708      	adds	r7, #8
 8004dec:	46bd      	mov	sp, r7
 8004dee:	bd80      	pop	{r7, pc}

08004df0 <HAL_MPU_Disable>:
/**
  * @brief  Disables the MPU
  * @retval None
  */
void HAL_MPU_Disable(void)
{
 8004df0:	b480      	push	{r7}
 8004df2:	af00      	add	r7, sp, #0
  \details Ensures the apparent order of the explicit memory operations before
           and after the instruction, without ensuring their completion.
 */
__STATIC_FORCEINLINE void __DMB(void)
{
  __ASM volatile ("dmb 0xF":::"memory");
 8004df4:	f3bf 8f5f 	dmb	sy
}
 8004df8:	bf00      	nop
  /* Make sure outstanding transfers are done */
  __DMB();

  /* Disable fault exceptions */
  SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
 8004dfa:	4b07      	ldr	r3, [pc, #28]	@ (8004e18 <HAL_MPU_Disable+0x28>)
 8004dfc:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8004dfe:	4a06      	ldr	r2, [pc, #24]	@ (8004e18 <HAL_MPU_Disable+0x28>)
 8004e00:	f423 3380 	bic.w	r3, r3, #65536	@ 0x10000
 8004e04:	6253      	str	r3, [r2, #36]	@ 0x24

  /* Disable the MPU and clear the control register*/
  MPU->CTRL = 0;
 8004e06:	4b05      	ldr	r3, [pc, #20]	@ (8004e1c <HAL_MPU_Disable+0x2c>)
 8004e08:	2200      	movs	r2, #0
 8004e0a:	605a      	str	r2, [r3, #4]
}
 8004e0c:	bf00      	nop
 8004e0e:	46bd      	mov	sp, r7
 8004e10:	f85d 7b04 	ldr.w	r7, [sp], #4
 8004e14:	4770      	bx	lr
 8004e16:	bf00      	nop
 8004e18:	e000ed00 	.word	0xe000ed00
 8004e1c:	e000ed90 	.word	0xe000ed90

08004e20 <HAL_MPU_Enable>:
  *            @arg MPU_PRIVILEGED_DEFAULT
  *            @arg MPU_HFNMI_PRIVDEF
  * @retval None
  */
void HAL_MPU_Enable(uint32_t MPU_Control)
{
 8004e20:	b480      	push	{r7}
 8004e22:	b083      	sub	sp, #12
 8004e24:	af00      	add	r7, sp, #0
 8004e26:	6078      	str	r0, [r7, #4]
  /* Enable the MPU */
  MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
 8004e28:	4a0b      	ldr	r2, [pc, #44]	@ (8004e58 <HAL_MPU_Enable+0x38>)
 8004e2a:	687b      	ldr	r3, [r7, #4]
 8004e2c:	f043 0301 	orr.w	r3, r3, #1
 8004e30:	6053      	str	r3, [r2, #4]

  /* Enable fault exceptions */
  SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
 8004e32:	4b0a      	ldr	r3, [pc, #40]	@ (8004e5c <HAL_MPU_Enable+0x3c>)
 8004e34:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8004e36:	4a09      	ldr	r2, [pc, #36]	@ (8004e5c <HAL_MPU_Enable+0x3c>)
 8004e38:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
 8004e3c:	6253      	str	r3, [r2, #36]	@ 0x24
  __ASM volatile ("dsb 0xF":::"memory");
 8004e3e:	f3bf 8f4f 	dsb	sy
}
 8004e42:	bf00      	nop
  __ASM volatile ("isb 0xF":::"memory");
 8004e44:	f3bf 8f6f 	isb	sy
}
 8004e48:	bf00      	nop

  /* Ensure MPU setting take effects */
  __DSB();
  __ISB();
}
 8004e4a:	bf00      	nop
 8004e4c:	370c      	adds	r7, #12
 8004e4e:	46bd      	mov	sp, r7
 8004e50:	f85d 7b04 	ldr.w	r7, [sp], #4
 8004e54:	4770      	bx	lr
 8004e56:	bf00      	nop
 8004e58:	e000ed90 	.word	0xe000ed90
 8004e5c:	e000ed00 	.word	0xe000ed00

08004e60 <HAL_MPU_ConfigRegion>:
  * @param MPU_Init Pointer to a MPU_Region_InitTypeDef structure that contains
  *                the initialization and configuration information.
  * @retval None
  */
void HAL_MPU_ConfigRegion(MPU_Region_InitTypeDef *MPU_Init)
{
 8004e60:	b480      	push	{r7}
 8004e62:	b083      	sub	sp, #12
 8004e64:	af00      	add	r7, sp, #0
 8004e66:	6078      	str	r0, [r7, #4]
  assert_param(IS_MPU_ACCESS_BUFFERABLE(MPU_Init->IsBufferable));
  assert_param(IS_MPU_SUB_REGION_DISABLE(MPU_Init->SubRegionDisable));
  assert_param(IS_MPU_REGION_SIZE(MPU_Init->Size));

  /* Set the Region number */
  MPU->RNR = MPU_Init->Number;
 8004e68:	687b      	ldr	r3, [r7, #4]
 8004e6a:	785a      	ldrb	r2, [r3, #1]
 8004e6c:	4b1b      	ldr	r3, [pc, #108]	@ (8004edc <HAL_MPU_ConfigRegion+0x7c>)
 8004e6e:	609a      	str	r2, [r3, #8]

  /* Disable the Region */
  CLEAR_BIT(MPU->RASR, MPU_RASR_ENABLE_Msk);
 8004e70:	4b1a      	ldr	r3, [pc, #104]	@ (8004edc <HAL_MPU_ConfigRegion+0x7c>)
 8004e72:	691b      	ldr	r3, [r3, #16]
 8004e74:	4a19      	ldr	r2, [pc, #100]	@ (8004edc <HAL_MPU_ConfigRegion+0x7c>)
 8004e76:	f023 0301 	bic.w	r3, r3, #1
 8004e7a:	6113      	str	r3, [r2, #16]

  /* Apply configuration */
  MPU->RBAR = MPU_Init->BaseAddress;
 8004e7c:	4a17      	ldr	r2, [pc, #92]	@ (8004edc <HAL_MPU_ConfigRegion+0x7c>)
 8004e7e:	687b      	ldr	r3, [r7, #4]
 8004e80:	685b      	ldr	r3, [r3, #4]
 8004e82:	60d3      	str	r3, [r2, #12]
  MPU->RASR = ((uint32_t)MPU_Init->DisableExec             << MPU_RASR_XN_Pos)   |
 8004e84:	687b      	ldr	r3, [r7, #4]
 8004e86:	7b1b      	ldrb	r3, [r3, #12]
 8004e88:	071a      	lsls	r2, r3, #28
              ((uint32_t)MPU_Init->AccessPermission        << MPU_RASR_AP_Pos)   |
 8004e8a:	687b      	ldr	r3, [r7, #4]
 8004e8c:	7adb      	ldrb	r3, [r3, #11]
 8004e8e:	061b      	lsls	r3, r3, #24
  MPU->RASR = ((uint32_t)MPU_Init->DisableExec             << MPU_RASR_XN_Pos)   |
 8004e90:	431a      	orrs	r2, r3
              ((uint32_t)MPU_Init->TypeExtField            << MPU_RASR_TEX_Pos)  |
 8004e92:	687b      	ldr	r3, [r7, #4]
 8004e94:	7a9b      	ldrb	r3, [r3, #10]
 8004e96:	04db      	lsls	r3, r3, #19
              ((uint32_t)MPU_Init->AccessPermission        << MPU_RASR_AP_Pos)   |
 8004e98:	431a      	orrs	r2, r3
              ((uint32_t)MPU_Init->IsShareable             << MPU_RASR_S_Pos)    |
 8004e9a:	687b      	ldr	r3, [r7, #4]
 8004e9c:	7b5b      	ldrb	r3, [r3, #13]
 8004e9e:	049b      	lsls	r3, r3, #18
              ((uint32_t)MPU_Init->TypeExtField            << MPU_RASR_TEX_Pos)  |
 8004ea0:	431a      	orrs	r2, r3
              ((uint32_t)MPU_Init->IsCacheable             << MPU_RASR_C_Pos)    |
 8004ea2:	687b      	ldr	r3, [r7, #4]
 8004ea4:	7b9b      	ldrb	r3, [r3, #14]
 8004ea6:	045b      	lsls	r3, r3, #17
              ((uint32_t)MPU_Init->IsShareable             << MPU_RASR_S_Pos)    |
 8004ea8:	431a      	orrs	r2, r3
              ((uint32_t)MPU_Init->IsBufferable            << MPU_RASR_B_Pos)    |
 8004eaa:	687b      	ldr	r3, [r7, #4]
 8004eac:	7bdb      	ldrb	r3, [r3, #15]
 8004eae:	041b      	lsls	r3, r3, #16
              ((uint32_t)MPU_Init->IsCacheable             << MPU_RASR_C_Pos)    |
 8004eb0:	431a      	orrs	r2, r3
              ((uint32_t)MPU_Init->SubRegionDisable        << MPU_RASR_SRD_Pos)  |
 8004eb2:	687b      	ldr	r3, [r7, #4]
 8004eb4:	7a5b      	ldrb	r3, [r3, #9]
 8004eb6:	021b      	lsls	r3, r3, #8
              ((uint32_t)MPU_Init->IsBufferable            << MPU_RASR_B_Pos)    |
 8004eb8:	431a      	orrs	r2, r3
              ((uint32_t)MPU_Init->Size                    << MPU_RASR_SIZE_Pos) |
 8004eba:	687b      	ldr	r3, [r7, #4]
 8004ebc:	7a1b      	ldrb	r3, [r3, #8]
 8004ebe:	005b      	lsls	r3, r3, #1
              ((uint32_t)MPU_Init->SubRegionDisable        << MPU_RASR_SRD_Pos)  |
 8004ec0:	4313      	orrs	r3, r2
              ((uint32_t)MPU_Init->Enable                  << MPU_RASR_ENABLE_Pos);
 8004ec2:	687a      	ldr	r2, [r7, #4]
 8004ec4:	7812      	ldrb	r2, [r2, #0]
 8004ec6:	4611      	mov	r1, r2
  MPU->RASR = ((uint32_t)MPU_Init->DisableExec             << MPU_RASR_XN_Pos)   |
 8004ec8:	4a04      	ldr	r2, [pc, #16]	@ (8004edc <HAL_MPU_ConfigRegion+0x7c>)
              ((uint32_t)MPU_Init->Size                    << MPU_RASR_SIZE_Pos) |
 8004eca:	430b      	orrs	r3, r1
  MPU->RASR = ((uint32_t)MPU_Init->DisableExec             << MPU_RASR_XN_Pos)   |
 8004ecc:	6113      	str	r3, [r2, #16]
}
 8004ece:	bf00      	nop
 8004ed0:	370c      	adds	r7, #12
 8004ed2:	46bd      	mov	sp, r7
 8004ed4:	f85d 7b04 	ldr.w	r7, [sp], #4
 8004ed8:	4770      	bx	lr
 8004eda:	bf00      	nop
 8004edc:	e000ed90 	.word	0xe000ed90

08004ee0 <HAL_CRC_Init>:
  *         parameters in the CRC_InitTypeDef and create the associated handle.
  * @param  hcrc CRC handle
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_CRC_Init(CRC_HandleTypeDef *hcrc)
{
 8004ee0:	b580      	push	{r7, lr}
 8004ee2:	b082      	sub	sp, #8
 8004ee4:	af00      	add	r7, sp, #0
 8004ee6:	6078      	str	r0, [r7, #4]
  /* Check the CRC handle allocation */
  if (hcrc == NULL)
 8004ee8:	687b      	ldr	r3, [r7, #4]
 8004eea:	2b00      	cmp	r3, #0
 8004eec:	d101      	bne.n	8004ef2 <HAL_CRC_Init+0x12>
  {
    return HAL_ERROR;
 8004eee:	2301      	movs	r3, #1
 8004ef0:	e054      	b.n	8004f9c <HAL_CRC_Init+0xbc>
  }

  /* Check the parameters */
  assert_param(IS_CRC_ALL_INSTANCE(hcrc->Instance));

  if (hcrc->State == HAL_CRC_STATE_RESET)
 8004ef2:	687b      	ldr	r3, [r7, #4]
 8004ef4:	7f5b      	ldrb	r3, [r3, #29]
 8004ef6:	b2db      	uxtb	r3, r3
 8004ef8:	2b00      	cmp	r3, #0
 8004efa:	d105      	bne.n	8004f08 <HAL_CRC_Init+0x28>
  {
    /* Allocate lock resource and initialize it */
    hcrc->Lock = HAL_UNLOCKED;
 8004efc:	687b      	ldr	r3, [r7, #4]
 8004efe:	2200      	movs	r2, #0
 8004f00:	771a      	strb	r2, [r3, #28]
    /* Init the low level hardware */
    HAL_CRC_MspInit(hcrc);
 8004f02:	6878      	ldr	r0, [r7, #4]
 8004f04:	f7fe fbe8 	bl	80036d8 <HAL_CRC_MspInit>
  }

  hcrc->State = HAL_CRC_STATE_BUSY;
 8004f08:	687b      	ldr	r3, [r7, #4]
 8004f0a:	2202      	movs	r2, #2
 8004f0c:	775a      	strb	r2, [r3, #29]

  /* check whether or not non-default generating polynomial has been
   * picked up by user */
  assert_param(IS_DEFAULT_POLYNOMIAL(hcrc->Init.DefaultPolynomialUse));
  if (hcrc->Init.DefaultPolynomialUse == DEFAULT_POLYNOMIAL_ENABLE)
 8004f0e:	687b      	ldr	r3, [r7, #4]
 8004f10:	791b      	ldrb	r3, [r3, #4]
 8004f12:	2b00      	cmp	r3, #0
 8004f14:	d10c      	bne.n	8004f30 <HAL_CRC_Init+0x50>
  {
    /* initialize peripheral with default generating polynomial */
    WRITE_REG(hcrc->Instance->POL, DEFAULT_CRC32_POLY);
 8004f16:	687b      	ldr	r3, [r7, #4]
 8004f18:	681b      	ldr	r3, [r3, #0]
 8004f1a:	4a22      	ldr	r2, [pc, #136]	@ (8004fa4 <HAL_CRC_Init+0xc4>)
 8004f1c:	615a      	str	r2, [r3, #20]
    MODIFY_REG(hcrc->Instance->CR, CRC_CR_POLYSIZE, CRC_POLYLENGTH_32B);
 8004f1e:	687b      	ldr	r3, [r7, #4]
 8004f20:	681b      	ldr	r3, [r3, #0]
 8004f22:	689a      	ldr	r2, [r3, #8]
 8004f24:	687b      	ldr	r3, [r7, #4]
 8004f26:	681b      	ldr	r3, [r3, #0]
 8004f28:	f022 0218 	bic.w	r2, r2, #24
 8004f2c:	609a      	str	r2, [r3, #8]
 8004f2e:	e00c      	b.n	8004f4a <HAL_CRC_Init+0x6a>
  }
  else
  {
    /* initialize CRC peripheral with generating polynomial defined by user */
    if (HAL_CRCEx_Polynomial_Set(hcrc, hcrc->Init.GeneratingPolynomial, hcrc->Init.CRCLength) != HAL_OK)
 8004f30:	687b      	ldr	r3, [r7, #4]
 8004f32:	6899      	ldr	r1, [r3, #8]
 8004f34:	687b      	ldr	r3, [r7, #4]
 8004f36:	68db      	ldr	r3, [r3, #12]
 8004f38:	461a      	mov	r2, r3
 8004f3a:	6878      	ldr	r0, [r7, #4]
 8004f3c:	f000 f948 	bl	80051d0 <HAL_CRCEx_Polynomial_Set>
 8004f40:	4603      	mov	r3, r0
 8004f42:	2b00      	cmp	r3, #0
 8004f44:	d001      	beq.n	8004f4a <HAL_CRC_Init+0x6a>
    {
      return HAL_ERROR;
 8004f46:	2301      	movs	r3, #1
 8004f48:	e028      	b.n	8004f9c <HAL_CRC_Init+0xbc>
  }

  /* check whether or not non-default CRC initial value has been
   * picked up by user */
  assert_param(IS_DEFAULT_INIT_VALUE(hcrc->Init.DefaultInitValueUse));
  if (hcrc->Init.DefaultInitValueUse == DEFAULT_INIT_VALUE_ENABLE)
 8004f4a:	687b      	ldr	r3, [r7, #4]
 8004f4c:	795b      	ldrb	r3, [r3, #5]
 8004f4e:	2b00      	cmp	r3, #0
 8004f50:	d105      	bne.n	8004f5e <HAL_CRC_Init+0x7e>
  {
    WRITE_REG(hcrc->Instance->INIT, DEFAULT_CRC_INITVALUE);
 8004f52:	687b      	ldr	r3, [r7, #4]
 8004f54:	681b      	ldr	r3, [r3, #0]
 8004f56:	f04f 32ff 	mov.w	r2, #4294967295	@ 0xffffffff
 8004f5a:	611a      	str	r2, [r3, #16]
 8004f5c:	e004      	b.n	8004f68 <HAL_CRC_Init+0x88>
  }
  else
  {
    WRITE_REG(hcrc->Instance->INIT, hcrc->Init.InitValue);
 8004f5e:	687b      	ldr	r3, [r7, #4]
 8004f60:	681b      	ldr	r3, [r3, #0]
 8004f62:	687a      	ldr	r2, [r7, #4]
 8004f64:	6912      	ldr	r2, [r2, #16]
 8004f66:	611a      	str	r2, [r3, #16]
  }


  /* set input data inversion mode */
  assert_param(IS_CRC_INPUTDATA_INVERSION_MODE(hcrc->Init.InputDataInversionMode));
  MODIFY_REG(hcrc->Instance->CR, CRC_CR_REV_IN, hcrc->Init.InputDataInversionMode);
 8004f68:	687b      	ldr	r3, [r7, #4]
 8004f6a:	681b      	ldr	r3, [r3, #0]
 8004f6c:	689b      	ldr	r3, [r3, #8]
 8004f6e:	f023 0160 	bic.w	r1, r3, #96	@ 0x60
 8004f72:	687b      	ldr	r3, [r7, #4]
 8004f74:	695a      	ldr	r2, [r3, #20]
 8004f76:	687b      	ldr	r3, [r7, #4]
 8004f78:	681b      	ldr	r3, [r3, #0]
 8004f7a:	430a      	orrs	r2, r1
 8004f7c:	609a      	str	r2, [r3, #8]

  /* set output data inversion mode */
  assert_param(IS_CRC_OUTPUTDATA_INVERSION_MODE(hcrc->Init.OutputDataInversionMode));
  MODIFY_REG(hcrc->Instance->CR, CRC_CR_REV_OUT, hcrc->Init.OutputDataInversionMode);
 8004f7e:	687b      	ldr	r3, [r7, #4]
 8004f80:	681b      	ldr	r3, [r3, #0]
 8004f82:	689b      	ldr	r3, [r3, #8]
 8004f84:	f023 0180 	bic.w	r1, r3, #128	@ 0x80
 8004f88:	687b      	ldr	r3, [r7, #4]
 8004f8a:	699a      	ldr	r2, [r3, #24]
 8004f8c:	687b      	ldr	r3, [r7, #4]
 8004f8e:	681b      	ldr	r3, [r3, #0]
 8004f90:	430a      	orrs	r2, r1
 8004f92:	609a      	str	r2, [r3, #8]
  /* makes sure the input data format (bytes, halfwords or words stream)
   * is properly specified by user */
  assert_param(IS_CRC_INPUTDATA_FORMAT(hcrc->InputDataFormat));

  /* Change CRC peripheral state */
  hcrc->State = HAL_CRC_STATE_READY;
 8004f94:	687b      	ldr	r3, [r7, #4]
 8004f96:	2201      	movs	r2, #1
 8004f98:	775a      	strb	r2, [r3, #29]

  /* Return function status */
  return HAL_OK;
 8004f9a:	2300      	movs	r3, #0
}
 8004f9c:	4618      	mov	r0, r3
 8004f9e:	3708      	adds	r7, #8
 8004fa0:	46bd      	mov	sp, r7
 8004fa2:	bd80      	pop	{r7, pc}
 8004fa4:	04c11db7 	.word	0x04c11db7

08004fa8 <HAL_CRC_Calculate>:
  *        and the API will internally adjust its input data processing based on the
  *        handle field hcrc->InputDataFormat.
  * @retval uint32_t CRC (returned value LSBs for CRC shorter than 32 bits)
  */
uint32_t HAL_CRC_Calculate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength)
{
 8004fa8:	b580      	push	{r7, lr}
 8004faa:	b086      	sub	sp, #24
 8004fac:	af00      	add	r7, sp, #0
 8004fae:	60f8      	str	r0, [r7, #12]
 8004fb0:	60b9      	str	r1, [r7, #8]
 8004fb2:	607a      	str	r2, [r7, #4]
  uint32_t index;      /* CRC input data buffer index */
  uint32_t temp = 0U;  /* CRC output (read from hcrc->Instance->DR register) */
 8004fb4:	2300      	movs	r3, #0
 8004fb6:	613b      	str	r3, [r7, #16]

  /* Change CRC peripheral state */
  hcrc->State = HAL_CRC_STATE_BUSY;
 8004fb8:	68fb      	ldr	r3, [r7, #12]
 8004fba:	2202      	movs	r2, #2
 8004fbc:	775a      	strb	r2, [r3, #29]

  /* Reset CRC Calculation Unit (hcrc->Instance->INIT is
  *  written in hcrc->Instance->DR) */
  __HAL_CRC_DR_RESET(hcrc);
 8004fbe:	68fb      	ldr	r3, [r7, #12]
 8004fc0:	681b      	ldr	r3, [r3, #0]
 8004fc2:	689a      	ldr	r2, [r3, #8]
 8004fc4:	68fb      	ldr	r3, [r7, #12]
 8004fc6:	681b      	ldr	r3, [r3, #0]
 8004fc8:	f042 0201 	orr.w	r2, r2, #1
 8004fcc:	609a      	str	r2, [r3, #8]

  switch (hcrc->InputDataFormat)
 8004fce:	68fb      	ldr	r3, [r7, #12]
 8004fd0:	6a1b      	ldr	r3, [r3, #32]
 8004fd2:	2b03      	cmp	r3, #3
 8004fd4:	d006      	beq.n	8004fe4 <HAL_CRC_Calculate+0x3c>
 8004fd6:	2b03      	cmp	r3, #3
 8004fd8:	d829      	bhi.n	800502e <HAL_CRC_Calculate+0x86>
 8004fda:	2b01      	cmp	r3, #1
 8004fdc:	d019      	beq.n	8005012 <HAL_CRC_Calculate+0x6a>
 8004fde:	2b02      	cmp	r3, #2
 8004fe0:	d01e      	beq.n	8005020 <HAL_CRC_Calculate+0x78>
      /* Specific 16-bit input data handling  */
      temp = CRC_Handle_16(hcrc, (uint16_t *)(void *)pBuffer, BufferLength);    /* Derogation MisraC2012 R.11.5 */
      break;

    default:
      break;
 8004fe2:	e024      	b.n	800502e <HAL_CRC_Calculate+0x86>
      for (index = 0U; index < BufferLength; index++)
 8004fe4:	2300      	movs	r3, #0
 8004fe6:	617b      	str	r3, [r7, #20]
 8004fe8:	e00a      	b.n	8005000 <HAL_CRC_Calculate+0x58>
        hcrc->Instance->DR = pBuffer[index];
 8004fea:	697b      	ldr	r3, [r7, #20]
 8004fec:	009b      	lsls	r3, r3, #2
 8004fee:	68ba      	ldr	r2, [r7, #8]
 8004ff0:	441a      	add	r2, r3
 8004ff2:	68fb      	ldr	r3, [r7, #12]
 8004ff4:	681b      	ldr	r3, [r3, #0]
 8004ff6:	6812      	ldr	r2, [r2, #0]
 8004ff8:	601a      	str	r2, [r3, #0]
      for (index = 0U; index < BufferLength; index++)
 8004ffa:	697b      	ldr	r3, [r7, #20]
 8004ffc:	3301      	adds	r3, #1
 8004ffe:	617b      	str	r3, [r7, #20]
 8005000:	697a      	ldr	r2, [r7, #20]
 8005002:	687b      	ldr	r3, [r7, #4]
 8005004:	429a      	cmp	r2, r3
 8005006:	d3f0      	bcc.n	8004fea <HAL_CRC_Calculate+0x42>
      temp = hcrc->Instance->DR;
 8005008:	68fb      	ldr	r3, [r7, #12]
 800500a:	681b      	ldr	r3, [r3, #0]
 800500c:	681b      	ldr	r3, [r3, #0]
 800500e:	613b      	str	r3, [r7, #16]
      break;
 8005010:	e00e      	b.n	8005030 <HAL_CRC_Calculate+0x88>
      temp = CRC_Handle_8(hcrc, (uint8_t *)pBuffer, BufferLength);
 8005012:	687a      	ldr	r2, [r7, #4]
 8005014:	68b9      	ldr	r1, [r7, #8]
 8005016:	68f8      	ldr	r0, [r7, #12]
 8005018:	f000 f812 	bl	8005040 <CRC_Handle_8>
 800501c:	6138      	str	r0, [r7, #16]
      break;
 800501e:	e007      	b.n	8005030 <HAL_CRC_Calculate+0x88>
      temp = CRC_Handle_16(hcrc, (uint16_t *)(void *)pBuffer, BufferLength);    /* Derogation MisraC2012 R.11.5 */
 8005020:	687a      	ldr	r2, [r7, #4]
 8005022:	68b9      	ldr	r1, [r7, #8]
 8005024:	68f8      	ldr	r0, [r7, #12]
 8005026:	f000 f899 	bl	800515c <CRC_Handle_16>
 800502a:	6138      	str	r0, [r7, #16]
      break;
 800502c:	e000      	b.n	8005030 <HAL_CRC_Calculate+0x88>
      break;
 800502e:	bf00      	nop
  }

  /* Change CRC peripheral state */
  hcrc->State = HAL_CRC_STATE_READY;
 8005030:	68fb      	ldr	r3, [r7, #12]
 8005032:	2201      	movs	r2, #1
 8005034:	775a      	strb	r2, [r3, #29]

  /* Return the CRC computed value */
  return temp;
 8005036:	693b      	ldr	r3, [r7, #16]
}
 8005038:	4618      	mov	r0, r3
 800503a:	3718      	adds	r7, #24
 800503c:	46bd      	mov	sp, r7
 800503e:	bd80      	pop	{r7, pc}

08005040 <CRC_Handle_8>:
  * @param  pBuffer pointer to the input data buffer
  * @param  BufferLength input data buffer length
  * @retval uint32_t CRC (returned value LSBs for CRC shorter than 32 bits)
  */
static uint32_t CRC_Handle_8(CRC_HandleTypeDef *hcrc, uint8_t pBuffer[], uint32_t BufferLength)
{
 8005040:	b480      	push	{r7}
 8005042:	b089      	sub	sp, #36	@ 0x24
 8005044:	af00      	add	r7, sp, #0
 8005046:	60f8      	str	r0, [r7, #12]
 8005048:	60b9      	str	r1, [r7, #8]
 800504a:	607a      	str	r2, [r7, #4]
  __IO uint16_t *pReg;

  /* Processing time optimization: 4 bytes are entered in a row with a single word write,
   * last bytes must be carefully fed to the CRC calculator to ensure a correct type
   * handling by the peripheral */
  for (i = 0U; i < (BufferLength / 4U); i++)
 800504c:	2300      	movs	r3, #0
 800504e:	61fb      	str	r3, [r7, #28]
 8005050:	e023      	b.n	800509a <CRC_Handle_8+0x5a>
  {
    hcrc->Instance->DR = ((uint32_t)pBuffer[4U * i] << 24U) | \
 8005052:	69fb      	ldr	r3, [r7, #28]
 8005054:	009b      	lsls	r3, r3, #2
 8005056:	68ba      	ldr	r2, [r7, #8]
 8005058:	4413      	add	r3, r2
 800505a:	781b      	ldrb	r3, [r3, #0]
 800505c:	061a      	lsls	r2, r3, #24
                         ((uint32_t)pBuffer[(4U * i) + 1U] << 16U) | \
 800505e:	69fb      	ldr	r3, [r7, #28]
 8005060:	009b      	lsls	r3, r3, #2
 8005062:	3301      	adds	r3, #1
 8005064:	68b9      	ldr	r1, [r7, #8]
 8005066:	440b      	add	r3, r1
 8005068:	781b      	ldrb	r3, [r3, #0]
 800506a:	041b      	lsls	r3, r3, #16
    hcrc->Instance->DR = ((uint32_t)pBuffer[4U * i] << 24U) | \
 800506c:	431a      	orrs	r2, r3
                         ((uint32_t)pBuffer[(4U * i) + 2U] << 8U)  | \
 800506e:	69fb      	ldr	r3, [r7, #28]
 8005070:	009b      	lsls	r3, r3, #2
 8005072:	3302      	adds	r3, #2
 8005074:	68b9      	ldr	r1, [r7, #8]
 8005076:	440b      	add	r3, r1
 8005078:	781b      	ldrb	r3, [r3, #0]
 800507a:	021b      	lsls	r3, r3, #8
                         ((uint32_t)pBuffer[(4U * i) + 1U] << 16U) | \
 800507c:	431a      	orrs	r2, r3
                         (uint32_t)pBuffer[(4U * i) + 3U];
 800507e:	69fb      	ldr	r3, [r7, #28]
 8005080:	009b      	lsls	r3, r3, #2
 8005082:	3303      	adds	r3, #3
 8005084:	68b9      	ldr	r1, [r7, #8]
 8005086:	440b      	add	r3, r1
 8005088:	781b      	ldrb	r3, [r3, #0]
 800508a:	4619      	mov	r1, r3
    hcrc->Instance->DR = ((uint32_t)pBuffer[4U * i] << 24U) | \
 800508c:	68fb      	ldr	r3, [r7, #12]
 800508e:	681b      	ldr	r3, [r3, #0]
                         ((uint32_t)pBuffer[(4U * i) + 2U] << 8U)  | \
 8005090:	430a      	orrs	r2, r1
    hcrc->Instance->DR = ((uint32_t)pBuffer[4U * i] << 24U) | \
 8005092:	601a      	str	r2, [r3, #0]
  for (i = 0U; i < (BufferLength / 4U); i++)
 8005094:	69fb      	ldr	r3, [r7, #28]
 8005096:	3301      	adds	r3, #1
 8005098:	61fb      	str	r3, [r7, #28]
 800509a:	687b      	ldr	r3, [r7, #4]
 800509c:	089b      	lsrs	r3, r3, #2
 800509e:	69fa      	ldr	r2, [r7, #28]
 80050a0:	429a      	cmp	r2, r3
 80050a2:	d3d6      	bcc.n	8005052 <CRC_Handle_8+0x12>
  }
  /* last bytes specific handling */
  if ((BufferLength % 4U) != 0U)
 80050a4:	687b      	ldr	r3, [r7, #4]
 80050a6:	f003 0303 	and.w	r3, r3, #3
 80050aa:	2b00      	cmp	r3, #0
 80050ac:	d04d      	beq.n	800514a <CRC_Handle_8+0x10a>
  {
    if ((BufferLength % 4U) == 1U)
 80050ae:	687b      	ldr	r3, [r7, #4]
 80050b0:	f003 0303 	and.w	r3, r3, #3
 80050b4:	2b01      	cmp	r3, #1
 80050b6:	d107      	bne.n	80050c8 <CRC_Handle_8+0x88>
    {
      *(__IO uint8_t *)(__IO void *)(&hcrc->Instance->DR) = pBuffer[4U * i];         /* Derogation MisraC2012 R.11.5 */
 80050b8:	69fb      	ldr	r3, [r7, #28]
 80050ba:	009b      	lsls	r3, r3, #2
 80050bc:	68ba      	ldr	r2, [r7, #8]
 80050be:	4413      	add	r3, r2
 80050c0:	68fa      	ldr	r2, [r7, #12]
 80050c2:	6812      	ldr	r2, [r2, #0]
 80050c4:	781b      	ldrb	r3, [r3, #0]
 80050c6:	7013      	strb	r3, [r2, #0]
    }
    if ((BufferLength % 4U) == 2U)
 80050c8:	687b      	ldr	r3, [r7, #4]
 80050ca:	f003 0303 	and.w	r3, r3, #3
 80050ce:	2b02      	cmp	r3, #2
 80050d0:	d116      	bne.n	8005100 <CRC_Handle_8+0xc0>
    {
      data = ((uint16_t)(pBuffer[4U * i]) << 8U) | (uint16_t)pBuffer[(4U * i) + 1U];
 80050d2:	69fb      	ldr	r3, [r7, #28]
 80050d4:	009b      	lsls	r3, r3, #2
 80050d6:	68ba      	ldr	r2, [r7, #8]
 80050d8:	4413      	add	r3, r2
 80050da:	781b      	ldrb	r3, [r3, #0]
 80050dc:	021b      	lsls	r3, r3, #8
 80050de:	b21a      	sxth	r2, r3
 80050e0:	69fb      	ldr	r3, [r7, #28]
 80050e2:	009b      	lsls	r3, r3, #2
 80050e4:	3301      	adds	r3, #1
 80050e6:	68b9      	ldr	r1, [r7, #8]
 80050e8:	440b      	add	r3, r1
 80050ea:	781b      	ldrb	r3, [r3, #0]
 80050ec:	b21b      	sxth	r3, r3
 80050ee:	4313      	orrs	r3, r2
 80050f0:	b21b      	sxth	r3, r3
 80050f2:	837b      	strh	r3, [r7, #26]
      pReg = (__IO uint16_t *)(__IO void *)(&hcrc->Instance->DR);                    /* Derogation MisraC2012 R.11.5 */
 80050f4:	68fb      	ldr	r3, [r7, #12]
 80050f6:	681b      	ldr	r3, [r3, #0]
 80050f8:	617b      	str	r3, [r7, #20]
      *pReg = data;
 80050fa:	697b      	ldr	r3, [r7, #20]
 80050fc:	8b7a      	ldrh	r2, [r7, #26]
 80050fe:	801a      	strh	r2, [r3, #0]
    }
    if ((BufferLength % 4U) == 3U)
 8005100:	687b      	ldr	r3, [r7, #4]
 8005102:	f003 0303 	and.w	r3, r3, #3
 8005106:	2b03      	cmp	r3, #3
 8005108:	d11f      	bne.n	800514a <CRC_Handle_8+0x10a>
    {
      data = ((uint16_t)(pBuffer[4U * i]) << 8U) | (uint16_t)pBuffer[(4U * i) + 1U];
 800510a:	69fb      	ldr	r3, [r7, #28]
 800510c:	009b      	lsls	r3, r3, #2
 800510e:	68ba      	ldr	r2, [r7, #8]
 8005110:	4413      	add	r3, r2
 8005112:	781b      	ldrb	r3, [r3, #0]
 8005114:	021b      	lsls	r3, r3, #8
 8005116:	b21a      	sxth	r2, r3
 8005118:	69fb      	ldr	r3, [r7, #28]
 800511a:	009b      	lsls	r3, r3, #2
 800511c:	3301      	adds	r3, #1
 800511e:	68b9      	ldr	r1, [r7, #8]
 8005120:	440b      	add	r3, r1
 8005122:	781b      	ldrb	r3, [r3, #0]
 8005124:	b21b      	sxth	r3, r3
 8005126:	4313      	orrs	r3, r2
 8005128:	b21b      	sxth	r3, r3
 800512a:	837b      	strh	r3, [r7, #26]
      pReg = (__IO uint16_t *)(__IO void *)(&hcrc->Instance->DR);                    /* Derogation MisraC2012 R.11.5 */
 800512c:	68fb      	ldr	r3, [r7, #12]
 800512e:	681b      	ldr	r3, [r3, #0]
 8005130:	617b      	str	r3, [r7, #20]
      *pReg = data;
 8005132:	697b      	ldr	r3, [r7, #20]
 8005134:	8b7a      	ldrh	r2, [r7, #26]
 8005136:	801a      	strh	r2, [r3, #0]

      *(__IO uint8_t *)(__IO void *)(&hcrc->Instance->DR) = pBuffer[(4U * i) + 2U];  /* Derogation MisraC2012 R.11.5 */
 8005138:	69fb      	ldr	r3, [r7, #28]
 800513a:	009b      	lsls	r3, r3, #2
 800513c:	3302      	adds	r3, #2
 800513e:	68ba      	ldr	r2, [r7, #8]
 8005140:	4413      	add	r3, r2
 8005142:	68fa      	ldr	r2, [r7, #12]
 8005144:	6812      	ldr	r2, [r2, #0]
 8005146:	781b      	ldrb	r3, [r3, #0]
 8005148:	7013      	strb	r3, [r2, #0]
    }
  }

  /* Return the CRC computed value */
  return hcrc->Instance->DR;
 800514a:	68fb      	ldr	r3, [r7, #12]
 800514c:	681b      	ldr	r3, [r3, #0]
 800514e:	681b      	ldr	r3, [r3, #0]
}
 8005150:	4618      	mov	r0, r3
 8005152:	3724      	adds	r7, #36	@ 0x24
 8005154:	46bd      	mov	sp, r7
 8005156:	f85d 7b04 	ldr.w	r7, [sp], #4
 800515a:	4770      	bx	lr

0800515c <CRC_Handle_16>:
  * @param  pBuffer pointer to the input data buffer
  * @param  BufferLength input data buffer length
  * @retval uint32_t CRC (returned value LSBs for CRC shorter than 32 bits)
  */
static uint32_t CRC_Handle_16(CRC_HandleTypeDef *hcrc, uint16_t pBuffer[], uint32_t BufferLength)
{
 800515c:	b480      	push	{r7}
 800515e:	b087      	sub	sp, #28
 8005160:	af00      	add	r7, sp, #0
 8005162:	60f8      	str	r0, [r7, #12]
 8005164:	60b9      	str	r1, [r7, #8]
 8005166:	607a      	str	r2, [r7, #4]
  __IO uint16_t *pReg;

  /* Processing time optimization: 2 HalfWords are entered in a row with a single word write,
   * in case of odd length, last HalfWord must be carefully fed to the CRC calculator to ensure
   * a correct type handling by the peripheral */
  for (i = 0U; i < (BufferLength / 2U); i++)
 8005168:	2300      	movs	r3, #0
 800516a:	617b      	str	r3, [r7, #20]
 800516c:	e013      	b.n	8005196 <CRC_Handle_16+0x3a>
  {
    hcrc->Instance->DR = ((uint32_t)pBuffer[2U * i] << 16U) | (uint32_t)pBuffer[(2U * i) + 1U];
 800516e:	697b      	ldr	r3, [r7, #20]
 8005170:	009b      	lsls	r3, r3, #2
 8005172:	68ba      	ldr	r2, [r7, #8]
 8005174:	4413      	add	r3, r2
 8005176:	881b      	ldrh	r3, [r3, #0]
 8005178:	041a      	lsls	r2, r3, #16
 800517a:	697b      	ldr	r3, [r7, #20]
 800517c:	009b      	lsls	r3, r3, #2
 800517e:	3302      	adds	r3, #2
 8005180:	68b9      	ldr	r1, [r7, #8]
 8005182:	440b      	add	r3, r1
 8005184:	881b      	ldrh	r3, [r3, #0]
 8005186:	4619      	mov	r1, r3
 8005188:	68fb      	ldr	r3, [r7, #12]
 800518a:	681b      	ldr	r3, [r3, #0]
 800518c:	430a      	orrs	r2, r1
 800518e:	601a      	str	r2, [r3, #0]
  for (i = 0U; i < (BufferLength / 2U); i++)
 8005190:	697b      	ldr	r3, [r7, #20]
 8005192:	3301      	adds	r3, #1
 8005194:	617b      	str	r3, [r7, #20]
 8005196:	687b      	ldr	r3, [r7, #4]
 8005198:	085b      	lsrs	r3, r3, #1
 800519a:	697a      	ldr	r2, [r7, #20]
 800519c:	429a      	cmp	r2, r3
 800519e:	d3e6      	bcc.n	800516e <CRC_Handle_16+0x12>
  }
  if ((BufferLength % 2U) != 0U)
 80051a0:	687b      	ldr	r3, [r7, #4]
 80051a2:	f003 0301 	and.w	r3, r3, #1
 80051a6:	2b00      	cmp	r3, #0
 80051a8:	d009      	beq.n	80051be <CRC_Handle_16+0x62>
  {
    pReg = (__IO uint16_t *)(__IO void *)(&hcrc->Instance->DR);                 /* Derogation MisraC2012 R.11.5 */
 80051aa:	68fb      	ldr	r3, [r7, #12]
 80051ac:	681b      	ldr	r3, [r3, #0]
 80051ae:	613b      	str	r3, [r7, #16]
    *pReg = pBuffer[2U * i];
 80051b0:	697b      	ldr	r3, [r7, #20]
 80051b2:	009b      	lsls	r3, r3, #2
 80051b4:	68ba      	ldr	r2, [r7, #8]
 80051b6:	4413      	add	r3, r2
 80051b8:	881a      	ldrh	r2, [r3, #0]
 80051ba:	693b      	ldr	r3, [r7, #16]
 80051bc:	801a      	strh	r2, [r3, #0]
  }

  /* Return the CRC computed value */
  return hcrc->Instance->DR;
 80051be:	68fb      	ldr	r3, [r7, #12]
 80051c0:	681b      	ldr	r3, [r3, #0]
 80051c2:	681b      	ldr	r3, [r3, #0]
}
 80051c4:	4618      	mov	r0, r3
 80051c6:	371c      	adds	r7, #28
 80051c8:	46bd      	mov	sp, r7
 80051ca:	f85d 7b04 	ldr.w	r7, [sp], #4
 80051ce:	4770      	bx	lr

080051d0 <HAL_CRCEx_Polynomial_Set>:
  *          @arg @ref CRC_POLYLENGTH_16B 16-bit long CRC (generating polynomial of degree 16)
  *          @arg @ref CRC_POLYLENGTH_32B 32-bit long CRC (generating polynomial of degree 32)
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_CRCEx_Polynomial_Set(CRC_HandleTypeDef *hcrc, uint32_t Pol, uint32_t PolyLength)
{
 80051d0:	b480      	push	{r7}
 80051d2:	b087      	sub	sp, #28
 80051d4:	af00      	add	r7, sp, #0
 80051d6:	60f8      	str	r0, [r7, #12]
 80051d8:	60b9      	str	r1, [r7, #8]
 80051da:	607a      	str	r2, [r7, #4]
  HAL_StatusTypeDef status = HAL_OK;
 80051dc:	2300      	movs	r3, #0
 80051de:	75fb      	strb	r3, [r7, #23]
  uint32_t msb = 31U; /* polynomial degree is 32 at most, so msb is initialized to max value */
 80051e0:	231f      	movs	r3, #31
 80051e2:	613b      	str	r3, [r7, #16]

  /* Check the parameters */
  assert_param(IS_CRC_POL_LENGTH(PolyLength));

  /* Ensure that the generating polynomial is odd */
  if ((Pol & (uint32_t)(0x1U)) ==  0U)
 80051e4:	68bb      	ldr	r3, [r7, #8]
 80051e6:	f003 0301 	and.w	r3, r3, #1
 80051ea:	2b00      	cmp	r3, #0
 80051ec:	d102      	bne.n	80051f4 <HAL_CRCEx_Polynomial_Set+0x24>
  {
    status =  HAL_ERROR;
 80051ee:	2301      	movs	r3, #1
 80051f0:	75fb      	strb	r3, [r7, #23]
 80051f2:	e063      	b.n	80052bc <HAL_CRCEx_Polynomial_Set+0xec>
     * definition. HAL_ERROR is reported if Pol degree is
     * larger than that indicated by PolyLength.
     * Look for MSB position: msb will contain the degree of
     *  the second to the largest polynomial member. E.g., for
     *  X^7 + X^6 + X^5 + X^2 + 1, msb = 6. */
    while ((msb-- > 0U) && ((Pol & ((uint32_t)(0x1U) << (msb & 0x1FU))) == 0U))
 80051f4:	bf00      	nop
 80051f6:	693b      	ldr	r3, [r7, #16]
 80051f8:	1e5a      	subs	r2, r3, #1
 80051fa:	613a      	str	r2, [r7, #16]
 80051fc:	2b00      	cmp	r3, #0
 80051fe:	d009      	beq.n	8005214 <HAL_CRCEx_Polynomial_Set+0x44>
 8005200:	693b      	ldr	r3, [r7, #16]
 8005202:	f003 031f 	and.w	r3, r3, #31
 8005206:	68ba      	ldr	r2, [r7, #8]
 8005208:	fa22 f303 	lsr.w	r3, r2, r3
 800520c:	f003 0301 	and.w	r3, r3, #1
 8005210:	2b00      	cmp	r3, #0
 8005212:	d0f0      	beq.n	80051f6 <HAL_CRCEx_Polynomial_Set+0x26>
    {
    }

    switch (PolyLength)
 8005214:	687b      	ldr	r3, [r7, #4]
 8005216:	2b18      	cmp	r3, #24
 8005218:	d846      	bhi.n	80052a8 <HAL_CRCEx_Polynomial_Set+0xd8>
 800521a:	a201      	add	r2, pc, #4	@ (adr r2, 8005220 <HAL_CRCEx_Polynomial_Set+0x50>)
 800521c:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 8005220:	080052af 	.word	0x080052af
 8005224:	080052a9 	.word	0x080052a9
 8005228:	080052a9 	.word	0x080052a9
 800522c:	080052a9 	.word	0x080052a9
 8005230:	080052a9 	.word	0x080052a9
 8005234:	080052a9 	.word	0x080052a9
 8005238:	080052a9 	.word	0x080052a9
 800523c:	080052a9 	.word	0x080052a9
 8005240:	0800529d 	.word	0x0800529d
 8005244:	080052a9 	.word	0x080052a9
 8005248:	080052a9 	.word	0x080052a9
 800524c:	080052a9 	.word	0x080052a9
 8005250:	080052a9 	.word	0x080052a9
 8005254:	080052a9 	.word	0x080052a9
 8005258:	080052a9 	.word	0x080052a9
 800525c:	080052a9 	.word	0x080052a9
 8005260:	08005291 	.word	0x08005291
 8005264:	080052a9 	.word	0x080052a9
 8005268:	080052a9 	.word	0x080052a9
 800526c:	080052a9 	.word	0x080052a9
 8005270:	080052a9 	.word	0x080052a9
 8005274:	080052a9 	.word	0x080052a9
 8005278:	080052a9 	.word	0x080052a9
 800527c:	080052a9 	.word	0x080052a9
 8005280:	08005285 	.word	0x08005285
    {

      case CRC_POLYLENGTH_7B:
        if (msb >= HAL_CRC_LENGTH_7B)
 8005284:	693b      	ldr	r3, [r7, #16]
 8005286:	2b06      	cmp	r3, #6
 8005288:	d913      	bls.n	80052b2 <HAL_CRCEx_Polynomial_Set+0xe2>
        {
          status =   HAL_ERROR;
 800528a:	2301      	movs	r3, #1
 800528c:	75fb      	strb	r3, [r7, #23]
        }
        break;
 800528e:	e010      	b.n	80052b2 <HAL_CRCEx_Polynomial_Set+0xe2>
      case CRC_POLYLENGTH_8B:
        if (msb >= HAL_CRC_LENGTH_8B)
 8005290:	693b      	ldr	r3, [r7, #16]
 8005292:	2b07      	cmp	r3, #7
 8005294:	d90f      	bls.n	80052b6 <HAL_CRCEx_Polynomial_Set+0xe6>
        {
          status =   HAL_ERROR;
 8005296:	2301      	movs	r3, #1
 8005298:	75fb      	strb	r3, [r7, #23]
        }
        break;
 800529a:	e00c      	b.n	80052b6 <HAL_CRCEx_Polynomial_Set+0xe6>
      case CRC_POLYLENGTH_16B:
        if (msb >= HAL_CRC_LENGTH_16B)
 800529c:	693b      	ldr	r3, [r7, #16]
 800529e:	2b0f      	cmp	r3, #15
 80052a0:	d90b      	bls.n	80052ba <HAL_CRCEx_Polynomial_Set+0xea>
        {
          status =   HAL_ERROR;
 80052a2:	2301      	movs	r3, #1
 80052a4:	75fb      	strb	r3, [r7, #23]
        }
        break;
 80052a6:	e008      	b.n	80052ba <HAL_CRCEx_Polynomial_Set+0xea>

      case CRC_POLYLENGTH_32B:
        /* no polynomial definition vs. polynomial length issue possible */
        break;
      default:
        status =  HAL_ERROR;
 80052a8:	2301      	movs	r3, #1
 80052aa:	75fb      	strb	r3, [r7, #23]
        break;
 80052ac:	e006      	b.n	80052bc <HAL_CRCEx_Polynomial_Set+0xec>
        break;
 80052ae:	bf00      	nop
 80052b0:	e004      	b.n	80052bc <HAL_CRCEx_Polynomial_Set+0xec>
        break;
 80052b2:	bf00      	nop
 80052b4:	e002      	b.n	80052bc <HAL_CRCEx_Polynomial_Set+0xec>
        break;
 80052b6:	bf00      	nop
 80052b8:	e000      	b.n	80052bc <HAL_CRCEx_Polynomial_Set+0xec>
        break;
 80052ba:	bf00      	nop
    }
  }
  if (status == HAL_OK)
 80052bc:	7dfb      	ldrb	r3, [r7, #23]
 80052be:	2b00      	cmp	r3, #0
 80052c0:	d10d      	bne.n	80052de <HAL_CRCEx_Polynomial_Set+0x10e>
  {
    /* set generating polynomial */
    WRITE_REG(hcrc->Instance->POL, Pol);
 80052c2:	68fb      	ldr	r3, [r7, #12]
 80052c4:	681b      	ldr	r3, [r3, #0]
 80052c6:	68ba      	ldr	r2, [r7, #8]
 80052c8:	615a      	str	r2, [r3, #20]

    /* set generating polynomial size */
    MODIFY_REG(hcrc->Instance->CR, CRC_CR_POLYSIZE, PolyLength);
 80052ca:	68fb      	ldr	r3, [r7, #12]
 80052cc:	681b      	ldr	r3, [r3, #0]
 80052ce:	689b      	ldr	r3, [r3, #8]
 80052d0:	f023 0118 	bic.w	r1, r3, #24
 80052d4:	68fb      	ldr	r3, [r7, #12]
 80052d6:	681b      	ldr	r3, [r3, #0]
 80052d8:	687a      	ldr	r2, [r7, #4]
 80052da:	430a      	orrs	r2, r1
 80052dc:	609a      	str	r2, [r3, #8]
  }
  /* Return function status */
  return status;
 80052de:	7dfb      	ldrb	r3, [r7, #23]
}
 80052e0:	4618      	mov	r0, r3
 80052e2:	371c      	adds	r7, #28
 80052e4:	46bd      	mov	sp, r7
 80052e6:	f85d 7b04 	ldr.w	r7, [sp], #4
 80052ea:	4770      	bx	lr

080052ec <HAL_DMA_Init>:
  * @param  hdma: Pointer to a DMA_HandleTypeDef structure that contains
  *               the configuration information for the specified DMA Stream.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
{
 80052ec:	b580      	push	{r7, lr}
 80052ee:	b086      	sub	sp, #24
 80052f0:	af00      	add	r7, sp, #0
 80052f2:	6078      	str	r0, [r7, #4]
  uint32_t registerValue;
  uint32_t tickstart = HAL_GetTick();
 80052f4:	f7ff fc4c 	bl	8004b90 <HAL_GetTick>
 80052f8:	6138      	str	r0, [r7, #16]
  DMA_Base_Registers *regs_dma;
  BDMA_Base_Registers *regs_bdma;

  /* Check the DMA peripheral handle */
  if(hdma == NULL)
 80052fa:	687b      	ldr	r3, [r7, #4]
 80052fc:	2b00      	cmp	r3, #0
 80052fe:	d101      	bne.n	8005304 <HAL_DMA_Init+0x18>
  {
    return HAL_ERROR;
 8005300:	2301      	movs	r3, #1
 8005302:	e316      	b.n	8005932 <HAL_DMA_Init+0x646>
  assert_param(IS_DMA_PERIPHERAL_DATA_SIZE(hdma->Init.PeriphDataAlignment));
  assert_param(IS_DMA_MEMORY_DATA_SIZE(hdma->Init.MemDataAlignment));
  assert_param(IS_DMA_MODE(hdma->Init.Mode));
  assert_param(IS_DMA_PRIORITY(hdma->Init.Priority));

  if(IS_DMA_STREAM_INSTANCE(hdma->Instance) != 0U) /* DMA1 or DMA2 instance */
 8005304:	687b      	ldr	r3, [r7, #4]
 8005306:	681b      	ldr	r3, [r3, #0]
 8005308:	4a66      	ldr	r2, [pc, #408]	@ (80054a4 <HAL_DMA_Init+0x1b8>)
 800530a:	4293      	cmp	r3, r2
 800530c:	d04a      	beq.n	80053a4 <HAL_DMA_Init+0xb8>
 800530e:	687b      	ldr	r3, [r7, #4]
 8005310:	681b      	ldr	r3, [r3, #0]
 8005312:	4a65      	ldr	r2, [pc, #404]	@ (80054a8 <HAL_DMA_Init+0x1bc>)
 8005314:	4293      	cmp	r3, r2
 8005316:	d045      	beq.n	80053a4 <HAL_DMA_Init+0xb8>
 8005318:	687b      	ldr	r3, [r7, #4]
 800531a:	681b      	ldr	r3, [r3, #0]
 800531c:	4a63      	ldr	r2, [pc, #396]	@ (80054ac <HAL_DMA_Init+0x1c0>)
 800531e:	4293      	cmp	r3, r2
 8005320:	d040      	beq.n	80053a4 <HAL_DMA_Init+0xb8>
 8005322:	687b      	ldr	r3, [r7, #4]
 8005324:	681b      	ldr	r3, [r3, #0]
 8005326:	4a62      	ldr	r2, [pc, #392]	@ (80054b0 <HAL_DMA_Init+0x1c4>)
 8005328:	4293      	cmp	r3, r2
 800532a:	d03b      	beq.n	80053a4 <HAL_DMA_Init+0xb8>
 800532c:	687b      	ldr	r3, [r7, #4]
 800532e:	681b      	ldr	r3, [r3, #0]
 8005330:	4a60      	ldr	r2, [pc, #384]	@ (80054b4 <HAL_DMA_Init+0x1c8>)
 8005332:	4293      	cmp	r3, r2
 8005334:	d036      	beq.n	80053a4 <HAL_DMA_Init+0xb8>
 8005336:	687b      	ldr	r3, [r7, #4]
 8005338:	681b      	ldr	r3, [r3, #0]
 800533a:	4a5f      	ldr	r2, [pc, #380]	@ (80054b8 <HAL_DMA_Init+0x1cc>)
 800533c:	4293      	cmp	r3, r2
 800533e:	d031      	beq.n	80053a4 <HAL_DMA_Init+0xb8>
 8005340:	687b      	ldr	r3, [r7, #4]
 8005342:	681b      	ldr	r3, [r3, #0]
 8005344:	4a5d      	ldr	r2, [pc, #372]	@ (80054bc <HAL_DMA_Init+0x1d0>)
 8005346:	4293      	cmp	r3, r2
 8005348:	d02c      	beq.n	80053a4 <HAL_DMA_Init+0xb8>
 800534a:	687b      	ldr	r3, [r7, #4]
 800534c:	681b      	ldr	r3, [r3, #0]
 800534e:	4a5c      	ldr	r2, [pc, #368]	@ (80054c0 <HAL_DMA_Init+0x1d4>)
 8005350:	4293      	cmp	r3, r2
 8005352:	d027      	beq.n	80053a4 <HAL_DMA_Init+0xb8>
 8005354:	687b      	ldr	r3, [r7, #4]
 8005356:	681b      	ldr	r3, [r3, #0]
 8005358:	4a5a      	ldr	r2, [pc, #360]	@ (80054c4 <HAL_DMA_Init+0x1d8>)
 800535a:	4293      	cmp	r3, r2
 800535c:	d022      	beq.n	80053a4 <HAL_DMA_Init+0xb8>
 800535e:	687b      	ldr	r3, [r7, #4]
 8005360:	681b      	ldr	r3, [r3, #0]
 8005362:	4a59      	ldr	r2, [pc, #356]	@ (80054c8 <HAL_DMA_Init+0x1dc>)
 8005364:	4293      	cmp	r3, r2
 8005366:	d01d      	beq.n	80053a4 <HAL_DMA_Init+0xb8>
 8005368:	687b      	ldr	r3, [r7, #4]
 800536a:	681b      	ldr	r3, [r3, #0]
 800536c:	4a57      	ldr	r2, [pc, #348]	@ (80054cc <HAL_DMA_Init+0x1e0>)
 800536e:	4293      	cmp	r3, r2
 8005370:	d018      	beq.n	80053a4 <HAL_DMA_Init+0xb8>
 8005372:	687b      	ldr	r3, [r7, #4]
 8005374:	681b      	ldr	r3, [r3, #0]
 8005376:	4a56      	ldr	r2, [pc, #344]	@ (80054d0 <HAL_DMA_Init+0x1e4>)
 8005378:	4293      	cmp	r3, r2
 800537a:	d013      	beq.n	80053a4 <HAL_DMA_Init+0xb8>
 800537c:	687b      	ldr	r3, [r7, #4]
 800537e:	681b      	ldr	r3, [r3, #0]
 8005380:	4a54      	ldr	r2, [pc, #336]	@ (80054d4 <HAL_DMA_Init+0x1e8>)
 8005382:	4293      	cmp	r3, r2
 8005384:	d00e      	beq.n	80053a4 <HAL_DMA_Init+0xb8>
 8005386:	687b      	ldr	r3, [r7, #4]
 8005388:	681b      	ldr	r3, [r3, #0]
 800538a:	4a53      	ldr	r2, [pc, #332]	@ (80054d8 <HAL_DMA_Init+0x1ec>)
 800538c:	4293      	cmp	r3, r2
 800538e:	d009      	beq.n	80053a4 <HAL_DMA_Init+0xb8>
 8005390:	687b      	ldr	r3, [r7, #4]
 8005392:	681b      	ldr	r3, [r3, #0]
 8005394:	4a51      	ldr	r2, [pc, #324]	@ (80054dc <HAL_DMA_Init+0x1f0>)
 8005396:	4293      	cmp	r3, r2
 8005398:	d004      	beq.n	80053a4 <HAL_DMA_Init+0xb8>
 800539a:	687b      	ldr	r3, [r7, #4]
 800539c:	681b      	ldr	r3, [r3, #0]
 800539e:	4a50      	ldr	r2, [pc, #320]	@ (80054e0 <HAL_DMA_Init+0x1f4>)
 80053a0:	4293      	cmp	r3, r2
 80053a2:	d101      	bne.n	80053a8 <HAL_DMA_Init+0xbc>
 80053a4:	2301      	movs	r3, #1
 80053a6:	e000      	b.n	80053aa <HAL_DMA_Init+0xbe>
 80053a8:	2300      	movs	r3, #0
 80053aa:	2b00      	cmp	r3, #0
 80053ac:	f000 813b 	beq.w	8005626 <HAL_DMA_Init+0x33a>
      assert_param(IS_DMA_MEMORY_BURST(hdma->Init.MemBurst));
      assert_param(IS_DMA_PERIPHERAL_BURST(hdma->Init.PeriphBurst));
    }

    /* Change DMA peripheral state */
    hdma->State = HAL_DMA_STATE_BUSY;
 80053b0:	687b      	ldr	r3, [r7, #4]
 80053b2:	2202      	movs	r2, #2
 80053b4:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

    /* Allocate lock resource */
    __HAL_UNLOCK(hdma);
 80053b8:	687b      	ldr	r3, [r7, #4]
 80053ba:	2200      	movs	r2, #0
 80053bc:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34

    /* Disable the peripheral */
    __HAL_DMA_DISABLE(hdma);
 80053c0:	687b      	ldr	r3, [r7, #4]
 80053c2:	681b      	ldr	r3, [r3, #0]
 80053c4:	4a37      	ldr	r2, [pc, #220]	@ (80054a4 <HAL_DMA_Init+0x1b8>)
 80053c6:	4293      	cmp	r3, r2
 80053c8:	d04a      	beq.n	8005460 <HAL_DMA_Init+0x174>
 80053ca:	687b      	ldr	r3, [r7, #4]
 80053cc:	681b      	ldr	r3, [r3, #0]
 80053ce:	4a36      	ldr	r2, [pc, #216]	@ (80054a8 <HAL_DMA_Init+0x1bc>)
 80053d0:	4293      	cmp	r3, r2
 80053d2:	d045      	beq.n	8005460 <HAL_DMA_Init+0x174>
 80053d4:	687b      	ldr	r3, [r7, #4]
 80053d6:	681b      	ldr	r3, [r3, #0]
 80053d8:	4a34      	ldr	r2, [pc, #208]	@ (80054ac <HAL_DMA_Init+0x1c0>)
 80053da:	4293      	cmp	r3, r2
 80053dc:	d040      	beq.n	8005460 <HAL_DMA_Init+0x174>
 80053de:	687b      	ldr	r3, [r7, #4]
 80053e0:	681b      	ldr	r3, [r3, #0]
 80053e2:	4a33      	ldr	r2, [pc, #204]	@ (80054b0 <HAL_DMA_Init+0x1c4>)
 80053e4:	4293      	cmp	r3, r2
 80053e6:	d03b      	beq.n	8005460 <HAL_DMA_Init+0x174>
 80053e8:	687b      	ldr	r3, [r7, #4]
 80053ea:	681b      	ldr	r3, [r3, #0]
 80053ec:	4a31      	ldr	r2, [pc, #196]	@ (80054b4 <HAL_DMA_Init+0x1c8>)
 80053ee:	4293      	cmp	r3, r2
 80053f0:	d036      	beq.n	8005460 <HAL_DMA_Init+0x174>
 80053f2:	687b      	ldr	r3, [r7, #4]
 80053f4:	681b      	ldr	r3, [r3, #0]
 80053f6:	4a30      	ldr	r2, [pc, #192]	@ (80054b8 <HAL_DMA_Init+0x1cc>)
 80053f8:	4293      	cmp	r3, r2
 80053fa:	d031      	beq.n	8005460 <HAL_DMA_Init+0x174>
 80053fc:	687b      	ldr	r3, [r7, #4]
 80053fe:	681b      	ldr	r3, [r3, #0]
 8005400:	4a2e      	ldr	r2, [pc, #184]	@ (80054bc <HAL_DMA_Init+0x1d0>)
 8005402:	4293      	cmp	r3, r2
 8005404:	d02c      	beq.n	8005460 <HAL_DMA_Init+0x174>
 8005406:	687b      	ldr	r3, [r7, #4]
 8005408:	681b      	ldr	r3, [r3, #0]
 800540a:	4a2d      	ldr	r2, [pc, #180]	@ (80054c0 <HAL_DMA_Init+0x1d4>)
 800540c:	4293      	cmp	r3, r2
 800540e:	d027      	beq.n	8005460 <HAL_DMA_Init+0x174>
 8005410:	687b      	ldr	r3, [r7, #4]
 8005412:	681b      	ldr	r3, [r3, #0]
 8005414:	4a2b      	ldr	r2, [pc, #172]	@ (80054c4 <HAL_DMA_Init+0x1d8>)
 8005416:	4293      	cmp	r3, r2
 8005418:	d022      	beq.n	8005460 <HAL_DMA_Init+0x174>
 800541a:	687b      	ldr	r3, [r7, #4]
 800541c:	681b      	ldr	r3, [r3, #0]
 800541e:	4a2a      	ldr	r2, [pc, #168]	@ (80054c8 <HAL_DMA_Init+0x1dc>)
 8005420:	4293      	cmp	r3, r2
 8005422:	d01d      	beq.n	8005460 <HAL_DMA_Init+0x174>
 8005424:	687b      	ldr	r3, [r7, #4]
 8005426:	681b      	ldr	r3, [r3, #0]
 8005428:	4a28      	ldr	r2, [pc, #160]	@ (80054cc <HAL_DMA_Init+0x1e0>)
 800542a:	4293      	cmp	r3, r2
 800542c:	d018      	beq.n	8005460 <HAL_DMA_Init+0x174>
 800542e:	687b      	ldr	r3, [r7, #4]
 8005430:	681b      	ldr	r3, [r3, #0]
 8005432:	4a27      	ldr	r2, [pc, #156]	@ (80054d0 <HAL_DMA_Init+0x1e4>)
 8005434:	4293      	cmp	r3, r2
 8005436:	d013      	beq.n	8005460 <HAL_DMA_Init+0x174>
 8005438:	687b      	ldr	r3, [r7, #4]
 800543a:	681b      	ldr	r3, [r3, #0]
 800543c:	4a25      	ldr	r2, [pc, #148]	@ (80054d4 <HAL_DMA_Init+0x1e8>)
 800543e:	4293      	cmp	r3, r2
 8005440:	d00e      	beq.n	8005460 <HAL_DMA_Init+0x174>
 8005442:	687b      	ldr	r3, [r7, #4]
 8005444:	681b      	ldr	r3, [r3, #0]
 8005446:	4a24      	ldr	r2, [pc, #144]	@ (80054d8 <HAL_DMA_Init+0x1ec>)
 8005448:	4293      	cmp	r3, r2
 800544a:	d009      	beq.n	8005460 <HAL_DMA_Init+0x174>
 800544c:	687b      	ldr	r3, [r7, #4]
 800544e:	681b      	ldr	r3, [r3, #0]
 8005450:	4a22      	ldr	r2, [pc, #136]	@ (80054dc <HAL_DMA_Init+0x1f0>)
 8005452:	4293      	cmp	r3, r2
 8005454:	d004      	beq.n	8005460 <HAL_DMA_Init+0x174>
 8005456:	687b      	ldr	r3, [r7, #4]
 8005458:	681b      	ldr	r3, [r3, #0]
 800545a:	4a21      	ldr	r2, [pc, #132]	@ (80054e0 <HAL_DMA_Init+0x1f4>)
 800545c:	4293      	cmp	r3, r2
 800545e:	d108      	bne.n	8005472 <HAL_DMA_Init+0x186>
 8005460:	687b      	ldr	r3, [r7, #4]
 8005462:	681b      	ldr	r3, [r3, #0]
 8005464:	681a      	ldr	r2, [r3, #0]
 8005466:	687b      	ldr	r3, [r7, #4]
 8005468:	681b      	ldr	r3, [r3, #0]
 800546a:	f022 0201 	bic.w	r2, r2, #1
 800546e:	601a      	str	r2, [r3, #0]
 8005470:	e007      	b.n	8005482 <HAL_DMA_Init+0x196>
 8005472:	687b      	ldr	r3, [r7, #4]
 8005474:	681b      	ldr	r3, [r3, #0]
 8005476:	681a      	ldr	r2, [r3, #0]
 8005478:	687b      	ldr	r3, [r7, #4]
 800547a:	681b      	ldr	r3, [r3, #0]
 800547c:	f022 0201 	bic.w	r2, r2, #1
 8005480:	601a      	str	r2, [r3, #0]

    /* Check if the DMA Stream is effectively disabled */
    while((((DMA_Stream_TypeDef   *)hdma->Instance)->CR & DMA_SxCR_EN) != 0U)
 8005482:	e02f      	b.n	80054e4 <HAL_DMA_Init+0x1f8>
    {
      /* Check for the Timeout */
      if((HAL_GetTick() - tickstart ) > HAL_TIMEOUT_DMA_ABORT)
 8005484:	f7ff fb84 	bl	8004b90 <HAL_GetTick>
 8005488:	4602      	mov	r2, r0
 800548a:	693b      	ldr	r3, [r7, #16]
 800548c:	1ad3      	subs	r3, r2, r3
 800548e:	2b05      	cmp	r3, #5
 8005490:	d928      	bls.n	80054e4 <HAL_DMA_Init+0x1f8>
      {
        /* Update error code */
        hdma->ErrorCode = HAL_DMA_ERROR_TIMEOUT;
 8005492:	687b      	ldr	r3, [r7, #4]
 8005494:	2220      	movs	r2, #32
 8005496:	655a      	str	r2, [r3, #84]	@ 0x54

        /* Change the DMA state */
        hdma->State = HAL_DMA_STATE_ERROR;
 8005498:	687b      	ldr	r3, [r7, #4]
 800549a:	2203      	movs	r2, #3
 800549c:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

        return HAL_ERROR;
 80054a0:	2301      	movs	r3, #1
 80054a2:	e246      	b.n	8005932 <HAL_DMA_Init+0x646>
 80054a4:	40020010 	.word	0x40020010
 80054a8:	40020028 	.word	0x40020028
 80054ac:	40020040 	.word	0x40020040
 80054b0:	40020058 	.word	0x40020058
 80054b4:	40020070 	.word	0x40020070
 80054b8:	40020088 	.word	0x40020088
 80054bc:	400200a0 	.word	0x400200a0
 80054c0:	400200b8 	.word	0x400200b8
 80054c4:	40020410 	.word	0x40020410
 80054c8:	40020428 	.word	0x40020428
 80054cc:	40020440 	.word	0x40020440
 80054d0:	40020458 	.word	0x40020458
 80054d4:	40020470 	.word	0x40020470
 80054d8:	40020488 	.word	0x40020488
 80054dc:	400204a0 	.word	0x400204a0
 80054e0:	400204b8 	.word	0x400204b8
    while((((DMA_Stream_TypeDef   *)hdma->Instance)->CR & DMA_SxCR_EN) != 0U)
 80054e4:	687b      	ldr	r3, [r7, #4]
 80054e6:	681b      	ldr	r3, [r3, #0]
 80054e8:	681b      	ldr	r3, [r3, #0]
 80054ea:	f003 0301 	and.w	r3, r3, #1
 80054ee:	2b00      	cmp	r3, #0
 80054f0:	d1c8      	bne.n	8005484 <HAL_DMA_Init+0x198>
      }
    }

    /* Get the CR register value */
    registerValue = ((DMA_Stream_TypeDef   *)hdma->Instance)->CR;
 80054f2:	687b      	ldr	r3, [r7, #4]
 80054f4:	681b      	ldr	r3, [r3, #0]
 80054f6:	681b      	ldr	r3, [r3, #0]
 80054f8:	617b      	str	r3, [r7, #20]

    /* Clear CHSEL, MBURST, PBURST, PL, MSIZE, PSIZE, MINC, PINC, CIRC, DIR, CT and DBM bits */
    registerValue &= ((uint32_t)~(DMA_SxCR_MBURST | DMA_SxCR_PBURST | \
 80054fa:	697a      	ldr	r2, [r7, #20]
 80054fc:	4b83      	ldr	r3, [pc, #524]	@ (800570c <HAL_DMA_Init+0x420>)
 80054fe:	4013      	ands	r3, r2
 8005500:	617b      	str	r3, [r7, #20]
                        DMA_SxCR_PL    | DMA_SxCR_MSIZE  | DMA_SxCR_PSIZE  | \
                        DMA_SxCR_MINC  | DMA_SxCR_PINC   | DMA_SxCR_CIRC   | \
                        DMA_SxCR_DIR   | DMA_SxCR_CT     | DMA_SxCR_DBM));

    /* Prepare the DMA Stream configuration */
    registerValue |=  hdma->Init.Direction           |
 8005502:	687b      	ldr	r3, [r7, #4]
 8005504:	689a      	ldr	r2, [r3, #8]
            hdma->Init.PeriphInc           | hdma->Init.MemInc           |
 8005506:	687b      	ldr	r3, [r7, #4]
 8005508:	68db      	ldr	r3, [r3, #12]
    registerValue |=  hdma->Init.Direction           |
 800550a:	431a      	orrs	r2, r3
            hdma->Init.PeriphInc           | hdma->Init.MemInc           |
 800550c:	687b      	ldr	r3, [r7, #4]
 800550e:	691b      	ldr	r3, [r3, #16]
 8005510:	431a      	orrs	r2, r3
            hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
 8005512:	687b      	ldr	r3, [r7, #4]
 8005514:	695b      	ldr	r3, [r3, #20]
            hdma->Init.PeriphInc           | hdma->Init.MemInc           |
 8005516:	431a      	orrs	r2, r3
            hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
 8005518:	687b      	ldr	r3, [r7, #4]
 800551a:	699b      	ldr	r3, [r3, #24]
 800551c:	431a      	orrs	r2, r3
            hdma->Init.Mode                | hdma->Init.Priority;
 800551e:	687b      	ldr	r3, [r7, #4]
 8005520:	69db      	ldr	r3, [r3, #28]
            hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
 8005522:	431a      	orrs	r2, r3
            hdma->Init.Mode                | hdma->Init.Priority;
 8005524:	687b      	ldr	r3, [r7, #4]
 8005526:	6a1b      	ldr	r3, [r3, #32]
 8005528:	4313      	orrs	r3, r2
    registerValue |=  hdma->Init.Direction           |
 800552a:	697a      	ldr	r2, [r7, #20]
 800552c:	4313      	orrs	r3, r2
 800552e:	617b      	str	r3, [r7, #20]

    /* the Memory burst and peripheral burst are not used when the FIFO is disabled */
    if(hdma->Init.FIFOMode == DMA_FIFOMODE_ENABLE)
 8005530:	687b      	ldr	r3, [r7, #4]
 8005532:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8005534:	2b04      	cmp	r3, #4
 8005536:	d107      	bne.n	8005548 <HAL_DMA_Init+0x25c>
    {
      /* Get memory burst and peripheral burst */
      registerValue |=  hdma->Init.MemBurst | hdma->Init.PeriphBurst;
 8005538:	687b      	ldr	r3, [r7, #4]
 800553a:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 800553c:	687b      	ldr	r3, [r7, #4]
 800553e:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8005540:	4313      	orrs	r3, r2
 8005542:	697a      	ldr	r2, [r7, #20]
 8005544:	4313      	orrs	r3, r2
 8005546:	617b      	str	r3, [r7, #20]
    }

    /* Work around for Errata 2.22: UART/USART- DMA transfer lock: DMA stream could be
                                    lock when transferring data to/from USART/UART */
#if (STM32H7_DEV_ID == 0x450UL)
    if((DBGMCU->IDCODE & 0xFFFF0000U) >= 0x20000000U)
 8005548:	4b71      	ldr	r3, [pc, #452]	@ (8005710 <HAL_DMA_Init+0x424>)
 800554a:	681a      	ldr	r2, [r3, #0]
 800554c:	4b71      	ldr	r3, [pc, #452]	@ (8005714 <HAL_DMA_Init+0x428>)
 800554e:	4013      	ands	r3, r2
 8005550:	f1b3 5f00 	cmp.w	r3, #536870912	@ 0x20000000
 8005554:	d328      	bcc.n	80055a8 <HAL_DMA_Init+0x2bc>
    {
#endif /* STM32H7_DEV_ID == 0x450UL */
      if(IS_DMA_UART_USART_REQUEST(hdma->Init.Request) != 0U)
 8005556:	687b      	ldr	r3, [r7, #4]
 8005558:	685b      	ldr	r3, [r3, #4]
 800555a:	2b28      	cmp	r3, #40	@ 0x28
 800555c:	d903      	bls.n	8005566 <HAL_DMA_Init+0x27a>
 800555e:	687b      	ldr	r3, [r7, #4]
 8005560:	685b      	ldr	r3, [r3, #4]
 8005562:	2b2e      	cmp	r3, #46	@ 0x2e
 8005564:	d917      	bls.n	8005596 <HAL_DMA_Init+0x2aa>
 8005566:	687b      	ldr	r3, [r7, #4]
 8005568:	685b      	ldr	r3, [r3, #4]
 800556a:	2b3e      	cmp	r3, #62	@ 0x3e
 800556c:	d903      	bls.n	8005576 <HAL_DMA_Init+0x28a>
 800556e:	687b      	ldr	r3, [r7, #4]
 8005570:	685b      	ldr	r3, [r3, #4]
 8005572:	2b42      	cmp	r3, #66	@ 0x42
 8005574:	d90f      	bls.n	8005596 <HAL_DMA_Init+0x2aa>
 8005576:	687b      	ldr	r3, [r7, #4]
 8005578:	685b      	ldr	r3, [r3, #4]
 800557a:	2b46      	cmp	r3, #70	@ 0x46
 800557c:	d903      	bls.n	8005586 <HAL_DMA_Init+0x29a>
 800557e:	687b      	ldr	r3, [r7, #4]
 8005580:	685b      	ldr	r3, [r3, #4]
 8005582:	2b48      	cmp	r3, #72	@ 0x48
 8005584:	d907      	bls.n	8005596 <HAL_DMA_Init+0x2aa>
 8005586:	687b      	ldr	r3, [r7, #4]
 8005588:	685b      	ldr	r3, [r3, #4]
 800558a:	2b4e      	cmp	r3, #78	@ 0x4e
 800558c:	d905      	bls.n	800559a <HAL_DMA_Init+0x2ae>
 800558e:	687b      	ldr	r3, [r7, #4]
 8005590:	685b      	ldr	r3, [r3, #4]
 8005592:	2b52      	cmp	r3, #82	@ 0x52
 8005594:	d801      	bhi.n	800559a <HAL_DMA_Init+0x2ae>
 8005596:	2301      	movs	r3, #1
 8005598:	e000      	b.n	800559c <HAL_DMA_Init+0x2b0>
 800559a:	2300      	movs	r3, #0
 800559c:	2b00      	cmp	r3, #0
 800559e:	d003      	beq.n	80055a8 <HAL_DMA_Init+0x2bc>
      {
        registerValue |= DMA_SxCR_TRBUFF;
 80055a0:	697b      	ldr	r3, [r7, #20]
 80055a2:	f443 1380 	orr.w	r3, r3, #1048576	@ 0x100000
 80055a6:	617b      	str	r3, [r7, #20]
#if (STM32H7_DEV_ID == 0x450UL)
    }
#endif /* STM32H7_DEV_ID == 0x450UL */

    /* Write to DMA Stream CR register */
    ((DMA_Stream_TypeDef   *)hdma->Instance)->CR = registerValue;
 80055a8:	687b      	ldr	r3, [r7, #4]
 80055aa:	681b      	ldr	r3, [r3, #0]
 80055ac:	697a      	ldr	r2, [r7, #20]
 80055ae:	601a      	str	r2, [r3, #0]

    /* Get the FCR register value */
    registerValue = ((DMA_Stream_TypeDef   *)hdma->Instance)->FCR;
 80055b0:	687b      	ldr	r3, [r7, #4]
 80055b2:	681b      	ldr	r3, [r3, #0]
 80055b4:	695b      	ldr	r3, [r3, #20]
 80055b6:	617b      	str	r3, [r7, #20]

    /* Clear Direct mode and FIFO threshold bits */
    registerValue &= (uint32_t)~(DMA_SxFCR_DMDIS | DMA_SxFCR_FTH);
 80055b8:	697b      	ldr	r3, [r7, #20]
 80055ba:	f023 0307 	bic.w	r3, r3, #7
 80055be:	617b      	str	r3, [r7, #20]

    /* Prepare the DMA Stream FIFO configuration */
    registerValue |= hdma->Init.FIFOMode;
 80055c0:	687b      	ldr	r3, [r7, #4]
 80055c2:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 80055c4:	697a      	ldr	r2, [r7, #20]
 80055c6:	4313      	orrs	r3, r2
 80055c8:	617b      	str	r3, [r7, #20]

    /* the FIFO threshold is not used when the FIFO mode is disabled */
    if(hdma->Init.FIFOMode == DMA_FIFOMODE_ENABLE)
 80055ca:	687b      	ldr	r3, [r7, #4]
 80055cc:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 80055ce:	2b04      	cmp	r3, #4
 80055d0:	d117      	bne.n	8005602 <HAL_DMA_Init+0x316>
    {
      /* Get the FIFO threshold */
      registerValue |= hdma->Init.FIFOThreshold;
 80055d2:	687b      	ldr	r3, [r7, #4]
 80055d4:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 80055d6:	697a      	ldr	r2, [r7, #20]
 80055d8:	4313      	orrs	r3, r2
 80055da:	617b      	str	r3, [r7, #20]

      /* Check compatibility between FIFO threshold level and size of the memory burst */
      /* for INCR4, INCR8, INCR16 */
      if(hdma->Init.MemBurst != DMA_MBURST_SINGLE)
 80055dc:	687b      	ldr	r3, [r7, #4]
 80055de:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80055e0:	2b00      	cmp	r3, #0
 80055e2:	d00e      	beq.n	8005602 <HAL_DMA_Init+0x316>
      {
        if (DMA_CheckFifoParam(hdma) != HAL_OK)
 80055e4:	6878      	ldr	r0, [r7, #4]
 80055e6:	f001 ff1d 	bl	8007424 <DMA_CheckFifoParam>
 80055ea:	4603      	mov	r3, r0
 80055ec:	2b00      	cmp	r3, #0
 80055ee:	d008      	beq.n	8005602 <HAL_DMA_Init+0x316>
        {
          /* Update error code */
          hdma->ErrorCode = HAL_DMA_ERROR_PARAM;
 80055f0:	687b      	ldr	r3, [r7, #4]
 80055f2:	2240      	movs	r2, #64	@ 0x40
 80055f4:	655a      	str	r2, [r3, #84]	@ 0x54

          /* Change the DMA state */
          hdma->State = HAL_DMA_STATE_READY;
 80055f6:	687b      	ldr	r3, [r7, #4]
 80055f8:	2201      	movs	r2, #1
 80055fa:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

          return HAL_ERROR;
 80055fe:	2301      	movs	r3, #1
 8005600:	e197      	b.n	8005932 <HAL_DMA_Init+0x646>
        }
      }
    }

    /* Write to DMA Stream FCR */
    ((DMA_Stream_TypeDef   *)hdma->Instance)->FCR = registerValue;
 8005602:	687b      	ldr	r3, [r7, #4]
 8005604:	681b      	ldr	r3, [r3, #0]
 8005606:	697a      	ldr	r2, [r7, #20]
 8005608:	615a      	str	r2, [r3, #20]

    /* Initialize StreamBaseAddress and StreamIndex parameters to be used to calculate
       DMA steam Base Address needed by HAL_DMA_IRQHandler() and HAL_DMA_PollForTransfer() */
    regs_dma = (DMA_Base_Registers *)DMA_CalcBaseAndBitshift(hdma);
 800560a:	6878      	ldr	r0, [r7, #4]
 800560c:	f001 fe58 	bl	80072c0 <DMA_CalcBaseAndBitshift>
 8005610:	4603      	mov	r3, r0
 8005612:	60bb      	str	r3, [r7, #8]

    /* Clear all interrupt flags */
    regs_dma->IFCR = 0x3FUL << (hdma->StreamIndex & 0x1FU);
 8005614:	687b      	ldr	r3, [r7, #4]
 8005616:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 8005618:	f003 031f 	and.w	r3, r3, #31
 800561c:	223f      	movs	r2, #63	@ 0x3f
 800561e:	409a      	lsls	r2, r3
 8005620:	68bb      	ldr	r3, [r7, #8]
 8005622:	609a      	str	r2, [r3, #8]
 8005624:	e0cd      	b.n	80057c2 <HAL_DMA_Init+0x4d6>
  }
  else if(IS_BDMA_CHANNEL_INSTANCE(hdma->Instance) != 0U) /* BDMA instance(s) */
 8005626:	687b      	ldr	r3, [r7, #4]
 8005628:	681b      	ldr	r3, [r3, #0]
 800562a:	4a3b      	ldr	r2, [pc, #236]	@ (8005718 <HAL_DMA_Init+0x42c>)
 800562c:	4293      	cmp	r3, r2
 800562e:	d022      	beq.n	8005676 <HAL_DMA_Init+0x38a>
 8005630:	687b      	ldr	r3, [r7, #4]
 8005632:	681b      	ldr	r3, [r3, #0]
 8005634:	4a39      	ldr	r2, [pc, #228]	@ (800571c <HAL_DMA_Init+0x430>)
 8005636:	4293      	cmp	r3, r2
 8005638:	d01d      	beq.n	8005676 <HAL_DMA_Init+0x38a>
 800563a:	687b      	ldr	r3, [r7, #4]
 800563c:	681b      	ldr	r3, [r3, #0]
 800563e:	4a38      	ldr	r2, [pc, #224]	@ (8005720 <HAL_DMA_Init+0x434>)
 8005640:	4293      	cmp	r3, r2
 8005642:	d018      	beq.n	8005676 <HAL_DMA_Init+0x38a>
 8005644:	687b      	ldr	r3, [r7, #4]
 8005646:	681b      	ldr	r3, [r3, #0]
 8005648:	4a36      	ldr	r2, [pc, #216]	@ (8005724 <HAL_DMA_Init+0x438>)
 800564a:	4293      	cmp	r3, r2
 800564c:	d013      	beq.n	8005676 <HAL_DMA_Init+0x38a>
 800564e:	687b      	ldr	r3, [r7, #4]
 8005650:	681b      	ldr	r3, [r3, #0]
 8005652:	4a35      	ldr	r2, [pc, #212]	@ (8005728 <HAL_DMA_Init+0x43c>)
 8005654:	4293      	cmp	r3, r2
 8005656:	d00e      	beq.n	8005676 <HAL_DMA_Init+0x38a>
 8005658:	687b      	ldr	r3, [r7, #4]
 800565a:	681b      	ldr	r3, [r3, #0]
 800565c:	4a33      	ldr	r2, [pc, #204]	@ (800572c <HAL_DMA_Init+0x440>)
 800565e:	4293      	cmp	r3, r2
 8005660:	d009      	beq.n	8005676 <HAL_DMA_Init+0x38a>
 8005662:	687b      	ldr	r3, [r7, #4]
 8005664:	681b      	ldr	r3, [r3, #0]
 8005666:	4a32      	ldr	r2, [pc, #200]	@ (8005730 <HAL_DMA_Init+0x444>)
 8005668:	4293      	cmp	r3, r2
 800566a:	d004      	beq.n	8005676 <HAL_DMA_Init+0x38a>
 800566c:	687b      	ldr	r3, [r7, #4]
 800566e:	681b      	ldr	r3, [r3, #0]
 8005670:	4a30      	ldr	r2, [pc, #192]	@ (8005734 <HAL_DMA_Init+0x448>)
 8005672:	4293      	cmp	r3, r2
 8005674:	d101      	bne.n	800567a <HAL_DMA_Init+0x38e>
 8005676:	2301      	movs	r3, #1
 8005678:	e000      	b.n	800567c <HAL_DMA_Init+0x390>
 800567a:	2300      	movs	r3, #0
 800567c:	2b00      	cmp	r3, #0
 800567e:	f000 8097 	beq.w	80057b0 <HAL_DMA_Init+0x4c4>
  {
    if(IS_BDMA_CHANNEL_DMAMUX_INSTANCE(hdma->Instance) != 0U)
 8005682:	687b      	ldr	r3, [r7, #4]
 8005684:	681b      	ldr	r3, [r3, #0]
 8005686:	4a24      	ldr	r2, [pc, #144]	@ (8005718 <HAL_DMA_Init+0x42c>)
 8005688:	4293      	cmp	r3, r2
 800568a:	d021      	beq.n	80056d0 <HAL_DMA_Init+0x3e4>
 800568c:	687b      	ldr	r3, [r7, #4]
 800568e:	681b      	ldr	r3, [r3, #0]
 8005690:	4a22      	ldr	r2, [pc, #136]	@ (800571c <HAL_DMA_Init+0x430>)
 8005692:	4293      	cmp	r3, r2
 8005694:	d01c      	beq.n	80056d0 <HAL_DMA_Init+0x3e4>
 8005696:	687b      	ldr	r3, [r7, #4]
 8005698:	681b      	ldr	r3, [r3, #0]
 800569a:	4a21      	ldr	r2, [pc, #132]	@ (8005720 <HAL_DMA_Init+0x434>)
 800569c:	4293      	cmp	r3, r2
 800569e:	d017      	beq.n	80056d0 <HAL_DMA_Init+0x3e4>
 80056a0:	687b      	ldr	r3, [r7, #4]
 80056a2:	681b      	ldr	r3, [r3, #0]
 80056a4:	4a1f      	ldr	r2, [pc, #124]	@ (8005724 <HAL_DMA_Init+0x438>)
 80056a6:	4293      	cmp	r3, r2
 80056a8:	d012      	beq.n	80056d0 <HAL_DMA_Init+0x3e4>
 80056aa:	687b      	ldr	r3, [r7, #4]
 80056ac:	681b      	ldr	r3, [r3, #0]
 80056ae:	4a1e      	ldr	r2, [pc, #120]	@ (8005728 <HAL_DMA_Init+0x43c>)
 80056b0:	4293      	cmp	r3, r2
 80056b2:	d00d      	beq.n	80056d0 <HAL_DMA_Init+0x3e4>
 80056b4:	687b      	ldr	r3, [r7, #4]
 80056b6:	681b      	ldr	r3, [r3, #0]
 80056b8:	4a1c      	ldr	r2, [pc, #112]	@ (800572c <HAL_DMA_Init+0x440>)
 80056ba:	4293      	cmp	r3, r2
 80056bc:	d008      	beq.n	80056d0 <HAL_DMA_Init+0x3e4>
 80056be:	687b      	ldr	r3, [r7, #4]
 80056c0:	681b      	ldr	r3, [r3, #0]
 80056c2:	4a1b      	ldr	r2, [pc, #108]	@ (8005730 <HAL_DMA_Init+0x444>)
 80056c4:	4293      	cmp	r3, r2
 80056c6:	d003      	beq.n	80056d0 <HAL_DMA_Init+0x3e4>
 80056c8:	687b      	ldr	r3, [r7, #4]
 80056ca:	681b      	ldr	r3, [r3, #0]
 80056cc:	4a19      	ldr	r2, [pc, #100]	@ (8005734 <HAL_DMA_Init+0x448>)
 80056ce:	4293      	cmp	r3, r2
      /* Check the request parameter */
      assert_param(IS_BDMA_REQUEST(hdma->Init.Request));
    }

    /* Change DMA peripheral state */
    hdma->State = HAL_DMA_STATE_BUSY;
 80056d0:	687b      	ldr	r3, [r7, #4]
 80056d2:	2202      	movs	r2, #2
 80056d4:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

    /* Allocate lock resource */
    __HAL_UNLOCK(hdma);
 80056d8:	687b      	ldr	r3, [r7, #4]
 80056da:	2200      	movs	r2, #0
 80056dc:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34

    /* Get the CR register value */
    registerValue = ((BDMA_Channel_TypeDef *)hdma->Instance)->CCR;
 80056e0:	687b      	ldr	r3, [r7, #4]
 80056e2:	681b      	ldr	r3, [r3, #0]
 80056e4:	681b      	ldr	r3, [r3, #0]
 80056e6:	617b      	str	r3, [r7, #20]

    /* Clear PL, MSIZE, PSIZE, MINC, PINC, CIRC, DIR, MEM2MEM, DBM and CT bits */
    registerValue &= ((uint32_t)~(BDMA_CCR_PL    | BDMA_CCR_MSIZE   | BDMA_CCR_PSIZE  | \
 80056e8:	697a      	ldr	r2, [r7, #20]
 80056ea:	4b13      	ldr	r3, [pc, #76]	@ (8005738 <HAL_DMA_Init+0x44c>)
 80056ec:	4013      	ands	r3, r2
 80056ee:	617b      	str	r3, [r7, #20]
                                  BDMA_CCR_MINC  | BDMA_CCR_PINC    | BDMA_CCR_CIRC   | \
                                  BDMA_CCR_DIR   | BDMA_CCR_MEM2MEM | BDMA_CCR_DBM    | \
                                  BDMA_CCR_CT));

    /* Prepare the DMA Channel configuration */
    registerValue |=  DMA_TO_BDMA_DIRECTION(hdma->Init.Direction)            |
 80056f0:	687b      	ldr	r3, [r7, #4]
 80056f2:	689b      	ldr	r3, [r3, #8]
 80056f4:	2b40      	cmp	r3, #64	@ 0x40
 80056f6:	d021      	beq.n	800573c <HAL_DMA_Init+0x450>
 80056f8:	687b      	ldr	r3, [r7, #4]
 80056fa:	689b      	ldr	r3, [r3, #8]
 80056fc:	2b80      	cmp	r3, #128	@ 0x80
 80056fe:	d102      	bne.n	8005706 <HAL_DMA_Init+0x41a>
 8005700:	f44f 4380 	mov.w	r3, #16384	@ 0x4000
 8005704:	e01b      	b.n	800573e <HAL_DMA_Init+0x452>
 8005706:	2300      	movs	r3, #0
 8005708:	e019      	b.n	800573e <HAL_DMA_Init+0x452>
 800570a:	bf00      	nop
 800570c:	fe10803f 	.word	0xfe10803f
 8005710:	5c001000 	.word	0x5c001000
 8005714:	ffff0000 	.word	0xffff0000
 8005718:	58025408 	.word	0x58025408
 800571c:	5802541c 	.word	0x5802541c
 8005720:	58025430 	.word	0x58025430
 8005724:	58025444 	.word	0x58025444
 8005728:	58025458 	.word	0x58025458
 800572c:	5802546c 	.word	0x5802546c
 8005730:	58025480 	.word	0x58025480
 8005734:	58025494 	.word	0x58025494
 8005738:	fffe000f 	.word	0xfffe000f
 800573c:	2310      	movs	r3, #16
                      DMA_TO_BDMA_PERIPHERAL_INC(hdma->Init.PeriphInc)       |
 800573e:	687a      	ldr	r2, [r7, #4]
 8005740:	68d2      	ldr	r2, [r2, #12]
 8005742:	08d2      	lsrs	r2, r2, #3
    registerValue |=  DMA_TO_BDMA_DIRECTION(hdma->Init.Direction)            |
 8005744:	431a      	orrs	r2, r3
                      DMA_TO_BDMA_MEMORY_INC(hdma->Init.MemInc)              |
 8005746:	687b      	ldr	r3, [r7, #4]
 8005748:	691b      	ldr	r3, [r3, #16]
 800574a:	08db      	lsrs	r3, r3, #3
                      DMA_TO_BDMA_PERIPHERAL_INC(hdma->Init.PeriphInc)       |
 800574c:	431a      	orrs	r2, r3
                      DMA_TO_BDMA_PDATA_SIZE(hdma->Init.PeriphDataAlignment) |
 800574e:	687b      	ldr	r3, [r7, #4]
 8005750:	695b      	ldr	r3, [r3, #20]
 8005752:	08db      	lsrs	r3, r3, #3
                      DMA_TO_BDMA_MEMORY_INC(hdma->Init.MemInc)              |
 8005754:	431a      	orrs	r2, r3
                      DMA_TO_BDMA_MDATA_SIZE(hdma->Init.MemDataAlignment)    |
 8005756:	687b      	ldr	r3, [r7, #4]
 8005758:	699b      	ldr	r3, [r3, #24]
 800575a:	08db      	lsrs	r3, r3, #3
                      DMA_TO_BDMA_PDATA_SIZE(hdma->Init.PeriphDataAlignment) |
 800575c:	431a      	orrs	r2, r3
                      DMA_TO_BDMA_MODE(hdma->Init.Mode)                      |
 800575e:	687b      	ldr	r3, [r7, #4]
 8005760:	69db      	ldr	r3, [r3, #28]
 8005762:	08db      	lsrs	r3, r3, #3
                      DMA_TO_BDMA_MDATA_SIZE(hdma->Init.MemDataAlignment)    |
 8005764:	431a      	orrs	r2, r3
                      DMA_TO_BDMA_PRIORITY(hdma->Init.Priority);
 8005766:	687b      	ldr	r3, [r7, #4]
 8005768:	6a1b      	ldr	r3, [r3, #32]
 800576a:	091b      	lsrs	r3, r3, #4
                      DMA_TO_BDMA_MODE(hdma->Init.Mode)                      |
 800576c:	4313      	orrs	r3, r2
    registerValue |=  DMA_TO_BDMA_DIRECTION(hdma->Init.Direction)            |
 800576e:	697a      	ldr	r2, [r7, #20]
 8005770:	4313      	orrs	r3, r2
 8005772:	617b      	str	r3, [r7, #20]

    /* Write to DMA Channel CR register */
    ((BDMA_Channel_TypeDef *)hdma->Instance)->CCR = registerValue;
 8005774:	687b      	ldr	r3, [r7, #4]
 8005776:	681b      	ldr	r3, [r3, #0]
 8005778:	697a      	ldr	r2, [r7, #20]
 800577a:	601a      	str	r2, [r3, #0]

    /* calculation of the channel index */
    hdma->StreamIndex = (((uint32_t)((uint32_t*)hdma->Instance) - (uint32_t)BDMA_Channel0) / ((uint32_t)BDMA_Channel1 - (uint32_t)BDMA_Channel0)) << 2U;
 800577c:	687b      	ldr	r3, [r7, #4]
 800577e:	681b      	ldr	r3, [r3, #0]
 8005780:	461a      	mov	r2, r3
 8005782:	4b6e      	ldr	r3, [pc, #440]	@ (800593c <HAL_DMA_Init+0x650>)
 8005784:	4413      	add	r3, r2
 8005786:	4a6e      	ldr	r2, [pc, #440]	@ (8005940 <HAL_DMA_Init+0x654>)
 8005788:	fba2 2303 	umull	r2, r3, r2, r3
 800578c:	091b      	lsrs	r3, r3, #4
 800578e:	009a      	lsls	r2, r3, #2
 8005790:	687b      	ldr	r3, [r7, #4]
 8005792:	65da      	str	r2, [r3, #92]	@ 0x5c

    /* Initialize StreamBaseAddress and StreamIndex parameters to be used to calculate
    DMA steam Base Address needed by HAL_DMA_IRQHandler() and HAL_DMA_PollForTransfer() */
    regs_bdma = (BDMA_Base_Registers *)DMA_CalcBaseAndBitshift(hdma);
 8005794:	6878      	ldr	r0, [r7, #4]
 8005796:	f001 fd93 	bl	80072c0 <DMA_CalcBaseAndBitshift>
 800579a:	4603      	mov	r3, r0
 800579c:	60fb      	str	r3, [r7, #12]

    /* Clear all interrupt flags */
    regs_bdma->IFCR = ((BDMA_IFCR_CGIF0) << (hdma->StreamIndex & 0x1FU));
 800579e:	687b      	ldr	r3, [r7, #4]
 80057a0:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 80057a2:	f003 031f 	and.w	r3, r3, #31
 80057a6:	2201      	movs	r2, #1
 80057a8:	409a      	lsls	r2, r3
 80057aa:	68fb      	ldr	r3, [r7, #12]
 80057ac:	605a      	str	r2, [r3, #4]
 80057ae:	e008      	b.n	80057c2 <HAL_DMA_Init+0x4d6>
  }
  else
  {
    hdma->ErrorCode = HAL_DMA_ERROR_PARAM;
 80057b0:	687b      	ldr	r3, [r7, #4]
 80057b2:	2240      	movs	r2, #64	@ 0x40
 80057b4:	655a      	str	r2, [r3, #84]	@ 0x54
    hdma->State     = HAL_DMA_STATE_ERROR;
 80057b6:	687b      	ldr	r3, [r7, #4]
 80057b8:	2203      	movs	r2, #3
 80057ba:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

    return HAL_ERROR;
 80057be:	2301      	movs	r3, #1
 80057c0:	e0b7      	b.n	8005932 <HAL_DMA_Init+0x646>
  }

  if(IS_DMA_DMAMUX_ALL_INSTANCE(hdma->Instance) != 0U) /* No DMAMUX available for BDMA1 */
 80057c2:	687b      	ldr	r3, [r7, #4]
 80057c4:	681b      	ldr	r3, [r3, #0]
 80057c6:	4a5f      	ldr	r2, [pc, #380]	@ (8005944 <HAL_DMA_Init+0x658>)
 80057c8:	4293      	cmp	r3, r2
 80057ca:	d072      	beq.n	80058b2 <HAL_DMA_Init+0x5c6>
 80057cc:	687b      	ldr	r3, [r7, #4]
 80057ce:	681b      	ldr	r3, [r3, #0]
 80057d0:	4a5d      	ldr	r2, [pc, #372]	@ (8005948 <HAL_DMA_Init+0x65c>)
 80057d2:	4293      	cmp	r3, r2
 80057d4:	d06d      	beq.n	80058b2 <HAL_DMA_Init+0x5c6>
 80057d6:	687b      	ldr	r3, [r7, #4]
 80057d8:	681b      	ldr	r3, [r3, #0]
 80057da:	4a5c      	ldr	r2, [pc, #368]	@ (800594c <HAL_DMA_Init+0x660>)
 80057dc:	4293      	cmp	r3, r2
 80057de:	d068      	beq.n	80058b2 <HAL_DMA_Init+0x5c6>
 80057e0:	687b      	ldr	r3, [r7, #4]
 80057e2:	681b      	ldr	r3, [r3, #0]
 80057e4:	4a5a      	ldr	r2, [pc, #360]	@ (8005950 <HAL_DMA_Init+0x664>)
 80057e6:	4293      	cmp	r3, r2
 80057e8:	d063      	beq.n	80058b2 <HAL_DMA_Init+0x5c6>
 80057ea:	687b      	ldr	r3, [r7, #4]
 80057ec:	681b      	ldr	r3, [r3, #0]
 80057ee:	4a59      	ldr	r2, [pc, #356]	@ (8005954 <HAL_DMA_Init+0x668>)
 80057f0:	4293      	cmp	r3, r2
 80057f2:	d05e      	beq.n	80058b2 <HAL_DMA_Init+0x5c6>
 80057f4:	687b      	ldr	r3, [r7, #4]
 80057f6:	681b      	ldr	r3, [r3, #0]
 80057f8:	4a57      	ldr	r2, [pc, #348]	@ (8005958 <HAL_DMA_Init+0x66c>)
 80057fa:	4293      	cmp	r3, r2
 80057fc:	d059      	beq.n	80058b2 <HAL_DMA_Init+0x5c6>
 80057fe:	687b      	ldr	r3, [r7, #4]
 8005800:	681b      	ldr	r3, [r3, #0]
 8005802:	4a56      	ldr	r2, [pc, #344]	@ (800595c <HAL_DMA_Init+0x670>)
 8005804:	4293      	cmp	r3, r2
 8005806:	d054      	beq.n	80058b2 <HAL_DMA_Init+0x5c6>
 8005808:	687b      	ldr	r3, [r7, #4]
 800580a:	681b      	ldr	r3, [r3, #0]
 800580c:	4a54      	ldr	r2, [pc, #336]	@ (8005960 <HAL_DMA_Init+0x674>)
 800580e:	4293      	cmp	r3, r2
 8005810:	d04f      	beq.n	80058b2 <HAL_DMA_Init+0x5c6>
 8005812:	687b      	ldr	r3, [r7, #4]
 8005814:	681b      	ldr	r3, [r3, #0]
 8005816:	4a53      	ldr	r2, [pc, #332]	@ (8005964 <HAL_DMA_Init+0x678>)
 8005818:	4293      	cmp	r3, r2
 800581a:	d04a      	beq.n	80058b2 <HAL_DMA_Init+0x5c6>
 800581c:	687b      	ldr	r3, [r7, #4]
 800581e:	681b      	ldr	r3, [r3, #0]
 8005820:	4a51      	ldr	r2, [pc, #324]	@ (8005968 <HAL_DMA_Init+0x67c>)
 8005822:	4293      	cmp	r3, r2
 8005824:	d045      	beq.n	80058b2 <HAL_DMA_Init+0x5c6>
 8005826:	687b      	ldr	r3, [r7, #4]
 8005828:	681b      	ldr	r3, [r3, #0]
 800582a:	4a50      	ldr	r2, [pc, #320]	@ (800596c <HAL_DMA_Init+0x680>)
 800582c:	4293      	cmp	r3, r2
 800582e:	d040      	beq.n	80058b2 <HAL_DMA_Init+0x5c6>
 8005830:	687b      	ldr	r3, [r7, #4]
 8005832:	681b      	ldr	r3, [r3, #0]
 8005834:	4a4e      	ldr	r2, [pc, #312]	@ (8005970 <HAL_DMA_Init+0x684>)
 8005836:	4293      	cmp	r3, r2
 8005838:	d03b      	beq.n	80058b2 <HAL_DMA_Init+0x5c6>
 800583a:	687b      	ldr	r3, [r7, #4]
 800583c:	681b      	ldr	r3, [r3, #0]
 800583e:	4a4d      	ldr	r2, [pc, #308]	@ (8005974 <HAL_DMA_Init+0x688>)
 8005840:	4293      	cmp	r3, r2
 8005842:	d036      	beq.n	80058b2 <HAL_DMA_Init+0x5c6>
 8005844:	687b      	ldr	r3, [r7, #4]
 8005846:	681b      	ldr	r3, [r3, #0]
 8005848:	4a4b      	ldr	r2, [pc, #300]	@ (8005978 <HAL_DMA_Init+0x68c>)
 800584a:	4293      	cmp	r3, r2
 800584c:	d031      	beq.n	80058b2 <HAL_DMA_Init+0x5c6>
 800584e:	687b      	ldr	r3, [r7, #4]
 8005850:	681b      	ldr	r3, [r3, #0]
 8005852:	4a4a      	ldr	r2, [pc, #296]	@ (800597c <HAL_DMA_Init+0x690>)
 8005854:	4293      	cmp	r3, r2
 8005856:	d02c      	beq.n	80058b2 <HAL_DMA_Init+0x5c6>
 8005858:	687b      	ldr	r3, [r7, #4]
 800585a:	681b      	ldr	r3, [r3, #0]
 800585c:	4a48      	ldr	r2, [pc, #288]	@ (8005980 <HAL_DMA_Init+0x694>)
 800585e:	4293      	cmp	r3, r2
 8005860:	d027      	beq.n	80058b2 <HAL_DMA_Init+0x5c6>
 8005862:	687b      	ldr	r3, [r7, #4]
 8005864:	681b      	ldr	r3, [r3, #0]
 8005866:	4a47      	ldr	r2, [pc, #284]	@ (8005984 <HAL_DMA_Init+0x698>)
 8005868:	4293      	cmp	r3, r2
 800586a:	d022      	beq.n	80058b2 <HAL_DMA_Init+0x5c6>
 800586c:	687b      	ldr	r3, [r7, #4]
 800586e:	681b      	ldr	r3, [r3, #0]
 8005870:	4a45      	ldr	r2, [pc, #276]	@ (8005988 <HAL_DMA_Init+0x69c>)
 8005872:	4293      	cmp	r3, r2
 8005874:	d01d      	beq.n	80058b2 <HAL_DMA_Init+0x5c6>
 8005876:	687b      	ldr	r3, [r7, #4]
 8005878:	681b      	ldr	r3, [r3, #0]
 800587a:	4a44      	ldr	r2, [pc, #272]	@ (800598c <HAL_DMA_Init+0x6a0>)
 800587c:	4293      	cmp	r3, r2
 800587e:	d018      	beq.n	80058b2 <HAL_DMA_Init+0x5c6>
 8005880:	687b      	ldr	r3, [r7, #4]
 8005882:	681b      	ldr	r3, [r3, #0]
 8005884:	4a42      	ldr	r2, [pc, #264]	@ (8005990 <HAL_DMA_Init+0x6a4>)
 8005886:	4293      	cmp	r3, r2
 8005888:	d013      	beq.n	80058b2 <HAL_DMA_Init+0x5c6>
 800588a:	687b      	ldr	r3, [r7, #4]
 800588c:	681b      	ldr	r3, [r3, #0]
 800588e:	4a41      	ldr	r2, [pc, #260]	@ (8005994 <HAL_DMA_Init+0x6a8>)
 8005890:	4293      	cmp	r3, r2
 8005892:	d00e      	beq.n	80058b2 <HAL_DMA_Init+0x5c6>
 8005894:	687b      	ldr	r3, [r7, #4]
 8005896:	681b      	ldr	r3, [r3, #0]
 8005898:	4a3f      	ldr	r2, [pc, #252]	@ (8005998 <HAL_DMA_Init+0x6ac>)
 800589a:	4293      	cmp	r3, r2
 800589c:	d009      	beq.n	80058b2 <HAL_DMA_Init+0x5c6>
 800589e:	687b      	ldr	r3, [r7, #4]
 80058a0:	681b      	ldr	r3, [r3, #0]
 80058a2:	4a3e      	ldr	r2, [pc, #248]	@ (800599c <HAL_DMA_Init+0x6b0>)
 80058a4:	4293      	cmp	r3, r2
 80058a6:	d004      	beq.n	80058b2 <HAL_DMA_Init+0x5c6>
 80058a8:	687b      	ldr	r3, [r7, #4]
 80058aa:	681b      	ldr	r3, [r3, #0]
 80058ac:	4a3c      	ldr	r2, [pc, #240]	@ (80059a0 <HAL_DMA_Init+0x6b4>)
 80058ae:	4293      	cmp	r3, r2
 80058b0:	d101      	bne.n	80058b6 <HAL_DMA_Init+0x5ca>
 80058b2:	2301      	movs	r3, #1
 80058b4:	e000      	b.n	80058b8 <HAL_DMA_Init+0x5cc>
 80058b6:	2300      	movs	r3, #0
 80058b8:	2b00      	cmp	r3, #0
 80058ba:	d032      	beq.n	8005922 <HAL_DMA_Init+0x636>
  {
    /* Initialize parameters for DMAMUX channel :
    DMAmuxChannel, DMAmuxChannelStatus and DMAmuxChannelStatusMask
    */
    DMA_CalcDMAMUXChannelBaseAndMask(hdma);
 80058bc:	6878      	ldr	r0, [r7, #4]
 80058be:	f001 fe2d 	bl	800751c <DMA_CalcDMAMUXChannelBaseAndMask>

    if(hdma->Init.Direction == DMA_MEMORY_TO_MEMORY)
 80058c2:	687b      	ldr	r3, [r7, #4]
 80058c4:	689b      	ldr	r3, [r3, #8]
 80058c6:	2b80      	cmp	r3, #128	@ 0x80
 80058c8:	d102      	bne.n	80058d0 <HAL_DMA_Init+0x5e4>
    {
      /* if memory to memory force the request to 0*/
      hdma->Init.Request = DMA_REQUEST_MEM2MEM;
 80058ca:	687b      	ldr	r3, [r7, #4]
 80058cc:	2200      	movs	r2, #0
 80058ce:	605a      	str	r2, [r3, #4]
    }

    /* Set peripheral request  to DMAMUX channel */
    hdma->DMAmuxChannel->CCR = (hdma->Init.Request & DMAMUX_CxCR_DMAREQ_ID);
 80058d0:	687b      	ldr	r3, [r7, #4]
 80058d2:	685a      	ldr	r2, [r3, #4]
 80058d4:	687b      	ldr	r3, [r7, #4]
 80058d6:	6e1b      	ldr	r3, [r3, #96]	@ 0x60
 80058d8:	b2d2      	uxtb	r2, r2
 80058da:	601a      	str	r2, [r3, #0]

    /* Clear the DMAMUX synchro overrun flag */
    hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask;
 80058dc:	687b      	ldr	r3, [r7, #4]
 80058de:	6e5b      	ldr	r3, [r3, #100]	@ 0x64
 80058e0:	687a      	ldr	r2, [r7, #4]
 80058e2:	6e92      	ldr	r2, [r2, #104]	@ 0x68
 80058e4:	605a      	str	r2, [r3, #4]

    /* Initialize parameters for DMAMUX request generator :
    if the DMA request is DMA_REQUEST_GENERATOR0 to DMA_REQUEST_GENERATOR7
    */
    if((hdma->Init.Request >= DMA_REQUEST_GENERATOR0) && (hdma->Init.Request <= DMA_REQUEST_GENERATOR7))
 80058e6:	687b      	ldr	r3, [r7, #4]
 80058e8:	685b      	ldr	r3, [r3, #4]
 80058ea:	2b00      	cmp	r3, #0
 80058ec:	d010      	beq.n	8005910 <HAL_DMA_Init+0x624>
 80058ee:	687b      	ldr	r3, [r7, #4]
 80058f0:	685b      	ldr	r3, [r3, #4]
 80058f2:	2b08      	cmp	r3, #8
 80058f4:	d80c      	bhi.n	8005910 <HAL_DMA_Init+0x624>
    {
      /* Initialize parameters for DMAMUX request generator :
      DMAmuxRequestGen, DMAmuxRequestGenStatus and DMAmuxRequestGenStatusMask */
      DMA_CalcDMAMUXRequestGenBaseAndMask(hdma);
 80058f6:	6878      	ldr	r0, [r7, #4]
 80058f8:	f001 feaa 	bl	8007650 <DMA_CalcDMAMUXRequestGenBaseAndMask>

      /* Reset the DMAMUX request generator register */
      hdma->DMAmuxRequestGen->RGCR = 0U;
 80058fc:	687b      	ldr	r3, [r7, #4]
 80058fe:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8005900:	2200      	movs	r2, #0
 8005902:	601a      	str	r2, [r3, #0]

      /* Clear the DMAMUX request generator overrun flag */
      hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask;
 8005904:	687b      	ldr	r3, [r7, #4]
 8005906:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 8005908:	687a      	ldr	r2, [r7, #4]
 800590a:	6f52      	ldr	r2, [r2, #116]	@ 0x74
 800590c:	605a      	str	r2, [r3, #4]
 800590e:	e008      	b.n	8005922 <HAL_DMA_Init+0x636>
    }
    else
    {
      hdma->DMAmuxRequestGen = 0U;
 8005910:	687b      	ldr	r3, [r7, #4]
 8005912:	2200      	movs	r2, #0
 8005914:	66da      	str	r2, [r3, #108]	@ 0x6c
      hdma->DMAmuxRequestGenStatus = 0U;
 8005916:	687b      	ldr	r3, [r7, #4]
 8005918:	2200      	movs	r2, #0
 800591a:	671a      	str	r2, [r3, #112]	@ 0x70
      hdma->DMAmuxRequestGenStatusMask = 0U;
 800591c:	687b      	ldr	r3, [r7, #4]
 800591e:	2200      	movs	r2, #0
 8005920:	675a      	str	r2, [r3, #116]	@ 0x74
    }
  }

  /* Initialize the error code */
  hdma->ErrorCode = HAL_DMA_ERROR_NONE;
 8005922:	687b      	ldr	r3, [r7, #4]
 8005924:	2200      	movs	r2, #0
 8005926:	655a      	str	r2, [r3, #84]	@ 0x54

  /* Initialize the DMA state */
  hdma->State = HAL_DMA_STATE_READY;
 8005928:	687b      	ldr	r3, [r7, #4]
 800592a:	2201      	movs	r2, #1
 800592c:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

  return HAL_OK;
 8005930:	2300      	movs	r3, #0
}
 8005932:	4618      	mov	r0, r3
 8005934:	3718      	adds	r7, #24
 8005936:	46bd      	mov	sp, r7
 8005938:	bd80      	pop	{r7, pc}
 800593a:	bf00      	nop
 800593c:	a7fdabf8 	.word	0xa7fdabf8
 8005940:	cccccccd 	.word	0xcccccccd
 8005944:	40020010 	.word	0x40020010
 8005948:	40020028 	.word	0x40020028
 800594c:	40020040 	.word	0x40020040
 8005950:	40020058 	.word	0x40020058
 8005954:	40020070 	.word	0x40020070
 8005958:	40020088 	.word	0x40020088
 800595c:	400200a0 	.word	0x400200a0
 8005960:	400200b8 	.word	0x400200b8
 8005964:	40020410 	.word	0x40020410
 8005968:	40020428 	.word	0x40020428
 800596c:	40020440 	.word	0x40020440
 8005970:	40020458 	.word	0x40020458
 8005974:	40020470 	.word	0x40020470
 8005978:	40020488 	.word	0x40020488
 800597c:	400204a0 	.word	0x400204a0
 8005980:	400204b8 	.word	0x400204b8
 8005984:	58025408 	.word	0x58025408
 8005988:	5802541c 	.word	0x5802541c
 800598c:	58025430 	.word	0x58025430
 8005990:	58025444 	.word	0x58025444
 8005994:	58025458 	.word	0x58025458
 8005998:	5802546c 	.word	0x5802546c
 800599c:	58025480 	.word	0x58025480
 80059a0:	58025494 	.word	0x58025494

080059a4 <HAL_DMA_Abort>:
  *        and the Stream will be effectively disabled only after the transfer of
  *        this single data is finished.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma)
{
 80059a4:	b580      	push	{r7, lr}
 80059a6:	b086      	sub	sp, #24
 80059a8:	af00      	add	r7, sp, #0
 80059aa:	6078      	str	r0, [r7, #4]
  /* calculate DMA base and stream number */
  DMA_Base_Registers *regs_dma;
  BDMA_Base_Registers *regs_bdma;
  const __IO uint32_t *enableRegister;

  uint32_t tickstart = HAL_GetTick();
 80059ac:	f7ff f8f0 	bl	8004b90 <HAL_GetTick>
 80059b0:	6138      	str	r0, [r7, #16]

 /* Check the DMA peripheral handle */
  if(hdma == NULL)
 80059b2:	687b      	ldr	r3, [r7, #4]
 80059b4:	2b00      	cmp	r3, #0
 80059b6:	d101      	bne.n	80059bc <HAL_DMA_Abort+0x18>
  {
    return HAL_ERROR;
 80059b8:	2301      	movs	r3, #1
 80059ba:	e2dc      	b.n	8005f76 <HAL_DMA_Abort+0x5d2>
  }

  /* Check the DMA peripheral state */
  if(hdma->State != HAL_DMA_STATE_BUSY)
 80059bc:	687b      	ldr	r3, [r7, #4]
 80059be:	f893 3035 	ldrb.w	r3, [r3, #53]	@ 0x35
 80059c2:	b2db      	uxtb	r3, r3
 80059c4:	2b02      	cmp	r3, #2
 80059c6:	d008      	beq.n	80059da <HAL_DMA_Abort+0x36>
  {
    hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
 80059c8:	687b      	ldr	r3, [r7, #4]
 80059ca:	2280      	movs	r2, #128	@ 0x80
 80059cc:	655a      	str	r2, [r3, #84]	@ 0x54

    /* Process Unlocked */
    __HAL_UNLOCK(hdma);
 80059ce:	687b      	ldr	r3, [r7, #4]
 80059d0:	2200      	movs	r2, #0
 80059d2:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34

    return HAL_ERROR;
 80059d6:	2301      	movs	r3, #1
 80059d8:	e2cd      	b.n	8005f76 <HAL_DMA_Abort+0x5d2>
  }
  else
  {
    /* Disable all the transfer interrupts */
    if(IS_DMA_STREAM_INSTANCE(hdma->Instance) != 0U) /* DMA1 or DMA2 instance */
 80059da:	687b      	ldr	r3, [r7, #4]
 80059dc:	681b      	ldr	r3, [r3, #0]
 80059de:	4a76      	ldr	r2, [pc, #472]	@ (8005bb8 <HAL_DMA_Abort+0x214>)
 80059e0:	4293      	cmp	r3, r2
 80059e2:	d04a      	beq.n	8005a7a <HAL_DMA_Abort+0xd6>
 80059e4:	687b      	ldr	r3, [r7, #4]
 80059e6:	681b      	ldr	r3, [r3, #0]
 80059e8:	4a74      	ldr	r2, [pc, #464]	@ (8005bbc <HAL_DMA_Abort+0x218>)
 80059ea:	4293      	cmp	r3, r2
 80059ec:	d045      	beq.n	8005a7a <HAL_DMA_Abort+0xd6>
 80059ee:	687b      	ldr	r3, [r7, #4]
 80059f0:	681b      	ldr	r3, [r3, #0]
 80059f2:	4a73      	ldr	r2, [pc, #460]	@ (8005bc0 <HAL_DMA_Abort+0x21c>)
 80059f4:	4293      	cmp	r3, r2
 80059f6:	d040      	beq.n	8005a7a <HAL_DMA_Abort+0xd6>
 80059f8:	687b      	ldr	r3, [r7, #4]
 80059fa:	681b      	ldr	r3, [r3, #0]
 80059fc:	4a71      	ldr	r2, [pc, #452]	@ (8005bc4 <HAL_DMA_Abort+0x220>)
 80059fe:	4293      	cmp	r3, r2
 8005a00:	d03b      	beq.n	8005a7a <HAL_DMA_Abort+0xd6>
 8005a02:	687b      	ldr	r3, [r7, #4]
 8005a04:	681b      	ldr	r3, [r3, #0]
 8005a06:	4a70      	ldr	r2, [pc, #448]	@ (8005bc8 <HAL_DMA_Abort+0x224>)
 8005a08:	4293      	cmp	r3, r2
 8005a0a:	d036      	beq.n	8005a7a <HAL_DMA_Abort+0xd6>
 8005a0c:	687b      	ldr	r3, [r7, #4]
 8005a0e:	681b      	ldr	r3, [r3, #0]
 8005a10:	4a6e      	ldr	r2, [pc, #440]	@ (8005bcc <HAL_DMA_Abort+0x228>)
 8005a12:	4293      	cmp	r3, r2
 8005a14:	d031      	beq.n	8005a7a <HAL_DMA_Abort+0xd6>
 8005a16:	687b      	ldr	r3, [r7, #4]
 8005a18:	681b      	ldr	r3, [r3, #0]
 8005a1a:	4a6d      	ldr	r2, [pc, #436]	@ (8005bd0 <HAL_DMA_Abort+0x22c>)
 8005a1c:	4293      	cmp	r3, r2
 8005a1e:	d02c      	beq.n	8005a7a <HAL_DMA_Abort+0xd6>
 8005a20:	687b      	ldr	r3, [r7, #4]
 8005a22:	681b      	ldr	r3, [r3, #0]
 8005a24:	4a6b      	ldr	r2, [pc, #428]	@ (8005bd4 <HAL_DMA_Abort+0x230>)
 8005a26:	4293      	cmp	r3, r2
 8005a28:	d027      	beq.n	8005a7a <HAL_DMA_Abort+0xd6>
 8005a2a:	687b      	ldr	r3, [r7, #4]
 8005a2c:	681b      	ldr	r3, [r3, #0]
 8005a2e:	4a6a      	ldr	r2, [pc, #424]	@ (8005bd8 <HAL_DMA_Abort+0x234>)
 8005a30:	4293      	cmp	r3, r2
 8005a32:	d022      	beq.n	8005a7a <HAL_DMA_Abort+0xd6>
 8005a34:	687b      	ldr	r3, [r7, #4]
 8005a36:	681b      	ldr	r3, [r3, #0]
 8005a38:	4a68      	ldr	r2, [pc, #416]	@ (8005bdc <HAL_DMA_Abort+0x238>)
 8005a3a:	4293      	cmp	r3, r2
 8005a3c:	d01d      	beq.n	8005a7a <HAL_DMA_Abort+0xd6>
 8005a3e:	687b      	ldr	r3, [r7, #4]
 8005a40:	681b      	ldr	r3, [r3, #0]
 8005a42:	4a67      	ldr	r2, [pc, #412]	@ (8005be0 <HAL_DMA_Abort+0x23c>)
 8005a44:	4293      	cmp	r3, r2
 8005a46:	d018      	beq.n	8005a7a <HAL_DMA_Abort+0xd6>
 8005a48:	687b      	ldr	r3, [r7, #4]
 8005a4a:	681b      	ldr	r3, [r3, #0]
 8005a4c:	4a65      	ldr	r2, [pc, #404]	@ (8005be4 <HAL_DMA_Abort+0x240>)
 8005a4e:	4293      	cmp	r3, r2
 8005a50:	d013      	beq.n	8005a7a <HAL_DMA_Abort+0xd6>
 8005a52:	687b      	ldr	r3, [r7, #4]
 8005a54:	681b      	ldr	r3, [r3, #0]
 8005a56:	4a64      	ldr	r2, [pc, #400]	@ (8005be8 <HAL_DMA_Abort+0x244>)
 8005a58:	4293      	cmp	r3, r2
 8005a5a:	d00e      	beq.n	8005a7a <HAL_DMA_Abort+0xd6>
 8005a5c:	687b      	ldr	r3, [r7, #4]
 8005a5e:	681b      	ldr	r3, [r3, #0]
 8005a60:	4a62      	ldr	r2, [pc, #392]	@ (8005bec <HAL_DMA_Abort+0x248>)
 8005a62:	4293      	cmp	r3, r2
 8005a64:	d009      	beq.n	8005a7a <HAL_DMA_Abort+0xd6>
 8005a66:	687b      	ldr	r3, [r7, #4]
 8005a68:	681b      	ldr	r3, [r3, #0]
 8005a6a:	4a61      	ldr	r2, [pc, #388]	@ (8005bf0 <HAL_DMA_Abort+0x24c>)
 8005a6c:	4293      	cmp	r3, r2
 8005a6e:	d004      	beq.n	8005a7a <HAL_DMA_Abort+0xd6>
 8005a70:	687b      	ldr	r3, [r7, #4]
 8005a72:	681b      	ldr	r3, [r3, #0]
 8005a74:	4a5f      	ldr	r2, [pc, #380]	@ (8005bf4 <HAL_DMA_Abort+0x250>)
 8005a76:	4293      	cmp	r3, r2
 8005a78:	d101      	bne.n	8005a7e <HAL_DMA_Abort+0xda>
 8005a7a:	2301      	movs	r3, #1
 8005a7c:	e000      	b.n	8005a80 <HAL_DMA_Abort+0xdc>
 8005a7e:	2300      	movs	r3, #0
 8005a80:	2b00      	cmp	r3, #0
 8005a82:	d013      	beq.n	8005aac <HAL_DMA_Abort+0x108>
    {
       /* Disable DMA All Interrupts  */
      ((DMA_Stream_TypeDef   *)hdma->Instance)->CR  &= ~(DMA_IT_TC | DMA_IT_TE | DMA_IT_DME | DMA_IT_HT);
 8005a84:	687b      	ldr	r3, [r7, #4]
 8005a86:	681b      	ldr	r3, [r3, #0]
 8005a88:	681a      	ldr	r2, [r3, #0]
 8005a8a:	687b      	ldr	r3, [r7, #4]
 8005a8c:	681b      	ldr	r3, [r3, #0]
 8005a8e:	f022 021e 	bic.w	r2, r2, #30
 8005a92:	601a      	str	r2, [r3, #0]
      ((DMA_Stream_TypeDef   *)hdma->Instance)->FCR &= ~(DMA_IT_FE);
 8005a94:	687b      	ldr	r3, [r7, #4]
 8005a96:	681b      	ldr	r3, [r3, #0]
 8005a98:	695a      	ldr	r2, [r3, #20]
 8005a9a:	687b      	ldr	r3, [r7, #4]
 8005a9c:	681b      	ldr	r3, [r3, #0]
 8005a9e:	f022 0280 	bic.w	r2, r2, #128	@ 0x80
 8005aa2:	615a      	str	r2, [r3, #20]

      enableRegister = (__IO uint32_t *)(&(((DMA_Stream_TypeDef   *)hdma->Instance)->CR));
 8005aa4:	687b      	ldr	r3, [r7, #4]
 8005aa6:	681b      	ldr	r3, [r3, #0]
 8005aa8:	617b      	str	r3, [r7, #20]
 8005aaa:	e00a      	b.n	8005ac2 <HAL_DMA_Abort+0x11e>
    }
    else /* BDMA channel */
    {
      /* Disable DMA All Interrupts */
      ((BDMA_Channel_TypeDef   *)hdma->Instance)->CCR  &= ~(BDMA_CCR_TCIE | BDMA_CCR_HTIE | BDMA_CCR_TEIE);
 8005aac:	687b      	ldr	r3, [r7, #4]
 8005aae:	681b      	ldr	r3, [r3, #0]
 8005ab0:	681a      	ldr	r2, [r3, #0]
 8005ab2:	687b      	ldr	r3, [r7, #4]
 8005ab4:	681b      	ldr	r3, [r3, #0]
 8005ab6:	f022 020e 	bic.w	r2, r2, #14
 8005aba:	601a      	str	r2, [r3, #0]

      enableRegister = (__IO uint32_t *)(&(((BDMA_Channel_TypeDef   *)hdma->Instance)->CCR));
 8005abc:	687b      	ldr	r3, [r7, #4]
 8005abe:	681b      	ldr	r3, [r3, #0]
 8005ac0:	617b      	str	r3, [r7, #20]
    }

    if(IS_DMA_DMAMUX_ALL_INSTANCE(hdma->Instance) != 0U) /* No DMAMUX available for BDMA1 */
 8005ac2:	687b      	ldr	r3, [r7, #4]
 8005ac4:	681b      	ldr	r3, [r3, #0]
 8005ac6:	4a3c      	ldr	r2, [pc, #240]	@ (8005bb8 <HAL_DMA_Abort+0x214>)
 8005ac8:	4293      	cmp	r3, r2
 8005aca:	d072      	beq.n	8005bb2 <HAL_DMA_Abort+0x20e>
 8005acc:	687b      	ldr	r3, [r7, #4]
 8005ace:	681b      	ldr	r3, [r3, #0]
 8005ad0:	4a3a      	ldr	r2, [pc, #232]	@ (8005bbc <HAL_DMA_Abort+0x218>)
 8005ad2:	4293      	cmp	r3, r2
 8005ad4:	d06d      	beq.n	8005bb2 <HAL_DMA_Abort+0x20e>
 8005ad6:	687b      	ldr	r3, [r7, #4]
 8005ad8:	681b      	ldr	r3, [r3, #0]
 8005ada:	4a39      	ldr	r2, [pc, #228]	@ (8005bc0 <HAL_DMA_Abort+0x21c>)
 8005adc:	4293      	cmp	r3, r2
 8005ade:	d068      	beq.n	8005bb2 <HAL_DMA_Abort+0x20e>
 8005ae0:	687b      	ldr	r3, [r7, #4]
 8005ae2:	681b      	ldr	r3, [r3, #0]
 8005ae4:	4a37      	ldr	r2, [pc, #220]	@ (8005bc4 <HAL_DMA_Abort+0x220>)
 8005ae6:	4293      	cmp	r3, r2
 8005ae8:	d063      	beq.n	8005bb2 <HAL_DMA_Abort+0x20e>
 8005aea:	687b      	ldr	r3, [r7, #4]
 8005aec:	681b      	ldr	r3, [r3, #0]
 8005aee:	4a36      	ldr	r2, [pc, #216]	@ (8005bc8 <HAL_DMA_Abort+0x224>)
 8005af0:	4293      	cmp	r3, r2
 8005af2:	d05e      	beq.n	8005bb2 <HAL_DMA_Abort+0x20e>
 8005af4:	687b      	ldr	r3, [r7, #4]
 8005af6:	681b      	ldr	r3, [r3, #0]
 8005af8:	4a34      	ldr	r2, [pc, #208]	@ (8005bcc <HAL_DMA_Abort+0x228>)
 8005afa:	4293      	cmp	r3, r2
 8005afc:	d059      	beq.n	8005bb2 <HAL_DMA_Abort+0x20e>
 8005afe:	687b      	ldr	r3, [r7, #4]
 8005b00:	681b      	ldr	r3, [r3, #0]
 8005b02:	4a33      	ldr	r2, [pc, #204]	@ (8005bd0 <HAL_DMA_Abort+0x22c>)
 8005b04:	4293      	cmp	r3, r2
 8005b06:	d054      	beq.n	8005bb2 <HAL_DMA_Abort+0x20e>
 8005b08:	687b      	ldr	r3, [r7, #4]
 8005b0a:	681b      	ldr	r3, [r3, #0]
 8005b0c:	4a31      	ldr	r2, [pc, #196]	@ (8005bd4 <HAL_DMA_Abort+0x230>)
 8005b0e:	4293      	cmp	r3, r2
 8005b10:	d04f      	beq.n	8005bb2 <HAL_DMA_Abort+0x20e>
 8005b12:	687b      	ldr	r3, [r7, #4]
 8005b14:	681b      	ldr	r3, [r3, #0]
 8005b16:	4a30      	ldr	r2, [pc, #192]	@ (8005bd8 <HAL_DMA_Abort+0x234>)
 8005b18:	4293      	cmp	r3, r2
 8005b1a:	d04a      	beq.n	8005bb2 <HAL_DMA_Abort+0x20e>
 8005b1c:	687b      	ldr	r3, [r7, #4]
 8005b1e:	681b      	ldr	r3, [r3, #0]
 8005b20:	4a2e      	ldr	r2, [pc, #184]	@ (8005bdc <HAL_DMA_Abort+0x238>)
 8005b22:	4293      	cmp	r3, r2
 8005b24:	d045      	beq.n	8005bb2 <HAL_DMA_Abort+0x20e>
 8005b26:	687b      	ldr	r3, [r7, #4]
 8005b28:	681b      	ldr	r3, [r3, #0]
 8005b2a:	4a2d      	ldr	r2, [pc, #180]	@ (8005be0 <HAL_DMA_Abort+0x23c>)
 8005b2c:	4293      	cmp	r3, r2
 8005b2e:	d040      	beq.n	8005bb2 <HAL_DMA_Abort+0x20e>
 8005b30:	687b      	ldr	r3, [r7, #4]
 8005b32:	681b      	ldr	r3, [r3, #0]
 8005b34:	4a2b      	ldr	r2, [pc, #172]	@ (8005be4 <HAL_DMA_Abort+0x240>)
 8005b36:	4293      	cmp	r3, r2
 8005b38:	d03b      	beq.n	8005bb2 <HAL_DMA_Abort+0x20e>
 8005b3a:	687b      	ldr	r3, [r7, #4]
 8005b3c:	681b      	ldr	r3, [r3, #0]
 8005b3e:	4a2a      	ldr	r2, [pc, #168]	@ (8005be8 <HAL_DMA_Abort+0x244>)
 8005b40:	4293      	cmp	r3, r2
 8005b42:	d036      	beq.n	8005bb2 <HAL_DMA_Abort+0x20e>
 8005b44:	687b      	ldr	r3, [r7, #4]
 8005b46:	681b      	ldr	r3, [r3, #0]
 8005b48:	4a28      	ldr	r2, [pc, #160]	@ (8005bec <HAL_DMA_Abort+0x248>)
 8005b4a:	4293      	cmp	r3, r2
 8005b4c:	d031      	beq.n	8005bb2 <HAL_DMA_Abort+0x20e>
 8005b4e:	687b      	ldr	r3, [r7, #4]
 8005b50:	681b      	ldr	r3, [r3, #0]
 8005b52:	4a27      	ldr	r2, [pc, #156]	@ (8005bf0 <HAL_DMA_Abort+0x24c>)
 8005b54:	4293      	cmp	r3, r2
 8005b56:	d02c      	beq.n	8005bb2 <HAL_DMA_Abort+0x20e>
 8005b58:	687b      	ldr	r3, [r7, #4]
 8005b5a:	681b      	ldr	r3, [r3, #0]
 8005b5c:	4a25      	ldr	r2, [pc, #148]	@ (8005bf4 <HAL_DMA_Abort+0x250>)
 8005b5e:	4293      	cmp	r3, r2
 8005b60:	d027      	beq.n	8005bb2 <HAL_DMA_Abort+0x20e>
 8005b62:	687b      	ldr	r3, [r7, #4]
 8005b64:	681b      	ldr	r3, [r3, #0]
 8005b66:	4a24      	ldr	r2, [pc, #144]	@ (8005bf8 <HAL_DMA_Abort+0x254>)
 8005b68:	4293      	cmp	r3, r2
 8005b6a:	d022      	beq.n	8005bb2 <HAL_DMA_Abort+0x20e>
 8005b6c:	687b      	ldr	r3, [r7, #4]
 8005b6e:	681b      	ldr	r3, [r3, #0]
 8005b70:	4a22      	ldr	r2, [pc, #136]	@ (8005bfc <HAL_DMA_Abort+0x258>)
 8005b72:	4293      	cmp	r3, r2
 8005b74:	d01d      	beq.n	8005bb2 <HAL_DMA_Abort+0x20e>
 8005b76:	687b      	ldr	r3, [r7, #4]
 8005b78:	681b      	ldr	r3, [r3, #0]
 8005b7a:	4a21      	ldr	r2, [pc, #132]	@ (8005c00 <HAL_DMA_Abort+0x25c>)
 8005b7c:	4293      	cmp	r3, r2
 8005b7e:	d018      	beq.n	8005bb2 <HAL_DMA_Abort+0x20e>
 8005b80:	687b      	ldr	r3, [r7, #4]
 8005b82:	681b      	ldr	r3, [r3, #0]
 8005b84:	4a1f      	ldr	r2, [pc, #124]	@ (8005c04 <HAL_DMA_Abort+0x260>)
 8005b86:	4293      	cmp	r3, r2
 8005b88:	d013      	beq.n	8005bb2 <HAL_DMA_Abort+0x20e>
 8005b8a:	687b      	ldr	r3, [r7, #4]
 8005b8c:	681b      	ldr	r3, [r3, #0]
 8005b8e:	4a1e      	ldr	r2, [pc, #120]	@ (8005c08 <HAL_DMA_Abort+0x264>)
 8005b90:	4293      	cmp	r3, r2
 8005b92:	d00e      	beq.n	8005bb2 <HAL_DMA_Abort+0x20e>
 8005b94:	687b      	ldr	r3, [r7, #4]
 8005b96:	681b      	ldr	r3, [r3, #0]
 8005b98:	4a1c      	ldr	r2, [pc, #112]	@ (8005c0c <HAL_DMA_Abort+0x268>)
 8005b9a:	4293      	cmp	r3, r2
 8005b9c:	d009      	beq.n	8005bb2 <HAL_DMA_Abort+0x20e>
 8005b9e:	687b      	ldr	r3, [r7, #4]
 8005ba0:	681b      	ldr	r3, [r3, #0]
 8005ba2:	4a1b      	ldr	r2, [pc, #108]	@ (8005c10 <HAL_DMA_Abort+0x26c>)
 8005ba4:	4293      	cmp	r3, r2
 8005ba6:	d004      	beq.n	8005bb2 <HAL_DMA_Abort+0x20e>
 8005ba8:	687b      	ldr	r3, [r7, #4]
 8005baa:	681b      	ldr	r3, [r3, #0]
 8005bac:	4a19      	ldr	r2, [pc, #100]	@ (8005c14 <HAL_DMA_Abort+0x270>)
 8005bae:	4293      	cmp	r3, r2
 8005bb0:	d132      	bne.n	8005c18 <HAL_DMA_Abort+0x274>
 8005bb2:	2301      	movs	r3, #1
 8005bb4:	e031      	b.n	8005c1a <HAL_DMA_Abort+0x276>
 8005bb6:	bf00      	nop
 8005bb8:	40020010 	.word	0x40020010
 8005bbc:	40020028 	.word	0x40020028
 8005bc0:	40020040 	.word	0x40020040
 8005bc4:	40020058 	.word	0x40020058
 8005bc8:	40020070 	.word	0x40020070
 8005bcc:	40020088 	.word	0x40020088
 8005bd0:	400200a0 	.word	0x400200a0
 8005bd4:	400200b8 	.word	0x400200b8
 8005bd8:	40020410 	.word	0x40020410
 8005bdc:	40020428 	.word	0x40020428
 8005be0:	40020440 	.word	0x40020440
 8005be4:	40020458 	.word	0x40020458
 8005be8:	40020470 	.word	0x40020470
 8005bec:	40020488 	.word	0x40020488
 8005bf0:	400204a0 	.word	0x400204a0
 8005bf4:	400204b8 	.word	0x400204b8
 8005bf8:	58025408 	.word	0x58025408
 8005bfc:	5802541c 	.word	0x5802541c
 8005c00:	58025430 	.word	0x58025430
 8005c04:	58025444 	.word	0x58025444
 8005c08:	58025458 	.word	0x58025458
 8005c0c:	5802546c 	.word	0x5802546c
 8005c10:	58025480 	.word	0x58025480
 8005c14:	58025494 	.word	0x58025494
 8005c18:	2300      	movs	r3, #0
 8005c1a:	2b00      	cmp	r3, #0
 8005c1c:	d007      	beq.n	8005c2e <HAL_DMA_Abort+0x28a>
    {
      /* disable the DMAMUX sync overrun IT */
      hdma->DMAmuxChannel->CCR &= ~DMAMUX_CxCR_SOIE;
 8005c1e:	687b      	ldr	r3, [r7, #4]
 8005c20:	6e1b      	ldr	r3, [r3, #96]	@ 0x60
 8005c22:	681a      	ldr	r2, [r3, #0]
 8005c24:	687b      	ldr	r3, [r7, #4]
 8005c26:	6e1b      	ldr	r3, [r3, #96]	@ 0x60
 8005c28:	f422 7280 	bic.w	r2, r2, #256	@ 0x100
 8005c2c:	601a      	str	r2, [r3, #0]
    }

    /* Disable the stream */
    __HAL_DMA_DISABLE(hdma);
 8005c2e:	687b      	ldr	r3, [r7, #4]
 8005c30:	681b      	ldr	r3, [r3, #0]
 8005c32:	4a6d      	ldr	r2, [pc, #436]	@ (8005de8 <HAL_DMA_Abort+0x444>)
 8005c34:	4293      	cmp	r3, r2
 8005c36:	d04a      	beq.n	8005cce <HAL_DMA_Abort+0x32a>
 8005c38:	687b      	ldr	r3, [r7, #4]
 8005c3a:	681b      	ldr	r3, [r3, #0]
 8005c3c:	4a6b      	ldr	r2, [pc, #428]	@ (8005dec <HAL_DMA_Abort+0x448>)
 8005c3e:	4293      	cmp	r3, r2
 8005c40:	d045      	beq.n	8005cce <HAL_DMA_Abort+0x32a>
 8005c42:	687b      	ldr	r3, [r7, #4]
 8005c44:	681b      	ldr	r3, [r3, #0]
 8005c46:	4a6a      	ldr	r2, [pc, #424]	@ (8005df0 <HAL_DMA_Abort+0x44c>)
 8005c48:	4293      	cmp	r3, r2
 8005c4a:	d040      	beq.n	8005cce <HAL_DMA_Abort+0x32a>
 8005c4c:	687b      	ldr	r3, [r7, #4]
 8005c4e:	681b      	ldr	r3, [r3, #0]
 8005c50:	4a68      	ldr	r2, [pc, #416]	@ (8005df4 <HAL_DMA_Abort+0x450>)
 8005c52:	4293      	cmp	r3, r2
 8005c54:	d03b      	beq.n	8005cce <HAL_DMA_Abort+0x32a>
 8005c56:	687b      	ldr	r3, [r7, #4]
 8005c58:	681b      	ldr	r3, [r3, #0]
 8005c5a:	4a67      	ldr	r2, [pc, #412]	@ (8005df8 <HAL_DMA_Abort+0x454>)
 8005c5c:	4293      	cmp	r3, r2
 8005c5e:	d036      	beq.n	8005cce <HAL_DMA_Abort+0x32a>
 8005c60:	687b      	ldr	r3, [r7, #4]
 8005c62:	681b      	ldr	r3, [r3, #0]
 8005c64:	4a65      	ldr	r2, [pc, #404]	@ (8005dfc <HAL_DMA_Abort+0x458>)
 8005c66:	4293      	cmp	r3, r2
 8005c68:	d031      	beq.n	8005cce <HAL_DMA_Abort+0x32a>
 8005c6a:	687b      	ldr	r3, [r7, #4]
 8005c6c:	681b      	ldr	r3, [r3, #0]
 8005c6e:	4a64      	ldr	r2, [pc, #400]	@ (8005e00 <HAL_DMA_Abort+0x45c>)
 8005c70:	4293      	cmp	r3, r2
 8005c72:	d02c      	beq.n	8005cce <HAL_DMA_Abort+0x32a>
 8005c74:	687b      	ldr	r3, [r7, #4]
 8005c76:	681b      	ldr	r3, [r3, #0]
 8005c78:	4a62      	ldr	r2, [pc, #392]	@ (8005e04 <HAL_DMA_Abort+0x460>)
 8005c7a:	4293      	cmp	r3, r2
 8005c7c:	d027      	beq.n	8005cce <HAL_DMA_Abort+0x32a>
 8005c7e:	687b      	ldr	r3, [r7, #4]
 8005c80:	681b      	ldr	r3, [r3, #0]
 8005c82:	4a61      	ldr	r2, [pc, #388]	@ (8005e08 <HAL_DMA_Abort+0x464>)
 8005c84:	4293      	cmp	r3, r2
 8005c86:	d022      	beq.n	8005cce <HAL_DMA_Abort+0x32a>
 8005c88:	687b      	ldr	r3, [r7, #4]
 8005c8a:	681b      	ldr	r3, [r3, #0]
 8005c8c:	4a5f      	ldr	r2, [pc, #380]	@ (8005e0c <HAL_DMA_Abort+0x468>)
 8005c8e:	4293      	cmp	r3, r2
 8005c90:	d01d      	beq.n	8005cce <HAL_DMA_Abort+0x32a>
 8005c92:	687b      	ldr	r3, [r7, #4]
 8005c94:	681b      	ldr	r3, [r3, #0]
 8005c96:	4a5e      	ldr	r2, [pc, #376]	@ (8005e10 <HAL_DMA_Abort+0x46c>)
 8005c98:	4293      	cmp	r3, r2
 8005c9a:	d018      	beq.n	8005cce <HAL_DMA_Abort+0x32a>
 8005c9c:	687b      	ldr	r3, [r7, #4]
 8005c9e:	681b      	ldr	r3, [r3, #0]
 8005ca0:	4a5c      	ldr	r2, [pc, #368]	@ (8005e14 <HAL_DMA_Abort+0x470>)
 8005ca2:	4293      	cmp	r3, r2
 8005ca4:	d013      	beq.n	8005cce <HAL_DMA_Abort+0x32a>
 8005ca6:	687b      	ldr	r3, [r7, #4]
 8005ca8:	681b      	ldr	r3, [r3, #0]
 8005caa:	4a5b      	ldr	r2, [pc, #364]	@ (8005e18 <HAL_DMA_Abort+0x474>)
 8005cac:	4293      	cmp	r3, r2
 8005cae:	d00e      	beq.n	8005cce <HAL_DMA_Abort+0x32a>
 8005cb0:	687b      	ldr	r3, [r7, #4]
 8005cb2:	681b      	ldr	r3, [r3, #0]
 8005cb4:	4a59      	ldr	r2, [pc, #356]	@ (8005e1c <HAL_DMA_Abort+0x478>)
 8005cb6:	4293      	cmp	r3, r2
 8005cb8:	d009      	beq.n	8005cce <HAL_DMA_Abort+0x32a>
 8005cba:	687b      	ldr	r3, [r7, #4]
 8005cbc:	681b      	ldr	r3, [r3, #0]
 8005cbe:	4a58      	ldr	r2, [pc, #352]	@ (8005e20 <HAL_DMA_Abort+0x47c>)
 8005cc0:	4293      	cmp	r3, r2
 8005cc2:	d004      	beq.n	8005cce <HAL_DMA_Abort+0x32a>
 8005cc4:	687b      	ldr	r3, [r7, #4]
 8005cc6:	681b      	ldr	r3, [r3, #0]
 8005cc8:	4a56      	ldr	r2, [pc, #344]	@ (8005e24 <HAL_DMA_Abort+0x480>)
 8005cca:	4293      	cmp	r3, r2
 8005ccc:	d108      	bne.n	8005ce0 <HAL_DMA_Abort+0x33c>
 8005cce:	687b      	ldr	r3, [r7, #4]
 8005cd0:	681b      	ldr	r3, [r3, #0]
 8005cd2:	681a      	ldr	r2, [r3, #0]
 8005cd4:	687b      	ldr	r3, [r7, #4]
 8005cd6:	681b      	ldr	r3, [r3, #0]
 8005cd8:	f022 0201 	bic.w	r2, r2, #1
 8005cdc:	601a      	str	r2, [r3, #0]
 8005cde:	e007      	b.n	8005cf0 <HAL_DMA_Abort+0x34c>
 8005ce0:	687b      	ldr	r3, [r7, #4]
 8005ce2:	681b      	ldr	r3, [r3, #0]
 8005ce4:	681a      	ldr	r2, [r3, #0]
 8005ce6:	687b      	ldr	r3, [r7, #4]
 8005ce8:	681b      	ldr	r3, [r3, #0]
 8005cea:	f022 0201 	bic.w	r2, r2, #1
 8005cee:	601a      	str	r2, [r3, #0]

    /* Check if the DMA Stream is effectively disabled */
    while(((*enableRegister) & DMA_SxCR_EN) != 0U)
 8005cf0:	e013      	b.n	8005d1a <HAL_DMA_Abort+0x376>
    {
      /* Check for the Timeout */
      if((HAL_GetTick() - tickstart ) > HAL_TIMEOUT_DMA_ABORT)
 8005cf2:	f7fe ff4d 	bl	8004b90 <HAL_GetTick>
 8005cf6:	4602      	mov	r2, r0
 8005cf8:	693b      	ldr	r3, [r7, #16]
 8005cfa:	1ad3      	subs	r3, r2, r3
 8005cfc:	2b05      	cmp	r3, #5
 8005cfe:	d90c      	bls.n	8005d1a <HAL_DMA_Abort+0x376>
      {
        /* Update error code */
        hdma->ErrorCode = HAL_DMA_ERROR_TIMEOUT;
 8005d00:	687b      	ldr	r3, [r7, #4]
 8005d02:	2220      	movs	r2, #32
 8005d04:	655a      	str	r2, [r3, #84]	@ 0x54

        /* Change the DMA state */
        hdma->State = HAL_DMA_STATE_ERROR;
 8005d06:	687b      	ldr	r3, [r7, #4]
 8005d08:	2203      	movs	r2, #3
 8005d0a:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

        /* Process Unlocked */
        __HAL_UNLOCK(hdma);
 8005d0e:	687b      	ldr	r3, [r7, #4]
 8005d10:	2200      	movs	r2, #0
 8005d12:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34

        return HAL_ERROR;
 8005d16:	2301      	movs	r3, #1
 8005d18:	e12d      	b.n	8005f76 <HAL_DMA_Abort+0x5d2>
    while(((*enableRegister) & DMA_SxCR_EN) != 0U)
 8005d1a:	697b      	ldr	r3, [r7, #20]
 8005d1c:	681b      	ldr	r3, [r3, #0]
 8005d1e:	f003 0301 	and.w	r3, r3, #1
 8005d22:	2b00      	cmp	r3, #0
 8005d24:	d1e5      	bne.n	8005cf2 <HAL_DMA_Abort+0x34e>
      }
    }

    /* Clear all interrupt flags at correct offset within the register */
    if(IS_DMA_STREAM_INSTANCE(hdma->Instance) != 0U) /* DMA1 or DMA2 instance */
 8005d26:	687b      	ldr	r3, [r7, #4]
 8005d28:	681b      	ldr	r3, [r3, #0]
 8005d2a:	4a2f      	ldr	r2, [pc, #188]	@ (8005de8 <HAL_DMA_Abort+0x444>)
 8005d2c:	4293      	cmp	r3, r2
 8005d2e:	d04a      	beq.n	8005dc6 <HAL_DMA_Abort+0x422>
 8005d30:	687b      	ldr	r3, [r7, #4]
 8005d32:	681b      	ldr	r3, [r3, #0]
 8005d34:	4a2d      	ldr	r2, [pc, #180]	@ (8005dec <HAL_DMA_Abort+0x448>)
 8005d36:	4293      	cmp	r3, r2
 8005d38:	d045      	beq.n	8005dc6 <HAL_DMA_Abort+0x422>
 8005d3a:	687b      	ldr	r3, [r7, #4]
 8005d3c:	681b      	ldr	r3, [r3, #0]
 8005d3e:	4a2c      	ldr	r2, [pc, #176]	@ (8005df0 <HAL_DMA_Abort+0x44c>)
 8005d40:	4293      	cmp	r3, r2
 8005d42:	d040      	beq.n	8005dc6 <HAL_DMA_Abort+0x422>
 8005d44:	687b      	ldr	r3, [r7, #4]
 8005d46:	681b      	ldr	r3, [r3, #0]
 8005d48:	4a2a      	ldr	r2, [pc, #168]	@ (8005df4 <HAL_DMA_Abort+0x450>)
 8005d4a:	4293      	cmp	r3, r2
 8005d4c:	d03b      	beq.n	8005dc6 <HAL_DMA_Abort+0x422>
 8005d4e:	687b      	ldr	r3, [r7, #4]
 8005d50:	681b      	ldr	r3, [r3, #0]
 8005d52:	4a29      	ldr	r2, [pc, #164]	@ (8005df8 <HAL_DMA_Abort+0x454>)
 8005d54:	4293      	cmp	r3, r2
 8005d56:	d036      	beq.n	8005dc6 <HAL_DMA_Abort+0x422>
 8005d58:	687b      	ldr	r3, [r7, #4]
 8005d5a:	681b      	ldr	r3, [r3, #0]
 8005d5c:	4a27      	ldr	r2, [pc, #156]	@ (8005dfc <HAL_DMA_Abort+0x458>)
 8005d5e:	4293      	cmp	r3, r2
 8005d60:	d031      	beq.n	8005dc6 <HAL_DMA_Abort+0x422>
 8005d62:	687b      	ldr	r3, [r7, #4]
 8005d64:	681b      	ldr	r3, [r3, #0]
 8005d66:	4a26      	ldr	r2, [pc, #152]	@ (8005e00 <HAL_DMA_Abort+0x45c>)
 8005d68:	4293      	cmp	r3, r2
 8005d6a:	d02c      	beq.n	8005dc6 <HAL_DMA_Abort+0x422>
 8005d6c:	687b      	ldr	r3, [r7, #4]
 8005d6e:	681b      	ldr	r3, [r3, #0]
 8005d70:	4a24      	ldr	r2, [pc, #144]	@ (8005e04 <HAL_DMA_Abort+0x460>)
 8005d72:	4293      	cmp	r3, r2
 8005d74:	d027      	beq.n	8005dc6 <HAL_DMA_Abort+0x422>
 8005d76:	687b      	ldr	r3, [r7, #4]
 8005d78:	681b      	ldr	r3, [r3, #0]
 8005d7a:	4a23      	ldr	r2, [pc, #140]	@ (8005e08 <HAL_DMA_Abort+0x464>)
 8005d7c:	4293      	cmp	r3, r2
 8005d7e:	d022      	beq.n	8005dc6 <HAL_DMA_Abort+0x422>
 8005d80:	687b      	ldr	r3, [r7, #4]
 8005d82:	681b      	ldr	r3, [r3, #0]
 8005d84:	4a21      	ldr	r2, [pc, #132]	@ (8005e0c <HAL_DMA_Abort+0x468>)
 8005d86:	4293      	cmp	r3, r2
 8005d88:	d01d      	beq.n	8005dc6 <HAL_DMA_Abort+0x422>
 8005d8a:	687b      	ldr	r3, [r7, #4]
 8005d8c:	681b      	ldr	r3, [r3, #0]
 8005d8e:	4a20      	ldr	r2, [pc, #128]	@ (8005e10 <HAL_DMA_Abort+0x46c>)
 8005d90:	4293      	cmp	r3, r2
 8005d92:	d018      	beq.n	8005dc6 <HAL_DMA_Abort+0x422>
 8005d94:	687b      	ldr	r3, [r7, #4]
 8005d96:	681b      	ldr	r3, [r3, #0]
 8005d98:	4a1e      	ldr	r2, [pc, #120]	@ (8005e14 <HAL_DMA_Abort+0x470>)
 8005d9a:	4293      	cmp	r3, r2
 8005d9c:	d013      	beq.n	8005dc6 <HAL_DMA_Abort+0x422>
 8005d9e:	687b      	ldr	r3, [r7, #4]
 8005da0:	681b      	ldr	r3, [r3, #0]
 8005da2:	4a1d      	ldr	r2, [pc, #116]	@ (8005e18 <HAL_DMA_Abort+0x474>)
 8005da4:	4293      	cmp	r3, r2
 8005da6:	d00e      	beq.n	8005dc6 <HAL_DMA_Abort+0x422>
 8005da8:	687b      	ldr	r3, [r7, #4]
 8005daa:	681b      	ldr	r3, [r3, #0]
 8005dac:	4a1b      	ldr	r2, [pc, #108]	@ (8005e1c <HAL_DMA_Abort+0x478>)
 8005dae:	4293      	cmp	r3, r2
 8005db0:	d009      	beq.n	8005dc6 <HAL_DMA_Abort+0x422>
 8005db2:	687b      	ldr	r3, [r7, #4]
 8005db4:	681b      	ldr	r3, [r3, #0]
 8005db6:	4a1a      	ldr	r2, [pc, #104]	@ (8005e20 <HAL_DMA_Abort+0x47c>)
 8005db8:	4293      	cmp	r3, r2
 8005dba:	d004      	beq.n	8005dc6 <HAL_DMA_Abort+0x422>
 8005dbc:	687b      	ldr	r3, [r7, #4]
 8005dbe:	681b      	ldr	r3, [r3, #0]
 8005dc0:	4a18      	ldr	r2, [pc, #96]	@ (8005e24 <HAL_DMA_Abort+0x480>)
 8005dc2:	4293      	cmp	r3, r2
 8005dc4:	d101      	bne.n	8005dca <HAL_DMA_Abort+0x426>
 8005dc6:	2301      	movs	r3, #1
 8005dc8:	e000      	b.n	8005dcc <HAL_DMA_Abort+0x428>
 8005dca:	2300      	movs	r3, #0
 8005dcc:	2b00      	cmp	r3, #0
 8005dce:	d02b      	beq.n	8005e28 <HAL_DMA_Abort+0x484>
    {
      regs_dma = (DMA_Base_Registers *)hdma->StreamBaseAddress;
 8005dd0:	687b      	ldr	r3, [r7, #4]
 8005dd2:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 8005dd4:	60bb      	str	r3, [r7, #8]
      regs_dma->IFCR = 0x3FUL << (hdma->StreamIndex & 0x1FU);
 8005dd6:	687b      	ldr	r3, [r7, #4]
 8005dd8:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 8005dda:	f003 031f 	and.w	r3, r3, #31
 8005dde:	223f      	movs	r2, #63	@ 0x3f
 8005de0:	409a      	lsls	r2, r3
 8005de2:	68bb      	ldr	r3, [r7, #8]
 8005de4:	609a      	str	r2, [r3, #8]
 8005de6:	e02a      	b.n	8005e3e <HAL_DMA_Abort+0x49a>
 8005de8:	40020010 	.word	0x40020010
 8005dec:	40020028 	.word	0x40020028
 8005df0:	40020040 	.word	0x40020040
 8005df4:	40020058 	.word	0x40020058
 8005df8:	40020070 	.word	0x40020070
 8005dfc:	40020088 	.word	0x40020088
 8005e00:	400200a0 	.word	0x400200a0
 8005e04:	400200b8 	.word	0x400200b8
 8005e08:	40020410 	.word	0x40020410
 8005e0c:	40020428 	.word	0x40020428
 8005e10:	40020440 	.word	0x40020440
 8005e14:	40020458 	.word	0x40020458
 8005e18:	40020470 	.word	0x40020470
 8005e1c:	40020488 	.word	0x40020488
 8005e20:	400204a0 	.word	0x400204a0
 8005e24:	400204b8 	.word	0x400204b8
    }
    else /* BDMA channel */
    {
      regs_bdma = (BDMA_Base_Registers *)hdma->StreamBaseAddress;
 8005e28:	687b      	ldr	r3, [r7, #4]
 8005e2a:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 8005e2c:	60fb      	str	r3, [r7, #12]
      regs_bdma->IFCR = ((BDMA_IFCR_CGIF0) << (hdma->StreamIndex & 0x1FU));
 8005e2e:	687b      	ldr	r3, [r7, #4]
 8005e30:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 8005e32:	f003 031f 	and.w	r3, r3, #31
 8005e36:	2201      	movs	r2, #1
 8005e38:	409a      	lsls	r2, r3
 8005e3a:	68fb      	ldr	r3, [r7, #12]
 8005e3c:	605a      	str	r2, [r3, #4]
    }

    if(IS_DMA_DMAMUX_ALL_INSTANCE(hdma->Instance) != 0U) /* No DMAMUX available for BDMA1 */
 8005e3e:	687b      	ldr	r3, [r7, #4]
 8005e40:	681b      	ldr	r3, [r3, #0]
 8005e42:	4a4f      	ldr	r2, [pc, #316]	@ (8005f80 <HAL_DMA_Abort+0x5dc>)
 8005e44:	4293      	cmp	r3, r2
 8005e46:	d072      	beq.n	8005f2e <HAL_DMA_Abort+0x58a>
 8005e48:	687b      	ldr	r3, [r7, #4]
 8005e4a:	681b      	ldr	r3, [r3, #0]
 8005e4c:	4a4d      	ldr	r2, [pc, #308]	@ (8005f84 <HAL_DMA_Abort+0x5e0>)
 8005e4e:	4293      	cmp	r3, r2
 8005e50:	d06d      	beq.n	8005f2e <HAL_DMA_Abort+0x58a>
 8005e52:	687b      	ldr	r3, [r7, #4]
 8005e54:	681b      	ldr	r3, [r3, #0]
 8005e56:	4a4c      	ldr	r2, [pc, #304]	@ (8005f88 <HAL_DMA_Abort+0x5e4>)
 8005e58:	4293      	cmp	r3, r2
 8005e5a:	d068      	beq.n	8005f2e <HAL_DMA_Abort+0x58a>
 8005e5c:	687b      	ldr	r3, [r7, #4]
 8005e5e:	681b      	ldr	r3, [r3, #0]
 8005e60:	4a4a      	ldr	r2, [pc, #296]	@ (8005f8c <HAL_DMA_Abort+0x5e8>)
 8005e62:	4293      	cmp	r3, r2
 8005e64:	d063      	beq.n	8005f2e <HAL_DMA_Abort+0x58a>
 8005e66:	687b      	ldr	r3, [r7, #4]
 8005e68:	681b      	ldr	r3, [r3, #0]
 8005e6a:	4a49      	ldr	r2, [pc, #292]	@ (8005f90 <HAL_DMA_Abort+0x5ec>)
 8005e6c:	4293      	cmp	r3, r2
 8005e6e:	d05e      	beq.n	8005f2e <HAL_DMA_Abort+0x58a>
 8005e70:	687b      	ldr	r3, [r7, #4]
 8005e72:	681b      	ldr	r3, [r3, #0]
 8005e74:	4a47      	ldr	r2, [pc, #284]	@ (8005f94 <HAL_DMA_Abort+0x5f0>)
 8005e76:	4293      	cmp	r3, r2
 8005e78:	d059      	beq.n	8005f2e <HAL_DMA_Abort+0x58a>
 8005e7a:	687b      	ldr	r3, [r7, #4]
 8005e7c:	681b      	ldr	r3, [r3, #0]
 8005e7e:	4a46      	ldr	r2, [pc, #280]	@ (8005f98 <HAL_DMA_Abort+0x5f4>)
 8005e80:	4293      	cmp	r3, r2
 8005e82:	d054      	beq.n	8005f2e <HAL_DMA_Abort+0x58a>
 8005e84:	687b      	ldr	r3, [r7, #4]
 8005e86:	681b      	ldr	r3, [r3, #0]
 8005e88:	4a44      	ldr	r2, [pc, #272]	@ (8005f9c <HAL_DMA_Abort+0x5f8>)
 8005e8a:	4293      	cmp	r3, r2
 8005e8c:	d04f      	beq.n	8005f2e <HAL_DMA_Abort+0x58a>
 8005e8e:	687b      	ldr	r3, [r7, #4]
 8005e90:	681b      	ldr	r3, [r3, #0]
 8005e92:	4a43      	ldr	r2, [pc, #268]	@ (8005fa0 <HAL_DMA_Abort+0x5fc>)
 8005e94:	4293      	cmp	r3, r2
 8005e96:	d04a      	beq.n	8005f2e <HAL_DMA_Abort+0x58a>
 8005e98:	687b      	ldr	r3, [r7, #4]
 8005e9a:	681b      	ldr	r3, [r3, #0]
 8005e9c:	4a41      	ldr	r2, [pc, #260]	@ (8005fa4 <HAL_DMA_Abort+0x600>)
 8005e9e:	4293      	cmp	r3, r2
 8005ea0:	d045      	beq.n	8005f2e <HAL_DMA_Abort+0x58a>
 8005ea2:	687b      	ldr	r3, [r7, #4]
 8005ea4:	681b      	ldr	r3, [r3, #0]
 8005ea6:	4a40      	ldr	r2, [pc, #256]	@ (8005fa8 <HAL_DMA_Abort+0x604>)
 8005ea8:	4293      	cmp	r3, r2
 8005eaa:	d040      	beq.n	8005f2e <HAL_DMA_Abort+0x58a>
 8005eac:	687b      	ldr	r3, [r7, #4]
 8005eae:	681b      	ldr	r3, [r3, #0]
 8005eb0:	4a3e      	ldr	r2, [pc, #248]	@ (8005fac <HAL_DMA_Abort+0x608>)
 8005eb2:	4293      	cmp	r3, r2
 8005eb4:	d03b      	beq.n	8005f2e <HAL_DMA_Abort+0x58a>
 8005eb6:	687b      	ldr	r3, [r7, #4]
 8005eb8:	681b      	ldr	r3, [r3, #0]
 8005eba:	4a3d      	ldr	r2, [pc, #244]	@ (8005fb0 <HAL_DMA_Abort+0x60c>)
 8005ebc:	4293      	cmp	r3, r2
 8005ebe:	d036      	beq.n	8005f2e <HAL_DMA_Abort+0x58a>
 8005ec0:	687b      	ldr	r3, [r7, #4]
 8005ec2:	681b      	ldr	r3, [r3, #0]
 8005ec4:	4a3b      	ldr	r2, [pc, #236]	@ (8005fb4 <HAL_DMA_Abort+0x610>)
 8005ec6:	4293      	cmp	r3, r2
 8005ec8:	d031      	beq.n	8005f2e <HAL_DMA_Abort+0x58a>
 8005eca:	687b      	ldr	r3, [r7, #4]
 8005ecc:	681b      	ldr	r3, [r3, #0]
 8005ece:	4a3a      	ldr	r2, [pc, #232]	@ (8005fb8 <HAL_DMA_Abort+0x614>)
 8005ed0:	4293      	cmp	r3, r2
 8005ed2:	d02c      	beq.n	8005f2e <HAL_DMA_Abort+0x58a>
 8005ed4:	687b      	ldr	r3, [r7, #4]
 8005ed6:	681b      	ldr	r3, [r3, #0]
 8005ed8:	4a38      	ldr	r2, [pc, #224]	@ (8005fbc <HAL_DMA_Abort+0x618>)
 8005eda:	4293      	cmp	r3, r2
 8005edc:	d027      	beq.n	8005f2e <HAL_DMA_Abort+0x58a>
 8005ede:	687b      	ldr	r3, [r7, #4]
 8005ee0:	681b      	ldr	r3, [r3, #0]
 8005ee2:	4a37      	ldr	r2, [pc, #220]	@ (8005fc0 <HAL_DMA_Abort+0x61c>)
 8005ee4:	4293      	cmp	r3, r2
 8005ee6:	d022      	beq.n	8005f2e <HAL_DMA_Abort+0x58a>
 8005ee8:	687b      	ldr	r3, [r7, #4]
 8005eea:	681b      	ldr	r3, [r3, #0]
 8005eec:	4a35      	ldr	r2, [pc, #212]	@ (8005fc4 <HAL_DMA_Abort+0x620>)
 8005eee:	4293      	cmp	r3, r2
 8005ef0:	d01d      	beq.n	8005f2e <HAL_DMA_Abort+0x58a>
 8005ef2:	687b      	ldr	r3, [r7, #4]
 8005ef4:	681b      	ldr	r3, [r3, #0]
 8005ef6:	4a34      	ldr	r2, [pc, #208]	@ (8005fc8 <HAL_DMA_Abort+0x624>)
 8005ef8:	4293      	cmp	r3, r2
 8005efa:	d018      	beq.n	8005f2e <HAL_DMA_Abort+0x58a>
 8005efc:	687b      	ldr	r3, [r7, #4]
 8005efe:	681b      	ldr	r3, [r3, #0]
 8005f00:	4a32      	ldr	r2, [pc, #200]	@ (8005fcc <HAL_DMA_Abort+0x628>)
 8005f02:	4293      	cmp	r3, r2
 8005f04:	d013      	beq.n	8005f2e <HAL_DMA_Abort+0x58a>
 8005f06:	687b      	ldr	r3, [r7, #4]
 8005f08:	681b      	ldr	r3, [r3, #0]
 8005f0a:	4a31      	ldr	r2, [pc, #196]	@ (8005fd0 <HAL_DMA_Abort+0x62c>)
 8005f0c:	4293      	cmp	r3, r2
 8005f0e:	d00e      	beq.n	8005f2e <HAL_DMA_Abort+0x58a>
 8005f10:	687b      	ldr	r3, [r7, #4]
 8005f12:	681b      	ldr	r3, [r3, #0]
 8005f14:	4a2f      	ldr	r2, [pc, #188]	@ (8005fd4 <HAL_DMA_Abort+0x630>)
 8005f16:	4293      	cmp	r3, r2
 8005f18:	d009      	beq.n	8005f2e <HAL_DMA_Abort+0x58a>
 8005f1a:	687b      	ldr	r3, [r7, #4]
 8005f1c:	681b      	ldr	r3, [r3, #0]
 8005f1e:	4a2e      	ldr	r2, [pc, #184]	@ (8005fd8 <HAL_DMA_Abort+0x634>)
 8005f20:	4293      	cmp	r3, r2
 8005f22:	d004      	beq.n	8005f2e <HAL_DMA_Abort+0x58a>
 8005f24:	687b      	ldr	r3, [r7, #4]
 8005f26:	681b      	ldr	r3, [r3, #0]
 8005f28:	4a2c      	ldr	r2, [pc, #176]	@ (8005fdc <HAL_DMA_Abort+0x638>)
 8005f2a:	4293      	cmp	r3, r2
 8005f2c:	d101      	bne.n	8005f32 <HAL_DMA_Abort+0x58e>
 8005f2e:	2301      	movs	r3, #1
 8005f30:	e000      	b.n	8005f34 <HAL_DMA_Abort+0x590>
 8005f32:	2300      	movs	r3, #0
 8005f34:	2b00      	cmp	r3, #0
 8005f36:	d015      	beq.n	8005f64 <HAL_DMA_Abort+0x5c0>
    {
      /* Clear the DMAMUX synchro overrun flag */
      hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask;
 8005f38:	687b      	ldr	r3, [r7, #4]
 8005f3a:	6e5b      	ldr	r3, [r3, #100]	@ 0x64
 8005f3c:	687a      	ldr	r2, [r7, #4]
 8005f3e:	6e92      	ldr	r2, [r2, #104]	@ 0x68
 8005f40:	605a      	str	r2, [r3, #4]

      if(hdma->DMAmuxRequestGen != 0U)
 8005f42:	687b      	ldr	r3, [r7, #4]
 8005f44:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8005f46:	2b00      	cmp	r3, #0
 8005f48:	d00c      	beq.n	8005f64 <HAL_DMA_Abort+0x5c0>
      {
        /* if using DMAMUX request generator, disable the DMAMUX request generator overrun IT */
        /* disable the request gen overrun IT */
        hdma->DMAmuxRequestGen->RGCR &= ~DMAMUX_RGxCR_OIE;
 8005f4a:	687b      	ldr	r3, [r7, #4]
 8005f4c:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8005f4e:	681a      	ldr	r2, [r3, #0]
 8005f50:	687b      	ldr	r3, [r7, #4]
 8005f52:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8005f54:	f422 7280 	bic.w	r2, r2, #256	@ 0x100
 8005f58:	601a      	str	r2, [r3, #0]

        /* Clear the DMAMUX request generator overrun flag */
        hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask;
 8005f5a:	687b      	ldr	r3, [r7, #4]
 8005f5c:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 8005f5e:	687a      	ldr	r2, [r7, #4]
 8005f60:	6f52      	ldr	r2, [r2, #116]	@ 0x74
 8005f62:	605a      	str	r2, [r3, #4]
      }
    }

    /* Change the DMA state */
    hdma->State = HAL_DMA_STATE_READY;
 8005f64:	687b      	ldr	r3, [r7, #4]
 8005f66:	2201      	movs	r2, #1
 8005f68:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

    /* Process Unlocked */
    __HAL_UNLOCK(hdma);
 8005f6c:	687b      	ldr	r3, [r7, #4]
 8005f6e:	2200      	movs	r2, #0
 8005f70:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34
  }

  return HAL_OK;
 8005f74:	2300      	movs	r3, #0
}
 8005f76:	4618      	mov	r0, r3
 8005f78:	3718      	adds	r7, #24
 8005f7a:	46bd      	mov	sp, r7
 8005f7c:	bd80      	pop	{r7, pc}
 8005f7e:	bf00      	nop
 8005f80:	40020010 	.word	0x40020010
 8005f84:	40020028 	.word	0x40020028
 8005f88:	40020040 	.word	0x40020040
 8005f8c:	40020058 	.word	0x40020058
 8005f90:	40020070 	.word	0x40020070
 8005f94:	40020088 	.word	0x40020088
 8005f98:	400200a0 	.word	0x400200a0
 8005f9c:	400200b8 	.word	0x400200b8
 8005fa0:	40020410 	.word	0x40020410
 8005fa4:	40020428 	.word	0x40020428
 8005fa8:	40020440 	.word	0x40020440
 8005fac:	40020458 	.word	0x40020458
 8005fb0:	40020470 	.word	0x40020470
 8005fb4:	40020488 	.word	0x40020488
 8005fb8:	400204a0 	.word	0x400204a0
 8005fbc:	400204b8 	.word	0x400204b8
 8005fc0:	58025408 	.word	0x58025408
 8005fc4:	5802541c 	.word	0x5802541c
 8005fc8:	58025430 	.word	0x58025430
 8005fcc:	58025444 	.word	0x58025444
 8005fd0:	58025458 	.word	0x58025458
 8005fd4:	5802546c 	.word	0x5802546c
 8005fd8:	58025480 	.word	0x58025480
 8005fdc:	58025494 	.word	0x58025494

08005fe0 <HAL_DMA_Abort_IT>:
  * @param  hdma  : pointer to a DMA_HandleTypeDef structure that contains
  *                 the configuration information for the specified DMA Stream.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma)
{
 8005fe0:	b580      	push	{r7, lr}
 8005fe2:	b084      	sub	sp, #16
 8005fe4:	af00      	add	r7, sp, #0
 8005fe6:	6078      	str	r0, [r7, #4]
  BDMA_Base_Registers *regs_bdma;

  /* Check the DMA peripheral handle */
  if(hdma == NULL)
 8005fe8:	687b      	ldr	r3, [r7, #4]
 8005fea:	2b00      	cmp	r3, #0
 8005fec:	d101      	bne.n	8005ff2 <HAL_DMA_Abort_IT+0x12>
  {
    return HAL_ERROR;
 8005fee:	2301      	movs	r3, #1
 8005ff0:	e237      	b.n	8006462 <HAL_DMA_Abort_IT+0x482>
  }

  if(hdma->State != HAL_DMA_STATE_BUSY)
 8005ff2:	687b      	ldr	r3, [r7, #4]
 8005ff4:	f893 3035 	ldrb.w	r3, [r3, #53]	@ 0x35
 8005ff8:	b2db      	uxtb	r3, r3
 8005ffa:	2b02      	cmp	r3, #2
 8005ffc:	d004      	beq.n	8006008 <HAL_DMA_Abort_IT+0x28>
  {
    hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
 8005ffe:	687b      	ldr	r3, [r7, #4]
 8006000:	2280      	movs	r2, #128	@ 0x80
 8006002:	655a      	str	r2, [r3, #84]	@ 0x54
    return HAL_ERROR;
 8006004:	2301      	movs	r3, #1
 8006006:	e22c      	b.n	8006462 <HAL_DMA_Abort_IT+0x482>
  }
  else
  {
    if(IS_DMA_STREAM_INSTANCE(hdma->Instance) != 0U) /* DMA1 or DMA2 instance */
 8006008:	687b      	ldr	r3, [r7, #4]
 800600a:	681b      	ldr	r3, [r3, #0]
 800600c:	4a5c      	ldr	r2, [pc, #368]	@ (8006180 <HAL_DMA_Abort_IT+0x1a0>)
 800600e:	4293      	cmp	r3, r2
 8006010:	d04a      	beq.n	80060a8 <HAL_DMA_Abort_IT+0xc8>
 8006012:	687b      	ldr	r3, [r7, #4]
 8006014:	681b      	ldr	r3, [r3, #0]
 8006016:	4a5b      	ldr	r2, [pc, #364]	@ (8006184 <HAL_DMA_Abort_IT+0x1a4>)
 8006018:	4293      	cmp	r3, r2
 800601a:	d045      	beq.n	80060a8 <HAL_DMA_Abort_IT+0xc8>
 800601c:	687b      	ldr	r3, [r7, #4]
 800601e:	681b      	ldr	r3, [r3, #0]
 8006020:	4a59      	ldr	r2, [pc, #356]	@ (8006188 <HAL_DMA_Abort_IT+0x1a8>)
 8006022:	4293      	cmp	r3, r2
 8006024:	d040      	beq.n	80060a8 <HAL_DMA_Abort_IT+0xc8>
 8006026:	687b      	ldr	r3, [r7, #4]
 8006028:	681b      	ldr	r3, [r3, #0]
 800602a:	4a58      	ldr	r2, [pc, #352]	@ (800618c <HAL_DMA_Abort_IT+0x1ac>)
 800602c:	4293      	cmp	r3, r2
 800602e:	d03b      	beq.n	80060a8 <HAL_DMA_Abort_IT+0xc8>
 8006030:	687b      	ldr	r3, [r7, #4]
 8006032:	681b      	ldr	r3, [r3, #0]
 8006034:	4a56      	ldr	r2, [pc, #344]	@ (8006190 <HAL_DMA_Abort_IT+0x1b0>)
 8006036:	4293      	cmp	r3, r2
 8006038:	d036      	beq.n	80060a8 <HAL_DMA_Abort_IT+0xc8>
 800603a:	687b      	ldr	r3, [r7, #4]
 800603c:	681b      	ldr	r3, [r3, #0]
 800603e:	4a55      	ldr	r2, [pc, #340]	@ (8006194 <HAL_DMA_Abort_IT+0x1b4>)
 8006040:	4293      	cmp	r3, r2
 8006042:	d031      	beq.n	80060a8 <HAL_DMA_Abort_IT+0xc8>
 8006044:	687b      	ldr	r3, [r7, #4]
 8006046:	681b      	ldr	r3, [r3, #0]
 8006048:	4a53      	ldr	r2, [pc, #332]	@ (8006198 <HAL_DMA_Abort_IT+0x1b8>)
 800604a:	4293      	cmp	r3, r2
 800604c:	d02c      	beq.n	80060a8 <HAL_DMA_Abort_IT+0xc8>
 800604e:	687b      	ldr	r3, [r7, #4]
 8006050:	681b      	ldr	r3, [r3, #0]
 8006052:	4a52      	ldr	r2, [pc, #328]	@ (800619c <HAL_DMA_Abort_IT+0x1bc>)
 8006054:	4293      	cmp	r3, r2
 8006056:	d027      	beq.n	80060a8 <HAL_DMA_Abort_IT+0xc8>
 8006058:	687b      	ldr	r3, [r7, #4]
 800605a:	681b      	ldr	r3, [r3, #0]
 800605c:	4a50      	ldr	r2, [pc, #320]	@ (80061a0 <HAL_DMA_Abort_IT+0x1c0>)
 800605e:	4293      	cmp	r3, r2
 8006060:	d022      	beq.n	80060a8 <HAL_DMA_Abort_IT+0xc8>
 8006062:	687b      	ldr	r3, [r7, #4]
 8006064:	681b      	ldr	r3, [r3, #0]
 8006066:	4a4f      	ldr	r2, [pc, #316]	@ (80061a4 <HAL_DMA_Abort_IT+0x1c4>)
 8006068:	4293      	cmp	r3, r2
 800606a:	d01d      	beq.n	80060a8 <HAL_DMA_Abort_IT+0xc8>
 800606c:	687b      	ldr	r3, [r7, #4]
 800606e:	681b      	ldr	r3, [r3, #0]
 8006070:	4a4d      	ldr	r2, [pc, #308]	@ (80061a8 <HAL_DMA_Abort_IT+0x1c8>)
 8006072:	4293      	cmp	r3, r2
 8006074:	d018      	beq.n	80060a8 <HAL_DMA_Abort_IT+0xc8>
 8006076:	687b      	ldr	r3, [r7, #4]
 8006078:	681b      	ldr	r3, [r3, #0]
 800607a:	4a4c      	ldr	r2, [pc, #304]	@ (80061ac <HAL_DMA_Abort_IT+0x1cc>)
 800607c:	4293      	cmp	r3, r2
 800607e:	d013      	beq.n	80060a8 <HAL_DMA_Abort_IT+0xc8>
 8006080:	687b      	ldr	r3, [r7, #4]
 8006082:	681b      	ldr	r3, [r3, #0]
 8006084:	4a4a      	ldr	r2, [pc, #296]	@ (80061b0 <HAL_DMA_Abort_IT+0x1d0>)
 8006086:	4293      	cmp	r3, r2
 8006088:	d00e      	beq.n	80060a8 <HAL_DMA_Abort_IT+0xc8>
 800608a:	687b      	ldr	r3, [r7, #4]
 800608c:	681b      	ldr	r3, [r3, #0]
 800608e:	4a49      	ldr	r2, [pc, #292]	@ (80061b4 <HAL_DMA_Abort_IT+0x1d4>)
 8006090:	4293      	cmp	r3, r2
 8006092:	d009      	beq.n	80060a8 <HAL_DMA_Abort_IT+0xc8>
 8006094:	687b      	ldr	r3, [r7, #4]
 8006096:	681b      	ldr	r3, [r3, #0]
 8006098:	4a47      	ldr	r2, [pc, #284]	@ (80061b8 <HAL_DMA_Abort_IT+0x1d8>)
 800609a:	4293      	cmp	r3, r2
 800609c:	d004      	beq.n	80060a8 <HAL_DMA_Abort_IT+0xc8>
 800609e:	687b      	ldr	r3, [r7, #4]
 80060a0:	681b      	ldr	r3, [r3, #0]
 80060a2:	4a46      	ldr	r2, [pc, #280]	@ (80061bc <HAL_DMA_Abort_IT+0x1dc>)
 80060a4:	4293      	cmp	r3, r2
 80060a6:	d101      	bne.n	80060ac <HAL_DMA_Abort_IT+0xcc>
 80060a8:	2301      	movs	r3, #1
 80060aa:	e000      	b.n	80060ae <HAL_DMA_Abort_IT+0xce>
 80060ac:	2300      	movs	r3, #0
 80060ae:	2b00      	cmp	r3, #0
 80060b0:	f000 8086 	beq.w	80061c0 <HAL_DMA_Abort_IT+0x1e0>
    {
      /* Set Abort State  */
      hdma->State = HAL_DMA_STATE_ABORT;
 80060b4:	687b      	ldr	r3, [r7, #4]
 80060b6:	2204      	movs	r2, #4
 80060b8:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

      /* Disable the stream */
      __HAL_DMA_DISABLE(hdma);
 80060bc:	687b      	ldr	r3, [r7, #4]
 80060be:	681b      	ldr	r3, [r3, #0]
 80060c0:	4a2f      	ldr	r2, [pc, #188]	@ (8006180 <HAL_DMA_Abort_IT+0x1a0>)
 80060c2:	4293      	cmp	r3, r2
 80060c4:	d04a      	beq.n	800615c <HAL_DMA_Abort_IT+0x17c>
 80060c6:	687b      	ldr	r3, [r7, #4]
 80060c8:	681b      	ldr	r3, [r3, #0]
 80060ca:	4a2e      	ldr	r2, [pc, #184]	@ (8006184 <HAL_DMA_Abort_IT+0x1a4>)
 80060cc:	4293      	cmp	r3, r2
 80060ce:	d045      	beq.n	800615c <HAL_DMA_Abort_IT+0x17c>
 80060d0:	687b      	ldr	r3, [r7, #4]
 80060d2:	681b      	ldr	r3, [r3, #0]
 80060d4:	4a2c      	ldr	r2, [pc, #176]	@ (8006188 <HAL_DMA_Abort_IT+0x1a8>)
 80060d6:	4293      	cmp	r3, r2
 80060d8:	d040      	beq.n	800615c <HAL_DMA_Abort_IT+0x17c>
 80060da:	687b      	ldr	r3, [r7, #4]
 80060dc:	681b      	ldr	r3, [r3, #0]
 80060de:	4a2b      	ldr	r2, [pc, #172]	@ (800618c <HAL_DMA_Abort_IT+0x1ac>)
 80060e0:	4293      	cmp	r3, r2
 80060e2:	d03b      	beq.n	800615c <HAL_DMA_Abort_IT+0x17c>
 80060e4:	687b      	ldr	r3, [r7, #4]
 80060e6:	681b      	ldr	r3, [r3, #0]
 80060e8:	4a29      	ldr	r2, [pc, #164]	@ (8006190 <HAL_DMA_Abort_IT+0x1b0>)
 80060ea:	4293      	cmp	r3, r2
 80060ec:	d036      	beq.n	800615c <HAL_DMA_Abort_IT+0x17c>
 80060ee:	687b      	ldr	r3, [r7, #4]
 80060f0:	681b      	ldr	r3, [r3, #0]
 80060f2:	4a28      	ldr	r2, [pc, #160]	@ (8006194 <HAL_DMA_Abort_IT+0x1b4>)
 80060f4:	4293      	cmp	r3, r2
 80060f6:	d031      	beq.n	800615c <HAL_DMA_Abort_IT+0x17c>
 80060f8:	687b      	ldr	r3, [r7, #4]
 80060fa:	681b      	ldr	r3, [r3, #0]
 80060fc:	4a26      	ldr	r2, [pc, #152]	@ (8006198 <HAL_DMA_Abort_IT+0x1b8>)
 80060fe:	4293      	cmp	r3, r2
 8006100:	d02c      	beq.n	800615c <HAL_DMA_Abort_IT+0x17c>
 8006102:	687b      	ldr	r3, [r7, #4]
 8006104:	681b      	ldr	r3, [r3, #0]
 8006106:	4a25      	ldr	r2, [pc, #148]	@ (800619c <HAL_DMA_Abort_IT+0x1bc>)
 8006108:	4293      	cmp	r3, r2
 800610a:	d027      	beq.n	800615c <HAL_DMA_Abort_IT+0x17c>
 800610c:	687b      	ldr	r3, [r7, #4]
 800610e:	681b      	ldr	r3, [r3, #0]
 8006110:	4a23      	ldr	r2, [pc, #140]	@ (80061a0 <HAL_DMA_Abort_IT+0x1c0>)
 8006112:	4293      	cmp	r3, r2
 8006114:	d022      	beq.n	800615c <HAL_DMA_Abort_IT+0x17c>
 8006116:	687b      	ldr	r3, [r7, #4]
 8006118:	681b      	ldr	r3, [r3, #0]
 800611a:	4a22      	ldr	r2, [pc, #136]	@ (80061a4 <HAL_DMA_Abort_IT+0x1c4>)
 800611c:	4293      	cmp	r3, r2
 800611e:	d01d      	beq.n	800615c <HAL_DMA_Abort_IT+0x17c>
 8006120:	687b      	ldr	r3, [r7, #4]
 8006122:	681b      	ldr	r3, [r3, #0]
 8006124:	4a20      	ldr	r2, [pc, #128]	@ (80061a8 <HAL_DMA_Abort_IT+0x1c8>)
 8006126:	4293      	cmp	r3, r2
 8006128:	d018      	beq.n	800615c <HAL_DMA_Abort_IT+0x17c>
 800612a:	687b      	ldr	r3, [r7, #4]
 800612c:	681b      	ldr	r3, [r3, #0]
 800612e:	4a1f      	ldr	r2, [pc, #124]	@ (80061ac <HAL_DMA_Abort_IT+0x1cc>)
 8006130:	4293      	cmp	r3, r2
 8006132:	d013      	beq.n	800615c <HAL_DMA_Abort_IT+0x17c>
 8006134:	687b      	ldr	r3, [r7, #4]
 8006136:	681b      	ldr	r3, [r3, #0]
 8006138:	4a1d      	ldr	r2, [pc, #116]	@ (80061b0 <HAL_DMA_Abort_IT+0x1d0>)
 800613a:	4293      	cmp	r3, r2
 800613c:	d00e      	beq.n	800615c <HAL_DMA_Abort_IT+0x17c>
 800613e:	687b      	ldr	r3, [r7, #4]
 8006140:	681b      	ldr	r3, [r3, #0]
 8006142:	4a1c      	ldr	r2, [pc, #112]	@ (80061b4 <HAL_DMA_Abort_IT+0x1d4>)
 8006144:	4293      	cmp	r3, r2
 8006146:	d009      	beq.n	800615c <HAL_DMA_Abort_IT+0x17c>
 8006148:	687b      	ldr	r3, [r7, #4]
 800614a:	681b      	ldr	r3, [r3, #0]
 800614c:	4a1a      	ldr	r2, [pc, #104]	@ (80061b8 <HAL_DMA_Abort_IT+0x1d8>)
 800614e:	4293      	cmp	r3, r2
 8006150:	d004      	beq.n	800615c <HAL_DMA_Abort_IT+0x17c>
 8006152:	687b      	ldr	r3, [r7, #4]
 8006154:	681b      	ldr	r3, [r3, #0]
 8006156:	4a19      	ldr	r2, [pc, #100]	@ (80061bc <HAL_DMA_Abort_IT+0x1dc>)
 8006158:	4293      	cmp	r3, r2
 800615a:	d108      	bne.n	800616e <HAL_DMA_Abort_IT+0x18e>
 800615c:	687b      	ldr	r3, [r7, #4]
 800615e:	681b      	ldr	r3, [r3, #0]
 8006160:	681a      	ldr	r2, [r3, #0]
 8006162:	687b      	ldr	r3, [r7, #4]
 8006164:	681b      	ldr	r3, [r3, #0]
 8006166:	f022 0201 	bic.w	r2, r2, #1
 800616a:	601a      	str	r2, [r3, #0]
 800616c:	e178      	b.n	8006460 <HAL_DMA_Abort_IT+0x480>
 800616e:	687b      	ldr	r3, [r7, #4]
 8006170:	681b      	ldr	r3, [r3, #0]
 8006172:	681a      	ldr	r2, [r3, #0]
 8006174:	687b      	ldr	r3, [r7, #4]
 8006176:	681b      	ldr	r3, [r3, #0]
 8006178:	f022 0201 	bic.w	r2, r2, #1
 800617c:	601a      	str	r2, [r3, #0]
 800617e:	e16f      	b.n	8006460 <HAL_DMA_Abort_IT+0x480>
 8006180:	40020010 	.word	0x40020010
 8006184:	40020028 	.word	0x40020028
 8006188:	40020040 	.word	0x40020040
 800618c:	40020058 	.word	0x40020058
 8006190:	40020070 	.word	0x40020070
 8006194:	40020088 	.word	0x40020088
 8006198:	400200a0 	.word	0x400200a0
 800619c:	400200b8 	.word	0x400200b8
 80061a0:	40020410 	.word	0x40020410
 80061a4:	40020428 	.word	0x40020428
 80061a8:	40020440 	.word	0x40020440
 80061ac:	40020458 	.word	0x40020458
 80061b0:	40020470 	.word	0x40020470
 80061b4:	40020488 	.word	0x40020488
 80061b8:	400204a0 	.word	0x400204a0
 80061bc:	400204b8 	.word	0x400204b8
    }
    else /* BDMA channel */
    {
      /* Disable DMA All Interrupts  */
      ((BDMA_Channel_TypeDef   *)hdma->Instance)->CCR  &= ~(BDMA_CCR_TCIE | BDMA_CCR_HTIE | BDMA_CCR_TEIE);
 80061c0:	687b      	ldr	r3, [r7, #4]
 80061c2:	681b      	ldr	r3, [r3, #0]
 80061c4:	681a      	ldr	r2, [r3, #0]
 80061c6:	687b      	ldr	r3, [r7, #4]
 80061c8:	681b      	ldr	r3, [r3, #0]
 80061ca:	f022 020e 	bic.w	r2, r2, #14
 80061ce:	601a      	str	r2, [r3, #0]

      /* Disable the channel */
      __HAL_DMA_DISABLE(hdma);
 80061d0:	687b      	ldr	r3, [r7, #4]
 80061d2:	681b      	ldr	r3, [r3, #0]
 80061d4:	4a6c      	ldr	r2, [pc, #432]	@ (8006388 <HAL_DMA_Abort_IT+0x3a8>)
 80061d6:	4293      	cmp	r3, r2
 80061d8:	d04a      	beq.n	8006270 <HAL_DMA_Abort_IT+0x290>
 80061da:	687b      	ldr	r3, [r7, #4]
 80061dc:	681b      	ldr	r3, [r3, #0]
 80061de:	4a6b      	ldr	r2, [pc, #428]	@ (800638c <HAL_DMA_Abort_IT+0x3ac>)
 80061e0:	4293      	cmp	r3, r2
 80061e2:	d045      	beq.n	8006270 <HAL_DMA_Abort_IT+0x290>
 80061e4:	687b      	ldr	r3, [r7, #4]
 80061e6:	681b      	ldr	r3, [r3, #0]
 80061e8:	4a69      	ldr	r2, [pc, #420]	@ (8006390 <HAL_DMA_Abort_IT+0x3b0>)
 80061ea:	4293      	cmp	r3, r2
 80061ec:	d040      	beq.n	8006270 <HAL_DMA_Abort_IT+0x290>
 80061ee:	687b      	ldr	r3, [r7, #4]
 80061f0:	681b      	ldr	r3, [r3, #0]
 80061f2:	4a68      	ldr	r2, [pc, #416]	@ (8006394 <HAL_DMA_Abort_IT+0x3b4>)
 80061f4:	4293      	cmp	r3, r2
 80061f6:	d03b      	beq.n	8006270 <HAL_DMA_Abort_IT+0x290>
 80061f8:	687b      	ldr	r3, [r7, #4]
 80061fa:	681b      	ldr	r3, [r3, #0]
 80061fc:	4a66      	ldr	r2, [pc, #408]	@ (8006398 <HAL_DMA_Abort_IT+0x3b8>)
 80061fe:	4293      	cmp	r3, r2
 8006200:	d036      	beq.n	8006270 <HAL_DMA_Abort_IT+0x290>
 8006202:	687b      	ldr	r3, [r7, #4]
 8006204:	681b      	ldr	r3, [r3, #0]
 8006206:	4a65      	ldr	r2, [pc, #404]	@ (800639c <HAL_DMA_Abort_IT+0x3bc>)
 8006208:	4293      	cmp	r3, r2
 800620a:	d031      	beq.n	8006270 <HAL_DMA_Abort_IT+0x290>
 800620c:	687b      	ldr	r3, [r7, #4]
 800620e:	681b      	ldr	r3, [r3, #0]
 8006210:	4a63      	ldr	r2, [pc, #396]	@ (80063a0 <HAL_DMA_Abort_IT+0x3c0>)
 8006212:	4293      	cmp	r3, r2
 8006214:	d02c      	beq.n	8006270 <HAL_DMA_Abort_IT+0x290>
 8006216:	687b      	ldr	r3, [r7, #4]
 8006218:	681b      	ldr	r3, [r3, #0]
 800621a:	4a62      	ldr	r2, [pc, #392]	@ (80063a4 <HAL_DMA_Abort_IT+0x3c4>)
 800621c:	4293      	cmp	r3, r2
 800621e:	d027      	beq.n	8006270 <HAL_DMA_Abort_IT+0x290>
 8006220:	687b      	ldr	r3, [r7, #4]
 8006222:	681b      	ldr	r3, [r3, #0]
 8006224:	4a60      	ldr	r2, [pc, #384]	@ (80063a8 <HAL_DMA_Abort_IT+0x3c8>)
 8006226:	4293      	cmp	r3, r2
 8006228:	d022      	beq.n	8006270 <HAL_DMA_Abort_IT+0x290>
 800622a:	687b      	ldr	r3, [r7, #4]
 800622c:	681b      	ldr	r3, [r3, #0]
 800622e:	4a5f      	ldr	r2, [pc, #380]	@ (80063ac <HAL_DMA_Abort_IT+0x3cc>)
 8006230:	4293      	cmp	r3, r2
 8006232:	d01d      	beq.n	8006270 <HAL_DMA_Abort_IT+0x290>
 8006234:	687b      	ldr	r3, [r7, #4]
 8006236:	681b      	ldr	r3, [r3, #0]
 8006238:	4a5d      	ldr	r2, [pc, #372]	@ (80063b0 <HAL_DMA_Abort_IT+0x3d0>)
 800623a:	4293      	cmp	r3, r2
 800623c:	d018      	beq.n	8006270 <HAL_DMA_Abort_IT+0x290>
 800623e:	687b      	ldr	r3, [r7, #4]
 8006240:	681b      	ldr	r3, [r3, #0]
 8006242:	4a5c      	ldr	r2, [pc, #368]	@ (80063b4 <HAL_DMA_Abort_IT+0x3d4>)
 8006244:	4293      	cmp	r3, r2
 8006246:	d013      	beq.n	8006270 <HAL_DMA_Abort_IT+0x290>
 8006248:	687b      	ldr	r3, [r7, #4]
 800624a:	681b      	ldr	r3, [r3, #0]
 800624c:	4a5a      	ldr	r2, [pc, #360]	@ (80063b8 <HAL_DMA_Abort_IT+0x3d8>)
 800624e:	4293      	cmp	r3, r2
 8006250:	d00e      	beq.n	8006270 <HAL_DMA_Abort_IT+0x290>
 8006252:	687b      	ldr	r3, [r7, #4]
 8006254:	681b      	ldr	r3, [r3, #0]
 8006256:	4a59      	ldr	r2, [pc, #356]	@ (80063bc <HAL_DMA_Abort_IT+0x3dc>)
 8006258:	4293      	cmp	r3, r2
 800625a:	d009      	beq.n	8006270 <HAL_DMA_Abort_IT+0x290>
 800625c:	687b      	ldr	r3, [r7, #4]
 800625e:	681b      	ldr	r3, [r3, #0]
 8006260:	4a57      	ldr	r2, [pc, #348]	@ (80063c0 <HAL_DMA_Abort_IT+0x3e0>)
 8006262:	4293      	cmp	r3, r2
 8006264:	d004      	beq.n	8006270 <HAL_DMA_Abort_IT+0x290>
 8006266:	687b      	ldr	r3, [r7, #4]
 8006268:	681b      	ldr	r3, [r3, #0]
 800626a:	4a56      	ldr	r2, [pc, #344]	@ (80063c4 <HAL_DMA_Abort_IT+0x3e4>)
 800626c:	4293      	cmp	r3, r2
 800626e:	d108      	bne.n	8006282 <HAL_DMA_Abort_IT+0x2a2>
 8006270:	687b      	ldr	r3, [r7, #4]
 8006272:	681b      	ldr	r3, [r3, #0]
 8006274:	681a      	ldr	r2, [r3, #0]
 8006276:	687b      	ldr	r3, [r7, #4]
 8006278:	681b      	ldr	r3, [r3, #0]
 800627a:	f022 0201 	bic.w	r2, r2, #1
 800627e:	601a      	str	r2, [r3, #0]
 8006280:	e007      	b.n	8006292 <HAL_DMA_Abort_IT+0x2b2>
 8006282:	687b      	ldr	r3, [r7, #4]
 8006284:	681b      	ldr	r3, [r3, #0]
 8006286:	681a      	ldr	r2, [r3, #0]
 8006288:	687b      	ldr	r3, [r7, #4]
 800628a:	681b      	ldr	r3, [r3, #0]
 800628c:	f022 0201 	bic.w	r2, r2, #1
 8006290:	601a      	str	r2, [r3, #0]

      if(IS_DMA_DMAMUX_ALL_INSTANCE(hdma->Instance) != 0U) /* No DMAMUX available for BDMA1 */
 8006292:	687b      	ldr	r3, [r7, #4]
 8006294:	681b      	ldr	r3, [r3, #0]
 8006296:	4a3c      	ldr	r2, [pc, #240]	@ (8006388 <HAL_DMA_Abort_IT+0x3a8>)
 8006298:	4293      	cmp	r3, r2
 800629a:	d072      	beq.n	8006382 <HAL_DMA_Abort_IT+0x3a2>
 800629c:	687b      	ldr	r3, [r7, #4]
 800629e:	681b      	ldr	r3, [r3, #0]
 80062a0:	4a3a      	ldr	r2, [pc, #232]	@ (800638c <HAL_DMA_Abort_IT+0x3ac>)
 80062a2:	4293      	cmp	r3, r2
 80062a4:	d06d      	beq.n	8006382 <HAL_DMA_Abort_IT+0x3a2>
 80062a6:	687b      	ldr	r3, [r7, #4]
 80062a8:	681b      	ldr	r3, [r3, #0]
 80062aa:	4a39      	ldr	r2, [pc, #228]	@ (8006390 <HAL_DMA_Abort_IT+0x3b0>)
 80062ac:	4293      	cmp	r3, r2
 80062ae:	d068      	beq.n	8006382 <HAL_DMA_Abort_IT+0x3a2>
 80062b0:	687b      	ldr	r3, [r7, #4]
 80062b2:	681b      	ldr	r3, [r3, #0]
 80062b4:	4a37      	ldr	r2, [pc, #220]	@ (8006394 <HAL_DMA_Abort_IT+0x3b4>)
 80062b6:	4293      	cmp	r3, r2
 80062b8:	d063      	beq.n	8006382 <HAL_DMA_Abort_IT+0x3a2>
 80062ba:	687b      	ldr	r3, [r7, #4]
 80062bc:	681b      	ldr	r3, [r3, #0]
 80062be:	4a36      	ldr	r2, [pc, #216]	@ (8006398 <HAL_DMA_Abort_IT+0x3b8>)
 80062c0:	4293      	cmp	r3, r2
 80062c2:	d05e      	beq.n	8006382 <HAL_DMA_Abort_IT+0x3a2>
 80062c4:	687b      	ldr	r3, [r7, #4]
 80062c6:	681b      	ldr	r3, [r3, #0]
 80062c8:	4a34      	ldr	r2, [pc, #208]	@ (800639c <HAL_DMA_Abort_IT+0x3bc>)
 80062ca:	4293      	cmp	r3, r2
 80062cc:	d059      	beq.n	8006382 <HAL_DMA_Abort_IT+0x3a2>
 80062ce:	687b      	ldr	r3, [r7, #4]
 80062d0:	681b      	ldr	r3, [r3, #0]
 80062d2:	4a33      	ldr	r2, [pc, #204]	@ (80063a0 <HAL_DMA_Abort_IT+0x3c0>)
 80062d4:	4293      	cmp	r3, r2
 80062d6:	d054      	beq.n	8006382 <HAL_DMA_Abort_IT+0x3a2>
 80062d8:	687b      	ldr	r3, [r7, #4]
 80062da:	681b      	ldr	r3, [r3, #0]
 80062dc:	4a31      	ldr	r2, [pc, #196]	@ (80063a4 <HAL_DMA_Abort_IT+0x3c4>)
 80062de:	4293      	cmp	r3, r2
 80062e0:	d04f      	beq.n	8006382 <HAL_DMA_Abort_IT+0x3a2>
 80062e2:	687b      	ldr	r3, [r7, #4]
 80062e4:	681b      	ldr	r3, [r3, #0]
 80062e6:	4a30      	ldr	r2, [pc, #192]	@ (80063a8 <HAL_DMA_Abort_IT+0x3c8>)
 80062e8:	4293      	cmp	r3, r2
 80062ea:	d04a      	beq.n	8006382 <HAL_DMA_Abort_IT+0x3a2>
 80062ec:	687b      	ldr	r3, [r7, #4]
 80062ee:	681b      	ldr	r3, [r3, #0]
 80062f0:	4a2e      	ldr	r2, [pc, #184]	@ (80063ac <HAL_DMA_Abort_IT+0x3cc>)
 80062f2:	4293      	cmp	r3, r2
 80062f4:	d045      	beq.n	8006382 <HAL_DMA_Abort_IT+0x3a2>
 80062f6:	687b      	ldr	r3, [r7, #4]
 80062f8:	681b      	ldr	r3, [r3, #0]
 80062fa:	4a2d      	ldr	r2, [pc, #180]	@ (80063b0 <HAL_DMA_Abort_IT+0x3d0>)
 80062fc:	4293      	cmp	r3, r2
 80062fe:	d040      	beq.n	8006382 <HAL_DMA_Abort_IT+0x3a2>
 8006300:	687b      	ldr	r3, [r7, #4]
 8006302:	681b      	ldr	r3, [r3, #0]
 8006304:	4a2b      	ldr	r2, [pc, #172]	@ (80063b4 <HAL_DMA_Abort_IT+0x3d4>)
 8006306:	4293      	cmp	r3, r2
 8006308:	d03b      	beq.n	8006382 <HAL_DMA_Abort_IT+0x3a2>
 800630a:	687b      	ldr	r3, [r7, #4]
 800630c:	681b      	ldr	r3, [r3, #0]
 800630e:	4a2a      	ldr	r2, [pc, #168]	@ (80063b8 <HAL_DMA_Abort_IT+0x3d8>)
 8006310:	4293      	cmp	r3, r2
 8006312:	d036      	beq.n	8006382 <HAL_DMA_Abort_IT+0x3a2>
 8006314:	687b      	ldr	r3, [r7, #4]
 8006316:	681b      	ldr	r3, [r3, #0]
 8006318:	4a28      	ldr	r2, [pc, #160]	@ (80063bc <HAL_DMA_Abort_IT+0x3dc>)
 800631a:	4293      	cmp	r3, r2
 800631c:	d031      	beq.n	8006382 <HAL_DMA_Abort_IT+0x3a2>
 800631e:	687b      	ldr	r3, [r7, #4]
 8006320:	681b      	ldr	r3, [r3, #0]
 8006322:	4a27      	ldr	r2, [pc, #156]	@ (80063c0 <HAL_DMA_Abort_IT+0x3e0>)
 8006324:	4293      	cmp	r3, r2
 8006326:	d02c      	beq.n	8006382 <HAL_DMA_Abort_IT+0x3a2>
 8006328:	687b      	ldr	r3, [r7, #4]
 800632a:	681b      	ldr	r3, [r3, #0]
 800632c:	4a25      	ldr	r2, [pc, #148]	@ (80063c4 <HAL_DMA_Abort_IT+0x3e4>)
 800632e:	4293      	cmp	r3, r2
 8006330:	d027      	beq.n	8006382 <HAL_DMA_Abort_IT+0x3a2>
 8006332:	687b      	ldr	r3, [r7, #4]
 8006334:	681b      	ldr	r3, [r3, #0]
 8006336:	4a24      	ldr	r2, [pc, #144]	@ (80063c8 <HAL_DMA_Abort_IT+0x3e8>)
 8006338:	4293      	cmp	r3, r2
 800633a:	d022      	beq.n	8006382 <HAL_DMA_Abort_IT+0x3a2>
 800633c:	687b      	ldr	r3, [r7, #4]
 800633e:	681b      	ldr	r3, [r3, #0]
 8006340:	4a22      	ldr	r2, [pc, #136]	@ (80063cc <HAL_DMA_Abort_IT+0x3ec>)
 8006342:	4293      	cmp	r3, r2
 8006344:	d01d      	beq.n	8006382 <HAL_DMA_Abort_IT+0x3a2>
 8006346:	687b      	ldr	r3, [r7, #4]
 8006348:	681b      	ldr	r3, [r3, #0]
 800634a:	4a21      	ldr	r2, [pc, #132]	@ (80063d0 <HAL_DMA_Abort_IT+0x3f0>)
 800634c:	4293      	cmp	r3, r2
 800634e:	d018      	beq.n	8006382 <HAL_DMA_Abort_IT+0x3a2>
 8006350:	687b      	ldr	r3, [r7, #4]
 8006352:	681b      	ldr	r3, [r3, #0]
 8006354:	4a1f      	ldr	r2, [pc, #124]	@ (80063d4 <HAL_DMA_Abort_IT+0x3f4>)
 8006356:	4293      	cmp	r3, r2
 8006358:	d013      	beq.n	8006382 <HAL_DMA_Abort_IT+0x3a2>
 800635a:	687b      	ldr	r3, [r7, #4]
 800635c:	681b      	ldr	r3, [r3, #0]
 800635e:	4a1e      	ldr	r2, [pc, #120]	@ (80063d8 <HAL_DMA_Abort_IT+0x3f8>)
 8006360:	4293      	cmp	r3, r2
 8006362:	d00e      	beq.n	8006382 <HAL_DMA_Abort_IT+0x3a2>
 8006364:	687b      	ldr	r3, [r7, #4]
 8006366:	681b      	ldr	r3, [r3, #0]
 8006368:	4a1c      	ldr	r2, [pc, #112]	@ (80063dc <HAL_DMA_Abort_IT+0x3fc>)
 800636a:	4293      	cmp	r3, r2
 800636c:	d009      	beq.n	8006382 <HAL_DMA_Abort_IT+0x3a2>
 800636e:	687b      	ldr	r3, [r7, #4]
 8006370:	681b      	ldr	r3, [r3, #0]
 8006372:	4a1b      	ldr	r2, [pc, #108]	@ (80063e0 <HAL_DMA_Abort_IT+0x400>)
 8006374:	4293      	cmp	r3, r2
 8006376:	d004      	beq.n	8006382 <HAL_DMA_Abort_IT+0x3a2>
 8006378:	687b      	ldr	r3, [r7, #4]
 800637a:	681b      	ldr	r3, [r3, #0]
 800637c:	4a19      	ldr	r2, [pc, #100]	@ (80063e4 <HAL_DMA_Abort_IT+0x404>)
 800637e:	4293      	cmp	r3, r2
 8006380:	d132      	bne.n	80063e8 <HAL_DMA_Abort_IT+0x408>
 8006382:	2301      	movs	r3, #1
 8006384:	e031      	b.n	80063ea <HAL_DMA_Abort_IT+0x40a>
 8006386:	bf00      	nop
 8006388:	40020010 	.word	0x40020010
 800638c:	40020028 	.word	0x40020028
 8006390:	40020040 	.word	0x40020040
 8006394:	40020058 	.word	0x40020058
 8006398:	40020070 	.word	0x40020070
 800639c:	40020088 	.word	0x40020088
 80063a0:	400200a0 	.word	0x400200a0
 80063a4:	400200b8 	.word	0x400200b8
 80063a8:	40020410 	.word	0x40020410
 80063ac:	40020428 	.word	0x40020428
 80063b0:	40020440 	.word	0x40020440
 80063b4:	40020458 	.word	0x40020458
 80063b8:	40020470 	.word	0x40020470
 80063bc:	40020488 	.word	0x40020488
 80063c0:	400204a0 	.word	0x400204a0
 80063c4:	400204b8 	.word	0x400204b8
 80063c8:	58025408 	.word	0x58025408
 80063cc:	5802541c 	.word	0x5802541c
 80063d0:	58025430 	.word	0x58025430
 80063d4:	58025444 	.word	0x58025444
 80063d8:	58025458 	.word	0x58025458
 80063dc:	5802546c 	.word	0x5802546c
 80063e0:	58025480 	.word	0x58025480
 80063e4:	58025494 	.word	0x58025494
 80063e8:	2300      	movs	r3, #0
 80063ea:	2b00      	cmp	r3, #0
 80063ec:	d028      	beq.n	8006440 <HAL_DMA_Abort_IT+0x460>
      {
        /* disable the DMAMUX sync overrun IT */
        hdma->DMAmuxChannel->CCR &= ~DMAMUX_CxCR_SOIE;
 80063ee:	687b      	ldr	r3, [r7, #4]
 80063f0:	6e1b      	ldr	r3, [r3, #96]	@ 0x60
 80063f2:	681a      	ldr	r2, [r3, #0]
 80063f4:	687b      	ldr	r3, [r7, #4]
 80063f6:	6e1b      	ldr	r3, [r3, #96]	@ 0x60
 80063f8:	f422 7280 	bic.w	r2, r2, #256	@ 0x100
 80063fc:	601a      	str	r2, [r3, #0]

        /* Clear all flags */
        regs_bdma = (BDMA_Base_Registers *)hdma->StreamBaseAddress;
 80063fe:	687b      	ldr	r3, [r7, #4]
 8006400:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 8006402:	60fb      	str	r3, [r7, #12]
        regs_bdma->IFCR = ((BDMA_IFCR_CGIF0) << (hdma->StreamIndex & 0x1FU));
 8006404:	687b      	ldr	r3, [r7, #4]
 8006406:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 8006408:	f003 031f 	and.w	r3, r3, #31
 800640c:	2201      	movs	r2, #1
 800640e:	409a      	lsls	r2, r3
 8006410:	68fb      	ldr	r3, [r7, #12]
 8006412:	605a      	str	r2, [r3, #4]

        /* Clear the DMAMUX synchro overrun flag */
        hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask;
 8006414:	687b      	ldr	r3, [r7, #4]
 8006416:	6e5b      	ldr	r3, [r3, #100]	@ 0x64
 8006418:	687a      	ldr	r2, [r7, #4]
 800641a:	6e92      	ldr	r2, [r2, #104]	@ 0x68
 800641c:	605a      	str	r2, [r3, #4]

        if(hdma->DMAmuxRequestGen != 0U)
 800641e:	687b      	ldr	r3, [r7, #4]
 8006420:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8006422:	2b00      	cmp	r3, #0
 8006424:	d00c      	beq.n	8006440 <HAL_DMA_Abort_IT+0x460>
        {
          /* if using DMAMUX request generator, disable the DMAMUX request generator overrun IT*/
          /* disable the request gen overrun IT */
          hdma->DMAmuxRequestGen->RGCR &= ~DMAMUX_RGxCR_OIE;
 8006426:	687b      	ldr	r3, [r7, #4]
 8006428:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 800642a:	681a      	ldr	r2, [r3, #0]
 800642c:	687b      	ldr	r3, [r7, #4]
 800642e:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8006430:	f422 7280 	bic.w	r2, r2, #256	@ 0x100
 8006434:	601a      	str	r2, [r3, #0]

          /* Clear the DMAMUX request generator overrun flag */
          hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask;
 8006436:	687b      	ldr	r3, [r7, #4]
 8006438:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800643a:	687a      	ldr	r2, [r7, #4]
 800643c:	6f52      	ldr	r2, [r2, #116]	@ 0x74
 800643e:	605a      	str	r2, [r3, #4]
        }
      }

      /* Change the DMA state */
      hdma->State = HAL_DMA_STATE_READY;
 8006440:	687b      	ldr	r3, [r7, #4]
 8006442:	2201      	movs	r2, #1
 8006444:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

      /* Process Unlocked */
      __HAL_UNLOCK(hdma);
 8006448:	687b      	ldr	r3, [r7, #4]
 800644a:	2200      	movs	r2, #0
 800644c:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34

      /* Call User Abort callback */
      if(hdma->XferAbortCallback != NULL)
 8006450:	687b      	ldr	r3, [r7, #4]
 8006452:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 8006454:	2b00      	cmp	r3, #0
 8006456:	d003      	beq.n	8006460 <HAL_DMA_Abort_IT+0x480>
      {
        hdma->XferAbortCallback(hdma);
 8006458:	687b      	ldr	r3, [r7, #4]
 800645a:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800645c:	6878      	ldr	r0, [r7, #4]
 800645e:	4798      	blx	r3
      }
    }
  }

  return HAL_OK;
 8006460:	2300      	movs	r3, #0
}
 8006462:	4618      	mov	r0, r3
 8006464:	3710      	adds	r7, #16
 8006466:	46bd      	mov	sp, r7
 8006468:	bd80      	pop	{r7, pc}
 800646a:	bf00      	nop

0800646c <HAL_DMA_IRQHandler>:
  * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
  *               the configuration information for the specified DMA Stream.
  * @retval None
  */
void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
{
 800646c:	b580      	push	{r7, lr}
 800646e:	b08a      	sub	sp, #40	@ 0x28
 8006470:	af00      	add	r7, sp, #0
 8006472:	6078      	str	r0, [r7, #4]
  uint32_t tmpisr_dma, tmpisr_bdma;
  uint32_t ccr_reg;
  __IO uint32_t count = 0U;
 8006474:	2300      	movs	r3, #0
 8006476:	60fb      	str	r3, [r7, #12]
  uint32_t timeout = SystemCoreClock / 9600U;
 8006478:	4b67      	ldr	r3, [pc, #412]	@ (8006618 <HAL_DMA_IRQHandler+0x1ac>)
 800647a:	681b      	ldr	r3, [r3, #0]
 800647c:	4a67      	ldr	r2, [pc, #412]	@ (800661c <HAL_DMA_IRQHandler+0x1b0>)
 800647e:	fba2 2303 	umull	r2, r3, r2, r3
 8006482:	0a9b      	lsrs	r3, r3, #10
 8006484:	627b      	str	r3, [r7, #36]	@ 0x24

  /* calculate DMA base and stream number */
  DMA_Base_Registers  *regs_dma  = (DMA_Base_Registers *)hdma->StreamBaseAddress;
 8006486:	687b      	ldr	r3, [r7, #4]
 8006488:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800648a:	623b      	str	r3, [r7, #32]
  BDMA_Base_Registers *regs_bdma = (BDMA_Base_Registers *)hdma->StreamBaseAddress;
 800648c:	687b      	ldr	r3, [r7, #4]
 800648e:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 8006490:	61fb      	str	r3, [r7, #28]

  tmpisr_dma  = regs_dma->ISR;
 8006492:	6a3b      	ldr	r3, [r7, #32]
 8006494:	681b      	ldr	r3, [r3, #0]
 8006496:	61bb      	str	r3, [r7, #24]
  tmpisr_bdma = regs_bdma->ISR;
 8006498:	69fb      	ldr	r3, [r7, #28]
 800649a:	681b      	ldr	r3, [r3, #0]
 800649c:	617b      	str	r3, [r7, #20]

  if(IS_DMA_STREAM_INSTANCE(hdma->Instance) != 0U)  /* DMA1 or DMA2 instance */
 800649e:	687b      	ldr	r3, [r7, #4]
 80064a0:	681b      	ldr	r3, [r3, #0]
 80064a2:	4a5f      	ldr	r2, [pc, #380]	@ (8006620 <HAL_DMA_IRQHandler+0x1b4>)
 80064a4:	4293      	cmp	r3, r2
 80064a6:	d04a      	beq.n	800653e <HAL_DMA_IRQHandler+0xd2>
 80064a8:	687b      	ldr	r3, [r7, #4]
 80064aa:	681b      	ldr	r3, [r3, #0]
 80064ac:	4a5d      	ldr	r2, [pc, #372]	@ (8006624 <HAL_DMA_IRQHandler+0x1b8>)
 80064ae:	4293      	cmp	r3, r2
 80064b0:	d045      	beq.n	800653e <HAL_DMA_IRQHandler+0xd2>
 80064b2:	687b      	ldr	r3, [r7, #4]
 80064b4:	681b      	ldr	r3, [r3, #0]
 80064b6:	4a5c      	ldr	r2, [pc, #368]	@ (8006628 <HAL_DMA_IRQHandler+0x1bc>)
 80064b8:	4293      	cmp	r3, r2
 80064ba:	d040      	beq.n	800653e <HAL_DMA_IRQHandler+0xd2>
 80064bc:	687b      	ldr	r3, [r7, #4]
 80064be:	681b      	ldr	r3, [r3, #0]
 80064c0:	4a5a      	ldr	r2, [pc, #360]	@ (800662c <HAL_DMA_IRQHandler+0x1c0>)
 80064c2:	4293      	cmp	r3, r2
 80064c4:	d03b      	beq.n	800653e <HAL_DMA_IRQHandler+0xd2>
 80064c6:	687b      	ldr	r3, [r7, #4]
 80064c8:	681b      	ldr	r3, [r3, #0]
 80064ca:	4a59      	ldr	r2, [pc, #356]	@ (8006630 <HAL_DMA_IRQHandler+0x1c4>)
 80064cc:	4293      	cmp	r3, r2
 80064ce:	d036      	beq.n	800653e <HAL_DMA_IRQHandler+0xd2>
 80064d0:	687b      	ldr	r3, [r7, #4]
 80064d2:	681b      	ldr	r3, [r3, #0]
 80064d4:	4a57      	ldr	r2, [pc, #348]	@ (8006634 <HAL_DMA_IRQHandler+0x1c8>)
 80064d6:	4293      	cmp	r3, r2
 80064d8:	d031      	beq.n	800653e <HAL_DMA_IRQHandler+0xd2>
 80064da:	687b      	ldr	r3, [r7, #4]
 80064dc:	681b      	ldr	r3, [r3, #0]
 80064de:	4a56      	ldr	r2, [pc, #344]	@ (8006638 <HAL_DMA_IRQHandler+0x1cc>)
 80064e0:	4293      	cmp	r3, r2
 80064e2:	d02c      	beq.n	800653e <HAL_DMA_IRQHandler+0xd2>
 80064e4:	687b      	ldr	r3, [r7, #4]
 80064e6:	681b      	ldr	r3, [r3, #0]
 80064e8:	4a54      	ldr	r2, [pc, #336]	@ (800663c <HAL_DMA_IRQHandler+0x1d0>)
 80064ea:	4293      	cmp	r3, r2
 80064ec:	d027      	beq.n	800653e <HAL_DMA_IRQHandler+0xd2>
 80064ee:	687b      	ldr	r3, [r7, #4]
 80064f0:	681b      	ldr	r3, [r3, #0]
 80064f2:	4a53      	ldr	r2, [pc, #332]	@ (8006640 <HAL_DMA_IRQHandler+0x1d4>)
 80064f4:	4293      	cmp	r3, r2
 80064f6:	d022      	beq.n	800653e <HAL_DMA_IRQHandler+0xd2>
 80064f8:	687b      	ldr	r3, [r7, #4]
 80064fa:	681b      	ldr	r3, [r3, #0]
 80064fc:	4a51      	ldr	r2, [pc, #324]	@ (8006644 <HAL_DMA_IRQHandler+0x1d8>)
 80064fe:	4293      	cmp	r3, r2
 8006500:	d01d      	beq.n	800653e <HAL_DMA_IRQHandler+0xd2>
 8006502:	687b      	ldr	r3, [r7, #4]
 8006504:	681b      	ldr	r3, [r3, #0]
 8006506:	4a50      	ldr	r2, [pc, #320]	@ (8006648 <HAL_DMA_IRQHandler+0x1dc>)
 8006508:	4293      	cmp	r3, r2
 800650a:	d018      	beq.n	800653e <HAL_DMA_IRQHandler+0xd2>
 800650c:	687b      	ldr	r3, [r7, #4]
 800650e:	681b      	ldr	r3, [r3, #0]
 8006510:	4a4e      	ldr	r2, [pc, #312]	@ (800664c <HAL_DMA_IRQHandler+0x1e0>)
 8006512:	4293      	cmp	r3, r2
 8006514:	d013      	beq.n	800653e <HAL_DMA_IRQHandler+0xd2>
 8006516:	687b      	ldr	r3, [r7, #4]
 8006518:	681b      	ldr	r3, [r3, #0]
 800651a:	4a4d      	ldr	r2, [pc, #308]	@ (8006650 <HAL_DMA_IRQHandler+0x1e4>)
 800651c:	4293      	cmp	r3, r2
 800651e:	d00e      	beq.n	800653e <HAL_DMA_IRQHandler+0xd2>
 8006520:	687b      	ldr	r3, [r7, #4]
 8006522:	681b      	ldr	r3, [r3, #0]
 8006524:	4a4b      	ldr	r2, [pc, #300]	@ (8006654 <HAL_DMA_IRQHandler+0x1e8>)
 8006526:	4293      	cmp	r3, r2
 8006528:	d009      	beq.n	800653e <HAL_DMA_IRQHandler+0xd2>
 800652a:	687b      	ldr	r3, [r7, #4]
 800652c:	681b      	ldr	r3, [r3, #0]
 800652e:	4a4a      	ldr	r2, [pc, #296]	@ (8006658 <HAL_DMA_IRQHandler+0x1ec>)
 8006530:	4293      	cmp	r3, r2
 8006532:	d004      	beq.n	800653e <HAL_DMA_IRQHandler+0xd2>
 8006534:	687b      	ldr	r3, [r7, #4]
 8006536:	681b      	ldr	r3, [r3, #0]
 8006538:	4a48      	ldr	r2, [pc, #288]	@ (800665c <HAL_DMA_IRQHandler+0x1f0>)
 800653a:	4293      	cmp	r3, r2
 800653c:	d101      	bne.n	8006542 <HAL_DMA_IRQHandler+0xd6>
 800653e:	2301      	movs	r3, #1
 8006540:	e000      	b.n	8006544 <HAL_DMA_IRQHandler+0xd8>
 8006542:	2300      	movs	r3, #0
 8006544:	2b00      	cmp	r3, #0
 8006546:	f000 842b 	beq.w	8006da0 <HAL_DMA_IRQHandler+0x934>
  {
    /* Transfer Error Interrupt management ***************************************/
    if ((tmpisr_dma & (DMA_FLAG_TEIF0_4 << (hdma->StreamIndex & 0x1FU))) != 0U)
 800654a:	687b      	ldr	r3, [r7, #4]
 800654c:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 800654e:	f003 031f 	and.w	r3, r3, #31
 8006552:	2208      	movs	r2, #8
 8006554:	409a      	lsls	r2, r3
 8006556:	69bb      	ldr	r3, [r7, #24]
 8006558:	4013      	ands	r3, r2
 800655a:	2b00      	cmp	r3, #0
 800655c:	f000 80a2 	beq.w	80066a4 <HAL_DMA_IRQHandler+0x238>
    {
      if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_TE) != 0U)
 8006560:	687b      	ldr	r3, [r7, #4]
 8006562:	681b      	ldr	r3, [r3, #0]
 8006564:	4a2e      	ldr	r2, [pc, #184]	@ (8006620 <HAL_DMA_IRQHandler+0x1b4>)
 8006566:	4293      	cmp	r3, r2
 8006568:	d04a      	beq.n	8006600 <HAL_DMA_IRQHandler+0x194>
 800656a:	687b      	ldr	r3, [r7, #4]
 800656c:	681b      	ldr	r3, [r3, #0]
 800656e:	4a2d      	ldr	r2, [pc, #180]	@ (8006624 <HAL_DMA_IRQHandler+0x1b8>)
 8006570:	4293      	cmp	r3, r2
 8006572:	d045      	beq.n	8006600 <HAL_DMA_IRQHandler+0x194>
 8006574:	687b      	ldr	r3, [r7, #4]
 8006576:	681b      	ldr	r3, [r3, #0]
 8006578:	4a2b      	ldr	r2, [pc, #172]	@ (8006628 <HAL_DMA_IRQHandler+0x1bc>)
 800657a:	4293      	cmp	r3, r2
 800657c:	d040      	beq.n	8006600 <HAL_DMA_IRQHandler+0x194>
 800657e:	687b      	ldr	r3, [r7, #4]
 8006580:	681b      	ldr	r3, [r3, #0]
 8006582:	4a2a      	ldr	r2, [pc, #168]	@ (800662c <HAL_DMA_IRQHandler+0x1c0>)
 8006584:	4293      	cmp	r3, r2
 8006586:	d03b      	beq.n	8006600 <HAL_DMA_IRQHandler+0x194>
 8006588:	687b      	ldr	r3, [r7, #4]
 800658a:	681b      	ldr	r3, [r3, #0]
 800658c:	4a28      	ldr	r2, [pc, #160]	@ (8006630 <HAL_DMA_IRQHandler+0x1c4>)
 800658e:	4293      	cmp	r3, r2
 8006590:	d036      	beq.n	8006600 <HAL_DMA_IRQHandler+0x194>
 8006592:	687b      	ldr	r3, [r7, #4]
 8006594:	681b      	ldr	r3, [r3, #0]
 8006596:	4a27      	ldr	r2, [pc, #156]	@ (8006634 <HAL_DMA_IRQHandler+0x1c8>)
 8006598:	4293      	cmp	r3, r2
 800659a:	d031      	beq.n	8006600 <HAL_DMA_IRQHandler+0x194>
 800659c:	687b      	ldr	r3, [r7, #4]
 800659e:	681b      	ldr	r3, [r3, #0]
 80065a0:	4a25      	ldr	r2, [pc, #148]	@ (8006638 <HAL_DMA_IRQHandler+0x1cc>)
 80065a2:	4293      	cmp	r3, r2
 80065a4:	d02c      	beq.n	8006600 <HAL_DMA_IRQHandler+0x194>
 80065a6:	687b      	ldr	r3, [r7, #4]
 80065a8:	681b      	ldr	r3, [r3, #0]
 80065aa:	4a24      	ldr	r2, [pc, #144]	@ (800663c <HAL_DMA_IRQHandler+0x1d0>)
 80065ac:	4293      	cmp	r3, r2
 80065ae:	d027      	beq.n	8006600 <HAL_DMA_IRQHandler+0x194>
 80065b0:	687b      	ldr	r3, [r7, #4]
 80065b2:	681b      	ldr	r3, [r3, #0]
 80065b4:	4a22      	ldr	r2, [pc, #136]	@ (8006640 <HAL_DMA_IRQHandler+0x1d4>)
 80065b6:	4293      	cmp	r3, r2
 80065b8:	d022      	beq.n	8006600 <HAL_DMA_IRQHandler+0x194>
 80065ba:	687b      	ldr	r3, [r7, #4]
 80065bc:	681b      	ldr	r3, [r3, #0]
 80065be:	4a21      	ldr	r2, [pc, #132]	@ (8006644 <HAL_DMA_IRQHandler+0x1d8>)
 80065c0:	4293      	cmp	r3, r2
 80065c2:	d01d      	beq.n	8006600 <HAL_DMA_IRQHandler+0x194>
 80065c4:	687b      	ldr	r3, [r7, #4]
 80065c6:	681b      	ldr	r3, [r3, #0]
 80065c8:	4a1f      	ldr	r2, [pc, #124]	@ (8006648 <HAL_DMA_IRQHandler+0x1dc>)
 80065ca:	4293      	cmp	r3, r2
 80065cc:	d018      	beq.n	8006600 <HAL_DMA_IRQHandler+0x194>
 80065ce:	687b      	ldr	r3, [r7, #4]
 80065d0:	681b      	ldr	r3, [r3, #0]
 80065d2:	4a1e      	ldr	r2, [pc, #120]	@ (800664c <HAL_DMA_IRQHandler+0x1e0>)
 80065d4:	4293      	cmp	r3, r2
 80065d6:	d013      	beq.n	8006600 <HAL_DMA_IRQHandler+0x194>
 80065d8:	687b      	ldr	r3, [r7, #4]
 80065da:	681b      	ldr	r3, [r3, #0]
 80065dc:	4a1c      	ldr	r2, [pc, #112]	@ (8006650 <HAL_DMA_IRQHandler+0x1e4>)
 80065de:	4293      	cmp	r3, r2
 80065e0:	d00e      	beq.n	8006600 <HAL_DMA_IRQHandler+0x194>
 80065e2:	687b      	ldr	r3, [r7, #4]
 80065e4:	681b      	ldr	r3, [r3, #0]
 80065e6:	4a1b      	ldr	r2, [pc, #108]	@ (8006654 <HAL_DMA_IRQHandler+0x1e8>)
 80065e8:	4293      	cmp	r3, r2
 80065ea:	d009      	beq.n	8006600 <HAL_DMA_IRQHandler+0x194>
 80065ec:	687b      	ldr	r3, [r7, #4]
 80065ee:	681b      	ldr	r3, [r3, #0]
 80065f0:	4a19      	ldr	r2, [pc, #100]	@ (8006658 <HAL_DMA_IRQHandler+0x1ec>)
 80065f2:	4293      	cmp	r3, r2
 80065f4:	d004      	beq.n	8006600 <HAL_DMA_IRQHandler+0x194>
 80065f6:	687b      	ldr	r3, [r7, #4]
 80065f8:	681b      	ldr	r3, [r3, #0]
 80065fa:	4a18      	ldr	r2, [pc, #96]	@ (800665c <HAL_DMA_IRQHandler+0x1f0>)
 80065fc:	4293      	cmp	r3, r2
 80065fe:	d12f      	bne.n	8006660 <HAL_DMA_IRQHandler+0x1f4>
 8006600:	687b      	ldr	r3, [r7, #4]
 8006602:	681b      	ldr	r3, [r3, #0]
 8006604:	681b      	ldr	r3, [r3, #0]
 8006606:	f003 0304 	and.w	r3, r3, #4
 800660a:	2b00      	cmp	r3, #0
 800660c:	bf14      	ite	ne
 800660e:	2301      	movne	r3, #1
 8006610:	2300      	moveq	r3, #0
 8006612:	b2db      	uxtb	r3, r3
 8006614:	e02e      	b.n	8006674 <HAL_DMA_IRQHandler+0x208>
 8006616:	bf00      	nop
 8006618:	2400000c 	.word	0x2400000c
 800661c:	1b4e81b5 	.word	0x1b4e81b5
 8006620:	40020010 	.word	0x40020010
 8006624:	40020028 	.word	0x40020028
 8006628:	40020040 	.word	0x40020040
 800662c:	40020058 	.word	0x40020058
 8006630:	40020070 	.word	0x40020070
 8006634:	40020088 	.word	0x40020088
 8006638:	400200a0 	.word	0x400200a0
 800663c:	400200b8 	.word	0x400200b8
 8006640:	40020410 	.word	0x40020410
 8006644:	40020428 	.word	0x40020428
 8006648:	40020440 	.word	0x40020440
 800664c:	40020458 	.word	0x40020458
 8006650:	40020470 	.word	0x40020470
 8006654:	40020488 	.word	0x40020488
 8006658:	400204a0 	.word	0x400204a0
 800665c:	400204b8 	.word	0x400204b8
 8006660:	687b      	ldr	r3, [r7, #4]
 8006662:	681b      	ldr	r3, [r3, #0]
 8006664:	681b      	ldr	r3, [r3, #0]
 8006666:	f003 0308 	and.w	r3, r3, #8
 800666a:	2b00      	cmp	r3, #0
 800666c:	bf14      	ite	ne
 800666e:	2301      	movne	r3, #1
 8006670:	2300      	moveq	r3, #0
 8006672:	b2db      	uxtb	r3, r3
 8006674:	2b00      	cmp	r3, #0
 8006676:	d015      	beq.n	80066a4 <HAL_DMA_IRQHandler+0x238>
      {
        /* Disable the transfer error interrupt */
        ((DMA_Stream_TypeDef   *)hdma->Instance)->CR  &= ~(DMA_IT_TE);
 8006678:	687b      	ldr	r3, [r7, #4]
 800667a:	681b      	ldr	r3, [r3, #0]
 800667c:	681a      	ldr	r2, [r3, #0]
 800667e:	687b      	ldr	r3, [r7, #4]
 8006680:	681b      	ldr	r3, [r3, #0]
 8006682:	f022 0204 	bic.w	r2, r2, #4
 8006686:	601a      	str	r2, [r3, #0]

        /* Clear the transfer error flag */
        regs_dma->IFCR = DMA_FLAG_TEIF0_4 << (hdma->StreamIndex & 0x1FU);
 8006688:	687b      	ldr	r3, [r7, #4]
 800668a:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 800668c:	f003 031f 	and.w	r3, r3, #31
 8006690:	2208      	movs	r2, #8
 8006692:	409a      	lsls	r2, r3
 8006694:	6a3b      	ldr	r3, [r7, #32]
 8006696:	609a      	str	r2, [r3, #8]

        /* Update error code */
        hdma->ErrorCode |= HAL_DMA_ERROR_TE;
 8006698:	687b      	ldr	r3, [r7, #4]
 800669a:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800669c:	f043 0201 	orr.w	r2, r3, #1
 80066a0:	687b      	ldr	r3, [r7, #4]
 80066a2:	655a      	str	r2, [r3, #84]	@ 0x54
      }
    }
    /* FIFO Error Interrupt management ******************************************/
    if ((tmpisr_dma & (DMA_FLAG_FEIF0_4 << (hdma->StreamIndex & 0x1FU))) != 0U)
 80066a4:	687b      	ldr	r3, [r7, #4]
 80066a6:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 80066a8:	f003 031f 	and.w	r3, r3, #31
 80066ac:	69ba      	ldr	r2, [r7, #24]
 80066ae:	fa22 f303 	lsr.w	r3, r2, r3
 80066b2:	f003 0301 	and.w	r3, r3, #1
 80066b6:	2b00      	cmp	r3, #0
 80066b8:	d06e      	beq.n	8006798 <HAL_DMA_IRQHandler+0x32c>
    {
      if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_FE) != 0U)
 80066ba:	687b      	ldr	r3, [r7, #4]
 80066bc:	681b      	ldr	r3, [r3, #0]
 80066be:	4a69      	ldr	r2, [pc, #420]	@ (8006864 <HAL_DMA_IRQHandler+0x3f8>)
 80066c0:	4293      	cmp	r3, r2
 80066c2:	d04a      	beq.n	800675a <HAL_DMA_IRQHandler+0x2ee>
 80066c4:	687b      	ldr	r3, [r7, #4]
 80066c6:	681b      	ldr	r3, [r3, #0]
 80066c8:	4a67      	ldr	r2, [pc, #412]	@ (8006868 <HAL_DMA_IRQHandler+0x3fc>)
 80066ca:	4293      	cmp	r3, r2
 80066cc:	d045      	beq.n	800675a <HAL_DMA_IRQHandler+0x2ee>
 80066ce:	687b      	ldr	r3, [r7, #4]
 80066d0:	681b      	ldr	r3, [r3, #0]
 80066d2:	4a66      	ldr	r2, [pc, #408]	@ (800686c <HAL_DMA_IRQHandler+0x400>)
 80066d4:	4293      	cmp	r3, r2
 80066d6:	d040      	beq.n	800675a <HAL_DMA_IRQHandler+0x2ee>
 80066d8:	687b      	ldr	r3, [r7, #4]
 80066da:	681b      	ldr	r3, [r3, #0]
 80066dc:	4a64      	ldr	r2, [pc, #400]	@ (8006870 <HAL_DMA_IRQHandler+0x404>)
 80066de:	4293      	cmp	r3, r2
 80066e0:	d03b      	beq.n	800675a <HAL_DMA_IRQHandler+0x2ee>
 80066e2:	687b      	ldr	r3, [r7, #4]
 80066e4:	681b      	ldr	r3, [r3, #0]
 80066e6:	4a63      	ldr	r2, [pc, #396]	@ (8006874 <HAL_DMA_IRQHandler+0x408>)
 80066e8:	4293      	cmp	r3, r2
 80066ea:	d036      	beq.n	800675a <HAL_DMA_IRQHandler+0x2ee>
 80066ec:	687b      	ldr	r3, [r7, #4]
 80066ee:	681b      	ldr	r3, [r3, #0]
 80066f0:	4a61      	ldr	r2, [pc, #388]	@ (8006878 <HAL_DMA_IRQHandler+0x40c>)
 80066f2:	4293      	cmp	r3, r2
 80066f4:	d031      	beq.n	800675a <HAL_DMA_IRQHandler+0x2ee>
 80066f6:	687b      	ldr	r3, [r7, #4]
 80066f8:	681b      	ldr	r3, [r3, #0]
 80066fa:	4a60      	ldr	r2, [pc, #384]	@ (800687c <HAL_DMA_IRQHandler+0x410>)
 80066fc:	4293      	cmp	r3, r2
 80066fe:	d02c      	beq.n	800675a <HAL_DMA_IRQHandler+0x2ee>
 8006700:	687b      	ldr	r3, [r7, #4]
 8006702:	681b      	ldr	r3, [r3, #0]
 8006704:	4a5e      	ldr	r2, [pc, #376]	@ (8006880 <HAL_DMA_IRQHandler+0x414>)
 8006706:	4293      	cmp	r3, r2
 8006708:	d027      	beq.n	800675a <HAL_DMA_IRQHandler+0x2ee>
 800670a:	687b      	ldr	r3, [r7, #4]
 800670c:	681b      	ldr	r3, [r3, #0]
 800670e:	4a5d      	ldr	r2, [pc, #372]	@ (8006884 <HAL_DMA_IRQHandler+0x418>)
 8006710:	4293      	cmp	r3, r2
 8006712:	d022      	beq.n	800675a <HAL_DMA_IRQHandler+0x2ee>
 8006714:	687b      	ldr	r3, [r7, #4]
 8006716:	681b      	ldr	r3, [r3, #0]
 8006718:	4a5b      	ldr	r2, [pc, #364]	@ (8006888 <HAL_DMA_IRQHandler+0x41c>)
 800671a:	4293      	cmp	r3, r2
 800671c:	d01d      	beq.n	800675a <HAL_DMA_IRQHandler+0x2ee>
 800671e:	687b      	ldr	r3, [r7, #4]
 8006720:	681b      	ldr	r3, [r3, #0]
 8006722:	4a5a      	ldr	r2, [pc, #360]	@ (800688c <HAL_DMA_IRQHandler+0x420>)
 8006724:	4293      	cmp	r3, r2
 8006726:	d018      	beq.n	800675a <HAL_DMA_IRQHandler+0x2ee>
 8006728:	687b      	ldr	r3, [r7, #4]
 800672a:	681b      	ldr	r3, [r3, #0]
 800672c:	4a58      	ldr	r2, [pc, #352]	@ (8006890 <HAL_DMA_IRQHandler+0x424>)
 800672e:	4293      	cmp	r3, r2
 8006730:	d013      	beq.n	800675a <HAL_DMA_IRQHandler+0x2ee>
 8006732:	687b      	ldr	r3, [r7, #4]
 8006734:	681b      	ldr	r3, [r3, #0]
 8006736:	4a57      	ldr	r2, [pc, #348]	@ (8006894 <HAL_DMA_IRQHandler+0x428>)
 8006738:	4293      	cmp	r3, r2
 800673a:	d00e      	beq.n	800675a <HAL_DMA_IRQHandler+0x2ee>
 800673c:	687b      	ldr	r3, [r7, #4]
 800673e:	681b      	ldr	r3, [r3, #0]
 8006740:	4a55      	ldr	r2, [pc, #340]	@ (8006898 <HAL_DMA_IRQHandler+0x42c>)
 8006742:	4293      	cmp	r3, r2
 8006744:	d009      	beq.n	800675a <HAL_DMA_IRQHandler+0x2ee>
 8006746:	687b      	ldr	r3, [r7, #4]
 8006748:	681b      	ldr	r3, [r3, #0]
 800674a:	4a54      	ldr	r2, [pc, #336]	@ (800689c <HAL_DMA_IRQHandler+0x430>)
 800674c:	4293      	cmp	r3, r2
 800674e:	d004      	beq.n	800675a <HAL_DMA_IRQHandler+0x2ee>
 8006750:	687b      	ldr	r3, [r7, #4]
 8006752:	681b      	ldr	r3, [r3, #0]
 8006754:	4a52      	ldr	r2, [pc, #328]	@ (80068a0 <HAL_DMA_IRQHandler+0x434>)
 8006756:	4293      	cmp	r3, r2
 8006758:	d10a      	bne.n	8006770 <HAL_DMA_IRQHandler+0x304>
 800675a:	687b      	ldr	r3, [r7, #4]
 800675c:	681b      	ldr	r3, [r3, #0]
 800675e:	695b      	ldr	r3, [r3, #20]
 8006760:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 8006764:	2b00      	cmp	r3, #0
 8006766:	bf14      	ite	ne
 8006768:	2301      	movne	r3, #1
 800676a:	2300      	moveq	r3, #0
 800676c:	b2db      	uxtb	r3, r3
 800676e:	e003      	b.n	8006778 <HAL_DMA_IRQHandler+0x30c>
 8006770:	687b      	ldr	r3, [r7, #4]
 8006772:	681b      	ldr	r3, [r3, #0]
 8006774:	681b      	ldr	r3, [r3, #0]
 8006776:	2300      	movs	r3, #0
 8006778:	2b00      	cmp	r3, #0
 800677a:	d00d      	beq.n	8006798 <HAL_DMA_IRQHandler+0x32c>
      {
        /* Clear the FIFO error flag */
        regs_dma->IFCR = DMA_FLAG_FEIF0_4 << (hdma->StreamIndex & 0x1FU);
 800677c:	687b      	ldr	r3, [r7, #4]
 800677e:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 8006780:	f003 031f 	and.w	r3, r3, #31
 8006784:	2201      	movs	r2, #1
 8006786:	409a      	lsls	r2, r3
 8006788:	6a3b      	ldr	r3, [r7, #32]
 800678a:	609a      	str	r2, [r3, #8]

        /* Update error code */
        hdma->ErrorCode |= HAL_DMA_ERROR_FE;
 800678c:	687b      	ldr	r3, [r7, #4]
 800678e:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 8006790:	f043 0202 	orr.w	r2, r3, #2
 8006794:	687b      	ldr	r3, [r7, #4]
 8006796:	655a      	str	r2, [r3, #84]	@ 0x54
      }
    }
    /* Direct Mode Error Interrupt management ***********************************/
    if ((tmpisr_dma & (DMA_FLAG_DMEIF0_4 << (hdma->StreamIndex & 0x1FU))) != 0U)
 8006798:	687b      	ldr	r3, [r7, #4]
 800679a:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 800679c:	f003 031f 	and.w	r3, r3, #31
 80067a0:	2204      	movs	r2, #4
 80067a2:	409a      	lsls	r2, r3
 80067a4:	69bb      	ldr	r3, [r7, #24]
 80067a6:	4013      	ands	r3, r2
 80067a8:	2b00      	cmp	r3, #0
 80067aa:	f000 808f 	beq.w	80068cc <HAL_DMA_IRQHandler+0x460>
    {
      if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_DME) != 0U)
 80067ae:	687b      	ldr	r3, [r7, #4]
 80067b0:	681b      	ldr	r3, [r3, #0]
 80067b2:	4a2c      	ldr	r2, [pc, #176]	@ (8006864 <HAL_DMA_IRQHandler+0x3f8>)
 80067b4:	4293      	cmp	r3, r2
 80067b6:	d04a      	beq.n	800684e <HAL_DMA_IRQHandler+0x3e2>
 80067b8:	687b      	ldr	r3, [r7, #4]
 80067ba:	681b      	ldr	r3, [r3, #0]
 80067bc:	4a2a      	ldr	r2, [pc, #168]	@ (8006868 <HAL_DMA_IRQHandler+0x3fc>)
 80067be:	4293      	cmp	r3, r2
 80067c0:	d045      	beq.n	800684e <HAL_DMA_IRQHandler+0x3e2>
 80067c2:	687b      	ldr	r3, [r7, #4]
 80067c4:	681b      	ldr	r3, [r3, #0]
 80067c6:	4a29      	ldr	r2, [pc, #164]	@ (800686c <HAL_DMA_IRQHandler+0x400>)
 80067c8:	4293      	cmp	r3, r2
 80067ca:	d040      	beq.n	800684e <HAL_DMA_IRQHandler+0x3e2>
 80067cc:	687b      	ldr	r3, [r7, #4]
 80067ce:	681b      	ldr	r3, [r3, #0]
 80067d0:	4a27      	ldr	r2, [pc, #156]	@ (8006870 <HAL_DMA_IRQHandler+0x404>)
 80067d2:	4293      	cmp	r3, r2
 80067d4:	d03b      	beq.n	800684e <HAL_DMA_IRQHandler+0x3e2>
 80067d6:	687b      	ldr	r3, [r7, #4]
 80067d8:	681b      	ldr	r3, [r3, #0]
 80067da:	4a26      	ldr	r2, [pc, #152]	@ (8006874 <HAL_DMA_IRQHandler+0x408>)
 80067dc:	4293      	cmp	r3, r2
 80067de:	d036      	beq.n	800684e <HAL_DMA_IRQHandler+0x3e2>
 80067e0:	687b      	ldr	r3, [r7, #4]
 80067e2:	681b      	ldr	r3, [r3, #0]
 80067e4:	4a24      	ldr	r2, [pc, #144]	@ (8006878 <HAL_DMA_IRQHandler+0x40c>)
 80067e6:	4293      	cmp	r3, r2
 80067e8:	d031      	beq.n	800684e <HAL_DMA_IRQHandler+0x3e2>
 80067ea:	687b      	ldr	r3, [r7, #4]
 80067ec:	681b      	ldr	r3, [r3, #0]
 80067ee:	4a23      	ldr	r2, [pc, #140]	@ (800687c <HAL_DMA_IRQHandler+0x410>)
 80067f0:	4293      	cmp	r3, r2
 80067f2:	d02c      	beq.n	800684e <HAL_DMA_IRQHandler+0x3e2>
 80067f4:	687b      	ldr	r3, [r7, #4]
 80067f6:	681b      	ldr	r3, [r3, #0]
 80067f8:	4a21      	ldr	r2, [pc, #132]	@ (8006880 <HAL_DMA_IRQHandler+0x414>)
 80067fa:	4293      	cmp	r3, r2
 80067fc:	d027      	beq.n	800684e <HAL_DMA_IRQHandler+0x3e2>
 80067fe:	687b      	ldr	r3, [r7, #4]
 8006800:	681b      	ldr	r3, [r3, #0]
 8006802:	4a20      	ldr	r2, [pc, #128]	@ (8006884 <HAL_DMA_IRQHandler+0x418>)
 8006804:	4293      	cmp	r3, r2
 8006806:	d022      	beq.n	800684e <HAL_DMA_IRQHandler+0x3e2>
 8006808:	687b      	ldr	r3, [r7, #4]
 800680a:	681b      	ldr	r3, [r3, #0]
 800680c:	4a1e      	ldr	r2, [pc, #120]	@ (8006888 <HAL_DMA_IRQHandler+0x41c>)
 800680e:	4293      	cmp	r3, r2
 8006810:	d01d      	beq.n	800684e <HAL_DMA_IRQHandler+0x3e2>
 8006812:	687b      	ldr	r3, [r7, #4]
 8006814:	681b      	ldr	r3, [r3, #0]
 8006816:	4a1d      	ldr	r2, [pc, #116]	@ (800688c <HAL_DMA_IRQHandler+0x420>)
 8006818:	4293      	cmp	r3, r2
 800681a:	d018      	beq.n	800684e <HAL_DMA_IRQHandler+0x3e2>
 800681c:	687b      	ldr	r3, [r7, #4]
 800681e:	681b      	ldr	r3, [r3, #0]
 8006820:	4a1b      	ldr	r2, [pc, #108]	@ (8006890 <HAL_DMA_IRQHandler+0x424>)
 8006822:	4293      	cmp	r3, r2
 8006824:	d013      	beq.n	800684e <HAL_DMA_IRQHandler+0x3e2>
 8006826:	687b      	ldr	r3, [r7, #4]
 8006828:	681b      	ldr	r3, [r3, #0]
 800682a:	4a1a      	ldr	r2, [pc, #104]	@ (8006894 <HAL_DMA_IRQHandler+0x428>)
 800682c:	4293      	cmp	r3, r2
 800682e:	d00e      	beq.n	800684e <HAL_DMA_IRQHandler+0x3e2>
 8006830:	687b      	ldr	r3, [r7, #4]
 8006832:	681b      	ldr	r3, [r3, #0]
 8006834:	4a18      	ldr	r2, [pc, #96]	@ (8006898 <HAL_DMA_IRQHandler+0x42c>)
 8006836:	4293      	cmp	r3, r2
 8006838:	d009      	beq.n	800684e <HAL_DMA_IRQHandler+0x3e2>
 800683a:	687b      	ldr	r3, [r7, #4]
 800683c:	681b      	ldr	r3, [r3, #0]
 800683e:	4a17      	ldr	r2, [pc, #92]	@ (800689c <HAL_DMA_IRQHandler+0x430>)
 8006840:	4293      	cmp	r3, r2
 8006842:	d004      	beq.n	800684e <HAL_DMA_IRQHandler+0x3e2>
 8006844:	687b      	ldr	r3, [r7, #4]
 8006846:	681b      	ldr	r3, [r3, #0]
 8006848:	4a15      	ldr	r2, [pc, #84]	@ (80068a0 <HAL_DMA_IRQHandler+0x434>)
 800684a:	4293      	cmp	r3, r2
 800684c:	d12a      	bne.n	80068a4 <HAL_DMA_IRQHandler+0x438>
 800684e:	687b      	ldr	r3, [r7, #4]
 8006850:	681b      	ldr	r3, [r3, #0]
 8006852:	681b      	ldr	r3, [r3, #0]
 8006854:	f003 0302 	and.w	r3, r3, #2
 8006858:	2b00      	cmp	r3, #0
 800685a:	bf14      	ite	ne
 800685c:	2301      	movne	r3, #1
 800685e:	2300      	moveq	r3, #0
 8006860:	b2db      	uxtb	r3, r3
 8006862:	e023      	b.n	80068ac <HAL_DMA_IRQHandler+0x440>
 8006864:	40020010 	.word	0x40020010
 8006868:	40020028 	.word	0x40020028
 800686c:	40020040 	.word	0x40020040
 8006870:	40020058 	.word	0x40020058
 8006874:	40020070 	.word	0x40020070
 8006878:	40020088 	.word	0x40020088
 800687c:	400200a0 	.word	0x400200a0
 8006880:	400200b8 	.word	0x400200b8
 8006884:	40020410 	.word	0x40020410
 8006888:	40020428 	.word	0x40020428
 800688c:	40020440 	.word	0x40020440
 8006890:	40020458 	.word	0x40020458
 8006894:	40020470 	.word	0x40020470
 8006898:	40020488 	.word	0x40020488
 800689c:	400204a0 	.word	0x400204a0
 80068a0:	400204b8 	.word	0x400204b8
 80068a4:	687b      	ldr	r3, [r7, #4]
 80068a6:	681b      	ldr	r3, [r3, #0]
 80068a8:	681b      	ldr	r3, [r3, #0]
 80068aa:	2300      	movs	r3, #0
 80068ac:	2b00      	cmp	r3, #0
 80068ae:	d00d      	beq.n	80068cc <HAL_DMA_IRQHandler+0x460>
      {
        /* Clear the direct mode error flag */
        regs_dma->IFCR = DMA_FLAG_DMEIF0_4 << (hdma->StreamIndex & 0x1FU);
 80068b0:	687b      	ldr	r3, [r7, #4]
 80068b2:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 80068b4:	f003 031f 	and.w	r3, r3, #31
 80068b8:	2204      	movs	r2, #4
 80068ba:	409a      	lsls	r2, r3
 80068bc:	6a3b      	ldr	r3, [r7, #32]
 80068be:	609a      	str	r2, [r3, #8]

        /* Update error code */
        hdma->ErrorCode |= HAL_DMA_ERROR_DME;
 80068c0:	687b      	ldr	r3, [r7, #4]
 80068c2:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 80068c4:	f043 0204 	orr.w	r2, r3, #4
 80068c8:	687b      	ldr	r3, [r7, #4]
 80068ca:	655a      	str	r2, [r3, #84]	@ 0x54
      }
    }
    /* Half Transfer Complete Interrupt management ******************************/
    if ((tmpisr_dma & (DMA_FLAG_HTIF0_4 << (hdma->StreamIndex & 0x1FU))) != 0U)
 80068cc:	687b      	ldr	r3, [r7, #4]
 80068ce:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 80068d0:	f003 031f 	and.w	r3, r3, #31
 80068d4:	2210      	movs	r2, #16
 80068d6:	409a      	lsls	r2, r3
 80068d8:	69bb      	ldr	r3, [r7, #24]
 80068da:	4013      	ands	r3, r2
 80068dc:	2b00      	cmp	r3, #0
 80068de:	f000 80a6 	beq.w	8006a2e <HAL_DMA_IRQHandler+0x5c2>
    {
      if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_HT) != 0U)
 80068e2:	687b      	ldr	r3, [r7, #4]
 80068e4:	681b      	ldr	r3, [r3, #0]
 80068e6:	4a85      	ldr	r2, [pc, #532]	@ (8006afc <HAL_DMA_IRQHandler+0x690>)
 80068e8:	4293      	cmp	r3, r2
 80068ea:	d04a      	beq.n	8006982 <HAL_DMA_IRQHandler+0x516>
 80068ec:	687b      	ldr	r3, [r7, #4]
 80068ee:	681b      	ldr	r3, [r3, #0]
 80068f0:	4a83      	ldr	r2, [pc, #524]	@ (8006b00 <HAL_DMA_IRQHandler+0x694>)
 80068f2:	4293      	cmp	r3, r2
 80068f4:	d045      	beq.n	8006982 <HAL_DMA_IRQHandler+0x516>
 80068f6:	687b      	ldr	r3, [r7, #4]
 80068f8:	681b      	ldr	r3, [r3, #0]
 80068fa:	4a82      	ldr	r2, [pc, #520]	@ (8006b04 <HAL_DMA_IRQHandler+0x698>)
 80068fc:	4293      	cmp	r3, r2
 80068fe:	d040      	beq.n	8006982 <HAL_DMA_IRQHandler+0x516>
 8006900:	687b      	ldr	r3, [r7, #4]
 8006902:	681b      	ldr	r3, [r3, #0]
 8006904:	4a80      	ldr	r2, [pc, #512]	@ (8006b08 <HAL_DMA_IRQHandler+0x69c>)
 8006906:	4293      	cmp	r3, r2
 8006908:	d03b      	beq.n	8006982 <HAL_DMA_IRQHandler+0x516>
 800690a:	687b      	ldr	r3, [r7, #4]
 800690c:	681b      	ldr	r3, [r3, #0]
 800690e:	4a7f      	ldr	r2, [pc, #508]	@ (8006b0c <HAL_DMA_IRQHandler+0x6a0>)
 8006910:	4293      	cmp	r3, r2
 8006912:	d036      	beq.n	8006982 <HAL_DMA_IRQHandler+0x516>
 8006914:	687b      	ldr	r3, [r7, #4]
 8006916:	681b      	ldr	r3, [r3, #0]
 8006918:	4a7d      	ldr	r2, [pc, #500]	@ (8006b10 <HAL_DMA_IRQHandler+0x6a4>)
 800691a:	4293      	cmp	r3, r2
 800691c:	d031      	beq.n	8006982 <HAL_DMA_IRQHandler+0x516>
 800691e:	687b      	ldr	r3, [r7, #4]
 8006920:	681b      	ldr	r3, [r3, #0]
 8006922:	4a7c      	ldr	r2, [pc, #496]	@ (8006b14 <HAL_DMA_IRQHandler+0x6a8>)
 8006924:	4293      	cmp	r3, r2
 8006926:	d02c      	beq.n	8006982 <HAL_DMA_IRQHandler+0x516>
 8006928:	687b      	ldr	r3, [r7, #4]
 800692a:	681b      	ldr	r3, [r3, #0]
 800692c:	4a7a      	ldr	r2, [pc, #488]	@ (8006b18 <HAL_DMA_IRQHandler+0x6ac>)
 800692e:	4293      	cmp	r3, r2
 8006930:	d027      	beq.n	8006982 <HAL_DMA_IRQHandler+0x516>
 8006932:	687b      	ldr	r3, [r7, #4]
 8006934:	681b      	ldr	r3, [r3, #0]
 8006936:	4a79      	ldr	r2, [pc, #484]	@ (8006b1c <HAL_DMA_IRQHandler+0x6b0>)
 8006938:	4293      	cmp	r3, r2
 800693a:	d022      	beq.n	8006982 <HAL_DMA_IRQHandler+0x516>
 800693c:	687b      	ldr	r3, [r7, #4]
 800693e:	681b      	ldr	r3, [r3, #0]
 8006940:	4a77      	ldr	r2, [pc, #476]	@ (8006b20 <HAL_DMA_IRQHandler+0x6b4>)
 8006942:	4293      	cmp	r3, r2
 8006944:	d01d      	beq.n	8006982 <HAL_DMA_IRQHandler+0x516>
 8006946:	687b      	ldr	r3, [r7, #4]
 8006948:	681b      	ldr	r3, [r3, #0]
 800694a:	4a76      	ldr	r2, [pc, #472]	@ (8006b24 <HAL_DMA_IRQHandler+0x6b8>)
 800694c:	4293      	cmp	r3, r2
 800694e:	d018      	beq.n	8006982 <HAL_DMA_IRQHandler+0x516>
 8006950:	687b      	ldr	r3, [r7, #4]
 8006952:	681b      	ldr	r3, [r3, #0]
 8006954:	4a74      	ldr	r2, [pc, #464]	@ (8006b28 <HAL_DMA_IRQHandler+0x6bc>)
 8006956:	4293      	cmp	r3, r2
 8006958:	d013      	beq.n	8006982 <HAL_DMA_IRQHandler+0x516>
 800695a:	687b      	ldr	r3, [r7, #4]
 800695c:	681b      	ldr	r3, [r3, #0]
 800695e:	4a73      	ldr	r2, [pc, #460]	@ (8006b2c <HAL_DMA_IRQHandler+0x6c0>)
 8006960:	4293      	cmp	r3, r2
 8006962:	d00e      	beq.n	8006982 <HAL_DMA_IRQHandler+0x516>
 8006964:	687b      	ldr	r3, [r7, #4]
 8006966:	681b      	ldr	r3, [r3, #0]
 8006968:	4a71      	ldr	r2, [pc, #452]	@ (8006b30 <HAL_DMA_IRQHandler+0x6c4>)
 800696a:	4293      	cmp	r3, r2
 800696c:	d009      	beq.n	8006982 <HAL_DMA_IRQHandler+0x516>
 800696e:	687b      	ldr	r3, [r7, #4]
 8006970:	681b      	ldr	r3, [r3, #0]
 8006972:	4a70      	ldr	r2, [pc, #448]	@ (8006b34 <HAL_DMA_IRQHandler+0x6c8>)
 8006974:	4293      	cmp	r3, r2
 8006976:	d004      	beq.n	8006982 <HAL_DMA_IRQHandler+0x516>
 8006978:	687b      	ldr	r3, [r7, #4]
 800697a:	681b      	ldr	r3, [r3, #0]
 800697c:	4a6e      	ldr	r2, [pc, #440]	@ (8006b38 <HAL_DMA_IRQHandler+0x6cc>)
 800697e:	4293      	cmp	r3, r2
 8006980:	d10a      	bne.n	8006998 <HAL_DMA_IRQHandler+0x52c>
 8006982:	687b      	ldr	r3, [r7, #4]
 8006984:	681b      	ldr	r3, [r3, #0]
 8006986:	681b      	ldr	r3, [r3, #0]
 8006988:	f003 0308 	and.w	r3, r3, #8
 800698c:	2b00      	cmp	r3, #0
 800698e:	bf14      	ite	ne
 8006990:	2301      	movne	r3, #1
 8006992:	2300      	moveq	r3, #0
 8006994:	b2db      	uxtb	r3, r3
 8006996:	e009      	b.n	80069ac <HAL_DMA_IRQHandler+0x540>
 8006998:	687b      	ldr	r3, [r7, #4]
 800699a:	681b      	ldr	r3, [r3, #0]
 800699c:	681b      	ldr	r3, [r3, #0]
 800699e:	f003 0304 	and.w	r3, r3, #4
 80069a2:	2b00      	cmp	r3, #0
 80069a4:	bf14      	ite	ne
 80069a6:	2301      	movne	r3, #1
 80069a8:	2300      	moveq	r3, #0
 80069aa:	b2db      	uxtb	r3, r3
 80069ac:	2b00      	cmp	r3, #0
 80069ae:	d03e      	beq.n	8006a2e <HAL_DMA_IRQHandler+0x5c2>
      {
        /* Clear the half transfer complete flag */
        regs_dma->IFCR = DMA_FLAG_HTIF0_4 << (hdma->StreamIndex & 0x1FU);
 80069b0:	687b      	ldr	r3, [r7, #4]
 80069b2:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 80069b4:	f003 031f 	and.w	r3, r3, #31
 80069b8:	2210      	movs	r2, #16
 80069ba:	409a      	lsls	r2, r3
 80069bc:	6a3b      	ldr	r3, [r7, #32]
 80069be:	609a      	str	r2, [r3, #8]

        /* Multi_Buffering mode enabled */
        if(((((DMA_Stream_TypeDef   *)hdma->Instance)->CR) & (uint32_t)(DMA_SxCR_DBM)) != 0U)
 80069c0:	687b      	ldr	r3, [r7, #4]
 80069c2:	681b      	ldr	r3, [r3, #0]
 80069c4:	681b      	ldr	r3, [r3, #0]
 80069c6:	f403 2380 	and.w	r3, r3, #262144	@ 0x40000
 80069ca:	2b00      	cmp	r3, #0
 80069cc:	d018      	beq.n	8006a00 <HAL_DMA_IRQHandler+0x594>
        {
          /* Current memory buffer used is Memory 0 */
          if((((DMA_Stream_TypeDef   *)hdma->Instance)->CR & DMA_SxCR_CT) == 0U)
 80069ce:	687b      	ldr	r3, [r7, #4]
 80069d0:	681b      	ldr	r3, [r3, #0]
 80069d2:	681b      	ldr	r3, [r3, #0]
 80069d4:	f403 2300 	and.w	r3, r3, #524288	@ 0x80000
 80069d8:	2b00      	cmp	r3, #0
 80069da:	d108      	bne.n	80069ee <HAL_DMA_IRQHandler+0x582>
          {
            if(hdma->XferHalfCpltCallback != NULL)
 80069dc:	687b      	ldr	r3, [r7, #4]
 80069de:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 80069e0:	2b00      	cmp	r3, #0
 80069e2:	d024      	beq.n	8006a2e <HAL_DMA_IRQHandler+0x5c2>
            {
              /* Half transfer callback */
              hdma->XferHalfCpltCallback(hdma);
 80069e4:	687b      	ldr	r3, [r7, #4]
 80069e6:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 80069e8:	6878      	ldr	r0, [r7, #4]
 80069ea:	4798      	blx	r3
 80069ec:	e01f      	b.n	8006a2e <HAL_DMA_IRQHandler+0x5c2>
            }
          }
          /* Current memory buffer used is Memory 1 */
          else
          {
            if(hdma->XferM1HalfCpltCallback != NULL)
 80069ee:	687b      	ldr	r3, [r7, #4]
 80069f0:	6c9b      	ldr	r3, [r3, #72]	@ 0x48
 80069f2:	2b00      	cmp	r3, #0
 80069f4:	d01b      	beq.n	8006a2e <HAL_DMA_IRQHandler+0x5c2>
            {
              /* Half transfer callback */
              hdma->XferM1HalfCpltCallback(hdma);
 80069f6:	687b      	ldr	r3, [r7, #4]
 80069f8:	6c9b      	ldr	r3, [r3, #72]	@ 0x48
 80069fa:	6878      	ldr	r0, [r7, #4]
 80069fc:	4798      	blx	r3
 80069fe:	e016      	b.n	8006a2e <HAL_DMA_IRQHandler+0x5c2>
          }
        }
        else
        {
          /* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */
          if((((DMA_Stream_TypeDef   *)hdma->Instance)->CR & DMA_SxCR_CIRC) == 0U)
 8006a00:	687b      	ldr	r3, [r7, #4]
 8006a02:	681b      	ldr	r3, [r3, #0]
 8006a04:	681b      	ldr	r3, [r3, #0]
 8006a06:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 8006a0a:	2b00      	cmp	r3, #0
 8006a0c:	d107      	bne.n	8006a1e <HAL_DMA_IRQHandler+0x5b2>
          {
            /* Disable the half transfer interrupt */
            ((DMA_Stream_TypeDef   *)hdma->Instance)->CR  &= ~(DMA_IT_HT);
 8006a0e:	687b      	ldr	r3, [r7, #4]
 8006a10:	681b      	ldr	r3, [r3, #0]
 8006a12:	681a      	ldr	r2, [r3, #0]
 8006a14:	687b      	ldr	r3, [r7, #4]
 8006a16:	681b      	ldr	r3, [r3, #0]
 8006a18:	f022 0208 	bic.w	r2, r2, #8
 8006a1c:	601a      	str	r2, [r3, #0]
          }

          if(hdma->XferHalfCpltCallback != NULL)
 8006a1e:	687b      	ldr	r3, [r7, #4]
 8006a20:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8006a22:	2b00      	cmp	r3, #0
 8006a24:	d003      	beq.n	8006a2e <HAL_DMA_IRQHandler+0x5c2>
          {
            /* Half transfer callback */
            hdma->XferHalfCpltCallback(hdma);
 8006a26:	687b      	ldr	r3, [r7, #4]
 8006a28:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8006a2a:	6878      	ldr	r0, [r7, #4]
 8006a2c:	4798      	blx	r3
          }
        }
      }
    }
    /* Transfer Complete Interrupt management ***********************************/
    if ((tmpisr_dma & (DMA_FLAG_TCIF0_4 << (hdma->StreamIndex & 0x1FU))) != 0U)
 8006a2e:	687b      	ldr	r3, [r7, #4]
 8006a30:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 8006a32:	f003 031f 	and.w	r3, r3, #31
 8006a36:	2220      	movs	r2, #32
 8006a38:	409a      	lsls	r2, r3
 8006a3a:	69bb      	ldr	r3, [r7, #24]
 8006a3c:	4013      	ands	r3, r2
 8006a3e:	2b00      	cmp	r3, #0
 8006a40:	f000 8110 	beq.w	8006c64 <HAL_DMA_IRQHandler+0x7f8>
    {
      if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_TC) != 0U)
 8006a44:	687b      	ldr	r3, [r7, #4]
 8006a46:	681b      	ldr	r3, [r3, #0]
 8006a48:	4a2c      	ldr	r2, [pc, #176]	@ (8006afc <HAL_DMA_IRQHandler+0x690>)
 8006a4a:	4293      	cmp	r3, r2
 8006a4c:	d04a      	beq.n	8006ae4 <HAL_DMA_IRQHandler+0x678>
 8006a4e:	687b      	ldr	r3, [r7, #4]
 8006a50:	681b      	ldr	r3, [r3, #0]
 8006a52:	4a2b      	ldr	r2, [pc, #172]	@ (8006b00 <HAL_DMA_IRQHandler+0x694>)
 8006a54:	4293      	cmp	r3, r2
 8006a56:	d045      	beq.n	8006ae4 <HAL_DMA_IRQHandler+0x678>
 8006a58:	687b      	ldr	r3, [r7, #4]
 8006a5a:	681b      	ldr	r3, [r3, #0]
 8006a5c:	4a29      	ldr	r2, [pc, #164]	@ (8006b04 <HAL_DMA_IRQHandler+0x698>)
 8006a5e:	4293      	cmp	r3, r2
 8006a60:	d040      	beq.n	8006ae4 <HAL_DMA_IRQHandler+0x678>
 8006a62:	687b      	ldr	r3, [r7, #4]
 8006a64:	681b      	ldr	r3, [r3, #0]
 8006a66:	4a28      	ldr	r2, [pc, #160]	@ (8006b08 <HAL_DMA_IRQHandler+0x69c>)
 8006a68:	4293      	cmp	r3, r2
 8006a6a:	d03b      	beq.n	8006ae4 <HAL_DMA_IRQHandler+0x678>
 8006a6c:	687b      	ldr	r3, [r7, #4]
 8006a6e:	681b      	ldr	r3, [r3, #0]
 8006a70:	4a26      	ldr	r2, [pc, #152]	@ (8006b0c <HAL_DMA_IRQHandler+0x6a0>)
 8006a72:	4293      	cmp	r3, r2
 8006a74:	d036      	beq.n	8006ae4 <HAL_DMA_IRQHandler+0x678>
 8006a76:	687b      	ldr	r3, [r7, #4]
 8006a78:	681b      	ldr	r3, [r3, #0]
 8006a7a:	4a25      	ldr	r2, [pc, #148]	@ (8006b10 <HAL_DMA_IRQHandler+0x6a4>)
 8006a7c:	4293      	cmp	r3, r2
 8006a7e:	d031      	beq.n	8006ae4 <HAL_DMA_IRQHandler+0x678>
 8006a80:	687b      	ldr	r3, [r7, #4]
 8006a82:	681b      	ldr	r3, [r3, #0]
 8006a84:	4a23      	ldr	r2, [pc, #140]	@ (8006b14 <HAL_DMA_IRQHandler+0x6a8>)
 8006a86:	4293      	cmp	r3, r2
 8006a88:	d02c      	beq.n	8006ae4 <HAL_DMA_IRQHandler+0x678>
 8006a8a:	687b      	ldr	r3, [r7, #4]
 8006a8c:	681b      	ldr	r3, [r3, #0]
 8006a8e:	4a22      	ldr	r2, [pc, #136]	@ (8006b18 <HAL_DMA_IRQHandler+0x6ac>)
 8006a90:	4293      	cmp	r3, r2
 8006a92:	d027      	beq.n	8006ae4 <HAL_DMA_IRQHandler+0x678>
 8006a94:	687b      	ldr	r3, [r7, #4]
 8006a96:	681b      	ldr	r3, [r3, #0]
 8006a98:	4a20      	ldr	r2, [pc, #128]	@ (8006b1c <HAL_DMA_IRQHandler+0x6b0>)
 8006a9a:	4293      	cmp	r3, r2
 8006a9c:	d022      	beq.n	8006ae4 <HAL_DMA_IRQHandler+0x678>
 8006a9e:	687b      	ldr	r3, [r7, #4]
 8006aa0:	681b      	ldr	r3, [r3, #0]
 8006aa2:	4a1f      	ldr	r2, [pc, #124]	@ (8006b20 <HAL_DMA_IRQHandler+0x6b4>)
 8006aa4:	4293      	cmp	r3, r2
 8006aa6:	d01d      	beq.n	8006ae4 <HAL_DMA_IRQHandler+0x678>
 8006aa8:	687b      	ldr	r3, [r7, #4]
 8006aaa:	681b      	ldr	r3, [r3, #0]
 8006aac:	4a1d      	ldr	r2, [pc, #116]	@ (8006b24 <HAL_DMA_IRQHandler+0x6b8>)
 8006aae:	4293      	cmp	r3, r2
 8006ab0:	d018      	beq.n	8006ae4 <HAL_DMA_IRQHandler+0x678>
 8006ab2:	687b      	ldr	r3, [r7, #4]
 8006ab4:	681b      	ldr	r3, [r3, #0]
 8006ab6:	4a1c      	ldr	r2, [pc, #112]	@ (8006b28 <HAL_DMA_IRQHandler+0x6bc>)
 8006ab8:	4293      	cmp	r3, r2
 8006aba:	d013      	beq.n	8006ae4 <HAL_DMA_IRQHandler+0x678>
 8006abc:	687b      	ldr	r3, [r7, #4]
 8006abe:	681b      	ldr	r3, [r3, #0]
 8006ac0:	4a1a      	ldr	r2, [pc, #104]	@ (8006b2c <HAL_DMA_IRQHandler+0x6c0>)
 8006ac2:	4293      	cmp	r3, r2
 8006ac4:	d00e      	beq.n	8006ae4 <HAL_DMA_IRQHandler+0x678>
 8006ac6:	687b      	ldr	r3, [r7, #4]
 8006ac8:	681b      	ldr	r3, [r3, #0]
 8006aca:	4a19      	ldr	r2, [pc, #100]	@ (8006b30 <HAL_DMA_IRQHandler+0x6c4>)
 8006acc:	4293      	cmp	r3, r2
 8006ace:	d009      	beq.n	8006ae4 <HAL_DMA_IRQHandler+0x678>
 8006ad0:	687b      	ldr	r3, [r7, #4]
 8006ad2:	681b      	ldr	r3, [r3, #0]
 8006ad4:	4a17      	ldr	r2, [pc, #92]	@ (8006b34 <HAL_DMA_IRQHandler+0x6c8>)
 8006ad6:	4293      	cmp	r3, r2
 8006ad8:	d004      	beq.n	8006ae4 <HAL_DMA_IRQHandler+0x678>
 8006ada:	687b      	ldr	r3, [r7, #4]
 8006adc:	681b      	ldr	r3, [r3, #0]
 8006ade:	4a16      	ldr	r2, [pc, #88]	@ (8006b38 <HAL_DMA_IRQHandler+0x6cc>)
 8006ae0:	4293      	cmp	r3, r2
 8006ae2:	d12b      	bne.n	8006b3c <HAL_DMA_IRQHandler+0x6d0>
 8006ae4:	687b      	ldr	r3, [r7, #4]
 8006ae6:	681b      	ldr	r3, [r3, #0]
 8006ae8:	681b      	ldr	r3, [r3, #0]
 8006aea:	f003 0310 	and.w	r3, r3, #16
 8006aee:	2b00      	cmp	r3, #0
 8006af0:	bf14      	ite	ne
 8006af2:	2301      	movne	r3, #1
 8006af4:	2300      	moveq	r3, #0
 8006af6:	b2db      	uxtb	r3, r3
 8006af8:	e02a      	b.n	8006b50 <HAL_DMA_IRQHandler+0x6e4>
 8006afa:	bf00      	nop
 8006afc:	40020010 	.word	0x40020010
 8006b00:	40020028 	.word	0x40020028
 8006b04:	40020040 	.word	0x40020040
 8006b08:	40020058 	.word	0x40020058
 8006b0c:	40020070 	.word	0x40020070
 8006b10:	40020088 	.word	0x40020088
 8006b14:	400200a0 	.word	0x400200a0
 8006b18:	400200b8 	.word	0x400200b8
 8006b1c:	40020410 	.word	0x40020410
 8006b20:	40020428 	.word	0x40020428
 8006b24:	40020440 	.word	0x40020440
 8006b28:	40020458 	.word	0x40020458
 8006b2c:	40020470 	.word	0x40020470
 8006b30:	40020488 	.word	0x40020488
 8006b34:	400204a0 	.word	0x400204a0
 8006b38:	400204b8 	.word	0x400204b8
 8006b3c:	687b      	ldr	r3, [r7, #4]
 8006b3e:	681b      	ldr	r3, [r3, #0]
 8006b40:	681b      	ldr	r3, [r3, #0]
 8006b42:	f003 0302 	and.w	r3, r3, #2
 8006b46:	2b00      	cmp	r3, #0
 8006b48:	bf14      	ite	ne
 8006b4a:	2301      	movne	r3, #1
 8006b4c:	2300      	moveq	r3, #0
 8006b4e:	b2db      	uxtb	r3, r3
 8006b50:	2b00      	cmp	r3, #0
 8006b52:	f000 8087 	beq.w	8006c64 <HAL_DMA_IRQHandler+0x7f8>
      {
        /* Clear the transfer complete flag */
        regs_dma->IFCR = DMA_FLAG_TCIF0_4 << (hdma->StreamIndex & 0x1FU);
 8006b56:	687b      	ldr	r3, [r7, #4]
 8006b58:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 8006b5a:	f003 031f 	and.w	r3, r3, #31
 8006b5e:	2220      	movs	r2, #32
 8006b60:	409a      	lsls	r2, r3
 8006b62:	6a3b      	ldr	r3, [r7, #32]
 8006b64:	609a      	str	r2, [r3, #8]

        if(HAL_DMA_STATE_ABORT == hdma->State)
 8006b66:	687b      	ldr	r3, [r7, #4]
 8006b68:	f893 3035 	ldrb.w	r3, [r3, #53]	@ 0x35
 8006b6c:	b2db      	uxtb	r3, r3
 8006b6e:	2b04      	cmp	r3, #4
 8006b70:	d139      	bne.n	8006be6 <HAL_DMA_IRQHandler+0x77a>
        {
          /* Disable all the transfer interrupts */
          ((DMA_Stream_TypeDef   *)hdma->Instance)->CR  &= ~(DMA_IT_TC | DMA_IT_TE | DMA_IT_DME);
 8006b72:	687b      	ldr	r3, [r7, #4]
 8006b74:	681b      	ldr	r3, [r3, #0]
 8006b76:	681a      	ldr	r2, [r3, #0]
 8006b78:	687b      	ldr	r3, [r7, #4]
 8006b7a:	681b      	ldr	r3, [r3, #0]
 8006b7c:	f022 0216 	bic.w	r2, r2, #22
 8006b80:	601a      	str	r2, [r3, #0]
          ((DMA_Stream_TypeDef   *)hdma->Instance)->FCR &= ~(DMA_IT_FE);
 8006b82:	687b      	ldr	r3, [r7, #4]
 8006b84:	681b      	ldr	r3, [r3, #0]
 8006b86:	695a      	ldr	r2, [r3, #20]
 8006b88:	687b      	ldr	r3, [r7, #4]
 8006b8a:	681b      	ldr	r3, [r3, #0]
 8006b8c:	f022 0280 	bic.w	r2, r2, #128	@ 0x80
 8006b90:	615a      	str	r2, [r3, #20]

          if((hdma->XferHalfCpltCallback != NULL) || (hdma->XferM1HalfCpltCallback != NULL))
 8006b92:	687b      	ldr	r3, [r7, #4]
 8006b94:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8006b96:	2b00      	cmp	r3, #0
 8006b98:	d103      	bne.n	8006ba2 <HAL_DMA_IRQHandler+0x736>
 8006b9a:	687b      	ldr	r3, [r7, #4]
 8006b9c:	6c9b      	ldr	r3, [r3, #72]	@ 0x48
 8006b9e:	2b00      	cmp	r3, #0
 8006ba0:	d007      	beq.n	8006bb2 <HAL_DMA_IRQHandler+0x746>
          {
            ((DMA_Stream_TypeDef   *)hdma->Instance)->CR  &= ~(DMA_IT_HT);
 8006ba2:	687b      	ldr	r3, [r7, #4]
 8006ba4:	681b      	ldr	r3, [r3, #0]
 8006ba6:	681a      	ldr	r2, [r3, #0]
 8006ba8:	687b      	ldr	r3, [r7, #4]
 8006baa:	681b      	ldr	r3, [r3, #0]
 8006bac:	f022 0208 	bic.w	r2, r2, #8
 8006bb0:	601a      	str	r2, [r3, #0]
          }

          /* Clear all interrupt flags at correct offset within the register */
          regs_dma->IFCR = 0x3FUL << (hdma->StreamIndex & 0x1FU);
 8006bb2:	687b      	ldr	r3, [r7, #4]
 8006bb4:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 8006bb6:	f003 031f 	and.w	r3, r3, #31
 8006bba:	223f      	movs	r2, #63	@ 0x3f
 8006bbc:	409a      	lsls	r2, r3
 8006bbe:	6a3b      	ldr	r3, [r7, #32]
 8006bc0:	609a      	str	r2, [r3, #8]

          /* Change the DMA state */
          hdma->State = HAL_DMA_STATE_READY;
 8006bc2:	687b      	ldr	r3, [r7, #4]
 8006bc4:	2201      	movs	r2, #1
 8006bc6:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

          /* Process Unlocked */
          __HAL_UNLOCK(hdma);
 8006bca:	687b      	ldr	r3, [r7, #4]
 8006bcc:	2200      	movs	r2, #0
 8006bce:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34

          if(hdma->XferAbortCallback != NULL)
 8006bd2:	687b      	ldr	r3, [r7, #4]
 8006bd4:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 8006bd6:	2b00      	cmp	r3, #0
 8006bd8:	f000 834a 	beq.w	8007270 <HAL_DMA_IRQHandler+0xe04>
          {
            hdma->XferAbortCallback(hdma);
 8006bdc:	687b      	ldr	r3, [r7, #4]
 8006bde:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 8006be0:	6878      	ldr	r0, [r7, #4]
 8006be2:	4798      	blx	r3
          }
          return;
 8006be4:	e344      	b.n	8007270 <HAL_DMA_IRQHandler+0xe04>
        }

        if(((((DMA_Stream_TypeDef   *)hdma->Instance)->CR) & (uint32_t)(DMA_SxCR_DBM)) != 0U)
 8006be6:	687b      	ldr	r3, [r7, #4]
 8006be8:	681b      	ldr	r3, [r3, #0]
 8006bea:	681b      	ldr	r3, [r3, #0]
 8006bec:	f403 2380 	and.w	r3, r3, #262144	@ 0x40000
 8006bf0:	2b00      	cmp	r3, #0
 8006bf2:	d018      	beq.n	8006c26 <HAL_DMA_IRQHandler+0x7ba>
        {
          /* Current memory buffer used is Memory 0 */
          if((((DMA_Stream_TypeDef   *)hdma->Instance)->CR & DMA_SxCR_CT) == 0U)
 8006bf4:	687b      	ldr	r3, [r7, #4]
 8006bf6:	681b      	ldr	r3, [r3, #0]
 8006bf8:	681b      	ldr	r3, [r3, #0]
 8006bfa:	f403 2300 	and.w	r3, r3, #524288	@ 0x80000
 8006bfe:	2b00      	cmp	r3, #0
 8006c00:	d108      	bne.n	8006c14 <HAL_DMA_IRQHandler+0x7a8>
          {
            if(hdma->XferM1CpltCallback != NULL)
 8006c02:	687b      	ldr	r3, [r7, #4]
 8006c04:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 8006c06:	2b00      	cmp	r3, #0
 8006c08:	d02c      	beq.n	8006c64 <HAL_DMA_IRQHandler+0x7f8>
            {
              /* Transfer complete Callback for memory1 */
              hdma->XferM1CpltCallback(hdma);
 8006c0a:	687b      	ldr	r3, [r7, #4]
 8006c0c:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 8006c0e:	6878      	ldr	r0, [r7, #4]
 8006c10:	4798      	blx	r3
 8006c12:	e027      	b.n	8006c64 <HAL_DMA_IRQHandler+0x7f8>
            }
          }
          /* Current memory buffer used is Memory 1 */
          else
          {
            if(hdma->XferCpltCallback != NULL)
 8006c14:	687b      	ldr	r3, [r7, #4]
 8006c16:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 8006c18:	2b00      	cmp	r3, #0
 8006c1a:	d023      	beq.n	8006c64 <HAL_DMA_IRQHandler+0x7f8>
            {
              /* Transfer complete Callback for memory0 */
              hdma->XferCpltCallback(hdma);
 8006c1c:	687b      	ldr	r3, [r7, #4]
 8006c1e:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 8006c20:	6878      	ldr	r0, [r7, #4]
 8006c22:	4798      	blx	r3
 8006c24:	e01e      	b.n	8006c64 <HAL_DMA_IRQHandler+0x7f8>
          }
        }
        /* Disable the transfer complete interrupt if the DMA mode is not CIRCULAR */
        else
        {
          if((((DMA_Stream_TypeDef   *)hdma->Instance)->CR & DMA_SxCR_CIRC) == 0U)
 8006c26:	687b      	ldr	r3, [r7, #4]
 8006c28:	681b      	ldr	r3, [r3, #0]
 8006c2a:	681b      	ldr	r3, [r3, #0]
 8006c2c:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 8006c30:	2b00      	cmp	r3, #0
 8006c32:	d10f      	bne.n	8006c54 <HAL_DMA_IRQHandler+0x7e8>
          {
            /* Disable the transfer complete interrupt */
            ((DMA_Stream_TypeDef   *)hdma->Instance)->CR  &= ~(DMA_IT_TC);
 8006c34:	687b      	ldr	r3, [r7, #4]
 8006c36:	681b      	ldr	r3, [r3, #0]
 8006c38:	681a      	ldr	r2, [r3, #0]
 8006c3a:	687b      	ldr	r3, [r7, #4]
 8006c3c:	681b      	ldr	r3, [r3, #0]
 8006c3e:	f022 0210 	bic.w	r2, r2, #16
 8006c42:	601a      	str	r2, [r3, #0]

            /* Change the DMA state */
            hdma->State = HAL_DMA_STATE_READY;
 8006c44:	687b      	ldr	r3, [r7, #4]
 8006c46:	2201      	movs	r2, #1
 8006c48:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

            /* Process Unlocked */
            __HAL_UNLOCK(hdma);
 8006c4c:	687b      	ldr	r3, [r7, #4]
 8006c4e:	2200      	movs	r2, #0
 8006c50:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34
          }

          if(hdma->XferCpltCallback != NULL)
 8006c54:	687b      	ldr	r3, [r7, #4]
 8006c56:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 8006c58:	2b00      	cmp	r3, #0
 8006c5a:	d003      	beq.n	8006c64 <HAL_DMA_IRQHandler+0x7f8>
          {
            /* Transfer complete callback */
            hdma->XferCpltCallback(hdma);
 8006c5c:	687b      	ldr	r3, [r7, #4]
 8006c5e:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 8006c60:	6878      	ldr	r0, [r7, #4]
 8006c62:	4798      	blx	r3
        }
      }
    }

    /* manage error case */
    if(hdma->ErrorCode != HAL_DMA_ERROR_NONE)
 8006c64:	687b      	ldr	r3, [r7, #4]
 8006c66:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 8006c68:	2b00      	cmp	r3, #0
 8006c6a:	f000 8306 	beq.w	800727a <HAL_DMA_IRQHandler+0xe0e>
    {
      if((hdma->ErrorCode & HAL_DMA_ERROR_TE) != 0U)
 8006c6e:	687b      	ldr	r3, [r7, #4]
 8006c70:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 8006c72:	f003 0301 	and.w	r3, r3, #1
 8006c76:	2b00      	cmp	r3, #0
 8006c78:	f000 8088 	beq.w	8006d8c <HAL_DMA_IRQHandler+0x920>
      {
        hdma->State = HAL_DMA_STATE_ABORT;
 8006c7c:	687b      	ldr	r3, [r7, #4]
 8006c7e:	2204      	movs	r2, #4
 8006c80:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

        /* Disable the stream */
        __HAL_DMA_DISABLE(hdma);
 8006c84:	687b      	ldr	r3, [r7, #4]
 8006c86:	681b      	ldr	r3, [r3, #0]
 8006c88:	4a7a      	ldr	r2, [pc, #488]	@ (8006e74 <HAL_DMA_IRQHandler+0xa08>)
 8006c8a:	4293      	cmp	r3, r2
 8006c8c:	d04a      	beq.n	8006d24 <HAL_DMA_IRQHandler+0x8b8>
 8006c8e:	687b      	ldr	r3, [r7, #4]
 8006c90:	681b      	ldr	r3, [r3, #0]
 8006c92:	4a79      	ldr	r2, [pc, #484]	@ (8006e78 <HAL_DMA_IRQHandler+0xa0c>)
 8006c94:	4293      	cmp	r3, r2
 8006c96:	d045      	beq.n	8006d24 <HAL_DMA_IRQHandler+0x8b8>
 8006c98:	687b      	ldr	r3, [r7, #4]
 8006c9a:	681b      	ldr	r3, [r3, #0]
 8006c9c:	4a77      	ldr	r2, [pc, #476]	@ (8006e7c <HAL_DMA_IRQHandler+0xa10>)
 8006c9e:	4293      	cmp	r3, r2
 8006ca0:	d040      	beq.n	8006d24 <HAL_DMA_IRQHandler+0x8b8>
 8006ca2:	687b      	ldr	r3, [r7, #4]
 8006ca4:	681b      	ldr	r3, [r3, #0]
 8006ca6:	4a76      	ldr	r2, [pc, #472]	@ (8006e80 <HAL_DMA_IRQHandler+0xa14>)
 8006ca8:	4293      	cmp	r3, r2
 8006caa:	d03b      	beq.n	8006d24 <HAL_DMA_IRQHandler+0x8b8>
 8006cac:	687b      	ldr	r3, [r7, #4]
 8006cae:	681b      	ldr	r3, [r3, #0]
 8006cb0:	4a74      	ldr	r2, [pc, #464]	@ (8006e84 <HAL_DMA_IRQHandler+0xa18>)
 8006cb2:	4293      	cmp	r3, r2
 8006cb4:	d036      	beq.n	8006d24 <HAL_DMA_IRQHandler+0x8b8>
 8006cb6:	687b      	ldr	r3, [r7, #4]
 8006cb8:	681b      	ldr	r3, [r3, #0]
 8006cba:	4a73      	ldr	r2, [pc, #460]	@ (8006e88 <HAL_DMA_IRQHandler+0xa1c>)
 8006cbc:	4293      	cmp	r3, r2
 8006cbe:	d031      	beq.n	8006d24 <HAL_DMA_IRQHandler+0x8b8>
 8006cc0:	687b      	ldr	r3, [r7, #4]
 8006cc2:	681b      	ldr	r3, [r3, #0]
 8006cc4:	4a71      	ldr	r2, [pc, #452]	@ (8006e8c <HAL_DMA_IRQHandler+0xa20>)
 8006cc6:	4293      	cmp	r3, r2
 8006cc8:	d02c      	beq.n	8006d24 <HAL_DMA_IRQHandler+0x8b8>
 8006cca:	687b      	ldr	r3, [r7, #4]
 8006ccc:	681b      	ldr	r3, [r3, #0]
 8006cce:	4a70      	ldr	r2, [pc, #448]	@ (8006e90 <HAL_DMA_IRQHandler+0xa24>)
 8006cd0:	4293      	cmp	r3, r2
 8006cd2:	d027      	beq.n	8006d24 <HAL_DMA_IRQHandler+0x8b8>
 8006cd4:	687b      	ldr	r3, [r7, #4]
 8006cd6:	681b      	ldr	r3, [r3, #0]
 8006cd8:	4a6e      	ldr	r2, [pc, #440]	@ (8006e94 <HAL_DMA_IRQHandler+0xa28>)
 8006cda:	4293      	cmp	r3, r2
 8006cdc:	d022      	beq.n	8006d24 <HAL_DMA_IRQHandler+0x8b8>
 8006cde:	687b      	ldr	r3, [r7, #4]
 8006ce0:	681b      	ldr	r3, [r3, #0]
 8006ce2:	4a6d      	ldr	r2, [pc, #436]	@ (8006e98 <HAL_DMA_IRQHandler+0xa2c>)
 8006ce4:	4293      	cmp	r3, r2
 8006ce6:	d01d      	beq.n	8006d24 <HAL_DMA_IRQHandler+0x8b8>
 8006ce8:	687b      	ldr	r3, [r7, #4]
 8006cea:	681b      	ldr	r3, [r3, #0]
 8006cec:	4a6b      	ldr	r2, [pc, #428]	@ (8006e9c <HAL_DMA_IRQHandler+0xa30>)
 8006cee:	4293      	cmp	r3, r2
 8006cf0:	d018      	beq.n	8006d24 <HAL_DMA_IRQHandler+0x8b8>
 8006cf2:	687b      	ldr	r3, [r7, #4]
 8006cf4:	681b      	ldr	r3, [r3, #0]
 8006cf6:	4a6a      	ldr	r2, [pc, #424]	@ (8006ea0 <HAL_DMA_IRQHandler+0xa34>)
 8006cf8:	4293      	cmp	r3, r2
 8006cfa:	d013      	beq.n	8006d24 <HAL_DMA_IRQHandler+0x8b8>
 8006cfc:	687b      	ldr	r3, [r7, #4]
 8006cfe:	681b      	ldr	r3, [r3, #0]
 8006d00:	4a68      	ldr	r2, [pc, #416]	@ (8006ea4 <HAL_DMA_IRQHandler+0xa38>)
 8006d02:	4293      	cmp	r3, r2
 8006d04:	d00e      	beq.n	8006d24 <HAL_DMA_IRQHandler+0x8b8>
 8006d06:	687b      	ldr	r3, [r7, #4]
 8006d08:	681b      	ldr	r3, [r3, #0]
 8006d0a:	4a67      	ldr	r2, [pc, #412]	@ (8006ea8 <HAL_DMA_IRQHandler+0xa3c>)
 8006d0c:	4293      	cmp	r3, r2
 8006d0e:	d009      	beq.n	8006d24 <HAL_DMA_IRQHandler+0x8b8>
 8006d10:	687b      	ldr	r3, [r7, #4]
 8006d12:	681b      	ldr	r3, [r3, #0]
 8006d14:	4a65      	ldr	r2, [pc, #404]	@ (8006eac <HAL_DMA_IRQHandler+0xa40>)
 8006d16:	4293      	cmp	r3, r2
 8006d18:	d004      	beq.n	8006d24 <HAL_DMA_IRQHandler+0x8b8>
 8006d1a:	687b      	ldr	r3, [r7, #4]
 8006d1c:	681b      	ldr	r3, [r3, #0]
 8006d1e:	4a64      	ldr	r2, [pc, #400]	@ (8006eb0 <HAL_DMA_IRQHandler+0xa44>)
 8006d20:	4293      	cmp	r3, r2
 8006d22:	d108      	bne.n	8006d36 <HAL_DMA_IRQHandler+0x8ca>
 8006d24:	687b      	ldr	r3, [r7, #4]
 8006d26:	681b      	ldr	r3, [r3, #0]
 8006d28:	681a      	ldr	r2, [r3, #0]
 8006d2a:	687b      	ldr	r3, [r7, #4]
 8006d2c:	681b      	ldr	r3, [r3, #0]
 8006d2e:	f022 0201 	bic.w	r2, r2, #1
 8006d32:	601a      	str	r2, [r3, #0]
 8006d34:	e007      	b.n	8006d46 <HAL_DMA_IRQHandler+0x8da>
 8006d36:	687b      	ldr	r3, [r7, #4]
 8006d38:	681b      	ldr	r3, [r3, #0]
 8006d3a:	681a      	ldr	r2, [r3, #0]
 8006d3c:	687b      	ldr	r3, [r7, #4]
 8006d3e:	681b      	ldr	r3, [r3, #0]
 8006d40:	f022 0201 	bic.w	r2, r2, #1
 8006d44:	601a      	str	r2, [r3, #0]

        do
        {
          if (++count > timeout)
 8006d46:	68fb      	ldr	r3, [r7, #12]
 8006d48:	3301      	adds	r3, #1
 8006d4a:	60fb      	str	r3, [r7, #12]
 8006d4c:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8006d4e:	429a      	cmp	r2, r3
 8006d50:	d307      	bcc.n	8006d62 <HAL_DMA_IRQHandler+0x8f6>
          {
            break;
          }
        }
        while((((DMA_Stream_TypeDef   *)hdma->Instance)->CR & DMA_SxCR_EN) != 0U);
 8006d52:	687b      	ldr	r3, [r7, #4]
 8006d54:	681b      	ldr	r3, [r3, #0]
 8006d56:	681b      	ldr	r3, [r3, #0]
 8006d58:	f003 0301 	and.w	r3, r3, #1
 8006d5c:	2b00      	cmp	r3, #0
 8006d5e:	d1f2      	bne.n	8006d46 <HAL_DMA_IRQHandler+0x8da>
 8006d60:	e000      	b.n	8006d64 <HAL_DMA_IRQHandler+0x8f8>
            break;
 8006d62:	bf00      	nop

        if((((DMA_Stream_TypeDef   *)hdma->Instance)->CR & DMA_SxCR_EN) != 0U)
 8006d64:	687b      	ldr	r3, [r7, #4]
 8006d66:	681b      	ldr	r3, [r3, #0]
 8006d68:	681b      	ldr	r3, [r3, #0]
 8006d6a:	f003 0301 	and.w	r3, r3, #1
 8006d6e:	2b00      	cmp	r3, #0
 8006d70:	d004      	beq.n	8006d7c <HAL_DMA_IRQHandler+0x910>
        {
          /* Change the DMA state to error if DMA disable fails */
          hdma->State = HAL_DMA_STATE_ERROR;
 8006d72:	687b      	ldr	r3, [r7, #4]
 8006d74:	2203      	movs	r2, #3
 8006d76:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35
 8006d7a:	e003      	b.n	8006d84 <HAL_DMA_IRQHandler+0x918>
        }
        else
        {
          /* Change the DMA state to Ready if DMA disable success */
          hdma->State = HAL_DMA_STATE_READY;
 8006d7c:	687b      	ldr	r3, [r7, #4]
 8006d7e:	2201      	movs	r2, #1
 8006d80:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35
        }

        /* Process Unlocked */
        __HAL_UNLOCK(hdma);
 8006d84:	687b      	ldr	r3, [r7, #4]
 8006d86:	2200      	movs	r2, #0
 8006d88:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34
      }

      if(hdma->XferErrorCallback != NULL)
 8006d8c:	687b      	ldr	r3, [r7, #4]
 8006d8e:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 8006d90:	2b00      	cmp	r3, #0
 8006d92:	f000 8272 	beq.w	800727a <HAL_DMA_IRQHandler+0xe0e>
      {
        /* Transfer error callback */
        hdma->XferErrorCallback(hdma);
 8006d96:	687b      	ldr	r3, [r7, #4]
 8006d98:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 8006d9a:	6878      	ldr	r0, [r7, #4]
 8006d9c:	4798      	blx	r3
 8006d9e:	e26c      	b.n	800727a <HAL_DMA_IRQHandler+0xe0e>
      }
    }
  }
  else if(IS_BDMA_CHANNEL_INSTANCE(hdma->Instance) != 0U)  /* BDMA instance(s) */
 8006da0:	687b      	ldr	r3, [r7, #4]
 8006da2:	681b      	ldr	r3, [r3, #0]
 8006da4:	4a43      	ldr	r2, [pc, #268]	@ (8006eb4 <HAL_DMA_IRQHandler+0xa48>)
 8006da6:	4293      	cmp	r3, r2
 8006da8:	d022      	beq.n	8006df0 <HAL_DMA_IRQHandler+0x984>
 8006daa:	687b      	ldr	r3, [r7, #4]
 8006dac:	681b      	ldr	r3, [r3, #0]
 8006dae:	4a42      	ldr	r2, [pc, #264]	@ (8006eb8 <HAL_DMA_IRQHandler+0xa4c>)
 8006db0:	4293      	cmp	r3, r2
 8006db2:	d01d      	beq.n	8006df0 <HAL_DMA_IRQHandler+0x984>
 8006db4:	687b      	ldr	r3, [r7, #4]
 8006db6:	681b      	ldr	r3, [r3, #0]
 8006db8:	4a40      	ldr	r2, [pc, #256]	@ (8006ebc <HAL_DMA_IRQHandler+0xa50>)
 8006dba:	4293      	cmp	r3, r2
 8006dbc:	d018      	beq.n	8006df0 <HAL_DMA_IRQHandler+0x984>
 8006dbe:	687b      	ldr	r3, [r7, #4]
 8006dc0:	681b      	ldr	r3, [r3, #0]
 8006dc2:	4a3f      	ldr	r2, [pc, #252]	@ (8006ec0 <HAL_DMA_IRQHandler+0xa54>)
 8006dc4:	4293      	cmp	r3, r2
 8006dc6:	d013      	beq.n	8006df0 <HAL_DMA_IRQHandler+0x984>
 8006dc8:	687b      	ldr	r3, [r7, #4]
 8006dca:	681b      	ldr	r3, [r3, #0]
 8006dcc:	4a3d      	ldr	r2, [pc, #244]	@ (8006ec4 <HAL_DMA_IRQHandler+0xa58>)
 8006dce:	4293      	cmp	r3, r2
 8006dd0:	d00e      	beq.n	8006df0 <HAL_DMA_IRQHandler+0x984>
 8006dd2:	687b      	ldr	r3, [r7, #4]
 8006dd4:	681b      	ldr	r3, [r3, #0]
 8006dd6:	4a3c      	ldr	r2, [pc, #240]	@ (8006ec8 <HAL_DMA_IRQHandler+0xa5c>)
 8006dd8:	4293      	cmp	r3, r2
 8006dda:	d009      	beq.n	8006df0 <HAL_DMA_IRQHandler+0x984>
 8006ddc:	687b      	ldr	r3, [r7, #4]
 8006dde:	681b      	ldr	r3, [r3, #0]
 8006de0:	4a3a      	ldr	r2, [pc, #232]	@ (8006ecc <HAL_DMA_IRQHandler+0xa60>)
 8006de2:	4293      	cmp	r3, r2
 8006de4:	d004      	beq.n	8006df0 <HAL_DMA_IRQHandler+0x984>
 8006de6:	687b      	ldr	r3, [r7, #4]
 8006de8:	681b      	ldr	r3, [r3, #0]
 8006dea:	4a39      	ldr	r2, [pc, #228]	@ (8006ed0 <HAL_DMA_IRQHandler+0xa64>)
 8006dec:	4293      	cmp	r3, r2
 8006dee:	d101      	bne.n	8006df4 <HAL_DMA_IRQHandler+0x988>
 8006df0:	2301      	movs	r3, #1
 8006df2:	e000      	b.n	8006df6 <HAL_DMA_IRQHandler+0x98a>
 8006df4:	2300      	movs	r3, #0
 8006df6:	2b00      	cmp	r3, #0
 8006df8:	f000 823f 	beq.w	800727a <HAL_DMA_IRQHandler+0xe0e>
  {
    ccr_reg = (((BDMA_Channel_TypeDef   *)hdma->Instance)->CCR);
 8006dfc:	687b      	ldr	r3, [r7, #4]
 8006dfe:	681b      	ldr	r3, [r3, #0]
 8006e00:	681b      	ldr	r3, [r3, #0]
 8006e02:	613b      	str	r3, [r7, #16]

    /* Half Transfer Complete Interrupt management ******************************/
    if (((tmpisr_bdma & (BDMA_FLAG_HT0 << (hdma->StreamIndex & 0x1FU))) != 0U) && ((ccr_reg & BDMA_CCR_HTIE) != 0U))
 8006e04:	687b      	ldr	r3, [r7, #4]
 8006e06:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 8006e08:	f003 031f 	and.w	r3, r3, #31
 8006e0c:	2204      	movs	r2, #4
 8006e0e:	409a      	lsls	r2, r3
 8006e10:	697b      	ldr	r3, [r7, #20]
 8006e12:	4013      	ands	r3, r2
 8006e14:	2b00      	cmp	r3, #0
 8006e16:	f000 80cd 	beq.w	8006fb4 <HAL_DMA_IRQHandler+0xb48>
 8006e1a:	693b      	ldr	r3, [r7, #16]
 8006e1c:	f003 0304 	and.w	r3, r3, #4
 8006e20:	2b00      	cmp	r3, #0
 8006e22:	f000 80c7 	beq.w	8006fb4 <HAL_DMA_IRQHandler+0xb48>
    {
      /* Clear the half transfer complete flag */
      regs_bdma->IFCR = (BDMA_ISR_HTIF0 << (hdma->StreamIndex & 0x1FU));
 8006e26:	687b      	ldr	r3, [r7, #4]
 8006e28:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 8006e2a:	f003 031f 	and.w	r3, r3, #31
 8006e2e:	2204      	movs	r2, #4
 8006e30:	409a      	lsls	r2, r3
 8006e32:	69fb      	ldr	r3, [r7, #28]
 8006e34:	605a      	str	r2, [r3, #4]

      /* Disable the transfer complete interrupt if the DMA mode is Double Buffering */
      if((ccr_reg & BDMA_CCR_DBM) != 0U)
 8006e36:	693b      	ldr	r3, [r7, #16]
 8006e38:	f403 4300 	and.w	r3, r3, #32768	@ 0x8000
 8006e3c:	2b00      	cmp	r3, #0
 8006e3e:	d049      	beq.n	8006ed4 <HAL_DMA_IRQHandler+0xa68>
      {
        /* Current memory buffer used is Memory 0 */
        if((ccr_reg & BDMA_CCR_CT) == 0U)
 8006e40:	693b      	ldr	r3, [r7, #16]
 8006e42:	f403 3380 	and.w	r3, r3, #65536	@ 0x10000
 8006e46:	2b00      	cmp	r3, #0
 8006e48:	d109      	bne.n	8006e5e <HAL_DMA_IRQHandler+0x9f2>
        {
          if(hdma->XferM1HalfCpltCallback != NULL)
 8006e4a:	687b      	ldr	r3, [r7, #4]
 8006e4c:	6c9b      	ldr	r3, [r3, #72]	@ 0x48
 8006e4e:	2b00      	cmp	r3, #0
 8006e50:	f000 8210 	beq.w	8007274 <HAL_DMA_IRQHandler+0xe08>
          {
            /* Half transfer Callback for Memory 1 */
            hdma->XferM1HalfCpltCallback(hdma);
 8006e54:	687b      	ldr	r3, [r7, #4]
 8006e56:	6c9b      	ldr	r3, [r3, #72]	@ 0x48
 8006e58:	6878      	ldr	r0, [r7, #4]
 8006e5a:	4798      	blx	r3
      if((ccr_reg & BDMA_CCR_DBM) != 0U)
 8006e5c:	e20a      	b.n	8007274 <HAL_DMA_IRQHandler+0xe08>
          }
        }
        /* Current memory buffer used is Memory 1 */
        else
        {
          if(hdma->XferHalfCpltCallback != NULL)
 8006e5e:	687b      	ldr	r3, [r7, #4]
 8006e60:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8006e62:	2b00      	cmp	r3, #0
 8006e64:	f000 8206 	beq.w	8007274 <HAL_DMA_IRQHandler+0xe08>
          {
            /* Half transfer Callback for Memory 0 */
            hdma->XferHalfCpltCallback(hdma);
 8006e68:	687b      	ldr	r3, [r7, #4]
 8006e6a:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8006e6c:	6878      	ldr	r0, [r7, #4]
 8006e6e:	4798      	blx	r3
      if((ccr_reg & BDMA_CCR_DBM) != 0U)
 8006e70:	e200      	b.n	8007274 <HAL_DMA_IRQHandler+0xe08>
 8006e72:	bf00      	nop
 8006e74:	40020010 	.word	0x40020010
 8006e78:	40020028 	.word	0x40020028
 8006e7c:	40020040 	.word	0x40020040
 8006e80:	40020058 	.word	0x40020058
 8006e84:	40020070 	.word	0x40020070
 8006e88:	40020088 	.word	0x40020088
 8006e8c:	400200a0 	.word	0x400200a0
 8006e90:	400200b8 	.word	0x400200b8
 8006e94:	40020410 	.word	0x40020410
 8006e98:	40020428 	.word	0x40020428
 8006e9c:	40020440 	.word	0x40020440
 8006ea0:	40020458 	.word	0x40020458
 8006ea4:	40020470 	.word	0x40020470
 8006ea8:	40020488 	.word	0x40020488
 8006eac:	400204a0 	.word	0x400204a0
 8006eb0:	400204b8 	.word	0x400204b8
 8006eb4:	58025408 	.word	0x58025408
 8006eb8:	5802541c 	.word	0x5802541c
 8006ebc:	58025430 	.word	0x58025430
 8006ec0:	58025444 	.word	0x58025444
 8006ec4:	58025458 	.word	0x58025458
 8006ec8:	5802546c 	.word	0x5802546c
 8006ecc:	58025480 	.word	0x58025480
 8006ed0:	58025494 	.word	0x58025494
          }
        }
      }
      else
      {
        if((ccr_reg & BDMA_CCR_CIRC) == 0U)
 8006ed4:	693b      	ldr	r3, [r7, #16]
 8006ed6:	f003 0320 	and.w	r3, r3, #32
 8006eda:	2b00      	cmp	r3, #0
 8006edc:	d160      	bne.n	8006fa0 <HAL_DMA_IRQHandler+0xb34>
        {
          /* Disable the half transfer interrupt */
          __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);
 8006ede:	687b      	ldr	r3, [r7, #4]
 8006ee0:	681b      	ldr	r3, [r3, #0]
 8006ee2:	4a7f      	ldr	r2, [pc, #508]	@ (80070e0 <HAL_DMA_IRQHandler+0xc74>)
 8006ee4:	4293      	cmp	r3, r2
 8006ee6:	d04a      	beq.n	8006f7e <HAL_DMA_IRQHandler+0xb12>
 8006ee8:	687b      	ldr	r3, [r7, #4]
 8006eea:	681b      	ldr	r3, [r3, #0]
 8006eec:	4a7d      	ldr	r2, [pc, #500]	@ (80070e4 <HAL_DMA_IRQHandler+0xc78>)
 8006eee:	4293      	cmp	r3, r2
 8006ef0:	d045      	beq.n	8006f7e <HAL_DMA_IRQHandler+0xb12>
 8006ef2:	687b      	ldr	r3, [r7, #4]
 8006ef4:	681b      	ldr	r3, [r3, #0]
 8006ef6:	4a7c      	ldr	r2, [pc, #496]	@ (80070e8 <HAL_DMA_IRQHandler+0xc7c>)
 8006ef8:	4293      	cmp	r3, r2
 8006efa:	d040      	beq.n	8006f7e <HAL_DMA_IRQHandler+0xb12>
 8006efc:	687b      	ldr	r3, [r7, #4]
 8006efe:	681b      	ldr	r3, [r3, #0]
 8006f00:	4a7a      	ldr	r2, [pc, #488]	@ (80070ec <HAL_DMA_IRQHandler+0xc80>)
 8006f02:	4293      	cmp	r3, r2
 8006f04:	d03b      	beq.n	8006f7e <HAL_DMA_IRQHandler+0xb12>
 8006f06:	687b      	ldr	r3, [r7, #4]
 8006f08:	681b      	ldr	r3, [r3, #0]
 8006f0a:	4a79      	ldr	r2, [pc, #484]	@ (80070f0 <HAL_DMA_IRQHandler+0xc84>)
 8006f0c:	4293      	cmp	r3, r2
 8006f0e:	d036      	beq.n	8006f7e <HAL_DMA_IRQHandler+0xb12>
 8006f10:	687b      	ldr	r3, [r7, #4]
 8006f12:	681b      	ldr	r3, [r3, #0]
 8006f14:	4a77      	ldr	r2, [pc, #476]	@ (80070f4 <HAL_DMA_IRQHandler+0xc88>)
 8006f16:	4293      	cmp	r3, r2
 8006f18:	d031      	beq.n	8006f7e <HAL_DMA_IRQHandler+0xb12>
 8006f1a:	687b      	ldr	r3, [r7, #4]
 8006f1c:	681b      	ldr	r3, [r3, #0]
 8006f1e:	4a76      	ldr	r2, [pc, #472]	@ (80070f8 <HAL_DMA_IRQHandler+0xc8c>)
 8006f20:	4293      	cmp	r3, r2
 8006f22:	d02c      	beq.n	8006f7e <HAL_DMA_IRQHandler+0xb12>
 8006f24:	687b      	ldr	r3, [r7, #4]
 8006f26:	681b      	ldr	r3, [r3, #0]
 8006f28:	4a74      	ldr	r2, [pc, #464]	@ (80070fc <HAL_DMA_IRQHandler+0xc90>)
 8006f2a:	4293      	cmp	r3, r2
 8006f2c:	d027      	beq.n	8006f7e <HAL_DMA_IRQHandler+0xb12>
 8006f2e:	687b      	ldr	r3, [r7, #4]
 8006f30:	681b      	ldr	r3, [r3, #0]
 8006f32:	4a73      	ldr	r2, [pc, #460]	@ (8007100 <HAL_DMA_IRQHandler+0xc94>)
 8006f34:	4293      	cmp	r3, r2
 8006f36:	d022      	beq.n	8006f7e <HAL_DMA_IRQHandler+0xb12>
 8006f38:	687b      	ldr	r3, [r7, #4]
 8006f3a:	681b      	ldr	r3, [r3, #0]
 8006f3c:	4a71      	ldr	r2, [pc, #452]	@ (8007104 <HAL_DMA_IRQHandler+0xc98>)
 8006f3e:	4293      	cmp	r3, r2
 8006f40:	d01d      	beq.n	8006f7e <HAL_DMA_IRQHandler+0xb12>
 8006f42:	687b      	ldr	r3, [r7, #4]
 8006f44:	681b      	ldr	r3, [r3, #0]
 8006f46:	4a70      	ldr	r2, [pc, #448]	@ (8007108 <HAL_DMA_IRQHandler+0xc9c>)
 8006f48:	4293      	cmp	r3, r2
 8006f4a:	d018      	beq.n	8006f7e <HAL_DMA_IRQHandler+0xb12>
 8006f4c:	687b      	ldr	r3, [r7, #4]
 8006f4e:	681b      	ldr	r3, [r3, #0]
 8006f50:	4a6e      	ldr	r2, [pc, #440]	@ (800710c <HAL_DMA_IRQHandler+0xca0>)
 8006f52:	4293      	cmp	r3, r2
 8006f54:	d013      	beq.n	8006f7e <HAL_DMA_IRQHandler+0xb12>
 8006f56:	687b      	ldr	r3, [r7, #4]
 8006f58:	681b      	ldr	r3, [r3, #0]
 8006f5a:	4a6d      	ldr	r2, [pc, #436]	@ (8007110 <HAL_DMA_IRQHandler+0xca4>)
 8006f5c:	4293      	cmp	r3, r2
 8006f5e:	d00e      	beq.n	8006f7e <HAL_DMA_IRQHandler+0xb12>
 8006f60:	687b      	ldr	r3, [r7, #4]
 8006f62:	681b      	ldr	r3, [r3, #0]
 8006f64:	4a6b      	ldr	r2, [pc, #428]	@ (8007114 <HAL_DMA_IRQHandler+0xca8>)
 8006f66:	4293      	cmp	r3, r2
 8006f68:	d009      	beq.n	8006f7e <HAL_DMA_IRQHandler+0xb12>
 8006f6a:	687b      	ldr	r3, [r7, #4]
 8006f6c:	681b      	ldr	r3, [r3, #0]
 8006f6e:	4a6a      	ldr	r2, [pc, #424]	@ (8007118 <HAL_DMA_IRQHandler+0xcac>)
 8006f70:	4293      	cmp	r3, r2
 8006f72:	d004      	beq.n	8006f7e <HAL_DMA_IRQHandler+0xb12>
 8006f74:	687b      	ldr	r3, [r7, #4]
 8006f76:	681b      	ldr	r3, [r3, #0]
 8006f78:	4a68      	ldr	r2, [pc, #416]	@ (800711c <HAL_DMA_IRQHandler+0xcb0>)
 8006f7a:	4293      	cmp	r3, r2
 8006f7c:	d108      	bne.n	8006f90 <HAL_DMA_IRQHandler+0xb24>
 8006f7e:	687b      	ldr	r3, [r7, #4]
 8006f80:	681b      	ldr	r3, [r3, #0]
 8006f82:	681a      	ldr	r2, [r3, #0]
 8006f84:	687b      	ldr	r3, [r7, #4]
 8006f86:	681b      	ldr	r3, [r3, #0]
 8006f88:	f022 0208 	bic.w	r2, r2, #8
 8006f8c:	601a      	str	r2, [r3, #0]
 8006f8e:	e007      	b.n	8006fa0 <HAL_DMA_IRQHandler+0xb34>
 8006f90:	687b      	ldr	r3, [r7, #4]
 8006f92:	681b      	ldr	r3, [r3, #0]
 8006f94:	681a      	ldr	r2, [r3, #0]
 8006f96:	687b      	ldr	r3, [r7, #4]
 8006f98:	681b      	ldr	r3, [r3, #0]
 8006f9a:	f022 0204 	bic.w	r2, r2, #4
 8006f9e:	601a      	str	r2, [r3, #0]
        }

        /* DMA peripheral state is not updated in Half Transfer */
        /* but in Transfer Complete case */

       if(hdma->XferHalfCpltCallback != NULL)
 8006fa0:	687b      	ldr	r3, [r7, #4]
 8006fa2:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8006fa4:	2b00      	cmp	r3, #0
 8006fa6:	f000 8165 	beq.w	8007274 <HAL_DMA_IRQHandler+0xe08>
        {
          /* Half transfer callback */
          hdma->XferHalfCpltCallback(hdma);
 8006faa:	687b      	ldr	r3, [r7, #4]
 8006fac:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8006fae:	6878      	ldr	r0, [r7, #4]
 8006fb0:	4798      	blx	r3
      if((ccr_reg & BDMA_CCR_DBM) != 0U)
 8006fb2:	e15f      	b.n	8007274 <HAL_DMA_IRQHandler+0xe08>
        }
      }
    }

    /* Transfer Complete Interrupt management ***********************************/
    else if (((tmpisr_bdma & (BDMA_FLAG_TC0 << (hdma->StreamIndex & 0x1FU))) != 0U) && ((ccr_reg & BDMA_CCR_TCIE) != 0U))
 8006fb4:	687b      	ldr	r3, [r7, #4]
 8006fb6:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 8006fb8:	f003 031f 	and.w	r3, r3, #31
 8006fbc:	2202      	movs	r2, #2
 8006fbe:	409a      	lsls	r2, r3
 8006fc0:	697b      	ldr	r3, [r7, #20]
 8006fc2:	4013      	ands	r3, r2
 8006fc4:	2b00      	cmp	r3, #0
 8006fc6:	f000 80c5 	beq.w	8007154 <HAL_DMA_IRQHandler+0xce8>
 8006fca:	693b      	ldr	r3, [r7, #16]
 8006fcc:	f003 0302 	and.w	r3, r3, #2
 8006fd0:	2b00      	cmp	r3, #0
 8006fd2:	f000 80bf 	beq.w	8007154 <HAL_DMA_IRQHandler+0xce8>
    {
      /* Clear the transfer complete flag */
      regs_bdma->IFCR = (BDMA_ISR_TCIF0) << (hdma->StreamIndex & 0x1FU);
 8006fd6:	687b      	ldr	r3, [r7, #4]
 8006fd8:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 8006fda:	f003 031f 	and.w	r3, r3, #31
 8006fde:	2202      	movs	r2, #2
 8006fe0:	409a      	lsls	r2, r3
 8006fe2:	69fb      	ldr	r3, [r7, #28]
 8006fe4:	605a      	str	r2, [r3, #4]

      /* Disable the transfer complete interrupt if the DMA mode is Double Buffering */
      if((ccr_reg & BDMA_CCR_DBM) != 0U)
 8006fe6:	693b      	ldr	r3, [r7, #16]
 8006fe8:	f403 4300 	and.w	r3, r3, #32768	@ 0x8000
 8006fec:	2b00      	cmp	r3, #0
 8006fee:	d018      	beq.n	8007022 <HAL_DMA_IRQHandler+0xbb6>
      {
        /* Current memory buffer used is Memory 0 */
        if((ccr_reg & BDMA_CCR_CT) == 0U)
 8006ff0:	693b      	ldr	r3, [r7, #16]
 8006ff2:	f403 3380 	and.w	r3, r3, #65536	@ 0x10000
 8006ff6:	2b00      	cmp	r3, #0
 8006ff8:	d109      	bne.n	800700e <HAL_DMA_IRQHandler+0xba2>
        {
          if(hdma->XferM1CpltCallback != NULL)
 8006ffa:	687b      	ldr	r3, [r7, #4]
 8006ffc:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 8006ffe:	2b00      	cmp	r3, #0
 8007000:	f000 813a 	beq.w	8007278 <HAL_DMA_IRQHandler+0xe0c>
          {
            /* Transfer complete Callback for Memory 1 */
            hdma->XferM1CpltCallback(hdma);
 8007004:	687b      	ldr	r3, [r7, #4]
 8007006:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 8007008:	6878      	ldr	r0, [r7, #4]
 800700a:	4798      	blx	r3
      if((ccr_reg & BDMA_CCR_DBM) != 0U)
 800700c:	e134      	b.n	8007278 <HAL_DMA_IRQHandler+0xe0c>
          }
        }
        /* Current memory buffer used is Memory 1 */
        else
        {
          if(hdma->XferCpltCallback != NULL)
 800700e:	687b      	ldr	r3, [r7, #4]
 8007010:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 8007012:	2b00      	cmp	r3, #0
 8007014:	f000 8130 	beq.w	8007278 <HAL_DMA_IRQHandler+0xe0c>
          {
            /* Transfer complete Callback for Memory 0 */
            hdma->XferCpltCallback(hdma);
 8007018:	687b      	ldr	r3, [r7, #4]
 800701a:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 800701c:	6878      	ldr	r0, [r7, #4]
 800701e:	4798      	blx	r3
      if((ccr_reg & BDMA_CCR_DBM) != 0U)
 8007020:	e12a      	b.n	8007278 <HAL_DMA_IRQHandler+0xe0c>
          }
        }
      }
      else
      {
        if((ccr_reg & BDMA_CCR_CIRC) == 0U)
 8007022:	693b      	ldr	r3, [r7, #16]
 8007024:	f003 0320 	and.w	r3, r3, #32
 8007028:	2b00      	cmp	r3, #0
 800702a:	f040 8089 	bne.w	8007140 <HAL_DMA_IRQHandler+0xcd4>
        {
          /* Disable the transfer complete and error interrupt, if the DMA mode is not CIRCULAR */
          __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE | DMA_IT_TC);
 800702e:	687b      	ldr	r3, [r7, #4]
 8007030:	681b      	ldr	r3, [r3, #0]
 8007032:	4a2b      	ldr	r2, [pc, #172]	@ (80070e0 <HAL_DMA_IRQHandler+0xc74>)
 8007034:	4293      	cmp	r3, r2
 8007036:	d04a      	beq.n	80070ce <HAL_DMA_IRQHandler+0xc62>
 8007038:	687b      	ldr	r3, [r7, #4]
 800703a:	681b      	ldr	r3, [r3, #0]
 800703c:	4a29      	ldr	r2, [pc, #164]	@ (80070e4 <HAL_DMA_IRQHandler+0xc78>)
 800703e:	4293      	cmp	r3, r2
 8007040:	d045      	beq.n	80070ce <HAL_DMA_IRQHandler+0xc62>
 8007042:	687b      	ldr	r3, [r7, #4]
 8007044:	681b      	ldr	r3, [r3, #0]
 8007046:	4a28      	ldr	r2, [pc, #160]	@ (80070e8 <HAL_DMA_IRQHandler+0xc7c>)
 8007048:	4293      	cmp	r3, r2
 800704a:	d040      	beq.n	80070ce <HAL_DMA_IRQHandler+0xc62>
 800704c:	687b      	ldr	r3, [r7, #4]
 800704e:	681b      	ldr	r3, [r3, #0]
 8007050:	4a26      	ldr	r2, [pc, #152]	@ (80070ec <HAL_DMA_IRQHandler+0xc80>)
 8007052:	4293      	cmp	r3, r2
 8007054:	d03b      	beq.n	80070ce <HAL_DMA_IRQHandler+0xc62>
 8007056:	687b      	ldr	r3, [r7, #4]
 8007058:	681b      	ldr	r3, [r3, #0]
 800705a:	4a25      	ldr	r2, [pc, #148]	@ (80070f0 <HAL_DMA_IRQHandler+0xc84>)
 800705c:	4293      	cmp	r3, r2
 800705e:	d036      	beq.n	80070ce <HAL_DMA_IRQHandler+0xc62>
 8007060:	687b      	ldr	r3, [r7, #4]
 8007062:	681b      	ldr	r3, [r3, #0]
 8007064:	4a23      	ldr	r2, [pc, #140]	@ (80070f4 <HAL_DMA_IRQHandler+0xc88>)
 8007066:	4293      	cmp	r3, r2
 8007068:	d031      	beq.n	80070ce <HAL_DMA_IRQHandler+0xc62>
 800706a:	687b      	ldr	r3, [r7, #4]
 800706c:	681b      	ldr	r3, [r3, #0]
 800706e:	4a22      	ldr	r2, [pc, #136]	@ (80070f8 <HAL_DMA_IRQHandler+0xc8c>)
 8007070:	4293      	cmp	r3, r2
 8007072:	d02c      	beq.n	80070ce <HAL_DMA_IRQHandler+0xc62>
 8007074:	687b      	ldr	r3, [r7, #4]
 8007076:	681b      	ldr	r3, [r3, #0]
 8007078:	4a20      	ldr	r2, [pc, #128]	@ (80070fc <HAL_DMA_IRQHandler+0xc90>)
 800707a:	4293      	cmp	r3, r2
 800707c:	d027      	beq.n	80070ce <HAL_DMA_IRQHandler+0xc62>
 800707e:	687b      	ldr	r3, [r7, #4]
 8007080:	681b      	ldr	r3, [r3, #0]
 8007082:	4a1f      	ldr	r2, [pc, #124]	@ (8007100 <HAL_DMA_IRQHandler+0xc94>)
 8007084:	4293      	cmp	r3, r2
 8007086:	d022      	beq.n	80070ce <HAL_DMA_IRQHandler+0xc62>
 8007088:	687b      	ldr	r3, [r7, #4]
 800708a:	681b      	ldr	r3, [r3, #0]
 800708c:	4a1d      	ldr	r2, [pc, #116]	@ (8007104 <HAL_DMA_IRQHandler+0xc98>)
 800708e:	4293      	cmp	r3, r2
 8007090:	d01d      	beq.n	80070ce <HAL_DMA_IRQHandler+0xc62>
 8007092:	687b      	ldr	r3, [r7, #4]
 8007094:	681b      	ldr	r3, [r3, #0]
 8007096:	4a1c      	ldr	r2, [pc, #112]	@ (8007108 <HAL_DMA_IRQHandler+0xc9c>)
 8007098:	4293      	cmp	r3, r2
 800709a:	d018      	beq.n	80070ce <HAL_DMA_IRQHandler+0xc62>
 800709c:	687b      	ldr	r3, [r7, #4]
 800709e:	681b      	ldr	r3, [r3, #0]
 80070a0:	4a1a      	ldr	r2, [pc, #104]	@ (800710c <HAL_DMA_IRQHandler+0xca0>)
 80070a2:	4293      	cmp	r3, r2
 80070a4:	d013      	beq.n	80070ce <HAL_DMA_IRQHandler+0xc62>
 80070a6:	687b      	ldr	r3, [r7, #4]
 80070a8:	681b      	ldr	r3, [r3, #0]
 80070aa:	4a19      	ldr	r2, [pc, #100]	@ (8007110 <HAL_DMA_IRQHandler+0xca4>)
 80070ac:	4293      	cmp	r3, r2
 80070ae:	d00e      	beq.n	80070ce <HAL_DMA_IRQHandler+0xc62>
 80070b0:	687b      	ldr	r3, [r7, #4]
 80070b2:	681b      	ldr	r3, [r3, #0]
 80070b4:	4a17      	ldr	r2, [pc, #92]	@ (8007114 <HAL_DMA_IRQHandler+0xca8>)
 80070b6:	4293      	cmp	r3, r2
 80070b8:	d009      	beq.n	80070ce <HAL_DMA_IRQHandler+0xc62>
 80070ba:	687b      	ldr	r3, [r7, #4]
 80070bc:	681b      	ldr	r3, [r3, #0]
 80070be:	4a16      	ldr	r2, [pc, #88]	@ (8007118 <HAL_DMA_IRQHandler+0xcac>)
 80070c0:	4293      	cmp	r3, r2
 80070c2:	d004      	beq.n	80070ce <HAL_DMA_IRQHandler+0xc62>
 80070c4:	687b      	ldr	r3, [r7, #4]
 80070c6:	681b      	ldr	r3, [r3, #0]
 80070c8:	4a14      	ldr	r2, [pc, #80]	@ (800711c <HAL_DMA_IRQHandler+0xcb0>)
 80070ca:	4293      	cmp	r3, r2
 80070cc:	d128      	bne.n	8007120 <HAL_DMA_IRQHandler+0xcb4>
 80070ce:	687b      	ldr	r3, [r7, #4]
 80070d0:	681b      	ldr	r3, [r3, #0]
 80070d2:	681a      	ldr	r2, [r3, #0]
 80070d4:	687b      	ldr	r3, [r7, #4]
 80070d6:	681b      	ldr	r3, [r3, #0]
 80070d8:	f022 0214 	bic.w	r2, r2, #20
 80070dc:	601a      	str	r2, [r3, #0]
 80070de:	e027      	b.n	8007130 <HAL_DMA_IRQHandler+0xcc4>
 80070e0:	40020010 	.word	0x40020010
 80070e4:	40020028 	.word	0x40020028
 80070e8:	40020040 	.word	0x40020040
 80070ec:	40020058 	.word	0x40020058
 80070f0:	40020070 	.word	0x40020070
 80070f4:	40020088 	.word	0x40020088
 80070f8:	400200a0 	.word	0x400200a0
 80070fc:	400200b8 	.word	0x400200b8
 8007100:	40020410 	.word	0x40020410
 8007104:	40020428 	.word	0x40020428
 8007108:	40020440 	.word	0x40020440
 800710c:	40020458 	.word	0x40020458
 8007110:	40020470 	.word	0x40020470
 8007114:	40020488 	.word	0x40020488
 8007118:	400204a0 	.word	0x400204a0
 800711c:	400204b8 	.word	0x400204b8
 8007120:	687b      	ldr	r3, [r7, #4]
 8007122:	681b      	ldr	r3, [r3, #0]
 8007124:	681a      	ldr	r2, [r3, #0]
 8007126:	687b      	ldr	r3, [r7, #4]
 8007128:	681b      	ldr	r3, [r3, #0]
 800712a:	f022 020a 	bic.w	r2, r2, #10
 800712e:	601a      	str	r2, [r3, #0]

          /* Change the DMA state */
          hdma->State = HAL_DMA_STATE_READY;
 8007130:	687b      	ldr	r3, [r7, #4]
 8007132:	2201      	movs	r2, #1
 8007134:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

          /* Process Unlocked */
          __HAL_UNLOCK(hdma);
 8007138:	687b      	ldr	r3, [r7, #4]
 800713a:	2200      	movs	r2, #0
 800713c:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34
        }

        if(hdma->XferCpltCallback != NULL)
 8007140:	687b      	ldr	r3, [r7, #4]
 8007142:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 8007144:	2b00      	cmp	r3, #0
 8007146:	f000 8097 	beq.w	8007278 <HAL_DMA_IRQHandler+0xe0c>
        {
          /* Transfer complete callback */
          hdma->XferCpltCallback(hdma);
 800714a:	687b      	ldr	r3, [r7, #4]
 800714c:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 800714e:	6878      	ldr	r0, [r7, #4]
 8007150:	4798      	blx	r3
      if((ccr_reg & BDMA_CCR_DBM) != 0U)
 8007152:	e091      	b.n	8007278 <HAL_DMA_IRQHandler+0xe0c>
        }
      }
    }
    /* Transfer Error Interrupt management **************************************/
    else if (((tmpisr_bdma & (BDMA_FLAG_TE0 << (hdma->StreamIndex & 0x1FU))) != 0U) && ((ccr_reg & BDMA_CCR_TEIE) != 0U))
 8007154:	687b      	ldr	r3, [r7, #4]
 8007156:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 8007158:	f003 031f 	and.w	r3, r3, #31
 800715c:	2208      	movs	r2, #8
 800715e:	409a      	lsls	r2, r3
 8007160:	697b      	ldr	r3, [r7, #20]
 8007162:	4013      	ands	r3, r2
 8007164:	2b00      	cmp	r3, #0
 8007166:	f000 8088 	beq.w	800727a <HAL_DMA_IRQHandler+0xe0e>
 800716a:	693b      	ldr	r3, [r7, #16]
 800716c:	f003 0308 	and.w	r3, r3, #8
 8007170:	2b00      	cmp	r3, #0
 8007172:	f000 8082 	beq.w	800727a <HAL_DMA_IRQHandler+0xe0e>
    {
      /* When a DMA transfer error occurs */
      /* A hardware clear of its EN bits is performed */
      /* Disable ALL DMA IT */
      __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
 8007176:	687b      	ldr	r3, [r7, #4]
 8007178:	681b      	ldr	r3, [r3, #0]
 800717a:	4a41      	ldr	r2, [pc, #260]	@ (8007280 <HAL_DMA_IRQHandler+0xe14>)
 800717c:	4293      	cmp	r3, r2
 800717e:	d04a      	beq.n	8007216 <HAL_DMA_IRQHandler+0xdaa>
 8007180:	687b      	ldr	r3, [r7, #4]
 8007182:	681b      	ldr	r3, [r3, #0]
 8007184:	4a3f      	ldr	r2, [pc, #252]	@ (8007284 <HAL_DMA_IRQHandler+0xe18>)
 8007186:	4293      	cmp	r3, r2
 8007188:	d045      	beq.n	8007216 <HAL_DMA_IRQHandler+0xdaa>
 800718a:	687b      	ldr	r3, [r7, #4]
 800718c:	681b      	ldr	r3, [r3, #0]
 800718e:	4a3e      	ldr	r2, [pc, #248]	@ (8007288 <HAL_DMA_IRQHandler+0xe1c>)
 8007190:	4293      	cmp	r3, r2
 8007192:	d040      	beq.n	8007216 <HAL_DMA_IRQHandler+0xdaa>
 8007194:	687b      	ldr	r3, [r7, #4]
 8007196:	681b      	ldr	r3, [r3, #0]
 8007198:	4a3c      	ldr	r2, [pc, #240]	@ (800728c <HAL_DMA_IRQHandler+0xe20>)
 800719a:	4293      	cmp	r3, r2
 800719c:	d03b      	beq.n	8007216 <HAL_DMA_IRQHandler+0xdaa>
 800719e:	687b      	ldr	r3, [r7, #4]
 80071a0:	681b      	ldr	r3, [r3, #0]
 80071a2:	4a3b      	ldr	r2, [pc, #236]	@ (8007290 <HAL_DMA_IRQHandler+0xe24>)
 80071a4:	4293      	cmp	r3, r2
 80071a6:	d036      	beq.n	8007216 <HAL_DMA_IRQHandler+0xdaa>
 80071a8:	687b      	ldr	r3, [r7, #4]
 80071aa:	681b      	ldr	r3, [r3, #0]
 80071ac:	4a39      	ldr	r2, [pc, #228]	@ (8007294 <HAL_DMA_IRQHandler+0xe28>)
 80071ae:	4293      	cmp	r3, r2
 80071b0:	d031      	beq.n	8007216 <HAL_DMA_IRQHandler+0xdaa>
 80071b2:	687b      	ldr	r3, [r7, #4]
 80071b4:	681b      	ldr	r3, [r3, #0]
 80071b6:	4a38      	ldr	r2, [pc, #224]	@ (8007298 <HAL_DMA_IRQHandler+0xe2c>)
 80071b8:	4293      	cmp	r3, r2
 80071ba:	d02c      	beq.n	8007216 <HAL_DMA_IRQHandler+0xdaa>
 80071bc:	687b      	ldr	r3, [r7, #4]
 80071be:	681b      	ldr	r3, [r3, #0]
 80071c0:	4a36      	ldr	r2, [pc, #216]	@ (800729c <HAL_DMA_IRQHandler+0xe30>)
 80071c2:	4293      	cmp	r3, r2
 80071c4:	d027      	beq.n	8007216 <HAL_DMA_IRQHandler+0xdaa>
 80071c6:	687b      	ldr	r3, [r7, #4]
 80071c8:	681b      	ldr	r3, [r3, #0]
 80071ca:	4a35      	ldr	r2, [pc, #212]	@ (80072a0 <HAL_DMA_IRQHandler+0xe34>)
 80071cc:	4293      	cmp	r3, r2
 80071ce:	d022      	beq.n	8007216 <HAL_DMA_IRQHandler+0xdaa>
 80071d0:	687b      	ldr	r3, [r7, #4]
 80071d2:	681b      	ldr	r3, [r3, #0]
 80071d4:	4a33      	ldr	r2, [pc, #204]	@ (80072a4 <HAL_DMA_IRQHandler+0xe38>)
 80071d6:	4293      	cmp	r3, r2
 80071d8:	d01d      	beq.n	8007216 <HAL_DMA_IRQHandler+0xdaa>
 80071da:	687b      	ldr	r3, [r7, #4]
 80071dc:	681b      	ldr	r3, [r3, #0]
 80071de:	4a32      	ldr	r2, [pc, #200]	@ (80072a8 <HAL_DMA_IRQHandler+0xe3c>)
 80071e0:	4293      	cmp	r3, r2
 80071e2:	d018      	beq.n	8007216 <HAL_DMA_IRQHandler+0xdaa>
 80071e4:	687b      	ldr	r3, [r7, #4]
 80071e6:	681b      	ldr	r3, [r3, #0]
 80071e8:	4a30      	ldr	r2, [pc, #192]	@ (80072ac <HAL_DMA_IRQHandler+0xe40>)
 80071ea:	4293      	cmp	r3, r2
 80071ec:	d013      	beq.n	8007216 <HAL_DMA_IRQHandler+0xdaa>
 80071ee:	687b      	ldr	r3, [r7, #4]
 80071f0:	681b      	ldr	r3, [r3, #0]
 80071f2:	4a2f      	ldr	r2, [pc, #188]	@ (80072b0 <HAL_DMA_IRQHandler+0xe44>)
 80071f4:	4293      	cmp	r3, r2
 80071f6:	d00e      	beq.n	8007216 <HAL_DMA_IRQHandler+0xdaa>
 80071f8:	687b      	ldr	r3, [r7, #4]
 80071fa:	681b      	ldr	r3, [r3, #0]
 80071fc:	4a2d      	ldr	r2, [pc, #180]	@ (80072b4 <HAL_DMA_IRQHandler+0xe48>)
 80071fe:	4293      	cmp	r3, r2
 8007200:	d009      	beq.n	8007216 <HAL_DMA_IRQHandler+0xdaa>
 8007202:	687b      	ldr	r3, [r7, #4]
 8007204:	681b      	ldr	r3, [r3, #0]
 8007206:	4a2c      	ldr	r2, [pc, #176]	@ (80072b8 <HAL_DMA_IRQHandler+0xe4c>)
 8007208:	4293      	cmp	r3, r2
 800720a:	d004      	beq.n	8007216 <HAL_DMA_IRQHandler+0xdaa>
 800720c:	687b      	ldr	r3, [r7, #4]
 800720e:	681b      	ldr	r3, [r3, #0]
 8007210:	4a2a      	ldr	r2, [pc, #168]	@ (80072bc <HAL_DMA_IRQHandler+0xe50>)
 8007212:	4293      	cmp	r3, r2
 8007214:	d108      	bne.n	8007228 <HAL_DMA_IRQHandler+0xdbc>
 8007216:	687b      	ldr	r3, [r7, #4]
 8007218:	681b      	ldr	r3, [r3, #0]
 800721a:	681a      	ldr	r2, [r3, #0]
 800721c:	687b      	ldr	r3, [r7, #4]
 800721e:	681b      	ldr	r3, [r3, #0]
 8007220:	f022 021c 	bic.w	r2, r2, #28
 8007224:	601a      	str	r2, [r3, #0]
 8007226:	e007      	b.n	8007238 <HAL_DMA_IRQHandler+0xdcc>
 8007228:	687b      	ldr	r3, [r7, #4]
 800722a:	681b      	ldr	r3, [r3, #0]
 800722c:	681a      	ldr	r2, [r3, #0]
 800722e:	687b      	ldr	r3, [r7, #4]
 8007230:	681b      	ldr	r3, [r3, #0]
 8007232:	f022 020e 	bic.w	r2, r2, #14
 8007236:	601a      	str	r2, [r3, #0]

      /* Clear all flags */
      regs_bdma->IFCR = (BDMA_ISR_GIF0) << (hdma->StreamIndex & 0x1FU);
 8007238:	687b      	ldr	r3, [r7, #4]
 800723a:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 800723c:	f003 031f 	and.w	r3, r3, #31
 8007240:	2201      	movs	r2, #1
 8007242:	409a      	lsls	r2, r3
 8007244:	69fb      	ldr	r3, [r7, #28]
 8007246:	605a      	str	r2, [r3, #4]

      /* Update error code */
      hdma->ErrorCode = HAL_DMA_ERROR_TE;
 8007248:	687b      	ldr	r3, [r7, #4]
 800724a:	2201      	movs	r2, #1
 800724c:	655a      	str	r2, [r3, #84]	@ 0x54

      /* Change the DMA state */
      hdma->State = HAL_DMA_STATE_READY;
 800724e:	687b      	ldr	r3, [r7, #4]
 8007250:	2201      	movs	r2, #1
 8007252:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

      /* Process Unlocked */
      __HAL_UNLOCK(hdma);
 8007256:	687b      	ldr	r3, [r7, #4]
 8007258:	2200      	movs	r2, #0
 800725a:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34

      if (hdma->XferErrorCallback != NULL)
 800725e:	687b      	ldr	r3, [r7, #4]
 8007260:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 8007262:	2b00      	cmp	r3, #0
 8007264:	d009      	beq.n	800727a <HAL_DMA_IRQHandler+0xe0e>
      {
        /* Transfer error callback */
        hdma->XferErrorCallback(hdma);
 8007266:	687b      	ldr	r3, [r7, #4]
 8007268:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 800726a:	6878      	ldr	r0, [r7, #4]
 800726c:	4798      	blx	r3
 800726e:	e004      	b.n	800727a <HAL_DMA_IRQHandler+0xe0e>
          return;
 8007270:	bf00      	nop
 8007272:	e002      	b.n	800727a <HAL_DMA_IRQHandler+0xe0e>
      if((ccr_reg & BDMA_CCR_DBM) != 0U)
 8007274:	bf00      	nop
 8007276:	e000      	b.n	800727a <HAL_DMA_IRQHandler+0xe0e>
      if((ccr_reg & BDMA_CCR_DBM) != 0U)
 8007278:	bf00      	nop
  }
  else
  {
    /* Nothing To Do */
  }
}
 800727a:	3728      	adds	r7, #40	@ 0x28
 800727c:	46bd      	mov	sp, r7
 800727e:	bd80      	pop	{r7, pc}
 8007280:	40020010 	.word	0x40020010
 8007284:	40020028 	.word	0x40020028
 8007288:	40020040 	.word	0x40020040
 800728c:	40020058 	.word	0x40020058
 8007290:	40020070 	.word	0x40020070
 8007294:	40020088 	.word	0x40020088
 8007298:	400200a0 	.word	0x400200a0
 800729c:	400200b8 	.word	0x400200b8
 80072a0:	40020410 	.word	0x40020410
 80072a4:	40020428 	.word	0x40020428
 80072a8:	40020440 	.word	0x40020440
 80072ac:	40020458 	.word	0x40020458
 80072b0:	40020470 	.word	0x40020470
 80072b4:	40020488 	.word	0x40020488
 80072b8:	400204a0 	.word	0x400204a0
 80072bc:	400204b8 	.word	0x400204b8

080072c0 <DMA_CalcBaseAndBitshift>:
  * @param  hdma:       pointer to a DMA_HandleTypeDef structure that contains
  *                     the configuration information for the specified DMA Stream.
  * @retval Stream base address
  */
static uint32_t DMA_CalcBaseAndBitshift(DMA_HandleTypeDef *hdma)
{
 80072c0:	b480      	push	{r7}
 80072c2:	b085      	sub	sp, #20
 80072c4:	af00      	add	r7, sp, #0
 80072c6:	6078      	str	r0, [r7, #4]
  if(IS_DMA_STREAM_INSTANCE(hdma->Instance) != 0U) /* DMA1 or DMA2 instance */
 80072c8:	687b      	ldr	r3, [r7, #4]
 80072ca:	681b      	ldr	r3, [r3, #0]
 80072cc:	4a42      	ldr	r2, [pc, #264]	@ (80073d8 <DMA_CalcBaseAndBitshift+0x118>)
 80072ce:	4293      	cmp	r3, r2
 80072d0:	d04a      	beq.n	8007368 <DMA_CalcBaseAndBitshift+0xa8>
 80072d2:	687b      	ldr	r3, [r7, #4]
 80072d4:	681b      	ldr	r3, [r3, #0]
 80072d6:	4a41      	ldr	r2, [pc, #260]	@ (80073dc <DMA_CalcBaseAndBitshift+0x11c>)
 80072d8:	4293      	cmp	r3, r2
 80072da:	d045      	beq.n	8007368 <DMA_CalcBaseAndBitshift+0xa8>
 80072dc:	687b      	ldr	r3, [r7, #4]
 80072de:	681b      	ldr	r3, [r3, #0]
 80072e0:	4a3f      	ldr	r2, [pc, #252]	@ (80073e0 <DMA_CalcBaseAndBitshift+0x120>)
 80072e2:	4293      	cmp	r3, r2
 80072e4:	d040      	beq.n	8007368 <DMA_CalcBaseAndBitshift+0xa8>
 80072e6:	687b      	ldr	r3, [r7, #4]
 80072e8:	681b      	ldr	r3, [r3, #0]
 80072ea:	4a3e      	ldr	r2, [pc, #248]	@ (80073e4 <DMA_CalcBaseAndBitshift+0x124>)
 80072ec:	4293      	cmp	r3, r2
 80072ee:	d03b      	beq.n	8007368 <DMA_CalcBaseAndBitshift+0xa8>
 80072f0:	687b      	ldr	r3, [r7, #4]
 80072f2:	681b      	ldr	r3, [r3, #0]
 80072f4:	4a3c      	ldr	r2, [pc, #240]	@ (80073e8 <DMA_CalcBaseAndBitshift+0x128>)
 80072f6:	4293      	cmp	r3, r2
 80072f8:	d036      	beq.n	8007368 <DMA_CalcBaseAndBitshift+0xa8>
 80072fa:	687b      	ldr	r3, [r7, #4]
 80072fc:	681b      	ldr	r3, [r3, #0]
 80072fe:	4a3b      	ldr	r2, [pc, #236]	@ (80073ec <DMA_CalcBaseAndBitshift+0x12c>)
 8007300:	4293      	cmp	r3, r2
 8007302:	d031      	beq.n	8007368 <DMA_CalcBaseAndBitshift+0xa8>
 8007304:	687b      	ldr	r3, [r7, #4]
 8007306:	681b      	ldr	r3, [r3, #0]
 8007308:	4a39      	ldr	r2, [pc, #228]	@ (80073f0 <DMA_CalcBaseAndBitshift+0x130>)
 800730a:	4293      	cmp	r3, r2
 800730c:	d02c      	beq.n	8007368 <DMA_CalcBaseAndBitshift+0xa8>
 800730e:	687b      	ldr	r3, [r7, #4]
 8007310:	681b      	ldr	r3, [r3, #0]
 8007312:	4a38      	ldr	r2, [pc, #224]	@ (80073f4 <DMA_CalcBaseAndBitshift+0x134>)
 8007314:	4293      	cmp	r3, r2
 8007316:	d027      	beq.n	8007368 <DMA_CalcBaseAndBitshift+0xa8>
 8007318:	687b      	ldr	r3, [r7, #4]
 800731a:	681b      	ldr	r3, [r3, #0]
 800731c:	4a36      	ldr	r2, [pc, #216]	@ (80073f8 <DMA_CalcBaseAndBitshift+0x138>)
 800731e:	4293      	cmp	r3, r2
 8007320:	d022      	beq.n	8007368 <DMA_CalcBaseAndBitshift+0xa8>
 8007322:	687b      	ldr	r3, [r7, #4]
 8007324:	681b      	ldr	r3, [r3, #0]
 8007326:	4a35      	ldr	r2, [pc, #212]	@ (80073fc <DMA_CalcBaseAndBitshift+0x13c>)
 8007328:	4293      	cmp	r3, r2
 800732a:	d01d      	beq.n	8007368 <DMA_CalcBaseAndBitshift+0xa8>
 800732c:	687b      	ldr	r3, [r7, #4]
 800732e:	681b      	ldr	r3, [r3, #0]
 8007330:	4a33      	ldr	r2, [pc, #204]	@ (8007400 <DMA_CalcBaseAndBitshift+0x140>)
 8007332:	4293      	cmp	r3, r2
 8007334:	d018      	beq.n	8007368 <DMA_CalcBaseAndBitshift+0xa8>
 8007336:	687b      	ldr	r3, [r7, #4]
 8007338:	681b      	ldr	r3, [r3, #0]
 800733a:	4a32      	ldr	r2, [pc, #200]	@ (8007404 <DMA_CalcBaseAndBitshift+0x144>)
 800733c:	4293      	cmp	r3, r2
 800733e:	d013      	beq.n	8007368 <DMA_CalcBaseAndBitshift+0xa8>
 8007340:	687b      	ldr	r3, [r7, #4]
 8007342:	681b      	ldr	r3, [r3, #0]
 8007344:	4a30      	ldr	r2, [pc, #192]	@ (8007408 <DMA_CalcBaseAndBitshift+0x148>)
 8007346:	4293      	cmp	r3, r2
 8007348:	d00e      	beq.n	8007368 <DMA_CalcBaseAndBitshift+0xa8>
 800734a:	687b      	ldr	r3, [r7, #4]
 800734c:	681b      	ldr	r3, [r3, #0]
 800734e:	4a2f      	ldr	r2, [pc, #188]	@ (800740c <DMA_CalcBaseAndBitshift+0x14c>)
 8007350:	4293      	cmp	r3, r2
 8007352:	d009      	beq.n	8007368 <DMA_CalcBaseAndBitshift+0xa8>
 8007354:	687b      	ldr	r3, [r7, #4]
 8007356:	681b      	ldr	r3, [r3, #0]
 8007358:	4a2d      	ldr	r2, [pc, #180]	@ (8007410 <DMA_CalcBaseAndBitshift+0x150>)
 800735a:	4293      	cmp	r3, r2
 800735c:	d004      	beq.n	8007368 <DMA_CalcBaseAndBitshift+0xa8>
 800735e:	687b      	ldr	r3, [r7, #4]
 8007360:	681b      	ldr	r3, [r3, #0]
 8007362:	4a2c      	ldr	r2, [pc, #176]	@ (8007414 <DMA_CalcBaseAndBitshift+0x154>)
 8007364:	4293      	cmp	r3, r2
 8007366:	d101      	bne.n	800736c <DMA_CalcBaseAndBitshift+0xac>
 8007368:	2301      	movs	r3, #1
 800736a:	e000      	b.n	800736e <DMA_CalcBaseAndBitshift+0xae>
 800736c:	2300      	movs	r3, #0
 800736e:	2b00      	cmp	r3, #0
 8007370:	d024      	beq.n	80073bc <DMA_CalcBaseAndBitshift+0xfc>
  {
    uint32_t stream_number = (((uint32_t)((uint32_t*)hdma->Instance) & 0xFFU) - 16U) / 24U;
 8007372:	687b      	ldr	r3, [r7, #4]
 8007374:	681b      	ldr	r3, [r3, #0]
 8007376:	b2db      	uxtb	r3, r3
 8007378:	3b10      	subs	r3, #16
 800737a:	4a27      	ldr	r2, [pc, #156]	@ (8007418 <DMA_CalcBaseAndBitshift+0x158>)
 800737c:	fba2 2303 	umull	r2, r3, r2, r3
 8007380:	091b      	lsrs	r3, r3, #4
 8007382:	60fb      	str	r3, [r7, #12]

    /* lookup table for necessary bitshift of flags within status registers */
    static const uint8_t flagBitshiftOffset[8U] = {0U, 6U, 16U, 22U, 0U, 6U, 16U, 22U};
    hdma->StreamIndex = flagBitshiftOffset[stream_number & 0x7U];
 8007384:	68fb      	ldr	r3, [r7, #12]
 8007386:	f003 0307 	and.w	r3, r3, #7
 800738a:	4a24      	ldr	r2, [pc, #144]	@ (800741c <DMA_CalcBaseAndBitshift+0x15c>)
 800738c:	5cd3      	ldrb	r3, [r2, r3]
 800738e:	461a      	mov	r2, r3
 8007390:	687b      	ldr	r3, [r7, #4]
 8007392:	65da      	str	r2, [r3, #92]	@ 0x5c

    if (stream_number > 3U)
 8007394:	68fb      	ldr	r3, [r7, #12]
 8007396:	2b03      	cmp	r3, #3
 8007398:	d908      	bls.n	80073ac <DMA_CalcBaseAndBitshift+0xec>
    {
      /* return pointer to HISR and HIFCR */
      hdma->StreamBaseAddress = (((uint32_t)((uint32_t*)hdma->Instance) & (uint32_t)(~0x3FFU)) + 4U);
 800739a:	687b      	ldr	r3, [r7, #4]
 800739c:	681b      	ldr	r3, [r3, #0]
 800739e:	461a      	mov	r2, r3
 80073a0:	4b1f      	ldr	r3, [pc, #124]	@ (8007420 <DMA_CalcBaseAndBitshift+0x160>)
 80073a2:	4013      	ands	r3, r2
 80073a4:	1d1a      	adds	r2, r3, #4
 80073a6:	687b      	ldr	r3, [r7, #4]
 80073a8:	659a      	str	r2, [r3, #88]	@ 0x58
 80073aa:	e00d      	b.n	80073c8 <DMA_CalcBaseAndBitshift+0x108>
    }
    else
    {
      /* return pointer to LISR and LIFCR */
      hdma->StreamBaseAddress = ((uint32_t)((uint32_t*)hdma->Instance) & (uint32_t)(~0x3FFU));
 80073ac:	687b      	ldr	r3, [r7, #4]
 80073ae:	681b      	ldr	r3, [r3, #0]
 80073b0:	461a      	mov	r2, r3
 80073b2:	4b1b      	ldr	r3, [pc, #108]	@ (8007420 <DMA_CalcBaseAndBitshift+0x160>)
 80073b4:	4013      	ands	r3, r2
 80073b6:	687a      	ldr	r2, [r7, #4]
 80073b8:	6593      	str	r3, [r2, #88]	@ 0x58
 80073ba:	e005      	b.n	80073c8 <DMA_CalcBaseAndBitshift+0x108>
    }
  }
  else /* BDMA instance(s) */
  {
    /* return pointer to ISR and IFCR */
    hdma->StreamBaseAddress = ((uint32_t)((uint32_t*)hdma->Instance) & (uint32_t)(~0xFFU));
 80073bc:	687b      	ldr	r3, [r7, #4]
 80073be:	681b      	ldr	r3, [r3, #0]
 80073c0:	f023 02ff 	bic.w	r2, r3, #255	@ 0xff
 80073c4:	687b      	ldr	r3, [r7, #4]
 80073c6:	659a      	str	r2, [r3, #88]	@ 0x58
  }

  return hdma->StreamBaseAddress;
 80073c8:	687b      	ldr	r3, [r7, #4]
 80073ca:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
}
 80073cc:	4618      	mov	r0, r3
 80073ce:	3714      	adds	r7, #20
 80073d0:	46bd      	mov	sp, r7
 80073d2:	f85d 7b04 	ldr.w	r7, [sp], #4
 80073d6:	4770      	bx	lr
 80073d8:	40020010 	.word	0x40020010
 80073dc:	40020028 	.word	0x40020028
 80073e0:	40020040 	.word	0x40020040
 80073e4:	40020058 	.word	0x40020058
 80073e8:	40020070 	.word	0x40020070
 80073ec:	40020088 	.word	0x40020088
 80073f0:	400200a0 	.word	0x400200a0
 80073f4:	400200b8 	.word	0x400200b8
 80073f8:	40020410 	.word	0x40020410
 80073fc:	40020428 	.word	0x40020428
 8007400:	40020440 	.word	0x40020440
 8007404:	40020458 	.word	0x40020458
 8007408:	40020470 	.word	0x40020470
 800740c:	40020488 	.word	0x40020488
 8007410:	400204a0 	.word	0x400204a0
 8007414:	400204b8 	.word	0x400204b8
 8007418:	aaaaaaab 	.word	0xaaaaaaab
 800741c:	080305c8 	.word	0x080305c8
 8007420:	fffffc00 	.word	0xfffffc00

08007424 <DMA_CheckFifoParam>:
  * @param  hdma:       pointer to a DMA_HandleTypeDef structure that contains
  *                     the configuration information for the specified DMA Stream.
  * @retval HAL status
  */
static HAL_StatusTypeDef DMA_CheckFifoParam(DMA_HandleTypeDef *hdma)
{
 8007424:	b480      	push	{r7}
 8007426:	b085      	sub	sp, #20
 8007428:	af00      	add	r7, sp, #0
 800742a:	6078      	str	r0, [r7, #4]
  HAL_StatusTypeDef status = HAL_OK;
 800742c:	2300      	movs	r3, #0
 800742e:	73fb      	strb	r3, [r7, #15]

  /* Memory Data size equal to Byte */
  if (hdma->Init.MemDataAlignment == DMA_MDATAALIGN_BYTE)
 8007430:	687b      	ldr	r3, [r7, #4]
 8007432:	699b      	ldr	r3, [r3, #24]
 8007434:	2b00      	cmp	r3, #0
 8007436:	d120      	bne.n	800747a <DMA_CheckFifoParam+0x56>
  {
    switch (hdma->Init.FIFOThreshold)
 8007438:	687b      	ldr	r3, [r7, #4]
 800743a:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800743c:	2b03      	cmp	r3, #3
 800743e:	d858      	bhi.n	80074f2 <DMA_CheckFifoParam+0xce>
 8007440:	a201      	add	r2, pc, #4	@ (adr r2, 8007448 <DMA_CheckFifoParam+0x24>)
 8007442:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 8007446:	bf00      	nop
 8007448:	08007459 	.word	0x08007459
 800744c:	0800746b 	.word	0x0800746b
 8007450:	08007459 	.word	0x08007459
 8007454:	080074f3 	.word	0x080074f3
    {
      case DMA_FIFO_THRESHOLD_1QUARTERFULL:
      case DMA_FIFO_THRESHOLD_3QUARTERSFULL:

        if ((hdma->Init.MemBurst & DMA_SxCR_MBURST_1) == DMA_SxCR_MBURST_1)
 8007458:	687b      	ldr	r3, [r7, #4]
 800745a:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800745c:	f003 7380 	and.w	r3, r3, #16777216	@ 0x1000000
 8007460:	2b00      	cmp	r3, #0
 8007462:	d048      	beq.n	80074f6 <DMA_CheckFifoParam+0xd2>
        {
          status = HAL_ERROR;
 8007464:	2301      	movs	r3, #1
 8007466:	73fb      	strb	r3, [r7, #15]
        }
        break;
 8007468:	e045      	b.n	80074f6 <DMA_CheckFifoParam+0xd2>

      case DMA_FIFO_THRESHOLD_HALFFULL:
        if (hdma->Init.MemBurst == DMA_MBURST_INC16)
 800746a:	687b      	ldr	r3, [r7, #4]
 800746c:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800746e:	f1b3 7fc0 	cmp.w	r3, #25165824	@ 0x1800000
 8007472:	d142      	bne.n	80074fa <DMA_CheckFifoParam+0xd6>
        {
          status = HAL_ERROR;
 8007474:	2301      	movs	r3, #1
 8007476:	73fb      	strb	r3, [r7, #15]
        }
        break;
 8007478:	e03f      	b.n	80074fa <DMA_CheckFifoParam+0xd6>
        break;
    }
  }

  /* Memory Data size equal to Half-Word */
  else if (hdma->Init.MemDataAlignment == DMA_MDATAALIGN_HALFWORD)
 800747a:	687b      	ldr	r3, [r7, #4]
 800747c:	699b      	ldr	r3, [r3, #24]
 800747e:	f5b3 5f00 	cmp.w	r3, #8192	@ 0x2000
 8007482:	d123      	bne.n	80074cc <DMA_CheckFifoParam+0xa8>
  {
    switch (hdma->Init.FIFOThreshold)
 8007484:	687b      	ldr	r3, [r7, #4]
 8007486:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 8007488:	2b03      	cmp	r3, #3
 800748a:	d838      	bhi.n	80074fe <DMA_CheckFifoParam+0xda>
 800748c:	a201      	add	r2, pc, #4	@ (adr r2, 8007494 <DMA_CheckFifoParam+0x70>)
 800748e:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 8007492:	bf00      	nop
 8007494:	080074a5 	.word	0x080074a5
 8007498:	080074ab 	.word	0x080074ab
 800749c:	080074a5 	.word	0x080074a5
 80074a0:	080074bd 	.word	0x080074bd
    {
      case DMA_FIFO_THRESHOLD_1QUARTERFULL:
      case DMA_FIFO_THRESHOLD_3QUARTERSFULL:
        status = HAL_ERROR;
 80074a4:	2301      	movs	r3, #1
 80074a6:	73fb      	strb	r3, [r7, #15]
        break;
 80074a8:	e030      	b.n	800750c <DMA_CheckFifoParam+0xe8>

      case DMA_FIFO_THRESHOLD_HALFFULL:
        if ((hdma->Init.MemBurst & DMA_SxCR_MBURST_1) == DMA_SxCR_MBURST_1)
 80074aa:	687b      	ldr	r3, [r7, #4]
 80074ac:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80074ae:	f003 7380 	and.w	r3, r3, #16777216	@ 0x1000000
 80074b2:	2b00      	cmp	r3, #0
 80074b4:	d025      	beq.n	8007502 <DMA_CheckFifoParam+0xde>
        {
          status = HAL_ERROR;
 80074b6:	2301      	movs	r3, #1
 80074b8:	73fb      	strb	r3, [r7, #15]
        }
        break;
 80074ba:	e022      	b.n	8007502 <DMA_CheckFifoParam+0xde>

      case DMA_FIFO_THRESHOLD_FULL:
        if (hdma->Init.MemBurst == DMA_MBURST_INC16)
 80074bc:	687b      	ldr	r3, [r7, #4]
 80074be:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80074c0:	f1b3 7fc0 	cmp.w	r3, #25165824	@ 0x1800000
 80074c4:	d11f      	bne.n	8007506 <DMA_CheckFifoParam+0xe2>
        {
          status = HAL_ERROR;
 80074c6:	2301      	movs	r3, #1
 80074c8:	73fb      	strb	r3, [r7, #15]
        }
        break;
 80074ca:	e01c      	b.n	8007506 <DMA_CheckFifoParam+0xe2>
  }

  /* Memory Data size equal to Word */
  else
  {
    switch (hdma->Init.FIFOThreshold)
 80074cc:	687b      	ldr	r3, [r7, #4]
 80074ce:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 80074d0:	2b02      	cmp	r3, #2
 80074d2:	d902      	bls.n	80074da <DMA_CheckFifoParam+0xb6>
 80074d4:	2b03      	cmp	r3, #3
 80074d6:	d003      	beq.n	80074e0 <DMA_CheckFifoParam+0xbc>
          status = HAL_ERROR;
        }
    break;

      default:
        break;
 80074d8:	e018      	b.n	800750c <DMA_CheckFifoParam+0xe8>
        status = HAL_ERROR;
 80074da:	2301      	movs	r3, #1
 80074dc:	73fb      	strb	r3, [r7, #15]
        break;
 80074de:	e015      	b.n	800750c <DMA_CheckFifoParam+0xe8>
        if ((hdma->Init.MemBurst & DMA_SxCR_MBURST_1) == DMA_SxCR_MBURST_1)
 80074e0:	687b      	ldr	r3, [r7, #4]
 80074e2:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80074e4:	f003 7380 	and.w	r3, r3, #16777216	@ 0x1000000
 80074e8:	2b00      	cmp	r3, #0
 80074ea:	d00e      	beq.n	800750a <DMA_CheckFifoParam+0xe6>
          status = HAL_ERROR;
 80074ec:	2301      	movs	r3, #1
 80074ee:	73fb      	strb	r3, [r7, #15]
    break;
 80074f0:	e00b      	b.n	800750a <DMA_CheckFifoParam+0xe6>
        break;
 80074f2:	bf00      	nop
 80074f4:	e00a      	b.n	800750c <DMA_CheckFifoParam+0xe8>
        break;
 80074f6:	bf00      	nop
 80074f8:	e008      	b.n	800750c <DMA_CheckFifoParam+0xe8>
        break;
 80074fa:	bf00      	nop
 80074fc:	e006      	b.n	800750c <DMA_CheckFifoParam+0xe8>
        break;
 80074fe:	bf00      	nop
 8007500:	e004      	b.n	800750c <DMA_CheckFifoParam+0xe8>
        break;
 8007502:	bf00      	nop
 8007504:	e002      	b.n	800750c <DMA_CheckFifoParam+0xe8>
        break;
 8007506:	bf00      	nop
 8007508:	e000      	b.n	800750c <DMA_CheckFifoParam+0xe8>
    break;
 800750a:	bf00      	nop
    }
  }

  return status;
 800750c:	7bfb      	ldrb	r3, [r7, #15]
}
 800750e:	4618      	mov	r0, r3
 8007510:	3714      	adds	r7, #20
 8007512:	46bd      	mov	sp, r7
 8007514:	f85d 7b04 	ldr.w	r7, [sp], #4
 8007518:	4770      	bx	lr
 800751a:	bf00      	nop

0800751c <DMA_CalcDMAMUXChannelBaseAndMask>:
  * @param  hdma:       pointer to a DMA_HandleTypeDef structure that contains
  *                     the configuration information for the specified DMA Stream.
  * @retval HAL status
  */
static void DMA_CalcDMAMUXChannelBaseAndMask(DMA_HandleTypeDef *hdma)
{
 800751c:	b480      	push	{r7}
 800751e:	b085      	sub	sp, #20
 8007520:	af00      	add	r7, sp, #0
 8007522:	6078      	str	r0, [r7, #4]
  uint32_t stream_number;
  uint32_t stream_baseaddress = (uint32_t)((uint32_t*)hdma->Instance);
 8007524:	687b      	ldr	r3, [r7, #4]
 8007526:	681b      	ldr	r3, [r3, #0]
 8007528:	60bb      	str	r3, [r7, #8]

  if(IS_BDMA_CHANNEL_DMAMUX_INSTANCE(hdma->Instance) != 0U)
 800752a:	687b      	ldr	r3, [r7, #4]
 800752c:	681b      	ldr	r3, [r3, #0]
 800752e:	4a38      	ldr	r2, [pc, #224]	@ (8007610 <DMA_CalcDMAMUXChannelBaseAndMask+0xf4>)
 8007530:	4293      	cmp	r3, r2
 8007532:	d022      	beq.n	800757a <DMA_CalcDMAMUXChannelBaseAndMask+0x5e>
 8007534:	687b      	ldr	r3, [r7, #4]
 8007536:	681b      	ldr	r3, [r3, #0]
 8007538:	4a36      	ldr	r2, [pc, #216]	@ (8007614 <DMA_CalcDMAMUXChannelBaseAndMask+0xf8>)
 800753a:	4293      	cmp	r3, r2
 800753c:	d01d      	beq.n	800757a <DMA_CalcDMAMUXChannelBaseAndMask+0x5e>
 800753e:	687b      	ldr	r3, [r7, #4]
 8007540:	681b      	ldr	r3, [r3, #0]
 8007542:	4a35      	ldr	r2, [pc, #212]	@ (8007618 <DMA_CalcDMAMUXChannelBaseAndMask+0xfc>)
 8007544:	4293      	cmp	r3, r2
 8007546:	d018      	beq.n	800757a <DMA_CalcDMAMUXChannelBaseAndMask+0x5e>
 8007548:	687b      	ldr	r3, [r7, #4]
 800754a:	681b      	ldr	r3, [r3, #0]
 800754c:	4a33      	ldr	r2, [pc, #204]	@ (800761c <DMA_CalcDMAMUXChannelBaseAndMask+0x100>)
 800754e:	4293      	cmp	r3, r2
 8007550:	d013      	beq.n	800757a <DMA_CalcDMAMUXChannelBaseAndMask+0x5e>
 8007552:	687b      	ldr	r3, [r7, #4]
 8007554:	681b      	ldr	r3, [r3, #0]
 8007556:	4a32      	ldr	r2, [pc, #200]	@ (8007620 <DMA_CalcDMAMUXChannelBaseAndMask+0x104>)
 8007558:	4293      	cmp	r3, r2
 800755a:	d00e      	beq.n	800757a <DMA_CalcDMAMUXChannelBaseAndMask+0x5e>
 800755c:	687b      	ldr	r3, [r7, #4]
 800755e:	681b      	ldr	r3, [r3, #0]
 8007560:	4a30      	ldr	r2, [pc, #192]	@ (8007624 <DMA_CalcDMAMUXChannelBaseAndMask+0x108>)
 8007562:	4293      	cmp	r3, r2
 8007564:	d009      	beq.n	800757a <DMA_CalcDMAMUXChannelBaseAndMask+0x5e>
 8007566:	687b      	ldr	r3, [r7, #4]
 8007568:	681b      	ldr	r3, [r3, #0]
 800756a:	4a2f      	ldr	r2, [pc, #188]	@ (8007628 <DMA_CalcDMAMUXChannelBaseAndMask+0x10c>)
 800756c:	4293      	cmp	r3, r2
 800756e:	d004      	beq.n	800757a <DMA_CalcDMAMUXChannelBaseAndMask+0x5e>
 8007570:	687b      	ldr	r3, [r7, #4]
 8007572:	681b      	ldr	r3, [r3, #0]
 8007574:	4a2d      	ldr	r2, [pc, #180]	@ (800762c <DMA_CalcDMAMUXChannelBaseAndMask+0x110>)
 8007576:	4293      	cmp	r3, r2
 8007578:	d101      	bne.n	800757e <DMA_CalcDMAMUXChannelBaseAndMask+0x62>
 800757a:	2301      	movs	r3, #1
 800757c:	e000      	b.n	8007580 <DMA_CalcDMAMUXChannelBaseAndMask+0x64>
 800757e:	2300      	movs	r3, #0
 8007580:	2b00      	cmp	r3, #0
 8007582:	d01a      	beq.n	80075ba <DMA_CalcDMAMUXChannelBaseAndMask+0x9e>
  {
    /* BDMA Channels are connected to DMAMUX2 channels */
    stream_number = (((uint32_t)((uint32_t*)hdma->Instance) & 0xFFU) - 8U) / 20U;
 8007584:	687b      	ldr	r3, [r7, #4]
 8007586:	681b      	ldr	r3, [r3, #0]
 8007588:	b2db      	uxtb	r3, r3
 800758a:	3b08      	subs	r3, #8
 800758c:	4a28      	ldr	r2, [pc, #160]	@ (8007630 <DMA_CalcDMAMUXChannelBaseAndMask+0x114>)
 800758e:	fba2 2303 	umull	r2, r3, r2, r3
 8007592:	091b      	lsrs	r3, r3, #4
 8007594:	60fb      	str	r3, [r7, #12]
    hdma->DMAmuxChannel = (DMAMUX_Channel_TypeDef *)((uint32_t)(((uint32_t)DMAMUX2_Channel0) + (stream_number * 4U)));
 8007596:	68fa      	ldr	r2, [r7, #12]
 8007598:	4b26      	ldr	r3, [pc, #152]	@ (8007634 <DMA_CalcDMAMUXChannelBaseAndMask+0x118>)
 800759a:	4413      	add	r3, r2
 800759c:	009b      	lsls	r3, r3, #2
 800759e:	461a      	mov	r2, r3
 80075a0:	687b      	ldr	r3, [r7, #4]
 80075a2:	661a      	str	r2, [r3, #96]	@ 0x60
    hdma->DMAmuxChannelStatus = DMAMUX2_ChannelStatus;
 80075a4:	687b      	ldr	r3, [r7, #4]
 80075a6:	4a24      	ldr	r2, [pc, #144]	@ (8007638 <DMA_CalcDMAMUXChannelBaseAndMask+0x11c>)
 80075a8:	665a      	str	r2, [r3, #100]	@ 0x64
    hdma->DMAmuxChannelStatusMask = 1UL << (stream_number & 0x1FU);
 80075aa:	68fb      	ldr	r3, [r7, #12]
 80075ac:	f003 031f 	and.w	r3, r3, #31
 80075b0:	2201      	movs	r2, #1
 80075b2:	409a      	lsls	r2, r3
 80075b4:	687b      	ldr	r3, [r7, #4]
 80075b6:	669a      	str	r2, [r3, #104]	@ 0x68
    }
    hdma->DMAmuxChannel = (DMAMUX_Channel_TypeDef *)((uint32_t)(((uint32_t)DMAMUX1_Channel0) + (stream_number * 4U)));
    hdma->DMAmuxChannelStatus = DMAMUX1_ChannelStatus;
    hdma->DMAmuxChannelStatusMask = 1UL << (stream_number & 0x1FU);
  }
}
 80075b8:	e024      	b.n	8007604 <DMA_CalcDMAMUXChannelBaseAndMask+0xe8>
    stream_number = (((uint32_t)((uint32_t*)hdma->Instance) & 0xFFU) - 16U) / 24U;
 80075ba:	687b      	ldr	r3, [r7, #4]
 80075bc:	681b      	ldr	r3, [r3, #0]
 80075be:	b2db      	uxtb	r3, r3
 80075c0:	3b10      	subs	r3, #16
 80075c2:	4a1e      	ldr	r2, [pc, #120]	@ (800763c <DMA_CalcDMAMUXChannelBaseAndMask+0x120>)
 80075c4:	fba2 2303 	umull	r2, r3, r2, r3
 80075c8:	091b      	lsrs	r3, r3, #4
 80075ca:	60fb      	str	r3, [r7, #12]
    if((stream_baseaddress <= ((uint32_t)DMA2_Stream7) ) && \
 80075cc:	68bb      	ldr	r3, [r7, #8]
 80075ce:	4a1c      	ldr	r2, [pc, #112]	@ (8007640 <DMA_CalcDMAMUXChannelBaseAndMask+0x124>)
 80075d0:	4293      	cmp	r3, r2
 80075d2:	d806      	bhi.n	80075e2 <DMA_CalcDMAMUXChannelBaseAndMask+0xc6>
 80075d4:	68bb      	ldr	r3, [r7, #8]
 80075d6:	4a1b      	ldr	r2, [pc, #108]	@ (8007644 <DMA_CalcDMAMUXChannelBaseAndMask+0x128>)
 80075d8:	4293      	cmp	r3, r2
 80075da:	d902      	bls.n	80075e2 <DMA_CalcDMAMUXChannelBaseAndMask+0xc6>
      stream_number += 8U;
 80075dc:	68fb      	ldr	r3, [r7, #12]
 80075de:	3308      	adds	r3, #8
 80075e0:	60fb      	str	r3, [r7, #12]
    hdma->DMAmuxChannel = (DMAMUX_Channel_TypeDef *)((uint32_t)(((uint32_t)DMAMUX1_Channel0) + (stream_number * 4U)));
 80075e2:	68fa      	ldr	r2, [r7, #12]
 80075e4:	4b18      	ldr	r3, [pc, #96]	@ (8007648 <DMA_CalcDMAMUXChannelBaseAndMask+0x12c>)
 80075e6:	4413      	add	r3, r2
 80075e8:	009b      	lsls	r3, r3, #2
 80075ea:	461a      	mov	r2, r3
 80075ec:	687b      	ldr	r3, [r7, #4]
 80075ee:	661a      	str	r2, [r3, #96]	@ 0x60
    hdma->DMAmuxChannelStatus = DMAMUX1_ChannelStatus;
 80075f0:	687b      	ldr	r3, [r7, #4]
 80075f2:	4a16      	ldr	r2, [pc, #88]	@ (800764c <DMA_CalcDMAMUXChannelBaseAndMask+0x130>)
 80075f4:	665a      	str	r2, [r3, #100]	@ 0x64
    hdma->DMAmuxChannelStatusMask = 1UL << (stream_number & 0x1FU);
 80075f6:	68fb      	ldr	r3, [r7, #12]
 80075f8:	f003 031f 	and.w	r3, r3, #31
 80075fc:	2201      	movs	r2, #1
 80075fe:	409a      	lsls	r2, r3
 8007600:	687b      	ldr	r3, [r7, #4]
 8007602:	669a      	str	r2, [r3, #104]	@ 0x68
}
 8007604:	bf00      	nop
 8007606:	3714      	adds	r7, #20
 8007608:	46bd      	mov	sp, r7
 800760a:	f85d 7b04 	ldr.w	r7, [sp], #4
 800760e:	4770      	bx	lr
 8007610:	58025408 	.word	0x58025408
 8007614:	5802541c 	.word	0x5802541c
 8007618:	58025430 	.word	0x58025430
 800761c:	58025444 	.word	0x58025444
 8007620:	58025458 	.word	0x58025458
 8007624:	5802546c 	.word	0x5802546c
 8007628:	58025480 	.word	0x58025480
 800762c:	58025494 	.word	0x58025494
 8007630:	cccccccd 	.word	0xcccccccd
 8007634:	16009600 	.word	0x16009600
 8007638:	58025880 	.word	0x58025880
 800763c:	aaaaaaab 	.word	0xaaaaaaab
 8007640:	400204b8 	.word	0x400204b8
 8007644:	4002040f 	.word	0x4002040f
 8007648:	10008200 	.word	0x10008200
 800764c:	40020880 	.word	0x40020880

08007650 <DMA_CalcDMAMUXRequestGenBaseAndMask>:
  * @param  hdma:       pointer to a DMA_HandleTypeDef structure that contains
  *                     the configuration information for the specified DMA Stream.
  * @retval HAL status
  */
static void DMA_CalcDMAMUXRequestGenBaseAndMask(DMA_HandleTypeDef *hdma)
{
 8007650:	b480      	push	{r7}
 8007652:	b085      	sub	sp, #20
 8007654:	af00      	add	r7, sp, #0
 8007656:	6078      	str	r0, [r7, #4]
  uint32_t request =  hdma->Init.Request & DMAMUX_CxCR_DMAREQ_ID;
 8007658:	687b      	ldr	r3, [r7, #4]
 800765a:	685b      	ldr	r3, [r3, #4]
 800765c:	b2db      	uxtb	r3, r3
 800765e:	60fb      	str	r3, [r7, #12]

  if((request >= DMA_REQUEST_GENERATOR0) && (request <= DMA_REQUEST_GENERATOR7))
 8007660:	68fb      	ldr	r3, [r7, #12]
 8007662:	2b00      	cmp	r3, #0
 8007664:	d04a      	beq.n	80076fc <DMA_CalcDMAMUXRequestGenBaseAndMask+0xac>
 8007666:	68fb      	ldr	r3, [r7, #12]
 8007668:	2b08      	cmp	r3, #8
 800766a:	d847      	bhi.n	80076fc <DMA_CalcDMAMUXRequestGenBaseAndMask+0xac>
  {
    if(IS_BDMA_CHANNEL_DMAMUX_INSTANCE(hdma->Instance) != 0U)
 800766c:	687b      	ldr	r3, [r7, #4]
 800766e:	681b      	ldr	r3, [r3, #0]
 8007670:	4a25      	ldr	r2, [pc, #148]	@ (8007708 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xb8>)
 8007672:	4293      	cmp	r3, r2
 8007674:	d022      	beq.n	80076bc <DMA_CalcDMAMUXRequestGenBaseAndMask+0x6c>
 8007676:	687b      	ldr	r3, [r7, #4]
 8007678:	681b      	ldr	r3, [r3, #0]
 800767a:	4a24      	ldr	r2, [pc, #144]	@ (800770c <DMA_CalcDMAMUXRequestGenBaseAndMask+0xbc>)
 800767c:	4293      	cmp	r3, r2
 800767e:	d01d      	beq.n	80076bc <DMA_CalcDMAMUXRequestGenBaseAndMask+0x6c>
 8007680:	687b      	ldr	r3, [r7, #4]
 8007682:	681b      	ldr	r3, [r3, #0]
 8007684:	4a22      	ldr	r2, [pc, #136]	@ (8007710 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xc0>)
 8007686:	4293      	cmp	r3, r2
 8007688:	d018      	beq.n	80076bc <DMA_CalcDMAMUXRequestGenBaseAndMask+0x6c>
 800768a:	687b      	ldr	r3, [r7, #4]
 800768c:	681b      	ldr	r3, [r3, #0]
 800768e:	4a21      	ldr	r2, [pc, #132]	@ (8007714 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xc4>)
 8007690:	4293      	cmp	r3, r2
 8007692:	d013      	beq.n	80076bc <DMA_CalcDMAMUXRequestGenBaseAndMask+0x6c>
 8007694:	687b      	ldr	r3, [r7, #4]
 8007696:	681b      	ldr	r3, [r3, #0]
 8007698:	4a1f      	ldr	r2, [pc, #124]	@ (8007718 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xc8>)
 800769a:	4293      	cmp	r3, r2
 800769c:	d00e      	beq.n	80076bc <DMA_CalcDMAMUXRequestGenBaseAndMask+0x6c>
 800769e:	687b      	ldr	r3, [r7, #4]
 80076a0:	681b      	ldr	r3, [r3, #0]
 80076a2:	4a1e      	ldr	r2, [pc, #120]	@ (800771c <DMA_CalcDMAMUXRequestGenBaseAndMask+0xcc>)
 80076a4:	4293      	cmp	r3, r2
 80076a6:	d009      	beq.n	80076bc <DMA_CalcDMAMUXRequestGenBaseAndMask+0x6c>
 80076a8:	687b      	ldr	r3, [r7, #4]
 80076aa:	681b      	ldr	r3, [r3, #0]
 80076ac:	4a1c      	ldr	r2, [pc, #112]	@ (8007720 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xd0>)
 80076ae:	4293      	cmp	r3, r2
 80076b0:	d004      	beq.n	80076bc <DMA_CalcDMAMUXRequestGenBaseAndMask+0x6c>
 80076b2:	687b      	ldr	r3, [r7, #4]
 80076b4:	681b      	ldr	r3, [r3, #0]
 80076b6:	4a1b      	ldr	r2, [pc, #108]	@ (8007724 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xd4>)
 80076b8:	4293      	cmp	r3, r2
 80076ba:	d101      	bne.n	80076c0 <DMA_CalcDMAMUXRequestGenBaseAndMask+0x70>
 80076bc:	2301      	movs	r3, #1
 80076be:	e000      	b.n	80076c2 <DMA_CalcDMAMUXRequestGenBaseAndMask+0x72>
 80076c0:	2300      	movs	r3, #0
 80076c2:	2b00      	cmp	r3, #0
 80076c4:	d00a      	beq.n	80076dc <DMA_CalcDMAMUXRequestGenBaseAndMask+0x8c>
    {
      /* BDMA Channels are connected to DMAMUX2 request generator blocks */
      hdma->DMAmuxRequestGen = (DMAMUX_RequestGen_TypeDef *)((uint32_t)(((uint32_t)DMAMUX2_RequestGenerator0) + ((request - 1U) * 4U)));
 80076c6:	68fa      	ldr	r2, [r7, #12]
 80076c8:	4b17      	ldr	r3, [pc, #92]	@ (8007728 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xd8>)
 80076ca:	4413      	add	r3, r2
 80076cc:	009b      	lsls	r3, r3, #2
 80076ce:	461a      	mov	r2, r3
 80076d0:	687b      	ldr	r3, [r7, #4]
 80076d2:	66da      	str	r2, [r3, #108]	@ 0x6c

      hdma->DMAmuxRequestGenStatus = DMAMUX2_RequestGenStatus;
 80076d4:	687b      	ldr	r3, [r7, #4]
 80076d6:	4a15      	ldr	r2, [pc, #84]	@ (800772c <DMA_CalcDMAMUXRequestGenBaseAndMask+0xdc>)
 80076d8:	671a      	str	r2, [r3, #112]	@ 0x70
 80076da:	e009      	b.n	80076f0 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xa0>
    }
    else
    {
      /* DMA1 and DMA2 Streams use DMAMUX1 request generator blocks */
      hdma->DMAmuxRequestGen = (DMAMUX_RequestGen_TypeDef *)((uint32_t)(((uint32_t)DMAMUX1_RequestGenerator0) + ((request - 1U) * 4U)));
 80076dc:	68fa      	ldr	r2, [r7, #12]
 80076de:	4b14      	ldr	r3, [pc, #80]	@ (8007730 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xe0>)
 80076e0:	4413      	add	r3, r2
 80076e2:	009b      	lsls	r3, r3, #2
 80076e4:	461a      	mov	r2, r3
 80076e6:	687b      	ldr	r3, [r7, #4]
 80076e8:	66da      	str	r2, [r3, #108]	@ 0x6c

      hdma->DMAmuxRequestGenStatus = DMAMUX1_RequestGenStatus;
 80076ea:	687b      	ldr	r3, [r7, #4]
 80076ec:	4a11      	ldr	r2, [pc, #68]	@ (8007734 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xe4>)
 80076ee:	671a      	str	r2, [r3, #112]	@ 0x70
    }

    hdma->DMAmuxRequestGenStatusMask = 1UL << (request - 1U);
 80076f0:	68fb      	ldr	r3, [r7, #12]
 80076f2:	3b01      	subs	r3, #1
 80076f4:	2201      	movs	r2, #1
 80076f6:	409a      	lsls	r2, r3
 80076f8:	687b      	ldr	r3, [r7, #4]
 80076fa:	675a      	str	r2, [r3, #116]	@ 0x74
  }
}
 80076fc:	bf00      	nop
 80076fe:	3714      	adds	r7, #20
 8007700:	46bd      	mov	sp, r7
 8007702:	f85d 7b04 	ldr.w	r7, [sp], #4
 8007706:	4770      	bx	lr
 8007708:	58025408 	.word	0x58025408
 800770c:	5802541c 	.word	0x5802541c
 8007710:	58025430 	.word	0x58025430
 8007714:	58025444 	.word	0x58025444
 8007718:	58025458 	.word	0x58025458
 800771c:	5802546c 	.word	0x5802546c
 8007720:	58025480 	.word	0x58025480
 8007724:	58025494 	.word	0x58025494
 8007728:	1600963f 	.word	0x1600963f
 800772c:	58025940 	.word	0x58025940
 8007730:	1000823f 	.word	0x1000823f
 8007734:	40020940 	.word	0x40020940

08007738 <HAL_ETH_Init>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_ETH_Init(ETH_HandleTypeDef *heth)
{
 8007738:	b580      	push	{r7, lr}
 800773a:	b084      	sub	sp, #16
 800773c:	af00      	add	r7, sp, #0
 800773e:	6078      	str	r0, [r7, #4]
  uint32_t tickstart;

  if (heth == NULL)
 8007740:	687b      	ldr	r3, [r7, #4]
 8007742:	2b00      	cmp	r3, #0
 8007744:	d101      	bne.n	800774a <HAL_ETH_Init+0x12>
  {
    return HAL_ERROR;
 8007746:	2301      	movs	r3, #1
 8007748:	e0e3      	b.n	8007912 <HAL_ETH_Init+0x1da>
  }
  if (heth->gState == HAL_ETH_STATE_RESET)
 800774a:	687b      	ldr	r3, [r7, #4]
 800774c:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 8007750:	2b00      	cmp	r3, #0
 8007752:	d106      	bne.n	8007762 <HAL_ETH_Init+0x2a>
  {
    heth->gState = HAL_ETH_STATE_BUSY;
 8007754:	687b      	ldr	r3, [r7, #4]
 8007756:	2223      	movs	r2, #35	@ 0x23
 8007758:	f8c3 2084 	str.w	r2, [r3, #132]	@ 0x84

    /* Init the low level hardware */
    heth->MspInitCallback(heth);
#else
    /* Init the low level hardware : GPIO, CLOCK, NVIC. */
    HAL_ETH_MspInit(heth);
 800775c:	6878      	ldr	r0, [r7, #4]
 800775e:	f008 fa03 	bl	800fb68 <HAL_ETH_MspInit>

#endif /* (USE_HAL_ETH_REGISTER_CALLBACKS) */
  }

  __HAL_RCC_SYSCFG_CLK_ENABLE();
 8007762:	4b6e      	ldr	r3, [pc, #440]	@ (800791c <HAL_ETH_Init+0x1e4>)
 8007764:	f8d3 30f4 	ldr.w	r3, [r3, #244]	@ 0xf4
 8007768:	4a6c      	ldr	r2, [pc, #432]	@ (800791c <HAL_ETH_Init+0x1e4>)
 800776a:	f043 0302 	orr.w	r3, r3, #2
 800776e:	f8c2 30f4 	str.w	r3, [r2, #244]	@ 0xf4
 8007772:	4b6a      	ldr	r3, [pc, #424]	@ (800791c <HAL_ETH_Init+0x1e4>)
 8007774:	f8d3 30f4 	ldr.w	r3, [r3, #244]	@ 0xf4
 8007778:	f003 0302 	and.w	r3, r3, #2
 800777c:	60bb      	str	r3, [r7, #8]
 800777e:	68bb      	ldr	r3, [r7, #8]

  if (heth->Init.MediaInterface == HAL_ETH_MII_MODE)
 8007780:	687b      	ldr	r3, [r7, #4]
 8007782:	7a1b      	ldrb	r3, [r3, #8]
 8007784:	2b00      	cmp	r3, #0
 8007786:	d103      	bne.n	8007790 <HAL_ETH_Init+0x58>
  {
    HAL_SYSCFG_ETHInterfaceSelect(SYSCFG_ETH_MII);
 8007788:	2000      	movs	r0, #0
 800778a:	f7fd fa3d 	bl	8004c08 <HAL_SYSCFG_ETHInterfaceSelect>
 800778e:	e003      	b.n	8007798 <HAL_ETH_Init+0x60>
  }
  else
  {
    HAL_SYSCFG_ETHInterfaceSelect(SYSCFG_ETH_RMII);
 8007790:	f44f 0000 	mov.w	r0, #8388608	@ 0x800000
 8007794:	f7fd fa38 	bl	8004c08 <HAL_SYSCFG_ETHInterfaceSelect>
  }

  /* Dummy read to sync with ETH */
  (void)SYSCFG->PMCR;
 8007798:	4b61      	ldr	r3, [pc, #388]	@ (8007920 <HAL_ETH_Init+0x1e8>)
 800779a:	685b      	ldr	r3, [r3, #4]

  /* Ethernet Software reset */
  /* Set the SWR bit: resets all MAC subsystem internal registers and logic */
  /* After reset all the registers holds their respective reset values */
  SET_BIT(heth->Instance->DMAMR, ETH_DMAMR_SWR);
 800779c:	687b      	ldr	r3, [r7, #4]
 800779e:	681b      	ldr	r3, [r3, #0]
 80077a0:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 80077a4:	681b      	ldr	r3, [r3, #0]
 80077a6:	687a      	ldr	r2, [r7, #4]
 80077a8:	6812      	ldr	r2, [r2, #0]
 80077aa:	f043 0301 	orr.w	r3, r3, #1
 80077ae:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 80077b2:	6013      	str	r3, [r2, #0]

  /* Get tick */
  tickstart = HAL_GetTick();
 80077b4:	f7fd f9ec 	bl	8004b90 <HAL_GetTick>
 80077b8:	60f8      	str	r0, [r7, #12]

  /* Wait for software reset */
  while (READ_BIT(heth->Instance->DMAMR, ETH_DMAMR_SWR) > 0U)
 80077ba:	e011      	b.n	80077e0 <HAL_ETH_Init+0xa8>
  {
    if (((HAL_GetTick() - tickstart) > ETH_SWRESET_TIMEOUT))
 80077bc:	f7fd f9e8 	bl	8004b90 <HAL_GetTick>
 80077c0:	4602      	mov	r2, r0
 80077c2:	68fb      	ldr	r3, [r7, #12]
 80077c4:	1ad3      	subs	r3, r2, r3
 80077c6:	f5b3 7ffa 	cmp.w	r3, #500	@ 0x1f4
 80077ca:	d909      	bls.n	80077e0 <HAL_ETH_Init+0xa8>
    {
      /* Set Error Code */
      heth->ErrorCode = HAL_ETH_ERROR_TIMEOUT;
 80077cc:	687b      	ldr	r3, [r7, #4]
 80077ce:	2204      	movs	r2, #4
 80077d0:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88
      /* Set State as Error */
      heth->gState = HAL_ETH_STATE_ERROR;
 80077d4:	687b      	ldr	r3, [r7, #4]
 80077d6:	22e0      	movs	r2, #224	@ 0xe0
 80077d8:	f8c3 2084 	str.w	r2, [r3, #132]	@ 0x84
      /* Return Error */
      return HAL_ERROR;
 80077dc:	2301      	movs	r3, #1
 80077de:	e098      	b.n	8007912 <HAL_ETH_Init+0x1da>
  while (READ_BIT(heth->Instance->DMAMR, ETH_DMAMR_SWR) > 0U)
 80077e0:	687b      	ldr	r3, [r7, #4]
 80077e2:	681b      	ldr	r3, [r3, #0]
 80077e4:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 80077e8:	681b      	ldr	r3, [r3, #0]
 80077ea:	f003 0301 	and.w	r3, r3, #1
 80077ee:	2b00      	cmp	r3, #0
 80077f0:	d1e4      	bne.n	80077bc <HAL_ETH_Init+0x84>
    }
  }

  /*------------------ MDIO CSR Clock Range Configuration --------------------*/
  HAL_ETH_SetMDIOClockRange(heth);
 80077f2:	6878      	ldr	r0, [r7, #4]
 80077f4:	f000 ff1c 	bl	8008630 <HAL_ETH_SetMDIOClockRange>

  /*------------------ MAC LPI 1US Tic Counter Configuration --------------------*/
  WRITE_REG(heth->Instance->MAC1USTCR, (((uint32_t)HAL_RCC_GetHCLKFreq() / ETH_MAC_US_TICK) - 1U));
 80077f8:	f002 fe88 	bl	800a50c <HAL_RCC_GetHCLKFreq>
 80077fc:	4603      	mov	r3, r0
 80077fe:	4a49      	ldr	r2, [pc, #292]	@ (8007924 <HAL_ETH_Init+0x1ec>)
 8007800:	fba2 2303 	umull	r2, r3, r2, r3
 8007804:	0c9a      	lsrs	r2, r3, #18
 8007806:	687b      	ldr	r3, [r7, #4]
 8007808:	681b      	ldr	r3, [r3, #0]
 800780a:	3a01      	subs	r2, #1
 800780c:	f8c3 20dc 	str.w	r2, [r3, #220]	@ 0xdc

  /*------------------ MAC, MTL and DMA default Configuration ----------------*/
  ETH_MACDMAConfig(heth);
 8007810:	6878      	ldr	r0, [r7, #4]
 8007812:	f001 f90d 	bl	8008a30 <ETH_MACDMAConfig>

  /* SET DSL to 64 bit */
  MODIFY_REG(heth->Instance->DMACCR, ETH_DMACCR_DSL, ETH_DMACCR_DSL_64BIT);
 8007816:	687b      	ldr	r3, [r7, #4]
 8007818:	681b      	ldr	r3, [r3, #0]
 800781a:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 800781e:	f8d3 3100 	ldr.w	r3, [r3, #256]	@ 0x100
 8007822:	f423 13e0 	bic.w	r3, r3, #1835008	@ 0x1c0000
 8007826:	687a      	ldr	r2, [r7, #4]
 8007828:	6812      	ldr	r2, [r2, #0]
 800782a:	f443 2300 	orr.w	r3, r3, #524288	@ 0x80000
 800782e:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 8007832:	f8c2 3100 	str.w	r3, [r2, #256]	@ 0x100

  /* Set Receive Buffers Length (must be a multiple of 4) */
  if ((heth->Init.RxBuffLen % 0x4U) != 0x0U)
 8007836:	687b      	ldr	r3, [r7, #4]
 8007838:	695b      	ldr	r3, [r3, #20]
 800783a:	f003 0303 	and.w	r3, r3, #3
 800783e:	2b00      	cmp	r3, #0
 8007840:	d009      	beq.n	8007856 <HAL_ETH_Init+0x11e>
  {
    /* Set Error Code */
    heth->ErrorCode = HAL_ETH_ERROR_PARAM;
 8007842:	687b      	ldr	r3, [r7, #4]
 8007844:	2201      	movs	r2, #1
 8007846:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88
    /* Set State as Error */
    heth->gState = HAL_ETH_STATE_ERROR;
 800784a:	687b      	ldr	r3, [r7, #4]
 800784c:	22e0      	movs	r2, #224	@ 0xe0
 800784e:	f8c3 2084 	str.w	r2, [r3, #132]	@ 0x84
    /* Return Error */
    return HAL_ERROR;
 8007852:	2301      	movs	r3, #1
 8007854:	e05d      	b.n	8007912 <HAL_ETH_Init+0x1da>
  }
  else
  {
    MODIFY_REG(heth->Instance->DMACRCR, ETH_DMACRCR_RBSZ, ((heth->Init.RxBuffLen) << 1));
 8007856:	687b      	ldr	r3, [r7, #4]
 8007858:	681b      	ldr	r3, [r3, #0]
 800785a:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 800785e:	f8d3 2108 	ldr.w	r2, [r3, #264]	@ 0x108
 8007862:	4b31      	ldr	r3, [pc, #196]	@ (8007928 <HAL_ETH_Init+0x1f0>)
 8007864:	4013      	ands	r3, r2
 8007866:	687a      	ldr	r2, [r7, #4]
 8007868:	6952      	ldr	r2, [r2, #20]
 800786a:	0051      	lsls	r1, r2, #1
 800786c:	687a      	ldr	r2, [r7, #4]
 800786e:	6812      	ldr	r2, [r2, #0]
 8007870:	430b      	orrs	r3, r1
 8007872:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 8007876:	f8c2 3108 	str.w	r3, [r2, #264]	@ 0x108
  }

  /*------------------ DMA Tx Descriptors Configuration ----------------------*/
  ETH_DMATxDescListInit(heth);
 800787a:	6878      	ldr	r0, [r7, #4]
 800787c:	f001 f975 	bl	8008b6a <ETH_DMATxDescListInit>

  /*------------------ DMA Rx Descriptors Configuration ----------------------*/
  ETH_DMARxDescListInit(heth);
 8007880:	6878      	ldr	r0, [r7, #4]
 8007882:	f001 f9bb 	bl	8008bfc <ETH_DMARxDescListInit>

  /*--------------------- ETHERNET MAC Address Configuration ------------------*/
  /* Set MAC addr bits 32 to 47 */
  heth->Instance->MACA0HR = (((uint32_t)(heth->Init.MACAddr[5]) << 8) | (uint32_t)heth->Init.MACAddr[4]);
 8007886:	687b      	ldr	r3, [r7, #4]
 8007888:	685b      	ldr	r3, [r3, #4]
 800788a:	3305      	adds	r3, #5
 800788c:	781b      	ldrb	r3, [r3, #0]
 800788e:	021a      	lsls	r2, r3, #8
 8007890:	687b      	ldr	r3, [r7, #4]
 8007892:	685b      	ldr	r3, [r3, #4]
 8007894:	3304      	adds	r3, #4
 8007896:	781b      	ldrb	r3, [r3, #0]
 8007898:	4619      	mov	r1, r3
 800789a:	687b      	ldr	r3, [r7, #4]
 800789c:	681b      	ldr	r3, [r3, #0]
 800789e:	430a      	orrs	r2, r1
 80078a0:	f8c3 2300 	str.w	r2, [r3, #768]	@ 0x300
  /* Set MAC addr bits 0 to 31 */
  heth->Instance->MACA0LR = (((uint32_t)(heth->Init.MACAddr[3]) << 24) | ((uint32_t)(heth->Init.MACAddr[2]) << 16) |
 80078a4:	687b      	ldr	r3, [r7, #4]
 80078a6:	685b      	ldr	r3, [r3, #4]
 80078a8:	3303      	adds	r3, #3
 80078aa:	781b      	ldrb	r3, [r3, #0]
 80078ac:	061a      	lsls	r2, r3, #24
 80078ae:	687b      	ldr	r3, [r7, #4]
 80078b0:	685b      	ldr	r3, [r3, #4]
 80078b2:	3302      	adds	r3, #2
 80078b4:	781b      	ldrb	r3, [r3, #0]
 80078b6:	041b      	lsls	r3, r3, #16
 80078b8:	431a      	orrs	r2, r3
                             ((uint32_t)(heth->Init.MACAddr[1]) << 8) | (uint32_t)heth->Init.MACAddr[0]);
 80078ba:	687b      	ldr	r3, [r7, #4]
 80078bc:	685b      	ldr	r3, [r3, #4]
 80078be:	3301      	adds	r3, #1
 80078c0:	781b      	ldrb	r3, [r3, #0]
 80078c2:	021b      	lsls	r3, r3, #8
  heth->Instance->MACA0LR = (((uint32_t)(heth->Init.MACAddr[3]) << 24) | ((uint32_t)(heth->Init.MACAddr[2]) << 16) |
 80078c4:	431a      	orrs	r2, r3
                             ((uint32_t)(heth->Init.MACAddr[1]) << 8) | (uint32_t)heth->Init.MACAddr[0]);
 80078c6:	687b      	ldr	r3, [r7, #4]
 80078c8:	685b      	ldr	r3, [r3, #4]
 80078ca:	781b      	ldrb	r3, [r3, #0]
 80078cc:	4619      	mov	r1, r3
  heth->Instance->MACA0LR = (((uint32_t)(heth->Init.MACAddr[3]) << 24) | ((uint32_t)(heth->Init.MACAddr[2]) << 16) |
 80078ce:	687b      	ldr	r3, [r7, #4]
 80078d0:	681b      	ldr	r3, [r3, #0]
                             ((uint32_t)(heth->Init.MACAddr[1]) << 8) | (uint32_t)heth->Init.MACAddr[0]);
 80078d2:	430a      	orrs	r2, r1
  heth->Instance->MACA0LR = (((uint32_t)(heth->Init.MACAddr[3]) << 24) | ((uint32_t)(heth->Init.MACAddr[2]) << 16) |
 80078d4:	f8c3 2304 	str.w	r2, [r3, #772]	@ 0x304

  /* Disable Rx MMC Interrupts */
  SET_BIT(heth->Instance->MMCRIMR, ETH_MMCRIMR_RXLPITRCIM | ETH_MMCRIMR_RXLPIUSCIM | \
 80078d8:	687b      	ldr	r3, [r7, #4]
 80078da:	681b      	ldr	r3, [r3, #0]
 80078dc:	f8d3 170c 	ldr.w	r1, [r3, #1804]	@ 0x70c
 80078e0:	687b      	ldr	r3, [r7, #4]
 80078e2:	681a      	ldr	r2, [r3, #0]
 80078e4:	4b11      	ldr	r3, [pc, #68]	@ (800792c <HAL_ETH_Init+0x1f4>)
 80078e6:	430b      	orrs	r3, r1
 80078e8:	f8c2 370c 	str.w	r3, [r2, #1804]	@ 0x70c
          ETH_MMCRIMR_RXUCGPIM | ETH_MMCRIMR_RXALGNERPIM | ETH_MMCRIMR_RXCRCERPIM);

  /* Disable Tx MMC Interrupts */
  SET_BIT(heth->Instance->MMCTIMR, ETH_MMCTIMR_TXLPITRCIM | ETH_MMCTIMR_TXLPIUSCIM | \
 80078ec:	687b      	ldr	r3, [r7, #4]
 80078ee:	681b      	ldr	r3, [r3, #0]
 80078f0:	f8d3 1710 	ldr.w	r1, [r3, #1808]	@ 0x710
 80078f4:	687b      	ldr	r3, [r7, #4]
 80078f6:	681a      	ldr	r2, [r3, #0]
 80078f8:	4b0d      	ldr	r3, [pc, #52]	@ (8007930 <HAL_ETH_Init+0x1f8>)
 80078fa:	430b      	orrs	r3, r1
 80078fc:	f8c2 3710 	str.w	r3, [r2, #1808]	@ 0x710
          ETH_MMCTIMR_TXGPKTIM | ETH_MMCTIMR_TXMCOLGPIM | ETH_MMCTIMR_TXSCOLGPIM);

  heth->ErrorCode = HAL_ETH_ERROR_NONE;
 8007900:	687b      	ldr	r3, [r7, #4]
 8007902:	2200      	movs	r2, #0
 8007904:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88
  heth->gState = HAL_ETH_STATE_READY;
 8007908:	687b      	ldr	r3, [r7, #4]
 800790a:	2210      	movs	r2, #16
 800790c:	f8c3 2084 	str.w	r2, [r3, #132]	@ 0x84

  return HAL_OK;
 8007910:	2300      	movs	r3, #0
}
 8007912:	4618      	mov	r0, r3
 8007914:	3710      	adds	r7, #16
 8007916:	46bd      	mov	sp, r7
 8007918:	bd80      	pop	{r7, pc}
 800791a:	bf00      	nop
 800791c:	58024400 	.word	0x58024400
 8007920:	58000400 	.word	0x58000400
 8007924:	431bde83 	.word	0x431bde83
 8007928:	ffff8001 	.word	0xffff8001
 800792c:	0c020060 	.word	0x0c020060
 8007930:	0c20c000 	.word	0x0c20c000

08007934 <HAL_ETH_Start_IT>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_ETH_Start_IT(ETH_HandleTypeDef *heth)
{
 8007934:	b580      	push	{r7, lr}
 8007936:	b082      	sub	sp, #8
 8007938:	af00      	add	r7, sp, #0
 800793a:	6078      	str	r0, [r7, #4]
  if (heth->gState == HAL_ETH_STATE_READY)
 800793c:	687b      	ldr	r3, [r7, #4]
 800793e:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 8007942:	2b10      	cmp	r3, #16
 8007944:	d165      	bne.n	8007a12 <HAL_ETH_Start_IT+0xde>
  {
    heth->gState = HAL_ETH_STATE_BUSY;
 8007946:	687b      	ldr	r3, [r7, #4]
 8007948:	2223      	movs	r2, #35	@ 0x23
 800794a:	f8c3 2084 	str.w	r2, [r3, #132]	@ 0x84

    /* save IT mode to ETH Handle */
    heth->RxDescList.ItMode = 1U;
 800794e:	687b      	ldr	r3, [r7, #4]
 8007950:	2201      	movs	r2, #1
 8007952:	659a      	str	r2, [r3, #88]	@ 0x58

    /* Set number of descriptors to build */
    heth->RxDescList.RxBuildDescCnt = ETH_RX_DESC_CNT;
 8007954:	687b      	ldr	r3, [r7, #4]
 8007956:	2204      	movs	r2, #4
 8007958:	66da      	str	r2, [r3, #108]	@ 0x6c

    /* Build all descriptors */
    ETH_UpdateDescriptor(heth);
 800795a:	6878      	ldr	r0, [r7, #4]
 800795c:	f000 f9e4 	bl	8007d28 <ETH_UpdateDescriptor>

    /* Enable the DMA transmission */
    SET_BIT(heth->Instance->DMACTCR, ETH_DMACTCR_ST);
 8007960:	687b      	ldr	r3, [r7, #4]
 8007962:	681b      	ldr	r3, [r3, #0]
 8007964:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8007968:	f8d3 3104 	ldr.w	r3, [r3, #260]	@ 0x104
 800796c:	687a      	ldr	r2, [r7, #4]
 800796e:	6812      	ldr	r2, [r2, #0]
 8007970:	f043 0301 	orr.w	r3, r3, #1
 8007974:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 8007978:	f8c2 3104 	str.w	r3, [r2, #260]	@ 0x104

    /* Enable the DMA reception */
    SET_BIT(heth->Instance->DMACRCR, ETH_DMACRCR_SR);
 800797c:	687b      	ldr	r3, [r7, #4]
 800797e:	681b      	ldr	r3, [r3, #0]
 8007980:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8007984:	f8d3 3108 	ldr.w	r3, [r3, #264]	@ 0x108
 8007988:	687a      	ldr	r2, [r7, #4]
 800798a:	6812      	ldr	r2, [r2, #0]
 800798c:	f043 0301 	orr.w	r3, r3, #1
 8007990:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 8007994:	f8c2 3108 	str.w	r3, [r2, #264]	@ 0x108

    /* Clear Tx and Rx process stopped flags */
    heth->Instance->DMACSR |= (ETH_DMACSR_TPS | ETH_DMACSR_RPS);
 8007998:	687b      	ldr	r3, [r7, #4]
 800799a:	681b      	ldr	r3, [r3, #0]
 800799c:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 80079a0:	f8d3 3160 	ldr.w	r3, [r3, #352]	@ 0x160
 80079a4:	687a      	ldr	r2, [r7, #4]
 80079a6:	6812      	ldr	r2, [r2, #0]
 80079a8:	f443 7381 	orr.w	r3, r3, #258	@ 0x102
 80079ac:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 80079b0:	f8c2 3160 	str.w	r3, [r2, #352]	@ 0x160

    /* Set the Flush Transmit FIFO bit */
    SET_BIT(heth->Instance->MTLTQOMR, ETH_MTLTQOMR_FTQ);
 80079b4:	687b      	ldr	r3, [r7, #4]
 80079b6:	681b      	ldr	r3, [r3, #0]
 80079b8:	f8d3 2d00 	ldr.w	r2, [r3, #3328]	@ 0xd00
 80079bc:	687b      	ldr	r3, [r7, #4]
 80079be:	681b      	ldr	r3, [r3, #0]
 80079c0:	f042 0201 	orr.w	r2, r2, #1
 80079c4:	f8c3 2d00 	str.w	r2, [r3, #3328]	@ 0xd00

    /* Enable the MAC transmission */
    SET_BIT(heth->Instance->MACCR, ETH_MACCR_TE);
 80079c8:	687b      	ldr	r3, [r7, #4]
 80079ca:	681b      	ldr	r3, [r3, #0]
 80079cc:	681a      	ldr	r2, [r3, #0]
 80079ce:	687b      	ldr	r3, [r7, #4]
 80079d0:	681b      	ldr	r3, [r3, #0]
 80079d2:	f042 0202 	orr.w	r2, r2, #2
 80079d6:	601a      	str	r2, [r3, #0]

    /* Enable the MAC reception */
    SET_BIT(heth->Instance->MACCR, ETH_MACCR_RE);
 80079d8:	687b      	ldr	r3, [r7, #4]
 80079da:	681b      	ldr	r3, [r3, #0]
 80079dc:	681a      	ldr	r2, [r3, #0]
 80079de:	687b      	ldr	r3, [r7, #4]
 80079e0:	681b      	ldr	r3, [r3, #0]
 80079e2:	f042 0201 	orr.w	r2, r2, #1
 80079e6:	601a      	str	r2, [r3, #0]
    /* Enable ETH DMA interrupts:
    - Tx complete interrupt
    - Rx complete interrupt
    - Fatal bus interrupt
    */
    __HAL_ETH_DMA_ENABLE_IT(heth, (ETH_DMACIER_NIE | ETH_DMACIER_RIE | ETH_DMACIER_TIE  |
 80079e8:	687b      	ldr	r3, [r7, #4]
 80079ea:	681b      	ldr	r3, [r3, #0]
 80079ec:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 80079f0:	f8d3 1134 	ldr.w	r1, [r3, #308]	@ 0x134
 80079f4:	687b      	ldr	r3, [r7, #4]
 80079f6:	681a      	ldr	r2, [r3, #0]
 80079f8:	f24d 03c1 	movw	r3, #53441	@ 0xd0c1
 80079fc:	430b      	orrs	r3, r1
 80079fe:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 8007a02:	f8c2 3134 	str.w	r3, [r2, #308]	@ 0x134
                                   ETH_DMACIER_FBEE | ETH_DMACIER_AIE | ETH_DMACIER_RBUE));

    heth->gState = HAL_ETH_STATE_STARTED;
 8007a06:	687b      	ldr	r3, [r7, #4]
 8007a08:	2223      	movs	r2, #35	@ 0x23
 8007a0a:	f8c3 2084 	str.w	r2, [r3, #132]	@ 0x84
    return HAL_OK;
 8007a0e:	2300      	movs	r3, #0
 8007a10:	e000      	b.n	8007a14 <HAL_ETH_Start_IT+0xe0>
  }
  else
  {
    return HAL_ERROR;
 8007a12:	2301      	movs	r3, #1
  }
}
 8007a14:	4618      	mov	r0, r3
 8007a16:	3708      	adds	r7, #8
 8007a18:	46bd      	mov	sp, r7
 8007a1a:	bd80      	pop	{r7, pc}

08007a1c <HAL_ETH_Stop_IT>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_ETH_Stop_IT(ETH_HandleTypeDef *heth)
{
 8007a1c:	b480      	push	{r7}
 8007a1e:	b085      	sub	sp, #20
 8007a20:	af00      	add	r7, sp, #0
 8007a22:	6078      	str	r0, [r7, #4]
  ETH_DMADescTypeDef *dmarxdesc;
  uint32_t descindex;

  if (heth->gState == HAL_ETH_STATE_STARTED)
 8007a24:	687b      	ldr	r3, [r7, #4]
 8007a26:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 8007a2a:	2b23      	cmp	r3, #35	@ 0x23
 8007a2c:	d165      	bne.n	8007afa <HAL_ETH_Stop_IT+0xde>
  {
    /* Set the ETH peripheral state to BUSY */
    heth->gState = HAL_ETH_STATE_BUSY;
 8007a2e:	687b      	ldr	r3, [r7, #4]
 8007a30:	2223      	movs	r2, #35	@ 0x23
 8007a32:	f8c3 2084 	str.w	r2, [r3, #132]	@ 0x84
    /* Disable interrupts:
    - Tx complete interrupt
    - Rx complete interrupt
    - Fatal bus interrupt
    */
    __HAL_ETH_DMA_DISABLE_IT(heth, (ETH_DMACIER_NIE | ETH_DMACIER_RIE | ETH_DMACIER_TIE  |
 8007a36:	687b      	ldr	r3, [r7, #4]
 8007a38:	681b      	ldr	r3, [r3, #0]
 8007a3a:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8007a3e:	f8d3 1134 	ldr.w	r1, [r3, #308]	@ 0x134
 8007a42:	687b      	ldr	r3, [r7, #4]
 8007a44:	681a      	ldr	r2, [r3, #0]
 8007a46:	4b30      	ldr	r3, [pc, #192]	@ (8007b08 <HAL_ETH_Stop_IT+0xec>)
 8007a48:	400b      	ands	r3, r1
 8007a4a:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 8007a4e:	f8c2 3134 	str.w	r3, [r2, #308]	@ 0x134
                                    ETH_DMACIER_FBEE | ETH_DMACIER_AIE | ETH_DMACIER_RBUE));

    /* Disable the DMA transmission */
    CLEAR_BIT(heth->Instance->DMACTCR, ETH_DMACTCR_ST);
 8007a52:	687b      	ldr	r3, [r7, #4]
 8007a54:	681b      	ldr	r3, [r3, #0]
 8007a56:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8007a5a:	f8d3 3104 	ldr.w	r3, [r3, #260]	@ 0x104
 8007a5e:	687a      	ldr	r2, [r7, #4]
 8007a60:	6812      	ldr	r2, [r2, #0]
 8007a62:	f023 0301 	bic.w	r3, r3, #1
 8007a66:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 8007a6a:	f8c2 3104 	str.w	r3, [r2, #260]	@ 0x104

    /* Disable the DMA reception */
    CLEAR_BIT(heth->Instance->DMACRCR, ETH_DMACRCR_SR);
 8007a6e:	687b      	ldr	r3, [r7, #4]
 8007a70:	681b      	ldr	r3, [r3, #0]
 8007a72:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8007a76:	f8d3 3108 	ldr.w	r3, [r3, #264]	@ 0x108
 8007a7a:	687a      	ldr	r2, [r7, #4]
 8007a7c:	6812      	ldr	r2, [r2, #0]
 8007a7e:	f023 0301 	bic.w	r3, r3, #1
 8007a82:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 8007a86:	f8c2 3108 	str.w	r3, [r2, #264]	@ 0x108

    /* Disable the MAC reception */
    CLEAR_BIT(heth->Instance->MACCR, ETH_MACCR_RE);
 8007a8a:	687b      	ldr	r3, [r7, #4]
 8007a8c:	681b      	ldr	r3, [r3, #0]
 8007a8e:	681a      	ldr	r2, [r3, #0]
 8007a90:	687b      	ldr	r3, [r7, #4]
 8007a92:	681b      	ldr	r3, [r3, #0]
 8007a94:	f022 0201 	bic.w	r2, r2, #1
 8007a98:	601a      	str	r2, [r3, #0]

    /* Set the Flush Transmit FIFO bit */
    SET_BIT(heth->Instance->MTLTQOMR, ETH_MTLTQOMR_FTQ);
 8007a9a:	687b      	ldr	r3, [r7, #4]
 8007a9c:	681b      	ldr	r3, [r3, #0]
 8007a9e:	f8d3 2d00 	ldr.w	r2, [r3, #3328]	@ 0xd00
 8007aa2:	687b      	ldr	r3, [r7, #4]
 8007aa4:	681b      	ldr	r3, [r3, #0]
 8007aa6:	f042 0201 	orr.w	r2, r2, #1
 8007aaa:	f8c3 2d00 	str.w	r2, [r3, #3328]	@ 0xd00

    /* Disable the MAC transmission */
    CLEAR_BIT(heth->Instance->MACCR, ETH_MACCR_TE);
 8007aae:	687b      	ldr	r3, [r7, #4]
 8007ab0:	681b      	ldr	r3, [r3, #0]
 8007ab2:	681a      	ldr	r2, [r3, #0]
 8007ab4:	687b      	ldr	r3, [r7, #4]
 8007ab6:	681b      	ldr	r3, [r3, #0]
 8007ab8:	f022 0202 	bic.w	r2, r2, #2
 8007abc:	601a      	str	r2, [r3, #0]

    /* Clear IOC bit to all Rx descriptors */
    for (descindex = 0; descindex < (uint32_t)ETH_RX_DESC_CNT; descindex++)
 8007abe:	2300      	movs	r3, #0
 8007ac0:	60fb      	str	r3, [r7, #12]
 8007ac2:	e00e      	b.n	8007ae2 <HAL_ETH_Stop_IT+0xc6>
    {
      dmarxdesc = (ETH_DMADescTypeDef *)heth->RxDescList.RxDesc[descindex];
 8007ac4:	687b      	ldr	r3, [r7, #4]
 8007ac6:	68fa      	ldr	r2, [r7, #12]
 8007ac8:	3212      	adds	r2, #18
 8007aca:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
 8007ace:	60bb      	str	r3, [r7, #8]
      CLEAR_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCRF_IOC);
 8007ad0:	68bb      	ldr	r3, [r7, #8]
 8007ad2:	68db      	ldr	r3, [r3, #12]
 8007ad4:	f023 4280 	bic.w	r2, r3, #1073741824	@ 0x40000000
 8007ad8:	68bb      	ldr	r3, [r7, #8]
 8007ada:	60da      	str	r2, [r3, #12]
    for (descindex = 0; descindex < (uint32_t)ETH_RX_DESC_CNT; descindex++)
 8007adc:	68fb      	ldr	r3, [r7, #12]
 8007ade:	3301      	adds	r3, #1
 8007ae0:	60fb      	str	r3, [r7, #12]
 8007ae2:	68fb      	ldr	r3, [r7, #12]
 8007ae4:	2b03      	cmp	r3, #3
 8007ae6:	d9ed      	bls.n	8007ac4 <HAL_ETH_Stop_IT+0xa8>
    }

    heth->RxDescList.ItMode = 0U;
 8007ae8:	687b      	ldr	r3, [r7, #4]
 8007aea:	2200      	movs	r2, #0
 8007aec:	659a      	str	r2, [r3, #88]	@ 0x58

    heth->gState = HAL_ETH_STATE_READY;
 8007aee:	687b      	ldr	r3, [r7, #4]
 8007af0:	2210      	movs	r2, #16
 8007af2:	f8c3 2084 	str.w	r2, [r3, #132]	@ 0x84

    /* Return function status */
    return HAL_OK;
 8007af6:	2300      	movs	r3, #0
 8007af8:	e000      	b.n	8007afc <HAL_ETH_Stop_IT+0xe0>
  }
  else
  {
    return HAL_ERROR;
 8007afa:	2301      	movs	r3, #1
  }
}
 8007afc:	4618      	mov	r0, r3
 8007afe:	3714      	adds	r7, #20
 8007b00:	46bd      	mov	sp, r7
 8007b02:	f85d 7b04 	ldr.w	r7, [sp], #4
 8007b06:	4770      	bx	lr
 8007b08:	ffff2f3e 	.word	0xffff2f3e

08007b0c <HAL_ETH_Transmit_IT>:
  *         the configuration information for ETHERNET module
  * @param  pTxConfig: Hold the configuration of packet to be transmitted
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_ETH_Transmit_IT(ETH_HandleTypeDef *heth, ETH_TxPacketConfigTypeDef *pTxConfig)
{
 8007b0c:	b580      	push	{r7, lr}
 8007b0e:	b082      	sub	sp, #8
 8007b10:	af00      	add	r7, sp, #0
 8007b12:	6078      	str	r0, [r7, #4]
 8007b14:	6039      	str	r1, [r7, #0]
  if (pTxConfig == NULL)
 8007b16:	683b      	ldr	r3, [r7, #0]
 8007b18:	2b00      	cmp	r3, #0
 8007b1a:	d109      	bne.n	8007b30 <HAL_ETH_Transmit_IT+0x24>
  {
    heth->ErrorCode |= HAL_ETH_ERROR_PARAM;
 8007b1c:	687b      	ldr	r3, [r7, #4]
 8007b1e:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 8007b22:	f043 0201 	orr.w	r2, r3, #1
 8007b26:	687b      	ldr	r3, [r7, #4]
 8007b28:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88
    return HAL_ERROR;
 8007b2c:	2301      	movs	r3, #1
 8007b2e:	e03a      	b.n	8007ba6 <HAL_ETH_Transmit_IT+0x9a>
  }

  if (heth->gState == HAL_ETH_STATE_STARTED)
 8007b30:	687b      	ldr	r3, [r7, #4]
 8007b32:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 8007b36:	2b23      	cmp	r3, #35	@ 0x23
 8007b38:	d134      	bne.n	8007ba4 <HAL_ETH_Transmit_IT+0x98>
  {
    /* Save the packet pointer to release.  */
    heth->TxDescList.CurrentPacketAddress = (uint32_t *)pTxConfig->pData;
 8007b3a:	683b      	ldr	r3, [r7, #0]
 8007b3c:	6b5a      	ldr	r2, [r3, #52]	@ 0x34
 8007b3e:	687b      	ldr	r3, [r7, #4]
 8007b40:	63da      	str	r2, [r3, #60]	@ 0x3c

    /* Config DMA Tx descriptor by Tx Packet info */
    if (ETH_Prepare_Tx_Descriptors(heth, pTxConfig, 1) != HAL_ETH_ERROR_NONE)
 8007b42:	2201      	movs	r2, #1
 8007b44:	6839      	ldr	r1, [r7, #0]
 8007b46:	6878      	ldr	r0, [r7, #4]
 8007b48:	f001 f8b6 	bl	8008cb8 <ETH_Prepare_Tx_Descriptors>
 8007b4c:	4603      	mov	r3, r0
 8007b4e:	2b00      	cmp	r3, #0
 8007b50:	d009      	beq.n	8007b66 <HAL_ETH_Transmit_IT+0x5a>
    {
      heth->ErrorCode |= HAL_ETH_ERROR_BUSY;
 8007b52:	687b      	ldr	r3, [r7, #4]
 8007b54:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 8007b58:	f043 0202 	orr.w	r2, r3, #2
 8007b5c:	687b      	ldr	r3, [r7, #4]
 8007b5e:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88
      return HAL_ERROR;
 8007b62:	2301      	movs	r3, #1
 8007b64:	e01f      	b.n	8007ba6 <HAL_ETH_Transmit_IT+0x9a>
  __ASM volatile ("dsb 0xF":::"memory");
 8007b66:	f3bf 8f4f 	dsb	sy
}
 8007b6a:	bf00      	nop

    /* Ensure completion of descriptor preparation before transmission start */
    __DSB();

    /* Incr current tx desc index */
    INCR_TX_DESC_INDEX(heth->TxDescList.CurTxDesc, 1U);
 8007b6c:	687b      	ldr	r3, [r7, #4]
 8007b6e:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 8007b70:	1c5a      	adds	r2, r3, #1
 8007b72:	687b      	ldr	r3, [r7, #4]
 8007b74:	629a      	str	r2, [r3, #40]	@ 0x28
 8007b76:	687b      	ldr	r3, [r7, #4]
 8007b78:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 8007b7a:	2b03      	cmp	r3, #3
 8007b7c:	d904      	bls.n	8007b88 <HAL_ETH_Transmit_IT+0x7c>
 8007b7e:	687b      	ldr	r3, [r7, #4]
 8007b80:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 8007b82:	1f1a      	subs	r2, r3, #4
 8007b84:	687b      	ldr	r3, [r7, #4]
 8007b86:	629a      	str	r2, [r3, #40]	@ 0x28

    /* Start transmission */
    /* issue a poll command to Tx DMA by writing address of next immediate free descriptor */
    WRITE_REG(heth->Instance->DMACTDTPR, (uint32_t)(heth->TxDescList.TxDesc[heth->TxDescList.CurTxDesc]));
 8007b88:	687b      	ldr	r3, [r7, #4]
 8007b8a:	6a99      	ldr	r1, [r3, #40]	@ 0x28
 8007b8c:	687b      	ldr	r3, [r7, #4]
 8007b8e:	681a      	ldr	r2, [r3, #0]
 8007b90:	687b      	ldr	r3, [r7, #4]
 8007b92:	3106      	adds	r1, #6
 8007b94:	f853 3021 	ldr.w	r3, [r3, r1, lsl #2]
 8007b98:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 8007b9c:	f8c2 3120 	str.w	r3, [r2, #288]	@ 0x120

    return HAL_OK;
 8007ba0:	2300      	movs	r3, #0
 8007ba2:	e000      	b.n	8007ba6 <HAL_ETH_Transmit_IT+0x9a>

  }
  else
  {
    return HAL_ERROR;
 8007ba4:	2301      	movs	r3, #1
  }
}
 8007ba6:	4618      	mov	r0, r3
 8007ba8:	3708      	adds	r7, #8
 8007baa:	46bd      	mov	sp, r7
 8007bac:	bd80      	pop	{r7, pc}

08007bae <HAL_ETH_ReadData>:
  *         the configuration information for ETHERNET module
  * @param  pAppBuff: Pointer to an application buffer to receive the packet.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_ETH_ReadData(ETH_HandleTypeDef *heth, void **pAppBuff)
{
 8007bae:	b580      	push	{r7, lr}
 8007bb0:	b088      	sub	sp, #32
 8007bb2:	af00      	add	r7, sp, #0
 8007bb4:	6078      	str	r0, [r7, #4]
 8007bb6:	6039      	str	r1, [r7, #0]
  uint32_t descidx;
  ETH_DMADescTypeDef *dmarxdesc;
  uint32_t desccnt = 0U;
 8007bb8:	2300      	movs	r3, #0
 8007bba:	617b      	str	r3, [r7, #20]
  uint32_t desccntmax;
  uint32_t bufflength;
  uint8_t rxdataready = 0U;
 8007bbc:	2300      	movs	r3, #0
 8007bbe:	74fb      	strb	r3, [r7, #19]

  if (pAppBuff == NULL)
 8007bc0:	683b      	ldr	r3, [r7, #0]
 8007bc2:	2b00      	cmp	r3, #0
 8007bc4:	d109      	bne.n	8007bda <HAL_ETH_ReadData+0x2c>
  {
    heth->ErrorCode |= HAL_ETH_ERROR_PARAM;
 8007bc6:	687b      	ldr	r3, [r7, #4]
 8007bc8:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 8007bcc:	f043 0201 	orr.w	r2, r3, #1
 8007bd0:	687b      	ldr	r3, [r7, #4]
 8007bd2:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88
    return HAL_ERROR;
 8007bd6:	2301      	movs	r3, #1
 8007bd8:	e0a2      	b.n	8007d20 <HAL_ETH_ReadData+0x172>
  }

  if (heth->gState != HAL_ETH_STATE_STARTED)
 8007bda:	687b      	ldr	r3, [r7, #4]
 8007bdc:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 8007be0:	2b23      	cmp	r3, #35	@ 0x23
 8007be2:	d001      	beq.n	8007be8 <HAL_ETH_ReadData+0x3a>
  {
    return HAL_ERROR;
 8007be4:	2301      	movs	r3, #1
 8007be6:	e09b      	b.n	8007d20 <HAL_ETH_ReadData+0x172>
  }

  descidx = heth->RxDescList.RxDescIdx;
 8007be8:	687b      	ldr	r3, [r7, #4]
 8007bea:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 8007bec:	61fb      	str	r3, [r7, #28]
  dmarxdesc = (ETH_DMADescTypeDef *)heth->RxDescList.RxDesc[descidx];
 8007bee:	687b      	ldr	r3, [r7, #4]
 8007bf0:	69fa      	ldr	r2, [r7, #28]
 8007bf2:	3212      	adds	r2, #18
 8007bf4:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
 8007bf8:	61bb      	str	r3, [r7, #24]
  desccntmax = ETH_RX_DESC_CNT - heth->RxDescList.RxBuildDescCnt;
 8007bfa:	687b      	ldr	r3, [r7, #4]
 8007bfc:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8007bfe:	f1c3 0304 	rsb	r3, r3, #4
 8007c02:	60fb      	str	r3, [r7, #12]

  /* Check if descriptor is not owned by DMA */
  while ((READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_OWN) == (uint32_t)RESET) && (desccnt < desccntmax)
 8007c04:	e064      	b.n	8007cd0 <HAL_ETH_ReadData+0x122>
         && (rxdataready == 0U))
  {
    if (READ_BIT(dmarxdesc->DESC3,  ETH_DMARXNDESCWBF_CTXT)  != (uint32_t)RESET)
 8007c06:	69bb      	ldr	r3, [r7, #24]
 8007c08:	68db      	ldr	r3, [r3, #12]
 8007c0a:	f003 4380 	and.w	r3, r3, #1073741824	@ 0x40000000
 8007c0e:	2b00      	cmp	r3, #0
 8007c10:	d007      	beq.n	8007c22 <HAL_ETH_ReadData+0x74>
    {
      /* Get timestamp high */
      heth->RxDescList.TimeStamp.TimeStampHigh = dmarxdesc->DESC1;
 8007c12:	69bb      	ldr	r3, [r7, #24]
 8007c14:	685a      	ldr	r2, [r3, #4]
 8007c16:	687b      	ldr	r3, [r7, #4]
 8007c18:	679a      	str	r2, [r3, #120]	@ 0x78
      /* Get timestamp low */
      heth->RxDescList.TimeStamp.TimeStampLow  = dmarxdesc->DESC0;
 8007c1a:	69bb      	ldr	r3, [r7, #24]
 8007c1c:	681a      	ldr	r2, [r3, #0]
 8007c1e:	687b      	ldr	r3, [r7, #4]
 8007c20:	675a      	str	r2, [r3, #116]	@ 0x74
    }
    if ((READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_FD) != (uint32_t)RESET) || (heth->RxDescList.pRxStart != NULL))
 8007c22:	69bb      	ldr	r3, [r7, #24]
 8007c24:	68db      	ldr	r3, [r3, #12]
 8007c26:	f003 5300 	and.w	r3, r3, #536870912	@ 0x20000000
 8007c2a:	2b00      	cmp	r3, #0
 8007c2c:	d103      	bne.n	8007c36 <HAL_ETH_ReadData+0x88>
 8007c2e:	687b      	ldr	r3, [r7, #4]
 8007c30:	6fdb      	ldr	r3, [r3, #124]	@ 0x7c
 8007c32:	2b00      	cmp	r3, #0
 8007c34:	d03a      	beq.n	8007cac <HAL_ETH_ReadData+0xfe>
    {
      /* Check if first descriptor */
      if (READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_FD) != (uint32_t)RESET)
 8007c36:	69bb      	ldr	r3, [r7, #24]
 8007c38:	68db      	ldr	r3, [r3, #12]
 8007c3a:	f003 5300 	and.w	r3, r3, #536870912	@ 0x20000000
 8007c3e:	2b00      	cmp	r3, #0
 8007c40:	d005      	beq.n	8007c4e <HAL_ETH_ReadData+0xa0>
      {
        heth->RxDescList.RxDescCnt = 0;
 8007c42:	687b      	ldr	r3, [r7, #4]
 8007c44:	2200      	movs	r2, #0
 8007c46:	661a      	str	r2, [r3, #96]	@ 0x60
        heth->RxDescList.RxDataLength = 0;
 8007c48:	687b      	ldr	r3, [r7, #4]
 8007c4a:	2200      	movs	r2, #0
 8007c4c:	665a      	str	r2, [r3, #100]	@ 0x64
      }

      /* Get the Frame Length of the received packet: substruct 4 bytes of the CRC */
      bufflength = READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_PL) - heth->RxDescList.RxDataLength;
 8007c4e:	69bb      	ldr	r3, [r7, #24]
 8007c50:	68db      	ldr	r3, [r3, #12]
 8007c52:	f3c3 020e 	ubfx	r2, r3, #0, #15
 8007c56:	687b      	ldr	r3, [r7, #4]
 8007c58:	6e5b      	ldr	r3, [r3, #100]	@ 0x64
 8007c5a:	1ad3      	subs	r3, r2, r3
 8007c5c:	60bb      	str	r3, [r7, #8]

      /* Check if last descriptor */
      if (READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_LD) != (uint32_t)RESET)
 8007c5e:	69bb      	ldr	r3, [r7, #24]
 8007c60:	68db      	ldr	r3, [r3, #12]
 8007c62:	f003 5380 	and.w	r3, r3, #268435456	@ 0x10000000
 8007c66:	2b00      	cmp	r3, #0
 8007c68:	d005      	beq.n	8007c76 <HAL_ETH_ReadData+0xc8>
      {
        /* Save Last descriptor index */
        heth->RxDescList.pRxLastRxDesc = dmarxdesc->DESC3;
 8007c6a:	69bb      	ldr	r3, [r7, #24]
 8007c6c:	68da      	ldr	r2, [r3, #12]
 8007c6e:	687b      	ldr	r3, [r7, #4]
 8007c70:	671a      	str	r2, [r3, #112]	@ 0x70

        /* Packet ready */
        rxdataready = 1;
 8007c72:	2301      	movs	r3, #1
 8007c74:	74fb      	strb	r3, [r7, #19]
      /*Call registered Link callback*/
      heth->rxLinkCallback(&heth->RxDescList.pRxStart, &heth->RxDescList.pRxEnd,
                           (uint8_t *)dmarxdesc->BackupAddr0, bufflength);
#else
      /* Link callback */
      HAL_ETH_RxLinkCallback(&heth->RxDescList.pRxStart, &heth->RxDescList.pRxEnd,
 8007c76:	687b      	ldr	r3, [r7, #4]
 8007c78:	f103 007c 	add.w	r0, r3, #124	@ 0x7c
 8007c7c:	687b      	ldr	r3, [r7, #4]
 8007c7e:	f103 0180 	add.w	r1, r3, #128	@ 0x80
                             (uint8_t *)dmarxdesc->BackupAddr0, (uint16_t) bufflength);
 8007c82:	69bb      	ldr	r3, [r7, #24]
 8007c84:	691b      	ldr	r3, [r3, #16]
      HAL_ETH_RxLinkCallback(&heth->RxDescList.pRxStart, &heth->RxDescList.pRxEnd,
 8007c86:	461a      	mov	r2, r3
 8007c88:	68bb      	ldr	r3, [r7, #8]
 8007c8a:	b29b      	uxth	r3, r3
 8007c8c:	f008 f95e 	bl	800ff4c <HAL_ETH_RxLinkCallback>
#endif  /* USE_HAL_ETH_REGISTER_CALLBACKS */
      heth->RxDescList.RxDescCnt++;
 8007c90:	687b      	ldr	r3, [r7, #4]
 8007c92:	6e1b      	ldr	r3, [r3, #96]	@ 0x60
 8007c94:	1c5a      	adds	r2, r3, #1
 8007c96:	687b      	ldr	r3, [r7, #4]
 8007c98:	661a      	str	r2, [r3, #96]	@ 0x60
      heth->RxDescList.RxDataLength += bufflength;
 8007c9a:	687b      	ldr	r3, [r7, #4]
 8007c9c:	6e5a      	ldr	r2, [r3, #100]	@ 0x64
 8007c9e:	68bb      	ldr	r3, [r7, #8]
 8007ca0:	441a      	add	r2, r3
 8007ca2:	687b      	ldr	r3, [r7, #4]
 8007ca4:	665a      	str	r2, [r3, #100]	@ 0x64

      /* Clear buffer pointer */
      dmarxdesc->BackupAddr0 = 0;
 8007ca6:	69bb      	ldr	r3, [r7, #24]
 8007ca8:	2200      	movs	r2, #0
 8007caa:	611a      	str	r2, [r3, #16]
    }

    /* Increment current rx descriptor index */
    INCR_RX_DESC_INDEX(descidx, 1U);
 8007cac:	69fb      	ldr	r3, [r7, #28]
 8007cae:	3301      	adds	r3, #1
 8007cb0:	61fb      	str	r3, [r7, #28]
 8007cb2:	69fb      	ldr	r3, [r7, #28]
 8007cb4:	2b03      	cmp	r3, #3
 8007cb6:	d902      	bls.n	8007cbe <HAL_ETH_ReadData+0x110>
 8007cb8:	69fb      	ldr	r3, [r7, #28]
 8007cba:	3b04      	subs	r3, #4
 8007cbc:	61fb      	str	r3, [r7, #28]
    /* Get current descriptor address */
    dmarxdesc = (ETH_DMADescTypeDef *)heth->RxDescList.RxDesc[descidx];
 8007cbe:	687b      	ldr	r3, [r7, #4]
 8007cc0:	69fa      	ldr	r2, [r7, #28]
 8007cc2:	3212      	adds	r2, #18
 8007cc4:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
 8007cc8:	61bb      	str	r3, [r7, #24]
    desccnt++;
 8007cca:	697b      	ldr	r3, [r7, #20]
 8007ccc:	3301      	adds	r3, #1
 8007cce:	617b      	str	r3, [r7, #20]
  while ((READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_OWN) == (uint32_t)RESET) && (desccnt < desccntmax)
 8007cd0:	69bb      	ldr	r3, [r7, #24]
 8007cd2:	68db      	ldr	r3, [r3, #12]
         && (rxdataready == 0U))
 8007cd4:	2b00      	cmp	r3, #0
 8007cd6:	db06      	blt.n	8007ce6 <HAL_ETH_ReadData+0x138>
  while ((READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_OWN) == (uint32_t)RESET) && (desccnt < desccntmax)
 8007cd8:	697a      	ldr	r2, [r7, #20]
 8007cda:	68fb      	ldr	r3, [r7, #12]
 8007cdc:	429a      	cmp	r2, r3
 8007cde:	d202      	bcs.n	8007ce6 <HAL_ETH_ReadData+0x138>
         && (rxdataready == 0U))
 8007ce0:	7cfb      	ldrb	r3, [r7, #19]
 8007ce2:	2b00      	cmp	r3, #0
 8007ce4:	d08f      	beq.n	8007c06 <HAL_ETH_ReadData+0x58>
  }

  heth->RxDescList.RxBuildDescCnt += desccnt;
 8007ce6:	687b      	ldr	r3, [r7, #4]
 8007ce8:	6eda      	ldr	r2, [r3, #108]	@ 0x6c
 8007cea:	697b      	ldr	r3, [r7, #20]
 8007cec:	441a      	add	r2, r3
 8007cee:	687b      	ldr	r3, [r7, #4]
 8007cf0:	66da      	str	r2, [r3, #108]	@ 0x6c
  if ((heth->RxDescList.RxBuildDescCnt) != 0U)
 8007cf2:	687b      	ldr	r3, [r7, #4]
 8007cf4:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8007cf6:	2b00      	cmp	r3, #0
 8007cf8:	d002      	beq.n	8007d00 <HAL_ETH_ReadData+0x152>
  {
    /* Update Descriptors */
    ETH_UpdateDescriptor(heth);
 8007cfa:	6878      	ldr	r0, [r7, #4]
 8007cfc:	f000 f814 	bl	8007d28 <ETH_UpdateDescriptor>
  }

  heth->RxDescList.RxDescIdx = descidx;
 8007d00:	687b      	ldr	r3, [r7, #4]
 8007d02:	69fa      	ldr	r2, [r7, #28]
 8007d04:	65da      	str	r2, [r3, #92]	@ 0x5c

  if (rxdataready == 1U)
 8007d06:	7cfb      	ldrb	r3, [r7, #19]
 8007d08:	2b01      	cmp	r3, #1
 8007d0a:	d108      	bne.n	8007d1e <HAL_ETH_ReadData+0x170>
  {
    /* Return received packet */
    *pAppBuff = heth->RxDescList.pRxStart;
 8007d0c:	687b      	ldr	r3, [r7, #4]
 8007d0e:	6fda      	ldr	r2, [r3, #124]	@ 0x7c
 8007d10:	683b      	ldr	r3, [r7, #0]
 8007d12:	601a      	str	r2, [r3, #0]
    /* Reset first element */
    heth->RxDescList.pRxStart = NULL;
 8007d14:	687b      	ldr	r3, [r7, #4]
 8007d16:	2200      	movs	r2, #0
 8007d18:	67da      	str	r2, [r3, #124]	@ 0x7c

    return HAL_OK;
 8007d1a:	2300      	movs	r3, #0
 8007d1c:	e000      	b.n	8007d20 <HAL_ETH_ReadData+0x172>
  }

  /* Packet not ready */
  return HAL_ERROR;
 8007d1e:	2301      	movs	r3, #1
}
 8007d20:	4618      	mov	r0, r3
 8007d22:	3720      	adds	r7, #32
 8007d24:	46bd      	mov	sp, r7
 8007d26:	bd80      	pop	{r7, pc}

08007d28 <ETH_UpdateDescriptor>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval HAL status
  */
static void ETH_UpdateDescriptor(ETH_HandleTypeDef *heth)
{
 8007d28:	b580      	push	{r7, lr}
 8007d2a:	b088      	sub	sp, #32
 8007d2c:	af00      	add	r7, sp, #0
 8007d2e:	6078      	str	r0, [r7, #4]
  uint32_t descidx;
  uint32_t tailidx;
  uint32_t desccount;
  ETH_DMADescTypeDef *dmarxdesc;
  uint8_t *buff = NULL;
 8007d30:	2300      	movs	r3, #0
 8007d32:	60bb      	str	r3, [r7, #8]
  uint8_t allocStatus = 1U;
 8007d34:	2301      	movs	r3, #1
 8007d36:	74fb      	strb	r3, [r7, #19]

  descidx = heth->RxDescList.RxBuildDescIdx;
 8007d38:	687b      	ldr	r3, [r7, #4]
 8007d3a:	6e9b      	ldr	r3, [r3, #104]	@ 0x68
 8007d3c:	61fb      	str	r3, [r7, #28]
  dmarxdesc = (ETH_DMADescTypeDef *)heth->RxDescList.RxDesc[descidx];
 8007d3e:	687b      	ldr	r3, [r7, #4]
 8007d40:	69fa      	ldr	r2, [r7, #28]
 8007d42:	3212      	adds	r2, #18
 8007d44:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
 8007d48:	617b      	str	r3, [r7, #20]
  desccount = heth->RxDescList.RxBuildDescCnt;
 8007d4a:	687b      	ldr	r3, [r7, #4]
 8007d4c:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8007d4e:	61bb      	str	r3, [r7, #24]

  while ((desccount > 0U) && (allocStatus != 0U))
 8007d50:	e038      	b.n	8007dc4 <ETH_UpdateDescriptor+0x9c>
  {
    /* Check if a buffer's attached the descriptor */
    if (READ_REG(dmarxdesc->BackupAddr0) == 0U)
 8007d52:	697b      	ldr	r3, [r7, #20]
 8007d54:	691b      	ldr	r3, [r3, #16]
 8007d56:	2b00      	cmp	r3, #0
 8007d58:	d112      	bne.n	8007d80 <ETH_UpdateDescriptor+0x58>
#if (USE_HAL_ETH_REGISTER_CALLBACKS == 1)
      /*Call registered Allocate callback*/
      heth->rxAllocateCallback(&buff);
#else
      /* Allocate callback */
      HAL_ETH_RxAllocateCallback(&buff);
 8007d5a:	f107 0308 	add.w	r3, r7, #8
 8007d5e:	4618      	mov	r0, r3
 8007d60:	f008 f8c4 	bl	800feec <HAL_ETH_RxAllocateCallback>
#endif  /* USE_HAL_ETH_REGISTER_CALLBACKS */
      if (buff == NULL)
 8007d64:	68bb      	ldr	r3, [r7, #8]
 8007d66:	2b00      	cmp	r3, #0
 8007d68:	d102      	bne.n	8007d70 <ETH_UpdateDescriptor+0x48>
      {
        allocStatus = 0U;
 8007d6a:	2300      	movs	r3, #0
 8007d6c:	74fb      	strb	r3, [r7, #19]
 8007d6e:	e007      	b.n	8007d80 <ETH_UpdateDescriptor+0x58>
      }
      else
      {
        WRITE_REG(dmarxdesc->BackupAddr0, (uint32_t)buff);
 8007d70:	68bb      	ldr	r3, [r7, #8]
 8007d72:	461a      	mov	r2, r3
 8007d74:	697b      	ldr	r3, [r7, #20]
 8007d76:	611a      	str	r2, [r3, #16]
        WRITE_REG(dmarxdesc->DESC0, (uint32_t)buff);
 8007d78:	68bb      	ldr	r3, [r7, #8]
 8007d7a:	461a      	mov	r2, r3
 8007d7c:	697b      	ldr	r3, [r7, #20]
 8007d7e:	601a      	str	r2, [r3, #0]
      }
    }

    if (allocStatus != 0U)
 8007d80:	7cfb      	ldrb	r3, [r7, #19]
 8007d82:	2b00      	cmp	r3, #0
 8007d84:	d01e      	beq.n	8007dc4 <ETH_UpdateDescriptor+0x9c>
    {

      if (heth->RxDescList.ItMode != 0U)
 8007d86:	687b      	ldr	r3, [r7, #4]
 8007d88:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 8007d8a:	2b00      	cmp	r3, #0
 8007d8c:	d004      	beq.n	8007d98 <ETH_UpdateDescriptor+0x70>
      {
        WRITE_REG(dmarxdesc->DESC3, ETH_DMARXNDESCRF_OWN | ETH_DMARXNDESCRF_BUF1V | ETH_DMARXNDESCRF_IOC);
 8007d8e:	697b      	ldr	r3, [r7, #20]
 8007d90:	f04f 4241 	mov.w	r2, #3238002688	@ 0xc1000000
 8007d94:	60da      	str	r2, [r3, #12]
 8007d96:	e003      	b.n	8007da0 <ETH_UpdateDescriptor+0x78>
      }
      else
      {
        WRITE_REG(dmarxdesc->DESC3, ETH_DMARXNDESCRF_OWN | ETH_DMARXNDESCRF_BUF1V);
 8007d98:	697b      	ldr	r3, [r7, #20]
 8007d9a:	f04f 4201 	mov.w	r2, #2164260864	@ 0x81000000
 8007d9e:	60da      	str	r2, [r3, #12]
      }

      /* Increment current rx descriptor index */
      INCR_RX_DESC_INDEX(descidx, 1U);
 8007da0:	69fb      	ldr	r3, [r7, #28]
 8007da2:	3301      	adds	r3, #1
 8007da4:	61fb      	str	r3, [r7, #28]
 8007da6:	69fb      	ldr	r3, [r7, #28]
 8007da8:	2b03      	cmp	r3, #3
 8007daa:	d902      	bls.n	8007db2 <ETH_UpdateDescriptor+0x8a>
 8007dac:	69fb      	ldr	r3, [r7, #28]
 8007dae:	3b04      	subs	r3, #4
 8007db0:	61fb      	str	r3, [r7, #28]
      /* Get current descriptor address */
      dmarxdesc = (ETH_DMADescTypeDef *)heth->RxDescList.RxDesc[descidx];
 8007db2:	687b      	ldr	r3, [r7, #4]
 8007db4:	69fa      	ldr	r2, [r7, #28]
 8007db6:	3212      	adds	r2, #18
 8007db8:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
 8007dbc:	617b      	str	r3, [r7, #20]
      desccount--;
 8007dbe:	69bb      	ldr	r3, [r7, #24]
 8007dc0:	3b01      	subs	r3, #1
 8007dc2:	61bb      	str	r3, [r7, #24]
  while ((desccount > 0U) && (allocStatus != 0U))
 8007dc4:	69bb      	ldr	r3, [r7, #24]
 8007dc6:	2b00      	cmp	r3, #0
 8007dc8:	d002      	beq.n	8007dd0 <ETH_UpdateDescriptor+0xa8>
 8007dca:	7cfb      	ldrb	r3, [r7, #19]
 8007dcc:	2b00      	cmp	r3, #0
 8007dce:	d1c0      	bne.n	8007d52 <ETH_UpdateDescriptor+0x2a>
    }
  }

  if (heth->RxDescList.RxBuildDescCnt != desccount)
 8007dd0:	687b      	ldr	r3, [r7, #4]
 8007dd2:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8007dd4:	69ba      	ldr	r2, [r7, #24]
 8007dd6:	429a      	cmp	r2, r3
 8007dd8:	d01b      	beq.n	8007e12 <ETH_UpdateDescriptor+0xea>
  {
    /* Set the tail pointer index */
    tailidx = (descidx + 1U) % ETH_RX_DESC_CNT;
 8007dda:	69fb      	ldr	r3, [r7, #28]
 8007ddc:	3301      	adds	r3, #1
 8007dde:	f003 0303 	and.w	r3, r3, #3
 8007de2:	60fb      	str	r3, [r7, #12]
  __ASM volatile ("dmb 0xF":::"memory");
 8007de4:	f3bf 8f5f 	dmb	sy
}
 8007de8:	bf00      	nop

    /* DMB instruction to avoid race condition */
    __DMB();

    /* Set the Tail pointer address */
    WRITE_REG(heth->Instance->DMACRDTPR, ((uint32_t)(heth->Init.RxDesc + (tailidx))));
 8007dea:	687b      	ldr	r3, [r7, #4]
 8007dec:	6919      	ldr	r1, [r3, #16]
 8007dee:	68fa      	ldr	r2, [r7, #12]
 8007df0:	4613      	mov	r3, r2
 8007df2:	005b      	lsls	r3, r3, #1
 8007df4:	4413      	add	r3, r2
 8007df6:	00db      	lsls	r3, r3, #3
 8007df8:	18ca      	adds	r2, r1, r3
 8007dfa:	687b      	ldr	r3, [r7, #4]
 8007dfc:	681b      	ldr	r3, [r3, #0]
 8007dfe:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8007e02:	f8c3 2128 	str.w	r2, [r3, #296]	@ 0x128

    heth->RxDescList.RxBuildDescIdx = descidx;
 8007e06:	687b      	ldr	r3, [r7, #4]
 8007e08:	69fa      	ldr	r2, [r7, #28]
 8007e0a:	669a      	str	r2, [r3, #104]	@ 0x68
    heth->RxDescList.RxBuildDescCnt = desccount;
 8007e0c:	687b      	ldr	r3, [r7, #4]
 8007e0e:	69ba      	ldr	r2, [r7, #24]
 8007e10:	66da      	str	r2, [r3, #108]	@ 0x6c
  }
}
 8007e12:	bf00      	nop
 8007e14:	3720      	adds	r7, #32
 8007e16:	46bd      	mov	sp, r7
 8007e18:	bd80      	pop	{r7, pc}

08007e1a <HAL_ETH_ReleaseTxPacket>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_ETH_ReleaseTxPacket(ETH_HandleTypeDef *heth)
{
 8007e1a:	b580      	push	{r7, lr}
 8007e1c:	b086      	sub	sp, #24
 8007e1e:	af00      	add	r7, sp, #0
 8007e20:	6078      	str	r0, [r7, #4]
  ETH_TxDescListTypeDef *dmatxdesclist = &heth->TxDescList;
 8007e22:	687b      	ldr	r3, [r7, #4]
 8007e24:	3318      	adds	r3, #24
 8007e26:	60bb      	str	r3, [r7, #8]
  uint32_t numOfBuf =  dmatxdesclist->BuffersInUse;
 8007e28:	68bb      	ldr	r3, [r7, #8]
 8007e2a:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 8007e2c:	617b      	str	r3, [r7, #20]
  uint32_t idx =       dmatxdesclist->releaseIndex;
 8007e2e:	68bb      	ldr	r3, [r7, #8]
 8007e30:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8007e32:	613b      	str	r3, [r7, #16]
  uint8_t pktTxStatus = 1U;
 8007e34:	2301      	movs	r3, #1
 8007e36:	73fb      	strb	r3, [r7, #15]
#ifdef HAL_ETH_USE_PTP
  ETH_TimeStampTypeDef *timestamp = &heth->TxTimestamp;
#endif /* HAL_ETH_USE_PTP */

  /* Loop through buffers in use.  */
  while ((numOfBuf != 0U) && (pktTxStatus != 0U))
 8007e38:	e047      	b.n	8007eca <HAL_ETH_ReleaseTxPacket+0xb0>
  {
    pktInUse = 1U;
 8007e3a:	2301      	movs	r3, #1
 8007e3c:	73bb      	strb	r3, [r7, #14]
    numOfBuf--;
 8007e3e:	697b      	ldr	r3, [r7, #20]
 8007e40:	3b01      	subs	r3, #1
 8007e42:	617b      	str	r3, [r7, #20]
    /* If no packet, just examine the next packet.  */
    if (dmatxdesclist->PacketAddress[idx] == NULL)
 8007e44:	68ba      	ldr	r2, [r7, #8]
 8007e46:	693b      	ldr	r3, [r7, #16]
 8007e48:	3304      	adds	r3, #4
 8007e4a:	009b      	lsls	r3, r3, #2
 8007e4c:	4413      	add	r3, r2
 8007e4e:	685b      	ldr	r3, [r3, #4]
 8007e50:	2b00      	cmp	r3, #0
 8007e52:	d10a      	bne.n	8007e6a <HAL_ETH_ReleaseTxPacket+0x50>
    {
      /* No packet in use, skip to next.  */
      INCR_TX_DESC_INDEX(idx, 1U);
 8007e54:	693b      	ldr	r3, [r7, #16]
 8007e56:	3301      	adds	r3, #1
 8007e58:	613b      	str	r3, [r7, #16]
 8007e5a:	693b      	ldr	r3, [r7, #16]
 8007e5c:	2b03      	cmp	r3, #3
 8007e5e:	d902      	bls.n	8007e66 <HAL_ETH_ReleaseTxPacket+0x4c>
 8007e60:	693b      	ldr	r3, [r7, #16]
 8007e62:	3b04      	subs	r3, #4
 8007e64:	613b      	str	r3, [r7, #16]
      pktInUse = 0U;
 8007e66:	2300      	movs	r3, #0
 8007e68:	73bb      	strb	r3, [r7, #14]
    }

    if (pktInUse != 0U)
 8007e6a:	7bbb      	ldrb	r3, [r7, #14]
 8007e6c:	2b00      	cmp	r3, #0
 8007e6e:	d02c      	beq.n	8007eca <HAL_ETH_ReleaseTxPacket+0xb0>
    {
      /* Determine if the packet has been transmitted.  */
      if ((heth->Init.TxDesc[idx].DESC3 & ETH_DMATXNDESCRF_OWN) == 0U)
 8007e70:	687b      	ldr	r3, [r7, #4]
 8007e72:	68d9      	ldr	r1, [r3, #12]
 8007e74:	693a      	ldr	r2, [r7, #16]
 8007e76:	4613      	mov	r3, r2
 8007e78:	005b      	lsls	r3, r3, #1
 8007e7a:	4413      	add	r3, r2
 8007e7c:	00db      	lsls	r3, r3, #3
 8007e7e:	440b      	add	r3, r1
 8007e80:	68db      	ldr	r3, [r3, #12]
 8007e82:	2b00      	cmp	r3, #0
 8007e84:	db1f      	blt.n	8007ec6 <HAL_ETH_ReleaseTxPacket+0xac>
        {
          HAL_ETH_TxPtpCallback(dmatxdesclist->PacketAddress[idx], timestamp);
        }
#endif  /* HAL_ETH_USE_PTP */
        /* Release the packet.  */
        HAL_ETH_TxFreeCallback(dmatxdesclist->PacketAddress[idx]);
 8007e86:	68ba      	ldr	r2, [r7, #8]
 8007e88:	693b      	ldr	r3, [r7, #16]
 8007e8a:	3304      	adds	r3, #4
 8007e8c:	009b      	lsls	r3, r3, #2
 8007e8e:	4413      	add	r3, r2
 8007e90:	685b      	ldr	r3, [r3, #4]
 8007e92:	4618      	mov	r0, r3
 8007e94:	f008 f8c2 	bl	801001c <HAL_ETH_TxFreeCallback>
#endif  /* USE_HAL_ETH_REGISTER_CALLBACKS */

        /* Clear the entry in the in-use array.  */
        dmatxdesclist->PacketAddress[idx] = NULL;
 8007e98:	68ba      	ldr	r2, [r7, #8]
 8007e9a:	693b      	ldr	r3, [r7, #16]
 8007e9c:	3304      	adds	r3, #4
 8007e9e:	009b      	lsls	r3, r3, #2
 8007ea0:	4413      	add	r3, r2
 8007ea2:	2200      	movs	r2, #0
 8007ea4:	605a      	str	r2, [r3, #4]

        /* Update the transmit relesae index and number of buffers in use.  */
        INCR_TX_DESC_INDEX(idx, 1U);
 8007ea6:	693b      	ldr	r3, [r7, #16]
 8007ea8:	3301      	adds	r3, #1
 8007eaa:	613b      	str	r3, [r7, #16]
 8007eac:	693b      	ldr	r3, [r7, #16]
 8007eae:	2b03      	cmp	r3, #3
 8007eb0:	d902      	bls.n	8007eb8 <HAL_ETH_ReleaseTxPacket+0x9e>
 8007eb2:	693b      	ldr	r3, [r7, #16]
 8007eb4:	3b04      	subs	r3, #4
 8007eb6:	613b      	str	r3, [r7, #16]
        dmatxdesclist->BuffersInUse = numOfBuf;
 8007eb8:	68bb      	ldr	r3, [r7, #8]
 8007eba:	697a      	ldr	r2, [r7, #20]
 8007ebc:	629a      	str	r2, [r3, #40]	@ 0x28
        dmatxdesclist->releaseIndex = idx;
 8007ebe:	68bb      	ldr	r3, [r7, #8]
 8007ec0:	693a      	ldr	r2, [r7, #16]
 8007ec2:	62da      	str	r2, [r3, #44]	@ 0x2c
 8007ec4:	e001      	b.n	8007eca <HAL_ETH_ReleaseTxPacket+0xb0>
      }
      else
      {
        /* Get out of the loop!  */
        pktTxStatus = 0U;
 8007ec6:	2300      	movs	r3, #0
 8007ec8:	73fb      	strb	r3, [r7, #15]
  while ((numOfBuf != 0U) && (pktTxStatus != 0U))
 8007eca:	697b      	ldr	r3, [r7, #20]
 8007ecc:	2b00      	cmp	r3, #0
 8007ece:	d002      	beq.n	8007ed6 <HAL_ETH_ReleaseTxPacket+0xbc>
 8007ed0:	7bfb      	ldrb	r3, [r7, #15]
 8007ed2:	2b00      	cmp	r3, #0
 8007ed4:	d1b1      	bne.n	8007e3a <HAL_ETH_ReleaseTxPacket+0x20>
      }
    }
  }
  return HAL_OK;
 8007ed6:	2300      	movs	r3, #0
}
 8007ed8:	4618      	mov	r0, r3
 8007eda:	3718      	adds	r7, #24
 8007edc:	46bd      	mov	sp, r7
 8007ede:	bd80      	pop	{r7, pc}

08007ee0 <HAL_ETH_IRQHandler>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval HAL status
  */
void HAL_ETH_IRQHandler(ETH_HandleTypeDef *heth)
{
 8007ee0:	b580      	push	{r7, lr}
 8007ee2:	b086      	sub	sp, #24
 8007ee4:	af00      	add	r7, sp, #0
 8007ee6:	6078      	str	r0, [r7, #4]
  uint32_t mac_flag = READ_REG(heth->Instance->MACISR);
 8007ee8:	687b      	ldr	r3, [r7, #4]
 8007eea:	681b      	ldr	r3, [r3, #0]
 8007eec:	f8d3 30b0 	ldr.w	r3, [r3, #176]	@ 0xb0
 8007ef0:	617b      	str	r3, [r7, #20]
  uint32_t dma_flag = READ_REG(heth->Instance->DMACSR);
 8007ef2:	687b      	ldr	r3, [r7, #4]
 8007ef4:	681b      	ldr	r3, [r3, #0]
 8007ef6:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8007efa:	f8d3 3160 	ldr.w	r3, [r3, #352]	@ 0x160
 8007efe:	613b      	str	r3, [r7, #16]
  uint32_t dma_itsource = READ_REG(heth->Instance->DMACIER);
 8007f00:	687b      	ldr	r3, [r7, #4]
 8007f02:	681b      	ldr	r3, [r3, #0]
 8007f04:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8007f08:	f8d3 3134 	ldr.w	r3, [r3, #308]	@ 0x134
 8007f0c:	60fb      	str	r3, [r7, #12]
  uint32_t exti_d1_flag = READ_REG(EXTI_D1->PR3);
 8007f0e:	4b6d      	ldr	r3, [pc, #436]	@ (80080c4 <HAL_ETH_IRQHandler+0x1e4>)
 8007f10:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 8007f12:	60bb      	str	r3, [r7, #8]
#if defined(DUAL_CORE)
  uint32_t exti_d2_flag = READ_REG(EXTI_D2->PR3);
#endif /* DUAL_CORE */

  /* Packet received */
  if (((dma_flag & ETH_DMACSR_RI) != 0U) && ((dma_itsource & ETH_DMACIER_RIE) != 0U))
 8007f14:	693b      	ldr	r3, [r7, #16]
 8007f16:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 8007f1a:	2b00      	cmp	r3, #0
 8007f1c:	d010      	beq.n	8007f40 <HAL_ETH_IRQHandler+0x60>
 8007f1e:	68fb      	ldr	r3, [r7, #12]
 8007f20:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 8007f24:	2b00      	cmp	r3, #0
 8007f26:	d00b      	beq.n	8007f40 <HAL_ETH_IRQHandler+0x60>
  {
    /* Clear the Eth DMA Rx IT pending bits */
    __HAL_ETH_DMA_CLEAR_IT(heth, ETH_DMACSR_RI | ETH_DMACSR_NIS);
 8007f28:	687b      	ldr	r3, [r7, #4]
 8007f2a:	681b      	ldr	r3, [r3, #0]
 8007f2c:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8007f30:	461a      	mov	r2, r3
 8007f32:	f248 0340 	movw	r3, #32832	@ 0x8040
 8007f36:	f8c2 3160 	str.w	r3, [r2, #352]	@ 0x160
#if (USE_HAL_ETH_REGISTER_CALLBACKS == 1)
    /*Call registered Receive complete callback*/
    heth->RxCpltCallback(heth);
#else
    /* Receive complete callback */
    HAL_ETH_RxCpltCallback(heth);
 8007f3a:	6878      	ldr	r0, [r7, #4]
 8007f3c:	f007 fb6e 	bl	800f61c <HAL_ETH_RxCpltCallback>
#endif  /* USE_HAL_ETH_REGISTER_CALLBACKS */
  }

  /* Packet transmitted */
  if (((dma_flag & ETH_DMACSR_TI) != 0U) && ((dma_itsource & ETH_DMACIER_TIE) != 0U))
 8007f40:	693b      	ldr	r3, [r7, #16]
 8007f42:	f003 0301 	and.w	r3, r3, #1
 8007f46:	2b00      	cmp	r3, #0
 8007f48:	d010      	beq.n	8007f6c <HAL_ETH_IRQHandler+0x8c>
 8007f4a:	68fb      	ldr	r3, [r7, #12]
 8007f4c:	f003 0301 	and.w	r3, r3, #1
 8007f50:	2b00      	cmp	r3, #0
 8007f52:	d00b      	beq.n	8007f6c <HAL_ETH_IRQHandler+0x8c>
  {
    /* Clear the Eth DMA Tx IT pending bits */
    __HAL_ETH_DMA_CLEAR_IT(heth, ETH_DMACSR_TI | ETH_DMACSR_NIS);
 8007f54:	687b      	ldr	r3, [r7, #4]
 8007f56:	681b      	ldr	r3, [r3, #0]
 8007f58:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8007f5c:	461a      	mov	r2, r3
 8007f5e:	f248 0301 	movw	r3, #32769	@ 0x8001
 8007f62:	f8c2 3160 	str.w	r3, [r2, #352]	@ 0x160
#if (USE_HAL_ETH_REGISTER_CALLBACKS == 1)
    /*Call registered Transmit complete callback*/
    heth->TxCpltCallback(heth);
#else
    /* Transfer complete callback */
    HAL_ETH_TxCpltCallback(heth);
 8007f66:	6878      	ldr	r0, [r7, #4]
 8007f68:	f007 fb68 	bl	800f63c <HAL_ETH_TxCpltCallback>
#endif  /* USE_HAL_ETH_REGISTER_CALLBACKS */
  }

  /* ETH DMA Error */
  if (((dma_flag & ETH_DMACSR_AIS) != 0U) && ((dma_itsource & ETH_DMACIER_AIE) != 0U))
 8007f6c:	693b      	ldr	r3, [r7, #16]
 8007f6e:	f403 4380 	and.w	r3, r3, #16384	@ 0x4000
 8007f72:	2b00      	cmp	r3, #0
 8007f74:	d047      	beq.n	8008006 <HAL_ETH_IRQHandler+0x126>
 8007f76:	68fb      	ldr	r3, [r7, #12]
 8007f78:	f403 4380 	and.w	r3, r3, #16384	@ 0x4000
 8007f7c:	2b00      	cmp	r3, #0
 8007f7e:	d042      	beq.n	8008006 <HAL_ETH_IRQHandler+0x126>
  {
    heth->ErrorCode |= HAL_ETH_ERROR_DMA;
 8007f80:	687b      	ldr	r3, [r7, #4]
 8007f82:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 8007f86:	f043 0208 	orr.w	r2, r3, #8
 8007f8a:	687b      	ldr	r3, [r7, #4]
 8007f8c:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88
    /* if fatal bus error occurred */
    if ((dma_flag & ETH_DMACSR_FBE) != 0U)
 8007f90:	693b      	ldr	r3, [r7, #16]
 8007f92:	f403 5380 	and.w	r3, r3, #4096	@ 0x1000
 8007f96:	2b00      	cmp	r3, #0
 8007f98:	d01e      	beq.n	8007fd8 <HAL_ETH_IRQHandler+0xf8>
    {
      /* Get DMA error code  */
      heth->DMAErrorCode = READ_BIT(heth->Instance->DMACSR, (ETH_DMACSR_FBE | ETH_DMACSR_TPS | ETH_DMACSR_RPS));
 8007f9a:	687b      	ldr	r3, [r7, #4]
 8007f9c:	681b      	ldr	r3, [r3, #0]
 8007f9e:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8007fa2:	f8d3 2160 	ldr.w	r2, [r3, #352]	@ 0x160
 8007fa6:	f241 1302 	movw	r3, #4354	@ 0x1102
 8007faa:	4013      	ands	r3, r2
 8007fac:	687a      	ldr	r2, [r7, #4]
 8007fae:	f8c2 308c 	str.w	r3, [r2, #140]	@ 0x8c

      /* Disable all interrupts */
      __HAL_ETH_DMA_DISABLE_IT(heth, ETH_DMACIER_NIE | ETH_DMACIER_AIE);
 8007fb2:	687b      	ldr	r3, [r7, #4]
 8007fb4:	681b      	ldr	r3, [r3, #0]
 8007fb6:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8007fba:	f8d3 3134 	ldr.w	r3, [r3, #308]	@ 0x134
 8007fbe:	687a      	ldr	r2, [r7, #4]
 8007fc0:	6812      	ldr	r2, [r2, #0]
 8007fc2:	f423 4340 	bic.w	r3, r3, #49152	@ 0xc000
 8007fc6:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 8007fca:	f8c2 3134 	str.w	r3, [r2, #308]	@ 0x134

      /* Set HAL state to ERROR */
      heth->gState = HAL_ETH_STATE_ERROR;
 8007fce:	687b      	ldr	r3, [r7, #4]
 8007fd0:	22e0      	movs	r2, #224	@ 0xe0
 8007fd2:	f8c3 2084 	str.w	r2, [r3, #132]	@ 0x84
 8007fd6:	e013      	b.n	8008000 <HAL_ETH_IRQHandler+0x120>
    }
    else
    {
      /* Get DMA error status  */
      heth->DMAErrorCode = READ_BIT(heth->Instance->DMACSR, (ETH_DMACSR_CDE | ETH_DMACSR_ETI | ETH_DMACSR_RWT |
 8007fd8:	687b      	ldr	r3, [r7, #4]
 8007fda:	681b      	ldr	r3, [r3, #0]
 8007fdc:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8007fe0:	f8d3 3160 	ldr.w	r3, [r3, #352]	@ 0x160
 8007fe4:	f403 42cd 	and.w	r2, r3, #26240	@ 0x6680
 8007fe8:	687b      	ldr	r3, [r7, #4]
 8007fea:	f8c3 208c 	str.w	r2, [r3, #140]	@ 0x8c
                                                             ETH_DMACSR_RBU | ETH_DMACSR_AIS));

      /* Clear the interrupt summary flag */
      __HAL_ETH_DMA_CLEAR_IT(heth, (ETH_DMACSR_CDE | ETH_DMACSR_ETI | ETH_DMACSR_RWT |
 8007fee:	687b      	ldr	r3, [r7, #4]
 8007ff0:	681b      	ldr	r3, [r3, #0]
 8007ff2:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8007ff6:	461a      	mov	r2, r3
 8007ff8:	f44f 43cd 	mov.w	r3, #26240	@ 0x6680
 8007ffc:	f8c2 3160 	str.w	r3, [r2, #352]	@ 0x160
#if (USE_HAL_ETH_REGISTER_CALLBACKS == 1)
    /* Call registered Error callback*/
    heth->ErrorCallback(heth);
#else
    /* Ethernet DMA Error callback */
    HAL_ETH_ErrorCallback(heth);
 8008000:	6878      	ldr	r0, [r7, #4]
 8008002:	f007 fb2b 	bl	800f65c <HAL_ETH_ErrorCallback>
#endif  /* USE_HAL_ETH_REGISTER_CALLBACKS */
  }

  /* ETH MAC Error IT */
  if (((mac_flag & ETH_MACIER_RXSTSIE) == ETH_MACIER_RXSTSIE) || \
 8008006:	697b      	ldr	r3, [r7, #20]
 8008008:	f403 4380 	and.w	r3, r3, #16384	@ 0x4000
 800800c:	2b00      	cmp	r3, #0
 800800e:	d104      	bne.n	800801a <HAL_ETH_IRQHandler+0x13a>
      ((mac_flag & ETH_MACIER_TXSTSIE) == ETH_MACIER_TXSTSIE))
 8008010:	697b      	ldr	r3, [r7, #20]
 8008012:	f403 5300 	and.w	r3, r3, #8192	@ 0x2000
  if (((mac_flag & ETH_MACIER_RXSTSIE) == ETH_MACIER_RXSTSIE) || \
 8008016:	2b00      	cmp	r3, #0
 8008018:	d019      	beq.n	800804e <HAL_ETH_IRQHandler+0x16e>
  {
    heth->ErrorCode |= HAL_ETH_ERROR_MAC;
 800801a:	687b      	ldr	r3, [r7, #4]
 800801c:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 8008020:	f043 0210 	orr.w	r2, r3, #16
 8008024:	687b      	ldr	r3, [r7, #4]
 8008026:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88

    /* Get MAC Rx Tx status and clear Status register pending bit */
    heth->MACErrorCode = READ_REG(heth->Instance->MACRXTXSR);
 800802a:	687b      	ldr	r3, [r7, #4]
 800802c:	681b      	ldr	r3, [r3, #0]
 800802e:	f8d3 20b8 	ldr.w	r2, [r3, #184]	@ 0xb8
 8008032:	687b      	ldr	r3, [r7, #4]
 8008034:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90

    heth->gState = HAL_ETH_STATE_ERROR;
 8008038:	687b      	ldr	r3, [r7, #4]
 800803a:	22e0      	movs	r2, #224	@ 0xe0
 800803c:	f8c3 2084 	str.w	r2, [r3, #132]	@ 0x84
#if (USE_HAL_ETH_REGISTER_CALLBACKS == 1)
    /* Call registered Error callback*/
    heth->ErrorCallback(heth);
#else
    /* Ethernet Error callback */
    HAL_ETH_ErrorCallback(heth);
 8008040:	6878      	ldr	r0, [r7, #4]
 8008042:	f007 fb0b 	bl	800f65c <HAL_ETH_ErrorCallback>
#endif  /* USE_HAL_ETH_REGISTER_CALLBACKS */
    heth->MACErrorCode = (uint32_t)(0x0U);
 8008046:	687b      	ldr	r3, [r7, #4]
 8008048:	2200      	movs	r2, #0
 800804a:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
  }

  /* ETH PMT IT */
  if ((mac_flag & ETH_MAC_PMT_IT) != 0U)
 800804e:	697b      	ldr	r3, [r7, #20]
 8008050:	f003 0310 	and.w	r3, r3, #16
 8008054:	2b00      	cmp	r3, #0
 8008056:	d00f      	beq.n	8008078 <HAL_ETH_IRQHandler+0x198>
  {
    /* Get MAC Wake-up source and clear the status register pending bit */
    heth->MACWakeUpEvent = READ_BIT(heth->Instance->MACPCSR, (ETH_MACPCSR_RWKPRCVD | ETH_MACPCSR_MGKPRCVD));
 8008058:	687b      	ldr	r3, [r7, #4]
 800805a:	681b      	ldr	r3, [r3, #0]
 800805c:	f8d3 30c0 	ldr.w	r3, [r3, #192]	@ 0xc0
 8008060:	f003 0260 	and.w	r2, r3, #96	@ 0x60
 8008064:	687b      	ldr	r3, [r7, #4]
 8008066:	f8c3 2094 	str.w	r2, [r3, #148]	@ 0x94
#if (USE_HAL_ETH_REGISTER_CALLBACKS == 1)
    /* Call registered PMT callback*/
    heth->PMTCallback(heth);
#else
    /* Ethernet PMT callback */
    HAL_ETH_PMTCallback(heth);
 800806a:	6878      	ldr	r0, [r7, #4]
 800806c:	f000 f82c 	bl	80080c8 <HAL_ETH_PMTCallback>
#endif  /* USE_HAL_ETH_REGISTER_CALLBACKS */

    heth->MACWakeUpEvent = (uint32_t)(0x0U);
 8008070:	687b      	ldr	r3, [r7, #4]
 8008072:	2200      	movs	r2, #0
 8008074:	f8c3 2094 	str.w	r2, [r3, #148]	@ 0x94
  }

  /* ETH EEE IT */
  if ((mac_flag & ETH_MAC_LPI_IT) != 0U)
 8008078:	697b      	ldr	r3, [r7, #20]
 800807a:	f003 0320 	and.w	r3, r3, #32
 800807e:	2b00      	cmp	r3, #0
 8008080:	d00f      	beq.n	80080a2 <HAL_ETH_IRQHandler+0x1c2>
  {
    /* Get MAC LPI interrupt source and clear the status register pending bit */
    heth->MACLPIEvent = READ_BIT(heth->Instance->MACLCSR, 0x0000000FU);
 8008082:	687b      	ldr	r3, [r7, #4]
 8008084:	681b      	ldr	r3, [r3, #0]
 8008086:	f8d3 30d0 	ldr.w	r3, [r3, #208]	@ 0xd0
 800808a:	f003 020f 	and.w	r2, r3, #15
 800808e:	687b      	ldr	r3, [r7, #4]
 8008090:	f8c3 2098 	str.w	r2, [r3, #152]	@ 0x98
#if (USE_HAL_ETH_REGISTER_CALLBACKS == 1)
    /* Call registered EEE callback*/
    heth->EEECallback(heth);
#else
    /* Ethernet EEE callback */
    HAL_ETH_EEECallback(heth);
 8008094:	6878      	ldr	r0, [r7, #4]
 8008096:	f000 f821 	bl	80080dc <HAL_ETH_EEECallback>
#endif  /* USE_HAL_ETH_REGISTER_CALLBACKS */

    heth->MACLPIEvent = (uint32_t)(0x0U);
 800809a:	687b      	ldr	r3, [r7, #4]
 800809c:	2200      	movs	r2, #0
 800809e:	f8c3 2098 	str.w	r2, [r3, #152]	@ 0x98
#endif /* USE_HAL_ETH_REGISTER_CALLBACKS */
    }
  }
#else /* DUAL_CORE not defined */
  /* check ETH WAKEUP exti flag */
  if ((exti_d1_flag & ETH_WAKEUP_EXTI_LINE) != 0U)
 80080a2:	68bb      	ldr	r3, [r7, #8]
 80080a4:	f403 0380 	and.w	r3, r3, #4194304	@ 0x400000
 80080a8:	2b00      	cmp	r3, #0
 80080aa:	d006      	beq.n	80080ba <HAL_ETH_IRQHandler+0x1da>
  {
    /* Clear ETH WAKEUP Exti pending bit */
    __HAL_ETH_WAKEUP_EXTI_CLEAR_FLAG(ETH_WAKEUP_EXTI_LINE);
 80080ac:	4b05      	ldr	r3, [pc, #20]	@ (80080c4 <HAL_ETH_IRQHandler+0x1e4>)
 80080ae:	f44f 0280 	mov.w	r2, #4194304	@ 0x400000
 80080b2:	629a      	str	r2, [r3, #40]	@ 0x28
#if (USE_HAL_ETH_REGISTER_CALLBACKS == 1)
    /* Call registered WakeUp callback*/
    heth->WakeUpCallback(heth);
#else
    /* ETH WAKEUP callback */
    HAL_ETH_WakeUpCallback(heth);
 80080b4:	6878      	ldr	r0, [r7, #4]
 80080b6:	f000 f81b 	bl	80080f0 <HAL_ETH_WakeUpCallback>
#endif /* USE_HAL_ETH_REGISTER_CALLBACKS */
  }
#endif /* DUAL_CORE */
}
 80080ba:	bf00      	nop
 80080bc:	3718      	adds	r7, #24
 80080be:	46bd      	mov	sp, r7
 80080c0:	bd80      	pop	{r7, pc}
 80080c2:	bf00      	nop
 80080c4:	58000080 	.word	0x58000080

080080c8 <HAL_ETH_PMTCallback>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval None
  */
__weak void HAL_ETH_PMTCallback(ETH_HandleTypeDef *heth)
{
 80080c8:	b480      	push	{r7}
 80080ca:	b083      	sub	sp, #12
 80080cc:	af00      	add	r7, sp, #0
 80080ce:	6078      	str	r0, [r7, #4]
  /* Prevent unused argument(s) compilation warning */
  UNUSED(heth);
  /* NOTE : This function Should not be modified, when the callback is needed,
  the HAL_ETH_PMTCallback could be implemented in the user file
  */
}
 80080d0:	bf00      	nop
 80080d2:	370c      	adds	r7, #12
 80080d4:	46bd      	mov	sp, r7
 80080d6:	f85d 7b04 	ldr.w	r7, [sp], #4
 80080da:	4770      	bx	lr

080080dc <HAL_ETH_EEECallback>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval None
  */
__weak void HAL_ETH_EEECallback(ETH_HandleTypeDef *heth)
{
 80080dc:	b480      	push	{r7}
 80080de:	b083      	sub	sp, #12
 80080e0:	af00      	add	r7, sp, #0
 80080e2:	6078      	str	r0, [r7, #4]
  /* Prevent unused argument(s) compilation warning */
  UNUSED(heth);
  /* NOTE : This function Should not be modified, when the callback is needed,
  the HAL_ETH_EEECallback could be implemented in the user file
  */
}
 80080e4:	bf00      	nop
 80080e6:	370c      	adds	r7, #12
 80080e8:	46bd      	mov	sp, r7
 80080ea:	f85d 7b04 	ldr.w	r7, [sp], #4
 80080ee:	4770      	bx	lr

080080f0 <HAL_ETH_WakeUpCallback>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval None
  */
__weak void HAL_ETH_WakeUpCallback(ETH_HandleTypeDef *heth)
{
 80080f0:	b480      	push	{r7}
 80080f2:	b083      	sub	sp, #12
 80080f4:	af00      	add	r7, sp, #0
 80080f6:	6078      	str	r0, [r7, #4]
  /* Prevent unused argument(s) compilation warning */
  UNUSED(heth);
  /* NOTE : This function Should not be modified, when the callback is needed,
            the HAL_ETH_WakeUpCallback could be implemented in the user file
   */
}
 80080f8:	bf00      	nop
 80080fa:	370c      	adds	r7, #12
 80080fc:	46bd      	mov	sp, r7
 80080fe:	f85d 7b04 	ldr.w	r7, [sp], #4
 8008102:	4770      	bx	lr

08008104 <HAL_ETH_ReadPHYRegister>:
  * @param pRegValue: parameter to hold read value
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_ETH_ReadPHYRegister(ETH_HandleTypeDef *heth, uint32_t PHYAddr, uint32_t PHYReg,
                                          uint32_t *pRegValue)
{
 8008104:	b580      	push	{r7, lr}
 8008106:	b086      	sub	sp, #24
 8008108:	af00      	add	r7, sp, #0
 800810a:	60f8      	str	r0, [r7, #12]
 800810c:	60b9      	str	r1, [r7, #8]
 800810e:	607a      	str	r2, [r7, #4]
 8008110:	603b      	str	r3, [r7, #0]
  uint32_t tickstart;
  uint32_t tmpreg;

  /* Check for the Busy flag */
  if (READ_BIT(heth->Instance->MACMDIOAR, ETH_MACMDIOAR_MB) != (uint32_t)RESET)
 8008112:	68fb      	ldr	r3, [r7, #12]
 8008114:	681b      	ldr	r3, [r3, #0]
 8008116:	f8d3 3200 	ldr.w	r3, [r3, #512]	@ 0x200
 800811a:	f003 0301 	and.w	r3, r3, #1
 800811e:	2b00      	cmp	r3, #0
 8008120:	d001      	beq.n	8008126 <HAL_ETH_ReadPHYRegister+0x22>
  {
    return HAL_ERROR;
 8008122:	2301      	movs	r3, #1
 8008124:	e03e      	b.n	80081a4 <HAL_ETH_ReadPHYRegister+0xa0>
  }

  /* Get the  MACMDIOAR value */
  WRITE_REG(tmpreg, heth->Instance->MACMDIOAR);
 8008126:	68fb      	ldr	r3, [r7, #12]
 8008128:	681b      	ldr	r3, [r3, #0]
 800812a:	f8d3 3200 	ldr.w	r3, [r3, #512]	@ 0x200
 800812e:	617b      	str	r3, [r7, #20]
     - Set the PHY device address
     - Set the PHY register address
     - Set the read mode
     - Set the MII Busy bit */

  MODIFY_REG(tmpreg, ETH_MACMDIOAR_PA, (PHYAddr << 21));
 8008130:	697b      	ldr	r3, [r7, #20]
 8008132:	f023 7278 	bic.w	r2, r3, #65011712	@ 0x3e00000
 8008136:	68bb      	ldr	r3, [r7, #8]
 8008138:	055b      	lsls	r3, r3, #21
 800813a:	4313      	orrs	r3, r2
 800813c:	617b      	str	r3, [r7, #20]
  MODIFY_REG(tmpreg, ETH_MACMDIOAR_RDA, (PHYReg << 16));
 800813e:	697b      	ldr	r3, [r7, #20]
 8008140:	f423 12f8 	bic.w	r2, r3, #2031616	@ 0x1f0000
 8008144:	687b      	ldr	r3, [r7, #4]
 8008146:	041b      	lsls	r3, r3, #16
 8008148:	4313      	orrs	r3, r2
 800814a:	617b      	str	r3, [r7, #20]
  MODIFY_REG(tmpreg, ETH_MACMDIOAR_MOC, ETH_MACMDIOAR_MOC_RD);
 800814c:	697b      	ldr	r3, [r7, #20]
 800814e:	f043 030c 	orr.w	r3, r3, #12
 8008152:	617b      	str	r3, [r7, #20]
  SET_BIT(tmpreg, ETH_MACMDIOAR_MB);
 8008154:	697b      	ldr	r3, [r7, #20]
 8008156:	f043 0301 	orr.w	r3, r3, #1
 800815a:	617b      	str	r3, [r7, #20]

  /* Write the result value into the MDII Address register */
  WRITE_REG(heth->Instance->MACMDIOAR, tmpreg);
 800815c:	68fb      	ldr	r3, [r7, #12]
 800815e:	681b      	ldr	r3, [r3, #0]
 8008160:	697a      	ldr	r2, [r7, #20]
 8008162:	f8c3 2200 	str.w	r2, [r3, #512]	@ 0x200

  tickstart = HAL_GetTick();
 8008166:	f7fc fd13 	bl	8004b90 <HAL_GetTick>
 800816a:	6138      	str	r0, [r7, #16]

  /* Wait for the Busy flag */
  while (READ_BIT(heth->Instance->MACMDIOAR, ETH_MACMDIOAR_MB) > 0U)
 800816c:	e009      	b.n	8008182 <HAL_ETH_ReadPHYRegister+0x7e>
  {
    if (((HAL_GetTick() - tickstart) > ETH_MDIO_BUS_TIMEOUT))
 800816e:	f7fc fd0f 	bl	8004b90 <HAL_GetTick>
 8008172:	4602      	mov	r2, r0
 8008174:	693b      	ldr	r3, [r7, #16]
 8008176:	1ad3      	subs	r3, r2, r3
 8008178:	f5b3 7f7a 	cmp.w	r3, #1000	@ 0x3e8
 800817c:	d901      	bls.n	8008182 <HAL_ETH_ReadPHYRegister+0x7e>
    {
      return HAL_ERROR;
 800817e:	2301      	movs	r3, #1
 8008180:	e010      	b.n	80081a4 <HAL_ETH_ReadPHYRegister+0xa0>
  while (READ_BIT(heth->Instance->MACMDIOAR, ETH_MACMDIOAR_MB) > 0U)
 8008182:	68fb      	ldr	r3, [r7, #12]
 8008184:	681b      	ldr	r3, [r3, #0]
 8008186:	f8d3 3200 	ldr.w	r3, [r3, #512]	@ 0x200
 800818a:	f003 0301 	and.w	r3, r3, #1
 800818e:	2b00      	cmp	r3, #0
 8008190:	d1ed      	bne.n	800816e <HAL_ETH_ReadPHYRegister+0x6a>
    }
  }

  /* Get MACMIIDR value */
  WRITE_REG(*pRegValue, (uint16_t)heth->Instance->MACMDIODR);
 8008192:	68fb      	ldr	r3, [r7, #12]
 8008194:	681b      	ldr	r3, [r3, #0]
 8008196:	f8d3 3204 	ldr.w	r3, [r3, #516]	@ 0x204
 800819a:	b29b      	uxth	r3, r3
 800819c:	461a      	mov	r2, r3
 800819e:	683b      	ldr	r3, [r7, #0]
 80081a0:	601a      	str	r2, [r3, #0]

  return HAL_OK;
 80081a2:	2300      	movs	r3, #0
}
 80081a4:	4618      	mov	r0, r3
 80081a6:	3718      	adds	r7, #24
 80081a8:	46bd      	mov	sp, r7
 80081aa:	bd80      	pop	{r7, pc}

080081ac <HAL_ETH_WritePHYRegister>:
  * @param  RegValue: the value to write
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_ETH_WritePHYRegister(const ETH_HandleTypeDef *heth, uint32_t PHYAddr, uint32_t PHYReg,
                                           uint32_t RegValue)
{
 80081ac:	b580      	push	{r7, lr}
 80081ae:	b086      	sub	sp, #24
 80081b0:	af00      	add	r7, sp, #0
 80081b2:	60f8      	str	r0, [r7, #12]
 80081b4:	60b9      	str	r1, [r7, #8]
 80081b6:	607a      	str	r2, [r7, #4]
 80081b8:	603b      	str	r3, [r7, #0]
  uint32_t tickstart;
  uint32_t tmpreg;

  /* Check for the Busy flag */
  if (READ_BIT(heth->Instance->MACMDIOAR, ETH_MACMDIOAR_MB) != (uint32_t)RESET)
 80081ba:	68fb      	ldr	r3, [r7, #12]
 80081bc:	681b      	ldr	r3, [r3, #0]
 80081be:	f8d3 3200 	ldr.w	r3, [r3, #512]	@ 0x200
 80081c2:	f003 0301 	and.w	r3, r3, #1
 80081c6:	2b00      	cmp	r3, #0
 80081c8:	d001      	beq.n	80081ce <HAL_ETH_WritePHYRegister+0x22>
  {
    return HAL_ERROR;
 80081ca:	2301      	movs	r3, #1
 80081cc:	e03c      	b.n	8008248 <HAL_ETH_WritePHYRegister+0x9c>
  }

  /* Get the  MACMDIOAR value */
  WRITE_REG(tmpreg, heth->Instance->MACMDIOAR);
 80081ce:	68fb      	ldr	r3, [r7, #12]
 80081d0:	681b      	ldr	r3, [r3, #0]
 80081d2:	f8d3 3200 	ldr.w	r3, [r3, #512]	@ 0x200
 80081d6:	617b      	str	r3, [r7, #20]
     - Set the PHY device address
     - Set the PHY register address
     - Set the write mode
     - Set the MII Busy bit */

  MODIFY_REG(tmpreg, ETH_MACMDIOAR_PA, (PHYAddr << 21));
 80081d8:	697b      	ldr	r3, [r7, #20]
 80081da:	f023 7278 	bic.w	r2, r3, #65011712	@ 0x3e00000
 80081de:	68bb      	ldr	r3, [r7, #8]
 80081e0:	055b      	lsls	r3, r3, #21
 80081e2:	4313      	orrs	r3, r2
 80081e4:	617b      	str	r3, [r7, #20]
  MODIFY_REG(tmpreg, ETH_MACMDIOAR_RDA, (PHYReg << 16));
 80081e6:	697b      	ldr	r3, [r7, #20]
 80081e8:	f423 12f8 	bic.w	r2, r3, #2031616	@ 0x1f0000
 80081ec:	687b      	ldr	r3, [r7, #4]
 80081ee:	041b      	lsls	r3, r3, #16
 80081f0:	4313      	orrs	r3, r2
 80081f2:	617b      	str	r3, [r7, #20]
  MODIFY_REG(tmpreg, ETH_MACMDIOAR_MOC, ETH_MACMDIOAR_MOC_WR);
 80081f4:	697b      	ldr	r3, [r7, #20]
 80081f6:	f023 030c 	bic.w	r3, r3, #12
 80081fa:	f043 0304 	orr.w	r3, r3, #4
 80081fe:	617b      	str	r3, [r7, #20]
  SET_BIT(tmpreg, ETH_MACMDIOAR_MB);
 8008200:	697b      	ldr	r3, [r7, #20]
 8008202:	f043 0301 	orr.w	r3, r3, #1
 8008206:	617b      	str	r3, [r7, #20]

  /* Give the value to the MII data register */
  WRITE_REG(ETH->MACMDIODR, (uint16_t)RegValue);
 8008208:	683b      	ldr	r3, [r7, #0]
 800820a:	b29a      	uxth	r2, r3
 800820c:	4b10      	ldr	r3, [pc, #64]	@ (8008250 <HAL_ETH_WritePHYRegister+0xa4>)
 800820e:	f8c3 2204 	str.w	r2, [r3, #516]	@ 0x204

  /* Write the result value into the MII Address register */
  WRITE_REG(ETH->MACMDIOAR, tmpreg);
 8008212:	4a0f      	ldr	r2, [pc, #60]	@ (8008250 <HAL_ETH_WritePHYRegister+0xa4>)
 8008214:	697b      	ldr	r3, [r7, #20]
 8008216:	f8c2 3200 	str.w	r3, [r2, #512]	@ 0x200

  tickstart = HAL_GetTick();
 800821a:	f7fc fcb9 	bl	8004b90 <HAL_GetTick>
 800821e:	6138      	str	r0, [r7, #16]

  /* Wait for the Busy flag */
  while (READ_BIT(heth->Instance->MACMDIOAR, ETH_MACMDIOAR_MB) > 0U)
 8008220:	e009      	b.n	8008236 <HAL_ETH_WritePHYRegister+0x8a>
  {
    if (((HAL_GetTick() - tickstart) > ETH_MDIO_BUS_TIMEOUT))
 8008222:	f7fc fcb5 	bl	8004b90 <HAL_GetTick>
 8008226:	4602      	mov	r2, r0
 8008228:	693b      	ldr	r3, [r7, #16]
 800822a:	1ad3      	subs	r3, r2, r3
 800822c:	f5b3 7f7a 	cmp.w	r3, #1000	@ 0x3e8
 8008230:	d901      	bls.n	8008236 <HAL_ETH_WritePHYRegister+0x8a>
    {
      return HAL_ERROR;
 8008232:	2301      	movs	r3, #1
 8008234:	e008      	b.n	8008248 <HAL_ETH_WritePHYRegister+0x9c>
  while (READ_BIT(heth->Instance->MACMDIOAR, ETH_MACMDIOAR_MB) > 0U)
 8008236:	68fb      	ldr	r3, [r7, #12]
 8008238:	681b      	ldr	r3, [r3, #0]
 800823a:	f8d3 3200 	ldr.w	r3, [r3, #512]	@ 0x200
 800823e:	f003 0301 	and.w	r3, r3, #1
 8008242:	2b00      	cmp	r3, #0
 8008244:	d1ed      	bne.n	8008222 <HAL_ETH_WritePHYRegister+0x76>
    }
  }

  return HAL_OK;
 8008246:	2300      	movs	r3, #0
}
 8008248:	4618      	mov	r0, r3
 800824a:	3718      	adds	r7, #24
 800824c:	46bd      	mov	sp, r7
 800824e:	bd80      	pop	{r7, pc}
 8008250:	40028000 	.word	0x40028000

08008254 <HAL_ETH_GetMACConfig>:
  * @param  macconf: pointer to a ETH_MACConfigTypeDef structure that will hold
  *         the configuration of the MAC.
  * @retval HAL Status
  */
HAL_StatusTypeDef HAL_ETH_GetMACConfig(const ETH_HandleTypeDef *heth, ETH_MACConfigTypeDef *macconf)
{
 8008254:	b480      	push	{r7}
 8008256:	b083      	sub	sp, #12
 8008258:	af00      	add	r7, sp, #0
 800825a:	6078      	str	r0, [r7, #4]
 800825c:	6039      	str	r1, [r7, #0]
  if (macconf == NULL)
 800825e:	683b      	ldr	r3, [r7, #0]
 8008260:	2b00      	cmp	r3, #0
 8008262:	d101      	bne.n	8008268 <HAL_ETH_GetMACConfig+0x14>
  {
    return HAL_ERROR;
 8008264:	2301      	movs	r3, #1
 8008266:	e1c3      	b.n	80085f0 <HAL_ETH_GetMACConfig+0x39c>
  }

  /* Get MAC parameters */
  macconf->PreambleLength = READ_BIT(heth->Instance->MACCR, ETH_MACCR_PRELEN);
 8008268:	687b      	ldr	r3, [r7, #4]
 800826a:	681b      	ldr	r3, [r3, #0]
 800826c:	681b      	ldr	r3, [r3, #0]
 800826e:	f003 020c 	and.w	r2, r3, #12
 8008272:	683b      	ldr	r3, [r7, #0]
 8008274:	62da      	str	r2, [r3, #44]	@ 0x2c
  macconf->DeferralCheck = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_DC) >> 4) > 0U) ? ENABLE : DISABLE;
 8008276:	687b      	ldr	r3, [r7, #4]
 8008278:	681b      	ldr	r3, [r3, #0]
 800827a:	681b      	ldr	r3, [r3, #0]
 800827c:	f003 0310 	and.w	r3, r3, #16
 8008280:	2b00      	cmp	r3, #0
 8008282:	bf14      	ite	ne
 8008284:	2301      	movne	r3, #1
 8008286:	2300      	moveq	r3, #0
 8008288:	b2db      	uxtb	r3, r3
 800828a:	461a      	mov	r2, r3
 800828c:	683b      	ldr	r3, [r7, #0]
 800828e:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
  macconf->BackOffLimit = READ_BIT(heth->Instance->MACCR, ETH_MACCR_BL);
 8008292:	687b      	ldr	r3, [r7, #4]
 8008294:	681b      	ldr	r3, [r3, #0]
 8008296:	681b      	ldr	r3, [r3, #0]
 8008298:	f003 0260 	and.w	r2, r3, #96	@ 0x60
 800829c:	683b      	ldr	r3, [r7, #0]
 800829e:	625a      	str	r2, [r3, #36]	@ 0x24
  macconf->RetryTransmission = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_DR) >> 8) == 0U) ? ENABLE : DISABLE;
 80082a0:	687b      	ldr	r3, [r7, #4]
 80082a2:	681b      	ldr	r3, [r3, #0]
 80082a4:	681b      	ldr	r3, [r3, #0]
 80082a6:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 80082aa:	2b00      	cmp	r3, #0
 80082ac:	bf0c      	ite	eq
 80082ae:	2301      	moveq	r3, #1
 80082b0:	2300      	movne	r3, #0
 80082b2:	b2db      	uxtb	r3, r3
 80082b4:	461a      	mov	r2, r3
 80082b6:	683b      	ldr	r3, [r7, #0]
 80082b8:	f883 2020 	strb.w	r2, [r3, #32]
  macconf->CarrierSenseDuringTransmit = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_DCRS) >> 9) > 0U)
 80082bc:	687b      	ldr	r3, [r7, #4]
 80082be:	681b      	ldr	r3, [r3, #0]
 80082c0:	681b      	ldr	r3, [r3, #0]
 80082c2:	f403 7300 	and.w	r3, r3, #512	@ 0x200
                                        ? ENABLE : DISABLE;
 80082c6:	2b00      	cmp	r3, #0
 80082c8:	bf14      	ite	ne
 80082ca:	2301      	movne	r3, #1
 80082cc:	2300      	moveq	r3, #0
 80082ce:	b2db      	uxtb	r3, r3
 80082d0:	461a      	mov	r2, r3
  macconf->CarrierSenseDuringTransmit = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_DCRS) >> 9) > 0U)
 80082d2:	683b      	ldr	r3, [r7, #0]
 80082d4:	77da      	strb	r2, [r3, #31]
  macconf->ReceiveOwn = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_DO) >> 10) == 0U) ? ENABLE : DISABLE;
 80082d6:	687b      	ldr	r3, [r7, #4]
 80082d8:	681b      	ldr	r3, [r3, #0]
 80082da:	681b      	ldr	r3, [r3, #0]
 80082dc:	f403 6380 	and.w	r3, r3, #1024	@ 0x400
 80082e0:	2b00      	cmp	r3, #0
 80082e2:	bf0c      	ite	eq
 80082e4:	2301      	moveq	r3, #1
 80082e6:	2300      	movne	r3, #0
 80082e8:	b2db      	uxtb	r3, r3
 80082ea:	461a      	mov	r2, r3
 80082ec:	683b      	ldr	r3, [r7, #0]
 80082ee:	779a      	strb	r2, [r3, #30]
  macconf->CarrierSenseBeforeTransmit = ((READ_BIT(heth->Instance->MACCR,
 80082f0:	687b      	ldr	r3, [r7, #4]
 80082f2:	681b      	ldr	r3, [r3, #0]
 80082f4:	681b      	ldr	r3, [r3, #0]
                                                   ETH_MACCR_ECRSFD) >> 11) > 0U) ? ENABLE : DISABLE;
 80082f6:	f403 6300 	and.w	r3, r3, #2048	@ 0x800
 80082fa:	2b00      	cmp	r3, #0
 80082fc:	bf14      	ite	ne
 80082fe:	2301      	movne	r3, #1
 8008300:	2300      	moveq	r3, #0
 8008302:	b2db      	uxtb	r3, r3
 8008304:	461a      	mov	r2, r3
  macconf->CarrierSenseBeforeTransmit = ((READ_BIT(heth->Instance->MACCR,
 8008306:	683b      	ldr	r3, [r7, #0]
 8008308:	775a      	strb	r2, [r3, #29]
  macconf->LoopbackMode = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_LM) >> 12) > 0U) ? ENABLE : DISABLE;
 800830a:	687b      	ldr	r3, [r7, #4]
 800830c:	681b      	ldr	r3, [r3, #0]
 800830e:	681b      	ldr	r3, [r3, #0]
 8008310:	f403 5380 	and.w	r3, r3, #4096	@ 0x1000
 8008314:	2b00      	cmp	r3, #0
 8008316:	bf14      	ite	ne
 8008318:	2301      	movne	r3, #1
 800831a:	2300      	moveq	r3, #0
 800831c:	b2db      	uxtb	r3, r3
 800831e:	461a      	mov	r2, r3
 8008320:	683b      	ldr	r3, [r7, #0]
 8008322:	771a      	strb	r2, [r3, #28]
  macconf->DuplexMode = READ_BIT(heth->Instance->MACCR, ETH_MACCR_DM);
 8008324:	687b      	ldr	r3, [r7, #4]
 8008326:	681b      	ldr	r3, [r3, #0]
 8008328:	681b      	ldr	r3, [r3, #0]
 800832a:	f403 5200 	and.w	r2, r3, #8192	@ 0x2000
 800832e:	683b      	ldr	r3, [r7, #0]
 8008330:	619a      	str	r2, [r3, #24]
  macconf->Speed = READ_BIT(heth->Instance->MACCR, ETH_MACCR_FES);
 8008332:	687b      	ldr	r3, [r7, #4]
 8008334:	681b      	ldr	r3, [r3, #0]
 8008336:	681b      	ldr	r3, [r3, #0]
 8008338:	f403 4280 	and.w	r2, r3, #16384	@ 0x4000
 800833c:	683b      	ldr	r3, [r7, #0]
 800833e:	615a      	str	r2, [r3, #20]
  macconf->JumboPacket = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_JE) >> 16) > 0U) ? ENABLE : DISABLE;
 8008340:	687b      	ldr	r3, [r7, #4]
 8008342:	681b      	ldr	r3, [r3, #0]
 8008344:	681b      	ldr	r3, [r3, #0]
 8008346:	f403 3380 	and.w	r3, r3, #65536	@ 0x10000
 800834a:	2b00      	cmp	r3, #0
 800834c:	bf14      	ite	ne
 800834e:	2301      	movne	r3, #1
 8008350:	2300      	moveq	r3, #0
 8008352:	b2db      	uxtb	r3, r3
 8008354:	461a      	mov	r2, r3
 8008356:	683b      	ldr	r3, [r7, #0]
 8008358:	749a      	strb	r2, [r3, #18]
  macconf->Jabber = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_JD) >> 17) == 0U) ? ENABLE : DISABLE;
 800835a:	687b      	ldr	r3, [r7, #4]
 800835c:	681b      	ldr	r3, [r3, #0]
 800835e:	681b      	ldr	r3, [r3, #0]
 8008360:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
 8008364:	2b00      	cmp	r3, #0
 8008366:	bf0c      	ite	eq
 8008368:	2301      	moveq	r3, #1
 800836a:	2300      	movne	r3, #0
 800836c:	b2db      	uxtb	r3, r3
 800836e:	461a      	mov	r2, r3
 8008370:	683b      	ldr	r3, [r7, #0]
 8008372:	745a      	strb	r2, [r3, #17]
  macconf->Watchdog = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_WD) >> 19) == 0U) ? ENABLE : DISABLE;
 8008374:	687b      	ldr	r3, [r7, #4]
 8008376:	681b      	ldr	r3, [r3, #0]
 8008378:	681b      	ldr	r3, [r3, #0]
 800837a:	f403 2300 	and.w	r3, r3, #524288	@ 0x80000
 800837e:	2b00      	cmp	r3, #0
 8008380:	bf0c      	ite	eq
 8008382:	2301      	moveq	r3, #1
 8008384:	2300      	movne	r3, #0
 8008386:	b2db      	uxtb	r3, r3
 8008388:	461a      	mov	r2, r3
 800838a:	683b      	ldr	r3, [r7, #0]
 800838c:	741a      	strb	r2, [r3, #16]
  macconf->AutomaticPadCRCStrip = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_ACS) >> 20) > 0U) ? ENABLE : DISABLE;
 800838e:	687b      	ldr	r3, [r7, #4]
 8008390:	681b      	ldr	r3, [r3, #0]
 8008392:	681b      	ldr	r3, [r3, #0]
 8008394:	f403 1380 	and.w	r3, r3, #1048576	@ 0x100000
 8008398:	2b00      	cmp	r3, #0
 800839a:	bf14      	ite	ne
 800839c:	2301      	movne	r3, #1
 800839e:	2300      	moveq	r3, #0
 80083a0:	b2db      	uxtb	r3, r3
 80083a2:	461a      	mov	r2, r3
 80083a4:	683b      	ldr	r3, [r7, #0]
 80083a6:	73da      	strb	r2, [r3, #15]
  macconf->CRCStripTypePacket = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_CST) >> 21) > 0U) ? ENABLE : DISABLE;
 80083a8:	687b      	ldr	r3, [r7, #4]
 80083aa:	681b      	ldr	r3, [r3, #0]
 80083ac:	681b      	ldr	r3, [r3, #0]
 80083ae:	f403 1300 	and.w	r3, r3, #2097152	@ 0x200000
 80083b2:	2b00      	cmp	r3, #0
 80083b4:	bf14      	ite	ne
 80083b6:	2301      	movne	r3, #1
 80083b8:	2300      	moveq	r3, #0
 80083ba:	b2db      	uxtb	r3, r3
 80083bc:	461a      	mov	r2, r3
 80083be:	683b      	ldr	r3, [r7, #0]
 80083c0:	739a      	strb	r2, [r3, #14]
  macconf->Support2KPacket = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_S2KP) >> 22) > 0U) ? ENABLE : DISABLE;
 80083c2:	687b      	ldr	r3, [r7, #4]
 80083c4:	681b      	ldr	r3, [r3, #0]
 80083c6:	681b      	ldr	r3, [r3, #0]
 80083c8:	f403 0380 	and.w	r3, r3, #4194304	@ 0x400000
 80083cc:	2b00      	cmp	r3, #0
 80083ce:	bf14      	ite	ne
 80083d0:	2301      	movne	r3, #1
 80083d2:	2300      	moveq	r3, #0
 80083d4:	b2db      	uxtb	r3, r3
 80083d6:	461a      	mov	r2, r3
 80083d8:	683b      	ldr	r3, [r7, #0]
 80083da:	735a      	strb	r2, [r3, #13]
  macconf->GiantPacketSizeLimitControl = ((READ_BIT(heth->Instance->MACCR,
 80083dc:	687b      	ldr	r3, [r7, #4]
 80083de:	681b      	ldr	r3, [r3, #0]
 80083e0:	681b      	ldr	r3, [r3, #0]
                                                    ETH_MACCR_GPSLCE) >> 23) > 0U) ? ENABLE : DISABLE;
 80083e2:	f403 0300 	and.w	r3, r3, #8388608	@ 0x800000
 80083e6:	2b00      	cmp	r3, #0
 80083e8:	bf14      	ite	ne
 80083ea:	2301      	movne	r3, #1
 80083ec:	2300      	moveq	r3, #0
 80083ee:	b2db      	uxtb	r3, r3
 80083f0:	461a      	mov	r2, r3
  macconf->GiantPacketSizeLimitControl = ((READ_BIT(heth->Instance->MACCR,
 80083f2:	683b      	ldr	r3, [r7, #0]
 80083f4:	731a      	strb	r2, [r3, #12]
  macconf->InterPacketGapVal = READ_BIT(heth->Instance->MACCR, ETH_MACCR_IPG);
 80083f6:	687b      	ldr	r3, [r7, #4]
 80083f8:	681b      	ldr	r3, [r3, #0]
 80083fa:	681b      	ldr	r3, [r3, #0]
 80083fc:	f003 62e0 	and.w	r2, r3, #117440512	@ 0x7000000
 8008400:	683b      	ldr	r3, [r7, #0]
 8008402:	609a      	str	r2, [r3, #8]
  macconf->ChecksumOffload = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_IPC) >> 27) > 0U) ? ENABLE : DISABLE;
 8008404:	687b      	ldr	r3, [r7, #4]
 8008406:	681b      	ldr	r3, [r3, #0]
 8008408:	681b      	ldr	r3, [r3, #0]
 800840a:	f003 6300 	and.w	r3, r3, #134217728	@ 0x8000000
 800840e:	2b00      	cmp	r3, #0
 8008410:	bf14      	ite	ne
 8008412:	2301      	movne	r3, #1
 8008414:	2300      	moveq	r3, #0
 8008416:	b2db      	uxtb	r3, r3
 8008418:	461a      	mov	r2, r3
 800841a:	683b      	ldr	r3, [r7, #0]
 800841c:	711a      	strb	r2, [r3, #4]
  macconf->SourceAddrControl = READ_BIT(heth->Instance->MACCR, ETH_MACCR_SARC);
 800841e:	687b      	ldr	r3, [r7, #4]
 8008420:	681b      	ldr	r3, [r3, #0]
 8008422:	681b      	ldr	r3, [r3, #0]
 8008424:	f003 42e0 	and.w	r2, r3, #1879048192	@ 0x70000000
 8008428:	683b      	ldr	r3, [r7, #0]
 800842a:	601a      	str	r2, [r3, #0]

  macconf->GiantPacketSizeLimit = READ_BIT(heth->Instance->MACECR, ETH_MACECR_GPSL);
 800842c:	687b      	ldr	r3, [r7, #4]
 800842e:	681b      	ldr	r3, [r3, #0]
 8008430:	685b      	ldr	r3, [r3, #4]
 8008432:	f3c3 020d 	ubfx	r2, r3, #0, #14
 8008436:	683b      	ldr	r3, [r7, #0]
 8008438:	635a      	str	r2, [r3, #52]	@ 0x34
  macconf->CRCCheckingRxPackets = ((READ_BIT(heth->Instance->MACECR, ETH_MACECR_DCRCC) >> 16) == 0U) ? ENABLE : DISABLE;
 800843a:	687b      	ldr	r3, [r7, #4]
 800843c:	681b      	ldr	r3, [r3, #0]
 800843e:	685b      	ldr	r3, [r3, #4]
 8008440:	f403 3380 	and.w	r3, r3, #65536	@ 0x10000
 8008444:	2b00      	cmp	r3, #0
 8008446:	bf0c      	ite	eq
 8008448:	2301      	moveq	r3, #1
 800844a:	2300      	movne	r3, #0
 800844c:	b2db      	uxtb	r3, r3
 800844e:	461a      	mov	r2, r3
 8008450:	683b      	ldr	r3, [r7, #0]
 8008452:	f883 2032 	strb.w	r2, [r3, #50]	@ 0x32
  macconf->SlowProtocolDetect = ((READ_BIT(heth->Instance->MACECR, ETH_MACECR_SPEN) >> 17) > 0U) ? ENABLE : DISABLE;
 8008456:	687b      	ldr	r3, [r7, #4]
 8008458:	681b      	ldr	r3, [r3, #0]
 800845a:	685b      	ldr	r3, [r3, #4]
 800845c:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
 8008460:	2b00      	cmp	r3, #0
 8008462:	bf14      	ite	ne
 8008464:	2301      	movne	r3, #1
 8008466:	2300      	moveq	r3, #0
 8008468:	b2db      	uxtb	r3, r3
 800846a:	461a      	mov	r2, r3
 800846c:	683b      	ldr	r3, [r7, #0]
 800846e:	f883 2031 	strb.w	r2, [r3, #49]	@ 0x31
  macconf->UnicastSlowProtocolPacketDetect = ((READ_BIT(heth->Instance->MACECR,
 8008472:	687b      	ldr	r3, [r7, #4]
 8008474:	681b      	ldr	r3, [r3, #0]
 8008476:	685b      	ldr	r3, [r3, #4]
                                                        ETH_MACECR_USP) >> 18) > 0U) ? ENABLE : DISABLE;
 8008478:	f403 2380 	and.w	r3, r3, #262144	@ 0x40000
 800847c:	2b00      	cmp	r3, #0
 800847e:	bf14      	ite	ne
 8008480:	2301      	movne	r3, #1
 8008482:	2300      	moveq	r3, #0
 8008484:	b2db      	uxtb	r3, r3
 8008486:	461a      	mov	r2, r3
  macconf->UnicastSlowProtocolPacketDetect = ((READ_BIT(heth->Instance->MACECR,
 8008488:	683b      	ldr	r3, [r7, #0]
 800848a:	f883 2030 	strb.w	r2, [r3, #48]	@ 0x30
  macconf->ExtendedInterPacketGap = ((READ_BIT(heth->Instance->MACECR, ETH_MACECR_EIPGEN) >> 24) > 0U)
 800848e:	687b      	ldr	r3, [r7, #4]
 8008490:	681b      	ldr	r3, [r3, #0]
 8008492:	685b      	ldr	r3, [r3, #4]
 8008494:	f003 7380 	and.w	r3, r3, #16777216	@ 0x1000000
                                    ? ENABLE : DISABLE;
 8008498:	2b00      	cmp	r3, #0
 800849a:	bf14      	ite	ne
 800849c:	2301      	movne	r3, #1
 800849e:	2300      	moveq	r3, #0
 80084a0:	b2db      	uxtb	r3, r3
 80084a2:	461a      	mov	r2, r3
  macconf->ExtendedInterPacketGap = ((READ_BIT(heth->Instance->MACECR, ETH_MACECR_EIPGEN) >> 24) > 0U)
 80084a4:	683b      	ldr	r3, [r7, #0]
 80084a6:	f883 2038 	strb.w	r2, [r3, #56]	@ 0x38
  macconf->ExtendedInterPacketGapVal = READ_BIT(heth->Instance->MACECR, ETH_MACECR_EIPG) >> 25;
 80084aa:	687b      	ldr	r3, [r7, #4]
 80084ac:	681b      	ldr	r3, [r3, #0]
 80084ae:	685b      	ldr	r3, [r3, #4]
 80084b0:	0e5b      	lsrs	r3, r3, #25
 80084b2:	f003 021f 	and.w	r2, r3, #31
 80084b6:	683b      	ldr	r3, [r7, #0]
 80084b8:	63da      	str	r2, [r3, #60]	@ 0x3c

  macconf->ProgrammableWatchdog = ((READ_BIT(heth->Instance->MACWTR, ETH_MACWTR_PWE) >> 8) > 0U) ? ENABLE : DISABLE;
 80084ba:	687b      	ldr	r3, [r7, #4]
 80084bc:	681b      	ldr	r3, [r3, #0]
 80084be:	68db      	ldr	r3, [r3, #12]
 80084c0:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 80084c4:	2b00      	cmp	r3, #0
 80084c6:	bf14      	ite	ne
 80084c8:	2301      	movne	r3, #1
 80084ca:	2300      	moveq	r3, #0
 80084cc:	b2db      	uxtb	r3, r3
 80084ce:	461a      	mov	r2, r3
 80084d0:	683b      	ldr	r3, [r7, #0]
 80084d2:	f883 2040 	strb.w	r2, [r3, #64]	@ 0x40
  macconf->WatchdogTimeout = READ_BIT(heth->Instance->MACWTR, ETH_MACWTR_WTO);
 80084d6:	687b      	ldr	r3, [r7, #4]
 80084d8:	681b      	ldr	r3, [r3, #0]
 80084da:	68db      	ldr	r3, [r3, #12]
 80084dc:	f003 020f 	and.w	r2, r3, #15
 80084e0:	683b      	ldr	r3, [r7, #0]
 80084e2:	645a      	str	r2, [r3, #68]	@ 0x44

  macconf->TransmitFlowControl = ((READ_BIT(heth->Instance->MACTFCR, ETH_MACTFCR_TFE) >> 1) > 0U) ? ENABLE : DISABLE;
 80084e4:	687b      	ldr	r3, [r7, #4]
 80084e6:	681b      	ldr	r3, [r3, #0]
 80084e8:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 80084ea:	f003 0302 	and.w	r3, r3, #2
 80084ee:	2b00      	cmp	r3, #0
 80084f0:	bf14      	ite	ne
 80084f2:	2301      	movne	r3, #1
 80084f4:	2300      	moveq	r3, #0
 80084f6:	b2db      	uxtb	r3, r3
 80084f8:	461a      	mov	r2, r3
 80084fa:	683b      	ldr	r3, [r7, #0]
 80084fc:	f883 2054 	strb.w	r2, [r3, #84]	@ 0x54
  macconf->ZeroQuantaPause = ((READ_BIT(heth->Instance->MACTFCR, ETH_MACTFCR_DZPQ) >> 7) == 0U) ? ENABLE : DISABLE;
 8008500:	687b      	ldr	r3, [r7, #4]
 8008502:	681b      	ldr	r3, [r3, #0]
 8008504:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 8008506:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 800850a:	2b00      	cmp	r3, #0
 800850c:	bf0c      	ite	eq
 800850e:	2301      	moveq	r3, #1
 8008510:	2300      	movne	r3, #0
 8008512:	b2db      	uxtb	r3, r3
 8008514:	461a      	mov	r2, r3
 8008516:	683b      	ldr	r3, [r7, #0]
 8008518:	f883 204c 	strb.w	r2, [r3, #76]	@ 0x4c
  macconf->PauseLowThreshold = READ_BIT(heth->Instance->MACTFCR, ETH_MACTFCR_PLT);
 800851c:	687b      	ldr	r3, [r7, #4]
 800851e:	681b      	ldr	r3, [r3, #0]
 8008520:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 8008522:	f003 0270 	and.w	r2, r3, #112	@ 0x70
 8008526:	683b      	ldr	r3, [r7, #0]
 8008528:	651a      	str	r2, [r3, #80]	@ 0x50
  macconf->PauseTime = (READ_BIT(heth->Instance->MACTFCR, ETH_MACTFCR_PT) >> 16);
 800852a:	687b      	ldr	r3, [r7, #4]
 800852c:	681b      	ldr	r3, [r3, #0]
 800852e:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 8008530:	0c1b      	lsrs	r3, r3, #16
 8008532:	b29a      	uxth	r2, r3
 8008534:	683b      	ldr	r3, [r7, #0]
 8008536:	649a      	str	r2, [r3, #72]	@ 0x48
  macconf->ReceiveFlowControl = (READ_BIT(heth->Instance->MACRFCR, ETH_MACRFCR_RFE) > 0U) ? ENABLE : DISABLE;
 8008538:	687b      	ldr	r3, [r7, #4]
 800853a:	681b      	ldr	r3, [r3, #0]
 800853c:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 8008540:	f003 0301 	and.w	r3, r3, #1
 8008544:	2b00      	cmp	r3, #0
 8008546:	bf14      	ite	ne
 8008548:	2301      	movne	r3, #1
 800854a:	2300      	moveq	r3, #0
 800854c:	b2db      	uxtb	r3, r3
 800854e:	461a      	mov	r2, r3
 8008550:	683b      	ldr	r3, [r7, #0]
 8008552:	f883 2056 	strb.w	r2, [r3, #86]	@ 0x56
  macconf->UnicastPausePacketDetect = ((READ_BIT(heth->Instance->MACRFCR, ETH_MACRFCR_UP) >> 1) > 0U)
 8008556:	687b      	ldr	r3, [r7, #4]
 8008558:	681b      	ldr	r3, [r3, #0]
 800855a:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800855e:	f003 0302 	and.w	r3, r3, #2
                                      ? ENABLE : DISABLE;
 8008562:	2b00      	cmp	r3, #0
 8008564:	bf14      	ite	ne
 8008566:	2301      	movne	r3, #1
 8008568:	2300      	moveq	r3, #0
 800856a:	b2db      	uxtb	r3, r3
 800856c:	461a      	mov	r2, r3
  macconf->UnicastPausePacketDetect = ((READ_BIT(heth->Instance->MACRFCR, ETH_MACRFCR_UP) >> 1) > 0U)
 800856e:	683b      	ldr	r3, [r7, #0]
 8008570:	f883 2055 	strb.w	r2, [r3, #85]	@ 0x55

  macconf->TransmitQueueMode = READ_BIT(heth->Instance->MTLTQOMR, (ETH_MTLTQOMR_TTC | ETH_MTLTQOMR_TSF));
 8008574:	687b      	ldr	r3, [r7, #4]
 8008576:	681b      	ldr	r3, [r3, #0]
 8008578:	f8d3 3d00 	ldr.w	r3, [r3, #3328]	@ 0xd00
 800857c:	f003 0272 	and.w	r2, r3, #114	@ 0x72
 8008580:	683b      	ldr	r3, [r7, #0]
 8008582:	659a      	str	r2, [r3, #88]	@ 0x58

  macconf->ReceiveQueueMode = READ_BIT(heth->Instance->MTLRQOMR, (ETH_MTLRQOMR_RTC | ETH_MTLRQOMR_RSF));
 8008584:	687b      	ldr	r3, [r7, #4]
 8008586:	681b      	ldr	r3, [r3, #0]
 8008588:	f8d3 3d30 	ldr.w	r3, [r3, #3376]	@ 0xd30
 800858c:	f003 0223 	and.w	r2, r3, #35	@ 0x23
 8008590:	683b      	ldr	r3, [r7, #0]
 8008592:	65da      	str	r2, [r3, #92]	@ 0x5c
  macconf->ForwardRxUndersizedGoodPacket = ((READ_BIT(heth->Instance->MTLRQOMR,
 8008594:	687b      	ldr	r3, [r7, #4]
 8008596:	681b      	ldr	r3, [r3, #0]
 8008598:	f8d3 3d30 	ldr.w	r3, [r3, #3376]	@ 0xd30
                                                      ETH_MTLRQOMR_FUP) >> 3) > 0U) ? ENABLE : DISABLE;
 800859c:	f003 0308 	and.w	r3, r3, #8
 80085a0:	2b00      	cmp	r3, #0
 80085a2:	bf14      	ite	ne
 80085a4:	2301      	movne	r3, #1
 80085a6:	2300      	moveq	r3, #0
 80085a8:	b2db      	uxtb	r3, r3
 80085aa:	461a      	mov	r2, r3
  macconf->ForwardRxUndersizedGoodPacket = ((READ_BIT(heth->Instance->MTLRQOMR,
 80085ac:	683b      	ldr	r3, [r7, #0]
 80085ae:	f883 2062 	strb.w	r2, [r3, #98]	@ 0x62
  macconf->ForwardRxErrorPacket = ((READ_BIT(heth->Instance->MTLRQOMR, ETH_MTLRQOMR_FEP) >> 4) > 0U) ? ENABLE : DISABLE;
 80085b2:	687b      	ldr	r3, [r7, #4]
 80085b4:	681b      	ldr	r3, [r3, #0]
 80085b6:	f8d3 3d30 	ldr.w	r3, [r3, #3376]	@ 0xd30
 80085ba:	f003 0310 	and.w	r3, r3, #16
 80085be:	2b00      	cmp	r3, #0
 80085c0:	bf14      	ite	ne
 80085c2:	2301      	movne	r3, #1
 80085c4:	2300      	moveq	r3, #0
 80085c6:	b2db      	uxtb	r3, r3
 80085c8:	461a      	mov	r2, r3
 80085ca:	683b      	ldr	r3, [r7, #0]
 80085cc:	f883 2061 	strb.w	r2, [r3, #97]	@ 0x61
  macconf->DropTCPIPChecksumErrorPacket = ((READ_BIT(heth->Instance->MTLRQOMR,
 80085d0:	687b      	ldr	r3, [r7, #4]
 80085d2:	681b      	ldr	r3, [r3, #0]
 80085d4:	f8d3 3d30 	ldr.w	r3, [r3, #3376]	@ 0xd30
                                                     ETH_MTLRQOMR_DISTCPEF) >> 6) == 0U) ? ENABLE : DISABLE;
 80085d8:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 80085dc:	2b00      	cmp	r3, #0
 80085de:	bf0c      	ite	eq
 80085e0:	2301      	moveq	r3, #1
 80085e2:	2300      	movne	r3, #0
 80085e4:	b2db      	uxtb	r3, r3
 80085e6:	461a      	mov	r2, r3
  macconf->DropTCPIPChecksumErrorPacket = ((READ_BIT(heth->Instance->MTLRQOMR,
 80085e8:	683b      	ldr	r3, [r7, #0]
 80085ea:	f883 2060 	strb.w	r2, [r3, #96]	@ 0x60

  return HAL_OK;
 80085ee:	2300      	movs	r3, #0
}
 80085f0:	4618      	mov	r0, r3
 80085f2:	370c      	adds	r7, #12
 80085f4:	46bd      	mov	sp, r7
 80085f6:	f85d 7b04 	ldr.w	r7, [sp], #4
 80085fa:	4770      	bx	lr

080085fc <HAL_ETH_SetMACConfig>:
  * @param  macconf: pointer to a ETH_MACConfigTypeDef structure that contains
  *         the configuration of the MAC.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_ETH_SetMACConfig(ETH_HandleTypeDef *heth,  ETH_MACConfigTypeDef *macconf)
{
 80085fc:	b580      	push	{r7, lr}
 80085fe:	b082      	sub	sp, #8
 8008600:	af00      	add	r7, sp, #0
 8008602:	6078      	str	r0, [r7, #4]
 8008604:	6039      	str	r1, [r7, #0]
  if (macconf == NULL)
 8008606:	683b      	ldr	r3, [r7, #0]
 8008608:	2b00      	cmp	r3, #0
 800860a:	d101      	bne.n	8008610 <HAL_ETH_SetMACConfig+0x14>
  {
    return HAL_ERROR;
 800860c:	2301      	movs	r3, #1
 800860e:	e00b      	b.n	8008628 <HAL_ETH_SetMACConfig+0x2c>
  }

  if (heth->gState == HAL_ETH_STATE_READY)
 8008610:	687b      	ldr	r3, [r7, #4]
 8008612:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 8008616:	2b10      	cmp	r3, #16
 8008618:	d105      	bne.n	8008626 <HAL_ETH_SetMACConfig+0x2a>
  {
    ETH_SetMACConfig(heth, macconf);
 800861a:	6839      	ldr	r1, [r7, #0]
 800861c:	6878      	ldr	r0, [r7, #4]
 800861e:	f000 f865 	bl	80086ec <ETH_SetMACConfig>

    return HAL_OK;
 8008622:	2300      	movs	r3, #0
 8008624:	e000      	b.n	8008628 <HAL_ETH_SetMACConfig+0x2c>
  }
  else
  {
    return HAL_ERROR;
 8008626:	2301      	movs	r3, #1
  }
}
 8008628:	4618      	mov	r0, r3
 800862a:	3708      	adds	r7, #8
 800862c:	46bd      	mov	sp, r7
 800862e:	bd80      	pop	{r7, pc}

08008630 <HAL_ETH_SetMDIOClockRange>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval None
  */
void HAL_ETH_SetMDIOClockRange(ETH_HandleTypeDef *heth)
{
 8008630:	b580      	push	{r7, lr}
 8008632:	b084      	sub	sp, #16
 8008634:	af00      	add	r7, sp, #0
 8008636:	6078      	str	r0, [r7, #4]
  uint32_t hclk;
  uint32_t tmpreg;

  /* Get the ETHERNET MACMDIOAR value */
  tmpreg = (heth->Instance)->MACMDIOAR;
 8008638:	687b      	ldr	r3, [r7, #4]
 800863a:	681b      	ldr	r3, [r3, #0]
 800863c:	f8d3 3200 	ldr.w	r3, [r3, #512]	@ 0x200
 8008640:	60fb      	str	r3, [r7, #12]

  /* Clear CSR Clock Range bits */
  tmpreg &= ~ETH_MACMDIOAR_CR;
 8008642:	68fb      	ldr	r3, [r7, #12]
 8008644:	f423 6370 	bic.w	r3, r3, #3840	@ 0xf00
 8008648:	60fb      	str	r3, [r7, #12]

  /* Get hclk frequency value */
  hclk = HAL_RCC_GetHCLKFreq();
 800864a:	f001 ff5f 	bl	800a50c <HAL_RCC_GetHCLKFreq>
 800864e:	60b8      	str	r0, [r7, #8]

  /* Set CR bits depending on hclk value */
  if (hclk < 35000000U)
 8008650:	68bb      	ldr	r3, [r7, #8]
 8008652:	4a1a      	ldr	r2, [pc, #104]	@ (80086bc <HAL_ETH_SetMDIOClockRange+0x8c>)
 8008654:	4293      	cmp	r3, r2
 8008656:	d804      	bhi.n	8008662 <HAL_ETH_SetMDIOClockRange+0x32>
  {
    /* CSR Clock Range between 0-35 MHz */
    tmpreg |= (uint32_t)ETH_MACMDIOAR_CR_DIV16;
 8008658:	68fb      	ldr	r3, [r7, #12]
 800865a:	f443 7300 	orr.w	r3, r3, #512	@ 0x200
 800865e:	60fb      	str	r3, [r7, #12]
 8008660:	e022      	b.n	80086a8 <HAL_ETH_SetMDIOClockRange+0x78>
  }
  else if (hclk < 60000000U)
 8008662:	68bb      	ldr	r3, [r7, #8]
 8008664:	4a16      	ldr	r2, [pc, #88]	@ (80086c0 <HAL_ETH_SetMDIOClockRange+0x90>)
 8008666:	4293      	cmp	r3, r2
 8008668:	d204      	bcs.n	8008674 <HAL_ETH_SetMDIOClockRange+0x44>
  {
    /* CSR Clock Range between 35-60 MHz */
    tmpreg |= (uint32_t)ETH_MACMDIOAR_CR_DIV26;
 800866a:	68fb      	ldr	r3, [r7, #12]
 800866c:	f443 7340 	orr.w	r3, r3, #768	@ 0x300
 8008670:	60fb      	str	r3, [r7, #12]
 8008672:	e019      	b.n	80086a8 <HAL_ETH_SetMDIOClockRange+0x78>
  }
  else if (hclk < 100000000U)
 8008674:	68bb      	ldr	r3, [r7, #8]
 8008676:	4a13      	ldr	r2, [pc, #76]	@ (80086c4 <HAL_ETH_SetMDIOClockRange+0x94>)
 8008678:	4293      	cmp	r3, r2
 800867a:	d915      	bls.n	80086a8 <HAL_ETH_SetMDIOClockRange+0x78>
  {
    /* CSR Clock Range between 60-100 MHz */
    tmpreg |= (uint32_t)ETH_MACMDIOAR_CR_DIV42;
  }
  else if (hclk < 150000000U)
 800867c:	68bb      	ldr	r3, [r7, #8]
 800867e:	4a12      	ldr	r2, [pc, #72]	@ (80086c8 <HAL_ETH_SetMDIOClockRange+0x98>)
 8008680:	4293      	cmp	r3, r2
 8008682:	d804      	bhi.n	800868e <HAL_ETH_SetMDIOClockRange+0x5e>
  {
    /* CSR Clock Range between 100-150 MHz */
    tmpreg |= (uint32_t)ETH_MACMDIOAR_CR_DIV62;
 8008684:	68fb      	ldr	r3, [r7, #12]
 8008686:	f443 7380 	orr.w	r3, r3, #256	@ 0x100
 800868a:	60fb      	str	r3, [r7, #12]
 800868c:	e00c      	b.n	80086a8 <HAL_ETH_SetMDIOClockRange+0x78>
  }
  else if (hclk < 250000000U)
 800868e:	68bb      	ldr	r3, [r7, #8]
 8008690:	4a0e      	ldr	r2, [pc, #56]	@ (80086cc <HAL_ETH_SetMDIOClockRange+0x9c>)
 8008692:	4293      	cmp	r3, r2
 8008694:	d804      	bhi.n	80086a0 <HAL_ETH_SetMDIOClockRange+0x70>
  {
    /* CSR Clock Range between 150-250 MHz */
    tmpreg |= (uint32_t)ETH_MACMDIOAR_CR_DIV102;
 8008696:	68fb      	ldr	r3, [r7, #12]
 8008698:	f443 6380 	orr.w	r3, r3, #1024	@ 0x400
 800869c:	60fb      	str	r3, [r7, #12]
 800869e:	e003      	b.n	80086a8 <HAL_ETH_SetMDIOClockRange+0x78>
  }
  else /* (hclk >= 250000000U) */
  {
    /* CSR Clock >= 250 MHz */
    tmpreg |= (uint32_t)(ETH_MACMDIOAR_CR_DIV124);
 80086a0:	68fb      	ldr	r3, [r7, #12]
 80086a2:	f443 63a0 	orr.w	r3, r3, #1280	@ 0x500
 80086a6:	60fb      	str	r3, [r7, #12]
  }

  /* Configure the CSR Clock Range */
  (heth->Instance)->MACMDIOAR = (uint32_t)tmpreg;
 80086a8:	687b      	ldr	r3, [r7, #4]
 80086aa:	681b      	ldr	r3, [r3, #0]
 80086ac:	68fa      	ldr	r2, [r7, #12]
 80086ae:	f8c3 2200 	str.w	r2, [r3, #512]	@ 0x200
}
 80086b2:	bf00      	nop
 80086b4:	3710      	adds	r7, #16
 80086b6:	46bd      	mov	sp, r7
 80086b8:	bd80      	pop	{r7, pc}
 80086ba:	bf00      	nop
 80086bc:	02160ebf 	.word	0x02160ebf
 80086c0:	03938700 	.word	0x03938700
 80086c4:	05f5e0ff 	.word	0x05f5e0ff
 80086c8:	08f0d17f 	.word	0x08f0d17f
 80086cc:	0ee6b27f 	.word	0x0ee6b27f

080086d0 <HAL_ETH_GetDMAError>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval ETH DMA Error Code
  */
uint32_t HAL_ETH_GetDMAError(const ETH_HandleTypeDef *heth)
{
 80086d0:	b480      	push	{r7}
 80086d2:	b083      	sub	sp, #12
 80086d4:	af00      	add	r7, sp, #0
 80086d6:	6078      	str	r0, [r7, #4]
  return heth->DMAErrorCode;
 80086d8:	687b      	ldr	r3, [r7, #4]
 80086da:	f8d3 308c 	ldr.w	r3, [r3, #140]	@ 0x8c
}
 80086de:	4618      	mov	r0, r3
 80086e0:	370c      	adds	r7, #12
 80086e2:	46bd      	mov	sp, r7
 80086e4:	f85d 7b04 	ldr.w	r7, [sp], #4
 80086e8:	4770      	bx	lr
	...

080086ec <ETH_SetMACConfig>:
/** @addtogroup ETH_Private_Functions   ETH Private Functions
  * @{
  */

static void ETH_SetMACConfig(ETH_HandleTypeDef *heth, const ETH_MACConfigTypeDef *macconf)
{
 80086ec:	b480      	push	{r7}
 80086ee:	b085      	sub	sp, #20
 80086f0:	af00      	add	r7, sp, #0
 80086f2:	6078      	str	r0, [r7, #4]
 80086f4:	6039      	str	r1, [r7, #0]
  uint32_t macregval;

  /*------------------------ MACCR Configuration --------------------*/
  macregval = (macconf->InterPacketGapVal |
 80086f6:	683b      	ldr	r3, [r7, #0]
 80086f8:	689a      	ldr	r2, [r3, #8]
               macconf->SourceAddrControl |
 80086fa:	683b      	ldr	r3, [r7, #0]
 80086fc:	681b      	ldr	r3, [r3, #0]
  macregval = (macconf->InterPacketGapVal |
 80086fe:	431a      	orrs	r2, r3
               ((uint32_t)macconf->ChecksumOffload << 27) |
 8008700:	683b      	ldr	r3, [r7, #0]
 8008702:	791b      	ldrb	r3, [r3, #4]
 8008704:	06db      	lsls	r3, r3, #27
               macconf->SourceAddrControl |
 8008706:	431a      	orrs	r2, r3
               ((uint32_t)macconf->GiantPacketSizeLimitControl << 23) |
 8008708:	683b      	ldr	r3, [r7, #0]
 800870a:	7b1b      	ldrb	r3, [r3, #12]
 800870c:	05db      	lsls	r3, r3, #23
               ((uint32_t)macconf->ChecksumOffload << 27) |
 800870e:	431a      	orrs	r2, r3
               ((uint32_t)macconf->Support2KPacket  << 22) |
 8008710:	683b      	ldr	r3, [r7, #0]
 8008712:	7b5b      	ldrb	r3, [r3, #13]
 8008714:	059b      	lsls	r3, r3, #22
               ((uint32_t)macconf->GiantPacketSizeLimitControl << 23) |
 8008716:	431a      	orrs	r2, r3
               ((uint32_t)macconf->CRCStripTypePacket << 21) |
 8008718:	683b      	ldr	r3, [r7, #0]
 800871a:	7b9b      	ldrb	r3, [r3, #14]
 800871c:	055b      	lsls	r3, r3, #21
               ((uint32_t)macconf->Support2KPacket  << 22) |
 800871e:	431a      	orrs	r2, r3
               ((uint32_t)macconf->AutomaticPadCRCStrip << 20) |
 8008720:	683b      	ldr	r3, [r7, #0]
 8008722:	7bdb      	ldrb	r3, [r3, #15]
 8008724:	051b      	lsls	r3, r3, #20
               ((uint32_t)macconf->CRCStripTypePacket << 21) |
 8008726:	4313      	orrs	r3, r2
               ((uint32_t)((macconf->Watchdog == DISABLE) ? 1U : 0U) << 19) |
 8008728:	683a      	ldr	r2, [r7, #0]
 800872a:	7c12      	ldrb	r2, [r2, #16]
 800872c:	2a00      	cmp	r2, #0
 800872e:	d102      	bne.n	8008736 <ETH_SetMACConfig+0x4a>
 8008730:	f44f 2200 	mov.w	r2, #524288	@ 0x80000
 8008734:	e000      	b.n	8008738 <ETH_SetMACConfig+0x4c>
 8008736:	2200      	movs	r2, #0
               ((uint32_t)macconf->AutomaticPadCRCStrip << 20) |
 8008738:	4313      	orrs	r3, r2
               ((uint32_t)((macconf->Jabber == DISABLE) ? 1U : 0U) << 17) |
 800873a:	683a      	ldr	r2, [r7, #0]
 800873c:	7c52      	ldrb	r2, [r2, #17]
 800873e:	2a00      	cmp	r2, #0
 8008740:	d102      	bne.n	8008748 <ETH_SetMACConfig+0x5c>
 8008742:	f44f 3200 	mov.w	r2, #131072	@ 0x20000
 8008746:	e000      	b.n	800874a <ETH_SetMACConfig+0x5e>
 8008748:	2200      	movs	r2, #0
               ((uint32_t)((macconf->Watchdog == DISABLE) ? 1U : 0U) << 19) |
 800874a:	431a      	orrs	r2, r3
               ((uint32_t)macconf->JumboPacket << 16) |
 800874c:	683b      	ldr	r3, [r7, #0]
 800874e:	7c9b      	ldrb	r3, [r3, #18]
 8008750:	041b      	lsls	r3, r3, #16
               ((uint32_t)((macconf->Jabber == DISABLE) ? 1U : 0U) << 17) |
 8008752:	431a      	orrs	r2, r3
               macconf->Speed |
 8008754:	683b      	ldr	r3, [r7, #0]
 8008756:	695b      	ldr	r3, [r3, #20]
               ((uint32_t)macconf->JumboPacket << 16) |
 8008758:	431a      	orrs	r2, r3
               macconf->DuplexMode |
 800875a:	683b      	ldr	r3, [r7, #0]
 800875c:	699b      	ldr	r3, [r3, #24]
               macconf->Speed |
 800875e:	431a      	orrs	r2, r3
               ((uint32_t)macconf->LoopbackMode << 12) |
 8008760:	683b      	ldr	r3, [r7, #0]
 8008762:	7f1b      	ldrb	r3, [r3, #28]
 8008764:	031b      	lsls	r3, r3, #12
               macconf->DuplexMode |
 8008766:	431a      	orrs	r2, r3
               ((uint32_t)macconf->CarrierSenseBeforeTransmit << 11) |
 8008768:	683b      	ldr	r3, [r7, #0]
 800876a:	7f5b      	ldrb	r3, [r3, #29]
 800876c:	02db      	lsls	r3, r3, #11
               ((uint32_t)macconf->LoopbackMode << 12) |
 800876e:	4313      	orrs	r3, r2
               ((uint32_t)((macconf->ReceiveOwn == DISABLE) ? 1U : 0U) << 10) |
 8008770:	683a      	ldr	r2, [r7, #0]
 8008772:	7f92      	ldrb	r2, [r2, #30]
 8008774:	2a00      	cmp	r2, #0
 8008776:	d102      	bne.n	800877e <ETH_SetMACConfig+0x92>
 8008778:	f44f 6280 	mov.w	r2, #1024	@ 0x400
 800877c:	e000      	b.n	8008780 <ETH_SetMACConfig+0x94>
 800877e:	2200      	movs	r2, #0
               ((uint32_t)macconf->CarrierSenseBeforeTransmit << 11) |
 8008780:	431a      	orrs	r2, r3
               ((uint32_t)macconf->CarrierSenseDuringTransmit << 9) |
 8008782:	683b      	ldr	r3, [r7, #0]
 8008784:	7fdb      	ldrb	r3, [r3, #31]
 8008786:	025b      	lsls	r3, r3, #9
               ((uint32_t)((macconf->ReceiveOwn == DISABLE) ? 1U : 0U) << 10) |
 8008788:	4313      	orrs	r3, r2
               ((uint32_t)((macconf->RetryTransmission == DISABLE) ? 1U : 0U) << 8) |
 800878a:	683a      	ldr	r2, [r7, #0]
 800878c:	f892 2020 	ldrb.w	r2, [r2, #32]
 8008790:	2a00      	cmp	r2, #0
 8008792:	d102      	bne.n	800879a <ETH_SetMACConfig+0xae>
 8008794:	f44f 7280 	mov.w	r2, #256	@ 0x100
 8008798:	e000      	b.n	800879c <ETH_SetMACConfig+0xb0>
 800879a:	2200      	movs	r2, #0
               ((uint32_t)macconf->CarrierSenseDuringTransmit << 9) |
 800879c:	431a      	orrs	r2, r3
               macconf->BackOffLimit |
 800879e:	683b      	ldr	r3, [r7, #0]
 80087a0:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
               ((uint32_t)((macconf->RetryTransmission == DISABLE) ? 1U : 0U) << 8) |
 80087a2:	431a      	orrs	r2, r3
               ((uint32_t)macconf->DeferralCheck << 4) |
 80087a4:	683b      	ldr	r3, [r7, #0]
 80087a6:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 80087aa:	011b      	lsls	r3, r3, #4
               macconf->BackOffLimit |
 80087ac:	431a      	orrs	r2, r3
               macconf->PreambleLength);
 80087ae:	683b      	ldr	r3, [r7, #0]
 80087b0:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
  macregval = (macconf->InterPacketGapVal |
 80087b2:	4313      	orrs	r3, r2
 80087b4:	60fb      	str	r3, [r7, #12]

  /* Write to MACCR */
  MODIFY_REG(heth->Instance->MACCR, ETH_MACCR_MASK, macregval);
 80087b6:	687b      	ldr	r3, [r7, #4]
 80087b8:	681b      	ldr	r3, [r3, #0]
 80087ba:	681a      	ldr	r2, [r3, #0]
 80087bc:	4b56      	ldr	r3, [pc, #344]	@ (8008918 <ETH_SetMACConfig+0x22c>)
 80087be:	4013      	ands	r3, r2
 80087c0:	687a      	ldr	r2, [r7, #4]
 80087c2:	6812      	ldr	r2, [r2, #0]
 80087c4:	68f9      	ldr	r1, [r7, #12]
 80087c6:	430b      	orrs	r3, r1
 80087c8:	6013      	str	r3, [r2, #0]

  /*------------------------ MACECR Configuration --------------------*/
  macregval = ((macconf->ExtendedInterPacketGapVal << 25) |
 80087ca:	683b      	ldr	r3, [r7, #0]
 80087cc:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 80087ce:	065a      	lsls	r2, r3, #25
               ((uint32_t)macconf->ExtendedInterPacketGap << 24) |
 80087d0:	683b      	ldr	r3, [r7, #0]
 80087d2:	f893 3038 	ldrb.w	r3, [r3, #56]	@ 0x38
 80087d6:	061b      	lsls	r3, r3, #24
  macregval = ((macconf->ExtendedInterPacketGapVal << 25) |
 80087d8:	431a      	orrs	r2, r3
               ((uint32_t)macconf->UnicastSlowProtocolPacketDetect << 18) |
 80087da:	683b      	ldr	r3, [r7, #0]
 80087dc:	f893 3030 	ldrb.w	r3, [r3, #48]	@ 0x30
 80087e0:	049b      	lsls	r3, r3, #18
               ((uint32_t)macconf->ExtendedInterPacketGap << 24) |
 80087e2:	431a      	orrs	r2, r3
               ((uint32_t)macconf->SlowProtocolDetect << 17) |
 80087e4:	683b      	ldr	r3, [r7, #0]
 80087e6:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 80087ea:	045b      	lsls	r3, r3, #17
               ((uint32_t)macconf->UnicastSlowProtocolPacketDetect << 18) |
 80087ec:	4313      	orrs	r3, r2
               ((uint32_t)((macconf->CRCCheckingRxPackets == DISABLE) ? 1U : 0U) << 16) |
 80087ee:	683a      	ldr	r2, [r7, #0]
 80087f0:	f892 2032 	ldrb.w	r2, [r2, #50]	@ 0x32
 80087f4:	2a00      	cmp	r2, #0
 80087f6:	d102      	bne.n	80087fe <ETH_SetMACConfig+0x112>
 80087f8:	f44f 3280 	mov.w	r2, #65536	@ 0x10000
 80087fc:	e000      	b.n	8008800 <ETH_SetMACConfig+0x114>
 80087fe:	2200      	movs	r2, #0
               ((uint32_t)macconf->SlowProtocolDetect << 17) |
 8008800:	431a      	orrs	r2, r3
               macconf->GiantPacketSizeLimit);
 8008802:	683b      	ldr	r3, [r7, #0]
 8008804:	6b5b      	ldr	r3, [r3, #52]	@ 0x34
  macregval = ((macconf->ExtendedInterPacketGapVal << 25) |
 8008806:	4313      	orrs	r3, r2
 8008808:	60fb      	str	r3, [r7, #12]

  /* Write to MACECR */
  MODIFY_REG(heth->Instance->MACECR, ETH_MACECR_MASK, macregval);
 800880a:	687b      	ldr	r3, [r7, #4]
 800880c:	681b      	ldr	r3, [r3, #0]
 800880e:	685a      	ldr	r2, [r3, #4]
 8008810:	4b42      	ldr	r3, [pc, #264]	@ (800891c <ETH_SetMACConfig+0x230>)
 8008812:	4013      	ands	r3, r2
 8008814:	687a      	ldr	r2, [r7, #4]
 8008816:	6812      	ldr	r2, [r2, #0]
 8008818:	68f9      	ldr	r1, [r7, #12]
 800881a:	430b      	orrs	r3, r1
 800881c:	6053      	str	r3, [r2, #4]

  /*------------------------ MACWTR Configuration --------------------*/
  macregval = (((uint32_t)macconf->ProgrammableWatchdog << 8) |
 800881e:	683b      	ldr	r3, [r7, #0]
 8008820:	f893 3040 	ldrb.w	r3, [r3, #64]	@ 0x40
 8008824:	021a      	lsls	r2, r3, #8
               macconf->WatchdogTimeout);
 8008826:	683b      	ldr	r3, [r7, #0]
 8008828:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
  macregval = (((uint32_t)macconf->ProgrammableWatchdog << 8) |
 800882a:	4313      	orrs	r3, r2
 800882c:	60fb      	str	r3, [r7, #12]

  /* Write to MACWTR */
  MODIFY_REG(heth->Instance->MACWTR, ETH_MACWTR_MASK, macregval);
 800882e:	687b      	ldr	r3, [r7, #4]
 8008830:	681b      	ldr	r3, [r3, #0]
 8008832:	68da      	ldr	r2, [r3, #12]
 8008834:	4b3a      	ldr	r3, [pc, #232]	@ (8008920 <ETH_SetMACConfig+0x234>)
 8008836:	4013      	ands	r3, r2
 8008838:	687a      	ldr	r2, [r7, #4]
 800883a:	6812      	ldr	r2, [r2, #0]
 800883c:	68f9      	ldr	r1, [r7, #12]
 800883e:	430b      	orrs	r3, r1
 8008840:	60d3      	str	r3, [r2, #12]

  /*------------------------ MACTFCR Configuration --------------------*/
  macregval = (((uint32_t)macconf->TransmitFlowControl << 1) |
 8008842:	683b      	ldr	r3, [r7, #0]
 8008844:	f893 3054 	ldrb.w	r3, [r3, #84]	@ 0x54
 8008848:	005a      	lsls	r2, r3, #1
               macconf->PauseLowThreshold |
 800884a:	683b      	ldr	r3, [r7, #0]
 800884c:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
  macregval = (((uint32_t)macconf->TransmitFlowControl << 1) |
 800884e:	4313      	orrs	r3, r2
               ((uint32_t)((macconf->ZeroQuantaPause == DISABLE) ? 1U : 0U) << 7) |
 8008850:	683a      	ldr	r2, [r7, #0]
 8008852:	f892 204c 	ldrb.w	r2, [r2, #76]	@ 0x4c
 8008856:	2a00      	cmp	r2, #0
 8008858:	d101      	bne.n	800885e <ETH_SetMACConfig+0x172>
 800885a:	2280      	movs	r2, #128	@ 0x80
 800885c:	e000      	b.n	8008860 <ETH_SetMACConfig+0x174>
 800885e:	2200      	movs	r2, #0
               macconf->PauseLowThreshold |
 8008860:	431a      	orrs	r2, r3
               (macconf->PauseTime << 16));
 8008862:	683b      	ldr	r3, [r7, #0]
 8008864:	6c9b      	ldr	r3, [r3, #72]	@ 0x48
 8008866:	041b      	lsls	r3, r3, #16
  macregval = (((uint32_t)macconf->TransmitFlowControl << 1) |
 8008868:	4313      	orrs	r3, r2
 800886a:	60fb      	str	r3, [r7, #12]

  /* Write to MACTFCR */
  MODIFY_REG(heth->Instance->MACTFCR, ETH_MACTFCR_MASK, macregval);
 800886c:	687b      	ldr	r3, [r7, #4]
 800886e:	681b      	ldr	r3, [r3, #0]
 8008870:	6f1a      	ldr	r2, [r3, #112]	@ 0x70
 8008872:	f64f 730d 	movw	r3, #65293	@ 0xff0d
 8008876:	4013      	ands	r3, r2
 8008878:	687a      	ldr	r2, [r7, #4]
 800887a:	6812      	ldr	r2, [r2, #0]
 800887c:	68f9      	ldr	r1, [r7, #12]
 800887e:	430b      	orrs	r3, r1
 8008880:	6713      	str	r3, [r2, #112]	@ 0x70

  /*------------------------ MACRFCR Configuration --------------------*/
  macregval = ((uint32_t)macconf->ReceiveFlowControl |
 8008882:	683b      	ldr	r3, [r7, #0]
 8008884:	f893 3056 	ldrb.w	r3, [r3, #86]	@ 0x56
 8008888:	461a      	mov	r2, r3
               ((uint32_t)macconf->UnicastPausePacketDetect << 1));
 800888a:	683b      	ldr	r3, [r7, #0]
 800888c:	f893 3055 	ldrb.w	r3, [r3, #85]	@ 0x55
 8008890:	005b      	lsls	r3, r3, #1
  macregval = ((uint32_t)macconf->ReceiveFlowControl |
 8008892:	4313      	orrs	r3, r2
 8008894:	60fb      	str	r3, [r7, #12]

  /* Write to MACRFCR */
  MODIFY_REG(heth->Instance->MACRFCR, ETH_MACRFCR_MASK, macregval);
 8008896:	687b      	ldr	r3, [r7, #4]
 8008898:	681b      	ldr	r3, [r3, #0]
 800889a:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800889e:	f023 0103 	bic.w	r1, r3, #3
 80088a2:	687b      	ldr	r3, [r7, #4]
 80088a4:	681b      	ldr	r3, [r3, #0]
 80088a6:	68fa      	ldr	r2, [r7, #12]
 80088a8:	430a      	orrs	r2, r1
 80088aa:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90

  /*------------------------ MTLTQOMR Configuration --------------------*/
  /* Write to MTLTQOMR */
  MODIFY_REG(heth->Instance->MTLTQOMR, ETH_MTLTQOMR_MASK, macconf->TransmitQueueMode);
 80088ae:	687b      	ldr	r3, [r7, #4]
 80088b0:	681b      	ldr	r3, [r3, #0]
 80088b2:	f8d3 3d00 	ldr.w	r3, [r3, #3328]	@ 0xd00
 80088b6:	f023 0172 	bic.w	r1, r3, #114	@ 0x72
 80088ba:	683b      	ldr	r3, [r7, #0]
 80088bc:	6d9a      	ldr	r2, [r3, #88]	@ 0x58
 80088be:	687b      	ldr	r3, [r7, #4]
 80088c0:	681b      	ldr	r3, [r3, #0]
 80088c2:	430a      	orrs	r2, r1
 80088c4:	f8c3 2d00 	str.w	r2, [r3, #3328]	@ 0xd00

  /*------------------------ MTLRQOMR Configuration --------------------*/
  macregval = (macconf->ReceiveQueueMode |
 80088c8:	683b      	ldr	r3, [r7, #0]
 80088ca:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
               ((uint32_t)((macconf->DropTCPIPChecksumErrorPacket == DISABLE) ? 1U : 0U) << 6) |
 80088cc:	683a      	ldr	r2, [r7, #0]
 80088ce:	f892 2060 	ldrb.w	r2, [r2, #96]	@ 0x60
 80088d2:	2a00      	cmp	r2, #0
 80088d4:	d101      	bne.n	80088da <ETH_SetMACConfig+0x1ee>
 80088d6:	2240      	movs	r2, #64	@ 0x40
 80088d8:	e000      	b.n	80088dc <ETH_SetMACConfig+0x1f0>
 80088da:	2200      	movs	r2, #0
  macregval = (macconf->ReceiveQueueMode |
 80088dc:	431a      	orrs	r2, r3
               ((uint32_t)macconf->ForwardRxErrorPacket << 4) |
 80088de:	683b      	ldr	r3, [r7, #0]
 80088e0:	f893 3061 	ldrb.w	r3, [r3, #97]	@ 0x61
 80088e4:	011b      	lsls	r3, r3, #4
               ((uint32_t)((macconf->DropTCPIPChecksumErrorPacket == DISABLE) ? 1U : 0U) << 6) |
 80088e6:	431a      	orrs	r2, r3
               ((uint32_t)macconf->ForwardRxUndersizedGoodPacket << 3));
 80088e8:	683b      	ldr	r3, [r7, #0]
 80088ea:	f893 3062 	ldrb.w	r3, [r3, #98]	@ 0x62
 80088ee:	00db      	lsls	r3, r3, #3
  macregval = (macconf->ReceiveQueueMode |
 80088f0:	4313      	orrs	r3, r2
 80088f2:	60fb      	str	r3, [r7, #12]

  /* Write to MTLRQOMR */
  MODIFY_REG(heth->Instance->MTLRQOMR, ETH_MTLRQOMR_MASK, macregval);
 80088f4:	687b      	ldr	r3, [r7, #4]
 80088f6:	681b      	ldr	r3, [r3, #0]
 80088f8:	f8d3 3d30 	ldr.w	r3, [r3, #3376]	@ 0xd30
 80088fc:	f023 017b 	bic.w	r1, r3, #123	@ 0x7b
 8008900:	687b      	ldr	r3, [r7, #4]
 8008902:	681b      	ldr	r3, [r3, #0]
 8008904:	68fa      	ldr	r2, [r7, #12]
 8008906:	430a      	orrs	r2, r1
 8008908:	f8c3 2d30 	str.w	r2, [r3, #3376]	@ 0xd30
}
 800890c:	bf00      	nop
 800890e:	3714      	adds	r7, #20
 8008910:	46bd      	mov	sp, r7
 8008912:	f85d 7b04 	ldr.w	r7, [sp], #4
 8008916:	4770      	bx	lr
 8008918:	00048083 	.word	0x00048083
 800891c:	c0f88000 	.word	0xc0f88000
 8008920:	fffffef0 	.word	0xfffffef0

08008924 <ETH_SetDMAConfig>:

static void ETH_SetDMAConfig(ETH_HandleTypeDef *heth, const ETH_DMAConfigTypeDef *dmaconf)
{
 8008924:	b480      	push	{r7}
 8008926:	b085      	sub	sp, #20
 8008928:	af00      	add	r7, sp, #0
 800892a:	6078      	str	r0, [r7, #4]
 800892c:	6039      	str	r1, [r7, #0]
  uint32_t dmaregval;

  /*------------------------ DMAMR Configuration --------------------*/
  MODIFY_REG(heth->Instance->DMAMR, ETH_DMAMR_MASK, dmaconf->DMAArbitration);
 800892e:	687b      	ldr	r3, [r7, #4]
 8008930:	681b      	ldr	r3, [r3, #0]
 8008932:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8008936:	681a      	ldr	r2, [r3, #0]
 8008938:	4b38      	ldr	r3, [pc, #224]	@ (8008a1c <ETH_SetDMAConfig+0xf8>)
 800893a:	4013      	ands	r3, r2
 800893c:	683a      	ldr	r2, [r7, #0]
 800893e:	6811      	ldr	r1, [r2, #0]
 8008940:	687a      	ldr	r2, [r7, #4]
 8008942:	6812      	ldr	r2, [r2, #0]
 8008944:	430b      	orrs	r3, r1
 8008946:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 800894a:	6013      	str	r3, [r2, #0]

  /*------------------------ DMASBMR Configuration --------------------*/
  dmaregval = (((uint32_t)dmaconf->AddressAlignedBeats << 12) |
 800894c:	683b      	ldr	r3, [r7, #0]
 800894e:	791b      	ldrb	r3, [r3, #4]
 8008950:	031a      	lsls	r2, r3, #12
               dmaconf->BurstMode |
 8008952:	683b      	ldr	r3, [r7, #0]
 8008954:	689b      	ldr	r3, [r3, #8]
  dmaregval = (((uint32_t)dmaconf->AddressAlignedBeats << 12) |
 8008956:	431a      	orrs	r2, r3
               ((uint32_t)dmaconf->RebuildINCRxBurst << 15));
 8008958:	683b      	ldr	r3, [r7, #0]
 800895a:	7b1b      	ldrb	r3, [r3, #12]
 800895c:	03db      	lsls	r3, r3, #15
  dmaregval = (((uint32_t)dmaconf->AddressAlignedBeats << 12) |
 800895e:	4313      	orrs	r3, r2
 8008960:	60fb      	str	r3, [r7, #12]

  MODIFY_REG(heth->Instance->DMASBMR, ETH_DMASBMR_MASK, dmaregval);
 8008962:	687b      	ldr	r3, [r7, #4]
 8008964:	681b      	ldr	r3, [r3, #0]
 8008966:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 800896a:	685a      	ldr	r2, [r3, #4]
 800896c:	4b2c      	ldr	r3, [pc, #176]	@ (8008a20 <ETH_SetDMAConfig+0xfc>)
 800896e:	4013      	ands	r3, r2
 8008970:	687a      	ldr	r2, [r7, #4]
 8008972:	6812      	ldr	r2, [r2, #0]
 8008974:	68f9      	ldr	r1, [r7, #12]
 8008976:	430b      	orrs	r3, r1
 8008978:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 800897c:	6053      	str	r3, [r2, #4]

  /*------------------------ DMACCR Configuration --------------------*/
  dmaregval = (((uint32_t)dmaconf->PBLx8Mode << 16) |
 800897e:	683b      	ldr	r3, [r7, #0]
 8008980:	7b5b      	ldrb	r3, [r3, #13]
 8008982:	041a      	lsls	r2, r3, #16
               dmaconf->MaximumSegmentSize);
 8008984:	683b      	ldr	r3, [r7, #0]
 8008986:	6a1b      	ldr	r3, [r3, #32]
  dmaregval = (((uint32_t)dmaconf->PBLx8Mode << 16) |
 8008988:	4313      	orrs	r3, r2
 800898a:	60fb      	str	r3, [r7, #12]
  MODIFY_REG(heth->Instance->DMACCR, ETH_DMACCR_MASK, dmaregval);
 800898c:	687b      	ldr	r3, [r7, #4]
 800898e:	681b      	ldr	r3, [r3, #0]
 8008990:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8008994:	f8d3 2100 	ldr.w	r2, [r3, #256]	@ 0x100
 8008998:	4b22      	ldr	r3, [pc, #136]	@ (8008a24 <ETH_SetDMAConfig+0x100>)
 800899a:	4013      	ands	r3, r2
 800899c:	687a      	ldr	r2, [r7, #4]
 800899e:	6812      	ldr	r2, [r2, #0]
 80089a0:	68f9      	ldr	r1, [r7, #12]
 80089a2:	430b      	orrs	r3, r1
 80089a4:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 80089a8:	f8c2 3100 	str.w	r3, [r2, #256]	@ 0x100

  /*------------------------ DMACTCR Configuration --------------------*/
  dmaregval = (dmaconf->TxDMABurstLength |
 80089ac:	683b      	ldr	r3, [r7, #0]
 80089ae:	691a      	ldr	r2, [r3, #16]
               ((uint32_t)dmaconf->SecondPacketOperate << 4) |
 80089b0:	683b      	ldr	r3, [r7, #0]
 80089b2:	7d1b      	ldrb	r3, [r3, #20]
 80089b4:	011b      	lsls	r3, r3, #4
  dmaregval = (dmaconf->TxDMABurstLength |
 80089b6:	431a      	orrs	r2, r3
               ((uint32_t)dmaconf->TCPSegmentation << 12));
 80089b8:	683b      	ldr	r3, [r7, #0]
 80089ba:	7f5b      	ldrb	r3, [r3, #29]
 80089bc:	031b      	lsls	r3, r3, #12
  dmaregval = (dmaconf->TxDMABurstLength |
 80089be:	4313      	orrs	r3, r2
 80089c0:	60fb      	str	r3, [r7, #12]

  MODIFY_REG(heth->Instance->DMACTCR, ETH_DMACTCR_MASK, dmaregval);
 80089c2:	687b      	ldr	r3, [r7, #4]
 80089c4:	681b      	ldr	r3, [r3, #0]
 80089c6:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 80089ca:	f8d3 2104 	ldr.w	r2, [r3, #260]	@ 0x104
 80089ce:	4b16      	ldr	r3, [pc, #88]	@ (8008a28 <ETH_SetDMAConfig+0x104>)
 80089d0:	4013      	ands	r3, r2
 80089d2:	687a      	ldr	r2, [r7, #4]
 80089d4:	6812      	ldr	r2, [r2, #0]
 80089d6:	68f9      	ldr	r1, [r7, #12]
 80089d8:	430b      	orrs	r3, r1
 80089da:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 80089de:	f8c2 3104 	str.w	r3, [r2, #260]	@ 0x104

  /*------------------------ DMACRCR Configuration --------------------*/
  dmaregval = (((uint32_t)dmaconf->FlushRxPacket  << 31) |
 80089e2:	683b      	ldr	r3, [r7, #0]
 80089e4:	7f1b      	ldrb	r3, [r3, #28]
 80089e6:	07da      	lsls	r2, r3, #31
               dmaconf->RxDMABurstLength);
 80089e8:	683b      	ldr	r3, [r7, #0]
 80089ea:	699b      	ldr	r3, [r3, #24]
  dmaregval = (((uint32_t)dmaconf->FlushRxPacket  << 31) |
 80089ec:	4313      	orrs	r3, r2
 80089ee:	60fb      	str	r3, [r7, #12]

  /* Write to DMACRCR */
  MODIFY_REG(heth->Instance->DMACRCR, ETH_DMACRCR_MASK, dmaregval);
 80089f0:	687b      	ldr	r3, [r7, #4]
 80089f2:	681b      	ldr	r3, [r3, #0]
 80089f4:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 80089f8:	f8d3 2108 	ldr.w	r2, [r3, #264]	@ 0x108
 80089fc:	4b0b      	ldr	r3, [pc, #44]	@ (8008a2c <ETH_SetDMAConfig+0x108>)
 80089fe:	4013      	ands	r3, r2
 8008a00:	687a      	ldr	r2, [r7, #4]
 8008a02:	6812      	ldr	r2, [r2, #0]
 8008a04:	68f9      	ldr	r1, [r7, #12]
 8008a06:	430b      	orrs	r3, r1
 8008a08:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 8008a0c:	f8c2 3108 	str.w	r3, [r2, #264]	@ 0x108
}
 8008a10:	bf00      	nop
 8008a12:	3714      	adds	r7, #20
 8008a14:	46bd      	mov	sp, r7
 8008a16:	f85d 7b04 	ldr.w	r7, [sp], #4
 8008a1a:	4770      	bx	lr
 8008a1c:	ffff87fd 	.word	0xffff87fd
 8008a20:	ffff2ffe 	.word	0xffff2ffe
 8008a24:	fffec000 	.word	0xfffec000
 8008a28:	ffc0efef 	.word	0xffc0efef
 8008a2c:	7fc0ffff 	.word	0x7fc0ffff

08008a30 <ETH_MACDMAConfig>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval HAL status
  */
static void ETH_MACDMAConfig(ETH_HandleTypeDef *heth)
{
 8008a30:	b580      	push	{r7, lr}
 8008a32:	b0a4      	sub	sp, #144	@ 0x90
 8008a34:	af00      	add	r7, sp, #0
 8008a36:	6078      	str	r0, [r7, #4]
  ETH_MACConfigTypeDef macDefaultConf;
  ETH_DMAConfigTypeDef dmaDefaultConf;

  /*--------------- ETHERNET MAC registers default Configuration --------------*/
  macDefaultConf.AutomaticPadCRCStrip = ENABLE;
 8008a38:	2301      	movs	r3, #1
 8008a3a:	f887 303b 	strb.w	r3, [r7, #59]	@ 0x3b
  macDefaultConf.BackOffLimit = ETH_BACKOFFLIMIT_10;
 8008a3e:	2300      	movs	r3, #0
 8008a40:	653b      	str	r3, [r7, #80]	@ 0x50
  macDefaultConf.CarrierSenseBeforeTransmit = DISABLE;
 8008a42:	2300      	movs	r3, #0
 8008a44:	f887 3049 	strb.w	r3, [r7, #73]	@ 0x49
  macDefaultConf.CarrierSenseDuringTransmit = DISABLE;
 8008a48:	2300      	movs	r3, #0
 8008a4a:	f887 304b 	strb.w	r3, [r7, #75]	@ 0x4b
  macDefaultConf.ChecksumOffload = ENABLE;
 8008a4e:	2301      	movs	r3, #1
 8008a50:	f887 3030 	strb.w	r3, [r7, #48]	@ 0x30
  macDefaultConf.CRCCheckingRxPackets = ENABLE;
 8008a54:	2301      	movs	r3, #1
 8008a56:	f887 305e 	strb.w	r3, [r7, #94]	@ 0x5e
  macDefaultConf.CRCStripTypePacket = ENABLE;
 8008a5a:	2301      	movs	r3, #1
 8008a5c:	f887 303a 	strb.w	r3, [r7, #58]	@ 0x3a
  macDefaultConf.DeferralCheck = DISABLE;
 8008a60:	2300      	movs	r3, #0
 8008a62:	f887 3054 	strb.w	r3, [r7, #84]	@ 0x54
  macDefaultConf.DropTCPIPChecksumErrorPacket = ENABLE;
 8008a66:	2301      	movs	r3, #1
 8008a68:	f887 308c 	strb.w	r3, [r7, #140]	@ 0x8c
  macDefaultConf.DuplexMode = ETH_FULLDUPLEX_MODE;
 8008a6c:	f44f 5300 	mov.w	r3, #8192	@ 0x2000
 8008a70:	647b      	str	r3, [r7, #68]	@ 0x44
  macDefaultConf.ExtendedInterPacketGap = DISABLE;
 8008a72:	2300      	movs	r3, #0
 8008a74:	f887 3064 	strb.w	r3, [r7, #100]	@ 0x64
  macDefaultConf.ExtendedInterPacketGapVal = 0x0U;
 8008a78:	2300      	movs	r3, #0
 8008a7a:	66bb      	str	r3, [r7, #104]	@ 0x68
  macDefaultConf.ForwardRxErrorPacket = DISABLE;
 8008a7c:	2300      	movs	r3, #0
 8008a7e:	f887 308d 	strb.w	r3, [r7, #141]	@ 0x8d
  macDefaultConf.ForwardRxUndersizedGoodPacket = DISABLE;
 8008a82:	2300      	movs	r3, #0
 8008a84:	f887 308e 	strb.w	r3, [r7, #142]	@ 0x8e
  macDefaultConf.GiantPacketSizeLimit = 0x618U;
 8008a88:	f44f 63c3 	mov.w	r3, #1560	@ 0x618
 8008a8c:	663b      	str	r3, [r7, #96]	@ 0x60
  macDefaultConf.GiantPacketSizeLimitControl = DISABLE;
 8008a8e:	2300      	movs	r3, #0
 8008a90:	f887 3038 	strb.w	r3, [r7, #56]	@ 0x38
  macDefaultConf.InterPacketGapVal = ETH_INTERPACKETGAP_96BIT;
 8008a94:	2300      	movs	r3, #0
 8008a96:	637b      	str	r3, [r7, #52]	@ 0x34
  macDefaultConf.Jabber = ENABLE;
 8008a98:	2301      	movs	r3, #1
 8008a9a:	f887 303d 	strb.w	r3, [r7, #61]	@ 0x3d
  macDefaultConf.JumboPacket = DISABLE;
 8008a9e:	2300      	movs	r3, #0
 8008aa0:	f887 303e 	strb.w	r3, [r7, #62]	@ 0x3e
  macDefaultConf.LoopbackMode = DISABLE;
 8008aa4:	2300      	movs	r3, #0
 8008aa6:	f887 3048 	strb.w	r3, [r7, #72]	@ 0x48
  macDefaultConf.PauseLowThreshold = ETH_PAUSELOWTHRESHOLD_MINUS_4;
 8008aaa:	2300      	movs	r3, #0
 8008aac:	67fb      	str	r3, [r7, #124]	@ 0x7c
  macDefaultConf.PauseTime = 0x0U;
 8008aae:	2300      	movs	r3, #0
 8008ab0:	677b      	str	r3, [r7, #116]	@ 0x74
  macDefaultConf.PreambleLength = ETH_PREAMBLELENGTH_7;
 8008ab2:	2300      	movs	r3, #0
 8008ab4:	65bb      	str	r3, [r7, #88]	@ 0x58
  macDefaultConf.ProgrammableWatchdog = DISABLE;
 8008ab6:	2300      	movs	r3, #0
 8008ab8:	f887 306c 	strb.w	r3, [r7, #108]	@ 0x6c
  macDefaultConf.ReceiveFlowControl = DISABLE;
 8008abc:	2300      	movs	r3, #0
 8008abe:	f887 3082 	strb.w	r3, [r7, #130]	@ 0x82
  macDefaultConf.ReceiveOwn = ENABLE;
 8008ac2:	2301      	movs	r3, #1
 8008ac4:	f887 304a 	strb.w	r3, [r7, #74]	@ 0x4a
  macDefaultConf.ReceiveQueueMode = ETH_RECEIVESTOREFORWARD;
 8008ac8:	2320      	movs	r3, #32
 8008aca:	f8c7 3088 	str.w	r3, [r7, #136]	@ 0x88
  macDefaultConf.RetryTransmission = ENABLE;
 8008ace:	2301      	movs	r3, #1
 8008ad0:	f887 304c 	strb.w	r3, [r7, #76]	@ 0x4c
  macDefaultConf.SlowProtocolDetect = DISABLE;
 8008ad4:	2300      	movs	r3, #0
 8008ad6:	f887 305d 	strb.w	r3, [r7, #93]	@ 0x5d
  macDefaultConf.SourceAddrControl = ETH_SOURCEADDRESS_REPLACE_ADDR0;
 8008ada:	f04f 5340 	mov.w	r3, #805306368	@ 0x30000000
 8008ade:	62fb      	str	r3, [r7, #44]	@ 0x2c
  macDefaultConf.Speed = ETH_SPEED_100M;
 8008ae0:	f44f 4380 	mov.w	r3, #16384	@ 0x4000
 8008ae4:	643b      	str	r3, [r7, #64]	@ 0x40
  macDefaultConf.Support2KPacket = DISABLE;
 8008ae6:	2300      	movs	r3, #0
 8008ae8:	f887 3039 	strb.w	r3, [r7, #57]	@ 0x39
  macDefaultConf.TransmitQueueMode = ETH_TRANSMITSTOREFORWARD;
 8008aec:	2302      	movs	r3, #2
 8008aee:	f8c7 3084 	str.w	r3, [r7, #132]	@ 0x84
  macDefaultConf.TransmitFlowControl = DISABLE;
 8008af2:	2300      	movs	r3, #0
 8008af4:	f887 3080 	strb.w	r3, [r7, #128]	@ 0x80
  macDefaultConf.UnicastPausePacketDetect = DISABLE;
 8008af8:	2300      	movs	r3, #0
 8008afa:	f887 3081 	strb.w	r3, [r7, #129]	@ 0x81
  macDefaultConf.UnicastSlowProtocolPacketDetect = DISABLE;
 8008afe:	2300      	movs	r3, #0
 8008b00:	f887 305c 	strb.w	r3, [r7, #92]	@ 0x5c
  macDefaultConf.Watchdog = ENABLE;
 8008b04:	2301      	movs	r3, #1
 8008b06:	f887 303c 	strb.w	r3, [r7, #60]	@ 0x3c
  macDefaultConf.WatchdogTimeout =  ETH_MACWTR_WTO_2KB;
 8008b0a:	2300      	movs	r3, #0
 8008b0c:	673b      	str	r3, [r7, #112]	@ 0x70
  macDefaultConf.ZeroQuantaPause = ENABLE;
 8008b0e:	2301      	movs	r3, #1
 8008b10:	f887 3078 	strb.w	r3, [r7, #120]	@ 0x78

  /* MAC default configuration */
  ETH_SetMACConfig(heth, &macDefaultConf);
 8008b14:	f107 032c 	add.w	r3, r7, #44	@ 0x2c
 8008b18:	4619      	mov	r1, r3
 8008b1a:	6878      	ldr	r0, [r7, #4]
 8008b1c:	f7ff fde6 	bl	80086ec <ETH_SetMACConfig>

  /*--------------- ETHERNET DMA registers default Configuration --------------*/
  dmaDefaultConf.AddressAlignedBeats = ENABLE;
 8008b20:	2301      	movs	r3, #1
 8008b22:	733b      	strb	r3, [r7, #12]
  dmaDefaultConf.BurstMode = ETH_BURSTLENGTH_FIXED;
 8008b24:	2301      	movs	r3, #1
 8008b26:	613b      	str	r3, [r7, #16]
  dmaDefaultConf.DMAArbitration = ETH_DMAARBITRATION_RX1_TX1;
 8008b28:	2300      	movs	r3, #0
 8008b2a:	60bb      	str	r3, [r7, #8]
  dmaDefaultConf.FlushRxPacket = DISABLE;
 8008b2c:	2300      	movs	r3, #0
 8008b2e:	f887 3024 	strb.w	r3, [r7, #36]	@ 0x24
  dmaDefaultConf.PBLx8Mode = DISABLE;
 8008b32:	2300      	movs	r3, #0
 8008b34:	757b      	strb	r3, [r7, #21]
  dmaDefaultConf.RebuildINCRxBurst = DISABLE;
 8008b36:	2300      	movs	r3, #0
 8008b38:	753b      	strb	r3, [r7, #20]
  dmaDefaultConf.RxDMABurstLength = ETH_RXDMABURSTLENGTH_32BEAT;
 8008b3a:	f44f 1300 	mov.w	r3, #2097152	@ 0x200000
 8008b3e:	623b      	str	r3, [r7, #32]
  dmaDefaultConf.SecondPacketOperate = DISABLE;
 8008b40:	2300      	movs	r3, #0
 8008b42:	773b      	strb	r3, [r7, #28]
  dmaDefaultConf.TxDMABurstLength = ETH_TXDMABURSTLENGTH_32BEAT;
 8008b44:	f44f 1300 	mov.w	r3, #2097152	@ 0x200000
 8008b48:	61bb      	str	r3, [r7, #24]
  dmaDefaultConf.TCPSegmentation = DISABLE;
 8008b4a:	2300      	movs	r3, #0
 8008b4c:	f887 3025 	strb.w	r3, [r7, #37]	@ 0x25
  dmaDefaultConf.MaximumSegmentSize = ETH_SEGMENT_SIZE_DEFAULT;
 8008b50:	f44f 7306 	mov.w	r3, #536	@ 0x218
 8008b54:	62bb      	str	r3, [r7, #40]	@ 0x28

  /* DMA default configuration */
  ETH_SetDMAConfig(heth, &dmaDefaultConf);
 8008b56:	f107 0308 	add.w	r3, r7, #8
 8008b5a:	4619      	mov	r1, r3
 8008b5c:	6878      	ldr	r0, [r7, #4]
 8008b5e:	f7ff fee1 	bl	8008924 <ETH_SetDMAConfig>
}
 8008b62:	bf00      	nop
 8008b64:	3790      	adds	r7, #144	@ 0x90
 8008b66:	46bd      	mov	sp, r7
 8008b68:	bd80      	pop	{r7, pc}

08008b6a <ETH_DMATxDescListInit>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval None
  */
static void ETH_DMATxDescListInit(ETH_HandleTypeDef *heth)
{
 8008b6a:	b480      	push	{r7}
 8008b6c:	b085      	sub	sp, #20
 8008b6e:	af00      	add	r7, sp, #0
 8008b70:	6078      	str	r0, [r7, #4]
  ETH_DMADescTypeDef *dmatxdesc;
  uint32_t i;

  /* Fill each DMATxDesc descriptor with the right values */
  for (i = 0; i < (uint32_t)ETH_TX_DESC_CNT; i++)
 8008b72:	2300      	movs	r3, #0
 8008b74:	60fb      	str	r3, [r7, #12]
 8008b76:	e01d      	b.n	8008bb4 <ETH_DMATxDescListInit+0x4a>
  {
    dmatxdesc = heth->Init.TxDesc + i;
 8008b78:	687b      	ldr	r3, [r7, #4]
 8008b7a:	68d9      	ldr	r1, [r3, #12]
 8008b7c:	68fa      	ldr	r2, [r7, #12]
 8008b7e:	4613      	mov	r3, r2
 8008b80:	005b      	lsls	r3, r3, #1
 8008b82:	4413      	add	r3, r2
 8008b84:	00db      	lsls	r3, r3, #3
 8008b86:	440b      	add	r3, r1
 8008b88:	60bb      	str	r3, [r7, #8]

    WRITE_REG(dmatxdesc->DESC0, 0x0U);
 8008b8a:	68bb      	ldr	r3, [r7, #8]
 8008b8c:	2200      	movs	r2, #0
 8008b8e:	601a      	str	r2, [r3, #0]
    WRITE_REG(dmatxdesc->DESC1, 0x0U);
 8008b90:	68bb      	ldr	r3, [r7, #8]
 8008b92:	2200      	movs	r2, #0
 8008b94:	605a      	str	r2, [r3, #4]
    WRITE_REG(dmatxdesc->DESC2, 0x0U);
 8008b96:	68bb      	ldr	r3, [r7, #8]
 8008b98:	2200      	movs	r2, #0
 8008b9a:	609a      	str	r2, [r3, #8]
    WRITE_REG(dmatxdesc->DESC3, 0x0U);
 8008b9c:	68bb      	ldr	r3, [r7, #8]
 8008b9e:	2200      	movs	r2, #0
 8008ba0:	60da      	str	r2, [r3, #12]

    WRITE_REG(heth->TxDescList.TxDesc[i], (uint32_t)dmatxdesc);
 8008ba2:	68b9      	ldr	r1, [r7, #8]
 8008ba4:	687b      	ldr	r3, [r7, #4]
 8008ba6:	68fa      	ldr	r2, [r7, #12]
 8008ba8:	3206      	adds	r2, #6
 8008baa:	f843 1022 	str.w	r1, [r3, r2, lsl #2]
  for (i = 0; i < (uint32_t)ETH_TX_DESC_CNT; i++)
 8008bae:	68fb      	ldr	r3, [r7, #12]
 8008bb0:	3301      	adds	r3, #1
 8008bb2:	60fb      	str	r3, [r7, #12]
 8008bb4:	68fb      	ldr	r3, [r7, #12]
 8008bb6:	2b03      	cmp	r3, #3
 8008bb8:	d9de      	bls.n	8008b78 <ETH_DMATxDescListInit+0xe>

  }

  heth->TxDescList.CurTxDesc = 0;
 8008bba:	687b      	ldr	r3, [r7, #4]
 8008bbc:	2200      	movs	r2, #0
 8008bbe:	629a      	str	r2, [r3, #40]	@ 0x28

  /* Set Transmit Descriptor Ring Length */
  WRITE_REG(heth->Instance->DMACTDRLR, (ETH_TX_DESC_CNT - 1U));
 8008bc0:	687b      	ldr	r3, [r7, #4]
 8008bc2:	681b      	ldr	r3, [r3, #0]
 8008bc4:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8008bc8:	461a      	mov	r2, r3
 8008bca:	2303      	movs	r3, #3
 8008bcc:	f8c2 312c 	str.w	r3, [r2, #300]	@ 0x12c

  /* Set Transmit Descriptor List Address */
  WRITE_REG(heth->Instance->DMACTDLAR, (uint32_t) heth->Init.TxDesc);
 8008bd0:	687b      	ldr	r3, [r7, #4]
 8008bd2:	68da      	ldr	r2, [r3, #12]
 8008bd4:	687b      	ldr	r3, [r7, #4]
 8008bd6:	681b      	ldr	r3, [r3, #0]
 8008bd8:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8008bdc:	f8c3 2114 	str.w	r2, [r3, #276]	@ 0x114

  /* Set Transmit Descriptor Tail pointer */
  WRITE_REG(heth->Instance->DMACTDTPR, (uint32_t) heth->Init.TxDesc);
 8008be0:	687b      	ldr	r3, [r7, #4]
 8008be2:	68da      	ldr	r2, [r3, #12]
 8008be4:	687b      	ldr	r3, [r7, #4]
 8008be6:	681b      	ldr	r3, [r3, #0]
 8008be8:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8008bec:	f8c3 2120 	str.w	r2, [r3, #288]	@ 0x120
}
 8008bf0:	bf00      	nop
 8008bf2:	3714      	adds	r7, #20
 8008bf4:	46bd      	mov	sp, r7
 8008bf6:	f85d 7b04 	ldr.w	r7, [sp], #4
 8008bfa:	4770      	bx	lr

08008bfc <ETH_DMARxDescListInit>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval None
  */
static void ETH_DMARxDescListInit(ETH_HandleTypeDef *heth)
{
 8008bfc:	b480      	push	{r7}
 8008bfe:	b085      	sub	sp, #20
 8008c00:	af00      	add	r7, sp, #0
 8008c02:	6078      	str	r0, [r7, #4]
  ETH_DMADescTypeDef *dmarxdesc;
  uint32_t i;

  for (i = 0; i < (uint32_t)ETH_RX_DESC_CNT; i++)
 8008c04:	2300      	movs	r3, #0
 8008c06:	60fb      	str	r3, [r7, #12]
 8008c08:	e023      	b.n	8008c52 <ETH_DMARxDescListInit+0x56>
  {
    dmarxdesc =  heth->Init.RxDesc + i;
 8008c0a:	687b      	ldr	r3, [r7, #4]
 8008c0c:	6919      	ldr	r1, [r3, #16]
 8008c0e:	68fa      	ldr	r2, [r7, #12]
 8008c10:	4613      	mov	r3, r2
 8008c12:	005b      	lsls	r3, r3, #1
 8008c14:	4413      	add	r3, r2
 8008c16:	00db      	lsls	r3, r3, #3
 8008c18:	440b      	add	r3, r1
 8008c1a:	60bb      	str	r3, [r7, #8]

    WRITE_REG(dmarxdesc->DESC0, 0x0U);
 8008c1c:	68bb      	ldr	r3, [r7, #8]
 8008c1e:	2200      	movs	r2, #0
 8008c20:	601a      	str	r2, [r3, #0]
    WRITE_REG(dmarxdesc->DESC1, 0x0U);
 8008c22:	68bb      	ldr	r3, [r7, #8]
 8008c24:	2200      	movs	r2, #0
 8008c26:	605a      	str	r2, [r3, #4]
    WRITE_REG(dmarxdesc->DESC2, 0x0U);
 8008c28:	68bb      	ldr	r3, [r7, #8]
 8008c2a:	2200      	movs	r2, #0
 8008c2c:	609a      	str	r2, [r3, #8]
    WRITE_REG(dmarxdesc->DESC3, 0x0U);
 8008c2e:	68bb      	ldr	r3, [r7, #8]
 8008c30:	2200      	movs	r2, #0
 8008c32:	60da      	str	r2, [r3, #12]
    WRITE_REG(dmarxdesc->BackupAddr0, 0x0U);
 8008c34:	68bb      	ldr	r3, [r7, #8]
 8008c36:	2200      	movs	r2, #0
 8008c38:	611a      	str	r2, [r3, #16]
    WRITE_REG(dmarxdesc->BackupAddr1, 0x0U);
 8008c3a:	68bb      	ldr	r3, [r7, #8]
 8008c3c:	2200      	movs	r2, #0
 8008c3e:	615a      	str	r2, [r3, #20]

    /* Set Rx descritors addresses */
    WRITE_REG(heth->RxDescList.RxDesc[i], (uint32_t)dmarxdesc);
 8008c40:	68b9      	ldr	r1, [r7, #8]
 8008c42:	687b      	ldr	r3, [r7, #4]
 8008c44:	68fa      	ldr	r2, [r7, #12]
 8008c46:	3212      	adds	r2, #18
 8008c48:	f843 1022 	str.w	r1, [r3, r2, lsl #2]
  for (i = 0; i < (uint32_t)ETH_RX_DESC_CNT; i++)
 8008c4c:	68fb      	ldr	r3, [r7, #12]
 8008c4e:	3301      	adds	r3, #1
 8008c50:	60fb      	str	r3, [r7, #12]
 8008c52:	68fb      	ldr	r3, [r7, #12]
 8008c54:	2b03      	cmp	r3, #3
 8008c56:	d9d8      	bls.n	8008c0a <ETH_DMARxDescListInit+0xe>

  }

  WRITE_REG(heth->RxDescList.RxDescIdx, 0U);
 8008c58:	687b      	ldr	r3, [r7, #4]
 8008c5a:	2200      	movs	r2, #0
 8008c5c:	65da      	str	r2, [r3, #92]	@ 0x5c
  WRITE_REG(heth->RxDescList.RxDescCnt, 0U);
 8008c5e:	687b      	ldr	r3, [r7, #4]
 8008c60:	2200      	movs	r2, #0
 8008c62:	661a      	str	r2, [r3, #96]	@ 0x60
  WRITE_REG(heth->RxDescList.RxBuildDescIdx, 0U);
 8008c64:	687b      	ldr	r3, [r7, #4]
 8008c66:	2200      	movs	r2, #0
 8008c68:	669a      	str	r2, [r3, #104]	@ 0x68
  WRITE_REG(heth->RxDescList.RxBuildDescCnt, 0U);
 8008c6a:	687b      	ldr	r3, [r7, #4]
 8008c6c:	2200      	movs	r2, #0
 8008c6e:	66da      	str	r2, [r3, #108]	@ 0x6c
  WRITE_REG(heth->RxDescList.ItMode, 0U);
 8008c70:	687b      	ldr	r3, [r7, #4]
 8008c72:	2200      	movs	r2, #0
 8008c74:	659a      	str	r2, [r3, #88]	@ 0x58

  /* Set Receive Descriptor Ring Length */
  WRITE_REG(heth->Instance->DMACRDRLR, ((uint32_t)(ETH_RX_DESC_CNT - 1U)));
 8008c76:	687b      	ldr	r3, [r7, #4]
 8008c78:	681b      	ldr	r3, [r3, #0]
 8008c7a:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8008c7e:	461a      	mov	r2, r3
 8008c80:	2303      	movs	r3, #3
 8008c82:	f8c2 3130 	str.w	r3, [r2, #304]	@ 0x130

  /* Set Receive Descriptor List Address */
  WRITE_REG(heth->Instance->DMACRDLAR, (uint32_t) heth->Init.RxDesc);
 8008c86:	687b      	ldr	r3, [r7, #4]
 8008c88:	691a      	ldr	r2, [r3, #16]
 8008c8a:	687b      	ldr	r3, [r7, #4]
 8008c8c:	681b      	ldr	r3, [r3, #0]
 8008c8e:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8008c92:	f8c3 211c 	str.w	r2, [r3, #284]	@ 0x11c

  /* Set Receive Descriptor Tail pointer Address */
  WRITE_REG(heth->Instance->DMACRDTPR, ((uint32_t)(heth->Init.RxDesc + (uint32_t)(ETH_RX_DESC_CNT - 1U))));
 8008c96:	687b      	ldr	r3, [r7, #4]
 8008c98:	691b      	ldr	r3, [r3, #16]
 8008c9a:	f103 0248 	add.w	r2, r3, #72	@ 0x48
 8008c9e:	687b      	ldr	r3, [r7, #4]
 8008ca0:	681b      	ldr	r3, [r3, #0]
 8008ca2:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8008ca6:	f8c3 2128 	str.w	r2, [r3, #296]	@ 0x128
}
 8008caa:	bf00      	nop
 8008cac:	3714      	adds	r7, #20
 8008cae:	46bd      	mov	sp, r7
 8008cb0:	f85d 7b04 	ldr.w	r7, [sp], #4
 8008cb4:	4770      	bx	lr
	...

08008cb8 <ETH_Prepare_Tx_Descriptors>:
  * @param  ItMode: Enable or disable Tx EOT interrept
  * @retval Status
  */
static uint32_t ETH_Prepare_Tx_Descriptors(ETH_HandleTypeDef *heth, const ETH_TxPacketConfigTypeDef *pTxConfig,
                                           uint32_t ItMode)
{
 8008cb8:	b480      	push	{r7}
 8008cba:	b091      	sub	sp, #68	@ 0x44
 8008cbc:	af00      	add	r7, sp, #0
 8008cbe:	60f8      	str	r0, [r7, #12]
 8008cc0:	60b9      	str	r1, [r7, #8]
 8008cc2:	607a      	str	r2, [r7, #4]
  ETH_TxDescListTypeDef *dmatxdesclist = &heth->TxDescList;
 8008cc4:	68fb      	ldr	r3, [r7, #12]
 8008cc6:	3318      	adds	r3, #24
 8008cc8:	627b      	str	r3, [r7, #36]	@ 0x24
  uint32_t descidx = dmatxdesclist->CurTxDesc;
 8008cca:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8008ccc:	691b      	ldr	r3, [r3, #16]
 8008cce:	63fb      	str	r3, [r7, #60]	@ 0x3c
  uint32_t firstdescidx = dmatxdesclist->CurTxDesc;
 8008cd0:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8008cd2:	691b      	ldr	r3, [r3, #16]
 8008cd4:	623b      	str	r3, [r7, #32]
  uint32_t idx;
  uint32_t descnbr = 0;
 8008cd6:	2300      	movs	r3, #0
 8008cd8:	637b      	str	r3, [r7, #52]	@ 0x34
  ETH_DMADescTypeDef *dmatxdesc = (ETH_DMADescTypeDef *)dmatxdesclist->TxDesc[descidx];
 8008cda:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8008cdc:	6bfa      	ldr	r2, [r7, #60]	@ 0x3c
 8008cde:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
 8008ce2:	633b      	str	r3, [r7, #48]	@ 0x30

  ETH_BufferTypeDef  *txbuffer = pTxConfig->TxBuffer;
 8008ce4:	68bb      	ldr	r3, [r7, #8]
 8008ce6:	689b      	ldr	r3, [r3, #8]
 8008ce8:	62fb      	str	r3, [r7, #44]	@ 0x2c
  uint32_t           bd_count = 0;
 8008cea:	2300      	movs	r3, #0
 8008cec:	62bb      	str	r3, [r7, #40]	@ 0x28
  uint32_t primask_bit;

  /* Current Tx Descriptor Owned by DMA: cannot be used by the application  */
  if ((READ_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCWBF_OWN) == ETH_DMATXNDESCWBF_OWN)
 8008cee:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8008cf0:	68db      	ldr	r3, [r3, #12]
 8008cf2:	f003 4300 	and.w	r3, r3, #2147483648	@ 0x80000000
 8008cf6:	f1b3 4f00 	cmp.w	r3, #2147483648	@ 0x80000000
 8008cfa:	d007      	beq.n	8008d0c <ETH_Prepare_Tx_Descriptors+0x54>
      || (dmatxdesclist->PacketAddress[descidx] != NULL))
 8008cfc:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8008cfe:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 8008d00:	3304      	adds	r3, #4
 8008d02:	009b      	lsls	r3, r3, #2
 8008d04:	4413      	add	r3, r2
 8008d06:	685b      	ldr	r3, [r3, #4]
 8008d08:	2b00      	cmp	r3, #0
 8008d0a:	d001      	beq.n	8008d10 <ETH_Prepare_Tx_Descriptors+0x58>
  {
    return HAL_ETH_ERROR_BUSY;
 8008d0c:	2302      	movs	r3, #2
 8008d0e:	e266      	b.n	80091de <ETH_Prepare_Tx_Descriptors+0x526>

  /***************************************************************************/
  /*****************    Context descriptor configuration (Optional) **********/
  /***************************************************************************/
  /* If VLAN tag is enabled for this packet */
  if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_VLANTAG) != (uint32_t)RESET)
 8008d10:	68bb      	ldr	r3, [r7, #8]
 8008d12:	681b      	ldr	r3, [r3, #0]
 8008d14:	f003 0304 	and.w	r3, r3, #4
 8008d18:	2b00      	cmp	r3, #0
 8008d1a:	d044      	beq.n	8008da6 <ETH_Prepare_Tx_Descriptors+0xee>
  {
    /* Set vlan tag value */
    MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXCDESC_VT, pTxConfig->VlanTag);
 8008d1c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8008d1e:	68da      	ldr	r2, [r3, #12]
 8008d20:	4b75      	ldr	r3, [pc, #468]	@ (8008ef8 <ETH_Prepare_Tx_Descriptors+0x240>)
 8008d22:	4013      	ands	r3, r2
 8008d24:	68ba      	ldr	r2, [r7, #8]
 8008d26:	6a52      	ldr	r2, [r2, #36]	@ 0x24
 8008d28:	431a      	orrs	r2, r3
 8008d2a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8008d2c:	60da      	str	r2, [r3, #12]
    /* Set vlan tag valid bit */
    SET_BIT(dmatxdesc->DESC3, ETH_DMATXCDESC_VLTV);
 8008d2e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8008d30:	68db      	ldr	r3, [r3, #12]
 8008d32:	f443 3280 	orr.w	r2, r3, #65536	@ 0x10000
 8008d36:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8008d38:	60da      	str	r2, [r3, #12]
    /* Set the descriptor as the vlan input source */
    SET_BIT(heth->Instance->MACVIR, ETH_MACVIR_VLTI);
 8008d3a:	68fb      	ldr	r3, [r7, #12]
 8008d3c:	681b      	ldr	r3, [r3, #0]
 8008d3e:	6e1a      	ldr	r2, [r3, #96]	@ 0x60
 8008d40:	68fb      	ldr	r3, [r7, #12]
 8008d42:	681b      	ldr	r3, [r3, #0]
 8008d44:	f442 1280 	orr.w	r2, r2, #1048576	@ 0x100000
 8008d48:	661a      	str	r2, [r3, #96]	@ 0x60

    /* if inner VLAN is enabled */
    if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_INNERVLANTAG) != (uint32_t)RESET)
 8008d4a:	68bb      	ldr	r3, [r7, #8]
 8008d4c:	681b      	ldr	r3, [r3, #0]
 8008d4e:	f003 0308 	and.w	r3, r3, #8
 8008d52:	2b00      	cmp	r3, #0
 8008d54:	d027      	beq.n	8008da6 <ETH_Prepare_Tx_Descriptors+0xee>
    {
      /* Set inner vlan tag value */
      MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXCDESC_IVT, (pTxConfig->InnerVlanTag << 16));
 8008d56:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8008d58:	689b      	ldr	r3, [r3, #8]
 8008d5a:	b29a      	uxth	r2, r3
 8008d5c:	68bb      	ldr	r3, [r7, #8]
 8008d5e:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8008d60:	041b      	lsls	r3, r3, #16
 8008d62:	431a      	orrs	r2, r3
 8008d64:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8008d66:	609a      	str	r2, [r3, #8]
      /* Set inner vlan tag valid bit */
      SET_BIT(dmatxdesc->DESC3, ETH_DMATXCDESC_IVLTV);
 8008d68:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8008d6a:	68db      	ldr	r3, [r3, #12]
 8008d6c:	f443 3200 	orr.w	r2, r3, #131072	@ 0x20000
 8008d70:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8008d72:	60da      	str	r2, [r3, #12]

      /* Set Vlan Tag control */
      MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXCDESC_IVTIR, pTxConfig->InnerVlanCtrl);
 8008d74:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8008d76:	68db      	ldr	r3, [r3, #12]
 8008d78:	f423 2240 	bic.w	r2, r3, #786432	@ 0xc0000
 8008d7c:	68bb      	ldr	r3, [r7, #8]
 8008d7e:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8008d80:	431a      	orrs	r2, r3
 8008d82:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8008d84:	60da      	str	r2, [r3, #12]

      /* Set the descriptor as the inner vlan input source */
      SET_BIT(heth->Instance->MACIVIR, ETH_MACIVIR_VLTI);
 8008d86:	68fb      	ldr	r3, [r7, #12]
 8008d88:	681b      	ldr	r3, [r3, #0]
 8008d8a:	6e5a      	ldr	r2, [r3, #100]	@ 0x64
 8008d8c:	68fb      	ldr	r3, [r7, #12]
 8008d8e:	681b      	ldr	r3, [r3, #0]
 8008d90:	f442 1280 	orr.w	r2, r2, #1048576	@ 0x100000
 8008d94:	665a      	str	r2, [r3, #100]	@ 0x64
      /* Enable double VLAN processing */
      SET_BIT(heth->Instance->MACVTR, ETH_MACVTR_EDVLP);
 8008d96:	68fb      	ldr	r3, [r7, #12]
 8008d98:	681b      	ldr	r3, [r3, #0]
 8008d9a:	6d1a      	ldr	r2, [r3, #80]	@ 0x50
 8008d9c:	68fb      	ldr	r3, [r7, #12]
 8008d9e:	681b      	ldr	r3, [r3, #0]
 8008da0:	f042 6280 	orr.w	r2, r2, #67108864	@ 0x4000000
 8008da4:	651a      	str	r2, [r3, #80]	@ 0x50
    }
  }

  /* if tcp segmentation is enabled for this packet */
  if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_TSO) != (uint32_t)RESET)
 8008da6:	68bb      	ldr	r3, [r7, #8]
 8008da8:	681b      	ldr	r3, [r3, #0]
 8008daa:	f003 0310 	and.w	r3, r3, #16
 8008dae:	2b00      	cmp	r3, #0
 8008db0:	d00e      	beq.n	8008dd0 <ETH_Prepare_Tx_Descriptors+0x118>
  {
    /* Set MSS value */
    MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXCDESC_MSS, pTxConfig->MaxSegmentSize);
 8008db2:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8008db4:	689a      	ldr	r2, [r3, #8]
 8008db6:	4b51      	ldr	r3, [pc, #324]	@ (8008efc <ETH_Prepare_Tx_Descriptors+0x244>)
 8008db8:	4013      	ands	r3, r2
 8008dba:	68ba      	ldr	r2, [r7, #8]
 8008dbc:	6992      	ldr	r2, [r2, #24]
 8008dbe:	431a      	orrs	r2, r3
 8008dc0:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8008dc2:	609a      	str	r2, [r3, #8]
    /* Set MSS valid bit */
    SET_BIT(dmatxdesc->DESC3, ETH_DMATXCDESC_TCMSSV);
 8008dc4:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8008dc6:	68db      	ldr	r3, [r3, #12]
 8008dc8:	f043 6280 	orr.w	r2, r3, #67108864	@ 0x4000000
 8008dcc:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8008dce:	60da      	str	r2, [r3, #12]
  }

  if ((READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_VLANTAG) != (uint32_t)RESET)
 8008dd0:	68bb      	ldr	r3, [r7, #8]
 8008dd2:	681b      	ldr	r3, [r3, #0]
 8008dd4:	f003 0304 	and.w	r3, r3, #4
 8008dd8:	2b00      	cmp	r3, #0
 8008dda:	d105      	bne.n	8008de8 <ETH_Prepare_Tx_Descriptors+0x130>
      || (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_TSO) != (uint32_t)RESET))
 8008ddc:	68bb      	ldr	r3, [r7, #8]
 8008dde:	681b      	ldr	r3, [r3, #0]
 8008de0:	f003 0310 	and.w	r3, r3, #16
 8008de4:	2b00      	cmp	r3, #0
 8008de6:	d036      	beq.n	8008e56 <ETH_Prepare_Tx_Descriptors+0x19e>
  {
    /* Set as context descriptor */
    SET_BIT(dmatxdesc->DESC3, ETH_DMATXCDESC_CTXT);
 8008de8:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8008dea:	68db      	ldr	r3, [r3, #12]
 8008dec:	f043 4280 	orr.w	r2, r3, #1073741824	@ 0x40000000
 8008df0:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8008df2:	60da      	str	r2, [r3, #12]
  __ASM volatile ("dmb 0xF":::"memory");
 8008df4:	f3bf 8f5f 	dmb	sy
}
 8008df8:	bf00      	nop
    /* Ensure rest of descriptor is written to RAM before the OWN bit */
    __DMB();
    /* Set own bit */
    SET_BIT(dmatxdesc->DESC3, ETH_DMATXCDESC_OWN);
 8008dfa:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8008dfc:	68db      	ldr	r3, [r3, #12]
 8008dfe:	f043 4200 	orr.w	r2, r3, #2147483648	@ 0x80000000
 8008e02:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8008e04:	60da      	str	r2, [r3, #12]
    /* Increment current tx descriptor index */
    INCR_TX_DESC_INDEX(descidx, 1U);
 8008e06:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 8008e08:	3301      	adds	r3, #1
 8008e0a:	63fb      	str	r3, [r7, #60]	@ 0x3c
 8008e0c:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 8008e0e:	2b03      	cmp	r3, #3
 8008e10:	d902      	bls.n	8008e18 <ETH_Prepare_Tx_Descriptors+0x160>
 8008e12:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 8008e14:	3b04      	subs	r3, #4
 8008e16:	63fb      	str	r3, [r7, #60]	@ 0x3c
    /* Get current descriptor address */
    dmatxdesc = (ETH_DMADescTypeDef *)dmatxdesclist->TxDesc[descidx];
 8008e18:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8008e1a:	6bfa      	ldr	r2, [r7, #60]	@ 0x3c
 8008e1c:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
 8008e20:	633b      	str	r3, [r7, #48]	@ 0x30

    descnbr += 1U;
 8008e22:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8008e24:	3301      	adds	r3, #1
 8008e26:	637b      	str	r3, [r7, #52]	@ 0x34

    /* Current Tx Descriptor Owned by DMA: cannot be used by the application  */
    if (READ_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCWBF_OWN) == ETH_DMATXNDESCWBF_OWN)
 8008e28:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8008e2a:	68db      	ldr	r3, [r3, #12]
 8008e2c:	f003 4300 	and.w	r3, r3, #2147483648	@ 0x80000000
 8008e30:	f1b3 4f00 	cmp.w	r3, #2147483648	@ 0x80000000
 8008e34:	d10f      	bne.n	8008e56 <ETH_Prepare_Tx_Descriptors+0x19e>
    {
      dmatxdesc = (ETH_DMADescTypeDef *)dmatxdesclist->TxDesc[firstdescidx];
 8008e36:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8008e38:	6a3a      	ldr	r2, [r7, #32]
 8008e3a:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
 8008e3e:	633b      	str	r3, [r7, #48]	@ 0x30
  __ASM volatile ("dmb 0xF":::"memory");
 8008e40:	f3bf 8f5f 	dmb	sy
}
 8008e44:	bf00      	nop
      /* Ensure rest of descriptor is written to RAM before the OWN bit */
      __DMB();
      /* Clear own bit */
      CLEAR_BIT(dmatxdesc->DESC3, ETH_DMATXCDESC_OWN);
 8008e46:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8008e48:	68db      	ldr	r3, [r3, #12]
 8008e4a:	f023 4200 	bic.w	r2, r3, #2147483648	@ 0x80000000
 8008e4e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8008e50:	60da      	str	r2, [r3, #12]

      return HAL_ETH_ERROR_BUSY;
 8008e52:	2302      	movs	r3, #2
 8008e54:	e1c3      	b.n	80091de <ETH_Prepare_Tx_Descriptors+0x526>

  /***************************************************************************/
  /*****************    Normal descriptors configuration     *****************/
  /***************************************************************************/

  descnbr += 1U;
 8008e56:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8008e58:	3301      	adds	r3, #1
 8008e5a:	637b      	str	r3, [r7, #52]	@ 0x34

  /* Set header or buffer 1 address */
  WRITE_REG(dmatxdesc->DESC0, (uint32_t)txbuffer->buffer);
 8008e5c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8008e5e:	681b      	ldr	r3, [r3, #0]
 8008e60:	461a      	mov	r2, r3
 8008e62:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8008e64:	601a      	str	r2, [r3, #0]
  /* Set header or buffer 1 Length */
  MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B1L, txbuffer->len);
 8008e66:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8008e68:	689a      	ldr	r2, [r3, #8]
 8008e6a:	4b24      	ldr	r3, [pc, #144]	@ (8008efc <ETH_Prepare_Tx_Descriptors+0x244>)
 8008e6c:	4013      	ands	r3, r2
 8008e6e:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 8008e70:	6852      	ldr	r2, [r2, #4]
 8008e72:	431a      	orrs	r2, r3
 8008e74:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8008e76:	609a      	str	r2, [r3, #8]

  if (txbuffer->next != NULL)
 8008e78:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8008e7a:	689b      	ldr	r3, [r3, #8]
 8008e7c:	2b00      	cmp	r3, #0
 8008e7e:	d012      	beq.n	8008ea6 <ETH_Prepare_Tx_Descriptors+0x1ee>
  {
    txbuffer = txbuffer->next;
 8008e80:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8008e82:	689b      	ldr	r3, [r3, #8]
 8008e84:	62fb      	str	r3, [r7, #44]	@ 0x2c
    /* Set buffer 2 address */
    WRITE_REG(dmatxdesc->DESC1, (uint32_t)txbuffer->buffer);
 8008e86:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8008e88:	681b      	ldr	r3, [r3, #0]
 8008e8a:	461a      	mov	r2, r3
 8008e8c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8008e8e:	605a      	str	r2, [r3, #4]
    /* Set buffer 2 Length */
    MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B2L, (txbuffer->len << 16));
 8008e90:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8008e92:	689a      	ldr	r2, [r3, #8]
 8008e94:	4b1a      	ldr	r3, [pc, #104]	@ (8008f00 <ETH_Prepare_Tx_Descriptors+0x248>)
 8008e96:	4013      	ands	r3, r2
 8008e98:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 8008e9a:	6852      	ldr	r2, [r2, #4]
 8008e9c:	0412      	lsls	r2, r2, #16
 8008e9e:	431a      	orrs	r2, r3
 8008ea0:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8008ea2:	609a      	str	r2, [r3, #8]
 8008ea4:	e008      	b.n	8008eb8 <ETH_Prepare_Tx_Descriptors+0x200>
  }
  else
  {
    WRITE_REG(dmatxdesc->DESC1, 0x0U);
 8008ea6:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8008ea8:	2200      	movs	r2, #0
 8008eaa:	605a      	str	r2, [r3, #4]
    /* Set buffer 2 Length */
    MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B2L, 0x0U);
 8008eac:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8008eae:	689a      	ldr	r2, [r3, #8]
 8008eb0:	4b13      	ldr	r3, [pc, #76]	@ (8008f00 <ETH_Prepare_Tx_Descriptors+0x248>)
 8008eb2:	4013      	ands	r3, r2
 8008eb4:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 8008eb6:	6093      	str	r3, [r2, #8]
  }

  if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_TSO) != (uint32_t)RESET)
 8008eb8:	68bb      	ldr	r3, [r7, #8]
 8008eba:	681b      	ldr	r3, [r3, #0]
 8008ebc:	f003 0310 	and.w	r3, r3, #16
 8008ec0:	2b00      	cmp	r3, #0
 8008ec2:	d021      	beq.n	8008f08 <ETH_Prepare_Tx_Descriptors+0x250>
  {
    /* Set TCP Header length */
    MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_THL, (pTxConfig->TCPHeaderLen << 19));
 8008ec4:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8008ec6:	68db      	ldr	r3, [r3, #12]
 8008ec8:	f423 02f0 	bic.w	r2, r3, #7864320	@ 0x780000
 8008ecc:	68bb      	ldr	r3, [r7, #8]
 8008ece:	6a1b      	ldr	r3, [r3, #32]
 8008ed0:	04db      	lsls	r3, r3, #19
 8008ed2:	431a      	orrs	r2, r3
 8008ed4:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8008ed6:	60da      	str	r2, [r3, #12]
    /* Set TCP payload length */
    MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_TPL, pTxConfig->PayloadLen);
 8008ed8:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8008eda:	68da      	ldr	r2, [r3, #12]
 8008edc:	4b09      	ldr	r3, [pc, #36]	@ (8008f04 <ETH_Prepare_Tx_Descriptors+0x24c>)
 8008ede:	4013      	ands	r3, r2
 8008ee0:	68ba      	ldr	r2, [r7, #8]
 8008ee2:	69d2      	ldr	r2, [r2, #28]
 8008ee4:	431a      	orrs	r2, r3
 8008ee6:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8008ee8:	60da      	str	r2, [r3, #12]
    /* Set TCP Segmentation Enabled bit */
    SET_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_TSE);
 8008eea:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8008eec:	68db      	ldr	r3, [r3, #12]
 8008eee:	f443 2280 	orr.w	r2, r3, #262144	@ 0x40000
 8008ef2:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8008ef4:	60da      	str	r2, [r3, #12]
 8008ef6:	e02e      	b.n	8008f56 <ETH_Prepare_Tx_Descriptors+0x29e>
 8008ef8:	ffff0000 	.word	0xffff0000
 8008efc:	ffffc000 	.word	0xffffc000
 8008f00:	c000ffff 	.word	0xc000ffff
 8008f04:	fffc0000 	.word	0xfffc0000
  }
  else
  {
    MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_FL, pTxConfig->Length);
 8008f08:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8008f0a:	68da      	ldr	r2, [r3, #12]
 8008f0c:	4b7b      	ldr	r3, [pc, #492]	@ (80090fc <ETH_Prepare_Tx_Descriptors+0x444>)
 8008f0e:	4013      	ands	r3, r2
 8008f10:	68ba      	ldr	r2, [r7, #8]
 8008f12:	6852      	ldr	r2, [r2, #4]
 8008f14:	431a      	orrs	r2, r3
 8008f16:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8008f18:	60da      	str	r2, [r3, #12]

    if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_CSUM) != (uint32_t)RESET)
 8008f1a:	68bb      	ldr	r3, [r7, #8]
 8008f1c:	681b      	ldr	r3, [r3, #0]
 8008f1e:	f003 0301 	and.w	r3, r3, #1
 8008f22:	2b00      	cmp	r3, #0
 8008f24:	d008      	beq.n	8008f38 <ETH_Prepare_Tx_Descriptors+0x280>
    {
      MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_CIC, pTxConfig->ChecksumCtrl);
 8008f26:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8008f28:	68db      	ldr	r3, [r3, #12]
 8008f2a:	f423 3240 	bic.w	r2, r3, #196608	@ 0x30000
 8008f2e:	68bb      	ldr	r3, [r7, #8]
 8008f30:	695b      	ldr	r3, [r3, #20]
 8008f32:	431a      	orrs	r2, r3
 8008f34:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8008f36:	60da      	str	r2, [r3, #12]
    }

    if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_CRCPAD) != (uint32_t)RESET)
 8008f38:	68bb      	ldr	r3, [r7, #8]
 8008f3a:	681b      	ldr	r3, [r3, #0]
 8008f3c:	f003 0320 	and.w	r3, r3, #32
 8008f40:	2b00      	cmp	r3, #0
 8008f42:	d008      	beq.n	8008f56 <ETH_Prepare_Tx_Descriptors+0x29e>
    {
      MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_CPC, pTxConfig->CRCPadCtrl);
 8008f44:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8008f46:	68db      	ldr	r3, [r3, #12]
 8008f48:	f023 6240 	bic.w	r2, r3, #201326592	@ 0xc000000
 8008f4c:	68bb      	ldr	r3, [r7, #8]
 8008f4e:	691b      	ldr	r3, [r3, #16]
 8008f50:	431a      	orrs	r2, r3
 8008f52:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8008f54:	60da      	str	r2, [r3, #12]
    }
  }

  if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_VLANTAG) != (uint32_t)RESET)
 8008f56:	68bb      	ldr	r3, [r7, #8]
 8008f58:	681b      	ldr	r3, [r3, #0]
 8008f5a:	f003 0304 	and.w	r3, r3, #4
 8008f5e:	2b00      	cmp	r3, #0
 8008f60:	d008      	beq.n	8008f74 <ETH_Prepare_Tx_Descriptors+0x2bc>
  {
    /* Set Vlan Tag control */
    MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_VTIR, pTxConfig->VlanCtrl);
 8008f62:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8008f64:	689b      	ldr	r3, [r3, #8]
 8008f66:	f423 4240 	bic.w	r2, r3, #49152	@ 0xc000
 8008f6a:	68bb      	ldr	r3, [r7, #8]
 8008f6c:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 8008f6e:	431a      	orrs	r2, r3
 8008f70:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8008f72:	609a      	str	r2, [r3, #8]
  }

  /* Mark it as First Descriptor */
  SET_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_FD);
 8008f74:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8008f76:	68db      	ldr	r3, [r3, #12]
 8008f78:	f043 5200 	orr.w	r2, r3, #536870912	@ 0x20000000
 8008f7c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8008f7e:	60da      	str	r2, [r3, #12]
  /* Mark it as NORMAL descriptor */
  CLEAR_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_CTXT);
 8008f80:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8008f82:	68db      	ldr	r3, [r3, #12]
 8008f84:	f023 4280 	bic.w	r2, r3, #1073741824	@ 0x40000000
 8008f88:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8008f8a:	60da      	str	r2, [r3, #12]
  __ASM volatile ("dmb 0xF":::"memory");
 8008f8c:	f3bf 8f5f 	dmb	sy
}
 8008f90:	bf00      	nop
  /* Ensure rest of descriptor is written to RAM before the OWN bit */
  __DMB();
  /* set OWN bit of FIRST descriptor */
  SET_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_OWN);
 8008f92:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8008f94:	68db      	ldr	r3, [r3, #12]
 8008f96:	f043 4200 	orr.w	r2, r3, #2147483648	@ 0x80000000
 8008f9a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8008f9c:	60da      	str	r2, [r3, #12]

  /* If source address insertion/replacement is enabled for this packet */
  if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_SAIC) != (uint32_t)RESET)
 8008f9e:	68bb      	ldr	r3, [r7, #8]
 8008fa0:	681b      	ldr	r3, [r3, #0]
 8008fa2:	f003 0302 	and.w	r3, r3, #2
 8008fa6:	2b00      	cmp	r3, #0
 8008fa8:	f000 80da 	beq.w	8009160 <ETH_Prepare_Tx_Descriptors+0x4a8>
  {
    MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_SAIC, pTxConfig->SrcAddrCtrl);
 8008fac:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8008fae:	68db      	ldr	r3, [r3, #12]
 8008fb0:	f023 7260 	bic.w	r2, r3, #58720256	@ 0x3800000
 8008fb4:	68bb      	ldr	r3, [r7, #8]
 8008fb6:	68db      	ldr	r3, [r3, #12]
 8008fb8:	431a      	orrs	r2, r3
 8008fba:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8008fbc:	60da      	str	r2, [r3, #12]
  }

  /* only if the packet is split into more than one descriptors > 1 */
  while (txbuffer->next != NULL)
 8008fbe:	e0cf      	b.n	8009160 <ETH_Prepare_Tx_Descriptors+0x4a8>
  {
    /* Clear the LD bit of previous descriptor */
    CLEAR_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_LD);
 8008fc0:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8008fc2:	68db      	ldr	r3, [r3, #12]
 8008fc4:	f023 5280 	bic.w	r2, r3, #268435456	@ 0x10000000
 8008fc8:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8008fca:	60da      	str	r2, [r3, #12]
    /* Increment current tx descriptor index */
    INCR_TX_DESC_INDEX(descidx, 1U);
 8008fcc:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 8008fce:	3301      	adds	r3, #1
 8008fd0:	63fb      	str	r3, [r7, #60]	@ 0x3c
 8008fd2:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 8008fd4:	2b03      	cmp	r3, #3
 8008fd6:	d902      	bls.n	8008fde <ETH_Prepare_Tx_Descriptors+0x326>
 8008fd8:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 8008fda:	3b04      	subs	r3, #4
 8008fdc:	63fb      	str	r3, [r7, #60]	@ 0x3c
    /* Get current descriptor address */
    dmatxdesc = (ETH_DMADescTypeDef *)dmatxdesclist->TxDesc[descidx];
 8008fde:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8008fe0:	6bfa      	ldr	r2, [r7, #60]	@ 0x3c
 8008fe2:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
 8008fe6:	633b      	str	r3, [r7, #48]	@ 0x30

    /* Clear the FD bit of new Descriptor */
    CLEAR_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_FD);
 8008fe8:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8008fea:	68db      	ldr	r3, [r3, #12]
 8008fec:	f023 5200 	bic.w	r2, r3, #536870912	@ 0x20000000
 8008ff0:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8008ff2:	60da      	str	r2, [r3, #12]

    /* Current Tx Descriptor Owned by DMA: cannot be used by the application  */
    if ((READ_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_OWN) == ETH_DMATXNDESCRF_OWN)
 8008ff4:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8008ff6:	68db      	ldr	r3, [r3, #12]
 8008ff8:	f003 4300 	and.w	r3, r3, #2147483648	@ 0x80000000
 8008ffc:	f1b3 4f00 	cmp.w	r3, #2147483648	@ 0x80000000
 8009000:	d007      	beq.n	8009012 <ETH_Prepare_Tx_Descriptors+0x35a>
        || (dmatxdesclist->PacketAddress[descidx] != NULL))
 8009002:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8009004:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 8009006:	3304      	adds	r3, #4
 8009008:	009b      	lsls	r3, r3, #2
 800900a:	4413      	add	r3, r2
 800900c:	685b      	ldr	r3, [r3, #4]
 800900e:	2b00      	cmp	r3, #0
 8009010:	d029      	beq.n	8009066 <ETH_Prepare_Tx_Descriptors+0x3ae>
    {
      descidx = firstdescidx;
 8009012:	6a3b      	ldr	r3, [r7, #32]
 8009014:	63fb      	str	r3, [r7, #60]	@ 0x3c
      dmatxdesc = (ETH_DMADescTypeDef *)dmatxdesclist->TxDesc[descidx];
 8009016:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8009018:	6bfa      	ldr	r2, [r7, #60]	@ 0x3c
 800901a:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
 800901e:	633b      	str	r3, [r7, #48]	@ 0x30

      /* clear previous desc own bit */
      for (idx = 0; idx < descnbr; idx ++)
 8009020:	2300      	movs	r3, #0
 8009022:	63bb      	str	r3, [r7, #56]	@ 0x38
 8009024:	e019      	b.n	800905a <ETH_Prepare_Tx_Descriptors+0x3a2>
  __ASM volatile ("dmb 0xF":::"memory");
 8009026:	f3bf 8f5f 	dmb	sy
}
 800902a:	bf00      	nop
      {
        /* Ensure rest of descriptor is written to RAM before the OWN bit */
        __DMB();

        CLEAR_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_OWN);
 800902c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800902e:	68db      	ldr	r3, [r3, #12]
 8009030:	f023 4200 	bic.w	r2, r3, #2147483648	@ 0x80000000
 8009034:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009036:	60da      	str	r2, [r3, #12]

        /* Increment current tx descriptor index */
        INCR_TX_DESC_INDEX(descidx, 1U);
 8009038:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800903a:	3301      	adds	r3, #1
 800903c:	63fb      	str	r3, [r7, #60]	@ 0x3c
 800903e:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 8009040:	2b03      	cmp	r3, #3
 8009042:	d902      	bls.n	800904a <ETH_Prepare_Tx_Descriptors+0x392>
 8009044:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 8009046:	3b04      	subs	r3, #4
 8009048:	63fb      	str	r3, [r7, #60]	@ 0x3c
        /* Get current descriptor address */
        dmatxdesc = (ETH_DMADescTypeDef *)dmatxdesclist->TxDesc[descidx];
 800904a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800904c:	6bfa      	ldr	r2, [r7, #60]	@ 0x3c
 800904e:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
 8009052:	633b      	str	r3, [r7, #48]	@ 0x30
      for (idx = 0; idx < descnbr; idx ++)
 8009054:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8009056:	3301      	adds	r3, #1
 8009058:	63bb      	str	r3, [r7, #56]	@ 0x38
 800905a:	6bba      	ldr	r2, [r7, #56]	@ 0x38
 800905c:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 800905e:	429a      	cmp	r2, r3
 8009060:	d3e1      	bcc.n	8009026 <ETH_Prepare_Tx_Descriptors+0x36e>
      }

      return HAL_ETH_ERROR_BUSY;
 8009062:	2302      	movs	r3, #2
 8009064:	e0bb      	b.n	80091de <ETH_Prepare_Tx_Descriptors+0x526>
    }

    descnbr += 1U;
 8009066:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8009068:	3301      	adds	r3, #1
 800906a:	637b      	str	r3, [r7, #52]	@ 0x34

    /* Get the next Tx buffer in the list */
    txbuffer = txbuffer->next;
 800906c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 800906e:	689b      	ldr	r3, [r3, #8]
 8009070:	62fb      	str	r3, [r7, #44]	@ 0x2c

    /* Set header or buffer 1 address */
    WRITE_REG(dmatxdesc->DESC0, (uint32_t)txbuffer->buffer);
 8009072:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8009074:	681b      	ldr	r3, [r3, #0]
 8009076:	461a      	mov	r2, r3
 8009078:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800907a:	601a      	str	r2, [r3, #0]
    /* Set header or buffer 1 Length */
    MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B1L, txbuffer->len);
 800907c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800907e:	689a      	ldr	r2, [r3, #8]
 8009080:	4b1f      	ldr	r3, [pc, #124]	@ (8009100 <ETH_Prepare_Tx_Descriptors+0x448>)
 8009082:	4013      	ands	r3, r2
 8009084:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 8009086:	6852      	ldr	r2, [r2, #4]
 8009088:	431a      	orrs	r2, r3
 800908a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800908c:	609a      	str	r2, [r3, #8]

    if (txbuffer->next != NULL)
 800908e:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8009090:	689b      	ldr	r3, [r3, #8]
 8009092:	2b00      	cmp	r3, #0
 8009094:	d012      	beq.n	80090bc <ETH_Prepare_Tx_Descriptors+0x404>
    {
      /* Get the next Tx buffer in the list */
      txbuffer = txbuffer->next;
 8009096:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8009098:	689b      	ldr	r3, [r3, #8]
 800909a:	62fb      	str	r3, [r7, #44]	@ 0x2c
      /* Set buffer 2 address */
      WRITE_REG(dmatxdesc->DESC1, (uint32_t)txbuffer->buffer);
 800909c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 800909e:	681b      	ldr	r3, [r3, #0]
 80090a0:	461a      	mov	r2, r3
 80090a2:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80090a4:	605a      	str	r2, [r3, #4]
      /* Set buffer 2 Length */
      MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B2L, (txbuffer->len << 16));
 80090a6:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80090a8:	689a      	ldr	r2, [r3, #8]
 80090aa:	4b16      	ldr	r3, [pc, #88]	@ (8009104 <ETH_Prepare_Tx_Descriptors+0x44c>)
 80090ac:	4013      	ands	r3, r2
 80090ae:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 80090b0:	6852      	ldr	r2, [r2, #4]
 80090b2:	0412      	lsls	r2, r2, #16
 80090b4:	431a      	orrs	r2, r3
 80090b6:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80090b8:	609a      	str	r2, [r3, #8]
 80090ba:	e008      	b.n	80090ce <ETH_Prepare_Tx_Descriptors+0x416>
    }
    else
    {
      WRITE_REG(dmatxdesc->DESC1, 0x0U);
 80090bc:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80090be:	2200      	movs	r2, #0
 80090c0:	605a      	str	r2, [r3, #4]
      /* Set buffer 2 Length */
      MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B2L, 0x0U);
 80090c2:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80090c4:	689a      	ldr	r2, [r3, #8]
 80090c6:	4b0f      	ldr	r3, [pc, #60]	@ (8009104 <ETH_Prepare_Tx_Descriptors+0x44c>)
 80090c8:	4013      	ands	r3, r2
 80090ca:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 80090cc:	6093      	str	r3, [r2, #8]
    }

    if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_TSO) != (uint32_t)RESET)
 80090ce:	68bb      	ldr	r3, [r7, #8]
 80090d0:	681b      	ldr	r3, [r3, #0]
 80090d2:	f003 0310 	and.w	r3, r3, #16
 80090d6:	2b00      	cmp	r3, #0
 80090d8:	d018      	beq.n	800910c <ETH_Prepare_Tx_Descriptors+0x454>
    {
      /* Set TCP payload length */
      MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_TPL, pTxConfig->PayloadLen);
 80090da:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80090dc:	68da      	ldr	r2, [r3, #12]
 80090de:	4b0a      	ldr	r3, [pc, #40]	@ (8009108 <ETH_Prepare_Tx_Descriptors+0x450>)
 80090e0:	4013      	ands	r3, r2
 80090e2:	68ba      	ldr	r2, [r7, #8]
 80090e4:	69d2      	ldr	r2, [r2, #28]
 80090e6:	431a      	orrs	r2, r3
 80090e8:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80090ea:	60da      	str	r2, [r3, #12]
      /* Set TCP Segmentation Enabled bit */
      SET_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_TSE);
 80090ec:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80090ee:	68db      	ldr	r3, [r3, #12]
 80090f0:	f443 2280 	orr.w	r2, r3, #262144	@ 0x40000
 80090f4:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80090f6:	60da      	str	r2, [r3, #12]
 80090f8:	e020      	b.n	800913c <ETH_Prepare_Tx_Descriptors+0x484>
 80090fa:	bf00      	nop
 80090fc:	ffff8000 	.word	0xffff8000
 8009100:	ffffc000 	.word	0xffffc000
 8009104:	c000ffff 	.word	0xc000ffff
 8009108:	fffc0000 	.word	0xfffc0000
    }
    else
    {
      /* Set the packet length */
      MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_FL, pTxConfig->Length);
 800910c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800910e:	68da      	ldr	r2, [r3, #12]
 8009110:	4b36      	ldr	r3, [pc, #216]	@ (80091ec <ETH_Prepare_Tx_Descriptors+0x534>)
 8009112:	4013      	ands	r3, r2
 8009114:	68ba      	ldr	r2, [r7, #8]
 8009116:	6852      	ldr	r2, [r2, #4]
 8009118:	431a      	orrs	r2, r3
 800911a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800911c:	60da      	str	r2, [r3, #12]

      if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_CSUM) != (uint32_t)RESET)
 800911e:	68bb      	ldr	r3, [r7, #8]
 8009120:	681b      	ldr	r3, [r3, #0]
 8009122:	f003 0301 	and.w	r3, r3, #1
 8009126:	2b00      	cmp	r3, #0
 8009128:	d008      	beq.n	800913c <ETH_Prepare_Tx_Descriptors+0x484>
      {
        /* Checksum Insertion Control */
        MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_CIC, pTxConfig->ChecksumCtrl);
 800912a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800912c:	68db      	ldr	r3, [r3, #12]
 800912e:	f423 3240 	bic.w	r2, r3, #196608	@ 0x30000
 8009132:	68bb      	ldr	r3, [r7, #8]
 8009134:	695b      	ldr	r3, [r3, #20]
 8009136:	431a      	orrs	r2, r3
 8009138:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800913a:	60da      	str	r2, [r3, #12]
      }
    }

    bd_count += 1U;
 800913c:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 800913e:	3301      	adds	r3, #1
 8009140:	62bb      	str	r3, [r7, #40]	@ 0x28
  __ASM volatile ("dmb 0xF":::"memory");
 8009142:	f3bf 8f5f 	dmb	sy
}
 8009146:	bf00      	nop

    /* Ensure rest of descriptor is written to RAM before the OWN bit */
    __DMB();
    /* Set Own bit */
    SET_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_OWN);
 8009148:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800914a:	68db      	ldr	r3, [r3, #12]
 800914c:	f043 4200 	orr.w	r2, r3, #2147483648	@ 0x80000000
 8009150:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009152:	60da      	str	r2, [r3, #12]
    /* Mark it as NORMAL descriptor */
    CLEAR_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_CTXT);
 8009154:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009156:	68db      	ldr	r3, [r3, #12]
 8009158:	f023 4280 	bic.w	r2, r3, #1073741824	@ 0x40000000
 800915c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800915e:	60da      	str	r2, [r3, #12]
  while (txbuffer->next != NULL)
 8009160:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8009162:	689b      	ldr	r3, [r3, #8]
 8009164:	2b00      	cmp	r3, #0
 8009166:	f47f af2b 	bne.w	8008fc0 <ETH_Prepare_Tx_Descriptors+0x308>
  }

  if (ItMode != ((uint32_t)RESET))
 800916a:	687b      	ldr	r3, [r7, #4]
 800916c:	2b00      	cmp	r3, #0
 800916e:	d006      	beq.n	800917e <ETH_Prepare_Tx_Descriptors+0x4c6>
  {
    /* Set Interrupt on completion bit */
    SET_BIT(dmatxdesc->DESC2, ETH_DMATXNDESCRF_IOC);
 8009170:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009172:	689b      	ldr	r3, [r3, #8]
 8009174:	f043 4200 	orr.w	r2, r3, #2147483648	@ 0x80000000
 8009178:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800917a:	609a      	str	r2, [r3, #8]
 800917c:	e005      	b.n	800918a <ETH_Prepare_Tx_Descriptors+0x4d2>
  }
  else
  {
    /* Clear Interrupt on completion bit */
    CLEAR_BIT(dmatxdesc->DESC2, ETH_DMATXNDESCRF_IOC);
 800917e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009180:	689b      	ldr	r3, [r3, #8]
 8009182:	f023 4200 	bic.w	r2, r3, #2147483648	@ 0x80000000
 8009186:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009188:	609a      	str	r2, [r3, #8]
  }

  /* Mark it as LAST descriptor */
  SET_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_LD);
 800918a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800918c:	68db      	ldr	r3, [r3, #12]
 800918e:	f043 5280 	orr.w	r2, r3, #268435456	@ 0x10000000
 8009192:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009194:	60da      	str	r2, [r3, #12]
  /* Save the current packet address to expose it to the application */
  dmatxdesclist->PacketAddress[descidx] = dmatxdesclist->CurrentPacketAddress;
 8009196:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8009198:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 800919a:	6a79      	ldr	r1, [r7, #36]	@ 0x24
 800919c:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800919e:	3304      	adds	r3, #4
 80091a0:	009b      	lsls	r3, r3, #2
 80091a2:	440b      	add	r3, r1
 80091a4:	605a      	str	r2, [r3, #4]

  dmatxdesclist->CurTxDesc = descidx;
 80091a6:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80091a8:	6bfa      	ldr	r2, [r7, #60]	@ 0x3c
 80091aa:	611a      	str	r2, [r3, #16]
  __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory");
 80091ac:	f3ef 8310 	mrs	r3, PRIMASK
 80091b0:	613b      	str	r3, [r7, #16]
  return(result);
 80091b2:	693b      	ldr	r3, [r7, #16]

  /* Enter critical section */
  primask_bit = __get_PRIMASK();
 80091b4:	61fb      	str	r3, [r7, #28]
 80091b6:	2301      	movs	r3, #1
 80091b8:	617b      	str	r3, [r7, #20]
  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
 80091ba:	697b      	ldr	r3, [r7, #20]
 80091bc:	f383 8810 	msr	PRIMASK, r3
}
 80091c0:	bf00      	nop
  __set_PRIMASK(1);

  dmatxdesclist->BuffersInUse += bd_count + 1U;
 80091c2:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80091c4:	6a9a      	ldr	r2, [r3, #40]	@ 0x28
 80091c6:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80091c8:	4413      	add	r3, r2
 80091ca:	1c5a      	adds	r2, r3, #1
 80091cc:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80091ce:	629a      	str	r2, [r3, #40]	@ 0x28
 80091d0:	69fb      	ldr	r3, [r7, #28]
 80091d2:	61bb      	str	r3, [r7, #24]
  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
 80091d4:	69bb      	ldr	r3, [r7, #24]
 80091d6:	f383 8810 	msr	PRIMASK, r3
}
 80091da:	bf00      	nop

  /* Exit critical section: restore previous priority mask */
  __set_PRIMASK(primask_bit);

  /* Return function status */
  return HAL_ETH_ERROR_NONE;
 80091dc:	2300      	movs	r3, #0
}
 80091de:	4618      	mov	r0, r3
 80091e0:	3744      	adds	r7, #68	@ 0x44
 80091e2:	46bd      	mov	sp, r7
 80091e4:	f85d 7b04 	ldr.w	r7, [sp], #4
 80091e8:	4770      	bx	lr
 80091ea:	bf00      	nop
 80091ec:	ffff8000 	.word	0xffff8000

080091f0 <HAL_GPIO_Init>:
  * @param  GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains
  *         the configuration information for the specified GPIO peripheral.
  * @retval None
  */
void HAL_GPIO_Init(GPIO_TypeDef  *GPIOx, GPIO_InitTypeDef *GPIO_Init)
{
 80091f0:	b480      	push	{r7}
 80091f2:	b089      	sub	sp, #36	@ 0x24
 80091f4:	af00      	add	r7, sp, #0
 80091f6:	6078      	str	r0, [r7, #4]
 80091f8:	6039      	str	r1, [r7, #0]
  uint32_t position = 0x00U;
 80091fa:	2300      	movs	r3, #0
 80091fc:	61fb      	str	r3, [r7, #28]
  EXTI_Core_TypeDef *EXTI_CurrentCPU;

#if defined(DUAL_CORE) && defined(CORE_CM4)
  EXTI_CurrentCPU = EXTI_D2; /* EXTI for CM4 CPU */
#else
  EXTI_CurrentCPU = EXTI_D1; /* EXTI for CM7 CPU */
 80091fe:	4b89      	ldr	r3, [pc, #548]	@ (8009424 <HAL_GPIO_Init+0x234>)
 8009200:	617b      	str	r3, [r7, #20]
  assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
  assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
  assert_param(IS_GPIO_MODE(GPIO_Init->Mode));

  /* Configure the port pins */
  while (((GPIO_Init->Pin) >> position) != 0x00U)
 8009202:	e194      	b.n	800952e <HAL_GPIO_Init+0x33e>
  {
    /* Get current io position */
    iocurrent = (GPIO_Init->Pin) & (1UL << position);
 8009204:	683b      	ldr	r3, [r7, #0]
 8009206:	681a      	ldr	r2, [r3, #0]
 8009208:	2101      	movs	r1, #1
 800920a:	69fb      	ldr	r3, [r7, #28]
 800920c:	fa01 f303 	lsl.w	r3, r1, r3
 8009210:	4013      	ands	r3, r2
 8009212:	613b      	str	r3, [r7, #16]

    if (iocurrent != 0x00U)
 8009214:	693b      	ldr	r3, [r7, #16]
 8009216:	2b00      	cmp	r3, #0
 8009218:	f000 8186 	beq.w	8009528 <HAL_GPIO_Init+0x338>
    {
      /*--------------------- GPIO Mode Configuration ------------------------*/
      /* In case of Output or Alternate function mode selection */
      if (((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF))
 800921c:	683b      	ldr	r3, [r7, #0]
 800921e:	685b      	ldr	r3, [r3, #4]
 8009220:	f003 0303 	and.w	r3, r3, #3
 8009224:	2b01      	cmp	r3, #1
 8009226:	d005      	beq.n	8009234 <HAL_GPIO_Init+0x44>
 8009228:	683b      	ldr	r3, [r7, #0]
 800922a:	685b      	ldr	r3, [r3, #4]
 800922c:	f003 0303 	and.w	r3, r3, #3
 8009230:	2b02      	cmp	r3, #2
 8009232:	d130      	bne.n	8009296 <HAL_GPIO_Init+0xa6>
      {
        /* Check the Speed parameter */
        assert_param(IS_GPIO_SPEED(GPIO_Init->Speed));

        /* Configure the IO Speed */
        temp = GPIOx->OSPEEDR;
 8009234:	687b      	ldr	r3, [r7, #4]
 8009236:	689b      	ldr	r3, [r3, #8]
 8009238:	61bb      	str	r3, [r7, #24]
        temp &= ~(GPIO_OSPEEDR_OSPEED0 << (position * 2U));
 800923a:	69fb      	ldr	r3, [r7, #28]
 800923c:	005b      	lsls	r3, r3, #1
 800923e:	2203      	movs	r2, #3
 8009240:	fa02 f303 	lsl.w	r3, r2, r3
 8009244:	43db      	mvns	r3, r3
 8009246:	69ba      	ldr	r2, [r7, #24]
 8009248:	4013      	ands	r3, r2
 800924a:	61bb      	str	r3, [r7, #24]
        temp |= (GPIO_Init->Speed << (position * 2U));
 800924c:	683b      	ldr	r3, [r7, #0]
 800924e:	68da      	ldr	r2, [r3, #12]
 8009250:	69fb      	ldr	r3, [r7, #28]
 8009252:	005b      	lsls	r3, r3, #1
 8009254:	fa02 f303 	lsl.w	r3, r2, r3
 8009258:	69ba      	ldr	r2, [r7, #24]
 800925a:	4313      	orrs	r3, r2
 800925c:	61bb      	str	r3, [r7, #24]
        GPIOx->OSPEEDR = temp;
 800925e:	687b      	ldr	r3, [r7, #4]
 8009260:	69ba      	ldr	r2, [r7, #24]
 8009262:	609a      	str	r2, [r3, #8]

        /* Configure the IO Output Type */
        temp = GPIOx->OTYPER;
 8009264:	687b      	ldr	r3, [r7, #4]
 8009266:	685b      	ldr	r3, [r3, #4]
 8009268:	61bb      	str	r3, [r7, #24]
        temp &= ~(GPIO_OTYPER_OT0 << position) ;
 800926a:	2201      	movs	r2, #1
 800926c:	69fb      	ldr	r3, [r7, #28]
 800926e:	fa02 f303 	lsl.w	r3, r2, r3
 8009272:	43db      	mvns	r3, r3
 8009274:	69ba      	ldr	r2, [r7, #24]
 8009276:	4013      	ands	r3, r2
 8009278:	61bb      	str	r3, [r7, #24]
        temp |= (((GPIO_Init->Mode & OUTPUT_TYPE) >> OUTPUT_TYPE_Pos) << position);
 800927a:	683b      	ldr	r3, [r7, #0]
 800927c:	685b      	ldr	r3, [r3, #4]
 800927e:	091b      	lsrs	r3, r3, #4
 8009280:	f003 0201 	and.w	r2, r3, #1
 8009284:	69fb      	ldr	r3, [r7, #28]
 8009286:	fa02 f303 	lsl.w	r3, r2, r3
 800928a:	69ba      	ldr	r2, [r7, #24]
 800928c:	4313      	orrs	r3, r2
 800928e:	61bb      	str	r3, [r7, #24]
        GPIOx->OTYPER = temp;
 8009290:	687b      	ldr	r3, [r7, #4]
 8009292:	69ba      	ldr	r2, [r7, #24]
 8009294:	605a      	str	r2, [r3, #4]
      }

      if ((GPIO_Init->Mode & GPIO_MODE) != MODE_ANALOG)
 8009296:	683b      	ldr	r3, [r7, #0]
 8009298:	685b      	ldr	r3, [r3, #4]
 800929a:	f003 0303 	and.w	r3, r3, #3
 800929e:	2b03      	cmp	r3, #3
 80092a0:	d017      	beq.n	80092d2 <HAL_GPIO_Init+0xe2>
      {
       /* Check the Pull parameter */
       assert_param(IS_GPIO_PULL(GPIO_Init->Pull));

      /* Activate the Pull-up or Pull down resistor for the current IO */
      temp = GPIOx->PUPDR;
 80092a2:	687b      	ldr	r3, [r7, #4]
 80092a4:	68db      	ldr	r3, [r3, #12]
 80092a6:	61bb      	str	r3, [r7, #24]
      temp &= ~(GPIO_PUPDR_PUPD0 << (position * 2U));
 80092a8:	69fb      	ldr	r3, [r7, #28]
 80092aa:	005b      	lsls	r3, r3, #1
 80092ac:	2203      	movs	r2, #3
 80092ae:	fa02 f303 	lsl.w	r3, r2, r3
 80092b2:	43db      	mvns	r3, r3
 80092b4:	69ba      	ldr	r2, [r7, #24]
 80092b6:	4013      	ands	r3, r2
 80092b8:	61bb      	str	r3, [r7, #24]
      temp |= ((GPIO_Init->Pull) << (position * 2U));
 80092ba:	683b      	ldr	r3, [r7, #0]
 80092bc:	689a      	ldr	r2, [r3, #8]
 80092be:	69fb      	ldr	r3, [r7, #28]
 80092c0:	005b      	lsls	r3, r3, #1
 80092c2:	fa02 f303 	lsl.w	r3, r2, r3
 80092c6:	69ba      	ldr	r2, [r7, #24]
 80092c8:	4313      	orrs	r3, r2
 80092ca:	61bb      	str	r3, [r7, #24]
      GPIOx->PUPDR = temp;
 80092cc:	687b      	ldr	r3, [r7, #4]
 80092ce:	69ba      	ldr	r2, [r7, #24]
 80092d0:	60da      	str	r2, [r3, #12]
      }

      /* In case of Alternate function mode selection */
      if ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF)
 80092d2:	683b      	ldr	r3, [r7, #0]
 80092d4:	685b      	ldr	r3, [r3, #4]
 80092d6:	f003 0303 	and.w	r3, r3, #3
 80092da:	2b02      	cmp	r3, #2
 80092dc:	d123      	bne.n	8009326 <HAL_GPIO_Init+0x136>
        /* Check the Alternate function parameters */
        assert_param(IS_GPIO_AF_INSTANCE(GPIOx));
        assert_param(IS_GPIO_AF(GPIO_Init->Alternate));

        /* Configure Alternate function mapped with the current IO */
        temp = GPIOx->AFR[position >> 3U];
 80092de:	69fb      	ldr	r3, [r7, #28]
 80092e0:	08da      	lsrs	r2, r3, #3
 80092e2:	687b      	ldr	r3, [r7, #4]
 80092e4:	3208      	adds	r2, #8
 80092e6:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
 80092ea:	61bb      	str	r3, [r7, #24]
        temp &= ~(0xFU << ((position & 0x07U) * 4U));
 80092ec:	69fb      	ldr	r3, [r7, #28]
 80092ee:	f003 0307 	and.w	r3, r3, #7
 80092f2:	009b      	lsls	r3, r3, #2
 80092f4:	220f      	movs	r2, #15
 80092f6:	fa02 f303 	lsl.w	r3, r2, r3
 80092fa:	43db      	mvns	r3, r3
 80092fc:	69ba      	ldr	r2, [r7, #24]
 80092fe:	4013      	ands	r3, r2
 8009300:	61bb      	str	r3, [r7, #24]
        temp |= ((GPIO_Init->Alternate) << ((position & 0x07U) * 4U));
 8009302:	683b      	ldr	r3, [r7, #0]
 8009304:	691a      	ldr	r2, [r3, #16]
 8009306:	69fb      	ldr	r3, [r7, #28]
 8009308:	f003 0307 	and.w	r3, r3, #7
 800930c:	009b      	lsls	r3, r3, #2
 800930e:	fa02 f303 	lsl.w	r3, r2, r3
 8009312:	69ba      	ldr	r2, [r7, #24]
 8009314:	4313      	orrs	r3, r2
 8009316:	61bb      	str	r3, [r7, #24]
        GPIOx->AFR[position >> 3U] = temp;
 8009318:	69fb      	ldr	r3, [r7, #28]
 800931a:	08da      	lsrs	r2, r3, #3
 800931c:	687b      	ldr	r3, [r7, #4]
 800931e:	3208      	adds	r2, #8
 8009320:	69b9      	ldr	r1, [r7, #24]
 8009322:	f843 1022 	str.w	r1, [r3, r2, lsl #2]
      }

      /* Configure IO Direction mode (Input, Output, Alternate or Analog) */
      temp = GPIOx->MODER;
 8009326:	687b      	ldr	r3, [r7, #4]
 8009328:	681b      	ldr	r3, [r3, #0]
 800932a:	61bb      	str	r3, [r7, #24]
      temp &= ~(GPIO_MODER_MODE0 << (position * 2U));
 800932c:	69fb      	ldr	r3, [r7, #28]
 800932e:	005b      	lsls	r3, r3, #1
 8009330:	2203      	movs	r2, #3
 8009332:	fa02 f303 	lsl.w	r3, r2, r3
 8009336:	43db      	mvns	r3, r3
 8009338:	69ba      	ldr	r2, [r7, #24]
 800933a:	4013      	ands	r3, r2
 800933c:	61bb      	str	r3, [r7, #24]
      temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2U));
 800933e:	683b      	ldr	r3, [r7, #0]
 8009340:	685b      	ldr	r3, [r3, #4]
 8009342:	f003 0203 	and.w	r2, r3, #3
 8009346:	69fb      	ldr	r3, [r7, #28]
 8009348:	005b      	lsls	r3, r3, #1
 800934a:	fa02 f303 	lsl.w	r3, r2, r3
 800934e:	69ba      	ldr	r2, [r7, #24]
 8009350:	4313      	orrs	r3, r2
 8009352:	61bb      	str	r3, [r7, #24]
      GPIOx->MODER = temp;
 8009354:	687b      	ldr	r3, [r7, #4]
 8009356:	69ba      	ldr	r2, [r7, #24]
 8009358:	601a      	str	r2, [r3, #0]

      /*--------------------- EXTI Mode Configuration ------------------------*/
      /* Configure the External Interrupt or event for the current IO */
      if ((GPIO_Init->Mode & EXTI_MODE) != 0x00U)
 800935a:	683b      	ldr	r3, [r7, #0]
 800935c:	685b      	ldr	r3, [r3, #4]
 800935e:	f403 3340 	and.w	r3, r3, #196608	@ 0x30000
 8009362:	2b00      	cmp	r3, #0
 8009364:	f000 80e0 	beq.w	8009528 <HAL_GPIO_Init+0x338>
      {
        /* Enable SYSCFG Clock */
        __HAL_RCC_SYSCFG_CLK_ENABLE();
 8009368:	4b2f      	ldr	r3, [pc, #188]	@ (8009428 <HAL_GPIO_Init+0x238>)
 800936a:	f8d3 30f4 	ldr.w	r3, [r3, #244]	@ 0xf4
 800936e:	4a2e      	ldr	r2, [pc, #184]	@ (8009428 <HAL_GPIO_Init+0x238>)
 8009370:	f043 0302 	orr.w	r3, r3, #2
 8009374:	f8c2 30f4 	str.w	r3, [r2, #244]	@ 0xf4
 8009378:	4b2b      	ldr	r3, [pc, #172]	@ (8009428 <HAL_GPIO_Init+0x238>)
 800937a:	f8d3 30f4 	ldr.w	r3, [r3, #244]	@ 0xf4
 800937e:	f003 0302 	and.w	r3, r3, #2
 8009382:	60fb      	str	r3, [r7, #12]
 8009384:	68fb      	ldr	r3, [r7, #12]

        temp = SYSCFG->EXTICR[position >> 2U];
 8009386:	4a29      	ldr	r2, [pc, #164]	@ (800942c <HAL_GPIO_Init+0x23c>)
 8009388:	69fb      	ldr	r3, [r7, #28]
 800938a:	089b      	lsrs	r3, r3, #2
 800938c:	3302      	adds	r3, #2
 800938e:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
 8009392:	61bb      	str	r3, [r7, #24]
        temp &= ~(0x0FUL << (4U * (position & 0x03U)));
 8009394:	69fb      	ldr	r3, [r7, #28]
 8009396:	f003 0303 	and.w	r3, r3, #3
 800939a:	009b      	lsls	r3, r3, #2
 800939c:	220f      	movs	r2, #15
 800939e:	fa02 f303 	lsl.w	r3, r2, r3
 80093a2:	43db      	mvns	r3, r3
 80093a4:	69ba      	ldr	r2, [r7, #24]
 80093a6:	4013      	ands	r3, r2
 80093a8:	61bb      	str	r3, [r7, #24]
        temp |= (GPIO_GET_INDEX(GPIOx) << (4U * (position & 0x03U)));
 80093aa:	687b      	ldr	r3, [r7, #4]
 80093ac:	4a20      	ldr	r2, [pc, #128]	@ (8009430 <HAL_GPIO_Init+0x240>)
 80093ae:	4293      	cmp	r3, r2
 80093b0:	d052      	beq.n	8009458 <HAL_GPIO_Init+0x268>
 80093b2:	687b      	ldr	r3, [r7, #4]
 80093b4:	4a1f      	ldr	r2, [pc, #124]	@ (8009434 <HAL_GPIO_Init+0x244>)
 80093b6:	4293      	cmp	r3, r2
 80093b8:	d031      	beq.n	800941e <HAL_GPIO_Init+0x22e>
 80093ba:	687b      	ldr	r3, [r7, #4]
 80093bc:	4a1e      	ldr	r2, [pc, #120]	@ (8009438 <HAL_GPIO_Init+0x248>)
 80093be:	4293      	cmp	r3, r2
 80093c0:	d02b      	beq.n	800941a <HAL_GPIO_Init+0x22a>
 80093c2:	687b      	ldr	r3, [r7, #4]
 80093c4:	4a1d      	ldr	r2, [pc, #116]	@ (800943c <HAL_GPIO_Init+0x24c>)
 80093c6:	4293      	cmp	r3, r2
 80093c8:	d025      	beq.n	8009416 <HAL_GPIO_Init+0x226>
 80093ca:	687b      	ldr	r3, [r7, #4]
 80093cc:	4a1c      	ldr	r2, [pc, #112]	@ (8009440 <HAL_GPIO_Init+0x250>)
 80093ce:	4293      	cmp	r3, r2
 80093d0:	d01f      	beq.n	8009412 <HAL_GPIO_Init+0x222>
 80093d2:	687b      	ldr	r3, [r7, #4]
 80093d4:	4a1b      	ldr	r2, [pc, #108]	@ (8009444 <HAL_GPIO_Init+0x254>)
 80093d6:	4293      	cmp	r3, r2
 80093d8:	d019      	beq.n	800940e <HAL_GPIO_Init+0x21e>
 80093da:	687b      	ldr	r3, [r7, #4]
 80093dc:	4a1a      	ldr	r2, [pc, #104]	@ (8009448 <HAL_GPIO_Init+0x258>)
 80093de:	4293      	cmp	r3, r2
 80093e0:	d013      	beq.n	800940a <HAL_GPIO_Init+0x21a>
 80093e2:	687b      	ldr	r3, [r7, #4]
 80093e4:	4a19      	ldr	r2, [pc, #100]	@ (800944c <HAL_GPIO_Init+0x25c>)
 80093e6:	4293      	cmp	r3, r2
 80093e8:	d00d      	beq.n	8009406 <HAL_GPIO_Init+0x216>
 80093ea:	687b      	ldr	r3, [r7, #4]
 80093ec:	4a18      	ldr	r2, [pc, #96]	@ (8009450 <HAL_GPIO_Init+0x260>)
 80093ee:	4293      	cmp	r3, r2
 80093f0:	d007      	beq.n	8009402 <HAL_GPIO_Init+0x212>
 80093f2:	687b      	ldr	r3, [r7, #4]
 80093f4:	4a17      	ldr	r2, [pc, #92]	@ (8009454 <HAL_GPIO_Init+0x264>)
 80093f6:	4293      	cmp	r3, r2
 80093f8:	d101      	bne.n	80093fe <HAL_GPIO_Init+0x20e>
 80093fa:	2309      	movs	r3, #9
 80093fc:	e02d      	b.n	800945a <HAL_GPIO_Init+0x26a>
 80093fe:	230a      	movs	r3, #10
 8009400:	e02b      	b.n	800945a <HAL_GPIO_Init+0x26a>
 8009402:	2308      	movs	r3, #8
 8009404:	e029      	b.n	800945a <HAL_GPIO_Init+0x26a>
 8009406:	2307      	movs	r3, #7
 8009408:	e027      	b.n	800945a <HAL_GPIO_Init+0x26a>
 800940a:	2306      	movs	r3, #6
 800940c:	e025      	b.n	800945a <HAL_GPIO_Init+0x26a>
 800940e:	2305      	movs	r3, #5
 8009410:	e023      	b.n	800945a <HAL_GPIO_Init+0x26a>
 8009412:	2304      	movs	r3, #4
 8009414:	e021      	b.n	800945a <HAL_GPIO_Init+0x26a>
 8009416:	2303      	movs	r3, #3
 8009418:	e01f      	b.n	800945a <HAL_GPIO_Init+0x26a>
 800941a:	2302      	movs	r3, #2
 800941c:	e01d      	b.n	800945a <HAL_GPIO_Init+0x26a>
 800941e:	2301      	movs	r3, #1
 8009420:	e01b      	b.n	800945a <HAL_GPIO_Init+0x26a>
 8009422:	bf00      	nop
 8009424:	58000080 	.word	0x58000080
 8009428:	58024400 	.word	0x58024400
 800942c:	58000400 	.word	0x58000400
 8009430:	58020000 	.word	0x58020000
 8009434:	58020400 	.word	0x58020400
 8009438:	58020800 	.word	0x58020800
 800943c:	58020c00 	.word	0x58020c00
 8009440:	58021000 	.word	0x58021000
 8009444:	58021400 	.word	0x58021400
 8009448:	58021800 	.word	0x58021800
 800944c:	58021c00 	.word	0x58021c00
 8009450:	58022000 	.word	0x58022000
 8009454:	58022400 	.word	0x58022400
 8009458:	2300      	movs	r3, #0
 800945a:	69fa      	ldr	r2, [r7, #28]
 800945c:	f002 0203 	and.w	r2, r2, #3
 8009460:	0092      	lsls	r2, r2, #2
 8009462:	4093      	lsls	r3, r2
 8009464:	69ba      	ldr	r2, [r7, #24]
 8009466:	4313      	orrs	r3, r2
 8009468:	61bb      	str	r3, [r7, #24]
        SYSCFG->EXTICR[position >> 2U] = temp;
 800946a:	4938      	ldr	r1, [pc, #224]	@ (800954c <HAL_GPIO_Init+0x35c>)
 800946c:	69fb      	ldr	r3, [r7, #28]
 800946e:	089b      	lsrs	r3, r3, #2
 8009470:	3302      	adds	r3, #2
 8009472:	69ba      	ldr	r2, [r7, #24]
 8009474:	f841 2023 	str.w	r2, [r1, r3, lsl #2]

        /* Clear Rising Falling edge configuration */
        temp = EXTI->RTSR1;
 8009478:	f04f 43b0 	mov.w	r3, #1476395008	@ 0x58000000
 800947c:	681b      	ldr	r3, [r3, #0]
 800947e:	61bb      	str	r3, [r7, #24]
        temp &= ~(iocurrent);
 8009480:	693b      	ldr	r3, [r7, #16]
 8009482:	43db      	mvns	r3, r3
 8009484:	69ba      	ldr	r2, [r7, #24]
 8009486:	4013      	ands	r3, r2
 8009488:	61bb      	str	r3, [r7, #24]
        if ((GPIO_Init->Mode & TRIGGER_RISING) != 0x00U)
 800948a:	683b      	ldr	r3, [r7, #0]
 800948c:	685b      	ldr	r3, [r3, #4]
 800948e:	f403 1380 	and.w	r3, r3, #1048576	@ 0x100000
 8009492:	2b00      	cmp	r3, #0
 8009494:	d003      	beq.n	800949e <HAL_GPIO_Init+0x2ae>
        {
          temp |= iocurrent;
 8009496:	69ba      	ldr	r2, [r7, #24]
 8009498:	693b      	ldr	r3, [r7, #16]
 800949a:	4313      	orrs	r3, r2
 800949c:	61bb      	str	r3, [r7, #24]
        }
        EXTI->RTSR1 = temp;
 800949e:	f04f 42b0 	mov.w	r2, #1476395008	@ 0x58000000
 80094a2:	69bb      	ldr	r3, [r7, #24]
 80094a4:	6013      	str	r3, [r2, #0]

        temp = EXTI->FTSR1;
 80094a6:	f04f 43b0 	mov.w	r3, #1476395008	@ 0x58000000
 80094aa:	685b      	ldr	r3, [r3, #4]
 80094ac:	61bb      	str	r3, [r7, #24]
        temp &= ~(iocurrent);
 80094ae:	693b      	ldr	r3, [r7, #16]
 80094b0:	43db      	mvns	r3, r3
 80094b2:	69ba      	ldr	r2, [r7, #24]
 80094b4:	4013      	ands	r3, r2
 80094b6:	61bb      	str	r3, [r7, #24]
        if ((GPIO_Init->Mode & TRIGGER_FALLING) != 0x00U)
 80094b8:	683b      	ldr	r3, [r7, #0]
 80094ba:	685b      	ldr	r3, [r3, #4]
 80094bc:	f403 1300 	and.w	r3, r3, #2097152	@ 0x200000
 80094c0:	2b00      	cmp	r3, #0
 80094c2:	d003      	beq.n	80094cc <HAL_GPIO_Init+0x2dc>
        {
          temp |= iocurrent;
 80094c4:	69ba      	ldr	r2, [r7, #24]
 80094c6:	693b      	ldr	r3, [r7, #16]
 80094c8:	4313      	orrs	r3, r2
 80094ca:	61bb      	str	r3, [r7, #24]
        }
        EXTI->FTSR1 = temp;
 80094cc:	f04f 42b0 	mov.w	r2, #1476395008	@ 0x58000000
 80094d0:	69bb      	ldr	r3, [r7, #24]
 80094d2:	6053      	str	r3, [r2, #4]

        temp = EXTI_CurrentCPU->EMR1;
 80094d4:	697b      	ldr	r3, [r7, #20]
 80094d6:	685b      	ldr	r3, [r3, #4]
 80094d8:	61bb      	str	r3, [r7, #24]
        temp &= ~(iocurrent);
 80094da:	693b      	ldr	r3, [r7, #16]
 80094dc:	43db      	mvns	r3, r3
 80094de:	69ba      	ldr	r2, [r7, #24]
 80094e0:	4013      	ands	r3, r2
 80094e2:	61bb      	str	r3, [r7, #24]
        if ((GPIO_Init->Mode & EXTI_EVT) != 0x00U)
 80094e4:	683b      	ldr	r3, [r7, #0]
 80094e6:	685b      	ldr	r3, [r3, #4]
 80094e8:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
 80094ec:	2b00      	cmp	r3, #0
 80094ee:	d003      	beq.n	80094f8 <HAL_GPIO_Init+0x308>
        {
          temp |= iocurrent;
 80094f0:	69ba      	ldr	r2, [r7, #24]
 80094f2:	693b      	ldr	r3, [r7, #16]
 80094f4:	4313      	orrs	r3, r2
 80094f6:	61bb      	str	r3, [r7, #24]
        }
        EXTI_CurrentCPU->EMR1 = temp;
 80094f8:	697b      	ldr	r3, [r7, #20]
 80094fa:	69ba      	ldr	r2, [r7, #24]
 80094fc:	605a      	str	r2, [r3, #4]

        /* Clear EXTI line configuration */
        temp = EXTI_CurrentCPU->IMR1;
 80094fe:	697b      	ldr	r3, [r7, #20]
 8009500:	681b      	ldr	r3, [r3, #0]
 8009502:	61bb      	str	r3, [r7, #24]
        temp &= ~(iocurrent);
 8009504:	693b      	ldr	r3, [r7, #16]
 8009506:	43db      	mvns	r3, r3
 8009508:	69ba      	ldr	r2, [r7, #24]
 800950a:	4013      	ands	r3, r2
 800950c:	61bb      	str	r3, [r7, #24]
        if ((GPIO_Init->Mode & EXTI_IT) != 0x00U)
 800950e:	683b      	ldr	r3, [r7, #0]
 8009510:	685b      	ldr	r3, [r3, #4]
 8009512:	f403 3380 	and.w	r3, r3, #65536	@ 0x10000
 8009516:	2b00      	cmp	r3, #0
 8009518:	d003      	beq.n	8009522 <HAL_GPIO_Init+0x332>
        {
          temp |= iocurrent;
 800951a:	69ba      	ldr	r2, [r7, #24]
 800951c:	693b      	ldr	r3, [r7, #16]
 800951e:	4313      	orrs	r3, r2
 8009520:	61bb      	str	r3, [r7, #24]
        }
        EXTI_CurrentCPU->IMR1 = temp;
 8009522:	697b      	ldr	r3, [r7, #20]
 8009524:	69ba      	ldr	r2, [r7, #24]
 8009526:	601a      	str	r2, [r3, #0]
      }
    }

    position++;
 8009528:	69fb      	ldr	r3, [r7, #28]
 800952a:	3301      	adds	r3, #1
 800952c:	61fb      	str	r3, [r7, #28]
  while (((GPIO_Init->Pin) >> position) != 0x00U)
 800952e:	683b      	ldr	r3, [r7, #0]
 8009530:	681a      	ldr	r2, [r3, #0]
 8009532:	69fb      	ldr	r3, [r7, #28]
 8009534:	fa22 f303 	lsr.w	r3, r2, r3
 8009538:	2b00      	cmp	r3, #0
 800953a:	f47f ae63 	bne.w	8009204 <HAL_GPIO_Init+0x14>
  }
}
 800953e:	bf00      	nop
 8009540:	bf00      	nop
 8009542:	3724      	adds	r7, #36	@ 0x24
 8009544:	46bd      	mov	sp, r7
 8009546:	f85d 7b04 	ldr.w	r7, [sp], #4
 800954a:	4770      	bx	lr
 800954c:	58000400 	.word	0x58000400

08009550 <HAL_GPIO_WritePin>:
  *            @arg GPIO_PIN_RESET: to clear the port pin
  *            @arg GPIO_PIN_SET: to set the port pin
  * @retval None
  */
void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
{
 8009550:	b480      	push	{r7}
 8009552:	b083      	sub	sp, #12
 8009554:	af00      	add	r7, sp, #0
 8009556:	6078      	str	r0, [r7, #4]
 8009558:	460b      	mov	r3, r1
 800955a:	807b      	strh	r3, [r7, #2]
 800955c:	4613      	mov	r3, r2
 800955e:	707b      	strb	r3, [r7, #1]
  /* Check the parameters */
  assert_param(IS_GPIO_PIN(GPIO_Pin));
  assert_param(IS_GPIO_PIN_ACTION(PinState));

  if (PinState != GPIO_PIN_RESET)
 8009560:	787b      	ldrb	r3, [r7, #1]
 8009562:	2b00      	cmp	r3, #0
 8009564:	d003      	beq.n	800956e <HAL_GPIO_WritePin+0x1e>
  {
    GPIOx->BSRR = GPIO_Pin;
 8009566:	887a      	ldrh	r2, [r7, #2]
 8009568:	687b      	ldr	r3, [r7, #4]
 800956a:	619a      	str	r2, [r3, #24]
  }
  else
  {
    GPIOx->BSRR = (uint32_t)GPIO_Pin << GPIO_NUMBER;
  }
}
 800956c:	e003      	b.n	8009576 <HAL_GPIO_WritePin+0x26>
    GPIOx->BSRR = (uint32_t)GPIO_Pin << GPIO_NUMBER;
 800956e:	887b      	ldrh	r3, [r7, #2]
 8009570:	041a      	lsls	r2, r3, #16
 8009572:	687b      	ldr	r3, [r7, #4]
 8009574:	619a      	str	r2, [r3, #24]
}
 8009576:	bf00      	nop
 8009578:	370c      	adds	r7, #12
 800957a:	46bd      	mov	sp, r7
 800957c:	f85d 7b04 	ldr.w	r7, [sp], #4
 8009580:	4770      	bx	lr
	...

08009584 <HAL_PWREx_ConfigSupply>:
  *         PWR_SMPS_2V5_SUPPLIES_EXT are used only for lines that supports SMPS
  *         regulator.
  * @retval HAL status.
  */
HAL_StatusTypeDef HAL_PWREx_ConfigSupply (uint32_t SupplySource)
{
 8009584:	b580      	push	{r7, lr}
 8009586:	b084      	sub	sp, #16
 8009588:	af00      	add	r7, sp, #0
 800958a:	6078      	str	r0, [r7, #4]
  /* Check the parameters */
  assert_param (IS_PWR_SUPPLY (SupplySource));

  /* Check if supply source was configured */
#if defined (PWR_FLAG_SCUEN)
  if (__HAL_PWR_GET_FLAG (PWR_FLAG_SCUEN) == 0U)
 800958c:	4b19      	ldr	r3, [pc, #100]	@ (80095f4 <HAL_PWREx_ConfigSupply+0x70>)
 800958e:	68db      	ldr	r3, [r3, #12]
 8009590:	f003 0304 	and.w	r3, r3, #4
 8009594:	2b04      	cmp	r3, #4
 8009596:	d00a      	beq.n	80095ae <HAL_PWREx_ConfigSupply+0x2a>
#else
  if ((PWR->CR3 & (PWR_CR3_SMPSEN | PWR_CR3_LDOEN | PWR_CR3_BYPASS)) != (PWR_CR3_SMPSEN | PWR_CR3_LDOEN))
#endif /* defined (PWR_FLAG_SCUEN) */
  {
    /* Check supply configuration */
    if ((PWR->CR3 & PWR_SUPPLY_CONFIG_MASK) != SupplySource)
 8009598:	4b16      	ldr	r3, [pc, #88]	@ (80095f4 <HAL_PWREx_ConfigSupply+0x70>)
 800959a:	68db      	ldr	r3, [r3, #12]
 800959c:	f003 0307 	and.w	r3, r3, #7
 80095a0:	687a      	ldr	r2, [r7, #4]
 80095a2:	429a      	cmp	r2, r3
 80095a4:	d001      	beq.n	80095aa <HAL_PWREx_ConfigSupply+0x26>
    {
      /* Supply configuration update locked, can't apply a new supply config */
      return HAL_ERROR;
 80095a6:	2301      	movs	r3, #1
 80095a8:	e01f      	b.n	80095ea <HAL_PWREx_ConfigSupply+0x66>
    else
    {
      /* Supply configuration update locked, but new supply configuration
         matches with old supply configuration : nothing to do
      */
      return HAL_OK;
 80095aa:	2300      	movs	r3, #0
 80095ac:	e01d      	b.n	80095ea <HAL_PWREx_ConfigSupply+0x66>
    }
  }

  /* Set the power supply configuration */
  MODIFY_REG (PWR->CR3, PWR_SUPPLY_CONFIG_MASK, SupplySource);
 80095ae:	4b11      	ldr	r3, [pc, #68]	@ (80095f4 <HAL_PWREx_ConfigSupply+0x70>)
 80095b0:	68db      	ldr	r3, [r3, #12]
 80095b2:	f023 0207 	bic.w	r2, r3, #7
 80095b6:	490f      	ldr	r1, [pc, #60]	@ (80095f4 <HAL_PWREx_ConfigSupply+0x70>)
 80095b8:	687b      	ldr	r3, [r7, #4]
 80095ba:	4313      	orrs	r3, r2
 80095bc:	60cb      	str	r3, [r1, #12]

  /* Get tick */
  tickstart = HAL_GetTick ();
 80095be:	f7fb fae7 	bl	8004b90 <HAL_GetTick>
 80095c2:	60f8      	str	r0, [r7, #12]

  /* Wait till voltage level flag is set */
  while (__HAL_PWR_GET_FLAG (PWR_FLAG_ACTVOSRDY) == 0U)
 80095c4:	e009      	b.n	80095da <HAL_PWREx_ConfigSupply+0x56>
  {
    if ((HAL_GetTick () - tickstart) > PWR_FLAG_SETTING_DELAY)
 80095c6:	f7fb fae3 	bl	8004b90 <HAL_GetTick>
 80095ca:	4602      	mov	r2, r0
 80095cc:	68fb      	ldr	r3, [r7, #12]
 80095ce:	1ad3      	subs	r3, r2, r3
 80095d0:	f5b3 7f7a 	cmp.w	r3, #1000	@ 0x3e8
 80095d4:	d901      	bls.n	80095da <HAL_PWREx_ConfigSupply+0x56>
    {
      return HAL_ERROR;
 80095d6:	2301      	movs	r3, #1
 80095d8:	e007      	b.n	80095ea <HAL_PWREx_ConfigSupply+0x66>
  while (__HAL_PWR_GET_FLAG (PWR_FLAG_ACTVOSRDY) == 0U)
 80095da:	4b06      	ldr	r3, [pc, #24]	@ (80095f4 <HAL_PWREx_ConfigSupply+0x70>)
 80095dc:	685b      	ldr	r3, [r3, #4]
 80095de:	f403 5300 	and.w	r3, r3, #8192	@ 0x2000
 80095e2:	f5b3 5f00 	cmp.w	r3, #8192	@ 0x2000
 80095e6:	d1ee      	bne.n	80095c6 <HAL_PWREx_ConfigSupply+0x42>
      }
    }
  }
#endif /* defined (SMPS) */

  return HAL_OK;
 80095e8:	2300      	movs	r3, #0
}
 80095ea:	4618      	mov	r0, r3
 80095ec:	3710      	adds	r7, #16
 80095ee:	46bd      	mov	sp, r7
 80095f0:	bd80      	pop	{r7, pc}
 80095f2:	bf00      	nop
 80095f4:	58024800 	.word	0x58024800

080095f8 <HAL_RCC_OscConfig>:
  *         supported by this function. User should request a transition to HSE Off
  *         first and then HSE On or HSE Bypass.
  * @retval HAL status
  */
__weak HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
{
 80095f8:	b580      	push	{r7, lr}
 80095fa:	b08c      	sub	sp, #48	@ 0x30
 80095fc:	af00      	add	r7, sp, #0
 80095fe:	6078      	str	r0, [r7, #4]
  uint32_t tickstart;
  uint32_t temp1_pllckcfg, temp2_pllckcfg;

  /* Check Null pointer */
  if (RCC_OscInitStruct == NULL)
 8009600:	687b      	ldr	r3, [r7, #4]
 8009602:	2b00      	cmp	r3, #0
 8009604:	d102      	bne.n	800960c <HAL_RCC_OscConfig+0x14>
  {
    return HAL_ERROR;
 8009606:	2301      	movs	r3, #1
 8009608:	f000 bc48 	b.w	8009e9c <HAL_RCC_OscConfig+0x8a4>
  }

  /* Check the parameters */
  assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
  /*------------------------------- HSE Configuration ------------------------*/
  if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
 800960c:	687b      	ldr	r3, [r7, #4]
 800960e:	681b      	ldr	r3, [r3, #0]
 8009610:	f003 0301 	and.w	r3, r3, #1
 8009614:	2b00      	cmp	r3, #0
 8009616:	f000 8088 	beq.w	800972a <HAL_RCC_OscConfig+0x132>
  {
    /* Check the parameters */
    assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));

    const uint32_t temp_sysclksrc = __HAL_RCC_GET_SYSCLK_SOURCE();
 800961a:	4b99      	ldr	r3, [pc, #612]	@ (8009880 <HAL_RCC_OscConfig+0x288>)
 800961c:	691b      	ldr	r3, [r3, #16]
 800961e:	f003 0338 	and.w	r3, r3, #56	@ 0x38
 8009622:	62fb      	str	r3, [r7, #44]	@ 0x2c
    const uint32_t temp_pllckselr = RCC->PLLCKSELR;
 8009624:	4b96      	ldr	r3, [pc, #600]	@ (8009880 <HAL_RCC_OscConfig+0x288>)
 8009626:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 8009628:	62bb      	str	r3, [r7, #40]	@ 0x28
    /* When the HSE is used as system clock or clock source for PLL in these cases HSE will not disabled */
    if ((temp_sysclksrc == RCC_CFGR_SWS_HSE) || ((temp_sysclksrc == RCC_CFGR_SWS_PLL1) && ((temp_pllckselr & RCC_PLLCKSELR_PLLSRC) == RCC_PLLCKSELR_PLLSRC_HSE)))
 800962a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 800962c:	2b10      	cmp	r3, #16
 800962e:	d007      	beq.n	8009640 <HAL_RCC_OscConfig+0x48>
 8009630:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8009632:	2b18      	cmp	r3, #24
 8009634:	d111      	bne.n	800965a <HAL_RCC_OscConfig+0x62>
 8009636:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8009638:	f003 0303 	and.w	r3, r3, #3
 800963c:	2b02      	cmp	r3, #2
 800963e:	d10c      	bne.n	800965a <HAL_RCC_OscConfig+0x62>
    {
      if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
 8009640:	4b8f      	ldr	r3, [pc, #572]	@ (8009880 <HAL_RCC_OscConfig+0x288>)
 8009642:	681b      	ldr	r3, [r3, #0]
 8009644:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
 8009648:	2b00      	cmp	r3, #0
 800964a:	d06d      	beq.n	8009728 <HAL_RCC_OscConfig+0x130>
 800964c:	687b      	ldr	r3, [r7, #4]
 800964e:	685b      	ldr	r3, [r3, #4]
 8009650:	2b00      	cmp	r3, #0
 8009652:	d169      	bne.n	8009728 <HAL_RCC_OscConfig+0x130>
      {
        return HAL_ERROR;
 8009654:	2301      	movs	r3, #1
 8009656:	f000 bc21 	b.w	8009e9c <HAL_RCC_OscConfig+0x8a4>
      }
    }
    else
    {
      /* Set the new HSE configuration ---------------------------------------*/
      __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
 800965a:	687b      	ldr	r3, [r7, #4]
 800965c:	685b      	ldr	r3, [r3, #4]
 800965e:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 8009662:	d106      	bne.n	8009672 <HAL_RCC_OscConfig+0x7a>
 8009664:	4b86      	ldr	r3, [pc, #536]	@ (8009880 <HAL_RCC_OscConfig+0x288>)
 8009666:	681b      	ldr	r3, [r3, #0]
 8009668:	4a85      	ldr	r2, [pc, #532]	@ (8009880 <HAL_RCC_OscConfig+0x288>)
 800966a:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
 800966e:	6013      	str	r3, [r2, #0]
 8009670:	e02e      	b.n	80096d0 <HAL_RCC_OscConfig+0xd8>
 8009672:	687b      	ldr	r3, [r7, #4]
 8009674:	685b      	ldr	r3, [r3, #4]
 8009676:	2b00      	cmp	r3, #0
 8009678:	d10c      	bne.n	8009694 <HAL_RCC_OscConfig+0x9c>
 800967a:	4b81      	ldr	r3, [pc, #516]	@ (8009880 <HAL_RCC_OscConfig+0x288>)
 800967c:	681b      	ldr	r3, [r3, #0]
 800967e:	4a80      	ldr	r2, [pc, #512]	@ (8009880 <HAL_RCC_OscConfig+0x288>)
 8009680:	f423 3380 	bic.w	r3, r3, #65536	@ 0x10000
 8009684:	6013      	str	r3, [r2, #0]
 8009686:	4b7e      	ldr	r3, [pc, #504]	@ (8009880 <HAL_RCC_OscConfig+0x288>)
 8009688:	681b      	ldr	r3, [r3, #0]
 800968a:	4a7d      	ldr	r2, [pc, #500]	@ (8009880 <HAL_RCC_OscConfig+0x288>)
 800968c:	f423 2380 	bic.w	r3, r3, #262144	@ 0x40000
 8009690:	6013      	str	r3, [r2, #0]
 8009692:	e01d      	b.n	80096d0 <HAL_RCC_OscConfig+0xd8>
 8009694:	687b      	ldr	r3, [r7, #4]
 8009696:	685b      	ldr	r3, [r3, #4]
 8009698:	f5b3 2fa0 	cmp.w	r3, #327680	@ 0x50000
 800969c:	d10c      	bne.n	80096b8 <HAL_RCC_OscConfig+0xc0>
 800969e:	4b78      	ldr	r3, [pc, #480]	@ (8009880 <HAL_RCC_OscConfig+0x288>)
 80096a0:	681b      	ldr	r3, [r3, #0]
 80096a2:	4a77      	ldr	r2, [pc, #476]	@ (8009880 <HAL_RCC_OscConfig+0x288>)
 80096a4:	f443 2380 	orr.w	r3, r3, #262144	@ 0x40000
 80096a8:	6013      	str	r3, [r2, #0]
 80096aa:	4b75      	ldr	r3, [pc, #468]	@ (8009880 <HAL_RCC_OscConfig+0x288>)
 80096ac:	681b      	ldr	r3, [r3, #0]
 80096ae:	4a74      	ldr	r2, [pc, #464]	@ (8009880 <HAL_RCC_OscConfig+0x288>)
 80096b0:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
 80096b4:	6013      	str	r3, [r2, #0]
 80096b6:	e00b      	b.n	80096d0 <HAL_RCC_OscConfig+0xd8>
 80096b8:	4b71      	ldr	r3, [pc, #452]	@ (8009880 <HAL_RCC_OscConfig+0x288>)
 80096ba:	681b      	ldr	r3, [r3, #0]
 80096bc:	4a70      	ldr	r2, [pc, #448]	@ (8009880 <HAL_RCC_OscConfig+0x288>)
 80096be:	f423 3380 	bic.w	r3, r3, #65536	@ 0x10000
 80096c2:	6013      	str	r3, [r2, #0]
 80096c4:	4b6e      	ldr	r3, [pc, #440]	@ (8009880 <HAL_RCC_OscConfig+0x288>)
 80096c6:	681b      	ldr	r3, [r3, #0]
 80096c8:	4a6d      	ldr	r2, [pc, #436]	@ (8009880 <HAL_RCC_OscConfig+0x288>)
 80096ca:	f423 2380 	bic.w	r3, r3, #262144	@ 0x40000
 80096ce:	6013      	str	r3, [r2, #0]

      /* Check the HSE State */
      if (RCC_OscInitStruct->HSEState != RCC_HSE_OFF)
 80096d0:	687b      	ldr	r3, [r7, #4]
 80096d2:	685b      	ldr	r3, [r3, #4]
 80096d4:	2b00      	cmp	r3, #0
 80096d6:	d013      	beq.n	8009700 <HAL_RCC_OscConfig+0x108>
      {
        /* Get Start Tick*/
        tickstart = HAL_GetTick();
 80096d8:	f7fb fa5a 	bl	8004b90 <HAL_GetTick>
 80096dc:	6278      	str	r0, [r7, #36]	@ 0x24

        /* Wait till HSE is ready */
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == 0U)
 80096de:	e008      	b.n	80096f2 <HAL_RCC_OscConfig+0xfa>
        {
          if ((uint32_t)(HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
 80096e0:	f7fb fa56 	bl	8004b90 <HAL_GetTick>
 80096e4:	4602      	mov	r2, r0
 80096e6:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80096e8:	1ad3      	subs	r3, r2, r3
 80096ea:	2b64      	cmp	r3, #100	@ 0x64
 80096ec:	d901      	bls.n	80096f2 <HAL_RCC_OscConfig+0xfa>
          {
            return HAL_TIMEOUT;
 80096ee:	2303      	movs	r3, #3
 80096f0:	e3d4      	b.n	8009e9c <HAL_RCC_OscConfig+0x8a4>
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == 0U)
 80096f2:	4b63      	ldr	r3, [pc, #396]	@ (8009880 <HAL_RCC_OscConfig+0x288>)
 80096f4:	681b      	ldr	r3, [r3, #0]
 80096f6:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
 80096fa:	2b00      	cmp	r3, #0
 80096fc:	d0f0      	beq.n	80096e0 <HAL_RCC_OscConfig+0xe8>
 80096fe:	e014      	b.n	800972a <HAL_RCC_OscConfig+0x132>
        }
      }
      else
      {
        /* Get Start Tick*/
        tickstart = HAL_GetTick();
 8009700:	f7fb fa46 	bl	8004b90 <HAL_GetTick>
 8009704:	6278      	str	r0, [r7, #36]	@ 0x24

        /* Wait till HSE is disabled */
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U)
 8009706:	e008      	b.n	800971a <HAL_RCC_OscConfig+0x122>
        {
          if ((uint32_t)(HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
 8009708:	f7fb fa42 	bl	8004b90 <HAL_GetTick>
 800970c:	4602      	mov	r2, r0
 800970e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8009710:	1ad3      	subs	r3, r2, r3
 8009712:	2b64      	cmp	r3, #100	@ 0x64
 8009714:	d901      	bls.n	800971a <HAL_RCC_OscConfig+0x122>
          {
            return HAL_TIMEOUT;
 8009716:	2303      	movs	r3, #3
 8009718:	e3c0      	b.n	8009e9c <HAL_RCC_OscConfig+0x8a4>
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U)
 800971a:	4b59      	ldr	r3, [pc, #356]	@ (8009880 <HAL_RCC_OscConfig+0x288>)
 800971c:	681b      	ldr	r3, [r3, #0]
 800971e:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
 8009722:	2b00      	cmp	r3, #0
 8009724:	d1f0      	bne.n	8009708 <HAL_RCC_OscConfig+0x110>
 8009726:	e000      	b.n	800972a <HAL_RCC_OscConfig+0x132>
      if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
 8009728:	bf00      	nop
        }
      }
    }
  }
  /*----------------------------- HSI Configuration --------------------------*/
  if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
 800972a:	687b      	ldr	r3, [r7, #4]
 800972c:	681b      	ldr	r3, [r3, #0]
 800972e:	f003 0302 	and.w	r3, r3, #2
 8009732:	2b00      	cmp	r3, #0
 8009734:	f000 80ca 	beq.w	80098cc <HAL_RCC_OscConfig+0x2d4>
    /* Check the parameters */
    assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
    assert_param(IS_RCC_HSICALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));

    /* When the HSI is used as system clock it will not be disabled */
    const uint32_t temp_sysclksrc = __HAL_RCC_GET_SYSCLK_SOURCE();
 8009738:	4b51      	ldr	r3, [pc, #324]	@ (8009880 <HAL_RCC_OscConfig+0x288>)
 800973a:	691b      	ldr	r3, [r3, #16]
 800973c:	f003 0338 	and.w	r3, r3, #56	@ 0x38
 8009740:	623b      	str	r3, [r7, #32]
    const uint32_t temp_pllckselr = RCC->PLLCKSELR;
 8009742:	4b4f      	ldr	r3, [pc, #316]	@ (8009880 <HAL_RCC_OscConfig+0x288>)
 8009744:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 8009746:	61fb      	str	r3, [r7, #28]
    if ((temp_sysclksrc == RCC_CFGR_SWS_HSI) || ((temp_sysclksrc == RCC_CFGR_SWS_PLL1) && ((temp_pllckselr & RCC_PLLCKSELR_PLLSRC) == RCC_PLLCKSELR_PLLSRC_HSI)))
 8009748:	6a3b      	ldr	r3, [r7, #32]
 800974a:	2b00      	cmp	r3, #0
 800974c:	d007      	beq.n	800975e <HAL_RCC_OscConfig+0x166>
 800974e:	6a3b      	ldr	r3, [r7, #32]
 8009750:	2b18      	cmp	r3, #24
 8009752:	d156      	bne.n	8009802 <HAL_RCC_OscConfig+0x20a>
 8009754:	69fb      	ldr	r3, [r7, #28]
 8009756:	f003 0303 	and.w	r3, r3, #3
 800975a:	2b00      	cmp	r3, #0
 800975c:	d151      	bne.n	8009802 <HAL_RCC_OscConfig+0x20a>
    {
      /* When HSI is used as system clock it will not be disabled */
      if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U) && (RCC_OscInitStruct->HSIState == RCC_HSI_OFF))
 800975e:	4b48      	ldr	r3, [pc, #288]	@ (8009880 <HAL_RCC_OscConfig+0x288>)
 8009760:	681b      	ldr	r3, [r3, #0]
 8009762:	f003 0304 	and.w	r3, r3, #4
 8009766:	2b00      	cmp	r3, #0
 8009768:	d005      	beq.n	8009776 <HAL_RCC_OscConfig+0x17e>
 800976a:	687b      	ldr	r3, [r7, #4]
 800976c:	68db      	ldr	r3, [r3, #12]
 800976e:	2b00      	cmp	r3, #0
 8009770:	d101      	bne.n	8009776 <HAL_RCC_OscConfig+0x17e>
      {
        return HAL_ERROR;
 8009772:	2301      	movs	r3, #1
 8009774:	e392      	b.n	8009e9c <HAL_RCC_OscConfig+0x8a4>
      }
      /* Otherwise, only HSI division and calibration are allowed */
      else
      {
        /* Enable the Internal High Speed oscillator (HSI, HSIDIV2, HSIDIV4, or HSIDIV8) */
        __HAL_RCC_HSI_CONFIG(RCC_OscInitStruct->HSIState);
 8009776:	4b42      	ldr	r3, [pc, #264]	@ (8009880 <HAL_RCC_OscConfig+0x288>)
 8009778:	681b      	ldr	r3, [r3, #0]
 800977a:	f023 0219 	bic.w	r2, r3, #25
 800977e:	687b      	ldr	r3, [r7, #4]
 8009780:	68db      	ldr	r3, [r3, #12]
 8009782:	493f      	ldr	r1, [pc, #252]	@ (8009880 <HAL_RCC_OscConfig+0x288>)
 8009784:	4313      	orrs	r3, r2
 8009786:	600b      	str	r3, [r1, #0]

        /* Get Start Tick*/
        tickstart = HAL_GetTick();
 8009788:	f7fb fa02 	bl	8004b90 <HAL_GetTick>
 800978c:	6278      	str	r0, [r7, #36]	@ 0x24

        /* Wait till HSI is ready */
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U)
 800978e:	e008      	b.n	80097a2 <HAL_RCC_OscConfig+0x1aa>
        {
          if ((uint32_t)(HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
 8009790:	f7fb f9fe 	bl	8004b90 <HAL_GetTick>
 8009794:	4602      	mov	r2, r0
 8009796:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8009798:	1ad3      	subs	r3, r2, r3
 800979a:	2b02      	cmp	r3, #2
 800979c:	d901      	bls.n	80097a2 <HAL_RCC_OscConfig+0x1aa>
          {
            return HAL_TIMEOUT;
 800979e:	2303      	movs	r3, #3
 80097a0:	e37c      	b.n	8009e9c <HAL_RCC_OscConfig+0x8a4>
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U)
 80097a2:	4b37      	ldr	r3, [pc, #220]	@ (8009880 <HAL_RCC_OscConfig+0x288>)
 80097a4:	681b      	ldr	r3, [r3, #0]
 80097a6:	f003 0304 	and.w	r3, r3, #4
 80097aa:	2b00      	cmp	r3, #0
 80097ac:	d0f0      	beq.n	8009790 <HAL_RCC_OscConfig+0x198>
          }
        }
        /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
        __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
 80097ae:	f7fb fa1f 	bl	8004bf0 <HAL_GetREVID>
 80097b2:	4603      	mov	r3, r0
 80097b4:	f241 0203 	movw	r2, #4099	@ 0x1003
 80097b8:	4293      	cmp	r3, r2
 80097ba:	d817      	bhi.n	80097ec <HAL_RCC_OscConfig+0x1f4>
 80097bc:	687b      	ldr	r3, [r7, #4]
 80097be:	691b      	ldr	r3, [r3, #16]
 80097c0:	2b40      	cmp	r3, #64	@ 0x40
 80097c2:	d108      	bne.n	80097d6 <HAL_RCC_OscConfig+0x1de>
 80097c4:	4b2e      	ldr	r3, [pc, #184]	@ (8009880 <HAL_RCC_OscConfig+0x288>)
 80097c6:	685b      	ldr	r3, [r3, #4]
 80097c8:	f423 337c 	bic.w	r3, r3, #258048	@ 0x3f000
 80097cc:	4a2c      	ldr	r2, [pc, #176]	@ (8009880 <HAL_RCC_OscConfig+0x288>)
 80097ce:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 80097d2:	6053      	str	r3, [r2, #4]
      if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U) && (RCC_OscInitStruct->HSIState == RCC_HSI_OFF))
 80097d4:	e07a      	b.n	80098cc <HAL_RCC_OscConfig+0x2d4>
        __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
 80097d6:	4b2a      	ldr	r3, [pc, #168]	@ (8009880 <HAL_RCC_OscConfig+0x288>)
 80097d8:	685b      	ldr	r3, [r3, #4]
 80097da:	f423 327c 	bic.w	r2, r3, #258048	@ 0x3f000
 80097de:	687b      	ldr	r3, [r7, #4]
 80097e0:	691b      	ldr	r3, [r3, #16]
 80097e2:	031b      	lsls	r3, r3, #12
 80097e4:	4926      	ldr	r1, [pc, #152]	@ (8009880 <HAL_RCC_OscConfig+0x288>)
 80097e6:	4313      	orrs	r3, r2
 80097e8:	604b      	str	r3, [r1, #4]
      if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U) && (RCC_OscInitStruct->HSIState == RCC_HSI_OFF))
 80097ea:	e06f      	b.n	80098cc <HAL_RCC_OscConfig+0x2d4>
        __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
 80097ec:	4b24      	ldr	r3, [pc, #144]	@ (8009880 <HAL_RCC_OscConfig+0x288>)
 80097ee:	685b      	ldr	r3, [r3, #4]
 80097f0:	f023 42fe 	bic.w	r2, r3, #2130706432	@ 0x7f000000
 80097f4:	687b      	ldr	r3, [r7, #4]
 80097f6:	691b      	ldr	r3, [r3, #16]
 80097f8:	061b      	lsls	r3, r3, #24
 80097fa:	4921      	ldr	r1, [pc, #132]	@ (8009880 <HAL_RCC_OscConfig+0x288>)
 80097fc:	4313      	orrs	r3, r2
 80097fe:	604b      	str	r3, [r1, #4]
      if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U) && (RCC_OscInitStruct->HSIState == RCC_HSI_OFF))
 8009800:	e064      	b.n	80098cc <HAL_RCC_OscConfig+0x2d4>
    }

    else
    {
      /* Check the HSI State */
      if ((RCC_OscInitStruct->HSIState) != RCC_HSI_OFF)
 8009802:	687b      	ldr	r3, [r7, #4]
 8009804:	68db      	ldr	r3, [r3, #12]
 8009806:	2b00      	cmp	r3, #0
 8009808:	d047      	beq.n	800989a <HAL_RCC_OscConfig+0x2a2>
      {
        /* Enable the Internal High Speed oscillator (HSI, HSIDIV2,HSIDIV4, or HSIDIV8) */
        __HAL_RCC_HSI_CONFIG(RCC_OscInitStruct->HSIState);
 800980a:	4b1d      	ldr	r3, [pc, #116]	@ (8009880 <HAL_RCC_OscConfig+0x288>)
 800980c:	681b      	ldr	r3, [r3, #0]
 800980e:	f023 0219 	bic.w	r2, r3, #25
 8009812:	687b      	ldr	r3, [r7, #4]
 8009814:	68db      	ldr	r3, [r3, #12]
 8009816:	491a      	ldr	r1, [pc, #104]	@ (8009880 <HAL_RCC_OscConfig+0x288>)
 8009818:	4313      	orrs	r3, r2
 800981a:	600b      	str	r3, [r1, #0]

        /* Get Start Tick*/
        tickstart = HAL_GetTick();
 800981c:	f7fb f9b8 	bl	8004b90 <HAL_GetTick>
 8009820:	6278      	str	r0, [r7, #36]	@ 0x24

        /* Wait till HSI is ready */
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U)
 8009822:	e008      	b.n	8009836 <HAL_RCC_OscConfig+0x23e>
        {
          if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
 8009824:	f7fb f9b4 	bl	8004b90 <HAL_GetTick>
 8009828:	4602      	mov	r2, r0
 800982a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800982c:	1ad3      	subs	r3, r2, r3
 800982e:	2b02      	cmp	r3, #2
 8009830:	d901      	bls.n	8009836 <HAL_RCC_OscConfig+0x23e>
          {
            return HAL_TIMEOUT;
 8009832:	2303      	movs	r3, #3
 8009834:	e332      	b.n	8009e9c <HAL_RCC_OscConfig+0x8a4>
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U)
 8009836:	4b12      	ldr	r3, [pc, #72]	@ (8009880 <HAL_RCC_OscConfig+0x288>)
 8009838:	681b      	ldr	r3, [r3, #0]
 800983a:	f003 0304 	and.w	r3, r3, #4
 800983e:	2b00      	cmp	r3, #0
 8009840:	d0f0      	beq.n	8009824 <HAL_RCC_OscConfig+0x22c>
          }
        }

        /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
        __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
 8009842:	f7fb f9d5 	bl	8004bf0 <HAL_GetREVID>
 8009846:	4603      	mov	r3, r0
 8009848:	f241 0203 	movw	r2, #4099	@ 0x1003
 800984c:	4293      	cmp	r3, r2
 800984e:	d819      	bhi.n	8009884 <HAL_RCC_OscConfig+0x28c>
 8009850:	687b      	ldr	r3, [r7, #4]
 8009852:	691b      	ldr	r3, [r3, #16]
 8009854:	2b40      	cmp	r3, #64	@ 0x40
 8009856:	d108      	bne.n	800986a <HAL_RCC_OscConfig+0x272>
 8009858:	4b09      	ldr	r3, [pc, #36]	@ (8009880 <HAL_RCC_OscConfig+0x288>)
 800985a:	685b      	ldr	r3, [r3, #4]
 800985c:	f423 337c 	bic.w	r3, r3, #258048	@ 0x3f000
 8009860:	4a07      	ldr	r2, [pc, #28]	@ (8009880 <HAL_RCC_OscConfig+0x288>)
 8009862:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 8009866:	6053      	str	r3, [r2, #4]
 8009868:	e030      	b.n	80098cc <HAL_RCC_OscConfig+0x2d4>
 800986a:	4b05      	ldr	r3, [pc, #20]	@ (8009880 <HAL_RCC_OscConfig+0x288>)
 800986c:	685b      	ldr	r3, [r3, #4]
 800986e:	f423 327c 	bic.w	r2, r3, #258048	@ 0x3f000
 8009872:	687b      	ldr	r3, [r7, #4]
 8009874:	691b      	ldr	r3, [r3, #16]
 8009876:	031b      	lsls	r3, r3, #12
 8009878:	4901      	ldr	r1, [pc, #4]	@ (8009880 <HAL_RCC_OscConfig+0x288>)
 800987a:	4313      	orrs	r3, r2
 800987c:	604b      	str	r3, [r1, #4]
 800987e:	e025      	b.n	80098cc <HAL_RCC_OscConfig+0x2d4>
 8009880:	58024400 	.word	0x58024400
 8009884:	4b9a      	ldr	r3, [pc, #616]	@ (8009af0 <HAL_RCC_OscConfig+0x4f8>)
 8009886:	685b      	ldr	r3, [r3, #4]
 8009888:	f023 42fe 	bic.w	r2, r3, #2130706432	@ 0x7f000000
 800988c:	687b      	ldr	r3, [r7, #4]
 800988e:	691b      	ldr	r3, [r3, #16]
 8009890:	061b      	lsls	r3, r3, #24
 8009892:	4997      	ldr	r1, [pc, #604]	@ (8009af0 <HAL_RCC_OscConfig+0x4f8>)
 8009894:	4313      	orrs	r3, r2
 8009896:	604b      	str	r3, [r1, #4]
 8009898:	e018      	b.n	80098cc <HAL_RCC_OscConfig+0x2d4>
      }
      else
      {
        /* Disable the Internal High Speed oscillator (HSI). */
        __HAL_RCC_HSI_DISABLE();
 800989a:	4b95      	ldr	r3, [pc, #596]	@ (8009af0 <HAL_RCC_OscConfig+0x4f8>)
 800989c:	681b      	ldr	r3, [r3, #0]
 800989e:	4a94      	ldr	r2, [pc, #592]	@ (8009af0 <HAL_RCC_OscConfig+0x4f8>)
 80098a0:	f023 0301 	bic.w	r3, r3, #1
 80098a4:	6013      	str	r3, [r2, #0]

        /* Get Start Tick*/
        tickstart = HAL_GetTick();
 80098a6:	f7fb f973 	bl	8004b90 <HAL_GetTick>
 80098aa:	6278      	str	r0, [r7, #36]	@ 0x24

        /* Wait till HSI is disabled */
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U)
 80098ac:	e008      	b.n	80098c0 <HAL_RCC_OscConfig+0x2c8>
        {
          if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
 80098ae:	f7fb f96f 	bl	8004b90 <HAL_GetTick>
 80098b2:	4602      	mov	r2, r0
 80098b4:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80098b6:	1ad3      	subs	r3, r2, r3
 80098b8:	2b02      	cmp	r3, #2
 80098ba:	d901      	bls.n	80098c0 <HAL_RCC_OscConfig+0x2c8>
          {
            return HAL_TIMEOUT;
 80098bc:	2303      	movs	r3, #3
 80098be:	e2ed      	b.n	8009e9c <HAL_RCC_OscConfig+0x8a4>
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U)
 80098c0:	4b8b      	ldr	r3, [pc, #556]	@ (8009af0 <HAL_RCC_OscConfig+0x4f8>)
 80098c2:	681b      	ldr	r3, [r3, #0]
 80098c4:	f003 0304 	and.w	r3, r3, #4
 80098c8:	2b00      	cmp	r3, #0
 80098ca:	d1f0      	bne.n	80098ae <HAL_RCC_OscConfig+0x2b6>
        }
      }
    }
  }
  /*----------------------------- CSI Configuration --------------------------*/
  if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_CSI) == RCC_OSCILLATORTYPE_CSI)
 80098cc:	687b      	ldr	r3, [r7, #4]
 80098ce:	681b      	ldr	r3, [r3, #0]
 80098d0:	f003 0310 	and.w	r3, r3, #16
 80098d4:	2b00      	cmp	r3, #0
 80098d6:	f000 80a9 	beq.w	8009a2c <HAL_RCC_OscConfig+0x434>
    /* Check the parameters */
    assert_param(IS_RCC_CSI(RCC_OscInitStruct->CSIState));
    assert_param(IS_RCC_CSICALIBRATION_VALUE(RCC_OscInitStruct->CSICalibrationValue));

    /* When the CSI is used as system clock it will not disabled */
    const uint32_t temp_sysclksrc = __HAL_RCC_GET_SYSCLK_SOURCE();
 80098da:	4b85      	ldr	r3, [pc, #532]	@ (8009af0 <HAL_RCC_OscConfig+0x4f8>)
 80098dc:	691b      	ldr	r3, [r3, #16]
 80098de:	f003 0338 	and.w	r3, r3, #56	@ 0x38
 80098e2:	61bb      	str	r3, [r7, #24]
    const uint32_t temp_pllckselr = RCC->PLLCKSELR;
 80098e4:	4b82      	ldr	r3, [pc, #520]	@ (8009af0 <HAL_RCC_OscConfig+0x4f8>)
 80098e6:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 80098e8:	617b      	str	r3, [r7, #20]
    if ((temp_sysclksrc == RCC_CFGR_SWS_CSI) || ((temp_sysclksrc == RCC_CFGR_SWS_PLL1) && ((temp_pllckselr & RCC_PLLCKSELR_PLLSRC) == RCC_PLLCKSELR_PLLSRC_CSI)))
 80098ea:	69bb      	ldr	r3, [r7, #24]
 80098ec:	2b08      	cmp	r3, #8
 80098ee:	d007      	beq.n	8009900 <HAL_RCC_OscConfig+0x308>
 80098f0:	69bb      	ldr	r3, [r7, #24]
 80098f2:	2b18      	cmp	r3, #24
 80098f4:	d13a      	bne.n	800996c <HAL_RCC_OscConfig+0x374>
 80098f6:	697b      	ldr	r3, [r7, #20]
 80098f8:	f003 0303 	and.w	r3, r3, #3
 80098fc:	2b01      	cmp	r3, #1
 80098fe:	d135      	bne.n	800996c <HAL_RCC_OscConfig+0x374>
    {
      /* When CSI is used as system clock it will not disabled */
      if ((__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) != 0U) && (RCC_OscInitStruct->CSIState != RCC_CSI_ON))
 8009900:	4b7b      	ldr	r3, [pc, #492]	@ (8009af0 <HAL_RCC_OscConfig+0x4f8>)
 8009902:	681b      	ldr	r3, [r3, #0]
 8009904:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 8009908:	2b00      	cmp	r3, #0
 800990a:	d005      	beq.n	8009918 <HAL_RCC_OscConfig+0x320>
 800990c:	687b      	ldr	r3, [r7, #4]
 800990e:	69db      	ldr	r3, [r3, #28]
 8009910:	2b80      	cmp	r3, #128	@ 0x80
 8009912:	d001      	beq.n	8009918 <HAL_RCC_OscConfig+0x320>
      {
        return HAL_ERROR;
 8009914:	2301      	movs	r3, #1
 8009916:	e2c1      	b.n	8009e9c <HAL_RCC_OscConfig+0x8a4>
      }
      /* Otherwise, just the calibration is allowed */
      else
      {
        /* Adjusts the Internal High Speed oscillator (CSI) calibration value.*/
        __HAL_RCC_CSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->CSICalibrationValue);
 8009918:	f7fb f96a 	bl	8004bf0 <HAL_GetREVID>
 800991c:	4603      	mov	r3, r0
 800991e:	f241 0203 	movw	r2, #4099	@ 0x1003
 8009922:	4293      	cmp	r3, r2
 8009924:	d817      	bhi.n	8009956 <HAL_RCC_OscConfig+0x35e>
 8009926:	687b      	ldr	r3, [r7, #4]
 8009928:	6a1b      	ldr	r3, [r3, #32]
 800992a:	2b20      	cmp	r3, #32
 800992c:	d108      	bne.n	8009940 <HAL_RCC_OscConfig+0x348>
 800992e:	4b70      	ldr	r3, [pc, #448]	@ (8009af0 <HAL_RCC_OscConfig+0x4f8>)
 8009930:	685b      	ldr	r3, [r3, #4]
 8009932:	f023 43f8 	bic.w	r3, r3, #2080374784	@ 0x7c000000
 8009936:	4a6e      	ldr	r2, [pc, #440]	@ (8009af0 <HAL_RCC_OscConfig+0x4f8>)
 8009938:	f043 4380 	orr.w	r3, r3, #1073741824	@ 0x40000000
 800993c:	6053      	str	r3, [r2, #4]
      if ((__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) != 0U) && (RCC_OscInitStruct->CSIState != RCC_CSI_ON))
 800993e:	e075      	b.n	8009a2c <HAL_RCC_OscConfig+0x434>
        __HAL_RCC_CSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->CSICalibrationValue);
 8009940:	4b6b      	ldr	r3, [pc, #428]	@ (8009af0 <HAL_RCC_OscConfig+0x4f8>)
 8009942:	685b      	ldr	r3, [r3, #4]
 8009944:	f023 42f8 	bic.w	r2, r3, #2080374784	@ 0x7c000000
 8009948:	687b      	ldr	r3, [r7, #4]
 800994a:	6a1b      	ldr	r3, [r3, #32]
 800994c:	069b      	lsls	r3, r3, #26
 800994e:	4968      	ldr	r1, [pc, #416]	@ (8009af0 <HAL_RCC_OscConfig+0x4f8>)
 8009950:	4313      	orrs	r3, r2
 8009952:	604b      	str	r3, [r1, #4]
      if ((__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) != 0U) && (RCC_OscInitStruct->CSIState != RCC_CSI_ON))
 8009954:	e06a      	b.n	8009a2c <HAL_RCC_OscConfig+0x434>
        __HAL_RCC_CSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->CSICalibrationValue);
 8009956:	4b66      	ldr	r3, [pc, #408]	@ (8009af0 <HAL_RCC_OscConfig+0x4f8>)
 8009958:	68db      	ldr	r3, [r3, #12]
 800995a:	f023 527c 	bic.w	r2, r3, #1056964608	@ 0x3f000000
 800995e:	687b      	ldr	r3, [r7, #4]
 8009960:	6a1b      	ldr	r3, [r3, #32]
 8009962:	061b      	lsls	r3, r3, #24
 8009964:	4962      	ldr	r1, [pc, #392]	@ (8009af0 <HAL_RCC_OscConfig+0x4f8>)
 8009966:	4313      	orrs	r3, r2
 8009968:	60cb      	str	r3, [r1, #12]
      if ((__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) != 0U) && (RCC_OscInitStruct->CSIState != RCC_CSI_ON))
 800996a:	e05f      	b.n	8009a2c <HAL_RCC_OscConfig+0x434>
      }
    }
    else
    {
      /* Check the CSI State */
      if ((RCC_OscInitStruct->CSIState) != RCC_CSI_OFF)
 800996c:	687b      	ldr	r3, [r7, #4]
 800996e:	69db      	ldr	r3, [r3, #28]
 8009970:	2b00      	cmp	r3, #0
 8009972:	d042      	beq.n	80099fa <HAL_RCC_OscConfig+0x402>
      {
        /* Enable the Internal High Speed oscillator (CSI). */
        __HAL_RCC_CSI_ENABLE();
 8009974:	4b5e      	ldr	r3, [pc, #376]	@ (8009af0 <HAL_RCC_OscConfig+0x4f8>)
 8009976:	681b      	ldr	r3, [r3, #0]
 8009978:	4a5d      	ldr	r2, [pc, #372]	@ (8009af0 <HAL_RCC_OscConfig+0x4f8>)
 800997a:	f043 0380 	orr.w	r3, r3, #128	@ 0x80
 800997e:	6013      	str	r3, [r2, #0]

        /* Get Start Tick*/
        tickstart = HAL_GetTick();
 8009980:	f7fb f906 	bl	8004b90 <HAL_GetTick>
 8009984:	6278      	str	r0, [r7, #36]	@ 0x24

        /* Wait till CSI is ready */
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) == 0U)
 8009986:	e008      	b.n	800999a <HAL_RCC_OscConfig+0x3a2>
        {
          if ((HAL_GetTick() - tickstart) > CSI_TIMEOUT_VALUE)
 8009988:	f7fb f902 	bl	8004b90 <HAL_GetTick>
 800998c:	4602      	mov	r2, r0
 800998e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8009990:	1ad3      	subs	r3, r2, r3
 8009992:	2b02      	cmp	r3, #2
 8009994:	d901      	bls.n	800999a <HAL_RCC_OscConfig+0x3a2>
          {
            return HAL_TIMEOUT;
 8009996:	2303      	movs	r3, #3
 8009998:	e280      	b.n	8009e9c <HAL_RCC_OscConfig+0x8a4>
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) == 0U)
 800999a:	4b55      	ldr	r3, [pc, #340]	@ (8009af0 <HAL_RCC_OscConfig+0x4f8>)
 800999c:	681b      	ldr	r3, [r3, #0]
 800999e:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 80099a2:	2b00      	cmp	r3, #0
 80099a4:	d0f0      	beq.n	8009988 <HAL_RCC_OscConfig+0x390>
          }
        }

        /* Adjusts the Internal High Speed oscillator (CSI) calibration value.*/
        __HAL_RCC_CSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->CSICalibrationValue);
 80099a6:	f7fb f923 	bl	8004bf0 <HAL_GetREVID>
 80099aa:	4603      	mov	r3, r0
 80099ac:	f241 0203 	movw	r2, #4099	@ 0x1003
 80099b0:	4293      	cmp	r3, r2
 80099b2:	d817      	bhi.n	80099e4 <HAL_RCC_OscConfig+0x3ec>
 80099b4:	687b      	ldr	r3, [r7, #4]
 80099b6:	6a1b      	ldr	r3, [r3, #32]
 80099b8:	2b20      	cmp	r3, #32
 80099ba:	d108      	bne.n	80099ce <HAL_RCC_OscConfig+0x3d6>
 80099bc:	4b4c      	ldr	r3, [pc, #304]	@ (8009af0 <HAL_RCC_OscConfig+0x4f8>)
 80099be:	685b      	ldr	r3, [r3, #4]
 80099c0:	f023 43f8 	bic.w	r3, r3, #2080374784	@ 0x7c000000
 80099c4:	4a4a      	ldr	r2, [pc, #296]	@ (8009af0 <HAL_RCC_OscConfig+0x4f8>)
 80099c6:	f043 4380 	orr.w	r3, r3, #1073741824	@ 0x40000000
 80099ca:	6053      	str	r3, [r2, #4]
 80099cc:	e02e      	b.n	8009a2c <HAL_RCC_OscConfig+0x434>
 80099ce:	4b48      	ldr	r3, [pc, #288]	@ (8009af0 <HAL_RCC_OscConfig+0x4f8>)
 80099d0:	685b      	ldr	r3, [r3, #4]
 80099d2:	f023 42f8 	bic.w	r2, r3, #2080374784	@ 0x7c000000
 80099d6:	687b      	ldr	r3, [r7, #4]
 80099d8:	6a1b      	ldr	r3, [r3, #32]
 80099da:	069b      	lsls	r3, r3, #26
 80099dc:	4944      	ldr	r1, [pc, #272]	@ (8009af0 <HAL_RCC_OscConfig+0x4f8>)
 80099de:	4313      	orrs	r3, r2
 80099e0:	604b      	str	r3, [r1, #4]
 80099e2:	e023      	b.n	8009a2c <HAL_RCC_OscConfig+0x434>
 80099e4:	4b42      	ldr	r3, [pc, #264]	@ (8009af0 <HAL_RCC_OscConfig+0x4f8>)
 80099e6:	68db      	ldr	r3, [r3, #12]
 80099e8:	f023 527c 	bic.w	r2, r3, #1056964608	@ 0x3f000000
 80099ec:	687b      	ldr	r3, [r7, #4]
 80099ee:	6a1b      	ldr	r3, [r3, #32]
 80099f0:	061b      	lsls	r3, r3, #24
 80099f2:	493f      	ldr	r1, [pc, #252]	@ (8009af0 <HAL_RCC_OscConfig+0x4f8>)
 80099f4:	4313      	orrs	r3, r2
 80099f6:	60cb      	str	r3, [r1, #12]
 80099f8:	e018      	b.n	8009a2c <HAL_RCC_OscConfig+0x434>
      }
      else
      {
        /* Disable the Internal High Speed oscillator (CSI). */
        __HAL_RCC_CSI_DISABLE();
 80099fa:	4b3d      	ldr	r3, [pc, #244]	@ (8009af0 <HAL_RCC_OscConfig+0x4f8>)
 80099fc:	681b      	ldr	r3, [r3, #0]
 80099fe:	4a3c      	ldr	r2, [pc, #240]	@ (8009af0 <HAL_RCC_OscConfig+0x4f8>)
 8009a00:	f023 0380 	bic.w	r3, r3, #128	@ 0x80
 8009a04:	6013      	str	r3, [r2, #0]

        /* Get Start Tick*/
        tickstart = HAL_GetTick();
 8009a06:	f7fb f8c3 	bl	8004b90 <HAL_GetTick>
 8009a0a:	6278      	str	r0, [r7, #36]	@ 0x24

        /* Wait till CSI is disabled */
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) != 0U)
 8009a0c:	e008      	b.n	8009a20 <HAL_RCC_OscConfig+0x428>
        {
          if ((HAL_GetTick() - tickstart) > CSI_TIMEOUT_VALUE)
 8009a0e:	f7fb f8bf 	bl	8004b90 <HAL_GetTick>
 8009a12:	4602      	mov	r2, r0
 8009a14:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8009a16:	1ad3      	subs	r3, r2, r3
 8009a18:	2b02      	cmp	r3, #2
 8009a1a:	d901      	bls.n	8009a20 <HAL_RCC_OscConfig+0x428>
          {
            return HAL_TIMEOUT;
 8009a1c:	2303      	movs	r3, #3
 8009a1e:	e23d      	b.n	8009e9c <HAL_RCC_OscConfig+0x8a4>
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) != 0U)
 8009a20:	4b33      	ldr	r3, [pc, #204]	@ (8009af0 <HAL_RCC_OscConfig+0x4f8>)
 8009a22:	681b      	ldr	r3, [r3, #0]
 8009a24:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 8009a28:	2b00      	cmp	r3, #0
 8009a2a:	d1f0      	bne.n	8009a0e <HAL_RCC_OscConfig+0x416>
        }
      }
    }
  }
  /*------------------------------ LSI Configuration -------------------------*/
  if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
 8009a2c:	687b      	ldr	r3, [r7, #4]
 8009a2e:	681b      	ldr	r3, [r3, #0]
 8009a30:	f003 0308 	and.w	r3, r3, #8
 8009a34:	2b00      	cmp	r3, #0
 8009a36:	d036      	beq.n	8009aa6 <HAL_RCC_OscConfig+0x4ae>
  {
    /* Check the parameters */
    assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));

    /* Check the LSI State */
    if ((RCC_OscInitStruct->LSIState) != RCC_LSI_OFF)
 8009a38:	687b      	ldr	r3, [r7, #4]
 8009a3a:	695b      	ldr	r3, [r3, #20]
 8009a3c:	2b00      	cmp	r3, #0
 8009a3e:	d019      	beq.n	8009a74 <HAL_RCC_OscConfig+0x47c>
    {
      /* Enable the Internal Low Speed oscillator (LSI). */
      __HAL_RCC_LSI_ENABLE();
 8009a40:	4b2b      	ldr	r3, [pc, #172]	@ (8009af0 <HAL_RCC_OscConfig+0x4f8>)
 8009a42:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 8009a44:	4a2a      	ldr	r2, [pc, #168]	@ (8009af0 <HAL_RCC_OscConfig+0x4f8>)
 8009a46:	f043 0301 	orr.w	r3, r3, #1
 8009a4a:	6753      	str	r3, [r2, #116]	@ 0x74

      /* Get Start Tick*/
      tickstart = HAL_GetTick();
 8009a4c:	f7fb f8a0 	bl	8004b90 <HAL_GetTick>
 8009a50:	6278      	str	r0, [r7, #36]	@ 0x24

      /* Wait till LSI is ready */
      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == 0U)
 8009a52:	e008      	b.n	8009a66 <HAL_RCC_OscConfig+0x46e>
      {
        if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
 8009a54:	f7fb f89c 	bl	8004b90 <HAL_GetTick>
 8009a58:	4602      	mov	r2, r0
 8009a5a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8009a5c:	1ad3      	subs	r3, r2, r3
 8009a5e:	2b02      	cmp	r3, #2
 8009a60:	d901      	bls.n	8009a66 <HAL_RCC_OscConfig+0x46e>
        {
          return HAL_TIMEOUT;
 8009a62:	2303      	movs	r3, #3
 8009a64:	e21a      	b.n	8009e9c <HAL_RCC_OscConfig+0x8a4>
      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == 0U)
 8009a66:	4b22      	ldr	r3, [pc, #136]	@ (8009af0 <HAL_RCC_OscConfig+0x4f8>)
 8009a68:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 8009a6a:	f003 0302 	and.w	r3, r3, #2
 8009a6e:	2b00      	cmp	r3, #0
 8009a70:	d0f0      	beq.n	8009a54 <HAL_RCC_OscConfig+0x45c>
 8009a72:	e018      	b.n	8009aa6 <HAL_RCC_OscConfig+0x4ae>
      }
    }
    else
    {
      /* Disable the Internal Low Speed oscillator (LSI). */
      __HAL_RCC_LSI_DISABLE();
 8009a74:	4b1e      	ldr	r3, [pc, #120]	@ (8009af0 <HAL_RCC_OscConfig+0x4f8>)
 8009a76:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 8009a78:	4a1d      	ldr	r2, [pc, #116]	@ (8009af0 <HAL_RCC_OscConfig+0x4f8>)
 8009a7a:	f023 0301 	bic.w	r3, r3, #1
 8009a7e:	6753      	str	r3, [r2, #116]	@ 0x74

      /* Get Start Tick*/
      tickstart = HAL_GetTick();
 8009a80:	f7fb f886 	bl	8004b90 <HAL_GetTick>
 8009a84:	6278      	str	r0, [r7, #36]	@ 0x24

      /* Wait till LSI is ready */
      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != 0U)
 8009a86:	e008      	b.n	8009a9a <HAL_RCC_OscConfig+0x4a2>
      {
        if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
 8009a88:	f7fb f882 	bl	8004b90 <HAL_GetTick>
 8009a8c:	4602      	mov	r2, r0
 8009a8e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8009a90:	1ad3      	subs	r3, r2, r3
 8009a92:	2b02      	cmp	r3, #2
 8009a94:	d901      	bls.n	8009a9a <HAL_RCC_OscConfig+0x4a2>
        {
          return HAL_TIMEOUT;
 8009a96:	2303      	movs	r3, #3
 8009a98:	e200      	b.n	8009e9c <HAL_RCC_OscConfig+0x8a4>
      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != 0U)
 8009a9a:	4b15      	ldr	r3, [pc, #84]	@ (8009af0 <HAL_RCC_OscConfig+0x4f8>)
 8009a9c:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 8009a9e:	f003 0302 	and.w	r3, r3, #2
 8009aa2:	2b00      	cmp	r3, #0
 8009aa4:	d1f0      	bne.n	8009a88 <HAL_RCC_OscConfig+0x490>
      }
    }
  }

  /*------------------------------ HSI48 Configuration -------------------------*/
  if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI48) == RCC_OSCILLATORTYPE_HSI48)
 8009aa6:	687b      	ldr	r3, [r7, #4]
 8009aa8:	681b      	ldr	r3, [r3, #0]
 8009aaa:	f003 0320 	and.w	r3, r3, #32
 8009aae:	2b00      	cmp	r3, #0
 8009ab0:	d039      	beq.n	8009b26 <HAL_RCC_OscConfig+0x52e>
  {
    /* Check the parameters */
    assert_param(IS_RCC_HSI48(RCC_OscInitStruct->HSI48State));

    /* Check the HSI48 State */
    if ((RCC_OscInitStruct->HSI48State) != RCC_HSI48_OFF)
 8009ab2:	687b      	ldr	r3, [r7, #4]
 8009ab4:	699b      	ldr	r3, [r3, #24]
 8009ab6:	2b00      	cmp	r3, #0
 8009ab8:	d01c      	beq.n	8009af4 <HAL_RCC_OscConfig+0x4fc>
    {
      /* Enable the Internal Low Speed oscillator (HSI48). */
      __HAL_RCC_HSI48_ENABLE();
 8009aba:	4b0d      	ldr	r3, [pc, #52]	@ (8009af0 <HAL_RCC_OscConfig+0x4f8>)
 8009abc:	681b      	ldr	r3, [r3, #0]
 8009abe:	4a0c      	ldr	r2, [pc, #48]	@ (8009af0 <HAL_RCC_OscConfig+0x4f8>)
 8009ac0:	f443 5380 	orr.w	r3, r3, #4096	@ 0x1000
 8009ac4:	6013      	str	r3, [r2, #0]

      /* Get time-out */
      tickstart = HAL_GetTick();
 8009ac6:	f7fb f863 	bl	8004b90 <HAL_GetTick>
 8009aca:	6278      	str	r0, [r7, #36]	@ 0x24

      /* Wait till HSI48 is ready */
      while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) == 0U)
 8009acc:	e008      	b.n	8009ae0 <HAL_RCC_OscConfig+0x4e8>
      {
        if ((HAL_GetTick() - tickstart) > HSI48_TIMEOUT_VALUE)
 8009ace:	f7fb f85f 	bl	8004b90 <HAL_GetTick>
 8009ad2:	4602      	mov	r2, r0
 8009ad4:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8009ad6:	1ad3      	subs	r3, r2, r3
 8009ad8:	2b02      	cmp	r3, #2
 8009ada:	d901      	bls.n	8009ae0 <HAL_RCC_OscConfig+0x4e8>
        {
          return HAL_TIMEOUT;
 8009adc:	2303      	movs	r3, #3
 8009ade:	e1dd      	b.n	8009e9c <HAL_RCC_OscConfig+0x8a4>
      while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) == 0U)
 8009ae0:	4b03      	ldr	r3, [pc, #12]	@ (8009af0 <HAL_RCC_OscConfig+0x4f8>)
 8009ae2:	681b      	ldr	r3, [r3, #0]
 8009ae4:	f403 5300 	and.w	r3, r3, #8192	@ 0x2000
 8009ae8:	2b00      	cmp	r3, #0
 8009aea:	d0f0      	beq.n	8009ace <HAL_RCC_OscConfig+0x4d6>
 8009aec:	e01b      	b.n	8009b26 <HAL_RCC_OscConfig+0x52e>
 8009aee:	bf00      	nop
 8009af0:	58024400 	.word	0x58024400
      }
    }
    else
    {
      /* Disable the Internal Low Speed oscillator (HSI48). */
      __HAL_RCC_HSI48_DISABLE();
 8009af4:	4b9b      	ldr	r3, [pc, #620]	@ (8009d64 <HAL_RCC_OscConfig+0x76c>)
 8009af6:	681b      	ldr	r3, [r3, #0]
 8009af8:	4a9a      	ldr	r2, [pc, #616]	@ (8009d64 <HAL_RCC_OscConfig+0x76c>)
 8009afa:	f423 5380 	bic.w	r3, r3, #4096	@ 0x1000
 8009afe:	6013      	str	r3, [r2, #0]

      /* Get time-out */
      tickstart = HAL_GetTick();
 8009b00:	f7fb f846 	bl	8004b90 <HAL_GetTick>
 8009b04:	6278      	str	r0, [r7, #36]	@ 0x24

      /* Wait till HSI48 is ready */
      while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) != 0U)
 8009b06:	e008      	b.n	8009b1a <HAL_RCC_OscConfig+0x522>
      {
        if ((HAL_GetTick() - tickstart) > HSI48_TIMEOUT_VALUE)
 8009b08:	f7fb f842 	bl	8004b90 <HAL_GetTick>
 8009b0c:	4602      	mov	r2, r0
 8009b0e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8009b10:	1ad3      	subs	r3, r2, r3
 8009b12:	2b02      	cmp	r3, #2
 8009b14:	d901      	bls.n	8009b1a <HAL_RCC_OscConfig+0x522>
        {
          return HAL_TIMEOUT;
 8009b16:	2303      	movs	r3, #3
 8009b18:	e1c0      	b.n	8009e9c <HAL_RCC_OscConfig+0x8a4>
      while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) != 0U)
 8009b1a:	4b92      	ldr	r3, [pc, #584]	@ (8009d64 <HAL_RCC_OscConfig+0x76c>)
 8009b1c:	681b      	ldr	r3, [r3, #0]
 8009b1e:	f403 5300 	and.w	r3, r3, #8192	@ 0x2000
 8009b22:	2b00      	cmp	r3, #0
 8009b24:	d1f0      	bne.n	8009b08 <HAL_RCC_OscConfig+0x510>
        }
      }
    }
  }
  /*------------------------------ LSE Configuration -------------------------*/
  if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
 8009b26:	687b      	ldr	r3, [r7, #4]
 8009b28:	681b      	ldr	r3, [r3, #0]
 8009b2a:	f003 0304 	and.w	r3, r3, #4
 8009b2e:	2b00      	cmp	r3, #0
 8009b30:	f000 8081 	beq.w	8009c36 <HAL_RCC_OscConfig+0x63e>
  {
    /* Check the parameters */
    assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));

    /* Enable write access to Backup domain */
    PWR->CR1 |= PWR_CR1_DBP;
 8009b34:	4b8c      	ldr	r3, [pc, #560]	@ (8009d68 <HAL_RCC_OscConfig+0x770>)
 8009b36:	681b      	ldr	r3, [r3, #0]
 8009b38:	4a8b      	ldr	r2, [pc, #556]	@ (8009d68 <HAL_RCC_OscConfig+0x770>)
 8009b3a:	f443 7380 	orr.w	r3, r3, #256	@ 0x100
 8009b3e:	6013      	str	r3, [r2, #0]

    /* Wait for Backup domain Write protection disable */
    tickstart = HAL_GetTick();
 8009b40:	f7fb f826 	bl	8004b90 <HAL_GetTick>
 8009b44:	6278      	str	r0, [r7, #36]	@ 0x24

    while ((PWR->CR1 & PWR_CR1_DBP) == 0U)
 8009b46:	e008      	b.n	8009b5a <HAL_RCC_OscConfig+0x562>
    {
      if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
 8009b48:	f7fb f822 	bl	8004b90 <HAL_GetTick>
 8009b4c:	4602      	mov	r2, r0
 8009b4e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8009b50:	1ad3      	subs	r3, r2, r3
 8009b52:	2b64      	cmp	r3, #100	@ 0x64
 8009b54:	d901      	bls.n	8009b5a <HAL_RCC_OscConfig+0x562>
      {
        return HAL_TIMEOUT;
 8009b56:	2303      	movs	r3, #3
 8009b58:	e1a0      	b.n	8009e9c <HAL_RCC_OscConfig+0x8a4>
    while ((PWR->CR1 & PWR_CR1_DBP) == 0U)
 8009b5a:	4b83      	ldr	r3, [pc, #524]	@ (8009d68 <HAL_RCC_OscConfig+0x770>)
 8009b5c:	681b      	ldr	r3, [r3, #0]
 8009b5e:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 8009b62:	2b00      	cmp	r3, #0
 8009b64:	d0f0      	beq.n	8009b48 <HAL_RCC_OscConfig+0x550>
      }
    }

    /* Set the new LSE configuration -----------------------------------------*/
    __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
 8009b66:	687b      	ldr	r3, [r7, #4]
 8009b68:	689b      	ldr	r3, [r3, #8]
 8009b6a:	2b01      	cmp	r3, #1
 8009b6c:	d106      	bne.n	8009b7c <HAL_RCC_OscConfig+0x584>
 8009b6e:	4b7d      	ldr	r3, [pc, #500]	@ (8009d64 <HAL_RCC_OscConfig+0x76c>)
 8009b70:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 8009b72:	4a7c      	ldr	r2, [pc, #496]	@ (8009d64 <HAL_RCC_OscConfig+0x76c>)
 8009b74:	f043 0301 	orr.w	r3, r3, #1
 8009b78:	6713      	str	r3, [r2, #112]	@ 0x70
 8009b7a:	e02d      	b.n	8009bd8 <HAL_RCC_OscConfig+0x5e0>
 8009b7c:	687b      	ldr	r3, [r7, #4]
 8009b7e:	689b      	ldr	r3, [r3, #8]
 8009b80:	2b00      	cmp	r3, #0
 8009b82:	d10c      	bne.n	8009b9e <HAL_RCC_OscConfig+0x5a6>
 8009b84:	4b77      	ldr	r3, [pc, #476]	@ (8009d64 <HAL_RCC_OscConfig+0x76c>)
 8009b86:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 8009b88:	4a76      	ldr	r2, [pc, #472]	@ (8009d64 <HAL_RCC_OscConfig+0x76c>)
 8009b8a:	f023 0301 	bic.w	r3, r3, #1
 8009b8e:	6713      	str	r3, [r2, #112]	@ 0x70
 8009b90:	4b74      	ldr	r3, [pc, #464]	@ (8009d64 <HAL_RCC_OscConfig+0x76c>)
 8009b92:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 8009b94:	4a73      	ldr	r2, [pc, #460]	@ (8009d64 <HAL_RCC_OscConfig+0x76c>)
 8009b96:	f023 0304 	bic.w	r3, r3, #4
 8009b9a:	6713      	str	r3, [r2, #112]	@ 0x70
 8009b9c:	e01c      	b.n	8009bd8 <HAL_RCC_OscConfig+0x5e0>
 8009b9e:	687b      	ldr	r3, [r7, #4]
 8009ba0:	689b      	ldr	r3, [r3, #8]
 8009ba2:	2b05      	cmp	r3, #5
 8009ba4:	d10c      	bne.n	8009bc0 <HAL_RCC_OscConfig+0x5c8>
 8009ba6:	4b6f      	ldr	r3, [pc, #444]	@ (8009d64 <HAL_RCC_OscConfig+0x76c>)
 8009ba8:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 8009baa:	4a6e      	ldr	r2, [pc, #440]	@ (8009d64 <HAL_RCC_OscConfig+0x76c>)
 8009bac:	f043 0304 	orr.w	r3, r3, #4
 8009bb0:	6713      	str	r3, [r2, #112]	@ 0x70
 8009bb2:	4b6c      	ldr	r3, [pc, #432]	@ (8009d64 <HAL_RCC_OscConfig+0x76c>)
 8009bb4:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 8009bb6:	4a6b      	ldr	r2, [pc, #428]	@ (8009d64 <HAL_RCC_OscConfig+0x76c>)
 8009bb8:	f043 0301 	orr.w	r3, r3, #1
 8009bbc:	6713      	str	r3, [r2, #112]	@ 0x70
 8009bbe:	e00b      	b.n	8009bd8 <HAL_RCC_OscConfig+0x5e0>
 8009bc0:	4b68      	ldr	r3, [pc, #416]	@ (8009d64 <HAL_RCC_OscConfig+0x76c>)
 8009bc2:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 8009bc4:	4a67      	ldr	r2, [pc, #412]	@ (8009d64 <HAL_RCC_OscConfig+0x76c>)
 8009bc6:	f023 0301 	bic.w	r3, r3, #1
 8009bca:	6713      	str	r3, [r2, #112]	@ 0x70
 8009bcc:	4b65      	ldr	r3, [pc, #404]	@ (8009d64 <HAL_RCC_OscConfig+0x76c>)
 8009bce:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 8009bd0:	4a64      	ldr	r2, [pc, #400]	@ (8009d64 <HAL_RCC_OscConfig+0x76c>)
 8009bd2:	f023 0304 	bic.w	r3, r3, #4
 8009bd6:	6713      	str	r3, [r2, #112]	@ 0x70
    /* Check the LSE State */
    if ((RCC_OscInitStruct->LSEState) != RCC_LSE_OFF)
 8009bd8:	687b      	ldr	r3, [r7, #4]
 8009bda:	689b      	ldr	r3, [r3, #8]
 8009bdc:	2b00      	cmp	r3, #0
 8009bde:	d015      	beq.n	8009c0c <HAL_RCC_OscConfig+0x614>
    {
      /* Get Start Tick*/
      tickstart = HAL_GetTick();
 8009be0:	f7fa ffd6 	bl	8004b90 <HAL_GetTick>
 8009be4:	6278      	str	r0, [r7, #36]	@ 0x24

      /* Wait till LSE is ready */
      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == 0U)
 8009be6:	e00a      	b.n	8009bfe <HAL_RCC_OscConfig+0x606>
      {
        if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
 8009be8:	f7fa ffd2 	bl	8004b90 <HAL_GetTick>
 8009bec:	4602      	mov	r2, r0
 8009bee:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8009bf0:	1ad3      	subs	r3, r2, r3
 8009bf2:	f241 3288 	movw	r2, #5000	@ 0x1388
 8009bf6:	4293      	cmp	r3, r2
 8009bf8:	d901      	bls.n	8009bfe <HAL_RCC_OscConfig+0x606>
        {
          return HAL_TIMEOUT;
 8009bfa:	2303      	movs	r3, #3
 8009bfc:	e14e      	b.n	8009e9c <HAL_RCC_OscConfig+0x8a4>
      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == 0U)
 8009bfe:	4b59      	ldr	r3, [pc, #356]	@ (8009d64 <HAL_RCC_OscConfig+0x76c>)
 8009c00:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 8009c02:	f003 0302 	and.w	r3, r3, #2
 8009c06:	2b00      	cmp	r3, #0
 8009c08:	d0ee      	beq.n	8009be8 <HAL_RCC_OscConfig+0x5f0>
 8009c0a:	e014      	b.n	8009c36 <HAL_RCC_OscConfig+0x63e>
      }
    }
    else
    {
      /* Get Start Tick*/
      tickstart = HAL_GetTick();
 8009c0c:	f7fa ffc0 	bl	8004b90 <HAL_GetTick>
 8009c10:	6278      	str	r0, [r7, #36]	@ 0x24

      /* Wait till LSE is disabled */
      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != 0U)
 8009c12:	e00a      	b.n	8009c2a <HAL_RCC_OscConfig+0x632>
      {
        if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
 8009c14:	f7fa ffbc 	bl	8004b90 <HAL_GetTick>
 8009c18:	4602      	mov	r2, r0
 8009c1a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8009c1c:	1ad3      	subs	r3, r2, r3
 8009c1e:	f241 3288 	movw	r2, #5000	@ 0x1388
 8009c22:	4293      	cmp	r3, r2
 8009c24:	d901      	bls.n	8009c2a <HAL_RCC_OscConfig+0x632>
        {
          return HAL_TIMEOUT;
 8009c26:	2303      	movs	r3, #3
 8009c28:	e138      	b.n	8009e9c <HAL_RCC_OscConfig+0x8a4>
      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != 0U)
 8009c2a:	4b4e      	ldr	r3, [pc, #312]	@ (8009d64 <HAL_RCC_OscConfig+0x76c>)
 8009c2c:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 8009c2e:	f003 0302 	and.w	r3, r3, #2
 8009c32:	2b00      	cmp	r3, #0
 8009c34:	d1ee      	bne.n	8009c14 <HAL_RCC_OscConfig+0x61c>
    }
  }
  /*-------------------------------- PLL Configuration -----------------------*/
  /* Check the parameters */
  assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
  if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
 8009c36:	687b      	ldr	r3, [r7, #4]
 8009c38:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8009c3a:	2b00      	cmp	r3, #0
 8009c3c:	f000 812d 	beq.w	8009e9a <HAL_RCC_OscConfig+0x8a2>
  {
    /* Check if the PLL is used as system clock or not */
    if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL1)
 8009c40:	4b48      	ldr	r3, [pc, #288]	@ (8009d64 <HAL_RCC_OscConfig+0x76c>)
 8009c42:	691b      	ldr	r3, [r3, #16]
 8009c44:	f003 0338 	and.w	r3, r3, #56	@ 0x38
 8009c48:	2b18      	cmp	r3, #24
 8009c4a:	f000 80bd 	beq.w	8009dc8 <HAL_RCC_OscConfig+0x7d0>
    {
      if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
 8009c4e:	687b      	ldr	r3, [r7, #4]
 8009c50:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8009c52:	2b02      	cmp	r3, #2
 8009c54:	f040 809e 	bne.w	8009d94 <HAL_RCC_OscConfig+0x79c>
        assert_param(IS_RCC_PLLQ_VALUE(RCC_OscInitStruct->PLL.PLLQ));
        assert_param(IS_RCC_PLLR_VALUE(RCC_OscInitStruct->PLL.PLLR));
        assert_param(IS_RCC_PLLFRACN_VALUE(RCC_OscInitStruct->PLL.PLLFRACN));

        /* Disable the main PLL. */
        __HAL_RCC_PLL_DISABLE();
 8009c58:	4b42      	ldr	r3, [pc, #264]	@ (8009d64 <HAL_RCC_OscConfig+0x76c>)
 8009c5a:	681b      	ldr	r3, [r3, #0]
 8009c5c:	4a41      	ldr	r2, [pc, #260]	@ (8009d64 <HAL_RCC_OscConfig+0x76c>)
 8009c5e:	f023 7380 	bic.w	r3, r3, #16777216	@ 0x1000000
 8009c62:	6013      	str	r3, [r2, #0]

        /* Get Start Tick*/
        tickstart = HAL_GetTick();
 8009c64:	f7fa ff94 	bl	8004b90 <HAL_GetTick>
 8009c68:	6278      	str	r0, [r7, #36]	@ 0x24

        /* Wait till PLL is disabled */
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != 0U)
 8009c6a:	e008      	b.n	8009c7e <HAL_RCC_OscConfig+0x686>
        {
          if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
 8009c6c:	f7fa ff90 	bl	8004b90 <HAL_GetTick>
 8009c70:	4602      	mov	r2, r0
 8009c72:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8009c74:	1ad3      	subs	r3, r2, r3
 8009c76:	2b02      	cmp	r3, #2
 8009c78:	d901      	bls.n	8009c7e <HAL_RCC_OscConfig+0x686>
          {
            return HAL_TIMEOUT;
 8009c7a:	2303      	movs	r3, #3
 8009c7c:	e10e      	b.n	8009e9c <HAL_RCC_OscConfig+0x8a4>
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != 0U)
 8009c7e:	4b39      	ldr	r3, [pc, #228]	@ (8009d64 <HAL_RCC_OscConfig+0x76c>)
 8009c80:	681b      	ldr	r3, [r3, #0]
 8009c82:	f003 7300 	and.w	r3, r3, #33554432	@ 0x2000000
 8009c86:	2b00      	cmp	r3, #0
 8009c88:	d1f0      	bne.n	8009c6c <HAL_RCC_OscConfig+0x674>
          }
        }

        /* Configure the main PLL clock source, multiplication and division factors. */
        __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
 8009c8a:	4b36      	ldr	r3, [pc, #216]	@ (8009d64 <HAL_RCC_OscConfig+0x76c>)
 8009c8c:	6a9a      	ldr	r2, [r3, #40]	@ 0x28
 8009c8e:	4b37      	ldr	r3, [pc, #220]	@ (8009d6c <HAL_RCC_OscConfig+0x774>)
 8009c90:	4013      	ands	r3, r2
 8009c92:	687a      	ldr	r2, [r7, #4]
 8009c94:	6a91      	ldr	r1, [r2, #40]	@ 0x28
 8009c96:	687a      	ldr	r2, [r7, #4]
 8009c98:	6ad2      	ldr	r2, [r2, #44]	@ 0x2c
 8009c9a:	0112      	lsls	r2, r2, #4
 8009c9c:	430a      	orrs	r2, r1
 8009c9e:	4931      	ldr	r1, [pc, #196]	@ (8009d64 <HAL_RCC_OscConfig+0x76c>)
 8009ca0:	4313      	orrs	r3, r2
 8009ca2:	628b      	str	r3, [r1, #40]	@ 0x28
 8009ca4:	687b      	ldr	r3, [r7, #4]
 8009ca6:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8009ca8:	3b01      	subs	r3, #1
 8009caa:	f3c3 0208 	ubfx	r2, r3, #0, #9
 8009cae:	687b      	ldr	r3, [r7, #4]
 8009cb0:	6b5b      	ldr	r3, [r3, #52]	@ 0x34
 8009cb2:	3b01      	subs	r3, #1
 8009cb4:	025b      	lsls	r3, r3, #9
 8009cb6:	b29b      	uxth	r3, r3
 8009cb8:	431a      	orrs	r2, r3
 8009cba:	687b      	ldr	r3, [r7, #4]
 8009cbc:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 8009cbe:	3b01      	subs	r3, #1
 8009cc0:	041b      	lsls	r3, r3, #16
 8009cc2:	f403 03fe 	and.w	r3, r3, #8323072	@ 0x7f0000
 8009cc6:	431a      	orrs	r2, r3
 8009cc8:	687b      	ldr	r3, [r7, #4]
 8009cca:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 8009ccc:	3b01      	subs	r3, #1
 8009cce:	061b      	lsls	r3, r3, #24
 8009cd0:	f003 43fe 	and.w	r3, r3, #2130706432	@ 0x7f000000
 8009cd4:	4923      	ldr	r1, [pc, #140]	@ (8009d64 <HAL_RCC_OscConfig+0x76c>)
 8009cd6:	4313      	orrs	r3, r2
 8009cd8:	630b      	str	r3, [r1, #48]	@ 0x30
                             RCC_OscInitStruct->PLL.PLLP,
                             RCC_OscInitStruct->PLL.PLLQ,
                             RCC_OscInitStruct->PLL.PLLR);

        /* Disable PLLFRACN . */
        __HAL_RCC_PLLFRACN_DISABLE();
 8009cda:	4b22      	ldr	r3, [pc, #136]	@ (8009d64 <HAL_RCC_OscConfig+0x76c>)
 8009cdc:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8009cde:	4a21      	ldr	r2, [pc, #132]	@ (8009d64 <HAL_RCC_OscConfig+0x76c>)
 8009ce0:	f023 0301 	bic.w	r3, r3, #1
 8009ce4:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* Configure PLL PLL1FRACN */
        __HAL_RCC_PLLFRACN_CONFIG(RCC_OscInitStruct->PLL.PLLFRACN);
 8009ce6:	4b1f      	ldr	r3, [pc, #124]	@ (8009d64 <HAL_RCC_OscConfig+0x76c>)
 8009ce8:	6b5a      	ldr	r2, [r3, #52]	@ 0x34
 8009cea:	4b21      	ldr	r3, [pc, #132]	@ (8009d70 <HAL_RCC_OscConfig+0x778>)
 8009cec:	4013      	ands	r3, r2
 8009cee:	687a      	ldr	r2, [r7, #4]
 8009cf0:	6c92      	ldr	r2, [r2, #72]	@ 0x48
 8009cf2:	00d2      	lsls	r2, r2, #3
 8009cf4:	491b      	ldr	r1, [pc, #108]	@ (8009d64 <HAL_RCC_OscConfig+0x76c>)
 8009cf6:	4313      	orrs	r3, r2
 8009cf8:	634b      	str	r3, [r1, #52]	@ 0x34

        /* Select PLL1 input reference frequency range: VCI */
        __HAL_RCC_PLL_VCIRANGE(RCC_OscInitStruct->PLL.PLLRGE) ;
 8009cfa:	4b1a      	ldr	r3, [pc, #104]	@ (8009d64 <HAL_RCC_OscConfig+0x76c>)
 8009cfc:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8009cfe:	f023 020c 	bic.w	r2, r3, #12
 8009d02:	687b      	ldr	r3, [r7, #4]
 8009d04:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8009d06:	4917      	ldr	r1, [pc, #92]	@ (8009d64 <HAL_RCC_OscConfig+0x76c>)
 8009d08:	4313      	orrs	r3, r2
 8009d0a:	62cb      	str	r3, [r1, #44]	@ 0x2c

        /* Select PLL1 output frequency range : VCO */
        __HAL_RCC_PLL_VCORANGE(RCC_OscInitStruct->PLL.PLLVCOSEL) ;
 8009d0c:	4b15      	ldr	r3, [pc, #84]	@ (8009d64 <HAL_RCC_OscConfig+0x76c>)
 8009d0e:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8009d10:	f023 0202 	bic.w	r2, r3, #2
 8009d14:	687b      	ldr	r3, [r7, #4]
 8009d16:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 8009d18:	4912      	ldr	r1, [pc, #72]	@ (8009d64 <HAL_RCC_OscConfig+0x76c>)
 8009d1a:	4313      	orrs	r3, r2
 8009d1c:	62cb      	str	r3, [r1, #44]	@ 0x2c

        /* Enable PLL System Clock output. */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVP);
 8009d1e:	4b11      	ldr	r3, [pc, #68]	@ (8009d64 <HAL_RCC_OscConfig+0x76c>)
 8009d20:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8009d22:	4a10      	ldr	r2, [pc, #64]	@ (8009d64 <HAL_RCC_OscConfig+0x76c>)
 8009d24:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
 8009d28:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* Enable PLL1Q Clock output. */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
 8009d2a:	4b0e      	ldr	r3, [pc, #56]	@ (8009d64 <HAL_RCC_OscConfig+0x76c>)
 8009d2c:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8009d2e:	4a0d      	ldr	r2, [pc, #52]	@ (8009d64 <HAL_RCC_OscConfig+0x76c>)
 8009d30:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 8009d34:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* Enable PLL1R  Clock output. */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVR);
 8009d36:	4b0b      	ldr	r3, [pc, #44]	@ (8009d64 <HAL_RCC_OscConfig+0x76c>)
 8009d38:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8009d3a:	4a0a      	ldr	r2, [pc, #40]	@ (8009d64 <HAL_RCC_OscConfig+0x76c>)
 8009d3c:	f443 2380 	orr.w	r3, r3, #262144	@ 0x40000
 8009d40:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* Enable PLL1FRACN . */
        __HAL_RCC_PLLFRACN_ENABLE();
 8009d42:	4b08      	ldr	r3, [pc, #32]	@ (8009d64 <HAL_RCC_OscConfig+0x76c>)
 8009d44:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8009d46:	4a07      	ldr	r2, [pc, #28]	@ (8009d64 <HAL_RCC_OscConfig+0x76c>)
 8009d48:	f043 0301 	orr.w	r3, r3, #1
 8009d4c:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* Enable the main PLL. */
        __HAL_RCC_PLL_ENABLE();
 8009d4e:	4b05      	ldr	r3, [pc, #20]	@ (8009d64 <HAL_RCC_OscConfig+0x76c>)
 8009d50:	681b      	ldr	r3, [r3, #0]
 8009d52:	4a04      	ldr	r2, [pc, #16]	@ (8009d64 <HAL_RCC_OscConfig+0x76c>)
 8009d54:	f043 7380 	orr.w	r3, r3, #16777216	@ 0x1000000
 8009d58:	6013      	str	r3, [r2, #0]

        /* Get Start Tick*/
        tickstart = HAL_GetTick();
 8009d5a:	f7fa ff19 	bl	8004b90 <HAL_GetTick>
 8009d5e:	6278      	str	r0, [r7, #36]	@ 0x24

        /* Wait till PLL is ready */
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == 0U)
 8009d60:	e011      	b.n	8009d86 <HAL_RCC_OscConfig+0x78e>
 8009d62:	bf00      	nop
 8009d64:	58024400 	.word	0x58024400
 8009d68:	58024800 	.word	0x58024800
 8009d6c:	fffffc0c 	.word	0xfffffc0c
 8009d70:	ffff0007 	.word	0xffff0007
        {
          if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
 8009d74:	f7fa ff0c 	bl	8004b90 <HAL_GetTick>
 8009d78:	4602      	mov	r2, r0
 8009d7a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8009d7c:	1ad3      	subs	r3, r2, r3
 8009d7e:	2b02      	cmp	r3, #2
 8009d80:	d901      	bls.n	8009d86 <HAL_RCC_OscConfig+0x78e>
          {
            return HAL_TIMEOUT;
 8009d82:	2303      	movs	r3, #3
 8009d84:	e08a      	b.n	8009e9c <HAL_RCC_OscConfig+0x8a4>
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == 0U)
 8009d86:	4b47      	ldr	r3, [pc, #284]	@ (8009ea4 <HAL_RCC_OscConfig+0x8ac>)
 8009d88:	681b      	ldr	r3, [r3, #0]
 8009d8a:	f003 7300 	and.w	r3, r3, #33554432	@ 0x2000000
 8009d8e:	2b00      	cmp	r3, #0
 8009d90:	d0f0      	beq.n	8009d74 <HAL_RCC_OscConfig+0x77c>
 8009d92:	e082      	b.n	8009e9a <HAL_RCC_OscConfig+0x8a2>
        }
      }
      else
      {
        /* Disable the main PLL. */
        __HAL_RCC_PLL_DISABLE();
 8009d94:	4b43      	ldr	r3, [pc, #268]	@ (8009ea4 <HAL_RCC_OscConfig+0x8ac>)
 8009d96:	681b      	ldr	r3, [r3, #0]
 8009d98:	4a42      	ldr	r2, [pc, #264]	@ (8009ea4 <HAL_RCC_OscConfig+0x8ac>)
 8009d9a:	f023 7380 	bic.w	r3, r3, #16777216	@ 0x1000000
 8009d9e:	6013      	str	r3, [r2, #0]

        /* Get Start Tick*/
        tickstart = HAL_GetTick();
 8009da0:	f7fa fef6 	bl	8004b90 <HAL_GetTick>
 8009da4:	6278      	str	r0, [r7, #36]	@ 0x24

        /* Wait till PLL is disabled */
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != 0U)
 8009da6:	e008      	b.n	8009dba <HAL_RCC_OscConfig+0x7c2>
        {
          if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
 8009da8:	f7fa fef2 	bl	8004b90 <HAL_GetTick>
 8009dac:	4602      	mov	r2, r0
 8009dae:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8009db0:	1ad3      	subs	r3, r2, r3
 8009db2:	2b02      	cmp	r3, #2
 8009db4:	d901      	bls.n	8009dba <HAL_RCC_OscConfig+0x7c2>
          {
            return HAL_TIMEOUT;
 8009db6:	2303      	movs	r3, #3
 8009db8:	e070      	b.n	8009e9c <HAL_RCC_OscConfig+0x8a4>
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != 0U)
 8009dba:	4b3a      	ldr	r3, [pc, #232]	@ (8009ea4 <HAL_RCC_OscConfig+0x8ac>)
 8009dbc:	681b      	ldr	r3, [r3, #0]
 8009dbe:	f003 7300 	and.w	r3, r3, #33554432	@ 0x2000000
 8009dc2:	2b00      	cmp	r3, #0
 8009dc4:	d1f0      	bne.n	8009da8 <HAL_RCC_OscConfig+0x7b0>
 8009dc6:	e068      	b.n	8009e9a <HAL_RCC_OscConfig+0x8a2>
      }
    }
    else
    {
      /* Do not return HAL_ERROR if request repeats the current configuration */
      temp1_pllckcfg = RCC->PLLCKSELR;
 8009dc8:	4b36      	ldr	r3, [pc, #216]	@ (8009ea4 <HAL_RCC_OscConfig+0x8ac>)
 8009dca:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 8009dcc:	613b      	str	r3, [r7, #16]
      temp2_pllckcfg = RCC->PLL1DIVR;
 8009dce:	4b35      	ldr	r3, [pc, #212]	@ (8009ea4 <HAL_RCC_OscConfig+0x8ac>)
 8009dd0:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8009dd2:	60fb      	str	r3, [r7, #12]
      if (((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) ||
 8009dd4:	687b      	ldr	r3, [r7, #4]
 8009dd6:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8009dd8:	2b01      	cmp	r3, #1
 8009dda:	d031      	beq.n	8009e40 <HAL_RCC_OscConfig+0x848>
          (READ_BIT(temp1_pllckcfg, RCC_PLLCKSELR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
 8009ddc:	693b      	ldr	r3, [r7, #16]
 8009dde:	f003 0203 	and.w	r2, r3, #3
 8009de2:	687b      	ldr	r3, [r7, #4]
 8009de4:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
      if (((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) ||
 8009de6:	429a      	cmp	r2, r3
 8009de8:	d12a      	bne.n	8009e40 <HAL_RCC_OscConfig+0x848>
          ((READ_BIT(temp1_pllckcfg, RCC_PLLCKSELR_DIVM1) >> RCC_PLLCKSELR_DIVM1_Pos) != RCC_OscInitStruct->PLL.PLLM) ||
 8009dea:	693b      	ldr	r3, [r7, #16]
 8009dec:	091b      	lsrs	r3, r3, #4
 8009dee:	f003 023f 	and.w	r2, r3, #63	@ 0x3f
 8009df2:	687b      	ldr	r3, [r7, #4]
 8009df4:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
          (READ_BIT(temp1_pllckcfg, RCC_PLLCKSELR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
 8009df6:	429a      	cmp	r2, r3
 8009df8:	d122      	bne.n	8009e40 <HAL_RCC_OscConfig+0x848>
          (READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_N1) != (RCC_OscInitStruct->PLL.PLLN - 1U)) ||
 8009dfa:	68fb      	ldr	r3, [r7, #12]
 8009dfc:	f3c3 0208 	ubfx	r2, r3, #0, #9
 8009e00:	687b      	ldr	r3, [r7, #4]
 8009e02:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8009e04:	3b01      	subs	r3, #1
          ((READ_BIT(temp1_pllckcfg, RCC_PLLCKSELR_DIVM1) >> RCC_PLLCKSELR_DIVM1_Pos) != RCC_OscInitStruct->PLL.PLLM) ||
 8009e06:	429a      	cmp	r2, r3
 8009e08:	d11a      	bne.n	8009e40 <HAL_RCC_OscConfig+0x848>
          ((READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_P1) >> RCC_PLL1DIVR_P1_Pos) != (RCC_OscInitStruct->PLL.PLLP - 1U)) ||
 8009e0a:	68fb      	ldr	r3, [r7, #12]
 8009e0c:	0a5b      	lsrs	r3, r3, #9
 8009e0e:	f003 027f 	and.w	r2, r3, #127	@ 0x7f
 8009e12:	687b      	ldr	r3, [r7, #4]
 8009e14:	6b5b      	ldr	r3, [r3, #52]	@ 0x34
 8009e16:	3b01      	subs	r3, #1
          (READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_N1) != (RCC_OscInitStruct->PLL.PLLN - 1U)) ||
 8009e18:	429a      	cmp	r2, r3
 8009e1a:	d111      	bne.n	8009e40 <HAL_RCC_OscConfig+0x848>
          ((READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_Q1) >> RCC_PLL1DIVR_Q1_Pos) != (RCC_OscInitStruct->PLL.PLLQ - 1U)) ||
 8009e1c:	68fb      	ldr	r3, [r7, #12]
 8009e1e:	0c1b      	lsrs	r3, r3, #16
 8009e20:	f003 027f 	and.w	r2, r3, #127	@ 0x7f
 8009e24:	687b      	ldr	r3, [r7, #4]
 8009e26:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 8009e28:	3b01      	subs	r3, #1
          ((READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_P1) >> RCC_PLL1DIVR_P1_Pos) != (RCC_OscInitStruct->PLL.PLLP - 1U)) ||
 8009e2a:	429a      	cmp	r2, r3
 8009e2c:	d108      	bne.n	8009e40 <HAL_RCC_OscConfig+0x848>
          ((READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_R1) >> RCC_PLL1DIVR_R1_Pos) != (RCC_OscInitStruct->PLL.PLLR - 1U)))
 8009e2e:	68fb      	ldr	r3, [r7, #12]
 8009e30:	0e1b      	lsrs	r3, r3, #24
 8009e32:	f003 027f 	and.w	r2, r3, #127	@ 0x7f
 8009e36:	687b      	ldr	r3, [r7, #4]
 8009e38:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 8009e3a:	3b01      	subs	r3, #1
          ((READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_Q1) >> RCC_PLL1DIVR_Q1_Pos) != (RCC_OscInitStruct->PLL.PLLQ - 1U)) ||
 8009e3c:	429a      	cmp	r2, r3
 8009e3e:	d001      	beq.n	8009e44 <HAL_RCC_OscConfig+0x84c>
      {
        return HAL_ERROR;
 8009e40:	2301      	movs	r3, #1
 8009e42:	e02b      	b.n	8009e9c <HAL_RCC_OscConfig+0x8a4>
      }
      else
      {
        /* Check if only fractional part needs to be updated  */
        temp1_pllckcfg = ((RCC->PLL1FRACR & RCC_PLL1FRACR_FRACN1) >> RCC_PLL1FRACR_FRACN1_Pos);
 8009e44:	4b17      	ldr	r3, [pc, #92]	@ (8009ea4 <HAL_RCC_OscConfig+0x8ac>)
 8009e46:	6b5b      	ldr	r3, [r3, #52]	@ 0x34
 8009e48:	08db      	lsrs	r3, r3, #3
 8009e4a:	f3c3 030c 	ubfx	r3, r3, #0, #13
 8009e4e:	613b      	str	r3, [r7, #16]
        if (RCC_OscInitStruct->PLL.PLLFRACN != temp1_pllckcfg)
 8009e50:	687b      	ldr	r3, [r7, #4]
 8009e52:	6c9b      	ldr	r3, [r3, #72]	@ 0x48
 8009e54:	693a      	ldr	r2, [r7, #16]
 8009e56:	429a      	cmp	r2, r3
 8009e58:	d01f      	beq.n	8009e9a <HAL_RCC_OscConfig+0x8a2>
        {
          assert_param(IS_RCC_PLLFRACN_VALUE(RCC_OscInitStruct->PLL.PLLFRACN));
          /* Disable PLL1FRACEN */
          __HAL_RCC_PLLFRACN_DISABLE();
 8009e5a:	4b12      	ldr	r3, [pc, #72]	@ (8009ea4 <HAL_RCC_OscConfig+0x8ac>)
 8009e5c:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8009e5e:	4a11      	ldr	r2, [pc, #68]	@ (8009ea4 <HAL_RCC_OscConfig+0x8ac>)
 8009e60:	f023 0301 	bic.w	r3, r3, #1
 8009e64:	62d3      	str	r3, [r2, #44]	@ 0x2c
          /* Get Start Tick*/
          tickstart = HAL_GetTick();
 8009e66:	f7fa fe93 	bl	8004b90 <HAL_GetTick>
 8009e6a:	6278      	str	r0, [r7, #36]	@ 0x24
          /* Wait at least 2 CK_REF (PLL input source divided by M) period to make sure next latched value will be taken into account. */
          while ((HAL_GetTick() - tickstart) < PLL_FRAC_TIMEOUT_VALUE)
 8009e6c:	bf00      	nop
 8009e6e:	f7fa fe8f 	bl	8004b90 <HAL_GetTick>
 8009e72:	4602      	mov	r2, r0
 8009e74:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8009e76:	4293      	cmp	r3, r2
 8009e78:	d0f9      	beq.n	8009e6e <HAL_RCC_OscConfig+0x876>
          {
          }
          /* Configure PLL1 PLL1FRACN */
          __HAL_RCC_PLLFRACN_CONFIG(RCC_OscInitStruct->PLL.PLLFRACN);
 8009e7a:	4b0a      	ldr	r3, [pc, #40]	@ (8009ea4 <HAL_RCC_OscConfig+0x8ac>)
 8009e7c:	6b5a      	ldr	r2, [r3, #52]	@ 0x34
 8009e7e:	4b0a      	ldr	r3, [pc, #40]	@ (8009ea8 <HAL_RCC_OscConfig+0x8b0>)
 8009e80:	4013      	ands	r3, r2
 8009e82:	687a      	ldr	r2, [r7, #4]
 8009e84:	6c92      	ldr	r2, [r2, #72]	@ 0x48
 8009e86:	00d2      	lsls	r2, r2, #3
 8009e88:	4906      	ldr	r1, [pc, #24]	@ (8009ea4 <HAL_RCC_OscConfig+0x8ac>)
 8009e8a:	4313      	orrs	r3, r2
 8009e8c:	634b      	str	r3, [r1, #52]	@ 0x34
          /* Enable PLL1FRACEN to latch new value. */
          __HAL_RCC_PLLFRACN_ENABLE();
 8009e8e:	4b05      	ldr	r3, [pc, #20]	@ (8009ea4 <HAL_RCC_OscConfig+0x8ac>)
 8009e90:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8009e92:	4a04      	ldr	r2, [pc, #16]	@ (8009ea4 <HAL_RCC_OscConfig+0x8ac>)
 8009e94:	f043 0301 	orr.w	r3, r3, #1
 8009e98:	62d3      	str	r3, [r2, #44]	@ 0x2c
        }
      }
    }
  }
  return HAL_OK;
 8009e9a:	2300      	movs	r3, #0
}
 8009e9c:	4618      	mov	r0, r3
 8009e9e:	3730      	adds	r7, #48	@ 0x30
 8009ea0:	46bd      	mov	sp, r7
 8009ea2:	bd80      	pop	{r7, pc}
 8009ea4:	58024400 	.word	0x58024400
 8009ea8:	ffff0007 	.word	0xffff0007

08009eac <HAL_RCC_ClockConfig>:
  *         D1CPRE[3:0] bits to ensure that  Domain1 core clock not exceed the maximum allowed frequency
  *         (for more details refer to section above "Initialization/de-initialization functions")
  * @retval None
  */
HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef  *RCC_ClkInitStruct, uint32_t FLatency)
{
 8009eac:	b580      	push	{r7, lr}
 8009eae:	b086      	sub	sp, #24
 8009eb0:	af00      	add	r7, sp, #0
 8009eb2:	6078      	str	r0, [r7, #4]
 8009eb4:	6039      	str	r1, [r7, #0]
  HAL_StatusTypeDef halstatus;
  uint32_t tickstart;
  uint32_t common_system_clock;

  /* Check Null pointer */
  if (RCC_ClkInitStruct == NULL)
 8009eb6:	687b      	ldr	r3, [r7, #4]
 8009eb8:	2b00      	cmp	r3, #0
 8009eba:	d101      	bne.n	8009ec0 <HAL_RCC_ClockConfig+0x14>
  {
    return HAL_ERROR;
 8009ebc:	2301      	movs	r3, #1
 8009ebe:	e19c      	b.n	800a1fa <HAL_RCC_ClockConfig+0x34e>
  /* To correctly read data from FLASH memory, the number of wait states (LATENCY)
    must be correctly programmed according to the frequency of the CPU clock
    (HCLK) and the supply voltage of the device. */

  /* Increasing the CPU frequency */
  if (FLatency > __HAL_FLASH_GET_LATENCY())
 8009ec0:	4b8a      	ldr	r3, [pc, #552]	@ (800a0ec <HAL_RCC_ClockConfig+0x240>)
 8009ec2:	681b      	ldr	r3, [r3, #0]
 8009ec4:	f003 030f 	and.w	r3, r3, #15
 8009ec8:	683a      	ldr	r2, [r7, #0]
 8009eca:	429a      	cmp	r2, r3
 8009ecc:	d910      	bls.n	8009ef0 <HAL_RCC_ClockConfig+0x44>
  {
    /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
    __HAL_FLASH_SET_LATENCY(FLatency);
 8009ece:	4b87      	ldr	r3, [pc, #540]	@ (800a0ec <HAL_RCC_ClockConfig+0x240>)
 8009ed0:	681b      	ldr	r3, [r3, #0]
 8009ed2:	f023 020f 	bic.w	r2, r3, #15
 8009ed6:	4985      	ldr	r1, [pc, #532]	@ (800a0ec <HAL_RCC_ClockConfig+0x240>)
 8009ed8:	683b      	ldr	r3, [r7, #0]
 8009eda:	4313      	orrs	r3, r2
 8009edc:	600b      	str	r3, [r1, #0]

    /* Check that the new number of wait states is taken into account to access the Flash
    memory by reading the FLASH_ACR register */
    if (__HAL_FLASH_GET_LATENCY() != FLatency)
 8009ede:	4b83      	ldr	r3, [pc, #524]	@ (800a0ec <HAL_RCC_ClockConfig+0x240>)
 8009ee0:	681b      	ldr	r3, [r3, #0]
 8009ee2:	f003 030f 	and.w	r3, r3, #15
 8009ee6:	683a      	ldr	r2, [r7, #0]
 8009ee8:	429a      	cmp	r2, r3
 8009eea:	d001      	beq.n	8009ef0 <HAL_RCC_ClockConfig+0x44>
    {
      return HAL_ERROR;
 8009eec:	2301      	movs	r3, #1
 8009eee:	e184      	b.n	800a1fa <HAL_RCC_ClockConfig+0x34e>

  }

  /* Increasing the BUS frequency divider */
  /*-------------------------- D1PCLK1/CDPCLK1 Configuration ---------------------------*/
  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_D1PCLK1) == RCC_CLOCKTYPE_D1PCLK1)
 8009ef0:	687b      	ldr	r3, [r7, #4]
 8009ef2:	681b      	ldr	r3, [r3, #0]
 8009ef4:	f003 0304 	and.w	r3, r3, #4
 8009ef8:	2b00      	cmp	r3, #0
 8009efa:	d010      	beq.n	8009f1e <HAL_RCC_ClockConfig+0x72>
  {
#if defined (RCC_D1CFGR_D1PPRE)
    if ((RCC_ClkInitStruct->APB3CLKDivider) > (RCC->D1CFGR & RCC_D1CFGR_D1PPRE))
 8009efc:	687b      	ldr	r3, [r7, #4]
 8009efe:	691a      	ldr	r2, [r3, #16]
 8009f00:	4b7b      	ldr	r3, [pc, #492]	@ (800a0f0 <HAL_RCC_ClockConfig+0x244>)
 8009f02:	699b      	ldr	r3, [r3, #24]
 8009f04:	f003 0370 	and.w	r3, r3, #112	@ 0x70
 8009f08:	429a      	cmp	r2, r3
 8009f0a:	d908      	bls.n	8009f1e <HAL_RCC_ClockConfig+0x72>
    {
      assert_param(IS_RCC_D1PCLK1(RCC_ClkInitStruct->APB3CLKDivider));
      MODIFY_REG(RCC->D1CFGR, RCC_D1CFGR_D1PPRE, RCC_ClkInitStruct->APB3CLKDivider);
 8009f0c:	4b78      	ldr	r3, [pc, #480]	@ (800a0f0 <HAL_RCC_ClockConfig+0x244>)
 8009f0e:	699b      	ldr	r3, [r3, #24]
 8009f10:	f023 0270 	bic.w	r2, r3, #112	@ 0x70
 8009f14:	687b      	ldr	r3, [r7, #4]
 8009f16:	691b      	ldr	r3, [r3, #16]
 8009f18:	4975      	ldr	r1, [pc, #468]	@ (800a0f0 <HAL_RCC_ClockConfig+0x244>)
 8009f1a:	4313      	orrs	r3, r2
 8009f1c:	618b      	str	r3, [r1, #24]
    }
#endif
  }

  /*-------------------------- PCLK1 Configuration ---------------------------*/
  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
 8009f1e:	687b      	ldr	r3, [r7, #4]
 8009f20:	681b      	ldr	r3, [r3, #0]
 8009f22:	f003 0308 	and.w	r3, r3, #8
 8009f26:	2b00      	cmp	r3, #0
 8009f28:	d010      	beq.n	8009f4c <HAL_RCC_ClockConfig+0xa0>
  {
#if defined (RCC_D2CFGR_D2PPRE1)
    if ((RCC_ClkInitStruct->APB1CLKDivider) > (RCC->D2CFGR & RCC_D2CFGR_D2PPRE1))
 8009f2a:	687b      	ldr	r3, [r7, #4]
 8009f2c:	695a      	ldr	r2, [r3, #20]
 8009f2e:	4b70      	ldr	r3, [pc, #448]	@ (800a0f0 <HAL_RCC_ClockConfig+0x244>)
 8009f30:	69db      	ldr	r3, [r3, #28]
 8009f32:	f003 0370 	and.w	r3, r3, #112	@ 0x70
 8009f36:	429a      	cmp	r2, r3
 8009f38:	d908      	bls.n	8009f4c <HAL_RCC_ClockConfig+0xa0>
    {
      assert_param(IS_RCC_PCLK1(RCC_ClkInitStruct->APB1CLKDivider));
      MODIFY_REG(RCC->D2CFGR, RCC_D2CFGR_D2PPRE1, (RCC_ClkInitStruct->APB1CLKDivider));
 8009f3a:	4b6d      	ldr	r3, [pc, #436]	@ (800a0f0 <HAL_RCC_ClockConfig+0x244>)
 8009f3c:	69db      	ldr	r3, [r3, #28]
 8009f3e:	f023 0270 	bic.w	r2, r3, #112	@ 0x70
 8009f42:	687b      	ldr	r3, [r7, #4]
 8009f44:	695b      	ldr	r3, [r3, #20]
 8009f46:	496a      	ldr	r1, [pc, #424]	@ (800a0f0 <HAL_RCC_ClockConfig+0x244>)
 8009f48:	4313      	orrs	r3, r2
 8009f4a:	61cb      	str	r3, [r1, #28]
      MODIFY_REG(RCC->CDCFGR2, RCC_CDCFGR2_CDPPRE1, (RCC_ClkInitStruct->APB1CLKDivider));
    }
#endif
  }
  /*-------------------------- PCLK2 Configuration ---------------------------*/
  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
 8009f4c:	687b      	ldr	r3, [r7, #4]
 8009f4e:	681b      	ldr	r3, [r3, #0]
 8009f50:	f003 0310 	and.w	r3, r3, #16
 8009f54:	2b00      	cmp	r3, #0
 8009f56:	d010      	beq.n	8009f7a <HAL_RCC_ClockConfig+0xce>
  {
#if defined(RCC_D2CFGR_D2PPRE2)
    if ((RCC_ClkInitStruct->APB2CLKDivider) > (RCC->D2CFGR & RCC_D2CFGR_D2PPRE2))
 8009f58:	687b      	ldr	r3, [r7, #4]
 8009f5a:	699a      	ldr	r2, [r3, #24]
 8009f5c:	4b64      	ldr	r3, [pc, #400]	@ (800a0f0 <HAL_RCC_ClockConfig+0x244>)
 8009f5e:	69db      	ldr	r3, [r3, #28]
 8009f60:	f403 63e0 	and.w	r3, r3, #1792	@ 0x700
 8009f64:	429a      	cmp	r2, r3
 8009f66:	d908      	bls.n	8009f7a <HAL_RCC_ClockConfig+0xce>
    {
      assert_param(IS_RCC_PCLK2(RCC_ClkInitStruct->APB2CLKDivider));
      MODIFY_REG(RCC->D2CFGR, RCC_D2CFGR_D2PPRE2, (RCC_ClkInitStruct->APB2CLKDivider));
 8009f68:	4b61      	ldr	r3, [pc, #388]	@ (800a0f0 <HAL_RCC_ClockConfig+0x244>)
 8009f6a:	69db      	ldr	r3, [r3, #28]
 8009f6c:	f423 62e0 	bic.w	r2, r3, #1792	@ 0x700
 8009f70:	687b      	ldr	r3, [r7, #4]
 8009f72:	699b      	ldr	r3, [r3, #24]
 8009f74:	495e      	ldr	r1, [pc, #376]	@ (800a0f0 <HAL_RCC_ClockConfig+0x244>)
 8009f76:	4313      	orrs	r3, r2
 8009f78:	61cb      	str	r3, [r1, #28]
    }
#endif
  }

  /*-------------------------- D3PCLK1 Configuration ---------------------------*/
  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_D3PCLK1) == RCC_CLOCKTYPE_D3PCLK1)
 8009f7a:	687b      	ldr	r3, [r7, #4]
 8009f7c:	681b      	ldr	r3, [r3, #0]
 8009f7e:	f003 0320 	and.w	r3, r3, #32
 8009f82:	2b00      	cmp	r3, #0
 8009f84:	d010      	beq.n	8009fa8 <HAL_RCC_ClockConfig+0xfc>
  {
#if defined(RCC_D3CFGR_D3PPRE)
    if ((RCC_ClkInitStruct->APB4CLKDivider) > (RCC->D3CFGR & RCC_D3CFGR_D3PPRE))
 8009f86:	687b      	ldr	r3, [r7, #4]
 8009f88:	69da      	ldr	r2, [r3, #28]
 8009f8a:	4b59      	ldr	r3, [pc, #356]	@ (800a0f0 <HAL_RCC_ClockConfig+0x244>)
 8009f8c:	6a1b      	ldr	r3, [r3, #32]
 8009f8e:	f003 0370 	and.w	r3, r3, #112	@ 0x70
 8009f92:	429a      	cmp	r2, r3
 8009f94:	d908      	bls.n	8009fa8 <HAL_RCC_ClockConfig+0xfc>
    {
      assert_param(IS_RCC_D3PCLK1(RCC_ClkInitStruct->APB4CLKDivider));
      MODIFY_REG(RCC->D3CFGR, RCC_D3CFGR_D3PPRE, (RCC_ClkInitStruct->APB4CLKDivider));
 8009f96:	4b56      	ldr	r3, [pc, #344]	@ (800a0f0 <HAL_RCC_ClockConfig+0x244>)
 8009f98:	6a1b      	ldr	r3, [r3, #32]
 8009f9a:	f023 0270 	bic.w	r2, r3, #112	@ 0x70
 8009f9e:	687b      	ldr	r3, [r7, #4]
 8009fa0:	69db      	ldr	r3, [r3, #28]
 8009fa2:	4953      	ldr	r1, [pc, #332]	@ (800a0f0 <HAL_RCC_ClockConfig+0x244>)
 8009fa4:	4313      	orrs	r3, r2
 8009fa6:	620b      	str	r3, [r1, #32]
    }
#endif
  }

  /*-------------------------- HCLK Configuration --------------------------*/
  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
 8009fa8:	687b      	ldr	r3, [r7, #4]
 8009faa:	681b      	ldr	r3, [r3, #0]
 8009fac:	f003 0302 	and.w	r3, r3, #2
 8009fb0:	2b00      	cmp	r3, #0
 8009fb2:	d010      	beq.n	8009fd6 <HAL_RCC_ClockConfig+0x12a>
  {
#if defined (RCC_D1CFGR_HPRE)
    if ((RCC_ClkInitStruct->AHBCLKDivider) > (RCC->D1CFGR & RCC_D1CFGR_HPRE))
 8009fb4:	687b      	ldr	r3, [r7, #4]
 8009fb6:	68da      	ldr	r2, [r3, #12]
 8009fb8:	4b4d      	ldr	r3, [pc, #308]	@ (800a0f0 <HAL_RCC_ClockConfig+0x244>)
 8009fba:	699b      	ldr	r3, [r3, #24]
 8009fbc:	f003 030f 	and.w	r3, r3, #15
 8009fc0:	429a      	cmp	r2, r3
 8009fc2:	d908      	bls.n	8009fd6 <HAL_RCC_ClockConfig+0x12a>
    {
      /* Set the new HCLK clock divider */
      assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
      MODIFY_REG(RCC->D1CFGR, RCC_D1CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
 8009fc4:	4b4a      	ldr	r3, [pc, #296]	@ (800a0f0 <HAL_RCC_ClockConfig+0x244>)
 8009fc6:	699b      	ldr	r3, [r3, #24]
 8009fc8:	f023 020f 	bic.w	r2, r3, #15
 8009fcc:	687b      	ldr	r3, [r7, #4]
 8009fce:	68db      	ldr	r3, [r3, #12]
 8009fd0:	4947      	ldr	r1, [pc, #284]	@ (800a0f0 <HAL_RCC_ClockConfig+0x244>)
 8009fd2:	4313      	orrs	r3, r2
 8009fd4:	618b      	str	r3, [r1, #24]
    }
#endif
  }

  /*------------------------- SYSCLK Configuration -------------------------*/
  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
 8009fd6:	687b      	ldr	r3, [r7, #4]
 8009fd8:	681b      	ldr	r3, [r3, #0]
 8009fda:	f003 0301 	and.w	r3, r3, #1
 8009fde:	2b00      	cmp	r3, #0
 8009fe0:	d055      	beq.n	800a08e <HAL_RCC_ClockConfig+0x1e2>
  {
    assert_param(IS_RCC_SYSCLK(RCC_ClkInitStruct->SYSCLKDivider));
    assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
#if defined(RCC_D1CFGR_D1CPRE)
    MODIFY_REG(RCC->D1CFGR, RCC_D1CFGR_D1CPRE, RCC_ClkInitStruct->SYSCLKDivider);
 8009fe2:	4b43      	ldr	r3, [pc, #268]	@ (800a0f0 <HAL_RCC_ClockConfig+0x244>)
 8009fe4:	699b      	ldr	r3, [r3, #24]
 8009fe6:	f423 6270 	bic.w	r2, r3, #3840	@ 0xf00
 8009fea:	687b      	ldr	r3, [r7, #4]
 8009fec:	689b      	ldr	r3, [r3, #8]
 8009fee:	4940      	ldr	r1, [pc, #256]	@ (800a0f0 <HAL_RCC_ClockConfig+0x244>)
 8009ff0:	4313      	orrs	r3, r2
 8009ff2:	618b      	str	r3, [r1, #24]
#else
    MODIFY_REG(RCC->CDCFGR1, RCC_CDCFGR1_CDCPRE, RCC_ClkInitStruct->SYSCLKDivider);
#endif
    /* HSE is selected as System Clock Source */
    if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
 8009ff4:	687b      	ldr	r3, [r7, #4]
 8009ff6:	685b      	ldr	r3, [r3, #4]
 8009ff8:	2b02      	cmp	r3, #2
 8009ffa:	d107      	bne.n	800a00c <HAL_RCC_ClockConfig+0x160>
    {
      /* Check the HSE ready flag */
      if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == 0U)
 8009ffc:	4b3c      	ldr	r3, [pc, #240]	@ (800a0f0 <HAL_RCC_ClockConfig+0x244>)
 8009ffe:	681b      	ldr	r3, [r3, #0]
 800a000:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
 800a004:	2b00      	cmp	r3, #0
 800a006:	d121      	bne.n	800a04c <HAL_RCC_ClockConfig+0x1a0>
      {
        return HAL_ERROR;
 800a008:	2301      	movs	r3, #1
 800a00a:	e0f6      	b.n	800a1fa <HAL_RCC_ClockConfig+0x34e>
      }
    }
    /* PLL is selected as System Clock Source */
    else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
 800a00c:	687b      	ldr	r3, [r7, #4]
 800a00e:	685b      	ldr	r3, [r3, #4]
 800a010:	2b03      	cmp	r3, #3
 800a012:	d107      	bne.n	800a024 <HAL_RCC_ClockConfig+0x178>
    {
      /* Check the PLL ready flag */
      if (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == 0U)
 800a014:	4b36      	ldr	r3, [pc, #216]	@ (800a0f0 <HAL_RCC_ClockConfig+0x244>)
 800a016:	681b      	ldr	r3, [r3, #0]
 800a018:	f003 7300 	and.w	r3, r3, #33554432	@ 0x2000000
 800a01c:	2b00      	cmp	r3, #0
 800a01e:	d115      	bne.n	800a04c <HAL_RCC_ClockConfig+0x1a0>
      {
        return HAL_ERROR;
 800a020:	2301      	movs	r3, #1
 800a022:	e0ea      	b.n	800a1fa <HAL_RCC_ClockConfig+0x34e>
      }
    }
    /* CSI is selected as System Clock Source */
    else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_CSI)
 800a024:	687b      	ldr	r3, [r7, #4]
 800a026:	685b      	ldr	r3, [r3, #4]
 800a028:	2b01      	cmp	r3, #1
 800a02a:	d107      	bne.n	800a03c <HAL_RCC_ClockConfig+0x190>
    {
      /* Check the PLL ready flag */
      if (__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) == 0U)
 800a02c:	4b30      	ldr	r3, [pc, #192]	@ (800a0f0 <HAL_RCC_ClockConfig+0x244>)
 800a02e:	681b      	ldr	r3, [r3, #0]
 800a030:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 800a034:	2b00      	cmp	r3, #0
 800a036:	d109      	bne.n	800a04c <HAL_RCC_ClockConfig+0x1a0>
      {
        return HAL_ERROR;
 800a038:	2301      	movs	r3, #1
 800a03a:	e0de      	b.n	800a1fa <HAL_RCC_ClockConfig+0x34e>
    }
    /* HSI is selected as System Clock Source */
    else
    {
      /* Check the HSI ready flag */
      if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U)
 800a03c:	4b2c      	ldr	r3, [pc, #176]	@ (800a0f0 <HAL_RCC_ClockConfig+0x244>)
 800a03e:	681b      	ldr	r3, [r3, #0]
 800a040:	f003 0304 	and.w	r3, r3, #4
 800a044:	2b00      	cmp	r3, #0
 800a046:	d101      	bne.n	800a04c <HAL_RCC_ClockConfig+0x1a0>
      {
        return HAL_ERROR;
 800a048:	2301      	movs	r3, #1
 800a04a:	e0d6      	b.n	800a1fa <HAL_RCC_ClockConfig+0x34e>
      }
    }
    MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, RCC_ClkInitStruct->SYSCLKSource);
 800a04c:	4b28      	ldr	r3, [pc, #160]	@ (800a0f0 <HAL_RCC_ClockConfig+0x244>)
 800a04e:	691b      	ldr	r3, [r3, #16]
 800a050:	f023 0207 	bic.w	r2, r3, #7
 800a054:	687b      	ldr	r3, [r7, #4]
 800a056:	685b      	ldr	r3, [r3, #4]
 800a058:	4925      	ldr	r1, [pc, #148]	@ (800a0f0 <HAL_RCC_ClockConfig+0x244>)
 800a05a:	4313      	orrs	r3, r2
 800a05c:	610b      	str	r3, [r1, #16]

    /* Get Start Tick*/
    tickstart = HAL_GetTick();
 800a05e:	f7fa fd97 	bl	8004b90 <HAL_GetTick>
 800a062:	6178      	str	r0, [r7, #20]

    while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
 800a064:	e00a      	b.n	800a07c <HAL_RCC_ClockConfig+0x1d0>
    {
      if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
 800a066:	f7fa fd93 	bl	8004b90 <HAL_GetTick>
 800a06a:	4602      	mov	r2, r0
 800a06c:	697b      	ldr	r3, [r7, #20]
 800a06e:	1ad3      	subs	r3, r2, r3
 800a070:	f241 3288 	movw	r2, #5000	@ 0x1388
 800a074:	4293      	cmp	r3, r2
 800a076:	d901      	bls.n	800a07c <HAL_RCC_ClockConfig+0x1d0>
      {
        return HAL_TIMEOUT;
 800a078:	2303      	movs	r3, #3
 800a07a:	e0be      	b.n	800a1fa <HAL_RCC_ClockConfig+0x34e>
    while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
 800a07c:	4b1c      	ldr	r3, [pc, #112]	@ (800a0f0 <HAL_RCC_ClockConfig+0x244>)
 800a07e:	691b      	ldr	r3, [r3, #16]
 800a080:	f003 0238 	and.w	r2, r3, #56	@ 0x38
 800a084:	687b      	ldr	r3, [r7, #4]
 800a086:	685b      	ldr	r3, [r3, #4]
 800a088:	00db      	lsls	r3, r3, #3
 800a08a:	429a      	cmp	r2, r3
 800a08c:	d1eb      	bne.n	800a066 <HAL_RCC_ClockConfig+0x1ba>

  }

  /* Decreasing the BUS frequency divider */
  /*-------------------------- HCLK Configuration --------------------------*/
  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
 800a08e:	687b      	ldr	r3, [r7, #4]
 800a090:	681b      	ldr	r3, [r3, #0]
 800a092:	f003 0302 	and.w	r3, r3, #2
 800a096:	2b00      	cmp	r3, #0
 800a098:	d010      	beq.n	800a0bc <HAL_RCC_ClockConfig+0x210>
  {
#if defined(RCC_D1CFGR_HPRE)
    if ((RCC_ClkInitStruct->AHBCLKDivider) < (RCC->D1CFGR & RCC_D1CFGR_HPRE))
 800a09a:	687b      	ldr	r3, [r7, #4]
 800a09c:	68da      	ldr	r2, [r3, #12]
 800a09e:	4b14      	ldr	r3, [pc, #80]	@ (800a0f0 <HAL_RCC_ClockConfig+0x244>)
 800a0a0:	699b      	ldr	r3, [r3, #24]
 800a0a2:	f003 030f 	and.w	r3, r3, #15
 800a0a6:	429a      	cmp	r2, r3
 800a0a8:	d208      	bcs.n	800a0bc <HAL_RCC_ClockConfig+0x210>
    {
      /* Set the new HCLK clock divider */
      assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
      MODIFY_REG(RCC->D1CFGR, RCC_D1CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
 800a0aa:	4b11      	ldr	r3, [pc, #68]	@ (800a0f0 <HAL_RCC_ClockConfig+0x244>)
 800a0ac:	699b      	ldr	r3, [r3, #24]
 800a0ae:	f023 020f 	bic.w	r2, r3, #15
 800a0b2:	687b      	ldr	r3, [r7, #4]
 800a0b4:	68db      	ldr	r3, [r3, #12]
 800a0b6:	490e      	ldr	r1, [pc, #56]	@ (800a0f0 <HAL_RCC_ClockConfig+0x244>)
 800a0b8:	4313      	orrs	r3, r2
 800a0ba:	618b      	str	r3, [r1, #24]
    }
#endif
  }

  /* Decreasing the number of wait states because of lower CPU frequency */
  if (FLatency < __HAL_FLASH_GET_LATENCY())
 800a0bc:	4b0b      	ldr	r3, [pc, #44]	@ (800a0ec <HAL_RCC_ClockConfig+0x240>)
 800a0be:	681b      	ldr	r3, [r3, #0]
 800a0c0:	f003 030f 	and.w	r3, r3, #15
 800a0c4:	683a      	ldr	r2, [r7, #0]
 800a0c6:	429a      	cmp	r2, r3
 800a0c8:	d214      	bcs.n	800a0f4 <HAL_RCC_ClockConfig+0x248>
  {
    /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
    __HAL_FLASH_SET_LATENCY(FLatency);
 800a0ca:	4b08      	ldr	r3, [pc, #32]	@ (800a0ec <HAL_RCC_ClockConfig+0x240>)
 800a0cc:	681b      	ldr	r3, [r3, #0]
 800a0ce:	f023 020f 	bic.w	r2, r3, #15
 800a0d2:	4906      	ldr	r1, [pc, #24]	@ (800a0ec <HAL_RCC_ClockConfig+0x240>)
 800a0d4:	683b      	ldr	r3, [r7, #0]
 800a0d6:	4313      	orrs	r3, r2
 800a0d8:	600b      	str	r3, [r1, #0]

    /* Check that the new number of wait states is taken into account to access the Flash
    memory by reading the FLASH_ACR register */
    if (__HAL_FLASH_GET_LATENCY() != FLatency)
 800a0da:	4b04      	ldr	r3, [pc, #16]	@ (800a0ec <HAL_RCC_ClockConfig+0x240>)
 800a0dc:	681b      	ldr	r3, [r3, #0]
 800a0de:	f003 030f 	and.w	r3, r3, #15
 800a0e2:	683a      	ldr	r2, [r7, #0]
 800a0e4:	429a      	cmp	r2, r3
 800a0e6:	d005      	beq.n	800a0f4 <HAL_RCC_ClockConfig+0x248>
    {
      return HAL_ERROR;
 800a0e8:	2301      	movs	r3, #1
 800a0ea:	e086      	b.n	800a1fa <HAL_RCC_ClockConfig+0x34e>
 800a0ec:	52002000 	.word	0x52002000
 800a0f0:	58024400 	.word	0x58024400
    }
  }

  /*-------------------------- D1PCLK1/CDPCLK Configuration ---------------------------*/
  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_D1PCLK1) == RCC_CLOCKTYPE_D1PCLK1)
 800a0f4:	687b      	ldr	r3, [r7, #4]
 800a0f6:	681b      	ldr	r3, [r3, #0]
 800a0f8:	f003 0304 	and.w	r3, r3, #4
 800a0fc:	2b00      	cmp	r3, #0
 800a0fe:	d010      	beq.n	800a122 <HAL_RCC_ClockConfig+0x276>
  {
#if defined(RCC_D1CFGR_D1PPRE)
    if ((RCC_ClkInitStruct->APB3CLKDivider) < (RCC->D1CFGR & RCC_D1CFGR_D1PPRE))
 800a100:	687b      	ldr	r3, [r7, #4]
 800a102:	691a      	ldr	r2, [r3, #16]
 800a104:	4b3f      	ldr	r3, [pc, #252]	@ (800a204 <HAL_RCC_ClockConfig+0x358>)
 800a106:	699b      	ldr	r3, [r3, #24]
 800a108:	f003 0370 	and.w	r3, r3, #112	@ 0x70
 800a10c:	429a      	cmp	r2, r3
 800a10e:	d208      	bcs.n	800a122 <HAL_RCC_ClockConfig+0x276>
    {
      assert_param(IS_RCC_D1PCLK1(RCC_ClkInitStruct->APB3CLKDivider));
      MODIFY_REG(RCC->D1CFGR, RCC_D1CFGR_D1PPRE, RCC_ClkInitStruct->APB3CLKDivider);
 800a110:	4b3c      	ldr	r3, [pc, #240]	@ (800a204 <HAL_RCC_ClockConfig+0x358>)
 800a112:	699b      	ldr	r3, [r3, #24]
 800a114:	f023 0270 	bic.w	r2, r3, #112	@ 0x70
 800a118:	687b      	ldr	r3, [r7, #4]
 800a11a:	691b      	ldr	r3, [r3, #16]
 800a11c:	4939      	ldr	r1, [pc, #228]	@ (800a204 <HAL_RCC_ClockConfig+0x358>)
 800a11e:	4313      	orrs	r3, r2
 800a120:	618b      	str	r3, [r1, #24]
    }
#endif
  }

  /*-------------------------- PCLK1 Configuration ---------------------------*/
  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
 800a122:	687b      	ldr	r3, [r7, #4]
 800a124:	681b      	ldr	r3, [r3, #0]
 800a126:	f003 0308 	and.w	r3, r3, #8
 800a12a:	2b00      	cmp	r3, #0
 800a12c:	d010      	beq.n	800a150 <HAL_RCC_ClockConfig+0x2a4>
  {
#if defined(RCC_D2CFGR_D2PPRE1)
    if ((RCC_ClkInitStruct->APB1CLKDivider) < (RCC->D2CFGR & RCC_D2CFGR_D2PPRE1))
 800a12e:	687b      	ldr	r3, [r7, #4]
 800a130:	695a      	ldr	r2, [r3, #20]
 800a132:	4b34      	ldr	r3, [pc, #208]	@ (800a204 <HAL_RCC_ClockConfig+0x358>)
 800a134:	69db      	ldr	r3, [r3, #28]
 800a136:	f003 0370 	and.w	r3, r3, #112	@ 0x70
 800a13a:	429a      	cmp	r2, r3
 800a13c:	d208      	bcs.n	800a150 <HAL_RCC_ClockConfig+0x2a4>
    {
      assert_param(IS_RCC_PCLK1(RCC_ClkInitStruct->APB1CLKDivider));
      MODIFY_REG(RCC->D2CFGR, RCC_D2CFGR_D2PPRE1, (RCC_ClkInitStruct->APB1CLKDivider));
 800a13e:	4b31      	ldr	r3, [pc, #196]	@ (800a204 <HAL_RCC_ClockConfig+0x358>)
 800a140:	69db      	ldr	r3, [r3, #28]
 800a142:	f023 0270 	bic.w	r2, r3, #112	@ 0x70
 800a146:	687b      	ldr	r3, [r7, #4]
 800a148:	695b      	ldr	r3, [r3, #20]
 800a14a:	492e      	ldr	r1, [pc, #184]	@ (800a204 <HAL_RCC_ClockConfig+0x358>)
 800a14c:	4313      	orrs	r3, r2
 800a14e:	61cb      	str	r3, [r1, #28]
    }
#endif
  }

  /*-------------------------- PCLK2 Configuration ---------------------------*/
  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
 800a150:	687b      	ldr	r3, [r7, #4]
 800a152:	681b      	ldr	r3, [r3, #0]
 800a154:	f003 0310 	and.w	r3, r3, #16
 800a158:	2b00      	cmp	r3, #0
 800a15a:	d010      	beq.n	800a17e <HAL_RCC_ClockConfig+0x2d2>
  {
#if defined (RCC_D2CFGR_D2PPRE2)
    if ((RCC_ClkInitStruct->APB2CLKDivider) < (RCC->D2CFGR & RCC_D2CFGR_D2PPRE2))
 800a15c:	687b      	ldr	r3, [r7, #4]
 800a15e:	699a      	ldr	r2, [r3, #24]
 800a160:	4b28      	ldr	r3, [pc, #160]	@ (800a204 <HAL_RCC_ClockConfig+0x358>)
 800a162:	69db      	ldr	r3, [r3, #28]
 800a164:	f403 63e0 	and.w	r3, r3, #1792	@ 0x700
 800a168:	429a      	cmp	r2, r3
 800a16a:	d208      	bcs.n	800a17e <HAL_RCC_ClockConfig+0x2d2>
    {
      assert_param(IS_RCC_PCLK2(RCC_ClkInitStruct->APB2CLKDivider));
      MODIFY_REG(RCC->D2CFGR, RCC_D2CFGR_D2PPRE2, (RCC_ClkInitStruct->APB2CLKDivider));
 800a16c:	4b25      	ldr	r3, [pc, #148]	@ (800a204 <HAL_RCC_ClockConfig+0x358>)
 800a16e:	69db      	ldr	r3, [r3, #28]
 800a170:	f423 62e0 	bic.w	r2, r3, #1792	@ 0x700
 800a174:	687b      	ldr	r3, [r7, #4]
 800a176:	699b      	ldr	r3, [r3, #24]
 800a178:	4922      	ldr	r1, [pc, #136]	@ (800a204 <HAL_RCC_ClockConfig+0x358>)
 800a17a:	4313      	orrs	r3, r2
 800a17c:	61cb      	str	r3, [r1, #28]
    }
#endif
  }

  /*-------------------------- D3PCLK1/SRDPCLK1 Configuration ---------------------------*/
  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_D3PCLK1) == RCC_CLOCKTYPE_D3PCLK1)
 800a17e:	687b      	ldr	r3, [r7, #4]
 800a180:	681b      	ldr	r3, [r3, #0]
 800a182:	f003 0320 	and.w	r3, r3, #32
 800a186:	2b00      	cmp	r3, #0
 800a188:	d010      	beq.n	800a1ac <HAL_RCC_ClockConfig+0x300>
  {
#if defined(RCC_D3CFGR_D3PPRE)
    if ((RCC_ClkInitStruct->APB4CLKDivider) < (RCC->D3CFGR & RCC_D3CFGR_D3PPRE))
 800a18a:	687b      	ldr	r3, [r7, #4]
 800a18c:	69da      	ldr	r2, [r3, #28]
 800a18e:	4b1d      	ldr	r3, [pc, #116]	@ (800a204 <HAL_RCC_ClockConfig+0x358>)
 800a190:	6a1b      	ldr	r3, [r3, #32]
 800a192:	f003 0370 	and.w	r3, r3, #112	@ 0x70
 800a196:	429a      	cmp	r2, r3
 800a198:	d208      	bcs.n	800a1ac <HAL_RCC_ClockConfig+0x300>
    {
      assert_param(IS_RCC_D3PCLK1(RCC_ClkInitStruct->APB4CLKDivider));
      MODIFY_REG(RCC->D3CFGR, RCC_D3CFGR_D3PPRE, (RCC_ClkInitStruct->APB4CLKDivider));
 800a19a:	4b1a      	ldr	r3, [pc, #104]	@ (800a204 <HAL_RCC_ClockConfig+0x358>)
 800a19c:	6a1b      	ldr	r3, [r3, #32]
 800a19e:	f023 0270 	bic.w	r2, r3, #112	@ 0x70
 800a1a2:	687b      	ldr	r3, [r7, #4]
 800a1a4:	69db      	ldr	r3, [r3, #28]
 800a1a6:	4917      	ldr	r1, [pc, #92]	@ (800a204 <HAL_RCC_ClockConfig+0x358>)
 800a1a8:	4313      	orrs	r3, r2
 800a1aa:	620b      	str	r3, [r1, #32]
#endif
  }

  /* Update the SystemCoreClock global variable */
#if defined(RCC_D1CFGR_D1CPRE)
  common_system_clock = HAL_RCC_GetSysClockFreq() >> ((D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_D1CPRE) >> RCC_D1CFGR_D1CPRE_Pos]) & 0x1FU);
 800a1ac:	f000 f834 	bl	800a218 <HAL_RCC_GetSysClockFreq>
 800a1b0:	4602      	mov	r2, r0
 800a1b2:	4b14      	ldr	r3, [pc, #80]	@ (800a204 <HAL_RCC_ClockConfig+0x358>)
 800a1b4:	699b      	ldr	r3, [r3, #24]
 800a1b6:	0a1b      	lsrs	r3, r3, #8
 800a1b8:	f003 030f 	and.w	r3, r3, #15
 800a1bc:	4912      	ldr	r1, [pc, #72]	@ (800a208 <HAL_RCC_ClockConfig+0x35c>)
 800a1be:	5ccb      	ldrb	r3, [r1, r3]
 800a1c0:	f003 031f 	and.w	r3, r3, #31
 800a1c4:	fa22 f303 	lsr.w	r3, r2, r3
 800a1c8:	613b      	str	r3, [r7, #16]
#else
  common_system_clock = HAL_RCC_GetSysClockFreq() >> ((D1CorePrescTable[(RCC->CDCFGR1 & RCC_CDCFGR1_CDCPRE) >> RCC_CDCFGR1_CDCPRE_Pos]) & 0x1FU);
#endif

#if defined(RCC_D1CFGR_HPRE)
  SystemD2Clock = (common_system_clock >> ((D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_HPRE) >> RCC_D1CFGR_HPRE_Pos]) & 0x1FU));
 800a1ca:	4b0e      	ldr	r3, [pc, #56]	@ (800a204 <HAL_RCC_ClockConfig+0x358>)
 800a1cc:	699b      	ldr	r3, [r3, #24]
 800a1ce:	f003 030f 	and.w	r3, r3, #15
 800a1d2:	4a0d      	ldr	r2, [pc, #52]	@ (800a208 <HAL_RCC_ClockConfig+0x35c>)
 800a1d4:	5cd3      	ldrb	r3, [r2, r3]
 800a1d6:	f003 031f 	and.w	r3, r3, #31
 800a1da:	693a      	ldr	r2, [r7, #16]
 800a1dc:	fa22 f303 	lsr.w	r3, r2, r3
 800a1e0:	4a0a      	ldr	r2, [pc, #40]	@ (800a20c <HAL_RCC_ClockConfig+0x360>)
 800a1e2:	6013      	str	r3, [r2, #0]
#endif

#if defined(DUAL_CORE) && defined(CORE_CM4)
  SystemCoreClock = SystemD2Clock;
#else
  SystemCoreClock = common_system_clock;
 800a1e4:	4a0a      	ldr	r2, [pc, #40]	@ (800a210 <HAL_RCC_ClockConfig+0x364>)
 800a1e6:	693b      	ldr	r3, [r7, #16]
 800a1e8:	6013      	str	r3, [r2, #0]
#endif /* DUAL_CORE && CORE_CM4 */

  /* Configure the source of time base considering new system clocks settings*/
  halstatus = HAL_InitTick(uwTickPrio);
 800a1ea:	4b0a      	ldr	r3, [pc, #40]	@ (800a214 <HAL_RCC_ClockConfig+0x368>)
 800a1ec:	681b      	ldr	r3, [r3, #0]
 800a1ee:	4618      	mov	r0, r3
 800a1f0:	f7f9 fba4 	bl	800393c <HAL_InitTick>
 800a1f4:	4603      	mov	r3, r0
 800a1f6:	73fb      	strb	r3, [r7, #15]

  return halstatus;
 800a1f8:	7bfb      	ldrb	r3, [r7, #15]
}
 800a1fa:	4618      	mov	r0, r3
 800a1fc:	3718      	adds	r7, #24
 800a1fe:	46bd      	mov	sp, r7
 800a200:	bd80      	pop	{r7, pc}
 800a202:	bf00      	nop
 800a204:	58024400 	.word	0x58024400
 800a208:	080305b8 	.word	0x080305b8
 800a20c:	24000010 	.word	0x24000010
 800a210:	2400000c 	.word	0x2400000c
 800a214:	24000018 	.word	0x24000018

0800a218 <HAL_RCC_GetSysClockFreq>:
  *
  *
  * @retval SYSCLK frequency
  */
uint32_t HAL_RCC_GetSysClockFreq(void)
{
 800a218:	b480      	push	{r7}
 800a21a:	b089      	sub	sp, #36	@ 0x24
 800a21c:	af00      	add	r7, sp, #0
  float_t fracn1, pllvco;
  uint32_t sysclockfreq;

  /* Get SYSCLK source -------------------------------------------------------*/

  switch (RCC->CFGR & RCC_CFGR_SWS)
 800a21e:	4bb3      	ldr	r3, [pc, #716]	@ (800a4ec <HAL_RCC_GetSysClockFreq+0x2d4>)
 800a220:	691b      	ldr	r3, [r3, #16]
 800a222:	f003 0338 	and.w	r3, r3, #56	@ 0x38
 800a226:	2b18      	cmp	r3, #24
 800a228:	f200 8155 	bhi.w	800a4d6 <HAL_RCC_GetSysClockFreq+0x2be>
 800a22c:	a201      	add	r2, pc, #4	@ (adr r2, 800a234 <HAL_RCC_GetSysClockFreq+0x1c>)
 800a22e:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800a232:	bf00      	nop
 800a234:	0800a299 	.word	0x0800a299
 800a238:	0800a4d7 	.word	0x0800a4d7
 800a23c:	0800a4d7 	.word	0x0800a4d7
 800a240:	0800a4d7 	.word	0x0800a4d7
 800a244:	0800a4d7 	.word	0x0800a4d7
 800a248:	0800a4d7 	.word	0x0800a4d7
 800a24c:	0800a4d7 	.word	0x0800a4d7
 800a250:	0800a4d7 	.word	0x0800a4d7
 800a254:	0800a2bf 	.word	0x0800a2bf
 800a258:	0800a4d7 	.word	0x0800a4d7
 800a25c:	0800a4d7 	.word	0x0800a4d7
 800a260:	0800a4d7 	.word	0x0800a4d7
 800a264:	0800a4d7 	.word	0x0800a4d7
 800a268:	0800a4d7 	.word	0x0800a4d7
 800a26c:	0800a4d7 	.word	0x0800a4d7
 800a270:	0800a4d7 	.word	0x0800a4d7
 800a274:	0800a2c5 	.word	0x0800a2c5
 800a278:	0800a4d7 	.word	0x0800a4d7
 800a27c:	0800a4d7 	.word	0x0800a4d7
 800a280:	0800a4d7 	.word	0x0800a4d7
 800a284:	0800a4d7 	.word	0x0800a4d7
 800a288:	0800a4d7 	.word	0x0800a4d7
 800a28c:	0800a4d7 	.word	0x0800a4d7
 800a290:	0800a4d7 	.word	0x0800a4d7
 800a294:	0800a2cb 	.word	0x0800a2cb
  {
    case RCC_CFGR_SWS_HSI:  /* HSI used as system clock source */

      if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
 800a298:	4b94      	ldr	r3, [pc, #592]	@ (800a4ec <HAL_RCC_GetSysClockFreq+0x2d4>)
 800a29a:	681b      	ldr	r3, [r3, #0]
 800a29c:	f003 0320 	and.w	r3, r3, #32
 800a2a0:	2b00      	cmp	r3, #0
 800a2a2:	d009      	beq.n	800a2b8 <HAL_RCC_GetSysClockFreq+0xa0>
      {
        sysclockfreq = (uint32_t)(HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3));
 800a2a4:	4b91      	ldr	r3, [pc, #580]	@ (800a4ec <HAL_RCC_GetSysClockFreq+0x2d4>)
 800a2a6:	681b      	ldr	r3, [r3, #0]
 800a2a8:	08db      	lsrs	r3, r3, #3
 800a2aa:	f003 0303 	and.w	r3, r3, #3
 800a2ae:	4a90      	ldr	r2, [pc, #576]	@ (800a4f0 <HAL_RCC_GetSysClockFreq+0x2d8>)
 800a2b0:	fa22 f303 	lsr.w	r3, r2, r3
 800a2b4:	61bb      	str	r3, [r7, #24]
      else
      {
        sysclockfreq = (uint32_t) HSI_VALUE;
      }

      break;
 800a2b6:	e111      	b.n	800a4dc <HAL_RCC_GetSysClockFreq+0x2c4>
        sysclockfreq = (uint32_t) HSI_VALUE;
 800a2b8:	4b8d      	ldr	r3, [pc, #564]	@ (800a4f0 <HAL_RCC_GetSysClockFreq+0x2d8>)
 800a2ba:	61bb      	str	r3, [r7, #24]
      break;
 800a2bc:	e10e      	b.n	800a4dc <HAL_RCC_GetSysClockFreq+0x2c4>

    case RCC_CFGR_SWS_CSI:  /* CSI used as system clock  source */
      sysclockfreq = CSI_VALUE;
 800a2be:	4b8d      	ldr	r3, [pc, #564]	@ (800a4f4 <HAL_RCC_GetSysClockFreq+0x2dc>)
 800a2c0:	61bb      	str	r3, [r7, #24]
      break;
 800a2c2:	e10b      	b.n	800a4dc <HAL_RCC_GetSysClockFreq+0x2c4>

    case RCC_CFGR_SWS_HSE:  /* HSE used as system clock  source */
      sysclockfreq = HSE_VALUE;
 800a2c4:	4b8c      	ldr	r3, [pc, #560]	@ (800a4f8 <HAL_RCC_GetSysClockFreq+0x2e0>)
 800a2c6:	61bb      	str	r3, [r7, #24]
      break;
 800a2c8:	e108      	b.n	800a4dc <HAL_RCC_GetSysClockFreq+0x2c4>
    case RCC_CFGR_SWS_PLL1:  /* PLL1 used as system clock  source */

      /* PLL_VCO = (HSE_VALUE or HSI_VALUE or CSI_VALUE/ PLLM) * PLLN
      SYSCLK = PLL_VCO / PLLR
      */
      pllsource = (RCC->PLLCKSELR & RCC_PLLCKSELR_PLLSRC);
 800a2ca:	4b88      	ldr	r3, [pc, #544]	@ (800a4ec <HAL_RCC_GetSysClockFreq+0x2d4>)
 800a2cc:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800a2ce:	f003 0303 	and.w	r3, r3, #3
 800a2d2:	617b      	str	r3, [r7, #20]
      pllm = ((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM1) >> 4)  ;
 800a2d4:	4b85      	ldr	r3, [pc, #532]	@ (800a4ec <HAL_RCC_GetSysClockFreq+0x2d4>)
 800a2d6:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800a2d8:	091b      	lsrs	r3, r3, #4
 800a2da:	f003 033f 	and.w	r3, r3, #63	@ 0x3f
 800a2de:	613b      	str	r3, [r7, #16]
      pllfracen = ((RCC-> PLLCFGR & RCC_PLLCFGR_PLL1FRACEN) >> RCC_PLLCFGR_PLL1FRACEN_Pos);
 800a2e0:	4b82      	ldr	r3, [pc, #520]	@ (800a4ec <HAL_RCC_GetSysClockFreq+0x2d4>)
 800a2e2:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800a2e4:	f003 0301 	and.w	r3, r3, #1
 800a2e8:	60fb      	str	r3, [r7, #12]
      fracn1 = (float_t)(uint32_t)(pllfracen * ((RCC->PLL1FRACR & RCC_PLL1FRACR_FRACN1) >> 3));
 800a2ea:	4b80      	ldr	r3, [pc, #512]	@ (800a4ec <HAL_RCC_GetSysClockFreq+0x2d4>)
 800a2ec:	6b5b      	ldr	r3, [r3, #52]	@ 0x34
 800a2ee:	08db      	lsrs	r3, r3, #3
 800a2f0:	f3c3 030c 	ubfx	r3, r3, #0, #13
 800a2f4:	68fa      	ldr	r2, [r7, #12]
 800a2f6:	fb02 f303 	mul.w	r3, r2, r3
 800a2fa:	ee07 3a90 	vmov	s15, r3
 800a2fe:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800a302:	edc7 7a02 	vstr	s15, [r7, #8]

      if (pllm != 0U)
 800a306:	693b      	ldr	r3, [r7, #16]
 800a308:	2b00      	cmp	r3, #0
 800a30a:	f000 80e1 	beq.w	800a4d0 <HAL_RCC_GetSysClockFreq+0x2b8>
 800a30e:	697b      	ldr	r3, [r7, #20]
 800a310:	2b02      	cmp	r3, #2
 800a312:	f000 8083 	beq.w	800a41c <HAL_RCC_GetSysClockFreq+0x204>
 800a316:	697b      	ldr	r3, [r7, #20]
 800a318:	2b02      	cmp	r3, #2
 800a31a:	f200 80a1 	bhi.w	800a460 <HAL_RCC_GetSysClockFreq+0x248>
 800a31e:	697b      	ldr	r3, [r7, #20]
 800a320:	2b00      	cmp	r3, #0
 800a322:	d003      	beq.n	800a32c <HAL_RCC_GetSysClockFreq+0x114>
 800a324:	697b      	ldr	r3, [r7, #20]
 800a326:	2b01      	cmp	r3, #1
 800a328:	d056      	beq.n	800a3d8 <HAL_RCC_GetSysClockFreq+0x1c0>
 800a32a:	e099      	b.n	800a460 <HAL_RCC_GetSysClockFreq+0x248>
      {
        switch (pllsource)
        {
          case RCC_PLLSOURCE_HSI:  /* HSI used as PLL clock source */

            if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
 800a32c:	4b6f      	ldr	r3, [pc, #444]	@ (800a4ec <HAL_RCC_GetSysClockFreq+0x2d4>)
 800a32e:	681b      	ldr	r3, [r3, #0]
 800a330:	f003 0320 	and.w	r3, r3, #32
 800a334:	2b00      	cmp	r3, #0
 800a336:	d02d      	beq.n	800a394 <HAL_RCC_GetSysClockFreq+0x17c>
            {
              hsivalue = (HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3));
 800a338:	4b6c      	ldr	r3, [pc, #432]	@ (800a4ec <HAL_RCC_GetSysClockFreq+0x2d4>)
 800a33a:	681b      	ldr	r3, [r3, #0]
 800a33c:	08db      	lsrs	r3, r3, #3
 800a33e:	f003 0303 	and.w	r3, r3, #3
 800a342:	4a6b      	ldr	r2, [pc, #428]	@ (800a4f0 <HAL_RCC_GetSysClockFreq+0x2d8>)
 800a344:	fa22 f303 	lsr.w	r3, r2, r3
 800a348:	607b      	str	r3, [r7, #4]
              pllvco = ((float_t)hsivalue / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1 / (float_t)0x2000) + (float_t)1);
 800a34a:	687b      	ldr	r3, [r7, #4]
 800a34c:	ee07 3a90 	vmov	s15, r3
 800a350:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800a354:	693b      	ldr	r3, [r7, #16]
 800a356:	ee07 3a90 	vmov	s15, r3
 800a35a:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800a35e:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800a362:	4b62      	ldr	r3, [pc, #392]	@ (800a4ec <HAL_RCC_GetSysClockFreq+0x2d4>)
 800a364:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 800a366:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800a36a:	ee07 3a90 	vmov	s15, r3
 800a36e:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800a372:	ed97 6a02 	vldr	s12, [r7, #8]
 800a376:	eddf 5a61 	vldr	s11, [pc, #388]	@ 800a4fc <HAL_RCC_GetSysClockFreq+0x2e4>
 800a37a:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800a37e:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800a382:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800a386:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800a38a:	ee67 7a27 	vmul.f32	s15, s14, s15
 800a38e:	edc7 7a07 	vstr	s15, [r7, #28]
            }
            else
            {
              pllvco = ((float_t)HSI_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1 / (float_t)0x2000) + (float_t)1);
            }
            break;
 800a392:	e087      	b.n	800a4a4 <HAL_RCC_GetSysClockFreq+0x28c>
              pllvco = ((float_t)HSI_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1 / (float_t)0x2000) + (float_t)1);
 800a394:	693b      	ldr	r3, [r7, #16]
 800a396:	ee07 3a90 	vmov	s15, r3
 800a39a:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800a39e:	eddf 6a58 	vldr	s13, [pc, #352]	@ 800a500 <HAL_RCC_GetSysClockFreq+0x2e8>
 800a3a2:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800a3a6:	4b51      	ldr	r3, [pc, #324]	@ (800a4ec <HAL_RCC_GetSysClockFreq+0x2d4>)
 800a3a8:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 800a3aa:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800a3ae:	ee07 3a90 	vmov	s15, r3
 800a3b2:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800a3b6:	ed97 6a02 	vldr	s12, [r7, #8]
 800a3ba:	eddf 5a50 	vldr	s11, [pc, #320]	@ 800a4fc <HAL_RCC_GetSysClockFreq+0x2e4>
 800a3be:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800a3c2:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800a3c6:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800a3ca:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800a3ce:	ee67 7a27 	vmul.f32	s15, s14, s15
 800a3d2:	edc7 7a07 	vstr	s15, [r7, #28]
            break;
 800a3d6:	e065      	b.n	800a4a4 <HAL_RCC_GetSysClockFreq+0x28c>

          case RCC_PLLSOURCE_CSI:  /* CSI used as PLL clock source */
            pllvco = ((float_t)CSI_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1 / (float_t)0x2000) + (float_t)1);
 800a3d8:	693b      	ldr	r3, [r7, #16]
 800a3da:	ee07 3a90 	vmov	s15, r3
 800a3de:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800a3e2:	eddf 6a48 	vldr	s13, [pc, #288]	@ 800a504 <HAL_RCC_GetSysClockFreq+0x2ec>
 800a3e6:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800a3ea:	4b40      	ldr	r3, [pc, #256]	@ (800a4ec <HAL_RCC_GetSysClockFreq+0x2d4>)
 800a3ec:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 800a3ee:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800a3f2:	ee07 3a90 	vmov	s15, r3
 800a3f6:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800a3fa:	ed97 6a02 	vldr	s12, [r7, #8]
 800a3fe:	eddf 5a3f 	vldr	s11, [pc, #252]	@ 800a4fc <HAL_RCC_GetSysClockFreq+0x2e4>
 800a402:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800a406:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800a40a:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800a40e:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800a412:	ee67 7a27 	vmul.f32	s15, s14, s15
 800a416:	edc7 7a07 	vstr	s15, [r7, #28]
            break;
 800a41a:	e043      	b.n	800a4a4 <HAL_RCC_GetSysClockFreq+0x28c>

          case RCC_PLLSOURCE_HSE:  /* HSE used as PLL clock source */
            pllvco = ((float_t)HSE_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1 / (float_t)0x2000) + (float_t)1);
 800a41c:	693b      	ldr	r3, [r7, #16]
 800a41e:	ee07 3a90 	vmov	s15, r3
 800a422:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800a426:	eddf 6a38 	vldr	s13, [pc, #224]	@ 800a508 <HAL_RCC_GetSysClockFreq+0x2f0>
 800a42a:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800a42e:	4b2f      	ldr	r3, [pc, #188]	@ (800a4ec <HAL_RCC_GetSysClockFreq+0x2d4>)
 800a430:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 800a432:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800a436:	ee07 3a90 	vmov	s15, r3
 800a43a:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800a43e:	ed97 6a02 	vldr	s12, [r7, #8]
 800a442:	eddf 5a2e 	vldr	s11, [pc, #184]	@ 800a4fc <HAL_RCC_GetSysClockFreq+0x2e4>
 800a446:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800a44a:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800a44e:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800a452:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800a456:	ee67 7a27 	vmul.f32	s15, s14, s15
 800a45a:	edc7 7a07 	vstr	s15, [r7, #28]
            break;
 800a45e:	e021      	b.n	800a4a4 <HAL_RCC_GetSysClockFreq+0x28c>

          default:
            pllvco = ((float_t)CSI_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1 / (float_t)0x2000) + (float_t)1);
 800a460:	693b      	ldr	r3, [r7, #16]
 800a462:	ee07 3a90 	vmov	s15, r3
 800a466:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800a46a:	eddf 6a26 	vldr	s13, [pc, #152]	@ 800a504 <HAL_RCC_GetSysClockFreq+0x2ec>
 800a46e:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800a472:	4b1e      	ldr	r3, [pc, #120]	@ (800a4ec <HAL_RCC_GetSysClockFreq+0x2d4>)
 800a474:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 800a476:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800a47a:	ee07 3a90 	vmov	s15, r3
 800a47e:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800a482:	ed97 6a02 	vldr	s12, [r7, #8]
 800a486:	eddf 5a1d 	vldr	s11, [pc, #116]	@ 800a4fc <HAL_RCC_GetSysClockFreq+0x2e4>
 800a48a:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800a48e:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800a492:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800a496:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800a49a:	ee67 7a27 	vmul.f32	s15, s14, s15
 800a49e:	edc7 7a07 	vstr	s15, [r7, #28]
            break;
 800a4a2:	bf00      	nop
        }
        pllp = (((RCC->PLL1DIVR & RCC_PLL1DIVR_P1) >> 9) + 1U) ;
 800a4a4:	4b11      	ldr	r3, [pc, #68]	@ (800a4ec <HAL_RCC_GetSysClockFreq+0x2d4>)
 800a4a6:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 800a4a8:	0a5b      	lsrs	r3, r3, #9
 800a4aa:	f003 037f 	and.w	r3, r3, #127	@ 0x7f
 800a4ae:	3301      	adds	r3, #1
 800a4b0:	603b      	str	r3, [r7, #0]
        sysclockfreq = (uint32_t)(float_t)(pllvco / (float_t)pllp);
 800a4b2:	683b      	ldr	r3, [r7, #0]
 800a4b4:	ee07 3a90 	vmov	s15, r3
 800a4b8:	eeb8 7a67 	vcvt.f32.u32	s14, s15
 800a4bc:	edd7 6a07 	vldr	s13, [r7, #28]
 800a4c0:	eec6 7a87 	vdiv.f32	s15, s13, s14
 800a4c4:	eefc 7ae7 	vcvt.u32.f32	s15, s15
 800a4c8:	ee17 3a90 	vmov	r3, s15
 800a4cc:	61bb      	str	r3, [r7, #24]
      }
      else
      {
        sysclockfreq = 0U;
      }
      break;
 800a4ce:	e005      	b.n	800a4dc <HAL_RCC_GetSysClockFreq+0x2c4>
        sysclockfreq = 0U;
 800a4d0:	2300      	movs	r3, #0
 800a4d2:	61bb      	str	r3, [r7, #24]
      break;
 800a4d4:	e002      	b.n	800a4dc <HAL_RCC_GetSysClockFreq+0x2c4>

    default:
      sysclockfreq = CSI_VALUE;
 800a4d6:	4b07      	ldr	r3, [pc, #28]	@ (800a4f4 <HAL_RCC_GetSysClockFreq+0x2dc>)
 800a4d8:	61bb      	str	r3, [r7, #24]
      break;
 800a4da:	bf00      	nop
  }

  return sysclockfreq;
 800a4dc:	69bb      	ldr	r3, [r7, #24]
}
 800a4de:	4618      	mov	r0, r3
 800a4e0:	3724      	adds	r7, #36	@ 0x24
 800a4e2:	46bd      	mov	sp, r7
 800a4e4:	f85d 7b04 	ldr.w	r7, [sp], #4
 800a4e8:	4770      	bx	lr
 800a4ea:	bf00      	nop
 800a4ec:	58024400 	.word	0x58024400
 800a4f0:	03d09000 	.word	0x03d09000
 800a4f4:	003d0900 	.word	0x003d0900
 800a4f8:	017d7840 	.word	0x017d7840
 800a4fc:	46000000 	.word	0x46000000
 800a500:	4c742400 	.word	0x4c742400
 800a504:	4a742400 	.word	0x4a742400
 800a508:	4bbebc20 	.word	0x4bbebc20

0800a50c <HAL_RCC_GetHCLKFreq>:
  * @note   The SystemD2Clock CMSIS variable is used to store System domain2 Clock Frequency
  *         and updated within this function
  * @retval HCLK frequency
  */
uint32_t HAL_RCC_GetHCLKFreq(void)
{
 800a50c:	b580      	push	{r7, lr}
 800a50e:	b082      	sub	sp, #8
 800a510:	af00      	add	r7, sp, #0
  uint32_t common_system_clock;

#if defined(RCC_D1CFGR_D1CPRE)
  common_system_clock = HAL_RCC_GetSysClockFreq() >> (D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_D1CPRE) >> RCC_D1CFGR_D1CPRE_Pos] & 0x1FU);
 800a512:	f7ff fe81 	bl	800a218 <HAL_RCC_GetSysClockFreq>
 800a516:	4602      	mov	r2, r0
 800a518:	4b10      	ldr	r3, [pc, #64]	@ (800a55c <HAL_RCC_GetHCLKFreq+0x50>)
 800a51a:	699b      	ldr	r3, [r3, #24]
 800a51c:	0a1b      	lsrs	r3, r3, #8
 800a51e:	f003 030f 	and.w	r3, r3, #15
 800a522:	490f      	ldr	r1, [pc, #60]	@ (800a560 <HAL_RCC_GetHCLKFreq+0x54>)
 800a524:	5ccb      	ldrb	r3, [r1, r3]
 800a526:	f003 031f 	and.w	r3, r3, #31
 800a52a:	fa22 f303 	lsr.w	r3, r2, r3
 800a52e:	607b      	str	r3, [r7, #4]
#else
  common_system_clock = HAL_RCC_GetSysClockFreq() >> (D1CorePrescTable[(RCC->CDCFGR1 & RCC_CDCFGR1_CDCPRE) >> RCC_CDCFGR1_CDCPRE_Pos] & 0x1FU);
#endif

#if defined(RCC_D1CFGR_HPRE)
  SystemD2Clock = (common_system_clock >> ((D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_HPRE) >> RCC_D1CFGR_HPRE_Pos]) & 0x1FU));
 800a530:	4b0a      	ldr	r3, [pc, #40]	@ (800a55c <HAL_RCC_GetHCLKFreq+0x50>)
 800a532:	699b      	ldr	r3, [r3, #24]
 800a534:	f003 030f 	and.w	r3, r3, #15
 800a538:	4a09      	ldr	r2, [pc, #36]	@ (800a560 <HAL_RCC_GetHCLKFreq+0x54>)
 800a53a:	5cd3      	ldrb	r3, [r2, r3]
 800a53c:	f003 031f 	and.w	r3, r3, #31
 800a540:	687a      	ldr	r2, [r7, #4]
 800a542:	fa22 f303 	lsr.w	r3, r2, r3
 800a546:	4a07      	ldr	r2, [pc, #28]	@ (800a564 <HAL_RCC_GetHCLKFreq+0x58>)
 800a548:	6013      	str	r3, [r2, #0]
#endif

#if defined(DUAL_CORE) && defined(CORE_CM4)
  SystemCoreClock = SystemD2Clock;
#else
  SystemCoreClock = common_system_clock;
 800a54a:	4a07      	ldr	r2, [pc, #28]	@ (800a568 <HAL_RCC_GetHCLKFreq+0x5c>)
 800a54c:	687b      	ldr	r3, [r7, #4]
 800a54e:	6013      	str	r3, [r2, #0]
#endif /* DUAL_CORE && CORE_CM4 */

  return SystemD2Clock;
 800a550:	4b04      	ldr	r3, [pc, #16]	@ (800a564 <HAL_RCC_GetHCLKFreq+0x58>)
 800a552:	681b      	ldr	r3, [r3, #0]
}
 800a554:	4618      	mov	r0, r3
 800a556:	3708      	adds	r7, #8
 800a558:	46bd      	mov	sp, r7
 800a55a:	bd80      	pop	{r7, pc}
 800a55c:	58024400 	.word	0x58024400
 800a560:	080305b8 	.word	0x080305b8
 800a564:	24000010 	.word	0x24000010
 800a568:	2400000c 	.word	0x2400000c

0800a56c <HAL_RCC_GetPCLK1Freq>:
  * @note   Each time PCLK1 changes, this function must be called to update the
  *         right PCLK1 value. Otherwise, any configuration based on this function will be incorrect.
  * @retval PCLK1 frequency
  */
uint32_t HAL_RCC_GetPCLK1Freq(void)
{
 800a56c:	b580      	push	{r7, lr}
 800a56e:	af00      	add	r7, sp, #0
#if defined (RCC_D2CFGR_D2PPRE1)
  /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
  return (HAL_RCC_GetHCLKFreq() >> ((D1CorePrescTable[(RCC->D2CFGR & RCC_D2CFGR_D2PPRE1) >> RCC_D2CFGR_D2PPRE1_Pos]) & 0x1FU));
 800a570:	f7ff ffcc 	bl	800a50c <HAL_RCC_GetHCLKFreq>
 800a574:	4602      	mov	r2, r0
 800a576:	4b06      	ldr	r3, [pc, #24]	@ (800a590 <HAL_RCC_GetPCLK1Freq+0x24>)
 800a578:	69db      	ldr	r3, [r3, #28]
 800a57a:	091b      	lsrs	r3, r3, #4
 800a57c:	f003 0307 	and.w	r3, r3, #7
 800a580:	4904      	ldr	r1, [pc, #16]	@ (800a594 <HAL_RCC_GetPCLK1Freq+0x28>)
 800a582:	5ccb      	ldrb	r3, [r1, r3]
 800a584:	f003 031f 	and.w	r3, r3, #31
 800a588:	fa22 f303 	lsr.w	r3, r2, r3
#else
  /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
  return (HAL_RCC_GetHCLKFreq() >> ((D1CorePrescTable[(RCC->CDCFGR2 & RCC_CDCFGR2_CDPPRE1) >> RCC_CDCFGR2_CDPPRE1_Pos]) & 0x1FU));
#endif
}
 800a58c:	4618      	mov	r0, r3
 800a58e:	bd80      	pop	{r7, pc}
 800a590:	58024400 	.word	0x58024400
 800a594:	080305b8 	.word	0x080305b8

0800a598 <HAL_RCC_GetPCLK2Freq>:
  * @note   Each time PCLK2 changes, this function must be called to update the
  *         right PCLK2 value. Otherwise, any configuration based on this function will be incorrect.
  * @retval PCLK1 frequency
  */
uint32_t HAL_RCC_GetPCLK2Freq(void)
{
 800a598:	b580      	push	{r7, lr}
 800a59a:	af00      	add	r7, sp, #0
  /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
#if defined(RCC_D2CFGR_D2PPRE2)
  return (HAL_RCC_GetHCLKFreq() >> ((D1CorePrescTable[(RCC->D2CFGR & RCC_D2CFGR_D2PPRE2) >> RCC_D2CFGR_D2PPRE2_Pos]) & 0x1FU));
 800a59c:	f7ff ffb6 	bl	800a50c <HAL_RCC_GetHCLKFreq>
 800a5a0:	4602      	mov	r2, r0
 800a5a2:	4b06      	ldr	r3, [pc, #24]	@ (800a5bc <HAL_RCC_GetPCLK2Freq+0x24>)
 800a5a4:	69db      	ldr	r3, [r3, #28]
 800a5a6:	0a1b      	lsrs	r3, r3, #8
 800a5a8:	f003 0307 	and.w	r3, r3, #7
 800a5ac:	4904      	ldr	r1, [pc, #16]	@ (800a5c0 <HAL_RCC_GetPCLK2Freq+0x28>)
 800a5ae:	5ccb      	ldrb	r3, [r1, r3]
 800a5b0:	f003 031f 	and.w	r3, r3, #31
 800a5b4:	fa22 f303 	lsr.w	r3, r2, r3
#else
  return (HAL_RCC_GetHCLKFreq() >> ((D1CorePrescTable[(RCC->CDCFGR2 & RCC_CDCFGR2_CDPPRE2) >> RCC_CDCFGR2_CDPPRE2_Pos]) & 0x1FU));
#endif
}
 800a5b8:	4618      	mov	r0, r3
 800a5ba:	bd80      	pop	{r7, pc}
 800a5bc:	58024400 	.word	0x58024400
 800a5c0:	080305b8 	.word	0x080305b8

0800a5c4 <HAL_RCC_GetClockConfig>:
  * will be configured.
  * @param  pFLatency: Pointer on the Flash Latency.
  * @retval None
  */
void HAL_RCC_GetClockConfig(RCC_ClkInitTypeDef  *RCC_ClkInitStruct, uint32_t *pFLatency)
{
 800a5c4:	b480      	push	{r7}
 800a5c6:	b083      	sub	sp, #12
 800a5c8:	af00      	add	r7, sp, #0
 800a5ca:	6078      	str	r0, [r7, #4]
 800a5cc:	6039      	str	r1, [r7, #0]
  /* Set all possible values for the Clock type parameter --------------------*/
  RCC_ClkInitStruct->ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_D1PCLK1 | RCC_CLOCKTYPE_PCLK1 |
 800a5ce:	687b      	ldr	r3, [r7, #4]
 800a5d0:	223f      	movs	r2, #63	@ 0x3f
 800a5d2:	601a      	str	r2, [r3, #0]
                                 RCC_CLOCKTYPE_PCLK2 |  RCC_CLOCKTYPE_D3PCLK1  ;

  /* Get the SYSCLK configuration --------------------------------------------*/
  RCC_ClkInitStruct->SYSCLKSource = (uint32_t)(RCC->CFGR & RCC_CFGR_SW);
 800a5d4:	4b1a      	ldr	r3, [pc, #104]	@ (800a640 <HAL_RCC_GetClockConfig+0x7c>)
 800a5d6:	691b      	ldr	r3, [r3, #16]
 800a5d8:	f003 0207 	and.w	r2, r3, #7
 800a5dc:	687b      	ldr	r3, [r7, #4]
 800a5de:	605a      	str	r2, [r3, #4]

#if defined(RCC_D1CFGR_D1CPRE)
  /* Get the SYSCLK configuration ----------------------------------------------*/
  RCC_ClkInitStruct->SYSCLKDivider = (uint32_t)(RCC->D1CFGR & RCC_D1CFGR_D1CPRE);
 800a5e0:	4b17      	ldr	r3, [pc, #92]	@ (800a640 <HAL_RCC_GetClockConfig+0x7c>)
 800a5e2:	699b      	ldr	r3, [r3, #24]
 800a5e4:	f403 6270 	and.w	r2, r3, #3840	@ 0xf00
 800a5e8:	687b      	ldr	r3, [r7, #4]
 800a5ea:	609a      	str	r2, [r3, #8]

  /* Get the D1HCLK configuration ----------------------------------------------*/
  RCC_ClkInitStruct->AHBCLKDivider = (uint32_t)(RCC->D1CFGR & RCC_D1CFGR_HPRE);
 800a5ec:	4b14      	ldr	r3, [pc, #80]	@ (800a640 <HAL_RCC_GetClockConfig+0x7c>)
 800a5ee:	699b      	ldr	r3, [r3, #24]
 800a5f0:	f003 020f 	and.w	r2, r3, #15
 800a5f4:	687b      	ldr	r3, [r7, #4]
 800a5f6:	60da      	str	r2, [r3, #12]

  /* Get the APB3 configuration ----------------------------------------------*/
  RCC_ClkInitStruct->APB3CLKDivider = (uint32_t)(RCC->D1CFGR & RCC_D1CFGR_D1PPRE);
 800a5f8:	4b11      	ldr	r3, [pc, #68]	@ (800a640 <HAL_RCC_GetClockConfig+0x7c>)
 800a5fa:	699b      	ldr	r3, [r3, #24]
 800a5fc:	f003 0270 	and.w	r2, r3, #112	@ 0x70
 800a600:	687b      	ldr	r3, [r7, #4]
 800a602:	611a      	str	r2, [r3, #16]

  /* Get the APB1 configuration ----------------------------------------------*/
  RCC_ClkInitStruct->APB1CLKDivider = (uint32_t)(RCC->D2CFGR & RCC_D2CFGR_D2PPRE1);
 800a604:	4b0e      	ldr	r3, [pc, #56]	@ (800a640 <HAL_RCC_GetClockConfig+0x7c>)
 800a606:	69db      	ldr	r3, [r3, #28]
 800a608:	f003 0270 	and.w	r2, r3, #112	@ 0x70
 800a60c:	687b      	ldr	r3, [r7, #4]
 800a60e:	615a      	str	r2, [r3, #20]

  /* Get the APB2 configuration ----------------------------------------------*/
  RCC_ClkInitStruct->APB2CLKDivider = (uint32_t)(RCC->D2CFGR & RCC_D2CFGR_D2PPRE2);
 800a610:	4b0b      	ldr	r3, [pc, #44]	@ (800a640 <HAL_RCC_GetClockConfig+0x7c>)
 800a612:	69db      	ldr	r3, [r3, #28]
 800a614:	f403 62e0 	and.w	r2, r3, #1792	@ 0x700
 800a618:	687b      	ldr	r3, [r7, #4]
 800a61a:	619a      	str	r2, [r3, #24]

  /* Get the APB4 configuration ----------------------------------------------*/
  RCC_ClkInitStruct->APB4CLKDivider = (uint32_t)(RCC->D3CFGR & RCC_D3CFGR_D3PPRE);
 800a61c:	4b08      	ldr	r3, [pc, #32]	@ (800a640 <HAL_RCC_GetClockConfig+0x7c>)
 800a61e:	6a1b      	ldr	r3, [r3, #32]
 800a620:	f003 0270 	and.w	r2, r3, #112	@ 0x70
 800a624:	687b      	ldr	r3, [r7, #4]
 800a626:	61da      	str	r2, [r3, #28]
  /* Get the APB4 configuration ----------------------------------------------*/
  RCC_ClkInitStruct->APB4CLKDivider = (uint32_t)(RCC->SRDCFGR & RCC_SRDCFGR_SRDPPRE);
#endif

  /* Get the Flash Wait State (Latency) configuration ------------------------*/
  *pFLatency = (uint32_t)(FLASH->ACR & FLASH_ACR_LATENCY);
 800a628:	4b06      	ldr	r3, [pc, #24]	@ (800a644 <HAL_RCC_GetClockConfig+0x80>)
 800a62a:	681b      	ldr	r3, [r3, #0]
 800a62c:	f003 020f 	and.w	r2, r3, #15
 800a630:	683b      	ldr	r3, [r7, #0]
 800a632:	601a      	str	r2, [r3, #0]
}
 800a634:	bf00      	nop
 800a636:	370c      	adds	r7, #12
 800a638:	46bd      	mov	sp, r7
 800a63a:	f85d 7b04 	ldr.w	r7, [sp], #4
 800a63e:	4770      	bx	lr
 800a640:	58024400 	.word	0x58024400
 800a644:	52002000 	.word	0x52002000

0800a648 <HAL_RCCEx_PeriphCLKConfig>:
  * (*) : Available on some STM32H7 lines only.
  *
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef  *PeriphClkInit)
{
 800a648:	e92d 4fb0 	stmdb	sp!, {r4, r5, r7, r8, r9, sl, fp, lr}
 800a64c:	b0c8      	sub	sp, #288	@ 0x120
 800a64e:	af00      	add	r7, sp, #0
 800a650:	f8c7 010c 	str.w	r0, [r7, #268]	@ 0x10c
  uint32_t tmpreg;
  uint32_t tickstart;
  HAL_StatusTypeDef ret = HAL_OK;      /* Intermediate status */
 800a654:	2300      	movs	r3, #0
 800a656:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
  HAL_StatusTypeDef status = HAL_OK;   /* Final status */
 800a65a:	2300      	movs	r3, #0
 800a65c:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e

  /*---------------------------- SPDIFRX configuration -------------------------------*/

  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SPDIFRX) == RCC_PERIPHCLK_SPDIFRX)
 800a660:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800a664:	e9d3 2300 	ldrd	r2, r3, [r3]
 800a668:	f002 6400 	and.w	r4, r2, #134217728	@ 0x8000000
 800a66c:	2500      	movs	r5, #0
 800a66e:	ea54 0305 	orrs.w	r3, r4, r5
 800a672:	d049      	beq.n	800a708 <HAL_RCCEx_PeriphCLKConfig+0xc0>
  {

    switch (PeriphClkInit->SpdifrxClockSelection)
 800a674:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800a678:	6e9b      	ldr	r3, [r3, #104]	@ 0x68
 800a67a:	f5b3 1f40 	cmp.w	r3, #3145728	@ 0x300000
 800a67e:	d02f      	beq.n	800a6e0 <HAL_RCCEx_PeriphCLKConfig+0x98>
 800a680:	f5b3 1f40 	cmp.w	r3, #3145728	@ 0x300000
 800a684:	d828      	bhi.n	800a6d8 <HAL_RCCEx_PeriphCLKConfig+0x90>
 800a686:	f5b3 1f00 	cmp.w	r3, #2097152	@ 0x200000
 800a68a:	d01a      	beq.n	800a6c2 <HAL_RCCEx_PeriphCLKConfig+0x7a>
 800a68c:	f5b3 1f00 	cmp.w	r3, #2097152	@ 0x200000
 800a690:	d822      	bhi.n	800a6d8 <HAL_RCCEx_PeriphCLKConfig+0x90>
 800a692:	2b00      	cmp	r3, #0
 800a694:	d003      	beq.n	800a69e <HAL_RCCEx_PeriphCLKConfig+0x56>
 800a696:	f5b3 1f80 	cmp.w	r3, #1048576	@ 0x100000
 800a69a:	d007      	beq.n	800a6ac <HAL_RCCEx_PeriphCLKConfig+0x64>
 800a69c:	e01c      	b.n	800a6d8 <HAL_RCCEx_PeriphCLKConfig+0x90>
    {
      case RCC_SPDIFRXCLKSOURCE_PLL:      /* PLL is used as clock source for SPDIFRX*/
        /* Enable PLL1Q Clock output generated form System PLL . */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
 800a69e:	4bb8      	ldr	r3, [pc, #736]	@ (800a980 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800a6a0:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800a6a2:	4ab7      	ldr	r2, [pc, #732]	@ (800a980 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800a6a4:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800a6a8:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* SPDIFRX clock source configuration done later after clock selection check */
        break;
 800a6aa:	e01a      	b.n	800a6e2 <HAL_RCCEx_PeriphCLKConfig+0x9a>

      case RCC_SPDIFRXCLKSOURCE_PLL2: /* PLL2 is used as clock source for SPDIFRX*/

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_R_UPDATE);
 800a6ac:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800a6b0:	3308      	adds	r3, #8
 800a6b2:	2102      	movs	r1, #2
 800a6b4:	4618      	mov	r0, r3
 800a6b6:	f001 fc73 	bl	800bfa0 <RCCEx_PLL2_Config>
 800a6ba:	4603      	mov	r3, r0
 800a6bc:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SPDIFRX clock source configuration done later after clock selection check */
        break;
 800a6c0:	e00f      	b.n	800a6e2 <HAL_RCCEx_PeriphCLKConfig+0x9a>

      case RCC_SPDIFRXCLKSOURCE_PLL3:  /* PLL3 is used as clock source for SPDIFRX*/
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_R_UPDATE);
 800a6c2:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800a6c6:	3328      	adds	r3, #40	@ 0x28
 800a6c8:	2102      	movs	r1, #2
 800a6ca:	4618      	mov	r0, r3
 800a6cc:	f001 fd1a 	bl	800c104 <RCCEx_PLL3_Config>
 800a6d0:	4603      	mov	r3, r0
 800a6d2:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SPDIFRX clock source configuration done later after clock selection check */
        break;
 800a6d6:	e004      	b.n	800a6e2 <HAL_RCCEx_PeriphCLKConfig+0x9a>
        /* Internal OSC clock is used as source of SPDIFRX clock*/
        /* SPDIFRX clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800a6d8:	2301      	movs	r3, #1
 800a6da:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800a6de:	e000      	b.n	800a6e2 <HAL_RCCEx_PeriphCLKConfig+0x9a>
        break;
 800a6e0:	bf00      	nop
    }

    if (ret == HAL_OK)
 800a6e2:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800a6e6:	2b00      	cmp	r3, #0
 800a6e8:	d10a      	bne.n	800a700 <HAL_RCCEx_PeriphCLKConfig+0xb8>
    {
      /* Set the source of SPDIFRX clock*/
      __HAL_RCC_SPDIFRX_CONFIG(PeriphClkInit->SpdifrxClockSelection);
 800a6ea:	4ba5      	ldr	r3, [pc, #660]	@ (800a980 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800a6ec:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800a6ee:	f423 1140 	bic.w	r1, r3, #3145728	@ 0x300000
 800a6f2:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800a6f6:	6e9b      	ldr	r3, [r3, #104]	@ 0x68
 800a6f8:	4aa1      	ldr	r2, [pc, #644]	@ (800a980 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800a6fa:	430b      	orrs	r3, r1
 800a6fc:	6513      	str	r3, [r2, #80]	@ 0x50
 800a6fe:	e003      	b.n	800a708 <HAL_RCCEx_PeriphCLKConfig+0xc0>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800a700:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800a704:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }

  /*---------------------------- SAI1 configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1)
 800a708:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800a70c:	e9d3 2300 	ldrd	r2, r3, [r3]
 800a710:	f402 7880 	and.w	r8, r2, #256	@ 0x100
 800a714:	f04f 0900 	mov.w	r9, #0
 800a718:	ea58 0309 	orrs.w	r3, r8, r9
 800a71c:	d047      	beq.n	800a7ae <HAL_RCCEx_PeriphCLKConfig+0x166>
  {
    switch (PeriphClkInit->Sai1ClockSelection)
 800a71e:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800a722:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800a724:	2b04      	cmp	r3, #4
 800a726:	d82a      	bhi.n	800a77e <HAL_RCCEx_PeriphCLKConfig+0x136>
 800a728:	a201      	add	r2, pc, #4	@ (adr r2, 800a730 <HAL_RCCEx_PeriphCLKConfig+0xe8>)
 800a72a:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800a72e:	bf00      	nop
 800a730:	0800a745 	.word	0x0800a745
 800a734:	0800a753 	.word	0x0800a753
 800a738:	0800a769 	.word	0x0800a769
 800a73c:	0800a787 	.word	0x0800a787
 800a740:	0800a787 	.word	0x0800a787
    {
      case RCC_SAI1CLKSOURCE_PLL:      /* PLL is used as clock source for SAI1*/
        /* Enable SAI Clock output generated form System PLL . */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
 800a744:	4b8e      	ldr	r3, [pc, #568]	@ (800a980 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800a746:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800a748:	4a8d      	ldr	r2, [pc, #564]	@ (800a980 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800a74a:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800a74e:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* SAI1 clock source configuration done later after clock selection check */
        break;
 800a750:	e01a      	b.n	800a788 <HAL_RCCEx_PeriphCLKConfig+0x140>

      case RCC_SAI1CLKSOURCE_PLL2: /* PLL2 is used as clock source for SAI1*/

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
 800a752:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800a756:	3308      	adds	r3, #8
 800a758:	2100      	movs	r1, #0
 800a75a:	4618      	mov	r0, r3
 800a75c:	f001 fc20 	bl	800bfa0 <RCCEx_PLL2_Config>
 800a760:	4603      	mov	r3, r0
 800a762:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SAI1 clock source configuration done later after clock selection check */
        break;
 800a766:	e00f      	b.n	800a788 <HAL_RCCEx_PeriphCLKConfig+0x140>

      case RCC_SAI1CLKSOURCE_PLL3:  /* PLL3 is used as clock source for SAI1*/
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_P_UPDATE);
 800a768:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800a76c:	3328      	adds	r3, #40	@ 0x28
 800a76e:	2100      	movs	r1, #0
 800a770:	4618      	mov	r0, r3
 800a772:	f001 fcc7 	bl	800c104 <RCCEx_PLL3_Config>
 800a776:	4603      	mov	r3, r0
 800a778:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SAI1 clock source configuration done later after clock selection check */
        break;
 800a77c:	e004      	b.n	800a788 <HAL_RCCEx_PeriphCLKConfig+0x140>
        /* HSI, HSE, or CSI oscillator is used as source of SAI1 clock */
        /* SAI1 clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800a77e:	2301      	movs	r3, #1
 800a780:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800a784:	e000      	b.n	800a788 <HAL_RCCEx_PeriphCLKConfig+0x140>
        break;
 800a786:	bf00      	nop
    }

    if (ret == HAL_OK)
 800a788:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800a78c:	2b00      	cmp	r3, #0
 800a78e:	d10a      	bne.n	800a7a6 <HAL_RCCEx_PeriphCLKConfig+0x15e>
    {
      /* Set the source of SAI1 clock*/
      __HAL_RCC_SAI1_CONFIG(PeriphClkInit->Sai1ClockSelection);
 800a790:	4b7b      	ldr	r3, [pc, #492]	@ (800a980 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800a792:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800a794:	f023 0107 	bic.w	r1, r3, #7
 800a798:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800a79c:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800a79e:	4a78      	ldr	r2, [pc, #480]	@ (800a980 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800a7a0:	430b      	orrs	r3, r1
 800a7a2:	6513      	str	r3, [r2, #80]	@ 0x50
 800a7a4:	e003      	b.n	800a7ae <HAL_RCCEx_PeriphCLKConfig+0x166>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800a7a6:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800a7aa:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }

#if defined(SAI3)
  /*---------------------------- SAI2/3 configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI23) == RCC_PERIPHCLK_SAI23)
 800a7ae:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800a7b2:	e9d3 2300 	ldrd	r2, r3, [r3]
 800a7b6:	f402 7a00 	and.w	sl, r2, #512	@ 0x200
 800a7ba:	f04f 0b00 	mov.w	fp, #0
 800a7be:	ea5a 030b 	orrs.w	r3, sl, fp
 800a7c2:	d04c      	beq.n	800a85e <HAL_RCCEx_PeriphCLKConfig+0x216>
  {
    switch (PeriphClkInit->Sai23ClockSelection)
 800a7c4:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800a7c8:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 800a7ca:	f5b3 7f80 	cmp.w	r3, #256	@ 0x100
 800a7ce:	d030      	beq.n	800a832 <HAL_RCCEx_PeriphCLKConfig+0x1ea>
 800a7d0:	f5b3 7f80 	cmp.w	r3, #256	@ 0x100
 800a7d4:	d829      	bhi.n	800a82a <HAL_RCCEx_PeriphCLKConfig+0x1e2>
 800a7d6:	2bc0      	cmp	r3, #192	@ 0xc0
 800a7d8:	d02d      	beq.n	800a836 <HAL_RCCEx_PeriphCLKConfig+0x1ee>
 800a7da:	2bc0      	cmp	r3, #192	@ 0xc0
 800a7dc:	d825      	bhi.n	800a82a <HAL_RCCEx_PeriphCLKConfig+0x1e2>
 800a7de:	2b80      	cmp	r3, #128	@ 0x80
 800a7e0:	d018      	beq.n	800a814 <HAL_RCCEx_PeriphCLKConfig+0x1cc>
 800a7e2:	2b80      	cmp	r3, #128	@ 0x80
 800a7e4:	d821      	bhi.n	800a82a <HAL_RCCEx_PeriphCLKConfig+0x1e2>
 800a7e6:	2b00      	cmp	r3, #0
 800a7e8:	d002      	beq.n	800a7f0 <HAL_RCCEx_PeriphCLKConfig+0x1a8>
 800a7ea:	2b40      	cmp	r3, #64	@ 0x40
 800a7ec:	d007      	beq.n	800a7fe <HAL_RCCEx_PeriphCLKConfig+0x1b6>
 800a7ee:	e01c      	b.n	800a82a <HAL_RCCEx_PeriphCLKConfig+0x1e2>
    {
      case RCC_SAI23CLKSOURCE_PLL:      /* PLL is used as clock source for SAI2/3 */
        /* Enable SAI Clock output generated form System PLL . */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
 800a7f0:	4b63      	ldr	r3, [pc, #396]	@ (800a980 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800a7f2:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800a7f4:	4a62      	ldr	r2, [pc, #392]	@ (800a980 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800a7f6:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800a7fa:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* SAI2/3 clock source configuration done later after clock selection check */
        break;
 800a7fc:	e01c      	b.n	800a838 <HAL_RCCEx_PeriphCLKConfig+0x1f0>

      case RCC_SAI23CLKSOURCE_PLL2: /* PLL2 is used as clock source for SAI2/3 */

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
 800a7fe:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800a802:	3308      	adds	r3, #8
 800a804:	2100      	movs	r1, #0
 800a806:	4618      	mov	r0, r3
 800a808:	f001 fbca 	bl	800bfa0 <RCCEx_PLL2_Config>
 800a80c:	4603      	mov	r3, r0
 800a80e:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SAI2/3 clock source configuration done later after clock selection check */
        break;
 800a812:	e011      	b.n	800a838 <HAL_RCCEx_PeriphCLKConfig+0x1f0>

      case RCC_SAI23CLKSOURCE_PLL3:  /* PLL3 is used as clock source for SAI2/3 */
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_P_UPDATE);
 800a814:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800a818:	3328      	adds	r3, #40	@ 0x28
 800a81a:	2100      	movs	r1, #0
 800a81c:	4618      	mov	r0, r3
 800a81e:	f001 fc71 	bl	800c104 <RCCEx_PLL3_Config>
 800a822:	4603      	mov	r3, r0
 800a824:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SAI2/3 clock source configuration done later after clock selection check */
        break;
 800a828:	e006      	b.n	800a838 <HAL_RCCEx_PeriphCLKConfig+0x1f0>
        /* HSI, HSE, or CSI oscillator is used as source of SAI2/3 clock */
        /* SAI2/3 clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800a82a:	2301      	movs	r3, #1
 800a82c:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800a830:	e002      	b.n	800a838 <HAL_RCCEx_PeriphCLKConfig+0x1f0>
        break;
 800a832:	bf00      	nop
 800a834:	e000      	b.n	800a838 <HAL_RCCEx_PeriphCLKConfig+0x1f0>
        break;
 800a836:	bf00      	nop
    }

    if (ret == HAL_OK)
 800a838:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800a83c:	2b00      	cmp	r3, #0
 800a83e:	d10a      	bne.n	800a856 <HAL_RCCEx_PeriphCLKConfig+0x20e>
    {
      /* Set the source of SAI2/3 clock*/
      __HAL_RCC_SAI23_CONFIG(PeriphClkInit->Sai23ClockSelection);
 800a840:	4b4f      	ldr	r3, [pc, #316]	@ (800a980 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800a842:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800a844:	f423 71e0 	bic.w	r1, r3, #448	@ 0x1c0
 800a848:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800a84c:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 800a84e:	4a4c      	ldr	r2, [pc, #304]	@ (800a980 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800a850:	430b      	orrs	r3, r1
 800a852:	6513      	str	r3, [r2, #80]	@ 0x50
 800a854:	e003      	b.n	800a85e <HAL_RCCEx_PeriphCLKConfig+0x216>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800a856:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800a85a:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
  }
#endif  /*SAI2B*/

#if defined(SAI4)
  /*---------------------------- SAI4A configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI4A) == RCC_PERIPHCLK_SAI4A)
 800a85e:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800a862:	e9d3 2300 	ldrd	r2, r3, [r3]
 800a866:	f402 6380 	and.w	r3, r2, #1024	@ 0x400
 800a86a:	f8c7 3100 	str.w	r3, [r7, #256]	@ 0x100
 800a86e:	2300      	movs	r3, #0
 800a870:	f8c7 3104 	str.w	r3, [r7, #260]	@ 0x104
 800a874:	e9d7 1240 	ldrd	r1, r2, [r7, #256]	@ 0x100
 800a878:	460b      	mov	r3, r1
 800a87a:	4313      	orrs	r3, r2
 800a87c:	d053      	beq.n	800a926 <HAL_RCCEx_PeriphCLKConfig+0x2de>
  {
    switch (PeriphClkInit->Sai4AClockSelection)
 800a87e:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800a882:	f8d3 30a8 	ldr.w	r3, [r3, #168]	@ 0xa8
 800a886:	f5b3 0f00 	cmp.w	r3, #8388608	@ 0x800000
 800a88a:	d035      	beq.n	800a8f8 <HAL_RCCEx_PeriphCLKConfig+0x2b0>
 800a88c:	f5b3 0f00 	cmp.w	r3, #8388608	@ 0x800000
 800a890:	d82e      	bhi.n	800a8f0 <HAL_RCCEx_PeriphCLKConfig+0x2a8>
 800a892:	f5b3 0fc0 	cmp.w	r3, #6291456	@ 0x600000
 800a896:	d031      	beq.n	800a8fc <HAL_RCCEx_PeriphCLKConfig+0x2b4>
 800a898:	f5b3 0fc0 	cmp.w	r3, #6291456	@ 0x600000
 800a89c:	d828      	bhi.n	800a8f0 <HAL_RCCEx_PeriphCLKConfig+0x2a8>
 800a89e:	f5b3 0f80 	cmp.w	r3, #4194304	@ 0x400000
 800a8a2:	d01a      	beq.n	800a8da <HAL_RCCEx_PeriphCLKConfig+0x292>
 800a8a4:	f5b3 0f80 	cmp.w	r3, #4194304	@ 0x400000
 800a8a8:	d822      	bhi.n	800a8f0 <HAL_RCCEx_PeriphCLKConfig+0x2a8>
 800a8aa:	2b00      	cmp	r3, #0
 800a8ac:	d003      	beq.n	800a8b6 <HAL_RCCEx_PeriphCLKConfig+0x26e>
 800a8ae:	f5b3 1f00 	cmp.w	r3, #2097152	@ 0x200000
 800a8b2:	d007      	beq.n	800a8c4 <HAL_RCCEx_PeriphCLKConfig+0x27c>
 800a8b4:	e01c      	b.n	800a8f0 <HAL_RCCEx_PeriphCLKConfig+0x2a8>
    {
      case RCC_SAI4ACLKSOURCE_PLL:      /* PLL is used as clock source for SAI2*/
        /* Enable SAI Clock output generated form System PLL . */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
 800a8b6:	4b32      	ldr	r3, [pc, #200]	@ (800a980 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800a8b8:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800a8ba:	4a31      	ldr	r2, [pc, #196]	@ (800a980 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800a8bc:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800a8c0:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* SAI1 clock source configuration done later after clock selection check */
        break;
 800a8c2:	e01c      	b.n	800a8fe <HAL_RCCEx_PeriphCLKConfig+0x2b6>

      case RCC_SAI4ACLKSOURCE_PLL2: /* PLL2 is used as clock source for SAI2*/

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
 800a8c4:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800a8c8:	3308      	adds	r3, #8
 800a8ca:	2100      	movs	r1, #0
 800a8cc:	4618      	mov	r0, r3
 800a8ce:	f001 fb67 	bl	800bfa0 <RCCEx_PLL2_Config>
 800a8d2:	4603      	mov	r3, r0
 800a8d4:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SAI2 clock source configuration done later after clock selection check */
        break;
 800a8d8:	e011      	b.n	800a8fe <HAL_RCCEx_PeriphCLKConfig+0x2b6>

      case RCC_SAI4ACLKSOURCE_PLL3:  /* PLL3 is used as clock source for SAI2*/
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_P_UPDATE);
 800a8da:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800a8de:	3328      	adds	r3, #40	@ 0x28
 800a8e0:	2100      	movs	r1, #0
 800a8e2:	4618      	mov	r0, r3
 800a8e4:	f001 fc0e 	bl	800c104 <RCCEx_PLL3_Config>
 800a8e8:	4603      	mov	r3, r0
 800a8ea:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SAI1 clock source configuration done later after clock selection check */
        break;
 800a8ee:	e006      	b.n	800a8fe <HAL_RCCEx_PeriphCLKConfig+0x2b6>
        /* SAI4A clock source configuration done later after clock selection check */
        break;
#endif /* RCC_VER_3_0 */

      default:
        ret = HAL_ERROR;
 800a8f0:	2301      	movs	r3, #1
 800a8f2:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800a8f6:	e002      	b.n	800a8fe <HAL_RCCEx_PeriphCLKConfig+0x2b6>
        break;
 800a8f8:	bf00      	nop
 800a8fa:	e000      	b.n	800a8fe <HAL_RCCEx_PeriphCLKConfig+0x2b6>
        break;
 800a8fc:	bf00      	nop
    }

    if (ret == HAL_OK)
 800a8fe:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800a902:	2b00      	cmp	r3, #0
 800a904:	d10b      	bne.n	800a91e <HAL_RCCEx_PeriphCLKConfig+0x2d6>
    {
      /* Set the source of SAI4A clock*/
      __HAL_RCC_SAI4A_CONFIG(PeriphClkInit->Sai4AClockSelection);
 800a906:	4b1e      	ldr	r3, [pc, #120]	@ (800a980 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800a908:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800a90a:	f423 0160 	bic.w	r1, r3, #14680064	@ 0xe00000
 800a90e:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800a912:	f8d3 30a8 	ldr.w	r3, [r3, #168]	@ 0xa8
 800a916:	4a1a      	ldr	r2, [pc, #104]	@ (800a980 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800a918:	430b      	orrs	r3, r1
 800a91a:	6593      	str	r3, [r2, #88]	@ 0x58
 800a91c:	e003      	b.n	800a926 <HAL_RCCEx_PeriphCLKConfig+0x2de>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800a91e:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800a922:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }
  /*---------------------------- SAI4B configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI4B) == RCC_PERIPHCLK_SAI4B)
 800a926:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800a92a:	e9d3 2300 	ldrd	r2, r3, [r3]
 800a92e:	f402 6300 	and.w	r3, r2, #2048	@ 0x800
 800a932:	f8c7 30f8 	str.w	r3, [r7, #248]	@ 0xf8
 800a936:	2300      	movs	r3, #0
 800a938:	f8c7 30fc 	str.w	r3, [r7, #252]	@ 0xfc
 800a93c:	e9d7 123e 	ldrd	r1, r2, [r7, #248]	@ 0xf8
 800a940:	460b      	mov	r3, r1
 800a942:	4313      	orrs	r3, r2
 800a944:	d056      	beq.n	800a9f4 <HAL_RCCEx_PeriphCLKConfig+0x3ac>
  {
    switch (PeriphClkInit->Sai4BClockSelection)
 800a946:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800a94a:	f8d3 30ac 	ldr.w	r3, [r3, #172]	@ 0xac
 800a94e:	f1b3 6f80 	cmp.w	r3, #67108864	@ 0x4000000
 800a952:	d038      	beq.n	800a9c6 <HAL_RCCEx_PeriphCLKConfig+0x37e>
 800a954:	f1b3 6f80 	cmp.w	r3, #67108864	@ 0x4000000
 800a958:	d831      	bhi.n	800a9be <HAL_RCCEx_PeriphCLKConfig+0x376>
 800a95a:	f1b3 7f40 	cmp.w	r3, #50331648	@ 0x3000000
 800a95e:	d034      	beq.n	800a9ca <HAL_RCCEx_PeriphCLKConfig+0x382>
 800a960:	f1b3 7f40 	cmp.w	r3, #50331648	@ 0x3000000
 800a964:	d82b      	bhi.n	800a9be <HAL_RCCEx_PeriphCLKConfig+0x376>
 800a966:	f1b3 7f00 	cmp.w	r3, #33554432	@ 0x2000000
 800a96a:	d01d      	beq.n	800a9a8 <HAL_RCCEx_PeriphCLKConfig+0x360>
 800a96c:	f1b3 7f00 	cmp.w	r3, #33554432	@ 0x2000000
 800a970:	d825      	bhi.n	800a9be <HAL_RCCEx_PeriphCLKConfig+0x376>
 800a972:	2b00      	cmp	r3, #0
 800a974:	d006      	beq.n	800a984 <HAL_RCCEx_PeriphCLKConfig+0x33c>
 800a976:	f1b3 7f80 	cmp.w	r3, #16777216	@ 0x1000000
 800a97a:	d00a      	beq.n	800a992 <HAL_RCCEx_PeriphCLKConfig+0x34a>
 800a97c:	e01f      	b.n	800a9be <HAL_RCCEx_PeriphCLKConfig+0x376>
 800a97e:	bf00      	nop
 800a980:	58024400 	.word	0x58024400
    {
      case RCC_SAI4BCLKSOURCE_PLL:      /* PLL is used as clock source for SAI2*/
        /* Enable SAI Clock output generated form System PLL . */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
 800a984:	4ba2      	ldr	r3, [pc, #648]	@ (800ac10 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800a986:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800a988:	4aa1      	ldr	r2, [pc, #644]	@ (800ac10 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800a98a:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800a98e:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* SAI1 clock source configuration done later after clock selection check */
        break;
 800a990:	e01c      	b.n	800a9cc <HAL_RCCEx_PeriphCLKConfig+0x384>

      case RCC_SAI4BCLKSOURCE_PLL2: /* PLL2 is used as clock source for SAI2*/

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
 800a992:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800a996:	3308      	adds	r3, #8
 800a998:	2100      	movs	r1, #0
 800a99a:	4618      	mov	r0, r3
 800a99c:	f001 fb00 	bl	800bfa0 <RCCEx_PLL2_Config>
 800a9a0:	4603      	mov	r3, r0
 800a9a2:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SAI2 clock source configuration done later after clock selection check */
        break;
 800a9a6:	e011      	b.n	800a9cc <HAL_RCCEx_PeriphCLKConfig+0x384>

      case RCC_SAI4BCLKSOURCE_PLL3:  /* PLL3 is used as clock source for SAI2*/
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_P_UPDATE);
 800a9a8:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800a9ac:	3328      	adds	r3, #40	@ 0x28
 800a9ae:	2100      	movs	r1, #0
 800a9b0:	4618      	mov	r0, r3
 800a9b2:	f001 fba7 	bl	800c104 <RCCEx_PLL3_Config>
 800a9b6:	4603      	mov	r3, r0
 800a9b8:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SAI1 clock source configuration done later after clock selection check */
        break;
 800a9bc:	e006      	b.n	800a9cc <HAL_RCCEx_PeriphCLKConfig+0x384>
        /* SAI4B clock source configuration done later after clock selection check */
        break;
#endif /* RCC_VER_3_0 */

      default:
        ret = HAL_ERROR;
 800a9be:	2301      	movs	r3, #1
 800a9c0:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800a9c4:	e002      	b.n	800a9cc <HAL_RCCEx_PeriphCLKConfig+0x384>
        break;
 800a9c6:	bf00      	nop
 800a9c8:	e000      	b.n	800a9cc <HAL_RCCEx_PeriphCLKConfig+0x384>
        break;
 800a9ca:	bf00      	nop
    }

    if (ret == HAL_OK)
 800a9cc:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800a9d0:	2b00      	cmp	r3, #0
 800a9d2:	d10b      	bne.n	800a9ec <HAL_RCCEx_PeriphCLKConfig+0x3a4>
    {
      /* Set the source of SAI4B clock*/
      __HAL_RCC_SAI4B_CONFIG(PeriphClkInit->Sai4BClockSelection);
 800a9d4:	4b8e      	ldr	r3, [pc, #568]	@ (800ac10 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800a9d6:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800a9d8:	f023 61e0 	bic.w	r1, r3, #117440512	@ 0x7000000
 800a9dc:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800a9e0:	f8d3 30ac 	ldr.w	r3, [r3, #172]	@ 0xac
 800a9e4:	4a8a      	ldr	r2, [pc, #552]	@ (800ac10 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800a9e6:	430b      	orrs	r3, r1
 800a9e8:	6593      	str	r3, [r2, #88]	@ 0x58
 800a9ea:	e003      	b.n	800a9f4 <HAL_RCCEx_PeriphCLKConfig+0x3ac>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800a9ec:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800a9f0:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
  }
#endif  /*SAI4*/

#if defined(QUADSPI)
  /*---------------------------- QSPI configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_QSPI) == RCC_PERIPHCLK_QSPI)
 800a9f4:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800a9f8:	e9d3 2300 	ldrd	r2, r3, [r3]
 800a9fc:	f002 7300 	and.w	r3, r2, #33554432	@ 0x2000000
 800aa00:	f8c7 30f0 	str.w	r3, [r7, #240]	@ 0xf0
 800aa04:	2300      	movs	r3, #0
 800aa06:	f8c7 30f4 	str.w	r3, [r7, #244]	@ 0xf4
 800aa0a:	e9d7 123c 	ldrd	r1, r2, [r7, #240]	@ 0xf0
 800aa0e:	460b      	mov	r3, r1
 800aa10:	4313      	orrs	r3, r2
 800aa12:	d03a      	beq.n	800aa8a <HAL_RCCEx_PeriphCLKConfig+0x442>
  {
    switch (PeriphClkInit->QspiClockSelection)
 800aa14:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800aa18:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 800aa1a:	2b30      	cmp	r3, #48	@ 0x30
 800aa1c:	d01f      	beq.n	800aa5e <HAL_RCCEx_PeriphCLKConfig+0x416>
 800aa1e:	2b30      	cmp	r3, #48	@ 0x30
 800aa20:	d819      	bhi.n	800aa56 <HAL_RCCEx_PeriphCLKConfig+0x40e>
 800aa22:	2b20      	cmp	r3, #32
 800aa24:	d00c      	beq.n	800aa40 <HAL_RCCEx_PeriphCLKConfig+0x3f8>
 800aa26:	2b20      	cmp	r3, #32
 800aa28:	d815      	bhi.n	800aa56 <HAL_RCCEx_PeriphCLKConfig+0x40e>
 800aa2a:	2b00      	cmp	r3, #0
 800aa2c:	d019      	beq.n	800aa62 <HAL_RCCEx_PeriphCLKConfig+0x41a>
 800aa2e:	2b10      	cmp	r3, #16
 800aa30:	d111      	bne.n	800aa56 <HAL_RCCEx_PeriphCLKConfig+0x40e>
    {
      case RCC_QSPICLKSOURCE_PLL:      /* PLL is used as clock source for QSPI*/
        /* Enable QSPI Clock output generated form System PLL . */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
 800aa32:	4b77      	ldr	r3, [pc, #476]	@ (800ac10 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800aa34:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800aa36:	4a76      	ldr	r2, [pc, #472]	@ (800ac10 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800aa38:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800aa3c:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* QSPI clock source configuration done later after clock selection check */
        break;
 800aa3e:	e011      	b.n	800aa64 <HAL_RCCEx_PeriphCLKConfig+0x41c>

      case RCC_QSPICLKSOURCE_PLL2: /* PLL2 is used as clock source for QSPI*/

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_R_UPDATE);
 800aa40:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800aa44:	3308      	adds	r3, #8
 800aa46:	2102      	movs	r1, #2
 800aa48:	4618      	mov	r0, r3
 800aa4a:	f001 faa9 	bl	800bfa0 <RCCEx_PLL2_Config>
 800aa4e:	4603      	mov	r3, r0
 800aa50:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* QSPI clock source configuration done later after clock selection check */
        break;
 800aa54:	e006      	b.n	800aa64 <HAL_RCCEx_PeriphCLKConfig+0x41c>
      case RCC_QSPICLKSOURCE_D1HCLK:
        /* Domain1 HCLK  clock selected as QSPI kernel peripheral clock */
        break;

      default:
        ret = HAL_ERROR;
 800aa56:	2301      	movs	r3, #1
 800aa58:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800aa5c:	e002      	b.n	800aa64 <HAL_RCCEx_PeriphCLKConfig+0x41c>
        break;
 800aa5e:	bf00      	nop
 800aa60:	e000      	b.n	800aa64 <HAL_RCCEx_PeriphCLKConfig+0x41c>
        break;
 800aa62:	bf00      	nop
    }

    if (ret == HAL_OK)
 800aa64:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800aa68:	2b00      	cmp	r3, #0
 800aa6a:	d10a      	bne.n	800aa82 <HAL_RCCEx_PeriphCLKConfig+0x43a>
    {
      /* Set the source of QSPI clock*/
      __HAL_RCC_QSPI_CONFIG(PeriphClkInit->QspiClockSelection);
 800aa6c:	4b68      	ldr	r3, [pc, #416]	@ (800ac10 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800aa6e:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 800aa70:	f023 0130 	bic.w	r1, r3, #48	@ 0x30
 800aa74:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800aa78:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 800aa7a:	4a65      	ldr	r2, [pc, #404]	@ (800ac10 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800aa7c:	430b      	orrs	r3, r1
 800aa7e:	64d3      	str	r3, [r2, #76]	@ 0x4c
 800aa80:	e003      	b.n	800aa8a <HAL_RCCEx_PeriphCLKConfig+0x442>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800aa82:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800aa86:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }
#endif  /*OCTOSPI*/

  /*---------------------------- SPI1/2/3 configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SPI123) == RCC_PERIPHCLK_SPI123)
 800aa8a:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800aa8e:	e9d3 2300 	ldrd	r2, r3, [r3]
 800aa92:	f402 5380 	and.w	r3, r2, #4096	@ 0x1000
 800aa96:	f8c7 30e8 	str.w	r3, [r7, #232]	@ 0xe8
 800aa9a:	2300      	movs	r3, #0
 800aa9c:	f8c7 30ec 	str.w	r3, [r7, #236]	@ 0xec
 800aaa0:	e9d7 123a 	ldrd	r1, r2, [r7, #232]	@ 0xe8
 800aaa4:	460b      	mov	r3, r1
 800aaa6:	4313      	orrs	r3, r2
 800aaa8:	d051      	beq.n	800ab4e <HAL_RCCEx_PeriphCLKConfig+0x506>
  {
    switch (PeriphClkInit->Spi123ClockSelection)
 800aaaa:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800aaae:	6e1b      	ldr	r3, [r3, #96]	@ 0x60
 800aab0:	f5b3 4f80 	cmp.w	r3, #16384	@ 0x4000
 800aab4:	d035      	beq.n	800ab22 <HAL_RCCEx_PeriphCLKConfig+0x4da>
 800aab6:	f5b3 4f80 	cmp.w	r3, #16384	@ 0x4000
 800aaba:	d82e      	bhi.n	800ab1a <HAL_RCCEx_PeriphCLKConfig+0x4d2>
 800aabc:	f5b3 5f40 	cmp.w	r3, #12288	@ 0x3000
 800aac0:	d031      	beq.n	800ab26 <HAL_RCCEx_PeriphCLKConfig+0x4de>
 800aac2:	f5b3 5f40 	cmp.w	r3, #12288	@ 0x3000
 800aac6:	d828      	bhi.n	800ab1a <HAL_RCCEx_PeriphCLKConfig+0x4d2>
 800aac8:	f5b3 5f00 	cmp.w	r3, #8192	@ 0x2000
 800aacc:	d01a      	beq.n	800ab04 <HAL_RCCEx_PeriphCLKConfig+0x4bc>
 800aace:	f5b3 5f00 	cmp.w	r3, #8192	@ 0x2000
 800aad2:	d822      	bhi.n	800ab1a <HAL_RCCEx_PeriphCLKConfig+0x4d2>
 800aad4:	2b00      	cmp	r3, #0
 800aad6:	d003      	beq.n	800aae0 <HAL_RCCEx_PeriphCLKConfig+0x498>
 800aad8:	f5b3 5f80 	cmp.w	r3, #4096	@ 0x1000
 800aadc:	d007      	beq.n	800aaee <HAL_RCCEx_PeriphCLKConfig+0x4a6>
 800aade:	e01c      	b.n	800ab1a <HAL_RCCEx_PeriphCLKConfig+0x4d2>
    {
      case RCC_SPI123CLKSOURCE_PLL:      /* PLL is used as clock source for SPI1/2/3 */
        /* Enable SPI Clock output generated form System PLL . */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
 800aae0:	4b4b      	ldr	r3, [pc, #300]	@ (800ac10 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800aae2:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800aae4:	4a4a      	ldr	r2, [pc, #296]	@ (800ac10 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800aae6:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800aaea:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* SPI1/2/3 clock source configuration done later after clock selection check */
        break;
 800aaec:	e01c      	b.n	800ab28 <HAL_RCCEx_PeriphCLKConfig+0x4e0>

      case RCC_SPI123CLKSOURCE_PLL2: /* PLL2 is used as clock source for SPI1/2/3 */
        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
 800aaee:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800aaf2:	3308      	adds	r3, #8
 800aaf4:	2100      	movs	r1, #0
 800aaf6:	4618      	mov	r0, r3
 800aaf8:	f001 fa52 	bl	800bfa0 <RCCEx_PLL2_Config>
 800aafc:	4603      	mov	r3, r0
 800aafe:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SPI1/2/3 clock source configuration done later after clock selection check */
        break;
 800ab02:	e011      	b.n	800ab28 <HAL_RCCEx_PeriphCLKConfig+0x4e0>

      case RCC_SPI123CLKSOURCE_PLL3:  /* PLL3 is used as clock source for SPI1/2/3 */
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_P_UPDATE);
 800ab04:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800ab08:	3328      	adds	r3, #40	@ 0x28
 800ab0a:	2100      	movs	r1, #0
 800ab0c:	4618      	mov	r0, r3
 800ab0e:	f001 faf9 	bl	800c104 <RCCEx_PLL3_Config>
 800ab12:	4603      	mov	r3, r0
 800ab14:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SPI1/2/3 clock source configuration done later after clock selection check */
        break;
 800ab18:	e006      	b.n	800ab28 <HAL_RCCEx_PeriphCLKConfig+0x4e0>
        /* HSI, HSE, or CSI oscillator is used as source of SPI1/2/3 clock */
        /* SPI1/2/3 clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800ab1a:	2301      	movs	r3, #1
 800ab1c:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800ab20:	e002      	b.n	800ab28 <HAL_RCCEx_PeriphCLKConfig+0x4e0>
        break;
 800ab22:	bf00      	nop
 800ab24:	e000      	b.n	800ab28 <HAL_RCCEx_PeriphCLKConfig+0x4e0>
        break;
 800ab26:	bf00      	nop
    }

    if (ret == HAL_OK)
 800ab28:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800ab2c:	2b00      	cmp	r3, #0
 800ab2e:	d10a      	bne.n	800ab46 <HAL_RCCEx_PeriphCLKConfig+0x4fe>
    {
      /* Set the source of SPI1/2/3 clock*/
      __HAL_RCC_SPI123_CONFIG(PeriphClkInit->Spi123ClockSelection);
 800ab30:	4b37      	ldr	r3, [pc, #220]	@ (800ac10 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800ab32:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800ab34:	f423 41e0 	bic.w	r1, r3, #28672	@ 0x7000
 800ab38:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800ab3c:	6e1b      	ldr	r3, [r3, #96]	@ 0x60
 800ab3e:	4a34      	ldr	r2, [pc, #208]	@ (800ac10 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800ab40:	430b      	orrs	r3, r1
 800ab42:	6513      	str	r3, [r2, #80]	@ 0x50
 800ab44:	e003      	b.n	800ab4e <HAL_RCCEx_PeriphCLKConfig+0x506>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800ab46:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800ab4a:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }

  /*---------------------------- SPI4/5 configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SPI45) == RCC_PERIPHCLK_SPI45)
 800ab4e:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800ab52:	e9d3 2300 	ldrd	r2, r3, [r3]
 800ab56:	f402 5300 	and.w	r3, r2, #8192	@ 0x2000
 800ab5a:	f8c7 30e0 	str.w	r3, [r7, #224]	@ 0xe0
 800ab5e:	2300      	movs	r3, #0
 800ab60:	f8c7 30e4 	str.w	r3, [r7, #228]	@ 0xe4
 800ab64:	e9d7 1238 	ldrd	r1, r2, [r7, #224]	@ 0xe0
 800ab68:	460b      	mov	r3, r1
 800ab6a:	4313      	orrs	r3, r2
 800ab6c:	d056      	beq.n	800ac1c <HAL_RCCEx_PeriphCLKConfig+0x5d4>
  {
    switch (PeriphClkInit->Spi45ClockSelection)
 800ab6e:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800ab72:	6e5b      	ldr	r3, [r3, #100]	@ 0x64
 800ab74:	f5b3 2fa0 	cmp.w	r3, #327680	@ 0x50000
 800ab78:	d033      	beq.n	800abe2 <HAL_RCCEx_PeriphCLKConfig+0x59a>
 800ab7a:	f5b3 2fa0 	cmp.w	r3, #327680	@ 0x50000
 800ab7e:	d82c      	bhi.n	800abda <HAL_RCCEx_PeriphCLKConfig+0x592>
 800ab80:	f5b3 2f80 	cmp.w	r3, #262144	@ 0x40000
 800ab84:	d02f      	beq.n	800abe6 <HAL_RCCEx_PeriphCLKConfig+0x59e>
 800ab86:	f5b3 2f80 	cmp.w	r3, #262144	@ 0x40000
 800ab8a:	d826      	bhi.n	800abda <HAL_RCCEx_PeriphCLKConfig+0x592>
 800ab8c:	f5b3 3f40 	cmp.w	r3, #196608	@ 0x30000
 800ab90:	d02b      	beq.n	800abea <HAL_RCCEx_PeriphCLKConfig+0x5a2>
 800ab92:	f5b3 3f40 	cmp.w	r3, #196608	@ 0x30000
 800ab96:	d820      	bhi.n	800abda <HAL_RCCEx_PeriphCLKConfig+0x592>
 800ab98:	f5b3 3f00 	cmp.w	r3, #131072	@ 0x20000
 800ab9c:	d012      	beq.n	800abc4 <HAL_RCCEx_PeriphCLKConfig+0x57c>
 800ab9e:	f5b3 3f00 	cmp.w	r3, #131072	@ 0x20000
 800aba2:	d81a      	bhi.n	800abda <HAL_RCCEx_PeriphCLKConfig+0x592>
 800aba4:	2b00      	cmp	r3, #0
 800aba6:	d022      	beq.n	800abee <HAL_RCCEx_PeriphCLKConfig+0x5a6>
 800aba8:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 800abac:	d115      	bne.n	800abda <HAL_RCCEx_PeriphCLKConfig+0x592>
        /* SPI4/5 clock source configuration done later after clock selection check */
        break;

      case RCC_SPI45CLKSOURCE_PLL2: /* PLL2 is used as clock source for SPI4/5 */

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_Q_UPDATE);
 800abae:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800abb2:	3308      	adds	r3, #8
 800abb4:	2101      	movs	r1, #1
 800abb6:	4618      	mov	r0, r3
 800abb8:	f001 f9f2 	bl	800bfa0 <RCCEx_PLL2_Config>
 800abbc:	4603      	mov	r3, r0
 800abbe:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SPI4/5 clock source configuration done later after clock selection check */
        break;
 800abc2:	e015      	b.n	800abf0 <HAL_RCCEx_PeriphCLKConfig+0x5a8>
      case RCC_SPI45CLKSOURCE_PLL3:  /* PLL3 is used as clock source for SPI4/5 */
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_Q_UPDATE);
 800abc4:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800abc8:	3328      	adds	r3, #40	@ 0x28
 800abca:	2101      	movs	r1, #1
 800abcc:	4618      	mov	r0, r3
 800abce:	f001 fa99 	bl	800c104 <RCCEx_PLL3_Config>
 800abd2:	4603      	mov	r3, r0
 800abd4:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        /* SPI4/5 clock source configuration done later after clock selection check */
        break;
 800abd8:	e00a      	b.n	800abf0 <HAL_RCCEx_PeriphCLKConfig+0x5a8>
        /* HSE,  oscillator is used as source of SPI4/5 clock */
        /* SPI4/5 clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800abda:	2301      	movs	r3, #1
 800abdc:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800abe0:	e006      	b.n	800abf0 <HAL_RCCEx_PeriphCLKConfig+0x5a8>
        break;
 800abe2:	bf00      	nop
 800abe4:	e004      	b.n	800abf0 <HAL_RCCEx_PeriphCLKConfig+0x5a8>
        break;
 800abe6:	bf00      	nop
 800abe8:	e002      	b.n	800abf0 <HAL_RCCEx_PeriphCLKConfig+0x5a8>
        break;
 800abea:	bf00      	nop
 800abec:	e000      	b.n	800abf0 <HAL_RCCEx_PeriphCLKConfig+0x5a8>
        break;
 800abee:	bf00      	nop
    }

    if (ret == HAL_OK)
 800abf0:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800abf4:	2b00      	cmp	r3, #0
 800abf6:	d10d      	bne.n	800ac14 <HAL_RCCEx_PeriphCLKConfig+0x5cc>
    {
      /* Set the source of SPI4/5 clock*/
      __HAL_RCC_SPI45_CONFIG(PeriphClkInit->Spi45ClockSelection);
 800abf8:	4b05      	ldr	r3, [pc, #20]	@ (800ac10 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800abfa:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800abfc:	f423 21e0 	bic.w	r1, r3, #458752	@ 0x70000
 800ac00:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800ac04:	6e5b      	ldr	r3, [r3, #100]	@ 0x64
 800ac06:	4a02      	ldr	r2, [pc, #8]	@ (800ac10 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800ac08:	430b      	orrs	r3, r1
 800ac0a:	6513      	str	r3, [r2, #80]	@ 0x50
 800ac0c:	e006      	b.n	800ac1c <HAL_RCCEx_PeriphCLKConfig+0x5d4>
 800ac0e:	bf00      	nop
 800ac10:	58024400 	.word	0x58024400
    }
    else
    {
      /* set overall return value */
      status = ret;
 800ac14:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800ac18:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }

  /*---------------------------- SPI6 configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SPI6) == RCC_PERIPHCLK_SPI6)
 800ac1c:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800ac20:	e9d3 2300 	ldrd	r2, r3, [r3]
 800ac24:	f402 4380 	and.w	r3, r2, #16384	@ 0x4000
 800ac28:	f8c7 30d8 	str.w	r3, [r7, #216]	@ 0xd8
 800ac2c:	2300      	movs	r3, #0
 800ac2e:	f8c7 30dc 	str.w	r3, [r7, #220]	@ 0xdc
 800ac32:	e9d7 1236 	ldrd	r1, r2, [r7, #216]	@ 0xd8
 800ac36:	460b      	mov	r3, r1
 800ac38:	4313      	orrs	r3, r2
 800ac3a:	d055      	beq.n	800ace8 <HAL_RCCEx_PeriphCLKConfig+0x6a0>
  {
    switch (PeriphClkInit->Spi6ClockSelection)
 800ac3c:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800ac40:	f8d3 30b0 	ldr.w	r3, [r3, #176]	@ 0xb0
 800ac44:	f1b3 4fa0 	cmp.w	r3, #1342177280	@ 0x50000000
 800ac48:	d033      	beq.n	800acb2 <HAL_RCCEx_PeriphCLKConfig+0x66a>
 800ac4a:	f1b3 4fa0 	cmp.w	r3, #1342177280	@ 0x50000000
 800ac4e:	d82c      	bhi.n	800acaa <HAL_RCCEx_PeriphCLKConfig+0x662>
 800ac50:	f1b3 4f80 	cmp.w	r3, #1073741824	@ 0x40000000
 800ac54:	d02f      	beq.n	800acb6 <HAL_RCCEx_PeriphCLKConfig+0x66e>
 800ac56:	f1b3 4f80 	cmp.w	r3, #1073741824	@ 0x40000000
 800ac5a:	d826      	bhi.n	800acaa <HAL_RCCEx_PeriphCLKConfig+0x662>
 800ac5c:	f1b3 5f40 	cmp.w	r3, #805306368	@ 0x30000000
 800ac60:	d02b      	beq.n	800acba <HAL_RCCEx_PeriphCLKConfig+0x672>
 800ac62:	f1b3 5f40 	cmp.w	r3, #805306368	@ 0x30000000
 800ac66:	d820      	bhi.n	800acaa <HAL_RCCEx_PeriphCLKConfig+0x662>
 800ac68:	f1b3 5f00 	cmp.w	r3, #536870912	@ 0x20000000
 800ac6c:	d012      	beq.n	800ac94 <HAL_RCCEx_PeriphCLKConfig+0x64c>
 800ac6e:	f1b3 5f00 	cmp.w	r3, #536870912	@ 0x20000000
 800ac72:	d81a      	bhi.n	800acaa <HAL_RCCEx_PeriphCLKConfig+0x662>
 800ac74:	2b00      	cmp	r3, #0
 800ac76:	d022      	beq.n	800acbe <HAL_RCCEx_PeriphCLKConfig+0x676>
 800ac78:	f1b3 5f80 	cmp.w	r3, #268435456	@ 0x10000000
 800ac7c:	d115      	bne.n	800acaa <HAL_RCCEx_PeriphCLKConfig+0x662>
        /* SPI6 clock source configuration done later after clock selection check */
        break;

      case RCC_SPI6CLKSOURCE_PLL2: /* PLL2 is used as clock source for SPI6*/

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_Q_UPDATE);
 800ac7e:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800ac82:	3308      	adds	r3, #8
 800ac84:	2101      	movs	r1, #1
 800ac86:	4618      	mov	r0, r3
 800ac88:	f001 f98a 	bl	800bfa0 <RCCEx_PLL2_Config>
 800ac8c:	4603      	mov	r3, r0
 800ac8e:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SPI6 clock source configuration done later after clock selection check */
        break;
 800ac92:	e015      	b.n	800acc0 <HAL_RCCEx_PeriphCLKConfig+0x678>
      case RCC_SPI6CLKSOURCE_PLL3:  /* PLL3 is used as clock source for SPI6*/
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_Q_UPDATE);
 800ac94:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800ac98:	3328      	adds	r3, #40	@ 0x28
 800ac9a:	2101      	movs	r1, #1
 800ac9c:	4618      	mov	r0, r3
 800ac9e:	f001 fa31 	bl	800c104 <RCCEx_PLL3_Config>
 800aca2:	4603      	mov	r3, r0
 800aca4:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        /* SPI6 clock source configuration done later after clock selection check */
        break;
 800aca8:	e00a      	b.n	800acc0 <HAL_RCCEx_PeriphCLKConfig+0x678>
        /* SPI6 clock source configuration done later after clock selection check */
        break;
#endif

      default:
        ret = HAL_ERROR;
 800acaa:	2301      	movs	r3, #1
 800acac:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800acb0:	e006      	b.n	800acc0 <HAL_RCCEx_PeriphCLKConfig+0x678>
        break;
 800acb2:	bf00      	nop
 800acb4:	e004      	b.n	800acc0 <HAL_RCCEx_PeriphCLKConfig+0x678>
        break;
 800acb6:	bf00      	nop
 800acb8:	e002      	b.n	800acc0 <HAL_RCCEx_PeriphCLKConfig+0x678>
        break;
 800acba:	bf00      	nop
 800acbc:	e000      	b.n	800acc0 <HAL_RCCEx_PeriphCLKConfig+0x678>
        break;
 800acbe:	bf00      	nop
    }

    if (ret == HAL_OK)
 800acc0:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800acc4:	2b00      	cmp	r3, #0
 800acc6:	d10b      	bne.n	800ace0 <HAL_RCCEx_PeriphCLKConfig+0x698>
    {
      /* Set the source of SPI6 clock*/
      __HAL_RCC_SPI6_CONFIG(PeriphClkInit->Spi6ClockSelection);
 800acc8:	4ba3      	ldr	r3, [pc, #652]	@ (800af58 <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800acca:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800accc:	f023 41e0 	bic.w	r1, r3, #1879048192	@ 0x70000000
 800acd0:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800acd4:	f8d3 30b0 	ldr.w	r3, [r3, #176]	@ 0xb0
 800acd8:	4a9f      	ldr	r2, [pc, #636]	@ (800af58 <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800acda:	430b      	orrs	r3, r1
 800acdc:	6593      	str	r3, [r2, #88]	@ 0x58
 800acde:	e003      	b.n	800ace8 <HAL_RCCEx_PeriphCLKConfig+0x6a0>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800ace0:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800ace4:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
  }
#endif /*DSI*/

#if defined(FDCAN1) || defined(FDCAN2)
  /*---------------------------- FDCAN configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_FDCAN) == RCC_PERIPHCLK_FDCAN)
 800ace8:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800acec:	e9d3 2300 	ldrd	r2, r3, [r3]
 800acf0:	f402 4300 	and.w	r3, r2, #32768	@ 0x8000
 800acf4:	f8c7 30d0 	str.w	r3, [r7, #208]	@ 0xd0
 800acf8:	2300      	movs	r3, #0
 800acfa:	f8c7 30d4 	str.w	r3, [r7, #212]	@ 0xd4
 800acfe:	e9d7 1234 	ldrd	r1, r2, [r7, #208]	@ 0xd0
 800ad02:	460b      	mov	r3, r1
 800ad04:	4313      	orrs	r3, r2
 800ad06:	d037      	beq.n	800ad78 <HAL_RCCEx_PeriphCLKConfig+0x730>
  {
    switch (PeriphClkInit->FdcanClockSelection)
 800ad08:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800ad0c:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800ad0e:	f1b3 5f00 	cmp.w	r3, #536870912	@ 0x20000000
 800ad12:	d00e      	beq.n	800ad32 <HAL_RCCEx_PeriphCLKConfig+0x6ea>
 800ad14:	f1b3 5f00 	cmp.w	r3, #536870912	@ 0x20000000
 800ad18:	d816      	bhi.n	800ad48 <HAL_RCCEx_PeriphCLKConfig+0x700>
 800ad1a:	2b00      	cmp	r3, #0
 800ad1c:	d018      	beq.n	800ad50 <HAL_RCCEx_PeriphCLKConfig+0x708>
 800ad1e:	f1b3 5f80 	cmp.w	r3, #268435456	@ 0x10000000
 800ad22:	d111      	bne.n	800ad48 <HAL_RCCEx_PeriphCLKConfig+0x700>
    {
      case RCC_FDCANCLKSOURCE_PLL:      /* PLL is used as clock source for FDCAN*/
        /* Enable FDCAN Clock output generated form System PLL . */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
 800ad24:	4b8c      	ldr	r3, [pc, #560]	@ (800af58 <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800ad26:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800ad28:	4a8b      	ldr	r2, [pc, #556]	@ (800af58 <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800ad2a:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800ad2e:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* FDCAN clock source configuration done later after clock selection check */
        break;
 800ad30:	e00f      	b.n	800ad52 <HAL_RCCEx_PeriphCLKConfig+0x70a>

      case RCC_FDCANCLKSOURCE_PLL2: /* PLL2 is used as clock source for FDCAN*/

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_Q_UPDATE);
 800ad32:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800ad36:	3308      	adds	r3, #8
 800ad38:	2101      	movs	r1, #1
 800ad3a:	4618      	mov	r0, r3
 800ad3c:	f001 f930 	bl	800bfa0 <RCCEx_PLL2_Config>
 800ad40:	4603      	mov	r3, r0
 800ad42:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* FDCAN clock source configuration done later after clock selection check */
        break;
 800ad46:	e004      	b.n	800ad52 <HAL_RCCEx_PeriphCLKConfig+0x70a>
        /* HSE is used as clock source for FDCAN*/
        /* FDCAN clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800ad48:	2301      	movs	r3, #1
 800ad4a:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800ad4e:	e000      	b.n	800ad52 <HAL_RCCEx_PeriphCLKConfig+0x70a>
        break;
 800ad50:	bf00      	nop
    }

    if (ret == HAL_OK)
 800ad52:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800ad56:	2b00      	cmp	r3, #0
 800ad58:	d10a      	bne.n	800ad70 <HAL_RCCEx_PeriphCLKConfig+0x728>
    {
      /* Set the source of FDCAN clock*/
      __HAL_RCC_FDCAN_CONFIG(PeriphClkInit->FdcanClockSelection);
 800ad5a:	4b7f      	ldr	r3, [pc, #508]	@ (800af58 <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800ad5c:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800ad5e:	f023 5140 	bic.w	r1, r3, #805306368	@ 0x30000000
 800ad62:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800ad66:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800ad68:	4a7b      	ldr	r2, [pc, #492]	@ (800af58 <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800ad6a:	430b      	orrs	r3, r1
 800ad6c:	6513      	str	r3, [r2, #80]	@ 0x50
 800ad6e:	e003      	b.n	800ad78 <HAL_RCCEx_PeriphCLKConfig+0x730>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800ad70:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800ad74:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }
#endif /*FDCAN1 || FDCAN2*/

  /*---------------------------- FMC configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_FMC) == RCC_PERIPHCLK_FMC)
 800ad78:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800ad7c:	e9d3 2300 	ldrd	r2, r3, [r3]
 800ad80:	f002 7380 	and.w	r3, r2, #16777216	@ 0x1000000
 800ad84:	f8c7 30c8 	str.w	r3, [r7, #200]	@ 0xc8
 800ad88:	2300      	movs	r3, #0
 800ad8a:	f8c7 30cc 	str.w	r3, [r7, #204]	@ 0xcc
 800ad8e:	e9d7 1232 	ldrd	r1, r2, [r7, #200]	@ 0xc8
 800ad92:	460b      	mov	r3, r1
 800ad94:	4313      	orrs	r3, r2
 800ad96:	d039      	beq.n	800ae0c <HAL_RCCEx_PeriphCLKConfig+0x7c4>
  {
    switch (PeriphClkInit->FmcClockSelection)
 800ad98:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800ad9c:	6c9b      	ldr	r3, [r3, #72]	@ 0x48
 800ad9e:	2b03      	cmp	r3, #3
 800ada0:	d81c      	bhi.n	800addc <HAL_RCCEx_PeriphCLKConfig+0x794>
 800ada2:	a201      	add	r2, pc, #4	@ (adr r2, 800ada8 <HAL_RCCEx_PeriphCLKConfig+0x760>)
 800ada4:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800ada8:	0800ade5 	.word	0x0800ade5
 800adac:	0800adb9 	.word	0x0800adb9
 800adb0:	0800adc7 	.word	0x0800adc7
 800adb4:	0800ade5 	.word	0x0800ade5
    {
      case RCC_FMCCLKSOURCE_PLL:      /* PLL is used as clock source for FMC*/
        /* Enable FMC Clock output generated form System PLL . */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
 800adb8:	4b67      	ldr	r3, [pc, #412]	@ (800af58 <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800adba:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800adbc:	4a66      	ldr	r2, [pc, #408]	@ (800af58 <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800adbe:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800adc2:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* FMC clock source configuration done later after clock selection check */
        break;
 800adc4:	e00f      	b.n	800ade6 <HAL_RCCEx_PeriphCLKConfig+0x79e>

      case RCC_FMCCLKSOURCE_PLL2: /* PLL2 is used as clock source for FMC*/

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_R_UPDATE);
 800adc6:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800adca:	3308      	adds	r3, #8
 800adcc:	2102      	movs	r1, #2
 800adce:	4618      	mov	r0, r3
 800add0:	f001 f8e6 	bl	800bfa0 <RCCEx_PLL2_Config>
 800add4:	4603      	mov	r3, r0
 800add6:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* FMC clock source configuration done later after clock selection check */
        break;
 800adda:	e004      	b.n	800ade6 <HAL_RCCEx_PeriphCLKConfig+0x79e>
      case RCC_FMCCLKSOURCE_HCLK:
        /* D1/CD HCLK  clock selected as FMC kernel peripheral clock */
        break;

      default:
        ret = HAL_ERROR;
 800addc:	2301      	movs	r3, #1
 800adde:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800ade2:	e000      	b.n	800ade6 <HAL_RCCEx_PeriphCLKConfig+0x79e>
        break;
 800ade4:	bf00      	nop
    }

    if (ret == HAL_OK)
 800ade6:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800adea:	2b00      	cmp	r3, #0
 800adec:	d10a      	bne.n	800ae04 <HAL_RCCEx_PeriphCLKConfig+0x7bc>
    {
      /* Set the source of FMC clock*/
      __HAL_RCC_FMC_CONFIG(PeriphClkInit->FmcClockSelection);
 800adee:	4b5a      	ldr	r3, [pc, #360]	@ (800af58 <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800adf0:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 800adf2:	f023 0103 	bic.w	r1, r3, #3
 800adf6:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800adfa:	6c9b      	ldr	r3, [r3, #72]	@ 0x48
 800adfc:	4a56      	ldr	r2, [pc, #344]	@ (800af58 <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800adfe:	430b      	orrs	r3, r1
 800ae00:	64d3      	str	r3, [r2, #76]	@ 0x4c
 800ae02:	e003      	b.n	800ae0c <HAL_RCCEx_PeriphCLKConfig+0x7c4>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800ae04:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800ae08:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }

  /*---------------------------- RTC configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC)
 800ae0c:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800ae10:	e9d3 2300 	ldrd	r2, r3, [r3]
 800ae14:	f402 0380 	and.w	r3, r2, #4194304	@ 0x400000
 800ae18:	f8c7 30c0 	str.w	r3, [r7, #192]	@ 0xc0
 800ae1c:	2300      	movs	r3, #0
 800ae1e:	f8c7 30c4 	str.w	r3, [r7, #196]	@ 0xc4
 800ae22:	e9d7 1230 	ldrd	r1, r2, [r7, #192]	@ 0xc0
 800ae26:	460b      	mov	r3, r1
 800ae28:	4313      	orrs	r3, r2
 800ae2a:	f000 809f 	beq.w	800af6c <HAL_RCCEx_PeriphCLKConfig+0x924>
  {
    /* check for RTC Parameters used to output RTCCLK */
    assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection));

    /* Enable write access to Backup domain */
    SET_BIT(PWR->CR1, PWR_CR1_DBP);
 800ae2e:	4b4b      	ldr	r3, [pc, #300]	@ (800af5c <HAL_RCCEx_PeriphCLKConfig+0x914>)
 800ae30:	681b      	ldr	r3, [r3, #0]
 800ae32:	4a4a      	ldr	r2, [pc, #296]	@ (800af5c <HAL_RCCEx_PeriphCLKConfig+0x914>)
 800ae34:	f443 7380 	orr.w	r3, r3, #256	@ 0x100
 800ae38:	6013      	str	r3, [r2, #0]

    /* Wait for Backup domain Write protection disable */
    tickstart = HAL_GetTick();
 800ae3a:	f7f9 fea9 	bl	8004b90 <HAL_GetTick>
 800ae3e:	f8c7 0118 	str.w	r0, [r7, #280]	@ 0x118

    while ((PWR->CR1 & PWR_CR1_DBP) == 0U)
 800ae42:	e00b      	b.n	800ae5c <HAL_RCCEx_PeriphCLKConfig+0x814>
    {
      if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
 800ae44:	f7f9 fea4 	bl	8004b90 <HAL_GetTick>
 800ae48:	4602      	mov	r2, r0
 800ae4a:	f8d7 3118 	ldr.w	r3, [r7, #280]	@ 0x118
 800ae4e:	1ad3      	subs	r3, r2, r3
 800ae50:	2b64      	cmp	r3, #100	@ 0x64
 800ae52:	d903      	bls.n	800ae5c <HAL_RCCEx_PeriphCLKConfig+0x814>
      {
        ret = HAL_TIMEOUT;
 800ae54:	2303      	movs	r3, #3
 800ae56:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800ae5a:	e005      	b.n	800ae68 <HAL_RCCEx_PeriphCLKConfig+0x820>
    while ((PWR->CR1 & PWR_CR1_DBP) == 0U)
 800ae5c:	4b3f      	ldr	r3, [pc, #252]	@ (800af5c <HAL_RCCEx_PeriphCLKConfig+0x914>)
 800ae5e:	681b      	ldr	r3, [r3, #0]
 800ae60:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 800ae64:	2b00      	cmp	r3, #0
 800ae66:	d0ed      	beq.n	800ae44 <HAL_RCCEx_PeriphCLKConfig+0x7fc>
      }
    }

    if (ret == HAL_OK)
 800ae68:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800ae6c:	2b00      	cmp	r3, #0
 800ae6e:	d179      	bne.n	800af64 <HAL_RCCEx_PeriphCLKConfig+0x91c>
    {
      /* Reset the Backup domain only if the RTC Clock source selection is modified */
      if ((RCC->BDCR & RCC_BDCR_RTCSEL) != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL))
 800ae70:	4b39      	ldr	r3, [pc, #228]	@ (800af58 <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800ae72:	6f1a      	ldr	r2, [r3, #112]	@ 0x70
 800ae74:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800ae78:	f8d3 30b4 	ldr.w	r3, [r3, #180]	@ 0xb4
 800ae7c:	4053      	eors	r3, r2
 800ae7e:	f403 7340 	and.w	r3, r3, #768	@ 0x300
 800ae82:	2b00      	cmp	r3, #0
 800ae84:	d015      	beq.n	800aeb2 <HAL_RCCEx_PeriphCLKConfig+0x86a>
      {
        /* Store the content of BDCR register before the reset of Backup Domain */
        tmpreg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL));
 800ae86:	4b34      	ldr	r3, [pc, #208]	@ (800af58 <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800ae88:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800ae8a:	f423 7340 	bic.w	r3, r3, #768	@ 0x300
 800ae8e:	f8c7 3114 	str.w	r3, [r7, #276]	@ 0x114
        /* RTC Clock selection can be changed only if the Backup Domain is reset */
        __HAL_RCC_BACKUPRESET_FORCE();
 800ae92:	4b31      	ldr	r3, [pc, #196]	@ (800af58 <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800ae94:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800ae96:	4a30      	ldr	r2, [pc, #192]	@ (800af58 <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800ae98:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
 800ae9c:	6713      	str	r3, [r2, #112]	@ 0x70
        __HAL_RCC_BACKUPRESET_RELEASE();
 800ae9e:	4b2e      	ldr	r3, [pc, #184]	@ (800af58 <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800aea0:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800aea2:	4a2d      	ldr	r2, [pc, #180]	@ (800af58 <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800aea4:	f423 3380 	bic.w	r3, r3, #65536	@ 0x10000
 800aea8:	6713      	str	r3, [r2, #112]	@ 0x70
        /* Restore the Content of BDCR register */
        RCC->BDCR = tmpreg;
 800aeaa:	4a2b      	ldr	r2, [pc, #172]	@ (800af58 <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800aeac:	f8d7 3114 	ldr.w	r3, [r7, #276]	@ 0x114
 800aeb0:	6713      	str	r3, [r2, #112]	@ 0x70
      }

      /* If LSE is selected as RTC clock source (and enabled prior to Backup Domain reset), wait for LSE reactivation */
      if (PeriphClkInit->RTCClockSelection == RCC_RTCCLKSOURCE_LSE)
 800aeb2:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800aeb6:	f8d3 30b4 	ldr.w	r3, [r3, #180]	@ 0xb4
 800aeba:	f5b3 7f80 	cmp.w	r3, #256	@ 0x100
 800aebe:	d118      	bne.n	800aef2 <HAL_RCCEx_PeriphCLKConfig+0x8aa>
      {
        /* Get Start Tick*/
        tickstart = HAL_GetTick();
 800aec0:	f7f9 fe66 	bl	8004b90 <HAL_GetTick>
 800aec4:	f8c7 0118 	str.w	r0, [r7, #280]	@ 0x118

        /* Wait till LSE is ready */
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == 0U)
 800aec8:	e00d      	b.n	800aee6 <HAL_RCCEx_PeriphCLKConfig+0x89e>
        {
          if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
 800aeca:	f7f9 fe61 	bl	8004b90 <HAL_GetTick>
 800aece:	4602      	mov	r2, r0
 800aed0:	f8d7 3118 	ldr.w	r3, [r7, #280]	@ 0x118
 800aed4:	1ad2      	subs	r2, r2, r3
 800aed6:	f241 3388 	movw	r3, #5000	@ 0x1388
 800aeda:	429a      	cmp	r2, r3
 800aedc:	d903      	bls.n	800aee6 <HAL_RCCEx_PeriphCLKConfig+0x89e>
          {
            ret = HAL_TIMEOUT;
 800aede:	2303      	movs	r3, #3
 800aee0:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
            break;
 800aee4:	e005      	b.n	800aef2 <HAL_RCCEx_PeriphCLKConfig+0x8aa>
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == 0U)
 800aee6:	4b1c      	ldr	r3, [pc, #112]	@ (800af58 <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800aee8:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800aeea:	f003 0302 	and.w	r3, r3, #2
 800aeee:	2b00      	cmp	r3, #0
 800aef0:	d0eb      	beq.n	800aeca <HAL_RCCEx_PeriphCLKConfig+0x882>
          }
        }
      }

      if (ret == HAL_OK)
 800aef2:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800aef6:	2b00      	cmp	r3, #0
 800aef8:	d129      	bne.n	800af4e <HAL_RCCEx_PeriphCLKConfig+0x906>
      {
        __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection);
 800aefa:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800aefe:	f8d3 30b4 	ldr.w	r3, [r3, #180]	@ 0xb4
 800af02:	f403 7340 	and.w	r3, r3, #768	@ 0x300
 800af06:	f5b3 7f40 	cmp.w	r3, #768	@ 0x300
 800af0a:	d10e      	bne.n	800af2a <HAL_RCCEx_PeriphCLKConfig+0x8e2>
 800af0c:	4b12      	ldr	r3, [pc, #72]	@ (800af58 <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800af0e:	691b      	ldr	r3, [r3, #16]
 800af10:	f423 517c 	bic.w	r1, r3, #16128	@ 0x3f00
 800af14:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800af18:	f8d3 30b4 	ldr.w	r3, [r3, #180]	@ 0xb4
 800af1c:	091a      	lsrs	r2, r3, #4
 800af1e:	4b10      	ldr	r3, [pc, #64]	@ (800af60 <HAL_RCCEx_PeriphCLKConfig+0x918>)
 800af20:	4013      	ands	r3, r2
 800af22:	4a0d      	ldr	r2, [pc, #52]	@ (800af58 <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800af24:	430b      	orrs	r3, r1
 800af26:	6113      	str	r3, [r2, #16]
 800af28:	e005      	b.n	800af36 <HAL_RCCEx_PeriphCLKConfig+0x8ee>
 800af2a:	4b0b      	ldr	r3, [pc, #44]	@ (800af58 <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800af2c:	691b      	ldr	r3, [r3, #16]
 800af2e:	4a0a      	ldr	r2, [pc, #40]	@ (800af58 <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800af30:	f423 537c 	bic.w	r3, r3, #16128	@ 0x3f00
 800af34:	6113      	str	r3, [r2, #16]
 800af36:	4b08      	ldr	r3, [pc, #32]	@ (800af58 <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800af38:	6f19      	ldr	r1, [r3, #112]	@ 0x70
 800af3a:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800af3e:	f8d3 30b4 	ldr.w	r3, [r3, #180]	@ 0xb4
 800af42:	f3c3 030b 	ubfx	r3, r3, #0, #12
 800af46:	4a04      	ldr	r2, [pc, #16]	@ (800af58 <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800af48:	430b      	orrs	r3, r1
 800af4a:	6713      	str	r3, [r2, #112]	@ 0x70
 800af4c:	e00e      	b.n	800af6c <HAL_RCCEx_PeriphCLKConfig+0x924>
      }
      else
      {
        /* set overall return value */
        status = ret;
 800af4e:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800af52:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
 800af56:	e009      	b.n	800af6c <HAL_RCCEx_PeriphCLKConfig+0x924>
 800af58:	58024400 	.word	0x58024400
 800af5c:	58024800 	.word	0x58024800
 800af60:	00ffffcf 	.word	0x00ffffcf
      }
    }
    else
    {
      /* set overall return value */
      status = ret;
 800af64:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800af68:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }


  /*-------------------------- USART1/6 configuration --------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART16) == RCC_PERIPHCLK_USART16)
 800af6c:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800af70:	e9d3 2300 	ldrd	r2, r3, [r3]
 800af74:	f002 0301 	and.w	r3, r2, #1
 800af78:	f8c7 30b8 	str.w	r3, [r7, #184]	@ 0xb8
 800af7c:	2300      	movs	r3, #0
 800af7e:	f8c7 30bc 	str.w	r3, [r7, #188]	@ 0xbc
 800af82:	e9d7 122e 	ldrd	r1, r2, [r7, #184]	@ 0xb8
 800af86:	460b      	mov	r3, r1
 800af88:	4313      	orrs	r3, r2
 800af8a:	f000 8089 	beq.w	800b0a0 <HAL_RCCEx_PeriphCLKConfig+0xa58>
  {
    switch (PeriphClkInit->Usart16ClockSelection)
 800af8e:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800af92:	6fdb      	ldr	r3, [r3, #124]	@ 0x7c
 800af94:	2b28      	cmp	r3, #40	@ 0x28
 800af96:	d86b      	bhi.n	800b070 <HAL_RCCEx_PeriphCLKConfig+0xa28>
 800af98:	a201      	add	r2, pc, #4	@ (adr r2, 800afa0 <HAL_RCCEx_PeriphCLKConfig+0x958>)
 800af9a:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800af9e:	bf00      	nop
 800afa0:	0800b079 	.word	0x0800b079
 800afa4:	0800b071 	.word	0x0800b071
 800afa8:	0800b071 	.word	0x0800b071
 800afac:	0800b071 	.word	0x0800b071
 800afb0:	0800b071 	.word	0x0800b071
 800afb4:	0800b071 	.word	0x0800b071
 800afb8:	0800b071 	.word	0x0800b071
 800afbc:	0800b071 	.word	0x0800b071
 800afc0:	0800b045 	.word	0x0800b045
 800afc4:	0800b071 	.word	0x0800b071
 800afc8:	0800b071 	.word	0x0800b071
 800afcc:	0800b071 	.word	0x0800b071
 800afd0:	0800b071 	.word	0x0800b071
 800afd4:	0800b071 	.word	0x0800b071
 800afd8:	0800b071 	.word	0x0800b071
 800afdc:	0800b071 	.word	0x0800b071
 800afe0:	0800b05b 	.word	0x0800b05b
 800afe4:	0800b071 	.word	0x0800b071
 800afe8:	0800b071 	.word	0x0800b071
 800afec:	0800b071 	.word	0x0800b071
 800aff0:	0800b071 	.word	0x0800b071
 800aff4:	0800b071 	.word	0x0800b071
 800aff8:	0800b071 	.word	0x0800b071
 800affc:	0800b071 	.word	0x0800b071
 800b000:	0800b079 	.word	0x0800b079
 800b004:	0800b071 	.word	0x0800b071
 800b008:	0800b071 	.word	0x0800b071
 800b00c:	0800b071 	.word	0x0800b071
 800b010:	0800b071 	.word	0x0800b071
 800b014:	0800b071 	.word	0x0800b071
 800b018:	0800b071 	.word	0x0800b071
 800b01c:	0800b071 	.word	0x0800b071
 800b020:	0800b079 	.word	0x0800b079
 800b024:	0800b071 	.word	0x0800b071
 800b028:	0800b071 	.word	0x0800b071
 800b02c:	0800b071 	.word	0x0800b071
 800b030:	0800b071 	.word	0x0800b071
 800b034:	0800b071 	.word	0x0800b071
 800b038:	0800b071 	.word	0x0800b071
 800b03c:	0800b071 	.word	0x0800b071
 800b040:	0800b079 	.word	0x0800b079
      case RCC_USART16CLKSOURCE_PCLK2: /* CD/D2 PCLK2 as clock source for USART1/6 */
        /* USART1/6 clock source configuration done later after clock selection check */
        break;

      case RCC_USART16CLKSOURCE_PLL2: /* PLL2 is used as clock source for USART1/6 */
        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_Q_UPDATE);
 800b044:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b048:	3308      	adds	r3, #8
 800b04a:	2101      	movs	r1, #1
 800b04c:	4618      	mov	r0, r3
 800b04e:	f000 ffa7 	bl	800bfa0 <RCCEx_PLL2_Config>
 800b052:	4603      	mov	r3, r0
 800b054:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        /* USART1/6 clock source configuration done later after clock selection check */
        break;
 800b058:	e00f      	b.n	800b07a <HAL_RCCEx_PeriphCLKConfig+0xa32>

      case RCC_USART16CLKSOURCE_PLL3: /* PLL3 is used as clock source for USART1/6 */
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_Q_UPDATE);
 800b05a:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b05e:	3328      	adds	r3, #40	@ 0x28
 800b060:	2101      	movs	r1, #1
 800b062:	4618      	mov	r0, r3
 800b064:	f001 f84e 	bl	800c104 <RCCEx_PLL3_Config>
 800b068:	4603      	mov	r3, r0
 800b06a:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        /* USART1/6 clock source configuration done later after clock selection check */
        break;
 800b06e:	e004      	b.n	800b07a <HAL_RCCEx_PeriphCLKConfig+0xa32>
        /* LSE,  oscillator is used as source of USART1/6 clock */
        /* USART1/6 clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800b070:	2301      	movs	r3, #1
 800b072:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800b076:	e000      	b.n	800b07a <HAL_RCCEx_PeriphCLKConfig+0xa32>
        break;
 800b078:	bf00      	nop
    }

    if (ret == HAL_OK)
 800b07a:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b07e:	2b00      	cmp	r3, #0
 800b080:	d10a      	bne.n	800b098 <HAL_RCCEx_PeriphCLKConfig+0xa50>
    {
      /* Set the source of USART1/6 clock */
      __HAL_RCC_USART16_CONFIG(PeriphClkInit->Usart16ClockSelection);
 800b082:	4bbf      	ldr	r3, [pc, #764]	@ (800b380 <HAL_RCCEx_PeriphCLKConfig+0xd38>)
 800b084:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800b086:	f023 0138 	bic.w	r1, r3, #56	@ 0x38
 800b08a:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b08e:	6fdb      	ldr	r3, [r3, #124]	@ 0x7c
 800b090:	4abb      	ldr	r2, [pc, #748]	@ (800b380 <HAL_RCCEx_PeriphCLKConfig+0xd38>)
 800b092:	430b      	orrs	r3, r1
 800b094:	6553      	str	r3, [r2, #84]	@ 0x54
 800b096:	e003      	b.n	800b0a0 <HAL_RCCEx_PeriphCLKConfig+0xa58>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800b098:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b09c:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }

  /*-------------------------- USART2/3/4/5/7/8 Configuration --------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART234578) == RCC_PERIPHCLK_USART234578)
 800b0a0:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b0a4:	e9d3 2300 	ldrd	r2, r3, [r3]
 800b0a8:	f002 0302 	and.w	r3, r2, #2
 800b0ac:	f8c7 30b0 	str.w	r3, [r7, #176]	@ 0xb0
 800b0b0:	2300      	movs	r3, #0
 800b0b2:	f8c7 30b4 	str.w	r3, [r7, #180]	@ 0xb4
 800b0b6:	e9d7 122c 	ldrd	r1, r2, [r7, #176]	@ 0xb0
 800b0ba:	460b      	mov	r3, r1
 800b0bc:	4313      	orrs	r3, r2
 800b0be:	d041      	beq.n	800b144 <HAL_RCCEx_PeriphCLKConfig+0xafc>
  {
    switch (PeriphClkInit->Usart234578ClockSelection)
 800b0c0:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b0c4:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 800b0c6:	2b05      	cmp	r3, #5
 800b0c8:	d824      	bhi.n	800b114 <HAL_RCCEx_PeriphCLKConfig+0xacc>
 800b0ca:	a201      	add	r2, pc, #4	@ (adr r2, 800b0d0 <HAL_RCCEx_PeriphCLKConfig+0xa88>)
 800b0cc:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800b0d0:	0800b11d 	.word	0x0800b11d
 800b0d4:	0800b0e9 	.word	0x0800b0e9
 800b0d8:	0800b0ff 	.word	0x0800b0ff
 800b0dc:	0800b11d 	.word	0x0800b11d
 800b0e0:	0800b11d 	.word	0x0800b11d
 800b0e4:	0800b11d 	.word	0x0800b11d
      case RCC_USART234578CLKSOURCE_PCLK1: /* CD/D2 PCLK1 as clock source for USART2/3/4/5/7/8 */
        /* USART2/3/4/5/7/8 clock source configuration done later after clock selection check */
        break;

      case RCC_USART234578CLKSOURCE_PLL2: /* PLL2 is used as clock source for USART2/3/4/5/7/8 */
        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_Q_UPDATE);
 800b0e8:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b0ec:	3308      	adds	r3, #8
 800b0ee:	2101      	movs	r1, #1
 800b0f0:	4618      	mov	r0, r3
 800b0f2:	f000 ff55 	bl	800bfa0 <RCCEx_PLL2_Config>
 800b0f6:	4603      	mov	r3, r0
 800b0f8:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        /* USART2/3/4/5/7/8 clock source configuration done later after clock selection check */
        break;
 800b0fc:	e00f      	b.n	800b11e <HAL_RCCEx_PeriphCLKConfig+0xad6>

      case RCC_USART234578CLKSOURCE_PLL3: /* PLL3 is used as clock source for USART2/3/4/5/7/8 */
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_Q_UPDATE);
 800b0fe:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b102:	3328      	adds	r3, #40	@ 0x28
 800b104:	2101      	movs	r1, #1
 800b106:	4618      	mov	r0, r3
 800b108:	f000 fffc 	bl	800c104 <RCCEx_PLL3_Config>
 800b10c:	4603      	mov	r3, r0
 800b10e:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        /* USART2/3/4/5/7/8 clock source configuration done later after clock selection check */
        break;
 800b112:	e004      	b.n	800b11e <HAL_RCCEx_PeriphCLKConfig+0xad6>
        /* LSE,  oscillator is used as source of USART2/3/4/5/7/8 clock */
        /* USART2/3/4/5/7/8 clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800b114:	2301      	movs	r3, #1
 800b116:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800b11a:	e000      	b.n	800b11e <HAL_RCCEx_PeriphCLKConfig+0xad6>
        break;
 800b11c:	bf00      	nop
    }

    if (ret == HAL_OK)
 800b11e:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b122:	2b00      	cmp	r3, #0
 800b124:	d10a      	bne.n	800b13c <HAL_RCCEx_PeriphCLKConfig+0xaf4>
    {
      /* Set the source of USART2/3/4/5/7/8 clock */
      __HAL_RCC_USART234578_CONFIG(PeriphClkInit->Usart234578ClockSelection);
 800b126:	4b96      	ldr	r3, [pc, #600]	@ (800b380 <HAL_RCCEx_PeriphCLKConfig+0xd38>)
 800b128:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800b12a:	f023 0107 	bic.w	r1, r3, #7
 800b12e:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b132:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 800b134:	4a92      	ldr	r2, [pc, #584]	@ (800b380 <HAL_RCCEx_PeriphCLKConfig+0xd38>)
 800b136:	430b      	orrs	r3, r1
 800b138:	6553      	str	r3, [r2, #84]	@ 0x54
 800b13a:	e003      	b.n	800b144 <HAL_RCCEx_PeriphCLKConfig+0xafc>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800b13c:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b140:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }

  /*-------------------------- LPUART1 Configuration -------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPUART1) == RCC_PERIPHCLK_LPUART1)
 800b144:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b148:	e9d3 2300 	ldrd	r2, r3, [r3]
 800b14c:	f002 0304 	and.w	r3, r2, #4
 800b150:	f8c7 30a8 	str.w	r3, [r7, #168]	@ 0xa8
 800b154:	2300      	movs	r3, #0
 800b156:	f8c7 30ac 	str.w	r3, [r7, #172]	@ 0xac
 800b15a:	e9d7 122a 	ldrd	r1, r2, [r7, #168]	@ 0xa8
 800b15e:	460b      	mov	r3, r1
 800b160:	4313      	orrs	r3, r2
 800b162:	d044      	beq.n	800b1ee <HAL_RCCEx_PeriphCLKConfig+0xba6>
  {
    switch (PeriphClkInit->Lpuart1ClockSelection)
 800b164:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b168:	f8d3 3094 	ldr.w	r3, [r3, #148]	@ 0x94
 800b16c:	2b05      	cmp	r3, #5
 800b16e:	d825      	bhi.n	800b1bc <HAL_RCCEx_PeriphCLKConfig+0xb74>
 800b170:	a201      	add	r2, pc, #4	@ (adr r2, 800b178 <HAL_RCCEx_PeriphCLKConfig+0xb30>)
 800b172:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800b176:	bf00      	nop
 800b178:	0800b1c5 	.word	0x0800b1c5
 800b17c:	0800b191 	.word	0x0800b191
 800b180:	0800b1a7 	.word	0x0800b1a7
 800b184:	0800b1c5 	.word	0x0800b1c5
 800b188:	0800b1c5 	.word	0x0800b1c5
 800b18c:	0800b1c5 	.word	0x0800b1c5
      case RCC_LPUART1CLKSOURCE_PCLK4: /* SRD/D3 PCLK1 (PCLK4) as clock source for LPUART1 */
        /* LPUART1 clock source configuration done later after clock selection check */
        break;

      case RCC_LPUART1CLKSOURCE_PLL2: /* PLL2 is used as clock source for LPUART1 */
        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_Q_UPDATE);
 800b190:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b194:	3308      	adds	r3, #8
 800b196:	2101      	movs	r1, #1
 800b198:	4618      	mov	r0, r3
 800b19a:	f000 ff01 	bl	800bfa0 <RCCEx_PLL2_Config>
 800b19e:	4603      	mov	r3, r0
 800b1a0:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        /* LPUART1 clock source configuration done later after clock selection check */
        break;
 800b1a4:	e00f      	b.n	800b1c6 <HAL_RCCEx_PeriphCLKConfig+0xb7e>

      case RCC_LPUART1CLKSOURCE_PLL3: /* PLL3 is used as clock source for LPUART1 */
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_Q_UPDATE);
 800b1a6:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b1aa:	3328      	adds	r3, #40	@ 0x28
 800b1ac:	2101      	movs	r1, #1
 800b1ae:	4618      	mov	r0, r3
 800b1b0:	f000 ffa8 	bl	800c104 <RCCEx_PLL3_Config>
 800b1b4:	4603      	mov	r3, r0
 800b1b6:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        /* LPUART1 clock source configuration done later after clock selection check */
        break;
 800b1ba:	e004      	b.n	800b1c6 <HAL_RCCEx_PeriphCLKConfig+0xb7e>
        /* LSE,  oscillator is used as source of LPUART1 clock */
        /* LPUART1 clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800b1bc:	2301      	movs	r3, #1
 800b1be:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800b1c2:	e000      	b.n	800b1c6 <HAL_RCCEx_PeriphCLKConfig+0xb7e>
        break;
 800b1c4:	bf00      	nop
    }

    if (ret == HAL_OK)
 800b1c6:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b1ca:	2b00      	cmp	r3, #0
 800b1cc:	d10b      	bne.n	800b1e6 <HAL_RCCEx_PeriphCLKConfig+0xb9e>
    {
      /* Set the source of LPUART1 clock */
      __HAL_RCC_LPUART1_CONFIG(PeriphClkInit->Lpuart1ClockSelection);
 800b1ce:	4b6c      	ldr	r3, [pc, #432]	@ (800b380 <HAL_RCCEx_PeriphCLKConfig+0xd38>)
 800b1d0:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800b1d2:	f023 0107 	bic.w	r1, r3, #7
 800b1d6:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b1da:	f8d3 3094 	ldr.w	r3, [r3, #148]	@ 0x94
 800b1de:	4a68      	ldr	r2, [pc, #416]	@ (800b380 <HAL_RCCEx_PeriphCLKConfig+0xd38>)
 800b1e0:	430b      	orrs	r3, r1
 800b1e2:	6593      	str	r3, [r2, #88]	@ 0x58
 800b1e4:	e003      	b.n	800b1ee <HAL_RCCEx_PeriphCLKConfig+0xba6>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800b1e6:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b1ea:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }

  /*---------------------------- LPTIM1 configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPTIM1) == RCC_PERIPHCLK_LPTIM1)
 800b1ee:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b1f2:	e9d3 2300 	ldrd	r2, r3, [r3]
 800b1f6:	f002 0320 	and.w	r3, r2, #32
 800b1fa:	f8c7 30a0 	str.w	r3, [r7, #160]	@ 0xa0
 800b1fe:	2300      	movs	r3, #0
 800b200:	f8c7 30a4 	str.w	r3, [r7, #164]	@ 0xa4
 800b204:	e9d7 1228 	ldrd	r1, r2, [r7, #160]	@ 0xa0
 800b208:	460b      	mov	r3, r1
 800b20a:	4313      	orrs	r3, r2
 800b20c:	d055      	beq.n	800b2ba <HAL_RCCEx_PeriphCLKConfig+0xc72>
  {
    switch (PeriphClkInit->Lptim1ClockSelection)
 800b20e:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b212:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800b216:	f1b3 4fa0 	cmp.w	r3, #1342177280	@ 0x50000000
 800b21a:	d033      	beq.n	800b284 <HAL_RCCEx_PeriphCLKConfig+0xc3c>
 800b21c:	f1b3 4fa0 	cmp.w	r3, #1342177280	@ 0x50000000
 800b220:	d82c      	bhi.n	800b27c <HAL_RCCEx_PeriphCLKConfig+0xc34>
 800b222:	f1b3 4f80 	cmp.w	r3, #1073741824	@ 0x40000000
 800b226:	d02f      	beq.n	800b288 <HAL_RCCEx_PeriphCLKConfig+0xc40>
 800b228:	f1b3 4f80 	cmp.w	r3, #1073741824	@ 0x40000000
 800b22c:	d826      	bhi.n	800b27c <HAL_RCCEx_PeriphCLKConfig+0xc34>
 800b22e:	f1b3 5f40 	cmp.w	r3, #805306368	@ 0x30000000
 800b232:	d02b      	beq.n	800b28c <HAL_RCCEx_PeriphCLKConfig+0xc44>
 800b234:	f1b3 5f40 	cmp.w	r3, #805306368	@ 0x30000000
 800b238:	d820      	bhi.n	800b27c <HAL_RCCEx_PeriphCLKConfig+0xc34>
 800b23a:	f1b3 5f00 	cmp.w	r3, #536870912	@ 0x20000000
 800b23e:	d012      	beq.n	800b266 <HAL_RCCEx_PeriphCLKConfig+0xc1e>
 800b240:	f1b3 5f00 	cmp.w	r3, #536870912	@ 0x20000000
 800b244:	d81a      	bhi.n	800b27c <HAL_RCCEx_PeriphCLKConfig+0xc34>
 800b246:	2b00      	cmp	r3, #0
 800b248:	d022      	beq.n	800b290 <HAL_RCCEx_PeriphCLKConfig+0xc48>
 800b24a:	f1b3 5f80 	cmp.w	r3, #268435456	@ 0x10000000
 800b24e:	d115      	bne.n	800b27c <HAL_RCCEx_PeriphCLKConfig+0xc34>
        /* LPTIM1 clock source configuration done later after clock selection check */
        break;

      case RCC_LPTIM1CLKSOURCE_PLL2: /* PLL2 is used as clock source for LPTIM1*/

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
 800b250:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b254:	3308      	adds	r3, #8
 800b256:	2100      	movs	r1, #0
 800b258:	4618      	mov	r0, r3
 800b25a:	f000 fea1 	bl	800bfa0 <RCCEx_PLL2_Config>
 800b25e:	4603      	mov	r3, r0
 800b260:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* LPTIM1 clock source configuration done later after clock selection check */
        break;
 800b264:	e015      	b.n	800b292 <HAL_RCCEx_PeriphCLKConfig+0xc4a>

      case RCC_LPTIM1CLKSOURCE_PLL3:  /* PLL3 is used as clock source for LPTIM1*/
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_R_UPDATE);
 800b266:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b26a:	3328      	adds	r3, #40	@ 0x28
 800b26c:	2102      	movs	r1, #2
 800b26e:	4618      	mov	r0, r3
 800b270:	f000 ff48 	bl	800c104 <RCCEx_PLL3_Config>
 800b274:	4603      	mov	r3, r0
 800b276:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* LPTIM1 clock source configuration done later after clock selection check */
        break;
 800b27a:	e00a      	b.n	800b292 <HAL_RCCEx_PeriphCLKConfig+0xc4a>
        /* HSI, HSE, or CSI oscillator is used as source of LPTIM1 clock */
        /* LPTIM1 clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800b27c:	2301      	movs	r3, #1
 800b27e:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800b282:	e006      	b.n	800b292 <HAL_RCCEx_PeriphCLKConfig+0xc4a>
        break;
 800b284:	bf00      	nop
 800b286:	e004      	b.n	800b292 <HAL_RCCEx_PeriphCLKConfig+0xc4a>
        break;
 800b288:	bf00      	nop
 800b28a:	e002      	b.n	800b292 <HAL_RCCEx_PeriphCLKConfig+0xc4a>
        break;
 800b28c:	bf00      	nop
 800b28e:	e000      	b.n	800b292 <HAL_RCCEx_PeriphCLKConfig+0xc4a>
        break;
 800b290:	bf00      	nop
    }

    if (ret == HAL_OK)
 800b292:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b296:	2b00      	cmp	r3, #0
 800b298:	d10b      	bne.n	800b2b2 <HAL_RCCEx_PeriphCLKConfig+0xc6a>
    {
      /* Set the source of LPTIM1 clock*/
      __HAL_RCC_LPTIM1_CONFIG(PeriphClkInit->Lptim1ClockSelection);
 800b29a:	4b39      	ldr	r3, [pc, #228]	@ (800b380 <HAL_RCCEx_PeriphCLKConfig+0xd38>)
 800b29c:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800b29e:	f023 41e0 	bic.w	r1, r3, #1879048192	@ 0x70000000
 800b2a2:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b2a6:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800b2aa:	4a35      	ldr	r2, [pc, #212]	@ (800b380 <HAL_RCCEx_PeriphCLKConfig+0xd38>)
 800b2ac:	430b      	orrs	r3, r1
 800b2ae:	6553      	str	r3, [r2, #84]	@ 0x54
 800b2b0:	e003      	b.n	800b2ba <HAL_RCCEx_PeriphCLKConfig+0xc72>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800b2b2:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b2b6:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }

  /*---------------------------- LPTIM2 configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPTIM2) == RCC_PERIPHCLK_LPTIM2)
 800b2ba:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b2be:	e9d3 2300 	ldrd	r2, r3, [r3]
 800b2c2:	f002 0340 	and.w	r3, r2, #64	@ 0x40
 800b2c6:	f8c7 3098 	str.w	r3, [r7, #152]	@ 0x98
 800b2ca:	2300      	movs	r3, #0
 800b2cc:	f8c7 309c 	str.w	r3, [r7, #156]	@ 0x9c
 800b2d0:	e9d7 1226 	ldrd	r1, r2, [r7, #152]	@ 0x98
 800b2d4:	460b      	mov	r3, r1
 800b2d6:	4313      	orrs	r3, r2
 800b2d8:	d058      	beq.n	800b38c <HAL_RCCEx_PeriphCLKConfig+0xd44>
  {
    switch (PeriphClkInit->Lptim2ClockSelection)
 800b2da:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b2de:	f8d3 309c 	ldr.w	r3, [r3, #156]	@ 0x9c
 800b2e2:	f5b3 5fa0 	cmp.w	r3, #5120	@ 0x1400
 800b2e6:	d033      	beq.n	800b350 <HAL_RCCEx_PeriphCLKConfig+0xd08>
 800b2e8:	f5b3 5fa0 	cmp.w	r3, #5120	@ 0x1400
 800b2ec:	d82c      	bhi.n	800b348 <HAL_RCCEx_PeriphCLKConfig+0xd00>
 800b2ee:	f5b3 5f80 	cmp.w	r3, #4096	@ 0x1000
 800b2f2:	d02f      	beq.n	800b354 <HAL_RCCEx_PeriphCLKConfig+0xd0c>
 800b2f4:	f5b3 5f80 	cmp.w	r3, #4096	@ 0x1000
 800b2f8:	d826      	bhi.n	800b348 <HAL_RCCEx_PeriphCLKConfig+0xd00>
 800b2fa:	f5b3 6f40 	cmp.w	r3, #3072	@ 0xc00
 800b2fe:	d02b      	beq.n	800b358 <HAL_RCCEx_PeriphCLKConfig+0xd10>
 800b300:	f5b3 6f40 	cmp.w	r3, #3072	@ 0xc00
 800b304:	d820      	bhi.n	800b348 <HAL_RCCEx_PeriphCLKConfig+0xd00>
 800b306:	f5b3 6f00 	cmp.w	r3, #2048	@ 0x800
 800b30a:	d012      	beq.n	800b332 <HAL_RCCEx_PeriphCLKConfig+0xcea>
 800b30c:	f5b3 6f00 	cmp.w	r3, #2048	@ 0x800
 800b310:	d81a      	bhi.n	800b348 <HAL_RCCEx_PeriphCLKConfig+0xd00>
 800b312:	2b00      	cmp	r3, #0
 800b314:	d022      	beq.n	800b35c <HAL_RCCEx_PeriphCLKConfig+0xd14>
 800b316:	f5b3 6f80 	cmp.w	r3, #1024	@ 0x400
 800b31a:	d115      	bne.n	800b348 <HAL_RCCEx_PeriphCLKConfig+0xd00>
        /* LPTIM2 clock source configuration done later after clock selection check */
        break;

      case RCC_LPTIM2CLKSOURCE_PLL2: /* PLL2 is used as clock source for LPTIM2*/

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
 800b31c:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b320:	3308      	adds	r3, #8
 800b322:	2100      	movs	r1, #0
 800b324:	4618      	mov	r0, r3
 800b326:	f000 fe3b 	bl	800bfa0 <RCCEx_PLL2_Config>
 800b32a:	4603      	mov	r3, r0
 800b32c:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* LPTIM2 clock source configuration done later after clock selection check */
        break;
 800b330:	e015      	b.n	800b35e <HAL_RCCEx_PeriphCLKConfig+0xd16>

      case RCC_LPTIM2CLKSOURCE_PLL3:  /* PLL3 is used as clock source for LPTIM2*/
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_R_UPDATE);
 800b332:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b336:	3328      	adds	r3, #40	@ 0x28
 800b338:	2102      	movs	r1, #2
 800b33a:	4618      	mov	r0, r3
 800b33c:	f000 fee2 	bl	800c104 <RCCEx_PLL3_Config>
 800b340:	4603      	mov	r3, r0
 800b342:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* LPTIM2 clock source configuration done later after clock selection check */
        break;
 800b346:	e00a      	b.n	800b35e <HAL_RCCEx_PeriphCLKConfig+0xd16>
        /* HSI, HSE, or CSI oscillator is used as source of LPTIM2 clock */
        /* LPTIM2 clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800b348:	2301      	movs	r3, #1
 800b34a:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800b34e:	e006      	b.n	800b35e <HAL_RCCEx_PeriphCLKConfig+0xd16>
        break;
 800b350:	bf00      	nop
 800b352:	e004      	b.n	800b35e <HAL_RCCEx_PeriphCLKConfig+0xd16>
        break;
 800b354:	bf00      	nop
 800b356:	e002      	b.n	800b35e <HAL_RCCEx_PeriphCLKConfig+0xd16>
        break;
 800b358:	bf00      	nop
 800b35a:	e000      	b.n	800b35e <HAL_RCCEx_PeriphCLKConfig+0xd16>
        break;
 800b35c:	bf00      	nop
    }

    if (ret == HAL_OK)
 800b35e:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b362:	2b00      	cmp	r3, #0
 800b364:	d10e      	bne.n	800b384 <HAL_RCCEx_PeriphCLKConfig+0xd3c>
    {
      /* Set the source of LPTIM2 clock*/
      __HAL_RCC_LPTIM2_CONFIG(PeriphClkInit->Lptim2ClockSelection);
 800b366:	4b06      	ldr	r3, [pc, #24]	@ (800b380 <HAL_RCCEx_PeriphCLKConfig+0xd38>)
 800b368:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800b36a:	f423 51e0 	bic.w	r1, r3, #7168	@ 0x1c00
 800b36e:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b372:	f8d3 309c 	ldr.w	r3, [r3, #156]	@ 0x9c
 800b376:	4a02      	ldr	r2, [pc, #8]	@ (800b380 <HAL_RCCEx_PeriphCLKConfig+0xd38>)
 800b378:	430b      	orrs	r3, r1
 800b37a:	6593      	str	r3, [r2, #88]	@ 0x58
 800b37c:	e006      	b.n	800b38c <HAL_RCCEx_PeriphCLKConfig+0xd44>
 800b37e:	bf00      	nop
 800b380:	58024400 	.word	0x58024400
    }
    else
    {
      /* set overall return value */
      status = ret;
 800b384:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b388:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }

  /*---------------------------- LPTIM345 configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPTIM345) == RCC_PERIPHCLK_LPTIM345)
 800b38c:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b390:	e9d3 2300 	ldrd	r2, r3, [r3]
 800b394:	f002 0380 	and.w	r3, r2, #128	@ 0x80
 800b398:	f8c7 3090 	str.w	r3, [r7, #144]	@ 0x90
 800b39c:	2300      	movs	r3, #0
 800b39e:	f8c7 3094 	str.w	r3, [r7, #148]	@ 0x94
 800b3a2:	e9d7 1224 	ldrd	r1, r2, [r7, #144]	@ 0x90
 800b3a6:	460b      	mov	r3, r1
 800b3a8:	4313      	orrs	r3, r2
 800b3aa:	d055      	beq.n	800b458 <HAL_RCCEx_PeriphCLKConfig+0xe10>
  {
    switch (PeriphClkInit->Lptim345ClockSelection)
 800b3ac:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b3b0:	f8d3 30a0 	ldr.w	r3, [r3, #160]	@ 0xa0
 800b3b4:	f5b3 4f20 	cmp.w	r3, #40960	@ 0xa000
 800b3b8:	d033      	beq.n	800b422 <HAL_RCCEx_PeriphCLKConfig+0xdda>
 800b3ba:	f5b3 4f20 	cmp.w	r3, #40960	@ 0xa000
 800b3be:	d82c      	bhi.n	800b41a <HAL_RCCEx_PeriphCLKConfig+0xdd2>
 800b3c0:	f5b3 4f00 	cmp.w	r3, #32768	@ 0x8000
 800b3c4:	d02f      	beq.n	800b426 <HAL_RCCEx_PeriphCLKConfig+0xdde>
 800b3c6:	f5b3 4f00 	cmp.w	r3, #32768	@ 0x8000
 800b3ca:	d826      	bhi.n	800b41a <HAL_RCCEx_PeriphCLKConfig+0xdd2>
 800b3cc:	f5b3 4fc0 	cmp.w	r3, #24576	@ 0x6000
 800b3d0:	d02b      	beq.n	800b42a <HAL_RCCEx_PeriphCLKConfig+0xde2>
 800b3d2:	f5b3 4fc0 	cmp.w	r3, #24576	@ 0x6000
 800b3d6:	d820      	bhi.n	800b41a <HAL_RCCEx_PeriphCLKConfig+0xdd2>
 800b3d8:	f5b3 4f80 	cmp.w	r3, #16384	@ 0x4000
 800b3dc:	d012      	beq.n	800b404 <HAL_RCCEx_PeriphCLKConfig+0xdbc>
 800b3de:	f5b3 4f80 	cmp.w	r3, #16384	@ 0x4000
 800b3e2:	d81a      	bhi.n	800b41a <HAL_RCCEx_PeriphCLKConfig+0xdd2>
 800b3e4:	2b00      	cmp	r3, #0
 800b3e6:	d022      	beq.n	800b42e <HAL_RCCEx_PeriphCLKConfig+0xde6>
 800b3e8:	f5b3 5f00 	cmp.w	r3, #8192	@ 0x2000
 800b3ec:	d115      	bne.n	800b41a <HAL_RCCEx_PeriphCLKConfig+0xdd2>
      case RCC_LPTIM345CLKSOURCE_PCLK4:      /* SRD/D3 PCLK1 (PCLK4) as clock source for LPTIM3/4/5 */
        /* LPTIM3/4/5 clock source configuration done later after clock selection check */
        break;

      case RCC_LPTIM345CLKSOURCE_PLL2: /* PLL2 is used as clock source for LPTIM3/4/5 */
        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
 800b3ee:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b3f2:	3308      	adds	r3, #8
 800b3f4:	2100      	movs	r1, #0
 800b3f6:	4618      	mov	r0, r3
 800b3f8:	f000 fdd2 	bl	800bfa0 <RCCEx_PLL2_Config>
 800b3fc:	4603      	mov	r3, r0
 800b3fe:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* LPTIM3/4/5 clock source configuration done later after clock selection check */
        break;
 800b402:	e015      	b.n	800b430 <HAL_RCCEx_PeriphCLKConfig+0xde8>

      case RCC_LPTIM345CLKSOURCE_PLL3:  /* PLL3 is used as clock source for LPTIM3/4/5 */
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_R_UPDATE);
 800b404:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b408:	3328      	adds	r3, #40	@ 0x28
 800b40a:	2102      	movs	r1, #2
 800b40c:	4618      	mov	r0, r3
 800b40e:	f000 fe79 	bl	800c104 <RCCEx_PLL3_Config>
 800b412:	4603      	mov	r3, r0
 800b414:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* LPTIM3/4/5 clock source configuration done later after clock selection check */
        break;
 800b418:	e00a      	b.n	800b430 <HAL_RCCEx_PeriphCLKConfig+0xde8>
        /* HSI, HSE, or CSI oscillator is used as source of LPTIM3/4/5 clock */
        /* LPTIM3/4/5 clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800b41a:	2301      	movs	r3, #1
 800b41c:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800b420:	e006      	b.n	800b430 <HAL_RCCEx_PeriphCLKConfig+0xde8>
        break;
 800b422:	bf00      	nop
 800b424:	e004      	b.n	800b430 <HAL_RCCEx_PeriphCLKConfig+0xde8>
        break;
 800b426:	bf00      	nop
 800b428:	e002      	b.n	800b430 <HAL_RCCEx_PeriphCLKConfig+0xde8>
        break;
 800b42a:	bf00      	nop
 800b42c:	e000      	b.n	800b430 <HAL_RCCEx_PeriphCLKConfig+0xde8>
        break;
 800b42e:	bf00      	nop
    }

    if (ret == HAL_OK)
 800b430:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b434:	2b00      	cmp	r3, #0
 800b436:	d10b      	bne.n	800b450 <HAL_RCCEx_PeriphCLKConfig+0xe08>
    {
      /* Set the source of LPTIM3/4/5 clock */
      __HAL_RCC_LPTIM345_CONFIG(PeriphClkInit->Lptim345ClockSelection);
 800b438:	4bbb      	ldr	r3, [pc, #748]	@ (800b728 <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800b43a:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800b43c:	f423 4160 	bic.w	r1, r3, #57344	@ 0xe000
 800b440:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b444:	f8d3 30a0 	ldr.w	r3, [r3, #160]	@ 0xa0
 800b448:	4ab7      	ldr	r2, [pc, #732]	@ (800b728 <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800b44a:	430b      	orrs	r3, r1
 800b44c:	6593      	str	r3, [r2, #88]	@ 0x58
 800b44e:	e003      	b.n	800b458 <HAL_RCCEx_PeriphCLKConfig+0xe10>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800b450:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b454:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e

    __HAL_RCC_I2C1235_CONFIG(PeriphClkInit->I2c1235ClockSelection);

  }
#else
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C123) == RCC_PERIPHCLK_I2C123)
 800b458:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b45c:	e9d3 2300 	ldrd	r2, r3, [r3]
 800b460:	f002 0308 	and.w	r3, r2, #8
 800b464:	f8c7 3088 	str.w	r3, [r7, #136]	@ 0x88
 800b468:	2300      	movs	r3, #0
 800b46a:	f8c7 308c 	str.w	r3, [r7, #140]	@ 0x8c
 800b46e:	e9d7 1222 	ldrd	r1, r2, [r7, #136]	@ 0x88
 800b472:	460b      	mov	r3, r1
 800b474:	4313      	orrs	r3, r2
 800b476:	d01e      	beq.n	800b4b6 <HAL_RCCEx_PeriphCLKConfig+0xe6e>
  {
    /* Check the parameters */
    assert_param(IS_RCC_I2C123CLKSOURCE(PeriphClkInit->I2c123ClockSelection));

    if ((PeriphClkInit->I2c123ClockSelection) == RCC_I2C123CLKSOURCE_PLL3)
 800b478:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b47c:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 800b480:	f5b3 5f80 	cmp.w	r3, #4096	@ 0x1000
 800b484:	d10c      	bne.n	800b4a0 <HAL_RCCEx_PeriphCLKConfig+0xe58>
    {
      if (RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_R_UPDATE) != HAL_OK)
 800b486:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b48a:	3328      	adds	r3, #40	@ 0x28
 800b48c:	2102      	movs	r1, #2
 800b48e:	4618      	mov	r0, r3
 800b490:	f000 fe38 	bl	800c104 <RCCEx_PLL3_Config>
 800b494:	4603      	mov	r3, r0
 800b496:	2b00      	cmp	r3, #0
 800b498:	d002      	beq.n	800b4a0 <HAL_RCCEx_PeriphCLKConfig+0xe58>
      {
        status = HAL_ERROR;
 800b49a:	2301      	movs	r3, #1
 800b49c:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
      }
    }

    __HAL_RCC_I2C123_CONFIG(PeriphClkInit->I2c123ClockSelection);
 800b4a0:	4ba1      	ldr	r3, [pc, #644]	@ (800b728 <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800b4a2:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800b4a4:	f423 5140 	bic.w	r1, r3, #12288	@ 0x3000
 800b4a8:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b4ac:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 800b4b0:	4a9d      	ldr	r2, [pc, #628]	@ (800b728 <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800b4b2:	430b      	orrs	r3, r1
 800b4b4:	6553      	str	r3, [r2, #84]	@ 0x54

  }
#endif /* I2C5 */

  /*------------------------------ I2C4 Configuration ------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C4) == RCC_PERIPHCLK_I2C4)
 800b4b6:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b4ba:	e9d3 2300 	ldrd	r2, r3, [r3]
 800b4be:	f002 0310 	and.w	r3, r2, #16
 800b4c2:	f8c7 3080 	str.w	r3, [r7, #128]	@ 0x80
 800b4c6:	2300      	movs	r3, #0
 800b4c8:	f8c7 3084 	str.w	r3, [r7, #132]	@ 0x84
 800b4cc:	e9d7 1220 	ldrd	r1, r2, [r7, #128]	@ 0x80
 800b4d0:	460b      	mov	r3, r1
 800b4d2:	4313      	orrs	r3, r2
 800b4d4:	d01e      	beq.n	800b514 <HAL_RCCEx_PeriphCLKConfig+0xecc>
  {
    /* Check the parameters */
    assert_param(IS_RCC_I2C4CLKSOURCE(PeriphClkInit->I2c4ClockSelection));

    if ((PeriphClkInit->I2c4ClockSelection) == RCC_I2C4CLKSOURCE_PLL3)
 800b4d6:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b4da:	f8d3 3098 	ldr.w	r3, [r3, #152]	@ 0x98
 800b4de:	f5b3 7f80 	cmp.w	r3, #256	@ 0x100
 800b4e2:	d10c      	bne.n	800b4fe <HAL_RCCEx_PeriphCLKConfig+0xeb6>
    {
      if (RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_R_UPDATE) != HAL_OK)
 800b4e4:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b4e8:	3328      	adds	r3, #40	@ 0x28
 800b4ea:	2102      	movs	r1, #2
 800b4ec:	4618      	mov	r0, r3
 800b4ee:	f000 fe09 	bl	800c104 <RCCEx_PLL3_Config>
 800b4f2:	4603      	mov	r3, r0
 800b4f4:	2b00      	cmp	r3, #0
 800b4f6:	d002      	beq.n	800b4fe <HAL_RCCEx_PeriphCLKConfig+0xeb6>
      {
        status = HAL_ERROR;
 800b4f8:	2301      	movs	r3, #1
 800b4fa:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
      }
    }

    __HAL_RCC_I2C4_CONFIG(PeriphClkInit->I2c4ClockSelection);
 800b4fe:	4b8a      	ldr	r3, [pc, #552]	@ (800b728 <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800b500:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800b502:	f423 7140 	bic.w	r1, r3, #768	@ 0x300
 800b506:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b50a:	f8d3 3098 	ldr.w	r3, [r3, #152]	@ 0x98
 800b50e:	4a86      	ldr	r2, [pc, #536]	@ (800b728 <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800b510:	430b      	orrs	r3, r1
 800b512:	6593      	str	r3, [r2, #88]	@ 0x58

  }

  /*---------------------------- ADC configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC)
 800b514:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b518:	e9d3 2300 	ldrd	r2, r3, [r3]
 800b51c:	f402 2300 	and.w	r3, r2, #524288	@ 0x80000
 800b520:	67bb      	str	r3, [r7, #120]	@ 0x78
 800b522:	2300      	movs	r3, #0
 800b524:	67fb      	str	r3, [r7, #124]	@ 0x7c
 800b526:	e9d7 121e 	ldrd	r1, r2, [r7, #120]	@ 0x78
 800b52a:	460b      	mov	r3, r1
 800b52c:	4313      	orrs	r3, r2
 800b52e:	d03e      	beq.n	800b5ae <HAL_RCCEx_PeriphCLKConfig+0xf66>
  {
    switch (PeriphClkInit->AdcClockSelection)
 800b530:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b534:	f8d3 30a4 	ldr.w	r3, [r3, #164]	@ 0xa4
 800b538:	f5b3 3f00 	cmp.w	r3, #131072	@ 0x20000
 800b53c:	d022      	beq.n	800b584 <HAL_RCCEx_PeriphCLKConfig+0xf3c>
 800b53e:	f5b3 3f00 	cmp.w	r3, #131072	@ 0x20000
 800b542:	d81b      	bhi.n	800b57c <HAL_RCCEx_PeriphCLKConfig+0xf34>
 800b544:	2b00      	cmp	r3, #0
 800b546:	d003      	beq.n	800b550 <HAL_RCCEx_PeriphCLKConfig+0xf08>
 800b548:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 800b54c:	d00b      	beq.n	800b566 <HAL_RCCEx_PeriphCLKConfig+0xf1e>
 800b54e:	e015      	b.n	800b57c <HAL_RCCEx_PeriphCLKConfig+0xf34>
    {

      case RCC_ADCCLKSOURCE_PLL2: /* PLL2 is used as clock source for ADC*/

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
 800b550:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b554:	3308      	adds	r3, #8
 800b556:	2100      	movs	r1, #0
 800b558:	4618      	mov	r0, r3
 800b55a:	f000 fd21 	bl	800bfa0 <RCCEx_PLL2_Config>
 800b55e:	4603      	mov	r3, r0
 800b560:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* ADC clock source configuration done later after clock selection check */
        break;
 800b564:	e00f      	b.n	800b586 <HAL_RCCEx_PeriphCLKConfig+0xf3e>

      case RCC_ADCCLKSOURCE_PLL3:  /* PLL3 is used as clock source for ADC*/
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_R_UPDATE);
 800b566:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b56a:	3328      	adds	r3, #40	@ 0x28
 800b56c:	2102      	movs	r1, #2
 800b56e:	4618      	mov	r0, r3
 800b570:	f000 fdc8 	bl	800c104 <RCCEx_PLL3_Config>
 800b574:	4603      	mov	r3, r0
 800b576:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* ADC clock source configuration done later after clock selection check */
        break;
 800b57a:	e004      	b.n	800b586 <HAL_RCCEx_PeriphCLKConfig+0xf3e>
        /* HSI, HSE, or CSI oscillator is used as source of ADC clock */
        /* ADC clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800b57c:	2301      	movs	r3, #1
 800b57e:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800b582:	e000      	b.n	800b586 <HAL_RCCEx_PeriphCLKConfig+0xf3e>
        break;
 800b584:	bf00      	nop
    }

    if (ret == HAL_OK)
 800b586:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b58a:	2b00      	cmp	r3, #0
 800b58c:	d10b      	bne.n	800b5a6 <HAL_RCCEx_PeriphCLKConfig+0xf5e>
    {
      /* Set the source of ADC clock*/
      __HAL_RCC_ADC_CONFIG(PeriphClkInit->AdcClockSelection);
 800b58e:	4b66      	ldr	r3, [pc, #408]	@ (800b728 <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800b590:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800b592:	f423 3140 	bic.w	r1, r3, #196608	@ 0x30000
 800b596:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b59a:	f8d3 30a4 	ldr.w	r3, [r3, #164]	@ 0xa4
 800b59e:	4a62      	ldr	r2, [pc, #392]	@ (800b728 <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800b5a0:	430b      	orrs	r3, r1
 800b5a2:	6593      	str	r3, [r2, #88]	@ 0x58
 800b5a4:	e003      	b.n	800b5ae <HAL_RCCEx_PeriphCLKConfig+0xf66>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800b5a6:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b5aa:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }

  /*------------------------------ USB Configuration -------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB)
 800b5ae:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b5b2:	e9d3 2300 	ldrd	r2, r3, [r3]
 800b5b6:	f402 2380 	and.w	r3, r2, #262144	@ 0x40000
 800b5ba:	673b      	str	r3, [r7, #112]	@ 0x70
 800b5bc:	2300      	movs	r3, #0
 800b5be:	677b      	str	r3, [r7, #116]	@ 0x74
 800b5c0:	e9d7 121c 	ldrd	r1, r2, [r7, #112]	@ 0x70
 800b5c4:	460b      	mov	r3, r1
 800b5c6:	4313      	orrs	r3, r2
 800b5c8:	d03b      	beq.n	800b642 <HAL_RCCEx_PeriphCLKConfig+0xffa>
  {

    switch (PeriphClkInit->UsbClockSelection)
 800b5ca:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b5ce:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 800b5d2:	f5b3 1f40 	cmp.w	r3, #3145728	@ 0x300000
 800b5d6:	d01f      	beq.n	800b618 <HAL_RCCEx_PeriphCLKConfig+0xfd0>
 800b5d8:	f5b3 1f40 	cmp.w	r3, #3145728	@ 0x300000
 800b5dc:	d818      	bhi.n	800b610 <HAL_RCCEx_PeriphCLKConfig+0xfc8>
 800b5de:	f5b3 1f80 	cmp.w	r3, #1048576	@ 0x100000
 800b5e2:	d003      	beq.n	800b5ec <HAL_RCCEx_PeriphCLKConfig+0xfa4>
 800b5e4:	f5b3 1f00 	cmp.w	r3, #2097152	@ 0x200000
 800b5e8:	d007      	beq.n	800b5fa <HAL_RCCEx_PeriphCLKConfig+0xfb2>
 800b5ea:	e011      	b.n	800b610 <HAL_RCCEx_PeriphCLKConfig+0xfc8>
    {
      case RCC_USBCLKSOURCE_PLL:      /* PLL is used as clock source for USB*/
        /* Enable USB Clock output generated form System USB . */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
 800b5ec:	4b4e      	ldr	r3, [pc, #312]	@ (800b728 <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800b5ee:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800b5f0:	4a4d      	ldr	r2, [pc, #308]	@ (800b728 <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800b5f2:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800b5f6:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* USB clock source configuration done later after clock selection check */
        break;
 800b5f8:	e00f      	b.n	800b61a <HAL_RCCEx_PeriphCLKConfig+0xfd2>

      case RCC_USBCLKSOURCE_PLL3: /* PLL3 is used as clock source for USB*/

        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_Q_UPDATE);
 800b5fa:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b5fe:	3328      	adds	r3, #40	@ 0x28
 800b600:	2101      	movs	r1, #1
 800b602:	4618      	mov	r0, r3
 800b604:	f000 fd7e 	bl	800c104 <RCCEx_PLL3_Config>
 800b608:	4603      	mov	r3, r0
 800b60a:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* USB clock source configuration done later after clock selection check */
        break;
 800b60e:	e004      	b.n	800b61a <HAL_RCCEx_PeriphCLKConfig+0xfd2>
        /* HSI48 oscillator is used as source of USB clock */
        /* USB clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800b610:	2301      	movs	r3, #1
 800b612:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800b616:	e000      	b.n	800b61a <HAL_RCCEx_PeriphCLKConfig+0xfd2>
        break;
 800b618:	bf00      	nop
    }

    if (ret == HAL_OK)
 800b61a:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b61e:	2b00      	cmp	r3, #0
 800b620:	d10b      	bne.n	800b63a <HAL_RCCEx_PeriphCLKConfig+0xff2>
    {
      /* Set the source of USB clock*/
      __HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection);
 800b622:	4b41      	ldr	r3, [pc, #260]	@ (800b728 <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800b624:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800b626:	f423 1140 	bic.w	r1, r3, #3145728	@ 0x300000
 800b62a:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b62e:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 800b632:	4a3d      	ldr	r2, [pc, #244]	@ (800b728 <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800b634:	430b      	orrs	r3, r1
 800b636:	6553      	str	r3, [r2, #84]	@ 0x54
 800b638:	e003      	b.n	800b642 <HAL_RCCEx_PeriphCLKConfig+0xffa>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800b63a:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b63e:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }

  }

  /*------------------------------------- SDMMC Configuration ------------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SDMMC) == RCC_PERIPHCLK_SDMMC)
 800b642:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b646:	e9d3 2300 	ldrd	r2, r3, [r3]
 800b64a:	f402 3380 	and.w	r3, r2, #65536	@ 0x10000
 800b64e:	66bb      	str	r3, [r7, #104]	@ 0x68
 800b650:	2300      	movs	r3, #0
 800b652:	66fb      	str	r3, [r7, #108]	@ 0x6c
 800b654:	e9d7 121a 	ldrd	r1, r2, [r7, #104]	@ 0x68
 800b658:	460b      	mov	r3, r1
 800b65a:	4313      	orrs	r3, r2
 800b65c:	d031      	beq.n	800b6c2 <HAL_RCCEx_PeriphCLKConfig+0x107a>
  {
    /* Check the parameters */
    assert_param(IS_RCC_SDMMC(PeriphClkInit->SdmmcClockSelection));

    switch (PeriphClkInit->SdmmcClockSelection)
 800b65e:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b662:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800b664:	2b00      	cmp	r3, #0
 800b666:	d003      	beq.n	800b670 <HAL_RCCEx_PeriphCLKConfig+0x1028>
 800b668:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 800b66c:	d007      	beq.n	800b67e <HAL_RCCEx_PeriphCLKConfig+0x1036>
 800b66e:	e011      	b.n	800b694 <HAL_RCCEx_PeriphCLKConfig+0x104c>
    {
      case RCC_SDMMCCLKSOURCE_PLL:      /* PLL is used as clock source for SDMMC*/
        /* Enable SDMMC Clock output generated form System PLL . */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
 800b670:	4b2d      	ldr	r3, [pc, #180]	@ (800b728 <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800b672:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800b674:	4a2c      	ldr	r2, [pc, #176]	@ (800b728 <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800b676:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800b67a:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* SDMMC clock source configuration done later after clock selection check */
        break;
 800b67c:	e00e      	b.n	800b69c <HAL_RCCEx_PeriphCLKConfig+0x1054>

      case RCC_SDMMCCLKSOURCE_PLL2: /* PLL2 is used as clock source for SDMMC*/

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_R_UPDATE);
 800b67e:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b682:	3308      	adds	r3, #8
 800b684:	2102      	movs	r1, #2
 800b686:	4618      	mov	r0, r3
 800b688:	f000 fc8a 	bl	800bfa0 <RCCEx_PLL2_Config>
 800b68c:	4603      	mov	r3, r0
 800b68e:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SDMMC clock source configuration done later after clock selection check */
        break;
 800b692:	e003      	b.n	800b69c <HAL_RCCEx_PeriphCLKConfig+0x1054>

      default:
        ret = HAL_ERROR;
 800b694:	2301      	movs	r3, #1
 800b696:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800b69a:	bf00      	nop
    }

    if (ret == HAL_OK)
 800b69c:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b6a0:	2b00      	cmp	r3, #0
 800b6a2:	d10a      	bne.n	800b6ba <HAL_RCCEx_PeriphCLKConfig+0x1072>
    {
      /* Set the source of SDMMC clock*/
      __HAL_RCC_SDMMC_CONFIG(PeriphClkInit->SdmmcClockSelection);
 800b6a4:	4b20      	ldr	r3, [pc, #128]	@ (800b728 <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800b6a6:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 800b6a8:	f423 3180 	bic.w	r1, r3, #65536	@ 0x10000
 800b6ac:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b6b0:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800b6b2:	4a1d      	ldr	r2, [pc, #116]	@ (800b728 <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800b6b4:	430b      	orrs	r3, r1
 800b6b6:	64d3      	str	r3, [r2, #76]	@ 0x4c
 800b6b8:	e003      	b.n	800b6c2 <HAL_RCCEx_PeriphCLKConfig+0x107a>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800b6ba:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b6be:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }
#endif /* LTDC */

  /*------------------------------ RNG Configuration -------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RNG) == RCC_PERIPHCLK_RNG)
 800b6c2:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b6c6:	e9d3 2300 	ldrd	r2, r3, [r3]
 800b6ca:	f402 3300 	and.w	r3, r2, #131072	@ 0x20000
 800b6ce:	663b      	str	r3, [r7, #96]	@ 0x60
 800b6d0:	2300      	movs	r3, #0
 800b6d2:	667b      	str	r3, [r7, #100]	@ 0x64
 800b6d4:	e9d7 1218 	ldrd	r1, r2, [r7, #96]	@ 0x60
 800b6d8:	460b      	mov	r3, r1
 800b6da:	4313      	orrs	r3, r2
 800b6dc:	d03b      	beq.n	800b756 <HAL_RCCEx_PeriphCLKConfig+0x110e>
  {

    switch (PeriphClkInit->RngClockSelection)
 800b6de:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b6e2:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800b6e6:	f5b3 7f40 	cmp.w	r3, #768	@ 0x300
 800b6ea:	d018      	beq.n	800b71e <HAL_RCCEx_PeriphCLKConfig+0x10d6>
 800b6ec:	f5b3 7f40 	cmp.w	r3, #768	@ 0x300
 800b6f0:	d811      	bhi.n	800b716 <HAL_RCCEx_PeriphCLKConfig+0x10ce>
 800b6f2:	f5b3 7f00 	cmp.w	r3, #512	@ 0x200
 800b6f6:	d014      	beq.n	800b722 <HAL_RCCEx_PeriphCLKConfig+0x10da>
 800b6f8:	f5b3 7f00 	cmp.w	r3, #512	@ 0x200
 800b6fc:	d80b      	bhi.n	800b716 <HAL_RCCEx_PeriphCLKConfig+0x10ce>
 800b6fe:	2b00      	cmp	r3, #0
 800b700:	d014      	beq.n	800b72c <HAL_RCCEx_PeriphCLKConfig+0x10e4>
 800b702:	f5b3 7f80 	cmp.w	r3, #256	@ 0x100
 800b706:	d106      	bne.n	800b716 <HAL_RCCEx_PeriphCLKConfig+0x10ce>
    {
      case RCC_RNGCLKSOURCE_PLL:     /* PLL is used as clock source for RNG*/
        /* Enable RNG Clock output generated form System RNG . */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
 800b708:	4b07      	ldr	r3, [pc, #28]	@ (800b728 <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800b70a:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800b70c:	4a06      	ldr	r2, [pc, #24]	@ (800b728 <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800b70e:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800b712:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* RNG clock source configuration done later after clock selection check */
        break;
 800b714:	e00b      	b.n	800b72e <HAL_RCCEx_PeriphCLKConfig+0x10e6>
        /* HSI48 oscillator is used as source of RNG clock */
        /* RNG clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800b716:	2301      	movs	r3, #1
 800b718:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800b71c:	e007      	b.n	800b72e <HAL_RCCEx_PeriphCLKConfig+0x10e6>
        break;
 800b71e:	bf00      	nop
 800b720:	e005      	b.n	800b72e <HAL_RCCEx_PeriphCLKConfig+0x10e6>
        break;
 800b722:	bf00      	nop
 800b724:	e003      	b.n	800b72e <HAL_RCCEx_PeriphCLKConfig+0x10e6>
 800b726:	bf00      	nop
 800b728:	58024400 	.word	0x58024400
        break;
 800b72c:	bf00      	nop
    }

    if (ret == HAL_OK)
 800b72e:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b732:	2b00      	cmp	r3, #0
 800b734:	d10b      	bne.n	800b74e <HAL_RCCEx_PeriphCLKConfig+0x1106>
    {
      /* Set the source of RNG clock*/
      __HAL_RCC_RNG_CONFIG(PeriphClkInit->RngClockSelection);
 800b736:	4bba      	ldr	r3, [pc, #744]	@ (800ba20 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800b738:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800b73a:	f423 7140 	bic.w	r1, r3, #768	@ 0x300
 800b73e:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b742:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800b746:	4ab6      	ldr	r2, [pc, #728]	@ (800ba20 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800b748:	430b      	orrs	r3, r1
 800b74a:	6553      	str	r3, [r2, #84]	@ 0x54
 800b74c:	e003      	b.n	800b756 <HAL_RCCEx_PeriphCLKConfig+0x110e>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800b74e:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b752:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }

  }

  /*------------------------------ SWPMI1 Configuration ------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SWPMI1) == RCC_PERIPHCLK_SWPMI1)
 800b756:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b75a:	e9d3 2300 	ldrd	r2, r3, [r3]
 800b75e:	f402 1380 	and.w	r3, r2, #1048576	@ 0x100000
 800b762:	65bb      	str	r3, [r7, #88]	@ 0x58
 800b764:	2300      	movs	r3, #0
 800b766:	65fb      	str	r3, [r7, #92]	@ 0x5c
 800b768:	e9d7 1216 	ldrd	r1, r2, [r7, #88]	@ 0x58
 800b76c:	460b      	mov	r3, r1
 800b76e:	4313      	orrs	r3, r2
 800b770:	d009      	beq.n	800b786 <HAL_RCCEx_PeriphCLKConfig+0x113e>
  {
    /* Check the parameters */
    assert_param(IS_RCC_SWPMI1CLKSOURCE(PeriphClkInit->Swpmi1ClockSelection));

    /* Configure the SWPMI1 interface clock source */
    __HAL_RCC_SWPMI1_CONFIG(PeriphClkInit->Swpmi1ClockSelection);
 800b772:	4bab      	ldr	r3, [pc, #684]	@ (800ba20 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800b774:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800b776:	f023 4100 	bic.w	r1, r3, #2147483648	@ 0x80000000
 800b77a:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b77e:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 800b780:	4aa7      	ldr	r2, [pc, #668]	@ (800ba20 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800b782:	430b      	orrs	r3, r1
 800b784:	6513      	str	r3, [r2, #80]	@ 0x50
  }
#if defined(HRTIM1)
  /*------------------------------ HRTIM1 clock Configuration ----------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_HRTIM1) == RCC_PERIPHCLK_HRTIM1)
 800b786:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b78a:	e9d3 2300 	ldrd	r2, r3, [r3]
 800b78e:	f002 5380 	and.w	r3, r2, #268435456	@ 0x10000000
 800b792:	653b      	str	r3, [r7, #80]	@ 0x50
 800b794:	2300      	movs	r3, #0
 800b796:	657b      	str	r3, [r7, #84]	@ 0x54
 800b798:	e9d7 1214 	ldrd	r1, r2, [r7, #80]	@ 0x50
 800b79c:	460b      	mov	r3, r1
 800b79e:	4313      	orrs	r3, r2
 800b7a0:	d00a      	beq.n	800b7b8 <HAL_RCCEx_PeriphCLKConfig+0x1170>
  {
    /* Check the parameters */
    assert_param(IS_RCC_HRTIM1CLKSOURCE(PeriphClkInit->Hrtim1ClockSelection));

    /* Configure the HRTIM1 clock source */
    __HAL_RCC_HRTIM1_CONFIG(PeriphClkInit->Hrtim1ClockSelection);
 800b7a2:	4b9f      	ldr	r3, [pc, #636]	@ (800ba20 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800b7a4:	691b      	ldr	r3, [r3, #16]
 800b7a6:	f423 4180 	bic.w	r1, r3, #16384	@ 0x4000
 800b7aa:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b7ae:	f8d3 30b8 	ldr.w	r3, [r3, #184]	@ 0xb8
 800b7b2:	4a9b      	ldr	r2, [pc, #620]	@ (800ba20 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800b7b4:	430b      	orrs	r3, r1
 800b7b6:	6113      	str	r3, [r2, #16]
  }
#endif  /*HRTIM1*/
  /*------------------------------ DFSDM1 Configuration ------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_DFSDM1) == RCC_PERIPHCLK_DFSDM1)
 800b7b8:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b7bc:	e9d3 2300 	ldrd	r2, r3, [r3]
 800b7c0:	f402 1300 	and.w	r3, r2, #2097152	@ 0x200000
 800b7c4:	64bb      	str	r3, [r7, #72]	@ 0x48
 800b7c6:	2300      	movs	r3, #0
 800b7c8:	64fb      	str	r3, [r7, #76]	@ 0x4c
 800b7ca:	e9d7 1212 	ldrd	r1, r2, [r7, #72]	@ 0x48
 800b7ce:	460b      	mov	r3, r1
 800b7d0:	4313      	orrs	r3, r2
 800b7d2:	d009      	beq.n	800b7e8 <HAL_RCCEx_PeriphCLKConfig+0x11a0>
  {
    /* Check the parameters */
    assert_param(IS_RCC_DFSDM1CLKSOURCE(PeriphClkInit->Dfsdm1ClockSelection));

    /* Configure the DFSDM1 interface clock source */
    __HAL_RCC_DFSDM1_CONFIG(PeriphClkInit->Dfsdm1ClockSelection);
 800b7d4:	4b92      	ldr	r3, [pc, #584]	@ (800ba20 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800b7d6:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800b7d8:	f023 7180 	bic.w	r1, r3, #16777216	@ 0x1000000
 800b7dc:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b7e0:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 800b7e2:	4a8f      	ldr	r2, [pc, #572]	@ (800ba20 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800b7e4:	430b      	orrs	r3, r1
 800b7e6:	6513      	str	r3, [r2, #80]	@ 0x50
    __HAL_RCC_DFSDM2_CONFIG(PeriphClkInit->Dfsdm2ClockSelection);
  }
#endif  /* DFSDM2 */

  /*------------------------------------ TIM configuration --------------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM) == RCC_PERIPHCLK_TIM)
 800b7e8:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b7ec:	e9d3 2300 	ldrd	r2, r3, [r3]
 800b7f0:	f002 4380 	and.w	r3, r2, #1073741824	@ 0x40000000
 800b7f4:	643b      	str	r3, [r7, #64]	@ 0x40
 800b7f6:	2300      	movs	r3, #0
 800b7f8:	647b      	str	r3, [r7, #68]	@ 0x44
 800b7fa:	e9d7 1210 	ldrd	r1, r2, [r7, #64]	@ 0x40
 800b7fe:	460b      	mov	r3, r1
 800b800:	4313      	orrs	r3, r2
 800b802:	d00e      	beq.n	800b822 <HAL_RCCEx_PeriphCLKConfig+0x11da>
  {
    /* Check the parameters */
    assert_param(IS_RCC_TIMPRES(PeriphClkInit->TIMPresSelection));

    /* Configure Timer Prescaler */
    __HAL_RCC_TIMCLKPRESCALER(PeriphClkInit->TIMPresSelection);
 800b804:	4b86      	ldr	r3, [pc, #536]	@ (800ba20 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800b806:	691b      	ldr	r3, [r3, #16]
 800b808:	4a85      	ldr	r2, [pc, #532]	@ (800ba20 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800b80a:	f423 4300 	bic.w	r3, r3, #32768	@ 0x8000
 800b80e:	6113      	str	r3, [r2, #16]
 800b810:	4b83      	ldr	r3, [pc, #524]	@ (800ba20 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800b812:	6919      	ldr	r1, [r3, #16]
 800b814:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b818:	f8d3 30bc 	ldr.w	r3, [r3, #188]	@ 0xbc
 800b81c:	4a80      	ldr	r2, [pc, #512]	@ (800ba20 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800b81e:	430b      	orrs	r3, r1
 800b820:	6113      	str	r3, [r2, #16]
  }

  /*------------------------------------ CKPER configuration --------------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CKPER) == RCC_PERIPHCLK_CKPER)
 800b822:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b826:	e9d3 2300 	ldrd	r2, r3, [r3]
 800b82a:	f002 4300 	and.w	r3, r2, #2147483648	@ 0x80000000
 800b82e:	63bb      	str	r3, [r7, #56]	@ 0x38
 800b830:	2300      	movs	r3, #0
 800b832:	63fb      	str	r3, [r7, #60]	@ 0x3c
 800b834:	e9d7 120e 	ldrd	r1, r2, [r7, #56]	@ 0x38
 800b838:	460b      	mov	r3, r1
 800b83a:	4313      	orrs	r3, r2
 800b83c:	d009      	beq.n	800b852 <HAL_RCCEx_PeriphCLKConfig+0x120a>
  {
    /* Check the parameters */
    assert_param(IS_RCC_CLKPSOURCE(PeriphClkInit->CkperClockSelection));

    /* Configure the CKPER clock source */
    __HAL_RCC_CLKP_CONFIG(PeriphClkInit->CkperClockSelection);
 800b83e:	4b78      	ldr	r3, [pc, #480]	@ (800ba20 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800b840:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 800b842:	f023 5140 	bic.w	r1, r3, #805306368	@ 0x30000000
 800b846:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b84a:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800b84c:	4a74      	ldr	r2, [pc, #464]	@ (800ba20 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800b84e:	430b      	orrs	r3, r1
 800b850:	64d3      	str	r3, [r2, #76]	@ 0x4c
  }

  /*------------------------------ CEC Configuration ------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CEC) == RCC_PERIPHCLK_CEC)
 800b852:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b856:	e9d3 2300 	ldrd	r2, r3, [r3]
 800b85a:	f402 0300 	and.w	r3, r2, #8388608	@ 0x800000
 800b85e:	633b      	str	r3, [r7, #48]	@ 0x30
 800b860:	2300      	movs	r3, #0
 800b862:	637b      	str	r3, [r7, #52]	@ 0x34
 800b864:	e9d7 120c 	ldrd	r1, r2, [r7, #48]	@ 0x30
 800b868:	460b      	mov	r3, r1
 800b86a:	4313      	orrs	r3, r2
 800b86c:	d00a      	beq.n	800b884 <HAL_RCCEx_PeriphCLKConfig+0x123c>
  {
    /* Check the parameters */
    assert_param(IS_RCC_CECCLKSOURCE(PeriphClkInit->CecClockSelection));

    /* Configure the CEC interface clock source */
    __HAL_RCC_CEC_CONFIG(PeriphClkInit->CecClockSelection);
 800b86e:	4b6c      	ldr	r3, [pc, #432]	@ (800ba20 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800b870:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800b872:	f423 0140 	bic.w	r1, r3, #12582912	@ 0xc00000
 800b876:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b87a:	f8d3 308c 	ldr.w	r3, [r3, #140]	@ 0x8c
 800b87e:	4a68      	ldr	r2, [pc, #416]	@ (800ba20 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800b880:	430b      	orrs	r3, r1
 800b882:	6553      	str	r3, [r2, #84]	@ 0x54
  }

  /*---------------------------- PLL2 configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_PLL2_DIVP) == RCC_PERIPHCLK_PLL2_DIVP)
 800b884:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b888:	e9d3 2300 	ldrd	r2, r3, [r3]
 800b88c:	2100      	movs	r1, #0
 800b88e:	62b9      	str	r1, [r7, #40]	@ 0x28
 800b890:	f003 0301 	and.w	r3, r3, #1
 800b894:	62fb      	str	r3, [r7, #44]	@ 0x2c
 800b896:	e9d7 120a 	ldrd	r1, r2, [r7, #40]	@ 0x28
 800b89a:	460b      	mov	r3, r1
 800b89c:	4313      	orrs	r3, r2
 800b89e:	d011      	beq.n	800b8c4 <HAL_RCCEx_PeriphCLKConfig+0x127c>
  {
    ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
 800b8a0:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b8a4:	3308      	adds	r3, #8
 800b8a6:	2100      	movs	r1, #0
 800b8a8:	4618      	mov	r0, r3
 800b8aa:	f000 fb79 	bl	800bfa0 <RCCEx_PLL2_Config>
 800b8ae:	4603      	mov	r3, r0
 800b8b0:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
    
    if (ret == HAL_OK)
 800b8b4:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b8b8:	2b00      	cmp	r3, #0
 800b8ba:	d003      	beq.n	800b8c4 <HAL_RCCEx_PeriphCLKConfig+0x127c>
      /*Nothing to do*/
    }
    else
    {
      /* set overall return value */
      status = ret;
 800b8bc:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b8c0:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    } 
  }
  
  
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_PLL2_DIVQ) == RCC_PERIPHCLK_PLL2_DIVQ)
 800b8c4:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b8c8:	e9d3 2300 	ldrd	r2, r3, [r3]
 800b8cc:	2100      	movs	r1, #0
 800b8ce:	6239      	str	r1, [r7, #32]
 800b8d0:	f003 0302 	and.w	r3, r3, #2
 800b8d4:	627b      	str	r3, [r7, #36]	@ 0x24
 800b8d6:	e9d7 1208 	ldrd	r1, r2, [r7, #32]
 800b8da:	460b      	mov	r3, r1
 800b8dc:	4313      	orrs	r3, r2
 800b8de:	d011      	beq.n	800b904 <HAL_RCCEx_PeriphCLKConfig+0x12bc>
  {
    ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_Q_UPDATE);
 800b8e0:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b8e4:	3308      	adds	r3, #8
 800b8e6:	2101      	movs	r1, #1
 800b8e8:	4618      	mov	r0, r3
 800b8ea:	f000 fb59 	bl	800bfa0 <RCCEx_PLL2_Config>
 800b8ee:	4603      	mov	r3, r0
 800b8f0:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
    
    if (ret == HAL_OK)
 800b8f4:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b8f8:	2b00      	cmp	r3, #0
 800b8fa:	d003      	beq.n	800b904 <HAL_RCCEx_PeriphCLKConfig+0x12bc>
      /*Nothing to do*/
    }
    else
    {
      /* set overall return value */
      status = ret;
 800b8fc:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b900:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }
  
  
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_PLL2_DIVR) == RCC_PERIPHCLK_PLL2_DIVR)
 800b904:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b908:	e9d3 2300 	ldrd	r2, r3, [r3]
 800b90c:	2100      	movs	r1, #0
 800b90e:	61b9      	str	r1, [r7, #24]
 800b910:	f003 0304 	and.w	r3, r3, #4
 800b914:	61fb      	str	r3, [r7, #28]
 800b916:	e9d7 1206 	ldrd	r1, r2, [r7, #24]
 800b91a:	460b      	mov	r3, r1
 800b91c:	4313      	orrs	r3, r2
 800b91e:	d011      	beq.n	800b944 <HAL_RCCEx_PeriphCLKConfig+0x12fc>
  {
    ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_R_UPDATE);
 800b920:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b924:	3308      	adds	r3, #8
 800b926:	2102      	movs	r1, #2
 800b928:	4618      	mov	r0, r3
 800b92a:	f000 fb39 	bl	800bfa0 <RCCEx_PLL2_Config>
 800b92e:	4603      	mov	r3, r0
 800b930:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
    
    if (ret == HAL_OK)
 800b934:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b938:	2b00      	cmp	r3, #0
 800b93a:	d003      	beq.n	800b944 <HAL_RCCEx_PeriphCLKConfig+0x12fc>
      /*Nothing to do*/
    }
    else
    {
      /* set overall return value */
      status = ret;
 800b93c:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b940:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }
  

  /*---------------------------- PLL3 configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_PLL3_DIVP) == RCC_PERIPHCLK_PLL3_DIVP)
 800b944:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b948:	e9d3 2300 	ldrd	r2, r3, [r3]
 800b94c:	2100      	movs	r1, #0
 800b94e:	6139      	str	r1, [r7, #16]
 800b950:	f003 0308 	and.w	r3, r3, #8
 800b954:	617b      	str	r3, [r7, #20]
 800b956:	e9d7 1204 	ldrd	r1, r2, [r7, #16]
 800b95a:	460b      	mov	r3, r1
 800b95c:	4313      	orrs	r3, r2
 800b95e:	d011      	beq.n	800b984 <HAL_RCCEx_PeriphCLKConfig+0x133c>
  {
    ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_P_UPDATE);
 800b960:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b964:	3328      	adds	r3, #40	@ 0x28
 800b966:	2100      	movs	r1, #0
 800b968:	4618      	mov	r0, r3
 800b96a:	f000 fbcb 	bl	800c104 <RCCEx_PLL3_Config>
 800b96e:	4603      	mov	r3, r0
 800b970:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
  
    if (ret == HAL_OK)
 800b974:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b978:	2b00      	cmp	r3, #0
 800b97a:	d003      	beq.n	800b984 <HAL_RCCEx_PeriphCLKConfig+0x133c>
      /*Nothing to do*/
    }
    else
    {
      /* set overall return value */
      status = ret;
 800b97c:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b980:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }
  
  
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_PLL3_DIVQ) == RCC_PERIPHCLK_PLL3_DIVQ)
 800b984:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b988:	e9d3 2300 	ldrd	r2, r3, [r3]
 800b98c:	2100      	movs	r1, #0
 800b98e:	60b9      	str	r1, [r7, #8]
 800b990:	f003 0310 	and.w	r3, r3, #16
 800b994:	60fb      	str	r3, [r7, #12]
 800b996:	e9d7 1202 	ldrd	r1, r2, [r7, #8]
 800b99a:	460b      	mov	r3, r1
 800b99c:	4313      	orrs	r3, r2
 800b99e:	d011      	beq.n	800b9c4 <HAL_RCCEx_PeriphCLKConfig+0x137c>
  {
    ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_Q_UPDATE);
 800b9a0:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b9a4:	3328      	adds	r3, #40	@ 0x28
 800b9a6:	2101      	movs	r1, #1
 800b9a8:	4618      	mov	r0, r3
 800b9aa:	f000 fbab 	bl	800c104 <RCCEx_PLL3_Config>
 800b9ae:	4603      	mov	r3, r0
 800b9b0:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
    
    if (ret == HAL_OK)
 800b9b4:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b9b8:	2b00      	cmp	r3, #0
 800b9ba:	d003      	beq.n	800b9c4 <HAL_RCCEx_PeriphCLKConfig+0x137c>
      /*Nothing to do*/
    }
    else
    {
      /* set overall return value */
      status = ret;
 800b9bc:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b9c0:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }
  
  
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_PLL3_DIVR) == RCC_PERIPHCLK_PLL3_DIVR)
 800b9c4:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b9c8:	e9d3 2300 	ldrd	r2, r3, [r3]
 800b9cc:	2100      	movs	r1, #0
 800b9ce:	6039      	str	r1, [r7, #0]
 800b9d0:	f003 0320 	and.w	r3, r3, #32
 800b9d4:	607b      	str	r3, [r7, #4]
 800b9d6:	e9d7 1200 	ldrd	r1, r2, [r7]
 800b9da:	460b      	mov	r3, r1
 800b9dc:	4313      	orrs	r3, r2
 800b9de:	d011      	beq.n	800ba04 <HAL_RCCEx_PeriphCLKConfig+0x13bc>
  {
    ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_R_UPDATE);
 800b9e0:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b9e4:	3328      	adds	r3, #40	@ 0x28
 800b9e6:	2102      	movs	r1, #2
 800b9e8:	4618      	mov	r0, r3
 800b9ea:	f000 fb8b 	bl	800c104 <RCCEx_PLL3_Config>
 800b9ee:	4603      	mov	r3, r0
 800b9f0:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
    
    if (ret == HAL_OK)
 800b9f4:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b9f8:	2b00      	cmp	r3, #0
 800b9fa:	d003      	beq.n	800ba04 <HAL_RCCEx_PeriphCLKConfig+0x13bc>
      /*Nothing to do*/
    }
    else
    {
      /* set overall return value */
      status = ret;
 800b9fc:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800ba00:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    } 
  }

  if (status == HAL_OK)
 800ba04:	f897 311e 	ldrb.w	r3, [r7, #286]	@ 0x11e
 800ba08:	2b00      	cmp	r3, #0
 800ba0a:	d101      	bne.n	800ba10 <HAL_RCCEx_PeriphCLKConfig+0x13c8>
  {
    return HAL_OK;
 800ba0c:	2300      	movs	r3, #0
 800ba0e:	e000      	b.n	800ba12 <HAL_RCCEx_PeriphCLKConfig+0x13ca>
  }
  return HAL_ERROR;
 800ba10:	2301      	movs	r3, #1
}
 800ba12:	4618      	mov	r0, r3
 800ba14:	f507 7790 	add.w	r7, r7, #288	@ 0x120
 800ba18:	46bd      	mov	sp, r7
 800ba1a:	e8bd 8fb0 	ldmia.w	sp!, {r4, r5, r7, r8, r9, sl, fp, pc}
 800ba1e:	bf00      	nop
 800ba20:	58024400 	.word	0x58024400

0800ba24 <HAL_RCCEx_GetD3PCLK1Freq>:
  * @note   Each time D3PCLK1 changes, this function must be called to update the
  *         right D3PCLK1 value. Otherwise, any configuration based on this function will be incorrect.
  * @retval D3PCLK1 frequency
  */
uint32_t HAL_RCCEx_GetD3PCLK1Freq(void)
{
 800ba24:	b580      	push	{r7, lr}
 800ba26:	af00      	add	r7, sp, #0
#if defined(RCC_D3CFGR_D3PPRE)
  /* Get HCLK source and Compute D3PCLK1 frequency ---------------------------*/
  return (HAL_RCC_GetHCLKFreq() >> (D1CorePrescTable[(RCC->D3CFGR & RCC_D3CFGR_D3PPRE) >> RCC_D3CFGR_D3PPRE_Pos] & 0x1FU));
 800ba28:	f7fe fd70 	bl	800a50c <HAL_RCC_GetHCLKFreq>
 800ba2c:	4602      	mov	r2, r0
 800ba2e:	4b06      	ldr	r3, [pc, #24]	@ (800ba48 <HAL_RCCEx_GetD3PCLK1Freq+0x24>)
 800ba30:	6a1b      	ldr	r3, [r3, #32]
 800ba32:	091b      	lsrs	r3, r3, #4
 800ba34:	f003 0307 	and.w	r3, r3, #7
 800ba38:	4904      	ldr	r1, [pc, #16]	@ (800ba4c <HAL_RCCEx_GetD3PCLK1Freq+0x28>)
 800ba3a:	5ccb      	ldrb	r3, [r1, r3]
 800ba3c:	f003 031f 	and.w	r3, r3, #31
 800ba40:	fa22 f303 	lsr.w	r3, r2, r3
#else
  /* Get HCLK source and Compute D3PCLK1 frequency ---------------------------*/
  return (HAL_RCC_GetHCLKFreq() >> (D1CorePrescTable[(RCC->SRDCFGR & RCC_SRDCFGR_SRDPPRE) >> RCC_SRDCFGR_SRDPPRE_Pos] & 0x1FU));
#endif
}
 800ba44:	4618      	mov	r0, r3
 800ba46:	bd80      	pop	{r7, pc}
 800ba48:	58024400 	.word	0x58024400
 800ba4c:	080305b8 	.word	0x080305b8

0800ba50 <HAL_RCCEx_GetPLL2ClockFreq>:
  *         right PLL2CLK value. Otherwise, any configuration based on this function will be incorrect.
  * @param  PLL2_Clocks structure.
  * @retval None
  */
void HAL_RCCEx_GetPLL2ClockFreq(PLL2_ClocksTypeDef *PLL2_Clocks)
{
 800ba50:	b480      	push	{r7}
 800ba52:	b089      	sub	sp, #36	@ 0x24
 800ba54:	af00      	add	r7, sp, #0
 800ba56:	6078      	str	r0, [r7, #4]
  float_t fracn2, pll2vco;

  /* PLL_VCO = (HSE_VALUE or HSI_VALUE or CSI_VALUE/ PLL2M) * PLL2N
     PLL2xCLK = PLL2_VCO / PLL2x
  */
  pllsource = (RCC->PLLCKSELR & RCC_PLLCKSELR_PLLSRC);
 800ba58:	4ba1      	ldr	r3, [pc, #644]	@ (800bce0 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800ba5a:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800ba5c:	f003 0303 	and.w	r3, r3, #3
 800ba60:	61bb      	str	r3, [r7, #24]
  pll2m = ((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM2) >> 12);
 800ba62:	4b9f      	ldr	r3, [pc, #636]	@ (800bce0 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800ba64:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800ba66:	0b1b      	lsrs	r3, r3, #12
 800ba68:	f003 033f 	and.w	r3, r3, #63	@ 0x3f
 800ba6c:	617b      	str	r3, [r7, #20]
  pll2fracen = (RCC->PLLCFGR & RCC_PLLCFGR_PLL2FRACEN) >> RCC_PLLCFGR_PLL2FRACEN_Pos;
 800ba6e:	4b9c      	ldr	r3, [pc, #624]	@ (800bce0 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800ba70:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800ba72:	091b      	lsrs	r3, r3, #4
 800ba74:	f003 0301 	and.w	r3, r3, #1
 800ba78:	613b      	str	r3, [r7, #16]
  fracn2 = (float_t)(uint32_t)(pll2fracen * ((RCC->PLL2FRACR & RCC_PLL2FRACR_FRACN2) >> 3));
 800ba7a:	4b99      	ldr	r3, [pc, #612]	@ (800bce0 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800ba7c:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 800ba7e:	08db      	lsrs	r3, r3, #3
 800ba80:	f3c3 030c 	ubfx	r3, r3, #0, #13
 800ba84:	693a      	ldr	r2, [r7, #16]
 800ba86:	fb02 f303 	mul.w	r3, r2, r3
 800ba8a:	ee07 3a90 	vmov	s15, r3
 800ba8e:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800ba92:	edc7 7a03 	vstr	s15, [r7, #12]

  if (pll2m != 0U)
 800ba96:	697b      	ldr	r3, [r7, #20]
 800ba98:	2b00      	cmp	r3, #0
 800ba9a:	f000 8111 	beq.w	800bcc0 <HAL_RCCEx_GetPLL2ClockFreq+0x270>
  {
    switch (pllsource)
 800ba9e:	69bb      	ldr	r3, [r7, #24]
 800baa0:	2b02      	cmp	r3, #2
 800baa2:	f000 8083 	beq.w	800bbac <HAL_RCCEx_GetPLL2ClockFreq+0x15c>
 800baa6:	69bb      	ldr	r3, [r7, #24]
 800baa8:	2b02      	cmp	r3, #2
 800baaa:	f200 80a1 	bhi.w	800bbf0 <HAL_RCCEx_GetPLL2ClockFreq+0x1a0>
 800baae:	69bb      	ldr	r3, [r7, #24]
 800bab0:	2b00      	cmp	r3, #0
 800bab2:	d003      	beq.n	800babc <HAL_RCCEx_GetPLL2ClockFreq+0x6c>
 800bab4:	69bb      	ldr	r3, [r7, #24]
 800bab6:	2b01      	cmp	r3, #1
 800bab8:	d056      	beq.n	800bb68 <HAL_RCCEx_GetPLL2ClockFreq+0x118>
 800baba:	e099      	b.n	800bbf0 <HAL_RCCEx_GetPLL2ClockFreq+0x1a0>
    {

      case RCC_PLLSOURCE_HSI:  /* HSI used as PLL clock source */

        if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
 800babc:	4b88      	ldr	r3, [pc, #544]	@ (800bce0 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800babe:	681b      	ldr	r3, [r3, #0]
 800bac0:	f003 0320 	and.w	r3, r3, #32
 800bac4:	2b00      	cmp	r3, #0
 800bac6:	d02d      	beq.n	800bb24 <HAL_RCCEx_GetPLL2ClockFreq+0xd4>
        {
          hsivalue = (HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3));
 800bac8:	4b85      	ldr	r3, [pc, #532]	@ (800bce0 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800baca:	681b      	ldr	r3, [r3, #0]
 800bacc:	08db      	lsrs	r3, r3, #3
 800bace:	f003 0303 	and.w	r3, r3, #3
 800bad2:	4a84      	ldr	r2, [pc, #528]	@ (800bce4 <HAL_RCCEx_GetPLL2ClockFreq+0x294>)
 800bad4:	fa22 f303 	lsr.w	r3, r2, r3
 800bad8:	60bb      	str	r3, [r7, #8]
          pll2vco = ((float_t)hsivalue / (float_t)pll2m) * ((float_t)(uint32_t)(RCC->PLL2DIVR & RCC_PLL2DIVR_N2) + (fracn2 / (float_t)0x2000) + (float_t)1);
 800bada:	68bb      	ldr	r3, [r7, #8]
 800badc:	ee07 3a90 	vmov	s15, r3
 800bae0:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800bae4:	697b      	ldr	r3, [r7, #20]
 800bae6:	ee07 3a90 	vmov	s15, r3
 800baea:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800baee:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800baf2:	4b7b      	ldr	r3, [pc, #492]	@ (800bce0 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800baf4:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 800baf6:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800bafa:	ee07 3a90 	vmov	s15, r3
 800bafe:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800bb02:	ed97 6a03 	vldr	s12, [r7, #12]
 800bb06:	eddf 5a78 	vldr	s11, [pc, #480]	@ 800bce8 <HAL_RCCEx_GetPLL2ClockFreq+0x298>
 800bb0a:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800bb0e:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800bb12:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800bb16:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800bb1a:	ee67 7a27 	vmul.f32	s15, s14, s15
 800bb1e:	edc7 7a07 	vstr	s15, [r7, #28]
        }
        else
        {
          pll2vco = ((float_t)HSI_VALUE / (float_t)pll2m) * ((float_t)(uint32_t)(RCC->PLL2DIVR & RCC_PLL2DIVR_N2) + (fracn2 / (float_t)0x2000) + (float_t)1);
        }
        break;
 800bb22:	e087      	b.n	800bc34 <HAL_RCCEx_GetPLL2ClockFreq+0x1e4>
          pll2vco = ((float_t)HSI_VALUE / (float_t)pll2m) * ((float_t)(uint32_t)(RCC->PLL2DIVR & RCC_PLL2DIVR_N2) + (fracn2 / (float_t)0x2000) + (float_t)1);
 800bb24:	697b      	ldr	r3, [r7, #20]
 800bb26:	ee07 3a90 	vmov	s15, r3
 800bb2a:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800bb2e:	eddf 6a6f 	vldr	s13, [pc, #444]	@ 800bcec <HAL_RCCEx_GetPLL2ClockFreq+0x29c>
 800bb32:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800bb36:	4b6a      	ldr	r3, [pc, #424]	@ (800bce0 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800bb38:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 800bb3a:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800bb3e:	ee07 3a90 	vmov	s15, r3
 800bb42:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800bb46:	ed97 6a03 	vldr	s12, [r7, #12]
 800bb4a:	eddf 5a67 	vldr	s11, [pc, #412]	@ 800bce8 <HAL_RCCEx_GetPLL2ClockFreq+0x298>
 800bb4e:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800bb52:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800bb56:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800bb5a:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800bb5e:	ee67 7a27 	vmul.f32	s15, s14, s15
 800bb62:	edc7 7a07 	vstr	s15, [r7, #28]
        break;
 800bb66:	e065      	b.n	800bc34 <HAL_RCCEx_GetPLL2ClockFreq+0x1e4>

      case RCC_PLLSOURCE_CSI:  /* CSI used as PLL clock source */
        pll2vco = ((float_t)CSI_VALUE / (float_t)pll2m) * ((float_t)(uint32_t)(RCC->PLL2DIVR & RCC_PLL2DIVR_N2) + (fracn2 / (float_t)0x2000) + (float_t)1);
 800bb68:	697b      	ldr	r3, [r7, #20]
 800bb6a:	ee07 3a90 	vmov	s15, r3
 800bb6e:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800bb72:	eddf 6a5f 	vldr	s13, [pc, #380]	@ 800bcf0 <HAL_RCCEx_GetPLL2ClockFreq+0x2a0>
 800bb76:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800bb7a:	4b59      	ldr	r3, [pc, #356]	@ (800bce0 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800bb7c:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 800bb7e:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800bb82:	ee07 3a90 	vmov	s15, r3
 800bb86:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800bb8a:	ed97 6a03 	vldr	s12, [r7, #12]
 800bb8e:	eddf 5a56 	vldr	s11, [pc, #344]	@ 800bce8 <HAL_RCCEx_GetPLL2ClockFreq+0x298>
 800bb92:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800bb96:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800bb9a:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800bb9e:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800bba2:	ee67 7a27 	vmul.f32	s15, s14, s15
 800bba6:	edc7 7a07 	vstr	s15, [r7, #28]
        break;
 800bbaa:	e043      	b.n	800bc34 <HAL_RCCEx_GetPLL2ClockFreq+0x1e4>

      case RCC_PLLSOURCE_HSE:  /* HSE used as PLL clock source */
        pll2vco = ((float_t)HSE_VALUE / (float_t)pll2m) * ((float_t)(uint32_t)(RCC->PLL2DIVR & RCC_PLL2DIVR_N2) + (fracn2 / (float_t)0x2000) + (float_t)1);
 800bbac:	697b      	ldr	r3, [r7, #20]
 800bbae:	ee07 3a90 	vmov	s15, r3
 800bbb2:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800bbb6:	eddf 6a4f 	vldr	s13, [pc, #316]	@ 800bcf4 <HAL_RCCEx_GetPLL2ClockFreq+0x2a4>
 800bbba:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800bbbe:	4b48      	ldr	r3, [pc, #288]	@ (800bce0 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800bbc0:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 800bbc2:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800bbc6:	ee07 3a90 	vmov	s15, r3
 800bbca:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800bbce:	ed97 6a03 	vldr	s12, [r7, #12]
 800bbd2:	eddf 5a45 	vldr	s11, [pc, #276]	@ 800bce8 <HAL_RCCEx_GetPLL2ClockFreq+0x298>
 800bbd6:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800bbda:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800bbde:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800bbe2:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800bbe6:	ee67 7a27 	vmul.f32	s15, s14, s15
 800bbea:	edc7 7a07 	vstr	s15, [r7, #28]
        break;
 800bbee:	e021      	b.n	800bc34 <HAL_RCCEx_GetPLL2ClockFreq+0x1e4>

      default:
        pll2vco = ((float_t)CSI_VALUE / (float_t)pll2m) * ((float_t)(uint32_t)(RCC->PLL2DIVR & RCC_PLL2DIVR_N2) + (fracn2 / (float_t)0x2000) + (float_t)1);
 800bbf0:	697b      	ldr	r3, [r7, #20]
 800bbf2:	ee07 3a90 	vmov	s15, r3
 800bbf6:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800bbfa:	eddf 6a3d 	vldr	s13, [pc, #244]	@ 800bcf0 <HAL_RCCEx_GetPLL2ClockFreq+0x2a0>
 800bbfe:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800bc02:	4b37      	ldr	r3, [pc, #220]	@ (800bce0 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800bc04:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 800bc06:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800bc0a:	ee07 3a90 	vmov	s15, r3
 800bc0e:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800bc12:	ed97 6a03 	vldr	s12, [r7, #12]
 800bc16:	eddf 5a34 	vldr	s11, [pc, #208]	@ 800bce8 <HAL_RCCEx_GetPLL2ClockFreq+0x298>
 800bc1a:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800bc1e:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800bc22:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800bc26:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800bc2a:	ee67 7a27 	vmul.f32	s15, s14, s15
 800bc2e:	edc7 7a07 	vstr	s15, [r7, #28]
        break;
 800bc32:	bf00      	nop
    }
    PLL2_Clocks->PLL2_P_Frequency = (uint32_t)(float_t)(pll2vco / ((float_t)(uint32_t)((RCC->PLL2DIVR & RCC_PLL2DIVR_P2) >> 9)  + (float_t)1)) ;
 800bc34:	4b2a      	ldr	r3, [pc, #168]	@ (800bce0 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800bc36:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 800bc38:	0a5b      	lsrs	r3, r3, #9
 800bc3a:	f003 037f 	and.w	r3, r3, #127	@ 0x7f
 800bc3e:	ee07 3a90 	vmov	s15, r3
 800bc42:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800bc46:	eeb7 7a00 	vmov.f32	s14, #112	@ 0x3f800000  1.0
 800bc4a:	ee37 7a87 	vadd.f32	s14, s15, s14
 800bc4e:	edd7 6a07 	vldr	s13, [r7, #28]
 800bc52:	eec6 7a87 	vdiv.f32	s15, s13, s14
 800bc56:	eefc 7ae7 	vcvt.u32.f32	s15, s15
 800bc5a:	ee17 2a90 	vmov	r2, s15
 800bc5e:	687b      	ldr	r3, [r7, #4]
 800bc60:	601a      	str	r2, [r3, #0]
    PLL2_Clocks->PLL2_Q_Frequency = (uint32_t)(float_t)(pll2vco / ((float_t)(uint32_t)((RCC->PLL2DIVR & RCC_PLL2DIVR_Q2) >> 16) + (float_t)1)) ;
 800bc62:	4b1f      	ldr	r3, [pc, #124]	@ (800bce0 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800bc64:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 800bc66:	0c1b      	lsrs	r3, r3, #16
 800bc68:	f003 037f 	and.w	r3, r3, #127	@ 0x7f
 800bc6c:	ee07 3a90 	vmov	s15, r3
 800bc70:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800bc74:	eeb7 7a00 	vmov.f32	s14, #112	@ 0x3f800000  1.0
 800bc78:	ee37 7a87 	vadd.f32	s14, s15, s14
 800bc7c:	edd7 6a07 	vldr	s13, [r7, #28]
 800bc80:	eec6 7a87 	vdiv.f32	s15, s13, s14
 800bc84:	eefc 7ae7 	vcvt.u32.f32	s15, s15
 800bc88:	ee17 2a90 	vmov	r2, s15
 800bc8c:	687b      	ldr	r3, [r7, #4]
 800bc8e:	605a      	str	r2, [r3, #4]
    PLL2_Clocks->PLL2_R_Frequency = (uint32_t)(float_t)(pll2vco / ((float_t)(uint32_t)((RCC->PLL2DIVR & RCC_PLL2DIVR_R2) >> 24) + (float_t)1)) ;
 800bc90:	4b13      	ldr	r3, [pc, #76]	@ (800bce0 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800bc92:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 800bc94:	0e1b      	lsrs	r3, r3, #24
 800bc96:	f003 037f 	and.w	r3, r3, #127	@ 0x7f
 800bc9a:	ee07 3a90 	vmov	s15, r3
 800bc9e:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800bca2:	eeb7 7a00 	vmov.f32	s14, #112	@ 0x3f800000  1.0
 800bca6:	ee37 7a87 	vadd.f32	s14, s15, s14
 800bcaa:	edd7 6a07 	vldr	s13, [r7, #28]
 800bcae:	eec6 7a87 	vdiv.f32	s15, s13, s14
 800bcb2:	eefc 7ae7 	vcvt.u32.f32	s15, s15
 800bcb6:	ee17 2a90 	vmov	r2, s15
 800bcba:	687b      	ldr	r3, [r7, #4]
 800bcbc:	609a      	str	r2, [r3, #8]
  {
    PLL2_Clocks->PLL2_P_Frequency = 0U;
    PLL2_Clocks->PLL2_Q_Frequency = 0U;
    PLL2_Clocks->PLL2_R_Frequency = 0U;
  }
}
 800bcbe:	e008      	b.n	800bcd2 <HAL_RCCEx_GetPLL2ClockFreq+0x282>
    PLL2_Clocks->PLL2_P_Frequency = 0U;
 800bcc0:	687b      	ldr	r3, [r7, #4]
 800bcc2:	2200      	movs	r2, #0
 800bcc4:	601a      	str	r2, [r3, #0]
    PLL2_Clocks->PLL2_Q_Frequency = 0U;
 800bcc6:	687b      	ldr	r3, [r7, #4]
 800bcc8:	2200      	movs	r2, #0
 800bcca:	605a      	str	r2, [r3, #4]
    PLL2_Clocks->PLL2_R_Frequency = 0U;
 800bccc:	687b      	ldr	r3, [r7, #4]
 800bcce:	2200      	movs	r2, #0
 800bcd0:	609a      	str	r2, [r3, #8]
}
 800bcd2:	bf00      	nop
 800bcd4:	3724      	adds	r7, #36	@ 0x24
 800bcd6:	46bd      	mov	sp, r7
 800bcd8:	f85d 7b04 	ldr.w	r7, [sp], #4
 800bcdc:	4770      	bx	lr
 800bcde:	bf00      	nop
 800bce0:	58024400 	.word	0x58024400
 800bce4:	03d09000 	.word	0x03d09000
 800bce8:	46000000 	.word	0x46000000
 800bcec:	4c742400 	.word	0x4c742400
 800bcf0:	4a742400 	.word	0x4a742400
 800bcf4:	4bbebc20 	.word	0x4bbebc20

0800bcf8 <HAL_RCCEx_GetPLL3ClockFreq>:
  *         right PLL3CLK value. Otherwise, any configuration based on this function will be incorrect.
  * @param  PLL3_Clocks structure.
  * @retval None
  */
void HAL_RCCEx_GetPLL3ClockFreq(PLL3_ClocksTypeDef *PLL3_Clocks)
{
 800bcf8:	b480      	push	{r7}
 800bcfa:	b089      	sub	sp, #36	@ 0x24
 800bcfc:	af00      	add	r7, sp, #0
 800bcfe:	6078      	str	r0, [r7, #4]
  float_t fracn3, pll3vco;

  /* PLL3_VCO = (HSE_VALUE or HSI_VALUE or CSI_VALUE/ PLL3M) * PLL3N
     PLL3xCLK = PLL3_VCO / PLLxR
  */
  pllsource = (RCC->PLLCKSELR & RCC_PLLCKSELR_PLLSRC);
 800bd00:	4ba1      	ldr	r3, [pc, #644]	@ (800bf88 <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800bd02:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800bd04:	f003 0303 	and.w	r3, r3, #3
 800bd08:	61bb      	str	r3, [r7, #24]
  pll3m = ((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM3) >> 20)  ;
 800bd0a:	4b9f      	ldr	r3, [pc, #636]	@ (800bf88 <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800bd0c:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800bd0e:	0d1b      	lsrs	r3, r3, #20
 800bd10:	f003 033f 	and.w	r3, r3, #63	@ 0x3f
 800bd14:	617b      	str	r3, [r7, #20]
  pll3fracen = (RCC->PLLCFGR & RCC_PLLCFGR_PLL3FRACEN) >> RCC_PLLCFGR_PLL3FRACEN_Pos;
 800bd16:	4b9c      	ldr	r3, [pc, #624]	@ (800bf88 <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800bd18:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800bd1a:	0a1b      	lsrs	r3, r3, #8
 800bd1c:	f003 0301 	and.w	r3, r3, #1
 800bd20:	613b      	str	r3, [r7, #16]
  fracn3 = (float_t)(uint32_t)(pll3fracen * ((RCC->PLL3FRACR & RCC_PLL3FRACR_FRACN3) >> 3));
 800bd22:	4b99      	ldr	r3, [pc, #612]	@ (800bf88 <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800bd24:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 800bd26:	08db      	lsrs	r3, r3, #3
 800bd28:	f3c3 030c 	ubfx	r3, r3, #0, #13
 800bd2c:	693a      	ldr	r2, [r7, #16]
 800bd2e:	fb02 f303 	mul.w	r3, r2, r3
 800bd32:	ee07 3a90 	vmov	s15, r3
 800bd36:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800bd3a:	edc7 7a03 	vstr	s15, [r7, #12]

  if (pll3m != 0U)
 800bd3e:	697b      	ldr	r3, [r7, #20]
 800bd40:	2b00      	cmp	r3, #0
 800bd42:	f000 8111 	beq.w	800bf68 <HAL_RCCEx_GetPLL3ClockFreq+0x270>
  {
    switch (pllsource)
 800bd46:	69bb      	ldr	r3, [r7, #24]
 800bd48:	2b02      	cmp	r3, #2
 800bd4a:	f000 8083 	beq.w	800be54 <HAL_RCCEx_GetPLL3ClockFreq+0x15c>
 800bd4e:	69bb      	ldr	r3, [r7, #24]
 800bd50:	2b02      	cmp	r3, #2
 800bd52:	f200 80a1 	bhi.w	800be98 <HAL_RCCEx_GetPLL3ClockFreq+0x1a0>
 800bd56:	69bb      	ldr	r3, [r7, #24]
 800bd58:	2b00      	cmp	r3, #0
 800bd5a:	d003      	beq.n	800bd64 <HAL_RCCEx_GetPLL3ClockFreq+0x6c>
 800bd5c:	69bb      	ldr	r3, [r7, #24]
 800bd5e:	2b01      	cmp	r3, #1
 800bd60:	d056      	beq.n	800be10 <HAL_RCCEx_GetPLL3ClockFreq+0x118>
 800bd62:	e099      	b.n	800be98 <HAL_RCCEx_GetPLL3ClockFreq+0x1a0>
    {
      case RCC_PLLSOURCE_HSI:  /* HSI used as PLL clock source */

        if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
 800bd64:	4b88      	ldr	r3, [pc, #544]	@ (800bf88 <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800bd66:	681b      	ldr	r3, [r3, #0]
 800bd68:	f003 0320 	and.w	r3, r3, #32
 800bd6c:	2b00      	cmp	r3, #0
 800bd6e:	d02d      	beq.n	800bdcc <HAL_RCCEx_GetPLL3ClockFreq+0xd4>
        {
          hsivalue = (HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3));
 800bd70:	4b85      	ldr	r3, [pc, #532]	@ (800bf88 <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800bd72:	681b      	ldr	r3, [r3, #0]
 800bd74:	08db      	lsrs	r3, r3, #3
 800bd76:	f003 0303 	and.w	r3, r3, #3
 800bd7a:	4a84      	ldr	r2, [pc, #528]	@ (800bf8c <HAL_RCCEx_GetPLL3ClockFreq+0x294>)
 800bd7c:	fa22 f303 	lsr.w	r3, r2, r3
 800bd80:	60bb      	str	r3, [r7, #8]
          pll3vco = ((float_t)hsivalue / (float_t)pll3m) * ((float_t)(uint32_t)(RCC->PLL3DIVR & RCC_PLL3DIVR_N3) + (fracn3 / (float_t)0x2000) + (float_t)1);
 800bd82:	68bb      	ldr	r3, [r7, #8]
 800bd84:	ee07 3a90 	vmov	s15, r3
 800bd88:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800bd8c:	697b      	ldr	r3, [r7, #20]
 800bd8e:	ee07 3a90 	vmov	s15, r3
 800bd92:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800bd96:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800bd9a:	4b7b      	ldr	r3, [pc, #492]	@ (800bf88 <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800bd9c:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 800bd9e:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800bda2:	ee07 3a90 	vmov	s15, r3
 800bda6:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800bdaa:	ed97 6a03 	vldr	s12, [r7, #12]
 800bdae:	eddf 5a78 	vldr	s11, [pc, #480]	@ 800bf90 <HAL_RCCEx_GetPLL3ClockFreq+0x298>
 800bdb2:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800bdb6:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800bdba:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800bdbe:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800bdc2:	ee67 7a27 	vmul.f32	s15, s14, s15
 800bdc6:	edc7 7a07 	vstr	s15, [r7, #28]
        }
        else
        {
          pll3vco = ((float_t)HSI_VALUE / (float_t)pll3m) * ((float_t)(uint32_t)(RCC->PLL3DIVR & RCC_PLL3DIVR_N3) + (fracn3 / (float_t)0x2000) + (float_t)1);
        }
        break;
 800bdca:	e087      	b.n	800bedc <HAL_RCCEx_GetPLL3ClockFreq+0x1e4>
          pll3vco = ((float_t)HSI_VALUE / (float_t)pll3m) * ((float_t)(uint32_t)(RCC->PLL3DIVR & RCC_PLL3DIVR_N3) + (fracn3 / (float_t)0x2000) + (float_t)1);
 800bdcc:	697b      	ldr	r3, [r7, #20]
 800bdce:	ee07 3a90 	vmov	s15, r3
 800bdd2:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800bdd6:	eddf 6a6f 	vldr	s13, [pc, #444]	@ 800bf94 <HAL_RCCEx_GetPLL3ClockFreq+0x29c>
 800bdda:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800bdde:	4b6a      	ldr	r3, [pc, #424]	@ (800bf88 <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800bde0:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 800bde2:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800bde6:	ee07 3a90 	vmov	s15, r3
 800bdea:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800bdee:	ed97 6a03 	vldr	s12, [r7, #12]
 800bdf2:	eddf 5a67 	vldr	s11, [pc, #412]	@ 800bf90 <HAL_RCCEx_GetPLL3ClockFreq+0x298>
 800bdf6:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800bdfa:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800bdfe:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800be02:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800be06:	ee67 7a27 	vmul.f32	s15, s14, s15
 800be0a:	edc7 7a07 	vstr	s15, [r7, #28]
        break;
 800be0e:	e065      	b.n	800bedc <HAL_RCCEx_GetPLL3ClockFreq+0x1e4>
      case RCC_PLLSOURCE_CSI:  /* CSI used as PLL clock source */
        pll3vco = ((float_t)CSI_VALUE / (float_t)pll3m) * ((float_t)(uint32_t)(RCC->PLL3DIVR & RCC_PLL3DIVR_N3) + (fracn3 / (float_t)0x2000) + (float_t)1);
 800be10:	697b      	ldr	r3, [r7, #20]
 800be12:	ee07 3a90 	vmov	s15, r3
 800be16:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800be1a:	eddf 6a5f 	vldr	s13, [pc, #380]	@ 800bf98 <HAL_RCCEx_GetPLL3ClockFreq+0x2a0>
 800be1e:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800be22:	4b59      	ldr	r3, [pc, #356]	@ (800bf88 <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800be24:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 800be26:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800be2a:	ee07 3a90 	vmov	s15, r3
 800be2e:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800be32:	ed97 6a03 	vldr	s12, [r7, #12]
 800be36:	eddf 5a56 	vldr	s11, [pc, #344]	@ 800bf90 <HAL_RCCEx_GetPLL3ClockFreq+0x298>
 800be3a:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800be3e:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800be42:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800be46:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800be4a:	ee67 7a27 	vmul.f32	s15, s14, s15
 800be4e:	edc7 7a07 	vstr	s15, [r7, #28]
        break;
 800be52:	e043      	b.n	800bedc <HAL_RCCEx_GetPLL3ClockFreq+0x1e4>

      case RCC_PLLSOURCE_HSE:  /* HSE used as PLL clock source */
        pll3vco = ((float_t)HSE_VALUE / (float_t)pll3m) * ((float_t)(uint32_t)(RCC->PLL3DIVR & RCC_PLL3DIVR_N3) + (fracn3 / (float_t)0x2000) + (float_t)1);
 800be54:	697b      	ldr	r3, [r7, #20]
 800be56:	ee07 3a90 	vmov	s15, r3
 800be5a:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800be5e:	eddf 6a4f 	vldr	s13, [pc, #316]	@ 800bf9c <HAL_RCCEx_GetPLL3ClockFreq+0x2a4>
 800be62:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800be66:	4b48      	ldr	r3, [pc, #288]	@ (800bf88 <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800be68:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 800be6a:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800be6e:	ee07 3a90 	vmov	s15, r3
 800be72:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800be76:	ed97 6a03 	vldr	s12, [r7, #12]
 800be7a:	eddf 5a45 	vldr	s11, [pc, #276]	@ 800bf90 <HAL_RCCEx_GetPLL3ClockFreq+0x298>
 800be7e:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800be82:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800be86:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800be8a:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800be8e:	ee67 7a27 	vmul.f32	s15, s14, s15
 800be92:	edc7 7a07 	vstr	s15, [r7, #28]
        break;
 800be96:	e021      	b.n	800bedc <HAL_RCCEx_GetPLL3ClockFreq+0x1e4>

      default:
        pll3vco = ((float_t)CSI_VALUE / (float_t)pll3m) * ((float_t)(uint32_t)(RCC->PLL3DIVR & RCC_PLL3DIVR_N3) + (fracn3 / (float_t)0x2000) + (float_t)1);
 800be98:	697b      	ldr	r3, [r7, #20]
 800be9a:	ee07 3a90 	vmov	s15, r3
 800be9e:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800bea2:	eddf 6a3d 	vldr	s13, [pc, #244]	@ 800bf98 <HAL_RCCEx_GetPLL3ClockFreq+0x2a0>
 800bea6:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800beaa:	4b37      	ldr	r3, [pc, #220]	@ (800bf88 <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800beac:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 800beae:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800beb2:	ee07 3a90 	vmov	s15, r3
 800beb6:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800beba:	ed97 6a03 	vldr	s12, [r7, #12]
 800bebe:	eddf 5a34 	vldr	s11, [pc, #208]	@ 800bf90 <HAL_RCCEx_GetPLL3ClockFreq+0x298>
 800bec2:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800bec6:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800beca:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800bece:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800bed2:	ee67 7a27 	vmul.f32	s15, s14, s15
 800bed6:	edc7 7a07 	vstr	s15, [r7, #28]
        break;
 800beda:	bf00      	nop
    }
    PLL3_Clocks->PLL3_P_Frequency = (uint32_t)(float_t)(pll3vco / ((float_t)(uint32_t)((RCC->PLL3DIVR & RCC_PLL3DIVR_P3) >> 9)  + (float_t)1)) ;
 800bedc:	4b2a      	ldr	r3, [pc, #168]	@ (800bf88 <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800bede:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 800bee0:	0a5b      	lsrs	r3, r3, #9
 800bee2:	f003 037f 	and.w	r3, r3, #127	@ 0x7f
 800bee6:	ee07 3a90 	vmov	s15, r3
 800beea:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800beee:	eeb7 7a00 	vmov.f32	s14, #112	@ 0x3f800000  1.0
 800bef2:	ee37 7a87 	vadd.f32	s14, s15, s14
 800bef6:	edd7 6a07 	vldr	s13, [r7, #28]
 800befa:	eec6 7a87 	vdiv.f32	s15, s13, s14
 800befe:	eefc 7ae7 	vcvt.u32.f32	s15, s15
 800bf02:	ee17 2a90 	vmov	r2, s15
 800bf06:	687b      	ldr	r3, [r7, #4]
 800bf08:	601a      	str	r2, [r3, #0]
    PLL3_Clocks->PLL3_Q_Frequency = (uint32_t)(float_t)(pll3vco / ((float_t)(uint32_t)((RCC->PLL3DIVR & RCC_PLL3DIVR_Q3) >> 16) + (float_t)1)) ;
 800bf0a:	4b1f      	ldr	r3, [pc, #124]	@ (800bf88 <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800bf0c:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 800bf0e:	0c1b      	lsrs	r3, r3, #16
 800bf10:	f003 037f 	and.w	r3, r3, #127	@ 0x7f
 800bf14:	ee07 3a90 	vmov	s15, r3
 800bf18:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800bf1c:	eeb7 7a00 	vmov.f32	s14, #112	@ 0x3f800000  1.0
 800bf20:	ee37 7a87 	vadd.f32	s14, s15, s14
 800bf24:	edd7 6a07 	vldr	s13, [r7, #28]
 800bf28:	eec6 7a87 	vdiv.f32	s15, s13, s14
 800bf2c:	eefc 7ae7 	vcvt.u32.f32	s15, s15
 800bf30:	ee17 2a90 	vmov	r2, s15
 800bf34:	687b      	ldr	r3, [r7, #4]
 800bf36:	605a      	str	r2, [r3, #4]
    PLL3_Clocks->PLL3_R_Frequency = (uint32_t)(float_t)(pll3vco / ((float_t)(uint32_t)((RCC->PLL3DIVR & RCC_PLL3DIVR_R3) >> 24) + (float_t)1)) ;
 800bf38:	4b13      	ldr	r3, [pc, #76]	@ (800bf88 <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800bf3a:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 800bf3c:	0e1b      	lsrs	r3, r3, #24
 800bf3e:	f003 037f 	and.w	r3, r3, #127	@ 0x7f
 800bf42:	ee07 3a90 	vmov	s15, r3
 800bf46:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800bf4a:	eeb7 7a00 	vmov.f32	s14, #112	@ 0x3f800000  1.0
 800bf4e:	ee37 7a87 	vadd.f32	s14, s15, s14
 800bf52:	edd7 6a07 	vldr	s13, [r7, #28]
 800bf56:	eec6 7a87 	vdiv.f32	s15, s13, s14
 800bf5a:	eefc 7ae7 	vcvt.u32.f32	s15, s15
 800bf5e:	ee17 2a90 	vmov	r2, s15
 800bf62:	687b      	ldr	r3, [r7, #4]
 800bf64:	609a      	str	r2, [r3, #8]
    PLL3_Clocks->PLL3_P_Frequency = 0U;
    PLL3_Clocks->PLL3_Q_Frequency = 0U;
    PLL3_Clocks->PLL3_R_Frequency = 0U;
  }

}
 800bf66:	e008      	b.n	800bf7a <HAL_RCCEx_GetPLL3ClockFreq+0x282>
    PLL3_Clocks->PLL3_P_Frequency = 0U;
 800bf68:	687b      	ldr	r3, [r7, #4]
 800bf6a:	2200      	movs	r2, #0
 800bf6c:	601a      	str	r2, [r3, #0]
    PLL3_Clocks->PLL3_Q_Frequency = 0U;
 800bf6e:	687b      	ldr	r3, [r7, #4]
 800bf70:	2200      	movs	r2, #0
 800bf72:	605a      	str	r2, [r3, #4]
    PLL3_Clocks->PLL3_R_Frequency = 0U;
 800bf74:	687b      	ldr	r3, [r7, #4]
 800bf76:	2200      	movs	r2, #0
 800bf78:	609a      	str	r2, [r3, #8]
}
 800bf7a:	bf00      	nop
 800bf7c:	3724      	adds	r7, #36	@ 0x24
 800bf7e:	46bd      	mov	sp, r7
 800bf80:	f85d 7b04 	ldr.w	r7, [sp], #4
 800bf84:	4770      	bx	lr
 800bf86:	bf00      	nop
 800bf88:	58024400 	.word	0x58024400
 800bf8c:	03d09000 	.word	0x03d09000
 800bf90:	46000000 	.word	0x46000000
 800bf94:	4c742400 	.word	0x4c742400
 800bf98:	4a742400 	.word	0x4a742400
 800bf9c:	4bbebc20 	.word	0x4bbebc20

0800bfa0 <RCCEx_PLL2_Config>:
  * @note   PLL2 is temporary disabled to apply new parameters
  *
  * @retval HAL status
  */
static HAL_StatusTypeDef RCCEx_PLL2_Config(RCC_PLL2InitTypeDef *pll2, uint32_t Divider)
{
 800bfa0:	b580      	push	{r7, lr}
 800bfa2:	b084      	sub	sp, #16
 800bfa4:	af00      	add	r7, sp, #0
 800bfa6:	6078      	str	r0, [r7, #4]
 800bfa8:	6039      	str	r1, [r7, #0]

  uint32_t tickstart;
  HAL_StatusTypeDef status = HAL_OK;
 800bfaa:	2300      	movs	r3, #0
 800bfac:	73fb      	strb	r3, [r7, #15]
  assert_param(IS_RCC_PLL2RGE_VALUE(pll2->PLL2RGE));
  assert_param(IS_RCC_PLL2VCO_VALUE(pll2->PLL2VCOSEL));
  assert_param(IS_RCC_PLLFRACN_VALUE(pll2->PLL2FRACN));

  /* Check that PLL2 OSC clock source is already set */
  if (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_NONE)
 800bfae:	4b53      	ldr	r3, [pc, #332]	@ (800c0fc <RCCEx_PLL2_Config+0x15c>)
 800bfb0:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800bfb2:	f003 0303 	and.w	r3, r3, #3
 800bfb6:	2b03      	cmp	r3, #3
 800bfb8:	d101      	bne.n	800bfbe <RCCEx_PLL2_Config+0x1e>
  {
    return HAL_ERROR;
 800bfba:	2301      	movs	r3, #1
 800bfbc:	e099      	b.n	800c0f2 <RCCEx_PLL2_Config+0x152>


  else
  {
    /* Disable  PLL2. */
    __HAL_RCC_PLL2_DISABLE();
 800bfbe:	4b4f      	ldr	r3, [pc, #316]	@ (800c0fc <RCCEx_PLL2_Config+0x15c>)
 800bfc0:	681b      	ldr	r3, [r3, #0]
 800bfc2:	4a4e      	ldr	r2, [pc, #312]	@ (800c0fc <RCCEx_PLL2_Config+0x15c>)
 800bfc4:	f023 6380 	bic.w	r3, r3, #67108864	@ 0x4000000
 800bfc8:	6013      	str	r3, [r2, #0]

    /* Get Start Tick*/
    tickstart = HAL_GetTick();
 800bfca:	f7f8 fde1 	bl	8004b90 <HAL_GetTick>
 800bfce:	60b8      	str	r0, [r7, #8]

    /* Wait till PLL is disabled */
    while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL2RDY) != 0U)
 800bfd0:	e008      	b.n	800bfe4 <RCCEx_PLL2_Config+0x44>
    {
      if ((HAL_GetTick() - tickstart) > PLL2_TIMEOUT_VALUE)
 800bfd2:	f7f8 fddd 	bl	8004b90 <HAL_GetTick>
 800bfd6:	4602      	mov	r2, r0
 800bfd8:	68bb      	ldr	r3, [r7, #8]
 800bfda:	1ad3      	subs	r3, r2, r3
 800bfdc:	2b02      	cmp	r3, #2
 800bfde:	d901      	bls.n	800bfe4 <RCCEx_PLL2_Config+0x44>
      {
        return HAL_TIMEOUT;
 800bfe0:	2303      	movs	r3, #3
 800bfe2:	e086      	b.n	800c0f2 <RCCEx_PLL2_Config+0x152>
    while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL2RDY) != 0U)
 800bfe4:	4b45      	ldr	r3, [pc, #276]	@ (800c0fc <RCCEx_PLL2_Config+0x15c>)
 800bfe6:	681b      	ldr	r3, [r3, #0]
 800bfe8:	f003 6300 	and.w	r3, r3, #134217728	@ 0x8000000
 800bfec:	2b00      	cmp	r3, #0
 800bfee:	d1f0      	bne.n	800bfd2 <RCCEx_PLL2_Config+0x32>
      }
    }

    /* Configure PLL2 multiplication and division factors. */
    __HAL_RCC_PLL2_CONFIG(pll2->PLL2M,
 800bff0:	4b42      	ldr	r3, [pc, #264]	@ (800c0fc <RCCEx_PLL2_Config+0x15c>)
 800bff2:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800bff4:	f423 327c 	bic.w	r2, r3, #258048	@ 0x3f000
 800bff8:	687b      	ldr	r3, [r7, #4]
 800bffa:	681b      	ldr	r3, [r3, #0]
 800bffc:	031b      	lsls	r3, r3, #12
 800bffe:	493f      	ldr	r1, [pc, #252]	@ (800c0fc <RCCEx_PLL2_Config+0x15c>)
 800c000:	4313      	orrs	r3, r2
 800c002:	628b      	str	r3, [r1, #40]	@ 0x28
 800c004:	687b      	ldr	r3, [r7, #4]
 800c006:	685b      	ldr	r3, [r3, #4]
 800c008:	3b01      	subs	r3, #1
 800c00a:	f3c3 0208 	ubfx	r2, r3, #0, #9
 800c00e:	687b      	ldr	r3, [r7, #4]
 800c010:	689b      	ldr	r3, [r3, #8]
 800c012:	3b01      	subs	r3, #1
 800c014:	025b      	lsls	r3, r3, #9
 800c016:	b29b      	uxth	r3, r3
 800c018:	431a      	orrs	r2, r3
 800c01a:	687b      	ldr	r3, [r7, #4]
 800c01c:	68db      	ldr	r3, [r3, #12]
 800c01e:	3b01      	subs	r3, #1
 800c020:	041b      	lsls	r3, r3, #16
 800c022:	f403 03fe 	and.w	r3, r3, #8323072	@ 0x7f0000
 800c026:	431a      	orrs	r2, r3
 800c028:	687b      	ldr	r3, [r7, #4]
 800c02a:	691b      	ldr	r3, [r3, #16]
 800c02c:	3b01      	subs	r3, #1
 800c02e:	061b      	lsls	r3, r3, #24
 800c030:	f003 43fe 	and.w	r3, r3, #2130706432	@ 0x7f000000
 800c034:	4931      	ldr	r1, [pc, #196]	@ (800c0fc <RCCEx_PLL2_Config+0x15c>)
 800c036:	4313      	orrs	r3, r2
 800c038:	638b      	str	r3, [r1, #56]	@ 0x38
                          pll2->PLL2P,
                          pll2->PLL2Q,
                          pll2->PLL2R);

    /* Select PLL2 input reference frequency range: VCI */
    __HAL_RCC_PLL2_VCIRANGE(pll2->PLL2RGE) ;
 800c03a:	4b30      	ldr	r3, [pc, #192]	@ (800c0fc <RCCEx_PLL2_Config+0x15c>)
 800c03c:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800c03e:	f023 02c0 	bic.w	r2, r3, #192	@ 0xc0
 800c042:	687b      	ldr	r3, [r7, #4]
 800c044:	695b      	ldr	r3, [r3, #20]
 800c046:	492d      	ldr	r1, [pc, #180]	@ (800c0fc <RCCEx_PLL2_Config+0x15c>)
 800c048:	4313      	orrs	r3, r2
 800c04a:	62cb      	str	r3, [r1, #44]	@ 0x2c

    /* Select PLL2 output frequency range : VCO */
    __HAL_RCC_PLL2_VCORANGE(pll2->PLL2VCOSEL) ;
 800c04c:	4b2b      	ldr	r3, [pc, #172]	@ (800c0fc <RCCEx_PLL2_Config+0x15c>)
 800c04e:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800c050:	f023 0220 	bic.w	r2, r3, #32
 800c054:	687b      	ldr	r3, [r7, #4]
 800c056:	699b      	ldr	r3, [r3, #24]
 800c058:	4928      	ldr	r1, [pc, #160]	@ (800c0fc <RCCEx_PLL2_Config+0x15c>)
 800c05a:	4313      	orrs	r3, r2
 800c05c:	62cb      	str	r3, [r1, #44]	@ 0x2c

    /* Disable PLL2FRACN . */
    __HAL_RCC_PLL2FRACN_DISABLE();
 800c05e:	4b27      	ldr	r3, [pc, #156]	@ (800c0fc <RCCEx_PLL2_Config+0x15c>)
 800c060:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800c062:	4a26      	ldr	r2, [pc, #152]	@ (800c0fc <RCCEx_PLL2_Config+0x15c>)
 800c064:	f023 0310 	bic.w	r3, r3, #16
 800c068:	62d3      	str	r3, [r2, #44]	@ 0x2c

    /* Configures PLL2 clock Fractional Part Of The Multiplication Factor */
    __HAL_RCC_PLL2FRACN_CONFIG(pll2->PLL2FRACN);
 800c06a:	4b24      	ldr	r3, [pc, #144]	@ (800c0fc <RCCEx_PLL2_Config+0x15c>)
 800c06c:	6bda      	ldr	r2, [r3, #60]	@ 0x3c
 800c06e:	4b24      	ldr	r3, [pc, #144]	@ (800c100 <RCCEx_PLL2_Config+0x160>)
 800c070:	4013      	ands	r3, r2
 800c072:	687a      	ldr	r2, [r7, #4]
 800c074:	69d2      	ldr	r2, [r2, #28]
 800c076:	00d2      	lsls	r2, r2, #3
 800c078:	4920      	ldr	r1, [pc, #128]	@ (800c0fc <RCCEx_PLL2_Config+0x15c>)
 800c07a:	4313      	orrs	r3, r2
 800c07c:	63cb      	str	r3, [r1, #60]	@ 0x3c

    /* Enable PLL2FRACN . */
    __HAL_RCC_PLL2FRACN_ENABLE();
 800c07e:	4b1f      	ldr	r3, [pc, #124]	@ (800c0fc <RCCEx_PLL2_Config+0x15c>)
 800c080:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800c082:	4a1e      	ldr	r2, [pc, #120]	@ (800c0fc <RCCEx_PLL2_Config+0x15c>)
 800c084:	f043 0310 	orr.w	r3, r3, #16
 800c088:	62d3      	str	r3, [r2, #44]	@ 0x2c

    /* Enable the PLL2 clock output */
    if (Divider == DIVIDER_P_UPDATE)
 800c08a:	683b      	ldr	r3, [r7, #0]
 800c08c:	2b00      	cmp	r3, #0
 800c08e:	d106      	bne.n	800c09e <RCCEx_PLL2_Config+0xfe>
    {
      __HAL_RCC_PLL2CLKOUT_ENABLE(RCC_PLL2_DIVP);
 800c090:	4b1a      	ldr	r3, [pc, #104]	@ (800c0fc <RCCEx_PLL2_Config+0x15c>)
 800c092:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800c094:	4a19      	ldr	r2, [pc, #100]	@ (800c0fc <RCCEx_PLL2_Config+0x15c>)
 800c096:	f443 2300 	orr.w	r3, r3, #524288	@ 0x80000
 800c09a:	62d3      	str	r3, [r2, #44]	@ 0x2c
 800c09c:	e00f      	b.n	800c0be <RCCEx_PLL2_Config+0x11e>
    }
    else if (Divider == DIVIDER_Q_UPDATE)
 800c09e:	683b      	ldr	r3, [r7, #0]
 800c0a0:	2b01      	cmp	r3, #1
 800c0a2:	d106      	bne.n	800c0b2 <RCCEx_PLL2_Config+0x112>
    {
      __HAL_RCC_PLL2CLKOUT_ENABLE(RCC_PLL2_DIVQ);
 800c0a4:	4b15      	ldr	r3, [pc, #84]	@ (800c0fc <RCCEx_PLL2_Config+0x15c>)
 800c0a6:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800c0a8:	4a14      	ldr	r2, [pc, #80]	@ (800c0fc <RCCEx_PLL2_Config+0x15c>)
 800c0aa:	f443 1380 	orr.w	r3, r3, #1048576	@ 0x100000
 800c0ae:	62d3      	str	r3, [r2, #44]	@ 0x2c
 800c0b0:	e005      	b.n	800c0be <RCCEx_PLL2_Config+0x11e>
    }
    else
    {
      __HAL_RCC_PLL2CLKOUT_ENABLE(RCC_PLL2_DIVR);
 800c0b2:	4b12      	ldr	r3, [pc, #72]	@ (800c0fc <RCCEx_PLL2_Config+0x15c>)
 800c0b4:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800c0b6:	4a11      	ldr	r2, [pc, #68]	@ (800c0fc <RCCEx_PLL2_Config+0x15c>)
 800c0b8:	f443 1300 	orr.w	r3, r3, #2097152	@ 0x200000
 800c0bc:	62d3      	str	r3, [r2, #44]	@ 0x2c
    }

    /* Enable  PLL2. */
    __HAL_RCC_PLL2_ENABLE();
 800c0be:	4b0f      	ldr	r3, [pc, #60]	@ (800c0fc <RCCEx_PLL2_Config+0x15c>)
 800c0c0:	681b      	ldr	r3, [r3, #0]
 800c0c2:	4a0e      	ldr	r2, [pc, #56]	@ (800c0fc <RCCEx_PLL2_Config+0x15c>)
 800c0c4:	f043 6380 	orr.w	r3, r3, #67108864	@ 0x4000000
 800c0c8:	6013      	str	r3, [r2, #0]

    /* Get Start Tick*/
    tickstart = HAL_GetTick();
 800c0ca:	f7f8 fd61 	bl	8004b90 <HAL_GetTick>
 800c0ce:	60b8      	str	r0, [r7, #8]

    /* Wait till PLL2 is ready */
    while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL2RDY) == 0U)
 800c0d0:	e008      	b.n	800c0e4 <RCCEx_PLL2_Config+0x144>
    {
      if ((HAL_GetTick() - tickstart) > PLL2_TIMEOUT_VALUE)
 800c0d2:	f7f8 fd5d 	bl	8004b90 <HAL_GetTick>
 800c0d6:	4602      	mov	r2, r0
 800c0d8:	68bb      	ldr	r3, [r7, #8]
 800c0da:	1ad3      	subs	r3, r2, r3
 800c0dc:	2b02      	cmp	r3, #2
 800c0de:	d901      	bls.n	800c0e4 <RCCEx_PLL2_Config+0x144>
      {
        return HAL_TIMEOUT;
 800c0e0:	2303      	movs	r3, #3
 800c0e2:	e006      	b.n	800c0f2 <RCCEx_PLL2_Config+0x152>
    while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL2RDY) == 0U)
 800c0e4:	4b05      	ldr	r3, [pc, #20]	@ (800c0fc <RCCEx_PLL2_Config+0x15c>)
 800c0e6:	681b      	ldr	r3, [r3, #0]
 800c0e8:	f003 6300 	and.w	r3, r3, #134217728	@ 0x8000000
 800c0ec:	2b00      	cmp	r3, #0
 800c0ee:	d0f0      	beq.n	800c0d2 <RCCEx_PLL2_Config+0x132>
    }

  }


  return status;
 800c0f0:	7bfb      	ldrb	r3, [r7, #15]
}
 800c0f2:	4618      	mov	r0, r3
 800c0f4:	3710      	adds	r7, #16
 800c0f6:	46bd      	mov	sp, r7
 800c0f8:	bd80      	pop	{r7, pc}
 800c0fa:	bf00      	nop
 800c0fc:	58024400 	.word	0x58024400
 800c100:	ffff0007 	.word	0xffff0007

0800c104 <RCCEx_PLL3_Config>:
  * @note   PLL3 is temporary disabled to apply new parameters
  *
  * @retval HAL status
  */
static HAL_StatusTypeDef RCCEx_PLL3_Config(RCC_PLL3InitTypeDef *pll3, uint32_t Divider)
{
 800c104:	b580      	push	{r7, lr}
 800c106:	b084      	sub	sp, #16
 800c108:	af00      	add	r7, sp, #0
 800c10a:	6078      	str	r0, [r7, #4]
 800c10c:	6039      	str	r1, [r7, #0]
  uint32_t tickstart;
  HAL_StatusTypeDef status = HAL_OK;
 800c10e:	2300      	movs	r3, #0
 800c110:	73fb      	strb	r3, [r7, #15]
  assert_param(IS_RCC_PLL3RGE_VALUE(pll3->PLL3RGE));
  assert_param(IS_RCC_PLL3VCO_VALUE(pll3->PLL3VCOSEL));
  assert_param(IS_RCC_PLLFRACN_VALUE(pll3->PLL3FRACN));

  /* Check that PLL3 OSC clock source is already set */
  if (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_NONE)
 800c112:	4b53      	ldr	r3, [pc, #332]	@ (800c260 <RCCEx_PLL3_Config+0x15c>)
 800c114:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800c116:	f003 0303 	and.w	r3, r3, #3
 800c11a:	2b03      	cmp	r3, #3
 800c11c:	d101      	bne.n	800c122 <RCCEx_PLL3_Config+0x1e>
  {
    return HAL_ERROR;
 800c11e:	2301      	movs	r3, #1
 800c120:	e099      	b.n	800c256 <RCCEx_PLL3_Config+0x152>


  else
  {
    /* Disable  PLL3. */
    __HAL_RCC_PLL3_DISABLE();
 800c122:	4b4f      	ldr	r3, [pc, #316]	@ (800c260 <RCCEx_PLL3_Config+0x15c>)
 800c124:	681b      	ldr	r3, [r3, #0]
 800c126:	4a4e      	ldr	r2, [pc, #312]	@ (800c260 <RCCEx_PLL3_Config+0x15c>)
 800c128:	f023 5380 	bic.w	r3, r3, #268435456	@ 0x10000000
 800c12c:	6013      	str	r3, [r2, #0]

    /* Get Start Tick*/
    tickstart = HAL_GetTick();
 800c12e:	f7f8 fd2f 	bl	8004b90 <HAL_GetTick>
 800c132:	60b8      	str	r0, [r7, #8]
    /* Wait till PLL3 is ready */
    while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL3RDY) != 0U)
 800c134:	e008      	b.n	800c148 <RCCEx_PLL3_Config+0x44>
    {
      if ((HAL_GetTick() - tickstart) > PLL3_TIMEOUT_VALUE)
 800c136:	f7f8 fd2b 	bl	8004b90 <HAL_GetTick>
 800c13a:	4602      	mov	r2, r0
 800c13c:	68bb      	ldr	r3, [r7, #8]
 800c13e:	1ad3      	subs	r3, r2, r3
 800c140:	2b02      	cmp	r3, #2
 800c142:	d901      	bls.n	800c148 <RCCEx_PLL3_Config+0x44>
      {
        return HAL_TIMEOUT;
 800c144:	2303      	movs	r3, #3
 800c146:	e086      	b.n	800c256 <RCCEx_PLL3_Config+0x152>
    while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL3RDY) != 0U)
 800c148:	4b45      	ldr	r3, [pc, #276]	@ (800c260 <RCCEx_PLL3_Config+0x15c>)
 800c14a:	681b      	ldr	r3, [r3, #0]
 800c14c:	f003 5300 	and.w	r3, r3, #536870912	@ 0x20000000
 800c150:	2b00      	cmp	r3, #0
 800c152:	d1f0      	bne.n	800c136 <RCCEx_PLL3_Config+0x32>
      }
    }

    /* Configure the PLL3  multiplication and division factors. */
    __HAL_RCC_PLL3_CONFIG(pll3->PLL3M,
 800c154:	4b42      	ldr	r3, [pc, #264]	@ (800c260 <RCCEx_PLL3_Config+0x15c>)
 800c156:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800c158:	f023 727c 	bic.w	r2, r3, #66060288	@ 0x3f00000
 800c15c:	687b      	ldr	r3, [r7, #4]
 800c15e:	681b      	ldr	r3, [r3, #0]
 800c160:	051b      	lsls	r3, r3, #20
 800c162:	493f      	ldr	r1, [pc, #252]	@ (800c260 <RCCEx_PLL3_Config+0x15c>)
 800c164:	4313      	orrs	r3, r2
 800c166:	628b      	str	r3, [r1, #40]	@ 0x28
 800c168:	687b      	ldr	r3, [r7, #4]
 800c16a:	685b      	ldr	r3, [r3, #4]
 800c16c:	3b01      	subs	r3, #1
 800c16e:	f3c3 0208 	ubfx	r2, r3, #0, #9
 800c172:	687b      	ldr	r3, [r7, #4]
 800c174:	689b      	ldr	r3, [r3, #8]
 800c176:	3b01      	subs	r3, #1
 800c178:	025b      	lsls	r3, r3, #9
 800c17a:	b29b      	uxth	r3, r3
 800c17c:	431a      	orrs	r2, r3
 800c17e:	687b      	ldr	r3, [r7, #4]
 800c180:	68db      	ldr	r3, [r3, #12]
 800c182:	3b01      	subs	r3, #1
 800c184:	041b      	lsls	r3, r3, #16
 800c186:	f403 03fe 	and.w	r3, r3, #8323072	@ 0x7f0000
 800c18a:	431a      	orrs	r2, r3
 800c18c:	687b      	ldr	r3, [r7, #4]
 800c18e:	691b      	ldr	r3, [r3, #16]
 800c190:	3b01      	subs	r3, #1
 800c192:	061b      	lsls	r3, r3, #24
 800c194:	f003 43fe 	and.w	r3, r3, #2130706432	@ 0x7f000000
 800c198:	4931      	ldr	r1, [pc, #196]	@ (800c260 <RCCEx_PLL3_Config+0x15c>)
 800c19a:	4313      	orrs	r3, r2
 800c19c:	640b      	str	r3, [r1, #64]	@ 0x40
                          pll3->PLL3P,
                          pll3->PLL3Q,
                          pll3->PLL3R);

    /* Select PLL3 input reference frequency range: VCI */
    __HAL_RCC_PLL3_VCIRANGE(pll3->PLL3RGE) ;
 800c19e:	4b30      	ldr	r3, [pc, #192]	@ (800c260 <RCCEx_PLL3_Config+0x15c>)
 800c1a0:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800c1a2:	f423 6240 	bic.w	r2, r3, #3072	@ 0xc00
 800c1a6:	687b      	ldr	r3, [r7, #4]
 800c1a8:	695b      	ldr	r3, [r3, #20]
 800c1aa:	492d      	ldr	r1, [pc, #180]	@ (800c260 <RCCEx_PLL3_Config+0x15c>)
 800c1ac:	4313      	orrs	r3, r2
 800c1ae:	62cb      	str	r3, [r1, #44]	@ 0x2c

    /* Select PLL3 output frequency range : VCO */
    __HAL_RCC_PLL3_VCORANGE(pll3->PLL3VCOSEL) ;
 800c1b0:	4b2b      	ldr	r3, [pc, #172]	@ (800c260 <RCCEx_PLL3_Config+0x15c>)
 800c1b2:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800c1b4:	f423 7200 	bic.w	r2, r3, #512	@ 0x200
 800c1b8:	687b      	ldr	r3, [r7, #4]
 800c1ba:	699b      	ldr	r3, [r3, #24]
 800c1bc:	4928      	ldr	r1, [pc, #160]	@ (800c260 <RCCEx_PLL3_Config+0x15c>)
 800c1be:	4313      	orrs	r3, r2
 800c1c0:	62cb      	str	r3, [r1, #44]	@ 0x2c

    /* Disable PLL3FRACN . */
    __HAL_RCC_PLL3FRACN_DISABLE();
 800c1c2:	4b27      	ldr	r3, [pc, #156]	@ (800c260 <RCCEx_PLL3_Config+0x15c>)
 800c1c4:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800c1c6:	4a26      	ldr	r2, [pc, #152]	@ (800c260 <RCCEx_PLL3_Config+0x15c>)
 800c1c8:	f423 7380 	bic.w	r3, r3, #256	@ 0x100
 800c1cc:	62d3      	str	r3, [r2, #44]	@ 0x2c

    /* Configures PLL3 clock Fractional Part Of The Multiplication Factor */
    __HAL_RCC_PLL3FRACN_CONFIG(pll3->PLL3FRACN);
 800c1ce:	4b24      	ldr	r3, [pc, #144]	@ (800c260 <RCCEx_PLL3_Config+0x15c>)
 800c1d0:	6c5a      	ldr	r2, [r3, #68]	@ 0x44
 800c1d2:	4b24      	ldr	r3, [pc, #144]	@ (800c264 <RCCEx_PLL3_Config+0x160>)
 800c1d4:	4013      	ands	r3, r2
 800c1d6:	687a      	ldr	r2, [r7, #4]
 800c1d8:	69d2      	ldr	r2, [r2, #28]
 800c1da:	00d2      	lsls	r2, r2, #3
 800c1dc:	4920      	ldr	r1, [pc, #128]	@ (800c260 <RCCEx_PLL3_Config+0x15c>)
 800c1de:	4313      	orrs	r3, r2
 800c1e0:	644b      	str	r3, [r1, #68]	@ 0x44

    /* Enable PLL3FRACN . */
    __HAL_RCC_PLL3FRACN_ENABLE();
 800c1e2:	4b1f      	ldr	r3, [pc, #124]	@ (800c260 <RCCEx_PLL3_Config+0x15c>)
 800c1e4:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800c1e6:	4a1e      	ldr	r2, [pc, #120]	@ (800c260 <RCCEx_PLL3_Config+0x15c>)
 800c1e8:	f443 7380 	orr.w	r3, r3, #256	@ 0x100
 800c1ec:	62d3      	str	r3, [r2, #44]	@ 0x2c

    /* Enable the PLL3 clock output */
    if (Divider == DIVIDER_P_UPDATE)
 800c1ee:	683b      	ldr	r3, [r7, #0]
 800c1f0:	2b00      	cmp	r3, #0
 800c1f2:	d106      	bne.n	800c202 <RCCEx_PLL3_Config+0xfe>
    {
      __HAL_RCC_PLL3CLKOUT_ENABLE(RCC_PLL3_DIVP);
 800c1f4:	4b1a      	ldr	r3, [pc, #104]	@ (800c260 <RCCEx_PLL3_Config+0x15c>)
 800c1f6:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800c1f8:	4a19      	ldr	r2, [pc, #100]	@ (800c260 <RCCEx_PLL3_Config+0x15c>)
 800c1fa:	f443 0380 	orr.w	r3, r3, #4194304	@ 0x400000
 800c1fe:	62d3      	str	r3, [r2, #44]	@ 0x2c
 800c200:	e00f      	b.n	800c222 <RCCEx_PLL3_Config+0x11e>
    }
    else if (Divider == DIVIDER_Q_UPDATE)
 800c202:	683b      	ldr	r3, [r7, #0]
 800c204:	2b01      	cmp	r3, #1
 800c206:	d106      	bne.n	800c216 <RCCEx_PLL3_Config+0x112>
    {
      __HAL_RCC_PLL3CLKOUT_ENABLE(RCC_PLL3_DIVQ);
 800c208:	4b15      	ldr	r3, [pc, #84]	@ (800c260 <RCCEx_PLL3_Config+0x15c>)
 800c20a:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800c20c:	4a14      	ldr	r2, [pc, #80]	@ (800c260 <RCCEx_PLL3_Config+0x15c>)
 800c20e:	f443 0300 	orr.w	r3, r3, #8388608	@ 0x800000
 800c212:	62d3      	str	r3, [r2, #44]	@ 0x2c
 800c214:	e005      	b.n	800c222 <RCCEx_PLL3_Config+0x11e>
    }
    else
    {
      __HAL_RCC_PLL3CLKOUT_ENABLE(RCC_PLL3_DIVR);
 800c216:	4b12      	ldr	r3, [pc, #72]	@ (800c260 <RCCEx_PLL3_Config+0x15c>)
 800c218:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800c21a:	4a11      	ldr	r2, [pc, #68]	@ (800c260 <RCCEx_PLL3_Config+0x15c>)
 800c21c:	f043 7380 	orr.w	r3, r3, #16777216	@ 0x1000000
 800c220:	62d3      	str	r3, [r2, #44]	@ 0x2c
    }

    /* Enable  PLL3. */
    __HAL_RCC_PLL3_ENABLE();
 800c222:	4b0f      	ldr	r3, [pc, #60]	@ (800c260 <RCCEx_PLL3_Config+0x15c>)
 800c224:	681b      	ldr	r3, [r3, #0]
 800c226:	4a0e      	ldr	r2, [pc, #56]	@ (800c260 <RCCEx_PLL3_Config+0x15c>)
 800c228:	f043 5380 	orr.w	r3, r3, #268435456	@ 0x10000000
 800c22c:	6013      	str	r3, [r2, #0]

    /* Get Start Tick*/
    tickstart = HAL_GetTick();
 800c22e:	f7f8 fcaf 	bl	8004b90 <HAL_GetTick>
 800c232:	60b8      	str	r0, [r7, #8]

    /* Wait till PLL3 is ready */
    while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL3RDY) == 0U)
 800c234:	e008      	b.n	800c248 <RCCEx_PLL3_Config+0x144>
    {
      if ((HAL_GetTick() - tickstart) > PLL3_TIMEOUT_VALUE)
 800c236:	f7f8 fcab 	bl	8004b90 <HAL_GetTick>
 800c23a:	4602      	mov	r2, r0
 800c23c:	68bb      	ldr	r3, [r7, #8]
 800c23e:	1ad3      	subs	r3, r2, r3
 800c240:	2b02      	cmp	r3, #2
 800c242:	d901      	bls.n	800c248 <RCCEx_PLL3_Config+0x144>
      {
        return HAL_TIMEOUT;
 800c244:	2303      	movs	r3, #3
 800c246:	e006      	b.n	800c256 <RCCEx_PLL3_Config+0x152>
    while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL3RDY) == 0U)
 800c248:	4b05      	ldr	r3, [pc, #20]	@ (800c260 <RCCEx_PLL3_Config+0x15c>)
 800c24a:	681b      	ldr	r3, [r3, #0]
 800c24c:	f003 5300 	and.w	r3, r3, #536870912	@ 0x20000000
 800c250:	2b00      	cmp	r3, #0
 800c252:	d0f0      	beq.n	800c236 <RCCEx_PLL3_Config+0x132>
    }

  }


  return status;
 800c254:	7bfb      	ldrb	r3, [r7, #15]
}
 800c256:	4618      	mov	r0, r3
 800c258:	3710      	adds	r7, #16
 800c25a:	46bd      	mov	sp, r7
 800c25c:	bd80      	pop	{r7, pc}
 800c25e:	bf00      	nop
 800c260:	58024400 	.word	0x58024400
 800c264:	ffff0007 	.word	0xffff0007

0800c268 <HAL_RNG_Init>:
  * @param  hrng pointer to a RNG_HandleTypeDef structure that contains
  *                the configuration information for RNG.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_RNG_Init(RNG_HandleTypeDef *hrng)
{
 800c268:	b580      	push	{r7, lr}
 800c26a:	b084      	sub	sp, #16
 800c26c:	af00      	add	r7, sp, #0
 800c26e:	6078      	str	r0, [r7, #4]
  uint32_t tickstart;
  /* Check the RNG handle allocation */
  if (hrng == NULL)
 800c270:	687b      	ldr	r3, [r7, #4]
 800c272:	2b00      	cmp	r3, #0
 800c274:	d101      	bne.n	800c27a <HAL_RNG_Init+0x12>
  {
    return HAL_ERROR;
 800c276:	2301      	movs	r3, #1
 800c278:	e054      	b.n	800c324 <HAL_RNG_Init+0xbc>

    /* Init the low level hardware */
    hrng->MspInitCallback(hrng);
  }
#else
  if (hrng->State == HAL_RNG_STATE_RESET)
 800c27a:	687b      	ldr	r3, [r7, #4]
 800c27c:	7a5b      	ldrb	r3, [r3, #9]
 800c27e:	b2db      	uxtb	r3, r3
 800c280:	2b00      	cmp	r3, #0
 800c282:	d105      	bne.n	800c290 <HAL_RNG_Init+0x28>
  {
    /* Allocate lock resource and initialize it */
    hrng->Lock = HAL_UNLOCKED;
 800c284:	687b      	ldr	r3, [r7, #4]
 800c286:	2200      	movs	r2, #0
 800c288:	721a      	strb	r2, [r3, #8]

    /* Init the low level hardware */
    HAL_RNG_MspInit(hrng);
 800c28a:	6878      	ldr	r0, [r7, #4]
 800c28c:	f7f7 fa46 	bl	800371c <HAL_RNG_MspInit>
  }
#endif /* USE_HAL_RNG_REGISTER_CALLBACKS */

  /* Change RNG peripheral state */
  hrng->State = HAL_RNG_STATE_BUSY;
 800c290:	687b      	ldr	r3, [r7, #4]
 800c292:	2202      	movs	r2, #2
 800c294:	725a      	strb	r2, [r3, #9]
      }
    }
  }
#else
  /* Clock Error Detection Configuration */
  MODIFY_REG(hrng->Instance->CR, RNG_CR_CED, hrng->Init.ClockErrorDetection);
 800c296:	687b      	ldr	r3, [r7, #4]
 800c298:	681b      	ldr	r3, [r3, #0]
 800c29a:	681b      	ldr	r3, [r3, #0]
 800c29c:	f023 0120 	bic.w	r1, r3, #32
 800c2a0:	687b      	ldr	r3, [r7, #4]
 800c2a2:	685a      	ldr	r2, [r3, #4]
 800c2a4:	687b      	ldr	r3, [r7, #4]
 800c2a6:	681b      	ldr	r3, [r3, #0]
 800c2a8:	430a      	orrs	r2, r1
 800c2aa:	601a      	str	r2, [r3, #0]
#endif /* RNG_CR_CONDRST */

  /* Enable the RNG Peripheral */
  __HAL_RNG_ENABLE(hrng);
 800c2ac:	687b      	ldr	r3, [r7, #4]
 800c2ae:	681b      	ldr	r3, [r3, #0]
 800c2b0:	681a      	ldr	r2, [r3, #0]
 800c2b2:	687b      	ldr	r3, [r7, #4]
 800c2b4:	681b      	ldr	r3, [r3, #0]
 800c2b6:	f042 0204 	orr.w	r2, r2, #4
 800c2ba:	601a      	str	r2, [r3, #0]

  /* verify that no seed error */
  if (__HAL_RNG_GET_IT(hrng, RNG_IT_SEI) != RESET)
 800c2bc:	687b      	ldr	r3, [r7, #4]
 800c2be:	681b      	ldr	r3, [r3, #0]
 800c2c0:	685b      	ldr	r3, [r3, #4]
 800c2c2:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 800c2c6:	2b40      	cmp	r3, #64	@ 0x40
 800c2c8:	d104      	bne.n	800c2d4 <HAL_RNG_Init+0x6c>
  {
    hrng->State = HAL_RNG_STATE_ERROR;
 800c2ca:	687b      	ldr	r3, [r7, #4]
 800c2cc:	2204      	movs	r2, #4
 800c2ce:	725a      	strb	r2, [r3, #9]
    return HAL_ERROR;
 800c2d0:	2301      	movs	r3, #1
 800c2d2:	e027      	b.n	800c324 <HAL_RNG_Init+0xbc>
  }
  /* Get tick */
  tickstart = HAL_GetTick();
 800c2d4:	f7f8 fc5c 	bl	8004b90 <HAL_GetTick>
 800c2d8:	60f8      	str	r0, [r7, #12]
  /* Check if data register contains valid random data */
  while (__HAL_RNG_GET_FLAG(hrng, RNG_FLAG_SECS) != RESET)
 800c2da:	e015      	b.n	800c308 <HAL_RNG_Init+0xa0>
  {
    if ((HAL_GetTick() - tickstart) > RNG_TIMEOUT_VALUE)
 800c2dc:	f7f8 fc58 	bl	8004b90 <HAL_GetTick>
 800c2e0:	4602      	mov	r2, r0
 800c2e2:	68fb      	ldr	r3, [r7, #12]
 800c2e4:	1ad3      	subs	r3, r2, r3
 800c2e6:	2b02      	cmp	r3, #2
 800c2e8:	d90e      	bls.n	800c308 <HAL_RNG_Init+0xa0>
    {
      /* New check to avoid false timeout detection in case of preemption */
      if (__HAL_RNG_GET_FLAG(hrng, RNG_FLAG_SECS) != RESET)
 800c2ea:	687b      	ldr	r3, [r7, #4]
 800c2ec:	681b      	ldr	r3, [r3, #0]
 800c2ee:	685b      	ldr	r3, [r3, #4]
 800c2f0:	f003 0304 	and.w	r3, r3, #4
 800c2f4:	2b04      	cmp	r3, #4
 800c2f6:	d107      	bne.n	800c308 <HAL_RNG_Init+0xa0>
      {
        hrng->State = HAL_RNG_STATE_ERROR;
 800c2f8:	687b      	ldr	r3, [r7, #4]
 800c2fa:	2204      	movs	r2, #4
 800c2fc:	725a      	strb	r2, [r3, #9]
        hrng->ErrorCode = HAL_RNG_ERROR_TIMEOUT;
 800c2fe:	687b      	ldr	r3, [r7, #4]
 800c300:	2202      	movs	r2, #2
 800c302:	60da      	str	r2, [r3, #12]
        return HAL_ERROR;
 800c304:	2301      	movs	r3, #1
 800c306:	e00d      	b.n	800c324 <HAL_RNG_Init+0xbc>
  while (__HAL_RNG_GET_FLAG(hrng, RNG_FLAG_SECS) != RESET)
 800c308:	687b      	ldr	r3, [r7, #4]
 800c30a:	681b      	ldr	r3, [r3, #0]
 800c30c:	685b      	ldr	r3, [r3, #4]
 800c30e:	f003 0304 	and.w	r3, r3, #4
 800c312:	2b04      	cmp	r3, #4
 800c314:	d0e2      	beq.n	800c2dc <HAL_RNG_Init+0x74>
      }
    }
  }

  /* Initialize the RNG state */
  hrng->State = HAL_RNG_STATE_READY;
 800c316:	687b      	ldr	r3, [r7, #4]
 800c318:	2201      	movs	r2, #1
 800c31a:	725a      	strb	r2, [r3, #9]

  /* Initialise the error code */
  hrng->ErrorCode = HAL_RNG_ERROR_NONE;
 800c31c:	687b      	ldr	r3, [r7, #4]
 800c31e:	2200      	movs	r2, #0
 800c320:	60da      	str	r2, [r3, #12]

  /* Return function status */
  return HAL_OK;
 800c322:	2300      	movs	r3, #0
}
 800c324:	4618      	mov	r0, r3
 800c326:	3710      	adds	r7, #16
 800c328:	46bd      	mov	sp, r7
 800c32a:	bd80      	pop	{r7, pc}

0800c32c <HAL_RNG_GenerateRandomNumber>:
  * @param  random32bit pointer to generated random number variable if successful.
  * @retval HAL status
  */

HAL_StatusTypeDef HAL_RNG_GenerateRandomNumber(RNG_HandleTypeDef *hrng, uint32_t *random32bit)
{
 800c32c:	b580      	push	{r7, lr}
 800c32e:	b084      	sub	sp, #16
 800c330:	af00      	add	r7, sp, #0
 800c332:	6078      	str	r0, [r7, #4]
 800c334:	6039      	str	r1, [r7, #0]
  uint32_t tickstart;
  HAL_StatusTypeDef status = HAL_OK;
 800c336:	2300      	movs	r3, #0
 800c338:	73fb      	strb	r3, [r7, #15]

  /* Process Locked */
  __HAL_LOCK(hrng);
 800c33a:	687b      	ldr	r3, [r7, #4]
 800c33c:	7a1b      	ldrb	r3, [r3, #8]
 800c33e:	2b01      	cmp	r3, #1
 800c340:	d101      	bne.n	800c346 <HAL_RNG_GenerateRandomNumber+0x1a>
 800c342:	2302      	movs	r3, #2
 800c344:	e044      	b.n	800c3d0 <HAL_RNG_GenerateRandomNumber+0xa4>
 800c346:	687b      	ldr	r3, [r7, #4]
 800c348:	2201      	movs	r2, #1
 800c34a:	721a      	strb	r2, [r3, #8]

  /* Check RNG peripheral state */
  if (hrng->State == HAL_RNG_STATE_READY)
 800c34c:	687b      	ldr	r3, [r7, #4]
 800c34e:	7a5b      	ldrb	r3, [r3, #9]
 800c350:	b2db      	uxtb	r3, r3
 800c352:	2b01      	cmp	r3, #1
 800c354:	d133      	bne.n	800c3be <HAL_RNG_GenerateRandomNumber+0x92>
  {
    /* Change RNG peripheral state */
    hrng->State = HAL_RNG_STATE_BUSY;
 800c356:	687b      	ldr	r3, [r7, #4]
 800c358:	2202      	movs	r2, #2
 800c35a:	725a      	strb	r2, [r3, #9]
      }
    }
#endif /* RNG_CR_CONDRST */

    /* Get tick */
    tickstart = HAL_GetTick();
 800c35c:	f7f8 fc18 	bl	8004b90 <HAL_GetTick>
 800c360:	60b8      	str	r0, [r7, #8]

    /* Check if data register contains valid random data */
    while (__HAL_RNG_GET_FLAG(hrng, RNG_FLAG_DRDY) == RESET)
 800c362:	e018      	b.n	800c396 <HAL_RNG_GenerateRandomNumber+0x6a>
    {
      if ((HAL_GetTick() - tickstart) > RNG_TIMEOUT_VALUE)
 800c364:	f7f8 fc14 	bl	8004b90 <HAL_GetTick>
 800c368:	4602      	mov	r2, r0
 800c36a:	68bb      	ldr	r3, [r7, #8]
 800c36c:	1ad3      	subs	r3, r2, r3
 800c36e:	2b02      	cmp	r3, #2
 800c370:	d911      	bls.n	800c396 <HAL_RNG_GenerateRandomNumber+0x6a>
      {
        /* New check to avoid false timeout detection in case of preemption */
        if (__HAL_RNG_GET_FLAG(hrng, RNG_FLAG_DRDY) == RESET)
 800c372:	687b      	ldr	r3, [r7, #4]
 800c374:	681b      	ldr	r3, [r3, #0]
 800c376:	685b      	ldr	r3, [r3, #4]
 800c378:	f003 0301 	and.w	r3, r3, #1
 800c37c:	2b01      	cmp	r3, #1
 800c37e:	d00a      	beq.n	800c396 <HAL_RNG_GenerateRandomNumber+0x6a>
        {
          hrng->State = HAL_RNG_STATE_READY;
 800c380:	687b      	ldr	r3, [r7, #4]
 800c382:	2201      	movs	r2, #1
 800c384:	725a      	strb	r2, [r3, #9]
          hrng->ErrorCode = HAL_RNG_ERROR_TIMEOUT;
 800c386:	687b      	ldr	r3, [r7, #4]
 800c388:	2202      	movs	r2, #2
 800c38a:	60da      	str	r2, [r3, #12]
          /* Process Unlocked */
          __HAL_UNLOCK(hrng);
 800c38c:	687b      	ldr	r3, [r7, #4]
 800c38e:	2200      	movs	r2, #0
 800c390:	721a      	strb	r2, [r3, #8]
          return HAL_ERROR;
 800c392:	2301      	movs	r3, #1
 800c394:	e01c      	b.n	800c3d0 <HAL_RNG_GenerateRandomNumber+0xa4>
    while (__HAL_RNG_GET_FLAG(hrng, RNG_FLAG_DRDY) == RESET)
 800c396:	687b      	ldr	r3, [r7, #4]
 800c398:	681b      	ldr	r3, [r3, #0]
 800c39a:	685b      	ldr	r3, [r3, #4]
 800c39c:	f003 0301 	and.w	r3, r3, #1
 800c3a0:	2b01      	cmp	r3, #1
 800c3a2:	d1df      	bne.n	800c364 <HAL_RNG_GenerateRandomNumber+0x38>
        }
      }
    }

    /* Get a 32bit Random number */
    hrng->RandomNumber = hrng->Instance->DR;
 800c3a4:	687b      	ldr	r3, [r7, #4]
 800c3a6:	681b      	ldr	r3, [r3, #0]
 800c3a8:	689a      	ldr	r2, [r3, #8]
 800c3aa:	687b      	ldr	r3, [r7, #4]
 800c3ac:	611a      	str	r2, [r3, #16]
    else /* No seed error */
    {
      *random32bit = hrng->RandomNumber;
    }
#else
    *random32bit = hrng->RandomNumber;
 800c3ae:	687b      	ldr	r3, [r7, #4]
 800c3b0:	691a      	ldr	r2, [r3, #16]
 800c3b2:	683b      	ldr	r3, [r7, #0]
 800c3b4:	601a      	str	r2, [r3, #0]

#endif /* RNG_CR_CONDRST */
    hrng->State = HAL_RNG_STATE_READY;
 800c3b6:	687b      	ldr	r3, [r7, #4]
 800c3b8:	2201      	movs	r2, #1
 800c3ba:	725a      	strb	r2, [r3, #9]
 800c3bc:	e004      	b.n	800c3c8 <HAL_RNG_GenerateRandomNumber+0x9c>
  }
  else
  {
    hrng->ErrorCode = HAL_RNG_ERROR_BUSY;
 800c3be:	687b      	ldr	r3, [r7, #4]
 800c3c0:	2204      	movs	r2, #4
 800c3c2:	60da      	str	r2, [r3, #12]
    status = HAL_ERROR;
 800c3c4:	2301      	movs	r3, #1
 800c3c6:	73fb      	strb	r3, [r7, #15]
  }

  /* Process Unlocked */
  __HAL_UNLOCK(hrng);
 800c3c8:	687b      	ldr	r3, [r7, #4]
 800c3ca:	2200      	movs	r2, #0
 800c3cc:	721a      	strb	r2, [r3, #8]

  return status;
 800c3ce:	7bfb      	ldrb	r3, [r7, #15]
}
 800c3d0:	4618      	mov	r0, r3
 800c3d2:	3710      	adds	r7, #16
 800c3d4:	46bd      	mov	sp, r7
 800c3d6:	bd80      	pop	{r7, pc}

0800c3d8 <HAL_TIM_Base_Init>:
  *         Ex: call @ref HAL_TIM_Base_DeInit() before HAL_TIM_Base_Init()
  * @param  htim TIM Base handle
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim)
{
 800c3d8:	b580      	push	{r7, lr}
 800c3da:	b082      	sub	sp, #8
 800c3dc:	af00      	add	r7, sp, #0
 800c3de:	6078      	str	r0, [r7, #4]
  /* Check the TIM handle allocation */
  if (htim == NULL)
 800c3e0:	687b      	ldr	r3, [r7, #4]
 800c3e2:	2b00      	cmp	r3, #0
 800c3e4:	d101      	bne.n	800c3ea <HAL_TIM_Base_Init+0x12>
  {
    return HAL_ERROR;
 800c3e6:	2301      	movs	r3, #1
 800c3e8:	e049      	b.n	800c47e <HAL_TIM_Base_Init+0xa6>
  assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
  assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
  assert_param(IS_TIM_PERIOD(htim, htim->Init.Period));
  assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));

  if (htim->State == HAL_TIM_STATE_RESET)
 800c3ea:	687b      	ldr	r3, [r7, #4]
 800c3ec:	f893 303d 	ldrb.w	r3, [r3, #61]	@ 0x3d
 800c3f0:	b2db      	uxtb	r3, r3
 800c3f2:	2b00      	cmp	r3, #0
 800c3f4:	d106      	bne.n	800c404 <HAL_TIM_Base_Init+0x2c>
  {
    /* Allocate lock resource and initialize it */
    htim->Lock = HAL_UNLOCKED;
 800c3f6:	687b      	ldr	r3, [r7, #4]
 800c3f8:	2200      	movs	r2, #0
 800c3fa:	f883 203c 	strb.w	r2, [r3, #60]	@ 0x3c
    }
    /* Init the low level hardware : GPIO, CLOCK, NVIC */
    htim->Base_MspInitCallback(htim);
#else
    /* Init the low level hardware : GPIO, CLOCK, NVIC */
    HAL_TIM_Base_MspInit(htim);
 800c3fe:	6878      	ldr	r0, [r7, #4]
 800c400:	f000 f841 	bl	800c486 <HAL_TIM_Base_MspInit>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
  }

  /* Set the TIM state */
  htim->State = HAL_TIM_STATE_BUSY;
 800c404:	687b      	ldr	r3, [r7, #4]
 800c406:	2202      	movs	r2, #2
 800c408:	f883 203d 	strb.w	r2, [r3, #61]	@ 0x3d

  /* Set the Time Base configuration */
  TIM_Base_SetConfig(htim->Instance, &htim->Init);
 800c40c:	687b      	ldr	r3, [r7, #4]
 800c40e:	681a      	ldr	r2, [r3, #0]
 800c410:	687b      	ldr	r3, [r7, #4]
 800c412:	3304      	adds	r3, #4
 800c414:	4619      	mov	r1, r3
 800c416:	4610      	mov	r0, r2
 800c418:	f000 f9e8 	bl	800c7ec <TIM_Base_SetConfig>

  /* Initialize the DMA burst operation state */
  htim->DMABurstState = HAL_DMA_BURST_STATE_READY;
 800c41c:	687b      	ldr	r3, [r7, #4]
 800c41e:	2201      	movs	r2, #1
 800c420:	f883 2048 	strb.w	r2, [r3, #72]	@ 0x48

  /* Initialize the TIM channels state */
  TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
 800c424:	687b      	ldr	r3, [r7, #4]
 800c426:	2201      	movs	r2, #1
 800c428:	f883 203e 	strb.w	r2, [r3, #62]	@ 0x3e
 800c42c:	687b      	ldr	r3, [r7, #4]
 800c42e:	2201      	movs	r2, #1
 800c430:	f883 203f 	strb.w	r2, [r3, #63]	@ 0x3f
 800c434:	687b      	ldr	r3, [r7, #4]
 800c436:	2201      	movs	r2, #1
 800c438:	f883 2040 	strb.w	r2, [r3, #64]	@ 0x40
 800c43c:	687b      	ldr	r3, [r7, #4]
 800c43e:	2201      	movs	r2, #1
 800c440:	f883 2041 	strb.w	r2, [r3, #65]	@ 0x41
 800c444:	687b      	ldr	r3, [r7, #4]
 800c446:	2201      	movs	r2, #1
 800c448:	f883 2042 	strb.w	r2, [r3, #66]	@ 0x42
 800c44c:	687b      	ldr	r3, [r7, #4]
 800c44e:	2201      	movs	r2, #1
 800c450:	f883 2043 	strb.w	r2, [r3, #67]	@ 0x43
  TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
 800c454:	687b      	ldr	r3, [r7, #4]
 800c456:	2201      	movs	r2, #1
 800c458:	f883 2044 	strb.w	r2, [r3, #68]	@ 0x44
 800c45c:	687b      	ldr	r3, [r7, #4]
 800c45e:	2201      	movs	r2, #1
 800c460:	f883 2045 	strb.w	r2, [r3, #69]	@ 0x45
 800c464:	687b      	ldr	r3, [r7, #4]
 800c466:	2201      	movs	r2, #1
 800c468:	f883 2046 	strb.w	r2, [r3, #70]	@ 0x46
 800c46c:	687b      	ldr	r3, [r7, #4]
 800c46e:	2201      	movs	r2, #1
 800c470:	f883 2047 	strb.w	r2, [r3, #71]	@ 0x47

  /* Initialize the TIM state*/
  htim->State = HAL_TIM_STATE_READY;
 800c474:	687b      	ldr	r3, [r7, #4]
 800c476:	2201      	movs	r2, #1
 800c478:	f883 203d 	strb.w	r2, [r3, #61]	@ 0x3d

  return HAL_OK;
 800c47c:	2300      	movs	r3, #0
}
 800c47e:	4618      	mov	r0, r3
 800c480:	3708      	adds	r7, #8
 800c482:	46bd      	mov	sp, r7
 800c484:	bd80      	pop	{r7, pc}

0800c486 <HAL_TIM_Base_MspInit>:
  * @brief  Initializes the TIM Base MSP.
  * @param  htim TIM Base handle
  * @retval None
  */
__weak void HAL_TIM_Base_MspInit(TIM_HandleTypeDef *htim)
{
 800c486:	b480      	push	{r7}
 800c488:	b083      	sub	sp, #12
 800c48a:	af00      	add	r7, sp, #0
 800c48c:	6078      	str	r0, [r7, #4]
  UNUSED(htim);

  /* NOTE : This function should not be modified, when the callback is needed,
            the HAL_TIM_Base_MspInit could be implemented in the user file
   */
}
 800c48e:	bf00      	nop
 800c490:	370c      	adds	r7, #12
 800c492:	46bd      	mov	sp, r7
 800c494:	f85d 7b04 	ldr.w	r7, [sp], #4
 800c498:	4770      	bx	lr
	...

0800c49c <HAL_TIM_Base_Start_IT>:
  * @brief  Starts the TIM Base generation in interrupt mode.
  * @param  htim TIM Base handle
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_TIM_Base_Start_IT(TIM_HandleTypeDef *htim)
{
 800c49c:	b480      	push	{r7}
 800c49e:	b085      	sub	sp, #20
 800c4a0:	af00      	add	r7, sp, #0
 800c4a2:	6078      	str	r0, [r7, #4]

  /* Check the parameters */
  assert_param(IS_TIM_INSTANCE(htim->Instance));

  /* Check the TIM state */
  if (htim->State != HAL_TIM_STATE_READY)
 800c4a4:	687b      	ldr	r3, [r7, #4]
 800c4a6:	f893 303d 	ldrb.w	r3, [r3, #61]	@ 0x3d
 800c4aa:	b2db      	uxtb	r3, r3
 800c4ac:	2b01      	cmp	r3, #1
 800c4ae:	d001      	beq.n	800c4b4 <HAL_TIM_Base_Start_IT+0x18>
  {
    return HAL_ERROR;
 800c4b0:	2301      	movs	r3, #1
 800c4b2:	e054      	b.n	800c55e <HAL_TIM_Base_Start_IT+0xc2>
  }

  /* Set the TIM state */
  htim->State = HAL_TIM_STATE_BUSY;
 800c4b4:	687b      	ldr	r3, [r7, #4]
 800c4b6:	2202      	movs	r2, #2
 800c4b8:	f883 203d 	strb.w	r2, [r3, #61]	@ 0x3d

  /* Enable the TIM Update interrupt */
  __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE);
 800c4bc:	687b      	ldr	r3, [r7, #4]
 800c4be:	681b      	ldr	r3, [r3, #0]
 800c4c0:	68da      	ldr	r2, [r3, #12]
 800c4c2:	687b      	ldr	r3, [r7, #4]
 800c4c4:	681b      	ldr	r3, [r3, #0]
 800c4c6:	f042 0201 	orr.w	r2, r2, #1
 800c4ca:	60da      	str	r2, [r3, #12]

  /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
  if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
 800c4cc:	687b      	ldr	r3, [r7, #4]
 800c4ce:	681b      	ldr	r3, [r3, #0]
 800c4d0:	4a26      	ldr	r2, [pc, #152]	@ (800c56c <HAL_TIM_Base_Start_IT+0xd0>)
 800c4d2:	4293      	cmp	r3, r2
 800c4d4:	d022      	beq.n	800c51c <HAL_TIM_Base_Start_IT+0x80>
 800c4d6:	687b      	ldr	r3, [r7, #4]
 800c4d8:	681b      	ldr	r3, [r3, #0]
 800c4da:	f1b3 4f80 	cmp.w	r3, #1073741824	@ 0x40000000
 800c4de:	d01d      	beq.n	800c51c <HAL_TIM_Base_Start_IT+0x80>
 800c4e0:	687b      	ldr	r3, [r7, #4]
 800c4e2:	681b      	ldr	r3, [r3, #0]
 800c4e4:	4a22      	ldr	r2, [pc, #136]	@ (800c570 <HAL_TIM_Base_Start_IT+0xd4>)
 800c4e6:	4293      	cmp	r3, r2
 800c4e8:	d018      	beq.n	800c51c <HAL_TIM_Base_Start_IT+0x80>
 800c4ea:	687b      	ldr	r3, [r7, #4]
 800c4ec:	681b      	ldr	r3, [r3, #0]
 800c4ee:	4a21      	ldr	r2, [pc, #132]	@ (800c574 <HAL_TIM_Base_Start_IT+0xd8>)
 800c4f0:	4293      	cmp	r3, r2
 800c4f2:	d013      	beq.n	800c51c <HAL_TIM_Base_Start_IT+0x80>
 800c4f4:	687b      	ldr	r3, [r7, #4]
 800c4f6:	681b      	ldr	r3, [r3, #0]
 800c4f8:	4a1f      	ldr	r2, [pc, #124]	@ (800c578 <HAL_TIM_Base_Start_IT+0xdc>)
 800c4fa:	4293      	cmp	r3, r2
 800c4fc:	d00e      	beq.n	800c51c <HAL_TIM_Base_Start_IT+0x80>
 800c4fe:	687b      	ldr	r3, [r7, #4]
 800c500:	681b      	ldr	r3, [r3, #0]
 800c502:	4a1e      	ldr	r2, [pc, #120]	@ (800c57c <HAL_TIM_Base_Start_IT+0xe0>)
 800c504:	4293      	cmp	r3, r2
 800c506:	d009      	beq.n	800c51c <HAL_TIM_Base_Start_IT+0x80>
 800c508:	687b      	ldr	r3, [r7, #4]
 800c50a:	681b      	ldr	r3, [r3, #0]
 800c50c:	4a1c      	ldr	r2, [pc, #112]	@ (800c580 <HAL_TIM_Base_Start_IT+0xe4>)
 800c50e:	4293      	cmp	r3, r2
 800c510:	d004      	beq.n	800c51c <HAL_TIM_Base_Start_IT+0x80>
 800c512:	687b      	ldr	r3, [r7, #4]
 800c514:	681b      	ldr	r3, [r3, #0]
 800c516:	4a1b      	ldr	r2, [pc, #108]	@ (800c584 <HAL_TIM_Base_Start_IT+0xe8>)
 800c518:	4293      	cmp	r3, r2
 800c51a:	d115      	bne.n	800c548 <HAL_TIM_Base_Start_IT+0xac>
  {
    tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
 800c51c:	687b      	ldr	r3, [r7, #4]
 800c51e:	681b      	ldr	r3, [r3, #0]
 800c520:	689a      	ldr	r2, [r3, #8]
 800c522:	4b19      	ldr	r3, [pc, #100]	@ (800c588 <HAL_TIM_Base_Start_IT+0xec>)
 800c524:	4013      	ands	r3, r2
 800c526:	60fb      	str	r3, [r7, #12]
    if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
 800c528:	68fb      	ldr	r3, [r7, #12]
 800c52a:	2b06      	cmp	r3, #6
 800c52c:	d015      	beq.n	800c55a <HAL_TIM_Base_Start_IT+0xbe>
 800c52e:	68fb      	ldr	r3, [r7, #12]
 800c530:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 800c534:	d011      	beq.n	800c55a <HAL_TIM_Base_Start_IT+0xbe>
    {
      __HAL_TIM_ENABLE(htim);
 800c536:	687b      	ldr	r3, [r7, #4]
 800c538:	681b      	ldr	r3, [r3, #0]
 800c53a:	681a      	ldr	r2, [r3, #0]
 800c53c:	687b      	ldr	r3, [r7, #4]
 800c53e:	681b      	ldr	r3, [r3, #0]
 800c540:	f042 0201 	orr.w	r2, r2, #1
 800c544:	601a      	str	r2, [r3, #0]
    if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
 800c546:	e008      	b.n	800c55a <HAL_TIM_Base_Start_IT+0xbe>
    }
  }
  else
  {
    __HAL_TIM_ENABLE(htim);
 800c548:	687b      	ldr	r3, [r7, #4]
 800c54a:	681b      	ldr	r3, [r3, #0]
 800c54c:	681a      	ldr	r2, [r3, #0]
 800c54e:	687b      	ldr	r3, [r7, #4]
 800c550:	681b      	ldr	r3, [r3, #0]
 800c552:	f042 0201 	orr.w	r2, r2, #1
 800c556:	601a      	str	r2, [r3, #0]
 800c558:	e000      	b.n	800c55c <HAL_TIM_Base_Start_IT+0xc0>
    if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
 800c55a:	bf00      	nop
  }

  /* Return function status */
  return HAL_OK;
 800c55c:	2300      	movs	r3, #0
}
 800c55e:	4618      	mov	r0, r3
 800c560:	3714      	adds	r7, #20
 800c562:	46bd      	mov	sp, r7
 800c564:	f85d 7b04 	ldr.w	r7, [sp], #4
 800c568:	4770      	bx	lr
 800c56a:	bf00      	nop
 800c56c:	40010000 	.word	0x40010000
 800c570:	40000400 	.word	0x40000400
 800c574:	40000800 	.word	0x40000800
 800c578:	40000c00 	.word	0x40000c00
 800c57c:	40010400 	.word	0x40010400
 800c580:	40001800 	.word	0x40001800
 800c584:	40014000 	.word	0x40014000
 800c588:	00010007 	.word	0x00010007

0800c58c <HAL_TIM_IRQHandler>:
  * @brief  This function handles TIM interrupts requests.
  * @param  htim TIM  handle
  * @retval None
  */
void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
{
 800c58c:	b580      	push	{r7, lr}
 800c58e:	b084      	sub	sp, #16
 800c590:	af00      	add	r7, sp, #0
 800c592:	6078      	str	r0, [r7, #4]
  uint32_t itsource = htim->Instance->DIER;
 800c594:	687b      	ldr	r3, [r7, #4]
 800c596:	681b      	ldr	r3, [r3, #0]
 800c598:	68db      	ldr	r3, [r3, #12]
 800c59a:	60fb      	str	r3, [r7, #12]
  uint32_t itflag   = htim->Instance->SR;
 800c59c:	687b      	ldr	r3, [r7, #4]
 800c59e:	681b      	ldr	r3, [r3, #0]
 800c5a0:	691b      	ldr	r3, [r3, #16]
 800c5a2:	60bb      	str	r3, [r7, #8]

  /* Capture compare 1 event */
  if ((itflag & (TIM_FLAG_CC1)) == (TIM_FLAG_CC1))
 800c5a4:	68bb      	ldr	r3, [r7, #8]
 800c5a6:	f003 0302 	and.w	r3, r3, #2
 800c5aa:	2b00      	cmp	r3, #0
 800c5ac:	d020      	beq.n	800c5f0 <HAL_TIM_IRQHandler+0x64>
  {
    if ((itsource & (TIM_IT_CC1)) == (TIM_IT_CC1))
 800c5ae:	68fb      	ldr	r3, [r7, #12]
 800c5b0:	f003 0302 	and.w	r3, r3, #2
 800c5b4:	2b00      	cmp	r3, #0
 800c5b6:	d01b      	beq.n	800c5f0 <HAL_TIM_IRQHandler+0x64>
    {
      {
        __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC1);
 800c5b8:	687b      	ldr	r3, [r7, #4]
 800c5ba:	681b      	ldr	r3, [r3, #0]
 800c5bc:	f06f 0202 	mvn.w	r2, #2
 800c5c0:	611a      	str	r2, [r3, #16]
        htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
 800c5c2:	687b      	ldr	r3, [r7, #4]
 800c5c4:	2201      	movs	r2, #1
 800c5c6:	771a      	strb	r2, [r3, #28]

        /* Input capture event */
        if ((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U)
 800c5c8:	687b      	ldr	r3, [r7, #4]
 800c5ca:	681b      	ldr	r3, [r3, #0]
 800c5cc:	699b      	ldr	r3, [r3, #24]
 800c5ce:	f003 0303 	and.w	r3, r3, #3
 800c5d2:	2b00      	cmp	r3, #0
 800c5d4:	d003      	beq.n	800c5de <HAL_TIM_IRQHandler+0x52>
        {
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
          htim->IC_CaptureCallback(htim);
#else
          HAL_TIM_IC_CaptureCallback(htim);
 800c5d6:	6878      	ldr	r0, [r7, #4]
 800c5d8:	f000 f8e9 	bl	800c7ae <HAL_TIM_IC_CaptureCallback>
 800c5dc:	e005      	b.n	800c5ea <HAL_TIM_IRQHandler+0x5e>
        {
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
          htim->OC_DelayElapsedCallback(htim);
          htim->PWM_PulseFinishedCallback(htim);
#else
          HAL_TIM_OC_DelayElapsedCallback(htim);
 800c5de:	6878      	ldr	r0, [r7, #4]
 800c5e0:	f000 f8db 	bl	800c79a <HAL_TIM_OC_DelayElapsedCallback>
          HAL_TIM_PWM_PulseFinishedCallback(htim);
 800c5e4:	6878      	ldr	r0, [r7, #4]
 800c5e6:	f000 f8ec 	bl	800c7c2 <HAL_TIM_PWM_PulseFinishedCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
        }
        htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
 800c5ea:	687b      	ldr	r3, [r7, #4]
 800c5ec:	2200      	movs	r2, #0
 800c5ee:	771a      	strb	r2, [r3, #28]
      }
    }
  }
  /* Capture compare 2 event */
  if ((itflag & (TIM_FLAG_CC2)) == (TIM_FLAG_CC2))
 800c5f0:	68bb      	ldr	r3, [r7, #8]
 800c5f2:	f003 0304 	and.w	r3, r3, #4
 800c5f6:	2b00      	cmp	r3, #0
 800c5f8:	d020      	beq.n	800c63c <HAL_TIM_IRQHandler+0xb0>
  {
    if ((itsource & (TIM_IT_CC2)) == (TIM_IT_CC2))
 800c5fa:	68fb      	ldr	r3, [r7, #12]
 800c5fc:	f003 0304 	and.w	r3, r3, #4
 800c600:	2b00      	cmp	r3, #0
 800c602:	d01b      	beq.n	800c63c <HAL_TIM_IRQHandler+0xb0>
    {
      __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC2);
 800c604:	687b      	ldr	r3, [r7, #4]
 800c606:	681b      	ldr	r3, [r3, #0]
 800c608:	f06f 0204 	mvn.w	r2, #4
 800c60c:	611a      	str	r2, [r3, #16]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
 800c60e:	687b      	ldr	r3, [r7, #4]
 800c610:	2202      	movs	r2, #2
 800c612:	771a      	strb	r2, [r3, #28]
      /* Input capture event */
      if ((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U)
 800c614:	687b      	ldr	r3, [r7, #4]
 800c616:	681b      	ldr	r3, [r3, #0]
 800c618:	699b      	ldr	r3, [r3, #24]
 800c61a:	f403 7340 	and.w	r3, r3, #768	@ 0x300
 800c61e:	2b00      	cmp	r3, #0
 800c620:	d003      	beq.n	800c62a <HAL_TIM_IRQHandler+0x9e>
      {
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
        htim->IC_CaptureCallback(htim);
#else
        HAL_TIM_IC_CaptureCallback(htim);
 800c622:	6878      	ldr	r0, [r7, #4]
 800c624:	f000 f8c3 	bl	800c7ae <HAL_TIM_IC_CaptureCallback>
 800c628:	e005      	b.n	800c636 <HAL_TIM_IRQHandler+0xaa>
      {
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
        htim->OC_DelayElapsedCallback(htim);
        htim->PWM_PulseFinishedCallback(htim);
#else
        HAL_TIM_OC_DelayElapsedCallback(htim);
 800c62a:	6878      	ldr	r0, [r7, #4]
 800c62c:	f000 f8b5 	bl	800c79a <HAL_TIM_OC_DelayElapsedCallback>
        HAL_TIM_PWM_PulseFinishedCallback(htim);
 800c630:	6878      	ldr	r0, [r7, #4]
 800c632:	f000 f8c6 	bl	800c7c2 <HAL_TIM_PWM_PulseFinishedCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
      }
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
 800c636:	687b      	ldr	r3, [r7, #4]
 800c638:	2200      	movs	r2, #0
 800c63a:	771a      	strb	r2, [r3, #28]
    }
  }
  /* Capture compare 3 event */
  if ((itflag & (TIM_FLAG_CC3)) == (TIM_FLAG_CC3))
 800c63c:	68bb      	ldr	r3, [r7, #8]
 800c63e:	f003 0308 	and.w	r3, r3, #8
 800c642:	2b00      	cmp	r3, #0
 800c644:	d020      	beq.n	800c688 <HAL_TIM_IRQHandler+0xfc>
  {
    if ((itsource & (TIM_IT_CC3)) == (TIM_IT_CC3))
 800c646:	68fb      	ldr	r3, [r7, #12]
 800c648:	f003 0308 	and.w	r3, r3, #8
 800c64c:	2b00      	cmp	r3, #0
 800c64e:	d01b      	beq.n	800c688 <HAL_TIM_IRQHandler+0xfc>
    {
      __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC3);
 800c650:	687b      	ldr	r3, [r7, #4]
 800c652:	681b      	ldr	r3, [r3, #0]
 800c654:	f06f 0208 	mvn.w	r2, #8
 800c658:	611a      	str	r2, [r3, #16]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
 800c65a:	687b      	ldr	r3, [r7, #4]
 800c65c:	2204      	movs	r2, #4
 800c65e:	771a      	strb	r2, [r3, #28]
      /* Input capture event */
      if ((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U)
 800c660:	687b      	ldr	r3, [r7, #4]
 800c662:	681b      	ldr	r3, [r3, #0]
 800c664:	69db      	ldr	r3, [r3, #28]
 800c666:	f003 0303 	and.w	r3, r3, #3
 800c66a:	2b00      	cmp	r3, #0
 800c66c:	d003      	beq.n	800c676 <HAL_TIM_IRQHandler+0xea>
      {
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
        htim->IC_CaptureCallback(htim);
#else
        HAL_TIM_IC_CaptureCallback(htim);
 800c66e:	6878      	ldr	r0, [r7, #4]
 800c670:	f000 f89d 	bl	800c7ae <HAL_TIM_IC_CaptureCallback>
 800c674:	e005      	b.n	800c682 <HAL_TIM_IRQHandler+0xf6>
      {
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
        htim->OC_DelayElapsedCallback(htim);
        htim->PWM_PulseFinishedCallback(htim);
#else
        HAL_TIM_OC_DelayElapsedCallback(htim);
 800c676:	6878      	ldr	r0, [r7, #4]
 800c678:	f000 f88f 	bl	800c79a <HAL_TIM_OC_DelayElapsedCallback>
        HAL_TIM_PWM_PulseFinishedCallback(htim);
 800c67c:	6878      	ldr	r0, [r7, #4]
 800c67e:	f000 f8a0 	bl	800c7c2 <HAL_TIM_PWM_PulseFinishedCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
      }
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
 800c682:	687b      	ldr	r3, [r7, #4]
 800c684:	2200      	movs	r2, #0
 800c686:	771a      	strb	r2, [r3, #28]
    }
  }
  /* Capture compare 4 event */
  if ((itflag & (TIM_FLAG_CC4)) == (TIM_FLAG_CC4))
 800c688:	68bb      	ldr	r3, [r7, #8]
 800c68a:	f003 0310 	and.w	r3, r3, #16
 800c68e:	2b00      	cmp	r3, #0
 800c690:	d020      	beq.n	800c6d4 <HAL_TIM_IRQHandler+0x148>
  {
    if ((itsource & (TIM_IT_CC4)) == (TIM_IT_CC4))
 800c692:	68fb      	ldr	r3, [r7, #12]
 800c694:	f003 0310 	and.w	r3, r3, #16
 800c698:	2b00      	cmp	r3, #0
 800c69a:	d01b      	beq.n	800c6d4 <HAL_TIM_IRQHandler+0x148>
    {
      __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC4);
 800c69c:	687b      	ldr	r3, [r7, #4]
 800c69e:	681b      	ldr	r3, [r3, #0]
 800c6a0:	f06f 0210 	mvn.w	r2, #16
 800c6a4:	611a      	str	r2, [r3, #16]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
 800c6a6:	687b      	ldr	r3, [r7, #4]
 800c6a8:	2208      	movs	r2, #8
 800c6aa:	771a      	strb	r2, [r3, #28]
      /* Input capture event */
      if ((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U)
 800c6ac:	687b      	ldr	r3, [r7, #4]
 800c6ae:	681b      	ldr	r3, [r3, #0]
 800c6b0:	69db      	ldr	r3, [r3, #28]
 800c6b2:	f403 7340 	and.w	r3, r3, #768	@ 0x300
 800c6b6:	2b00      	cmp	r3, #0
 800c6b8:	d003      	beq.n	800c6c2 <HAL_TIM_IRQHandler+0x136>
      {
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
        htim->IC_CaptureCallback(htim);
#else
        HAL_TIM_IC_CaptureCallback(htim);
 800c6ba:	6878      	ldr	r0, [r7, #4]
 800c6bc:	f000 f877 	bl	800c7ae <HAL_TIM_IC_CaptureCallback>
 800c6c0:	e005      	b.n	800c6ce <HAL_TIM_IRQHandler+0x142>
      {
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
        htim->OC_DelayElapsedCallback(htim);
        htim->PWM_PulseFinishedCallback(htim);
#else
        HAL_TIM_OC_DelayElapsedCallback(htim);
 800c6c2:	6878      	ldr	r0, [r7, #4]
 800c6c4:	f000 f869 	bl	800c79a <HAL_TIM_OC_DelayElapsedCallback>
        HAL_TIM_PWM_PulseFinishedCallback(htim);
 800c6c8:	6878      	ldr	r0, [r7, #4]
 800c6ca:	f000 f87a 	bl	800c7c2 <HAL_TIM_PWM_PulseFinishedCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
      }
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
 800c6ce:	687b      	ldr	r3, [r7, #4]
 800c6d0:	2200      	movs	r2, #0
 800c6d2:	771a      	strb	r2, [r3, #28]
    }
  }
  /* TIM Update event */
  if ((itflag & (TIM_FLAG_UPDATE)) == (TIM_FLAG_UPDATE))
 800c6d4:	68bb      	ldr	r3, [r7, #8]
 800c6d6:	f003 0301 	and.w	r3, r3, #1
 800c6da:	2b00      	cmp	r3, #0
 800c6dc:	d00c      	beq.n	800c6f8 <HAL_TIM_IRQHandler+0x16c>
  {
    if ((itsource & (TIM_IT_UPDATE)) == (TIM_IT_UPDATE))
 800c6de:	68fb      	ldr	r3, [r7, #12]
 800c6e0:	f003 0301 	and.w	r3, r3, #1
 800c6e4:	2b00      	cmp	r3, #0
 800c6e6:	d007      	beq.n	800c6f8 <HAL_TIM_IRQHandler+0x16c>
    {
      __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_UPDATE);
 800c6e8:	687b      	ldr	r3, [r7, #4]
 800c6ea:	681b      	ldr	r3, [r3, #0]
 800c6ec:	f06f 0201 	mvn.w	r2, #1
 800c6f0:	611a      	str	r2, [r3, #16]
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
      htim->PeriodElapsedCallback(htim);
#else
      HAL_TIM_PeriodElapsedCallback(htim);
 800c6f2:	6878      	ldr	r0, [r7, #4]
 800c6f4:	f7f5 fd92 	bl	800221c <HAL_TIM_PeriodElapsedCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
    }
  }
  /* TIM Break input event */
  if (((itflag & (TIM_FLAG_BREAK)) == (TIM_FLAG_BREAK)) || \
 800c6f8:	68bb      	ldr	r3, [r7, #8]
 800c6fa:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 800c6fe:	2b00      	cmp	r3, #0
 800c700:	d104      	bne.n	800c70c <HAL_TIM_IRQHandler+0x180>
      ((itflag & (TIM_FLAG_SYSTEM_BREAK)) == (TIM_FLAG_SYSTEM_BREAK)))
 800c702:	68bb      	ldr	r3, [r7, #8]
 800c704:	f403 5300 	and.w	r3, r3, #8192	@ 0x2000
  if (((itflag & (TIM_FLAG_BREAK)) == (TIM_FLAG_BREAK)) || \
 800c708:	2b00      	cmp	r3, #0
 800c70a:	d00c      	beq.n	800c726 <HAL_TIM_IRQHandler+0x19a>
  {
    if ((itsource & (TIM_IT_BREAK)) == (TIM_IT_BREAK))
 800c70c:	68fb      	ldr	r3, [r7, #12]
 800c70e:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 800c712:	2b00      	cmp	r3, #0
 800c714:	d007      	beq.n	800c726 <HAL_TIM_IRQHandler+0x19a>
    {
      __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_BREAK | TIM_FLAG_SYSTEM_BREAK);
 800c716:	687b      	ldr	r3, [r7, #4]
 800c718:	681b      	ldr	r3, [r3, #0]
 800c71a:	f46f 5202 	mvn.w	r2, #8320	@ 0x2080
 800c71e:	611a      	str	r2, [r3, #16]
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
      htim->BreakCallback(htim);
#else
      HAL_TIMEx_BreakCallback(htim);
 800c720:	6878      	ldr	r0, [r7, #4]
 800c722:	f000 f913 	bl	800c94c <HAL_TIMEx_BreakCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
    }
  }
  /* TIM Break2 input event */
  if ((itflag & (TIM_FLAG_BREAK2)) == (TIM_FLAG_BREAK2))
 800c726:	68bb      	ldr	r3, [r7, #8]
 800c728:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 800c72c:	2b00      	cmp	r3, #0
 800c72e:	d00c      	beq.n	800c74a <HAL_TIM_IRQHandler+0x1be>
  {
    if ((itsource & (TIM_IT_BREAK)) == (TIM_IT_BREAK))
 800c730:	68fb      	ldr	r3, [r7, #12]
 800c732:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 800c736:	2b00      	cmp	r3, #0
 800c738:	d007      	beq.n	800c74a <HAL_TIM_IRQHandler+0x1be>
    {
      __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_BREAK2);
 800c73a:	687b      	ldr	r3, [r7, #4]
 800c73c:	681b      	ldr	r3, [r3, #0]
 800c73e:	f46f 7280 	mvn.w	r2, #256	@ 0x100
 800c742:	611a      	str	r2, [r3, #16]
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
      htim->Break2Callback(htim);
#else
      HAL_TIMEx_Break2Callback(htim);
 800c744:	6878      	ldr	r0, [r7, #4]
 800c746:	f000 f90b 	bl	800c960 <HAL_TIMEx_Break2Callback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
    }
  }
  /* TIM Trigger detection event */
  if ((itflag & (TIM_FLAG_TRIGGER)) == (TIM_FLAG_TRIGGER))
 800c74a:	68bb      	ldr	r3, [r7, #8]
 800c74c:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 800c750:	2b00      	cmp	r3, #0
 800c752:	d00c      	beq.n	800c76e <HAL_TIM_IRQHandler+0x1e2>
  {
    if ((itsource & (TIM_IT_TRIGGER)) == (TIM_IT_TRIGGER))
 800c754:	68fb      	ldr	r3, [r7, #12]
 800c756:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 800c75a:	2b00      	cmp	r3, #0
 800c75c:	d007      	beq.n	800c76e <HAL_TIM_IRQHandler+0x1e2>
    {
      __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_TRIGGER);
 800c75e:	687b      	ldr	r3, [r7, #4]
 800c760:	681b      	ldr	r3, [r3, #0]
 800c762:	f06f 0240 	mvn.w	r2, #64	@ 0x40
 800c766:	611a      	str	r2, [r3, #16]
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
      htim->TriggerCallback(htim);
#else
      HAL_TIM_TriggerCallback(htim);
 800c768:	6878      	ldr	r0, [r7, #4]
 800c76a:	f000 f834 	bl	800c7d6 <HAL_TIM_TriggerCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
    }
  }
  /* TIM commutation event */
  if ((itflag & (TIM_FLAG_COM)) == (TIM_FLAG_COM))
 800c76e:	68bb      	ldr	r3, [r7, #8]
 800c770:	f003 0320 	and.w	r3, r3, #32
 800c774:	2b00      	cmp	r3, #0
 800c776:	d00c      	beq.n	800c792 <HAL_TIM_IRQHandler+0x206>
  {
    if ((itsource & (TIM_IT_COM)) == (TIM_IT_COM))
 800c778:	68fb      	ldr	r3, [r7, #12]
 800c77a:	f003 0320 	and.w	r3, r3, #32
 800c77e:	2b00      	cmp	r3, #0
 800c780:	d007      	beq.n	800c792 <HAL_TIM_IRQHandler+0x206>
    {
      __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_COM);
 800c782:	687b      	ldr	r3, [r7, #4]
 800c784:	681b      	ldr	r3, [r3, #0]
 800c786:	f06f 0220 	mvn.w	r2, #32
 800c78a:	611a      	str	r2, [r3, #16]
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
      htim->CommutationCallback(htim);
#else
      HAL_TIMEx_CommutCallback(htim);
 800c78c:	6878      	ldr	r0, [r7, #4]
 800c78e:	f000 f8d3 	bl	800c938 <HAL_TIMEx_CommutCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
    }
  }
}
 800c792:	bf00      	nop
 800c794:	3710      	adds	r7, #16
 800c796:	46bd      	mov	sp, r7
 800c798:	bd80      	pop	{r7, pc}

0800c79a <HAL_TIM_OC_DelayElapsedCallback>:
  * @brief  Output Compare callback in non-blocking mode
  * @param  htim TIM OC handle
  * @retval None
  */
__weak void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim)
{
 800c79a:	b480      	push	{r7}
 800c79c:	b083      	sub	sp, #12
 800c79e:	af00      	add	r7, sp, #0
 800c7a0:	6078      	str	r0, [r7, #4]
  UNUSED(htim);

  /* NOTE : This function should not be modified, when the callback is needed,
            the HAL_TIM_OC_DelayElapsedCallback could be implemented in the user file
   */
}
 800c7a2:	bf00      	nop
 800c7a4:	370c      	adds	r7, #12
 800c7a6:	46bd      	mov	sp, r7
 800c7a8:	f85d 7b04 	ldr.w	r7, [sp], #4
 800c7ac:	4770      	bx	lr

0800c7ae <HAL_TIM_IC_CaptureCallback>:
  * @brief  Input Capture callback in non-blocking mode
  * @param  htim TIM IC handle
  * @retval None
  */
__weak void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim)
{
 800c7ae:	b480      	push	{r7}
 800c7b0:	b083      	sub	sp, #12
 800c7b2:	af00      	add	r7, sp, #0
 800c7b4:	6078      	str	r0, [r7, #4]
  UNUSED(htim);

  /* NOTE : This function should not be modified, when the callback is needed,
            the HAL_TIM_IC_CaptureCallback could be implemented in the user file
   */
}
 800c7b6:	bf00      	nop
 800c7b8:	370c      	adds	r7, #12
 800c7ba:	46bd      	mov	sp, r7
 800c7bc:	f85d 7b04 	ldr.w	r7, [sp], #4
 800c7c0:	4770      	bx	lr

0800c7c2 <HAL_TIM_PWM_PulseFinishedCallback>:
  * @brief  PWM Pulse finished callback in non-blocking mode
  * @param  htim TIM handle
  * @retval None
  */
__weak void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim)
{
 800c7c2:	b480      	push	{r7}
 800c7c4:	b083      	sub	sp, #12
 800c7c6:	af00      	add	r7, sp, #0
 800c7c8:	6078      	str	r0, [r7, #4]
  UNUSED(htim);

  /* NOTE : This function should not be modified, when the callback is needed,
            the HAL_TIM_PWM_PulseFinishedCallback could be implemented in the user file
   */
}
 800c7ca:	bf00      	nop
 800c7cc:	370c      	adds	r7, #12
 800c7ce:	46bd      	mov	sp, r7
 800c7d0:	f85d 7b04 	ldr.w	r7, [sp], #4
 800c7d4:	4770      	bx	lr

0800c7d6 <HAL_TIM_TriggerCallback>:
  * @brief  Hall Trigger detection callback in non-blocking mode
  * @param  htim TIM handle
  * @retval None
  */
__weak void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim)
{
 800c7d6:	b480      	push	{r7}
 800c7d8:	b083      	sub	sp, #12
 800c7da:	af00      	add	r7, sp, #0
 800c7dc:	6078      	str	r0, [r7, #4]
  UNUSED(htim);

  /* NOTE : This function should not be modified, when the callback is needed,
            the HAL_TIM_TriggerCallback could be implemented in the user file
   */
}
 800c7de:	bf00      	nop
 800c7e0:	370c      	adds	r7, #12
 800c7e2:	46bd      	mov	sp, r7
 800c7e4:	f85d 7b04 	ldr.w	r7, [sp], #4
 800c7e8:	4770      	bx	lr
	...

0800c7ec <TIM_Base_SetConfig>:
  * @param  TIMx TIM peripheral
  * @param  Structure TIM Base configuration structure
  * @retval None
  */
void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure)
{
 800c7ec:	b480      	push	{r7}
 800c7ee:	b085      	sub	sp, #20
 800c7f0:	af00      	add	r7, sp, #0
 800c7f2:	6078      	str	r0, [r7, #4]
 800c7f4:	6039      	str	r1, [r7, #0]
  uint32_t tmpcr1;
  tmpcr1 = TIMx->CR1;
 800c7f6:	687b      	ldr	r3, [r7, #4]
 800c7f8:	681b      	ldr	r3, [r3, #0]
 800c7fa:	60fb      	str	r3, [r7, #12]

  /* Set TIM Time Base Unit parameters ---------------------------------------*/
  if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx))
 800c7fc:	687b      	ldr	r3, [r7, #4]
 800c7fe:	4a46      	ldr	r2, [pc, #280]	@ (800c918 <TIM_Base_SetConfig+0x12c>)
 800c800:	4293      	cmp	r3, r2
 800c802:	d013      	beq.n	800c82c <TIM_Base_SetConfig+0x40>
 800c804:	687b      	ldr	r3, [r7, #4]
 800c806:	f1b3 4f80 	cmp.w	r3, #1073741824	@ 0x40000000
 800c80a:	d00f      	beq.n	800c82c <TIM_Base_SetConfig+0x40>
 800c80c:	687b      	ldr	r3, [r7, #4]
 800c80e:	4a43      	ldr	r2, [pc, #268]	@ (800c91c <TIM_Base_SetConfig+0x130>)
 800c810:	4293      	cmp	r3, r2
 800c812:	d00b      	beq.n	800c82c <TIM_Base_SetConfig+0x40>
 800c814:	687b      	ldr	r3, [r7, #4]
 800c816:	4a42      	ldr	r2, [pc, #264]	@ (800c920 <TIM_Base_SetConfig+0x134>)
 800c818:	4293      	cmp	r3, r2
 800c81a:	d007      	beq.n	800c82c <TIM_Base_SetConfig+0x40>
 800c81c:	687b      	ldr	r3, [r7, #4]
 800c81e:	4a41      	ldr	r2, [pc, #260]	@ (800c924 <TIM_Base_SetConfig+0x138>)
 800c820:	4293      	cmp	r3, r2
 800c822:	d003      	beq.n	800c82c <TIM_Base_SetConfig+0x40>
 800c824:	687b      	ldr	r3, [r7, #4]
 800c826:	4a40      	ldr	r2, [pc, #256]	@ (800c928 <TIM_Base_SetConfig+0x13c>)
 800c828:	4293      	cmp	r3, r2
 800c82a:	d108      	bne.n	800c83e <TIM_Base_SetConfig+0x52>
  {
    /* Select the Counter Mode */
    tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
 800c82c:	68fb      	ldr	r3, [r7, #12]
 800c82e:	f023 0370 	bic.w	r3, r3, #112	@ 0x70
 800c832:	60fb      	str	r3, [r7, #12]
    tmpcr1 |= Structure->CounterMode;
 800c834:	683b      	ldr	r3, [r7, #0]
 800c836:	685b      	ldr	r3, [r3, #4]
 800c838:	68fa      	ldr	r2, [r7, #12]
 800c83a:	4313      	orrs	r3, r2
 800c83c:	60fb      	str	r3, [r7, #12]
  }

  if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx))
 800c83e:	687b      	ldr	r3, [r7, #4]
 800c840:	4a35      	ldr	r2, [pc, #212]	@ (800c918 <TIM_Base_SetConfig+0x12c>)
 800c842:	4293      	cmp	r3, r2
 800c844:	d01f      	beq.n	800c886 <TIM_Base_SetConfig+0x9a>
 800c846:	687b      	ldr	r3, [r7, #4]
 800c848:	f1b3 4f80 	cmp.w	r3, #1073741824	@ 0x40000000
 800c84c:	d01b      	beq.n	800c886 <TIM_Base_SetConfig+0x9a>
 800c84e:	687b      	ldr	r3, [r7, #4]
 800c850:	4a32      	ldr	r2, [pc, #200]	@ (800c91c <TIM_Base_SetConfig+0x130>)
 800c852:	4293      	cmp	r3, r2
 800c854:	d017      	beq.n	800c886 <TIM_Base_SetConfig+0x9a>
 800c856:	687b      	ldr	r3, [r7, #4]
 800c858:	4a31      	ldr	r2, [pc, #196]	@ (800c920 <TIM_Base_SetConfig+0x134>)
 800c85a:	4293      	cmp	r3, r2
 800c85c:	d013      	beq.n	800c886 <TIM_Base_SetConfig+0x9a>
 800c85e:	687b      	ldr	r3, [r7, #4]
 800c860:	4a30      	ldr	r2, [pc, #192]	@ (800c924 <TIM_Base_SetConfig+0x138>)
 800c862:	4293      	cmp	r3, r2
 800c864:	d00f      	beq.n	800c886 <TIM_Base_SetConfig+0x9a>
 800c866:	687b      	ldr	r3, [r7, #4]
 800c868:	4a2f      	ldr	r2, [pc, #188]	@ (800c928 <TIM_Base_SetConfig+0x13c>)
 800c86a:	4293      	cmp	r3, r2
 800c86c:	d00b      	beq.n	800c886 <TIM_Base_SetConfig+0x9a>
 800c86e:	687b      	ldr	r3, [r7, #4]
 800c870:	4a2e      	ldr	r2, [pc, #184]	@ (800c92c <TIM_Base_SetConfig+0x140>)
 800c872:	4293      	cmp	r3, r2
 800c874:	d007      	beq.n	800c886 <TIM_Base_SetConfig+0x9a>
 800c876:	687b      	ldr	r3, [r7, #4]
 800c878:	4a2d      	ldr	r2, [pc, #180]	@ (800c930 <TIM_Base_SetConfig+0x144>)
 800c87a:	4293      	cmp	r3, r2
 800c87c:	d003      	beq.n	800c886 <TIM_Base_SetConfig+0x9a>
 800c87e:	687b      	ldr	r3, [r7, #4]
 800c880:	4a2c      	ldr	r2, [pc, #176]	@ (800c934 <TIM_Base_SetConfig+0x148>)
 800c882:	4293      	cmp	r3, r2
 800c884:	d108      	bne.n	800c898 <TIM_Base_SetConfig+0xac>
  {
    /* Set the clock division */
    tmpcr1 &= ~TIM_CR1_CKD;
 800c886:	68fb      	ldr	r3, [r7, #12]
 800c888:	f423 7340 	bic.w	r3, r3, #768	@ 0x300
 800c88c:	60fb      	str	r3, [r7, #12]
    tmpcr1 |= (uint32_t)Structure->ClockDivision;
 800c88e:	683b      	ldr	r3, [r7, #0]
 800c890:	68db      	ldr	r3, [r3, #12]
 800c892:	68fa      	ldr	r2, [r7, #12]
 800c894:	4313      	orrs	r3, r2
 800c896:	60fb      	str	r3, [r7, #12]
  }

  /* Set the auto-reload preload */
  MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload);
 800c898:	68fb      	ldr	r3, [r7, #12]
 800c89a:	f023 0280 	bic.w	r2, r3, #128	@ 0x80
 800c89e:	683b      	ldr	r3, [r7, #0]
 800c8a0:	695b      	ldr	r3, [r3, #20]
 800c8a2:	4313      	orrs	r3, r2
 800c8a4:	60fb      	str	r3, [r7, #12]

  TIMx->CR1 = tmpcr1;
 800c8a6:	687b      	ldr	r3, [r7, #4]
 800c8a8:	68fa      	ldr	r2, [r7, #12]
 800c8aa:	601a      	str	r2, [r3, #0]

  /* Set the Autoreload value */
  TIMx->ARR = (uint32_t)Structure->Period ;
 800c8ac:	683b      	ldr	r3, [r7, #0]
 800c8ae:	689a      	ldr	r2, [r3, #8]
 800c8b0:	687b      	ldr	r3, [r7, #4]
 800c8b2:	62da      	str	r2, [r3, #44]	@ 0x2c

  /* Set the Prescaler value */
  TIMx->PSC = Structure->Prescaler;
 800c8b4:	683b      	ldr	r3, [r7, #0]
 800c8b6:	681a      	ldr	r2, [r3, #0]
 800c8b8:	687b      	ldr	r3, [r7, #4]
 800c8ba:	629a      	str	r2, [r3, #40]	@ 0x28

  if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx))
 800c8bc:	687b      	ldr	r3, [r7, #4]
 800c8be:	4a16      	ldr	r2, [pc, #88]	@ (800c918 <TIM_Base_SetConfig+0x12c>)
 800c8c0:	4293      	cmp	r3, r2
 800c8c2:	d00f      	beq.n	800c8e4 <TIM_Base_SetConfig+0xf8>
 800c8c4:	687b      	ldr	r3, [r7, #4]
 800c8c6:	4a18      	ldr	r2, [pc, #96]	@ (800c928 <TIM_Base_SetConfig+0x13c>)
 800c8c8:	4293      	cmp	r3, r2
 800c8ca:	d00b      	beq.n	800c8e4 <TIM_Base_SetConfig+0xf8>
 800c8cc:	687b      	ldr	r3, [r7, #4]
 800c8ce:	4a17      	ldr	r2, [pc, #92]	@ (800c92c <TIM_Base_SetConfig+0x140>)
 800c8d0:	4293      	cmp	r3, r2
 800c8d2:	d007      	beq.n	800c8e4 <TIM_Base_SetConfig+0xf8>
 800c8d4:	687b      	ldr	r3, [r7, #4]
 800c8d6:	4a16      	ldr	r2, [pc, #88]	@ (800c930 <TIM_Base_SetConfig+0x144>)
 800c8d8:	4293      	cmp	r3, r2
 800c8da:	d003      	beq.n	800c8e4 <TIM_Base_SetConfig+0xf8>
 800c8dc:	687b      	ldr	r3, [r7, #4]
 800c8de:	4a15      	ldr	r2, [pc, #84]	@ (800c934 <TIM_Base_SetConfig+0x148>)
 800c8e0:	4293      	cmp	r3, r2
 800c8e2:	d103      	bne.n	800c8ec <TIM_Base_SetConfig+0x100>
  {
    /* Set the Repetition Counter value */
    TIMx->RCR = Structure->RepetitionCounter;
 800c8e4:	683b      	ldr	r3, [r7, #0]
 800c8e6:	691a      	ldr	r2, [r3, #16]
 800c8e8:	687b      	ldr	r3, [r7, #4]
 800c8ea:	631a      	str	r2, [r3, #48]	@ 0x30
  }

  /* Generate an update event to reload the Prescaler
     and the repetition counter (only for advanced timer) value immediately */
  TIMx->EGR = TIM_EGR_UG;
 800c8ec:	687b      	ldr	r3, [r7, #4]
 800c8ee:	2201      	movs	r2, #1
 800c8f0:	615a      	str	r2, [r3, #20]

  /* Check if the update flag is set after the Update Generation, if so clear the UIF flag */
  if (HAL_IS_BIT_SET(TIMx->SR, TIM_FLAG_UPDATE))
 800c8f2:	687b      	ldr	r3, [r7, #4]
 800c8f4:	691b      	ldr	r3, [r3, #16]
 800c8f6:	f003 0301 	and.w	r3, r3, #1
 800c8fa:	2b01      	cmp	r3, #1
 800c8fc:	d105      	bne.n	800c90a <TIM_Base_SetConfig+0x11e>
  {
    /* Clear the update flag */
    CLEAR_BIT(TIMx->SR, TIM_FLAG_UPDATE);
 800c8fe:	687b      	ldr	r3, [r7, #4]
 800c900:	691b      	ldr	r3, [r3, #16]
 800c902:	f023 0201 	bic.w	r2, r3, #1
 800c906:	687b      	ldr	r3, [r7, #4]
 800c908:	611a      	str	r2, [r3, #16]
  }
}
 800c90a:	bf00      	nop
 800c90c:	3714      	adds	r7, #20
 800c90e:	46bd      	mov	sp, r7
 800c910:	f85d 7b04 	ldr.w	r7, [sp], #4
 800c914:	4770      	bx	lr
 800c916:	bf00      	nop
 800c918:	40010000 	.word	0x40010000
 800c91c:	40000400 	.word	0x40000400
 800c920:	40000800 	.word	0x40000800
 800c924:	40000c00 	.word	0x40000c00
 800c928:	40010400 	.word	0x40010400
 800c92c:	40014000 	.word	0x40014000
 800c930:	40014400 	.word	0x40014400
 800c934:	40014800 	.word	0x40014800

0800c938 <HAL_TIMEx_CommutCallback>:
  * @brief  Commutation callback in non-blocking mode
  * @param  htim TIM handle
  * @retval None
  */
__weak void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim)
{
 800c938:	b480      	push	{r7}
 800c93a:	b083      	sub	sp, #12
 800c93c:	af00      	add	r7, sp, #0
 800c93e:	6078      	str	r0, [r7, #4]
  UNUSED(htim);

  /* NOTE : This function should not be modified, when the callback is needed,
            the HAL_TIMEx_CommutCallback could be implemented in the user file
   */
}
 800c940:	bf00      	nop
 800c942:	370c      	adds	r7, #12
 800c944:	46bd      	mov	sp, r7
 800c946:	f85d 7b04 	ldr.w	r7, [sp], #4
 800c94a:	4770      	bx	lr

0800c94c <HAL_TIMEx_BreakCallback>:
  * @brief  Break detection callback in non-blocking mode
  * @param  htim TIM handle
  * @retval None
  */
__weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim)
{
 800c94c:	b480      	push	{r7}
 800c94e:	b083      	sub	sp, #12
 800c950:	af00      	add	r7, sp, #0
 800c952:	6078      	str	r0, [r7, #4]
  UNUSED(htim);

  /* NOTE : This function should not be modified, when the callback is needed,
            the HAL_TIMEx_BreakCallback could be implemented in the user file
   */
}
 800c954:	bf00      	nop
 800c956:	370c      	adds	r7, #12
 800c958:	46bd      	mov	sp, r7
 800c95a:	f85d 7b04 	ldr.w	r7, [sp], #4
 800c95e:	4770      	bx	lr

0800c960 <HAL_TIMEx_Break2Callback>:
  * @brief  Break2 detection callback in non blocking mode
  * @param  htim: TIM handle
  * @retval None
  */
__weak void HAL_TIMEx_Break2Callback(TIM_HandleTypeDef *htim)
{
 800c960:	b480      	push	{r7}
 800c962:	b083      	sub	sp, #12
 800c964:	af00      	add	r7, sp, #0
 800c966:	6078      	str	r0, [r7, #4]
  UNUSED(htim);

  /* NOTE : This function Should not be modified, when the callback is needed,
            the HAL_TIMEx_Break2Callback could be implemented in the user file
   */
}
 800c968:	bf00      	nop
 800c96a:	370c      	adds	r7, #12
 800c96c:	46bd      	mov	sp, r7
 800c96e:	f85d 7b04 	ldr.w	r7, [sp], #4
 800c972:	4770      	bx	lr

0800c974 <HAL_UART_Init>:
  *        parameters in the UART_InitTypeDef and initialize the associated handle.
  * @param huart UART handle.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart)
{
 800c974:	b580      	push	{r7, lr}
 800c976:	b082      	sub	sp, #8
 800c978:	af00      	add	r7, sp, #0
 800c97a:	6078      	str	r0, [r7, #4]
  /* Check the UART handle allocation */
  if (huart == NULL)
 800c97c:	687b      	ldr	r3, [r7, #4]
 800c97e:	2b00      	cmp	r3, #0
 800c980:	d101      	bne.n	800c986 <HAL_UART_Init+0x12>
  {
    return HAL_ERROR;
 800c982:	2301      	movs	r3, #1
 800c984:	e042      	b.n	800ca0c <HAL_UART_Init+0x98>
  {
    /* Check the parameters */
    assert_param((IS_UART_INSTANCE(huart->Instance)) || (IS_LPUART_INSTANCE(huart->Instance)));
  }

  if (huart->gState == HAL_UART_STATE_RESET)
 800c986:	687b      	ldr	r3, [r7, #4]
 800c988:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 800c98c:	2b00      	cmp	r3, #0
 800c98e:	d106      	bne.n	800c99e <HAL_UART_Init+0x2a>
  {
    /* Allocate lock resource and initialize it */
    huart->Lock = HAL_UNLOCKED;
 800c990:	687b      	ldr	r3, [r7, #4]
 800c992:	2200      	movs	r2, #0
 800c994:	f883 2084 	strb.w	r2, [r3, #132]	@ 0x84

    /* Init the low level hardware */
    huart->MspInitCallback(huart);
#else
    /* Init the low level hardware : GPIO, CLOCK */
    HAL_UART_MspInit(huart);
 800c998:	6878      	ldr	r0, [r7, #4]
 800c99a:	f7f6 fef9 	bl	8003790 <HAL_UART_MspInit>
#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
  }

  huart->gState = HAL_UART_STATE_BUSY;
 800c99e:	687b      	ldr	r3, [r7, #4]
 800c9a0:	2224      	movs	r2, #36	@ 0x24
 800c9a2:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88

  __HAL_UART_DISABLE(huart);
 800c9a6:	687b      	ldr	r3, [r7, #4]
 800c9a8:	681b      	ldr	r3, [r3, #0]
 800c9aa:	681a      	ldr	r2, [r3, #0]
 800c9ac:	687b      	ldr	r3, [r7, #4]
 800c9ae:	681b      	ldr	r3, [r3, #0]
 800c9b0:	f022 0201 	bic.w	r2, r2, #1
 800c9b4:	601a      	str	r2, [r3, #0]

  /* Perform advanced settings configuration */
  /* For some items, configuration requires to be done prior TE and RE bits are set */
  if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
 800c9b6:	687b      	ldr	r3, [r7, #4]
 800c9b8:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800c9ba:	2b00      	cmp	r3, #0
 800c9bc:	d002      	beq.n	800c9c4 <HAL_UART_Init+0x50>
  {
    UART_AdvFeatureConfig(huart);
 800c9be:	6878      	ldr	r0, [r7, #4]
 800c9c0:	f001 f9e8 	bl	800dd94 <UART_AdvFeatureConfig>
  }

  /* Set the UART Communication parameters */
  if (UART_SetConfig(huart) == HAL_ERROR)
 800c9c4:	6878      	ldr	r0, [r7, #4]
 800c9c6:	f000 fc7d 	bl	800d2c4 <UART_SetConfig>
 800c9ca:	4603      	mov	r3, r0
 800c9cc:	2b01      	cmp	r3, #1
 800c9ce:	d101      	bne.n	800c9d4 <HAL_UART_Init+0x60>
  {
    return HAL_ERROR;
 800c9d0:	2301      	movs	r3, #1
 800c9d2:	e01b      	b.n	800ca0c <HAL_UART_Init+0x98>
  }

  /* In asynchronous mode, the following bits must be kept cleared:
  - LINEN and CLKEN bits in the USART_CR2 register,
  - SCEN, HDSEL and IREN  bits in the USART_CR3 register.*/
  CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
 800c9d4:	687b      	ldr	r3, [r7, #4]
 800c9d6:	681b      	ldr	r3, [r3, #0]
 800c9d8:	685a      	ldr	r2, [r3, #4]
 800c9da:	687b      	ldr	r3, [r7, #4]
 800c9dc:	681b      	ldr	r3, [r3, #0]
 800c9de:	f422 4290 	bic.w	r2, r2, #18432	@ 0x4800
 800c9e2:	605a      	str	r2, [r3, #4]
  CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
 800c9e4:	687b      	ldr	r3, [r7, #4]
 800c9e6:	681b      	ldr	r3, [r3, #0]
 800c9e8:	689a      	ldr	r2, [r3, #8]
 800c9ea:	687b      	ldr	r3, [r7, #4]
 800c9ec:	681b      	ldr	r3, [r3, #0]
 800c9ee:	f022 022a 	bic.w	r2, r2, #42	@ 0x2a
 800c9f2:	609a      	str	r2, [r3, #8]

  __HAL_UART_ENABLE(huart);
 800c9f4:	687b      	ldr	r3, [r7, #4]
 800c9f6:	681b      	ldr	r3, [r3, #0]
 800c9f8:	681a      	ldr	r2, [r3, #0]
 800c9fa:	687b      	ldr	r3, [r7, #4]
 800c9fc:	681b      	ldr	r3, [r3, #0]
 800c9fe:	f042 0201 	orr.w	r2, r2, #1
 800ca02:	601a      	str	r2, [r3, #0]

  /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */
  return (UART_CheckIdleState(huart));
 800ca04:	6878      	ldr	r0, [r7, #4]
 800ca06:	f001 fa67 	bl	800ded8 <UART_CheckIdleState>
 800ca0a:	4603      	mov	r3, r0
}
 800ca0c:	4618      	mov	r0, r3
 800ca0e:	3708      	adds	r7, #8
 800ca10:	46bd      	mov	sp, r7
 800ca12:	bd80      	pop	{r7, pc}

0800ca14 <HAL_UART_Transmit_IT>:
  * @param pData Pointer to data buffer (u8 or u16 data elements).
  * @param Size  Amount of data elements (u8 or u16) to be sent.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size)
{
 800ca14:	b480      	push	{r7}
 800ca16:	b091      	sub	sp, #68	@ 0x44
 800ca18:	af00      	add	r7, sp, #0
 800ca1a:	60f8      	str	r0, [r7, #12]
 800ca1c:	60b9      	str	r1, [r7, #8]
 800ca1e:	4613      	mov	r3, r2
 800ca20:	80fb      	strh	r3, [r7, #6]
  /* Check that a Tx process is not already ongoing */
  if (huart->gState == HAL_UART_STATE_READY)
 800ca22:	68fb      	ldr	r3, [r7, #12]
 800ca24:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 800ca28:	2b20      	cmp	r3, #32
 800ca2a:	d178      	bne.n	800cb1e <HAL_UART_Transmit_IT+0x10a>
  {
    if ((pData == NULL) || (Size == 0U))
 800ca2c:	68bb      	ldr	r3, [r7, #8]
 800ca2e:	2b00      	cmp	r3, #0
 800ca30:	d002      	beq.n	800ca38 <HAL_UART_Transmit_IT+0x24>
 800ca32:	88fb      	ldrh	r3, [r7, #6]
 800ca34:	2b00      	cmp	r3, #0
 800ca36:	d101      	bne.n	800ca3c <HAL_UART_Transmit_IT+0x28>
    {
      return HAL_ERROR;
 800ca38:	2301      	movs	r3, #1
 800ca3a:	e071      	b.n	800cb20 <HAL_UART_Transmit_IT+0x10c>
    }

    huart->pTxBuffPtr  = pData;
 800ca3c:	68fb      	ldr	r3, [r7, #12]
 800ca3e:	68ba      	ldr	r2, [r7, #8]
 800ca40:	651a      	str	r2, [r3, #80]	@ 0x50
    huart->TxXferSize  = Size;
 800ca42:	68fb      	ldr	r3, [r7, #12]
 800ca44:	88fa      	ldrh	r2, [r7, #6]
 800ca46:	f8a3 2054 	strh.w	r2, [r3, #84]	@ 0x54
    huart->TxXferCount = Size;
 800ca4a:	68fb      	ldr	r3, [r7, #12]
 800ca4c:	88fa      	ldrh	r2, [r7, #6]
 800ca4e:	f8a3 2056 	strh.w	r2, [r3, #86]	@ 0x56
    huart->TxISR       = NULL;
 800ca52:	68fb      	ldr	r3, [r7, #12]
 800ca54:	2200      	movs	r2, #0
 800ca56:	679a      	str	r2, [r3, #120]	@ 0x78

    huart->ErrorCode = HAL_UART_ERROR_NONE;
 800ca58:	68fb      	ldr	r3, [r7, #12]
 800ca5a:	2200      	movs	r2, #0
 800ca5c:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
    huart->gState = HAL_UART_STATE_BUSY_TX;
 800ca60:	68fb      	ldr	r3, [r7, #12]
 800ca62:	2221      	movs	r2, #33	@ 0x21
 800ca64:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88

    /* Configure Tx interrupt processing */
    if (huart->FifoMode == UART_FIFOMODE_ENABLE)
 800ca68:	68fb      	ldr	r3, [r7, #12]
 800ca6a:	6e5b      	ldr	r3, [r3, #100]	@ 0x64
 800ca6c:	f1b3 5f00 	cmp.w	r3, #536870912	@ 0x20000000
 800ca70:	d12a      	bne.n	800cac8 <HAL_UART_Transmit_IT+0xb4>
    {
      /* Set the Tx ISR function pointer according to the data word length */
      if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
 800ca72:	68fb      	ldr	r3, [r7, #12]
 800ca74:	689b      	ldr	r3, [r3, #8]
 800ca76:	f5b3 5f80 	cmp.w	r3, #4096	@ 0x1000
 800ca7a:	d107      	bne.n	800ca8c <HAL_UART_Transmit_IT+0x78>
 800ca7c:	68fb      	ldr	r3, [r7, #12]
 800ca7e:	691b      	ldr	r3, [r3, #16]
 800ca80:	2b00      	cmp	r3, #0
 800ca82:	d103      	bne.n	800ca8c <HAL_UART_Transmit_IT+0x78>
      {
        huart->TxISR = UART_TxISR_16BIT_FIFOEN;
 800ca84:	68fb      	ldr	r3, [r7, #12]
 800ca86:	4a29      	ldr	r2, [pc, #164]	@ (800cb2c <HAL_UART_Transmit_IT+0x118>)
 800ca88:	679a      	str	r2, [r3, #120]	@ 0x78
 800ca8a:	e002      	b.n	800ca92 <HAL_UART_Transmit_IT+0x7e>
      }
      else
      {
        huart->TxISR = UART_TxISR_8BIT_FIFOEN;
 800ca8c:	68fb      	ldr	r3, [r7, #12]
 800ca8e:	4a28      	ldr	r2, [pc, #160]	@ (800cb30 <HAL_UART_Transmit_IT+0x11c>)
 800ca90:	679a      	str	r2, [r3, #120]	@ 0x78
      }

      /* Enable the TX FIFO threshold interrupt */
      ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_TXFTIE);
 800ca92:	68fb      	ldr	r3, [r7, #12]
 800ca94:	681b      	ldr	r3, [r3, #0]
 800ca96:	3308      	adds	r3, #8
 800ca98:	62bb      	str	r3, [r7, #40]	@ 0x28
 */
__STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr)
{
    uint32_t result;

   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800ca9a:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 800ca9c:	e853 3f00 	ldrex	r3, [r3]
 800caa0:	627b      	str	r3, [r7, #36]	@ 0x24
   return(result);
 800caa2:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800caa4:	f443 0300 	orr.w	r3, r3, #8388608	@ 0x800000
 800caa8:	63bb      	str	r3, [r7, #56]	@ 0x38
 800caaa:	68fb      	ldr	r3, [r7, #12]
 800caac:	681b      	ldr	r3, [r3, #0]
 800caae:	3308      	adds	r3, #8
 800cab0:	6bba      	ldr	r2, [r7, #56]	@ 0x38
 800cab2:	637a      	str	r2, [r7, #52]	@ 0x34
 800cab4:	633b      	str	r3, [r7, #48]	@ 0x30
 */
__STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
{
   uint32_t result;

   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800cab6:	6b39      	ldr	r1, [r7, #48]	@ 0x30
 800cab8:	6b7a      	ldr	r2, [r7, #52]	@ 0x34
 800caba:	e841 2300 	strex	r3, r2, [r1]
 800cabe:	62fb      	str	r3, [r7, #44]	@ 0x2c
   return(result);
 800cac0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 800cac2:	2b00      	cmp	r3, #0
 800cac4:	d1e5      	bne.n	800ca92 <HAL_UART_Transmit_IT+0x7e>
 800cac6:	e028      	b.n	800cb1a <HAL_UART_Transmit_IT+0x106>
    }
    else
    {
      /* Set the Tx ISR function pointer according to the data word length */
      if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
 800cac8:	68fb      	ldr	r3, [r7, #12]
 800caca:	689b      	ldr	r3, [r3, #8]
 800cacc:	f5b3 5f80 	cmp.w	r3, #4096	@ 0x1000
 800cad0:	d107      	bne.n	800cae2 <HAL_UART_Transmit_IT+0xce>
 800cad2:	68fb      	ldr	r3, [r7, #12]
 800cad4:	691b      	ldr	r3, [r3, #16]
 800cad6:	2b00      	cmp	r3, #0
 800cad8:	d103      	bne.n	800cae2 <HAL_UART_Transmit_IT+0xce>
      {
        huart->TxISR = UART_TxISR_16BIT;
 800cada:	68fb      	ldr	r3, [r7, #12]
 800cadc:	4a15      	ldr	r2, [pc, #84]	@ (800cb34 <HAL_UART_Transmit_IT+0x120>)
 800cade:	679a      	str	r2, [r3, #120]	@ 0x78
 800cae0:	e002      	b.n	800cae8 <HAL_UART_Transmit_IT+0xd4>
      }
      else
      {
        huart->TxISR = UART_TxISR_8BIT;
 800cae2:	68fb      	ldr	r3, [r7, #12]
 800cae4:	4a14      	ldr	r2, [pc, #80]	@ (800cb38 <HAL_UART_Transmit_IT+0x124>)
 800cae6:	679a      	str	r2, [r3, #120]	@ 0x78
      }

      /* Enable the Transmit Data Register Empty interrupt */
      ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE);
 800cae8:	68fb      	ldr	r3, [r7, #12]
 800caea:	681b      	ldr	r3, [r3, #0]
 800caec:	617b      	str	r3, [r7, #20]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800caee:	697b      	ldr	r3, [r7, #20]
 800caf0:	e853 3f00 	ldrex	r3, [r3]
 800caf4:	613b      	str	r3, [r7, #16]
   return(result);
 800caf6:	693b      	ldr	r3, [r7, #16]
 800caf8:	f043 0380 	orr.w	r3, r3, #128	@ 0x80
 800cafc:	63fb      	str	r3, [r7, #60]	@ 0x3c
 800cafe:	68fb      	ldr	r3, [r7, #12]
 800cb00:	681b      	ldr	r3, [r3, #0]
 800cb02:	461a      	mov	r2, r3
 800cb04:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800cb06:	623b      	str	r3, [r7, #32]
 800cb08:	61fa      	str	r2, [r7, #28]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800cb0a:	69f9      	ldr	r1, [r7, #28]
 800cb0c:	6a3a      	ldr	r2, [r7, #32]
 800cb0e:	e841 2300 	strex	r3, r2, [r1]
 800cb12:	61bb      	str	r3, [r7, #24]
   return(result);
 800cb14:	69bb      	ldr	r3, [r7, #24]
 800cb16:	2b00      	cmp	r3, #0
 800cb18:	d1e6      	bne.n	800cae8 <HAL_UART_Transmit_IT+0xd4>
    }

    return HAL_OK;
 800cb1a:	2300      	movs	r3, #0
 800cb1c:	e000      	b.n	800cb20 <HAL_UART_Transmit_IT+0x10c>
  }
  else
  {
    return HAL_BUSY;
 800cb1e:	2302      	movs	r3, #2
  }
}
 800cb20:	4618      	mov	r0, r3
 800cb22:	3744      	adds	r7, #68	@ 0x44
 800cb24:	46bd      	mov	sp, r7
 800cb26:	f85d 7b04 	ldr.w	r7, [sp], #4
 800cb2a:	4770      	bx	lr
 800cb2c:	0800e69f 	.word	0x0800e69f
 800cb30:	0800e5bf 	.word	0x0800e5bf
 800cb34:	0800e4fd 	.word	0x0800e4fd
 800cb38:	0800e445 	.word	0x0800e445

0800cb3c <HAL_UART_IRQHandler>:
  * @brief Handle UART interrupt request.
  * @param huart UART handle.
  * @retval None
  */
void HAL_UART_IRQHandler(UART_HandleTypeDef *huart)
{
 800cb3c:	b580      	push	{r7, lr}
 800cb3e:	b0ba      	sub	sp, #232	@ 0xe8
 800cb40:	af00      	add	r7, sp, #0
 800cb42:	6078      	str	r0, [r7, #4]
  uint32_t isrflags   = READ_REG(huart->Instance->ISR);
 800cb44:	687b      	ldr	r3, [r7, #4]
 800cb46:	681b      	ldr	r3, [r3, #0]
 800cb48:	69db      	ldr	r3, [r3, #28]
 800cb4a:	f8c7 30e4 	str.w	r3, [r7, #228]	@ 0xe4
  uint32_t cr1its     = READ_REG(huart->Instance->CR1);
 800cb4e:	687b      	ldr	r3, [r7, #4]
 800cb50:	681b      	ldr	r3, [r3, #0]
 800cb52:	681b      	ldr	r3, [r3, #0]
 800cb54:	f8c7 30e0 	str.w	r3, [r7, #224]	@ 0xe0
  uint32_t cr3its     = READ_REG(huart->Instance->CR3);
 800cb58:	687b      	ldr	r3, [r7, #4]
 800cb5a:	681b      	ldr	r3, [r3, #0]
 800cb5c:	689b      	ldr	r3, [r3, #8]
 800cb5e:	f8c7 30dc 	str.w	r3, [r7, #220]	@ 0xdc

  uint32_t errorflags;
  uint32_t errorcode;

  /* If no error occurs */
  errorflags = (isrflags & (uint32_t)(USART_ISR_PE | USART_ISR_FE | USART_ISR_ORE | USART_ISR_NE | USART_ISR_RTOF));
 800cb62:	f8d7 20e4 	ldr.w	r2, [r7, #228]	@ 0xe4
 800cb66:	f640 030f 	movw	r3, #2063	@ 0x80f
 800cb6a:	4013      	ands	r3, r2
 800cb6c:	f8c7 30d8 	str.w	r3, [r7, #216]	@ 0xd8
  if (errorflags == 0U)
 800cb70:	f8d7 30d8 	ldr.w	r3, [r7, #216]	@ 0xd8
 800cb74:	2b00      	cmp	r3, #0
 800cb76:	d11b      	bne.n	800cbb0 <HAL_UART_IRQHandler+0x74>
  {
    /* UART in mode Receiver ---------------------------------------------------*/
    if (((isrflags & USART_ISR_RXNE_RXFNE) != 0U)
 800cb78:	f8d7 30e4 	ldr.w	r3, [r7, #228]	@ 0xe4
 800cb7c:	f003 0320 	and.w	r3, r3, #32
 800cb80:	2b00      	cmp	r3, #0
 800cb82:	d015      	beq.n	800cbb0 <HAL_UART_IRQHandler+0x74>
        && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U)
 800cb84:	f8d7 30e0 	ldr.w	r3, [r7, #224]	@ 0xe0
 800cb88:	f003 0320 	and.w	r3, r3, #32
 800cb8c:	2b00      	cmp	r3, #0
 800cb8e:	d105      	bne.n	800cb9c <HAL_UART_IRQHandler+0x60>
            || ((cr3its & USART_CR3_RXFTIE) != 0U)))
 800cb90:	f8d7 30dc 	ldr.w	r3, [r7, #220]	@ 0xdc
 800cb94:	f003 5380 	and.w	r3, r3, #268435456	@ 0x10000000
 800cb98:	2b00      	cmp	r3, #0
 800cb9a:	d009      	beq.n	800cbb0 <HAL_UART_IRQHandler+0x74>
    {
      if (huart->RxISR != NULL)
 800cb9c:	687b      	ldr	r3, [r7, #4]
 800cb9e:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 800cba0:	2b00      	cmp	r3, #0
 800cba2:	f000 8377 	beq.w	800d294 <HAL_UART_IRQHandler+0x758>
      {
        huart->RxISR(huart);
 800cba6:	687b      	ldr	r3, [r7, #4]
 800cba8:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 800cbaa:	6878      	ldr	r0, [r7, #4]
 800cbac:	4798      	blx	r3
      }
      return;
 800cbae:	e371      	b.n	800d294 <HAL_UART_IRQHandler+0x758>
    }
  }

  /* If some errors occur */
  if ((errorflags != 0U)
 800cbb0:	f8d7 30d8 	ldr.w	r3, [r7, #216]	@ 0xd8
 800cbb4:	2b00      	cmp	r3, #0
 800cbb6:	f000 8123 	beq.w	800ce00 <HAL_UART_IRQHandler+0x2c4>
      && ((((cr3its & (USART_CR3_RXFTIE | USART_CR3_EIE)) != 0U)
 800cbba:	f8d7 20dc 	ldr.w	r2, [r7, #220]	@ 0xdc
 800cbbe:	4b8d      	ldr	r3, [pc, #564]	@ (800cdf4 <HAL_UART_IRQHandler+0x2b8>)
 800cbc0:	4013      	ands	r3, r2
 800cbc2:	2b00      	cmp	r3, #0
 800cbc4:	d106      	bne.n	800cbd4 <HAL_UART_IRQHandler+0x98>
           || ((cr1its & (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE | USART_CR1_RTOIE)) != 0U))))
 800cbc6:	f8d7 20e0 	ldr.w	r2, [r7, #224]	@ 0xe0
 800cbca:	4b8b      	ldr	r3, [pc, #556]	@ (800cdf8 <HAL_UART_IRQHandler+0x2bc>)
 800cbcc:	4013      	ands	r3, r2
 800cbce:	2b00      	cmp	r3, #0
 800cbd0:	f000 8116 	beq.w	800ce00 <HAL_UART_IRQHandler+0x2c4>
  {
    /* UART parity error interrupt occurred -------------------------------------*/
    if (((isrflags & USART_ISR_PE) != 0U) && ((cr1its & USART_CR1_PEIE) != 0U))
 800cbd4:	f8d7 30e4 	ldr.w	r3, [r7, #228]	@ 0xe4
 800cbd8:	f003 0301 	and.w	r3, r3, #1
 800cbdc:	2b00      	cmp	r3, #0
 800cbde:	d011      	beq.n	800cc04 <HAL_UART_IRQHandler+0xc8>
 800cbe0:	f8d7 30e0 	ldr.w	r3, [r7, #224]	@ 0xe0
 800cbe4:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 800cbe8:	2b00      	cmp	r3, #0
 800cbea:	d00b      	beq.n	800cc04 <HAL_UART_IRQHandler+0xc8>
    {
      __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF);
 800cbec:	687b      	ldr	r3, [r7, #4]
 800cbee:	681b      	ldr	r3, [r3, #0]
 800cbf0:	2201      	movs	r2, #1
 800cbf2:	621a      	str	r2, [r3, #32]

      huart->ErrorCode |= HAL_UART_ERROR_PE;
 800cbf4:	687b      	ldr	r3, [r7, #4]
 800cbf6:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800cbfa:	f043 0201 	orr.w	r2, r3, #1
 800cbfe:	687b      	ldr	r3, [r7, #4]
 800cc00:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
    }

    /* UART frame error interrupt occurred --------------------------------------*/
    if (((isrflags & USART_ISR_FE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
 800cc04:	f8d7 30e4 	ldr.w	r3, [r7, #228]	@ 0xe4
 800cc08:	f003 0302 	and.w	r3, r3, #2
 800cc0c:	2b00      	cmp	r3, #0
 800cc0e:	d011      	beq.n	800cc34 <HAL_UART_IRQHandler+0xf8>
 800cc10:	f8d7 30dc 	ldr.w	r3, [r7, #220]	@ 0xdc
 800cc14:	f003 0301 	and.w	r3, r3, #1
 800cc18:	2b00      	cmp	r3, #0
 800cc1a:	d00b      	beq.n	800cc34 <HAL_UART_IRQHandler+0xf8>
    {
      __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_FEF);
 800cc1c:	687b      	ldr	r3, [r7, #4]
 800cc1e:	681b      	ldr	r3, [r3, #0]
 800cc20:	2202      	movs	r2, #2
 800cc22:	621a      	str	r2, [r3, #32]

      huart->ErrorCode |= HAL_UART_ERROR_FE;
 800cc24:	687b      	ldr	r3, [r7, #4]
 800cc26:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800cc2a:	f043 0204 	orr.w	r2, r3, #4
 800cc2e:	687b      	ldr	r3, [r7, #4]
 800cc30:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
    }

    /* UART noise error interrupt occurred --------------------------------------*/
    if (((isrflags & USART_ISR_NE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
 800cc34:	f8d7 30e4 	ldr.w	r3, [r7, #228]	@ 0xe4
 800cc38:	f003 0304 	and.w	r3, r3, #4
 800cc3c:	2b00      	cmp	r3, #0
 800cc3e:	d011      	beq.n	800cc64 <HAL_UART_IRQHandler+0x128>
 800cc40:	f8d7 30dc 	ldr.w	r3, [r7, #220]	@ 0xdc
 800cc44:	f003 0301 	and.w	r3, r3, #1
 800cc48:	2b00      	cmp	r3, #0
 800cc4a:	d00b      	beq.n	800cc64 <HAL_UART_IRQHandler+0x128>
    {
      __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_NEF);
 800cc4c:	687b      	ldr	r3, [r7, #4]
 800cc4e:	681b      	ldr	r3, [r3, #0]
 800cc50:	2204      	movs	r2, #4
 800cc52:	621a      	str	r2, [r3, #32]

      huart->ErrorCode |= HAL_UART_ERROR_NE;
 800cc54:	687b      	ldr	r3, [r7, #4]
 800cc56:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800cc5a:	f043 0202 	orr.w	r2, r3, #2
 800cc5e:	687b      	ldr	r3, [r7, #4]
 800cc60:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
    }

    /* UART Over-Run interrupt occurred -----------------------------------------*/
    if (((isrflags & USART_ISR_ORE) != 0U)
 800cc64:	f8d7 30e4 	ldr.w	r3, [r7, #228]	@ 0xe4
 800cc68:	f003 0308 	and.w	r3, r3, #8
 800cc6c:	2b00      	cmp	r3, #0
 800cc6e:	d017      	beq.n	800cca0 <HAL_UART_IRQHandler+0x164>
        && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U) ||
 800cc70:	f8d7 30e0 	ldr.w	r3, [r7, #224]	@ 0xe0
 800cc74:	f003 0320 	and.w	r3, r3, #32
 800cc78:	2b00      	cmp	r3, #0
 800cc7a:	d105      	bne.n	800cc88 <HAL_UART_IRQHandler+0x14c>
            ((cr3its & (USART_CR3_RXFTIE | USART_CR3_EIE)) != 0U)))
 800cc7c:	f8d7 20dc 	ldr.w	r2, [r7, #220]	@ 0xdc
 800cc80:	4b5c      	ldr	r3, [pc, #368]	@ (800cdf4 <HAL_UART_IRQHandler+0x2b8>)
 800cc82:	4013      	ands	r3, r2
        && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U) ||
 800cc84:	2b00      	cmp	r3, #0
 800cc86:	d00b      	beq.n	800cca0 <HAL_UART_IRQHandler+0x164>
    {
      __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF);
 800cc88:	687b      	ldr	r3, [r7, #4]
 800cc8a:	681b      	ldr	r3, [r3, #0]
 800cc8c:	2208      	movs	r2, #8
 800cc8e:	621a      	str	r2, [r3, #32]

      huart->ErrorCode |= HAL_UART_ERROR_ORE;
 800cc90:	687b      	ldr	r3, [r7, #4]
 800cc92:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800cc96:	f043 0208 	orr.w	r2, r3, #8
 800cc9a:	687b      	ldr	r3, [r7, #4]
 800cc9c:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
    }

    /* UART Receiver Timeout interrupt occurred ---------------------------------*/
    if (((isrflags & USART_ISR_RTOF) != 0U) && ((cr1its & USART_CR1_RTOIE) != 0U))
 800cca0:	f8d7 30e4 	ldr.w	r3, [r7, #228]	@ 0xe4
 800cca4:	f403 6300 	and.w	r3, r3, #2048	@ 0x800
 800cca8:	2b00      	cmp	r3, #0
 800ccaa:	d012      	beq.n	800ccd2 <HAL_UART_IRQHandler+0x196>
 800ccac:	f8d7 30e0 	ldr.w	r3, [r7, #224]	@ 0xe0
 800ccb0:	f003 6380 	and.w	r3, r3, #67108864	@ 0x4000000
 800ccb4:	2b00      	cmp	r3, #0
 800ccb6:	d00c      	beq.n	800ccd2 <HAL_UART_IRQHandler+0x196>
    {
      __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_RTOF);
 800ccb8:	687b      	ldr	r3, [r7, #4]
 800ccba:	681b      	ldr	r3, [r3, #0]
 800ccbc:	f44f 6200 	mov.w	r2, #2048	@ 0x800
 800ccc0:	621a      	str	r2, [r3, #32]

      huart->ErrorCode |= HAL_UART_ERROR_RTO;
 800ccc2:	687b      	ldr	r3, [r7, #4]
 800ccc4:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800ccc8:	f043 0220 	orr.w	r2, r3, #32
 800cccc:	687b      	ldr	r3, [r7, #4]
 800ccce:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
    }

    /* Call UART Error Call back function if need be ----------------------------*/
    if (huart->ErrorCode != HAL_UART_ERROR_NONE)
 800ccd2:	687b      	ldr	r3, [r7, #4]
 800ccd4:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800ccd8:	2b00      	cmp	r3, #0
 800ccda:	f000 82dd 	beq.w	800d298 <HAL_UART_IRQHandler+0x75c>
    {
      /* UART in mode Receiver --------------------------------------------------*/
      if (((isrflags & USART_ISR_RXNE_RXFNE) != 0U)
 800ccde:	f8d7 30e4 	ldr.w	r3, [r7, #228]	@ 0xe4
 800cce2:	f003 0320 	and.w	r3, r3, #32
 800cce6:	2b00      	cmp	r3, #0
 800cce8:	d013      	beq.n	800cd12 <HAL_UART_IRQHandler+0x1d6>
          && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U)
 800ccea:	f8d7 30e0 	ldr.w	r3, [r7, #224]	@ 0xe0
 800ccee:	f003 0320 	and.w	r3, r3, #32
 800ccf2:	2b00      	cmp	r3, #0
 800ccf4:	d105      	bne.n	800cd02 <HAL_UART_IRQHandler+0x1c6>
              || ((cr3its & USART_CR3_RXFTIE) != 0U)))
 800ccf6:	f8d7 30dc 	ldr.w	r3, [r7, #220]	@ 0xdc
 800ccfa:	f003 5380 	and.w	r3, r3, #268435456	@ 0x10000000
 800ccfe:	2b00      	cmp	r3, #0
 800cd00:	d007      	beq.n	800cd12 <HAL_UART_IRQHandler+0x1d6>
      {
        if (huart->RxISR != NULL)
 800cd02:	687b      	ldr	r3, [r7, #4]
 800cd04:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 800cd06:	2b00      	cmp	r3, #0
 800cd08:	d003      	beq.n	800cd12 <HAL_UART_IRQHandler+0x1d6>
        {
          huart->RxISR(huart);
 800cd0a:	687b      	ldr	r3, [r7, #4]
 800cd0c:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 800cd0e:	6878      	ldr	r0, [r7, #4]
 800cd10:	4798      	blx	r3
      /* If Error is to be considered as blocking :
          - Receiver Timeout error in Reception
          - Overrun error in Reception
          - any error occurs in DMA mode reception
      */
      errorcode = huart->ErrorCode;
 800cd12:	687b      	ldr	r3, [r7, #4]
 800cd14:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800cd18:	f8c7 30d4 	str.w	r3, [r7, #212]	@ 0xd4
      if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) ||
 800cd1c:	687b      	ldr	r3, [r7, #4]
 800cd1e:	681b      	ldr	r3, [r3, #0]
 800cd20:	689b      	ldr	r3, [r3, #8]
 800cd22:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 800cd26:	2b40      	cmp	r3, #64	@ 0x40
 800cd28:	d005      	beq.n	800cd36 <HAL_UART_IRQHandler+0x1fa>
          ((errorcode & (HAL_UART_ERROR_RTO | HAL_UART_ERROR_ORE)) != 0U))
 800cd2a:	f8d7 30d4 	ldr.w	r3, [r7, #212]	@ 0xd4
 800cd2e:	f003 0328 	and.w	r3, r3, #40	@ 0x28
      if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) ||
 800cd32:	2b00      	cmp	r3, #0
 800cd34:	d054      	beq.n	800cde0 <HAL_UART_IRQHandler+0x2a4>
      {
        /* Blocking error : transfer is aborted
           Set the UART state ready to be able to start again the process,
           Disable Rx Interrupts, and disable Rx DMA request, if ongoing */
        UART_EndRxTransfer(huart);
 800cd36:	6878      	ldr	r0, [r7, #4]
 800cd38:	f001 fb08 	bl	800e34c <UART_EndRxTransfer>

        /* Abort the UART DMA Rx channel if enabled */
        if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
 800cd3c:	687b      	ldr	r3, [r7, #4]
 800cd3e:	681b      	ldr	r3, [r3, #0]
 800cd40:	689b      	ldr	r3, [r3, #8]
 800cd42:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 800cd46:	2b40      	cmp	r3, #64	@ 0x40
 800cd48:	d146      	bne.n	800cdd8 <HAL_UART_IRQHandler+0x29c>
        {
          /* Disable the UART DMA Rx request if enabled */
          ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
 800cd4a:	687b      	ldr	r3, [r7, #4]
 800cd4c:	681b      	ldr	r3, [r3, #0]
 800cd4e:	3308      	adds	r3, #8
 800cd50:	f8c7 309c 	str.w	r3, [r7, #156]	@ 0x9c
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800cd54:	f8d7 309c 	ldr.w	r3, [r7, #156]	@ 0x9c
 800cd58:	e853 3f00 	ldrex	r3, [r3]
 800cd5c:	f8c7 3098 	str.w	r3, [r7, #152]	@ 0x98
   return(result);
 800cd60:	f8d7 3098 	ldr.w	r3, [r7, #152]	@ 0x98
 800cd64:	f023 0340 	bic.w	r3, r3, #64	@ 0x40
 800cd68:	f8c7 30d0 	str.w	r3, [r7, #208]	@ 0xd0
 800cd6c:	687b      	ldr	r3, [r7, #4]
 800cd6e:	681b      	ldr	r3, [r3, #0]
 800cd70:	3308      	adds	r3, #8
 800cd72:	f8d7 20d0 	ldr.w	r2, [r7, #208]	@ 0xd0
 800cd76:	f8c7 20a8 	str.w	r2, [r7, #168]	@ 0xa8
 800cd7a:	f8c7 30a4 	str.w	r3, [r7, #164]	@ 0xa4
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800cd7e:	f8d7 10a4 	ldr.w	r1, [r7, #164]	@ 0xa4
 800cd82:	f8d7 20a8 	ldr.w	r2, [r7, #168]	@ 0xa8
 800cd86:	e841 2300 	strex	r3, r2, [r1]
 800cd8a:	f8c7 30a0 	str.w	r3, [r7, #160]	@ 0xa0
   return(result);
 800cd8e:	f8d7 30a0 	ldr.w	r3, [r7, #160]	@ 0xa0
 800cd92:	2b00      	cmp	r3, #0
 800cd94:	d1d9      	bne.n	800cd4a <HAL_UART_IRQHandler+0x20e>

          /* Abort the UART DMA Rx channel */
          if (huart->hdmarx != NULL)
 800cd96:	687b      	ldr	r3, [r7, #4]
 800cd98:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800cd9c:	2b00      	cmp	r3, #0
 800cd9e:	d017      	beq.n	800cdd0 <HAL_UART_IRQHandler+0x294>
          {
            /* Set the UART DMA Abort callback :
               will lead to call HAL_UART_ErrorCallback() at end of DMA abort procedure */
            huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError;
 800cda0:	687b      	ldr	r3, [r7, #4]
 800cda2:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800cda6:	4a15      	ldr	r2, [pc, #84]	@ (800cdfc <HAL_UART_IRQHandler+0x2c0>)
 800cda8:	651a      	str	r2, [r3, #80]	@ 0x50

            /* Abort DMA RX */
            if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK)
 800cdaa:	687b      	ldr	r3, [r7, #4]
 800cdac:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800cdb0:	4618      	mov	r0, r3
 800cdb2:	f7f9 f915 	bl	8005fe0 <HAL_DMA_Abort_IT>
 800cdb6:	4603      	mov	r3, r0
 800cdb8:	2b00      	cmp	r3, #0
 800cdba:	d019      	beq.n	800cdf0 <HAL_UART_IRQHandler+0x2b4>
            {
              /* Call Directly huart->hdmarx->XferAbortCallback function in case of error */
              huart->hdmarx->XferAbortCallback(huart->hdmarx);
 800cdbc:	687b      	ldr	r3, [r7, #4]
 800cdbe:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800cdc2:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800cdc4:	687a      	ldr	r2, [r7, #4]
 800cdc6:	f8d2 2080 	ldr.w	r2, [r2, #128]	@ 0x80
 800cdca:	4610      	mov	r0, r2
 800cdcc:	4798      	blx	r3
        if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
 800cdce:	e00f      	b.n	800cdf0 <HAL_UART_IRQHandler+0x2b4>
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
            /*Call registered error callback*/
            huart->ErrorCallback(huart);
#else
            /*Call legacy weak error callback*/
            HAL_UART_ErrorCallback(huart);
 800cdd0:	6878      	ldr	r0, [r7, #4]
 800cdd2:	f000 fa6d 	bl	800d2b0 <HAL_UART_ErrorCallback>
        if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
 800cdd6:	e00b      	b.n	800cdf0 <HAL_UART_IRQHandler+0x2b4>
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
          /*Call registered error callback*/
          huart->ErrorCallback(huart);
#else
          /*Call legacy weak error callback*/
          HAL_UART_ErrorCallback(huart);
 800cdd8:	6878      	ldr	r0, [r7, #4]
 800cdda:	f000 fa69 	bl	800d2b0 <HAL_UART_ErrorCallback>
        if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
 800cdde:	e007      	b.n	800cdf0 <HAL_UART_IRQHandler+0x2b4>
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
        /*Call registered error callback*/
        huart->ErrorCallback(huart);
#else
        /*Call legacy weak error callback*/
        HAL_UART_ErrorCallback(huart);
 800cde0:	6878      	ldr	r0, [r7, #4]
 800cde2:	f000 fa65 	bl	800d2b0 <HAL_UART_ErrorCallback>
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
        huart->ErrorCode = HAL_UART_ERROR_NONE;
 800cde6:	687b      	ldr	r3, [r7, #4]
 800cde8:	2200      	movs	r2, #0
 800cdea:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
      }
    }
    return;
 800cdee:	e253      	b.n	800d298 <HAL_UART_IRQHandler+0x75c>
        if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
 800cdf0:	bf00      	nop
    return;
 800cdf2:	e251      	b.n	800d298 <HAL_UART_IRQHandler+0x75c>
 800cdf4:	10000001 	.word	0x10000001
 800cdf8:	04000120 	.word	0x04000120
 800cdfc:	0800e419 	.word	0x0800e419

  } /* End if some error occurs */

  /* Check current reception Mode :
     If Reception till IDLE event has been selected : */
  if ((huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
 800ce00:	687b      	ldr	r3, [r7, #4]
 800ce02:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 800ce04:	2b01      	cmp	r3, #1
 800ce06:	f040 81e7 	bne.w	800d1d8 <HAL_UART_IRQHandler+0x69c>
      && ((isrflags & USART_ISR_IDLE) != 0U)
 800ce0a:	f8d7 30e4 	ldr.w	r3, [r7, #228]	@ 0xe4
 800ce0e:	f003 0310 	and.w	r3, r3, #16
 800ce12:	2b00      	cmp	r3, #0
 800ce14:	f000 81e0 	beq.w	800d1d8 <HAL_UART_IRQHandler+0x69c>
      && ((cr1its & USART_ISR_IDLE) != 0U))
 800ce18:	f8d7 30e0 	ldr.w	r3, [r7, #224]	@ 0xe0
 800ce1c:	f003 0310 	and.w	r3, r3, #16
 800ce20:	2b00      	cmp	r3, #0
 800ce22:	f000 81d9 	beq.w	800d1d8 <HAL_UART_IRQHandler+0x69c>
  {
    __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
 800ce26:	687b      	ldr	r3, [r7, #4]
 800ce28:	681b      	ldr	r3, [r3, #0]
 800ce2a:	2210      	movs	r2, #16
 800ce2c:	621a      	str	r2, [r3, #32]

    /* Check if DMA mode is enabled in UART */
    if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
 800ce2e:	687b      	ldr	r3, [r7, #4]
 800ce30:	681b      	ldr	r3, [r3, #0]
 800ce32:	689b      	ldr	r3, [r3, #8]
 800ce34:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 800ce38:	2b40      	cmp	r3, #64	@ 0x40
 800ce3a:	f040 8151 	bne.w	800d0e0 <HAL_UART_IRQHandler+0x5a4>
    {
      /* DMA mode enabled */
      /* Check received length : If all expected data are received, do nothing,
         (DMA cplt callback will be called).
         Otherwise, if at least one data has already been received, IDLE event is to be notified to user */
      uint16_t nb_remaining_rx_data = (uint16_t) __HAL_DMA_GET_COUNTER(huart->hdmarx);
 800ce3e:	687b      	ldr	r3, [r7, #4]
 800ce40:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800ce44:	681b      	ldr	r3, [r3, #0]
 800ce46:	4a96      	ldr	r2, [pc, #600]	@ (800d0a0 <HAL_UART_IRQHandler+0x564>)
 800ce48:	4293      	cmp	r3, r2
 800ce4a:	d068      	beq.n	800cf1e <HAL_UART_IRQHandler+0x3e2>
 800ce4c:	687b      	ldr	r3, [r7, #4]
 800ce4e:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800ce52:	681b      	ldr	r3, [r3, #0]
 800ce54:	4a93      	ldr	r2, [pc, #588]	@ (800d0a4 <HAL_UART_IRQHandler+0x568>)
 800ce56:	4293      	cmp	r3, r2
 800ce58:	d061      	beq.n	800cf1e <HAL_UART_IRQHandler+0x3e2>
 800ce5a:	687b      	ldr	r3, [r7, #4]
 800ce5c:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800ce60:	681b      	ldr	r3, [r3, #0]
 800ce62:	4a91      	ldr	r2, [pc, #580]	@ (800d0a8 <HAL_UART_IRQHandler+0x56c>)
 800ce64:	4293      	cmp	r3, r2
 800ce66:	d05a      	beq.n	800cf1e <HAL_UART_IRQHandler+0x3e2>
 800ce68:	687b      	ldr	r3, [r7, #4]
 800ce6a:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800ce6e:	681b      	ldr	r3, [r3, #0]
 800ce70:	4a8e      	ldr	r2, [pc, #568]	@ (800d0ac <HAL_UART_IRQHandler+0x570>)
 800ce72:	4293      	cmp	r3, r2
 800ce74:	d053      	beq.n	800cf1e <HAL_UART_IRQHandler+0x3e2>
 800ce76:	687b      	ldr	r3, [r7, #4]
 800ce78:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800ce7c:	681b      	ldr	r3, [r3, #0]
 800ce7e:	4a8c      	ldr	r2, [pc, #560]	@ (800d0b0 <HAL_UART_IRQHandler+0x574>)
 800ce80:	4293      	cmp	r3, r2
 800ce82:	d04c      	beq.n	800cf1e <HAL_UART_IRQHandler+0x3e2>
 800ce84:	687b      	ldr	r3, [r7, #4]
 800ce86:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800ce8a:	681b      	ldr	r3, [r3, #0]
 800ce8c:	4a89      	ldr	r2, [pc, #548]	@ (800d0b4 <HAL_UART_IRQHandler+0x578>)
 800ce8e:	4293      	cmp	r3, r2
 800ce90:	d045      	beq.n	800cf1e <HAL_UART_IRQHandler+0x3e2>
 800ce92:	687b      	ldr	r3, [r7, #4]
 800ce94:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800ce98:	681b      	ldr	r3, [r3, #0]
 800ce9a:	4a87      	ldr	r2, [pc, #540]	@ (800d0b8 <HAL_UART_IRQHandler+0x57c>)
 800ce9c:	4293      	cmp	r3, r2
 800ce9e:	d03e      	beq.n	800cf1e <HAL_UART_IRQHandler+0x3e2>
 800cea0:	687b      	ldr	r3, [r7, #4]
 800cea2:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800cea6:	681b      	ldr	r3, [r3, #0]
 800cea8:	4a84      	ldr	r2, [pc, #528]	@ (800d0bc <HAL_UART_IRQHandler+0x580>)
 800ceaa:	4293      	cmp	r3, r2
 800ceac:	d037      	beq.n	800cf1e <HAL_UART_IRQHandler+0x3e2>
 800ceae:	687b      	ldr	r3, [r7, #4]
 800ceb0:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800ceb4:	681b      	ldr	r3, [r3, #0]
 800ceb6:	4a82      	ldr	r2, [pc, #520]	@ (800d0c0 <HAL_UART_IRQHandler+0x584>)
 800ceb8:	4293      	cmp	r3, r2
 800ceba:	d030      	beq.n	800cf1e <HAL_UART_IRQHandler+0x3e2>
 800cebc:	687b      	ldr	r3, [r7, #4]
 800cebe:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800cec2:	681b      	ldr	r3, [r3, #0]
 800cec4:	4a7f      	ldr	r2, [pc, #508]	@ (800d0c4 <HAL_UART_IRQHandler+0x588>)
 800cec6:	4293      	cmp	r3, r2
 800cec8:	d029      	beq.n	800cf1e <HAL_UART_IRQHandler+0x3e2>
 800ceca:	687b      	ldr	r3, [r7, #4]
 800cecc:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800ced0:	681b      	ldr	r3, [r3, #0]
 800ced2:	4a7d      	ldr	r2, [pc, #500]	@ (800d0c8 <HAL_UART_IRQHandler+0x58c>)
 800ced4:	4293      	cmp	r3, r2
 800ced6:	d022      	beq.n	800cf1e <HAL_UART_IRQHandler+0x3e2>
 800ced8:	687b      	ldr	r3, [r7, #4]
 800ceda:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800cede:	681b      	ldr	r3, [r3, #0]
 800cee0:	4a7a      	ldr	r2, [pc, #488]	@ (800d0cc <HAL_UART_IRQHandler+0x590>)
 800cee2:	4293      	cmp	r3, r2
 800cee4:	d01b      	beq.n	800cf1e <HAL_UART_IRQHandler+0x3e2>
 800cee6:	687b      	ldr	r3, [r7, #4]
 800cee8:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800ceec:	681b      	ldr	r3, [r3, #0]
 800ceee:	4a78      	ldr	r2, [pc, #480]	@ (800d0d0 <HAL_UART_IRQHandler+0x594>)
 800cef0:	4293      	cmp	r3, r2
 800cef2:	d014      	beq.n	800cf1e <HAL_UART_IRQHandler+0x3e2>
 800cef4:	687b      	ldr	r3, [r7, #4]
 800cef6:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800cefa:	681b      	ldr	r3, [r3, #0]
 800cefc:	4a75      	ldr	r2, [pc, #468]	@ (800d0d4 <HAL_UART_IRQHandler+0x598>)
 800cefe:	4293      	cmp	r3, r2
 800cf00:	d00d      	beq.n	800cf1e <HAL_UART_IRQHandler+0x3e2>
 800cf02:	687b      	ldr	r3, [r7, #4]
 800cf04:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800cf08:	681b      	ldr	r3, [r3, #0]
 800cf0a:	4a73      	ldr	r2, [pc, #460]	@ (800d0d8 <HAL_UART_IRQHandler+0x59c>)
 800cf0c:	4293      	cmp	r3, r2
 800cf0e:	d006      	beq.n	800cf1e <HAL_UART_IRQHandler+0x3e2>
 800cf10:	687b      	ldr	r3, [r7, #4]
 800cf12:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800cf16:	681b      	ldr	r3, [r3, #0]
 800cf18:	4a70      	ldr	r2, [pc, #448]	@ (800d0dc <HAL_UART_IRQHandler+0x5a0>)
 800cf1a:	4293      	cmp	r3, r2
 800cf1c:	d106      	bne.n	800cf2c <HAL_UART_IRQHandler+0x3f0>
 800cf1e:	687b      	ldr	r3, [r7, #4]
 800cf20:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800cf24:	681b      	ldr	r3, [r3, #0]
 800cf26:	685b      	ldr	r3, [r3, #4]
 800cf28:	b29b      	uxth	r3, r3
 800cf2a:	e005      	b.n	800cf38 <HAL_UART_IRQHandler+0x3fc>
 800cf2c:	687b      	ldr	r3, [r7, #4]
 800cf2e:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800cf32:	681b      	ldr	r3, [r3, #0]
 800cf34:	685b      	ldr	r3, [r3, #4]
 800cf36:	b29b      	uxth	r3, r3
 800cf38:	f8a7 30be 	strh.w	r3, [r7, #190]	@ 0xbe
      if ((nb_remaining_rx_data > 0U)
 800cf3c:	f8b7 30be 	ldrh.w	r3, [r7, #190]	@ 0xbe
 800cf40:	2b00      	cmp	r3, #0
 800cf42:	f000 81ab 	beq.w	800d29c <HAL_UART_IRQHandler+0x760>
          && (nb_remaining_rx_data < huart->RxXferSize))
 800cf46:	687b      	ldr	r3, [r7, #4]
 800cf48:	f8b3 305c 	ldrh.w	r3, [r3, #92]	@ 0x5c
 800cf4c:	f8b7 20be 	ldrh.w	r2, [r7, #190]	@ 0xbe
 800cf50:	429a      	cmp	r2, r3
 800cf52:	f080 81a3 	bcs.w	800d29c <HAL_UART_IRQHandler+0x760>
      {
        /* Reception is not complete */
        huart->RxXferCount = nb_remaining_rx_data;
 800cf56:	687b      	ldr	r3, [r7, #4]
 800cf58:	f8b7 20be 	ldrh.w	r2, [r7, #190]	@ 0xbe
 800cf5c:	f8a3 205e 	strh.w	r2, [r3, #94]	@ 0x5e

        /* In Normal mode, end DMA xfer and HAL UART Rx process*/
        if (huart->hdmarx->Init.Mode != DMA_CIRCULAR)
 800cf60:	687b      	ldr	r3, [r7, #4]
 800cf62:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800cf66:	69db      	ldr	r3, [r3, #28]
 800cf68:	f5b3 7f80 	cmp.w	r3, #256	@ 0x100
 800cf6c:	f000 8087 	beq.w	800d07e <HAL_UART_IRQHandler+0x542>
        {
          /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */
          ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
 800cf70:	687b      	ldr	r3, [r7, #4]
 800cf72:	681b      	ldr	r3, [r3, #0]
 800cf74:	f8c7 3088 	str.w	r3, [r7, #136]	@ 0x88
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800cf78:	f8d7 3088 	ldr.w	r3, [r7, #136]	@ 0x88
 800cf7c:	e853 3f00 	ldrex	r3, [r3]
 800cf80:	f8c7 3084 	str.w	r3, [r7, #132]	@ 0x84
   return(result);
 800cf84:	f8d7 3084 	ldr.w	r3, [r7, #132]	@ 0x84
 800cf88:	f423 7380 	bic.w	r3, r3, #256	@ 0x100
 800cf8c:	f8c7 30b8 	str.w	r3, [r7, #184]	@ 0xb8
 800cf90:	687b      	ldr	r3, [r7, #4]
 800cf92:	681b      	ldr	r3, [r3, #0]
 800cf94:	461a      	mov	r2, r3
 800cf96:	f8d7 30b8 	ldr.w	r3, [r7, #184]	@ 0xb8
 800cf9a:	f8c7 3094 	str.w	r3, [r7, #148]	@ 0x94
 800cf9e:	f8c7 2090 	str.w	r2, [r7, #144]	@ 0x90
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800cfa2:	f8d7 1090 	ldr.w	r1, [r7, #144]	@ 0x90
 800cfa6:	f8d7 2094 	ldr.w	r2, [r7, #148]	@ 0x94
 800cfaa:	e841 2300 	strex	r3, r2, [r1]
 800cfae:	f8c7 308c 	str.w	r3, [r7, #140]	@ 0x8c
   return(result);
 800cfb2:	f8d7 308c 	ldr.w	r3, [r7, #140]	@ 0x8c
 800cfb6:	2b00      	cmp	r3, #0
 800cfb8:	d1da      	bne.n	800cf70 <HAL_UART_IRQHandler+0x434>
          ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
 800cfba:	687b      	ldr	r3, [r7, #4]
 800cfbc:	681b      	ldr	r3, [r3, #0]
 800cfbe:	3308      	adds	r3, #8
 800cfc0:	677b      	str	r3, [r7, #116]	@ 0x74
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800cfc2:	6f7b      	ldr	r3, [r7, #116]	@ 0x74
 800cfc4:	e853 3f00 	ldrex	r3, [r3]
 800cfc8:	673b      	str	r3, [r7, #112]	@ 0x70
   return(result);
 800cfca:	6f3b      	ldr	r3, [r7, #112]	@ 0x70
 800cfcc:	f023 0301 	bic.w	r3, r3, #1
 800cfd0:	f8c7 30b4 	str.w	r3, [r7, #180]	@ 0xb4
 800cfd4:	687b      	ldr	r3, [r7, #4]
 800cfd6:	681b      	ldr	r3, [r3, #0]
 800cfd8:	3308      	adds	r3, #8
 800cfda:	f8d7 20b4 	ldr.w	r2, [r7, #180]	@ 0xb4
 800cfde:	f8c7 2080 	str.w	r2, [r7, #128]	@ 0x80
 800cfe2:	67fb      	str	r3, [r7, #124]	@ 0x7c
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800cfe4:	6ff9      	ldr	r1, [r7, #124]	@ 0x7c
 800cfe6:	f8d7 2080 	ldr.w	r2, [r7, #128]	@ 0x80
 800cfea:	e841 2300 	strex	r3, r2, [r1]
 800cfee:	67bb      	str	r3, [r7, #120]	@ 0x78
   return(result);
 800cff0:	6fbb      	ldr	r3, [r7, #120]	@ 0x78
 800cff2:	2b00      	cmp	r3, #0
 800cff4:	d1e1      	bne.n	800cfba <HAL_UART_IRQHandler+0x47e>

          /* Disable the DMA transfer for the receiver request by resetting the DMAR bit
             in the UART CR3 register */
          ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
 800cff6:	687b      	ldr	r3, [r7, #4]
 800cff8:	681b      	ldr	r3, [r3, #0]
 800cffa:	3308      	adds	r3, #8
 800cffc:	663b      	str	r3, [r7, #96]	@ 0x60
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800cffe:	6e3b      	ldr	r3, [r7, #96]	@ 0x60
 800d000:	e853 3f00 	ldrex	r3, [r3]
 800d004:	65fb      	str	r3, [r7, #92]	@ 0x5c
   return(result);
 800d006:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 800d008:	f023 0340 	bic.w	r3, r3, #64	@ 0x40
 800d00c:	f8c7 30b0 	str.w	r3, [r7, #176]	@ 0xb0
 800d010:	687b      	ldr	r3, [r7, #4]
 800d012:	681b      	ldr	r3, [r3, #0]
 800d014:	3308      	adds	r3, #8
 800d016:	f8d7 20b0 	ldr.w	r2, [r7, #176]	@ 0xb0
 800d01a:	66fa      	str	r2, [r7, #108]	@ 0x6c
 800d01c:	66bb      	str	r3, [r7, #104]	@ 0x68
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800d01e:	6eb9      	ldr	r1, [r7, #104]	@ 0x68
 800d020:	6efa      	ldr	r2, [r7, #108]	@ 0x6c
 800d022:	e841 2300 	strex	r3, r2, [r1]
 800d026:	667b      	str	r3, [r7, #100]	@ 0x64
   return(result);
 800d028:	6e7b      	ldr	r3, [r7, #100]	@ 0x64
 800d02a:	2b00      	cmp	r3, #0
 800d02c:	d1e3      	bne.n	800cff6 <HAL_UART_IRQHandler+0x4ba>

          /* At end of Rx process, restore huart->RxState to Ready */
          huart->RxState = HAL_UART_STATE_READY;
 800d02e:	687b      	ldr	r3, [r7, #4]
 800d030:	2220      	movs	r2, #32
 800d032:	f8c3 208c 	str.w	r2, [r3, #140]	@ 0x8c
          huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
 800d036:	687b      	ldr	r3, [r7, #4]
 800d038:	2200      	movs	r2, #0
 800d03a:	66da      	str	r2, [r3, #108]	@ 0x6c

          ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
 800d03c:	687b      	ldr	r3, [r7, #4]
 800d03e:	681b      	ldr	r3, [r3, #0]
 800d040:	64fb      	str	r3, [r7, #76]	@ 0x4c
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800d042:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 800d044:	e853 3f00 	ldrex	r3, [r3]
 800d048:	64bb      	str	r3, [r7, #72]	@ 0x48
   return(result);
 800d04a:	6cbb      	ldr	r3, [r7, #72]	@ 0x48
 800d04c:	f023 0310 	bic.w	r3, r3, #16
 800d050:	f8c7 30ac 	str.w	r3, [r7, #172]	@ 0xac
 800d054:	687b      	ldr	r3, [r7, #4]
 800d056:	681b      	ldr	r3, [r3, #0]
 800d058:	461a      	mov	r2, r3
 800d05a:	f8d7 30ac 	ldr.w	r3, [r7, #172]	@ 0xac
 800d05e:	65bb      	str	r3, [r7, #88]	@ 0x58
 800d060:	657a      	str	r2, [r7, #84]	@ 0x54
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800d062:	6d79      	ldr	r1, [r7, #84]	@ 0x54
 800d064:	6dba      	ldr	r2, [r7, #88]	@ 0x58
 800d066:	e841 2300 	strex	r3, r2, [r1]
 800d06a:	653b      	str	r3, [r7, #80]	@ 0x50
   return(result);
 800d06c:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 800d06e:	2b00      	cmp	r3, #0
 800d070:	d1e4      	bne.n	800d03c <HAL_UART_IRQHandler+0x500>

          /* Last bytes received, so no need as the abort is immediate */
          (void)HAL_DMA_Abort(huart->hdmarx);
 800d072:	687b      	ldr	r3, [r7, #4]
 800d074:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800d078:	4618      	mov	r0, r3
 800d07a:	f7f8 fc93 	bl	80059a4 <HAL_DMA_Abort>
        }

        /* Initialize type of RxEvent that correspond to RxEvent callback execution;
           In this case, Rx Event type is Idle Event */
        huart->RxEventType = HAL_UART_RXEVENT_IDLE;
 800d07e:	687b      	ldr	r3, [r7, #4]
 800d080:	2202      	movs	r2, #2
 800d082:	671a      	str	r2, [r3, #112]	@ 0x70
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
        /*Call registered Rx Event callback*/
        huart->RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount));
#else
        /*Call legacy weak Rx Event callback*/
        HAL_UARTEx_RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount));
 800d084:	687b      	ldr	r3, [r7, #4]
 800d086:	f8b3 205c 	ldrh.w	r2, [r3, #92]	@ 0x5c
 800d08a:	687b      	ldr	r3, [r7, #4]
 800d08c:	f8b3 305e 	ldrh.w	r3, [r3, #94]	@ 0x5e
 800d090:	b29b      	uxth	r3, r3
 800d092:	1ad3      	subs	r3, r2, r3
 800d094:	b29b      	uxth	r3, r3
 800d096:	4619      	mov	r1, r3
 800d098:	6878      	ldr	r0, [r7, #4]
 800d09a:	f7f6 ff19 	bl	8003ed0 <HAL_UARTEx_RxEventCallback>
#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
      }
      return;
 800d09e:	e0fd      	b.n	800d29c <HAL_UART_IRQHandler+0x760>
 800d0a0:	40020010 	.word	0x40020010
 800d0a4:	40020028 	.word	0x40020028
 800d0a8:	40020040 	.word	0x40020040
 800d0ac:	40020058 	.word	0x40020058
 800d0b0:	40020070 	.word	0x40020070
 800d0b4:	40020088 	.word	0x40020088
 800d0b8:	400200a0 	.word	0x400200a0
 800d0bc:	400200b8 	.word	0x400200b8
 800d0c0:	40020410 	.word	0x40020410
 800d0c4:	40020428 	.word	0x40020428
 800d0c8:	40020440 	.word	0x40020440
 800d0cc:	40020458 	.word	0x40020458
 800d0d0:	40020470 	.word	0x40020470
 800d0d4:	40020488 	.word	0x40020488
 800d0d8:	400204a0 	.word	0x400204a0
 800d0dc:	400204b8 	.word	0x400204b8
    else
    {
      /* DMA mode not enabled */
      /* Check received length : If all expected data are received, do nothing.
         Otherwise, if at least one data has already been received, IDLE event is to be notified to user */
      uint16_t nb_rx_data = huart->RxXferSize - huart->RxXferCount;
 800d0e0:	687b      	ldr	r3, [r7, #4]
 800d0e2:	f8b3 205c 	ldrh.w	r2, [r3, #92]	@ 0x5c
 800d0e6:	687b      	ldr	r3, [r7, #4]
 800d0e8:	f8b3 305e 	ldrh.w	r3, [r3, #94]	@ 0x5e
 800d0ec:	b29b      	uxth	r3, r3
 800d0ee:	1ad3      	subs	r3, r2, r3
 800d0f0:	f8a7 30ce 	strh.w	r3, [r7, #206]	@ 0xce
      if ((huart->RxXferCount > 0U)
 800d0f4:	687b      	ldr	r3, [r7, #4]
 800d0f6:	f8b3 305e 	ldrh.w	r3, [r3, #94]	@ 0x5e
 800d0fa:	b29b      	uxth	r3, r3
 800d0fc:	2b00      	cmp	r3, #0
 800d0fe:	f000 80cf 	beq.w	800d2a0 <HAL_UART_IRQHandler+0x764>
          && (nb_rx_data > 0U))
 800d102:	f8b7 30ce 	ldrh.w	r3, [r7, #206]	@ 0xce
 800d106:	2b00      	cmp	r3, #0
 800d108:	f000 80ca 	beq.w	800d2a0 <HAL_UART_IRQHandler+0x764>
      {
        /* Disable the UART Parity Error Interrupt and RXNE interrupts */
        ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
 800d10c:	687b      	ldr	r3, [r7, #4]
 800d10e:	681b      	ldr	r3, [r3, #0]
 800d110:	63bb      	str	r3, [r7, #56]	@ 0x38
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800d112:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800d114:	e853 3f00 	ldrex	r3, [r3]
 800d118:	637b      	str	r3, [r7, #52]	@ 0x34
   return(result);
 800d11a:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 800d11c:	f423 7390 	bic.w	r3, r3, #288	@ 0x120
 800d120:	f8c7 30c8 	str.w	r3, [r7, #200]	@ 0xc8
 800d124:	687b      	ldr	r3, [r7, #4]
 800d126:	681b      	ldr	r3, [r3, #0]
 800d128:	461a      	mov	r2, r3
 800d12a:	f8d7 30c8 	ldr.w	r3, [r7, #200]	@ 0xc8
 800d12e:	647b      	str	r3, [r7, #68]	@ 0x44
 800d130:	643a      	str	r2, [r7, #64]	@ 0x40
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800d132:	6c39      	ldr	r1, [r7, #64]	@ 0x40
 800d134:	6c7a      	ldr	r2, [r7, #68]	@ 0x44
 800d136:	e841 2300 	strex	r3, r2, [r1]
 800d13a:	63fb      	str	r3, [r7, #60]	@ 0x3c
   return(result);
 800d13c:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800d13e:	2b00      	cmp	r3, #0
 800d140:	d1e4      	bne.n	800d10c <HAL_UART_IRQHandler+0x5d0>

        /* Disable the UART Error Interrupt:(Frame error, noise error, overrun error) and RX FIFO Threshold interrupt */
        ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
 800d142:	687b      	ldr	r3, [r7, #4]
 800d144:	681b      	ldr	r3, [r3, #0]
 800d146:	3308      	adds	r3, #8
 800d148:	627b      	str	r3, [r7, #36]	@ 0x24
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800d14a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800d14c:	e853 3f00 	ldrex	r3, [r3]
 800d150:	623b      	str	r3, [r7, #32]
   return(result);
 800d152:	6a3a      	ldr	r2, [r7, #32]
 800d154:	4b55      	ldr	r3, [pc, #340]	@ (800d2ac <HAL_UART_IRQHandler+0x770>)
 800d156:	4013      	ands	r3, r2
 800d158:	f8c7 30c4 	str.w	r3, [r7, #196]	@ 0xc4
 800d15c:	687b      	ldr	r3, [r7, #4]
 800d15e:	681b      	ldr	r3, [r3, #0]
 800d160:	3308      	adds	r3, #8
 800d162:	f8d7 20c4 	ldr.w	r2, [r7, #196]	@ 0xc4
 800d166:	633a      	str	r2, [r7, #48]	@ 0x30
 800d168:	62fb      	str	r3, [r7, #44]	@ 0x2c
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800d16a:	6af9      	ldr	r1, [r7, #44]	@ 0x2c
 800d16c:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 800d16e:	e841 2300 	strex	r3, r2, [r1]
 800d172:	62bb      	str	r3, [r7, #40]	@ 0x28
   return(result);
 800d174:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 800d176:	2b00      	cmp	r3, #0
 800d178:	d1e3      	bne.n	800d142 <HAL_UART_IRQHandler+0x606>

        /* Rx process is completed, restore huart->RxState to Ready */
        huart->RxState = HAL_UART_STATE_READY;
 800d17a:	687b      	ldr	r3, [r7, #4]
 800d17c:	2220      	movs	r2, #32
 800d17e:	f8c3 208c 	str.w	r2, [r3, #140]	@ 0x8c
        huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
 800d182:	687b      	ldr	r3, [r7, #4]
 800d184:	2200      	movs	r2, #0
 800d186:	66da      	str	r2, [r3, #108]	@ 0x6c

        /* Clear RxISR function pointer */
        huart->RxISR = NULL;
 800d188:	687b      	ldr	r3, [r7, #4]
 800d18a:	2200      	movs	r2, #0
 800d18c:	675a      	str	r2, [r3, #116]	@ 0x74

        ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
 800d18e:	687b      	ldr	r3, [r7, #4]
 800d190:	681b      	ldr	r3, [r3, #0]
 800d192:	613b      	str	r3, [r7, #16]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800d194:	693b      	ldr	r3, [r7, #16]
 800d196:	e853 3f00 	ldrex	r3, [r3]
 800d19a:	60fb      	str	r3, [r7, #12]
   return(result);
 800d19c:	68fb      	ldr	r3, [r7, #12]
 800d19e:	f023 0310 	bic.w	r3, r3, #16
 800d1a2:	f8c7 30c0 	str.w	r3, [r7, #192]	@ 0xc0
 800d1a6:	687b      	ldr	r3, [r7, #4]
 800d1a8:	681b      	ldr	r3, [r3, #0]
 800d1aa:	461a      	mov	r2, r3
 800d1ac:	f8d7 30c0 	ldr.w	r3, [r7, #192]	@ 0xc0
 800d1b0:	61fb      	str	r3, [r7, #28]
 800d1b2:	61ba      	str	r2, [r7, #24]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800d1b4:	69b9      	ldr	r1, [r7, #24]
 800d1b6:	69fa      	ldr	r2, [r7, #28]
 800d1b8:	e841 2300 	strex	r3, r2, [r1]
 800d1bc:	617b      	str	r3, [r7, #20]
   return(result);
 800d1be:	697b      	ldr	r3, [r7, #20]
 800d1c0:	2b00      	cmp	r3, #0
 800d1c2:	d1e4      	bne.n	800d18e <HAL_UART_IRQHandler+0x652>

        /* Initialize type of RxEvent that correspond to RxEvent callback execution;
           In this case, Rx Event type is Idle Event */
        huart->RxEventType = HAL_UART_RXEVENT_IDLE;
 800d1c4:	687b      	ldr	r3, [r7, #4]
 800d1c6:	2202      	movs	r2, #2
 800d1c8:	671a      	str	r2, [r3, #112]	@ 0x70
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
        /*Call registered Rx complete callback*/
        huart->RxEventCallback(huart, nb_rx_data);
#else
        /*Call legacy weak Rx Event callback*/
        HAL_UARTEx_RxEventCallback(huart, nb_rx_data);
 800d1ca:	f8b7 30ce 	ldrh.w	r3, [r7, #206]	@ 0xce
 800d1ce:	4619      	mov	r1, r3
 800d1d0:	6878      	ldr	r0, [r7, #4]
 800d1d2:	f7f6 fe7d 	bl	8003ed0 <HAL_UARTEx_RxEventCallback>
#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
      }
      return;
 800d1d6:	e063      	b.n	800d2a0 <HAL_UART_IRQHandler+0x764>
    }
  }

  /* UART wakeup from Stop mode interrupt occurred ---------------------------*/
  if (((isrflags & USART_ISR_WUF) != 0U) && ((cr3its & USART_CR3_WUFIE) != 0U))
 800d1d8:	f8d7 30e4 	ldr.w	r3, [r7, #228]	@ 0xe4
 800d1dc:	f403 1380 	and.w	r3, r3, #1048576	@ 0x100000
 800d1e0:	2b00      	cmp	r3, #0
 800d1e2:	d00e      	beq.n	800d202 <HAL_UART_IRQHandler+0x6c6>
 800d1e4:	f8d7 30dc 	ldr.w	r3, [r7, #220]	@ 0xdc
 800d1e8:	f403 0380 	and.w	r3, r3, #4194304	@ 0x400000
 800d1ec:	2b00      	cmp	r3, #0
 800d1ee:	d008      	beq.n	800d202 <HAL_UART_IRQHandler+0x6c6>
  {
    __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_WUF);
 800d1f0:	687b      	ldr	r3, [r7, #4]
 800d1f2:	681b      	ldr	r3, [r3, #0]
 800d1f4:	f44f 1280 	mov.w	r2, #1048576	@ 0x100000
 800d1f8:	621a      	str	r2, [r3, #32]
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
    /* Call registered Wakeup Callback */
    huart->WakeupCallback(huart);
#else
    /* Call legacy weak Wakeup Callback */
    HAL_UARTEx_WakeupCallback(huart);
 800d1fa:	6878      	ldr	r0, [r7, #4]
 800d1fc:	f002 f80c 	bl	800f218 <HAL_UARTEx_WakeupCallback>
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
    return;
 800d200:	e051      	b.n	800d2a6 <HAL_UART_IRQHandler+0x76a>
  }

  /* UART in mode Transmitter ------------------------------------------------*/
  if (((isrflags & USART_ISR_TXE_TXFNF) != 0U)
 800d202:	f8d7 30e4 	ldr.w	r3, [r7, #228]	@ 0xe4
 800d206:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 800d20a:	2b00      	cmp	r3, #0
 800d20c:	d014      	beq.n	800d238 <HAL_UART_IRQHandler+0x6fc>
      && (((cr1its & USART_CR1_TXEIE_TXFNFIE) != 0U)
 800d20e:	f8d7 30e0 	ldr.w	r3, [r7, #224]	@ 0xe0
 800d212:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 800d216:	2b00      	cmp	r3, #0
 800d218:	d105      	bne.n	800d226 <HAL_UART_IRQHandler+0x6ea>
          || ((cr3its & USART_CR3_TXFTIE) != 0U)))
 800d21a:	f8d7 30dc 	ldr.w	r3, [r7, #220]	@ 0xdc
 800d21e:	f403 0300 	and.w	r3, r3, #8388608	@ 0x800000
 800d222:	2b00      	cmp	r3, #0
 800d224:	d008      	beq.n	800d238 <HAL_UART_IRQHandler+0x6fc>
  {
    if (huart->TxISR != NULL)
 800d226:	687b      	ldr	r3, [r7, #4]
 800d228:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 800d22a:	2b00      	cmp	r3, #0
 800d22c:	d03a      	beq.n	800d2a4 <HAL_UART_IRQHandler+0x768>
    {
      huart->TxISR(huart);
 800d22e:	687b      	ldr	r3, [r7, #4]
 800d230:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 800d232:	6878      	ldr	r0, [r7, #4]
 800d234:	4798      	blx	r3
    }
    return;
 800d236:	e035      	b.n	800d2a4 <HAL_UART_IRQHandler+0x768>
  }

  /* UART in mode Transmitter (transmission end) -----------------------------*/
  if (((isrflags & USART_ISR_TC) != 0U) && ((cr1its & USART_CR1_TCIE) != 0U))
 800d238:	f8d7 30e4 	ldr.w	r3, [r7, #228]	@ 0xe4
 800d23c:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 800d240:	2b00      	cmp	r3, #0
 800d242:	d009      	beq.n	800d258 <HAL_UART_IRQHandler+0x71c>
 800d244:	f8d7 30e0 	ldr.w	r3, [r7, #224]	@ 0xe0
 800d248:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 800d24c:	2b00      	cmp	r3, #0
 800d24e:	d003      	beq.n	800d258 <HAL_UART_IRQHandler+0x71c>
  {
    UART_EndTransmit_IT(huart);
 800d250:	6878      	ldr	r0, [r7, #4]
 800d252:	f001 fa99 	bl	800e788 <UART_EndTransmit_IT>
    return;
 800d256:	e026      	b.n	800d2a6 <HAL_UART_IRQHandler+0x76a>
  }

  /* UART TX Fifo Empty occurred ----------------------------------------------*/
  if (((isrflags & USART_ISR_TXFE) != 0U) && ((cr1its & USART_CR1_TXFEIE) != 0U))
 800d258:	f8d7 30e4 	ldr.w	r3, [r7, #228]	@ 0xe4
 800d25c:	f403 0300 	and.w	r3, r3, #8388608	@ 0x800000
 800d260:	2b00      	cmp	r3, #0
 800d262:	d009      	beq.n	800d278 <HAL_UART_IRQHandler+0x73c>
 800d264:	f8d7 30e0 	ldr.w	r3, [r7, #224]	@ 0xe0
 800d268:	f003 4380 	and.w	r3, r3, #1073741824	@ 0x40000000
 800d26c:	2b00      	cmp	r3, #0
 800d26e:	d003      	beq.n	800d278 <HAL_UART_IRQHandler+0x73c>
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
    /* Call registered Tx Fifo Empty Callback */
    huart->TxFifoEmptyCallback(huart);
#else
    /* Call legacy weak Tx Fifo Empty Callback */
    HAL_UARTEx_TxFifoEmptyCallback(huart);
 800d270:	6878      	ldr	r0, [r7, #4]
 800d272:	f001 ffe5 	bl	800f240 <HAL_UARTEx_TxFifoEmptyCallback>
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
    return;
 800d276:	e016      	b.n	800d2a6 <HAL_UART_IRQHandler+0x76a>
  }

  /* UART RX Fifo Full occurred ----------------------------------------------*/
  if (((isrflags & USART_ISR_RXFF) != 0U) && ((cr1its & USART_CR1_RXFFIE) != 0U))
 800d278:	f8d7 30e4 	ldr.w	r3, [r7, #228]	@ 0xe4
 800d27c:	f003 7380 	and.w	r3, r3, #16777216	@ 0x1000000
 800d280:	2b00      	cmp	r3, #0
 800d282:	d010      	beq.n	800d2a6 <HAL_UART_IRQHandler+0x76a>
 800d284:	f8d7 30e0 	ldr.w	r3, [r7, #224]	@ 0xe0
 800d288:	2b00      	cmp	r3, #0
 800d28a:	da0c      	bge.n	800d2a6 <HAL_UART_IRQHandler+0x76a>
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
    /* Call registered Rx Fifo Full Callback */
    huart->RxFifoFullCallback(huart);
#else
    /* Call legacy weak Rx Fifo Full Callback */
    HAL_UARTEx_RxFifoFullCallback(huart);
 800d28c:	6878      	ldr	r0, [r7, #4]
 800d28e:	f001 ffcd 	bl	800f22c <HAL_UARTEx_RxFifoFullCallback>
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
    return;
 800d292:	e008      	b.n	800d2a6 <HAL_UART_IRQHandler+0x76a>
      return;
 800d294:	bf00      	nop
 800d296:	e006      	b.n	800d2a6 <HAL_UART_IRQHandler+0x76a>
    return;
 800d298:	bf00      	nop
 800d29a:	e004      	b.n	800d2a6 <HAL_UART_IRQHandler+0x76a>
      return;
 800d29c:	bf00      	nop
 800d29e:	e002      	b.n	800d2a6 <HAL_UART_IRQHandler+0x76a>
      return;
 800d2a0:	bf00      	nop
 800d2a2:	e000      	b.n	800d2a6 <HAL_UART_IRQHandler+0x76a>
    return;
 800d2a4:	bf00      	nop
  }
}
 800d2a6:	37e8      	adds	r7, #232	@ 0xe8
 800d2a8:	46bd      	mov	sp, r7
 800d2aa:	bd80      	pop	{r7, pc}
 800d2ac:	effffffe 	.word	0xeffffffe

0800d2b0 <HAL_UART_ErrorCallback>:
  * @brief  UART error callback.
  * @param  huart UART handle.
  * @retval None
  */
__weak void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart)
{
 800d2b0:	b480      	push	{r7}
 800d2b2:	b083      	sub	sp, #12
 800d2b4:	af00      	add	r7, sp, #0
 800d2b6:	6078      	str	r0, [r7, #4]
  UNUSED(huart);

  /* NOTE : This function should not be modified, when the callback is needed,
            the HAL_UART_ErrorCallback can be implemented in the user file.
   */
}
 800d2b8:	bf00      	nop
 800d2ba:	370c      	adds	r7, #12
 800d2bc:	46bd      	mov	sp, r7
 800d2be:	f85d 7b04 	ldr.w	r7, [sp], #4
 800d2c2:	4770      	bx	lr

0800d2c4 <UART_SetConfig>:
  * @brief Configure the UART peripheral.
  * @param huart UART handle.
  * @retval HAL status
  */
HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart)
{
 800d2c4:	e92d 4fb0 	stmdb	sp!, {r4, r5, r7, r8, r9, sl, fp, lr}
 800d2c8:	b092      	sub	sp, #72	@ 0x48
 800d2ca:	af00      	add	r7, sp, #0
 800d2cc:	6178      	str	r0, [r7, #20]
  uint32_t tmpreg;
  uint16_t brrtemp;
  UART_ClockSourceTypeDef clocksource;
  uint32_t usartdiv;
  HAL_StatusTypeDef ret               = HAL_OK;
 800d2ce:	2300      	movs	r3, #0
 800d2d0:	f887 3042 	strb.w	r3, [r7, #66]	@ 0x42
  *  the UART Word Length, Parity, Mode and oversampling:
  *  set the M bits according to huart->Init.WordLength value
  *  set PCE and PS bits according to huart->Init.Parity value
  *  set TE and RE bits according to huart->Init.Mode value
  *  set OVER8 bit according to huart->Init.OverSampling value */
  tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling ;
 800d2d4:	697b      	ldr	r3, [r7, #20]
 800d2d6:	689a      	ldr	r2, [r3, #8]
 800d2d8:	697b      	ldr	r3, [r7, #20]
 800d2da:	691b      	ldr	r3, [r3, #16]
 800d2dc:	431a      	orrs	r2, r3
 800d2de:	697b      	ldr	r3, [r7, #20]
 800d2e0:	695b      	ldr	r3, [r3, #20]
 800d2e2:	431a      	orrs	r2, r3
 800d2e4:	697b      	ldr	r3, [r7, #20]
 800d2e6:	69db      	ldr	r3, [r3, #28]
 800d2e8:	4313      	orrs	r3, r2
 800d2ea:	647b      	str	r3, [r7, #68]	@ 0x44
  MODIFY_REG(huart->Instance->CR1, USART_CR1_FIELDS, tmpreg);
 800d2ec:	697b      	ldr	r3, [r7, #20]
 800d2ee:	681b      	ldr	r3, [r3, #0]
 800d2f0:	681a      	ldr	r2, [r3, #0]
 800d2f2:	4bbe      	ldr	r3, [pc, #760]	@ (800d5ec <UART_SetConfig+0x328>)
 800d2f4:	4013      	ands	r3, r2
 800d2f6:	697a      	ldr	r2, [r7, #20]
 800d2f8:	6812      	ldr	r2, [r2, #0]
 800d2fa:	6c79      	ldr	r1, [r7, #68]	@ 0x44
 800d2fc:	430b      	orrs	r3, r1
 800d2fe:	6013      	str	r3, [r2, #0]

  /*-------------------------- USART CR2 Configuration -----------------------*/
  /* Configure the UART Stop Bits: Set STOP[13:12] bits according
  * to huart->Init.StopBits value */
  MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
 800d300:	697b      	ldr	r3, [r7, #20]
 800d302:	681b      	ldr	r3, [r3, #0]
 800d304:	685b      	ldr	r3, [r3, #4]
 800d306:	f423 5140 	bic.w	r1, r3, #12288	@ 0x3000
 800d30a:	697b      	ldr	r3, [r7, #20]
 800d30c:	68da      	ldr	r2, [r3, #12]
 800d30e:	697b      	ldr	r3, [r7, #20]
 800d310:	681b      	ldr	r3, [r3, #0]
 800d312:	430a      	orrs	r2, r1
 800d314:	605a      	str	r2, [r3, #4]
  /* Configure
  * - UART HardWare Flow Control: set CTSE and RTSE bits according
  *   to huart->Init.HwFlowCtl value
  * - one-bit sampling method versus three samples' majority rule according
  *   to huart->Init.OneBitSampling (not applicable to LPUART) */
  tmpreg = (uint32_t)huart->Init.HwFlowCtl;
 800d316:	697b      	ldr	r3, [r7, #20]
 800d318:	699b      	ldr	r3, [r3, #24]
 800d31a:	647b      	str	r3, [r7, #68]	@ 0x44

  if (!(UART_INSTANCE_LOWPOWER(huart)))
 800d31c:	697b      	ldr	r3, [r7, #20]
 800d31e:	681b      	ldr	r3, [r3, #0]
 800d320:	4ab3      	ldr	r2, [pc, #716]	@ (800d5f0 <UART_SetConfig+0x32c>)
 800d322:	4293      	cmp	r3, r2
 800d324:	d004      	beq.n	800d330 <UART_SetConfig+0x6c>
  {
    tmpreg |= huart->Init.OneBitSampling;
 800d326:	697b      	ldr	r3, [r7, #20]
 800d328:	6a1b      	ldr	r3, [r3, #32]
 800d32a:	6c7a      	ldr	r2, [r7, #68]	@ 0x44
 800d32c:	4313      	orrs	r3, r2
 800d32e:	647b      	str	r3, [r7, #68]	@ 0x44
  }
  MODIFY_REG(huart->Instance->CR3, USART_CR3_FIELDS, tmpreg);
 800d330:	697b      	ldr	r3, [r7, #20]
 800d332:	681b      	ldr	r3, [r3, #0]
 800d334:	689a      	ldr	r2, [r3, #8]
 800d336:	4baf      	ldr	r3, [pc, #700]	@ (800d5f4 <UART_SetConfig+0x330>)
 800d338:	4013      	ands	r3, r2
 800d33a:	697a      	ldr	r2, [r7, #20]
 800d33c:	6812      	ldr	r2, [r2, #0]
 800d33e:	6c79      	ldr	r1, [r7, #68]	@ 0x44
 800d340:	430b      	orrs	r3, r1
 800d342:	6093      	str	r3, [r2, #8]

  /*-------------------------- USART PRESC Configuration -----------------------*/
  /* Configure
  * - UART Clock Prescaler : set PRESCALER according to huart->Init.ClockPrescaler value */
  MODIFY_REG(huart->Instance->PRESC, USART_PRESC_PRESCALER, huart->Init.ClockPrescaler);
 800d344:	697b      	ldr	r3, [r7, #20]
 800d346:	681b      	ldr	r3, [r3, #0]
 800d348:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800d34a:	f023 010f 	bic.w	r1, r3, #15
 800d34e:	697b      	ldr	r3, [r7, #20]
 800d350:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 800d352:	697b      	ldr	r3, [r7, #20]
 800d354:	681b      	ldr	r3, [r3, #0]
 800d356:	430a      	orrs	r2, r1
 800d358:	62da      	str	r2, [r3, #44]	@ 0x2c

  /*-------------------------- USART BRR Configuration -----------------------*/
  UART_GETCLOCKSOURCE(huart, clocksource);
 800d35a:	697b      	ldr	r3, [r7, #20]
 800d35c:	681b      	ldr	r3, [r3, #0]
 800d35e:	4aa6      	ldr	r2, [pc, #664]	@ (800d5f8 <UART_SetConfig+0x334>)
 800d360:	4293      	cmp	r3, r2
 800d362:	d177      	bne.n	800d454 <UART_SetConfig+0x190>
 800d364:	4ba5      	ldr	r3, [pc, #660]	@ (800d5fc <UART_SetConfig+0x338>)
 800d366:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800d368:	f003 0338 	and.w	r3, r3, #56	@ 0x38
 800d36c:	2b28      	cmp	r3, #40	@ 0x28
 800d36e:	d86d      	bhi.n	800d44c <UART_SetConfig+0x188>
 800d370:	a201      	add	r2, pc, #4	@ (adr r2, 800d378 <UART_SetConfig+0xb4>)
 800d372:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800d376:	bf00      	nop
 800d378:	0800d41d 	.word	0x0800d41d
 800d37c:	0800d44d 	.word	0x0800d44d
 800d380:	0800d44d 	.word	0x0800d44d
 800d384:	0800d44d 	.word	0x0800d44d
 800d388:	0800d44d 	.word	0x0800d44d
 800d38c:	0800d44d 	.word	0x0800d44d
 800d390:	0800d44d 	.word	0x0800d44d
 800d394:	0800d44d 	.word	0x0800d44d
 800d398:	0800d425 	.word	0x0800d425
 800d39c:	0800d44d 	.word	0x0800d44d
 800d3a0:	0800d44d 	.word	0x0800d44d
 800d3a4:	0800d44d 	.word	0x0800d44d
 800d3a8:	0800d44d 	.word	0x0800d44d
 800d3ac:	0800d44d 	.word	0x0800d44d
 800d3b0:	0800d44d 	.word	0x0800d44d
 800d3b4:	0800d44d 	.word	0x0800d44d
 800d3b8:	0800d42d 	.word	0x0800d42d
 800d3bc:	0800d44d 	.word	0x0800d44d
 800d3c0:	0800d44d 	.word	0x0800d44d
 800d3c4:	0800d44d 	.word	0x0800d44d
 800d3c8:	0800d44d 	.word	0x0800d44d
 800d3cc:	0800d44d 	.word	0x0800d44d
 800d3d0:	0800d44d 	.word	0x0800d44d
 800d3d4:	0800d44d 	.word	0x0800d44d
 800d3d8:	0800d435 	.word	0x0800d435
 800d3dc:	0800d44d 	.word	0x0800d44d
 800d3e0:	0800d44d 	.word	0x0800d44d
 800d3e4:	0800d44d 	.word	0x0800d44d
 800d3e8:	0800d44d 	.word	0x0800d44d
 800d3ec:	0800d44d 	.word	0x0800d44d
 800d3f0:	0800d44d 	.word	0x0800d44d
 800d3f4:	0800d44d 	.word	0x0800d44d
 800d3f8:	0800d43d 	.word	0x0800d43d
 800d3fc:	0800d44d 	.word	0x0800d44d
 800d400:	0800d44d 	.word	0x0800d44d
 800d404:	0800d44d 	.word	0x0800d44d
 800d408:	0800d44d 	.word	0x0800d44d
 800d40c:	0800d44d 	.word	0x0800d44d
 800d410:	0800d44d 	.word	0x0800d44d
 800d414:	0800d44d 	.word	0x0800d44d
 800d418:	0800d445 	.word	0x0800d445
 800d41c:	2301      	movs	r3, #1
 800d41e:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d422:	e222      	b.n	800d86a <UART_SetConfig+0x5a6>
 800d424:	2304      	movs	r3, #4
 800d426:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d42a:	e21e      	b.n	800d86a <UART_SetConfig+0x5a6>
 800d42c:	2308      	movs	r3, #8
 800d42e:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d432:	e21a      	b.n	800d86a <UART_SetConfig+0x5a6>
 800d434:	2310      	movs	r3, #16
 800d436:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d43a:	e216      	b.n	800d86a <UART_SetConfig+0x5a6>
 800d43c:	2320      	movs	r3, #32
 800d43e:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d442:	e212      	b.n	800d86a <UART_SetConfig+0x5a6>
 800d444:	2340      	movs	r3, #64	@ 0x40
 800d446:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d44a:	e20e      	b.n	800d86a <UART_SetConfig+0x5a6>
 800d44c:	2380      	movs	r3, #128	@ 0x80
 800d44e:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d452:	e20a      	b.n	800d86a <UART_SetConfig+0x5a6>
 800d454:	697b      	ldr	r3, [r7, #20]
 800d456:	681b      	ldr	r3, [r3, #0]
 800d458:	4a69      	ldr	r2, [pc, #420]	@ (800d600 <UART_SetConfig+0x33c>)
 800d45a:	4293      	cmp	r3, r2
 800d45c:	d130      	bne.n	800d4c0 <UART_SetConfig+0x1fc>
 800d45e:	4b67      	ldr	r3, [pc, #412]	@ (800d5fc <UART_SetConfig+0x338>)
 800d460:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800d462:	f003 0307 	and.w	r3, r3, #7
 800d466:	2b05      	cmp	r3, #5
 800d468:	d826      	bhi.n	800d4b8 <UART_SetConfig+0x1f4>
 800d46a:	a201      	add	r2, pc, #4	@ (adr r2, 800d470 <UART_SetConfig+0x1ac>)
 800d46c:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800d470:	0800d489 	.word	0x0800d489
 800d474:	0800d491 	.word	0x0800d491
 800d478:	0800d499 	.word	0x0800d499
 800d47c:	0800d4a1 	.word	0x0800d4a1
 800d480:	0800d4a9 	.word	0x0800d4a9
 800d484:	0800d4b1 	.word	0x0800d4b1
 800d488:	2300      	movs	r3, #0
 800d48a:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d48e:	e1ec      	b.n	800d86a <UART_SetConfig+0x5a6>
 800d490:	2304      	movs	r3, #4
 800d492:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d496:	e1e8      	b.n	800d86a <UART_SetConfig+0x5a6>
 800d498:	2308      	movs	r3, #8
 800d49a:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d49e:	e1e4      	b.n	800d86a <UART_SetConfig+0x5a6>
 800d4a0:	2310      	movs	r3, #16
 800d4a2:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d4a6:	e1e0      	b.n	800d86a <UART_SetConfig+0x5a6>
 800d4a8:	2320      	movs	r3, #32
 800d4aa:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d4ae:	e1dc      	b.n	800d86a <UART_SetConfig+0x5a6>
 800d4b0:	2340      	movs	r3, #64	@ 0x40
 800d4b2:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d4b6:	e1d8      	b.n	800d86a <UART_SetConfig+0x5a6>
 800d4b8:	2380      	movs	r3, #128	@ 0x80
 800d4ba:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d4be:	e1d4      	b.n	800d86a <UART_SetConfig+0x5a6>
 800d4c0:	697b      	ldr	r3, [r7, #20]
 800d4c2:	681b      	ldr	r3, [r3, #0]
 800d4c4:	4a4f      	ldr	r2, [pc, #316]	@ (800d604 <UART_SetConfig+0x340>)
 800d4c6:	4293      	cmp	r3, r2
 800d4c8:	d130      	bne.n	800d52c <UART_SetConfig+0x268>
 800d4ca:	4b4c      	ldr	r3, [pc, #304]	@ (800d5fc <UART_SetConfig+0x338>)
 800d4cc:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800d4ce:	f003 0307 	and.w	r3, r3, #7
 800d4d2:	2b05      	cmp	r3, #5
 800d4d4:	d826      	bhi.n	800d524 <UART_SetConfig+0x260>
 800d4d6:	a201      	add	r2, pc, #4	@ (adr r2, 800d4dc <UART_SetConfig+0x218>)
 800d4d8:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800d4dc:	0800d4f5 	.word	0x0800d4f5
 800d4e0:	0800d4fd 	.word	0x0800d4fd
 800d4e4:	0800d505 	.word	0x0800d505
 800d4e8:	0800d50d 	.word	0x0800d50d
 800d4ec:	0800d515 	.word	0x0800d515
 800d4f0:	0800d51d 	.word	0x0800d51d
 800d4f4:	2300      	movs	r3, #0
 800d4f6:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d4fa:	e1b6      	b.n	800d86a <UART_SetConfig+0x5a6>
 800d4fc:	2304      	movs	r3, #4
 800d4fe:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d502:	e1b2      	b.n	800d86a <UART_SetConfig+0x5a6>
 800d504:	2308      	movs	r3, #8
 800d506:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d50a:	e1ae      	b.n	800d86a <UART_SetConfig+0x5a6>
 800d50c:	2310      	movs	r3, #16
 800d50e:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d512:	e1aa      	b.n	800d86a <UART_SetConfig+0x5a6>
 800d514:	2320      	movs	r3, #32
 800d516:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d51a:	e1a6      	b.n	800d86a <UART_SetConfig+0x5a6>
 800d51c:	2340      	movs	r3, #64	@ 0x40
 800d51e:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d522:	e1a2      	b.n	800d86a <UART_SetConfig+0x5a6>
 800d524:	2380      	movs	r3, #128	@ 0x80
 800d526:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d52a:	e19e      	b.n	800d86a <UART_SetConfig+0x5a6>
 800d52c:	697b      	ldr	r3, [r7, #20]
 800d52e:	681b      	ldr	r3, [r3, #0]
 800d530:	4a35      	ldr	r2, [pc, #212]	@ (800d608 <UART_SetConfig+0x344>)
 800d532:	4293      	cmp	r3, r2
 800d534:	d130      	bne.n	800d598 <UART_SetConfig+0x2d4>
 800d536:	4b31      	ldr	r3, [pc, #196]	@ (800d5fc <UART_SetConfig+0x338>)
 800d538:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800d53a:	f003 0307 	and.w	r3, r3, #7
 800d53e:	2b05      	cmp	r3, #5
 800d540:	d826      	bhi.n	800d590 <UART_SetConfig+0x2cc>
 800d542:	a201      	add	r2, pc, #4	@ (adr r2, 800d548 <UART_SetConfig+0x284>)
 800d544:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800d548:	0800d561 	.word	0x0800d561
 800d54c:	0800d569 	.word	0x0800d569
 800d550:	0800d571 	.word	0x0800d571
 800d554:	0800d579 	.word	0x0800d579
 800d558:	0800d581 	.word	0x0800d581
 800d55c:	0800d589 	.word	0x0800d589
 800d560:	2300      	movs	r3, #0
 800d562:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d566:	e180      	b.n	800d86a <UART_SetConfig+0x5a6>
 800d568:	2304      	movs	r3, #4
 800d56a:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d56e:	e17c      	b.n	800d86a <UART_SetConfig+0x5a6>
 800d570:	2308      	movs	r3, #8
 800d572:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d576:	e178      	b.n	800d86a <UART_SetConfig+0x5a6>
 800d578:	2310      	movs	r3, #16
 800d57a:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d57e:	e174      	b.n	800d86a <UART_SetConfig+0x5a6>
 800d580:	2320      	movs	r3, #32
 800d582:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d586:	e170      	b.n	800d86a <UART_SetConfig+0x5a6>
 800d588:	2340      	movs	r3, #64	@ 0x40
 800d58a:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d58e:	e16c      	b.n	800d86a <UART_SetConfig+0x5a6>
 800d590:	2380      	movs	r3, #128	@ 0x80
 800d592:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d596:	e168      	b.n	800d86a <UART_SetConfig+0x5a6>
 800d598:	697b      	ldr	r3, [r7, #20]
 800d59a:	681b      	ldr	r3, [r3, #0]
 800d59c:	4a1b      	ldr	r2, [pc, #108]	@ (800d60c <UART_SetConfig+0x348>)
 800d59e:	4293      	cmp	r3, r2
 800d5a0:	d142      	bne.n	800d628 <UART_SetConfig+0x364>
 800d5a2:	4b16      	ldr	r3, [pc, #88]	@ (800d5fc <UART_SetConfig+0x338>)
 800d5a4:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800d5a6:	f003 0307 	and.w	r3, r3, #7
 800d5aa:	2b05      	cmp	r3, #5
 800d5ac:	d838      	bhi.n	800d620 <UART_SetConfig+0x35c>
 800d5ae:	a201      	add	r2, pc, #4	@ (adr r2, 800d5b4 <UART_SetConfig+0x2f0>)
 800d5b0:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800d5b4:	0800d5cd 	.word	0x0800d5cd
 800d5b8:	0800d5d5 	.word	0x0800d5d5
 800d5bc:	0800d5dd 	.word	0x0800d5dd
 800d5c0:	0800d5e5 	.word	0x0800d5e5
 800d5c4:	0800d611 	.word	0x0800d611
 800d5c8:	0800d619 	.word	0x0800d619
 800d5cc:	2300      	movs	r3, #0
 800d5ce:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d5d2:	e14a      	b.n	800d86a <UART_SetConfig+0x5a6>
 800d5d4:	2304      	movs	r3, #4
 800d5d6:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d5da:	e146      	b.n	800d86a <UART_SetConfig+0x5a6>
 800d5dc:	2308      	movs	r3, #8
 800d5de:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d5e2:	e142      	b.n	800d86a <UART_SetConfig+0x5a6>
 800d5e4:	2310      	movs	r3, #16
 800d5e6:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d5ea:	e13e      	b.n	800d86a <UART_SetConfig+0x5a6>
 800d5ec:	cfff69f3 	.word	0xcfff69f3
 800d5f0:	58000c00 	.word	0x58000c00
 800d5f4:	11fff4ff 	.word	0x11fff4ff
 800d5f8:	40011000 	.word	0x40011000
 800d5fc:	58024400 	.word	0x58024400
 800d600:	40004400 	.word	0x40004400
 800d604:	40004800 	.word	0x40004800
 800d608:	40004c00 	.word	0x40004c00
 800d60c:	40005000 	.word	0x40005000
 800d610:	2320      	movs	r3, #32
 800d612:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d616:	e128      	b.n	800d86a <UART_SetConfig+0x5a6>
 800d618:	2340      	movs	r3, #64	@ 0x40
 800d61a:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d61e:	e124      	b.n	800d86a <UART_SetConfig+0x5a6>
 800d620:	2380      	movs	r3, #128	@ 0x80
 800d622:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d626:	e120      	b.n	800d86a <UART_SetConfig+0x5a6>
 800d628:	697b      	ldr	r3, [r7, #20]
 800d62a:	681b      	ldr	r3, [r3, #0]
 800d62c:	4acb      	ldr	r2, [pc, #812]	@ (800d95c <UART_SetConfig+0x698>)
 800d62e:	4293      	cmp	r3, r2
 800d630:	d176      	bne.n	800d720 <UART_SetConfig+0x45c>
 800d632:	4bcb      	ldr	r3, [pc, #812]	@ (800d960 <UART_SetConfig+0x69c>)
 800d634:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800d636:	f003 0338 	and.w	r3, r3, #56	@ 0x38
 800d63a:	2b28      	cmp	r3, #40	@ 0x28
 800d63c:	d86c      	bhi.n	800d718 <UART_SetConfig+0x454>
 800d63e:	a201      	add	r2, pc, #4	@ (adr r2, 800d644 <UART_SetConfig+0x380>)
 800d640:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800d644:	0800d6e9 	.word	0x0800d6e9
 800d648:	0800d719 	.word	0x0800d719
 800d64c:	0800d719 	.word	0x0800d719
 800d650:	0800d719 	.word	0x0800d719
 800d654:	0800d719 	.word	0x0800d719
 800d658:	0800d719 	.word	0x0800d719
 800d65c:	0800d719 	.word	0x0800d719
 800d660:	0800d719 	.word	0x0800d719
 800d664:	0800d6f1 	.word	0x0800d6f1
 800d668:	0800d719 	.word	0x0800d719
 800d66c:	0800d719 	.word	0x0800d719
 800d670:	0800d719 	.word	0x0800d719
 800d674:	0800d719 	.word	0x0800d719
 800d678:	0800d719 	.word	0x0800d719
 800d67c:	0800d719 	.word	0x0800d719
 800d680:	0800d719 	.word	0x0800d719
 800d684:	0800d6f9 	.word	0x0800d6f9
 800d688:	0800d719 	.word	0x0800d719
 800d68c:	0800d719 	.word	0x0800d719
 800d690:	0800d719 	.word	0x0800d719
 800d694:	0800d719 	.word	0x0800d719
 800d698:	0800d719 	.word	0x0800d719
 800d69c:	0800d719 	.word	0x0800d719
 800d6a0:	0800d719 	.word	0x0800d719
 800d6a4:	0800d701 	.word	0x0800d701
 800d6a8:	0800d719 	.word	0x0800d719
 800d6ac:	0800d719 	.word	0x0800d719
 800d6b0:	0800d719 	.word	0x0800d719
 800d6b4:	0800d719 	.word	0x0800d719
 800d6b8:	0800d719 	.word	0x0800d719
 800d6bc:	0800d719 	.word	0x0800d719
 800d6c0:	0800d719 	.word	0x0800d719
 800d6c4:	0800d709 	.word	0x0800d709
 800d6c8:	0800d719 	.word	0x0800d719
 800d6cc:	0800d719 	.word	0x0800d719
 800d6d0:	0800d719 	.word	0x0800d719
 800d6d4:	0800d719 	.word	0x0800d719
 800d6d8:	0800d719 	.word	0x0800d719
 800d6dc:	0800d719 	.word	0x0800d719
 800d6e0:	0800d719 	.word	0x0800d719
 800d6e4:	0800d711 	.word	0x0800d711
 800d6e8:	2301      	movs	r3, #1
 800d6ea:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d6ee:	e0bc      	b.n	800d86a <UART_SetConfig+0x5a6>
 800d6f0:	2304      	movs	r3, #4
 800d6f2:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d6f6:	e0b8      	b.n	800d86a <UART_SetConfig+0x5a6>
 800d6f8:	2308      	movs	r3, #8
 800d6fa:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d6fe:	e0b4      	b.n	800d86a <UART_SetConfig+0x5a6>
 800d700:	2310      	movs	r3, #16
 800d702:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d706:	e0b0      	b.n	800d86a <UART_SetConfig+0x5a6>
 800d708:	2320      	movs	r3, #32
 800d70a:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d70e:	e0ac      	b.n	800d86a <UART_SetConfig+0x5a6>
 800d710:	2340      	movs	r3, #64	@ 0x40
 800d712:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d716:	e0a8      	b.n	800d86a <UART_SetConfig+0x5a6>
 800d718:	2380      	movs	r3, #128	@ 0x80
 800d71a:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d71e:	e0a4      	b.n	800d86a <UART_SetConfig+0x5a6>
 800d720:	697b      	ldr	r3, [r7, #20]
 800d722:	681b      	ldr	r3, [r3, #0]
 800d724:	4a8f      	ldr	r2, [pc, #572]	@ (800d964 <UART_SetConfig+0x6a0>)
 800d726:	4293      	cmp	r3, r2
 800d728:	d130      	bne.n	800d78c <UART_SetConfig+0x4c8>
 800d72a:	4b8d      	ldr	r3, [pc, #564]	@ (800d960 <UART_SetConfig+0x69c>)
 800d72c:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800d72e:	f003 0307 	and.w	r3, r3, #7
 800d732:	2b05      	cmp	r3, #5
 800d734:	d826      	bhi.n	800d784 <UART_SetConfig+0x4c0>
 800d736:	a201      	add	r2, pc, #4	@ (adr r2, 800d73c <UART_SetConfig+0x478>)
 800d738:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800d73c:	0800d755 	.word	0x0800d755
 800d740:	0800d75d 	.word	0x0800d75d
 800d744:	0800d765 	.word	0x0800d765
 800d748:	0800d76d 	.word	0x0800d76d
 800d74c:	0800d775 	.word	0x0800d775
 800d750:	0800d77d 	.word	0x0800d77d
 800d754:	2300      	movs	r3, #0
 800d756:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d75a:	e086      	b.n	800d86a <UART_SetConfig+0x5a6>
 800d75c:	2304      	movs	r3, #4
 800d75e:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d762:	e082      	b.n	800d86a <UART_SetConfig+0x5a6>
 800d764:	2308      	movs	r3, #8
 800d766:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d76a:	e07e      	b.n	800d86a <UART_SetConfig+0x5a6>
 800d76c:	2310      	movs	r3, #16
 800d76e:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d772:	e07a      	b.n	800d86a <UART_SetConfig+0x5a6>
 800d774:	2320      	movs	r3, #32
 800d776:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d77a:	e076      	b.n	800d86a <UART_SetConfig+0x5a6>
 800d77c:	2340      	movs	r3, #64	@ 0x40
 800d77e:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d782:	e072      	b.n	800d86a <UART_SetConfig+0x5a6>
 800d784:	2380      	movs	r3, #128	@ 0x80
 800d786:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d78a:	e06e      	b.n	800d86a <UART_SetConfig+0x5a6>
 800d78c:	697b      	ldr	r3, [r7, #20]
 800d78e:	681b      	ldr	r3, [r3, #0]
 800d790:	4a75      	ldr	r2, [pc, #468]	@ (800d968 <UART_SetConfig+0x6a4>)
 800d792:	4293      	cmp	r3, r2
 800d794:	d130      	bne.n	800d7f8 <UART_SetConfig+0x534>
 800d796:	4b72      	ldr	r3, [pc, #456]	@ (800d960 <UART_SetConfig+0x69c>)
 800d798:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800d79a:	f003 0307 	and.w	r3, r3, #7
 800d79e:	2b05      	cmp	r3, #5
 800d7a0:	d826      	bhi.n	800d7f0 <UART_SetConfig+0x52c>
 800d7a2:	a201      	add	r2, pc, #4	@ (adr r2, 800d7a8 <UART_SetConfig+0x4e4>)
 800d7a4:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800d7a8:	0800d7c1 	.word	0x0800d7c1
 800d7ac:	0800d7c9 	.word	0x0800d7c9
 800d7b0:	0800d7d1 	.word	0x0800d7d1
 800d7b4:	0800d7d9 	.word	0x0800d7d9
 800d7b8:	0800d7e1 	.word	0x0800d7e1
 800d7bc:	0800d7e9 	.word	0x0800d7e9
 800d7c0:	2300      	movs	r3, #0
 800d7c2:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d7c6:	e050      	b.n	800d86a <UART_SetConfig+0x5a6>
 800d7c8:	2304      	movs	r3, #4
 800d7ca:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d7ce:	e04c      	b.n	800d86a <UART_SetConfig+0x5a6>
 800d7d0:	2308      	movs	r3, #8
 800d7d2:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d7d6:	e048      	b.n	800d86a <UART_SetConfig+0x5a6>
 800d7d8:	2310      	movs	r3, #16
 800d7da:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d7de:	e044      	b.n	800d86a <UART_SetConfig+0x5a6>
 800d7e0:	2320      	movs	r3, #32
 800d7e2:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d7e6:	e040      	b.n	800d86a <UART_SetConfig+0x5a6>
 800d7e8:	2340      	movs	r3, #64	@ 0x40
 800d7ea:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d7ee:	e03c      	b.n	800d86a <UART_SetConfig+0x5a6>
 800d7f0:	2380      	movs	r3, #128	@ 0x80
 800d7f2:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d7f6:	e038      	b.n	800d86a <UART_SetConfig+0x5a6>
 800d7f8:	697b      	ldr	r3, [r7, #20]
 800d7fa:	681b      	ldr	r3, [r3, #0]
 800d7fc:	4a5b      	ldr	r2, [pc, #364]	@ (800d96c <UART_SetConfig+0x6a8>)
 800d7fe:	4293      	cmp	r3, r2
 800d800:	d130      	bne.n	800d864 <UART_SetConfig+0x5a0>
 800d802:	4b57      	ldr	r3, [pc, #348]	@ (800d960 <UART_SetConfig+0x69c>)
 800d804:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800d806:	f003 0307 	and.w	r3, r3, #7
 800d80a:	2b05      	cmp	r3, #5
 800d80c:	d826      	bhi.n	800d85c <UART_SetConfig+0x598>
 800d80e:	a201      	add	r2, pc, #4	@ (adr r2, 800d814 <UART_SetConfig+0x550>)
 800d810:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800d814:	0800d82d 	.word	0x0800d82d
 800d818:	0800d835 	.word	0x0800d835
 800d81c:	0800d83d 	.word	0x0800d83d
 800d820:	0800d845 	.word	0x0800d845
 800d824:	0800d84d 	.word	0x0800d84d
 800d828:	0800d855 	.word	0x0800d855
 800d82c:	2302      	movs	r3, #2
 800d82e:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d832:	e01a      	b.n	800d86a <UART_SetConfig+0x5a6>
 800d834:	2304      	movs	r3, #4
 800d836:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d83a:	e016      	b.n	800d86a <UART_SetConfig+0x5a6>
 800d83c:	2308      	movs	r3, #8
 800d83e:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d842:	e012      	b.n	800d86a <UART_SetConfig+0x5a6>
 800d844:	2310      	movs	r3, #16
 800d846:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d84a:	e00e      	b.n	800d86a <UART_SetConfig+0x5a6>
 800d84c:	2320      	movs	r3, #32
 800d84e:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d852:	e00a      	b.n	800d86a <UART_SetConfig+0x5a6>
 800d854:	2340      	movs	r3, #64	@ 0x40
 800d856:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d85a:	e006      	b.n	800d86a <UART_SetConfig+0x5a6>
 800d85c:	2380      	movs	r3, #128	@ 0x80
 800d85e:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800d862:	e002      	b.n	800d86a <UART_SetConfig+0x5a6>
 800d864:	2380      	movs	r3, #128	@ 0x80
 800d866:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43

  /* Check LPUART instance */
  if (UART_INSTANCE_LOWPOWER(huart))
 800d86a:	697b      	ldr	r3, [r7, #20]
 800d86c:	681b      	ldr	r3, [r3, #0]
 800d86e:	4a3f      	ldr	r2, [pc, #252]	@ (800d96c <UART_SetConfig+0x6a8>)
 800d870:	4293      	cmp	r3, r2
 800d872:	f040 80f8 	bne.w	800da66 <UART_SetConfig+0x7a2>
  {
    /* Retrieve frequency clock */
    switch (clocksource)
 800d876:	f897 3043 	ldrb.w	r3, [r7, #67]	@ 0x43
 800d87a:	2b20      	cmp	r3, #32
 800d87c:	dc46      	bgt.n	800d90c <UART_SetConfig+0x648>
 800d87e:	2b02      	cmp	r3, #2
 800d880:	f2c0 8082 	blt.w	800d988 <UART_SetConfig+0x6c4>
 800d884:	3b02      	subs	r3, #2
 800d886:	2b1e      	cmp	r3, #30
 800d888:	d87e      	bhi.n	800d988 <UART_SetConfig+0x6c4>
 800d88a:	a201      	add	r2, pc, #4	@ (adr r2, 800d890 <UART_SetConfig+0x5cc>)
 800d88c:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800d890:	0800d913 	.word	0x0800d913
 800d894:	0800d989 	.word	0x0800d989
 800d898:	0800d91b 	.word	0x0800d91b
 800d89c:	0800d989 	.word	0x0800d989
 800d8a0:	0800d989 	.word	0x0800d989
 800d8a4:	0800d989 	.word	0x0800d989
 800d8a8:	0800d92b 	.word	0x0800d92b
 800d8ac:	0800d989 	.word	0x0800d989
 800d8b0:	0800d989 	.word	0x0800d989
 800d8b4:	0800d989 	.word	0x0800d989
 800d8b8:	0800d989 	.word	0x0800d989
 800d8bc:	0800d989 	.word	0x0800d989
 800d8c0:	0800d989 	.word	0x0800d989
 800d8c4:	0800d989 	.word	0x0800d989
 800d8c8:	0800d93b 	.word	0x0800d93b
 800d8cc:	0800d989 	.word	0x0800d989
 800d8d0:	0800d989 	.word	0x0800d989
 800d8d4:	0800d989 	.word	0x0800d989
 800d8d8:	0800d989 	.word	0x0800d989
 800d8dc:	0800d989 	.word	0x0800d989
 800d8e0:	0800d989 	.word	0x0800d989
 800d8e4:	0800d989 	.word	0x0800d989
 800d8e8:	0800d989 	.word	0x0800d989
 800d8ec:	0800d989 	.word	0x0800d989
 800d8f0:	0800d989 	.word	0x0800d989
 800d8f4:	0800d989 	.word	0x0800d989
 800d8f8:	0800d989 	.word	0x0800d989
 800d8fc:	0800d989 	.word	0x0800d989
 800d900:	0800d989 	.word	0x0800d989
 800d904:	0800d989 	.word	0x0800d989
 800d908:	0800d97b 	.word	0x0800d97b
 800d90c:	2b40      	cmp	r3, #64	@ 0x40
 800d90e:	d037      	beq.n	800d980 <UART_SetConfig+0x6bc>
 800d910:	e03a      	b.n	800d988 <UART_SetConfig+0x6c4>
    {
      case UART_CLOCKSOURCE_D3PCLK1:
        pclk = HAL_RCCEx_GetD3PCLK1Freq();
 800d912:	f7fe f887 	bl	800ba24 <HAL_RCCEx_GetD3PCLK1Freq>
 800d916:	63f8      	str	r0, [r7, #60]	@ 0x3c
        break;
 800d918:	e03c      	b.n	800d994 <UART_SetConfig+0x6d0>
      case UART_CLOCKSOURCE_PLL2:
        HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks);
 800d91a:	f107 0324 	add.w	r3, r7, #36	@ 0x24
 800d91e:	4618      	mov	r0, r3
 800d920:	f7fe f896 	bl	800ba50 <HAL_RCCEx_GetPLL2ClockFreq>
        pclk = pll2_clocks.PLL2_Q_Frequency;
 800d924:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 800d926:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800d928:	e034      	b.n	800d994 <UART_SetConfig+0x6d0>
      case UART_CLOCKSOURCE_PLL3:
        HAL_RCCEx_GetPLL3ClockFreq(&pll3_clocks);
 800d92a:	f107 0318 	add.w	r3, r7, #24
 800d92e:	4618      	mov	r0, r3
 800d930:	f7fe f9e2 	bl	800bcf8 <HAL_RCCEx_GetPLL3ClockFreq>
        pclk = pll3_clocks.PLL3_Q_Frequency;
 800d934:	69fb      	ldr	r3, [r7, #28]
 800d936:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800d938:	e02c      	b.n	800d994 <UART_SetConfig+0x6d0>
      case UART_CLOCKSOURCE_HSI:
        if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
 800d93a:	4b09      	ldr	r3, [pc, #36]	@ (800d960 <UART_SetConfig+0x69c>)
 800d93c:	681b      	ldr	r3, [r3, #0]
 800d93e:	f003 0320 	and.w	r3, r3, #32
 800d942:	2b00      	cmp	r3, #0
 800d944:	d016      	beq.n	800d974 <UART_SetConfig+0x6b0>
        {
          pclk = (uint32_t)(HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3U));
 800d946:	4b06      	ldr	r3, [pc, #24]	@ (800d960 <UART_SetConfig+0x69c>)
 800d948:	681b      	ldr	r3, [r3, #0]
 800d94a:	08db      	lsrs	r3, r3, #3
 800d94c:	f003 0303 	and.w	r3, r3, #3
 800d950:	4a07      	ldr	r2, [pc, #28]	@ (800d970 <UART_SetConfig+0x6ac>)
 800d952:	fa22 f303 	lsr.w	r3, r2, r3
 800d956:	63fb      	str	r3, [r7, #60]	@ 0x3c
        }
        else
        {
          pclk = (uint32_t) HSI_VALUE;
        }
        break;
 800d958:	e01c      	b.n	800d994 <UART_SetConfig+0x6d0>
 800d95a:	bf00      	nop
 800d95c:	40011400 	.word	0x40011400
 800d960:	58024400 	.word	0x58024400
 800d964:	40007800 	.word	0x40007800
 800d968:	40007c00 	.word	0x40007c00
 800d96c:	58000c00 	.word	0x58000c00
 800d970:	03d09000 	.word	0x03d09000
          pclk = (uint32_t) HSI_VALUE;
 800d974:	4b9d      	ldr	r3, [pc, #628]	@ (800dbec <UART_SetConfig+0x928>)
 800d976:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800d978:	e00c      	b.n	800d994 <UART_SetConfig+0x6d0>
      case UART_CLOCKSOURCE_CSI:
        pclk = (uint32_t) CSI_VALUE;
 800d97a:	4b9d      	ldr	r3, [pc, #628]	@ (800dbf0 <UART_SetConfig+0x92c>)
 800d97c:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800d97e:	e009      	b.n	800d994 <UART_SetConfig+0x6d0>
      case UART_CLOCKSOURCE_LSE:
        pclk = (uint32_t) LSE_VALUE;
 800d980:	f44f 4300 	mov.w	r3, #32768	@ 0x8000
 800d984:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800d986:	e005      	b.n	800d994 <UART_SetConfig+0x6d0>
      default:
        pclk = 0U;
 800d988:	2300      	movs	r3, #0
 800d98a:	63fb      	str	r3, [r7, #60]	@ 0x3c
        ret = HAL_ERROR;
 800d98c:	2301      	movs	r3, #1
 800d98e:	f887 3042 	strb.w	r3, [r7, #66]	@ 0x42
        break;
 800d992:	bf00      	nop
    }

    /* If proper clock source reported */
    if (pclk != 0U)
 800d994:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800d996:	2b00      	cmp	r3, #0
 800d998:	f000 81de 	beq.w	800dd58 <UART_SetConfig+0xa94>
    {
      /* Compute clock after Prescaler */
      lpuart_ker_ck_pres = (pclk / UARTPrescTable[huart->Init.ClockPrescaler]);
 800d99c:	697b      	ldr	r3, [r7, #20]
 800d99e:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 800d9a0:	4a94      	ldr	r2, [pc, #592]	@ (800dbf4 <UART_SetConfig+0x930>)
 800d9a2:	f832 3013 	ldrh.w	r3, [r2, r3, lsl #1]
 800d9a6:	461a      	mov	r2, r3
 800d9a8:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800d9aa:	fbb3 f3f2 	udiv	r3, r3, r2
 800d9ae:	633b      	str	r3, [r7, #48]	@ 0x30

      /* Ensure that Frequency clock is in the range [3 * baudrate, 4096 * baudrate] */
      if ((lpuart_ker_ck_pres < (3U * huart->Init.BaudRate)) ||
 800d9b0:	697b      	ldr	r3, [r7, #20]
 800d9b2:	685a      	ldr	r2, [r3, #4]
 800d9b4:	4613      	mov	r3, r2
 800d9b6:	005b      	lsls	r3, r3, #1
 800d9b8:	4413      	add	r3, r2
 800d9ba:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 800d9bc:	429a      	cmp	r2, r3
 800d9be:	d305      	bcc.n	800d9cc <UART_SetConfig+0x708>
          (lpuart_ker_ck_pres > (4096U * huart->Init.BaudRate)))
 800d9c0:	697b      	ldr	r3, [r7, #20]
 800d9c2:	685b      	ldr	r3, [r3, #4]
 800d9c4:	031b      	lsls	r3, r3, #12
      if ((lpuart_ker_ck_pres < (3U * huart->Init.BaudRate)) ||
 800d9c6:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 800d9c8:	429a      	cmp	r2, r3
 800d9ca:	d903      	bls.n	800d9d4 <UART_SetConfig+0x710>
      {
        ret = HAL_ERROR;
 800d9cc:	2301      	movs	r3, #1
 800d9ce:	f887 3042 	strb.w	r3, [r7, #66]	@ 0x42
 800d9d2:	e1c1      	b.n	800dd58 <UART_SetConfig+0xa94>
      }
      else
      {
        /* Check computed UsartDiv value is in allocated range
           (it is forbidden to write values lower than 0x300 in the LPUART_BRR register) */
        usartdiv = (uint32_t)(UART_DIV_LPUART(pclk, huart->Init.BaudRate, huart->Init.ClockPrescaler));
 800d9d4:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800d9d6:	2200      	movs	r2, #0
 800d9d8:	60bb      	str	r3, [r7, #8]
 800d9da:	60fa      	str	r2, [r7, #12]
 800d9dc:	697b      	ldr	r3, [r7, #20]
 800d9de:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 800d9e0:	4a84      	ldr	r2, [pc, #528]	@ (800dbf4 <UART_SetConfig+0x930>)
 800d9e2:	f832 3013 	ldrh.w	r3, [r2, r3, lsl #1]
 800d9e6:	b29b      	uxth	r3, r3
 800d9e8:	2200      	movs	r2, #0
 800d9ea:	603b      	str	r3, [r7, #0]
 800d9ec:	607a      	str	r2, [r7, #4]
 800d9ee:	e9d7 2300 	ldrd	r2, r3, [r7]
 800d9f2:	e9d7 0102 	ldrd	r0, r1, [r7, #8]
 800d9f6:	f7f2 fe97 	bl	8000728 <__aeabi_uldivmod>
 800d9fa:	4602      	mov	r2, r0
 800d9fc:	460b      	mov	r3, r1
 800d9fe:	4610      	mov	r0, r2
 800da00:	4619      	mov	r1, r3
 800da02:	f04f 0200 	mov.w	r2, #0
 800da06:	f04f 0300 	mov.w	r3, #0
 800da0a:	020b      	lsls	r3, r1, #8
 800da0c:	ea43 6310 	orr.w	r3, r3, r0, lsr #24
 800da10:	0202      	lsls	r2, r0, #8
 800da12:	6979      	ldr	r1, [r7, #20]
 800da14:	6849      	ldr	r1, [r1, #4]
 800da16:	0849      	lsrs	r1, r1, #1
 800da18:	2000      	movs	r0, #0
 800da1a:	460c      	mov	r4, r1
 800da1c:	4605      	mov	r5, r0
 800da1e:	eb12 0804 	adds.w	r8, r2, r4
 800da22:	eb43 0905 	adc.w	r9, r3, r5
 800da26:	697b      	ldr	r3, [r7, #20]
 800da28:	685b      	ldr	r3, [r3, #4]
 800da2a:	2200      	movs	r2, #0
 800da2c:	469a      	mov	sl, r3
 800da2e:	4693      	mov	fp, r2
 800da30:	4652      	mov	r2, sl
 800da32:	465b      	mov	r3, fp
 800da34:	4640      	mov	r0, r8
 800da36:	4649      	mov	r1, r9
 800da38:	f7f2 fe76 	bl	8000728 <__aeabi_uldivmod>
 800da3c:	4602      	mov	r2, r0
 800da3e:	460b      	mov	r3, r1
 800da40:	4613      	mov	r3, r2
 800da42:	63bb      	str	r3, [r7, #56]	@ 0x38
        if ((usartdiv >= LPUART_BRR_MIN) && (usartdiv <= LPUART_BRR_MAX))
 800da44:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800da46:	f5b3 7f40 	cmp.w	r3, #768	@ 0x300
 800da4a:	d308      	bcc.n	800da5e <UART_SetConfig+0x79a>
 800da4c:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800da4e:	f5b3 1f80 	cmp.w	r3, #1048576	@ 0x100000
 800da52:	d204      	bcs.n	800da5e <UART_SetConfig+0x79a>
        {
          huart->Instance->BRR = usartdiv;
 800da54:	697b      	ldr	r3, [r7, #20]
 800da56:	681b      	ldr	r3, [r3, #0]
 800da58:	6bba      	ldr	r2, [r7, #56]	@ 0x38
 800da5a:	60da      	str	r2, [r3, #12]
 800da5c:	e17c      	b.n	800dd58 <UART_SetConfig+0xa94>
        }
        else
        {
          ret = HAL_ERROR;
 800da5e:	2301      	movs	r3, #1
 800da60:	f887 3042 	strb.w	r3, [r7, #66]	@ 0x42
 800da64:	e178      	b.n	800dd58 <UART_SetConfig+0xa94>
      } /* if ( (lpuart_ker_ck_pres < (3 * huart->Init.BaudRate) ) ||
                (lpuart_ker_ck_pres > (4096 * huart->Init.BaudRate) )) */
    } /* if (pclk != 0) */
  }
  /* Check UART Over Sampling to set Baud Rate Register */
  else if (huart->Init.OverSampling == UART_OVERSAMPLING_8)
 800da66:	697b      	ldr	r3, [r7, #20]
 800da68:	69db      	ldr	r3, [r3, #28]
 800da6a:	f5b3 4f00 	cmp.w	r3, #32768	@ 0x8000
 800da6e:	f040 80c5 	bne.w	800dbfc <UART_SetConfig+0x938>
  {
    switch (clocksource)
 800da72:	f897 3043 	ldrb.w	r3, [r7, #67]	@ 0x43
 800da76:	2b20      	cmp	r3, #32
 800da78:	dc48      	bgt.n	800db0c <UART_SetConfig+0x848>
 800da7a:	2b00      	cmp	r3, #0
 800da7c:	db7b      	blt.n	800db76 <UART_SetConfig+0x8b2>
 800da7e:	2b20      	cmp	r3, #32
 800da80:	d879      	bhi.n	800db76 <UART_SetConfig+0x8b2>
 800da82:	a201      	add	r2, pc, #4	@ (adr r2, 800da88 <UART_SetConfig+0x7c4>)
 800da84:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800da88:	0800db13 	.word	0x0800db13
 800da8c:	0800db1b 	.word	0x0800db1b
 800da90:	0800db77 	.word	0x0800db77
 800da94:	0800db77 	.word	0x0800db77
 800da98:	0800db23 	.word	0x0800db23
 800da9c:	0800db77 	.word	0x0800db77
 800daa0:	0800db77 	.word	0x0800db77
 800daa4:	0800db77 	.word	0x0800db77
 800daa8:	0800db33 	.word	0x0800db33
 800daac:	0800db77 	.word	0x0800db77
 800dab0:	0800db77 	.word	0x0800db77
 800dab4:	0800db77 	.word	0x0800db77
 800dab8:	0800db77 	.word	0x0800db77
 800dabc:	0800db77 	.word	0x0800db77
 800dac0:	0800db77 	.word	0x0800db77
 800dac4:	0800db77 	.word	0x0800db77
 800dac8:	0800db43 	.word	0x0800db43
 800dacc:	0800db77 	.word	0x0800db77
 800dad0:	0800db77 	.word	0x0800db77
 800dad4:	0800db77 	.word	0x0800db77
 800dad8:	0800db77 	.word	0x0800db77
 800dadc:	0800db77 	.word	0x0800db77
 800dae0:	0800db77 	.word	0x0800db77
 800dae4:	0800db77 	.word	0x0800db77
 800dae8:	0800db77 	.word	0x0800db77
 800daec:	0800db77 	.word	0x0800db77
 800daf0:	0800db77 	.word	0x0800db77
 800daf4:	0800db77 	.word	0x0800db77
 800daf8:	0800db77 	.word	0x0800db77
 800dafc:	0800db77 	.word	0x0800db77
 800db00:	0800db77 	.word	0x0800db77
 800db04:	0800db77 	.word	0x0800db77
 800db08:	0800db69 	.word	0x0800db69
 800db0c:	2b40      	cmp	r3, #64	@ 0x40
 800db0e:	d02e      	beq.n	800db6e <UART_SetConfig+0x8aa>
 800db10:	e031      	b.n	800db76 <UART_SetConfig+0x8b2>
    {
      case UART_CLOCKSOURCE_D2PCLK1:
        pclk = HAL_RCC_GetPCLK1Freq();
 800db12:	f7fc fd2b 	bl	800a56c <HAL_RCC_GetPCLK1Freq>
 800db16:	63f8      	str	r0, [r7, #60]	@ 0x3c
        break;
 800db18:	e033      	b.n	800db82 <UART_SetConfig+0x8be>
      case UART_CLOCKSOURCE_D2PCLK2:
        pclk = HAL_RCC_GetPCLK2Freq();
 800db1a:	f7fc fd3d 	bl	800a598 <HAL_RCC_GetPCLK2Freq>
 800db1e:	63f8      	str	r0, [r7, #60]	@ 0x3c
        break;
 800db20:	e02f      	b.n	800db82 <UART_SetConfig+0x8be>
      case UART_CLOCKSOURCE_PLL2:
        HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks);
 800db22:	f107 0324 	add.w	r3, r7, #36	@ 0x24
 800db26:	4618      	mov	r0, r3
 800db28:	f7fd ff92 	bl	800ba50 <HAL_RCCEx_GetPLL2ClockFreq>
        pclk = pll2_clocks.PLL2_Q_Frequency;
 800db2c:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 800db2e:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800db30:	e027      	b.n	800db82 <UART_SetConfig+0x8be>
      case UART_CLOCKSOURCE_PLL3:
        HAL_RCCEx_GetPLL3ClockFreq(&pll3_clocks);
 800db32:	f107 0318 	add.w	r3, r7, #24
 800db36:	4618      	mov	r0, r3
 800db38:	f7fe f8de 	bl	800bcf8 <HAL_RCCEx_GetPLL3ClockFreq>
        pclk = pll3_clocks.PLL3_Q_Frequency;
 800db3c:	69fb      	ldr	r3, [r7, #28]
 800db3e:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800db40:	e01f      	b.n	800db82 <UART_SetConfig+0x8be>
      case UART_CLOCKSOURCE_HSI:
        if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
 800db42:	4b2d      	ldr	r3, [pc, #180]	@ (800dbf8 <UART_SetConfig+0x934>)
 800db44:	681b      	ldr	r3, [r3, #0]
 800db46:	f003 0320 	and.w	r3, r3, #32
 800db4a:	2b00      	cmp	r3, #0
 800db4c:	d009      	beq.n	800db62 <UART_SetConfig+0x89e>
        {
          pclk = (uint32_t)(HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3U));
 800db4e:	4b2a      	ldr	r3, [pc, #168]	@ (800dbf8 <UART_SetConfig+0x934>)
 800db50:	681b      	ldr	r3, [r3, #0]
 800db52:	08db      	lsrs	r3, r3, #3
 800db54:	f003 0303 	and.w	r3, r3, #3
 800db58:	4a24      	ldr	r2, [pc, #144]	@ (800dbec <UART_SetConfig+0x928>)
 800db5a:	fa22 f303 	lsr.w	r3, r2, r3
 800db5e:	63fb      	str	r3, [r7, #60]	@ 0x3c
        }
        else
        {
          pclk = (uint32_t) HSI_VALUE;
        }
        break;
 800db60:	e00f      	b.n	800db82 <UART_SetConfig+0x8be>
          pclk = (uint32_t) HSI_VALUE;
 800db62:	4b22      	ldr	r3, [pc, #136]	@ (800dbec <UART_SetConfig+0x928>)
 800db64:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800db66:	e00c      	b.n	800db82 <UART_SetConfig+0x8be>
      case UART_CLOCKSOURCE_CSI:
        pclk = (uint32_t) CSI_VALUE;
 800db68:	4b21      	ldr	r3, [pc, #132]	@ (800dbf0 <UART_SetConfig+0x92c>)
 800db6a:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800db6c:	e009      	b.n	800db82 <UART_SetConfig+0x8be>
      case UART_CLOCKSOURCE_LSE:
        pclk = (uint32_t) LSE_VALUE;
 800db6e:	f44f 4300 	mov.w	r3, #32768	@ 0x8000
 800db72:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800db74:	e005      	b.n	800db82 <UART_SetConfig+0x8be>
      default:
        pclk = 0U;
 800db76:	2300      	movs	r3, #0
 800db78:	63fb      	str	r3, [r7, #60]	@ 0x3c
        ret = HAL_ERROR;
 800db7a:	2301      	movs	r3, #1
 800db7c:	f887 3042 	strb.w	r3, [r7, #66]	@ 0x42
        break;
 800db80:	bf00      	nop
    }

    /* USARTDIV must be greater than or equal to 0d16 */
    if (pclk != 0U)
 800db82:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800db84:	2b00      	cmp	r3, #0
 800db86:	f000 80e7 	beq.w	800dd58 <UART_SetConfig+0xa94>
    {
      usartdiv = (uint32_t)(UART_DIV_SAMPLING8(pclk, huart->Init.BaudRate, huart->Init.ClockPrescaler));
 800db8a:	697b      	ldr	r3, [r7, #20]
 800db8c:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 800db8e:	4a19      	ldr	r2, [pc, #100]	@ (800dbf4 <UART_SetConfig+0x930>)
 800db90:	f832 3013 	ldrh.w	r3, [r2, r3, lsl #1]
 800db94:	461a      	mov	r2, r3
 800db96:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800db98:	fbb3 f3f2 	udiv	r3, r3, r2
 800db9c:	005a      	lsls	r2, r3, #1
 800db9e:	697b      	ldr	r3, [r7, #20]
 800dba0:	685b      	ldr	r3, [r3, #4]
 800dba2:	085b      	lsrs	r3, r3, #1
 800dba4:	441a      	add	r2, r3
 800dba6:	697b      	ldr	r3, [r7, #20]
 800dba8:	685b      	ldr	r3, [r3, #4]
 800dbaa:	fbb2 f3f3 	udiv	r3, r2, r3
 800dbae:	63bb      	str	r3, [r7, #56]	@ 0x38
      if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX))
 800dbb0:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800dbb2:	2b0f      	cmp	r3, #15
 800dbb4:	d916      	bls.n	800dbe4 <UART_SetConfig+0x920>
 800dbb6:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800dbb8:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 800dbbc:	d212      	bcs.n	800dbe4 <UART_SetConfig+0x920>
      {
        brrtemp = (uint16_t)(usartdiv & 0xFFF0U);
 800dbbe:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800dbc0:	b29b      	uxth	r3, r3
 800dbc2:	f023 030f 	bic.w	r3, r3, #15
 800dbc6:	86fb      	strh	r3, [r7, #54]	@ 0x36
        brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U);
 800dbc8:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800dbca:	085b      	lsrs	r3, r3, #1
 800dbcc:	b29b      	uxth	r3, r3
 800dbce:	f003 0307 	and.w	r3, r3, #7
 800dbd2:	b29a      	uxth	r2, r3
 800dbd4:	8efb      	ldrh	r3, [r7, #54]	@ 0x36
 800dbd6:	4313      	orrs	r3, r2
 800dbd8:	86fb      	strh	r3, [r7, #54]	@ 0x36
        huart->Instance->BRR = brrtemp;
 800dbda:	697b      	ldr	r3, [r7, #20]
 800dbdc:	681b      	ldr	r3, [r3, #0]
 800dbde:	8efa      	ldrh	r2, [r7, #54]	@ 0x36
 800dbe0:	60da      	str	r2, [r3, #12]
 800dbe2:	e0b9      	b.n	800dd58 <UART_SetConfig+0xa94>
      }
      else
      {
        ret = HAL_ERROR;
 800dbe4:	2301      	movs	r3, #1
 800dbe6:	f887 3042 	strb.w	r3, [r7, #66]	@ 0x42
 800dbea:	e0b5      	b.n	800dd58 <UART_SetConfig+0xa94>
 800dbec:	03d09000 	.word	0x03d09000
 800dbf0:	003d0900 	.word	0x003d0900
 800dbf4:	080305d0 	.word	0x080305d0
 800dbf8:	58024400 	.word	0x58024400
      }
    }
  }
  else
  {
    switch (clocksource)
 800dbfc:	f897 3043 	ldrb.w	r3, [r7, #67]	@ 0x43
 800dc00:	2b20      	cmp	r3, #32
 800dc02:	dc49      	bgt.n	800dc98 <UART_SetConfig+0x9d4>
 800dc04:	2b00      	cmp	r3, #0
 800dc06:	db7c      	blt.n	800dd02 <UART_SetConfig+0xa3e>
 800dc08:	2b20      	cmp	r3, #32
 800dc0a:	d87a      	bhi.n	800dd02 <UART_SetConfig+0xa3e>
 800dc0c:	a201      	add	r2, pc, #4	@ (adr r2, 800dc14 <UART_SetConfig+0x950>)
 800dc0e:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800dc12:	bf00      	nop
 800dc14:	0800dc9f 	.word	0x0800dc9f
 800dc18:	0800dca7 	.word	0x0800dca7
 800dc1c:	0800dd03 	.word	0x0800dd03
 800dc20:	0800dd03 	.word	0x0800dd03
 800dc24:	0800dcaf 	.word	0x0800dcaf
 800dc28:	0800dd03 	.word	0x0800dd03
 800dc2c:	0800dd03 	.word	0x0800dd03
 800dc30:	0800dd03 	.word	0x0800dd03
 800dc34:	0800dcbf 	.word	0x0800dcbf
 800dc38:	0800dd03 	.word	0x0800dd03
 800dc3c:	0800dd03 	.word	0x0800dd03
 800dc40:	0800dd03 	.word	0x0800dd03
 800dc44:	0800dd03 	.word	0x0800dd03
 800dc48:	0800dd03 	.word	0x0800dd03
 800dc4c:	0800dd03 	.word	0x0800dd03
 800dc50:	0800dd03 	.word	0x0800dd03
 800dc54:	0800dccf 	.word	0x0800dccf
 800dc58:	0800dd03 	.word	0x0800dd03
 800dc5c:	0800dd03 	.word	0x0800dd03
 800dc60:	0800dd03 	.word	0x0800dd03
 800dc64:	0800dd03 	.word	0x0800dd03
 800dc68:	0800dd03 	.word	0x0800dd03
 800dc6c:	0800dd03 	.word	0x0800dd03
 800dc70:	0800dd03 	.word	0x0800dd03
 800dc74:	0800dd03 	.word	0x0800dd03
 800dc78:	0800dd03 	.word	0x0800dd03
 800dc7c:	0800dd03 	.word	0x0800dd03
 800dc80:	0800dd03 	.word	0x0800dd03
 800dc84:	0800dd03 	.word	0x0800dd03
 800dc88:	0800dd03 	.word	0x0800dd03
 800dc8c:	0800dd03 	.word	0x0800dd03
 800dc90:	0800dd03 	.word	0x0800dd03
 800dc94:	0800dcf5 	.word	0x0800dcf5
 800dc98:	2b40      	cmp	r3, #64	@ 0x40
 800dc9a:	d02e      	beq.n	800dcfa <UART_SetConfig+0xa36>
 800dc9c:	e031      	b.n	800dd02 <UART_SetConfig+0xa3e>
    {
      case UART_CLOCKSOURCE_D2PCLK1:
        pclk = HAL_RCC_GetPCLK1Freq();
 800dc9e:	f7fc fc65 	bl	800a56c <HAL_RCC_GetPCLK1Freq>
 800dca2:	63f8      	str	r0, [r7, #60]	@ 0x3c
        break;
 800dca4:	e033      	b.n	800dd0e <UART_SetConfig+0xa4a>
      case UART_CLOCKSOURCE_D2PCLK2:
        pclk = HAL_RCC_GetPCLK2Freq();
 800dca6:	f7fc fc77 	bl	800a598 <HAL_RCC_GetPCLK2Freq>
 800dcaa:	63f8      	str	r0, [r7, #60]	@ 0x3c
        break;
 800dcac:	e02f      	b.n	800dd0e <UART_SetConfig+0xa4a>
      case UART_CLOCKSOURCE_PLL2:
        HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks);
 800dcae:	f107 0324 	add.w	r3, r7, #36	@ 0x24
 800dcb2:	4618      	mov	r0, r3
 800dcb4:	f7fd fecc 	bl	800ba50 <HAL_RCCEx_GetPLL2ClockFreq>
        pclk = pll2_clocks.PLL2_Q_Frequency;
 800dcb8:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 800dcba:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800dcbc:	e027      	b.n	800dd0e <UART_SetConfig+0xa4a>
      case UART_CLOCKSOURCE_PLL3:
        HAL_RCCEx_GetPLL3ClockFreq(&pll3_clocks);
 800dcbe:	f107 0318 	add.w	r3, r7, #24
 800dcc2:	4618      	mov	r0, r3
 800dcc4:	f7fe f818 	bl	800bcf8 <HAL_RCCEx_GetPLL3ClockFreq>
        pclk = pll3_clocks.PLL3_Q_Frequency;
 800dcc8:	69fb      	ldr	r3, [r7, #28]
 800dcca:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800dccc:	e01f      	b.n	800dd0e <UART_SetConfig+0xa4a>
      case UART_CLOCKSOURCE_HSI:
        if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
 800dcce:	4b2d      	ldr	r3, [pc, #180]	@ (800dd84 <UART_SetConfig+0xac0>)
 800dcd0:	681b      	ldr	r3, [r3, #0]
 800dcd2:	f003 0320 	and.w	r3, r3, #32
 800dcd6:	2b00      	cmp	r3, #0
 800dcd8:	d009      	beq.n	800dcee <UART_SetConfig+0xa2a>
        {
          pclk = (uint32_t)(HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3U));
 800dcda:	4b2a      	ldr	r3, [pc, #168]	@ (800dd84 <UART_SetConfig+0xac0>)
 800dcdc:	681b      	ldr	r3, [r3, #0]
 800dcde:	08db      	lsrs	r3, r3, #3
 800dce0:	f003 0303 	and.w	r3, r3, #3
 800dce4:	4a28      	ldr	r2, [pc, #160]	@ (800dd88 <UART_SetConfig+0xac4>)
 800dce6:	fa22 f303 	lsr.w	r3, r2, r3
 800dcea:	63fb      	str	r3, [r7, #60]	@ 0x3c
        }
        else
        {
          pclk = (uint32_t) HSI_VALUE;
        }
        break;
 800dcec:	e00f      	b.n	800dd0e <UART_SetConfig+0xa4a>
          pclk = (uint32_t) HSI_VALUE;
 800dcee:	4b26      	ldr	r3, [pc, #152]	@ (800dd88 <UART_SetConfig+0xac4>)
 800dcf0:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800dcf2:	e00c      	b.n	800dd0e <UART_SetConfig+0xa4a>
      case UART_CLOCKSOURCE_CSI:
        pclk = (uint32_t) CSI_VALUE;
 800dcf4:	4b25      	ldr	r3, [pc, #148]	@ (800dd8c <UART_SetConfig+0xac8>)
 800dcf6:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800dcf8:	e009      	b.n	800dd0e <UART_SetConfig+0xa4a>
      case UART_CLOCKSOURCE_LSE:
        pclk = (uint32_t) LSE_VALUE;
 800dcfa:	f44f 4300 	mov.w	r3, #32768	@ 0x8000
 800dcfe:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800dd00:	e005      	b.n	800dd0e <UART_SetConfig+0xa4a>
      default:
        pclk = 0U;
 800dd02:	2300      	movs	r3, #0
 800dd04:	63fb      	str	r3, [r7, #60]	@ 0x3c
        ret = HAL_ERROR;
 800dd06:	2301      	movs	r3, #1
 800dd08:	f887 3042 	strb.w	r3, [r7, #66]	@ 0x42
        break;
 800dd0c:	bf00      	nop
    }

    if (pclk != 0U)
 800dd0e:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800dd10:	2b00      	cmp	r3, #0
 800dd12:	d021      	beq.n	800dd58 <UART_SetConfig+0xa94>
    {
      /* USARTDIV must be greater than or equal to 0d16 */
      usartdiv = (uint32_t)(UART_DIV_SAMPLING16(pclk, huart->Init.BaudRate, huart->Init.ClockPrescaler));
 800dd14:	697b      	ldr	r3, [r7, #20]
 800dd16:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 800dd18:	4a1d      	ldr	r2, [pc, #116]	@ (800dd90 <UART_SetConfig+0xacc>)
 800dd1a:	f832 3013 	ldrh.w	r3, [r2, r3, lsl #1]
 800dd1e:	461a      	mov	r2, r3
 800dd20:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800dd22:	fbb3 f2f2 	udiv	r2, r3, r2
 800dd26:	697b      	ldr	r3, [r7, #20]
 800dd28:	685b      	ldr	r3, [r3, #4]
 800dd2a:	085b      	lsrs	r3, r3, #1
 800dd2c:	441a      	add	r2, r3
 800dd2e:	697b      	ldr	r3, [r7, #20]
 800dd30:	685b      	ldr	r3, [r3, #4]
 800dd32:	fbb2 f3f3 	udiv	r3, r2, r3
 800dd36:	63bb      	str	r3, [r7, #56]	@ 0x38
      if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX))
 800dd38:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800dd3a:	2b0f      	cmp	r3, #15
 800dd3c:	d909      	bls.n	800dd52 <UART_SetConfig+0xa8e>
 800dd3e:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800dd40:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 800dd44:	d205      	bcs.n	800dd52 <UART_SetConfig+0xa8e>
      {
        huart->Instance->BRR = (uint16_t)usartdiv;
 800dd46:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800dd48:	b29a      	uxth	r2, r3
 800dd4a:	697b      	ldr	r3, [r7, #20]
 800dd4c:	681b      	ldr	r3, [r3, #0]
 800dd4e:	60da      	str	r2, [r3, #12]
 800dd50:	e002      	b.n	800dd58 <UART_SetConfig+0xa94>
      }
      else
      {
        ret = HAL_ERROR;
 800dd52:	2301      	movs	r3, #1
 800dd54:	f887 3042 	strb.w	r3, [r7, #66]	@ 0x42
      }
    }
  }

  /* Initialize the number of data to process during RX/TX ISR execution */
  huart->NbTxDataToProcess = 1;
 800dd58:	697b      	ldr	r3, [r7, #20]
 800dd5a:	2201      	movs	r2, #1
 800dd5c:	f8a3 206a 	strh.w	r2, [r3, #106]	@ 0x6a
  huart->NbRxDataToProcess = 1;
 800dd60:	697b      	ldr	r3, [r7, #20]
 800dd62:	2201      	movs	r2, #1
 800dd64:	f8a3 2068 	strh.w	r2, [r3, #104]	@ 0x68

  /* Clear ISR function pointers */
  huart->RxISR = NULL;
 800dd68:	697b      	ldr	r3, [r7, #20]
 800dd6a:	2200      	movs	r2, #0
 800dd6c:	675a      	str	r2, [r3, #116]	@ 0x74
  huart->TxISR = NULL;
 800dd6e:	697b      	ldr	r3, [r7, #20]
 800dd70:	2200      	movs	r2, #0
 800dd72:	679a      	str	r2, [r3, #120]	@ 0x78

  return ret;
 800dd74:	f897 3042 	ldrb.w	r3, [r7, #66]	@ 0x42
}
 800dd78:	4618      	mov	r0, r3
 800dd7a:	3748      	adds	r7, #72	@ 0x48
 800dd7c:	46bd      	mov	sp, r7
 800dd7e:	e8bd 8fb0 	ldmia.w	sp!, {r4, r5, r7, r8, r9, sl, fp, pc}
 800dd82:	bf00      	nop
 800dd84:	58024400 	.word	0x58024400
 800dd88:	03d09000 	.word	0x03d09000
 800dd8c:	003d0900 	.word	0x003d0900
 800dd90:	080305d0 	.word	0x080305d0

0800dd94 <UART_AdvFeatureConfig>:
  * @brief Configure the UART peripheral advanced features.
  * @param huart UART handle.
  * @retval None
  */
void UART_AdvFeatureConfig(UART_HandleTypeDef *huart)
{
 800dd94:	b480      	push	{r7}
 800dd96:	b083      	sub	sp, #12
 800dd98:	af00      	add	r7, sp, #0
 800dd9a:	6078      	str	r0, [r7, #4]
  /* Check whether the set of advanced features to configure is properly set */
  assert_param(IS_UART_ADVFEATURE_INIT(huart->AdvancedInit.AdvFeatureInit));

  /* if required, configure RX/TX pins swap */
  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_SWAP_INIT))
 800dd9c:	687b      	ldr	r3, [r7, #4]
 800dd9e:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800dda0:	f003 0308 	and.w	r3, r3, #8
 800dda4:	2b00      	cmp	r3, #0
 800dda6:	d00a      	beq.n	800ddbe <UART_AdvFeatureConfig+0x2a>
  {
    assert_param(IS_UART_ADVFEATURE_SWAP(huart->AdvancedInit.Swap));
    MODIFY_REG(huart->Instance->CR2, USART_CR2_SWAP, huart->AdvancedInit.Swap);
 800dda8:	687b      	ldr	r3, [r7, #4]
 800ddaa:	681b      	ldr	r3, [r3, #0]
 800ddac:	685b      	ldr	r3, [r3, #4]
 800ddae:	f423 4100 	bic.w	r1, r3, #32768	@ 0x8000
 800ddb2:	687b      	ldr	r3, [r7, #4]
 800ddb4:	6b9a      	ldr	r2, [r3, #56]	@ 0x38
 800ddb6:	687b      	ldr	r3, [r7, #4]
 800ddb8:	681b      	ldr	r3, [r3, #0]
 800ddba:	430a      	orrs	r2, r1
 800ddbc:	605a      	str	r2, [r3, #4]
  }

  /* if required, configure TX pin active level inversion */
  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_TXINVERT_INIT))
 800ddbe:	687b      	ldr	r3, [r7, #4]
 800ddc0:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800ddc2:	f003 0301 	and.w	r3, r3, #1
 800ddc6:	2b00      	cmp	r3, #0
 800ddc8:	d00a      	beq.n	800dde0 <UART_AdvFeatureConfig+0x4c>
  {
    assert_param(IS_UART_ADVFEATURE_TXINV(huart->AdvancedInit.TxPinLevelInvert));
    MODIFY_REG(huart->Instance->CR2, USART_CR2_TXINV, huart->AdvancedInit.TxPinLevelInvert);
 800ddca:	687b      	ldr	r3, [r7, #4]
 800ddcc:	681b      	ldr	r3, [r3, #0]
 800ddce:	685b      	ldr	r3, [r3, #4]
 800ddd0:	f423 3100 	bic.w	r1, r3, #131072	@ 0x20000
 800ddd4:	687b      	ldr	r3, [r7, #4]
 800ddd6:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 800ddd8:	687b      	ldr	r3, [r7, #4]
 800ddda:	681b      	ldr	r3, [r3, #0]
 800dddc:	430a      	orrs	r2, r1
 800ddde:	605a      	str	r2, [r3, #4]
  }

  /* if required, configure RX pin active level inversion */
  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXINVERT_INIT))
 800dde0:	687b      	ldr	r3, [r7, #4]
 800dde2:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800dde4:	f003 0302 	and.w	r3, r3, #2
 800dde8:	2b00      	cmp	r3, #0
 800ddea:	d00a      	beq.n	800de02 <UART_AdvFeatureConfig+0x6e>
  {
    assert_param(IS_UART_ADVFEATURE_RXINV(huart->AdvancedInit.RxPinLevelInvert));
    MODIFY_REG(huart->Instance->CR2, USART_CR2_RXINV, huart->AdvancedInit.RxPinLevelInvert);
 800ddec:	687b      	ldr	r3, [r7, #4]
 800ddee:	681b      	ldr	r3, [r3, #0]
 800ddf0:	685b      	ldr	r3, [r3, #4]
 800ddf2:	f423 3180 	bic.w	r1, r3, #65536	@ 0x10000
 800ddf6:	687b      	ldr	r3, [r7, #4]
 800ddf8:	6b1a      	ldr	r2, [r3, #48]	@ 0x30
 800ddfa:	687b      	ldr	r3, [r7, #4]
 800ddfc:	681b      	ldr	r3, [r3, #0]
 800ddfe:	430a      	orrs	r2, r1
 800de00:	605a      	str	r2, [r3, #4]
  }

  /* if required, configure data inversion */
  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DATAINVERT_INIT))
 800de02:	687b      	ldr	r3, [r7, #4]
 800de04:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800de06:	f003 0304 	and.w	r3, r3, #4
 800de0a:	2b00      	cmp	r3, #0
 800de0c:	d00a      	beq.n	800de24 <UART_AdvFeatureConfig+0x90>
  {
    assert_param(IS_UART_ADVFEATURE_DATAINV(huart->AdvancedInit.DataInvert));
    MODIFY_REG(huart->Instance->CR2, USART_CR2_DATAINV, huart->AdvancedInit.DataInvert);
 800de0e:	687b      	ldr	r3, [r7, #4]
 800de10:	681b      	ldr	r3, [r3, #0]
 800de12:	685b      	ldr	r3, [r3, #4]
 800de14:	f423 2180 	bic.w	r1, r3, #262144	@ 0x40000
 800de18:	687b      	ldr	r3, [r7, #4]
 800de1a:	6b5a      	ldr	r2, [r3, #52]	@ 0x34
 800de1c:	687b      	ldr	r3, [r7, #4]
 800de1e:	681b      	ldr	r3, [r3, #0]
 800de20:	430a      	orrs	r2, r1
 800de22:	605a      	str	r2, [r3, #4]
  }

  /* if required, configure RX overrun detection disabling */
  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXOVERRUNDISABLE_INIT))
 800de24:	687b      	ldr	r3, [r7, #4]
 800de26:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800de28:	f003 0310 	and.w	r3, r3, #16
 800de2c:	2b00      	cmp	r3, #0
 800de2e:	d00a      	beq.n	800de46 <UART_AdvFeatureConfig+0xb2>
  {
    assert_param(IS_UART_OVERRUN(huart->AdvancedInit.OverrunDisable));
    MODIFY_REG(huart->Instance->CR3, USART_CR3_OVRDIS, huart->AdvancedInit.OverrunDisable);
 800de30:	687b      	ldr	r3, [r7, #4]
 800de32:	681b      	ldr	r3, [r3, #0]
 800de34:	689b      	ldr	r3, [r3, #8]
 800de36:	f423 5180 	bic.w	r1, r3, #4096	@ 0x1000
 800de3a:	687b      	ldr	r3, [r7, #4]
 800de3c:	6bda      	ldr	r2, [r3, #60]	@ 0x3c
 800de3e:	687b      	ldr	r3, [r7, #4]
 800de40:	681b      	ldr	r3, [r3, #0]
 800de42:	430a      	orrs	r2, r1
 800de44:	609a      	str	r2, [r3, #8]
  }

  /* if required, configure DMA disabling on reception error */
  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DMADISABLEONERROR_INIT))
 800de46:	687b      	ldr	r3, [r7, #4]
 800de48:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800de4a:	f003 0320 	and.w	r3, r3, #32
 800de4e:	2b00      	cmp	r3, #0
 800de50:	d00a      	beq.n	800de68 <UART_AdvFeatureConfig+0xd4>
  {
    assert_param(IS_UART_ADVFEATURE_DMAONRXERROR(huart->AdvancedInit.DMADisableonRxError));
    MODIFY_REG(huart->Instance->CR3, USART_CR3_DDRE, huart->AdvancedInit.DMADisableonRxError);
 800de52:	687b      	ldr	r3, [r7, #4]
 800de54:	681b      	ldr	r3, [r3, #0]
 800de56:	689b      	ldr	r3, [r3, #8]
 800de58:	f423 5100 	bic.w	r1, r3, #8192	@ 0x2000
 800de5c:	687b      	ldr	r3, [r7, #4]
 800de5e:	6c1a      	ldr	r2, [r3, #64]	@ 0x40
 800de60:	687b      	ldr	r3, [r7, #4]
 800de62:	681b      	ldr	r3, [r3, #0]
 800de64:	430a      	orrs	r2, r1
 800de66:	609a      	str	r2, [r3, #8]
  }

  /* if required, configure auto Baud rate detection scheme */
  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_AUTOBAUDRATE_INIT))
 800de68:	687b      	ldr	r3, [r7, #4]
 800de6a:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800de6c:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 800de70:	2b00      	cmp	r3, #0
 800de72:	d01a      	beq.n	800deaa <UART_AdvFeatureConfig+0x116>
  {
    assert_param(IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(huart->Instance));
    assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATE(huart->AdvancedInit.AutoBaudRateEnable));
    MODIFY_REG(huart->Instance->CR2, USART_CR2_ABREN, huart->AdvancedInit.AutoBaudRateEnable);
 800de74:	687b      	ldr	r3, [r7, #4]
 800de76:	681b      	ldr	r3, [r3, #0]
 800de78:	685b      	ldr	r3, [r3, #4]
 800de7a:	f423 1180 	bic.w	r1, r3, #1048576	@ 0x100000
 800de7e:	687b      	ldr	r3, [r7, #4]
 800de80:	6c5a      	ldr	r2, [r3, #68]	@ 0x44
 800de82:	687b      	ldr	r3, [r7, #4]
 800de84:	681b      	ldr	r3, [r3, #0]
 800de86:	430a      	orrs	r2, r1
 800de88:	605a      	str	r2, [r3, #4]
    /* set auto Baudrate detection parameters if detection is enabled */
    if (huart->AdvancedInit.AutoBaudRateEnable == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE)
 800de8a:	687b      	ldr	r3, [r7, #4]
 800de8c:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 800de8e:	f5b3 1f80 	cmp.w	r3, #1048576	@ 0x100000
 800de92:	d10a      	bne.n	800deaa <UART_AdvFeatureConfig+0x116>
    {
      assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(huart->AdvancedInit.AutoBaudRateMode));
      MODIFY_REG(huart->Instance->CR2, USART_CR2_ABRMODE, huart->AdvancedInit.AutoBaudRateMode);
 800de94:	687b      	ldr	r3, [r7, #4]
 800de96:	681b      	ldr	r3, [r3, #0]
 800de98:	685b      	ldr	r3, [r3, #4]
 800de9a:	f423 01c0 	bic.w	r1, r3, #6291456	@ 0x600000
 800de9e:	687b      	ldr	r3, [r7, #4]
 800dea0:	6c9a      	ldr	r2, [r3, #72]	@ 0x48
 800dea2:	687b      	ldr	r3, [r7, #4]
 800dea4:	681b      	ldr	r3, [r3, #0]
 800dea6:	430a      	orrs	r2, r1
 800dea8:	605a      	str	r2, [r3, #4]
    }
  }

  /* if required, configure MSB first on communication line */
  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_MSBFIRST_INIT))
 800deaa:	687b      	ldr	r3, [r7, #4]
 800deac:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800deae:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 800deb2:	2b00      	cmp	r3, #0
 800deb4:	d00a      	beq.n	800decc <UART_AdvFeatureConfig+0x138>
  {
    assert_param(IS_UART_ADVFEATURE_MSBFIRST(huart->AdvancedInit.MSBFirst));
    MODIFY_REG(huart->Instance->CR2, USART_CR2_MSBFIRST, huart->AdvancedInit.MSBFirst);
 800deb6:	687b      	ldr	r3, [r7, #4]
 800deb8:	681b      	ldr	r3, [r3, #0]
 800deba:	685b      	ldr	r3, [r3, #4]
 800debc:	f423 2100 	bic.w	r1, r3, #524288	@ 0x80000
 800dec0:	687b      	ldr	r3, [r7, #4]
 800dec2:	6cda      	ldr	r2, [r3, #76]	@ 0x4c
 800dec4:	687b      	ldr	r3, [r7, #4]
 800dec6:	681b      	ldr	r3, [r3, #0]
 800dec8:	430a      	orrs	r2, r1
 800deca:	605a      	str	r2, [r3, #4]
  }
}
 800decc:	bf00      	nop
 800dece:	370c      	adds	r7, #12
 800ded0:	46bd      	mov	sp, r7
 800ded2:	f85d 7b04 	ldr.w	r7, [sp], #4
 800ded6:	4770      	bx	lr

0800ded8 <UART_CheckIdleState>:
  * @brief Check the UART Idle State.
  * @param huart UART handle.
  * @retval HAL status
  */
HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart)
{
 800ded8:	b580      	push	{r7, lr}
 800deda:	b098      	sub	sp, #96	@ 0x60
 800dedc:	af02      	add	r7, sp, #8
 800dede:	6078      	str	r0, [r7, #4]
  uint32_t tickstart;

  /* Initialize the UART ErrorCode */
  huart->ErrorCode = HAL_UART_ERROR_NONE;
 800dee0:	687b      	ldr	r3, [r7, #4]
 800dee2:	2200      	movs	r2, #0
 800dee4:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90

  /* Init tickstart for timeout management */
  tickstart = HAL_GetTick();
 800dee8:	f7f6 fe52 	bl	8004b90 <HAL_GetTick>
 800deec:	6578      	str	r0, [r7, #84]	@ 0x54

  /* Check if the Transmitter is enabled */
  if ((huart->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE)
 800deee:	687b      	ldr	r3, [r7, #4]
 800def0:	681b      	ldr	r3, [r3, #0]
 800def2:	681b      	ldr	r3, [r3, #0]
 800def4:	f003 0308 	and.w	r3, r3, #8
 800def8:	2b08      	cmp	r3, #8
 800defa:	d12f      	bne.n	800df5c <UART_CheckIdleState+0x84>
  {
    /* Wait until TEACK flag is set */
    if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_TEACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK)
 800defc:	f06f 437e 	mvn.w	r3, #4261412864	@ 0xfe000000
 800df00:	9300      	str	r3, [sp, #0]
 800df02:	6d7b      	ldr	r3, [r7, #84]	@ 0x54
 800df04:	2200      	movs	r2, #0
 800df06:	f44f 1100 	mov.w	r1, #2097152	@ 0x200000
 800df0a:	6878      	ldr	r0, [r7, #4]
 800df0c:	f000 f88e 	bl	800e02c <UART_WaitOnFlagUntilTimeout>
 800df10:	4603      	mov	r3, r0
 800df12:	2b00      	cmp	r3, #0
 800df14:	d022      	beq.n	800df5c <UART_CheckIdleState+0x84>
    {
      /* Disable TXE interrupt for the interrupt process */
      ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE_TXFNFIE));
 800df16:	687b      	ldr	r3, [r7, #4]
 800df18:	681b      	ldr	r3, [r3, #0]
 800df1a:	63bb      	str	r3, [r7, #56]	@ 0x38
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800df1c:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800df1e:	e853 3f00 	ldrex	r3, [r3]
 800df22:	637b      	str	r3, [r7, #52]	@ 0x34
   return(result);
 800df24:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 800df26:	f023 0380 	bic.w	r3, r3, #128	@ 0x80
 800df2a:	653b      	str	r3, [r7, #80]	@ 0x50
 800df2c:	687b      	ldr	r3, [r7, #4]
 800df2e:	681b      	ldr	r3, [r3, #0]
 800df30:	461a      	mov	r2, r3
 800df32:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 800df34:	647b      	str	r3, [r7, #68]	@ 0x44
 800df36:	643a      	str	r2, [r7, #64]	@ 0x40
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800df38:	6c39      	ldr	r1, [r7, #64]	@ 0x40
 800df3a:	6c7a      	ldr	r2, [r7, #68]	@ 0x44
 800df3c:	e841 2300 	strex	r3, r2, [r1]
 800df40:	63fb      	str	r3, [r7, #60]	@ 0x3c
   return(result);
 800df42:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800df44:	2b00      	cmp	r3, #0
 800df46:	d1e6      	bne.n	800df16 <UART_CheckIdleState+0x3e>

      huart->gState = HAL_UART_STATE_READY;
 800df48:	687b      	ldr	r3, [r7, #4]
 800df4a:	2220      	movs	r2, #32
 800df4c:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88

      __HAL_UNLOCK(huart);
 800df50:	687b      	ldr	r3, [r7, #4]
 800df52:	2200      	movs	r2, #0
 800df54:	f883 2084 	strb.w	r2, [r3, #132]	@ 0x84

      /* Timeout occurred */
      return HAL_TIMEOUT;
 800df58:	2303      	movs	r3, #3
 800df5a:	e063      	b.n	800e024 <UART_CheckIdleState+0x14c>
    }
  }

  /* Check if the Receiver is enabled */
  if ((huart->Instance->CR1 & USART_CR1_RE) == USART_CR1_RE)
 800df5c:	687b      	ldr	r3, [r7, #4]
 800df5e:	681b      	ldr	r3, [r3, #0]
 800df60:	681b      	ldr	r3, [r3, #0]
 800df62:	f003 0304 	and.w	r3, r3, #4
 800df66:	2b04      	cmp	r3, #4
 800df68:	d149      	bne.n	800dffe <UART_CheckIdleState+0x126>
  {
    /* Wait until REACK flag is set */
    if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_REACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK)
 800df6a:	f06f 437e 	mvn.w	r3, #4261412864	@ 0xfe000000
 800df6e:	9300      	str	r3, [sp, #0]
 800df70:	6d7b      	ldr	r3, [r7, #84]	@ 0x54
 800df72:	2200      	movs	r2, #0
 800df74:	f44f 0180 	mov.w	r1, #4194304	@ 0x400000
 800df78:	6878      	ldr	r0, [r7, #4]
 800df7a:	f000 f857 	bl	800e02c <UART_WaitOnFlagUntilTimeout>
 800df7e:	4603      	mov	r3, r0
 800df80:	2b00      	cmp	r3, #0
 800df82:	d03c      	beq.n	800dffe <UART_CheckIdleState+0x126>
    {
      /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error)
      interrupts for the interrupt process */
      ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
 800df84:	687b      	ldr	r3, [r7, #4]
 800df86:	681b      	ldr	r3, [r3, #0]
 800df88:	627b      	str	r3, [r7, #36]	@ 0x24
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800df8a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800df8c:	e853 3f00 	ldrex	r3, [r3]
 800df90:	623b      	str	r3, [r7, #32]
   return(result);
 800df92:	6a3b      	ldr	r3, [r7, #32]
 800df94:	f423 7390 	bic.w	r3, r3, #288	@ 0x120
 800df98:	64fb      	str	r3, [r7, #76]	@ 0x4c
 800df9a:	687b      	ldr	r3, [r7, #4]
 800df9c:	681b      	ldr	r3, [r3, #0]
 800df9e:	461a      	mov	r2, r3
 800dfa0:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 800dfa2:	633b      	str	r3, [r7, #48]	@ 0x30
 800dfa4:	62fa      	str	r2, [r7, #44]	@ 0x2c
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800dfa6:	6af9      	ldr	r1, [r7, #44]	@ 0x2c
 800dfa8:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 800dfaa:	e841 2300 	strex	r3, r2, [r1]
 800dfae:	62bb      	str	r3, [r7, #40]	@ 0x28
   return(result);
 800dfb0:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 800dfb2:	2b00      	cmp	r3, #0
 800dfb4:	d1e6      	bne.n	800df84 <UART_CheckIdleState+0xac>
      ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
 800dfb6:	687b      	ldr	r3, [r7, #4]
 800dfb8:	681b      	ldr	r3, [r3, #0]
 800dfba:	3308      	adds	r3, #8
 800dfbc:	613b      	str	r3, [r7, #16]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800dfbe:	693b      	ldr	r3, [r7, #16]
 800dfc0:	e853 3f00 	ldrex	r3, [r3]
 800dfc4:	60fb      	str	r3, [r7, #12]
   return(result);
 800dfc6:	68fb      	ldr	r3, [r7, #12]
 800dfc8:	f023 0301 	bic.w	r3, r3, #1
 800dfcc:	64bb      	str	r3, [r7, #72]	@ 0x48
 800dfce:	687b      	ldr	r3, [r7, #4]
 800dfd0:	681b      	ldr	r3, [r3, #0]
 800dfd2:	3308      	adds	r3, #8
 800dfd4:	6cba      	ldr	r2, [r7, #72]	@ 0x48
 800dfd6:	61fa      	str	r2, [r7, #28]
 800dfd8:	61bb      	str	r3, [r7, #24]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800dfda:	69b9      	ldr	r1, [r7, #24]
 800dfdc:	69fa      	ldr	r2, [r7, #28]
 800dfde:	e841 2300 	strex	r3, r2, [r1]
 800dfe2:	617b      	str	r3, [r7, #20]
   return(result);
 800dfe4:	697b      	ldr	r3, [r7, #20]
 800dfe6:	2b00      	cmp	r3, #0
 800dfe8:	d1e5      	bne.n	800dfb6 <UART_CheckIdleState+0xde>

      huart->RxState = HAL_UART_STATE_READY;
 800dfea:	687b      	ldr	r3, [r7, #4]
 800dfec:	2220      	movs	r2, #32
 800dfee:	f8c3 208c 	str.w	r2, [r3, #140]	@ 0x8c

      __HAL_UNLOCK(huart);
 800dff2:	687b      	ldr	r3, [r7, #4]
 800dff4:	2200      	movs	r2, #0
 800dff6:	f883 2084 	strb.w	r2, [r3, #132]	@ 0x84

      /* Timeout occurred */
      return HAL_TIMEOUT;
 800dffa:	2303      	movs	r3, #3
 800dffc:	e012      	b.n	800e024 <UART_CheckIdleState+0x14c>
    }
  }

  /* Initialize the UART State */
  huart->gState = HAL_UART_STATE_READY;
 800dffe:	687b      	ldr	r3, [r7, #4]
 800e000:	2220      	movs	r2, #32
 800e002:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88
  huart->RxState = HAL_UART_STATE_READY;
 800e006:	687b      	ldr	r3, [r7, #4]
 800e008:	2220      	movs	r2, #32
 800e00a:	f8c3 208c 	str.w	r2, [r3, #140]	@ 0x8c
  huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
 800e00e:	687b      	ldr	r3, [r7, #4]
 800e010:	2200      	movs	r2, #0
 800e012:	66da      	str	r2, [r3, #108]	@ 0x6c
  huart->RxEventType = HAL_UART_RXEVENT_TC;
 800e014:	687b      	ldr	r3, [r7, #4]
 800e016:	2200      	movs	r2, #0
 800e018:	671a      	str	r2, [r3, #112]	@ 0x70

  __HAL_UNLOCK(huart);
 800e01a:	687b      	ldr	r3, [r7, #4]
 800e01c:	2200      	movs	r2, #0
 800e01e:	f883 2084 	strb.w	r2, [r3, #132]	@ 0x84

  return HAL_OK;
 800e022:	2300      	movs	r3, #0
}
 800e024:	4618      	mov	r0, r3
 800e026:	3758      	adds	r7, #88	@ 0x58
 800e028:	46bd      	mov	sp, r7
 800e02a:	bd80      	pop	{r7, pc}

0800e02c <UART_WaitOnFlagUntilTimeout>:
  * @param Timeout   Timeout duration
  * @retval HAL status
  */
HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status,
                                              uint32_t Tickstart, uint32_t Timeout)
{
 800e02c:	b580      	push	{r7, lr}
 800e02e:	b084      	sub	sp, #16
 800e030:	af00      	add	r7, sp, #0
 800e032:	60f8      	str	r0, [r7, #12]
 800e034:	60b9      	str	r1, [r7, #8]
 800e036:	603b      	str	r3, [r7, #0]
 800e038:	4613      	mov	r3, r2
 800e03a:	71fb      	strb	r3, [r7, #7]
  /* Wait until flag is set */
  while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
 800e03c:	e04f      	b.n	800e0de <UART_WaitOnFlagUntilTimeout+0xb2>
  {
    /* Check for the Timeout */
    if (Timeout != HAL_MAX_DELAY)
 800e03e:	69bb      	ldr	r3, [r7, #24]
 800e040:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 800e044:	d04b      	beq.n	800e0de <UART_WaitOnFlagUntilTimeout+0xb2>
    {
      if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
 800e046:	f7f6 fda3 	bl	8004b90 <HAL_GetTick>
 800e04a:	4602      	mov	r2, r0
 800e04c:	683b      	ldr	r3, [r7, #0]
 800e04e:	1ad3      	subs	r3, r2, r3
 800e050:	69ba      	ldr	r2, [r7, #24]
 800e052:	429a      	cmp	r2, r3
 800e054:	d302      	bcc.n	800e05c <UART_WaitOnFlagUntilTimeout+0x30>
 800e056:	69bb      	ldr	r3, [r7, #24]
 800e058:	2b00      	cmp	r3, #0
 800e05a:	d101      	bne.n	800e060 <UART_WaitOnFlagUntilTimeout+0x34>
      {

        return HAL_TIMEOUT;
 800e05c:	2303      	movs	r3, #3
 800e05e:	e04e      	b.n	800e0fe <UART_WaitOnFlagUntilTimeout+0xd2>
      }

      if ((READ_BIT(huart->Instance->CR1, USART_CR1_RE) != 0U) && (Flag != UART_FLAG_TXE) && (Flag != UART_FLAG_TC))
 800e060:	68fb      	ldr	r3, [r7, #12]
 800e062:	681b      	ldr	r3, [r3, #0]
 800e064:	681b      	ldr	r3, [r3, #0]
 800e066:	f003 0304 	and.w	r3, r3, #4
 800e06a:	2b00      	cmp	r3, #0
 800e06c:	d037      	beq.n	800e0de <UART_WaitOnFlagUntilTimeout+0xb2>
 800e06e:	68bb      	ldr	r3, [r7, #8]
 800e070:	2b80      	cmp	r3, #128	@ 0x80
 800e072:	d034      	beq.n	800e0de <UART_WaitOnFlagUntilTimeout+0xb2>
 800e074:	68bb      	ldr	r3, [r7, #8]
 800e076:	2b40      	cmp	r3, #64	@ 0x40
 800e078:	d031      	beq.n	800e0de <UART_WaitOnFlagUntilTimeout+0xb2>
      {
        if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) == SET)
 800e07a:	68fb      	ldr	r3, [r7, #12]
 800e07c:	681b      	ldr	r3, [r3, #0]
 800e07e:	69db      	ldr	r3, [r3, #28]
 800e080:	f003 0308 	and.w	r3, r3, #8
 800e084:	2b08      	cmp	r3, #8
 800e086:	d110      	bne.n	800e0aa <UART_WaitOnFlagUntilTimeout+0x7e>
        {
          /* Clear Overrun Error flag*/
          __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF);
 800e088:	68fb      	ldr	r3, [r7, #12]
 800e08a:	681b      	ldr	r3, [r3, #0]
 800e08c:	2208      	movs	r2, #8
 800e08e:	621a      	str	r2, [r3, #32]

          /* Blocking error : transfer is aborted
          Set the UART state ready to be able to start again the process,
          Disable Rx Interrupts if ongoing */
          UART_EndRxTransfer(huart);
 800e090:	68f8      	ldr	r0, [r7, #12]
 800e092:	f000 f95b 	bl	800e34c <UART_EndRxTransfer>

          huart->ErrorCode = HAL_UART_ERROR_ORE;
 800e096:	68fb      	ldr	r3, [r7, #12]
 800e098:	2208      	movs	r2, #8
 800e09a:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90

          /* Process Unlocked */
          __HAL_UNLOCK(huart);
 800e09e:	68fb      	ldr	r3, [r7, #12]
 800e0a0:	2200      	movs	r2, #0
 800e0a2:	f883 2084 	strb.w	r2, [r3, #132]	@ 0x84

          return HAL_ERROR;
 800e0a6:	2301      	movs	r3, #1
 800e0a8:	e029      	b.n	800e0fe <UART_WaitOnFlagUntilTimeout+0xd2>
        }
        if (__HAL_UART_GET_FLAG(huart, UART_FLAG_RTOF) == SET)
 800e0aa:	68fb      	ldr	r3, [r7, #12]
 800e0ac:	681b      	ldr	r3, [r3, #0]
 800e0ae:	69db      	ldr	r3, [r3, #28]
 800e0b0:	f403 6300 	and.w	r3, r3, #2048	@ 0x800
 800e0b4:	f5b3 6f00 	cmp.w	r3, #2048	@ 0x800
 800e0b8:	d111      	bne.n	800e0de <UART_WaitOnFlagUntilTimeout+0xb2>
        {
          /* Clear Receiver Timeout flag*/
          __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_RTOF);
 800e0ba:	68fb      	ldr	r3, [r7, #12]
 800e0bc:	681b      	ldr	r3, [r3, #0]
 800e0be:	f44f 6200 	mov.w	r2, #2048	@ 0x800
 800e0c2:	621a      	str	r2, [r3, #32]

          /* Blocking error : transfer is aborted
          Set the UART state ready to be able to start again the process,
          Disable Rx Interrupts if ongoing */
          UART_EndRxTransfer(huart);
 800e0c4:	68f8      	ldr	r0, [r7, #12]
 800e0c6:	f000 f941 	bl	800e34c <UART_EndRxTransfer>

          huart->ErrorCode = HAL_UART_ERROR_RTO;
 800e0ca:	68fb      	ldr	r3, [r7, #12]
 800e0cc:	2220      	movs	r2, #32
 800e0ce:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90

          /* Process Unlocked */
          __HAL_UNLOCK(huart);
 800e0d2:	68fb      	ldr	r3, [r7, #12]
 800e0d4:	2200      	movs	r2, #0
 800e0d6:	f883 2084 	strb.w	r2, [r3, #132]	@ 0x84

          return HAL_TIMEOUT;
 800e0da:	2303      	movs	r3, #3
 800e0dc:	e00f      	b.n	800e0fe <UART_WaitOnFlagUntilTimeout+0xd2>
  while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
 800e0de:	68fb      	ldr	r3, [r7, #12]
 800e0e0:	681b      	ldr	r3, [r3, #0]
 800e0e2:	69da      	ldr	r2, [r3, #28]
 800e0e4:	68bb      	ldr	r3, [r7, #8]
 800e0e6:	4013      	ands	r3, r2
 800e0e8:	68ba      	ldr	r2, [r7, #8]
 800e0ea:	429a      	cmp	r2, r3
 800e0ec:	bf0c      	ite	eq
 800e0ee:	2301      	moveq	r3, #1
 800e0f0:	2300      	movne	r3, #0
 800e0f2:	b2db      	uxtb	r3, r3
 800e0f4:	461a      	mov	r2, r3
 800e0f6:	79fb      	ldrb	r3, [r7, #7]
 800e0f8:	429a      	cmp	r2, r3
 800e0fa:	d0a0      	beq.n	800e03e <UART_WaitOnFlagUntilTimeout+0x12>
        }
      }
    }
  }
  return HAL_OK;
 800e0fc:	2300      	movs	r3, #0
}
 800e0fe:	4618      	mov	r0, r3
 800e100:	3710      	adds	r7, #16
 800e102:	46bd      	mov	sp, r7
 800e104:	bd80      	pop	{r7, pc}
	...

0800e108 <UART_Start_Receive_IT>:
  * @param  pData Pointer to data buffer (u8 or u16 data elements).
  * @param  Size  Amount of data elements (u8 or u16) to be received.
  * @retval HAL status
  */
HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
{
 800e108:	b480      	push	{r7}
 800e10a:	b0a3      	sub	sp, #140	@ 0x8c
 800e10c:	af00      	add	r7, sp, #0
 800e10e:	60f8      	str	r0, [r7, #12]
 800e110:	60b9      	str	r1, [r7, #8]
 800e112:	4613      	mov	r3, r2
 800e114:	80fb      	strh	r3, [r7, #6]
  huart->pRxBuffPtr  = pData;
 800e116:	68fb      	ldr	r3, [r7, #12]
 800e118:	68ba      	ldr	r2, [r7, #8]
 800e11a:	659a      	str	r2, [r3, #88]	@ 0x58
  huart->RxXferSize  = Size;
 800e11c:	68fb      	ldr	r3, [r7, #12]
 800e11e:	88fa      	ldrh	r2, [r7, #6]
 800e120:	f8a3 205c 	strh.w	r2, [r3, #92]	@ 0x5c
  huart->RxXferCount = Size;
 800e124:	68fb      	ldr	r3, [r7, #12]
 800e126:	88fa      	ldrh	r2, [r7, #6]
 800e128:	f8a3 205e 	strh.w	r2, [r3, #94]	@ 0x5e
  huart->RxISR       = NULL;
 800e12c:	68fb      	ldr	r3, [r7, #12]
 800e12e:	2200      	movs	r2, #0
 800e130:	675a      	str	r2, [r3, #116]	@ 0x74

  /* Computation of UART mask to apply to RDR register */
  UART_MASK_COMPUTATION(huart);
 800e132:	68fb      	ldr	r3, [r7, #12]
 800e134:	689b      	ldr	r3, [r3, #8]
 800e136:	f5b3 5f80 	cmp.w	r3, #4096	@ 0x1000
 800e13a:	d10e      	bne.n	800e15a <UART_Start_Receive_IT+0x52>
 800e13c:	68fb      	ldr	r3, [r7, #12]
 800e13e:	691b      	ldr	r3, [r3, #16]
 800e140:	2b00      	cmp	r3, #0
 800e142:	d105      	bne.n	800e150 <UART_Start_Receive_IT+0x48>
 800e144:	68fb      	ldr	r3, [r7, #12]
 800e146:	f240 12ff 	movw	r2, #511	@ 0x1ff
 800e14a:	f8a3 2060 	strh.w	r2, [r3, #96]	@ 0x60
 800e14e:	e02d      	b.n	800e1ac <UART_Start_Receive_IT+0xa4>
 800e150:	68fb      	ldr	r3, [r7, #12]
 800e152:	22ff      	movs	r2, #255	@ 0xff
 800e154:	f8a3 2060 	strh.w	r2, [r3, #96]	@ 0x60
 800e158:	e028      	b.n	800e1ac <UART_Start_Receive_IT+0xa4>
 800e15a:	68fb      	ldr	r3, [r7, #12]
 800e15c:	689b      	ldr	r3, [r3, #8]
 800e15e:	2b00      	cmp	r3, #0
 800e160:	d10d      	bne.n	800e17e <UART_Start_Receive_IT+0x76>
 800e162:	68fb      	ldr	r3, [r7, #12]
 800e164:	691b      	ldr	r3, [r3, #16]
 800e166:	2b00      	cmp	r3, #0
 800e168:	d104      	bne.n	800e174 <UART_Start_Receive_IT+0x6c>
 800e16a:	68fb      	ldr	r3, [r7, #12]
 800e16c:	22ff      	movs	r2, #255	@ 0xff
 800e16e:	f8a3 2060 	strh.w	r2, [r3, #96]	@ 0x60
 800e172:	e01b      	b.n	800e1ac <UART_Start_Receive_IT+0xa4>
 800e174:	68fb      	ldr	r3, [r7, #12]
 800e176:	227f      	movs	r2, #127	@ 0x7f
 800e178:	f8a3 2060 	strh.w	r2, [r3, #96]	@ 0x60
 800e17c:	e016      	b.n	800e1ac <UART_Start_Receive_IT+0xa4>
 800e17e:	68fb      	ldr	r3, [r7, #12]
 800e180:	689b      	ldr	r3, [r3, #8]
 800e182:	f1b3 5f80 	cmp.w	r3, #268435456	@ 0x10000000
 800e186:	d10d      	bne.n	800e1a4 <UART_Start_Receive_IT+0x9c>
 800e188:	68fb      	ldr	r3, [r7, #12]
 800e18a:	691b      	ldr	r3, [r3, #16]
 800e18c:	2b00      	cmp	r3, #0
 800e18e:	d104      	bne.n	800e19a <UART_Start_Receive_IT+0x92>
 800e190:	68fb      	ldr	r3, [r7, #12]
 800e192:	227f      	movs	r2, #127	@ 0x7f
 800e194:	f8a3 2060 	strh.w	r2, [r3, #96]	@ 0x60
 800e198:	e008      	b.n	800e1ac <UART_Start_Receive_IT+0xa4>
 800e19a:	68fb      	ldr	r3, [r7, #12]
 800e19c:	223f      	movs	r2, #63	@ 0x3f
 800e19e:	f8a3 2060 	strh.w	r2, [r3, #96]	@ 0x60
 800e1a2:	e003      	b.n	800e1ac <UART_Start_Receive_IT+0xa4>
 800e1a4:	68fb      	ldr	r3, [r7, #12]
 800e1a6:	2200      	movs	r2, #0
 800e1a8:	f8a3 2060 	strh.w	r2, [r3, #96]	@ 0x60

  huart->ErrorCode = HAL_UART_ERROR_NONE;
 800e1ac:	68fb      	ldr	r3, [r7, #12]
 800e1ae:	2200      	movs	r2, #0
 800e1b0:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
  huart->RxState = HAL_UART_STATE_BUSY_RX;
 800e1b4:	68fb      	ldr	r3, [r7, #12]
 800e1b6:	2222      	movs	r2, #34	@ 0x22
 800e1b8:	f8c3 208c 	str.w	r2, [r3, #140]	@ 0x8c

  /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
  ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
 800e1bc:	68fb      	ldr	r3, [r7, #12]
 800e1be:	681b      	ldr	r3, [r3, #0]
 800e1c0:	3308      	adds	r3, #8
 800e1c2:	667b      	str	r3, [r7, #100]	@ 0x64
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800e1c4:	6e7b      	ldr	r3, [r7, #100]	@ 0x64
 800e1c6:	e853 3f00 	ldrex	r3, [r3]
 800e1ca:	663b      	str	r3, [r7, #96]	@ 0x60
   return(result);
 800e1cc:	6e3b      	ldr	r3, [r7, #96]	@ 0x60
 800e1ce:	f043 0301 	orr.w	r3, r3, #1
 800e1d2:	f8c7 3084 	str.w	r3, [r7, #132]	@ 0x84
 800e1d6:	68fb      	ldr	r3, [r7, #12]
 800e1d8:	681b      	ldr	r3, [r3, #0]
 800e1da:	3308      	adds	r3, #8
 800e1dc:	f8d7 2084 	ldr.w	r2, [r7, #132]	@ 0x84
 800e1e0:	673a      	str	r2, [r7, #112]	@ 0x70
 800e1e2:	66fb      	str	r3, [r7, #108]	@ 0x6c
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800e1e4:	6ef9      	ldr	r1, [r7, #108]	@ 0x6c
 800e1e6:	6f3a      	ldr	r2, [r7, #112]	@ 0x70
 800e1e8:	e841 2300 	strex	r3, r2, [r1]
 800e1ec:	66bb      	str	r3, [r7, #104]	@ 0x68
   return(result);
 800e1ee:	6ebb      	ldr	r3, [r7, #104]	@ 0x68
 800e1f0:	2b00      	cmp	r3, #0
 800e1f2:	d1e3      	bne.n	800e1bc <UART_Start_Receive_IT+0xb4>

  /* Configure Rx interrupt processing */
  if ((huart->FifoMode == UART_FIFOMODE_ENABLE) && (Size >= huart->NbRxDataToProcess))
 800e1f4:	68fb      	ldr	r3, [r7, #12]
 800e1f6:	6e5b      	ldr	r3, [r3, #100]	@ 0x64
 800e1f8:	f1b3 5f00 	cmp.w	r3, #536870912	@ 0x20000000
 800e1fc:	d14f      	bne.n	800e29e <UART_Start_Receive_IT+0x196>
 800e1fe:	68fb      	ldr	r3, [r7, #12]
 800e200:	f8b3 3068 	ldrh.w	r3, [r3, #104]	@ 0x68
 800e204:	88fa      	ldrh	r2, [r7, #6]
 800e206:	429a      	cmp	r2, r3
 800e208:	d349      	bcc.n	800e29e <UART_Start_Receive_IT+0x196>
  {
    /* Set the Rx ISR function pointer according to the data word length */
    if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
 800e20a:	68fb      	ldr	r3, [r7, #12]
 800e20c:	689b      	ldr	r3, [r3, #8]
 800e20e:	f5b3 5f80 	cmp.w	r3, #4096	@ 0x1000
 800e212:	d107      	bne.n	800e224 <UART_Start_Receive_IT+0x11c>
 800e214:	68fb      	ldr	r3, [r7, #12]
 800e216:	691b      	ldr	r3, [r3, #16]
 800e218:	2b00      	cmp	r3, #0
 800e21a:	d103      	bne.n	800e224 <UART_Start_Receive_IT+0x11c>
    {
      huart->RxISR = UART_RxISR_16BIT_FIFOEN;
 800e21c:	68fb      	ldr	r3, [r7, #12]
 800e21e:	4a47      	ldr	r2, [pc, #284]	@ (800e33c <UART_Start_Receive_IT+0x234>)
 800e220:	675a      	str	r2, [r3, #116]	@ 0x74
 800e222:	e002      	b.n	800e22a <UART_Start_Receive_IT+0x122>
    }
    else
    {
      huart->RxISR = UART_RxISR_8BIT_FIFOEN;
 800e224:	68fb      	ldr	r3, [r7, #12]
 800e226:	4a46      	ldr	r2, [pc, #280]	@ (800e340 <UART_Start_Receive_IT+0x238>)
 800e228:	675a      	str	r2, [r3, #116]	@ 0x74
    }

    /* Enable the UART Parity Error interrupt and RX FIFO Threshold interrupt */
    if (huart->Init.Parity != UART_PARITY_NONE)
 800e22a:	68fb      	ldr	r3, [r7, #12]
 800e22c:	691b      	ldr	r3, [r3, #16]
 800e22e:	2b00      	cmp	r3, #0
 800e230:	d01a      	beq.n	800e268 <UART_Start_Receive_IT+0x160>
    {
      ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_PEIE);
 800e232:	68fb      	ldr	r3, [r7, #12]
 800e234:	681b      	ldr	r3, [r3, #0]
 800e236:	653b      	str	r3, [r7, #80]	@ 0x50
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800e238:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 800e23a:	e853 3f00 	ldrex	r3, [r3]
 800e23e:	64fb      	str	r3, [r7, #76]	@ 0x4c
   return(result);
 800e240:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 800e242:	f443 7380 	orr.w	r3, r3, #256	@ 0x100
 800e246:	f8c7 3080 	str.w	r3, [r7, #128]	@ 0x80
 800e24a:	68fb      	ldr	r3, [r7, #12]
 800e24c:	681b      	ldr	r3, [r3, #0]
 800e24e:	461a      	mov	r2, r3
 800e250:	f8d7 3080 	ldr.w	r3, [r7, #128]	@ 0x80
 800e254:	65fb      	str	r3, [r7, #92]	@ 0x5c
 800e256:	65ba      	str	r2, [r7, #88]	@ 0x58
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800e258:	6db9      	ldr	r1, [r7, #88]	@ 0x58
 800e25a:	6dfa      	ldr	r2, [r7, #92]	@ 0x5c
 800e25c:	e841 2300 	strex	r3, r2, [r1]
 800e260:	657b      	str	r3, [r7, #84]	@ 0x54
   return(result);
 800e262:	6d7b      	ldr	r3, [r7, #84]	@ 0x54
 800e264:	2b00      	cmp	r3, #0
 800e266:	d1e4      	bne.n	800e232 <UART_Start_Receive_IT+0x12a>
    }
    ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_RXFTIE);
 800e268:	68fb      	ldr	r3, [r7, #12]
 800e26a:	681b      	ldr	r3, [r3, #0]
 800e26c:	3308      	adds	r3, #8
 800e26e:	63fb      	str	r3, [r7, #60]	@ 0x3c
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800e270:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800e272:	e853 3f00 	ldrex	r3, [r3]
 800e276:	63bb      	str	r3, [r7, #56]	@ 0x38
   return(result);
 800e278:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800e27a:	f043 5380 	orr.w	r3, r3, #268435456	@ 0x10000000
 800e27e:	67fb      	str	r3, [r7, #124]	@ 0x7c
 800e280:	68fb      	ldr	r3, [r7, #12]
 800e282:	681b      	ldr	r3, [r3, #0]
 800e284:	3308      	adds	r3, #8
 800e286:	6ffa      	ldr	r2, [r7, #124]	@ 0x7c
 800e288:	64ba      	str	r2, [r7, #72]	@ 0x48
 800e28a:	647b      	str	r3, [r7, #68]	@ 0x44
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800e28c:	6c79      	ldr	r1, [r7, #68]	@ 0x44
 800e28e:	6cba      	ldr	r2, [r7, #72]	@ 0x48
 800e290:	e841 2300 	strex	r3, r2, [r1]
 800e294:	643b      	str	r3, [r7, #64]	@ 0x40
   return(result);
 800e296:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 800e298:	2b00      	cmp	r3, #0
 800e29a:	d1e5      	bne.n	800e268 <UART_Start_Receive_IT+0x160>
 800e29c:	e046      	b.n	800e32c <UART_Start_Receive_IT+0x224>
  }
  else
  {
    /* Set the Rx ISR function pointer according to the data word length */
    if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
 800e29e:	68fb      	ldr	r3, [r7, #12]
 800e2a0:	689b      	ldr	r3, [r3, #8]
 800e2a2:	f5b3 5f80 	cmp.w	r3, #4096	@ 0x1000
 800e2a6:	d107      	bne.n	800e2b8 <UART_Start_Receive_IT+0x1b0>
 800e2a8:	68fb      	ldr	r3, [r7, #12]
 800e2aa:	691b      	ldr	r3, [r3, #16]
 800e2ac:	2b00      	cmp	r3, #0
 800e2ae:	d103      	bne.n	800e2b8 <UART_Start_Receive_IT+0x1b0>
    {
      huart->RxISR = UART_RxISR_16BIT;
 800e2b0:	68fb      	ldr	r3, [r7, #12]
 800e2b2:	4a24      	ldr	r2, [pc, #144]	@ (800e344 <UART_Start_Receive_IT+0x23c>)
 800e2b4:	675a      	str	r2, [r3, #116]	@ 0x74
 800e2b6:	e002      	b.n	800e2be <UART_Start_Receive_IT+0x1b6>
    }
    else
    {
      huart->RxISR = UART_RxISR_8BIT;
 800e2b8:	68fb      	ldr	r3, [r7, #12]
 800e2ba:	4a23      	ldr	r2, [pc, #140]	@ (800e348 <UART_Start_Receive_IT+0x240>)
 800e2bc:	675a      	str	r2, [r3, #116]	@ 0x74
    }

    /* Enable the UART Parity Error interrupt and Data Register Not Empty interrupt */
    if (huart->Init.Parity != UART_PARITY_NONE)
 800e2be:	68fb      	ldr	r3, [r7, #12]
 800e2c0:	691b      	ldr	r3, [r3, #16]
 800e2c2:	2b00      	cmp	r3, #0
 800e2c4:	d019      	beq.n	800e2fa <UART_Start_Receive_IT+0x1f2>
    {
      ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE_RXFNEIE);
 800e2c6:	68fb      	ldr	r3, [r7, #12]
 800e2c8:	681b      	ldr	r3, [r3, #0]
 800e2ca:	62bb      	str	r3, [r7, #40]	@ 0x28
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800e2cc:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 800e2ce:	e853 3f00 	ldrex	r3, [r3]
 800e2d2:	627b      	str	r3, [r7, #36]	@ 0x24
   return(result);
 800e2d4:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800e2d6:	f443 7390 	orr.w	r3, r3, #288	@ 0x120
 800e2da:	677b      	str	r3, [r7, #116]	@ 0x74
 800e2dc:	68fb      	ldr	r3, [r7, #12]
 800e2de:	681b      	ldr	r3, [r3, #0]
 800e2e0:	461a      	mov	r2, r3
 800e2e2:	6f7b      	ldr	r3, [r7, #116]	@ 0x74
 800e2e4:	637b      	str	r3, [r7, #52]	@ 0x34
 800e2e6:	633a      	str	r2, [r7, #48]	@ 0x30
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800e2e8:	6b39      	ldr	r1, [r7, #48]	@ 0x30
 800e2ea:	6b7a      	ldr	r2, [r7, #52]	@ 0x34
 800e2ec:	e841 2300 	strex	r3, r2, [r1]
 800e2f0:	62fb      	str	r3, [r7, #44]	@ 0x2c
   return(result);
 800e2f2:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 800e2f4:	2b00      	cmp	r3, #0
 800e2f6:	d1e6      	bne.n	800e2c6 <UART_Start_Receive_IT+0x1be>
 800e2f8:	e018      	b.n	800e32c <UART_Start_Receive_IT+0x224>
    }
    else
    {
      ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE);
 800e2fa:	68fb      	ldr	r3, [r7, #12]
 800e2fc:	681b      	ldr	r3, [r3, #0]
 800e2fe:	617b      	str	r3, [r7, #20]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800e300:	697b      	ldr	r3, [r7, #20]
 800e302:	e853 3f00 	ldrex	r3, [r3]
 800e306:	613b      	str	r3, [r7, #16]
   return(result);
 800e308:	693b      	ldr	r3, [r7, #16]
 800e30a:	f043 0320 	orr.w	r3, r3, #32
 800e30e:	67bb      	str	r3, [r7, #120]	@ 0x78
 800e310:	68fb      	ldr	r3, [r7, #12]
 800e312:	681b      	ldr	r3, [r3, #0]
 800e314:	461a      	mov	r2, r3
 800e316:	6fbb      	ldr	r3, [r7, #120]	@ 0x78
 800e318:	623b      	str	r3, [r7, #32]
 800e31a:	61fa      	str	r2, [r7, #28]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800e31c:	69f9      	ldr	r1, [r7, #28]
 800e31e:	6a3a      	ldr	r2, [r7, #32]
 800e320:	e841 2300 	strex	r3, r2, [r1]
 800e324:	61bb      	str	r3, [r7, #24]
   return(result);
 800e326:	69bb      	ldr	r3, [r7, #24]
 800e328:	2b00      	cmp	r3, #0
 800e32a:	d1e6      	bne.n	800e2fa <UART_Start_Receive_IT+0x1f2>
    }
  }
  return HAL_OK;
 800e32c:	2300      	movs	r3, #0
}
 800e32e:	4618      	mov	r0, r3
 800e330:	378c      	adds	r7, #140	@ 0x8c
 800e332:	46bd      	mov	sp, r7
 800e334:	f85d 7b04 	ldr.w	r7, [sp], #4
 800e338:	4770      	bx	lr
 800e33a:	bf00      	nop
 800e33c:	0800eeb1 	.word	0x0800eeb1
 800e340:	0800eb51 	.word	0x0800eb51
 800e344:	0800e999 	.word	0x0800e999
 800e348:	0800e7e1 	.word	0x0800e7e1

0800e34c <UART_EndRxTransfer>:
  * @brief  End ongoing Rx transfer on UART peripheral (following error detection or Reception completion).
  * @param  huart UART handle.
  * @retval None
  */
static void UART_EndRxTransfer(UART_HandleTypeDef *huart)
{
 800e34c:	b480      	push	{r7}
 800e34e:	b095      	sub	sp, #84	@ 0x54
 800e350:	af00      	add	r7, sp, #0
 800e352:	6078      	str	r0, [r7, #4]
  /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
  ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
 800e354:	687b      	ldr	r3, [r7, #4]
 800e356:	681b      	ldr	r3, [r3, #0]
 800e358:	637b      	str	r3, [r7, #52]	@ 0x34
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800e35a:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 800e35c:	e853 3f00 	ldrex	r3, [r3]
 800e360:	633b      	str	r3, [r7, #48]	@ 0x30
   return(result);
 800e362:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800e364:	f423 7390 	bic.w	r3, r3, #288	@ 0x120
 800e368:	64fb      	str	r3, [r7, #76]	@ 0x4c
 800e36a:	687b      	ldr	r3, [r7, #4]
 800e36c:	681b      	ldr	r3, [r3, #0]
 800e36e:	461a      	mov	r2, r3
 800e370:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 800e372:	643b      	str	r3, [r7, #64]	@ 0x40
 800e374:	63fa      	str	r2, [r7, #60]	@ 0x3c
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800e376:	6bf9      	ldr	r1, [r7, #60]	@ 0x3c
 800e378:	6c3a      	ldr	r2, [r7, #64]	@ 0x40
 800e37a:	e841 2300 	strex	r3, r2, [r1]
 800e37e:	63bb      	str	r3, [r7, #56]	@ 0x38
   return(result);
 800e380:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800e382:	2b00      	cmp	r3, #0
 800e384:	d1e6      	bne.n	800e354 <UART_EndRxTransfer+0x8>
  ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
 800e386:	687b      	ldr	r3, [r7, #4]
 800e388:	681b      	ldr	r3, [r3, #0]
 800e38a:	3308      	adds	r3, #8
 800e38c:	623b      	str	r3, [r7, #32]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800e38e:	6a3b      	ldr	r3, [r7, #32]
 800e390:	e853 3f00 	ldrex	r3, [r3]
 800e394:	61fb      	str	r3, [r7, #28]
   return(result);
 800e396:	69fa      	ldr	r2, [r7, #28]
 800e398:	4b1e      	ldr	r3, [pc, #120]	@ (800e414 <UART_EndRxTransfer+0xc8>)
 800e39a:	4013      	ands	r3, r2
 800e39c:	64bb      	str	r3, [r7, #72]	@ 0x48
 800e39e:	687b      	ldr	r3, [r7, #4]
 800e3a0:	681b      	ldr	r3, [r3, #0]
 800e3a2:	3308      	adds	r3, #8
 800e3a4:	6cba      	ldr	r2, [r7, #72]	@ 0x48
 800e3a6:	62fa      	str	r2, [r7, #44]	@ 0x2c
 800e3a8:	62bb      	str	r3, [r7, #40]	@ 0x28
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800e3aa:	6ab9      	ldr	r1, [r7, #40]	@ 0x28
 800e3ac:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 800e3ae:	e841 2300 	strex	r3, r2, [r1]
 800e3b2:	627b      	str	r3, [r7, #36]	@ 0x24
   return(result);
 800e3b4:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800e3b6:	2b00      	cmp	r3, #0
 800e3b8:	d1e5      	bne.n	800e386 <UART_EndRxTransfer+0x3a>

  /* In case of reception waiting for IDLE event, disable also the IDLE IE interrupt source */
  if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
 800e3ba:	687b      	ldr	r3, [r7, #4]
 800e3bc:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 800e3be:	2b01      	cmp	r3, #1
 800e3c0:	d118      	bne.n	800e3f4 <UART_EndRxTransfer+0xa8>
  {
    ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
 800e3c2:	687b      	ldr	r3, [r7, #4]
 800e3c4:	681b      	ldr	r3, [r3, #0]
 800e3c6:	60fb      	str	r3, [r7, #12]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800e3c8:	68fb      	ldr	r3, [r7, #12]
 800e3ca:	e853 3f00 	ldrex	r3, [r3]
 800e3ce:	60bb      	str	r3, [r7, #8]
   return(result);
 800e3d0:	68bb      	ldr	r3, [r7, #8]
 800e3d2:	f023 0310 	bic.w	r3, r3, #16
 800e3d6:	647b      	str	r3, [r7, #68]	@ 0x44
 800e3d8:	687b      	ldr	r3, [r7, #4]
 800e3da:	681b      	ldr	r3, [r3, #0]
 800e3dc:	461a      	mov	r2, r3
 800e3de:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 800e3e0:	61bb      	str	r3, [r7, #24]
 800e3e2:	617a      	str	r2, [r7, #20]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800e3e4:	6979      	ldr	r1, [r7, #20]
 800e3e6:	69ba      	ldr	r2, [r7, #24]
 800e3e8:	e841 2300 	strex	r3, r2, [r1]
 800e3ec:	613b      	str	r3, [r7, #16]
   return(result);
 800e3ee:	693b      	ldr	r3, [r7, #16]
 800e3f0:	2b00      	cmp	r3, #0
 800e3f2:	d1e6      	bne.n	800e3c2 <UART_EndRxTransfer+0x76>
  }

  /* At end of Rx process, restore huart->RxState to Ready */
  huart->RxState = HAL_UART_STATE_READY;
 800e3f4:	687b      	ldr	r3, [r7, #4]
 800e3f6:	2220      	movs	r2, #32
 800e3f8:	f8c3 208c 	str.w	r2, [r3, #140]	@ 0x8c
  huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
 800e3fc:	687b      	ldr	r3, [r7, #4]
 800e3fe:	2200      	movs	r2, #0
 800e400:	66da      	str	r2, [r3, #108]	@ 0x6c

  /* Reset RxIsr function pointer */
  huart->RxISR = NULL;
 800e402:	687b      	ldr	r3, [r7, #4]
 800e404:	2200      	movs	r2, #0
 800e406:	675a      	str	r2, [r3, #116]	@ 0x74
}
 800e408:	bf00      	nop
 800e40a:	3754      	adds	r7, #84	@ 0x54
 800e40c:	46bd      	mov	sp, r7
 800e40e:	f85d 7b04 	ldr.w	r7, [sp], #4
 800e412:	4770      	bx	lr
 800e414:	effffffe 	.word	0xeffffffe

0800e418 <UART_DMAAbortOnError>:
  *         (To be called at end of DMA Abort procedure following error occurrence).
  * @param  hdma DMA handle.
  * @retval None
  */
static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma)
{
 800e418:	b580      	push	{r7, lr}
 800e41a:	b084      	sub	sp, #16
 800e41c:	af00      	add	r7, sp, #0
 800e41e:	6078      	str	r0, [r7, #4]
  UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
 800e420:	687b      	ldr	r3, [r7, #4]
 800e422:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 800e424:	60fb      	str	r3, [r7, #12]
  huart->RxXferCount = 0U;
 800e426:	68fb      	ldr	r3, [r7, #12]
 800e428:	2200      	movs	r2, #0
 800e42a:	f8a3 205e 	strh.w	r2, [r3, #94]	@ 0x5e
  huart->TxXferCount = 0U;
 800e42e:	68fb      	ldr	r3, [r7, #12]
 800e430:	2200      	movs	r2, #0
 800e432:	f8a3 2056 	strh.w	r2, [r3, #86]	@ 0x56
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
  /*Call registered error callback*/
  huart->ErrorCallback(huart);
#else
  /*Call legacy weak error callback*/
  HAL_UART_ErrorCallback(huart);
 800e436:	68f8      	ldr	r0, [r7, #12]
 800e438:	f7fe ff3a 	bl	800d2b0 <HAL_UART_ErrorCallback>
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
}
 800e43c:	bf00      	nop
 800e43e:	3710      	adds	r7, #16
 800e440:	46bd      	mov	sp, r7
 800e442:	bd80      	pop	{r7, pc}

0800e444 <UART_TxISR_8BIT>:
  *         interruptions have been enabled by HAL_UART_Transmit_IT().
  * @param huart UART handle.
  * @retval None
  */
static void UART_TxISR_8BIT(UART_HandleTypeDef *huart)
{
 800e444:	b480      	push	{r7}
 800e446:	b08f      	sub	sp, #60	@ 0x3c
 800e448:	af00      	add	r7, sp, #0
 800e44a:	6078      	str	r0, [r7, #4]
  /* Check that a Tx process is ongoing */
  if (huart->gState == HAL_UART_STATE_BUSY_TX)
 800e44c:	687b      	ldr	r3, [r7, #4]
 800e44e:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 800e452:	2b21      	cmp	r3, #33	@ 0x21
 800e454:	d14c      	bne.n	800e4f0 <UART_TxISR_8BIT+0xac>
  {
    if (huart->TxXferCount == 0U)
 800e456:	687b      	ldr	r3, [r7, #4]
 800e458:	f8b3 3056 	ldrh.w	r3, [r3, #86]	@ 0x56
 800e45c:	b29b      	uxth	r3, r3
 800e45e:	2b00      	cmp	r3, #0
 800e460:	d132      	bne.n	800e4c8 <UART_TxISR_8BIT+0x84>
    {
      /* Disable the UART Transmit Data Register Empty Interrupt */
      ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE);
 800e462:	687b      	ldr	r3, [r7, #4]
 800e464:	681b      	ldr	r3, [r3, #0]
 800e466:	623b      	str	r3, [r7, #32]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800e468:	6a3b      	ldr	r3, [r7, #32]
 800e46a:	e853 3f00 	ldrex	r3, [r3]
 800e46e:	61fb      	str	r3, [r7, #28]
   return(result);
 800e470:	69fb      	ldr	r3, [r7, #28]
 800e472:	f023 0380 	bic.w	r3, r3, #128	@ 0x80
 800e476:	637b      	str	r3, [r7, #52]	@ 0x34
 800e478:	687b      	ldr	r3, [r7, #4]
 800e47a:	681b      	ldr	r3, [r3, #0]
 800e47c:	461a      	mov	r2, r3
 800e47e:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 800e480:	62fb      	str	r3, [r7, #44]	@ 0x2c
 800e482:	62ba      	str	r2, [r7, #40]	@ 0x28
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800e484:	6ab9      	ldr	r1, [r7, #40]	@ 0x28
 800e486:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 800e488:	e841 2300 	strex	r3, r2, [r1]
 800e48c:	627b      	str	r3, [r7, #36]	@ 0x24
   return(result);
 800e48e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800e490:	2b00      	cmp	r3, #0
 800e492:	d1e6      	bne.n	800e462 <UART_TxISR_8BIT+0x1e>

      /* Enable the UART Transmit Complete Interrupt */
      ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
 800e494:	687b      	ldr	r3, [r7, #4]
 800e496:	681b      	ldr	r3, [r3, #0]
 800e498:	60fb      	str	r3, [r7, #12]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800e49a:	68fb      	ldr	r3, [r7, #12]
 800e49c:	e853 3f00 	ldrex	r3, [r3]
 800e4a0:	60bb      	str	r3, [r7, #8]
   return(result);
 800e4a2:	68bb      	ldr	r3, [r7, #8]
 800e4a4:	f043 0340 	orr.w	r3, r3, #64	@ 0x40
 800e4a8:	633b      	str	r3, [r7, #48]	@ 0x30
 800e4aa:	687b      	ldr	r3, [r7, #4]
 800e4ac:	681b      	ldr	r3, [r3, #0]
 800e4ae:	461a      	mov	r2, r3
 800e4b0:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800e4b2:	61bb      	str	r3, [r7, #24]
 800e4b4:	617a      	str	r2, [r7, #20]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800e4b6:	6979      	ldr	r1, [r7, #20]
 800e4b8:	69ba      	ldr	r2, [r7, #24]
 800e4ba:	e841 2300 	strex	r3, r2, [r1]
 800e4be:	613b      	str	r3, [r7, #16]
   return(result);
 800e4c0:	693b      	ldr	r3, [r7, #16]
 800e4c2:	2b00      	cmp	r3, #0
 800e4c4:	d1e6      	bne.n	800e494 <UART_TxISR_8BIT+0x50>
      huart->Instance->TDR = (uint8_t)(*huart->pTxBuffPtr & (uint8_t)0xFF);
      huart->pTxBuffPtr++;
      huart->TxXferCount--;
    }
  }
}
 800e4c6:	e013      	b.n	800e4f0 <UART_TxISR_8BIT+0xac>
      huart->Instance->TDR = (uint8_t)(*huart->pTxBuffPtr & (uint8_t)0xFF);
 800e4c8:	687b      	ldr	r3, [r7, #4]
 800e4ca:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800e4cc:	781a      	ldrb	r2, [r3, #0]
 800e4ce:	687b      	ldr	r3, [r7, #4]
 800e4d0:	681b      	ldr	r3, [r3, #0]
 800e4d2:	629a      	str	r2, [r3, #40]	@ 0x28
      huart->pTxBuffPtr++;
 800e4d4:	687b      	ldr	r3, [r7, #4]
 800e4d6:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800e4d8:	1c5a      	adds	r2, r3, #1
 800e4da:	687b      	ldr	r3, [r7, #4]
 800e4dc:	651a      	str	r2, [r3, #80]	@ 0x50
      huart->TxXferCount--;
 800e4de:	687b      	ldr	r3, [r7, #4]
 800e4e0:	f8b3 3056 	ldrh.w	r3, [r3, #86]	@ 0x56
 800e4e4:	b29b      	uxth	r3, r3
 800e4e6:	3b01      	subs	r3, #1
 800e4e8:	b29a      	uxth	r2, r3
 800e4ea:	687b      	ldr	r3, [r7, #4]
 800e4ec:	f8a3 2056 	strh.w	r2, [r3, #86]	@ 0x56
}
 800e4f0:	bf00      	nop
 800e4f2:	373c      	adds	r7, #60	@ 0x3c
 800e4f4:	46bd      	mov	sp, r7
 800e4f6:	f85d 7b04 	ldr.w	r7, [sp], #4
 800e4fa:	4770      	bx	lr

0800e4fc <UART_TxISR_16BIT>:
  *         interruptions have been enabled by HAL_UART_Transmit_IT().
  * @param huart UART handle.
  * @retval None
  */
static void UART_TxISR_16BIT(UART_HandleTypeDef *huart)
{
 800e4fc:	b480      	push	{r7}
 800e4fe:	b091      	sub	sp, #68	@ 0x44
 800e500:	af00      	add	r7, sp, #0
 800e502:	6078      	str	r0, [r7, #4]
  const uint16_t *tmp;

  /* Check that a Tx process is ongoing */
  if (huart->gState == HAL_UART_STATE_BUSY_TX)
 800e504:	687b      	ldr	r3, [r7, #4]
 800e506:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 800e50a:	2b21      	cmp	r3, #33	@ 0x21
 800e50c:	d151      	bne.n	800e5b2 <UART_TxISR_16BIT+0xb6>
  {
    if (huart->TxXferCount == 0U)
 800e50e:	687b      	ldr	r3, [r7, #4]
 800e510:	f8b3 3056 	ldrh.w	r3, [r3, #86]	@ 0x56
 800e514:	b29b      	uxth	r3, r3
 800e516:	2b00      	cmp	r3, #0
 800e518:	d132      	bne.n	800e580 <UART_TxISR_16BIT+0x84>
    {
      /* Disable the UART Transmit Data Register Empty Interrupt */
      ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE);
 800e51a:	687b      	ldr	r3, [r7, #4]
 800e51c:	681b      	ldr	r3, [r3, #0]
 800e51e:	627b      	str	r3, [r7, #36]	@ 0x24
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800e520:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800e522:	e853 3f00 	ldrex	r3, [r3]
 800e526:	623b      	str	r3, [r7, #32]
   return(result);
 800e528:	6a3b      	ldr	r3, [r7, #32]
 800e52a:	f023 0380 	bic.w	r3, r3, #128	@ 0x80
 800e52e:	63bb      	str	r3, [r7, #56]	@ 0x38
 800e530:	687b      	ldr	r3, [r7, #4]
 800e532:	681b      	ldr	r3, [r3, #0]
 800e534:	461a      	mov	r2, r3
 800e536:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800e538:	633b      	str	r3, [r7, #48]	@ 0x30
 800e53a:	62fa      	str	r2, [r7, #44]	@ 0x2c
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800e53c:	6af9      	ldr	r1, [r7, #44]	@ 0x2c
 800e53e:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 800e540:	e841 2300 	strex	r3, r2, [r1]
 800e544:	62bb      	str	r3, [r7, #40]	@ 0x28
   return(result);
 800e546:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 800e548:	2b00      	cmp	r3, #0
 800e54a:	d1e6      	bne.n	800e51a <UART_TxISR_16BIT+0x1e>

      /* Enable the UART Transmit Complete Interrupt */
      ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
 800e54c:	687b      	ldr	r3, [r7, #4]
 800e54e:	681b      	ldr	r3, [r3, #0]
 800e550:	613b      	str	r3, [r7, #16]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800e552:	693b      	ldr	r3, [r7, #16]
 800e554:	e853 3f00 	ldrex	r3, [r3]
 800e558:	60fb      	str	r3, [r7, #12]
   return(result);
 800e55a:	68fb      	ldr	r3, [r7, #12]
 800e55c:	f043 0340 	orr.w	r3, r3, #64	@ 0x40
 800e560:	637b      	str	r3, [r7, #52]	@ 0x34
 800e562:	687b      	ldr	r3, [r7, #4]
 800e564:	681b      	ldr	r3, [r3, #0]
 800e566:	461a      	mov	r2, r3
 800e568:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 800e56a:	61fb      	str	r3, [r7, #28]
 800e56c:	61ba      	str	r2, [r7, #24]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800e56e:	69b9      	ldr	r1, [r7, #24]
 800e570:	69fa      	ldr	r2, [r7, #28]
 800e572:	e841 2300 	strex	r3, r2, [r1]
 800e576:	617b      	str	r3, [r7, #20]
   return(result);
 800e578:	697b      	ldr	r3, [r7, #20]
 800e57a:	2b00      	cmp	r3, #0
 800e57c:	d1e6      	bne.n	800e54c <UART_TxISR_16BIT+0x50>
      huart->Instance->TDR = (((uint32_t)(*tmp)) & 0x01FFUL);
      huart->pTxBuffPtr += 2U;
      huart->TxXferCount--;
    }
  }
}
 800e57e:	e018      	b.n	800e5b2 <UART_TxISR_16BIT+0xb6>
      tmp = (const uint16_t *) huart->pTxBuffPtr;
 800e580:	687b      	ldr	r3, [r7, #4]
 800e582:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800e584:	63fb      	str	r3, [r7, #60]	@ 0x3c
      huart->Instance->TDR = (((uint32_t)(*tmp)) & 0x01FFUL);
 800e586:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800e588:	881b      	ldrh	r3, [r3, #0]
 800e58a:	461a      	mov	r2, r3
 800e58c:	687b      	ldr	r3, [r7, #4]
 800e58e:	681b      	ldr	r3, [r3, #0]
 800e590:	f3c2 0208 	ubfx	r2, r2, #0, #9
 800e594:	629a      	str	r2, [r3, #40]	@ 0x28
      huart->pTxBuffPtr += 2U;
 800e596:	687b      	ldr	r3, [r7, #4]
 800e598:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800e59a:	1c9a      	adds	r2, r3, #2
 800e59c:	687b      	ldr	r3, [r7, #4]
 800e59e:	651a      	str	r2, [r3, #80]	@ 0x50
      huart->TxXferCount--;
 800e5a0:	687b      	ldr	r3, [r7, #4]
 800e5a2:	f8b3 3056 	ldrh.w	r3, [r3, #86]	@ 0x56
 800e5a6:	b29b      	uxth	r3, r3
 800e5a8:	3b01      	subs	r3, #1
 800e5aa:	b29a      	uxth	r2, r3
 800e5ac:	687b      	ldr	r3, [r7, #4]
 800e5ae:	f8a3 2056 	strh.w	r2, [r3, #86]	@ 0x56
}
 800e5b2:	bf00      	nop
 800e5b4:	3744      	adds	r7, #68	@ 0x44
 800e5b6:	46bd      	mov	sp, r7
 800e5b8:	f85d 7b04 	ldr.w	r7, [sp], #4
 800e5bc:	4770      	bx	lr

0800e5be <UART_TxISR_8BIT_FIFOEN>:
  *         interruptions have been enabled by HAL_UART_Transmit_IT().
  * @param huart UART handle.
  * @retval None
  */
static void UART_TxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart)
{
 800e5be:	b480      	push	{r7}
 800e5c0:	b091      	sub	sp, #68	@ 0x44
 800e5c2:	af00      	add	r7, sp, #0
 800e5c4:	6078      	str	r0, [r7, #4]
  uint16_t  nb_tx_data;

  /* Check that a Tx process is ongoing */
  if (huart->gState == HAL_UART_STATE_BUSY_TX)
 800e5c6:	687b      	ldr	r3, [r7, #4]
 800e5c8:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 800e5cc:	2b21      	cmp	r3, #33	@ 0x21
 800e5ce:	d160      	bne.n	800e692 <UART_TxISR_8BIT_FIFOEN+0xd4>
  {
    for (nb_tx_data = huart->NbTxDataToProcess ; nb_tx_data > 0U ; nb_tx_data--)
 800e5d0:	687b      	ldr	r3, [r7, #4]
 800e5d2:	f8b3 306a 	ldrh.w	r3, [r3, #106]	@ 0x6a
 800e5d6:	87fb      	strh	r3, [r7, #62]	@ 0x3e
 800e5d8:	e057      	b.n	800e68a <UART_TxISR_8BIT_FIFOEN+0xcc>
    {
      if (huart->TxXferCount == 0U)
 800e5da:	687b      	ldr	r3, [r7, #4]
 800e5dc:	f8b3 3056 	ldrh.w	r3, [r3, #86]	@ 0x56
 800e5e0:	b29b      	uxth	r3, r3
 800e5e2:	2b00      	cmp	r3, #0
 800e5e4:	d133      	bne.n	800e64e <UART_TxISR_8BIT_FIFOEN+0x90>
      {
        /* Disable the TX FIFO threshold interrupt */
        ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE);
 800e5e6:	687b      	ldr	r3, [r7, #4]
 800e5e8:	681b      	ldr	r3, [r3, #0]
 800e5ea:	3308      	adds	r3, #8
 800e5ec:	627b      	str	r3, [r7, #36]	@ 0x24
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800e5ee:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800e5f0:	e853 3f00 	ldrex	r3, [r3]
 800e5f4:	623b      	str	r3, [r7, #32]
   return(result);
 800e5f6:	6a3b      	ldr	r3, [r7, #32]
 800e5f8:	f423 0300 	bic.w	r3, r3, #8388608	@ 0x800000
 800e5fc:	63bb      	str	r3, [r7, #56]	@ 0x38
 800e5fe:	687b      	ldr	r3, [r7, #4]
 800e600:	681b      	ldr	r3, [r3, #0]
 800e602:	3308      	adds	r3, #8
 800e604:	6bba      	ldr	r2, [r7, #56]	@ 0x38
 800e606:	633a      	str	r2, [r7, #48]	@ 0x30
 800e608:	62fb      	str	r3, [r7, #44]	@ 0x2c
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800e60a:	6af9      	ldr	r1, [r7, #44]	@ 0x2c
 800e60c:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 800e60e:	e841 2300 	strex	r3, r2, [r1]
 800e612:	62bb      	str	r3, [r7, #40]	@ 0x28
   return(result);
 800e614:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 800e616:	2b00      	cmp	r3, #0
 800e618:	d1e5      	bne.n	800e5e6 <UART_TxISR_8BIT_FIFOEN+0x28>

        /* Enable the UART Transmit Complete Interrupt */
        ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
 800e61a:	687b      	ldr	r3, [r7, #4]
 800e61c:	681b      	ldr	r3, [r3, #0]
 800e61e:	613b      	str	r3, [r7, #16]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800e620:	693b      	ldr	r3, [r7, #16]
 800e622:	e853 3f00 	ldrex	r3, [r3]
 800e626:	60fb      	str	r3, [r7, #12]
   return(result);
 800e628:	68fb      	ldr	r3, [r7, #12]
 800e62a:	f043 0340 	orr.w	r3, r3, #64	@ 0x40
 800e62e:	637b      	str	r3, [r7, #52]	@ 0x34
 800e630:	687b      	ldr	r3, [r7, #4]
 800e632:	681b      	ldr	r3, [r3, #0]
 800e634:	461a      	mov	r2, r3
 800e636:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 800e638:	61fb      	str	r3, [r7, #28]
 800e63a:	61ba      	str	r2, [r7, #24]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800e63c:	69b9      	ldr	r1, [r7, #24]
 800e63e:	69fa      	ldr	r2, [r7, #28]
 800e640:	e841 2300 	strex	r3, r2, [r1]
 800e644:	617b      	str	r3, [r7, #20]
   return(result);
 800e646:	697b      	ldr	r3, [r7, #20]
 800e648:	2b00      	cmp	r3, #0
 800e64a:	d1e6      	bne.n	800e61a <UART_TxISR_8BIT_FIFOEN+0x5c>

        break; /* force exit loop */
 800e64c:	e021      	b.n	800e692 <UART_TxISR_8BIT_FIFOEN+0xd4>
      }
      else if (READ_BIT(huart->Instance->ISR, USART_ISR_TXE_TXFNF) != 0U)
 800e64e:	687b      	ldr	r3, [r7, #4]
 800e650:	681b      	ldr	r3, [r3, #0]
 800e652:	69db      	ldr	r3, [r3, #28]
 800e654:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 800e658:	2b00      	cmp	r3, #0
 800e65a:	d013      	beq.n	800e684 <UART_TxISR_8BIT_FIFOEN+0xc6>
      {
        huart->Instance->TDR = (uint8_t)(*huart->pTxBuffPtr & (uint8_t)0xFF);
 800e65c:	687b      	ldr	r3, [r7, #4]
 800e65e:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800e660:	781a      	ldrb	r2, [r3, #0]
 800e662:	687b      	ldr	r3, [r7, #4]
 800e664:	681b      	ldr	r3, [r3, #0]
 800e666:	629a      	str	r2, [r3, #40]	@ 0x28
        huart->pTxBuffPtr++;
 800e668:	687b      	ldr	r3, [r7, #4]
 800e66a:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800e66c:	1c5a      	adds	r2, r3, #1
 800e66e:	687b      	ldr	r3, [r7, #4]
 800e670:	651a      	str	r2, [r3, #80]	@ 0x50
        huart->TxXferCount--;
 800e672:	687b      	ldr	r3, [r7, #4]
 800e674:	f8b3 3056 	ldrh.w	r3, [r3, #86]	@ 0x56
 800e678:	b29b      	uxth	r3, r3
 800e67a:	3b01      	subs	r3, #1
 800e67c:	b29a      	uxth	r2, r3
 800e67e:	687b      	ldr	r3, [r7, #4]
 800e680:	f8a3 2056 	strh.w	r2, [r3, #86]	@ 0x56
    for (nb_tx_data = huart->NbTxDataToProcess ; nb_tx_data > 0U ; nb_tx_data--)
 800e684:	8ffb      	ldrh	r3, [r7, #62]	@ 0x3e
 800e686:	3b01      	subs	r3, #1
 800e688:	87fb      	strh	r3, [r7, #62]	@ 0x3e
 800e68a:	8ffb      	ldrh	r3, [r7, #62]	@ 0x3e
 800e68c:	2b00      	cmp	r3, #0
 800e68e:	d1a4      	bne.n	800e5da <UART_TxISR_8BIT_FIFOEN+0x1c>
      {
        /* Nothing to do */
      }
    }
  }
}
 800e690:	e7ff      	b.n	800e692 <UART_TxISR_8BIT_FIFOEN+0xd4>
 800e692:	bf00      	nop
 800e694:	3744      	adds	r7, #68	@ 0x44
 800e696:	46bd      	mov	sp, r7
 800e698:	f85d 7b04 	ldr.w	r7, [sp], #4
 800e69c:	4770      	bx	lr

0800e69e <UART_TxISR_16BIT_FIFOEN>:
  *         interruptions have been enabled by HAL_UART_Transmit_IT().
  * @param huart UART handle.
  * @retval None
  */
static void UART_TxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart)
{
 800e69e:	b480      	push	{r7}
 800e6a0:	b091      	sub	sp, #68	@ 0x44
 800e6a2:	af00      	add	r7, sp, #0
 800e6a4:	6078      	str	r0, [r7, #4]
  const uint16_t *tmp;
  uint16_t  nb_tx_data;

  /* Check that a Tx process is ongoing */
  if (huart->gState == HAL_UART_STATE_BUSY_TX)
 800e6a6:	687b      	ldr	r3, [r7, #4]
 800e6a8:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 800e6ac:	2b21      	cmp	r3, #33	@ 0x21
 800e6ae:	d165      	bne.n	800e77c <UART_TxISR_16BIT_FIFOEN+0xde>
  {
    for (nb_tx_data = huart->NbTxDataToProcess ; nb_tx_data > 0U ; nb_tx_data--)
 800e6b0:	687b      	ldr	r3, [r7, #4]
 800e6b2:	f8b3 306a 	ldrh.w	r3, [r3, #106]	@ 0x6a
 800e6b6:	87fb      	strh	r3, [r7, #62]	@ 0x3e
 800e6b8:	e05c      	b.n	800e774 <UART_TxISR_16BIT_FIFOEN+0xd6>
    {
      if (huart->TxXferCount == 0U)
 800e6ba:	687b      	ldr	r3, [r7, #4]
 800e6bc:	f8b3 3056 	ldrh.w	r3, [r3, #86]	@ 0x56
 800e6c0:	b29b      	uxth	r3, r3
 800e6c2:	2b00      	cmp	r3, #0
 800e6c4:	d133      	bne.n	800e72e <UART_TxISR_16BIT_FIFOEN+0x90>
      {
        /* Disable the TX FIFO threshold interrupt */
        ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE);
 800e6c6:	687b      	ldr	r3, [r7, #4]
 800e6c8:	681b      	ldr	r3, [r3, #0]
 800e6ca:	3308      	adds	r3, #8
 800e6cc:	623b      	str	r3, [r7, #32]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800e6ce:	6a3b      	ldr	r3, [r7, #32]
 800e6d0:	e853 3f00 	ldrex	r3, [r3]
 800e6d4:	61fb      	str	r3, [r7, #28]
   return(result);
 800e6d6:	69fb      	ldr	r3, [r7, #28]
 800e6d8:	f423 0300 	bic.w	r3, r3, #8388608	@ 0x800000
 800e6dc:	637b      	str	r3, [r7, #52]	@ 0x34
 800e6de:	687b      	ldr	r3, [r7, #4]
 800e6e0:	681b      	ldr	r3, [r3, #0]
 800e6e2:	3308      	adds	r3, #8
 800e6e4:	6b7a      	ldr	r2, [r7, #52]	@ 0x34
 800e6e6:	62fa      	str	r2, [r7, #44]	@ 0x2c
 800e6e8:	62bb      	str	r3, [r7, #40]	@ 0x28
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800e6ea:	6ab9      	ldr	r1, [r7, #40]	@ 0x28
 800e6ec:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 800e6ee:	e841 2300 	strex	r3, r2, [r1]
 800e6f2:	627b      	str	r3, [r7, #36]	@ 0x24
   return(result);
 800e6f4:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800e6f6:	2b00      	cmp	r3, #0
 800e6f8:	d1e5      	bne.n	800e6c6 <UART_TxISR_16BIT_FIFOEN+0x28>

        /* Enable the UART Transmit Complete Interrupt */
        ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
 800e6fa:	687b      	ldr	r3, [r7, #4]
 800e6fc:	681b      	ldr	r3, [r3, #0]
 800e6fe:	60fb      	str	r3, [r7, #12]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800e700:	68fb      	ldr	r3, [r7, #12]
 800e702:	e853 3f00 	ldrex	r3, [r3]
 800e706:	60bb      	str	r3, [r7, #8]
   return(result);
 800e708:	68bb      	ldr	r3, [r7, #8]
 800e70a:	f043 0340 	orr.w	r3, r3, #64	@ 0x40
 800e70e:	633b      	str	r3, [r7, #48]	@ 0x30
 800e710:	687b      	ldr	r3, [r7, #4]
 800e712:	681b      	ldr	r3, [r3, #0]
 800e714:	461a      	mov	r2, r3
 800e716:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800e718:	61bb      	str	r3, [r7, #24]
 800e71a:	617a      	str	r2, [r7, #20]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800e71c:	6979      	ldr	r1, [r7, #20]
 800e71e:	69ba      	ldr	r2, [r7, #24]
 800e720:	e841 2300 	strex	r3, r2, [r1]
 800e724:	613b      	str	r3, [r7, #16]
   return(result);
 800e726:	693b      	ldr	r3, [r7, #16]
 800e728:	2b00      	cmp	r3, #0
 800e72a:	d1e6      	bne.n	800e6fa <UART_TxISR_16BIT_FIFOEN+0x5c>

        break; /* force exit loop */
 800e72c:	e026      	b.n	800e77c <UART_TxISR_16BIT_FIFOEN+0xde>
      }
      else if (READ_BIT(huart->Instance->ISR, USART_ISR_TXE_TXFNF) != 0U)
 800e72e:	687b      	ldr	r3, [r7, #4]
 800e730:	681b      	ldr	r3, [r3, #0]
 800e732:	69db      	ldr	r3, [r3, #28]
 800e734:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 800e738:	2b00      	cmp	r3, #0
 800e73a:	d018      	beq.n	800e76e <UART_TxISR_16BIT_FIFOEN+0xd0>
      {
        tmp = (const uint16_t *) huart->pTxBuffPtr;
 800e73c:	687b      	ldr	r3, [r7, #4]
 800e73e:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800e740:	63bb      	str	r3, [r7, #56]	@ 0x38
        huart->Instance->TDR = (((uint32_t)(*tmp)) & 0x01FFUL);
 800e742:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800e744:	881b      	ldrh	r3, [r3, #0]
 800e746:	461a      	mov	r2, r3
 800e748:	687b      	ldr	r3, [r7, #4]
 800e74a:	681b      	ldr	r3, [r3, #0]
 800e74c:	f3c2 0208 	ubfx	r2, r2, #0, #9
 800e750:	629a      	str	r2, [r3, #40]	@ 0x28
        huart->pTxBuffPtr += 2U;
 800e752:	687b      	ldr	r3, [r7, #4]
 800e754:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800e756:	1c9a      	adds	r2, r3, #2
 800e758:	687b      	ldr	r3, [r7, #4]
 800e75a:	651a      	str	r2, [r3, #80]	@ 0x50
        huart->TxXferCount--;
 800e75c:	687b      	ldr	r3, [r7, #4]
 800e75e:	f8b3 3056 	ldrh.w	r3, [r3, #86]	@ 0x56
 800e762:	b29b      	uxth	r3, r3
 800e764:	3b01      	subs	r3, #1
 800e766:	b29a      	uxth	r2, r3
 800e768:	687b      	ldr	r3, [r7, #4]
 800e76a:	f8a3 2056 	strh.w	r2, [r3, #86]	@ 0x56
    for (nb_tx_data = huart->NbTxDataToProcess ; nb_tx_data > 0U ; nb_tx_data--)
 800e76e:	8ffb      	ldrh	r3, [r7, #62]	@ 0x3e
 800e770:	3b01      	subs	r3, #1
 800e772:	87fb      	strh	r3, [r7, #62]	@ 0x3e
 800e774:	8ffb      	ldrh	r3, [r7, #62]	@ 0x3e
 800e776:	2b00      	cmp	r3, #0
 800e778:	d19f      	bne.n	800e6ba <UART_TxISR_16BIT_FIFOEN+0x1c>
      {
        /* Nothing to do */
      }
    }
  }
}
 800e77a:	e7ff      	b.n	800e77c <UART_TxISR_16BIT_FIFOEN+0xde>
 800e77c:	bf00      	nop
 800e77e:	3744      	adds	r7, #68	@ 0x44
 800e780:	46bd      	mov	sp, r7
 800e782:	f85d 7b04 	ldr.w	r7, [sp], #4
 800e786:	4770      	bx	lr

0800e788 <UART_EndTransmit_IT>:
  * @param  huart pointer to a UART_HandleTypeDef structure that contains
  *                the configuration information for the specified UART module.
  * @retval None
  */
static void UART_EndTransmit_IT(UART_HandleTypeDef *huart)
{
 800e788:	b580      	push	{r7, lr}
 800e78a:	b088      	sub	sp, #32
 800e78c:	af00      	add	r7, sp, #0
 800e78e:	6078      	str	r0, [r7, #4]
  /* Disable the UART Transmit Complete Interrupt */
  ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_TCIE);
 800e790:	687b      	ldr	r3, [r7, #4]
 800e792:	681b      	ldr	r3, [r3, #0]
 800e794:	60fb      	str	r3, [r7, #12]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800e796:	68fb      	ldr	r3, [r7, #12]
 800e798:	e853 3f00 	ldrex	r3, [r3]
 800e79c:	60bb      	str	r3, [r7, #8]
   return(result);
 800e79e:	68bb      	ldr	r3, [r7, #8]
 800e7a0:	f023 0340 	bic.w	r3, r3, #64	@ 0x40
 800e7a4:	61fb      	str	r3, [r7, #28]
 800e7a6:	687b      	ldr	r3, [r7, #4]
 800e7a8:	681b      	ldr	r3, [r3, #0]
 800e7aa:	461a      	mov	r2, r3
 800e7ac:	69fb      	ldr	r3, [r7, #28]
 800e7ae:	61bb      	str	r3, [r7, #24]
 800e7b0:	617a      	str	r2, [r7, #20]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800e7b2:	6979      	ldr	r1, [r7, #20]
 800e7b4:	69ba      	ldr	r2, [r7, #24]
 800e7b6:	e841 2300 	strex	r3, r2, [r1]
 800e7ba:	613b      	str	r3, [r7, #16]
   return(result);
 800e7bc:	693b      	ldr	r3, [r7, #16]
 800e7be:	2b00      	cmp	r3, #0
 800e7c0:	d1e6      	bne.n	800e790 <UART_EndTransmit_IT+0x8>

  /* Tx process is ended, restore huart->gState to Ready */
  huart->gState = HAL_UART_STATE_READY;
 800e7c2:	687b      	ldr	r3, [r7, #4]
 800e7c4:	2220      	movs	r2, #32
 800e7c6:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88

  /* Cleat TxISR function pointer */
  huart->TxISR = NULL;
 800e7ca:	687b      	ldr	r3, [r7, #4]
 800e7cc:	2200      	movs	r2, #0
 800e7ce:	679a      	str	r2, [r3, #120]	@ 0x78
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
  /*Call registered Tx complete callback*/
  huart->TxCpltCallback(huart);
#else
  /*Call legacy weak Tx complete callback*/
  HAL_UART_TxCpltCallback(huart);
 800e7d0:	6878      	ldr	r0, [r7, #4]
 800e7d2:	f7f5 fb97 	bl	8003f04 <HAL_UART_TxCpltCallback>
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
}
 800e7d6:	bf00      	nop
 800e7d8:	3720      	adds	r7, #32
 800e7da:	46bd      	mov	sp, r7
 800e7dc:	bd80      	pop	{r7, pc}
	...

0800e7e0 <UART_RxISR_8BIT>:
  * @brief RX interrupt handler for 7 or 8 bits data word length .
  * @param huart UART handle.
  * @retval None
  */
static void UART_RxISR_8BIT(UART_HandleTypeDef *huart)
{
 800e7e0:	b580      	push	{r7, lr}
 800e7e2:	b09c      	sub	sp, #112	@ 0x70
 800e7e4:	af00      	add	r7, sp, #0
 800e7e6:	6078      	str	r0, [r7, #4]
  uint16_t uhMask = huart->Mask;
 800e7e8:	687b      	ldr	r3, [r7, #4]
 800e7ea:	f8b3 3060 	ldrh.w	r3, [r3, #96]	@ 0x60
 800e7ee:	f8a7 306e 	strh.w	r3, [r7, #110]	@ 0x6e
  uint16_t  uhdata;

  /* Check that a Rx process is ongoing */
  if (huart->RxState == HAL_UART_STATE_BUSY_RX)
 800e7f2:	687b      	ldr	r3, [r7, #4]
 800e7f4:	f8d3 308c 	ldr.w	r3, [r3, #140]	@ 0x8c
 800e7f8:	2b22      	cmp	r3, #34	@ 0x22
 800e7fa:	f040 80be 	bne.w	800e97a <UART_RxISR_8BIT+0x19a>
  {
    uhdata = (uint16_t) READ_REG(huart->Instance->RDR);
 800e7fe:	687b      	ldr	r3, [r7, #4]
 800e800:	681b      	ldr	r3, [r3, #0]
 800e802:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 800e804:	f8a7 306c 	strh.w	r3, [r7, #108]	@ 0x6c
    *huart->pRxBuffPtr = (uint8_t)(uhdata & (uint8_t)uhMask);
 800e808:	f8b7 306c 	ldrh.w	r3, [r7, #108]	@ 0x6c
 800e80c:	b2d9      	uxtb	r1, r3
 800e80e:	f8b7 306e 	ldrh.w	r3, [r7, #110]	@ 0x6e
 800e812:	b2da      	uxtb	r2, r3
 800e814:	687b      	ldr	r3, [r7, #4]
 800e816:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800e818:	400a      	ands	r2, r1
 800e81a:	b2d2      	uxtb	r2, r2
 800e81c:	701a      	strb	r2, [r3, #0]
    huart->pRxBuffPtr++;
 800e81e:	687b      	ldr	r3, [r7, #4]
 800e820:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800e822:	1c5a      	adds	r2, r3, #1
 800e824:	687b      	ldr	r3, [r7, #4]
 800e826:	659a      	str	r2, [r3, #88]	@ 0x58
    huart->RxXferCount--;
 800e828:	687b      	ldr	r3, [r7, #4]
 800e82a:	f8b3 305e 	ldrh.w	r3, [r3, #94]	@ 0x5e
 800e82e:	b29b      	uxth	r3, r3
 800e830:	3b01      	subs	r3, #1
 800e832:	b29a      	uxth	r2, r3
 800e834:	687b      	ldr	r3, [r7, #4]
 800e836:	f8a3 205e 	strh.w	r2, [r3, #94]	@ 0x5e

    if (huart->RxXferCount == 0U)
 800e83a:	687b      	ldr	r3, [r7, #4]
 800e83c:	f8b3 305e 	ldrh.w	r3, [r3, #94]	@ 0x5e
 800e840:	b29b      	uxth	r3, r3
 800e842:	2b00      	cmp	r3, #0
 800e844:	f040 80a1 	bne.w	800e98a <UART_RxISR_8BIT+0x1aa>
    {
      /* Disable the UART Parity Error Interrupt and RXNE interrupts */
      ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
 800e848:	687b      	ldr	r3, [r7, #4]
 800e84a:	681b      	ldr	r3, [r3, #0]
 800e84c:	64fb      	str	r3, [r7, #76]	@ 0x4c
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800e84e:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 800e850:	e853 3f00 	ldrex	r3, [r3]
 800e854:	64bb      	str	r3, [r7, #72]	@ 0x48
   return(result);
 800e856:	6cbb      	ldr	r3, [r7, #72]	@ 0x48
 800e858:	f423 7390 	bic.w	r3, r3, #288	@ 0x120
 800e85c:	66bb      	str	r3, [r7, #104]	@ 0x68
 800e85e:	687b      	ldr	r3, [r7, #4]
 800e860:	681b      	ldr	r3, [r3, #0]
 800e862:	461a      	mov	r2, r3
 800e864:	6ebb      	ldr	r3, [r7, #104]	@ 0x68
 800e866:	65bb      	str	r3, [r7, #88]	@ 0x58
 800e868:	657a      	str	r2, [r7, #84]	@ 0x54
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800e86a:	6d79      	ldr	r1, [r7, #84]	@ 0x54
 800e86c:	6dba      	ldr	r2, [r7, #88]	@ 0x58
 800e86e:	e841 2300 	strex	r3, r2, [r1]
 800e872:	653b      	str	r3, [r7, #80]	@ 0x50
   return(result);
 800e874:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 800e876:	2b00      	cmp	r3, #0
 800e878:	d1e6      	bne.n	800e848 <UART_RxISR_8BIT+0x68>

      /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */
      ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
 800e87a:	687b      	ldr	r3, [r7, #4]
 800e87c:	681b      	ldr	r3, [r3, #0]
 800e87e:	3308      	adds	r3, #8
 800e880:	63bb      	str	r3, [r7, #56]	@ 0x38
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800e882:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800e884:	e853 3f00 	ldrex	r3, [r3]
 800e888:	637b      	str	r3, [r7, #52]	@ 0x34
   return(result);
 800e88a:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 800e88c:	f023 0301 	bic.w	r3, r3, #1
 800e890:	667b      	str	r3, [r7, #100]	@ 0x64
 800e892:	687b      	ldr	r3, [r7, #4]
 800e894:	681b      	ldr	r3, [r3, #0]
 800e896:	3308      	adds	r3, #8
 800e898:	6e7a      	ldr	r2, [r7, #100]	@ 0x64
 800e89a:	647a      	str	r2, [r7, #68]	@ 0x44
 800e89c:	643b      	str	r3, [r7, #64]	@ 0x40
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800e89e:	6c39      	ldr	r1, [r7, #64]	@ 0x40
 800e8a0:	6c7a      	ldr	r2, [r7, #68]	@ 0x44
 800e8a2:	e841 2300 	strex	r3, r2, [r1]
 800e8a6:	63fb      	str	r3, [r7, #60]	@ 0x3c
   return(result);
 800e8a8:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800e8aa:	2b00      	cmp	r3, #0
 800e8ac:	d1e5      	bne.n	800e87a <UART_RxISR_8BIT+0x9a>

      /* Rx process is completed, restore huart->RxState to Ready */
      huart->RxState = HAL_UART_STATE_READY;
 800e8ae:	687b      	ldr	r3, [r7, #4]
 800e8b0:	2220      	movs	r2, #32
 800e8b2:	f8c3 208c 	str.w	r2, [r3, #140]	@ 0x8c

      /* Clear RxISR function pointer */
      huart->RxISR = NULL;
 800e8b6:	687b      	ldr	r3, [r7, #4]
 800e8b8:	2200      	movs	r2, #0
 800e8ba:	675a      	str	r2, [r3, #116]	@ 0x74

      /* Initialize type of RxEvent to Transfer Complete */
      huart->RxEventType = HAL_UART_RXEVENT_TC;
 800e8bc:	687b      	ldr	r3, [r7, #4]
 800e8be:	2200      	movs	r2, #0
 800e8c0:	671a      	str	r2, [r3, #112]	@ 0x70

      if (!(IS_LPUART_INSTANCE(huart->Instance)))
 800e8c2:	687b      	ldr	r3, [r7, #4]
 800e8c4:	681b      	ldr	r3, [r3, #0]
 800e8c6:	4a33      	ldr	r2, [pc, #204]	@ (800e994 <UART_RxISR_8BIT+0x1b4>)
 800e8c8:	4293      	cmp	r3, r2
 800e8ca:	d01f      	beq.n	800e90c <UART_RxISR_8BIT+0x12c>
      {
        /* Check that USART RTOEN bit is set */
        if (READ_BIT(huart->Instance->CR2, USART_CR2_RTOEN) != 0U)
 800e8cc:	687b      	ldr	r3, [r7, #4]
 800e8ce:	681b      	ldr	r3, [r3, #0]
 800e8d0:	685b      	ldr	r3, [r3, #4]
 800e8d2:	f403 0300 	and.w	r3, r3, #8388608	@ 0x800000
 800e8d6:	2b00      	cmp	r3, #0
 800e8d8:	d018      	beq.n	800e90c <UART_RxISR_8BIT+0x12c>
        {
          /* Enable the UART Receiver Timeout Interrupt */
          ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_RTOIE);
 800e8da:	687b      	ldr	r3, [r7, #4]
 800e8dc:	681b      	ldr	r3, [r3, #0]
 800e8de:	627b      	str	r3, [r7, #36]	@ 0x24
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800e8e0:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800e8e2:	e853 3f00 	ldrex	r3, [r3]
 800e8e6:	623b      	str	r3, [r7, #32]
   return(result);
 800e8e8:	6a3b      	ldr	r3, [r7, #32]
 800e8ea:	f023 6380 	bic.w	r3, r3, #67108864	@ 0x4000000
 800e8ee:	663b      	str	r3, [r7, #96]	@ 0x60
 800e8f0:	687b      	ldr	r3, [r7, #4]
 800e8f2:	681b      	ldr	r3, [r3, #0]
 800e8f4:	461a      	mov	r2, r3
 800e8f6:	6e3b      	ldr	r3, [r7, #96]	@ 0x60
 800e8f8:	633b      	str	r3, [r7, #48]	@ 0x30
 800e8fa:	62fa      	str	r2, [r7, #44]	@ 0x2c
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800e8fc:	6af9      	ldr	r1, [r7, #44]	@ 0x2c
 800e8fe:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 800e900:	e841 2300 	strex	r3, r2, [r1]
 800e904:	62bb      	str	r3, [r7, #40]	@ 0x28
   return(result);
 800e906:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 800e908:	2b00      	cmp	r3, #0
 800e90a:	d1e6      	bne.n	800e8da <UART_RxISR_8BIT+0xfa>
        }
      }

      /* Check current reception Mode :
         If Reception till IDLE event has been selected : */
      if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
 800e90c:	687b      	ldr	r3, [r7, #4]
 800e90e:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 800e910:	2b01      	cmp	r3, #1
 800e912:	d12e      	bne.n	800e972 <UART_RxISR_8BIT+0x192>
      {
        /* Set reception type to Standard */
        huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
 800e914:	687b      	ldr	r3, [r7, #4]
 800e916:	2200      	movs	r2, #0
 800e918:	66da      	str	r2, [r3, #108]	@ 0x6c

        /* Disable IDLE interrupt */
        ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
 800e91a:	687b      	ldr	r3, [r7, #4]
 800e91c:	681b      	ldr	r3, [r3, #0]
 800e91e:	613b      	str	r3, [r7, #16]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800e920:	693b      	ldr	r3, [r7, #16]
 800e922:	e853 3f00 	ldrex	r3, [r3]
 800e926:	60fb      	str	r3, [r7, #12]
   return(result);
 800e928:	68fb      	ldr	r3, [r7, #12]
 800e92a:	f023 0310 	bic.w	r3, r3, #16
 800e92e:	65fb      	str	r3, [r7, #92]	@ 0x5c
 800e930:	687b      	ldr	r3, [r7, #4]
 800e932:	681b      	ldr	r3, [r3, #0]
 800e934:	461a      	mov	r2, r3
 800e936:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 800e938:	61fb      	str	r3, [r7, #28]
 800e93a:	61ba      	str	r2, [r7, #24]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800e93c:	69b9      	ldr	r1, [r7, #24]
 800e93e:	69fa      	ldr	r2, [r7, #28]
 800e940:	e841 2300 	strex	r3, r2, [r1]
 800e944:	617b      	str	r3, [r7, #20]
   return(result);
 800e946:	697b      	ldr	r3, [r7, #20]
 800e948:	2b00      	cmp	r3, #0
 800e94a:	d1e6      	bne.n	800e91a <UART_RxISR_8BIT+0x13a>

        if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE) == SET)
 800e94c:	687b      	ldr	r3, [r7, #4]
 800e94e:	681b      	ldr	r3, [r3, #0]
 800e950:	69db      	ldr	r3, [r3, #28]
 800e952:	f003 0310 	and.w	r3, r3, #16
 800e956:	2b10      	cmp	r3, #16
 800e958:	d103      	bne.n	800e962 <UART_RxISR_8BIT+0x182>
        {
          /* Clear IDLE Flag */
          __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
 800e95a:	687b      	ldr	r3, [r7, #4]
 800e95c:	681b      	ldr	r3, [r3, #0]
 800e95e:	2210      	movs	r2, #16
 800e960:	621a      	str	r2, [r3, #32]
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
        /*Call registered Rx Event callback*/
        huart->RxEventCallback(huart, huart->RxXferSize);
#else
        /*Call legacy weak Rx Event callback*/
        HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize);
 800e962:	687b      	ldr	r3, [r7, #4]
 800e964:	f8b3 305c 	ldrh.w	r3, [r3, #92]	@ 0x5c
 800e968:	4619      	mov	r1, r3
 800e96a:	6878      	ldr	r0, [r7, #4]
 800e96c:	f7f5 fab0 	bl	8003ed0 <HAL_UARTEx_RxEventCallback>
  else
  {
    /* Clear RXNE interrupt flag */
    __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
  }
}
 800e970:	e00b      	b.n	800e98a <UART_RxISR_8BIT+0x1aa>
        HAL_UART_RxCpltCallback(huart);
 800e972:	6878      	ldr	r0, [r7, #4]
 800e974:	f7f5 faa2 	bl	8003ebc <HAL_UART_RxCpltCallback>
}
 800e978:	e007      	b.n	800e98a <UART_RxISR_8BIT+0x1aa>
    __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
 800e97a:	687b      	ldr	r3, [r7, #4]
 800e97c:	681b      	ldr	r3, [r3, #0]
 800e97e:	699a      	ldr	r2, [r3, #24]
 800e980:	687b      	ldr	r3, [r7, #4]
 800e982:	681b      	ldr	r3, [r3, #0]
 800e984:	f042 0208 	orr.w	r2, r2, #8
 800e988:	619a      	str	r2, [r3, #24]
}
 800e98a:	bf00      	nop
 800e98c:	3770      	adds	r7, #112	@ 0x70
 800e98e:	46bd      	mov	sp, r7
 800e990:	bd80      	pop	{r7, pc}
 800e992:	bf00      	nop
 800e994:	58000c00 	.word	0x58000c00

0800e998 <UART_RxISR_16BIT>:
  *         interruptions have been enabled by HAL_UART_Receive_IT()
  * @param huart UART handle.
  * @retval None
  */
static void UART_RxISR_16BIT(UART_HandleTypeDef *huart)
{
 800e998:	b580      	push	{r7, lr}
 800e99a:	b09c      	sub	sp, #112	@ 0x70
 800e99c:	af00      	add	r7, sp, #0
 800e99e:	6078      	str	r0, [r7, #4]
  uint16_t *tmp;
  uint16_t uhMask = huart->Mask;
 800e9a0:	687b      	ldr	r3, [r7, #4]
 800e9a2:	f8b3 3060 	ldrh.w	r3, [r3, #96]	@ 0x60
 800e9a6:	f8a7 306e 	strh.w	r3, [r7, #110]	@ 0x6e
  uint16_t  uhdata;

  /* Check that a Rx process is ongoing */
  if (huart->RxState == HAL_UART_STATE_BUSY_RX)
 800e9aa:	687b      	ldr	r3, [r7, #4]
 800e9ac:	f8d3 308c 	ldr.w	r3, [r3, #140]	@ 0x8c
 800e9b0:	2b22      	cmp	r3, #34	@ 0x22
 800e9b2:	f040 80be 	bne.w	800eb32 <UART_RxISR_16BIT+0x19a>
  {
    uhdata = (uint16_t) READ_REG(huart->Instance->RDR);
 800e9b6:	687b      	ldr	r3, [r7, #4]
 800e9b8:	681b      	ldr	r3, [r3, #0]
 800e9ba:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 800e9bc:	f8a7 306c 	strh.w	r3, [r7, #108]	@ 0x6c
    tmp = (uint16_t *) huart->pRxBuffPtr ;
 800e9c0:	687b      	ldr	r3, [r7, #4]
 800e9c2:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800e9c4:	66bb      	str	r3, [r7, #104]	@ 0x68
    *tmp = (uint16_t)(uhdata & uhMask);
 800e9c6:	f8b7 206c 	ldrh.w	r2, [r7, #108]	@ 0x6c
 800e9ca:	f8b7 306e 	ldrh.w	r3, [r7, #110]	@ 0x6e
 800e9ce:	4013      	ands	r3, r2
 800e9d0:	b29a      	uxth	r2, r3
 800e9d2:	6ebb      	ldr	r3, [r7, #104]	@ 0x68
 800e9d4:	801a      	strh	r2, [r3, #0]
    huart->pRxBuffPtr += 2U;
 800e9d6:	687b      	ldr	r3, [r7, #4]
 800e9d8:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800e9da:	1c9a      	adds	r2, r3, #2
 800e9dc:	687b      	ldr	r3, [r7, #4]
 800e9de:	659a      	str	r2, [r3, #88]	@ 0x58
    huart->RxXferCount--;
 800e9e0:	687b      	ldr	r3, [r7, #4]
 800e9e2:	f8b3 305e 	ldrh.w	r3, [r3, #94]	@ 0x5e
 800e9e6:	b29b      	uxth	r3, r3
 800e9e8:	3b01      	subs	r3, #1
 800e9ea:	b29a      	uxth	r2, r3
 800e9ec:	687b      	ldr	r3, [r7, #4]
 800e9ee:	f8a3 205e 	strh.w	r2, [r3, #94]	@ 0x5e

    if (huart->RxXferCount == 0U)
 800e9f2:	687b      	ldr	r3, [r7, #4]
 800e9f4:	f8b3 305e 	ldrh.w	r3, [r3, #94]	@ 0x5e
 800e9f8:	b29b      	uxth	r3, r3
 800e9fa:	2b00      	cmp	r3, #0
 800e9fc:	f040 80a1 	bne.w	800eb42 <UART_RxISR_16BIT+0x1aa>
    {
      /* Disable the UART Parity Error Interrupt and RXNE interrupt*/
      ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
 800ea00:	687b      	ldr	r3, [r7, #4]
 800ea02:	681b      	ldr	r3, [r3, #0]
 800ea04:	64bb      	str	r3, [r7, #72]	@ 0x48
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800ea06:	6cbb      	ldr	r3, [r7, #72]	@ 0x48
 800ea08:	e853 3f00 	ldrex	r3, [r3]
 800ea0c:	647b      	str	r3, [r7, #68]	@ 0x44
   return(result);
 800ea0e:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 800ea10:	f423 7390 	bic.w	r3, r3, #288	@ 0x120
 800ea14:	667b      	str	r3, [r7, #100]	@ 0x64
 800ea16:	687b      	ldr	r3, [r7, #4]
 800ea18:	681b      	ldr	r3, [r3, #0]
 800ea1a:	461a      	mov	r2, r3
 800ea1c:	6e7b      	ldr	r3, [r7, #100]	@ 0x64
 800ea1e:	657b      	str	r3, [r7, #84]	@ 0x54
 800ea20:	653a      	str	r2, [r7, #80]	@ 0x50
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800ea22:	6d39      	ldr	r1, [r7, #80]	@ 0x50
 800ea24:	6d7a      	ldr	r2, [r7, #84]	@ 0x54
 800ea26:	e841 2300 	strex	r3, r2, [r1]
 800ea2a:	64fb      	str	r3, [r7, #76]	@ 0x4c
   return(result);
 800ea2c:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 800ea2e:	2b00      	cmp	r3, #0
 800ea30:	d1e6      	bne.n	800ea00 <UART_RxISR_16BIT+0x68>

      /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */
      ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
 800ea32:	687b      	ldr	r3, [r7, #4]
 800ea34:	681b      	ldr	r3, [r3, #0]
 800ea36:	3308      	adds	r3, #8
 800ea38:	637b      	str	r3, [r7, #52]	@ 0x34
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800ea3a:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 800ea3c:	e853 3f00 	ldrex	r3, [r3]
 800ea40:	633b      	str	r3, [r7, #48]	@ 0x30
   return(result);
 800ea42:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800ea44:	f023 0301 	bic.w	r3, r3, #1
 800ea48:	663b      	str	r3, [r7, #96]	@ 0x60
 800ea4a:	687b      	ldr	r3, [r7, #4]
 800ea4c:	681b      	ldr	r3, [r3, #0]
 800ea4e:	3308      	adds	r3, #8
 800ea50:	6e3a      	ldr	r2, [r7, #96]	@ 0x60
 800ea52:	643a      	str	r2, [r7, #64]	@ 0x40
 800ea54:	63fb      	str	r3, [r7, #60]	@ 0x3c
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800ea56:	6bf9      	ldr	r1, [r7, #60]	@ 0x3c
 800ea58:	6c3a      	ldr	r2, [r7, #64]	@ 0x40
 800ea5a:	e841 2300 	strex	r3, r2, [r1]
 800ea5e:	63bb      	str	r3, [r7, #56]	@ 0x38
   return(result);
 800ea60:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800ea62:	2b00      	cmp	r3, #0
 800ea64:	d1e5      	bne.n	800ea32 <UART_RxISR_16BIT+0x9a>

      /* Rx process is completed, restore huart->RxState to Ready */
      huart->RxState = HAL_UART_STATE_READY;
 800ea66:	687b      	ldr	r3, [r7, #4]
 800ea68:	2220      	movs	r2, #32
 800ea6a:	f8c3 208c 	str.w	r2, [r3, #140]	@ 0x8c

      /* Clear RxISR function pointer */
      huart->RxISR = NULL;
 800ea6e:	687b      	ldr	r3, [r7, #4]
 800ea70:	2200      	movs	r2, #0
 800ea72:	675a      	str	r2, [r3, #116]	@ 0x74

      /* Initialize type of RxEvent to Transfer Complete */
      huart->RxEventType = HAL_UART_RXEVENT_TC;
 800ea74:	687b      	ldr	r3, [r7, #4]
 800ea76:	2200      	movs	r2, #0
 800ea78:	671a      	str	r2, [r3, #112]	@ 0x70

      if (!(IS_LPUART_INSTANCE(huart->Instance)))
 800ea7a:	687b      	ldr	r3, [r7, #4]
 800ea7c:	681b      	ldr	r3, [r3, #0]
 800ea7e:	4a33      	ldr	r2, [pc, #204]	@ (800eb4c <UART_RxISR_16BIT+0x1b4>)
 800ea80:	4293      	cmp	r3, r2
 800ea82:	d01f      	beq.n	800eac4 <UART_RxISR_16BIT+0x12c>
      {
        /* Check that USART RTOEN bit is set */
        if (READ_BIT(huart->Instance->CR2, USART_CR2_RTOEN) != 0U)
 800ea84:	687b      	ldr	r3, [r7, #4]
 800ea86:	681b      	ldr	r3, [r3, #0]
 800ea88:	685b      	ldr	r3, [r3, #4]
 800ea8a:	f403 0300 	and.w	r3, r3, #8388608	@ 0x800000
 800ea8e:	2b00      	cmp	r3, #0
 800ea90:	d018      	beq.n	800eac4 <UART_RxISR_16BIT+0x12c>
        {
          /* Enable the UART Receiver Timeout Interrupt */
          ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_RTOIE);
 800ea92:	687b      	ldr	r3, [r7, #4]
 800ea94:	681b      	ldr	r3, [r3, #0]
 800ea96:	623b      	str	r3, [r7, #32]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800ea98:	6a3b      	ldr	r3, [r7, #32]
 800ea9a:	e853 3f00 	ldrex	r3, [r3]
 800ea9e:	61fb      	str	r3, [r7, #28]
   return(result);
 800eaa0:	69fb      	ldr	r3, [r7, #28]
 800eaa2:	f023 6380 	bic.w	r3, r3, #67108864	@ 0x4000000
 800eaa6:	65fb      	str	r3, [r7, #92]	@ 0x5c
 800eaa8:	687b      	ldr	r3, [r7, #4]
 800eaaa:	681b      	ldr	r3, [r3, #0]
 800eaac:	461a      	mov	r2, r3
 800eaae:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 800eab0:	62fb      	str	r3, [r7, #44]	@ 0x2c
 800eab2:	62ba      	str	r2, [r7, #40]	@ 0x28
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800eab4:	6ab9      	ldr	r1, [r7, #40]	@ 0x28
 800eab6:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 800eab8:	e841 2300 	strex	r3, r2, [r1]
 800eabc:	627b      	str	r3, [r7, #36]	@ 0x24
   return(result);
 800eabe:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800eac0:	2b00      	cmp	r3, #0
 800eac2:	d1e6      	bne.n	800ea92 <UART_RxISR_16BIT+0xfa>
        }
      }

      /* Check current reception Mode :
         If Reception till IDLE event has been selected : */
      if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
 800eac4:	687b      	ldr	r3, [r7, #4]
 800eac6:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 800eac8:	2b01      	cmp	r3, #1
 800eaca:	d12e      	bne.n	800eb2a <UART_RxISR_16BIT+0x192>
      {
        /* Set reception type to Standard */
        huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
 800eacc:	687b      	ldr	r3, [r7, #4]
 800eace:	2200      	movs	r2, #0
 800ead0:	66da      	str	r2, [r3, #108]	@ 0x6c

        /* Disable IDLE interrupt */
        ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
 800ead2:	687b      	ldr	r3, [r7, #4]
 800ead4:	681b      	ldr	r3, [r3, #0]
 800ead6:	60fb      	str	r3, [r7, #12]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800ead8:	68fb      	ldr	r3, [r7, #12]
 800eada:	e853 3f00 	ldrex	r3, [r3]
 800eade:	60bb      	str	r3, [r7, #8]
   return(result);
 800eae0:	68bb      	ldr	r3, [r7, #8]
 800eae2:	f023 0310 	bic.w	r3, r3, #16
 800eae6:	65bb      	str	r3, [r7, #88]	@ 0x58
 800eae8:	687b      	ldr	r3, [r7, #4]
 800eaea:	681b      	ldr	r3, [r3, #0]
 800eaec:	461a      	mov	r2, r3
 800eaee:	6dbb      	ldr	r3, [r7, #88]	@ 0x58
 800eaf0:	61bb      	str	r3, [r7, #24]
 800eaf2:	617a      	str	r2, [r7, #20]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800eaf4:	6979      	ldr	r1, [r7, #20]
 800eaf6:	69ba      	ldr	r2, [r7, #24]
 800eaf8:	e841 2300 	strex	r3, r2, [r1]
 800eafc:	613b      	str	r3, [r7, #16]
   return(result);
 800eafe:	693b      	ldr	r3, [r7, #16]
 800eb00:	2b00      	cmp	r3, #0
 800eb02:	d1e6      	bne.n	800ead2 <UART_RxISR_16BIT+0x13a>

        if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE) == SET)
 800eb04:	687b      	ldr	r3, [r7, #4]
 800eb06:	681b      	ldr	r3, [r3, #0]
 800eb08:	69db      	ldr	r3, [r3, #28]
 800eb0a:	f003 0310 	and.w	r3, r3, #16
 800eb0e:	2b10      	cmp	r3, #16
 800eb10:	d103      	bne.n	800eb1a <UART_RxISR_16BIT+0x182>
        {
          /* Clear IDLE Flag */
          __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
 800eb12:	687b      	ldr	r3, [r7, #4]
 800eb14:	681b      	ldr	r3, [r3, #0]
 800eb16:	2210      	movs	r2, #16
 800eb18:	621a      	str	r2, [r3, #32]
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
        /*Call registered Rx Event callback*/
        huart->RxEventCallback(huart, huart->RxXferSize);
#else
        /*Call legacy weak Rx Event callback*/
        HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize);
 800eb1a:	687b      	ldr	r3, [r7, #4]
 800eb1c:	f8b3 305c 	ldrh.w	r3, [r3, #92]	@ 0x5c
 800eb20:	4619      	mov	r1, r3
 800eb22:	6878      	ldr	r0, [r7, #4]
 800eb24:	f7f5 f9d4 	bl	8003ed0 <HAL_UARTEx_RxEventCallback>
  else
  {
    /* Clear RXNE interrupt flag */
    __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
  }
}
 800eb28:	e00b      	b.n	800eb42 <UART_RxISR_16BIT+0x1aa>
        HAL_UART_RxCpltCallback(huart);
 800eb2a:	6878      	ldr	r0, [r7, #4]
 800eb2c:	f7f5 f9c6 	bl	8003ebc <HAL_UART_RxCpltCallback>
}
 800eb30:	e007      	b.n	800eb42 <UART_RxISR_16BIT+0x1aa>
    __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
 800eb32:	687b      	ldr	r3, [r7, #4]
 800eb34:	681b      	ldr	r3, [r3, #0]
 800eb36:	699a      	ldr	r2, [r3, #24]
 800eb38:	687b      	ldr	r3, [r7, #4]
 800eb3a:	681b      	ldr	r3, [r3, #0]
 800eb3c:	f042 0208 	orr.w	r2, r2, #8
 800eb40:	619a      	str	r2, [r3, #24]
}
 800eb42:	bf00      	nop
 800eb44:	3770      	adds	r7, #112	@ 0x70
 800eb46:	46bd      	mov	sp, r7
 800eb48:	bd80      	pop	{r7, pc}
 800eb4a:	bf00      	nop
 800eb4c:	58000c00 	.word	0x58000c00

0800eb50 <UART_RxISR_8BIT_FIFOEN>:
  *         interruptions have been enabled by HAL_UART_Receive_IT()
  * @param huart UART handle.
  * @retval None
  */
static void UART_RxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart)
{
 800eb50:	b580      	push	{r7, lr}
 800eb52:	b0ac      	sub	sp, #176	@ 0xb0
 800eb54:	af00      	add	r7, sp, #0
 800eb56:	6078      	str	r0, [r7, #4]
  uint16_t  uhMask = huart->Mask;
 800eb58:	687b      	ldr	r3, [r7, #4]
 800eb5a:	f8b3 3060 	ldrh.w	r3, [r3, #96]	@ 0x60
 800eb5e:	f8a7 30aa 	strh.w	r3, [r7, #170]	@ 0xaa
  uint16_t  uhdata;
  uint16_t  nb_rx_data;
  uint16_t  rxdatacount;
  uint32_t  isrflags = READ_REG(huart->Instance->ISR);
 800eb62:	687b      	ldr	r3, [r7, #4]
 800eb64:	681b      	ldr	r3, [r3, #0]
 800eb66:	69db      	ldr	r3, [r3, #28]
 800eb68:	f8c7 30ac 	str.w	r3, [r7, #172]	@ 0xac
  uint32_t  cr1its   = READ_REG(huart->Instance->CR1);
 800eb6c:	687b      	ldr	r3, [r7, #4]
 800eb6e:	681b      	ldr	r3, [r3, #0]
 800eb70:	681b      	ldr	r3, [r3, #0]
 800eb72:	f8c7 30a4 	str.w	r3, [r7, #164]	@ 0xa4
  uint32_t  cr3its   = READ_REG(huart->Instance->CR3);
 800eb76:	687b      	ldr	r3, [r7, #4]
 800eb78:	681b      	ldr	r3, [r3, #0]
 800eb7a:	689b      	ldr	r3, [r3, #8]
 800eb7c:	f8c7 30a0 	str.w	r3, [r7, #160]	@ 0xa0

  /* Check that a Rx process is ongoing */
  if (huart->RxState == HAL_UART_STATE_BUSY_RX)
 800eb80:	687b      	ldr	r3, [r7, #4]
 800eb82:	f8d3 308c 	ldr.w	r3, [r3, #140]	@ 0x8c
 800eb86:	2b22      	cmp	r3, #34	@ 0x22
 800eb88:	f040 8180 	bne.w	800ee8c <UART_RxISR_8BIT_FIFOEN+0x33c>
  {
    nb_rx_data = huart->NbRxDataToProcess;
 800eb8c:	687b      	ldr	r3, [r7, #4]
 800eb8e:	f8b3 3068 	ldrh.w	r3, [r3, #104]	@ 0x68
 800eb92:	f8a7 309e 	strh.w	r3, [r7, #158]	@ 0x9e
    while ((nb_rx_data > 0U) && ((isrflags & USART_ISR_RXNE_RXFNE) != 0U))
 800eb96:	e123      	b.n	800ede0 <UART_RxISR_8BIT_FIFOEN+0x290>
    {
      uhdata = (uint16_t) READ_REG(huart->Instance->RDR);
 800eb98:	687b      	ldr	r3, [r7, #4]
 800eb9a:	681b      	ldr	r3, [r3, #0]
 800eb9c:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 800eb9e:	f8a7 309c 	strh.w	r3, [r7, #156]	@ 0x9c
      *huart->pRxBuffPtr = (uint8_t)(uhdata & (uint8_t)uhMask);
 800eba2:	f8b7 309c 	ldrh.w	r3, [r7, #156]	@ 0x9c
 800eba6:	b2d9      	uxtb	r1, r3
 800eba8:	f8b7 30aa 	ldrh.w	r3, [r7, #170]	@ 0xaa
 800ebac:	b2da      	uxtb	r2, r3
 800ebae:	687b      	ldr	r3, [r7, #4]
 800ebb0:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800ebb2:	400a      	ands	r2, r1
 800ebb4:	b2d2      	uxtb	r2, r2
 800ebb6:	701a      	strb	r2, [r3, #0]
      huart->pRxBuffPtr++;
 800ebb8:	687b      	ldr	r3, [r7, #4]
 800ebba:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800ebbc:	1c5a      	adds	r2, r3, #1
 800ebbe:	687b      	ldr	r3, [r7, #4]
 800ebc0:	659a      	str	r2, [r3, #88]	@ 0x58
      huart->RxXferCount--;
 800ebc2:	687b      	ldr	r3, [r7, #4]
 800ebc4:	f8b3 305e 	ldrh.w	r3, [r3, #94]	@ 0x5e
 800ebc8:	b29b      	uxth	r3, r3
 800ebca:	3b01      	subs	r3, #1
 800ebcc:	b29a      	uxth	r2, r3
 800ebce:	687b      	ldr	r3, [r7, #4]
 800ebd0:	f8a3 205e 	strh.w	r2, [r3, #94]	@ 0x5e
      isrflags = READ_REG(huart->Instance->ISR);
 800ebd4:	687b      	ldr	r3, [r7, #4]
 800ebd6:	681b      	ldr	r3, [r3, #0]
 800ebd8:	69db      	ldr	r3, [r3, #28]
 800ebda:	f8c7 30ac 	str.w	r3, [r7, #172]	@ 0xac

      /* If some non blocking errors occurred */
      if ((isrflags & (USART_ISR_PE | USART_ISR_FE | USART_ISR_NE)) != 0U)
 800ebde:	f8d7 30ac 	ldr.w	r3, [r7, #172]	@ 0xac
 800ebe2:	f003 0307 	and.w	r3, r3, #7
 800ebe6:	2b00      	cmp	r3, #0
 800ebe8:	d053      	beq.n	800ec92 <UART_RxISR_8BIT_FIFOEN+0x142>
      {
        /* UART parity error interrupt occurred -------------------------------------*/
        if (((isrflags & USART_ISR_PE) != 0U) && ((cr1its & USART_CR1_PEIE) != 0U))
 800ebea:	f8d7 30ac 	ldr.w	r3, [r7, #172]	@ 0xac
 800ebee:	f003 0301 	and.w	r3, r3, #1
 800ebf2:	2b00      	cmp	r3, #0
 800ebf4:	d011      	beq.n	800ec1a <UART_RxISR_8BIT_FIFOEN+0xca>
 800ebf6:	f8d7 30a4 	ldr.w	r3, [r7, #164]	@ 0xa4
 800ebfa:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 800ebfe:	2b00      	cmp	r3, #0
 800ec00:	d00b      	beq.n	800ec1a <UART_RxISR_8BIT_FIFOEN+0xca>
        {
          __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF);
 800ec02:	687b      	ldr	r3, [r7, #4]
 800ec04:	681b      	ldr	r3, [r3, #0]
 800ec06:	2201      	movs	r2, #1
 800ec08:	621a      	str	r2, [r3, #32]

          huart->ErrorCode |= HAL_UART_ERROR_PE;
 800ec0a:	687b      	ldr	r3, [r7, #4]
 800ec0c:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800ec10:	f043 0201 	orr.w	r2, r3, #1
 800ec14:	687b      	ldr	r3, [r7, #4]
 800ec16:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
        }

        /* UART frame error interrupt occurred --------------------------------------*/
        if (((isrflags & USART_ISR_FE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
 800ec1a:	f8d7 30ac 	ldr.w	r3, [r7, #172]	@ 0xac
 800ec1e:	f003 0302 	and.w	r3, r3, #2
 800ec22:	2b00      	cmp	r3, #0
 800ec24:	d011      	beq.n	800ec4a <UART_RxISR_8BIT_FIFOEN+0xfa>
 800ec26:	f8d7 30a0 	ldr.w	r3, [r7, #160]	@ 0xa0
 800ec2a:	f003 0301 	and.w	r3, r3, #1
 800ec2e:	2b00      	cmp	r3, #0
 800ec30:	d00b      	beq.n	800ec4a <UART_RxISR_8BIT_FIFOEN+0xfa>
        {
          __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_FEF);
 800ec32:	687b      	ldr	r3, [r7, #4]
 800ec34:	681b      	ldr	r3, [r3, #0]
 800ec36:	2202      	movs	r2, #2
 800ec38:	621a      	str	r2, [r3, #32]

          huart->ErrorCode |= HAL_UART_ERROR_FE;
 800ec3a:	687b      	ldr	r3, [r7, #4]
 800ec3c:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800ec40:	f043 0204 	orr.w	r2, r3, #4
 800ec44:	687b      	ldr	r3, [r7, #4]
 800ec46:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
        }

        /* UART noise error interrupt occurred --------------------------------------*/
        if (((isrflags & USART_ISR_NE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
 800ec4a:	f8d7 30ac 	ldr.w	r3, [r7, #172]	@ 0xac
 800ec4e:	f003 0304 	and.w	r3, r3, #4
 800ec52:	2b00      	cmp	r3, #0
 800ec54:	d011      	beq.n	800ec7a <UART_RxISR_8BIT_FIFOEN+0x12a>
 800ec56:	f8d7 30a0 	ldr.w	r3, [r7, #160]	@ 0xa0
 800ec5a:	f003 0301 	and.w	r3, r3, #1
 800ec5e:	2b00      	cmp	r3, #0
 800ec60:	d00b      	beq.n	800ec7a <UART_RxISR_8BIT_FIFOEN+0x12a>
        {
          __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_NEF);
 800ec62:	687b      	ldr	r3, [r7, #4]
 800ec64:	681b      	ldr	r3, [r3, #0]
 800ec66:	2204      	movs	r2, #4
 800ec68:	621a      	str	r2, [r3, #32]

          huart->ErrorCode |= HAL_UART_ERROR_NE;
 800ec6a:	687b      	ldr	r3, [r7, #4]
 800ec6c:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800ec70:	f043 0202 	orr.w	r2, r3, #2
 800ec74:	687b      	ldr	r3, [r7, #4]
 800ec76:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
        }

        /* Call UART Error Call back function if need be ----------------------------*/
        if (huart->ErrorCode != HAL_UART_ERROR_NONE)
 800ec7a:	687b      	ldr	r3, [r7, #4]
 800ec7c:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800ec80:	2b00      	cmp	r3, #0
 800ec82:	d006      	beq.n	800ec92 <UART_RxISR_8BIT_FIFOEN+0x142>
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
          /*Call registered error callback*/
          huart->ErrorCallback(huart);
#else
          /*Call legacy weak error callback*/
          HAL_UART_ErrorCallback(huart);
 800ec84:	6878      	ldr	r0, [r7, #4]
 800ec86:	f7fe fb13 	bl	800d2b0 <HAL_UART_ErrorCallback>
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
          huart->ErrorCode = HAL_UART_ERROR_NONE;
 800ec8a:	687b      	ldr	r3, [r7, #4]
 800ec8c:	2200      	movs	r2, #0
 800ec8e:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
        }
      }

      if (huart->RxXferCount == 0U)
 800ec92:	687b      	ldr	r3, [r7, #4]
 800ec94:	f8b3 305e 	ldrh.w	r3, [r3, #94]	@ 0x5e
 800ec98:	b29b      	uxth	r3, r3
 800ec9a:	2b00      	cmp	r3, #0
 800ec9c:	f040 80a0 	bne.w	800ede0 <UART_RxISR_8BIT_FIFOEN+0x290>
      {
        /* Disable the UART Parity Error Interrupt and RXFT interrupt*/
        ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
 800eca0:	687b      	ldr	r3, [r7, #4]
 800eca2:	681b      	ldr	r3, [r3, #0]
 800eca4:	673b      	str	r3, [r7, #112]	@ 0x70
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800eca6:	6f3b      	ldr	r3, [r7, #112]	@ 0x70
 800eca8:	e853 3f00 	ldrex	r3, [r3]
 800ecac:	66fb      	str	r3, [r7, #108]	@ 0x6c
   return(result);
 800ecae:	6efb      	ldr	r3, [r7, #108]	@ 0x6c
 800ecb0:	f423 7380 	bic.w	r3, r3, #256	@ 0x100
 800ecb4:	f8c7 3098 	str.w	r3, [r7, #152]	@ 0x98
 800ecb8:	687b      	ldr	r3, [r7, #4]
 800ecba:	681b      	ldr	r3, [r3, #0]
 800ecbc:	461a      	mov	r2, r3
 800ecbe:	f8d7 3098 	ldr.w	r3, [r7, #152]	@ 0x98
 800ecc2:	67fb      	str	r3, [r7, #124]	@ 0x7c
 800ecc4:	67ba      	str	r2, [r7, #120]	@ 0x78
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800ecc6:	6fb9      	ldr	r1, [r7, #120]	@ 0x78
 800ecc8:	6ffa      	ldr	r2, [r7, #124]	@ 0x7c
 800ecca:	e841 2300 	strex	r3, r2, [r1]
 800ecce:	677b      	str	r3, [r7, #116]	@ 0x74
   return(result);
 800ecd0:	6f7b      	ldr	r3, [r7, #116]	@ 0x74
 800ecd2:	2b00      	cmp	r3, #0
 800ecd4:	d1e4      	bne.n	800eca0 <UART_RxISR_8BIT_FIFOEN+0x150>

        /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error)
           and RX FIFO Threshold interrupt */
        ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
 800ecd6:	687b      	ldr	r3, [r7, #4]
 800ecd8:	681b      	ldr	r3, [r3, #0]
 800ecda:	3308      	adds	r3, #8
 800ecdc:	65fb      	str	r3, [r7, #92]	@ 0x5c
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800ecde:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 800ece0:	e853 3f00 	ldrex	r3, [r3]
 800ece4:	65bb      	str	r3, [r7, #88]	@ 0x58
   return(result);
 800ece6:	6dba      	ldr	r2, [r7, #88]	@ 0x58
 800ece8:	4b6e      	ldr	r3, [pc, #440]	@ (800eea4 <UART_RxISR_8BIT_FIFOEN+0x354>)
 800ecea:	4013      	ands	r3, r2
 800ecec:	f8c7 3094 	str.w	r3, [r7, #148]	@ 0x94
 800ecf0:	687b      	ldr	r3, [r7, #4]
 800ecf2:	681b      	ldr	r3, [r3, #0]
 800ecf4:	3308      	adds	r3, #8
 800ecf6:	f8d7 2094 	ldr.w	r2, [r7, #148]	@ 0x94
 800ecfa:	66ba      	str	r2, [r7, #104]	@ 0x68
 800ecfc:	667b      	str	r3, [r7, #100]	@ 0x64
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800ecfe:	6e79      	ldr	r1, [r7, #100]	@ 0x64
 800ed00:	6eba      	ldr	r2, [r7, #104]	@ 0x68
 800ed02:	e841 2300 	strex	r3, r2, [r1]
 800ed06:	663b      	str	r3, [r7, #96]	@ 0x60
   return(result);
 800ed08:	6e3b      	ldr	r3, [r7, #96]	@ 0x60
 800ed0a:	2b00      	cmp	r3, #0
 800ed0c:	d1e3      	bne.n	800ecd6 <UART_RxISR_8BIT_FIFOEN+0x186>

        /* Rx process is completed, restore huart->RxState to Ready */
        huart->RxState = HAL_UART_STATE_READY;
 800ed0e:	687b      	ldr	r3, [r7, #4]
 800ed10:	2220      	movs	r2, #32
 800ed12:	f8c3 208c 	str.w	r2, [r3, #140]	@ 0x8c

        /* Clear RxISR function pointer */
        huart->RxISR = NULL;
 800ed16:	687b      	ldr	r3, [r7, #4]
 800ed18:	2200      	movs	r2, #0
 800ed1a:	675a      	str	r2, [r3, #116]	@ 0x74

        /* Initialize type of RxEvent to Transfer Complete */
        huart->RxEventType = HAL_UART_RXEVENT_TC;
 800ed1c:	687b      	ldr	r3, [r7, #4]
 800ed1e:	2200      	movs	r2, #0
 800ed20:	671a      	str	r2, [r3, #112]	@ 0x70

        if (!(IS_LPUART_INSTANCE(huart->Instance)))
 800ed22:	687b      	ldr	r3, [r7, #4]
 800ed24:	681b      	ldr	r3, [r3, #0]
 800ed26:	4a60      	ldr	r2, [pc, #384]	@ (800eea8 <UART_RxISR_8BIT_FIFOEN+0x358>)
 800ed28:	4293      	cmp	r3, r2
 800ed2a:	d021      	beq.n	800ed70 <UART_RxISR_8BIT_FIFOEN+0x220>
        {
          /* Check that USART RTOEN bit is set */
          if (READ_BIT(huart->Instance->CR2, USART_CR2_RTOEN) != 0U)
 800ed2c:	687b      	ldr	r3, [r7, #4]
 800ed2e:	681b      	ldr	r3, [r3, #0]
 800ed30:	685b      	ldr	r3, [r3, #4]
 800ed32:	f403 0300 	and.w	r3, r3, #8388608	@ 0x800000
 800ed36:	2b00      	cmp	r3, #0
 800ed38:	d01a      	beq.n	800ed70 <UART_RxISR_8BIT_FIFOEN+0x220>
          {
            /* Enable the UART Receiver Timeout Interrupt */
            ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_RTOIE);
 800ed3a:	687b      	ldr	r3, [r7, #4]
 800ed3c:	681b      	ldr	r3, [r3, #0]
 800ed3e:	64bb      	str	r3, [r7, #72]	@ 0x48
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800ed40:	6cbb      	ldr	r3, [r7, #72]	@ 0x48
 800ed42:	e853 3f00 	ldrex	r3, [r3]
 800ed46:	647b      	str	r3, [r7, #68]	@ 0x44
   return(result);
 800ed48:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 800ed4a:	f023 6380 	bic.w	r3, r3, #67108864	@ 0x4000000
 800ed4e:	f8c7 3090 	str.w	r3, [r7, #144]	@ 0x90
 800ed52:	687b      	ldr	r3, [r7, #4]
 800ed54:	681b      	ldr	r3, [r3, #0]
 800ed56:	461a      	mov	r2, r3
 800ed58:	f8d7 3090 	ldr.w	r3, [r7, #144]	@ 0x90
 800ed5c:	657b      	str	r3, [r7, #84]	@ 0x54
 800ed5e:	653a      	str	r2, [r7, #80]	@ 0x50
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800ed60:	6d39      	ldr	r1, [r7, #80]	@ 0x50
 800ed62:	6d7a      	ldr	r2, [r7, #84]	@ 0x54
 800ed64:	e841 2300 	strex	r3, r2, [r1]
 800ed68:	64fb      	str	r3, [r7, #76]	@ 0x4c
   return(result);
 800ed6a:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 800ed6c:	2b00      	cmp	r3, #0
 800ed6e:	d1e4      	bne.n	800ed3a <UART_RxISR_8BIT_FIFOEN+0x1ea>
          }
        }

        /* Check current reception Mode :
           If Reception till IDLE event has been selected : */
        if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
 800ed70:	687b      	ldr	r3, [r7, #4]
 800ed72:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 800ed74:	2b01      	cmp	r3, #1
 800ed76:	d130      	bne.n	800edda <UART_RxISR_8BIT_FIFOEN+0x28a>
        {
          /* Set reception type to Standard */
          huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
 800ed78:	687b      	ldr	r3, [r7, #4]
 800ed7a:	2200      	movs	r2, #0
 800ed7c:	66da      	str	r2, [r3, #108]	@ 0x6c

          /* Disable IDLE interrupt */
          ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
 800ed7e:	687b      	ldr	r3, [r7, #4]
 800ed80:	681b      	ldr	r3, [r3, #0]
 800ed82:	637b      	str	r3, [r7, #52]	@ 0x34
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800ed84:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 800ed86:	e853 3f00 	ldrex	r3, [r3]
 800ed8a:	633b      	str	r3, [r7, #48]	@ 0x30
   return(result);
 800ed8c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800ed8e:	f023 0310 	bic.w	r3, r3, #16
 800ed92:	f8c7 308c 	str.w	r3, [r7, #140]	@ 0x8c
 800ed96:	687b      	ldr	r3, [r7, #4]
 800ed98:	681b      	ldr	r3, [r3, #0]
 800ed9a:	461a      	mov	r2, r3
 800ed9c:	f8d7 308c 	ldr.w	r3, [r7, #140]	@ 0x8c
 800eda0:	643b      	str	r3, [r7, #64]	@ 0x40
 800eda2:	63fa      	str	r2, [r7, #60]	@ 0x3c
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800eda4:	6bf9      	ldr	r1, [r7, #60]	@ 0x3c
 800eda6:	6c3a      	ldr	r2, [r7, #64]	@ 0x40
 800eda8:	e841 2300 	strex	r3, r2, [r1]
 800edac:	63bb      	str	r3, [r7, #56]	@ 0x38
   return(result);
 800edae:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800edb0:	2b00      	cmp	r3, #0
 800edb2:	d1e4      	bne.n	800ed7e <UART_RxISR_8BIT_FIFOEN+0x22e>

          if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE) == SET)
 800edb4:	687b      	ldr	r3, [r7, #4]
 800edb6:	681b      	ldr	r3, [r3, #0]
 800edb8:	69db      	ldr	r3, [r3, #28]
 800edba:	f003 0310 	and.w	r3, r3, #16
 800edbe:	2b10      	cmp	r3, #16
 800edc0:	d103      	bne.n	800edca <UART_RxISR_8BIT_FIFOEN+0x27a>
          {
            /* Clear IDLE Flag */
            __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
 800edc2:	687b      	ldr	r3, [r7, #4]
 800edc4:	681b      	ldr	r3, [r3, #0]
 800edc6:	2210      	movs	r2, #16
 800edc8:	621a      	str	r2, [r3, #32]
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
          /*Call registered Rx Event callback*/
          huart->RxEventCallback(huart, huart->RxXferSize);
#else
          /*Call legacy weak Rx Event callback*/
          HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize);
 800edca:	687b      	ldr	r3, [r7, #4]
 800edcc:	f8b3 305c 	ldrh.w	r3, [r3, #92]	@ 0x5c
 800edd0:	4619      	mov	r1, r3
 800edd2:	6878      	ldr	r0, [r7, #4]
 800edd4:	f7f5 f87c 	bl	8003ed0 <HAL_UARTEx_RxEventCallback>
 800edd8:	e002      	b.n	800ede0 <UART_RxISR_8BIT_FIFOEN+0x290>
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
          /*Call registered Rx complete callback*/
          huart->RxCpltCallback(huart);
#else
          /*Call legacy weak Rx complete callback*/
          HAL_UART_RxCpltCallback(huart);
 800edda:	6878      	ldr	r0, [r7, #4]
 800eddc:	f7f5 f86e 	bl	8003ebc <HAL_UART_RxCpltCallback>
    while ((nb_rx_data > 0U) && ((isrflags & USART_ISR_RXNE_RXFNE) != 0U))
 800ede0:	f8b7 309e 	ldrh.w	r3, [r7, #158]	@ 0x9e
 800ede4:	2b00      	cmp	r3, #0
 800ede6:	d006      	beq.n	800edf6 <UART_RxISR_8BIT_FIFOEN+0x2a6>
 800ede8:	f8d7 30ac 	ldr.w	r3, [r7, #172]	@ 0xac
 800edec:	f003 0320 	and.w	r3, r3, #32
 800edf0:	2b00      	cmp	r3, #0
 800edf2:	f47f aed1 	bne.w	800eb98 <UART_RxISR_8BIT_FIFOEN+0x48>

    /* When remaining number of bytes to receive is less than the RX FIFO
    threshold, next incoming frames are processed as if FIFO mode was
    disabled (i.e. one interrupt per received frame).
    */
    rxdatacount = huart->RxXferCount;
 800edf6:	687b      	ldr	r3, [r7, #4]
 800edf8:	f8b3 305e 	ldrh.w	r3, [r3, #94]	@ 0x5e
 800edfc:	f8a7 308a 	strh.w	r3, [r7, #138]	@ 0x8a
    if ((rxdatacount != 0U) && (rxdatacount < huart->NbRxDataToProcess))
 800ee00:	f8b7 308a 	ldrh.w	r3, [r7, #138]	@ 0x8a
 800ee04:	2b00      	cmp	r3, #0
 800ee06:	d049      	beq.n	800ee9c <UART_RxISR_8BIT_FIFOEN+0x34c>
 800ee08:	687b      	ldr	r3, [r7, #4]
 800ee0a:	f8b3 3068 	ldrh.w	r3, [r3, #104]	@ 0x68
 800ee0e:	f8b7 208a 	ldrh.w	r2, [r7, #138]	@ 0x8a
 800ee12:	429a      	cmp	r2, r3
 800ee14:	d242      	bcs.n	800ee9c <UART_RxISR_8BIT_FIFOEN+0x34c>
    {
      /* Disable the UART RXFT interrupt*/
      ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_RXFTIE);
 800ee16:	687b      	ldr	r3, [r7, #4]
 800ee18:	681b      	ldr	r3, [r3, #0]
 800ee1a:	3308      	adds	r3, #8
 800ee1c:	623b      	str	r3, [r7, #32]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800ee1e:	6a3b      	ldr	r3, [r7, #32]
 800ee20:	e853 3f00 	ldrex	r3, [r3]
 800ee24:	61fb      	str	r3, [r7, #28]
   return(result);
 800ee26:	69fb      	ldr	r3, [r7, #28]
 800ee28:	f023 5380 	bic.w	r3, r3, #268435456	@ 0x10000000
 800ee2c:	f8c7 3084 	str.w	r3, [r7, #132]	@ 0x84
 800ee30:	687b      	ldr	r3, [r7, #4]
 800ee32:	681b      	ldr	r3, [r3, #0]
 800ee34:	3308      	adds	r3, #8
 800ee36:	f8d7 2084 	ldr.w	r2, [r7, #132]	@ 0x84
 800ee3a:	62fa      	str	r2, [r7, #44]	@ 0x2c
 800ee3c:	62bb      	str	r3, [r7, #40]	@ 0x28
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800ee3e:	6ab9      	ldr	r1, [r7, #40]	@ 0x28
 800ee40:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 800ee42:	e841 2300 	strex	r3, r2, [r1]
 800ee46:	627b      	str	r3, [r7, #36]	@ 0x24
   return(result);
 800ee48:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800ee4a:	2b00      	cmp	r3, #0
 800ee4c:	d1e3      	bne.n	800ee16 <UART_RxISR_8BIT_FIFOEN+0x2c6>

      /* Update the RxISR function pointer */
      huart->RxISR = UART_RxISR_8BIT;
 800ee4e:	687b      	ldr	r3, [r7, #4]
 800ee50:	4a16      	ldr	r2, [pc, #88]	@ (800eeac <UART_RxISR_8BIT_FIFOEN+0x35c>)
 800ee52:	675a      	str	r2, [r3, #116]	@ 0x74

      /* Enable the UART Data Register Not Empty interrupt */
      ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE);
 800ee54:	687b      	ldr	r3, [r7, #4]
 800ee56:	681b      	ldr	r3, [r3, #0]
 800ee58:	60fb      	str	r3, [r7, #12]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800ee5a:	68fb      	ldr	r3, [r7, #12]
 800ee5c:	e853 3f00 	ldrex	r3, [r3]
 800ee60:	60bb      	str	r3, [r7, #8]
   return(result);
 800ee62:	68bb      	ldr	r3, [r7, #8]
 800ee64:	f043 0320 	orr.w	r3, r3, #32
 800ee68:	f8c7 3080 	str.w	r3, [r7, #128]	@ 0x80
 800ee6c:	687b      	ldr	r3, [r7, #4]
 800ee6e:	681b      	ldr	r3, [r3, #0]
 800ee70:	461a      	mov	r2, r3
 800ee72:	f8d7 3080 	ldr.w	r3, [r7, #128]	@ 0x80
 800ee76:	61bb      	str	r3, [r7, #24]
 800ee78:	617a      	str	r2, [r7, #20]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800ee7a:	6979      	ldr	r1, [r7, #20]
 800ee7c:	69ba      	ldr	r2, [r7, #24]
 800ee7e:	e841 2300 	strex	r3, r2, [r1]
 800ee82:	613b      	str	r3, [r7, #16]
   return(result);
 800ee84:	693b      	ldr	r3, [r7, #16]
 800ee86:	2b00      	cmp	r3, #0
 800ee88:	d1e4      	bne.n	800ee54 <UART_RxISR_8BIT_FIFOEN+0x304>
  else
  {
    /* Clear RXNE interrupt flag */
    __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
  }
}
 800ee8a:	e007      	b.n	800ee9c <UART_RxISR_8BIT_FIFOEN+0x34c>
    __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
 800ee8c:	687b      	ldr	r3, [r7, #4]
 800ee8e:	681b      	ldr	r3, [r3, #0]
 800ee90:	699a      	ldr	r2, [r3, #24]
 800ee92:	687b      	ldr	r3, [r7, #4]
 800ee94:	681b      	ldr	r3, [r3, #0]
 800ee96:	f042 0208 	orr.w	r2, r2, #8
 800ee9a:	619a      	str	r2, [r3, #24]
}
 800ee9c:	bf00      	nop
 800ee9e:	37b0      	adds	r7, #176	@ 0xb0
 800eea0:	46bd      	mov	sp, r7
 800eea2:	bd80      	pop	{r7, pc}
 800eea4:	effffffe 	.word	0xeffffffe
 800eea8:	58000c00 	.word	0x58000c00
 800eeac:	0800e7e1 	.word	0x0800e7e1

0800eeb0 <UART_RxISR_16BIT_FIFOEN>:
  *         interruptions have been enabled by HAL_UART_Receive_IT()
  * @param huart UART handle.
  * @retval None
  */
static void UART_RxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart)
{
 800eeb0:	b580      	push	{r7, lr}
 800eeb2:	b0ae      	sub	sp, #184	@ 0xb8
 800eeb4:	af00      	add	r7, sp, #0
 800eeb6:	6078      	str	r0, [r7, #4]
  uint16_t *tmp;
  uint16_t  uhMask = huart->Mask;
 800eeb8:	687b      	ldr	r3, [r7, #4]
 800eeba:	f8b3 3060 	ldrh.w	r3, [r3, #96]	@ 0x60
 800eebe:	f8a7 30b2 	strh.w	r3, [r7, #178]	@ 0xb2
  uint16_t  uhdata;
  uint16_t  nb_rx_data;
  uint16_t  rxdatacount;
  uint32_t  isrflags = READ_REG(huart->Instance->ISR);
 800eec2:	687b      	ldr	r3, [r7, #4]
 800eec4:	681b      	ldr	r3, [r3, #0]
 800eec6:	69db      	ldr	r3, [r3, #28]
 800eec8:	f8c7 30b4 	str.w	r3, [r7, #180]	@ 0xb4
  uint32_t  cr1its   = READ_REG(huart->Instance->CR1);
 800eecc:	687b      	ldr	r3, [r7, #4]
 800eece:	681b      	ldr	r3, [r3, #0]
 800eed0:	681b      	ldr	r3, [r3, #0]
 800eed2:	f8c7 30ac 	str.w	r3, [r7, #172]	@ 0xac
  uint32_t  cr3its   = READ_REG(huart->Instance->CR3);
 800eed6:	687b      	ldr	r3, [r7, #4]
 800eed8:	681b      	ldr	r3, [r3, #0]
 800eeda:	689b      	ldr	r3, [r3, #8]
 800eedc:	f8c7 30a8 	str.w	r3, [r7, #168]	@ 0xa8

  /* Check that a Rx process is ongoing */
  if (huart->RxState == HAL_UART_STATE_BUSY_RX)
 800eee0:	687b      	ldr	r3, [r7, #4]
 800eee2:	f8d3 308c 	ldr.w	r3, [r3, #140]	@ 0x8c
 800eee6:	2b22      	cmp	r3, #34	@ 0x22
 800eee8:	f040 8184 	bne.w	800f1f4 <UART_RxISR_16BIT_FIFOEN+0x344>
  {
    nb_rx_data = huart->NbRxDataToProcess;
 800eeec:	687b      	ldr	r3, [r7, #4]
 800eeee:	f8b3 3068 	ldrh.w	r3, [r3, #104]	@ 0x68
 800eef2:	f8a7 30a6 	strh.w	r3, [r7, #166]	@ 0xa6
    while ((nb_rx_data > 0U) && ((isrflags & USART_ISR_RXNE_RXFNE) != 0U))
 800eef6:	e127      	b.n	800f148 <UART_RxISR_16BIT_FIFOEN+0x298>
    {
      uhdata = (uint16_t) READ_REG(huart->Instance->RDR);
 800eef8:	687b      	ldr	r3, [r7, #4]
 800eefa:	681b      	ldr	r3, [r3, #0]
 800eefc:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 800eefe:	f8a7 30a4 	strh.w	r3, [r7, #164]	@ 0xa4
      tmp = (uint16_t *) huart->pRxBuffPtr ;
 800ef02:	687b      	ldr	r3, [r7, #4]
 800ef04:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800ef06:	f8c7 30a0 	str.w	r3, [r7, #160]	@ 0xa0
      *tmp = (uint16_t)(uhdata & uhMask);
 800ef0a:	f8b7 20a4 	ldrh.w	r2, [r7, #164]	@ 0xa4
 800ef0e:	f8b7 30b2 	ldrh.w	r3, [r7, #178]	@ 0xb2
 800ef12:	4013      	ands	r3, r2
 800ef14:	b29a      	uxth	r2, r3
 800ef16:	f8d7 30a0 	ldr.w	r3, [r7, #160]	@ 0xa0
 800ef1a:	801a      	strh	r2, [r3, #0]
      huart->pRxBuffPtr += 2U;
 800ef1c:	687b      	ldr	r3, [r7, #4]
 800ef1e:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800ef20:	1c9a      	adds	r2, r3, #2
 800ef22:	687b      	ldr	r3, [r7, #4]
 800ef24:	659a      	str	r2, [r3, #88]	@ 0x58
      huart->RxXferCount--;
 800ef26:	687b      	ldr	r3, [r7, #4]
 800ef28:	f8b3 305e 	ldrh.w	r3, [r3, #94]	@ 0x5e
 800ef2c:	b29b      	uxth	r3, r3
 800ef2e:	3b01      	subs	r3, #1
 800ef30:	b29a      	uxth	r2, r3
 800ef32:	687b      	ldr	r3, [r7, #4]
 800ef34:	f8a3 205e 	strh.w	r2, [r3, #94]	@ 0x5e
      isrflags = READ_REG(huart->Instance->ISR);
 800ef38:	687b      	ldr	r3, [r7, #4]
 800ef3a:	681b      	ldr	r3, [r3, #0]
 800ef3c:	69db      	ldr	r3, [r3, #28]
 800ef3e:	f8c7 30b4 	str.w	r3, [r7, #180]	@ 0xb4

      /* If some non blocking errors occurred */
      if ((isrflags & (USART_ISR_PE | USART_ISR_FE | USART_ISR_NE)) != 0U)
 800ef42:	f8d7 30b4 	ldr.w	r3, [r7, #180]	@ 0xb4
 800ef46:	f003 0307 	and.w	r3, r3, #7
 800ef4a:	2b00      	cmp	r3, #0
 800ef4c:	d053      	beq.n	800eff6 <UART_RxISR_16BIT_FIFOEN+0x146>
      {
        /* UART parity error interrupt occurred -------------------------------------*/
        if (((isrflags & USART_ISR_PE) != 0U) && ((cr1its & USART_CR1_PEIE) != 0U))
 800ef4e:	f8d7 30b4 	ldr.w	r3, [r7, #180]	@ 0xb4
 800ef52:	f003 0301 	and.w	r3, r3, #1
 800ef56:	2b00      	cmp	r3, #0
 800ef58:	d011      	beq.n	800ef7e <UART_RxISR_16BIT_FIFOEN+0xce>
 800ef5a:	f8d7 30ac 	ldr.w	r3, [r7, #172]	@ 0xac
 800ef5e:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 800ef62:	2b00      	cmp	r3, #0
 800ef64:	d00b      	beq.n	800ef7e <UART_RxISR_16BIT_FIFOEN+0xce>
        {
          __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF);
 800ef66:	687b      	ldr	r3, [r7, #4]
 800ef68:	681b      	ldr	r3, [r3, #0]
 800ef6a:	2201      	movs	r2, #1
 800ef6c:	621a      	str	r2, [r3, #32]

          huart->ErrorCode |= HAL_UART_ERROR_PE;
 800ef6e:	687b      	ldr	r3, [r7, #4]
 800ef70:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800ef74:	f043 0201 	orr.w	r2, r3, #1
 800ef78:	687b      	ldr	r3, [r7, #4]
 800ef7a:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
        }

        /* UART frame error interrupt occurred --------------------------------------*/
        if (((isrflags & USART_ISR_FE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
 800ef7e:	f8d7 30b4 	ldr.w	r3, [r7, #180]	@ 0xb4
 800ef82:	f003 0302 	and.w	r3, r3, #2
 800ef86:	2b00      	cmp	r3, #0
 800ef88:	d011      	beq.n	800efae <UART_RxISR_16BIT_FIFOEN+0xfe>
 800ef8a:	f8d7 30a8 	ldr.w	r3, [r7, #168]	@ 0xa8
 800ef8e:	f003 0301 	and.w	r3, r3, #1
 800ef92:	2b00      	cmp	r3, #0
 800ef94:	d00b      	beq.n	800efae <UART_RxISR_16BIT_FIFOEN+0xfe>
        {
          __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_FEF);
 800ef96:	687b      	ldr	r3, [r7, #4]
 800ef98:	681b      	ldr	r3, [r3, #0]
 800ef9a:	2202      	movs	r2, #2
 800ef9c:	621a      	str	r2, [r3, #32]

          huart->ErrorCode |= HAL_UART_ERROR_FE;
 800ef9e:	687b      	ldr	r3, [r7, #4]
 800efa0:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800efa4:	f043 0204 	orr.w	r2, r3, #4
 800efa8:	687b      	ldr	r3, [r7, #4]
 800efaa:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
        }

        /* UART noise error interrupt occurred --------------------------------------*/
        if (((isrflags & USART_ISR_NE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
 800efae:	f8d7 30b4 	ldr.w	r3, [r7, #180]	@ 0xb4
 800efb2:	f003 0304 	and.w	r3, r3, #4
 800efb6:	2b00      	cmp	r3, #0
 800efb8:	d011      	beq.n	800efde <UART_RxISR_16BIT_FIFOEN+0x12e>
 800efba:	f8d7 30a8 	ldr.w	r3, [r7, #168]	@ 0xa8
 800efbe:	f003 0301 	and.w	r3, r3, #1
 800efc2:	2b00      	cmp	r3, #0
 800efc4:	d00b      	beq.n	800efde <UART_RxISR_16BIT_FIFOEN+0x12e>
        {
          __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_NEF);
 800efc6:	687b      	ldr	r3, [r7, #4]
 800efc8:	681b      	ldr	r3, [r3, #0]
 800efca:	2204      	movs	r2, #4
 800efcc:	621a      	str	r2, [r3, #32]

          huart->ErrorCode |= HAL_UART_ERROR_NE;
 800efce:	687b      	ldr	r3, [r7, #4]
 800efd0:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800efd4:	f043 0202 	orr.w	r2, r3, #2
 800efd8:	687b      	ldr	r3, [r7, #4]
 800efda:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
        }

        /* Call UART Error Call back function if need be ----------------------------*/
        if (huart->ErrorCode != HAL_UART_ERROR_NONE)
 800efde:	687b      	ldr	r3, [r7, #4]
 800efe0:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800efe4:	2b00      	cmp	r3, #0
 800efe6:	d006      	beq.n	800eff6 <UART_RxISR_16BIT_FIFOEN+0x146>
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
          /*Call registered error callback*/
          huart->ErrorCallback(huart);
#else
          /*Call legacy weak error callback*/
          HAL_UART_ErrorCallback(huart);
 800efe8:	6878      	ldr	r0, [r7, #4]
 800efea:	f7fe f961 	bl	800d2b0 <HAL_UART_ErrorCallback>
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
          huart->ErrorCode = HAL_UART_ERROR_NONE;
 800efee:	687b      	ldr	r3, [r7, #4]
 800eff0:	2200      	movs	r2, #0
 800eff2:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
        }
      }

      if (huart->RxXferCount == 0U)
 800eff6:	687b      	ldr	r3, [r7, #4]
 800eff8:	f8b3 305e 	ldrh.w	r3, [r3, #94]	@ 0x5e
 800effc:	b29b      	uxth	r3, r3
 800effe:	2b00      	cmp	r3, #0
 800f000:	f040 80a2 	bne.w	800f148 <UART_RxISR_16BIT_FIFOEN+0x298>
      {
        /* Disable the UART Parity Error Interrupt and RXFT interrupt*/
        ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
 800f004:	687b      	ldr	r3, [r7, #4]
 800f006:	681b      	ldr	r3, [r3, #0]
 800f008:	677b      	str	r3, [r7, #116]	@ 0x74
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f00a:	6f7b      	ldr	r3, [r7, #116]	@ 0x74
 800f00c:	e853 3f00 	ldrex	r3, [r3]
 800f010:	673b      	str	r3, [r7, #112]	@ 0x70
   return(result);
 800f012:	6f3b      	ldr	r3, [r7, #112]	@ 0x70
 800f014:	f423 7380 	bic.w	r3, r3, #256	@ 0x100
 800f018:	f8c7 309c 	str.w	r3, [r7, #156]	@ 0x9c
 800f01c:	687b      	ldr	r3, [r7, #4]
 800f01e:	681b      	ldr	r3, [r3, #0]
 800f020:	461a      	mov	r2, r3
 800f022:	f8d7 309c 	ldr.w	r3, [r7, #156]	@ 0x9c
 800f026:	f8c7 3080 	str.w	r3, [r7, #128]	@ 0x80
 800f02a:	67fa      	str	r2, [r7, #124]	@ 0x7c
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f02c:	6ff9      	ldr	r1, [r7, #124]	@ 0x7c
 800f02e:	f8d7 2080 	ldr.w	r2, [r7, #128]	@ 0x80
 800f032:	e841 2300 	strex	r3, r2, [r1]
 800f036:	67bb      	str	r3, [r7, #120]	@ 0x78
   return(result);
 800f038:	6fbb      	ldr	r3, [r7, #120]	@ 0x78
 800f03a:	2b00      	cmp	r3, #0
 800f03c:	d1e2      	bne.n	800f004 <UART_RxISR_16BIT_FIFOEN+0x154>

        /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error)
           and RX FIFO Threshold interrupt */
        ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
 800f03e:	687b      	ldr	r3, [r7, #4]
 800f040:	681b      	ldr	r3, [r3, #0]
 800f042:	3308      	adds	r3, #8
 800f044:	663b      	str	r3, [r7, #96]	@ 0x60
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f046:	6e3b      	ldr	r3, [r7, #96]	@ 0x60
 800f048:	e853 3f00 	ldrex	r3, [r3]
 800f04c:	65fb      	str	r3, [r7, #92]	@ 0x5c
   return(result);
 800f04e:	6dfa      	ldr	r2, [r7, #92]	@ 0x5c
 800f050:	4b6e      	ldr	r3, [pc, #440]	@ (800f20c <UART_RxISR_16BIT_FIFOEN+0x35c>)
 800f052:	4013      	ands	r3, r2
 800f054:	f8c7 3098 	str.w	r3, [r7, #152]	@ 0x98
 800f058:	687b      	ldr	r3, [r7, #4]
 800f05a:	681b      	ldr	r3, [r3, #0]
 800f05c:	3308      	adds	r3, #8
 800f05e:	f8d7 2098 	ldr.w	r2, [r7, #152]	@ 0x98
 800f062:	66fa      	str	r2, [r7, #108]	@ 0x6c
 800f064:	66bb      	str	r3, [r7, #104]	@ 0x68
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f066:	6eb9      	ldr	r1, [r7, #104]	@ 0x68
 800f068:	6efa      	ldr	r2, [r7, #108]	@ 0x6c
 800f06a:	e841 2300 	strex	r3, r2, [r1]
 800f06e:	667b      	str	r3, [r7, #100]	@ 0x64
   return(result);
 800f070:	6e7b      	ldr	r3, [r7, #100]	@ 0x64
 800f072:	2b00      	cmp	r3, #0
 800f074:	d1e3      	bne.n	800f03e <UART_RxISR_16BIT_FIFOEN+0x18e>

        /* Rx process is completed, restore huart->RxState to Ready */
        huart->RxState = HAL_UART_STATE_READY;
 800f076:	687b      	ldr	r3, [r7, #4]
 800f078:	2220      	movs	r2, #32
 800f07a:	f8c3 208c 	str.w	r2, [r3, #140]	@ 0x8c

        /* Clear RxISR function pointer */
        huart->RxISR = NULL;
 800f07e:	687b      	ldr	r3, [r7, #4]
 800f080:	2200      	movs	r2, #0
 800f082:	675a      	str	r2, [r3, #116]	@ 0x74

        /* Initialize type of RxEvent to Transfer Complete */
        huart->RxEventType = HAL_UART_RXEVENT_TC;
 800f084:	687b      	ldr	r3, [r7, #4]
 800f086:	2200      	movs	r2, #0
 800f088:	671a      	str	r2, [r3, #112]	@ 0x70

        if (!(IS_LPUART_INSTANCE(huart->Instance)))
 800f08a:	687b      	ldr	r3, [r7, #4]
 800f08c:	681b      	ldr	r3, [r3, #0]
 800f08e:	4a60      	ldr	r2, [pc, #384]	@ (800f210 <UART_RxISR_16BIT_FIFOEN+0x360>)
 800f090:	4293      	cmp	r3, r2
 800f092:	d021      	beq.n	800f0d8 <UART_RxISR_16BIT_FIFOEN+0x228>
        {
          /* Check that USART RTOEN bit is set */
          if (READ_BIT(huart->Instance->CR2, USART_CR2_RTOEN) != 0U)
 800f094:	687b      	ldr	r3, [r7, #4]
 800f096:	681b      	ldr	r3, [r3, #0]
 800f098:	685b      	ldr	r3, [r3, #4]
 800f09a:	f403 0300 	and.w	r3, r3, #8388608	@ 0x800000
 800f09e:	2b00      	cmp	r3, #0
 800f0a0:	d01a      	beq.n	800f0d8 <UART_RxISR_16BIT_FIFOEN+0x228>
          {
            /* Enable the UART Receiver Timeout Interrupt */
            ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_RTOIE);
 800f0a2:	687b      	ldr	r3, [r7, #4]
 800f0a4:	681b      	ldr	r3, [r3, #0]
 800f0a6:	64fb      	str	r3, [r7, #76]	@ 0x4c
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f0a8:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 800f0aa:	e853 3f00 	ldrex	r3, [r3]
 800f0ae:	64bb      	str	r3, [r7, #72]	@ 0x48
   return(result);
 800f0b0:	6cbb      	ldr	r3, [r7, #72]	@ 0x48
 800f0b2:	f023 6380 	bic.w	r3, r3, #67108864	@ 0x4000000
 800f0b6:	f8c7 3094 	str.w	r3, [r7, #148]	@ 0x94
 800f0ba:	687b      	ldr	r3, [r7, #4]
 800f0bc:	681b      	ldr	r3, [r3, #0]
 800f0be:	461a      	mov	r2, r3
 800f0c0:	f8d7 3094 	ldr.w	r3, [r7, #148]	@ 0x94
 800f0c4:	65bb      	str	r3, [r7, #88]	@ 0x58
 800f0c6:	657a      	str	r2, [r7, #84]	@ 0x54
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f0c8:	6d79      	ldr	r1, [r7, #84]	@ 0x54
 800f0ca:	6dba      	ldr	r2, [r7, #88]	@ 0x58
 800f0cc:	e841 2300 	strex	r3, r2, [r1]
 800f0d0:	653b      	str	r3, [r7, #80]	@ 0x50
   return(result);
 800f0d2:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 800f0d4:	2b00      	cmp	r3, #0
 800f0d6:	d1e4      	bne.n	800f0a2 <UART_RxISR_16BIT_FIFOEN+0x1f2>
          }
        }

        /* Check current reception Mode :
           If Reception till IDLE event has been selected : */
        if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
 800f0d8:	687b      	ldr	r3, [r7, #4]
 800f0da:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 800f0dc:	2b01      	cmp	r3, #1
 800f0de:	d130      	bne.n	800f142 <UART_RxISR_16BIT_FIFOEN+0x292>
        {
          /* Set reception type to Standard */
          huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
 800f0e0:	687b      	ldr	r3, [r7, #4]
 800f0e2:	2200      	movs	r2, #0
 800f0e4:	66da      	str	r2, [r3, #108]	@ 0x6c

          /* Disable IDLE interrupt */
          ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
 800f0e6:	687b      	ldr	r3, [r7, #4]
 800f0e8:	681b      	ldr	r3, [r3, #0]
 800f0ea:	63bb      	str	r3, [r7, #56]	@ 0x38
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f0ec:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800f0ee:	e853 3f00 	ldrex	r3, [r3]
 800f0f2:	637b      	str	r3, [r7, #52]	@ 0x34
   return(result);
 800f0f4:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 800f0f6:	f023 0310 	bic.w	r3, r3, #16
 800f0fa:	f8c7 3090 	str.w	r3, [r7, #144]	@ 0x90
 800f0fe:	687b      	ldr	r3, [r7, #4]
 800f100:	681b      	ldr	r3, [r3, #0]
 800f102:	461a      	mov	r2, r3
 800f104:	f8d7 3090 	ldr.w	r3, [r7, #144]	@ 0x90
 800f108:	647b      	str	r3, [r7, #68]	@ 0x44
 800f10a:	643a      	str	r2, [r7, #64]	@ 0x40
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f10c:	6c39      	ldr	r1, [r7, #64]	@ 0x40
 800f10e:	6c7a      	ldr	r2, [r7, #68]	@ 0x44
 800f110:	e841 2300 	strex	r3, r2, [r1]
 800f114:	63fb      	str	r3, [r7, #60]	@ 0x3c
   return(result);
 800f116:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800f118:	2b00      	cmp	r3, #0
 800f11a:	d1e4      	bne.n	800f0e6 <UART_RxISR_16BIT_FIFOEN+0x236>

          if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE) == SET)
 800f11c:	687b      	ldr	r3, [r7, #4]
 800f11e:	681b      	ldr	r3, [r3, #0]
 800f120:	69db      	ldr	r3, [r3, #28]
 800f122:	f003 0310 	and.w	r3, r3, #16
 800f126:	2b10      	cmp	r3, #16
 800f128:	d103      	bne.n	800f132 <UART_RxISR_16BIT_FIFOEN+0x282>
          {
            /* Clear IDLE Flag */
            __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
 800f12a:	687b      	ldr	r3, [r7, #4]
 800f12c:	681b      	ldr	r3, [r3, #0]
 800f12e:	2210      	movs	r2, #16
 800f130:	621a      	str	r2, [r3, #32]
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
          /*Call registered Rx Event callback*/
          huart->RxEventCallback(huart, huart->RxXferSize);
#else
          /*Call legacy weak Rx Event callback*/
          HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize);
 800f132:	687b      	ldr	r3, [r7, #4]
 800f134:	f8b3 305c 	ldrh.w	r3, [r3, #92]	@ 0x5c
 800f138:	4619      	mov	r1, r3
 800f13a:	6878      	ldr	r0, [r7, #4]
 800f13c:	f7f4 fec8 	bl	8003ed0 <HAL_UARTEx_RxEventCallback>
 800f140:	e002      	b.n	800f148 <UART_RxISR_16BIT_FIFOEN+0x298>
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
          /*Call registered Rx complete callback*/
          huart->RxCpltCallback(huart);
#else
          /*Call legacy weak Rx complete callback*/
          HAL_UART_RxCpltCallback(huart);
 800f142:	6878      	ldr	r0, [r7, #4]
 800f144:	f7f4 feba 	bl	8003ebc <HAL_UART_RxCpltCallback>
    while ((nb_rx_data > 0U) && ((isrflags & USART_ISR_RXNE_RXFNE) != 0U))
 800f148:	f8b7 30a6 	ldrh.w	r3, [r7, #166]	@ 0xa6
 800f14c:	2b00      	cmp	r3, #0
 800f14e:	d006      	beq.n	800f15e <UART_RxISR_16BIT_FIFOEN+0x2ae>
 800f150:	f8d7 30b4 	ldr.w	r3, [r7, #180]	@ 0xb4
 800f154:	f003 0320 	and.w	r3, r3, #32
 800f158:	2b00      	cmp	r3, #0
 800f15a:	f47f aecd 	bne.w	800eef8 <UART_RxISR_16BIT_FIFOEN+0x48>

    /* When remaining number of bytes to receive is less than the RX FIFO
    threshold, next incoming frames are processed as if FIFO mode was
    disabled (i.e. one interrupt per received frame).
    */
    rxdatacount = huart->RxXferCount;
 800f15e:	687b      	ldr	r3, [r7, #4]
 800f160:	f8b3 305e 	ldrh.w	r3, [r3, #94]	@ 0x5e
 800f164:	f8a7 308e 	strh.w	r3, [r7, #142]	@ 0x8e
    if ((rxdatacount != 0U) && (rxdatacount < huart->NbRxDataToProcess))
 800f168:	f8b7 308e 	ldrh.w	r3, [r7, #142]	@ 0x8e
 800f16c:	2b00      	cmp	r3, #0
 800f16e:	d049      	beq.n	800f204 <UART_RxISR_16BIT_FIFOEN+0x354>
 800f170:	687b      	ldr	r3, [r7, #4]
 800f172:	f8b3 3068 	ldrh.w	r3, [r3, #104]	@ 0x68
 800f176:	f8b7 208e 	ldrh.w	r2, [r7, #142]	@ 0x8e
 800f17a:	429a      	cmp	r2, r3
 800f17c:	d242      	bcs.n	800f204 <UART_RxISR_16BIT_FIFOEN+0x354>
    {
      /* Disable the UART RXFT interrupt*/
      ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_RXFTIE);
 800f17e:	687b      	ldr	r3, [r7, #4]
 800f180:	681b      	ldr	r3, [r3, #0]
 800f182:	3308      	adds	r3, #8
 800f184:	627b      	str	r3, [r7, #36]	@ 0x24
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f186:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800f188:	e853 3f00 	ldrex	r3, [r3]
 800f18c:	623b      	str	r3, [r7, #32]
   return(result);
 800f18e:	6a3b      	ldr	r3, [r7, #32]
 800f190:	f023 5380 	bic.w	r3, r3, #268435456	@ 0x10000000
 800f194:	f8c7 3088 	str.w	r3, [r7, #136]	@ 0x88
 800f198:	687b      	ldr	r3, [r7, #4]
 800f19a:	681b      	ldr	r3, [r3, #0]
 800f19c:	3308      	adds	r3, #8
 800f19e:	f8d7 2088 	ldr.w	r2, [r7, #136]	@ 0x88
 800f1a2:	633a      	str	r2, [r7, #48]	@ 0x30
 800f1a4:	62fb      	str	r3, [r7, #44]	@ 0x2c
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f1a6:	6af9      	ldr	r1, [r7, #44]	@ 0x2c
 800f1a8:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 800f1aa:	e841 2300 	strex	r3, r2, [r1]
 800f1ae:	62bb      	str	r3, [r7, #40]	@ 0x28
   return(result);
 800f1b0:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 800f1b2:	2b00      	cmp	r3, #0
 800f1b4:	d1e3      	bne.n	800f17e <UART_RxISR_16BIT_FIFOEN+0x2ce>

      /* Update the RxISR function pointer */
      huart->RxISR = UART_RxISR_16BIT;
 800f1b6:	687b      	ldr	r3, [r7, #4]
 800f1b8:	4a16      	ldr	r2, [pc, #88]	@ (800f214 <UART_RxISR_16BIT_FIFOEN+0x364>)
 800f1ba:	675a      	str	r2, [r3, #116]	@ 0x74

      /* Enable the UART Data Register Not Empty interrupt */
      ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE);
 800f1bc:	687b      	ldr	r3, [r7, #4]
 800f1be:	681b      	ldr	r3, [r3, #0]
 800f1c0:	613b      	str	r3, [r7, #16]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f1c2:	693b      	ldr	r3, [r7, #16]
 800f1c4:	e853 3f00 	ldrex	r3, [r3]
 800f1c8:	60fb      	str	r3, [r7, #12]
   return(result);
 800f1ca:	68fb      	ldr	r3, [r7, #12]
 800f1cc:	f043 0320 	orr.w	r3, r3, #32
 800f1d0:	f8c7 3084 	str.w	r3, [r7, #132]	@ 0x84
 800f1d4:	687b      	ldr	r3, [r7, #4]
 800f1d6:	681b      	ldr	r3, [r3, #0]
 800f1d8:	461a      	mov	r2, r3
 800f1da:	f8d7 3084 	ldr.w	r3, [r7, #132]	@ 0x84
 800f1de:	61fb      	str	r3, [r7, #28]
 800f1e0:	61ba      	str	r2, [r7, #24]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f1e2:	69b9      	ldr	r1, [r7, #24]
 800f1e4:	69fa      	ldr	r2, [r7, #28]
 800f1e6:	e841 2300 	strex	r3, r2, [r1]
 800f1ea:	617b      	str	r3, [r7, #20]
   return(result);
 800f1ec:	697b      	ldr	r3, [r7, #20]
 800f1ee:	2b00      	cmp	r3, #0
 800f1f0:	d1e4      	bne.n	800f1bc <UART_RxISR_16BIT_FIFOEN+0x30c>
  else
  {
    /* Clear RXNE interrupt flag */
    __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
  }
}
 800f1f2:	e007      	b.n	800f204 <UART_RxISR_16BIT_FIFOEN+0x354>
    __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
 800f1f4:	687b      	ldr	r3, [r7, #4]
 800f1f6:	681b      	ldr	r3, [r3, #0]
 800f1f8:	699a      	ldr	r2, [r3, #24]
 800f1fa:	687b      	ldr	r3, [r7, #4]
 800f1fc:	681b      	ldr	r3, [r3, #0]
 800f1fe:	f042 0208 	orr.w	r2, r2, #8
 800f202:	619a      	str	r2, [r3, #24]
}
 800f204:	bf00      	nop
 800f206:	37b8      	adds	r7, #184	@ 0xb8
 800f208:	46bd      	mov	sp, r7
 800f20a:	bd80      	pop	{r7, pc}
 800f20c:	effffffe 	.word	0xeffffffe
 800f210:	58000c00 	.word	0x58000c00
 800f214:	0800e999 	.word	0x0800e999

0800f218 <HAL_UARTEx_WakeupCallback>:
  * @brief UART wakeup from Stop mode callback.
  * @param huart UART handle.
  * @retval None
  */
__weak void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart)
{
 800f218:	b480      	push	{r7}
 800f21a:	b083      	sub	sp, #12
 800f21c:	af00      	add	r7, sp, #0
 800f21e:	6078      	str	r0, [r7, #4]
  UNUSED(huart);

  /* NOTE : This function should not be modified, when the callback is needed,
            the HAL_UARTEx_WakeupCallback can be implemented in the user file.
   */
}
 800f220:	bf00      	nop
 800f222:	370c      	adds	r7, #12
 800f224:	46bd      	mov	sp, r7
 800f226:	f85d 7b04 	ldr.w	r7, [sp], #4
 800f22a:	4770      	bx	lr

0800f22c <HAL_UARTEx_RxFifoFullCallback>:
  * @brief  UART RX Fifo full callback.
  * @param  huart UART handle.
  * @retval None
  */
__weak void HAL_UARTEx_RxFifoFullCallback(UART_HandleTypeDef *huart)
{
 800f22c:	b480      	push	{r7}
 800f22e:	b083      	sub	sp, #12
 800f230:	af00      	add	r7, sp, #0
 800f232:	6078      	str	r0, [r7, #4]
  UNUSED(huart);

  /* NOTE : This function should not be modified, when the callback is needed,
            the HAL_UARTEx_RxFifoFullCallback can be implemented in the user file.
   */
}
 800f234:	bf00      	nop
 800f236:	370c      	adds	r7, #12
 800f238:	46bd      	mov	sp, r7
 800f23a:	f85d 7b04 	ldr.w	r7, [sp], #4
 800f23e:	4770      	bx	lr

0800f240 <HAL_UARTEx_TxFifoEmptyCallback>:
  * @brief  UART TX Fifo empty callback.
  * @param  huart UART handle.
  * @retval None
  */
__weak void HAL_UARTEx_TxFifoEmptyCallback(UART_HandleTypeDef *huart)
{
 800f240:	b480      	push	{r7}
 800f242:	b083      	sub	sp, #12
 800f244:	af00      	add	r7, sp, #0
 800f246:	6078      	str	r0, [r7, #4]
  UNUSED(huart);

  /* NOTE : This function should not be modified, when the callback is needed,
            the HAL_UARTEx_TxFifoEmptyCallback can be implemented in the user file.
   */
}
 800f248:	bf00      	nop
 800f24a:	370c      	adds	r7, #12
 800f24c:	46bd      	mov	sp, r7
 800f24e:	f85d 7b04 	ldr.w	r7, [sp], #4
 800f252:	4770      	bx	lr

0800f254 <HAL_UARTEx_DisableFifoMode>:
  * @brief  Disable the FIFO mode.
  * @param huart      UART handle.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_UARTEx_DisableFifoMode(UART_HandleTypeDef *huart)
{
 800f254:	b480      	push	{r7}
 800f256:	b085      	sub	sp, #20
 800f258:	af00      	add	r7, sp, #0
 800f25a:	6078      	str	r0, [r7, #4]

  /* Check parameters */
  assert_param(IS_UART_FIFO_INSTANCE(huart->Instance));

  /* Process Locked */
  __HAL_LOCK(huart);
 800f25c:	687b      	ldr	r3, [r7, #4]
 800f25e:	f893 3084 	ldrb.w	r3, [r3, #132]	@ 0x84
 800f262:	2b01      	cmp	r3, #1
 800f264:	d101      	bne.n	800f26a <HAL_UARTEx_DisableFifoMode+0x16>
 800f266:	2302      	movs	r3, #2
 800f268:	e027      	b.n	800f2ba <HAL_UARTEx_DisableFifoMode+0x66>
 800f26a:	687b      	ldr	r3, [r7, #4]
 800f26c:	2201      	movs	r2, #1
 800f26e:	f883 2084 	strb.w	r2, [r3, #132]	@ 0x84

  huart->gState = HAL_UART_STATE_BUSY;
 800f272:	687b      	ldr	r3, [r7, #4]
 800f274:	2224      	movs	r2, #36	@ 0x24
 800f276:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88

  /* Save actual UART configuration */
  tmpcr1 = READ_REG(huart->Instance->CR1);
 800f27a:	687b      	ldr	r3, [r7, #4]
 800f27c:	681b      	ldr	r3, [r3, #0]
 800f27e:	681b      	ldr	r3, [r3, #0]
 800f280:	60fb      	str	r3, [r7, #12]

  /* Disable UART */
  __HAL_UART_DISABLE(huart);
 800f282:	687b      	ldr	r3, [r7, #4]
 800f284:	681b      	ldr	r3, [r3, #0]
 800f286:	681a      	ldr	r2, [r3, #0]
 800f288:	687b      	ldr	r3, [r7, #4]
 800f28a:	681b      	ldr	r3, [r3, #0]
 800f28c:	f022 0201 	bic.w	r2, r2, #1
 800f290:	601a      	str	r2, [r3, #0]

  /* Enable FIFO mode */
  CLEAR_BIT(tmpcr1, USART_CR1_FIFOEN);
 800f292:	68fb      	ldr	r3, [r7, #12]
 800f294:	f023 5300 	bic.w	r3, r3, #536870912	@ 0x20000000
 800f298:	60fb      	str	r3, [r7, #12]
  huart->FifoMode = UART_FIFOMODE_DISABLE;
 800f29a:	687b      	ldr	r3, [r7, #4]
 800f29c:	2200      	movs	r2, #0
 800f29e:	665a      	str	r2, [r3, #100]	@ 0x64

  /* Restore UART configuration */
  WRITE_REG(huart->Instance->CR1, tmpcr1);
 800f2a0:	687b      	ldr	r3, [r7, #4]
 800f2a2:	681b      	ldr	r3, [r3, #0]
 800f2a4:	68fa      	ldr	r2, [r7, #12]
 800f2a6:	601a      	str	r2, [r3, #0]

  huart->gState = HAL_UART_STATE_READY;
 800f2a8:	687b      	ldr	r3, [r7, #4]
 800f2aa:	2220      	movs	r2, #32
 800f2ac:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88

  /* Process Unlocked */
  __HAL_UNLOCK(huart);
 800f2b0:	687b      	ldr	r3, [r7, #4]
 800f2b2:	2200      	movs	r2, #0
 800f2b4:	f883 2084 	strb.w	r2, [r3, #132]	@ 0x84

  return HAL_OK;
 800f2b8:	2300      	movs	r3, #0
}
 800f2ba:	4618      	mov	r0, r3
 800f2bc:	3714      	adds	r7, #20
 800f2be:	46bd      	mov	sp, r7
 800f2c0:	f85d 7b04 	ldr.w	r7, [sp], #4
 800f2c4:	4770      	bx	lr

0800f2c6 <HAL_UARTEx_SetTxFifoThreshold>:
  *            @arg @ref UART_TXFIFO_THRESHOLD_7_8
  *            @arg @ref UART_TXFIFO_THRESHOLD_8_8
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_UARTEx_SetTxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold)
{
 800f2c6:	b580      	push	{r7, lr}
 800f2c8:	b084      	sub	sp, #16
 800f2ca:	af00      	add	r7, sp, #0
 800f2cc:	6078      	str	r0, [r7, #4]
 800f2ce:	6039      	str	r1, [r7, #0]
  /* Check parameters */
  assert_param(IS_UART_FIFO_INSTANCE(huart->Instance));
  assert_param(IS_UART_TXFIFO_THRESHOLD(Threshold));

  /* Process Locked */
  __HAL_LOCK(huart);
 800f2d0:	687b      	ldr	r3, [r7, #4]
 800f2d2:	f893 3084 	ldrb.w	r3, [r3, #132]	@ 0x84
 800f2d6:	2b01      	cmp	r3, #1
 800f2d8:	d101      	bne.n	800f2de <HAL_UARTEx_SetTxFifoThreshold+0x18>
 800f2da:	2302      	movs	r3, #2
 800f2dc:	e02d      	b.n	800f33a <HAL_UARTEx_SetTxFifoThreshold+0x74>
 800f2de:	687b      	ldr	r3, [r7, #4]
 800f2e0:	2201      	movs	r2, #1
 800f2e2:	f883 2084 	strb.w	r2, [r3, #132]	@ 0x84

  huart->gState = HAL_UART_STATE_BUSY;
 800f2e6:	687b      	ldr	r3, [r7, #4]
 800f2e8:	2224      	movs	r2, #36	@ 0x24
 800f2ea:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88

  /* Save actual UART configuration */
  tmpcr1 = READ_REG(huart->Instance->CR1);
 800f2ee:	687b      	ldr	r3, [r7, #4]
 800f2f0:	681b      	ldr	r3, [r3, #0]
 800f2f2:	681b      	ldr	r3, [r3, #0]
 800f2f4:	60fb      	str	r3, [r7, #12]

  /* Disable UART */
  __HAL_UART_DISABLE(huart);
 800f2f6:	687b      	ldr	r3, [r7, #4]
 800f2f8:	681b      	ldr	r3, [r3, #0]
 800f2fa:	681a      	ldr	r2, [r3, #0]
 800f2fc:	687b      	ldr	r3, [r7, #4]
 800f2fe:	681b      	ldr	r3, [r3, #0]
 800f300:	f022 0201 	bic.w	r2, r2, #1
 800f304:	601a      	str	r2, [r3, #0]

  /* Update TX threshold configuration */
  MODIFY_REG(huart->Instance->CR3, USART_CR3_TXFTCFG, Threshold);
 800f306:	687b      	ldr	r3, [r7, #4]
 800f308:	681b      	ldr	r3, [r3, #0]
 800f30a:	689b      	ldr	r3, [r3, #8]
 800f30c:	f023 4160 	bic.w	r1, r3, #3758096384	@ 0xe0000000
 800f310:	687b      	ldr	r3, [r7, #4]
 800f312:	681b      	ldr	r3, [r3, #0]
 800f314:	683a      	ldr	r2, [r7, #0]
 800f316:	430a      	orrs	r2, r1
 800f318:	609a      	str	r2, [r3, #8]

  /* Determine the number of data to process during RX/TX ISR execution */
  UARTEx_SetNbDataToProcess(huart);
 800f31a:	6878      	ldr	r0, [r7, #4]
 800f31c:	f000 f8a0 	bl	800f460 <UARTEx_SetNbDataToProcess>

  /* Restore UART configuration */
  WRITE_REG(huart->Instance->CR1, tmpcr1);
 800f320:	687b      	ldr	r3, [r7, #4]
 800f322:	681b      	ldr	r3, [r3, #0]
 800f324:	68fa      	ldr	r2, [r7, #12]
 800f326:	601a      	str	r2, [r3, #0]

  huart->gState = HAL_UART_STATE_READY;
 800f328:	687b      	ldr	r3, [r7, #4]
 800f32a:	2220      	movs	r2, #32
 800f32c:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88

  /* Process Unlocked */
  __HAL_UNLOCK(huart);
 800f330:	687b      	ldr	r3, [r7, #4]
 800f332:	2200      	movs	r2, #0
 800f334:	f883 2084 	strb.w	r2, [r3, #132]	@ 0x84

  return HAL_OK;
 800f338:	2300      	movs	r3, #0
}
 800f33a:	4618      	mov	r0, r3
 800f33c:	3710      	adds	r7, #16
 800f33e:	46bd      	mov	sp, r7
 800f340:	bd80      	pop	{r7, pc}

0800f342 <HAL_UARTEx_SetRxFifoThreshold>:
  *            @arg @ref UART_RXFIFO_THRESHOLD_7_8
  *            @arg @ref UART_RXFIFO_THRESHOLD_8_8
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_UARTEx_SetRxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold)
{
 800f342:	b580      	push	{r7, lr}
 800f344:	b084      	sub	sp, #16
 800f346:	af00      	add	r7, sp, #0
 800f348:	6078      	str	r0, [r7, #4]
 800f34a:	6039      	str	r1, [r7, #0]
  /* Check the parameters */
  assert_param(IS_UART_FIFO_INSTANCE(huart->Instance));
  assert_param(IS_UART_RXFIFO_THRESHOLD(Threshold));

  /* Process Locked */
  __HAL_LOCK(huart);
 800f34c:	687b      	ldr	r3, [r7, #4]
 800f34e:	f893 3084 	ldrb.w	r3, [r3, #132]	@ 0x84
 800f352:	2b01      	cmp	r3, #1
 800f354:	d101      	bne.n	800f35a <HAL_UARTEx_SetRxFifoThreshold+0x18>
 800f356:	2302      	movs	r3, #2
 800f358:	e02d      	b.n	800f3b6 <HAL_UARTEx_SetRxFifoThreshold+0x74>
 800f35a:	687b      	ldr	r3, [r7, #4]
 800f35c:	2201      	movs	r2, #1
 800f35e:	f883 2084 	strb.w	r2, [r3, #132]	@ 0x84

  huart->gState = HAL_UART_STATE_BUSY;
 800f362:	687b      	ldr	r3, [r7, #4]
 800f364:	2224      	movs	r2, #36	@ 0x24
 800f366:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88

  /* Save actual UART configuration */
  tmpcr1 = READ_REG(huart->Instance->CR1);
 800f36a:	687b      	ldr	r3, [r7, #4]
 800f36c:	681b      	ldr	r3, [r3, #0]
 800f36e:	681b      	ldr	r3, [r3, #0]
 800f370:	60fb      	str	r3, [r7, #12]

  /* Disable UART */
  __HAL_UART_DISABLE(huart);
 800f372:	687b      	ldr	r3, [r7, #4]
 800f374:	681b      	ldr	r3, [r3, #0]
 800f376:	681a      	ldr	r2, [r3, #0]
 800f378:	687b      	ldr	r3, [r7, #4]
 800f37a:	681b      	ldr	r3, [r3, #0]
 800f37c:	f022 0201 	bic.w	r2, r2, #1
 800f380:	601a      	str	r2, [r3, #0]

  /* Update RX threshold configuration */
  MODIFY_REG(huart->Instance->CR3, USART_CR3_RXFTCFG, Threshold);
 800f382:	687b      	ldr	r3, [r7, #4]
 800f384:	681b      	ldr	r3, [r3, #0]
 800f386:	689b      	ldr	r3, [r3, #8]
 800f388:	f023 6160 	bic.w	r1, r3, #234881024	@ 0xe000000
 800f38c:	687b      	ldr	r3, [r7, #4]
 800f38e:	681b      	ldr	r3, [r3, #0]
 800f390:	683a      	ldr	r2, [r7, #0]
 800f392:	430a      	orrs	r2, r1
 800f394:	609a      	str	r2, [r3, #8]

  /* Determine the number of data to process during RX/TX ISR execution */
  UARTEx_SetNbDataToProcess(huart);
 800f396:	6878      	ldr	r0, [r7, #4]
 800f398:	f000 f862 	bl	800f460 <UARTEx_SetNbDataToProcess>

  /* Restore UART configuration */
  WRITE_REG(huart->Instance->CR1, tmpcr1);
 800f39c:	687b      	ldr	r3, [r7, #4]
 800f39e:	681b      	ldr	r3, [r3, #0]
 800f3a0:	68fa      	ldr	r2, [r7, #12]
 800f3a2:	601a      	str	r2, [r3, #0]

  huart->gState = HAL_UART_STATE_READY;
 800f3a4:	687b      	ldr	r3, [r7, #4]
 800f3a6:	2220      	movs	r2, #32
 800f3a8:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88

  /* Process Unlocked */
  __HAL_UNLOCK(huart);
 800f3ac:	687b      	ldr	r3, [r7, #4]
 800f3ae:	2200      	movs	r2, #0
 800f3b0:	f883 2084 	strb.w	r2, [r3, #132]	@ 0x84

  return HAL_OK;
 800f3b4:	2300      	movs	r3, #0
}
 800f3b6:	4618      	mov	r0, r3
 800f3b8:	3710      	adds	r7, #16
 800f3ba:	46bd      	mov	sp, r7
 800f3bc:	bd80      	pop	{r7, pc}

0800f3be <HAL_UARTEx_ReceiveToIdle_IT>:
  * @param pData Pointer to data buffer (uint8_t or uint16_t data elements).
  * @param Size  Amount of data elements (uint8_t or uint16_t) to be received.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
{
 800f3be:	b580      	push	{r7, lr}
 800f3c0:	b08c      	sub	sp, #48	@ 0x30
 800f3c2:	af00      	add	r7, sp, #0
 800f3c4:	60f8      	str	r0, [r7, #12]
 800f3c6:	60b9      	str	r1, [r7, #8]
 800f3c8:	4613      	mov	r3, r2
 800f3ca:	80fb      	strh	r3, [r7, #6]
  HAL_StatusTypeDef status = HAL_OK;
 800f3cc:	2300      	movs	r3, #0
 800f3ce:	f887 302f 	strb.w	r3, [r7, #47]	@ 0x2f

  /* Check that a Rx process is not already ongoing */
  if (huart->RxState == HAL_UART_STATE_READY)
 800f3d2:	68fb      	ldr	r3, [r7, #12]
 800f3d4:	f8d3 308c 	ldr.w	r3, [r3, #140]	@ 0x8c
 800f3d8:	2b20      	cmp	r3, #32
 800f3da:	d13b      	bne.n	800f454 <HAL_UARTEx_ReceiveToIdle_IT+0x96>
  {
    if ((pData == NULL) || (Size == 0U))
 800f3dc:	68bb      	ldr	r3, [r7, #8]
 800f3de:	2b00      	cmp	r3, #0
 800f3e0:	d002      	beq.n	800f3e8 <HAL_UARTEx_ReceiveToIdle_IT+0x2a>
 800f3e2:	88fb      	ldrh	r3, [r7, #6]
 800f3e4:	2b00      	cmp	r3, #0
 800f3e6:	d101      	bne.n	800f3ec <HAL_UARTEx_ReceiveToIdle_IT+0x2e>
    {
      return HAL_ERROR;
 800f3e8:	2301      	movs	r3, #1
 800f3ea:	e034      	b.n	800f456 <HAL_UARTEx_ReceiveToIdle_IT+0x98>
    }

    /* Set Reception type to reception till IDLE Event*/
    huart->ReceptionType = HAL_UART_RECEPTION_TOIDLE;
 800f3ec:	68fb      	ldr	r3, [r7, #12]
 800f3ee:	2201      	movs	r2, #1
 800f3f0:	66da      	str	r2, [r3, #108]	@ 0x6c
    huart->RxEventType = HAL_UART_RXEVENT_TC;
 800f3f2:	68fb      	ldr	r3, [r7, #12]
 800f3f4:	2200      	movs	r2, #0
 800f3f6:	671a      	str	r2, [r3, #112]	@ 0x70

    (void)UART_Start_Receive_IT(huart, pData, Size);
 800f3f8:	88fb      	ldrh	r3, [r7, #6]
 800f3fa:	461a      	mov	r2, r3
 800f3fc:	68b9      	ldr	r1, [r7, #8]
 800f3fe:	68f8      	ldr	r0, [r7, #12]
 800f400:	f7fe fe82 	bl	800e108 <UART_Start_Receive_IT>

    if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
 800f404:	68fb      	ldr	r3, [r7, #12]
 800f406:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 800f408:	2b01      	cmp	r3, #1
 800f40a:	d11d      	bne.n	800f448 <HAL_UARTEx_ReceiveToIdle_IT+0x8a>
    {
      __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
 800f40c:	68fb      	ldr	r3, [r7, #12]
 800f40e:	681b      	ldr	r3, [r3, #0]
 800f410:	2210      	movs	r2, #16
 800f412:	621a      	str	r2, [r3, #32]
      ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
 800f414:	68fb      	ldr	r3, [r7, #12]
 800f416:	681b      	ldr	r3, [r3, #0]
 800f418:	61bb      	str	r3, [r7, #24]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f41a:	69bb      	ldr	r3, [r7, #24]
 800f41c:	e853 3f00 	ldrex	r3, [r3]
 800f420:	617b      	str	r3, [r7, #20]
   return(result);
 800f422:	697b      	ldr	r3, [r7, #20]
 800f424:	f043 0310 	orr.w	r3, r3, #16
 800f428:	62bb      	str	r3, [r7, #40]	@ 0x28
 800f42a:	68fb      	ldr	r3, [r7, #12]
 800f42c:	681b      	ldr	r3, [r3, #0]
 800f42e:	461a      	mov	r2, r3
 800f430:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 800f432:	627b      	str	r3, [r7, #36]	@ 0x24
 800f434:	623a      	str	r2, [r7, #32]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f436:	6a39      	ldr	r1, [r7, #32]
 800f438:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 800f43a:	e841 2300 	strex	r3, r2, [r1]
 800f43e:	61fb      	str	r3, [r7, #28]
   return(result);
 800f440:	69fb      	ldr	r3, [r7, #28]
 800f442:	2b00      	cmp	r3, #0
 800f444:	d1e6      	bne.n	800f414 <HAL_UARTEx_ReceiveToIdle_IT+0x56>
 800f446:	e002      	b.n	800f44e <HAL_UARTEx_ReceiveToIdle_IT+0x90>
    {
      /* In case of errors already pending when reception is started,
         Interrupts may have already been raised and lead to reception abortion.
         (Overrun error for instance).
         In such case Reception Type has been reset to HAL_UART_RECEPTION_STANDARD. */
      status = HAL_ERROR;
 800f448:	2301      	movs	r3, #1
 800f44a:	f887 302f 	strb.w	r3, [r7, #47]	@ 0x2f
    }

    return status;
 800f44e:	f897 302f 	ldrb.w	r3, [r7, #47]	@ 0x2f
 800f452:	e000      	b.n	800f456 <HAL_UARTEx_ReceiveToIdle_IT+0x98>
  }
  else
  {
    return HAL_BUSY;
 800f454:	2302      	movs	r3, #2
  }
}
 800f456:	4618      	mov	r0, r3
 800f458:	3730      	adds	r7, #48	@ 0x30
 800f45a:	46bd      	mov	sp, r7
 800f45c:	bd80      	pop	{r7, pc}
	...

0800f460 <UARTEx_SetNbDataToProcess>:
  *       the UART configuration registers.
  * @param huart UART handle.
  * @retval None
  */
static void UARTEx_SetNbDataToProcess(UART_HandleTypeDef *huart)
{
 800f460:	b480      	push	{r7}
 800f462:	b085      	sub	sp, #20
 800f464:	af00      	add	r7, sp, #0
 800f466:	6078      	str	r0, [r7, #4]
  uint8_t rx_fifo_threshold;
  uint8_t tx_fifo_threshold;
  static const uint8_t numerator[] = {1U, 1U, 1U, 3U, 7U, 1U, 0U, 0U};
  static const uint8_t denominator[] = {8U, 4U, 2U, 4U, 8U, 1U, 1U, 1U};

  if (huart->FifoMode == UART_FIFOMODE_DISABLE)
 800f468:	687b      	ldr	r3, [r7, #4]
 800f46a:	6e5b      	ldr	r3, [r3, #100]	@ 0x64
 800f46c:	2b00      	cmp	r3, #0
 800f46e:	d108      	bne.n	800f482 <UARTEx_SetNbDataToProcess+0x22>
  {
    huart->NbTxDataToProcess = 1U;
 800f470:	687b      	ldr	r3, [r7, #4]
 800f472:	2201      	movs	r2, #1
 800f474:	f8a3 206a 	strh.w	r2, [r3, #106]	@ 0x6a
    huart->NbRxDataToProcess = 1U;
 800f478:	687b      	ldr	r3, [r7, #4]
 800f47a:	2201      	movs	r2, #1
 800f47c:	f8a3 2068 	strh.w	r2, [r3, #104]	@ 0x68
    huart->NbTxDataToProcess = ((uint16_t)tx_fifo_depth * numerator[tx_fifo_threshold]) /
                               (uint16_t)denominator[tx_fifo_threshold];
    huart->NbRxDataToProcess = ((uint16_t)rx_fifo_depth * numerator[rx_fifo_threshold]) /
                               (uint16_t)denominator[rx_fifo_threshold];
  }
}
 800f480:	e031      	b.n	800f4e6 <UARTEx_SetNbDataToProcess+0x86>
    rx_fifo_depth = RX_FIFO_DEPTH;
 800f482:	2310      	movs	r3, #16
 800f484:	73fb      	strb	r3, [r7, #15]
    tx_fifo_depth = TX_FIFO_DEPTH;
 800f486:	2310      	movs	r3, #16
 800f488:	73bb      	strb	r3, [r7, #14]
    rx_fifo_threshold = (uint8_t)(READ_BIT(huart->Instance->CR3, USART_CR3_RXFTCFG) >> USART_CR3_RXFTCFG_Pos);
 800f48a:	687b      	ldr	r3, [r7, #4]
 800f48c:	681b      	ldr	r3, [r3, #0]
 800f48e:	689b      	ldr	r3, [r3, #8]
 800f490:	0e5b      	lsrs	r3, r3, #25
 800f492:	b2db      	uxtb	r3, r3
 800f494:	f003 0307 	and.w	r3, r3, #7
 800f498:	737b      	strb	r3, [r7, #13]
    tx_fifo_threshold = (uint8_t)(READ_BIT(huart->Instance->CR3, USART_CR3_TXFTCFG) >> USART_CR3_TXFTCFG_Pos);
 800f49a:	687b      	ldr	r3, [r7, #4]
 800f49c:	681b      	ldr	r3, [r3, #0]
 800f49e:	689b      	ldr	r3, [r3, #8]
 800f4a0:	0f5b      	lsrs	r3, r3, #29
 800f4a2:	b2db      	uxtb	r3, r3
 800f4a4:	f003 0307 	and.w	r3, r3, #7
 800f4a8:	733b      	strb	r3, [r7, #12]
    huart->NbTxDataToProcess = ((uint16_t)tx_fifo_depth * numerator[tx_fifo_threshold]) /
 800f4aa:	7bbb      	ldrb	r3, [r7, #14]
 800f4ac:	7b3a      	ldrb	r2, [r7, #12]
 800f4ae:	4911      	ldr	r1, [pc, #68]	@ (800f4f4 <UARTEx_SetNbDataToProcess+0x94>)
 800f4b0:	5c8a      	ldrb	r2, [r1, r2]
 800f4b2:	fb02 f303 	mul.w	r3, r2, r3
                               (uint16_t)denominator[tx_fifo_threshold];
 800f4b6:	7b3a      	ldrb	r2, [r7, #12]
 800f4b8:	490f      	ldr	r1, [pc, #60]	@ (800f4f8 <UARTEx_SetNbDataToProcess+0x98>)
 800f4ba:	5c8a      	ldrb	r2, [r1, r2]
    huart->NbTxDataToProcess = ((uint16_t)tx_fifo_depth * numerator[tx_fifo_threshold]) /
 800f4bc:	fb93 f3f2 	sdiv	r3, r3, r2
 800f4c0:	b29a      	uxth	r2, r3
 800f4c2:	687b      	ldr	r3, [r7, #4]
 800f4c4:	f8a3 206a 	strh.w	r2, [r3, #106]	@ 0x6a
    huart->NbRxDataToProcess = ((uint16_t)rx_fifo_depth * numerator[rx_fifo_threshold]) /
 800f4c8:	7bfb      	ldrb	r3, [r7, #15]
 800f4ca:	7b7a      	ldrb	r2, [r7, #13]
 800f4cc:	4909      	ldr	r1, [pc, #36]	@ (800f4f4 <UARTEx_SetNbDataToProcess+0x94>)
 800f4ce:	5c8a      	ldrb	r2, [r1, r2]
 800f4d0:	fb02 f303 	mul.w	r3, r2, r3
                               (uint16_t)denominator[rx_fifo_threshold];
 800f4d4:	7b7a      	ldrb	r2, [r7, #13]
 800f4d6:	4908      	ldr	r1, [pc, #32]	@ (800f4f8 <UARTEx_SetNbDataToProcess+0x98>)
 800f4d8:	5c8a      	ldrb	r2, [r1, r2]
    huart->NbRxDataToProcess = ((uint16_t)rx_fifo_depth * numerator[rx_fifo_threshold]) /
 800f4da:	fb93 f3f2 	sdiv	r3, r3, r2
 800f4de:	b29a      	uxth	r2, r3
 800f4e0:	687b      	ldr	r3, [r7, #4]
 800f4e2:	f8a3 2068 	strh.w	r2, [r3, #104]	@ 0x68
}
 800f4e6:	bf00      	nop
 800f4e8:	3714      	adds	r7, #20
 800f4ea:	46bd      	mov	sp, r7
 800f4ec:	f85d 7b04 	ldr.w	r7, [sp], #4
 800f4f0:	4770      	bx	lr
 800f4f2:	bf00      	nop
 800f4f4:	080305e8 	.word	0x080305e8
 800f4f8:	080305f0 	.word	0x080305f0

0800f4fc <tcpip_init_wrap>:
/* USER CODE END OS_THREAD_ATTR_CMSIS_RTOS_V2 */

/* USER CODE BEGIN 2 */
/* ETH_CODE: workaround to call LOCK_TCPIP_CORE after tcpip_init in MX_LWIP_Init
 * This is to keep the code after MX code re-generation */
static inline void tcpip_init_wrap(tcpip_init_done_fn tcpip_init_done, void *arg){
 800f4fc:	b580      	push	{r7, lr}
 800f4fe:	b082      	sub	sp, #8
 800f500:	af00      	add	r7, sp, #0
 800f502:	6078      	str	r0, [r7, #4]
 800f504:	6039      	str	r1, [r7, #0]
	tcpip_init(tcpip_init_done, arg);
 800f506:	6839      	ldr	r1, [r7, #0]
 800f508:	6878      	ldr	r0, [r7, #4]
 800f50a:	f009 f85b 	bl	80185c4 <tcpip_init>
	LOCK_TCPIP_CORE();
 800f50e:	f000 fd91 	bl	8010034 <sys_lock_tcpip_core>
}
 800f512:	bf00      	nop
 800f514:	3708      	adds	r7, #8
 800f516:	46bd      	mov	sp, r7
 800f518:	bd80      	pop	{r7, pc}
	...

0800f51c <is_link_up>:
#define tcpip_init tcpip_init_wrap

uint8_t is_link_up(void)
{
 800f51c:	b480      	push	{r7}
 800f51e:	af00      	add	r7, sp, #0
	return netif_is_up(&gnetif);
 800f520:	4b05      	ldr	r3, [pc, #20]	@ (800f538 <is_link_up+0x1c>)
 800f522:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 800f526:	f003 0301 	and.w	r3, r3, #1
 800f52a:	b2db      	uxtb	r3, r3
}
 800f52c:	4618      	mov	r0, r3
 800f52e:	46bd      	mov	sp, r7
 800f530:	f85d 7b04 	ldr.w	r7, [sp], #4
 800f534:	4770      	bx	lr
 800f536:	bf00      	nop
 800f538:	240012d8 	.word	0x240012d8

0800f53c <MX_LWIP_Init>:

/**
  * LwIP initialization function
  */
void MX_LWIP_Init(void)
{
 800f53c:	b580      	push	{r7, lr}
 800f53e:	b084      	sub	sp, #16
 800f540:	af04      	add	r7, sp, #16
  /* IP addresses initialization without DHCP (IPv4) */
	ipaddr_aton(STATIC_IP, &ipaddr);
	ipaddr_aton(STATIC_MASK, &netmask);
	ipaddr_aton(STATIC_GW, &gw);
#else
    ip_addr_set_zero_ip4(&ipaddr);
 800f542:	4b27      	ldr	r3, [pc, #156]	@ (800f5e0 <MX_LWIP_Init+0xa4>)
 800f544:	2200      	movs	r2, #0
 800f546:	601a      	str	r2, [r3, #0]
    ip_addr_set_zero_ip4(&netmask);
 800f548:	4b26      	ldr	r3, [pc, #152]	@ (800f5e4 <MX_LWIP_Init+0xa8>)
 800f54a:	2200      	movs	r2, #0
 800f54c:	601a      	str	r2, [r3, #0]
    ip_addr_set_zero_ip4(&gw);
 800f54e:	4b26      	ldr	r3, [pc, #152]	@ (800f5e8 <MX_LWIP_Init+0xac>)
 800f550:	2200      	movs	r2, #0
 800f552:	601a      	str	r2, [r3, #0]
#endif
	/* USER CODE END IP_ADDRESSES */

  /* Initilialize the LwIP stack with RTOS */
  tcpip_init( NULL, NULL );
 800f554:	2100      	movs	r1, #0
 800f556:	2000      	movs	r0, #0
 800f558:	f7ff ffd0 	bl	800f4fc <tcpip_init_wrap>
//  IP4_ADDR(&ipaddr, IP_ADDRESS[0], IP_ADDRESS[1], IP_ADDRESS[2], IP_ADDRESS[3]);
//  IP4_ADDR(&netmask, NETMASK_ADDRESS[0], NETMASK_ADDRESS[1] , NETMASK_ADDRESS[2], NETMASK_ADDRESS[3]);
//  IP4_ADDR(&gw, GATEWAY_ADDRESS[0], GATEWAY_ADDRESS[1], GATEWAY_ADDRESS[2], GATEWAY_ADDRESS[3]);

  /* add the network interface (IPv4/IPv6) with RTOS */
  netif_add(&gnetif, &ipaddr, &netmask, &gw, NULL, &ethernetif_init, &tcpip_input);
 800f55c:	4b23      	ldr	r3, [pc, #140]	@ (800f5ec <MX_LWIP_Init+0xb0>)
 800f55e:	9302      	str	r3, [sp, #8]
 800f560:	4b23      	ldr	r3, [pc, #140]	@ (800f5f0 <MX_LWIP_Init+0xb4>)
 800f562:	9301      	str	r3, [sp, #4]
 800f564:	2300      	movs	r3, #0
 800f566:	9300      	str	r3, [sp, #0]
 800f568:	4b1f      	ldr	r3, [pc, #124]	@ (800f5e8 <MX_LWIP_Init+0xac>)
 800f56a:	4a1e      	ldr	r2, [pc, #120]	@ (800f5e4 <MX_LWIP_Init+0xa8>)
 800f56c:	491c      	ldr	r1, [pc, #112]	@ (800f5e0 <MX_LWIP_Init+0xa4>)
 800f56e:	4821      	ldr	r0, [pc, #132]	@ (800f5f4 <MX_LWIP_Init+0xb8>)
 800f570:	f009 fe98 	bl	80192a4 <netif_add>

  /* Registers the default network interface */
  netif_set_default(&gnetif);
 800f574:	481f      	ldr	r0, [pc, #124]	@ (800f5f4 <MX_LWIP_Init+0xb8>)
 800f576:	f00a f853 	bl	8019620 <netif_set_default>

  if (netif_is_link_up(&gnetif))
 800f57a:	4b1e      	ldr	r3, [pc, #120]	@ (800f5f4 <MX_LWIP_Init+0xb8>)
 800f57c:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 800f580:	089b      	lsrs	r3, r3, #2
 800f582:	f003 0301 	and.w	r3, r3, #1
 800f586:	b2db      	uxtb	r3, r3
 800f588:	2b00      	cmp	r3, #0
 800f58a:	d003      	beq.n	800f594 <MX_LWIP_Init+0x58>
  {
    /* When the netif is fully configured this function must be called */
    netif_set_up(&gnetif);
 800f58c:	4819      	ldr	r0, [pc, #100]	@ (800f5f4 <MX_LWIP_Init+0xb8>)
 800f58e:	f00a f857 	bl	8019640 <netif_set_up>
 800f592:	e002      	b.n	800f59a <MX_LWIP_Init+0x5e>
  }
  else
  {
    /* When the netif link is down this function must be called */
    netif_set_down(&gnetif);
 800f594:	4817      	ldr	r0, [pc, #92]	@ (800f5f4 <MX_LWIP_Init+0xb8>)
 800f596:	f00a f8c1 	bl	801971c <netif_set_down>
  }

  /* Set the link callback function, this function is called on change of link status*/
  netif_set_link_callback(&gnetif, ethernet_link_status_updated);
 800f59a:	4917      	ldr	r1, [pc, #92]	@ (800f5f8 <MX_LWIP_Init+0xbc>)
 800f59c:	4815      	ldr	r0, [pc, #84]	@ (800f5f4 <MX_LWIP_Init+0xb8>)
 800f59e:	f00a f95d 	bl	801985c <netif_set_link_callback>

  /* Create the Ethernet link handler thread */
/* USER CODE BEGIN H7_OS_THREAD_NEW_CMSIS_RTOS_V2 */
  memset(&attributes, 0x0, sizeof(osThreadAttr_t));
 800f5a2:	2224      	movs	r2, #36	@ 0x24
 800f5a4:	2100      	movs	r1, #0
 800f5a6:	4815      	ldr	r0, [pc, #84]	@ (800f5fc <MX_LWIP_Init+0xc0>)
 800f5a8:	f01a f942 	bl	8029830 <memset>
  attributes.name = "EthLink";
 800f5ac:	4b13      	ldr	r3, [pc, #76]	@ (800f5fc <MX_LWIP_Init+0xc0>)
 800f5ae:	4a14      	ldr	r2, [pc, #80]	@ (800f600 <MX_LWIP_Init+0xc4>)
 800f5b0:	601a      	str	r2, [r3, #0]
  attributes.stack_size = INTERFACE_THREAD_STACK_SIZE * 2;
 800f5b2:	4b12      	ldr	r3, [pc, #72]	@ (800f5fc <MX_LWIP_Init+0xc0>)
 800f5b4:	f44f 6200 	mov.w	r2, #2048	@ 0x800
 800f5b8:	615a      	str	r2, [r3, #20]
  attributes.priority = osPriorityBelowNormal;
 800f5ba:	4b10      	ldr	r3, [pc, #64]	@ (800f5fc <MX_LWIP_Init+0xc0>)
 800f5bc:	2210      	movs	r2, #16
 800f5be:	619a      	str	r2, [r3, #24]
  osThreadNew(ethernet_link_thread, &gnetif, &attributes);
 800f5c0:	4a0e      	ldr	r2, [pc, #56]	@ (800f5fc <MX_LWIP_Init+0xc0>)
 800f5c2:	490c      	ldr	r1, [pc, #48]	@ (800f5f4 <MX_LWIP_Init+0xb8>)
 800f5c4:	480f      	ldr	r0, [pc, #60]	@ (800f604 <MX_LWIP_Init+0xc8>)
 800f5c6:	f000 fede 	bl	8010386 <osThreadNew>
/* USER CODE END H7_OS_THREAD_NEW_CMSIS_RTOS_V2 */

/* USER CODE BEGIN 3 */
  /* Start DHCP negotiation for a network interface (IPv4) */
#if USE_DHCP
  netif_set_up(&gnetif);
 800f5ca:	480a      	ldr	r0, [pc, #40]	@ (800f5f4 <MX_LWIP_Init+0xb8>)
 800f5cc:	f00a f838 	bl	8019640 <netif_set_up>
  dhcp_start(&gnetif);
 800f5d0:	4808      	ldr	r0, [pc, #32]	@ (800f5f4 <MX_LWIP_Init+0xb8>)
 800f5d2:	f012 fb25 	bl	8021c20 <dhcp_start>
#else
  netif_set_addr(&gnetif, ip_2_ip4(&ipaddr), ip_2_ip4(&netmask), ip_2_ip4(&gw));
#endif
  /* ETH_CODE: call UNLOCK_TCPIP_CORE after we are done */
  UNLOCK_TCPIP_CORE();
 800f5d6:	f000 fd3d 	bl	8010054 <sys_unlock_tcpip_core>

/* USER CODE END 3 */
}
 800f5da:	bf00      	nop
 800f5dc:	46bd      	mov	sp, r7
 800f5de:	bd80      	pop	{r7, pc}
 800f5e0:	24001310 	.word	0x24001310
 800f5e4:	24001314 	.word	0x24001314
 800f5e8:	24001318 	.word	0x24001318
 800f5ec:	080184dd 	.word	0x080184dd
 800f5f0:	0800fabd 	.word	0x0800fabd
 800f5f4:	240012d8 	.word	0x240012d8
 800f5f8:	0800f609 	.word	0x0800f609
 800f5fc:	2400131c 	.word	0x2400131c
 800f600:	0802c56c 	.word	0x0802c56c
 800f604:	0800fd6d 	.word	0x0800fd6d

0800f608 <ethernet_link_status_updated>:
  * @brief  Notify the User about the network interface config status
  * @param  netif: the network interface
  * @retval None
  */
static void ethernet_link_status_updated(struct netif *netif)
{
 800f608:	b480      	push	{r7}
 800f60a:	b083      	sub	sp, #12
 800f60c:	af00      	add	r7, sp, #0
 800f60e:	6078      	str	r0, [r7, #4]
  else /* netif is down */
  {
/* USER CODE BEGIN 6 */
/* USER CODE END 6 */
  }
}
 800f610:	bf00      	nop
 800f612:	370c      	adds	r7, #12
 800f614:	46bd      	mov	sp, r7
 800f616:	f85d 7b04 	ldr.w	r7, [sp], #4
 800f61a:	4770      	bx	lr

0800f61c <HAL_ETH_RxCpltCallback>:
  * @brief  Ethernet Rx Transfer completed callback
  * @param  handlerEth: ETH handler
  * @retval None
  */
void HAL_ETH_RxCpltCallback(ETH_HandleTypeDef *handlerEth)
{
 800f61c:	b580      	push	{r7, lr}
 800f61e:	b082      	sub	sp, #8
 800f620:	af00      	add	r7, sp, #0
 800f622:	6078      	str	r0, [r7, #4]
  osSemaphoreRelease(RxPktSemaphore);
 800f624:	4b04      	ldr	r3, [pc, #16]	@ (800f638 <HAL_ETH_RxCpltCallback+0x1c>)
 800f626:	681b      	ldr	r3, [r3, #0]
 800f628:	4618      	mov	r0, r3
 800f62a:	f001 f94f 	bl	80108cc <osSemaphoreRelease>
}
 800f62e:	bf00      	nop
 800f630:	3708      	adds	r7, #8
 800f632:	46bd      	mov	sp, r7
 800f634:	bd80      	pop	{r7, pc}
 800f636:	bf00      	nop
 800f638:	24001348 	.word	0x24001348

0800f63c <HAL_ETH_TxCpltCallback>:
  * @brief  Ethernet Tx Transfer completed callback
  * @param  handlerEth: ETH handler
  * @retval None
  */
void HAL_ETH_TxCpltCallback(ETH_HandleTypeDef *handlerEth)
{
 800f63c:	b580      	push	{r7, lr}
 800f63e:	b082      	sub	sp, #8
 800f640:	af00      	add	r7, sp, #0
 800f642:	6078      	str	r0, [r7, #4]
  osSemaphoreRelease(TxPktSemaphore);
 800f644:	4b04      	ldr	r3, [pc, #16]	@ (800f658 <HAL_ETH_TxCpltCallback+0x1c>)
 800f646:	681b      	ldr	r3, [r3, #0]
 800f648:	4618      	mov	r0, r3
 800f64a:	f001 f93f 	bl	80108cc <osSemaphoreRelease>
}
 800f64e:	bf00      	nop
 800f650:	3708      	adds	r7, #8
 800f652:	46bd      	mov	sp, r7
 800f654:	bd80      	pop	{r7, pc}
 800f656:	bf00      	nop
 800f658:	2400134c 	.word	0x2400134c

0800f65c <HAL_ETH_ErrorCallback>:
  * @brief  Ethernet DMA transfer error callback
  * @param  handlerEth: ETH handler
  * @retval None
  */
void HAL_ETH_ErrorCallback(ETH_HandleTypeDef *handlerEth)
{
 800f65c:	b580      	push	{r7, lr}
 800f65e:	b082      	sub	sp, #8
 800f660:	af00      	add	r7, sp, #0
 800f662:	6078      	str	r0, [r7, #4]
  if((HAL_ETH_GetDMAError(handlerEth) & ETH_DMACSR_RBU) == ETH_DMACSR_RBU)
 800f664:	6878      	ldr	r0, [r7, #4]
 800f666:	f7f9 f833 	bl	80086d0 <HAL_ETH_GetDMAError>
 800f66a:	4603      	mov	r3, r0
 800f66c:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 800f670:	2b80      	cmp	r3, #128	@ 0x80
 800f672:	d104      	bne.n	800f67e <HAL_ETH_ErrorCallback+0x22>
  {
     osSemaphoreRelease(RxPktSemaphore);
 800f674:	4b04      	ldr	r3, [pc, #16]	@ (800f688 <HAL_ETH_ErrorCallback+0x2c>)
 800f676:	681b      	ldr	r3, [r3, #0]
 800f678:	4618      	mov	r0, r3
 800f67a:	f001 f927 	bl	80108cc <osSemaphoreRelease>
  }
}
 800f67e:	bf00      	nop
 800f680:	3708      	adds	r7, #8
 800f682:	46bd      	mov	sp, r7
 800f684:	bd80      	pop	{r7, pc}
 800f686:	bf00      	nop
 800f688:	24001348 	.word	0x24001348

0800f68c <low_level_init>:
 *
 * @param netif the already initialized lwip network interface structure
 *        for this ethernetif
 */
static void low_level_init(struct netif *netif)
{
 800f68c:	b580      	push	{r7, lr}
 800f68e:	b0aa      	sub	sp, #168	@ 0xa8
 800f690:	af00      	add	r7, sp, #0
 800f692:	6078      	str	r0, [r7, #4]
  HAL_StatusTypeDef hal_eth_init_status = HAL_OK;
 800f694:	2300      	movs	r3, #0
 800f696:	f887 309f 	strb.w	r3, [r7, #159]	@ 0x9f
/* USER CODE BEGIN OS_THREAD_ATTR_CMSIS_RTOS_V2 */
  osThreadAttr_t attributes;
/* USER CODE END OS_THREAD_ATTR_CMSIS_RTOS_V2 */
  uint32_t duplex, speed = 0;
 800f69a:	2300      	movs	r3, #0
 800f69c:	f8c7 30a0 	str.w	r3, [r7, #160]	@ 0xa0
  int32_t PHYLinkState = 0;
 800f6a0:	2300      	movs	r3, #0
 800f6a2:	f8c7 3098 	str.w	r3, [r7, #152]	@ 0x98
  ETH_MACConfigTypeDef MACConf = {0};
 800f6a6:	f107 0310 	add.w	r3, r7, #16
 800f6aa:	2264      	movs	r2, #100	@ 0x64
 800f6ac:	2100      	movs	r1, #0
 800f6ae:	4618      	mov	r0, r3
 800f6b0:	f01a f8be 	bl	8029830 <memset>
  /* Start ETH HAL Init */

   uint8_t MACAddr[6] ;
  heth.Instance = ETH;
 800f6b4:	4b86      	ldr	r3, [pc, #536]	@ (800f8d0 <low_level_init+0x244>)
 800f6b6:	4a87      	ldr	r2, [pc, #540]	@ (800f8d4 <low_level_init+0x248>)
 800f6b8:	601a      	str	r2, [r3, #0]
//  MACAddr[1] = 0x80;
//  MACAddr[2] = 0xE1;
//  MACAddr[3] = 0x00;
//  MACAddr[4] = 0x00;
//  MACAddr[5] = 0x00;
    MACAddr[0] = 0x7C;
 800f6ba:	237c      	movs	r3, #124	@ 0x7c
 800f6bc:	723b      	strb	r3, [r7, #8]
    MACAddr[1] = 0xF6;
 800f6be:	23f6      	movs	r3, #246	@ 0xf6
 800f6c0:	727b      	strb	r3, [r7, #9]
    MACAddr[2] = 0x66;
 800f6c2:	2366      	movs	r3, #102	@ 0x66
 800f6c4:	72bb      	strb	r3, [r7, #10]
    MACAddr[3] = 0xE4;
 800f6c6:	23e4      	movs	r3, #228	@ 0xe4
 800f6c8:	72fb      	strb	r3, [r7, #11]
    MACAddr[4] = 0xB5;
 800f6ca:	23b5      	movs	r3, #181	@ 0xb5
 800f6cc:	733b      	strb	r3, [r7, #12]
    MACAddr[5] = 0x41;
 800f6ce:	2341      	movs	r3, #65	@ 0x41
 800f6d0:	737b      	strb	r3, [r7, #13]
  heth.Init.MACAddr = &MACAddr[0];
 800f6d2:	4a7f      	ldr	r2, [pc, #508]	@ (800f8d0 <low_level_init+0x244>)
 800f6d4:	f107 0308 	add.w	r3, r7, #8
 800f6d8:	6053      	str	r3, [r2, #4]
  heth.Init.MediaInterface = HAL_ETH_MII_MODE;
 800f6da:	4b7d      	ldr	r3, [pc, #500]	@ (800f8d0 <low_level_init+0x244>)
 800f6dc:	2200      	movs	r2, #0
 800f6de:	721a      	strb	r2, [r3, #8]
  heth.Init.TxDesc = DMATxDscrTab;
 800f6e0:	4b7b      	ldr	r3, [pc, #492]	@ (800f8d0 <low_level_init+0x244>)
 800f6e2:	4a7d      	ldr	r2, [pc, #500]	@ (800f8d8 <low_level_init+0x24c>)
 800f6e4:	60da      	str	r2, [r3, #12]
  heth.Init.RxDesc = DMARxDscrTab;
 800f6e6:	4b7a      	ldr	r3, [pc, #488]	@ (800f8d0 <low_level_init+0x244>)
 800f6e8:	4a7c      	ldr	r2, [pc, #496]	@ (800f8dc <low_level_init+0x250>)
 800f6ea:	611a      	str	r2, [r3, #16]
  heth.Init.RxBuffLen = 1536;
 800f6ec:	4b78      	ldr	r3, [pc, #480]	@ (800f8d0 <low_level_init+0x244>)
 800f6ee:	f44f 62c0 	mov.w	r2, #1536	@ 0x600
 800f6f2:	615a      	str	r2, [r3, #20]

  /* USER CODE BEGIN MACADDRESS */

  /* USER CODE END MACADDRESS */

  hal_eth_init_status = HAL_ETH_Init(&heth);
 800f6f4:	4876      	ldr	r0, [pc, #472]	@ (800f8d0 <low_level_init+0x244>)
 800f6f6:	f7f8 f81f 	bl	8007738 <HAL_ETH_Init>
 800f6fa:	4603      	mov	r3, r0
 800f6fc:	f887 309f 	strb.w	r3, [r7, #159]	@ 0x9f

  memset(&TxConfig, 0 , sizeof(ETH_TxPacketConfig));
 800f700:	2238      	movs	r2, #56	@ 0x38
 800f702:	2100      	movs	r1, #0
 800f704:	4876      	ldr	r0, [pc, #472]	@ (800f8e0 <low_level_init+0x254>)
 800f706:	f01a f893 	bl	8029830 <memset>
  TxConfig.Attributes = ETH_TX_PACKETS_FEATURES_CSUM | ETH_TX_PACKETS_FEATURES_CRCPAD;
 800f70a:	4b75      	ldr	r3, [pc, #468]	@ (800f8e0 <low_level_init+0x254>)
 800f70c:	2221      	movs	r2, #33	@ 0x21
 800f70e:	601a      	str	r2, [r3, #0]
  TxConfig.ChecksumCtrl = ETH_CHECKSUM_IPHDR_PAYLOAD_INSERT_PHDR_CALC;
 800f710:	4b73      	ldr	r3, [pc, #460]	@ (800f8e0 <low_level_init+0x254>)
 800f712:	f44f 3240 	mov.w	r2, #196608	@ 0x30000
 800f716:	615a      	str	r2, [r3, #20]
  TxConfig.CRCPadCtrl = ETH_CRC_PAD_INSERT;
 800f718:	4b71      	ldr	r3, [pc, #452]	@ (800f8e0 <low_level_init+0x254>)
 800f71a:	2200      	movs	r2, #0
 800f71c:	611a      	str	r2, [r3, #16]

  /* End ETH HAL Init */

  /* Initialize the RX POOL */
  LWIP_MEMPOOL_INIT(RX_POOL);
 800f71e:	4871      	ldr	r0, [pc, #452]	@ (800f8e4 <low_level_init+0x258>)
 800f720:	f009 fc7a 	bl	8019018 <memp_init_pool>

#if LWIP_ARP || LWIP_ETHERNET

  /* set MAC hardware address length */
  netif->hwaddr_len = ETH_HWADDR_LEN;
 800f724:	687b      	ldr	r3, [r7, #4]
 800f726:	2206      	movs	r2, #6
 800f728:	f883 2030 	strb.w	r2, [r3, #48]	@ 0x30

  /* set MAC hardware address */
  netif->hwaddr[0] =  heth.Init.MACAddr[0];
 800f72c:	4b68      	ldr	r3, [pc, #416]	@ (800f8d0 <low_level_init+0x244>)
 800f72e:	685b      	ldr	r3, [r3, #4]
 800f730:	781a      	ldrb	r2, [r3, #0]
 800f732:	687b      	ldr	r3, [r7, #4]
 800f734:	f883 202a 	strb.w	r2, [r3, #42]	@ 0x2a
  netif->hwaddr[1] =  heth.Init.MACAddr[1];
 800f738:	4b65      	ldr	r3, [pc, #404]	@ (800f8d0 <low_level_init+0x244>)
 800f73a:	685b      	ldr	r3, [r3, #4]
 800f73c:	785a      	ldrb	r2, [r3, #1]
 800f73e:	687b      	ldr	r3, [r7, #4]
 800f740:	f883 202b 	strb.w	r2, [r3, #43]	@ 0x2b
  netif->hwaddr[2] =  heth.Init.MACAddr[2];
 800f744:	4b62      	ldr	r3, [pc, #392]	@ (800f8d0 <low_level_init+0x244>)
 800f746:	685b      	ldr	r3, [r3, #4]
 800f748:	789a      	ldrb	r2, [r3, #2]
 800f74a:	687b      	ldr	r3, [r7, #4]
 800f74c:	f883 202c 	strb.w	r2, [r3, #44]	@ 0x2c
  netif->hwaddr[3] =  heth.Init.MACAddr[3];
 800f750:	4b5f      	ldr	r3, [pc, #380]	@ (800f8d0 <low_level_init+0x244>)
 800f752:	685b      	ldr	r3, [r3, #4]
 800f754:	78da      	ldrb	r2, [r3, #3]
 800f756:	687b      	ldr	r3, [r7, #4]
 800f758:	f883 202d 	strb.w	r2, [r3, #45]	@ 0x2d
  netif->hwaddr[4] =  heth.Init.MACAddr[4];
 800f75c:	4b5c      	ldr	r3, [pc, #368]	@ (800f8d0 <low_level_init+0x244>)
 800f75e:	685b      	ldr	r3, [r3, #4]
 800f760:	791a      	ldrb	r2, [r3, #4]
 800f762:	687b      	ldr	r3, [r7, #4]
 800f764:	f883 202e 	strb.w	r2, [r3, #46]	@ 0x2e
  netif->hwaddr[5] =  heth.Init.MACAddr[5];
 800f768:	4b59      	ldr	r3, [pc, #356]	@ (800f8d0 <low_level_init+0x244>)
 800f76a:	685b      	ldr	r3, [r3, #4]
 800f76c:	795a      	ldrb	r2, [r3, #5]
 800f76e:	687b      	ldr	r3, [r7, #4]
 800f770:	f883 202f 	strb.w	r2, [r3, #47]	@ 0x2f

  /* maximum transfer unit */
  netif->mtu = ETH_MAX_PAYLOAD;
 800f774:	687b      	ldr	r3, [r7, #4]
 800f776:	f240 52dc 	movw	r2, #1500	@ 0x5dc
 800f77a:	851a      	strh	r2, [r3, #40]	@ 0x28

  /* Accept broadcast address and ARP traffic */
  /* don't set NETIF_FLAG_ETHARP if this device is not an ethernet one */
  #if LWIP_ARP
    netif->flags |= NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP;
 800f77c:	687b      	ldr	r3, [r7, #4]
 800f77e:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 800f782:	f043 030a 	orr.w	r3, r3, #10
 800f786:	b2da      	uxtb	r2, r3
 800f788:	687b      	ldr	r3, [r7, #4]
 800f78a:	f883 2031 	strb.w	r2, [r3, #49]	@ 0x31
  #else
    netif->flags |= NETIF_FLAG_BROADCAST;
  #endif /* LWIP_ARP */

  /* create a binary semaphore used for informing ethernetif of frame reception */
  RxPktSemaphore = osSemaphoreNew(1, 1, NULL);
 800f78e:	2200      	movs	r2, #0
 800f790:	2101      	movs	r1, #1
 800f792:	2001      	movs	r0, #1
 800f794:	f000 ffbe 	bl	8010714 <osSemaphoreNew>
 800f798:	4603      	mov	r3, r0
 800f79a:	4a53      	ldr	r2, [pc, #332]	@ (800f8e8 <low_level_init+0x25c>)
 800f79c:	6013      	str	r3, [r2, #0]

  /* create a binary semaphore used for informing ethernetif of frame transmission */
  TxPktSemaphore = osSemaphoreNew(1, 1, NULL);
 800f79e:	2200      	movs	r2, #0
 800f7a0:	2101      	movs	r1, #1
 800f7a2:	2001      	movs	r0, #1
 800f7a4:	f000 ffb6 	bl	8010714 <osSemaphoreNew>
 800f7a8:	4603      	mov	r3, r0
 800f7aa:	4a50      	ldr	r2, [pc, #320]	@ (800f8ec <low_level_init+0x260>)
 800f7ac:	6013      	str	r3, [r2, #0]

  /* create the task that handles the ETH_MAC */
/* USER CODE BEGIN OS_THREAD_NEW_CMSIS_RTOS_V2 */
  memset(&attributes, 0x0, sizeof(osThreadAttr_t));
 800f7ae:	f107 0374 	add.w	r3, r7, #116	@ 0x74
 800f7b2:	2224      	movs	r2, #36	@ 0x24
 800f7b4:	2100      	movs	r1, #0
 800f7b6:	4618      	mov	r0, r3
 800f7b8:	f01a f83a 	bl	8029830 <memset>
  attributes.name = "EthIf";
 800f7bc:	4b4c      	ldr	r3, [pc, #304]	@ (800f8f0 <low_level_init+0x264>)
 800f7be:	677b      	str	r3, [r7, #116]	@ 0x74
  attributes.stack_size = INTERFACE_THREAD_STACK_SIZE;
 800f7c0:	f44f 6380 	mov.w	r3, #1024	@ 0x400
 800f7c4:	f8c7 3088 	str.w	r3, [r7, #136]	@ 0x88
  attributes.priority = osPriorityRealtime;
 800f7c8:	2330      	movs	r3, #48	@ 0x30
 800f7ca:	f8c7 308c 	str.w	r3, [r7, #140]	@ 0x8c
  osThreadNew(ethernetif_input, netif, &attributes);
 800f7ce:	f107 0374 	add.w	r3, r7, #116	@ 0x74
 800f7d2:	461a      	mov	r2, r3
 800f7d4:	6879      	ldr	r1, [r7, #4]
 800f7d6:	4847      	ldr	r0, [pc, #284]	@ (800f8f4 <low_level_init+0x268>)
 800f7d8:	f000 fdd5 	bl	8010386 <osThreadNew>

/* USER CODE BEGIN PHY_PRE_CONFIG */

/* USER CODE END PHY_PRE_CONFIG */
  /* Set PHY IO functions */
  DP83848_RegisterBusIO(&DP83848, &DP83848_IOCtx);
 800f7dc:	4946      	ldr	r1, [pc, #280]	@ (800f8f8 <low_level_init+0x26c>)
 800f7de:	4847      	ldr	r0, [pc, #284]	@ (800f8fc <low_level_init+0x270>)
 800f7e0:	f7f5 f87f 	bl	80048e2 <DP83848_RegisterBusIO>

  /* Initialize the DP83848 ETH PHY */
  DP83848_Init(&DP83848);
 800f7e4:	4845      	ldr	r0, [pc, #276]	@ (800f8fc <low_level_init+0x270>)
 800f7e6:	f7f5 f8ae 	bl	8004946 <DP83848_Init>

  if (hal_eth_init_status == HAL_OK)
 800f7ea:	f897 309f 	ldrb.w	r3, [r7, #159]	@ 0x9f
 800f7ee:	2b00      	cmp	r3, #0
 800f7f0:	d168      	bne.n	800f8c4 <low_level_init+0x238>
  {
    PHYLinkState = DP83848_GetLinkState(&DP83848);
 800f7f2:	4842      	ldr	r0, [pc, #264]	@ (800f8fc <low_level_init+0x270>)
 800f7f4:	f7f5 f8f4 	bl	80049e0 <DP83848_GetLinkState>
 800f7f8:	f8c7 0098 	str.w	r0, [r7, #152]	@ 0x98

    /* Get link state */
    if(PHYLinkState <= DP83848_STATUS_LINK_DOWN)
 800f7fc:	f8d7 3098 	ldr.w	r3, [r7, #152]	@ 0x98
 800f800:	2b01      	cmp	r3, #1
 800f802:	dc06      	bgt.n	800f812 <low_level_init+0x186>
    {
      netif_set_link_down(netif);
 800f804:	6878      	ldr	r0, [r7, #4]
 800f806:	f009 fff7 	bl	80197f8 <netif_set_link_down>
      netif_set_down(netif);
 800f80a:	6878      	ldr	r0, [r7, #4]
 800f80c:	f009 ff86 	bl	801971c <netif_set_down>
#endif /* LWIP_ARP || LWIP_ETHERNET */

/* USER CODE BEGIN LOW_LEVEL_INIT */

/* USER CODE END LOW_LEVEL_INIT */
}
 800f810:	e05a      	b.n	800f8c8 <low_level_init+0x23c>
      switch (PHYLinkState)
 800f812:	f8d7 3098 	ldr.w	r3, [r7, #152]	@ 0x98
 800f816:	3b02      	subs	r3, #2
 800f818:	2b03      	cmp	r3, #3
 800f81a:	d82b      	bhi.n	800f874 <low_level_init+0x1e8>
 800f81c:	a201      	add	r2, pc, #4	@ (adr r2, 800f824 <low_level_init+0x198>)
 800f81e:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800f822:	bf00      	nop
 800f824:	0800f835 	.word	0x0800f835
 800f828:	0800f847 	.word	0x0800f847
 800f82c:	0800f857 	.word	0x0800f857
 800f830:	0800f867 	.word	0x0800f867
        duplex = ETH_FULLDUPLEX_MODE;
 800f834:	f44f 5300 	mov.w	r3, #8192	@ 0x2000
 800f838:	f8c7 30a4 	str.w	r3, [r7, #164]	@ 0xa4
        speed = ETH_SPEED_100M;
 800f83c:	f44f 4380 	mov.w	r3, #16384	@ 0x4000
 800f840:	f8c7 30a0 	str.w	r3, [r7, #160]	@ 0xa0
        break;
 800f844:	e01f      	b.n	800f886 <low_level_init+0x1fa>
        duplex = ETH_HALFDUPLEX_MODE;
 800f846:	2300      	movs	r3, #0
 800f848:	f8c7 30a4 	str.w	r3, [r7, #164]	@ 0xa4
        speed = ETH_SPEED_100M;
 800f84c:	f44f 4380 	mov.w	r3, #16384	@ 0x4000
 800f850:	f8c7 30a0 	str.w	r3, [r7, #160]	@ 0xa0
        break;
 800f854:	e017      	b.n	800f886 <low_level_init+0x1fa>
        duplex = ETH_FULLDUPLEX_MODE;
 800f856:	f44f 5300 	mov.w	r3, #8192	@ 0x2000
 800f85a:	f8c7 30a4 	str.w	r3, [r7, #164]	@ 0xa4
        speed = ETH_SPEED_10M;
 800f85e:	2300      	movs	r3, #0
 800f860:	f8c7 30a0 	str.w	r3, [r7, #160]	@ 0xa0
        break;
 800f864:	e00f      	b.n	800f886 <low_level_init+0x1fa>
        duplex = ETH_HALFDUPLEX_MODE;
 800f866:	2300      	movs	r3, #0
 800f868:	f8c7 30a4 	str.w	r3, [r7, #164]	@ 0xa4
        speed = ETH_SPEED_10M;
 800f86c:	2300      	movs	r3, #0
 800f86e:	f8c7 30a0 	str.w	r3, [r7, #160]	@ 0xa0
        break;
 800f872:	e008      	b.n	800f886 <low_level_init+0x1fa>
        duplex = ETH_FULLDUPLEX_MODE;
 800f874:	f44f 5300 	mov.w	r3, #8192	@ 0x2000
 800f878:	f8c7 30a4 	str.w	r3, [r7, #164]	@ 0xa4
        speed = ETH_SPEED_100M;
 800f87c:	f44f 4380 	mov.w	r3, #16384	@ 0x4000
 800f880:	f8c7 30a0 	str.w	r3, [r7, #160]	@ 0xa0
        break;
 800f884:	bf00      	nop
    HAL_ETH_GetMACConfig(&heth, &MACConf);
 800f886:	f107 0310 	add.w	r3, r7, #16
 800f88a:	4619      	mov	r1, r3
 800f88c:	4810      	ldr	r0, [pc, #64]	@ (800f8d0 <low_level_init+0x244>)
 800f88e:	f7f8 fce1 	bl	8008254 <HAL_ETH_GetMACConfig>
    MACConf.DuplexMode = duplex;
 800f892:	f8d7 30a4 	ldr.w	r3, [r7, #164]	@ 0xa4
 800f896:	62bb      	str	r3, [r7, #40]	@ 0x28
    MACConf.Speed = speed;
 800f898:	f8d7 30a0 	ldr.w	r3, [r7, #160]	@ 0xa0
 800f89c:	627b      	str	r3, [r7, #36]	@ 0x24
    HAL_ETH_SetMACConfig(&heth, &MACConf);
 800f89e:	f107 0310 	add.w	r3, r7, #16
 800f8a2:	4619      	mov	r1, r3
 800f8a4:	480a      	ldr	r0, [pc, #40]	@ (800f8d0 <low_level_init+0x244>)
 800f8a6:	f7f8 fea9 	bl	80085fc <HAL_ETH_SetMACConfig>
    HAL_ETH_Start_IT(&heth);
 800f8aa:	4809      	ldr	r0, [pc, #36]	@ (800f8d0 <low_level_init+0x244>)
 800f8ac:	f7f8 f842 	bl	8007934 <HAL_ETH_Start_IT>
    netif_set_up(netif);
 800f8b0:	6878      	ldr	r0, [r7, #4]
 800f8b2:	f009 fec5 	bl	8019640 <netif_set_up>
    netif_set_link_up(netif);
 800f8b6:	6878      	ldr	r0, [r7, #4]
 800f8b8:	f009 ff64 	bl	8019784 <netif_set_link_up>
    ethernetif_notify_conn_changed(netif);
 800f8bc:	6878      	ldr	r0, [r7, #4]
 800f8be:	f000 fb0b 	bl	800fed8 <ethernetif_notify_conn_changed>
}
 800f8c2:	e001      	b.n	800f8c8 <low_level_init+0x23c>
    Error_Handler();
 800f8c4:	f7f2 fcc8 	bl	8002258 <Error_Handler>
}
 800f8c8:	bf00      	nop
 800f8ca:	37a8      	adds	r7, #168	@ 0xa8
 800f8cc:	46bd      	mov	sp, r7
 800f8ce:	bd80      	pop	{r7, pc}
 800f8d0:	24001350 	.word	0x24001350
 800f8d4:	40028000 	.word	0x40028000
 800f8d8:	24040100 	.word	0x24040100
 800f8dc:	24040000 	.word	0x24040000
 800f8e0:	24001400 	.word	0x24001400
 800f8e4:	080305f8 	.word	0x080305f8
 800f8e8:	24001348 	.word	0x24001348
 800f8ec:	2400134c 	.word	0x2400134c
 800f8f0:	0802c58c 	.word	0x0802c58c
 800f8f4:	0800fa69 	.word	0x0800fa69
 800f8f8:	24000020 	.word	0x24000020
 800f8fc:	24001438 	.word	0x24001438

0800f900 <low_level_output>:
 *       to become available since the stack doesn't retry to send a packet
 *       dropped because of memory failure (except for the TCP timers).
 */

static err_t low_level_output(struct netif *netif, struct pbuf *p)
{
 800f900:	b580      	push	{r7, lr}
 800f902:	b092      	sub	sp, #72	@ 0x48
 800f904:	af00      	add	r7, sp, #0
 800f906:	6078      	str	r0, [r7, #4]
 800f908:	6039      	str	r1, [r7, #0]
  uint32_t i = 0U;
 800f90a:	2300      	movs	r3, #0
 800f90c:	647b      	str	r3, [r7, #68]	@ 0x44
  struct pbuf *q = NULL;
 800f90e:	2300      	movs	r3, #0
 800f910:	643b      	str	r3, [r7, #64]	@ 0x40
  err_t errval = ERR_OK;
 800f912:	2300      	movs	r3, #0
 800f914:	f887 303f 	strb.w	r3, [r7, #63]	@ 0x3f
  ETH_BufferTypeDef Txbuffer[ETH_TX_DESC_CNT] = {0};
 800f918:	f107 030c 	add.w	r3, r7, #12
 800f91c:	2230      	movs	r2, #48	@ 0x30
 800f91e:	2100      	movs	r1, #0
 800f920:	4618      	mov	r0, r3
 800f922:	f019 ff85 	bl	8029830 <memset>

  memset(Txbuffer, 0 , ETH_TX_DESC_CNT*sizeof(ETH_BufferTypeDef));
 800f926:	f107 030c 	add.w	r3, r7, #12
 800f92a:	2230      	movs	r2, #48	@ 0x30
 800f92c:	2100      	movs	r1, #0
 800f92e:	4618      	mov	r0, r3
 800f930:	f019 ff7e 	bl	8029830 <memset>

  for(q = p; q != NULL; q = q->next)
 800f934:	683b      	ldr	r3, [r7, #0]
 800f936:	643b      	str	r3, [r7, #64]	@ 0x40
 800f938:	e045      	b.n	800f9c6 <low_level_output+0xc6>
  {
    if(i >= ETH_TX_DESC_CNT)
 800f93a:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 800f93c:	2b03      	cmp	r3, #3
 800f93e:	d902      	bls.n	800f946 <low_level_output+0x46>
      return ERR_IF;
 800f940:	f06f 030b 	mvn.w	r3, #11
 800f944:	e06c      	b.n	800fa20 <low_level_output+0x120>

    Txbuffer[i].buffer = q->payload;
 800f946:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 800f948:	6859      	ldr	r1, [r3, #4]
 800f94a:	6c7a      	ldr	r2, [r7, #68]	@ 0x44
 800f94c:	4613      	mov	r3, r2
 800f94e:	005b      	lsls	r3, r3, #1
 800f950:	4413      	add	r3, r2
 800f952:	009b      	lsls	r3, r3, #2
 800f954:	3348      	adds	r3, #72	@ 0x48
 800f956:	443b      	add	r3, r7
 800f958:	3b3c      	subs	r3, #60	@ 0x3c
 800f95a:	6019      	str	r1, [r3, #0]
    Txbuffer[i].len = q->len;
 800f95c:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 800f95e:	895b      	ldrh	r3, [r3, #10]
 800f960:	4619      	mov	r1, r3
 800f962:	6c7a      	ldr	r2, [r7, #68]	@ 0x44
 800f964:	4613      	mov	r3, r2
 800f966:	005b      	lsls	r3, r3, #1
 800f968:	4413      	add	r3, r2
 800f96a:	009b      	lsls	r3, r3, #2
 800f96c:	3348      	adds	r3, #72	@ 0x48
 800f96e:	443b      	add	r3, r7
 800f970:	3b38      	subs	r3, #56	@ 0x38
 800f972:	6019      	str	r1, [r3, #0]

    if(i>0)
 800f974:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 800f976:	2b00      	cmp	r3, #0
 800f978:	d011      	beq.n	800f99e <low_level_output+0x9e>
    {
      Txbuffer[i-1].next = &Txbuffer[i];
 800f97a:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 800f97c:	1e5a      	subs	r2, r3, #1
 800f97e:	f107 000c 	add.w	r0, r7, #12
 800f982:	6c79      	ldr	r1, [r7, #68]	@ 0x44
 800f984:	460b      	mov	r3, r1
 800f986:	005b      	lsls	r3, r3, #1
 800f988:	440b      	add	r3, r1
 800f98a:	009b      	lsls	r3, r3, #2
 800f98c:	18c1      	adds	r1, r0, r3
 800f98e:	4613      	mov	r3, r2
 800f990:	005b      	lsls	r3, r3, #1
 800f992:	4413      	add	r3, r2
 800f994:	009b      	lsls	r3, r3, #2
 800f996:	3348      	adds	r3, #72	@ 0x48
 800f998:	443b      	add	r3, r7
 800f99a:	3b34      	subs	r3, #52	@ 0x34
 800f99c:	6019      	str	r1, [r3, #0]
    }

    if(q->next == NULL)
 800f99e:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 800f9a0:	681b      	ldr	r3, [r3, #0]
 800f9a2:	2b00      	cmp	r3, #0
 800f9a4:	d109      	bne.n	800f9ba <low_level_output+0xba>
    {
      Txbuffer[i].next = NULL;
 800f9a6:	6c7a      	ldr	r2, [r7, #68]	@ 0x44
 800f9a8:	4613      	mov	r3, r2
 800f9aa:	005b      	lsls	r3, r3, #1
 800f9ac:	4413      	add	r3, r2
 800f9ae:	009b      	lsls	r3, r3, #2
 800f9b0:	3348      	adds	r3, #72	@ 0x48
 800f9b2:	443b      	add	r3, r7
 800f9b4:	3b34      	subs	r3, #52	@ 0x34
 800f9b6:	2200      	movs	r2, #0
 800f9b8:	601a      	str	r2, [r3, #0]
    }

    i++;
 800f9ba:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 800f9bc:	3301      	adds	r3, #1
 800f9be:	647b      	str	r3, [r7, #68]	@ 0x44
  for(q = p; q != NULL; q = q->next)
 800f9c0:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 800f9c2:	681b      	ldr	r3, [r3, #0]
 800f9c4:	643b      	str	r3, [r7, #64]	@ 0x40
 800f9c6:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 800f9c8:	2b00      	cmp	r3, #0
 800f9ca:	d1b6      	bne.n	800f93a <low_level_output+0x3a>
  }

  TxConfig.Length = p->tot_len;
 800f9cc:	683b      	ldr	r3, [r7, #0]
 800f9ce:	891b      	ldrh	r3, [r3, #8]
 800f9d0:	461a      	mov	r2, r3
 800f9d2:	4b15      	ldr	r3, [pc, #84]	@ (800fa28 <low_level_output+0x128>)
 800f9d4:	605a      	str	r2, [r3, #4]
  TxConfig.TxBuffer = Txbuffer;
 800f9d6:	4a14      	ldr	r2, [pc, #80]	@ (800fa28 <low_level_output+0x128>)
 800f9d8:	f107 030c 	add.w	r3, r7, #12
 800f9dc:	6093      	str	r3, [r2, #8]
  TxConfig.pData = p;
 800f9de:	4a12      	ldr	r2, [pc, #72]	@ (800fa28 <low_level_output+0x128>)
 800f9e0:	683b      	ldr	r3, [r7, #0]
 800f9e2:	6353      	str	r3, [r2, #52]	@ 0x34

  pbuf_ref(p);
 800f9e4:	6838      	ldr	r0, [r7, #0]
 800f9e6:	f00a fbbf 	bl	801a168 <pbuf_ref>
#if 1
  if (HAL_ETH_Transmit_IT(&heth, &TxConfig) == HAL_OK) {
 800f9ea:	490f      	ldr	r1, [pc, #60]	@ (800fa28 <low_level_output+0x128>)
 800f9ec:	480f      	ldr	r0, [pc, #60]	@ (800fa2c <low_level_output+0x12c>)
 800f9ee:	f7f8 f88d 	bl	8007b0c <HAL_ETH_Transmit_IT>
 800f9f2:	4603      	mov	r3, r0
 800f9f4:	2b00      	cmp	r3, #0
 800f9f6:	d10e      	bne.n	800fa16 <low_level_output+0x116>
    while(osSemaphoreAcquire(TxPktSemaphore, TIME_WAITING_FOR_INPUT)!=osOK)
 800f9f8:	bf00      	nop
 800f9fa:	4b0d      	ldr	r3, [pc, #52]	@ (800fa30 <low_level_output+0x130>)
 800f9fc:	681b      	ldr	r3, [r3, #0]
 800f9fe:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 800fa02:	4618      	mov	r0, r3
 800fa04:	f000 ff10 	bl	8010828 <osSemaphoreAcquire>
 800fa08:	4603      	mov	r3, r0
 800fa0a:	2b00      	cmp	r3, #0
 800fa0c:	d1f5      	bne.n	800f9fa <low_level_output+0xfa>
    {
    }
//	osSemaphoreAcquire(TxPktSemaphore, pdMS_TO_TICKS(1000));
    HAL_ETH_ReleaseTxPacket(&heth);
 800fa0e:	4807      	ldr	r0, [pc, #28]	@ (800fa2c <low_level_output+0x12c>)
 800fa10:	f7f8 fa03 	bl	8007e1a <HAL_ETH_ReleaseTxPacket>
 800fa14:	e002      	b.n	800fa1c <low_level_output+0x11c>
  } else {
    pbuf_free(p);
 800fa16:	6838      	ldr	r0, [r7, #0]
 800fa18:	f00a fb00 	bl	801a01c <pbuf_free>
  HAL_ETH_Transmit_IT(&heth, &TxConfig);
  osSemaphoreAcquire(TxPktSemaphore, pdMS_TO_TICKS(100));
  HAL_ETH_ReleaseTxPacket(&heth);
#endif

  return errval;
 800fa1c:	f997 303f 	ldrsb.w	r3, [r7, #63]	@ 0x3f
}
 800fa20:	4618      	mov	r0, r3
 800fa22:	3748      	adds	r7, #72	@ 0x48
 800fa24:	46bd      	mov	sp, r7
 800fa26:	bd80      	pop	{r7, pc}
 800fa28:	24001400 	.word	0x24001400
 800fa2c:	24001350 	.word	0x24001350
 800fa30:	2400134c 	.word	0x2400134c

0800fa34 <low_level_input>:
 * @param netif the lwip network interface structure for this ethernetif
 * @return a pbuf filled with the received packet (including MAC header)
 *         NULL on memory error
   */
static struct pbuf * low_level_input(struct netif *netif)
{
 800fa34:	b580      	push	{r7, lr}
 800fa36:	b084      	sub	sp, #16
 800fa38:	af00      	add	r7, sp, #0
 800fa3a:	6078      	str	r0, [r7, #4]
  struct pbuf *p = NULL;
 800fa3c:	2300      	movs	r3, #0
 800fa3e:	60fb      	str	r3, [r7, #12]

  if(RxAllocStatus == RX_ALLOC_OK)
 800fa40:	4b07      	ldr	r3, [pc, #28]	@ (800fa60 <low_level_input+0x2c>)
 800fa42:	781b      	ldrb	r3, [r3, #0]
 800fa44:	2b00      	cmp	r3, #0
 800fa46:	d105      	bne.n	800fa54 <low_level_input+0x20>
  {
    HAL_ETH_ReadData(&heth, (void **)&p);
 800fa48:	f107 030c 	add.w	r3, r7, #12
 800fa4c:	4619      	mov	r1, r3
 800fa4e:	4805      	ldr	r0, [pc, #20]	@ (800fa64 <low_level_input+0x30>)
 800fa50:	f7f8 f8ad 	bl	8007bae <HAL_ETH_ReadData>
  }

  return p;
 800fa54:	68fb      	ldr	r3, [r7, #12]
}
 800fa56:	4618      	mov	r0, r3
 800fa58:	3710      	adds	r7, #16
 800fa5a:	46bd      	mov	sp, r7
 800fa5c:	bd80      	pop	{r7, pc}
 800fa5e:	bf00      	nop
 800fa60:	24001344 	.word	0x24001344
 800fa64:	24001350 	.word	0x24001350

0800fa68 <ethernetif_input>:
 * the appropriate input function is called.
 *
 * @param netif the lwip network interface structure for this ethernetif
 */
void ethernetif_input(void* argument)
{
 800fa68:	b580      	push	{r7, lr}
 800fa6a:	b084      	sub	sp, #16
 800fa6c:	af00      	add	r7, sp, #0
 800fa6e:	6078      	str	r0, [r7, #4]
  struct pbuf *p = NULL;
 800fa70:	2300      	movs	r3, #0
 800fa72:	60fb      	str	r3, [r7, #12]
  struct netif *netif = (struct netif *) argument;
 800fa74:	687b      	ldr	r3, [r7, #4]
 800fa76:	60bb      	str	r3, [r7, #8]

  for( ;; )
  {
    if (osSemaphoreAcquire(RxPktSemaphore, TIME_WAITING_FOR_INPUT) == osOK)
 800fa78:	4b0f      	ldr	r3, [pc, #60]	@ (800fab8 <ethernetif_input+0x50>)
 800fa7a:	681b      	ldr	r3, [r3, #0]
 800fa7c:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 800fa80:	4618      	mov	r0, r3
 800fa82:	f000 fed1 	bl	8010828 <osSemaphoreAcquire>
 800fa86:	4603      	mov	r3, r0
 800fa88:	2b00      	cmp	r3, #0
 800fa8a:	d1f5      	bne.n	800fa78 <ethernetif_input+0x10>
    {
      do
      {
        p = low_level_input( netif );
 800fa8c:	68b8      	ldr	r0, [r7, #8]
 800fa8e:	f7ff ffd1 	bl	800fa34 <low_level_input>
 800fa92:	60f8      	str	r0, [r7, #12]
        if (p != NULL)
 800fa94:	68fb      	ldr	r3, [r7, #12]
 800fa96:	2b00      	cmp	r3, #0
 800fa98:	d00a      	beq.n	800fab0 <ethernetif_input+0x48>
        {
          if (netif->input( p, netif) != ERR_OK )
 800fa9a:	68bb      	ldr	r3, [r7, #8]
 800fa9c:	691b      	ldr	r3, [r3, #16]
 800fa9e:	68b9      	ldr	r1, [r7, #8]
 800faa0:	68f8      	ldr	r0, [r7, #12]
 800faa2:	4798      	blx	r3
 800faa4:	4603      	mov	r3, r0
 800faa6:	2b00      	cmp	r3, #0
 800faa8:	d002      	beq.n	800fab0 <ethernetif_input+0x48>
          {
            pbuf_free(p);
 800faaa:	68f8      	ldr	r0, [r7, #12]
 800faac:	f00a fab6 	bl	801a01c <pbuf_free>
          }
        }
      } while(p!=NULL);
 800fab0:	68fb      	ldr	r3, [r7, #12]
 800fab2:	2b00      	cmp	r3, #0
 800fab4:	d1ea      	bne.n	800fa8c <ethernetif_input+0x24>
    if (osSemaphoreAcquire(RxPktSemaphore, TIME_WAITING_FOR_INPUT) == osOK)
 800fab6:	e7df      	b.n	800fa78 <ethernetif_input+0x10>
 800fab8:	24001348 	.word	0x24001348

0800fabc <ethernetif_init>:
 * @return ERR_OK if the loopif is initialized
 *         ERR_MEM if private data couldn't be allocated
 *         any other err_t on error
 */
err_t ethernetif_init(struct netif *netif)
{
 800fabc:	b580      	push	{r7, lr}
 800fabe:	b082      	sub	sp, #8
 800fac0:	af00      	add	r7, sp, #0
 800fac2:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT("netif != NULL", (netif != NULL));
 800fac4:	687b      	ldr	r3, [r7, #4]
 800fac6:	2b00      	cmp	r3, #0
 800fac8:	d106      	bne.n	800fad8 <ethernetif_init+0x1c>
 800faca:	4b0e      	ldr	r3, [pc, #56]	@ (800fb04 <ethernetif_init+0x48>)
 800facc:	f240 2235 	movw	r2, #565	@ 0x235
 800fad0:	490d      	ldr	r1, [pc, #52]	@ (800fb08 <ethernetif_init+0x4c>)
 800fad2:	480e      	ldr	r0, [pc, #56]	@ (800fb0c <ethernetif_init+0x50>)
 800fad4:	f019 fd1a 	bl	802950c <iprintf>
   * The last argument should be replaced with your link speed, in units
   * of bits per second.
   */
  // MIB2_INIT_NETIF(netif, snmp_ifType_ethernet_csmacd, LINK_SPEED_OF_YOUR_NETIF_IN_BPS);

  netif->name[0] = IFNAME0;
 800fad8:	687b      	ldr	r3, [r7, #4]
 800fada:	2273      	movs	r2, #115	@ 0x73
 800fadc:	f883 2032 	strb.w	r2, [r3, #50]	@ 0x32
  netif->name[1] = IFNAME1;
 800fae0:	687b      	ldr	r3, [r7, #4]
 800fae2:	2274      	movs	r2, #116	@ 0x74
 800fae4:	f883 2033 	strb.w	r2, [r3, #51]	@ 0x33
   * is available...) */

#if LWIP_IPV4
#if LWIP_ARP || LWIP_ETHERNET
#if LWIP_ARP
  netif->output = etharp_output;
 800fae8:	687b      	ldr	r3, [r7, #4]
 800faea:	4a09      	ldr	r2, [pc, #36]	@ (800fb10 <ethernetif_init+0x54>)
 800faec:	615a      	str	r2, [r3, #20]

#if LWIP_IPV6
  netif->output_ip6 = ethip6_output;
#endif /* LWIP_IPV6 */

  netif->linkoutput = low_level_output;
 800faee:	687b      	ldr	r3, [r7, #4]
 800faf0:	4a08      	ldr	r2, [pc, #32]	@ (800fb14 <ethernetif_init+0x58>)
 800faf2:	619a      	str	r2, [r3, #24]

  /* initialize the hardware */
  low_level_init(netif);
 800faf4:	6878      	ldr	r0, [r7, #4]
 800faf6:	f7ff fdc9 	bl	800f68c <low_level_init>

  return ERR_OK;
 800fafa:	2300      	movs	r3, #0
}
 800fafc:	4618      	mov	r0, r3
 800fafe:	3708      	adds	r7, #8
 800fb00:	46bd      	mov	sp, r7
 800fb02:	bd80      	pop	{r7, pc}
 800fb04:	0802c594 	.word	0x0802c594
 800fb08:	0802c5b0 	.word	0x0802c5b0
 800fb0c:	0802c5c0 	.word	0x0802c5c0
 800fb10:	08023b7d 	.word	0x08023b7d
 800fb14:	0800f901 	.word	0x0800f901

0800fb18 <pbuf_free_custom>:
  * @brief  Custom Rx pbuf free callback
  * @param  pbuf: pbuf to be freed
  * @retval None
  */
void pbuf_free_custom(struct pbuf *p)
{
 800fb18:	b580      	push	{r7, lr}
 800fb1a:	b084      	sub	sp, #16
 800fb1c:	af00      	add	r7, sp, #0
 800fb1e:	6078      	str	r0, [r7, #4]
  struct pbuf_custom* custom_pbuf = (struct pbuf_custom*)p;
 800fb20:	687b      	ldr	r3, [r7, #4]
 800fb22:	60fb      	str	r3, [r7, #12]
  LWIP_MEMPOOL_FREE(RX_POOL, custom_pbuf);
 800fb24:	68f9      	ldr	r1, [r7, #12]
 800fb26:	4809      	ldr	r0, [pc, #36]	@ (800fb4c <pbuf_free_custom+0x34>)
 800fb28:	f009 fb66 	bl	80191f8 <memp_free_pool>

  /* If the Rx Buffer Pool was exhausted, signal the ethernetif_input task to
   * call HAL_ETH_GetRxDataBuffer to rebuild the Rx descriptors. */

  if (RxAllocStatus == RX_ALLOC_ERROR)
 800fb2c:	4b08      	ldr	r3, [pc, #32]	@ (800fb50 <pbuf_free_custom+0x38>)
 800fb2e:	781b      	ldrb	r3, [r3, #0]
 800fb30:	2b01      	cmp	r3, #1
 800fb32:	d107      	bne.n	800fb44 <pbuf_free_custom+0x2c>
  {
    RxAllocStatus = RX_ALLOC_OK;
 800fb34:	4b06      	ldr	r3, [pc, #24]	@ (800fb50 <pbuf_free_custom+0x38>)
 800fb36:	2200      	movs	r2, #0
 800fb38:	701a      	strb	r2, [r3, #0]
    osSemaphoreRelease(RxPktSemaphore);
 800fb3a:	4b06      	ldr	r3, [pc, #24]	@ (800fb54 <pbuf_free_custom+0x3c>)
 800fb3c:	681b      	ldr	r3, [r3, #0]
 800fb3e:	4618      	mov	r0, r3
 800fb40:	f000 fec4 	bl	80108cc <osSemaphoreRelease>
  }
}
 800fb44:	bf00      	nop
 800fb46:	3710      	adds	r7, #16
 800fb48:	46bd      	mov	sp, r7
 800fb4a:	bd80      	pop	{r7, pc}
 800fb4c:	080305f8 	.word	0x080305f8
 800fb50:	24001344 	.word	0x24001344
 800fb54:	24001348 	.word	0x24001348

0800fb58 <sys_now>:
*         when LWIP_TIMERS == 1 and NO_SYS == 1
* @param  None
* @retval Current Time value
*/
u32_t sys_now(void)
{
 800fb58:	b580      	push	{r7, lr}
 800fb5a:	af00      	add	r7, sp, #0
  return HAL_GetTick();
 800fb5c:	f7f5 f818 	bl	8004b90 <HAL_GetTick>
 800fb60:	4603      	mov	r3, r0
}
 800fb62:	4618      	mov	r0, r3
 800fb64:	bd80      	pop	{r7, pc}
	...

0800fb68 <HAL_ETH_MspInit>:
  * @param  ethHandle: ETH handle
  * @retval None
  */

void HAL_ETH_MspInit(ETH_HandleTypeDef* ethHandle)
{
 800fb68:	b580      	push	{r7, lr}
 800fb6a:	b08e      	sub	sp, #56	@ 0x38
 800fb6c:	af00      	add	r7, sp, #0
 800fb6e:	6078      	str	r0, [r7, #4]
  GPIO_InitTypeDef GPIO_InitStruct = {0};
 800fb70:	f107 0324 	add.w	r3, r7, #36	@ 0x24
 800fb74:	2200      	movs	r2, #0
 800fb76:	601a      	str	r2, [r3, #0]
 800fb78:	605a      	str	r2, [r3, #4]
 800fb7a:	609a      	str	r2, [r3, #8]
 800fb7c:	60da      	str	r2, [r3, #12]
 800fb7e:	611a      	str	r2, [r3, #16]
  if(ethHandle->Instance==ETH)
 800fb80:	687b      	ldr	r3, [r7, #4]
 800fb82:	681b      	ldr	r3, [r3, #0]
 800fb84:	4a4d      	ldr	r2, [pc, #308]	@ (800fcbc <HAL_ETH_MspInit+0x154>)
 800fb86:	4293      	cmp	r3, r2
 800fb88:	f040 8093 	bne.w	800fcb2 <HAL_ETH_MspInit+0x14a>
  {
  /* USER CODE BEGIN ETH_MspInit 0 */

  /* USER CODE END ETH_MspInit 0 */
    /* Enable Peripheral clock */
    __HAL_RCC_ETH1MAC_CLK_ENABLE();
 800fb8c:	4b4c      	ldr	r3, [pc, #304]	@ (800fcc0 <HAL_ETH_MspInit+0x158>)
 800fb8e:	f8d3 30d8 	ldr.w	r3, [r3, #216]	@ 0xd8
 800fb92:	4a4b      	ldr	r2, [pc, #300]	@ (800fcc0 <HAL_ETH_MspInit+0x158>)
 800fb94:	f443 4300 	orr.w	r3, r3, #32768	@ 0x8000
 800fb98:	f8c2 30d8 	str.w	r3, [r2, #216]	@ 0xd8
 800fb9c:	4b48      	ldr	r3, [pc, #288]	@ (800fcc0 <HAL_ETH_MspInit+0x158>)
 800fb9e:	f8d3 30d8 	ldr.w	r3, [r3, #216]	@ 0xd8
 800fba2:	f403 4300 	and.w	r3, r3, #32768	@ 0x8000
 800fba6:	623b      	str	r3, [r7, #32]
 800fba8:	6a3b      	ldr	r3, [r7, #32]
    __HAL_RCC_ETH1TX_CLK_ENABLE();
 800fbaa:	4b45      	ldr	r3, [pc, #276]	@ (800fcc0 <HAL_ETH_MspInit+0x158>)
 800fbac:	f8d3 30d8 	ldr.w	r3, [r3, #216]	@ 0xd8
 800fbb0:	4a43      	ldr	r2, [pc, #268]	@ (800fcc0 <HAL_ETH_MspInit+0x158>)
 800fbb2:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
 800fbb6:	f8c2 30d8 	str.w	r3, [r2, #216]	@ 0xd8
 800fbba:	4b41      	ldr	r3, [pc, #260]	@ (800fcc0 <HAL_ETH_MspInit+0x158>)
 800fbbc:	f8d3 30d8 	ldr.w	r3, [r3, #216]	@ 0xd8
 800fbc0:	f403 3380 	and.w	r3, r3, #65536	@ 0x10000
 800fbc4:	61fb      	str	r3, [r7, #28]
 800fbc6:	69fb      	ldr	r3, [r7, #28]
    __HAL_RCC_ETH1RX_CLK_ENABLE();
 800fbc8:	4b3d      	ldr	r3, [pc, #244]	@ (800fcc0 <HAL_ETH_MspInit+0x158>)
 800fbca:	f8d3 30d8 	ldr.w	r3, [r3, #216]	@ 0xd8
 800fbce:	4a3c      	ldr	r2, [pc, #240]	@ (800fcc0 <HAL_ETH_MspInit+0x158>)
 800fbd0:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800fbd4:	f8c2 30d8 	str.w	r3, [r2, #216]	@ 0xd8
 800fbd8:	4b39      	ldr	r3, [pc, #228]	@ (800fcc0 <HAL_ETH_MspInit+0x158>)
 800fbda:	f8d3 30d8 	ldr.w	r3, [r3, #216]	@ 0xd8
 800fbde:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
 800fbe2:	61bb      	str	r3, [r7, #24]
 800fbe4:	69bb      	ldr	r3, [r7, #24]

    __HAL_RCC_GPIOC_CLK_ENABLE();
 800fbe6:	4b36      	ldr	r3, [pc, #216]	@ (800fcc0 <HAL_ETH_MspInit+0x158>)
 800fbe8:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 800fbec:	4a34      	ldr	r2, [pc, #208]	@ (800fcc0 <HAL_ETH_MspInit+0x158>)
 800fbee:	f043 0304 	orr.w	r3, r3, #4
 800fbf2:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 800fbf6:	4b32      	ldr	r3, [pc, #200]	@ (800fcc0 <HAL_ETH_MspInit+0x158>)
 800fbf8:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 800fbfc:	f003 0304 	and.w	r3, r3, #4
 800fc00:	617b      	str	r3, [r7, #20]
 800fc02:	697b      	ldr	r3, [r7, #20]
    __HAL_RCC_GPIOA_CLK_ENABLE();
 800fc04:	4b2e      	ldr	r3, [pc, #184]	@ (800fcc0 <HAL_ETH_MspInit+0x158>)
 800fc06:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 800fc0a:	4a2d      	ldr	r2, [pc, #180]	@ (800fcc0 <HAL_ETH_MspInit+0x158>)
 800fc0c:	f043 0301 	orr.w	r3, r3, #1
 800fc10:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 800fc14:	4b2a      	ldr	r3, [pc, #168]	@ (800fcc0 <HAL_ETH_MspInit+0x158>)
 800fc16:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 800fc1a:	f003 0301 	and.w	r3, r3, #1
 800fc1e:	613b      	str	r3, [r7, #16]
 800fc20:	693b      	ldr	r3, [r7, #16]
    __HAL_RCC_GPIOB_CLK_ENABLE();
 800fc22:	4b27      	ldr	r3, [pc, #156]	@ (800fcc0 <HAL_ETH_MspInit+0x158>)
 800fc24:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 800fc28:	4a25      	ldr	r2, [pc, #148]	@ (800fcc0 <HAL_ETH_MspInit+0x158>)
 800fc2a:	f043 0302 	orr.w	r3, r3, #2
 800fc2e:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 800fc32:	4b23      	ldr	r3, [pc, #140]	@ (800fcc0 <HAL_ETH_MspInit+0x158>)
 800fc34:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 800fc38:	f003 0302 	and.w	r3, r3, #2
 800fc3c:	60fb      	str	r3, [r7, #12]
 800fc3e:	68fb      	ldr	r3, [r7, #12]
    PB11     ------> ETH_TX_EN
    PB12     ------> ETH_TXD0
    PB13     ------> ETH_TXD1
    PB8     ------> ETH_TXD3
    */
    GPIO_InitStruct.Pin = GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3|GPIO_PIN_4
 800fc40:	233e      	movs	r3, #62	@ 0x3e
 800fc42:	627b      	str	r3, [r7, #36]	@ 0x24
                          |GPIO_PIN_5;
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 800fc44:	2302      	movs	r3, #2
 800fc46:	62bb      	str	r3, [r7, #40]	@ 0x28
    GPIO_InitStruct.Pull = GPIO_NOPULL;
 800fc48:	2300      	movs	r3, #0
 800fc4a:	62fb      	str	r3, [r7, #44]	@ 0x2c
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
 800fc4c:	2303      	movs	r3, #3
 800fc4e:	633b      	str	r3, [r7, #48]	@ 0x30
    GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
 800fc50:	230b      	movs	r3, #11
 800fc52:	637b      	str	r3, [r7, #52]	@ 0x34
    HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
 800fc54:	f107 0324 	add.w	r3, r7, #36	@ 0x24
 800fc58:	4619      	mov	r1, r3
 800fc5a:	481a      	ldr	r0, [pc, #104]	@ (800fcc4 <HAL_ETH_MspInit+0x15c>)
 800fc5c:	f7f9 fac8 	bl	80091f0 <HAL_GPIO_Init>

    GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3
 800fc60:	238f      	movs	r3, #143	@ 0x8f
 800fc62:	627b      	str	r3, [r7, #36]	@ 0x24
                          |GPIO_PIN_7;
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 800fc64:	2302      	movs	r3, #2
 800fc66:	62bb      	str	r3, [r7, #40]	@ 0x28
    GPIO_InitStruct.Pull = GPIO_NOPULL;
 800fc68:	2300      	movs	r3, #0
 800fc6a:	62fb      	str	r3, [r7, #44]	@ 0x2c
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
 800fc6c:	2303      	movs	r3, #3
 800fc6e:	633b      	str	r3, [r7, #48]	@ 0x30
    GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
 800fc70:	230b      	movs	r3, #11
 800fc72:	637b      	str	r3, [r7, #52]	@ 0x34
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 800fc74:	f107 0324 	add.w	r3, r7, #36	@ 0x24
 800fc78:	4619      	mov	r1, r3
 800fc7a:	4813      	ldr	r0, [pc, #76]	@ (800fcc8 <HAL_ETH_MspInit+0x160>)
 800fc7c:	f7f9 fab8 	bl	80091f0 <HAL_GPIO_Init>

    GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_11|GPIO_PIN_12
 800fc80:	f643 1303 	movw	r3, #14595	@ 0x3903
 800fc84:	627b      	str	r3, [r7, #36]	@ 0x24
                          |GPIO_PIN_13|GPIO_PIN_8;
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 800fc86:	2302      	movs	r3, #2
 800fc88:	62bb      	str	r3, [r7, #40]	@ 0x28
    GPIO_InitStruct.Pull = GPIO_NOPULL;
 800fc8a:	2300      	movs	r3, #0
 800fc8c:	62fb      	str	r3, [r7, #44]	@ 0x2c
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
 800fc8e:	2303      	movs	r3, #3
 800fc90:	633b      	str	r3, [r7, #48]	@ 0x30
    GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
 800fc92:	230b      	movs	r3, #11
 800fc94:	637b      	str	r3, [r7, #52]	@ 0x34
    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 800fc96:	f107 0324 	add.w	r3, r7, #36	@ 0x24
 800fc9a:	4619      	mov	r1, r3
 800fc9c:	480b      	ldr	r0, [pc, #44]	@ (800fccc <HAL_ETH_MspInit+0x164>)
 800fc9e:	f7f9 faa7 	bl	80091f0 <HAL_GPIO_Init>

    /* Peripheral interrupt init */
    HAL_NVIC_SetPriority(ETH_IRQn, 5, 0);
 800fca2:	2200      	movs	r2, #0
 800fca4:	2105      	movs	r1, #5
 800fca6:	203d      	movs	r0, #61	@ 0x3d
 800fca8:	f7f5 f87a 	bl	8004da0 <HAL_NVIC_SetPriority>
    HAL_NVIC_EnableIRQ(ETH_IRQn);
 800fcac:	203d      	movs	r0, #61	@ 0x3d
 800fcae:	f7f5 f891 	bl	8004dd4 <HAL_NVIC_EnableIRQ>
  /* USER CODE BEGIN ETH_MspInit 1 */

  /* USER CODE END ETH_MspInit 1 */
  }
}
 800fcb2:	bf00      	nop
 800fcb4:	3738      	adds	r7, #56	@ 0x38
 800fcb6:	46bd      	mov	sp, r7
 800fcb8:	bd80      	pop	{r7, pc}
 800fcba:	bf00      	nop
 800fcbc:	40028000 	.word	0x40028000
 800fcc0:	58024400 	.word	0x58024400
 800fcc4:	58020800 	.word	0x58020800
 800fcc8:	58020000 	.word	0x58020000
 800fccc:	58020400 	.word	0x58020400

0800fcd0 <ETH_PHY_IO_Init>:
  * @brief  Initializes the MDIO interface GPIO and clocks.
  * @param  None
  * @retval 0 if OK, -1 if ERROR
  */
int32_t ETH_PHY_IO_Init(void)
{
 800fcd0:	b580      	push	{r7, lr}
 800fcd2:	af00      	add	r7, sp, #0
  /* We assume that MDIO GPIO configuration is already done
     in the ETH_MspInit() else it should be done here
  */

  /* Configure the MDIO Clock */
  HAL_ETH_SetMDIOClockRange(&heth);
 800fcd4:	4802      	ldr	r0, [pc, #8]	@ (800fce0 <ETH_PHY_IO_Init+0x10>)
 800fcd6:	f7f8 fcab 	bl	8008630 <HAL_ETH_SetMDIOClockRange>

  return 0;
 800fcda:	2300      	movs	r3, #0
}
 800fcdc:	4618      	mov	r0, r3
 800fcde:	bd80      	pop	{r7, pc}
 800fce0:	24001350 	.word	0x24001350

0800fce4 <ETH_PHY_IO_DeInit>:
  * @brief  De-Initializes the MDIO interface .
  * @param  None
  * @retval 0 if OK, -1 if ERROR
  */
int32_t ETH_PHY_IO_DeInit (void)
{
 800fce4:	b480      	push	{r7}
 800fce6:	af00      	add	r7, sp, #0
  return 0;
 800fce8:	2300      	movs	r3, #0
}
 800fcea:	4618      	mov	r0, r3
 800fcec:	46bd      	mov	sp, r7
 800fcee:	f85d 7b04 	ldr.w	r7, [sp], #4
 800fcf2:	4770      	bx	lr

0800fcf4 <ETH_PHY_IO_ReadReg>:
  * @param  RegAddr: PHY register address
  * @param  pRegVal: pointer to hold the register value
  * @retval 0 if OK -1 if Error
  */
int32_t ETH_PHY_IO_ReadReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t *pRegVal)
{
 800fcf4:	b580      	push	{r7, lr}
 800fcf6:	b084      	sub	sp, #16
 800fcf8:	af00      	add	r7, sp, #0
 800fcfa:	60f8      	str	r0, [r7, #12]
 800fcfc:	60b9      	str	r1, [r7, #8]
 800fcfe:	607a      	str	r2, [r7, #4]
  if(HAL_ETH_ReadPHYRegister(&heth, DevAddr, RegAddr, pRegVal) != HAL_OK)
 800fd00:	687b      	ldr	r3, [r7, #4]
 800fd02:	68ba      	ldr	r2, [r7, #8]
 800fd04:	68f9      	ldr	r1, [r7, #12]
 800fd06:	4807      	ldr	r0, [pc, #28]	@ (800fd24 <ETH_PHY_IO_ReadReg+0x30>)
 800fd08:	f7f8 f9fc 	bl	8008104 <HAL_ETH_ReadPHYRegister>
 800fd0c:	4603      	mov	r3, r0
 800fd0e:	2b00      	cmp	r3, #0
 800fd10:	d002      	beq.n	800fd18 <ETH_PHY_IO_ReadReg+0x24>
  {
    return -1;
 800fd12:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 800fd16:	e000      	b.n	800fd1a <ETH_PHY_IO_ReadReg+0x26>
  }

  return 0;
 800fd18:	2300      	movs	r3, #0
}
 800fd1a:	4618      	mov	r0, r3
 800fd1c:	3710      	adds	r7, #16
 800fd1e:	46bd      	mov	sp, r7
 800fd20:	bd80      	pop	{r7, pc}
 800fd22:	bf00      	nop
 800fd24:	24001350 	.word	0x24001350

0800fd28 <ETH_PHY_IO_WriteReg>:
  * @param  RegAddr: PHY register address
  * @param  RegVal: Value to be written
  * @retval 0 if OK -1 if Error
  */
int32_t ETH_PHY_IO_WriteReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t RegVal)
{
 800fd28:	b580      	push	{r7, lr}
 800fd2a:	b084      	sub	sp, #16
 800fd2c:	af00      	add	r7, sp, #0
 800fd2e:	60f8      	str	r0, [r7, #12]
 800fd30:	60b9      	str	r1, [r7, #8]
 800fd32:	607a      	str	r2, [r7, #4]
  if(HAL_ETH_WritePHYRegister(&heth, DevAddr, RegAddr, RegVal) != HAL_OK)
 800fd34:	687b      	ldr	r3, [r7, #4]
 800fd36:	68ba      	ldr	r2, [r7, #8]
 800fd38:	68f9      	ldr	r1, [r7, #12]
 800fd3a:	4807      	ldr	r0, [pc, #28]	@ (800fd58 <ETH_PHY_IO_WriteReg+0x30>)
 800fd3c:	f7f8 fa36 	bl	80081ac <HAL_ETH_WritePHYRegister>
 800fd40:	4603      	mov	r3, r0
 800fd42:	2b00      	cmp	r3, #0
 800fd44:	d002      	beq.n	800fd4c <ETH_PHY_IO_WriteReg+0x24>
  {
    return -1;
 800fd46:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 800fd4a:	e000      	b.n	800fd4e <ETH_PHY_IO_WriteReg+0x26>
  }

  return 0;
 800fd4c:	2300      	movs	r3, #0
}
 800fd4e:	4618      	mov	r0, r3
 800fd50:	3710      	adds	r7, #16
 800fd52:	46bd      	mov	sp, r7
 800fd54:	bd80      	pop	{r7, pc}
 800fd56:	bf00      	nop
 800fd58:	24001350 	.word	0x24001350

0800fd5c <ETH_PHY_IO_GetTick>:
/**
  * @brief  Get the time in millisecons used for internal PHY driver process.
  * @retval Time value
  */
int32_t ETH_PHY_IO_GetTick(void)
{
 800fd5c:	b580      	push	{r7, lr}
 800fd5e:	af00      	add	r7, sp, #0
  return HAL_GetTick();
 800fd60:	f7f4 ff16 	bl	8004b90 <HAL_GetTick>
 800fd64:	4603      	mov	r3, r0
}
 800fd66:	4618      	mov	r0, r3
 800fd68:	bd80      	pop	{r7, pc}
	...

0800fd6c <ethernet_link_thread>:
/**
  * @brief  Check the ETH link state then update ETH driver and netif link accordingly.
  * @retval None
  */
void ethernet_link_thread(void* argument)
{
 800fd6c:	b580      	push	{r7, lr}
 800fd6e:	b0a2      	sub	sp, #136	@ 0x88
 800fd70:	af00      	add	r7, sp, #0
 800fd72:	6078      	str	r0, [r7, #4]
  ETH_MACConfigTypeDef MACConf = {0};
 800fd74:	f107 0310 	add.w	r3, r7, #16
 800fd78:	2264      	movs	r2, #100	@ 0x64
 800fd7a:	2100      	movs	r1, #0
 800fd7c:	4618      	mov	r0, r3
 800fd7e:	f019 fd57 	bl	8029830 <memset>
  int32_t PHYLinkState = 0;
 800fd82:	2300      	movs	r3, #0
 800fd84:	67bb      	str	r3, [r7, #120]	@ 0x78
  uint32_t linkchanged = 0U, speed = 0U, duplex = 0U;
 800fd86:	2300      	movs	r3, #0
 800fd88:	f8c7 3084 	str.w	r3, [r7, #132]	@ 0x84
 800fd8c:	2300      	movs	r3, #0
 800fd8e:	f8c7 3080 	str.w	r3, [r7, #128]	@ 0x80
 800fd92:	2300      	movs	r3, #0
 800fd94:	67fb      	str	r3, [r7, #124]	@ 0x7c

  struct netif *netif = (struct netif *) argument;
 800fd96:	687b      	ldr	r3, [r7, #4]
 800fd98:	677b      	str	r3, [r7, #116]	@ 0x74
/* USER CODE BEGIN ETH link init */

#if USE_DHCP
  enum dhcp_states DHCP_state = DHCP_START;
 800fd9a:	2301      	movs	r3, #1
 800fd9c:	73fb      	strb	r3, [r7, #15]
//  LOCK_TCPIP_CORE();
/* USER CODE END ETH link init */

  for(;;)
  {
  PHYLinkState = DP83848_GetLinkState(&DP83848);
 800fd9e:	484a      	ldr	r0, [pc, #296]	@ (800fec8 <ethernet_link_thread+0x15c>)
 800fda0:	f7f4 fe1e 	bl	80049e0 <DP83848_GetLinkState>
 800fda4:	67b8      	str	r0, [r7, #120]	@ 0x78

  if(netif_is_link_up(netif) && (PHYLinkState <= DP83848_STATUS_LINK_DOWN))
 800fda6:	6f7b      	ldr	r3, [r7, #116]	@ 0x74
 800fda8:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 800fdac:	089b      	lsrs	r3, r3, #2
 800fdae:	f003 0301 	and.w	r3, r3, #1
 800fdb2:	b2db      	uxtb	r3, r3
 800fdb4:	2b00      	cmp	r3, #0
 800fdb6:	d013      	beq.n	800fde0 <ethernet_link_thread+0x74>
 800fdb8:	6fbb      	ldr	r3, [r7, #120]	@ 0x78
 800fdba:	2b01      	cmp	r3, #1
 800fdbc:	dc10      	bgt.n	800fde0 <ethernet_link_thread+0x74>
  {
    HAL_ETH_Stop_IT(&heth);
 800fdbe:	4843      	ldr	r0, [pc, #268]	@ (800fecc <ethernet_link_thread+0x160>)
 800fdc0:	f7f7 fe2c 	bl	8007a1c <HAL_ETH_Stop_IT>
    LOCK_TCPIP_CORE();
 800fdc4:	f000 f936 	bl	8010034 <sys_lock_tcpip_core>
    netif_set_down(netif);
 800fdc8:	6f78      	ldr	r0, [r7, #116]	@ 0x74
 800fdca:	f009 fca7 	bl	801971c <netif_set_down>
    netif_set_link_down(netif);
 800fdce:	6f78      	ldr	r0, [r7, #116]	@ 0x74
 800fdd0:	f009 fd12 	bl	80197f8 <netif_set_link_down>
    UNLOCK_TCPIP_CORE();
 800fdd4:	f000 f93e 	bl	8010054 <sys_unlock_tcpip_core>
    printf("Link down...\r\n");
 800fdd8:	483d      	ldr	r0, [pc, #244]	@ (800fed0 <ethernet_link_thread+0x164>)
 800fdda:	f019 fbff 	bl	80295dc <puts>
 800fdde:	e067      	b.n	800feb0 <ethernet_link_thread+0x144>
  }
  else if(!netif_is_link_up(netif) && (PHYLinkState > DP83848_STATUS_LINK_DOWN))
 800fde0:	6f7b      	ldr	r3, [r7, #116]	@ 0x74
 800fde2:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 800fde6:	f003 0304 	and.w	r3, r3, #4
 800fdea:	2b00      	cmp	r3, #0
 800fdec:	d160      	bne.n	800feb0 <ethernet_link_thread+0x144>
 800fdee:	6fbb      	ldr	r3, [r7, #120]	@ 0x78
 800fdf0:	2b01      	cmp	r3, #1
 800fdf2:	dd5d      	ble.n	800feb0 <ethernet_link_thread+0x144>
  {
    switch (PHYLinkState)
 800fdf4:	6fbb      	ldr	r3, [r7, #120]	@ 0x78
 800fdf6:	3b02      	subs	r3, #2
 800fdf8:	2b03      	cmp	r3, #3
 800fdfa:	d833      	bhi.n	800fe64 <ethernet_link_thread+0xf8>
 800fdfc:	a201      	add	r2, pc, #4	@ (adr r2, 800fe04 <ethernet_link_thread+0x98>)
 800fdfe:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800fe02:	bf00      	nop
 800fe04:	0800fe15 	.word	0x0800fe15
 800fe08:	0800fe2b 	.word	0x0800fe2b
 800fe0c:	0800fe3f 	.word	0x0800fe3f
 800fe10:	0800fe53 	.word	0x0800fe53
    {
    case DP83848_STATUS_100MBITS_FULLDUPLEX:
      duplex = ETH_FULLDUPLEX_MODE;
 800fe14:	f44f 5300 	mov.w	r3, #8192	@ 0x2000
 800fe18:	67fb      	str	r3, [r7, #124]	@ 0x7c
      speed = ETH_SPEED_100M;
 800fe1a:	f44f 4380 	mov.w	r3, #16384	@ 0x4000
 800fe1e:	f8c7 3080 	str.w	r3, [r7, #128]	@ 0x80
      linkchanged = 1;
 800fe22:	2301      	movs	r3, #1
 800fe24:	f8c7 3084 	str.w	r3, [r7, #132]	@ 0x84
      break;
 800fe28:	e01d      	b.n	800fe66 <ethernet_link_thread+0xfa>
    case DP83848_STATUS_100MBITS_HALFDUPLEX:
      duplex = ETH_HALFDUPLEX_MODE;
 800fe2a:	2300      	movs	r3, #0
 800fe2c:	67fb      	str	r3, [r7, #124]	@ 0x7c
      speed = ETH_SPEED_100M;
 800fe2e:	f44f 4380 	mov.w	r3, #16384	@ 0x4000
 800fe32:	f8c7 3080 	str.w	r3, [r7, #128]	@ 0x80
      linkchanged = 1;
 800fe36:	2301      	movs	r3, #1
 800fe38:	f8c7 3084 	str.w	r3, [r7, #132]	@ 0x84
      break;
 800fe3c:	e013      	b.n	800fe66 <ethernet_link_thread+0xfa>
    case DP83848_STATUS_10MBITS_FULLDUPLEX:
      duplex = ETH_FULLDUPLEX_MODE;
 800fe3e:	f44f 5300 	mov.w	r3, #8192	@ 0x2000
 800fe42:	67fb      	str	r3, [r7, #124]	@ 0x7c
      speed = ETH_SPEED_10M;
 800fe44:	2300      	movs	r3, #0
 800fe46:	f8c7 3080 	str.w	r3, [r7, #128]	@ 0x80
      linkchanged = 1;
 800fe4a:	2301      	movs	r3, #1
 800fe4c:	f8c7 3084 	str.w	r3, [r7, #132]	@ 0x84
      break;
 800fe50:	e009      	b.n	800fe66 <ethernet_link_thread+0xfa>
    case DP83848_STATUS_10MBITS_HALFDUPLEX:
      duplex = ETH_HALFDUPLEX_MODE;
 800fe52:	2300      	movs	r3, #0
 800fe54:	67fb      	str	r3, [r7, #124]	@ 0x7c
      speed = ETH_SPEED_10M;
 800fe56:	2300      	movs	r3, #0
 800fe58:	f8c7 3080 	str.w	r3, [r7, #128]	@ 0x80
      linkchanged = 1;
 800fe5c:	2301      	movs	r3, #1
 800fe5e:	f8c7 3084 	str.w	r3, [r7, #132]	@ 0x84
      break;
 800fe62:	e000      	b.n	800fe66 <ethernet_link_thread+0xfa>
    default:
      break;
 800fe64:	bf00      	nop
    }

    if(linkchanged)
 800fe66:	f8d7 3084 	ldr.w	r3, [r7, #132]	@ 0x84
 800fe6a:	2b00      	cmp	r3, #0
 800fe6c:	d020      	beq.n	800feb0 <ethernet_link_thread+0x144>
    {
      /* Get MAC Config MAC */
      HAL_ETH_GetMACConfig(&heth, &MACConf);
 800fe6e:	f107 0310 	add.w	r3, r7, #16
 800fe72:	4619      	mov	r1, r3
 800fe74:	4815      	ldr	r0, [pc, #84]	@ (800fecc <ethernet_link_thread+0x160>)
 800fe76:	f7f8 f9ed 	bl	8008254 <HAL_ETH_GetMACConfig>
      MACConf.DuplexMode = duplex;
 800fe7a:	6ffb      	ldr	r3, [r7, #124]	@ 0x7c
 800fe7c:	62bb      	str	r3, [r7, #40]	@ 0x28
      MACConf.Speed = speed;
 800fe7e:	f8d7 3080 	ldr.w	r3, [r7, #128]	@ 0x80
 800fe82:	627b      	str	r3, [r7, #36]	@ 0x24
      HAL_ETH_SetMACConfig(&heth, &MACConf);
 800fe84:	f107 0310 	add.w	r3, r7, #16
 800fe88:	4619      	mov	r1, r3
 800fe8a:	4810      	ldr	r0, [pc, #64]	@ (800fecc <ethernet_link_thread+0x160>)
 800fe8c:	f7f8 fbb6 	bl	80085fc <HAL_ETH_SetMACConfig>
      HAL_ETH_Start_IT(&heth);
 800fe90:	480e      	ldr	r0, [pc, #56]	@ (800fecc <ethernet_link_thread+0x160>)
 800fe92:	f7f7 fd4f 	bl	8007934 <HAL_ETH_Start_IT>
      LOCK_TCPIP_CORE();
 800fe96:	f000 f8cd 	bl	8010034 <sys_lock_tcpip_core>
      netif_set_up(netif);
 800fe9a:	6f78      	ldr	r0, [r7, #116]	@ 0x74
 800fe9c:	f009 fbd0 	bl	8019640 <netif_set_up>
      netif_set_link_up(netif);
 800fea0:	6f78      	ldr	r0, [r7, #116]	@ 0x74
 800fea2:	f009 fc6f 	bl	8019784 <netif_set_link_up>
      UNLOCK_TCPIP_CORE();
 800fea6:	f000 f8d5 	bl	8010054 <sys_unlock_tcpip_core>
      printf("Link up...\r\n");
 800feaa:	480a      	ldr	r0, [pc, #40]	@ (800fed4 <ethernet_link_thread+0x168>)
 800feac:	f019 fb96 	bl	80295dc <puts>
    }
  }

/* USER CODE BEGIN ETH link Thread core code for User BSP */
#if USE_DHCP
  dhcp_sm(netif, &DHCP_state);
 800feb0:	f107 030f 	add.w	r3, r7, #15
 800feb4:	4619      	mov	r1, r3
 800feb6:	6f78      	ldr	r0, [r7, #116]	@ 0x74
 800feb8:	f000 f922 	bl	8010100 <dhcp_sm>
#endif
  /* ETH_CODE: workaround to call LOCK_TCPIP_CORE when accessing netif link functions*/
//  UNLOCK_TCPIP_CORE();
  osDelay(pdMS_TO_TICKS(500));
 800febc:	f44f 70fa 	mov.w	r0, #500	@ 0x1f4
 800fec0:	f000 faff 	bl	80104c2 <osDelay>
//  LOCK_TCPIP_CORE();
  continue; /* skip next osDelay */
 800fec4:	bf00      	nop
  PHYLinkState = DP83848_GetLinkState(&DP83848);
 800fec6:	e76a      	b.n	800fd9e <ethernet_link_thread+0x32>
 800fec8:	24001438 	.word	0x24001438
 800fecc:	24001350 	.word	0x24001350
 800fed0:	0802c5e8 	.word	0x0802c5e8
 800fed4:	0802c5f8 	.word	0x0802c5f8

0800fed8 <ethernetif_notify_conn_changed>:
  * @brief  This function notify user about link status changement.
  * @param  netif: the network interface
  * @retval None
  */
__weak void ethernetif_notify_conn_changed(struct netif *netif)
{
 800fed8:	b480      	push	{r7}
 800feda:	b083      	sub	sp, #12
 800fedc:	af00      	add	r7, sp, #0
 800fede:	6078      	str	r0, [r7, #4]
  /* NOTE : This is function could be implemented in user file
            when the callback is needed,
  */
}
 800fee0:	bf00      	nop
 800fee2:	370c      	adds	r7, #12
 800fee4:	46bd      	mov	sp, r7
 800fee6:	f85d 7b04 	ldr.w	r7, [sp], #4
 800feea:	4770      	bx	lr

0800feec <HAL_ETH_RxAllocateCallback>:
void HAL_ETH_RxAllocateCallback(uint8_t **buff)
{
 800feec:	b580      	push	{r7, lr}
 800feee:	b086      	sub	sp, #24
 800fef0:	af02      	add	r7, sp, #8
 800fef2:	6078      	str	r0, [r7, #4]
/* USER CODE BEGIN HAL ETH RxAllocateCallback */
  struct pbuf_custom *p = LWIP_MEMPOOL_ALLOC(RX_POOL);
 800fef4:	4812      	ldr	r0, [pc, #72]	@ (800ff40 <HAL_ETH_RxAllocateCallback+0x54>)
 800fef6:	f009 f90b 	bl	8019110 <memp_malloc_pool>
 800fefa:	60f8      	str	r0, [r7, #12]
  if (p)
 800fefc:	68fb      	ldr	r3, [r7, #12]
 800fefe:	2b00      	cmp	r3, #0
 800ff00:	d014      	beq.n	800ff2c <HAL_ETH_RxAllocateCallback+0x40>
  {
    /* Get the buff from the struct pbuf address. */
    *buff = (uint8_t *)p + offsetof(RxBuff_t, buff);
 800ff02:	68fb      	ldr	r3, [r7, #12]
 800ff04:	f103 0220 	add.w	r2, r3, #32
 800ff08:	687b      	ldr	r3, [r7, #4]
 800ff0a:	601a      	str	r2, [r3, #0]
    p->custom_free_function = pbuf_free_custom;
 800ff0c:	68fb      	ldr	r3, [r7, #12]
 800ff0e:	4a0d      	ldr	r2, [pc, #52]	@ (800ff44 <HAL_ETH_RxAllocateCallback+0x58>)
 800ff10:	611a      	str	r2, [r3, #16]
    /* Initialize the struct pbuf.
    * This must be performed whenever a buffer's allocated because it may be
    * changed by lwIP or the app, e.g., pbuf_free decrements ref. */
    pbuf_alloced_custom(PBUF_RAW, 0, PBUF_REF, p, *buff, ETH_RX_BUFFER_SIZE);
 800ff12:	687b      	ldr	r3, [r7, #4]
 800ff14:	681b      	ldr	r3, [r3, #0]
 800ff16:	f44f 62c0 	mov.w	r2, #1536	@ 0x600
 800ff1a:	9201      	str	r2, [sp, #4]
 800ff1c:	9300      	str	r3, [sp, #0]
 800ff1e:	68fb      	ldr	r3, [r7, #12]
 800ff20:	2241      	movs	r2, #65	@ 0x41
 800ff22:	2100      	movs	r1, #0
 800ff24:	2000      	movs	r0, #0
 800ff26:	f009 fe8f 	bl	8019c48 <pbuf_alloced_custom>
  {
    RxAllocStatus = RX_ALLOC_ERROR;
    *buff = NULL;
  }
/* USER CODE END HAL ETH RxAllocateCallback */
}
 800ff2a:	e005      	b.n	800ff38 <HAL_ETH_RxAllocateCallback+0x4c>
    RxAllocStatus = RX_ALLOC_ERROR;
 800ff2c:	4b06      	ldr	r3, [pc, #24]	@ (800ff48 <HAL_ETH_RxAllocateCallback+0x5c>)
 800ff2e:	2201      	movs	r2, #1
 800ff30:	701a      	strb	r2, [r3, #0]
    *buff = NULL;
 800ff32:	687b      	ldr	r3, [r7, #4]
 800ff34:	2200      	movs	r2, #0
 800ff36:	601a      	str	r2, [r3, #0]
}
 800ff38:	bf00      	nop
 800ff3a:	3710      	adds	r7, #16
 800ff3c:	46bd      	mov	sp, r7
 800ff3e:	bd80      	pop	{r7, pc}
 800ff40:	080305f8 	.word	0x080305f8
 800ff44:	0800fb19 	.word	0x0800fb19
 800ff48:	24001344 	.word	0x24001344

0800ff4c <HAL_ETH_RxLinkCallback>:

void HAL_ETH_RxLinkCallback(void **pStart, void **pEnd, uint8_t *buff, uint16_t Length)
{
 800ff4c:	b480      	push	{r7}
 800ff4e:	b08d      	sub	sp, #52	@ 0x34
 800ff50:	af00      	add	r7, sp, #0
 800ff52:	60f8      	str	r0, [r7, #12]
 800ff54:	60b9      	str	r1, [r7, #8]
 800ff56:	607a      	str	r2, [r7, #4]
 800ff58:	807b      	strh	r3, [r7, #2]
/* USER CODE BEGIN HAL ETH RxLinkCallback */

  struct pbuf **ppStart = (struct pbuf **)pStart;
 800ff5a:	68fb      	ldr	r3, [r7, #12]
 800ff5c:	62bb      	str	r3, [r7, #40]	@ 0x28
  struct pbuf **ppEnd = (struct pbuf **)pEnd;
 800ff5e:	68bb      	ldr	r3, [r7, #8]
 800ff60:	627b      	str	r3, [r7, #36]	@ 0x24
  struct pbuf *p = NULL;
 800ff62:	2300      	movs	r3, #0
 800ff64:	62fb      	str	r3, [r7, #44]	@ 0x2c

  /* Get the struct pbuf from the buff address. */
  p = (struct pbuf *)(buff - offsetof(RxBuff_t, buff));
 800ff66:	687b      	ldr	r3, [r7, #4]
 800ff68:	3b20      	subs	r3, #32
 800ff6a:	62fb      	str	r3, [r7, #44]	@ 0x2c
  p->next = NULL;
 800ff6c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 800ff6e:	2200      	movs	r2, #0
 800ff70:	601a      	str	r2, [r3, #0]
  p->tot_len = 0;
 800ff72:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 800ff74:	2200      	movs	r2, #0
 800ff76:	811a      	strh	r2, [r3, #8]
  p->len = Length;
 800ff78:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 800ff7a:	887a      	ldrh	r2, [r7, #2]
 800ff7c:	815a      	strh	r2, [r3, #10]

  /* Chain the buffer. */
  if (!*ppStart)
 800ff7e:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 800ff80:	681b      	ldr	r3, [r3, #0]
 800ff82:	2b00      	cmp	r3, #0
 800ff84:	d103      	bne.n	800ff8e <HAL_ETH_RxLinkCallback+0x42>
  {
    /* The first buffer of the packet. */
    *ppStart = p;
 800ff86:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 800ff88:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 800ff8a:	601a      	str	r2, [r3, #0]
 800ff8c:	e003      	b.n	800ff96 <HAL_ETH_RxLinkCallback+0x4a>
  }
  else
  {
    /* Chain the buffer to the end of the packet. */
    (*ppEnd)->next = p;
 800ff8e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800ff90:	681b      	ldr	r3, [r3, #0]
 800ff92:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 800ff94:	601a      	str	r2, [r3, #0]
  }
  *ppEnd  = p;
 800ff96:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800ff98:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 800ff9a:	601a      	str	r2, [r3, #0]

  /* Update the total length of all the buffers of the chain. Each pbuf in the chain should have its tot_len
   * set to its own length, plus the length of all the following pbufs in the chain. */
  for (p = *ppStart; p != NULL; p = p->next)
 800ff9c:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 800ff9e:	681b      	ldr	r3, [r3, #0]
 800ffa0:	62fb      	str	r3, [r7, #44]	@ 0x2c
 800ffa2:	e009      	b.n	800ffb8 <HAL_ETH_RxLinkCallback+0x6c>
  {
    p->tot_len += Length;
 800ffa4:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 800ffa6:	891a      	ldrh	r2, [r3, #8]
 800ffa8:	887b      	ldrh	r3, [r7, #2]
 800ffaa:	4413      	add	r3, r2
 800ffac:	b29a      	uxth	r2, r3
 800ffae:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 800ffb0:	811a      	strh	r2, [r3, #8]
  for (p = *ppStart; p != NULL; p = p->next)
 800ffb2:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 800ffb4:	681b      	ldr	r3, [r3, #0]
 800ffb6:	62fb      	str	r3, [r7, #44]	@ 0x2c
 800ffb8:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 800ffba:	2b00      	cmp	r3, #0
 800ffbc:	d1f2      	bne.n	800ffa4 <HAL_ETH_RxLinkCallback+0x58>
  }

  /* Invalidate data cache because Rx DMA's writing to physical memory makes it stale. */
  SCB_InvalidateDCache_by_Addr((uint32_t *)buff, Length);
 800ffbe:	887b      	ldrh	r3, [r7, #2]
 800ffc0:	687a      	ldr	r2, [r7, #4]
 800ffc2:	623a      	str	r2, [r7, #32]
 800ffc4:	61fb      	str	r3, [r7, #28]
    if ( dsize > 0 ) { 
 800ffc6:	69fb      	ldr	r3, [r7, #28]
 800ffc8:	2b00      	cmp	r3, #0
 800ffca:	dd1d      	ble.n	8010008 <HAL_ETH_RxLinkCallback+0xbc>
       int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U));
 800ffcc:	6a3b      	ldr	r3, [r7, #32]
 800ffce:	f003 021f 	and.w	r2, r3, #31
 800ffd2:	69fb      	ldr	r3, [r7, #28]
 800ffd4:	4413      	add	r3, r2
 800ffd6:	61bb      	str	r3, [r7, #24]
      uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */;
 800ffd8:	6a3b      	ldr	r3, [r7, #32]
 800ffda:	617b      	str	r3, [r7, #20]
  __ASM volatile ("dsb 0xF":::"memory");
 800ffdc:	f3bf 8f4f 	dsb	sy
}
 800ffe0:	bf00      	nop
        SCB->DCIMVAC = op_addr;             /* register accepts only 32byte aligned values, only bits 31..5 are valid */
 800ffe2:	4a0d      	ldr	r2, [pc, #52]	@ (8010018 <HAL_ETH_RxLinkCallback+0xcc>)
 800ffe4:	697b      	ldr	r3, [r7, #20]
 800ffe6:	f8c2 325c 	str.w	r3, [r2, #604]	@ 0x25c
        op_addr += __SCB_DCACHE_LINE_SIZE;
 800ffea:	697b      	ldr	r3, [r7, #20]
 800ffec:	3320      	adds	r3, #32
 800ffee:	617b      	str	r3, [r7, #20]
        op_size -= __SCB_DCACHE_LINE_SIZE;
 800fff0:	69bb      	ldr	r3, [r7, #24]
 800fff2:	3b20      	subs	r3, #32
 800fff4:	61bb      	str	r3, [r7, #24]
      } while ( op_size > 0 );
 800fff6:	69bb      	ldr	r3, [r7, #24]
 800fff8:	2b00      	cmp	r3, #0
 800fffa:	dcf2      	bgt.n	800ffe2 <HAL_ETH_RxLinkCallback+0x96>
  __ASM volatile ("dsb 0xF":::"memory");
 800fffc:	f3bf 8f4f 	dsb	sy
}
 8010000:	bf00      	nop
  __ASM volatile ("isb 0xF":::"memory");
 8010002:	f3bf 8f6f 	isb	sy
}
 8010006:	bf00      	nop
}
 8010008:	bf00      	nop

/* USER CODE END HAL ETH RxLinkCallback */
}
 801000a:	bf00      	nop
 801000c:	3734      	adds	r7, #52	@ 0x34
 801000e:	46bd      	mov	sp, r7
 8010010:	f85d 7b04 	ldr.w	r7, [sp], #4
 8010014:	4770      	bx	lr
 8010016:	bf00      	nop
 8010018:	e000ed00 	.word	0xe000ed00

0801001c <HAL_ETH_TxFreeCallback>:

void HAL_ETH_TxFreeCallback(uint32_t * buff)
{
 801001c:	b580      	push	{r7, lr}
 801001e:	b082      	sub	sp, #8
 8010020:	af00      	add	r7, sp, #0
 8010022:	6078      	str	r0, [r7, #4]
/* USER CODE BEGIN HAL ETH TxFreeCallback */

  pbuf_free((struct pbuf *)buff);
 8010024:	6878      	ldr	r0, [r7, #4]
 8010026:	f009 fff9 	bl	801a01c <pbuf_free>

/* USER CODE END HAL ETH TxFreeCallback */
}
 801002a:	bf00      	nop
 801002c:	3708      	adds	r7, #8
 801002e:	46bd      	mov	sp, r7
 8010030:	bd80      	pop	{r7, pc}
	...

08010034 <sys_lock_tcpip_core>:
/* ETH_CODE: add functions needed for proper multithreading support and check */

static osThreadId_t lwip_core_lock_holder_thread_id;
static osThreadId_t lwip_tcpip_thread_id;

void sys_lock_tcpip_core(void){
 8010034:	b580      	push	{r7, lr}
 8010036:	af00      	add	r7, sp, #0
	sys_mutex_lock(&lock_tcpip_core);
 8010038:	4804      	ldr	r0, [pc, #16]	@ (801004c <sys_lock_tcpip_core+0x18>)
 801003a:	f015 ff95 	bl	8025f68 <sys_mutex_lock>
	lwip_core_lock_holder_thread_id = osThreadGetId();
 801003e:	f000 fa35 	bl	80104ac <osThreadGetId>
 8010042:	4603      	mov	r3, r0
 8010044:	4a02      	ldr	r2, [pc, #8]	@ (8010050 <sys_lock_tcpip_core+0x1c>)
 8010046:	6013      	str	r3, [r2, #0]
}
 8010048:	bf00      	nop
 801004a:	bd80      	pop	{r7, pc}
 801004c:	24023498 	.word	0x24023498
 8010050:	24001458 	.word	0x24001458

08010054 <sys_unlock_tcpip_core>:

void sys_unlock_tcpip_core(void){
 8010054:	b580      	push	{r7, lr}
 8010056:	af00      	add	r7, sp, #0
	lwip_core_lock_holder_thread_id = 0;
 8010058:	4b03      	ldr	r3, [pc, #12]	@ (8010068 <sys_unlock_tcpip_core+0x14>)
 801005a:	2200      	movs	r2, #0
 801005c:	601a      	str	r2, [r3, #0]
	sys_mutex_unlock(&lock_tcpip_core);
 801005e:	4803      	ldr	r0, [pc, #12]	@ (801006c <sys_unlock_tcpip_core+0x18>)
 8010060:	f015 ff91 	bl	8025f86 <sys_mutex_unlock>
}
 8010064:	bf00      	nop
 8010066:	bd80      	pop	{r7, pc}
 8010068:	24001458 	.word	0x24001458
 801006c:	24023498 	.word	0x24023498

08010070 <sys_check_core_locking>:

void sys_check_core_locking(void){
 8010070:	b580      	push	{r7, lr}
 8010072:	b082      	sub	sp, #8
 8010074:	af00      	add	r7, sp, #0
  /* Embedded systems should check we are NOT in an interrupt context here */

  LWIP_ASSERT("Function called from interrupt context", (SCB->ICSR & SCB_ICSR_VECTACTIVE_Msk) == 0);
 8010076:	4b15      	ldr	r3, [pc, #84]	@ (80100cc <sys_check_core_locking+0x5c>)
 8010078:	685b      	ldr	r3, [r3, #4]
 801007a:	f3c3 0308 	ubfx	r3, r3, #0, #9
 801007e:	2b00      	cmp	r3, #0
 8010080:	d006      	beq.n	8010090 <sys_check_core_locking+0x20>
 8010082:	4b13      	ldr	r3, [pc, #76]	@ (80100d0 <sys_check_core_locking+0x60>)
 8010084:	f240 420e 	movw	r2, #1038	@ 0x40e
 8010088:	4912      	ldr	r1, [pc, #72]	@ (80100d4 <sys_check_core_locking+0x64>)
 801008a:	4813      	ldr	r0, [pc, #76]	@ (80100d8 <sys_check_core_locking+0x68>)
 801008c:	f019 fa3e 	bl	802950c <iprintf>

  if (lwip_tcpip_thread_id != 0) {
 8010090:	4b12      	ldr	r3, [pc, #72]	@ (80100dc <sys_check_core_locking+0x6c>)
 8010092:	681b      	ldr	r3, [r3, #0]
 8010094:	2b00      	cmp	r3, #0
 8010096:	d014      	beq.n	80100c2 <sys_check_core_locking+0x52>
	  osThreadId_t current_thread_id = osThreadGetId();
 8010098:	f000 fa08 	bl	80104ac <osThreadGetId>
 801009c:	6078      	str	r0, [r7, #4]

#if LWIP_TCPIP_CORE_LOCKING
	LWIP_ASSERT("Function called without core lock", current_thread_id == lwip_core_lock_holder_thread_id);
 801009e:	4b10      	ldr	r3, [pc, #64]	@ (80100e0 <sys_check_core_locking+0x70>)
 80100a0:	681b      	ldr	r3, [r3, #0]
 80100a2:	687a      	ldr	r2, [r7, #4]
 80100a4:	429a      	cmp	r2, r3
 80100a6:	d006      	beq.n	80100b6 <sys_check_core_locking+0x46>
 80100a8:	4b09      	ldr	r3, [pc, #36]	@ (80100d0 <sys_check_core_locking+0x60>)
 80100aa:	f240 4214 	movw	r2, #1044	@ 0x414
 80100ae:	490d      	ldr	r1, [pc, #52]	@ (80100e4 <sys_check_core_locking+0x74>)
 80100b0:	4809      	ldr	r0, [pc, #36]	@ (80100d8 <sys_check_core_locking+0x68>)
 80100b2:	f019 fa2b 	bl	802950c <iprintf>
	/* ETH_CODE: to easily check that example has correct handling of core lock
	 * This will trigger breakpoint (__BKPT)
	 */
#warning Below check should be removed in production code
	if(current_thread_id != lwip_core_lock_holder_thread_id) __BKPT(0);
 80100b6:	4b0a      	ldr	r3, [pc, #40]	@ (80100e0 <sys_check_core_locking+0x70>)
 80100b8:	681b      	ldr	r3, [r3, #0]
 80100ba:	687a      	ldr	r2, [r7, #4]
 80100bc:	429a      	cmp	r2, r3
 80100be:	d000      	beq.n	80100c2 <sys_check_core_locking+0x52>
 80100c0:	be00      	bkpt	0x0000
#else /* LWIP_TCPIP_CORE_LOCKING */
	LWIP_ASSERT("Function called from wrong thread", current_thread_id == lwip_tcpip_thread_id);
#endif /* LWIP_TCPIP_CORE_LOCKING */
	LWIP_UNUSED_ARG(current_thread_id); /* for LWIP_NOASSERT */
  }
}
 80100c2:	bf00      	nop
 80100c4:	3708      	adds	r7, #8
 80100c6:	46bd      	mov	sp, r7
 80100c8:	bd80      	pop	{r7, pc}
 80100ca:	bf00      	nop
 80100cc:	e000ed00 	.word	0xe000ed00
 80100d0:	0802c594 	.word	0x0802c594
 80100d4:	0802c604 	.word	0x0802c604
 80100d8:	0802c5c0 	.word	0x0802c5c0
 80100dc:	2400145c 	.word	0x2400145c
 80100e0:	24001458 	.word	0x24001458
 80100e4:	0802c62c 	.word	0x0802c62c

080100e8 <sys_mark_tcpip_thread>:
void sys_mark_tcpip_thread(void){
 80100e8:	b580      	push	{r7, lr}
 80100ea:	af00      	add	r7, sp, #0
	lwip_tcpip_thread_id = osThreadGetId();
 80100ec:	f000 f9de 	bl	80104ac <osThreadGetId>
 80100f0:	4603      	mov	r3, r0
 80100f2:	4a02      	ldr	r2, [pc, #8]	@ (80100fc <sys_mark_tcpip_thread+0x14>)
 80100f4:	6013      	str	r3, [r2, #0]
}
 80100f6:	bf00      	nop
 80100f8:	bd80      	pop	{r7, pc}
 80100fa:	bf00      	nop
 80100fc:	2400145c 	.word	0x2400145c

08010100 <dhcp_sm>:

#if USE_DHCP
void dhcp_sm(struct netif *netif, enum dhcp_states *state)
{
 8010100:	b580      	push	{r7, lr}
 8010102:	b08c      	sub	sp, #48	@ 0x30
 8010104:	af00      	add	r7, sp, #0
 8010106:	6078      	str	r0, [r7, #4]
 8010108:	6039      	str	r1, [r7, #0]
	ip_addr_t gw;
#ifdef DHCP_USER_LOGS
	uint8_t iptxt[20];
#endif

	switch(*state)
 801010a:	683b      	ldr	r3, [r7, #0]
 801010c:	781b      	ldrb	r3, [r3, #0]
 801010e:	2b03      	cmp	r3, #3
 8010110:	d072      	beq.n	80101f8 <dhcp_sm+0xf8>
 8010112:	2b03      	cmp	r3, #3
 8010114:	dc7b      	bgt.n	801020e <dhcp_sm+0x10e>
 8010116:	2b01      	cmp	r3, #1
 8010118:	d002      	beq.n	8010120 <dhcp_sm+0x20>
 801011a:	2b02      	cmp	r3, #2
 801011c:	d00a      	beq.n	8010134 <dhcp_sm+0x34>
	    	{
	    		*state = DHCP_START;
	    	}
	    	break;
	    default:
	    	break;
 801011e:	e076      	b.n	801020e <dhcp_sm+0x10e>
	    	*state = DHCP_WAIT_ADDRESS;
 8010120:	683b      	ldr	r3, [r7, #0]
 8010122:	2202      	movs	r2, #2
 8010124:	701a      	strb	r2, [r3, #0]
	    	dhcp = (struct dhcp *)netif_get_client_data(netif, LWIP_NETIF_CLIENT_DATA_INDEX_DHCP);
 8010126:	687b      	ldr	r3, [r7, #4]
 8010128:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801012a:	62fb      	str	r3, [r7, #44]	@ 0x2c
			printf("  State: Looking for DHCP server ...\n");
 801012c:	483c      	ldr	r0, [pc, #240]	@ (8010220 <dhcp_sm+0x120>)
 801012e:	f019 fa55 	bl	80295dc <puts>
	    	break;
 8010132:	e071      	b.n	8010218 <dhcp_sm+0x118>
	    	if (dhcp_supplied_address(netif))
 8010134:	6878      	ldr	r0, [r7, #4]
 8010136:	f013 f87b 	bl	8023230 <dhcp_supplied_address>
 801013a:	4603      	mov	r3, r0
 801013c:	2b00      	cmp	r3, #0
 801013e:	d015      	beq.n	801016c <dhcp_sm+0x6c>
	    		*state = DHCP_ADDRESS_ASSIGNED;
 8010140:	683b      	ldr	r3, [r7, #0]
 8010142:	2203      	movs	r2, #3
 8010144:	701a      	strb	r2, [r3, #0]
				sprintf((char *)iptxt, "%s", ip4addr_ntoa((const ip4_addr_t *)&netif->ip_addr));
 8010146:	687b      	ldr	r3, [r7, #4]
 8010148:	3304      	adds	r3, #4
 801014a:	4618      	mov	r0, r3
 801014c:	f014 fe08 	bl	8024d60 <ip4addr_ntoa>
 8010150:	4602      	mov	r2, r0
 8010152:	f107 030c 	add.w	r3, r7, #12
 8010156:	4933      	ldr	r1, [pc, #204]	@ (8010224 <dhcp_sm+0x124>)
 8010158:	4618      	mov	r0, r3
 801015a:	f019 fa47 	bl	80295ec <siprintf>
				printf("IP address assigned by a DHCP server: %s\n", iptxt);
 801015e:	f107 030c 	add.w	r3, r7, #12
 8010162:	4619      	mov	r1, r3
 8010164:	4830      	ldr	r0, [pc, #192]	@ (8010228 <dhcp_sm+0x128>)
 8010166:	f019 f9d1 	bl	802950c <iprintf>
	    	break;
 801016a:	e052      	b.n	8010212 <dhcp_sm+0x112>
	    		dhcp = (struct dhcp *)netif_get_client_data(netif, LWIP_NETIF_CLIENT_DATA_INDEX_DHCP);
 801016c:	687b      	ldr	r3, [r7, #4]
 801016e:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8010170:	62fb      	str	r3, [r7, #44]	@ 0x2c
				if (dhcp->tries > MAX_DHCP_TRIES)
 8010172:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8010174:	799b      	ldrb	r3, [r3, #6]
 8010176:	2b04      	cmp	r3, #4
 8010178:	d94b      	bls.n	8010212 <dhcp_sm+0x112>
					*state = DHCP_TIMEOUT;
 801017a:	683b      	ldr	r3, [r7, #0]
 801017c:	2204      	movs	r2, #4
 801017e:	701a      	strb	r2, [r3, #0]
					LOCK_TCPIP_CORE();
 8010180:	f7ff ff58 	bl	8010034 <sys_lock_tcpip_core>
					dhcp_stop(netif);
 8010184:	6878      	ldr	r0, [r7, #4]
 8010186:	f012 faab 	bl	80226e0 <dhcp_stop>
					UNLOCK_TCPIP_CORE();
 801018a:	f7ff ff63 	bl	8010054 <sys_unlock_tcpip_core>
					ipaddr_aton(STATIC_IP, &ipaddr);
 801018e:	f107 0328 	add.w	r3, r7, #40	@ 0x28
 8010192:	4619      	mov	r1, r3
 8010194:	4825      	ldr	r0, [pc, #148]	@ (801022c <dhcp_sm+0x12c>)
 8010196:	f014 fcb9 	bl	8024b0c <ip4addr_aton>
					ipaddr_aton(STATIC_MASK, &netmask);
 801019a:	f107 0324 	add.w	r3, r7, #36	@ 0x24
 801019e:	4619      	mov	r1, r3
 80101a0:	4823      	ldr	r0, [pc, #140]	@ (8010230 <dhcp_sm+0x130>)
 80101a2:	f014 fcb3 	bl	8024b0c <ip4addr_aton>
					ipaddr_aton(STATIC_GW, &gw);
 80101a6:	f107 0320 	add.w	r3, r7, #32
 80101aa:	4619      	mov	r1, r3
 80101ac:	4821      	ldr	r0, [pc, #132]	@ (8010234 <dhcp_sm+0x134>)
 80101ae:	f014 fcad 	bl	8024b0c <ip4addr_aton>
					LOCK_TCPIP_CORE();
 80101b2:	f7ff ff3f 	bl	8010034 <sys_lock_tcpip_core>
					netif_set_addr(netif, ip_2_ip4(&ipaddr), ip_2_ip4(&netmask), ip_2_ip4(&gw));
 80101b6:	f107 0320 	add.w	r3, r7, #32
 80101ba:	f107 0224 	add.w	r2, r7, #36	@ 0x24
 80101be:	f107 0128 	add.w	r1, r7, #40	@ 0x28
 80101c2:	6878      	ldr	r0, [r7, #4]
 80101c4:	f009 f9e0 	bl	8019588 <netif_set_addr>
					UNLOCK_TCPIP_CORE();
 80101c8:	f7ff ff44 	bl	8010054 <sys_unlock_tcpip_core>
					sprintf((char *)iptxt, "%s", ip4addr_ntoa((const ip4_addr_t *)&netif->ip_addr));
 80101cc:	687b      	ldr	r3, [r7, #4]
 80101ce:	3304      	adds	r3, #4
 80101d0:	4618      	mov	r0, r3
 80101d2:	f014 fdc5 	bl	8024d60 <ip4addr_ntoa>
 80101d6:	4602      	mov	r2, r0
 80101d8:	f107 030c 	add.w	r3, r7, #12
 80101dc:	4911      	ldr	r1, [pc, #68]	@ (8010224 <dhcp_sm+0x124>)
 80101de:	4618      	mov	r0, r3
 80101e0:	f019 fa04 	bl	80295ec <siprintf>
					printf("DHCP Timeout !! \n");
 80101e4:	4814      	ldr	r0, [pc, #80]	@ (8010238 <dhcp_sm+0x138>)
 80101e6:	f019 f9f9 	bl	80295dc <puts>
					printf("Static IP address: %s\n", iptxt);
 80101ea:	f107 030c 	add.w	r3, r7, #12
 80101ee:	4619      	mov	r1, r3
 80101f0:	4812      	ldr	r0, [pc, #72]	@ (801023c <dhcp_sm+0x13c>)
 80101f2:	f019 f98b 	bl	802950c <iprintf>
	    	break;
 80101f6:	e00c      	b.n	8010212 <dhcp_sm+0x112>
	    	dhcp = (struct dhcp *)netif_get_client_data(netif, LWIP_NETIF_CLIENT_DATA_INDEX_DHCP);
 80101f8:	687b      	ldr	r3, [r7, #4]
 80101fa:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 80101fc:	62fb      	str	r3, [r7, #44]	@ 0x2c
	    	if(dhcp->state == 3)
 80101fe:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8010200:	795b      	ldrb	r3, [r3, #5]
 8010202:	2b03      	cmp	r3, #3
 8010204:	d107      	bne.n	8010216 <dhcp_sm+0x116>
	    		*state = DHCP_START;
 8010206:	683b      	ldr	r3, [r7, #0]
 8010208:	2201      	movs	r2, #1
 801020a:	701a      	strb	r2, [r3, #0]
	    	break;
 801020c:	e003      	b.n	8010216 <dhcp_sm+0x116>
	    	break;
 801020e:	bf00      	nop
 8010210:	e002      	b.n	8010218 <dhcp_sm+0x118>
	    	break;
 8010212:	bf00      	nop
 8010214:	e000      	b.n	8010218 <dhcp_sm+0x118>
	    	break;
 8010216:	bf00      	nop
	    }
}
 8010218:	bf00      	nop
 801021a:	3730      	adds	r7, #48	@ 0x30
 801021c:	46bd      	mov	sp, r7
 801021e:	bd80      	pop	{r7, pc}
 8010220:	0802c650 	.word	0x0802c650
 8010224:	0802c678 	.word	0x0802c678
 8010228:	0802c67c 	.word	0x0802c67c
 801022c:	0802c6a8 	.word	0x0802c6a8
 8010230:	0802c6b8 	.word	0x0802c6b8
 8010234:	0802c6c8 	.word	0x0802c6c8
 8010238:	0802c6d4 	.word	0x0802c6d4
 801023c:	0802c6e8 	.word	0x0802c6e8

08010240 <__NVIC_SetPriority>:
{
 8010240:	b480      	push	{r7}
 8010242:	b083      	sub	sp, #12
 8010244:	af00      	add	r7, sp, #0
 8010246:	4603      	mov	r3, r0
 8010248:	6039      	str	r1, [r7, #0]
 801024a:	80fb      	strh	r3, [r7, #6]
  if ((int32_t)(IRQn) >= 0)
 801024c:	f9b7 3006 	ldrsh.w	r3, [r7, #6]
 8010250:	2b00      	cmp	r3, #0
 8010252:	db0a      	blt.n	801026a <__NVIC_SetPriority+0x2a>
    NVIC->IP[((uint32_t)IRQn)]                = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 8010254:	683b      	ldr	r3, [r7, #0]
 8010256:	b2da      	uxtb	r2, r3
 8010258:	490c      	ldr	r1, [pc, #48]	@ (801028c <__NVIC_SetPriority+0x4c>)
 801025a:	f9b7 3006 	ldrsh.w	r3, [r7, #6]
 801025e:	0112      	lsls	r2, r2, #4
 8010260:	b2d2      	uxtb	r2, r2
 8010262:	440b      	add	r3, r1
 8010264:	f883 2300 	strb.w	r2, [r3, #768]	@ 0x300
}
 8010268:	e00a      	b.n	8010280 <__NVIC_SetPriority+0x40>
    SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 801026a:	683b      	ldr	r3, [r7, #0]
 801026c:	b2da      	uxtb	r2, r3
 801026e:	4908      	ldr	r1, [pc, #32]	@ (8010290 <__NVIC_SetPriority+0x50>)
 8010270:	88fb      	ldrh	r3, [r7, #6]
 8010272:	f003 030f 	and.w	r3, r3, #15
 8010276:	3b04      	subs	r3, #4
 8010278:	0112      	lsls	r2, r2, #4
 801027a:	b2d2      	uxtb	r2, r2
 801027c:	440b      	add	r3, r1
 801027e:	761a      	strb	r2, [r3, #24]
}
 8010280:	bf00      	nop
 8010282:	370c      	adds	r7, #12
 8010284:	46bd      	mov	sp, r7
 8010286:	f85d 7b04 	ldr.w	r7, [sp], #4
 801028a:	4770      	bx	lr
 801028c:	e000e100 	.word	0xe000e100
 8010290:	e000ed00 	.word	0xe000ed00

08010294 <SysTick_Handler>:

/*
  SysTick handler implementation that also clears overflow flag.
*/
#if (USE_CUSTOM_SYSTICK_HANDLER_IMPLEMENTATION == 0)
void SysTick_Handler (void) {
 8010294:	b580      	push	{r7, lr}
 8010296:	af00      	add	r7, sp, #0
  /* Clear overflow flag */
  SysTick->CTRL;
 8010298:	4b05      	ldr	r3, [pc, #20]	@ (80102b0 <SysTick_Handler+0x1c>)
 801029a:	681b      	ldr	r3, [r3, #0]

  if (xTaskGetSchedulerState() != taskSCHEDULER_NOT_STARTED) {
 801029c:	f003 f946 	bl	801352c <xTaskGetSchedulerState>
 80102a0:	4603      	mov	r3, r0
 80102a2:	2b01      	cmp	r3, #1
 80102a4:	d001      	beq.n	80102aa <SysTick_Handler+0x16>
    /* Call tick handler */
    xPortSysTickHandler();
 80102a6:	f004 fa6f 	bl	8014788 <xPortSysTickHandler>
  }
}
 80102aa:	bf00      	nop
 80102ac:	bd80      	pop	{r7, pc}
 80102ae:	bf00      	nop
 80102b0:	e000e010 	.word	0xe000e010

080102b4 <SVC_Setup>:
#endif /* SysTick */

/*
  Setup SVC to reset value.
*/
__STATIC_INLINE void SVC_Setup (void) {
 80102b4:	b580      	push	{r7, lr}
 80102b6:	af00      	add	r7, sp, #0
#if (__ARM_ARCH_7A__ == 0U)
  /* Service Call interrupt might be configured before kernel start     */
  /* and when its priority is lower or equal to BASEPRI, svc intruction */
  /* causes a Hard Fault.                                               */
  NVIC_SetPriority (SVCall_IRQ_NBR, 0U);
 80102b8:	2100      	movs	r1, #0
 80102ba:	f06f 0004 	mvn.w	r0, #4
 80102be:	f7ff ffbf 	bl	8010240 <__NVIC_SetPriority>
#endif
}
 80102c2:	bf00      	nop
 80102c4:	bd80      	pop	{r7, pc}
	...

080102c8 <osKernelInitialize>:
static uint32_t OS_Tick_GetOverflow (void);
/* Get OS Tick interval */
static uint32_t OS_Tick_GetInterval (void);
/*---------------------------------------------------------------------------*/

osStatus_t osKernelInitialize (void) {
 80102c8:	b480      	push	{r7}
 80102ca:	b083      	sub	sp, #12
 80102cc:	af00      	add	r7, sp, #0
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 80102ce:	f3ef 8305 	mrs	r3, IPSR
 80102d2:	603b      	str	r3, [r7, #0]
  return(result);
 80102d4:	683b      	ldr	r3, [r7, #0]
  osStatus_t stat;

  if (IS_IRQ()) {
 80102d6:	2b00      	cmp	r3, #0
 80102d8:	d003      	beq.n	80102e2 <osKernelInitialize+0x1a>
    stat = osErrorISR;
 80102da:	f06f 0305 	mvn.w	r3, #5
 80102de:	607b      	str	r3, [r7, #4]
 80102e0:	e00c      	b.n	80102fc <osKernelInitialize+0x34>
  }
  else {
    if (KernelState == osKernelInactive) {
 80102e2:	4b0a      	ldr	r3, [pc, #40]	@ (801030c <osKernelInitialize+0x44>)
 80102e4:	681b      	ldr	r3, [r3, #0]
 80102e6:	2b00      	cmp	r3, #0
 80102e8:	d105      	bne.n	80102f6 <osKernelInitialize+0x2e>
        EvrFreeRTOSSetup(0U);
      #endif
      #if defined(USE_FreeRTOS_HEAP_5) && (HEAP_5_REGION_SETUP == 1)
        vPortDefineHeapRegions (configHEAP_5_REGIONS);
      #endif
      KernelState = osKernelReady;
 80102ea:	4b08      	ldr	r3, [pc, #32]	@ (801030c <osKernelInitialize+0x44>)
 80102ec:	2201      	movs	r2, #1
 80102ee:	601a      	str	r2, [r3, #0]
      stat = osOK;
 80102f0:	2300      	movs	r3, #0
 80102f2:	607b      	str	r3, [r7, #4]
 80102f4:	e002      	b.n	80102fc <osKernelInitialize+0x34>
    } else {
      stat = osError;
 80102f6:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80102fa:	607b      	str	r3, [r7, #4]
    }
  }

  return (stat);
 80102fc:	687b      	ldr	r3, [r7, #4]
}
 80102fe:	4618      	mov	r0, r3
 8010300:	370c      	adds	r7, #12
 8010302:	46bd      	mov	sp, r7
 8010304:	f85d 7b04 	ldr.w	r7, [sp], #4
 8010308:	4770      	bx	lr
 801030a:	bf00      	nop
 801030c:	24001460 	.word	0x24001460

08010310 <osKernelStart>:
  }

  return (state);
}

osStatus_t osKernelStart (void) {
 8010310:	b580      	push	{r7, lr}
 8010312:	b082      	sub	sp, #8
 8010314:	af00      	add	r7, sp, #0
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 8010316:	f3ef 8305 	mrs	r3, IPSR
 801031a:	603b      	str	r3, [r7, #0]
  return(result);
 801031c:	683b      	ldr	r3, [r7, #0]
  osStatus_t stat;

  if (IS_IRQ()) {
 801031e:	2b00      	cmp	r3, #0
 8010320:	d003      	beq.n	801032a <osKernelStart+0x1a>
    stat = osErrorISR;
 8010322:	f06f 0305 	mvn.w	r3, #5
 8010326:	607b      	str	r3, [r7, #4]
 8010328:	e010      	b.n	801034c <osKernelStart+0x3c>
  }
  else {
    if (KernelState == osKernelReady) {
 801032a:	4b0b      	ldr	r3, [pc, #44]	@ (8010358 <osKernelStart+0x48>)
 801032c:	681b      	ldr	r3, [r3, #0]
 801032e:	2b01      	cmp	r3, #1
 8010330:	d109      	bne.n	8010346 <osKernelStart+0x36>
      /* Ensure SVC priority is at the reset value */
      SVC_Setup();
 8010332:	f7ff ffbf 	bl	80102b4 <SVC_Setup>
      /* Change state to enable IRQ masking check */
      KernelState = osKernelRunning;
 8010336:	4b08      	ldr	r3, [pc, #32]	@ (8010358 <osKernelStart+0x48>)
 8010338:	2202      	movs	r2, #2
 801033a:	601a      	str	r2, [r3, #0]
      /* Start the kernel scheduler */
      vTaskStartScheduler();
 801033c:	f002 fc3a 	bl	8012bb4 <vTaskStartScheduler>
      stat = osOK;
 8010340:	2300      	movs	r3, #0
 8010342:	607b      	str	r3, [r7, #4]
 8010344:	e002      	b.n	801034c <osKernelStart+0x3c>
    } else {
      stat = osError;
 8010346:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 801034a:	607b      	str	r3, [r7, #4]
    }
  }

  return (stat);
 801034c:	687b      	ldr	r3, [r7, #4]
}
 801034e:	4618      	mov	r0, r3
 8010350:	3708      	adds	r7, #8
 8010352:	46bd      	mov	sp, r7
 8010354:	bd80      	pop	{r7, pc}
 8010356:	bf00      	nop
 8010358:	24001460 	.word	0x24001460

0801035c <osKernelGetTickCount>:
  }

  return (lock);
}

uint32_t osKernelGetTickCount (void) {
 801035c:	b580      	push	{r7, lr}
 801035e:	b082      	sub	sp, #8
 8010360:	af00      	add	r7, sp, #0
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 8010362:	f3ef 8305 	mrs	r3, IPSR
 8010366:	603b      	str	r3, [r7, #0]
  return(result);
 8010368:	683b      	ldr	r3, [r7, #0]
  TickType_t ticks;

  if (IS_IRQ()) {
 801036a:	2b00      	cmp	r3, #0
 801036c:	d003      	beq.n	8010376 <osKernelGetTickCount+0x1a>
    ticks = xTaskGetTickCountFromISR();
 801036e:	f002 fd4d 	bl	8012e0c <xTaskGetTickCountFromISR>
 8010372:	6078      	str	r0, [r7, #4]
 8010374:	e002      	b.n	801037c <osKernelGetTickCount+0x20>
  } else {
    ticks = xTaskGetTickCount();
 8010376:	f002 fd39 	bl	8012dec <xTaskGetTickCount>
 801037a:	6078      	str	r0, [r7, #4]
  }

  return (ticks);
 801037c:	687b      	ldr	r3, [r7, #4]
}
 801037e:	4618      	mov	r0, r3
 8010380:	3708      	adds	r7, #8
 8010382:	46bd      	mov	sp, r7
 8010384:	bd80      	pop	{r7, pc}

08010386 <osThreadNew>:
  return (configCPU_CLOCK_HZ);
}

/*---------------------------------------------------------------------------*/

osThreadId_t osThreadNew (osThreadFunc_t func, void *argument, const osThreadAttr_t *attr) {
 8010386:	b580      	push	{r7, lr}
 8010388:	b08e      	sub	sp, #56	@ 0x38
 801038a:	af04      	add	r7, sp, #16
 801038c:	60f8      	str	r0, [r7, #12]
 801038e:	60b9      	str	r1, [r7, #8]
 8010390:	607a      	str	r2, [r7, #4]
  uint32_t stack;
  TaskHandle_t hTask;
  UBaseType_t prio;
  int32_t mem;

  hTask = NULL;
 8010392:	2300      	movs	r3, #0
 8010394:	613b      	str	r3, [r7, #16]
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 8010396:	f3ef 8305 	mrs	r3, IPSR
 801039a:	617b      	str	r3, [r7, #20]
  return(result);
 801039c:	697b      	ldr	r3, [r7, #20]

  if (!IS_IRQ() && (func != NULL)) {
 801039e:	2b00      	cmp	r3, #0
 80103a0:	d17f      	bne.n	80104a2 <osThreadNew+0x11c>
 80103a2:	68fb      	ldr	r3, [r7, #12]
 80103a4:	2b00      	cmp	r3, #0
 80103a6:	d07c      	beq.n	80104a2 <osThreadNew+0x11c>
    stack = configMINIMAL_STACK_SIZE;
 80103a8:	f44f 7300 	mov.w	r3, #512	@ 0x200
 80103ac:	623b      	str	r3, [r7, #32]
    prio  = (UBaseType_t)osPriorityNormal;
 80103ae:	2318      	movs	r3, #24
 80103b0:	61fb      	str	r3, [r7, #28]

    name = NULL;
 80103b2:	2300      	movs	r3, #0
 80103b4:	627b      	str	r3, [r7, #36]	@ 0x24
    mem  = -1;
 80103b6:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80103ba:	61bb      	str	r3, [r7, #24]

    if (attr != NULL) {
 80103bc:	687b      	ldr	r3, [r7, #4]
 80103be:	2b00      	cmp	r3, #0
 80103c0:	d045      	beq.n	801044e <osThreadNew+0xc8>
      if (attr->name != NULL) {
 80103c2:	687b      	ldr	r3, [r7, #4]
 80103c4:	681b      	ldr	r3, [r3, #0]
 80103c6:	2b00      	cmp	r3, #0
 80103c8:	d002      	beq.n	80103d0 <osThreadNew+0x4a>
        name = attr->name;
 80103ca:	687b      	ldr	r3, [r7, #4]
 80103cc:	681b      	ldr	r3, [r3, #0]
 80103ce:	627b      	str	r3, [r7, #36]	@ 0x24
      }
      if (attr->priority != osPriorityNone) {
 80103d0:	687b      	ldr	r3, [r7, #4]
 80103d2:	699b      	ldr	r3, [r3, #24]
 80103d4:	2b00      	cmp	r3, #0
 80103d6:	d002      	beq.n	80103de <osThreadNew+0x58>
        prio = (UBaseType_t)attr->priority;
 80103d8:	687b      	ldr	r3, [r7, #4]
 80103da:	699b      	ldr	r3, [r3, #24]
 80103dc:	61fb      	str	r3, [r7, #28]
      }

      if ((prio < osPriorityIdle) || (prio > osPriorityISR) || ((attr->attr_bits & osThreadJoinable) == osThreadJoinable)) {
 80103de:	69fb      	ldr	r3, [r7, #28]
 80103e0:	2b00      	cmp	r3, #0
 80103e2:	d008      	beq.n	80103f6 <osThreadNew+0x70>
 80103e4:	69fb      	ldr	r3, [r7, #28]
 80103e6:	2b38      	cmp	r3, #56	@ 0x38
 80103e8:	d805      	bhi.n	80103f6 <osThreadNew+0x70>
 80103ea:	687b      	ldr	r3, [r7, #4]
 80103ec:	685b      	ldr	r3, [r3, #4]
 80103ee:	f003 0301 	and.w	r3, r3, #1
 80103f2:	2b00      	cmp	r3, #0
 80103f4:	d001      	beq.n	80103fa <osThreadNew+0x74>
        return (NULL);
 80103f6:	2300      	movs	r3, #0
 80103f8:	e054      	b.n	80104a4 <osThreadNew+0x11e>
      }

      if (attr->stack_size > 0U) {
 80103fa:	687b      	ldr	r3, [r7, #4]
 80103fc:	695b      	ldr	r3, [r3, #20]
 80103fe:	2b00      	cmp	r3, #0
 8010400:	d003      	beq.n	801040a <osThreadNew+0x84>
        /* In FreeRTOS stack is not in bytes, but in sizeof(StackType_t) which is 4 on ARM ports.       */
        /* Stack size should be therefore 4 byte aligned in order to avoid division caused side effects */
        stack = attr->stack_size / sizeof(StackType_t);
 8010402:	687b      	ldr	r3, [r7, #4]
 8010404:	695b      	ldr	r3, [r3, #20]
 8010406:	089b      	lsrs	r3, r3, #2
 8010408:	623b      	str	r3, [r7, #32]
      }

      if ((attr->cb_mem    != NULL) && (attr->cb_size    >= sizeof(StaticTask_t)) &&
 801040a:	687b      	ldr	r3, [r7, #4]
 801040c:	689b      	ldr	r3, [r3, #8]
 801040e:	2b00      	cmp	r3, #0
 8010410:	d00e      	beq.n	8010430 <osThreadNew+0xaa>
 8010412:	687b      	ldr	r3, [r7, #4]
 8010414:	68db      	ldr	r3, [r3, #12]
 8010416:	2ba7      	cmp	r3, #167	@ 0xa7
 8010418:	d90a      	bls.n	8010430 <osThreadNew+0xaa>
          (attr->stack_mem != NULL) && (attr->stack_size >  0U)) {
 801041a:	687b      	ldr	r3, [r7, #4]
 801041c:	691b      	ldr	r3, [r3, #16]
      if ((attr->cb_mem    != NULL) && (attr->cb_size    >= sizeof(StaticTask_t)) &&
 801041e:	2b00      	cmp	r3, #0
 8010420:	d006      	beq.n	8010430 <osThreadNew+0xaa>
          (attr->stack_mem != NULL) && (attr->stack_size >  0U)) {
 8010422:	687b      	ldr	r3, [r7, #4]
 8010424:	695b      	ldr	r3, [r3, #20]
 8010426:	2b00      	cmp	r3, #0
 8010428:	d002      	beq.n	8010430 <osThreadNew+0xaa>
        mem = 1;
 801042a:	2301      	movs	r3, #1
 801042c:	61bb      	str	r3, [r7, #24]
 801042e:	e010      	b.n	8010452 <osThreadNew+0xcc>
      }
      else {
        if ((attr->cb_mem == NULL) && (attr->cb_size == 0U) && (attr->stack_mem == NULL)) {
 8010430:	687b      	ldr	r3, [r7, #4]
 8010432:	689b      	ldr	r3, [r3, #8]
 8010434:	2b00      	cmp	r3, #0
 8010436:	d10c      	bne.n	8010452 <osThreadNew+0xcc>
 8010438:	687b      	ldr	r3, [r7, #4]
 801043a:	68db      	ldr	r3, [r3, #12]
 801043c:	2b00      	cmp	r3, #0
 801043e:	d108      	bne.n	8010452 <osThreadNew+0xcc>
 8010440:	687b      	ldr	r3, [r7, #4]
 8010442:	691b      	ldr	r3, [r3, #16]
 8010444:	2b00      	cmp	r3, #0
 8010446:	d104      	bne.n	8010452 <osThreadNew+0xcc>
          mem = 0;
 8010448:	2300      	movs	r3, #0
 801044a:	61bb      	str	r3, [r7, #24]
 801044c:	e001      	b.n	8010452 <osThreadNew+0xcc>
        }
      }
    }
    else {
      mem = 0;
 801044e:	2300      	movs	r3, #0
 8010450:	61bb      	str	r3, [r7, #24]
    }

    if (mem == 1) {
 8010452:	69bb      	ldr	r3, [r7, #24]
 8010454:	2b01      	cmp	r3, #1
 8010456:	d110      	bne.n	801047a <osThreadNew+0xf4>
      #if (configSUPPORT_STATIC_ALLOCATION == 1)
        hTask = xTaskCreateStatic ((TaskFunction_t)func, name, stack, argument, prio, (StackType_t  *)attr->stack_mem,
 8010458:	687b      	ldr	r3, [r7, #4]
 801045a:	691b      	ldr	r3, [r3, #16]
                                                                                      (StaticTask_t *)attr->cb_mem);
 801045c:	687a      	ldr	r2, [r7, #4]
 801045e:	6892      	ldr	r2, [r2, #8]
        hTask = xTaskCreateStatic ((TaskFunction_t)func, name, stack, argument, prio, (StackType_t  *)attr->stack_mem,
 8010460:	9202      	str	r2, [sp, #8]
 8010462:	9301      	str	r3, [sp, #4]
 8010464:	69fb      	ldr	r3, [r7, #28]
 8010466:	9300      	str	r3, [sp, #0]
 8010468:	68bb      	ldr	r3, [r7, #8]
 801046a:	6a3a      	ldr	r2, [r7, #32]
 801046c:	6a79      	ldr	r1, [r7, #36]	@ 0x24
 801046e:	68f8      	ldr	r0, [r7, #12]
 8010470:	f002 f9ac 	bl	80127cc <xTaskCreateStatic>
 8010474:	4603      	mov	r3, r0
 8010476:	613b      	str	r3, [r7, #16]
 8010478:	e013      	b.n	80104a2 <osThreadNew+0x11c>
      #endif
    }
    else {
      if (mem == 0) {
 801047a:	69bb      	ldr	r3, [r7, #24]
 801047c:	2b00      	cmp	r3, #0
 801047e:	d110      	bne.n	80104a2 <osThreadNew+0x11c>
        #if (configSUPPORT_DYNAMIC_ALLOCATION == 1)
          if (xTaskCreate ((TaskFunction_t)func, name, (uint16_t)stack, argument, prio, &hTask) != pdPASS) {
 8010480:	6a3b      	ldr	r3, [r7, #32]
 8010482:	b29a      	uxth	r2, r3
 8010484:	f107 0310 	add.w	r3, r7, #16
 8010488:	9301      	str	r3, [sp, #4]
 801048a:	69fb      	ldr	r3, [r7, #28]
 801048c:	9300      	str	r3, [sp, #0]
 801048e:	68bb      	ldr	r3, [r7, #8]
 8010490:	6a79      	ldr	r1, [r7, #36]	@ 0x24
 8010492:	68f8      	ldr	r0, [r7, #12]
 8010494:	f002 f9fa 	bl	801288c <xTaskCreate>
 8010498:	4603      	mov	r3, r0
 801049a:	2b01      	cmp	r3, #1
 801049c:	d001      	beq.n	80104a2 <osThreadNew+0x11c>
            hTask = NULL;
 801049e:	2300      	movs	r3, #0
 80104a0:	613b      	str	r3, [r7, #16]
        #endif
      }
    }
  }

  return ((osThreadId_t)hTask);
 80104a2:	693b      	ldr	r3, [r7, #16]
}
 80104a4:	4618      	mov	r0, r3
 80104a6:	3728      	adds	r7, #40	@ 0x28
 80104a8:	46bd      	mov	sp, r7
 80104aa:	bd80      	pop	{r7, pc}

080104ac <osThreadGetId>:
  }

  return (name);
}

osThreadId_t osThreadGetId (void) {
 80104ac:	b580      	push	{r7, lr}
 80104ae:	b082      	sub	sp, #8
 80104b0:	af00      	add	r7, sp, #0
  osThreadId_t id;

  id = (osThreadId_t)xTaskGetCurrentTaskHandle();
 80104b2:	f003 f82b 	bl	801350c <xTaskGetCurrentTaskHandle>
 80104b6:	6078      	str	r0, [r7, #4]

  return (id);
 80104b8:	687b      	ldr	r3, [r7, #4]
}
 80104ba:	4618      	mov	r0, r3
 80104bc:	3708      	adds	r7, #8
 80104be:	46bd      	mov	sp, r7
 80104c0:	bd80      	pop	{r7, pc}

080104c2 <osDelay>:
  /* Return flags before clearing */
  return (rflags);
}
#endif /* (configUSE_OS2_THREAD_FLAGS == 1) */

osStatus_t osDelay (uint32_t ticks) {
 80104c2:	b580      	push	{r7, lr}
 80104c4:	b084      	sub	sp, #16
 80104c6:	af00      	add	r7, sp, #0
 80104c8:	6078      	str	r0, [r7, #4]
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 80104ca:	f3ef 8305 	mrs	r3, IPSR
 80104ce:	60bb      	str	r3, [r7, #8]
  return(result);
 80104d0:	68bb      	ldr	r3, [r7, #8]
  osStatus_t stat;

  if (IS_IRQ()) {
 80104d2:	2b00      	cmp	r3, #0
 80104d4:	d003      	beq.n	80104de <osDelay+0x1c>
    stat = osErrorISR;
 80104d6:	f06f 0305 	mvn.w	r3, #5
 80104da:	60fb      	str	r3, [r7, #12]
 80104dc:	e007      	b.n	80104ee <osDelay+0x2c>
  }
  else {
    stat = osOK;
 80104de:	2300      	movs	r3, #0
 80104e0:	60fb      	str	r3, [r7, #12]

    if (ticks != 0U) {
 80104e2:	687b      	ldr	r3, [r7, #4]
 80104e4:	2b00      	cmp	r3, #0
 80104e6:	d002      	beq.n	80104ee <osDelay+0x2c>
      vTaskDelay(ticks);
 80104e8:	6878      	ldr	r0, [r7, #4]
 80104ea:	f002 fb2d 	bl	8012b48 <vTaskDelay>
    }
  }

  return (stat);
 80104ee:	68fb      	ldr	r3, [r7, #12]
}
 80104f0:	4618      	mov	r0, r3
 80104f2:	3710      	adds	r7, #16
 80104f4:	46bd      	mov	sp, r7
 80104f6:	bd80      	pop	{r7, pc}

080104f8 <osMutexNew>:
}

/*---------------------------------------------------------------------------*/
#if (configUSE_OS2_MUTEX == 1)

osMutexId_t osMutexNew (const osMutexAttr_t *attr) {
 80104f8:	b580      	push	{r7, lr}
 80104fa:	b088      	sub	sp, #32
 80104fc:	af00      	add	r7, sp, #0
 80104fe:	6078      	str	r0, [r7, #4]
  int32_t  mem;
  #if (configQUEUE_REGISTRY_SIZE > 0)
  const char *name;
  #endif

  hMutex = NULL;
 8010500:	2300      	movs	r3, #0
 8010502:	61fb      	str	r3, [r7, #28]
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 8010504:	f3ef 8305 	mrs	r3, IPSR
 8010508:	60bb      	str	r3, [r7, #8]
  return(result);
 801050a:	68bb      	ldr	r3, [r7, #8]

  if (!IS_IRQ()) {
 801050c:	2b00      	cmp	r3, #0
 801050e:	d174      	bne.n	80105fa <osMutexNew+0x102>
    if (attr != NULL) {
 8010510:	687b      	ldr	r3, [r7, #4]
 8010512:	2b00      	cmp	r3, #0
 8010514:	d003      	beq.n	801051e <osMutexNew+0x26>
      type = attr->attr_bits;
 8010516:	687b      	ldr	r3, [r7, #4]
 8010518:	685b      	ldr	r3, [r3, #4]
 801051a:	61bb      	str	r3, [r7, #24]
 801051c:	e001      	b.n	8010522 <osMutexNew+0x2a>
    } else {
      type = 0U;
 801051e:	2300      	movs	r3, #0
 8010520:	61bb      	str	r3, [r7, #24]
    }

    if ((type & osMutexRecursive) == osMutexRecursive) {
 8010522:	69bb      	ldr	r3, [r7, #24]
 8010524:	f003 0301 	and.w	r3, r3, #1
 8010528:	2b00      	cmp	r3, #0
 801052a:	d002      	beq.n	8010532 <osMutexNew+0x3a>
      rmtx = 1U;
 801052c:	2301      	movs	r3, #1
 801052e:	617b      	str	r3, [r7, #20]
 8010530:	e001      	b.n	8010536 <osMutexNew+0x3e>
    } else {
      rmtx = 0U;
 8010532:	2300      	movs	r3, #0
 8010534:	617b      	str	r3, [r7, #20]
    }

    if ((type & osMutexRobust) != osMutexRobust) {
 8010536:	69bb      	ldr	r3, [r7, #24]
 8010538:	f003 0308 	and.w	r3, r3, #8
 801053c:	2b00      	cmp	r3, #0
 801053e:	d15c      	bne.n	80105fa <osMutexNew+0x102>
      mem = -1;
 8010540:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8010544:	613b      	str	r3, [r7, #16]

      if (attr != NULL) {
 8010546:	687b      	ldr	r3, [r7, #4]
 8010548:	2b00      	cmp	r3, #0
 801054a:	d015      	beq.n	8010578 <osMutexNew+0x80>
        if ((attr->cb_mem != NULL) && (attr->cb_size >= sizeof(StaticSemaphore_t))) {
 801054c:	687b      	ldr	r3, [r7, #4]
 801054e:	689b      	ldr	r3, [r3, #8]
 8010550:	2b00      	cmp	r3, #0
 8010552:	d006      	beq.n	8010562 <osMutexNew+0x6a>
 8010554:	687b      	ldr	r3, [r7, #4]
 8010556:	68db      	ldr	r3, [r3, #12]
 8010558:	2b4f      	cmp	r3, #79	@ 0x4f
 801055a:	d902      	bls.n	8010562 <osMutexNew+0x6a>
          mem = 1;
 801055c:	2301      	movs	r3, #1
 801055e:	613b      	str	r3, [r7, #16]
 8010560:	e00c      	b.n	801057c <osMutexNew+0x84>
        }
        else {
          if ((attr->cb_mem == NULL) && (attr->cb_size == 0U)) {
 8010562:	687b      	ldr	r3, [r7, #4]
 8010564:	689b      	ldr	r3, [r3, #8]
 8010566:	2b00      	cmp	r3, #0
 8010568:	d108      	bne.n	801057c <osMutexNew+0x84>
 801056a:	687b      	ldr	r3, [r7, #4]
 801056c:	68db      	ldr	r3, [r3, #12]
 801056e:	2b00      	cmp	r3, #0
 8010570:	d104      	bne.n	801057c <osMutexNew+0x84>
            mem = 0;
 8010572:	2300      	movs	r3, #0
 8010574:	613b      	str	r3, [r7, #16]
 8010576:	e001      	b.n	801057c <osMutexNew+0x84>
          }
        }
      }
      else {
        mem = 0;
 8010578:	2300      	movs	r3, #0
 801057a:	613b      	str	r3, [r7, #16]
      }

      if (mem == 1) {
 801057c:	693b      	ldr	r3, [r7, #16]
 801057e:	2b01      	cmp	r3, #1
 8010580:	d112      	bne.n	80105a8 <osMutexNew+0xb0>
        #if (configSUPPORT_STATIC_ALLOCATION == 1)
          if (rmtx != 0U) {
 8010582:	697b      	ldr	r3, [r7, #20]
 8010584:	2b00      	cmp	r3, #0
 8010586:	d007      	beq.n	8010598 <osMutexNew+0xa0>
            #if (configUSE_RECURSIVE_MUTEXES == 1)
            hMutex = xSemaphoreCreateRecursiveMutexStatic (attr->cb_mem);
 8010588:	687b      	ldr	r3, [r7, #4]
 801058a:	689b      	ldr	r3, [r3, #8]
 801058c:	4619      	mov	r1, r3
 801058e:	2004      	movs	r0, #4
 8010590:	f000 fdd9 	bl	8011146 <xQueueCreateMutexStatic>
 8010594:	61f8      	str	r0, [r7, #28]
 8010596:	e016      	b.n	80105c6 <osMutexNew+0xce>
            #endif
          }
          else {
            hMutex = xSemaphoreCreateMutexStatic (attr->cb_mem);
 8010598:	687b      	ldr	r3, [r7, #4]
 801059a:	689b      	ldr	r3, [r3, #8]
 801059c:	4619      	mov	r1, r3
 801059e:	2001      	movs	r0, #1
 80105a0:	f000 fdd1 	bl	8011146 <xQueueCreateMutexStatic>
 80105a4:	61f8      	str	r0, [r7, #28]
 80105a6:	e00e      	b.n	80105c6 <osMutexNew+0xce>
          }
        #endif
      }
      else {
        if (mem == 0) {
 80105a8:	693b      	ldr	r3, [r7, #16]
 80105aa:	2b00      	cmp	r3, #0
 80105ac:	d10b      	bne.n	80105c6 <osMutexNew+0xce>
          #if (configSUPPORT_DYNAMIC_ALLOCATION == 1)
            if (rmtx != 0U) {
 80105ae:	697b      	ldr	r3, [r7, #20]
 80105b0:	2b00      	cmp	r3, #0
 80105b2:	d004      	beq.n	80105be <osMutexNew+0xc6>
              #if (configUSE_RECURSIVE_MUTEXES == 1)
              hMutex = xSemaphoreCreateRecursiveMutex ();
 80105b4:	2004      	movs	r0, #4
 80105b6:	f000 fdae 	bl	8011116 <xQueueCreateMutex>
 80105ba:	61f8      	str	r0, [r7, #28]
 80105bc:	e003      	b.n	80105c6 <osMutexNew+0xce>
              #endif
            } else {
              hMutex = xSemaphoreCreateMutex ();
 80105be:	2001      	movs	r0, #1
 80105c0:	f000 fda9 	bl	8011116 <xQueueCreateMutex>
 80105c4:	61f8      	str	r0, [r7, #28]
          #endif
        }
      }

      #if (configQUEUE_REGISTRY_SIZE > 0)
      if (hMutex != NULL) {
 80105c6:	69fb      	ldr	r3, [r7, #28]
 80105c8:	2b00      	cmp	r3, #0
 80105ca:	d00c      	beq.n	80105e6 <osMutexNew+0xee>
        if (attr != NULL) {
 80105cc:	687b      	ldr	r3, [r7, #4]
 80105ce:	2b00      	cmp	r3, #0
 80105d0:	d003      	beq.n	80105da <osMutexNew+0xe2>
          name = attr->name;
 80105d2:	687b      	ldr	r3, [r7, #4]
 80105d4:	681b      	ldr	r3, [r3, #0]
 80105d6:	60fb      	str	r3, [r7, #12]
 80105d8:	e001      	b.n	80105de <osMutexNew+0xe6>
        } else {
          name = NULL;
 80105da:	2300      	movs	r3, #0
 80105dc:	60fb      	str	r3, [r7, #12]
        }
        vQueueAddToRegistry (hMutex, name);
 80105de:	68f9      	ldr	r1, [r7, #12]
 80105e0:	69f8      	ldr	r0, [r7, #28]
 80105e2:	f001 fcd3 	bl	8011f8c <vQueueAddToRegistry>
      }
      #endif

      if ((hMutex != NULL) && (rmtx != 0U)) {
 80105e6:	69fb      	ldr	r3, [r7, #28]
 80105e8:	2b00      	cmp	r3, #0
 80105ea:	d006      	beq.n	80105fa <osMutexNew+0x102>
 80105ec:	697b      	ldr	r3, [r7, #20]
 80105ee:	2b00      	cmp	r3, #0
 80105f0:	d003      	beq.n	80105fa <osMutexNew+0x102>
        hMutex = (SemaphoreHandle_t)((uint32_t)hMutex | 1U);
 80105f2:	69fb      	ldr	r3, [r7, #28]
 80105f4:	f043 0301 	orr.w	r3, r3, #1
 80105f8:	61fb      	str	r3, [r7, #28]
      }
    }
  }

  return ((osMutexId_t)hMutex);
 80105fa:	69fb      	ldr	r3, [r7, #28]
}
 80105fc:	4618      	mov	r0, r3
 80105fe:	3720      	adds	r7, #32
 8010600:	46bd      	mov	sp, r7
 8010602:	bd80      	pop	{r7, pc}

08010604 <osMutexAcquire>:

osStatus_t osMutexAcquire (osMutexId_t mutex_id, uint32_t timeout) {
 8010604:	b580      	push	{r7, lr}
 8010606:	b086      	sub	sp, #24
 8010608:	af00      	add	r7, sp, #0
 801060a:	6078      	str	r0, [r7, #4]
 801060c:	6039      	str	r1, [r7, #0]
  SemaphoreHandle_t hMutex;
  osStatus_t stat;
  uint32_t rmtx;

  hMutex = (SemaphoreHandle_t)((uint32_t)mutex_id & ~1U);
 801060e:	687b      	ldr	r3, [r7, #4]
 8010610:	f023 0301 	bic.w	r3, r3, #1
 8010614:	613b      	str	r3, [r7, #16]

  rmtx = (uint32_t)mutex_id & 1U;
 8010616:	687b      	ldr	r3, [r7, #4]
 8010618:	f003 0301 	and.w	r3, r3, #1
 801061c:	60fb      	str	r3, [r7, #12]

  stat = osOK;
 801061e:	2300      	movs	r3, #0
 8010620:	617b      	str	r3, [r7, #20]
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 8010622:	f3ef 8305 	mrs	r3, IPSR
 8010626:	60bb      	str	r3, [r7, #8]
  return(result);
 8010628:	68bb      	ldr	r3, [r7, #8]

  if (IS_IRQ()) {
 801062a:	2b00      	cmp	r3, #0
 801062c:	d003      	beq.n	8010636 <osMutexAcquire+0x32>
    stat = osErrorISR;
 801062e:	f06f 0305 	mvn.w	r3, #5
 8010632:	617b      	str	r3, [r7, #20]
 8010634:	e02c      	b.n	8010690 <osMutexAcquire+0x8c>
  }
  else if (hMutex == NULL) {
 8010636:	693b      	ldr	r3, [r7, #16]
 8010638:	2b00      	cmp	r3, #0
 801063a:	d103      	bne.n	8010644 <osMutexAcquire+0x40>
    stat = osErrorParameter;
 801063c:	f06f 0303 	mvn.w	r3, #3
 8010640:	617b      	str	r3, [r7, #20]
 8010642:	e025      	b.n	8010690 <osMutexAcquire+0x8c>
  }
  else {
    if (rmtx != 0U) {
 8010644:	68fb      	ldr	r3, [r7, #12]
 8010646:	2b00      	cmp	r3, #0
 8010648:	d011      	beq.n	801066e <osMutexAcquire+0x6a>
      #if (configUSE_RECURSIVE_MUTEXES == 1)
      if (xSemaphoreTakeRecursive (hMutex, timeout) != pdPASS) {
 801064a:	6839      	ldr	r1, [r7, #0]
 801064c:	6938      	ldr	r0, [r7, #16]
 801064e:	f000 fdca 	bl	80111e6 <xQueueTakeMutexRecursive>
 8010652:	4603      	mov	r3, r0
 8010654:	2b01      	cmp	r3, #1
 8010656:	d01b      	beq.n	8010690 <osMutexAcquire+0x8c>
        if (timeout != 0U) {
 8010658:	683b      	ldr	r3, [r7, #0]
 801065a:	2b00      	cmp	r3, #0
 801065c:	d003      	beq.n	8010666 <osMutexAcquire+0x62>
          stat = osErrorTimeout;
 801065e:	f06f 0301 	mvn.w	r3, #1
 8010662:	617b      	str	r3, [r7, #20]
 8010664:	e014      	b.n	8010690 <osMutexAcquire+0x8c>
        } else {
          stat = osErrorResource;
 8010666:	f06f 0302 	mvn.w	r3, #2
 801066a:	617b      	str	r3, [r7, #20]
 801066c:	e010      	b.n	8010690 <osMutexAcquire+0x8c>
        }
      }
      #endif
    }
    else {
      if (xSemaphoreTake (hMutex, timeout) != pdPASS) {
 801066e:	6839      	ldr	r1, [r7, #0]
 8010670:	6938      	ldr	r0, [r7, #16]
 8010672:	f001 f96f 	bl	8011954 <xQueueSemaphoreTake>
 8010676:	4603      	mov	r3, r0
 8010678:	2b01      	cmp	r3, #1
 801067a:	d009      	beq.n	8010690 <osMutexAcquire+0x8c>
        if (timeout != 0U) {
 801067c:	683b      	ldr	r3, [r7, #0]
 801067e:	2b00      	cmp	r3, #0
 8010680:	d003      	beq.n	801068a <osMutexAcquire+0x86>
          stat = osErrorTimeout;
 8010682:	f06f 0301 	mvn.w	r3, #1
 8010686:	617b      	str	r3, [r7, #20]
 8010688:	e002      	b.n	8010690 <osMutexAcquire+0x8c>
        } else {
          stat = osErrorResource;
 801068a:	f06f 0302 	mvn.w	r3, #2
 801068e:	617b      	str	r3, [r7, #20]
        }
      }
    }
  }

  return (stat);
 8010690:	697b      	ldr	r3, [r7, #20]
}
 8010692:	4618      	mov	r0, r3
 8010694:	3718      	adds	r7, #24
 8010696:	46bd      	mov	sp, r7
 8010698:	bd80      	pop	{r7, pc}

0801069a <osMutexRelease>:

osStatus_t osMutexRelease (osMutexId_t mutex_id) {
 801069a:	b580      	push	{r7, lr}
 801069c:	b086      	sub	sp, #24
 801069e:	af00      	add	r7, sp, #0
 80106a0:	6078      	str	r0, [r7, #4]
  SemaphoreHandle_t hMutex;
  osStatus_t stat;
  uint32_t rmtx;

  hMutex = (SemaphoreHandle_t)((uint32_t)mutex_id & ~1U);
 80106a2:	687b      	ldr	r3, [r7, #4]
 80106a4:	f023 0301 	bic.w	r3, r3, #1
 80106a8:	613b      	str	r3, [r7, #16]

  rmtx = (uint32_t)mutex_id & 1U;
 80106aa:	687b      	ldr	r3, [r7, #4]
 80106ac:	f003 0301 	and.w	r3, r3, #1
 80106b0:	60fb      	str	r3, [r7, #12]

  stat = osOK;
 80106b2:	2300      	movs	r3, #0
 80106b4:	617b      	str	r3, [r7, #20]
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 80106b6:	f3ef 8305 	mrs	r3, IPSR
 80106ba:	60bb      	str	r3, [r7, #8]
  return(result);
 80106bc:	68bb      	ldr	r3, [r7, #8]

  if (IS_IRQ()) {
 80106be:	2b00      	cmp	r3, #0
 80106c0:	d003      	beq.n	80106ca <osMutexRelease+0x30>
    stat = osErrorISR;
 80106c2:	f06f 0305 	mvn.w	r3, #5
 80106c6:	617b      	str	r3, [r7, #20]
 80106c8:	e01f      	b.n	801070a <osMutexRelease+0x70>
  }
  else if (hMutex == NULL) {
 80106ca:	693b      	ldr	r3, [r7, #16]
 80106cc:	2b00      	cmp	r3, #0
 80106ce:	d103      	bne.n	80106d8 <osMutexRelease+0x3e>
    stat = osErrorParameter;
 80106d0:	f06f 0303 	mvn.w	r3, #3
 80106d4:	617b      	str	r3, [r7, #20]
 80106d6:	e018      	b.n	801070a <osMutexRelease+0x70>
  }
  else {
    if (rmtx != 0U) {
 80106d8:	68fb      	ldr	r3, [r7, #12]
 80106da:	2b00      	cmp	r3, #0
 80106dc:	d009      	beq.n	80106f2 <osMutexRelease+0x58>
      #if (configUSE_RECURSIVE_MUTEXES == 1)
      if (xSemaphoreGiveRecursive (hMutex) != pdPASS) {
 80106de:	6938      	ldr	r0, [r7, #16]
 80106e0:	f000 fd4c 	bl	801117c <xQueueGiveMutexRecursive>
 80106e4:	4603      	mov	r3, r0
 80106e6:	2b01      	cmp	r3, #1
 80106e8:	d00f      	beq.n	801070a <osMutexRelease+0x70>
        stat = osErrorResource;
 80106ea:	f06f 0302 	mvn.w	r3, #2
 80106ee:	617b      	str	r3, [r7, #20]
 80106f0:	e00b      	b.n	801070a <osMutexRelease+0x70>
      }
      #endif
    }
    else {
      if (xSemaphoreGive (hMutex) != pdPASS) {
 80106f2:	2300      	movs	r3, #0
 80106f4:	2200      	movs	r2, #0
 80106f6:	2100      	movs	r1, #0
 80106f8:	6938      	ldr	r0, [r7, #16]
 80106fa:	f000 fe19 	bl	8011330 <xQueueGenericSend>
 80106fe:	4603      	mov	r3, r0
 8010700:	2b01      	cmp	r3, #1
 8010702:	d002      	beq.n	801070a <osMutexRelease+0x70>
        stat = osErrorResource;
 8010704:	f06f 0302 	mvn.w	r3, #2
 8010708:	617b      	str	r3, [r7, #20]
      }
    }
  }

  return (stat);
 801070a:	697b      	ldr	r3, [r7, #20]
}
 801070c:	4618      	mov	r0, r3
 801070e:	3718      	adds	r7, #24
 8010710:	46bd      	mov	sp, r7
 8010712:	bd80      	pop	{r7, pc}

08010714 <osSemaphoreNew>:
}
#endif /* (configUSE_OS2_MUTEX == 1) */

/*---------------------------------------------------------------------------*/

osSemaphoreId_t osSemaphoreNew (uint32_t max_count, uint32_t initial_count, const osSemaphoreAttr_t *attr) {
 8010714:	b580      	push	{r7, lr}
 8010716:	b08a      	sub	sp, #40	@ 0x28
 8010718:	af02      	add	r7, sp, #8
 801071a:	60f8      	str	r0, [r7, #12]
 801071c:	60b9      	str	r1, [r7, #8]
 801071e:	607a      	str	r2, [r7, #4]
  int32_t mem;
  #if (configQUEUE_REGISTRY_SIZE > 0)
  const char *name;
  #endif

  hSemaphore = NULL;
 8010720:	2300      	movs	r3, #0
 8010722:	61fb      	str	r3, [r7, #28]
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 8010724:	f3ef 8305 	mrs	r3, IPSR
 8010728:	613b      	str	r3, [r7, #16]
  return(result);
 801072a:	693b      	ldr	r3, [r7, #16]

  if (!IS_IRQ() && (max_count > 0U) && (initial_count <= max_count)) {
 801072c:	2b00      	cmp	r3, #0
 801072e:	d175      	bne.n	801081c <osSemaphoreNew+0x108>
 8010730:	68fb      	ldr	r3, [r7, #12]
 8010732:	2b00      	cmp	r3, #0
 8010734:	d072      	beq.n	801081c <osSemaphoreNew+0x108>
 8010736:	68ba      	ldr	r2, [r7, #8]
 8010738:	68fb      	ldr	r3, [r7, #12]
 801073a:	429a      	cmp	r2, r3
 801073c:	d86e      	bhi.n	801081c <osSemaphoreNew+0x108>
    mem = -1;
 801073e:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8010742:	61bb      	str	r3, [r7, #24]

    if (attr != NULL) {
 8010744:	687b      	ldr	r3, [r7, #4]
 8010746:	2b00      	cmp	r3, #0
 8010748:	d015      	beq.n	8010776 <osSemaphoreNew+0x62>
      if ((attr->cb_mem != NULL) && (attr->cb_size >= sizeof(StaticSemaphore_t))) {
 801074a:	687b      	ldr	r3, [r7, #4]
 801074c:	689b      	ldr	r3, [r3, #8]
 801074e:	2b00      	cmp	r3, #0
 8010750:	d006      	beq.n	8010760 <osSemaphoreNew+0x4c>
 8010752:	687b      	ldr	r3, [r7, #4]
 8010754:	68db      	ldr	r3, [r3, #12]
 8010756:	2b4f      	cmp	r3, #79	@ 0x4f
 8010758:	d902      	bls.n	8010760 <osSemaphoreNew+0x4c>
        mem = 1;
 801075a:	2301      	movs	r3, #1
 801075c:	61bb      	str	r3, [r7, #24]
 801075e:	e00c      	b.n	801077a <osSemaphoreNew+0x66>
      }
      else {
        if ((attr->cb_mem == NULL) && (attr->cb_size == 0U)) {
 8010760:	687b      	ldr	r3, [r7, #4]
 8010762:	689b      	ldr	r3, [r3, #8]
 8010764:	2b00      	cmp	r3, #0
 8010766:	d108      	bne.n	801077a <osSemaphoreNew+0x66>
 8010768:	687b      	ldr	r3, [r7, #4]
 801076a:	68db      	ldr	r3, [r3, #12]
 801076c:	2b00      	cmp	r3, #0
 801076e:	d104      	bne.n	801077a <osSemaphoreNew+0x66>
          mem = 0;
 8010770:	2300      	movs	r3, #0
 8010772:	61bb      	str	r3, [r7, #24]
 8010774:	e001      	b.n	801077a <osSemaphoreNew+0x66>
        }
      }
    }
    else {
      mem = 0;
 8010776:	2300      	movs	r3, #0
 8010778:	61bb      	str	r3, [r7, #24]
    }

    if (mem != -1) {
 801077a:	69bb      	ldr	r3, [r7, #24]
 801077c:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8010780:	d04c      	beq.n	801081c <osSemaphoreNew+0x108>
      if (max_count == 1U) {
 8010782:	68fb      	ldr	r3, [r7, #12]
 8010784:	2b01      	cmp	r3, #1
 8010786:	d128      	bne.n	80107da <osSemaphoreNew+0xc6>
        if (mem == 1) {
 8010788:	69bb      	ldr	r3, [r7, #24]
 801078a:	2b01      	cmp	r3, #1
 801078c:	d10a      	bne.n	80107a4 <osSemaphoreNew+0x90>
          #if (configSUPPORT_STATIC_ALLOCATION == 1)
            hSemaphore = xSemaphoreCreateBinaryStatic ((StaticSemaphore_t *)attr->cb_mem);
 801078e:	687b      	ldr	r3, [r7, #4]
 8010790:	689b      	ldr	r3, [r3, #8]
 8010792:	2203      	movs	r2, #3
 8010794:	9200      	str	r2, [sp, #0]
 8010796:	2200      	movs	r2, #0
 8010798:	2100      	movs	r1, #0
 801079a:	2001      	movs	r0, #1
 801079c:	f000 fbc6 	bl	8010f2c <xQueueGenericCreateStatic>
 80107a0:	61f8      	str	r0, [r7, #28]
 80107a2:	e005      	b.n	80107b0 <osSemaphoreNew+0x9c>
          #endif
        }
        else {
          #if (configSUPPORT_DYNAMIC_ALLOCATION == 1)
            hSemaphore = xSemaphoreCreateBinary();
 80107a4:	2203      	movs	r2, #3
 80107a6:	2100      	movs	r1, #0
 80107a8:	2001      	movs	r0, #1
 80107aa:	f000 fc3c 	bl	8011026 <xQueueGenericCreate>
 80107ae:	61f8      	str	r0, [r7, #28]
          #endif
        }

        if ((hSemaphore != NULL) && (initial_count != 0U)) {
 80107b0:	69fb      	ldr	r3, [r7, #28]
 80107b2:	2b00      	cmp	r3, #0
 80107b4:	d022      	beq.n	80107fc <osSemaphoreNew+0xe8>
 80107b6:	68bb      	ldr	r3, [r7, #8]
 80107b8:	2b00      	cmp	r3, #0
 80107ba:	d01f      	beq.n	80107fc <osSemaphoreNew+0xe8>
          if (xSemaphoreGive (hSemaphore) != pdPASS) {
 80107bc:	2300      	movs	r3, #0
 80107be:	2200      	movs	r2, #0
 80107c0:	2100      	movs	r1, #0
 80107c2:	69f8      	ldr	r0, [r7, #28]
 80107c4:	f000 fdb4 	bl	8011330 <xQueueGenericSend>
 80107c8:	4603      	mov	r3, r0
 80107ca:	2b01      	cmp	r3, #1
 80107cc:	d016      	beq.n	80107fc <osSemaphoreNew+0xe8>
            vSemaphoreDelete (hSemaphore);
 80107ce:	69f8      	ldr	r0, [r7, #28]
 80107d0:	f001 fa90 	bl	8011cf4 <vQueueDelete>
            hSemaphore = NULL;
 80107d4:	2300      	movs	r3, #0
 80107d6:	61fb      	str	r3, [r7, #28]
 80107d8:	e010      	b.n	80107fc <osSemaphoreNew+0xe8>
          }
        }
      }
      else {
        if (mem == 1) {
 80107da:	69bb      	ldr	r3, [r7, #24]
 80107dc:	2b01      	cmp	r3, #1
 80107de:	d108      	bne.n	80107f2 <osSemaphoreNew+0xde>
          #if (configSUPPORT_STATIC_ALLOCATION == 1)
            hSemaphore = xSemaphoreCreateCountingStatic (max_count, initial_count, (StaticSemaphore_t *)attr->cb_mem);
 80107e0:	687b      	ldr	r3, [r7, #4]
 80107e2:	689b      	ldr	r3, [r3, #8]
 80107e4:	461a      	mov	r2, r3
 80107e6:	68b9      	ldr	r1, [r7, #8]
 80107e8:	68f8      	ldr	r0, [r7, #12]
 80107ea:	f000 fd33 	bl	8011254 <xQueueCreateCountingSemaphoreStatic>
 80107ee:	61f8      	str	r0, [r7, #28]
 80107f0:	e004      	b.n	80107fc <osSemaphoreNew+0xe8>
          #endif
        }
        else {
          #if (configSUPPORT_DYNAMIC_ALLOCATION == 1)
            hSemaphore = xSemaphoreCreateCounting (max_count, initial_count);
 80107f2:	68b9      	ldr	r1, [r7, #8]
 80107f4:	68f8      	ldr	r0, [r7, #12]
 80107f6:	f000 fd66 	bl	80112c6 <xQueueCreateCountingSemaphore>
 80107fa:	61f8      	str	r0, [r7, #28]
          #endif
        }
      }
      
      #if (configQUEUE_REGISTRY_SIZE > 0)
      if (hSemaphore != NULL) {
 80107fc:	69fb      	ldr	r3, [r7, #28]
 80107fe:	2b00      	cmp	r3, #0
 8010800:	d00c      	beq.n	801081c <osSemaphoreNew+0x108>
        if (attr != NULL) {
 8010802:	687b      	ldr	r3, [r7, #4]
 8010804:	2b00      	cmp	r3, #0
 8010806:	d003      	beq.n	8010810 <osSemaphoreNew+0xfc>
          name = attr->name;
 8010808:	687b      	ldr	r3, [r7, #4]
 801080a:	681b      	ldr	r3, [r3, #0]
 801080c:	617b      	str	r3, [r7, #20]
 801080e:	e001      	b.n	8010814 <osSemaphoreNew+0x100>
        } else {
          name = NULL;
 8010810:	2300      	movs	r3, #0
 8010812:	617b      	str	r3, [r7, #20]
        }
        vQueueAddToRegistry (hSemaphore, name);
 8010814:	6979      	ldr	r1, [r7, #20]
 8010816:	69f8      	ldr	r0, [r7, #28]
 8010818:	f001 fbb8 	bl	8011f8c <vQueueAddToRegistry>
      }
      #endif
    }
  }

  return ((osSemaphoreId_t)hSemaphore);
 801081c:	69fb      	ldr	r3, [r7, #28]
}
 801081e:	4618      	mov	r0, r3
 8010820:	3720      	adds	r7, #32
 8010822:	46bd      	mov	sp, r7
 8010824:	bd80      	pop	{r7, pc}
	...

08010828 <osSemaphoreAcquire>:

osStatus_t osSemaphoreAcquire (osSemaphoreId_t semaphore_id, uint32_t timeout) {
 8010828:	b580      	push	{r7, lr}
 801082a:	b086      	sub	sp, #24
 801082c:	af00      	add	r7, sp, #0
 801082e:	6078      	str	r0, [r7, #4]
 8010830:	6039      	str	r1, [r7, #0]
  SemaphoreHandle_t hSemaphore = (SemaphoreHandle_t)semaphore_id;
 8010832:	687b      	ldr	r3, [r7, #4]
 8010834:	613b      	str	r3, [r7, #16]
  osStatus_t stat;
  BaseType_t yield;

  stat = osOK;
 8010836:	2300      	movs	r3, #0
 8010838:	617b      	str	r3, [r7, #20]

  if (hSemaphore == NULL) {
 801083a:	693b      	ldr	r3, [r7, #16]
 801083c:	2b00      	cmp	r3, #0
 801083e:	d103      	bne.n	8010848 <osSemaphoreAcquire+0x20>
    stat = osErrorParameter;
 8010840:	f06f 0303 	mvn.w	r3, #3
 8010844:	617b      	str	r3, [r7, #20]
 8010846:	e039      	b.n	80108bc <osSemaphoreAcquire+0x94>
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 8010848:	f3ef 8305 	mrs	r3, IPSR
 801084c:	60fb      	str	r3, [r7, #12]
  return(result);
 801084e:	68fb      	ldr	r3, [r7, #12]
  }
  else if (IS_IRQ()) {
 8010850:	2b00      	cmp	r3, #0
 8010852:	d022      	beq.n	801089a <osSemaphoreAcquire+0x72>
    if (timeout != 0U) {
 8010854:	683b      	ldr	r3, [r7, #0]
 8010856:	2b00      	cmp	r3, #0
 8010858:	d003      	beq.n	8010862 <osSemaphoreAcquire+0x3a>
      stat = osErrorParameter;
 801085a:	f06f 0303 	mvn.w	r3, #3
 801085e:	617b      	str	r3, [r7, #20]
 8010860:	e02c      	b.n	80108bc <osSemaphoreAcquire+0x94>
    }
    else {
      yield = pdFALSE;
 8010862:	2300      	movs	r3, #0
 8010864:	60bb      	str	r3, [r7, #8]

      if (xSemaphoreTakeFromISR (hSemaphore, &yield) != pdPASS) {
 8010866:	f107 0308 	add.w	r3, r7, #8
 801086a:	461a      	mov	r2, r3
 801086c:	2100      	movs	r1, #0
 801086e:	6938      	ldr	r0, [r7, #16]
 8010870:	f001 f980 	bl	8011b74 <xQueueReceiveFromISR>
 8010874:	4603      	mov	r3, r0
 8010876:	2b01      	cmp	r3, #1
 8010878:	d003      	beq.n	8010882 <osSemaphoreAcquire+0x5a>
        stat = osErrorResource;
 801087a:	f06f 0302 	mvn.w	r3, #2
 801087e:	617b      	str	r3, [r7, #20]
 8010880:	e01c      	b.n	80108bc <osSemaphoreAcquire+0x94>
      } else {
        portYIELD_FROM_ISR (yield);
 8010882:	68bb      	ldr	r3, [r7, #8]
 8010884:	2b00      	cmp	r3, #0
 8010886:	d019      	beq.n	80108bc <osSemaphoreAcquire+0x94>
 8010888:	4b0f      	ldr	r3, [pc, #60]	@ (80108c8 <osSemaphoreAcquire+0xa0>)
 801088a:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 801088e:	601a      	str	r2, [r3, #0]
 8010890:	f3bf 8f4f 	dsb	sy
 8010894:	f3bf 8f6f 	isb	sy
 8010898:	e010      	b.n	80108bc <osSemaphoreAcquire+0x94>
      }
    }
  }
  else {
    if (xSemaphoreTake (hSemaphore, (TickType_t)timeout) != pdPASS) {
 801089a:	6839      	ldr	r1, [r7, #0]
 801089c:	6938      	ldr	r0, [r7, #16]
 801089e:	f001 f859 	bl	8011954 <xQueueSemaphoreTake>
 80108a2:	4603      	mov	r3, r0
 80108a4:	2b01      	cmp	r3, #1
 80108a6:	d009      	beq.n	80108bc <osSemaphoreAcquire+0x94>
      if (timeout != 0U) {
 80108a8:	683b      	ldr	r3, [r7, #0]
 80108aa:	2b00      	cmp	r3, #0
 80108ac:	d003      	beq.n	80108b6 <osSemaphoreAcquire+0x8e>
        stat = osErrorTimeout;
 80108ae:	f06f 0301 	mvn.w	r3, #1
 80108b2:	617b      	str	r3, [r7, #20]
 80108b4:	e002      	b.n	80108bc <osSemaphoreAcquire+0x94>
      } else {
        stat = osErrorResource;
 80108b6:	f06f 0302 	mvn.w	r3, #2
 80108ba:	617b      	str	r3, [r7, #20]
      }
    }
  }

  return (stat);
 80108bc:	697b      	ldr	r3, [r7, #20]
}
 80108be:	4618      	mov	r0, r3
 80108c0:	3718      	adds	r7, #24
 80108c2:	46bd      	mov	sp, r7
 80108c4:	bd80      	pop	{r7, pc}
 80108c6:	bf00      	nop
 80108c8:	e000ed04 	.word	0xe000ed04

080108cc <osSemaphoreRelease>:

osStatus_t osSemaphoreRelease (osSemaphoreId_t semaphore_id) {
 80108cc:	b580      	push	{r7, lr}
 80108ce:	b086      	sub	sp, #24
 80108d0:	af00      	add	r7, sp, #0
 80108d2:	6078      	str	r0, [r7, #4]
  SemaphoreHandle_t hSemaphore = (SemaphoreHandle_t)semaphore_id;
 80108d4:	687b      	ldr	r3, [r7, #4]
 80108d6:	613b      	str	r3, [r7, #16]
  osStatus_t stat;
  BaseType_t yield;

  stat = osOK;
 80108d8:	2300      	movs	r3, #0
 80108da:	617b      	str	r3, [r7, #20]

  if (hSemaphore == NULL) {
 80108dc:	693b      	ldr	r3, [r7, #16]
 80108de:	2b00      	cmp	r3, #0
 80108e0:	d103      	bne.n	80108ea <osSemaphoreRelease+0x1e>
    stat = osErrorParameter;
 80108e2:	f06f 0303 	mvn.w	r3, #3
 80108e6:	617b      	str	r3, [r7, #20]
 80108e8:	e02c      	b.n	8010944 <osSemaphoreRelease+0x78>
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 80108ea:	f3ef 8305 	mrs	r3, IPSR
 80108ee:	60fb      	str	r3, [r7, #12]
  return(result);
 80108f0:	68fb      	ldr	r3, [r7, #12]
  }
  else if (IS_IRQ()) {
 80108f2:	2b00      	cmp	r3, #0
 80108f4:	d01a      	beq.n	801092c <osSemaphoreRelease+0x60>
    yield = pdFALSE;
 80108f6:	2300      	movs	r3, #0
 80108f8:	60bb      	str	r3, [r7, #8]

    if (xSemaphoreGiveFromISR (hSemaphore, &yield) != pdTRUE) {
 80108fa:	f107 0308 	add.w	r3, r7, #8
 80108fe:	4619      	mov	r1, r3
 8010900:	6938      	ldr	r0, [r7, #16]
 8010902:	f000 feb5 	bl	8011670 <xQueueGiveFromISR>
 8010906:	4603      	mov	r3, r0
 8010908:	2b01      	cmp	r3, #1
 801090a:	d003      	beq.n	8010914 <osSemaphoreRelease+0x48>
      stat = osErrorResource;
 801090c:	f06f 0302 	mvn.w	r3, #2
 8010910:	617b      	str	r3, [r7, #20]
 8010912:	e017      	b.n	8010944 <osSemaphoreRelease+0x78>
    } else {
      portYIELD_FROM_ISR (yield);
 8010914:	68bb      	ldr	r3, [r7, #8]
 8010916:	2b00      	cmp	r3, #0
 8010918:	d014      	beq.n	8010944 <osSemaphoreRelease+0x78>
 801091a:	4b0d      	ldr	r3, [pc, #52]	@ (8010950 <osSemaphoreRelease+0x84>)
 801091c:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8010920:	601a      	str	r2, [r3, #0]
 8010922:	f3bf 8f4f 	dsb	sy
 8010926:	f3bf 8f6f 	isb	sy
 801092a:	e00b      	b.n	8010944 <osSemaphoreRelease+0x78>
    }
  }
  else {
    if (xSemaphoreGive (hSemaphore) != pdPASS) {
 801092c:	2300      	movs	r3, #0
 801092e:	2200      	movs	r2, #0
 8010930:	2100      	movs	r1, #0
 8010932:	6938      	ldr	r0, [r7, #16]
 8010934:	f000 fcfc 	bl	8011330 <xQueueGenericSend>
 8010938:	4603      	mov	r3, r0
 801093a:	2b01      	cmp	r3, #1
 801093c:	d002      	beq.n	8010944 <osSemaphoreRelease+0x78>
      stat = osErrorResource;
 801093e:	f06f 0302 	mvn.w	r3, #2
 8010942:	617b      	str	r3, [r7, #20]
    }
  }

  return (stat);
 8010944:	697b      	ldr	r3, [r7, #20]
}
 8010946:	4618      	mov	r0, r3
 8010948:	3718      	adds	r7, #24
 801094a:	46bd      	mov	sp, r7
 801094c:	bd80      	pop	{r7, pc}
 801094e:	bf00      	nop
 8010950:	e000ed04 	.word	0xe000ed04

08010954 <osSemaphoreDelete>:
  }

  return (count);
}

osStatus_t osSemaphoreDelete (osSemaphoreId_t semaphore_id) {
 8010954:	b580      	push	{r7, lr}
 8010956:	b086      	sub	sp, #24
 8010958:	af00      	add	r7, sp, #0
 801095a:	6078      	str	r0, [r7, #4]
  SemaphoreHandle_t hSemaphore = (SemaphoreHandle_t)semaphore_id;
 801095c:	687b      	ldr	r3, [r7, #4]
 801095e:	613b      	str	r3, [r7, #16]
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 8010960:	f3ef 8305 	mrs	r3, IPSR
 8010964:	60fb      	str	r3, [r7, #12]
  return(result);
 8010966:	68fb      	ldr	r3, [r7, #12]
  osStatus_t stat;

#ifndef USE_FreeRTOS_HEAP_1
  if (IS_IRQ()) {
 8010968:	2b00      	cmp	r3, #0
 801096a:	d003      	beq.n	8010974 <osSemaphoreDelete+0x20>
    stat = osErrorISR;
 801096c:	f06f 0305 	mvn.w	r3, #5
 8010970:	617b      	str	r3, [r7, #20]
 8010972:	e00e      	b.n	8010992 <osSemaphoreDelete+0x3e>
  }
  else if (hSemaphore == NULL) {
 8010974:	693b      	ldr	r3, [r7, #16]
 8010976:	2b00      	cmp	r3, #0
 8010978:	d103      	bne.n	8010982 <osSemaphoreDelete+0x2e>
    stat = osErrorParameter;
 801097a:	f06f 0303 	mvn.w	r3, #3
 801097e:	617b      	str	r3, [r7, #20]
 8010980:	e007      	b.n	8010992 <osSemaphoreDelete+0x3e>
  }
  else {
    #if (configQUEUE_REGISTRY_SIZE > 0)
    vQueueUnregisterQueue (hSemaphore);
 8010982:	6938      	ldr	r0, [r7, #16]
 8010984:	f001 fb2c 	bl	8011fe0 <vQueueUnregisterQueue>
    #endif

    stat = osOK;
 8010988:	2300      	movs	r3, #0
 801098a:	617b      	str	r3, [r7, #20]
    vSemaphoreDelete (hSemaphore);
 801098c:	6938      	ldr	r0, [r7, #16]
 801098e:	f001 f9b1 	bl	8011cf4 <vQueueDelete>
  }
#else
  stat = osError;
#endif

  return (stat);
 8010992:	697b      	ldr	r3, [r7, #20]
}
 8010994:	4618      	mov	r0, r3
 8010996:	3718      	adds	r7, #24
 8010998:	46bd      	mov	sp, r7
 801099a:	bd80      	pop	{r7, pc}

0801099c <osMessageQueueNew>:

/*---------------------------------------------------------------------------*/

osMessageQueueId_t osMessageQueueNew (uint32_t msg_count, uint32_t msg_size, const osMessageQueueAttr_t *attr) {
 801099c:	b580      	push	{r7, lr}
 801099e:	b08a      	sub	sp, #40	@ 0x28
 80109a0:	af02      	add	r7, sp, #8
 80109a2:	60f8      	str	r0, [r7, #12]
 80109a4:	60b9      	str	r1, [r7, #8]
 80109a6:	607a      	str	r2, [r7, #4]
  int32_t mem;
  #if (configQUEUE_REGISTRY_SIZE > 0)
  const char *name;
  #endif

  hQueue = NULL;
 80109a8:	2300      	movs	r3, #0
 80109aa:	61fb      	str	r3, [r7, #28]
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 80109ac:	f3ef 8305 	mrs	r3, IPSR
 80109b0:	613b      	str	r3, [r7, #16]
  return(result);
 80109b2:	693b      	ldr	r3, [r7, #16]

  if (!IS_IRQ() && (msg_count > 0U) && (msg_size > 0U)) {
 80109b4:	2b00      	cmp	r3, #0
 80109b6:	d15f      	bne.n	8010a78 <osMessageQueueNew+0xdc>
 80109b8:	68fb      	ldr	r3, [r7, #12]
 80109ba:	2b00      	cmp	r3, #0
 80109bc:	d05c      	beq.n	8010a78 <osMessageQueueNew+0xdc>
 80109be:	68bb      	ldr	r3, [r7, #8]
 80109c0:	2b00      	cmp	r3, #0
 80109c2:	d059      	beq.n	8010a78 <osMessageQueueNew+0xdc>
    mem = -1;
 80109c4:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80109c8:	61bb      	str	r3, [r7, #24]

    if (attr != NULL) {
 80109ca:	687b      	ldr	r3, [r7, #4]
 80109cc:	2b00      	cmp	r3, #0
 80109ce:	d029      	beq.n	8010a24 <osMessageQueueNew+0x88>
      if ((attr->cb_mem != NULL) && (attr->cb_size >= sizeof(StaticQueue_t)) &&
 80109d0:	687b      	ldr	r3, [r7, #4]
 80109d2:	689b      	ldr	r3, [r3, #8]
 80109d4:	2b00      	cmp	r3, #0
 80109d6:	d012      	beq.n	80109fe <osMessageQueueNew+0x62>
 80109d8:	687b      	ldr	r3, [r7, #4]
 80109da:	68db      	ldr	r3, [r3, #12]
 80109dc:	2b4f      	cmp	r3, #79	@ 0x4f
 80109de:	d90e      	bls.n	80109fe <osMessageQueueNew+0x62>
          (attr->mq_mem != NULL) && (attr->mq_size >= (msg_count * msg_size))) {
 80109e0:	687b      	ldr	r3, [r7, #4]
 80109e2:	691b      	ldr	r3, [r3, #16]
      if ((attr->cb_mem != NULL) && (attr->cb_size >= sizeof(StaticQueue_t)) &&
 80109e4:	2b00      	cmp	r3, #0
 80109e6:	d00a      	beq.n	80109fe <osMessageQueueNew+0x62>
          (attr->mq_mem != NULL) && (attr->mq_size >= (msg_count * msg_size))) {
 80109e8:	687b      	ldr	r3, [r7, #4]
 80109ea:	695a      	ldr	r2, [r3, #20]
 80109ec:	68fb      	ldr	r3, [r7, #12]
 80109ee:	68b9      	ldr	r1, [r7, #8]
 80109f0:	fb01 f303 	mul.w	r3, r1, r3
 80109f4:	429a      	cmp	r2, r3
 80109f6:	d302      	bcc.n	80109fe <osMessageQueueNew+0x62>
        mem = 1;
 80109f8:	2301      	movs	r3, #1
 80109fa:	61bb      	str	r3, [r7, #24]
 80109fc:	e014      	b.n	8010a28 <osMessageQueueNew+0x8c>
      }
      else {
        if ((attr->cb_mem == NULL) && (attr->cb_size == 0U) &&
 80109fe:	687b      	ldr	r3, [r7, #4]
 8010a00:	689b      	ldr	r3, [r3, #8]
 8010a02:	2b00      	cmp	r3, #0
 8010a04:	d110      	bne.n	8010a28 <osMessageQueueNew+0x8c>
 8010a06:	687b      	ldr	r3, [r7, #4]
 8010a08:	68db      	ldr	r3, [r3, #12]
 8010a0a:	2b00      	cmp	r3, #0
 8010a0c:	d10c      	bne.n	8010a28 <osMessageQueueNew+0x8c>
            (attr->mq_mem == NULL) && (attr->mq_size == 0U)) {
 8010a0e:	687b      	ldr	r3, [r7, #4]
 8010a10:	691b      	ldr	r3, [r3, #16]
        if ((attr->cb_mem == NULL) && (attr->cb_size == 0U) &&
 8010a12:	2b00      	cmp	r3, #0
 8010a14:	d108      	bne.n	8010a28 <osMessageQueueNew+0x8c>
            (attr->mq_mem == NULL) && (attr->mq_size == 0U)) {
 8010a16:	687b      	ldr	r3, [r7, #4]
 8010a18:	695b      	ldr	r3, [r3, #20]
 8010a1a:	2b00      	cmp	r3, #0
 8010a1c:	d104      	bne.n	8010a28 <osMessageQueueNew+0x8c>
          mem = 0;
 8010a1e:	2300      	movs	r3, #0
 8010a20:	61bb      	str	r3, [r7, #24]
 8010a22:	e001      	b.n	8010a28 <osMessageQueueNew+0x8c>
        }
      }
    }
    else {
      mem = 0;
 8010a24:	2300      	movs	r3, #0
 8010a26:	61bb      	str	r3, [r7, #24]
    }

    if (mem == 1) {
 8010a28:	69bb      	ldr	r3, [r7, #24]
 8010a2a:	2b01      	cmp	r3, #1
 8010a2c:	d10b      	bne.n	8010a46 <osMessageQueueNew+0xaa>
      #if (configSUPPORT_STATIC_ALLOCATION == 1)
        hQueue = xQueueCreateStatic (msg_count, msg_size, attr->mq_mem, attr->cb_mem);
 8010a2e:	687b      	ldr	r3, [r7, #4]
 8010a30:	691a      	ldr	r2, [r3, #16]
 8010a32:	687b      	ldr	r3, [r7, #4]
 8010a34:	689b      	ldr	r3, [r3, #8]
 8010a36:	2100      	movs	r1, #0
 8010a38:	9100      	str	r1, [sp, #0]
 8010a3a:	68b9      	ldr	r1, [r7, #8]
 8010a3c:	68f8      	ldr	r0, [r7, #12]
 8010a3e:	f000 fa75 	bl	8010f2c <xQueueGenericCreateStatic>
 8010a42:	61f8      	str	r0, [r7, #28]
 8010a44:	e008      	b.n	8010a58 <osMessageQueueNew+0xbc>
      #endif
    }
    else {
      if (mem == 0) {
 8010a46:	69bb      	ldr	r3, [r7, #24]
 8010a48:	2b00      	cmp	r3, #0
 8010a4a:	d105      	bne.n	8010a58 <osMessageQueueNew+0xbc>
        #if (configSUPPORT_DYNAMIC_ALLOCATION == 1)
          hQueue = xQueueCreate (msg_count, msg_size);
 8010a4c:	2200      	movs	r2, #0
 8010a4e:	68b9      	ldr	r1, [r7, #8]
 8010a50:	68f8      	ldr	r0, [r7, #12]
 8010a52:	f000 fae8 	bl	8011026 <xQueueGenericCreate>
 8010a56:	61f8      	str	r0, [r7, #28]
        #endif
      }
    }

    #if (configQUEUE_REGISTRY_SIZE > 0)
    if (hQueue != NULL) {
 8010a58:	69fb      	ldr	r3, [r7, #28]
 8010a5a:	2b00      	cmp	r3, #0
 8010a5c:	d00c      	beq.n	8010a78 <osMessageQueueNew+0xdc>
      if (attr != NULL) {
 8010a5e:	687b      	ldr	r3, [r7, #4]
 8010a60:	2b00      	cmp	r3, #0
 8010a62:	d003      	beq.n	8010a6c <osMessageQueueNew+0xd0>
        name = attr->name;
 8010a64:	687b      	ldr	r3, [r7, #4]
 8010a66:	681b      	ldr	r3, [r3, #0]
 8010a68:	617b      	str	r3, [r7, #20]
 8010a6a:	e001      	b.n	8010a70 <osMessageQueueNew+0xd4>
      } else {
        name = NULL;
 8010a6c:	2300      	movs	r3, #0
 8010a6e:	617b      	str	r3, [r7, #20]
      }
      vQueueAddToRegistry (hQueue, name);
 8010a70:	6979      	ldr	r1, [r7, #20]
 8010a72:	69f8      	ldr	r0, [r7, #28]
 8010a74:	f001 fa8a 	bl	8011f8c <vQueueAddToRegistry>
    }
    #endif

  }

  return ((osMessageQueueId_t)hQueue);
 8010a78:	69fb      	ldr	r3, [r7, #28]
}
 8010a7a:	4618      	mov	r0, r3
 8010a7c:	3720      	adds	r7, #32
 8010a7e:	46bd      	mov	sp, r7
 8010a80:	bd80      	pop	{r7, pc}
	...

08010a84 <osMessageQueuePut>:

osStatus_t osMessageQueuePut (osMessageQueueId_t mq_id, const void *msg_ptr, uint8_t msg_prio, uint32_t timeout) {
 8010a84:	b580      	push	{r7, lr}
 8010a86:	b088      	sub	sp, #32
 8010a88:	af00      	add	r7, sp, #0
 8010a8a:	60f8      	str	r0, [r7, #12]
 8010a8c:	60b9      	str	r1, [r7, #8]
 8010a8e:	603b      	str	r3, [r7, #0]
 8010a90:	4613      	mov	r3, r2
 8010a92:	71fb      	strb	r3, [r7, #7]
  QueueHandle_t hQueue = (QueueHandle_t)mq_id;
 8010a94:	68fb      	ldr	r3, [r7, #12]
 8010a96:	61bb      	str	r3, [r7, #24]
  osStatus_t stat;
  BaseType_t yield;

  (void)msg_prio; /* Message priority is ignored */

  stat = osOK;
 8010a98:	2300      	movs	r3, #0
 8010a9a:	61fb      	str	r3, [r7, #28]
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 8010a9c:	f3ef 8305 	mrs	r3, IPSR
 8010aa0:	617b      	str	r3, [r7, #20]
  return(result);
 8010aa2:	697b      	ldr	r3, [r7, #20]

  if (IS_IRQ()) {
 8010aa4:	2b00      	cmp	r3, #0
 8010aa6:	d028      	beq.n	8010afa <osMessageQueuePut+0x76>
    if ((hQueue == NULL) || (msg_ptr == NULL) || (timeout != 0U)) {
 8010aa8:	69bb      	ldr	r3, [r7, #24]
 8010aaa:	2b00      	cmp	r3, #0
 8010aac:	d005      	beq.n	8010aba <osMessageQueuePut+0x36>
 8010aae:	68bb      	ldr	r3, [r7, #8]
 8010ab0:	2b00      	cmp	r3, #0
 8010ab2:	d002      	beq.n	8010aba <osMessageQueuePut+0x36>
 8010ab4:	683b      	ldr	r3, [r7, #0]
 8010ab6:	2b00      	cmp	r3, #0
 8010ab8:	d003      	beq.n	8010ac2 <osMessageQueuePut+0x3e>
      stat = osErrorParameter;
 8010aba:	f06f 0303 	mvn.w	r3, #3
 8010abe:	61fb      	str	r3, [r7, #28]
 8010ac0:	e038      	b.n	8010b34 <osMessageQueuePut+0xb0>
    }
    else {
      yield = pdFALSE;
 8010ac2:	2300      	movs	r3, #0
 8010ac4:	613b      	str	r3, [r7, #16]

      if (xQueueSendToBackFromISR (hQueue, msg_ptr, &yield) != pdTRUE) {
 8010ac6:	f107 0210 	add.w	r2, r7, #16
 8010aca:	2300      	movs	r3, #0
 8010acc:	68b9      	ldr	r1, [r7, #8]
 8010ace:	69b8      	ldr	r0, [r7, #24]
 8010ad0:	f000 fd30 	bl	8011534 <xQueueGenericSendFromISR>
 8010ad4:	4603      	mov	r3, r0
 8010ad6:	2b01      	cmp	r3, #1
 8010ad8:	d003      	beq.n	8010ae2 <osMessageQueuePut+0x5e>
        stat = osErrorResource;
 8010ada:	f06f 0302 	mvn.w	r3, #2
 8010ade:	61fb      	str	r3, [r7, #28]
 8010ae0:	e028      	b.n	8010b34 <osMessageQueuePut+0xb0>
      } else {
        portYIELD_FROM_ISR (yield);
 8010ae2:	693b      	ldr	r3, [r7, #16]
 8010ae4:	2b00      	cmp	r3, #0
 8010ae6:	d025      	beq.n	8010b34 <osMessageQueuePut+0xb0>
 8010ae8:	4b15      	ldr	r3, [pc, #84]	@ (8010b40 <osMessageQueuePut+0xbc>)
 8010aea:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8010aee:	601a      	str	r2, [r3, #0]
 8010af0:	f3bf 8f4f 	dsb	sy
 8010af4:	f3bf 8f6f 	isb	sy
 8010af8:	e01c      	b.n	8010b34 <osMessageQueuePut+0xb0>
      }
    }
  }
  else {
    if ((hQueue == NULL) || (msg_ptr == NULL)) {
 8010afa:	69bb      	ldr	r3, [r7, #24]
 8010afc:	2b00      	cmp	r3, #0
 8010afe:	d002      	beq.n	8010b06 <osMessageQueuePut+0x82>
 8010b00:	68bb      	ldr	r3, [r7, #8]
 8010b02:	2b00      	cmp	r3, #0
 8010b04:	d103      	bne.n	8010b0e <osMessageQueuePut+0x8a>
      stat = osErrorParameter;
 8010b06:	f06f 0303 	mvn.w	r3, #3
 8010b0a:	61fb      	str	r3, [r7, #28]
 8010b0c:	e012      	b.n	8010b34 <osMessageQueuePut+0xb0>
    }
    else {
      if (xQueueSendToBack (hQueue, msg_ptr, (TickType_t)timeout) != pdPASS) {
 8010b0e:	2300      	movs	r3, #0
 8010b10:	683a      	ldr	r2, [r7, #0]
 8010b12:	68b9      	ldr	r1, [r7, #8]
 8010b14:	69b8      	ldr	r0, [r7, #24]
 8010b16:	f000 fc0b 	bl	8011330 <xQueueGenericSend>
 8010b1a:	4603      	mov	r3, r0
 8010b1c:	2b01      	cmp	r3, #1
 8010b1e:	d009      	beq.n	8010b34 <osMessageQueuePut+0xb0>
        if (timeout != 0U) {
 8010b20:	683b      	ldr	r3, [r7, #0]
 8010b22:	2b00      	cmp	r3, #0
 8010b24:	d003      	beq.n	8010b2e <osMessageQueuePut+0xaa>
          stat = osErrorTimeout;
 8010b26:	f06f 0301 	mvn.w	r3, #1
 8010b2a:	61fb      	str	r3, [r7, #28]
 8010b2c:	e002      	b.n	8010b34 <osMessageQueuePut+0xb0>
        } else {
          stat = osErrorResource;
 8010b2e:	f06f 0302 	mvn.w	r3, #2
 8010b32:	61fb      	str	r3, [r7, #28]
        }
      }
    }
  }

  return (stat);
 8010b34:	69fb      	ldr	r3, [r7, #28]
}
 8010b36:	4618      	mov	r0, r3
 8010b38:	3720      	adds	r7, #32
 8010b3a:	46bd      	mov	sp, r7
 8010b3c:	bd80      	pop	{r7, pc}
 8010b3e:	bf00      	nop
 8010b40:	e000ed04 	.word	0xe000ed04

08010b44 <osMessageQueueGet>:

osStatus_t osMessageQueueGet (osMessageQueueId_t mq_id, void *msg_ptr, uint8_t *msg_prio, uint32_t timeout) {
 8010b44:	b580      	push	{r7, lr}
 8010b46:	b088      	sub	sp, #32
 8010b48:	af00      	add	r7, sp, #0
 8010b4a:	60f8      	str	r0, [r7, #12]
 8010b4c:	60b9      	str	r1, [r7, #8]
 8010b4e:	607a      	str	r2, [r7, #4]
 8010b50:	603b      	str	r3, [r7, #0]
  QueueHandle_t hQueue = (QueueHandle_t)mq_id;
 8010b52:	68fb      	ldr	r3, [r7, #12]
 8010b54:	61bb      	str	r3, [r7, #24]
  osStatus_t stat;
  BaseType_t yield;

  (void)msg_prio; /* Message priority is ignored */

  stat = osOK;
 8010b56:	2300      	movs	r3, #0
 8010b58:	61fb      	str	r3, [r7, #28]
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 8010b5a:	f3ef 8305 	mrs	r3, IPSR
 8010b5e:	617b      	str	r3, [r7, #20]
  return(result);
 8010b60:	697b      	ldr	r3, [r7, #20]

  if (IS_IRQ()) {
 8010b62:	2b00      	cmp	r3, #0
 8010b64:	d028      	beq.n	8010bb8 <osMessageQueueGet+0x74>
    if ((hQueue == NULL) || (msg_ptr == NULL) || (timeout != 0U)) {
 8010b66:	69bb      	ldr	r3, [r7, #24]
 8010b68:	2b00      	cmp	r3, #0
 8010b6a:	d005      	beq.n	8010b78 <osMessageQueueGet+0x34>
 8010b6c:	68bb      	ldr	r3, [r7, #8]
 8010b6e:	2b00      	cmp	r3, #0
 8010b70:	d002      	beq.n	8010b78 <osMessageQueueGet+0x34>
 8010b72:	683b      	ldr	r3, [r7, #0]
 8010b74:	2b00      	cmp	r3, #0
 8010b76:	d003      	beq.n	8010b80 <osMessageQueueGet+0x3c>
      stat = osErrorParameter;
 8010b78:	f06f 0303 	mvn.w	r3, #3
 8010b7c:	61fb      	str	r3, [r7, #28]
 8010b7e:	e037      	b.n	8010bf0 <osMessageQueueGet+0xac>
    }
    else {
      yield = pdFALSE;
 8010b80:	2300      	movs	r3, #0
 8010b82:	613b      	str	r3, [r7, #16]

      if (xQueueReceiveFromISR (hQueue, msg_ptr, &yield) != pdPASS) {
 8010b84:	f107 0310 	add.w	r3, r7, #16
 8010b88:	461a      	mov	r2, r3
 8010b8a:	68b9      	ldr	r1, [r7, #8]
 8010b8c:	69b8      	ldr	r0, [r7, #24]
 8010b8e:	f000 fff1 	bl	8011b74 <xQueueReceiveFromISR>
 8010b92:	4603      	mov	r3, r0
 8010b94:	2b01      	cmp	r3, #1
 8010b96:	d003      	beq.n	8010ba0 <osMessageQueueGet+0x5c>
        stat = osErrorResource;
 8010b98:	f06f 0302 	mvn.w	r3, #2
 8010b9c:	61fb      	str	r3, [r7, #28]
 8010b9e:	e027      	b.n	8010bf0 <osMessageQueueGet+0xac>
      } else {
        portYIELD_FROM_ISR (yield);
 8010ba0:	693b      	ldr	r3, [r7, #16]
 8010ba2:	2b00      	cmp	r3, #0
 8010ba4:	d024      	beq.n	8010bf0 <osMessageQueueGet+0xac>
 8010ba6:	4b15      	ldr	r3, [pc, #84]	@ (8010bfc <osMessageQueueGet+0xb8>)
 8010ba8:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8010bac:	601a      	str	r2, [r3, #0]
 8010bae:	f3bf 8f4f 	dsb	sy
 8010bb2:	f3bf 8f6f 	isb	sy
 8010bb6:	e01b      	b.n	8010bf0 <osMessageQueueGet+0xac>
      }
    }
  }
  else {
    if ((hQueue == NULL) || (msg_ptr == NULL)) {
 8010bb8:	69bb      	ldr	r3, [r7, #24]
 8010bba:	2b00      	cmp	r3, #0
 8010bbc:	d002      	beq.n	8010bc4 <osMessageQueueGet+0x80>
 8010bbe:	68bb      	ldr	r3, [r7, #8]
 8010bc0:	2b00      	cmp	r3, #0
 8010bc2:	d103      	bne.n	8010bcc <osMessageQueueGet+0x88>
      stat = osErrorParameter;
 8010bc4:	f06f 0303 	mvn.w	r3, #3
 8010bc8:	61fb      	str	r3, [r7, #28]
 8010bca:	e011      	b.n	8010bf0 <osMessageQueueGet+0xac>
    }
    else {
      if (xQueueReceive (hQueue, msg_ptr, (TickType_t)timeout) != pdPASS) {
 8010bcc:	683a      	ldr	r2, [r7, #0]
 8010bce:	68b9      	ldr	r1, [r7, #8]
 8010bd0:	69b8      	ldr	r0, [r7, #24]
 8010bd2:	f000 fddd 	bl	8011790 <xQueueReceive>
 8010bd6:	4603      	mov	r3, r0
 8010bd8:	2b01      	cmp	r3, #1
 8010bda:	d009      	beq.n	8010bf0 <osMessageQueueGet+0xac>
        if (timeout != 0U) {
 8010bdc:	683b      	ldr	r3, [r7, #0]
 8010bde:	2b00      	cmp	r3, #0
 8010be0:	d003      	beq.n	8010bea <osMessageQueueGet+0xa6>
          stat = osErrorTimeout;
 8010be2:	f06f 0301 	mvn.w	r3, #1
 8010be6:	61fb      	str	r3, [r7, #28]
 8010be8:	e002      	b.n	8010bf0 <osMessageQueueGet+0xac>
        } else {
          stat = osErrorResource;
 8010bea:	f06f 0302 	mvn.w	r3, #2
 8010bee:	61fb      	str	r3, [r7, #28]
        }
      }
    }
  }

  return (stat);
 8010bf0:	69fb      	ldr	r3, [r7, #28]
}
 8010bf2:	4618      	mov	r0, r3
 8010bf4:	3720      	adds	r7, #32
 8010bf6:	46bd      	mov	sp, r7
 8010bf8:	bd80      	pop	{r7, pc}
 8010bfa:	bf00      	nop
 8010bfc:	e000ed04 	.word	0xe000ed04

08010c00 <osMessageQueueGetCount>:
  }

  return (size);
}

uint32_t osMessageQueueGetCount (osMessageQueueId_t mq_id) {
 8010c00:	b580      	push	{r7, lr}
 8010c02:	b086      	sub	sp, #24
 8010c04:	af00      	add	r7, sp, #0
 8010c06:	6078      	str	r0, [r7, #4]
  QueueHandle_t hQueue = (QueueHandle_t)mq_id;
 8010c08:	687b      	ldr	r3, [r7, #4]
 8010c0a:	613b      	str	r3, [r7, #16]
  UBaseType_t count;

  if (hQueue == NULL) {
 8010c0c:	693b      	ldr	r3, [r7, #16]
 8010c0e:	2b00      	cmp	r3, #0
 8010c10:	d102      	bne.n	8010c18 <osMessageQueueGetCount+0x18>
    count = 0U;
 8010c12:	2300      	movs	r3, #0
 8010c14:	617b      	str	r3, [r7, #20]
 8010c16:	e00e      	b.n	8010c36 <osMessageQueueGetCount+0x36>
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 8010c18:	f3ef 8305 	mrs	r3, IPSR
 8010c1c:	60fb      	str	r3, [r7, #12]
  return(result);
 8010c1e:	68fb      	ldr	r3, [r7, #12]
  }
  else if (IS_IRQ()) {
 8010c20:	2b00      	cmp	r3, #0
 8010c22:	d004      	beq.n	8010c2e <osMessageQueueGetCount+0x2e>
    count = uxQueueMessagesWaitingFromISR (hQueue);
 8010c24:	6938      	ldr	r0, [r7, #16]
 8010c26:	f001 f846 	bl	8011cb6 <uxQueueMessagesWaitingFromISR>
 8010c2a:	6178      	str	r0, [r7, #20]
 8010c2c:	e003      	b.n	8010c36 <osMessageQueueGetCount+0x36>
  }
  else {
    count = uxQueueMessagesWaiting (hQueue);
 8010c2e:	6938      	ldr	r0, [r7, #16]
 8010c30:	f001 f822 	bl	8011c78 <uxQueueMessagesWaiting>
 8010c34:	6178      	str	r0, [r7, #20]
  }

  return ((uint32_t)count);
 8010c36:	697b      	ldr	r3, [r7, #20]
}
 8010c38:	4618      	mov	r0, r3
 8010c3a:	3718      	adds	r7, #24
 8010c3c:	46bd      	mov	sp, r7
 8010c3e:	bd80      	pop	{r7, pc}

08010c40 <osMessageQueueDelete>:
  }

  return (stat);
}

osStatus_t osMessageQueueDelete (osMessageQueueId_t mq_id) {
 8010c40:	b580      	push	{r7, lr}
 8010c42:	b086      	sub	sp, #24
 8010c44:	af00      	add	r7, sp, #0
 8010c46:	6078      	str	r0, [r7, #4]
  QueueHandle_t hQueue = (QueueHandle_t)mq_id;
 8010c48:	687b      	ldr	r3, [r7, #4]
 8010c4a:	613b      	str	r3, [r7, #16]
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 8010c4c:	f3ef 8305 	mrs	r3, IPSR
 8010c50:	60fb      	str	r3, [r7, #12]
  return(result);
 8010c52:	68fb      	ldr	r3, [r7, #12]
  osStatus_t stat;

#ifndef USE_FreeRTOS_HEAP_1
  if (IS_IRQ()) {
 8010c54:	2b00      	cmp	r3, #0
 8010c56:	d003      	beq.n	8010c60 <osMessageQueueDelete+0x20>
    stat = osErrorISR;
 8010c58:	f06f 0305 	mvn.w	r3, #5
 8010c5c:	617b      	str	r3, [r7, #20]
 8010c5e:	e00e      	b.n	8010c7e <osMessageQueueDelete+0x3e>
  }
  else if (hQueue == NULL) {
 8010c60:	693b      	ldr	r3, [r7, #16]
 8010c62:	2b00      	cmp	r3, #0
 8010c64:	d103      	bne.n	8010c6e <osMessageQueueDelete+0x2e>
    stat = osErrorParameter;
 8010c66:	f06f 0303 	mvn.w	r3, #3
 8010c6a:	617b      	str	r3, [r7, #20]
 8010c6c:	e007      	b.n	8010c7e <osMessageQueueDelete+0x3e>
  }
  else {
    #if (configQUEUE_REGISTRY_SIZE > 0)
    vQueueUnregisterQueue (hQueue);
 8010c6e:	6938      	ldr	r0, [r7, #16]
 8010c70:	f001 f9b6 	bl	8011fe0 <vQueueUnregisterQueue>
    #endif

    stat = osOK;
 8010c74:	2300      	movs	r3, #0
 8010c76:	617b      	str	r3, [r7, #20]
    vQueueDelete (hQueue);
 8010c78:	6938      	ldr	r0, [r7, #16]
 8010c7a:	f001 f83b 	bl	8011cf4 <vQueueDelete>
  }
#else
  stat = osError;
#endif

  return (stat);
 8010c7e:	697b      	ldr	r3, [r7, #20]
}
 8010c80:	4618      	mov	r0, r3
 8010c82:	3718      	adds	r7, #24
 8010c84:	46bd      	mov	sp, r7
 8010c86:	bd80      	pop	{r7, pc}

08010c88 <vApplicationGetIdleTaskMemory>:

/*
  vApplicationGetIdleTaskMemory gets called when configSUPPORT_STATIC_ALLOCATION
  equals to 1 and is required for static memory allocation support.
*/
__WEAK void vApplicationGetIdleTaskMemory (StaticTask_t **ppxIdleTaskTCBBuffer, StackType_t **ppxIdleTaskStackBuffer, uint32_t *pulIdleTaskStackSize) {
 8010c88:	b480      	push	{r7}
 8010c8a:	b085      	sub	sp, #20
 8010c8c:	af00      	add	r7, sp, #0
 8010c8e:	60f8      	str	r0, [r7, #12]
 8010c90:	60b9      	str	r1, [r7, #8]
 8010c92:	607a      	str	r2, [r7, #4]
  /* Idle task control block and stack */
  static StaticTask_t Idle_TCB;
  static StackType_t  Idle_Stack[configMINIMAL_STACK_SIZE];

  *ppxIdleTaskTCBBuffer   = &Idle_TCB;
 8010c94:	68fb      	ldr	r3, [r7, #12]
 8010c96:	4a07      	ldr	r2, [pc, #28]	@ (8010cb4 <vApplicationGetIdleTaskMemory+0x2c>)
 8010c98:	601a      	str	r2, [r3, #0]
  *ppxIdleTaskStackBuffer = &Idle_Stack[0];
 8010c9a:	68bb      	ldr	r3, [r7, #8]
 8010c9c:	4a06      	ldr	r2, [pc, #24]	@ (8010cb8 <vApplicationGetIdleTaskMemory+0x30>)
 8010c9e:	601a      	str	r2, [r3, #0]
  *pulIdleTaskStackSize   = (uint32_t)configMINIMAL_STACK_SIZE;
 8010ca0:	687b      	ldr	r3, [r7, #4]
 8010ca2:	f44f 7200 	mov.w	r2, #512	@ 0x200
 8010ca6:	601a      	str	r2, [r3, #0]
}
 8010ca8:	bf00      	nop
 8010caa:	3714      	adds	r7, #20
 8010cac:	46bd      	mov	sp, r7
 8010cae:	f85d 7b04 	ldr.w	r7, [sp], #4
 8010cb2:	4770      	bx	lr
 8010cb4:	24001464 	.word	0x24001464
 8010cb8:	2400150c 	.word	0x2400150c

08010cbc <vApplicationGetTimerTaskMemory>:

/*
  vApplicationGetTimerTaskMemory gets called when configSUPPORT_STATIC_ALLOCATION
  equals to 1 and is required for static memory allocation support.
*/
__WEAK void vApplicationGetTimerTaskMemory (StaticTask_t **ppxTimerTaskTCBBuffer, StackType_t **ppxTimerTaskStackBuffer, uint32_t *pulTimerTaskStackSize) {
 8010cbc:	b480      	push	{r7}
 8010cbe:	b085      	sub	sp, #20
 8010cc0:	af00      	add	r7, sp, #0
 8010cc2:	60f8      	str	r0, [r7, #12]
 8010cc4:	60b9      	str	r1, [r7, #8]
 8010cc6:	607a      	str	r2, [r7, #4]
  /* Timer task control block and stack */
  static StaticTask_t Timer_TCB;
  static StackType_t  Timer_Stack[configTIMER_TASK_STACK_DEPTH];

  *ppxTimerTaskTCBBuffer   = &Timer_TCB;
 8010cc8:	68fb      	ldr	r3, [r7, #12]
 8010cca:	4a07      	ldr	r2, [pc, #28]	@ (8010ce8 <vApplicationGetTimerTaskMemory+0x2c>)
 8010ccc:	601a      	str	r2, [r3, #0]
  *ppxTimerTaskStackBuffer = &Timer_Stack[0];
 8010cce:	68bb      	ldr	r3, [r7, #8]
 8010cd0:	4a06      	ldr	r2, [pc, #24]	@ (8010cec <vApplicationGetTimerTaskMemory+0x30>)
 8010cd2:	601a      	str	r2, [r3, #0]
  *pulTimerTaskStackSize   = (uint32_t)configTIMER_TASK_STACK_DEPTH;
 8010cd4:	687b      	ldr	r3, [r7, #4]
 8010cd6:	f44f 6280 	mov.w	r2, #1024	@ 0x400
 8010cda:	601a      	str	r2, [r3, #0]
}
 8010cdc:	bf00      	nop
 8010cde:	3714      	adds	r7, #20
 8010ce0:	46bd      	mov	sp, r7
 8010ce2:	f85d 7b04 	ldr.w	r7, [sp], #4
 8010ce6:	4770      	bx	lr
 8010ce8:	24001d0c 	.word	0x24001d0c
 8010cec:	24001db4 	.word	0x24001db4

08010cf0 <vListInitialise>:
/*-----------------------------------------------------------
 * PUBLIC LIST API documented in list.h
 *----------------------------------------------------------*/

void vListInitialise( List_t * const pxList )
{
 8010cf0:	b480      	push	{r7}
 8010cf2:	b083      	sub	sp, #12
 8010cf4:	af00      	add	r7, sp, #0
 8010cf6:	6078      	str	r0, [r7, #4]
	/* The list structure contains a list item which is used to mark the
	end of the list.  To initialise the list the list end is inserted
	as the only list entry. */
	pxList->pxIndex = ( ListItem_t * ) &( pxList->xListEnd );			/*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM.  This is checked and valid. */
 8010cf8:	687b      	ldr	r3, [r7, #4]
 8010cfa:	f103 0208 	add.w	r2, r3, #8
 8010cfe:	687b      	ldr	r3, [r7, #4]
 8010d00:	605a      	str	r2, [r3, #4]

	/* The list end value is the highest possible value in the list to
	ensure it remains at the end of the list. */
	pxList->xListEnd.xItemValue = portMAX_DELAY;
 8010d02:	687b      	ldr	r3, [r7, #4]
 8010d04:	f04f 32ff 	mov.w	r2, #4294967295	@ 0xffffffff
 8010d08:	609a      	str	r2, [r3, #8]

	/* The list end next and previous pointers point to itself so we know
	when the list is empty. */
	pxList->xListEnd.pxNext = ( ListItem_t * ) &( pxList->xListEnd );	/*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM.  This is checked and valid. */
 8010d0a:	687b      	ldr	r3, [r7, #4]
 8010d0c:	f103 0208 	add.w	r2, r3, #8
 8010d10:	687b      	ldr	r3, [r7, #4]
 8010d12:	60da      	str	r2, [r3, #12]
	pxList->xListEnd.pxPrevious = ( ListItem_t * ) &( pxList->xListEnd );/*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM.  This is checked and valid. */
 8010d14:	687b      	ldr	r3, [r7, #4]
 8010d16:	f103 0208 	add.w	r2, r3, #8
 8010d1a:	687b      	ldr	r3, [r7, #4]
 8010d1c:	611a      	str	r2, [r3, #16]

	pxList->uxNumberOfItems = ( UBaseType_t ) 0U;
 8010d1e:	687b      	ldr	r3, [r7, #4]
 8010d20:	2200      	movs	r2, #0
 8010d22:	601a      	str	r2, [r3, #0]

	/* Write known values into the list if
	configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
	listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList );
	listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList );
}
 8010d24:	bf00      	nop
 8010d26:	370c      	adds	r7, #12
 8010d28:	46bd      	mov	sp, r7
 8010d2a:	f85d 7b04 	ldr.w	r7, [sp], #4
 8010d2e:	4770      	bx	lr

08010d30 <vListInitialiseItem>:
/*-----------------------------------------------------------*/

void vListInitialiseItem( ListItem_t * const pxItem )
{
 8010d30:	b480      	push	{r7}
 8010d32:	b083      	sub	sp, #12
 8010d34:	af00      	add	r7, sp, #0
 8010d36:	6078      	str	r0, [r7, #4]
	/* Make sure the list item is not recorded as being on a list. */
	pxItem->pxContainer = NULL;
 8010d38:	687b      	ldr	r3, [r7, #4]
 8010d3a:	2200      	movs	r2, #0
 8010d3c:	611a      	str	r2, [r3, #16]

	/* Write known values into the list item if
	configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
	listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem );
	listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem );
}
 8010d3e:	bf00      	nop
 8010d40:	370c      	adds	r7, #12
 8010d42:	46bd      	mov	sp, r7
 8010d44:	f85d 7b04 	ldr.w	r7, [sp], #4
 8010d48:	4770      	bx	lr

08010d4a <vListInsertEnd>:
/*-----------------------------------------------------------*/

void vListInsertEnd( List_t * const pxList, ListItem_t * const pxNewListItem )
{
 8010d4a:	b480      	push	{r7}
 8010d4c:	b085      	sub	sp, #20
 8010d4e:	af00      	add	r7, sp, #0
 8010d50:	6078      	str	r0, [r7, #4]
 8010d52:	6039      	str	r1, [r7, #0]
ListItem_t * const pxIndex = pxList->pxIndex;
 8010d54:	687b      	ldr	r3, [r7, #4]
 8010d56:	685b      	ldr	r3, [r3, #4]
 8010d58:	60fb      	str	r3, [r7, #12]
	listTEST_LIST_ITEM_INTEGRITY( pxNewListItem );

	/* Insert a new list item into pxList, but rather than sort the list,
	makes the new list item the last item to be removed by a call to
	listGET_OWNER_OF_NEXT_ENTRY(). */
	pxNewListItem->pxNext = pxIndex;
 8010d5a:	683b      	ldr	r3, [r7, #0]
 8010d5c:	68fa      	ldr	r2, [r7, #12]
 8010d5e:	605a      	str	r2, [r3, #4]
	pxNewListItem->pxPrevious = pxIndex->pxPrevious;
 8010d60:	68fb      	ldr	r3, [r7, #12]
 8010d62:	689a      	ldr	r2, [r3, #8]
 8010d64:	683b      	ldr	r3, [r7, #0]
 8010d66:	609a      	str	r2, [r3, #8]

	/* Only used during decision coverage testing. */
	mtCOVERAGE_TEST_DELAY();

	pxIndex->pxPrevious->pxNext = pxNewListItem;
 8010d68:	68fb      	ldr	r3, [r7, #12]
 8010d6a:	689b      	ldr	r3, [r3, #8]
 8010d6c:	683a      	ldr	r2, [r7, #0]
 8010d6e:	605a      	str	r2, [r3, #4]
	pxIndex->pxPrevious = pxNewListItem;
 8010d70:	68fb      	ldr	r3, [r7, #12]
 8010d72:	683a      	ldr	r2, [r7, #0]
 8010d74:	609a      	str	r2, [r3, #8]

	/* Remember which list the item is in. */
	pxNewListItem->pxContainer = pxList;
 8010d76:	683b      	ldr	r3, [r7, #0]
 8010d78:	687a      	ldr	r2, [r7, #4]
 8010d7a:	611a      	str	r2, [r3, #16]

	( pxList->uxNumberOfItems )++;
 8010d7c:	687b      	ldr	r3, [r7, #4]
 8010d7e:	681b      	ldr	r3, [r3, #0]
 8010d80:	1c5a      	adds	r2, r3, #1
 8010d82:	687b      	ldr	r3, [r7, #4]
 8010d84:	601a      	str	r2, [r3, #0]
}
 8010d86:	bf00      	nop
 8010d88:	3714      	adds	r7, #20
 8010d8a:	46bd      	mov	sp, r7
 8010d8c:	f85d 7b04 	ldr.w	r7, [sp], #4
 8010d90:	4770      	bx	lr

08010d92 <vListInsert>:
/*-----------------------------------------------------------*/

void vListInsert( List_t * const pxList, ListItem_t * const pxNewListItem )
{
 8010d92:	b480      	push	{r7}
 8010d94:	b085      	sub	sp, #20
 8010d96:	af00      	add	r7, sp, #0
 8010d98:	6078      	str	r0, [r7, #4]
 8010d9a:	6039      	str	r1, [r7, #0]
ListItem_t *pxIterator;
const TickType_t xValueOfInsertion = pxNewListItem->xItemValue;
 8010d9c:	683b      	ldr	r3, [r7, #0]
 8010d9e:	681b      	ldr	r3, [r3, #0]
 8010da0:	60bb      	str	r3, [r7, #8]
	new list item should be placed after it.  This ensures that TCBs which are
	stored in ready lists (all of which have the same xItemValue value) get a
	share of the CPU.  However, if the xItemValue is the same as the back marker
	the iteration loop below will not end.  Therefore the value is checked
	first, and the algorithm slightly modified if necessary. */
	if( xValueOfInsertion == portMAX_DELAY )
 8010da2:	68bb      	ldr	r3, [r7, #8]
 8010da4:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8010da8:	d103      	bne.n	8010db2 <vListInsert+0x20>
	{
		pxIterator = pxList->xListEnd.pxPrevious;
 8010daa:	687b      	ldr	r3, [r7, #4]
 8010dac:	691b      	ldr	r3, [r3, #16]
 8010dae:	60fb      	str	r3, [r7, #12]
 8010db0:	e00c      	b.n	8010dcc <vListInsert+0x3a>
			4) Using a queue or semaphore before it has been initialised or
			   before the scheduler has been started (are interrupts firing
			   before vTaskStartScheduler() has been called?).
		**********************************************************************/

		for( pxIterator = ( ListItem_t * ) &( pxList->xListEnd ); pxIterator->pxNext->xItemValue <= xValueOfInsertion; pxIterator = pxIterator->pxNext ) /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM.  This is checked and valid. *//*lint !e440 The iterator moves to a different value, not xValueOfInsertion. */
 8010db2:	687b      	ldr	r3, [r7, #4]
 8010db4:	3308      	adds	r3, #8
 8010db6:	60fb      	str	r3, [r7, #12]
 8010db8:	e002      	b.n	8010dc0 <vListInsert+0x2e>
 8010dba:	68fb      	ldr	r3, [r7, #12]
 8010dbc:	685b      	ldr	r3, [r3, #4]
 8010dbe:	60fb      	str	r3, [r7, #12]
 8010dc0:	68fb      	ldr	r3, [r7, #12]
 8010dc2:	685b      	ldr	r3, [r3, #4]
 8010dc4:	681b      	ldr	r3, [r3, #0]
 8010dc6:	68ba      	ldr	r2, [r7, #8]
 8010dc8:	429a      	cmp	r2, r3
 8010dca:	d2f6      	bcs.n	8010dba <vListInsert+0x28>
			/* There is nothing to do here, just iterating to the wanted
			insertion position. */
		}
	}

	pxNewListItem->pxNext = pxIterator->pxNext;
 8010dcc:	68fb      	ldr	r3, [r7, #12]
 8010dce:	685a      	ldr	r2, [r3, #4]
 8010dd0:	683b      	ldr	r3, [r7, #0]
 8010dd2:	605a      	str	r2, [r3, #4]
	pxNewListItem->pxNext->pxPrevious = pxNewListItem;
 8010dd4:	683b      	ldr	r3, [r7, #0]
 8010dd6:	685b      	ldr	r3, [r3, #4]
 8010dd8:	683a      	ldr	r2, [r7, #0]
 8010dda:	609a      	str	r2, [r3, #8]
	pxNewListItem->pxPrevious = pxIterator;
 8010ddc:	683b      	ldr	r3, [r7, #0]
 8010dde:	68fa      	ldr	r2, [r7, #12]
 8010de0:	609a      	str	r2, [r3, #8]
	pxIterator->pxNext = pxNewListItem;
 8010de2:	68fb      	ldr	r3, [r7, #12]
 8010de4:	683a      	ldr	r2, [r7, #0]
 8010de6:	605a      	str	r2, [r3, #4]

	/* Remember which list the item is in.  This allows fast removal of the
	item later. */
	pxNewListItem->pxContainer = pxList;
 8010de8:	683b      	ldr	r3, [r7, #0]
 8010dea:	687a      	ldr	r2, [r7, #4]
 8010dec:	611a      	str	r2, [r3, #16]

	( pxList->uxNumberOfItems )++;
 8010dee:	687b      	ldr	r3, [r7, #4]
 8010df0:	681b      	ldr	r3, [r3, #0]
 8010df2:	1c5a      	adds	r2, r3, #1
 8010df4:	687b      	ldr	r3, [r7, #4]
 8010df6:	601a      	str	r2, [r3, #0]
}
 8010df8:	bf00      	nop
 8010dfa:	3714      	adds	r7, #20
 8010dfc:	46bd      	mov	sp, r7
 8010dfe:	f85d 7b04 	ldr.w	r7, [sp], #4
 8010e02:	4770      	bx	lr

08010e04 <uxListRemove>:
/*-----------------------------------------------------------*/

UBaseType_t uxListRemove( ListItem_t * const pxItemToRemove )
{
 8010e04:	b480      	push	{r7}
 8010e06:	b085      	sub	sp, #20
 8010e08:	af00      	add	r7, sp, #0
 8010e0a:	6078      	str	r0, [r7, #4]
/* The list item knows which list it is in.  Obtain the list from the list
item. */
List_t * const pxList = pxItemToRemove->pxContainer;
 8010e0c:	687b      	ldr	r3, [r7, #4]
 8010e0e:	691b      	ldr	r3, [r3, #16]
 8010e10:	60fb      	str	r3, [r7, #12]

	pxItemToRemove->pxNext->pxPrevious = pxItemToRemove->pxPrevious;
 8010e12:	687b      	ldr	r3, [r7, #4]
 8010e14:	685b      	ldr	r3, [r3, #4]
 8010e16:	687a      	ldr	r2, [r7, #4]
 8010e18:	6892      	ldr	r2, [r2, #8]
 8010e1a:	609a      	str	r2, [r3, #8]
	pxItemToRemove->pxPrevious->pxNext = pxItemToRemove->pxNext;
 8010e1c:	687b      	ldr	r3, [r7, #4]
 8010e1e:	689b      	ldr	r3, [r3, #8]
 8010e20:	687a      	ldr	r2, [r7, #4]
 8010e22:	6852      	ldr	r2, [r2, #4]
 8010e24:	605a      	str	r2, [r3, #4]

	/* Only used during decision coverage testing. */
	mtCOVERAGE_TEST_DELAY();

	/* Make sure the index is left pointing to a valid item. */
	if( pxList->pxIndex == pxItemToRemove )
 8010e26:	68fb      	ldr	r3, [r7, #12]
 8010e28:	685b      	ldr	r3, [r3, #4]
 8010e2a:	687a      	ldr	r2, [r7, #4]
 8010e2c:	429a      	cmp	r2, r3
 8010e2e:	d103      	bne.n	8010e38 <uxListRemove+0x34>
	{
		pxList->pxIndex = pxItemToRemove->pxPrevious;
 8010e30:	687b      	ldr	r3, [r7, #4]
 8010e32:	689a      	ldr	r2, [r3, #8]
 8010e34:	68fb      	ldr	r3, [r7, #12]
 8010e36:	605a      	str	r2, [r3, #4]
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}

	pxItemToRemove->pxContainer = NULL;
 8010e38:	687b      	ldr	r3, [r7, #4]
 8010e3a:	2200      	movs	r2, #0
 8010e3c:	611a      	str	r2, [r3, #16]
	( pxList->uxNumberOfItems )--;
 8010e3e:	68fb      	ldr	r3, [r7, #12]
 8010e40:	681b      	ldr	r3, [r3, #0]
 8010e42:	1e5a      	subs	r2, r3, #1
 8010e44:	68fb      	ldr	r3, [r7, #12]
 8010e46:	601a      	str	r2, [r3, #0]

	return pxList->uxNumberOfItems;
 8010e48:	68fb      	ldr	r3, [r7, #12]
 8010e4a:	681b      	ldr	r3, [r3, #0]
}
 8010e4c:	4618      	mov	r0, r3
 8010e4e:	3714      	adds	r7, #20
 8010e50:	46bd      	mov	sp, r7
 8010e52:	f85d 7b04 	ldr.w	r7, [sp], #4
 8010e56:	4770      	bx	lr

08010e58 <xQueueGenericReset>:
	}														\
	taskEXIT_CRITICAL()
/*-----------------------------------------------------------*/

BaseType_t xQueueGenericReset( QueueHandle_t xQueue, BaseType_t xNewQueue )
{
 8010e58:	b580      	push	{r7, lr}
 8010e5a:	b084      	sub	sp, #16
 8010e5c:	af00      	add	r7, sp, #0
 8010e5e:	6078      	str	r0, [r7, #4]
 8010e60:	6039      	str	r1, [r7, #0]
Queue_t * const pxQueue = xQueue;
 8010e62:	687b      	ldr	r3, [r7, #4]
 8010e64:	60fb      	str	r3, [r7, #12]

	configASSERT( pxQueue );
 8010e66:	68fb      	ldr	r3, [r7, #12]
 8010e68:	2b00      	cmp	r3, #0
 8010e6a:	d10b      	bne.n	8010e84 <xQueueGenericReset+0x2c>

portFORCE_INLINE static void vPortRaiseBASEPRI( void )
{
uint32_t ulNewBASEPRI;

	__asm volatile
 8010e6c:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8010e70:	f383 8811 	msr	BASEPRI, r3
 8010e74:	f3bf 8f6f 	isb	sy
 8010e78:	f3bf 8f4f 	dsb	sy
 8010e7c:	60bb      	str	r3, [r7, #8]
		"	msr basepri, %0											\n" \
		"	isb														\n" \
		"	dsb														\n" \
		:"=r" (ulNewBASEPRI) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
	);
}
 8010e7e:	bf00      	nop
 8010e80:	bf00      	nop
 8010e82:	e7fd      	b.n	8010e80 <xQueueGenericReset+0x28>

	taskENTER_CRITICAL();
 8010e84:	f003 fbf0 	bl	8014668 <vPortEnterCritical>
	{
		pxQueue->u.xQueue.pcTail = pxQueue->pcHead + ( pxQueue->uxLength * pxQueue->uxItemSize ); /*lint !e9016 Pointer arithmetic allowed on char types, especially when it assists conveying intent. */
 8010e88:	68fb      	ldr	r3, [r7, #12]
 8010e8a:	681a      	ldr	r2, [r3, #0]
 8010e8c:	68fb      	ldr	r3, [r7, #12]
 8010e8e:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 8010e90:	68f9      	ldr	r1, [r7, #12]
 8010e92:	6c09      	ldr	r1, [r1, #64]	@ 0x40
 8010e94:	fb01 f303 	mul.w	r3, r1, r3
 8010e98:	441a      	add	r2, r3
 8010e9a:	68fb      	ldr	r3, [r7, #12]
 8010e9c:	609a      	str	r2, [r3, #8]
		pxQueue->uxMessagesWaiting = ( UBaseType_t ) 0U;
 8010e9e:	68fb      	ldr	r3, [r7, #12]
 8010ea0:	2200      	movs	r2, #0
 8010ea2:	639a      	str	r2, [r3, #56]	@ 0x38
		pxQueue->pcWriteTo = pxQueue->pcHead;
 8010ea4:	68fb      	ldr	r3, [r7, #12]
 8010ea6:	681a      	ldr	r2, [r3, #0]
 8010ea8:	68fb      	ldr	r3, [r7, #12]
 8010eaa:	605a      	str	r2, [r3, #4]
		pxQueue->u.xQueue.pcReadFrom = pxQueue->pcHead + ( ( pxQueue->uxLength - 1U ) * pxQueue->uxItemSize ); /*lint !e9016 Pointer arithmetic allowed on char types, especially when it assists conveying intent. */
 8010eac:	68fb      	ldr	r3, [r7, #12]
 8010eae:	681a      	ldr	r2, [r3, #0]
 8010eb0:	68fb      	ldr	r3, [r7, #12]
 8010eb2:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 8010eb4:	3b01      	subs	r3, #1
 8010eb6:	68f9      	ldr	r1, [r7, #12]
 8010eb8:	6c09      	ldr	r1, [r1, #64]	@ 0x40
 8010eba:	fb01 f303 	mul.w	r3, r1, r3
 8010ebe:	441a      	add	r2, r3
 8010ec0:	68fb      	ldr	r3, [r7, #12]
 8010ec2:	60da      	str	r2, [r3, #12]
		pxQueue->cRxLock = queueUNLOCKED;
 8010ec4:	68fb      	ldr	r3, [r7, #12]
 8010ec6:	22ff      	movs	r2, #255	@ 0xff
 8010ec8:	f883 2044 	strb.w	r2, [r3, #68]	@ 0x44
		pxQueue->cTxLock = queueUNLOCKED;
 8010ecc:	68fb      	ldr	r3, [r7, #12]
 8010ece:	22ff      	movs	r2, #255	@ 0xff
 8010ed0:	f883 2045 	strb.w	r2, [r3, #69]	@ 0x45

		if( xNewQueue == pdFALSE )
 8010ed4:	683b      	ldr	r3, [r7, #0]
 8010ed6:	2b00      	cmp	r3, #0
 8010ed8:	d114      	bne.n	8010f04 <xQueueGenericReset+0xac>
			/* If there are tasks blocked waiting to read from the queue, then
			the tasks will remain blocked as after this function exits the queue
			will still be empty.  If there are tasks blocked waiting to write to
			the queue, then one should be unblocked as after this function exits
			it will be possible to write to it. */
			if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
 8010eda:	68fb      	ldr	r3, [r7, #12]
 8010edc:	691b      	ldr	r3, [r3, #16]
 8010ede:	2b00      	cmp	r3, #0
 8010ee0:	d01a      	beq.n	8010f18 <xQueueGenericReset+0xc0>
			{
				if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
 8010ee2:	68fb      	ldr	r3, [r7, #12]
 8010ee4:	3310      	adds	r3, #16
 8010ee6:	4618      	mov	r0, r3
 8010ee8:	f002 f922 	bl	8013130 <xTaskRemoveFromEventList>
 8010eec:	4603      	mov	r3, r0
 8010eee:	2b00      	cmp	r3, #0
 8010ef0:	d012      	beq.n	8010f18 <xQueueGenericReset+0xc0>
				{
					queueYIELD_IF_USING_PREEMPTION();
 8010ef2:	4b0d      	ldr	r3, [pc, #52]	@ (8010f28 <xQueueGenericReset+0xd0>)
 8010ef4:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8010ef8:	601a      	str	r2, [r3, #0]
 8010efa:	f3bf 8f4f 	dsb	sy
 8010efe:	f3bf 8f6f 	isb	sy
 8010f02:	e009      	b.n	8010f18 <xQueueGenericReset+0xc0>
			}
		}
		else
		{
			/* Ensure the event queues start in the correct state. */
			vListInitialise( &( pxQueue->xTasksWaitingToSend ) );
 8010f04:	68fb      	ldr	r3, [r7, #12]
 8010f06:	3310      	adds	r3, #16
 8010f08:	4618      	mov	r0, r3
 8010f0a:	f7ff fef1 	bl	8010cf0 <vListInitialise>
			vListInitialise( &( pxQueue->xTasksWaitingToReceive ) );
 8010f0e:	68fb      	ldr	r3, [r7, #12]
 8010f10:	3324      	adds	r3, #36	@ 0x24
 8010f12:	4618      	mov	r0, r3
 8010f14:	f7ff feec 	bl	8010cf0 <vListInitialise>
		}
	}
	taskEXIT_CRITICAL();
 8010f18:	f003 fbd8 	bl	80146cc <vPortExitCritical>

	/* A value is returned for calling semantic consistency with previous
	versions. */
	return pdPASS;
 8010f1c:	2301      	movs	r3, #1
}
 8010f1e:	4618      	mov	r0, r3
 8010f20:	3710      	adds	r7, #16
 8010f22:	46bd      	mov	sp, r7
 8010f24:	bd80      	pop	{r7, pc}
 8010f26:	bf00      	nop
 8010f28:	e000ed04 	.word	0xe000ed04

08010f2c <xQueueGenericCreateStatic>:
/*-----------------------------------------------------------*/

#if( configSUPPORT_STATIC_ALLOCATION == 1 )

	QueueHandle_t xQueueGenericCreateStatic( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, uint8_t *pucQueueStorage, StaticQueue_t *pxStaticQueue, const uint8_t ucQueueType )
	{
 8010f2c:	b580      	push	{r7, lr}
 8010f2e:	b08e      	sub	sp, #56	@ 0x38
 8010f30:	af02      	add	r7, sp, #8
 8010f32:	60f8      	str	r0, [r7, #12]
 8010f34:	60b9      	str	r1, [r7, #8]
 8010f36:	607a      	str	r2, [r7, #4]
 8010f38:	603b      	str	r3, [r7, #0]
	Queue_t *pxNewQueue;

		configASSERT( uxQueueLength > ( UBaseType_t ) 0 );
 8010f3a:	68fb      	ldr	r3, [r7, #12]
 8010f3c:	2b00      	cmp	r3, #0
 8010f3e:	d10b      	bne.n	8010f58 <xQueueGenericCreateStatic+0x2c>
	__asm volatile
 8010f40:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8010f44:	f383 8811 	msr	BASEPRI, r3
 8010f48:	f3bf 8f6f 	isb	sy
 8010f4c:	f3bf 8f4f 	dsb	sy
 8010f50:	62bb      	str	r3, [r7, #40]	@ 0x28
}
 8010f52:	bf00      	nop
 8010f54:	bf00      	nop
 8010f56:	e7fd      	b.n	8010f54 <xQueueGenericCreateStatic+0x28>

		/* The StaticQueue_t structure and the queue storage area must be
		supplied. */
		configASSERT( pxStaticQueue != NULL );
 8010f58:	683b      	ldr	r3, [r7, #0]
 8010f5a:	2b00      	cmp	r3, #0
 8010f5c:	d10b      	bne.n	8010f76 <xQueueGenericCreateStatic+0x4a>
	__asm volatile
 8010f5e:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8010f62:	f383 8811 	msr	BASEPRI, r3
 8010f66:	f3bf 8f6f 	isb	sy
 8010f6a:	f3bf 8f4f 	dsb	sy
 8010f6e:	627b      	str	r3, [r7, #36]	@ 0x24
}
 8010f70:	bf00      	nop
 8010f72:	bf00      	nop
 8010f74:	e7fd      	b.n	8010f72 <xQueueGenericCreateStatic+0x46>

		/* A queue storage area should be provided if the item size is not 0, and
		should not be provided if the item size is 0. */
		configASSERT( !( ( pucQueueStorage != NULL ) && ( uxItemSize == 0 ) ) );
 8010f76:	687b      	ldr	r3, [r7, #4]
 8010f78:	2b00      	cmp	r3, #0
 8010f7a:	d002      	beq.n	8010f82 <xQueueGenericCreateStatic+0x56>
 8010f7c:	68bb      	ldr	r3, [r7, #8]
 8010f7e:	2b00      	cmp	r3, #0
 8010f80:	d001      	beq.n	8010f86 <xQueueGenericCreateStatic+0x5a>
 8010f82:	2301      	movs	r3, #1
 8010f84:	e000      	b.n	8010f88 <xQueueGenericCreateStatic+0x5c>
 8010f86:	2300      	movs	r3, #0
 8010f88:	2b00      	cmp	r3, #0
 8010f8a:	d10b      	bne.n	8010fa4 <xQueueGenericCreateStatic+0x78>
	__asm volatile
 8010f8c:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8010f90:	f383 8811 	msr	BASEPRI, r3
 8010f94:	f3bf 8f6f 	isb	sy
 8010f98:	f3bf 8f4f 	dsb	sy
 8010f9c:	623b      	str	r3, [r7, #32]
}
 8010f9e:	bf00      	nop
 8010fa0:	bf00      	nop
 8010fa2:	e7fd      	b.n	8010fa0 <xQueueGenericCreateStatic+0x74>
		configASSERT( !( ( pucQueueStorage == NULL ) && ( uxItemSize != 0 ) ) );
 8010fa4:	687b      	ldr	r3, [r7, #4]
 8010fa6:	2b00      	cmp	r3, #0
 8010fa8:	d102      	bne.n	8010fb0 <xQueueGenericCreateStatic+0x84>
 8010faa:	68bb      	ldr	r3, [r7, #8]
 8010fac:	2b00      	cmp	r3, #0
 8010fae:	d101      	bne.n	8010fb4 <xQueueGenericCreateStatic+0x88>
 8010fb0:	2301      	movs	r3, #1
 8010fb2:	e000      	b.n	8010fb6 <xQueueGenericCreateStatic+0x8a>
 8010fb4:	2300      	movs	r3, #0
 8010fb6:	2b00      	cmp	r3, #0
 8010fb8:	d10b      	bne.n	8010fd2 <xQueueGenericCreateStatic+0xa6>
	__asm volatile
 8010fba:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8010fbe:	f383 8811 	msr	BASEPRI, r3
 8010fc2:	f3bf 8f6f 	isb	sy
 8010fc6:	f3bf 8f4f 	dsb	sy
 8010fca:	61fb      	str	r3, [r7, #28]
}
 8010fcc:	bf00      	nop
 8010fce:	bf00      	nop
 8010fd0:	e7fd      	b.n	8010fce <xQueueGenericCreateStatic+0xa2>
		#if( configASSERT_DEFINED == 1 )
		{
			/* Sanity check that the size of the structure used to declare a
			variable of type StaticQueue_t or StaticSemaphore_t equals the size of
			the real queue and semaphore structures. */
			volatile size_t xSize = sizeof( StaticQueue_t );
 8010fd2:	2350      	movs	r3, #80	@ 0x50
 8010fd4:	617b      	str	r3, [r7, #20]
			configASSERT( xSize == sizeof( Queue_t ) );
 8010fd6:	697b      	ldr	r3, [r7, #20]
 8010fd8:	2b50      	cmp	r3, #80	@ 0x50
 8010fda:	d00b      	beq.n	8010ff4 <xQueueGenericCreateStatic+0xc8>
	__asm volatile
 8010fdc:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8010fe0:	f383 8811 	msr	BASEPRI, r3
 8010fe4:	f3bf 8f6f 	isb	sy
 8010fe8:	f3bf 8f4f 	dsb	sy
 8010fec:	61bb      	str	r3, [r7, #24]
}
 8010fee:	bf00      	nop
 8010ff0:	bf00      	nop
 8010ff2:	e7fd      	b.n	8010ff0 <xQueueGenericCreateStatic+0xc4>
			( void ) xSize; /* Keeps lint quiet when configASSERT() is not defined. */
 8010ff4:	697b      	ldr	r3, [r7, #20]
		#endif /* configASSERT_DEFINED */

		/* The address of a statically allocated queue was passed in, use it.
		The address of a statically allocated storage area was also passed in
		but is already set. */
		pxNewQueue = ( Queue_t * ) pxStaticQueue; /*lint !e740 !e9087 Unusual cast is ok as the structures are designed to have the same alignment, and the size is checked by an assert. */
 8010ff6:	683b      	ldr	r3, [r7, #0]
 8010ff8:	62fb      	str	r3, [r7, #44]	@ 0x2c

		if( pxNewQueue != NULL )
 8010ffa:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8010ffc:	2b00      	cmp	r3, #0
 8010ffe:	d00d      	beq.n	801101c <xQueueGenericCreateStatic+0xf0>
			#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
			{
				/* Queues can be allocated wither statically or dynamically, so
				note this queue was allocated statically in case the queue is
				later deleted. */
				pxNewQueue->ucStaticallyAllocated = pdTRUE;
 8011000:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8011002:	2201      	movs	r2, #1
 8011004:	f883 2046 	strb.w	r2, [r3, #70]	@ 0x46
			}
			#endif /* configSUPPORT_DYNAMIC_ALLOCATION */

			prvInitialiseNewQueue( uxQueueLength, uxItemSize, pucQueueStorage, ucQueueType, pxNewQueue );
 8011008:	f897 2038 	ldrb.w	r2, [r7, #56]	@ 0x38
 801100c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801100e:	9300      	str	r3, [sp, #0]
 8011010:	4613      	mov	r3, r2
 8011012:	687a      	ldr	r2, [r7, #4]
 8011014:	68b9      	ldr	r1, [r7, #8]
 8011016:	68f8      	ldr	r0, [r7, #12]
 8011018:	f000 f840 	bl	801109c <prvInitialiseNewQueue>
		{
			traceQUEUE_CREATE_FAILED( ucQueueType );
			mtCOVERAGE_TEST_MARKER();
		}

		return pxNewQueue;
 801101c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
	}
 801101e:	4618      	mov	r0, r3
 8011020:	3730      	adds	r7, #48	@ 0x30
 8011022:	46bd      	mov	sp, r7
 8011024:	bd80      	pop	{r7, pc}

08011026 <xQueueGenericCreate>:
/*-----------------------------------------------------------*/

#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )

	QueueHandle_t xQueueGenericCreate( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, const uint8_t ucQueueType )
	{
 8011026:	b580      	push	{r7, lr}
 8011028:	b08a      	sub	sp, #40	@ 0x28
 801102a:	af02      	add	r7, sp, #8
 801102c:	60f8      	str	r0, [r7, #12]
 801102e:	60b9      	str	r1, [r7, #8]
 8011030:	4613      	mov	r3, r2
 8011032:	71fb      	strb	r3, [r7, #7]
	Queue_t *pxNewQueue;
	size_t xQueueSizeInBytes;
	uint8_t *pucQueueStorage;

		configASSERT( uxQueueLength > ( UBaseType_t ) 0 );
 8011034:	68fb      	ldr	r3, [r7, #12]
 8011036:	2b00      	cmp	r3, #0
 8011038:	d10b      	bne.n	8011052 <xQueueGenericCreate+0x2c>
	__asm volatile
 801103a:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801103e:	f383 8811 	msr	BASEPRI, r3
 8011042:	f3bf 8f6f 	isb	sy
 8011046:	f3bf 8f4f 	dsb	sy
 801104a:	613b      	str	r3, [r7, #16]
}
 801104c:	bf00      	nop
 801104e:	bf00      	nop
 8011050:	e7fd      	b.n	801104e <xQueueGenericCreate+0x28>

		/* Allocate enough space to hold the maximum number of items that
		can be in the queue at any time.  It is valid for uxItemSize to be
		zero in the case the queue is used as a semaphore. */
		xQueueSizeInBytes = ( size_t ) ( uxQueueLength * uxItemSize ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
 8011052:	68fb      	ldr	r3, [r7, #12]
 8011054:	68ba      	ldr	r2, [r7, #8]
 8011056:	fb02 f303 	mul.w	r3, r2, r3
 801105a:	61fb      	str	r3, [r7, #28]
		alignment requirements of the Queue_t structure - which in this case
		is an int8_t *.  Therefore, whenever the stack alignment requirements
		are greater than or equal to the pointer to char requirements the cast
		is safe.  In other cases alignment requirements are not strict (one or
		two bytes). */
		pxNewQueue = ( Queue_t * ) pvPortMalloc( sizeof( Queue_t ) + xQueueSizeInBytes ); /*lint !e9087 !e9079 see comment above. */
 801105c:	69fb      	ldr	r3, [r7, #28]
 801105e:	3350      	adds	r3, #80	@ 0x50
 8011060:	4618      	mov	r0, r3
 8011062:	f003 fc23 	bl	80148ac <pvPortMalloc>
 8011066:	61b8      	str	r0, [r7, #24]

		if( pxNewQueue != NULL )
 8011068:	69bb      	ldr	r3, [r7, #24]
 801106a:	2b00      	cmp	r3, #0
 801106c:	d011      	beq.n	8011092 <xQueueGenericCreate+0x6c>
		{
			/* Jump past the queue structure to find the location of the queue
			storage area. */
			pucQueueStorage = ( uint8_t * ) pxNewQueue;
 801106e:	69bb      	ldr	r3, [r7, #24]
 8011070:	617b      	str	r3, [r7, #20]
			pucQueueStorage += sizeof( Queue_t ); /*lint !e9016 Pointer arithmetic allowed on char types, especially when it assists conveying intent. */
 8011072:	697b      	ldr	r3, [r7, #20]
 8011074:	3350      	adds	r3, #80	@ 0x50
 8011076:	617b      	str	r3, [r7, #20]
			#if( configSUPPORT_STATIC_ALLOCATION == 1 )
			{
				/* Queues can be created either statically or dynamically, so
				note this task was created dynamically in case it is later
				deleted. */
				pxNewQueue->ucStaticallyAllocated = pdFALSE;
 8011078:	69bb      	ldr	r3, [r7, #24]
 801107a:	2200      	movs	r2, #0
 801107c:	f883 2046 	strb.w	r2, [r3, #70]	@ 0x46
			}
			#endif /* configSUPPORT_STATIC_ALLOCATION */

			prvInitialiseNewQueue( uxQueueLength, uxItemSize, pucQueueStorage, ucQueueType, pxNewQueue );
 8011080:	79fa      	ldrb	r2, [r7, #7]
 8011082:	69bb      	ldr	r3, [r7, #24]
 8011084:	9300      	str	r3, [sp, #0]
 8011086:	4613      	mov	r3, r2
 8011088:	697a      	ldr	r2, [r7, #20]
 801108a:	68b9      	ldr	r1, [r7, #8]
 801108c:	68f8      	ldr	r0, [r7, #12]
 801108e:	f000 f805 	bl	801109c <prvInitialiseNewQueue>
		{
			traceQUEUE_CREATE_FAILED( ucQueueType );
			mtCOVERAGE_TEST_MARKER();
		}

		return pxNewQueue;
 8011092:	69bb      	ldr	r3, [r7, #24]
	}
 8011094:	4618      	mov	r0, r3
 8011096:	3720      	adds	r7, #32
 8011098:	46bd      	mov	sp, r7
 801109a:	bd80      	pop	{r7, pc}

0801109c <prvInitialiseNewQueue>:

#endif /* configSUPPORT_STATIC_ALLOCATION */
/*-----------------------------------------------------------*/

static void prvInitialiseNewQueue( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, uint8_t *pucQueueStorage, const uint8_t ucQueueType, Queue_t *pxNewQueue )
{
 801109c:	b580      	push	{r7, lr}
 801109e:	b084      	sub	sp, #16
 80110a0:	af00      	add	r7, sp, #0
 80110a2:	60f8      	str	r0, [r7, #12]
 80110a4:	60b9      	str	r1, [r7, #8]
 80110a6:	607a      	str	r2, [r7, #4]
 80110a8:	70fb      	strb	r3, [r7, #3]
	/* Remove compiler warnings about unused parameters should
	configUSE_TRACE_FACILITY not be set to 1. */
	( void ) ucQueueType;

	if( uxItemSize == ( UBaseType_t ) 0 )
 80110aa:	68bb      	ldr	r3, [r7, #8]
 80110ac:	2b00      	cmp	r3, #0
 80110ae:	d103      	bne.n	80110b8 <prvInitialiseNewQueue+0x1c>
	{
		/* No RAM was allocated for the queue storage area, but PC head cannot
		be set to NULL because NULL is used as a key to say the queue is used as
		a mutex.  Therefore just set pcHead to point to the queue as a benign
		value that is known to be within the memory map. */
		pxNewQueue->pcHead = ( int8_t * ) pxNewQueue;
 80110b0:	69bb      	ldr	r3, [r7, #24]
 80110b2:	69ba      	ldr	r2, [r7, #24]
 80110b4:	601a      	str	r2, [r3, #0]
 80110b6:	e002      	b.n	80110be <prvInitialiseNewQueue+0x22>
	}
	else
	{
		/* Set the head to the start of the queue storage area. */
		pxNewQueue->pcHead = ( int8_t * ) pucQueueStorage;
 80110b8:	69bb      	ldr	r3, [r7, #24]
 80110ba:	687a      	ldr	r2, [r7, #4]
 80110bc:	601a      	str	r2, [r3, #0]
	}

	/* Initialise the queue members as described where the queue type is
	defined. */
	pxNewQueue->uxLength = uxQueueLength;
 80110be:	69bb      	ldr	r3, [r7, #24]
 80110c0:	68fa      	ldr	r2, [r7, #12]
 80110c2:	63da      	str	r2, [r3, #60]	@ 0x3c
	pxNewQueue->uxItemSize = uxItemSize;
 80110c4:	69bb      	ldr	r3, [r7, #24]
 80110c6:	68ba      	ldr	r2, [r7, #8]
 80110c8:	641a      	str	r2, [r3, #64]	@ 0x40
	( void ) xQueueGenericReset( pxNewQueue, pdTRUE );
 80110ca:	2101      	movs	r1, #1
 80110cc:	69b8      	ldr	r0, [r7, #24]
 80110ce:	f7ff fec3 	bl	8010e58 <xQueueGenericReset>

	#if ( configUSE_TRACE_FACILITY == 1 )
	{
		pxNewQueue->ucQueueType = ucQueueType;
 80110d2:	69bb      	ldr	r3, [r7, #24]
 80110d4:	78fa      	ldrb	r2, [r7, #3]
 80110d6:	f883 204c 	strb.w	r2, [r3, #76]	@ 0x4c
		pxNewQueue->pxQueueSetContainer = NULL;
	}
	#endif /* configUSE_QUEUE_SETS */

	traceQUEUE_CREATE( pxNewQueue );
}
 80110da:	bf00      	nop
 80110dc:	3710      	adds	r7, #16
 80110de:	46bd      	mov	sp, r7
 80110e0:	bd80      	pop	{r7, pc}

080110e2 <prvInitialiseMutex>:
/*-----------------------------------------------------------*/

#if( configUSE_MUTEXES == 1 )

	static void prvInitialiseMutex( Queue_t *pxNewQueue )
	{
 80110e2:	b580      	push	{r7, lr}
 80110e4:	b082      	sub	sp, #8
 80110e6:	af00      	add	r7, sp, #0
 80110e8:	6078      	str	r0, [r7, #4]
		if( pxNewQueue != NULL )
 80110ea:	687b      	ldr	r3, [r7, #4]
 80110ec:	2b00      	cmp	r3, #0
 80110ee:	d00e      	beq.n	801110e <prvInitialiseMutex+0x2c>
		{
			/* The queue create function will set all the queue structure members
			correctly for a generic queue, but this function is creating a
			mutex.  Overwrite those members that need to be set differently -
			in particular the information required for priority inheritance. */
			pxNewQueue->u.xSemaphore.xMutexHolder = NULL;
 80110f0:	687b      	ldr	r3, [r7, #4]
 80110f2:	2200      	movs	r2, #0
 80110f4:	609a      	str	r2, [r3, #8]
			pxNewQueue->uxQueueType = queueQUEUE_IS_MUTEX;
 80110f6:	687b      	ldr	r3, [r7, #4]
 80110f8:	2200      	movs	r2, #0
 80110fa:	601a      	str	r2, [r3, #0]

			/* In case this is a recursive mutex. */
			pxNewQueue->u.xSemaphore.uxRecursiveCallCount = 0;
 80110fc:	687b      	ldr	r3, [r7, #4]
 80110fe:	2200      	movs	r2, #0
 8011100:	60da      	str	r2, [r3, #12]

			traceCREATE_MUTEX( pxNewQueue );

			/* Start with the semaphore in the expected state. */
			( void ) xQueueGenericSend( pxNewQueue, NULL, ( TickType_t ) 0U, queueSEND_TO_BACK );
 8011102:	2300      	movs	r3, #0
 8011104:	2200      	movs	r2, #0
 8011106:	2100      	movs	r1, #0
 8011108:	6878      	ldr	r0, [r7, #4]
 801110a:	f000 f911 	bl	8011330 <xQueueGenericSend>
		}
		else
		{
			traceCREATE_MUTEX_FAILED();
		}
	}
 801110e:	bf00      	nop
 8011110:	3708      	adds	r7, #8
 8011112:	46bd      	mov	sp, r7
 8011114:	bd80      	pop	{r7, pc}

08011116 <xQueueCreateMutex>:
/*-----------------------------------------------------------*/

#if( ( configUSE_MUTEXES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )

	QueueHandle_t xQueueCreateMutex( const uint8_t ucQueueType )
	{
 8011116:	b580      	push	{r7, lr}
 8011118:	b086      	sub	sp, #24
 801111a:	af00      	add	r7, sp, #0
 801111c:	4603      	mov	r3, r0
 801111e:	71fb      	strb	r3, [r7, #7]
	QueueHandle_t xNewQueue;
	const UBaseType_t uxMutexLength = ( UBaseType_t ) 1, uxMutexSize = ( UBaseType_t ) 0;
 8011120:	2301      	movs	r3, #1
 8011122:	617b      	str	r3, [r7, #20]
 8011124:	2300      	movs	r3, #0
 8011126:	613b      	str	r3, [r7, #16]

		xNewQueue = xQueueGenericCreate( uxMutexLength, uxMutexSize, ucQueueType );
 8011128:	79fb      	ldrb	r3, [r7, #7]
 801112a:	461a      	mov	r2, r3
 801112c:	6939      	ldr	r1, [r7, #16]
 801112e:	6978      	ldr	r0, [r7, #20]
 8011130:	f7ff ff79 	bl	8011026 <xQueueGenericCreate>
 8011134:	60f8      	str	r0, [r7, #12]
		prvInitialiseMutex( ( Queue_t * ) xNewQueue );
 8011136:	68f8      	ldr	r0, [r7, #12]
 8011138:	f7ff ffd3 	bl	80110e2 <prvInitialiseMutex>

		return xNewQueue;
 801113c:	68fb      	ldr	r3, [r7, #12]
	}
 801113e:	4618      	mov	r0, r3
 8011140:	3718      	adds	r7, #24
 8011142:	46bd      	mov	sp, r7
 8011144:	bd80      	pop	{r7, pc}

08011146 <xQueueCreateMutexStatic>:
/*-----------------------------------------------------------*/

#if( ( configUSE_MUTEXES == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )

	QueueHandle_t xQueueCreateMutexStatic( const uint8_t ucQueueType, StaticQueue_t *pxStaticQueue )
	{
 8011146:	b580      	push	{r7, lr}
 8011148:	b088      	sub	sp, #32
 801114a:	af02      	add	r7, sp, #8
 801114c:	4603      	mov	r3, r0
 801114e:	6039      	str	r1, [r7, #0]
 8011150:	71fb      	strb	r3, [r7, #7]
	QueueHandle_t xNewQueue;
	const UBaseType_t uxMutexLength = ( UBaseType_t ) 1, uxMutexSize = ( UBaseType_t ) 0;
 8011152:	2301      	movs	r3, #1
 8011154:	617b      	str	r3, [r7, #20]
 8011156:	2300      	movs	r3, #0
 8011158:	613b      	str	r3, [r7, #16]

		/* Prevent compiler warnings about unused parameters if
		configUSE_TRACE_FACILITY does not equal 1. */
		( void ) ucQueueType;

		xNewQueue = xQueueGenericCreateStatic( uxMutexLength, uxMutexSize, NULL, pxStaticQueue, ucQueueType );
 801115a:	79fb      	ldrb	r3, [r7, #7]
 801115c:	9300      	str	r3, [sp, #0]
 801115e:	683b      	ldr	r3, [r7, #0]
 8011160:	2200      	movs	r2, #0
 8011162:	6939      	ldr	r1, [r7, #16]
 8011164:	6978      	ldr	r0, [r7, #20]
 8011166:	f7ff fee1 	bl	8010f2c <xQueueGenericCreateStatic>
 801116a:	60f8      	str	r0, [r7, #12]
		prvInitialiseMutex( ( Queue_t * ) xNewQueue );
 801116c:	68f8      	ldr	r0, [r7, #12]
 801116e:	f7ff ffb8 	bl	80110e2 <prvInitialiseMutex>

		return xNewQueue;
 8011172:	68fb      	ldr	r3, [r7, #12]
	}
 8011174:	4618      	mov	r0, r3
 8011176:	3718      	adds	r7, #24
 8011178:	46bd      	mov	sp, r7
 801117a:	bd80      	pop	{r7, pc}

0801117c <xQueueGiveMutexRecursive>:
/*-----------------------------------------------------------*/

#if ( configUSE_RECURSIVE_MUTEXES == 1 )

	BaseType_t xQueueGiveMutexRecursive( QueueHandle_t xMutex )
	{
 801117c:	b590      	push	{r4, r7, lr}
 801117e:	b087      	sub	sp, #28
 8011180:	af00      	add	r7, sp, #0
 8011182:	6078      	str	r0, [r7, #4]
	BaseType_t xReturn;
	Queue_t * const pxMutex = ( Queue_t * ) xMutex;
 8011184:	687b      	ldr	r3, [r7, #4]
 8011186:	613b      	str	r3, [r7, #16]

		configASSERT( pxMutex );
 8011188:	693b      	ldr	r3, [r7, #16]
 801118a:	2b00      	cmp	r3, #0
 801118c:	d10b      	bne.n	80111a6 <xQueueGiveMutexRecursive+0x2a>
	__asm volatile
 801118e:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8011192:	f383 8811 	msr	BASEPRI, r3
 8011196:	f3bf 8f6f 	isb	sy
 801119a:	f3bf 8f4f 	dsb	sy
 801119e:	60fb      	str	r3, [r7, #12]
}
 80111a0:	bf00      	nop
 80111a2:	bf00      	nop
 80111a4:	e7fd      	b.n	80111a2 <xQueueGiveMutexRecursive+0x26>
		change outside of this task.  If this task does not hold the mutex then
		pxMutexHolder can never coincidentally equal the tasks handle, and as
		this is the only condition we are interested in it does not matter if
		pxMutexHolder is accessed simultaneously by another task.  Therefore no
		mutual exclusion is required to test the pxMutexHolder variable. */
		if( pxMutex->u.xSemaphore.xMutexHolder == xTaskGetCurrentTaskHandle() )
 80111a6:	693b      	ldr	r3, [r7, #16]
 80111a8:	689c      	ldr	r4, [r3, #8]
 80111aa:	f002 f9af 	bl	801350c <xTaskGetCurrentTaskHandle>
 80111ae:	4603      	mov	r3, r0
 80111b0:	429c      	cmp	r4, r3
 80111b2:	d111      	bne.n	80111d8 <xQueueGiveMutexRecursive+0x5c>
			/* uxRecursiveCallCount cannot be zero if xMutexHolder is equal to
			the task handle, therefore no underflow check is required.  Also,
			uxRecursiveCallCount is only modified by the mutex holder, and as
			there can only be one, no mutual exclusion is required to modify the
			uxRecursiveCallCount member. */
			( pxMutex->u.xSemaphore.uxRecursiveCallCount )--;
 80111b4:	693b      	ldr	r3, [r7, #16]
 80111b6:	68db      	ldr	r3, [r3, #12]
 80111b8:	1e5a      	subs	r2, r3, #1
 80111ba:	693b      	ldr	r3, [r7, #16]
 80111bc:	60da      	str	r2, [r3, #12]

			/* Has the recursive call count unwound to 0? */
			if( pxMutex->u.xSemaphore.uxRecursiveCallCount == ( UBaseType_t ) 0 )
 80111be:	693b      	ldr	r3, [r7, #16]
 80111c0:	68db      	ldr	r3, [r3, #12]
 80111c2:	2b00      	cmp	r3, #0
 80111c4:	d105      	bne.n	80111d2 <xQueueGiveMutexRecursive+0x56>
			{
				/* Return the mutex.  This will automatically unblock any other
				task that might be waiting to access the mutex. */
				( void ) xQueueGenericSend( pxMutex, NULL, queueMUTEX_GIVE_BLOCK_TIME, queueSEND_TO_BACK );
 80111c6:	2300      	movs	r3, #0
 80111c8:	2200      	movs	r2, #0
 80111ca:	2100      	movs	r1, #0
 80111cc:	6938      	ldr	r0, [r7, #16]
 80111ce:	f000 f8af 	bl	8011330 <xQueueGenericSend>
			else
			{
				mtCOVERAGE_TEST_MARKER();
			}

			xReturn = pdPASS;
 80111d2:	2301      	movs	r3, #1
 80111d4:	617b      	str	r3, [r7, #20]
 80111d6:	e001      	b.n	80111dc <xQueueGiveMutexRecursive+0x60>
		}
		else
		{
			/* The mutex cannot be given because the calling task is not the
			holder. */
			xReturn = pdFAIL;
 80111d8:	2300      	movs	r3, #0
 80111da:	617b      	str	r3, [r7, #20]

			traceGIVE_MUTEX_RECURSIVE_FAILED( pxMutex );
		}

		return xReturn;
 80111dc:	697b      	ldr	r3, [r7, #20]
	}
 80111de:	4618      	mov	r0, r3
 80111e0:	371c      	adds	r7, #28
 80111e2:	46bd      	mov	sp, r7
 80111e4:	bd90      	pop	{r4, r7, pc}

080111e6 <xQueueTakeMutexRecursive>:
/*-----------------------------------------------------------*/

#if ( configUSE_RECURSIVE_MUTEXES == 1 )

	BaseType_t xQueueTakeMutexRecursive( QueueHandle_t xMutex, TickType_t xTicksToWait )
	{
 80111e6:	b590      	push	{r4, r7, lr}
 80111e8:	b087      	sub	sp, #28
 80111ea:	af00      	add	r7, sp, #0
 80111ec:	6078      	str	r0, [r7, #4]
 80111ee:	6039      	str	r1, [r7, #0]
	BaseType_t xReturn;
	Queue_t * const pxMutex = ( Queue_t * ) xMutex;
 80111f0:	687b      	ldr	r3, [r7, #4]
 80111f2:	613b      	str	r3, [r7, #16]

		configASSERT( pxMutex );
 80111f4:	693b      	ldr	r3, [r7, #16]
 80111f6:	2b00      	cmp	r3, #0
 80111f8:	d10b      	bne.n	8011212 <xQueueTakeMutexRecursive+0x2c>
	__asm volatile
 80111fa:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80111fe:	f383 8811 	msr	BASEPRI, r3
 8011202:	f3bf 8f6f 	isb	sy
 8011206:	f3bf 8f4f 	dsb	sy
 801120a:	60fb      	str	r3, [r7, #12]
}
 801120c:	bf00      	nop
 801120e:	bf00      	nop
 8011210:	e7fd      	b.n	801120e <xQueueTakeMutexRecursive+0x28>
		/* Comments regarding mutual exclusion as per those within
		xQueueGiveMutexRecursive(). */

		traceTAKE_MUTEX_RECURSIVE( pxMutex );

		if( pxMutex->u.xSemaphore.xMutexHolder == xTaskGetCurrentTaskHandle() )
 8011212:	693b      	ldr	r3, [r7, #16]
 8011214:	689c      	ldr	r4, [r3, #8]
 8011216:	f002 f979 	bl	801350c <xTaskGetCurrentTaskHandle>
 801121a:	4603      	mov	r3, r0
 801121c:	429c      	cmp	r4, r3
 801121e:	d107      	bne.n	8011230 <xQueueTakeMutexRecursive+0x4a>
		{
			( pxMutex->u.xSemaphore.uxRecursiveCallCount )++;
 8011220:	693b      	ldr	r3, [r7, #16]
 8011222:	68db      	ldr	r3, [r3, #12]
 8011224:	1c5a      	adds	r2, r3, #1
 8011226:	693b      	ldr	r3, [r7, #16]
 8011228:	60da      	str	r2, [r3, #12]
			xReturn = pdPASS;
 801122a:	2301      	movs	r3, #1
 801122c:	617b      	str	r3, [r7, #20]
 801122e:	e00c      	b.n	801124a <xQueueTakeMutexRecursive+0x64>
		}
		else
		{
			xReturn = xQueueSemaphoreTake( pxMutex, xTicksToWait );
 8011230:	6839      	ldr	r1, [r7, #0]
 8011232:	6938      	ldr	r0, [r7, #16]
 8011234:	f000 fb8e 	bl	8011954 <xQueueSemaphoreTake>
 8011238:	6178      	str	r0, [r7, #20]

			/* pdPASS will only be returned if the mutex was successfully
			obtained.  The calling task may have entered the Blocked state
			before reaching here. */
			if( xReturn != pdFAIL )
 801123a:	697b      	ldr	r3, [r7, #20]
 801123c:	2b00      	cmp	r3, #0
 801123e:	d004      	beq.n	801124a <xQueueTakeMutexRecursive+0x64>
			{
				( pxMutex->u.xSemaphore.uxRecursiveCallCount )++;
 8011240:	693b      	ldr	r3, [r7, #16]
 8011242:	68db      	ldr	r3, [r3, #12]
 8011244:	1c5a      	adds	r2, r3, #1
 8011246:	693b      	ldr	r3, [r7, #16]
 8011248:	60da      	str	r2, [r3, #12]
			{
				traceTAKE_MUTEX_RECURSIVE_FAILED( pxMutex );
			}
		}

		return xReturn;
 801124a:	697b      	ldr	r3, [r7, #20]
	}
 801124c:	4618      	mov	r0, r3
 801124e:	371c      	adds	r7, #28
 8011250:	46bd      	mov	sp, r7
 8011252:	bd90      	pop	{r4, r7, pc}

08011254 <xQueueCreateCountingSemaphoreStatic>:
/*-----------------------------------------------------------*/

#if( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )

	QueueHandle_t xQueueCreateCountingSemaphoreStatic( const UBaseType_t uxMaxCount, const UBaseType_t uxInitialCount, StaticQueue_t *pxStaticQueue )
	{
 8011254:	b580      	push	{r7, lr}
 8011256:	b08a      	sub	sp, #40	@ 0x28
 8011258:	af02      	add	r7, sp, #8
 801125a:	60f8      	str	r0, [r7, #12]
 801125c:	60b9      	str	r1, [r7, #8]
 801125e:	607a      	str	r2, [r7, #4]
	QueueHandle_t xHandle;

		configASSERT( uxMaxCount != 0 );
 8011260:	68fb      	ldr	r3, [r7, #12]
 8011262:	2b00      	cmp	r3, #0
 8011264:	d10b      	bne.n	801127e <xQueueCreateCountingSemaphoreStatic+0x2a>
	__asm volatile
 8011266:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801126a:	f383 8811 	msr	BASEPRI, r3
 801126e:	f3bf 8f6f 	isb	sy
 8011272:	f3bf 8f4f 	dsb	sy
 8011276:	61bb      	str	r3, [r7, #24]
}
 8011278:	bf00      	nop
 801127a:	bf00      	nop
 801127c:	e7fd      	b.n	801127a <xQueueCreateCountingSemaphoreStatic+0x26>
		configASSERT( uxInitialCount <= uxMaxCount );
 801127e:	68ba      	ldr	r2, [r7, #8]
 8011280:	68fb      	ldr	r3, [r7, #12]
 8011282:	429a      	cmp	r2, r3
 8011284:	d90b      	bls.n	801129e <xQueueCreateCountingSemaphoreStatic+0x4a>
	__asm volatile
 8011286:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801128a:	f383 8811 	msr	BASEPRI, r3
 801128e:	f3bf 8f6f 	isb	sy
 8011292:	f3bf 8f4f 	dsb	sy
 8011296:	617b      	str	r3, [r7, #20]
}
 8011298:	bf00      	nop
 801129a:	bf00      	nop
 801129c:	e7fd      	b.n	801129a <xQueueCreateCountingSemaphoreStatic+0x46>

		xHandle = xQueueGenericCreateStatic( uxMaxCount, queueSEMAPHORE_QUEUE_ITEM_LENGTH, NULL, pxStaticQueue, queueQUEUE_TYPE_COUNTING_SEMAPHORE );
 801129e:	2302      	movs	r3, #2
 80112a0:	9300      	str	r3, [sp, #0]
 80112a2:	687b      	ldr	r3, [r7, #4]
 80112a4:	2200      	movs	r2, #0
 80112a6:	2100      	movs	r1, #0
 80112a8:	68f8      	ldr	r0, [r7, #12]
 80112aa:	f7ff fe3f 	bl	8010f2c <xQueueGenericCreateStatic>
 80112ae:	61f8      	str	r0, [r7, #28]

		if( xHandle != NULL )
 80112b0:	69fb      	ldr	r3, [r7, #28]
 80112b2:	2b00      	cmp	r3, #0
 80112b4:	d002      	beq.n	80112bc <xQueueCreateCountingSemaphoreStatic+0x68>
		{
			( ( Queue_t * ) xHandle )->uxMessagesWaiting = uxInitialCount;
 80112b6:	69fb      	ldr	r3, [r7, #28]
 80112b8:	68ba      	ldr	r2, [r7, #8]
 80112ba:	639a      	str	r2, [r3, #56]	@ 0x38
		else
		{
			traceCREATE_COUNTING_SEMAPHORE_FAILED();
		}

		return xHandle;
 80112bc:	69fb      	ldr	r3, [r7, #28]
	}
 80112be:	4618      	mov	r0, r3
 80112c0:	3720      	adds	r7, #32
 80112c2:	46bd      	mov	sp, r7
 80112c4:	bd80      	pop	{r7, pc}

080112c6 <xQueueCreateCountingSemaphore>:
/*-----------------------------------------------------------*/

#if( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )

	QueueHandle_t xQueueCreateCountingSemaphore( const UBaseType_t uxMaxCount, const UBaseType_t uxInitialCount )
	{
 80112c6:	b580      	push	{r7, lr}
 80112c8:	b086      	sub	sp, #24
 80112ca:	af00      	add	r7, sp, #0
 80112cc:	6078      	str	r0, [r7, #4]
 80112ce:	6039      	str	r1, [r7, #0]
	QueueHandle_t xHandle;

		configASSERT( uxMaxCount != 0 );
 80112d0:	687b      	ldr	r3, [r7, #4]
 80112d2:	2b00      	cmp	r3, #0
 80112d4:	d10b      	bne.n	80112ee <xQueueCreateCountingSemaphore+0x28>
	__asm volatile
 80112d6:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80112da:	f383 8811 	msr	BASEPRI, r3
 80112de:	f3bf 8f6f 	isb	sy
 80112e2:	f3bf 8f4f 	dsb	sy
 80112e6:	613b      	str	r3, [r7, #16]
}
 80112e8:	bf00      	nop
 80112ea:	bf00      	nop
 80112ec:	e7fd      	b.n	80112ea <xQueueCreateCountingSemaphore+0x24>
		configASSERT( uxInitialCount <= uxMaxCount );
 80112ee:	683a      	ldr	r2, [r7, #0]
 80112f0:	687b      	ldr	r3, [r7, #4]
 80112f2:	429a      	cmp	r2, r3
 80112f4:	d90b      	bls.n	801130e <xQueueCreateCountingSemaphore+0x48>
	__asm volatile
 80112f6:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80112fa:	f383 8811 	msr	BASEPRI, r3
 80112fe:	f3bf 8f6f 	isb	sy
 8011302:	f3bf 8f4f 	dsb	sy
 8011306:	60fb      	str	r3, [r7, #12]
}
 8011308:	bf00      	nop
 801130a:	bf00      	nop
 801130c:	e7fd      	b.n	801130a <xQueueCreateCountingSemaphore+0x44>

		xHandle = xQueueGenericCreate( uxMaxCount, queueSEMAPHORE_QUEUE_ITEM_LENGTH, queueQUEUE_TYPE_COUNTING_SEMAPHORE );
 801130e:	2202      	movs	r2, #2
 8011310:	2100      	movs	r1, #0
 8011312:	6878      	ldr	r0, [r7, #4]
 8011314:	f7ff fe87 	bl	8011026 <xQueueGenericCreate>
 8011318:	6178      	str	r0, [r7, #20]

		if( xHandle != NULL )
 801131a:	697b      	ldr	r3, [r7, #20]
 801131c:	2b00      	cmp	r3, #0
 801131e:	d002      	beq.n	8011326 <xQueueCreateCountingSemaphore+0x60>
		{
			( ( Queue_t * ) xHandle )->uxMessagesWaiting = uxInitialCount;
 8011320:	697b      	ldr	r3, [r7, #20]
 8011322:	683a      	ldr	r2, [r7, #0]
 8011324:	639a      	str	r2, [r3, #56]	@ 0x38
		else
		{
			traceCREATE_COUNTING_SEMAPHORE_FAILED();
		}

		return xHandle;
 8011326:	697b      	ldr	r3, [r7, #20]
	}
 8011328:	4618      	mov	r0, r3
 801132a:	3718      	adds	r7, #24
 801132c:	46bd      	mov	sp, r7
 801132e:	bd80      	pop	{r7, pc}

08011330 <xQueueGenericSend>:

#endif /* ( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) */
/*-----------------------------------------------------------*/

BaseType_t xQueueGenericSend( QueueHandle_t xQueue, const void * const pvItemToQueue, TickType_t xTicksToWait, const BaseType_t xCopyPosition )
{
 8011330:	b580      	push	{r7, lr}
 8011332:	b08e      	sub	sp, #56	@ 0x38
 8011334:	af00      	add	r7, sp, #0
 8011336:	60f8      	str	r0, [r7, #12]
 8011338:	60b9      	str	r1, [r7, #8]
 801133a:	607a      	str	r2, [r7, #4]
 801133c:	603b      	str	r3, [r7, #0]
BaseType_t xEntryTimeSet = pdFALSE, xYieldRequired;
 801133e:	2300      	movs	r3, #0
 8011340:	637b      	str	r3, [r7, #52]	@ 0x34
TimeOut_t xTimeOut;
Queue_t * const pxQueue = xQueue;
 8011342:	68fb      	ldr	r3, [r7, #12]
 8011344:	633b      	str	r3, [r7, #48]	@ 0x30

	configASSERT( pxQueue );
 8011346:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8011348:	2b00      	cmp	r3, #0
 801134a:	d10b      	bne.n	8011364 <xQueueGenericSend+0x34>
	__asm volatile
 801134c:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8011350:	f383 8811 	msr	BASEPRI, r3
 8011354:	f3bf 8f6f 	isb	sy
 8011358:	f3bf 8f4f 	dsb	sy
 801135c:	62bb      	str	r3, [r7, #40]	@ 0x28
}
 801135e:	bf00      	nop
 8011360:	bf00      	nop
 8011362:	e7fd      	b.n	8011360 <xQueueGenericSend+0x30>
	configASSERT( !( ( pvItemToQueue == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) );
 8011364:	68bb      	ldr	r3, [r7, #8]
 8011366:	2b00      	cmp	r3, #0
 8011368:	d103      	bne.n	8011372 <xQueueGenericSend+0x42>
 801136a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801136c:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 801136e:	2b00      	cmp	r3, #0
 8011370:	d101      	bne.n	8011376 <xQueueGenericSend+0x46>
 8011372:	2301      	movs	r3, #1
 8011374:	e000      	b.n	8011378 <xQueueGenericSend+0x48>
 8011376:	2300      	movs	r3, #0
 8011378:	2b00      	cmp	r3, #0
 801137a:	d10b      	bne.n	8011394 <xQueueGenericSend+0x64>
	__asm volatile
 801137c:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8011380:	f383 8811 	msr	BASEPRI, r3
 8011384:	f3bf 8f6f 	isb	sy
 8011388:	f3bf 8f4f 	dsb	sy
 801138c:	627b      	str	r3, [r7, #36]	@ 0x24
}
 801138e:	bf00      	nop
 8011390:	bf00      	nop
 8011392:	e7fd      	b.n	8011390 <xQueueGenericSend+0x60>
	configASSERT( !( ( xCopyPosition == queueOVERWRITE ) && ( pxQueue->uxLength != 1 ) ) );
 8011394:	683b      	ldr	r3, [r7, #0]
 8011396:	2b02      	cmp	r3, #2
 8011398:	d103      	bne.n	80113a2 <xQueueGenericSend+0x72>
 801139a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801139c:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 801139e:	2b01      	cmp	r3, #1
 80113a0:	d101      	bne.n	80113a6 <xQueueGenericSend+0x76>
 80113a2:	2301      	movs	r3, #1
 80113a4:	e000      	b.n	80113a8 <xQueueGenericSend+0x78>
 80113a6:	2300      	movs	r3, #0
 80113a8:	2b00      	cmp	r3, #0
 80113aa:	d10b      	bne.n	80113c4 <xQueueGenericSend+0x94>
	__asm volatile
 80113ac:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80113b0:	f383 8811 	msr	BASEPRI, r3
 80113b4:	f3bf 8f6f 	isb	sy
 80113b8:	f3bf 8f4f 	dsb	sy
 80113bc:	623b      	str	r3, [r7, #32]
}
 80113be:	bf00      	nop
 80113c0:	bf00      	nop
 80113c2:	e7fd      	b.n	80113c0 <xQueueGenericSend+0x90>
	#if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )
	{
		configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) );
 80113c4:	f002 f8b2 	bl	801352c <xTaskGetSchedulerState>
 80113c8:	4603      	mov	r3, r0
 80113ca:	2b00      	cmp	r3, #0
 80113cc:	d102      	bne.n	80113d4 <xQueueGenericSend+0xa4>
 80113ce:	687b      	ldr	r3, [r7, #4]
 80113d0:	2b00      	cmp	r3, #0
 80113d2:	d101      	bne.n	80113d8 <xQueueGenericSend+0xa8>
 80113d4:	2301      	movs	r3, #1
 80113d6:	e000      	b.n	80113da <xQueueGenericSend+0xaa>
 80113d8:	2300      	movs	r3, #0
 80113da:	2b00      	cmp	r3, #0
 80113dc:	d10b      	bne.n	80113f6 <xQueueGenericSend+0xc6>
	__asm volatile
 80113de:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80113e2:	f383 8811 	msr	BASEPRI, r3
 80113e6:	f3bf 8f6f 	isb	sy
 80113ea:	f3bf 8f4f 	dsb	sy
 80113ee:	61fb      	str	r3, [r7, #28]
}
 80113f0:	bf00      	nop
 80113f2:	bf00      	nop
 80113f4:	e7fd      	b.n	80113f2 <xQueueGenericSend+0xc2>
	/*lint -save -e904 This function relaxes the coding standard somewhat to
	allow return statements within the function itself.  This is done in the
	interest of execution time efficiency. */
	for( ;; )
	{
		taskENTER_CRITICAL();
 80113f6:	f003 f937 	bl	8014668 <vPortEnterCritical>
		{
			/* Is there room on the queue now?  The running task must be the
			highest priority task wanting to access the queue.  If the head item
			in the queue is to be overwritten then it does not matter if the
			queue is full. */
			if( ( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) || ( xCopyPosition == queueOVERWRITE ) )
 80113fa:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80113fc:	6b9a      	ldr	r2, [r3, #56]	@ 0x38
 80113fe:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8011400:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 8011402:	429a      	cmp	r2, r3
 8011404:	d302      	bcc.n	801140c <xQueueGenericSend+0xdc>
 8011406:	683b      	ldr	r3, [r7, #0]
 8011408:	2b02      	cmp	r3, #2
 801140a:	d129      	bne.n	8011460 <xQueueGenericSend+0x130>
						}
					}
				}
				#else /* configUSE_QUEUE_SETS */
				{
					xYieldRequired = prvCopyDataToQueue( pxQueue, pvItemToQueue, xCopyPosition );
 801140c:	683a      	ldr	r2, [r7, #0]
 801140e:	68b9      	ldr	r1, [r7, #8]
 8011410:	6b38      	ldr	r0, [r7, #48]	@ 0x30
 8011412:	f000 fcab 	bl	8011d6c <prvCopyDataToQueue>
 8011416:	62f8      	str	r0, [r7, #44]	@ 0x2c

					/* If there was a task waiting for data to arrive on the
					queue then unblock it now. */
					if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
 8011418:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801141a:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801141c:	2b00      	cmp	r3, #0
 801141e:	d010      	beq.n	8011442 <xQueueGenericSend+0x112>
					{
						if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
 8011420:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8011422:	3324      	adds	r3, #36	@ 0x24
 8011424:	4618      	mov	r0, r3
 8011426:	f001 fe83 	bl	8013130 <xTaskRemoveFromEventList>
 801142a:	4603      	mov	r3, r0
 801142c:	2b00      	cmp	r3, #0
 801142e:	d013      	beq.n	8011458 <xQueueGenericSend+0x128>
						{
							/* The unblocked task has a priority higher than
							our own so yield immediately.  Yes it is ok to do
							this from within the critical section - the kernel
							takes care of that. */
							queueYIELD_IF_USING_PREEMPTION();
 8011430:	4b3f      	ldr	r3, [pc, #252]	@ (8011530 <xQueueGenericSend+0x200>)
 8011432:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8011436:	601a      	str	r2, [r3, #0]
 8011438:	f3bf 8f4f 	dsb	sy
 801143c:	f3bf 8f6f 	isb	sy
 8011440:	e00a      	b.n	8011458 <xQueueGenericSend+0x128>
						else
						{
							mtCOVERAGE_TEST_MARKER();
						}
					}
					else if( xYieldRequired != pdFALSE )
 8011442:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8011444:	2b00      	cmp	r3, #0
 8011446:	d007      	beq.n	8011458 <xQueueGenericSend+0x128>
					{
						/* This path is a special case that will only get
						executed if the task was holding multiple mutexes and
						the mutexes were given back in an order that is
						different to that in which they were taken. */
						queueYIELD_IF_USING_PREEMPTION();
 8011448:	4b39      	ldr	r3, [pc, #228]	@ (8011530 <xQueueGenericSend+0x200>)
 801144a:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 801144e:	601a      	str	r2, [r3, #0]
 8011450:	f3bf 8f4f 	dsb	sy
 8011454:	f3bf 8f6f 	isb	sy
						mtCOVERAGE_TEST_MARKER();
					}
				}
				#endif /* configUSE_QUEUE_SETS */

				taskEXIT_CRITICAL();
 8011458:	f003 f938 	bl	80146cc <vPortExitCritical>
				return pdPASS;
 801145c:	2301      	movs	r3, #1
 801145e:	e063      	b.n	8011528 <xQueueGenericSend+0x1f8>
			}
			else
			{
				if( xTicksToWait == ( TickType_t ) 0 )
 8011460:	687b      	ldr	r3, [r7, #4]
 8011462:	2b00      	cmp	r3, #0
 8011464:	d103      	bne.n	801146e <xQueueGenericSend+0x13e>
				{
					/* The queue was full and no block time is specified (or
					the block time has expired) so leave now. */
					taskEXIT_CRITICAL();
 8011466:	f003 f931 	bl	80146cc <vPortExitCritical>

					/* Return to the original privilege level before exiting
					the function. */
					traceQUEUE_SEND_FAILED( pxQueue );
					return errQUEUE_FULL;
 801146a:	2300      	movs	r3, #0
 801146c:	e05c      	b.n	8011528 <xQueueGenericSend+0x1f8>
				}
				else if( xEntryTimeSet == pdFALSE )
 801146e:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8011470:	2b00      	cmp	r3, #0
 8011472:	d106      	bne.n	8011482 <xQueueGenericSend+0x152>
				{
					/* The queue was full and a block time was specified so
					configure the timeout structure. */
					vTaskInternalSetTimeOutState( &xTimeOut );
 8011474:	f107 0314 	add.w	r3, r7, #20
 8011478:	4618      	mov	r0, r3
 801147a:	f001 fee5 	bl	8013248 <vTaskInternalSetTimeOutState>
					xEntryTimeSet = pdTRUE;
 801147e:	2301      	movs	r3, #1
 8011480:	637b      	str	r3, [r7, #52]	@ 0x34
					/* Entry time was already set. */
					mtCOVERAGE_TEST_MARKER();
				}
			}
		}
		taskEXIT_CRITICAL();
 8011482:	f003 f923 	bl	80146cc <vPortExitCritical>

		/* Interrupts and other tasks can send to and receive from the queue
		now the critical section has been exited. */

		vTaskSuspendAll();
 8011486:	f001 fc05 	bl	8012c94 <vTaskSuspendAll>
		prvLockQueue( pxQueue );
 801148a:	f003 f8ed 	bl	8014668 <vPortEnterCritical>
 801148e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8011490:	f893 3044 	ldrb.w	r3, [r3, #68]	@ 0x44
 8011494:	b25b      	sxtb	r3, r3
 8011496:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 801149a:	d103      	bne.n	80114a4 <xQueueGenericSend+0x174>
 801149c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801149e:	2200      	movs	r2, #0
 80114a0:	f883 2044 	strb.w	r2, [r3, #68]	@ 0x44
 80114a4:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80114a6:	f893 3045 	ldrb.w	r3, [r3, #69]	@ 0x45
 80114aa:	b25b      	sxtb	r3, r3
 80114ac:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 80114b0:	d103      	bne.n	80114ba <xQueueGenericSend+0x18a>
 80114b2:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80114b4:	2200      	movs	r2, #0
 80114b6:	f883 2045 	strb.w	r2, [r3, #69]	@ 0x45
 80114ba:	f003 f907 	bl	80146cc <vPortExitCritical>

		/* Update the timeout state to see if it has expired yet. */
		if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE )
 80114be:	1d3a      	adds	r2, r7, #4
 80114c0:	f107 0314 	add.w	r3, r7, #20
 80114c4:	4611      	mov	r1, r2
 80114c6:	4618      	mov	r0, r3
 80114c8:	f001 fed4 	bl	8013274 <xTaskCheckForTimeOut>
 80114cc:	4603      	mov	r3, r0
 80114ce:	2b00      	cmp	r3, #0
 80114d0:	d124      	bne.n	801151c <xQueueGenericSend+0x1ec>
		{
			if( prvIsQueueFull( pxQueue ) != pdFALSE )
 80114d2:	6b38      	ldr	r0, [r7, #48]	@ 0x30
 80114d4:	f000 fd42 	bl	8011f5c <prvIsQueueFull>
 80114d8:	4603      	mov	r3, r0
 80114da:	2b00      	cmp	r3, #0
 80114dc:	d018      	beq.n	8011510 <xQueueGenericSend+0x1e0>
			{
				traceBLOCKING_ON_QUEUE_SEND( pxQueue );
				vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToSend ), xTicksToWait );
 80114de:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80114e0:	3310      	adds	r3, #16
 80114e2:	687a      	ldr	r2, [r7, #4]
 80114e4:	4611      	mov	r1, r2
 80114e6:	4618      	mov	r0, r3
 80114e8:	f001 fdd0 	bl	801308c <vTaskPlaceOnEventList>
				/* Unlocking the queue means queue events can effect the
				event list.  It is possible that interrupts occurring now
				remove this task from the event list again - but as the
				scheduler is suspended the task will go onto the pending
				ready last instead of the actual ready list. */
				prvUnlockQueue( pxQueue );
 80114ec:	6b38      	ldr	r0, [r7, #48]	@ 0x30
 80114ee:	f000 fccd 	bl	8011e8c <prvUnlockQueue>
				/* Resuming the scheduler will move tasks from the pending
				ready list into the ready list - so it is feasible that this
				task is already in a ready list before it yields - in which
				case the yield will not cause a context switch unless there
				is also a higher priority task in the pending ready list. */
				if( xTaskResumeAll() == pdFALSE )
 80114f2:	f001 fbdd 	bl	8012cb0 <xTaskResumeAll>
 80114f6:	4603      	mov	r3, r0
 80114f8:	2b00      	cmp	r3, #0
 80114fa:	f47f af7c 	bne.w	80113f6 <xQueueGenericSend+0xc6>
				{
					portYIELD_WITHIN_API();
 80114fe:	4b0c      	ldr	r3, [pc, #48]	@ (8011530 <xQueueGenericSend+0x200>)
 8011500:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8011504:	601a      	str	r2, [r3, #0]
 8011506:	f3bf 8f4f 	dsb	sy
 801150a:	f3bf 8f6f 	isb	sy
 801150e:	e772      	b.n	80113f6 <xQueueGenericSend+0xc6>
				}
			}
			else
			{
				/* Try again. */
				prvUnlockQueue( pxQueue );
 8011510:	6b38      	ldr	r0, [r7, #48]	@ 0x30
 8011512:	f000 fcbb 	bl	8011e8c <prvUnlockQueue>
				( void ) xTaskResumeAll();
 8011516:	f001 fbcb 	bl	8012cb0 <xTaskResumeAll>
 801151a:	e76c      	b.n	80113f6 <xQueueGenericSend+0xc6>
			}
		}
		else
		{
			/* The timeout has expired. */
			prvUnlockQueue( pxQueue );
 801151c:	6b38      	ldr	r0, [r7, #48]	@ 0x30
 801151e:	f000 fcb5 	bl	8011e8c <prvUnlockQueue>
			( void ) xTaskResumeAll();
 8011522:	f001 fbc5 	bl	8012cb0 <xTaskResumeAll>

			traceQUEUE_SEND_FAILED( pxQueue );
			return errQUEUE_FULL;
 8011526:	2300      	movs	r3, #0
		}
	} /*lint -restore */
}
 8011528:	4618      	mov	r0, r3
 801152a:	3738      	adds	r7, #56	@ 0x38
 801152c:	46bd      	mov	sp, r7
 801152e:	bd80      	pop	{r7, pc}
 8011530:	e000ed04 	.word	0xe000ed04

08011534 <xQueueGenericSendFromISR>:
/*-----------------------------------------------------------*/

BaseType_t xQueueGenericSendFromISR( QueueHandle_t xQueue, const void * const pvItemToQueue, BaseType_t * const pxHigherPriorityTaskWoken, const BaseType_t xCopyPosition )
{
 8011534:	b580      	push	{r7, lr}
 8011536:	b090      	sub	sp, #64	@ 0x40
 8011538:	af00      	add	r7, sp, #0
 801153a:	60f8      	str	r0, [r7, #12]
 801153c:	60b9      	str	r1, [r7, #8]
 801153e:	607a      	str	r2, [r7, #4]
 8011540:	603b      	str	r3, [r7, #0]
BaseType_t xReturn;
UBaseType_t uxSavedInterruptStatus;
Queue_t * const pxQueue = xQueue;
 8011542:	68fb      	ldr	r3, [r7, #12]
 8011544:	63bb      	str	r3, [r7, #56]	@ 0x38

	configASSERT( pxQueue );
 8011546:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8011548:	2b00      	cmp	r3, #0
 801154a:	d10b      	bne.n	8011564 <xQueueGenericSendFromISR+0x30>
	__asm volatile
 801154c:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8011550:	f383 8811 	msr	BASEPRI, r3
 8011554:	f3bf 8f6f 	isb	sy
 8011558:	f3bf 8f4f 	dsb	sy
 801155c:	62bb      	str	r3, [r7, #40]	@ 0x28
}
 801155e:	bf00      	nop
 8011560:	bf00      	nop
 8011562:	e7fd      	b.n	8011560 <xQueueGenericSendFromISR+0x2c>
	configASSERT( !( ( pvItemToQueue == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) );
 8011564:	68bb      	ldr	r3, [r7, #8]
 8011566:	2b00      	cmp	r3, #0
 8011568:	d103      	bne.n	8011572 <xQueueGenericSendFromISR+0x3e>
 801156a:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801156c:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 801156e:	2b00      	cmp	r3, #0
 8011570:	d101      	bne.n	8011576 <xQueueGenericSendFromISR+0x42>
 8011572:	2301      	movs	r3, #1
 8011574:	e000      	b.n	8011578 <xQueueGenericSendFromISR+0x44>
 8011576:	2300      	movs	r3, #0
 8011578:	2b00      	cmp	r3, #0
 801157a:	d10b      	bne.n	8011594 <xQueueGenericSendFromISR+0x60>
	__asm volatile
 801157c:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8011580:	f383 8811 	msr	BASEPRI, r3
 8011584:	f3bf 8f6f 	isb	sy
 8011588:	f3bf 8f4f 	dsb	sy
 801158c:	627b      	str	r3, [r7, #36]	@ 0x24
}
 801158e:	bf00      	nop
 8011590:	bf00      	nop
 8011592:	e7fd      	b.n	8011590 <xQueueGenericSendFromISR+0x5c>
	configASSERT( !( ( xCopyPosition == queueOVERWRITE ) && ( pxQueue->uxLength != 1 ) ) );
 8011594:	683b      	ldr	r3, [r7, #0]
 8011596:	2b02      	cmp	r3, #2
 8011598:	d103      	bne.n	80115a2 <xQueueGenericSendFromISR+0x6e>
 801159a:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801159c:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 801159e:	2b01      	cmp	r3, #1
 80115a0:	d101      	bne.n	80115a6 <xQueueGenericSendFromISR+0x72>
 80115a2:	2301      	movs	r3, #1
 80115a4:	e000      	b.n	80115a8 <xQueueGenericSendFromISR+0x74>
 80115a6:	2300      	movs	r3, #0
 80115a8:	2b00      	cmp	r3, #0
 80115aa:	d10b      	bne.n	80115c4 <xQueueGenericSendFromISR+0x90>
	__asm volatile
 80115ac:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80115b0:	f383 8811 	msr	BASEPRI, r3
 80115b4:	f3bf 8f6f 	isb	sy
 80115b8:	f3bf 8f4f 	dsb	sy
 80115bc:	623b      	str	r3, [r7, #32]
}
 80115be:	bf00      	nop
 80115c0:	bf00      	nop
 80115c2:	e7fd      	b.n	80115c0 <xQueueGenericSendFromISR+0x8c>
	that have been assigned a priority at or (logically) below the maximum
	system call	interrupt priority.  FreeRTOS maintains a separate interrupt
	safe API to ensure interrupt entry is as fast and as simple as possible.
	More information (albeit Cortex-M specific) is provided on the following
	link: http://www.freertos.org/RTOS-Cortex-M3-M4.html */
	portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
 80115c4:	f003 f930 	bl	8014828 <vPortValidateInterruptPriority>

portFORCE_INLINE static uint32_t ulPortRaiseBASEPRI( void )
{
uint32_t ulOriginalBASEPRI, ulNewBASEPRI;

	__asm volatile
 80115c8:	f3ef 8211 	mrs	r2, BASEPRI
 80115cc:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80115d0:	f383 8811 	msr	BASEPRI, r3
 80115d4:	f3bf 8f6f 	isb	sy
 80115d8:	f3bf 8f4f 	dsb	sy
 80115dc:	61fa      	str	r2, [r7, #28]
 80115de:	61bb      	str	r3, [r7, #24]
		:"=r" (ulOriginalBASEPRI), "=r" (ulNewBASEPRI) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
	);

	/* This return will not be reached but is necessary to prevent compiler
	warnings. */
	return ulOriginalBASEPRI;
 80115e0:	69fb      	ldr	r3, [r7, #28]
	/* Similar to xQueueGenericSend, except without blocking if there is no room
	in the queue.  Also don't directly wake a task that was blocked on a queue
	read, instead return a flag to say whether a context switch is required or
	not (i.e. has a task with a higher priority than us been woken by this
	post). */
	uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
 80115e2:	637b      	str	r3, [r7, #52]	@ 0x34
	{
		if( ( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) || ( xCopyPosition == queueOVERWRITE ) )
 80115e4:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 80115e6:	6b9a      	ldr	r2, [r3, #56]	@ 0x38
 80115e8:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 80115ea:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 80115ec:	429a      	cmp	r2, r3
 80115ee:	d302      	bcc.n	80115f6 <xQueueGenericSendFromISR+0xc2>
 80115f0:	683b      	ldr	r3, [r7, #0]
 80115f2:	2b02      	cmp	r3, #2
 80115f4:	d12f      	bne.n	8011656 <xQueueGenericSendFromISR+0x122>
		{
			const int8_t cTxLock = pxQueue->cTxLock;
 80115f6:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 80115f8:	f893 3045 	ldrb.w	r3, [r3, #69]	@ 0x45
 80115fc:	f887 3033 	strb.w	r3, [r7, #51]	@ 0x33
			const UBaseType_t uxPreviousMessagesWaiting = pxQueue->uxMessagesWaiting;
 8011600:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8011602:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 8011604:	62fb      	str	r3, [r7, #44]	@ 0x2c
			/* Semaphores use xQueueGiveFromISR(), so pxQueue will not be a
			semaphore or mutex.  That means prvCopyDataToQueue() cannot result
			in a task disinheriting a priority and prvCopyDataToQueue() can be
			called here even though the disinherit function does not check if
			the scheduler is suspended before accessing the ready lists. */
			( void ) prvCopyDataToQueue( pxQueue, pvItemToQueue, xCopyPosition );
 8011606:	683a      	ldr	r2, [r7, #0]
 8011608:	68b9      	ldr	r1, [r7, #8]
 801160a:	6bb8      	ldr	r0, [r7, #56]	@ 0x38
 801160c:	f000 fbae 	bl	8011d6c <prvCopyDataToQueue>

			/* The event list is not altered if the queue is locked.  This will
			be done when the queue is unlocked later. */
			if( cTxLock == queueUNLOCKED )
 8011610:	f997 3033 	ldrsb.w	r3, [r7, #51]	@ 0x33
 8011614:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8011618:	d112      	bne.n	8011640 <xQueueGenericSendFromISR+0x10c>
						}
					}
				}
				#else /* configUSE_QUEUE_SETS */
				{
					if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
 801161a:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801161c:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801161e:	2b00      	cmp	r3, #0
 8011620:	d016      	beq.n	8011650 <xQueueGenericSendFromISR+0x11c>
					{
						if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
 8011622:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8011624:	3324      	adds	r3, #36	@ 0x24
 8011626:	4618      	mov	r0, r3
 8011628:	f001 fd82 	bl	8013130 <xTaskRemoveFromEventList>
 801162c:	4603      	mov	r3, r0
 801162e:	2b00      	cmp	r3, #0
 8011630:	d00e      	beq.n	8011650 <xQueueGenericSendFromISR+0x11c>
						{
							/* The task waiting has a higher priority so record that a
							context	switch is required. */
							if( pxHigherPriorityTaskWoken != NULL )
 8011632:	687b      	ldr	r3, [r7, #4]
 8011634:	2b00      	cmp	r3, #0
 8011636:	d00b      	beq.n	8011650 <xQueueGenericSendFromISR+0x11c>
							{
								*pxHigherPriorityTaskWoken = pdTRUE;
 8011638:	687b      	ldr	r3, [r7, #4]
 801163a:	2201      	movs	r2, #1
 801163c:	601a      	str	r2, [r3, #0]
 801163e:	e007      	b.n	8011650 <xQueueGenericSendFromISR+0x11c>
			}
			else
			{
				/* Increment the lock count so the task that unlocks the queue
				knows that data was posted while it was locked. */
				pxQueue->cTxLock = ( int8_t ) ( cTxLock + 1 );
 8011640:	f897 3033 	ldrb.w	r3, [r7, #51]	@ 0x33
 8011644:	3301      	adds	r3, #1
 8011646:	b2db      	uxtb	r3, r3
 8011648:	b25a      	sxtb	r2, r3
 801164a:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801164c:	f883 2045 	strb.w	r2, [r3, #69]	@ 0x45
			}

			xReturn = pdPASS;
 8011650:	2301      	movs	r3, #1
 8011652:	63fb      	str	r3, [r7, #60]	@ 0x3c
		{
 8011654:	e001      	b.n	801165a <xQueueGenericSendFromISR+0x126>
		}
		else
		{
			traceQUEUE_SEND_FROM_ISR_FAILED( pxQueue );
			xReturn = errQUEUE_FULL;
 8011656:	2300      	movs	r3, #0
 8011658:	63fb      	str	r3, [r7, #60]	@ 0x3c
 801165a:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 801165c:	617b      	str	r3, [r7, #20]
}
/*-----------------------------------------------------------*/

portFORCE_INLINE static void vPortSetBASEPRI( uint32_t ulNewMaskValue )
{
	__asm volatile
 801165e:	697b      	ldr	r3, [r7, #20]
 8011660:	f383 8811 	msr	BASEPRI, r3
	(
		"	msr basepri, %0	" :: "r" ( ulNewMaskValue ) : "memory"
	);
}
 8011664:	bf00      	nop
		}
	}
	portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );

	return xReturn;
 8011666:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
}
 8011668:	4618      	mov	r0, r3
 801166a:	3740      	adds	r7, #64	@ 0x40
 801166c:	46bd      	mov	sp, r7
 801166e:	bd80      	pop	{r7, pc}

08011670 <xQueueGiveFromISR>:
/*-----------------------------------------------------------*/

BaseType_t xQueueGiveFromISR( QueueHandle_t xQueue, BaseType_t * const pxHigherPriorityTaskWoken )
{
 8011670:	b580      	push	{r7, lr}
 8011672:	b08e      	sub	sp, #56	@ 0x38
 8011674:	af00      	add	r7, sp, #0
 8011676:	6078      	str	r0, [r7, #4]
 8011678:	6039      	str	r1, [r7, #0]
BaseType_t xReturn;
UBaseType_t uxSavedInterruptStatus;
Queue_t * const pxQueue = xQueue;
 801167a:	687b      	ldr	r3, [r7, #4]
 801167c:	633b      	str	r3, [r7, #48]	@ 0x30
	item size is 0.  Don't directly wake a task that was blocked on a queue
	read, instead return a flag to say whether a context switch is required or
	not (i.e. has a task with a higher priority than us been woken by this
	post). */

	configASSERT( pxQueue );
 801167e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8011680:	2b00      	cmp	r3, #0
 8011682:	d10b      	bne.n	801169c <xQueueGiveFromISR+0x2c>
	__asm volatile
 8011684:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8011688:	f383 8811 	msr	BASEPRI, r3
 801168c:	f3bf 8f6f 	isb	sy
 8011690:	f3bf 8f4f 	dsb	sy
 8011694:	623b      	str	r3, [r7, #32]
}
 8011696:	bf00      	nop
 8011698:	bf00      	nop
 801169a:	e7fd      	b.n	8011698 <xQueueGiveFromISR+0x28>

	/* xQueueGenericSendFromISR() should be used instead of xQueueGiveFromISR()
	if the item size is not 0. */
	configASSERT( pxQueue->uxItemSize == 0 );
 801169c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801169e:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 80116a0:	2b00      	cmp	r3, #0
 80116a2:	d00b      	beq.n	80116bc <xQueueGiveFromISR+0x4c>
	__asm volatile
 80116a4:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80116a8:	f383 8811 	msr	BASEPRI, r3
 80116ac:	f3bf 8f6f 	isb	sy
 80116b0:	f3bf 8f4f 	dsb	sy
 80116b4:	61fb      	str	r3, [r7, #28]
}
 80116b6:	bf00      	nop
 80116b8:	bf00      	nop
 80116ba:	e7fd      	b.n	80116b8 <xQueueGiveFromISR+0x48>

	/* Normally a mutex would not be given from an interrupt, especially if
	there is a mutex holder, as priority inheritance makes no sense for an
	interrupts, only tasks. */
	configASSERT( !( ( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX ) && ( pxQueue->u.xSemaphore.xMutexHolder != NULL ) ) );
 80116bc:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80116be:	681b      	ldr	r3, [r3, #0]
 80116c0:	2b00      	cmp	r3, #0
 80116c2:	d103      	bne.n	80116cc <xQueueGiveFromISR+0x5c>
 80116c4:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80116c6:	689b      	ldr	r3, [r3, #8]
 80116c8:	2b00      	cmp	r3, #0
 80116ca:	d101      	bne.n	80116d0 <xQueueGiveFromISR+0x60>
 80116cc:	2301      	movs	r3, #1
 80116ce:	e000      	b.n	80116d2 <xQueueGiveFromISR+0x62>
 80116d0:	2300      	movs	r3, #0
 80116d2:	2b00      	cmp	r3, #0
 80116d4:	d10b      	bne.n	80116ee <xQueueGiveFromISR+0x7e>
	__asm volatile
 80116d6:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80116da:	f383 8811 	msr	BASEPRI, r3
 80116de:	f3bf 8f6f 	isb	sy
 80116e2:	f3bf 8f4f 	dsb	sy
 80116e6:	61bb      	str	r3, [r7, #24]
}
 80116e8:	bf00      	nop
 80116ea:	bf00      	nop
 80116ec:	e7fd      	b.n	80116ea <xQueueGiveFromISR+0x7a>
	that have been assigned a priority at or (logically) below the maximum
	system call	interrupt priority.  FreeRTOS maintains a separate interrupt
	safe API to ensure interrupt entry is as fast and as simple as possible.
	More information (albeit Cortex-M specific) is provided on the following
	link: http://www.freertos.org/RTOS-Cortex-M3-M4.html */
	portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
 80116ee:	f003 f89b 	bl	8014828 <vPortValidateInterruptPriority>
	__asm volatile
 80116f2:	f3ef 8211 	mrs	r2, BASEPRI
 80116f6:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80116fa:	f383 8811 	msr	BASEPRI, r3
 80116fe:	f3bf 8f6f 	isb	sy
 8011702:	f3bf 8f4f 	dsb	sy
 8011706:	617a      	str	r2, [r7, #20]
 8011708:	613b      	str	r3, [r7, #16]
	return ulOriginalBASEPRI;
 801170a:	697b      	ldr	r3, [r7, #20]

	uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
 801170c:	62fb      	str	r3, [r7, #44]	@ 0x2c
	{
		const UBaseType_t uxMessagesWaiting = pxQueue->uxMessagesWaiting;
 801170e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8011710:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 8011712:	62bb      	str	r3, [r7, #40]	@ 0x28

		/* When the queue is used to implement a semaphore no data is ever
		moved through the queue but it is still valid to see if the queue 'has
		space'. */
		if( uxMessagesWaiting < pxQueue->uxLength )
 8011714:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8011716:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 8011718:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 801171a:	429a      	cmp	r2, r3
 801171c:	d22b      	bcs.n	8011776 <xQueueGiveFromISR+0x106>
		{
			const int8_t cTxLock = pxQueue->cTxLock;
 801171e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8011720:	f893 3045 	ldrb.w	r3, [r3, #69]	@ 0x45
 8011724:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
			holder - and if there is a mutex holder then the mutex cannot be
			given from an ISR.  As this is the ISR version of the function it
			can be assumed there is no mutex holder and no need to determine if
			priority disinheritance is needed.  Simply increase the count of
			messages (semaphores) available. */
			pxQueue->uxMessagesWaiting = uxMessagesWaiting + ( UBaseType_t ) 1;
 8011728:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801172a:	1c5a      	adds	r2, r3, #1
 801172c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801172e:	639a      	str	r2, [r3, #56]	@ 0x38

			/* The event list is not altered if the queue is locked.  This will
			be done when the queue is unlocked later. */
			if( cTxLock == queueUNLOCKED )
 8011730:	f997 3027 	ldrsb.w	r3, [r7, #39]	@ 0x27
 8011734:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8011738:	d112      	bne.n	8011760 <xQueueGiveFromISR+0xf0>
						}
					}
				}
				#else /* configUSE_QUEUE_SETS */
				{
					if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
 801173a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801173c:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801173e:	2b00      	cmp	r3, #0
 8011740:	d016      	beq.n	8011770 <xQueueGiveFromISR+0x100>
					{
						if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
 8011742:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8011744:	3324      	adds	r3, #36	@ 0x24
 8011746:	4618      	mov	r0, r3
 8011748:	f001 fcf2 	bl	8013130 <xTaskRemoveFromEventList>
 801174c:	4603      	mov	r3, r0
 801174e:	2b00      	cmp	r3, #0
 8011750:	d00e      	beq.n	8011770 <xQueueGiveFromISR+0x100>
						{
							/* The task waiting has a higher priority so record that a
							context	switch is required. */
							if( pxHigherPriorityTaskWoken != NULL )
 8011752:	683b      	ldr	r3, [r7, #0]
 8011754:	2b00      	cmp	r3, #0
 8011756:	d00b      	beq.n	8011770 <xQueueGiveFromISR+0x100>
							{
								*pxHigherPriorityTaskWoken = pdTRUE;
 8011758:	683b      	ldr	r3, [r7, #0]
 801175a:	2201      	movs	r2, #1
 801175c:	601a      	str	r2, [r3, #0]
 801175e:	e007      	b.n	8011770 <xQueueGiveFromISR+0x100>
			}
			else
			{
				/* Increment the lock count so the task that unlocks the queue
				knows that data was posted while it was locked. */
				pxQueue->cTxLock = ( int8_t ) ( cTxLock + 1 );
 8011760:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 8011764:	3301      	adds	r3, #1
 8011766:	b2db      	uxtb	r3, r3
 8011768:	b25a      	sxtb	r2, r3
 801176a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801176c:	f883 2045 	strb.w	r2, [r3, #69]	@ 0x45
			}

			xReturn = pdPASS;
 8011770:	2301      	movs	r3, #1
 8011772:	637b      	str	r3, [r7, #52]	@ 0x34
 8011774:	e001      	b.n	801177a <xQueueGiveFromISR+0x10a>
		}
		else
		{
			traceQUEUE_SEND_FROM_ISR_FAILED( pxQueue );
			xReturn = errQUEUE_FULL;
 8011776:	2300      	movs	r3, #0
 8011778:	637b      	str	r3, [r7, #52]	@ 0x34
 801177a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801177c:	60fb      	str	r3, [r7, #12]
	__asm volatile
 801177e:	68fb      	ldr	r3, [r7, #12]
 8011780:	f383 8811 	msr	BASEPRI, r3
}
 8011784:	bf00      	nop
		}
	}
	portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );

	return xReturn;
 8011786:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
}
 8011788:	4618      	mov	r0, r3
 801178a:	3738      	adds	r7, #56	@ 0x38
 801178c:	46bd      	mov	sp, r7
 801178e:	bd80      	pop	{r7, pc}

08011790 <xQueueReceive>:
/*-----------------------------------------------------------*/

BaseType_t xQueueReceive( QueueHandle_t xQueue, void * const pvBuffer, TickType_t xTicksToWait )
{
 8011790:	b580      	push	{r7, lr}
 8011792:	b08c      	sub	sp, #48	@ 0x30
 8011794:	af00      	add	r7, sp, #0
 8011796:	60f8      	str	r0, [r7, #12]
 8011798:	60b9      	str	r1, [r7, #8]
 801179a:	607a      	str	r2, [r7, #4]
BaseType_t xEntryTimeSet = pdFALSE;
 801179c:	2300      	movs	r3, #0
 801179e:	62fb      	str	r3, [r7, #44]	@ 0x2c
TimeOut_t xTimeOut;
Queue_t * const pxQueue = xQueue;
 80117a0:	68fb      	ldr	r3, [r7, #12]
 80117a2:	62bb      	str	r3, [r7, #40]	@ 0x28

	/* Check the pointer is not NULL. */
	configASSERT( ( pxQueue ) );
 80117a4:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80117a6:	2b00      	cmp	r3, #0
 80117a8:	d10b      	bne.n	80117c2 <xQueueReceive+0x32>
	__asm volatile
 80117aa:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80117ae:	f383 8811 	msr	BASEPRI, r3
 80117b2:	f3bf 8f6f 	isb	sy
 80117b6:	f3bf 8f4f 	dsb	sy
 80117ba:	623b      	str	r3, [r7, #32]
}
 80117bc:	bf00      	nop
 80117be:	bf00      	nop
 80117c0:	e7fd      	b.n	80117be <xQueueReceive+0x2e>

	/* The buffer into which data is received can only be NULL if the data size
	is zero (so no data is copied into the buffer. */
	configASSERT( !( ( ( pvBuffer ) == NULL ) && ( ( pxQueue )->uxItemSize != ( UBaseType_t ) 0U ) ) );
 80117c2:	68bb      	ldr	r3, [r7, #8]
 80117c4:	2b00      	cmp	r3, #0
 80117c6:	d103      	bne.n	80117d0 <xQueueReceive+0x40>
 80117c8:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80117ca:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 80117cc:	2b00      	cmp	r3, #0
 80117ce:	d101      	bne.n	80117d4 <xQueueReceive+0x44>
 80117d0:	2301      	movs	r3, #1
 80117d2:	e000      	b.n	80117d6 <xQueueReceive+0x46>
 80117d4:	2300      	movs	r3, #0
 80117d6:	2b00      	cmp	r3, #0
 80117d8:	d10b      	bne.n	80117f2 <xQueueReceive+0x62>
	__asm volatile
 80117da:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80117de:	f383 8811 	msr	BASEPRI, r3
 80117e2:	f3bf 8f6f 	isb	sy
 80117e6:	f3bf 8f4f 	dsb	sy
 80117ea:	61fb      	str	r3, [r7, #28]
}
 80117ec:	bf00      	nop
 80117ee:	bf00      	nop
 80117f0:	e7fd      	b.n	80117ee <xQueueReceive+0x5e>

	/* Cannot block if the scheduler is suspended. */
	#if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )
	{
		configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) );
 80117f2:	f001 fe9b 	bl	801352c <xTaskGetSchedulerState>
 80117f6:	4603      	mov	r3, r0
 80117f8:	2b00      	cmp	r3, #0
 80117fa:	d102      	bne.n	8011802 <xQueueReceive+0x72>
 80117fc:	687b      	ldr	r3, [r7, #4]
 80117fe:	2b00      	cmp	r3, #0
 8011800:	d101      	bne.n	8011806 <xQueueReceive+0x76>
 8011802:	2301      	movs	r3, #1
 8011804:	e000      	b.n	8011808 <xQueueReceive+0x78>
 8011806:	2300      	movs	r3, #0
 8011808:	2b00      	cmp	r3, #0
 801180a:	d10b      	bne.n	8011824 <xQueueReceive+0x94>
	__asm volatile
 801180c:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8011810:	f383 8811 	msr	BASEPRI, r3
 8011814:	f3bf 8f6f 	isb	sy
 8011818:	f3bf 8f4f 	dsb	sy
 801181c:	61bb      	str	r3, [r7, #24]
}
 801181e:	bf00      	nop
 8011820:	bf00      	nop
 8011822:	e7fd      	b.n	8011820 <xQueueReceive+0x90>
	/*lint -save -e904  This function relaxes the coding standard somewhat to
	allow return statements within the function itself.  This is done in the
	interest of execution time efficiency. */
	for( ;; )
	{
		taskENTER_CRITICAL();
 8011824:	f002 ff20 	bl	8014668 <vPortEnterCritical>
		{
			const UBaseType_t uxMessagesWaiting = pxQueue->uxMessagesWaiting;
 8011828:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801182a:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 801182c:	627b      	str	r3, [r7, #36]	@ 0x24

			/* Is there data in the queue now?  To be running the calling task
			must be the highest priority task wanting to access the queue. */
			if( uxMessagesWaiting > ( UBaseType_t ) 0 )
 801182e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8011830:	2b00      	cmp	r3, #0
 8011832:	d01f      	beq.n	8011874 <xQueueReceive+0xe4>
			{
				/* Data available, remove one item. */
				prvCopyDataFromQueue( pxQueue, pvBuffer );
 8011834:	68b9      	ldr	r1, [r7, #8]
 8011836:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 8011838:	f000 fb02 	bl	8011e40 <prvCopyDataFromQueue>
				traceQUEUE_RECEIVE( pxQueue );
				pxQueue->uxMessagesWaiting = uxMessagesWaiting - ( UBaseType_t ) 1;
 801183c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801183e:	1e5a      	subs	r2, r3, #1
 8011840:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8011842:	639a      	str	r2, [r3, #56]	@ 0x38

				/* There is now space in the queue, were any tasks waiting to
				post to the queue?  If so, unblock the highest priority waiting
				task. */
				if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
 8011844:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8011846:	691b      	ldr	r3, [r3, #16]
 8011848:	2b00      	cmp	r3, #0
 801184a:	d00f      	beq.n	801186c <xQueueReceive+0xdc>
				{
					if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
 801184c:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801184e:	3310      	adds	r3, #16
 8011850:	4618      	mov	r0, r3
 8011852:	f001 fc6d 	bl	8013130 <xTaskRemoveFromEventList>
 8011856:	4603      	mov	r3, r0
 8011858:	2b00      	cmp	r3, #0
 801185a:	d007      	beq.n	801186c <xQueueReceive+0xdc>
					{
						queueYIELD_IF_USING_PREEMPTION();
 801185c:	4b3c      	ldr	r3, [pc, #240]	@ (8011950 <xQueueReceive+0x1c0>)
 801185e:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8011862:	601a      	str	r2, [r3, #0]
 8011864:	f3bf 8f4f 	dsb	sy
 8011868:	f3bf 8f6f 	isb	sy
				else
				{
					mtCOVERAGE_TEST_MARKER();
				}

				taskEXIT_CRITICAL();
 801186c:	f002 ff2e 	bl	80146cc <vPortExitCritical>
				return pdPASS;
 8011870:	2301      	movs	r3, #1
 8011872:	e069      	b.n	8011948 <xQueueReceive+0x1b8>
			}
			else
			{
				if( xTicksToWait == ( TickType_t ) 0 )
 8011874:	687b      	ldr	r3, [r7, #4]
 8011876:	2b00      	cmp	r3, #0
 8011878:	d103      	bne.n	8011882 <xQueueReceive+0xf2>
				{
					/* The queue was empty and no block time is specified (or
					the block time has expired) so leave now. */
					taskEXIT_CRITICAL();
 801187a:	f002 ff27 	bl	80146cc <vPortExitCritical>
					traceQUEUE_RECEIVE_FAILED( pxQueue );
					return errQUEUE_EMPTY;
 801187e:	2300      	movs	r3, #0
 8011880:	e062      	b.n	8011948 <xQueueReceive+0x1b8>
				}
				else if( xEntryTimeSet == pdFALSE )
 8011882:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8011884:	2b00      	cmp	r3, #0
 8011886:	d106      	bne.n	8011896 <xQueueReceive+0x106>
				{
					/* The queue was empty and a block time was specified so
					configure the timeout structure. */
					vTaskInternalSetTimeOutState( &xTimeOut );
 8011888:	f107 0310 	add.w	r3, r7, #16
 801188c:	4618      	mov	r0, r3
 801188e:	f001 fcdb 	bl	8013248 <vTaskInternalSetTimeOutState>
					xEntryTimeSet = pdTRUE;
 8011892:	2301      	movs	r3, #1
 8011894:	62fb      	str	r3, [r7, #44]	@ 0x2c
					/* Entry time was already set. */
					mtCOVERAGE_TEST_MARKER();
				}
			}
		}
		taskEXIT_CRITICAL();
 8011896:	f002 ff19 	bl	80146cc <vPortExitCritical>

		/* Interrupts and other tasks can send to and receive from the queue
		now the critical section has been exited. */

		vTaskSuspendAll();
 801189a:	f001 f9fb 	bl	8012c94 <vTaskSuspendAll>
		prvLockQueue( pxQueue );
 801189e:	f002 fee3 	bl	8014668 <vPortEnterCritical>
 80118a2:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80118a4:	f893 3044 	ldrb.w	r3, [r3, #68]	@ 0x44
 80118a8:	b25b      	sxtb	r3, r3
 80118aa:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 80118ae:	d103      	bne.n	80118b8 <xQueueReceive+0x128>
 80118b0:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80118b2:	2200      	movs	r2, #0
 80118b4:	f883 2044 	strb.w	r2, [r3, #68]	@ 0x44
 80118b8:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80118ba:	f893 3045 	ldrb.w	r3, [r3, #69]	@ 0x45
 80118be:	b25b      	sxtb	r3, r3
 80118c0:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 80118c4:	d103      	bne.n	80118ce <xQueueReceive+0x13e>
 80118c6:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80118c8:	2200      	movs	r2, #0
 80118ca:	f883 2045 	strb.w	r2, [r3, #69]	@ 0x45
 80118ce:	f002 fefd 	bl	80146cc <vPortExitCritical>

		/* Update the timeout state to see if it has expired yet. */
		if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE )
 80118d2:	1d3a      	adds	r2, r7, #4
 80118d4:	f107 0310 	add.w	r3, r7, #16
 80118d8:	4611      	mov	r1, r2
 80118da:	4618      	mov	r0, r3
 80118dc:	f001 fcca 	bl	8013274 <xTaskCheckForTimeOut>
 80118e0:	4603      	mov	r3, r0
 80118e2:	2b00      	cmp	r3, #0
 80118e4:	d123      	bne.n	801192e <xQueueReceive+0x19e>
		{
			/* The timeout has not expired.  If the queue is still empty place
			the task on the list of tasks waiting to receive from the queue. */
			if( prvIsQueueEmpty( pxQueue ) != pdFALSE )
 80118e6:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 80118e8:	f000 fb22 	bl	8011f30 <prvIsQueueEmpty>
 80118ec:	4603      	mov	r3, r0
 80118ee:	2b00      	cmp	r3, #0
 80118f0:	d017      	beq.n	8011922 <xQueueReceive+0x192>
			{
				traceBLOCKING_ON_QUEUE_RECEIVE( pxQueue );
				vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait );
 80118f2:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80118f4:	3324      	adds	r3, #36	@ 0x24
 80118f6:	687a      	ldr	r2, [r7, #4]
 80118f8:	4611      	mov	r1, r2
 80118fa:	4618      	mov	r0, r3
 80118fc:	f001 fbc6 	bl	801308c <vTaskPlaceOnEventList>
				prvUnlockQueue( pxQueue );
 8011900:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 8011902:	f000 fac3 	bl	8011e8c <prvUnlockQueue>
				if( xTaskResumeAll() == pdFALSE )
 8011906:	f001 f9d3 	bl	8012cb0 <xTaskResumeAll>
 801190a:	4603      	mov	r3, r0
 801190c:	2b00      	cmp	r3, #0
 801190e:	d189      	bne.n	8011824 <xQueueReceive+0x94>
				{
					portYIELD_WITHIN_API();
 8011910:	4b0f      	ldr	r3, [pc, #60]	@ (8011950 <xQueueReceive+0x1c0>)
 8011912:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8011916:	601a      	str	r2, [r3, #0]
 8011918:	f3bf 8f4f 	dsb	sy
 801191c:	f3bf 8f6f 	isb	sy
 8011920:	e780      	b.n	8011824 <xQueueReceive+0x94>
			}
			else
			{
				/* The queue contains data again.  Loop back to try and read the
				data. */
				prvUnlockQueue( pxQueue );
 8011922:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 8011924:	f000 fab2 	bl	8011e8c <prvUnlockQueue>
				( void ) xTaskResumeAll();
 8011928:	f001 f9c2 	bl	8012cb0 <xTaskResumeAll>
 801192c:	e77a      	b.n	8011824 <xQueueReceive+0x94>
		}
		else
		{
			/* Timed out.  If there is no data in the queue exit, otherwise loop
			back and attempt to read the data. */
			prvUnlockQueue( pxQueue );
 801192e:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 8011930:	f000 faac 	bl	8011e8c <prvUnlockQueue>
			( void ) xTaskResumeAll();
 8011934:	f001 f9bc 	bl	8012cb0 <xTaskResumeAll>

			if( prvIsQueueEmpty( pxQueue ) != pdFALSE )
 8011938:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 801193a:	f000 faf9 	bl	8011f30 <prvIsQueueEmpty>
 801193e:	4603      	mov	r3, r0
 8011940:	2b00      	cmp	r3, #0
 8011942:	f43f af6f 	beq.w	8011824 <xQueueReceive+0x94>
			{
				traceQUEUE_RECEIVE_FAILED( pxQueue );
				return errQUEUE_EMPTY;
 8011946:	2300      	movs	r3, #0
			{
				mtCOVERAGE_TEST_MARKER();
			}
		}
	} /*lint -restore */
}
 8011948:	4618      	mov	r0, r3
 801194a:	3730      	adds	r7, #48	@ 0x30
 801194c:	46bd      	mov	sp, r7
 801194e:	bd80      	pop	{r7, pc}
 8011950:	e000ed04 	.word	0xe000ed04

08011954 <xQueueSemaphoreTake>:
/*-----------------------------------------------------------*/

BaseType_t xQueueSemaphoreTake( QueueHandle_t xQueue, TickType_t xTicksToWait )
{
 8011954:	b580      	push	{r7, lr}
 8011956:	b08e      	sub	sp, #56	@ 0x38
 8011958:	af00      	add	r7, sp, #0
 801195a:	6078      	str	r0, [r7, #4]
 801195c:	6039      	str	r1, [r7, #0]
BaseType_t xEntryTimeSet = pdFALSE;
 801195e:	2300      	movs	r3, #0
 8011960:	637b      	str	r3, [r7, #52]	@ 0x34
TimeOut_t xTimeOut;
Queue_t * const pxQueue = xQueue;
 8011962:	687b      	ldr	r3, [r7, #4]
 8011964:	62fb      	str	r3, [r7, #44]	@ 0x2c

#if( configUSE_MUTEXES == 1 )
	BaseType_t xInheritanceOccurred = pdFALSE;
 8011966:	2300      	movs	r3, #0
 8011968:	633b      	str	r3, [r7, #48]	@ 0x30
#endif

	/* Check the queue pointer is not NULL. */
	configASSERT( ( pxQueue ) );
 801196a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801196c:	2b00      	cmp	r3, #0
 801196e:	d10b      	bne.n	8011988 <xQueueSemaphoreTake+0x34>
	__asm volatile
 8011970:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8011974:	f383 8811 	msr	BASEPRI, r3
 8011978:	f3bf 8f6f 	isb	sy
 801197c:	f3bf 8f4f 	dsb	sy
 8011980:	623b      	str	r3, [r7, #32]
}
 8011982:	bf00      	nop
 8011984:	bf00      	nop
 8011986:	e7fd      	b.n	8011984 <xQueueSemaphoreTake+0x30>

	/* Check this really is a semaphore, in which case the item size will be
	0. */
	configASSERT( pxQueue->uxItemSize == 0 );
 8011988:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801198a:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 801198c:	2b00      	cmp	r3, #0
 801198e:	d00b      	beq.n	80119a8 <xQueueSemaphoreTake+0x54>
	__asm volatile
 8011990:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8011994:	f383 8811 	msr	BASEPRI, r3
 8011998:	f3bf 8f6f 	isb	sy
 801199c:	f3bf 8f4f 	dsb	sy
 80119a0:	61fb      	str	r3, [r7, #28]
}
 80119a2:	bf00      	nop
 80119a4:	bf00      	nop
 80119a6:	e7fd      	b.n	80119a4 <xQueueSemaphoreTake+0x50>

	/* Cannot block if the scheduler is suspended. */
	#if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )
	{
		configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) );
 80119a8:	f001 fdc0 	bl	801352c <xTaskGetSchedulerState>
 80119ac:	4603      	mov	r3, r0
 80119ae:	2b00      	cmp	r3, #0
 80119b0:	d102      	bne.n	80119b8 <xQueueSemaphoreTake+0x64>
 80119b2:	683b      	ldr	r3, [r7, #0]
 80119b4:	2b00      	cmp	r3, #0
 80119b6:	d101      	bne.n	80119bc <xQueueSemaphoreTake+0x68>
 80119b8:	2301      	movs	r3, #1
 80119ba:	e000      	b.n	80119be <xQueueSemaphoreTake+0x6a>
 80119bc:	2300      	movs	r3, #0
 80119be:	2b00      	cmp	r3, #0
 80119c0:	d10b      	bne.n	80119da <xQueueSemaphoreTake+0x86>
	__asm volatile
 80119c2:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80119c6:	f383 8811 	msr	BASEPRI, r3
 80119ca:	f3bf 8f6f 	isb	sy
 80119ce:	f3bf 8f4f 	dsb	sy
 80119d2:	61bb      	str	r3, [r7, #24]
}
 80119d4:	bf00      	nop
 80119d6:	bf00      	nop
 80119d8:	e7fd      	b.n	80119d6 <xQueueSemaphoreTake+0x82>
	/*lint -save -e904 This function relaxes the coding standard somewhat to allow return
	statements within the function itself.  This is done in the interest
	of execution time efficiency. */
	for( ;; )
	{
		taskENTER_CRITICAL();
 80119da:	f002 fe45 	bl	8014668 <vPortEnterCritical>
		{
			/* Semaphores are queues with an item size of 0, and where the
			number of messages in the queue is the semaphore's count value. */
			const UBaseType_t uxSemaphoreCount = pxQueue->uxMessagesWaiting;
 80119de:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80119e0:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 80119e2:	62bb      	str	r3, [r7, #40]	@ 0x28

			/* Is there data in the queue now?  To be running the calling task
			must be the highest priority task wanting to access the queue. */
			if( uxSemaphoreCount > ( UBaseType_t ) 0 )
 80119e4:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80119e6:	2b00      	cmp	r3, #0
 80119e8:	d024      	beq.n	8011a34 <xQueueSemaphoreTake+0xe0>
			{
				traceQUEUE_RECEIVE( pxQueue );

				/* Semaphores are queues with a data size of zero and where the
				messages waiting is the semaphore's count.  Reduce the count. */
				pxQueue->uxMessagesWaiting = uxSemaphoreCount - ( UBaseType_t ) 1;
 80119ea:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80119ec:	1e5a      	subs	r2, r3, #1
 80119ee:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80119f0:	639a      	str	r2, [r3, #56]	@ 0x38

				#if ( configUSE_MUTEXES == 1 )
				{
					if( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX )
 80119f2:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80119f4:	681b      	ldr	r3, [r3, #0]
 80119f6:	2b00      	cmp	r3, #0
 80119f8:	d104      	bne.n	8011a04 <xQueueSemaphoreTake+0xb0>
					{
						/* Record the information required to implement
						priority inheritance should it become necessary. */
						pxQueue->u.xSemaphore.xMutexHolder = pvTaskIncrementMutexHeldCount();
 80119fa:	f001 ff11 	bl	8013820 <pvTaskIncrementMutexHeldCount>
 80119fe:	4602      	mov	r2, r0
 8011a00:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8011a02:	609a      	str	r2, [r3, #8]
				}
				#endif /* configUSE_MUTEXES */

				/* Check to see if other tasks are blocked waiting to give the
				semaphore, and if so, unblock the highest priority such task. */
				if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
 8011a04:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8011a06:	691b      	ldr	r3, [r3, #16]
 8011a08:	2b00      	cmp	r3, #0
 8011a0a:	d00f      	beq.n	8011a2c <xQueueSemaphoreTake+0xd8>
				{
					if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
 8011a0c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8011a0e:	3310      	adds	r3, #16
 8011a10:	4618      	mov	r0, r3
 8011a12:	f001 fb8d 	bl	8013130 <xTaskRemoveFromEventList>
 8011a16:	4603      	mov	r3, r0
 8011a18:	2b00      	cmp	r3, #0
 8011a1a:	d007      	beq.n	8011a2c <xQueueSemaphoreTake+0xd8>
					{
						queueYIELD_IF_USING_PREEMPTION();
 8011a1c:	4b54      	ldr	r3, [pc, #336]	@ (8011b70 <xQueueSemaphoreTake+0x21c>)
 8011a1e:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8011a22:	601a      	str	r2, [r3, #0]
 8011a24:	f3bf 8f4f 	dsb	sy
 8011a28:	f3bf 8f6f 	isb	sy
				else
				{
					mtCOVERAGE_TEST_MARKER();
				}

				taskEXIT_CRITICAL();
 8011a2c:	f002 fe4e 	bl	80146cc <vPortExitCritical>
				return pdPASS;
 8011a30:	2301      	movs	r3, #1
 8011a32:	e098      	b.n	8011b66 <xQueueSemaphoreTake+0x212>
			}
			else
			{
				if( xTicksToWait == ( TickType_t ) 0 )
 8011a34:	683b      	ldr	r3, [r7, #0]
 8011a36:	2b00      	cmp	r3, #0
 8011a38:	d112      	bne.n	8011a60 <xQueueSemaphoreTake+0x10c>
					/* For inheritance to have occurred there must have been an
					initial timeout, and an adjusted timeout cannot become 0, as
					if it were 0 the function would have exited. */
					#if( configUSE_MUTEXES == 1 )
					{
						configASSERT( xInheritanceOccurred == pdFALSE );
 8011a3a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8011a3c:	2b00      	cmp	r3, #0
 8011a3e:	d00b      	beq.n	8011a58 <xQueueSemaphoreTake+0x104>
	__asm volatile
 8011a40:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8011a44:	f383 8811 	msr	BASEPRI, r3
 8011a48:	f3bf 8f6f 	isb	sy
 8011a4c:	f3bf 8f4f 	dsb	sy
 8011a50:	617b      	str	r3, [r7, #20]
}
 8011a52:	bf00      	nop
 8011a54:	bf00      	nop
 8011a56:	e7fd      	b.n	8011a54 <xQueueSemaphoreTake+0x100>
					}
					#endif /* configUSE_MUTEXES */

					/* The semaphore count was 0 and no block time is specified
					(or the block time has expired) so exit now. */
					taskEXIT_CRITICAL();
 8011a58:	f002 fe38 	bl	80146cc <vPortExitCritical>
					traceQUEUE_RECEIVE_FAILED( pxQueue );
					return errQUEUE_EMPTY;
 8011a5c:	2300      	movs	r3, #0
 8011a5e:	e082      	b.n	8011b66 <xQueueSemaphoreTake+0x212>
				}
				else if( xEntryTimeSet == pdFALSE )
 8011a60:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8011a62:	2b00      	cmp	r3, #0
 8011a64:	d106      	bne.n	8011a74 <xQueueSemaphoreTake+0x120>
				{
					/* The semaphore count was 0 and a block time was specified
					so configure the timeout structure ready to block. */
					vTaskInternalSetTimeOutState( &xTimeOut );
 8011a66:	f107 030c 	add.w	r3, r7, #12
 8011a6a:	4618      	mov	r0, r3
 8011a6c:	f001 fbec 	bl	8013248 <vTaskInternalSetTimeOutState>
					xEntryTimeSet = pdTRUE;
 8011a70:	2301      	movs	r3, #1
 8011a72:	637b      	str	r3, [r7, #52]	@ 0x34
					/* Entry time was already set. */
					mtCOVERAGE_TEST_MARKER();
				}
			}
		}
		taskEXIT_CRITICAL();
 8011a74:	f002 fe2a 	bl	80146cc <vPortExitCritical>

		/* Interrupts and other tasks can give to and take from the semaphore
		now the critical section has been exited. */

		vTaskSuspendAll();
 8011a78:	f001 f90c 	bl	8012c94 <vTaskSuspendAll>
		prvLockQueue( pxQueue );
 8011a7c:	f002 fdf4 	bl	8014668 <vPortEnterCritical>
 8011a80:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8011a82:	f893 3044 	ldrb.w	r3, [r3, #68]	@ 0x44
 8011a86:	b25b      	sxtb	r3, r3
 8011a88:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8011a8c:	d103      	bne.n	8011a96 <xQueueSemaphoreTake+0x142>
 8011a8e:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8011a90:	2200      	movs	r2, #0
 8011a92:	f883 2044 	strb.w	r2, [r3, #68]	@ 0x44
 8011a96:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8011a98:	f893 3045 	ldrb.w	r3, [r3, #69]	@ 0x45
 8011a9c:	b25b      	sxtb	r3, r3
 8011a9e:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8011aa2:	d103      	bne.n	8011aac <xQueueSemaphoreTake+0x158>
 8011aa4:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8011aa6:	2200      	movs	r2, #0
 8011aa8:	f883 2045 	strb.w	r2, [r3, #69]	@ 0x45
 8011aac:	f002 fe0e 	bl	80146cc <vPortExitCritical>

		/* Update the timeout state to see if it has expired yet. */
		if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE )
 8011ab0:	463a      	mov	r2, r7
 8011ab2:	f107 030c 	add.w	r3, r7, #12
 8011ab6:	4611      	mov	r1, r2
 8011ab8:	4618      	mov	r0, r3
 8011aba:	f001 fbdb 	bl	8013274 <xTaskCheckForTimeOut>
 8011abe:	4603      	mov	r3, r0
 8011ac0:	2b00      	cmp	r3, #0
 8011ac2:	d132      	bne.n	8011b2a <xQueueSemaphoreTake+0x1d6>
		{
			/* A block time is specified and not expired.  If the semaphore
			count is 0 then enter the Blocked state to wait for a semaphore to
			become available.  As semaphores are implemented with queues the
			queue being empty is equivalent to the semaphore count being 0. */
			if( prvIsQueueEmpty( pxQueue ) != pdFALSE )
 8011ac4:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 8011ac6:	f000 fa33 	bl	8011f30 <prvIsQueueEmpty>
 8011aca:	4603      	mov	r3, r0
 8011acc:	2b00      	cmp	r3, #0
 8011ace:	d026      	beq.n	8011b1e <xQueueSemaphoreTake+0x1ca>
			{
				traceBLOCKING_ON_QUEUE_RECEIVE( pxQueue );

				#if ( configUSE_MUTEXES == 1 )
				{
					if( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX )
 8011ad0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8011ad2:	681b      	ldr	r3, [r3, #0]
 8011ad4:	2b00      	cmp	r3, #0
 8011ad6:	d109      	bne.n	8011aec <xQueueSemaphoreTake+0x198>
					{
						taskENTER_CRITICAL();
 8011ad8:	f002 fdc6 	bl	8014668 <vPortEnterCritical>
						{
							xInheritanceOccurred = xTaskPriorityInherit( pxQueue->u.xSemaphore.xMutexHolder );
 8011adc:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8011ade:	689b      	ldr	r3, [r3, #8]
 8011ae0:	4618      	mov	r0, r3
 8011ae2:	f001 fd41 	bl	8013568 <xTaskPriorityInherit>
 8011ae6:	6338      	str	r0, [r7, #48]	@ 0x30
						}
						taskEXIT_CRITICAL();
 8011ae8:	f002 fdf0 	bl	80146cc <vPortExitCritical>
						mtCOVERAGE_TEST_MARKER();
					}
				}
				#endif

				vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait );
 8011aec:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8011aee:	3324      	adds	r3, #36	@ 0x24
 8011af0:	683a      	ldr	r2, [r7, #0]
 8011af2:	4611      	mov	r1, r2
 8011af4:	4618      	mov	r0, r3
 8011af6:	f001 fac9 	bl	801308c <vTaskPlaceOnEventList>
				prvUnlockQueue( pxQueue );
 8011afa:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 8011afc:	f000 f9c6 	bl	8011e8c <prvUnlockQueue>
				if( xTaskResumeAll() == pdFALSE )
 8011b00:	f001 f8d6 	bl	8012cb0 <xTaskResumeAll>
 8011b04:	4603      	mov	r3, r0
 8011b06:	2b00      	cmp	r3, #0
 8011b08:	f47f af67 	bne.w	80119da <xQueueSemaphoreTake+0x86>
				{
					portYIELD_WITHIN_API();
 8011b0c:	4b18      	ldr	r3, [pc, #96]	@ (8011b70 <xQueueSemaphoreTake+0x21c>)
 8011b0e:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8011b12:	601a      	str	r2, [r3, #0]
 8011b14:	f3bf 8f4f 	dsb	sy
 8011b18:	f3bf 8f6f 	isb	sy
 8011b1c:	e75d      	b.n	80119da <xQueueSemaphoreTake+0x86>
			}
			else
			{
				/* There was no timeout and the semaphore count was not 0, so
				attempt to take the semaphore again. */
				prvUnlockQueue( pxQueue );
 8011b1e:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 8011b20:	f000 f9b4 	bl	8011e8c <prvUnlockQueue>
				( void ) xTaskResumeAll();
 8011b24:	f001 f8c4 	bl	8012cb0 <xTaskResumeAll>
 8011b28:	e757      	b.n	80119da <xQueueSemaphoreTake+0x86>
			}
		}
		else
		{
			/* Timed out. */
			prvUnlockQueue( pxQueue );
 8011b2a:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 8011b2c:	f000 f9ae 	bl	8011e8c <prvUnlockQueue>
			( void ) xTaskResumeAll();
 8011b30:	f001 f8be 	bl	8012cb0 <xTaskResumeAll>

			/* If the semaphore count is 0 exit now as the timeout has
			expired.  Otherwise return to attempt to take the semaphore that is
			known to be available.  As semaphores are implemented by queues the
			queue being empty is equivalent to the semaphore count being 0. */
			if( prvIsQueueEmpty( pxQueue ) != pdFALSE )
 8011b34:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 8011b36:	f000 f9fb 	bl	8011f30 <prvIsQueueEmpty>
 8011b3a:	4603      	mov	r3, r0
 8011b3c:	2b00      	cmp	r3, #0
 8011b3e:	f43f af4c 	beq.w	80119da <xQueueSemaphoreTake+0x86>
				#if ( configUSE_MUTEXES == 1 )
				{
					/* xInheritanceOccurred could only have be set if
					pxQueue->uxQueueType == queueQUEUE_IS_MUTEX so no need to
					test the mutex type again to check it is actually a mutex. */
					if( xInheritanceOccurred != pdFALSE )
 8011b42:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8011b44:	2b00      	cmp	r3, #0
 8011b46:	d00d      	beq.n	8011b64 <xQueueSemaphoreTake+0x210>
					{
						taskENTER_CRITICAL();
 8011b48:	f002 fd8e 	bl	8014668 <vPortEnterCritical>
							/* This task blocking on the mutex caused another
							task to inherit this task's priority.  Now this task
							has timed out the priority should be disinherited
							again, but only as low as the next highest priority
							task that is waiting for the same mutex. */
							uxHighestWaitingPriority = prvGetDisinheritPriorityAfterTimeout( pxQueue );
 8011b4c:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 8011b4e:	f000 f8f5 	bl	8011d3c <prvGetDisinheritPriorityAfterTimeout>
 8011b52:	6278      	str	r0, [r7, #36]	@ 0x24
							vTaskPriorityDisinheritAfterTimeout( pxQueue->u.xSemaphore.xMutexHolder, uxHighestWaitingPriority );
 8011b54:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8011b56:	689b      	ldr	r3, [r3, #8]
 8011b58:	6a79      	ldr	r1, [r7, #36]	@ 0x24
 8011b5a:	4618      	mov	r0, r3
 8011b5c:	f001 fddc 	bl	8013718 <vTaskPriorityDisinheritAfterTimeout>
						}
						taskEXIT_CRITICAL();
 8011b60:	f002 fdb4 	bl	80146cc <vPortExitCritical>
					}
				}
				#endif /* configUSE_MUTEXES */

				traceQUEUE_RECEIVE_FAILED( pxQueue );
				return errQUEUE_EMPTY;
 8011b64:	2300      	movs	r3, #0
			{
				mtCOVERAGE_TEST_MARKER();
			}
		}
	} /*lint -restore */
}
 8011b66:	4618      	mov	r0, r3
 8011b68:	3738      	adds	r7, #56	@ 0x38
 8011b6a:	46bd      	mov	sp, r7
 8011b6c:	bd80      	pop	{r7, pc}
 8011b6e:	bf00      	nop
 8011b70:	e000ed04 	.word	0xe000ed04

08011b74 <xQueueReceiveFromISR>:
	} /*lint -restore */
}
/*-----------------------------------------------------------*/

BaseType_t xQueueReceiveFromISR( QueueHandle_t xQueue, void * const pvBuffer, BaseType_t * const pxHigherPriorityTaskWoken )
{
 8011b74:	b580      	push	{r7, lr}
 8011b76:	b08e      	sub	sp, #56	@ 0x38
 8011b78:	af00      	add	r7, sp, #0
 8011b7a:	60f8      	str	r0, [r7, #12]
 8011b7c:	60b9      	str	r1, [r7, #8]
 8011b7e:	607a      	str	r2, [r7, #4]
BaseType_t xReturn;
UBaseType_t uxSavedInterruptStatus;
Queue_t * const pxQueue = xQueue;
 8011b80:	68fb      	ldr	r3, [r7, #12]
 8011b82:	633b      	str	r3, [r7, #48]	@ 0x30

	configASSERT( pxQueue );
 8011b84:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8011b86:	2b00      	cmp	r3, #0
 8011b88:	d10b      	bne.n	8011ba2 <xQueueReceiveFromISR+0x2e>
	__asm volatile
 8011b8a:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8011b8e:	f383 8811 	msr	BASEPRI, r3
 8011b92:	f3bf 8f6f 	isb	sy
 8011b96:	f3bf 8f4f 	dsb	sy
 8011b9a:	623b      	str	r3, [r7, #32]
}
 8011b9c:	bf00      	nop
 8011b9e:	bf00      	nop
 8011ba0:	e7fd      	b.n	8011b9e <xQueueReceiveFromISR+0x2a>
	configASSERT( !( ( pvBuffer == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) );
 8011ba2:	68bb      	ldr	r3, [r7, #8]
 8011ba4:	2b00      	cmp	r3, #0
 8011ba6:	d103      	bne.n	8011bb0 <xQueueReceiveFromISR+0x3c>
 8011ba8:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8011baa:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8011bac:	2b00      	cmp	r3, #0
 8011bae:	d101      	bne.n	8011bb4 <xQueueReceiveFromISR+0x40>
 8011bb0:	2301      	movs	r3, #1
 8011bb2:	e000      	b.n	8011bb6 <xQueueReceiveFromISR+0x42>
 8011bb4:	2300      	movs	r3, #0
 8011bb6:	2b00      	cmp	r3, #0
 8011bb8:	d10b      	bne.n	8011bd2 <xQueueReceiveFromISR+0x5e>
	__asm volatile
 8011bba:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8011bbe:	f383 8811 	msr	BASEPRI, r3
 8011bc2:	f3bf 8f6f 	isb	sy
 8011bc6:	f3bf 8f4f 	dsb	sy
 8011bca:	61fb      	str	r3, [r7, #28]
}
 8011bcc:	bf00      	nop
 8011bce:	bf00      	nop
 8011bd0:	e7fd      	b.n	8011bce <xQueueReceiveFromISR+0x5a>
	that have been assigned a priority at or (logically) below the maximum
	system call	interrupt priority.  FreeRTOS maintains a separate interrupt
	safe API to ensure interrupt entry is as fast and as simple as possible.
	More information (albeit Cortex-M specific) is provided on the following
	link: http://www.freertos.org/RTOS-Cortex-M3-M4.html */
	portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
 8011bd2:	f002 fe29 	bl	8014828 <vPortValidateInterruptPriority>
	__asm volatile
 8011bd6:	f3ef 8211 	mrs	r2, BASEPRI
 8011bda:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8011bde:	f383 8811 	msr	BASEPRI, r3
 8011be2:	f3bf 8f6f 	isb	sy
 8011be6:	f3bf 8f4f 	dsb	sy
 8011bea:	61ba      	str	r2, [r7, #24]
 8011bec:	617b      	str	r3, [r7, #20]
	return ulOriginalBASEPRI;
 8011bee:	69bb      	ldr	r3, [r7, #24]

	uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
 8011bf0:	62fb      	str	r3, [r7, #44]	@ 0x2c
	{
		const UBaseType_t uxMessagesWaiting = pxQueue->uxMessagesWaiting;
 8011bf2:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8011bf4:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 8011bf6:	62bb      	str	r3, [r7, #40]	@ 0x28

		/* Cannot block in an ISR, so check there is data available. */
		if( uxMessagesWaiting > ( UBaseType_t ) 0 )
 8011bf8:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8011bfa:	2b00      	cmp	r3, #0
 8011bfc:	d02f      	beq.n	8011c5e <xQueueReceiveFromISR+0xea>
		{
			const int8_t cRxLock = pxQueue->cRxLock;
 8011bfe:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8011c00:	f893 3044 	ldrb.w	r3, [r3, #68]	@ 0x44
 8011c04:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27

			traceQUEUE_RECEIVE_FROM_ISR( pxQueue );

			prvCopyDataFromQueue( pxQueue, pvBuffer );
 8011c08:	68b9      	ldr	r1, [r7, #8]
 8011c0a:	6b38      	ldr	r0, [r7, #48]	@ 0x30
 8011c0c:	f000 f918 	bl	8011e40 <prvCopyDataFromQueue>
			pxQueue->uxMessagesWaiting = uxMessagesWaiting - ( UBaseType_t ) 1;
 8011c10:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8011c12:	1e5a      	subs	r2, r3, #1
 8011c14:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8011c16:	639a      	str	r2, [r3, #56]	@ 0x38

			/* If the queue is locked the event list will not be modified.
			Instead update the lock count so the task that unlocks the queue
			will know that an ISR has removed data while the queue was
			locked. */
			if( cRxLock == queueUNLOCKED )
 8011c18:	f997 3027 	ldrsb.w	r3, [r7, #39]	@ 0x27
 8011c1c:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8011c20:	d112      	bne.n	8011c48 <xQueueReceiveFromISR+0xd4>
			{
				if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
 8011c22:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8011c24:	691b      	ldr	r3, [r3, #16]
 8011c26:	2b00      	cmp	r3, #0
 8011c28:	d016      	beq.n	8011c58 <xQueueReceiveFromISR+0xe4>
				{
					if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
 8011c2a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8011c2c:	3310      	adds	r3, #16
 8011c2e:	4618      	mov	r0, r3
 8011c30:	f001 fa7e 	bl	8013130 <xTaskRemoveFromEventList>
 8011c34:	4603      	mov	r3, r0
 8011c36:	2b00      	cmp	r3, #0
 8011c38:	d00e      	beq.n	8011c58 <xQueueReceiveFromISR+0xe4>
					{
						/* The task waiting has a higher priority than us so
						force a context switch. */
						if( pxHigherPriorityTaskWoken != NULL )
 8011c3a:	687b      	ldr	r3, [r7, #4]
 8011c3c:	2b00      	cmp	r3, #0
 8011c3e:	d00b      	beq.n	8011c58 <xQueueReceiveFromISR+0xe4>
						{
							*pxHigherPriorityTaskWoken = pdTRUE;
 8011c40:	687b      	ldr	r3, [r7, #4]
 8011c42:	2201      	movs	r2, #1
 8011c44:	601a      	str	r2, [r3, #0]
 8011c46:	e007      	b.n	8011c58 <xQueueReceiveFromISR+0xe4>
			}
			else
			{
				/* Increment the lock count so the task that unlocks the queue
				knows that data was removed while it was locked. */
				pxQueue->cRxLock = ( int8_t ) ( cRxLock + 1 );
 8011c48:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 8011c4c:	3301      	adds	r3, #1
 8011c4e:	b2db      	uxtb	r3, r3
 8011c50:	b25a      	sxtb	r2, r3
 8011c52:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8011c54:	f883 2044 	strb.w	r2, [r3, #68]	@ 0x44
			}

			xReturn = pdPASS;
 8011c58:	2301      	movs	r3, #1
 8011c5a:	637b      	str	r3, [r7, #52]	@ 0x34
 8011c5c:	e001      	b.n	8011c62 <xQueueReceiveFromISR+0xee>
		}
		else
		{
			xReturn = pdFAIL;
 8011c5e:	2300      	movs	r3, #0
 8011c60:	637b      	str	r3, [r7, #52]	@ 0x34
 8011c62:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8011c64:	613b      	str	r3, [r7, #16]
	__asm volatile
 8011c66:	693b      	ldr	r3, [r7, #16]
 8011c68:	f383 8811 	msr	BASEPRI, r3
}
 8011c6c:	bf00      	nop
			traceQUEUE_RECEIVE_FROM_ISR_FAILED( pxQueue );
		}
	}
	portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );

	return xReturn;
 8011c6e:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
}
 8011c70:	4618      	mov	r0, r3
 8011c72:	3738      	adds	r7, #56	@ 0x38
 8011c74:	46bd      	mov	sp, r7
 8011c76:	bd80      	pop	{r7, pc}

08011c78 <uxQueueMessagesWaiting>:
	return xReturn;
}
/*-----------------------------------------------------------*/

UBaseType_t uxQueueMessagesWaiting( const QueueHandle_t xQueue )
{
 8011c78:	b580      	push	{r7, lr}
 8011c7a:	b084      	sub	sp, #16
 8011c7c:	af00      	add	r7, sp, #0
 8011c7e:	6078      	str	r0, [r7, #4]
UBaseType_t uxReturn;

	configASSERT( xQueue );
 8011c80:	687b      	ldr	r3, [r7, #4]
 8011c82:	2b00      	cmp	r3, #0
 8011c84:	d10b      	bne.n	8011c9e <uxQueueMessagesWaiting+0x26>
	__asm volatile
 8011c86:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8011c8a:	f383 8811 	msr	BASEPRI, r3
 8011c8e:	f3bf 8f6f 	isb	sy
 8011c92:	f3bf 8f4f 	dsb	sy
 8011c96:	60bb      	str	r3, [r7, #8]
}
 8011c98:	bf00      	nop
 8011c9a:	bf00      	nop
 8011c9c:	e7fd      	b.n	8011c9a <uxQueueMessagesWaiting+0x22>

	taskENTER_CRITICAL();
 8011c9e:	f002 fce3 	bl	8014668 <vPortEnterCritical>
	{
		uxReturn = ( ( Queue_t * ) xQueue )->uxMessagesWaiting;
 8011ca2:	687b      	ldr	r3, [r7, #4]
 8011ca4:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 8011ca6:	60fb      	str	r3, [r7, #12]
	}
	taskEXIT_CRITICAL();
 8011ca8:	f002 fd10 	bl	80146cc <vPortExitCritical>

	return uxReturn;
 8011cac:	68fb      	ldr	r3, [r7, #12]
} /*lint !e818 Pointer cannot be declared const as xQueue is a typedef not pointer. */
 8011cae:	4618      	mov	r0, r3
 8011cb0:	3710      	adds	r7, #16
 8011cb2:	46bd      	mov	sp, r7
 8011cb4:	bd80      	pop	{r7, pc}

08011cb6 <uxQueueMessagesWaitingFromISR>:
	return uxReturn;
} /*lint !e818 Pointer cannot be declared const as xQueue is a typedef not pointer. */
/*-----------------------------------------------------------*/

UBaseType_t uxQueueMessagesWaitingFromISR( const QueueHandle_t xQueue )
{
 8011cb6:	b480      	push	{r7}
 8011cb8:	b087      	sub	sp, #28
 8011cba:	af00      	add	r7, sp, #0
 8011cbc:	6078      	str	r0, [r7, #4]
UBaseType_t uxReturn;
Queue_t * const pxQueue = xQueue;
 8011cbe:	687b      	ldr	r3, [r7, #4]
 8011cc0:	617b      	str	r3, [r7, #20]

	configASSERT( pxQueue );
 8011cc2:	697b      	ldr	r3, [r7, #20]
 8011cc4:	2b00      	cmp	r3, #0
 8011cc6:	d10b      	bne.n	8011ce0 <uxQueueMessagesWaitingFromISR+0x2a>
	__asm volatile
 8011cc8:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8011ccc:	f383 8811 	msr	BASEPRI, r3
 8011cd0:	f3bf 8f6f 	isb	sy
 8011cd4:	f3bf 8f4f 	dsb	sy
 8011cd8:	60fb      	str	r3, [r7, #12]
}
 8011cda:	bf00      	nop
 8011cdc:	bf00      	nop
 8011cde:	e7fd      	b.n	8011cdc <uxQueueMessagesWaitingFromISR+0x26>
	uxReturn = pxQueue->uxMessagesWaiting;
 8011ce0:	697b      	ldr	r3, [r7, #20]
 8011ce2:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 8011ce4:	613b      	str	r3, [r7, #16]

	return uxReturn;
 8011ce6:	693b      	ldr	r3, [r7, #16]
} /*lint !e818 Pointer cannot be declared const as xQueue is a typedef not pointer. */
 8011ce8:	4618      	mov	r0, r3
 8011cea:	371c      	adds	r7, #28
 8011cec:	46bd      	mov	sp, r7
 8011cee:	f85d 7b04 	ldr.w	r7, [sp], #4
 8011cf2:	4770      	bx	lr

08011cf4 <vQueueDelete>:
/*-----------------------------------------------------------*/

void vQueueDelete( QueueHandle_t xQueue )
{
 8011cf4:	b580      	push	{r7, lr}
 8011cf6:	b084      	sub	sp, #16
 8011cf8:	af00      	add	r7, sp, #0
 8011cfa:	6078      	str	r0, [r7, #4]
Queue_t * const pxQueue = xQueue;
 8011cfc:	687b      	ldr	r3, [r7, #4]
 8011cfe:	60fb      	str	r3, [r7, #12]

	configASSERT( pxQueue );
 8011d00:	68fb      	ldr	r3, [r7, #12]
 8011d02:	2b00      	cmp	r3, #0
 8011d04:	d10b      	bne.n	8011d1e <vQueueDelete+0x2a>
	__asm volatile
 8011d06:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8011d0a:	f383 8811 	msr	BASEPRI, r3
 8011d0e:	f3bf 8f6f 	isb	sy
 8011d12:	f3bf 8f4f 	dsb	sy
 8011d16:	60bb      	str	r3, [r7, #8]
}
 8011d18:	bf00      	nop
 8011d1a:	bf00      	nop
 8011d1c:	e7fd      	b.n	8011d1a <vQueueDelete+0x26>
	traceQUEUE_DELETE( pxQueue );

	#if ( configQUEUE_REGISTRY_SIZE > 0 )
	{
		vQueueUnregisterQueue( pxQueue );
 8011d1e:	68f8      	ldr	r0, [r7, #12]
 8011d20:	f000 f95e 	bl	8011fe0 <vQueueUnregisterQueue>
	}
	#elif( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )
	{
		/* The queue could have been allocated statically or dynamically, so
		check before attempting to free the memory. */
		if( pxQueue->ucStaticallyAllocated == ( uint8_t ) pdFALSE )
 8011d24:	68fb      	ldr	r3, [r7, #12]
 8011d26:	f893 3046 	ldrb.w	r3, [r3, #70]	@ 0x46
 8011d2a:	2b00      	cmp	r3, #0
 8011d2c:	d102      	bne.n	8011d34 <vQueueDelete+0x40>
		{
			vPortFree( pxQueue );
 8011d2e:	68f8      	ldr	r0, [r7, #12]
 8011d30:	f002 fe8a 	bl	8014a48 <vPortFree>
		/* The queue must have been statically allocated, so is not going to be
		deleted.  Avoid compiler warnings about the unused parameter. */
		( void ) pxQueue;
	}
	#endif /* configSUPPORT_DYNAMIC_ALLOCATION */
}
 8011d34:	bf00      	nop
 8011d36:	3710      	adds	r7, #16
 8011d38:	46bd      	mov	sp, r7
 8011d3a:	bd80      	pop	{r7, pc}

08011d3c <prvGetDisinheritPriorityAfterTimeout>:
/*-----------------------------------------------------------*/

#if( configUSE_MUTEXES == 1 )

	static UBaseType_t prvGetDisinheritPriorityAfterTimeout( const Queue_t * const pxQueue )
	{
 8011d3c:	b480      	push	{r7}
 8011d3e:	b085      	sub	sp, #20
 8011d40:	af00      	add	r7, sp, #0
 8011d42:	6078      	str	r0, [r7, #4]
		priority, but the waiting task times out, then the holder should
		disinherit the priority - but only down to the highest priority of any
		other tasks that are waiting for the same mutex.  For this purpose,
		return the priority of the highest priority task that is waiting for the
		mutex. */
		if( listCURRENT_LIST_LENGTH( &( pxQueue->xTasksWaitingToReceive ) ) > 0U )
 8011d44:	687b      	ldr	r3, [r7, #4]
 8011d46:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8011d48:	2b00      	cmp	r3, #0
 8011d4a:	d006      	beq.n	8011d5a <prvGetDisinheritPriorityAfterTimeout+0x1e>
		{
			uxHighestPriorityOfWaitingTasks = ( UBaseType_t ) configMAX_PRIORITIES - ( UBaseType_t ) listGET_ITEM_VALUE_OF_HEAD_ENTRY( &( pxQueue->xTasksWaitingToReceive ) );
 8011d4c:	687b      	ldr	r3, [r7, #4]
 8011d4e:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8011d50:	681b      	ldr	r3, [r3, #0]
 8011d52:	f1c3 0338 	rsb	r3, r3, #56	@ 0x38
 8011d56:	60fb      	str	r3, [r7, #12]
 8011d58:	e001      	b.n	8011d5e <prvGetDisinheritPriorityAfterTimeout+0x22>
		}
		else
		{
			uxHighestPriorityOfWaitingTasks = tskIDLE_PRIORITY;
 8011d5a:	2300      	movs	r3, #0
 8011d5c:	60fb      	str	r3, [r7, #12]
		}

		return uxHighestPriorityOfWaitingTasks;
 8011d5e:	68fb      	ldr	r3, [r7, #12]
	}
 8011d60:	4618      	mov	r0, r3
 8011d62:	3714      	adds	r7, #20
 8011d64:	46bd      	mov	sp, r7
 8011d66:	f85d 7b04 	ldr.w	r7, [sp], #4
 8011d6a:	4770      	bx	lr

08011d6c <prvCopyDataToQueue>:

#endif /* configUSE_MUTEXES */
/*-----------------------------------------------------------*/

static BaseType_t prvCopyDataToQueue( Queue_t * const pxQueue, const void *pvItemToQueue, const BaseType_t xPosition )
{
 8011d6c:	b580      	push	{r7, lr}
 8011d6e:	b086      	sub	sp, #24
 8011d70:	af00      	add	r7, sp, #0
 8011d72:	60f8      	str	r0, [r7, #12]
 8011d74:	60b9      	str	r1, [r7, #8]
 8011d76:	607a      	str	r2, [r7, #4]
BaseType_t xReturn = pdFALSE;
 8011d78:	2300      	movs	r3, #0
 8011d7a:	617b      	str	r3, [r7, #20]
UBaseType_t uxMessagesWaiting;

	/* This function is called from a critical section. */

	uxMessagesWaiting = pxQueue->uxMessagesWaiting;
 8011d7c:	68fb      	ldr	r3, [r7, #12]
 8011d7e:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 8011d80:	613b      	str	r3, [r7, #16]

	if( pxQueue->uxItemSize == ( UBaseType_t ) 0 )
 8011d82:	68fb      	ldr	r3, [r7, #12]
 8011d84:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8011d86:	2b00      	cmp	r3, #0
 8011d88:	d10d      	bne.n	8011da6 <prvCopyDataToQueue+0x3a>
	{
		#if ( configUSE_MUTEXES == 1 )
		{
			if( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX )
 8011d8a:	68fb      	ldr	r3, [r7, #12]
 8011d8c:	681b      	ldr	r3, [r3, #0]
 8011d8e:	2b00      	cmp	r3, #0
 8011d90:	d14d      	bne.n	8011e2e <prvCopyDataToQueue+0xc2>
			{
				/* The mutex is no longer being held. */
				xReturn = xTaskPriorityDisinherit( pxQueue->u.xSemaphore.xMutexHolder );
 8011d92:	68fb      	ldr	r3, [r7, #12]
 8011d94:	689b      	ldr	r3, [r3, #8]
 8011d96:	4618      	mov	r0, r3
 8011d98:	f001 fc4e 	bl	8013638 <xTaskPriorityDisinherit>
 8011d9c:	6178      	str	r0, [r7, #20]
				pxQueue->u.xSemaphore.xMutexHolder = NULL;
 8011d9e:	68fb      	ldr	r3, [r7, #12]
 8011da0:	2200      	movs	r2, #0
 8011da2:	609a      	str	r2, [r3, #8]
 8011da4:	e043      	b.n	8011e2e <prvCopyDataToQueue+0xc2>
				mtCOVERAGE_TEST_MARKER();
			}
		}
		#endif /* configUSE_MUTEXES */
	}
	else if( xPosition == queueSEND_TO_BACK )
 8011da6:	687b      	ldr	r3, [r7, #4]
 8011da8:	2b00      	cmp	r3, #0
 8011daa:	d119      	bne.n	8011de0 <prvCopyDataToQueue+0x74>
	{
		( void ) memcpy( ( void * ) pxQueue->pcWriteTo, pvItemToQueue, ( size_t ) pxQueue->uxItemSize ); /*lint !e961 !e418 !e9087 MISRA exception as the casts are only redundant for some ports, plus previous logic ensures a null pointer can only be passed to memcpy() if the copy size is 0.  Cast to void required by function signature and safe as no alignment requirement and copy length specified in bytes. */
 8011dac:	68fb      	ldr	r3, [r7, #12]
 8011dae:	6858      	ldr	r0, [r3, #4]
 8011db0:	68fb      	ldr	r3, [r7, #12]
 8011db2:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8011db4:	461a      	mov	r2, r3
 8011db6:	68b9      	ldr	r1, [r7, #8]
 8011db8:	f017 fe31 	bl	8029a1e <memcpy>
		pxQueue->pcWriteTo += pxQueue->uxItemSize; /*lint !e9016 Pointer arithmetic on char types ok, especially in this use case where it is the clearest way of conveying intent. */
 8011dbc:	68fb      	ldr	r3, [r7, #12]
 8011dbe:	685a      	ldr	r2, [r3, #4]
 8011dc0:	68fb      	ldr	r3, [r7, #12]
 8011dc2:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8011dc4:	441a      	add	r2, r3
 8011dc6:	68fb      	ldr	r3, [r7, #12]
 8011dc8:	605a      	str	r2, [r3, #4]
		if( pxQueue->pcWriteTo >= pxQueue->u.xQueue.pcTail ) /*lint !e946 MISRA exception justified as comparison of pointers is the cleanest solution. */
 8011dca:	68fb      	ldr	r3, [r7, #12]
 8011dcc:	685a      	ldr	r2, [r3, #4]
 8011dce:	68fb      	ldr	r3, [r7, #12]
 8011dd0:	689b      	ldr	r3, [r3, #8]
 8011dd2:	429a      	cmp	r2, r3
 8011dd4:	d32b      	bcc.n	8011e2e <prvCopyDataToQueue+0xc2>
		{
			pxQueue->pcWriteTo = pxQueue->pcHead;
 8011dd6:	68fb      	ldr	r3, [r7, #12]
 8011dd8:	681a      	ldr	r2, [r3, #0]
 8011dda:	68fb      	ldr	r3, [r7, #12]
 8011ddc:	605a      	str	r2, [r3, #4]
 8011dde:	e026      	b.n	8011e2e <prvCopyDataToQueue+0xc2>
			mtCOVERAGE_TEST_MARKER();
		}
	}
	else
	{
		( void ) memcpy( ( void * ) pxQueue->u.xQueue.pcReadFrom, pvItemToQueue, ( size_t ) pxQueue->uxItemSize ); /*lint !e961 !e9087 !e418 MISRA exception as the casts are only redundant for some ports.  Cast to void required by function signature and safe as no alignment requirement and copy length specified in bytes.  Assert checks null pointer only used when length is 0. */
 8011de0:	68fb      	ldr	r3, [r7, #12]
 8011de2:	68d8      	ldr	r0, [r3, #12]
 8011de4:	68fb      	ldr	r3, [r7, #12]
 8011de6:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8011de8:	461a      	mov	r2, r3
 8011dea:	68b9      	ldr	r1, [r7, #8]
 8011dec:	f017 fe17 	bl	8029a1e <memcpy>
		pxQueue->u.xQueue.pcReadFrom -= pxQueue->uxItemSize;
 8011df0:	68fb      	ldr	r3, [r7, #12]
 8011df2:	68da      	ldr	r2, [r3, #12]
 8011df4:	68fb      	ldr	r3, [r7, #12]
 8011df6:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8011df8:	425b      	negs	r3, r3
 8011dfa:	441a      	add	r2, r3
 8011dfc:	68fb      	ldr	r3, [r7, #12]
 8011dfe:	60da      	str	r2, [r3, #12]
		if( pxQueue->u.xQueue.pcReadFrom < pxQueue->pcHead ) /*lint !e946 MISRA exception justified as comparison of pointers is the cleanest solution. */
 8011e00:	68fb      	ldr	r3, [r7, #12]
 8011e02:	68da      	ldr	r2, [r3, #12]
 8011e04:	68fb      	ldr	r3, [r7, #12]
 8011e06:	681b      	ldr	r3, [r3, #0]
 8011e08:	429a      	cmp	r2, r3
 8011e0a:	d207      	bcs.n	8011e1c <prvCopyDataToQueue+0xb0>
		{
			pxQueue->u.xQueue.pcReadFrom = ( pxQueue->u.xQueue.pcTail - pxQueue->uxItemSize );
 8011e0c:	68fb      	ldr	r3, [r7, #12]
 8011e0e:	689a      	ldr	r2, [r3, #8]
 8011e10:	68fb      	ldr	r3, [r7, #12]
 8011e12:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8011e14:	425b      	negs	r3, r3
 8011e16:	441a      	add	r2, r3
 8011e18:	68fb      	ldr	r3, [r7, #12]
 8011e1a:	60da      	str	r2, [r3, #12]
		else
		{
			mtCOVERAGE_TEST_MARKER();
		}

		if( xPosition == queueOVERWRITE )
 8011e1c:	687b      	ldr	r3, [r7, #4]
 8011e1e:	2b02      	cmp	r3, #2
 8011e20:	d105      	bne.n	8011e2e <prvCopyDataToQueue+0xc2>
		{
			if( uxMessagesWaiting > ( UBaseType_t ) 0 )
 8011e22:	693b      	ldr	r3, [r7, #16]
 8011e24:	2b00      	cmp	r3, #0
 8011e26:	d002      	beq.n	8011e2e <prvCopyDataToQueue+0xc2>
			{
				/* An item is not being added but overwritten, so subtract
				one from the recorded number of items in the queue so when
				one is added again below the number of recorded items remains
				correct. */
				--uxMessagesWaiting;
 8011e28:	693b      	ldr	r3, [r7, #16]
 8011e2a:	3b01      	subs	r3, #1
 8011e2c:	613b      	str	r3, [r7, #16]
		{
			mtCOVERAGE_TEST_MARKER();
		}
	}

	pxQueue->uxMessagesWaiting = uxMessagesWaiting + ( UBaseType_t ) 1;
 8011e2e:	693b      	ldr	r3, [r7, #16]
 8011e30:	1c5a      	adds	r2, r3, #1
 8011e32:	68fb      	ldr	r3, [r7, #12]
 8011e34:	639a      	str	r2, [r3, #56]	@ 0x38

	return xReturn;
 8011e36:	697b      	ldr	r3, [r7, #20]
}
 8011e38:	4618      	mov	r0, r3
 8011e3a:	3718      	adds	r7, #24
 8011e3c:	46bd      	mov	sp, r7
 8011e3e:	bd80      	pop	{r7, pc}

08011e40 <prvCopyDataFromQueue>:
/*-----------------------------------------------------------*/

static void prvCopyDataFromQueue( Queue_t * const pxQueue, void * const pvBuffer )
{
 8011e40:	b580      	push	{r7, lr}
 8011e42:	b082      	sub	sp, #8
 8011e44:	af00      	add	r7, sp, #0
 8011e46:	6078      	str	r0, [r7, #4]
 8011e48:	6039      	str	r1, [r7, #0]
	if( pxQueue->uxItemSize != ( UBaseType_t ) 0 )
 8011e4a:	687b      	ldr	r3, [r7, #4]
 8011e4c:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8011e4e:	2b00      	cmp	r3, #0
 8011e50:	d018      	beq.n	8011e84 <prvCopyDataFromQueue+0x44>
	{
		pxQueue->u.xQueue.pcReadFrom += pxQueue->uxItemSize; /*lint !e9016 Pointer arithmetic on char types ok, especially in this use case where it is the clearest way of conveying intent. */
 8011e52:	687b      	ldr	r3, [r7, #4]
 8011e54:	68da      	ldr	r2, [r3, #12]
 8011e56:	687b      	ldr	r3, [r7, #4]
 8011e58:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8011e5a:	441a      	add	r2, r3
 8011e5c:	687b      	ldr	r3, [r7, #4]
 8011e5e:	60da      	str	r2, [r3, #12]
		if( pxQueue->u.xQueue.pcReadFrom >= pxQueue->u.xQueue.pcTail ) /*lint !e946 MISRA exception justified as use of the relational operator is the cleanest solutions. */
 8011e60:	687b      	ldr	r3, [r7, #4]
 8011e62:	68da      	ldr	r2, [r3, #12]
 8011e64:	687b      	ldr	r3, [r7, #4]
 8011e66:	689b      	ldr	r3, [r3, #8]
 8011e68:	429a      	cmp	r2, r3
 8011e6a:	d303      	bcc.n	8011e74 <prvCopyDataFromQueue+0x34>
		{
			pxQueue->u.xQueue.pcReadFrom = pxQueue->pcHead;
 8011e6c:	687b      	ldr	r3, [r7, #4]
 8011e6e:	681a      	ldr	r2, [r3, #0]
 8011e70:	687b      	ldr	r3, [r7, #4]
 8011e72:	60da      	str	r2, [r3, #12]
		}
		else
		{
			mtCOVERAGE_TEST_MARKER();
		}
		( void ) memcpy( ( void * ) pvBuffer, ( void * ) pxQueue->u.xQueue.pcReadFrom, ( size_t ) pxQueue->uxItemSize ); /*lint !e961 !e418 !e9087 MISRA exception as the casts are only redundant for some ports.  Also previous logic ensures a null pointer can only be passed to memcpy() when the count is 0.  Cast to void required by function signature and safe as no alignment requirement and copy length specified in bytes. */
 8011e74:	687b      	ldr	r3, [r7, #4]
 8011e76:	68d9      	ldr	r1, [r3, #12]
 8011e78:	687b      	ldr	r3, [r7, #4]
 8011e7a:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8011e7c:	461a      	mov	r2, r3
 8011e7e:	6838      	ldr	r0, [r7, #0]
 8011e80:	f017 fdcd 	bl	8029a1e <memcpy>
	}
}
 8011e84:	bf00      	nop
 8011e86:	3708      	adds	r7, #8
 8011e88:	46bd      	mov	sp, r7
 8011e8a:	bd80      	pop	{r7, pc}

08011e8c <prvUnlockQueue>:
/*-----------------------------------------------------------*/

static void prvUnlockQueue( Queue_t * const pxQueue )
{
 8011e8c:	b580      	push	{r7, lr}
 8011e8e:	b084      	sub	sp, #16
 8011e90:	af00      	add	r7, sp, #0
 8011e92:	6078      	str	r0, [r7, #4]

	/* The lock counts contains the number of extra data items placed or
	removed from the queue while the queue was locked.  When a queue is
	locked items can be added or removed, but the event lists cannot be
	updated. */
	taskENTER_CRITICAL();
 8011e94:	f002 fbe8 	bl	8014668 <vPortEnterCritical>
	{
		int8_t cTxLock = pxQueue->cTxLock;
 8011e98:	687b      	ldr	r3, [r7, #4]
 8011e9a:	f893 3045 	ldrb.w	r3, [r3, #69]	@ 0x45
 8011e9e:	73fb      	strb	r3, [r7, #15]

		/* See if data was added to the queue while it was locked. */
		while( cTxLock > queueLOCKED_UNMODIFIED )
 8011ea0:	e011      	b.n	8011ec6 <prvUnlockQueue+0x3a>
			}
			#else /* configUSE_QUEUE_SETS */
			{
				/* Tasks that are removed from the event list will get added to
				the pending ready list as the scheduler is still suspended. */
				if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
 8011ea2:	687b      	ldr	r3, [r7, #4]
 8011ea4:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8011ea6:	2b00      	cmp	r3, #0
 8011ea8:	d012      	beq.n	8011ed0 <prvUnlockQueue+0x44>
				{
					if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
 8011eaa:	687b      	ldr	r3, [r7, #4]
 8011eac:	3324      	adds	r3, #36	@ 0x24
 8011eae:	4618      	mov	r0, r3
 8011eb0:	f001 f93e 	bl	8013130 <xTaskRemoveFromEventList>
 8011eb4:	4603      	mov	r3, r0
 8011eb6:	2b00      	cmp	r3, #0
 8011eb8:	d001      	beq.n	8011ebe <prvUnlockQueue+0x32>
					{
						/* The task waiting has a higher priority so record that
						a context switch is required. */
						vTaskMissedYield();
 8011eba:	f001 fa3f 	bl	801333c <vTaskMissedYield>
					break;
				}
			}
			#endif /* configUSE_QUEUE_SETS */

			--cTxLock;
 8011ebe:	7bfb      	ldrb	r3, [r7, #15]
 8011ec0:	3b01      	subs	r3, #1
 8011ec2:	b2db      	uxtb	r3, r3
 8011ec4:	73fb      	strb	r3, [r7, #15]
		while( cTxLock > queueLOCKED_UNMODIFIED )
 8011ec6:	f997 300f 	ldrsb.w	r3, [r7, #15]
 8011eca:	2b00      	cmp	r3, #0
 8011ecc:	dce9      	bgt.n	8011ea2 <prvUnlockQueue+0x16>
 8011ece:	e000      	b.n	8011ed2 <prvUnlockQueue+0x46>
					break;
 8011ed0:	bf00      	nop
		}

		pxQueue->cTxLock = queueUNLOCKED;
 8011ed2:	687b      	ldr	r3, [r7, #4]
 8011ed4:	22ff      	movs	r2, #255	@ 0xff
 8011ed6:	f883 2045 	strb.w	r2, [r3, #69]	@ 0x45
	}
	taskEXIT_CRITICAL();
 8011eda:	f002 fbf7 	bl	80146cc <vPortExitCritical>

	/* Do the same for the Rx lock. */
	taskENTER_CRITICAL();
 8011ede:	f002 fbc3 	bl	8014668 <vPortEnterCritical>
	{
		int8_t cRxLock = pxQueue->cRxLock;
 8011ee2:	687b      	ldr	r3, [r7, #4]
 8011ee4:	f893 3044 	ldrb.w	r3, [r3, #68]	@ 0x44
 8011ee8:	73bb      	strb	r3, [r7, #14]

		while( cRxLock > queueLOCKED_UNMODIFIED )
 8011eea:	e011      	b.n	8011f10 <prvUnlockQueue+0x84>
		{
			if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
 8011eec:	687b      	ldr	r3, [r7, #4]
 8011eee:	691b      	ldr	r3, [r3, #16]
 8011ef0:	2b00      	cmp	r3, #0
 8011ef2:	d012      	beq.n	8011f1a <prvUnlockQueue+0x8e>
			{
				if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
 8011ef4:	687b      	ldr	r3, [r7, #4]
 8011ef6:	3310      	adds	r3, #16
 8011ef8:	4618      	mov	r0, r3
 8011efa:	f001 f919 	bl	8013130 <xTaskRemoveFromEventList>
 8011efe:	4603      	mov	r3, r0
 8011f00:	2b00      	cmp	r3, #0
 8011f02:	d001      	beq.n	8011f08 <prvUnlockQueue+0x7c>
				{
					vTaskMissedYield();
 8011f04:	f001 fa1a 	bl	801333c <vTaskMissedYield>
				else
				{
					mtCOVERAGE_TEST_MARKER();
				}

				--cRxLock;
 8011f08:	7bbb      	ldrb	r3, [r7, #14]
 8011f0a:	3b01      	subs	r3, #1
 8011f0c:	b2db      	uxtb	r3, r3
 8011f0e:	73bb      	strb	r3, [r7, #14]
		while( cRxLock > queueLOCKED_UNMODIFIED )
 8011f10:	f997 300e 	ldrsb.w	r3, [r7, #14]
 8011f14:	2b00      	cmp	r3, #0
 8011f16:	dce9      	bgt.n	8011eec <prvUnlockQueue+0x60>
 8011f18:	e000      	b.n	8011f1c <prvUnlockQueue+0x90>
			}
			else
			{
				break;
 8011f1a:	bf00      	nop
			}
		}

		pxQueue->cRxLock = queueUNLOCKED;
 8011f1c:	687b      	ldr	r3, [r7, #4]
 8011f1e:	22ff      	movs	r2, #255	@ 0xff
 8011f20:	f883 2044 	strb.w	r2, [r3, #68]	@ 0x44
	}
	taskEXIT_CRITICAL();
 8011f24:	f002 fbd2 	bl	80146cc <vPortExitCritical>
}
 8011f28:	bf00      	nop
 8011f2a:	3710      	adds	r7, #16
 8011f2c:	46bd      	mov	sp, r7
 8011f2e:	bd80      	pop	{r7, pc}

08011f30 <prvIsQueueEmpty>:
/*-----------------------------------------------------------*/

static BaseType_t prvIsQueueEmpty( const Queue_t *pxQueue )
{
 8011f30:	b580      	push	{r7, lr}
 8011f32:	b084      	sub	sp, #16
 8011f34:	af00      	add	r7, sp, #0
 8011f36:	6078      	str	r0, [r7, #4]
BaseType_t xReturn;

	taskENTER_CRITICAL();
 8011f38:	f002 fb96 	bl	8014668 <vPortEnterCritical>
	{
		if( pxQueue->uxMessagesWaiting == ( UBaseType_t )  0 )
 8011f3c:	687b      	ldr	r3, [r7, #4]
 8011f3e:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 8011f40:	2b00      	cmp	r3, #0
 8011f42:	d102      	bne.n	8011f4a <prvIsQueueEmpty+0x1a>
		{
			xReturn = pdTRUE;
 8011f44:	2301      	movs	r3, #1
 8011f46:	60fb      	str	r3, [r7, #12]
 8011f48:	e001      	b.n	8011f4e <prvIsQueueEmpty+0x1e>
		}
		else
		{
			xReturn = pdFALSE;
 8011f4a:	2300      	movs	r3, #0
 8011f4c:	60fb      	str	r3, [r7, #12]
		}
	}
	taskEXIT_CRITICAL();
 8011f4e:	f002 fbbd 	bl	80146cc <vPortExitCritical>

	return xReturn;
 8011f52:	68fb      	ldr	r3, [r7, #12]
}
 8011f54:	4618      	mov	r0, r3
 8011f56:	3710      	adds	r7, #16
 8011f58:	46bd      	mov	sp, r7
 8011f5a:	bd80      	pop	{r7, pc}

08011f5c <prvIsQueueFull>:
	return xReturn;
} /*lint !e818 xQueue could not be pointer to const because it is a typedef. */
/*-----------------------------------------------------------*/

static BaseType_t prvIsQueueFull( const Queue_t *pxQueue )
{
 8011f5c:	b580      	push	{r7, lr}
 8011f5e:	b084      	sub	sp, #16
 8011f60:	af00      	add	r7, sp, #0
 8011f62:	6078      	str	r0, [r7, #4]
BaseType_t xReturn;

	taskENTER_CRITICAL();
 8011f64:	f002 fb80 	bl	8014668 <vPortEnterCritical>
	{
		if( pxQueue->uxMessagesWaiting == pxQueue->uxLength )
 8011f68:	687b      	ldr	r3, [r7, #4]
 8011f6a:	6b9a      	ldr	r2, [r3, #56]	@ 0x38
 8011f6c:	687b      	ldr	r3, [r7, #4]
 8011f6e:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 8011f70:	429a      	cmp	r2, r3
 8011f72:	d102      	bne.n	8011f7a <prvIsQueueFull+0x1e>
		{
			xReturn = pdTRUE;
 8011f74:	2301      	movs	r3, #1
 8011f76:	60fb      	str	r3, [r7, #12]
 8011f78:	e001      	b.n	8011f7e <prvIsQueueFull+0x22>
		}
		else
		{
			xReturn = pdFALSE;
 8011f7a:	2300      	movs	r3, #0
 8011f7c:	60fb      	str	r3, [r7, #12]
		}
	}
	taskEXIT_CRITICAL();
 8011f7e:	f002 fba5 	bl	80146cc <vPortExitCritical>

	return xReturn;
 8011f82:	68fb      	ldr	r3, [r7, #12]
}
 8011f84:	4618      	mov	r0, r3
 8011f86:	3710      	adds	r7, #16
 8011f88:	46bd      	mov	sp, r7
 8011f8a:	bd80      	pop	{r7, pc}

08011f8c <vQueueAddToRegistry>:
/*-----------------------------------------------------------*/

#if ( configQUEUE_REGISTRY_SIZE > 0 )

	void vQueueAddToRegistry( QueueHandle_t xQueue, const char *pcQueueName ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
	{
 8011f8c:	b480      	push	{r7}
 8011f8e:	b085      	sub	sp, #20
 8011f90:	af00      	add	r7, sp, #0
 8011f92:	6078      	str	r0, [r7, #4]
 8011f94:	6039      	str	r1, [r7, #0]
	UBaseType_t ux;

		/* See if there is an empty space in the registry.  A NULL name denotes
		a free slot. */
		for( ux = ( UBaseType_t ) 0U; ux < ( UBaseType_t ) configQUEUE_REGISTRY_SIZE; ux++ )
 8011f96:	2300      	movs	r3, #0
 8011f98:	60fb      	str	r3, [r7, #12]
 8011f9a:	e014      	b.n	8011fc6 <vQueueAddToRegistry+0x3a>
		{
			if( xQueueRegistry[ ux ].pcQueueName == NULL )
 8011f9c:	4a0f      	ldr	r2, [pc, #60]	@ (8011fdc <vQueueAddToRegistry+0x50>)
 8011f9e:	68fb      	ldr	r3, [r7, #12]
 8011fa0:	f852 3033 	ldr.w	r3, [r2, r3, lsl #3]
 8011fa4:	2b00      	cmp	r3, #0
 8011fa6:	d10b      	bne.n	8011fc0 <vQueueAddToRegistry+0x34>
			{
				/* Store the information on this queue. */
				xQueueRegistry[ ux ].pcQueueName = pcQueueName;
 8011fa8:	490c      	ldr	r1, [pc, #48]	@ (8011fdc <vQueueAddToRegistry+0x50>)
 8011faa:	68fb      	ldr	r3, [r7, #12]
 8011fac:	683a      	ldr	r2, [r7, #0]
 8011fae:	f841 2033 	str.w	r2, [r1, r3, lsl #3]
				xQueueRegistry[ ux ].xHandle = xQueue;
 8011fb2:	4a0a      	ldr	r2, [pc, #40]	@ (8011fdc <vQueueAddToRegistry+0x50>)
 8011fb4:	68fb      	ldr	r3, [r7, #12]
 8011fb6:	00db      	lsls	r3, r3, #3
 8011fb8:	4413      	add	r3, r2
 8011fba:	687a      	ldr	r2, [r7, #4]
 8011fbc:	605a      	str	r2, [r3, #4]

				traceQUEUE_REGISTRY_ADD( xQueue, pcQueueName );
				break;
 8011fbe:	e006      	b.n	8011fce <vQueueAddToRegistry+0x42>
		for( ux = ( UBaseType_t ) 0U; ux < ( UBaseType_t ) configQUEUE_REGISTRY_SIZE; ux++ )
 8011fc0:	68fb      	ldr	r3, [r7, #12]
 8011fc2:	3301      	adds	r3, #1
 8011fc4:	60fb      	str	r3, [r7, #12]
 8011fc6:	68fb      	ldr	r3, [r7, #12]
 8011fc8:	2b07      	cmp	r3, #7
 8011fca:	d9e7      	bls.n	8011f9c <vQueueAddToRegistry+0x10>
			else
			{
				mtCOVERAGE_TEST_MARKER();
			}
		}
	}
 8011fcc:	bf00      	nop
 8011fce:	bf00      	nop
 8011fd0:	3714      	adds	r7, #20
 8011fd2:	46bd      	mov	sp, r7
 8011fd4:	f85d 7b04 	ldr.w	r7, [sp], #4
 8011fd8:	4770      	bx	lr
 8011fda:	bf00      	nop
 8011fdc:	24002db4 	.word	0x24002db4

08011fe0 <vQueueUnregisterQueue>:
/*-----------------------------------------------------------*/

#if ( configQUEUE_REGISTRY_SIZE > 0 )

	void vQueueUnregisterQueue( QueueHandle_t xQueue )
	{
 8011fe0:	b480      	push	{r7}
 8011fe2:	b085      	sub	sp, #20
 8011fe4:	af00      	add	r7, sp, #0
 8011fe6:	6078      	str	r0, [r7, #4]
	UBaseType_t ux;

		/* See if the handle of the queue being unregistered in actually in the
		registry. */
		for( ux = ( UBaseType_t ) 0U; ux < ( UBaseType_t ) configQUEUE_REGISTRY_SIZE; ux++ )
 8011fe8:	2300      	movs	r3, #0
 8011fea:	60fb      	str	r3, [r7, #12]
 8011fec:	e016      	b.n	801201c <vQueueUnregisterQueue+0x3c>
		{
			if( xQueueRegistry[ ux ].xHandle == xQueue )
 8011fee:	4a10      	ldr	r2, [pc, #64]	@ (8012030 <vQueueUnregisterQueue+0x50>)
 8011ff0:	68fb      	ldr	r3, [r7, #12]
 8011ff2:	00db      	lsls	r3, r3, #3
 8011ff4:	4413      	add	r3, r2
 8011ff6:	685b      	ldr	r3, [r3, #4]
 8011ff8:	687a      	ldr	r2, [r7, #4]
 8011ffa:	429a      	cmp	r2, r3
 8011ffc:	d10b      	bne.n	8012016 <vQueueUnregisterQueue+0x36>
			{
				/* Set the name to NULL to show that this slot if free again. */
				xQueueRegistry[ ux ].pcQueueName = NULL;
 8011ffe:	4a0c      	ldr	r2, [pc, #48]	@ (8012030 <vQueueUnregisterQueue+0x50>)
 8012000:	68fb      	ldr	r3, [r7, #12]
 8012002:	2100      	movs	r1, #0
 8012004:	f842 1033 	str.w	r1, [r2, r3, lsl #3]

				/* Set the handle to NULL to ensure the same queue handle cannot
				appear in the registry twice if it is added, removed, then
				added again. */
				xQueueRegistry[ ux ].xHandle = ( QueueHandle_t ) 0;
 8012008:	4a09      	ldr	r2, [pc, #36]	@ (8012030 <vQueueUnregisterQueue+0x50>)
 801200a:	68fb      	ldr	r3, [r7, #12]
 801200c:	00db      	lsls	r3, r3, #3
 801200e:	4413      	add	r3, r2
 8012010:	2200      	movs	r2, #0
 8012012:	605a      	str	r2, [r3, #4]
				break;
 8012014:	e006      	b.n	8012024 <vQueueUnregisterQueue+0x44>
		for( ux = ( UBaseType_t ) 0U; ux < ( UBaseType_t ) configQUEUE_REGISTRY_SIZE; ux++ )
 8012016:	68fb      	ldr	r3, [r7, #12]
 8012018:	3301      	adds	r3, #1
 801201a:	60fb      	str	r3, [r7, #12]
 801201c:	68fb      	ldr	r3, [r7, #12]
 801201e:	2b07      	cmp	r3, #7
 8012020:	d9e5      	bls.n	8011fee <vQueueUnregisterQueue+0xe>
			{
				mtCOVERAGE_TEST_MARKER();
			}
		}

	} /*lint !e818 xQueue could not be pointer to const because it is a typedef. */
 8012022:	bf00      	nop
 8012024:	bf00      	nop
 8012026:	3714      	adds	r7, #20
 8012028:	46bd      	mov	sp, r7
 801202a:	f85d 7b04 	ldr.w	r7, [sp], #4
 801202e:	4770      	bx	lr
 8012030:	24002db4 	.word	0x24002db4

08012034 <vQueueWaitForMessageRestricted>:
/*-----------------------------------------------------------*/

#if ( configUSE_TIMERS == 1 )

	void vQueueWaitForMessageRestricted( QueueHandle_t xQueue, TickType_t xTicksToWait, const BaseType_t xWaitIndefinitely )
	{
 8012034:	b580      	push	{r7, lr}
 8012036:	b086      	sub	sp, #24
 8012038:	af00      	add	r7, sp, #0
 801203a:	60f8      	str	r0, [r7, #12]
 801203c:	60b9      	str	r1, [r7, #8]
 801203e:	607a      	str	r2, [r7, #4]
	Queue_t * const pxQueue = xQueue;
 8012040:	68fb      	ldr	r3, [r7, #12]
 8012042:	617b      	str	r3, [r7, #20]
		will not actually cause the task to block, just place it on a blocked
		list.  It will not block until the scheduler is unlocked - at which
		time a yield will be performed.  If an item is added to the queue while
		the queue is locked, and the calling task blocks on the queue, then the
		calling task will be immediately unblocked when the queue is unlocked. */
		prvLockQueue( pxQueue );
 8012044:	f002 fb10 	bl	8014668 <vPortEnterCritical>
 8012048:	697b      	ldr	r3, [r7, #20]
 801204a:	f893 3044 	ldrb.w	r3, [r3, #68]	@ 0x44
 801204e:	b25b      	sxtb	r3, r3
 8012050:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8012054:	d103      	bne.n	801205e <vQueueWaitForMessageRestricted+0x2a>
 8012056:	697b      	ldr	r3, [r7, #20]
 8012058:	2200      	movs	r2, #0
 801205a:	f883 2044 	strb.w	r2, [r3, #68]	@ 0x44
 801205e:	697b      	ldr	r3, [r7, #20]
 8012060:	f893 3045 	ldrb.w	r3, [r3, #69]	@ 0x45
 8012064:	b25b      	sxtb	r3, r3
 8012066:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 801206a:	d103      	bne.n	8012074 <vQueueWaitForMessageRestricted+0x40>
 801206c:	697b      	ldr	r3, [r7, #20]
 801206e:	2200      	movs	r2, #0
 8012070:	f883 2045 	strb.w	r2, [r3, #69]	@ 0x45
 8012074:	f002 fb2a 	bl	80146cc <vPortExitCritical>
		if( pxQueue->uxMessagesWaiting == ( UBaseType_t ) 0U )
 8012078:	697b      	ldr	r3, [r7, #20]
 801207a:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 801207c:	2b00      	cmp	r3, #0
 801207e:	d106      	bne.n	801208e <vQueueWaitForMessageRestricted+0x5a>
		{
			/* There is nothing in the queue, block for the specified period. */
			vTaskPlaceOnEventListRestricted( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait, xWaitIndefinitely );
 8012080:	697b      	ldr	r3, [r7, #20]
 8012082:	3324      	adds	r3, #36	@ 0x24
 8012084:	687a      	ldr	r2, [r7, #4]
 8012086:	68b9      	ldr	r1, [r7, #8]
 8012088:	4618      	mov	r0, r3
 801208a:	f001 f825 	bl	80130d8 <vTaskPlaceOnEventListRestricted>
		}
		else
		{
			mtCOVERAGE_TEST_MARKER();
		}
		prvUnlockQueue( pxQueue );
 801208e:	6978      	ldr	r0, [r7, #20]
 8012090:	f7ff fefc 	bl	8011e8c <prvUnlockQueue>
	}
 8012094:	bf00      	nop
 8012096:	3718      	adds	r7, #24
 8012098:	46bd      	mov	sp, r7
 801209a:	bd80      	pop	{r7, pc}

0801209c <xStreamBufferGenericCreate>:
/*-----------------------------------------------------------*/

#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )

	StreamBufferHandle_t xStreamBufferGenericCreate( size_t xBufferSizeBytes, size_t xTriggerLevelBytes, BaseType_t xIsMessageBuffer )
	{
 801209c:	b580      	push	{r7, lr}
 801209e:	b08c      	sub	sp, #48	@ 0x30
 80120a0:	af02      	add	r7, sp, #8
 80120a2:	60f8      	str	r0, [r7, #12]
 80120a4:	60b9      	str	r1, [r7, #8]
 80120a6:	607a      	str	r2, [r7, #4]

		/* In case the stream buffer is going to be used as a message buffer
		(that is, it will hold discrete messages with a little meta data that
		says how big the next message is) check the buffer will be large enough
		to hold at least one message. */
		if( xIsMessageBuffer == pdTRUE )
 80120a8:	687b      	ldr	r3, [r7, #4]
 80120aa:	2b01      	cmp	r3, #1
 80120ac:	d111      	bne.n	80120d2 <xStreamBufferGenericCreate+0x36>
		{
			/* Is a message buffer but not statically allocated. */
			ucFlags = sbFLAGS_IS_MESSAGE_BUFFER;
 80120ae:	2301      	movs	r3, #1
 80120b0:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
			configASSERT( xBufferSizeBytes > sbBYTES_TO_STORE_MESSAGE_LENGTH );
 80120b4:	68fb      	ldr	r3, [r7, #12]
 80120b6:	2b04      	cmp	r3, #4
 80120b8:	d81d      	bhi.n	80120f6 <xStreamBufferGenericCreate+0x5a>
	__asm volatile
 80120ba:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80120be:	f383 8811 	msr	BASEPRI, r3
 80120c2:	f3bf 8f6f 	isb	sy
 80120c6:	f3bf 8f4f 	dsb	sy
 80120ca:	61fb      	str	r3, [r7, #28]
}
 80120cc:	bf00      	nop
 80120ce:	bf00      	nop
 80120d0:	e7fd      	b.n	80120ce <xStreamBufferGenericCreate+0x32>
		}
		else
		{
			/* Not a message buffer and not statically allocated. */
			ucFlags = 0;
 80120d2:	2300      	movs	r3, #0
 80120d4:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
			configASSERT( xBufferSizeBytes > 0 );
 80120d8:	68fb      	ldr	r3, [r7, #12]
 80120da:	2b00      	cmp	r3, #0
 80120dc:	d10b      	bne.n	80120f6 <xStreamBufferGenericCreate+0x5a>
	__asm volatile
 80120de:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80120e2:	f383 8811 	msr	BASEPRI, r3
 80120e6:	f3bf 8f6f 	isb	sy
 80120ea:	f3bf 8f4f 	dsb	sy
 80120ee:	61bb      	str	r3, [r7, #24]
}
 80120f0:	bf00      	nop
 80120f2:	bf00      	nop
 80120f4:	e7fd      	b.n	80120f2 <xStreamBufferGenericCreate+0x56>
		}
		configASSERT( xTriggerLevelBytes <= xBufferSizeBytes );
 80120f6:	68ba      	ldr	r2, [r7, #8]
 80120f8:	68fb      	ldr	r3, [r7, #12]
 80120fa:	429a      	cmp	r2, r3
 80120fc:	d90b      	bls.n	8012116 <xStreamBufferGenericCreate+0x7a>
	__asm volatile
 80120fe:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012102:	f383 8811 	msr	BASEPRI, r3
 8012106:	f3bf 8f6f 	isb	sy
 801210a:	f3bf 8f4f 	dsb	sy
 801210e:	617b      	str	r3, [r7, #20]
}
 8012110:	bf00      	nop
 8012112:	bf00      	nop
 8012114:	e7fd      	b.n	8012112 <xStreamBufferGenericCreate+0x76>

		/* A trigger level of 0 would cause a waiting task to unblock even when
		the buffer was empty. */
		if( xTriggerLevelBytes == ( size_t ) 0 )
 8012116:	68bb      	ldr	r3, [r7, #8]
 8012118:	2b00      	cmp	r3, #0
 801211a:	d101      	bne.n	8012120 <xStreamBufferGenericCreate+0x84>
		{
			xTriggerLevelBytes = ( size_t ) 1;
 801211c:	2301      	movs	r3, #1
 801211e:	60bb      	str	r3, [r7, #8]
		and the buffer follows immediately after.  The requested size is
		incremented so the free space is returned as the user would expect -
		this is a quirk of the implementation that means otherwise the free
		space would be reported as one byte smaller than would be logically
		expected. */
		xBufferSizeBytes++;
 8012120:	68fb      	ldr	r3, [r7, #12]
 8012122:	3301      	adds	r3, #1
 8012124:	60fb      	str	r3, [r7, #12]
		pucAllocatedMemory = ( uint8_t * ) pvPortMalloc( xBufferSizeBytes + sizeof( StreamBuffer_t ) ); /*lint !e9079 malloc() only returns void*. */
 8012126:	68fb      	ldr	r3, [r7, #12]
 8012128:	3324      	adds	r3, #36	@ 0x24
 801212a:	4618      	mov	r0, r3
 801212c:	f002 fbbe 	bl	80148ac <pvPortMalloc>
 8012130:	6238      	str	r0, [r7, #32]

		if( pucAllocatedMemory != NULL )
 8012132:	6a3b      	ldr	r3, [r7, #32]
 8012134:	2b00      	cmp	r3, #0
 8012136:	d00a      	beq.n	801214e <xStreamBufferGenericCreate+0xb2>
		{
			prvInitialiseNewStreamBuffer( ( StreamBuffer_t * ) pucAllocatedMemory, /* Structure at the start of the allocated memory. */ /*lint !e9087 Safe cast as allocated memory is aligned. */ /*lint !e826 Area is not too small and alignment is guaranteed provided malloc() behaves as expected and returns aligned buffer. */
 8012138:	6a3b      	ldr	r3, [r7, #32]
 801213a:	f103 0124 	add.w	r1, r3, #36	@ 0x24
 801213e:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 8012142:	9300      	str	r3, [sp, #0]
 8012144:	68bb      	ldr	r3, [r7, #8]
 8012146:	68fa      	ldr	r2, [r7, #12]
 8012148:	6a38      	ldr	r0, [r7, #32]
 801214a:	f000 fb0b 	bl	8012764 <prvInitialiseNewStreamBuffer>
		else
		{
			traceSTREAM_BUFFER_CREATE_FAILED( xIsMessageBuffer );
		}

		return ( StreamBufferHandle_t ) pucAllocatedMemory; /*lint !e9087 !e826 Safe cast as allocated memory is aligned. */
 801214e:	6a3b      	ldr	r3, [r7, #32]
	}
 8012150:	4618      	mov	r0, r3
 8012152:	3728      	adds	r7, #40	@ 0x28
 8012154:	46bd      	mov	sp, r7
 8012156:	bd80      	pop	{r7, pc}

08012158 <xStreamBufferSpacesAvailable>:
	return xReturn;
}
/*-----------------------------------------------------------*/

size_t xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer )
{
 8012158:	b480      	push	{r7}
 801215a:	b087      	sub	sp, #28
 801215c:	af00      	add	r7, sp, #0
 801215e:	6078      	str	r0, [r7, #4]
const StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
 8012160:	687b      	ldr	r3, [r7, #4]
 8012162:	613b      	str	r3, [r7, #16]
size_t xSpace;

	configASSERT( pxStreamBuffer );
 8012164:	693b      	ldr	r3, [r7, #16]
 8012166:	2b00      	cmp	r3, #0
 8012168:	d10b      	bne.n	8012182 <xStreamBufferSpacesAvailable+0x2a>
	__asm volatile
 801216a:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801216e:	f383 8811 	msr	BASEPRI, r3
 8012172:	f3bf 8f6f 	isb	sy
 8012176:	f3bf 8f4f 	dsb	sy
 801217a:	60fb      	str	r3, [r7, #12]
}
 801217c:	bf00      	nop
 801217e:	bf00      	nop
 8012180:	e7fd      	b.n	801217e <xStreamBufferSpacesAvailable+0x26>

	xSpace = pxStreamBuffer->xLength + pxStreamBuffer->xTail;
 8012182:	693b      	ldr	r3, [r7, #16]
 8012184:	689a      	ldr	r2, [r3, #8]
 8012186:	693b      	ldr	r3, [r7, #16]
 8012188:	681b      	ldr	r3, [r3, #0]
 801218a:	4413      	add	r3, r2
 801218c:	617b      	str	r3, [r7, #20]
	xSpace -= pxStreamBuffer->xHead;
 801218e:	693b      	ldr	r3, [r7, #16]
 8012190:	685b      	ldr	r3, [r3, #4]
 8012192:	697a      	ldr	r2, [r7, #20]
 8012194:	1ad3      	subs	r3, r2, r3
 8012196:	617b      	str	r3, [r7, #20]
	xSpace -= ( size_t ) 1;
 8012198:	697b      	ldr	r3, [r7, #20]
 801219a:	3b01      	subs	r3, #1
 801219c:	617b      	str	r3, [r7, #20]

	if( xSpace >= pxStreamBuffer->xLength )
 801219e:	693b      	ldr	r3, [r7, #16]
 80121a0:	689b      	ldr	r3, [r3, #8]
 80121a2:	697a      	ldr	r2, [r7, #20]
 80121a4:	429a      	cmp	r2, r3
 80121a6:	d304      	bcc.n	80121b2 <xStreamBufferSpacesAvailable+0x5a>
	{
		xSpace -= pxStreamBuffer->xLength;
 80121a8:	693b      	ldr	r3, [r7, #16]
 80121aa:	689b      	ldr	r3, [r3, #8]
 80121ac:	697a      	ldr	r2, [r7, #20]
 80121ae:	1ad3      	subs	r3, r2, r3
 80121b0:	617b      	str	r3, [r7, #20]
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}

	return xSpace;
 80121b2:	697b      	ldr	r3, [r7, #20]
}
 80121b4:	4618      	mov	r0, r3
 80121b6:	371c      	adds	r7, #28
 80121b8:	46bd      	mov	sp, r7
 80121ba:	f85d 7b04 	ldr.w	r7, [sp], #4
 80121be:	4770      	bx	lr

080121c0 <xStreamBufferSend>:

size_t xStreamBufferSend( StreamBufferHandle_t xStreamBuffer,
						  const void *pvTxData,
						  size_t xDataLengthBytes,
						  TickType_t xTicksToWait )
{
 80121c0:	b580      	push	{r7, lr}
 80121c2:	b090      	sub	sp, #64	@ 0x40
 80121c4:	af02      	add	r7, sp, #8
 80121c6:	60f8      	str	r0, [r7, #12]
 80121c8:	60b9      	str	r1, [r7, #8]
 80121ca:	607a      	str	r2, [r7, #4]
 80121cc:	603b      	str	r3, [r7, #0]
StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
 80121ce:	68fb      	ldr	r3, [r7, #12]
 80121d0:	62fb      	str	r3, [r7, #44]	@ 0x2c
size_t xReturn, xSpace = 0;
 80121d2:	2300      	movs	r3, #0
 80121d4:	637b      	str	r3, [r7, #52]	@ 0x34
size_t xRequiredSpace = xDataLengthBytes;
 80121d6:	687b      	ldr	r3, [r7, #4]
 80121d8:	633b      	str	r3, [r7, #48]	@ 0x30
TimeOut_t xTimeOut;

	configASSERT( pvTxData );
 80121da:	68bb      	ldr	r3, [r7, #8]
 80121dc:	2b00      	cmp	r3, #0
 80121de:	d10b      	bne.n	80121f8 <xStreamBufferSend+0x38>
	__asm volatile
 80121e0:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80121e4:	f383 8811 	msr	BASEPRI, r3
 80121e8:	f3bf 8f6f 	isb	sy
 80121ec:	f3bf 8f4f 	dsb	sy
 80121f0:	627b      	str	r3, [r7, #36]	@ 0x24
}
 80121f2:	bf00      	nop
 80121f4:	bf00      	nop
 80121f6:	e7fd      	b.n	80121f4 <xStreamBufferSend+0x34>
	configASSERT( pxStreamBuffer );
 80121f8:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80121fa:	2b00      	cmp	r3, #0
 80121fc:	d10b      	bne.n	8012216 <xStreamBufferSend+0x56>
	__asm volatile
 80121fe:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012202:	f383 8811 	msr	BASEPRI, r3
 8012206:	f3bf 8f6f 	isb	sy
 801220a:	f3bf 8f4f 	dsb	sy
 801220e:	623b      	str	r3, [r7, #32]
}
 8012210:	bf00      	nop
 8012212:	bf00      	nop
 8012214:	e7fd      	b.n	8012212 <xStreamBufferSend+0x52>

	/* This send function is used to write to both message buffers and stream
	buffers.  If this is a message buffer then the space needed must be
	increased by the amount of bytes needed to store the length of the
	message. */
	if( ( pxStreamBuffer->ucFlags & sbFLAGS_IS_MESSAGE_BUFFER ) != ( uint8_t ) 0 )
 8012216:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8012218:	7f1b      	ldrb	r3, [r3, #28]
 801221a:	f003 0301 	and.w	r3, r3, #1
 801221e:	2b00      	cmp	r3, #0
 8012220:	d012      	beq.n	8012248 <xStreamBufferSend+0x88>
	{
		xRequiredSpace += sbBYTES_TO_STORE_MESSAGE_LENGTH;
 8012222:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012224:	3304      	adds	r3, #4
 8012226:	633b      	str	r3, [r7, #48]	@ 0x30

		/* Overflow? */
		configASSERT( xRequiredSpace > xDataLengthBytes );
 8012228:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 801222a:	687b      	ldr	r3, [r7, #4]
 801222c:	429a      	cmp	r2, r3
 801222e:	d80b      	bhi.n	8012248 <xStreamBufferSend+0x88>
	__asm volatile
 8012230:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012234:	f383 8811 	msr	BASEPRI, r3
 8012238:	f3bf 8f6f 	isb	sy
 801223c:	f3bf 8f4f 	dsb	sy
 8012240:	61fb      	str	r3, [r7, #28]
}
 8012242:	bf00      	nop
 8012244:	bf00      	nop
 8012246:	e7fd      	b.n	8012244 <xStreamBufferSend+0x84>
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}

	if( xTicksToWait != ( TickType_t ) 0 )
 8012248:	683b      	ldr	r3, [r7, #0]
 801224a:	2b00      	cmp	r3, #0
 801224c:	d03f      	beq.n	80122ce <xStreamBufferSend+0x10e>
	{
		vTaskSetTimeOutState( &xTimeOut );
 801224e:	f107 0310 	add.w	r3, r7, #16
 8012252:	4618      	mov	r0, r3
 8012254:	f000 ffd0 	bl	80131f8 <vTaskSetTimeOutState>

		do
		{
			/* Wait until the required number of bytes are free in the message
			buffer. */
			taskENTER_CRITICAL();
 8012258:	f002 fa06 	bl	8014668 <vPortEnterCritical>
			{
				xSpace = xStreamBufferSpacesAvailable( pxStreamBuffer );
 801225c:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 801225e:	f7ff ff7b 	bl	8012158 <xStreamBufferSpacesAvailable>
 8012262:	6378      	str	r0, [r7, #52]	@ 0x34

				if( xSpace < xRequiredSpace )
 8012264:	6b7a      	ldr	r2, [r7, #52]	@ 0x34
 8012266:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012268:	429a      	cmp	r2, r3
 801226a:	d218      	bcs.n	801229e <xStreamBufferSend+0xde>
				{
					/* Clear notification state as going to wait for space. */
					( void ) xTaskNotifyStateClear( NULL );
 801226c:	2000      	movs	r0, #0
 801226e:	f001 fcf3 	bl	8013c58 <xTaskNotifyStateClear>

					/* Should only be one writer. */
					configASSERT( pxStreamBuffer->xTaskWaitingToSend == NULL );
 8012272:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8012274:	695b      	ldr	r3, [r3, #20]
 8012276:	2b00      	cmp	r3, #0
 8012278:	d00b      	beq.n	8012292 <xStreamBufferSend+0xd2>
	__asm volatile
 801227a:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801227e:	f383 8811 	msr	BASEPRI, r3
 8012282:	f3bf 8f6f 	isb	sy
 8012286:	f3bf 8f4f 	dsb	sy
 801228a:	61bb      	str	r3, [r7, #24]
}
 801228c:	bf00      	nop
 801228e:	bf00      	nop
 8012290:	e7fd      	b.n	801228e <xStreamBufferSend+0xce>
					pxStreamBuffer->xTaskWaitingToSend = xTaskGetCurrentTaskHandle();
 8012292:	f001 f93b 	bl	801350c <xTaskGetCurrentTaskHandle>
 8012296:	4602      	mov	r2, r0
 8012298:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801229a:	615a      	str	r2, [r3, #20]
 801229c:	e002      	b.n	80122a4 <xStreamBufferSend+0xe4>
				}
				else
				{
					taskEXIT_CRITICAL();
 801229e:	f002 fa15 	bl	80146cc <vPortExitCritical>
					break;
 80122a2:	e014      	b.n	80122ce <xStreamBufferSend+0x10e>
				}
			}
			taskEXIT_CRITICAL();
 80122a4:	f002 fa12 	bl	80146cc <vPortExitCritical>

			traceBLOCKING_ON_STREAM_BUFFER_SEND( xStreamBuffer );
			( void ) xTaskNotifyWait( ( uint32_t ) 0, ( uint32_t ) 0, NULL, xTicksToWait );
 80122a8:	683b      	ldr	r3, [r7, #0]
 80122aa:	2200      	movs	r2, #0
 80122ac:	2100      	movs	r1, #0
 80122ae:	2000      	movs	r0, #0
 80122b0:	f001 faca 	bl	8013848 <xTaskNotifyWait>
			pxStreamBuffer->xTaskWaitingToSend = NULL;
 80122b4:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80122b6:	2200      	movs	r2, #0
 80122b8:	615a      	str	r2, [r3, #20]

		} while( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE );
 80122ba:	463a      	mov	r2, r7
 80122bc:	f107 0310 	add.w	r3, r7, #16
 80122c0:	4611      	mov	r1, r2
 80122c2:	4618      	mov	r0, r3
 80122c4:	f000 ffd6 	bl	8013274 <xTaskCheckForTimeOut>
 80122c8:	4603      	mov	r3, r0
 80122ca:	2b00      	cmp	r3, #0
 80122cc:	d0c4      	beq.n	8012258 <xStreamBufferSend+0x98>
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}

	if( xSpace == ( size_t ) 0 )
 80122ce:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 80122d0:	2b00      	cmp	r3, #0
 80122d2:	d103      	bne.n	80122dc <xStreamBufferSend+0x11c>
	{
		xSpace = xStreamBufferSpacesAvailable( pxStreamBuffer );
 80122d4:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 80122d6:	f7ff ff3f 	bl	8012158 <xStreamBufferSpacesAvailable>
 80122da:	6378      	str	r0, [r7, #52]	@ 0x34
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}

	xReturn = prvWriteMessageToBuffer( pxStreamBuffer, pvTxData, xDataLengthBytes, xSpace, xRequiredSpace );
 80122dc:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80122de:	9300      	str	r3, [sp, #0]
 80122e0:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 80122e2:	687a      	ldr	r2, [r7, #4]
 80122e4:	68b9      	ldr	r1, [r7, #8]
 80122e6:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 80122e8:	f000 f823 	bl	8012332 <prvWriteMessageToBuffer>
 80122ec:	62b8      	str	r0, [r7, #40]	@ 0x28

	if( xReturn > ( size_t ) 0 )
 80122ee:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80122f0:	2b00      	cmp	r3, #0
 80122f2:	d019      	beq.n	8012328 <xStreamBufferSend+0x168>
	{
		traceSTREAM_BUFFER_SEND( xStreamBuffer, xReturn );

		/* Was a task waiting for the data? */
		if( prvBytesInBuffer( pxStreamBuffer ) >= pxStreamBuffer->xTriggerLevelBytes )
 80122f4:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 80122f6:	f000 fa15 	bl	8012724 <prvBytesInBuffer>
 80122fa:	4602      	mov	r2, r0
 80122fc:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80122fe:	68db      	ldr	r3, [r3, #12]
 8012300:	429a      	cmp	r2, r3
 8012302:	d311      	bcc.n	8012328 <xStreamBufferSend+0x168>
		{
			sbSEND_COMPLETED( pxStreamBuffer );
 8012304:	f000 fcc6 	bl	8012c94 <vTaskSuspendAll>
 8012308:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801230a:	691b      	ldr	r3, [r3, #16]
 801230c:	2b00      	cmp	r3, #0
 801230e:	d009      	beq.n	8012324 <xStreamBufferSend+0x164>
 8012310:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8012312:	6918      	ldr	r0, [r3, #16]
 8012314:	2300      	movs	r3, #0
 8012316:	2200      	movs	r2, #0
 8012318:	2100      	movs	r1, #0
 801231a:	f001 faf5 	bl	8013908 <xTaskGenericNotify>
 801231e:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8012320:	2200      	movs	r2, #0
 8012322:	611a      	str	r2, [r3, #16]
 8012324:	f000 fcc4 	bl	8012cb0 <xTaskResumeAll>
	{
		mtCOVERAGE_TEST_MARKER();
		traceSTREAM_BUFFER_SEND_FAILED( xStreamBuffer );
	}

	return xReturn;
 8012328:	6abb      	ldr	r3, [r7, #40]	@ 0x28
}
 801232a:	4618      	mov	r0, r3
 801232c:	3738      	adds	r7, #56	@ 0x38
 801232e:	46bd      	mov	sp, r7
 8012330:	bd80      	pop	{r7, pc}

08012332 <prvWriteMessageToBuffer>:
static size_t prvWriteMessageToBuffer( StreamBuffer_t * const pxStreamBuffer,
									   const void * pvTxData,
									   size_t xDataLengthBytes,
									   size_t xSpace,
									   size_t xRequiredSpace )
{
 8012332:	b580      	push	{r7, lr}
 8012334:	b086      	sub	sp, #24
 8012336:	af00      	add	r7, sp, #0
 8012338:	60f8      	str	r0, [r7, #12]
 801233a:	60b9      	str	r1, [r7, #8]
 801233c:	607a      	str	r2, [r7, #4]
 801233e:	603b      	str	r3, [r7, #0]
	BaseType_t xShouldWrite;
	size_t xReturn;

	if( xSpace == ( size_t ) 0 )
 8012340:	683b      	ldr	r3, [r7, #0]
 8012342:	2b00      	cmp	r3, #0
 8012344:	d102      	bne.n	801234c <prvWriteMessageToBuffer+0x1a>
	{
		/* Doesn't matter if this is a stream buffer or a message buffer, there
		is no space to write. */
		xShouldWrite = pdFALSE;
 8012346:	2300      	movs	r3, #0
 8012348:	617b      	str	r3, [r7, #20]
 801234a:	e01d      	b.n	8012388 <prvWriteMessageToBuffer+0x56>
	}
	else if( ( pxStreamBuffer->ucFlags & sbFLAGS_IS_MESSAGE_BUFFER ) == ( uint8_t ) 0 )
 801234c:	68fb      	ldr	r3, [r7, #12]
 801234e:	7f1b      	ldrb	r3, [r3, #28]
 8012350:	f003 0301 	and.w	r3, r3, #1
 8012354:	2b00      	cmp	r3, #0
 8012356:	d108      	bne.n	801236a <prvWriteMessageToBuffer+0x38>
	{
		/* This is a stream buffer, as opposed to a message buffer, so writing a
		stream of bytes rather than discrete messages.  Write as many bytes as
		possible. */
		xShouldWrite = pdTRUE;
 8012358:	2301      	movs	r3, #1
 801235a:	617b      	str	r3, [r7, #20]
		xDataLengthBytes = configMIN( xDataLengthBytes, xSpace );
 801235c:	687a      	ldr	r2, [r7, #4]
 801235e:	683b      	ldr	r3, [r7, #0]
 8012360:	4293      	cmp	r3, r2
 8012362:	bf28      	it	cs
 8012364:	4613      	movcs	r3, r2
 8012366:	607b      	str	r3, [r7, #4]
 8012368:	e00e      	b.n	8012388 <prvWriteMessageToBuffer+0x56>
	}
	else if( xSpace >= xRequiredSpace )
 801236a:	683a      	ldr	r2, [r7, #0]
 801236c:	6a3b      	ldr	r3, [r7, #32]
 801236e:	429a      	cmp	r2, r3
 8012370:	d308      	bcc.n	8012384 <prvWriteMessageToBuffer+0x52>
	{
		/* This is a message buffer, as opposed to a stream buffer, and there
		is enough space to write both the message length and the message itself
		into the buffer.  Start by writing the length of the data, the data
		itself will be written later in this function. */
		xShouldWrite = pdTRUE;
 8012372:	2301      	movs	r3, #1
 8012374:	617b      	str	r3, [r7, #20]
		( void ) prvWriteBytesToBuffer( pxStreamBuffer, ( const uint8_t * ) &( xDataLengthBytes ), sbBYTES_TO_STORE_MESSAGE_LENGTH );
 8012376:	1d3b      	adds	r3, r7, #4
 8012378:	2204      	movs	r2, #4
 801237a:	4619      	mov	r1, r3
 801237c:	68f8      	ldr	r0, [r7, #12]
 801237e:	f000 f8df 	bl	8012540 <prvWriteBytesToBuffer>
 8012382:	e001      	b.n	8012388 <prvWriteMessageToBuffer+0x56>
	}
	else
	{
		/* There is space available, but not enough space. */
		xShouldWrite = pdFALSE;
 8012384:	2300      	movs	r3, #0
 8012386:	617b      	str	r3, [r7, #20]
	}

	if( xShouldWrite != pdFALSE )
 8012388:	697b      	ldr	r3, [r7, #20]
 801238a:	2b00      	cmp	r3, #0
 801238c:	d007      	beq.n	801239e <prvWriteMessageToBuffer+0x6c>
	{
		/* Writes the data itself. */
		xReturn = prvWriteBytesToBuffer( pxStreamBuffer, ( const uint8_t * ) pvTxData, xDataLengthBytes ); /*lint !e9079 Storage buffer is implemented as uint8_t for ease of sizing, alighment and access. */
 801238e:	687b      	ldr	r3, [r7, #4]
 8012390:	461a      	mov	r2, r3
 8012392:	68b9      	ldr	r1, [r7, #8]
 8012394:	68f8      	ldr	r0, [r7, #12]
 8012396:	f000 f8d3 	bl	8012540 <prvWriteBytesToBuffer>
 801239a:	6138      	str	r0, [r7, #16]
 801239c:	e001      	b.n	80123a2 <prvWriteMessageToBuffer+0x70>
	}
	else
	{
		xReturn = 0;
 801239e:	2300      	movs	r3, #0
 80123a0:	613b      	str	r3, [r7, #16]
	}

	return xReturn;
 80123a2:	693b      	ldr	r3, [r7, #16]
}
 80123a4:	4618      	mov	r0, r3
 80123a6:	3718      	adds	r7, #24
 80123a8:	46bd      	mov	sp, r7
 80123aa:	bd80      	pop	{r7, pc}

080123ac <xStreamBufferReceive>:

size_t xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer,
							 void *pvRxData,
							 size_t xBufferLengthBytes,
							 TickType_t xTicksToWait )
{
 80123ac:	b580      	push	{r7, lr}
 80123ae:	b08e      	sub	sp, #56	@ 0x38
 80123b0:	af02      	add	r7, sp, #8
 80123b2:	60f8      	str	r0, [r7, #12]
 80123b4:	60b9      	str	r1, [r7, #8]
 80123b6:	607a      	str	r2, [r7, #4]
 80123b8:	603b      	str	r3, [r7, #0]
StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
 80123ba:	68fb      	ldr	r3, [r7, #12]
 80123bc:	623b      	str	r3, [r7, #32]
size_t xReceivedLength = 0, xBytesAvailable, xBytesToStoreMessageLength;
 80123be:	2300      	movs	r3, #0
 80123c0:	62fb      	str	r3, [r7, #44]	@ 0x2c

	configASSERT( pvRxData );
 80123c2:	68bb      	ldr	r3, [r7, #8]
 80123c4:	2b00      	cmp	r3, #0
 80123c6:	d10b      	bne.n	80123e0 <xStreamBufferReceive+0x34>
	__asm volatile
 80123c8:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80123cc:	f383 8811 	msr	BASEPRI, r3
 80123d0:	f3bf 8f6f 	isb	sy
 80123d4:	f3bf 8f4f 	dsb	sy
 80123d8:	61fb      	str	r3, [r7, #28]
}
 80123da:	bf00      	nop
 80123dc:	bf00      	nop
 80123de:	e7fd      	b.n	80123dc <xStreamBufferReceive+0x30>
	configASSERT( pxStreamBuffer );
 80123e0:	6a3b      	ldr	r3, [r7, #32]
 80123e2:	2b00      	cmp	r3, #0
 80123e4:	d10b      	bne.n	80123fe <xStreamBufferReceive+0x52>
	__asm volatile
 80123e6:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80123ea:	f383 8811 	msr	BASEPRI, r3
 80123ee:	f3bf 8f6f 	isb	sy
 80123f2:	f3bf 8f4f 	dsb	sy
 80123f6:	61bb      	str	r3, [r7, #24]
}
 80123f8:	bf00      	nop
 80123fa:	bf00      	nop
 80123fc:	e7fd      	b.n	80123fa <xStreamBufferReceive+0x4e>
	/* This receive function is used by both message buffers, which store
	discrete messages, and stream buffers, which store a continuous stream of
	bytes.  Discrete messages include an additional
	sbBYTES_TO_STORE_MESSAGE_LENGTH bytes that hold the length of the
	message. */
	if( ( pxStreamBuffer->ucFlags & sbFLAGS_IS_MESSAGE_BUFFER ) != ( uint8_t ) 0 )
 80123fe:	6a3b      	ldr	r3, [r7, #32]
 8012400:	7f1b      	ldrb	r3, [r3, #28]
 8012402:	f003 0301 	and.w	r3, r3, #1
 8012406:	2b00      	cmp	r3, #0
 8012408:	d002      	beq.n	8012410 <xStreamBufferReceive+0x64>
	{
		xBytesToStoreMessageLength = sbBYTES_TO_STORE_MESSAGE_LENGTH;
 801240a:	2304      	movs	r3, #4
 801240c:	627b      	str	r3, [r7, #36]	@ 0x24
 801240e:	e001      	b.n	8012414 <xStreamBufferReceive+0x68>
	}
	else
	{
		xBytesToStoreMessageLength = 0;
 8012410:	2300      	movs	r3, #0
 8012412:	627b      	str	r3, [r7, #36]	@ 0x24
	}

	if( xTicksToWait != ( TickType_t ) 0 )
 8012414:	683b      	ldr	r3, [r7, #0]
 8012416:	2b00      	cmp	r3, #0
 8012418:	d035      	beq.n	8012486 <xStreamBufferReceive+0xda>
	{
		/* Checking if there is data and clearing the notification state must be
		performed atomically. */
		taskENTER_CRITICAL();
 801241a:	f002 f925 	bl	8014668 <vPortEnterCritical>
		{
			xBytesAvailable = prvBytesInBuffer( pxStreamBuffer );
 801241e:	6a38      	ldr	r0, [r7, #32]
 8012420:	f000 f980 	bl	8012724 <prvBytesInBuffer>
 8012424:	62b8      	str	r0, [r7, #40]	@ 0x28
			/* If this function was invoked by a message buffer read then
			xBytesToStoreMessageLength holds the number of bytes used to hold
			the length of the next discrete message.  If this function was
			invoked by a stream buffer read then xBytesToStoreMessageLength will
			be 0. */
			if( xBytesAvailable <= xBytesToStoreMessageLength )
 8012426:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 8012428:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801242a:	429a      	cmp	r2, r3
 801242c:	d817      	bhi.n	801245e <xStreamBufferReceive+0xb2>
			{
				/* Clear notification state as going to wait for data. */
				( void ) xTaskNotifyStateClear( NULL );
 801242e:	2000      	movs	r0, #0
 8012430:	f001 fc12 	bl	8013c58 <xTaskNotifyStateClear>

				/* Should only be one reader. */
				configASSERT( pxStreamBuffer->xTaskWaitingToReceive == NULL );
 8012434:	6a3b      	ldr	r3, [r7, #32]
 8012436:	691b      	ldr	r3, [r3, #16]
 8012438:	2b00      	cmp	r3, #0
 801243a:	d00b      	beq.n	8012454 <xStreamBufferReceive+0xa8>
	__asm volatile
 801243c:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012440:	f383 8811 	msr	BASEPRI, r3
 8012444:	f3bf 8f6f 	isb	sy
 8012448:	f3bf 8f4f 	dsb	sy
 801244c:	617b      	str	r3, [r7, #20]
}
 801244e:	bf00      	nop
 8012450:	bf00      	nop
 8012452:	e7fd      	b.n	8012450 <xStreamBufferReceive+0xa4>
				pxStreamBuffer->xTaskWaitingToReceive = xTaskGetCurrentTaskHandle();
 8012454:	f001 f85a 	bl	801350c <xTaskGetCurrentTaskHandle>
 8012458:	4602      	mov	r2, r0
 801245a:	6a3b      	ldr	r3, [r7, #32]
 801245c:	611a      	str	r2, [r3, #16]
			else
			{
				mtCOVERAGE_TEST_MARKER();
			}
		}
		taskEXIT_CRITICAL();
 801245e:	f002 f935 	bl	80146cc <vPortExitCritical>

		if( xBytesAvailable <= xBytesToStoreMessageLength )
 8012462:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 8012464:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8012466:	429a      	cmp	r2, r3
 8012468:	d811      	bhi.n	801248e <xStreamBufferReceive+0xe2>
		{
			/* Wait for data to be available. */
			traceBLOCKING_ON_STREAM_BUFFER_RECEIVE( xStreamBuffer );
			( void ) xTaskNotifyWait( ( uint32_t ) 0, ( uint32_t ) 0, NULL, xTicksToWait );
 801246a:	683b      	ldr	r3, [r7, #0]
 801246c:	2200      	movs	r2, #0
 801246e:	2100      	movs	r1, #0
 8012470:	2000      	movs	r0, #0
 8012472:	f001 f9e9 	bl	8013848 <xTaskNotifyWait>
			pxStreamBuffer->xTaskWaitingToReceive = NULL;
 8012476:	6a3b      	ldr	r3, [r7, #32]
 8012478:	2200      	movs	r2, #0
 801247a:	611a      	str	r2, [r3, #16]

			/* Recheck the data available after blocking. */
			xBytesAvailable = prvBytesInBuffer( pxStreamBuffer );
 801247c:	6a38      	ldr	r0, [r7, #32]
 801247e:	f000 f951 	bl	8012724 <prvBytesInBuffer>
 8012482:	62b8      	str	r0, [r7, #40]	@ 0x28
 8012484:	e003      	b.n	801248e <xStreamBufferReceive+0xe2>
			mtCOVERAGE_TEST_MARKER();
		}
	}
	else
	{
		xBytesAvailable = prvBytesInBuffer( pxStreamBuffer );
 8012486:	6a38      	ldr	r0, [r7, #32]
 8012488:	f000 f94c 	bl	8012724 <prvBytesInBuffer>
 801248c:	62b8      	str	r0, [r7, #40]	@ 0x28
	/* Whether receiving a discrete message (where xBytesToStoreMessageLength
	holds the number of bytes used to store the message length) or a stream of
	bytes (where xBytesToStoreMessageLength is zero), the number of bytes
	available must be greater than xBytesToStoreMessageLength to be able to
	read bytes from the buffer. */
	if( xBytesAvailable > xBytesToStoreMessageLength )
 801248e:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 8012490:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8012492:	429a      	cmp	r2, r3
 8012494:	d91d      	bls.n	80124d2 <xStreamBufferReceive+0x126>
	{
		xReceivedLength = prvReadMessageFromBuffer( pxStreamBuffer, pvRxData, xBufferLengthBytes, xBytesAvailable, xBytesToStoreMessageLength );
 8012496:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8012498:	9300      	str	r3, [sp, #0]
 801249a:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801249c:	687a      	ldr	r2, [r7, #4]
 801249e:	68b9      	ldr	r1, [r7, #8]
 80124a0:	6a38      	ldr	r0, [r7, #32]
 80124a2:	f000 f81b 	bl	80124dc <prvReadMessageFromBuffer>
 80124a6:	62f8      	str	r0, [r7, #44]	@ 0x2c

		/* Was a task waiting for space in the buffer? */
		if( xReceivedLength != ( size_t ) 0 )
 80124a8:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80124aa:	2b00      	cmp	r3, #0
 80124ac:	d011      	beq.n	80124d2 <xStreamBufferReceive+0x126>
		{
			traceSTREAM_BUFFER_RECEIVE( xStreamBuffer, xReceivedLength );
			sbRECEIVE_COMPLETED( pxStreamBuffer );
 80124ae:	f000 fbf1 	bl	8012c94 <vTaskSuspendAll>
 80124b2:	6a3b      	ldr	r3, [r7, #32]
 80124b4:	695b      	ldr	r3, [r3, #20]
 80124b6:	2b00      	cmp	r3, #0
 80124b8:	d009      	beq.n	80124ce <xStreamBufferReceive+0x122>
 80124ba:	6a3b      	ldr	r3, [r7, #32]
 80124bc:	6958      	ldr	r0, [r3, #20]
 80124be:	2300      	movs	r3, #0
 80124c0:	2200      	movs	r2, #0
 80124c2:	2100      	movs	r1, #0
 80124c4:	f001 fa20 	bl	8013908 <xTaskGenericNotify>
 80124c8:	6a3b      	ldr	r3, [r7, #32]
 80124ca:	2200      	movs	r2, #0
 80124cc:	615a      	str	r2, [r3, #20]
 80124ce:	f000 fbef 	bl	8012cb0 <xTaskResumeAll>
	{
		traceSTREAM_BUFFER_RECEIVE_FAILED( xStreamBuffer );
		mtCOVERAGE_TEST_MARKER();
	}

	return xReceivedLength;
 80124d2:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
}
 80124d4:	4618      	mov	r0, r3
 80124d6:	3730      	adds	r7, #48	@ 0x30
 80124d8:	46bd      	mov	sp, r7
 80124da:	bd80      	pop	{r7, pc}

080124dc <prvReadMessageFromBuffer>:
static size_t prvReadMessageFromBuffer( StreamBuffer_t *pxStreamBuffer,
										void *pvRxData,
										size_t xBufferLengthBytes,
										size_t xBytesAvailable,
										size_t xBytesToStoreMessageLength )
{
 80124dc:	b580      	push	{r7, lr}
 80124de:	b088      	sub	sp, #32
 80124e0:	af00      	add	r7, sp, #0
 80124e2:	60f8      	str	r0, [r7, #12]
 80124e4:	60b9      	str	r1, [r7, #8]
 80124e6:	607a      	str	r2, [r7, #4]
 80124e8:	603b      	str	r3, [r7, #0]
size_t xOriginalTail, xReceivedLength, xNextMessageLength;
configMESSAGE_BUFFER_LENGTH_TYPE xTempNextMessageLength;

	if( xBytesToStoreMessageLength != ( size_t ) 0 )
 80124ea:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80124ec:	2b00      	cmp	r3, #0
 80124ee:	d019      	beq.n	8012524 <prvReadMessageFromBuffer+0x48>
	{
		/* A discrete message is being received.  First receive the length
		of the message.  A copy of the tail is stored so the buffer can be
		returned to its prior state if the length of the message is too
		large for the provided buffer. */
		xOriginalTail = pxStreamBuffer->xTail;
 80124f0:	68fb      	ldr	r3, [r7, #12]
 80124f2:	681b      	ldr	r3, [r3, #0]
 80124f4:	61bb      	str	r3, [r7, #24]
		( void ) prvReadBytesFromBuffer( pxStreamBuffer, ( uint8_t * ) &xTempNextMessageLength, xBytesToStoreMessageLength, xBytesAvailable );
 80124f6:	f107 0110 	add.w	r1, r7, #16
 80124fa:	683b      	ldr	r3, [r7, #0]
 80124fc:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 80124fe:	68f8      	ldr	r0, [r7, #12]
 8012500:	f000 f893 	bl	801262a <prvReadBytesFromBuffer>
		xNextMessageLength = ( size_t ) xTempNextMessageLength;
 8012504:	693b      	ldr	r3, [r7, #16]
 8012506:	61fb      	str	r3, [r7, #28]

		/* Reduce the number of bytes available by the number of bytes just
		read out. */
		xBytesAvailable -= xBytesToStoreMessageLength;
 8012508:	683a      	ldr	r2, [r7, #0]
 801250a:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801250c:	1ad3      	subs	r3, r2, r3
 801250e:	603b      	str	r3, [r7, #0]

		/* Check there is enough space in the buffer provided by the
		user. */
		if( xNextMessageLength > xBufferLengthBytes )
 8012510:	69fa      	ldr	r2, [r7, #28]
 8012512:	687b      	ldr	r3, [r7, #4]
 8012514:	429a      	cmp	r2, r3
 8012516:	d907      	bls.n	8012528 <prvReadMessageFromBuffer+0x4c>
		{
			/* The user has provided insufficient space to read the message
			so return the buffer to its previous state (so the length of
			the message is in the buffer again). */
			pxStreamBuffer->xTail = xOriginalTail;
 8012518:	68fb      	ldr	r3, [r7, #12]
 801251a:	69ba      	ldr	r2, [r7, #24]
 801251c:	601a      	str	r2, [r3, #0]
			xNextMessageLength = 0;
 801251e:	2300      	movs	r3, #0
 8012520:	61fb      	str	r3, [r7, #28]
 8012522:	e001      	b.n	8012528 <prvReadMessageFromBuffer+0x4c>
	}
	else
	{
		/* A stream of bytes is being received (as opposed to a discrete
		message), so read as many bytes as possible. */
		xNextMessageLength = xBufferLengthBytes;
 8012524:	687b      	ldr	r3, [r7, #4]
 8012526:	61fb      	str	r3, [r7, #28]
	}

	/* Read the actual data. */
	xReceivedLength = prvReadBytesFromBuffer( pxStreamBuffer, ( uint8_t * ) pvRxData, xNextMessageLength, xBytesAvailable ); /*lint !e9079 Data storage area is implemented as uint8_t array for ease of sizing, indexing and alignment. */
 8012528:	683b      	ldr	r3, [r7, #0]
 801252a:	69fa      	ldr	r2, [r7, #28]
 801252c:	68b9      	ldr	r1, [r7, #8]
 801252e:	68f8      	ldr	r0, [r7, #12]
 8012530:	f000 f87b 	bl	801262a <prvReadBytesFromBuffer>
 8012534:	6178      	str	r0, [r7, #20]

	return xReceivedLength;
 8012536:	697b      	ldr	r3, [r7, #20]
}
 8012538:	4618      	mov	r0, r3
 801253a:	3720      	adds	r7, #32
 801253c:	46bd      	mov	sp, r7
 801253e:	bd80      	pop	{r7, pc}

08012540 <prvWriteBytesToBuffer>:
	return xReturn;
}
/*-----------------------------------------------------------*/

static size_t prvWriteBytesToBuffer( StreamBuffer_t * const pxStreamBuffer, const uint8_t *pucData, size_t xCount )
{
 8012540:	b580      	push	{r7, lr}
 8012542:	b08a      	sub	sp, #40	@ 0x28
 8012544:	af00      	add	r7, sp, #0
 8012546:	60f8      	str	r0, [r7, #12]
 8012548:	60b9      	str	r1, [r7, #8]
 801254a:	607a      	str	r2, [r7, #4]
size_t xNextHead, xFirstLength;

	configASSERT( xCount > ( size_t ) 0 );
 801254c:	687b      	ldr	r3, [r7, #4]
 801254e:	2b00      	cmp	r3, #0
 8012550:	d10b      	bne.n	801256a <prvWriteBytesToBuffer+0x2a>
	__asm volatile
 8012552:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012556:	f383 8811 	msr	BASEPRI, r3
 801255a:	f3bf 8f6f 	isb	sy
 801255e:	f3bf 8f4f 	dsb	sy
 8012562:	61fb      	str	r3, [r7, #28]
}
 8012564:	bf00      	nop
 8012566:	bf00      	nop
 8012568:	e7fd      	b.n	8012566 <prvWriteBytesToBuffer+0x26>

	xNextHead = pxStreamBuffer->xHead;
 801256a:	68fb      	ldr	r3, [r7, #12]
 801256c:	685b      	ldr	r3, [r3, #4]
 801256e:	627b      	str	r3, [r7, #36]	@ 0x24

	/* Calculate the number of bytes that can be added in the first write -
	which may be less than the total number of bytes that need to be added if
	the buffer will wrap back to the beginning. */
	xFirstLength = configMIN( pxStreamBuffer->xLength - xNextHead, xCount );
 8012570:	68fb      	ldr	r3, [r7, #12]
 8012572:	689a      	ldr	r2, [r3, #8]
 8012574:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8012576:	1ad3      	subs	r3, r2, r3
 8012578:	687a      	ldr	r2, [r7, #4]
 801257a:	4293      	cmp	r3, r2
 801257c:	bf28      	it	cs
 801257e:	4613      	movcs	r3, r2
 8012580:	623b      	str	r3, [r7, #32]

	/* Write as many bytes as can be written in the first write. */
	configASSERT( ( xNextHead + xFirstLength ) <= pxStreamBuffer->xLength );
 8012582:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8012584:	6a3b      	ldr	r3, [r7, #32]
 8012586:	441a      	add	r2, r3
 8012588:	68fb      	ldr	r3, [r7, #12]
 801258a:	689b      	ldr	r3, [r3, #8]
 801258c:	429a      	cmp	r2, r3
 801258e:	d90b      	bls.n	80125a8 <prvWriteBytesToBuffer+0x68>
	__asm volatile
 8012590:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012594:	f383 8811 	msr	BASEPRI, r3
 8012598:	f3bf 8f6f 	isb	sy
 801259c:	f3bf 8f4f 	dsb	sy
 80125a0:	61bb      	str	r3, [r7, #24]
}
 80125a2:	bf00      	nop
 80125a4:	bf00      	nop
 80125a6:	e7fd      	b.n	80125a4 <prvWriteBytesToBuffer+0x64>
	( void ) memcpy( ( void* ) ( &( pxStreamBuffer->pucBuffer[ xNextHead ] ) ), ( const void * ) pucData, xFirstLength ); /*lint !e9087 memcpy() requires void *. */
 80125a8:	68fb      	ldr	r3, [r7, #12]
 80125aa:	699a      	ldr	r2, [r3, #24]
 80125ac:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80125ae:	4413      	add	r3, r2
 80125b0:	6a3a      	ldr	r2, [r7, #32]
 80125b2:	68b9      	ldr	r1, [r7, #8]
 80125b4:	4618      	mov	r0, r3
 80125b6:	f017 fa32 	bl	8029a1e <memcpy>

	/* If the number of bytes written was less than the number that could be
	written in the first write... */
	if( xCount > xFirstLength )
 80125ba:	687a      	ldr	r2, [r7, #4]
 80125bc:	6a3b      	ldr	r3, [r7, #32]
 80125be:	429a      	cmp	r2, r3
 80125c0:	d91d      	bls.n	80125fe <prvWriteBytesToBuffer+0xbe>
	{
		/* ...then write the remaining bytes to the start of the buffer. */
		configASSERT( ( xCount - xFirstLength ) <= pxStreamBuffer->xLength );
 80125c2:	687a      	ldr	r2, [r7, #4]
 80125c4:	6a3b      	ldr	r3, [r7, #32]
 80125c6:	1ad2      	subs	r2, r2, r3
 80125c8:	68fb      	ldr	r3, [r7, #12]
 80125ca:	689b      	ldr	r3, [r3, #8]
 80125cc:	429a      	cmp	r2, r3
 80125ce:	d90b      	bls.n	80125e8 <prvWriteBytesToBuffer+0xa8>
	__asm volatile
 80125d0:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80125d4:	f383 8811 	msr	BASEPRI, r3
 80125d8:	f3bf 8f6f 	isb	sy
 80125dc:	f3bf 8f4f 	dsb	sy
 80125e0:	617b      	str	r3, [r7, #20]
}
 80125e2:	bf00      	nop
 80125e4:	bf00      	nop
 80125e6:	e7fd      	b.n	80125e4 <prvWriteBytesToBuffer+0xa4>
		( void ) memcpy( ( void * ) pxStreamBuffer->pucBuffer, ( const void * ) &( pucData[ xFirstLength ] ), xCount - xFirstLength ); /*lint !e9087 memcpy() requires void *. */
 80125e8:	68fb      	ldr	r3, [r7, #12]
 80125ea:	6998      	ldr	r0, [r3, #24]
 80125ec:	68ba      	ldr	r2, [r7, #8]
 80125ee:	6a3b      	ldr	r3, [r7, #32]
 80125f0:	18d1      	adds	r1, r2, r3
 80125f2:	687a      	ldr	r2, [r7, #4]
 80125f4:	6a3b      	ldr	r3, [r7, #32]
 80125f6:	1ad3      	subs	r3, r2, r3
 80125f8:	461a      	mov	r2, r3
 80125fa:	f017 fa10 	bl	8029a1e <memcpy>
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}

	xNextHead += xCount;
 80125fe:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8012600:	687b      	ldr	r3, [r7, #4]
 8012602:	4413      	add	r3, r2
 8012604:	627b      	str	r3, [r7, #36]	@ 0x24
	if( xNextHead >= pxStreamBuffer->xLength )
 8012606:	68fb      	ldr	r3, [r7, #12]
 8012608:	689b      	ldr	r3, [r3, #8]
 801260a:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 801260c:	429a      	cmp	r2, r3
 801260e:	d304      	bcc.n	801261a <prvWriteBytesToBuffer+0xda>
	{
		xNextHead -= pxStreamBuffer->xLength;
 8012610:	68fb      	ldr	r3, [r7, #12]
 8012612:	689b      	ldr	r3, [r3, #8]
 8012614:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8012616:	1ad3      	subs	r3, r2, r3
 8012618:	627b      	str	r3, [r7, #36]	@ 0x24
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}

	pxStreamBuffer->xHead = xNextHead;
 801261a:	68fb      	ldr	r3, [r7, #12]
 801261c:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 801261e:	605a      	str	r2, [r3, #4]

	return xCount;
 8012620:	687b      	ldr	r3, [r7, #4]
}
 8012622:	4618      	mov	r0, r3
 8012624:	3728      	adds	r7, #40	@ 0x28
 8012626:	46bd      	mov	sp, r7
 8012628:	bd80      	pop	{r7, pc}

0801262a <prvReadBytesFromBuffer>:
/*-----------------------------------------------------------*/

static size_t prvReadBytesFromBuffer( StreamBuffer_t *pxStreamBuffer, uint8_t *pucData, size_t xMaxCount, size_t xBytesAvailable )
{
 801262a:	b580      	push	{r7, lr}
 801262c:	b08a      	sub	sp, #40	@ 0x28
 801262e:	af00      	add	r7, sp, #0
 8012630:	60f8      	str	r0, [r7, #12]
 8012632:	60b9      	str	r1, [r7, #8]
 8012634:	607a      	str	r2, [r7, #4]
 8012636:	603b      	str	r3, [r7, #0]
size_t xCount, xFirstLength, xNextTail;

	/* Use the minimum of the wanted bytes and the available bytes. */
	xCount = configMIN( xBytesAvailable, xMaxCount );
 8012638:	687a      	ldr	r2, [r7, #4]
 801263a:	683b      	ldr	r3, [r7, #0]
 801263c:	4293      	cmp	r3, r2
 801263e:	bf28      	it	cs
 8012640:	4613      	movcs	r3, r2
 8012642:	623b      	str	r3, [r7, #32]

	if( xCount > ( size_t ) 0 )
 8012644:	6a3b      	ldr	r3, [r7, #32]
 8012646:	2b00      	cmp	r3, #0
 8012648:	d067      	beq.n	801271a <prvReadBytesFromBuffer+0xf0>
	{
		xNextTail = pxStreamBuffer->xTail;
 801264a:	68fb      	ldr	r3, [r7, #12]
 801264c:	681b      	ldr	r3, [r3, #0]
 801264e:	627b      	str	r3, [r7, #36]	@ 0x24

		/* Calculate the number of bytes that can be read - which may be
		less than the number wanted if the data wraps around to the start of
		the buffer. */
		xFirstLength = configMIN( pxStreamBuffer->xLength - xNextTail, xCount );
 8012650:	68fb      	ldr	r3, [r7, #12]
 8012652:	689a      	ldr	r2, [r3, #8]
 8012654:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8012656:	1ad3      	subs	r3, r2, r3
 8012658:	6a3a      	ldr	r2, [r7, #32]
 801265a:	4293      	cmp	r3, r2
 801265c:	bf28      	it	cs
 801265e:	4613      	movcs	r3, r2
 8012660:	61fb      	str	r3, [r7, #28]

		/* Obtain the number of bytes it is possible to obtain in the first
		read.  Asserts check bounds of read and write. */
		configASSERT( xFirstLength <= xMaxCount );
 8012662:	69fa      	ldr	r2, [r7, #28]
 8012664:	687b      	ldr	r3, [r7, #4]
 8012666:	429a      	cmp	r2, r3
 8012668:	d90b      	bls.n	8012682 <prvReadBytesFromBuffer+0x58>
	__asm volatile
 801266a:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801266e:	f383 8811 	msr	BASEPRI, r3
 8012672:	f3bf 8f6f 	isb	sy
 8012676:	f3bf 8f4f 	dsb	sy
 801267a:	61bb      	str	r3, [r7, #24]
}
 801267c:	bf00      	nop
 801267e:	bf00      	nop
 8012680:	e7fd      	b.n	801267e <prvReadBytesFromBuffer+0x54>
		configASSERT( ( xNextTail + xFirstLength ) <= pxStreamBuffer->xLength );
 8012682:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8012684:	69fb      	ldr	r3, [r7, #28]
 8012686:	441a      	add	r2, r3
 8012688:	68fb      	ldr	r3, [r7, #12]
 801268a:	689b      	ldr	r3, [r3, #8]
 801268c:	429a      	cmp	r2, r3
 801268e:	d90b      	bls.n	80126a8 <prvReadBytesFromBuffer+0x7e>
	__asm volatile
 8012690:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012694:	f383 8811 	msr	BASEPRI, r3
 8012698:	f3bf 8f6f 	isb	sy
 801269c:	f3bf 8f4f 	dsb	sy
 80126a0:	617b      	str	r3, [r7, #20]
}
 80126a2:	bf00      	nop
 80126a4:	bf00      	nop
 80126a6:	e7fd      	b.n	80126a4 <prvReadBytesFromBuffer+0x7a>
		( void ) memcpy( ( void * ) pucData, ( const void * ) &( pxStreamBuffer->pucBuffer[ xNextTail ] ), xFirstLength ); /*lint !e9087 memcpy() requires void *. */
 80126a8:	68fb      	ldr	r3, [r7, #12]
 80126aa:	699a      	ldr	r2, [r3, #24]
 80126ac:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80126ae:	4413      	add	r3, r2
 80126b0:	69fa      	ldr	r2, [r7, #28]
 80126b2:	4619      	mov	r1, r3
 80126b4:	68b8      	ldr	r0, [r7, #8]
 80126b6:	f017 f9b2 	bl	8029a1e <memcpy>

		/* If the total number of wanted bytes is greater than the number
		that could be read in the first read... */
		if( xCount > xFirstLength )
 80126ba:	6a3a      	ldr	r2, [r7, #32]
 80126bc:	69fb      	ldr	r3, [r7, #28]
 80126be:	429a      	cmp	r2, r3
 80126c0:	d91a      	bls.n	80126f8 <prvReadBytesFromBuffer+0xce>
		{
			/*...then read the remaining bytes from the start of the buffer. */
			configASSERT( xCount <= xMaxCount );
 80126c2:	6a3a      	ldr	r2, [r7, #32]
 80126c4:	687b      	ldr	r3, [r7, #4]
 80126c6:	429a      	cmp	r2, r3
 80126c8:	d90b      	bls.n	80126e2 <prvReadBytesFromBuffer+0xb8>
	__asm volatile
 80126ca:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80126ce:	f383 8811 	msr	BASEPRI, r3
 80126d2:	f3bf 8f6f 	isb	sy
 80126d6:	f3bf 8f4f 	dsb	sy
 80126da:	613b      	str	r3, [r7, #16]
}
 80126dc:	bf00      	nop
 80126de:	bf00      	nop
 80126e0:	e7fd      	b.n	80126de <prvReadBytesFromBuffer+0xb4>
			( void ) memcpy( ( void * ) &( pucData[ xFirstLength ] ), ( void * ) ( pxStreamBuffer->pucBuffer ), xCount - xFirstLength ); /*lint !e9087 memcpy() requires void *. */
 80126e2:	68ba      	ldr	r2, [r7, #8]
 80126e4:	69fb      	ldr	r3, [r7, #28]
 80126e6:	18d0      	adds	r0, r2, r3
 80126e8:	68fb      	ldr	r3, [r7, #12]
 80126ea:	6999      	ldr	r1, [r3, #24]
 80126ec:	6a3a      	ldr	r2, [r7, #32]
 80126ee:	69fb      	ldr	r3, [r7, #28]
 80126f0:	1ad3      	subs	r3, r2, r3
 80126f2:	461a      	mov	r2, r3
 80126f4:	f017 f993 	bl	8029a1e <memcpy>
			mtCOVERAGE_TEST_MARKER();
		}

		/* Move the tail pointer to effectively remove the data read from
		the buffer. */
		xNextTail += xCount;
 80126f8:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 80126fa:	6a3b      	ldr	r3, [r7, #32]
 80126fc:	4413      	add	r3, r2
 80126fe:	627b      	str	r3, [r7, #36]	@ 0x24

		if( xNextTail >= pxStreamBuffer->xLength )
 8012700:	68fb      	ldr	r3, [r7, #12]
 8012702:	689b      	ldr	r3, [r3, #8]
 8012704:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8012706:	429a      	cmp	r2, r3
 8012708:	d304      	bcc.n	8012714 <prvReadBytesFromBuffer+0xea>
		{
			xNextTail -= pxStreamBuffer->xLength;
 801270a:	68fb      	ldr	r3, [r7, #12]
 801270c:	689b      	ldr	r3, [r3, #8]
 801270e:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8012710:	1ad3      	subs	r3, r2, r3
 8012712:	627b      	str	r3, [r7, #36]	@ 0x24
		}

		pxStreamBuffer->xTail = xNextTail;
 8012714:	68fb      	ldr	r3, [r7, #12]
 8012716:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8012718:	601a      	str	r2, [r3, #0]
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}

	return xCount;
 801271a:	6a3b      	ldr	r3, [r7, #32]
}
 801271c:	4618      	mov	r0, r3
 801271e:	3728      	adds	r7, #40	@ 0x28
 8012720:	46bd      	mov	sp, r7
 8012722:	bd80      	pop	{r7, pc}

08012724 <prvBytesInBuffer>:
/*-----------------------------------------------------------*/

static size_t prvBytesInBuffer( const StreamBuffer_t * const pxStreamBuffer )
{
 8012724:	b480      	push	{r7}
 8012726:	b085      	sub	sp, #20
 8012728:	af00      	add	r7, sp, #0
 801272a:	6078      	str	r0, [r7, #4]
/* Returns the distance between xTail and xHead. */
size_t xCount;

	xCount = pxStreamBuffer->xLength + pxStreamBuffer->xHead;
 801272c:	687b      	ldr	r3, [r7, #4]
 801272e:	689a      	ldr	r2, [r3, #8]
 8012730:	687b      	ldr	r3, [r7, #4]
 8012732:	685b      	ldr	r3, [r3, #4]
 8012734:	4413      	add	r3, r2
 8012736:	60fb      	str	r3, [r7, #12]
	xCount -= pxStreamBuffer->xTail;
 8012738:	687b      	ldr	r3, [r7, #4]
 801273a:	681b      	ldr	r3, [r3, #0]
 801273c:	68fa      	ldr	r2, [r7, #12]
 801273e:	1ad3      	subs	r3, r2, r3
 8012740:	60fb      	str	r3, [r7, #12]
	if ( xCount >= pxStreamBuffer->xLength )
 8012742:	687b      	ldr	r3, [r7, #4]
 8012744:	689b      	ldr	r3, [r3, #8]
 8012746:	68fa      	ldr	r2, [r7, #12]
 8012748:	429a      	cmp	r2, r3
 801274a:	d304      	bcc.n	8012756 <prvBytesInBuffer+0x32>
	{
		xCount -= pxStreamBuffer->xLength;
 801274c:	687b      	ldr	r3, [r7, #4]
 801274e:	689b      	ldr	r3, [r3, #8]
 8012750:	68fa      	ldr	r2, [r7, #12]
 8012752:	1ad3      	subs	r3, r2, r3
 8012754:	60fb      	str	r3, [r7, #12]
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}

	return xCount;
 8012756:	68fb      	ldr	r3, [r7, #12]
}
 8012758:	4618      	mov	r0, r3
 801275a:	3714      	adds	r7, #20
 801275c:	46bd      	mov	sp, r7
 801275e:	f85d 7b04 	ldr.w	r7, [sp], #4
 8012762:	4770      	bx	lr

08012764 <prvInitialiseNewStreamBuffer>:
static void prvInitialiseNewStreamBuffer( StreamBuffer_t * const pxStreamBuffer,
										  uint8_t * const pucBuffer,
										  size_t xBufferSizeBytes,
										  size_t xTriggerLevelBytes,
										  uint8_t ucFlags )
{
 8012764:	b580      	push	{r7, lr}
 8012766:	b086      	sub	sp, #24
 8012768:	af00      	add	r7, sp, #0
 801276a:	60f8      	str	r0, [r7, #12]
 801276c:	60b9      	str	r1, [r7, #8]
 801276e:	607a      	str	r2, [r7, #4]
 8012770:	603b      	str	r3, [r7, #0]
	#if( configASSERT_DEFINED == 1 )
	{
		/* The value written just has to be identifiable when looking at the
		memory.  Don't use 0xA5 as that is the stack fill value and could
		result in confusion as to what is actually being observed. */
		const BaseType_t xWriteValue = 0x55;
 8012772:	2355      	movs	r3, #85	@ 0x55
 8012774:	617b      	str	r3, [r7, #20]
		configASSERT( memset( pucBuffer, ( int ) xWriteValue, xBufferSizeBytes ) == pucBuffer );
 8012776:	687a      	ldr	r2, [r7, #4]
 8012778:	6979      	ldr	r1, [r7, #20]
 801277a:	68b8      	ldr	r0, [r7, #8]
 801277c:	f017 f858 	bl	8029830 <memset>
 8012780:	4602      	mov	r2, r0
 8012782:	68bb      	ldr	r3, [r7, #8]
 8012784:	4293      	cmp	r3, r2
 8012786:	d00b      	beq.n	80127a0 <prvInitialiseNewStreamBuffer+0x3c>
	__asm volatile
 8012788:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801278c:	f383 8811 	msr	BASEPRI, r3
 8012790:	f3bf 8f6f 	isb	sy
 8012794:	f3bf 8f4f 	dsb	sy
 8012798:	613b      	str	r3, [r7, #16]
}
 801279a:	bf00      	nop
 801279c:	bf00      	nop
 801279e:	e7fd      	b.n	801279c <prvInitialiseNewStreamBuffer+0x38>
	} /*lint !e529 !e438 xWriteValue is only used if configASSERT() is defined. */
	#endif

	( void ) memset( ( void * ) pxStreamBuffer, 0x00, sizeof( StreamBuffer_t ) ); /*lint !e9087 memset() requires void *. */
 80127a0:	2224      	movs	r2, #36	@ 0x24
 80127a2:	2100      	movs	r1, #0
 80127a4:	68f8      	ldr	r0, [r7, #12]
 80127a6:	f017 f843 	bl	8029830 <memset>
	pxStreamBuffer->pucBuffer = pucBuffer;
 80127aa:	68fb      	ldr	r3, [r7, #12]
 80127ac:	68ba      	ldr	r2, [r7, #8]
 80127ae:	619a      	str	r2, [r3, #24]
	pxStreamBuffer->xLength = xBufferSizeBytes;
 80127b0:	68fb      	ldr	r3, [r7, #12]
 80127b2:	687a      	ldr	r2, [r7, #4]
 80127b4:	609a      	str	r2, [r3, #8]
	pxStreamBuffer->xTriggerLevelBytes = xTriggerLevelBytes;
 80127b6:	68fb      	ldr	r3, [r7, #12]
 80127b8:	683a      	ldr	r2, [r7, #0]
 80127ba:	60da      	str	r2, [r3, #12]
	pxStreamBuffer->ucFlags = ucFlags;
 80127bc:	68fb      	ldr	r3, [r7, #12]
 80127be:	f897 2020 	ldrb.w	r2, [r7, #32]
 80127c2:	771a      	strb	r2, [r3, #28]
}
 80127c4:	bf00      	nop
 80127c6:	3718      	adds	r7, #24
 80127c8:	46bd      	mov	sp, r7
 80127ca:	bd80      	pop	{r7, pc}

080127cc <xTaskCreateStatic>:
									const uint32_t ulStackDepth,
									void * const pvParameters,
									UBaseType_t uxPriority,
									StackType_t * const puxStackBuffer,
									StaticTask_t * const pxTaskBuffer )
	{
 80127cc:	b580      	push	{r7, lr}
 80127ce:	b08e      	sub	sp, #56	@ 0x38
 80127d0:	af04      	add	r7, sp, #16
 80127d2:	60f8      	str	r0, [r7, #12]
 80127d4:	60b9      	str	r1, [r7, #8]
 80127d6:	607a      	str	r2, [r7, #4]
 80127d8:	603b      	str	r3, [r7, #0]
	TCB_t *pxNewTCB;
	TaskHandle_t xReturn;

		configASSERT( puxStackBuffer != NULL );
 80127da:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 80127dc:	2b00      	cmp	r3, #0
 80127de:	d10b      	bne.n	80127f8 <xTaskCreateStatic+0x2c>
	__asm volatile
 80127e0:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80127e4:	f383 8811 	msr	BASEPRI, r3
 80127e8:	f3bf 8f6f 	isb	sy
 80127ec:	f3bf 8f4f 	dsb	sy
 80127f0:	623b      	str	r3, [r7, #32]
}
 80127f2:	bf00      	nop
 80127f4:	bf00      	nop
 80127f6:	e7fd      	b.n	80127f4 <xTaskCreateStatic+0x28>
		configASSERT( pxTaskBuffer != NULL );
 80127f8:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 80127fa:	2b00      	cmp	r3, #0
 80127fc:	d10b      	bne.n	8012816 <xTaskCreateStatic+0x4a>
	__asm volatile
 80127fe:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012802:	f383 8811 	msr	BASEPRI, r3
 8012806:	f3bf 8f6f 	isb	sy
 801280a:	f3bf 8f4f 	dsb	sy
 801280e:	61fb      	str	r3, [r7, #28]
}
 8012810:	bf00      	nop
 8012812:	bf00      	nop
 8012814:	e7fd      	b.n	8012812 <xTaskCreateStatic+0x46>
		#if( configASSERT_DEFINED == 1 )
		{
			/* Sanity check that the size of the structure used to declare a
			variable of type StaticTask_t equals the size of the real task
			structure. */
			volatile size_t xSize = sizeof( StaticTask_t );
 8012816:	23a8      	movs	r3, #168	@ 0xa8
 8012818:	613b      	str	r3, [r7, #16]
			configASSERT( xSize == sizeof( TCB_t ) );
 801281a:	693b      	ldr	r3, [r7, #16]
 801281c:	2ba8      	cmp	r3, #168	@ 0xa8
 801281e:	d00b      	beq.n	8012838 <xTaskCreateStatic+0x6c>
	__asm volatile
 8012820:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012824:	f383 8811 	msr	BASEPRI, r3
 8012828:	f3bf 8f6f 	isb	sy
 801282c:	f3bf 8f4f 	dsb	sy
 8012830:	61bb      	str	r3, [r7, #24]
}
 8012832:	bf00      	nop
 8012834:	bf00      	nop
 8012836:	e7fd      	b.n	8012834 <xTaskCreateStatic+0x68>
			( void ) xSize; /* Prevent lint warning when configASSERT() is not used. */
 8012838:	693b      	ldr	r3, [r7, #16]
		}
		#endif /* configASSERT_DEFINED */


		if( ( pxTaskBuffer != NULL ) && ( puxStackBuffer != NULL ) )
 801283a:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801283c:	2b00      	cmp	r3, #0
 801283e:	d01e      	beq.n	801287e <xTaskCreateStatic+0xb2>
 8012840:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8012842:	2b00      	cmp	r3, #0
 8012844:	d01b      	beq.n	801287e <xTaskCreateStatic+0xb2>
		{
			/* The memory used for the task's TCB and stack are passed into this
			function - use them. */
			pxNewTCB = ( TCB_t * ) pxTaskBuffer; /*lint !e740 !e9087 Unusual cast is ok as the structures are designed to have the same alignment, and the size is checked by an assert. */
 8012846:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8012848:	627b      	str	r3, [r7, #36]	@ 0x24
			pxNewTCB->pxStack = ( StackType_t * ) puxStackBuffer;
 801284a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801284c:	6b7a      	ldr	r2, [r7, #52]	@ 0x34
 801284e:	631a      	str	r2, [r3, #48]	@ 0x30

			#if( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 ) /*lint !e731 !e9029 Macro has been consolidated for readability reasons. */
			{
				/* Tasks can be created statically or dynamically, so note this
				task was created statically in case the task is later deleted. */
				pxNewTCB->ucStaticallyAllocated = tskSTATICALLY_ALLOCATED_STACK_AND_TCB;
 8012850:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8012852:	2202      	movs	r2, #2
 8012854:	f883 20a5 	strb.w	r2, [r3, #165]	@ 0xa5
			}
			#endif /* tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE */

			prvInitialiseNewTask( pxTaskCode, pcName, ulStackDepth, pvParameters, uxPriority, &xReturn, pxNewTCB, NULL );
 8012858:	2300      	movs	r3, #0
 801285a:	9303      	str	r3, [sp, #12]
 801285c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801285e:	9302      	str	r3, [sp, #8]
 8012860:	f107 0314 	add.w	r3, r7, #20
 8012864:	9301      	str	r3, [sp, #4]
 8012866:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012868:	9300      	str	r3, [sp, #0]
 801286a:	683b      	ldr	r3, [r7, #0]
 801286c:	687a      	ldr	r2, [r7, #4]
 801286e:	68b9      	ldr	r1, [r7, #8]
 8012870:	68f8      	ldr	r0, [r7, #12]
 8012872:	f000 f851 	bl	8012918 <prvInitialiseNewTask>
			prvAddNewTaskToReadyList( pxNewTCB );
 8012876:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 8012878:	f000 f8f6 	bl	8012a68 <prvAddNewTaskToReadyList>
 801287c:	e001      	b.n	8012882 <xTaskCreateStatic+0xb6>
		}
		else
		{
			xReturn = NULL;
 801287e:	2300      	movs	r3, #0
 8012880:	617b      	str	r3, [r7, #20]
		}

		return xReturn;
 8012882:	697b      	ldr	r3, [r7, #20]
	}
 8012884:	4618      	mov	r0, r3
 8012886:	3728      	adds	r7, #40	@ 0x28
 8012888:	46bd      	mov	sp, r7
 801288a:	bd80      	pop	{r7, pc}

0801288c <xTaskCreate>:
							const char * const pcName,		/*lint !e971 Unqualified char types are allowed for strings and single characters only. */
							const configSTACK_DEPTH_TYPE usStackDepth,
							void * const pvParameters,
							UBaseType_t uxPriority,
							TaskHandle_t * const pxCreatedTask )
	{
 801288c:	b580      	push	{r7, lr}
 801288e:	b08c      	sub	sp, #48	@ 0x30
 8012890:	af04      	add	r7, sp, #16
 8012892:	60f8      	str	r0, [r7, #12]
 8012894:	60b9      	str	r1, [r7, #8]
 8012896:	603b      	str	r3, [r7, #0]
 8012898:	4613      	mov	r3, r2
 801289a:	80fb      	strh	r3, [r7, #6]
		#else /* portSTACK_GROWTH */
		{
		StackType_t *pxStack;

			/* Allocate space for the stack used by the task being created. */
			pxStack = pvPortMalloc( ( ( ( size_t ) usStackDepth ) * sizeof( StackType_t ) ) ); /*lint !e9079 All values returned by pvPortMalloc() have at least the alignment required by the MCU's stack and this allocation is the stack. */
 801289c:	88fb      	ldrh	r3, [r7, #6]
 801289e:	009b      	lsls	r3, r3, #2
 80128a0:	4618      	mov	r0, r3
 80128a2:	f002 f803 	bl	80148ac <pvPortMalloc>
 80128a6:	6178      	str	r0, [r7, #20]

			if( pxStack != NULL )
 80128a8:	697b      	ldr	r3, [r7, #20]
 80128aa:	2b00      	cmp	r3, #0
 80128ac:	d00e      	beq.n	80128cc <xTaskCreate+0x40>
			{
				/* Allocate space for the TCB. */
				pxNewTCB = ( TCB_t * ) pvPortMalloc( sizeof( TCB_t ) ); /*lint !e9087 !e9079 All values returned by pvPortMalloc() have at least the alignment required by the MCU's stack, and the first member of TCB_t is always a pointer to the task's stack. */
 80128ae:	20a8      	movs	r0, #168	@ 0xa8
 80128b0:	f001 fffc 	bl	80148ac <pvPortMalloc>
 80128b4:	61f8      	str	r0, [r7, #28]

				if( pxNewTCB != NULL )
 80128b6:	69fb      	ldr	r3, [r7, #28]
 80128b8:	2b00      	cmp	r3, #0
 80128ba:	d003      	beq.n	80128c4 <xTaskCreate+0x38>
				{
					/* Store the stack location in the TCB. */
					pxNewTCB->pxStack = pxStack;
 80128bc:	69fb      	ldr	r3, [r7, #28]
 80128be:	697a      	ldr	r2, [r7, #20]
 80128c0:	631a      	str	r2, [r3, #48]	@ 0x30
 80128c2:	e005      	b.n	80128d0 <xTaskCreate+0x44>
				}
				else
				{
					/* The stack cannot be used as the TCB was not created.  Free
					it again. */
					vPortFree( pxStack );
 80128c4:	6978      	ldr	r0, [r7, #20]
 80128c6:	f002 f8bf 	bl	8014a48 <vPortFree>
 80128ca:	e001      	b.n	80128d0 <xTaskCreate+0x44>
				}
			}
			else
			{
				pxNewTCB = NULL;
 80128cc:	2300      	movs	r3, #0
 80128ce:	61fb      	str	r3, [r7, #28]
			}
		}
		#endif /* portSTACK_GROWTH */

		if( pxNewTCB != NULL )
 80128d0:	69fb      	ldr	r3, [r7, #28]
 80128d2:	2b00      	cmp	r3, #0
 80128d4:	d017      	beq.n	8012906 <xTaskCreate+0x7a>
		{
			#if( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 ) /*lint !e9029 !e731 Macro has been consolidated for readability reasons. */
			{
				/* Tasks can be created statically or dynamically, so note this
				task was created dynamically in case it is later deleted. */
				pxNewTCB->ucStaticallyAllocated = tskDYNAMICALLY_ALLOCATED_STACK_AND_TCB;
 80128d6:	69fb      	ldr	r3, [r7, #28]
 80128d8:	2200      	movs	r2, #0
 80128da:	f883 20a5 	strb.w	r2, [r3, #165]	@ 0xa5
			}
			#endif /* tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE */

			prvInitialiseNewTask( pxTaskCode, pcName, ( uint32_t ) usStackDepth, pvParameters, uxPriority, pxCreatedTask, pxNewTCB, NULL );
 80128de:	88fa      	ldrh	r2, [r7, #6]
 80128e0:	2300      	movs	r3, #0
 80128e2:	9303      	str	r3, [sp, #12]
 80128e4:	69fb      	ldr	r3, [r7, #28]
 80128e6:	9302      	str	r3, [sp, #8]
 80128e8:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80128ea:	9301      	str	r3, [sp, #4]
 80128ec:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80128ee:	9300      	str	r3, [sp, #0]
 80128f0:	683b      	ldr	r3, [r7, #0]
 80128f2:	68b9      	ldr	r1, [r7, #8]
 80128f4:	68f8      	ldr	r0, [r7, #12]
 80128f6:	f000 f80f 	bl	8012918 <prvInitialiseNewTask>
			prvAddNewTaskToReadyList( pxNewTCB );
 80128fa:	69f8      	ldr	r0, [r7, #28]
 80128fc:	f000 f8b4 	bl	8012a68 <prvAddNewTaskToReadyList>
			xReturn = pdPASS;
 8012900:	2301      	movs	r3, #1
 8012902:	61bb      	str	r3, [r7, #24]
 8012904:	e002      	b.n	801290c <xTaskCreate+0x80>
		}
		else
		{
			xReturn = errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY;
 8012906:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 801290a:	61bb      	str	r3, [r7, #24]
		}

		return xReturn;
 801290c:	69bb      	ldr	r3, [r7, #24]
	}
 801290e:	4618      	mov	r0, r3
 8012910:	3720      	adds	r7, #32
 8012912:	46bd      	mov	sp, r7
 8012914:	bd80      	pop	{r7, pc}
	...

08012918 <prvInitialiseNewTask>:
									void * const pvParameters,
									UBaseType_t uxPriority,
									TaskHandle_t * const pxCreatedTask,
									TCB_t *pxNewTCB,
									const MemoryRegion_t * const xRegions )
{
 8012918:	b580      	push	{r7, lr}
 801291a:	b088      	sub	sp, #32
 801291c:	af00      	add	r7, sp, #0
 801291e:	60f8      	str	r0, [r7, #12]
 8012920:	60b9      	str	r1, [r7, #8]
 8012922:	607a      	str	r2, [r7, #4]
 8012924:	603b      	str	r3, [r7, #0]

	/* Avoid dependency on memset() if it is not required. */
	#if( tskSET_NEW_STACKS_TO_KNOWN_VALUE == 1 )
	{
		/* Fill the stack with a known value to assist debugging. */
		( void ) memset( pxNewTCB->pxStack, ( int ) tskSTACK_FILL_BYTE, ( size_t ) ulStackDepth * sizeof( StackType_t ) );
 8012926:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012928:	6b18      	ldr	r0, [r3, #48]	@ 0x30
 801292a:	687b      	ldr	r3, [r7, #4]
 801292c:	009b      	lsls	r3, r3, #2
 801292e:	461a      	mov	r2, r3
 8012930:	21a5      	movs	r1, #165	@ 0xa5
 8012932:	f016 ff7d 	bl	8029830 <memset>
	grows from high memory to low (as per the 80x86) or vice versa.
	portSTACK_GROWTH is used to make the result positive or negative as required
	by the port. */
	#if( portSTACK_GROWTH < 0 )
	{
		pxTopOfStack = &( pxNewTCB->pxStack[ ulStackDepth - ( uint32_t ) 1 ] );
 8012936:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012938:	6b1a      	ldr	r2, [r3, #48]	@ 0x30
 801293a:	6879      	ldr	r1, [r7, #4]
 801293c:	f06f 4340 	mvn.w	r3, #3221225472	@ 0xc0000000
 8012940:	440b      	add	r3, r1
 8012942:	009b      	lsls	r3, r3, #2
 8012944:	4413      	add	r3, r2
 8012946:	61bb      	str	r3, [r7, #24]
		pxTopOfStack = ( StackType_t * ) ( ( ( portPOINTER_SIZE_TYPE ) pxTopOfStack ) & ( ~( ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) ) ); /*lint !e923 !e9033 !e9078 MISRA exception.  Avoiding casts between pointers and integers is not practical.  Size differences accounted for using portPOINTER_SIZE_TYPE type.  Checked by assert(). */
 8012948:	69bb      	ldr	r3, [r7, #24]
 801294a:	f023 0307 	bic.w	r3, r3, #7
 801294e:	61bb      	str	r3, [r7, #24]

		/* Check the alignment of the calculated top of stack is correct. */
		configASSERT( ( ( ( portPOINTER_SIZE_TYPE ) pxTopOfStack & ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) == 0UL ) );
 8012950:	69bb      	ldr	r3, [r7, #24]
 8012952:	f003 0307 	and.w	r3, r3, #7
 8012956:	2b00      	cmp	r3, #0
 8012958:	d00b      	beq.n	8012972 <prvInitialiseNewTask+0x5a>
	__asm volatile
 801295a:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801295e:	f383 8811 	msr	BASEPRI, r3
 8012962:	f3bf 8f6f 	isb	sy
 8012966:	f3bf 8f4f 	dsb	sy
 801296a:	617b      	str	r3, [r7, #20]
}
 801296c:	bf00      	nop
 801296e:	bf00      	nop
 8012970:	e7fd      	b.n	801296e <prvInitialiseNewTask+0x56>
		pxNewTCB->pxEndOfStack = pxNewTCB->pxStack + ( ulStackDepth - ( uint32_t ) 1 );
	}
	#endif /* portSTACK_GROWTH */

	/* Store the task name in the TCB. */
	if( pcName != NULL )
 8012972:	68bb      	ldr	r3, [r7, #8]
 8012974:	2b00      	cmp	r3, #0
 8012976:	d01f      	beq.n	80129b8 <prvInitialiseNewTask+0xa0>
	{
		for( x = ( UBaseType_t ) 0; x < ( UBaseType_t ) configMAX_TASK_NAME_LEN; x++ )
 8012978:	2300      	movs	r3, #0
 801297a:	61fb      	str	r3, [r7, #28]
 801297c:	e012      	b.n	80129a4 <prvInitialiseNewTask+0x8c>
		{
			pxNewTCB->pcTaskName[ x ] = pcName[ x ];
 801297e:	68ba      	ldr	r2, [r7, #8]
 8012980:	69fb      	ldr	r3, [r7, #28]
 8012982:	4413      	add	r3, r2
 8012984:	7819      	ldrb	r1, [r3, #0]
 8012986:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 8012988:	69fb      	ldr	r3, [r7, #28]
 801298a:	4413      	add	r3, r2
 801298c:	3334      	adds	r3, #52	@ 0x34
 801298e:	460a      	mov	r2, r1
 8012990:	701a      	strb	r2, [r3, #0]

			/* Don't copy all configMAX_TASK_NAME_LEN if the string is shorter than
			configMAX_TASK_NAME_LEN characters just in case the memory after the
			string is not accessible (extremely unlikely). */
			if( pcName[ x ] == ( char ) 0x00 )
 8012992:	68ba      	ldr	r2, [r7, #8]
 8012994:	69fb      	ldr	r3, [r7, #28]
 8012996:	4413      	add	r3, r2
 8012998:	781b      	ldrb	r3, [r3, #0]
 801299a:	2b00      	cmp	r3, #0
 801299c:	d006      	beq.n	80129ac <prvInitialiseNewTask+0x94>
		for( x = ( UBaseType_t ) 0; x < ( UBaseType_t ) configMAX_TASK_NAME_LEN; x++ )
 801299e:	69fb      	ldr	r3, [r7, #28]
 80129a0:	3301      	adds	r3, #1
 80129a2:	61fb      	str	r3, [r7, #28]
 80129a4:	69fb      	ldr	r3, [r7, #28]
 80129a6:	2b0f      	cmp	r3, #15
 80129a8:	d9e9      	bls.n	801297e <prvInitialiseNewTask+0x66>
 80129aa:	e000      	b.n	80129ae <prvInitialiseNewTask+0x96>
			{
				break;
 80129ac:	bf00      	nop
			}
		}

		/* Ensure the name string is terminated in the case that the string length
		was greater or equal to configMAX_TASK_NAME_LEN. */
		pxNewTCB->pcTaskName[ configMAX_TASK_NAME_LEN - 1 ] = '\0';
 80129ae:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80129b0:	2200      	movs	r2, #0
 80129b2:	f883 2043 	strb.w	r2, [r3, #67]	@ 0x43
 80129b6:	e003      	b.n	80129c0 <prvInitialiseNewTask+0xa8>
	}
	else
	{
		/* The task has not been given a name, so just ensure there is a NULL
		terminator when it is read out. */
		pxNewTCB->pcTaskName[ 0 ] = 0x00;
 80129b8:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80129ba:	2200      	movs	r2, #0
 80129bc:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34
	}

	/* This is used as an array index so must ensure it's not too large.  First
	remove the privilege bit if one is present. */
	if( uxPriority >= ( UBaseType_t ) configMAX_PRIORITIES )
 80129c0:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80129c2:	2b37      	cmp	r3, #55	@ 0x37
 80129c4:	d901      	bls.n	80129ca <prvInitialiseNewTask+0xb2>
	{
		uxPriority = ( UBaseType_t ) configMAX_PRIORITIES - ( UBaseType_t ) 1U;
 80129c6:	2337      	movs	r3, #55	@ 0x37
 80129c8:	62bb      	str	r3, [r7, #40]	@ 0x28
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}

	pxNewTCB->uxPriority = uxPriority;
 80129ca:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80129cc:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 80129ce:	62da      	str	r2, [r3, #44]	@ 0x2c
	#if ( configUSE_MUTEXES == 1 )
	{
		pxNewTCB->uxBasePriority = uxPriority;
 80129d0:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80129d2:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 80129d4:	64da      	str	r2, [r3, #76]	@ 0x4c
		pxNewTCB->uxMutexesHeld = 0;
 80129d6:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80129d8:	2200      	movs	r2, #0
 80129da:	651a      	str	r2, [r3, #80]	@ 0x50
	}
	#endif /* configUSE_MUTEXES */

	vListInitialiseItem( &( pxNewTCB->xStateListItem ) );
 80129dc:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80129de:	3304      	adds	r3, #4
 80129e0:	4618      	mov	r0, r3
 80129e2:	f7fe f9a5 	bl	8010d30 <vListInitialiseItem>
	vListInitialiseItem( &( pxNewTCB->xEventListItem ) );
 80129e6:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80129e8:	3318      	adds	r3, #24
 80129ea:	4618      	mov	r0, r3
 80129ec:	f7fe f9a0 	bl	8010d30 <vListInitialiseItem>

	/* Set the pxNewTCB as a link back from the ListItem_t.  This is so we can get
	back to	the containing TCB from a generic item in a list. */
	listSET_LIST_ITEM_OWNER( &( pxNewTCB->xStateListItem ), pxNewTCB );
 80129f0:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80129f2:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 80129f4:	611a      	str	r2, [r3, #16]

	/* Event lists are always in priority order. */
	listSET_LIST_ITEM_VALUE( &( pxNewTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
 80129f6:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80129f8:	f1c3 0238 	rsb	r2, r3, #56	@ 0x38
 80129fc:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80129fe:	619a      	str	r2, [r3, #24]
	listSET_LIST_ITEM_OWNER( &( pxNewTCB->xEventListItem ), pxNewTCB );
 8012a00:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012a02:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 8012a04:	625a      	str	r2, [r3, #36]	@ 0x24
	}
	#endif

	#if ( configUSE_TASK_NOTIFICATIONS == 1 )
	{
		pxNewTCB->ulNotifiedValue = 0;
 8012a06:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012a08:	2200      	movs	r2, #0
 8012a0a:	f8c3 20a0 	str.w	r2, [r3, #160]	@ 0xa0
		pxNewTCB->ucNotifyState = taskNOT_WAITING_NOTIFICATION;
 8012a0e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012a10:	2200      	movs	r2, #0
 8012a12:	f883 20a4 	strb.w	r2, [r3, #164]	@ 0xa4
	#if ( configUSE_NEWLIB_REENTRANT == 1 )
	{
		/* Initialise this task's Newlib reent structure.
		See the third party link http://www.nadler.com/embedded/newlibAndFreeRTOS.html
		for additional information. */
		_REENT_INIT_PTR( ( &( pxNewTCB->xNewLib_reent ) ) );
 8012a16:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012a18:	3354      	adds	r3, #84	@ 0x54
 8012a1a:	224c      	movs	r2, #76	@ 0x4c
 8012a1c:	2100      	movs	r1, #0
 8012a1e:	4618      	mov	r0, r3
 8012a20:	f016 ff06 	bl	8029830 <memset>
 8012a24:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012a26:	4a0d      	ldr	r2, [pc, #52]	@ (8012a5c <prvInitialiseNewTask+0x144>)
 8012a28:	659a      	str	r2, [r3, #88]	@ 0x58
 8012a2a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012a2c:	4a0c      	ldr	r2, [pc, #48]	@ (8012a60 <prvInitialiseNewTask+0x148>)
 8012a2e:	65da      	str	r2, [r3, #92]	@ 0x5c
 8012a30:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012a32:	4a0c      	ldr	r2, [pc, #48]	@ (8012a64 <prvInitialiseNewTask+0x14c>)
 8012a34:	661a      	str	r2, [r3, #96]	@ 0x60
			}
			#endif /* portSTACK_GROWTH */
		}
		#else /* portHAS_STACK_OVERFLOW_CHECKING */
		{
			pxNewTCB->pxTopOfStack = pxPortInitialiseStack( pxTopOfStack, pxTaskCode, pvParameters );
 8012a36:	683a      	ldr	r2, [r7, #0]
 8012a38:	68f9      	ldr	r1, [r7, #12]
 8012a3a:	69b8      	ldr	r0, [r7, #24]
 8012a3c:	f001 fce0 	bl	8014400 <pxPortInitialiseStack>
 8012a40:	4602      	mov	r2, r0
 8012a42:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012a44:	601a      	str	r2, [r3, #0]
		}
		#endif /* portHAS_STACK_OVERFLOW_CHECKING */
	}
	#endif /* portUSING_MPU_WRAPPERS */

	if( pxCreatedTask != NULL )
 8012a46:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8012a48:	2b00      	cmp	r3, #0
 8012a4a:	d002      	beq.n	8012a52 <prvInitialiseNewTask+0x13a>
	{
		/* Pass the handle out in an anonymous way.  The handle can be used to
		change the created task's priority, delete the created task, etc.*/
		*pxCreatedTask = ( TaskHandle_t ) pxNewTCB;
 8012a4c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8012a4e:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 8012a50:	601a      	str	r2, [r3, #0]
	}
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}
}
 8012a52:	bf00      	nop
 8012a54:	3720      	adds	r7, #32
 8012a56:	46bd      	mov	sp, r7
 8012a58:	bd80      	pop	{r7, pc}
 8012a5a:	bf00      	nop
 8012a5c:	2402a1a8 	.word	0x2402a1a8
 8012a60:	2402a210 	.word	0x2402a210
 8012a64:	2402a278 	.word	0x2402a278

08012a68 <prvAddNewTaskToReadyList>:
/*-----------------------------------------------------------*/

static void prvAddNewTaskToReadyList( TCB_t *pxNewTCB )
{
 8012a68:	b580      	push	{r7, lr}
 8012a6a:	b082      	sub	sp, #8
 8012a6c:	af00      	add	r7, sp, #0
 8012a6e:	6078      	str	r0, [r7, #4]
	/* Ensure interrupts don't access the task lists while the lists are being
	updated. */
	taskENTER_CRITICAL();
 8012a70:	f001 fdfa 	bl	8014668 <vPortEnterCritical>
	{
		uxCurrentNumberOfTasks++;
 8012a74:	4b2d      	ldr	r3, [pc, #180]	@ (8012b2c <prvAddNewTaskToReadyList+0xc4>)
 8012a76:	681b      	ldr	r3, [r3, #0]
 8012a78:	3301      	adds	r3, #1
 8012a7a:	4a2c      	ldr	r2, [pc, #176]	@ (8012b2c <prvAddNewTaskToReadyList+0xc4>)
 8012a7c:	6013      	str	r3, [r2, #0]
		if( pxCurrentTCB == NULL )
 8012a7e:	4b2c      	ldr	r3, [pc, #176]	@ (8012b30 <prvAddNewTaskToReadyList+0xc8>)
 8012a80:	681b      	ldr	r3, [r3, #0]
 8012a82:	2b00      	cmp	r3, #0
 8012a84:	d109      	bne.n	8012a9a <prvAddNewTaskToReadyList+0x32>
		{
			/* There are no other tasks, or all the other tasks are in
			the suspended state - make this the current task. */
			pxCurrentTCB = pxNewTCB;
 8012a86:	4a2a      	ldr	r2, [pc, #168]	@ (8012b30 <prvAddNewTaskToReadyList+0xc8>)
 8012a88:	687b      	ldr	r3, [r7, #4]
 8012a8a:	6013      	str	r3, [r2, #0]

			if( uxCurrentNumberOfTasks == ( UBaseType_t ) 1 )
 8012a8c:	4b27      	ldr	r3, [pc, #156]	@ (8012b2c <prvAddNewTaskToReadyList+0xc4>)
 8012a8e:	681b      	ldr	r3, [r3, #0]
 8012a90:	2b01      	cmp	r3, #1
 8012a92:	d110      	bne.n	8012ab6 <prvAddNewTaskToReadyList+0x4e>
			{
				/* This is the first task to be created so do the preliminary
				initialisation required.  We will not recover if this call
				fails, but we will report the failure. */
				prvInitialiseTaskLists();
 8012a94:	f000 fc76 	bl	8013384 <prvInitialiseTaskLists>
 8012a98:	e00d      	b.n	8012ab6 <prvAddNewTaskToReadyList+0x4e>
		else
		{
			/* If the scheduler is not already running, make this task the
			current task if it is the highest priority task to be created
			so far. */
			if( xSchedulerRunning == pdFALSE )
 8012a9a:	4b26      	ldr	r3, [pc, #152]	@ (8012b34 <prvAddNewTaskToReadyList+0xcc>)
 8012a9c:	681b      	ldr	r3, [r3, #0]
 8012a9e:	2b00      	cmp	r3, #0
 8012aa0:	d109      	bne.n	8012ab6 <prvAddNewTaskToReadyList+0x4e>
			{
				if( pxCurrentTCB->uxPriority <= pxNewTCB->uxPriority )
 8012aa2:	4b23      	ldr	r3, [pc, #140]	@ (8012b30 <prvAddNewTaskToReadyList+0xc8>)
 8012aa4:	681b      	ldr	r3, [r3, #0]
 8012aa6:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8012aa8:	687b      	ldr	r3, [r7, #4]
 8012aaa:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8012aac:	429a      	cmp	r2, r3
 8012aae:	d802      	bhi.n	8012ab6 <prvAddNewTaskToReadyList+0x4e>
				{
					pxCurrentTCB = pxNewTCB;
 8012ab0:	4a1f      	ldr	r2, [pc, #124]	@ (8012b30 <prvAddNewTaskToReadyList+0xc8>)
 8012ab2:	687b      	ldr	r3, [r7, #4]
 8012ab4:	6013      	str	r3, [r2, #0]
			{
				mtCOVERAGE_TEST_MARKER();
			}
		}

		uxTaskNumber++;
 8012ab6:	4b20      	ldr	r3, [pc, #128]	@ (8012b38 <prvAddNewTaskToReadyList+0xd0>)
 8012ab8:	681b      	ldr	r3, [r3, #0]
 8012aba:	3301      	adds	r3, #1
 8012abc:	4a1e      	ldr	r2, [pc, #120]	@ (8012b38 <prvAddNewTaskToReadyList+0xd0>)
 8012abe:	6013      	str	r3, [r2, #0]

		#if ( configUSE_TRACE_FACILITY == 1 )
		{
			/* Add a counter into the TCB for tracing only. */
			pxNewTCB->uxTCBNumber = uxTaskNumber;
 8012ac0:	4b1d      	ldr	r3, [pc, #116]	@ (8012b38 <prvAddNewTaskToReadyList+0xd0>)
 8012ac2:	681a      	ldr	r2, [r3, #0]
 8012ac4:	687b      	ldr	r3, [r7, #4]
 8012ac6:	645a      	str	r2, [r3, #68]	@ 0x44
		}
		#endif /* configUSE_TRACE_FACILITY */
		traceTASK_CREATE( pxNewTCB );

		prvAddTaskToReadyList( pxNewTCB );
 8012ac8:	687b      	ldr	r3, [r7, #4]
 8012aca:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8012acc:	4b1b      	ldr	r3, [pc, #108]	@ (8012b3c <prvAddNewTaskToReadyList+0xd4>)
 8012ace:	681b      	ldr	r3, [r3, #0]
 8012ad0:	429a      	cmp	r2, r3
 8012ad2:	d903      	bls.n	8012adc <prvAddNewTaskToReadyList+0x74>
 8012ad4:	687b      	ldr	r3, [r7, #4]
 8012ad6:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8012ad8:	4a18      	ldr	r2, [pc, #96]	@ (8012b3c <prvAddNewTaskToReadyList+0xd4>)
 8012ada:	6013      	str	r3, [r2, #0]
 8012adc:	687b      	ldr	r3, [r7, #4]
 8012ade:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8012ae0:	4613      	mov	r3, r2
 8012ae2:	009b      	lsls	r3, r3, #2
 8012ae4:	4413      	add	r3, r2
 8012ae6:	009b      	lsls	r3, r3, #2
 8012ae8:	4a15      	ldr	r2, [pc, #84]	@ (8012b40 <prvAddNewTaskToReadyList+0xd8>)
 8012aea:	441a      	add	r2, r3
 8012aec:	687b      	ldr	r3, [r7, #4]
 8012aee:	3304      	adds	r3, #4
 8012af0:	4619      	mov	r1, r3
 8012af2:	4610      	mov	r0, r2
 8012af4:	f7fe f929 	bl	8010d4a <vListInsertEnd>

		portSETUP_TCB( pxNewTCB );
	}
	taskEXIT_CRITICAL();
 8012af8:	f001 fde8 	bl	80146cc <vPortExitCritical>

	if( xSchedulerRunning != pdFALSE )
 8012afc:	4b0d      	ldr	r3, [pc, #52]	@ (8012b34 <prvAddNewTaskToReadyList+0xcc>)
 8012afe:	681b      	ldr	r3, [r3, #0]
 8012b00:	2b00      	cmp	r3, #0
 8012b02:	d00e      	beq.n	8012b22 <prvAddNewTaskToReadyList+0xba>
	{
		/* If the created task is of a higher priority than the current task
		then it should run now. */
		if( pxCurrentTCB->uxPriority < pxNewTCB->uxPriority )
 8012b04:	4b0a      	ldr	r3, [pc, #40]	@ (8012b30 <prvAddNewTaskToReadyList+0xc8>)
 8012b06:	681b      	ldr	r3, [r3, #0]
 8012b08:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8012b0a:	687b      	ldr	r3, [r7, #4]
 8012b0c:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8012b0e:	429a      	cmp	r2, r3
 8012b10:	d207      	bcs.n	8012b22 <prvAddNewTaskToReadyList+0xba>
		{
			taskYIELD_IF_USING_PREEMPTION();
 8012b12:	4b0c      	ldr	r3, [pc, #48]	@ (8012b44 <prvAddNewTaskToReadyList+0xdc>)
 8012b14:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8012b18:	601a      	str	r2, [r3, #0]
 8012b1a:	f3bf 8f4f 	dsb	sy
 8012b1e:	f3bf 8f6f 	isb	sy
	}
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}
}
 8012b22:	bf00      	nop
 8012b24:	3708      	adds	r7, #8
 8012b26:	46bd      	mov	sp, r7
 8012b28:	bd80      	pop	{r7, pc}
 8012b2a:	bf00      	nop
 8012b2c:	240032c8 	.word	0x240032c8
 8012b30:	24002df4 	.word	0x24002df4
 8012b34:	240032d4 	.word	0x240032d4
 8012b38:	240032e4 	.word	0x240032e4
 8012b3c:	240032d0 	.word	0x240032d0
 8012b40:	24002df8 	.word	0x24002df8
 8012b44:	e000ed04 	.word	0xe000ed04

08012b48 <vTaskDelay>:
/*-----------------------------------------------------------*/

#if ( INCLUDE_vTaskDelay == 1 )

	void vTaskDelay( const TickType_t xTicksToDelay )
	{
 8012b48:	b580      	push	{r7, lr}
 8012b4a:	b084      	sub	sp, #16
 8012b4c:	af00      	add	r7, sp, #0
 8012b4e:	6078      	str	r0, [r7, #4]
	BaseType_t xAlreadyYielded = pdFALSE;
 8012b50:	2300      	movs	r3, #0
 8012b52:	60fb      	str	r3, [r7, #12]

		/* A delay time of zero just forces a reschedule. */
		if( xTicksToDelay > ( TickType_t ) 0U )
 8012b54:	687b      	ldr	r3, [r7, #4]
 8012b56:	2b00      	cmp	r3, #0
 8012b58:	d018      	beq.n	8012b8c <vTaskDelay+0x44>
		{
			configASSERT( uxSchedulerSuspended == 0 );
 8012b5a:	4b14      	ldr	r3, [pc, #80]	@ (8012bac <vTaskDelay+0x64>)
 8012b5c:	681b      	ldr	r3, [r3, #0]
 8012b5e:	2b00      	cmp	r3, #0
 8012b60:	d00b      	beq.n	8012b7a <vTaskDelay+0x32>
	__asm volatile
 8012b62:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012b66:	f383 8811 	msr	BASEPRI, r3
 8012b6a:	f3bf 8f6f 	isb	sy
 8012b6e:	f3bf 8f4f 	dsb	sy
 8012b72:	60bb      	str	r3, [r7, #8]
}
 8012b74:	bf00      	nop
 8012b76:	bf00      	nop
 8012b78:	e7fd      	b.n	8012b76 <vTaskDelay+0x2e>
			vTaskSuspendAll();
 8012b7a:	f000 f88b 	bl	8012c94 <vTaskSuspendAll>
				list or removed from the blocked list until the scheduler
				is resumed.

				This task cannot be in an event list as it is the currently
				executing task. */
				prvAddCurrentTaskToDelayedList( xTicksToDelay, pdFALSE );
 8012b7e:	2100      	movs	r1, #0
 8012b80:	6878      	ldr	r0, [r7, #4]
 8012b82:	f001 f88f 	bl	8013ca4 <prvAddCurrentTaskToDelayedList>
			}
			xAlreadyYielded = xTaskResumeAll();
 8012b86:	f000 f893 	bl	8012cb0 <xTaskResumeAll>
 8012b8a:	60f8      	str	r0, [r7, #12]
			mtCOVERAGE_TEST_MARKER();
		}

		/* Force a reschedule if xTaskResumeAll has not already done so, we may
		have put ourselves to sleep. */
		if( xAlreadyYielded == pdFALSE )
 8012b8c:	68fb      	ldr	r3, [r7, #12]
 8012b8e:	2b00      	cmp	r3, #0
 8012b90:	d107      	bne.n	8012ba2 <vTaskDelay+0x5a>
		{
			portYIELD_WITHIN_API();
 8012b92:	4b07      	ldr	r3, [pc, #28]	@ (8012bb0 <vTaskDelay+0x68>)
 8012b94:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8012b98:	601a      	str	r2, [r3, #0]
 8012b9a:	f3bf 8f4f 	dsb	sy
 8012b9e:	f3bf 8f6f 	isb	sy
		}
		else
		{
			mtCOVERAGE_TEST_MARKER();
		}
	}
 8012ba2:	bf00      	nop
 8012ba4:	3710      	adds	r7, #16
 8012ba6:	46bd      	mov	sp, r7
 8012ba8:	bd80      	pop	{r7, pc}
 8012baa:	bf00      	nop
 8012bac:	240032f0 	.word	0x240032f0
 8012bb0:	e000ed04 	.word	0xe000ed04

08012bb4 <vTaskStartScheduler>:

#endif /* ( ( INCLUDE_xTaskResumeFromISR == 1 ) && ( INCLUDE_vTaskSuspend == 1 ) ) */
/*-----------------------------------------------------------*/

void vTaskStartScheduler( void )
{
 8012bb4:	b580      	push	{r7, lr}
 8012bb6:	b08a      	sub	sp, #40	@ 0x28
 8012bb8:	af04      	add	r7, sp, #16
BaseType_t xReturn;

	/* Add the idle task at the lowest priority. */
	#if( configSUPPORT_STATIC_ALLOCATION == 1 )
	{
		StaticTask_t *pxIdleTaskTCBBuffer = NULL;
 8012bba:	2300      	movs	r3, #0
 8012bbc:	60bb      	str	r3, [r7, #8]
		StackType_t *pxIdleTaskStackBuffer = NULL;
 8012bbe:	2300      	movs	r3, #0
 8012bc0:	607b      	str	r3, [r7, #4]
		uint32_t ulIdleTaskStackSize;

		/* The Idle task is created using user provided RAM - obtain the
		address of the RAM then create the idle task. */
		vApplicationGetIdleTaskMemory( &pxIdleTaskTCBBuffer, &pxIdleTaskStackBuffer, &ulIdleTaskStackSize );
 8012bc2:	463a      	mov	r2, r7
 8012bc4:	1d39      	adds	r1, r7, #4
 8012bc6:	f107 0308 	add.w	r3, r7, #8
 8012bca:	4618      	mov	r0, r3
 8012bcc:	f7fe f85c 	bl	8010c88 <vApplicationGetIdleTaskMemory>
		xIdleTaskHandle = xTaskCreateStatic(	prvIdleTask,
 8012bd0:	6839      	ldr	r1, [r7, #0]
 8012bd2:	687b      	ldr	r3, [r7, #4]
 8012bd4:	68ba      	ldr	r2, [r7, #8]
 8012bd6:	9202      	str	r2, [sp, #8]
 8012bd8:	9301      	str	r3, [sp, #4]
 8012bda:	2300      	movs	r3, #0
 8012bdc:	9300      	str	r3, [sp, #0]
 8012bde:	2300      	movs	r3, #0
 8012be0:	460a      	mov	r2, r1
 8012be2:	4924      	ldr	r1, [pc, #144]	@ (8012c74 <vTaskStartScheduler+0xc0>)
 8012be4:	4824      	ldr	r0, [pc, #144]	@ (8012c78 <vTaskStartScheduler+0xc4>)
 8012be6:	f7ff fdf1 	bl	80127cc <xTaskCreateStatic>
 8012bea:	4603      	mov	r3, r0
 8012bec:	4a23      	ldr	r2, [pc, #140]	@ (8012c7c <vTaskStartScheduler+0xc8>)
 8012bee:	6013      	str	r3, [r2, #0]
												( void * ) NULL, /*lint !e961.  The cast is not redundant for all compilers. */
												portPRIVILEGE_BIT, /* In effect ( tskIDLE_PRIORITY | portPRIVILEGE_BIT ), but tskIDLE_PRIORITY is zero. */
												pxIdleTaskStackBuffer,
												pxIdleTaskTCBBuffer ); /*lint !e961 MISRA exception, justified as it is not a redundant explicit cast to all supported compilers. */

		if( xIdleTaskHandle != NULL )
 8012bf0:	4b22      	ldr	r3, [pc, #136]	@ (8012c7c <vTaskStartScheduler+0xc8>)
 8012bf2:	681b      	ldr	r3, [r3, #0]
 8012bf4:	2b00      	cmp	r3, #0
 8012bf6:	d002      	beq.n	8012bfe <vTaskStartScheduler+0x4a>
		{
			xReturn = pdPASS;
 8012bf8:	2301      	movs	r3, #1
 8012bfa:	617b      	str	r3, [r7, #20]
 8012bfc:	e001      	b.n	8012c02 <vTaskStartScheduler+0x4e>
		}
		else
		{
			xReturn = pdFAIL;
 8012bfe:	2300      	movs	r3, #0
 8012c00:	617b      	str	r3, [r7, #20]
	}
	#endif /* configSUPPORT_STATIC_ALLOCATION */

	#if ( configUSE_TIMERS == 1 )
	{
		if( xReturn == pdPASS )
 8012c02:	697b      	ldr	r3, [r7, #20]
 8012c04:	2b01      	cmp	r3, #1
 8012c06:	d102      	bne.n	8012c0e <vTaskStartScheduler+0x5a>
		{
			xReturn = xTimerCreateTimerTask();
 8012c08:	f001 f8a0 	bl	8013d4c <xTimerCreateTimerTask>
 8012c0c:	6178      	str	r0, [r7, #20]
			mtCOVERAGE_TEST_MARKER();
		}
	}
	#endif /* configUSE_TIMERS */

	if( xReturn == pdPASS )
 8012c0e:	697b      	ldr	r3, [r7, #20]
 8012c10:	2b01      	cmp	r3, #1
 8012c12:	d11b      	bne.n	8012c4c <vTaskStartScheduler+0x98>
	__asm volatile
 8012c14:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012c18:	f383 8811 	msr	BASEPRI, r3
 8012c1c:	f3bf 8f6f 	isb	sy
 8012c20:	f3bf 8f4f 	dsb	sy
 8012c24:	613b      	str	r3, [r7, #16]
}
 8012c26:	bf00      	nop
		{
			/* Switch Newlib's _impure_ptr variable to point to the _reent
			structure specific to the task that will run first.
			See the third party link http://www.nadler.com/embedded/newlibAndFreeRTOS.html
			for additional information. */
			_impure_ptr = &( pxCurrentTCB->xNewLib_reent );
 8012c28:	4b15      	ldr	r3, [pc, #84]	@ (8012c80 <vTaskStartScheduler+0xcc>)
 8012c2a:	681b      	ldr	r3, [r3, #0]
 8012c2c:	3354      	adds	r3, #84	@ 0x54
 8012c2e:	4a15      	ldr	r2, [pc, #84]	@ (8012c84 <vTaskStartScheduler+0xd0>)
 8012c30:	6013      	str	r3, [r2, #0]
		}
		#endif /* configUSE_NEWLIB_REENTRANT */

		xNextTaskUnblockTime = portMAX_DELAY;
 8012c32:	4b15      	ldr	r3, [pc, #84]	@ (8012c88 <vTaskStartScheduler+0xd4>)
 8012c34:	f04f 32ff 	mov.w	r2, #4294967295	@ 0xffffffff
 8012c38:	601a      	str	r2, [r3, #0]
		xSchedulerRunning = pdTRUE;
 8012c3a:	4b14      	ldr	r3, [pc, #80]	@ (8012c8c <vTaskStartScheduler+0xd8>)
 8012c3c:	2201      	movs	r2, #1
 8012c3e:	601a      	str	r2, [r3, #0]
		xTickCount = ( TickType_t ) configINITIAL_TICK_COUNT;
 8012c40:	4b13      	ldr	r3, [pc, #76]	@ (8012c90 <vTaskStartScheduler+0xdc>)
 8012c42:	2200      	movs	r2, #0
 8012c44:	601a      	str	r2, [r3, #0]

		traceTASK_SWITCHED_IN();

		/* Setting up the timer tick is hardware specific and thus in the
		portable interface. */
		if( xPortStartScheduler() != pdFALSE )
 8012c46:	f001 fc6b 	bl	8014520 <xPortStartScheduler>
	}

	/* Prevent compiler warnings if INCLUDE_xTaskGetIdleTaskHandle is set to 0,
	meaning xIdleTaskHandle is not used anywhere else. */
	( void ) xIdleTaskHandle;
}
 8012c4a:	e00f      	b.n	8012c6c <vTaskStartScheduler+0xb8>
		configASSERT( xReturn != errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY );
 8012c4c:	697b      	ldr	r3, [r7, #20]
 8012c4e:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8012c52:	d10b      	bne.n	8012c6c <vTaskStartScheduler+0xb8>
	__asm volatile
 8012c54:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012c58:	f383 8811 	msr	BASEPRI, r3
 8012c5c:	f3bf 8f6f 	isb	sy
 8012c60:	f3bf 8f4f 	dsb	sy
 8012c64:	60fb      	str	r3, [r7, #12]
}
 8012c66:	bf00      	nop
 8012c68:	bf00      	nop
 8012c6a:	e7fd      	b.n	8012c68 <vTaskStartScheduler+0xb4>
}
 8012c6c:	bf00      	nop
 8012c6e:	3718      	adds	r7, #24
 8012c70:	46bd      	mov	sp, r7
 8012c72:	bd80      	pop	{r7, pc}
 8012c74:	0802c700 	.word	0x0802c700
 8012c78:	08013355 	.word	0x08013355
 8012c7c:	240032ec 	.word	0x240032ec
 8012c80:	24002df4 	.word	0x24002df4
 8012c84:	240001c0 	.word	0x240001c0
 8012c88:	240032e8 	.word	0x240032e8
 8012c8c:	240032d4 	.word	0x240032d4
 8012c90:	240032cc 	.word	0x240032cc

08012c94 <vTaskSuspendAll>:
	vPortEndScheduler();
}
/*----------------------------------------------------------*/

void vTaskSuspendAll( void )
{
 8012c94:	b480      	push	{r7}
 8012c96:	af00      	add	r7, sp, #0
	do not otherwise exhibit real time behaviour. */
	portSOFTWARE_BARRIER();

	/* The scheduler is suspended if uxSchedulerSuspended is non-zero.  An increment
	is used to allow calls to vTaskSuspendAll() to nest. */
	++uxSchedulerSuspended;
 8012c98:	4b04      	ldr	r3, [pc, #16]	@ (8012cac <vTaskSuspendAll+0x18>)
 8012c9a:	681b      	ldr	r3, [r3, #0]
 8012c9c:	3301      	adds	r3, #1
 8012c9e:	4a03      	ldr	r2, [pc, #12]	@ (8012cac <vTaskSuspendAll+0x18>)
 8012ca0:	6013      	str	r3, [r2, #0]

	/* Enforces ordering for ports and optimised compilers that may otherwise place
	the above increment elsewhere. */
	portMEMORY_BARRIER();
}
 8012ca2:	bf00      	nop
 8012ca4:	46bd      	mov	sp, r7
 8012ca6:	f85d 7b04 	ldr.w	r7, [sp], #4
 8012caa:	4770      	bx	lr
 8012cac:	240032f0 	.word	0x240032f0

08012cb0 <xTaskResumeAll>:

#endif /* configUSE_TICKLESS_IDLE */
/*----------------------------------------------------------*/

BaseType_t xTaskResumeAll( void )
{
 8012cb0:	b580      	push	{r7, lr}
 8012cb2:	b084      	sub	sp, #16
 8012cb4:	af00      	add	r7, sp, #0
TCB_t *pxTCB = NULL;
 8012cb6:	2300      	movs	r3, #0
 8012cb8:	60fb      	str	r3, [r7, #12]
BaseType_t xAlreadyYielded = pdFALSE;
 8012cba:	2300      	movs	r3, #0
 8012cbc:	60bb      	str	r3, [r7, #8]

	/* If uxSchedulerSuspended is zero then this function does not match a
	previous call to vTaskSuspendAll(). */
	configASSERT( uxSchedulerSuspended );
 8012cbe:	4b42      	ldr	r3, [pc, #264]	@ (8012dc8 <xTaskResumeAll+0x118>)
 8012cc0:	681b      	ldr	r3, [r3, #0]
 8012cc2:	2b00      	cmp	r3, #0
 8012cc4:	d10b      	bne.n	8012cde <xTaskResumeAll+0x2e>
	__asm volatile
 8012cc6:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012cca:	f383 8811 	msr	BASEPRI, r3
 8012cce:	f3bf 8f6f 	isb	sy
 8012cd2:	f3bf 8f4f 	dsb	sy
 8012cd6:	603b      	str	r3, [r7, #0]
}
 8012cd8:	bf00      	nop
 8012cda:	bf00      	nop
 8012cdc:	e7fd      	b.n	8012cda <xTaskResumeAll+0x2a>
	/* It is possible that an ISR caused a task to be removed from an event
	list while the scheduler was suspended.  If this was the case then the
	removed task will have been added to the xPendingReadyList.  Once the
	scheduler has been resumed it is safe to move all the pending ready
	tasks from this list into their appropriate ready list. */
	taskENTER_CRITICAL();
 8012cde:	f001 fcc3 	bl	8014668 <vPortEnterCritical>
	{
		--uxSchedulerSuspended;
 8012ce2:	4b39      	ldr	r3, [pc, #228]	@ (8012dc8 <xTaskResumeAll+0x118>)
 8012ce4:	681b      	ldr	r3, [r3, #0]
 8012ce6:	3b01      	subs	r3, #1
 8012ce8:	4a37      	ldr	r2, [pc, #220]	@ (8012dc8 <xTaskResumeAll+0x118>)
 8012cea:	6013      	str	r3, [r2, #0]

		if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
 8012cec:	4b36      	ldr	r3, [pc, #216]	@ (8012dc8 <xTaskResumeAll+0x118>)
 8012cee:	681b      	ldr	r3, [r3, #0]
 8012cf0:	2b00      	cmp	r3, #0
 8012cf2:	d162      	bne.n	8012dba <xTaskResumeAll+0x10a>
		{
			if( uxCurrentNumberOfTasks > ( UBaseType_t ) 0U )
 8012cf4:	4b35      	ldr	r3, [pc, #212]	@ (8012dcc <xTaskResumeAll+0x11c>)
 8012cf6:	681b      	ldr	r3, [r3, #0]
 8012cf8:	2b00      	cmp	r3, #0
 8012cfa:	d05e      	beq.n	8012dba <xTaskResumeAll+0x10a>
			{
				/* Move any readied tasks from the pending list into the
				appropriate ready list. */
				while( listLIST_IS_EMPTY( &xPendingReadyList ) == pdFALSE )
 8012cfc:	e02f      	b.n	8012d5e <xTaskResumeAll+0xae>
				{
					pxTCB = listGET_OWNER_OF_HEAD_ENTRY( ( &xPendingReadyList ) ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
 8012cfe:	4b34      	ldr	r3, [pc, #208]	@ (8012dd0 <xTaskResumeAll+0x120>)
 8012d00:	68db      	ldr	r3, [r3, #12]
 8012d02:	68db      	ldr	r3, [r3, #12]
 8012d04:	60fb      	str	r3, [r7, #12]
					( void ) uxListRemove( &( pxTCB->xEventListItem ) );
 8012d06:	68fb      	ldr	r3, [r7, #12]
 8012d08:	3318      	adds	r3, #24
 8012d0a:	4618      	mov	r0, r3
 8012d0c:	f7fe f87a 	bl	8010e04 <uxListRemove>
					( void ) uxListRemove( &( pxTCB->xStateListItem ) );
 8012d10:	68fb      	ldr	r3, [r7, #12]
 8012d12:	3304      	adds	r3, #4
 8012d14:	4618      	mov	r0, r3
 8012d16:	f7fe f875 	bl	8010e04 <uxListRemove>
					prvAddTaskToReadyList( pxTCB );
 8012d1a:	68fb      	ldr	r3, [r7, #12]
 8012d1c:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8012d1e:	4b2d      	ldr	r3, [pc, #180]	@ (8012dd4 <xTaskResumeAll+0x124>)
 8012d20:	681b      	ldr	r3, [r3, #0]
 8012d22:	429a      	cmp	r2, r3
 8012d24:	d903      	bls.n	8012d2e <xTaskResumeAll+0x7e>
 8012d26:	68fb      	ldr	r3, [r7, #12]
 8012d28:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8012d2a:	4a2a      	ldr	r2, [pc, #168]	@ (8012dd4 <xTaskResumeAll+0x124>)
 8012d2c:	6013      	str	r3, [r2, #0]
 8012d2e:	68fb      	ldr	r3, [r7, #12]
 8012d30:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8012d32:	4613      	mov	r3, r2
 8012d34:	009b      	lsls	r3, r3, #2
 8012d36:	4413      	add	r3, r2
 8012d38:	009b      	lsls	r3, r3, #2
 8012d3a:	4a27      	ldr	r2, [pc, #156]	@ (8012dd8 <xTaskResumeAll+0x128>)
 8012d3c:	441a      	add	r2, r3
 8012d3e:	68fb      	ldr	r3, [r7, #12]
 8012d40:	3304      	adds	r3, #4
 8012d42:	4619      	mov	r1, r3
 8012d44:	4610      	mov	r0, r2
 8012d46:	f7fe f800 	bl	8010d4a <vListInsertEnd>

					/* If the moved task has a priority higher than the current
					task then a yield must be performed. */
					if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority )
 8012d4a:	68fb      	ldr	r3, [r7, #12]
 8012d4c:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8012d4e:	4b23      	ldr	r3, [pc, #140]	@ (8012ddc <xTaskResumeAll+0x12c>)
 8012d50:	681b      	ldr	r3, [r3, #0]
 8012d52:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8012d54:	429a      	cmp	r2, r3
 8012d56:	d302      	bcc.n	8012d5e <xTaskResumeAll+0xae>
					{
						xYieldPending = pdTRUE;
 8012d58:	4b21      	ldr	r3, [pc, #132]	@ (8012de0 <xTaskResumeAll+0x130>)
 8012d5a:	2201      	movs	r2, #1
 8012d5c:	601a      	str	r2, [r3, #0]
				while( listLIST_IS_EMPTY( &xPendingReadyList ) == pdFALSE )
 8012d5e:	4b1c      	ldr	r3, [pc, #112]	@ (8012dd0 <xTaskResumeAll+0x120>)
 8012d60:	681b      	ldr	r3, [r3, #0]
 8012d62:	2b00      	cmp	r3, #0
 8012d64:	d1cb      	bne.n	8012cfe <xTaskResumeAll+0x4e>
					{
						mtCOVERAGE_TEST_MARKER();
					}
				}

				if( pxTCB != NULL )
 8012d66:	68fb      	ldr	r3, [r7, #12]
 8012d68:	2b00      	cmp	r3, #0
 8012d6a:	d001      	beq.n	8012d70 <xTaskResumeAll+0xc0>
					which may have prevented the next unblock time from being
					re-calculated, in which case re-calculate it now.  Mainly
					important for low power tickless implementations, where
					this can prevent an unnecessary exit from low power
					state. */
					prvResetNextTaskUnblockTime();
 8012d6c:	f000 fbae 	bl	80134cc <prvResetNextTaskUnblockTime>
				/* If any ticks occurred while the scheduler was suspended then
				they should be processed now.  This ensures the tick count does
				not	slip, and that any delayed tasks are resumed at the correct
				time. */
				{
					TickType_t xPendedCounts = xPendedTicks; /* Non-volatile copy. */
 8012d70:	4b1c      	ldr	r3, [pc, #112]	@ (8012de4 <xTaskResumeAll+0x134>)
 8012d72:	681b      	ldr	r3, [r3, #0]
 8012d74:	607b      	str	r3, [r7, #4]

					if( xPendedCounts > ( TickType_t ) 0U )
 8012d76:	687b      	ldr	r3, [r7, #4]
 8012d78:	2b00      	cmp	r3, #0
 8012d7a:	d010      	beq.n	8012d9e <xTaskResumeAll+0xee>
					{
						do
						{
							if( xTaskIncrementTick() != pdFALSE )
 8012d7c:	f000 f858 	bl	8012e30 <xTaskIncrementTick>
 8012d80:	4603      	mov	r3, r0
 8012d82:	2b00      	cmp	r3, #0
 8012d84:	d002      	beq.n	8012d8c <xTaskResumeAll+0xdc>
							{
								xYieldPending = pdTRUE;
 8012d86:	4b16      	ldr	r3, [pc, #88]	@ (8012de0 <xTaskResumeAll+0x130>)
 8012d88:	2201      	movs	r2, #1
 8012d8a:	601a      	str	r2, [r3, #0]
							}
							else
							{
								mtCOVERAGE_TEST_MARKER();
							}
							--xPendedCounts;
 8012d8c:	687b      	ldr	r3, [r7, #4]
 8012d8e:	3b01      	subs	r3, #1
 8012d90:	607b      	str	r3, [r7, #4]
						} while( xPendedCounts > ( TickType_t ) 0U );
 8012d92:	687b      	ldr	r3, [r7, #4]
 8012d94:	2b00      	cmp	r3, #0
 8012d96:	d1f1      	bne.n	8012d7c <xTaskResumeAll+0xcc>

						xPendedTicks = 0;
 8012d98:	4b12      	ldr	r3, [pc, #72]	@ (8012de4 <xTaskResumeAll+0x134>)
 8012d9a:	2200      	movs	r2, #0
 8012d9c:	601a      	str	r2, [r3, #0]
					{
						mtCOVERAGE_TEST_MARKER();
					}
				}

				if( xYieldPending != pdFALSE )
 8012d9e:	4b10      	ldr	r3, [pc, #64]	@ (8012de0 <xTaskResumeAll+0x130>)
 8012da0:	681b      	ldr	r3, [r3, #0]
 8012da2:	2b00      	cmp	r3, #0
 8012da4:	d009      	beq.n	8012dba <xTaskResumeAll+0x10a>
				{
					#if( configUSE_PREEMPTION != 0 )
					{
						xAlreadyYielded = pdTRUE;
 8012da6:	2301      	movs	r3, #1
 8012da8:	60bb      	str	r3, [r7, #8]
					}
					#endif
					taskYIELD_IF_USING_PREEMPTION();
 8012daa:	4b0f      	ldr	r3, [pc, #60]	@ (8012de8 <xTaskResumeAll+0x138>)
 8012dac:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8012db0:	601a      	str	r2, [r3, #0]
 8012db2:	f3bf 8f4f 	dsb	sy
 8012db6:	f3bf 8f6f 	isb	sy
		else
		{
			mtCOVERAGE_TEST_MARKER();
		}
	}
	taskEXIT_CRITICAL();
 8012dba:	f001 fc87 	bl	80146cc <vPortExitCritical>

	return xAlreadyYielded;
 8012dbe:	68bb      	ldr	r3, [r7, #8]
}
 8012dc0:	4618      	mov	r0, r3
 8012dc2:	3710      	adds	r7, #16
 8012dc4:	46bd      	mov	sp, r7
 8012dc6:	bd80      	pop	{r7, pc}
 8012dc8:	240032f0 	.word	0x240032f0
 8012dcc:	240032c8 	.word	0x240032c8
 8012dd0:	24003288 	.word	0x24003288
 8012dd4:	240032d0 	.word	0x240032d0
 8012dd8:	24002df8 	.word	0x24002df8
 8012ddc:	24002df4 	.word	0x24002df4
 8012de0:	240032dc 	.word	0x240032dc
 8012de4:	240032d8 	.word	0x240032d8
 8012de8:	e000ed04 	.word	0xe000ed04

08012dec <xTaskGetTickCount>:
/*-----------------------------------------------------------*/

TickType_t xTaskGetTickCount( void )
{
 8012dec:	b480      	push	{r7}
 8012dee:	b083      	sub	sp, #12
 8012df0:	af00      	add	r7, sp, #0
TickType_t xTicks;

	/* Critical section required if running on a 16 bit processor. */
	portTICK_TYPE_ENTER_CRITICAL();
	{
		xTicks = xTickCount;
 8012df2:	4b05      	ldr	r3, [pc, #20]	@ (8012e08 <xTaskGetTickCount+0x1c>)
 8012df4:	681b      	ldr	r3, [r3, #0]
 8012df6:	607b      	str	r3, [r7, #4]
	}
	portTICK_TYPE_EXIT_CRITICAL();

	return xTicks;
 8012df8:	687b      	ldr	r3, [r7, #4]
}
 8012dfa:	4618      	mov	r0, r3
 8012dfc:	370c      	adds	r7, #12
 8012dfe:	46bd      	mov	sp, r7
 8012e00:	f85d 7b04 	ldr.w	r7, [sp], #4
 8012e04:	4770      	bx	lr
 8012e06:	bf00      	nop
 8012e08:	240032cc 	.word	0x240032cc

08012e0c <xTaskGetTickCountFromISR>:
/*-----------------------------------------------------------*/

TickType_t xTaskGetTickCountFromISR( void )
{
 8012e0c:	b580      	push	{r7, lr}
 8012e0e:	b082      	sub	sp, #8
 8012e10:	af00      	add	r7, sp, #0
	that have been assigned a priority at or (logically) below the maximum
	system call	interrupt priority.  FreeRTOS maintains a separate interrupt
	safe API to ensure interrupt entry is as fast and as simple as possible.
	More information (albeit Cortex-M specific) is provided on the following
	link: https://www.freertos.org/RTOS-Cortex-M3-M4.html */
	portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
 8012e12:	f001 fd09 	bl	8014828 <vPortValidateInterruptPriority>

	uxSavedInterruptStatus = portTICK_TYPE_SET_INTERRUPT_MASK_FROM_ISR();
 8012e16:	2300      	movs	r3, #0
 8012e18:	607b      	str	r3, [r7, #4]
	{
		xReturn = xTickCount;
 8012e1a:	4b04      	ldr	r3, [pc, #16]	@ (8012e2c <xTaskGetTickCountFromISR+0x20>)
 8012e1c:	681b      	ldr	r3, [r3, #0]
 8012e1e:	603b      	str	r3, [r7, #0]
	}
	portTICK_TYPE_CLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );

	return xReturn;
 8012e20:	683b      	ldr	r3, [r7, #0]
}
 8012e22:	4618      	mov	r0, r3
 8012e24:	3708      	adds	r7, #8
 8012e26:	46bd      	mov	sp, r7
 8012e28:	bd80      	pop	{r7, pc}
 8012e2a:	bf00      	nop
 8012e2c:	240032cc 	.word	0x240032cc

08012e30 <xTaskIncrementTick>:

#endif /* INCLUDE_xTaskAbortDelay */
/*----------------------------------------------------------*/

BaseType_t xTaskIncrementTick( void )
{
 8012e30:	b580      	push	{r7, lr}
 8012e32:	b086      	sub	sp, #24
 8012e34:	af00      	add	r7, sp, #0
TCB_t * pxTCB;
TickType_t xItemValue;
BaseType_t xSwitchRequired = pdFALSE;
 8012e36:	2300      	movs	r3, #0
 8012e38:	617b      	str	r3, [r7, #20]

	/* Called by the portable layer each time a tick interrupt occurs.
	Increments the tick then checks to see if the new tick value will cause any
	tasks to be unblocked. */
	traceTASK_INCREMENT_TICK( xTickCount );
	if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
 8012e3a:	4b4f      	ldr	r3, [pc, #316]	@ (8012f78 <xTaskIncrementTick+0x148>)
 8012e3c:	681b      	ldr	r3, [r3, #0]
 8012e3e:	2b00      	cmp	r3, #0
 8012e40:	f040 8090 	bne.w	8012f64 <xTaskIncrementTick+0x134>
	{
		/* Minor optimisation.  The tick count cannot change in this
		block. */
		const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
 8012e44:	4b4d      	ldr	r3, [pc, #308]	@ (8012f7c <xTaskIncrementTick+0x14c>)
 8012e46:	681b      	ldr	r3, [r3, #0]
 8012e48:	3301      	adds	r3, #1
 8012e4a:	613b      	str	r3, [r7, #16]

		/* Increment the RTOS tick, switching the delayed and overflowed
		delayed lists if it wraps to 0. */
		xTickCount = xConstTickCount;
 8012e4c:	4a4b      	ldr	r2, [pc, #300]	@ (8012f7c <xTaskIncrementTick+0x14c>)
 8012e4e:	693b      	ldr	r3, [r7, #16]
 8012e50:	6013      	str	r3, [r2, #0]

		if( xConstTickCount == ( TickType_t ) 0U ) /*lint !e774 'if' does not always evaluate to false as it is looking for an overflow. */
 8012e52:	693b      	ldr	r3, [r7, #16]
 8012e54:	2b00      	cmp	r3, #0
 8012e56:	d121      	bne.n	8012e9c <xTaskIncrementTick+0x6c>
		{
			taskSWITCH_DELAYED_LISTS();
 8012e58:	4b49      	ldr	r3, [pc, #292]	@ (8012f80 <xTaskIncrementTick+0x150>)
 8012e5a:	681b      	ldr	r3, [r3, #0]
 8012e5c:	681b      	ldr	r3, [r3, #0]
 8012e5e:	2b00      	cmp	r3, #0
 8012e60:	d00b      	beq.n	8012e7a <xTaskIncrementTick+0x4a>
	__asm volatile
 8012e62:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012e66:	f383 8811 	msr	BASEPRI, r3
 8012e6a:	f3bf 8f6f 	isb	sy
 8012e6e:	f3bf 8f4f 	dsb	sy
 8012e72:	603b      	str	r3, [r7, #0]
}
 8012e74:	bf00      	nop
 8012e76:	bf00      	nop
 8012e78:	e7fd      	b.n	8012e76 <xTaskIncrementTick+0x46>
 8012e7a:	4b41      	ldr	r3, [pc, #260]	@ (8012f80 <xTaskIncrementTick+0x150>)
 8012e7c:	681b      	ldr	r3, [r3, #0]
 8012e7e:	60fb      	str	r3, [r7, #12]
 8012e80:	4b40      	ldr	r3, [pc, #256]	@ (8012f84 <xTaskIncrementTick+0x154>)
 8012e82:	681b      	ldr	r3, [r3, #0]
 8012e84:	4a3e      	ldr	r2, [pc, #248]	@ (8012f80 <xTaskIncrementTick+0x150>)
 8012e86:	6013      	str	r3, [r2, #0]
 8012e88:	4a3e      	ldr	r2, [pc, #248]	@ (8012f84 <xTaskIncrementTick+0x154>)
 8012e8a:	68fb      	ldr	r3, [r7, #12]
 8012e8c:	6013      	str	r3, [r2, #0]
 8012e8e:	4b3e      	ldr	r3, [pc, #248]	@ (8012f88 <xTaskIncrementTick+0x158>)
 8012e90:	681b      	ldr	r3, [r3, #0]
 8012e92:	3301      	adds	r3, #1
 8012e94:	4a3c      	ldr	r2, [pc, #240]	@ (8012f88 <xTaskIncrementTick+0x158>)
 8012e96:	6013      	str	r3, [r2, #0]
 8012e98:	f000 fb18 	bl	80134cc <prvResetNextTaskUnblockTime>

		/* See if this tick has made a timeout expire.  Tasks are stored in
		the	queue in the order of their wake time - meaning once one task
		has been found whose block time has not expired there is no need to
		look any further down the list. */
		if( xConstTickCount >= xNextTaskUnblockTime )
 8012e9c:	4b3b      	ldr	r3, [pc, #236]	@ (8012f8c <xTaskIncrementTick+0x15c>)
 8012e9e:	681b      	ldr	r3, [r3, #0]
 8012ea0:	693a      	ldr	r2, [r7, #16]
 8012ea2:	429a      	cmp	r2, r3
 8012ea4:	d349      	bcc.n	8012f3a <xTaskIncrementTick+0x10a>
		{
			for( ;; )
			{
				if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )
 8012ea6:	4b36      	ldr	r3, [pc, #216]	@ (8012f80 <xTaskIncrementTick+0x150>)
 8012ea8:	681b      	ldr	r3, [r3, #0]
 8012eaa:	681b      	ldr	r3, [r3, #0]
 8012eac:	2b00      	cmp	r3, #0
 8012eae:	d104      	bne.n	8012eba <xTaskIncrementTick+0x8a>
					/* The delayed list is empty.  Set xNextTaskUnblockTime
					to the maximum possible value so it is extremely
					unlikely that the
					if( xTickCount >= xNextTaskUnblockTime ) test will pass
					next time through. */
					xNextTaskUnblockTime = portMAX_DELAY; /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
 8012eb0:	4b36      	ldr	r3, [pc, #216]	@ (8012f8c <xTaskIncrementTick+0x15c>)
 8012eb2:	f04f 32ff 	mov.w	r2, #4294967295	@ 0xffffffff
 8012eb6:	601a      	str	r2, [r3, #0]
					break;
 8012eb8:	e03f      	b.n	8012f3a <xTaskIncrementTick+0x10a>
				{
					/* The delayed list is not empty, get the value of the
					item at the head of the delayed list.  This is the time
					at which the task at the head of the delayed list must
					be removed from the Blocked state. */
					pxTCB = listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
 8012eba:	4b31      	ldr	r3, [pc, #196]	@ (8012f80 <xTaskIncrementTick+0x150>)
 8012ebc:	681b      	ldr	r3, [r3, #0]
 8012ebe:	68db      	ldr	r3, [r3, #12]
 8012ec0:	68db      	ldr	r3, [r3, #12]
 8012ec2:	60bb      	str	r3, [r7, #8]
					xItemValue = listGET_LIST_ITEM_VALUE( &( pxTCB->xStateListItem ) );
 8012ec4:	68bb      	ldr	r3, [r7, #8]
 8012ec6:	685b      	ldr	r3, [r3, #4]
 8012ec8:	607b      	str	r3, [r7, #4]

					if( xConstTickCount < xItemValue )
 8012eca:	693a      	ldr	r2, [r7, #16]
 8012ecc:	687b      	ldr	r3, [r7, #4]
 8012ece:	429a      	cmp	r2, r3
 8012ed0:	d203      	bcs.n	8012eda <xTaskIncrementTick+0xaa>
						/* It is not time to unblock this item yet, but the
						item value is the time at which the task at the head
						of the blocked list must be removed from the Blocked
						state -	so record the item value in
						xNextTaskUnblockTime. */
						xNextTaskUnblockTime = xItemValue;
 8012ed2:	4a2e      	ldr	r2, [pc, #184]	@ (8012f8c <xTaskIncrementTick+0x15c>)
 8012ed4:	687b      	ldr	r3, [r7, #4]
 8012ed6:	6013      	str	r3, [r2, #0]
						break; /*lint !e9011 Code structure here is deedmed easier to understand with multiple breaks. */
 8012ed8:	e02f      	b.n	8012f3a <xTaskIncrementTick+0x10a>
					{
						mtCOVERAGE_TEST_MARKER();
					}

					/* It is time to remove the item from the Blocked state. */
					( void ) uxListRemove( &( pxTCB->xStateListItem ) );
 8012eda:	68bb      	ldr	r3, [r7, #8]
 8012edc:	3304      	adds	r3, #4
 8012ede:	4618      	mov	r0, r3
 8012ee0:	f7fd ff90 	bl	8010e04 <uxListRemove>

					/* Is the task waiting on an event also?  If so remove
					it from the event list. */
					if( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) != NULL )
 8012ee4:	68bb      	ldr	r3, [r7, #8]
 8012ee6:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 8012ee8:	2b00      	cmp	r3, #0
 8012eea:	d004      	beq.n	8012ef6 <xTaskIncrementTick+0xc6>
					{
						( void ) uxListRemove( &( pxTCB->xEventListItem ) );
 8012eec:	68bb      	ldr	r3, [r7, #8]
 8012eee:	3318      	adds	r3, #24
 8012ef0:	4618      	mov	r0, r3
 8012ef2:	f7fd ff87 	bl	8010e04 <uxListRemove>
						mtCOVERAGE_TEST_MARKER();
					}

					/* Place the unblocked task into the appropriate ready
					list. */
					prvAddTaskToReadyList( pxTCB );
 8012ef6:	68bb      	ldr	r3, [r7, #8]
 8012ef8:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8012efa:	4b25      	ldr	r3, [pc, #148]	@ (8012f90 <xTaskIncrementTick+0x160>)
 8012efc:	681b      	ldr	r3, [r3, #0]
 8012efe:	429a      	cmp	r2, r3
 8012f00:	d903      	bls.n	8012f0a <xTaskIncrementTick+0xda>
 8012f02:	68bb      	ldr	r3, [r7, #8]
 8012f04:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8012f06:	4a22      	ldr	r2, [pc, #136]	@ (8012f90 <xTaskIncrementTick+0x160>)
 8012f08:	6013      	str	r3, [r2, #0]
 8012f0a:	68bb      	ldr	r3, [r7, #8]
 8012f0c:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8012f0e:	4613      	mov	r3, r2
 8012f10:	009b      	lsls	r3, r3, #2
 8012f12:	4413      	add	r3, r2
 8012f14:	009b      	lsls	r3, r3, #2
 8012f16:	4a1f      	ldr	r2, [pc, #124]	@ (8012f94 <xTaskIncrementTick+0x164>)
 8012f18:	441a      	add	r2, r3
 8012f1a:	68bb      	ldr	r3, [r7, #8]
 8012f1c:	3304      	adds	r3, #4
 8012f1e:	4619      	mov	r1, r3
 8012f20:	4610      	mov	r0, r2
 8012f22:	f7fd ff12 	bl	8010d4a <vListInsertEnd>
					{
						/* Preemption is on, but a context switch should
						only be performed if the unblocked task has a
						priority that is equal to or higher than the
						currently executing task. */
						if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority )
 8012f26:	68bb      	ldr	r3, [r7, #8]
 8012f28:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8012f2a:	4b1b      	ldr	r3, [pc, #108]	@ (8012f98 <xTaskIncrementTick+0x168>)
 8012f2c:	681b      	ldr	r3, [r3, #0]
 8012f2e:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8012f30:	429a      	cmp	r2, r3
 8012f32:	d3b8      	bcc.n	8012ea6 <xTaskIncrementTick+0x76>
						{
							xSwitchRequired = pdTRUE;
 8012f34:	2301      	movs	r3, #1
 8012f36:	617b      	str	r3, [r7, #20]
				if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )
 8012f38:	e7b5      	b.n	8012ea6 <xTaskIncrementTick+0x76>
		/* Tasks of equal priority to the currently running task will share
		processing time (time slice) if preemption is on, and the application
		writer has not explicitly turned time slicing off. */
		#if ( ( configUSE_PREEMPTION == 1 ) && ( configUSE_TIME_SLICING == 1 ) )
		{
			if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ pxCurrentTCB->uxPriority ] ) ) > ( UBaseType_t ) 1 )
 8012f3a:	4b17      	ldr	r3, [pc, #92]	@ (8012f98 <xTaskIncrementTick+0x168>)
 8012f3c:	681b      	ldr	r3, [r3, #0]
 8012f3e:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8012f40:	4914      	ldr	r1, [pc, #80]	@ (8012f94 <xTaskIncrementTick+0x164>)
 8012f42:	4613      	mov	r3, r2
 8012f44:	009b      	lsls	r3, r3, #2
 8012f46:	4413      	add	r3, r2
 8012f48:	009b      	lsls	r3, r3, #2
 8012f4a:	440b      	add	r3, r1
 8012f4c:	681b      	ldr	r3, [r3, #0]
 8012f4e:	2b01      	cmp	r3, #1
 8012f50:	d901      	bls.n	8012f56 <xTaskIncrementTick+0x126>
			{
				xSwitchRequired = pdTRUE;
 8012f52:	2301      	movs	r3, #1
 8012f54:	617b      	str	r3, [r7, #20]
		}
		#endif /* configUSE_TICK_HOOK */

		#if ( configUSE_PREEMPTION == 1 )
		{
			if( xYieldPending != pdFALSE )
 8012f56:	4b11      	ldr	r3, [pc, #68]	@ (8012f9c <xTaskIncrementTick+0x16c>)
 8012f58:	681b      	ldr	r3, [r3, #0]
 8012f5a:	2b00      	cmp	r3, #0
 8012f5c:	d007      	beq.n	8012f6e <xTaskIncrementTick+0x13e>
			{
				xSwitchRequired = pdTRUE;
 8012f5e:	2301      	movs	r3, #1
 8012f60:	617b      	str	r3, [r7, #20]
 8012f62:	e004      	b.n	8012f6e <xTaskIncrementTick+0x13e>
		}
		#endif /* configUSE_PREEMPTION */
	}
	else
	{
		++xPendedTicks;
 8012f64:	4b0e      	ldr	r3, [pc, #56]	@ (8012fa0 <xTaskIncrementTick+0x170>)
 8012f66:	681b      	ldr	r3, [r3, #0]
 8012f68:	3301      	adds	r3, #1
 8012f6a:	4a0d      	ldr	r2, [pc, #52]	@ (8012fa0 <xTaskIncrementTick+0x170>)
 8012f6c:	6013      	str	r3, [r2, #0]
			vApplicationTickHook();
		}
		#endif
	}

	return xSwitchRequired;
 8012f6e:	697b      	ldr	r3, [r7, #20]
}
 8012f70:	4618      	mov	r0, r3
 8012f72:	3718      	adds	r7, #24
 8012f74:	46bd      	mov	sp, r7
 8012f76:	bd80      	pop	{r7, pc}
 8012f78:	240032f0 	.word	0x240032f0
 8012f7c:	240032cc 	.word	0x240032cc
 8012f80:	24003280 	.word	0x24003280
 8012f84:	24003284 	.word	0x24003284
 8012f88:	240032e0 	.word	0x240032e0
 8012f8c:	240032e8 	.word	0x240032e8
 8012f90:	240032d0 	.word	0x240032d0
 8012f94:	24002df8 	.word	0x24002df8
 8012f98:	24002df4 	.word	0x24002df4
 8012f9c:	240032dc 	.word	0x240032dc
 8012fa0:	240032d8 	.word	0x240032d8

08012fa4 <vTaskSwitchContext>:

#endif /* configUSE_APPLICATION_TASK_TAG */
/*-----------------------------------------------------------*/

void vTaskSwitchContext( void )
{
 8012fa4:	b580      	push	{r7, lr}
 8012fa6:	b084      	sub	sp, #16
 8012fa8:	af00      	add	r7, sp, #0
	if( uxSchedulerSuspended != ( UBaseType_t ) pdFALSE )
 8012faa:	4b32      	ldr	r3, [pc, #200]	@ (8013074 <vTaskSwitchContext+0xd0>)
 8012fac:	681b      	ldr	r3, [r3, #0]
 8012fae:	2b00      	cmp	r3, #0
 8012fb0:	d003      	beq.n	8012fba <vTaskSwitchContext+0x16>
	{
		/* The scheduler is currently suspended - do not allow a context
		switch. */
		xYieldPending = pdTRUE;
 8012fb2:	4b31      	ldr	r3, [pc, #196]	@ (8013078 <vTaskSwitchContext+0xd4>)
 8012fb4:	2201      	movs	r2, #1
 8012fb6:	601a      	str	r2, [r3, #0]
			for additional information. */
			_impure_ptr = &( pxCurrentTCB->xNewLib_reent );
		}
		#endif /* configUSE_NEWLIB_REENTRANT */
	}
}
 8012fb8:	e058      	b.n	801306c <vTaskSwitchContext+0xc8>
		xYieldPending = pdFALSE;
 8012fba:	4b2f      	ldr	r3, [pc, #188]	@ (8013078 <vTaskSwitchContext+0xd4>)
 8012fbc:	2200      	movs	r2, #0
 8012fbe:	601a      	str	r2, [r3, #0]
		taskCHECK_FOR_STACK_OVERFLOW();
 8012fc0:	4b2e      	ldr	r3, [pc, #184]	@ (801307c <vTaskSwitchContext+0xd8>)
 8012fc2:	681b      	ldr	r3, [r3, #0]
 8012fc4:	681a      	ldr	r2, [r3, #0]
 8012fc6:	4b2d      	ldr	r3, [pc, #180]	@ (801307c <vTaskSwitchContext+0xd8>)
 8012fc8:	681b      	ldr	r3, [r3, #0]
 8012fca:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8012fcc:	429a      	cmp	r2, r3
 8012fce:	d808      	bhi.n	8012fe2 <vTaskSwitchContext+0x3e>
 8012fd0:	4b2a      	ldr	r3, [pc, #168]	@ (801307c <vTaskSwitchContext+0xd8>)
 8012fd2:	681a      	ldr	r2, [r3, #0]
 8012fd4:	4b29      	ldr	r3, [pc, #164]	@ (801307c <vTaskSwitchContext+0xd8>)
 8012fd6:	681b      	ldr	r3, [r3, #0]
 8012fd8:	3334      	adds	r3, #52	@ 0x34
 8012fda:	4619      	mov	r1, r3
 8012fdc:	4610      	mov	r0, r2
 8012fde:	f7ee fe60 	bl	8001ca2 <vApplicationStackOverflowHook>
		taskSELECT_HIGHEST_PRIORITY_TASK(); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
 8012fe2:	4b27      	ldr	r3, [pc, #156]	@ (8013080 <vTaskSwitchContext+0xdc>)
 8012fe4:	681b      	ldr	r3, [r3, #0]
 8012fe6:	60fb      	str	r3, [r7, #12]
 8012fe8:	e011      	b.n	801300e <vTaskSwitchContext+0x6a>
 8012fea:	68fb      	ldr	r3, [r7, #12]
 8012fec:	2b00      	cmp	r3, #0
 8012fee:	d10b      	bne.n	8013008 <vTaskSwitchContext+0x64>
	__asm volatile
 8012ff0:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012ff4:	f383 8811 	msr	BASEPRI, r3
 8012ff8:	f3bf 8f6f 	isb	sy
 8012ffc:	f3bf 8f4f 	dsb	sy
 8013000:	607b      	str	r3, [r7, #4]
}
 8013002:	bf00      	nop
 8013004:	bf00      	nop
 8013006:	e7fd      	b.n	8013004 <vTaskSwitchContext+0x60>
 8013008:	68fb      	ldr	r3, [r7, #12]
 801300a:	3b01      	subs	r3, #1
 801300c:	60fb      	str	r3, [r7, #12]
 801300e:	491d      	ldr	r1, [pc, #116]	@ (8013084 <vTaskSwitchContext+0xe0>)
 8013010:	68fa      	ldr	r2, [r7, #12]
 8013012:	4613      	mov	r3, r2
 8013014:	009b      	lsls	r3, r3, #2
 8013016:	4413      	add	r3, r2
 8013018:	009b      	lsls	r3, r3, #2
 801301a:	440b      	add	r3, r1
 801301c:	681b      	ldr	r3, [r3, #0]
 801301e:	2b00      	cmp	r3, #0
 8013020:	d0e3      	beq.n	8012fea <vTaskSwitchContext+0x46>
 8013022:	68fa      	ldr	r2, [r7, #12]
 8013024:	4613      	mov	r3, r2
 8013026:	009b      	lsls	r3, r3, #2
 8013028:	4413      	add	r3, r2
 801302a:	009b      	lsls	r3, r3, #2
 801302c:	4a15      	ldr	r2, [pc, #84]	@ (8013084 <vTaskSwitchContext+0xe0>)
 801302e:	4413      	add	r3, r2
 8013030:	60bb      	str	r3, [r7, #8]
 8013032:	68bb      	ldr	r3, [r7, #8]
 8013034:	685b      	ldr	r3, [r3, #4]
 8013036:	685a      	ldr	r2, [r3, #4]
 8013038:	68bb      	ldr	r3, [r7, #8]
 801303a:	605a      	str	r2, [r3, #4]
 801303c:	68bb      	ldr	r3, [r7, #8]
 801303e:	685a      	ldr	r2, [r3, #4]
 8013040:	68bb      	ldr	r3, [r7, #8]
 8013042:	3308      	adds	r3, #8
 8013044:	429a      	cmp	r2, r3
 8013046:	d104      	bne.n	8013052 <vTaskSwitchContext+0xae>
 8013048:	68bb      	ldr	r3, [r7, #8]
 801304a:	685b      	ldr	r3, [r3, #4]
 801304c:	685a      	ldr	r2, [r3, #4]
 801304e:	68bb      	ldr	r3, [r7, #8]
 8013050:	605a      	str	r2, [r3, #4]
 8013052:	68bb      	ldr	r3, [r7, #8]
 8013054:	685b      	ldr	r3, [r3, #4]
 8013056:	68db      	ldr	r3, [r3, #12]
 8013058:	4a08      	ldr	r2, [pc, #32]	@ (801307c <vTaskSwitchContext+0xd8>)
 801305a:	6013      	str	r3, [r2, #0]
 801305c:	4a08      	ldr	r2, [pc, #32]	@ (8013080 <vTaskSwitchContext+0xdc>)
 801305e:	68fb      	ldr	r3, [r7, #12]
 8013060:	6013      	str	r3, [r2, #0]
			_impure_ptr = &( pxCurrentTCB->xNewLib_reent );
 8013062:	4b06      	ldr	r3, [pc, #24]	@ (801307c <vTaskSwitchContext+0xd8>)
 8013064:	681b      	ldr	r3, [r3, #0]
 8013066:	3354      	adds	r3, #84	@ 0x54
 8013068:	4a07      	ldr	r2, [pc, #28]	@ (8013088 <vTaskSwitchContext+0xe4>)
 801306a:	6013      	str	r3, [r2, #0]
}
 801306c:	bf00      	nop
 801306e:	3710      	adds	r7, #16
 8013070:	46bd      	mov	sp, r7
 8013072:	bd80      	pop	{r7, pc}
 8013074:	240032f0 	.word	0x240032f0
 8013078:	240032dc 	.word	0x240032dc
 801307c:	24002df4 	.word	0x24002df4
 8013080:	240032d0 	.word	0x240032d0
 8013084:	24002df8 	.word	0x24002df8
 8013088:	240001c0 	.word	0x240001c0

0801308c <vTaskPlaceOnEventList>:
/*-----------------------------------------------------------*/

void vTaskPlaceOnEventList( List_t * const pxEventList, const TickType_t xTicksToWait )
{
 801308c:	b580      	push	{r7, lr}
 801308e:	b084      	sub	sp, #16
 8013090:	af00      	add	r7, sp, #0
 8013092:	6078      	str	r0, [r7, #4]
 8013094:	6039      	str	r1, [r7, #0]
	configASSERT( pxEventList );
 8013096:	687b      	ldr	r3, [r7, #4]
 8013098:	2b00      	cmp	r3, #0
 801309a:	d10b      	bne.n	80130b4 <vTaskPlaceOnEventList+0x28>
	__asm volatile
 801309c:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80130a0:	f383 8811 	msr	BASEPRI, r3
 80130a4:	f3bf 8f6f 	isb	sy
 80130a8:	f3bf 8f4f 	dsb	sy
 80130ac:	60fb      	str	r3, [r7, #12]
}
 80130ae:	bf00      	nop
 80130b0:	bf00      	nop
 80130b2:	e7fd      	b.n	80130b0 <vTaskPlaceOnEventList+0x24>

	/* Place the event list item of the TCB in the appropriate event list.
	This is placed in the list in priority order so the highest priority task
	is the first to be woken by the event.  The queue that contains the event
	list is locked, preventing simultaneous access from interrupts. */
	vListInsert( pxEventList, &( pxCurrentTCB->xEventListItem ) );
 80130b4:	4b07      	ldr	r3, [pc, #28]	@ (80130d4 <vTaskPlaceOnEventList+0x48>)
 80130b6:	681b      	ldr	r3, [r3, #0]
 80130b8:	3318      	adds	r3, #24
 80130ba:	4619      	mov	r1, r3
 80130bc:	6878      	ldr	r0, [r7, #4]
 80130be:	f7fd fe68 	bl	8010d92 <vListInsert>

	prvAddCurrentTaskToDelayedList( xTicksToWait, pdTRUE );
 80130c2:	2101      	movs	r1, #1
 80130c4:	6838      	ldr	r0, [r7, #0]
 80130c6:	f000 fded 	bl	8013ca4 <prvAddCurrentTaskToDelayedList>
}
 80130ca:	bf00      	nop
 80130cc:	3710      	adds	r7, #16
 80130ce:	46bd      	mov	sp, r7
 80130d0:	bd80      	pop	{r7, pc}
 80130d2:	bf00      	nop
 80130d4:	24002df4 	.word	0x24002df4

080130d8 <vTaskPlaceOnEventListRestricted>:
/*-----------------------------------------------------------*/

#if( configUSE_TIMERS == 1 )

	void vTaskPlaceOnEventListRestricted( List_t * const pxEventList, TickType_t xTicksToWait, const BaseType_t xWaitIndefinitely )
	{
 80130d8:	b580      	push	{r7, lr}
 80130da:	b086      	sub	sp, #24
 80130dc:	af00      	add	r7, sp, #0
 80130de:	60f8      	str	r0, [r7, #12]
 80130e0:	60b9      	str	r1, [r7, #8]
 80130e2:	607a      	str	r2, [r7, #4]
		configASSERT( pxEventList );
 80130e4:	68fb      	ldr	r3, [r7, #12]
 80130e6:	2b00      	cmp	r3, #0
 80130e8:	d10b      	bne.n	8013102 <vTaskPlaceOnEventListRestricted+0x2a>
	__asm volatile
 80130ea:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80130ee:	f383 8811 	msr	BASEPRI, r3
 80130f2:	f3bf 8f6f 	isb	sy
 80130f6:	f3bf 8f4f 	dsb	sy
 80130fa:	617b      	str	r3, [r7, #20]
}
 80130fc:	bf00      	nop
 80130fe:	bf00      	nop
 8013100:	e7fd      	b.n	80130fe <vTaskPlaceOnEventListRestricted+0x26>

		/* Place the event list item of the TCB in the appropriate event list.
		In this case it is assume that this is the only task that is going to
		be waiting on this event list, so the faster vListInsertEnd() function
		can be used in place of vListInsert. */
		vListInsertEnd( pxEventList, &( pxCurrentTCB->xEventListItem ) );
 8013102:	4b0a      	ldr	r3, [pc, #40]	@ (801312c <vTaskPlaceOnEventListRestricted+0x54>)
 8013104:	681b      	ldr	r3, [r3, #0]
 8013106:	3318      	adds	r3, #24
 8013108:	4619      	mov	r1, r3
 801310a:	68f8      	ldr	r0, [r7, #12]
 801310c:	f7fd fe1d 	bl	8010d4a <vListInsertEnd>

		/* If the task should block indefinitely then set the block time to a
		value that will be recognised as an indefinite delay inside the
		prvAddCurrentTaskToDelayedList() function. */
		if( xWaitIndefinitely != pdFALSE )
 8013110:	687b      	ldr	r3, [r7, #4]
 8013112:	2b00      	cmp	r3, #0
 8013114:	d002      	beq.n	801311c <vTaskPlaceOnEventListRestricted+0x44>
		{
			xTicksToWait = portMAX_DELAY;
 8013116:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 801311a:	60bb      	str	r3, [r7, #8]
		}

		traceTASK_DELAY_UNTIL( ( xTickCount + xTicksToWait ) );
		prvAddCurrentTaskToDelayedList( xTicksToWait, xWaitIndefinitely );
 801311c:	6879      	ldr	r1, [r7, #4]
 801311e:	68b8      	ldr	r0, [r7, #8]
 8013120:	f000 fdc0 	bl	8013ca4 <prvAddCurrentTaskToDelayedList>
	}
 8013124:	bf00      	nop
 8013126:	3718      	adds	r7, #24
 8013128:	46bd      	mov	sp, r7
 801312a:	bd80      	pop	{r7, pc}
 801312c:	24002df4 	.word	0x24002df4

08013130 <xTaskRemoveFromEventList>:

#endif /* configUSE_TIMERS */
/*-----------------------------------------------------------*/

BaseType_t xTaskRemoveFromEventList( const List_t * const pxEventList )
{
 8013130:	b580      	push	{r7, lr}
 8013132:	b086      	sub	sp, #24
 8013134:	af00      	add	r7, sp, #0
 8013136:	6078      	str	r0, [r7, #4]
	get called - the lock count on the queue will get modified instead.  This
	means exclusive access to the event list is guaranteed here.

	This function assumes that a check has already been made to ensure that
	pxEventList is not empty. */
	pxUnblockedTCB = listGET_OWNER_OF_HEAD_ENTRY( pxEventList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
 8013138:	687b      	ldr	r3, [r7, #4]
 801313a:	68db      	ldr	r3, [r3, #12]
 801313c:	68db      	ldr	r3, [r3, #12]
 801313e:	613b      	str	r3, [r7, #16]
	configASSERT( pxUnblockedTCB );
 8013140:	693b      	ldr	r3, [r7, #16]
 8013142:	2b00      	cmp	r3, #0
 8013144:	d10b      	bne.n	801315e <xTaskRemoveFromEventList+0x2e>
	__asm volatile
 8013146:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801314a:	f383 8811 	msr	BASEPRI, r3
 801314e:	f3bf 8f6f 	isb	sy
 8013152:	f3bf 8f4f 	dsb	sy
 8013156:	60fb      	str	r3, [r7, #12]
}
 8013158:	bf00      	nop
 801315a:	bf00      	nop
 801315c:	e7fd      	b.n	801315a <xTaskRemoveFromEventList+0x2a>
	( void ) uxListRemove( &( pxUnblockedTCB->xEventListItem ) );
 801315e:	693b      	ldr	r3, [r7, #16]
 8013160:	3318      	adds	r3, #24
 8013162:	4618      	mov	r0, r3
 8013164:	f7fd fe4e 	bl	8010e04 <uxListRemove>

	if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
 8013168:	4b1d      	ldr	r3, [pc, #116]	@ (80131e0 <xTaskRemoveFromEventList+0xb0>)
 801316a:	681b      	ldr	r3, [r3, #0]
 801316c:	2b00      	cmp	r3, #0
 801316e:	d11d      	bne.n	80131ac <xTaskRemoveFromEventList+0x7c>
	{
		( void ) uxListRemove( &( pxUnblockedTCB->xStateListItem ) );
 8013170:	693b      	ldr	r3, [r7, #16]
 8013172:	3304      	adds	r3, #4
 8013174:	4618      	mov	r0, r3
 8013176:	f7fd fe45 	bl	8010e04 <uxListRemove>
		prvAddTaskToReadyList( pxUnblockedTCB );
 801317a:	693b      	ldr	r3, [r7, #16]
 801317c:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 801317e:	4b19      	ldr	r3, [pc, #100]	@ (80131e4 <xTaskRemoveFromEventList+0xb4>)
 8013180:	681b      	ldr	r3, [r3, #0]
 8013182:	429a      	cmp	r2, r3
 8013184:	d903      	bls.n	801318e <xTaskRemoveFromEventList+0x5e>
 8013186:	693b      	ldr	r3, [r7, #16]
 8013188:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 801318a:	4a16      	ldr	r2, [pc, #88]	@ (80131e4 <xTaskRemoveFromEventList+0xb4>)
 801318c:	6013      	str	r3, [r2, #0]
 801318e:	693b      	ldr	r3, [r7, #16]
 8013190:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8013192:	4613      	mov	r3, r2
 8013194:	009b      	lsls	r3, r3, #2
 8013196:	4413      	add	r3, r2
 8013198:	009b      	lsls	r3, r3, #2
 801319a:	4a13      	ldr	r2, [pc, #76]	@ (80131e8 <xTaskRemoveFromEventList+0xb8>)
 801319c:	441a      	add	r2, r3
 801319e:	693b      	ldr	r3, [r7, #16]
 80131a0:	3304      	adds	r3, #4
 80131a2:	4619      	mov	r1, r3
 80131a4:	4610      	mov	r0, r2
 80131a6:	f7fd fdd0 	bl	8010d4a <vListInsertEnd>
 80131aa:	e005      	b.n	80131b8 <xTaskRemoveFromEventList+0x88>
	}
	else
	{
		/* The delayed and ready lists cannot be accessed, so hold this task
		pending until the scheduler is resumed. */
		vListInsertEnd( &( xPendingReadyList ), &( pxUnblockedTCB->xEventListItem ) );
 80131ac:	693b      	ldr	r3, [r7, #16]
 80131ae:	3318      	adds	r3, #24
 80131b0:	4619      	mov	r1, r3
 80131b2:	480e      	ldr	r0, [pc, #56]	@ (80131ec <xTaskRemoveFromEventList+0xbc>)
 80131b4:	f7fd fdc9 	bl	8010d4a <vListInsertEnd>
	}

	if( pxUnblockedTCB->uxPriority > pxCurrentTCB->uxPriority )
 80131b8:	693b      	ldr	r3, [r7, #16]
 80131ba:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 80131bc:	4b0c      	ldr	r3, [pc, #48]	@ (80131f0 <xTaskRemoveFromEventList+0xc0>)
 80131be:	681b      	ldr	r3, [r3, #0]
 80131c0:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80131c2:	429a      	cmp	r2, r3
 80131c4:	d905      	bls.n	80131d2 <xTaskRemoveFromEventList+0xa2>
	{
		/* Return true if the task removed from the event list has a higher
		priority than the calling task.  This allows the calling task to know if
		it should force a context switch now. */
		xReturn = pdTRUE;
 80131c6:	2301      	movs	r3, #1
 80131c8:	617b      	str	r3, [r7, #20]

		/* Mark that a yield is pending in case the user is not using the
		"xHigherPriorityTaskWoken" parameter to an ISR safe FreeRTOS function. */
		xYieldPending = pdTRUE;
 80131ca:	4b0a      	ldr	r3, [pc, #40]	@ (80131f4 <xTaskRemoveFromEventList+0xc4>)
 80131cc:	2201      	movs	r2, #1
 80131ce:	601a      	str	r2, [r3, #0]
 80131d0:	e001      	b.n	80131d6 <xTaskRemoveFromEventList+0xa6>
	}
	else
	{
		xReturn = pdFALSE;
 80131d2:	2300      	movs	r3, #0
 80131d4:	617b      	str	r3, [r7, #20]
	}

	return xReturn;
 80131d6:	697b      	ldr	r3, [r7, #20]
}
 80131d8:	4618      	mov	r0, r3
 80131da:	3718      	adds	r7, #24
 80131dc:	46bd      	mov	sp, r7
 80131de:	bd80      	pop	{r7, pc}
 80131e0:	240032f0 	.word	0x240032f0
 80131e4:	240032d0 	.word	0x240032d0
 80131e8:	24002df8 	.word	0x24002df8
 80131ec:	24003288 	.word	0x24003288
 80131f0:	24002df4 	.word	0x24002df4
 80131f4:	240032dc 	.word	0x240032dc

080131f8 <vTaskSetTimeOutState>:
	}
}
/*-----------------------------------------------------------*/

void vTaskSetTimeOutState( TimeOut_t * const pxTimeOut )
{
 80131f8:	b580      	push	{r7, lr}
 80131fa:	b084      	sub	sp, #16
 80131fc:	af00      	add	r7, sp, #0
 80131fe:	6078      	str	r0, [r7, #4]
	configASSERT( pxTimeOut );
 8013200:	687b      	ldr	r3, [r7, #4]
 8013202:	2b00      	cmp	r3, #0
 8013204:	d10b      	bne.n	801321e <vTaskSetTimeOutState+0x26>
	__asm volatile
 8013206:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801320a:	f383 8811 	msr	BASEPRI, r3
 801320e:	f3bf 8f6f 	isb	sy
 8013212:	f3bf 8f4f 	dsb	sy
 8013216:	60fb      	str	r3, [r7, #12]
}
 8013218:	bf00      	nop
 801321a:	bf00      	nop
 801321c:	e7fd      	b.n	801321a <vTaskSetTimeOutState+0x22>
	taskENTER_CRITICAL();
 801321e:	f001 fa23 	bl	8014668 <vPortEnterCritical>
	{
		pxTimeOut->xOverflowCount = xNumOfOverflows;
 8013222:	4b07      	ldr	r3, [pc, #28]	@ (8013240 <vTaskSetTimeOutState+0x48>)
 8013224:	681a      	ldr	r2, [r3, #0]
 8013226:	687b      	ldr	r3, [r7, #4]
 8013228:	601a      	str	r2, [r3, #0]
		pxTimeOut->xTimeOnEntering = xTickCount;
 801322a:	4b06      	ldr	r3, [pc, #24]	@ (8013244 <vTaskSetTimeOutState+0x4c>)
 801322c:	681a      	ldr	r2, [r3, #0]
 801322e:	687b      	ldr	r3, [r7, #4]
 8013230:	605a      	str	r2, [r3, #4]
	}
	taskEXIT_CRITICAL();
 8013232:	f001 fa4b 	bl	80146cc <vPortExitCritical>
}
 8013236:	bf00      	nop
 8013238:	3710      	adds	r7, #16
 801323a:	46bd      	mov	sp, r7
 801323c:	bd80      	pop	{r7, pc}
 801323e:	bf00      	nop
 8013240:	240032e0 	.word	0x240032e0
 8013244:	240032cc 	.word	0x240032cc

08013248 <vTaskInternalSetTimeOutState>:
/*-----------------------------------------------------------*/

void vTaskInternalSetTimeOutState( TimeOut_t * const pxTimeOut )
{
 8013248:	b480      	push	{r7}
 801324a:	b083      	sub	sp, #12
 801324c:	af00      	add	r7, sp, #0
 801324e:	6078      	str	r0, [r7, #4]
	/* For internal use only as it does not use a critical section. */
	pxTimeOut->xOverflowCount = xNumOfOverflows;
 8013250:	4b06      	ldr	r3, [pc, #24]	@ (801326c <vTaskInternalSetTimeOutState+0x24>)
 8013252:	681a      	ldr	r2, [r3, #0]
 8013254:	687b      	ldr	r3, [r7, #4]
 8013256:	601a      	str	r2, [r3, #0]
	pxTimeOut->xTimeOnEntering = xTickCount;
 8013258:	4b05      	ldr	r3, [pc, #20]	@ (8013270 <vTaskInternalSetTimeOutState+0x28>)
 801325a:	681a      	ldr	r2, [r3, #0]
 801325c:	687b      	ldr	r3, [r7, #4]
 801325e:	605a      	str	r2, [r3, #4]
}
 8013260:	bf00      	nop
 8013262:	370c      	adds	r7, #12
 8013264:	46bd      	mov	sp, r7
 8013266:	f85d 7b04 	ldr.w	r7, [sp], #4
 801326a:	4770      	bx	lr
 801326c:	240032e0 	.word	0x240032e0
 8013270:	240032cc 	.word	0x240032cc

08013274 <xTaskCheckForTimeOut>:
/*-----------------------------------------------------------*/

BaseType_t xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, TickType_t * const pxTicksToWait )
{
 8013274:	b580      	push	{r7, lr}
 8013276:	b088      	sub	sp, #32
 8013278:	af00      	add	r7, sp, #0
 801327a:	6078      	str	r0, [r7, #4]
 801327c:	6039      	str	r1, [r7, #0]
BaseType_t xReturn;

	configASSERT( pxTimeOut );
 801327e:	687b      	ldr	r3, [r7, #4]
 8013280:	2b00      	cmp	r3, #0
 8013282:	d10b      	bne.n	801329c <xTaskCheckForTimeOut+0x28>
	__asm volatile
 8013284:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8013288:	f383 8811 	msr	BASEPRI, r3
 801328c:	f3bf 8f6f 	isb	sy
 8013290:	f3bf 8f4f 	dsb	sy
 8013294:	613b      	str	r3, [r7, #16]
}
 8013296:	bf00      	nop
 8013298:	bf00      	nop
 801329a:	e7fd      	b.n	8013298 <xTaskCheckForTimeOut+0x24>
	configASSERT( pxTicksToWait );
 801329c:	683b      	ldr	r3, [r7, #0]
 801329e:	2b00      	cmp	r3, #0
 80132a0:	d10b      	bne.n	80132ba <xTaskCheckForTimeOut+0x46>
	__asm volatile
 80132a2:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80132a6:	f383 8811 	msr	BASEPRI, r3
 80132aa:	f3bf 8f6f 	isb	sy
 80132ae:	f3bf 8f4f 	dsb	sy
 80132b2:	60fb      	str	r3, [r7, #12]
}
 80132b4:	bf00      	nop
 80132b6:	bf00      	nop
 80132b8:	e7fd      	b.n	80132b6 <xTaskCheckForTimeOut+0x42>

	taskENTER_CRITICAL();
 80132ba:	f001 f9d5 	bl	8014668 <vPortEnterCritical>
	{
		/* Minor optimisation.  The tick count cannot change in this block. */
		const TickType_t xConstTickCount = xTickCount;
 80132be:	4b1d      	ldr	r3, [pc, #116]	@ (8013334 <xTaskCheckForTimeOut+0xc0>)
 80132c0:	681b      	ldr	r3, [r3, #0]
 80132c2:	61bb      	str	r3, [r7, #24]
		const TickType_t xElapsedTime = xConstTickCount - pxTimeOut->xTimeOnEntering;
 80132c4:	687b      	ldr	r3, [r7, #4]
 80132c6:	685b      	ldr	r3, [r3, #4]
 80132c8:	69ba      	ldr	r2, [r7, #24]
 80132ca:	1ad3      	subs	r3, r2, r3
 80132cc:	617b      	str	r3, [r7, #20]
			}
			else
		#endif

		#if ( INCLUDE_vTaskSuspend == 1 )
			if( *pxTicksToWait == portMAX_DELAY )
 80132ce:	683b      	ldr	r3, [r7, #0]
 80132d0:	681b      	ldr	r3, [r3, #0]
 80132d2:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 80132d6:	d102      	bne.n	80132de <xTaskCheckForTimeOut+0x6a>
			{
				/* If INCLUDE_vTaskSuspend is set to 1 and the block time
				specified is the maximum block time then the task should block
				indefinitely, and therefore never time out. */
				xReturn = pdFALSE;
 80132d8:	2300      	movs	r3, #0
 80132da:	61fb      	str	r3, [r7, #28]
 80132dc:	e023      	b.n	8013326 <xTaskCheckForTimeOut+0xb2>
			}
			else
		#endif

		if( ( xNumOfOverflows != pxTimeOut->xOverflowCount ) && ( xConstTickCount >= pxTimeOut->xTimeOnEntering ) ) /*lint !e525 Indentation preferred as is to make code within pre-processor directives clearer. */
 80132de:	687b      	ldr	r3, [r7, #4]
 80132e0:	681a      	ldr	r2, [r3, #0]
 80132e2:	4b15      	ldr	r3, [pc, #84]	@ (8013338 <xTaskCheckForTimeOut+0xc4>)
 80132e4:	681b      	ldr	r3, [r3, #0]
 80132e6:	429a      	cmp	r2, r3
 80132e8:	d007      	beq.n	80132fa <xTaskCheckForTimeOut+0x86>
 80132ea:	687b      	ldr	r3, [r7, #4]
 80132ec:	685b      	ldr	r3, [r3, #4]
 80132ee:	69ba      	ldr	r2, [r7, #24]
 80132f0:	429a      	cmp	r2, r3
 80132f2:	d302      	bcc.n	80132fa <xTaskCheckForTimeOut+0x86>
			/* The tick count is greater than the time at which
			vTaskSetTimeout() was called, but has also overflowed since
			vTaskSetTimeOut() was called.  It must have wrapped all the way
			around and gone past again. This passed since vTaskSetTimeout()
			was called. */
			xReturn = pdTRUE;
 80132f4:	2301      	movs	r3, #1
 80132f6:	61fb      	str	r3, [r7, #28]
 80132f8:	e015      	b.n	8013326 <xTaskCheckForTimeOut+0xb2>
		}
		else if( xElapsedTime < *pxTicksToWait ) /*lint !e961 Explicit casting is only redundant with some compilers, whereas others require it to prevent integer conversion errors. */
 80132fa:	683b      	ldr	r3, [r7, #0]
 80132fc:	681b      	ldr	r3, [r3, #0]
 80132fe:	697a      	ldr	r2, [r7, #20]
 8013300:	429a      	cmp	r2, r3
 8013302:	d20b      	bcs.n	801331c <xTaskCheckForTimeOut+0xa8>
		{
			/* Not a genuine timeout. Adjust parameters for time remaining. */
			*pxTicksToWait -= xElapsedTime;
 8013304:	683b      	ldr	r3, [r7, #0]
 8013306:	681a      	ldr	r2, [r3, #0]
 8013308:	697b      	ldr	r3, [r7, #20]
 801330a:	1ad2      	subs	r2, r2, r3
 801330c:	683b      	ldr	r3, [r7, #0]
 801330e:	601a      	str	r2, [r3, #0]
			vTaskInternalSetTimeOutState( pxTimeOut );
 8013310:	6878      	ldr	r0, [r7, #4]
 8013312:	f7ff ff99 	bl	8013248 <vTaskInternalSetTimeOutState>
			xReturn = pdFALSE;
 8013316:	2300      	movs	r3, #0
 8013318:	61fb      	str	r3, [r7, #28]
 801331a:	e004      	b.n	8013326 <xTaskCheckForTimeOut+0xb2>
		}
		else
		{
			*pxTicksToWait = 0;
 801331c:	683b      	ldr	r3, [r7, #0]
 801331e:	2200      	movs	r2, #0
 8013320:	601a      	str	r2, [r3, #0]
			xReturn = pdTRUE;
 8013322:	2301      	movs	r3, #1
 8013324:	61fb      	str	r3, [r7, #28]
		}
	}
	taskEXIT_CRITICAL();
 8013326:	f001 f9d1 	bl	80146cc <vPortExitCritical>

	return xReturn;
 801332a:	69fb      	ldr	r3, [r7, #28]
}
 801332c:	4618      	mov	r0, r3
 801332e:	3720      	adds	r7, #32
 8013330:	46bd      	mov	sp, r7
 8013332:	bd80      	pop	{r7, pc}
 8013334:	240032cc 	.word	0x240032cc
 8013338:	240032e0 	.word	0x240032e0

0801333c <vTaskMissedYield>:
/*-----------------------------------------------------------*/

void vTaskMissedYield( void )
{
 801333c:	b480      	push	{r7}
 801333e:	af00      	add	r7, sp, #0
	xYieldPending = pdTRUE;
 8013340:	4b03      	ldr	r3, [pc, #12]	@ (8013350 <vTaskMissedYield+0x14>)
 8013342:	2201      	movs	r2, #1
 8013344:	601a      	str	r2, [r3, #0]
}
 8013346:	bf00      	nop
 8013348:	46bd      	mov	sp, r7
 801334a:	f85d 7b04 	ldr.w	r7, [sp], #4
 801334e:	4770      	bx	lr
 8013350:	240032dc 	.word	0x240032dc

08013354 <prvIdleTask>:
 *
 * void prvIdleTask( void *pvParameters );
 *
 */
static portTASK_FUNCTION( prvIdleTask, pvParameters )
{
 8013354:	b580      	push	{r7, lr}
 8013356:	b082      	sub	sp, #8
 8013358:	af00      	add	r7, sp, #0
 801335a:	6078      	str	r0, [r7, #4]

	for( ;; )
	{
		/* See if any tasks have deleted themselves - if so then the idle task
		is responsible for freeing the deleted task's TCB and stack. */
		prvCheckTasksWaitingTermination();
 801335c:	f000 f852 	bl	8013404 <prvCheckTasksWaitingTermination>

			A critical region is not required here as we are just reading from
			the list, and an occasional incorrect value will not matter.  If
			the ready list at the idle priority contains more than one task
			then a task other than the idle task is ready to execute. */
			if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ tskIDLE_PRIORITY ] ) ) > ( UBaseType_t ) 1 )
 8013360:	4b06      	ldr	r3, [pc, #24]	@ (801337c <prvIdleTask+0x28>)
 8013362:	681b      	ldr	r3, [r3, #0]
 8013364:	2b01      	cmp	r3, #1
 8013366:	d9f9      	bls.n	801335c <prvIdleTask+0x8>
			{
				taskYIELD();
 8013368:	4b05      	ldr	r3, [pc, #20]	@ (8013380 <prvIdleTask+0x2c>)
 801336a:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 801336e:	601a      	str	r2, [r3, #0]
 8013370:	f3bf 8f4f 	dsb	sy
 8013374:	f3bf 8f6f 	isb	sy
		prvCheckTasksWaitingTermination();
 8013378:	e7f0      	b.n	801335c <prvIdleTask+0x8>
 801337a:	bf00      	nop
 801337c:	24002df8 	.word	0x24002df8
 8013380:	e000ed04 	.word	0xe000ed04

08013384 <prvInitialiseTaskLists>:

#endif /* portUSING_MPU_WRAPPERS */
/*-----------------------------------------------------------*/

static void prvInitialiseTaskLists( void )
{
 8013384:	b580      	push	{r7, lr}
 8013386:	b082      	sub	sp, #8
 8013388:	af00      	add	r7, sp, #0
UBaseType_t uxPriority;

	for( uxPriority = ( UBaseType_t ) 0U; uxPriority < ( UBaseType_t ) configMAX_PRIORITIES; uxPriority++ )
 801338a:	2300      	movs	r3, #0
 801338c:	607b      	str	r3, [r7, #4]
 801338e:	e00c      	b.n	80133aa <prvInitialiseTaskLists+0x26>
	{
		vListInitialise( &( pxReadyTasksLists[ uxPriority ] ) );
 8013390:	687a      	ldr	r2, [r7, #4]
 8013392:	4613      	mov	r3, r2
 8013394:	009b      	lsls	r3, r3, #2
 8013396:	4413      	add	r3, r2
 8013398:	009b      	lsls	r3, r3, #2
 801339a:	4a12      	ldr	r2, [pc, #72]	@ (80133e4 <prvInitialiseTaskLists+0x60>)
 801339c:	4413      	add	r3, r2
 801339e:	4618      	mov	r0, r3
 80133a0:	f7fd fca6 	bl	8010cf0 <vListInitialise>
	for( uxPriority = ( UBaseType_t ) 0U; uxPriority < ( UBaseType_t ) configMAX_PRIORITIES; uxPriority++ )
 80133a4:	687b      	ldr	r3, [r7, #4]
 80133a6:	3301      	adds	r3, #1
 80133a8:	607b      	str	r3, [r7, #4]
 80133aa:	687b      	ldr	r3, [r7, #4]
 80133ac:	2b37      	cmp	r3, #55	@ 0x37
 80133ae:	d9ef      	bls.n	8013390 <prvInitialiseTaskLists+0xc>
	}

	vListInitialise( &xDelayedTaskList1 );
 80133b0:	480d      	ldr	r0, [pc, #52]	@ (80133e8 <prvInitialiseTaskLists+0x64>)
 80133b2:	f7fd fc9d 	bl	8010cf0 <vListInitialise>
	vListInitialise( &xDelayedTaskList2 );
 80133b6:	480d      	ldr	r0, [pc, #52]	@ (80133ec <prvInitialiseTaskLists+0x68>)
 80133b8:	f7fd fc9a 	bl	8010cf0 <vListInitialise>
	vListInitialise( &xPendingReadyList );
 80133bc:	480c      	ldr	r0, [pc, #48]	@ (80133f0 <prvInitialiseTaskLists+0x6c>)
 80133be:	f7fd fc97 	bl	8010cf0 <vListInitialise>

	#if ( INCLUDE_vTaskDelete == 1 )
	{
		vListInitialise( &xTasksWaitingTermination );
 80133c2:	480c      	ldr	r0, [pc, #48]	@ (80133f4 <prvInitialiseTaskLists+0x70>)
 80133c4:	f7fd fc94 	bl	8010cf0 <vListInitialise>
	}
	#endif /* INCLUDE_vTaskDelete */

	#if ( INCLUDE_vTaskSuspend == 1 )
	{
		vListInitialise( &xSuspendedTaskList );
 80133c8:	480b      	ldr	r0, [pc, #44]	@ (80133f8 <prvInitialiseTaskLists+0x74>)
 80133ca:	f7fd fc91 	bl	8010cf0 <vListInitialise>
	}
	#endif /* INCLUDE_vTaskSuspend */

	/* Start with pxDelayedTaskList using list1 and the pxOverflowDelayedTaskList
	using list2. */
	pxDelayedTaskList = &xDelayedTaskList1;
 80133ce:	4b0b      	ldr	r3, [pc, #44]	@ (80133fc <prvInitialiseTaskLists+0x78>)
 80133d0:	4a05      	ldr	r2, [pc, #20]	@ (80133e8 <prvInitialiseTaskLists+0x64>)
 80133d2:	601a      	str	r2, [r3, #0]
	pxOverflowDelayedTaskList = &xDelayedTaskList2;
 80133d4:	4b0a      	ldr	r3, [pc, #40]	@ (8013400 <prvInitialiseTaskLists+0x7c>)
 80133d6:	4a05      	ldr	r2, [pc, #20]	@ (80133ec <prvInitialiseTaskLists+0x68>)
 80133d8:	601a      	str	r2, [r3, #0]
}
 80133da:	bf00      	nop
 80133dc:	3708      	adds	r7, #8
 80133de:	46bd      	mov	sp, r7
 80133e0:	bd80      	pop	{r7, pc}
 80133e2:	bf00      	nop
 80133e4:	24002df8 	.word	0x24002df8
 80133e8:	24003258 	.word	0x24003258
 80133ec:	2400326c 	.word	0x2400326c
 80133f0:	24003288 	.word	0x24003288
 80133f4:	2400329c 	.word	0x2400329c
 80133f8:	240032b4 	.word	0x240032b4
 80133fc:	24003280 	.word	0x24003280
 8013400:	24003284 	.word	0x24003284

08013404 <prvCheckTasksWaitingTermination>:
/*-----------------------------------------------------------*/

static void prvCheckTasksWaitingTermination( void )
{
 8013404:	b580      	push	{r7, lr}
 8013406:	b082      	sub	sp, #8
 8013408:	af00      	add	r7, sp, #0
	{
		TCB_t *pxTCB;

		/* uxDeletedTasksWaitingCleanUp is used to prevent taskENTER_CRITICAL()
		being called too often in the idle task. */
		while( uxDeletedTasksWaitingCleanUp > ( UBaseType_t ) 0U )
 801340a:	e019      	b.n	8013440 <prvCheckTasksWaitingTermination+0x3c>
		{
			taskENTER_CRITICAL();
 801340c:	f001 f92c 	bl	8014668 <vPortEnterCritical>
			{
				pxTCB = listGET_OWNER_OF_HEAD_ENTRY( ( &xTasksWaitingTermination ) ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
 8013410:	4b10      	ldr	r3, [pc, #64]	@ (8013454 <prvCheckTasksWaitingTermination+0x50>)
 8013412:	68db      	ldr	r3, [r3, #12]
 8013414:	68db      	ldr	r3, [r3, #12]
 8013416:	607b      	str	r3, [r7, #4]
				( void ) uxListRemove( &( pxTCB->xStateListItem ) );
 8013418:	687b      	ldr	r3, [r7, #4]
 801341a:	3304      	adds	r3, #4
 801341c:	4618      	mov	r0, r3
 801341e:	f7fd fcf1 	bl	8010e04 <uxListRemove>
				--uxCurrentNumberOfTasks;
 8013422:	4b0d      	ldr	r3, [pc, #52]	@ (8013458 <prvCheckTasksWaitingTermination+0x54>)
 8013424:	681b      	ldr	r3, [r3, #0]
 8013426:	3b01      	subs	r3, #1
 8013428:	4a0b      	ldr	r2, [pc, #44]	@ (8013458 <prvCheckTasksWaitingTermination+0x54>)
 801342a:	6013      	str	r3, [r2, #0]
				--uxDeletedTasksWaitingCleanUp;
 801342c:	4b0b      	ldr	r3, [pc, #44]	@ (801345c <prvCheckTasksWaitingTermination+0x58>)
 801342e:	681b      	ldr	r3, [r3, #0]
 8013430:	3b01      	subs	r3, #1
 8013432:	4a0a      	ldr	r2, [pc, #40]	@ (801345c <prvCheckTasksWaitingTermination+0x58>)
 8013434:	6013      	str	r3, [r2, #0]
			}
			taskEXIT_CRITICAL();
 8013436:	f001 f949 	bl	80146cc <vPortExitCritical>

			prvDeleteTCB( pxTCB );
 801343a:	6878      	ldr	r0, [r7, #4]
 801343c:	f000 f810 	bl	8013460 <prvDeleteTCB>
		while( uxDeletedTasksWaitingCleanUp > ( UBaseType_t ) 0U )
 8013440:	4b06      	ldr	r3, [pc, #24]	@ (801345c <prvCheckTasksWaitingTermination+0x58>)
 8013442:	681b      	ldr	r3, [r3, #0]
 8013444:	2b00      	cmp	r3, #0
 8013446:	d1e1      	bne.n	801340c <prvCheckTasksWaitingTermination+0x8>
		}
	}
	#endif /* INCLUDE_vTaskDelete */
}
 8013448:	bf00      	nop
 801344a:	bf00      	nop
 801344c:	3708      	adds	r7, #8
 801344e:	46bd      	mov	sp, r7
 8013450:	bd80      	pop	{r7, pc}
 8013452:	bf00      	nop
 8013454:	2400329c 	.word	0x2400329c
 8013458:	240032c8 	.word	0x240032c8
 801345c:	240032b0 	.word	0x240032b0

08013460 <prvDeleteTCB>:
/*-----------------------------------------------------------*/

#if ( INCLUDE_vTaskDelete == 1 )

	static void prvDeleteTCB( TCB_t *pxTCB )
	{
 8013460:	b580      	push	{r7, lr}
 8013462:	b084      	sub	sp, #16
 8013464:	af00      	add	r7, sp, #0
 8013466:	6078      	str	r0, [r7, #4]
		to the task to free any memory allocated at the application level.
		See the third party link http://www.nadler.com/embedded/newlibAndFreeRTOS.html
		for additional information. */
		#if ( configUSE_NEWLIB_REENTRANT == 1 )
		{
			_reclaim_reent( &( pxTCB->xNewLib_reent ) );
 8013468:	687b      	ldr	r3, [r7, #4]
 801346a:	3354      	adds	r3, #84	@ 0x54
 801346c:	4618      	mov	r0, r3
 801346e:	f016 fa0d 	bl	802988c <_reclaim_reent>
		#elif( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 ) /*lint !e731 !e9029 Macro has been consolidated for readability reasons. */
		{
			/* The task could have been allocated statically or dynamically, so
			check what was statically allocated before trying to free the
			memory. */
			if( pxTCB->ucStaticallyAllocated == tskDYNAMICALLY_ALLOCATED_STACK_AND_TCB )
 8013472:	687b      	ldr	r3, [r7, #4]
 8013474:	f893 30a5 	ldrb.w	r3, [r3, #165]	@ 0xa5
 8013478:	2b00      	cmp	r3, #0
 801347a:	d108      	bne.n	801348e <prvDeleteTCB+0x2e>
			{
				/* Both the stack and TCB were allocated dynamically, so both
				must be freed. */
				vPortFree( pxTCB->pxStack );
 801347c:	687b      	ldr	r3, [r7, #4]
 801347e:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8013480:	4618      	mov	r0, r3
 8013482:	f001 fae1 	bl	8014a48 <vPortFree>
				vPortFree( pxTCB );
 8013486:	6878      	ldr	r0, [r7, #4]
 8013488:	f001 fade 	bl	8014a48 <vPortFree>
				configASSERT( pxTCB->ucStaticallyAllocated == tskSTATICALLY_ALLOCATED_STACK_AND_TCB	);
				mtCOVERAGE_TEST_MARKER();
			}
		}
		#endif /* configSUPPORT_DYNAMIC_ALLOCATION */
	}
 801348c:	e019      	b.n	80134c2 <prvDeleteTCB+0x62>
			else if( pxTCB->ucStaticallyAllocated == tskSTATICALLY_ALLOCATED_STACK_ONLY )
 801348e:	687b      	ldr	r3, [r7, #4]
 8013490:	f893 30a5 	ldrb.w	r3, [r3, #165]	@ 0xa5
 8013494:	2b01      	cmp	r3, #1
 8013496:	d103      	bne.n	80134a0 <prvDeleteTCB+0x40>
				vPortFree( pxTCB );
 8013498:	6878      	ldr	r0, [r7, #4]
 801349a:	f001 fad5 	bl	8014a48 <vPortFree>
	}
 801349e:	e010      	b.n	80134c2 <prvDeleteTCB+0x62>
				configASSERT( pxTCB->ucStaticallyAllocated == tskSTATICALLY_ALLOCATED_STACK_AND_TCB	);
 80134a0:	687b      	ldr	r3, [r7, #4]
 80134a2:	f893 30a5 	ldrb.w	r3, [r3, #165]	@ 0xa5
 80134a6:	2b02      	cmp	r3, #2
 80134a8:	d00b      	beq.n	80134c2 <prvDeleteTCB+0x62>
	__asm volatile
 80134aa:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80134ae:	f383 8811 	msr	BASEPRI, r3
 80134b2:	f3bf 8f6f 	isb	sy
 80134b6:	f3bf 8f4f 	dsb	sy
 80134ba:	60fb      	str	r3, [r7, #12]
}
 80134bc:	bf00      	nop
 80134be:	bf00      	nop
 80134c0:	e7fd      	b.n	80134be <prvDeleteTCB+0x5e>
	}
 80134c2:	bf00      	nop
 80134c4:	3710      	adds	r7, #16
 80134c6:	46bd      	mov	sp, r7
 80134c8:	bd80      	pop	{r7, pc}
	...

080134cc <prvResetNextTaskUnblockTime>:

#endif /* INCLUDE_vTaskDelete */
/*-----------------------------------------------------------*/

static void prvResetNextTaskUnblockTime( void )
{
 80134cc:	b480      	push	{r7}
 80134ce:	b083      	sub	sp, #12
 80134d0:	af00      	add	r7, sp, #0
TCB_t *pxTCB;

	if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )
 80134d2:	4b0c      	ldr	r3, [pc, #48]	@ (8013504 <prvResetNextTaskUnblockTime+0x38>)
 80134d4:	681b      	ldr	r3, [r3, #0]
 80134d6:	681b      	ldr	r3, [r3, #0]
 80134d8:	2b00      	cmp	r3, #0
 80134da:	d104      	bne.n	80134e6 <prvResetNextTaskUnblockTime+0x1a>
	{
		/* The new current delayed list is empty.  Set xNextTaskUnblockTime to
		the maximum possible value so it is	extremely unlikely that the
		if( xTickCount >= xNextTaskUnblockTime ) test will pass until
		there is an item in the delayed list. */
		xNextTaskUnblockTime = portMAX_DELAY;
 80134dc:	4b0a      	ldr	r3, [pc, #40]	@ (8013508 <prvResetNextTaskUnblockTime+0x3c>)
 80134de:	f04f 32ff 	mov.w	r2, #4294967295	@ 0xffffffff
 80134e2:	601a      	str	r2, [r3, #0]
		which the task at the head of the delayed list should be removed
		from the Blocked state. */
		( pxTCB ) = listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
		xNextTaskUnblockTime = listGET_LIST_ITEM_VALUE( &( ( pxTCB )->xStateListItem ) );
	}
}
 80134e4:	e008      	b.n	80134f8 <prvResetNextTaskUnblockTime+0x2c>
		( pxTCB ) = listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
 80134e6:	4b07      	ldr	r3, [pc, #28]	@ (8013504 <prvResetNextTaskUnblockTime+0x38>)
 80134e8:	681b      	ldr	r3, [r3, #0]
 80134ea:	68db      	ldr	r3, [r3, #12]
 80134ec:	68db      	ldr	r3, [r3, #12]
 80134ee:	607b      	str	r3, [r7, #4]
		xNextTaskUnblockTime = listGET_LIST_ITEM_VALUE( &( ( pxTCB )->xStateListItem ) );
 80134f0:	687b      	ldr	r3, [r7, #4]
 80134f2:	685b      	ldr	r3, [r3, #4]
 80134f4:	4a04      	ldr	r2, [pc, #16]	@ (8013508 <prvResetNextTaskUnblockTime+0x3c>)
 80134f6:	6013      	str	r3, [r2, #0]
}
 80134f8:	bf00      	nop
 80134fa:	370c      	adds	r7, #12
 80134fc:	46bd      	mov	sp, r7
 80134fe:	f85d 7b04 	ldr.w	r7, [sp], #4
 8013502:	4770      	bx	lr
 8013504:	24003280 	.word	0x24003280
 8013508:	240032e8 	.word	0x240032e8

0801350c <xTaskGetCurrentTaskHandle>:
/*-----------------------------------------------------------*/

#if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) )

	TaskHandle_t xTaskGetCurrentTaskHandle( void )
	{
 801350c:	b480      	push	{r7}
 801350e:	b083      	sub	sp, #12
 8013510:	af00      	add	r7, sp, #0
	TaskHandle_t xReturn;

		/* A critical section is not required as this is not called from
		an interrupt and the current TCB will always be the same for any
		individual execution thread. */
		xReturn = pxCurrentTCB;
 8013512:	4b05      	ldr	r3, [pc, #20]	@ (8013528 <xTaskGetCurrentTaskHandle+0x1c>)
 8013514:	681b      	ldr	r3, [r3, #0]
 8013516:	607b      	str	r3, [r7, #4]

		return xReturn;
 8013518:	687b      	ldr	r3, [r7, #4]
	}
 801351a:	4618      	mov	r0, r3
 801351c:	370c      	adds	r7, #12
 801351e:	46bd      	mov	sp, r7
 8013520:	f85d 7b04 	ldr.w	r7, [sp], #4
 8013524:	4770      	bx	lr
 8013526:	bf00      	nop
 8013528:	24002df4 	.word	0x24002df4

0801352c <xTaskGetSchedulerState>:
/*-----------------------------------------------------------*/

#if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )

	BaseType_t xTaskGetSchedulerState( void )
	{
 801352c:	b480      	push	{r7}
 801352e:	b083      	sub	sp, #12
 8013530:	af00      	add	r7, sp, #0
	BaseType_t xReturn;

		if( xSchedulerRunning == pdFALSE )
 8013532:	4b0b      	ldr	r3, [pc, #44]	@ (8013560 <xTaskGetSchedulerState+0x34>)
 8013534:	681b      	ldr	r3, [r3, #0]
 8013536:	2b00      	cmp	r3, #0
 8013538:	d102      	bne.n	8013540 <xTaskGetSchedulerState+0x14>
		{
			xReturn = taskSCHEDULER_NOT_STARTED;
 801353a:	2301      	movs	r3, #1
 801353c:	607b      	str	r3, [r7, #4]
 801353e:	e008      	b.n	8013552 <xTaskGetSchedulerState+0x26>
		}
		else
		{
			if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
 8013540:	4b08      	ldr	r3, [pc, #32]	@ (8013564 <xTaskGetSchedulerState+0x38>)
 8013542:	681b      	ldr	r3, [r3, #0]
 8013544:	2b00      	cmp	r3, #0
 8013546:	d102      	bne.n	801354e <xTaskGetSchedulerState+0x22>
			{
				xReturn = taskSCHEDULER_RUNNING;
 8013548:	2302      	movs	r3, #2
 801354a:	607b      	str	r3, [r7, #4]
 801354c:	e001      	b.n	8013552 <xTaskGetSchedulerState+0x26>
			}
			else
			{
				xReturn = taskSCHEDULER_SUSPENDED;
 801354e:	2300      	movs	r3, #0
 8013550:	607b      	str	r3, [r7, #4]
			}
		}

		return xReturn;
 8013552:	687b      	ldr	r3, [r7, #4]
	}
 8013554:	4618      	mov	r0, r3
 8013556:	370c      	adds	r7, #12
 8013558:	46bd      	mov	sp, r7
 801355a:	f85d 7b04 	ldr.w	r7, [sp], #4
 801355e:	4770      	bx	lr
 8013560:	240032d4 	.word	0x240032d4
 8013564:	240032f0 	.word	0x240032f0

08013568 <xTaskPriorityInherit>:
/*-----------------------------------------------------------*/

#if ( configUSE_MUTEXES == 1 )

	BaseType_t xTaskPriorityInherit( TaskHandle_t const pxMutexHolder )
	{
 8013568:	b580      	push	{r7, lr}
 801356a:	b084      	sub	sp, #16
 801356c:	af00      	add	r7, sp, #0
 801356e:	6078      	str	r0, [r7, #4]
	TCB_t * const pxMutexHolderTCB = pxMutexHolder;
 8013570:	687b      	ldr	r3, [r7, #4]
 8013572:	60bb      	str	r3, [r7, #8]
	BaseType_t xReturn = pdFALSE;
 8013574:	2300      	movs	r3, #0
 8013576:	60fb      	str	r3, [r7, #12]

		/* If the mutex was given back by an interrupt while the queue was
		locked then the mutex holder might now be NULL.  _RB_ Is this still
		needed as interrupts can no longer use mutexes? */
		if( pxMutexHolder != NULL )
 8013578:	687b      	ldr	r3, [r7, #4]
 801357a:	2b00      	cmp	r3, #0
 801357c:	d051      	beq.n	8013622 <xTaskPriorityInherit+0xba>
		{
			/* If the holder of the mutex has a priority below the priority of
			the task attempting to obtain the mutex then it will temporarily
			inherit the priority of the task attempting to obtain the mutex. */
			if( pxMutexHolderTCB->uxPriority < pxCurrentTCB->uxPriority )
 801357e:	68bb      	ldr	r3, [r7, #8]
 8013580:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8013582:	4b2a      	ldr	r3, [pc, #168]	@ (801362c <xTaskPriorityInherit+0xc4>)
 8013584:	681b      	ldr	r3, [r3, #0]
 8013586:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8013588:	429a      	cmp	r2, r3
 801358a:	d241      	bcs.n	8013610 <xTaskPriorityInherit+0xa8>
			{
				/* Adjust the mutex holder state to account for its new
				priority.  Only reset the event list item value if the value is
				not being used for anything else. */
				if( ( listGET_LIST_ITEM_VALUE( &( pxMutexHolderTCB->xEventListItem ) ) & taskEVENT_LIST_ITEM_VALUE_IN_USE ) == 0UL )
 801358c:	68bb      	ldr	r3, [r7, #8]
 801358e:	699b      	ldr	r3, [r3, #24]
 8013590:	2b00      	cmp	r3, #0
 8013592:	db06      	blt.n	80135a2 <xTaskPriorityInherit+0x3a>
				{
					listSET_LIST_ITEM_VALUE( &( pxMutexHolderTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) pxCurrentTCB->uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
 8013594:	4b25      	ldr	r3, [pc, #148]	@ (801362c <xTaskPriorityInherit+0xc4>)
 8013596:	681b      	ldr	r3, [r3, #0]
 8013598:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 801359a:	f1c3 0238 	rsb	r2, r3, #56	@ 0x38
 801359e:	68bb      	ldr	r3, [r7, #8]
 80135a0:	619a      	str	r2, [r3, #24]
					mtCOVERAGE_TEST_MARKER();
				}

				/* If the task being modified is in the ready state it will need
				to be moved into a new list. */
				if( listIS_CONTAINED_WITHIN( &( pxReadyTasksLists[ pxMutexHolderTCB->uxPriority ] ), &( pxMutexHolderTCB->xStateListItem ) ) != pdFALSE )
 80135a2:	68bb      	ldr	r3, [r7, #8]
 80135a4:	6959      	ldr	r1, [r3, #20]
 80135a6:	68bb      	ldr	r3, [r7, #8]
 80135a8:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 80135aa:	4613      	mov	r3, r2
 80135ac:	009b      	lsls	r3, r3, #2
 80135ae:	4413      	add	r3, r2
 80135b0:	009b      	lsls	r3, r3, #2
 80135b2:	4a1f      	ldr	r2, [pc, #124]	@ (8013630 <xTaskPriorityInherit+0xc8>)
 80135b4:	4413      	add	r3, r2
 80135b6:	4299      	cmp	r1, r3
 80135b8:	d122      	bne.n	8013600 <xTaskPriorityInherit+0x98>
				{
					if( uxListRemove( &( pxMutexHolderTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
 80135ba:	68bb      	ldr	r3, [r7, #8]
 80135bc:	3304      	adds	r3, #4
 80135be:	4618      	mov	r0, r3
 80135c0:	f7fd fc20 	bl	8010e04 <uxListRemove>
					{
						mtCOVERAGE_TEST_MARKER();
					}

					/* Inherit the priority before being moved into the new list. */
					pxMutexHolderTCB->uxPriority = pxCurrentTCB->uxPriority;
 80135c4:	4b19      	ldr	r3, [pc, #100]	@ (801362c <xTaskPriorityInherit+0xc4>)
 80135c6:	681b      	ldr	r3, [r3, #0]
 80135c8:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 80135ca:	68bb      	ldr	r3, [r7, #8]
 80135cc:	62da      	str	r2, [r3, #44]	@ 0x2c
					prvAddTaskToReadyList( pxMutexHolderTCB );
 80135ce:	68bb      	ldr	r3, [r7, #8]
 80135d0:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 80135d2:	4b18      	ldr	r3, [pc, #96]	@ (8013634 <xTaskPriorityInherit+0xcc>)
 80135d4:	681b      	ldr	r3, [r3, #0]
 80135d6:	429a      	cmp	r2, r3
 80135d8:	d903      	bls.n	80135e2 <xTaskPriorityInherit+0x7a>
 80135da:	68bb      	ldr	r3, [r7, #8]
 80135dc:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80135de:	4a15      	ldr	r2, [pc, #84]	@ (8013634 <xTaskPriorityInherit+0xcc>)
 80135e0:	6013      	str	r3, [r2, #0]
 80135e2:	68bb      	ldr	r3, [r7, #8]
 80135e4:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 80135e6:	4613      	mov	r3, r2
 80135e8:	009b      	lsls	r3, r3, #2
 80135ea:	4413      	add	r3, r2
 80135ec:	009b      	lsls	r3, r3, #2
 80135ee:	4a10      	ldr	r2, [pc, #64]	@ (8013630 <xTaskPriorityInherit+0xc8>)
 80135f0:	441a      	add	r2, r3
 80135f2:	68bb      	ldr	r3, [r7, #8]
 80135f4:	3304      	adds	r3, #4
 80135f6:	4619      	mov	r1, r3
 80135f8:	4610      	mov	r0, r2
 80135fa:	f7fd fba6 	bl	8010d4a <vListInsertEnd>
 80135fe:	e004      	b.n	801360a <xTaskPriorityInherit+0xa2>
				}
				else
				{
					/* Just inherit the priority. */
					pxMutexHolderTCB->uxPriority = pxCurrentTCB->uxPriority;
 8013600:	4b0a      	ldr	r3, [pc, #40]	@ (801362c <xTaskPriorityInherit+0xc4>)
 8013602:	681b      	ldr	r3, [r3, #0]
 8013604:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8013606:	68bb      	ldr	r3, [r7, #8]
 8013608:	62da      	str	r2, [r3, #44]	@ 0x2c
				}

				traceTASK_PRIORITY_INHERIT( pxMutexHolderTCB, pxCurrentTCB->uxPriority );

				/* Inheritance occurred. */
				xReturn = pdTRUE;
 801360a:	2301      	movs	r3, #1
 801360c:	60fb      	str	r3, [r7, #12]
 801360e:	e008      	b.n	8013622 <xTaskPriorityInherit+0xba>
			}
			else
			{
				if( pxMutexHolderTCB->uxBasePriority < pxCurrentTCB->uxPriority )
 8013610:	68bb      	ldr	r3, [r7, #8]
 8013612:	6cda      	ldr	r2, [r3, #76]	@ 0x4c
 8013614:	4b05      	ldr	r3, [pc, #20]	@ (801362c <xTaskPriorityInherit+0xc4>)
 8013616:	681b      	ldr	r3, [r3, #0]
 8013618:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 801361a:	429a      	cmp	r2, r3
 801361c:	d201      	bcs.n	8013622 <xTaskPriorityInherit+0xba>
					current priority of the mutex holder is not lower than the
					priority of the task attempting to take the mutex.
					Therefore the mutex holder must have already inherited a
					priority, but inheritance would have occurred if that had
					not been the case. */
					xReturn = pdTRUE;
 801361e:	2301      	movs	r3, #1
 8013620:	60fb      	str	r3, [r7, #12]
		else
		{
			mtCOVERAGE_TEST_MARKER();
		}

		return xReturn;
 8013622:	68fb      	ldr	r3, [r7, #12]
	}
 8013624:	4618      	mov	r0, r3
 8013626:	3710      	adds	r7, #16
 8013628:	46bd      	mov	sp, r7
 801362a:	bd80      	pop	{r7, pc}
 801362c:	24002df4 	.word	0x24002df4
 8013630:	24002df8 	.word	0x24002df8
 8013634:	240032d0 	.word	0x240032d0

08013638 <xTaskPriorityDisinherit>:
/*-----------------------------------------------------------*/

#if ( configUSE_MUTEXES == 1 )

	BaseType_t xTaskPriorityDisinherit( TaskHandle_t const pxMutexHolder )
	{
 8013638:	b580      	push	{r7, lr}
 801363a:	b086      	sub	sp, #24
 801363c:	af00      	add	r7, sp, #0
 801363e:	6078      	str	r0, [r7, #4]
	TCB_t * const pxTCB = pxMutexHolder;
 8013640:	687b      	ldr	r3, [r7, #4]
 8013642:	613b      	str	r3, [r7, #16]
	BaseType_t xReturn = pdFALSE;
 8013644:	2300      	movs	r3, #0
 8013646:	617b      	str	r3, [r7, #20]

		if( pxMutexHolder != NULL )
 8013648:	687b      	ldr	r3, [r7, #4]
 801364a:	2b00      	cmp	r3, #0
 801364c:	d058      	beq.n	8013700 <xTaskPriorityDisinherit+0xc8>
		{
			/* A task can only have an inherited priority if it holds the mutex.
			If the mutex is held by a task then it cannot be given from an
			interrupt, and if a mutex is given by the holding task then it must
			be the running state task. */
			configASSERT( pxTCB == pxCurrentTCB );
 801364e:	4b2f      	ldr	r3, [pc, #188]	@ (801370c <xTaskPriorityDisinherit+0xd4>)
 8013650:	681b      	ldr	r3, [r3, #0]
 8013652:	693a      	ldr	r2, [r7, #16]
 8013654:	429a      	cmp	r2, r3
 8013656:	d00b      	beq.n	8013670 <xTaskPriorityDisinherit+0x38>
	__asm volatile
 8013658:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801365c:	f383 8811 	msr	BASEPRI, r3
 8013660:	f3bf 8f6f 	isb	sy
 8013664:	f3bf 8f4f 	dsb	sy
 8013668:	60fb      	str	r3, [r7, #12]
}
 801366a:	bf00      	nop
 801366c:	bf00      	nop
 801366e:	e7fd      	b.n	801366c <xTaskPriorityDisinherit+0x34>
			configASSERT( pxTCB->uxMutexesHeld );
 8013670:	693b      	ldr	r3, [r7, #16]
 8013672:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 8013674:	2b00      	cmp	r3, #0
 8013676:	d10b      	bne.n	8013690 <xTaskPriorityDisinherit+0x58>
	__asm volatile
 8013678:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801367c:	f383 8811 	msr	BASEPRI, r3
 8013680:	f3bf 8f6f 	isb	sy
 8013684:	f3bf 8f4f 	dsb	sy
 8013688:	60bb      	str	r3, [r7, #8]
}
 801368a:	bf00      	nop
 801368c:	bf00      	nop
 801368e:	e7fd      	b.n	801368c <xTaskPriorityDisinherit+0x54>
			( pxTCB->uxMutexesHeld )--;
 8013690:	693b      	ldr	r3, [r7, #16]
 8013692:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 8013694:	1e5a      	subs	r2, r3, #1
 8013696:	693b      	ldr	r3, [r7, #16]
 8013698:	651a      	str	r2, [r3, #80]	@ 0x50

			/* Has the holder of the mutex inherited the priority of another
			task? */
			if( pxTCB->uxPriority != pxTCB->uxBasePriority )
 801369a:	693b      	ldr	r3, [r7, #16]
 801369c:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 801369e:	693b      	ldr	r3, [r7, #16]
 80136a0:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 80136a2:	429a      	cmp	r2, r3
 80136a4:	d02c      	beq.n	8013700 <xTaskPriorityDisinherit+0xc8>
			{
				/* Only disinherit if no other mutexes are held. */
				if( pxTCB->uxMutexesHeld == ( UBaseType_t ) 0 )
 80136a6:	693b      	ldr	r3, [r7, #16]
 80136a8:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 80136aa:	2b00      	cmp	r3, #0
 80136ac:	d128      	bne.n	8013700 <xTaskPriorityDisinherit+0xc8>
					/* A task can only have an inherited priority if it holds
					the mutex.  If the mutex is held by a task then it cannot be
					given from an interrupt, and if a mutex is given by the
					holding task then it must be the running state task.  Remove
					the holding task from the ready/delayed list. */
					if( uxListRemove( &( pxTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
 80136ae:	693b      	ldr	r3, [r7, #16]
 80136b0:	3304      	adds	r3, #4
 80136b2:	4618      	mov	r0, r3
 80136b4:	f7fd fba6 	bl	8010e04 <uxListRemove>
					}

					/* Disinherit the priority before adding the task into the
					new	ready list. */
					traceTASK_PRIORITY_DISINHERIT( pxTCB, pxTCB->uxBasePriority );
					pxTCB->uxPriority = pxTCB->uxBasePriority;
 80136b8:	693b      	ldr	r3, [r7, #16]
 80136ba:	6cda      	ldr	r2, [r3, #76]	@ 0x4c
 80136bc:	693b      	ldr	r3, [r7, #16]
 80136be:	62da      	str	r2, [r3, #44]	@ 0x2c

					/* Reset the event list item value.  It cannot be in use for
					any other purpose if this task is running, and it must be
					running to give back the mutex. */
					listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) pxTCB->uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
 80136c0:	693b      	ldr	r3, [r7, #16]
 80136c2:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80136c4:	f1c3 0238 	rsb	r2, r3, #56	@ 0x38
 80136c8:	693b      	ldr	r3, [r7, #16]
 80136ca:	619a      	str	r2, [r3, #24]
					prvAddTaskToReadyList( pxTCB );
 80136cc:	693b      	ldr	r3, [r7, #16]
 80136ce:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 80136d0:	4b0f      	ldr	r3, [pc, #60]	@ (8013710 <xTaskPriorityDisinherit+0xd8>)
 80136d2:	681b      	ldr	r3, [r3, #0]
 80136d4:	429a      	cmp	r2, r3
 80136d6:	d903      	bls.n	80136e0 <xTaskPriorityDisinherit+0xa8>
 80136d8:	693b      	ldr	r3, [r7, #16]
 80136da:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80136dc:	4a0c      	ldr	r2, [pc, #48]	@ (8013710 <xTaskPriorityDisinherit+0xd8>)
 80136de:	6013      	str	r3, [r2, #0]
 80136e0:	693b      	ldr	r3, [r7, #16]
 80136e2:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 80136e4:	4613      	mov	r3, r2
 80136e6:	009b      	lsls	r3, r3, #2
 80136e8:	4413      	add	r3, r2
 80136ea:	009b      	lsls	r3, r3, #2
 80136ec:	4a09      	ldr	r2, [pc, #36]	@ (8013714 <xTaskPriorityDisinherit+0xdc>)
 80136ee:	441a      	add	r2, r3
 80136f0:	693b      	ldr	r3, [r7, #16]
 80136f2:	3304      	adds	r3, #4
 80136f4:	4619      	mov	r1, r3
 80136f6:	4610      	mov	r0, r2
 80136f8:	f7fd fb27 	bl	8010d4a <vListInsertEnd>
					in an order different to that in which they were taken.
					If a context switch did not occur when the first mutex was
					returned, even if a task was waiting on it, then a context
					switch should occur when the last mutex is returned whether
					a task is waiting on it or not. */
					xReturn = pdTRUE;
 80136fc:	2301      	movs	r3, #1
 80136fe:	617b      	str	r3, [r7, #20]
		else
		{
			mtCOVERAGE_TEST_MARKER();
		}

		return xReturn;
 8013700:	697b      	ldr	r3, [r7, #20]
	}
 8013702:	4618      	mov	r0, r3
 8013704:	3718      	adds	r7, #24
 8013706:	46bd      	mov	sp, r7
 8013708:	bd80      	pop	{r7, pc}
 801370a:	bf00      	nop
 801370c:	24002df4 	.word	0x24002df4
 8013710:	240032d0 	.word	0x240032d0
 8013714:	24002df8 	.word	0x24002df8

08013718 <vTaskPriorityDisinheritAfterTimeout>:
/*-----------------------------------------------------------*/

#if ( configUSE_MUTEXES == 1 )

	void vTaskPriorityDisinheritAfterTimeout( TaskHandle_t const pxMutexHolder, UBaseType_t uxHighestPriorityWaitingTask )
	{
 8013718:	b580      	push	{r7, lr}
 801371a:	b088      	sub	sp, #32
 801371c:	af00      	add	r7, sp, #0
 801371e:	6078      	str	r0, [r7, #4]
 8013720:	6039      	str	r1, [r7, #0]
	TCB_t * const pxTCB = pxMutexHolder;
 8013722:	687b      	ldr	r3, [r7, #4]
 8013724:	61bb      	str	r3, [r7, #24]
	UBaseType_t uxPriorityUsedOnEntry, uxPriorityToUse;
	const UBaseType_t uxOnlyOneMutexHeld = ( UBaseType_t ) 1;
 8013726:	2301      	movs	r3, #1
 8013728:	617b      	str	r3, [r7, #20]

		if( pxMutexHolder != NULL )
 801372a:	687b      	ldr	r3, [r7, #4]
 801372c:	2b00      	cmp	r3, #0
 801372e:	d06c      	beq.n	801380a <vTaskPriorityDisinheritAfterTimeout+0xf2>
		{
			/* If pxMutexHolder is not NULL then the holder must hold at least
			one mutex. */
			configASSERT( pxTCB->uxMutexesHeld );
 8013730:	69bb      	ldr	r3, [r7, #24]
 8013732:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 8013734:	2b00      	cmp	r3, #0
 8013736:	d10b      	bne.n	8013750 <vTaskPriorityDisinheritAfterTimeout+0x38>
	__asm volatile
 8013738:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801373c:	f383 8811 	msr	BASEPRI, r3
 8013740:	f3bf 8f6f 	isb	sy
 8013744:	f3bf 8f4f 	dsb	sy
 8013748:	60fb      	str	r3, [r7, #12]
}
 801374a:	bf00      	nop
 801374c:	bf00      	nop
 801374e:	e7fd      	b.n	801374c <vTaskPriorityDisinheritAfterTimeout+0x34>

			/* Determine the priority to which the priority of the task that
			holds the mutex should be set.  This will be the greater of the
			holding task's base priority and the priority of the highest
			priority task that is waiting to obtain the mutex. */
			if( pxTCB->uxBasePriority < uxHighestPriorityWaitingTask )
 8013750:	69bb      	ldr	r3, [r7, #24]
 8013752:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 8013754:	683a      	ldr	r2, [r7, #0]
 8013756:	429a      	cmp	r2, r3
 8013758:	d902      	bls.n	8013760 <vTaskPriorityDisinheritAfterTimeout+0x48>
			{
				uxPriorityToUse = uxHighestPriorityWaitingTask;
 801375a:	683b      	ldr	r3, [r7, #0]
 801375c:	61fb      	str	r3, [r7, #28]
 801375e:	e002      	b.n	8013766 <vTaskPriorityDisinheritAfterTimeout+0x4e>
			}
			else
			{
				uxPriorityToUse = pxTCB->uxBasePriority;
 8013760:	69bb      	ldr	r3, [r7, #24]
 8013762:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 8013764:	61fb      	str	r3, [r7, #28]
			}

			/* Does the priority need to change? */
			if( pxTCB->uxPriority != uxPriorityToUse )
 8013766:	69bb      	ldr	r3, [r7, #24]
 8013768:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 801376a:	69fa      	ldr	r2, [r7, #28]
 801376c:	429a      	cmp	r2, r3
 801376e:	d04c      	beq.n	801380a <vTaskPriorityDisinheritAfterTimeout+0xf2>
			{
				/* Only disinherit if no other mutexes are held.  This is a
				simplification in the priority inheritance implementation.  If
				the task that holds the mutex is also holding other mutexes then
				the other mutexes may have caused the priority inheritance. */
				if( pxTCB->uxMutexesHeld == uxOnlyOneMutexHeld )
 8013770:	69bb      	ldr	r3, [r7, #24]
 8013772:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 8013774:	697a      	ldr	r2, [r7, #20]
 8013776:	429a      	cmp	r2, r3
 8013778:	d147      	bne.n	801380a <vTaskPriorityDisinheritAfterTimeout+0xf2>
				{
					/* If a task has timed out because it already holds the
					mutex it was trying to obtain then it cannot of inherited
					its own priority. */
					configASSERT( pxTCB != pxCurrentTCB );
 801377a:	4b26      	ldr	r3, [pc, #152]	@ (8013814 <vTaskPriorityDisinheritAfterTimeout+0xfc>)
 801377c:	681b      	ldr	r3, [r3, #0]
 801377e:	69ba      	ldr	r2, [r7, #24]
 8013780:	429a      	cmp	r2, r3
 8013782:	d10b      	bne.n	801379c <vTaskPriorityDisinheritAfterTimeout+0x84>
	__asm volatile
 8013784:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8013788:	f383 8811 	msr	BASEPRI, r3
 801378c:	f3bf 8f6f 	isb	sy
 8013790:	f3bf 8f4f 	dsb	sy
 8013794:	60bb      	str	r3, [r7, #8]
}
 8013796:	bf00      	nop
 8013798:	bf00      	nop
 801379a:	e7fd      	b.n	8013798 <vTaskPriorityDisinheritAfterTimeout+0x80>

					/* Disinherit the priority, remembering the previous
					priority to facilitate determining the subject task's
					state. */
					traceTASK_PRIORITY_DISINHERIT( pxTCB, pxTCB->uxBasePriority );
					uxPriorityUsedOnEntry = pxTCB->uxPriority;
 801379c:	69bb      	ldr	r3, [r7, #24]
 801379e:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80137a0:	613b      	str	r3, [r7, #16]
					pxTCB->uxPriority = uxPriorityToUse;
 80137a2:	69bb      	ldr	r3, [r7, #24]
 80137a4:	69fa      	ldr	r2, [r7, #28]
 80137a6:	62da      	str	r2, [r3, #44]	@ 0x2c

					/* Only reset the event list item value if the value is not
					being used for anything else. */
					if( ( listGET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ) ) & taskEVENT_LIST_ITEM_VALUE_IN_USE ) == 0UL )
 80137a8:	69bb      	ldr	r3, [r7, #24]
 80137aa:	699b      	ldr	r3, [r3, #24]
 80137ac:	2b00      	cmp	r3, #0
 80137ae:	db04      	blt.n	80137ba <vTaskPriorityDisinheritAfterTimeout+0xa2>
					{
						listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) uxPriorityToUse ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
 80137b0:	69fb      	ldr	r3, [r7, #28]
 80137b2:	f1c3 0238 	rsb	r2, r3, #56	@ 0x38
 80137b6:	69bb      	ldr	r3, [r7, #24]
 80137b8:	619a      	str	r2, [r3, #24]
					then the task that holds the mutex could be in either the
					Ready, Blocked or Suspended states.  Only remove the task
					from its current state list if it is in the Ready state as
					the task's priority is going to change and there is one
					Ready list per priority. */
					if( listIS_CONTAINED_WITHIN( &( pxReadyTasksLists[ uxPriorityUsedOnEntry ] ), &( pxTCB->xStateListItem ) ) != pdFALSE )
 80137ba:	69bb      	ldr	r3, [r7, #24]
 80137bc:	6959      	ldr	r1, [r3, #20]
 80137be:	693a      	ldr	r2, [r7, #16]
 80137c0:	4613      	mov	r3, r2
 80137c2:	009b      	lsls	r3, r3, #2
 80137c4:	4413      	add	r3, r2
 80137c6:	009b      	lsls	r3, r3, #2
 80137c8:	4a13      	ldr	r2, [pc, #76]	@ (8013818 <vTaskPriorityDisinheritAfterTimeout+0x100>)
 80137ca:	4413      	add	r3, r2
 80137cc:	4299      	cmp	r1, r3
 80137ce:	d11c      	bne.n	801380a <vTaskPriorityDisinheritAfterTimeout+0xf2>
					{
						if( uxListRemove( &( pxTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
 80137d0:	69bb      	ldr	r3, [r7, #24]
 80137d2:	3304      	adds	r3, #4
 80137d4:	4618      	mov	r0, r3
 80137d6:	f7fd fb15 	bl	8010e04 <uxListRemove>
						else
						{
							mtCOVERAGE_TEST_MARKER();
						}

						prvAddTaskToReadyList( pxTCB );
 80137da:	69bb      	ldr	r3, [r7, #24]
 80137dc:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 80137de:	4b0f      	ldr	r3, [pc, #60]	@ (801381c <vTaskPriorityDisinheritAfterTimeout+0x104>)
 80137e0:	681b      	ldr	r3, [r3, #0]
 80137e2:	429a      	cmp	r2, r3
 80137e4:	d903      	bls.n	80137ee <vTaskPriorityDisinheritAfterTimeout+0xd6>
 80137e6:	69bb      	ldr	r3, [r7, #24]
 80137e8:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80137ea:	4a0c      	ldr	r2, [pc, #48]	@ (801381c <vTaskPriorityDisinheritAfterTimeout+0x104>)
 80137ec:	6013      	str	r3, [r2, #0]
 80137ee:	69bb      	ldr	r3, [r7, #24]
 80137f0:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 80137f2:	4613      	mov	r3, r2
 80137f4:	009b      	lsls	r3, r3, #2
 80137f6:	4413      	add	r3, r2
 80137f8:	009b      	lsls	r3, r3, #2
 80137fa:	4a07      	ldr	r2, [pc, #28]	@ (8013818 <vTaskPriorityDisinheritAfterTimeout+0x100>)
 80137fc:	441a      	add	r2, r3
 80137fe:	69bb      	ldr	r3, [r7, #24]
 8013800:	3304      	adds	r3, #4
 8013802:	4619      	mov	r1, r3
 8013804:	4610      	mov	r0, r2
 8013806:	f7fd faa0 	bl	8010d4a <vListInsertEnd>
		}
		else
		{
			mtCOVERAGE_TEST_MARKER();
		}
	}
 801380a:	bf00      	nop
 801380c:	3720      	adds	r7, #32
 801380e:	46bd      	mov	sp, r7
 8013810:	bd80      	pop	{r7, pc}
 8013812:	bf00      	nop
 8013814:	24002df4 	.word	0x24002df4
 8013818:	24002df8 	.word	0x24002df8
 801381c:	240032d0 	.word	0x240032d0

08013820 <pvTaskIncrementMutexHeldCount>:
/*-----------------------------------------------------------*/

#if ( configUSE_MUTEXES == 1 )

	TaskHandle_t pvTaskIncrementMutexHeldCount( void )
	{
 8013820:	b480      	push	{r7}
 8013822:	af00      	add	r7, sp, #0
		/* If xSemaphoreCreateMutex() is called before any tasks have been created
		then pxCurrentTCB will be NULL. */
		if( pxCurrentTCB != NULL )
 8013824:	4b07      	ldr	r3, [pc, #28]	@ (8013844 <pvTaskIncrementMutexHeldCount+0x24>)
 8013826:	681b      	ldr	r3, [r3, #0]
 8013828:	2b00      	cmp	r3, #0
 801382a:	d004      	beq.n	8013836 <pvTaskIncrementMutexHeldCount+0x16>
		{
			( pxCurrentTCB->uxMutexesHeld )++;
 801382c:	4b05      	ldr	r3, [pc, #20]	@ (8013844 <pvTaskIncrementMutexHeldCount+0x24>)
 801382e:	681b      	ldr	r3, [r3, #0]
 8013830:	6d1a      	ldr	r2, [r3, #80]	@ 0x50
 8013832:	3201      	adds	r2, #1
 8013834:	651a      	str	r2, [r3, #80]	@ 0x50
		}

		return pxCurrentTCB;
 8013836:	4b03      	ldr	r3, [pc, #12]	@ (8013844 <pvTaskIncrementMutexHeldCount+0x24>)
 8013838:	681b      	ldr	r3, [r3, #0]
	}
 801383a:	4618      	mov	r0, r3
 801383c:	46bd      	mov	sp, r7
 801383e:	f85d 7b04 	ldr.w	r7, [sp], #4
 8013842:	4770      	bx	lr
 8013844:	24002df4 	.word	0x24002df4

08013848 <xTaskNotifyWait>:
/*-----------------------------------------------------------*/

#if( configUSE_TASK_NOTIFICATIONS == 1 )

	BaseType_t xTaskNotifyWait( uint32_t ulBitsToClearOnEntry, uint32_t ulBitsToClearOnExit, uint32_t *pulNotificationValue, TickType_t xTicksToWait )
	{
 8013848:	b580      	push	{r7, lr}
 801384a:	b086      	sub	sp, #24
 801384c:	af00      	add	r7, sp, #0
 801384e:	60f8      	str	r0, [r7, #12]
 8013850:	60b9      	str	r1, [r7, #8]
 8013852:	607a      	str	r2, [r7, #4]
 8013854:	603b      	str	r3, [r7, #0]
	BaseType_t xReturn;

		taskENTER_CRITICAL();
 8013856:	f000 ff07 	bl	8014668 <vPortEnterCritical>
		{
			/* Only block if a notification is not already pending. */
			if( pxCurrentTCB->ucNotifyState != taskNOTIFICATION_RECEIVED )
 801385a:	4b29      	ldr	r3, [pc, #164]	@ (8013900 <xTaskNotifyWait+0xb8>)
 801385c:	681b      	ldr	r3, [r3, #0]
 801385e:	f893 30a4 	ldrb.w	r3, [r3, #164]	@ 0xa4
 8013862:	b2db      	uxtb	r3, r3
 8013864:	2b02      	cmp	r3, #2
 8013866:	d01c      	beq.n	80138a2 <xTaskNotifyWait+0x5a>
			{
				/* Clear bits in the task's notification value as bits may get
				set	by the notifying task or interrupt.  This can be used to
				clear the value to zero. */
				pxCurrentTCB->ulNotifiedValue &= ~ulBitsToClearOnEntry;
 8013868:	4b25      	ldr	r3, [pc, #148]	@ (8013900 <xTaskNotifyWait+0xb8>)
 801386a:	681b      	ldr	r3, [r3, #0]
 801386c:	f8d3 10a0 	ldr.w	r1, [r3, #160]	@ 0xa0
 8013870:	68fa      	ldr	r2, [r7, #12]
 8013872:	43d2      	mvns	r2, r2
 8013874:	400a      	ands	r2, r1
 8013876:	f8c3 20a0 	str.w	r2, [r3, #160]	@ 0xa0

				/* Mark this task as waiting for a notification. */
				pxCurrentTCB->ucNotifyState = taskWAITING_NOTIFICATION;
 801387a:	4b21      	ldr	r3, [pc, #132]	@ (8013900 <xTaskNotifyWait+0xb8>)
 801387c:	681b      	ldr	r3, [r3, #0]
 801387e:	2201      	movs	r2, #1
 8013880:	f883 20a4 	strb.w	r2, [r3, #164]	@ 0xa4

				if( xTicksToWait > ( TickType_t ) 0 )
 8013884:	683b      	ldr	r3, [r7, #0]
 8013886:	2b00      	cmp	r3, #0
 8013888:	d00b      	beq.n	80138a2 <xTaskNotifyWait+0x5a>
				{
					prvAddCurrentTaskToDelayedList( xTicksToWait, pdTRUE );
 801388a:	2101      	movs	r1, #1
 801388c:	6838      	ldr	r0, [r7, #0]
 801388e:	f000 fa09 	bl	8013ca4 <prvAddCurrentTaskToDelayedList>

					/* All ports are written to allow a yield in a critical
					section (some will yield immediately, others wait until the
					critical section exits) - but it is not something that
					application code should ever do. */
					portYIELD_WITHIN_API();
 8013892:	4b1c      	ldr	r3, [pc, #112]	@ (8013904 <xTaskNotifyWait+0xbc>)
 8013894:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8013898:	601a      	str	r2, [r3, #0]
 801389a:	f3bf 8f4f 	dsb	sy
 801389e:	f3bf 8f6f 	isb	sy
			else
			{
				mtCOVERAGE_TEST_MARKER();
			}
		}
		taskEXIT_CRITICAL();
 80138a2:	f000 ff13 	bl	80146cc <vPortExitCritical>

		taskENTER_CRITICAL();
 80138a6:	f000 fedf 	bl	8014668 <vPortEnterCritical>
		{
			traceTASK_NOTIFY_WAIT();

			if( pulNotificationValue != NULL )
 80138aa:	687b      	ldr	r3, [r7, #4]
 80138ac:	2b00      	cmp	r3, #0
 80138ae:	d005      	beq.n	80138bc <xTaskNotifyWait+0x74>
			{
				/* Output the current notification value, which may or may not
				have changed. */
				*pulNotificationValue = pxCurrentTCB->ulNotifiedValue;
 80138b0:	4b13      	ldr	r3, [pc, #76]	@ (8013900 <xTaskNotifyWait+0xb8>)
 80138b2:	681b      	ldr	r3, [r3, #0]
 80138b4:	f8d3 20a0 	ldr.w	r2, [r3, #160]	@ 0xa0
 80138b8:	687b      	ldr	r3, [r7, #4]
 80138ba:	601a      	str	r2, [r3, #0]

			/* If ucNotifyValue is set then either the task never entered the
			blocked state (because a notification was already pending) or the
			task unblocked because of a notification.  Otherwise the task
			unblocked because of a timeout. */
			if( pxCurrentTCB->ucNotifyState != taskNOTIFICATION_RECEIVED )
 80138bc:	4b10      	ldr	r3, [pc, #64]	@ (8013900 <xTaskNotifyWait+0xb8>)
 80138be:	681b      	ldr	r3, [r3, #0]
 80138c0:	f893 30a4 	ldrb.w	r3, [r3, #164]	@ 0xa4
 80138c4:	b2db      	uxtb	r3, r3
 80138c6:	2b02      	cmp	r3, #2
 80138c8:	d002      	beq.n	80138d0 <xTaskNotifyWait+0x88>
			{
				/* A notification was not received. */
				xReturn = pdFALSE;
 80138ca:	2300      	movs	r3, #0
 80138cc:	617b      	str	r3, [r7, #20]
 80138ce:	e00a      	b.n	80138e6 <xTaskNotifyWait+0x9e>
			}
			else
			{
				/* A notification was already pending or a notification was
				received while the task was waiting. */
				pxCurrentTCB->ulNotifiedValue &= ~ulBitsToClearOnExit;
 80138d0:	4b0b      	ldr	r3, [pc, #44]	@ (8013900 <xTaskNotifyWait+0xb8>)
 80138d2:	681b      	ldr	r3, [r3, #0]
 80138d4:	f8d3 10a0 	ldr.w	r1, [r3, #160]	@ 0xa0
 80138d8:	68ba      	ldr	r2, [r7, #8]
 80138da:	43d2      	mvns	r2, r2
 80138dc:	400a      	ands	r2, r1
 80138de:	f8c3 20a0 	str.w	r2, [r3, #160]	@ 0xa0
				xReturn = pdTRUE;
 80138e2:	2301      	movs	r3, #1
 80138e4:	617b      	str	r3, [r7, #20]
			}

			pxCurrentTCB->ucNotifyState = taskNOT_WAITING_NOTIFICATION;
 80138e6:	4b06      	ldr	r3, [pc, #24]	@ (8013900 <xTaskNotifyWait+0xb8>)
 80138e8:	681b      	ldr	r3, [r3, #0]
 80138ea:	2200      	movs	r2, #0
 80138ec:	f883 20a4 	strb.w	r2, [r3, #164]	@ 0xa4
		}
		taskEXIT_CRITICAL();
 80138f0:	f000 feec 	bl	80146cc <vPortExitCritical>

		return xReturn;
 80138f4:	697b      	ldr	r3, [r7, #20]
	}
 80138f6:	4618      	mov	r0, r3
 80138f8:	3718      	adds	r7, #24
 80138fa:	46bd      	mov	sp, r7
 80138fc:	bd80      	pop	{r7, pc}
 80138fe:	bf00      	nop
 8013900:	24002df4 	.word	0x24002df4
 8013904:	e000ed04 	.word	0xe000ed04

08013908 <xTaskGenericNotify>:
/*-----------------------------------------------------------*/

#if( configUSE_TASK_NOTIFICATIONS == 1 )

	BaseType_t xTaskGenericNotify( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotificationValue )
	{
 8013908:	b580      	push	{r7, lr}
 801390a:	b08a      	sub	sp, #40	@ 0x28
 801390c:	af00      	add	r7, sp, #0
 801390e:	60f8      	str	r0, [r7, #12]
 8013910:	60b9      	str	r1, [r7, #8]
 8013912:	603b      	str	r3, [r7, #0]
 8013914:	4613      	mov	r3, r2
 8013916:	71fb      	strb	r3, [r7, #7]
	TCB_t * pxTCB;
	BaseType_t xReturn = pdPASS;
 8013918:	2301      	movs	r3, #1
 801391a:	627b      	str	r3, [r7, #36]	@ 0x24
	uint8_t ucOriginalNotifyState;

		configASSERT( xTaskToNotify );
 801391c:	68fb      	ldr	r3, [r7, #12]
 801391e:	2b00      	cmp	r3, #0
 8013920:	d10b      	bne.n	801393a <xTaskGenericNotify+0x32>
	__asm volatile
 8013922:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8013926:	f383 8811 	msr	BASEPRI, r3
 801392a:	f3bf 8f6f 	isb	sy
 801392e:	f3bf 8f4f 	dsb	sy
 8013932:	61bb      	str	r3, [r7, #24]
}
 8013934:	bf00      	nop
 8013936:	bf00      	nop
 8013938:	e7fd      	b.n	8013936 <xTaskGenericNotify+0x2e>
		pxTCB = xTaskToNotify;
 801393a:	68fb      	ldr	r3, [r7, #12]
 801393c:	623b      	str	r3, [r7, #32]

		taskENTER_CRITICAL();
 801393e:	f000 fe93 	bl	8014668 <vPortEnterCritical>
		{
			if( pulPreviousNotificationValue != NULL )
 8013942:	683b      	ldr	r3, [r7, #0]
 8013944:	2b00      	cmp	r3, #0
 8013946:	d004      	beq.n	8013952 <xTaskGenericNotify+0x4a>
			{
				*pulPreviousNotificationValue = pxTCB->ulNotifiedValue;
 8013948:	6a3b      	ldr	r3, [r7, #32]
 801394a:	f8d3 20a0 	ldr.w	r2, [r3, #160]	@ 0xa0
 801394e:	683b      	ldr	r3, [r7, #0]
 8013950:	601a      	str	r2, [r3, #0]
			}

			ucOriginalNotifyState = pxTCB->ucNotifyState;
 8013952:	6a3b      	ldr	r3, [r7, #32]
 8013954:	f893 30a4 	ldrb.w	r3, [r3, #164]	@ 0xa4
 8013958:	77fb      	strb	r3, [r7, #31]

			pxTCB->ucNotifyState = taskNOTIFICATION_RECEIVED;
 801395a:	6a3b      	ldr	r3, [r7, #32]
 801395c:	2202      	movs	r2, #2
 801395e:	f883 20a4 	strb.w	r2, [r3, #164]	@ 0xa4

			switch( eAction )
 8013962:	79fb      	ldrb	r3, [r7, #7]
 8013964:	2b04      	cmp	r3, #4
 8013966:	d82e      	bhi.n	80139c6 <xTaskGenericNotify+0xbe>
 8013968:	a201      	add	r2, pc, #4	@ (adr r2, 8013970 <xTaskGenericNotify+0x68>)
 801396a:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 801396e:	bf00      	nop
 8013970:	080139eb 	.word	0x080139eb
 8013974:	08013985 	.word	0x08013985
 8013978:	08013997 	.word	0x08013997
 801397c:	080139a7 	.word	0x080139a7
 8013980:	080139b1 	.word	0x080139b1
			{
				case eSetBits	:
					pxTCB->ulNotifiedValue |= ulValue;
 8013984:	6a3b      	ldr	r3, [r7, #32]
 8013986:	f8d3 20a0 	ldr.w	r2, [r3, #160]	@ 0xa0
 801398a:	68bb      	ldr	r3, [r7, #8]
 801398c:	431a      	orrs	r2, r3
 801398e:	6a3b      	ldr	r3, [r7, #32]
 8013990:	f8c3 20a0 	str.w	r2, [r3, #160]	@ 0xa0
					break;
 8013994:	e02c      	b.n	80139f0 <xTaskGenericNotify+0xe8>

				case eIncrement	:
					( pxTCB->ulNotifiedValue )++;
 8013996:	6a3b      	ldr	r3, [r7, #32]
 8013998:	f8d3 30a0 	ldr.w	r3, [r3, #160]	@ 0xa0
 801399c:	1c5a      	adds	r2, r3, #1
 801399e:	6a3b      	ldr	r3, [r7, #32]
 80139a0:	f8c3 20a0 	str.w	r2, [r3, #160]	@ 0xa0
					break;
 80139a4:	e024      	b.n	80139f0 <xTaskGenericNotify+0xe8>

				case eSetValueWithOverwrite	:
					pxTCB->ulNotifiedValue = ulValue;
 80139a6:	6a3b      	ldr	r3, [r7, #32]
 80139a8:	68ba      	ldr	r2, [r7, #8]
 80139aa:	f8c3 20a0 	str.w	r2, [r3, #160]	@ 0xa0
					break;
 80139ae:	e01f      	b.n	80139f0 <xTaskGenericNotify+0xe8>

				case eSetValueWithoutOverwrite :
					if( ucOriginalNotifyState != taskNOTIFICATION_RECEIVED )
 80139b0:	7ffb      	ldrb	r3, [r7, #31]
 80139b2:	2b02      	cmp	r3, #2
 80139b4:	d004      	beq.n	80139c0 <xTaskGenericNotify+0xb8>
					{
						pxTCB->ulNotifiedValue = ulValue;
 80139b6:	6a3b      	ldr	r3, [r7, #32]
 80139b8:	68ba      	ldr	r2, [r7, #8]
 80139ba:	f8c3 20a0 	str.w	r2, [r3, #160]	@ 0xa0
					else
					{
						/* The value could not be written to the task. */
						xReturn = pdFAIL;
					}
					break;
 80139be:	e017      	b.n	80139f0 <xTaskGenericNotify+0xe8>
						xReturn = pdFAIL;
 80139c0:	2300      	movs	r3, #0
 80139c2:	627b      	str	r3, [r7, #36]	@ 0x24
					break;
 80139c4:	e014      	b.n	80139f0 <xTaskGenericNotify+0xe8>

				default:
					/* Should not get here if all enums are handled.
					Artificially force an assert by testing a value the
					compiler can't assume is const. */
					configASSERT( pxTCB->ulNotifiedValue == ~0UL );
 80139c6:	6a3b      	ldr	r3, [r7, #32]
 80139c8:	f8d3 30a0 	ldr.w	r3, [r3, #160]	@ 0xa0
 80139cc:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 80139d0:	d00d      	beq.n	80139ee <xTaskGenericNotify+0xe6>
	__asm volatile
 80139d2:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80139d6:	f383 8811 	msr	BASEPRI, r3
 80139da:	f3bf 8f6f 	isb	sy
 80139de:	f3bf 8f4f 	dsb	sy
 80139e2:	617b      	str	r3, [r7, #20]
}
 80139e4:	bf00      	nop
 80139e6:	bf00      	nop
 80139e8:	e7fd      	b.n	80139e6 <xTaskGenericNotify+0xde>
					break;
 80139ea:	bf00      	nop
 80139ec:	e000      	b.n	80139f0 <xTaskGenericNotify+0xe8>

					break;
 80139ee:	bf00      	nop

			traceTASK_NOTIFY();

			/* If the task is in the blocked state specifically to wait for a
			notification then unblock it now. */
			if( ucOriginalNotifyState == taskWAITING_NOTIFICATION )
 80139f0:	7ffb      	ldrb	r3, [r7, #31]
 80139f2:	2b01      	cmp	r3, #1
 80139f4:	d13b      	bne.n	8013a6e <xTaskGenericNotify+0x166>
			{
				( void ) uxListRemove( &( pxTCB->xStateListItem ) );
 80139f6:	6a3b      	ldr	r3, [r7, #32]
 80139f8:	3304      	adds	r3, #4
 80139fa:	4618      	mov	r0, r3
 80139fc:	f7fd fa02 	bl	8010e04 <uxListRemove>
				prvAddTaskToReadyList( pxTCB );
 8013a00:	6a3b      	ldr	r3, [r7, #32]
 8013a02:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8013a04:	4b1d      	ldr	r3, [pc, #116]	@ (8013a7c <xTaskGenericNotify+0x174>)
 8013a06:	681b      	ldr	r3, [r3, #0]
 8013a08:	429a      	cmp	r2, r3
 8013a0a:	d903      	bls.n	8013a14 <xTaskGenericNotify+0x10c>
 8013a0c:	6a3b      	ldr	r3, [r7, #32]
 8013a0e:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8013a10:	4a1a      	ldr	r2, [pc, #104]	@ (8013a7c <xTaskGenericNotify+0x174>)
 8013a12:	6013      	str	r3, [r2, #0]
 8013a14:	6a3b      	ldr	r3, [r7, #32]
 8013a16:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8013a18:	4613      	mov	r3, r2
 8013a1a:	009b      	lsls	r3, r3, #2
 8013a1c:	4413      	add	r3, r2
 8013a1e:	009b      	lsls	r3, r3, #2
 8013a20:	4a17      	ldr	r2, [pc, #92]	@ (8013a80 <xTaskGenericNotify+0x178>)
 8013a22:	441a      	add	r2, r3
 8013a24:	6a3b      	ldr	r3, [r7, #32]
 8013a26:	3304      	adds	r3, #4
 8013a28:	4619      	mov	r1, r3
 8013a2a:	4610      	mov	r0, r2
 8013a2c:	f7fd f98d 	bl	8010d4a <vListInsertEnd>

				/* The task should not have been on an event list. */
				configASSERT( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) == NULL );
 8013a30:	6a3b      	ldr	r3, [r7, #32]
 8013a32:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 8013a34:	2b00      	cmp	r3, #0
 8013a36:	d00b      	beq.n	8013a50 <xTaskGenericNotify+0x148>
	__asm volatile
 8013a38:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8013a3c:	f383 8811 	msr	BASEPRI, r3
 8013a40:	f3bf 8f6f 	isb	sy
 8013a44:	f3bf 8f4f 	dsb	sy
 8013a48:	613b      	str	r3, [r7, #16]
}
 8013a4a:	bf00      	nop
 8013a4c:	bf00      	nop
 8013a4e:	e7fd      	b.n	8013a4c <xTaskGenericNotify+0x144>
					earliest possible time. */
					prvResetNextTaskUnblockTime();
				}
				#endif

				if( pxTCB->uxPriority > pxCurrentTCB->uxPriority )
 8013a50:	6a3b      	ldr	r3, [r7, #32]
 8013a52:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8013a54:	4b0b      	ldr	r3, [pc, #44]	@ (8013a84 <xTaskGenericNotify+0x17c>)
 8013a56:	681b      	ldr	r3, [r3, #0]
 8013a58:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8013a5a:	429a      	cmp	r2, r3
 8013a5c:	d907      	bls.n	8013a6e <xTaskGenericNotify+0x166>
				{
					/* The notified task has a priority above the currently
					executing task so a yield is required. */
					taskYIELD_IF_USING_PREEMPTION();
 8013a5e:	4b0a      	ldr	r3, [pc, #40]	@ (8013a88 <xTaskGenericNotify+0x180>)
 8013a60:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8013a64:	601a      	str	r2, [r3, #0]
 8013a66:	f3bf 8f4f 	dsb	sy
 8013a6a:	f3bf 8f6f 	isb	sy
			else
			{
				mtCOVERAGE_TEST_MARKER();
			}
		}
		taskEXIT_CRITICAL();
 8013a6e:	f000 fe2d 	bl	80146cc <vPortExitCritical>

		return xReturn;
 8013a72:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
	}
 8013a74:	4618      	mov	r0, r3
 8013a76:	3728      	adds	r7, #40	@ 0x28
 8013a78:	46bd      	mov	sp, r7
 8013a7a:	bd80      	pop	{r7, pc}
 8013a7c:	240032d0 	.word	0x240032d0
 8013a80:	24002df8 	.word	0x24002df8
 8013a84:	24002df4 	.word	0x24002df4
 8013a88:	e000ed04 	.word	0xe000ed04

08013a8c <xTaskGenericNotifyFromISR>:
/*-----------------------------------------------------------*/

#if( configUSE_TASK_NOTIFICATIONS == 1 )

	BaseType_t xTaskGenericNotifyFromISR( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotificationValue, BaseType_t *pxHigherPriorityTaskWoken )
	{
 8013a8c:	b580      	push	{r7, lr}
 8013a8e:	b08e      	sub	sp, #56	@ 0x38
 8013a90:	af00      	add	r7, sp, #0
 8013a92:	60f8      	str	r0, [r7, #12]
 8013a94:	60b9      	str	r1, [r7, #8]
 8013a96:	603b      	str	r3, [r7, #0]
 8013a98:	4613      	mov	r3, r2
 8013a9a:	71fb      	strb	r3, [r7, #7]
	TCB_t * pxTCB;
	uint8_t ucOriginalNotifyState;
	BaseType_t xReturn = pdPASS;
 8013a9c:	2301      	movs	r3, #1
 8013a9e:	637b      	str	r3, [r7, #52]	@ 0x34
	UBaseType_t uxSavedInterruptStatus;

		configASSERT( xTaskToNotify );
 8013aa0:	68fb      	ldr	r3, [r7, #12]
 8013aa2:	2b00      	cmp	r3, #0
 8013aa4:	d10b      	bne.n	8013abe <xTaskGenericNotifyFromISR+0x32>
	__asm volatile
 8013aa6:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8013aaa:	f383 8811 	msr	BASEPRI, r3
 8013aae:	f3bf 8f6f 	isb	sy
 8013ab2:	f3bf 8f4f 	dsb	sy
 8013ab6:	627b      	str	r3, [r7, #36]	@ 0x24
}
 8013ab8:	bf00      	nop
 8013aba:	bf00      	nop
 8013abc:	e7fd      	b.n	8013aba <xTaskGenericNotifyFromISR+0x2e>
		below the maximum system call interrupt priority.  FreeRTOS maintains a
		separate interrupt safe API to ensure interrupt entry is as fast and as
		simple as possible.  More information (albeit Cortex-M specific) is
		provided on the following link:
		http://www.freertos.org/RTOS-Cortex-M3-M4.html */
		portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
 8013abe:	f000 feb3 	bl	8014828 <vPortValidateInterruptPriority>

		pxTCB = xTaskToNotify;
 8013ac2:	68fb      	ldr	r3, [r7, #12]
 8013ac4:	633b      	str	r3, [r7, #48]	@ 0x30
	__asm volatile
 8013ac6:	f3ef 8211 	mrs	r2, BASEPRI
 8013aca:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8013ace:	f383 8811 	msr	BASEPRI, r3
 8013ad2:	f3bf 8f6f 	isb	sy
 8013ad6:	f3bf 8f4f 	dsb	sy
 8013ada:	623a      	str	r2, [r7, #32]
 8013adc:	61fb      	str	r3, [r7, #28]
	return ulOriginalBASEPRI;
 8013ade:	6a3b      	ldr	r3, [r7, #32]

		uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
 8013ae0:	62fb      	str	r3, [r7, #44]	@ 0x2c
		{
			if( pulPreviousNotificationValue != NULL )
 8013ae2:	683b      	ldr	r3, [r7, #0]
 8013ae4:	2b00      	cmp	r3, #0
 8013ae6:	d004      	beq.n	8013af2 <xTaskGenericNotifyFromISR+0x66>
			{
				*pulPreviousNotificationValue = pxTCB->ulNotifiedValue;
 8013ae8:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013aea:	f8d3 20a0 	ldr.w	r2, [r3, #160]	@ 0xa0
 8013aee:	683b      	ldr	r3, [r7, #0]
 8013af0:	601a      	str	r2, [r3, #0]
			}

			ucOriginalNotifyState = pxTCB->ucNotifyState;
 8013af2:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013af4:	f893 30a4 	ldrb.w	r3, [r3, #164]	@ 0xa4
 8013af8:	f887 302b 	strb.w	r3, [r7, #43]	@ 0x2b
			pxTCB->ucNotifyState = taskNOTIFICATION_RECEIVED;
 8013afc:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013afe:	2202      	movs	r2, #2
 8013b00:	f883 20a4 	strb.w	r2, [r3, #164]	@ 0xa4

			switch( eAction )
 8013b04:	79fb      	ldrb	r3, [r7, #7]
 8013b06:	2b04      	cmp	r3, #4
 8013b08:	d82e      	bhi.n	8013b68 <xTaskGenericNotifyFromISR+0xdc>
 8013b0a:	a201      	add	r2, pc, #4	@ (adr r2, 8013b10 <xTaskGenericNotifyFromISR+0x84>)
 8013b0c:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 8013b10:	08013b8d 	.word	0x08013b8d
 8013b14:	08013b25 	.word	0x08013b25
 8013b18:	08013b37 	.word	0x08013b37
 8013b1c:	08013b47 	.word	0x08013b47
 8013b20:	08013b51 	.word	0x08013b51
			{
				case eSetBits	:
					pxTCB->ulNotifiedValue |= ulValue;
 8013b24:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013b26:	f8d3 20a0 	ldr.w	r2, [r3, #160]	@ 0xa0
 8013b2a:	68bb      	ldr	r3, [r7, #8]
 8013b2c:	431a      	orrs	r2, r3
 8013b2e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013b30:	f8c3 20a0 	str.w	r2, [r3, #160]	@ 0xa0
					break;
 8013b34:	e02d      	b.n	8013b92 <xTaskGenericNotifyFromISR+0x106>

				case eIncrement	:
					( pxTCB->ulNotifiedValue )++;
 8013b36:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013b38:	f8d3 30a0 	ldr.w	r3, [r3, #160]	@ 0xa0
 8013b3c:	1c5a      	adds	r2, r3, #1
 8013b3e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013b40:	f8c3 20a0 	str.w	r2, [r3, #160]	@ 0xa0
					break;
 8013b44:	e025      	b.n	8013b92 <xTaskGenericNotifyFromISR+0x106>

				case eSetValueWithOverwrite	:
					pxTCB->ulNotifiedValue = ulValue;
 8013b46:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013b48:	68ba      	ldr	r2, [r7, #8]
 8013b4a:	f8c3 20a0 	str.w	r2, [r3, #160]	@ 0xa0
					break;
 8013b4e:	e020      	b.n	8013b92 <xTaskGenericNotifyFromISR+0x106>

				case eSetValueWithoutOverwrite :
					if( ucOriginalNotifyState != taskNOTIFICATION_RECEIVED )
 8013b50:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 8013b54:	2b02      	cmp	r3, #2
 8013b56:	d004      	beq.n	8013b62 <xTaskGenericNotifyFromISR+0xd6>
					{
						pxTCB->ulNotifiedValue = ulValue;
 8013b58:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013b5a:	68ba      	ldr	r2, [r7, #8]
 8013b5c:	f8c3 20a0 	str.w	r2, [r3, #160]	@ 0xa0
					else
					{
						/* The value could not be written to the task. */
						xReturn = pdFAIL;
					}
					break;
 8013b60:	e017      	b.n	8013b92 <xTaskGenericNotifyFromISR+0x106>
						xReturn = pdFAIL;
 8013b62:	2300      	movs	r3, #0
 8013b64:	637b      	str	r3, [r7, #52]	@ 0x34
					break;
 8013b66:	e014      	b.n	8013b92 <xTaskGenericNotifyFromISR+0x106>

				default:
					/* Should not get here if all enums are handled.
					Artificially force an assert by testing a value the
					compiler can't assume is const. */
					configASSERT( pxTCB->ulNotifiedValue == ~0UL );
 8013b68:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013b6a:	f8d3 30a0 	ldr.w	r3, [r3, #160]	@ 0xa0
 8013b6e:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8013b72:	d00d      	beq.n	8013b90 <xTaskGenericNotifyFromISR+0x104>
	__asm volatile
 8013b74:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8013b78:	f383 8811 	msr	BASEPRI, r3
 8013b7c:	f3bf 8f6f 	isb	sy
 8013b80:	f3bf 8f4f 	dsb	sy
 8013b84:	61bb      	str	r3, [r7, #24]
}
 8013b86:	bf00      	nop
 8013b88:	bf00      	nop
 8013b8a:	e7fd      	b.n	8013b88 <xTaskGenericNotifyFromISR+0xfc>
					break;
 8013b8c:	bf00      	nop
 8013b8e:	e000      	b.n	8013b92 <xTaskGenericNotifyFromISR+0x106>
					break;
 8013b90:	bf00      	nop

			traceTASK_NOTIFY_FROM_ISR();

			/* If the task is in the blocked state specifically to wait for a
			notification then unblock it now. */
			if( ucOriginalNotifyState == taskWAITING_NOTIFICATION )
 8013b92:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 8013b96:	2b01      	cmp	r3, #1
 8013b98:	d147      	bne.n	8013c2a <xTaskGenericNotifyFromISR+0x19e>
			{
				/* The task should not have been on an event list. */
				configASSERT( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) == NULL );
 8013b9a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013b9c:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 8013b9e:	2b00      	cmp	r3, #0
 8013ba0:	d00b      	beq.n	8013bba <xTaskGenericNotifyFromISR+0x12e>
	__asm volatile
 8013ba2:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8013ba6:	f383 8811 	msr	BASEPRI, r3
 8013baa:	f3bf 8f6f 	isb	sy
 8013bae:	f3bf 8f4f 	dsb	sy
 8013bb2:	617b      	str	r3, [r7, #20]
}
 8013bb4:	bf00      	nop
 8013bb6:	bf00      	nop
 8013bb8:	e7fd      	b.n	8013bb6 <xTaskGenericNotifyFromISR+0x12a>

				if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
 8013bba:	4b21      	ldr	r3, [pc, #132]	@ (8013c40 <xTaskGenericNotifyFromISR+0x1b4>)
 8013bbc:	681b      	ldr	r3, [r3, #0]
 8013bbe:	2b00      	cmp	r3, #0
 8013bc0:	d11d      	bne.n	8013bfe <xTaskGenericNotifyFromISR+0x172>
				{
					( void ) uxListRemove( &( pxTCB->xStateListItem ) );
 8013bc2:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013bc4:	3304      	adds	r3, #4
 8013bc6:	4618      	mov	r0, r3
 8013bc8:	f7fd f91c 	bl	8010e04 <uxListRemove>
					prvAddTaskToReadyList( pxTCB );
 8013bcc:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013bce:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8013bd0:	4b1c      	ldr	r3, [pc, #112]	@ (8013c44 <xTaskGenericNotifyFromISR+0x1b8>)
 8013bd2:	681b      	ldr	r3, [r3, #0]
 8013bd4:	429a      	cmp	r2, r3
 8013bd6:	d903      	bls.n	8013be0 <xTaskGenericNotifyFromISR+0x154>
 8013bd8:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013bda:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8013bdc:	4a19      	ldr	r2, [pc, #100]	@ (8013c44 <xTaskGenericNotifyFromISR+0x1b8>)
 8013bde:	6013      	str	r3, [r2, #0]
 8013be0:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013be2:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8013be4:	4613      	mov	r3, r2
 8013be6:	009b      	lsls	r3, r3, #2
 8013be8:	4413      	add	r3, r2
 8013bea:	009b      	lsls	r3, r3, #2
 8013bec:	4a16      	ldr	r2, [pc, #88]	@ (8013c48 <xTaskGenericNotifyFromISR+0x1bc>)
 8013bee:	441a      	add	r2, r3
 8013bf0:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013bf2:	3304      	adds	r3, #4
 8013bf4:	4619      	mov	r1, r3
 8013bf6:	4610      	mov	r0, r2
 8013bf8:	f7fd f8a7 	bl	8010d4a <vListInsertEnd>
 8013bfc:	e005      	b.n	8013c0a <xTaskGenericNotifyFromISR+0x17e>
				}
				else
				{
					/* The delayed and ready lists cannot be accessed, so hold
					this task pending until the scheduler is resumed. */
					vListInsertEnd( &( xPendingReadyList ), &( pxTCB->xEventListItem ) );
 8013bfe:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013c00:	3318      	adds	r3, #24
 8013c02:	4619      	mov	r1, r3
 8013c04:	4811      	ldr	r0, [pc, #68]	@ (8013c4c <xTaskGenericNotifyFromISR+0x1c0>)
 8013c06:	f7fd f8a0 	bl	8010d4a <vListInsertEnd>
				}

				if( pxTCB->uxPriority > pxCurrentTCB->uxPriority )
 8013c0a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013c0c:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8013c0e:	4b10      	ldr	r3, [pc, #64]	@ (8013c50 <xTaskGenericNotifyFromISR+0x1c4>)
 8013c10:	681b      	ldr	r3, [r3, #0]
 8013c12:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8013c14:	429a      	cmp	r2, r3
 8013c16:	d908      	bls.n	8013c2a <xTaskGenericNotifyFromISR+0x19e>
				{
					/* The notified task has a priority above the currently
					executing task so a yield is required. */
					if( pxHigherPriorityTaskWoken != NULL )
 8013c18:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8013c1a:	2b00      	cmp	r3, #0
 8013c1c:	d002      	beq.n	8013c24 <xTaskGenericNotifyFromISR+0x198>
					{
						*pxHigherPriorityTaskWoken = pdTRUE;
 8013c1e:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8013c20:	2201      	movs	r2, #1
 8013c22:	601a      	str	r2, [r3, #0]
					}

					/* Mark that a yield is pending in case the user is not
					using the "xHigherPriorityTaskWoken" parameter to an ISR
					safe FreeRTOS function. */
					xYieldPending = pdTRUE;
 8013c24:	4b0b      	ldr	r3, [pc, #44]	@ (8013c54 <xTaskGenericNotifyFromISR+0x1c8>)
 8013c26:	2201      	movs	r2, #1
 8013c28:	601a      	str	r2, [r3, #0]
 8013c2a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8013c2c:	613b      	str	r3, [r7, #16]
	__asm volatile
 8013c2e:	693b      	ldr	r3, [r7, #16]
 8013c30:	f383 8811 	msr	BASEPRI, r3
}
 8013c34:	bf00      	nop
				}
			}
		}
		portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );

		return xReturn;
 8013c36:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
	}
 8013c38:	4618      	mov	r0, r3
 8013c3a:	3738      	adds	r7, #56	@ 0x38
 8013c3c:	46bd      	mov	sp, r7
 8013c3e:	bd80      	pop	{r7, pc}
 8013c40:	240032f0 	.word	0x240032f0
 8013c44:	240032d0 	.word	0x240032d0
 8013c48:	24002df8 	.word	0x24002df8
 8013c4c:	24003288 	.word	0x24003288
 8013c50:	24002df4 	.word	0x24002df4
 8013c54:	240032dc 	.word	0x240032dc

08013c58 <xTaskNotifyStateClear>:
/*-----------------------------------------------------------*/

#if( configUSE_TASK_NOTIFICATIONS == 1 )

	BaseType_t xTaskNotifyStateClear( TaskHandle_t xTask )
	{
 8013c58:	b580      	push	{r7, lr}
 8013c5a:	b084      	sub	sp, #16
 8013c5c:	af00      	add	r7, sp, #0
 8013c5e:	6078      	str	r0, [r7, #4]
	TCB_t *pxTCB;
	BaseType_t xReturn;

		/* If null is passed in here then it is the calling task that is having
		its notification state cleared. */
		pxTCB = prvGetTCBFromHandle( xTask );
 8013c60:	687b      	ldr	r3, [r7, #4]
 8013c62:	2b00      	cmp	r3, #0
 8013c64:	d102      	bne.n	8013c6c <xTaskNotifyStateClear+0x14>
 8013c66:	4b0e      	ldr	r3, [pc, #56]	@ (8013ca0 <xTaskNotifyStateClear+0x48>)
 8013c68:	681b      	ldr	r3, [r3, #0]
 8013c6a:	e000      	b.n	8013c6e <xTaskNotifyStateClear+0x16>
 8013c6c:	687b      	ldr	r3, [r7, #4]
 8013c6e:	60bb      	str	r3, [r7, #8]

		taskENTER_CRITICAL();
 8013c70:	f000 fcfa 	bl	8014668 <vPortEnterCritical>
		{
			if( pxTCB->ucNotifyState == taskNOTIFICATION_RECEIVED )
 8013c74:	68bb      	ldr	r3, [r7, #8]
 8013c76:	f893 30a4 	ldrb.w	r3, [r3, #164]	@ 0xa4
 8013c7a:	b2db      	uxtb	r3, r3
 8013c7c:	2b02      	cmp	r3, #2
 8013c7e:	d106      	bne.n	8013c8e <xTaskNotifyStateClear+0x36>
			{
				pxTCB->ucNotifyState = taskNOT_WAITING_NOTIFICATION;
 8013c80:	68bb      	ldr	r3, [r7, #8]
 8013c82:	2200      	movs	r2, #0
 8013c84:	f883 20a4 	strb.w	r2, [r3, #164]	@ 0xa4
				xReturn = pdPASS;
 8013c88:	2301      	movs	r3, #1
 8013c8a:	60fb      	str	r3, [r7, #12]
 8013c8c:	e001      	b.n	8013c92 <xTaskNotifyStateClear+0x3a>
			}
			else
			{
				xReturn = pdFAIL;
 8013c8e:	2300      	movs	r3, #0
 8013c90:	60fb      	str	r3, [r7, #12]
			}
		}
		taskEXIT_CRITICAL();
 8013c92:	f000 fd1b 	bl	80146cc <vPortExitCritical>

		return xReturn;
 8013c96:	68fb      	ldr	r3, [r7, #12]
	}
 8013c98:	4618      	mov	r0, r3
 8013c9a:	3710      	adds	r7, #16
 8013c9c:	46bd      	mov	sp, r7
 8013c9e:	bd80      	pop	{r7, pc}
 8013ca0:	24002df4 	.word	0x24002df4

08013ca4 <prvAddCurrentTaskToDelayedList>:

#endif
/*-----------------------------------------------------------*/

static void prvAddCurrentTaskToDelayedList( TickType_t xTicksToWait, const BaseType_t xCanBlockIndefinitely )
{
 8013ca4:	b580      	push	{r7, lr}
 8013ca6:	b084      	sub	sp, #16
 8013ca8:	af00      	add	r7, sp, #0
 8013caa:	6078      	str	r0, [r7, #4]
 8013cac:	6039      	str	r1, [r7, #0]
TickType_t xTimeToWake;
const TickType_t xConstTickCount = xTickCount;
 8013cae:	4b21      	ldr	r3, [pc, #132]	@ (8013d34 <prvAddCurrentTaskToDelayedList+0x90>)
 8013cb0:	681b      	ldr	r3, [r3, #0]
 8013cb2:	60fb      	str	r3, [r7, #12]
	}
	#endif

	/* Remove the task from the ready list before adding it to the blocked list
	as the same list item is used for both lists. */
	if( uxListRemove( &( pxCurrentTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
 8013cb4:	4b20      	ldr	r3, [pc, #128]	@ (8013d38 <prvAddCurrentTaskToDelayedList+0x94>)
 8013cb6:	681b      	ldr	r3, [r3, #0]
 8013cb8:	3304      	adds	r3, #4
 8013cba:	4618      	mov	r0, r3
 8013cbc:	f7fd f8a2 	bl	8010e04 <uxListRemove>
		mtCOVERAGE_TEST_MARKER();
	}

	#if ( INCLUDE_vTaskSuspend == 1 )
	{
		if( ( xTicksToWait == portMAX_DELAY ) && ( xCanBlockIndefinitely != pdFALSE ) )
 8013cc0:	687b      	ldr	r3, [r7, #4]
 8013cc2:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8013cc6:	d10a      	bne.n	8013cde <prvAddCurrentTaskToDelayedList+0x3a>
 8013cc8:	683b      	ldr	r3, [r7, #0]
 8013cca:	2b00      	cmp	r3, #0
 8013ccc:	d007      	beq.n	8013cde <prvAddCurrentTaskToDelayedList+0x3a>
		{
			/* Add the task to the suspended task list instead of a delayed task
			list to ensure it is not woken by a timing event.  It will block
			indefinitely. */
			vListInsertEnd( &xSuspendedTaskList, &( pxCurrentTCB->xStateListItem ) );
 8013cce:	4b1a      	ldr	r3, [pc, #104]	@ (8013d38 <prvAddCurrentTaskToDelayedList+0x94>)
 8013cd0:	681b      	ldr	r3, [r3, #0]
 8013cd2:	3304      	adds	r3, #4
 8013cd4:	4619      	mov	r1, r3
 8013cd6:	4819      	ldr	r0, [pc, #100]	@ (8013d3c <prvAddCurrentTaskToDelayedList+0x98>)
 8013cd8:	f7fd f837 	bl	8010d4a <vListInsertEnd>

		/* Avoid compiler warning when INCLUDE_vTaskSuspend is not 1. */
		( void ) xCanBlockIndefinitely;
	}
	#endif /* INCLUDE_vTaskSuspend */
}
 8013cdc:	e026      	b.n	8013d2c <prvAddCurrentTaskToDelayedList+0x88>
			xTimeToWake = xConstTickCount + xTicksToWait;
 8013cde:	68fa      	ldr	r2, [r7, #12]
 8013ce0:	687b      	ldr	r3, [r7, #4]
 8013ce2:	4413      	add	r3, r2
 8013ce4:	60bb      	str	r3, [r7, #8]
			listSET_LIST_ITEM_VALUE( &( pxCurrentTCB->xStateListItem ), xTimeToWake );
 8013ce6:	4b14      	ldr	r3, [pc, #80]	@ (8013d38 <prvAddCurrentTaskToDelayedList+0x94>)
 8013ce8:	681b      	ldr	r3, [r3, #0]
 8013cea:	68ba      	ldr	r2, [r7, #8]
 8013cec:	605a      	str	r2, [r3, #4]
			if( xTimeToWake < xConstTickCount )
 8013cee:	68ba      	ldr	r2, [r7, #8]
 8013cf0:	68fb      	ldr	r3, [r7, #12]
 8013cf2:	429a      	cmp	r2, r3
 8013cf4:	d209      	bcs.n	8013d0a <prvAddCurrentTaskToDelayedList+0x66>
				vListInsert( pxOverflowDelayedTaskList, &( pxCurrentTCB->xStateListItem ) );
 8013cf6:	4b12      	ldr	r3, [pc, #72]	@ (8013d40 <prvAddCurrentTaskToDelayedList+0x9c>)
 8013cf8:	681a      	ldr	r2, [r3, #0]
 8013cfa:	4b0f      	ldr	r3, [pc, #60]	@ (8013d38 <prvAddCurrentTaskToDelayedList+0x94>)
 8013cfc:	681b      	ldr	r3, [r3, #0]
 8013cfe:	3304      	adds	r3, #4
 8013d00:	4619      	mov	r1, r3
 8013d02:	4610      	mov	r0, r2
 8013d04:	f7fd f845 	bl	8010d92 <vListInsert>
}
 8013d08:	e010      	b.n	8013d2c <prvAddCurrentTaskToDelayedList+0x88>
				vListInsert( pxDelayedTaskList, &( pxCurrentTCB->xStateListItem ) );
 8013d0a:	4b0e      	ldr	r3, [pc, #56]	@ (8013d44 <prvAddCurrentTaskToDelayedList+0xa0>)
 8013d0c:	681a      	ldr	r2, [r3, #0]
 8013d0e:	4b0a      	ldr	r3, [pc, #40]	@ (8013d38 <prvAddCurrentTaskToDelayedList+0x94>)
 8013d10:	681b      	ldr	r3, [r3, #0]
 8013d12:	3304      	adds	r3, #4
 8013d14:	4619      	mov	r1, r3
 8013d16:	4610      	mov	r0, r2
 8013d18:	f7fd f83b 	bl	8010d92 <vListInsert>
				if( xTimeToWake < xNextTaskUnblockTime )
 8013d1c:	4b0a      	ldr	r3, [pc, #40]	@ (8013d48 <prvAddCurrentTaskToDelayedList+0xa4>)
 8013d1e:	681b      	ldr	r3, [r3, #0]
 8013d20:	68ba      	ldr	r2, [r7, #8]
 8013d22:	429a      	cmp	r2, r3
 8013d24:	d202      	bcs.n	8013d2c <prvAddCurrentTaskToDelayedList+0x88>
					xNextTaskUnblockTime = xTimeToWake;
 8013d26:	4a08      	ldr	r2, [pc, #32]	@ (8013d48 <prvAddCurrentTaskToDelayedList+0xa4>)
 8013d28:	68bb      	ldr	r3, [r7, #8]
 8013d2a:	6013      	str	r3, [r2, #0]
}
 8013d2c:	bf00      	nop
 8013d2e:	3710      	adds	r7, #16
 8013d30:	46bd      	mov	sp, r7
 8013d32:	bd80      	pop	{r7, pc}
 8013d34:	240032cc 	.word	0x240032cc
 8013d38:	24002df4 	.word	0x24002df4
 8013d3c:	240032b4 	.word	0x240032b4
 8013d40:	24003284 	.word	0x24003284
 8013d44:	24003280 	.word	0x24003280
 8013d48:	240032e8 	.word	0x240032e8

08013d4c <xTimerCreateTimerTask>:
									TimerCallbackFunction_t pxCallbackFunction,
									Timer_t *pxNewTimer ) PRIVILEGED_FUNCTION;
/*-----------------------------------------------------------*/

BaseType_t xTimerCreateTimerTask( void )
{
 8013d4c:	b580      	push	{r7, lr}
 8013d4e:	b08a      	sub	sp, #40	@ 0x28
 8013d50:	af04      	add	r7, sp, #16
BaseType_t xReturn = pdFAIL;
 8013d52:	2300      	movs	r3, #0
 8013d54:	617b      	str	r3, [r7, #20]

	/* This function is called when the scheduler is started if
	configUSE_TIMERS is set to 1.  Check that the infrastructure used by the
	timer service task has been created/initialised.  If timers have already
	been created then the initialisation will already have been performed. */
	prvCheckForValidListAndQueue();
 8013d56:	f000 fb13 	bl	8014380 <prvCheckForValidListAndQueue>

	if( xTimerQueue != NULL )
 8013d5a:	4b1d      	ldr	r3, [pc, #116]	@ (8013dd0 <xTimerCreateTimerTask+0x84>)
 8013d5c:	681b      	ldr	r3, [r3, #0]
 8013d5e:	2b00      	cmp	r3, #0
 8013d60:	d021      	beq.n	8013da6 <xTimerCreateTimerTask+0x5a>
	{
		#if( configSUPPORT_STATIC_ALLOCATION == 1 )
		{
			StaticTask_t *pxTimerTaskTCBBuffer = NULL;
 8013d62:	2300      	movs	r3, #0
 8013d64:	60fb      	str	r3, [r7, #12]
			StackType_t *pxTimerTaskStackBuffer = NULL;
 8013d66:	2300      	movs	r3, #0
 8013d68:	60bb      	str	r3, [r7, #8]
			uint32_t ulTimerTaskStackSize;

			vApplicationGetTimerTaskMemory( &pxTimerTaskTCBBuffer, &pxTimerTaskStackBuffer, &ulTimerTaskStackSize );
 8013d6a:	1d3a      	adds	r2, r7, #4
 8013d6c:	f107 0108 	add.w	r1, r7, #8
 8013d70:	f107 030c 	add.w	r3, r7, #12
 8013d74:	4618      	mov	r0, r3
 8013d76:	f7fc ffa1 	bl	8010cbc <vApplicationGetTimerTaskMemory>
			xTimerTaskHandle = xTaskCreateStatic(	prvTimerTask,
 8013d7a:	6879      	ldr	r1, [r7, #4]
 8013d7c:	68bb      	ldr	r3, [r7, #8]
 8013d7e:	68fa      	ldr	r2, [r7, #12]
 8013d80:	9202      	str	r2, [sp, #8]
 8013d82:	9301      	str	r3, [sp, #4]
 8013d84:	2302      	movs	r3, #2
 8013d86:	9300      	str	r3, [sp, #0]
 8013d88:	2300      	movs	r3, #0
 8013d8a:	460a      	mov	r2, r1
 8013d8c:	4911      	ldr	r1, [pc, #68]	@ (8013dd4 <xTimerCreateTimerTask+0x88>)
 8013d8e:	4812      	ldr	r0, [pc, #72]	@ (8013dd8 <xTimerCreateTimerTask+0x8c>)
 8013d90:	f7fe fd1c 	bl	80127cc <xTaskCreateStatic>
 8013d94:	4603      	mov	r3, r0
 8013d96:	4a11      	ldr	r2, [pc, #68]	@ (8013ddc <xTimerCreateTimerTask+0x90>)
 8013d98:	6013      	str	r3, [r2, #0]
													NULL,
													( ( UBaseType_t ) configTIMER_TASK_PRIORITY ) | portPRIVILEGE_BIT,
													pxTimerTaskStackBuffer,
													pxTimerTaskTCBBuffer );

			if( xTimerTaskHandle != NULL )
 8013d9a:	4b10      	ldr	r3, [pc, #64]	@ (8013ddc <xTimerCreateTimerTask+0x90>)
 8013d9c:	681b      	ldr	r3, [r3, #0]
 8013d9e:	2b00      	cmp	r3, #0
 8013da0:	d001      	beq.n	8013da6 <xTimerCreateTimerTask+0x5a>
			{
				xReturn = pdPASS;
 8013da2:	2301      	movs	r3, #1
 8013da4:	617b      	str	r3, [r7, #20]
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}

	configASSERT( xReturn );
 8013da6:	697b      	ldr	r3, [r7, #20]
 8013da8:	2b00      	cmp	r3, #0
 8013daa:	d10b      	bne.n	8013dc4 <xTimerCreateTimerTask+0x78>
	__asm volatile
 8013dac:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8013db0:	f383 8811 	msr	BASEPRI, r3
 8013db4:	f3bf 8f6f 	isb	sy
 8013db8:	f3bf 8f4f 	dsb	sy
 8013dbc:	613b      	str	r3, [r7, #16]
}
 8013dbe:	bf00      	nop
 8013dc0:	bf00      	nop
 8013dc2:	e7fd      	b.n	8013dc0 <xTimerCreateTimerTask+0x74>
	return xReturn;
 8013dc4:	697b      	ldr	r3, [r7, #20]
}
 8013dc6:	4618      	mov	r0, r3
 8013dc8:	3718      	adds	r7, #24
 8013dca:	46bd      	mov	sp, r7
 8013dcc:	bd80      	pop	{r7, pc}
 8013dce:	bf00      	nop
 8013dd0:	24003324 	.word	0x24003324
 8013dd4:	0802c708 	.word	0x0802c708
 8013dd8:	08013f19 	.word	0x08013f19
 8013ddc:	24003328 	.word	0x24003328

08013de0 <xTimerGenericCommand>:
	}
}
/*-----------------------------------------------------------*/

BaseType_t xTimerGenericCommand( TimerHandle_t xTimer, const BaseType_t xCommandID, const TickType_t xOptionalValue, BaseType_t * const pxHigherPriorityTaskWoken, const TickType_t xTicksToWait )
{
 8013de0:	b580      	push	{r7, lr}
 8013de2:	b08a      	sub	sp, #40	@ 0x28
 8013de4:	af00      	add	r7, sp, #0
 8013de6:	60f8      	str	r0, [r7, #12]
 8013de8:	60b9      	str	r1, [r7, #8]
 8013dea:	607a      	str	r2, [r7, #4]
 8013dec:	603b      	str	r3, [r7, #0]
BaseType_t xReturn = pdFAIL;
 8013dee:	2300      	movs	r3, #0
 8013df0:	627b      	str	r3, [r7, #36]	@ 0x24
DaemonTaskMessage_t xMessage;

	configASSERT( xTimer );
 8013df2:	68fb      	ldr	r3, [r7, #12]
 8013df4:	2b00      	cmp	r3, #0
 8013df6:	d10b      	bne.n	8013e10 <xTimerGenericCommand+0x30>
	__asm volatile
 8013df8:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8013dfc:	f383 8811 	msr	BASEPRI, r3
 8013e00:	f3bf 8f6f 	isb	sy
 8013e04:	f3bf 8f4f 	dsb	sy
 8013e08:	623b      	str	r3, [r7, #32]
}
 8013e0a:	bf00      	nop
 8013e0c:	bf00      	nop
 8013e0e:	e7fd      	b.n	8013e0c <xTimerGenericCommand+0x2c>

	/* Send a message to the timer service task to perform a particular action
	on a particular timer definition. */
	if( xTimerQueue != NULL )
 8013e10:	4b19      	ldr	r3, [pc, #100]	@ (8013e78 <xTimerGenericCommand+0x98>)
 8013e12:	681b      	ldr	r3, [r3, #0]
 8013e14:	2b00      	cmp	r3, #0
 8013e16:	d02a      	beq.n	8013e6e <xTimerGenericCommand+0x8e>
	{
		/* Send a command to the timer service task to start the xTimer timer. */
		xMessage.xMessageID = xCommandID;
 8013e18:	68bb      	ldr	r3, [r7, #8]
 8013e1a:	613b      	str	r3, [r7, #16]
		xMessage.u.xTimerParameters.xMessageValue = xOptionalValue;
 8013e1c:	687b      	ldr	r3, [r7, #4]
 8013e1e:	617b      	str	r3, [r7, #20]
		xMessage.u.xTimerParameters.pxTimer = xTimer;
 8013e20:	68fb      	ldr	r3, [r7, #12]
 8013e22:	61bb      	str	r3, [r7, #24]

		if( xCommandID < tmrFIRST_FROM_ISR_COMMAND )
 8013e24:	68bb      	ldr	r3, [r7, #8]
 8013e26:	2b05      	cmp	r3, #5
 8013e28:	dc18      	bgt.n	8013e5c <xTimerGenericCommand+0x7c>
		{
			if( xTaskGetSchedulerState() == taskSCHEDULER_RUNNING )
 8013e2a:	f7ff fb7f 	bl	801352c <xTaskGetSchedulerState>
 8013e2e:	4603      	mov	r3, r0
 8013e30:	2b02      	cmp	r3, #2
 8013e32:	d109      	bne.n	8013e48 <xTimerGenericCommand+0x68>
			{
				xReturn = xQueueSendToBack( xTimerQueue, &xMessage, xTicksToWait );
 8013e34:	4b10      	ldr	r3, [pc, #64]	@ (8013e78 <xTimerGenericCommand+0x98>)
 8013e36:	6818      	ldr	r0, [r3, #0]
 8013e38:	f107 0110 	add.w	r1, r7, #16
 8013e3c:	2300      	movs	r3, #0
 8013e3e:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 8013e40:	f7fd fa76 	bl	8011330 <xQueueGenericSend>
 8013e44:	6278      	str	r0, [r7, #36]	@ 0x24
 8013e46:	e012      	b.n	8013e6e <xTimerGenericCommand+0x8e>
			}
			else
			{
				xReturn = xQueueSendToBack( xTimerQueue, &xMessage, tmrNO_DELAY );
 8013e48:	4b0b      	ldr	r3, [pc, #44]	@ (8013e78 <xTimerGenericCommand+0x98>)
 8013e4a:	6818      	ldr	r0, [r3, #0]
 8013e4c:	f107 0110 	add.w	r1, r7, #16
 8013e50:	2300      	movs	r3, #0
 8013e52:	2200      	movs	r2, #0
 8013e54:	f7fd fa6c 	bl	8011330 <xQueueGenericSend>
 8013e58:	6278      	str	r0, [r7, #36]	@ 0x24
 8013e5a:	e008      	b.n	8013e6e <xTimerGenericCommand+0x8e>
			}
		}
		else
		{
			xReturn = xQueueSendToBackFromISR( xTimerQueue, &xMessage, pxHigherPriorityTaskWoken );
 8013e5c:	4b06      	ldr	r3, [pc, #24]	@ (8013e78 <xTimerGenericCommand+0x98>)
 8013e5e:	6818      	ldr	r0, [r3, #0]
 8013e60:	f107 0110 	add.w	r1, r7, #16
 8013e64:	2300      	movs	r3, #0
 8013e66:	683a      	ldr	r2, [r7, #0]
 8013e68:	f7fd fb64 	bl	8011534 <xQueueGenericSendFromISR>
 8013e6c:	6278      	str	r0, [r7, #36]	@ 0x24
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}

	return xReturn;
 8013e6e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
}
 8013e70:	4618      	mov	r0, r3
 8013e72:	3728      	adds	r7, #40	@ 0x28
 8013e74:	46bd      	mov	sp, r7
 8013e76:	bd80      	pop	{r7, pc}
 8013e78:	24003324 	.word	0x24003324

08013e7c <prvProcessExpiredTimer>:
	return pxTimer->pcTimerName;
}
/*-----------------------------------------------------------*/

static void prvProcessExpiredTimer( const TickType_t xNextExpireTime, const TickType_t xTimeNow )
{
 8013e7c:	b580      	push	{r7, lr}
 8013e7e:	b088      	sub	sp, #32
 8013e80:	af02      	add	r7, sp, #8
 8013e82:	6078      	str	r0, [r7, #4]
 8013e84:	6039      	str	r1, [r7, #0]
BaseType_t xResult;
Timer_t * const pxTimer = ( Timer_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxCurrentTimerList ); /*lint !e9087 !e9079 void * is used as this macro is used with tasks and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
 8013e86:	4b23      	ldr	r3, [pc, #140]	@ (8013f14 <prvProcessExpiredTimer+0x98>)
 8013e88:	681b      	ldr	r3, [r3, #0]
 8013e8a:	68db      	ldr	r3, [r3, #12]
 8013e8c:	68db      	ldr	r3, [r3, #12]
 8013e8e:	617b      	str	r3, [r7, #20]

	/* Remove the timer from the list of active timers.  A check has already
	been performed to ensure the list is not empty. */
	( void ) uxListRemove( &( pxTimer->xTimerListItem ) );
 8013e90:	697b      	ldr	r3, [r7, #20]
 8013e92:	3304      	adds	r3, #4
 8013e94:	4618      	mov	r0, r3
 8013e96:	f7fc ffb5 	bl	8010e04 <uxListRemove>
	traceTIMER_EXPIRED( pxTimer );

	/* If the timer is an auto-reload timer then calculate the next
	expiry time and re-insert the timer in the list of active timers. */
	if( ( pxTimer->ucStatus & tmrSTATUS_IS_AUTORELOAD ) != 0 )
 8013e9a:	697b      	ldr	r3, [r7, #20]
 8013e9c:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8013ea0:	f003 0304 	and.w	r3, r3, #4
 8013ea4:	2b00      	cmp	r3, #0
 8013ea6:	d023      	beq.n	8013ef0 <prvProcessExpiredTimer+0x74>
	{
		/* The timer is inserted into a list using a time relative to anything
		other than the current time.  It will therefore be inserted into the
		correct list relative to the time this task thinks it is now. */
		if( prvInsertTimerInActiveList( pxTimer, ( xNextExpireTime + pxTimer->xTimerPeriodInTicks ), xTimeNow, xNextExpireTime ) != pdFALSE )
 8013ea8:	697b      	ldr	r3, [r7, #20]
 8013eaa:	699a      	ldr	r2, [r3, #24]
 8013eac:	687b      	ldr	r3, [r7, #4]
 8013eae:	18d1      	adds	r1, r2, r3
 8013eb0:	687b      	ldr	r3, [r7, #4]
 8013eb2:	683a      	ldr	r2, [r7, #0]
 8013eb4:	6978      	ldr	r0, [r7, #20]
 8013eb6:	f000 f8d5 	bl	8014064 <prvInsertTimerInActiveList>
 8013eba:	4603      	mov	r3, r0
 8013ebc:	2b00      	cmp	r3, #0
 8013ebe:	d020      	beq.n	8013f02 <prvProcessExpiredTimer+0x86>
		{
			/* The timer expired before it was added to the active timer
			list.  Reload it now.  */
			xResult = xTimerGenericCommand( pxTimer, tmrCOMMAND_START_DONT_TRACE, xNextExpireTime, NULL, tmrNO_DELAY );
 8013ec0:	2300      	movs	r3, #0
 8013ec2:	9300      	str	r3, [sp, #0]
 8013ec4:	2300      	movs	r3, #0
 8013ec6:	687a      	ldr	r2, [r7, #4]
 8013ec8:	2100      	movs	r1, #0
 8013eca:	6978      	ldr	r0, [r7, #20]
 8013ecc:	f7ff ff88 	bl	8013de0 <xTimerGenericCommand>
 8013ed0:	6138      	str	r0, [r7, #16]
			configASSERT( xResult );
 8013ed2:	693b      	ldr	r3, [r7, #16]
 8013ed4:	2b00      	cmp	r3, #0
 8013ed6:	d114      	bne.n	8013f02 <prvProcessExpiredTimer+0x86>
	__asm volatile
 8013ed8:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8013edc:	f383 8811 	msr	BASEPRI, r3
 8013ee0:	f3bf 8f6f 	isb	sy
 8013ee4:	f3bf 8f4f 	dsb	sy
 8013ee8:	60fb      	str	r3, [r7, #12]
}
 8013eea:	bf00      	nop
 8013eec:	bf00      	nop
 8013eee:	e7fd      	b.n	8013eec <prvProcessExpiredTimer+0x70>
			mtCOVERAGE_TEST_MARKER();
		}
	}
	else
	{
		pxTimer->ucStatus &= ~tmrSTATUS_IS_ACTIVE;
 8013ef0:	697b      	ldr	r3, [r7, #20]
 8013ef2:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8013ef6:	f023 0301 	bic.w	r3, r3, #1
 8013efa:	b2da      	uxtb	r2, r3
 8013efc:	697b      	ldr	r3, [r7, #20]
 8013efe:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
		mtCOVERAGE_TEST_MARKER();
	}

	/* Call the timer callback. */
	pxTimer->pxCallbackFunction( ( TimerHandle_t ) pxTimer );
 8013f02:	697b      	ldr	r3, [r7, #20]
 8013f04:	6a1b      	ldr	r3, [r3, #32]
 8013f06:	6978      	ldr	r0, [r7, #20]
 8013f08:	4798      	blx	r3
}
 8013f0a:	bf00      	nop
 8013f0c:	3718      	adds	r7, #24
 8013f0e:	46bd      	mov	sp, r7
 8013f10:	bd80      	pop	{r7, pc}
 8013f12:	bf00      	nop
 8013f14:	2400331c 	.word	0x2400331c

08013f18 <prvTimerTask>:
/*-----------------------------------------------------------*/

static portTASK_FUNCTION( prvTimerTask, pvParameters )
{
 8013f18:	b580      	push	{r7, lr}
 8013f1a:	b084      	sub	sp, #16
 8013f1c:	af00      	add	r7, sp, #0
 8013f1e:	6078      	str	r0, [r7, #4]

	for( ;; )
	{
		/* Query the timers list to see if it contains any timers, and if so,
		obtain the time at which the next timer will expire. */
		xNextExpireTime = prvGetNextExpireTime( &xListWasEmpty );
 8013f20:	f107 0308 	add.w	r3, r7, #8
 8013f24:	4618      	mov	r0, r3
 8013f26:	f000 f859 	bl	8013fdc <prvGetNextExpireTime>
 8013f2a:	60f8      	str	r0, [r7, #12]

		/* If a timer has expired, process it.  Otherwise, block this task
		until either a timer does expire, or a command is received. */
		prvProcessTimerOrBlockTask( xNextExpireTime, xListWasEmpty );
 8013f2c:	68bb      	ldr	r3, [r7, #8]
 8013f2e:	4619      	mov	r1, r3
 8013f30:	68f8      	ldr	r0, [r7, #12]
 8013f32:	f000 f805 	bl	8013f40 <prvProcessTimerOrBlockTask>

		/* Empty the command queue. */
		prvProcessReceivedCommands();
 8013f36:	f000 f8d7 	bl	80140e8 <prvProcessReceivedCommands>
		xNextExpireTime = prvGetNextExpireTime( &xListWasEmpty );
 8013f3a:	bf00      	nop
 8013f3c:	e7f0      	b.n	8013f20 <prvTimerTask+0x8>
	...

08013f40 <prvProcessTimerOrBlockTask>:
	}
}
/*-----------------------------------------------------------*/

static void prvProcessTimerOrBlockTask( const TickType_t xNextExpireTime, BaseType_t xListWasEmpty )
{
 8013f40:	b580      	push	{r7, lr}
 8013f42:	b084      	sub	sp, #16
 8013f44:	af00      	add	r7, sp, #0
 8013f46:	6078      	str	r0, [r7, #4]
 8013f48:	6039      	str	r1, [r7, #0]
TickType_t xTimeNow;
BaseType_t xTimerListsWereSwitched;

	vTaskSuspendAll();
 8013f4a:	f7fe fea3 	bl	8012c94 <vTaskSuspendAll>
		/* Obtain the time now to make an assessment as to whether the timer
		has expired or not.  If obtaining the time causes the lists to switch
		then don't process this timer as any timers that remained in the list
		when the lists were switched will have been processed within the
		prvSampleTimeNow() function. */
		xTimeNow = prvSampleTimeNow( &xTimerListsWereSwitched );
 8013f4e:	f107 0308 	add.w	r3, r7, #8
 8013f52:	4618      	mov	r0, r3
 8013f54:	f000 f866 	bl	8014024 <prvSampleTimeNow>
 8013f58:	60f8      	str	r0, [r7, #12]
		if( xTimerListsWereSwitched == pdFALSE )
 8013f5a:	68bb      	ldr	r3, [r7, #8]
 8013f5c:	2b00      	cmp	r3, #0
 8013f5e:	d130      	bne.n	8013fc2 <prvProcessTimerOrBlockTask+0x82>
		{
			/* The tick count has not overflowed, has the timer expired? */
			if( ( xListWasEmpty == pdFALSE ) && ( xNextExpireTime <= xTimeNow ) )
 8013f60:	683b      	ldr	r3, [r7, #0]
 8013f62:	2b00      	cmp	r3, #0
 8013f64:	d10a      	bne.n	8013f7c <prvProcessTimerOrBlockTask+0x3c>
 8013f66:	687a      	ldr	r2, [r7, #4]
 8013f68:	68fb      	ldr	r3, [r7, #12]
 8013f6a:	429a      	cmp	r2, r3
 8013f6c:	d806      	bhi.n	8013f7c <prvProcessTimerOrBlockTask+0x3c>
			{
				( void ) xTaskResumeAll();
 8013f6e:	f7fe fe9f 	bl	8012cb0 <xTaskResumeAll>
				prvProcessExpiredTimer( xNextExpireTime, xTimeNow );
 8013f72:	68f9      	ldr	r1, [r7, #12]
 8013f74:	6878      	ldr	r0, [r7, #4]
 8013f76:	f7ff ff81 	bl	8013e7c <prvProcessExpiredTimer>
		else
		{
			( void ) xTaskResumeAll();
		}
	}
}
 8013f7a:	e024      	b.n	8013fc6 <prvProcessTimerOrBlockTask+0x86>
				if( xListWasEmpty != pdFALSE )
 8013f7c:	683b      	ldr	r3, [r7, #0]
 8013f7e:	2b00      	cmp	r3, #0
 8013f80:	d008      	beq.n	8013f94 <prvProcessTimerOrBlockTask+0x54>
					xListWasEmpty = listLIST_IS_EMPTY( pxOverflowTimerList );
 8013f82:	4b13      	ldr	r3, [pc, #76]	@ (8013fd0 <prvProcessTimerOrBlockTask+0x90>)
 8013f84:	681b      	ldr	r3, [r3, #0]
 8013f86:	681b      	ldr	r3, [r3, #0]
 8013f88:	2b00      	cmp	r3, #0
 8013f8a:	d101      	bne.n	8013f90 <prvProcessTimerOrBlockTask+0x50>
 8013f8c:	2301      	movs	r3, #1
 8013f8e:	e000      	b.n	8013f92 <prvProcessTimerOrBlockTask+0x52>
 8013f90:	2300      	movs	r3, #0
 8013f92:	603b      	str	r3, [r7, #0]
				vQueueWaitForMessageRestricted( xTimerQueue, ( xNextExpireTime - xTimeNow ), xListWasEmpty );
 8013f94:	4b0f      	ldr	r3, [pc, #60]	@ (8013fd4 <prvProcessTimerOrBlockTask+0x94>)
 8013f96:	6818      	ldr	r0, [r3, #0]
 8013f98:	687a      	ldr	r2, [r7, #4]
 8013f9a:	68fb      	ldr	r3, [r7, #12]
 8013f9c:	1ad3      	subs	r3, r2, r3
 8013f9e:	683a      	ldr	r2, [r7, #0]
 8013fa0:	4619      	mov	r1, r3
 8013fa2:	f7fe f847 	bl	8012034 <vQueueWaitForMessageRestricted>
				if( xTaskResumeAll() == pdFALSE )
 8013fa6:	f7fe fe83 	bl	8012cb0 <xTaskResumeAll>
 8013faa:	4603      	mov	r3, r0
 8013fac:	2b00      	cmp	r3, #0
 8013fae:	d10a      	bne.n	8013fc6 <prvProcessTimerOrBlockTask+0x86>
					portYIELD_WITHIN_API();
 8013fb0:	4b09      	ldr	r3, [pc, #36]	@ (8013fd8 <prvProcessTimerOrBlockTask+0x98>)
 8013fb2:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8013fb6:	601a      	str	r2, [r3, #0]
 8013fb8:	f3bf 8f4f 	dsb	sy
 8013fbc:	f3bf 8f6f 	isb	sy
}
 8013fc0:	e001      	b.n	8013fc6 <prvProcessTimerOrBlockTask+0x86>
			( void ) xTaskResumeAll();
 8013fc2:	f7fe fe75 	bl	8012cb0 <xTaskResumeAll>
}
 8013fc6:	bf00      	nop
 8013fc8:	3710      	adds	r7, #16
 8013fca:	46bd      	mov	sp, r7
 8013fcc:	bd80      	pop	{r7, pc}
 8013fce:	bf00      	nop
 8013fd0:	24003320 	.word	0x24003320
 8013fd4:	24003324 	.word	0x24003324
 8013fd8:	e000ed04 	.word	0xe000ed04

08013fdc <prvGetNextExpireTime>:
/*-----------------------------------------------------------*/

static TickType_t prvGetNextExpireTime( BaseType_t * const pxListWasEmpty )
{
 8013fdc:	b480      	push	{r7}
 8013fde:	b085      	sub	sp, #20
 8013fe0:	af00      	add	r7, sp, #0
 8013fe2:	6078      	str	r0, [r7, #4]
	the timer with the nearest expiry time will expire.  If there are no
	active timers then just set the next expire time to 0.  That will cause
	this task to unblock when the tick count overflows, at which point the
	timer lists will be switched and the next expiry time can be
	re-assessed.  */
	*pxListWasEmpty = listLIST_IS_EMPTY( pxCurrentTimerList );
 8013fe4:	4b0e      	ldr	r3, [pc, #56]	@ (8014020 <prvGetNextExpireTime+0x44>)
 8013fe6:	681b      	ldr	r3, [r3, #0]
 8013fe8:	681b      	ldr	r3, [r3, #0]
 8013fea:	2b00      	cmp	r3, #0
 8013fec:	d101      	bne.n	8013ff2 <prvGetNextExpireTime+0x16>
 8013fee:	2201      	movs	r2, #1
 8013ff0:	e000      	b.n	8013ff4 <prvGetNextExpireTime+0x18>
 8013ff2:	2200      	movs	r2, #0
 8013ff4:	687b      	ldr	r3, [r7, #4]
 8013ff6:	601a      	str	r2, [r3, #0]
	if( *pxListWasEmpty == pdFALSE )
 8013ff8:	687b      	ldr	r3, [r7, #4]
 8013ffa:	681b      	ldr	r3, [r3, #0]
 8013ffc:	2b00      	cmp	r3, #0
 8013ffe:	d105      	bne.n	801400c <prvGetNextExpireTime+0x30>
	{
		xNextExpireTime = listGET_ITEM_VALUE_OF_HEAD_ENTRY( pxCurrentTimerList );
 8014000:	4b07      	ldr	r3, [pc, #28]	@ (8014020 <prvGetNextExpireTime+0x44>)
 8014002:	681b      	ldr	r3, [r3, #0]
 8014004:	68db      	ldr	r3, [r3, #12]
 8014006:	681b      	ldr	r3, [r3, #0]
 8014008:	60fb      	str	r3, [r7, #12]
 801400a:	e001      	b.n	8014010 <prvGetNextExpireTime+0x34>
	}
	else
	{
		/* Ensure the task unblocks when the tick count rolls over. */
		xNextExpireTime = ( TickType_t ) 0U;
 801400c:	2300      	movs	r3, #0
 801400e:	60fb      	str	r3, [r7, #12]
	}

	return xNextExpireTime;
 8014010:	68fb      	ldr	r3, [r7, #12]
}
 8014012:	4618      	mov	r0, r3
 8014014:	3714      	adds	r7, #20
 8014016:	46bd      	mov	sp, r7
 8014018:	f85d 7b04 	ldr.w	r7, [sp], #4
 801401c:	4770      	bx	lr
 801401e:	bf00      	nop
 8014020:	2400331c 	.word	0x2400331c

08014024 <prvSampleTimeNow>:
/*-----------------------------------------------------------*/

static TickType_t prvSampleTimeNow( BaseType_t * const pxTimerListsWereSwitched )
{
 8014024:	b580      	push	{r7, lr}
 8014026:	b084      	sub	sp, #16
 8014028:	af00      	add	r7, sp, #0
 801402a:	6078      	str	r0, [r7, #4]
TickType_t xTimeNow;
PRIVILEGED_DATA static TickType_t xLastTime = ( TickType_t ) 0U; /*lint !e956 Variable is only accessible to one task. */

	xTimeNow = xTaskGetTickCount();
 801402c:	f7fe fede 	bl	8012dec <xTaskGetTickCount>
 8014030:	60f8      	str	r0, [r7, #12]

	if( xTimeNow < xLastTime )
 8014032:	4b0b      	ldr	r3, [pc, #44]	@ (8014060 <prvSampleTimeNow+0x3c>)
 8014034:	681b      	ldr	r3, [r3, #0]
 8014036:	68fa      	ldr	r2, [r7, #12]
 8014038:	429a      	cmp	r2, r3
 801403a:	d205      	bcs.n	8014048 <prvSampleTimeNow+0x24>
	{
		prvSwitchTimerLists();
 801403c:	f000 f93a 	bl	80142b4 <prvSwitchTimerLists>
		*pxTimerListsWereSwitched = pdTRUE;
 8014040:	687b      	ldr	r3, [r7, #4]
 8014042:	2201      	movs	r2, #1
 8014044:	601a      	str	r2, [r3, #0]
 8014046:	e002      	b.n	801404e <prvSampleTimeNow+0x2a>
	}
	else
	{
		*pxTimerListsWereSwitched = pdFALSE;
 8014048:	687b      	ldr	r3, [r7, #4]
 801404a:	2200      	movs	r2, #0
 801404c:	601a      	str	r2, [r3, #0]
	}

	xLastTime = xTimeNow;
 801404e:	4a04      	ldr	r2, [pc, #16]	@ (8014060 <prvSampleTimeNow+0x3c>)
 8014050:	68fb      	ldr	r3, [r7, #12]
 8014052:	6013      	str	r3, [r2, #0]

	return xTimeNow;
 8014054:	68fb      	ldr	r3, [r7, #12]
}
 8014056:	4618      	mov	r0, r3
 8014058:	3710      	adds	r7, #16
 801405a:	46bd      	mov	sp, r7
 801405c:	bd80      	pop	{r7, pc}
 801405e:	bf00      	nop
 8014060:	2400332c 	.word	0x2400332c

08014064 <prvInsertTimerInActiveList>:
/*-----------------------------------------------------------*/

static BaseType_t prvInsertTimerInActiveList( Timer_t * const pxTimer, const TickType_t xNextExpiryTime, const TickType_t xTimeNow, const TickType_t xCommandTime )
{
 8014064:	b580      	push	{r7, lr}
 8014066:	b086      	sub	sp, #24
 8014068:	af00      	add	r7, sp, #0
 801406a:	60f8      	str	r0, [r7, #12]
 801406c:	60b9      	str	r1, [r7, #8]
 801406e:	607a      	str	r2, [r7, #4]
 8014070:	603b      	str	r3, [r7, #0]
BaseType_t xProcessTimerNow = pdFALSE;
 8014072:	2300      	movs	r3, #0
 8014074:	617b      	str	r3, [r7, #20]

	listSET_LIST_ITEM_VALUE( &( pxTimer->xTimerListItem ), xNextExpiryTime );
 8014076:	68fb      	ldr	r3, [r7, #12]
 8014078:	68ba      	ldr	r2, [r7, #8]
 801407a:	605a      	str	r2, [r3, #4]
	listSET_LIST_ITEM_OWNER( &( pxTimer->xTimerListItem ), pxTimer );
 801407c:	68fb      	ldr	r3, [r7, #12]
 801407e:	68fa      	ldr	r2, [r7, #12]
 8014080:	611a      	str	r2, [r3, #16]

	if( xNextExpiryTime <= xTimeNow )
 8014082:	68ba      	ldr	r2, [r7, #8]
 8014084:	687b      	ldr	r3, [r7, #4]
 8014086:	429a      	cmp	r2, r3
 8014088:	d812      	bhi.n	80140b0 <prvInsertTimerInActiveList+0x4c>
	{
		/* Has the expiry time elapsed between the command to start/reset a
		timer was issued, and the time the command was processed? */
		if( ( ( TickType_t ) ( xTimeNow - xCommandTime ) ) >= pxTimer->xTimerPeriodInTicks ) /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
 801408a:	687a      	ldr	r2, [r7, #4]
 801408c:	683b      	ldr	r3, [r7, #0]
 801408e:	1ad2      	subs	r2, r2, r3
 8014090:	68fb      	ldr	r3, [r7, #12]
 8014092:	699b      	ldr	r3, [r3, #24]
 8014094:	429a      	cmp	r2, r3
 8014096:	d302      	bcc.n	801409e <prvInsertTimerInActiveList+0x3a>
		{
			/* The time between a command being issued and the command being
			processed actually exceeds the timers period.  */
			xProcessTimerNow = pdTRUE;
 8014098:	2301      	movs	r3, #1
 801409a:	617b      	str	r3, [r7, #20]
 801409c:	e01b      	b.n	80140d6 <prvInsertTimerInActiveList+0x72>
		}
		else
		{
			vListInsert( pxOverflowTimerList, &( pxTimer->xTimerListItem ) );
 801409e:	4b10      	ldr	r3, [pc, #64]	@ (80140e0 <prvInsertTimerInActiveList+0x7c>)
 80140a0:	681a      	ldr	r2, [r3, #0]
 80140a2:	68fb      	ldr	r3, [r7, #12]
 80140a4:	3304      	adds	r3, #4
 80140a6:	4619      	mov	r1, r3
 80140a8:	4610      	mov	r0, r2
 80140aa:	f7fc fe72 	bl	8010d92 <vListInsert>
 80140ae:	e012      	b.n	80140d6 <prvInsertTimerInActiveList+0x72>
		}
	}
	else
	{
		if( ( xTimeNow < xCommandTime ) && ( xNextExpiryTime >= xCommandTime ) )
 80140b0:	687a      	ldr	r2, [r7, #4]
 80140b2:	683b      	ldr	r3, [r7, #0]
 80140b4:	429a      	cmp	r2, r3
 80140b6:	d206      	bcs.n	80140c6 <prvInsertTimerInActiveList+0x62>
 80140b8:	68ba      	ldr	r2, [r7, #8]
 80140ba:	683b      	ldr	r3, [r7, #0]
 80140bc:	429a      	cmp	r2, r3
 80140be:	d302      	bcc.n	80140c6 <prvInsertTimerInActiveList+0x62>
		{
			/* If, since the command was issued, the tick count has overflowed
			but the expiry time has not, then the timer must have already passed
			its expiry time and should be processed immediately. */
			xProcessTimerNow = pdTRUE;
 80140c0:	2301      	movs	r3, #1
 80140c2:	617b      	str	r3, [r7, #20]
 80140c4:	e007      	b.n	80140d6 <prvInsertTimerInActiveList+0x72>
		}
		else
		{
			vListInsert( pxCurrentTimerList, &( pxTimer->xTimerListItem ) );
 80140c6:	4b07      	ldr	r3, [pc, #28]	@ (80140e4 <prvInsertTimerInActiveList+0x80>)
 80140c8:	681a      	ldr	r2, [r3, #0]
 80140ca:	68fb      	ldr	r3, [r7, #12]
 80140cc:	3304      	adds	r3, #4
 80140ce:	4619      	mov	r1, r3
 80140d0:	4610      	mov	r0, r2
 80140d2:	f7fc fe5e 	bl	8010d92 <vListInsert>
		}
	}

	return xProcessTimerNow;
 80140d6:	697b      	ldr	r3, [r7, #20]
}
 80140d8:	4618      	mov	r0, r3
 80140da:	3718      	adds	r7, #24
 80140dc:	46bd      	mov	sp, r7
 80140de:	bd80      	pop	{r7, pc}
 80140e0:	24003320 	.word	0x24003320
 80140e4:	2400331c 	.word	0x2400331c

080140e8 <prvProcessReceivedCommands>:
/*-----------------------------------------------------------*/

static void	prvProcessReceivedCommands( void )
{
 80140e8:	b580      	push	{r7, lr}
 80140ea:	b08e      	sub	sp, #56	@ 0x38
 80140ec:	af02      	add	r7, sp, #8
DaemonTaskMessage_t xMessage;
Timer_t *pxTimer;
BaseType_t xTimerListsWereSwitched, xResult;
TickType_t xTimeNow;

	while( xQueueReceive( xTimerQueue, &xMessage, tmrNO_DELAY ) != pdFAIL ) /*lint !e603 xMessage does not have to be initialised as it is passed out, not in, and it is not used unless xQueueReceive() returns pdTRUE. */
 80140ee:	e0ce      	b.n	801428e <prvProcessReceivedCommands+0x1a6>
	{
		#if ( INCLUDE_xTimerPendFunctionCall == 1 )
		{
			/* Negative commands are pended function calls rather than timer
			commands. */
			if( xMessage.xMessageID < ( BaseType_t ) 0 )
 80140f0:	687b      	ldr	r3, [r7, #4]
 80140f2:	2b00      	cmp	r3, #0
 80140f4:	da19      	bge.n	801412a <prvProcessReceivedCommands+0x42>
			{
				const CallbackParameters_t * const pxCallback = &( xMessage.u.xCallbackParameters );
 80140f6:	1d3b      	adds	r3, r7, #4
 80140f8:	3304      	adds	r3, #4
 80140fa:	62fb      	str	r3, [r7, #44]	@ 0x2c

				/* The timer uses the xCallbackParameters member to request a
				callback be executed.  Check the callback is not NULL. */
				configASSERT( pxCallback );
 80140fc:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80140fe:	2b00      	cmp	r3, #0
 8014100:	d10b      	bne.n	801411a <prvProcessReceivedCommands+0x32>
	__asm volatile
 8014102:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8014106:	f383 8811 	msr	BASEPRI, r3
 801410a:	f3bf 8f6f 	isb	sy
 801410e:	f3bf 8f4f 	dsb	sy
 8014112:	61fb      	str	r3, [r7, #28]
}
 8014114:	bf00      	nop
 8014116:	bf00      	nop
 8014118:	e7fd      	b.n	8014116 <prvProcessReceivedCommands+0x2e>

				/* Call the function. */
				pxCallback->pxCallbackFunction( pxCallback->pvParameter1, pxCallback->ulParameter2 );
 801411a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801411c:	681b      	ldr	r3, [r3, #0]
 801411e:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 8014120:	6850      	ldr	r0, [r2, #4]
 8014122:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 8014124:	6892      	ldr	r2, [r2, #8]
 8014126:	4611      	mov	r1, r2
 8014128:	4798      	blx	r3
		}
		#endif /* INCLUDE_xTimerPendFunctionCall */

		/* Commands that are positive are timer commands rather than pended
		function calls. */
		if( xMessage.xMessageID >= ( BaseType_t ) 0 )
 801412a:	687b      	ldr	r3, [r7, #4]
 801412c:	2b00      	cmp	r3, #0
 801412e:	f2c0 80ae 	blt.w	801428e <prvProcessReceivedCommands+0x1a6>
		{
			/* The messages uses the xTimerParameters member to work on a
			software timer. */
			pxTimer = xMessage.u.xTimerParameters.pxTimer;
 8014132:	68fb      	ldr	r3, [r7, #12]
 8014134:	62bb      	str	r3, [r7, #40]	@ 0x28

			if( listIS_CONTAINED_WITHIN( NULL, &( pxTimer->xTimerListItem ) ) == pdFALSE ) /*lint !e961. The cast is only redundant when NULL is passed into the macro. */
 8014136:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8014138:	695b      	ldr	r3, [r3, #20]
 801413a:	2b00      	cmp	r3, #0
 801413c:	d004      	beq.n	8014148 <prvProcessReceivedCommands+0x60>
			{
				/* The timer is in a list, remove it. */
				( void ) uxListRemove( &( pxTimer->xTimerListItem ) );
 801413e:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8014140:	3304      	adds	r3, #4
 8014142:	4618      	mov	r0, r3
 8014144:	f7fc fe5e 	bl	8010e04 <uxListRemove>
			it must be present in the function call.  prvSampleTimeNow() must be
			called after the message is received from xTimerQueue so there is no
			possibility of a higher priority task adding a message to the message
			queue with a time that is ahead of the timer daemon task (because it
			pre-empted the timer daemon task after the xTimeNow value was set). */
			xTimeNow = prvSampleTimeNow( &xTimerListsWereSwitched );
 8014148:	463b      	mov	r3, r7
 801414a:	4618      	mov	r0, r3
 801414c:	f7ff ff6a 	bl	8014024 <prvSampleTimeNow>
 8014150:	6278      	str	r0, [r7, #36]	@ 0x24

			switch( xMessage.xMessageID )
 8014152:	687b      	ldr	r3, [r7, #4]
 8014154:	2b09      	cmp	r3, #9
 8014156:	f200 8097 	bhi.w	8014288 <prvProcessReceivedCommands+0x1a0>
 801415a:	a201      	add	r2, pc, #4	@ (adr r2, 8014160 <prvProcessReceivedCommands+0x78>)
 801415c:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 8014160:	08014189 	.word	0x08014189
 8014164:	08014189 	.word	0x08014189
 8014168:	08014189 	.word	0x08014189
 801416c:	080141ff 	.word	0x080141ff
 8014170:	08014213 	.word	0x08014213
 8014174:	0801425f 	.word	0x0801425f
 8014178:	08014189 	.word	0x08014189
 801417c:	08014189 	.word	0x08014189
 8014180:	080141ff 	.word	0x080141ff
 8014184:	08014213 	.word	0x08014213
				case tmrCOMMAND_START_FROM_ISR :
				case tmrCOMMAND_RESET :
				case tmrCOMMAND_RESET_FROM_ISR :
				case tmrCOMMAND_START_DONT_TRACE :
					/* Start or restart a timer. */
					pxTimer->ucStatus |= tmrSTATUS_IS_ACTIVE;
 8014188:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801418a:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 801418e:	f043 0301 	orr.w	r3, r3, #1
 8014192:	b2da      	uxtb	r2, r3
 8014194:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8014196:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
					if( prvInsertTimerInActiveList( pxTimer,  xMessage.u.xTimerParameters.xMessageValue + pxTimer->xTimerPeriodInTicks, xTimeNow, xMessage.u.xTimerParameters.xMessageValue ) != pdFALSE )
 801419a:	68ba      	ldr	r2, [r7, #8]
 801419c:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801419e:	699b      	ldr	r3, [r3, #24]
 80141a0:	18d1      	adds	r1, r2, r3
 80141a2:	68bb      	ldr	r3, [r7, #8]
 80141a4:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 80141a6:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 80141a8:	f7ff ff5c 	bl	8014064 <prvInsertTimerInActiveList>
 80141ac:	4603      	mov	r3, r0
 80141ae:	2b00      	cmp	r3, #0
 80141b0:	d06c      	beq.n	801428c <prvProcessReceivedCommands+0x1a4>
					{
						/* The timer expired before it was added to the active
						timer list.  Process it now. */
						pxTimer->pxCallbackFunction( ( TimerHandle_t ) pxTimer );
 80141b2:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80141b4:	6a1b      	ldr	r3, [r3, #32]
 80141b6:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 80141b8:	4798      	blx	r3
						traceTIMER_EXPIRED( pxTimer );

						if( ( pxTimer->ucStatus & tmrSTATUS_IS_AUTORELOAD ) != 0 )
 80141ba:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80141bc:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 80141c0:	f003 0304 	and.w	r3, r3, #4
 80141c4:	2b00      	cmp	r3, #0
 80141c6:	d061      	beq.n	801428c <prvProcessReceivedCommands+0x1a4>
						{
							xResult = xTimerGenericCommand( pxTimer, tmrCOMMAND_START_DONT_TRACE, xMessage.u.xTimerParameters.xMessageValue + pxTimer->xTimerPeriodInTicks, NULL, tmrNO_DELAY );
 80141c8:	68ba      	ldr	r2, [r7, #8]
 80141ca:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80141cc:	699b      	ldr	r3, [r3, #24]
 80141ce:	441a      	add	r2, r3
 80141d0:	2300      	movs	r3, #0
 80141d2:	9300      	str	r3, [sp, #0]
 80141d4:	2300      	movs	r3, #0
 80141d6:	2100      	movs	r1, #0
 80141d8:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 80141da:	f7ff fe01 	bl	8013de0 <xTimerGenericCommand>
 80141de:	6238      	str	r0, [r7, #32]
							configASSERT( xResult );
 80141e0:	6a3b      	ldr	r3, [r7, #32]
 80141e2:	2b00      	cmp	r3, #0
 80141e4:	d152      	bne.n	801428c <prvProcessReceivedCommands+0x1a4>
	__asm volatile
 80141e6:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80141ea:	f383 8811 	msr	BASEPRI, r3
 80141ee:	f3bf 8f6f 	isb	sy
 80141f2:	f3bf 8f4f 	dsb	sy
 80141f6:	61bb      	str	r3, [r7, #24]
}
 80141f8:	bf00      	nop
 80141fa:	bf00      	nop
 80141fc:	e7fd      	b.n	80141fa <prvProcessReceivedCommands+0x112>
					break;

				case tmrCOMMAND_STOP :
				case tmrCOMMAND_STOP_FROM_ISR :
					/* The timer has already been removed from the active list. */
					pxTimer->ucStatus &= ~tmrSTATUS_IS_ACTIVE;
 80141fe:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8014200:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8014204:	f023 0301 	bic.w	r3, r3, #1
 8014208:	b2da      	uxtb	r2, r3
 801420a:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801420c:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
					break;
 8014210:	e03d      	b.n	801428e <prvProcessReceivedCommands+0x1a6>

				case tmrCOMMAND_CHANGE_PERIOD :
				case tmrCOMMAND_CHANGE_PERIOD_FROM_ISR :
					pxTimer->ucStatus |= tmrSTATUS_IS_ACTIVE;
 8014212:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8014214:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8014218:	f043 0301 	orr.w	r3, r3, #1
 801421c:	b2da      	uxtb	r2, r3
 801421e:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8014220:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
					pxTimer->xTimerPeriodInTicks = xMessage.u.xTimerParameters.xMessageValue;
 8014224:	68ba      	ldr	r2, [r7, #8]
 8014226:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8014228:	619a      	str	r2, [r3, #24]
					configASSERT( ( pxTimer->xTimerPeriodInTicks > 0 ) );
 801422a:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801422c:	699b      	ldr	r3, [r3, #24]
 801422e:	2b00      	cmp	r3, #0
 8014230:	d10b      	bne.n	801424a <prvProcessReceivedCommands+0x162>
	__asm volatile
 8014232:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8014236:	f383 8811 	msr	BASEPRI, r3
 801423a:	f3bf 8f6f 	isb	sy
 801423e:	f3bf 8f4f 	dsb	sy
 8014242:	617b      	str	r3, [r7, #20]
}
 8014244:	bf00      	nop
 8014246:	bf00      	nop
 8014248:	e7fd      	b.n	8014246 <prvProcessReceivedCommands+0x15e>
					be longer or shorter than the old one.  The command time is
					therefore set to the current time, and as the period cannot
					be zero the next expiry time can only be in the future,
					meaning (unlike for the xTimerStart() case above) there is
					no fail case that needs to be handled here. */
					( void ) prvInsertTimerInActiveList( pxTimer, ( xTimeNow + pxTimer->xTimerPeriodInTicks ), xTimeNow, xTimeNow );
 801424a:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801424c:	699a      	ldr	r2, [r3, #24]
 801424e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8014250:	18d1      	adds	r1, r2, r3
 8014252:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8014254:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8014256:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 8014258:	f7ff ff04 	bl	8014064 <prvInsertTimerInActiveList>
					break;
 801425c:	e017      	b.n	801428e <prvProcessReceivedCommands+0x1a6>
					#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
					{
						/* The timer has already been removed from the active list,
						just free up the memory if the memory was dynamically
						allocated. */
						if( ( pxTimer->ucStatus & tmrSTATUS_IS_STATICALLY_ALLOCATED ) == ( uint8_t ) 0 )
 801425e:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8014260:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8014264:	f003 0302 	and.w	r3, r3, #2
 8014268:	2b00      	cmp	r3, #0
 801426a:	d103      	bne.n	8014274 <prvProcessReceivedCommands+0x18c>
						{
							vPortFree( pxTimer );
 801426c:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 801426e:	f000 fbeb 	bl	8014a48 <vPortFree>
						no need to free the memory - just mark the timer as
						"not active". */
						pxTimer->ucStatus &= ~tmrSTATUS_IS_ACTIVE;
					}
					#endif /* configSUPPORT_DYNAMIC_ALLOCATION */
					break;
 8014272:	e00c      	b.n	801428e <prvProcessReceivedCommands+0x1a6>
							pxTimer->ucStatus &= ~tmrSTATUS_IS_ACTIVE;
 8014274:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8014276:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 801427a:	f023 0301 	bic.w	r3, r3, #1
 801427e:	b2da      	uxtb	r2, r3
 8014280:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8014282:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
					break;
 8014286:	e002      	b.n	801428e <prvProcessReceivedCommands+0x1a6>

				default	:
					/* Don't expect to get here. */
					break;
 8014288:	bf00      	nop
 801428a:	e000      	b.n	801428e <prvProcessReceivedCommands+0x1a6>
					break;
 801428c:	bf00      	nop
	while( xQueueReceive( xTimerQueue, &xMessage, tmrNO_DELAY ) != pdFAIL ) /*lint !e603 xMessage does not have to be initialised as it is passed out, not in, and it is not used unless xQueueReceive() returns pdTRUE. */
 801428e:	4b08      	ldr	r3, [pc, #32]	@ (80142b0 <prvProcessReceivedCommands+0x1c8>)
 8014290:	681b      	ldr	r3, [r3, #0]
 8014292:	1d39      	adds	r1, r7, #4
 8014294:	2200      	movs	r2, #0
 8014296:	4618      	mov	r0, r3
 8014298:	f7fd fa7a 	bl	8011790 <xQueueReceive>
 801429c:	4603      	mov	r3, r0
 801429e:	2b00      	cmp	r3, #0
 80142a0:	f47f af26 	bne.w	80140f0 <prvProcessReceivedCommands+0x8>
			}
		}
	}
}
 80142a4:	bf00      	nop
 80142a6:	bf00      	nop
 80142a8:	3730      	adds	r7, #48	@ 0x30
 80142aa:	46bd      	mov	sp, r7
 80142ac:	bd80      	pop	{r7, pc}
 80142ae:	bf00      	nop
 80142b0:	24003324 	.word	0x24003324

080142b4 <prvSwitchTimerLists>:
/*-----------------------------------------------------------*/

static void prvSwitchTimerLists( void )
{
 80142b4:	b580      	push	{r7, lr}
 80142b6:	b088      	sub	sp, #32
 80142b8:	af02      	add	r7, sp, #8

	/* The tick count has overflowed.  The timer lists must be switched.
	If there are any timers still referenced from the current timer list
	then they must have expired and should be processed before the lists
	are switched. */
	while( listLIST_IS_EMPTY( pxCurrentTimerList ) == pdFALSE )
 80142ba:	e049      	b.n	8014350 <prvSwitchTimerLists+0x9c>
	{
		xNextExpireTime = listGET_ITEM_VALUE_OF_HEAD_ENTRY( pxCurrentTimerList );
 80142bc:	4b2e      	ldr	r3, [pc, #184]	@ (8014378 <prvSwitchTimerLists+0xc4>)
 80142be:	681b      	ldr	r3, [r3, #0]
 80142c0:	68db      	ldr	r3, [r3, #12]
 80142c2:	681b      	ldr	r3, [r3, #0]
 80142c4:	613b      	str	r3, [r7, #16]

		/* Remove the timer from the list. */
		pxTimer = ( Timer_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxCurrentTimerList ); /*lint !e9087 !e9079 void * is used as this macro is used with tasks and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
 80142c6:	4b2c      	ldr	r3, [pc, #176]	@ (8014378 <prvSwitchTimerLists+0xc4>)
 80142c8:	681b      	ldr	r3, [r3, #0]
 80142ca:	68db      	ldr	r3, [r3, #12]
 80142cc:	68db      	ldr	r3, [r3, #12]
 80142ce:	60fb      	str	r3, [r7, #12]
		( void ) uxListRemove( &( pxTimer->xTimerListItem ) );
 80142d0:	68fb      	ldr	r3, [r7, #12]
 80142d2:	3304      	adds	r3, #4
 80142d4:	4618      	mov	r0, r3
 80142d6:	f7fc fd95 	bl	8010e04 <uxListRemove>
		traceTIMER_EXPIRED( pxTimer );

		/* Execute its callback, then send a command to restart the timer if
		it is an auto-reload timer.  It cannot be restarted here as the lists
		have not yet been switched. */
		pxTimer->pxCallbackFunction( ( TimerHandle_t ) pxTimer );
 80142da:	68fb      	ldr	r3, [r7, #12]
 80142dc:	6a1b      	ldr	r3, [r3, #32]
 80142de:	68f8      	ldr	r0, [r7, #12]
 80142e0:	4798      	blx	r3

		if( ( pxTimer->ucStatus & tmrSTATUS_IS_AUTORELOAD ) != 0 )
 80142e2:	68fb      	ldr	r3, [r7, #12]
 80142e4:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 80142e8:	f003 0304 	and.w	r3, r3, #4
 80142ec:	2b00      	cmp	r3, #0
 80142ee:	d02f      	beq.n	8014350 <prvSwitchTimerLists+0x9c>
			the timer going into the same timer list then it has already expired
			and the timer should be re-inserted into the current list so it is
			processed again within this loop.  Otherwise a command should be sent
			to restart the timer to ensure it is only inserted into a list after
			the lists have been swapped. */
			xReloadTime = ( xNextExpireTime + pxTimer->xTimerPeriodInTicks );
 80142f0:	68fb      	ldr	r3, [r7, #12]
 80142f2:	699b      	ldr	r3, [r3, #24]
 80142f4:	693a      	ldr	r2, [r7, #16]
 80142f6:	4413      	add	r3, r2
 80142f8:	60bb      	str	r3, [r7, #8]
			if( xReloadTime > xNextExpireTime )
 80142fa:	68ba      	ldr	r2, [r7, #8]
 80142fc:	693b      	ldr	r3, [r7, #16]
 80142fe:	429a      	cmp	r2, r3
 8014300:	d90e      	bls.n	8014320 <prvSwitchTimerLists+0x6c>
			{
				listSET_LIST_ITEM_VALUE( &( pxTimer->xTimerListItem ), xReloadTime );
 8014302:	68fb      	ldr	r3, [r7, #12]
 8014304:	68ba      	ldr	r2, [r7, #8]
 8014306:	605a      	str	r2, [r3, #4]
				listSET_LIST_ITEM_OWNER( &( pxTimer->xTimerListItem ), pxTimer );
 8014308:	68fb      	ldr	r3, [r7, #12]
 801430a:	68fa      	ldr	r2, [r7, #12]
 801430c:	611a      	str	r2, [r3, #16]
				vListInsert( pxCurrentTimerList, &( pxTimer->xTimerListItem ) );
 801430e:	4b1a      	ldr	r3, [pc, #104]	@ (8014378 <prvSwitchTimerLists+0xc4>)
 8014310:	681a      	ldr	r2, [r3, #0]
 8014312:	68fb      	ldr	r3, [r7, #12]
 8014314:	3304      	adds	r3, #4
 8014316:	4619      	mov	r1, r3
 8014318:	4610      	mov	r0, r2
 801431a:	f7fc fd3a 	bl	8010d92 <vListInsert>
 801431e:	e017      	b.n	8014350 <prvSwitchTimerLists+0x9c>
			}
			else
			{
				xResult = xTimerGenericCommand( pxTimer, tmrCOMMAND_START_DONT_TRACE, xNextExpireTime, NULL, tmrNO_DELAY );
 8014320:	2300      	movs	r3, #0
 8014322:	9300      	str	r3, [sp, #0]
 8014324:	2300      	movs	r3, #0
 8014326:	693a      	ldr	r2, [r7, #16]
 8014328:	2100      	movs	r1, #0
 801432a:	68f8      	ldr	r0, [r7, #12]
 801432c:	f7ff fd58 	bl	8013de0 <xTimerGenericCommand>
 8014330:	6078      	str	r0, [r7, #4]
				configASSERT( xResult );
 8014332:	687b      	ldr	r3, [r7, #4]
 8014334:	2b00      	cmp	r3, #0
 8014336:	d10b      	bne.n	8014350 <prvSwitchTimerLists+0x9c>
	__asm volatile
 8014338:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801433c:	f383 8811 	msr	BASEPRI, r3
 8014340:	f3bf 8f6f 	isb	sy
 8014344:	f3bf 8f4f 	dsb	sy
 8014348:	603b      	str	r3, [r7, #0]
}
 801434a:	bf00      	nop
 801434c:	bf00      	nop
 801434e:	e7fd      	b.n	801434c <prvSwitchTimerLists+0x98>
	while( listLIST_IS_EMPTY( pxCurrentTimerList ) == pdFALSE )
 8014350:	4b09      	ldr	r3, [pc, #36]	@ (8014378 <prvSwitchTimerLists+0xc4>)
 8014352:	681b      	ldr	r3, [r3, #0]
 8014354:	681b      	ldr	r3, [r3, #0]
 8014356:	2b00      	cmp	r3, #0
 8014358:	d1b0      	bne.n	80142bc <prvSwitchTimerLists+0x8>
		{
			mtCOVERAGE_TEST_MARKER();
		}
	}

	pxTemp = pxCurrentTimerList;
 801435a:	4b07      	ldr	r3, [pc, #28]	@ (8014378 <prvSwitchTimerLists+0xc4>)
 801435c:	681b      	ldr	r3, [r3, #0]
 801435e:	617b      	str	r3, [r7, #20]
	pxCurrentTimerList = pxOverflowTimerList;
 8014360:	4b06      	ldr	r3, [pc, #24]	@ (801437c <prvSwitchTimerLists+0xc8>)
 8014362:	681b      	ldr	r3, [r3, #0]
 8014364:	4a04      	ldr	r2, [pc, #16]	@ (8014378 <prvSwitchTimerLists+0xc4>)
 8014366:	6013      	str	r3, [r2, #0]
	pxOverflowTimerList = pxTemp;
 8014368:	4a04      	ldr	r2, [pc, #16]	@ (801437c <prvSwitchTimerLists+0xc8>)
 801436a:	697b      	ldr	r3, [r7, #20]
 801436c:	6013      	str	r3, [r2, #0]
}
 801436e:	bf00      	nop
 8014370:	3718      	adds	r7, #24
 8014372:	46bd      	mov	sp, r7
 8014374:	bd80      	pop	{r7, pc}
 8014376:	bf00      	nop
 8014378:	2400331c 	.word	0x2400331c
 801437c:	24003320 	.word	0x24003320

08014380 <prvCheckForValidListAndQueue>:
/*-----------------------------------------------------------*/

static void prvCheckForValidListAndQueue( void )
{
 8014380:	b580      	push	{r7, lr}
 8014382:	b082      	sub	sp, #8
 8014384:	af02      	add	r7, sp, #8
	/* Check that the list from which active timers are referenced, and the
	queue used to communicate with the timer service, have been
	initialised. */
	taskENTER_CRITICAL();
 8014386:	f000 f96f 	bl	8014668 <vPortEnterCritical>
	{
		if( xTimerQueue == NULL )
 801438a:	4b15      	ldr	r3, [pc, #84]	@ (80143e0 <prvCheckForValidListAndQueue+0x60>)
 801438c:	681b      	ldr	r3, [r3, #0]
 801438e:	2b00      	cmp	r3, #0
 8014390:	d120      	bne.n	80143d4 <prvCheckForValidListAndQueue+0x54>
		{
			vListInitialise( &xActiveTimerList1 );
 8014392:	4814      	ldr	r0, [pc, #80]	@ (80143e4 <prvCheckForValidListAndQueue+0x64>)
 8014394:	f7fc fcac 	bl	8010cf0 <vListInitialise>
			vListInitialise( &xActiveTimerList2 );
 8014398:	4813      	ldr	r0, [pc, #76]	@ (80143e8 <prvCheckForValidListAndQueue+0x68>)
 801439a:	f7fc fca9 	bl	8010cf0 <vListInitialise>
			pxCurrentTimerList = &xActiveTimerList1;
 801439e:	4b13      	ldr	r3, [pc, #76]	@ (80143ec <prvCheckForValidListAndQueue+0x6c>)
 80143a0:	4a10      	ldr	r2, [pc, #64]	@ (80143e4 <prvCheckForValidListAndQueue+0x64>)
 80143a2:	601a      	str	r2, [r3, #0]
			pxOverflowTimerList = &xActiveTimerList2;
 80143a4:	4b12      	ldr	r3, [pc, #72]	@ (80143f0 <prvCheckForValidListAndQueue+0x70>)
 80143a6:	4a10      	ldr	r2, [pc, #64]	@ (80143e8 <prvCheckForValidListAndQueue+0x68>)
 80143a8:	601a      	str	r2, [r3, #0]
				/* The timer queue is allocated statically in case
				configSUPPORT_DYNAMIC_ALLOCATION is 0. */
				static StaticQueue_t xStaticTimerQueue; /*lint !e956 Ok to declare in this manner to prevent additional conditional compilation guards in other locations. */
				static uint8_t ucStaticTimerQueueStorage[ ( size_t ) configTIMER_QUEUE_LENGTH * sizeof( DaemonTaskMessage_t ) ]; /*lint !e956 Ok to declare in this manner to prevent additional conditional compilation guards in other locations. */

				xTimerQueue = xQueueCreateStatic( ( UBaseType_t ) configTIMER_QUEUE_LENGTH, ( UBaseType_t ) sizeof( DaemonTaskMessage_t ), &( ucStaticTimerQueueStorage[ 0 ] ), &xStaticTimerQueue );
 80143aa:	2300      	movs	r3, #0
 80143ac:	9300      	str	r3, [sp, #0]
 80143ae:	4b11      	ldr	r3, [pc, #68]	@ (80143f4 <prvCheckForValidListAndQueue+0x74>)
 80143b0:	4a11      	ldr	r2, [pc, #68]	@ (80143f8 <prvCheckForValidListAndQueue+0x78>)
 80143b2:	2110      	movs	r1, #16
 80143b4:	200a      	movs	r0, #10
 80143b6:	f7fc fdb9 	bl	8010f2c <xQueueGenericCreateStatic>
 80143ba:	4603      	mov	r3, r0
 80143bc:	4a08      	ldr	r2, [pc, #32]	@ (80143e0 <prvCheckForValidListAndQueue+0x60>)
 80143be:	6013      	str	r3, [r2, #0]
			}
			#endif

			#if ( configQUEUE_REGISTRY_SIZE > 0 )
			{
				if( xTimerQueue != NULL )
 80143c0:	4b07      	ldr	r3, [pc, #28]	@ (80143e0 <prvCheckForValidListAndQueue+0x60>)
 80143c2:	681b      	ldr	r3, [r3, #0]
 80143c4:	2b00      	cmp	r3, #0
 80143c6:	d005      	beq.n	80143d4 <prvCheckForValidListAndQueue+0x54>
				{
					vQueueAddToRegistry( xTimerQueue, "TmrQ" );
 80143c8:	4b05      	ldr	r3, [pc, #20]	@ (80143e0 <prvCheckForValidListAndQueue+0x60>)
 80143ca:	681b      	ldr	r3, [r3, #0]
 80143cc:	490b      	ldr	r1, [pc, #44]	@ (80143fc <prvCheckForValidListAndQueue+0x7c>)
 80143ce:	4618      	mov	r0, r3
 80143d0:	f7fd fddc 	bl	8011f8c <vQueueAddToRegistry>
		else
		{
			mtCOVERAGE_TEST_MARKER();
		}
	}
	taskEXIT_CRITICAL();
 80143d4:	f000 f97a 	bl	80146cc <vPortExitCritical>
}
 80143d8:	bf00      	nop
 80143da:	46bd      	mov	sp, r7
 80143dc:	bd80      	pop	{r7, pc}
 80143de:	bf00      	nop
 80143e0:	24003324 	.word	0x24003324
 80143e4:	240032f4 	.word	0x240032f4
 80143e8:	24003308 	.word	0x24003308
 80143ec:	2400331c 	.word	0x2400331c
 80143f0:	24003320 	.word	0x24003320
 80143f4:	240033d0 	.word	0x240033d0
 80143f8:	24003330 	.word	0x24003330
 80143fc:	0802c710 	.word	0x0802c710

08014400 <pxPortInitialiseStack>:

/*
 * See header file for description.
 */
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
{
 8014400:	b480      	push	{r7}
 8014402:	b085      	sub	sp, #20
 8014404:	af00      	add	r7, sp, #0
 8014406:	60f8      	str	r0, [r7, #12]
 8014408:	60b9      	str	r1, [r7, #8]
 801440a:	607a      	str	r2, [r7, #4]
	/* Simulate the stack frame as it would be created by a context switch
	interrupt. */

	/* Offset added to account for the way the MCU uses the stack on entry/exit
	of interrupts, and to ensure alignment. */
	pxTopOfStack--;
 801440c:	68fb      	ldr	r3, [r7, #12]
 801440e:	3b04      	subs	r3, #4
 8014410:	60fb      	str	r3, [r7, #12]

	*pxTopOfStack = portINITIAL_XPSR;	/* xPSR */
 8014412:	68fb      	ldr	r3, [r7, #12]
 8014414:	f04f 7280 	mov.w	r2, #16777216	@ 0x1000000
 8014418:	601a      	str	r2, [r3, #0]
	pxTopOfStack--;
 801441a:	68fb      	ldr	r3, [r7, #12]
 801441c:	3b04      	subs	r3, #4
 801441e:	60fb      	str	r3, [r7, #12]
	*pxTopOfStack = ( ( StackType_t ) pxCode ) & portSTART_ADDRESS_MASK;	/* PC */
 8014420:	68bb      	ldr	r3, [r7, #8]
 8014422:	f023 0201 	bic.w	r2, r3, #1
 8014426:	68fb      	ldr	r3, [r7, #12]
 8014428:	601a      	str	r2, [r3, #0]
	pxTopOfStack--;
 801442a:	68fb      	ldr	r3, [r7, #12]
 801442c:	3b04      	subs	r3, #4
 801442e:	60fb      	str	r3, [r7, #12]
	*pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS;	/* LR */
 8014430:	4a0c      	ldr	r2, [pc, #48]	@ (8014464 <pxPortInitialiseStack+0x64>)
 8014432:	68fb      	ldr	r3, [r7, #12]
 8014434:	601a      	str	r2, [r3, #0]

	/* Save code space by skipping register initialisation. */
	pxTopOfStack -= 5;	/* R12, R3, R2 and R1. */
 8014436:	68fb      	ldr	r3, [r7, #12]
 8014438:	3b14      	subs	r3, #20
 801443a:	60fb      	str	r3, [r7, #12]
	*pxTopOfStack = ( StackType_t ) pvParameters;	/* R0 */
 801443c:	687a      	ldr	r2, [r7, #4]
 801443e:	68fb      	ldr	r3, [r7, #12]
 8014440:	601a      	str	r2, [r3, #0]

	/* A save method is being used that requires each task to maintain its
	own exec return value. */
	pxTopOfStack--;
 8014442:	68fb      	ldr	r3, [r7, #12]
 8014444:	3b04      	subs	r3, #4
 8014446:	60fb      	str	r3, [r7, #12]
	*pxTopOfStack = portINITIAL_EXC_RETURN;
 8014448:	68fb      	ldr	r3, [r7, #12]
 801444a:	f06f 0202 	mvn.w	r2, #2
 801444e:	601a      	str	r2, [r3, #0]

	pxTopOfStack -= 8;	/* R11, R10, R9, R8, R7, R6, R5 and R4. */
 8014450:	68fb      	ldr	r3, [r7, #12]
 8014452:	3b20      	subs	r3, #32
 8014454:	60fb      	str	r3, [r7, #12]

	return pxTopOfStack;
 8014456:	68fb      	ldr	r3, [r7, #12]
}
 8014458:	4618      	mov	r0, r3
 801445a:	3714      	adds	r7, #20
 801445c:	46bd      	mov	sp, r7
 801445e:	f85d 7b04 	ldr.w	r7, [sp], #4
 8014462:	4770      	bx	lr
 8014464:	08014469 	.word	0x08014469

08014468 <prvTaskExitError>:
/*-----------------------------------------------------------*/

static void prvTaskExitError( void )
{
 8014468:	b480      	push	{r7}
 801446a:	b085      	sub	sp, #20
 801446c:	af00      	add	r7, sp, #0
volatile uint32_t ulDummy = 0;
 801446e:	2300      	movs	r3, #0
 8014470:	607b      	str	r3, [r7, #4]
	its caller as there is nothing to return to.  If a task wants to exit it
	should instead call vTaskDelete( NULL ).

	Artificially force an assert() to be triggered if configASSERT() is
	defined, then stop here so application writers can catch the error. */
	configASSERT( uxCriticalNesting == ~0UL );
 8014472:	4b13      	ldr	r3, [pc, #76]	@ (80144c0 <prvTaskExitError+0x58>)
 8014474:	681b      	ldr	r3, [r3, #0]
 8014476:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 801447a:	d00b      	beq.n	8014494 <prvTaskExitError+0x2c>
	__asm volatile
 801447c:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8014480:	f383 8811 	msr	BASEPRI, r3
 8014484:	f3bf 8f6f 	isb	sy
 8014488:	f3bf 8f4f 	dsb	sy
 801448c:	60fb      	str	r3, [r7, #12]
}
 801448e:	bf00      	nop
 8014490:	bf00      	nop
 8014492:	e7fd      	b.n	8014490 <prvTaskExitError+0x28>
	__asm volatile
 8014494:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8014498:	f383 8811 	msr	BASEPRI, r3
 801449c:	f3bf 8f6f 	isb	sy
 80144a0:	f3bf 8f4f 	dsb	sy
 80144a4:	60bb      	str	r3, [r7, #8]
}
 80144a6:	bf00      	nop
	portDISABLE_INTERRUPTS();
	while( ulDummy == 0 )
 80144a8:	bf00      	nop
 80144aa:	687b      	ldr	r3, [r7, #4]
 80144ac:	2b00      	cmp	r3, #0
 80144ae:	d0fc      	beq.n	80144aa <prvTaskExitError+0x42>
		about code appearing after this function is called - making ulDummy
		volatile makes the compiler think the function could return and
		therefore not output an 'unreachable code' warning for code that appears
		after it. */
	}
}
 80144b0:	bf00      	nop
 80144b2:	bf00      	nop
 80144b4:	3714      	adds	r7, #20
 80144b6:	46bd      	mov	sp, r7
 80144b8:	f85d 7b04 	ldr.w	r7, [sp], #4
 80144bc:	4770      	bx	lr
 80144be:	bf00      	nop
 80144c0:	24000034 	.word	0x24000034
	...

080144d0 <SVC_Handler>:
/*-----------------------------------------------------------*/

void vPortSVCHandler( void )
{
	__asm volatile (
 80144d0:	4b07      	ldr	r3, [pc, #28]	@ (80144f0 <pxCurrentTCBConst2>)
 80144d2:	6819      	ldr	r1, [r3, #0]
 80144d4:	6808      	ldr	r0, [r1, #0]
 80144d6:	e8b0 4ff0 	ldmia.w	r0!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 80144da:	f380 8809 	msr	PSP, r0
 80144de:	f3bf 8f6f 	isb	sy
 80144e2:	f04f 0000 	mov.w	r0, #0
 80144e6:	f380 8811 	msr	BASEPRI, r0
 80144ea:	4770      	bx	lr
 80144ec:	f3af 8000 	nop.w

080144f0 <pxCurrentTCBConst2>:
 80144f0:	24002df4 	.word	0x24002df4
					"	bx r14							\n"
					"									\n"
					"	.align 4						\n"
					"pxCurrentTCBConst2: .word pxCurrentTCB				\n"
				);
}
 80144f4:	bf00      	nop
 80144f6:	bf00      	nop

080144f8 <prvPortStartFirstTask>:
{
	/* Start the first task.  This also clears the bit that indicates the FPU is
	in use in case the FPU was used before the scheduler was started - which
	would otherwise result in the unnecessary leaving of space in the SVC stack
	for lazy saving of FPU registers. */
	__asm volatile(
 80144f8:	4808      	ldr	r0, [pc, #32]	@ (801451c <prvPortStartFirstTask+0x24>)
 80144fa:	6800      	ldr	r0, [r0, #0]
 80144fc:	6800      	ldr	r0, [r0, #0]
 80144fe:	f380 8808 	msr	MSP, r0
 8014502:	f04f 0000 	mov.w	r0, #0
 8014506:	f380 8814 	msr	CONTROL, r0
 801450a:	b662      	cpsie	i
 801450c:	b661      	cpsie	f
 801450e:	f3bf 8f4f 	dsb	sy
 8014512:	f3bf 8f6f 	isb	sy
 8014516:	df00      	svc	0
 8014518:	bf00      	nop
					" dsb					\n"
					" isb					\n"
					" svc 0					\n" /* System call to start first task. */
					" nop					\n"
				);
}
 801451a:	bf00      	nop
 801451c:	e000ed08 	.word	0xe000ed08

08014520 <xPortStartScheduler>:

/*
 * See header file for description.
 */
BaseType_t xPortStartScheduler( void )
{
 8014520:	b580      	push	{r7, lr}
 8014522:	b086      	sub	sp, #24
 8014524:	af00      	add	r7, sp, #0
	configASSERT( configMAX_SYSCALL_INTERRUPT_PRIORITY );

	/* This port can be used on all revisions of the Cortex-M7 core other than
	the r0p1 parts.  r0p1 parts should use the port from the
	/source/portable/GCC/ARM_CM7/r0p1 directory. */
	configASSERT( portCPUID != portCORTEX_M7_r0p1_ID );
 8014526:	4b47      	ldr	r3, [pc, #284]	@ (8014644 <xPortStartScheduler+0x124>)
 8014528:	681b      	ldr	r3, [r3, #0]
 801452a:	4a47      	ldr	r2, [pc, #284]	@ (8014648 <xPortStartScheduler+0x128>)
 801452c:	4293      	cmp	r3, r2
 801452e:	d10b      	bne.n	8014548 <xPortStartScheduler+0x28>
	__asm volatile
 8014530:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8014534:	f383 8811 	msr	BASEPRI, r3
 8014538:	f3bf 8f6f 	isb	sy
 801453c:	f3bf 8f4f 	dsb	sy
 8014540:	613b      	str	r3, [r7, #16]
}
 8014542:	bf00      	nop
 8014544:	bf00      	nop
 8014546:	e7fd      	b.n	8014544 <xPortStartScheduler+0x24>
	configASSERT( portCPUID != portCORTEX_M7_r0p0_ID );
 8014548:	4b3e      	ldr	r3, [pc, #248]	@ (8014644 <xPortStartScheduler+0x124>)
 801454a:	681b      	ldr	r3, [r3, #0]
 801454c:	4a3f      	ldr	r2, [pc, #252]	@ (801464c <xPortStartScheduler+0x12c>)
 801454e:	4293      	cmp	r3, r2
 8014550:	d10b      	bne.n	801456a <xPortStartScheduler+0x4a>
	__asm volatile
 8014552:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8014556:	f383 8811 	msr	BASEPRI, r3
 801455a:	f3bf 8f6f 	isb	sy
 801455e:	f3bf 8f4f 	dsb	sy
 8014562:	60fb      	str	r3, [r7, #12]
}
 8014564:	bf00      	nop
 8014566:	bf00      	nop
 8014568:	e7fd      	b.n	8014566 <xPortStartScheduler+0x46>

	#if( configASSERT_DEFINED == 1 )
	{
		volatile uint32_t ulOriginalPriority;
		volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
 801456a:	4b39      	ldr	r3, [pc, #228]	@ (8014650 <xPortStartScheduler+0x130>)
 801456c:	617b      	str	r3, [r7, #20]
		functions can be called.  ISR safe functions are those that end in
		"FromISR".  FreeRTOS maintains separate thread and ISR API functions to
		ensure interrupt entry is as fast and simple as possible.

		Save the interrupt priority value that is about to be clobbered. */
		ulOriginalPriority = *pucFirstUserPriorityRegister;
 801456e:	697b      	ldr	r3, [r7, #20]
 8014570:	781b      	ldrb	r3, [r3, #0]
 8014572:	b2db      	uxtb	r3, r3
 8014574:	607b      	str	r3, [r7, #4]

		/* Determine the number of priority bits available.  First write to all
		possible bits. */
		*pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
 8014576:	697b      	ldr	r3, [r7, #20]
 8014578:	22ff      	movs	r2, #255	@ 0xff
 801457a:	701a      	strb	r2, [r3, #0]

		/* Read the value back to see how many bits stuck. */
		ucMaxPriorityValue = *pucFirstUserPriorityRegister;
 801457c:	697b      	ldr	r3, [r7, #20]
 801457e:	781b      	ldrb	r3, [r3, #0]
 8014580:	b2db      	uxtb	r3, r3
 8014582:	70fb      	strb	r3, [r7, #3]

		/* Use the same mask on the maximum system call priority. */
		ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
 8014584:	78fb      	ldrb	r3, [r7, #3]
 8014586:	b2db      	uxtb	r3, r3
 8014588:	f003 0350 	and.w	r3, r3, #80	@ 0x50
 801458c:	b2da      	uxtb	r2, r3
 801458e:	4b31      	ldr	r3, [pc, #196]	@ (8014654 <xPortStartScheduler+0x134>)
 8014590:	701a      	strb	r2, [r3, #0]

		/* Calculate the maximum acceptable priority group value for the number
		of bits read back. */
		ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
 8014592:	4b31      	ldr	r3, [pc, #196]	@ (8014658 <xPortStartScheduler+0x138>)
 8014594:	2207      	movs	r2, #7
 8014596:	601a      	str	r2, [r3, #0]
		while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
 8014598:	e009      	b.n	80145ae <xPortStartScheduler+0x8e>
		{
			ulMaxPRIGROUPValue--;
 801459a:	4b2f      	ldr	r3, [pc, #188]	@ (8014658 <xPortStartScheduler+0x138>)
 801459c:	681b      	ldr	r3, [r3, #0]
 801459e:	3b01      	subs	r3, #1
 80145a0:	4a2d      	ldr	r2, [pc, #180]	@ (8014658 <xPortStartScheduler+0x138>)
 80145a2:	6013      	str	r3, [r2, #0]
			ucMaxPriorityValue <<= ( uint8_t ) 0x01;
 80145a4:	78fb      	ldrb	r3, [r7, #3]
 80145a6:	b2db      	uxtb	r3, r3
 80145a8:	005b      	lsls	r3, r3, #1
 80145aa:	b2db      	uxtb	r3, r3
 80145ac:	70fb      	strb	r3, [r7, #3]
		while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
 80145ae:	78fb      	ldrb	r3, [r7, #3]
 80145b0:	b2db      	uxtb	r3, r3
 80145b2:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 80145b6:	2b80      	cmp	r3, #128	@ 0x80
 80145b8:	d0ef      	beq.n	801459a <xPortStartScheduler+0x7a>
		#ifdef configPRIO_BITS
		{
			/* Check the FreeRTOS configuration that defines the number of
			priority bits matches the number of priority bits actually queried
			from the hardware. */
			configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == configPRIO_BITS );
 80145ba:	4b27      	ldr	r3, [pc, #156]	@ (8014658 <xPortStartScheduler+0x138>)
 80145bc:	681b      	ldr	r3, [r3, #0]
 80145be:	f1c3 0307 	rsb	r3, r3, #7
 80145c2:	2b04      	cmp	r3, #4
 80145c4:	d00b      	beq.n	80145de <xPortStartScheduler+0xbe>
	__asm volatile
 80145c6:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80145ca:	f383 8811 	msr	BASEPRI, r3
 80145ce:	f3bf 8f6f 	isb	sy
 80145d2:	f3bf 8f4f 	dsb	sy
 80145d6:	60bb      	str	r3, [r7, #8]
}
 80145d8:	bf00      	nop
 80145da:	bf00      	nop
 80145dc:	e7fd      	b.n	80145da <xPortStartScheduler+0xba>
		}
		#endif

		/* Shift the priority group value back to its position within the AIRCR
		register. */
		ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;
 80145de:	4b1e      	ldr	r3, [pc, #120]	@ (8014658 <xPortStartScheduler+0x138>)
 80145e0:	681b      	ldr	r3, [r3, #0]
 80145e2:	021b      	lsls	r3, r3, #8
 80145e4:	4a1c      	ldr	r2, [pc, #112]	@ (8014658 <xPortStartScheduler+0x138>)
 80145e6:	6013      	str	r3, [r2, #0]
		ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK;
 80145e8:	4b1b      	ldr	r3, [pc, #108]	@ (8014658 <xPortStartScheduler+0x138>)
 80145ea:	681b      	ldr	r3, [r3, #0]
 80145ec:	f403 63e0 	and.w	r3, r3, #1792	@ 0x700
 80145f0:	4a19      	ldr	r2, [pc, #100]	@ (8014658 <xPortStartScheduler+0x138>)
 80145f2:	6013      	str	r3, [r2, #0]

		/* Restore the clobbered interrupt priority register to its original
		value. */
		*pucFirstUserPriorityRegister = ulOriginalPriority;
 80145f4:	687b      	ldr	r3, [r7, #4]
 80145f6:	b2da      	uxtb	r2, r3
 80145f8:	697b      	ldr	r3, [r7, #20]
 80145fa:	701a      	strb	r2, [r3, #0]
	}
	#endif /* conifgASSERT_DEFINED */

	/* Make PendSV and SysTick the lowest priority interrupts. */
	portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
 80145fc:	4b17      	ldr	r3, [pc, #92]	@ (801465c <xPortStartScheduler+0x13c>)
 80145fe:	681b      	ldr	r3, [r3, #0]
 8014600:	4a16      	ldr	r2, [pc, #88]	@ (801465c <xPortStartScheduler+0x13c>)
 8014602:	f443 0370 	orr.w	r3, r3, #15728640	@ 0xf00000
 8014606:	6013      	str	r3, [r2, #0]
	portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
 8014608:	4b14      	ldr	r3, [pc, #80]	@ (801465c <xPortStartScheduler+0x13c>)
 801460a:	681b      	ldr	r3, [r3, #0]
 801460c:	4a13      	ldr	r2, [pc, #76]	@ (801465c <xPortStartScheduler+0x13c>)
 801460e:	f043 4370 	orr.w	r3, r3, #4026531840	@ 0xf0000000
 8014612:	6013      	str	r3, [r2, #0]

	/* Start the timer that generates the tick ISR.  Interrupts are disabled
	here already. */
	vPortSetupTimerInterrupt();
 8014614:	f000 f8da 	bl	80147cc <vPortSetupTimerInterrupt>

	/* Initialise the critical nesting count ready for the first task. */
	uxCriticalNesting = 0;
 8014618:	4b11      	ldr	r3, [pc, #68]	@ (8014660 <xPortStartScheduler+0x140>)
 801461a:	2200      	movs	r2, #0
 801461c:	601a      	str	r2, [r3, #0]

	/* Ensure the VFP is enabled - it should be anyway. */
	vPortEnableVFP();
 801461e:	f000 f8f9 	bl	8014814 <vPortEnableVFP>

	/* Lazy save always. */
	*( portFPCCR ) |= portASPEN_AND_LSPEN_BITS;
 8014622:	4b10      	ldr	r3, [pc, #64]	@ (8014664 <xPortStartScheduler+0x144>)
 8014624:	681b      	ldr	r3, [r3, #0]
 8014626:	4a0f      	ldr	r2, [pc, #60]	@ (8014664 <xPortStartScheduler+0x144>)
 8014628:	f043 4340 	orr.w	r3, r3, #3221225472	@ 0xc0000000
 801462c:	6013      	str	r3, [r2, #0]

	/* Start the first task. */
	prvPortStartFirstTask();
 801462e:	f7ff ff63 	bl	80144f8 <prvPortStartFirstTask>
	exit error function to prevent compiler warnings about a static function
	not being called in the case that the application writer overrides this
	functionality by defining configTASK_RETURN_ADDRESS.  Call
	vTaskSwitchContext() so link time optimisation does not remove the
	symbol. */
	vTaskSwitchContext();
 8014632:	f7fe fcb7 	bl	8012fa4 <vTaskSwitchContext>
	prvTaskExitError();
 8014636:	f7ff ff17 	bl	8014468 <prvTaskExitError>

	/* Should not get here! */
	return 0;
 801463a:	2300      	movs	r3, #0
}
 801463c:	4618      	mov	r0, r3
 801463e:	3718      	adds	r7, #24
 8014640:	46bd      	mov	sp, r7
 8014642:	bd80      	pop	{r7, pc}
 8014644:	e000ed00 	.word	0xe000ed00
 8014648:	410fc271 	.word	0x410fc271
 801464c:	410fc270 	.word	0x410fc270
 8014650:	e000e400 	.word	0xe000e400
 8014654:	24003420 	.word	0x24003420
 8014658:	24003424 	.word	0x24003424
 801465c:	e000ed20 	.word	0xe000ed20
 8014660:	24000034 	.word	0x24000034
 8014664:	e000ef34 	.word	0xe000ef34

08014668 <vPortEnterCritical>:
	configASSERT( uxCriticalNesting == 1000UL );
}
/*-----------------------------------------------------------*/

void vPortEnterCritical( void )
{
 8014668:	b480      	push	{r7}
 801466a:	b083      	sub	sp, #12
 801466c:	af00      	add	r7, sp, #0
	__asm volatile
 801466e:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8014672:	f383 8811 	msr	BASEPRI, r3
 8014676:	f3bf 8f6f 	isb	sy
 801467a:	f3bf 8f4f 	dsb	sy
 801467e:	607b      	str	r3, [r7, #4]
}
 8014680:	bf00      	nop
	portDISABLE_INTERRUPTS();
	uxCriticalNesting++;
 8014682:	4b10      	ldr	r3, [pc, #64]	@ (80146c4 <vPortEnterCritical+0x5c>)
 8014684:	681b      	ldr	r3, [r3, #0]
 8014686:	3301      	adds	r3, #1
 8014688:	4a0e      	ldr	r2, [pc, #56]	@ (80146c4 <vPortEnterCritical+0x5c>)
 801468a:	6013      	str	r3, [r2, #0]
	/* This is not the interrupt safe version of the enter critical function so
	assert() if it is being called from an interrupt context.  Only API
	functions that end in "FromISR" can be used in an interrupt.  Only assert if
	the critical nesting count is 1 to protect against recursive calls if the
	assert function also uses a critical section. */
	if( uxCriticalNesting == 1 )
 801468c:	4b0d      	ldr	r3, [pc, #52]	@ (80146c4 <vPortEnterCritical+0x5c>)
 801468e:	681b      	ldr	r3, [r3, #0]
 8014690:	2b01      	cmp	r3, #1
 8014692:	d110      	bne.n	80146b6 <vPortEnterCritical+0x4e>
	{
		configASSERT( ( portNVIC_INT_CTRL_REG & portVECTACTIVE_MASK ) == 0 );
 8014694:	4b0c      	ldr	r3, [pc, #48]	@ (80146c8 <vPortEnterCritical+0x60>)
 8014696:	681b      	ldr	r3, [r3, #0]
 8014698:	b2db      	uxtb	r3, r3
 801469a:	2b00      	cmp	r3, #0
 801469c:	d00b      	beq.n	80146b6 <vPortEnterCritical+0x4e>
	__asm volatile
 801469e:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80146a2:	f383 8811 	msr	BASEPRI, r3
 80146a6:	f3bf 8f6f 	isb	sy
 80146aa:	f3bf 8f4f 	dsb	sy
 80146ae:	603b      	str	r3, [r7, #0]
}
 80146b0:	bf00      	nop
 80146b2:	bf00      	nop
 80146b4:	e7fd      	b.n	80146b2 <vPortEnterCritical+0x4a>
	}
}
 80146b6:	bf00      	nop
 80146b8:	370c      	adds	r7, #12
 80146ba:	46bd      	mov	sp, r7
 80146bc:	f85d 7b04 	ldr.w	r7, [sp], #4
 80146c0:	4770      	bx	lr
 80146c2:	bf00      	nop
 80146c4:	24000034 	.word	0x24000034
 80146c8:	e000ed04 	.word	0xe000ed04

080146cc <vPortExitCritical>:
/*-----------------------------------------------------------*/

void vPortExitCritical( void )
{
 80146cc:	b480      	push	{r7}
 80146ce:	b083      	sub	sp, #12
 80146d0:	af00      	add	r7, sp, #0
	configASSERT( uxCriticalNesting );
 80146d2:	4b12      	ldr	r3, [pc, #72]	@ (801471c <vPortExitCritical+0x50>)
 80146d4:	681b      	ldr	r3, [r3, #0]
 80146d6:	2b00      	cmp	r3, #0
 80146d8:	d10b      	bne.n	80146f2 <vPortExitCritical+0x26>
	__asm volatile
 80146da:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80146de:	f383 8811 	msr	BASEPRI, r3
 80146e2:	f3bf 8f6f 	isb	sy
 80146e6:	f3bf 8f4f 	dsb	sy
 80146ea:	607b      	str	r3, [r7, #4]
}
 80146ec:	bf00      	nop
 80146ee:	bf00      	nop
 80146f0:	e7fd      	b.n	80146ee <vPortExitCritical+0x22>
	uxCriticalNesting--;
 80146f2:	4b0a      	ldr	r3, [pc, #40]	@ (801471c <vPortExitCritical+0x50>)
 80146f4:	681b      	ldr	r3, [r3, #0]
 80146f6:	3b01      	subs	r3, #1
 80146f8:	4a08      	ldr	r2, [pc, #32]	@ (801471c <vPortExitCritical+0x50>)
 80146fa:	6013      	str	r3, [r2, #0]
	if( uxCriticalNesting == 0 )
 80146fc:	4b07      	ldr	r3, [pc, #28]	@ (801471c <vPortExitCritical+0x50>)
 80146fe:	681b      	ldr	r3, [r3, #0]
 8014700:	2b00      	cmp	r3, #0
 8014702:	d105      	bne.n	8014710 <vPortExitCritical+0x44>
 8014704:	2300      	movs	r3, #0
 8014706:	603b      	str	r3, [r7, #0]
	__asm volatile
 8014708:	683b      	ldr	r3, [r7, #0]
 801470a:	f383 8811 	msr	BASEPRI, r3
}
 801470e:	bf00      	nop
	{
		portENABLE_INTERRUPTS();
	}
}
 8014710:	bf00      	nop
 8014712:	370c      	adds	r7, #12
 8014714:	46bd      	mov	sp, r7
 8014716:	f85d 7b04 	ldr.w	r7, [sp], #4
 801471a:	4770      	bx	lr
 801471c:	24000034 	.word	0x24000034

08014720 <PendSV_Handler>:

void xPortPendSVHandler( void )
{
	/* This is a naked function. */

	__asm volatile
 8014720:	f3ef 8009 	mrs	r0, PSP
 8014724:	f3bf 8f6f 	isb	sy
 8014728:	4b15      	ldr	r3, [pc, #84]	@ (8014780 <pxCurrentTCBConst>)
 801472a:	681a      	ldr	r2, [r3, #0]
 801472c:	f01e 0f10 	tst.w	lr, #16
 8014730:	bf08      	it	eq
 8014732:	ed20 8a10 	vstmdbeq	r0!, {s16-s31}
 8014736:	e920 4ff0 	stmdb	r0!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 801473a:	6010      	str	r0, [r2, #0]
 801473c:	e92d 0009 	stmdb	sp!, {r0, r3}
 8014740:	f04f 0050 	mov.w	r0, #80	@ 0x50
 8014744:	f380 8811 	msr	BASEPRI, r0
 8014748:	f3bf 8f4f 	dsb	sy
 801474c:	f3bf 8f6f 	isb	sy
 8014750:	f7fe fc28 	bl	8012fa4 <vTaskSwitchContext>
 8014754:	f04f 0000 	mov.w	r0, #0
 8014758:	f380 8811 	msr	BASEPRI, r0
 801475c:	bc09      	pop	{r0, r3}
 801475e:	6819      	ldr	r1, [r3, #0]
 8014760:	6808      	ldr	r0, [r1, #0]
 8014762:	e8b0 4ff0 	ldmia.w	r0!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 8014766:	f01e 0f10 	tst.w	lr, #16
 801476a:	bf08      	it	eq
 801476c:	ecb0 8a10 	vldmiaeq	r0!, {s16-s31}
 8014770:	f380 8809 	msr	PSP, r0
 8014774:	f3bf 8f6f 	isb	sy
 8014778:	4770      	bx	lr
 801477a:	bf00      	nop
 801477c:	f3af 8000 	nop.w

08014780 <pxCurrentTCBConst>:
 8014780:	24002df4 	.word	0x24002df4
	"										\n"
	"	.align 4							\n"
	"pxCurrentTCBConst: .word pxCurrentTCB	\n"
	::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY)
	);
}
 8014784:	bf00      	nop
 8014786:	bf00      	nop

08014788 <xPortSysTickHandler>:
/*-----------------------------------------------------------*/

void xPortSysTickHandler( void )
{
 8014788:	b580      	push	{r7, lr}
 801478a:	b082      	sub	sp, #8
 801478c:	af00      	add	r7, sp, #0
	__asm volatile
 801478e:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8014792:	f383 8811 	msr	BASEPRI, r3
 8014796:	f3bf 8f6f 	isb	sy
 801479a:	f3bf 8f4f 	dsb	sy
 801479e:	607b      	str	r3, [r7, #4]
}
 80147a0:	bf00      	nop
	save and then restore the interrupt mask value as its value is already
	known. */
	portDISABLE_INTERRUPTS();
	{
		/* Increment the RTOS tick. */
		if( xTaskIncrementTick() != pdFALSE )
 80147a2:	f7fe fb45 	bl	8012e30 <xTaskIncrementTick>
 80147a6:	4603      	mov	r3, r0
 80147a8:	2b00      	cmp	r3, #0
 80147aa:	d003      	beq.n	80147b4 <xPortSysTickHandler+0x2c>
		{
			/* A context switch is required.  Context switching is performed in
			the PendSV interrupt.  Pend the PendSV interrupt. */
			portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
 80147ac:	4b06      	ldr	r3, [pc, #24]	@ (80147c8 <xPortSysTickHandler+0x40>)
 80147ae:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 80147b2:	601a      	str	r2, [r3, #0]
 80147b4:	2300      	movs	r3, #0
 80147b6:	603b      	str	r3, [r7, #0]
	__asm volatile
 80147b8:	683b      	ldr	r3, [r7, #0]
 80147ba:	f383 8811 	msr	BASEPRI, r3
}
 80147be:	bf00      	nop
		}
	}
	portENABLE_INTERRUPTS();
}
 80147c0:	bf00      	nop
 80147c2:	3708      	adds	r7, #8
 80147c4:	46bd      	mov	sp, r7
 80147c6:	bd80      	pop	{r7, pc}
 80147c8:	e000ed04 	.word	0xe000ed04

080147cc <vPortSetupTimerInterrupt>:
/*
 * Setup the systick timer to generate the tick interrupts at the required
 * frequency.
 */
__attribute__(( weak )) void vPortSetupTimerInterrupt( void )
{
 80147cc:	b480      	push	{r7}
 80147ce:	af00      	add	r7, sp, #0
		ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
	}
	#endif /* configUSE_TICKLESS_IDLE */

	/* Stop and clear the SysTick. */
	portNVIC_SYSTICK_CTRL_REG = 0UL;
 80147d0:	4b0b      	ldr	r3, [pc, #44]	@ (8014800 <vPortSetupTimerInterrupt+0x34>)
 80147d2:	2200      	movs	r2, #0
 80147d4:	601a      	str	r2, [r3, #0]
	portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
 80147d6:	4b0b      	ldr	r3, [pc, #44]	@ (8014804 <vPortSetupTimerInterrupt+0x38>)
 80147d8:	2200      	movs	r2, #0
 80147da:	601a      	str	r2, [r3, #0]

	/* Configure SysTick to interrupt at the requested rate. */
	portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
 80147dc:	4b0a      	ldr	r3, [pc, #40]	@ (8014808 <vPortSetupTimerInterrupt+0x3c>)
 80147de:	681b      	ldr	r3, [r3, #0]
 80147e0:	4a0a      	ldr	r2, [pc, #40]	@ (801480c <vPortSetupTimerInterrupt+0x40>)
 80147e2:	fba2 2303 	umull	r2, r3, r2, r3
 80147e6:	099b      	lsrs	r3, r3, #6
 80147e8:	4a09      	ldr	r2, [pc, #36]	@ (8014810 <vPortSetupTimerInterrupt+0x44>)
 80147ea:	3b01      	subs	r3, #1
 80147ec:	6013      	str	r3, [r2, #0]
	portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
 80147ee:	4b04      	ldr	r3, [pc, #16]	@ (8014800 <vPortSetupTimerInterrupt+0x34>)
 80147f0:	2207      	movs	r2, #7
 80147f2:	601a      	str	r2, [r3, #0]
}
 80147f4:	bf00      	nop
 80147f6:	46bd      	mov	sp, r7
 80147f8:	f85d 7b04 	ldr.w	r7, [sp], #4
 80147fc:	4770      	bx	lr
 80147fe:	bf00      	nop
 8014800:	e000e010 	.word	0xe000e010
 8014804:	e000e018 	.word	0xe000e018
 8014808:	2400000c 	.word	0x2400000c
 801480c:	10624dd3 	.word	0x10624dd3
 8014810:	e000e014 	.word	0xe000e014

08014814 <vPortEnableVFP>:
/*-----------------------------------------------------------*/

/* This is a naked function. */
static void vPortEnableVFP( void )
{
	__asm volatile
 8014814:	f8df 000c 	ldr.w	r0, [pc, #12]	@ 8014824 <vPortEnableVFP+0x10>
 8014818:	6801      	ldr	r1, [r0, #0]
 801481a:	f441 0170 	orr.w	r1, r1, #15728640	@ 0xf00000
 801481e:	6001      	str	r1, [r0, #0]
 8014820:	4770      	bx	lr
		"								\n"
		"	orr r1, r1, #( 0xf << 20 )	\n" /* Enable CP10 and CP11 coprocessors, then save back. */
		"	str r1, [r0]				\n"
		"	bx r14						"
	);
}
 8014822:	bf00      	nop
 8014824:	e000ed88 	.word	0xe000ed88

08014828 <vPortValidateInterruptPriority>:
/*-----------------------------------------------------------*/

#if( configASSERT_DEFINED == 1 )

	void vPortValidateInterruptPriority( void )
	{
 8014828:	b480      	push	{r7}
 801482a:	b085      	sub	sp, #20
 801482c:	af00      	add	r7, sp, #0
	uint32_t ulCurrentInterrupt;
	uint8_t ucCurrentPriority;

		/* Obtain the number of the currently executing interrupt. */
		__asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" );
 801482e:	f3ef 8305 	mrs	r3, IPSR
 8014832:	60fb      	str	r3, [r7, #12]

		/* Is the interrupt number a user defined interrupt? */
		if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )
 8014834:	68fb      	ldr	r3, [r7, #12]
 8014836:	2b0f      	cmp	r3, #15
 8014838:	d915      	bls.n	8014866 <vPortValidateInterruptPriority+0x3e>
		{
			/* Look up the interrupt's priority. */
			ucCurrentPriority = pcInterruptPriorityRegisters[ ulCurrentInterrupt ];
 801483a:	4a18      	ldr	r2, [pc, #96]	@ (801489c <vPortValidateInterruptPriority+0x74>)
 801483c:	68fb      	ldr	r3, [r7, #12]
 801483e:	4413      	add	r3, r2
 8014840:	781b      	ldrb	r3, [r3, #0]
 8014842:	72fb      	strb	r3, [r7, #11]
			interrupt entry is as fast and simple as possible.

			The following links provide detailed information:
			http://www.freertos.org/RTOS-Cortex-M3-M4.html
			http://www.freertos.org/FAQHelp.html */
			configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );
 8014844:	4b16      	ldr	r3, [pc, #88]	@ (80148a0 <vPortValidateInterruptPriority+0x78>)
 8014846:	781b      	ldrb	r3, [r3, #0]
 8014848:	7afa      	ldrb	r2, [r7, #11]
 801484a:	429a      	cmp	r2, r3
 801484c:	d20b      	bcs.n	8014866 <vPortValidateInterruptPriority+0x3e>
	__asm volatile
 801484e:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8014852:	f383 8811 	msr	BASEPRI, r3
 8014856:	f3bf 8f6f 	isb	sy
 801485a:	f3bf 8f4f 	dsb	sy
 801485e:	607b      	str	r3, [r7, #4]
}
 8014860:	bf00      	nop
 8014862:	bf00      	nop
 8014864:	e7fd      	b.n	8014862 <vPortValidateInterruptPriority+0x3a>
		configuration then the correct setting can be achieved on all Cortex-M
		devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the
		scheduler.  Note however that some vendor specific peripheral libraries
		assume a non-zero priority group setting, in which cases using a value
		of zero will result in unpredictable behaviour. */
		configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );
 8014866:	4b0f      	ldr	r3, [pc, #60]	@ (80148a4 <vPortValidateInterruptPriority+0x7c>)
 8014868:	681b      	ldr	r3, [r3, #0]
 801486a:	f403 62e0 	and.w	r2, r3, #1792	@ 0x700
 801486e:	4b0e      	ldr	r3, [pc, #56]	@ (80148a8 <vPortValidateInterruptPriority+0x80>)
 8014870:	681b      	ldr	r3, [r3, #0]
 8014872:	429a      	cmp	r2, r3
 8014874:	d90b      	bls.n	801488e <vPortValidateInterruptPriority+0x66>
	__asm volatile
 8014876:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801487a:	f383 8811 	msr	BASEPRI, r3
 801487e:	f3bf 8f6f 	isb	sy
 8014882:	f3bf 8f4f 	dsb	sy
 8014886:	603b      	str	r3, [r7, #0]
}
 8014888:	bf00      	nop
 801488a:	bf00      	nop
 801488c:	e7fd      	b.n	801488a <vPortValidateInterruptPriority+0x62>
	}
 801488e:	bf00      	nop
 8014890:	3714      	adds	r7, #20
 8014892:	46bd      	mov	sp, r7
 8014894:	f85d 7b04 	ldr.w	r7, [sp], #4
 8014898:	4770      	bx	lr
 801489a:	bf00      	nop
 801489c:	e000e3f0 	.word	0xe000e3f0
 80148a0:	24003420 	.word	0x24003420
 80148a4:	e000ed0c 	.word	0xe000ed0c
 80148a8:	24003424 	.word	0x24003424

080148ac <pvPortMalloc>:
static size_t xBlockAllocatedBit = 0;

/*-----------------------------------------------------------*/

void *pvPortMalloc( size_t xWantedSize )
{
 80148ac:	b580      	push	{r7, lr}
 80148ae:	b08a      	sub	sp, #40	@ 0x28
 80148b0:	af00      	add	r7, sp, #0
 80148b2:	6078      	str	r0, [r7, #4]
BlockLink_t *pxBlock, *pxPreviousBlock, *pxNewBlockLink;
void *pvReturn = NULL;
 80148b4:	2300      	movs	r3, #0
 80148b6:	61fb      	str	r3, [r7, #28]

	vTaskSuspendAll();
 80148b8:	f7fe f9ec 	bl	8012c94 <vTaskSuspendAll>
	{
		/* If this is the first call to malloc then the heap will require
		initialisation to setup the list of free blocks. */
		if( pxEnd == NULL )
 80148bc:	4b5c      	ldr	r3, [pc, #368]	@ (8014a30 <pvPortMalloc+0x184>)
 80148be:	681b      	ldr	r3, [r3, #0]
 80148c0:	2b00      	cmp	r3, #0
 80148c2:	d101      	bne.n	80148c8 <pvPortMalloc+0x1c>
		{
			prvHeapInit();
 80148c4:	f000 f924 	bl	8014b10 <prvHeapInit>

		/* Check the requested block size is not so large that the top bit is
		set.  The top bit of the block size member of the BlockLink_t structure
		is used to determine who owns the block - the application or the
		kernel, so it must be free. */
		if( ( xWantedSize & xBlockAllocatedBit ) == 0 )
 80148c8:	4b5a      	ldr	r3, [pc, #360]	@ (8014a34 <pvPortMalloc+0x188>)
 80148ca:	681a      	ldr	r2, [r3, #0]
 80148cc:	687b      	ldr	r3, [r7, #4]
 80148ce:	4013      	ands	r3, r2
 80148d0:	2b00      	cmp	r3, #0
 80148d2:	f040 8095 	bne.w	8014a00 <pvPortMalloc+0x154>
		{
			/* The wanted size is increased so it can contain a BlockLink_t
			structure in addition to the requested amount of bytes. */
			if( xWantedSize > 0 )
 80148d6:	687b      	ldr	r3, [r7, #4]
 80148d8:	2b00      	cmp	r3, #0
 80148da:	d01e      	beq.n	801491a <pvPortMalloc+0x6e>
			{
				xWantedSize += xHeapStructSize;
 80148dc:	2208      	movs	r2, #8
 80148de:	687b      	ldr	r3, [r7, #4]
 80148e0:	4413      	add	r3, r2
 80148e2:	607b      	str	r3, [r7, #4]

				/* Ensure that blocks are always aligned to the required number
				of bytes. */
				if( ( xWantedSize & portBYTE_ALIGNMENT_MASK ) != 0x00 )
 80148e4:	687b      	ldr	r3, [r7, #4]
 80148e6:	f003 0307 	and.w	r3, r3, #7
 80148ea:	2b00      	cmp	r3, #0
 80148ec:	d015      	beq.n	801491a <pvPortMalloc+0x6e>
				{
					/* Byte alignment required. */
					xWantedSize += ( portBYTE_ALIGNMENT - ( xWantedSize & portBYTE_ALIGNMENT_MASK ) );
 80148ee:	687b      	ldr	r3, [r7, #4]
 80148f0:	f023 0307 	bic.w	r3, r3, #7
 80148f4:	3308      	adds	r3, #8
 80148f6:	607b      	str	r3, [r7, #4]
					configASSERT( ( xWantedSize & portBYTE_ALIGNMENT_MASK ) == 0 );
 80148f8:	687b      	ldr	r3, [r7, #4]
 80148fa:	f003 0307 	and.w	r3, r3, #7
 80148fe:	2b00      	cmp	r3, #0
 8014900:	d00b      	beq.n	801491a <pvPortMalloc+0x6e>
	__asm volatile
 8014902:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8014906:	f383 8811 	msr	BASEPRI, r3
 801490a:	f3bf 8f6f 	isb	sy
 801490e:	f3bf 8f4f 	dsb	sy
 8014912:	617b      	str	r3, [r7, #20]
}
 8014914:	bf00      	nop
 8014916:	bf00      	nop
 8014918:	e7fd      	b.n	8014916 <pvPortMalloc+0x6a>
			else
			{
				mtCOVERAGE_TEST_MARKER();
			}

			if( ( xWantedSize > 0 ) && ( xWantedSize <= xFreeBytesRemaining ) )
 801491a:	687b      	ldr	r3, [r7, #4]
 801491c:	2b00      	cmp	r3, #0
 801491e:	d06f      	beq.n	8014a00 <pvPortMalloc+0x154>
 8014920:	4b45      	ldr	r3, [pc, #276]	@ (8014a38 <pvPortMalloc+0x18c>)
 8014922:	681b      	ldr	r3, [r3, #0]
 8014924:	687a      	ldr	r2, [r7, #4]
 8014926:	429a      	cmp	r2, r3
 8014928:	d86a      	bhi.n	8014a00 <pvPortMalloc+0x154>
			{
				/* Traverse the list from the start	(lowest address) block until
				one	of adequate size is found. */
				pxPreviousBlock = &xStart;
 801492a:	4b44      	ldr	r3, [pc, #272]	@ (8014a3c <pvPortMalloc+0x190>)
 801492c:	623b      	str	r3, [r7, #32]
				pxBlock = xStart.pxNextFreeBlock;
 801492e:	4b43      	ldr	r3, [pc, #268]	@ (8014a3c <pvPortMalloc+0x190>)
 8014930:	681b      	ldr	r3, [r3, #0]
 8014932:	627b      	str	r3, [r7, #36]	@ 0x24
				while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) )
 8014934:	e004      	b.n	8014940 <pvPortMalloc+0x94>
				{
					pxPreviousBlock = pxBlock;
 8014936:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8014938:	623b      	str	r3, [r7, #32]
					pxBlock = pxBlock->pxNextFreeBlock;
 801493a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801493c:	681b      	ldr	r3, [r3, #0]
 801493e:	627b      	str	r3, [r7, #36]	@ 0x24
				while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) )
 8014940:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8014942:	685b      	ldr	r3, [r3, #4]
 8014944:	687a      	ldr	r2, [r7, #4]
 8014946:	429a      	cmp	r2, r3
 8014948:	d903      	bls.n	8014952 <pvPortMalloc+0xa6>
 801494a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801494c:	681b      	ldr	r3, [r3, #0]
 801494e:	2b00      	cmp	r3, #0
 8014950:	d1f1      	bne.n	8014936 <pvPortMalloc+0x8a>
				}

				/* If the end marker was reached then a block of adequate size
				was	not found. */
				if( pxBlock != pxEnd )
 8014952:	4b37      	ldr	r3, [pc, #220]	@ (8014a30 <pvPortMalloc+0x184>)
 8014954:	681b      	ldr	r3, [r3, #0]
 8014956:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8014958:	429a      	cmp	r2, r3
 801495a:	d051      	beq.n	8014a00 <pvPortMalloc+0x154>
				{
					/* Return the memory space pointed to - jumping over the
					BlockLink_t structure at its start. */
					pvReturn = ( void * ) ( ( ( uint8_t * ) pxPreviousBlock->pxNextFreeBlock ) + xHeapStructSize );
 801495c:	6a3b      	ldr	r3, [r7, #32]
 801495e:	681b      	ldr	r3, [r3, #0]
 8014960:	2208      	movs	r2, #8
 8014962:	4413      	add	r3, r2
 8014964:	61fb      	str	r3, [r7, #28]

					/* This block is being returned for use so must be taken out
					of the list of free blocks. */
					pxPreviousBlock->pxNextFreeBlock = pxBlock->pxNextFreeBlock;
 8014966:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8014968:	681a      	ldr	r2, [r3, #0]
 801496a:	6a3b      	ldr	r3, [r7, #32]
 801496c:	601a      	str	r2, [r3, #0]

					/* If the block is larger than required it can be split into
					two. */
					if( ( pxBlock->xBlockSize - xWantedSize ) > heapMINIMUM_BLOCK_SIZE )
 801496e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8014970:	685a      	ldr	r2, [r3, #4]
 8014972:	687b      	ldr	r3, [r7, #4]
 8014974:	1ad2      	subs	r2, r2, r3
 8014976:	2308      	movs	r3, #8
 8014978:	005b      	lsls	r3, r3, #1
 801497a:	429a      	cmp	r2, r3
 801497c:	d920      	bls.n	80149c0 <pvPortMalloc+0x114>
					{
						/* This block is to be split into two.  Create a new
						block following the number of bytes requested. The void
						cast is used to prevent byte alignment warnings from the
						compiler. */
						pxNewBlockLink = ( void * ) ( ( ( uint8_t * ) pxBlock ) + xWantedSize );
 801497e:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8014980:	687b      	ldr	r3, [r7, #4]
 8014982:	4413      	add	r3, r2
 8014984:	61bb      	str	r3, [r7, #24]
						configASSERT( ( ( ( size_t ) pxNewBlockLink ) & portBYTE_ALIGNMENT_MASK ) == 0 );
 8014986:	69bb      	ldr	r3, [r7, #24]
 8014988:	f003 0307 	and.w	r3, r3, #7
 801498c:	2b00      	cmp	r3, #0
 801498e:	d00b      	beq.n	80149a8 <pvPortMalloc+0xfc>
	__asm volatile
 8014990:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8014994:	f383 8811 	msr	BASEPRI, r3
 8014998:	f3bf 8f6f 	isb	sy
 801499c:	f3bf 8f4f 	dsb	sy
 80149a0:	613b      	str	r3, [r7, #16]
}
 80149a2:	bf00      	nop
 80149a4:	bf00      	nop
 80149a6:	e7fd      	b.n	80149a4 <pvPortMalloc+0xf8>

						/* Calculate the sizes of two blocks split from the
						single block. */
						pxNewBlockLink->xBlockSize = pxBlock->xBlockSize - xWantedSize;
 80149a8:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80149aa:	685a      	ldr	r2, [r3, #4]
 80149ac:	687b      	ldr	r3, [r7, #4]
 80149ae:	1ad2      	subs	r2, r2, r3
 80149b0:	69bb      	ldr	r3, [r7, #24]
 80149b2:	605a      	str	r2, [r3, #4]
						pxBlock->xBlockSize = xWantedSize;
 80149b4:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80149b6:	687a      	ldr	r2, [r7, #4]
 80149b8:	605a      	str	r2, [r3, #4]

						/* Insert the new block into the list of free blocks. */
						prvInsertBlockIntoFreeList( pxNewBlockLink );
 80149ba:	69b8      	ldr	r0, [r7, #24]
 80149bc:	f000 f90a 	bl	8014bd4 <prvInsertBlockIntoFreeList>
					else
					{
						mtCOVERAGE_TEST_MARKER();
					}

					xFreeBytesRemaining -= pxBlock->xBlockSize;
 80149c0:	4b1d      	ldr	r3, [pc, #116]	@ (8014a38 <pvPortMalloc+0x18c>)
 80149c2:	681a      	ldr	r2, [r3, #0]
 80149c4:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80149c6:	685b      	ldr	r3, [r3, #4]
 80149c8:	1ad3      	subs	r3, r2, r3
 80149ca:	4a1b      	ldr	r2, [pc, #108]	@ (8014a38 <pvPortMalloc+0x18c>)
 80149cc:	6013      	str	r3, [r2, #0]

					if( xFreeBytesRemaining < xMinimumEverFreeBytesRemaining )
 80149ce:	4b1a      	ldr	r3, [pc, #104]	@ (8014a38 <pvPortMalloc+0x18c>)
 80149d0:	681a      	ldr	r2, [r3, #0]
 80149d2:	4b1b      	ldr	r3, [pc, #108]	@ (8014a40 <pvPortMalloc+0x194>)
 80149d4:	681b      	ldr	r3, [r3, #0]
 80149d6:	429a      	cmp	r2, r3
 80149d8:	d203      	bcs.n	80149e2 <pvPortMalloc+0x136>
					{
						xMinimumEverFreeBytesRemaining = xFreeBytesRemaining;
 80149da:	4b17      	ldr	r3, [pc, #92]	@ (8014a38 <pvPortMalloc+0x18c>)
 80149dc:	681b      	ldr	r3, [r3, #0]
 80149de:	4a18      	ldr	r2, [pc, #96]	@ (8014a40 <pvPortMalloc+0x194>)
 80149e0:	6013      	str	r3, [r2, #0]
						mtCOVERAGE_TEST_MARKER();
					}

					/* The block is being returned - it is allocated and owned
					by the application and has no "next" block. */
					pxBlock->xBlockSize |= xBlockAllocatedBit;
 80149e2:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80149e4:	685a      	ldr	r2, [r3, #4]
 80149e6:	4b13      	ldr	r3, [pc, #76]	@ (8014a34 <pvPortMalloc+0x188>)
 80149e8:	681b      	ldr	r3, [r3, #0]
 80149ea:	431a      	orrs	r2, r3
 80149ec:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80149ee:	605a      	str	r2, [r3, #4]
					pxBlock->pxNextFreeBlock = NULL;
 80149f0:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80149f2:	2200      	movs	r2, #0
 80149f4:	601a      	str	r2, [r3, #0]
					xNumberOfSuccessfulAllocations++;
 80149f6:	4b13      	ldr	r3, [pc, #76]	@ (8014a44 <pvPortMalloc+0x198>)
 80149f8:	681b      	ldr	r3, [r3, #0]
 80149fa:	3301      	adds	r3, #1
 80149fc:	4a11      	ldr	r2, [pc, #68]	@ (8014a44 <pvPortMalloc+0x198>)
 80149fe:	6013      	str	r3, [r2, #0]
			mtCOVERAGE_TEST_MARKER();
		}

		traceMALLOC( pvReturn, xWantedSize );
	}
	( void ) xTaskResumeAll();
 8014a00:	f7fe f956 	bl	8012cb0 <xTaskResumeAll>
			mtCOVERAGE_TEST_MARKER();
		}
	}
	#endif

	configASSERT( ( ( ( size_t ) pvReturn ) & ( size_t ) portBYTE_ALIGNMENT_MASK ) == 0 );
 8014a04:	69fb      	ldr	r3, [r7, #28]
 8014a06:	f003 0307 	and.w	r3, r3, #7
 8014a0a:	2b00      	cmp	r3, #0
 8014a0c:	d00b      	beq.n	8014a26 <pvPortMalloc+0x17a>
	__asm volatile
 8014a0e:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8014a12:	f383 8811 	msr	BASEPRI, r3
 8014a16:	f3bf 8f6f 	isb	sy
 8014a1a:	f3bf 8f4f 	dsb	sy
 8014a1e:	60fb      	str	r3, [r7, #12]
}
 8014a20:	bf00      	nop
 8014a22:	bf00      	nop
 8014a24:	e7fd      	b.n	8014a22 <pvPortMalloc+0x176>
	return pvReturn;
 8014a26:	69fb      	ldr	r3, [r7, #28]
}
 8014a28:	4618      	mov	r0, r3
 8014a2a:	3728      	adds	r7, #40	@ 0x28
 8014a2c:	46bd      	mov	sp, r7
 8014a2e:	bd80      	pop	{r7, pc}
 8014a30:	24023430 	.word	0x24023430
 8014a34:	24023444 	.word	0x24023444
 8014a38:	24023434 	.word	0x24023434
 8014a3c:	24023428 	.word	0x24023428
 8014a40:	24023438 	.word	0x24023438
 8014a44:	2402343c 	.word	0x2402343c

08014a48 <vPortFree>:
/*-----------------------------------------------------------*/

void vPortFree( void *pv )
{
 8014a48:	b580      	push	{r7, lr}
 8014a4a:	b086      	sub	sp, #24
 8014a4c:	af00      	add	r7, sp, #0
 8014a4e:	6078      	str	r0, [r7, #4]
uint8_t *puc = ( uint8_t * ) pv;
 8014a50:	687b      	ldr	r3, [r7, #4]
 8014a52:	617b      	str	r3, [r7, #20]
BlockLink_t *pxLink;

	if( pv != NULL )
 8014a54:	687b      	ldr	r3, [r7, #4]
 8014a56:	2b00      	cmp	r3, #0
 8014a58:	d04f      	beq.n	8014afa <vPortFree+0xb2>
	{
		/* The memory being freed will have an BlockLink_t structure immediately
		before it. */
		puc -= xHeapStructSize;
 8014a5a:	2308      	movs	r3, #8
 8014a5c:	425b      	negs	r3, r3
 8014a5e:	697a      	ldr	r2, [r7, #20]
 8014a60:	4413      	add	r3, r2
 8014a62:	617b      	str	r3, [r7, #20]

		/* This casting is to keep the compiler from issuing warnings. */
		pxLink = ( void * ) puc;
 8014a64:	697b      	ldr	r3, [r7, #20]
 8014a66:	613b      	str	r3, [r7, #16]

		/* Check the block is actually allocated. */
		configASSERT( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 );
 8014a68:	693b      	ldr	r3, [r7, #16]
 8014a6a:	685a      	ldr	r2, [r3, #4]
 8014a6c:	4b25      	ldr	r3, [pc, #148]	@ (8014b04 <vPortFree+0xbc>)
 8014a6e:	681b      	ldr	r3, [r3, #0]
 8014a70:	4013      	ands	r3, r2
 8014a72:	2b00      	cmp	r3, #0
 8014a74:	d10b      	bne.n	8014a8e <vPortFree+0x46>
	__asm volatile
 8014a76:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8014a7a:	f383 8811 	msr	BASEPRI, r3
 8014a7e:	f3bf 8f6f 	isb	sy
 8014a82:	f3bf 8f4f 	dsb	sy
 8014a86:	60fb      	str	r3, [r7, #12]
}
 8014a88:	bf00      	nop
 8014a8a:	bf00      	nop
 8014a8c:	e7fd      	b.n	8014a8a <vPortFree+0x42>
		configASSERT( pxLink->pxNextFreeBlock == NULL );
 8014a8e:	693b      	ldr	r3, [r7, #16]
 8014a90:	681b      	ldr	r3, [r3, #0]
 8014a92:	2b00      	cmp	r3, #0
 8014a94:	d00b      	beq.n	8014aae <vPortFree+0x66>
	__asm volatile
 8014a96:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8014a9a:	f383 8811 	msr	BASEPRI, r3
 8014a9e:	f3bf 8f6f 	isb	sy
 8014aa2:	f3bf 8f4f 	dsb	sy
 8014aa6:	60bb      	str	r3, [r7, #8]
}
 8014aa8:	bf00      	nop
 8014aaa:	bf00      	nop
 8014aac:	e7fd      	b.n	8014aaa <vPortFree+0x62>

		if( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 )
 8014aae:	693b      	ldr	r3, [r7, #16]
 8014ab0:	685a      	ldr	r2, [r3, #4]
 8014ab2:	4b14      	ldr	r3, [pc, #80]	@ (8014b04 <vPortFree+0xbc>)
 8014ab4:	681b      	ldr	r3, [r3, #0]
 8014ab6:	4013      	ands	r3, r2
 8014ab8:	2b00      	cmp	r3, #0
 8014aba:	d01e      	beq.n	8014afa <vPortFree+0xb2>
		{
			if( pxLink->pxNextFreeBlock == NULL )
 8014abc:	693b      	ldr	r3, [r7, #16]
 8014abe:	681b      	ldr	r3, [r3, #0]
 8014ac0:	2b00      	cmp	r3, #0
 8014ac2:	d11a      	bne.n	8014afa <vPortFree+0xb2>
			{
				/* The block is being returned to the heap - it is no longer
				allocated. */
				pxLink->xBlockSize &= ~xBlockAllocatedBit;
 8014ac4:	693b      	ldr	r3, [r7, #16]
 8014ac6:	685a      	ldr	r2, [r3, #4]
 8014ac8:	4b0e      	ldr	r3, [pc, #56]	@ (8014b04 <vPortFree+0xbc>)
 8014aca:	681b      	ldr	r3, [r3, #0]
 8014acc:	43db      	mvns	r3, r3
 8014ace:	401a      	ands	r2, r3
 8014ad0:	693b      	ldr	r3, [r7, #16]
 8014ad2:	605a      	str	r2, [r3, #4]

				vTaskSuspendAll();
 8014ad4:	f7fe f8de 	bl	8012c94 <vTaskSuspendAll>
				{
					/* Add this block to the list of free blocks. */
					xFreeBytesRemaining += pxLink->xBlockSize;
 8014ad8:	693b      	ldr	r3, [r7, #16]
 8014ada:	685a      	ldr	r2, [r3, #4]
 8014adc:	4b0a      	ldr	r3, [pc, #40]	@ (8014b08 <vPortFree+0xc0>)
 8014ade:	681b      	ldr	r3, [r3, #0]
 8014ae0:	4413      	add	r3, r2
 8014ae2:	4a09      	ldr	r2, [pc, #36]	@ (8014b08 <vPortFree+0xc0>)
 8014ae4:	6013      	str	r3, [r2, #0]
					traceFREE( pv, pxLink->xBlockSize );
					prvInsertBlockIntoFreeList( ( ( BlockLink_t * ) pxLink ) );
 8014ae6:	6938      	ldr	r0, [r7, #16]
 8014ae8:	f000 f874 	bl	8014bd4 <prvInsertBlockIntoFreeList>
					xNumberOfSuccessfulFrees++;
 8014aec:	4b07      	ldr	r3, [pc, #28]	@ (8014b0c <vPortFree+0xc4>)
 8014aee:	681b      	ldr	r3, [r3, #0]
 8014af0:	3301      	adds	r3, #1
 8014af2:	4a06      	ldr	r2, [pc, #24]	@ (8014b0c <vPortFree+0xc4>)
 8014af4:	6013      	str	r3, [r2, #0]
				}
				( void ) xTaskResumeAll();
 8014af6:	f7fe f8db 	bl	8012cb0 <xTaskResumeAll>
		else
		{
			mtCOVERAGE_TEST_MARKER();
		}
	}
}
 8014afa:	bf00      	nop
 8014afc:	3718      	adds	r7, #24
 8014afe:	46bd      	mov	sp, r7
 8014b00:	bd80      	pop	{r7, pc}
 8014b02:	bf00      	nop
 8014b04:	24023444 	.word	0x24023444
 8014b08:	24023434 	.word	0x24023434
 8014b0c:	24023440 	.word	0x24023440

08014b10 <prvHeapInit>:
	/* This just exists to keep the linker quiet. */
}
/*-----------------------------------------------------------*/

static void prvHeapInit( void )
{
 8014b10:	b480      	push	{r7}
 8014b12:	b085      	sub	sp, #20
 8014b14:	af00      	add	r7, sp, #0
BlockLink_t *pxFirstFreeBlock;
uint8_t *pucAlignedHeap;
size_t uxAddress;
size_t xTotalHeapSize = configTOTAL_HEAP_SIZE;
 8014b16:	f44f 3300 	mov.w	r3, #131072	@ 0x20000
 8014b1a:	60bb      	str	r3, [r7, #8]

	/* Ensure the heap starts on a correctly aligned boundary. */
	uxAddress = ( size_t ) ucHeap;
 8014b1c:	4b27      	ldr	r3, [pc, #156]	@ (8014bbc <prvHeapInit+0xac>)
 8014b1e:	60fb      	str	r3, [r7, #12]

	if( ( uxAddress & portBYTE_ALIGNMENT_MASK ) != 0 )
 8014b20:	68fb      	ldr	r3, [r7, #12]
 8014b22:	f003 0307 	and.w	r3, r3, #7
 8014b26:	2b00      	cmp	r3, #0
 8014b28:	d00c      	beq.n	8014b44 <prvHeapInit+0x34>
	{
		uxAddress += ( portBYTE_ALIGNMENT - 1 );
 8014b2a:	68fb      	ldr	r3, [r7, #12]
 8014b2c:	3307      	adds	r3, #7
 8014b2e:	60fb      	str	r3, [r7, #12]
		uxAddress &= ~( ( size_t ) portBYTE_ALIGNMENT_MASK );
 8014b30:	68fb      	ldr	r3, [r7, #12]
 8014b32:	f023 0307 	bic.w	r3, r3, #7
 8014b36:	60fb      	str	r3, [r7, #12]
		xTotalHeapSize -= uxAddress - ( size_t ) ucHeap;
 8014b38:	68ba      	ldr	r2, [r7, #8]
 8014b3a:	68fb      	ldr	r3, [r7, #12]
 8014b3c:	1ad3      	subs	r3, r2, r3
 8014b3e:	4a1f      	ldr	r2, [pc, #124]	@ (8014bbc <prvHeapInit+0xac>)
 8014b40:	4413      	add	r3, r2
 8014b42:	60bb      	str	r3, [r7, #8]
	}

	pucAlignedHeap = ( uint8_t * ) uxAddress;
 8014b44:	68fb      	ldr	r3, [r7, #12]
 8014b46:	607b      	str	r3, [r7, #4]

	/* xStart is used to hold a pointer to the first item in the list of free
	blocks.  The void cast is used to prevent compiler warnings. */
	xStart.pxNextFreeBlock = ( void * ) pucAlignedHeap;
 8014b48:	4a1d      	ldr	r2, [pc, #116]	@ (8014bc0 <prvHeapInit+0xb0>)
 8014b4a:	687b      	ldr	r3, [r7, #4]
 8014b4c:	6013      	str	r3, [r2, #0]
	xStart.xBlockSize = ( size_t ) 0;
 8014b4e:	4b1c      	ldr	r3, [pc, #112]	@ (8014bc0 <prvHeapInit+0xb0>)
 8014b50:	2200      	movs	r2, #0
 8014b52:	605a      	str	r2, [r3, #4]

	/* pxEnd is used to mark the end of the list of free blocks and is inserted
	at the end of the heap space. */
	uxAddress = ( ( size_t ) pucAlignedHeap ) + xTotalHeapSize;
 8014b54:	687b      	ldr	r3, [r7, #4]
 8014b56:	68ba      	ldr	r2, [r7, #8]
 8014b58:	4413      	add	r3, r2
 8014b5a:	60fb      	str	r3, [r7, #12]
	uxAddress -= xHeapStructSize;
 8014b5c:	2208      	movs	r2, #8
 8014b5e:	68fb      	ldr	r3, [r7, #12]
 8014b60:	1a9b      	subs	r3, r3, r2
 8014b62:	60fb      	str	r3, [r7, #12]
	uxAddress &= ~( ( size_t ) portBYTE_ALIGNMENT_MASK );
 8014b64:	68fb      	ldr	r3, [r7, #12]
 8014b66:	f023 0307 	bic.w	r3, r3, #7
 8014b6a:	60fb      	str	r3, [r7, #12]
	pxEnd = ( void * ) uxAddress;
 8014b6c:	68fb      	ldr	r3, [r7, #12]
 8014b6e:	4a15      	ldr	r2, [pc, #84]	@ (8014bc4 <prvHeapInit+0xb4>)
 8014b70:	6013      	str	r3, [r2, #0]
	pxEnd->xBlockSize = 0;
 8014b72:	4b14      	ldr	r3, [pc, #80]	@ (8014bc4 <prvHeapInit+0xb4>)
 8014b74:	681b      	ldr	r3, [r3, #0]
 8014b76:	2200      	movs	r2, #0
 8014b78:	605a      	str	r2, [r3, #4]
	pxEnd->pxNextFreeBlock = NULL;
 8014b7a:	4b12      	ldr	r3, [pc, #72]	@ (8014bc4 <prvHeapInit+0xb4>)
 8014b7c:	681b      	ldr	r3, [r3, #0]
 8014b7e:	2200      	movs	r2, #0
 8014b80:	601a      	str	r2, [r3, #0]

	/* To start with there is a single free block that is sized to take up the
	entire heap space, minus the space taken by pxEnd. */
	pxFirstFreeBlock = ( void * ) pucAlignedHeap;
 8014b82:	687b      	ldr	r3, [r7, #4]
 8014b84:	603b      	str	r3, [r7, #0]
	pxFirstFreeBlock->xBlockSize = uxAddress - ( size_t ) pxFirstFreeBlock;
 8014b86:	683b      	ldr	r3, [r7, #0]
 8014b88:	68fa      	ldr	r2, [r7, #12]
 8014b8a:	1ad2      	subs	r2, r2, r3
 8014b8c:	683b      	ldr	r3, [r7, #0]
 8014b8e:	605a      	str	r2, [r3, #4]
	pxFirstFreeBlock->pxNextFreeBlock = pxEnd;
 8014b90:	4b0c      	ldr	r3, [pc, #48]	@ (8014bc4 <prvHeapInit+0xb4>)
 8014b92:	681a      	ldr	r2, [r3, #0]
 8014b94:	683b      	ldr	r3, [r7, #0]
 8014b96:	601a      	str	r2, [r3, #0]

	/* Only one block exists - and it covers the entire usable heap space. */
	xMinimumEverFreeBytesRemaining = pxFirstFreeBlock->xBlockSize;
 8014b98:	683b      	ldr	r3, [r7, #0]
 8014b9a:	685b      	ldr	r3, [r3, #4]
 8014b9c:	4a0a      	ldr	r2, [pc, #40]	@ (8014bc8 <prvHeapInit+0xb8>)
 8014b9e:	6013      	str	r3, [r2, #0]
	xFreeBytesRemaining = pxFirstFreeBlock->xBlockSize;
 8014ba0:	683b      	ldr	r3, [r7, #0]
 8014ba2:	685b      	ldr	r3, [r3, #4]
 8014ba4:	4a09      	ldr	r2, [pc, #36]	@ (8014bcc <prvHeapInit+0xbc>)
 8014ba6:	6013      	str	r3, [r2, #0]

	/* Work out the position of the top bit in a size_t variable. */
	xBlockAllocatedBit = ( ( size_t ) 1 ) << ( ( sizeof( size_t ) * heapBITS_PER_BYTE ) - 1 );
 8014ba8:	4b09      	ldr	r3, [pc, #36]	@ (8014bd0 <prvHeapInit+0xc0>)
 8014baa:	f04f 4200 	mov.w	r2, #2147483648	@ 0x80000000
 8014bae:	601a      	str	r2, [r3, #0]
}
 8014bb0:	bf00      	nop
 8014bb2:	3714      	adds	r7, #20
 8014bb4:	46bd      	mov	sp, r7
 8014bb6:	f85d 7b04 	ldr.w	r7, [sp], #4
 8014bba:	4770      	bx	lr
 8014bbc:	24003428 	.word	0x24003428
 8014bc0:	24023428 	.word	0x24023428
 8014bc4:	24023430 	.word	0x24023430
 8014bc8:	24023438 	.word	0x24023438
 8014bcc:	24023434 	.word	0x24023434
 8014bd0:	24023444 	.word	0x24023444

08014bd4 <prvInsertBlockIntoFreeList>:
/*-----------------------------------------------------------*/

static void prvInsertBlockIntoFreeList( BlockLink_t *pxBlockToInsert )
{
 8014bd4:	b480      	push	{r7}
 8014bd6:	b085      	sub	sp, #20
 8014bd8:	af00      	add	r7, sp, #0
 8014bda:	6078      	str	r0, [r7, #4]
BlockLink_t *pxIterator;
uint8_t *puc;

	/* Iterate through the list until a block is found that has a higher address
	than the block being inserted. */
	for( pxIterator = &xStart; pxIterator->pxNextFreeBlock < pxBlockToInsert; pxIterator = pxIterator->pxNextFreeBlock )
 8014bdc:	4b28      	ldr	r3, [pc, #160]	@ (8014c80 <prvInsertBlockIntoFreeList+0xac>)
 8014bde:	60fb      	str	r3, [r7, #12]
 8014be0:	e002      	b.n	8014be8 <prvInsertBlockIntoFreeList+0x14>
 8014be2:	68fb      	ldr	r3, [r7, #12]
 8014be4:	681b      	ldr	r3, [r3, #0]
 8014be6:	60fb      	str	r3, [r7, #12]
 8014be8:	68fb      	ldr	r3, [r7, #12]
 8014bea:	681b      	ldr	r3, [r3, #0]
 8014bec:	687a      	ldr	r2, [r7, #4]
 8014bee:	429a      	cmp	r2, r3
 8014bf0:	d8f7      	bhi.n	8014be2 <prvInsertBlockIntoFreeList+0xe>
		/* Nothing to do here, just iterate to the right position. */
	}

	/* Do the block being inserted, and the block it is being inserted after
	make a contiguous block of memory? */
	puc = ( uint8_t * ) pxIterator;
 8014bf2:	68fb      	ldr	r3, [r7, #12]
 8014bf4:	60bb      	str	r3, [r7, #8]
	if( ( puc + pxIterator->xBlockSize ) == ( uint8_t * ) pxBlockToInsert )
 8014bf6:	68fb      	ldr	r3, [r7, #12]
 8014bf8:	685b      	ldr	r3, [r3, #4]
 8014bfa:	68ba      	ldr	r2, [r7, #8]
 8014bfc:	4413      	add	r3, r2
 8014bfe:	687a      	ldr	r2, [r7, #4]
 8014c00:	429a      	cmp	r2, r3
 8014c02:	d108      	bne.n	8014c16 <prvInsertBlockIntoFreeList+0x42>
	{
		pxIterator->xBlockSize += pxBlockToInsert->xBlockSize;
 8014c04:	68fb      	ldr	r3, [r7, #12]
 8014c06:	685a      	ldr	r2, [r3, #4]
 8014c08:	687b      	ldr	r3, [r7, #4]
 8014c0a:	685b      	ldr	r3, [r3, #4]
 8014c0c:	441a      	add	r2, r3
 8014c0e:	68fb      	ldr	r3, [r7, #12]
 8014c10:	605a      	str	r2, [r3, #4]
		pxBlockToInsert = pxIterator;
 8014c12:	68fb      	ldr	r3, [r7, #12]
 8014c14:	607b      	str	r3, [r7, #4]
		mtCOVERAGE_TEST_MARKER();
	}

	/* Do the block being inserted, and the block it is being inserted before
	make a contiguous block of memory? */
	puc = ( uint8_t * ) pxBlockToInsert;
 8014c16:	687b      	ldr	r3, [r7, #4]
 8014c18:	60bb      	str	r3, [r7, #8]
	if( ( puc + pxBlockToInsert->xBlockSize ) == ( uint8_t * ) pxIterator->pxNextFreeBlock )
 8014c1a:	687b      	ldr	r3, [r7, #4]
 8014c1c:	685b      	ldr	r3, [r3, #4]
 8014c1e:	68ba      	ldr	r2, [r7, #8]
 8014c20:	441a      	add	r2, r3
 8014c22:	68fb      	ldr	r3, [r7, #12]
 8014c24:	681b      	ldr	r3, [r3, #0]
 8014c26:	429a      	cmp	r2, r3
 8014c28:	d118      	bne.n	8014c5c <prvInsertBlockIntoFreeList+0x88>
	{
		if( pxIterator->pxNextFreeBlock != pxEnd )
 8014c2a:	68fb      	ldr	r3, [r7, #12]
 8014c2c:	681a      	ldr	r2, [r3, #0]
 8014c2e:	4b15      	ldr	r3, [pc, #84]	@ (8014c84 <prvInsertBlockIntoFreeList+0xb0>)
 8014c30:	681b      	ldr	r3, [r3, #0]
 8014c32:	429a      	cmp	r2, r3
 8014c34:	d00d      	beq.n	8014c52 <prvInsertBlockIntoFreeList+0x7e>
		{
			/* Form one big block from the two blocks. */
			pxBlockToInsert->xBlockSize += pxIterator->pxNextFreeBlock->xBlockSize;
 8014c36:	687b      	ldr	r3, [r7, #4]
 8014c38:	685a      	ldr	r2, [r3, #4]
 8014c3a:	68fb      	ldr	r3, [r7, #12]
 8014c3c:	681b      	ldr	r3, [r3, #0]
 8014c3e:	685b      	ldr	r3, [r3, #4]
 8014c40:	441a      	add	r2, r3
 8014c42:	687b      	ldr	r3, [r7, #4]
 8014c44:	605a      	str	r2, [r3, #4]
			pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock->pxNextFreeBlock;
 8014c46:	68fb      	ldr	r3, [r7, #12]
 8014c48:	681b      	ldr	r3, [r3, #0]
 8014c4a:	681a      	ldr	r2, [r3, #0]
 8014c4c:	687b      	ldr	r3, [r7, #4]
 8014c4e:	601a      	str	r2, [r3, #0]
 8014c50:	e008      	b.n	8014c64 <prvInsertBlockIntoFreeList+0x90>
		}
		else
		{
			pxBlockToInsert->pxNextFreeBlock = pxEnd;
 8014c52:	4b0c      	ldr	r3, [pc, #48]	@ (8014c84 <prvInsertBlockIntoFreeList+0xb0>)
 8014c54:	681a      	ldr	r2, [r3, #0]
 8014c56:	687b      	ldr	r3, [r7, #4]
 8014c58:	601a      	str	r2, [r3, #0]
 8014c5a:	e003      	b.n	8014c64 <prvInsertBlockIntoFreeList+0x90>
		}
	}
	else
	{
		pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock;
 8014c5c:	68fb      	ldr	r3, [r7, #12]
 8014c5e:	681a      	ldr	r2, [r3, #0]
 8014c60:	687b      	ldr	r3, [r7, #4]
 8014c62:	601a      	str	r2, [r3, #0]

	/* If the block being inserted plugged a gab, so was merged with the block
	before and the block after, then it's pxNextFreeBlock pointer will have
	already been set, and should not be set here as that would make it point
	to itself. */
	if( pxIterator != pxBlockToInsert )
 8014c64:	68fa      	ldr	r2, [r7, #12]
 8014c66:	687b      	ldr	r3, [r7, #4]
 8014c68:	429a      	cmp	r2, r3
 8014c6a:	d002      	beq.n	8014c72 <prvInsertBlockIntoFreeList+0x9e>
	{
		pxIterator->pxNextFreeBlock = pxBlockToInsert;
 8014c6c:	68fb      	ldr	r3, [r7, #12]
 8014c6e:	687a      	ldr	r2, [r7, #4]
 8014c70:	601a      	str	r2, [r3, #0]
	}
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}
}
 8014c72:	bf00      	nop
 8014c74:	3714      	adds	r7, #20
 8014c76:	46bd      	mov	sp, r7
 8014c78:	f85d 7b04 	ldr.w	r7, [sp], #4
 8014c7c:	4770      	bx	lr
 8014c7e:	bf00      	nop
 8014c80:	24023428 	.word	0x24023428
 8014c84:	24023430 	.word	0x24023430

08014c88 <netconn_apimsg>:
 * @param apimsg a struct containing the function to call and its parameters
 * @return ERR_OK if the function was called, another err_t if not
 */
static err_t
netconn_apimsg(tcpip_callback_fn fn, struct api_msg *apimsg)
{
 8014c88:	b580      	push	{r7, lr}
 8014c8a:	b084      	sub	sp, #16
 8014c8c:	af00      	add	r7, sp, #0
 8014c8e:	6078      	str	r0, [r7, #4]
 8014c90:	6039      	str	r1, [r7, #0]
  err_t err;

#ifdef LWIP_DEBUG
  /* catch functions that don't set err */
  apimsg->err = ERR_VAL;
 8014c92:	683b      	ldr	r3, [r7, #0]
 8014c94:	22fa      	movs	r2, #250	@ 0xfa
 8014c96:	711a      	strb	r2, [r3, #4]

#if LWIP_NETCONN_SEM_PER_THREAD
  apimsg->op_completed_sem = LWIP_NETCONN_THREAD_SEM_GET();
#endif /* LWIP_NETCONN_SEM_PER_THREAD */

  err = tcpip_send_msg_wait_sem(fn, apimsg, LWIP_API_MSG_SEM(apimsg));
 8014c98:	683b      	ldr	r3, [r7, #0]
 8014c9a:	681b      	ldr	r3, [r3, #0]
 8014c9c:	330c      	adds	r3, #12
 8014c9e:	461a      	mov	r2, r3
 8014ca0:	6839      	ldr	r1, [r7, #0]
 8014ca2:	6878      	ldr	r0, [r7, #4]
 8014ca4:	f003 fc7c 	bl	80185a0 <tcpip_send_msg_wait_sem>
 8014ca8:	4603      	mov	r3, r0
 8014caa:	73fb      	strb	r3, [r7, #15]
  if (err == ERR_OK) {
 8014cac:	f997 300f 	ldrsb.w	r3, [r7, #15]
 8014cb0:	2b00      	cmp	r3, #0
 8014cb2:	d103      	bne.n	8014cbc <netconn_apimsg+0x34>
    return apimsg->err;
 8014cb4:	683b      	ldr	r3, [r7, #0]
 8014cb6:	f993 3004 	ldrsb.w	r3, [r3, #4]
 8014cba:	e001      	b.n	8014cc0 <netconn_apimsg+0x38>
  }
  return err;
 8014cbc:	f997 300f 	ldrsb.w	r3, [r7, #15]
}
 8014cc0:	4618      	mov	r0, r3
 8014cc2:	3710      	adds	r7, #16
 8014cc4:	46bd      	mov	sp, r7
 8014cc6:	bd80      	pop	{r7, pc}

08014cc8 <netconn_new_with_proto_and_callback>:
 * @return a newly allocated struct netconn or
 *         NULL on memory error
 */
struct netconn *
netconn_new_with_proto_and_callback(enum netconn_type t, u8_t proto, netconn_callback callback)
{
 8014cc8:	b580      	push	{r7, lr}
 8014cca:	b08c      	sub	sp, #48	@ 0x30
 8014ccc:	af00      	add	r7, sp, #0
 8014cce:	4603      	mov	r3, r0
 8014cd0:	603a      	str	r2, [r7, #0]
 8014cd2:	71fb      	strb	r3, [r7, #7]
 8014cd4:	460b      	mov	r3, r1
 8014cd6:	71bb      	strb	r3, [r7, #6]
  struct netconn *conn;
  API_MSG_VAR_DECLARE(msg);
  API_MSG_VAR_ALLOC_RETURN_NULL(msg);

  conn = netconn_alloc(t, callback);
 8014cd8:	79fb      	ldrb	r3, [r7, #7]
 8014cda:	6839      	ldr	r1, [r7, #0]
 8014cdc:	4618      	mov	r0, r3
 8014cde:	f001 f8ad 	bl	8015e3c <netconn_alloc>
 8014ce2:	62f8      	str	r0, [r7, #44]	@ 0x2c
  if (conn != NULL) {
 8014ce4:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8014ce6:	2b00      	cmp	r3, #0
 8014ce8:	d054      	beq.n	8014d94 <netconn_new_with_proto_and_callback+0xcc>
    err_t err;

    API_MSG_VAR_REF(msg).msg.n.proto = proto;
 8014cea:	79bb      	ldrb	r3, [r7, #6]
 8014cec:	743b      	strb	r3, [r7, #16]
    API_MSG_VAR_REF(msg).conn = conn;
 8014cee:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8014cf0:	60bb      	str	r3, [r7, #8]
    err = netconn_apimsg(lwip_netconn_do_newconn, &API_MSG_VAR_REF(msg));
 8014cf2:	f107 0308 	add.w	r3, r7, #8
 8014cf6:	4619      	mov	r1, r3
 8014cf8:	4829      	ldr	r0, [pc, #164]	@ (8014da0 <netconn_new_with_proto_and_callback+0xd8>)
 8014cfa:	f7ff ffc5 	bl	8014c88 <netconn_apimsg>
 8014cfe:	4603      	mov	r3, r0
 8014d00:	f887 302b 	strb.w	r3, [r7, #43]	@ 0x2b
    if (err != ERR_OK) {
 8014d04:	f997 302b 	ldrsb.w	r3, [r7, #43]	@ 0x2b
 8014d08:	2b00      	cmp	r3, #0
 8014d0a:	d043      	beq.n	8014d94 <netconn_new_with_proto_and_callback+0xcc>
      LWIP_ASSERT("freeing conn without freeing pcb", conn->pcb.tcp == NULL);
 8014d0c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8014d0e:	685b      	ldr	r3, [r3, #4]
 8014d10:	2b00      	cmp	r3, #0
 8014d12:	d005      	beq.n	8014d20 <netconn_new_with_proto_and_callback+0x58>
 8014d14:	4b23      	ldr	r3, [pc, #140]	@ (8014da4 <netconn_new_with_proto_and_callback+0xdc>)
 8014d16:	22a3      	movs	r2, #163	@ 0xa3
 8014d18:	4923      	ldr	r1, [pc, #140]	@ (8014da8 <netconn_new_with_proto_and_callback+0xe0>)
 8014d1a:	4824      	ldr	r0, [pc, #144]	@ (8014dac <netconn_new_with_proto_and_callback+0xe4>)
 8014d1c:	f014 fbf6 	bl	802950c <iprintf>
      LWIP_ASSERT("conn has no recvmbox", sys_mbox_valid(&conn->recvmbox));
 8014d20:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8014d22:	3310      	adds	r3, #16
 8014d24:	4618      	mov	r0, r3
 8014d26:	f011 f851 	bl	8025dcc <sys_mbox_valid>
 8014d2a:	4603      	mov	r3, r0
 8014d2c:	2b00      	cmp	r3, #0
 8014d2e:	d105      	bne.n	8014d3c <netconn_new_with_proto_and_callback+0x74>
 8014d30:	4b1c      	ldr	r3, [pc, #112]	@ (8014da4 <netconn_new_with_proto_and_callback+0xdc>)
 8014d32:	22a4      	movs	r2, #164	@ 0xa4
 8014d34:	491e      	ldr	r1, [pc, #120]	@ (8014db0 <netconn_new_with_proto_and_callback+0xe8>)
 8014d36:	481d      	ldr	r0, [pc, #116]	@ (8014dac <netconn_new_with_proto_and_callback+0xe4>)
 8014d38:	f014 fbe8 	bl	802950c <iprintf>
#if LWIP_TCP
      LWIP_ASSERT("conn->acceptmbox shouldn't exist", !sys_mbox_valid(&conn->acceptmbox));
 8014d3c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8014d3e:	3314      	adds	r3, #20
 8014d40:	4618      	mov	r0, r3
 8014d42:	f011 f843 	bl	8025dcc <sys_mbox_valid>
 8014d46:	4603      	mov	r3, r0
 8014d48:	2b00      	cmp	r3, #0
 8014d4a:	d005      	beq.n	8014d58 <netconn_new_with_proto_and_callback+0x90>
 8014d4c:	4b15      	ldr	r3, [pc, #84]	@ (8014da4 <netconn_new_with_proto_and_callback+0xdc>)
 8014d4e:	22a6      	movs	r2, #166	@ 0xa6
 8014d50:	4918      	ldr	r1, [pc, #96]	@ (8014db4 <netconn_new_with_proto_and_callback+0xec>)
 8014d52:	4816      	ldr	r0, [pc, #88]	@ (8014dac <netconn_new_with_proto_and_callback+0xe4>)
 8014d54:	f014 fbda 	bl	802950c <iprintf>
#endif /* LWIP_TCP */
#if !LWIP_NETCONN_SEM_PER_THREAD
      LWIP_ASSERT("conn has no op_completed", sys_sem_valid(&conn->op_completed));
 8014d58:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8014d5a:	330c      	adds	r3, #12
 8014d5c:	4618      	mov	r0, r3
 8014d5e:	f011 f8c3 	bl	8025ee8 <sys_sem_valid>
 8014d62:	4603      	mov	r3, r0
 8014d64:	2b00      	cmp	r3, #0
 8014d66:	d105      	bne.n	8014d74 <netconn_new_with_proto_and_callback+0xac>
 8014d68:	4b0e      	ldr	r3, [pc, #56]	@ (8014da4 <netconn_new_with_proto_and_callback+0xdc>)
 8014d6a:	22a9      	movs	r2, #169	@ 0xa9
 8014d6c:	4912      	ldr	r1, [pc, #72]	@ (8014db8 <netconn_new_with_proto_and_callback+0xf0>)
 8014d6e:	480f      	ldr	r0, [pc, #60]	@ (8014dac <netconn_new_with_proto_and_callback+0xe4>)
 8014d70:	f014 fbcc 	bl	802950c <iprintf>
      sys_sem_free(&conn->op_completed);
 8014d74:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8014d76:	330c      	adds	r3, #12
 8014d78:	4618      	mov	r0, r3
 8014d7a:	f011 f8a8 	bl	8025ece <sys_sem_free>
#endif /* !LWIP_NETCONN_SEM_PER_THREAD */
      sys_mbox_free(&conn->recvmbox);
 8014d7e:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8014d80:	3310      	adds	r3, #16
 8014d82:	4618      	mov	r0, r3
 8014d84:	f010 ffae 	bl	8025ce4 <sys_mbox_free>
      memp_free(MEMP_NETCONN, conn);
 8014d88:	6af9      	ldr	r1, [r7, #44]	@ 0x2c
 8014d8a:	2007      	movs	r0, #7
 8014d8c:	f004 fa58 	bl	8019240 <memp_free>
      API_MSG_VAR_FREE(msg);
      return NULL;
 8014d90:	2300      	movs	r3, #0
 8014d92:	e000      	b.n	8014d96 <netconn_new_with_proto_and_callback+0xce>
    }
  }
  API_MSG_VAR_FREE(msg);
  return conn;
 8014d94:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
}
 8014d96:	4618      	mov	r0, r3
 8014d98:	3730      	adds	r7, #48	@ 0x30
 8014d9a:	46bd      	mov	sp, r7
 8014d9c:	bd80      	pop	{r7, pc}
 8014d9e:	bf00      	nop
 8014da0:	08015e11 	.word	0x08015e11
 8014da4:	0802c718 	.word	0x0802c718
 8014da8:	0802c74c 	.word	0x0802c74c
 8014dac:	0802c770 	.word	0x0802c770
 8014db0:	0802c798 	.word	0x0802c798
 8014db4:	0802c7b0 	.word	0x0802c7b0
 8014db8:	0802c7d4 	.word	0x0802c7d4

08014dbc <netconn_prepare_delete>:
 * @param conn the netconn to delete
 * @return ERR_OK if the connection was deleted
 */
err_t
netconn_prepare_delete(struct netconn *conn)
{
 8014dbc:	b580      	push	{r7, lr}
 8014dbe:	b08c      	sub	sp, #48	@ 0x30
 8014dc0:	af00      	add	r7, sp, #0
 8014dc2:	6078      	str	r0, [r7, #4]
  err_t err;
  API_MSG_VAR_DECLARE(msg);

  /* No ASSERT here because possible to get a (conn == NULL) if we got an accept error */
  if (conn == NULL) {
 8014dc4:	687b      	ldr	r3, [r7, #4]
 8014dc6:	2b00      	cmp	r3, #0
 8014dc8:	d101      	bne.n	8014dce <netconn_prepare_delete+0x12>
    return ERR_OK;
 8014dca:	2300      	movs	r3, #0
 8014dcc:	e014      	b.n	8014df8 <netconn_prepare_delete+0x3c>
  }

  API_MSG_VAR_ALLOC(msg);
  API_MSG_VAR_REF(msg).conn = conn;
 8014dce:	687b      	ldr	r3, [r7, #4]
 8014dd0:	60fb      	str	r3, [r7, #12]
  /* get the time we started, which is later compared to
     sys_now() + conn->send_timeout */
  API_MSG_VAR_REF(msg).msg.sd.time_started = sys_now();
#else /* LWIP_SO_SNDTIMEO || LWIP_SO_LINGER */
#if LWIP_TCP
  API_MSG_VAR_REF(msg).msg.sd.polls_left =
 8014dd2:	2329      	movs	r3, #41	@ 0x29
 8014dd4:	757b      	strb	r3, [r7, #21]
    ((LWIP_TCP_CLOSE_TIMEOUT_MS_DEFAULT + TCP_SLOW_INTERVAL - 1) / TCP_SLOW_INTERVAL) + 1;
#endif /* LWIP_TCP */
#endif /* LWIP_SO_SNDTIMEO || LWIP_SO_LINGER */
  err = netconn_apimsg(lwip_netconn_do_delconn, &API_MSG_VAR_REF(msg));
 8014dd6:	f107 030c 	add.w	r3, r7, #12
 8014dda:	4619      	mov	r1, r3
 8014ddc:	4808      	ldr	r0, [pc, #32]	@ (8014e00 <netconn_prepare_delete+0x44>)
 8014dde:	f7ff ff53 	bl	8014c88 <netconn_apimsg>
 8014de2:	4603      	mov	r3, r0
 8014de4:	f887 302f 	strb.w	r3, [r7, #47]	@ 0x2f
  API_MSG_VAR_FREE(msg);

  if (err != ERR_OK) {
 8014de8:	f997 302f 	ldrsb.w	r3, [r7, #47]	@ 0x2f
 8014dec:	2b00      	cmp	r3, #0
 8014dee:	d002      	beq.n	8014df6 <netconn_prepare_delete+0x3a>
    return err;
 8014df0:	f997 302f 	ldrsb.w	r3, [r7, #47]	@ 0x2f
 8014df4:	e000      	b.n	8014df8 <netconn_prepare_delete+0x3c>
  }
  return ERR_OK;
 8014df6:	2300      	movs	r3, #0
}
 8014df8:	4618      	mov	r0, r3
 8014dfa:	3730      	adds	r7, #48	@ 0x30
 8014dfc:	46bd      	mov	sp, r7
 8014dfe:	bd80      	pop	{r7, pc}
 8014e00:	08016395 	.word	0x08016395

08014e04 <netconn_delete>:
 * @param conn the netconn to delete
 * @return ERR_OK if the connection was deleted
 */
err_t
netconn_delete(struct netconn *conn)
{
 8014e04:	b580      	push	{r7, lr}
 8014e06:	b084      	sub	sp, #16
 8014e08:	af00      	add	r7, sp, #0
 8014e0a:	6078      	str	r0, [r7, #4]
  err_t err;

  /* No ASSERT here because possible to get a (conn == NULL) if we got an accept error */
  if (conn == NULL) {
 8014e0c:	687b      	ldr	r3, [r7, #4]
 8014e0e:	2b00      	cmp	r3, #0
 8014e10:	d101      	bne.n	8014e16 <netconn_delete+0x12>
    return ERR_OK;
 8014e12:	2300      	movs	r3, #0
 8014e14:	e00d      	b.n	8014e32 <netconn_delete+0x2e>
    /* Already called netconn_prepare_delete() before */
    err = ERR_OK;
  } else
#endif /* LWIP_NETCONN_FULLDUPLEX */
  {
    err = netconn_prepare_delete(conn);
 8014e16:	6878      	ldr	r0, [r7, #4]
 8014e18:	f7ff ffd0 	bl	8014dbc <netconn_prepare_delete>
 8014e1c:	4603      	mov	r3, r0
 8014e1e:	73fb      	strb	r3, [r7, #15]
  }
  if (err == ERR_OK) {
 8014e20:	f997 300f 	ldrsb.w	r3, [r7, #15]
 8014e24:	2b00      	cmp	r3, #0
 8014e26:	d102      	bne.n	8014e2e <netconn_delete+0x2a>
    netconn_free(conn);
 8014e28:	6878      	ldr	r0, [r7, #4]
 8014e2a:	f001 f881 	bl	8015f30 <netconn_free>
  }
  return err;
 8014e2e:	f997 300f 	ldrsb.w	r3, [r7, #15]
}
 8014e32:	4618      	mov	r0, r3
 8014e34:	3710      	adds	r7, #16
 8014e36:	46bd      	mov	sp, r7
 8014e38:	bd80      	pop	{r7, pc}
	...

08014e3c <netconn_getaddr>:
 * @return ERR_CONN for invalid connections
 *         ERR_OK if the information was retrieved
 */
err_t
netconn_getaddr(struct netconn *conn, ip_addr_t *addr, u16_t *port, u8_t local)
{
 8014e3c:	b580      	push	{r7, lr}
 8014e3e:	b08e      	sub	sp, #56	@ 0x38
 8014e40:	af00      	add	r7, sp, #0
 8014e42:	60f8      	str	r0, [r7, #12]
 8014e44:	60b9      	str	r1, [r7, #8]
 8014e46:	607a      	str	r2, [r7, #4]
 8014e48:	70fb      	strb	r3, [r7, #3]
  API_MSG_VAR_DECLARE(msg);
  err_t err;

  LWIP_ERROR("netconn_getaddr: invalid conn", (conn != NULL), return ERR_ARG;);
 8014e4a:	68fb      	ldr	r3, [r7, #12]
 8014e4c:	2b00      	cmp	r3, #0
 8014e4e:	d109      	bne.n	8014e64 <netconn_getaddr+0x28>
 8014e50:	4b1d      	ldr	r3, [pc, #116]	@ (8014ec8 <netconn_getaddr+0x8c>)
 8014e52:	f44f 7289 	mov.w	r2, #274	@ 0x112
 8014e56:	491d      	ldr	r1, [pc, #116]	@ (8014ecc <netconn_getaddr+0x90>)
 8014e58:	481d      	ldr	r0, [pc, #116]	@ (8014ed0 <netconn_getaddr+0x94>)
 8014e5a:	f014 fb57 	bl	802950c <iprintf>
 8014e5e:	f06f 030f 	mvn.w	r3, #15
 8014e62:	e02d      	b.n	8014ec0 <netconn_getaddr+0x84>
  LWIP_ERROR("netconn_getaddr: invalid addr", (addr != NULL), return ERR_ARG;);
 8014e64:	68bb      	ldr	r3, [r7, #8]
 8014e66:	2b00      	cmp	r3, #0
 8014e68:	d109      	bne.n	8014e7e <netconn_getaddr+0x42>
 8014e6a:	4b17      	ldr	r3, [pc, #92]	@ (8014ec8 <netconn_getaddr+0x8c>)
 8014e6c:	f240 1213 	movw	r2, #275	@ 0x113
 8014e70:	4918      	ldr	r1, [pc, #96]	@ (8014ed4 <netconn_getaddr+0x98>)
 8014e72:	4817      	ldr	r0, [pc, #92]	@ (8014ed0 <netconn_getaddr+0x94>)
 8014e74:	f014 fb4a 	bl	802950c <iprintf>
 8014e78:	f06f 030f 	mvn.w	r3, #15
 8014e7c:	e020      	b.n	8014ec0 <netconn_getaddr+0x84>
  LWIP_ERROR("netconn_getaddr: invalid port", (port != NULL), return ERR_ARG;);
 8014e7e:	687b      	ldr	r3, [r7, #4]
 8014e80:	2b00      	cmp	r3, #0
 8014e82:	d109      	bne.n	8014e98 <netconn_getaddr+0x5c>
 8014e84:	4b10      	ldr	r3, [pc, #64]	@ (8014ec8 <netconn_getaddr+0x8c>)
 8014e86:	f44f 728a 	mov.w	r2, #276	@ 0x114
 8014e8a:	4913      	ldr	r1, [pc, #76]	@ (8014ed8 <netconn_getaddr+0x9c>)
 8014e8c:	4810      	ldr	r0, [pc, #64]	@ (8014ed0 <netconn_getaddr+0x94>)
 8014e8e:	f014 fb3d 	bl	802950c <iprintf>
 8014e92:	f06f 030f 	mvn.w	r3, #15
 8014e96:	e013      	b.n	8014ec0 <netconn_getaddr+0x84>

  API_MSG_VAR_ALLOC(msg);
  API_MSG_VAR_REF(msg).conn = conn;
 8014e98:	68fb      	ldr	r3, [r7, #12]
 8014e9a:	617b      	str	r3, [r7, #20]
  API_MSG_VAR_REF(msg).msg.ad.local = local;
 8014e9c:	78fb      	ldrb	r3, [r7, #3]
 8014e9e:	f887 3024 	strb.w	r3, [r7, #36]	@ 0x24
#if LWIP_MPU_COMPATIBLE
  err = netconn_apimsg(lwip_netconn_do_getaddr, &API_MSG_VAR_REF(msg));
  *addr = msg->msg.ad.ipaddr;
  *port = msg->msg.ad.port;
#else /* LWIP_MPU_COMPATIBLE */
  msg.msg.ad.ipaddr = addr;
 8014ea2:	68bb      	ldr	r3, [r7, #8]
 8014ea4:	61fb      	str	r3, [r7, #28]
  msg.msg.ad.port = port;
 8014ea6:	687b      	ldr	r3, [r7, #4]
 8014ea8:	623b      	str	r3, [r7, #32]
  err = netconn_apimsg(lwip_netconn_do_getaddr, &msg);
 8014eaa:	f107 0314 	add.w	r3, r7, #20
 8014eae:	4619      	mov	r1, r3
 8014eb0:	480a      	ldr	r0, [pc, #40]	@ (8014edc <netconn_getaddr+0xa0>)
 8014eb2:	f7ff fee9 	bl	8014c88 <netconn_apimsg>
 8014eb6:	4603      	mov	r3, r0
 8014eb8:	f887 3037 	strb.w	r3, [r7, #55]	@ 0x37
#endif /* LWIP_MPU_COMPATIBLE */
  API_MSG_VAR_FREE(msg);

  return err;
 8014ebc:	f997 3037 	ldrsb.w	r3, [r7, #55]	@ 0x37
}
 8014ec0:	4618      	mov	r0, r3
 8014ec2:	3738      	adds	r7, #56	@ 0x38
 8014ec4:	46bd      	mov	sp, r7
 8014ec6:	bd80      	pop	{r7, pc}
 8014ec8:	0802c718 	.word	0x0802c718
 8014ecc:	0802c7f0 	.word	0x0802c7f0
 8014ed0:	0802c770 	.word	0x0802c770
 8014ed4:	0802c810 	.word	0x0802c810
 8014ed8:	0802c830 	.word	0x0802c830
 8014edc:	08016df1 	.word	0x08016df1

08014ee0 <netconn_connect>:
 * @param port the remote port to connect to (no used for RAW)
 * @return ERR_OK if connected, return value of tcp_/udp_/raw_connect otherwise
 */
err_t
netconn_connect(struct netconn *conn, const ip_addr_t *addr, u16_t port)
{
 8014ee0:	b580      	push	{r7, lr}
 8014ee2:	b08e      	sub	sp, #56	@ 0x38
 8014ee4:	af00      	add	r7, sp, #0
 8014ee6:	60f8      	str	r0, [r7, #12]
 8014ee8:	60b9      	str	r1, [r7, #8]
 8014eea:	4613      	mov	r3, r2
 8014eec:	80fb      	strh	r3, [r7, #6]
  API_MSG_VAR_DECLARE(msg);
  err_t err;

  LWIP_ERROR("netconn_connect: invalid conn", (conn != NULL), return ERR_ARG;);
 8014eee:	68fb      	ldr	r3, [r7, #12]
 8014ef0:	2b00      	cmp	r3, #0
 8014ef2:	d109      	bne.n	8014f08 <netconn_connect+0x28>
 8014ef4:	4b11      	ldr	r3, [pc, #68]	@ (8014f3c <netconn_connect+0x5c>)
 8014ef6:	f44f 72bf 	mov.w	r2, #382	@ 0x17e
 8014efa:	4911      	ldr	r1, [pc, #68]	@ (8014f40 <netconn_connect+0x60>)
 8014efc:	4811      	ldr	r0, [pc, #68]	@ (8014f44 <netconn_connect+0x64>)
 8014efe:	f014 fb05 	bl	802950c <iprintf>
 8014f02:	f06f 030f 	mvn.w	r3, #15
 8014f06:	e015      	b.n	8014f34 <netconn_connect+0x54>

#if LWIP_IPV4
  /* Don't propagate NULL pointer (IP_ADDR_ANY alias) to subsequent functions */
  if (addr == NULL) {
 8014f08:	68bb      	ldr	r3, [r7, #8]
 8014f0a:	2b00      	cmp	r3, #0
 8014f0c:	d101      	bne.n	8014f12 <netconn_connect+0x32>
    addr = IP4_ADDR_ANY;
 8014f0e:	4b0e      	ldr	r3, [pc, #56]	@ (8014f48 <netconn_connect+0x68>)
 8014f10:	60bb      	str	r3, [r7, #8]
  }
#endif /* LWIP_IPV4 */

  API_MSG_VAR_ALLOC(msg);
  API_MSG_VAR_REF(msg).conn = conn;
 8014f12:	68fb      	ldr	r3, [r7, #12]
 8014f14:	617b      	str	r3, [r7, #20]
  API_MSG_VAR_REF(msg).msg.bc.ipaddr = API_MSG_VAR_REF(addr);
 8014f16:	68bb      	ldr	r3, [r7, #8]
 8014f18:	61fb      	str	r3, [r7, #28]
  API_MSG_VAR_REF(msg).msg.bc.port = port;
 8014f1a:	88fb      	ldrh	r3, [r7, #6]
 8014f1c:	843b      	strh	r3, [r7, #32]
  err = netconn_apimsg(lwip_netconn_do_connect, &API_MSG_VAR_REF(msg));
 8014f1e:	f107 0314 	add.w	r3, r7, #20
 8014f22:	4619      	mov	r1, r3
 8014f24:	4809      	ldr	r0, [pc, #36]	@ (8014f4c <netconn_connect+0x6c>)
 8014f26:	f7ff feaf 	bl	8014c88 <netconn_apimsg>
 8014f2a:	4603      	mov	r3, r0
 8014f2c:	f887 3037 	strb.w	r3, [r7, #55]	@ 0x37
  API_MSG_VAR_FREE(msg);

  return err;
 8014f30:	f997 3037 	ldrsb.w	r3, [r7, #55]	@ 0x37
}
 8014f34:	4618      	mov	r0, r3
 8014f36:	3738      	adds	r7, #56	@ 0x38
 8014f38:	46bd      	mov	sp, r7
 8014f3a:	bd80      	pop	{r7, pc}
 8014f3c:	0802c718 	.word	0x0802c718
 8014f40:	0802c88c 	.word	0x0802c88c
 8014f44:	0802c770 	.word	0x0802c770
 8014f48:	080307a4 	.word	0x080307a4
 8014f4c:	08016681 	.word	0x08016681

08014f50 <netconn_disconnect>:
 * @param conn the netconn to disconnect
 * @return See @ref err_t
 */
err_t
netconn_disconnect(struct netconn *conn)
{
 8014f50:	b580      	push	{r7, lr}
 8014f52:	b08c      	sub	sp, #48	@ 0x30
 8014f54:	af00      	add	r7, sp, #0
 8014f56:	6078      	str	r0, [r7, #4]
  API_MSG_VAR_DECLARE(msg);
  err_t err;

  LWIP_ERROR("netconn_disconnect: invalid conn", (conn != NULL), return ERR_ARG;);
 8014f58:	687b      	ldr	r3, [r7, #4]
 8014f5a:	2b00      	cmp	r3, #0
 8014f5c:	d109      	bne.n	8014f72 <netconn_disconnect+0x22>
 8014f5e:	4b0d      	ldr	r3, [pc, #52]	@ (8014f94 <netconn_disconnect+0x44>)
 8014f60:	f44f 72cf 	mov.w	r2, #414	@ 0x19e
 8014f64:	490c      	ldr	r1, [pc, #48]	@ (8014f98 <netconn_disconnect+0x48>)
 8014f66:	480d      	ldr	r0, [pc, #52]	@ (8014f9c <netconn_disconnect+0x4c>)
 8014f68:	f014 fad0 	bl	802950c <iprintf>
 8014f6c:	f06f 030f 	mvn.w	r3, #15
 8014f70:	e00c      	b.n	8014f8c <netconn_disconnect+0x3c>

  API_MSG_VAR_ALLOC(msg);
  API_MSG_VAR_REF(msg).conn = conn;
 8014f72:	687b      	ldr	r3, [r7, #4]
 8014f74:	60fb      	str	r3, [r7, #12]
  err = netconn_apimsg(lwip_netconn_do_disconnect, &API_MSG_VAR_REF(msg));
 8014f76:	f107 030c 	add.w	r3, r7, #12
 8014f7a:	4619      	mov	r1, r3
 8014f7c:	4808      	ldr	r0, [pc, #32]	@ (8014fa0 <netconn_disconnect+0x50>)
 8014f7e:	f7ff fe83 	bl	8014c88 <netconn_apimsg>
 8014f82:	4603      	mov	r3, r0
 8014f84:	f887 302f 	strb.w	r3, [r7, #47]	@ 0x2f
  API_MSG_VAR_FREE(msg);

  return err;
 8014f88:	f997 302f 	ldrsb.w	r3, [r7, #47]	@ 0x2f
}
 8014f8c:	4618      	mov	r0, r3
 8014f8e:	3730      	adds	r7, #48	@ 0x30
 8014f90:	46bd      	mov	sp, r7
 8014f92:	bd80      	pop	{r7, pc}
 8014f94:	0802c718 	.word	0x0802c718
 8014f98:	0802c8ac 	.word	0x0802c8ac
 8014f9c:	0802c770 	.word	0x0802c770
 8014fa0:	08016801 	.word	0x08016801

08014fa4 <netconn_recv_data>:
 *         ERR_WOULDBLOCK if the netconn is nonblocking but would block to wait for data
 *         ERR_TIMEOUT if the netconn has a receive timeout and no data was received
 */
static err_t
netconn_recv_data(struct netconn *conn, void **new_buf, u8_t apiflags)
{
 8014fa4:	b580      	push	{r7, lr}
 8014fa6:	b08a      	sub	sp, #40	@ 0x28
 8014fa8:	af00      	add	r7, sp, #0
 8014faa:	60f8      	str	r0, [r7, #12]
 8014fac:	60b9      	str	r1, [r7, #8]
 8014fae:	4613      	mov	r3, r2
 8014fb0:	71fb      	strb	r3, [r7, #7]
  void *buf = NULL;
 8014fb2:	2300      	movs	r3, #0
 8014fb4:	61bb      	str	r3, [r7, #24]
  u16_t len;

  LWIP_ERROR("netconn_recv: invalid pointer", (new_buf != NULL), return ERR_ARG;);
 8014fb6:	68bb      	ldr	r3, [r7, #8]
 8014fb8:	2b00      	cmp	r3, #0
 8014fba:	d109      	bne.n	8014fd0 <netconn_recv_data+0x2c>
 8014fbc:	4b64      	ldr	r3, [pc, #400]	@ (8015150 <netconn_recv_data+0x1ac>)
 8014fbe:	f44f 7212 	mov.w	r2, #584	@ 0x248
 8014fc2:	4964      	ldr	r1, [pc, #400]	@ (8015154 <netconn_recv_data+0x1b0>)
 8014fc4:	4864      	ldr	r0, [pc, #400]	@ (8015158 <netconn_recv_data+0x1b4>)
 8014fc6:	f014 faa1 	bl	802950c <iprintf>
 8014fca:	f06f 030f 	mvn.w	r3, #15
 8014fce:	e0bb      	b.n	8015148 <netconn_recv_data+0x1a4>
  *new_buf = NULL;
 8014fd0:	68bb      	ldr	r3, [r7, #8]
 8014fd2:	2200      	movs	r2, #0
 8014fd4:	601a      	str	r2, [r3, #0]
  LWIP_ERROR("netconn_recv: invalid conn",    (conn != NULL),    return ERR_ARG;);
 8014fd6:	68fb      	ldr	r3, [r7, #12]
 8014fd8:	2b00      	cmp	r3, #0
 8014fda:	d109      	bne.n	8014ff0 <netconn_recv_data+0x4c>
 8014fdc:	4b5c      	ldr	r3, [pc, #368]	@ (8015150 <netconn_recv_data+0x1ac>)
 8014fde:	f240 224a 	movw	r2, #586	@ 0x24a
 8014fe2:	495e      	ldr	r1, [pc, #376]	@ (801515c <netconn_recv_data+0x1b8>)
 8014fe4:	485c      	ldr	r0, [pc, #368]	@ (8015158 <netconn_recv_data+0x1b4>)
 8014fe6:	f014 fa91 	bl	802950c <iprintf>
 8014fea:	f06f 030f 	mvn.w	r3, #15
 8014fee:	e0ab      	b.n	8015148 <netconn_recv_data+0x1a4>

  if (!NETCONN_RECVMBOX_WAITABLE(conn)) {
 8014ff0:	68fb      	ldr	r3, [r7, #12]
 8014ff2:	3310      	adds	r3, #16
 8014ff4:	4618      	mov	r0, r3
 8014ff6:	f010 fee9 	bl	8025dcc <sys_mbox_valid>
 8014ffa:	4603      	mov	r3, r0
 8014ffc:	2b00      	cmp	r3, #0
 8014ffe:	d10e      	bne.n	801501e <netconn_recv_data+0x7a>
    err_t err = netconn_err(conn);
 8015000:	68f8      	ldr	r0, [r7, #12]
 8015002:	f000 fb1f 	bl	8015644 <netconn_err>
 8015006:	4603      	mov	r3, r0
 8015008:	77fb      	strb	r3, [r7, #31]
    if (err != ERR_OK) {
 801500a:	f997 301f 	ldrsb.w	r3, [r7, #31]
 801500e:	2b00      	cmp	r3, #0
 8015010:	d002      	beq.n	8015018 <netconn_recv_data+0x74>
      /* return pending error */
      return err;
 8015012:	f997 301f 	ldrsb.w	r3, [r7, #31]
 8015016:	e097      	b.n	8015148 <netconn_recv_data+0x1a4>
    }
    return ERR_CONN;
 8015018:	f06f 030a 	mvn.w	r3, #10
 801501c:	e094      	b.n	8015148 <netconn_recv_data+0x1a4>
  }

  NETCONN_MBOX_WAITING_INC(conn);
  if (netconn_is_nonblocking(conn) || (apiflags & NETCONN_DONTBLOCK) ||
 801501e:	68fb      	ldr	r3, [r7, #12]
 8015020:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8015024:	f003 0302 	and.w	r3, r3, #2
 8015028:	2b00      	cmp	r3, #0
 801502a:	d110      	bne.n	801504e <netconn_recv_data+0xaa>
 801502c:	79fb      	ldrb	r3, [r7, #7]
 801502e:	f003 0304 	and.w	r3, r3, #4
 8015032:	2b00      	cmp	r3, #0
 8015034:	d10b      	bne.n	801504e <netconn_recv_data+0xaa>
      (conn->flags & NETCONN_FLAG_MBOXCLOSED) || (conn->pending_err != ERR_OK)) {
 8015036:	68fb      	ldr	r3, [r7, #12]
 8015038:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 801503c:	f003 0301 	and.w	r3, r3, #1
  if (netconn_is_nonblocking(conn) || (apiflags & NETCONN_DONTBLOCK) ||
 8015040:	2b00      	cmp	r3, #0
 8015042:	d104      	bne.n	801504e <netconn_recv_data+0xaa>
      (conn->flags & NETCONN_FLAG_MBOXCLOSED) || (conn->pending_err != ERR_OK)) {
 8015044:	68fb      	ldr	r3, [r7, #12]
 8015046:	f993 3008 	ldrsb.w	r3, [r3, #8]
 801504a:	2b00      	cmp	r3, #0
 801504c:	d025      	beq.n	801509a <netconn_recv_data+0xf6>
    if (sys_arch_mbox_tryfetch(&conn->recvmbox, &buf) == SYS_ARCH_TIMEOUT) {
 801504e:	68fb      	ldr	r3, [r7, #12]
 8015050:	3310      	adds	r3, #16
 8015052:	f107 0218 	add.w	r2, r7, #24
 8015056:	4611      	mov	r1, r2
 8015058:	4618      	mov	r0, r3
 801505a:	f010 fea0 	bl	8025d9e <sys_arch_mbox_tryfetch>
 801505e:	4603      	mov	r3, r0
 8015060:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8015064:	d12a      	bne.n	80150bc <netconn_recv_data+0x118>
      err_t err;
      NETCONN_MBOX_WAITING_DEC(conn);
      err = netconn_err(conn);
 8015066:	68f8      	ldr	r0, [r7, #12]
 8015068:	f000 faec 	bl	8015644 <netconn_err>
 801506c:	4603      	mov	r3, r0
 801506e:	f887 3025 	strb.w	r3, [r7, #37]	@ 0x25
      if (err != ERR_OK) {
 8015072:	f997 3025 	ldrsb.w	r3, [r7, #37]	@ 0x25
 8015076:	2b00      	cmp	r3, #0
 8015078:	d002      	beq.n	8015080 <netconn_recv_data+0xdc>
        /* return pending error */
        return err;
 801507a:	f997 3025 	ldrsb.w	r3, [r7, #37]	@ 0x25
 801507e:	e063      	b.n	8015148 <netconn_recv_data+0x1a4>
      }
      if (conn->flags & NETCONN_FLAG_MBOXCLOSED) {
 8015080:	68fb      	ldr	r3, [r7, #12]
 8015082:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8015086:	f003 0301 	and.w	r3, r3, #1
 801508a:	2b00      	cmp	r3, #0
 801508c:	d002      	beq.n	8015094 <netconn_recv_data+0xf0>
        return ERR_CONN;
 801508e:	f06f 030a 	mvn.w	r3, #10
 8015092:	e059      	b.n	8015148 <netconn_recv_data+0x1a4>
      }
      return ERR_WOULDBLOCK;
 8015094:	f06f 0306 	mvn.w	r3, #6
 8015098:	e056      	b.n	8015148 <netconn_recv_data+0x1a4>
    }
  } else {
#if LWIP_SO_RCVTIMEO
    if (sys_arch_mbox_fetch(&conn->recvmbox, &buf, conn->recv_timeout) == SYS_ARCH_TIMEOUT) {
 801509a:	68fb      	ldr	r3, [r7, #12]
 801509c:	f103 0010 	add.w	r0, r3, #16
 80150a0:	68fb      	ldr	r3, [r7, #12]
 80150a2:	69da      	ldr	r2, [r3, #28]
 80150a4:	f107 0318 	add.w	r3, r7, #24
 80150a8:	4619      	mov	r1, r3
 80150aa:	f010 fe47 	bl	8025d3c <sys_arch_mbox_fetch>
 80150ae:	4603      	mov	r3, r0
 80150b0:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 80150b4:	d102      	bne.n	80150bc <netconn_recv_data+0x118>
      NETCONN_MBOX_WAITING_DEC(conn);
      return ERR_TIMEOUT;
 80150b6:	f06f 0302 	mvn.w	r3, #2
 80150ba:	e045      	b.n	8015148 <netconn_recv_data+0x1a4>
  }
#endif

#if LWIP_TCP
#if (LWIP_UDP || LWIP_RAW)
  if (NETCONNTYPE_GROUP(conn->type) == NETCONN_TCP)
 80150bc:	68fb      	ldr	r3, [r7, #12]
 80150be:	781b      	ldrb	r3, [r3, #0]
 80150c0:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 80150c4:	2b10      	cmp	r3, #16
 80150c6:	d117      	bne.n	80150f8 <netconn_recv_data+0x154>
#endif /* (LWIP_UDP || LWIP_RAW) */
  {
    err_t err;
    /* Check if this is an error message or a pbuf */
    if (lwip_netconn_is_err_msg(buf, &err)) {
 80150c8:	69bb      	ldr	r3, [r7, #24]
 80150ca:	f107 0217 	add.w	r2, r7, #23
 80150ce:	4611      	mov	r1, r2
 80150d0:	4618      	mov	r0, r3
 80150d2:	f000 fb09 	bl	80156e8 <lwip_netconn_is_err_msg>
 80150d6:	4603      	mov	r3, r0
 80150d8:	2b00      	cmp	r3, #0
 80150da:	d009      	beq.n	80150f0 <netconn_recv_data+0x14c>
      /* new_buf has been zeroed above already */
      if (err == ERR_CLSD) {
 80150dc:	f997 3017 	ldrsb.w	r3, [r7, #23]
 80150e0:	f113 0f0f 	cmn.w	r3, #15
 80150e4:	d101      	bne.n	80150ea <netconn_recv_data+0x146>
        /* connection closed translates to ERR_OK with *new_buf == NULL */
        return ERR_OK;
 80150e6:	2300      	movs	r3, #0
 80150e8:	e02e      	b.n	8015148 <netconn_recv_data+0x1a4>
      }
      return err;
 80150ea:	f997 3017 	ldrsb.w	r3, [r7, #23]
 80150ee:	e02b      	b.n	8015148 <netconn_recv_data+0x1a4>
    }
    len = ((struct pbuf *)buf)->tot_len;
 80150f0:	69bb      	ldr	r3, [r7, #24]
 80150f2:	891b      	ldrh	r3, [r3, #8]
 80150f4:	84fb      	strh	r3, [r7, #38]	@ 0x26
 80150f6:	e00d      	b.n	8015114 <netconn_recv_data+0x170>
#if LWIP_TCP && (LWIP_UDP || LWIP_RAW)
  else
#endif /* LWIP_TCP && (LWIP_UDP || LWIP_RAW) */
#if (LWIP_UDP || LWIP_RAW)
  {
    LWIP_ASSERT("buf != NULL", buf != NULL);
 80150f8:	69bb      	ldr	r3, [r7, #24]
 80150fa:	2b00      	cmp	r3, #0
 80150fc:	d106      	bne.n	801510c <netconn_recv_data+0x168>
 80150fe:	4b14      	ldr	r3, [pc, #80]	@ (8015150 <netconn_recv_data+0x1ac>)
 8015100:	f240 2291 	movw	r2, #657	@ 0x291
 8015104:	4916      	ldr	r1, [pc, #88]	@ (8015160 <netconn_recv_data+0x1bc>)
 8015106:	4814      	ldr	r0, [pc, #80]	@ (8015158 <netconn_recv_data+0x1b4>)
 8015108:	f014 fa00 	bl	802950c <iprintf>
    len = netbuf_len((struct netbuf *)buf);
 801510c:	69bb      	ldr	r3, [r7, #24]
 801510e:	681b      	ldr	r3, [r3, #0]
 8015110:	891b      	ldrh	r3, [r3, #8]
 8015112:	84fb      	strh	r3, [r7, #38]	@ 0x26
  }
#endif /* (LWIP_UDP || LWIP_RAW) */

#if LWIP_SO_RCVBUF
  SYS_ARCH_DEC(conn->recv_avail, len);
 8015114:	f010 ff64 	bl	8025fe0 <sys_arch_protect>
 8015118:	6238      	str	r0, [r7, #32]
 801511a:	68fb      	ldr	r3, [r7, #12]
 801511c:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 801511e:	8cfb      	ldrh	r3, [r7, #38]	@ 0x26
 8015120:	1ad2      	subs	r2, r2, r3
 8015122:	68fb      	ldr	r3, [r7, #12]
 8015124:	625a      	str	r2, [r3, #36]	@ 0x24
 8015126:	6a38      	ldr	r0, [r7, #32]
 8015128:	f010 ff68 	bl	8025ffc <sys_arch_unprotect>
#endif /* LWIP_SO_RCVBUF */
  /* Register event with callback */
  API_EVENT(conn, NETCONN_EVT_RCVMINUS, len);
 801512c:	68fb      	ldr	r3, [r7, #12]
 801512e:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8015130:	2b00      	cmp	r3, #0
 8015132:	d005      	beq.n	8015140 <netconn_recv_data+0x19c>
 8015134:	68fb      	ldr	r3, [r7, #12]
 8015136:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8015138:	8cfa      	ldrh	r2, [r7, #38]	@ 0x26
 801513a:	2101      	movs	r1, #1
 801513c:	68f8      	ldr	r0, [r7, #12]
 801513e:	4798      	blx	r3

  LWIP_DEBUGF(API_LIB_DEBUG, ("netconn_recv_data: received %p, len=%"U16_F"\n", buf, len));

  *new_buf = buf;
 8015140:	69ba      	ldr	r2, [r7, #24]
 8015142:	68bb      	ldr	r3, [r7, #8]
 8015144:	601a      	str	r2, [r3, #0]
  /* don't set conn->last_err: it's only ERR_OK, anyway */
  return ERR_OK;
 8015146:	2300      	movs	r3, #0
}
 8015148:	4618      	mov	r0, r3
 801514a:	3728      	adds	r7, #40	@ 0x28
 801514c:	46bd      	mov	sp, r7
 801514e:	bd80      	pop	{r7, pc}
 8015150:	0802c718 	.word	0x0802c718
 8015154:	0802c930 	.word	0x0802c930
 8015158:	0802c770 	.word	0x0802c770
 801515c:	0802c950 	.word	0x0802c950
 8015160:	0802c96c 	.word	0x0802c96c

08015164 <netconn_tcp_recvd_msg>:

#if LWIP_TCP
static err_t
netconn_tcp_recvd_msg(struct netconn *conn, size_t len, struct api_msg *msg)
{
 8015164:	b580      	push	{r7, lr}
 8015166:	b084      	sub	sp, #16
 8015168:	af00      	add	r7, sp, #0
 801516a:	60f8      	str	r0, [r7, #12]
 801516c:	60b9      	str	r1, [r7, #8]
 801516e:	607a      	str	r2, [r7, #4]
  LWIP_ERROR("netconn_recv_tcp_pbuf: invalid conn", (conn != NULL) &&
 8015170:	68fb      	ldr	r3, [r7, #12]
 8015172:	2b00      	cmp	r3, #0
 8015174:	d005      	beq.n	8015182 <netconn_tcp_recvd_msg+0x1e>
 8015176:	68fb      	ldr	r3, [r7, #12]
 8015178:	781b      	ldrb	r3, [r3, #0]
 801517a:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 801517e:	2b10      	cmp	r3, #16
 8015180:	d009      	beq.n	8015196 <netconn_tcp_recvd_msg+0x32>
 8015182:	4b0c      	ldr	r3, [pc, #48]	@ (80151b4 <netconn_tcp_recvd_msg+0x50>)
 8015184:	f240 22a7 	movw	r2, #679	@ 0x2a7
 8015188:	490b      	ldr	r1, [pc, #44]	@ (80151b8 <netconn_tcp_recvd_msg+0x54>)
 801518a:	480c      	ldr	r0, [pc, #48]	@ (80151bc <netconn_tcp_recvd_msg+0x58>)
 801518c:	f014 f9be 	bl	802950c <iprintf>
 8015190:	f06f 030f 	mvn.w	r3, #15
 8015194:	e00a      	b.n	80151ac <netconn_tcp_recvd_msg+0x48>
             NETCONNTYPE_GROUP(netconn_type(conn)) == NETCONN_TCP, return ERR_ARG;);

  msg->conn = conn;
 8015196:	687b      	ldr	r3, [r7, #4]
 8015198:	68fa      	ldr	r2, [r7, #12]
 801519a:	601a      	str	r2, [r3, #0]
  msg->msg.r.len = len;
 801519c:	687b      	ldr	r3, [r7, #4]
 801519e:	68ba      	ldr	r2, [r7, #8]
 80151a0:	609a      	str	r2, [r3, #8]

  return netconn_apimsg(lwip_netconn_do_recv, msg);
 80151a2:	6879      	ldr	r1, [r7, #4]
 80151a4:	4806      	ldr	r0, [pc, #24]	@ (80151c0 <netconn_tcp_recvd_msg+0x5c>)
 80151a6:	f7ff fd6f 	bl	8014c88 <netconn_apimsg>
 80151aa:	4603      	mov	r3, r0
}
 80151ac:	4618      	mov	r0, r3
 80151ae:	3710      	adds	r7, #16
 80151b0:	46bd      	mov	sp, r7
 80151b2:	bd80      	pop	{r7, pc}
 80151b4:	0802c718 	.word	0x0802c718
 80151b8:	0802c978 	.word	0x0802c978
 80151bc:	0802c770 	.word	0x0802c770
 80151c0:	080168d7 	.word	0x080168d7

080151c4 <netconn_tcp_recvd>:

err_t
netconn_tcp_recvd(struct netconn *conn, size_t len)
{
 80151c4:	b580      	push	{r7, lr}
 80151c6:	b08c      	sub	sp, #48	@ 0x30
 80151c8:	af00      	add	r7, sp, #0
 80151ca:	6078      	str	r0, [r7, #4]
 80151cc:	6039      	str	r1, [r7, #0]
  err_t err;
  API_MSG_VAR_DECLARE(msg);
  LWIP_ERROR("netconn_recv_tcp_pbuf: invalid conn", (conn != NULL) &&
 80151ce:	687b      	ldr	r3, [r7, #4]
 80151d0:	2b00      	cmp	r3, #0
 80151d2:	d005      	beq.n	80151e0 <netconn_tcp_recvd+0x1c>
 80151d4:	687b      	ldr	r3, [r7, #4]
 80151d6:	781b      	ldrb	r3, [r3, #0]
 80151d8:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 80151dc:	2b10      	cmp	r3, #16
 80151de:	d009      	beq.n	80151f4 <netconn_tcp_recvd+0x30>
 80151e0:	4b0c      	ldr	r3, [pc, #48]	@ (8015214 <netconn_tcp_recvd+0x50>)
 80151e2:	f240 22b5 	movw	r2, #693	@ 0x2b5
 80151e6:	490c      	ldr	r1, [pc, #48]	@ (8015218 <netconn_tcp_recvd+0x54>)
 80151e8:	480c      	ldr	r0, [pc, #48]	@ (801521c <netconn_tcp_recvd+0x58>)
 80151ea:	f014 f98f 	bl	802950c <iprintf>
 80151ee:	f06f 030f 	mvn.w	r3, #15
 80151f2:	e00b      	b.n	801520c <netconn_tcp_recvd+0x48>
             NETCONNTYPE_GROUP(netconn_type(conn)) == NETCONN_TCP, return ERR_ARG;);

  API_MSG_VAR_ALLOC(msg);
  err = netconn_tcp_recvd_msg(conn, len, &API_VAR_REF(msg));
 80151f4:	f107 030c 	add.w	r3, r7, #12
 80151f8:	461a      	mov	r2, r3
 80151fa:	6839      	ldr	r1, [r7, #0]
 80151fc:	6878      	ldr	r0, [r7, #4]
 80151fe:	f7ff ffb1 	bl	8015164 <netconn_tcp_recvd_msg>
 8015202:	4603      	mov	r3, r0
 8015204:	f887 302f 	strb.w	r3, [r7, #47]	@ 0x2f
  API_MSG_VAR_FREE(msg);
  return err;
 8015208:	f997 302f 	ldrsb.w	r3, [r7, #47]	@ 0x2f
}
 801520c:	4618      	mov	r0, r3
 801520e:	3730      	adds	r7, #48	@ 0x30
 8015210:	46bd      	mov	sp, r7
 8015212:	bd80      	pop	{r7, pc}
 8015214:	0802c718 	.word	0x0802c718
 8015218:	0802c978 	.word	0x0802c978
 801521c:	0802c770 	.word	0x0802c770

08015220 <netconn_recv_data_tcp>:

static err_t
netconn_recv_data_tcp(struct netconn *conn, struct pbuf **new_buf, u8_t apiflags)
{
 8015220:	b580      	push	{r7, lr}
 8015222:	b090      	sub	sp, #64	@ 0x40
 8015224:	af00      	add	r7, sp, #0
 8015226:	60f8      	str	r0, [r7, #12]
 8015228:	60b9      	str	r1, [r7, #8]
 801522a:	4613      	mov	r3, r2
 801522c:	71fb      	strb	r3, [r7, #7]
  API_MSG_VAR_DECLARE(msg);
#if LWIP_MPU_COMPATIBLE
  msg = NULL;
#endif

  if (!NETCONN_RECVMBOX_WAITABLE(conn)) {
 801522e:	68fb      	ldr	r3, [r7, #12]
 8015230:	3310      	adds	r3, #16
 8015232:	4618      	mov	r0, r3
 8015234:	f010 fdca 	bl	8025dcc <sys_mbox_valid>
 8015238:	4603      	mov	r3, r0
 801523a:	2b00      	cmp	r3, #0
 801523c:	d102      	bne.n	8015244 <netconn_recv_data_tcp+0x24>
    /* This only happens when calling this function more than once *after* receiving FIN */
    return ERR_CONN;
 801523e:	f06f 030a 	mvn.w	r3, #10
 8015242:	e072      	b.n	801532a <netconn_recv_data_tcp+0x10a>
  }
  if (netconn_is_flag_set(conn, NETCONN_FIN_RX_PENDING)) {
 8015244:	68fb      	ldr	r3, [r7, #12]
 8015246:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 801524a:	b25b      	sxtb	r3, r3
 801524c:	2b00      	cmp	r3, #0
 801524e:	da09      	bge.n	8015264 <netconn_recv_data_tcp+0x44>
    netconn_clear_flags(conn, NETCONN_FIN_RX_PENDING);
 8015250:	68fb      	ldr	r3, [r7, #12]
 8015252:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8015256:	f003 037f 	and.w	r3, r3, #127	@ 0x7f
 801525a:	b2da      	uxtb	r2, r3
 801525c:	68fb      	ldr	r3, [r7, #12]
 801525e:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
    goto handle_fin;
 8015262:	e03b      	b.n	80152dc <netconn_recv_data_tcp+0xbc>
    /* need to allocate API message here so empty message pool does not result in event loss
      * see bug #47512: MPU_COMPATIBLE may fail on empty pool */
    API_MSG_VAR_ALLOC(msg);
  }

  err = netconn_recv_data(conn, (void **)new_buf, apiflags);
 8015264:	79fb      	ldrb	r3, [r7, #7]
 8015266:	461a      	mov	r2, r3
 8015268:	68b9      	ldr	r1, [r7, #8]
 801526a:	68f8      	ldr	r0, [r7, #12]
 801526c:	f7ff fe9a 	bl	8014fa4 <netconn_recv_data>
 8015270:	4603      	mov	r3, r0
 8015272:	f887 303f 	strb.w	r3, [r7, #63]	@ 0x3f
  if (err != ERR_OK) {
 8015276:	f997 303f 	ldrsb.w	r3, [r7, #63]	@ 0x3f
 801527a:	2b00      	cmp	r3, #0
 801527c:	d002      	beq.n	8015284 <netconn_recv_data_tcp+0x64>
    if (!(apiflags & NETCONN_NOAUTORCVD)) {
      API_MSG_VAR_FREE(msg);
    }
    return err;
 801527e:	f997 303f 	ldrsb.w	r3, [r7, #63]	@ 0x3f
 8015282:	e052      	b.n	801532a <netconn_recv_data_tcp+0x10a>
  }
  buf = *new_buf;
 8015284:	68bb      	ldr	r3, [r7, #8]
 8015286:	681b      	ldr	r3, [r3, #0]
 8015288:	63bb      	str	r3, [r7, #56]	@ 0x38
  if (!(apiflags & NETCONN_NOAUTORCVD)) {
 801528a:	79fb      	ldrb	r3, [r7, #7]
 801528c:	f003 0308 	and.w	r3, r3, #8
 8015290:	2b00      	cmp	r3, #0
 8015292:	d10e      	bne.n	80152b2 <netconn_recv_data_tcp+0x92>
    /* Let the stack know that we have taken the data. */
    u16_t len = buf ? buf->tot_len : 1;
 8015294:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8015296:	2b00      	cmp	r3, #0
 8015298:	d002      	beq.n	80152a0 <netconn_recv_data_tcp+0x80>
 801529a:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801529c:	891b      	ldrh	r3, [r3, #8]
 801529e:	e000      	b.n	80152a2 <netconn_recv_data_tcp+0x82>
 80152a0:	2301      	movs	r3, #1
 80152a2:	86fb      	strh	r3, [r7, #54]	@ 0x36
    /* don't care for the return value of lwip_netconn_do_recv */
    /* @todo: this should really be fixed, e.g. by retrying in poll on error */
    netconn_tcp_recvd_msg(conn, len,  &API_VAR_REF(msg));
 80152a4:	8efb      	ldrh	r3, [r7, #54]	@ 0x36
 80152a6:	f107 0214 	add.w	r2, r7, #20
 80152aa:	4619      	mov	r1, r3
 80152ac:	68f8      	ldr	r0, [r7, #12]
 80152ae:	f7ff ff59 	bl	8015164 <netconn_tcp_recvd_msg>
    API_MSG_VAR_FREE(msg);
  }

  /* If we are closed, we indicate that we no longer wish to use the socket */
  if (buf == NULL) {
 80152b2:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 80152b4:	2b00      	cmp	r3, #0
 80152b6:	d136      	bne.n	8015326 <netconn_recv_data_tcp+0x106>
    if (apiflags & NETCONN_NOFIN) {
 80152b8:	79fb      	ldrb	r3, [r7, #7]
 80152ba:	f003 0310 	and.w	r3, r3, #16
 80152be:	2b00      	cmp	r3, #0
 80152c0:	d00b      	beq.n	80152da <netconn_recv_data_tcp+0xba>
      /* received a FIN but the caller cannot handle it right now:
         re-enqueue it and return "no data" */
      netconn_set_flags(conn, NETCONN_FIN_RX_PENDING);
 80152c2:	68fb      	ldr	r3, [r7, #12]
 80152c4:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 80152c8:	f063 037f 	orn	r3, r3, #127	@ 0x7f
 80152cc:	b2da      	uxtb	r2, r3
 80152ce:	68fb      	ldr	r3, [r7, #12]
 80152d0:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
      return ERR_WOULDBLOCK;
 80152d4:	f06f 0306 	mvn.w	r3, #6
 80152d8:	e027      	b.n	801532a <netconn_recv_data_tcp+0x10a>
    } else {
handle_fin:
 80152da:	bf00      	nop
      API_EVENT(conn, NETCONN_EVT_RCVMINUS, 0);
 80152dc:	68fb      	ldr	r3, [r7, #12]
 80152de:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 80152e0:	2b00      	cmp	r3, #0
 80152e2:	d005      	beq.n	80152f0 <netconn_recv_data_tcp+0xd0>
 80152e4:	68fb      	ldr	r3, [r7, #12]
 80152e6:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 80152e8:	2200      	movs	r2, #0
 80152ea:	2101      	movs	r1, #1
 80152ec:	68f8      	ldr	r0, [r7, #12]
 80152ee:	4798      	blx	r3
      if (conn->pcb.ip == NULL) {
 80152f0:	68fb      	ldr	r3, [r7, #12]
 80152f2:	685b      	ldr	r3, [r3, #4]
 80152f4:	2b00      	cmp	r3, #0
 80152f6:	d10f      	bne.n	8015318 <netconn_recv_data_tcp+0xf8>
        /* race condition: RST during recv */
        err = netconn_err(conn);
 80152f8:	68f8      	ldr	r0, [r7, #12]
 80152fa:	f000 f9a3 	bl	8015644 <netconn_err>
 80152fe:	4603      	mov	r3, r0
 8015300:	f887 303f 	strb.w	r3, [r7, #63]	@ 0x3f
        if (err != ERR_OK) {
 8015304:	f997 303f 	ldrsb.w	r3, [r7, #63]	@ 0x3f
 8015308:	2b00      	cmp	r3, #0
 801530a:	d002      	beq.n	8015312 <netconn_recv_data_tcp+0xf2>
          return err;
 801530c:	f997 303f 	ldrsb.w	r3, [r7, #63]	@ 0x3f
 8015310:	e00b      	b.n	801532a <netconn_recv_data_tcp+0x10a>
        }
        return ERR_RST;
 8015312:	f06f 030d 	mvn.w	r3, #13
 8015316:	e008      	b.n	801532a <netconn_recv_data_tcp+0x10a>
      }
      /* RX side is closed, so deallocate the recvmbox */
      netconn_close_shutdown(conn, NETCONN_SHUT_RD);
 8015318:	2101      	movs	r1, #1
 801531a:	68f8      	ldr	r0, [r7, #12]
 801531c:	f000 f962 	bl	80155e4 <netconn_close_shutdown>
      /* Don' store ERR_CLSD as conn->err since we are only half-closed */
      return ERR_CLSD;
 8015320:	f06f 030e 	mvn.w	r3, #14
 8015324:	e001      	b.n	801532a <netconn_recv_data_tcp+0x10a>
    }
  }
  return err;
 8015326:	f997 303f 	ldrsb.w	r3, [r7, #63]	@ 0x3f
}
 801532a:	4618      	mov	r0, r3
 801532c:	3740      	adds	r7, #64	@ 0x40
 801532e:	46bd      	mov	sp, r7
 8015330:	bd80      	pop	{r7, pc}
	...

08015334 <netconn_recv_tcp_pbuf_flags>:
 *                memory error or another error, @see netconn_recv_data)
 *         ERR_ARG if conn is not a TCP netconn
 */
err_t
netconn_recv_tcp_pbuf_flags(struct netconn *conn, struct pbuf **new_buf, u8_t apiflags)
{
 8015334:	b580      	push	{r7, lr}
 8015336:	b084      	sub	sp, #16
 8015338:	af00      	add	r7, sp, #0
 801533a:	60f8      	str	r0, [r7, #12]
 801533c:	60b9      	str	r1, [r7, #8]
 801533e:	4613      	mov	r3, r2
 8015340:	71fb      	strb	r3, [r7, #7]
  LWIP_ERROR("netconn_recv_tcp_pbuf: invalid conn", (conn != NULL) &&
 8015342:	68fb      	ldr	r3, [r7, #12]
 8015344:	2b00      	cmp	r3, #0
 8015346:	d005      	beq.n	8015354 <netconn_recv_tcp_pbuf_flags+0x20>
 8015348:	68fb      	ldr	r3, [r7, #12]
 801534a:	781b      	ldrb	r3, [r3, #0]
 801534c:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8015350:	2b10      	cmp	r3, #16
 8015352:	d009      	beq.n	8015368 <netconn_recv_tcp_pbuf_flags+0x34>
 8015354:	4b0a      	ldr	r3, [pc, #40]	@ (8015380 <netconn_recv_tcp_pbuf_flags+0x4c>)
 8015356:	f240 3225 	movw	r2, #805	@ 0x325
 801535a:	490a      	ldr	r1, [pc, #40]	@ (8015384 <netconn_recv_tcp_pbuf_flags+0x50>)
 801535c:	480a      	ldr	r0, [pc, #40]	@ (8015388 <netconn_recv_tcp_pbuf_flags+0x54>)
 801535e:	f014 f8d5 	bl	802950c <iprintf>
 8015362:	f06f 030f 	mvn.w	r3, #15
 8015366:	e006      	b.n	8015376 <netconn_recv_tcp_pbuf_flags+0x42>
             NETCONNTYPE_GROUP(netconn_type(conn)) == NETCONN_TCP, return ERR_ARG;);

  return netconn_recv_data_tcp(conn, new_buf, apiflags);
 8015368:	79fb      	ldrb	r3, [r7, #7]
 801536a:	461a      	mov	r2, r3
 801536c:	68b9      	ldr	r1, [r7, #8]
 801536e:	68f8      	ldr	r0, [r7, #12]
 8015370:	f7ff ff56 	bl	8015220 <netconn_recv_data_tcp>
 8015374:	4603      	mov	r3, r0
}
 8015376:	4618      	mov	r0, r3
 8015378:	3710      	adds	r7, #16
 801537a:	46bd      	mov	sp, r7
 801537c:	bd80      	pop	{r7, pc}
 801537e:	bf00      	nop
 8015380:	0802c718 	.word	0x0802c718
 8015384:	0802c978 	.word	0x0802c978
 8015388:	0802c770 	.word	0x0802c770

0801538c <netconn_recv_udp_raw_netbuf_flags>:
 *                memory error or another error)
 *         ERR_ARG if conn is not a UDP/RAW netconn
 */
err_t
netconn_recv_udp_raw_netbuf_flags(struct netconn *conn, struct netbuf **new_buf, u8_t apiflags)
{
 801538c:	b580      	push	{r7, lr}
 801538e:	b084      	sub	sp, #16
 8015390:	af00      	add	r7, sp, #0
 8015392:	60f8      	str	r0, [r7, #12]
 8015394:	60b9      	str	r1, [r7, #8]
 8015396:	4613      	mov	r3, r2
 8015398:	71fb      	strb	r3, [r7, #7]
  LWIP_ERROR("netconn_recv_udp_raw_netbuf: invalid conn", (conn != NULL) &&
 801539a:	68fb      	ldr	r3, [r7, #12]
 801539c:	2b00      	cmp	r3, #0
 801539e:	d005      	beq.n	80153ac <netconn_recv_udp_raw_netbuf_flags+0x20>
 80153a0:	68fb      	ldr	r3, [r7, #12]
 80153a2:	781b      	ldrb	r3, [r3, #0]
 80153a4:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 80153a8:	2b10      	cmp	r3, #16
 80153aa:	d109      	bne.n	80153c0 <netconn_recv_udp_raw_netbuf_flags+0x34>
 80153ac:	4b0a      	ldr	r3, [pc, #40]	@ (80153d8 <netconn_recv_udp_raw_netbuf_flags+0x4c>)
 80153ae:	f44f 7253 	mov.w	r2, #844	@ 0x34c
 80153b2:	490a      	ldr	r1, [pc, #40]	@ (80153dc <netconn_recv_udp_raw_netbuf_flags+0x50>)
 80153b4:	480a      	ldr	r0, [pc, #40]	@ (80153e0 <netconn_recv_udp_raw_netbuf_flags+0x54>)
 80153b6:	f014 f8a9 	bl	802950c <iprintf>
 80153ba:	f06f 030f 	mvn.w	r3, #15
 80153be:	e006      	b.n	80153ce <netconn_recv_udp_raw_netbuf_flags+0x42>
             NETCONNTYPE_GROUP(netconn_type(conn)) != NETCONN_TCP, return ERR_ARG;);

  return netconn_recv_data(conn, (void **)new_buf, apiflags);
 80153c0:	79fb      	ldrb	r3, [r7, #7]
 80153c2:	461a      	mov	r2, r3
 80153c4:	68b9      	ldr	r1, [r7, #8]
 80153c6:	68f8      	ldr	r0, [r7, #12]
 80153c8:	f7ff fdec 	bl	8014fa4 <netconn_recv_data>
 80153cc:	4603      	mov	r3, r0
}
 80153ce:	4618      	mov	r0, r3
 80153d0:	3710      	adds	r7, #16
 80153d2:	46bd      	mov	sp, r7
 80153d4:	bd80      	pop	{r7, pc}
 80153d6:	bf00      	nop
 80153d8:	0802c718 	.word	0x0802c718
 80153dc:	0802c99c 	.word	0x0802c99c
 80153e0:	0802c770 	.word	0x0802c770

080153e4 <netconn_send>:
 * @param buf a netbuf containing the data to send
 * @return ERR_OK if data was sent, any other err_t on error
 */
err_t
netconn_send(struct netconn *conn, struct netbuf *buf)
{
 80153e4:	b580      	push	{r7, lr}
 80153e6:	b08c      	sub	sp, #48	@ 0x30
 80153e8:	af00      	add	r7, sp, #0
 80153ea:	6078      	str	r0, [r7, #4]
 80153ec:	6039      	str	r1, [r7, #0]
  API_MSG_VAR_DECLARE(msg);
  err_t err;

  LWIP_ERROR("netconn_send: invalid conn",  (conn != NULL), return ERR_ARG;);
 80153ee:	687b      	ldr	r3, [r7, #4]
 80153f0:	2b00      	cmp	r3, #0
 80153f2:	d109      	bne.n	8015408 <netconn_send+0x24>
 80153f4:	4b0e      	ldr	r3, [pc, #56]	@ (8015430 <netconn_send+0x4c>)
 80153f6:	f240 32b2 	movw	r2, #946	@ 0x3b2
 80153fa:	490e      	ldr	r1, [pc, #56]	@ (8015434 <netconn_send+0x50>)
 80153fc:	480e      	ldr	r0, [pc, #56]	@ (8015438 <netconn_send+0x54>)
 80153fe:	f014 f885 	bl	802950c <iprintf>
 8015402:	f06f 030f 	mvn.w	r3, #15
 8015406:	e00e      	b.n	8015426 <netconn_send+0x42>

  LWIP_DEBUGF(API_LIB_DEBUG, ("netconn_send: sending %"U16_F" bytes\n", buf->p->tot_len));

  API_MSG_VAR_ALLOC(msg);
  API_MSG_VAR_REF(msg).conn = conn;
 8015408:	687b      	ldr	r3, [r7, #4]
 801540a:	60fb      	str	r3, [r7, #12]
  API_MSG_VAR_REF(msg).msg.b = buf;
 801540c:	683b      	ldr	r3, [r7, #0]
 801540e:	617b      	str	r3, [r7, #20]
  err = netconn_apimsg(lwip_netconn_do_send, &API_MSG_VAR_REF(msg));
 8015410:	f107 030c 	add.w	r3, r7, #12
 8015414:	4619      	mov	r1, r3
 8015416:	4809      	ldr	r0, [pc, #36]	@ (801543c <netconn_send+0x58>)
 8015418:	f7ff fc36 	bl	8014c88 <netconn_apimsg>
 801541c:	4603      	mov	r3, r0
 801541e:	f887 302f 	strb.w	r3, [r7, #47]	@ 0x2f
  API_MSG_VAR_FREE(msg);

  return err;
 8015422:	f997 302f 	ldrsb.w	r3, [r7, #47]	@ 0x2f
}
 8015426:	4618      	mov	r0, r3
 8015428:	3730      	adds	r7, #48	@ 0x30
 801542a:	46bd      	mov	sp, r7
 801542c:	bd80      	pop	{r7, pc}
 801542e:	bf00      	nop
 8015430:	0802c718 	.word	0x0802c718
 8015434:	0802c9d4 	.word	0x0802c9d4
 8015438:	0802c770 	.word	0x0802c770
 801543c:	0801683d 	.word	0x0801683d

08015440 <netconn_write_partly>:
 * @return ERR_OK if data was sent, any other err_t on error
 */
err_t
netconn_write_partly(struct netconn *conn, const void *dataptr, size_t size,
                     u8_t apiflags, size_t *bytes_written)
{
 8015440:	b580      	push	{r7, lr}
 8015442:	b088      	sub	sp, #32
 8015444:	af02      	add	r7, sp, #8
 8015446:	60f8      	str	r0, [r7, #12]
 8015448:	60b9      	str	r1, [r7, #8]
 801544a:	607a      	str	r2, [r7, #4]
 801544c:	70fb      	strb	r3, [r7, #3]
  struct netvector vector;
  vector.ptr = dataptr;
 801544e:	68bb      	ldr	r3, [r7, #8]
 8015450:	613b      	str	r3, [r7, #16]
  vector.len = size;
 8015452:	687b      	ldr	r3, [r7, #4]
 8015454:	617b      	str	r3, [r7, #20]
  return netconn_write_vectors_partly(conn, &vector, 1, apiflags, bytes_written);
 8015456:	78fa      	ldrb	r2, [r7, #3]
 8015458:	f107 0110 	add.w	r1, r7, #16
 801545c:	6a3b      	ldr	r3, [r7, #32]
 801545e:	9300      	str	r3, [sp, #0]
 8015460:	4613      	mov	r3, r2
 8015462:	2201      	movs	r2, #1
 8015464:	68f8      	ldr	r0, [r7, #12]
 8015466:	f000 f805 	bl	8015474 <netconn_write_vectors_partly>
 801546a:	4603      	mov	r3, r0
}
 801546c:	4618      	mov	r0, r3
 801546e:	3718      	adds	r7, #24
 8015470:	46bd      	mov	sp, r7
 8015472:	bd80      	pop	{r7, pc}

08015474 <netconn_write_vectors_partly>:
 * @return ERR_OK if data was sent, any other err_t on error
 */
err_t
netconn_write_vectors_partly(struct netconn *conn, struct netvector *vectors, u16_t vectorcnt,
                             u8_t apiflags, size_t *bytes_written)
{
 8015474:	b580      	push	{r7, lr}
 8015476:	b092      	sub	sp, #72	@ 0x48
 8015478:	af00      	add	r7, sp, #0
 801547a:	60f8      	str	r0, [r7, #12]
 801547c:	60b9      	str	r1, [r7, #8]
 801547e:	4611      	mov	r1, r2
 8015480:	461a      	mov	r2, r3
 8015482:	460b      	mov	r3, r1
 8015484:	80fb      	strh	r3, [r7, #6]
 8015486:	4613      	mov	r3, r2
 8015488:	717b      	strb	r3, [r7, #5]
  err_t err;
  u8_t dontblock;
  size_t size;
  int i;

  LWIP_ERROR("netconn_write: invalid conn",  (conn != NULL), return ERR_ARG;);
 801548a:	68fb      	ldr	r3, [r7, #12]
 801548c:	2b00      	cmp	r3, #0
 801548e:	d109      	bne.n	80154a4 <netconn_write_vectors_partly+0x30>
 8015490:	4b4e      	ldr	r3, [pc, #312]	@ (80155cc <netconn_write_vectors_partly+0x158>)
 8015492:	f240 32ee 	movw	r2, #1006	@ 0x3ee
 8015496:	494e      	ldr	r1, [pc, #312]	@ (80155d0 <netconn_write_vectors_partly+0x15c>)
 8015498:	484e      	ldr	r0, [pc, #312]	@ (80155d4 <netconn_write_vectors_partly+0x160>)
 801549a:	f014 f837 	bl	802950c <iprintf>
 801549e:	f06f 030f 	mvn.w	r3, #15
 80154a2:	e08f      	b.n	80155c4 <netconn_write_vectors_partly+0x150>
  LWIP_ERROR("netconn_write: invalid conn->type",  (NETCONNTYPE_GROUP(conn->type) == NETCONN_TCP), return ERR_VAL;);
 80154a4:	68fb      	ldr	r3, [r7, #12]
 80154a6:	781b      	ldrb	r3, [r3, #0]
 80154a8:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 80154ac:	2b10      	cmp	r3, #16
 80154ae:	d009      	beq.n	80154c4 <netconn_write_vectors_partly+0x50>
 80154b0:	4b46      	ldr	r3, [pc, #280]	@ (80155cc <netconn_write_vectors_partly+0x158>)
 80154b2:	f240 32ef 	movw	r2, #1007	@ 0x3ef
 80154b6:	4948      	ldr	r1, [pc, #288]	@ (80155d8 <netconn_write_vectors_partly+0x164>)
 80154b8:	4846      	ldr	r0, [pc, #280]	@ (80155d4 <netconn_write_vectors_partly+0x160>)
 80154ba:	f014 f827 	bl	802950c <iprintf>
 80154be:	f06f 0305 	mvn.w	r3, #5
 80154c2:	e07f      	b.n	80155c4 <netconn_write_vectors_partly+0x150>
  dontblock = netconn_is_nonblocking(conn) || (apiflags & NETCONN_DONTBLOCK);
 80154c4:	68fb      	ldr	r3, [r7, #12]
 80154c6:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 80154ca:	f003 0302 	and.w	r3, r3, #2
 80154ce:	2b00      	cmp	r3, #0
 80154d0:	d104      	bne.n	80154dc <netconn_write_vectors_partly+0x68>
 80154d2:	797b      	ldrb	r3, [r7, #5]
 80154d4:	f003 0304 	and.w	r3, r3, #4
 80154d8:	2b00      	cmp	r3, #0
 80154da:	d001      	beq.n	80154e0 <netconn_write_vectors_partly+0x6c>
 80154dc:	2301      	movs	r3, #1
 80154de:	e000      	b.n	80154e2 <netconn_write_vectors_partly+0x6e>
 80154e0:	2300      	movs	r3, #0
 80154e2:	f887 303f 	strb.w	r3, [r7, #63]	@ 0x3f
#if LWIP_SO_SNDTIMEO
  if (conn->send_timeout != 0) {
    dontblock = 1;
  }
#endif /* LWIP_SO_SNDTIMEO */
  if (dontblock && !bytes_written) {
 80154e6:	f897 303f 	ldrb.w	r3, [r7, #63]	@ 0x3f
 80154ea:	2b00      	cmp	r3, #0
 80154ec:	d005      	beq.n	80154fa <netconn_write_vectors_partly+0x86>
 80154ee:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 80154f0:	2b00      	cmp	r3, #0
 80154f2:	d102      	bne.n	80154fa <netconn_write_vectors_partly+0x86>
    /* This implies netconn_write() cannot be used for non-blocking send, since
       it has no way to return the number of bytes written. */
    return ERR_VAL;
 80154f4:	f06f 0305 	mvn.w	r3, #5
 80154f8:	e064      	b.n	80155c4 <netconn_write_vectors_partly+0x150>
  }

  /* sum up the total size */
  size = 0;
 80154fa:	2300      	movs	r3, #0
 80154fc:	647b      	str	r3, [r7, #68]	@ 0x44
  for (i = 0; i < vectorcnt; i++) {
 80154fe:	2300      	movs	r3, #0
 8015500:	643b      	str	r3, [r7, #64]	@ 0x40
 8015502:	e015      	b.n	8015530 <netconn_write_vectors_partly+0xbc>
    size += vectors[i].len;
 8015504:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8015506:	00db      	lsls	r3, r3, #3
 8015508:	68ba      	ldr	r2, [r7, #8]
 801550a:	4413      	add	r3, r2
 801550c:	685b      	ldr	r3, [r3, #4]
 801550e:	6c7a      	ldr	r2, [r7, #68]	@ 0x44
 8015510:	4413      	add	r3, r2
 8015512:	647b      	str	r3, [r7, #68]	@ 0x44
    if (size < vectors[i].len) {
 8015514:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8015516:	00db      	lsls	r3, r3, #3
 8015518:	68ba      	ldr	r2, [r7, #8]
 801551a:	4413      	add	r3, r2
 801551c:	685b      	ldr	r3, [r3, #4]
 801551e:	6c7a      	ldr	r2, [r7, #68]	@ 0x44
 8015520:	429a      	cmp	r2, r3
 8015522:	d202      	bcs.n	801552a <netconn_write_vectors_partly+0xb6>
      /* overflow */
      return ERR_VAL;
 8015524:	f06f 0305 	mvn.w	r3, #5
 8015528:	e04c      	b.n	80155c4 <netconn_write_vectors_partly+0x150>
  for (i = 0; i < vectorcnt; i++) {
 801552a:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801552c:	3301      	adds	r3, #1
 801552e:	643b      	str	r3, [r7, #64]	@ 0x40
 8015530:	88fb      	ldrh	r3, [r7, #6]
 8015532:	6c3a      	ldr	r2, [r7, #64]	@ 0x40
 8015534:	429a      	cmp	r2, r3
 8015536:	dbe5      	blt.n	8015504 <netconn_write_vectors_partly+0x90>
    }
  }
  if (size == 0) {
 8015538:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 801553a:	2b00      	cmp	r3, #0
 801553c:	d101      	bne.n	8015542 <netconn_write_vectors_partly+0xce>
    return ERR_OK;
 801553e:	2300      	movs	r3, #0
 8015540:	e040      	b.n	80155c4 <netconn_write_vectors_partly+0x150>
  } else if (size > SSIZE_MAX) {
 8015542:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 8015544:	2b00      	cmp	r3, #0
 8015546:	da0a      	bge.n	801555e <netconn_write_vectors_partly+0xea>
    ssize_t limited;
    /* this is required by the socket layer (cannot send full size_t range) */
    if (!bytes_written) {
 8015548:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 801554a:	2b00      	cmp	r3, #0
 801554c:	d102      	bne.n	8015554 <netconn_write_vectors_partly+0xe0>
      return ERR_VAL;
 801554e:	f06f 0305 	mvn.w	r3, #5
 8015552:	e037      	b.n	80155c4 <netconn_write_vectors_partly+0x150>
    }
    /* limit the amount of data to send */
    limited = SSIZE_MAX;
 8015554:	f06f 4300 	mvn.w	r3, #2147483648	@ 0x80000000
 8015558:	63bb      	str	r3, [r7, #56]	@ 0x38
    size = (size_t)limited;
 801555a:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801555c:	647b      	str	r3, [r7, #68]	@ 0x44
  }

  API_MSG_VAR_ALLOC(msg);
  /* non-blocking write sends as much  */
  API_MSG_VAR_REF(msg).conn = conn;
 801555e:	68fb      	ldr	r3, [r7, #12]
 8015560:	617b      	str	r3, [r7, #20]
  API_MSG_VAR_REF(msg).msg.w.vector = vectors;
 8015562:	68bb      	ldr	r3, [r7, #8]
 8015564:	61fb      	str	r3, [r7, #28]
  API_MSG_VAR_REF(msg).msg.w.vector_cnt = vectorcnt;
 8015566:	88fb      	ldrh	r3, [r7, #6]
 8015568:	843b      	strh	r3, [r7, #32]
  API_MSG_VAR_REF(msg).msg.w.vector_off = 0;
 801556a:	2300      	movs	r3, #0
 801556c:	627b      	str	r3, [r7, #36]	@ 0x24
  API_MSG_VAR_REF(msg).msg.w.apiflags = apiflags;
 801556e:	797b      	ldrb	r3, [r7, #5]
 8015570:	f887 3030 	strb.w	r3, [r7, #48]	@ 0x30
  API_MSG_VAR_REF(msg).msg.w.len = size;
 8015574:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 8015576:	62bb      	str	r3, [r7, #40]	@ 0x28
  API_MSG_VAR_REF(msg).msg.w.offset = 0;
 8015578:	2300      	movs	r3, #0
 801557a:	62fb      	str	r3, [r7, #44]	@ 0x2c
#endif /* LWIP_SO_SNDTIMEO */

  /* For locking the core: this _can_ be delayed on low memory/low send buffer,
     but if it is, this is done inside api_msg.c:do_write(), so we can use the
     non-blocking version here. */
  err = netconn_apimsg(lwip_netconn_do_write, &API_MSG_VAR_REF(msg));
 801557c:	f107 0314 	add.w	r3, r7, #20
 8015580:	4619      	mov	r1, r3
 8015582:	4816      	ldr	r0, [pc, #88]	@ (80155dc <netconn_write_vectors_partly+0x168>)
 8015584:	f7ff fb80 	bl	8014c88 <netconn_apimsg>
 8015588:	4603      	mov	r3, r0
 801558a:	f887 3037 	strb.w	r3, [r7, #55]	@ 0x37
  if (err == ERR_OK) {
 801558e:	f997 3037 	ldrsb.w	r3, [r7, #55]	@ 0x37
 8015592:	2b00      	cmp	r3, #0
 8015594:	d114      	bne.n	80155c0 <netconn_write_vectors_partly+0x14c>
    if (bytes_written != NULL) {
 8015596:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 8015598:	2b00      	cmp	r3, #0
 801559a:	d002      	beq.n	80155a2 <netconn_write_vectors_partly+0x12e>
      *bytes_written = API_MSG_VAR_REF(msg).msg.w.offset;
 801559c:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 801559e:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 80155a0:	601a      	str	r2, [r3, #0]
    }
    /* for blocking, check all requested bytes were written, NOTE: send_timeout is
       treated as dontblock (see dontblock assignment above) */
    if (!dontblock) {
 80155a2:	f897 303f 	ldrb.w	r3, [r7, #63]	@ 0x3f
 80155a6:	2b00      	cmp	r3, #0
 80155a8:	d10a      	bne.n	80155c0 <netconn_write_vectors_partly+0x14c>
      LWIP_ASSERT("do_write failed to write all bytes", API_MSG_VAR_REF(msg).msg.w.offset == size);
 80155aa:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80155ac:	6c7a      	ldr	r2, [r7, #68]	@ 0x44
 80155ae:	429a      	cmp	r2, r3
 80155b0:	d006      	beq.n	80155c0 <netconn_write_vectors_partly+0x14c>
 80155b2:	4b06      	ldr	r3, [pc, #24]	@ (80155cc <netconn_write_vectors_partly+0x158>)
 80155b4:	f44f 6286 	mov.w	r2, #1072	@ 0x430
 80155b8:	4909      	ldr	r1, [pc, #36]	@ (80155e0 <netconn_write_vectors_partly+0x16c>)
 80155ba:	4806      	ldr	r0, [pc, #24]	@ (80155d4 <netconn_write_vectors_partly+0x160>)
 80155bc:	f013 ffa6 	bl	802950c <iprintf>
    }
  }
  API_MSG_VAR_FREE(msg);

  return err;
 80155c0:	f997 3037 	ldrsb.w	r3, [r7, #55]	@ 0x37
}
 80155c4:	4618      	mov	r0, r3
 80155c6:	3748      	adds	r7, #72	@ 0x48
 80155c8:	46bd      	mov	sp, r7
 80155ca:	bd80      	pop	{r7, pc}
 80155cc:	0802c718 	.word	0x0802c718
 80155d0:	0802c9f0 	.word	0x0802c9f0
 80155d4:	0802c770 	.word	0x0802c770
 80155d8:	0802ca0c 	.word	0x0802ca0c
 80155dc:	08016ce1 	.word	0x08016ce1
 80155e0:	0802ca30 	.word	0x0802ca30

080155e4 <netconn_close_shutdown>:
 * @param how fully close or only shutdown one side?
 * @return ERR_OK if the netconn was closed, any other err_t on error
 */
static err_t
netconn_close_shutdown(struct netconn *conn, u8_t how)
{
 80155e4:	b580      	push	{r7, lr}
 80155e6:	b08c      	sub	sp, #48	@ 0x30
 80155e8:	af00      	add	r7, sp, #0
 80155ea:	6078      	str	r0, [r7, #4]
 80155ec:	460b      	mov	r3, r1
 80155ee:	70fb      	strb	r3, [r7, #3]
  API_MSG_VAR_DECLARE(msg);
  err_t err;
  LWIP_UNUSED_ARG(how);

  LWIP_ERROR("netconn_close: invalid conn",  (conn != NULL), return ERR_ARG;);
 80155f0:	687b      	ldr	r3, [r7, #4]
 80155f2:	2b00      	cmp	r3, #0
 80155f4:	d109      	bne.n	801560a <netconn_close_shutdown+0x26>
 80155f6:	4b0f      	ldr	r3, [pc, #60]	@ (8015634 <netconn_close_shutdown+0x50>)
 80155f8:	f240 4247 	movw	r2, #1095	@ 0x447
 80155fc:	490e      	ldr	r1, [pc, #56]	@ (8015638 <netconn_close_shutdown+0x54>)
 80155fe:	480f      	ldr	r0, [pc, #60]	@ (801563c <netconn_close_shutdown+0x58>)
 8015600:	f013 ff84 	bl	802950c <iprintf>
 8015604:	f06f 030f 	mvn.w	r3, #15
 8015608:	e010      	b.n	801562c <netconn_close_shutdown+0x48>

  API_MSG_VAR_ALLOC(msg);
  API_MSG_VAR_REF(msg).conn = conn;
 801560a:	687b      	ldr	r3, [r7, #4]
 801560c:	60fb      	str	r3, [r7, #12]
#if LWIP_TCP
  /* shutting down both ends is the same as closing */
  API_MSG_VAR_REF(msg).msg.sd.shut = how;
 801560e:	78fb      	ldrb	r3, [r7, #3]
 8015610:	753b      	strb	r3, [r7, #20]
#if LWIP_SO_SNDTIMEO || LWIP_SO_LINGER
  /* get the time we started, which is later compared to
     sys_now() + conn->send_timeout */
  API_MSG_VAR_REF(msg).msg.sd.time_started = sys_now();
#else /* LWIP_SO_SNDTIMEO || LWIP_SO_LINGER */
  API_MSG_VAR_REF(msg).msg.sd.polls_left =
 8015612:	2329      	movs	r3, #41	@ 0x29
 8015614:	757b      	strb	r3, [r7, #21]
    ((LWIP_TCP_CLOSE_TIMEOUT_MS_DEFAULT + TCP_SLOW_INTERVAL - 1) / TCP_SLOW_INTERVAL) + 1;
#endif /* LWIP_SO_SNDTIMEO || LWIP_SO_LINGER */
#endif /* LWIP_TCP */
  err = netconn_apimsg(lwip_netconn_do_close, &API_MSG_VAR_REF(msg));
 8015616:	f107 030c 	add.w	r3, r7, #12
 801561a:	4619      	mov	r1, r3
 801561c:	4808      	ldr	r0, [pc, #32]	@ (8015640 <netconn_close_shutdown+0x5c>)
 801561e:	f7ff fb33 	bl	8014c88 <netconn_apimsg>
 8015622:	4603      	mov	r3, r0
 8015624:	f887 302f 	strb.w	r3, [r7, #47]	@ 0x2f
  API_MSG_VAR_FREE(msg);

  return err;
 8015628:	f997 302f 	ldrsb.w	r3, [r7, #47]	@ 0x2f
}
 801562c:	4618      	mov	r0, r3
 801562e:	3730      	adds	r7, #48	@ 0x30
 8015630:	46bd      	mov	sp, r7
 8015632:	bd80      	pop	{r7, pc}
 8015634:	0802c718 	.word	0x0802c718
 8015638:	0802ca54 	.word	0x0802ca54
 801563c:	0802c770 	.word	0x0802c770
 8015640:	08016efd 	.word	0x08016efd

08015644 <netconn_err>:
 * @param conn the netconn to get the error from
 * @return and pending error or ERR_OK if no error was pending
 */
err_t
netconn_err(struct netconn *conn)
{
 8015644:	b580      	push	{r7, lr}
 8015646:	b084      	sub	sp, #16
 8015648:	af00      	add	r7, sp, #0
 801564a:	6078      	str	r0, [r7, #4]
  err_t err;
  SYS_ARCH_DECL_PROTECT(lev);
  if (conn == NULL) {
 801564c:	687b      	ldr	r3, [r7, #4]
 801564e:	2b00      	cmp	r3, #0
 8015650:	d101      	bne.n	8015656 <netconn_err+0x12>
    return ERR_OK;
 8015652:	2300      	movs	r3, #0
 8015654:	e00d      	b.n	8015672 <netconn_err+0x2e>
  }
  SYS_ARCH_PROTECT(lev);
 8015656:	f010 fcc3 	bl	8025fe0 <sys_arch_protect>
 801565a:	60f8      	str	r0, [r7, #12]
  err = conn->pending_err;
 801565c:	687b      	ldr	r3, [r7, #4]
 801565e:	7a1b      	ldrb	r3, [r3, #8]
 8015660:	72fb      	strb	r3, [r7, #11]
  conn->pending_err = ERR_OK;
 8015662:	687b      	ldr	r3, [r7, #4]
 8015664:	2200      	movs	r2, #0
 8015666:	721a      	strb	r2, [r3, #8]
  SYS_ARCH_UNPROTECT(lev);
 8015668:	68f8      	ldr	r0, [r7, #12]
 801566a:	f010 fcc7 	bl	8025ffc <sys_arch_unprotect>
  return err;
 801566e:	f997 300b 	ldrsb.w	r3, [r7, #11]
}
 8015672:	4618      	mov	r0, r3
 8015674:	3710      	adds	r7, #16
 8015676:	46bd      	mov	sp, r7
 8015678:	bd80      	pop	{r7, pc}
	...

0801567c <lwip_netconn_err_to_msg>:
const u8_t netconn_closed = 0;

/** Translate an error to a unique void* passed via an mbox */
static void *
lwip_netconn_err_to_msg(err_t err)
{
 801567c:	b580      	push	{r7, lr}
 801567e:	b082      	sub	sp, #8
 8015680:	af00      	add	r7, sp, #0
 8015682:	4603      	mov	r3, r0
 8015684:	71fb      	strb	r3, [r7, #7]
  switch (err) {
 8015686:	f997 3007 	ldrsb.w	r3, [r7, #7]
 801568a:	f113 0f0d 	cmn.w	r3, #13
 801568e:	d009      	beq.n	80156a4 <lwip_netconn_err_to_msg+0x28>
 8015690:	f113 0f0d 	cmn.w	r3, #13
 8015694:	dc0c      	bgt.n	80156b0 <lwip_netconn_err_to_msg+0x34>
 8015696:	f113 0f0f 	cmn.w	r3, #15
 801569a:	d007      	beq.n	80156ac <lwip_netconn_err_to_msg+0x30>
 801569c:	f113 0f0e 	cmn.w	r3, #14
 80156a0:	d002      	beq.n	80156a8 <lwip_netconn_err_to_msg+0x2c>
 80156a2:	e005      	b.n	80156b0 <lwip_netconn_err_to_msg+0x34>
    case ERR_ABRT:
      return LWIP_CONST_CAST(void *, &netconn_aborted);
 80156a4:	4b0a      	ldr	r3, [pc, #40]	@ (80156d0 <lwip_netconn_err_to_msg+0x54>)
 80156a6:	e00e      	b.n	80156c6 <lwip_netconn_err_to_msg+0x4a>
    case ERR_RST:
      return LWIP_CONST_CAST(void *, &netconn_reset);
 80156a8:	4b0a      	ldr	r3, [pc, #40]	@ (80156d4 <lwip_netconn_err_to_msg+0x58>)
 80156aa:	e00c      	b.n	80156c6 <lwip_netconn_err_to_msg+0x4a>
    case ERR_CLSD:
      return LWIP_CONST_CAST(void *, &netconn_closed);
 80156ac:	4b0a      	ldr	r3, [pc, #40]	@ (80156d8 <lwip_netconn_err_to_msg+0x5c>)
 80156ae:	e00a      	b.n	80156c6 <lwip_netconn_err_to_msg+0x4a>
    default:
      LWIP_ASSERT("unhandled error", err == ERR_OK);
 80156b0:	f997 3007 	ldrsb.w	r3, [r7, #7]
 80156b4:	2b00      	cmp	r3, #0
 80156b6:	d005      	beq.n	80156c4 <lwip_netconn_err_to_msg+0x48>
 80156b8:	4b08      	ldr	r3, [pc, #32]	@ (80156dc <lwip_netconn_err_to_msg+0x60>)
 80156ba:	227d      	movs	r2, #125	@ 0x7d
 80156bc:	4908      	ldr	r1, [pc, #32]	@ (80156e0 <lwip_netconn_err_to_msg+0x64>)
 80156be:	4809      	ldr	r0, [pc, #36]	@ (80156e4 <lwip_netconn_err_to_msg+0x68>)
 80156c0:	f013 ff24 	bl	802950c <iprintf>
      return NULL;
 80156c4:	2300      	movs	r3, #0
  }
}
 80156c6:	4618      	mov	r0, r3
 80156c8:	3708      	adds	r7, #8
 80156ca:	46bd      	mov	sp, r7
 80156cc:	bd80      	pop	{r7, pc}
 80156ce:	bf00      	nop
 80156d0:	08030608 	.word	0x08030608
 80156d4:	08030609 	.word	0x08030609
 80156d8:	0803060a 	.word	0x0803060a
 80156dc:	0802ca70 	.word	0x0802ca70
 80156e0:	0802caa4 	.word	0x0802caa4
 80156e4:	0802cab4 	.word	0x0802cab4

080156e8 <lwip_netconn_is_err_msg>:

int
lwip_netconn_is_err_msg(void *msg, err_t *err)
{
 80156e8:	b580      	push	{r7, lr}
 80156ea:	b082      	sub	sp, #8
 80156ec:	af00      	add	r7, sp, #0
 80156ee:	6078      	str	r0, [r7, #4]
 80156f0:	6039      	str	r1, [r7, #0]
  LWIP_ASSERT("err != NULL", err != NULL);
 80156f2:	683b      	ldr	r3, [r7, #0]
 80156f4:	2b00      	cmp	r3, #0
 80156f6:	d105      	bne.n	8015704 <lwip_netconn_is_err_msg+0x1c>
 80156f8:	4b12      	ldr	r3, [pc, #72]	@ (8015744 <lwip_netconn_is_err_msg+0x5c>)
 80156fa:	2285      	movs	r2, #133	@ 0x85
 80156fc:	4912      	ldr	r1, [pc, #72]	@ (8015748 <lwip_netconn_is_err_msg+0x60>)
 80156fe:	4813      	ldr	r0, [pc, #76]	@ (801574c <lwip_netconn_is_err_msg+0x64>)
 8015700:	f013 ff04 	bl	802950c <iprintf>

  if (msg == &netconn_aborted) {
 8015704:	687b      	ldr	r3, [r7, #4]
 8015706:	4a12      	ldr	r2, [pc, #72]	@ (8015750 <lwip_netconn_is_err_msg+0x68>)
 8015708:	4293      	cmp	r3, r2
 801570a:	d104      	bne.n	8015716 <lwip_netconn_is_err_msg+0x2e>
    *err = ERR_ABRT;
 801570c:	683b      	ldr	r3, [r7, #0]
 801570e:	22f3      	movs	r2, #243	@ 0xf3
 8015710:	701a      	strb	r2, [r3, #0]
    return 1;
 8015712:	2301      	movs	r3, #1
 8015714:	e012      	b.n	801573c <lwip_netconn_is_err_msg+0x54>
  } else if (msg == &netconn_reset) {
 8015716:	687b      	ldr	r3, [r7, #4]
 8015718:	4a0e      	ldr	r2, [pc, #56]	@ (8015754 <lwip_netconn_is_err_msg+0x6c>)
 801571a:	4293      	cmp	r3, r2
 801571c:	d104      	bne.n	8015728 <lwip_netconn_is_err_msg+0x40>
    *err = ERR_RST;
 801571e:	683b      	ldr	r3, [r7, #0]
 8015720:	22f2      	movs	r2, #242	@ 0xf2
 8015722:	701a      	strb	r2, [r3, #0]
    return 1;
 8015724:	2301      	movs	r3, #1
 8015726:	e009      	b.n	801573c <lwip_netconn_is_err_msg+0x54>
  } else if (msg == &netconn_closed) {
 8015728:	687b      	ldr	r3, [r7, #4]
 801572a:	4a0b      	ldr	r2, [pc, #44]	@ (8015758 <lwip_netconn_is_err_msg+0x70>)
 801572c:	4293      	cmp	r3, r2
 801572e:	d104      	bne.n	801573a <lwip_netconn_is_err_msg+0x52>
    *err = ERR_CLSD;
 8015730:	683b      	ldr	r3, [r7, #0]
 8015732:	22f1      	movs	r2, #241	@ 0xf1
 8015734:	701a      	strb	r2, [r3, #0]
    return 1;
 8015736:	2301      	movs	r3, #1
 8015738:	e000      	b.n	801573c <lwip_netconn_is_err_msg+0x54>
  }
  return 0;
 801573a:	2300      	movs	r3, #0
}
 801573c:	4618      	mov	r0, r3
 801573e:	3708      	adds	r7, #8
 8015740:	46bd      	mov	sp, r7
 8015742:	bd80      	pop	{r7, pc}
 8015744:	0802ca70 	.word	0x0802ca70
 8015748:	0802cadc 	.word	0x0802cadc
 801574c:	0802cab4 	.word	0x0802cab4
 8015750:	08030608 	.word	0x08030608
 8015754:	08030609 	.word	0x08030609
 8015758:	0803060a 	.word	0x0803060a

0801575c <recv_udp>:
 * @see udp.h (struct udp_pcb.recv) for parameters
 */
static void
recv_udp(void *arg, struct udp_pcb *pcb, struct pbuf *p,
         const ip_addr_t *addr, u16_t port)
{
 801575c:	b580      	push	{r7, lr}
 801575e:	b08a      	sub	sp, #40	@ 0x28
 8015760:	af00      	add	r7, sp, #0
 8015762:	60f8      	str	r0, [r7, #12]
 8015764:	60b9      	str	r1, [r7, #8]
 8015766:	607a      	str	r2, [r7, #4]
 8015768:	603b      	str	r3, [r7, #0]
#if LWIP_SO_RCVBUF
  int recv_avail;
#endif /* LWIP_SO_RCVBUF */

  LWIP_UNUSED_ARG(pcb); /* only used for asserts... */
  LWIP_ASSERT("recv_udp must have a pcb argument", pcb != NULL);
 801576a:	68bb      	ldr	r3, [r7, #8]
 801576c:	2b00      	cmp	r3, #0
 801576e:	d105      	bne.n	801577c <recv_udp+0x20>
 8015770:	4b43      	ldr	r3, [pc, #268]	@ (8015880 <recv_udp+0x124>)
 8015772:	22e5      	movs	r2, #229	@ 0xe5
 8015774:	4943      	ldr	r1, [pc, #268]	@ (8015884 <recv_udp+0x128>)
 8015776:	4844      	ldr	r0, [pc, #272]	@ (8015888 <recv_udp+0x12c>)
 8015778:	f013 fec8 	bl	802950c <iprintf>
  LWIP_ASSERT("recv_udp must have an argument", arg != NULL);
 801577c:	68fb      	ldr	r3, [r7, #12]
 801577e:	2b00      	cmp	r3, #0
 8015780:	d105      	bne.n	801578e <recv_udp+0x32>
 8015782:	4b3f      	ldr	r3, [pc, #252]	@ (8015880 <recv_udp+0x124>)
 8015784:	22e6      	movs	r2, #230	@ 0xe6
 8015786:	4941      	ldr	r1, [pc, #260]	@ (801588c <recv_udp+0x130>)
 8015788:	483f      	ldr	r0, [pc, #252]	@ (8015888 <recv_udp+0x12c>)
 801578a:	f013 febf 	bl	802950c <iprintf>
  conn = (struct netconn *)arg;
 801578e:	68fb      	ldr	r3, [r7, #12]
 8015790:	627b      	str	r3, [r7, #36]	@ 0x24

  if (conn == NULL) {
 8015792:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8015794:	2b00      	cmp	r3, #0
 8015796:	d103      	bne.n	80157a0 <recv_udp+0x44>
    pbuf_free(p);
 8015798:	6878      	ldr	r0, [r7, #4]
 801579a:	f004 fc3f 	bl	801a01c <pbuf_free>
    return;
 801579e:	e06b      	b.n	8015878 <recv_udp+0x11c>
  }

  LWIP_ASSERT("recv_udp: recv for wrong pcb!", conn->pcb.udp == pcb);
 80157a0:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80157a2:	685b      	ldr	r3, [r3, #4]
 80157a4:	68ba      	ldr	r2, [r7, #8]
 80157a6:	429a      	cmp	r2, r3
 80157a8:	d005      	beq.n	80157b6 <recv_udp+0x5a>
 80157aa:	4b35      	ldr	r3, [pc, #212]	@ (8015880 <recv_udp+0x124>)
 80157ac:	22ee      	movs	r2, #238	@ 0xee
 80157ae:	4938      	ldr	r1, [pc, #224]	@ (8015890 <recv_udp+0x134>)
 80157b0:	4835      	ldr	r0, [pc, #212]	@ (8015888 <recv_udp+0x12c>)
 80157b2:	f013 feab 	bl	802950c <iprintf>

#if LWIP_SO_RCVBUF
  SYS_ARCH_GET(conn->recv_avail, recv_avail);
 80157b6:	f010 fc13 	bl	8025fe0 <sys_arch_protect>
 80157ba:	6238      	str	r0, [r7, #32]
 80157bc:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80157be:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 80157c0:	61fb      	str	r3, [r7, #28]
 80157c2:	6a38      	ldr	r0, [r7, #32]
 80157c4:	f010 fc1a 	bl	8025ffc <sys_arch_unprotect>
  if (!NETCONN_MBOX_VALID(conn, &conn->recvmbox) ||
 80157c8:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80157ca:	3310      	adds	r3, #16
 80157cc:	4618      	mov	r0, r3
 80157ce:	f010 fafd 	bl	8025dcc <sys_mbox_valid>
 80157d2:	4603      	mov	r3, r0
 80157d4:	2b00      	cmp	r3, #0
 80157d6:	d008      	beq.n	80157ea <recv_udp+0x8e>
      ((recv_avail + (int)(p->tot_len)) > conn->recv_bufsize)) {
 80157d8:	687b      	ldr	r3, [r7, #4]
 80157da:	891b      	ldrh	r3, [r3, #8]
 80157dc:	461a      	mov	r2, r3
 80157de:	69fb      	ldr	r3, [r7, #28]
 80157e0:	441a      	add	r2, r3
 80157e2:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80157e4:	6a1b      	ldr	r3, [r3, #32]
  if (!NETCONN_MBOX_VALID(conn, &conn->recvmbox) ||
 80157e6:	429a      	cmp	r2, r3
 80157e8:	dd03      	ble.n	80157f2 <recv_udp+0x96>
#else  /* LWIP_SO_RCVBUF */
  if (!NETCONN_MBOX_VALID(conn, &conn->recvmbox)) {
#endif /* LWIP_SO_RCVBUF */
    pbuf_free(p);
 80157ea:	6878      	ldr	r0, [r7, #4]
 80157ec:	f004 fc16 	bl	801a01c <pbuf_free>
    return;
 80157f0:	e042      	b.n	8015878 <recv_udp+0x11c>
  }

  buf = (struct netbuf *)memp_malloc(MEMP_NETBUF);
 80157f2:	2006      	movs	r0, #6
 80157f4:	f003 fcae 	bl	8019154 <memp_malloc>
 80157f8:	61b8      	str	r0, [r7, #24]
  if (buf == NULL) {
 80157fa:	69bb      	ldr	r3, [r7, #24]
 80157fc:	2b00      	cmp	r3, #0
 80157fe:	d103      	bne.n	8015808 <recv_udp+0xac>
    pbuf_free(p);
 8015800:	6878      	ldr	r0, [r7, #4]
 8015802:	f004 fc0b 	bl	801a01c <pbuf_free>
    return;
 8015806:	e037      	b.n	8015878 <recv_udp+0x11c>
  } else {
    buf->p = p;
 8015808:	69bb      	ldr	r3, [r7, #24]
 801580a:	687a      	ldr	r2, [r7, #4]
 801580c:	601a      	str	r2, [r3, #0]
    buf->ptr = p;
 801580e:	69bb      	ldr	r3, [r7, #24]
 8015810:	687a      	ldr	r2, [r7, #4]
 8015812:	605a      	str	r2, [r3, #4]
    ip_addr_set(&buf->addr, addr);
 8015814:	683b      	ldr	r3, [r7, #0]
 8015816:	2b00      	cmp	r3, #0
 8015818:	d002      	beq.n	8015820 <recv_udp+0xc4>
 801581a:	683b      	ldr	r3, [r7, #0]
 801581c:	681b      	ldr	r3, [r3, #0]
 801581e:	e000      	b.n	8015822 <recv_udp+0xc6>
 8015820:	2300      	movs	r3, #0
 8015822:	69ba      	ldr	r2, [r7, #24]
 8015824:	6093      	str	r3, [r2, #8]
    buf->port = port;
 8015826:	69bb      	ldr	r3, [r7, #24]
 8015828:	8e3a      	ldrh	r2, [r7, #48]	@ 0x30
 801582a:	819a      	strh	r2, [r3, #12]
      buf->toport_chksum = udphdr->dest;
    }
#endif /* LWIP_NETBUF_RECVINFO */
  }

  len = p->tot_len;
 801582c:	687b      	ldr	r3, [r7, #4]
 801582e:	891b      	ldrh	r3, [r3, #8]
 8015830:	82fb      	strh	r3, [r7, #22]
  if (sys_mbox_trypost(&conn->recvmbox, buf) != ERR_OK) {
 8015832:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8015834:	3310      	adds	r3, #16
 8015836:	69b9      	ldr	r1, [r7, #24]
 8015838:	4618      	mov	r0, r3
 801583a:	f010 fa65 	bl	8025d08 <sys_mbox_trypost>
 801583e:	4603      	mov	r3, r0
 8015840:	2b00      	cmp	r3, #0
 8015842:	d003      	beq.n	801584c <recv_udp+0xf0>
    netbuf_delete(buf);
 8015844:	69b8      	ldr	r0, [r7, #24]
 8015846:	f001 fbff 	bl	8017048 <netbuf_delete>
    return;
 801584a:	e015      	b.n	8015878 <recv_udp+0x11c>
  } else {
#if LWIP_SO_RCVBUF
    SYS_ARCH_INC(conn->recv_avail, len);
 801584c:	f010 fbc8 	bl	8025fe0 <sys_arch_protect>
 8015850:	6138      	str	r0, [r7, #16]
 8015852:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8015854:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 8015856:	8afb      	ldrh	r3, [r7, #22]
 8015858:	441a      	add	r2, r3
 801585a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801585c:	625a      	str	r2, [r3, #36]	@ 0x24
 801585e:	6938      	ldr	r0, [r7, #16]
 8015860:	f010 fbcc 	bl	8025ffc <sys_arch_unprotect>
#endif /* LWIP_SO_RCVBUF */
    /* Register event with callback */
    API_EVENT(conn, NETCONN_EVT_RCVPLUS, len);
 8015864:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8015866:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8015868:	2b00      	cmp	r3, #0
 801586a:	d005      	beq.n	8015878 <recv_udp+0x11c>
 801586c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801586e:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8015870:	8afa      	ldrh	r2, [r7, #22]
 8015872:	2100      	movs	r1, #0
 8015874:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 8015876:	4798      	blx	r3
  }
}
 8015878:	3728      	adds	r7, #40	@ 0x28
 801587a:	46bd      	mov	sp, r7
 801587c:	bd80      	pop	{r7, pc}
 801587e:	bf00      	nop
 8015880:	0802ca70 	.word	0x0802ca70
 8015884:	0802cae8 	.word	0x0802cae8
 8015888:	0802cab4 	.word	0x0802cab4
 801588c:	0802cb0c 	.word	0x0802cb0c
 8015890:	0802cb2c 	.word	0x0802cb2c

08015894 <recv_tcp>:
 *
 * @see tcp.h (struct tcp_pcb.recv) for parameters and return value
 */
static err_t
recv_tcp(void *arg, struct tcp_pcb *pcb, struct pbuf *p, err_t err)
{
 8015894:	b580      	push	{r7, lr}
 8015896:	b088      	sub	sp, #32
 8015898:	af00      	add	r7, sp, #0
 801589a:	60f8      	str	r0, [r7, #12]
 801589c:	60b9      	str	r1, [r7, #8]
 801589e:	607a      	str	r2, [r7, #4]
 80158a0:	70fb      	strb	r3, [r7, #3]
  struct netconn *conn;
  u16_t len;
  void *msg;

  LWIP_UNUSED_ARG(pcb);
  LWIP_ASSERT("recv_tcp must have a pcb argument", pcb != NULL);
 80158a2:	68bb      	ldr	r3, [r7, #8]
 80158a4:	2b00      	cmp	r3, #0
 80158a6:	d106      	bne.n	80158b6 <recv_tcp+0x22>
 80158a8:	4b3c      	ldr	r3, [pc, #240]	@ (801599c <recv_tcp+0x108>)
 80158aa:	f44f 7296 	mov.w	r2, #300	@ 0x12c
 80158ae:	493c      	ldr	r1, [pc, #240]	@ (80159a0 <recv_tcp+0x10c>)
 80158b0:	483c      	ldr	r0, [pc, #240]	@ (80159a4 <recv_tcp+0x110>)
 80158b2:	f013 fe2b 	bl	802950c <iprintf>
  LWIP_ASSERT("recv_tcp must have an argument", arg != NULL);
 80158b6:	68fb      	ldr	r3, [r7, #12]
 80158b8:	2b00      	cmp	r3, #0
 80158ba:	d106      	bne.n	80158ca <recv_tcp+0x36>
 80158bc:	4b37      	ldr	r3, [pc, #220]	@ (801599c <recv_tcp+0x108>)
 80158be:	f240 122d 	movw	r2, #301	@ 0x12d
 80158c2:	4939      	ldr	r1, [pc, #228]	@ (80159a8 <recv_tcp+0x114>)
 80158c4:	4837      	ldr	r0, [pc, #220]	@ (80159a4 <recv_tcp+0x110>)
 80158c6:	f013 fe21 	bl	802950c <iprintf>
  LWIP_ASSERT("err != ERR_OK unhandled", err == ERR_OK);
 80158ca:	f997 3003 	ldrsb.w	r3, [r7, #3]
 80158ce:	2b00      	cmp	r3, #0
 80158d0:	d006      	beq.n	80158e0 <recv_tcp+0x4c>
 80158d2:	4b32      	ldr	r3, [pc, #200]	@ (801599c <recv_tcp+0x108>)
 80158d4:	f44f 7297 	mov.w	r2, #302	@ 0x12e
 80158d8:	4934      	ldr	r1, [pc, #208]	@ (80159ac <recv_tcp+0x118>)
 80158da:	4832      	ldr	r0, [pc, #200]	@ (80159a4 <recv_tcp+0x110>)
 80158dc:	f013 fe16 	bl	802950c <iprintf>
  LWIP_UNUSED_ARG(err); /* for LWIP_NOASSERT */
  conn = (struct netconn *)arg;
 80158e0:	68fb      	ldr	r3, [r7, #12]
 80158e2:	617b      	str	r3, [r7, #20]

  if (conn == NULL) {
 80158e4:	697b      	ldr	r3, [r7, #20]
 80158e6:	2b00      	cmp	r3, #0
 80158e8:	d102      	bne.n	80158f0 <recv_tcp+0x5c>
    return ERR_VAL;
 80158ea:	f06f 0305 	mvn.w	r3, #5
 80158ee:	e051      	b.n	8015994 <recv_tcp+0x100>
  }
  LWIP_ASSERT("recv_tcp: recv for wrong pcb!", conn->pcb.tcp == pcb);
 80158f0:	697b      	ldr	r3, [r7, #20]
 80158f2:	685b      	ldr	r3, [r3, #4]
 80158f4:	68ba      	ldr	r2, [r7, #8]
 80158f6:	429a      	cmp	r2, r3
 80158f8:	d006      	beq.n	8015908 <recv_tcp+0x74>
 80158fa:	4b28      	ldr	r3, [pc, #160]	@ (801599c <recv_tcp+0x108>)
 80158fc:	f240 1235 	movw	r2, #309	@ 0x135
 8015900:	492b      	ldr	r1, [pc, #172]	@ (80159b0 <recv_tcp+0x11c>)
 8015902:	4828      	ldr	r0, [pc, #160]	@ (80159a4 <recv_tcp+0x110>)
 8015904:	f013 fe02 	bl	802950c <iprintf>

  if (!NETCONN_MBOX_VALID(conn, &conn->recvmbox)) {
 8015908:	697b      	ldr	r3, [r7, #20]
 801590a:	3310      	adds	r3, #16
 801590c:	4618      	mov	r0, r3
 801590e:	f010 fa5d 	bl	8025dcc <sys_mbox_valid>
 8015912:	4603      	mov	r3, r0
 8015914:	2b00      	cmp	r3, #0
 8015916:	d10d      	bne.n	8015934 <recv_tcp+0xa0>
    /* recvmbox already deleted */
    if (p != NULL) {
 8015918:	687b      	ldr	r3, [r7, #4]
 801591a:	2b00      	cmp	r3, #0
 801591c:	d008      	beq.n	8015930 <recv_tcp+0x9c>
      tcp_recved(pcb, p->tot_len);
 801591e:	687b      	ldr	r3, [r7, #4]
 8015920:	891b      	ldrh	r3, [r3, #8]
 8015922:	4619      	mov	r1, r3
 8015924:	68b8      	ldr	r0, [r7, #8]
 8015926:	f005 f9e5 	bl	801acf4 <tcp_recved>
      pbuf_free(p);
 801592a:	6878      	ldr	r0, [r7, #4]
 801592c:	f004 fb76 	bl	801a01c <pbuf_free>
    }
    return ERR_OK;
 8015930:	2300      	movs	r3, #0
 8015932:	e02f      	b.n	8015994 <recv_tcp+0x100>
  }
  /* Unlike for UDP or RAW pcbs, don't check for available space
     using recv_avail since that could break the connection
     (data is already ACKed) */

  if (p != NULL) {
 8015934:	687b      	ldr	r3, [r7, #4]
 8015936:	2b00      	cmp	r3, #0
 8015938:	d005      	beq.n	8015946 <recv_tcp+0xb2>
    msg = p;
 801593a:	687b      	ldr	r3, [r7, #4]
 801593c:	61bb      	str	r3, [r7, #24]
    len = p->tot_len;
 801593e:	687b      	ldr	r3, [r7, #4]
 8015940:	891b      	ldrh	r3, [r3, #8]
 8015942:	83fb      	strh	r3, [r7, #30]
 8015944:	e003      	b.n	801594e <recv_tcp+0xba>
  } else {
    msg = LWIP_CONST_CAST(void *, &netconn_closed);
 8015946:	4b1b      	ldr	r3, [pc, #108]	@ (80159b4 <recv_tcp+0x120>)
 8015948:	61bb      	str	r3, [r7, #24]
    len = 0;
 801594a:	2300      	movs	r3, #0
 801594c:	83fb      	strh	r3, [r7, #30]
  }

  if (sys_mbox_trypost(&conn->recvmbox, msg) != ERR_OK) {
 801594e:	697b      	ldr	r3, [r7, #20]
 8015950:	3310      	adds	r3, #16
 8015952:	69b9      	ldr	r1, [r7, #24]
 8015954:	4618      	mov	r0, r3
 8015956:	f010 f9d7 	bl	8025d08 <sys_mbox_trypost>
 801595a:	4603      	mov	r3, r0
 801595c:	2b00      	cmp	r3, #0
 801595e:	d002      	beq.n	8015966 <recv_tcp+0xd2>
    /* don't deallocate p: it is presented to us later again from tcp_fasttmr! */
    return ERR_MEM;
 8015960:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8015964:	e016      	b.n	8015994 <recv_tcp+0x100>
  } else {
#if LWIP_SO_RCVBUF
    SYS_ARCH_INC(conn->recv_avail, len);
 8015966:	f010 fb3b 	bl	8025fe0 <sys_arch_protect>
 801596a:	6138      	str	r0, [r7, #16]
 801596c:	697b      	ldr	r3, [r7, #20]
 801596e:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 8015970:	8bfb      	ldrh	r3, [r7, #30]
 8015972:	441a      	add	r2, r3
 8015974:	697b      	ldr	r3, [r7, #20]
 8015976:	625a      	str	r2, [r3, #36]	@ 0x24
 8015978:	6938      	ldr	r0, [r7, #16]
 801597a:	f010 fb3f 	bl	8025ffc <sys_arch_unprotect>
#endif /* LWIP_SO_RCVBUF */
    /* Register event with callback */
    API_EVENT(conn, NETCONN_EVT_RCVPLUS, len);
 801597e:	697b      	ldr	r3, [r7, #20]
 8015980:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8015982:	2b00      	cmp	r3, #0
 8015984:	d005      	beq.n	8015992 <recv_tcp+0xfe>
 8015986:	697b      	ldr	r3, [r7, #20]
 8015988:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 801598a:	8bfa      	ldrh	r2, [r7, #30]
 801598c:	2100      	movs	r1, #0
 801598e:	6978      	ldr	r0, [r7, #20]
 8015990:	4798      	blx	r3
  }

  return ERR_OK;
 8015992:	2300      	movs	r3, #0
}
 8015994:	4618      	mov	r0, r3
 8015996:	3720      	adds	r7, #32
 8015998:	46bd      	mov	sp, r7
 801599a:	bd80      	pop	{r7, pc}
 801599c:	0802ca70 	.word	0x0802ca70
 80159a0:	0802cb4c 	.word	0x0802cb4c
 80159a4:	0802cab4 	.word	0x0802cab4
 80159a8:	0802cb70 	.word	0x0802cb70
 80159ac:	0802cb90 	.word	0x0802cb90
 80159b0:	0802cba8 	.word	0x0802cba8
 80159b4:	0803060a 	.word	0x0803060a

080159b8 <poll_tcp>:
 *
 * @see tcp.h (struct tcp_pcb.poll) for parameters and return value
 */
static err_t
poll_tcp(void *arg, struct tcp_pcb *pcb)
{
 80159b8:	b580      	push	{r7, lr}
 80159ba:	b084      	sub	sp, #16
 80159bc:	af00      	add	r7, sp, #0
 80159be:	6078      	str	r0, [r7, #4]
 80159c0:	6039      	str	r1, [r7, #0]
  struct netconn *conn = (struct netconn *)arg;
 80159c2:	687b      	ldr	r3, [r7, #4]
 80159c4:	60fb      	str	r3, [r7, #12]

  LWIP_UNUSED_ARG(pcb);
  LWIP_ASSERT("conn != NULL", (conn != NULL));
 80159c6:	68fb      	ldr	r3, [r7, #12]
 80159c8:	2b00      	cmp	r3, #0
 80159ca:	d106      	bne.n	80159da <poll_tcp+0x22>
 80159cc:	4b2b      	ldr	r3, [pc, #172]	@ (8015a7c <poll_tcp+0xc4>)
 80159ce:	f44f 72b5 	mov.w	r2, #362	@ 0x16a
 80159d2:	492b      	ldr	r1, [pc, #172]	@ (8015a80 <poll_tcp+0xc8>)
 80159d4:	482b      	ldr	r0, [pc, #172]	@ (8015a84 <poll_tcp+0xcc>)
 80159d6:	f013 fd99 	bl	802950c <iprintf>

  if (conn->state == NETCONN_WRITE) {
 80159da:	68fb      	ldr	r3, [r7, #12]
 80159dc:	785b      	ldrb	r3, [r3, #1]
 80159de:	2b01      	cmp	r3, #1
 80159e0:	d104      	bne.n	80159ec <poll_tcp+0x34>
    lwip_netconn_do_writemore(conn  WRITE_DELAYED);
 80159e2:	2101      	movs	r1, #1
 80159e4:	68f8      	ldr	r0, [r7, #12]
 80159e6:	f000 ffab 	bl	8016940 <lwip_netconn_do_writemore>
 80159ea:	e016      	b.n	8015a1a <poll_tcp+0x62>
  } else if (conn->state == NETCONN_CLOSE) {
 80159ec:	68fb      	ldr	r3, [r7, #12]
 80159ee:	785b      	ldrb	r3, [r3, #1]
 80159f0:	2b04      	cmp	r3, #4
 80159f2:	d112      	bne.n	8015a1a <poll_tcp+0x62>
#if !LWIP_SO_SNDTIMEO && !LWIP_SO_LINGER
    if (conn->current_msg && conn->current_msg->msg.sd.polls_left) {
 80159f4:	68fb      	ldr	r3, [r7, #12]
 80159f6:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80159f8:	2b00      	cmp	r3, #0
 80159fa:	d00a      	beq.n	8015a12 <poll_tcp+0x5a>
 80159fc:	68fb      	ldr	r3, [r7, #12]
 80159fe:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8015a00:	7a5b      	ldrb	r3, [r3, #9]
 8015a02:	2b00      	cmp	r3, #0
 8015a04:	d005      	beq.n	8015a12 <poll_tcp+0x5a>
      conn->current_msg->msg.sd.polls_left--;
 8015a06:	68fb      	ldr	r3, [r7, #12]
 8015a08:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8015a0a:	7a5a      	ldrb	r2, [r3, #9]
 8015a0c:	3a01      	subs	r2, #1
 8015a0e:	b2d2      	uxtb	r2, r2
 8015a10:	725a      	strb	r2, [r3, #9]
    }
#endif /* !LWIP_SO_SNDTIMEO && !LWIP_SO_LINGER */
    lwip_netconn_do_close_internal(conn  WRITE_DELAYED);
 8015a12:	2101      	movs	r1, #1
 8015a14:	68f8      	ldr	r0, [r7, #12]
 8015a16:	f000 fb53 	bl	80160c0 <lwip_netconn_do_close_internal>
  }
  /* @todo: implement connect timeout here? */

  /* Did a nonblocking write fail before? Then check available write-space. */
  if (conn->flags & NETCONN_FLAG_CHECK_WRITESPACE) {
 8015a1a:	68fb      	ldr	r3, [r7, #12]
 8015a1c:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8015a20:	f003 0310 	and.w	r3, r3, #16
 8015a24:	2b00      	cmp	r3, #0
 8015a26:	d024      	beq.n	8015a72 <poll_tcp+0xba>
    /* If the queued byte- or pbuf-count drops below the configured low-water limit,
       let select mark this pcb as writable again. */
    if ((conn->pcb.tcp != NULL) && (tcp_sndbuf(conn->pcb.tcp) > TCP_SNDLOWAT) &&
 8015a28:	68fb      	ldr	r3, [r7, #12]
 8015a2a:	685b      	ldr	r3, [r3, #4]
 8015a2c:	2b00      	cmp	r3, #0
 8015a2e:	d020      	beq.n	8015a72 <poll_tcp+0xba>
 8015a30:	68fb      	ldr	r3, [r7, #12]
 8015a32:	685b      	ldr	r3, [r3, #4]
 8015a34:	f8b3 3064 	ldrh.w	r3, [r3, #100]	@ 0x64
 8015a38:	f640 3269 	movw	r2, #2921	@ 0xb69
 8015a3c:	4293      	cmp	r3, r2
 8015a3e:	d918      	bls.n	8015a72 <poll_tcp+0xba>
        (tcp_sndqueuelen(conn->pcb.tcp) < TCP_SNDQUEUELOWAT)) {
 8015a40:	68fb      	ldr	r3, [r7, #12]
 8015a42:	685b      	ldr	r3, [r3, #4]
 8015a44:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
    if ((conn->pcb.tcp != NULL) && (tcp_sndbuf(conn->pcb.tcp) > TCP_SNDLOWAT) &&
 8015a48:	2b07      	cmp	r3, #7
 8015a4a:	d812      	bhi.n	8015a72 <poll_tcp+0xba>
      netconn_clear_flags(conn, NETCONN_FLAG_CHECK_WRITESPACE);
 8015a4c:	68fb      	ldr	r3, [r7, #12]
 8015a4e:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8015a52:	f023 0310 	bic.w	r3, r3, #16
 8015a56:	b2da      	uxtb	r2, r3
 8015a58:	68fb      	ldr	r3, [r7, #12]
 8015a5a:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
      API_EVENT(conn, NETCONN_EVT_SENDPLUS, 0);
 8015a5e:	68fb      	ldr	r3, [r7, #12]
 8015a60:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8015a62:	2b00      	cmp	r3, #0
 8015a64:	d005      	beq.n	8015a72 <poll_tcp+0xba>
 8015a66:	68fb      	ldr	r3, [r7, #12]
 8015a68:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8015a6a:	2200      	movs	r2, #0
 8015a6c:	2102      	movs	r1, #2
 8015a6e:	68f8      	ldr	r0, [r7, #12]
 8015a70:	4798      	blx	r3
    }
  }

  return ERR_OK;
 8015a72:	2300      	movs	r3, #0
}
 8015a74:	4618      	mov	r0, r3
 8015a76:	3710      	adds	r7, #16
 8015a78:	46bd      	mov	sp, r7
 8015a7a:	bd80      	pop	{r7, pc}
 8015a7c:	0802ca70 	.word	0x0802ca70
 8015a80:	0802cbc8 	.word	0x0802cbc8
 8015a84:	0802cab4 	.word	0x0802cab4

08015a88 <sent_tcp>:
 *
 * @see tcp.h (struct tcp_pcb.sent) for parameters and return value
 */
static err_t
sent_tcp(void *arg, struct tcp_pcb *pcb, u16_t len)
{
 8015a88:	b580      	push	{r7, lr}
 8015a8a:	b086      	sub	sp, #24
 8015a8c:	af00      	add	r7, sp, #0
 8015a8e:	60f8      	str	r0, [r7, #12]
 8015a90:	60b9      	str	r1, [r7, #8]
 8015a92:	4613      	mov	r3, r2
 8015a94:	80fb      	strh	r3, [r7, #6]
  struct netconn *conn = (struct netconn *)arg;
 8015a96:	68fb      	ldr	r3, [r7, #12]
 8015a98:	617b      	str	r3, [r7, #20]

  LWIP_UNUSED_ARG(pcb);
  LWIP_ASSERT("conn != NULL", (conn != NULL));
 8015a9a:	697b      	ldr	r3, [r7, #20]
 8015a9c:	2b00      	cmp	r3, #0
 8015a9e:	d106      	bne.n	8015aae <sent_tcp+0x26>
 8015aa0:	4b22      	ldr	r3, [pc, #136]	@ (8015b2c <sent_tcp+0xa4>)
 8015aa2:	f240 1293 	movw	r2, #403	@ 0x193
 8015aa6:	4922      	ldr	r1, [pc, #136]	@ (8015b30 <sent_tcp+0xa8>)
 8015aa8:	4822      	ldr	r0, [pc, #136]	@ (8015b34 <sent_tcp+0xac>)
 8015aaa:	f013 fd2f 	bl	802950c <iprintf>

  if (conn) {
 8015aae:	697b      	ldr	r3, [r7, #20]
 8015ab0:	2b00      	cmp	r3, #0
 8015ab2:	d035      	beq.n	8015b20 <sent_tcp+0x98>
    if (conn->state == NETCONN_WRITE) {
 8015ab4:	697b      	ldr	r3, [r7, #20]
 8015ab6:	785b      	ldrb	r3, [r3, #1]
 8015ab8:	2b01      	cmp	r3, #1
 8015aba:	d104      	bne.n	8015ac6 <sent_tcp+0x3e>
      lwip_netconn_do_writemore(conn  WRITE_DELAYED);
 8015abc:	2101      	movs	r1, #1
 8015abe:	6978      	ldr	r0, [r7, #20]
 8015ac0:	f000 ff3e 	bl	8016940 <lwip_netconn_do_writemore>
 8015ac4:	e007      	b.n	8015ad6 <sent_tcp+0x4e>
    } else if (conn->state == NETCONN_CLOSE) {
 8015ac6:	697b      	ldr	r3, [r7, #20]
 8015ac8:	785b      	ldrb	r3, [r3, #1]
 8015aca:	2b04      	cmp	r3, #4
 8015acc:	d103      	bne.n	8015ad6 <sent_tcp+0x4e>
      lwip_netconn_do_close_internal(conn  WRITE_DELAYED);
 8015ace:	2101      	movs	r1, #1
 8015ad0:	6978      	ldr	r0, [r7, #20]
 8015ad2:	f000 faf5 	bl	80160c0 <lwip_netconn_do_close_internal>
    }

    /* If the queued byte- or pbuf-count drops below the configured low-water limit,
       let select mark this pcb as writable again. */
    if ((conn->pcb.tcp != NULL) && (tcp_sndbuf(conn->pcb.tcp) > TCP_SNDLOWAT) &&
 8015ad6:	697b      	ldr	r3, [r7, #20]
 8015ad8:	685b      	ldr	r3, [r3, #4]
 8015ada:	2b00      	cmp	r3, #0
 8015adc:	d020      	beq.n	8015b20 <sent_tcp+0x98>
 8015ade:	697b      	ldr	r3, [r7, #20]
 8015ae0:	685b      	ldr	r3, [r3, #4]
 8015ae2:	f8b3 3064 	ldrh.w	r3, [r3, #100]	@ 0x64
 8015ae6:	f640 3269 	movw	r2, #2921	@ 0xb69
 8015aea:	4293      	cmp	r3, r2
 8015aec:	d918      	bls.n	8015b20 <sent_tcp+0x98>
        (tcp_sndqueuelen(conn->pcb.tcp) < TCP_SNDQUEUELOWAT)) {
 8015aee:	697b      	ldr	r3, [r7, #20]
 8015af0:	685b      	ldr	r3, [r3, #4]
 8015af2:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
    if ((conn->pcb.tcp != NULL) && (tcp_sndbuf(conn->pcb.tcp) > TCP_SNDLOWAT) &&
 8015af6:	2b07      	cmp	r3, #7
 8015af8:	d812      	bhi.n	8015b20 <sent_tcp+0x98>
      netconn_clear_flags(conn, NETCONN_FLAG_CHECK_WRITESPACE);
 8015afa:	697b      	ldr	r3, [r7, #20]
 8015afc:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8015b00:	f023 0310 	bic.w	r3, r3, #16
 8015b04:	b2da      	uxtb	r2, r3
 8015b06:	697b      	ldr	r3, [r7, #20]
 8015b08:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
      API_EVENT(conn, NETCONN_EVT_SENDPLUS, len);
 8015b0c:	697b      	ldr	r3, [r7, #20]
 8015b0e:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8015b10:	2b00      	cmp	r3, #0
 8015b12:	d005      	beq.n	8015b20 <sent_tcp+0x98>
 8015b14:	697b      	ldr	r3, [r7, #20]
 8015b16:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8015b18:	88fa      	ldrh	r2, [r7, #6]
 8015b1a:	2102      	movs	r1, #2
 8015b1c:	6978      	ldr	r0, [r7, #20]
 8015b1e:	4798      	blx	r3
    }
  }

  return ERR_OK;
 8015b20:	2300      	movs	r3, #0
}
 8015b22:	4618      	mov	r0, r3
 8015b24:	3718      	adds	r7, #24
 8015b26:	46bd      	mov	sp, r7
 8015b28:	bd80      	pop	{r7, pc}
 8015b2a:	bf00      	nop
 8015b2c:	0802ca70 	.word	0x0802ca70
 8015b30:	0802cbc8 	.word	0x0802cbc8
 8015b34:	0802cab4 	.word	0x0802cab4

08015b38 <err_tcp>:
 *
 * @see tcp.h (struct tcp_pcb.err) for parameters
 */
static void
err_tcp(void *arg, err_t err)
{
 8015b38:	b580      	push	{r7, lr}
 8015b3a:	b088      	sub	sp, #32
 8015b3c:	af00      	add	r7, sp, #0
 8015b3e:	6078      	str	r0, [r7, #4]
 8015b40:	460b      	mov	r3, r1
 8015b42:	70fb      	strb	r3, [r7, #3]
  struct netconn *conn;
  enum netconn_state old_state;
  void *mbox_msg;
  SYS_ARCH_DECL_PROTECT(lev);

  conn = (struct netconn *)arg;
 8015b44:	687b      	ldr	r3, [r7, #4]
 8015b46:	61fb      	str	r3, [r7, #28]
  LWIP_ASSERT("conn != NULL", (conn != NULL));
 8015b48:	69fb      	ldr	r3, [r7, #28]
 8015b4a:	2b00      	cmp	r3, #0
 8015b4c:	d106      	bne.n	8015b5c <err_tcp+0x24>
 8015b4e:	4b61      	ldr	r3, [pc, #388]	@ (8015cd4 <err_tcp+0x19c>)
 8015b50:	f44f 72dc 	mov.w	r2, #440	@ 0x1b8
 8015b54:	4960      	ldr	r1, [pc, #384]	@ (8015cd8 <err_tcp+0x1a0>)
 8015b56:	4861      	ldr	r0, [pc, #388]	@ (8015cdc <err_tcp+0x1a4>)
 8015b58:	f013 fcd8 	bl	802950c <iprintf>

  SYS_ARCH_PROTECT(lev);
 8015b5c:	f010 fa40 	bl	8025fe0 <sys_arch_protect>
 8015b60:	61b8      	str	r0, [r7, #24]

  /* when err is called, the pcb is deallocated, so delete the reference */
  conn->pcb.tcp = NULL;
 8015b62:	69fb      	ldr	r3, [r7, #28]
 8015b64:	2200      	movs	r2, #0
 8015b66:	605a      	str	r2, [r3, #4]
  /* store pending error */
  conn->pending_err = err;
 8015b68:	69fb      	ldr	r3, [r7, #28]
 8015b6a:	78fa      	ldrb	r2, [r7, #3]
 8015b6c:	721a      	strb	r2, [r3, #8]
  /* prevent application threads from blocking on 'recvmbox'/'acceptmbox' */
  conn->flags |= NETCONN_FLAG_MBOXCLOSED;
 8015b6e:	69fb      	ldr	r3, [r7, #28]
 8015b70:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8015b74:	f043 0301 	orr.w	r3, r3, #1
 8015b78:	b2da      	uxtb	r2, r3
 8015b7a:	69fb      	ldr	r3, [r7, #28]
 8015b7c:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28

  /* reset conn->state now before waking up other threads */
  old_state = conn->state;
 8015b80:	69fb      	ldr	r3, [r7, #28]
 8015b82:	785b      	ldrb	r3, [r3, #1]
 8015b84:	75fb      	strb	r3, [r7, #23]
  conn->state = NETCONN_NONE;
 8015b86:	69fb      	ldr	r3, [r7, #28]
 8015b88:	2200      	movs	r2, #0
 8015b8a:	705a      	strb	r2, [r3, #1]

  SYS_ARCH_UNPROTECT(lev);
 8015b8c:	69b8      	ldr	r0, [r7, #24]
 8015b8e:	f010 fa35 	bl	8025ffc <sys_arch_unprotect>

  /* Notify the user layer about a connection error. Used to signal select. */
  API_EVENT(conn, NETCONN_EVT_ERROR, 0);
 8015b92:	69fb      	ldr	r3, [r7, #28]
 8015b94:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8015b96:	2b00      	cmp	r3, #0
 8015b98:	d005      	beq.n	8015ba6 <err_tcp+0x6e>
 8015b9a:	69fb      	ldr	r3, [r7, #28]
 8015b9c:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8015b9e:	2200      	movs	r2, #0
 8015ba0:	2104      	movs	r1, #4
 8015ba2:	69f8      	ldr	r0, [r7, #28]
 8015ba4:	4798      	blx	r3
  /* Try to release selects pending on 'read' or 'write', too.
     They will get an error if they actually try to read or write. */
  API_EVENT(conn, NETCONN_EVT_RCVPLUS, 0);
 8015ba6:	69fb      	ldr	r3, [r7, #28]
 8015ba8:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8015baa:	2b00      	cmp	r3, #0
 8015bac:	d005      	beq.n	8015bba <err_tcp+0x82>
 8015bae:	69fb      	ldr	r3, [r7, #28]
 8015bb0:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8015bb2:	2200      	movs	r2, #0
 8015bb4:	2100      	movs	r1, #0
 8015bb6:	69f8      	ldr	r0, [r7, #28]
 8015bb8:	4798      	blx	r3
  API_EVENT(conn, NETCONN_EVT_SENDPLUS, 0);
 8015bba:	69fb      	ldr	r3, [r7, #28]
 8015bbc:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8015bbe:	2b00      	cmp	r3, #0
 8015bc0:	d005      	beq.n	8015bce <err_tcp+0x96>
 8015bc2:	69fb      	ldr	r3, [r7, #28]
 8015bc4:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8015bc6:	2200      	movs	r2, #0
 8015bc8:	2102      	movs	r1, #2
 8015bca:	69f8      	ldr	r0, [r7, #28]
 8015bcc:	4798      	blx	r3

  mbox_msg = lwip_netconn_err_to_msg(err);
 8015bce:	f997 3003 	ldrsb.w	r3, [r7, #3]
 8015bd2:	4618      	mov	r0, r3
 8015bd4:	f7ff fd52 	bl	801567c <lwip_netconn_err_to_msg>
 8015bd8:	6138      	str	r0, [r7, #16]
  /* pass error message to recvmbox to wake up pending recv */
  if (NETCONN_MBOX_VALID(conn, &conn->recvmbox)) {
 8015bda:	69fb      	ldr	r3, [r7, #28]
 8015bdc:	3310      	adds	r3, #16
 8015bde:	4618      	mov	r0, r3
 8015be0:	f010 f8f4 	bl	8025dcc <sys_mbox_valid>
 8015be4:	4603      	mov	r3, r0
 8015be6:	2b00      	cmp	r3, #0
 8015be8:	d005      	beq.n	8015bf6 <err_tcp+0xbe>
    /* use trypost to prevent deadlock */
    sys_mbox_trypost(&conn->recvmbox, mbox_msg);
 8015bea:	69fb      	ldr	r3, [r7, #28]
 8015bec:	3310      	adds	r3, #16
 8015bee:	6939      	ldr	r1, [r7, #16]
 8015bf0:	4618      	mov	r0, r3
 8015bf2:	f010 f889 	bl	8025d08 <sys_mbox_trypost>
  }
  /* pass error message to acceptmbox to wake up pending accept */
  if (NETCONN_MBOX_VALID(conn, &conn->acceptmbox)) {
 8015bf6:	69fb      	ldr	r3, [r7, #28]
 8015bf8:	3314      	adds	r3, #20
 8015bfa:	4618      	mov	r0, r3
 8015bfc:	f010 f8e6 	bl	8025dcc <sys_mbox_valid>
 8015c00:	4603      	mov	r3, r0
 8015c02:	2b00      	cmp	r3, #0
 8015c04:	d005      	beq.n	8015c12 <err_tcp+0xda>
    /* use trypost to preven deadlock */
    sys_mbox_trypost(&conn->acceptmbox, mbox_msg);
 8015c06:	69fb      	ldr	r3, [r7, #28]
 8015c08:	3314      	adds	r3, #20
 8015c0a:	6939      	ldr	r1, [r7, #16]
 8015c0c:	4618      	mov	r0, r3
 8015c0e:	f010 f87b 	bl	8025d08 <sys_mbox_trypost>
  }

  if ((old_state == NETCONN_WRITE) || (old_state == NETCONN_CLOSE) ||
 8015c12:	7dfb      	ldrb	r3, [r7, #23]
 8015c14:	2b01      	cmp	r3, #1
 8015c16:	d005      	beq.n	8015c24 <err_tcp+0xec>
 8015c18:	7dfb      	ldrb	r3, [r7, #23]
 8015c1a:	2b04      	cmp	r3, #4
 8015c1c:	d002      	beq.n	8015c24 <err_tcp+0xec>
 8015c1e:	7dfb      	ldrb	r3, [r7, #23]
 8015c20:	2b03      	cmp	r3, #3
 8015c22:	d146      	bne.n	8015cb2 <err_tcp+0x17a>
      (old_state == NETCONN_CONNECT)) {
    /* calling lwip_netconn_do_writemore/lwip_netconn_do_close_internal is not necessary
       since the pcb has already been deleted! */
    int was_nonblocking_connect = IN_NONBLOCKING_CONNECT(conn);
 8015c24:	69fb      	ldr	r3, [r7, #28]
 8015c26:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8015c2a:	f003 0304 	and.w	r3, r3, #4
 8015c2e:	2b00      	cmp	r3, #0
 8015c30:	bf14      	ite	ne
 8015c32:	2301      	movne	r3, #1
 8015c34:	2300      	moveq	r3, #0
 8015c36:	b2db      	uxtb	r3, r3
 8015c38:	60fb      	str	r3, [r7, #12]
    SET_NONBLOCKING_CONNECT(conn, 0);
 8015c3a:	69fb      	ldr	r3, [r7, #28]
 8015c3c:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8015c40:	f023 0304 	bic.w	r3, r3, #4
 8015c44:	b2da      	uxtb	r2, r3
 8015c46:	69fb      	ldr	r3, [r7, #28]
 8015c48:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28

    if (!was_nonblocking_connect) {
 8015c4c:	68fb      	ldr	r3, [r7, #12]
 8015c4e:	2b00      	cmp	r3, #0
 8015c50:	d13b      	bne.n	8015cca <err_tcp+0x192>
      sys_sem_t *op_completed_sem;
      /* set error return code */
      LWIP_ASSERT("conn->current_msg != NULL", conn->current_msg != NULL);
 8015c52:	69fb      	ldr	r3, [r7, #28]
 8015c54:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8015c56:	2b00      	cmp	r3, #0
 8015c58:	d106      	bne.n	8015c68 <err_tcp+0x130>
 8015c5a:	4b1e      	ldr	r3, [pc, #120]	@ (8015cd4 <err_tcp+0x19c>)
 8015c5c:	f44f 72f3 	mov.w	r2, #486	@ 0x1e6
 8015c60:	491f      	ldr	r1, [pc, #124]	@ (8015ce0 <err_tcp+0x1a8>)
 8015c62:	481e      	ldr	r0, [pc, #120]	@ (8015cdc <err_tcp+0x1a4>)
 8015c64:	f013 fc52 	bl	802950c <iprintf>
      if (old_state == NETCONN_CLOSE) {
 8015c68:	7dfb      	ldrb	r3, [r7, #23]
 8015c6a:	2b04      	cmp	r3, #4
 8015c6c:	d104      	bne.n	8015c78 <err_tcp+0x140>
        /* let close succeed: the connection is closed after all... */
        conn->current_msg->err = ERR_OK;
 8015c6e:	69fb      	ldr	r3, [r7, #28]
 8015c70:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8015c72:	2200      	movs	r2, #0
 8015c74:	711a      	strb	r2, [r3, #4]
 8015c76:	e003      	b.n	8015c80 <err_tcp+0x148>
      } else {
        /* Write and connect fail */
        conn->current_msg->err = err;
 8015c78:	69fb      	ldr	r3, [r7, #28]
 8015c7a:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8015c7c:	78fa      	ldrb	r2, [r7, #3]
 8015c7e:	711a      	strb	r2, [r3, #4]
      }
      op_completed_sem = LWIP_API_MSG_SEM(conn->current_msg);
 8015c80:	69fb      	ldr	r3, [r7, #28]
 8015c82:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8015c84:	681b      	ldr	r3, [r3, #0]
 8015c86:	330c      	adds	r3, #12
 8015c88:	60bb      	str	r3, [r7, #8]
      LWIP_ASSERT("inavlid op_completed_sem", sys_sem_valid(op_completed_sem));
 8015c8a:	68b8      	ldr	r0, [r7, #8]
 8015c8c:	f010 f92c 	bl	8025ee8 <sys_sem_valid>
 8015c90:	4603      	mov	r3, r0
 8015c92:	2b00      	cmp	r3, #0
 8015c94:	d106      	bne.n	8015ca4 <err_tcp+0x16c>
 8015c96:	4b0f      	ldr	r3, [pc, #60]	@ (8015cd4 <err_tcp+0x19c>)
 8015c98:	f240 12ef 	movw	r2, #495	@ 0x1ef
 8015c9c:	4911      	ldr	r1, [pc, #68]	@ (8015ce4 <err_tcp+0x1ac>)
 8015c9e:	480f      	ldr	r0, [pc, #60]	@ (8015cdc <err_tcp+0x1a4>)
 8015ca0:	f013 fc34 	bl	802950c <iprintf>
      conn->current_msg = NULL;
 8015ca4:	69fb      	ldr	r3, [r7, #28]
 8015ca6:	2200      	movs	r2, #0
 8015ca8:	62da      	str	r2, [r3, #44]	@ 0x2c
      /* wake up the waiting task */
      sys_sem_signal(op_completed_sem);
 8015caa:	68b8      	ldr	r0, [r7, #8]
 8015cac:	f010 f902 	bl	8025eb4 <sys_sem_signal>
      (old_state == NETCONN_CONNECT)) {
 8015cb0:	e00b      	b.n	8015cca <err_tcp+0x192>
    } else {
      /* @todo: test what happens for error on nonblocking connect */
    }
  } else {
    LWIP_ASSERT("conn->current_msg == NULL", conn->current_msg == NULL);
 8015cb2:	69fb      	ldr	r3, [r7, #28]
 8015cb4:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8015cb6:	2b00      	cmp	r3, #0
 8015cb8:	d008      	beq.n	8015ccc <err_tcp+0x194>
 8015cba:	4b06      	ldr	r3, [pc, #24]	@ (8015cd4 <err_tcp+0x19c>)
 8015cbc:	f240 12f7 	movw	r2, #503	@ 0x1f7
 8015cc0:	4909      	ldr	r1, [pc, #36]	@ (8015ce8 <err_tcp+0x1b0>)
 8015cc2:	4806      	ldr	r0, [pc, #24]	@ (8015cdc <err_tcp+0x1a4>)
 8015cc4:	f013 fc22 	bl	802950c <iprintf>
  }
}
 8015cc8:	e000      	b.n	8015ccc <err_tcp+0x194>
      (old_state == NETCONN_CONNECT)) {
 8015cca:	bf00      	nop
}
 8015ccc:	bf00      	nop
 8015cce:	3720      	adds	r7, #32
 8015cd0:	46bd      	mov	sp, r7
 8015cd2:	bd80      	pop	{r7, pc}
 8015cd4:	0802ca70 	.word	0x0802ca70
 8015cd8:	0802cbc8 	.word	0x0802cbc8
 8015cdc:	0802cab4 	.word	0x0802cab4
 8015ce0:	0802cbd8 	.word	0x0802cbd8
 8015ce4:	0802cbf4 	.word	0x0802cbf4
 8015ce8:	0802cc10 	.word	0x0802cc10

08015cec <setup_tcp>:
 *
 * @param conn the TCP netconn to setup
 */
static void
setup_tcp(struct netconn *conn)
{
 8015cec:	b580      	push	{r7, lr}
 8015cee:	b084      	sub	sp, #16
 8015cf0:	af00      	add	r7, sp, #0
 8015cf2:	6078      	str	r0, [r7, #4]
  struct tcp_pcb *pcb;

  pcb = conn->pcb.tcp;
 8015cf4:	687b      	ldr	r3, [r7, #4]
 8015cf6:	685b      	ldr	r3, [r3, #4]
 8015cf8:	60fb      	str	r3, [r7, #12]
  tcp_arg(pcb, conn);
 8015cfa:	6879      	ldr	r1, [r7, #4]
 8015cfc:	68f8      	ldr	r0, [r7, #12]
 8015cfe:	f005 ffe3 	bl	801bcc8 <tcp_arg>
  tcp_recv(pcb, recv_tcp);
 8015d02:	490a      	ldr	r1, [pc, #40]	@ (8015d2c <setup_tcp+0x40>)
 8015d04:	68f8      	ldr	r0, [r7, #12]
 8015d06:	f005 fff1 	bl	801bcec <tcp_recv>
  tcp_sent(pcb, sent_tcp);
 8015d0a:	4909      	ldr	r1, [pc, #36]	@ (8015d30 <setup_tcp+0x44>)
 8015d0c:	68f8      	ldr	r0, [r7, #12]
 8015d0e:	f006 f811 	bl	801bd34 <tcp_sent>
  tcp_poll(pcb, poll_tcp, NETCONN_TCP_POLL_INTERVAL);
 8015d12:	2202      	movs	r2, #2
 8015d14:	4907      	ldr	r1, [pc, #28]	@ (8015d34 <setup_tcp+0x48>)
 8015d16:	68f8      	ldr	r0, [r7, #12]
 8015d18:	f006 f86c 	bl	801bdf4 <tcp_poll>
  tcp_err(pcb, err_tcp);
 8015d1c:	4906      	ldr	r1, [pc, #24]	@ (8015d38 <setup_tcp+0x4c>)
 8015d1e:	68f8      	ldr	r0, [r7, #12]
 8015d20:	f006 f82c 	bl	801bd7c <tcp_err>
}
 8015d24:	bf00      	nop
 8015d26:	3710      	adds	r7, #16
 8015d28:	46bd      	mov	sp, r7
 8015d2a:	bd80      	pop	{r7, pc}
 8015d2c:	08015895 	.word	0x08015895
 8015d30:	08015a89 	.word	0x08015a89
 8015d34:	080159b9 	.word	0x080159b9
 8015d38:	08015b39 	.word	0x08015b39

08015d3c <pcb_new>:
 *
 * @param msg the api_msg describing the connection type
 */
static void
pcb_new(struct api_msg *msg)
{
 8015d3c:	b590      	push	{r4, r7, lr}
 8015d3e:	b085      	sub	sp, #20
 8015d40:	af00      	add	r7, sp, #0
 8015d42:	6078      	str	r0, [r7, #4]
  enum lwip_ip_addr_type iptype = IPADDR_TYPE_V4;
 8015d44:	2300      	movs	r3, #0
 8015d46:	73fb      	strb	r3, [r7, #15]

  LWIP_ASSERT("pcb_new: pcb already allocated", msg->conn->pcb.tcp == NULL);
 8015d48:	687b      	ldr	r3, [r7, #4]
 8015d4a:	681b      	ldr	r3, [r3, #0]
 8015d4c:	685b      	ldr	r3, [r3, #4]
 8015d4e:	2b00      	cmp	r3, #0
 8015d50:	d006      	beq.n	8015d60 <pcb_new+0x24>
 8015d52:	4b2b      	ldr	r3, [pc, #172]	@ (8015e00 <pcb_new+0xc4>)
 8015d54:	f240 2265 	movw	r2, #613	@ 0x265
 8015d58:	492a      	ldr	r1, [pc, #168]	@ (8015e04 <pcb_new+0xc8>)
 8015d5a:	482b      	ldr	r0, [pc, #172]	@ (8015e08 <pcb_new+0xcc>)
 8015d5c:	f013 fbd6 	bl	802950c <iprintf>
    iptype = IPADDR_TYPE_ANY;
  }
#endif

  /* Allocate a PCB for this connection */
  switch (NETCONNTYPE_GROUP(msg->conn->type)) {
 8015d60:	687b      	ldr	r3, [r7, #4]
 8015d62:	681b      	ldr	r3, [r3, #0]
 8015d64:	781b      	ldrb	r3, [r3, #0]
 8015d66:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8015d6a:	2b10      	cmp	r3, #16
 8015d6c:	d022      	beq.n	8015db4 <pcb_new+0x78>
 8015d6e:	2b20      	cmp	r3, #32
 8015d70:	d133      	bne.n	8015dda <pcb_new+0x9e>
      }
      break;
#endif /* LWIP_RAW */
#if LWIP_UDP
    case NETCONN_UDP:
      msg->conn->pcb.udp = udp_new_ip_type(iptype);
 8015d72:	687b      	ldr	r3, [r7, #4]
 8015d74:	681c      	ldr	r4, [r3, #0]
 8015d76:	7bfb      	ldrb	r3, [r7, #15]
 8015d78:	4618      	mov	r0, r3
 8015d7a:	f00b fb94 	bl	80214a6 <udp_new_ip_type>
 8015d7e:	4603      	mov	r3, r0
 8015d80:	6063      	str	r3, [r4, #4]
      if (msg->conn->pcb.udp != NULL) {
 8015d82:	687b      	ldr	r3, [r7, #4]
 8015d84:	681b      	ldr	r3, [r3, #0]
 8015d86:	685b      	ldr	r3, [r3, #4]
 8015d88:	2b00      	cmp	r3, #0
 8015d8a:	d02a      	beq.n	8015de2 <pcb_new+0xa6>
#if LWIP_UDPLITE
        if (NETCONNTYPE_ISUDPLITE(msg->conn->type)) {
          udp_setflags(msg->conn->pcb.udp, UDP_FLAGS_UDPLITE);
        }
#endif /* LWIP_UDPLITE */
        if (NETCONNTYPE_ISUDPNOCHKSUM(msg->conn->type)) {
 8015d8c:	687b      	ldr	r3, [r7, #4]
 8015d8e:	681b      	ldr	r3, [r3, #0]
 8015d90:	781b      	ldrb	r3, [r3, #0]
 8015d92:	2b22      	cmp	r3, #34	@ 0x22
 8015d94:	d104      	bne.n	8015da0 <pcb_new+0x64>
          udp_setflags(msg->conn->pcb.udp, UDP_FLAGS_NOCHKSUM);
 8015d96:	687b      	ldr	r3, [r7, #4]
 8015d98:	681b      	ldr	r3, [r3, #0]
 8015d9a:	685b      	ldr	r3, [r3, #4]
 8015d9c:	2201      	movs	r2, #1
 8015d9e:	741a      	strb	r2, [r3, #16]
        }
        udp_recv(msg->conn->pcb.udp, recv_udp, msg->conn);
 8015da0:	687b      	ldr	r3, [r7, #4]
 8015da2:	681b      	ldr	r3, [r3, #0]
 8015da4:	6858      	ldr	r0, [r3, #4]
 8015da6:	687b      	ldr	r3, [r7, #4]
 8015da8:	681b      	ldr	r3, [r3, #0]
 8015daa:	461a      	mov	r2, r3
 8015dac:	4917      	ldr	r1, [pc, #92]	@ (8015e0c <pcb_new+0xd0>)
 8015dae:	f00b fafb 	bl	80213a8 <udp_recv>
      }
      break;
 8015db2:	e016      	b.n	8015de2 <pcb_new+0xa6>
#endif /* LWIP_UDP */
#if LWIP_TCP
    case NETCONN_TCP:
      msg->conn->pcb.tcp = tcp_new_ip_type(iptype);
 8015db4:	687b      	ldr	r3, [r7, #4]
 8015db6:	681c      	ldr	r4, [r3, #0]
 8015db8:	7bfb      	ldrb	r3, [r7, #15]
 8015dba:	4618      	mov	r0, r3
 8015dbc:	f005 ff76 	bl	801bcac <tcp_new_ip_type>
 8015dc0:	4603      	mov	r3, r0
 8015dc2:	6063      	str	r3, [r4, #4]
      if (msg->conn->pcb.tcp != NULL) {
 8015dc4:	687b      	ldr	r3, [r7, #4]
 8015dc6:	681b      	ldr	r3, [r3, #0]
 8015dc8:	685b      	ldr	r3, [r3, #4]
 8015dca:	2b00      	cmp	r3, #0
 8015dcc:	d00b      	beq.n	8015de6 <pcb_new+0xaa>
        setup_tcp(msg->conn);
 8015dce:	687b      	ldr	r3, [r7, #4]
 8015dd0:	681b      	ldr	r3, [r3, #0]
 8015dd2:	4618      	mov	r0, r3
 8015dd4:	f7ff ff8a 	bl	8015cec <setup_tcp>
      }
      break;
 8015dd8:	e005      	b.n	8015de6 <pcb_new+0xaa>
#endif /* LWIP_TCP */
    default:
      /* Unsupported netconn type, e.g. protocol disabled */
      msg->err = ERR_VAL;
 8015dda:	687b      	ldr	r3, [r7, #4]
 8015ddc:	22fa      	movs	r2, #250	@ 0xfa
 8015dde:	711a      	strb	r2, [r3, #4]
      return;
 8015de0:	e00a      	b.n	8015df8 <pcb_new+0xbc>
      break;
 8015de2:	bf00      	nop
 8015de4:	e000      	b.n	8015de8 <pcb_new+0xac>
      break;
 8015de6:	bf00      	nop
  }
  if (msg->conn->pcb.ip == NULL) {
 8015de8:	687b      	ldr	r3, [r7, #4]
 8015dea:	681b      	ldr	r3, [r3, #0]
 8015dec:	685b      	ldr	r3, [r3, #4]
 8015dee:	2b00      	cmp	r3, #0
 8015df0:	d102      	bne.n	8015df8 <pcb_new+0xbc>
    msg->err = ERR_MEM;
 8015df2:	687b      	ldr	r3, [r7, #4]
 8015df4:	22ff      	movs	r2, #255	@ 0xff
 8015df6:	711a      	strb	r2, [r3, #4]
  }
}
 8015df8:	3714      	adds	r7, #20
 8015dfa:	46bd      	mov	sp, r7
 8015dfc:	bd90      	pop	{r4, r7, pc}
 8015dfe:	bf00      	nop
 8015e00:	0802ca70 	.word	0x0802ca70
 8015e04:	0802cc54 	.word	0x0802cc54
 8015e08:	0802cab4 	.word	0x0802cab4
 8015e0c:	0801575d 	.word	0x0801575d

08015e10 <lwip_netconn_do_newconn>:
 *
 * @param m the api_msg describing the connection type
 */
void
lwip_netconn_do_newconn(void *m)
{
 8015e10:	b580      	push	{r7, lr}
 8015e12:	b084      	sub	sp, #16
 8015e14:	af00      	add	r7, sp, #0
 8015e16:	6078      	str	r0, [r7, #4]
  struct api_msg *msg = (struct api_msg *)m;
 8015e18:	687b      	ldr	r3, [r7, #4]
 8015e1a:	60fb      	str	r3, [r7, #12]

  msg->err = ERR_OK;
 8015e1c:	68fb      	ldr	r3, [r7, #12]
 8015e1e:	2200      	movs	r2, #0
 8015e20:	711a      	strb	r2, [r3, #4]
  if (msg->conn->pcb.tcp == NULL) {
 8015e22:	68fb      	ldr	r3, [r7, #12]
 8015e24:	681b      	ldr	r3, [r3, #0]
 8015e26:	685b      	ldr	r3, [r3, #4]
 8015e28:	2b00      	cmp	r3, #0
 8015e2a:	d102      	bne.n	8015e32 <lwip_netconn_do_newconn+0x22>
    pcb_new(msg);
 8015e2c:	68f8      	ldr	r0, [r7, #12]
 8015e2e:	f7ff ff85 	bl	8015d3c <pcb_new>
  /* Else? This "new" connection already has a PCB allocated. */
  /* Is this an error condition? Should it be deleted? */
  /* We currently just are happy and return. */

  TCPIP_APIMSG_ACK(msg);
}
 8015e32:	bf00      	nop
 8015e34:	3710      	adds	r7, #16
 8015e36:	46bd      	mov	sp, r7
 8015e38:	bd80      	pop	{r7, pc}
	...

08015e3c <netconn_alloc>:
 * @return a newly allocated struct netconn or
 *         NULL on memory error
 */
struct netconn *
netconn_alloc(enum netconn_type t, netconn_callback callback)
{
 8015e3c:	b580      	push	{r7, lr}
 8015e3e:	b086      	sub	sp, #24
 8015e40:	af00      	add	r7, sp, #0
 8015e42:	4603      	mov	r3, r0
 8015e44:	6039      	str	r1, [r7, #0]
 8015e46:	71fb      	strb	r3, [r7, #7]
  struct netconn *conn;
  int size;
  u8_t init_flags = 0;
 8015e48:	2300      	movs	r3, #0
 8015e4a:	74fb      	strb	r3, [r7, #19]

  conn = (struct netconn *)memp_malloc(MEMP_NETCONN);
 8015e4c:	2007      	movs	r0, #7
 8015e4e:	f003 f981 	bl	8019154 <memp_malloc>
 8015e52:	60f8      	str	r0, [r7, #12]
  if (conn == NULL) {
 8015e54:	68fb      	ldr	r3, [r7, #12]
 8015e56:	2b00      	cmp	r3, #0
 8015e58:	d101      	bne.n	8015e5e <netconn_alloc+0x22>
    return NULL;
 8015e5a:	2300      	movs	r3, #0
 8015e5c:	e05c      	b.n	8015f18 <netconn_alloc+0xdc>
  }

  conn->pending_err = ERR_OK;
 8015e5e:	68fb      	ldr	r3, [r7, #12]
 8015e60:	2200      	movs	r2, #0
 8015e62:	721a      	strb	r2, [r3, #8]
  conn->type = t;
 8015e64:	68fb      	ldr	r3, [r7, #12]
 8015e66:	79fa      	ldrb	r2, [r7, #7]
 8015e68:	701a      	strb	r2, [r3, #0]
  conn->pcb.tcp = NULL;
 8015e6a:	68fb      	ldr	r3, [r7, #12]
 8015e6c:	2200      	movs	r2, #0
 8015e6e:	605a      	str	r2, [r3, #4]

  /* If all sizes are the same, every compiler should optimize this switch to nothing */
  switch (NETCONNTYPE_GROUP(t)) {
 8015e70:	79fb      	ldrb	r3, [r7, #7]
 8015e72:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8015e76:	2b10      	cmp	r3, #16
 8015e78:	d004      	beq.n	8015e84 <netconn_alloc+0x48>
 8015e7a:	2b20      	cmp	r3, #32
 8015e7c:	d105      	bne.n	8015e8a <netconn_alloc+0x4e>
      size = DEFAULT_RAW_RECVMBOX_SIZE;
      break;
#endif /* LWIP_RAW */
#if LWIP_UDP
    case NETCONN_UDP:
      size = DEFAULT_UDP_RECVMBOX_SIZE;
 8015e7e:	2306      	movs	r3, #6
 8015e80:	617b      	str	r3, [r7, #20]
#if LWIP_NETBUF_RECVINFO
      init_flags |= NETCONN_FLAG_PKTINFO;
#endif /* LWIP_NETBUF_RECVINFO */
      break;
 8015e82:	e00a      	b.n	8015e9a <netconn_alloc+0x5e>
#endif /* LWIP_UDP */
#if LWIP_TCP
    case NETCONN_TCP:
      size = DEFAULT_TCP_RECVMBOX_SIZE;
 8015e84:	2306      	movs	r3, #6
 8015e86:	617b      	str	r3, [r7, #20]
      break;
 8015e88:	e007      	b.n	8015e9a <netconn_alloc+0x5e>
#endif /* LWIP_TCP */
    default:
      LWIP_ASSERT("netconn_alloc: undefined netconn_type", 0);
 8015e8a:	4b25      	ldr	r3, [pc, #148]	@ (8015f20 <netconn_alloc+0xe4>)
 8015e8c:	f240 22e5 	movw	r2, #741	@ 0x2e5
 8015e90:	4924      	ldr	r1, [pc, #144]	@ (8015f24 <netconn_alloc+0xe8>)
 8015e92:	4825      	ldr	r0, [pc, #148]	@ (8015f28 <netconn_alloc+0xec>)
 8015e94:	f013 fb3a 	bl	802950c <iprintf>
      goto free_and_return;
 8015e98:	e039      	b.n	8015f0e <netconn_alloc+0xd2>
  }

  if (sys_mbox_new(&conn->recvmbox, size) != ERR_OK) {
 8015e9a:	68fb      	ldr	r3, [r7, #12]
 8015e9c:	3310      	adds	r3, #16
 8015e9e:	6979      	ldr	r1, [r7, #20]
 8015ea0:	4618      	mov	r0, r3
 8015ea2:	f00f ff05 	bl	8025cb0 <sys_mbox_new>
 8015ea6:	4603      	mov	r3, r0
 8015ea8:	2b00      	cmp	r3, #0
 8015eaa:	d12f      	bne.n	8015f0c <netconn_alloc+0xd0>
    goto free_and_return;
  }
#if !LWIP_NETCONN_SEM_PER_THREAD
  if (sys_sem_new(&conn->op_completed, 0) != ERR_OK) {
 8015eac:	68fb      	ldr	r3, [r7, #12]
 8015eae:	330c      	adds	r3, #12
 8015eb0:	2100      	movs	r1, #0
 8015eb2:	4618      	mov	r0, r3
 8015eb4:	f00f ffa8 	bl	8025e08 <sys_sem_new>
 8015eb8:	4603      	mov	r3, r0
 8015eba:	2b00      	cmp	r3, #0
 8015ebc:	d005      	beq.n	8015eca <netconn_alloc+0x8e>
    sys_mbox_free(&conn->recvmbox);
 8015ebe:	68fb      	ldr	r3, [r7, #12]
 8015ec0:	3310      	adds	r3, #16
 8015ec2:	4618      	mov	r0, r3
 8015ec4:	f00f ff0e 	bl	8025ce4 <sys_mbox_free>
    goto free_and_return;
 8015ec8:	e021      	b.n	8015f0e <netconn_alloc+0xd2>
  }
#endif

#if LWIP_TCP
  sys_mbox_set_invalid(&conn->acceptmbox);
 8015eca:	68fb      	ldr	r3, [r7, #12]
 8015ecc:	3314      	adds	r3, #20
 8015ece:	4618      	mov	r0, r3
 8015ed0:	f00f ff8d 	bl	8025dee <sys_mbox_set_invalid>
#endif
  conn->state        = NETCONN_NONE;
 8015ed4:	68fb      	ldr	r3, [r7, #12]
 8015ed6:	2200      	movs	r2, #0
 8015ed8:	705a      	strb	r2, [r3, #1]
#if LWIP_SOCKET
  /* initialize socket to -1 since 0 is a valid socket */
  conn->socket       = -1;
 8015eda:	68fb      	ldr	r3, [r7, #12]
 8015edc:	f04f 32ff 	mov.w	r2, #4294967295	@ 0xffffffff
 8015ee0:	619a      	str	r2, [r3, #24]
#endif /* LWIP_SOCKET */
  conn->callback     = callback;
 8015ee2:	68fb      	ldr	r3, [r7, #12]
 8015ee4:	683a      	ldr	r2, [r7, #0]
 8015ee6:	631a      	str	r2, [r3, #48]	@ 0x30
#if LWIP_TCP
  conn->current_msg  = NULL;
 8015ee8:	68fb      	ldr	r3, [r7, #12]
 8015eea:	2200      	movs	r2, #0
 8015eec:	62da      	str	r2, [r3, #44]	@ 0x2c
#endif /* LWIP_TCP */
#if LWIP_SO_SNDTIMEO
  conn->send_timeout = 0;
#endif /* LWIP_SO_SNDTIMEO */
#if LWIP_SO_RCVTIMEO
  conn->recv_timeout = 0;
 8015eee:	68fb      	ldr	r3, [r7, #12]
 8015ef0:	2200      	movs	r2, #0
 8015ef2:	61da      	str	r2, [r3, #28]
#endif /* LWIP_SO_RCVTIMEO */
#if LWIP_SO_RCVBUF
  conn->recv_bufsize = RECV_BUFSIZE_DEFAULT;
 8015ef4:	68fb      	ldr	r3, [r7, #12]
 8015ef6:	4a0d      	ldr	r2, [pc, #52]	@ (8015f2c <netconn_alloc+0xf0>)
 8015ef8:	621a      	str	r2, [r3, #32]
  conn->recv_avail   = 0;
 8015efa:	68fb      	ldr	r3, [r7, #12]
 8015efc:	2200      	movs	r2, #0
 8015efe:	625a      	str	r2, [r3, #36]	@ 0x24
#endif /* LWIP_SO_RCVBUF */
#if LWIP_SO_LINGER
  conn->linger = -1;
#endif /* LWIP_SO_LINGER */
  conn->flags = init_flags;
 8015f00:	68fb      	ldr	r3, [r7, #12]
 8015f02:	7cfa      	ldrb	r2, [r7, #19]
 8015f04:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
  return conn;
 8015f08:	68fb      	ldr	r3, [r7, #12]
 8015f0a:	e005      	b.n	8015f18 <netconn_alloc+0xdc>
    goto free_and_return;
 8015f0c:	bf00      	nop
free_and_return:
  memp_free(MEMP_NETCONN, conn);
 8015f0e:	68f9      	ldr	r1, [r7, #12]
 8015f10:	2007      	movs	r0, #7
 8015f12:	f003 f995 	bl	8019240 <memp_free>
  return NULL;
 8015f16:	2300      	movs	r3, #0
}
 8015f18:	4618      	mov	r0, r3
 8015f1a:	3718      	adds	r7, #24
 8015f1c:	46bd      	mov	sp, r7
 8015f1e:	bd80      	pop	{r7, pc}
 8015f20:	0802ca70 	.word	0x0802ca70
 8015f24:	0802cc74 	.word	0x0802cc74
 8015f28:	0802cab4 	.word	0x0802cab4
 8015f2c:	77359400 	.word	0x77359400

08015f30 <netconn_free>:
 *
 * @param conn the netconn to free
 */
void
netconn_free(struct netconn *conn)
{
 8015f30:	b580      	push	{r7, lr}
 8015f32:	b082      	sub	sp, #8
 8015f34:	af00      	add	r7, sp, #0
 8015f36:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT("PCB must be deallocated outside this function", conn->pcb.tcp == NULL);
 8015f38:	687b      	ldr	r3, [r7, #4]
 8015f3a:	685b      	ldr	r3, [r3, #4]
 8015f3c:	2b00      	cmp	r3, #0
 8015f3e:	d006      	beq.n	8015f4e <netconn_free+0x1e>
 8015f40:	4b1b      	ldr	r3, [pc, #108]	@ (8015fb0 <netconn_free+0x80>)
 8015f42:	f44f 7247 	mov.w	r2, #796	@ 0x31c
 8015f46:	491b      	ldr	r1, [pc, #108]	@ (8015fb4 <netconn_free+0x84>)
 8015f48:	481b      	ldr	r0, [pc, #108]	@ (8015fb8 <netconn_free+0x88>)
 8015f4a:	f013 fadf 	bl	802950c <iprintf>
#if LWIP_NETCONN_FULLDUPLEX
  /* in fullduplex, netconn is drained here */
  netconn_drain(conn);
#endif /* LWIP_NETCONN_FULLDUPLEX */

  LWIP_ASSERT("recvmbox must be deallocated before calling this function",
 8015f4e:	687b      	ldr	r3, [r7, #4]
 8015f50:	3310      	adds	r3, #16
 8015f52:	4618      	mov	r0, r3
 8015f54:	f00f ff3a 	bl	8025dcc <sys_mbox_valid>
 8015f58:	4603      	mov	r3, r0
 8015f5a:	2b00      	cmp	r3, #0
 8015f5c:	d006      	beq.n	8015f6c <netconn_free+0x3c>
 8015f5e:	4b14      	ldr	r3, [pc, #80]	@ (8015fb0 <netconn_free+0x80>)
 8015f60:	f240 3223 	movw	r2, #803	@ 0x323
 8015f64:	4915      	ldr	r1, [pc, #84]	@ (8015fbc <netconn_free+0x8c>)
 8015f66:	4814      	ldr	r0, [pc, #80]	@ (8015fb8 <netconn_free+0x88>)
 8015f68:	f013 fad0 	bl	802950c <iprintf>
              !sys_mbox_valid(&conn->recvmbox));
#if LWIP_TCP
  LWIP_ASSERT("acceptmbox must be deallocated before calling this function",
 8015f6c:	687b      	ldr	r3, [r7, #4]
 8015f6e:	3314      	adds	r3, #20
 8015f70:	4618      	mov	r0, r3
 8015f72:	f00f ff2b 	bl	8025dcc <sys_mbox_valid>
 8015f76:	4603      	mov	r3, r0
 8015f78:	2b00      	cmp	r3, #0
 8015f7a:	d006      	beq.n	8015f8a <netconn_free+0x5a>
 8015f7c:	4b0c      	ldr	r3, [pc, #48]	@ (8015fb0 <netconn_free+0x80>)
 8015f7e:	f240 3226 	movw	r2, #806	@ 0x326
 8015f82:	490f      	ldr	r1, [pc, #60]	@ (8015fc0 <netconn_free+0x90>)
 8015f84:	480c      	ldr	r0, [pc, #48]	@ (8015fb8 <netconn_free+0x88>)
 8015f86:	f013 fac1 	bl	802950c <iprintf>
              !sys_mbox_valid(&conn->acceptmbox));
#endif /* LWIP_TCP */

#if !LWIP_NETCONN_SEM_PER_THREAD
  sys_sem_free(&conn->op_completed);
 8015f8a:	687b      	ldr	r3, [r7, #4]
 8015f8c:	330c      	adds	r3, #12
 8015f8e:	4618      	mov	r0, r3
 8015f90:	f00f ff9d 	bl	8025ece <sys_sem_free>
  sys_sem_set_invalid(&conn->op_completed);
 8015f94:	687b      	ldr	r3, [r7, #4]
 8015f96:	330c      	adds	r3, #12
 8015f98:	4618      	mov	r0, r3
 8015f9a:	f00f ffb6 	bl	8025f0a <sys_sem_set_invalid>
#endif

  memp_free(MEMP_NETCONN, conn);
 8015f9e:	6879      	ldr	r1, [r7, #4]
 8015fa0:	2007      	movs	r0, #7
 8015fa2:	f003 f94d 	bl	8019240 <memp_free>
}
 8015fa6:	bf00      	nop
 8015fa8:	3708      	adds	r7, #8
 8015faa:	46bd      	mov	sp, r7
 8015fac:	bd80      	pop	{r7, pc}
 8015fae:	bf00      	nop
 8015fb0:	0802ca70 	.word	0x0802ca70
 8015fb4:	0802cc9c 	.word	0x0802cc9c
 8015fb8:	0802cab4 	.word	0x0802cab4
 8015fbc:	0802cccc 	.word	0x0802cccc
 8015fc0:	0802cd08 	.word	0x0802cd08

08015fc4 <netconn_drain>:
 * @bytes_drained bytes drained from recvmbox
 * @accepts_drained pending connections drained from acceptmbox
 */
static void
netconn_drain(struct netconn *conn)
{
 8015fc4:	b580      	push	{r7, lr}
 8015fc6:	b086      	sub	sp, #24
 8015fc8:	af00      	add	r7, sp, #0
 8015fca:	6078      	str	r0, [r7, #4]
#if LWIP_NETCONN_FULLDUPLEX
  LWIP_ASSERT("netconn marked closed", conn->flags & NETCONN_FLAG_MBOXINVALID);
#endif /* LWIP_NETCONN_FULLDUPLEX */

  /* Delete and drain the recvmbox. */
  if (sys_mbox_valid(&conn->recvmbox)) {
 8015fcc:	687b      	ldr	r3, [r7, #4]
 8015fce:	3310      	adds	r3, #16
 8015fd0:	4618      	mov	r0, r3
 8015fd2:	f00f fefb 	bl	8025dcc <sys_mbox_valid>
 8015fd6:	4603      	mov	r3, r0
 8015fd8:	2b00      	cmp	r3, #0
 8015fda:	d02f      	beq.n	801603c <netconn_drain+0x78>
    while (sys_mbox_tryfetch(&conn->recvmbox, &mem) != SYS_MBOX_EMPTY) {
 8015fdc:	e018      	b.n	8016010 <netconn_drain+0x4c>
#if LWIP_NETCONN_FULLDUPLEX
      if (!lwip_netconn_is_deallocated_msg(mem))
#endif /* LWIP_NETCONN_FULLDUPLEX */
      {
#if LWIP_TCP
        if (NETCONNTYPE_GROUP(conn->type) == NETCONN_TCP) {
 8015fde:	687b      	ldr	r3, [r7, #4]
 8015fe0:	781b      	ldrb	r3, [r3, #0]
 8015fe2:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8015fe6:	2b10      	cmp	r3, #16
 8015fe8:	d10e      	bne.n	8016008 <netconn_drain+0x44>
          err_t err;
          if (!lwip_netconn_is_err_msg(mem, &err)) {
 8015fea:	693b      	ldr	r3, [r7, #16]
 8015fec:	f107 020f 	add.w	r2, r7, #15
 8015ff0:	4611      	mov	r1, r2
 8015ff2:	4618      	mov	r0, r3
 8015ff4:	f7ff fb78 	bl	80156e8 <lwip_netconn_is_err_msg>
 8015ff8:	4603      	mov	r3, r0
 8015ffa:	2b00      	cmp	r3, #0
 8015ffc:	d108      	bne.n	8016010 <netconn_drain+0x4c>
            pbuf_free((struct pbuf *)mem);
 8015ffe:	693b      	ldr	r3, [r7, #16]
 8016000:	4618      	mov	r0, r3
 8016002:	f004 f80b 	bl	801a01c <pbuf_free>
 8016006:	e003      	b.n	8016010 <netconn_drain+0x4c>
          }
        } else
#endif /* LWIP_TCP */
        {
          netbuf_delete((struct netbuf *)mem);
 8016008:	693b      	ldr	r3, [r7, #16]
 801600a:	4618      	mov	r0, r3
 801600c:	f001 f81c 	bl	8017048 <netbuf_delete>
    while (sys_mbox_tryfetch(&conn->recvmbox, &mem) != SYS_MBOX_EMPTY) {
 8016010:	687b      	ldr	r3, [r7, #4]
 8016012:	3310      	adds	r3, #16
 8016014:	f107 0210 	add.w	r2, r7, #16
 8016018:	4611      	mov	r1, r2
 801601a:	4618      	mov	r0, r3
 801601c:	f00f febf 	bl	8025d9e <sys_arch_mbox_tryfetch>
 8016020:	4603      	mov	r3, r0
 8016022:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8016026:	d1da      	bne.n	8015fde <netconn_drain+0x1a>
        }
      }
    }
    sys_mbox_free(&conn->recvmbox);
 8016028:	687b      	ldr	r3, [r7, #4]
 801602a:	3310      	adds	r3, #16
 801602c:	4618      	mov	r0, r3
 801602e:	f00f fe59 	bl	8025ce4 <sys_mbox_free>
    sys_mbox_set_invalid(&conn->recvmbox);
 8016032:	687b      	ldr	r3, [r7, #4]
 8016034:	3310      	adds	r3, #16
 8016036:	4618      	mov	r0, r3
 8016038:	f00f fed9 	bl	8025dee <sys_mbox_set_invalid>
  }

  /* Delete and drain the acceptmbox. */
#if LWIP_TCP
  if (sys_mbox_valid(&conn->acceptmbox)) {
 801603c:	687b      	ldr	r3, [r7, #4]
 801603e:	3314      	adds	r3, #20
 8016040:	4618      	mov	r0, r3
 8016042:	f00f fec3 	bl	8025dcc <sys_mbox_valid>
 8016046:	4603      	mov	r3, r0
 8016048:	2b00      	cmp	r3, #0
 801604a:	d034      	beq.n	80160b6 <netconn_drain+0xf2>
    while (sys_mbox_tryfetch(&conn->acceptmbox, &mem) != SYS_MBOX_EMPTY) {
 801604c:	e01d      	b.n	801608a <netconn_drain+0xc6>
#if LWIP_NETCONN_FULLDUPLEX
      if (!lwip_netconn_is_deallocated_msg(mem))
#endif /* LWIP_NETCONN_FULLDUPLEX */
      {
        err_t err;
        if (!lwip_netconn_is_err_msg(mem, &err)) {
 801604e:	693b      	ldr	r3, [r7, #16]
 8016050:	f107 020e 	add.w	r2, r7, #14
 8016054:	4611      	mov	r1, r2
 8016056:	4618      	mov	r0, r3
 8016058:	f7ff fb46 	bl	80156e8 <lwip_netconn_is_err_msg>
 801605c:	4603      	mov	r3, r0
 801605e:	2b00      	cmp	r3, #0
 8016060:	d113      	bne.n	801608a <netconn_drain+0xc6>
          struct netconn *newconn = (struct netconn *)mem;
 8016062:	693b      	ldr	r3, [r7, #16]
 8016064:	617b      	str	r3, [r7, #20]
          /* Only tcp pcbs have an acceptmbox, so no need to check conn->type */
          /* pcb might be set to NULL already by err_tcp() */
          /* drain recvmbox */
          netconn_drain(newconn);
 8016066:	6978      	ldr	r0, [r7, #20]
 8016068:	f7ff ffac 	bl	8015fc4 <netconn_drain>
          if (newconn->pcb.tcp != NULL) {
 801606c:	697b      	ldr	r3, [r7, #20]
 801606e:	685b      	ldr	r3, [r3, #4]
 8016070:	2b00      	cmp	r3, #0
 8016072:	d007      	beq.n	8016084 <netconn_drain+0xc0>
            tcp_abort(newconn->pcb.tcp);
 8016074:	697b      	ldr	r3, [r7, #20]
 8016076:	685b      	ldr	r3, [r3, #4]
 8016078:	4618      	mov	r0, r3
 801607a:	f004 fdd5 	bl	801ac28 <tcp_abort>
            newconn->pcb.tcp = NULL;
 801607e:	697b      	ldr	r3, [r7, #20]
 8016080:	2200      	movs	r2, #0
 8016082:	605a      	str	r2, [r3, #4]
          }
          netconn_free(newconn);
 8016084:	6978      	ldr	r0, [r7, #20]
 8016086:	f7ff ff53 	bl	8015f30 <netconn_free>
    while (sys_mbox_tryfetch(&conn->acceptmbox, &mem) != SYS_MBOX_EMPTY) {
 801608a:	687b      	ldr	r3, [r7, #4]
 801608c:	3314      	adds	r3, #20
 801608e:	f107 0210 	add.w	r2, r7, #16
 8016092:	4611      	mov	r1, r2
 8016094:	4618      	mov	r0, r3
 8016096:	f00f fe82 	bl	8025d9e <sys_arch_mbox_tryfetch>
 801609a:	4603      	mov	r3, r0
 801609c:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 80160a0:	d1d5      	bne.n	801604e <netconn_drain+0x8a>
        }
      }
    }
    sys_mbox_free(&conn->acceptmbox);
 80160a2:	687b      	ldr	r3, [r7, #4]
 80160a4:	3314      	adds	r3, #20
 80160a6:	4618      	mov	r0, r3
 80160a8:	f00f fe1c 	bl	8025ce4 <sys_mbox_free>
    sys_mbox_set_invalid(&conn->acceptmbox);
 80160ac:	687b      	ldr	r3, [r7, #4]
 80160ae:	3314      	adds	r3, #20
 80160b0:	4618      	mov	r0, r3
 80160b2:	f00f fe9c 	bl	8025dee <sys_mbox_set_invalid>
  }
#endif /* LWIP_TCP */
}
 80160b6:	bf00      	nop
 80160b8:	3718      	adds	r7, #24
 80160ba:	46bd      	mov	sp, r7
 80160bc:	bd80      	pop	{r7, pc}
	...

080160c0 <lwip_netconn_do_close_internal>:
 *
 * @param conn the TCP netconn to close
 */
static err_t
lwip_netconn_do_close_internal(struct netconn *conn  WRITE_DELAYED_PARAM)
{
 80160c0:	b580      	push	{r7, lr}
 80160c2:	b086      	sub	sp, #24
 80160c4:	af00      	add	r7, sp, #0
 80160c6:	6078      	str	r0, [r7, #4]
 80160c8:	460b      	mov	r3, r1
 80160ca:	70fb      	strb	r3, [r7, #3]
  err_t err;
  u8_t shut, shut_rx, shut_tx, shut_close;
  u8_t close_finished = 0;
 80160cc:	2300      	movs	r3, #0
 80160ce:	757b      	strb	r3, [r7, #21]
  struct tcp_pcb *tpcb;
#if LWIP_SO_LINGER
  u8_t linger_wait_required = 0;
#endif /* LWIP_SO_LINGER */

  LWIP_ASSERT("invalid conn", (conn != NULL));
 80160d0:	687b      	ldr	r3, [r7, #4]
 80160d2:	2b00      	cmp	r3, #0
 80160d4:	d106      	bne.n	80160e4 <lwip_netconn_do_close_internal+0x24>
 80160d6:	4b87      	ldr	r3, [pc, #540]	@ (80162f4 <lwip_netconn_do_close_internal+0x234>)
 80160d8:	f240 32a2 	movw	r2, #930	@ 0x3a2
 80160dc:	4986      	ldr	r1, [pc, #536]	@ (80162f8 <lwip_netconn_do_close_internal+0x238>)
 80160de:	4887      	ldr	r0, [pc, #540]	@ (80162fc <lwip_netconn_do_close_internal+0x23c>)
 80160e0:	f013 fa14 	bl	802950c <iprintf>
  LWIP_ASSERT("this is for tcp netconns only", (NETCONNTYPE_GROUP(conn->type) == NETCONN_TCP));
 80160e4:	687b      	ldr	r3, [r7, #4]
 80160e6:	781b      	ldrb	r3, [r3, #0]
 80160e8:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 80160ec:	2b10      	cmp	r3, #16
 80160ee:	d006      	beq.n	80160fe <lwip_netconn_do_close_internal+0x3e>
 80160f0:	4b80      	ldr	r3, [pc, #512]	@ (80162f4 <lwip_netconn_do_close_internal+0x234>)
 80160f2:	f240 32a3 	movw	r2, #931	@ 0x3a3
 80160f6:	4982      	ldr	r1, [pc, #520]	@ (8016300 <lwip_netconn_do_close_internal+0x240>)
 80160f8:	4880      	ldr	r0, [pc, #512]	@ (80162fc <lwip_netconn_do_close_internal+0x23c>)
 80160fa:	f013 fa07 	bl	802950c <iprintf>
  LWIP_ASSERT("conn must be in state NETCONN_CLOSE", (conn->state == NETCONN_CLOSE));
 80160fe:	687b      	ldr	r3, [r7, #4]
 8016100:	785b      	ldrb	r3, [r3, #1]
 8016102:	2b04      	cmp	r3, #4
 8016104:	d006      	beq.n	8016114 <lwip_netconn_do_close_internal+0x54>
 8016106:	4b7b      	ldr	r3, [pc, #492]	@ (80162f4 <lwip_netconn_do_close_internal+0x234>)
 8016108:	f44f 7269 	mov.w	r2, #932	@ 0x3a4
 801610c:	497d      	ldr	r1, [pc, #500]	@ (8016304 <lwip_netconn_do_close_internal+0x244>)
 801610e:	487b      	ldr	r0, [pc, #492]	@ (80162fc <lwip_netconn_do_close_internal+0x23c>)
 8016110:	f013 f9fc 	bl	802950c <iprintf>
  LWIP_ASSERT("pcb already closed", (conn->pcb.tcp != NULL));
 8016114:	687b      	ldr	r3, [r7, #4]
 8016116:	685b      	ldr	r3, [r3, #4]
 8016118:	2b00      	cmp	r3, #0
 801611a:	d106      	bne.n	801612a <lwip_netconn_do_close_internal+0x6a>
 801611c:	4b75      	ldr	r3, [pc, #468]	@ (80162f4 <lwip_netconn_do_close_internal+0x234>)
 801611e:	f240 32a5 	movw	r2, #933	@ 0x3a5
 8016122:	4979      	ldr	r1, [pc, #484]	@ (8016308 <lwip_netconn_do_close_internal+0x248>)
 8016124:	4875      	ldr	r0, [pc, #468]	@ (80162fc <lwip_netconn_do_close_internal+0x23c>)
 8016126:	f013 f9f1 	bl	802950c <iprintf>
  LWIP_ASSERT("conn->current_msg != NULL", conn->current_msg != NULL);
 801612a:	687b      	ldr	r3, [r7, #4]
 801612c:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 801612e:	2b00      	cmp	r3, #0
 8016130:	d106      	bne.n	8016140 <lwip_netconn_do_close_internal+0x80>
 8016132:	4b70      	ldr	r3, [pc, #448]	@ (80162f4 <lwip_netconn_do_close_internal+0x234>)
 8016134:	f240 32a6 	movw	r2, #934	@ 0x3a6
 8016138:	4974      	ldr	r1, [pc, #464]	@ (801630c <lwip_netconn_do_close_internal+0x24c>)
 801613a:	4870      	ldr	r0, [pc, #448]	@ (80162fc <lwip_netconn_do_close_internal+0x23c>)
 801613c:	f013 f9e6 	bl	802950c <iprintf>

  tpcb = conn->pcb.tcp;
 8016140:	687b      	ldr	r3, [r7, #4]
 8016142:	685b      	ldr	r3, [r3, #4]
 8016144:	613b      	str	r3, [r7, #16]
  shut = conn->current_msg->msg.sd.shut;
 8016146:	687b      	ldr	r3, [r7, #4]
 8016148:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 801614a:	7a1b      	ldrb	r3, [r3, #8]
 801614c:	73fb      	strb	r3, [r7, #15]
  shut_rx = shut & NETCONN_SHUT_RD;
 801614e:	7bfb      	ldrb	r3, [r7, #15]
 8016150:	f003 0301 	and.w	r3, r3, #1
 8016154:	73bb      	strb	r3, [r7, #14]
  shut_tx = shut & NETCONN_SHUT_WR;
 8016156:	7bfb      	ldrb	r3, [r7, #15]
 8016158:	f003 0302 	and.w	r3, r3, #2
 801615c:	737b      	strb	r3, [r7, #13]
  /* shutting down both ends is the same as closing
     (also if RD or WR side was shut down before already) */
  if (shut == NETCONN_SHUT_RDWR) {
 801615e:	7bfb      	ldrb	r3, [r7, #15]
 8016160:	2b03      	cmp	r3, #3
 8016162:	d102      	bne.n	801616a <lwip_netconn_do_close_internal+0xaa>
    shut_close = 1;
 8016164:	2301      	movs	r3, #1
 8016166:	75bb      	strb	r3, [r7, #22]
 8016168:	e01f      	b.n	80161aa <lwip_netconn_do_close_internal+0xea>
  } else if (shut_rx &&
 801616a:	7bbb      	ldrb	r3, [r7, #14]
 801616c:	2b00      	cmp	r3, #0
 801616e:	d00e      	beq.n	801618e <lwip_netconn_do_close_internal+0xce>
             ((tpcb->state == FIN_WAIT_1) ||
 8016170:	693b      	ldr	r3, [r7, #16]
 8016172:	7d1b      	ldrb	r3, [r3, #20]
  } else if (shut_rx &&
 8016174:	2b05      	cmp	r3, #5
 8016176:	d007      	beq.n	8016188 <lwip_netconn_do_close_internal+0xc8>
              (tpcb->state == FIN_WAIT_2) ||
 8016178:	693b      	ldr	r3, [r7, #16]
 801617a:	7d1b      	ldrb	r3, [r3, #20]
             ((tpcb->state == FIN_WAIT_1) ||
 801617c:	2b06      	cmp	r3, #6
 801617e:	d003      	beq.n	8016188 <lwip_netconn_do_close_internal+0xc8>
              (tpcb->state == CLOSING))) {
 8016180:	693b      	ldr	r3, [r7, #16]
 8016182:	7d1b      	ldrb	r3, [r3, #20]
              (tpcb->state == FIN_WAIT_2) ||
 8016184:	2b08      	cmp	r3, #8
 8016186:	d102      	bne.n	801618e <lwip_netconn_do_close_internal+0xce>
    shut_close = 1;
 8016188:	2301      	movs	r3, #1
 801618a:	75bb      	strb	r3, [r7, #22]
 801618c:	e00d      	b.n	80161aa <lwip_netconn_do_close_internal+0xea>
  } else if (shut_tx && ((tpcb->flags & TF_RXCLOSED) != 0)) {
 801618e:	7b7b      	ldrb	r3, [r7, #13]
 8016190:	2b00      	cmp	r3, #0
 8016192:	d008      	beq.n	80161a6 <lwip_netconn_do_close_internal+0xe6>
 8016194:	693b      	ldr	r3, [r7, #16]
 8016196:	8b5b      	ldrh	r3, [r3, #26]
 8016198:	f003 0310 	and.w	r3, r3, #16
 801619c:	2b00      	cmp	r3, #0
 801619e:	d002      	beq.n	80161a6 <lwip_netconn_do_close_internal+0xe6>
    shut_close = 1;
 80161a0:	2301      	movs	r3, #1
 80161a2:	75bb      	strb	r3, [r7, #22]
 80161a4:	e001      	b.n	80161aa <lwip_netconn_do_close_internal+0xea>
  } else {
    shut_close = 0;
 80161a6:	2300      	movs	r3, #0
 80161a8:	75bb      	strb	r3, [r7, #22]
  }

  /* Set back some callback pointers */
  if (shut_close) {
 80161aa:	7dbb      	ldrb	r3, [r7, #22]
 80161ac:	2b00      	cmp	r3, #0
 80161ae:	d003      	beq.n	80161b8 <lwip_netconn_do_close_internal+0xf8>
    tcp_arg(tpcb, NULL);
 80161b0:	2100      	movs	r1, #0
 80161b2:	6938      	ldr	r0, [r7, #16]
 80161b4:	f005 fd88 	bl	801bcc8 <tcp_arg>
  }
  if (tpcb->state == LISTEN) {
 80161b8:	693b      	ldr	r3, [r7, #16]
 80161ba:	7d1b      	ldrb	r3, [r3, #20]
 80161bc:	2b01      	cmp	r3, #1
 80161be:	d104      	bne.n	80161ca <lwip_netconn_do_close_internal+0x10a>
    tcp_accept(tpcb, NULL);
 80161c0:	2100      	movs	r1, #0
 80161c2:	6938      	ldr	r0, [r7, #16]
 80161c4:	f005 fdfe 	bl	801bdc4 <tcp_accept>
 80161c8:	e01d      	b.n	8016206 <lwip_netconn_do_close_internal+0x146>
  } else {
    /* some callbacks have to be reset if tcp_close is not successful */
    if (shut_rx) {
 80161ca:	7bbb      	ldrb	r3, [r7, #14]
 80161cc:	2b00      	cmp	r3, #0
 80161ce:	d007      	beq.n	80161e0 <lwip_netconn_do_close_internal+0x120>
      tcp_recv(tpcb, NULL);
 80161d0:	2100      	movs	r1, #0
 80161d2:	6938      	ldr	r0, [r7, #16]
 80161d4:	f005 fd8a 	bl	801bcec <tcp_recv>
      tcp_accept(tpcb, NULL);
 80161d8:	2100      	movs	r1, #0
 80161da:	6938      	ldr	r0, [r7, #16]
 80161dc:	f005 fdf2 	bl	801bdc4 <tcp_accept>
    }
    if (shut_tx) {
 80161e0:	7b7b      	ldrb	r3, [r7, #13]
 80161e2:	2b00      	cmp	r3, #0
 80161e4:	d003      	beq.n	80161ee <lwip_netconn_do_close_internal+0x12e>
      tcp_sent(tpcb, NULL);
 80161e6:	2100      	movs	r1, #0
 80161e8:	6938      	ldr	r0, [r7, #16]
 80161ea:	f005 fda3 	bl	801bd34 <tcp_sent>
    }
    if (shut_close) {
 80161ee:	7dbb      	ldrb	r3, [r7, #22]
 80161f0:	2b00      	cmp	r3, #0
 80161f2:	d008      	beq.n	8016206 <lwip_netconn_do_close_internal+0x146>
      tcp_poll(tpcb, NULL, 0);
 80161f4:	2200      	movs	r2, #0
 80161f6:	2100      	movs	r1, #0
 80161f8:	6938      	ldr	r0, [r7, #16]
 80161fa:	f005 fdfb 	bl	801bdf4 <tcp_poll>
      tcp_err(tpcb, NULL);
 80161fe:	2100      	movs	r1, #0
 8016200:	6938      	ldr	r0, [r7, #16]
 8016202:	f005 fdbb 	bl	801bd7c <tcp_err>
    }
  }
  /* Try to close the connection */
  if (shut_close) {
 8016206:	7dbb      	ldrb	r3, [r7, #22]
 8016208:	2b00      	cmp	r3, #0
 801620a:	d005      	beq.n	8016218 <lwip_netconn_do_close_internal+0x158>
      }
    }
    if ((err == ERR_OK) && (tpcb != NULL))
#endif /* LWIP_SO_LINGER */
    {
      err = tcp_close(tpcb);
 801620c:	6938      	ldr	r0, [r7, #16]
 801620e:	f004 fbbf 	bl	801a990 <tcp_close>
 8016212:	4603      	mov	r3, r0
 8016214:	75fb      	strb	r3, [r7, #23]
 8016216:	e007      	b.n	8016228 <lwip_netconn_do_close_internal+0x168>
    }
  } else {
    err = tcp_shutdown(tpcb, shut_rx, shut_tx);
 8016218:	7bbb      	ldrb	r3, [r7, #14]
 801621a:	7b7a      	ldrb	r2, [r7, #13]
 801621c:	4619      	mov	r1, r3
 801621e:	6938      	ldr	r0, [r7, #16]
 8016220:	f004 fbe4 	bl	801a9ec <tcp_shutdown>
 8016224:	4603      	mov	r3, r0
 8016226:	75fb      	strb	r3, [r7, #23]
  }
  if (err == ERR_OK) {
 8016228:	f997 3017 	ldrsb.w	r3, [r7, #23]
 801622c:	2b00      	cmp	r3, #0
 801622e:	d102      	bne.n	8016236 <lwip_netconn_do_close_internal+0x176>
    close_finished = 1;
 8016230:	2301      	movs	r3, #1
 8016232:	757b      	strb	r3, [r7, #21]
 8016234:	e016      	b.n	8016264 <lwip_netconn_do_close_internal+0x1a4>
      close_finished = 0;
      err = ERR_INPROGRESS;
    }
#endif /* LWIP_SO_LINGER */
  } else {
    if (err == ERR_MEM) {
 8016236:	f997 3017 	ldrsb.w	r3, [r7, #23]
 801623a:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 801623e:	d10f      	bne.n	8016260 <lwip_netconn_do_close_internal+0x1a0>
        close_timeout = conn->linger * 1000U;
      }
#endif
      if ((s32_t)(sys_now() - conn->current_msg->msg.sd.time_started) >= close_timeout) {
#else /* LWIP_SO_SNDTIMEO || LWIP_SO_LINGER */
      if (conn->current_msg->msg.sd.polls_left == 0) {
 8016240:	687b      	ldr	r3, [r7, #4]
 8016242:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016244:	7a5b      	ldrb	r3, [r3, #9]
 8016246:	2b00      	cmp	r3, #0
 8016248:	d10c      	bne.n	8016264 <lwip_netconn_do_close_internal+0x1a4>
#endif /* LWIP_SO_SNDTIMEO || LWIP_SO_LINGER */
        close_finished = 1;
 801624a:	2301      	movs	r3, #1
 801624c:	757b      	strb	r3, [r7, #21]
        if (shut_close) {
 801624e:	7dbb      	ldrb	r3, [r7, #22]
 8016250:	2b00      	cmp	r3, #0
 8016252:	d007      	beq.n	8016264 <lwip_netconn_do_close_internal+0x1a4>
          /* in this case, we want to RST the connection */
          tcp_abort(tpcb);
 8016254:	6938      	ldr	r0, [r7, #16]
 8016256:	f004 fce7 	bl	801ac28 <tcp_abort>
          err = ERR_OK;
 801625a:	2300      	movs	r3, #0
 801625c:	75fb      	strb	r3, [r7, #23]
 801625e:	e001      	b.n	8016264 <lwip_netconn_do_close_internal+0x1a4>
        }
      }
    } else {
      /* Closing failed for a non-memory error: give up */
      close_finished = 1;
 8016260:	2301      	movs	r3, #1
 8016262:	757b      	strb	r3, [r7, #21]
    }
  }
  if (close_finished) {
 8016264:	7d7b      	ldrb	r3, [r7, #21]
 8016266:	2b00      	cmp	r3, #0
 8016268:	d052      	beq.n	8016310 <lwip_netconn_do_close_internal+0x250>
    /* Closing done (succeeded, non-memory error, nonblocking error or timeout) */
    sys_sem_t *op_completed_sem = LWIP_API_MSG_SEM(conn->current_msg);
 801626a:	687b      	ldr	r3, [r7, #4]
 801626c:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 801626e:	681b      	ldr	r3, [r3, #0]
 8016270:	330c      	adds	r3, #12
 8016272:	60bb      	str	r3, [r7, #8]
    conn->current_msg->err = err;
 8016274:	687b      	ldr	r3, [r7, #4]
 8016276:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016278:	7dfa      	ldrb	r2, [r7, #23]
 801627a:	711a      	strb	r2, [r3, #4]
    conn->current_msg = NULL;
 801627c:	687b      	ldr	r3, [r7, #4]
 801627e:	2200      	movs	r2, #0
 8016280:	62da      	str	r2, [r3, #44]	@ 0x2c
    conn->state = NETCONN_NONE;
 8016282:	687b      	ldr	r3, [r7, #4]
 8016284:	2200      	movs	r2, #0
 8016286:	705a      	strb	r2, [r3, #1]
    if (err == ERR_OK) {
 8016288:	f997 3017 	ldrsb.w	r3, [r7, #23]
 801628c:	2b00      	cmp	r3, #0
 801628e:	d129      	bne.n	80162e4 <lwip_netconn_do_close_internal+0x224>
      if (shut_close) {
 8016290:	7dbb      	ldrb	r3, [r7, #22]
 8016292:	2b00      	cmp	r3, #0
 8016294:	d00c      	beq.n	80162b0 <lwip_netconn_do_close_internal+0x1f0>
        /* Set back some callback pointers as conn is going away */
        conn->pcb.tcp = NULL;
 8016296:	687b      	ldr	r3, [r7, #4]
 8016298:	2200      	movs	r2, #0
 801629a:	605a      	str	r2, [r3, #4]
        /* Trigger select() in socket layer. Make sure everybody notices activity
         on the connection, error first! */
        API_EVENT(conn, NETCONN_EVT_ERROR, 0);
 801629c:	687b      	ldr	r3, [r7, #4]
 801629e:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 80162a0:	2b00      	cmp	r3, #0
 80162a2:	d005      	beq.n	80162b0 <lwip_netconn_do_close_internal+0x1f0>
 80162a4:	687b      	ldr	r3, [r7, #4]
 80162a6:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 80162a8:	2200      	movs	r2, #0
 80162aa:	2104      	movs	r1, #4
 80162ac:	6878      	ldr	r0, [r7, #4]
 80162ae:	4798      	blx	r3
      }
      if (shut_rx) {
 80162b0:	7bbb      	ldrb	r3, [r7, #14]
 80162b2:	2b00      	cmp	r3, #0
 80162b4:	d009      	beq.n	80162ca <lwip_netconn_do_close_internal+0x20a>
        API_EVENT(conn, NETCONN_EVT_RCVPLUS, 0);
 80162b6:	687b      	ldr	r3, [r7, #4]
 80162b8:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 80162ba:	2b00      	cmp	r3, #0
 80162bc:	d005      	beq.n	80162ca <lwip_netconn_do_close_internal+0x20a>
 80162be:	687b      	ldr	r3, [r7, #4]
 80162c0:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 80162c2:	2200      	movs	r2, #0
 80162c4:	2100      	movs	r1, #0
 80162c6:	6878      	ldr	r0, [r7, #4]
 80162c8:	4798      	blx	r3
      }
      if (shut_tx) {
 80162ca:	7b7b      	ldrb	r3, [r7, #13]
 80162cc:	2b00      	cmp	r3, #0
 80162ce:	d009      	beq.n	80162e4 <lwip_netconn_do_close_internal+0x224>
        API_EVENT(conn, NETCONN_EVT_SENDPLUS, 0);
 80162d0:	687b      	ldr	r3, [r7, #4]
 80162d2:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 80162d4:	2b00      	cmp	r3, #0
 80162d6:	d005      	beq.n	80162e4 <lwip_netconn_do_close_internal+0x224>
 80162d8:	687b      	ldr	r3, [r7, #4]
 80162da:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 80162dc:	2200      	movs	r2, #0
 80162de:	2102      	movs	r1, #2
 80162e0:	6878      	ldr	r0, [r7, #4]
 80162e2:	4798      	blx	r3
      }
    }
#if LWIP_TCPIP_CORE_LOCKING
    if (delayed)
 80162e4:	78fb      	ldrb	r3, [r7, #3]
 80162e6:	2b00      	cmp	r3, #0
 80162e8:	d002      	beq.n	80162f0 <lwip_netconn_do_close_internal+0x230>
#endif
    {
      /* wake up the application task */
      sys_sem_signal(op_completed_sem);
 80162ea:	68b8      	ldr	r0, [r7, #8]
 80162ec:	f00f fde2 	bl	8025eb4 <sys_sem_signal>
    }
    return ERR_OK;
 80162f0:	2300      	movs	r3, #0
 80162f2:	e03c      	b.n	801636e <lwip_netconn_do_close_internal+0x2ae>
 80162f4:	0802ca70 	.word	0x0802ca70
 80162f8:	0802cd44 	.word	0x0802cd44
 80162fc:	0802cab4 	.word	0x0802cab4
 8016300:	0802cd54 	.word	0x0802cd54
 8016304:	0802cd74 	.word	0x0802cd74
 8016308:	0802cd98 	.word	0x0802cd98
 801630c:	0802cbd8 	.word	0x0802cbd8
  }
  if (!close_finished) {
 8016310:	7d7b      	ldrb	r3, [r7, #21]
 8016312:	2b00      	cmp	r3, #0
 8016314:	d11e      	bne.n	8016354 <lwip_netconn_do_close_internal+0x294>
    /* Closing failed and we want to wait: restore some of the callbacks */
    /* Closing of listen pcb will never fail! */
    LWIP_ASSERT("Closing a listen pcb may not fail!", (tpcb->state != LISTEN));
 8016316:	693b      	ldr	r3, [r7, #16]
 8016318:	7d1b      	ldrb	r3, [r3, #20]
 801631a:	2b01      	cmp	r3, #1
 801631c:	d106      	bne.n	801632c <lwip_netconn_do_close_internal+0x26c>
 801631e:	4b16      	ldr	r3, [pc, #88]	@ (8016378 <lwip_netconn_do_close_internal+0x2b8>)
 8016320:	f240 4241 	movw	r2, #1089	@ 0x441
 8016324:	4915      	ldr	r1, [pc, #84]	@ (801637c <lwip_netconn_do_close_internal+0x2bc>)
 8016326:	4816      	ldr	r0, [pc, #88]	@ (8016380 <lwip_netconn_do_close_internal+0x2c0>)
 8016328:	f013 f8f0 	bl	802950c <iprintf>
    if (shut_tx) {
 801632c:	7b7b      	ldrb	r3, [r7, #13]
 801632e:	2b00      	cmp	r3, #0
 8016330:	d003      	beq.n	801633a <lwip_netconn_do_close_internal+0x27a>
      tcp_sent(tpcb, sent_tcp);
 8016332:	4914      	ldr	r1, [pc, #80]	@ (8016384 <lwip_netconn_do_close_internal+0x2c4>)
 8016334:	6938      	ldr	r0, [r7, #16]
 8016336:	f005 fcfd 	bl	801bd34 <tcp_sent>
    }
    /* when waiting for close, set up poll interval to 500ms */
    tcp_poll(tpcb, poll_tcp, 1);
 801633a:	2201      	movs	r2, #1
 801633c:	4912      	ldr	r1, [pc, #72]	@ (8016388 <lwip_netconn_do_close_internal+0x2c8>)
 801633e:	6938      	ldr	r0, [r7, #16]
 8016340:	f005 fd58 	bl	801bdf4 <tcp_poll>
    tcp_err(tpcb, err_tcp);
 8016344:	4911      	ldr	r1, [pc, #68]	@ (801638c <lwip_netconn_do_close_internal+0x2cc>)
 8016346:	6938      	ldr	r0, [r7, #16]
 8016348:	f005 fd18 	bl	801bd7c <tcp_err>
    tcp_arg(tpcb, conn);
 801634c:	6879      	ldr	r1, [r7, #4]
 801634e:	6938      	ldr	r0, [r7, #16]
 8016350:	f005 fcba 	bl	801bcc8 <tcp_arg>
    /* don't restore recv callback: we don't want to receive any more data */
  }
  /* If closing didn't succeed, we get called again either
     from poll_tcp or from sent_tcp */
  LWIP_ASSERT("err != ERR_OK", err != ERR_OK);
 8016354:	f997 3017 	ldrsb.w	r3, [r7, #23]
 8016358:	2b00      	cmp	r3, #0
 801635a:	d106      	bne.n	801636a <lwip_netconn_do_close_internal+0x2aa>
 801635c:	4b06      	ldr	r3, [pc, #24]	@ (8016378 <lwip_netconn_do_close_internal+0x2b8>)
 801635e:	f240 424d 	movw	r2, #1101	@ 0x44d
 8016362:	490b      	ldr	r1, [pc, #44]	@ (8016390 <lwip_netconn_do_close_internal+0x2d0>)
 8016364:	4806      	ldr	r0, [pc, #24]	@ (8016380 <lwip_netconn_do_close_internal+0x2c0>)
 8016366:	f013 f8d1 	bl	802950c <iprintf>
  return err;
 801636a:	f997 3017 	ldrsb.w	r3, [r7, #23]
}
 801636e:	4618      	mov	r0, r3
 8016370:	3718      	adds	r7, #24
 8016372:	46bd      	mov	sp, r7
 8016374:	bd80      	pop	{r7, pc}
 8016376:	bf00      	nop
 8016378:	0802ca70 	.word	0x0802ca70
 801637c:	0802cdac 	.word	0x0802cdac
 8016380:	0802cab4 	.word	0x0802cab4
 8016384:	08015a89 	.word	0x08015a89
 8016388:	080159b9 	.word	0x080159b9
 801638c:	08015b39 	.word	0x08015b39
 8016390:	0802cdd0 	.word	0x0802cdd0

08016394 <lwip_netconn_do_delconn>:
 *
 * @param m the api_msg pointing to the connection
 */
void
lwip_netconn_do_delconn(void *m)
{
 8016394:	b580      	push	{r7, lr}
 8016396:	b084      	sub	sp, #16
 8016398:	af00      	add	r7, sp, #0
 801639a:	6078      	str	r0, [r7, #4]
  struct api_msg *msg = (struct api_msg *)m;
 801639c:	687b      	ldr	r3, [r7, #4]
 801639e:	60fb      	str	r3, [r7, #12]

  enum netconn_state state = msg->conn->state;
 80163a0:	68fb      	ldr	r3, [r7, #12]
 80163a2:	681b      	ldr	r3, [r3, #0]
 80163a4:	785b      	ldrb	r3, [r3, #1]
 80163a6:	72fb      	strb	r3, [r7, #11]
  LWIP_ASSERT("netconn state error", /* this only happens for TCP netconns */
 80163a8:	7afb      	ldrb	r3, [r7, #11]
 80163aa:	2b00      	cmp	r3, #0
 80163ac:	d00d      	beq.n	80163ca <lwip_netconn_do_delconn+0x36>
 80163ae:	68fb      	ldr	r3, [r7, #12]
 80163b0:	681b      	ldr	r3, [r3, #0]
 80163b2:	781b      	ldrb	r3, [r3, #0]
 80163b4:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 80163b8:	2b10      	cmp	r3, #16
 80163ba:	d006      	beq.n	80163ca <lwip_netconn_do_delconn+0x36>
 80163bc:	4b60      	ldr	r3, [pc, #384]	@ (8016540 <lwip_netconn_do_delconn+0x1ac>)
 80163be:	f240 425e 	movw	r2, #1118	@ 0x45e
 80163c2:	4960      	ldr	r1, [pc, #384]	@ (8016544 <lwip_netconn_do_delconn+0x1b0>)
 80163c4:	4860      	ldr	r0, [pc, #384]	@ (8016548 <lwip_netconn_do_delconn+0x1b4>)
 80163c6:	f013 f8a1 	bl	802950c <iprintf>
      msg->conn->state = NETCONN_NONE;
      sys_sem_signal(op_completed_sem);
    }
  }
#else /* LWIP_NETCONN_FULLDUPLEX */
  if (((state != NETCONN_NONE) &&
 80163ca:	7afb      	ldrb	r3, [r7, #11]
 80163cc:	2b00      	cmp	r3, #0
 80163ce:	d005      	beq.n	80163dc <lwip_netconn_do_delconn+0x48>
 80163d0:	7afb      	ldrb	r3, [r7, #11]
 80163d2:	2b02      	cmp	r3, #2
 80163d4:	d002      	beq.n	80163dc <lwip_netconn_do_delconn+0x48>
       (state != NETCONN_LISTEN) &&
 80163d6:	7afb      	ldrb	r3, [r7, #11]
 80163d8:	2b03      	cmp	r3, #3
 80163da:	d10a      	bne.n	80163f2 <lwip_netconn_do_delconn+0x5e>
       (state != NETCONN_CONNECT)) ||
 80163dc:	7afb      	ldrb	r3, [r7, #11]
 80163de:	2b03      	cmp	r3, #3
 80163e0:	d10b      	bne.n	80163fa <lwip_netconn_do_delconn+0x66>
      ((state == NETCONN_CONNECT) && !IN_NONBLOCKING_CONNECT(msg->conn))) {
 80163e2:	68fb      	ldr	r3, [r7, #12]
 80163e4:	681b      	ldr	r3, [r3, #0]
 80163e6:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 80163ea:	f003 0304 	and.w	r3, r3, #4
 80163ee:	2b00      	cmp	r3, #0
 80163f0:	d103      	bne.n	80163fa <lwip_netconn_do_delconn+0x66>
    /* This means either a blocking write or blocking connect is running
       (nonblocking write returns and sets state to NONE) */
    msg->err = ERR_INPROGRESS;
 80163f2:	68fb      	ldr	r3, [r7, #12]
 80163f4:	22fb      	movs	r2, #251	@ 0xfb
 80163f6:	711a      	strb	r2, [r3, #4]
 80163f8:	e096      	b.n	8016528 <lwip_netconn_do_delconn+0x194>
  } else
#endif /* LWIP_NETCONN_FULLDUPLEX */
  {
    LWIP_ASSERT("blocking connect in progress",
 80163fa:	7afb      	ldrb	r3, [r7, #11]
 80163fc:	2b03      	cmp	r3, #3
 80163fe:	d10e      	bne.n	801641e <lwip_netconn_do_delconn+0x8a>
 8016400:	68fb      	ldr	r3, [r7, #12]
 8016402:	681b      	ldr	r3, [r3, #0]
 8016404:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8016408:	f003 0304 	and.w	r3, r3, #4
 801640c:	2b00      	cmp	r3, #0
 801640e:	d106      	bne.n	801641e <lwip_netconn_do_delconn+0x8a>
 8016410:	4b4b      	ldr	r3, [pc, #300]	@ (8016540 <lwip_netconn_do_delconn+0x1ac>)
 8016412:	f240 427a 	movw	r2, #1146	@ 0x47a
 8016416:	494d      	ldr	r1, [pc, #308]	@ (801654c <lwip_netconn_do_delconn+0x1b8>)
 8016418:	484b      	ldr	r0, [pc, #300]	@ (8016548 <lwip_netconn_do_delconn+0x1b4>)
 801641a:	f013 f877 	bl	802950c <iprintf>
                (state != NETCONN_CONNECT) || IN_NONBLOCKING_CONNECT(msg->conn));
    msg->err = ERR_OK;
 801641e:	68fb      	ldr	r3, [r7, #12]
 8016420:	2200      	movs	r2, #0
 8016422:	711a      	strb	r2, [r3, #4]
#if LWIP_NETCONN_FULLDUPLEX
    /* Mark mboxes invalid */
    netconn_mark_mbox_invalid(msg->conn);
#else /* LWIP_NETCONN_FULLDUPLEX */
    netconn_drain(msg->conn);
 8016424:	68fb      	ldr	r3, [r7, #12]
 8016426:	681b      	ldr	r3, [r3, #0]
 8016428:	4618      	mov	r0, r3
 801642a:	f7ff fdcb 	bl	8015fc4 <netconn_drain>
#endif /* LWIP_NETCONN_FULLDUPLEX */

    if (msg->conn->pcb.tcp != NULL) {
 801642e:	68fb      	ldr	r3, [r7, #12]
 8016430:	681b      	ldr	r3, [r3, #0]
 8016432:	685b      	ldr	r3, [r3, #4]
 8016434:	2b00      	cmp	r3, #0
 8016436:	d05d      	beq.n	80164f4 <lwip_netconn_do_delconn+0x160>

      switch (NETCONNTYPE_GROUP(msg->conn->type)) {
 8016438:	68fb      	ldr	r3, [r7, #12]
 801643a:	681b      	ldr	r3, [r3, #0]
 801643c:	781b      	ldrb	r3, [r3, #0]
 801643e:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8016442:	2b10      	cmp	r3, #16
 8016444:	d00d      	beq.n	8016462 <lwip_netconn_do_delconn+0xce>
 8016446:	2b20      	cmp	r3, #32
 8016448:	d14f      	bne.n	80164ea <lwip_netconn_do_delconn+0x156>
          raw_remove(msg->conn->pcb.raw);
          break;
#endif /* LWIP_RAW */
#if LWIP_UDP
        case NETCONN_UDP:
          msg->conn->pcb.udp->recv_arg = NULL;
 801644a:	68fb      	ldr	r3, [r7, #12]
 801644c:	681b      	ldr	r3, [r3, #0]
 801644e:	685b      	ldr	r3, [r3, #4]
 8016450:	2200      	movs	r2, #0
 8016452:	61da      	str	r2, [r3, #28]
          udp_remove(msg->conn->pcb.udp);
 8016454:	68fb      	ldr	r3, [r7, #12]
 8016456:	681b      	ldr	r3, [r3, #0]
 8016458:	685b      	ldr	r3, [r3, #4]
 801645a:	4618      	mov	r0, r3
 801645c:	f00a ffc6 	bl	80213ec <udp_remove>
          break;
 8016460:	e044      	b.n	80164ec <lwip_netconn_do_delconn+0x158>
#endif /* LWIP_UDP */
#if LWIP_TCP
        case NETCONN_TCP:
          LWIP_ASSERT("already writing or closing", msg->conn->current_msg == NULL);
 8016462:	68fb      	ldr	r3, [r7, #12]
 8016464:	681b      	ldr	r3, [r3, #0]
 8016466:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016468:	2b00      	cmp	r3, #0
 801646a:	d006      	beq.n	801647a <lwip_netconn_do_delconn+0xe6>
 801646c:	4b34      	ldr	r3, [pc, #208]	@ (8016540 <lwip_netconn_do_delconn+0x1ac>)
 801646e:	f240 4294 	movw	r2, #1172	@ 0x494
 8016472:	4937      	ldr	r1, [pc, #220]	@ (8016550 <lwip_netconn_do_delconn+0x1bc>)
 8016474:	4834      	ldr	r0, [pc, #208]	@ (8016548 <lwip_netconn_do_delconn+0x1b4>)
 8016476:	f013 f849 	bl	802950c <iprintf>
          msg->conn->state = NETCONN_CLOSE;
 801647a:	68fb      	ldr	r3, [r7, #12]
 801647c:	681b      	ldr	r3, [r3, #0]
 801647e:	2204      	movs	r2, #4
 8016480:	705a      	strb	r2, [r3, #1]
          msg->msg.sd.shut = NETCONN_SHUT_RDWR;
 8016482:	68fb      	ldr	r3, [r7, #12]
 8016484:	2203      	movs	r2, #3
 8016486:	721a      	strb	r2, [r3, #8]
          msg->conn->current_msg = msg;
 8016488:	68fb      	ldr	r3, [r7, #12]
 801648a:	681b      	ldr	r3, [r3, #0]
 801648c:	68fa      	ldr	r2, [r7, #12]
 801648e:	62da      	str	r2, [r3, #44]	@ 0x2c
#if LWIP_TCPIP_CORE_LOCKING
          if (lwip_netconn_do_close_internal(msg->conn, 0) != ERR_OK) {
 8016490:	68fb      	ldr	r3, [r7, #12]
 8016492:	681b      	ldr	r3, [r3, #0]
 8016494:	2100      	movs	r1, #0
 8016496:	4618      	mov	r0, r3
 8016498:	f7ff fe12 	bl	80160c0 <lwip_netconn_do_close_internal>
 801649c:	4603      	mov	r3, r0
 801649e:	2b00      	cmp	r3, #0
 80164a0:	d049      	beq.n	8016536 <lwip_netconn_do_delconn+0x1a2>
            LWIP_ASSERT("state!", msg->conn->state == NETCONN_CLOSE);
 80164a2:	68fb      	ldr	r3, [r7, #12]
 80164a4:	681b      	ldr	r3, [r3, #0]
 80164a6:	785b      	ldrb	r3, [r3, #1]
 80164a8:	2b04      	cmp	r3, #4
 80164aa:	d006      	beq.n	80164ba <lwip_netconn_do_delconn+0x126>
 80164ac:	4b24      	ldr	r3, [pc, #144]	@ (8016540 <lwip_netconn_do_delconn+0x1ac>)
 80164ae:	f240 429a 	movw	r2, #1178	@ 0x49a
 80164b2:	4928      	ldr	r1, [pc, #160]	@ (8016554 <lwip_netconn_do_delconn+0x1c0>)
 80164b4:	4824      	ldr	r0, [pc, #144]	@ (8016548 <lwip_netconn_do_delconn+0x1b4>)
 80164b6:	f013 f829 	bl	802950c <iprintf>
            UNLOCK_TCPIP_CORE();
 80164ba:	f7f9 fdcb 	bl	8010054 <sys_unlock_tcpip_core>
            sys_arch_sem_wait(LWIP_API_MSG_SEM(msg), 0);
 80164be:	68fb      	ldr	r3, [r7, #12]
 80164c0:	681b      	ldr	r3, [r3, #0]
 80164c2:	330c      	adds	r3, #12
 80164c4:	2100      	movs	r1, #0
 80164c6:	4618      	mov	r0, r3
 80164c8:	f00f fcc3 	bl	8025e52 <sys_arch_sem_wait>
            LOCK_TCPIP_CORE();
 80164cc:	f7f9 fdb2 	bl	8010034 <sys_lock_tcpip_core>
            LWIP_ASSERT("state!", msg->conn->state == NETCONN_NONE);
 80164d0:	68fb      	ldr	r3, [r7, #12]
 80164d2:	681b      	ldr	r3, [r3, #0]
 80164d4:	785b      	ldrb	r3, [r3, #1]
 80164d6:	2b00      	cmp	r3, #0
 80164d8:	d02d      	beq.n	8016536 <lwip_netconn_do_delconn+0x1a2>
 80164da:	4b19      	ldr	r3, [pc, #100]	@ (8016540 <lwip_netconn_do_delconn+0x1ac>)
 80164dc:	f240 429e 	movw	r2, #1182	@ 0x49e
 80164e0:	491c      	ldr	r1, [pc, #112]	@ (8016554 <lwip_netconn_do_delconn+0x1c0>)
 80164e2:	4819      	ldr	r0, [pc, #100]	@ (8016548 <lwip_netconn_do_delconn+0x1b4>)
 80164e4:	f013 f812 	bl	802950c <iprintf>
#else /* LWIP_TCPIP_CORE_LOCKING */
          lwip_netconn_do_close_internal(msg->conn);
#endif /* LWIP_TCPIP_CORE_LOCKING */
          /* API_EVENT is called inside lwip_netconn_do_close_internal, before releasing
             the application thread, so we can return at this point! */
          return;
 80164e8:	e025      	b.n	8016536 <lwip_netconn_do_delconn+0x1a2>
#endif /* LWIP_TCP */
        default:
          break;
 80164ea:	bf00      	nop
      }
      msg->conn->pcb.tcp = NULL;
 80164ec:	68fb      	ldr	r3, [r7, #12]
 80164ee:	681b      	ldr	r3, [r3, #0]
 80164f0:	2200      	movs	r2, #0
 80164f2:	605a      	str	r2, [r3, #4]
    }
    /* tcp netconns don't come here! */

    /* @todo: this lets select make the socket readable and writable,
       which is wrong! errfd instead? */
    API_EVENT(msg->conn, NETCONN_EVT_RCVPLUS, 0);
 80164f4:	68fb      	ldr	r3, [r7, #12]
 80164f6:	681b      	ldr	r3, [r3, #0]
 80164f8:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 80164fa:	2b00      	cmp	r3, #0
 80164fc:	d007      	beq.n	801650e <lwip_netconn_do_delconn+0x17a>
 80164fe:	68fb      	ldr	r3, [r7, #12]
 8016500:	681b      	ldr	r3, [r3, #0]
 8016502:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8016504:	68fa      	ldr	r2, [r7, #12]
 8016506:	6810      	ldr	r0, [r2, #0]
 8016508:	2200      	movs	r2, #0
 801650a:	2100      	movs	r1, #0
 801650c:	4798      	blx	r3
    API_EVENT(msg->conn, NETCONN_EVT_SENDPLUS, 0);
 801650e:	68fb      	ldr	r3, [r7, #12]
 8016510:	681b      	ldr	r3, [r3, #0]
 8016512:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8016514:	2b00      	cmp	r3, #0
 8016516:	d007      	beq.n	8016528 <lwip_netconn_do_delconn+0x194>
 8016518:	68fb      	ldr	r3, [r7, #12]
 801651a:	681b      	ldr	r3, [r3, #0]
 801651c:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 801651e:	68fa      	ldr	r2, [r7, #12]
 8016520:	6810      	ldr	r0, [r2, #0]
 8016522:	2200      	movs	r2, #0
 8016524:	2102      	movs	r1, #2
 8016526:	4798      	blx	r3
  }
  if (sys_sem_valid(LWIP_API_MSG_SEM(msg))) {
 8016528:	68fb      	ldr	r3, [r7, #12]
 801652a:	681b      	ldr	r3, [r3, #0]
 801652c:	330c      	adds	r3, #12
 801652e:	4618      	mov	r0, r3
 8016530:	f00f fcda 	bl	8025ee8 <sys_sem_valid>
 8016534:	e000      	b.n	8016538 <lwip_netconn_do_delconn+0x1a4>
          return;
 8016536:	bf00      	nop
    TCPIP_APIMSG_ACK(msg);
  }
}
 8016538:	3710      	adds	r7, #16
 801653a:	46bd      	mov	sp, r7
 801653c:	bd80      	pop	{r7, pc}
 801653e:	bf00      	nop
 8016540:	0802ca70 	.word	0x0802ca70
 8016544:	0802cde0 	.word	0x0802cde0
 8016548:	0802cab4 	.word	0x0802cab4
 801654c:	0802cdf4 	.word	0x0802cdf4
 8016550:	0802ce14 	.word	0x0802ce14
 8016554:	0802ce30 	.word	0x0802ce30

08016558 <lwip_netconn_do_connected>:
 *
 * @see tcp.h (struct tcp_pcb.connected) for parameters and return values
 */
static err_t
lwip_netconn_do_connected(void *arg, struct tcp_pcb *pcb, err_t err)
{
 8016558:	b580      	push	{r7, lr}
 801655a:	b088      	sub	sp, #32
 801655c:	af00      	add	r7, sp, #0
 801655e:	60f8      	str	r0, [r7, #12]
 8016560:	60b9      	str	r1, [r7, #8]
 8016562:	4613      	mov	r3, r2
 8016564:	71fb      	strb	r3, [r7, #7]
  struct netconn *conn;
  int was_blocking;
  sys_sem_t *op_completed_sem = NULL;
 8016566:	2300      	movs	r3, #0
 8016568:	61fb      	str	r3, [r7, #28]

  LWIP_UNUSED_ARG(pcb);

  conn = (struct netconn *)arg;
 801656a:	68fb      	ldr	r3, [r7, #12]
 801656c:	61bb      	str	r3, [r7, #24]

  if (conn == NULL) {
 801656e:	69bb      	ldr	r3, [r7, #24]
 8016570:	2b00      	cmp	r3, #0
 8016572:	d102      	bne.n	801657a <lwip_netconn_do_connected+0x22>
    return ERR_VAL;
 8016574:	f06f 0305 	mvn.w	r3, #5
 8016578:	e074      	b.n	8016664 <lwip_netconn_do_connected+0x10c>
  }

  LWIP_ASSERT("conn->state == NETCONN_CONNECT", conn->state == NETCONN_CONNECT);
 801657a:	69bb      	ldr	r3, [r7, #24]
 801657c:	785b      	ldrb	r3, [r3, #1]
 801657e:	2b03      	cmp	r3, #3
 8016580:	d006      	beq.n	8016590 <lwip_netconn_do_connected+0x38>
 8016582:	4b3a      	ldr	r3, [pc, #232]	@ (801666c <lwip_netconn_do_connected+0x114>)
 8016584:	f240 5223 	movw	r2, #1315	@ 0x523
 8016588:	4939      	ldr	r1, [pc, #228]	@ (8016670 <lwip_netconn_do_connected+0x118>)
 801658a:	483a      	ldr	r0, [pc, #232]	@ (8016674 <lwip_netconn_do_connected+0x11c>)
 801658c:	f012 ffbe 	bl	802950c <iprintf>
  LWIP_ASSERT("(conn->current_msg != NULL) || conn->in_non_blocking_connect",
 8016590:	69bb      	ldr	r3, [r7, #24]
 8016592:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016594:	2b00      	cmp	r3, #0
 8016596:	d10d      	bne.n	80165b4 <lwip_netconn_do_connected+0x5c>
 8016598:	69bb      	ldr	r3, [r7, #24]
 801659a:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 801659e:	f003 0304 	and.w	r3, r3, #4
 80165a2:	2b00      	cmp	r3, #0
 80165a4:	d106      	bne.n	80165b4 <lwip_netconn_do_connected+0x5c>
 80165a6:	4b31      	ldr	r3, [pc, #196]	@ (801666c <lwip_netconn_do_connected+0x114>)
 80165a8:	f240 5224 	movw	r2, #1316	@ 0x524
 80165ac:	4932      	ldr	r1, [pc, #200]	@ (8016678 <lwip_netconn_do_connected+0x120>)
 80165ae:	4831      	ldr	r0, [pc, #196]	@ (8016674 <lwip_netconn_do_connected+0x11c>)
 80165b0:	f012 ffac 	bl	802950c <iprintf>
              (conn->current_msg != NULL) || IN_NONBLOCKING_CONNECT(conn));

  if (conn->current_msg != NULL) {
 80165b4:	69bb      	ldr	r3, [r7, #24]
 80165b6:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80165b8:	2b00      	cmp	r3, #0
 80165ba:	d008      	beq.n	80165ce <lwip_netconn_do_connected+0x76>
    conn->current_msg->err = err;
 80165bc:	69bb      	ldr	r3, [r7, #24]
 80165be:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80165c0:	79fa      	ldrb	r2, [r7, #7]
 80165c2:	711a      	strb	r2, [r3, #4]
    op_completed_sem = LWIP_API_MSG_SEM(conn->current_msg);
 80165c4:	69bb      	ldr	r3, [r7, #24]
 80165c6:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80165c8:	681b      	ldr	r3, [r3, #0]
 80165ca:	330c      	adds	r3, #12
 80165cc:	61fb      	str	r3, [r7, #28]
  }
  if ((NETCONNTYPE_GROUP(conn->type) == NETCONN_TCP) && (err == ERR_OK)) {
 80165ce:	69bb      	ldr	r3, [r7, #24]
 80165d0:	781b      	ldrb	r3, [r3, #0]
 80165d2:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 80165d6:	2b10      	cmp	r3, #16
 80165d8:	d106      	bne.n	80165e8 <lwip_netconn_do_connected+0x90>
 80165da:	f997 3007 	ldrsb.w	r3, [r7, #7]
 80165de:	2b00      	cmp	r3, #0
 80165e0:	d102      	bne.n	80165e8 <lwip_netconn_do_connected+0x90>
    setup_tcp(conn);
 80165e2:	69b8      	ldr	r0, [r7, #24]
 80165e4:	f7ff fb82 	bl	8015cec <setup_tcp>
  }
  was_blocking = !IN_NONBLOCKING_CONNECT(conn);
 80165e8:	69bb      	ldr	r3, [r7, #24]
 80165ea:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 80165ee:	f003 0304 	and.w	r3, r3, #4
 80165f2:	2b00      	cmp	r3, #0
 80165f4:	bf0c      	ite	eq
 80165f6:	2301      	moveq	r3, #1
 80165f8:	2300      	movne	r3, #0
 80165fa:	b2db      	uxtb	r3, r3
 80165fc:	617b      	str	r3, [r7, #20]
  SET_NONBLOCKING_CONNECT(conn, 0);
 80165fe:	69bb      	ldr	r3, [r7, #24]
 8016600:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8016604:	f023 0304 	bic.w	r3, r3, #4
 8016608:	b2da      	uxtb	r2, r3
 801660a:	69bb      	ldr	r3, [r7, #24]
 801660c:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
  LWIP_ASSERT("blocking connect state error",
 8016610:	697b      	ldr	r3, [r7, #20]
 8016612:	2b00      	cmp	r3, #0
 8016614:	d002      	beq.n	801661c <lwip_netconn_do_connected+0xc4>
 8016616:	69fb      	ldr	r3, [r7, #28]
 8016618:	2b00      	cmp	r3, #0
 801661a:	d10c      	bne.n	8016636 <lwip_netconn_do_connected+0xde>
 801661c:	697b      	ldr	r3, [r7, #20]
 801661e:	2b00      	cmp	r3, #0
 8016620:	d102      	bne.n	8016628 <lwip_netconn_do_connected+0xd0>
 8016622:	69fb      	ldr	r3, [r7, #28]
 8016624:	2b00      	cmp	r3, #0
 8016626:	d006      	beq.n	8016636 <lwip_netconn_do_connected+0xde>
 8016628:	4b10      	ldr	r3, [pc, #64]	@ (801666c <lwip_netconn_do_connected+0x114>)
 801662a:	f44f 62a6 	mov.w	r2, #1328	@ 0x530
 801662e:	4913      	ldr	r1, [pc, #76]	@ (801667c <lwip_netconn_do_connected+0x124>)
 8016630:	4810      	ldr	r0, [pc, #64]	@ (8016674 <lwip_netconn_do_connected+0x11c>)
 8016632:	f012 ff6b 	bl	802950c <iprintf>
              (was_blocking && op_completed_sem != NULL) ||
              (!was_blocking && op_completed_sem == NULL));
  conn->current_msg = NULL;
 8016636:	69bb      	ldr	r3, [r7, #24]
 8016638:	2200      	movs	r2, #0
 801663a:	62da      	str	r2, [r3, #44]	@ 0x2c
  conn->state = NETCONN_NONE;
 801663c:	69bb      	ldr	r3, [r7, #24]
 801663e:	2200      	movs	r2, #0
 8016640:	705a      	strb	r2, [r3, #1]
  API_EVENT(conn, NETCONN_EVT_SENDPLUS, 0);
 8016642:	69bb      	ldr	r3, [r7, #24]
 8016644:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8016646:	2b00      	cmp	r3, #0
 8016648:	d005      	beq.n	8016656 <lwip_netconn_do_connected+0xfe>
 801664a:	69bb      	ldr	r3, [r7, #24]
 801664c:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 801664e:	2200      	movs	r2, #0
 8016650:	2102      	movs	r1, #2
 8016652:	69b8      	ldr	r0, [r7, #24]
 8016654:	4798      	blx	r3

  if (was_blocking) {
 8016656:	697b      	ldr	r3, [r7, #20]
 8016658:	2b00      	cmp	r3, #0
 801665a:	d002      	beq.n	8016662 <lwip_netconn_do_connected+0x10a>
    sys_sem_signal(op_completed_sem);
 801665c:	69f8      	ldr	r0, [r7, #28]
 801665e:	f00f fc29 	bl	8025eb4 <sys_sem_signal>
  }
  return ERR_OK;
 8016662:	2300      	movs	r3, #0
}
 8016664:	4618      	mov	r0, r3
 8016666:	3720      	adds	r7, #32
 8016668:	46bd      	mov	sp, r7
 801666a:	bd80      	pop	{r7, pc}
 801666c:	0802ca70 	.word	0x0802ca70
 8016670:	0802ce38 	.word	0x0802ce38
 8016674:	0802cab4 	.word	0x0802cab4
 8016678:	0802ce58 	.word	0x0802ce58
 801667c:	0802ce98 	.word	0x0802ce98

08016680 <lwip_netconn_do_connect>:
 * @param m the api_msg pointing to the connection and containing
 *          the IP address and port to connect to
 */
void
lwip_netconn_do_connect(void *m)
{
 8016680:	b580      	push	{r7, lr}
 8016682:	b086      	sub	sp, #24
 8016684:	af00      	add	r7, sp, #0
 8016686:	6078      	str	r0, [r7, #4]
  struct api_msg *msg = (struct api_msg *)m;
 8016688:	687b      	ldr	r3, [r7, #4]
 801668a:	613b      	str	r3, [r7, #16]
  err_t err;

  if (msg->conn->pcb.tcp == NULL) {
 801668c:	693b      	ldr	r3, [r7, #16]
 801668e:	681b      	ldr	r3, [r3, #0]
 8016690:	685b      	ldr	r3, [r3, #4]
 8016692:	2b00      	cmp	r3, #0
 8016694:	d102      	bne.n	801669c <lwip_netconn_do_connect+0x1c>
    /* This may happen when calling netconn_connect() a second time */
    err = ERR_CLSD;
 8016696:	23f1      	movs	r3, #241	@ 0xf1
 8016698:	75fb      	strb	r3, [r7, #23]
 801669a:	e09e      	b.n	80167da <lwip_netconn_do_connect+0x15a>
  } else {
    switch (NETCONNTYPE_GROUP(msg->conn->type)) {
 801669c:	693b      	ldr	r3, [r7, #16]
 801669e:	681b      	ldr	r3, [r3, #0]
 80166a0:	781b      	ldrb	r3, [r3, #0]
 80166a2:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 80166a6:	2b10      	cmp	r3, #16
 80166a8:	d00f      	beq.n	80166ca <lwip_netconn_do_connect+0x4a>
 80166aa:	2b20      	cmp	r3, #32
 80166ac:	f040 808a 	bne.w	80167c4 <lwip_netconn_do_connect+0x144>
        err = raw_connect(msg->conn->pcb.raw, API_EXPR_REF(msg->msg.bc.ipaddr));
        break;
#endif /* LWIP_RAW */
#if LWIP_UDP
      case NETCONN_UDP:
        err = udp_connect(msg->conn->pcb.udp, API_EXPR_REF(msg->msg.bc.ipaddr), msg->msg.bc.port);
 80166b0:	693b      	ldr	r3, [r7, #16]
 80166b2:	681b      	ldr	r3, [r3, #0]
 80166b4:	6858      	ldr	r0, [r3, #4]
 80166b6:	693b      	ldr	r3, [r7, #16]
 80166b8:	6899      	ldr	r1, [r3, #8]
 80166ba:	693b      	ldr	r3, [r7, #16]
 80166bc:	899b      	ldrh	r3, [r3, #12]
 80166be:	461a      	mov	r2, r3
 80166c0:	f00a fdd8 	bl	8021274 <udp_connect>
 80166c4:	4603      	mov	r3, r0
 80166c6:	75fb      	strb	r3, [r7, #23]
        break;
 80166c8:	e087      	b.n	80167da <lwip_netconn_do_connect+0x15a>
#endif /* LWIP_UDP */
#if LWIP_TCP
      case NETCONN_TCP:
        /* Prevent connect while doing any other action. */
        if (msg->conn->state == NETCONN_CONNECT) {
 80166ca:	693b      	ldr	r3, [r7, #16]
 80166cc:	681b      	ldr	r3, [r3, #0]
 80166ce:	785b      	ldrb	r3, [r3, #1]
 80166d0:	2b03      	cmp	r3, #3
 80166d2:	d102      	bne.n	80166da <lwip_netconn_do_connect+0x5a>
          err = ERR_ALREADY;
 80166d4:	23f7      	movs	r3, #247	@ 0xf7
 80166d6:	75fb      	strb	r3, [r7, #23]
#endif /* LWIP_TCPIP_CORE_LOCKING */
              return;
            }
          }
        }
        break;
 80166d8:	e07e      	b.n	80167d8 <lwip_netconn_do_connect+0x158>
        } else if (msg->conn->state != NETCONN_NONE) {
 80166da:	693b      	ldr	r3, [r7, #16]
 80166dc:	681b      	ldr	r3, [r3, #0]
 80166de:	785b      	ldrb	r3, [r3, #1]
 80166e0:	2b00      	cmp	r3, #0
 80166e2:	d002      	beq.n	80166ea <lwip_netconn_do_connect+0x6a>
          err = ERR_ISCONN;
 80166e4:	23f6      	movs	r3, #246	@ 0xf6
 80166e6:	75fb      	strb	r3, [r7, #23]
        break;
 80166e8:	e076      	b.n	80167d8 <lwip_netconn_do_connect+0x158>
          setup_tcp(msg->conn);
 80166ea:	693b      	ldr	r3, [r7, #16]
 80166ec:	681b      	ldr	r3, [r3, #0]
 80166ee:	4618      	mov	r0, r3
 80166f0:	f7ff fafc 	bl	8015cec <setup_tcp>
          err = tcp_connect(msg->conn->pcb.tcp, API_EXPR_REF(msg->msg.bc.ipaddr),
 80166f4:	693b      	ldr	r3, [r7, #16]
 80166f6:	681b      	ldr	r3, [r3, #0]
 80166f8:	6858      	ldr	r0, [r3, #4]
 80166fa:	693b      	ldr	r3, [r7, #16]
 80166fc:	6899      	ldr	r1, [r3, #8]
 80166fe:	693b      	ldr	r3, [r7, #16]
 8016700:	899a      	ldrh	r2, [r3, #12]
 8016702:	4b3a      	ldr	r3, [pc, #232]	@ (80167ec <lwip_netconn_do_connect+0x16c>)
 8016704:	f004 fb90 	bl	801ae28 <tcp_connect>
 8016708:	4603      	mov	r3, r0
 801670a:	75fb      	strb	r3, [r7, #23]
          if (err == ERR_OK) {
 801670c:	f997 3017 	ldrsb.w	r3, [r7, #23]
 8016710:	2b00      	cmp	r3, #0
 8016712:	d161      	bne.n	80167d8 <lwip_netconn_do_connect+0x158>
            u8_t non_blocking = netconn_is_nonblocking(msg->conn);
 8016714:	693b      	ldr	r3, [r7, #16]
 8016716:	681b      	ldr	r3, [r3, #0]
 8016718:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 801671c:	f003 0302 	and.w	r3, r3, #2
 8016720:	2b00      	cmp	r3, #0
 8016722:	bf14      	ite	ne
 8016724:	2301      	movne	r3, #1
 8016726:	2300      	moveq	r3, #0
 8016728:	b2db      	uxtb	r3, r3
 801672a:	73fb      	strb	r3, [r7, #15]
            msg->conn->state = NETCONN_CONNECT;
 801672c:	693b      	ldr	r3, [r7, #16]
 801672e:	681b      	ldr	r3, [r3, #0]
 8016730:	2203      	movs	r2, #3
 8016732:	705a      	strb	r2, [r3, #1]
            SET_NONBLOCKING_CONNECT(msg->conn, non_blocking);
 8016734:	7bfb      	ldrb	r3, [r7, #15]
 8016736:	2b00      	cmp	r3, #0
 8016738:	d00b      	beq.n	8016752 <lwip_netconn_do_connect+0xd2>
 801673a:	693b      	ldr	r3, [r7, #16]
 801673c:	681b      	ldr	r3, [r3, #0]
 801673e:	f893 2028 	ldrb.w	r2, [r3, #40]	@ 0x28
 8016742:	693b      	ldr	r3, [r7, #16]
 8016744:	681b      	ldr	r3, [r3, #0]
 8016746:	f042 0204 	orr.w	r2, r2, #4
 801674a:	b2d2      	uxtb	r2, r2
 801674c:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
 8016750:	e00a      	b.n	8016768 <lwip_netconn_do_connect+0xe8>
 8016752:	693b      	ldr	r3, [r7, #16]
 8016754:	681b      	ldr	r3, [r3, #0]
 8016756:	f893 2028 	ldrb.w	r2, [r3, #40]	@ 0x28
 801675a:	693b      	ldr	r3, [r7, #16]
 801675c:	681b      	ldr	r3, [r3, #0]
 801675e:	f022 0204 	bic.w	r2, r2, #4
 8016762:	b2d2      	uxtb	r2, r2
 8016764:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
            if (non_blocking) {
 8016768:	7bfb      	ldrb	r3, [r7, #15]
 801676a:	2b00      	cmp	r3, #0
 801676c:	d002      	beq.n	8016774 <lwip_netconn_do_connect+0xf4>
              err = ERR_INPROGRESS;
 801676e:	23fb      	movs	r3, #251	@ 0xfb
 8016770:	75fb      	strb	r3, [r7, #23]
        break;
 8016772:	e031      	b.n	80167d8 <lwip_netconn_do_connect+0x158>
              msg->conn->current_msg = msg;
 8016774:	693b      	ldr	r3, [r7, #16]
 8016776:	681b      	ldr	r3, [r3, #0]
 8016778:	693a      	ldr	r2, [r7, #16]
 801677a:	62da      	str	r2, [r3, #44]	@ 0x2c
              LWIP_ASSERT("state!", msg->conn->state == NETCONN_CONNECT);
 801677c:	693b      	ldr	r3, [r7, #16]
 801677e:	681b      	ldr	r3, [r3, #0]
 8016780:	785b      	ldrb	r3, [r3, #1]
 8016782:	2b03      	cmp	r3, #3
 8016784:	d006      	beq.n	8016794 <lwip_netconn_do_connect+0x114>
 8016786:	4b1a      	ldr	r3, [pc, #104]	@ (80167f0 <lwip_netconn_do_connect+0x170>)
 8016788:	f44f 62ae 	mov.w	r2, #1392	@ 0x570
 801678c:	4919      	ldr	r1, [pc, #100]	@ (80167f4 <lwip_netconn_do_connect+0x174>)
 801678e:	481a      	ldr	r0, [pc, #104]	@ (80167f8 <lwip_netconn_do_connect+0x178>)
 8016790:	f012 febc 	bl	802950c <iprintf>
              UNLOCK_TCPIP_CORE();
 8016794:	f7f9 fc5e 	bl	8010054 <sys_unlock_tcpip_core>
              sys_arch_sem_wait(LWIP_API_MSG_SEM(msg), 0);
 8016798:	693b      	ldr	r3, [r7, #16]
 801679a:	681b      	ldr	r3, [r3, #0]
 801679c:	330c      	adds	r3, #12
 801679e:	2100      	movs	r1, #0
 80167a0:	4618      	mov	r0, r3
 80167a2:	f00f fb56 	bl	8025e52 <sys_arch_sem_wait>
              LOCK_TCPIP_CORE();
 80167a6:	f7f9 fc45 	bl	8010034 <sys_lock_tcpip_core>
              LWIP_ASSERT("state!", msg->conn->state != NETCONN_CONNECT);
 80167aa:	693b      	ldr	r3, [r7, #16]
 80167ac:	681b      	ldr	r3, [r3, #0]
 80167ae:	785b      	ldrb	r3, [r3, #1]
 80167b0:	2b03      	cmp	r3, #3
 80167b2:	d116      	bne.n	80167e2 <lwip_netconn_do_connect+0x162>
 80167b4:	4b0e      	ldr	r3, [pc, #56]	@ (80167f0 <lwip_netconn_do_connect+0x170>)
 80167b6:	f240 5274 	movw	r2, #1396	@ 0x574
 80167ba:	490e      	ldr	r1, [pc, #56]	@ (80167f4 <lwip_netconn_do_connect+0x174>)
 80167bc:	480e      	ldr	r0, [pc, #56]	@ (80167f8 <lwip_netconn_do_connect+0x178>)
 80167be:	f012 fea5 	bl	802950c <iprintf>
              return;
 80167c2:	e00e      	b.n	80167e2 <lwip_netconn_do_connect+0x162>
#endif /* LWIP_TCP */
      default:
        LWIP_ERROR("Invalid netconn type", 0, do {
 80167c4:	4b0a      	ldr	r3, [pc, #40]	@ (80167f0 <lwip_netconn_do_connect+0x170>)
 80167c6:	f240 527d 	movw	r2, #1405	@ 0x57d
 80167ca:	490c      	ldr	r1, [pc, #48]	@ (80167fc <lwip_netconn_do_connect+0x17c>)
 80167cc:	480a      	ldr	r0, [pc, #40]	@ (80167f8 <lwip_netconn_do_connect+0x178>)
 80167ce:	f012 fe9d 	bl	802950c <iprintf>
 80167d2:	23fa      	movs	r3, #250	@ 0xfa
 80167d4:	75fb      	strb	r3, [r7, #23]
          err = ERR_VAL;
        } while (0));
        break;
 80167d6:	e000      	b.n	80167da <lwip_netconn_do_connect+0x15a>
        break;
 80167d8:	bf00      	nop
    }
  }
  msg->err = err;
 80167da:	693b      	ldr	r3, [r7, #16]
 80167dc:	7dfa      	ldrb	r2, [r7, #23]
 80167de:	711a      	strb	r2, [r3, #4]
 80167e0:	e000      	b.n	80167e4 <lwip_netconn_do_connect+0x164>
              return;
 80167e2:	bf00      	nop
  /* For all other protocols, netconn_connect() calls netconn_apimsg(),
     so use TCPIP_APIMSG_ACK() here. */
  TCPIP_APIMSG_ACK(msg);
}
 80167e4:	3718      	adds	r7, #24
 80167e6:	46bd      	mov	sp, r7
 80167e8:	bd80      	pop	{r7, pc}
 80167ea:	bf00      	nop
 80167ec:	08016559 	.word	0x08016559
 80167f0:	0802ca70 	.word	0x0802ca70
 80167f4:	0802ce30 	.word	0x0802ce30
 80167f8:	0802cab4 	.word	0x0802cab4
 80167fc:	0802ceb8 	.word	0x0802ceb8

08016800 <lwip_netconn_do_disconnect>:
 *
 * @param m the api_msg pointing to the connection to disconnect
 */
void
lwip_netconn_do_disconnect(void *m)
{
 8016800:	b580      	push	{r7, lr}
 8016802:	b084      	sub	sp, #16
 8016804:	af00      	add	r7, sp, #0
 8016806:	6078      	str	r0, [r7, #4]
  struct api_msg *msg = (struct api_msg *)m;
 8016808:	687b      	ldr	r3, [r7, #4]
 801680a:	60fb      	str	r3, [r7, #12]

#if LWIP_UDP
  if (NETCONNTYPE_GROUP(msg->conn->type) == NETCONN_UDP) {
 801680c:	68fb      	ldr	r3, [r7, #12]
 801680e:	681b      	ldr	r3, [r3, #0]
 8016810:	781b      	ldrb	r3, [r3, #0]
 8016812:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8016816:	2b20      	cmp	r3, #32
 8016818:	d109      	bne.n	801682e <lwip_netconn_do_disconnect+0x2e>
    udp_disconnect(msg->conn->pcb.udp);
 801681a:	68fb      	ldr	r3, [r7, #12]
 801681c:	681b      	ldr	r3, [r3, #0]
 801681e:	685b      	ldr	r3, [r3, #4]
 8016820:	4618      	mov	r0, r3
 8016822:	f00a fd97 	bl	8021354 <udp_disconnect>
    msg->err = ERR_OK;
 8016826:	68fb      	ldr	r3, [r7, #12]
 8016828:	2200      	movs	r2, #0
 801682a:	711a      	strb	r2, [r3, #4]
#endif /* LWIP_UDP */
  {
    msg->err = ERR_VAL;
  }
  TCPIP_APIMSG_ACK(msg);
}
 801682c:	e002      	b.n	8016834 <lwip_netconn_do_disconnect+0x34>
    msg->err = ERR_VAL;
 801682e:	68fb      	ldr	r3, [r7, #12]
 8016830:	22fa      	movs	r2, #250	@ 0xfa
 8016832:	711a      	strb	r2, [r3, #4]
}
 8016834:	bf00      	nop
 8016836:	3710      	adds	r7, #16
 8016838:	46bd      	mov	sp, r7
 801683a:	bd80      	pop	{r7, pc}

0801683c <lwip_netconn_do_send>:
 *
 * @param m the api_msg pointing to the connection
 */
void
lwip_netconn_do_send(void *m)
{
 801683c:	b580      	push	{r7, lr}
 801683e:	b084      	sub	sp, #16
 8016840:	af00      	add	r7, sp, #0
 8016842:	6078      	str	r0, [r7, #4]
  struct api_msg *msg = (struct api_msg *)m;
 8016844:	687b      	ldr	r3, [r7, #4]
 8016846:	60bb      	str	r3, [r7, #8]

  err_t err = netconn_err(msg->conn);
 8016848:	68bb      	ldr	r3, [r7, #8]
 801684a:	681b      	ldr	r3, [r3, #0]
 801684c:	4618      	mov	r0, r3
 801684e:	f7fe fef9 	bl	8015644 <netconn_err>
 8016852:	4603      	mov	r3, r0
 8016854:	73fb      	strb	r3, [r7, #15]
  if (err == ERR_OK) {
 8016856:	f997 300f 	ldrsb.w	r3, [r7, #15]
 801685a:	2b00      	cmp	r3, #0
 801685c:	d134      	bne.n	80168c8 <lwip_netconn_do_send+0x8c>
    if (msg->conn->pcb.tcp != NULL) {
 801685e:	68bb      	ldr	r3, [r7, #8]
 8016860:	681b      	ldr	r3, [r3, #0]
 8016862:	685b      	ldr	r3, [r3, #4]
 8016864:	2b00      	cmp	r3, #0
 8016866:	d02d      	beq.n	80168c4 <lwip_netconn_do_send+0x88>
      switch (NETCONNTYPE_GROUP(msg->conn->type)) {
 8016868:	68bb      	ldr	r3, [r7, #8]
 801686a:	681b      	ldr	r3, [r3, #0]
 801686c:	781b      	ldrb	r3, [r3, #0]
 801686e:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8016872:	2b20      	cmp	r3, #32
 8016874:	d123      	bne.n	80168be <lwip_netconn_do_send+0x82>
            err = udp_sendto_chksum(msg->conn->pcb.udp, msg->msg.b->p,
                                    &msg->msg.b->addr, msg->msg.b->port,
                                    msg->msg.b->flags & NETBUF_FLAG_CHKSUM, msg->msg.b->toport_chksum);
          }
#else /* LWIP_CHECKSUM_ON_COPY */
          if (ip_addr_isany_val(msg->msg.b->addr) || IP_IS_ANY_TYPE_VAL(msg->msg.b->addr)) {
 8016876:	68bb      	ldr	r3, [r7, #8]
 8016878:	689b      	ldr	r3, [r3, #8]
 801687a:	689b      	ldr	r3, [r3, #8]
 801687c:	2b00      	cmp	r3, #0
 801687e:	d10c      	bne.n	801689a <lwip_netconn_do_send+0x5e>
            err = udp_send(msg->conn->pcb.udp, msg->msg.b->p);
 8016880:	68bb      	ldr	r3, [r7, #8]
 8016882:	681b      	ldr	r3, [r3, #0]
 8016884:	685a      	ldr	r2, [r3, #4]
 8016886:	68bb      	ldr	r3, [r7, #8]
 8016888:	689b      	ldr	r3, [r3, #8]
 801688a:	681b      	ldr	r3, [r3, #0]
 801688c:	4619      	mov	r1, r3
 801688e:	4610      	mov	r0, r2
 8016890:	f00a fa7a 	bl	8020d88 <udp_send>
 8016894:	4603      	mov	r3, r0
 8016896:	73fb      	strb	r3, [r7, #15]
          } else {
            err = udp_sendto(msg->conn->pcb.udp, msg->msg.b->p, &msg->msg.b->addr, msg->msg.b->port);
          }
#endif /* LWIP_CHECKSUM_ON_COPY */
          break;
 8016898:	e016      	b.n	80168c8 <lwip_netconn_do_send+0x8c>
            err = udp_sendto(msg->conn->pcb.udp, msg->msg.b->p, &msg->msg.b->addr, msg->msg.b->port);
 801689a:	68bb      	ldr	r3, [r7, #8]
 801689c:	681b      	ldr	r3, [r3, #0]
 801689e:	6858      	ldr	r0, [r3, #4]
 80168a0:	68bb      	ldr	r3, [r7, #8]
 80168a2:	689b      	ldr	r3, [r3, #8]
 80168a4:	6819      	ldr	r1, [r3, #0]
 80168a6:	68bb      	ldr	r3, [r7, #8]
 80168a8:	689b      	ldr	r3, [r3, #8]
 80168aa:	f103 0208 	add.w	r2, r3, #8
 80168ae:	68bb      	ldr	r3, [r7, #8]
 80168b0:	689b      	ldr	r3, [r3, #8]
 80168b2:	899b      	ldrh	r3, [r3, #12]
 80168b4:	f00a fa9c 	bl	8020df0 <udp_sendto>
 80168b8:	4603      	mov	r3, r0
 80168ba:	73fb      	strb	r3, [r7, #15]
          break;
 80168bc:	e004      	b.n	80168c8 <lwip_netconn_do_send+0x8c>
#endif /* LWIP_UDP */
        default:
          err = ERR_CONN;
 80168be:	23f5      	movs	r3, #245	@ 0xf5
 80168c0:	73fb      	strb	r3, [r7, #15]
          break;
 80168c2:	e001      	b.n	80168c8 <lwip_netconn_do_send+0x8c>
      }
    } else {
      err = ERR_CONN;
 80168c4:	23f5      	movs	r3, #245	@ 0xf5
 80168c6:	73fb      	strb	r3, [r7, #15]
    }
  }
  msg->err = err;
 80168c8:	68bb      	ldr	r3, [r7, #8]
 80168ca:	7bfa      	ldrb	r2, [r7, #15]
 80168cc:	711a      	strb	r2, [r3, #4]
  TCPIP_APIMSG_ACK(msg);
}
 80168ce:	bf00      	nop
 80168d0:	3710      	adds	r7, #16
 80168d2:	46bd      	mov	sp, r7
 80168d4:	bd80      	pop	{r7, pc}

080168d6 <lwip_netconn_do_recv>:
 *
 * @param m the api_msg pointing to the connection
 */
void
lwip_netconn_do_recv(void *m)
{
 80168d6:	b580      	push	{r7, lr}
 80168d8:	b086      	sub	sp, #24
 80168da:	af00      	add	r7, sp, #0
 80168dc:	6078      	str	r0, [r7, #4]
  struct api_msg *msg = (struct api_msg *)m;
 80168de:	687b      	ldr	r3, [r7, #4]
 80168e0:	613b      	str	r3, [r7, #16]

  msg->err = ERR_OK;
 80168e2:	693b      	ldr	r3, [r7, #16]
 80168e4:	2200      	movs	r2, #0
 80168e6:	711a      	strb	r2, [r3, #4]
  if (msg->conn->pcb.tcp != NULL) {
 80168e8:	693b      	ldr	r3, [r7, #16]
 80168ea:	681b      	ldr	r3, [r3, #0]
 80168ec:	685b      	ldr	r3, [r3, #4]
 80168ee:	2b00      	cmp	r3, #0
 80168f0:	d022      	beq.n	8016938 <lwip_netconn_do_recv+0x62>
    if (NETCONNTYPE_GROUP(msg->conn->type) == NETCONN_TCP) {
 80168f2:	693b      	ldr	r3, [r7, #16]
 80168f4:	681b      	ldr	r3, [r3, #0]
 80168f6:	781b      	ldrb	r3, [r3, #0]
 80168f8:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 80168fc:	2b10      	cmp	r3, #16
 80168fe:	d11b      	bne.n	8016938 <lwip_netconn_do_recv+0x62>
      size_t remaining = msg->msg.r.len;
 8016900:	693b      	ldr	r3, [r7, #16]
 8016902:	689b      	ldr	r3, [r3, #8]
 8016904:	617b      	str	r3, [r7, #20]
      do {
        u16_t recved = (u16_t)((remaining > 0xffff) ? 0xffff : remaining);
 8016906:	697b      	ldr	r3, [r7, #20]
 8016908:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 801690c:	d202      	bcs.n	8016914 <lwip_netconn_do_recv+0x3e>
 801690e:	697b      	ldr	r3, [r7, #20]
 8016910:	b29b      	uxth	r3, r3
 8016912:	e001      	b.n	8016918 <lwip_netconn_do_recv+0x42>
 8016914:	f64f 73ff 	movw	r3, #65535	@ 0xffff
 8016918:	81fb      	strh	r3, [r7, #14]
        tcp_recved(msg->conn->pcb.tcp, recved);
 801691a:	693b      	ldr	r3, [r7, #16]
 801691c:	681b      	ldr	r3, [r3, #0]
 801691e:	685b      	ldr	r3, [r3, #4]
 8016920:	89fa      	ldrh	r2, [r7, #14]
 8016922:	4611      	mov	r1, r2
 8016924:	4618      	mov	r0, r3
 8016926:	f004 f9e5 	bl	801acf4 <tcp_recved>
        remaining -= recved;
 801692a:	89fb      	ldrh	r3, [r7, #14]
 801692c:	697a      	ldr	r2, [r7, #20]
 801692e:	1ad3      	subs	r3, r2, r3
 8016930:	617b      	str	r3, [r7, #20]
      } while (remaining != 0);
 8016932:	697b      	ldr	r3, [r7, #20]
 8016934:	2b00      	cmp	r3, #0
 8016936:	d1e6      	bne.n	8016906 <lwip_netconn_do_recv+0x30>
    }
  }
  TCPIP_APIMSG_ACK(msg);
}
 8016938:	bf00      	nop
 801693a:	3718      	adds	r7, #24
 801693c:	46bd      	mov	sp, r7
 801693e:	bd80      	pop	{r7, pc}

08016940 <lwip_netconn_do_writemore>:
 * @return ERR_OK
 *         ERR_MEM if LWIP_TCPIP_CORE_LOCKING=1 and sending hasn't yet finished
 */
static err_t
lwip_netconn_do_writemore(struct netconn *conn  WRITE_DELAYED_PARAM)
{
 8016940:	b580      	push	{r7, lr}
 8016942:	b088      	sub	sp, #32
 8016944:	af00      	add	r7, sp, #0
 8016946:	6078      	str	r0, [r7, #4]
 8016948:	460b      	mov	r3, r1
 801694a:	70fb      	strb	r3, [r7, #3]
  err_t err;
  const void *dataptr;
  u16_t len, available;
  u8_t write_finished = 0;
 801694c:	2300      	movs	r3, #0
 801694e:	76fb      	strb	r3, [r7, #27]
  size_t diff;
  u8_t dontblock;
  u8_t apiflags;
  u8_t write_more;

  LWIP_ASSERT("conn != NULL", conn != NULL);
 8016950:	687b      	ldr	r3, [r7, #4]
 8016952:	2b00      	cmp	r3, #0
 8016954:	d106      	bne.n	8016964 <lwip_netconn_do_writemore+0x24>
 8016956:	4b61      	ldr	r3, [pc, #388]	@ (8016adc <lwip_netconn_do_writemore+0x19c>)
 8016958:	f240 6273 	movw	r2, #1651	@ 0x673
 801695c:	4960      	ldr	r1, [pc, #384]	@ (8016ae0 <lwip_netconn_do_writemore+0x1a0>)
 801695e:	4861      	ldr	r0, [pc, #388]	@ (8016ae4 <lwip_netconn_do_writemore+0x1a4>)
 8016960:	f012 fdd4 	bl	802950c <iprintf>
  LWIP_ASSERT("conn->state == NETCONN_WRITE", (conn->state == NETCONN_WRITE));
 8016964:	687b      	ldr	r3, [r7, #4]
 8016966:	785b      	ldrb	r3, [r3, #1]
 8016968:	2b01      	cmp	r3, #1
 801696a:	d006      	beq.n	801697a <lwip_netconn_do_writemore+0x3a>
 801696c:	4b5b      	ldr	r3, [pc, #364]	@ (8016adc <lwip_netconn_do_writemore+0x19c>)
 801696e:	f240 6274 	movw	r2, #1652	@ 0x674
 8016972:	495d      	ldr	r1, [pc, #372]	@ (8016ae8 <lwip_netconn_do_writemore+0x1a8>)
 8016974:	485b      	ldr	r0, [pc, #364]	@ (8016ae4 <lwip_netconn_do_writemore+0x1a4>)
 8016976:	f012 fdc9 	bl	802950c <iprintf>
  LWIP_ASSERT("conn->current_msg != NULL", conn->current_msg != NULL);
 801697a:	687b      	ldr	r3, [r7, #4]
 801697c:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 801697e:	2b00      	cmp	r3, #0
 8016980:	d106      	bne.n	8016990 <lwip_netconn_do_writemore+0x50>
 8016982:	4b56      	ldr	r3, [pc, #344]	@ (8016adc <lwip_netconn_do_writemore+0x19c>)
 8016984:	f240 6275 	movw	r2, #1653	@ 0x675
 8016988:	4958      	ldr	r1, [pc, #352]	@ (8016aec <lwip_netconn_do_writemore+0x1ac>)
 801698a:	4856      	ldr	r0, [pc, #344]	@ (8016ae4 <lwip_netconn_do_writemore+0x1a4>)
 801698c:	f012 fdbe 	bl	802950c <iprintf>
  LWIP_ASSERT("conn->pcb.tcp != NULL", conn->pcb.tcp != NULL);
 8016990:	687b      	ldr	r3, [r7, #4]
 8016992:	685b      	ldr	r3, [r3, #4]
 8016994:	2b00      	cmp	r3, #0
 8016996:	d106      	bne.n	80169a6 <lwip_netconn_do_writemore+0x66>
 8016998:	4b50      	ldr	r3, [pc, #320]	@ (8016adc <lwip_netconn_do_writemore+0x19c>)
 801699a:	f240 6276 	movw	r2, #1654	@ 0x676
 801699e:	4954      	ldr	r1, [pc, #336]	@ (8016af0 <lwip_netconn_do_writemore+0x1b0>)
 80169a0:	4850      	ldr	r0, [pc, #320]	@ (8016ae4 <lwip_netconn_do_writemore+0x1a4>)
 80169a2:	f012 fdb3 	bl	802950c <iprintf>
  LWIP_ASSERT("conn->current_msg->msg.w.offset < conn->current_msg->msg.w.len",
 80169a6:	687b      	ldr	r3, [r7, #4]
 80169a8:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80169aa:	699a      	ldr	r2, [r3, #24]
 80169ac:	687b      	ldr	r3, [r7, #4]
 80169ae:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80169b0:	695b      	ldr	r3, [r3, #20]
 80169b2:	429a      	cmp	r2, r3
 80169b4:	d306      	bcc.n	80169c4 <lwip_netconn_do_writemore+0x84>
 80169b6:	4b49      	ldr	r3, [pc, #292]	@ (8016adc <lwip_netconn_do_writemore+0x19c>)
 80169b8:	f240 6277 	movw	r2, #1655	@ 0x677
 80169bc:	494d      	ldr	r1, [pc, #308]	@ (8016af4 <lwip_netconn_do_writemore+0x1b4>)
 80169be:	4849      	ldr	r0, [pc, #292]	@ (8016ae4 <lwip_netconn_do_writemore+0x1a4>)
 80169c0:	f012 fda4 	bl	802950c <iprintf>
              conn->current_msg->msg.w.offset < conn->current_msg->msg.w.len);
  LWIP_ASSERT("conn->current_msg->msg.w.vector_cnt > 0", conn->current_msg->msg.w.vector_cnt > 0);
 80169c4:	687b      	ldr	r3, [r7, #4]
 80169c6:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80169c8:	899b      	ldrh	r3, [r3, #12]
 80169ca:	2b00      	cmp	r3, #0
 80169cc:	d106      	bne.n	80169dc <lwip_netconn_do_writemore+0x9c>
 80169ce:	4b43      	ldr	r3, [pc, #268]	@ (8016adc <lwip_netconn_do_writemore+0x19c>)
 80169d0:	f240 6279 	movw	r2, #1657	@ 0x679
 80169d4:	4948      	ldr	r1, [pc, #288]	@ (8016af8 <lwip_netconn_do_writemore+0x1b8>)
 80169d6:	4843      	ldr	r0, [pc, #268]	@ (8016ae4 <lwip_netconn_do_writemore+0x1a4>)
 80169d8:	f012 fd98 	bl	802950c <iprintf>

  apiflags = conn->current_msg->msg.w.apiflags;
 80169dc:	687b      	ldr	r3, [r7, #4]
 80169de:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80169e0:	7f1b      	ldrb	r3, [r3, #28]
 80169e2:	76bb      	strb	r3, [r7, #26]
  dontblock = netconn_is_nonblocking(conn) || (apiflags & NETCONN_DONTBLOCK);
 80169e4:	687b      	ldr	r3, [r7, #4]
 80169e6:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 80169ea:	f003 0302 	and.w	r3, r3, #2
 80169ee:	2b00      	cmp	r3, #0
 80169f0:	d104      	bne.n	80169fc <lwip_netconn_do_writemore+0xbc>
 80169f2:	7ebb      	ldrb	r3, [r7, #26]
 80169f4:	f003 0304 	and.w	r3, r3, #4
 80169f8:	2b00      	cmp	r3, #0
 80169fa:	d001      	beq.n	8016a00 <lwip_netconn_do_writemore+0xc0>
 80169fc:	2301      	movs	r3, #1
 80169fe:	e000      	b.n	8016a02 <lwip_netconn_do_writemore+0xc2>
 8016a00:	2300      	movs	r3, #0
 8016a02:	763b      	strb	r3, [r7, #24]
    }
  } else
#endif /* LWIP_SO_SNDTIMEO */
  {
    do {
      dataptr = (const u8_t *)conn->current_msg->msg.w.vector->ptr + conn->current_msg->msg.w.vector_off;
 8016a04:	687b      	ldr	r3, [r7, #4]
 8016a06:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016a08:	689b      	ldr	r3, [r3, #8]
 8016a0a:	681a      	ldr	r2, [r3, #0]
 8016a0c:	687b      	ldr	r3, [r7, #4]
 8016a0e:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016a10:	691b      	ldr	r3, [r3, #16]
 8016a12:	4413      	add	r3, r2
 8016a14:	617b      	str	r3, [r7, #20]
      diff = conn->current_msg->msg.w.vector->len - conn->current_msg->msg.w.vector_off;
 8016a16:	687b      	ldr	r3, [r7, #4]
 8016a18:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016a1a:	689b      	ldr	r3, [r3, #8]
 8016a1c:	685a      	ldr	r2, [r3, #4]
 8016a1e:	687b      	ldr	r3, [r7, #4]
 8016a20:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016a22:	691b      	ldr	r3, [r3, #16]
 8016a24:	1ad3      	subs	r3, r2, r3
 8016a26:	613b      	str	r3, [r7, #16]
      if (diff > 0xffffUL) { /* max_u16_t */
 8016a28:	693b      	ldr	r3, [r7, #16]
 8016a2a:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 8016a2e:	d307      	bcc.n	8016a40 <lwip_netconn_do_writemore+0x100>
        len = 0xffff;
 8016a30:	f64f 73ff 	movw	r3, #65535	@ 0xffff
 8016a34:	83bb      	strh	r3, [r7, #28]
        apiflags |= TCP_WRITE_FLAG_MORE;
 8016a36:	7ebb      	ldrb	r3, [r7, #26]
 8016a38:	f043 0302 	orr.w	r3, r3, #2
 8016a3c:	76bb      	strb	r3, [r7, #26]
 8016a3e:	e001      	b.n	8016a44 <lwip_netconn_do_writemore+0x104>
      } else {
        len = (u16_t)diff;
 8016a40:	693b      	ldr	r3, [r7, #16]
 8016a42:	83bb      	strh	r3, [r7, #28]
      }
      available = tcp_sndbuf(conn->pcb.tcp);
 8016a44:	687b      	ldr	r3, [r7, #4]
 8016a46:	685b      	ldr	r3, [r3, #4]
 8016a48:	f8b3 3064 	ldrh.w	r3, [r3, #100]	@ 0x64
 8016a4c:	81fb      	strh	r3, [r7, #14]
      if (available < len) {
 8016a4e:	89fa      	ldrh	r2, [r7, #14]
 8016a50:	8bbb      	ldrh	r3, [r7, #28]
 8016a52:	429a      	cmp	r2, r3
 8016a54:	d216      	bcs.n	8016a84 <lwip_netconn_do_writemore+0x144>
        /* don't try to write more than sendbuf */
        len = available;
 8016a56:	89fb      	ldrh	r3, [r7, #14]
 8016a58:	83bb      	strh	r3, [r7, #28]
        if (dontblock) {
 8016a5a:	7e3b      	ldrb	r3, [r7, #24]
 8016a5c:	2b00      	cmp	r3, #0
 8016a5e:	d00d      	beq.n	8016a7c <lwip_netconn_do_writemore+0x13c>
          if (!len) {
 8016a60:	8bbb      	ldrh	r3, [r7, #28]
 8016a62:	2b00      	cmp	r3, #0
 8016a64:	d10e      	bne.n	8016a84 <lwip_netconn_do_writemore+0x144>
            /* set error according to partial write or not */
            err = (conn->current_msg->msg.w.offset == 0) ? ERR_WOULDBLOCK : ERR_OK;
 8016a66:	687b      	ldr	r3, [r7, #4]
 8016a68:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016a6a:	699b      	ldr	r3, [r3, #24]
 8016a6c:	2b00      	cmp	r3, #0
 8016a6e:	d102      	bne.n	8016a76 <lwip_netconn_do_writemore+0x136>
 8016a70:	f06f 0306 	mvn.w	r3, #6
 8016a74:	e000      	b.n	8016a78 <lwip_netconn_do_writemore+0x138>
 8016a76:	2300      	movs	r3, #0
 8016a78:	77fb      	strb	r3, [r7, #31]
            goto err_mem;
 8016a7a:	e08f      	b.n	8016b9c <lwip_netconn_do_writemore+0x25c>
          }
        } else {
          apiflags |= TCP_WRITE_FLAG_MORE;
 8016a7c:	7ebb      	ldrb	r3, [r7, #26]
 8016a7e:	f043 0302 	orr.w	r3, r3, #2
 8016a82:	76bb      	strb	r3, [r7, #26]
        }
      }
      LWIP_ASSERT("lwip_netconn_do_writemore: invalid length!",
 8016a84:	687b      	ldr	r3, [r7, #4]
 8016a86:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016a88:	691a      	ldr	r2, [r3, #16]
 8016a8a:	8bbb      	ldrh	r3, [r7, #28]
 8016a8c:	441a      	add	r2, r3
 8016a8e:	687b      	ldr	r3, [r7, #4]
 8016a90:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016a92:	689b      	ldr	r3, [r3, #8]
 8016a94:	685b      	ldr	r3, [r3, #4]
 8016a96:	429a      	cmp	r2, r3
 8016a98:	d906      	bls.n	8016aa8 <lwip_netconn_do_writemore+0x168>
 8016a9a:	4b10      	ldr	r3, [pc, #64]	@ (8016adc <lwip_netconn_do_writemore+0x19c>)
 8016a9c:	f240 62a3 	movw	r2, #1699	@ 0x6a3
 8016aa0:	4916      	ldr	r1, [pc, #88]	@ (8016afc <lwip_netconn_do_writemore+0x1bc>)
 8016aa2:	4810      	ldr	r0, [pc, #64]	@ (8016ae4 <lwip_netconn_do_writemore+0x1a4>)
 8016aa4:	f012 fd32 	bl	802950c <iprintf>
                  ((conn->current_msg->msg.w.vector_off + len) <= conn->current_msg->msg.w.vector->len));
      /* we should loop around for more sending in the following cases:
           1) We couldn't finish the current vector because of 16-bit size limitations.
              tcp_write() and tcp_sndbuf() both are limited to 16-bit sizes
           2) We are sending the remainder of the current vector and have more */
      if ((len == 0xffff && diff > 0xffffUL) ||
 8016aa8:	8bbb      	ldrh	r3, [r7, #28]
 8016aaa:	f64f 72ff 	movw	r2, #65535	@ 0xffff
 8016aae:	4293      	cmp	r3, r2
 8016ab0:	d103      	bne.n	8016aba <lwip_netconn_do_writemore+0x17a>
 8016ab2:	693b      	ldr	r3, [r7, #16]
 8016ab4:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 8016ab8:	d209      	bcs.n	8016ace <lwip_netconn_do_writemore+0x18e>
          (len == (u16_t)diff && conn->current_msg->msg.w.vector_cnt > 1)) {
 8016aba:	693b      	ldr	r3, [r7, #16]
 8016abc:	b29b      	uxth	r3, r3
      if ((len == 0xffff && diff > 0xffffUL) ||
 8016abe:	8bba      	ldrh	r2, [r7, #28]
 8016ac0:	429a      	cmp	r2, r3
 8016ac2:	d11d      	bne.n	8016b00 <lwip_netconn_do_writemore+0x1c0>
          (len == (u16_t)diff && conn->current_msg->msg.w.vector_cnt > 1)) {
 8016ac4:	687b      	ldr	r3, [r7, #4]
 8016ac6:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016ac8:	899b      	ldrh	r3, [r3, #12]
 8016aca:	2b01      	cmp	r3, #1
 8016acc:	d918      	bls.n	8016b00 <lwip_netconn_do_writemore+0x1c0>
        write_more = 1;
 8016ace:	2301      	movs	r3, #1
 8016ad0:	767b      	strb	r3, [r7, #25]
        apiflags |= TCP_WRITE_FLAG_MORE;
 8016ad2:	7ebb      	ldrb	r3, [r7, #26]
 8016ad4:	f043 0302 	orr.w	r3, r3, #2
 8016ad8:	76bb      	strb	r3, [r7, #26]
 8016ada:	e013      	b.n	8016b04 <lwip_netconn_do_writemore+0x1c4>
 8016adc:	0802ca70 	.word	0x0802ca70
 8016ae0:	0802cbc8 	.word	0x0802cbc8
 8016ae4:	0802cab4 	.word	0x0802cab4
 8016ae8:	0802ced0 	.word	0x0802ced0
 8016aec:	0802cbd8 	.word	0x0802cbd8
 8016af0:	0802cef0 	.word	0x0802cef0
 8016af4:	0802cf08 	.word	0x0802cf08
 8016af8:	0802cf48 	.word	0x0802cf48
 8016afc:	0802cf70 	.word	0x0802cf70
      } else {
        write_more = 0;
 8016b00:	2300      	movs	r3, #0
 8016b02:	767b      	strb	r3, [r7, #25]
      }
      err = tcp_write(conn->pcb.tcp, dataptr, len, apiflags);
 8016b04:	687b      	ldr	r3, [r7, #4]
 8016b06:	6858      	ldr	r0, [r3, #4]
 8016b08:	7ebb      	ldrb	r3, [r7, #26]
 8016b0a:	8bba      	ldrh	r2, [r7, #28]
 8016b0c:	6979      	ldr	r1, [r7, #20]
 8016b0e:	f008 f827 	bl	801eb60 <tcp_write>
 8016b12:	4603      	mov	r3, r0
 8016b14:	77fb      	strb	r3, [r7, #31]
      if (err == ERR_OK) {
 8016b16:	f997 301f 	ldrsb.w	r3, [r7, #31]
 8016b1a:	2b00      	cmp	r3, #0
 8016b1c:	d12c      	bne.n	8016b78 <lwip_netconn_do_writemore+0x238>
        conn->current_msg->msg.w.offset += len;
 8016b1e:	687b      	ldr	r3, [r7, #4]
 8016b20:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016b22:	6999      	ldr	r1, [r3, #24]
 8016b24:	8bba      	ldrh	r2, [r7, #28]
 8016b26:	687b      	ldr	r3, [r7, #4]
 8016b28:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016b2a:	440a      	add	r2, r1
 8016b2c:	619a      	str	r2, [r3, #24]
        conn->current_msg->msg.w.vector_off += len;
 8016b2e:	687b      	ldr	r3, [r7, #4]
 8016b30:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016b32:	6919      	ldr	r1, [r3, #16]
 8016b34:	8bba      	ldrh	r2, [r7, #28]
 8016b36:	687b      	ldr	r3, [r7, #4]
 8016b38:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016b3a:	440a      	add	r2, r1
 8016b3c:	611a      	str	r2, [r3, #16]
        /* check if current vector is finished */
        if (conn->current_msg->msg.w.vector_off == conn->current_msg->msg.w.vector->len) {
 8016b3e:	687b      	ldr	r3, [r7, #4]
 8016b40:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016b42:	691a      	ldr	r2, [r3, #16]
 8016b44:	687b      	ldr	r3, [r7, #4]
 8016b46:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016b48:	689b      	ldr	r3, [r3, #8]
 8016b4a:	685b      	ldr	r3, [r3, #4]
 8016b4c:	429a      	cmp	r2, r3
 8016b4e:	d113      	bne.n	8016b78 <lwip_netconn_do_writemore+0x238>
          conn->current_msg->msg.w.vector_cnt--;
 8016b50:	687b      	ldr	r3, [r7, #4]
 8016b52:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016b54:	899a      	ldrh	r2, [r3, #12]
 8016b56:	3a01      	subs	r2, #1
 8016b58:	b292      	uxth	r2, r2
 8016b5a:	819a      	strh	r2, [r3, #12]
          /* if we have additional vectors, move on to them */
          if (conn->current_msg->msg.w.vector_cnt > 0) {
 8016b5c:	687b      	ldr	r3, [r7, #4]
 8016b5e:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016b60:	899b      	ldrh	r3, [r3, #12]
 8016b62:	2b00      	cmp	r3, #0
 8016b64:	d008      	beq.n	8016b78 <lwip_netconn_do_writemore+0x238>
            conn->current_msg->msg.w.vector++;
 8016b66:	687b      	ldr	r3, [r7, #4]
 8016b68:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016b6a:	689a      	ldr	r2, [r3, #8]
 8016b6c:	3208      	adds	r2, #8
 8016b6e:	609a      	str	r2, [r3, #8]
            conn->current_msg->msg.w.vector_off = 0;
 8016b70:	687b      	ldr	r3, [r7, #4]
 8016b72:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016b74:	2200      	movs	r2, #0
 8016b76:	611a      	str	r2, [r3, #16]
          }
        }
      }
    } while (write_more && err == ERR_OK);
 8016b78:	7e7b      	ldrb	r3, [r7, #25]
 8016b7a:	2b00      	cmp	r3, #0
 8016b7c:	d004      	beq.n	8016b88 <lwip_netconn_do_writemore+0x248>
 8016b7e:	f997 301f 	ldrsb.w	r3, [r7, #31]
 8016b82:	2b00      	cmp	r3, #0
 8016b84:	f43f af3e 	beq.w	8016a04 <lwip_netconn_do_writemore+0xc4>
    /* if OK or memory error, check available space */
    if ((err == ERR_OK) || (err == ERR_MEM)) {
 8016b88:	f997 301f 	ldrsb.w	r3, [r7, #31]
 8016b8c:	2b00      	cmp	r3, #0
 8016b8e:	d004      	beq.n	8016b9a <lwip_netconn_do_writemore+0x25a>
 8016b90:	f997 301f 	ldrsb.w	r3, [r7, #31]
 8016b94:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8016b98:	d137      	bne.n	8016c0a <lwip_netconn_do_writemore+0x2ca>
err_mem:
 8016b9a:	bf00      	nop
      if (dontblock && (conn->current_msg->msg.w.offset < conn->current_msg->msg.w.len)) {
 8016b9c:	7e3b      	ldrb	r3, [r7, #24]
 8016b9e:	2b00      	cmp	r3, #0
 8016ba0:	d01b      	beq.n	8016bda <lwip_netconn_do_writemore+0x29a>
 8016ba2:	687b      	ldr	r3, [r7, #4]
 8016ba4:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016ba6:	699a      	ldr	r2, [r3, #24]
 8016ba8:	687b      	ldr	r3, [r7, #4]
 8016baa:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016bac:	695b      	ldr	r3, [r3, #20]
 8016bae:	429a      	cmp	r2, r3
 8016bb0:	d213      	bcs.n	8016bda <lwip_netconn_do_writemore+0x29a>
        /* non-blocking write did not write everything: mark the pcb non-writable
           and let poll_tcp check writable space to mark the pcb writable again */
        API_EVENT(conn, NETCONN_EVT_SENDMINUS, 0);
 8016bb2:	687b      	ldr	r3, [r7, #4]
 8016bb4:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8016bb6:	2b00      	cmp	r3, #0
 8016bb8:	d005      	beq.n	8016bc6 <lwip_netconn_do_writemore+0x286>
 8016bba:	687b      	ldr	r3, [r7, #4]
 8016bbc:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8016bbe:	2200      	movs	r2, #0
 8016bc0:	2103      	movs	r1, #3
 8016bc2:	6878      	ldr	r0, [r7, #4]
 8016bc4:	4798      	blx	r3
        conn->flags |= NETCONN_FLAG_CHECK_WRITESPACE;
 8016bc6:	687b      	ldr	r3, [r7, #4]
 8016bc8:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8016bcc:	f043 0310 	orr.w	r3, r3, #16
 8016bd0:	b2da      	uxtb	r2, r3
 8016bd2:	687b      	ldr	r3, [r7, #4]
 8016bd4:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
 8016bd8:	e017      	b.n	8016c0a <lwip_netconn_do_writemore+0x2ca>
      } else if ((tcp_sndbuf(conn->pcb.tcp) <= TCP_SNDLOWAT) ||
 8016bda:	687b      	ldr	r3, [r7, #4]
 8016bdc:	685b      	ldr	r3, [r3, #4]
 8016bde:	f8b3 3064 	ldrh.w	r3, [r3, #100]	@ 0x64
 8016be2:	f640 3269 	movw	r2, #2921	@ 0xb69
 8016be6:	4293      	cmp	r3, r2
 8016be8:	d905      	bls.n	8016bf6 <lwip_netconn_do_writemore+0x2b6>
                 (tcp_sndqueuelen(conn->pcb.tcp) >= TCP_SNDQUEUELOWAT)) {
 8016bea:	687b      	ldr	r3, [r7, #4]
 8016bec:	685b      	ldr	r3, [r3, #4]
 8016bee:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
      } else if ((tcp_sndbuf(conn->pcb.tcp) <= TCP_SNDLOWAT) ||
 8016bf2:	2b07      	cmp	r3, #7
 8016bf4:	d909      	bls.n	8016c0a <lwip_netconn_do_writemore+0x2ca>
        /* The queued byte- or pbuf-count exceeds the configured low-water limit,
           let select mark this pcb as non-writable. */
        API_EVENT(conn, NETCONN_EVT_SENDMINUS, 0);
 8016bf6:	687b      	ldr	r3, [r7, #4]
 8016bf8:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8016bfa:	2b00      	cmp	r3, #0
 8016bfc:	d005      	beq.n	8016c0a <lwip_netconn_do_writemore+0x2ca>
 8016bfe:	687b      	ldr	r3, [r7, #4]
 8016c00:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8016c02:	2200      	movs	r2, #0
 8016c04:	2103      	movs	r1, #3
 8016c06:	6878      	ldr	r0, [r7, #4]
 8016c08:	4798      	blx	r3
      }
    }

    if (err == ERR_OK) {
 8016c0a:	f997 301f 	ldrsb.w	r3, [r7, #31]
 8016c0e:	2b00      	cmp	r3, #0
 8016c10:	d11d      	bne.n	8016c4e <lwip_netconn_do_writemore+0x30e>
      err_t out_err;
      if ((conn->current_msg->msg.w.offset == conn->current_msg->msg.w.len) || dontblock) {
 8016c12:	687b      	ldr	r3, [r7, #4]
 8016c14:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016c16:	699a      	ldr	r2, [r3, #24]
 8016c18:	687b      	ldr	r3, [r7, #4]
 8016c1a:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016c1c:	695b      	ldr	r3, [r3, #20]
 8016c1e:	429a      	cmp	r2, r3
 8016c20:	d002      	beq.n	8016c28 <lwip_netconn_do_writemore+0x2e8>
 8016c22:	7e3b      	ldrb	r3, [r7, #24]
 8016c24:	2b00      	cmp	r3, #0
 8016c26:	d001      	beq.n	8016c2c <lwip_netconn_do_writemore+0x2ec>
        /* return sent length (caller reads length from msg.w.offset) */
        write_finished = 1;
 8016c28:	2301      	movs	r3, #1
 8016c2a:	76fb      	strb	r3, [r7, #27]
      }
      out_err = tcp_output(conn->pcb.tcp);
 8016c2c:	687b      	ldr	r3, [r7, #4]
 8016c2e:	685b      	ldr	r3, [r3, #4]
 8016c30:	4618      	mov	r0, r3
 8016c32:	f008 fddf 	bl	801f7f4 <tcp_output>
 8016c36:	4603      	mov	r3, r0
 8016c38:	733b      	strb	r3, [r7, #12]
      if (out_err == ERR_RTE) {
 8016c3a:	f997 300c 	ldrsb.w	r3, [r7, #12]
 8016c3e:	f113 0f04 	cmn.w	r3, #4
 8016c42:	d12c      	bne.n	8016c9e <lwip_netconn_do_writemore+0x35e>
        /* If tcp_output fails because no route is found,
           don't try writing any more but return the error
           to the application thread. */
        err = out_err;
 8016c44:	7b3b      	ldrb	r3, [r7, #12]
 8016c46:	77fb      	strb	r3, [r7, #31]
        write_finished = 1;
 8016c48:	2301      	movs	r3, #1
 8016c4a:	76fb      	strb	r3, [r7, #27]
 8016c4c:	e027      	b.n	8016c9e <lwip_netconn_do_writemore+0x35e>
      }
    } else if (err == ERR_MEM) {
 8016c4e:	f997 301f 	ldrsb.w	r3, [r7, #31]
 8016c52:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8016c56:	d120      	bne.n	8016c9a <lwip_netconn_do_writemore+0x35a>
         For blocking sockets, we do NOT return to the application
         thread, since ERR_MEM is only a temporary error! Non-blocking
         will remain non-writable until sent_tcp/poll_tcp is called */

      /* tcp_write returned ERR_MEM, try tcp_output anyway */
      err_t out_err = tcp_output(conn->pcb.tcp);
 8016c58:	687b      	ldr	r3, [r7, #4]
 8016c5a:	685b      	ldr	r3, [r3, #4]
 8016c5c:	4618      	mov	r0, r3
 8016c5e:	f008 fdc9 	bl	801f7f4 <tcp_output>
 8016c62:	4603      	mov	r3, r0
 8016c64:	737b      	strb	r3, [r7, #13]
      if (out_err == ERR_RTE) {
 8016c66:	f997 300d 	ldrsb.w	r3, [r7, #13]
 8016c6a:	f113 0f04 	cmn.w	r3, #4
 8016c6e:	d104      	bne.n	8016c7a <lwip_netconn_do_writemore+0x33a>
        /* If tcp_output fails because no route is found,
           don't try writing any more but return the error
           to the application thread. */
        err = out_err;
 8016c70:	7b7b      	ldrb	r3, [r7, #13]
 8016c72:	77fb      	strb	r3, [r7, #31]
        write_finished = 1;
 8016c74:	2301      	movs	r3, #1
 8016c76:	76fb      	strb	r3, [r7, #27]
 8016c78:	e011      	b.n	8016c9e <lwip_netconn_do_writemore+0x35e>
      } else if (dontblock) {
 8016c7a:	7e3b      	ldrb	r3, [r7, #24]
 8016c7c:	2b00      	cmp	r3, #0
 8016c7e:	d00e      	beq.n	8016c9e <lwip_netconn_do_writemore+0x35e>
        /* non-blocking write is done on ERR_MEM, set error according
           to partial write or not */
        err = (conn->current_msg->msg.w.offset == 0) ? ERR_WOULDBLOCK : ERR_OK;
 8016c80:	687b      	ldr	r3, [r7, #4]
 8016c82:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016c84:	699b      	ldr	r3, [r3, #24]
 8016c86:	2b00      	cmp	r3, #0
 8016c88:	d102      	bne.n	8016c90 <lwip_netconn_do_writemore+0x350>
 8016c8a:	f06f 0306 	mvn.w	r3, #6
 8016c8e:	e000      	b.n	8016c92 <lwip_netconn_do_writemore+0x352>
 8016c90:	2300      	movs	r3, #0
 8016c92:	77fb      	strb	r3, [r7, #31]
        write_finished = 1;
 8016c94:	2301      	movs	r3, #1
 8016c96:	76fb      	strb	r3, [r7, #27]
 8016c98:	e001      	b.n	8016c9e <lwip_netconn_do_writemore+0x35e>
      }
    } else {
      /* On errors != ERR_MEM, we don't try writing any more but return
         the error to the application thread. */
      write_finished = 1;
 8016c9a:	2301      	movs	r3, #1
 8016c9c:	76fb      	strb	r3, [r7, #27]
    }
  }
  if (write_finished) {
 8016c9e:	7efb      	ldrb	r3, [r7, #27]
 8016ca0:	2b00      	cmp	r3, #0
 8016ca2:	d015      	beq.n	8016cd0 <lwip_netconn_do_writemore+0x390>
    /* everything was written: set back connection state
       and back to application task */
    sys_sem_t *op_completed_sem = LWIP_API_MSG_SEM(conn->current_msg);
 8016ca4:	687b      	ldr	r3, [r7, #4]
 8016ca6:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016ca8:	681b      	ldr	r3, [r3, #0]
 8016caa:	330c      	adds	r3, #12
 8016cac:	60bb      	str	r3, [r7, #8]
    conn->current_msg->err = err;
 8016cae:	687b      	ldr	r3, [r7, #4]
 8016cb0:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016cb2:	7ffa      	ldrb	r2, [r7, #31]
 8016cb4:	711a      	strb	r2, [r3, #4]
    conn->current_msg = NULL;
 8016cb6:	687b      	ldr	r3, [r7, #4]
 8016cb8:	2200      	movs	r2, #0
 8016cba:	62da      	str	r2, [r3, #44]	@ 0x2c
    conn->state = NETCONN_NONE;
 8016cbc:	687b      	ldr	r3, [r7, #4]
 8016cbe:	2200      	movs	r2, #0
 8016cc0:	705a      	strb	r2, [r3, #1]
#if LWIP_TCPIP_CORE_LOCKING
    if (delayed)
 8016cc2:	78fb      	ldrb	r3, [r7, #3]
 8016cc4:	2b00      	cmp	r3, #0
 8016cc6:	d006      	beq.n	8016cd6 <lwip_netconn_do_writemore+0x396>
#endif
    {
      sys_sem_signal(op_completed_sem);
 8016cc8:	68b8      	ldr	r0, [r7, #8]
 8016cca:	f00f f8f3 	bl	8025eb4 <sys_sem_signal>
 8016cce:	e002      	b.n	8016cd6 <lwip_netconn_do_writemore+0x396>
    }
  }
#if LWIP_TCPIP_CORE_LOCKING
  else {
    return ERR_MEM;
 8016cd0:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8016cd4:	e000      	b.n	8016cd8 <lwip_netconn_do_writemore+0x398>
  }
#endif
  return ERR_OK;
 8016cd6:	2300      	movs	r3, #0
}
 8016cd8:	4618      	mov	r0, r3
 8016cda:	3720      	adds	r7, #32
 8016cdc:	46bd      	mov	sp, r7
 8016cde:	bd80      	pop	{r7, pc}

08016ce0 <lwip_netconn_do_write>:
 *
 * @param m the api_msg pointing to the connection
 */
void
lwip_netconn_do_write(void *m)
{
 8016ce0:	b580      	push	{r7, lr}
 8016ce2:	b084      	sub	sp, #16
 8016ce4:	af00      	add	r7, sp, #0
 8016ce6:	6078      	str	r0, [r7, #4]
  struct api_msg *msg = (struct api_msg *)m;
 8016ce8:	687b      	ldr	r3, [r7, #4]
 8016cea:	60bb      	str	r3, [r7, #8]

  err_t err = netconn_err(msg->conn);
 8016cec:	68bb      	ldr	r3, [r7, #8]
 8016cee:	681b      	ldr	r3, [r3, #0]
 8016cf0:	4618      	mov	r0, r3
 8016cf2:	f7fe fca7 	bl	8015644 <netconn_err>
 8016cf6:	4603      	mov	r3, r0
 8016cf8:	73fb      	strb	r3, [r7, #15]
  if (err == ERR_OK) {
 8016cfa:	f997 300f 	ldrsb.w	r3, [r7, #15]
 8016cfe:	2b00      	cmp	r3, #0
 8016d00:	d164      	bne.n	8016dcc <lwip_netconn_do_write+0xec>
    if (NETCONNTYPE_GROUP(msg->conn->type) == NETCONN_TCP) {
 8016d02:	68bb      	ldr	r3, [r7, #8]
 8016d04:	681b      	ldr	r3, [r3, #0]
 8016d06:	781b      	ldrb	r3, [r3, #0]
 8016d08:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8016d0c:	2b10      	cmp	r3, #16
 8016d0e:	d15b      	bne.n	8016dc8 <lwip_netconn_do_write+0xe8>
#if LWIP_TCP
      if (msg->conn->state != NETCONN_NONE) {
 8016d10:	68bb      	ldr	r3, [r7, #8]
 8016d12:	681b      	ldr	r3, [r3, #0]
 8016d14:	785b      	ldrb	r3, [r3, #1]
 8016d16:	2b00      	cmp	r3, #0
 8016d18:	d002      	beq.n	8016d20 <lwip_netconn_do_write+0x40>
        /* netconn is connecting, closing or in blocking write */
        err = ERR_INPROGRESS;
 8016d1a:	23fb      	movs	r3, #251	@ 0xfb
 8016d1c:	73fb      	strb	r3, [r7, #15]
 8016d1e:	e055      	b.n	8016dcc <lwip_netconn_do_write+0xec>
      } else if (msg->conn->pcb.tcp != NULL) {
 8016d20:	68bb      	ldr	r3, [r7, #8]
 8016d22:	681b      	ldr	r3, [r3, #0]
 8016d24:	685b      	ldr	r3, [r3, #4]
 8016d26:	2b00      	cmp	r3, #0
 8016d28:	d04b      	beq.n	8016dc2 <lwip_netconn_do_write+0xe2>
        msg->conn->state = NETCONN_WRITE;
 8016d2a:	68bb      	ldr	r3, [r7, #8]
 8016d2c:	681b      	ldr	r3, [r3, #0]
 8016d2e:	2201      	movs	r2, #1
 8016d30:	705a      	strb	r2, [r3, #1]
        /* set all the variables used by lwip_netconn_do_writemore */
        LWIP_ASSERT("already writing or closing", msg->conn->current_msg == NULL);
 8016d32:	68bb      	ldr	r3, [r7, #8]
 8016d34:	681b      	ldr	r3, [r3, #0]
 8016d36:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016d38:	2b00      	cmp	r3, #0
 8016d3a:	d006      	beq.n	8016d4a <lwip_netconn_do_write+0x6a>
 8016d3c:	4b27      	ldr	r3, [pc, #156]	@ (8016ddc <lwip_netconn_do_write+0xfc>)
 8016d3e:	f240 7223 	movw	r2, #1827	@ 0x723
 8016d42:	4927      	ldr	r1, [pc, #156]	@ (8016de0 <lwip_netconn_do_write+0x100>)
 8016d44:	4827      	ldr	r0, [pc, #156]	@ (8016de4 <lwip_netconn_do_write+0x104>)
 8016d46:	f012 fbe1 	bl	802950c <iprintf>
        LWIP_ASSERT("msg->msg.w.len != 0", msg->msg.w.len != 0);
 8016d4a:	68bb      	ldr	r3, [r7, #8]
 8016d4c:	695b      	ldr	r3, [r3, #20]
 8016d4e:	2b00      	cmp	r3, #0
 8016d50:	d106      	bne.n	8016d60 <lwip_netconn_do_write+0x80>
 8016d52:	4b22      	ldr	r3, [pc, #136]	@ (8016ddc <lwip_netconn_do_write+0xfc>)
 8016d54:	f240 7224 	movw	r2, #1828	@ 0x724
 8016d58:	4923      	ldr	r1, [pc, #140]	@ (8016de8 <lwip_netconn_do_write+0x108>)
 8016d5a:	4822      	ldr	r0, [pc, #136]	@ (8016de4 <lwip_netconn_do_write+0x104>)
 8016d5c:	f012 fbd6 	bl	802950c <iprintf>
        msg->conn->current_msg = msg;
 8016d60:	68bb      	ldr	r3, [r7, #8]
 8016d62:	681b      	ldr	r3, [r3, #0]
 8016d64:	68ba      	ldr	r2, [r7, #8]
 8016d66:	62da      	str	r2, [r3, #44]	@ 0x2c
#if LWIP_TCPIP_CORE_LOCKING
        if (lwip_netconn_do_writemore(msg->conn, 0) != ERR_OK) {
 8016d68:	68bb      	ldr	r3, [r7, #8]
 8016d6a:	681b      	ldr	r3, [r3, #0]
 8016d6c:	2100      	movs	r1, #0
 8016d6e:	4618      	mov	r0, r3
 8016d70:	f7ff fde6 	bl	8016940 <lwip_netconn_do_writemore>
 8016d74:	4603      	mov	r3, r0
 8016d76:	2b00      	cmp	r3, #0
 8016d78:	d02c      	beq.n	8016dd4 <lwip_netconn_do_write+0xf4>
          LWIP_ASSERT("state!", msg->conn->state == NETCONN_WRITE);
 8016d7a:	68bb      	ldr	r3, [r7, #8]
 8016d7c:	681b      	ldr	r3, [r3, #0]
 8016d7e:	785b      	ldrb	r3, [r3, #1]
 8016d80:	2b01      	cmp	r3, #1
 8016d82:	d006      	beq.n	8016d92 <lwip_netconn_do_write+0xb2>
 8016d84:	4b15      	ldr	r3, [pc, #84]	@ (8016ddc <lwip_netconn_do_write+0xfc>)
 8016d86:	f44f 62e5 	mov.w	r2, #1832	@ 0x728
 8016d8a:	4918      	ldr	r1, [pc, #96]	@ (8016dec <lwip_netconn_do_write+0x10c>)
 8016d8c:	4815      	ldr	r0, [pc, #84]	@ (8016de4 <lwip_netconn_do_write+0x104>)
 8016d8e:	f012 fbbd 	bl	802950c <iprintf>
          UNLOCK_TCPIP_CORE();
 8016d92:	f7f9 f95f 	bl	8010054 <sys_unlock_tcpip_core>
          sys_arch_sem_wait(LWIP_API_MSG_SEM(msg), 0);
 8016d96:	68bb      	ldr	r3, [r7, #8]
 8016d98:	681b      	ldr	r3, [r3, #0]
 8016d9a:	330c      	adds	r3, #12
 8016d9c:	2100      	movs	r1, #0
 8016d9e:	4618      	mov	r0, r3
 8016da0:	f00f f857 	bl	8025e52 <sys_arch_sem_wait>
          LOCK_TCPIP_CORE();
 8016da4:	f7f9 f946 	bl	8010034 <sys_lock_tcpip_core>
          LWIP_ASSERT("state!", msg->conn->state != NETCONN_WRITE);
 8016da8:	68bb      	ldr	r3, [r7, #8]
 8016daa:	681b      	ldr	r3, [r3, #0]
 8016dac:	785b      	ldrb	r3, [r3, #1]
 8016dae:	2b01      	cmp	r3, #1
 8016db0:	d110      	bne.n	8016dd4 <lwip_netconn_do_write+0xf4>
 8016db2:	4b0a      	ldr	r3, [pc, #40]	@ (8016ddc <lwip_netconn_do_write+0xfc>)
 8016db4:	f240 722c 	movw	r2, #1836	@ 0x72c
 8016db8:	490c      	ldr	r1, [pc, #48]	@ (8016dec <lwip_netconn_do_write+0x10c>)
 8016dba:	480a      	ldr	r0, [pc, #40]	@ (8016de4 <lwip_netconn_do_write+0x104>)
 8016dbc:	f012 fba6 	bl	802950c <iprintf>
#else /* LWIP_TCPIP_CORE_LOCKING */
        lwip_netconn_do_writemore(msg->conn);
#endif /* LWIP_TCPIP_CORE_LOCKING */
        /* for both cases: if lwip_netconn_do_writemore was called, don't ACK the APIMSG
           since lwip_netconn_do_writemore ACKs it! */
        return;
 8016dc0:	e008      	b.n	8016dd4 <lwip_netconn_do_write+0xf4>
      } else {
        err = ERR_CONN;
 8016dc2:	23f5      	movs	r3, #245	@ 0xf5
 8016dc4:	73fb      	strb	r3, [r7, #15]
 8016dc6:	e001      	b.n	8016dcc <lwip_netconn_do_write+0xec>
#else /* LWIP_TCP */
      err = ERR_VAL;
#endif /* LWIP_TCP */
#if (LWIP_UDP || LWIP_RAW)
    } else {
      err = ERR_VAL;
 8016dc8:	23fa      	movs	r3, #250	@ 0xfa
 8016dca:	73fb      	strb	r3, [r7, #15]
#endif /* (LWIP_UDP || LWIP_RAW) */
    }
  }
  msg->err = err;
 8016dcc:	68bb      	ldr	r3, [r7, #8]
 8016dce:	7bfa      	ldrb	r2, [r7, #15]
 8016dd0:	711a      	strb	r2, [r3, #4]
 8016dd2:	e000      	b.n	8016dd6 <lwip_netconn_do_write+0xf6>
        return;
 8016dd4:	bf00      	nop
  TCPIP_APIMSG_ACK(msg);
}
 8016dd6:	3710      	adds	r7, #16
 8016dd8:	46bd      	mov	sp, r7
 8016dda:	bd80      	pop	{r7, pc}
 8016ddc:	0802ca70 	.word	0x0802ca70
 8016de0:	0802ce14 	.word	0x0802ce14
 8016de4:	0802cab4 	.word	0x0802cab4
 8016de8:	0802cf9c 	.word	0x0802cf9c
 8016dec:	0802ce30 	.word	0x0802ce30

08016df0 <lwip_netconn_do_getaddr>:
 *
 * @param m the api_msg pointing to the connection
 */
void
lwip_netconn_do_getaddr(void *m)
{
 8016df0:	b580      	push	{r7, lr}
 8016df2:	b084      	sub	sp, #16
 8016df4:	af00      	add	r7, sp, #0
 8016df6:	6078      	str	r0, [r7, #4]
  struct api_msg *msg = (struct api_msg *)m;
 8016df8:	687b      	ldr	r3, [r7, #4]
 8016dfa:	60fb      	str	r3, [r7, #12]

  if (msg->conn->pcb.ip != NULL) {
 8016dfc:	68fb      	ldr	r3, [r7, #12]
 8016dfe:	681b      	ldr	r3, [r3, #0]
 8016e00:	685b      	ldr	r3, [r3, #4]
 8016e02:	2b00      	cmp	r3, #0
 8016e04:	d06b      	beq.n	8016ede <lwip_netconn_do_getaddr+0xee>
    if (msg->msg.ad.local) {
 8016e06:	68fb      	ldr	r3, [r7, #12]
 8016e08:	7c1b      	ldrb	r3, [r3, #16]
 8016e0a:	2b00      	cmp	r3, #0
 8016e0c:	d007      	beq.n	8016e1e <lwip_netconn_do_getaddr+0x2e>
      ip_addr_copy(API_EXPR_DEREF(msg->msg.ad.ipaddr),
 8016e0e:	68fb      	ldr	r3, [r7, #12]
 8016e10:	681b      	ldr	r3, [r3, #0]
 8016e12:	685a      	ldr	r2, [r3, #4]
 8016e14:	68fb      	ldr	r3, [r7, #12]
 8016e16:	689b      	ldr	r3, [r3, #8]
 8016e18:	6812      	ldr	r2, [r2, #0]
 8016e1a:	601a      	str	r2, [r3, #0]
 8016e1c:	e006      	b.n	8016e2c <lwip_netconn_do_getaddr+0x3c>
                   msg->conn->pcb.ip->local_ip);
    } else {
      ip_addr_copy(API_EXPR_DEREF(msg->msg.ad.ipaddr),
 8016e1e:	68fb      	ldr	r3, [r7, #12]
 8016e20:	681b      	ldr	r3, [r3, #0]
 8016e22:	685a      	ldr	r2, [r3, #4]
 8016e24:	68fb      	ldr	r3, [r7, #12]
 8016e26:	689b      	ldr	r3, [r3, #8]
 8016e28:	6852      	ldr	r2, [r2, #4]
 8016e2a:	601a      	str	r2, [r3, #0]
                   msg->conn->pcb.ip->remote_ip);
    }

    msg->err = ERR_OK;
 8016e2c:	68fb      	ldr	r3, [r7, #12]
 8016e2e:	2200      	movs	r2, #0
 8016e30:	711a      	strb	r2, [r3, #4]
    switch (NETCONNTYPE_GROUP(msg->conn->type)) {
 8016e32:	68fb      	ldr	r3, [r7, #12]
 8016e34:	681b      	ldr	r3, [r3, #0]
 8016e36:	781b      	ldrb	r3, [r3, #0]
 8016e38:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8016e3c:	2b10      	cmp	r3, #16
 8016e3e:	d021      	beq.n	8016e84 <lwip_netconn_do_getaddr+0x94>
 8016e40:	2b20      	cmp	r3, #32
 8016e42:	d144      	bne.n	8016ece <lwip_netconn_do_getaddr+0xde>
        }
        break;
#endif /* LWIP_RAW */
#if LWIP_UDP
      case NETCONN_UDP:
        if (msg->msg.ad.local) {
 8016e44:	68fb      	ldr	r3, [r7, #12]
 8016e46:	7c1b      	ldrb	r3, [r3, #16]
 8016e48:	2b00      	cmp	r3, #0
 8016e4a:	d007      	beq.n	8016e5c <lwip_netconn_do_getaddr+0x6c>
          API_EXPR_DEREF(msg->msg.ad.port) = msg->conn->pcb.udp->local_port;
 8016e4c:	68fb      	ldr	r3, [r7, #12]
 8016e4e:	681b      	ldr	r3, [r3, #0]
 8016e50:	685a      	ldr	r2, [r3, #4]
 8016e52:	68fb      	ldr	r3, [r7, #12]
 8016e54:	68db      	ldr	r3, [r3, #12]
 8016e56:	8a52      	ldrh	r2, [r2, #18]
 8016e58:	801a      	strh	r2, [r3, #0]
            msg->err = ERR_CONN;
          } else {
            API_EXPR_DEREF(msg->msg.ad.port) = msg->conn->pcb.udp->remote_port;
          }
        }
        break;
 8016e5a:	e044      	b.n	8016ee6 <lwip_netconn_do_getaddr+0xf6>
          if ((msg->conn->pcb.udp->flags & UDP_FLAGS_CONNECTED) == 0) {
 8016e5c:	68fb      	ldr	r3, [r7, #12]
 8016e5e:	681b      	ldr	r3, [r3, #0]
 8016e60:	685b      	ldr	r3, [r3, #4]
 8016e62:	7c1b      	ldrb	r3, [r3, #16]
 8016e64:	f003 0304 	and.w	r3, r3, #4
 8016e68:	2b00      	cmp	r3, #0
 8016e6a:	d103      	bne.n	8016e74 <lwip_netconn_do_getaddr+0x84>
            msg->err = ERR_CONN;
 8016e6c:	68fb      	ldr	r3, [r7, #12]
 8016e6e:	22f5      	movs	r2, #245	@ 0xf5
 8016e70:	711a      	strb	r2, [r3, #4]
        break;
 8016e72:	e038      	b.n	8016ee6 <lwip_netconn_do_getaddr+0xf6>
            API_EXPR_DEREF(msg->msg.ad.port) = msg->conn->pcb.udp->remote_port;
 8016e74:	68fb      	ldr	r3, [r7, #12]
 8016e76:	681b      	ldr	r3, [r3, #0]
 8016e78:	685a      	ldr	r2, [r3, #4]
 8016e7a:	68fb      	ldr	r3, [r7, #12]
 8016e7c:	68db      	ldr	r3, [r3, #12]
 8016e7e:	8a92      	ldrh	r2, [r2, #20]
 8016e80:	801a      	strh	r2, [r3, #0]
        break;
 8016e82:	e030      	b.n	8016ee6 <lwip_netconn_do_getaddr+0xf6>
#endif /* LWIP_UDP */
#if LWIP_TCP
      case NETCONN_TCP:
        if ((msg->msg.ad.local == 0) &&
 8016e84:	68fb      	ldr	r3, [r7, #12]
 8016e86:	7c1b      	ldrb	r3, [r3, #16]
 8016e88:	2b00      	cmp	r3, #0
 8016e8a:	d10f      	bne.n	8016eac <lwip_netconn_do_getaddr+0xbc>
            ((msg->conn->pcb.tcp->state == CLOSED) || (msg->conn->pcb.tcp->state == LISTEN))) {
 8016e8c:	68fb      	ldr	r3, [r7, #12]
 8016e8e:	681b      	ldr	r3, [r3, #0]
 8016e90:	685b      	ldr	r3, [r3, #4]
 8016e92:	7d1b      	ldrb	r3, [r3, #20]
        if ((msg->msg.ad.local == 0) &&
 8016e94:	2b00      	cmp	r3, #0
 8016e96:	d005      	beq.n	8016ea4 <lwip_netconn_do_getaddr+0xb4>
            ((msg->conn->pcb.tcp->state == CLOSED) || (msg->conn->pcb.tcp->state == LISTEN))) {
 8016e98:	68fb      	ldr	r3, [r7, #12]
 8016e9a:	681b      	ldr	r3, [r3, #0]
 8016e9c:	685b      	ldr	r3, [r3, #4]
 8016e9e:	7d1b      	ldrb	r3, [r3, #20]
 8016ea0:	2b01      	cmp	r3, #1
 8016ea2:	d103      	bne.n	8016eac <lwip_netconn_do_getaddr+0xbc>
          /* pcb is not connected and remote name is requested */
          msg->err = ERR_CONN;
 8016ea4:	68fb      	ldr	r3, [r7, #12]
 8016ea6:	22f5      	movs	r2, #245	@ 0xf5
 8016ea8:	711a      	strb	r2, [r3, #4]
        } else {
          API_EXPR_DEREF(msg->msg.ad.port) = (msg->msg.ad.local ? msg->conn->pcb.tcp->local_port : msg->conn->pcb.tcp->remote_port);
        }
        break;
 8016eaa:	e01c      	b.n	8016ee6 <lwip_netconn_do_getaddr+0xf6>
          API_EXPR_DEREF(msg->msg.ad.port) = (msg->msg.ad.local ? msg->conn->pcb.tcp->local_port : msg->conn->pcb.tcp->remote_port);
 8016eac:	68fb      	ldr	r3, [r7, #12]
 8016eae:	7c1b      	ldrb	r3, [r3, #16]
 8016eb0:	2b00      	cmp	r3, #0
 8016eb2:	d004      	beq.n	8016ebe <lwip_netconn_do_getaddr+0xce>
 8016eb4:	68fb      	ldr	r3, [r7, #12]
 8016eb6:	681b      	ldr	r3, [r3, #0]
 8016eb8:	685b      	ldr	r3, [r3, #4]
 8016eba:	8adb      	ldrh	r3, [r3, #22]
 8016ebc:	e003      	b.n	8016ec6 <lwip_netconn_do_getaddr+0xd6>
 8016ebe:	68fb      	ldr	r3, [r7, #12]
 8016ec0:	681b      	ldr	r3, [r3, #0]
 8016ec2:	685b      	ldr	r3, [r3, #4]
 8016ec4:	8b1b      	ldrh	r3, [r3, #24]
 8016ec6:	68fa      	ldr	r2, [r7, #12]
 8016ec8:	68d2      	ldr	r2, [r2, #12]
 8016eca:	8013      	strh	r3, [r2, #0]
        break;
 8016ecc:	e00b      	b.n	8016ee6 <lwip_netconn_do_getaddr+0xf6>
#endif /* LWIP_TCP */
      default:
        LWIP_ASSERT("invalid netconn_type", 0);
 8016ece:	4b08      	ldr	r3, [pc, #32]	@ (8016ef0 <lwip_netconn_do_getaddr+0x100>)
 8016ed0:	f240 727d 	movw	r2, #1917	@ 0x77d
 8016ed4:	4907      	ldr	r1, [pc, #28]	@ (8016ef4 <lwip_netconn_do_getaddr+0x104>)
 8016ed6:	4808      	ldr	r0, [pc, #32]	@ (8016ef8 <lwip_netconn_do_getaddr+0x108>)
 8016ed8:	f012 fb18 	bl	802950c <iprintf>
        break;
 8016edc:	e003      	b.n	8016ee6 <lwip_netconn_do_getaddr+0xf6>
    }
  } else {
    msg->err = ERR_CONN;
 8016ede:	68fb      	ldr	r3, [r7, #12]
 8016ee0:	22f5      	movs	r2, #245	@ 0xf5
 8016ee2:	711a      	strb	r2, [r3, #4]
  }
  TCPIP_APIMSG_ACK(msg);
}
 8016ee4:	bf00      	nop
 8016ee6:	bf00      	nop
 8016ee8:	3710      	adds	r7, #16
 8016eea:	46bd      	mov	sp, r7
 8016eec:	bd80      	pop	{r7, pc}
 8016eee:	bf00      	nop
 8016ef0:	0802ca70 	.word	0x0802ca70
 8016ef4:	0802cfb0 	.word	0x0802cfb0
 8016ef8:	0802cab4 	.word	0x0802cab4

08016efc <lwip_netconn_do_close>:
 *
 * @param m the api_msg pointing to the connection
 */
void
lwip_netconn_do_close(void *m)
{
 8016efc:	b580      	push	{r7, lr}
 8016efe:	b084      	sub	sp, #16
 8016f00:	af00      	add	r7, sp, #0
 8016f02:	6078      	str	r0, [r7, #4]
  struct api_msg *msg = (struct api_msg *)m;
 8016f04:	687b      	ldr	r3, [r7, #4]
 8016f06:	60fb      	str	r3, [r7, #12]

#if LWIP_TCP
  enum netconn_state state = msg->conn->state;
 8016f08:	68fb      	ldr	r3, [r7, #12]
 8016f0a:	681b      	ldr	r3, [r3, #0]
 8016f0c:	785b      	ldrb	r3, [r3, #1]
 8016f0e:	72fb      	strb	r3, [r7, #11]
  /* First check if this is a TCP netconn and if it is in a correct state
      (LISTEN doesn't support half shutdown) */
  if ((msg->conn->pcb.tcp != NULL) &&
 8016f10:	68fb      	ldr	r3, [r7, #12]
 8016f12:	681b      	ldr	r3, [r3, #0]
 8016f14:	685b      	ldr	r3, [r3, #4]
 8016f16:	2b00      	cmp	r3, #0
 8016f18:	d067      	beq.n	8016fea <lwip_netconn_do_close+0xee>
      (NETCONNTYPE_GROUP(msg->conn->type) == NETCONN_TCP) &&
 8016f1a:	68fb      	ldr	r3, [r7, #12]
 8016f1c:	681b      	ldr	r3, [r3, #0]
 8016f1e:	781b      	ldrb	r3, [r3, #0]
 8016f20:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
  if ((msg->conn->pcb.tcp != NULL) &&
 8016f24:	2b10      	cmp	r3, #16
 8016f26:	d160      	bne.n	8016fea <lwip_netconn_do_close+0xee>
      ((msg->msg.sd.shut == NETCONN_SHUT_RDWR) || (state != NETCONN_LISTEN))) {
 8016f28:	68fb      	ldr	r3, [r7, #12]
 8016f2a:	7a1b      	ldrb	r3, [r3, #8]
      (NETCONNTYPE_GROUP(msg->conn->type) == NETCONN_TCP) &&
 8016f2c:	2b03      	cmp	r3, #3
 8016f2e:	d002      	beq.n	8016f36 <lwip_netconn_do_close+0x3a>
      ((msg->msg.sd.shut == NETCONN_SHUT_RDWR) || (state != NETCONN_LISTEN))) {
 8016f30:	7afb      	ldrb	r3, [r7, #11]
 8016f32:	2b02      	cmp	r3, #2
 8016f34:	d059      	beq.n	8016fea <lwip_netconn_do_close+0xee>
    /* Check if we are in a connected state */
    if (state == NETCONN_CONNECT) {
 8016f36:	7afb      	ldrb	r3, [r7, #11]
 8016f38:	2b03      	cmp	r3, #3
 8016f3a:	d103      	bne.n	8016f44 <lwip_netconn_do_close+0x48>
      /* TCP connect in progress: cannot shutdown */
      msg->err = ERR_CONN;
 8016f3c:	68fb      	ldr	r3, [r7, #12]
 8016f3e:	22f5      	movs	r2, #245	@ 0xf5
 8016f40:	711a      	strb	r2, [r3, #4]
    if (state == NETCONN_CONNECT) {
 8016f42:	e057      	b.n	8016ff4 <lwip_netconn_do_close+0xf8>
    } else if (state == NETCONN_WRITE) {
 8016f44:	7afb      	ldrb	r3, [r7, #11]
 8016f46:	2b01      	cmp	r3, #1
 8016f48:	d103      	bne.n	8016f52 <lwip_netconn_do_close+0x56>
        msg->err = tcp_shutdown(msg->conn->pcb.tcp, 1, 0);
      }
    }
    if (state == NETCONN_NONE) {
#else /* LWIP_NETCONN_FULLDUPLEX */
      msg->err = ERR_INPROGRESS;
 8016f4a:	68fb      	ldr	r3, [r7, #12]
 8016f4c:	22fb      	movs	r2, #251	@ 0xfb
 8016f4e:	711a      	strb	r2, [r3, #4]
    if (state == NETCONN_CONNECT) {
 8016f50:	e050      	b.n	8016ff4 <lwip_netconn_do_close+0xf8>
    } else {
#endif /* LWIP_NETCONN_FULLDUPLEX */
      if (msg->msg.sd.shut & NETCONN_SHUT_RD) {
 8016f52:	68fb      	ldr	r3, [r7, #12]
 8016f54:	7a1b      	ldrb	r3, [r3, #8]
 8016f56:	f003 0301 	and.w	r3, r3, #1
 8016f5a:	2b00      	cmp	r3, #0
 8016f5c:	d004      	beq.n	8016f68 <lwip_netconn_do_close+0x6c>
#if LWIP_NETCONN_FULLDUPLEX
        /* Mark mboxes invalid */
        netconn_mark_mbox_invalid(msg->conn);
#else /* LWIP_NETCONN_FULLDUPLEX */
        netconn_drain(msg->conn);
 8016f5e:	68fb      	ldr	r3, [r7, #12]
 8016f60:	681b      	ldr	r3, [r3, #0]
 8016f62:	4618      	mov	r0, r3
 8016f64:	f7ff f82e 	bl	8015fc4 <netconn_drain>
#endif /* LWIP_NETCONN_FULLDUPLEX */
      }
      LWIP_ASSERT("already writing or closing", msg->conn->current_msg == NULL);
 8016f68:	68fb      	ldr	r3, [r7, #12]
 8016f6a:	681b      	ldr	r3, [r3, #0]
 8016f6c:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016f6e:	2b00      	cmp	r3, #0
 8016f70:	d006      	beq.n	8016f80 <lwip_netconn_do_close+0x84>
 8016f72:	4b22      	ldr	r3, [pc, #136]	@ (8016ffc <lwip_netconn_do_close+0x100>)
 8016f74:	f240 72bd 	movw	r2, #1981	@ 0x7bd
 8016f78:	4921      	ldr	r1, [pc, #132]	@ (8017000 <lwip_netconn_do_close+0x104>)
 8016f7a:	4822      	ldr	r0, [pc, #136]	@ (8017004 <lwip_netconn_do_close+0x108>)
 8016f7c:	f012 fac6 	bl	802950c <iprintf>
      msg->conn->state = NETCONN_CLOSE;
 8016f80:	68fb      	ldr	r3, [r7, #12]
 8016f82:	681b      	ldr	r3, [r3, #0]
 8016f84:	2204      	movs	r2, #4
 8016f86:	705a      	strb	r2, [r3, #1]
      msg->conn->current_msg = msg;
 8016f88:	68fb      	ldr	r3, [r7, #12]
 8016f8a:	681b      	ldr	r3, [r3, #0]
 8016f8c:	68fa      	ldr	r2, [r7, #12]
 8016f8e:	62da      	str	r2, [r3, #44]	@ 0x2c
#if LWIP_TCPIP_CORE_LOCKING
      if (lwip_netconn_do_close_internal(msg->conn, 0) != ERR_OK) {
 8016f90:	68fb      	ldr	r3, [r7, #12]
 8016f92:	681b      	ldr	r3, [r3, #0]
 8016f94:	2100      	movs	r1, #0
 8016f96:	4618      	mov	r0, r3
 8016f98:	f7ff f892 	bl	80160c0 <lwip_netconn_do_close_internal>
 8016f9c:	4603      	mov	r3, r0
 8016f9e:	2b00      	cmp	r3, #0
 8016fa0:	d027      	beq.n	8016ff2 <lwip_netconn_do_close+0xf6>
        LWIP_ASSERT("state!", msg->conn->state == NETCONN_CLOSE);
 8016fa2:	68fb      	ldr	r3, [r7, #12]
 8016fa4:	681b      	ldr	r3, [r3, #0]
 8016fa6:	785b      	ldrb	r3, [r3, #1]
 8016fa8:	2b04      	cmp	r3, #4
 8016faa:	d006      	beq.n	8016fba <lwip_netconn_do_close+0xbe>
 8016fac:	4b13      	ldr	r3, [pc, #76]	@ (8016ffc <lwip_netconn_do_close+0x100>)
 8016fae:	f240 72c2 	movw	r2, #1986	@ 0x7c2
 8016fb2:	4915      	ldr	r1, [pc, #84]	@ (8017008 <lwip_netconn_do_close+0x10c>)
 8016fb4:	4813      	ldr	r0, [pc, #76]	@ (8017004 <lwip_netconn_do_close+0x108>)
 8016fb6:	f012 faa9 	bl	802950c <iprintf>
        UNLOCK_TCPIP_CORE();
 8016fba:	f7f9 f84b 	bl	8010054 <sys_unlock_tcpip_core>
        sys_arch_sem_wait(LWIP_API_MSG_SEM(msg), 0);
 8016fbe:	68fb      	ldr	r3, [r7, #12]
 8016fc0:	681b      	ldr	r3, [r3, #0]
 8016fc2:	330c      	adds	r3, #12
 8016fc4:	2100      	movs	r1, #0
 8016fc6:	4618      	mov	r0, r3
 8016fc8:	f00e ff43 	bl	8025e52 <sys_arch_sem_wait>
        LOCK_TCPIP_CORE();
 8016fcc:	f7f9 f832 	bl	8010034 <sys_lock_tcpip_core>
        LWIP_ASSERT("state!", msg->conn->state == NETCONN_NONE);
 8016fd0:	68fb      	ldr	r3, [r7, #12]
 8016fd2:	681b      	ldr	r3, [r3, #0]
 8016fd4:	785b      	ldrb	r3, [r3, #1]
 8016fd6:	2b00      	cmp	r3, #0
 8016fd8:	d00b      	beq.n	8016ff2 <lwip_netconn_do_close+0xf6>
 8016fda:	4b08      	ldr	r3, [pc, #32]	@ (8016ffc <lwip_netconn_do_close+0x100>)
 8016fdc:	f240 72c6 	movw	r2, #1990	@ 0x7c6
 8016fe0:	4909      	ldr	r1, [pc, #36]	@ (8017008 <lwip_netconn_do_close+0x10c>)
 8016fe2:	4808      	ldr	r0, [pc, #32]	@ (8017004 <lwip_netconn_do_close+0x108>)
 8016fe4:	f012 fa92 	bl	802950c <iprintf>
      }
#else /* LWIP_TCPIP_CORE_LOCKING */
      lwip_netconn_do_close_internal(msg->conn);
#endif /* LWIP_TCPIP_CORE_LOCKING */
      /* for tcp netconns, lwip_netconn_do_close_internal ACKs the message */
      return;
 8016fe8:	e003      	b.n	8016ff2 <lwip_netconn_do_close+0xf6>
    }
  } else
#endif /* LWIP_TCP */
  {
    msg->err = ERR_CONN;
 8016fea:	68fb      	ldr	r3, [r7, #12]
 8016fec:	22f5      	movs	r2, #245	@ 0xf5
 8016fee:	711a      	strb	r2, [r3, #4]
 8016ff0:	e000      	b.n	8016ff4 <lwip_netconn_do_close+0xf8>
      return;
 8016ff2:	bf00      	nop
  }
  TCPIP_APIMSG_ACK(msg);
}
 8016ff4:	3710      	adds	r7, #16
 8016ff6:	46bd      	mov	sp, r7
 8016ff8:	bd80      	pop	{r7, pc}
 8016ffa:	bf00      	nop
 8016ffc:	0802ca70 	.word	0x0802ca70
 8017000:	0802ce14 	.word	0x0802ce14
 8017004:	0802cab4 	.word	0x0802cab4
 8017008:	0802ce30 	.word	0x0802ce30

0801700c <err_to_errno>:
  EIO            /* ERR_ARG        -16     Illegal argument.        */
};

int
err_to_errno(err_t err)
{
 801700c:	b480      	push	{r7}
 801700e:	b083      	sub	sp, #12
 8017010:	af00      	add	r7, sp, #0
 8017012:	4603      	mov	r3, r0
 8017014:	71fb      	strb	r3, [r7, #7]
  if ((err > 0) || (-err >= (err_t)LWIP_ARRAYSIZE(err_to_errno_table))) {
 8017016:	f997 3007 	ldrsb.w	r3, [r7, #7]
 801701a:	2b00      	cmp	r3, #0
 801701c:	dc04      	bgt.n	8017028 <err_to_errno+0x1c>
 801701e:	f997 3007 	ldrsb.w	r3, [r7, #7]
 8017022:	f113 0f10 	cmn.w	r3, #16
 8017026:	da01      	bge.n	801702c <err_to_errno+0x20>
    return EIO;
 8017028:	2305      	movs	r3, #5
 801702a:	e005      	b.n	8017038 <err_to_errno+0x2c>
  }
  return err_to_errno_table[-err];
 801702c:	f997 3007 	ldrsb.w	r3, [r7, #7]
 8017030:	425b      	negs	r3, r3
 8017032:	4a04      	ldr	r2, [pc, #16]	@ (8017044 <err_to_errno+0x38>)
 8017034:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
}
 8017038:	4618      	mov	r0, r3
 801703a:	370c      	adds	r7, #12
 801703c:	46bd      	mov	sp, r7
 801703e:	f85d 7b04 	ldr.w	r7, [sp], #4
 8017042:	4770      	bx	lr
 8017044:	0803060c 	.word	0x0803060c

08017048 <netbuf_delete>:
 *
 * @param buf pointer to a netbuf allocated by netbuf_new()
 */
void
netbuf_delete(struct netbuf *buf)
{
 8017048:	b580      	push	{r7, lr}
 801704a:	b082      	sub	sp, #8
 801704c:	af00      	add	r7, sp, #0
 801704e:	6078      	str	r0, [r7, #4]
  if (buf != NULL) {
 8017050:	687b      	ldr	r3, [r7, #4]
 8017052:	2b00      	cmp	r3, #0
 8017054:	d013      	beq.n	801707e <netbuf_delete+0x36>
    if (buf->p != NULL) {
 8017056:	687b      	ldr	r3, [r7, #4]
 8017058:	681b      	ldr	r3, [r3, #0]
 801705a:	2b00      	cmp	r3, #0
 801705c:	d00b      	beq.n	8017076 <netbuf_delete+0x2e>
      pbuf_free(buf->p);
 801705e:	687b      	ldr	r3, [r7, #4]
 8017060:	681b      	ldr	r3, [r3, #0]
 8017062:	4618      	mov	r0, r3
 8017064:	f002 ffda 	bl	801a01c <pbuf_free>
      buf->p = buf->ptr = NULL;
 8017068:	687b      	ldr	r3, [r7, #4]
 801706a:	2200      	movs	r2, #0
 801706c:	605a      	str	r2, [r3, #4]
 801706e:	687b      	ldr	r3, [r7, #4]
 8017070:	685a      	ldr	r2, [r3, #4]
 8017072:	687b      	ldr	r3, [r7, #4]
 8017074:	601a      	str	r2, [r3, #0]
    }
    memp_free(MEMP_NETBUF, buf);
 8017076:	6879      	ldr	r1, [r7, #4]
 8017078:	2006      	movs	r0, #6
 801707a:	f002 f8e1 	bl	8019240 <memp_free>
  }
}
 801707e:	bf00      	nop
 8017080:	3708      	adds	r7, #8
 8017082:	46bd      	mov	sp, r7
 8017084:	bd80      	pop	{r7, pc}
	...

08017088 <netbuf_free>:
 *
 * @param buf pointer to the netbuf which contains the packet buffer to free
 */
void
netbuf_free(struct netbuf *buf)
{
 8017088:	b580      	push	{r7, lr}
 801708a:	b082      	sub	sp, #8
 801708c:	af00      	add	r7, sp, #0
 801708e:	6078      	str	r0, [r7, #4]
  LWIP_ERROR("netbuf_free: invalid buf", (buf != NULL), return;);
 8017090:	687b      	ldr	r3, [r7, #4]
 8017092:	2b00      	cmp	r3, #0
 8017094:	d106      	bne.n	80170a4 <netbuf_free+0x1c>
 8017096:	4b0d      	ldr	r3, [pc, #52]	@ (80170cc <netbuf_free+0x44>)
 8017098:	2281      	movs	r2, #129	@ 0x81
 801709a:	490d      	ldr	r1, [pc, #52]	@ (80170d0 <netbuf_free+0x48>)
 801709c:	480d      	ldr	r0, [pc, #52]	@ (80170d4 <netbuf_free+0x4c>)
 801709e:	f012 fa35 	bl	802950c <iprintf>
 80170a2:	e00f      	b.n	80170c4 <netbuf_free+0x3c>
  if (buf->p != NULL) {
 80170a4:	687b      	ldr	r3, [r7, #4]
 80170a6:	681b      	ldr	r3, [r3, #0]
 80170a8:	2b00      	cmp	r3, #0
 80170aa:	d004      	beq.n	80170b6 <netbuf_free+0x2e>
    pbuf_free(buf->p);
 80170ac:	687b      	ldr	r3, [r7, #4]
 80170ae:	681b      	ldr	r3, [r3, #0]
 80170b0:	4618      	mov	r0, r3
 80170b2:	f002 ffb3 	bl	801a01c <pbuf_free>
  }
  buf->p = buf->ptr = NULL;
 80170b6:	687b      	ldr	r3, [r7, #4]
 80170b8:	2200      	movs	r2, #0
 80170ba:	605a      	str	r2, [r3, #4]
 80170bc:	687b      	ldr	r3, [r7, #4]
 80170be:	685a      	ldr	r2, [r3, #4]
 80170c0:	687b      	ldr	r3, [r7, #4]
 80170c2:	601a      	str	r2, [r3, #0]
#if LWIP_CHECKSUM_ON_COPY
  buf->flags = 0;
  buf->toport_chksum = 0;
#endif /* LWIP_CHECKSUM_ON_COPY */
}
 80170c4:	3708      	adds	r7, #8
 80170c6:	46bd      	mov	sp, r7
 80170c8:	bd80      	pop	{r7, pc}
 80170ca:	bf00      	nop
 80170cc:	0802cfc8 	.word	0x0802cfc8
 80170d0:	0802d064 	.word	0x0802d064
 80170d4:	0802d018 	.word	0x0802d018

080170d8 <netbuf_ref>:
 * @return ERR_OK if data is referenced
 *         ERR_MEM if data couldn't be referenced due to lack of memory
 */
err_t
netbuf_ref(struct netbuf *buf, const void *dataptr, u16_t size)
{
 80170d8:	b580      	push	{r7, lr}
 80170da:	b084      	sub	sp, #16
 80170dc:	af00      	add	r7, sp, #0
 80170de:	60f8      	str	r0, [r7, #12]
 80170e0:	60b9      	str	r1, [r7, #8]
 80170e2:	4613      	mov	r3, r2
 80170e4:	80fb      	strh	r3, [r7, #6]
  LWIP_ERROR("netbuf_ref: invalid buf", (buf != NULL), return ERR_ARG;);
 80170e6:	68fb      	ldr	r3, [r7, #12]
 80170e8:	2b00      	cmp	r3, #0
 80170ea:	d108      	bne.n	80170fe <netbuf_ref+0x26>
 80170ec:	4b1c      	ldr	r3, [pc, #112]	@ (8017160 <netbuf_ref+0x88>)
 80170ee:	2299      	movs	r2, #153	@ 0x99
 80170f0:	491c      	ldr	r1, [pc, #112]	@ (8017164 <netbuf_ref+0x8c>)
 80170f2:	481d      	ldr	r0, [pc, #116]	@ (8017168 <netbuf_ref+0x90>)
 80170f4:	f012 fa0a 	bl	802950c <iprintf>
 80170f8:	f06f 030f 	mvn.w	r3, #15
 80170fc:	e02b      	b.n	8017156 <netbuf_ref+0x7e>
  if (buf->p != NULL) {
 80170fe:	68fb      	ldr	r3, [r7, #12]
 8017100:	681b      	ldr	r3, [r3, #0]
 8017102:	2b00      	cmp	r3, #0
 8017104:	d004      	beq.n	8017110 <netbuf_ref+0x38>
    pbuf_free(buf->p);
 8017106:	68fb      	ldr	r3, [r7, #12]
 8017108:	681b      	ldr	r3, [r3, #0]
 801710a:	4618      	mov	r0, r3
 801710c:	f002 ff86 	bl	801a01c <pbuf_free>
  }
  buf->p = pbuf_alloc(PBUF_TRANSPORT, 0, PBUF_REF);
 8017110:	2241      	movs	r2, #65	@ 0x41
 8017112:	2100      	movs	r1, #0
 8017114:	2036      	movs	r0, #54	@ 0x36
 8017116:	f002 fc6b 	bl	80199f0 <pbuf_alloc>
 801711a:	4602      	mov	r2, r0
 801711c:	68fb      	ldr	r3, [r7, #12]
 801711e:	601a      	str	r2, [r3, #0]
  if (buf->p == NULL) {
 8017120:	68fb      	ldr	r3, [r7, #12]
 8017122:	681b      	ldr	r3, [r3, #0]
 8017124:	2b00      	cmp	r3, #0
 8017126:	d105      	bne.n	8017134 <netbuf_ref+0x5c>
    buf->ptr = NULL;
 8017128:	68fb      	ldr	r3, [r7, #12]
 801712a:	2200      	movs	r2, #0
 801712c:	605a      	str	r2, [r3, #4]
    return ERR_MEM;
 801712e:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8017132:	e010      	b.n	8017156 <netbuf_ref+0x7e>
  }
  ((struct pbuf_rom *)buf->p)->payload = dataptr;
 8017134:	68fb      	ldr	r3, [r7, #12]
 8017136:	681b      	ldr	r3, [r3, #0]
 8017138:	68ba      	ldr	r2, [r7, #8]
 801713a:	605a      	str	r2, [r3, #4]
  buf->p->len = buf->p->tot_len = size;
 801713c:	68fb      	ldr	r3, [r7, #12]
 801713e:	681b      	ldr	r3, [r3, #0]
 8017140:	88fa      	ldrh	r2, [r7, #6]
 8017142:	811a      	strh	r2, [r3, #8]
 8017144:	68fa      	ldr	r2, [r7, #12]
 8017146:	6812      	ldr	r2, [r2, #0]
 8017148:	891b      	ldrh	r3, [r3, #8]
 801714a:	8153      	strh	r3, [r2, #10]
  buf->ptr = buf->p;
 801714c:	68fb      	ldr	r3, [r7, #12]
 801714e:	681a      	ldr	r2, [r3, #0]
 8017150:	68fb      	ldr	r3, [r7, #12]
 8017152:	605a      	str	r2, [r3, #4]
  return ERR_OK;
 8017154:	2300      	movs	r3, #0
}
 8017156:	4618      	mov	r0, r3
 8017158:	3710      	adds	r7, #16
 801715a:	46bd      	mov	sp, r7
 801715c:	bd80      	pop	{r7, pc}
 801715e:	bf00      	nop
 8017160:	0802cfc8 	.word	0x0802cfc8
 8017164:	0802d080 	.word	0x0802d080
 8017168:	0802d018 	.word	0x0802d018

0801716c <tryget_socket_unconn_nouse>:
#endif /* LWIP_NETCONN_FULLDUPLEX */

/* Translate a socket 'int' into a pointer (only fails if the index is invalid) */
static struct lwip_sock *
tryget_socket_unconn_nouse(int fd)
{
 801716c:	b480      	push	{r7}
 801716e:	b085      	sub	sp, #20
 8017170:	af00      	add	r7, sp, #0
 8017172:	6078      	str	r0, [r7, #4]
  int s = fd - LWIP_SOCKET_OFFSET;
 8017174:	687b      	ldr	r3, [r7, #4]
 8017176:	60fb      	str	r3, [r7, #12]
  if ((s < 0) || (s >= NUM_SOCKETS)) {
 8017178:	68fb      	ldr	r3, [r7, #12]
 801717a:	2b00      	cmp	r3, #0
 801717c:	db02      	blt.n	8017184 <tryget_socket_unconn_nouse+0x18>
 801717e:	68fb      	ldr	r3, [r7, #12]
 8017180:	2b03      	cmp	r3, #3
 8017182:	dd01      	ble.n	8017188 <tryget_socket_unconn_nouse+0x1c>
    LWIP_DEBUGF(SOCKETS_DEBUG, ("tryget_socket_unconn(%d): invalid\n", fd));
    return NULL;
 8017184:	2300      	movs	r3, #0
 8017186:	e003      	b.n	8017190 <tryget_socket_unconn_nouse+0x24>
  }
  return &sockets[s];
 8017188:	68fb      	ldr	r3, [r7, #12]
 801718a:	011b      	lsls	r3, r3, #4
 801718c:	4a03      	ldr	r2, [pc, #12]	@ (801719c <tryget_socket_unconn_nouse+0x30>)
 801718e:	4413      	add	r3, r2
}
 8017190:	4618      	mov	r0, r3
 8017192:	3714      	adds	r7, #20
 8017194:	46bd      	mov	sp, r7
 8017196:	f85d 7b04 	ldr.w	r7, [sp], #4
 801719a:	4770      	bx	lr
 801719c:	24023448 	.word	0x24023448

080171a0 <tryget_socket_unconn>:
}

/* Translate a socket 'int' into a pointer (only fails if the index is invalid) */
static struct lwip_sock *
tryget_socket_unconn(int fd)
{
 80171a0:	b580      	push	{r7, lr}
 80171a2:	b084      	sub	sp, #16
 80171a4:	af00      	add	r7, sp, #0
 80171a6:	6078      	str	r0, [r7, #4]
  struct lwip_sock *ret = tryget_socket_unconn_nouse(fd);
 80171a8:	6878      	ldr	r0, [r7, #4]
 80171aa:	f7ff ffdf 	bl	801716c <tryget_socket_unconn_nouse>
 80171ae:	60f8      	str	r0, [r7, #12]
  if (ret != NULL) {
    if (!sock_inc_used(ret)) {
      return NULL;
    }
  }
  return ret;
 80171b0:	68fb      	ldr	r3, [r7, #12]
}
 80171b2:	4618      	mov	r0, r3
 80171b4:	3710      	adds	r7, #16
 80171b6:	46bd      	mov	sp, r7
 80171b8:	bd80      	pop	{r7, pc}

080171ba <tryget_socket>:
 * @param fd externally used socket index
 * @return struct lwip_sock for the socket or NULL if not found
 */
static struct lwip_sock *
tryget_socket(int fd)
{
 80171ba:	b580      	push	{r7, lr}
 80171bc:	b084      	sub	sp, #16
 80171be:	af00      	add	r7, sp, #0
 80171c0:	6078      	str	r0, [r7, #4]
  struct lwip_sock *sock = tryget_socket_unconn(fd);
 80171c2:	6878      	ldr	r0, [r7, #4]
 80171c4:	f7ff ffec 	bl	80171a0 <tryget_socket_unconn>
 80171c8:	60f8      	str	r0, [r7, #12]
  if (sock != NULL) {
 80171ca:	68fb      	ldr	r3, [r7, #12]
 80171cc:	2b00      	cmp	r3, #0
 80171ce:	d005      	beq.n	80171dc <tryget_socket+0x22>
    if (sock->conn) {
 80171d0:	68fb      	ldr	r3, [r7, #12]
 80171d2:	681b      	ldr	r3, [r3, #0]
 80171d4:	2b00      	cmp	r3, #0
 80171d6:	d001      	beq.n	80171dc <tryget_socket+0x22>
      return sock;
 80171d8:	68fb      	ldr	r3, [r7, #12]
 80171da:	e000      	b.n	80171de <tryget_socket+0x24>
    }
    done_socket(sock);
  }
  return NULL;
 80171dc:	2300      	movs	r3, #0
}
 80171de:	4618      	mov	r0, r3
 80171e0:	3710      	adds	r7, #16
 80171e2:	46bd      	mov	sp, r7
 80171e4:	bd80      	pop	{r7, pc}
	...

080171e8 <get_socket>:
 * @param fd externally used socket index
 * @return struct lwip_sock for the socket or NULL if not found
 */
static struct lwip_sock *
get_socket(int fd)
{
 80171e8:	b580      	push	{r7, lr}
 80171ea:	b084      	sub	sp, #16
 80171ec:	af00      	add	r7, sp, #0
 80171ee:	6078      	str	r0, [r7, #4]
  struct lwip_sock *sock = tryget_socket(fd);
 80171f0:	6878      	ldr	r0, [r7, #4]
 80171f2:	f7ff ffe2 	bl	80171ba <tryget_socket>
 80171f6:	60f8      	str	r0, [r7, #12]
  if (!sock) {
 80171f8:	68fb      	ldr	r3, [r7, #12]
 80171fa:	2b00      	cmp	r3, #0
 80171fc:	d104      	bne.n	8017208 <get_socket+0x20>
    if ((fd < LWIP_SOCKET_OFFSET) || (fd >= (LWIP_SOCKET_OFFSET + NUM_SOCKETS))) {
      LWIP_DEBUGF(SOCKETS_DEBUG, ("get_socket(%d): invalid\n", fd));
    }
    set_errno(EBADF);
 80171fe:	4b05      	ldr	r3, [pc, #20]	@ (8017214 <get_socket+0x2c>)
 8017200:	2209      	movs	r2, #9
 8017202:	601a      	str	r2, [r3, #0]
    return NULL;
 8017204:	2300      	movs	r3, #0
 8017206:	e000      	b.n	801720a <get_socket+0x22>
  }
  return sock;
 8017208:	68fb      	ldr	r3, [r7, #12]
}
 801720a:	4618      	mov	r0, r3
 801720c:	3710      	adds	r7, #16
 801720e:	46bd      	mov	sp, r7
 8017210:	bd80      	pop	{r7, pc}
 8017212:	bf00      	nop
 8017214:	2402a2e4 	.word	0x2402a2e4

08017218 <alloc_socket>:
 *                 0 if socket has been created by socket()
 * @return the index of the new socket; -1 on error
 */
static int
alloc_socket(struct netconn *newconn, int accepted)
{
 8017218:	b580      	push	{r7, lr}
 801721a:	b084      	sub	sp, #16
 801721c:	af00      	add	r7, sp, #0
 801721e:	6078      	str	r0, [r7, #4]
 8017220:	6039      	str	r1, [r7, #0]
  int i;
  SYS_ARCH_DECL_PROTECT(lev);
  LWIP_UNUSED_ARG(accepted);

  /* allocate a new socket identifier */
  for (i = 0; i < NUM_SOCKETS; ++i) {
 8017222:	2300      	movs	r3, #0
 8017224:	60fb      	str	r3, [r7, #12]
 8017226:	e052      	b.n	80172ce <alloc_socket+0xb6>
    /* Protect socket array */
    SYS_ARCH_PROTECT(lev);
 8017228:	f00e feda 	bl	8025fe0 <sys_arch_protect>
 801722c:	60b8      	str	r0, [r7, #8]
    if (!sockets[i].conn) {
 801722e:	4a2c      	ldr	r2, [pc, #176]	@ (80172e0 <alloc_socket+0xc8>)
 8017230:	68fb      	ldr	r3, [r7, #12]
 8017232:	011b      	lsls	r3, r3, #4
 8017234:	4413      	add	r3, r2
 8017236:	681b      	ldr	r3, [r3, #0]
 8017238:	2b00      	cmp	r3, #0
 801723a:	d142      	bne.n	80172c2 <alloc_socket+0xaa>
        continue;
      }
      sockets[i].fd_used    = 1;
      sockets[i].fd_free_pending = 0;
#endif
      sockets[i].conn       = newconn;
 801723c:	4a28      	ldr	r2, [pc, #160]	@ (80172e0 <alloc_socket+0xc8>)
 801723e:	68fb      	ldr	r3, [r7, #12]
 8017240:	011b      	lsls	r3, r3, #4
 8017242:	4413      	add	r3, r2
 8017244:	687a      	ldr	r2, [r7, #4]
 8017246:	601a      	str	r2, [r3, #0]
      /* The socket is not yet known to anyone, so no need to protect
         after having marked it as used. */
      SYS_ARCH_UNPROTECT(lev);
 8017248:	68b8      	ldr	r0, [r7, #8]
 801724a:	f00e fed7 	bl	8025ffc <sys_arch_unprotect>
      sockets[i].lastdata.pbuf = NULL;
 801724e:	4a24      	ldr	r2, [pc, #144]	@ (80172e0 <alloc_socket+0xc8>)
 8017250:	68fb      	ldr	r3, [r7, #12]
 8017252:	011b      	lsls	r3, r3, #4
 8017254:	4413      	add	r3, r2
 8017256:	3304      	adds	r3, #4
 8017258:	2200      	movs	r2, #0
 801725a:	601a      	str	r2, [r3, #0]
#if LWIP_SOCKET_SELECT || LWIP_SOCKET_POLL
      LWIP_ASSERT("sockets[i].select_waiting == 0", sockets[i].select_waiting == 0);
 801725c:	4a20      	ldr	r2, [pc, #128]	@ (80172e0 <alloc_socket+0xc8>)
 801725e:	68fb      	ldr	r3, [r7, #12]
 8017260:	011b      	lsls	r3, r3, #4
 8017262:	4413      	add	r3, r2
 8017264:	330e      	adds	r3, #14
 8017266:	781b      	ldrb	r3, [r3, #0]
 8017268:	2b00      	cmp	r3, #0
 801726a:	d006      	beq.n	801727a <alloc_socket+0x62>
 801726c:	4b1d      	ldr	r3, [pc, #116]	@ (80172e4 <alloc_socket+0xcc>)
 801726e:	f240 220e 	movw	r2, #526	@ 0x20e
 8017272:	491d      	ldr	r1, [pc, #116]	@ (80172e8 <alloc_socket+0xd0>)
 8017274:	481d      	ldr	r0, [pc, #116]	@ (80172ec <alloc_socket+0xd4>)
 8017276:	f012 f949 	bl	802950c <iprintf>
      sockets[i].rcvevent   = 0;
 801727a:	4a19      	ldr	r2, [pc, #100]	@ (80172e0 <alloc_socket+0xc8>)
 801727c:	68fb      	ldr	r3, [r7, #12]
 801727e:	011b      	lsls	r3, r3, #4
 8017280:	4413      	add	r3, r2
 8017282:	3308      	adds	r3, #8
 8017284:	2200      	movs	r2, #0
 8017286:	801a      	strh	r2, [r3, #0]
      /* TCP sendbuf is empty, but the socket is not yet writable until connected
       * (unless it has been created by accept()). */
      sockets[i].sendevent  = (NETCONNTYPE_GROUP(newconn->type) == NETCONN_TCP ? (accepted != 0) : 1);
 8017288:	687b      	ldr	r3, [r7, #4]
 801728a:	781b      	ldrb	r3, [r3, #0]
 801728c:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8017290:	2b10      	cmp	r3, #16
 8017292:	d102      	bne.n	801729a <alloc_socket+0x82>
 8017294:	683b      	ldr	r3, [r7, #0]
 8017296:	2b00      	cmp	r3, #0
 8017298:	d001      	beq.n	801729e <alloc_socket+0x86>
 801729a:	2301      	movs	r3, #1
 801729c:	e000      	b.n	80172a0 <alloc_socket+0x88>
 801729e:	2300      	movs	r3, #0
 80172a0:	b299      	uxth	r1, r3
 80172a2:	4a0f      	ldr	r2, [pc, #60]	@ (80172e0 <alloc_socket+0xc8>)
 80172a4:	68fb      	ldr	r3, [r7, #12]
 80172a6:	011b      	lsls	r3, r3, #4
 80172a8:	4413      	add	r3, r2
 80172aa:	330a      	adds	r3, #10
 80172ac:	460a      	mov	r2, r1
 80172ae:	801a      	strh	r2, [r3, #0]
      sockets[i].errevent   = 0;
 80172b0:	4a0b      	ldr	r2, [pc, #44]	@ (80172e0 <alloc_socket+0xc8>)
 80172b2:	68fb      	ldr	r3, [r7, #12]
 80172b4:	011b      	lsls	r3, r3, #4
 80172b6:	4413      	add	r3, r2
 80172b8:	330c      	adds	r3, #12
 80172ba:	2200      	movs	r2, #0
 80172bc:	801a      	strh	r2, [r3, #0]
#endif /* LWIP_SOCKET_SELECT || LWIP_SOCKET_POLL */
      return i + LWIP_SOCKET_OFFSET;
 80172be:	68fb      	ldr	r3, [r7, #12]
 80172c0:	e00a      	b.n	80172d8 <alloc_socket+0xc0>
    }
    SYS_ARCH_UNPROTECT(lev);
 80172c2:	68b8      	ldr	r0, [r7, #8]
 80172c4:	f00e fe9a 	bl	8025ffc <sys_arch_unprotect>
  for (i = 0; i < NUM_SOCKETS; ++i) {
 80172c8:	68fb      	ldr	r3, [r7, #12]
 80172ca:	3301      	adds	r3, #1
 80172cc:	60fb      	str	r3, [r7, #12]
 80172ce:	68fb      	ldr	r3, [r7, #12]
 80172d0:	2b03      	cmp	r3, #3
 80172d2:	dda9      	ble.n	8017228 <alloc_socket+0x10>
  }
  return -1;
 80172d4:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
}
 80172d8:	4618      	mov	r0, r3
 80172da:	3710      	adds	r7, #16
 80172dc:	46bd      	mov	sp, r7
 80172de:	bd80      	pop	{r7, pc}
 80172e0:	24023448 	.word	0x24023448
 80172e4:	0802d160 	.word	0x0802d160
 80172e8:	0802d194 	.word	0x0802d194
 80172ec:	0802d1b4 	.word	0x0802d1b4

080172f0 <free_socket_locked>:
 * @param lastdata lastdata is stored here, must be freed externally
 */
static int
free_socket_locked(struct lwip_sock *sock, int is_tcp, struct netconn **conn,
                   union lwip_sock_lastdata *lastdata)
{
 80172f0:	b480      	push	{r7}
 80172f2:	b085      	sub	sp, #20
 80172f4:	af00      	add	r7, sp, #0
 80172f6:	60f8      	str	r0, [r7, #12]
 80172f8:	60b9      	str	r1, [r7, #8]
 80172fa:	607a      	str	r2, [r7, #4]
 80172fc:	603b      	str	r3, [r7, #0]
  }
#else /* LWIP_NETCONN_FULLDUPLEX */
  LWIP_UNUSED_ARG(is_tcp);
#endif /* LWIP_NETCONN_FULLDUPLEX */

  *lastdata = sock->lastdata;
 80172fe:	683b      	ldr	r3, [r7, #0]
 8017300:	68fa      	ldr	r2, [r7, #12]
 8017302:	6852      	ldr	r2, [r2, #4]
 8017304:	601a      	str	r2, [r3, #0]
  sock->lastdata.pbuf = NULL;
 8017306:	68fb      	ldr	r3, [r7, #12]
 8017308:	2200      	movs	r2, #0
 801730a:	605a      	str	r2, [r3, #4]
  *conn = sock->conn;
 801730c:	68fb      	ldr	r3, [r7, #12]
 801730e:	681a      	ldr	r2, [r3, #0]
 8017310:	687b      	ldr	r3, [r7, #4]
 8017312:	601a      	str	r2, [r3, #0]
  sock->conn = NULL;
 8017314:	68fb      	ldr	r3, [r7, #12]
 8017316:	2200      	movs	r2, #0
 8017318:	601a      	str	r2, [r3, #0]
  return 1;
 801731a:	2301      	movs	r3, #1
}
 801731c:	4618      	mov	r0, r3
 801731e:	3714      	adds	r7, #20
 8017320:	46bd      	mov	sp, r7
 8017322:	f85d 7b04 	ldr.w	r7, [sp], #4
 8017326:	4770      	bx	lr

08017328 <free_socket_free_elements>:

/** Free a socket's leftover members.
 */
static void
free_socket_free_elements(int is_tcp, struct netconn *conn, union lwip_sock_lastdata *lastdata)
{
 8017328:	b580      	push	{r7, lr}
 801732a:	b084      	sub	sp, #16
 801732c:	af00      	add	r7, sp, #0
 801732e:	60f8      	str	r0, [r7, #12]
 8017330:	60b9      	str	r1, [r7, #8]
 8017332:	607a      	str	r2, [r7, #4]
  if (lastdata->pbuf != NULL) {
 8017334:	687b      	ldr	r3, [r7, #4]
 8017336:	681b      	ldr	r3, [r3, #0]
 8017338:	2b00      	cmp	r3, #0
 801733a:	d00d      	beq.n	8017358 <free_socket_free_elements+0x30>
    if (is_tcp) {
 801733c:	68fb      	ldr	r3, [r7, #12]
 801733e:	2b00      	cmp	r3, #0
 8017340:	d005      	beq.n	801734e <free_socket_free_elements+0x26>
      pbuf_free(lastdata->pbuf);
 8017342:	687b      	ldr	r3, [r7, #4]
 8017344:	681b      	ldr	r3, [r3, #0]
 8017346:	4618      	mov	r0, r3
 8017348:	f002 fe68 	bl	801a01c <pbuf_free>
 801734c:	e004      	b.n	8017358 <free_socket_free_elements+0x30>
    } else {
      netbuf_delete(lastdata->netbuf);
 801734e:	687b      	ldr	r3, [r7, #4]
 8017350:	681b      	ldr	r3, [r3, #0]
 8017352:	4618      	mov	r0, r3
 8017354:	f7ff fe78 	bl	8017048 <netbuf_delete>
    }
  }
  if (conn != NULL) {
 8017358:	68bb      	ldr	r3, [r7, #8]
 801735a:	2b00      	cmp	r3, #0
 801735c:	d002      	beq.n	8017364 <free_socket_free_elements+0x3c>
    /* netconn_prepare_delete() has already been called, here we only free the conn */
    netconn_delete(conn);
 801735e:	68b8      	ldr	r0, [r7, #8]
 8017360:	f7fd fd50 	bl	8014e04 <netconn_delete>
  }
}
 8017364:	bf00      	nop
 8017366:	3710      	adds	r7, #16
 8017368:	46bd      	mov	sp, r7
 801736a:	bd80      	pop	{r7, pc}

0801736c <free_socket>:
 * @param sock the socket to free
 * @param is_tcp != 0 for TCP sockets, used to free lastdata
 */
static void
free_socket(struct lwip_sock *sock, int is_tcp)
{
 801736c:	b580      	push	{r7, lr}
 801736e:	b086      	sub	sp, #24
 8017370:	af00      	add	r7, sp, #0
 8017372:	6078      	str	r0, [r7, #4]
 8017374:	6039      	str	r1, [r7, #0]
  struct netconn *conn;
  union lwip_sock_lastdata lastdata;
  SYS_ARCH_DECL_PROTECT(lev);

  /* Protect socket array */
  SYS_ARCH_PROTECT(lev);
 8017376:	f00e fe33 	bl	8025fe0 <sys_arch_protect>
 801737a:	6178      	str	r0, [r7, #20]

  freed = free_socket_locked(sock, is_tcp, &conn, &lastdata);
 801737c:	f107 0308 	add.w	r3, r7, #8
 8017380:	f107 020c 	add.w	r2, r7, #12
 8017384:	6839      	ldr	r1, [r7, #0]
 8017386:	6878      	ldr	r0, [r7, #4]
 8017388:	f7ff ffb2 	bl	80172f0 <free_socket_locked>
 801738c:	6138      	str	r0, [r7, #16]
  SYS_ARCH_UNPROTECT(lev);
 801738e:	6978      	ldr	r0, [r7, #20]
 8017390:	f00e fe34 	bl	8025ffc <sys_arch_unprotect>
  /* don't use 'sock' after this line, as another task might have allocated it */

  if (freed) {
 8017394:	693b      	ldr	r3, [r7, #16]
 8017396:	2b00      	cmp	r3, #0
 8017398:	d006      	beq.n	80173a8 <free_socket+0x3c>
    free_socket_free_elements(is_tcp, conn, &lastdata);
 801739a:	68fb      	ldr	r3, [r7, #12]
 801739c:	f107 0208 	add.w	r2, r7, #8
 80173a0:	4619      	mov	r1, r3
 80173a2:	6838      	ldr	r0, [r7, #0]
 80173a4:	f7ff ffc0 	bl	8017328 <free_socket_free_elements>
  }
}
 80173a8:	bf00      	nop
 80173aa:	3718      	adds	r7, #24
 80173ac:	46bd      	mov	sp, r7
 80173ae:	bd80      	pop	{r7, pc}

080173b0 <lwip_close>:
  return 0;
}

int
lwip_close(int s)
{
 80173b0:	b580      	push	{r7, lr}
 80173b2:	b086      	sub	sp, #24
 80173b4:	af00      	add	r7, sp, #0
 80173b6:	6078      	str	r0, [r7, #4]
  struct lwip_sock *sock;
  int is_tcp = 0;
 80173b8:	2300      	movs	r3, #0
 80173ba:	617b      	str	r3, [r7, #20]
  err_t err;

  LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_close(%d)\n", s));

  sock = get_socket(s);
 80173bc:	6878      	ldr	r0, [r7, #4]
 80173be:	f7ff ff13 	bl	80171e8 <get_socket>
 80173c2:	6138      	str	r0, [r7, #16]
  if (!sock) {
 80173c4:	693b      	ldr	r3, [r7, #16]
 80173c6:	2b00      	cmp	r3, #0
 80173c8:	d102      	bne.n	80173d0 <lwip_close+0x20>
    return -1;
 80173ca:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80173ce:	e039      	b.n	8017444 <lwip_close+0x94>
  }

  if (sock->conn != NULL) {
 80173d0:	693b      	ldr	r3, [r7, #16]
 80173d2:	681b      	ldr	r3, [r3, #0]
 80173d4:	2b00      	cmp	r3, #0
 80173d6:	d00b      	beq.n	80173f0 <lwip_close+0x40>
    is_tcp = NETCONNTYPE_GROUP(netconn_type(sock->conn)) == NETCONN_TCP;
 80173d8:	693b      	ldr	r3, [r7, #16]
 80173da:	681b      	ldr	r3, [r3, #0]
 80173dc:	781b      	ldrb	r3, [r3, #0]
 80173de:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 80173e2:	2b10      	cmp	r3, #16
 80173e4:	bf0c      	ite	eq
 80173e6:	2301      	moveq	r3, #1
 80173e8:	2300      	movne	r3, #0
 80173ea:	b2db      	uxtb	r3, r3
 80173ec:	617b      	str	r3, [r7, #20]
 80173ee:	e00a      	b.n	8017406 <lwip_close+0x56>
  } else {
    LWIP_ASSERT("sock->lastdata == NULL", sock->lastdata.pbuf == NULL);
 80173f0:	693b      	ldr	r3, [r7, #16]
 80173f2:	685b      	ldr	r3, [r3, #4]
 80173f4:	2b00      	cmp	r3, #0
 80173f6:	d006      	beq.n	8017406 <lwip_close+0x56>
 80173f8:	4b14      	ldr	r3, [pc, #80]	@ (801744c <lwip_close+0x9c>)
 80173fa:	f44f 7245 	mov.w	r2, #788	@ 0x314
 80173fe:	4914      	ldr	r1, [pc, #80]	@ (8017450 <lwip_close+0xa0>)
 8017400:	4814      	ldr	r0, [pc, #80]	@ (8017454 <lwip_close+0xa4>)
 8017402:	f012 f883 	bl	802950c <iprintf>
#if LWIP_IPV6_MLD
  /* drop all possibly joined MLD6 memberships */
  lwip_socket_drop_registered_mld6_memberships(s);
#endif /* LWIP_IPV6_MLD */

  err = netconn_prepare_delete(sock->conn);
 8017406:	693b      	ldr	r3, [r7, #16]
 8017408:	681b      	ldr	r3, [r3, #0]
 801740a:	4618      	mov	r0, r3
 801740c:	f7fd fcd6 	bl	8014dbc <netconn_prepare_delete>
 8017410:	4603      	mov	r3, r0
 8017412:	73fb      	strb	r3, [r7, #15]
  if (err != ERR_OK) {
 8017414:	f997 300f 	ldrsb.w	r3, [r7, #15]
 8017418:	2b00      	cmp	r3, #0
 801741a:	d00e      	beq.n	801743a <lwip_close+0x8a>
    sock_set_errno(sock, err_to_errno(err));
 801741c:	f997 300f 	ldrsb.w	r3, [r7, #15]
 8017420:	4618      	mov	r0, r3
 8017422:	f7ff fdf3 	bl	801700c <err_to_errno>
 8017426:	60b8      	str	r0, [r7, #8]
 8017428:	68bb      	ldr	r3, [r7, #8]
 801742a:	2b00      	cmp	r3, #0
 801742c:	d002      	beq.n	8017434 <lwip_close+0x84>
 801742e:	4a0a      	ldr	r2, [pc, #40]	@ (8017458 <lwip_close+0xa8>)
 8017430:	68bb      	ldr	r3, [r7, #8]
 8017432:	6013      	str	r3, [r2, #0]
    done_socket(sock);
    return -1;
 8017434:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8017438:	e004      	b.n	8017444 <lwip_close+0x94>
  }

  free_socket(sock, is_tcp);
 801743a:	6979      	ldr	r1, [r7, #20]
 801743c:	6938      	ldr	r0, [r7, #16]
 801743e:	f7ff ff95 	bl	801736c <free_socket>
  set_errno(0);
  return 0;
 8017442:	2300      	movs	r3, #0
}
 8017444:	4618      	mov	r0, r3
 8017446:	3718      	adds	r7, #24
 8017448:	46bd      	mov	sp, r7
 801744a:	bd80      	pop	{r7, pc}
 801744c:	0802d160 	.word	0x0802d160
 8017450:	0802d220 	.word	0x0802d220
 8017454:	0802d1b4 	.word	0x0802d1b4
 8017458:	2402a2e4 	.word	0x2402a2e4

0801745c <lwip_connect>:

int
lwip_connect(int s, const struct sockaddr *name, socklen_t namelen)
{
 801745c:	b580      	push	{r7, lr}
 801745e:	b08a      	sub	sp, #40	@ 0x28
 8017460:	af00      	add	r7, sp, #0
 8017462:	60f8      	str	r0, [r7, #12]
 8017464:	60b9      	str	r1, [r7, #8]
 8017466:	607a      	str	r2, [r7, #4]
  struct lwip_sock *sock;
  err_t err;

  sock = get_socket(s);
 8017468:	68f8      	ldr	r0, [r7, #12]
 801746a:	f7ff febd 	bl	80171e8 <get_socket>
 801746e:	6278      	str	r0, [r7, #36]	@ 0x24
  if (!sock) {
 8017470:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8017472:	2b00      	cmp	r3, #0
 8017474:	d102      	bne.n	801747c <lwip_connect+0x20>
    return -1;
 8017476:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 801747a:	e062      	b.n	8017542 <lwip_connect+0xe6>
    done_socket(sock);
    return -1;
  }

  LWIP_UNUSED_ARG(namelen);
  if (name->sa_family == AF_UNSPEC) {
 801747c:	68bb      	ldr	r3, [r7, #8]
 801747e:	785b      	ldrb	r3, [r3, #1]
 8017480:	2b00      	cmp	r3, #0
 8017482:	d108      	bne.n	8017496 <lwip_connect+0x3a>
    LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_connect(%d, AF_UNSPEC)\n", s));
    err = netconn_disconnect(sock->conn);
 8017484:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8017486:	681b      	ldr	r3, [r3, #0]
 8017488:	4618      	mov	r0, r3
 801748a:	f7fd fd61 	bl	8014f50 <netconn_disconnect>
 801748e:	4603      	mov	r3, r0
 8017490:	f887 3021 	strb.w	r3, [r7, #33]	@ 0x21
 8017494:	e039      	b.n	801750a <lwip_connect+0xae>
  } else {
    ip_addr_t remote_addr;
    u16_t remote_port;

    /* check size, family and alignment of 'name' */
    LWIP_ERROR("lwip_connect: invalid address", IS_SOCK_ADDR_LEN_VALID(namelen) &&
 8017496:	687b      	ldr	r3, [r7, #4]
 8017498:	2b10      	cmp	r3, #16
 801749a:	d10c      	bne.n	80174b6 <lwip_connect+0x5a>
 801749c:	68bb      	ldr	r3, [r7, #8]
 801749e:	785b      	ldrb	r3, [r3, #1]
 80174a0:	2b00      	cmp	r3, #0
 80174a2:	d003      	beq.n	80174ac <lwip_connect+0x50>
 80174a4:	68bb      	ldr	r3, [r7, #8]
 80174a6:	785b      	ldrb	r3, [r3, #1]
 80174a8:	2b02      	cmp	r3, #2
 80174aa:	d104      	bne.n	80174b6 <lwip_connect+0x5a>
 80174ac:	68bb      	ldr	r3, [r7, #8]
 80174ae:	f003 0303 	and.w	r3, r3, #3
 80174b2:	2b00      	cmp	r3, #0
 80174b4:	d014      	beq.n	80174e0 <lwip_connect+0x84>
 80174b6:	4b25      	ldr	r3, [pc, #148]	@ (801754c <lwip_connect+0xf0>)
 80174b8:	f240 3247 	movw	r2, #839	@ 0x347
 80174bc:	4924      	ldr	r1, [pc, #144]	@ (8017550 <lwip_connect+0xf4>)
 80174be:	4825      	ldr	r0, [pc, #148]	@ (8017554 <lwip_connect+0xf8>)
 80174c0:	f012 f824 	bl	802950c <iprintf>
 80174c4:	f06f 000f 	mvn.w	r0, #15
 80174c8:	f7ff fda0 	bl	801700c <err_to_errno>
 80174cc:	61f8      	str	r0, [r7, #28]
 80174ce:	69fb      	ldr	r3, [r7, #28]
 80174d0:	2b00      	cmp	r3, #0
 80174d2:	d002      	beq.n	80174da <lwip_connect+0x7e>
 80174d4:	4a20      	ldr	r2, [pc, #128]	@ (8017558 <lwip_connect+0xfc>)
 80174d6:	69fb      	ldr	r3, [r7, #28]
 80174d8:	6013      	str	r3, [r2, #0]
 80174da:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80174de:	e030      	b.n	8017542 <lwip_connect+0xe6>
               IS_SOCK_ADDR_TYPE_VALID_OR_UNSPEC(name) && IS_SOCK_ADDR_ALIGNED(name),
               sock_set_errno(sock, err_to_errno(ERR_ARG)); done_socket(sock); return -1;);

    SOCKADDR_TO_IPADDR_PORT(name, &remote_addr, remote_port);
 80174e0:	68bb      	ldr	r3, [r7, #8]
 80174e2:	685b      	ldr	r3, [r3, #4]
 80174e4:	613b      	str	r3, [r7, #16]
 80174e6:	68bb      	ldr	r3, [r7, #8]
 80174e8:	885b      	ldrh	r3, [r3, #2]
 80174ea:	4618      	mov	r0, r3
 80174ec:	f001 f8b4 	bl	8018658 <lwip_htons>
 80174f0:	4603      	mov	r3, r0
 80174f2:	847b      	strh	r3, [r7, #34]	@ 0x22
      unmap_ipv4_mapped_ipv6(ip_2_ip4(&remote_addr), ip_2_ip6(&remote_addr));
      IP_SET_TYPE_VAL(remote_addr, IPADDR_TYPE_V4);
    }
#endif /* LWIP_IPV4 && LWIP_IPV6 */

    err = netconn_connect(sock->conn, &remote_addr, remote_port);
 80174f4:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80174f6:	681b      	ldr	r3, [r3, #0]
 80174f8:	8c7a      	ldrh	r2, [r7, #34]	@ 0x22
 80174fa:	f107 0110 	add.w	r1, r7, #16
 80174fe:	4618      	mov	r0, r3
 8017500:	f7fd fcee 	bl	8014ee0 <netconn_connect>
 8017504:	4603      	mov	r3, r0
 8017506:	f887 3021 	strb.w	r3, [r7, #33]	@ 0x21
  }

  if (err != ERR_OK) {
 801750a:	f997 3021 	ldrsb.w	r3, [r7, #33]	@ 0x21
 801750e:	2b00      	cmp	r3, #0
 8017510:	d00e      	beq.n	8017530 <lwip_connect+0xd4>
    LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_connect(%d) failed, err=%d\n", s, err));
    sock_set_errno(sock, err_to_errno(err));
 8017512:	f997 3021 	ldrsb.w	r3, [r7, #33]	@ 0x21
 8017516:	4618      	mov	r0, r3
 8017518:	f7ff fd78 	bl	801700c <err_to_errno>
 801751c:	6178      	str	r0, [r7, #20]
 801751e:	697b      	ldr	r3, [r7, #20]
 8017520:	2b00      	cmp	r3, #0
 8017522:	d002      	beq.n	801752a <lwip_connect+0xce>
 8017524:	4a0c      	ldr	r2, [pc, #48]	@ (8017558 <lwip_connect+0xfc>)
 8017526:	697b      	ldr	r3, [r7, #20]
 8017528:	6013      	str	r3, [r2, #0]
    done_socket(sock);
    return -1;
 801752a:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 801752e:	e008      	b.n	8017542 <lwip_connect+0xe6>
  }

  LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_connect(%d) succeeded\n", s));
  sock_set_errno(sock, 0);
 8017530:	2300      	movs	r3, #0
 8017532:	61bb      	str	r3, [r7, #24]
 8017534:	69bb      	ldr	r3, [r7, #24]
 8017536:	2b00      	cmp	r3, #0
 8017538:	d002      	beq.n	8017540 <lwip_connect+0xe4>
 801753a:	4a07      	ldr	r2, [pc, #28]	@ (8017558 <lwip_connect+0xfc>)
 801753c:	69bb      	ldr	r3, [r7, #24]
 801753e:	6013      	str	r3, [r2, #0]
  done_socket(sock);
  return 0;
 8017540:	2300      	movs	r3, #0
}
 8017542:	4618      	mov	r0, r3
 8017544:	3728      	adds	r7, #40	@ 0x28
 8017546:	46bd      	mov	sp, r7
 8017548:	bd80      	pop	{r7, pc}
 801754a:	bf00      	nop
 801754c:	0802d160 	.word	0x0802d160
 8017550:	0802d238 	.word	0x0802d238
 8017554:	0802d1b4 	.word	0x0802d1b4
 8017558:	2402a2e4 	.word	0x2402a2e4

0801755c <lwip_recv_tcp>:
 * until "len" bytes are received or we're otherwise done.
 * Keeps sock->lastdata for peeking or partly copying.
 */
static ssize_t
lwip_recv_tcp(struct lwip_sock *sock, void *mem, size_t len, int flags)
{
 801755c:	b580      	push	{r7, lr}
 801755e:	b08c      	sub	sp, #48	@ 0x30
 8017560:	af00      	add	r7, sp, #0
 8017562:	60f8      	str	r0, [r7, #12]
 8017564:	60b9      	str	r1, [r7, #8]
 8017566:	607a      	str	r2, [r7, #4]
 8017568:	603b      	str	r3, [r7, #0]
  u8_t apiflags = NETCONN_NOAUTORCVD;
 801756a:	2308      	movs	r3, #8
 801756c:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
  ssize_t recvd = 0;
 8017570:	2300      	movs	r3, #0
 8017572:	62bb      	str	r3, [r7, #40]	@ 0x28
  ssize_t recv_left = (len <= SSIZE_MAX) ? (ssize_t)len : SSIZE_MAX;
 8017574:	687b      	ldr	r3, [r7, #4]
 8017576:	2b00      	cmp	r3, #0
 8017578:	db01      	blt.n	801757e <lwip_recv_tcp+0x22>
 801757a:	687b      	ldr	r3, [r7, #4]
 801757c:	e001      	b.n	8017582 <lwip_recv_tcp+0x26>
 801757e:	f06f 4300 	mvn.w	r3, #2147483648	@ 0x80000000
 8017582:	627b      	str	r3, [r7, #36]	@ 0x24

  LWIP_ASSERT("no socket given", sock != NULL);
 8017584:	68fb      	ldr	r3, [r7, #12]
 8017586:	2b00      	cmp	r3, #0
 8017588:	d106      	bne.n	8017598 <lwip_recv_tcp+0x3c>
 801758a:	4b74      	ldr	r3, [pc, #464]	@ (801775c <lwip_recv_tcp+0x200>)
 801758c:	f240 329e 	movw	r2, #926	@ 0x39e
 8017590:	4973      	ldr	r1, [pc, #460]	@ (8017760 <lwip_recv_tcp+0x204>)
 8017592:	4874      	ldr	r0, [pc, #464]	@ (8017764 <lwip_recv_tcp+0x208>)
 8017594:	f011 ffba 	bl	802950c <iprintf>
  LWIP_ASSERT("this should be checked internally", NETCONNTYPE_GROUP(netconn_type(sock->conn)) == NETCONN_TCP);
 8017598:	68fb      	ldr	r3, [r7, #12]
 801759a:	681b      	ldr	r3, [r3, #0]
 801759c:	781b      	ldrb	r3, [r3, #0]
 801759e:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 80175a2:	2b10      	cmp	r3, #16
 80175a4:	d006      	beq.n	80175b4 <lwip_recv_tcp+0x58>
 80175a6:	4b6d      	ldr	r3, [pc, #436]	@ (801775c <lwip_recv_tcp+0x200>)
 80175a8:	f240 329f 	movw	r2, #927	@ 0x39f
 80175ac:	496e      	ldr	r1, [pc, #440]	@ (8017768 <lwip_recv_tcp+0x20c>)
 80175ae:	486d      	ldr	r0, [pc, #436]	@ (8017764 <lwip_recv_tcp+0x208>)
 80175b0:	f011 ffac 	bl	802950c <iprintf>

  if (flags & MSG_DONTWAIT) {
 80175b4:	683b      	ldr	r3, [r7, #0]
 80175b6:	f003 0308 	and.w	r3, r3, #8
 80175ba:	2b00      	cmp	r3, #0
 80175bc:	d005      	beq.n	80175ca <lwip_recv_tcp+0x6e>
    apiflags |= NETCONN_DONTBLOCK;
 80175be:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 80175c2:	f043 0304 	orr.w	r3, r3, #4
 80175c6:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
    err_t err;
    u16_t copylen;

    LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recv_tcp: top while sock->lastdata=%p\n", (void *)sock->lastdata.pbuf));
    /* Check if there is data left from the last recv operation. */
    if (sock->lastdata.pbuf) {
 80175ca:	68fb      	ldr	r3, [r7, #12]
 80175cc:	685b      	ldr	r3, [r3, #4]
 80175ce:	2b00      	cmp	r3, #0
 80175d0:	d003      	beq.n	80175da <lwip_recv_tcp+0x7e>
      p = sock->lastdata.pbuf;
 80175d2:	68fb      	ldr	r3, [r7, #12]
 80175d4:	685b      	ldr	r3, [r3, #4]
 80175d6:	617b      	str	r3, [r7, #20]
 80175d8:	e036      	b.n	8017648 <lwip_recv_tcp+0xec>
    } else {
      /* No data was left from the previous operation, so we try to get
         some from the network. */
      err = netconn_recv_tcp_pbuf_flags(sock->conn, &p, apiflags);
 80175da:	68fb      	ldr	r3, [r7, #12]
 80175dc:	681b      	ldr	r3, [r3, #0]
 80175de:	f897 2023 	ldrb.w	r2, [r7, #35]	@ 0x23
 80175e2:	f107 0114 	add.w	r1, r7, #20
 80175e6:	4618      	mov	r0, r3
 80175e8:	f7fd fea4 	bl	8015334 <netconn_recv_tcp_pbuf_flags>
 80175ec:	4603      	mov	r3, r0
 80175ee:	f887 3022 	strb.w	r3, [r7, #34]	@ 0x22
      LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recv_tcp: netconn_recv err=%d, pbuf=%p\n",
                                  err, (void *)p));

      if (err != ERR_OK) {
 80175f2:	f997 3022 	ldrsb.w	r3, [r7, #34]	@ 0x22
 80175f6:	2b00      	cmp	r3, #0
 80175f8:	d019      	beq.n	801762e <lwip_recv_tcp+0xd2>
        if (recvd > 0) {
 80175fa:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80175fc:	2b00      	cmp	r3, #0
 80175fe:	f300 808d 	bgt.w	801771c <lwip_recv_tcp+0x1c0>
          goto lwip_recv_tcp_done;
        }
        /* We should really do some error checking here. */
        LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recv_tcp: p == NULL, error is \"%s\"!\n",
                                    lwip_strerr(err)));
        sock_set_errno(sock, err_to_errno(err));
 8017602:	f997 3022 	ldrsb.w	r3, [r7, #34]	@ 0x22
 8017606:	4618      	mov	r0, r3
 8017608:	f7ff fd00 	bl	801700c <err_to_errno>
 801760c:	61f8      	str	r0, [r7, #28]
 801760e:	69fb      	ldr	r3, [r7, #28]
 8017610:	2b00      	cmp	r3, #0
 8017612:	d002      	beq.n	801761a <lwip_recv_tcp+0xbe>
 8017614:	4a55      	ldr	r2, [pc, #340]	@ (801776c <lwip_recv_tcp+0x210>)
 8017616:	69fb      	ldr	r3, [r7, #28]
 8017618:	6013      	str	r3, [r2, #0]
        if (err == ERR_CLSD) {
 801761a:	f997 3022 	ldrsb.w	r3, [r7, #34]	@ 0x22
 801761e:	f113 0f0f 	cmn.w	r3, #15
 8017622:	d101      	bne.n	8017628 <lwip_recv_tcp+0xcc>
          return 0;
 8017624:	2300      	movs	r3, #0
 8017626:	e094      	b.n	8017752 <lwip_recv_tcp+0x1f6>
        } else {
          return -1;
 8017628:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 801762c:	e091      	b.n	8017752 <lwip_recv_tcp+0x1f6>
        }
      }
      LWIP_ASSERT("p != NULL", p != NULL);
 801762e:	697b      	ldr	r3, [r7, #20]
 8017630:	2b00      	cmp	r3, #0
 8017632:	d106      	bne.n	8017642 <lwip_recv_tcp+0xe6>
 8017634:	4b49      	ldr	r3, [pc, #292]	@ (801775c <lwip_recv_tcp+0x200>)
 8017636:	f240 32c5 	movw	r2, #965	@ 0x3c5
 801763a:	494d      	ldr	r1, [pc, #308]	@ (8017770 <lwip_recv_tcp+0x214>)
 801763c:	4849      	ldr	r0, [pc, #292]	@ (8017764 <lwip_recv_tcp+0x208>)
 801763e:	f011 ff65 	bl	802950c <iprintf>
      sock->lastdata.pbuf = p;
 8017642:	697a      	ldr	r2, [r7, #20]
 8017644:	68fb      	ldr	r3, [r7, #12]
 8017646:	605a      	str	r2, [r3, #4]
    }

    LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recv_tcp: buflen=%"U16_F" recv_left=%d off=%d\n",
                                p->tot_len, (int)recv_left, (int)recvd));

    if (recv_left > p->tot_len) {
 8017648:	697b      	ldr	r3, [r7, #20]
 801764a:	891b      	ldrh	r3, [r3, #8]
 801764c:	461a      	mov	r2, r3
 801764e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8017650:	4293      	cmp	r3, r2
 8017652:	dd03      	ble.n	801765c <lwip_recv_tcp+0x100>
      copylen = p->tot_len;
 8017654:	697b      	ldr	r3, [r7, #20]
 8017656:	891b      	ldrh	r3, [r3, #8]
 8017658:	85fb      	strh	r3, [r7, #46]	@ 0x2e
 801765a:	e001      	b.n	8017660 <lwip_recv_tcp+0x104>
    } else {
      copylen = (u16_t)recv_left;
 801765c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801765e:	85fb      	strh	r3, [r7, #46]	@ 0x2e
    }
    if (recvd + copylen < recvd) {
 8017660:	8dfa      	ldrh	r2, [r7, #46]	@ 0x2e
 8017662:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8017664:	4413      	add	r3, r2
 8017666:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 8017668:	429a      	cmp	r2, r3
 801766a:	dd03      	ble.n	8017674 <lwip_recv_tcp+0x118>
      /* overflow */
      copylen = (u16_t)(SSIZE_MAX - recvd);
 801766c:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801766e:	b29b      	uxth	r3, r3
 8017670:	43db      	mvns	r3, r3
 8017672:	85fb      	strh	r3, [r7, #46]	@ 0x2e
    }

    /* copy the contents of the received buffer into
    the supplied memory pointer mem */
    pbuf_copy_partial(p, (u8_t *)mem + recvd, copylen, 0);
 8017674:	6978      	ldr	r0, [r7, #20]
 8017676:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8017678:	68ba      	ldr	r2, [r7, #8]
 801767a:	18d1      	adds	r1, r2, r3
 801767c:	8dfa      	ldrh	r2, [r7, #46]	@ 0x2e
 801767e:	2300      	movs	r3, #0
 8017680:	f002 fed2 	bl	801a428 <pbuf_copy_partial>

    recvd += copylen;
 8017684:	8dfb      	ldrh	r3, [r7, #46]	@ 0x2e
 8017686:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 8017688:	4413      	add	r3, r2
 801768a:	62bb      	str	r3, [r7, #40]	@ 0x28

    /* TCP combines multiple pbufs for one recv */
    LWIP_ASSERT("invalid copylen, len would underflow", recv_left >= copylen);
 801768c:	8dfb      	ldrh	r3, [r7, #46]	@ 0x2e
 801768e:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8017690:	429a      	cmp	r2, r3
 8017692:	da06      	bge.n	80176a2 <lwip_recv_tcp+0x146>
 8017694:	4b31      	ldr	r3, [pc, #196]	@ (801775c <lwip_recv_tcp+0x200>)
 8017696:	f240 32dd 	movw	r2, #989	@ 0x3dd
 801769a:	4936      	ldr	r1, [pc, #216]	@ (8017774 <lwip_recv_tcp+0x218>)
 801769c:	4831      	ldr	r0, [pc, #196]	@ (8017764 <lwip_recv_tcp+0x208>)
 801769e:	f011 ff35 	bl	802950c <iprintf>
    recv_left -= copylen;
 80176a2:	8dfb      	ldrh	r3, [r7, #46]	@ 0x2e
 80176a4:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 80176a6:	1ad3      	subs	r3, r2, r3
 80176a8:	627b      	str	r3, [r7, #36]	@ 0x24

    /* Unless we peek the incoming message... */
    if ((flags & MSG_PEEK) == 0) {
 80176aa:	683b      	ldr	r3, [r7, #0]
 80176ac:	f003 0301 	and.w	r3, r3, #1
 80176b0:	2b00      	cmp	r3, #0
 80176b2:	d123      	bne.n	80176fc <lwip_recv_tcp+0x1a0>
      /* ... check if there is data left in the pbuf */
      LWIP_ASSERT("invalid copylen", p->tot_len >= copylen);
 80176b4:	697b      	ldr	r3, [r7, #20]
 80176b6:	891b      	ldrh	r3, [r3, #8]
 80176b8:	8dfa      	ldrh	r2, [r7, #46]	@ 0x2e
 80176ba:	429a      	cmp	r2, r3
 80176bc:	d906      	bls.n	80176cc <lwip_recv_tcp+0x170>
 80176be:	4b27      	ldr	r3, [pc, #156]	@ (801775c <lwip_recv_tcp+0x200>)
 80176c0:	f240 32e3 	movw	r2, #995	@ 0x3e3
 80176c4:	492c      	ldr	r1, [pc, #176]	@ (8017778 <lwip_recv_tcp+0x21c>)
 80176c6:	4827      	ldr	r0, [pc, #156]	@ (8017764 <lwip_recv_tcp+0x208>)
 80176c8:	f011 ff20 	bl	802950c <iprintf>
      if (p->tot_len - copylen > 0) {
 80176cc:	697b      	ldr	r3, [r7, #20]
 80176ce:	891b      	ldrh	r3, [r3, #8]
 80176d0:	461a      	mov	r2, r3
 80176d2:	8dfb      	ldrh	r3, [r7, #46]	@ 0x2e
 80176d4:	1ad3      	subs	r3, r2, r3
 80176d6:	2b00      	cmp	r3, #0
 80176d8:	dd09      	ble.n	80176ee <lwip_recv_tcp+0x192>
        /* If so, it should be saved in the sock structure for the next recv call.
           We store the pbuf but hide/free the consumed data: */
        sock->lastdata.pbuf = pbuf_free_header(p, copylen);
 80176da:	697b      	ldr	r3, [r7, #20]
 80176dc:	8dfa      	ldrh	r2, [r7, #46]	@ 0x2e
 80176de:	4611      	mov	r1, r2
 80176e0:	4618      	mov	r0, r3
 80176e2:	f002 fc68 	bl	8019fb6 <pbuf_free_header>
 80176e6:	4602      	mov	r2, r0
 80176e8:	68fb      	ldr	r3, [r7, #12]
 80176ea:	605a      	str	r2, [r3, #4]
 80176ec:	e006      	b.n	80176fc <lwip_recv_tcp+0x1a0>
        LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recv_tcp: lastdata now pbuf=%p\n", (void *)sock->lastdata.pbuf));
      } else {
        sock->lastdata.pbuf = NULL;
 80176ee:	68fb      	ldr	r3, [r7, #12]
 80176f0:	2200      	movs	r2, #0
 80176f2:	605a      	str	r2, [r3, #4]
        LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recv_tcp: deleting pbuf=%p\n", (void *)p));
        pbuf_free(p);
 80176f4:	697b      	ldr	r3, [r7, #20]
 80176f6:	4618      	mov	r0, r3
 80176f8:	f002 fc90 	bl	801a01c <pbuf_free>
      }
    }
    /* once we have some data to return, only add more if we don't need to wait */
    apiflags |= NETCONN_DONTBLOCK | NETCONN_NOFIN;
 80176fc:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 8017700:	f043 0314 	orr.w	r3, r3, #20
 8017704:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
    /* @todo: do we need to support peeking more than one pbuf? */
  } while ((recv_left > 0) && !(flags & MSG_PEEK));
 8017708:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801770a:	2b00      	cmp	r3, #0
 801770c:	dd08      	ble.n	8017720 <lwip_recv_tcp+0x1c4>
 801770e:	683b      	ldr	r3, [r7, #0]
 8017710:	f003 0301 	and.w	r3, r3, #1
 8017714:	2b00      	cmp	r3, #0
 8017716:	f43f af58 	beq.w	80175ca <lwip_recv_tcp+0x6e>
lwip_recv_tcp_done:
 801771a:	e001      	b.n	8017720 <lwip_recv_tcp+0x1c4>
          goto lwip_recv_tcp_done;
 801771c:	bf00      	nop
 801771e:	e000      	b.n	8017722 <lwip_recv_tcp+0x1c6>
lwip_recv_tcp_done:
 8017720:	bf00      	nop
  if ((recvd > 0) && !(flags & MSG_PEEK)) {
 8017722:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8017724:	2b00      	cmp	r3, #0
 8017726:	dd0b      	ble.n	8017740 <lwip_recv_tcp+0x1e4>
 8017728:	683b      	ldr	r3, [r7, #0]
 801772a:	f003 0301 	and.w	r3, r3, #1
 801772e:	2b00      	cmp	r3, #0
 8017730:	d106      	bne.n	8017740 <lwip_recv_tcp+0x1e4>
    /* ensure window update after copying all data */
    netconn_tcp_recvd(sock->conn, (size_t)recvd);
 8017732:	68fb      	ldr	r3, [r7, #12]
 8017734:	681b      	ldr	r3, [r3, #0]
 8017736:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 8017738:	4611      	mov	r1, r2
 801773a:	4618      	mov	r0, r3
 801773c:	f7fd fd42 	bl	80151c4 <netconn_tcp_recvd>
  }
  sock_set_errno(sock, 0);
 8017740:	2300      	movs	r3, #0
 8017742:	61bb      	str	r3, [r7, #24]
 8017744:	69bb      	ldr	r3, [r7, #24]
 8017746:	2b00      	cmp	r3, #0
 8017748:	d002      	beq.n	8017750 <lwip_recv_tcp+0x1f4>
 801774a:	4a08      	ldr	r2, [pc, #32]	@ (801776c <lwip_recv_tcp+0x210>)
 801774c:	69bb      	ldr	r3, [r7, #24]
 801774e:	6013      	str	r3, [r2, #0]
  return recvd;
 8017750:	6abb      	ldr	r3, [r7, #40]	@ 0x28
}
 8017752:	4618      	mov	r0, r3
 8017754:	3730      	adds	r7, #48	@ 0x30
 8017756:	46bd      	mov	sp, r7
 8017758:	bd80      	pop	{r7, pc}
 801775a:	bf00      	nop
 801775c:	0802d160 	.word	0x0802d160
 8017760:	0802d258 	.word	0x0802d258
 8017764:	0802d1b4 	.word	0x0802d1b4
 8017768:	0802d268 	.word	0x0802d268
 801776c:	2402a2e4 	.word	0x2402a2e4
 8017770:	0802d28c 	.word	0x0802d28c
 8017774:	0802d298 	.word	0x0802d298
 8017778:	0802d2c0 	.word	0x0802d2c0

0801777c <lwip_sock_make_addr>:

/* Convert a netbuf's address data to struct sockaddr */
static int
lwip_sock_make_addr(struct netconn *conn, ip_addr_t *fromaddr, u16_t port,
                    struct sockaddr *from, socklen_t *fromlen)
{
 801777c:	b590      	push	{r4, r7, lr}
 801777e:	b08b      	sub	sp, #44	@ 0x2c
 8017780:	af00      	add	r7, sp, #0
 8017782:	60f8      	str	r0, [r7, #12]
 8017784:	60b9      	str	r1, [r7, #8]
 8017786:	603b      	str	r3, [r7, #0]
 8017788:	4613      	mov	r3, r2
 801778a:	80fb      	strh	r3, [r7, #6]
  int truncated = 0;
 801778c:	2300      	movs	r3, #0
 801778e:	627b      	str	r3, [r7, #36]	@ 0x24
  union sockaddr_aligned saddr;

  LWIP_UNUSED_ARG(conn);

  LWIP_ASSERT("fromaddr != NULL", fromaddr != NULL);
 8017790:	68bb      	ldr	r3, [r7, #8]
 8017792:	2b00      	cmp	r3, #0
 8017794:	d106      	bne.n	80177a4 <lwip_sock_make_addr+0x28>
 8017796:	4b2b      	ldr	r3, [pc, #172]	@ (8017844 <lwip_sock_make_addr+0xc8>)
 8017798:	f240 4207 	movw	r2, #1031	@ 0x407
 801779c:	492a      	ldr	r1, [pc, #168]	@ (8017848 <lwip_sock_make_addr+0xcc>)
 801779e:	482b      	ldr	r0, [pc, #172]	@ (801784c <lwip_sock_make_addr+0xd0>)
 80177a0:	f011 feb4 	bl	802950c <iprintf>
  LWIP_ASSERT("from != NULL", from != NULL);
 80177a4:	683b      	ldr	r3, [r7, #0]
 80177a6:	2b00      	cmp	r3, #0
 80177a8:	d106      	bne.n	80177b8 <lwip_sock_make_addr+0x3c>
 80177aa:	4b26      	ldr	r3, [pc, #152]	@ (8017844 <lwip_sock_make_addr+0xc8>)
 80177ac:	f44f 6281 	mov.w	r2, #1032	@ 0x408
 80177b0:	4927      	ldr	r1, [pc, #156]	@ (8017850 <lwip_sock_make_addr+0xd4>)
 80177b2:	4826      	ldr	r0, [pc, #152]	@ (801784c <lwip_sock_make_addr+0xd0>)
 80177b4:	f011 feaa 	bl	802950c <iprintf>
  LWIP_ASSERT("fromlen != NULL", fromlen != NULL);
 80177b8:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 80177ba:	2b00      	cmp	r3, #0
 80177bc:	d106      	bne.n	80177cc <lwip_sock_make_addr+0x50>
 80177be:	4b21      	ldr	r3, [pc, #132]	@ (8017844 <lwip_sock_make_addr+0xc8>)
 80177c0:	f240 4209 	movw	r2, #1033	@ 0x409
 80177c4:	4923      	ldr	r1, [pc, #140]	@ (8017854 <lwip_sock_make_addr+0xd8>)
 80177c6:	4821      	ldr	r0, [pc, #132]	@ (801784c <lwip_sock_make_addr+0xd0>)
 80177c8:	f011 fea0 	bl	802950c <iprintf>
    ip4_2_ipv4_mapped_ipv6(ip_2_ip6(fromaddr), ip_2_ip4(fromaddr));
    IP_SET_TYPE(fromaddr, IPADDR_TYPE_V6);
  }
#endif /* LWIP_IPV4 && LWIP_IPV6 */

  IPADDR_PORT_TO_SOCKADDR(&saddr, fromaddr, port);
 80177cc:	f107 0314 	add.w	r3, r7, #20
 80177d0:	2210      	movs	r2, #16
 80177d2:	701a      	strb	r2, [r3, #0]
 80177d4:	f107 0314 	add.w	r3, r7, #20
 80177d8:	2202      	movs	r2, #2
 80177da:	705a      	strb	r2, [r3, #1]
 80177dc:	f107 0414 	add.w	r4, r7, #20
 80177e0:	88fb      	ldrh	r3, [r7, #6]
 80177e2:	4618      	mov	r0, r3
 80177e4:	f000 ff38 	bl	8018658 <lwip_htons>
 80177e8:	4603      	mov	r3, r0
 80177ea:	8063      	strh	r3, [r4, #2]
 80177ec:	f107 0314 	add.w	r3, r7, #20
 80177f0:	68ba      	ldr	r2, [r7, #8]
 80177f2:	6812      	ldr	r2, [r2, #0]
 80177f4:	605a      	str	r2, [r3, #4]
 80177f6:	f107 0314 	add.w	r3, r7, #20
 80177fa:	3308      	adds	r3, #8
 80177fc:	2208      	movs	r2, #8
 80177fe:	2100      	movs	r1, #0
 8017800:	4618      	mov	r0, r3
 8017802:	f012 f815 	bl	8029830 <memset>
  if (*fromlen < saddr.sa.sa_len) {
 8017806:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8017808:	681b      	ldr	r3, [r3, #0]
 801780a:	7d3a      	ldrb	r2, [r7, #20]
 801780c:	4293      	cmp	r3, r2
 801780e:	d202      	bcs.n	8017816 <lwip_sock_make_addr+0x9a>
    truncated = 1;
 8017810:	2301      	movs	r3, #1
 8017812:	627b      	str	r3, [r7, #36]	@ 0x24
 8017814:	e008      	b.n	8017828 <lwip_sock_make_addr+0xac>
  } else if (*fromlen > saddr.sa.sa_len) {
 8017816:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8017818:	681b      	ldr	r3, [r3, #0]
 801781a:	7d3a      	ldrb	r2, [r7, #20]
 801781c:	4293      	cmp	r3, r2
 801781e:	d903      	bls.n	8017828 <lwip_sock_make_addr+0xac>
    *fromlen = saddr.sa.sa_len;
 8017820:	7d3b      	ldrb	r3, [r7, #20]
 8017822:	461a      	mov	r2, r3
 8017824:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8017826:	601a      	str	r2, [r3, #0]
  }
  MEMCPY(from, &saddr, *fromlen);
 8017828:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801782a:	681a      	ldr	r2, [r3, #0]
 801782c:	f107 0314 	add.w	r3, r7, #20
 8017830:	4619      	mov	r1, r3
 8017832:	6838      	ldr	r0, [r7, #0]
 8017834:	f012 f8f3 	bl	8029a1e <memcpy>
  return truncated;
 8017838:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
}
 801783a:	4618      	mov	r0, r3
 801783c:	372c      	adds	r7, #44	@ 0x2c
 801783e:	46bd      	mov	sp, r7
 8017840:	bd90      	pop	{r4, r7, pc}
 8017842:	bf00      	nop
 8017844:	0802d160 	.word	0x0802d160
 8017848:	0802d2d0 	.word	0x0802d2d0
 801784c:	0802d1b4 	.word	0x0802d1b4
 8017850:	0802d2e4 	.word	0x0802d2e4
 8017854:	0802d2f4 	.word	0x0802d2f4

08017858 <lwip_recv_tcp_from>:

#if LWIP_TCP
/* Helper function to get a tcp socket's remote address info */
static int
lwip_recv_tcp_from(struct lwip_sock *sock, struct sockaddr *from, socklen_t *fromlen, const char *dbg_fn, int dbg_s, ssize_t dbg_ret)
{
 8017858:	b580      	push	{r7, lr}
 801785a:	b088      	sub	sp, #32
 801785c:	af02      	add	r7, sp, #8
 801785e:	60f8      	str	r0, [r7, #12]
 8017860:	60b9      	str	r1, [r7, #8]
 8017862:	607a      	str	r2, [r7, #4]
 8017864:	603b      	str	r3, [r7, #0]
  if (sock == NULL) {
 8017866:	68fb      	ldr	r3, [r7, #12]
 8017868:	2b00      	cmp	r3, #0
 801786a:	d101      	bne.n	8017870 <lwip_recv_tcp_from+0x18>
    return 0;
 801786c:	2300      	movs	r3, #0
 801786e:	e021      	b.n	80178b4 <lwip_recv_tcp_from+0x5c>
  LWIP_UNUSED_ARG(dbg_fn);
  LWIP_UNUSED_ARG(dbg_s);
  LWIP_UNUSED_ARG(dbg_ret);

#if !SOCKETS_DEBUG
  if (from && fromlen)
 8017870:	68bb      	ldr	r3, [r7, #8]
 8017872:	2b00      	cmp	r3, #0
 8017874:	d01d      	beq.n	80178b2 <lwip_recv_tcp_from+0x5a>
 8017876:	687b      	ldr	r3, [r7, #4]
 8017878:	2b00      	cmp	r3, #0
 801787a:	d01a      	beq.n	80178b2 <lwip_recv_tcp_from+0x5a>
#endif /* !SOCKETS_DEBUG */
  {
    /* get remote addr/port from tcp_pcb */
    u16_t port;
    ip_addr_t tmpaddr;
    netconn_getaddr(sock->conn, &tmpaddr, &port, 0);
 801787c:	68fb      	ldr	r3, [r7, #12]
 801787e:	6818      	ldr	r0, [r3, #0]
 8017880:	f107 0216 	add.w	r2, r7, #22
 8017884:	f107 0110 	add.w	r1, r7, #16
 8017888:	2300      	movs	r3, #0
 801788a:	f7fd fad7 	bl	8014e3c <netconn_getaddr>
    LWIP_DEBUGF(SOCKETS_DEBUG, ("%s(%d):  addr=", dbg_fn, dbg_s));
    ip_addr_debug_print_val(SOCKETS_DEBUG, tmpaddr);
    LWIP_DEBUGF(SOCKETS_DEBUG, (" port=%"U16_F" len=%d\n", port, (int)dbg_ret));
    if (from && fromlen) {
 801788e:	68bb      	ldr	r3, [r7, #8]
 8017890:	2b00      	cmp	r3, #0
 8017892:	d00e      	beq.n	80178b2 <lwip_recv_tcp_from+0x5a>
 8017894:	687b      	ldr	r3, [r7, #4]
 8017896:	2b00      	cmp	r3, #0
 8017898:	d00b      	beq.n	80178b2 <lwip_recv_tcp_from+0x5a>
      return lwip_sock_make_addr(sock->conn, &tmpaddr, port, from, fromlen);
 801789a:	68fb      	ldr	r3, [r7, #12]
 801789c:	6818      	ldr	r0, [r3, #0]
 801789e:	8afa      	ldrh	r2, [r7, #22]
 80178a0:	f107 0110 	add.w	r1, r7, #16
 80178a4:	687b      	ldr	r3, [r7, #4]
 80178a6:	9300      	str	r3, [sp, #0]
 80178a8:	68bb      	ldr	r3, [r7, #8]
 80178aa:	f7ff ff67 	bl	801777c <lwip_sock_make_addr>
 80178ae:	4603      	mov	r3, r0
 80178b0:	e000      	b.n	80178b4 <lwip_recv_tcp_from+0x5c>
    }
  }
  return 0;
 80178b2:	2300      	movs	r3, #0
}
 80178b4:	4618      	mov	r0, r3
 80178b6:	3718      	adds	r7, #24
 80178b8:	46bd      	mov	sp, r7
 80178ba:	bd80      	pop	{r7, pc}

080178bc <lwip_recvfrom_udp_raw>:
/* Helper function to receive a netbuf from a udp or raw netconn.
 * Keeps sock->lastdata for peeking.
 */
static err_t
lwip_recvfrom_udp_raw(struct lwip_sock *sock, int flags, struct msghdr *msg, u16_t *datagram_len, int dbg_s)
{
 80178bc:	b590      	push	{r4, r7, lr}
 80178be:	b08d      	sub	sp, #52	@ 0x34
 80178c0:	af02      	add	r7, sp, #8
 80178c2:	60f8      	str	r0, [r7, #12]
 80178c4:	60b9      	str	r1, [r7, #8]
 80178c6:	607a      	str	r2, [r7, #4]
 80178c8:	603b      	str	r3, [r7, #0]
  err_t err;
  u16_t buflen, copylen, copied;
  int i;

  LWIP_UNUSED_ARG(dbg_s);
  LWIP_ERROR("lwip_recvfrom_udp_raw: invalid arguments", (msg->msg_iov != NULL) || (msg->msg_iovlen <= 0), return ERR_ARG;);
 80178ca:	687b      	ldr	r3, [r7, #4]
 80178cc:	689b      	ldr	r3, [r3, #8]
 80178ce:	2b00      	cmp	r3, #0
 80178d0:	d10d      	bne.n	80178ee <lwip_recvfrom_udp_raw+0x32>
 80178d2:	687b      	ldr	r3, [r7, #4]
 80178d4:	68db      	ldr	r3, [r3, #12]
 80178d6:	2b00      	cmp	r3, #0
 80178d8:	dd09      	ble.n	80178ee <lwip_recvfrom_udp_raw+0x32>
 80178da:	4b5e      	ldr	r3, [pc, #376]	@ (8017a54 <lwip_recvfrom_udp_raw+0x198>)
 80178dc:	f240 4249 	movw	r2, #1097	@ 0x449
 80178e0:	495d      	ldr	r1, [pc, #372]	@ (8017a58 <lwip_recvfrom_udp_raw+0x19c>)
 80178e2:	485e      	ldr	r0, [pc, #376]	@ (8017a5c <lwip_recvfrom_udp_raw+0x1a0>)
 80178e4:	f011 fe12 	bl	802950c <iprintf>
 80178e8:	f06f 030f 	mvn.w	r3, #15
 80178ec:	e0ae      	b.n	8017a4c <lwip_recvfrom_udp_raw+0x190>

  if (flags & MSG_DONTWAIT) {
 80178ee:	68bb      	ldr	r3, [r7, #8]
 80178f0:	f003 0308 	and.w	r3, r3, #8
 80178f4:	2b00      	cmp	r3, #0
 80178f6:	d003      	beq.n	8017900 <lwip_recvfrom_udp_raw+0x44>
    apiflags = NETCONN_DONTBLOCK;
 80178f8:	2304      	movs	r3, #4
 80178fa:	f887 3026 	strb.w	r3, [r7, #38]	@ 0x26
 80178fe:	e002      	b.n	8017906 <lwip_recvfrom_udp_raw+0x4a>
  } else {
    apiflags = 0;
 8017900:	2300      	movs	r3, #0
 8017902:	f887 3026 	strb.w	r3, [r7, #38]	@ 0x26
  }

  LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recvfrom_udp_raw[UDP/RAW]: top sock->lastdata=%p\n", (void *)sock->lastdata.netbuf));
  /* Check if there is data left from the last recv operation. */
  buf = sock->lastdata.netbuf;
 8017906:	68fb      	ldr	r3, [r7, #12]
 8017908:	685b      	ldr	r3, [r3, #4]
 801790a:	613b      	str	r3, [r7, #16]
  if (buf == NULL) {
 801790c:	693b      	ldr	r3, [r7, #16]
 801790e:	2b00      	cmp	r3, #0
 8017910:	d11f      	bne.n	8017952 <lwip_recvfrom_udp_raw+0x96>
    /* No data was left from the previous operation, so we try to get
        some from the network. */
    err = netconn_recv_udp_raw_netbuf_flags(sock->conn, &buf, apiflags);
 8017912:	68fb      	ldr	r3, [r7, #12]
 8017914:	681b      	ldr	r3, [r3, #0]
 8017916:	f897 2026 	ldrb.w	r2, [r7, #38]	@ 0x26
 801791a:	f107 0110 	add.w	r1, r7, #16
 801791e:	4618      	mov	r0, r3
 8017920:	f7fd fd34 	bl	801538c <netconn_recv_udp_raw_netbuf_flags>
 8017924:	4603      	mov	r3, r0
 8017926:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
    LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recvfrom_udp_raw[UDP/RAW]: netconn_recv err=%d, netbuf=%p\n",
                                err, (void *)buf));

    if (err != ERR_OK) {
 801792a:	f997 3027 	ldrsb.w	r3, [r7, #39]	@ 0x27
 801792e:	2b00      	cmp	r3, #0
 8017930:	d002      	beq.n	8017938 <lwip_recvfrom_udp_raw+0x7c>
      return err;
 8017932:	f997 3027 	ldrsb.w	r3, [r7, #39]	@ 0x27
 8017936:	e089      	b.n	8017a4c <lwip_recvfrom_udp_raw+0x190>
    }
    LWIP_ASSERT("buf != NULL", buf != NULL);
 8017938:	693b      	ldr	r3, [r7, #16]
 801793a:	2b00      	cmp	r3, #0
 801793c:	d106      	bne.n	801794c <lwip_recvfrom_udp_raw+0x90>
 801793e:	4b45      	ldr	r3, [pc, #276]	@ (8017a54 <lwip_recvfrom_udp_raw+0x198>)
 8017940:	f240 425e 	movw	r2, #1118	@ 0x45e
 8017944:	4946      	ldr	r1, [pc, #280]	@ (8017a60 <lwip_recvfrom_udp_raw+0x1a4>)
 8017946:	4845      	ldr	r0, [pc, #276]	@ (8017a5c <lwip_recvfrom_udp_raw+0x1a0>)
 8017948:	f011 fde0 	bl	802950c <iprintf>
    sock->lastdata.netbuf = buf;
 801794c:	693a      	ldr	r2, [r7, #16]
 801794e:	68fb      	ldr	r3, [r7, #12]
 8017950:	605a      	str	r2, [r3, #4]
  }
  buflen = buf->p->tot_len;
 8017952:	693b      	ldr	r3, [r7, #16]
 8017954:	681b      	ldr	r3, [r3, #0]
 8017956:	891b      	ldrh	r3, [r3, #8]
 8017958:	837b      	strh	r3, [r7, #26]
  LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recvfrom_udp_raw: buflen=%"U16_F"\n", buflen));

  copied = 0;
 801795a:	2300      	movs	r3, #0
 801795c:	847b      	strh	r3, [r7, #34]	@ 0x22
  /* copy the pbuf payload into the iovs */
  for (i = 0; (i < msg->msg_iovlen) && (copied < buflen); i++) {
 801795e:	2300      	movs	r3, #0
 8017960:	61fb      	str	r3, [r7, #28]
 8017962:	e029      	b.n	80179b8 <lwip_recvfrom_udp_raw+0xfc>
    u16_t len_left = (u16_t)(buflen - copied);
 8017964:	8b7a      	ldrh	r2, [r7, #26]
 8017966:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 8017968:	1ad3      	subs	r3, r2, r3
 801796a:	833b      	strh	r3, [r7, #24]
    if (msg->msg_iov[i].iov_len > len_left) {
 801796c:	687b      	ldr	r3, [r7, #4]
 801796e:	689a      	ldr	r2, [r3, #8]
 8017970:	69fb      	ldr	r3, [r7, #28]
 8017972:	00db      	lsls	r3, r3, #3
 8017974:	4413      	add	r3, r2
 8017976:	685a      	ldr	r2, [r3, #4]
 8017978:	8b3b      	ldrh	r3, [r7, #24]
 801797a:	429a      	cmp	r2, r3
 801797c:	d902      	bls.n	8017984 <lwip_recvfrom_udp_raw+0xc8>
      copylen = len_left;
 801797e:	8b3b      	ldrh	r3, [r7, #24]
 8017980:	84bb      	strh	r3, [r7, #36]	@ 0x24
 8017982:	e006      	b.n	8017992 <lwip_recvfrom_udp_raw+0xd6>
    } else {
      copylen = (u16_t)msg->msg_iov[i].iov_len;
 8017984:	687b      	ldr	r3, [r7, #4]
 8017986:	689a      	ldr	r2, [r3, #8]
 8017988:	69fb      	ldr	r3, [r7, #28]
 801798a:	00db      	lsls	r3, r3, #3
 801798c:	4413      	add	r3, r2
 801798e:	685b      	ldr	r3, [r3, #4]
 8017990:	84bb      	strh	r3, [r7, #36]	@ 0x24
    }

    /* copy the contents of the received buffer into
        the supplied memory buffer */
    pbuf_copy_partial(buf->p, (u8_t *)msg->msg_iov[i].iov_base, copylen, copied);
 8017992:	693b      	ldr	r3, [r7, #16]
 8017994:	6818      	ldr	r0, [r3, #0]
 8017996:	687b      	ldr	r3, [r7, #4]
 8017998:	689a      	ldr	r2, [r3, #8]
 801799a:	69fb      	ldr	r3, [r7, #28]
 801799c:	00db      	lsls	r3, r3, #3
 801799e:	4413      	add	r3, r2
 80179a0:	6819      	ldr	r1, [r3, #0]
 80179a2:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 80179a4:	8cba      	ldrh	r2, [r7, #36]	@ 0x24
 80179a6:	f002 fd3f 	bl	801a428 <pbuf_copy_partial>
    copied = (u16_t)(copied + copylen);
 80179aa:	8c7a      	ldrh	r2, [r7, #34]	@ 0x22
 80179ac:	8cbb      	ldrh	r3, [r7, #36]	@ 0x24
 80179ae:	4413      	add	r3, r2
 80179b0:	847b      	strh	r3, [r7, #34]	@ 0x22
  for (i = 0; (i < msg->msg_iovlen) && (copied < buflen); i++) {
 80179b2:	69fb      	ldr	r3, [r7, #28]
 80179b4:	3301      	adds	r3, #1
 80179b6:	61fb      	str	r3, [r7, #28]
 80179b8:	687b      	ldr	r3, [r7, #4]
 80179ba:	68db      	ldr	r3, [r3, #12]
 80179bc:	69fa      	ldr	r2, [r7, #28]
 80179be:	429a      	cmp	r2, r3
 80179c0:	da03      	bge.n	80179ca <lwip_recvfrom_udp_raw+0x10e>
 80179c2:	8c7a      	ldrh	r2, [r7, #34]	@ 0x22
 80179c4:	8b7b      	ldrh	r3, [r7, #26]
 80179c6:	429a      	cmp	r2, r3
 80179c8:	d3cc      	bcc.n	8017964 <lwip_recvfrom_udp_raw+0xa8>
  }

  /* Check to see from where the data was.*/
#if !SOCKETS_DEBUG
  if (msg->msg_name && msg->msg_namelen)
 80179ca:	687b      	ldr	r3, [r7, #4]
 80179cc:	681b      	ldr	r3, [r3, #0]
 80179ce:	2b00      	cmp	r3, #0
 80179d0:	d01a      	beq.n	8017a08 <lwip_recvfrom_udp_raw+0x14c>
 80179d2:	687b      	ldr	r3, [r7, #4]
 80179d4:	685b      	ldr	r3, [r3, #4]
 80179d6:	2b00      	cmp	r3, #0
 80179d8:	d016      	beq.n	8017a08 <lwip_recvfrom_udp_raw+0x14c>
#endif /* !SOCKETS_DEBUG */
  {
    LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recvfrom_udp_raw(%d):  addr=", dbg_s));
    ip_addr_debug_print_val(SOCKETS_DEBUG, *netbuf_fromaddr(buf));
    LWIP_DEBUGF(SOCKETS_DEBUG, (" port=%"U16_F" len=%d\n", netbuf_fromport(buf), copied));
    if (msg->msg_name && msg->msg_namelen) {
 80179da:	687b      	ldr	r3, [r7, #4]
 80179dc:	681b      	ldr	r3, [r3, #0]
 80179de:	2b00      	cmp	r3, #0
 80179e0:	d012      	beq.n	8017a08 <lwip_recvfrom_udp_raw+0x14c>
 80179e2:	687b      	ldr	r3, [r7, #4]
 80179e4:	685b      	ldr	r3, [r3, #4]
 80179e6:	2b00      	cmp	r3, #0
 80179e8:	d00e      	beq.n	8017a08 <lwip_recvfrom_udp_raw+0x14c>
      lwip_sock_make_addr(sock->conn, netbuf_fromaddr(buf), netbuf_fromport(buf),
 80179ea:	68fb      	ldr	r3, [r7, #12]
 80179ec:	6818      	ldr	r0, [r3, #0]
 80179ee:	693b      	ldr	r3, [r7, #16]
 80179f0:	f103 0108 	add.w	r1, r3, #8
 80179f4:	693b      	ldr	r3, [r7, #16]
 80179f6:	899a      	ldrh	r2, [r3, #12]
                          (struct sockaddr *)msg->msg_name, &msg->msg_namelen);
 80179f8:	687b      	ldr	r3, [r7, #4]
 80179fa:	681c      	ldr	r4, [r3, #0]
      lwip_sock_make_addr(sock->conn, netbuf_fromaddr(buf), netbuf_fromport(buf),
 80179fc:	687b      	ldr	r3, [r7, #4]
 80179fe:	3304      	adds	r3, #4
 8017a00:	9300      	str	r3, [sp, #0]
 8017a02:	4623      	mov	r3, r4
 8017a04:	f7ff feba 	bl	801777c <lwip_sock_make_addr>
    }
  }

  /* Initialize flag output */
  msg->msg_flags = 0;
 8017a08:	687b      	ldr	r3, [r7, #4]
 8017a0a:	2200      	movs	r2, #0
 8017a0c:	619a      	str	r2, [r3, #24]

  if (msg->msg_control) {
 8017a0e:	687b      	ldr	r3, [r7, #4]
 8017a10:	691b      	ldr	r3, [r3, #16]
 8017a12:	2b00      	cmp	r3, #0
 8017a14:	d007      	beq.n	8017a26 <lwip_recvfrom_udp_raw+0x16a>
    u8_t wrote_msg = 0;
 8017a16:	2300      	movs	r3, #0
 8017a18:	75fb      	strb	r3, [r7, #23]
#endif /* LWIP_IPV4 */
      }
    }
#endif /* LWIP_NETBUF_RECVINFO */

    if (!wrote_msg) {
 8017a1a:	7dfb      	ldrb	r3, [r7, #23]
 8017a1c:	2b00      	cmp	r3, #0
 8017a1e:	d102      	bne.n	8017a26 <lwip_recvfrom_udp_raw+0x16a>
      msg->msg_controllen = 0;
 8017a20:	687b      	ldr	r3, [r7, #4]
 8017a22:	2200      	movs	r2, #0
 8017a24:	615a      	str	r2, [r3, #20]
    }
  }

  /* If we don't peek the incoming message: zero lastdata pointer and free the netbuf */
  if ((flags & MSG_PEEK) == 0) {
 8017a26:	68bb      	ldr	r3, [r7, #8]
 8017a28:	f003 0301 	and.w	r3, r3, #1
 8017a2c:	2b00      	cmp	r3, #0
 8017a2e:	d106      	bne.n	8017a3e <lwip_recvfrom_udp_raw+0x182>
    sock->lastdata.netbuf = NULL;
 8017a30:	68fb      	ldr	r3, [r7, #12]
 8017a32:	2200      	movs	r2, #0
 8017a34:	605a      	str	r2, [r3, #4]
    netbuf_delete(buf);
 8017a36:	693b      	ldr	r3, [r7, #16]
 8017a38:	4618      	mov	r0, r3
 8017a3a:	f7ff fb05 	bl	8017048 <netbuf_delete>
  }
  if (datagram_len) {
 8017a3e:	683b      	ldr	r3, [r7, #0]
 8017a40:	2b00      	cmp	r3, #0
 8017a42:	d002      	beq.n	8017a4a <lwip_recvfrom_udp_raw+0x18e>
    *datagram_len = buflen;
 8017a44:	683b      	ldr	r3, [r7, #0]
 8017a46:	8b7a      	ldrh	r2, [r7, #26]
 8017a48:	801a      	strh	r2, [r3, #0]
  }
  return ERR_OK;
 8017a4a:	2300      	movs	r3, #0
}
 8017a4c:	4618      	mov	r0, r3
 8017a4e:	372c      	adds	r7, #44	@ 0x2c
 8017a50:	46bd      	mov	sp, r7
 8017a52:	bd90      	pop	{r4, r7, pc}
 8017a54:	0802d160 	.word	0x0802d160
 8017a58:	0802d304 	.word	0x0802d304
 8017a5c:	0802d1b4 	.word	0x0802d1b4
 8017a60:	0802d330 	.word	0x0802d330

08017a64 <lwip_recvfrom>:

ssize_t
lwip_recvfrom(int s, void *mem, size_t len, int flags,
              struct sockaddr *from, socklen_t *fromlen)
{
 8017a64:	b580      	push	{r7, lr}
 8017a66:	b096      	sub	sp, #88	@ 0x58
 8017a68:	af02      	add	r7, sp, #8
 8017a6a:	60f8      	str	r0, [r7, #12]
 8017a6c:	60b9      	str	r1, [r7, #8]
 8017a6e:	607a      	str	r2, [r7, #4]
 8017a70:	603b      	str	r3, [r7, #0]
  struct lwip_sock *sock;
  ssize_t ret;

  LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recvfrom(%d, %p, %"SZT_F", 0x%x, ..)\n", s, mem, len, flags));
  sock = get_socket(s);
 8017a72:	68f8      	ldr	r0, [r7, #12]
 8017a74:	f7ff fbb8 	bl	80171e8 <get_socket>
 8017a78:	64f8      	str	r0, [r7, #76]	@ 0x4c
  if (!sock) {
 8017a7a:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 8017a7c:	2b00      	cmp	r3, #0
 8017a7e:	d102      	bne.n	8017a86 <lwip_recvfrom+0x22>
    return -1;
 8017a80:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8017a84:	e078      	b.n	8017b78 <lwip_recvfrom+0x114>
  }
#if LWIP_TCP
  if (NETCONNTYPE_GROUP(netconn_type(sock->conn)) == NETCONN_TCP) {
 8017a86:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 8017a88:	681b      	ldr	r3, [r3, #0]
 8017a8a:	781b      	ldrb	r3, [r3, #0]
 8017a8c:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8017a90:	2b10      	cmp	r3, #16
 8017a92:	d112      	bne.n	8017aba <lwip_recvfrom+0x56>
    ret = lwip_recv_tcp(sock, mem, len, flags);
 8017a94:	683b      	ldr	r3, [r7, #0]
 8017a96:	687a      	ldr	r2, [r7, #4]
 8017a98:	68b9      	ldr	r1, [r7, #8]
 8017a9a:	6cf8      	ldr	r0, [r7, #76]	@ 0x4c
 8017a9c:	f7ff fd5e 	bl	801755c <lwip_recv_tcp>
 8017aa0:	6478      	str	r0, [r7, #68]	@ 0x44
    lwip_recv_tcp_from(sock, from, fromlen, "lwip_recvfrom", s, ret);
 8017aa2:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 8017aa4:	9301      	str	r3, [sp, #4]
 8017aa6:	68fb      	ldr	r3, [r7, #12]
 8017aa8:	9300      	str	r3, [sp, #0]
 8017aaa:	4b35      	ldr	r3, [pc, #212]	@ (8017b80 <lwip_recvfrom+0x11c>)
 8017aac:	6dfa      	ldr	r2, [r7, #92]	@ 0x5c
 8017aae:	6db9      	ldr	r1, [r7, #88]	@ 0x58
 8017ab0:	6cf8      	ldr	r0, [r7, #76]	@ 0x4c
 8017ab2:	f7ff fed1 	bl	8017858 <lwip_recv_tcp_from>
    done_socket(sock);
    return ret;
 8017ab6:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 8017ab8:	e05e      	b.n	8017b78 <lwip_recvfrom+0x114>
  } else
#endif
  {
    u16_t datagram_len = 0;
 8017aba:	2300      	movs	r3, #0
 8017abc:	877b      	strh	r3, [r7, #58]	@ 0x3a
    struct iovec vec;
    struct msghdr msg;
    err_t err;
    vec.iov_base = mem;
 8017abe:	68bb      	ldr	r3, [r7, #8]
 8017ac0:	633b      	str	r3, [r7, #48]	@ 0x30
    vec.iov_len = len;
 8017ac2:	687b      	ldr	r3, [r7, #4]
 8017ac4:	637b      	str	r3, [r7, #52]	@ 0x34
    msg.msg_control = NULL;
 8017ac6:	2300      	movs	r3, #0
 8017ac8:	627b      	str	r3, [r7, #36]	@ 0x24
    msg.msg_controllen = 0;
 8017aca:	2300      	movs	r3, #0
 8017acc:	62bb      	str	r3, [r7, #40]	@ 0x28
    msg.msg_flags = 0;
 8017ace:	2300      	movs	r3, #0
 8017ad0:	62fb      	str	r3, [r7, #44]	@ 0x2c
    msg.msg_iov = &vec;
 8017ad2:	f107 0330 	add.w	r3, r7, #48	@ 0x30
 8017ad6:	61fb      	str	r3, [r7, #28]
    msg.msg_iovlen = 1;
 8017ad8:	2301      	movs	r3, #1
 8017ada:	623b      	str	r3, [r7, #32]
    msg.msg_name = from;
 8017adc:	6dbb      	ldr	r3, [r7, #88]	@ 0x58
 8017ade:	617b      	str	r3, [r7, #20]
    msg.msg_namelen = (fromlen ? *fromlen : 0);
 8017ae0:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 8017ae2:	2b00      	cmp	r3, #0
 8017ae4:	d002      	beq.n	8017aec <lwip_recvfrom+0x88>
 8017ae6:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 8017ae8:	681b      	ldr	r3, [r3, #0]
 8017aea:	e000      	b.n	8017aee <lwip_recvfrom+0x8a>
 8017aec:	2300      	movs	r3, #0
 8017aee:	61bb      	str	r3, [r7, #24]
    err = lwip_recvfrom_udp_raw(sock, flags, &msg, &datagram_len, s);
 8017af0:	f107 013a 	add.w	r1, r7, #58	@ 0x3a
 8017af4:	f107 0214 	add.w	r2, r7, #20
 8017af8:	68fb      	ldr	r3, [r7, #12]
 8017afa:	9300      	str	r3, [sp, #0]
 8017afc:	460b      	mov	r3, r1
 8017afe:	6839      	ldr	r1, [r7, #0]
 8017b00:	6cf8      	ldr	r0, [r7, #76]	@ 0x4c
 8017b02:	f7ff fedb 	bl	80178bc <lwip_recvfrom_udp_raw>
 8017b06:	4603      	mov	r3, r0
 8017b08:	f887 304b 	strb.w	r3, [r7, #75]	@ 0x4b
    if (err != ERR_OK) {
 8017b0c:	f997 304b 	ldrsb.w	r3, [r7, #75]	@ 0x4b
 8017b10:	2b00      	cmp	r3, #0
 8017b12:	d00e      	beq.n	8017b32 <lwip_recvfrom+0xce>
      LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recvfrom[UDP/RAW](%d): buf == NULL, error is \"%s\"!\n",
                                  s, lwip_strerr(err)));
      sock_set_errno(sock, err_to_errno(err));
 8017b14:	f997 304b 	ldrsb.w	r3, [r7, #75]	@ 0x4b
 8017b18:	4618      	mov	r0, r3
 8017b1a:	f7ff fa77 	bl	801700c <err_to_errno>
 8017b1e:	63f8      	str	r0, [r7, #60]	@ 0x3c
 8017b20:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 8017b22:	2b00      	cmp	r3, #0
 8017b24:	d002      	beq.n	8017b2c <lwip_recvfrom+0xc8>
 8017b26:	4a17      	ldr	r2, [pc, #92]	@ (8017b84 <lwip_recvfrom+0x120>)
 8017b28:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 8017b2a:	6013      	str	r3, [r2, #0]
      done_socket(sock);
      return -1;
 8017b2c:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8017b30:	e022      	b.n	8017b78 <lwip_recvfrom+0x114>
    }
    ret = (ssize_t)LWIP_MIN(LWIP_MIN(len, datagram_len), SSIZE_MAX);
 8017b32:	8f7b      	ldrh	r3, [r7, #58]	@ 0x3a
 8017b34:	461a      	mov	r2, r3
 8017b36:	687b      	ldr	r3, [r7, #4]
 8017b38:	4293      	cmp	r3, r2
 8017b3a:	bf28      	it	cs
 8017b3c:	4613      	movcs	r3, r2
 8017b3e:	f06f 4200 	mvn.w	r2, #2147483648	@ 0x80000000
 8017b42:	4293      	cmp	r3, r2
 8017b44:	d206      	bcs.n	8017b54 <lwip_recvfrom+0xf0>
 8017b46:	8f7b      	ldrh	r3, [r7, #58]	@ 0x3a
 8017b48:	461a      	mov	r2, r3
 8017b4a:	687b      	ldr	r3, [r7, #4]
 8017b4c:	4293      	cmp	r3, r2
 8017b4e:	bf28      	it	cs
 8017b50:	4613      	movcs	r3, r2
 8017b52:	e001      	b.n	8017b58 <lwip_recvfrom+0xf4>
 8017b54:	f06f 4300 	mvn.w	r3, #2147483648	@ 0x80000000
 8017b58:	647b      	str	r3, [r7, #68]	@ 0x44
    if (fromlen) {
 8017b5a:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 8017b5c:	2b00      	cmp	r3, #0
 8017b5e:	d002      	beq.n	8017b66 <lwip_recvfrom+0x102>
      *fromlen = msg.msg_namelen;
 8017b60:	69ba      	ldr	r2, [r7, #24]
 8017b62:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 8017b64:	601a      	str	r2, [r3, #0]
    }
  }

  sock_set_errno(sock, 0);
 8017b66:	2300      	movs	r3, #0
 8017b68:	643b      	str	r3, [r7, #64]	@ 0x40
 8017b6a:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8017b6c:	2b00      	cmp	r3, #0
 8017b6e:	d002      	beq.n	8017b76 <lwip_recvfrom+0x112>
 8017b70:	4a04      	ldr	r2, [pc, #16]	@ (8017b84 <lwip_recvfrom+0x120>)
 8017b72:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8017b74:	6013      	str	r3, [r2, #0]
  done_socket(sock);
  return ret;
 8017b76:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
}
 8017b78:	4618      	mov	r0, r3
 8017b7a:	3750      	adds	r7, #80	@ 0x50
 8017b7c:	46bd      	mov	sp, r7
 8017b7e:	bd80      	pop	{r7, pc}
 8017b80:	0802d33c 	.word	0x0802d33c
 8017b84:	2402a2e4 	.word	0x2402a2e4

08017b88 <lwip_recv>:
  return lwip_recvmsg(s, &msg, 0);
}

ssize_t
lwip_recv(int s, void *mem, size_t len, int flags)
{
 8017b88:	b580      	push	{r7, lr}
 8017b8a:	b086      	sub	sp, #24
 8017b8c:	af02      	add	r7, sp, #8
 8017b8e:	60f8      	str	r0, [r7, #12]
 8017b90:	60b9      	str	r1, [r7, #8]
 8017b92:	607a      	str	r2, [r7, #4]
 8017b94:	603b      	str	r3, [r7, #0]
  return lwip_recvfrom(s, mem, len, flags, NULL, NULL);
 8017b96:	2300      	movs	r3, #0
 8017b98:	9301      	str	r3, [sp, #4]
 8017b9a:	2300      	movs	r3, #0
 8017b9c:	9300      	str	r3, [sp, #0]
 8017b9e:	683b      	ldr	r3, [r7, #0]
 8017ba0:	687a      	ldr	r2, [r7, #4]
 8017ba2:	68b9      	ldr	r1, [r7, #8]
 8017ba4:	68f8      	ldr	r0, [r7, #12]
 8017ba6:	f7ff ff5d 	bl	8017a64 <lwip_recvfrom>
 8017baa:	4603      	mov	r3, r0
}
 8017bac:	4618      	mov	r0, r3
 8017bae:	3710      	adds	r7, #16
 8017bb0:	46bd      	mov	sp, r7
 8017bb2:	bd80      	pop	{r7, pc}

08017bb4 <lwip_send>:
#endif /* LWIP_UDP || LWIP_RAW */
}

ssize_t
lwip_send(int s, const void *data, size_t size, int flags)
{
 8017bb4:	b580      	push	{r7, lr}
 8017bb6:	b08a      	sub	sp, #40	@ 0x28
 8017bb8:	af02      	add	r7, sp, #8
 8017bba:	60f8      	str	r0, [r7, #12]
 8017bbc:	60b9      	str	r1, [r7, #8]
 8017bbe:	607a      	str	r2, [r7, #4]
 8017bc0:	603b      	str	r3, [r7, #0]
  size_t written;

  LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_send(%d, data=%p, size=%"SZT_F", flags=0x%x)\n",
                              s, data, size, flags));

  sock = get_socket(s);
 8017bc2:	68f8      	ldr	r0, [r7, #12]
 8017bc4:	f7ff fb10 	bl	80171e8 <get_socket>
 8017bc8:	61f8      	str	r0, [r7, #28]
  if (!sock) {
 8017bca:	69fb      	ldr	r3, [r7, #28]
 8017bcc:	2b00      	cmp	r3, #0
 8017bce:	d102      	bne.n	8017bd6 <lwip_send+0x22>
    return -1;
 8017bd0:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8017bd4:	e046      	b.n	8017c64 <lwip_send+0xb0>
  }

  if (NETCONNTYPE_GROUP(netconn_type(sock->conn)) != NETCONN_TCP) {
 8017bd6:	69fb      	ldr	r3, [r7, #28]
 8017bd8:	681b      	ldr	r3, [r3, #0]
 8017bda:	781b      	ldrb	r3, [r3, #0]
 8017bdc:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8017be0:	2b10      	cmp	r3, #16
 8017be2:	d00b      	beq.n	8017bfc <lwip_send+0x48>
#if (LWIP_UDP || LWIP_RAW)
    done_socket(sock);
    return lwip_sendto(s, data, size, flags, NULL, 0);
 8017be4:	2300      	movs	r3, #0
 8017be6:	9301      	str	r3, [sp, #4]
 8017be8:	2300      	movs	r3, #0
 8017bea:	9300      	str	r3, [sp, #0]
 8017bec:	683b      	ldr	r3, [r7, #0]
 8017bee:	687a      	ldr	r2, [r7, #4]
 8017bf0:	68b9      	ldr	r1, [r7, #8]
 8017bf2:	68f8      	ldr	r0, [r7, #12]
 8017bf4:	f000 f83c 	bl	8017c70 <lwip_sendto>
 8017bf8:	4603      	mov	r3, r0
 8017bfa:	e033      	b.n	8017c64 <lwip_send+0xb0>
    return -1;
#endif /* (LWIP_UDP || LWIP_RAW) */
  }

  write_flags = (u8_t)(NETCONN_COPY |
                       ((flags & MSG_MORE)     ? NETCONN_MORE      : 0) |
 8017bfc:	683b      	ldr	r3, [r7, #0]
 8017bfe:	f003 0310 	and.w	r3, r3, #16
  write_flags = (u8_t)(NETCONN_COPY |
 8017c02:	2b00      	cmp	r3, #0
 8017c04:	d001      	beq.n	8017c0a <lwip_send+0x56>
 8017c06:	2203      	movs	r2, #3
 8017c08:	e000      	b.n	8017c0c <lwip_send+0x58>
 8017c0a:	2201      	movs	r2, #1
                       ((flags & MSG_MORE)     ? NETCONN_MORE      : 0) |
 8017c0c:	683b      	ldr	r3, [r7, #0]
 8017c0e:	105b      	asrs	r3, r3, #1
 8017c10:	b25b      	sxtb	r3, r3
 8017c12:	f003 0304 	and.w	r3, r3, #4
 8017c16:	b25b      	sxtb	r3, r3
 8017c18:	4313      	orrs	r3, r2
 8017c1a:	b25b      	sxtb	r3, r3
  write_flags = (u8_t)(NETCONN_COPY |
 8017c1c:	76fb      	strb	r3, [r7, #27]
                       ((flags & MSG_DONTWAIT) ? NETCONN_DONTBLOCK : 0));
  written = 0;
 8017c1e:	2300      	movs	r3, #0
 8017c20:	613b      	str	r3, [r7, #16]
  err = netconn_write_partly(sock->conn, data, size, write_flags, &written);
 8017c22:	69fb      	ldr	r3, [r7, #28]
 8017c24:	6818      	ldr	r0, [r3, #0]
 8017c26:	7efa      	ldrb	r2, [r7, #27]
 8017c28:	f107 0310 	add.w	r3, r7, #16
 8017c2c:	9300      	str	r3, [sp, #0]
 8017c2e:	4613      	mov	r3, r2
 8017c30:	687a      	ldr	r2, [r7, #4]
 8017c32:	68b9      	ldr	r1, [r7, #8]
 8017c34:	f7fd fc04 	bl	8015440 <netconn_write_partly>
 8017c38:	4603      	mov	r3, r0
 8017c3a:	76bb      	strb	r3, [r7, #26]

  LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_send(%d) err=%d written=%"SZT_F"\n", s, err, written));
  sock_set_errno(sock, err_to_errno(err));
 8017c3c:	f997 301a 	ldrsb.w	r3, [r7, #26]
 8017c40:	4618      	mov	r0, r3
 8017c42:	f7ff f9e3 	bl	801700c <err_to_errno>
 8017c46:	6178      	str	r0, [r7, #20]
 8017c48:	697b      	ldr	r3, [r7, #20]
 8017c4a:	2b00      	cmp	r3, #0
 8017c4c:	d002      	beq.n	8017c54 <lwip_send+0xa0>
 8017c4e:	4a07      	ldr	r2, [pc, #28]	@ (8017c6c <lwip_send+0xb8>)
 8017c50:	697b      	ldr	r3, [r7, #20]
 8017c52:	6013      	str	r3, [r2, #0]
  done_socket(sock);
  /* casting 'written' to ssize_t is OK here since the netconn API limits it to SSIZE_MAX */
  return (err == ERR_OK ? (ssize_t)written : -1);
 8017c54:	f997 301a 	ldrsb.w	r3, [r7, #26]
 8017c58:	2b00      	cmp	r3, #0
 8017c5a:	d101      	bne.n	8017c60 <lwip_send+0xac>
 8017c5c:	693b      	ldr	r3, [r7, #16]
 8017c5e:	e001      	b.n	8017c64 <lwip_send+0xb0>
 8017c60:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
}
 8017c64:	4618      	mov	r0, r3
 8017c66:	3720      	adds	r7, #32
 8017c68:	46bd      	mov	sp, r7
 8017c6a:	bd80      	pop	{r7, pc}
 8017c6c:	2402a2e4 	.word	0x2402a2e4

08017c70 <lwip_sendto>:
}

ssize_t
lwip_sendto(int s, const void *data, size_t size, int flags,
            const struct sockaddr *to, socklen_t tolen)
{
 8017c70:	b580      	push	{r7, lr}
 8017c72:	b08e      	sub	sp, #56	@ 0x38
 8017c74:	af00      	add	r7, sp, #0
 8017c76:	60f8      	str	r0, [r7, #12]
 8017c78:	60b9      	str	r1, [r7, #8]
 8017c7a:	607a      	str	r2, [r7, #4]
 8017c7c:	603b      	str	r3, [r7, #0]
  err_t err;
  u16_t short_size;
  u16_t remote_port;
  struct netbuf buf;

  sock = get_socket(s);
 8017c7e:	68f8      	ldr	r0, [r7, #12]
 8017c80:	f7ff fab2 	bl	80171e8 <get_socket>
 8017c84:	6338      	str	r0, [r7, #48]	@ 0x30
  if (!sock) {
 8017c86:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8017c88:	2b00      	cmp	r3, #0
 8017c8a:	d102      	bne.n	8017c92 <lwip_sendto+0x22>
    return -1;
 8017c8c:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8017c90:	e093      	b.n	8017dba <lwip_sendto+0x14a>
  }

  if (NETCONNTYPE_GROUP(netconn_type(sock->conn)) == NETCONN_TCP) {
 8017c92:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8017c94:	681b      	ldr	r3, [r3, #0]
 8017c96:	781b      	ldrb	r3, [r3, #0]
 8017c98:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8017c9c:	2b10      	cmp	r3, #16
 8017c9e:	d107      	bne.n	8017cb0 <lwip_sendto+0x40>
#if LWIP_TCP
    done_socket(sock);
    return lwip_send(s, data, size, flags);
 8017ca0:	683b      	ldr	r3, [r7, #0]
 8017ca2:	687a      	ldr	r2, [r7, #4]
 8017ca4:	68b9      	ldr	r1, [r7, #8]
 8017ca6:	68f8      	ldr	r0, [r7, #12]
 8017ca8:	f7ff ff84 	bl	8017bb4 <lwip_send>
 8017cac:	4603      	mov	r3, r0
 8017cae:	e084      	b.n	8017dba <lwip_sendto+0x14a>
    done_socket(sock);
    return -1;
#endif /* LWIP_TCP */
  }

  if (size > LWIP_MIN(0xFFFF, SSIZE_MAX)) {
 8017cb0:	687b      	ldr	r3, [r7, #4]
 8017cb2:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 8017cb6:	d30a      	bcc.n	8017cce <lwip_sendto+0x5e>
    /* cannot fit into one datagram (at least for us) */
    sock_set_errno(sock, EMSGSIZE);
 8017cb8:	235a      	movs	r3, #90	@ 0x5a
 8017cba:	623b      	str	r3, [r7, #32]
 8017cbc:	6a3b      	ldr	r3, [r7, #32]
 8017cbe:	2b00      	cmp	r3, #0
 8017cc0:	d002      	beq.n	8017cc8 <lwip_sendto+0x58>
 8017cc2:	4a40      	ldr	r2, [pc, #256]	@ (8017dc4 <lwip_sendto+0x154>)
 8017cc4:	6a3b      	ldr	r3, [r7, #32]
 8017cc6:	6013      	str	r3, [r2, #0]
    done_socket(sock);
    return -1;
 8017cc8:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8017ccc:	e075      	b.n	8017dba <lwip_sendto+0x14a>
  }
  short_size = (u16_t)size;
 8017cce:	687b      	ldr	r3, [r7, #4]
 8017cd0:	85fb      	strh	r3, [r7, #46]	@ 0x2e
  LWIP_ERROR("lwip_sendto: invalid address", (((to == NULL) && (tolen == 0)) ||
 8017cd2:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8017cd4:	2b00      	cmp	r3, #0
 8017cd6:	d102      	bne.n	8017cde <lwip_sendto+0x6e>
 8017cd8:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 8017cda:	2b00      	cmp	r3, #0
 8017cdc:	d023      	beq.n	8017d26 <lwip_sendto+0xb6>
 8017cde:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 8017ce0:	2b10      	cmp	r3, #16
 8017ce2:	d10b      	bne.n	8017cfc <lwip_sendto+0x8c>
 8017ce4:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8017ce6:	2b00      	cmp	r3, #0
 8017ce8:	d008      	beq.n	8017cfc <lwip_sendto+0x8c>
 8017cea:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8017cec:	785b      	ldrb	r3, [r3, #1]
 8017cee:	2b02      	cmp	r3, #2
 8017cf0:	d104      	bne.n	8017cfc <lwip_sendto+0x8c>
 8017cf2:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8017cf4:	f003 0303 	and.w	r3, r3, #3
 8017cf8:	2b00      	cmp	r3, #0
 8017cfa:	d014      	beq.n	8017d26 <lwip_sendto+0xb6>
 8017cfc:	4b32      	ldr	r3, [pc, #200]	@ (8017dc8 <lwip_sendto+0x158>)
 8017cfe:	f240 6252 	movw	r2, #1618	@ 0x652
 8017d02:	4932      	ldr	r1, [pc, #200]	@ (8017dcc <lwip_sendto+0x15c>)
 8017d04:	4832      	ldr	r0, [pc, #200]	@ (8017dd0 <lwip_sendto+0x160>)
 8017d06:	f011 fc01 	bl	802950c <iprintf>
 8017d0a:	f06f 000f 	mvn.w	r0, #15
 8017d0e:	f7ff f97d 	bl	801700c <err_to_errno>
 8017d12:	62b8      	str	r0, [r7, #40]	@ 0x28
 8017d14:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8017d16:	2b00      	cmp	r3, #0
 8017d18:	d002      	beq.n	8017d20 <lwip_sendto+0xb0>
 8017d1a:	4a2a      	ldr	r2, [pc, #168]	@ (8017dc4 <lwip_sendto+0x154>)
 8017d1c:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8017d1e:	6013      	str	r3, [r2, #0]
 8017d20:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8017d24:	e049      	b.n	8017dba <lwip_sendto+0x14a>
              ((to != NULL) && (IS_SOCK_ADDR_TYPE_VALID(to) && IS_SOCK_ADDR_ALIGNED(to))))),
             sock_set_errno(sock, err_to_errno(ERR_ARG)); done_socket(sock); return -1;);
  LWIP_UNUSED_ARG(tolen);

  /* initialize a buffer */
  buf.p = buf.ptr = NULL;
 8017d26:	2300      	movs	r3, #0
 8017d28:	617b      	str	r3, [r7, #20]
 8017d2a:	697b      	ldr	r3, [r7, #20]
 8017d2c:	613b      	str	r3, [r7, #16]
#if LWIP_CHECKSUM_ON_COPY
  buf.flags = 0;
#endif /* LWIP_CHECKSUM_ON_COPY */
  if (to) {
 8017d2e:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8017d30:	2b00      	cmp	r3, #0
 8017d32:	d00a      	beq.n	8017d4a <lwip_sendto+0xda>
    SOCKADDR_TO_IPADDR_PORT(to, &buf.addr, remote_port);
 8017d34:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8017d36:	685b      	ldr	r3, [r3, #4]
 8017d38:	61bb      	str	r3, [r7, #24]
 8017d3a:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8017d3c:	885b      	ldrh	r3, [r3, #2]
 8017d3e:	4618      	mov	r0, r3
 8017d40:	f000 fc8a 	bl	8018658 <lwip_htons>
 8017d44:	4603      	mov	r3, r0
 8017d46:	86fb      	strh	r3, [r7, #54]	@ 0x36
 8017d48:	e003      	b.n	8017d52 <lwip_sendto+0xe2>
  } else {
    remote_port = 0;
 8017d4a:	2300      	movs	r3, #0
 8017d4c:	86fb      	strh	r3, [r7, #54]	@ 0x36
    ip_addr_set_any(NETCONNTYPE_ISIPV6(netconn_type(sock->conn)), &buf.addr);
 8017d4e:	2300      	movs	r3, #0
 8017d50:	61bb      	str	r3, [r7, #24]
  }
  netbuf_fromport(&buf) = remote_port;
 8017d52:	8efb      	ldrh	r3, [r7, #54]	@ 0x36
 8017d54:	83bb      	strh	r3, [r7, #28]
      MEMCPY(buf.p->payload, data, short_size);
    }
    err = ERR_OK;
  }
#else /* LWIP_NETIF_TX_SINGLE_PBUF */
  err = netbuf_ref(&buf, data, short_size);
 8017d56:	8dfa      	ldrh	r2, [r7, #46]	@ 0x2e
 8017d58:	f107 0310 	add.w	r3, r7, #16
 8017d5c:	68b9      	ldr	r1, [r7, #8]
 8017d5e:	4618      	mov	r0, r3
 8017d60:	f7ff f9ba 	bl	80170d8 <netbuf_ref>
 8017d64:	4603      	mov	r3, r0
 8017d66:	f887 302d 	strb.w	r3, [r7, #45]	@ 0x2d
#endif /* LWIP_NETIF_TX_SINGLE_PBUF */
  if (err == ERR_OK) {
 8017d6a:	f997 302d 	ldrsb.w	r3, [r7, #45]	@ 0x2d
 8017d6e:	2b00      	cmp	r3, #0
 8017d70:	d10a      	bne.n	8017d88 <lwip_sendto+0x118>
      IP_SET_TYPE_VAL(buf.addr, IPADDR_TYPE_V4);
    }
#endif /* LWIP_IPV4 && LWIP_IPV6 */

    /* send the data */
    err = netconn_send(sock->conn, &buf);
 8017d72:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8017d74:	681b      	ldr	r3, [r3, #0]
 8017d76:	f107 0210 	add.w	r2, r7, #16
 8017d7a:	4611      	mov	r1, r2
 8017d7c:	4618      	mov	r0, r3
 8017d7e:	f7fd fb31 	bl	80153e4 <netconn_send>
 8017d82:	4603      	mov	r3, r0
 8017d84:	f887 302d 	strb.w	r3, [r7, #45]	@ 0x2d
  }

  /* deallocated the buffer */
  netbuf_free(&buf);
 8017d88:	f107 0310 	add.w	r3, r7, #16
 8017d8c:	4618      	mov	r0, r3
 8017d8e:	f7ff f97b 	bl	8017088 <netbuf_free>

  sock_set_errno(sock, err_to_errno(err));
 8017d92:	f997 302d 	ldrsb.w	r3, [r7, #45]	@ 0x2d
 8017d96:	4618      	mov	r0, r3
 8017d98:	f7ff f938 	bl	801700c <err_to_errno>
 8017d9c:	6278      	str	r0, [r7, #36]	@ 0x24
 8017d9e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8017da0:	2b00      	cmp	r3, #0
 8017da2:	d002      	beq.n	8017daa <lwip_sendto+0x13a>
 8017da4:	4a07      	ldr	r2, [pc, #28]	@ (8017dc4 <lwip_sendto+0x154>)
 8017da6:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8017da8:	6013      	str	r3, [r2, #0]
  done_socket(sock);
  return (err == ERR_OK ? short_size : -1);
 8017daa:	f997 302d 	ldrsb.w	r3, [r7, #45]	@ 0x2d
 8017dae:	2b00      	cmp	r3, #0
 8017db0:	d101      	bne.n	8017db6 <lwip_sendto+0x146>
 8017db2:	8dfb      	ldrh	r3, [r7, #46]	@ 0x2e
 8017db4:	e001      	b.n	8017dba <lwip_sendto+0x14a>
 8017db6:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
}
 8017dba:	4618      	mov	r0, r3
 8017dbc:	3738      	adds	r7, #56	@ 0x38
 8017dbe:	46bd      	mov	sp, r7
 8017dc0:	bd80      	pop	{r7, pc}
 8017dc2:	bf00      	nop
 8017dc4:	2402a2e4 	.word	0x2402a2e4
 8017dc8:	0802d160 	.word	0x0802d160
 8017dcc:	0802d440 	.word	0x0802d440
 8017dd0:	0802d1b4 	.word	0x0802d1b4

08017dd4 <lwip_socket>:

int
lwip_socket(int domain, int type, int protocol)
{
 8017dd4:	b580      	push	{r7, lr}
 8017dd6:	b086      	sub	sp, #24
 8017dd8:	af00      	add	r7, sp, #0
 8017dda:	60f8      	str	r0, [r7, #12]
 8017ddc:	60b9      	str	r1, [r7, #8]
 8017dde:	607a      	str	r2, [r7, #4]
  int i;

  LWIP_UNUSED_ARG(domain); /* @todo: check this */

  /* create a netconn */
  switch (type) {
 8017de0:	68bb      	ldr	r3, [r7, #8]
 8017de2:	2b03      	cmp	r3, #3
 8017de4:	d009      	beq.n	8017dfa <lwip_socket+0x26>
 8017de6:	68bb      	ldr	r3, [r7, #8]
 8017de8:	2b03      	cmp	r3, #3
 8017dea:	dc23      	bgt.n	8017e34 <lwip_socket+0x60>
 8017dec:	68bb      	ldr	r3, [r7, #8]
 8017dee:	2b01      	cmp	r3, #1
 8017df0:	d019      	beq.n	8017e26 <lwip_socket+0x52>
 8017df2:	68bb      	ldr	r3, [r7, #8]
 8017df4:	2b02      	cmp	r3, #2
 8017df6:	d009      	beq.n	8017e0c <lwip_socket+0x38>
 8017df8:	e01c      	b.n	8017e34 <lwip_socket+0x60>
    case SOCK_RAW:
      conn = netconn_new_with_proto_and_callback(DOMAIN_TO_NETCONN_TYPE(domain, NETCONN_RAW),
 8017dfa:	687b      	ldr	r3, [r7, #4]
 8017dfc:	b2db      	uxtb	r3, r3
 8017dfe:	4a22      	ldr	r2, [pc, #136]	@ (8017e88 <lwip_socket+0xb4>)
 8017e00:	4619      	mov	r1, r3
 8017e02:	2040      	movs	r0, #64	@ 0x40
 8017e04:	f7fc ff60 	bl	8014cc8 <netconn_new_with_proto_and_callback>
 8017e08:	6178      	str	r0, [r7, #20]
             (u8_t)protocol, DEFAULT_SOCKET_EVENTCB);
      LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_socket(%s, SOCK_RAW, %d) = ",
                                  domain == PF_INET ? "PF_INET" : "UNKNOWN", protocol));
      break;
 8017e0a:	e019      	b.n	8017e40 <lwip_socket+0x6c>
    case SOCK_DGRAM:
      conn = netconn_new_with_callback(DOMAIN_TO_NETCONN_TYPE(domain,
 8017e0c:	687b      	ldr	r3, [r7, #4]
 8017e0e:	2b88      	cmp	r3, #136	@ 0x88
 8017e10:	d101      	bne.n	8017e16 <lwip_socket+0x42>
 8017e12:	2321      	movs	r3, #33	@ 0x21
 8017e14:	e000      	b.n	8017e18 <lwip_socket+0x44>
 8017e16:	2320      	movs	r3, #32
 8017e18:	4a1b      	ldr	r2, [pc, #108]	@ (8017e88 <lwip_socket+0xb4>)
 8017e1a:	2100      	movs	r1, #0
 8017e1c:	4618      	mov	r0, r3
 8017e1e:	f7fc ff53 	bl	8014cc8 <netconn_new_with_proto_and_callback>
 8017e22:	6178      	str	r0, [r7, #20]
      if (conn) {
        /* netconn layer enables pktinfo by default, sockets default to off */
        conn->flags &= ~NETCONN_FLAG_PKTINFO;
      }
#endif /* LWIP_NETBUF_RECVINFO */
      break;
 8017e24:	e00c      	b.n	8017e40 <lwip_socket+0x6c>
    case SOCK_STREAM:
      conn = netconn_new_with_callback(DOMAIN_TO_NETCONN_TYPE(domain, NETCONN_TCP), DEFAULT_SOCKET_EVENTCB);
 8017e26:	4a18      	ldr	r2, [pc, #96]	@ (8017e88 <lwip_socket+0xb4>)
 8017e28:	2100      	movs	r1, #0
 8017e2a:	2010      	movs	r0, #16
 8017e2c:	f7fc ff4c 	bl	8014cc8 <netconn_new_with_proto_and_callback>
 8017e30:	6178      	str	r0, [r7, #20]
      LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_socket(%s, SOCK_STREAM, %d) = ",
                                  domain == PF_INET ? "PF_INET" : "UNKNOWN", protocol));
      break;
 8017e32:	e005      	b.n	8017e40 <lwip_socket+0x6c>
    default:
      LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_socket(%d, %d/UNKNOWN, %d) = -1\n",
                                  domain, type, protocol));
      set_errno(EINVAL);
 8017e34:	4b15      	ldr	r3, [pc, #84]	@ (8017e8c <lwip_socket+0xb8>)
 8017e36:	2216      	movs	r2, #22
 8017e38:	601a      	str	r2, [r3, #0]
      return -1;
 8017e3a:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8017e3e:	e01e      	b.n	8017e7e <lwip_socket+0xaa>
  }

  if (!conn) {
 8017e40:	697b      	ldr	r3, [r7, #20]
 8017e42:	2b00      	cmp	r3, #0
 8017e44:	d105      	bne.n	8017e52 <lwip_socket+0x7e>
    LWIP_DEBUGF(SOCKETS_DEBUG, ("-1 / ENOBUFS (could not create netconn)\n"));
    set_errno(ENOBUFS);
 8017e46:	4b11      	ldr	r3, [pc, #68]	@ (8017e8c <lwip_socket+0xb8>)
 8017e48:	2269      	movs	r2, #105	@ 0x69
 8017e4a:	601a      	str	r2, [r3, #0]
    return -1;
 8017e4c:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8017e50:	e015      	b.n	8017e7e <lwip_socket+0xaa>
  }

  i = alloc_socket(conn, 0);
 8017e52:	2100      	movs	r1, #0
 8017e54:	6978      	ldr	r0, [r7, #20]
 8017e56:	f7ff f9df 	bl	8017218 <alloc_socket>
 8017e5a:	6138      	str	r0, [r7, #16]

  if (i == -1) {
 8017e5c:	693b      	ldr	r3, [r7, #16]
 8017e5e:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8017e62:	d108      	bne.n	8017e76 <lwip_socket+0xa2>
    netconn_delete(conn);
 8017e64:	6978      	ldr	r0, [r7, #20]
 8017e66:	f7fc ffcd 	bl	8014e04 <netconn_delete>
    set_errno(ENFILE);
 8017e6a:	4b08      	ldr	r3, [pc, #32]	@ (8017e8c <lwip_socket+0xb8>)
 8017e6c:	2217      	movs	r2, #23
 8017e6e:	601a      	str	r2, [r3, #0]
    return -1;
 8017e70:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8017e74:	e003      	b.n	8017e7e <lwip_socket+0xaa>
  }
  conn->socket = i;
 8017e76:	697b      	ldr	r3, [r7, #20]
 8017e78:	693a      	ldr	r2, [r7, #16]
 8017e7a:	619a      	str	r2, [r3, #24]
  done_socket(&sockets[i - LWIP_SOCKET_OFFSET]);
  LWIP_DEBUGF(SOCKETS_DEBUG, ("%d\n", i));
  set_errno(0);
  return i;
 8017e7c:	693b      	ldr	r3, [r7, #16]
}
 8017e7e:	4618      	mov	r0, r3
 8017e80:	3718      	adds	r7, #24
 8017e82:	46bd      	mov	sp, r7
 8017e84:	bd80      	pop	{r7, pc}
 8017e86:	bf00      	nop
 8017e88:	08017f19 	.word	0x08017f19
 8017e8c:	2402a2e4 	.word	0x2402a2e4

08017e90 <lwip_poll_should_wake>:
 * Check whether event_callback should wake up a thread waiting in
 * lwip_poll.
 */
static int
lwip_poll_should_wake(const struct lwip_select_cb *scb, int fd, int has_recvevent, int has_sendevent, int has_errevent)
{
 8017e90:	b480      	push	{r7}
 8017e92:	b087      	sub	sp, #28
 8017e94:	af00      	add	r7, sp, #0
 8017e96:	60f8      	str	r0, [r7, #12]
 8017e98:	60b9      	str	r1, [r7, #8]
 8017e9a:	607a      	str	r2, [r7, #4]
 8017e9c:	603b      	str	r3, [r7, #0]
  nfds_t fdi;
  for (fdi = 0; fdi < scb->poll_nfds; fdi++) {
 8017e9e:	2300      	movs	r3, #0
 8017ea0:	617b      	str	r3, [r7, #20]
 8017ea2:	e02c      	b.n	8017efe <lwip_poll_should_wake+0x6e>
    const struct pollfd *pollfd = &scb->poll_fds[fdi];
 8017ea4:	68fb      	ldr	r3, [r7, #12]
 8017ea6:	695a      	ldr	r2, [r3, #20]
 8017ea8:	697b      	ldr	r3, [r7, #20]
 8017eaa:	00db      	lsls	r3, r3, #3
 8017eac:	4413      	add	r3, r2
 8017eae:	613b      	str	r3, [r7, #16]
    if (pollfd->fd == fd) {
 8017eb0:	693b      	ldr	r3, [r7, #16]
 8017eb2:	681b      	ldr	r3, [r3, #0]
 8017eb4:	68ba      	ldr	r2, [r7, #8]
 8017eb6:	429a      	cmp	r2, r3
 8017eb8:	d11e      	bne.n	8017ef8 <lwip_poll_should_wake+0x68>
      /* Do not update pollfd->revents right here;
         that would be a data race because lwip_pollscan
         accesses revents without protecting. */
      if (has_recvevent && (pollfd->events & POLLIN) != 0) {
 8017eba:	687b      	ldr	r3, [r7, #4]
 8017ebc:	2b00      	cmp	r3, #0
 8017ebe:	d009      	beq.n	8017ed4 <lwip_poll_should_wake+0x44>
 8017ec0:	693b      	ldr	r3, [r7, #16]
 8017ec2:	f9b3 3004 	ldrsh.w	r3, [r3, #4]
 8017ec6:	b29b      	uxth	r3, r3
 8017ec8:	f003 0301 	and.w	r3, r3, #1
 8017ecc:	2b00      	cmp	r3, #0
 8017ece:	d001      	beq.n	8017ed4 <lwip_poll_should_wake+0x44>
        return 1;
 8017ed0:	2301      	movs	r3, #1
 8017ed2:	e01a      	b.n	8017f0a <lwip_poll_should_wake+0x7a>
      }
      if (has_sendevent && (pollfd->events & POLLOUT) != 0) {
 8017ed4:	683b      	ldr	r3, [r7, #0]
 8017ed6:	2b00      	cmp	r3, #0
 8017ed8:	d009      	beq.n	8017eee <lwip_poll_should_wake+0x5e>
 8017eda:	693b      	ldr	r3, [r7, #16]
 8017edc:	f9b3 3004 	ldrsh.w	r3, [r3, #4]
 8017ee0:	b29b      	uxth	r3, r3
 8017ee2:	f003 0302 	and.w	r3, r3, #2
 8017ee6:	2b00      	cmp	r3, #0
 8017ee8:	d001      	beq.n	8017eee <lwip_poll_should_wake+0x5e>
        return 1;
 8017eea:	2301      	movs	r3, #1
 8017eec:	e00d      	b.n	8017f0a <lwip_poll_should_wake+0x7a>
      }
      if (has_errevent) {
 8017eee:	6a3b      	ldr	r3, [r7, #32]
 8017ef0:	2b00      	cmp	r3, #0
 8017ef2:	d001      	beq.n	8017ef8 <lwip_poll_should_wake+0x68>
        /* POLLERR is output only. */
        return 1;
 8017ef4:	2301      	movs	r3, #1
 8017ef6:	e008      	b.n	8017f0a <lwip_poll_should_wake+0x7a>
  for (fdi = 0; fdi < scb->poll_nfds; fdi++) {
 8017ef8:	697b      	ldr	r3, [r7, #20]
 8017efa:	3301      	adds	r3, #1
 8017efc:	617b      	str	r3, [r7, #20]
 8017efe:	68fb      	ldr	r3, [r7, #12]
 8017f00:	699b      	ldr	r3, [r3, #24]
 8017f02:	697a      	ldr	r2, [r7, #20]
 8017f04:	429a      	cmp	r2, r3
 8017f06:	d3cd      	bcc.n	8017ea4 <lwip_poll_should_wake+0x14>
      }
    }
  }
  return 0;
 8017f08:	2300      	movs	r3, #0
}
 8017f0a:	4618      	mov	r0, r3
 8017f0c:	371c      	adds	r7, #28
 8017f0e:	46bd      	mov	sp, r7
 8017f10:	f85d 7b04 	ldr.w	r7, [sp], #4
 8017f14:	4770      	bx	lr
	...

08017f18 <event_callback>:
 *   NETCONN_EVT_ERROR
 * This requirement will be asserted in select_check_waiters()
 */
static void
event_callback(struct netconn *conn, enum netconn_evt evt, u16_t len)
{
 8017f18:	b580      	push	{r7, lr}
 8017f1a:	b08a      	sub	sp, #40	@ 0x28
 8017f1c:	af00      	add	r7, sp, #0
 8017f1e:	6078      	str	r0, [r7, #4]
 8017f20:	460b      	mov	r3, r1
 8017f22:	70fb      	strb	r3, [r7, #3]
 8017f24:	4613      	mov	r3, r2
 8017f26:	803b      	strh	r3, [r7, #0]
  SYS_ARCH_DECL_PROTECT(lev);

  LWIP_UNUSED_ARG(len);

  /* Get socket */
  if (conn) {
 8017f28:	687b      	ldr	r3, [r7, #4]
 8017f2a:	2b00      	cmp	r3, #0
 8017f2c:	f000 80a4 	beq.w	8018078 <event_callback+0x160>
    s = conn->socket;
 8017f30:	687b      	ldr	r3, [r7, #4]
 8017f32:	699b      	ldr	r3, [r3, #24]
 8017f34:	627b      	str	r3, [r7, #36]	@ 0x24
    if (s < 0) {
 8017f36:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8017f38:	2b00      	cmp	r3, #0
 8017f3a:	da18      	bge.n	8017f6e <event_callback+0x56>
      /* Data comes in right away after an accept, even though
       * the server task might not have created a new socket yet.
       * Just count down (or up) if that's the case and we
       * will use the data later. Note that only receive events
       * can happen before the new socket is set up. */
      SYS_ARCH_PROTECT(lev);
 8017f3c:	f00e f850 	bl	8025fe0 <sys_arch_protect>
 8017f40:	61f8      	str	r0, [r7, #28]
      if (conn->socket < 0) {
 8017f42:	687b      	ldr	r3, [r7, #4]
 8017f44:	699b      	ldr	r3, [r3, #24]
 8017f46:	2b00      	cmp	r3, #0
 8017f48:	da0b      	bge.n	8017f62 <event_callback+0x4a>
        if (evt == NETCONN_EVT_RCVPLUS) {
 8017f4a:	78fb      	ldrb	r3, [r7, #3]
 8017f4c:	2b00      	cmp	r3, #0
 8017f4e:	d104      	bne.n	8017f5a <event_callback+0x42>
          /* conn->socket is -1 on initialization
             lwip_accept adjusts sock->recvevent if conn->socket < -1 */
          conn->socket--;
 8017f50:	687b      	ldr	r3, [r7, #4]
 8017f52:	699b      	ldr	r3, [r3, #24]
 8017f54:	1e5a      	subs	r2, r3, #1
 8017f56:	687b      	ldr	r3, [r7, #4]
 8017f58:	619a      	str	r2, [r3, #24]
        }
        SYS_ARCH_UNPROTECT(lev);
 8017f5a:	69f8      	ldr	r0, [r7, #28]
 8017f5c:	f00e f84e 	bl	8025ffc <sys_arch_unprotect>
        return;
 8017f60:	e08d      	b.n	801807e <event_callback+0x166>
      }
      s = conn->socket;
 8017f62:	687b      	ldr	r3, [r7, #4]
 8017f64:	699b      	ldr	r3, [r3, #24]
 8017f66:	627b      	str	r3, [r7, #36]	@ 0x24
      SYS_ARCH_UNPROTECT(lev);
 8017f68:	69f8      	ldr	r0, [r7, #28]
 8017f6a:	f00e f847 	bl	8025ffc <sys_arch_unprotect>
    }

    sock = get_socket(s);
 8017f6e:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 8017f70:	f7ff f93a 	bl	80171e8 <get_socket>
 8017f74:	61b8      	str	r0, [r7, #24]
    if (!sock) {
 8017f76:	69bb      	ldr	r3, [r7, #24]
 8017f78:	2b00      	cmp	r3, #0
 8017f7a:	d07f      	beq.n	801807c <event_callback+0x164>
    }
  } else {
    return;
  }

  check_waiters = 1;
 8017f7c:	2301      	movs	r3, #1
 8017f7e:	623b      	str	r3, [r7, #32]
  SYS_ARCH_PROTECT(lev);
 8017f80:	f00e f82e 	bl	8025fe0 <sys_arch_protect>
 8017f84:	61f8      	str	r0, [r7, #28]
  /* Set event as required */
  switch (evt) {
 8017f86:	78fb      	ldrb	r3, [r7, #3]
 8017f88:	2b04      	cmp	r3, #4
 8017f8a:	d83e      	bhi.n	801800a <event_callback+0xf2>
 8017f8c:	a201      	add	r2, pc, #4	@ (adr r2, 8017f94 <event_callback+0x7c>)
 8017f8e:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 8017f92:	bf00      	nop
 8017f94:	08017fa9 	.word	0x08017fa9
 8017f98:	08017fcb 	.word	0x08017fcb
 8017f9c:	08017fe3 	.word	0x08017fe3
 8017fa0:	08017ff7 	.word	0x08017ff7
 8017fa4:	08018003 	.word	0x08018003
    case NETCONN_EVT_RCVPLUS:
      sock->rcvevent++;
 8017fa8:	69bb      	ldr	r3, [r7, #24]
 8017faa:	f9b3 3008 	ldrsh.w	r3, [r3, #8]
 8017fae:	b29b      	uxth	r3, r3
 8017fb0:	3301      	adds	r3, #1
 8017fb2:	b29b      	uxth	r3, r3
 8017fb4:	b21a      	sxth	r2, r3
 8017fb6:	69bb      	ldr	r3, [r7, #24]
 8017fb8:	811a      	strh	r2, [r3, #8]
      if (sock->rcvevent > 1) {
 8017fba:	69bb      	ldr	r3, [r7, #24]
 8017fbc:	f9b3 3008 	ldrsh.w	r3, [r3, #8]
 8017fc0:	2b01      	cmp	r3, #1
 8017fc2:	dd2a      	ble.n	801801a <event_callback+0x102>
        check_waiters = 0;
 8017fc4:	2300      	movs	r3, #0
 8017fc6:	623b      	str	r3, [r7, #32]
      }
      break;
 8017fc8:	e027      	b.n	801801a <event_callback+0x102>
    case NETCONN_EVT_RCVMINUS:
      sock->rcvevent--;
 8017fca:	69bb      	ldr	r3, [r7, #24]
 8017fcc:	f9b3 3008 	ldrsh.w	r3, [r3, #8]
 8017fd0:	b29b      	uxth	r3, r3
 8017fd2:	3b01      	subs	r3, #1
 8017fd4:	b29b      	uxth	r3, r3
 8017fd6:	b21a      	sxth	r2, r3
 8017fd8:	69bb      	ldr	r3, [r7, #24]
 8017fda:	811a      	strh	r2, [r3, #8]
      check_waiters = 0;
 8017fdc:	2300      	movs	r3, #0
 8017fde:	623b      	str	r3, [r7, #32]
      break;
 8017fe0:	e01c      	b.n	801801c <event_callback+0x104>
    case NETCONN_EVT_SENDPLUS:
      if (sock->sendevent) {
 8017fe2:	69bb      	ldr	r3, [r7, #24]
 8017fe4:	895b      	ldrh	r3, [r3, #10]
 8017fe6:	2b00      	cmp	r3, #0
 8017fe8:	d001      	beq.n	8017fee <event_callback+0xd6>
        check_waiters = 0;
 8017fea:	2300      	movs	r3, #0
 8017fec:	623b      	str	r3, [r7, #32]
      }
      sock->sendevent = 1;
 8017fee:	69bb      	ldr	r3, [r7, #24]
 8017ff0:	2201      	movs	r2, #1
 8017ff2:	815a      	strh	r2, [r3, #10]
      break;
 8017ff4:	e012      	b.n	801801c <event_callback+0x104>
    case NETCONN_EVT_SENDMINUS:
      sock->sendevent = 0;
 8017ff6:	69bb      	ldr	r3, [r7, #24]
 8017ff8:	2200      	movs	r2, #0
 8017ffa:	815a      	strh	r2, [r3, #10]
      check_waiters = 0;
 8017ffc:	2300      	movs	r3, #0
 8017ffe:	623b      	str	r3, [r7, #32]
      break;
 8018000:	e00c      	b.n	801801c <event_callback+0x104>
    case NETCONN_EVT_ERROR:
      sock->errevent = 1;
 8018002:	69bb      	ldr	r3, [r7, #24]
 8018004:	2201      	movs	r2, #1
 8018006:	819a      	strh	r2, [r3, #12]
      break;
 8018008:	e008      	b.n	801801c <event_callback+0x104>
    default:
      LWIP_ASSERT("unknown event", 0);
 801800a:	4b1e      	ldr	r3, [pc, #120]	@ (8018084 <event_callback+0x16c>)
 801800c:	f44f 621f 	mov.w	r2, #2544	@ 0x9f0
 8018010:	491d      	ldr	r1, [pc, #116]	@ (8018088 <event_callback+0x170>)
 8018012:	481e      	ldr	r0, [pc, #120]	@ (801808c <event_callback+0x174>)
 8018014:	f011 fa7a 	bl	802950c <iprintf>
      break;
 8018018:	e000      	b.n	801801c <event_callback+0x104>
      break;
 801801a:	bf00      	nop
  }

  if (sock->select_waiting && check_waiters) {
 801801c:	69bb      	ldr	r3, [r7, #24]
 801801e:	7b9b      	ldrb	r3, [r3, #14]
 8018020:	2b00      	cmp	r3, #0
 8018022:	d025      	beq.n	8018070 <event_callback+0x158>
 8018024:	6a3b      	ldr	r3, [r7, #32]
 8018026:	2b00      	cmp	r3, #0
 8018028:	d022      	beq.n	8018070 <event_callback+0x158>
    /* Save which events are active */
    int has_recvevent, has_sendevent, has_errevent;
    has_recvevent = sock->rcvevent > 0;
 801802a:	69bb      	ldr	r3, [r7, #24]
 801802c:	f9b3 3008 	ldrsh.w	r3, [r3, #8]
 8018030:	2b00      	cmp	r3, #0
 8018032:	bfcc      	ite	gt
 8018034:	2301      	movgt	r3, #1
 8018036:	2300      	movle	r3, #0
 8018038:	b2db      	uxtb	r3, r3
 801803a:	617b      	str	r3, [r7, #20]
    has_sendevent = sock->sendevent != 0;
 801803c:	69bb      	ldr	r3, [r7, #24]
 801803e:	895b      	ldrh	r3, [r3, #10]
 8018040:	2b00      	cmp	r3, #0
 8018042:	bf14      	ite	ne
 8018044:	2301      	movne	r3, #1
 8018046:	2300      	moveq	r3, #0
 8018048:	b2db      	uxtb	r3, r3
 801804a:	613b      	str	r3, [r7, #16]
    has_errevent = sock->errevent != 0;
 801804c:	69bb      	ldr	r3, [r7, #24]
 801804e:	899b      	ldrh	r3, [r3, #12]
 8018050:	2b00      	cmp	r3, #0
 8018052:	bf14      	ite	ne
 8018054:	2301      	movne	r3, #1
 8018056:	2300      	moveq	r3, #0
 8018058:	b2db      	uxtb	r3, r3
 801805a:	60fb      	str	r3, [r7, #12]
    SYS_ARCH_UNPROTECT(lev);
 801805c:	69f8      	ldr	r0, [r7, #28]
 801805e:	f00d ffcd 	bl	8025ffc <sys_arch_unprotect>
    /* Check any select calls waiting on this socket */
    select_check_waiters(s, has_recvevent, has_sendevent, has_errevent);
 8018062:	68fb      	ldr	r3, [r7, #12]
 8018064:	693a      	ldr	r2, [r7, #16]
 8018066:	6979      	ldr	r1, [r7, #20]
 8018068:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 801806a:	f000 f811 	bl	8018090 <select_check_waiters>
  if (sock->select_waiting && check_waiters) {
 801806e:	e006      	b.n	801807e <event_callback+0x166>
  } else {
    SYS_ARCH_UNPROTECT(lev);
 8018070:	69f8      	ldr	r0, [r7, #28]
 8018072:	f00d ffc3 	bl	8025ffc <sys_arch_unprotect>
 8018076:	e002      	b.n	801807e <event_callback+0x166>
    return;
 8018078:	bf00      	nop
 801807a:	e000      	b.n	801807e <event_callback+0x166>
      return;
 801807c:	bf00      	nop
  }
  done_socket(sock);
}
 801807e:	3728      	adds	r7, #40	@ 0x28
 8018080:	46bd      	mov	sp, r7
 8018082:	bd80      	pop	{r7, pc}
 8018084:	0802d160 	.word	0x0802d160
 8018088:	0802d4dc 	.word	0x0802d4dc
 801808c:	0802d1b4 	.word	0x0802d1b4

08018090 <select_check_waiters>:
 * of the loop, thus creating a possibility where a thread could modify the
 * select_cb_list during our UNPROTECT/PROTECT. We use a generational counter to
 * detect this change and restart the list walk. The list is expected to be small
 */
static void select_check_waiters(int s, int has_recvevent, int has_sendevent, int has_errevent)
{
 8018090:	b580      	push	{r7, lr}
 8018092:	b088      	sub	sp, #32
 8018094:	af02      	add	r7, sp, #8
 8018096:	60f8      	str	r0, [r7, #12]
 8018098:	60b9      	str	r1, [r7, #8]
 801809a:	607a      	str	r2, [r7, #4]
 801809c:	603b      	str	r3, [r7, #0]
#if !LWIP_TCPIP_CORE_LOCKING
  int last_select_cb_ctr;
  SYS_ARCH_DECL_PROTECT(lev);
#endif /* !LWIP_TCPIP_CORE_LOCKING */

  LWIP_ASSERT_CORE_LOCKED();
 801809e:	f7f7 ffe7 	bl	8010070 <sys_check_core_locking>
  SYS_ARCH_PROTECT(lev);
again:
  /* remember the state of select_cb_list to detect changes */
  last_select_cb_ctr = select_cb_ctr;
#endif /* !LWIP_TCPIP_CORE_LOCKING */
  for (scb = select_cb_list; scb != NULL; scb = scb->next) {
 80180a2:	4b42      	ldr	r3, [pc, #264]	@ (80181ac <select_check_waiters+0x11c>)
 80180a4:	681b      	ldr	r3, [r3, #0]
 80180a6:	617b      	str	r3, [r7, #20]
 80180a8:	e078      	b.n	801819c <select_check_waiters+0x10c>
    if (scb->sem_signalled == 0) {
 80180aa:	697b      	ldr	r3, [r7, #20]
 80180ac:	69db      	ldr	r3, [r3, #28]
 80180ae:	2b00      	cmp	r3, #0
 80180b0:	d171      	bne.n	8018196 <select_check_waiters+0x106>
      /* semaphore not signalled yet */
      int do_signal = 0;
 80180b2:	2300      	movs	r3, #0
 80180b4:	613b      	str	r3, [r7, #16]
#if LWIP_SOCKET_POLL
      if (scb->poll_fds != NULL) {
 80180b6:	697b      	ldr	r3, [r7, #20]
 80180b8:	695b      	ldr	r3, [r3, #20]
 80180ba:	2b00      	cmp	r3, #0
 80180bc:	d009      	beq.n	80180d2 <select_check_waiters+0x42>
        do_signal = lwip_poll_should_wake(scb, s, has_recvevent, has_sendevent, has_errevent);
 80180be:	683b      	ldr	r3, [r7, #0]
 80180c0:	9300      	str	r3, [sp, #0]
 80180c2:	687b      	ldr	r3, [r7, #4]
 80180c4:	68ba      	ldr	r2, [r7, #8]
 80180c6:	68f9      	ldr	r1, [r7, #12]
 80180c8:	6978      	ldr	r0, [r7, #20]
 80180ca:	f7ff fee1 	bl	8017e90 <lwip_poll_should_wake>
 80180ce:	6138      	str	r0, [r7, #16]
 80180d0:	e056      	b.n	8018180 <select_check_waiters+0xf0>
      else
#endif /* LWIP_SOCKET_SELECT && LWIP_SOCKET_POLL */
#if LWIP_SOCKET_SELECT
      {
        /* Test this select call for our socket */
        if (has_recvevent) {
 80180d2:	68bb      	ldr	r3, [r7, #8]
 80180d4:	2b00      	cmp	r3, #0
 80180d6:	d017      	beq.n	8018108 <select_check_waiters+0x78>
          if (scb->readset && FD_ISSET(s, scb->readset)) {
 80180d8:	697b      	ldr	r3, [r7, #20]
 80180da:	689b      	ldr	r3, [r3, #8]
 80180dc:	2b00      	cmp	r3, #0
 80180de:	d013      	beq.n	8018108 <select_check_waiters+0x78>
 80180e0:	697b      	ldr	r3, [r7, #20]
 80180e2:	689a      	ldr	r2, [r3, #8]
 80180e4:	68fb      	ldr	r3, [r7, #12]
 80180e6:	2b00      	cmp	r3, #0
 80180e8:	da00      	bge.n	80180ec <select_check_waiters+0x5c>
 80180ea:	331f      	adds	r3, #31
 80180ec:	115b      	asrs	r3, r3, #5
 80180ee:	f852 2023 	ldr.w	r2, [r2, r3, lsl #2]
 80180f2:	68fb      	ldr	r3, [r7, #12]
 80180f4:	f003 031f 	and.w	r3, r3, #31
 80180f8:	fa22 f303 	lsr.w	r3, r2, r3
 80180fc:	f003 0301 	and.w	r3, r3, #1
 8018100:	2b00      	cmp	r3, #0
 8018102:	d001      	beq.n	8018108 <select_check_waiters+0x78>
            do_signal = 1;
 8018104:	2301      	movs	r3, #1
 8018106:	613b      	str	r3, [r7, #16]
          }
        }
        if (has_sendevent) {
 8018108:	687b      	ldr	r3, [r7, #4]
 801810a:	2b00      	cmp	r3, #0
 801810c:	d01a      	beq.n	8018144 <select_check_waiters+0xb4>
          if (!do_signal && scb->writeset && FD_ISSET(s, scb->writeset)) {
 801810e:	693b      	ldr	r3, [r7, #16]
 8018110:	2b00      	cmp	r3, #0
 8018112:	d117      	bne.n	8018144 <select_check_waiters+0xb4>
 8018114:	697b      	ldr	r3, [r7, #20]
 8018116:	68db      	ldr	r3, [r3, #12]
 8018118:	2b00      	cmp	r3, #0
 801811a:	d013      	beq.n	8018144 <select_check_waiters+0xb4>
 801811c:	697b      	ldr	r3, [r7, #20]
 801811e:	68da      	ldr	r2, [r3, #12]
 8018120:	68fb      	ldr	r3, [r7, #12]
 8018122:	2b00      	cmp	r3, #0
 8018124:	da00      	bge.n	8018128 <select_check_waiters+0x98>
 8018126:	331f      	adds	r3, #31
 8018128:	115b      	asrs	r3, r3, #5
 801812a:	f852 2023 	ldr.w	r2, [r2, r3, lsl #2]
 801812e:	68fb      	ldr	r3, [r7, #12]
 8018130:	f003 031f 	and.w	r3, r3, #31
 8018134:	fa22 f303 	lsr.w	r3, r2, r3
 8018138:	f003 0301 	and.w	r3, r3, #1
 801813c:	2b00      	cmp	r3, #0
 801813e:	d001      	beq.n	8018144 <select_check_waiters+0xb4>
            do_signal = 1;
 8018140:	2301      	movs	r3, #1
 8018142:	613b      	str	r3, [r7, #16]
          }
        }
        if (has_errevent) {
 8018144:	683b      	ldr	r3, [r7, #0]
 8018146:	2b00      	cmp	r3, #0
 8018148:	d01a      	beq.n	8018180 <select_check_waiters+0xf0>
          if (!do_signal && scb->exceptset && FD_ISSET(s, scb->exceptset)) {
 801814a:	693b      	ldr	r3, [r7, #16]
 801814c:	2b00      	cmp	r3, #0
 801814e:	d117      	bne.n	8018180 <select_check_waiters+0xf0>
 8018150:	697b      	ldr	r3, [r7, #20]
 8018152:	691b      	ldr	r3, [r3, #16]
 8018154:	2b00      	cmp	r3, #0
 8018156:	d013      	beq.n	8018180 <select_check_waiters+0xf0>
 8018158:	697b      	ldr	r3, [r7, #20]
 801815a:	691a      	ldr	r2, [r3, #16]
 801815c:	68fb      	ldr	r3, [r7, #12]
 801815e:	2b00      	cmp	r3, #0
 8018160:	da00      	bge.n	8018164 <select_check_waiters+0xd4>
 8018162:	331f      	adds	r3, #31
 8018164:	115b      	asrs	r3, r3, #5
 8018166:	f852 2023 	ldr.w	r2, [r2, r3, lsl #2]
 801816a:	68fb      	ldr	r3, [r7, #12]
 801816c:	f003 031f 	and.w	r3, r3, #31
 8018170:	fa22 f303 	lsr.w	r3, r2, r3
 8018174:	f003 0301 	and.w	r3, r3, #1
 8018178:	2b00      	cmp	r3, #0
 801817a:	d001      	beq.n	8018180 <select_check_waiters+0xf0>
            do_signal = 1;
 801817c:	2301      	movs	r3, #1
 801817e:	613b      	str	r3, [r7, #16]
          }
        }
      }
#endif /* LWIP_SOCKET_SELECT */
      if (do_signal) {
 8018180:	693b      	ldr	r3, [r7, #16]
 8018182:	2b00      	cmp	r3, #0
 8018184:	d007      	beq.n	8018196 <select_check_waiters+0x106>
        scb->sem_signalled = 1;
 8018186:	697b      	ldr	r3, [r7, #20]
 8018188:	2201      	movs	r2, #1
 801818a:	61da      	str	r2, [r3, #28]
        /* For !LWIP_TCPIP_CORE_LOCKING, we don't call SYS_ARCH_UNPROTECT() before signaling
           the semaphore, as this might lead to the select thread taking itself off the list,
           invalidating the semaphore. */
        sys_sem_signal(SELECT_SEM_PTR(scb->sem));
 801818c:	697b      	ldr	r3, [r7, #20]
 801818e:	3320      	adds	r3, #32
 8018190:	4618      	mov	r0, r3
 8018192:	f00d fe8f 	bl	8025eb4 <sys_sem_signal>
  for (scb = select_cb_list; scb != NULL; scb = scb->next) {
 8018196:	697b      	ldr	r3, [r7, #20]
 8018198:	681b      	ldr	r3, [r3, #0]
 801819a:	617b      	str	r3, [r7, #20]
 801819c:	697b      	ldr	r3, [r7, #20]
 801819e:	2b00      	cmp	r3, #0
 80181a0:	d183      	bne.n	80180aa <select_check_waiters+0x1a>
    /* remember the state of select_cb_list to detect changes */
    last_select_cb_ctr = select_cb_ctr;
  }
  SYS_ARCH_UNPROTECT(lev);
#endif
}
 80181a2:	bf00      	nop
 80181a4:	bf00      	nop
 80181a6:	3718      	adds	r7, #24
 80181a8:	46bd      	mov	sp, r7
 80181aa:	bd80      	pop	{r7, pc}
 80181ac:	24023488 	.word	0x24023488

080181b0 <lwip_ioctl>:
  return err;
}

int
lwip_ioctl(int s, long cmd, void *argp)
{
 80181b0:	b580      	push	{r7, lr}
 80181b2:	b08c      	sub	sp, #48	@ 0x30
 80181b4:	af00      	add	r7, sp, #0
 80181b6:	60f8      	str	r0, [r7, #12]
 80181b8:	60b9      	str	r1, [r7, #8]
 80181ba:	607a      	str	r2, [r7, #4]
  struct lwip_sock *sock = get_socket(s);
 80181bc:	68f8      	ldr	r0, [r7, #12]
 80181be:	f7ff f813 	bl	80171e8 <get_socket>
 80181c2:	6278      	str	r0, [r7, #36]	@ 0x24
  u8_t val;
#if LWIP_SO_RCVBUF
  int recv_avail;
#endif /* LWIP_SO_RCVBUF */

  if (!sock) {
 80181c4:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80181c6:	2b00      	cmp	r3, #0
 80181c8:	d102      	bne.n	80181d0 <lwip_ioctl+0x20>
    return -1;
 80181ca:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80181ce:	e089      	b.n	80182e4 <lwip_ioctl+0x134>
  }

  switch (cmd) {
 80181d0:	68bb      	ldr	r3, [r7, #8]
 80181d2:	4a46      	ldr	r2, [pc, #280]	@ (80182ec <lwip_ioctl+0x13c>)
 80181d4:	4293      	cmp	r3, r2
 80181d6:	d048      	beq.n	801826a <lwip_ioctl+0xba>
 80181d8:	68bb      	ldr	r3, [r7, #8]
 80181da:	4a45      	ldr	r2, [pc, #276]	@ (80182f0 <lwip_ioctl+0x140>)
 80181dc:	4293      	cmp	r3, r2
 80181de:	d176      	bne.n	80182ce <lwip_ioctl+0x11e>
#if LWIP_SO_RCVBUF || LWIP_FIONREAD_LINUXMODE
    case FIONREAD:
      if (!argp) {
 80181e0:	687b      	ldr	r3, [r7, #4]
 80181e2:	2b00      	cmp	r3, #0
 80181e4:	d10a      	bne.n	80181fc <lwip_ioctl+0x4c>
        sock_set_errno(sock, EINVAL);
 80181e6:	2316      	movs	r3, #22
 80181e8:	61bb      	str	r3, [r7, #24]
 80181ea:	69bb      	ldr	r3, [r7, #24]
 80181ec:	2b00      	cmp	r3, #0
 80181ee:	d002      	beq.n	80181f6 <lwip_ioctl+0x46>
 80181f0:	4a40      	ldr	r2, [pc, #256]	@ (80182f4 <lwip_ioctl+0x144>)
 80181f2:	69bb      	ldr	r3, [r7, #24]
 80181f4:	6013      	str	r3, [r2, #0]
        done_socket(sock);
        return -1;
 80181f6:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80181fa:	e073      	b.n	80182e4 <lwip_ioctl+0x134>
      }
#endif /* LWIP_FIONREAD_LINUXMODE */

#if LWIP_SO_RCVBUF
      /* we come here if either LWIP_FIONREAD_LINUXMODE==0 or this is a TCP socket */
      SYS_ARCH_GET(sock->conn->recv_avail, recv_avail);
 80181fc:	f00d fef0 	bl	8025fe0 <sys_arch_protect>
 8018200:	6238      	str	r0, [r7, #32]
 8018202:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8018204:	681b      	ldr	r3, [r3, #0]
 8018206:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8018208:	62fb      	str	r3, [r7, #44]	@ 0x2c
 801820a:	6a38      	ldr	r0, [r7, #32]
 801820c:	f00d fef6 	bl	8025ffc <sys_arch_unprotect>
      if (recv_avail < 0) {
 8018210:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8018212:	2b00      	cmp	r3, #0
 8018214:	da01      	bge.n	801821a <lwip_ioctl+0x6a>
        recv_avail = 0;
 8018216:	2300      	movs	r3, #0
 8018218:	62fb      	str	r3, [r7, #44]	@ 0x2c
      }

      /* Check if there is data left from the last recv operation. /maq 041215 */
      if (sock->lastdata.netbuf) {
 801821a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801821c:	685b      	ldr	r3, [r3, #4]
 801821e:	2b00      	cmp	r3, #0
 8018220:	d016      	beq.n	8018250 <lwip_ioctl+0xa0>
        if (NETCONNTYPE_GROUP(netconn_type(sock->conn)) == NETCONN_TCP) {
 8018222:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8018224:	681b      	ldr	r3, [r3, #0]
 8018226:	781b      	ldrb	r3, [r3, #0]
 8018228:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 801822c:	2b10      	cmp	r3, #16
 801822e:	d107      	bne.n	8018240 <lwip_ioctl+0x90>
          recv_avail += sock->lastdata.pbuf->tot_len;
 8018230:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8018232:	685b      	ldr	r3, [r3, #4]
 8018234:	891b      	ldrh	r3, [r3, #8]
 8018236:	461a      	mov	r2, r3
 8018238:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801823a:	4413      	add	r3, r2
 801823c:	62fb      	str	r3, [r7, #44]	@ 0x2c
 801823e:	e007      	b.n	8018250 <lwip_ioctl+0xa0>
        } else {
          recv_avail += sock->lastdata.netbuf->p->tot_len;
 8018240:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8018242:	685b      	ldr	r3, [r3, #4]
 8018244:	681b      	ldr	r3, [r3, #0]
 8018246:	891b      	ldrh	r3, [r3, #8]
 8018248:	461a      	mov	r2, r3
 801824a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801824c:	4413      	add	r3, r2
 801824e:	62fb      	str	r3, [r7, #44]	@ 0x2c
        }
      }
      *((int *)argp) = recv_avail;
 8018250:	687b      	ldr	r3, [r7, #4]
 8018252:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 8018254:	601a      	str	r2, [r3, #0]

      LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_ioctl(%d, FIONREAD, %p) = %"U16_F"\n", s, argp, *((u16_t *)argp)));
      sock_set_errno(sock, 0);
 8018256:	2300      	movs	r3, #0
 8018258:	61fb      	str	r3, [r7, #28]
 801825a:	69fb      	ldr	r3, [r7, #28]
 801825c:	2b00      	cmp	r3, #0
 801825e:	d002      	beq.n	8018266 <lwip_ioctl+0xb6>
 8018260:	4a24      	ldr	r2, [pc, #144]	@ (80182f4 <lwip_ioctl+0x144>)
 8018262:	69fb      	ldr	r3, [r7, #28]
 8018264:	6013      	str	r3, [r2, #0]
      done_socket(sock);
      return 0;
 8018266:	2300      	movs	r3, #0
 8018268:	e03c      	b.n	80182e4 <lwip_ioctl+0x134>
      break;
#endif /* LWIP_SO_RCVBUF */
#endif /* LWIP_SO_RCVBUF || LWIP_FIONREAD_LINUXMODE */

    case (long)FIONBIO:
      val = 0;
 801826a:	2300      	movs	r3, #0
 801826c:	f887 302b 	strb.w	r3, [r7, #43]	@ 0x2b
      if (argp && *(int *)argp) {
 8018270:	687b      	ldr	r3, [r7, #4]
 8018272:	2b00      	cmp	r3, #0
 8018274:	d006      	beq.n	8018284 <lwip_ioctl+0xd4>
 8018276:	687b      	ldr	r3, [r7, #4]
 8018278:	681b      	ldr	r3, [r3, #0]
 801827a:	2b00      	cmp	r3, #0
 801827c:	d002      	beq.n	8018284 <lwip_ioctl+0xd4>
        val = 1;
 801827e:	2301      	movs	r3, #1
 8018280:	f887 302b 	strb.w	r3, [r7, #43]	@ 0x2b
      }
      netconn_set_nonblocking(sock->conn, val);
 8018284:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 8018288:	2b00      	cmp	r3, #0
 801828a:	d00b      	beq.n	80182a4 <lwip_ioctl+0xf4>
 801828c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801828e:	681b      	ldr	r3, [r3, #0]
 8018290:	f893 2028 	ldrb.w	r2, [r3, #40]	@ 0x28
 8018294:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8018296:	681b      	ldr	r3, [r3, #0]
 8018298:	f042 0202 	orr.w	r2, r2, #2
 801829c:	b2d2      	uxtb	r2, r2
 801829e:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
 80182a2:	e00a      	b.n	80182ba <lwip_ioctl+0x10a>
 80182a4:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80182a6:	681b      	ldr	r3, [r3, #0]
 80182a8:	f893 2028 	ldrb.w	r2, [r3, #40]	@ 0x28
 80182ac:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80182ae:	681b      	ldr	r3, [r3, #0]
 80182b0:	f022 0202 	bic.w	r2, r2, #2
 80182b4:	b2d2      	uxtb	r2, r2
 80182b6:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
      LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_ioctl(%d, FIONBIO, %d)\n", s, val));
      sock_set_errno(sock, 0);
 80182ba:	2300      	movs	r3, #0
 80182bc:	617b      	str	r3, [r7, #20]
 80182be:	697b      	ldr	r3, [r7, #20]
 80182c0:	2b00      	cmp	r3, #0
 80182c2:	d002      	beq.n	80182ca <lwip_ioctl+0x11a>
 80182c4:	4a0b      	ldr	r2, [pc, #44]	@ (80182f4 <lwip_ioctl+0x144>)
 80182c6:	697b      	ldr	r3, [r7, #20]
 80182c8:	6013      	str	r3, [r2, #0]
      done_socket(sock);
      return 0;
 80182ca:	2300      	movs	r3, #0
 80182cc:	e00a      	b.n	80182e4 <lwip_ioctl+0x134>

    default:
      break;
 80182ce:	bf00      	nop
  } /* switch (cmd) */
  LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_ioctl(%d, UNIMPL: 0x%lx, %p)\n", s, cmd, argp));
  sock_set_errno(sock, ENOSYS); /* not yet implemented */
 80182d0:	2326      	movs	r3, #38	@ 0x26
 80182d2:	613b      	str	r3, [r7, #16]
 80182d4:	693b      	ldr	r3, [r7, #16]
 80182d6:	2b00      	cmp	r3, #0
 80182d8:	d002      	beq.n	80182e0 <lwip_ioctl+0x130>
 80182da:	4a06      	ldr	r2, [pc, #24]	@ (80182f4 <lwip_ioctl+0x144>)
 80182dc:	693b      	ldr	r3, [r7, #16]
 80182de:	6013      	str	r3, [r2, #0]
  done_socket(sock);
  return -1;
 80182e0:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
}
 80182e4:	4618      	mov	r0, r3
 80182e6:	3730      	adds	r7, #48	@ 0x30
 80182e8:	46bd      	mov	sp, r7
 80182ea:	bd80      	pop	{r7, pc}
 80182ec:	8004667e 	.word	0x8004667e
 80182f0:	4004667f 	.word	0x4004667f
 80182f4:	2402a2e4 	.word	0x2402a2e4

080182f8 <tcpip_timeouts_mbox_fetch>:
 * @param mbox the mbox to fetch the message from
 * @param msg the place to store the message
 */
static void
tcpip_timeouts_mbox_fetch(sys_mbox_t *mbox, void **msg)
{
 80182f8:	b580      	push	{r7, lr}
 80182fa:	b084      	sub	sp, #16
 80182fc:	af00      	add	r7, sp, #0
 80182fe:	6078      	str	r0, [r7, #4]
 8018300:	6039      	str	r1, [r7, #0]
  u32_t sleeptime, res;

again:
  LWIP_ASSERT_CORE_LOCKED();
 8018302:	f7f7 feb5 	bl	8010070 <sys_check_core_locking>

  sleeptime = sys_timeouts_sleeptime();
 8018306:	f008 fb41 	bl	802098c <sys_timeouts_sleeptime>
 801830a:	60f8      	str	r0, [r7, #12]
  if (sleeptime == SYS_TIMEOUTS_SLEEPTIME_INFINITE) {
 801830c:	68fb      	ldr	r3, [r7, #12]
 801830e:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8018312:	d109      	bne.n	8018328 <tcpip_timeouts_mbox_fetch+0x30>
    UNLOCK_TCPIP_CORE();
 8018314:	f7f7 fe9e 	bl	8010054 <sys_unlock_tcpip_core>
    sys_arch_mbox_fetch(mbox, msg, 0);
 8018318:	2200      	movs	r2, #0
 801831a:	6839      	ldr	r1, [r7, #0]
 801831c:	6878      	ldr	r0, [r7, #4]
 801831e:	f00d fd0d 	bl	8025d3c <sys_arch_mbox_fetch>
    LOCK_TCPIP_CORE();
 8018322:	f7f7 fe87 	bl	8010034 <sys_lock_tcpip_core>
    return;
 8018326:	e016      	b.n	8018356 <tcpip_timeouts_mbox_fetch+0x5e>
  } else if (sleeptime == 0) {
 8018328:	68fb      	ldr	r3, [r7, #12]
 801832a:	2b00      	cmp	r3, #0
 801832c:	d102      	bne.n	8018334 <tcpip_timeouts_mbox_fetch+0x3c>
    sys_check_timeouts();
 801832e:	f008 faf1 	bl	8020914 <sys_check_timeouts>
    /* We try again to fetch a message from the mbox. */
    goto again;
 8018332:	e7e6      	b.n	8018302 <tcpip_timeouts_mbox_fetch+0xa>
  }

  UNLOCK_TCPIP_CORE();
 8018334:	f7f7 fe8e 	bl	8010054 <sys_unlock_tcpip_core>
  res = sys_arch_mbox_fetch(mbox, msg, sleeptime);
 8018338:	68fa      	ldr	r2, [r7, #12]
 801833a:	6839      	ldr	r1, [r7, #0]
 801833c:	6878      	ldr	r0, [r7, #4]
 801833e:	f00d fcfd 	bl	8025d3c <sys_arch_mbox_fetch>
 8018342:	60b8      	str	r0, [r7, #8]
  LOCK_TCPIP_CORE();
 8018344:	f7f7 fe76 	bl	8010034 <sys_lock_tcpip_core>
  if (res == SYS_ARCH_TIMEOUT) {
 8018348:	68bb      	ldr	r3, [r7, #8]
 801834a:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 801834e:	d102      	bne.n	8018356 <tcpip_timeouts_mbox_fetch+0x5e>
    /* If a SYS_ARCH_TIMEOUT value is returned, a timeout occurred
       before a message could be fetched. */
    sys_check_timeouts();
 8018350:	f008 fae0 	bl	8020914 <sys_check_timeouts>
    /* We try again to fetch a message from the mbox. */
    goto again;
 8018354:	e7d5      	b.n	8018302 <tcpip_timeouts_mbox_fetch+0xa>
  }
}
 8018356:	3710      	adds	r7, #16
 8018358:	46bd      	mov	sp, r7
 801835a:	bd80      	pop	{r7, pc}

0801835c <tcpip_thread>:
 *
 * @param arg unused argument
 */
static void
tcpip_thread(void *arg)
{
 801835c:	b580      	push	{r7, lr}
 801835e:	b084      	sub	sp, #16
 8018360:	af00      	add	r7, sp, #0
 8018362:	6078      	str	r0, [r7, #4]
  struct tcpip_msg *msg;
  LWIP_UNUSED_ARG(arg);

  LWIP_MARK_TCPIP_THREAD();
 8018364:	f7f7 fec0 	bl	80100e8 <sys_mark_tcpip_thread>

  LOCK_TCPIP_CORE();
 8018368:	f7f7 fe64 	bl	8010034 <sys_lock_tcpip_core>
  if (tcpip_init_done != NULL) {
 801836c:	4b0f      	ldr	r3, [pc, #60]	@ (80183ac <tcpip_thread+0x50>)
 801836e:	681b      	ldr	r3, [r3, #0]
 8018370:	2b00      	cmp	r3, #0
 8018372:	d005      	beq.n	8018380 <tcpip_thread+0x24>
    tcpip_init_done(tcpip_init_done_arg);
 8018374:	4b0d      	ldr	r3, [pc, #52]	@ (80183ac <tcpip_thread+0x50>)
 8018376:	681b      	ldr	r3, [r3, #0]
 8018378:	4a0d      	ldr	r2, [pc, #52]	@ (80183b0 <tcpip_thread+0x54>)
 801837a:	6812      	ldr	r2, [r2, #0]
 801837c:	4610      	mov	r0, r2
 801837e:	4798      	blx	r3
  }

  while (1) {                          /* MAIN Loop */
    LWIP_TCPIP_THREAD_ALIVE();
    /* wait for a message, timeouts are processed while waiting */
    TCPIP_MBOX_FETCH(&tcpip_mbox, (void **)&msg);
 8018380:	f107 030c 	add.w	r3, r7, #12
 8018384:	4619      	mov	r1, r3
 8018386:	480b      	ldr	r0, [pc, #44]	@ (80183b4 <tcpip_thread+0x58>)
 8018388:	f7ff ffb6 	bl	80182f8 <tcpip_timeouts_mbox_fetch>
    if (msg == NULL) {
 801838c:	68fb      	ldr	r3, [r7, #12]
 801838e:	2b00      	cmp	r3, #0
 8018390:	d106      	bne.n	80183a0 <tcpip_thread+0x44>
      LWIP_DEBUGF(TCPIP_DEBUG, ("tcpip_thread: invalid message: NULL\n"));
      LWIP_ASSERT("tcpip_thread: invalid message", 0);
 8018392:	4b09      	ldr	r3, [pc, #36]	@ (80183b8 <tcpip_thread+0x5c>)
 8018394:	2291      	movs	r2, #145	@ 0x91
 8018396:	4909      	ldr	r1, [pc, #36]	@ (80183bc <tcpip_thread+0x60>)
 8018398:	4809      	ldr	r0, [pc, #36]	@ (80183c0 <tcpip_thread+0x64>)
 801839a:	f011 f8b7 	bl	802950c <iprintf>
      continue;
 801839e:	e003      	b.n	80183a8 <tcpip_thread+0x4c>
    }
    tcpip_thread_handle_msg(msg);
 80183a0:	68fb      	ldr	r3, [r7, #12]
 80183a2:	4618      	mov	r0, r3
 80183a4:	f000 f80e 	bl	80183c4 <tcpip_thread_handle_msg>
    TCPIP_MBOX_FETCH(&tcpip_mbox, (void **)&msg);
 80183a8:	e7ea      	b.n	8018380 <tcpip_thread+0x24>
 80183aa:	bf00      	nop
 80183ac:	2402348c 	.word	0x2402348c
 80183b0:	24023490 	.word	0x24023490
 80183b4:	24023494 	.word	0x24023494
 80183b8:	0802d530 	.word	0x0802d530
 80183bc:	0802d560 	.word	0x0802d560
 80183c0:	0802d580 	.word	0x0802d580

080183c4 <tcpip_thread_handle_msg>:
/* Handle a single tcpip_msg
 * This is in its own function for access by tests only.
 */
static void
tcpip_thread_handle_msg(struct tcpip_msg *msg)
{
 80183c4:	b580      	push	{r7, lr}
 80183c6:	b082      	sub	sp, #8
 80183c8:	af00      	add	r7, sp, #0
 80183ca:	6078      	str	r0, [r7, #4]
  switch (msg->type) {
 80183cc:	687b      	ldr	r3, [r7, #4]
 80183ce:	781b      	ldrb	r3, [r3, #0]
 80183d0:	2b02      	cmp	r3, #2
 80183d2:	d026      	beq.n	8018422 <tcpip_thread_handle_msg+0x5e>
 80183d4:	2b02      	cmp	r3, #2
 80183d6:	dc2b      	bgt.n	8018430 <tcpip_thread_handle_msg+0x6c>
 80183d8:	2b00      	cmp	r3, #0
 80183da:	d002      	beq.n	80183e2 <tcpip_thread_handle_msg+0x1e>
 80183dc:	2b01      	cmp	r3, #1
 80183de:	d015      	beq.n	801840c <tcpip_thread_handle_msg+0x48>
 80183e0:	e026      	b.n	8018430 <tcpip_thread_handle_msg+0x6c>
#endif /* !LWIP_TCPIP_CORE_LOCKING */

#if !LWIP_TCPIP_CORE_LOCKING_INPUT
    case TCPIP_MSG_INPKT:
      LWIP_DEBUGF(TCPIP_DEBUG, ("tcpip_thread: PACKET %p\n", (void *)msg));
      if (msg->msg.inp.input_fn(msg->msg.inp.p, msg->msg.inp.netif) != ERR_OK) {
 80183e2:	687b      	ldr	r3, [r7, #4]
 80183e4:	68db      	ldr	r3, [r3, #12]
 80183e6:	687a      	ldr	r2, [r7, #4]
 80183e8:	6850      	ldr	r0, [r2, #4]
 80183ea:	687a      	ldr	r2, [r7, #4]
 80183ec:	6892      	ldr	r2, [r2, #8]
 80183ee:	4611      	mov	r1, r2
 80183f0:	4798      	blx	r3
 80183f2:	4603      	mov	r3, r0
 80183f4:	2b00      	cmp	r3, #0
 80183f6:	d004      	beq.n	8018402 <tcpip_thread_handle_msg+0x3e>
        pbuf_free(msg->msg.inp.p);
 80183f8:	687b      	ldr	r3, [r7, #4]
 80183fa:	685b      	ldr	r3, [r3, #4]
 80183fc:	4618      	mov	r0, r3
 80183fe:	f001 fe0d 	bl	801a01c <pbuf_free>
      }
      memp_free(MEMP_TCPIP_MSG_INPKT, msg);
 8018402:	6879      	ldr	r1, [r7, #4]
 8018404:	2009      	movs	r0, #9
 8018406:	f000 ff1b 	bl	8019240 <memp_free>
      break;
 801840a:	e018      	b.n	801843e <tcpip_thread_handle_msg+0x7a>
      break;
#endif /* LWIP_TCPIP_TIMEOUT && LWIP_TIMERS */

    case TCPIP_MSG_CALLBACK:
      LWIP_DEBUGF(TCPIP_DEBUG, ("tcpip_thread: CALLBACK %p\n", (void *)msg));
      msg->msg.cb.function(msg->msg.cb.ctx);
 801840c:	687b      	ldr	r3, [r7, #4]
 801840e:	685b      	ldr	r3, [r3, #4]
 8018410:	687a      	ldr	r2, [r7, #4]
 8018412:	6892      	ldr	r2, [r2, #8]
 8018414:	4610      	mov	r0, r2
 8018416:	4798      	blx	r3
      memp_free(MEMP_TCPIP_MSG_API, msg);
 8018418:	6879      	ldr	r1, [r7, #4]
 801841a:	2008      	movs	r0, #8
 801841c:	f000 ff10 	bl	8019240 <memp_free>
      break;
 8018420:	e00d      	b.n	801843e <tcpip_thread_handle_msg+0x7a>

    case TCPIP_MSG_CALLBACK_STATIC:
      LWIP_DEBUGF(TCPIP_DEBUG, ("tcpip_thread: CALLBACK_STATIC %p\n", (void *)msg));
      msg->msg.cb.function(msg->msg.cb.ctx);
 8018422:	687b      	ldr	r3, [r7, #4]
 8018424:	685b      	ldr	r3, [r3, #4]
 8018426:	687a      	ldr	r2, [r7, #4]
 8018428:	6892      	ldr	r2, [r2, #8]
 801842a:	4610      	mov	r0, r2
 801842c:	4798      	blx	r3
      break;
 801842e:	e006      	b.n	801843e <tcpip_thread_handle_msg+0x7a>

    default:
      LWIP_DEBUGF(TCPIP_DEBUG, ("tcpip_thread: invalid message: %d\n", msg->type));
      LWIP_ASSERT("tcpip_thread: invalid message", 0);
 8018430:	4b05      	ldr	r3, [pc, #20]	@ (8018448 <tcpip_thread_handle_msg+0x84>)
 8018432:	22cf      	movs	r2, #207	@ 0xcf
 8018434:	4905      	ldr	r1, [pc, #20]	@ (801844c <tcpip_thread_handle_msg+0x88>)
 8018436:	4806      	ldr	r0, [pc, #24]	@ (8018450 <tcpip_thread_handle_msg+0x8c>)
 8018438:	f011 f868 	bl	802950c <iprintf>
      break;
 801843c:	bf00      	nop
  }
}
 801843e:	bf00      	nop
 8018440:	3708      	adds	r7, #8
 8018442:	46bd      	mov	sp, r7
 8018444:	bd80      	pop	{r7, pc}
 8018446:	bf00      	nop
 8018448:	0802d530 	.word	0x0802d530
 801844c:	0802d560 	.word	0x0802d560
 8018450:	0802d580 	.word	0x0802d580

08018454 <tcpip_inpkt>:
 * @param inp the network interface on which the packet was received
 * @param input_fn input function to call
 */
err_t
tcpip_inpkt(struct pbuf *p, struct netif *inp, netif_input_fn input_fn)
{
 8018454:	b580      	push	{r7, lr}
 8018456:	b086      	sub	sp, #24
 8018458:	af00      	add	r7, sp, #0
 801845a:	60f8      	str	r0, [r7, #12]
 801845c:	60b9      	str	r1, [r7, #8]
 801845e:	607a      	str	r2, [r7, #4]
  UNLOCK_TCPIP_CORE();
  return ret;
#else /* LWIP_TCPIP_CORE_LOCKING_INPUT */
  struct tcpip_msg *msg;

  LWIP_ASSERT("Invalid mbox", sys_mbox_valid_val(tcpip_mbox));
 8018460:	481a      	ldr	r0, [pc, #104]	@ (80184cc <tcpip_inpkt+0x78>)
 8018462:	f00d fcb3 	bl	8025dcc <sys_mbox_valid>
 8018466:	4603      	mov	r3, r0
 8018468:	2b00      	cmp	r3, #0
 801846a:	d105      	bne.n	8018478 <tcpip_inpkt+0x24>
 801846c:	4b18      	ldr	r3, [pc, #96]	@ (80184d0 <tcpip_inpkt+0x7c>)
 801846e:	22fc      	movs	r2, #252	@ 0xfc
 8018470:	4918      	ldr	r1, [pc, #96]	@ (80184d4 <tcpip_inpkt+0x80>)
 8018472:	4819      	ldr	r0, [pc, #100]	@ (80184d8 <tcpip_inpkt+0x84>)
 8018474:	f011 f84a 	bl	802950c <iprintf>

  msg = (struct tcpip_msg *)memp_malloc(MEMP_TCPIP_MSG_INPKT);
 8018478:	2009      	movs	r0, #9
 801847a:	f000 fe6b 	bl	8019154 <memp_malloc>
 801847e:	6178      	str	r0, [r7, #20]
  if (msg == NULL) {
 8018480:	697b      	ldr	r3, [r7, #20]
 8018482:	2b00      	cmp	r3, #0
 8018484:	d102      	bne.n	801848c <tcpip_inpkt+0x38>
    return ERR_MEM;
 8018486:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 801848a:	e01a      	b.n	80184c2 <tcpip_inpkt+0x6e>
  }

  msg->type = TCPIP_MSG_INPKT;
 801848c:	697b      	ldr	r3, [r7, #20]
 801848e:	2200      	movs	r2, #0
 8018490:	701a      	strb	r2, [r3, #0]
  msg->msg.inp.p = p;
 8018492:	697b      	ldr	r3, [r7, #20]
 8018494:	68fa      	ldr	r2, [r7, #12]
 8018496:	605a      	str	r2, [r3, #4]
  msg->msg.inp.netif = inp;
 8018498:	697b      	ldr	r3, [r7, #20]
 801849a:	68ba      	ldr	r2, [r7, #8]
 801849c:	609a      	str	r2, [r3, #8]
  msg->msg.inp.input_fn = input_fn;
 801849e:	697b      	ldr	r3, [r7, #20]
 80184a0:	687a      	ldr	r2, [r7, #4]
 80184a2:	60da      	str	r2, [r3, #12]
  if (sys_mbox_trypost(&tcpip_mbox, msg) != ERR_OK) {
 80184a4:	6979      	ldr	r1, [r7, #20]
 80184a6:	4809      	ldr	r0, [pc, #36]	@ (80184cc <tcpip_inpkt+0x78>)
 80184a8:	f00d fc2e 	bl	8025d08 <sys_mbox_trypost>
 80184ac:	4603      	mov	r3, r0
 80184ae:	2b00      	cmp	r3, #0
 80184b0:	d006      	beq.n	80184c0 <tcpip_inpkt+0x6c>
    memp_free(MEMP_TCPIP_MSG_INPKT, msg);
 80184b2:	6979      	ldr	r1, [r7, #20]
 80184b4:	2009      	movs	r0, #9
 80184b6:	f000 fec3 	bl	8019240 <memp_free>
    return ERR_MEM;
 80184ba:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80184be:	e000      	b.n	80184c2 <tcpip_inpkt+0x6e>
  }
  return ERR_OK;
 80184c0:	2300      	movs	r3, #0
#endif /* LWIP_TCPIP_CORE_LOCKING_INPUT */
}
 80184c2:	4618      	mov	r0, r3
 80184c4:	3718      	adds	r7, #24
 80184c6:	46bd      	mov	sp, r7
 80184c8:	bd80      	pop	{r7, pc}
 80184ca:	bf00      	nop
 80184cc:	24023494 	.word	0x24023494
 80184d0:	0802d530 	.word	0x0802d530
 80184d4:	0802d5a8 	.word	0x0802d5a8
 80184d8:	0802d580 	.word	0x0802d580

080184dc <tcpip_input>:
 *          NETIF_FLAG_ETHERNET flags)
 * @param inp the network interface on which the packet was received
 */
err_t
tcpip_input(struct pbuf *p, struct netif *inp)
{
 80184dc:	b580      	push	{r7, lr}
 80184de:	b082      	sub	sp, #8
 80184e0:	af00      	add	r7, sp, #0
 80184e2:	6078      	str	r0, [r7, #4]
 80184e4:	6039      	str	r1, [r7, #0]
#if LWIP_ETHERNET
  if (inp->flags & (NETIF_FLAG_ETHARP | NETIF_FLAG_ETHERNET)) {
 80184e6:	683b      	ldr	r3, [r7, #0]
 80184e8:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 80184ec:	f003 0318 	and.w	r3, r3, #24
 80184f0:	2b00      	cmp	r3, #0
 80184f2:	d006      	beq.n	8018502 <tcpip_input+0x26>
    return tcpip_inpkt(p, inp, ethernet_input);
 80184f4:	4a08      	ldr	r2, [pc, #32]	@ (8018518 <tcpip_input+0x3c>)
 80184f6:	6839      	ldr	r1, [r7, #0]
 80184f8:	6878      	ldr	r0, [r7, #4]
 80184fa:	f7ff ffab 	bl	8018454 <tcpip_inpkt>
 80184fe:	4603      	mov	r3, r0
 8018500:	e005      	b.n	801850e <tcpip_input+0x32>
  } else
#endif /* LWIP_ETHERNET */
    return tcpip_inpkt(p, inp, ip_input);
 8018502:	4a06      	ldr	r2, [pc, #24]	@ (801851c <tcpip_input+0x40>)
 8018504:	6839      	ldr	r1, [r7, #0]
 8018506:	6878      	ldr	r0, [r7, #4]
 8018508:	f7ff ffa4 	bl	8018454 <tcpip_inpkt>
 801850c:	4603      	mov	r3, r0
}
 801850e:	4618      	mov	r0, r3
 8018510:	3708      	adds	r7, #8
 8018512:	46bd      	mov	sp, r7
 8018514:	bd80      	pop	{r7, pc}
 8018516:	bf00      	nop
 8018518:	08025afd 	.word	0x08025afd
 801851c:	08024625 	.word	0x08024625

08018520 <tcpip_try_callback>:
 *
 * @see tcpip_callback
 */
err_t
tcpip_try_callback(tcpip_callback_fn function, void *ctx)
{
 8018520:	b580      	push	{r7, lr}
 8018522:	b084      	sub	sp, #16
 8018524:	af00      	add	r7, sp, #0
 8018526:	6078      	str	r0, [r7, #4]
 8018528:	6039      	str	r1, [r7, #0]
  struct tcpip_msg *msg;

  LWIP_ASSERT("Invalid mbox", sys_mbox_valid_val(tcpip_mbox));
 801852a:	4819      	ldr	r0, [pc, #100]	@ (8018590 <tcpip_try_callback+0x70>)
 801852c:	f00d fc4e 	bl	8025dcc <sys_mbox_valid>
 8018530:	4603      	mov	r3, r0
 8018532:	2b00      	cmp	r3, #0
 8018534:	d106      	bne.n	8018544 <tcpip_try_callback+0x24>
 8018536:	4b17      	ldr	r3, [pc, #92]	@ (8018594 <tcpip_try_callback+0x74>)
 8018538:	f240 125d 	movw	r2, #349	@ 0x15d
 801853c:	4916      	ldr	r1, [pc, #88]	@ (8018598 <tcpip_try_callback+0x78>)
 801853e:	4817      	ldr	r0, [pc, #92]	@ (801859c <tcpip_try_callback+0x7c>)
 8018540:	f010 ffe4 	bl	802950c <iprintf>

  msg = (struct tcpip_msg *)memp_malloc(MEMP_TCPIP_MSG_API);
 8018544:	2008      	movs	r0, #8
 8018546:	f000 fe05 	bl	8019154 <memp_malloc>
 801854a:	60f8      	str	r0, [r7, #12]
  if (msg == NULL) {
 801854c:	68fb      	ldr	r3, [r7, #12]
 801854e:	2b00      	cmp	r3, #0
 8018550:	d102      	bne.n	8018558 <tcpip_try_callback+0x38>
    return ERR_MEM;
 8018552:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8018556:	e017      	b.n	8018588 <tcpip_try_callback+0x68>
  }

  msg->type = TCPIP_MSG_CALLBACK;
 8018558:	68fb      	ldr	r3, [r7, #12]
 801855a:	2201      	movs	r2, #1
 801855c:	701a      	strb	r2, [r3, #0]
  msg->msg.cb.function = function;
 801855e:	68fb      	ldr	r3, [r7, #12]
 8018560:	687a      	ldr	r2, [r7, #4]
 8018562:	605a      	str	r2, [r3, #4]
  msg->msg.cb.ctx = ctx;
 8018564:	68fb      	ldr	r3, [r7, #12]
 8018566:	683a      	ldr	r2, [r7, #0]
 8018568:	609a      	str	r2, [r3, #8]

  if (sys_mbox_trypost(&tcpip_mbox, msg) != ERR_OK) {
 801856a:	68f9      	ldr	r1, [r7, #12]
 801856c:	4808      	ldr	r0, [pc, #32]	@ (8018590 <tcpip_try_callback+0x70>)
 801856e:	f00d fbcb 	bl	8025d08 <sys_mbox_trypost>
 8018572:	4603      	mov	r3, r0
 8018574:	2b00      	cmp	r3, #0
 8018576:	d006      	beq.n	8018586 <tcpip_try_callback+0x66>
    memp_free(MEMP_TCPIP_MSG_API, msg);
 8018578:	68f9      	ldr	r1, [r7, #12]
 801857a:	2008      	movs	r0, #8
 801857c:	f000 fe60 	bl	8019240 <memp_free>
    return ERR_MEM;
 8018580:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8018584:	e000      	b.n	8018588 <tcpip_try_callback+0x68>
  }
  return ERR_OK;
 8018586:	2300      	movs	r3, #0
}
 8018588:	4618      	mov	r0, r3
 801858a:	3710      	adds	r7, #16
 801858c:	46bd      	mov	sp, r7
 801858e:	bd80      	pop	{r7, pc}
 8018590:	24023494 	.word	0x24023494
 8018594:	0802d530 	.word	0x0802d530
 8018598:	0802d5a8 	.word	0x0802d5a8
 801859c:	0802d580 	.word	0x0802d580

080185a0 <tcpip_send_msg_wait_sem>:
 * @param sem semaphore to wait on
 * @return ERR_OK if the function was called, another err_t if not
 */
err_t
tcpip_send_msg_wait_sem(tcpip_callback_fn fn, void *apimsg, sys_sem_t *sem)
{
 80185a0:	b580      	push	{r7, lr}
 80185a2:	b084      	sub	sp, #16
 80185a4:	af00      	add	r7, sp, #0
 80185a6:	60f8      	str	r0, [r7, #12]
 80185a8:	60b9      	str	r1, [r7, #8]
 80185aa:	607a      	str	r2, [r7, #4]
#if LWIP_TCPIP_CORE_LOCKING
  LWIP_UNUSED_ARG(sem);
  LOCK_TCPIP_CORE();
 80185ac:	f7f7 fd42 	bl	8010034 <sys_lock_tcpip_core>
  fn(apimsg);
 80185b0:	68fb      	ldr	r3, [r7, #12]
 80185b2:	68b8      	ldr	r0, [r7, #8]
 80185b4:	4798      	blx	r3
  UNLOCK_TCPIP_CORE();
 80185b6:	f7f7 fd4d 	bl	8010054 <sys_unlock_tcpip_core>
  return ERR_OK;
 80185ba:	2300      	movs	r3, #0
  sys_mbox_post(&tcpip_mbox, &TCPIP_MSG_VAR_REF(msg));
  sys_arch_sem_wait(sem, 0);
  TCPIP_MSG_VAR_FREE(msg);
  return ERR_OK;
#endif /* LWIP_TCPIP_CORE_LOCKING */
}
 80185bc:	4618      	mov	r0, r3
 80185be:	3710      	adds	r7, #16
 80185c0:	46bd      	mov	sp, r7
 80185c2:	bd80      	pop	{r7, pc}

080185c4 <tcpip_init>:
 * @param initfunc a function to call when tcpip_thread is running and finished initializing
 * @param arg argument to pass to initfunc
 */
void
tcpip_init(tcpip_init_done_fn initfunc, void *arg)
{
 80185c4:	b580      	push	{r7, lr}
 80185c6:	b084      	sub	sp, #16
 80185c8:	af02      	add	r7, sp, #8
 80185ca:	6078      	str	r0, [r7, #4]
 80185cc:	6039      	str	r1, [r7, #0]
  lwip_init();
 80185ce:	f000 f92d 	bl	801882c <lwip_init>

  tcpip_init_done = initfunc;
 80185d2:	4a17      	ldr	r2, [pc, #92]	@ (8018630 <tcpip_init+0x6c>)
 80185d4:	687b      	ldr	r3, [r7, #4]
 80185d6:	6013      	str	r3, [r2, #0]
  tcpip_init_done_arg = arg;
 80185d8:	4a16      	ldr	r2, [pc, #88]	@ (8018634 <tcpip_init+0x70>)
 80185da:	683b      	ldr	r3, [r7, #0]
 80185dc:	6013      	str	r3, [r2, #0]
  if (sys_mbox_new(&tcpip_mbox, TCPIP_MBOX_SIZE) != ERR_OK) {
 80185de:	2106      	movs	r1, #6
 80185e0:	4815      	ldr	r0, [pc, #84]	@ (8018638 <tcpip_init+0x74>)
 80185e2:	f00d fb65 	bl	8025cb0 <sys_mbox_new>
 80185e6:	4603      	mov	r3, r0
 80185e8:	2b00      	cmp	r3, #0
 80185ea:	d006      	beq.n	80185fa <tcpip_init+0x36>
    LWIP_ASSERT("failed to create tcpip_thread mbox", 0);
 80185ec:	4b13      	ldr	r3, [pc, #76]	@ (801863c <tcpip_init+0x78>)
 80185ee:	f240 2261 	movw	r2, #609	@ 0x261
 80185f2:	4913      	ldr	r1, [pc, #76]	@ (8018640 <tcpip_init+0x7c>)
 80185f4:	4813      	ldr	r0, [pc, #76]	@ (8018644 <tcpip_init+0x80>)
 80185f6:	f010 ff89 	bl	802950c <iprintf>
  }
#if LWIP_TCPIP_CORE_LOCKING
  if (sys_mutex_new(&lock_tcpip_core) != ERR_OK) {
 80185fa:	4813      	ldr	r0, [pc, #76]	@ (8018648 <tcpip_init+0x84>)
 80185fc:	f00d fc9e 	bl	8025f3c <sys_mutex_new>
 8018600:	4603      	mov	r3, r0
 8018602:	2b00      	cmp	r3, #0
 8018604:	d006      	beq.n	8018614 <tcpip_init+0x50>
    LWIP_ASSERT("failed to create lock_tcpip_core", 0);
 8018606:	4b0d      	ldr	r3, [pc, #52]	@ (801863c <tcpip_init+0x78>)
 8018608:	f240 2265 	movw	r2, #613	@ 0x265
 801860c:	490f      	ldr	r1, [pc, #60]	@ (801864c <tcpip_init+0x88>)
 801860e:	480d      	ldr	r0, [pc, #52]	@ (8018644 <tcpip_init+0x80>)
 8018610:	f010 ff7c 	bl	802950c <iprintf>
  }
#endif /* LWIP_TCPIP_CORE_LOCKING */

  sys_thread_new(TCPIP_THREAD_NAME, tcpip_thread, NULL, TCPIP_THREAD_STACKSIZE, TCPIP_THREAD_PRIO);
 8018614:	2330      	movs	r3, #48	@ 0x30
 8018616:	9300      	str	r3, [sp, #0]
 8018618:	f44f 5380 	mov.w	r3, #4096	@ 0x1000
 801861c:	2200      	movs	r2, #0
 801861e:	490c      	ldr	r1, [pc, #48]	@ (8018650 <tcpip_init+0x8c>)
 8018620:	480c      	ldr	r0, [pc, #48]	@ (8018654 <tcpip_init+0x90>)
 8018622:	f00d fcbd 	bl	8025fa0 <sys_thread_new>
}
 8018626:	bf00      	nop
 8018628:	3708      	adds	r7, #8
 801862a:	46bd      	mov	sp, r7
 801862c:	bd80      	pop	{r7, pc}
 801862e:	bf00      	nop
 8018630:	2402348c 	.word	0x2402348c
 8018634:	24023490 	.word	0x24023490
 8018638:	24023494 	.word	0x24023494
 801863c:	0802d530 	.word	0x0802d530
 8018640:	0802d5b8 	.word	0x0802d5b8
 8018644:	0802d580 	.word	0x0802d580
 8018648:	24023498 	.word	0x24023498
 801864c:	0802d5dc 	.word	0x0802d5dc
 8018650:	0801835d 	.word	0x0801835d
 8018654:	0802d600 	.word	0x0802d600

08018658 <lwip_htons>:
 * @param n u16_t in host byte order
 * @return n in network byte order
 */
u16_t
lwip_htons(u16_t n)
{
 8018658:	b480      	push	{r7}
 801865a:	b083      	sub	sp, #12
 801865c:	af00      	add	r7, sp, #0
 801865e:	4603      	mov	r3, r0
 8018660:	80fb      	strh	r3, [r7, #6]
  return PP_HTONS(n);
 8018662:	88fb      	ldrh	r3, [r7, #6]
 8018664:	021b      	lsls	r3, r3, #8
 8018666:	b21a      	sxth	r2, r3
 8018668:	88fb      	ldrh	r3, [r7, #6]
 801866a:	0a1b      	lsrs	r3, r3, #8
 801866c:	b29b      	uxth	r3, r3
 801866e:	b21b      	sxth	r3, r3
 8018670:	4313      	orrs	r3, r2
 8018672:	b21b      	sxth	r3, r3
 8018674:	b29b      	uxth	r3, r3
}
 8018676:	4618      	mov	r0, r3
 8018678:	370c      	adds	r7, #12
 801867a:	46bd      	mov	sp, r7
 801867c:	f85d 7b04 	ldr.w	r7, [sp], #4
 8018680:	4770      	bx	lr

08018682 <lwip_htonl>:
 * @param n u32_t in host byte order
 * @return n in network byte order
 */
u32_t
lwip_htonl(u32_t n)
{
 8018682:	b480      	push	{r7}
 8018684:	b083      	sub	sp, #12
 8018686:	af00      	add	r7, sp, #0
 8018688:	6078      	str	r0, [r7, #4]
  return PP_HTONL(n);
 801868a:	687b      	ldr	r3, [r7, #4]
 801868c:	061a      	lsls	r2, r3, #24
 801868e:	687b      	ldr	r3, [r7, #4]
 8018690:	021b      	lsls	r3, r3, #8
 8018692:	f403 037f 	and.w	r3, r3, #16711680	@ 0xff0000
 8018696:	431a      	orrs	r2, r3
 8018698:	687b      	ldr	r3, [r7, #4]
 801869a:	0a1b      	lsrs	r3, r3, #8
 801869c:	f403 437f 	and.w	r3, r3, #65280	@ 0xff00
 80186a0:	431a      	orrs	r2, r3
 80186a2:	687b      	ldr	r3, [r7, #4]
 80186a4:	0e1b      	lsrs	r3, r3, #24
 80186a6:	4313      	orrs	r3, r2
}
 80186a8:	4618      	mov	r0, r3
 80186aa:	370c      	adds	r7, #12
 80186ac:	46bd      	mov	sp, r7
 80186ae:	f85d 7b04 	ldr.w	r7, [sp], #4
 80186b2:	4770      	bx	lr

080186b4 <lwip_standard_chksum>:
 * @param len length of data to be summed
 * @return host order (!) lwip checksum (non-inverted Internet sum)
 */
u16_t
lwip_standard_chksum(const void *dataptr, int len)
{
 80186b4:	b480      	push	{r7}
 80186b6:	b089      	sub	sp, #36	@ 0x24
 80186b8:	af00      	add	r7, sp, #0
 80186ba:	6078      	str	r0, [r7, #4]
 80186bc:	6039      	str	r1, [r7, #0]
  const u8_t *pb = (const u8_t *)dataptr;
 80186be:	687b      	ldr	r3, [r7, #4]
 80186c0:	61fb      	str	r3, [r7, #28]
  const u16_t *ps;
  u16_t t = 0;
 80186c2:	2300      	movs	r3, #0
 80186c4:	81fb      	strh	r3, [r7, #14]
  u32_t sum = 0;
 80186c6:	2300      	movs	r3, #0
 80186c8:	617b      	str	r3, [r7, #20]
  int odd = ((mem_ptr_t)pb & 1);
 80186ca:	69fb      	ldr	r3, [r7, #28]
 80186cc:	f003 0301 	and.w	r3, r3, #1
 80186d0:	613b      	str	r3, [r7, #16]

  /* Get aligned to u16_t */
  if (odd && len > 0) {
 80186d2:	693b      	ldr	r3, [r7, #16]
 80186d4:	2b00      	cmp	r3, #0
 80186d6:	d00d      	beq.n	80186f4 <lwip_standard_chksum+0x40>
 80186d8:	683b      	ldr	r3, [r7, #0]
 80186da:	2b00      	cmp	r3, #0
 80186dc:	dd0a      	ble.n	80186f4 <lwip_standard_chksum+0x40>
    ((u8_t *)&t)[1] = *pb++;
 80186de:	69fa      	ldr	r2, [r7, #28]
 80186e0:	1c53      	adds	r3, r2, #1
 80186e2:	61fb      	str	r3, [r7, #28]
 80186e4:	f107 030e 	add.w	r3, r7, #14
 80186e8:	3301      	adds	r3, #1
 80186ea:	7812      	ldrb	r2, [r2, #0]
 80186ec:	701a      	strb	r2, [r3, #0]
    len--;
 80186ee:	683b      	ldr	r3, [r7, #0]
 80186f0:	3b01      	subs	r3, #1
 80186f2:	603b      	str	r3, [r7, #0]
  }

  /* Add the bulk of the data */
  ps = (const u16_t *)(const void *)pb;
 80186f4:	69fb      	ldr	r3, [r7, #28]
 80186f6:	61bb      	str	r3, [r7, #24]
  while (len > 1) {
 80186f8:	e00a      	b.n	8018710 <lwip_standard_chksum+0x5c>
    sum += *ps++;
 80186fa:	69bb      	ldr	r3, [r7, #24]
 80186fc:	1c9a      	adds	r2, r3, #2
 80186fe:	61ba      	str	r2, [r7, #24]
 8018700:	881b      	ldrh	r3, [r3, #0]
 8018702:	461a      	mov	r2, r3
 8018704:	697b      	ldr	r3, [r7, #20]
 8018706:	4413      	add	r3, r2
 8018708:	617b      	str	r3, [r7, #20]
    len -= 2;
 801870a:	683b      	ldr	r3, [r7, #0]
 801870c:	3b02      	subs	r3, #2
 801870e:	603b      	str	r3, [r7, #0]
  while (len > 1) {
 8018710:	683b      	ldr	r3, [r7, #0]
 8018712:	2b01      	cmp	r3, #1
 8018714:	dcf1      	bgt.n	80186fa <lwip_standard_chksum+0x46>
  }

  /* Consume left-over byte, if any */
  if (len > 0) {
 8018716:	683b      	ldr	r3, [r7, #0]
 8018718:	2b00      	cmp	r3, #0
 801871a:	dd04      	ble.n	8018726 <lwip_standard_chksum+0x72>
    ((u8_t *)&t)[0] = *(const u8_t *)ps;
 801871c:	f107 030e 	add.w	r3, r7, #14
 8018720:	69ba      	ldr	r2, [r7, #24]
 8018722:	7812      	ldrb	r2, [r2, #0]
 8018724:	701a      	strb	r2, [r3, #0]
  }

  /* Add end bytes */
  sum += t;
 8018726:	89fb      	ldrh	r3, [r7, #14]
 8018728:	461a      	mov	r2, r3
 801872a:	697b      	ldr	r3, [r7, #20]
 801872c:	4413      	add	r3, r2
 801872e:	617b      	str	r3, [r7, #20]

  /* Fold 32-bit sum to 16 bits
     calling this twice is probably faster than if statements... */
  sum = FOLD_U32T(sum);
 8018730:	697b      	ldr	r3, [r7, #20]
 8018732:	0c1a      	lsrs	r2, r3, #16
 8018734:	697b      	ldr	r3, [r7, #20]
 8018736:	b29b      	uxth	r3, r3
 8018738:	4413      	add	r3, r2
 801873a:	617b      	str	r3, [r7, #20]
  sum = FOLD_U32T(sum);
 801873c:	697b      	ldr	r3, [r7, #20]
 801873e:	0c1a      	lsrs	r2, r3, #16
 8018740:	697b      	ldr	r3, [r7, #20]
 8018742:	b29b      	uxth	r3, r3
 8018744:	4413      	add	r3, r2
 8018746:	617b      	str	r3, [r7, #20]

  /* Swap if alignment was odd */
  if (odd) {
 8018748:	693b      	ldr	r3, [r7, #16]
 801874a:	2b00      	cmp	r3, #0
 801874c:	d007      	beq.n	801875e <lwip_standard_chksum+0xaa>
    sum = SWAP_BYTES_IN_WORD(sum);
 801874e:	697b      	ldr	r3, [r7, #20]
 8018750:	021b      	lsls	r3, r3, #8
 8018752:	b29a      	uxth	r2, r3
 8018754:	697b      	ldr	r3, [r7, #20]
 8018756:	0a1b      	lsrs	r3, r3, #8
 8018758:	b2db      	uxtb	r3, r3
 801875a:	4313      	orrs	r3, r2
 801875c:	617b      	str	r3, [r7, #20]
  }

  return (u16_t)sum;
 801875e:	697b      	ldr	r3, [r7, #20]
 8018760:	b29b      	uxth	r3, r3
}
 8018762:	4618      	mov	r0, r3
 8018764:	3724      	adds	r7, #36	@ 0x24
 8018766:	46bd      	mov	sp, r7
 8018768:	f85d 7b04 	ldr.w	r7, [sp], #4
 801876c:	4770      	bx	lr

0801876e <inet_chksum>:
 * @return checksum (as u16_t) to be saved directly in the protocol header
 */

u16_t
inet_chksum(const void *dataptr, u16_t len)
{
 801876e:	b580      	push	{r7, lr}
 8018770:	b082      	sub	sp, #8
 8018772:	af00      	add	r7, sp, #0
 8018774:	6078      	str	r0, [r7, #4]
 8018776:	460b      	mov	r3, r1
 8018778:	807b      	strh	r3, [r7, #2]
  return (u16_t)~(unsigned int)LWIP_CHKSUM(dataptr, len);
 801877a:	887b      	ldrh	r3, [r7, #2]
 801877c:	4619      	mov	r1, r3
 801877e:	6878      	ldr	r0, [r7, #4]
 8018780:	f7ff ff98 	bl	80186b4 <lwip_standard_chksum>
 8018784:	4603      	mov	r3, r0
 8018786:	43db      	mvns	r3, r3
 8018788:	b29b      	uxth	r3, r3
}
 801878a:	4618      	mov	r0, r3
 801878c:	3708      	adds	r7, #8
 801878e:	46bd      	mov	sp, r7
 8018790:	bd80      	pop	{r7, pc}

08018792 <inet_chksum_pbuf>:
 * @param p pbuf chain over that the checksum should be calculated
 * @return checksum (as u16_t) to be saved directly in the protocol header
 */
u16_t
inet_chksum_pbuf(struct pbuf *p)
{
 8018792:	b580      	push	{r7, lr}
 8018794:	b086      	sub	sp, #24
 8018796:	af00      	add	r7, sp, #0
 8018798:	6078      	str	r0, [r7, #4]
  u32_t acc;
  struct pbuf *q;
  int swapped = 0;
 801879a:	2300      	movs	r3, #0
 801879c:	60fb      	str	r3, [r7, #12]

  acc = 0;
 801879e:	2300      	movs	r3, #0
 80187a0:	617b      	str	r3, [r7, #20]
  for (q = p; q != NULL; q = q->next) {
 80187a2:	687b      	ldr	r3, [r7, #4]
 80187a4:	613b      	str	r3, [r7, #16]
 80187a6:	e02b      	b.n	8018800 <inet_chksum_pbuf+0x6e>
    acc += LWIP_CHKSUM(q->payload, q->len);
 80187a8:	693b      	ldr	r3, [r7, #16]
 80187aa:	685a      	ldr	r2, [r3, #4]
 80187ac:	693b      	ldr	r3, [r7, #16]
 80187ae:	895b      	ldrh	r3, [r3, #10]
 80187b0:	4619      	mov	r1, r3
 80187b2:	4610      	mov	r0, r2
 80187b4:	f7ff ff7e 	bl	80186b4 <lwip_standard_chksum>
 80187b8:	4603      	mov	r3, r0
 80187ba:	461a      	mov	r2, r3
 80187bc:	697b      	ldr	r3, [r7, #20]
 80187be:	4413      	add	r3, r2
 80187c0:	617b      	str	r3, [r7, #20]
    acc = FOLD_U32T(acc);
 80187c2:	697b      	ldr	r3, [r7, #20]
 80187c4:	0c1a      	lsrs	r2, r3, #16
 80187c6:	697b      	ldr	r3, [r7, #20]
 80187c8:	b29b      	uxth	r3, r3
 80187ca:	4413      	add	r3, r2
 80187cc:	617b      	str	r3, [r7, #20]
    if (q->len % 2 != 0) {
 80187ce:	693b      	ldr	r3, [r7, #16]
 80187d0:	895b      	ldrh	r3, [r3, #10]
 80187d2:	f003 0301 	and.w	r3, r3, #1
 80187d6:	b29b      	uxth	r3, r3
 80187d8:	2b00      	cmp	r3, #0
 80187da:	d00e      	beq.n	80187fa <inet_chksum_pbuf+0x68>
      swapped = !swapped;
 80187dc:	68fb      	ldr	r3, [r7, #12]
 80187de:	2b00      	cmp	r3, #0
 80187e0:	bf0c      	ite	eq
 80187e2:	2301      	moveq	r3, #1
 80187e4:	2300      	movne	r3, #0
 80187e6:	b2db      	uxtb	r3, r3
 80187e8:	60fb      	str	r3, [r7, #12]
      acc = SWAP_BYTES_IN_WORD(acc);
 80187ea:	697b      	ldr	r3, [r7, #20]
 80187ec:	021b      	lsls	r3, r3, #8
 80187ee:	b29a      	uxth	r2, r3
 80187f0:	697b      	ldr	r3, [r7, #20]
 80187f2:	0a1b      	lsrs	r3, r3, #8
 80187f4:	b2db      	uxtb	r3, r3
 80187f6:	4313      	orrs	r3, r2
 80187f8:	617b      	str	r3, [r7, #20]
  for (q = p; q != NULL; q = q->next) {
 80187fa:	693b      	ldr	r3, [r7, #16]
 80187fc:	681b      	ldr	r3, [r3, #0]
 80187fe:	613b      	str	r3, [r7, #16]
 8018800:	693b      	ldr	r3, [r7, #16]
 8018802:	2b00      	cmp	r3, #0
 8018804:	d1d0      	bne.n	80187a8 <inet_chksum_pbuf+0x16>
    }
  }

  if (swapped) {
 8018806:	68fb      	ldr	r3, [r7, #12]
 8018808:	2b00      	cmp	r3, #0
 801880a:	d007      	beq.n	801881c <inet_chksum_pbuf+0x8a>
    acc = SWAP_BYTES_IN_WORD(acc);
 801880c:	697b      	ldr	r3, [r7, #20]
 801880e:	021b      	lsls	r3, r3, #8
 8018810:	b29a      	uxth	r2, r3
 8018812:	697b      	ldr	r3, [r7, #20]
 8018814:	0a1b      	lsrs	r3, r3, #8
 8018816:	b2db      	uxtb	r3, r3
 8018818:	4313      	orrs	r3, r2
 801881a:	617b      	str	r3, [r7, #20]
  }
  return (u16_t)~(acc & 0xffffUL);
 801881c:	697b      	ldr	r3, [r7, #20]
 801881e:	b29b      	uxth	r3, r3
 8018820:	43db      	mvns	r3, r3
 8018822:	b29b      	uxth	r3, r3
}
 8018824:	4618      	mov	r0, r3
 8018826:	3718      	adds	r7, #24
 8018828:	46bd      	mov	sp, r7
 801882a:	bd80      	pop	{r7, pc}

0801882c <lwip_init>:
 * Initialize all modules.
 * Use this in NO_SYS mode. Use tcpip_init() otherwise.
 */
void
lwip_init(void)
{
 801882c:	b580      	push	{r7, lr}
 801882e:	b082      	sub	sp, #8
 8018830:	af00      	add	r7, sp, #0
#ifndef LWIP_SKIP_CONST_CHECK
  int a = 0;
 8018832:	2300      	movs	r3, #0
 8018834:	607b      	str	r3, [r7, #4]
#endif

  /* Modules initialization */
  stats_init();
#if !NO_SYS
  sys_init();
 8018836:	f00d fb75 	bl	8025f24 <sys_init>
#endif /* !NO_SYS */
  mem_init();
 801883a:	f000 f8d3 	bl	80189e4 <mem_init>
  memp_init();
 801883e:	f000 fc1b 	bl	8019078 <memp_init>
  pbuf_init();
  netif_init();
 8018842:	f000 fd27 	bl	8019294 <netif_init>
#endif /* LWIP_IPV4 */
#if LWIP_RAW
  raw_init();
#endif /* LWIP_RAW */
#if LWIP_UDP
  udp_init();
 8018846:	f008 f8db 	bl	8020a00 <udp_init>
#endif /* LWIP_UDP */
#if LWIP_TCP
  tcp_init();
 801884a:	f001 fe91 	bl	801a570 <tcp_init>
#if PPP_SUPPORT
  ppp_init();
#endif

#if LWIP_TIMERS
  sys_timeouts_init();
 801884e:	f008 f817 	bl	8020880 <sys_timeouts_init>
#endif /* LWIP_TIMERS */
}
 8018852:	bf00      	nop
 8018854:	3708      	adds	r7, #8
 8018856:	46bd      	mov	sp, r7
 8018858:	bd80      	pop	{r7, pc}
	...

0801885c <ptr_to_mem>:
#define mem_overflow_check_element(mem)
#endif /* MEM_OVERFLOW_CHECK */

static struct mem *
ptr_to_mem(mem_size_t ptr)
{
 801885c:	b480      	push	{r7}
 801885e:	b083      	sub	sp, #12
 8018860:	af00      	add	r7, sp, #0
 8018862:	6078      	str	r0, [r7, #4]
  return (struct mem *)(void *)&ram[ptr];
 8018864:	4b04      	ldr	r3, [pc, #16]	@ (8018878 <ptr_to_mem+0x1c>)
 8018866:	681a      	ldr	r2, [r3, #0]
 8018868:	687b      	ldr	r3, [r7, #4]
 801886a:	4413      	add	r3, r2
}
 801886c:	4618      	mov	r0, r3
 801886e:	370c      	adds	r7, #12
 8018870:	46bd      	mov	sp, r7
 8018872:	f85d 7b04 	ldr.w	r7, [sp], #4
 8018876:	4770      	bx	lr
 8018878:	240234b4 	.word	0x240234b4

0801887c <mem_to_ptr>:

static mem_size_t
mem_to_ptr(void *mem)
{
 801887c:	b480      	push	{r7}
 801887e:	b083      	sub	sp, #12
 8018880:	af00      	add	r7, sp, #0
 8018882:	6078      	str	r0, [r7, #4]
  return (mem_size_t)((u8_t *)mem - ram);
 8018884:	4b04      	ldr	r3, [pc, #16]	@ (8018898 <mem_to_ptr+0x1c>)
 8018886:	681b      	ldr	r3, [r3, #0]
 8018888:	687a      	ldr	r2, [r7, #4]
 801888a:	1ad3      	subs	r3, r2, r3
}
 801888c:	4618      	mov	r0, r3
 801888e:	370c      	adds	r7, #12
 8018890:	46bd      	mov	sp, r7
 8018892:	f85d 7b04 	ldr.w	r7, [sp], #4
 8018896:	4770      	bx	lr
 8018898:	240234b4 	.word	0x240234b4

0801889c <plug_holes>:
 * This assumes access to the heap is protected by the calling function
 * already.
 */
static void
plug_holes(struct mem *mem)
{
 801889c:	b590      	push	{r4, r7, lr}
 801889e:	b085      	sub	sp, #20
 80188a0:	af00      	add	r7, sp, #0
 80188a2:	6078      	str	r0, [r7, #4]
  struct mem *nmem;
  struct mem *pmem;

  LWIP_ASSERT("plug_holes: mem >= ram", (u8_t *)mem >= ram);
 80188a4:	4b45      	ldr	r3, [pc, #276]	@ (80189bc <plug_holes+0x120>)
 80188a6:	681b      	ldr	r3, [r3, #0]
 80188a8:	687a      	ldr	r2, [r7, #4]
 80188aa:	429a      	cmp	r2, r3
 80188ac:	d206      	bcs.n	80188bc <plug_holes+0x20>
 80188ae:	4b44      	ldr	r3, [pc, #272]	@ (80189c0 <plug_holes+0x124>)
 80188b0:	f240 12df 	movw	r2, #479	@ 0x1df
 80188b4:	4943      	ldr	r1, [pc, #268]	@ (80189c4 <plug_holes+0x128>)
 80188b6:	4844      	ldr	r0, [pc, #272]	@ (80189c8 <plug_holes+0x12c>)
 80188b8:	f010 fe28 	bl	802950c <iprintf>
  LWIP_ASSERT("plug_holes: mem < ram_end", (u8_t *)mem < (u8_t *)ram_end);
 80188bc:	4b43      	ldr	r3, [pc, #268]	@ (80189cc <plug_holes+0x130>)
 80188be:	681b      	ldr	r3, [r3, #0]
 80188c0:	687a      	ldr	r2, [r7, #4]
 80188c2:	429a      	cmp	r2, r3
 80188c4:	d306      	bcc.n	80188d4 <plug_holes+0x38>
 80188c6:	4b3e      	ldr	r3, [pc, #248]	@ (80189c0 <plug_holes+0x124>)
 80188c8:	f44f 72f0 	mov.w	r2, #480	@ 0x1e0
 80188cc:	4940      	ldr	r1, [pc, #256]	@ (80189d0 <plug_holes+0x134>)
 80188ce:	483e      	ldr	r0, [pc, #248]	@ (80189c8 <plug_holes+0x12c>)
 80188d0:	f010 fe1c 	bl	802950c <iprintf>
  LWIP_ASSERT("plug_holes: mem->used == 0", mem->used == 0);
 80188d4:	687b      	ldr	r3, [r7, #4]
 80188d6:	7a1b      	ldrb	r3, [r3, #8]
 80188d8:	2b00      	cmp	r3, #0
 80188da:	d006      	beq.n	80188ea <plug_holes+0x4e>
 80188dc:	4b38      	ldr	r3, [pc, #224]	@ (80189c0 <plug_holes+0x124>)
 80188de:	f240 12e1 	movw	r2, #481	@ 0x1e1
 80188e2:	493c      	ldr	r1, [pc, #240]	@ (80189d4 <plug_holes+0x138>)
 80188e4:	4838      	ldr	r0, [pc, #224]	@ (80189c8 <plug_holes+0x12c>)
 80188e6:	f010 fe11 	bl	802950c <iprintf>

  /* plug hole forward */
  LWIP_ASSERT("plug_holes: mem->next <= MEM_SIZE_ALIGNED", mem->next <= MEM_SIZE_ALIGNED);
 80188ea:	687b      	ldr	r3, [r7, #4]
 80188ec:	681b      	ldr	r3, [r3, #0]
 80188ee:	4a3a      	ldr	r2, [pc, #232]	@ (80189d8 <plug_holes+0x13c>)
 80188f0:	4293      	cmp	r3, r2
 80188f2:	d906      	bls.n	8018902 <plug_holes+0x66>
 80188f4:	4b32      	ldr	r3, [pc, #200]	@ (80189c0 <plug_holes+0x124>)
 80188f6:	f44f 72f2 	mov.w	r2, #484	@ 0x1e4
 80188fa:	4938      	ldr	r1, [pc, #224]	@ (80189dc <plug_holes+0x140>)
 80188fc:	4832      	ldr	r0, [pc, #200]	@ (80189c8 <plug_holes+0x12c>)
 80188fe:	f010 fe05 	bl	802950c <iprintf>

  nmem = ptr_to_mem(mem->next);
 8018902:	687b      	ldr	r3, [r7, #4]
 8018904:	681b      	ldr	r3, [r3, #0]
 8018906:	4618      	mov	r0, r3
 8018908:	f7ff ffa8 	bl	801885c <ptr_to_mem>
 801890c:	60f8      	str	r0, [r7, #12]
  if (mem != nmem && nmem->used == 0 && (u8_t *)nmem != (u8_t *)ram_end) {
 801890e:	687a      	ldr	r2, [r7, #4]
 8018910:	68fb      	ldr	r3, [r7, #12]
 8018912:	429a      	cmp	r2, r3
 8018914:	d024      	beq.n	8018960 <plug_holes+0xc4>
 8018916:	68fb      	ldr	r3, [r7, #12]
 8018918:	7a1b      	ldrb	r3, [r3, #8]
 801891a:	2b00      	cmp	r3, #0
 801891c:	d120      	bne.n	8018960 <plug_holes+0xc4>
 801891e:	4b2b      	ldr	r3, [pc, #172]	@ (80189cc <plug_holes+0x130>)
 8018920:	681b      	ldr	r3, [r3, #0]
 8018922:	68fa      	ldr	r2, [r7, #12]
 8018924:	429a      	cmp	r2, r3
 8018926:	d01b      	beq.n	8018960 <plug_holes+0xc4>
    /* if mem->next is unused and not end of ram, combine mem and mem->next */
    if (lfree == nmem) {
 8018928:	4b2d      	ldr	r3, [pc, #180]	@ (80189e0 <plug_holes+0x144>)
 801892a:	681b      	ldr	r3, [r3, #0]
 801892c:	68fa      	ldr	r2, [r7, #12]
 801892e:	429a      	cmp	r2, r3
 8018930:	d102      	bne.n	8018938 <plug_holes+0x9c>
      lfree = mem;
 8018932:	4a2b      	ldr	r2, [pc, #172]	@ (80189e0 <plug_holes+0x144>)
 8018934:	687b      	ldr	r3, [r7, #4]
 8018936:	6013      	str	r3, [r2, #0]
    }
    mem->next = nmem->next;
 8018938:	68fb      	ldr	r3, [r7, #12]
 801893a:	681a      	ldr	r2, [r3, #0]
 801893c:	687b      	ldr	r3, [r7, #4]
 801893e:	601a      	str	r2, [r3, #0]
    if (nmem->next != MEM_SIZE_ALIGNED) {
 8018940:	68fb      	ldr	r3, [r7, #12]
 8018942:	681b      	ldr	r3, [r3, #0]
 8018944:	4a24      	ldr	r2, [pc, #144]	@ (80189d8 <plug_holes+0x13c>)
 8018946:	4293      	cmp	r3, r2
 8018948:	d00a      	beq.n	8018960 <plug_holes+0xc4>
      ptr_to_mem(nmem->next)->prev = mem_to_ptr(mem);
 801894a:	68fb      	ldr	r3, [r7, #12]
 801894c:	681b      	ldr	r3, [r3, #0]
 801894e:	4618      	mov	r0, r3
 8018950:	f7ff ff84 	bl	801885c <ptr_to_mem>
 8018954:	4604      	mov	r4, r0
 8018956:	6878      	ldr	r0, [r7, #4]
 8018958:	f7ff ff90 	bl	801887c <mem_to_ptr>
 801895c:	4603      	mov	r3, r0
 801895e:	6063      	str	r3, [r4, #4]
    }
  }

  /* plug hole backward */
  pmem = ptr_to_mem(mem->prev);
 8018960:	687b      	ldr	r3, [r7, #4]
 8018962:	685b      	ldr	r3, [r3, #4]
 8018964:	4618      	mov	r0, r3
 8018966:	f7ff ff79 	bl	801885c <ptr_to_mem>
 801896a:	60b8      	str	r0, [r7, #8]
  if (pmem != mem && pmem->used == 0) {
 801896c:	68ba      	ldr	r2, [r7, #8]
 801896e:	687b      	ldr	r3, [r7, #4]
 8018970:	429a      	cmp	r2, r3
 8018972:	d01f      	beq.n	80189b4 <plug_holes+0x118>
 8018974:	68bb      	ldr	r3, [r7, #8]
 8018976:	7a1b      	ldrb	r3, [r3, #8]
 8018978:	2b00      	cmp	r3, #0
 801897a:	d11b      	bne.n	80189b4 <plug_holes+0x118>
    /* if mem->prev is unused, combine mem and mem->prev */
    if (lfree == mem) {
 801897c:	4b18      	ldr	r3, [pc, #96]	@ (80189e0 <plug_holes+0x144>)
 801897e:	681b      	ldr	r3, [r3, #0]
 8018980:	687a      	ldr	r2, [r7, #4]
 8018982:	429a      	cmp	r2, r3
 8018984:	d102      	bne.n	801898c <plug_holes+0xf0>
      lfree = pmem;
 8018986:	4a16      	ldr	r2, [pc, #88]	@ (80189e0 <plug_holes+0x144>)
 8018988:	68bb      	ldr	r3, [r7, #8]
 801898a:	6013      	str	r3, [r2, #0]
    }
    pmem->next = mem->next;
 801898c:	687b      	ldr	r3, [r7, #4]
 801898e:	681a      	ldr	r2, [r3, #0]
 8018990:	68bb      	ldr	r3, [r7, #8]
 8018992:	601a      	str	r2, [r3, #0]
    if (mem->next != MEM_SIZE_ALIGNED) {
 8018994:	687b      	ldr	r3, [r7, #4]
 8018996:	681b      	ldr	r3, [r3, #0]
 8018998:	4a0f      	ldr	r2, [pc, #60]	@ (80189d8 <plug_holes+0x13c>)
 801899a:	4293      	cmp	r3, r2
 801899c:	d00a      	beq.n	80189b4 <plug_holes+0x118>
      ptr_to_mem(mem->next)->prev = mem_to_ptr(pmem);
 801899e:	687b      	ldr	r3, [r7, #4]
 80189a0:	681b      	ldr	r3, [r3, #0]
 80189a2:	4618      	mov	r0, r3
 80189a4:	f7ff ff5a 	bl	801885c <ptr_to_mem>
 80189a8:	4604      	mov	r4, r0
 80189aa:	68b8      	ldr	r0, [r7, #8]
 80189ac:	f7ff ff66 	bl	801887c <mem_to_ptr>
 80189b0:	4603      	mov	r3, r0
 80189b2:	6063      	str	r3, [r4, #4]
    }
  }
}
 80189b4:	bf00      	nop
 80189b6:	3714      	adds	r7, #20
 80189b8:	46bd      	mov	sp, r7
 80189ba:	bd90      	pop	{r4, r7, pc}
 80189bc:	240234b4 	.word	0x240234b4
 80189c0:	0802d610 	.word	0x0802d610
 80189c4:	0802d640 	.word	0x0802d640
 80189c8:	0802d658 	.word	0x0802d658
 80189cc:	240234b8 	.word	0x240234b8
 80189d0:	0802d680 	.word	0x0802d680
 80189d4:	0802d69c 	.word	0x0802d69c
 80189d8:	0001ffe8 	.word	0x0001ffe8
 80189dc:	0802d6b8 	.word	0x0802d6b8
 80189e0:	240234c0 	.word	0x240234c0

080189e4 <mem_init>:
/**
 * Zero the heap and initialize start, end and lowest-free
 */
void
mem_init(void)
{
 80189e4:	b580      	push	{r7, lr}
 80189e6:	b082      	sub	sp, #8
 80189e8:	af00      	add	r7, sp, #0

  LWIP_ASSERT("Sanity check alignment",
              (SIZEOF_STRUCT_MEM & (MEM_ALIGNMENT - 1)) == 0);

  /* align the heap */
  ram = (u8_t *)LWIP_MEM_ALIGN(LWIP_RAM_HEAP_POINTER);
 80189ea:	4b1b      	ldr	r3, [pc, #108]	@ (8018a58 <mem_init+0x74>)
 80189ec:	4a1b      	ldr	r2, [pc, #108]	@ (8018a5c <mem_init+0x78>)
 80189ee:	601a      	str	r2, [r3, #0]
  /* initialize the start of the heap */
  mem = (struct mem *)(void *)ram;
 80189f0:	4b19      	ldr	r3, [pc, #100]	@ (8018a58 <mem_init+0x74>)
 80189f2:	681b      	ldr	r3, [r3, #0]
 80189f4:	607b      	str	r3, [r7, #4]
  mem->next = MEM_SIZE_ALIGNED;
 80189f6:	687b      	ldr	r3, [r7, #4]
 80189f8:	4a19      	ldr	r2, [pc, #100]	@ (8018a60 <mem_init+0x7c>)
 80189fa:	601a      	str	r2, [r3, #0]
  mem->prev = 0;
 80189fc:	687b      	ldr	r3, [r7, #4]
 80189fe:	2200      	movs	r2, #0
 8018a00:	605a      	str	r2, [r3, #4]
  mem->used = 0;
 8018a02:	687b      	ldr	r3, [r7, #4]
 8018a04:	2200      	movs	r2, #0
 8018a06:	721a      	strb	r2, [r3, #8]
  /* initialize the end of the heap */
  ram_end = ptr_to_mem(MEM_SIZE_ALIGNED);
 8018a08:	4815      	ldr	r0, [pc, #84]	@ (8018a60 <mem_init+0x7c>)
 8018a0a:	f7ff ff27 	bl	801885c <ptr_to_mem>
 8018a0e:	4603      	mov	r3, r0
 8018a10:	4a14      	ldr	r2, [pc, #80]	@ (8018a64 <mem_init+0x80>)
 8018a12:	6013      	str	r3, [r2, #0]
  ram_end->used = 1;
 8018a14:	4b13      	ldr	r3, [pc, #76]	@ (8018a64 <mem_init+0x80>)
 8018a16:	681b      	ldr	r3, [r3, #0]
 8018a18:	2201      	movs	r2, #1
 8018a1a:	721a      	strb	r2, [r3, #8]
  ram_end->next = MEM_SIZE_ALIGNED;
 8018a1c:	4b11      	ldr	r3, [pc, #68]	@ (8018a64 <mem_init+0x80>)
 8018a1e:	681b      	ldr	r3, [r3, #0]
 8018a20:	4a0f      	ldr	r2, [pc, #60]	@ (8018a60 <mem_init+0x7c>)
 8018a22:	601a      	str	r2, [r3, #0]
  ram_end->prev = MEM_SIZE_ALIGNED;
 8018a24:	4b0f      	ldr	r3, [pc, #60]	@ (8018a64 <mem_init+0x80>)
 8018a26:	681b      	ldr	r3, [r3, #0]
 8018a28:	4a0d      	ldr	r2, [pc, #52]	@ (8018a60 <mem_init+0x7c>)
 8018a2a:	605a      	str	r2, [r3, #4]
  MEM_SANITY();

  /* initialize the lowest-free pointer to the start of the heap */
  lfree = (struct mem *)(void *)ram;
 8018a2c:	4b0a      	ldr	r3, [pc, #40]	@ (8018a58 <mem_init+0x74>)
 8018a2e:	681b      	ldr	r3, [r3, #0]
 8018a30:	4a0d      	ldr	r2, [pc, #52]	@ (8018a68 <mem_init+0x84>)
 8018a32:	6013      	str	r3, [r2, #0]

  MEM_STATS_AVAIL(avail, MEM_SIZE_ALIGNED);

  if (sys_mutex_new(&mem_mutex) != ERR_OK) {
 8018a34:	480d      	ldr	r0, [pc, #52]	@ (8018a6c <mem_init+0x88>)
 8018a36:	f00d fa81 	bl	8025f3c <sys_mutex_new>
 8018a3a:	4603      	mov	r3, r0
 8018a3c:	2b00      	cmp	r3, #0
 8018a3e:	d006      	beq.n	8018a4e <mem_init+0x6a>
    LWIP_ASSERT("failed to create mem_mutex", 0);
 8018a40:	4b0b      	ldr	r3, [pc, #44]	@ (8018a70 <mem_init+0x8c>)
 8018a42:	f240 221f 	movw	r2, #543	@ 0x21f
 8018a46:	490b      	ldr	r1, [pc, #44]	@ (8018a74 <mem_init+0x90>)
 8018a48:	480b      	ldr	r0, [pc, #44]	@ (8018a78 <mem_init+0x94>)
 8018a4a:	f010 fd5f 	bl	802950c <iprintf>
  }
}
 8018a4e:	bf00      	nop
 8018a50:	3708      	adds	r7, #8
 8018a52:	46bd      	mov	sp, r7
 8018a54:	bd80      	pop	{r7, pc}
 8018a56:	bf00      	nop
 8018a58:	240234b4 	.word	0x240234b4
 8018a5c:	24020000 	.word	0x24020000
 8018a60:	0001ffe8 	.word	0x0001ffe8
 8018a64:	240234b8 	.word	0x240234b8
 8018a68:	240234c0 	.word	0x240234c0
 8018a6c:	240234bc 	.word	0x240234bc
 8018a70:	0802d610 	.word	0x0802d610
 8018a74:	0802d6e4 	.word	0x0802d6e4
 8018a78:	0802d658 	.word	0x0802d658

08018a7c <mem_link_valid>:
/* Check if a struct mem is correctly linked.
 * If not, double-free is a possible reason.
 */
static int
mem_link_valid(struct mem *mem)
{
 8018a7c:	b580      	push	{r7, lr}
 8018a7e:	b086      	sub	sp, #24
 8018a80:	af00      	add	r7, sp, #0
 8018a82:	6078      	str	r0, [r7, #4]
  struct mem *nmem, *pmem;
  mem_size_t rmem_idx;
  rmem_idx = mem_to_ptr(mem);
 8018a84:	6878      	ldr	r0, [r7, #4]
 8018a86:	f7ff fef9 	bl	801887c <mem_to_ptr>
 8018a8a:	6178      	str	r0, [r7, #20]
  nmem = ptr_to_mem(mem->next);
 8018a8c:	687b      	ldr	r3, [r7, #4]
 8018a8e:	681b      	ldr	r3, [r3, #0]
 8018a90:	4618      	mov	r0, r3
 8018a92:	f7ff fee3 	bl	801885c <ptr_to_mem>
 8018a96:	6138      	str	r0, [r7, #16]
  pmem = ptr_to_mem(mem->prev);
 8018a98:	687b      	ldr	r3, [r7, #4]
 8018a9a:	685b      	ldr	r3, [r3, #4]
 8018a9c:	4618      	mov	r0, r3
 8018a9e:	f7ff fedd 	bl	801885c <ptr_to_mem>
 8018aa2:	60f8      	str	r0, [r7, #12]
  if ((mem->next > MEM_SIZE_ALIGNED) || (mem->prev > MEM_SIZE_ALIGNED) ||
 8018aa4:	687b      	ldr	r3, [r7, #4]
 8018aa6:	681b      	ldr	r3, [r3, #0]
 8018aa8:	4a11      	ldr	r2, [pc, #68]	@ (8018af0 <mem_link_valid+0x74>)
 8018aaa:	4293      	cmp	r3, r2
 8018aac:	d818      	bhi.n	8018ae0 <mem_link_valid+0x64>
 8018aae:	687b      	ldr	r3, [r7, #4]
 8018ab0:	685b      	ldr	r3, [r3, #4]
 8018ab2:	4a0f      	ldr	r2, [pc, #60]	@ (8018af0 <mem_link_valid+0x74>)
 8018ab4:	4293      	cmp	r3, r2
 8018ab6:	d813      	bhi.n	8018ae0 <mem_link_valid+0x64>
      ((mem->prev != rmem_idx) && (pmem->next != rmem_idx)) ||
 8018ab8:	687b      	ldr	r3, [r7, #4]
 8018aba:	685b      	ldr	r3, [r3, #4]
  if ((mem->next > MEM_SIZE_ALIGNED) || (mem->prev > MEM_SIZE_ALIGNED) ||
 8018abc:	697a      	ldr	r2, [r7, #20]
 8018abe:	429a      	cmp	r2, r3
 8018ac0:	d004      	beq.n	8018acc <mem_link_valid+0x50>
      ((mem->prev != rmem_idx) && (pmem->next != rmem_idx)) ||
 8018ac2:	68fb      	ldr	r3, [r7, #12]
 8018ac4:	681b      	ldr	r3, [r3, #0]
 8018ac6:	697a      	ldr	r2, [r7, #20]
 8018ac8:	429a      	cmp	r2, r3
 8018aca:	d109      	bne.n	8018ae0 <mem_link_valid+0x64>
      ((nmem != ram_end) && (nmem->prev != rmem_idx))) {
 8018acc:	4b09      	ldr	r3, [pc, #36]	@ (8018af4 <mem_link_valid+0x78>)
 8018ace:	681b      	ldr	r3, [r3, #0]
      ((mem->prev != rmem_idx) && (pmem->next != rmem_idx)) ||
 8018ad0:	693a      	ldr	r2, [r7, #16]
 8018ad2:	429a      	cmp	r2, r3
 8018ad4:	d006      	beq.n	8018ae4 <mem_link_valid+0x68>
      ((nmem != ram_end) && (nmem->prev != rmem_idx))) {
 8018ad6:	693b      	ldr	r3, [r7, #16]
 8018ad8:	685b      	ldr	r3, [r3, #4]
 8018ada:	697a      	ldr	r2, [r7, #20]
 8018adc:	429a      	cmp	r2, r3
 8018ade:	d001      	beq.n	8018ae4 <mem_link_valid+0x68>
    return 0;
 8018ae0:	2300      	movs	r3, #0
 8018ae2:	e000      	b.n	8018ae6 <mem_link_valid+0x6a>
  }
  return 1;
 8018ae4:	2301      	movs	r3, #1
}
 8018ae6:	4618      	mov	r0, r3
 8018ae8:	3718      	adds	r7, #24
 8018aea:	46bd      	mov	sp, r7
 8018aec:	bd80      	pop	{r7, pc}
 8018aee:	bf00      	nop
 8018af0:	0001ffe8 	.word	0x0001ffe8
 8018af4:	240234b8 	.word	0x240234b8

08018af8 <mem_free>:
 * @param rmem is the data portion of a struct mem as returned by a previous
 *             call to mem_malloc()
 */
void
mem_free(void *rmem)
{
 8018af8:	b580      	push	{r7, lr}
 8018afa:	b088      	sub	sp, #32
 8018afc:	af00      	add	r7, sp, #0
 8018afe:	6078      	str	r0, [r7, #4]
  struct mem *mem;
  LWIP_MEM_FREE_DECL_PROTECT();

  if (rmem == NULL) {
 8018b00:	687b      	ldr	r3, [r7, #4]
 8018b02:	2b00      	cmp	r3, #0
 8018b04:	d070      	beq.n	8018be8 <mem_free+0xf0>
    LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("mem_free(p == NULL) was called.\n"));
    return;
  }
  if ((((mem_ptr_t)rmem) & (MEM_ALIGNMENT - 1)) != 0) {
 8018b06:	687b      	ldr	r3, [r7, #4]
 8018b08:	f003 0303 	and.w	r3, r3, #3
 8018b0c:	2b00      	cmp	r3, #0
 8018b0e:	d00d      	beq.n	8018b2c <mem_free+0x34>
    LWIP_MEM_ILLEGAL_FREE("mem_free: sanity check alignment");
 8018b10:	4b37      	ldr	r3, [pc, #220]	@ (8018bf0 <mem_free+0xf8>)
 8018b12:	f240 2273 	movw	r2, #627	@ 0x273
 8018b16:	4937      	ldr	r1, [pc, #220]	@ (8018bf4 <mem_free+0xfc>)
 8018b18:	4837      	ldr	r0, [pc, #220]	@ (8018bf8 <mem_free+0x100>)
 8018b1a:	f010 fcf7 	bl	802950c <iprintf>
    LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_LEVEL_SEVERE, ("mem_free: sanity check alignment\n"));
    /* protect mem stats from concurrent access */
    MEM_STATS_INC_LOCKED(illegal);
 8018b1e:	f00d fa5f 	bl	8025fe0 <sys_arch_protect>
 8018b22:	60f8      	str	r0, [r7, #12]
 8018b24:	68f8      	ldr	r0, [r7, #12]
 8018b26:	f00d fa69 	bl	8025ffc <sys_arch_unprotect>
    return;
 8018b2a:	e05e      	b.n	8018bea <mem_free+0xf2>
  }

  /* Get the corresponding struct mem: */
  /* cast through void* to get rid of alignment warnings */
  mem = (struct mem *)(void *)((u8_t *)rmem - (SIZEOF_STRUCT_MEM + MEM_SANITY_OFFSET));
 8018b2c:	687b      	ldr	r3, [r7, #4]
 8018b2e:	3b0c      	subs	r3, #12
 8018b30:	61fb      	str	r3, [r7, #28]

  if ((u8_t *)mem < ram || (u8_t *)rmem + MIN_SIZE_ALIGNED > (u8_t *)ram_end) {
 8018b32:	4b32      	ldr	r3, [pc, #200]	@ (8018bfc <mem_free+0x104>)
 8018b34:	681b      	ldr	r3, [r3, #0]
 8018b36:	69fa      	ldr	r2, [r7, #28]
 8018b38:	429a      	cmp	r2, r3
 8018b3a:	d306      	bcc.n	8018b4a <mem_free+0x52>
 8018b3c:	687b      	ldr	r3, [r7, #4]
 8018b3e:	f103 020c 	add.w	r2, r3, #12
 8018b42:	4b2f      	ldr	r3, [pc, #188]	@ (8018c00 <mem_free+0x108>)
 8018b44:	681b      	ldr	r3, [r3, #0]
 8018b46:	429a      	cmp	r2, r3
 8018b48:	d90d      	bls.n	8018b66 <mem_free+0x6e>
    LWIP_MEM_ILLEGAL_FREE("mem_free: illegal memory");
 8018b4a:	4b29      	ldr	r3, [pc, #164]	@ (8018bf0 <mem_free+0xf8>)
 8018b4c:	f240 227f 	movw	r2, #639	@ 0x27f
 8018b50:	492c      	ldr	r1, [pc, #176]	@ (8018c04 <mem_free+0x10c>)
 8018b52:	4829      	ldr	r0, [pc, #164]	@ (8018bf8 <mem_free+0x100>)
 8018b54:	f010 fcda 	bl	802950c <iprintf>
    LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_LEVEL_SEVERE, ("mem_free: illegal memory\n"));
    /* protect mem stats from concurrent access */
    MEM_STATS_INC_LOCKED(illegal);
 8018b58:	f00d fa42 	bl	8025fe0 <sys_arch_protect>
 8018b5c:	6138      	str	r0, [r7, #16]
 8018b5e:	6938      	ldr	r0, [r7, #16]
 8018b60:	f00d fa4c 	bl	8025ffc <sys_arch_unprotect>
    return;
 8018b64:	e041      	b.n	8018bea <mem_free+0xf2>
  }
#if MEM_OVERFLOW_CHECK
  mem_overflow_check_element(mem);
#endif
  /* protect the heap from concurrent access */
  LWIP_MEM_FREE_PROTECT();
 8018b66:	4828      	ldr	r0, [pc, #160]	@ (8018c08 <mem_free+0x110>)
 8018b68:	f00d f9fe 	bl	8025f68 <sys_mutex_lock>
  /* mem has to be in a used state */
  if (!mem->used) {
 8018b6c:	69fb      	ldr	r3, [r7, #28]
 8018b6e:	7a1b      	ldrb	r3, [r3, #8]
 8018b70:	2b00      	cmp	r3, #0
 8018b72:	d110      	bne.n	8018b96 <mem_free+0x9e>
    LWIP_MEM_ILLEGAL_FREE("mem_free: illegal memory: double free");
 8018b74:	4b1e      	ldr	r3, [pc, #120]	@ (8018bf0 <mem_free+0xf8>)
 8018b76:	f44f 7223 	mov.w	r2, #652	@ 0x28c
 8018b7a:	4924      	ldr	r1, [pc, #144]	@ (8018c0c <mem_free+0x114>)
 8018b7c:	481e      	ldr	r0, [pc, #120]	@ (8018bf8 <mem_free+0x100>)
 8018b7e:	f010 fcc5 	bl	802950c <iprintf>
    LWIP_MEM_FREE_UNPROTECT();
 8018b82:	4821      	ldr	r0, [pc, #132]	@ (8018c08 <mem_free+0x110>)
 8018b84:	f00d f9ff 	bl	8025f86 <sys_mutex_unlock>
    LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_LEVEL_SEVERE, ("mem_free: illegal memory: double free?\n"));
    /* protect mem stats from concurrent access */
    MEM_STATS_INC_LOCKED(illegal);
 8018b88:	f00d fa2a 	bl	8025fe0 <sys_arch_protect>
 8018b8c:	6178      	str	r0, [r7, #20]
 8018b8e:	6978      	ldr	r0, [r7, #20]
 8018b90:	f00d fa34 	bl	8025ffc <sys_arch_unprotect>
    return;
 8018b94:	e029      	b.n	8018bea <mem_free+0xf2>
  }

  if (!mem_link_valid(mem)) {
 8018b96:	69f8      	ldr	r0, [r7, #28]
 8018b98:	f7ff ff70 	bl	8018a7c <mem_link_valid>
 8018b9c:	4603      	mov	r3, r0
 8018b9e:	2b00      	cmp	r3, #0
 8018ba0:	d110      	bne.n	8018bc4 <mem_free+0xcc>
    LWIP_MEM_ILLEGAL_FREE("mem_free: illegal memory: non-linked: double free");
 8018ba2:	4b13      	ldr	r3, [pc, #76]	@ (8018bf0 <mem_free+0xf8>)
 8018ba4:	f240 2295 	movw	r2, #661	@ 0x295
 8018ba8:	4919      	ldr	r1, [pc, #100]	@ (8018c10 <mem_free+0x118>)
 8018baa:	4813      	ldr	r0, [pc, #76]	@ (8018bf8 <mem_free+0x100>)
 8018bac:	f010 fcae 	bl	802950c <iprintf>
    LWIP_MEM_FREE_UNPROTECT();
 8018bb0:	4815      	ldr	r0, [pc, #84]	@ (8018c08 <mem_free+0x110>)
 8018bb2:	f00d f9e8 	bl	8025f86 <sys_mutex_unlock>
    LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_LEVEL_SEVERE, ("mem_free: illegal memory: non-linked: double free?\n"));
    /* protect mem stats from concurrent access */
    MEM_STATS_INC_LOCKED(illegal);
 8018bb6:	f00d fa13 	bl	8025fe0 <sys_arch_protect>
 8018bba:	61b8      	str	r0, [r7, #24]
 8018bbc:	69b8      	ldr	r0, [r7, #24]
 8018bbe:	f00d fa1d 	bl	8025ffc <sys_arch_unprotect>
    return;
 8018bc2:	e012      	b.n	8018bea <mem_free+0xf2>
  }

  /* mem is now unused. */
  mem->used = 0;
 8018bc4:	69fb      	ldr	r3, [r7, #28]
 8018bc6:	2200      	movs	r2, #0
 8018bc8:	721a      	strb	r2, [r3, #8]

  if (mem < lfree) {
 8018bca:	4b12      	ldr	r3, [pc, #72]	@ (8018c14 <mem_free+0x11c>)
 8018bcc:	681b      	ldr	r3, [r3, #0]
 8018bce:	69fa      	ldr	r2, [r7, #28]
 8018bd0:	429a      	cmp	r2, r3
 8018bd2:	d202      	bcs.n	8018bda <mem_free+0xe2>
    /* the newly freed struct is now the lowest */
    lfree = mem;
 8018bd4:	4a0f      	ldr	r2, [pc, #60]	@ (8018c14 <mem_free+0x11c>)
 8018bd6:	69fb      	ldr	r3, [r7, #28]
 8018bd8:	6013      	str	r3, [r2, #0]
  }

  MEM_STATS_DEC_USED(used, mem->next - (mem_size_t)(((u8_t *)mem - ram)));

  /* finally, see if prev or next are free also */
  plug_holes(mem);
 8018bda:	69f8      	ldr	r0, [r7, #28]
 8018bdc:	f7ff fe5e 	bl	801889c <plug_holes>
  MEM_SANITY();
#if LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT
  mem_free_count = 1;
#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */
  LWIP_MEM_FREE_UNPROTECT();
 8018be0:	4809      	ldr	r0, [pc, #36]	@ (8018c08 <mem_free+0x110>)
 8018be2:	f00d f9d0 	bl	8025f86 <sys_mutex_unlock>
 8018be6:	e000      	b.n	8018bea <mem_free+0xf2>
    return;
 8018be8:	bf00      	nop
}
 8018bea:	3720      	adds	r7, #32
 8018bec:	46bd      	mov	sp, r7
 8018bee:	bd80      	pop	{r7, pc}
 8018bf0:	0802d610 	.word	0x0802d610
 8018bf4:	0802d700 	.word	0x0802d700
 8018bf8:	0802d658 	.word	0x0802d658
 8018bfc:	240234b4 	.word	0x240234b4
 8018c00:	240234b8 	.word	0x240234b8
 8018c04:	0802d724 	.word	0x0802d724
 8018c08:	240234bc 	.word	0x240234bc
 8018c0c:	0802d740 	.word	0x0802d740
 8018c10:	0802d768 	.word	0x0802d768
 8018c14:	240234c0 	.word	0x240234c0

08018c18 <mem_trim>:
 *         or NULL if newsize is > old size, in which case rmem is NOT touched
 *         or freed!
 */
void *
mem_trim(void *rmem, mem_size_t new_size)
{
 8018c18:	b580      	push	{r7, lr}
 8018c1a:	b08a      	sub	sp, #40	@ 0x28
 8018c1c:	af00      	add	r7, sp, #0
 8018c1e:	6078      	str	r0, [r7, #4]
 8018c20:	6039      	str	r1, [r7, #0]
  /* use the FREE_PROTECT here: it protects with sem OR SYS_ARCH_PROTECT */
  LWIP_MEM_FREE_DECL_PROTECT();

  /* Expand the size of the allocated memory region so that we can
     adjust for alignment. */
  newsize = (mem_size_t)LWIP_MEM_ALIGN_SIZE(new_size);
 8018c22:	683b      	ldr	r3, [r7, #0]
 8018c24:	3303      	adds	r3, #3
 8018c26:	f023 0303 	bic.w	r3, r3, #3
 8018c2a:	627b      	str	r3, [r7, #36]	@ 0x24
  if (newsize < MIN_SIZE_ALIGNED) {
 8018c2c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8018c2e:	2b0b      	cmp	r3, #11
 8018c30:	d801      	bhi.n	8018c36 <mem_trim+0x1e>
    /* every data block must be at least MIN_SIZE_ALIGNED long */
    newsize = MIN_SIZE_ALIGNED;
 8018c32:	230c      	movs	r3, #12
 8018c34:	627b      	str	r3, [r7, #36]	@ 0x24
  }
#if MEM_OVERFLOW_CHECK
  newsize += MEM_SANITY_REGION_BEFORE_ALIGNED + MEM_SANITY_REGION_AFTER_ALIGNED;
#endif
  if ((newsize > MEM_SIZE_ALIGNED) || (newsize < new_size)) {
 8018c36:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8018c38:	4a6e      	ldr	r2, [pc, #440]	@ (8018df4 <mem_trim+0x1dc>)
 8018c3a:	4293      	cmp	r3, r2
 8018c3c:	d803      	bhi.n	8018c46 <mem_trim+0x2e>
 8018c3e:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8018c40:	683b      	ldr	r3, [r7, #0]
 8018c42:	429a      	cmp	r2, r3
 8018c44:	d201      	bcs.n	8018c4a <mem_trim+0x32>
    return NULL;
 8018c46:	2300      	movs	r3, #0
 8018c48:	e0d0      	b.n	8018dec <mem_trim+0x1d4>
  }

  LWIP_ASSERT("mem_trim: legal memory", (u8_t *)rmem >= (u8_t *)ram &&
 8018c4a:	4b6b      	ldr	r3, [pc, #428]	@ (8018df8 <mem_trim+0x1e0>)
 8018c4c:	681b      	ldr	r3, [r3, #0]
 8018c4e:	687a      	ldr	r2, [r7, #4]
 8018c50:	429a      	cmp	r2, r3
 8018c52:	d304      	bcc.n	8018c5e <mem_trim+0x46>
 8018c54:	4b69      	ldr	r3, [pc, #420]	@ (8018dfc <mem_trim+0x1e4>)
 8018c56:	681b      	ldr	r3, [r3, #0]
 8018c58:	687a      	ldr	r2, [r7, #4]
 8018c5a:	429a      	cmp	r2, r3
 8018c5c:	d306      	bcc.n	8018c6c <mem_trim+0x54>
 8018c5e:	4b68      	ldr	r3, [pc, #416]	@ (8018e00 <mem_trim+0x1e8>)
 8018c60:	f240 22d1 	movw	r2, #721	@ 0x2d1
 8018c64:	4967      	ldr	r1, [pc, #412]	@ (8018e04 <mem_trim+0x1ec>)
 8018c66:	4868      	ldr	r0, [pc, #416]	@ (8018e08 <mem_trim+0x1f0>)
 8018c68:	f010 fc50 	bl	802950c <iprintf>
              (u8_t *)rmem < (u8_t *)ram_end);

  if ((u8_t *)rmem < (u8_t *)ram || (u8_t *)rmem >= (u8_t *)ram_end) {
 8018c6c:	4b62      	ldr	r3, [pc, #392]	@ (8018df8 <mem_trim+0x1e0>)
 8018c6e:	681b      	ldr	r3, [r3, #0]
 8018c70:	687a      	ldr	r2, [r7, #4]
 8018c72:	429a      	cmp	r2, r3
 8018c74:	d304      	bcc.n	8018c80 <mem_trim+0x68>
 8018c76:	4b61      	ldr	r3, [pc, #388]	@ (8018dfc <mem_trim+0x1e4>)
 8018c78:	681b      	ldr	r3, [r3, #0]
 8018c7a:	687a      	ldr	r2, [r7, #4]
 8018c7c:	429a      	cmp	r2, r3
 8018c7e:	d307      	bcc.n	8018c90 <mem_trim+0x78>
    LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_LEVEL_SEVERE, ("mem_trim: illegal memory\n"));
    /* protect mem stats from concurrent access */
    MEM_STATS_INC_LOCKED(illegal);
 8018c80:	f00d f9ae 	bl	8025fe0 <sys_arch_protect>
 8018c84:	60b8      	str	r0, [r7, #8]
 8018c86:	68b8      	ldr	r0, [r7, #8]
 8018c88:	f00d f9b8 	bl	8025ffc <sys_arch_unprotect>
    return rmem;
 8018c8c:	687b      	ldr	r3, [r7, #4]
 8018c8e:	e0ad      	b.n	8018dec <mem_trim+0x1d4>
  }
  /* Get the corresponding struct mem ... */
  /* cast through void* to get rid of alignment warnings */
  mem = (struct mem *)(void *)((u8_t *)rmem - (SIZEOF_STRUCT_MEM + MEM_SANITY_OFFSET));
 8018c90:	687b      	ldr	r3, [r7, #4]
 8018c92:	3b0c      	subs	r3, #12
 8018c94:	623b      	str	r3, [r7, #32]
#if MEM_OVERFLOW_CHECK
  mem_overflow_check_element(mem);
#endif
  /* ... and its offset pointer */
  ptr = mem_to_ptr(mem);
 8018c96:	6a38      	ldr	r0, [r7, #32]
 8018c98:	f7ff fdf0 	bl	801887c <mem_to_ptr>
 8018c9c:	61f8      	str	r0, [r7, #28]

  size = (mem_size_t)((mem_size_t)(mem->next - ptr) - (SIZEOF_STRUCT_MEM + MEM_SANITY_OVERHEAD));
 8018c9e:	6a3b      	ldr	r3, [r7, #32]
 8018ca0:	681a      	ldr	r2, [r3, #0]
 8018ca2:	69fb      	ldr	r3, [r7, #28]
 8018ca4:	1ad3      	subs	r3, r2, r3
 8018ca6:	3b0c      	subs	r3, #12
 8018ca8:	61bb      	str	r3, [r7, #24]
  LWIP_ASSERT("mem_trim can only shrink memory", newsize <= size);
 8018caa:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8018cac:	69bb      	ldr	r3, [r7, #24]
 8018cae:	429a      	cmp	r2, r3
 8018cb0:	d906      	bls.n	8018cc0 <mem_trim+0xa8>
 8018cb2:	4b53      	ldr	r3, [pc, #332]	@ (8018e00 <mem_trim+0x1e8>)
 8018cb4:	f44f 7239 	mov.w	r2, #740	@ 0x2e4
 8018cb8:	4954      	ldr	r1, [pc, #336]	@ (8018e0c <mem_trim+0x1f4>)
 8018cba:	4853      	ldr	r0, [pc, #332]	@ (8018e08 <mem_trim+0x1f0>)
 8018cbc:	f010 fc26 	bl	802950c <iprintf>
  if (newsize > size) {
 8018cc0:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8018cc2:	69bb      	ldr	r3, [r7, #24]
 8018cc4:	429a      	cmp	r2, r3
 8018cc6:	d901      	bls.n	8018ccc <mem_trim+0xb4>
    /* not supported */
    return NULL;
 8018cc8:	2300      	movs	r3, #0
 8018cca:	e08f      	b.n	8018dec <mem_trim+0x1d4>
  }
  if (newsize == size) {
 8018ccc:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8018cce:	69bb      	ldr	r3, [r7, #24]
 8018cd0:	429a      	cmp	r2, r3
 8018cd2:	d101      	bne.n	8018cd8 <mem_trim+0xc0>
    /* No change in size, simply return */
    return rmem;
 8018cd4:	687b      	ldr	r3, [r7, #4]
 8018cd6:	e089      	b.n	8018dec <mem_trim+0x1d4>
  }

  /* protect the heap from concurrent access */
  LWIP_MEM_FREE_PROTECT();
 8018cd8:	484d      	ldr	r0, [pc, #308]	@ (8018e10 <mem_trim+0x1f8>)
 8018cda:	f00d f945 	bl	8025f68 <sys_mutex_lock>

  mem2 = ptr_to_mem(mem->next);
 8018cde:	6a3b      	ldr	r3, [r7, #32]
 8018ce0:	681b      	ldr	r3, [r3, #0]
 8018ce2:	4618      	mov	r0, r3
 8018ce4:	f7ff fdba 	bl	801885c <ptr_to_mem>
 8018ce8:	6178      	str	r0, [r7, #20]
  if (mem2->used == 0) {
 8018cea:	697b      	ldr	r3, [r7, #20]
 8018cec:	7a1b      	ldrb	r3, [r3, #8]
 8018cee:	2b00      	cmp	r3, #0
 8018cf0:	d13c      	bne.n	8018d6c <mem_trim+0x154>
    /* The next struct is unused, we can simply move it at little */
    mem_size_t next;
    LWIP_ASSERT("invalid next ptr", mem->next != MEM_SIZE_ALIGNED);
 8018cf2:	6a3b      	ldr	r3, [r7, #32]
 8018cf4:	681b      	ldr	r3, [r3, #0]
 8018cf6:	4a3f      	ldr	r2, [pc, #252]	@ (8018df4 <mem_trim+0x1dc>)
 8018cf8:	4293      	cmp	r3, r2
 8018cfa:	d106      	bne.n	8018d0a <mem_trim+0xf2>
 8018cfc:	4b40      	ldr	r3, [pc, #256]	@ (8018e00 <mem_trim+0x1e8>)
 8018cfe:	f240 22f5 	movw	r2, #757	@ 0x2f5
 8018d02:	4944      	ldr	r1, [pc, #272]	@ (8018e14 <mem_trim+0x1fc>)
 8018d04:	4840      	ldr	r0, [pc, #256]	@ (8018e08 <mem_trim+0x1f0>)
 8018d06:	f010 fc01 	bl	802950c <iprintf>
    /* remember the old next pointer */
    next = mem2->next;
 8018d0a:	697b      	ldr	r3, [r7, #20]
 8018d0c:	681b      	ldr	r3, [r3, #0]
 8018d0e:	60fb      	str	r3, [r7, #12]
    /* create new struct mem which is moved directly after the shrinked mem */
    ptr2 = (mem_size_t)(ptr + SIZEOF_STRUCT_MEM + newsize);
 8018d10:	69fa      	ldr	r2, [r7, #28]
 8018d12:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8018d14:	4413      	add	r3, r2
 8018d16:	330c      	adds	r3, #12
 8018d18:	613b      	str	r3, [r7, #16]
    if (lfree == mem2) {
 8018d1a:	4b3f      	ldr	r3, [pc, #252]	@ (8018e18 <mem_trim+0x200>)
 8018d1c:	681b      	ldr	r3, [r3, #0]
 8018d1e:	697a      	ldr	r2, [r7, #20]
 8018d20:	429a      	cmp	r2, r3
 8018d22:	d105      	bne.n	8018d30 <mem_trim+0x118>
      lfree = ptr_to_mem(ptr2);
 8018d24:	6938      	ldr	r0, [r7, #16]
 8018d26:	f7ff fd99 	bl	801885c <ptr_to_mem>
 8018d2a:	4603      	mov	r3, r0
 8018d2c:	4a3a      	ldr	r2, [pc, #232]	@ (8018e18 <mem_trim+0x200>)
 8018d2e:	6013      	str	r3, [r2, #0]
    }
    mem2 = ptr_to_mem(ptr2);
 8018d30:	6938      	ldr	r0, [r7, #16]
 8018d32:	f7ff fd93 	bl	801885c <ptr_to_mem>
 8018d36:	6178      	str	r0, [r7, #20]
    mem2->used = 0;
 8018d38:	697b      	ldr	r3, [r7, #20]
 8018d3a:	2200      	movs	r2, #0
 8018d3c:	721a      	strb	r2, [r3, #8]
    /* restore the next pointer */
    mem2->next = next;
 8018d3e:	697b      	ldr	r3, [r7, #20]
 8018d40:	68fa      	ldr	r2, [r7, #12]
 8018d42:	601a      	str	r2, [r3, #0]
    /* link it back to mem */
    mem2->prev = ptr;
 8018d44:	697b      	ldr	r3, [r7, #20]
 8018d46:	69fa      	ldr	r2, [r7, #28]
 8018d48:	605a      	str	r2, [r3, #4]
    /* link mem to it */
    mem->next = ptr2;
 8018d4a:	6a3b      	ldr	r3, [r7, #32]
 8018d4c:	693a      	ldr	r2, [r7, #16]
 8018d4e:	601a      	str	r2, [r3, #0]
    /* last thing to restore linked list: as we have moved mem2,
     * let 'mem2->next->prev' point to mem2 again. but only if mem2->next is not
     * the end of the heap */
    if (mem2->next != MEM_SIZE_ALIGNED) {
 8018d50:	697b      	ldr	r3, [r7, #20]
 8018d52:	681b      	ldr	r3, [r3, #0]
 8018d54:	4a27      	ldr	r2, [pc, #156]	@ (8018df4 <mem_trim+0x1dc>)
 8018d56:	4293      	cmp	r3, r2
 8018d58:	d044      	beq.n	8018de4 <mem_trim+0x1cc>
      ptr_to_mem(mem2->next)->prev = ptr2;
 8018d5a:	697b      	ldr	r3, [r7, #20]
 8018d5c:	681b      	ldr	r3, [r3, #0]
 8018d5e:	4618      	mov	r0, r3
 8018d60:	f7ff fd7c 	bl	801885c <ptr_to_mem>
 8018d64:	4602      	mov	r2, r0
 8018d66:	693b      	ldr	r3, [r7, #16]
 8018d68:	6053      	str	r3, [r2, #4]
 8018d6a:	e03b      	b.n	8018de4 <mem_trim+0x1cc>
    }
    MEM_STATS_DEC_USED(used, (size - newsize));
    /* no need to plug holes, we've already done that */
  } else if (newsize + SIZEOF_STRUCT_MEM + MIN_SIZE_ALIGNED <= size) {
 8018d6c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8018d6e:	3318      	adds	r3, #24
 8018d70:	69ba      	ldr	r2, [r7, #24]
 8018d72:	429a      	cmp	r2, r3
 8018d74:	d336      	bcc.n	8018de4 <mem_trim+0x1cc>
     * Old size ('size') must be big enough to contain at least 'newsize' plus a struct mem
     * ('SIZEOF_STRUCT_MEM') with some data ('MIN_SIZE_ALIGNED').
     * @todo we could leave out MIN_SIZE_ALIGNED. We would create an empty
     *       region that couldn't hold data, but when mem->next gets freed,
     *       the 2 regions would be combined, resulting in more free memory */
    ptr2 = (mem_size_t)(ptr + SIZEOF_STRUCT_MEM + newsize);
 8018d76:	69fa      	ldr	r2, [r7, #28]
 8018d78:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8018d7a:	4413      	add	r3, r2
 8018d7c:	330c      	adds	r3, #12
 8018d7e:	613b      	str	r3, [r7, #16]
    LWIP_ASSERT("invalid next ptr", mem->next != MEM_SIZE_ALIGNED);
 8018d80:	6a3b      	ldr	r3, [r7, #32]
 8018d82:	681b      	ldr	r3, [r3, #0]
 8018d84:	4a1b      	ldr	r2, [pc, #108]	@ (8018df4 <mem_trim+0x1dc>)
 8018d86:	4293      	cmp	r3, r2
 8018d88:	d106      	bne.n	8018d98 <mem_trim+0x180>
 8018d8a:	4b1d      	ldr	r3, [pc, #116]	@ (8018e00 <mem_trim+0x1e8>)
 8018d8c:	f240 3216 	movw	r2, #790	@ 0x316
 8018d90:	4920      	ldr	r1, [pc, #128]	@ (8018e14 <mem_trim+0x1fc>)
 8018d92:	481d      	ldr	r0, [pc, #116]	@ (8018e08 <mem_trim+0x1f0>)
 8018d94:	f010 fbba 	bl	802950c <iprintf>
    mem2 = ptr_to_mem(ptr2);
 8018d98:	6938      	ldr	r0, [r7, #16]
 8018d9a:	f7ff fd5f 	bl	801885c <ptr_to_mem>
 8018d9e:	6178      	str	r0, [r7, #20]
    if (mem2 < lfree) {
 8018da0:	4b1d      	ldr	r3, [pc, #116]	@ (8018e18 <mem_trim+0x200>)
 8018da2:	681b      	ldr	r3, [r3, #0]
 8018da4:	697a      	ldr	r2, [r7, #20]
 8018da6:	429a      	cmp	r2, r3
 8018da8:	d202      	bcs.n	8018db0 <mem_trim+0x198>
      lfree = mem2;
 8018daa:	4a1b      	ldr	r2, [pc, #108]	@ (8018e18 <mem_trim+0x200>)
 8018dac:	697b      	ldr	r3, [r7, #20]
 8018dae:	6013      	str	r3, [r2, #0]
    }
    mem2->used = 0;
 8018db0:	697b      	ldr	r3, [r7, #20]
 8018db2:	2200      	movs	r2, #0
 8018db4:	721a      	strb	r2, [r3, #8]
    mem2->next = mem->next;
 8018db6:	6a3b      	ldr	r3, [r7, #32]
 8018db8:	681a      	ldr	r2, [r3, #0]
 8018dba:	697b      	ldr	r3, [r7, #20]
 8018dbc:	601a      	str	r2, [r3, #0]
    mem2->prev = ptr;
 8018dbe:	697b      	ldr	r3, [r7, #20]
 8018dc0:	69fa      	ldr	r2, [r7, #28]
 8018dc2:	605a      	str	r2, [r3, #4]
    mem->next = ptr2;
 8018dc4:	6a3b      	ldr	r3, [r7, #32]
 8018dc6:	693a      	ldr	r2, [r7, #16]
 8018dc8:	601a      	str	r2, [r3, #0]
    if (mem2->next != MEM_SIZE_ALIGNED) {
 8018dca:	697b      	ldr	r3, [r7, #20]
 8018dcc:	681b      	ldr	r3, [r3, #0]
 8018dce:	4a09      	ldr	r2, [pc, #36]	@ (8018df4 <mem_trim+0x1dc>)
 8018dd0:	4293      	cmp	r3, r2
 8018dd2:	d007      	beq.n	8018de4 <mem_trim+0x1cc>
      ptr_to_mem(mem2->next)->prev = ptr2;
 8018dd4:	697b      	ldr	r3, [r7, #20]
 8018dd6:	681b      	ldr	r3, [r3, #0]
 8018dd8:	4618      	mov	r0, r3
 8018dda:	f7ff fd3f 	bl	801885c <ptr_to_mem>
 8018dde:	4602      	mov	r2, r0
 8018de0:	693b      	ldr	r3, [r7, #16]
 8018de2:	6053      	str	r3, [r2, #4]
#endif
  MEM_SANITY();
#if LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT
  mem_free_count = 1;
#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */
  LWIP_MEM_FREE_UNPROTECT();
 8018de4:	480a      	ldr	r0, [pc, #40]	@ (8018e10 <mem_trim+0x1f8>)
 8018de6:	f00d f8ce 	bl	8025f86 <sys_mutex_unlock>
  return rmem;
 8018dea:	687b      	ldr	r3, [r7, #4]
}
 8018dec:	4618      	mov	r0, r3
 8018dee:	3728      	adds	r7, #40	@ 0x28
 8018df0:	46bd      	mov	sp, r7
 8018df2:	bd80      	pop	{r7, pc}
 8018df4:	0001ffe8 	.word	0x0001ffe8
 8018df8:	240234b4 	.word	0x240234b4
 8018dfc:	240234b8 	.word	0x240234b8
 8018e00:	0802d610 	.word	0x0802d610
 8018e04:	0802d79c 	.word	0x0802d79c
 8018e08:	0802d658 	.word	0x0802d658
 8018e0c:	0802d7b4 	.word	0x0802d7b4
 8018e10:	240234bc 	.word	0x240234bc
 8018e14:	0802d7d4 	.word	0x0802d7d4
 8018e18:	240234c0 	.word	0x240234c0

08018e1c <mem_malloc>:
 *
 * Note that the returned value will always be aligned (as defined by MEM_ALIGNMENT).
 */
void *
mem_malloc(mem_size_t size_in)
{
 8018e1c:	b580      	push	{r7, lr}
 8018e1e:	b088      	sub	sp, #32
 8018e20:	af00      	add	r7, sp, #0
 8018e22:	6078      	str	r0, [r7, #4]
#if LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT
  u8_t local_mem_free_count = 0;
#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */
  LWIP_MEM_ALLOC_DECL_PROTECT();

  if (size_in == 0) {
 8018e24:	687b      	ldr	r3, [r7, #4]
 8018e26:	2b00      	cmp	r3, #0
 8018e28:	d101      	bne.n	8018e2e <mem_malloc+0x12>
    return NULL;
 8018e2a:	2300      	movs	r3, #0
 8018e2c:	e0d9      	b.n	8018fe2 <mem_malloc+0x1c6>
  }

  /* Expand the size of the allocated memory region so that we can
     adjust for alignment. */
  size = (mem_size_t)LWIP_MEM_ALIGN_SIZE(size_in);
 8018e2e:	687b      	ldr	r3, [r7, #4]
 8018e30:	3303      	adds	r3, #3
 8018e32:	f023 0303 	bic.w	r3, r3, #3
 8018e36:	61bb      	str	r3, [r7, #24]
  if (size < MIN_SIZE_ALIGNED) {
 8018e38:	69bb      	ldr	r3, [r7, #24]
 8018e3a:	2b0b      	cmp	r3, #11
 8018e3c:	d801      	bhi.n	8018e42 <mem_malloc+0x26>
    /* every data block must be at least MIN_SIZE_ALIGNED long */
    size = MIN_SIZE_ALIGNED;
 8018e3e:	230c      	movs	r3, #12
 8018e40:	61bb      	str	r3, [r7, #24]
  }
#if MEM_OVERFLOW_CHECK
  size += MEM_SANITY_REGION_BEFORE_ALIGNED + MEM_SANITY_REGION_AFTER_ALIGNED;
#endif
  if ((size > MEM_SIZE_ALIGNED) || (size < size_in)) {
 8018e42:	69bb      	ldr	r3, [r7, #24]
 8018e44:	4a69      	ldr	r2, [pc, #420]	@ (8018fec <mem_malloc+0x1d0>)
 8018e46:	4293      	cmp	r3, r2
 8018e48:	d803      	bhi.n	8018e52 <mem_malloc+0x36>
 8018e4a:	69ba      	ldr	r2, [r7, #24]
 8018e4c:	687b      	ldr	r3, [r7, #4]
 8018e4e:	429a      	cmp	r2, r3
 8018e50:	d201      	bcs.n	8018e56 <mem_malloc+0x3a>
    return NULL;
 8018e52:	2300      	movs	r3, #0
 8018e54:	e0c5      	b.n	8018fe2 <mem_malloc+0x1c6>
  }

  /* protect the heap from concurrent access */
  sys_mutex_lock(&mem_mutex);
 8018e56:	4866      	ldr	r0, [pc, #408]	@ (8018ff0 <mem_malloc+0x1d4>)
 8018e58:	f00d f886 	bl	8025f68 <sys_mutex_lock>
#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */

    /* Scan through the heap searching for a free block that is big enough,
     * beginning with the lowest free block.
     */
    for (ptr = mem_to_ptr(lfree); ptr < MEM_SIZE_ALIGNED - size;
 8018e5c:	4b65      	ldr	r3, [pc, #404]	@ (8018ff4 <mem_malloc+0x1d8>)
 8018e5e:	681b      	ldr	r3, [r3, #0]
 8018e60:	4618      	mov	r0, r3
 8018e62:	f7ff fd0b 	bl	801887c <mem_to_ptr>
 8018e66:	61f8      	str	r0, [r7, #28]
 8018e68:	e0b0      	b.n	8018fcc <mem_malloc+0x1b0>
         ptr = ptr_to_mem(ptr)->next) {
      mem = ptr_to_mem(ptr);
 8018e6a:	69f8      	ldr	r0, [r7, #28]
 8018e6c:	f7ff fcf6 	bl	801885c <ptr_to_mem>
 8018e70:	6138      	str	r0, [r7, #16]
        local_mem_free_count = 1;
        break;
      }
#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */

      if ((!mem->used) &&
 8018e72:	693b      	ldr	r3, [r7, #16]
 8018e74:	7a1b      	ldrb	r3, [r3, #8]
 8018e76:	2b00      	cmp	r3, #0
 8018e78:	f040 80a2 	bne.w	8018fc0 <mem_malloc+0x1a4>
          (mem->next - (ptr + SIZEOF_STRUCT_MEM)) >= size) {
 8018e7c:	693b      	ldr	r3, [r7, #16]
 8018e7e:	681a      	ldr	r2, [r3, #0]
 8018e80:	69fb      	ldr	r3, [r7, #28]
 8018e82:	1ad3      	subs	r3, r2, r3
 8018e84:	3b0c      	subs	r3, #12
      if ((!mem->used) &&
 8018e86:	69ba      	ldr	r2, [r7, #24]
 8018e88:	429a      	cmp	r2, r3
 8018e8a:	f200 8099 	bhi.w	8018fc0 <mem_malloc+0x1a4>
        /* mem is not used and at least perfect fit is possible:
         * mem->next - (ptr + SIZEOF_STRUCT_MEM) gives us the 'user data size' of mem */

        if (mem->next - (ptr + SIZEOF_STRUCT_MEM) >= (size + SIZEOF_STRUCT_MEM + MIN_SIZE_ALIGNED)) {
 8018e8e:	693b      	ldr	r3, [r7, #16]
 8018e90:	681a      	ldr	r2, [r3, #0]
 8018e92:	69fb      	ldr	r3, [r7, #28]
 8018e94:	1ad3      	subs	r3, r2, r3
 8018e96:	f1a3 020c 	sub.w	r2, r3, #12
 8018e9a:	69bb      	ldr	r3, [r7, #24]
 8018e9c:	3318      	adds	r3, #24
 8018e9e:	429a      	cmp	r2, r3
 8018ea0:	d331      	bcc.n	8018f06 <mem_malloc+0xea>
           * struct mem would fit in but no data between mem2 and mem2->next
           * @todo we could leave out MIN_SIZE_ALIGNED. We would create an empty
           *       region that couldn't hold data, but when mem->next gets freed,
           *       the 2 regions would be combined, resulting in more free memory
           */
          ptr2 = (mem_size_t)(ptr + SIZEOF_STRUCT_MEM + size);
 8018ea2:	69fa      	ldr	r2, [r7, #28]
 8018ea4:	69bb      	ldr	r3, [r7, #24]
 8018ea6:	4413      	add	r3, r2
 8018ea8:	330c      	adds	r3, #12
 8018eaa:	60fb      	str	r3, [r7, #12]
          LWIP_ASSERT("invalid next ptr",ptr2 != MEM_SIZE_ALIGNED);
 8018eac:	68fb      	ldr	r3, [r7, #12]
 8018eae:	4a4f      	ldr	r2, [pc, #316]	@ (8018fec <mem_malloc+0x1d0>)
 8018eb0:	4293      	cmp	r3, r2
 8018eb2:	d106      	bne.n	8018ec2 <mem_malloc+0xa6>
 8018eb4:	4b50      	ldr	r3, [pc, #320]	@ (8018ff8 <mem_malloc+0x1dc>)
 8018eb6:	f240 3287 	movw	r2, #903	@ 0x387
 8018eba:	4950      	ldr	r1, [pc, #320]	@ (8018ffc <mem_malloc+0x1e0>)
 8018ebc:	4850      	ldr	r0, [pc, #320]	@ (8019000 <mem_malloc+0x1e4>)
 8018ebe:	f010 fb25 	bl	802950c <iprintf>
          /* create mem2 struct */
          mem2 = ptr_to_mem(ptr2);
 8018ec2:	68f8      	ldr	r0, [r7, #12]
 8018ec4:	f7ff fcca 	bl	801885c <ptr_to_mem>
 8018ec8:	60b8      	str	r0, [r7, #8]
          mem2->used = 0;
 8018eca:	68bb      	ldr	r3, [r7, #8]
 8018ecc:	2200      	movs	r2, #0
 8018ece:	721a      	strb	r2, [r3, #8]
          mem2->next = mem->next;
 8018ed0:	693b      	ldr	r3, [r7, #16]
 8018ed2:	681a      	ldr	r2, [r3, #0]
 8018ed4:	68bb      	ldr	r3, [r7, #8]
 8018ed6:	601a      	str	r2, [r3, #0]
          mem2->prev = ptr;
 8018ed8:	68bb      	ldr	r3, [r7, #8]
 8018eda:	69fa      	ldr	r2, [r7, #28]
 8018edc:	605a      	str	r2, [r3, #4]
          /* and insert it between mem and mem->next */
          mem->next = ptr2;
 8018ede:	693b      	ldr	r3, [r7, #16]
 8018ee0:	68fa      	ldr	r2, [r7, #12]
 8018ee2:	601a      	str	r2, [r3, #0]
          mem->used = 1;
 8018ee4:	693b      	ldr	r3, [r7, #16]
 8018ee6:	2201      	movs	r2, #1
 8018ee8:	721a      	strb	r2, [r3, #8]

          if (mem2->next != MEM_SIZE_ALIGNED) {
 8018eea:	68bb      	ldr	r3, [r7, #8]
 8018eec:	681b      	ldr	r3, [r3, #0]
 8018eee:	4a3f      	ldr	r2, [pc, #252]	@ (8018fec <mem_malloc+0x1d0>)
 8018ef0:	4293      	cmp	r3, r2
 8018ef2:	d00b      	beq.n	8018f0c <mem_malloc+0xf0>
            ptr_to_mem(mem2->next)->prev = ptr2;
 8018ef4:	68bb      	ldr	r3, [r7, #8]
 8018ef6:	681b      	ldr	r3, [r3, #0]
 8018ef8:	4618      	mov	r0, r3
 8018efa:	f7ff fcaf 	bl	801885c <ptr_to_mem>
 8018efe:	4602      	mov	r2, r0
 8018f00:	68fb      	ldr	r3, [r7, #12]
 8018f02:	6053      	str	r3, [r2, #4]
 8018f04:	e002      	b.n	8018f0c <mem_malloc+0xf0>
           * take care of this).
           * -> near fit or exact fit: do not split, no mem2 creation
           * also can't move mem->next directly behind mem, since mem->next
           * will always be used at this point!
           */
          mem->used = 1;
 8018f06:	693b      	ldr	r3, [r7, #16]
 8018f08:	2201      	movs	r2, #1
 8018f0a:	721a      	strb	r2, [r3, #8]
          MEM_STATS_INC_USED(used, mem->next - mem_to_ptr(mem));
        }
#if LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT
mem_malloc_adjust_lfree:
#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */
        if (mem == lfree) {
 8018f0c:	4b39      	ldr	r3, [pc, #228]	@ (8018ff4 <mem_malloc+0x1d8>)
 8018f0e:	681b      	ldr	r3, [r3, #0]
 8018f10:	693a      	ldr	r2, [r7, #16]
 8018f12:	429a      	cmp	r2, r3
 8018f14:	d127      	bne.n	8018f66 <mem_malloc+0x14a>
          struct mem *cur = lfree;
 8018f16:	4b37      	ldr	r3, [pc, #220]	@ (8018ff4 <mem_malloc+0x1d8>)
 8018f18:	681b      	ldr	r3, [r3, #0]
 8018f1a:	617b      	str	r3, [r7, #20]
          /* Find next free block after mem and update lowest free pointer */
          while (cur->used && cur != ram_end) {
 8018f1c:	e005      	b.n	8018f2a <mem_malloc+0x10e>
              /* If mem_free or mem_trim have run, we have to restart since they
                 could have altered our current struct mem or lfree. */
              goto mem_malloc_adjust_lfree;
            }
#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */
            cur = ptr_to_mem(cur->next);
 8018f1e:	697b      	ldr	r3, [r7, #20]
 8018f20:	681b      	ldr	r3, [r3, #0]
 8018f22:	4618      	mov	r0, r3
 8018f24:	f7ff fc9a 	bl	801885c <ptr_to_mem>
 8018f28:	6178      	str	r0, [r7, #20]
          while (cur->used && cur != ram_end) {
 8018f2a:	697b      	ldr	r3, [r7, #20]
 8018f2c:	7a1b      	ldrb	r3, [r3, #8]
 8018f2e:	2b00      	cmp	r3, #0
 8018f30:	d004      	beq.n	8018f3c <mem_malloc+0x120>
 8018f32:	4b34      	ldr	r3, [pc, #208]	@ (8019004 <mem_malloc+0x1e8>)
 8018f34:	681b      	ldr	r3, [r3, #0]
 8018f36:	697a      	ldr	r2, [r7, #20]
 8018f38:	429a      	cmp	r2, r3
 8018f3a:	d1f0      	bne.n	8018f1e <mem_malloc+0x102>
          }
          lfree = cur;
 8018f3c:	4a2d      	ldr	r2, [pc, #180]	@ (8018ff4 <mem_malloc+0x1d8>)
 8018f3e:	697b      	ldr	r3, [r7, #20]
 8018f40:	6013      	str	r3, [r2, #0]
          LWIP_ASSERT("mem_malloc: !lfree->used", ((lfree == ram_end) || (!lfree->used)));
 8018f42:	4b2c      	ldr	r3, [pc, #176]	@ (8018ff4 <mem_malloc+0x1d8>)
 8018f44:	681a      	ldr	r2, [r3, #0]
 8018f46:	4b2f      	ldr	r3, [pc, #188]	@ (8019004 <mem_malloc+0x1e8>)
 8018f48:	681b      	ldr	r3, [r3, #0]
 8018f4a:	429a      	cmp	r2, r3
 8018f4c:	d00b      	beq.n	8018f66 <mem_malloc+0x14a>
 8018f4e:	4b29      	ldr	r3, [pc, #164]	@ (8018ff4 <mem_malloc+0x1d8>)
 8018f50:	681b      	ldr	r3, [r3, #0]
 8018f52:	7a1b      	ldrb	r3, [r3, #8]
 8018f54:	2b00      	cmp	r3, #0
 8018f56:	d006      	beq.n	8018f66 <mem_malloc+0x14a>
 8018f58:	4b27      	ldr	r3, [pc, #156]	@ (8018ff8 <mem_malloc+0x1dc>)
 8018f5a:	f240 32b5 	movw	r2, #949	@ 0x3b5
 8018f5e:	492a      	ldr	r1, [pc, #168]	@ (8019008 <mem_malloc+0x1ec>)
 8018f60:	4827      	ldr	r0, [pc, #156]	@ (8019000 <mem_malloc+0x1e4>)
 8018f62:	f010 fad3 	bl	802950c <iprintf>
        }
        LWIP_MEM_ALLOC_UNPROTECT();
        sys_mutex_unlock(&mem_mutex);
 8018f66:	4822      	ldr	r0, [pc, #136]	@ (8018ff0 <mem_malloc+0x1d4>)
 8018f68:	f00d f80d 	bl	8025f86 <sys_mutex_unlock>
        LWIP_ASSERT("mem_malloc: allocated memory not above ram_end.",
 8018f6c:	693a      	ldr	r2, [r7, #16]
 8018f6e:	69bb      	ldr	r3, [r7, #24]
 8018f70:	4413      	add	r3, r2
 8018f72:	330c      	adds	r3, #12
 8018f74:	4a23      	ldr	r2, [pc, #140]	@ (8019004 <mem_malloc+0x1e8>)
 8018f76:	6812      	ldr	r2, [r2, #0]
 8018f78:	4293      	cmp	r3, r2
 8018f7a:	d906      	bls.n	8018f8a <mem_malloc+0x16e>
 8018f7c:	4b1e      	ldr	r3, [pc, #120]	@ (8018ff8 <mem_malloc+0x1dc>)
 8018f7e:	f240 32b9 	movw	r2, #953	@ 0x3b9
 8018f82:	4922      	ldr	r1, [pc, #136]	@ (801900c <mem_malloc+0x1f0>)
 8018f84:	481e      	ldr	r0, [pc, #120]	@ (8019000 <mem_malloc+0x1e4>)
 8018f86:	f010 fac1 	bl	802950c <iprintf>
                    (mem_ptr_t)mem + SIZEOF_STRUCT_MEM + size <= (mem_ptr_t)ram_end);
        LWIP_ASSERT("mem_malloc: allocated memory properly aligned.",
 8018f8a:	693b      	ldr	r3, [r7, #16]
 8018f8c:	f003 0303 	and.w	r3, r3, #3
 8018f90:	2b00      	cmp	r3, #0
 8018f92:	d006      	beq.n	8018fa2 <mem_malloc+0x186>
 8018f94:	4b18      	ldr	r3, [pc, #96]	@ (8018ff8 <mem_malloc+0x1dc>)
 8018f96:	f240 32bb 	movw	r2, #955	@ 0x3bb
 8018f9a:	491d      	ldr	r1, [pc, #116]	@ (8019010 <mem_malloc+0x1f4>)
 8018f9c:	4818      	ldr	r0, [pc, #96]	@ (8019000 <mem_malloc+0x1e4>)
 8018f9e:	f010 fab5 	bl	802950c <iprintf>
                    ((mem_ptr_t)mem + SIZEOF_STRUCT_MEM) % MEM_ALIGNMENT == 0);
        LWIP_ASSERT("mem_malloc: sanity check alignment",
 8018fa2:	693b      	ldr	r3, [r7, #16]
 8018fa4:	f003 0303 	and.w	r3, r3, #3
 8018fa8:	2b00      	cmp	r3, #0
 8018faa:	d006      	beq.n	8018fba <mem_malloc+0x19e>
 8018fac:	4b12      	ldr	r3, [pc, #72]	@ (8018ff8 <mem_malloc+0x1dc>)
 8018fae:	f240 32bd 	movw	r2, #957	@ 0x3bd
 8018fb2:	4918      	ldr	r1, [pc, #96]	@ (8019014 <mem_malloc+0x1f8>)
 8018fb4:	4812      	ldr	r0, [pc, #72]	@ (8019000 <mem_malloc+0x1e4>)
 8018fb6:	f010 faa9 	bl	802950c <iprintf>

#if MEM_OVERFLOW_CHECK
        mem_overflow_init_element(mem, size_in);
#endif
        MEM_SANITY();
        return (u8_t *)mem + SIZEOF_STRUCT_MEM + MEM_SANITY_OFFSET;
 8018fba:	693b      	ldr	r3, [r7, #16]
 8018fbc:	330c      	adds	r3, #12
 8018fbe:	e010      	b.n	8018fe2 <mem_malloc+0x1c6>
         ptr = ptr_to_mem(ptr)->next) {
 8018fc0:	69f8      	ldr	r0, [r7, #28]
 8018fc2:	f7ff fc4b 	bl	801885c <ptr_to_mem>
 8018fc6:	4603      	mov	r3, r0
 8018fc8:	681b      	ldr	r3, [r3, #0]
 8018fca:	61fb      	str	r3, [r7, #28]
    for (ptr = mem_to_ptr(lfree); ptr < MEM_SIZE_ALIGNED - size;
 8018fcc:	69ba      	ldr	r2, [r7, #24]
 8018fce:	4b07      	ldr	r3, [pc, #28]	@ (8018fec <mem_malloc+0x1d0>)
 8018fd0:	1a9b      	subs	r3, r3, r2
 8018fd2:	69fa      	ldr	r2, [r7, #28]
 8018fd4:	429a      	cmp	r2, r3
 8018fd6:	f4ff af48 	bcc.w	8018e6a <mem_malloc+0x4e>
    /* if we got interrupted by a mem_free, try again */
  } while (local_mem_free_count != 0);
#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */
  MEM_STATS_INC(err);
  LWIP_MEM_ALLOC_UNPROTECT();
  sys_mutex_unlock(&mem_mutex);
 8018fda:	4805      	ldr	r0, [pc, #20]	@ (8018ff0 <mem_malloc+0x1d4>)
 8018fdc:	f00c ffd3 	bl	8025f86 <sys_mutex_unlock>
  LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("mem_malloc: could not allocate %"S16_F" bytes\n", (s16_t)size));
  return NULL;
 8018fe0:	2300      	movs	r3, #0
}
 8018fe2:	4618      	mov	r0, r3
 8018fe4:	3720      	adds	r7, #32
 8018fe6:	46bd      	mov	sp, r7
 8018fe8:	bd80      	pop	{r7, pc}
 8018fea:	bf00      	nop
 8018fec:	0001ffe8 	.word	0x0001ffe8
 8018ff0:	240234bc 	.word	0x240234bc
 8018ff4:	240234c0 	.word	0x240234c0
 8018ff8:	0802d610 	.word	0x0802d610
 8018ffc:	0802d7d4 	.word	0x0802d7d4
 8019000:	0802d658 	.word	0x0802d658
 8019004:	240234b8 	.word	0x240234b8
 8019008:	0802d7e8 	.word	0x0802d7e8
 801900c:	0802d804 	.word	0x0802d804
 8019010:	0802d834 	.word	0x0802d834
 8019014:	0802d864 	.word	0x0802d864

08019018 <memp_init_pool>:
 *
 * @param desc pool to initialize
 */
void
memp_init_pool(const struct memp_desc *desc)
{
 8019018:	b480      	push	{r7}
 801901a:	b085      	sub	sp, #20
 801901c:	af00      	add	r7, sp, #0
 801901e:	6078      	str	r0, [r7, #4]
  LWIP_UNUSED_ARG(desc);
#else
  int i;
  struct memp *memp;

  *desc->tab = NULL;
 8019020:	687b      	ldr	r3, [r7, #4]
 8019022:	68db      	ldr	r3, [r3, #12]
 8019024:	2200      	movs	r2, #0
 8019026:	601a      	str	r2, [r3, #0]
  memp = (struct memp *)LWIP_MEM_ALIGN(desc->base);
 8019028:	687b      	ldr	r3, [r7, #4]
 801902a:	689b      	ldr	r3, [r3, #8]
 801902c:	3303      	adds	r3, #3
 801902e:	f023 0303 	bic.w	r3, r3, #3
 8019032:	60bb      	str	r3, [r7, #8]
                                       + MEM_SANITY_REGION_AFTER_ALIGNED
#endif
                                      ));
#endif
  /* create a linked list of memp elements */
  for (i = 0; i < desc->num; ++i) {
 8019034:	2300      	movs	r3, #0
 8019036:	60fb      	str	r3, [r7, #12]
 8019038:	e011      	b.n	801905e <memp_init_pool+0x46>
    memp->next = *desc->tab;
 801903a:	687b      	ldr	r3, [r7, #4]
 801903c:	68db      	ldr	r3, [r3, #12]
 801903e:	681a      	ldr	r2, [r3, #0]
 8019040:	68bb      	ldr	r3, [r7, #8]
 8019042:	601a      	str	r2, [r3, #0]
    *desc->tab = memp;
 8019044:	687b      	ldr	r3, [r7, #4]
 8019046:	68db      	ldr	r3, [r3, #12]
 8019048:	68ba      	ldr	r2, [r7, #8]
 801904a:	601a      	str	r2, [r3, #0]
#if MEMP_OVERFLOW_CHECK
    memp_overflow_init_element(memp, desc);
#endif /* MEMP_OVERFLOW_CHECK */
    /* cast through void* to get rid of alignment warnings */
    memp = (struct memp *)(void *)((u8_t *)memp + MEMP_SIZE + desc->size
 801904c:	687b      	ldr	r3, [r7, #4]
 801904e:	889b      	ldrh	r3, [r3, #4]
 8019050:	461a      	mov	r2, r3
 8019052:	68bb      	ldr	r3, [r7, #8]
 8019054:	4413      	add	r3, r2
 8019056:	60bb      	str	r3, [r7, #8]
  for (i = 0; i < desc->num; ++i) {
 8019058:	68fb      	ldr	r3, [r7, #12]
 801905a:	3301      	adds	r3, #1
 801905c:	60fb      	str	r3, [r7, #12]
 801905e:	687b      	ldr	r3, [r7, #4]
 8019060:	88db      	ldrh	r3, [r3, #6]
 8019062:	461a      	mov	r2, r3
 8019064:	68fb      	ldr	r3, [r7, #12]
 8019066:	4293      	cmp	r3, r2
 8019068:	dbe7      	blt.n	801903a <memp_init_pool+0x22>
#endif /* !MEMP_MEM_MALLOC */

#if MEMP_STATS && (defined(LWIP_DEBUG) || LWIP_STATS_DISPLAY)
  desc->stats->name  = desc->desc;
#endif /* MEMP_STATS && (defined(LWIP_DEBUG) || LWIP_STATS_DISPLAY) */
}
 801906a:	bf00      	nop
 801906c:	bf00      	nop
 801906e:	3714      	adds	r7, #20
 8019070:	46bd      	mov	sp, r7
 8019072:	f85d 7b04 	ldr.w	r7, [sp], #4
 8019076:	4770      	bx	lr

08019078 <memp_init>:
 *
 * Carves out memp_memory into linked lists for each pool-type.
 */
void
memp_init(void)
{
 8019078:	b580      	push	{r7, lr}
 801907a:	b082      	sub	sp, #8
 801907c:	af00      	add	r7, sp, #0
  u16_t i;

  /* for every pool: */
  for (i = 0; i < LWIP_ARRAYSIZE(memp_pools); i++) {
 801907e:	2300      	movs	r3, #0
 8019080:	80fb      	strh	r3, [r7, #6]
 8019082:	e009      	b.n	8019098 <memp_init+0x20>
    memp_init_pool(memp_pools[i]);
 8019084:	88fb      	ldrh	r3, [r7, #6]
 8019086:	4a08      	ldr	r2, [pc, #32]	@ (80190a8 <memp_init+0x30>)
 8019088:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
 801908c:	4618      	mov	r0, r3
 801908e:	f7ff ffc3 	bl	8019018 <memp_init_pool>
  for (i = 0; i < LWIP_ARRAYSIZE(memp_pools); i++) {
 8019092:	88fb      	ldrh	r3, [r7, #6]
 8019094:	3301      	adds	r3, #1
 8019096:	80fb      	strh	r3, [r7, #6]
 8019098:	88fb      	ldrh	r3, [r7, #6]
 801909a:	2b0c      	cmp	r3, #12
 801909c:	d9f2      	bls.n	8019084 <memp_init+0xc>

#if MEMP_OVERFLOW_CHECK >= 2
  /* check everything a first time to see if it worked */
  memp_overflow_check_all();
#endif /* MEMP_OVERFLOW_CHECK >= 2 */
}
 801909e:	bf00      	nop
 80190a0:	bf00      	nop
 80190a2:	3708      	adds	r7, #8
 80190a4:	46bd      	mov	sp, r7
 80190a6:	bd80      	pop	{r7, pc}
 80190a8:	08030720 	.word	0x08030720

080190ac <do_memp_malloc_pool>:
#if !MEMP_OVERFLOW_CHECK
do_memp_malloc_pool(const struct memp_desc *desc)
#else
do_memp_malloc_pool_fn(const struct memp_desc *desc, const char *file, const int line)
#endif
{
 80190ac:	b580      	push	{r7, lr}
 80190ae:	b084      	sub	sp, #16
 80190b0:	af00      	add	r7, sp, #0
 80190b2:	6078      	str	r0, [r7, #4]

#if MEMP_MEM_MALLOC
  memp = (struct memp *)mem_malloc(MEMP_SIZE + MEMP_ALIGN_SIZE(desc->size));
  SYS_ARCH_PROTECT(old_level);
#else /* MEMP_MEM_MALLOC */
  SYS_ARCH_PROTECT(old_level);
 80190b4:	f00c ff94 	bl	8025fe0 <sys_arch_protect>
 80190b8:	60f8      	str	r0, [r7, #12]

  memp = *desc->tab;
 80190ba:	687b      	ldr	r3, [r7, #4]
 80190bc:	68db      	ldr	r3, [r3, #12]
 80190be:	681b      	ldr	r3, [r3, #0]
 80190c0:	60bb      	str	r3, [r7, #8]
#endif /* MEMP_MEM_MALLOC */

  if (memp != NULL) {
 80190c2:	68bb      	ldr	r3, [r7, #8]
 80190c4:	2b00      	cmp	r3, #0
 80190c6:	d015      	beq.n	80190f4 <do_memp_malloc_pool+0x48>
#if !MEMP_MEM_MALLOC
#if MEMP_OVERFLOW_CHECK == 1
    memp_overflow_check_element(memp, desc);
#endif /* MEMP_OVERFLOW_CHECK */

    *desc->tab = memp->next;
 80190c8:	687b      	ldr	r3, [r7, #4]
 80190ca:	68db      	ldr	r3, [r3, #12]
 80190cc:	68ba      	ldr	r2, [r7, #8]
 80190ce:	6812      	ldr	r2, [r2, #0]
 80190d0:	601a      	str	r2, [r3, #0]
    memp->line = line;
#if MEMP_MEM_MALLOC
    memp_overflow_init_element(memp, desc);
#endif /* MEMP_MEM_MALLOC */
#endif /* MEMP_OVERFLOW_CHECK */
    LWIP_ASSERT("memp_malloc: memp properly aligned",
 80190d2:	68bb      	ldr	r3, [r7, #8]
 80190d4:	f003 0303 	and.w	r3, r3, #3
 80190d8:	2b00      	cmp	r3, #0
 80190da:	d006      	beq.n	80190ea <do_memp_malloc_pool+0x3e>
 80190dc:	4b09      	ldr	r3, [pc, #36]	@ (8019104 <do_memp_malloc_pool+0x58>)
 80190de:	f44f 728c 	mov.w	r2, #280	@ 0x118
 80190e2:	4909      	ldr	r1, [pc, #36]	@ (8019108 <do_memp_malloc_pool+0x5c>)
 80190e4:	4809      	ldr	r0, [pc, #36]	@ (801910c <do_memp_malloc_pool+0x60>)
 80190e6:	f010 fa11 	bl	802950c <iprintf>
    desc->stats->used++;
    if (desc->stats->used > desc->stats->max) {
      desc->stats->max = desc->stats->used;
    }
#endif
    SYS_ARCH_UNPROTECT(old_level);
 80190ea:	68f8      	ldr	r0, [r7, #12]
 80190ec:	f00c ff86 	bl	8025ffc <sys_arch_unprotect>
    /* cast through u8_t* to get rid of alignment warnings */
    return ((u8_t *)memp + MEMP_SIZE);
 80190f0:	68bb      	ldr	r3, [r7, #8]
 80190f2:	e003      	b.n	80190fc <do_memp_malloc_pool+0x50>
  } else {
#if MEMP_STATS
    desc->stats->err++;
#endif
    SYS_ARCH_UNPROTECT(old_level);
 80190f4:	68f8      	ldr	r0, [r7, #12]
 80190f6:	f00c ff81 	bl	8025ffc <sys_arch_unprotect>
    LWIP_DEBUGF(MEMP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("memp_malloc: out of memory in pool %s\n", desc->desc));
  }

  return NULL;
 80190fa:	2300      	movs	r3, #0
}
 80190fc:	4618      	mov	r0, r3
 80190fe:	3710      	adds	r7, #16
 8019100:	46bd      	mov	sp, r7
 8019102:	bd80      	pop	{r7, pc}
 8019104:	0802d920 	.word	0x0802d920
 8019108:	0802d950 	.word	0x0802d950
 801910c:	0802d974 	.word	0x0802d974

08019110 <memp_malloc_pool>:
#if !MEMP_OVERFLOW_CHECK
memp_malloc_pool(const struct memp_desc *desc)
#else
memp_malloc_pool_fn(const struct memp_desc *desc, const char *file, const int line)
#endif
{
 8019110:	b580      	push	{r7, lr}
 8019112:	b082      	sub	sp, #8
 8019114:	af00      	add	r7, sp, #0
 8019116:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT("invalid pool desc", desc != NULL);
 8019118:	687b      	ldr	r3, [r7, #4]
 801911a:	2b00      	cmp	r3, #0
 801911c:	d106      	bne.n	801912c <memp_malloc_pool+0x1c>
 801911e:	4b0a      	ldr	r3, [pc, #40]	@ (8019148 <memp_malloc_pool+0x38>)
 8019120:	f44f 729e 	mov.w	r2, #316	@ 0x13c
 8019124:	4909      	ldr	r1, [pc, #36]	@ (801914c <memp_malloc_pool+0x3c>)
 8019126:	480a      	ldr	r0, [pc, #40]	@ (8019150 <memp_malloc_pool+0x40>)
 8019128:	f010 f9f0 	bl	802950c <iprintf>
  if (desc == NULL) {
 801912c:	687b      	ldr	r3, [r7, #4]
 801912e:	2b00      	cmp	r3, #0
 8019130:	d101      	bne.n	8019136 <memp_malloc_pool+0x26>
    return NULL;
 8019132:	2300      	movs	r3, #0
 8019134:	e003      	b.n	801913e <memp_malloc_pool+0x2e>
  }

#if !MEMP_OVERFLOW_CHECK
  return do_memp_malloc_pool(desc);
 8019136:	6878      	ldr	r0, [r7, #4]
 8019138:	f7ff ffb8 	bl	80190ac <do_memp_malloc_pool>
 801913c:	4603      	mov	r3, r0
#else
  return do_memp_malloc_pool_fn(desc, file, line);
#endif
}
 801913e:	4618      	mov	r0, r3
 8019140:	3708      	adds	r7, #8
 8019142:	46bd      	mov	sp, r7
 8019144:	bd80      	pop	{r7, pc}
 8019146:	bf00      	nop
 8019148:	0802d920 	.word	0x0802d920
 801914c:	0802d99c 	.word	0x0802d99c
 8019150:	0802d974 	.word	0x0802d974

08019154 <memp_malloc>:
#if !MEMP_OVERFLOW_CHECK
memp_malloc(memp_t type)
#else
memp_malloc_fn(memp_t type, const char *file, const int line)
#endif
{
 8019154:	b580      	push	{r7, lr}
 8019156:	b084      	sub	sp, #16
 8019158:	af00      	add	r7, sp, #0
 801915a:	4603      	mov	r3, r0
 801915c:	71fb      	strb	r3, [r7, #7]
  void *memp;
  LWIP_ERROR("memp_malloc: type < MEMP_MAX", (type < MEMP_MAX), return NULL;);
 801915e:	79fb      	ldrb	r3, [r7, #7]
 8019160:	2b0c      	cmp	r3, #12
 8019162:	d908      	bls.n	8019176 <memp_malloc+0x22>
 8019164:	4b0a      	ldr	r3, [pc, #40]	@ (8019190 <memp_malloc+0x3c>)
 8019166:	f240 1257 	movw	r2, #343	@ 0x157
 801916a:	490a      	ldr	r1, [pc, #40]	@ (8019194 <memp_malloc+0x40>)
 801916c:	480a      	ldr	r0, [pc, #40]	@ (8019198 <memp_malloc+0x44>)
 801916e:	f010 f9cd 	bl	802950c <iprintf>
 8019172:	2300      	movs	r3, #0
 8019174:	e008      	b.n	8019188 <memp_malloc+0x34>
#if MEMP_OVERFLOW_CHECK >= 2
  memp_overflow_check_all();
#endif /* MEMP_OVERFLOW_CHECK >= 2 */

#if !MEMP_OVERFLOW_CHECK
  memp = do_memp_malloc_pool(memp_pools[type]);
 8019176:	79fb      	ldrb	r3, [r7, #7]
 8019178:	4a08      	ldr	r2, [pc, #32]	@ (801919c <memp_malloc+0x48>)
 801917a:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
 801917e:	4618      	mov	r0, r3
 8019180:	f7ff ff94 	bl	80190ac <do_memp_malloc_pool>
 8019184:	60f8      	str	r0, [r7, #12]
#else
  memp = do_memp_malloc_pool_fn(memp_pools[type], file, line);
#endif

  return memp;
 8019186:	68fb      	ldr	r3, [r7, #12]
}
 8019188:	4618      	mov	r0, r3
 801918a:	3710      	adds	r7, #16
 801918c:	46bd      	mov	sp, r7
 801918e:	bd80      	pop	{r7, pc}
 8019190:	0802d920 	.word	0x0802d920
 8019194:	0802d9b0 	.word	0x0802d9b0
 8019198:	0802d974 	.word	0x0802d974
 801919c:	08030720 	.word	0x08030720

080191a0 <do_memp_free_pool>:

static void
do_memp_free_pool(const struct memp_desc *desc, void *mem)
{
 80191a0:	b580      	push	{r7, lr}
 80191a2:	b084      	sub	sp, #16
 80191a4:	af00      	add	r7, sp, #0
 80191a6:	6078      	str	r0, [r7, #4]
 80191a8:	6039      	str	r1, [r7, #0]
  struct memp *memp;
  SYS_ARCH_DECL_PROTECT(old_level);

  LWIP_ASSERT("memp_free: mem properly aligned",
 80191aa:	683b      	ldr	r3, [r7, #0]
 80191ac:	f003 0303 	and.w	r3, r3, #3
 80191b0:	2b00      	cmp	r3, #0
 80191b2:	d006      	beq.n	80191c2 <do_memp_free_pool+0x22>
 80191b4:	4b0d      	ldr	r3, [pc, #52]	@ (80191ec <do_memp_free_pool+0x4c>)
 80191b6:	f44f 72b6 	mov.w	r2, #364	@ 0x16c
 80191ba:	490d      	ldr	r1, [pc, #52]	@ (80191f0 <do_memp_free_pool+0x50>)
 80191bc:	480d      	ldr	r0, [pc, #52]	@ (80191f4 <do_memp_free_pool+0x54>)
 80191be:	f010 f9a5 	bl	802950c <iprintf>
              ((mem_ptr_t)mem % MEM_ALIGNMENT) == 0);

  /* cast through void* to get rid of alignment warnings */
  memp = (struct memp *)(void *)((u8_t *)mem - MEMP_SIZE);
 80191c2:	683b      	ldr	r3, [r7, #0]
 80191c4:	60fb      	str	r3, [r7, #12]

  SYS_ARCH_PROTECT(old_level);
 80191c6:	f00c ff0b 	bl	8025fe0 <sys_arch_protect>
 80191ca:	60b8      	str	r0, [r7, #8]
#if MEMP_MEM_MALLOC
  LWIP_UNUSED_ARG(desc);
  SYS_ARCH_UNPROTECT(old_level);
  mem_free(memp);
#else /* MEMP_MEM_MALLOC */
  memp->next = *desc->tab;
 80191cc:	687b      	ldr	r3, [r7, #4]
 80191ce:	68db      	ldr	r3, [r3, #12]
 80191d0:	681a      	ldr	r2, [r3, #0]
 80191d2:	68fb      	ldr	r3, [r7, #12]
 80191d4:	601a      	str	r2, [r3, #0]
  *desc->tab = memp;
 80191d6:	687b      	ldr	r3, [r7, #4]
 80191d8:	68db      	ldr	r3, [r3, #12]
 80191da:	68fa      	ldr	r2, [r7, #12]
 80191dc:	601a      	str	r2, [r3, #0]

#if MEMP_SANITY_CHECK
  LWIP_ASSERT("memp sanity", memp_sanity(desc));
#endif /* MEMP_SANITY_CHECK */

  SYS_ARCH_UNPROTECT(old_level);
 80191de:	68b8      	ldr	r0, [r7, #8]
 80191e0:	f00c ff0c 	bl	8025ffc <sys_arch_unprotect>
#endif /* !MEMP_MEM_MALLOC */
}
 80191e4:	bf00      	nop
 80191e6:	3710      	adds	r7, #16
 80191e8:	46bd      	mov	sp, r7
 80191ea:	bd80      	pop	{r7, pc}
 80191ec:	0802d920 	.word	0x0802d920
 80191f0:	0802d9d0 	.word	0x0802d9d0
 80191f4:	0802d974 	.word	0x0802d974

080191f8 <memp_free_pool>:
 * @param desc the pool where to put mem
 * @param mem the memp element to free
 */
void
memp_free_pool(const struct memp_desc *desc, void *mem)
{
 80191f8:	b580      	push	{r7, lr}
 80191fa:	b082      	sub	sp, #8
 80191fc:	af00      	add	r7, sp, #0
 80191fe:	6078      	str	r0, [r7, #4]
 8019200:	6039      	str	r1, [r7, #0]
  LWIP_ASSERT("invalid pool desc", desc != NULL);
 8019202:	687b      	ldr	r3, [r7, #4]
 8019204:	2b00      	cmp	r3, #0
 8019206:	d106      	bne.n	8019216 <memp_free_pool+0x1e>
 8019208:	4b0a      	ldr	r3, [pc, #40]	@ (8019234 <memp_free_pool+0x3c>)
 801920a:	f240 1295 	movw	r2, #405	@ 0x195
 801920e:	490a      	ldr	r1, [pc, #40]	@ (8019238 <memp_free_pool+0x40>)
 8019210:	480a      	ldr	r0, [pc, #40]	@ (801923c <memp_free_pool+0x44>)
 8019212:	f010 f97b 	bl	802950c <iprintf>
  if ((desc == NULL) || (mem == NULL)) {
 8019216:	687b      	ldr	r3, [r7, #4]
 8019218:	2b00      	cmp	r3, #0
 801921a:	d007      	beq.n	801922c <memp_free_pool+0x34>
 801921c:	683b      	ldr	r3, [r7, #0]
 801921e:	2b00      	cmp	r3, #0
 8019220:	d004      	beq.n	801922c <memp_free_pool+0x34>
    return;
  }

  do_memp_free_pool(desc, mem);
 8019222:	6839      	ldr	r1, [r7, #0]
 8019224:	6878      	ldr	r0, [r7, #4]
 8019226:	f7ff ffbb 	bl	80191a0 <do_memp_free_pool>
 801922a:	e000      	b.n	801922e <memp_free_pool+0x36>
    return;
 801922c:	bf00      	nop
}
 801922e:	3708      	adds	r7, #8
 8019230:	46bd      	mov	sp, r7
 8019232:	bd80      	pop	{r7, pc}
 8019234:	0802d920 	.word	0x0802d920
 8019238:	0802d99c 	.word	0x0802d99c
 801923c:	0802d974 	.word	0x0802d974

08019240 <memp_free>:
 * @param type the pool where to put mem
 * @param mem the memp element to free
 */
void
memp_free(memp_t type, void *mem)
{
 8019240:	b580      	push	{r7, lr}
 8019242:	b082      	sub	sp, #8
 8019244:	af00      	add	r7, sp, #0
 8019246:	4603      	mov	r3, r0
 8019248:	6039      	str	r1, [r7, #0]
 801924a:	71fb      	strb	r3, [r7, #7]
#ifdef LWIP_HOOK_MEMP_AVAILABLE
  struct memp *old_first;
#endif

  LWIP_ERROR("memp_free: type < MEMP_MAX", (type < MEMP_MAX), return;);
 801924c:	79fb      	ldrb	r3, [r7, #7]
 801924e:	2b0c      	cmp	r3, #12
 8019250:	d907      	bls.n	8019262 <memp_free+0x22>
 8019252:	4b0c      	ldr	r3, [pc, #48]	@ (8019284 <memp_free+0x44>)
 8019254:	f44f 72d5 	mov.w	r2, #426	@ 0x1aa
 8019258:	490b      	ldr	r1, [pc, #44]	@ (8019288 <memp_free+0x48>)
 801925a:	480c      	ldr	r0, [pc, #48]	@ (801928c <memp_free+0x4c>)
 801925c:	f010 f956 	bl	802950c <iprintf>
 8019260:	e00c      	b.n	801927c <memp_free+0x3c>

  if (mem == NULL) {
 8019262:	683b      	ldr	r3, [r7, #0]
 8019264:	2b00      	cmp	r3, #0
 8019266:	d008      	beq.n	801927a <memp_free+0x3a>

#ifdef LWIP_HOOK_MEMP_AVAILABLE
  old_first = *memp_pools[type]->tab;
#endif

  do_memp_free_pool(memp_pools[type], mem);
 8019268:	79fb      	ldrb	r3, [r7, #7]
 801926a:	4a09      	ldr	r2, [pc, #36]	@ (8019290 <memp_free+0x50>)
 801926c:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
 8019270:	6839      	ldr	r1, [r7, #0]
 8019272:	4618      	mov	r0, r3
 8019274:	f7ff ff94 	bl	80191a0 <do_memp_free_pool>
 8019278:	e000      	b.n	801927c <memp_free+0x3c>
    return;
 801927a:	bf00      	nop
#ifdef LWIP_HOOK_MEMP_AVAILABLE
  if (old_first == NULL) {
    LWIP_HOOK_MEMP_AVAILABLE(type);
  }
#endif
}
 801927c:	3708      	adds	r7, #8
 801927e:	46bd      	mov	sp, r7
 8019280:	bd80      	pop	{r7, pc}
 8019282:	bf00      	nop
 8019284:	0802d920 	.word	0x0802d920
 8019288:	0802d9f0 	.word	0x0802d9f0
 801928c:	0802d974 	.word	0x0802d974
 8019290:	08030720 	.word	0x08030720

08019294 <netif_init>:
}
#endif /* LWIP_HAVE_LOOPIF */

void
netif_init(void)
{
 8019294:	b480      	push	{r7}
 8019296:	af00      	add	r7, sp, #0

  netif_set_link_up(&loop_netif);
  netif_set_up(&loop_netif);

#endif /* LWIP_HAVE_LOOPIF */
}
 8019298:	bf00      	nop
 801929a:	46bd      	mov	sp, r7
 801929c:	f85d 7b04 	ldr.w	r7, [sp], #4
 80192a0:	4770      	bx	lr
	...

080192a4 <netif_add>:
netif_add(struct netif *netif,
#if LWIP_IPV4
          const ip4_addr_t *ipaddr, const ip4_addr_t *netmask, const ip4_addr_t *gw,
#endif /* LWIP_IPV4 */
          void *state, netif_init_fn init, netif_input_fn input)
{
 80192a4:	b580      	push	{r7, lr}
 80192a6:	b086      	sub	sp, #24
 80192a8:	af00      	add	r7, sp, #0
 80192aa:	60f8      	str	r0, [r7, #12]
 80192ac:	60b9      	str	r1, [r7, #8]
 80192ae:	607a      	str	r2, [r7, #4]
 80192b0:	603b      	str	r3, [r7, #0]
#if LWIP_IPV6
  s8_t i;
#endif

  LWIP_ASSERT_CORE_LOCKED();
 80192b2:	f7f6 fedd 	bl	8010070 <sys_check_core_locking>
    LWIP_ASSERT("single netif already set", 0);
    return NULL;
  }
#endif

  LWIP_ERROR("netif_add: invalid netif", netif != NULL, return NULL);
 80192b6:	68fb      	ldr	r3, [r7, #12]
 80192b8:	2b00      	cmp	r3, #0
 80192ba:	d108      	bne.n	80192ce <netif_add+0x2a>
 80192bc:	4b5b      	ldr	r3, [pc, #364]	@ (801942c <netif_add+0x188>)
 80192be:	f240 1227 	movw	r2, #295	@ 0x127
 80192c2:	495b      	ldr	r1, [pc, #364]	@ (8019430 <netif_add+0x18c>)
 80192c4:	485b      	ldr	r0, [pc, #364]	@ (8019434 <netif_add+0x190>)
 80192c6:	f010 f921 	bl	802950c <iprintf>
 80192ca:	2300      	movs	r3, #0
 80192cc:	e0a9      	b.n	8019422 <netif_add+0x17e>
  LWIP_ERROR("netif_add: No init function given", init != NULL, return NULL);
 80192ce:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80192d0:	2b00      	cmp	r3, #0
 80192d2:	d108      	bne.n	80192e6 <netif_add+0x42>
 80192d4:	4b55      	ldr	r3, [pc, #340]	@ (801942c <netif_add+0x188>)
 80192d6:	f44f 7294 	mov.w	r2, #296	@ 0x128
 80192da:	4957      	ldr	r1, [pc, #348]	@ (8019438 <netif_add+0x194>)
 80192dc:	4855      	ldr	r0, [pc, #340]	@ (8019434 <netif_add+0x190>)
 80192de:	f010 f915 	bl	802950c <iprintf>
 80192e2:	2300      	movs	r3, #0
 80192e4:	e09d      	b.n	8019422 <netif_add+0x17e>

#if LWIP_IPV4
  if (ipaddr == NULL) {
 80192e6:	68bb      	ldr	r3, [r7, #8]
 80192e8:	2b00      	cmp	r3, #0
 80192ea:	d101      	bne.n	80192f0 <netif_add+0x4c>
    ipaddr = ip_2_ip4(IP4_ADDR_ANY);
 80192ec:	4b53      	ldr	r3, [pc, #332]	@ (801943c <netif_add+0x198>)
 80192ee:	60bb      	str	r3, [r7, #8]
  }
  if (netmask == NULL) {
 80192f0:	687b      	ldr	r3, [r7, #4]
 80192f2:	2b00      	cmp	r3, #0
 80192f4:	d101      	bne.n	80192fa <netif_add+0x56>
    netmask = ip_2_ip4(IP4_ADDR_ANY);
 80192f6:	4b51      	ldr	r3, [pc, #324]	@ (801943c <netif_add+0x198>)
 80192f8:	607b      	str	r3, [r7, #4]
  }
  if (gw == NULL) {
 80192fa:	683b      	ldr	r3, [r7, #0]
 80192fc:	2b00      	cmp	r3, #0
 80192fe:	d101      	bne.n	8019304 <netif_add+0x60>
    gw = ip_2_ip4(IP4_ADDR_ANY);
 8019300:	4b4e      	ldr	r3, [pc, #312]	@ (801943c <netif_add+0x198>)
 8019302:	603b      	str	r3, [r7, #0]
  }

  /* reset new interface configuration state */
  ip_addr_set_zero_ip4(&netif->ip_addr);
 8019304:	68fb      	ldr	r3, [r7, #12]
 8019306:	2200      	movs	r2, #0
 8019308:	605a      	str	r2, [r3, #4]
  ip_addr_set_zero_ip4(&netif->netmask);
 801930a:	68fb      	ldr	r3, [r7, #12]
 801930c:	2200      	movs	r2, #0
 801930e:	609a      	str	r2, [r3, #8]
  ip_addr_set_zero_ip4(&netif->gw);
 8019310:	68fb      	ldr	r3, [r7, #12]
 8019312:	2200      	movs	r2, #0
 8019314:	60da      	str	r2, [r3, #12]
  netif->output = netif_null_output_ip4;
 8019316:	68fb      	ldr	r3, [r7, #12]
 8019318:	4a49      	ldr	r2, [pc, #292]	@ (8019440 <netif_add+0x19c>)
 801931a:	615a      	str	r2, [r3, #20]
#endif /* LWIP_IPV6_ADDRESS_LIFETIMES */
  }
  netif->output_ip6 = netif_null_output_ip6;
#endif /* LWIP_IPV6 */
  NETIF_SET_CHECKSUM_CTRL(netif, NETIF_CHECKSUM_ENABLE_ALL);
  netif->mtu = 0;
 801931c:	68fb      	ldr	r3, [r7, #12]
 801931e:	2200      	movs	r2, #0
 8019320:	851a      	strh	r2, [r3, #40]	@ 0x28
  netif->flags = 0;
 8019322:	68fb      	ldr	r3, [r7, #12]
 8019324:	2200      	movs	r2, #0
 8019326:	f883 2031 	strb.w	r2, [r3, #49]	@ 0x31
#ifdef netif_get_client_data
  memset(netif->client_data, 0, sizeof(netif->client_data));
 801932a:	68fb      	ldr	r3, [r7, #12]
 801932c:	3324      	adds	r3, #36	@ 0x24
 801932e:	2204      	movs	r2, #4
 8019330:	2100      	movs	r1, #0
 8019332:	4618      	mov	r0, r3
 8019334:	f010 fa7c 	bl	8029830 <memset>
#endif /* LWIP_IPV6 */
#if LWIP_NETIF_STATUS_CALLBACK
  netif->status_callback = NULL;
#endif /* LWIP_NETIF_STATUS_CALLBACK */
#if LWIP_NETIF_LINK_CALLBACK
  netif->link_callback = NULL;
 8019338:	68fb      	ldr	r3, [r7, #12]
 801933a:	2200      	movs	r2, #0
 801933c:	61da      	str	r2, [r3, #28]
  netif->loop_first = NULL;
  netif->loop_last = NULL;
#endif /* ENABLE_LOOPBACK */

  /* remember netif specific state information data */
  netif->state = state;
 801933e:	68fb      	ldr	r3, [r7, #12]
 8019340:	6a3a      	ldr	r2, [r7, #32]
 8019342:	621a      	str	r2, [r3, #32]
  netif->num = netif_num;
 8019344:	4b3f      	ldr	r3, [pc, #252]	@ (8019444 <netif_add+0x1a0>)
 8019346:	781a      	ldrb	r2, [r3, #0]
 8019348:	68fb      	ldr	r3, [r7, #12]
 801934a:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34
  netif->input = input;
 801934e:	68fb      	ldr	r3, [r7, #12]
 8019350:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 8019352:	611a      	str	r2, [r3, #16]
#if ENABLE_LOOPBACK && LWIP_LOOPBACK_MAX_PBUFS
  netif->loop_cnt_current = 0;
#endif /* ENABLE_LOOPBACK && LWIP_LOOPBACK_MAX_PBUFS */

#if LWIP_IPV4
  netif_set_addr(netif, ipaddr, netmask, gw);
 8019354:	683b      	ldr	r3, [r7, #0]
 8019356:	687a      	ldr	r2, [r7, #4]
 8019358:	68b9      	ldr	r1, [r7, #8]
 801935a:	68f8      	ldr	r0, [r7, #12]
 801935c:	f000 f914 	bl	8019588 <netif_set_addr>
#endif /* LWIP_IPV4 */

  /* call user specified initialization function for netif */
  if (init(netif) != ERR_OK) {
 8019360:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8019362:	68f8      	ldr	r0, [r7, #12]
 8019364:	4798      	blx	r3
 8019366:	4603      	mov	r3, r0
 8019368:	2b00      	cmp	r3, #0
 801936a:	d001      	beq.n	8019370 <netif_add+0xcc>
    return NULL;
 801936c:	2300      	movs	r3, #0
 801936e:	e058      	b.n	8019422 <netif_add+0x17e>
     */
  {
    struct netif *netif2;
    int num_netifs;
    do {
      if (netif->num == 255) {
 8019370:	68fb      	ldr	r3, [r7, #12]
 8019372:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 8019376:	2bff      	cmp	r3, #255	@ 0xff
 8019378:	d103      	bne.n	8019382 <netif_add+0xde>
        netif->num = 0;
 801937a:	68fb      	ldr	r3, [r7, #12]
 801937c:	2200      	movs	r2, #0
 801937e:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34
      }
      num_netifs = 0;
 8019382:	2300      	movs	r3, #0
 8019384:	613b      	str	r3, [r7, #16]
      for (netif2 = netif_list; netif2 != NULL; netif2 = netif2->next) {
 8019386:	4b30      	ldr	r3, [pc, #192]	@ (8019448 <netif_add+0x1a4>)
 8019388:	681b      	ldr	r3, [r3, #0]
 801938a:	617b      	str	r3, [r7, #20]
 801938c:	e02b      	b.n	80193e6 <netif_add+0x142>
        LWIP_ASSERT("netif already added", netif2 != netif);
 801938e:	697a      	ldr	r2, [r7, #20]
 8019390:	68fb      	ldr	r3, [r7, #12]
 8019392:	429a      	cmp	r2, r3
 8019394:	d106      	bne.n	80193a4 <netif_add+0x100>
 8019396:	4b25      	ldr	r3, [pc, #148]	@ (801942c <netif_add+0x188>)
 8019398:	f240 128b 	movw	r2, #395	@ 0x18b
 801939c:	492b      	ldr	r1, [pc, #172]	@ (801944c <netif_add+0x1a8>)
 801939e:	4825      	ldr	r0, [pc, #148]	@ (8019434 <netif_add+0x190>)
 80193a0:	f010 f8b4 	bl	802950c <iprintf>
        num_netifs++;
 80193a4:	693b      	ldr	r3, [r7, #16]
 80193a6:	3301      	adds	r3, #1
 80193a8:	613b      	str	r3, [r7, #16]
        LWIP_ASSERT("too many netifs, max. supported number is 255", num_netifs <= 255);
 80193aa:	693b      	ldr	r3, [r7, #16]
 80193ac:	2bff      	cmp	r3, #255	@ 0xff
 80193ae:	dd06      	ble.n	80193be <netif_add+0x11a>
 80193b0:	4b1e      	ldr	r3, [pc, #120]	@ (801942c <netif_add+0x188>)
 80193b2:	f240 128d 	movw	r2, #397	@ 0x18d
 80193b6:	4926      	ldr	r1, [pc, #152]	@ (8019450 <netif_add+0x1ac>)
 80193b8:	481e      	ldr	r0, [pc, #120]	@ (8019434 <netif_add+0x190>)
 80193ba:	f010 f8a7 	bl	802950c <iprintf>
        if (netif2->num == netif->num) {
 80193be:	697b      	ldr	r3, [r7, #20]
 80193c0:	f893 2034 	ldrb.w	r2, [r3, #52]	@ 0x34
 80193c4:	68fb      	ldr	r3, [r7, #12]
 80193c6:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 80193ca:	429a      	cmp	r2, r3
 80193cc:	d108      	bne.n	80193e0 <netif_add+0x13c>
          netif->num++;
 80193ce:	68fb      	ldr	r3, [r7, #12]
 80193d0:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 80193d4:	3301      	adds	r3, #1
 80193d6:	b2da      	uxtb	r2, r3
 80193d8:	68fb      	ldr	r3, [r7, #12]
 80193da:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34
          break;
 80193de:	e005      	b.n	80193ec <netif_add+0x148>
      for (netif2 = netif_list; netif2 != NULL; netif2 = netif2->next) {
 80193e0:	697b      	ldr	r3, [r7, #20]
 80193e2:	681b      	ldr	r3, [r3, #0]
 80193e4:	617b      	str	r3, [r7, #20]
 80193e6:	697b      	ldr	r3, [r7, #20]
 80193e8:	2b00      	cmp	r3, #0
 80193ea:	d1d0      	bne.n	801938e <netif_add+0xea>
        }
      }
    } while (netif2 != NULL);
 80193ec:	697b      	ldr	r3, [r7, #20]
 80193ee:	2b00      	cmp	r3, #0
 80193f0:	d1be      	bne.n	8019370 <netif_add+0xcc>
  }
  if (netif->num == 254) {
 80193f2:	68fb      	ldr	r3, [r7, #12]
 80193f4:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 80193f8:	2bfe      	cmp	r3, #254	@ 0xfe
 80193fa:	d103      	bne.n	8019404 <netif_add+0x160>
    netif_num = 0;
 80193fc:	4b11      	ldr	r3, [pc, #68]	@ (8019444 <netif_add+0x1a0>)
 80193fe:	2200      	movs	r2, #0
 8019400:	701a      	strb	r2, [r3, #0]
 8019402:	e006      	b.n	8019412 <netif_add+0x16e>
  } else {
    netif_num = (u8_t)(netif->num + 1);
 8019404:	68fb      	ldr	r3, [r7, #12]
 8019406:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 801940a:	3301      	adds	r3, #1
 801940c:	b2da      	uxtb	r2, r3
 801940e:	4b0d      	ldr	r3, [pc, #52]	@ (8019444 <netif_add+0x1a0>)
 8019410:	701a      	strb	r2, [r3, #0]
  }

  /* add this netif to the list */
  netif->next = netif_list;
 8019412:	4b0d      	ldr	r3, [pc, #52]	@ (8019448 <netif_add+0x1a4>)
 8019414:	681a      	ldr	r2, [r3, #0]
 8019416:	68fb      	ldr	r3, [r7, #12]
 8019418:	601a      	str	r2, [r3, #0]
  netif_list = netif;
 801941a:	4a0b      	ldr	r2, [pc, #44]	@ (8019448 <netif_add+0x1a4>)
 801941c:	68fb      	ldr	r3, [r7, #12]
 801941e:	6013      	str	r3, [r2, #0]
#endif /* LWIP_IPV4 */
  LWIP_DEBUGF(NETIF_DEBUG, ("\n"));

  netif_invoke_ext_callback(netif, LWIP_NSC_NETIF_ADDED, NULL);

  return netif;
 8019420:	68fb      	ldr	r3, [r7, #12]
}
 8019422:	4618      	mov	r0, r3
 8019424:	3718      	adds	r7, #24
 8019426:	46bd      	mov	sp, r7
 8019428:	bd80      	pop	{r7, pc}
 801942a:	bf00      	nop
 801942c:	0802da0c 	.word	0x0802da0c
 8019430:	0802daa0 	.word	0x0802daa0
 8019434:	0802da5c 	.word	0x0802da5c
 8019438:	0802dabc 	.word	0x0802dabc
 801943c:	080307a4 	.word	0x080307a4
 8019440:	0801987f 	.word	0x0801987f
 8019444:	24029fe8 	.word	0x24029fe8
 8019448:	24029fe0 	.word	0x24029fe0
 801944c:	0802dae0 	.word	0x0802dae0
 8019450:	0802daf4 	.word	0x0802daf4

08019454 <netif_do_ip_addr_changed>:

static void
netif_do_ip_addr_changed(const ip_addr_t *old_addr, const ip_addr_t *new_addr)
{
 8019454:	b580      	push	{r7, lr}
 8019456:	b082      	sub	sp, #8
 8019458:	af00      	add	r7, sp, #0
 801945a:	6078      	str	r0, [r7, #4]
 801945c:	6039      	str	r1, [r7, #0]
#if LWIP_TCP
  tcp_netif_ip_addr_changed(old_addr, new_addr);
 801945e:	6839      	ldr	r1, [r7, #0]
 8019460:	6878      	ldr	r0, [r7, #4]
 8019462:	f002 fe6f 	bl	801c144 <tcp_netif_ip_addr_changed>
#endif /* LWIP_TCP */
#if LWIP_UDP
  udp_netif_ip_addr_changed(old_addr, new_addr);
 8019466:	6839      	ldr	r1, [r7, #0]
 8019468:	6878      	ldr	r0, [r7, #4]
 801946a:	f008 f82b 	bl	80214c4 <udp_netif_ip_addr_changed>
#endif /* LWIP_UDP */
#if LWIP_RAW
  raw_netif_ip_addr_changed(old_addr, new_addr);
#endif /* LWIP_RAW */
}
 801946e:	bf00      	nop
 8019470:	3708      	adds	r7, #8
 8019472:	46bd      	mov	sp, r7
 8019474:	bd80      	pop	{r7, pc}
	...

08019478 <netif_do_set_ipaddr>:

#if LWIP_IPV4
static int
netif_do_set_ipaddr(struct netif *netif, const ip4_addr_t *ipaddr, ip_addr_t *old_addr)
{
 8019478:	b580      	push	{r7, lr}
 801947a:	b086      	sub	sp, #24
 801947c:	af00      	add	r7, sp, #0
 801947e:	60f8      	str	r0, [r7, #12]
 8019480:	60b9      	str	r1, [r7, #8]
 8019482:	607a      	str	r2, [r7, #4]
  LWIP_ASSERT("invalid pointer", ipaddr != NULL);
 8019484:	68bb      	ldr	r3, [r7, #8]
 8019486:	2b00      	cmp	r3, #0
 8019488:	d106      	bne.n	8019498 <netif_do_set_ipaddr+0x20>
 801948a:	4b1d      	ldr	r3, [pc, #116]	@ (8019500 <netif_do_set_ipaddr+0x88>)
 801948c:	f240 12cb 	movw	r2, #459	@ 0x1cb
 8019490:	491c      	ldr	r1, [pc, #112]	@ (8019504 <netif_do_set_ipaddr+0x8c>)
 8019492:	481d      	ldr	r0, [pc, #116]	@ (8019508 <netif_do_set_ipaddr+0x90>)
 8019494:	f010 f83a 	bl	802950c <iprintf>
  LWIP_ASSERT("invalid pointer", old_addr != NULL);
 8019498:	687b      	ldr	r3, [r7, #4]
 801949a:	2b00      	cmp	r3, #0
 801949c:	d106      	bne.n	80194ac <netif_do_set_ipaddr+0x34>
 801949e:	4b18      	ldr	r3, [pc, #96]	@ (8019500 <netif_do_set_ipaddr+0x88>)
 80194a0:	f44f 72e6 	mov.w	r2, #460	@ 0x1cc
 80194a4:	4917      	ldr	r1, [pc, #92]	@ (8019504 <netif_do_set_ipaddr+0x8c>)
 80194a6:	4818      	ldr	r0, [pc, #96]	@ (8019508 <netif_do_set_ipaddr+0x90>)
 80194a8:	f010 f830 	bl	802950c <iprintf>

  /* address is actually being changed? */
  if (ip4_addr_cmp(ipaddr, netif_ip4_addr(netif)) == 0) {
 80194ac:	68bb      	ldr	r3, [r7, #8]
 80194ae:	681a      	ldr	r2, [r3, #0]
 80194b0:	68fb      	ldr	r3, [r7, #12]
 80194b2:	3304      	adds	r3, #4
 80194b4:	681b      	ldr	r3, [r3, #0]
 80194b6:	429a      	cmp	r2, r3
 80194b8:	d01c      	beq.n	80194f4 <netif_do_set_ipaddr+0x7c>
    ip_addr_t new_addr;
    *ip_2_ip4(&new_addr) = *ipaddr;
 80194ba:	68bb      	ldr	r3, [r7, #8]
 80194bc:	681b      	ldr	r3, [r3, #0]
 80194be:	617b      	str	r3, [r7, #20]
    IP_SET_TYPE_VAL(new_addr, IPADDR_TYPE_V4);

    ip_addr_copy(*old_addr, *netif_ip_addr4(netif));
 80194c0:	68fb      	ldr	r3, [r7, #12]
 80194c2:	3304      	adds	r3, #4
 80194c4:	681a      	ldr	r2, [r3, #0]
 80194c6:	687b      	ldr	r3, [r7, #4]
 80194c8:	601a      	str	r2, [r3, #0]

    LWIP_DEBUGF(NETIF_DEBUG | LWIP_DBG_STATE, ("netif_set_ipaddr: netif address being changed\n"));
    netif_do_ip_addr_changed(old_addr, &new_addr);
 80194ca:	f107 0314 	add.w	r3, r7, #20
 80194ce:	4619      	mov	r1, r3
 80194d0:	6878      	ldr	r0, [r7, #4]
 80194d2:	f7ff ffbf 	bl	8019454 <netif_do_ip_addr_changed>

    mib2_remove_ip4(netif);
    mib2_remove_route_ip4(0, netif);
    /* set new IP address to netif */
    ip4_addr_set(ip_2_ip4(&netif->ip_addr), ipaddr);
 80194d6:	68bb      	ldr	r3, [r7, #8]
 80194d8:	2b00      	cmp	r3, #0
 80194da:	d002      	beq.n	80194e2 <netif_do_set_ipaddr+0x6a>
 80194dc:	68bb      	ldr	r3, [r7, #8]
 80194de:	681b      	ldr	r3, [r3, #0]
 80194e0:	e000      	b.n	80194e4 <netif_do_set_ipaddr+0x6c>
 80194e2:	2300      	movs	r3, #0
 80194e4:	68fa      	ldr	r2, [r7, #12]
 80194e6:	6053      	str	r3, [r2, #4]
    IP_SET_TYPE_VAL(netif->ip_addr, IPADDR_TYPE_V4);
    mib2_add_ip4(netif);
    mib2_add_route_ip4(0, netif);

    netif_issue_reports(netif, NETIF_REPORT_TYPE_IPV4);
 80194e8:	2101      	movs	r1, #1
 80194ea:	68f8      	ldr	r0, [r7, #12]
 80194ec:	f000 f8d6 	bl	801969c <netif_issue_reports>

    NETIF_STATUS_CALLBACK(netif);
    return 1; /* address changed */
 80194f0:	2301      	movs	r3, #1
 80194f2:	e000      	b.n	80194f6 <netif_do_set_ipaddr+0x7e>
  }
  return 0; /* address unchanged */
 80194f4:	2300      	movs	r3, #0
}
 80194f6:	4618      	mov	r0, r3
 80194f8:	3718      	adds	r7, #24
 80194fa:	46bd      	mov	sp, r7
 80194fc:	bd80      	pop	{r7, pc}
 80194fe:	bf00      	nop
 8019500:	0802da0c 	.word	0x0802da0c
 8019504:	0802db24 	.word	0x0802db24
 8019508:	0802da5c 	.word	0x0802da5c

0801950c <netif_do_set_netmask>:
  }
}

static int
netif_do_set_netmask(struct netif *netif, const ip4_addr_t *netmask, ip_addr_t *old_nm)
{
 801950c:	b480      	push	{r7}
 801950e:	b085      	sub	sp, #20
 8019510:	af00      	add	r7, sp, #0
 8019512:	60f8      	str	r0, [r7, #12]
 8019514:	60b9      	str	r1, [r7, #8]
 8019516:	607a      	str	r2, [r7, #4]
  /* address is actually being changed? */
  if (ip4_addr_cmp(netmask, netif_ip4_netmask(netif)) == 0) {
 8019518:	68bb      	ldr	r3, [r7, #8]
 801951a:	681a      	ldr	r2, [r3, #0]
 801951c:	68fb      	ldr	r3, [r7, #12]
 801951e:	3308      	adds	r3, #8
 8019520:	681b      	ldr	r3, [r3, #0]
 8019522:	429a      	cmp	r2, r3
 8019524:	d00a      	beq.n	801953c <netif_do_set_netmask+0x30>
#else
    LWIP_UNUSED_ARG(old_nm);
#endif
    mib2_remove_route_ip4(0, netif);
    /* set new netmask to netif */
    ip4_addr_set(ip_2_ip4(&netif->netmask), netmask);
 8019526:	68bb      	ldr	r3, [r7, #8]
 8019528:	2b00      	cmp	r3, #0
 801952a:	d002      	beq.n	8019532 <netif_do_set_netmask+0x26>
 801952c:	68bb      	ldr	r3, [r7, #8]
 801952e:	681b      	ldr	r3, [r3, #0]
 8019530:	e000      	b.n	8019534 <netif_do_set_netmask+0x28>
 8019532:	2300      	movs	r3, #0
 8019534:	68fa      	ldr	r2, [r7, #12]
 8019536:	6093      	str	r3, [r2, #8]
                netif->name[0], netif->name[1],
                ip4_addr1_16(netif_ip4_netmask(netif)),
                ip4_addr2_16(netif_ip4_netmask(netif)),
                ip4_addr3_16(netif_ip4_netmask(netif)),
                ip4_addr4_16(netif_ip4_netmask(netif))));
    return 1; /* netmask changed */
 8019538:	2301      	movs	r3, #1
 801953a:	e000      	b.n	801953e <netif_do_set_netmask+0x32>
  }
  return 0; /* netmask unchanged */
 801953c:	2300      	movs	r3, #0
}
 801953e:	4618      	mov	r0, r3
 8019540:	3714      	adds	r7, #20
 8019542:	46bd      	mov	sp, r7
 8019544:	f85d 7b04 	ldr.w	r7, [sp], #4
 8019548:	4770      	bx	lr

0801954a <netif_do_set_gw>:
  }
}

static int
netif_do_set_gw(struct netif *netif, const ip4_addr_t *gw, ip_addr_t *old_gw)
{
 801954a:	b480      	push	{r7}
 801954c:	b085      	sub	sp, #20
 801954e:	af00      	add	r7, sp, #0
 8019550:	60f8      	str	r0, [r7, #12]
 8019552:	60b9      	str	r1, [r7, #8]
 8019554:	607a      	str	r2, [r7, #4]
  /* address is actually being changed? */
  if (ip4_addr_cmp(gw, netif_ip4_gw(netif)) == 0) {
 8019556:	68bb      	ldr	r3, [r7, #8]
 8019558:	681a      	ldr	r2, [r3, #0]
 801955a:	68fb      	ldr	r3, [r7, #12]
 801955c:	330c      	adds	r3, #12
 801955e:	681b      	ldr	r3, [r3, #0]
 8019560:	429a      	cmp	r2, r3
 8019562:	d00a      	beq.n	801957a <netif_do_set_gw+0x30>
    ip_addr_copy(*old_gw, *netif_ip_gw4(netif));
#else
    LWIP_UNUSED_ARG(old_gw);
#endif

    ip4_addr_set(ip_2_ip4(&netif->gw), gw);
 8019564:	68bb      	ldr	r3, [r7, #8]
 8019566:	2b00      	cmp	r3, #0
 8019568:	d002      	beq.n	8019570 <netif_do_set_gw+0x26>
 801956a:	68bb      	ldr	r3, [r7, #8]
 801956c:	681b      	ldr	r3, [r3, #0]
 801956e:	e000      	b.n	8019572 <netif_do_set_gw+0x28>
 8019570:	2300      	movs	r3, #0
 8019572:	68fa      	ldr	r2, [r7, #12]
 8019574:	60d3      	str	r3, [r2, #12]
                netif->name[0], netif->name[1],
                ip4_addr1_16(netif_ip4_gw(netif)),
                ip4_addr2_16(netif_ip4_gw(netif)),
                ip4_addr3_16(netif_ip4_gw(netif)),
                ip4_addr4_16(netif_ip4_gw(netif))));
    return 1; /* gateway changed */
 8019576:	2301      	movs	r3, #1
 8019578:	e000      	b.n	801957c <netif_do_set_gw+0x32>
  }
  return 0; /* gateway unchanged */
 801957a:	2300      	movs	r3, #0
}
 801957c:	4618      	mov	r0, r3
 801957e:	3714      	adds	r7, #20
 8019580:	46bd      	mov	sp, r7
 8019582:	f85d 7b04 	ldr.w	r7, [sp], #4
 8019586:	4770      	bx	lr

08019588 <netif_set_addr>:
 * @param gw the new default gateway
 */
void
netif_set_addr(struct netif *netif, const ip4_addr_t *ipaddr, const ip4_addr_t *netmask,
               const ip4_addr_t *gw)
{
 8019588:	b580      	push	{r7, lr}
 801958a:	b088      	sub	sp, #32
 801958c:	af00      	add	r7, sp, #0
 801958e:	60f8      	str	r0, [r7, #12]
 8019590:	60b9      	str	r1, [r7, #8]
 8019592:	607a      	str	r2, [r7, #4]
 8019594:	603b      	str	r3, [r7, #0]
  ip_addr_t old_nm_val;
  ip_addr_t old_gw_val;
  ip_addr_t *old_nm = &old_nm_val;
  ip_addr_t *old_gw = &old_gw_val;
#else
  ip_addr_t *old_nm = NULL;
 8019596:	2300      	movs	r3, #0
 8019598:	61fb      	str	r3, [r7, #28]
  ip_addr_t *old_gw = NULL;
 801959a:	2300      	movs	r3, #0
 801959c:	61bb      	str	r3, [r7, #24]
#endif
  ip_addr_t old_addr;
  int remove;

  LWIP_ASSERT_CORE_LOCKED();
 801959e:	f7f6 fd67 	bl	8010070 <sys_check_core_locking>

  /* Don't propagate NULL pointer (IPv4 ANY) to subsequent functions */
  if (ipaddr == NULL) {
 80195a2:	68bb      	ldr	r3, [r7, #8]
 80195a4:	2b00      	cmp	r3, #0
 80195a6:	d101      	bne.n	80195ac <netif_set_addr+0x24>
    ipaddr = IP4_ADDR_ANY4;
 80195a8:	4b1c      	ldr	r3, [pc, #112]	@ (801961c <netif_set_addr+0x94>)
 80195aa:	60bb      	str	r3, [r7, #8]
  }
  if (netmask == NULL) {
 80195ac:	687b      	ldr	r3, [r7, #4]
 80195ae:	2b00      	cmp	r3, #0
 80195b0:	d101      	bne.n	80195b6 <netif_set_addr+0x2e>
    netmask = IP4_ADDR_ANY4;
 80195b2:	4b1a      	ldr	r3, [pc, #104]	@ (801961c <netif_set_addr+0x94>)
 80195b4:	607b      	str	r3, [r7, #4]
  }
  if (gw == NULL) {
 80195b6:	683b      	ldr	r3, [r7, #0]
 80195b8:	2b00      	cmp	r3, #0
 80195ba:	d101      	bne.n	80195c0 <netif_set_addr+0x38>
    gw = IP4_ADDR_ANY4;
 80195bc:	4b17      	ldr	r3, [pc, #92]	@ (801961c <netif_set_addr+0x94>)
 80195be:	603b      	str	r3, [r7, #0]
  }

  remove = ip4_addr_isany(ipaddr);
 80195c0:	68bb      	ldr	r3, [r7, #8]
 80195c2:	2b00      	cmp	r3, #0
 80195c4:	d003      	beq.n	80195ce <netif_set_addr+0x46>
 80195c6:	68bb      	ldr	r3, [r7, #8]
 80195c8:	681b      	ldr	r3, [r3, #0]
 80195ca:	2b00      	cmp	r3, #0
 80195cc:	d101      	bne.n	80195d2 <netif_set_addr+0x4a>
 80195ce:	2301      	movs	r3, #1
 80195d0:	e000      	b.n	80195d4 <netif_set_addr+0x4c>
 80195d2:	2300      	movs	r3, #0
 80195d4:	617b      	str	r3, [r7, #20]
  if (remove) {
 80195d6:	697b      	ldr	r3, [r7, #20]
 80195d8:	2b00      	cmp	r3, #0
 80195da:	d006      	beq.n	80195ea <netif_set_addr+0x62>
    /* when removing an address, we have to remove it *before* changing netmask/gw
       to ensure that tcp RST segment can be sent correctly */
    if (netif_do_set_ipaddr(netif, ipaddr, &old_addr)) {
 80195dc:	f107 0310 	add.w	r3, r7, #16
 80195e0:	461a      	mov	r2, r3
 80195e2:	68b9      	ldr	r1, [r7, #8]
 80195e4:	68f8      	ldr	r0, [r7, #12]
 80195e6:	f7ff ff47 	bl	8019478 <netif_do_set_ipaddr>
      change_reason |= LWIP_NSC_IPV4_ADDRESS_CHANGED;
      cb_args.ipv4_changed.old_address = &old_addr;
#endif
    }
  }
  if (netif_do_set_netmask(netif, netmask, old_nm)) {
 80195ea:	69fa      	ldr	r2, [r7, #28]
 80195ec:	6879      	ldr	r1, [r7, #4]
 80195ee:	68f8      	ldr	r0, [r7, #12]
 80195f0:	f7ff ff8c 	bl	801950c <netif_do_set_netmask>
#if LWIP_NETIF_EXT_STATUS_CALLBACK
    change_reason |= LWIP_NSC_IPV4_NETMASK_CHANGED;
    cb_args.ipv4_changed.old_netmask = old_nm;
#endif
  }
  if (netif_do_set_gw(netif, gw, old_gw)) {
 80195f4:	69ba      	ldr	r2, [r7, #24]
 80195f6:	6839      	ldr	r1, [r7, #0]
 80195f8:	68f8      	ldr	r0, [r7, #12]
 80195fa:	f7ff ffa6 	bl	801954a <netif_do_set_gw>
#if LWIP_NETIF_EXT_STATUS_CALLBACK
    change_reason |= LWIP_NSC_IPV4_GATEWAY_CHANGED;
    cb_args.ipv4_changed.old_gw = old_gw;
#endif
  }
  if (!remove) {
 80195fe:	697b      	ldr	r3, [r7, #20]
 8019600:	2b00      	cmp	r3, #0
 8019602:	d106      	bne.n	8019612 <netif_set_addr+0x8a>
    /* set ipaddr last to ensure netmask/gw have been set when status callback is called */
    if (netif_do_set_ipaddr(netif, ipaddr, &old_addr)) {
 8019604:	f107 0310 	add.w	r3, r7, #16
 8019608:	461a      	mov	r2, r3
 801960a:	68b9      	ldr	r1, [r7, #8]
 801960c:	68f8      	ldr	r0, [r7, #12]
 801960e:	f7ff ff33 	bl	8019478 <netif_do_set_ipaddr>
  if (change_reason != LWIP_NSC_NONE) {
    change_reason |= LWIP_NSC_IPV4_SETTINGS_CHANGED;
    netif_invoke_ext_callback(netif, change_reason, &cb_args);
  }
#endif
}
 8019612:	bf00      	nop
 8019614:	3720      	adds	r7, #32
 8019616:	46bd      	mov	sp, r7
 8019618:	bd80      	pop	{r7, pc}
 801961a:	bf00      	nop
 801961c:	080307a4 	.word	0x080307a4

08019620 <netif_set_default>:
 *
 * @param netif the default network interface
 */
void
netif_set_default(struct netif *netif)
{
 8019620:	b580      	push	{r7, lr}
 8019622:	b082      	sub	sp, #8
 8019624:	af00      	add	r7, sp, #0
 8019626:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT_CORE_LOCKED();
 8019628:	f7f6 fd22 	bl	8010070 <sys_check_core_locking>
    mib2_remove_route_ip4(1, netif);
  } else {
    /* install default route */
    mib2_add_route_ip4(1, netif);
  }
  netif_default = netif;
 801962c:	4a03      	ldr	r2, [pc, #12]	@ (801963c <netif_set_default+0x1c>)
 801962e:	687b      	ldr	r3, [r7, #4]
 8019630:	6013      	str	r3, [r2, #0]
  LWIP_DEBUGF(NETIF_DEBUG, ("netif: setting default interface %c%c\n",
                            netif ? netif->name[0] : '\'', netif ? netif->name[1] : '\''));
}
 8019632:	bf00      	nop
 8019634:	3708      	adds	r7, #8
 8019636:	46bd      	mov	sp, r7
 8019638:	bd80      	pop	{r7, pc}
 801963a:	bf00      	nop
 801963c:	24029fe4 	.word	0x24029fe4

08019640 <netif_set_up>:
 * Bring an interface up, available for processing
 * traffic.
 */
void
netif_set_up(struct netif *netif)
{
 8019640:	b580      	push	{r7, lr}
 8019642:	b082      	sub	sp, #8
 8019644:	af00      	add	r7, sp, #0
 8019646:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT_CORE_LOCKED();
 8019648:	f7f6 fd12 	bl	8010070 <sys_check_core_locking>

  LWIP_ERROR("netif_set_up: invalid netif", netif != NULL, return);
 801964c:	687b      	ldr	r3, [r7, #4]
 801964e:	2b00      	cmp	r3, #0
 8019650:	d107      	bne.n	8019662 <netif_set_up+0x22>
 8019652:	4b0f      	ldr	r3, [pc, #60]	@ (8019690 <netif_set_up+0x50>)
 8019654:	f44f 7254 	mov.w	r2, #848	@ 0x350
 8019658:	490e      	ldr	r1, [pc, #56]	@ (8019694 <netif_set_up+0x54>)
 801965a:	480f      	ldr	r0, [pc, #60]	@ (8019698 <netif_set_up+0x58>)
 801965c:	f00f ff56 	bl	802950c <iprintf>
 8019660:	e013      	b.n	801968a <netif_set_up+0x4a>

  if (!(netif->flags & NETIF_FLAG_UP)) {
 8019662:	687b      	ldr	r3, [r7, #4]
 8019664:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 8019668:	f003 0301 	and.w	r3, r3, #1
 801966c:	2b00      	cmp	r3, #0
 801966e:	d10c      	bne.n	801968a <netif_set_up+0x4a>
    netif_set_flags(netif, NETIF_FLAG_UP);
 8019670:	687b      	ldr	r3, [r7, #4]
 8019672:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 8019676:	f043 0301 	orr.w	r3, r3, #1
 801967a:	b2da      	uxtb	r2, r3
 801967c:	687b      	ldr	r3, [r7, #4]
 801967e:	f883 2031 	strb.w	r2, [r3, #49]	@ 0x31
      args.status_changed.state = 1;
      netif_invoke_ext_callback(netif, LWIP_NSC_STATUS_CHANGED, &args);
    }
#endif

    netif_issue_reports(netif, NETIF_REPORT_TYPE_IPV4 | NETIF_REPORT_TYPE_IPV6);
 8019682:	2103      	movs	r1, #3
 8019684:	6878      	ldr	r0, [r7, #4]
 8019686:	f000 f809 	bl	801969c <netif_issue_reports>
#if LWIP_IPV6
    nd6_restart_netif(netif);
#endif /* LWIP_IPV6 */
  }
}
 801968a:	3708      	adds	r7, #8
 801968c:	46bd      	mov	sp, r7
 801968e:	bd80      	pop	{r7, pc}
 8019690:	0802da0c 	.word	0x0802da0c
 8019694:	0802db94 	.word	0x0802db94
 8019698:	0802da5c 	.word	0x0802da5c

0801969c <netif_issue_reports>:

/** Send ARP/IGMP/MLD/RS events, e.g. on link-up/netif-up or addr-change
 */
static void
netif_issue_reports(struct netif *netif, u8_t report_type)
{
 801969c:	b580      	push	{r7, lr}
 801969e:	b082      	sub	sp, #8
 80196a0:	af00      	add	r7, sp, #0
 80196a2:	6078      	str	r0, [r7, #4]
 80196a4:	460b      	mov	r3, r1
 80196a6:	70fb      	strb	r3, [r7, #3]
  LWIP_ASSERT("netif_issue_reports: invalid netif", netif != NULL);
 80196a8:	687b      	ldr	r3, [r7, #4]
 80196aa:	2b00      	cmp	r3, #0
 80196ac:	d106      	bne.n	80196bc <netif_issue_reports+0x20>
 80196ae:	4b18      	ldr	r3, [pc, #96]	@ (8019710 <netif_issue_reports+0x74>)
 80196b0:	f240 326d 	movw	r2, #877	@ 0x36d
 80196b4:	4917      	ldr	r1, [pc, #92]	@ (8019714 <netif_issue_reports+0x78>)
 80196b6:	4818      	ldr	r0, [pc, #96]	@ (8019718 <netif_issue_reports+0x7c>)
 80196b8:	f00f ff28 	bl	802950c <iprintf>

  /* Only send reports when both link and admin states are up */
  if (!(netif->flags & NETIF_FLAG_LINK_UP) ||
 80196bc:	687b      	ldr	r3, [r7, #4]
 80196be:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 80196c2:	f003 0304 	and.w	r3, r3, #4
 80196c6:	2b00      	cmp	r3, #0
 80196c8:	d01e      	beq.n	8019708 <netif_issue_reports+0x6c>
      !(netif->flags & NETIF_FLAG_UP)) {
 80196ca:	687b      	ldr	r3, [r7, #4]
 80196cc:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 80196d0:	f003 0301 	and.w	r3, r3, #1
  if (!(netif->flags & NETIF_FLAG_LINK_UP) ||
 80196d4:	2b00      	cmp	r3, #0
 80196d6:	d017      	beq.n	8019708 <netif_issue_reports+0x6c>
    return;
  }

#if LWIP_IPV4
  if ((report_type & NETIF_REPORT_TYPE_IPV4) &&
 80196d8:	78fb      	ldrb	r3, [r7, #3]
 80196da:	f003 0301 	and.w	r3, r3, #1
 80196de:	2b00      	cmp	r3, #0
 80196e0:	d013      	beq.n	801970a <netif_issue_reports+0x6e>
      !ip4_addr_isany_val(*netif_ip4_addr(netif))) {
 80196e2:	687b      	ldr	r3, [r7, #4]
 80196e4:	3304      	adds	r3, #4
 80196e6:	681b      	ldr	r3, [r3, #0]
  if ((report_type & NETIF_REPORT_TYPE_IPV4) &&
 80196e8:	2b00      	cmp	r3, #0
 80196ea:	d00e      	beq.n	801970a <netif_issue_reports+0x6e>
#if LWIP_ARP
    /* For Ethernet network interfaces, we would like to send a "gratuitous ARP" */
    if (netif->flags & (NETIF_FLAG_ETHARP)) {
 80196ec:	687b      	ldr	r3, [r7, #4]
 80196ee:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 80196f2:	f003 0308 	and.w	r3, r3, #8
 80196f6:	2b00      	cmp	r3, #0
 80196f8:	d007      	beq.n	801970a <netif_issue_reports+0x6e>
      etharp_gratuitous(netif);
 80196fa:	687b      	ldr	r3, [r7, #4]
 80196fc:	3304      	adds	r3, #4
 80196fe:	4619      	mov	r1, r3
 8019700:	6878      	ldr	r0, [r7, #4]
 8019702:	f00a fd2b 	bl	802415c <etharp_request>
 8019706:	e000      	b.n	801970a <netif_issue_reports+0x6e>
    return;
 8019708:	bf00      	nop
    /* send mld memberships */
    mld6_report_groups(netif);
#endif /* LWIP_IPV6_MLD */
  }
#endif /* LWIP_IPV6 */
}
 801970a:	3708      	adds	r7, #8
 801970c:	46bd      	mov	sp, r7
 801970e:	bd80      	pop	{r7, pc}
 8019710:	0802da0c 	.word	0x0802da0c
 8019714:	0802dbb0 	.word	0x0802dbb0
 8019718:	0802da5c 	.word	0x0802da5c

0801971c <netif_set_down>:
 * @ingroup netif
 * Bring an interface down, disabling any traffic processing.
 */
void
netif_set_down(struct netif *netif)
{
 801971c:	b580      	push	{r7, lr}
 801971e:	b082      	sub	sp, #8
 8019720:	af00      	add	r7, sp, #0
 8019722:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT_CORE_LOCKED();
 8019724:	f7f6 fca4 	bl	8010070 <sys_check_core_locking>

  LWIP_ERROR("netif_set_down: invalid netif", netif != NULL, return);
 8019728:	687b      	ldr	r3, [r7, #4]
 801972a:	2b00      	cmp	r3, #0
 801972c:	d107      	bne.n	801973e <netif_set_down+0x22>
 801972e:	4b12      	ldr	r3, [pc, #72]	@ (8019778 <netif_set_down+0x5c>)
 8019730:	f240 329b 	movw	r2, #923	@ 0x39b
 8019734:	4911      	ldr	r1, [pc, #68]	@ (801977c <netif_set_down+0x60>)
 8019736:	4812      	ldr	r0, [pc, #72]	@ (8019780 <netif_set_down+0x64>)
 8019738:	f00f fee8 	bl	802950c <iprintf>
 801973c:	e019      	b.n	8019772 <netif_set_down+0x56>

  if (netif->flags & NETIF_FLAG_UP) {
 801973e:	687b      	ldr	r3, [r7, #4]
 8019740:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 8019744:	f003 0301 	and.w	r3, r3, #1
 8019748:	2b00      	cmp	r3, #0
 801974a:	d012      	beq.n	8019772 <netif_set_down+0x56>
      args.status_changed.state = 0;
      netif_invoke_ext_callback(netif, LWIP_NSC_STATUS_CHANGED, &args);
    }
#endif

    netif_clear_flags(netif, NETIF_FLAG_UP);
 801974c:	687b      	ldr	r3, [r7, #4]
 801974e:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 8019752:	f023 0301 	bic.w	r3, r3, #1
 8019756:	b2da      	uxtb	r2, r3
 8019758:	687b      	ldr	r3, [r7, #4]
 801975a:	f883 2031 	strb.w	r2, [r3, #49]	@ 0x31
    MIB2_COPY_SYSUPTIME_TO(&netif->ts);

#if LWIP_IPV4 && LWIP_ARP
    if (netif->flags & NETIF_FLAG_ETHARP) {
 801975e:	687b      	ldr	r3, [r7, #4]
 8019760:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 8019764:	f003 0308 	and.w	r3, r3, #8
 8019768:	2b00      	cmp	r3, #0
 801976a:	d002      	beq.n	8019772 <netif_set_down+0x56>
      etharp_cleanup_netif(netif);
 801976c:	6878      	ldr	r0, [r7, #4]
 801976e:	f00a f8ab 	bl	80238c8 <etharp_cleanup_netif>
    nd6_cleanup_netif(netif);
#endif /* LWIP_IPV6 */

    NETIF_STATUS_CALLBACK(netif);
  }
}
 8019772:	3708      	adds	r7, #8
 8019774:	46bd      	mov	sp, r7
 8019776:	bd80      	pop	{r7, pc}
 8019778:	0802da0c 	.word	0x0802da0c
 801977c:	0802dbd4 	.word	0x0802dbd4
 8019780:	0802da5c 	.word	0x0802da5c

08019784 <netif_set_link_up>:
 * @ingroup netif
 * Called by a driver when its link goes up
 */
void
netif_set_link_up(struct netif *netif)
{
 8019784:	b580      	push	{r7, lr}
 8019786:	b082      	sub	sp, #8
 8019788:	af00      	add	r7, sp, #0
 801978a:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT_CORE_LOCKED();
 801978c:	f7f6 fc70 	bl	8010070 <sys_check_core_locking>

  LWIP_ERROR("netif_set_link_up: invalid netif", netif != NULL, return);
 8019790:	687b      	ldr	r3, [r7, #4]
 8019792:	2b00      	cmp	r3, #0
 8019794:	d107      	bne.n	80197a6 <netif_set_link_up+0x22>
 8019796:	4b15      	ldr	r3, [pc, #84]	@ (80197ec <netif_set_link_up+0x68>)
 8019798:	f44f 7278 	mov.w	r2, #992	@ 0x3e0
 801979c:	4914      	ldr	r1, [pc, #80]	@ (80197f0 <netif_set_link_up+0x6c>)
 801979e:	4815      	ldr	r0, [pc, #84]	@ (80197f4 <netif_set_link_up+0x70>)
 80197a0:	f00f feb4 	bl	802950c <iprintf>
 80197a4:	e01e      	b.n	80197e4 <netif_set_link_up+0x60>

  if (!(netif->flags & NETIF_FLAG_LINK_UP)) {
 80197a6:	687b      	ldr	r3, [r7, #4]
 80197a8:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 80197ac:	f003 0304 	and.w	r3, r3, #4
 80197b0:	2b00      	cmp	r3, #0
 80197b2:	d117      	bne.n	80197e4 <netif_set_link_up+0x60>
    netif_set_flags(netif, NETIF_FLAG_LINK_UP);
 80197b4:	687b      	ldr	r3, [r7, #4]
 80197b6:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 80197ba:	f043 0304 	orr.w	r3, r3, #4
 80197be:	b2da      	uxtb	r2, r3
 80197c0:	687b      	ldr	r3, [r7, #4]
 80197c2:	f883 2031 	strb.w	r2, [r3, #49]	@ 0x31

#if LWIP_DHCP
    dhcp_network_changed(netif);
 80197c6:	6878      	ldr	r0, [r7, #4]
 80197c8:	f008 faaa 	bl	8021d20 <dhcp_network_changed>

#if LWIP_AUTOIP
    autoip_network_changed(netif);
#endif /* LWIP_AUTOIP */

    netif_issue_reports(netif, NETIF_REPORT_TYPE_IPV4 | NETIF_REPORT_TYPE_IPV6);
 80197cc:	2103      	movs	r1, #3
 80197ce:	6878      	ldr	r0, [r7, #4]
 80197d0:	f7ff ff64 	bl	801969c <netif_issue_reports>
#if LWIP_IPV6
    nd6_restart_netif(netif);
#endif /* LWIP_IPV6 */

    NETIF_LINK_CALLBACK(netif);
 80197d4:	687b      	ldr	r3, [r7, #4]
 80197d6:	69db      	ldr	r3, [r3, #28]
 80197d8:	2b00      	cmp	r3, #0
 80197da:	d003      	beq.n	80197e4 <netif_set_link_up+0x60>
 80197dc:	687b      	ldr	r3, [r7, #4]
 80197de:	69db      	ldr	r3, [r3, #28]
 80197e0:	6878      	ldr	r0, [r7, #4]
 80197e2:	4798      	blx	r3
      args.link_changed.state = 1;
      netif_invoke_ext_callback(netif, LWIP_NSC_LINK_CHANGED, &args);
    }
#endif
  }
}
 80197e4:	3708      	adds	r7, #8
 80197e6:	46bd      	mov	sp, r7
 80197e8:	bd80      	pop	{r7, pc}
 80197ea:	bf00      	nop
 80197ec:	0802da0c 	.word	0x0802da0c
 80197f0:	0802dbf4 	.word	0x0802dbf4
 80197f4:	0802da5c 	.word	0x0802da5c

080197f8 <netif_set_link_down>:
 * @ingroup netif
 * Called by a driver when its link goes down
 */
void
netif_set_link_down(struct netif *netif)
{
 80197f8:	b580      	push	{r7, lr}
 80197fa:	b082      	sub	sp, #8
 80197fc:	af00      	add	r7, sp, #0
 80197fe:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT_CORE_LOCKED();
 8019800:	f7f6 fc36 	bl	8010070 <sys_check_core_locking>

  LWIP_ERROR("netif_set_link_down: invalid netif", netif != NULL, return);
 8019804:	687b      	ldr	r3, [r7, #4]
 8019806:	2b00      	cmp	r3, #0
 8019808:	d107      	bne.n	801981a <netif_set_link_down+0x22>
 801980a:	4b11      	ldr	r3, [pc, #68]	@ (8019850 <netif_set_link_down+0x58>)
 801980c:	f240 4206 	movw	r2, #1030	@ 0x406
 8019810:	4910      	ldr	r1, [pc, #64]	@ (8019854 <netif_set_link_down+0x5c>)
 8019812:	4811      	ldr	r0, [pc, #68]	@ (8019858 <netif_set_link_down+0x60>)
 8019814:	f00f fe7a 	bl	802950c <iprintf>
 8019818:	e017      	b.n	801984a <netif_set_link_down+0x52>

  if (netif->flags & NETIF_FLAG_LINK_UP) {
 801981a:	687b      	ldr	r3, [r7, #4]
 801981c:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 8019820:	f003 0304 	and.w	r3, r3, #4
 8019824:	2b00      	cmp	r3, #0
 8019826:	d010      	beq.n	801984a <netif_set_link_down+0x52>
    netif_clear_flags(netif, NETIF_FLAG_LINK_UP);
 8019828:	687b      	ldr	r3, [r7, #4]
 801982a:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 801982e:	f023 0304 	bic.w	r3, r3, #4
 8019832:	b2da      	uxtb	r2, r3
 8019834:	687b      	ldr	r3, [r7, #4]
 8019836:	f883 2031 	strb.w	r2, [r3, #49]	@ 0x31
    NETIF_LINK_CALLBACK(netif);
 801983a:	687b      	ldr	r3, [r7, #4]
 801983c:	69db      	ldr	r3, [r3, #28]
 801983e:	2b00      	cmp	r3, #0
 8019840:	d003      	beq.n	801984a <netif_set_link_down+0x52>
 8019842:	687b      	ldr	r3, [r7, #4]
 8019844:	69db      	ldr	r3, [r3, #28]
 8019846:	6878      	ldr	r0, [r7, #4]
 8019848:	4798      	blx	r3
      args.link_changed.state = 0;
      netif_invoke_ext_callback(netif, LWIP_NSC_LINK_CHANGED, &args);
    }
#endif
  }
}
 801984a:	3708      	adds	r7, #8
 801984c:	46bd      	mov	sp, r7
 801984e:	bd80      	pop	{r7, pc}
 8019850:	0802da0c 	.word	0x0802da0c
 8019854:	0802dc18 	.word	0x0802dc18
 8019858:	0802da5c 	.word	0x0802da5c

0801985c <netif_set_link_callback>:
 * @ingroup netif
 * Set callback to be called when link is brought up/down
 */
void
netif_set_link_callback(struct netif *netif, netif_status_callback_fn link_callback)
{
 801985c:	b580      	push	{r7, lr}
 801985e:	b082      	sub	sp, #8
 8019860:	af00      	add	r7, sp, #0
 8019862:	6078      	str	r0, [r7, #4]
 8019864:	6039      	str	r1, [r7, #0]
  LWIP_ASSERT_CORE_LOCKED();
 8019866:	f7f6 fc03 	bl	8010070 <sys_check_core_locking>

  if (netif) {
 801986a:	687b      	ldr	r3, [r7, #4]
 801986c:	2b00      	cmp	r3, #0
 801986e:	d002      	beq.n	8019876 <netif_set_link_callback+0x1a>
    netif->link_callback = link_callback;
 8019870:	687b      	ldr	r3, [r7, #4]
 8019872:	683a      	ldr	r2, [r7, #0]
 8019874:	61da      	str	r2, [r3, #28]
  }
}
 8019876:	bf00      	nop
 8019878:	3708      	adds	r7, #8
 801987a:	46bd      	mov	sp, r7
 801987c:	bd80      	pop	{r7, pc}

0801987e <netif_null_output_ip4>:
#if LWIP_IPV4
/** Dummy IPv4 output function for netifs not supporting IPv4
 */
static err_t
netif_null_output_ip4(struct netif *netif, struct pbuf *p, const ip4_addr_t *ipaddr)
{
 801987e:	b480      	push	{r7}
 8019880:	b085      	sub	sp, #20
 8019882:	af00      	add	r7, sp, #0
 8019884:	60f8      	str	r0, [r7, #12]
 8019886:	60b9      	str	r1, [r7, #8]
 8019888:	607a      	str	r2, [r7, #4]
  LWIP_UNUSED_ARG(netif);
  LWIP_UNUSED_ARG(p);
  LWIP_UNUSED_ARG(ipaddr);

  return ERR_IF;
 801988a:	f06f 030b 	mvn.w	r3, #11
}
 801988e:	4618      	mov	r0, r3
 8019890:	3714      	adds	r7, #20
 8019892:	46bd      	mov	sp, r7
 8019894:	f85d 7b04 	ldr.w	r7, [sp], #4
 8019898:	4770      	bx	lr
	...

0801989c <netif_get_by_index>:
*
* @param idx index of netif to find
*/
struct netif *
netif_get_by_index(u8_t idx)
{
 801989c:	b580      	push	{r7, lr}
 801989e:	b084      	sub	sp, #16
 80198a0:	af00      	add	r7, sp, #0
 80198a2:	4603      	mov	r3, r0
 80198a4:	71fb      	strb	r3, [r7, #7]
  struct netif *netif;

  LWIP_ASSERT_CORE_LOCKED();
 80198a6:	f7f6 fbe3 	bl	8010070 <sys_check_core_locking>

  if (idx != NETIF_NO_INDEX) {
 80198aa:	79fb      	ldrb	r3, [r7, #7]
 80198ac:	2b00      	cmp	r3, #0
 80198ae:	d013      	beq.n	80198d8 <netif_get_by_index+0x3c>
    NETIF_FOREACH(netif) {
 80198b0:	4b0c      	ldr	r3, [pc, #48]	@ (80198e4 <netif_get_by_index+0x48>)
 80198b2:	681b      	ldr	r3, [r3, #0]
 80198b4:	60fb      	str	r3, [r7, #12]
 80198b6:	e00c      	b.n	80198d2 <netif_get_by_index+0x36>
      if (idx == netif_get_index(netif)) {
 80198b8:	68fb      	ldr	r3, [r7, #12]
 80198ba:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 80198be:	3301      	adds	r3, #1
 80198c0:	b2db      	uxtb	r3, r3
 80198c2:	79fa      	ldrb	r2, [r7, #7]
 80198c4:	429a      	cmp	r2, r3
 80198c6:	d101      	bne.n	80198cc <netif_get_by_index+0x30>
        return netif; /* found! */
 80198c8:	68fb      	ldr	r3, [r7, #12]
 80198ca:	e006      	b.n	80198da <netif_get_by_index+0x3e>
    NETIF_FOREACH(netif) {
 80198cc:	68fb      	ldr	r3, [r7, #12]
 80198ce:	681b      	ldr	r3, [r3, #0]
 80198d0:	60fb      	str	r3, [r7, #12]
 80198d2:	68fb      	ldr	r3, [r7, #12]
 80198d4:	2b00      	cmp	r3, #0
 80198d6:	d1ef      	bne.n	80198b8 <netif_get_by_index+0x1c>
      }
    }
  }

  return NULL;
 80198d8:	2300      	movs	r3, #0
}
 80198da:	4618      	mov	r0, r3
 80198dc:	3710      	adds	r7, #16
 80198de:	46bd      	mov	sp, r7
 80198e0:	bd80      	pop	{r7, pc}
 80198e2:	bf00      	nop
 80198e4:	24029fe0 	.word	0x24029fe0

080198e8 <pbuf_free_ooseq>:
#if !NO_SYS
static
#endif /* !NO_SYS */
void
pbuf_free_ooseq(void)
{
 80198e8:	b580      	push	{r7, lr}
 80198ea:	b082      	sub	sp, #8
 80198ec:	af00      	add	r7, sp, #0
  struct tcp_pcb *pcb;
  SYS_ARCH_SET(pbuf_free_ooseq_pending, 0);
 80198ee:	f00c fb77 	bl	8025fe0 <sys_arch_protect>
 80198f2:	6038      	str	r0, [r7, #0]
 80198f4:	4b0d      	ldr	r3, [pc, #52]	@ (801992c <pbuf_free_ooseq+0x44>)
 80198f6:	2200      	movs	r2, #0
 80198f8:	701a      	strb	r2, [r3, #0]
 80198fa:	6838      	ldr	r0, [r7, #0]
 80198fc:	f00c fb7e 	bl	8025ffc <sys_arch_unprotect>

  for (pcb = tcp_active_pcbs; NULL != pcb; pcb = pcb->next) {
 8019900:	4b0b      	ldr	r3, [pc, #44]	@ (8019930 <pbuf_free_ooseq+0x48>)
 8019902:	681b      	ldr	r3, [r3, #0]
 8019904:	607b      	str	r3, [r7, #4]
 8019906:	e00a      	b.n	801991e <pbuf_free_ooseq+0x36>
    if (pcb->ooseq != NULL) {
 8019908:	687b      	ldr	r3, [r7, #4]
 801990a:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801990c:	2b00      	cmp	r3, #0
 801990e:	d003      	beq.n	8019918 <pbuf_free_ooseq+0x30>
      /** Free the ooseq pbufs of one PCB only */
      LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_free_ooseq: freeing out-of-sequence pbufs\n"));
      tcp_free_ooseq(pcb);
 8019910:	6878      	ldr	r0, [r7, #4]
 8019912:	f002 fc55 	bl	801c1c0 <tcp_free_ooseq>
      return;
 8019916:	e005      	b.n	8019924 <pbuf_free_ooseq+0x3c>
  for (pcb = tcp_active_pcbs; NULL != pcb; pcb = pcb->next) {
 8019918:	687b      	ldr	r3, [r7, #4]
 801991a:	68db      	ldr	r3, [r3, #12]
 801991c:	607b      	str	r3, [r7, #4]
 801991e:	687b      	ldr	r3, [r7, #4]
 8019920:	2b00      	cmp	r3, #0
 8019922:	d1f1      	bne.n	8019908 <pbuf_free_ooseq+0x20>
    }
  }
}
 8019924:	3708      	adds	r7, #8
 8019926:	46bd      	mov	sp, r7
 8019928:	bd80      	pop	{r7, pc}
 801992a:	bf00      	nop
 801992c:	24029fe9 	.word	0x24029fe9
 8019930:	24029ff8 	.word	0x24029ff8

08019934 <pbuf_free_ooseq_callback>:
/**
 * Just a callback function for tcpip_callback() that calls pbuf_free_ooseq().
 */
static void
pbuf_free_ooseq_callback(void *arg)
{
 8019934:	b580      	push	{r7, lr}
 8019936:	b082      	sub	sp, #8
 8019938:	af00      	add	r7, sp, #0
 801993a:	6078      	str	r0, [r7, #4]
  LWIP_UNUSED_ARG(arg);
  pbuf_free_ooseq();
 801993c:	f7ff ffd4 	bl	80198e8 <pbuf_free_ooseq>
}
 8019940:	bf00      	nop
 8019942:	3708      	adds	r7, #8
 8019944:	46bd      	mov	sp, r7
 8019946:	bd80      	pop	{r7, pc}

08019948 <pbuf_pool_is_empty>:
#endif /* !NO_SYS */

/** Queue a call to pbuf_free_ooseq if not already queued. */
static void
pbuf_pool_is_empty(void)
{
 8019948:	b580      	push	{r7, lr}
 801994a:	b082      	sub	sp, #8
 801994c:	af00      	add	r7, sp, #0
#ifndef PBUF_POOL_FREE_OOSEQ_QUEUE_CALL
  SYS_ARCH_SET(pbuf_free_ooseq_pending, 1);
#else /* PBUF_POOL_FREE_OOSEQ_QUEUE_CALL */
  u8_t queued;
  SYS_ARCH_DECL_PROTECT(old_level);
  SYS_ARCH_PROTECT(old_level);
 801994e:	f00c fb47 	bl	8025fe0 <sys_arch_protect>
 8019952:	6078      	str	r0, [r7, #4]
  queued = pbuf_free_ooseq_pending;
 8019954:	4b0f      	ldr	r3, [pc, #60]	@ (8019994 <pbuf_pool_is_empty+0x4c>)
 8019956:	781b      	ldrb	r3, [r3, #0]
 8019958:	70fb      	strb	r3, [r7, #3]
  pbuf_free_ooseq_pending = 1;
 801995a:	4b0e      	ldr	r3, [pc, #56]	@ (8019994 <pbuf_pool_is_empty+0x4c>)
 801995c:	2201      	movs	r2, #1
 801995e:	701a      	strb	r2, [r3, #0]
  SYS_ARCH_UNPROTECT(old_level);
 8019960:	6878      	ldr	r0, [r7, #4]
 8019962:	f00c fb4b 	bl	8025ffc <sys_arch_unprotect>

  if (!queued) {
 8019966:	78fb      	ldrb	r3, [r7, #3]
 8019968:	2b00      	cmp	r3, #0
 801996a:	d10f      	bne.n	801998c <pbuf_pool_is_empty+0x44>
    /* queue a call to pbuf_free_ooseq if not already queued */
    PBUF_POOL_FREE_OOSEQ_QUEUE_CALL();
 801996c:	2100      	movs	r1, #0
 801996e:	480a      	ldr	r0, [pc, #40]	@ (8019998 <pbuf_pool_is_empty+0x50>)
 8019970:	f7fe fdd6 	bl	8018520 <tcpip_try_callback>
 8019974:	4603      	mov	r3, r0
 8019976:	2b00      	cmp	r3, #0
 8019978:	d008      	beq.n	801998c <pbuf_pool_is_empty+0x44>
 801997a:	f00c fb31 	bl	8025fe0 <sys_arch_protect>
 801997e:	6078      	str	r0, [r7, #4]
 8019980:	4b04      	ldr	r3, [pc, #16]	@ (8019994 <pbuf_pool_is_empty+0x4c>)
 8019982:	2200      	movs	r2, #0
 8019984:	701a      	strb	r2, [r3, #0]
 8019986:	6878      	ldr	r0, [r7, #4]
 8019988:	f00c fb38 	bl	8025ffc <sys_arch_unprotect>
  }
#endif /* PBUF_POOL_FREE_OOSEQ_QUEUE_CALL */
}
 801998c:	bf00      	nop
 801998e:	3708      	adds	r7, #8
 8019990:	46bd      	mov	sp, r7
 8019992:	bd80      	pop	{r7, pc}
 8019994:	24029fe9 	.word	0x24029fe9
 8019998:	08019935 	.word	0x08019935

0801999c <pbuf_init_alloced_pbuf>:
#endif /* !LWIP_TCP || !TCP_QUEUE_OOSEQ || !PBUF_POOL_FREE_OOSEQ */

/* Initialize members of struct pbuf after allocation */
static void
pbuf_init_alloced_pbuf(struct pbuf *p, void *payload, u16_t tot_len, u16_t len, pbuf_type type, u8_t flags)
{
 801999c:	b480      	push	{r7}
 801999e:	b085      	sub	sp, #20
 80199a0:	af00      	add	r7, sp, #0
 80199a2:	60f8      	str	r0, [r7, #12]
 80199a4:	60b9      	str	r1, [r7, #8]
 80199a6:	4611      	mov	r1, r2
 80199a8:	461a      	mov	r2, r3
 80199aa:	460b      	mov	r3, r1
 80199ac:	80fb      	strh	r3, [r7, #6]
 80199ae:	4613      	mov	r3, r2
 80199b0:	80bb      	strh	r3, [r7, #4]
  p->next = NULL;
 80199b2:	68fb      	ldr	r3, [r7, #12]
 80199b4:	2200      	movs	r2, #0
 80199b6:	601a      	str	r2, [r3, #0]
  p->payload = payload;
 80199b8:	68fb      	ldr	r3, [r7, #12]
 80199ba:	68ba      	ldr	r2, [r7, #8]
 80199bc:	605a      	str	r2, [r3, #4]
  p->tot_len = tot_len;
 80199be:	68fb      	ldr	r3, [r7, #12]
 80199c0:	88fa      	ldrh	r2, [r7, #6]
 80199c2:	811a      	strh	r2, [r3, #8]
  p->len = len;
 80199c4:	68fb      	ldr	r3, [r7, #12]
 80199c6:	88ba      	ldrh	r2, [r7, #4]
 80199c8:	815a      	strh	r2, [r3, #10]
  p->type_internal = (u8_t)type;
 80199ca:	8b3b      	ldrh	r3, [r7, #24]
 80199cc:	b2da      	uxtb	r2, r3
 80199ce:	68fb      	ldr	r3, [r7, #12]
 80199d0:	731a      	strb	r2, [r3, #12]
  p->flags = flags;
 80199d2:	68fb      	ldr	r3, [r7, #12]
 80199d4:	7f3a      	ldrb	r2, [r7, #28]
 80199d6:	735a      	strb	r2, [r3, #13]
  p->ref = 1;
 80199d8:	68fb      	ldr	r3, [r7, #12]
 80199da:	2201      	movs	r2, #1
 80199dc:	739a      	strb	r2, [r3, #14]
  p->if_idx = NETIF_NO_INDEX;
 80199de:	68fb      	ldr	r3, [r7, #12]
 80199e0:	2200      	movs	r2, #0
 80199e2:	73da      	strb	r2, [r3, #15]
}
 80199e4:	bf00      	nop
 80199e6:	3714      	adds	r7, #20
 80199e8:	46bd      	mov	sp, r7
 80199ea:	f85d 7b04 	ldr.w	r7, [sp], #4
 80199ee:	4770      	bx	lr

080199f0 <pbuf_alloc>:
 * @return the allocated pbuf. If multiple pbufs where allocated, this
 * is the first pbuf of a pbuf chain.
 */
struct pbuf *
pbuf_alloc(pbuf_layer layer, u16_t length, pbuf_type type)
{
 80199f0:	b580      	push	{r7, lr}
 80199f2:	b08c      	sub	sp, #48	@ 0x30
 80199f4:	af02      	add	r7, sp, #8
 80199f6:	4603      	mov	r3, r0
 80199f8:	71fb      	strb	r3, [r7, #7]
 80199fa:	460b      	mov	r3, r1
 80199fc:	80bb      	strh	r3, [r7, #4]
 80199fe:	4613      	mov	r3, r2
 8019a00:	807b      	strh	r3, [r7, #2]
  struct pbuf *p;
  u16_t offset = (u16_t)layer;
 8019a02:	79fb      	ldrb	r3, [r7, #7]
 8019a04:	847b      	strh	r3, [r7, #34]	@ 0x22
  LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_alloc(length=%"U16_F")\n", length));

  switch (type) {
 8019a06:	887b      	ldrh	r3, [r7, #2]
 8019a08:	f5b3 7f20 	cmp.w	r3, #640	@ 0x280
 8019a0c:	f000 8082 	beq.w	8019b14 <pbuf_alloc+0x124>
 8019a10:	f5b3 7f20 	cmp.w	r3, #640	@ 0x280
 8019a14:	f300 80c9 	bgt.w	8019baa <pbuf_alloc+0x1ba>
 8019a18:	f5b3 7fc1 	cmp.w	r3, #386	@ 0x182
 8019a1c:	d010      	beq.n	8019a40 <pbuf_alloc+0x50>
 8019a1e:	f5b3 7fc1 	cmp.w	r3, #386	@ 0x182
 8019a22:	f300 80c2 	bgt.w	8019baa <pbuf_alloc+0x1ba>
 8019a26:	2b01      	cmp	r3, #1
 8019a28:	d002      	beq.n	8019a30 <pbuf_alloc+0x40>
 8019a2a:	2b41      	cmp	r3, #65	@ 0x41
 8019a2c:	f040 80bd 	bne.w	8019baa <pbuf_alloc+0x1ba>
    case PBUF_REF: /* fall through */
    case PBUF_ROM:
      p = pbuf_alloc_reference(NULL, length, type);
 8019a30:	887a      	ldrh	r2, [r7, #2]
 8019a32:	88bb      	ldrh	r3, [r7, #4]
 8019a34:	4619      	mov	r1, r3
 8019a36:	2000      	movs	r0, #0
 8019a38:	f000 f8d2 	bl	8019be0 <pbuf_alloc_reference>
 8019a3c:	6278      	str	r0, [r7, #36]	@ 0x24
      break;
 8019a3e:	e0be      	b.n	8019bbe <pbuf_alloc+0x1ce>
    case PBUF_POOL: {
      struct pbuf *q, *last;
      u16_t rem_len; /* remaining length */
      p = NULL;
 8019a40:	2300      	movs	r3, #0
 8019a42:	627b      	str	r3, [r7, #36]	@ 0x24
      last = NULL;
 8019a44:	2300      	movs	r3, #0
 8019a46:	61fb      	str	r3, [r7, #28]
      rem_len = length;
 8019a48:	88bb      	ldrh	r3, [r7, #4]
 8019a4a:	837b      	strh	r3, [r7, #26]
      do {
        u16_t qlen;
        q = (struct pbuf *)memp_malloc(MEMP_PBUF_POOL);
 8019a4c:	200c      	movs	r0, #12
 8019a4e:	f7ff fb81 	bl	8019154 <memp_malloc>
 8019a52:	6138      	str	r0, [r7, #16]
        if (q == NULL) {
 8019a54:	693b      	ldr	r3, [r7, #16]
 8019a56:	2b00      	cmp	r3, #0
 8019a58:	d109      	bne.n	8019a6e <pbuf_alloc+0x7e>
          PBUF_POOL_IS_EMPTY();
 8019a5a:	f7ff ff75 	bl	8019948 <pbuf_pool_is_empty>
          /* free chain so far allocated */
          if (p) {
 8019a5e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8019a60:	2b00      	cmp	r3, #0
 8019a62:	d002      	beq.n	8019a6a <pbuf_alloc+0x7a>
            pbuf_free(p);
 8019a64:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 8019a66:	f000 fad9 	bl	801a01c <pbuf_free>
          }
          /* bail out unsuccessfully */
          return NULL;
 8019a6a:	2300      	movs	r3, #0
 8019a6c:	e0a8      	b.n	8019bc0 <pbuf_alloc+0x1d0>
        }
        qlen = LWIP_MIN(rem_len, (u16_t)(PBUF_POOL_BUFSIZE_ALIGNED - LWIP_MEM_ALIGN_SIZE(offset)));
 8019a6e:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 8019a70:	3303      	adds	r3, #3
 8019a72:	b29b      	uxth	r3, r3
 8019a74:	f023 0303 	bic.w	r3, r3, #3
 8019a78:	b29a      	uxth	r2, r3
 8019a7a:	f240 53ec 	movw	r3, #1516	@ 0x5ec
 8019a7e:	1a9b      	subs	r3, r3, r2
 8019a80:	b29b      	uxth	r3, r3
 8019a82:	8b7a      	ldrh	r2, [r7, #26]
 8019a84:	4293      	cmp	r3, r2
 8019a86:	bf28      	it	cs
 8019a88:	4613      	movcs	r3, r2
 8019a8a:	81fb      	strh	r3, [r7, #14]
        pbuf_init_alloced_pbuf(q, LWIP_MEM_ALIGN((void *)((u8_t *)q + SIZEOF_STRUCT_PBUF + offset)),
 8019a8c:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 8019a8e:	3310      	adds	r3, #16
 8019a90:	693a      	ldr	r2, [r7, #16]
 8019a92:	4413      	add	r3, r2
 8019a94:	3303      	adds	r3, #3
 8019a96:	f023 0303 	bic.w	r3, r3, #3
 8019a9a:	4618      	mov	r0, r3
 8019a9c:	89f9      	ldrh	r1, [r7, #14]
 8019a9e:	8b7a      	ldrh	r2, [r7, #26]
 8019aa0:	2300      	movs	r3, #0
 8019aa2:	9301      	str	r3, [sp, #4]
 8019aa4:	887b      	ldrh	r3, [r7, #2]
 8019aa6:	9300      	str	r3, [sp, #0]
 8019aa8:	460b      	mov	r3, r1
 8019aaa:	4601      	mov	r1, r0
 8019aac:	6938      	ldr	r0, [r7, #16]
 8019aae:	f7ff ff75 	bl	801999c <pbuf_init_alloced_pbuf>
                               rem_len, qlen, type, 0);
        LWIP_ASSERT("pbuf_alloc: pbuf q->payload properly aligned",
 8019ab2:	693b      	ldr	r3, [r7, #16]
 8019ab4:	685b      	ldr	r3, [r3, #4]
 8019ab6:	f003 0303 	and.w	r3, r3, #3
 8019aba:	2b00      	cmp	r3, #0
 8019abc:	d006      	beq.n	8019acc <pbuf_alloc+0xdc>
 8019abe:	4b42      	ldr	r3, [pc, #264]	@ (8019bc8 <pbuf_alloc+0x1d8>)
 8019ac0:	f44f 7280 	mov.w	r2, #256	@ 0x100
 8019ac4:	4941      	ldr	r1, [pc, #260]	@ (8019bcc <pbuf_alloc+0x1dc>)
 8019ac6:	4842      	ldr	r0, [pc, #264]	@ (8019bd0 <pbuf_alloc+0x1e0>)
 8019ac8:	f00f fd20 	bl	802950c <iprintf>
                    ((mem_ptr_t)q->payload % MEM_ALIGNMENT) == 0);
        LWIP_ASSERT("PBUF_POOL_BUFSIZE must be bigger than MEM_ALIGNMENT",
 8019acc:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 8019ace:	3303      	adds	r3, #3
 8019ad0:	f023 0303 	bic.w	r3, r3, #3
 8019ad4:	f240 52ec 	movw	r2, #1516	@ 0x5ec
 8019ad8:	4293      	cmp	r3, r2
 8019ada:	d106      	bne.n	8019aea <pbuf_alloc+0xfa>
 8019adc:	4b3a      	ldr	r3, [pc, #232]	@ (8019bc8 <pbuf_alloc+0x1d8>)
 8019ade:	f44f 7281 	mov.w	r2, #258	@ 0x102
 8019ae2:	493c      	ldr	r1, [pc, #240]	@ (8019bd4 <pbuf_alloc+0x1e4>)
 8019ae4:	483a      	ldr	r0, [pc, #232]	@ (8019bd0 <pbuf_alloc+0x1e0>)
 8019ae6:	f00f fd11 	bl	802950c <iprintf>
                    (PBUF_POOL_BUFSIZE_ALIGNED - LWIP_MEM_ALIGN_SIZE(offset)) > 0 );
        if (p == NULL) {
 8019aea:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8019aec:	2b00      	cmp	r3, #0
 8019aee:	d102      	bne.n	8019af6 <pbuf_alloc+0x106>
          /* allocated head of pbuf chain (into p) */
          p = q;
 8019af0:	693b      	ldr	r3, [r7, #16]
 8019af2:	627b      	str	r3, [r7, #36]	@ 0x24
 8019af4:	e002      	b.n	8019afc <pbuf_alloc+0x10c>
        } else {
          /* make previous pbuf point to this pbuf */
          last->next = q;
 8019af6:	69fb      	ldr	r3, [r7, #28]
 8019af8:	693a      	ldr	r2, [r7, #16]
 8019afa:	601a      	str	r2, [r3, #0]
        }
        last = q;
 8019afc:	693b      	ldr	r3, [r7, #16]
 8019afe:	61fb      	str	r3, [r7, #28]
        rem_len = (u16_t)(rem_len - qlen);
 8019b00:	8b7a      	ldrh	r2, [r7, #26]
 8019b02:	89fb      	ldrh	r3, [r7, #14]
 8019b04:	1ad3      	subs	r3, r2, r3
 8019b06:	837b      	strh	r3, [r7, #26]
        offset = 0;
 8019b08:	2300      	movs	r3, #0
 8019b0a:	847b      	strh	r3, [r7, #34]	@ 0x22
      } while (rem_len > 0);
 8019b0c:	8b7b      	ldrh	r3, [r7, #26]
 8019b0e:	2b00      	cmp	r3, #0
 8019b10:	d19c      	bne.n	8019a4c <pbuf_alloc+0x5c>
      break;
 8019b12:	e054      	b.n	8019bbe <pbuf_alloc+0x1ce>
    }
    case PBUF_RAM: {
      u16_t payload_len = (u16_t)(LWIP_MEM_ALIGN_SIZE(offset) + LWIP_MEM_ALIGN_SIZE(length));
 8019b14:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 8019b16:	3303      	adds	r3, #3
 8019b18:	b29b      	uxth	r3, r3
 8019b1a:	f023 0303 	bic.w	r3, r3, #3
 8019b1e:	b29a      	uxth	r2, r3
 8019b20:	88bb      	ldrh	r3, [r7, #4]
 8019b22:	3303      	adds	r3, #3
 8019b24:	b29b      	uxth	r3, r3
 8019b26:	f023 0303 	bic.w	r3, r3, #3
 8019b2a:	b29b      	uxth	r3, r3
 8019b2c:	4413      	add	r3, r2
 8019b2e:	833b      	strh	r3, [r7, #24]
      mem_size_t alloc_len = (mem_size_t)(LWIP_MEM_ALIGN_SIZE(SIZEOF_STRUCT_PBUF) + payload_len);
 8019b30:	8b3b      	ldrh	r3, [r7, #24]
 8019b32:	3310      	adds	r3, #16
 8019b34:	617b      	str	r3, [r7, #20]

      /* bug #50040: Check for integer overflow when calculating alloc_len */
      if ((payload_len < LWIP_MEM_ALIGN_SIZE(length)) ||
 8019b36:	8b3a      	ldrh	r2, [r7, #24]
 8019b38:	88bb      	ldrh	r3, [r7, #4]
 8019b3a:	3303      	adds	r3, #3
 8019b3c:	f023 0303 	bic.w	r3, r3, #3
 8019b40:	429a      	cmp	r2, r3
 8019b42:	d306      	bcc.n	8019b52 <pbuf_alloc+0x162>
          (alloc_len < LWIP_MEM_ALIGN_SIZE(length))) {
 8019b44:	88bb      	ldrh	r3, [r7, #4]
 8019b46:	3303      	adds	r3, #3
 8019b48:	f023 0303 	bic.w	r3, r3, #3
      if ((payload_len < LWIP_MEM_ALIGN_SIZE(length)) ||
 8019b4c:	697a      	ldr	r2, [r7, #20]
 8019b4e:	429a      	cmp	r2, r3
 8019b50:	d201      	bcs.n	8019b56 <pbuf_alloc+0x166>
        return NULL;
 8019b52:	2300      	movs	r3, #0
 8019b54:	e034      	b.n	8019bc0 <pbuf_alloc+0x1d0>
      }

      /* If pbuf is to be allocated in RAM, allocate memory for it. */
      p = (struct pbuf *)mem_malloc(alloc_len);
 8019b56:	6978      	ldr	r0, [r7, #20]
 8019b58:	f7ff f960 	bl	8018e1c <mem_malloc>
 8019b5c:	6278      	str	r0, [r7, #36]	@ 0x24
      if (p == NULL) {
 8019b5e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8019b60:	2b00      	cmp	r3, #0
 8019b62:	d101      	bne.n	8019b68 <pbuf_alloc+0x178>
        return NULL;
 8019b64:	2300      	movs	r3, #0
 8019b66:	e02b      	b.n	8019bc0 <pbuf_alloc+0x1d0>
      }
      pbuf_init_alloced_pbuf(p, LWIP_MEM_ALIGN((void *)((u8_t *)p + SIZEOF_STRUCT_PBUF + offset)),
 8019b68:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 8019b6a:	3310      	adds	r3, #16
 8019b6c:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8019b6e:	4413      	add	r3, r2
 8019b70:	3303      	adds	r3, #3
 8019b72:	f023 0303 	bic.w	r3, r3, #3
 8019b76:	4618      	mov	r0, r3
 8019b78:	88b9      	ldrh	r1, [r7, #4]
 8019b7a:	88ba      	ldrh	r2, [r7, #4]
 8019b7c:	2300      	movs	r3, #0
 8019b7e:	9301      	str	r3, [sp, #4]
 8019b80:	887b      	ldrh	r3, [r7, #2]
 8019b82:	9300      	str	r3, [sp, #0]
 8019b84:	460b      	mov	r3, r1
 8019b86:	4601      	mov	r1, r0
 8019b88:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 8019b8a:	f7ff ff07 	bl	801999c <pbuf_init_alloced_pbuf>
                             length, length, type, 0);
      LWIP_ASSERT("pbuf_alloc: pbuf->payload properly aligned",
 8019b8e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8019b90:	685b      	ldr	r3, [r3, #4]
 8019b92:	f003 0303 	and.w	r3, r3, #3
 8019b96:	2b00      	cmp	r3, #0
 8019b98:	d010      	beq.n	8019bbc <pbuf_alloc+0x1cc>
 8019b9a:	4b0b      	ldr	r3, [pc, #44]	@ (8019bc8 <pbuf_alloc+0x1d8>)
 8019b9c:	f44f 7291 	mov.w	r2, #290	@ 0x122
 8019ba0:	490d      	ldr	r1, [pc, #52]	@ (8019bd8 <pbuf_alloc+0x1e8>)
 8019ba2:	480b      	ldr	r0, [pc, #44]	@ (8019bd0 <pbuf_alloc+0x1e0>)
 8019ba4:	f00f fcb2 	bl	802950c <iprintf>
                  ((mem_ptr_t)p->payload % MEM_ALIGNMENT) == 0);
      break;
 8019ba8:	e008      	b.n	8019bbc <pbuf_alloc+0x1cc>
    }
    default:
      LWIP_ASSERT("pbuf_alloc: erroneous type", 0);
 8019baa:	4b07      	ldr	r3, [pc, #28]	@ (8019bc8 <pbuf_alloc+0x1d8>)
 8019bac:	f240 1227 	movw	r2, #295	@ 0x127
 8019bb0:	490a      	ldr	r1, [pc, #40]	@ (8019bdc <pbuf_alloc+0x1ec>)
 8019bb2:	4807      	ldr	r0, [pc, #28]	@ (8019bd0 <pbuf_alloc+0x1e0>)
 8019bb4:	f00f fcaa 	bl	802950c <iprintf>
      return NULL;
 8019bb8:	2300      	movs	r3, #0
 8019bba:	e001      	b.n	8019bc0 <pbuf_alloc+0x1d0>
      break;
 8019bbc:	bf00      	nop
  }
  LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_alloc(length=%"U16_F") == %p\n", length, (void *)p));
  return p;
 8019bbe:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
}
 8019bc0:	4618      	mov	r0, r3
 8019bc2:	3728      	adds	r7, #40	@ 0x28
 8019bc4:	46bd      	mov	sp, r7
 8019bc6:	bd80      	pop	{r7, pc}
 8019bc8:	0802dc3c 	.word	0x0802dc3c
 8019bcc:	0802dc6c 	.word	0x0802dc6c
 8019bd0:	0802dc9c 	.word	0x0802dc9c
 8019bd4:	0802dcc4 	.word	0x0802dcc4
 8019bd8:	0802dcf8 	.word	0x0802dcf8
 8019bdc:	0802dd24 	.word	0x0802dd24

08019be0 <pbuf_alloc_reference>:
 *
 * @return the allocated pbuf.
 */
struct pbuf *
pbuf_alloc_reference(void *payload, u16_t length, pbuf_type type)
{
 8019be0:	b580      	push	{r7, lr}
 8019be2:	b086      	sub	sp, #24
 8019be4:	af02      	add	r7, sp, #8
 8019be6:	6078      	str	r0, [r7, #4]
 8019be8:	460b      	mov	r3, r1
 8019bea:	807b      	strh	r3, [r7, #2]
 8019bec:	4613      	mov	r3, r2
 8019bee:	803b      	strh	r3, [r7, #0]
  struct pbuf *p;
  LWIP_ASSERT("invalid pbuf_type", (type == PBUF_REF) || (type == PBUF_ROM));
 8019bf0:	883b      	ldrh	r3, [r7, #0]
 8019bf2:	2b41      	cmp	r3, #65	@ 0x41
 8019bf4:	d009      	beq.n	8019c0a <pbuf_alloc_reference+0x2a>
 8019bf6:	883b      	ldrh	r3, [r7, #0]
 8019bf8:	2b01      	cmp	r3, #1
 8019bfa:	d006      	beq.n	8019c0a <pbuf_alloc_reference+0x2a>
 8019bfc:	4b0f      	ldr	r3, [pc, #60]	@ (8019c3c <pbuf_alloc_reference+0x5c>)
 8019bfe:	f44f 72a5 	mov.w	r2, #330	@ 0x14a
 8019c02:	490f      	ldr	r1, [pc, #60]	@ (8019c40 <pbuf_alloc_reference+0x60>)
 8019c04:	480f      	ldr	r0, [pc, #60]	@ (8019c44 <pbuf_alloc_reference+0x64>)
 8019c06:	f00f fc81 	bl	802950c <iprintf>
  /* only allocate memory for the pbuf structure */
  p = (struct pbuf *)memp_malloc(MEMP_PBUF);
 8019c0a:	200b      	movs	r0, #11
 8019c0c:	f7ff faa2 	bl	8019154 <memp_malloc>
 8019c10:	60f8      	str	r0, [r7, #12]
  if (p == NULL) {
 8019c12:	68fb      	ldr	r3, [r7, #12]
 8019c14:	2b00      	cmp	r3, #0
 8019c16:	d101      	bne.n	8019c1c <pbuf_alloc_reference+0x3c>
    LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_LEVEL_SERIOUS,
                ("pbuf_alloc_reference: Could not allocate MEMP_PBUF for PBUF_%s.\n",
                 (type == PBUF_ROM) ? "ROM" : "REF"));
    return NULL;
 8019c18:	2300      	movs	r3, #0
 8019c1a:	e00b      	b.n	8019c34 <pbuf_alloc_reference+0x54>
  }
  pbuf_init_alloced_pbuf(p, payload, length, length, type, 0);
 8019c1c:	8879      	ldrh	r1, [r7, #2]
 8019c1e:	887a      	ldrh	r2, [r7, #2]
 8019c20:	2300      	movs	r3, #0
 8019c22:	9301      	str	r3, [sp, #4]
 8019c24:	883b      	ldrh	r3, [r7, #0]
 8019c26:	9300      	str	r3, [sp, #0]
 8019c28:	460b      	mov	r3, r1
 8019c2a:	6879      	ldr	r1, [r7, #4]
 8019c2c:	68f8      	ldr	r0, [r7, #12]
 8019c2e:	f7ff feb5 	bl	801999c <pbuf_init_alloced_pbuf>
  return p;
 8019c32:	68fb      	ldr	r3, [r7, #12]
}
 8019c34:	4618      	mov	r0, r3
 8019c36:	3710      	adds	r7, #16
 8019c38:	46bd      	mov	sp, r7
 8019c3a:	bd80      	pop	{r7, pc}
 8019c3c:	0802dc3c 	.word	0x0802dc3c
 8019c40:	0802dd40 	.word	0x0802dd40
 8019c44:	0802dc9c 	.word	0x0802dc9c

08019c48 <pbuf_alloced_custom>:
 *        big enough to hold 'length' plus the header size
 */
struct pbuf *
pbuf_alloced_custom(pbuf_layer l, u16_t length, pbuf_type type, struct pbuf_custom *p,
                    void *payload_mem, u16_t payload_mem_len)
{
 8019c48:	b580      	push	{r7, lr}
 8019c4a:	b088      	sub	sp, #32
 8019c4c:	af02      	add	r7, sp, #8
 8019c4e:	607b      	str	r3, [r7, #4]
 8019c50:	4603      	mov	r3, r0
 8019c52:	73fb      	strb	r3, [r7, #15]
 8019c54:	460b      	mov	r3, r1
 8019c56:	81bb      	strh	r3, [r7, #12]
 8019c58:	4613      	mov	r3, r2
 8019c5a:	817b      	strh	r3, [r7, #10]
  u16_t offset = (u16_t)l;
 8019c5c:	7bfb      	ldrb	r3, [r7, #15]
 8019c5e:	827b      	strh	r3, [r7, #18]
  void *payload;
  LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_alloced_custom(length=%"U16_F")\n", length));

  if (LWIP_MEM_ALIGN_SIZE(offset) + length > payload_mem_len) {
 8019c60:	8a7b      	ldrh	r3, [r7, #18]
 8019c62:	3303      	adds	r3, #3
 8019c64:	f023 0203 	bic.w	r2, r3, #3
 8019c68:	89bb      	ldrh	r3, [r7, #12]
 8019c6a:	441a      	add	r2, r3
 8019c6c:	8cbb      	ldrh	r3, [r7, #36]	@ 0x24
 8019c6e:	429a      	cmp	r2, r3
 8019c70:	d901      	bls.n	8019c76 <pbuf_alloced_custom+0x2e>
    LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_LEVEL_WARNING, ("pbuf_alloced_custom(length=%"U16_F") buffer too short\n", length));
    return NULL;
 8019c72:	2300      	movs	r3, #0
 8019c74:	e018      	b.n	8019ca8 <pbuf_alloced_custom+0x60>
  }

  if (payload_mem != NULL) {
 8019c76:	6a3b      	ldr	r3, [r7, #32]
 8019c78:	2b00      	cmp	r3, #0
 8019c7a:	d007      	beq.n	8019c8c <pbuf_alloced_custom+0x44>
    payload = (u8_t *)payload_mem + LWIP_MEM_ALIGN_SIZE(offset);
 8019c7c:	8a7b      	ldrh	r3, [r7, #18]
 8019c7e:	3303      	adds	r3, #3
 8019c80:	f023 0303 	bic.w	r3, r3, #3
 8019c84:	6a3a      	ldr	r2, [r7, #32]
 8019c86:	4413      	add	r3, r2
 8019c88:	617b      	str	r3, [r7, #20]
 8019c8a:	e001      	b.n	8019c90 <pbuf_alloced_custom+0x48>
  } else {
    payload = NULL;
 8019c8c:	2300      	movs	r3, #0
 8019c8e:	617b      	str	r3, [r7, #20]
  }
  pbuf_init_alloced_pbuf(&p->pbuf, payload, length, length, type, PBUF_FLAG_IS_CUSTOM);
 8019c90:	6878      	ldr	r0, [r7, #4]
 8019c92:	89b9      	ldrh	r1, [r7, #12]
 8019c94:	89ba      	ldrh	r2, [r7, #12]
 8019c96:	2302      	movs	r3, #2
 8019c98:	9301      	str	r3, [sp, #4]
 8019c9a:	897b      	ldrh	r3, [r7, #10]
 8019c9c:	9300      	str	r3, [sp, #0]
 8019c9e:	460b      	mov	r3, r1
 8019ca0:	6979      	ldr	r1, [r7, #20]
 8019ca2:	f7ff fe7b 	bl	801999c <pbuf_init_alloced_pbuf>
  return &p->pbuf;
 8019ca6:	687b      	ldr	r3, [r7, #4]
}
 8019ca8:	4618      	mov	r0, r3
 8019caa:	3718      	adds	r7, #24
 8019cac:	46bd      	mov	sp, r7
 8019cae:	bd80      	pop	{r7, pc}

08019cb0 <pbuf_realloc>:
 *
 * @note Despite its name, pbuf_realloc cannot grow the size of a pbuf (chain).
 */
void
pbuf_realloc(struct pbuf *p, u16_t new_len)
{
 8019cb0:	b580      	push	{r7, lr}
 8019cb2:	b084      	sub	sp, #16
 8019cb4:	af00      	add	r7, sp, #0
 8019cb6:	6078      	str	r0, [r7, #4]
 8019cb8:	460b      	mov	r3, r1
 8019cba:	807b      	strh	r3, [r7, #2]
  struct pbuf *q;
  u16_t rem_len; /* remaining length */
  u16_t shrink;

  LWIP_ASSERT("pbuf_realloc: p != NULL", p != NULL);
 8019cbc:	687b      	ldr	r3, [r7, #4]
 8019cbe:	2b00      	cmp	r3, #0
 8019cc0:	d106      	bne.n	8019cd0 <pbuf_realloc+0x20>
 8019cc2:	4b39      	ldr	r3, [pc, #228]	@ (8019da8 <pbuf_realloc+0xf8>)
 8019cc4:	f44f 72cc 	mov.w	r2, #408	@ 0x198
 8019cc8:	4938      	ldr	r1, [pc, #224]	@ (8019dac <pbuf_realloc+0xfc>)
 8019cca:	4839      	ldr	r0, [pc, #228]	@ (8019db0 <pbuf_realloc+0x100>)
 8019ccc:	f00f fc1e 	bl	802950c <iprintf>

  /* desired length larger than current length? */
  if (new_len >= p->tot_len) {
 8019cd0:	687b      	ldr	r3, [r7, #4]
 8019cd2:	891b      	ldrh	r3, [r3, #8]
 8019cd4:	887a      	ldrh	r2, [r7, #2]
 8019cd6:	429a      	cmp	r2, r3
 8019cd8:	d261      	bcs.n	8019d9e <pbuf_realloc+0xee>
    return;
  }

  /* the pbuf chain grows by (new_len - p->tot_len) bytes
   * (which may be negative in case of shrinking) */
  shrink = (u16_t)(p->tot_len - new_len);
 8019cda:	687b      	ldr	r3, [r7, #4]
 8019cdc:	891a      	ldrh	r2, [r3, #8]
 8019cde:	887b      	ldrh	r3, [r7, #2]
 8019ce0:	1ad3      	subs	r3, r2, r3
 8019ce2:	813b      	strh	r3, [r7, #8]

  /* first, step over any pbufs that should remain in the chain */
  rem_len = new_len;
 8019ce4:	887b      	ldrh	r3, [r7, #2]
 8019ce6:	817b      	strh	r3, [r7, #10]
  q = p;
 8019ce8:	687b      	ldr	r3, [r7, #4]
 8019cea:	60fb      	str	r3, [r7, #12]
  /* should this pbuf be kept? */
  while (rem_len > q->len) {
 8019cec:	e018      	b.n	8019d20 <pbuf_realloc+0x70>
    /* decrease remaining length by pbuf length */
    rem_len = (u16_t)(rem_len - q->len);
 8019cee:	68fb      	ldr	r3, [r7, #12]
 8019cf0:	895b      	ldrh	r3, [r3, #10]
 8019cf2:	897a      	ldrh	r2, [r7, #10]
 8019cf4:	1ad3      	subs	r3, r2, r3
 8019cf6:	817b      	strh	r3, [r7, #10]
    /* decrease total length indicator */
    q->tot_len = (u16_t)(q->tot_len - shrink);
 8019cf8:	68fb      	ldr	r3, [r7, #12]
 8019cfa:	891a      	ldrh	r2, [r3, #8]
 8019cfc:	893b      	ldrh	r3, [r7, #8]
 8019cfe:	1ad3      	subs	r3, r2, r3
 8019d00:	b29a      	uxth	r2, r3
 8019d02:	68fb      	ldr	r3, [r7, #12]
 8019d04:	811a      	strh	r2, [r3, #8]
    /* proceed to next pbuf in chain */
    q = q->next;
 8019d06:	68fb      	ldr	r3, [r7, #12]
 8019d08:	681b      	ldr	r3, [r3, #0]
 8019d0a:	60fb      	str	r3, [r7, #12]
    LWIP_ASSERT("pbuf_realloc: q != NULL", q != NULL);
 8019d0c:	68fb      	ldr	r3, [r7, #12]
 8019d0e:	2b00      	cmp	r3, #0
 8019d10:	d106      	bne.n	8019d20 <pbuf_realloc+0x70>
 8019d12:	4b25      	ldr	r3, [pc, #148]	@ (8019da8 <pbuf_realloc+0xf8>)
 8019d14:	f240 12af 	movw	r2, #431	@ 0x1af
 8019d18:	4926      	ldr	r1, [pc, #152]	@ (8019db4 <pbuf_realloc+0x104>)
 8019d1a:	4825      	ldr	r0, [pc, #148]	@ (8019db0 <pbuf_realloc+0x100>)
 8019d1c:	f00f fbf6 	bl	802950c <iprintf>
  while (rem_len > q->len) {
 8019d20:	68fb      	ldr	r3, [r7, #12]
 8019d22:	895b      	ldrh	r3, [r3, #10]
 8019d24:	897a      	ldrh	r2, [r7, #10]
 8019d26:	429a      	cmp	r2, r3
 8019d28:	d8e1      	bhi.n	8019cee <pbuf_realloc+0x3e>
  /* we have now reached the new last pbuf (in q) */
  /* rem_len == desired length for pbuf q */

  /* shrink allocated memory for PBUF_RAM */
  /* (other types merely adjust their length fields */
  if (pbuf_match_allocsrc(q, PBUF_TYPE_ALLOC_SRC_MASK_STD_HEAP) && (rem_len != q->len)
 8019d2a:	68fb      	ldr	r3, [r7, #12]
 8019d2c:	7b1b      	ldrb	r3, [r3, #12]
 8019d2e:	f003 030f 	and.w	r3, r3, #15
 8019d32:	2b00      	cmp	r3, #0
 8019d34:	d11f      	bne.n	8019d76 <pbuf_realloc+0xc6>
 8019d36:	68fb      	ldr	r3, [r7, #12]
 8019d38:	895b      	ldrh	r3, [r3, #10]
 8019d3a:	897a      	ldrh	r2, [r7, #10]
 8019d3c:	429a      	cmp	r2, r3
 8019d3e:	d01a      	beq.n	8019d76 <pbuf_realloc+0xc6>
#if LWIP_SUPPORT_CUSTOM_PBUF
      && ((q->flags & PBUF_FLAG_IS_CUSTOM) == 0)
 8019d40:	68fb      	ldr	r3, [r7, #12]
 8019d42:	7b5b      	ldrb	r3, [r3, #13]
 8019d44:	f003 0302 	and.w	r3, r3, #2
 8019d48:	2b00      	cmp	r3, #0
 8019d4a:	d114      	bne.n	8019d76 <pbuf_realloc+0xc6>
#endif /* LWIP_SUPPORT_CUSTOM_PBUF */
     ) {
    /* reallocate and adjust the length of the pbuf that will be split */
    q = (struct pbuf *)mem_trim(q, (mem_size_t)(((u8_t *)q->payload - (u8_t *)q) + rem_len));
 8019d4c:	68fb      	ldr	r3, [r7, #12]
 8019d4e:	685a      	ldr	r2, [r3, #4]
 8019d50:	68fb      	ldr	r3, [r7, #12]
 8019d52:	1ad2      	subs	r2, r2, r3
 8019d54:	897b      	ldrh	r3, [r7, #10]
 8019d56:	4413      	add	r3, r2
 8019d58:	4619      	mov	r1, r3
 8019d5a:	68f8      	ldr	r0, [r7, #12]
 8019d5c:	f7fe ff5c 	bl	8018c18 <mem_trim>
 8019d60:	60f8      	str	r0, [r7, #12]
    LWIP_ASSERT("mem_trim returned q == NULL", q != NULL);
 8019d62:	68fb      	ldr	r3, [r7, #12]
 8019d64:	2b00      	cmp	r3, #0
 8019d66:	d106      	bne.n	8019d76 <pbuf_realloc+0xc6>
 8019d68:	4b0f      	ldr	r3, [pc, #60]	@ (8019da8 <pbuf_realloc+0xf8>)
 8019d6a:	f240 12bd 	movw	r2, #445	@ 0x1bd
 8019d6e:	4912      	ldr	r1, [pc, #72]	@ (8019db8 <pbuf_realloc+0x108>)
 8019d70:	480f      	ldr	r0, [pc, #60]	@ (8019db0 <pbuf_realloc+0x100>)
 8019d72:	f00f fbcb 	bl	802950c <iprintf>
  }
  /* adjust length fields for new last pbuf */
  q->len = rem_len;
 8019d76:	68fb      	ldr	r3, [r7, #12]
 8019d78:	897a      	ldrh	r2, [r7, #10]
 8019d7a:	815a      	strh	r2, [r3, #10]
  q->tot_len = q->len;
 8019d7c:	68fb      	ldr	r3, [r7, #12]
 8019d7e:	895a      	ldrh	r2, [r3, #10]
 8019d80:	68fb      	ldr	r3, [r7, #12]
 8019d82:	811a      	strh	r2, [r3, #8]

  /* any remaining pbufs in chain? */
  if (q->next != NULL) {
 8019d84:	68fb      	ldr	r3, [r7, #12]
 8019d86:	681b      	ldr	r3, [r3, #0]
 8019d88:	2b00      	cmp	r3, #0
 8019d8a:	d004      	beq.n	8019d96 <pbuf_realloc+0xe6>
    /* free remaining pbufs in chain */
    pbuf_free(q->next);
 8019d8c:	68fb      	ldr	r3, [r7, #12]
 8019d8e:	681b      	ldr	r3, [r3, #0]
 8019d90:	4618      	mov	r0, r3
 8019d92:	f000 f943 	bl	801a01c <pbuf_free>
  }
  /* q is last packet in chain */
  q->next = NULL;
 8019d96:	68fb      	ldr	r3, [r7, #12]
 8019d98:	2200      	movs	r2, #0
 8019d9a:	601a      	str	r2, [r3, #0]
 8019d9c:	e000      	b.n	8019da0 <pbuf_realloc+0xf0>
    return;
 8019d9e:	bf00      	nop

}
 8019da0:	3710      	adds	r7, #16
 8019da2:	46bd      	mov	sp, r7
 8019da4:	bd80      	pop	{r7, pc}
 8019da6:	bf00      	nop
 8019da8:	0802dc3c 	.word	0x0802dc3c
 8019dac:	0802dd54 	.word	0x0802dd54
 8019db0:	0802dc9c 	.word	0x0802dc9c
 8019db4:	0802dd6c 	.word	0x0802dd6c
 8019db8:	0802dd84 	.word	0x0802dd84

08019dbc <pbuf_add_header_impl>:
 * @return non-zero on failure, zero on success.
 *
 */
static u8_t
pbuf_add_header_impl(struct pbuf *p, size_t header_size_increment, u8_t force)
{
 8019dbc:	b580      	push	{r7, lr}
 8019dbe:	b086      	sub	sp, #24
 8019dc0:	af00      	add	r7, sp, #0
 8019dc2:	60f8      	str	r0, [r7, #12]
 8019dc4:	60b9      	str	r1, [r7, #8]
 8019dc6:	4613      	mov	r3, r2
 8019dc8:	71fb      	strb	r3, [r7, #7]
  u16_t type_internal;
  void *payload;
  u16_t increment_magnitude;

  LWIP_ASSERT("p != NULL", p != NULL);
 8019dca:	68fb      	ldr	r3, [r7, #12]
 8019dcc:	2b00      	cmp	r3, #0
 8019dce:	d106      	bne.n	8019dde <pbuf_add_header_impl+0x22>
 8019dd0:	4b2b      	ldr	r3, [pc, #172]	@ (8019e80 <pbuf_add_header_impl+0xc4>)
 8019dd2:	f240 12df 	movw	r2, #479	@ 0x1df
 8019dd6:	492b      	ldr	r1, [pc, #172]	@ (8019e84 <pbuf_add_header_impl+0xc8>)
 8019dd8:	482b      	ldr	r0, [pc, #172]	@ (8019e88 <pbuf_add_header_impl+0xcc>)
 8019dda:	f00f fb97 	bl	802950c <iprintf>
  if ((p == NULL) || (header_size_increment > 0xFFFF)) {
 8019dde:	68fb      	ldr	r3, [r7, #12]
 8019de0:	2b00      	cmp	r3, #0
 8019de2:	d003      	beq.n	8019dec <pbuf_add_header_impl+0x30>
 8019de4:	68bb      	ldr	r3, [r7, #8]
 8019de6:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 8019dea:	d301      	bcc.n	8019df0 <pbuf_add_header_impl+0x34>
    return 1;
 8019dec:	2301      	movs	r3, #1
 8019dee:	e043      	b.n	8019e78 <pbuf_add_header_impl+0xbc>
  }
  if (header_size_increment == 0) {
 8019df0:	68bb      	ldr	r3, [r7, #8]
 8019df2:	2b00      	cmp	r3, #0
 8019df4:	d101      	bne.n	8019dfa <pbuf_add_header_impl+0x3e>
    return 0;
 8019df6:	2300      	movs	r3, #0
 8019df8:	e03e      	b.n	8019e78 <pbuf_add_header_impl+0xbc>
  }

  increment_magnitude = (u16_t)header_size_increment;
 8019dfa:	68bb      	ldr	r3, [r7, #8]
 8019dfc:	827b      	strh	r3, [r7, #18]
  /* Do not allow tot_len to wrap as a result. */
  if ((u16_t)(increment_magnitude + p->tot_len) < increment_magnitude) {
 8019dfe:	68fb      	ldr	r3, [r7, #12]
 8019e00:	891a      	ldrh	r2, [r3, #8]
 8019e02:	8a7b      	ldrh	r3, [r7, #18]
 8019e04:	4413      	add	r3, r2
 8019e06:	b29b      	uxth	r3, r3
 8019e08:	8a7a      	ldrh	r2, [r7, #18]
 8019e0a:	429a      	cmp	r2, r3
 8019e0c:	d901      	bls.n	8019e12 <pbuf_add_header_impl+0x56>
    return 1;
 8019e0e:	2301      	movs	r3, #1
 8019e10:	e032      	b.n	8019e78 <pbuf_add_header_impl+0xbc>
  }

  type_internal = p->type_internal;
 8019e12:	68fb      	ldr	r3, [r7, #12]
 8019e14:	7b1b      	ldrb	r3, [r3, #12]
 8019e16:	823b      	strh	r3, [r7, #16]

  /* pbuf types containing payloads? */
  if (type_internal & PBUF_TYPE_FLAG_STRUCT_DATA_CONTIGUOUS) {
 8019e18:	8a3b      	ldrh	r3, [r7, #16]
 8019e1a:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 8019e1e:	2b00      	cmp	r3, #0
 8019e20:	d00c      	beq.n	8019e3c <pbuf_add_header_impl+0x80>
    /* set new payload pointer */
    payload = (u8_t *)p->payload - header_size_increment;
 8019e22:	68fb      	ldr	r3, [r7, #12]
 8019e24:	685a      	ldr	r2, [r3, #4]
 8019e26:	68bb      	ldr	r3, [r7, #8]
 8019e28:	425b      	negs	r3, r3
 8019e2a:	4413      	add	r3, r2
 8019e2c:	617b      	str	r3, [r7, #20]
    /* boundary check fails? */
    if ((u8_t *)payload < (u8_t *)p + SIZEOF_STRUCT_PBUF) {
 8019e2e:	68fb      	ldr	r3, [r7, #12]
 8019e30:	3310      	adds	r3, #16
 8019e32:	697a      	ldr	r2, [r7, #20]
 8019e34:	429a      	cmp	r2, r3
 8019e36:	d20d      	bcs.n	8019e54 <pbuf_add_header_impl+0x98>
      LWIP_DEBUGF( PBUF_DEBUG | LWIP_DBG_TRACE,
                   ("pbuf_add_header: failed as %p < %p (not enough space for new header size)\n",
                    (void *)payload, (void *)((u8_t *)p + SIZEOF_STRUCT_PBUF)));
      /* bail out unsuccessfully */
      return 1;
 8019e38:	2301      	movs	r3, #1
 8019e3a:	e01d      	b.n	8019e78 <pbuf_add_header_impl+0xbc>
    }
    /* pbuf types referring to external payloads? */
  } else {
    /* hide a header in the payload? */
    if (force) {
 8019e3c:	79fb      	ldrb	r3, [r7, #7]
 8019e3e:	2b00      	cmp	r3, #0
 8019e40:	d006      	beq.n	8019e50 <pbuf_add_header_impl+0x94>
      payload = (u8_t *)p->payload - header_size_increment;
 8019e42:	68fb      	ldr	r3, [r7, #12]
 8019e44:	685a      	ldr	r2, [r3, #4]
 8019e46:	68bb      	ldr	r3, [r7, #8]
 8019e48:	425b      	negs	r3, r3
 8019e4a:	4413      	add	r3, r2
 8019e4c:	617b      	str	r3, [r7, #20]
 8019e4e:	e001      	b.n	8019e54 <pbuf_add_header_impl+0x98>
    } else {
      /* cannot expand payload to front (yet!)
       * bail out unsuccessfully */
      return 1;
 8019e50:	2301      	movs	r3, #1
 8019e52:	e011      	b.n	8019e78 <pbuf_add_header_impl+0xbc>
  }
  LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_add_header: old %p new %p (%"U16_F")\n",
              (void *)p->payload, (void *)payload, increment_magnitude));

  /* modify pbuf fields */
  p->payload = payload;
 8019e54:	68fb      	ldr	r3, [r7, #12]
 8019e56:	697a      	ldr	r2, [r7, #20]
 8019e58:	605a      	str	r2, [r3, #4]
  p->len = (u16_t)(p->len + increment_magnitude);
 8019e5a:	68fb      	ldr	r3, [r7, #12]
 8019e5c:	895a      	ldrh	r2, [r3, #10]
 8019e5e:	8a7b      	ldrh	r3, [r7, #18]
 8019e60:	4413      	add	r3, r2
 8019e62:	b29a      	uxth	r2, r3
 8019e64:	68fb      	ldr	r3, [r7, #12]
 8019e66:	815a      	strh	r2, [r3, #10]
  p->tot_len = (u16_t)(p->tot_len + increment_magnitude);
 8019e68:	68fb      	ldr	r3, [r7, #12]
 8019e6a:	891a      	ldrh	r2, [r3, #8]
 8019e6c:	8a7b      	ldrh	r3, [r7, #18]
 8019e6e:	4413      	add	r3, r2
 8019e70:	b29a      	uxth	r2, r3
 8019e72:	68fb      	ldr	r3, [r7, #12]
 8019e74:	811a      	strh	r2, [r3, #8]


  return 0;
 8019e76:	2300      	movs	r3, #0
}
 8019e78:	4618      	mov	r0, r3
 8019e7a:	3718      	adds	r7, #24
 8019e7c:	46bd      	mov	sp, r7
 8019e7e:	bd80      	pop	{r7, pc}
 8019e80:	0802dc3c 	.word	0x0802dc3c
 8019e84:	0802dda0 	.word	0x0802dda0
 8019e88:	0802dc9c 	.word	0x0802dc9c

08019e8c <pbuf_add_header>:
 * @return non-zero on failure, zero on success.
 *
 */
u8_t
pbuf_add_header(struct pbuf *p, size_t header_size_increment)
{
 8019e8c:	b580      	push	{r7, lr}
 8019e8e:	b082      	sub	sp, #8
 8019e90:	af00      	add	r7, sp, #0
 8019e92:	6078      	str	r0, [r7, #4]
 8019e94:	6039      	str	r1, [r7, #0]
  return pbuf_add_header_impl(p, header_size_increment, 0);
 8019e96:	2200      	movs	r2, #0
 8019e98:	6839      	ldr	r1, [r7, #0]
 8019e9a:	6878      	ldr	r0, [r7, #4]
 8019e9c:	f7ff ff8e 	bl	8019dbc <pbuf_add_header_impl>
 8019ea0:	4603      	mov	r3, r0
}
 8019ea2:	4618      	mov	r0, r3
 8019ea4:	3708      	adds	r7, #8
 8019ea6:	46bd      	mov	sp, r7
 8019ea8:	bd80      	pop	{r7, pc}
	...

08019eac <pbuf_remove_header>:
 * @return non-zero on failure, zero on success.
 *
 */
u8_t
pbuf_remove_header(struct pbuf *p, size_t header_size_decrement)
{
 8019eac:	b580      	push	{r7, lr}
 8019eae:	b084      	sub	sp, #16
 8019eb0:	af00      	add	r7, sp, #0
 8019eb2:	6078      	str	r0, [r7, #4]
 8019eb4:	6039      	str	r1, [r7, #0]
  void *payload;
  u16_t increment_magnitude;

  LWIP_ASSERT("p != NULL", p != NULL);
 8019eb6:	687b      	ldr	r3, [r7, #4]
 8019eb8:	2b00      	cmp	r3, #0
 8019eba:	d106      	bne.n	8019eca <pbuf_remove_header+0x1e>
 8019ebc:	4b20      	ldr	r3, [pc, #128]	@ (8019f40 <pbuf_remove_header+0x94>)
 8019ebe:	f240 224b 	movw	r2, #587	@ 0x24b
 8019ec2:	4920      	ldr	r1, [pc, #128]	@ (8019f44 <pbuf_remove_header+0x98>)
 8019ec4:	4820      	ldr	r0, [pc, #128]	@ (8019f48 <pbuf_remove_header+0x9c>)
 8019ec6:	f00f fb21 	bl	802950c <iprintf>
  if ((p == NULL) || (header_size_decrement > 0xFFFF)) {
 8019eca:	687b      	ldr	r3, [r7, #4]
 8019ecc:	2b00      	cmp	r3, #0
 8019ece:	d003      	beq.n	8019ed8 <pbuf_remove_header+0x2c>
 8019ed0:	683b      	ldr	r3, [r7, #0]
 8019ed2:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 8019ed6:	d301      	bcc.n	8019edc <pbuf_remove_header+0x30>
    return 1;
 8019ed8:	2301      	movs	r3, #1
 8019eda:	e02c      	b.n	8019f36 <pbuf_remove_header+0x8a>
  }
  if (header_size_decrement == 0) {
 8019edc:	683b      	ldr	r3, [r7, #0]
 8019ede:	2b00      	cmp	r3, #0
 8019ee0:	d101      	bne.n	8019ee6 <pbuf_remove_header+0x3a>
    return 0;
 8019ee2:	2300      	movs	r3, #0
 8019ee4:	e027      	b.n	8019f36 <pbuf_remove_header+0x8a>
  }

  increment_magnitude = (u16_t)header_size_decrement;
 8019ee6:	683b      	ldr	r3, [r7, #0]
 8019ee8:	81fb      	strh	r3, [r7, #14]
  /* Check that we aren't going to move off the end of the pbuf */
  LWIP_ERROR("increment_magnitude <= p->len", (increment_magnitude <= p->len), return 1;);
 8019eea:	687b      	ldr	r3, [r7, #4]
 8019eec:	895b      	ldrh	r3, [r3, #10]
 8019eee:	89fa      	ldrh	r2, [r7, #14]
 8019ef0:	429a      	cmp	r2, r3
 8019ef2:	d908      	bls.n	8019f06 <pbuf_remove_header+0x5a>
 8019ef4:	4b12      	ldr	r3, [pc, #72]	@ (8019f40 <pbuf_remove_header+0x94>)
 8019ef6:	f240 2255 	movw	r2, #597	@ 0x255
 8019efa:	4914      	ldr	r1, [pc, #80]	@ (8019f4c <pbuf_remove_header+0xa0>)
 8019efc:	4812      	ldr	r0, [pc, #72]	@ (8019f48 <pbuf_remove_header+0x9c>)
 8019efe:	f00f fb05 	bl	802950c <iprintf>
 8019f02:	2301      	movs	r3, #1
 8019f04:	e017      	b.n	8019f36 <pbuf_remove_header+0x8a>

  /* remember current payload pointer */
  payload = p->payload;
 8019f06:	687b      	ldr	r3, [r7, #4]
 8019f08:	685b      	ldr	r3, [r3, #4]
 8019f0a:	60bb      	str	r3, [r7, #8]
  LWIP_UNUSED_ARG(payload); /* only used in LWIP_DEBUGF below */

  /* increase payload pointer (guarded by length check above) */
  p->payload = (u8_t *)p->payload + header_size_decrement;
 8019f0c:	687b      	ldr	r3, [r7, #4]
 8019f0e:	685a      	ldr	r2, [r3, #4]
 8019f10:	683b      	ldr	r3, [r7, #0]
 8019f12:	441a      	add	r2, r3
 8019f14:	687b      	ldr	r3, [r7, #4]
 8019f16:	605a      	str	r2, [r3, #4]
  /* modify pbuf length fields */
  p->len = (u16_t)(p->len - increment_magnitude);
 8019f18:	687b      	ldr	r3, [r7, #4]
 8019f1a:	895a      	ldrh	r2, [r3, #10]
 8019f1c:	89fb      	ldrh	r3, [r7, #14]
 8019f1e:	1ad3      	subs	r3, r2, r3
 8019f20:	b29a      	uxth	r2, r3
 8019f22:	687b      	ldr	r3, [r7, #4]
 8019f24:	815a      	strh	r2, [r3, #10]
  p->tot_len = (u16_t)(p->tot_len - increment_magnitude);
 8019f26:	687b      	ldr	r3, [r7, #4]
 8019f28:	891a      	ldrh	r2, [r3, #8]
 8019f2a:	89fb      	ldrh	r3, [r7, #14]
 8019f2c:	1ad3      	subs	r3, r2, r3
 8019f2e:	b29a      	uxth	r2, r3
 8019f30:	687b      	ldr	r3, [r7, #4]
 8019f32:	811a      	strh	r2, [r3, #8]

  LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_remove_header: old %p new %p (%"U16_F")\n",
              (void *)payload, (void *)p->payload, increment_magnitude));

  return 0;
 8019f34:	2300      	movs	r3, #0
}
 8019f36:	4618      	mov	r0, r3
 8019f38:	3710      	adds	r7, #16
 8019f3a:	46bd      	mov	sp, r7
 8019f3c:	bd80      	pop	{r7, pc}
 8019f3e:	bf00      	nop
 8019f40:	0802dc3c 	.word	0x0802dc3c
 8019f44:	0802dda0 	.word	0x0802dda0
 8019f48:	0802dc9c 	.word	0x0802dc9c
 8019f4c:	0802ddac 	.word	0x0802ddac

08019f50 <pbuf_header_impl>:

static u8_t
pbuf_header_impl(struct pbuf *p, s16_t header_size_increment, u8_t force)
{
 8019f50:	b580      	push	{r7, lr}
 8019f52:	b082      	sub	sp, #8
 8019f54:	af00      	add	r7, sp, #0
 8019f56:	6078      	str	r0, [r7, #4]
 8019f58:	460b      	mov	r3, r1
 8019f5a:	807b      	strh	r3, [r7, #2]
 8019f5c:	4613      	mov	r3, r2
 8019f5e:	707b      	strb	r3, [r7, #1]
  if (header_size_increment < 0) {
 8019f60:	f9b7 3002 	ldrsh.w	r3, [r7, #2]
 8019f64:	2b00      	cmp	r3, #0
 8019f66:	da08      	bge.n	8019f7a <pbuf_header_impl+0x2a>
    return pbuf_remove_header(p, (size_t) - header_size_increment);
 8019f68:	f9b7 3002 	ldrsh.w	r3, [r7, #2]
 8019f6c:	425b      	negs	r3, r3
 8019f6e:	4619      	mov	r1, r3
 8019f70:	6878      	ldr	r0, [r7, #4]
 8019f72:	f7ff ff9b 	bl	8019eac <pbuf_remove_header>
 8019f76:	4603      	mov	r3, r0
 8019f78:	e007      	b.n	8019f8a <pbuf_header_impl+0x3a>
  } else {
    return pbuf_add_header_impl(p, (size_t)header_size_increment, force);
 8019f7a:	f9b7 3002 	ldrsh.w	r3, [r7, #2]
 8019f7e:	787a      	ldrb	r2, [r7, #1]
 8019f80:	4619      	mov	r1, r3
 8019f82:	6878      	ldr	r0, [r7, #4]
 8019f84:	f7ff ff1a 	bl	8019dbc <pbuf_add_header_impl>
 8019f88:	4603      	mov	r3, r0
  }
}
 8019f8a:	4618      	mov	r0, r3
 8019f8c:	3708      	adds	r7, #8
 8019f8e:	46bd      	mov	sp, r7
 8019f90:	bd80      	pop	{r7, pc}

08019f92 <pbuf_header_force>:
 * Same as pbuf_header but does not check if 'header_size > 0' is allowed.
 * This is used internally only, to allow PBUF_REF for RX.
 */
u8_t
pbuf_header_force(struct pbuf *p, s16_t header_size_increment)
{
 8019f92:	b580      	push	{r7, lr}
 8019f94:	b082      	sub	sp, #8
 8019f96:	af00      	add	r7, sp, #0
 8019f98:	6078      	str	r0, [r7, #4]
 8019f9a:	460b      	mov	r3, r1
 8019f9c:	807b      	strh	r3, [r7, #2]
  return pbuf_header_impl(p, header_size_increment, 1);
 8019f9e:	f9b7 3002 	ldrsh.w	r3, [r7, #2]
 8019fa2:	2201      	movs	r2, #1
 8019fa4:	4619      	mov	r1, r3
 8019fa6:	6878      	ldr	r0, [r7, #4]
 8019fa8:	f7ff ffd2 	bl	8019f50 <pbuf_header_impl>
 8019fac:	4603      	mov	r3, r0
}
 8019fae:	4618      	mov	r0, r3
 8019fb0:	3708      	adds	r7, #8
 8019fb2:	46bd      	mov	sp, r7
 8019fb4:	bd80      	pop	{r7, pc}

08019fb6 <pbuf_free_header>:
 *                   takes an u16_t not s16_t!
 * @return the new head pbuf
 */
struct pbuf *
pbuf_free_header(struct pbuf *q, u16_t size)
{
 8019fb6:	b580      	push	{r7, lr}
 8019fb8:	b086      	sub	sp, #24
 8019fba:	af00      	add	r7, sp, #0
 8019fbc:	6078      	str	r0, [r7, #4]
 8019fbe:	460b      	mov	r3, r1
 8019fc0:	807b      	strh	r3, [r7, #2]
  struct pbuf *p = q;
 8019fc2:	687b      	ldr	r3, [r7, #4]
 8019fc4:	617b      	str	r3, [r7, #20]
  u16_t free_left = size;
 8019fc6:	887b      	ldrh	r3, [r7, #2]
 8019fc8:	827b      	strh	r3, [r7, #18]
  while (free_left && p) {
 8019fca:	e01c      	b.n	801a006 <pbuf_free_header+0x50>
    if (free_left >= p->len) {
 8019fcc:	697b      	ldr	r3, [r7, #20]
 8019fce:	895b      	ldrh	r3, [r3, #10]
 8019fd0:	8a7a      	ldrh	r2, [r7, #18]
 8019fd2:	429a      	cmp	r2, r3
 8019fd4:	d310      	bcc.n	8019ff8 <pbuf_free_header+0x42>
      struct pbuf *f = p;
 8019fd6:	697b      	ldr	r3, [r7, #20]
 8019fd8:	60fb      	str	r3, [r7, #12]
      free_left = (u16_t)(free_left - p->len);
 8019fda:	697b      	ldr	r3, [r7, #20]
 8019fdc:	895b      	ldrh	r3, [r3, #10]
 8019fde:	8a7a      	ldrh	r2, [r7, #18]
 8019fe0:	1ad3      	subs	r3, r2, r3
 8019fe2:	827b      	strh	r3, [r7, #18]
      p = p->next;
 8019fe4:	697b      	ldr	r3, [r7, #20]
 8019fe6:	681b      	ldr	r3, [r3, #0]
 8019fe8:	617b      	str	r3, [r7, #20]
      f->next = 0;
 8019fea:	68fb      	ldr	r3, [r7, #12]
 8019fec:	2200      	movs	r2, #0
 8019fee:	601a      	str	r2, [r3, #0]
      pbuf_free(f);
 8019ff0:	68f8      	ldr	r0, [r7, #12]
 8019ff2:	f000 f813 	bl	801a01c <pbuf_free>
 8019ff6:	e006      	b.n	801a006 <pbuf_free_header+0x50>
    } else {
      pbuf_remove_header(p, free_left);
 8019ff8:	8a7b      	ldrh	r3, [r7, #18]
 8019ffa:	4619      	mov	r1, r3
 8019ffc:	6978      	ldr	r0, [r7, #20]
 8019ffe:	f7ff ff55 	bl	8019eac <pbuf_remove_header>
      free_left = 0;
 801a002:	2300      	movs	r3, #0
 801a004:	827b      	strh	r3, [r7, #18]
  while (free_left && p) {
 801a006:	8a7b      	ldrh	r3, [r7, #18]
 801a008:	2b00      	cmp	r3, #0
 801a00a:	d002      	beq.n	801a012 <pbuf_free_header+0x5c>
 801a00c:	697b      	ldr	r3, [r7, #20]
 801a00e:	2b00      	cmp	r3, #0
 801a010:	d1dc      	bne.n	8019fcc <pbuf_free_header+0x16>
    }
  }
  return p;
 801a012:	697b      	ldr	r3, [r7, #20]
}
 801a014:	4618      	mov	r0, r3
 801a016:	3718      	adds	r7, #24
 801a018:	46bd      	mov	sp, r7
 801a01a:	bd80      	pop	{r7, pc}

0801a01c <pbuf_free>:
 * 1->1->1 becomes .......
 *
 */
u8_t
pbuf_free(struct pbuf *p)
{
 801a01c:	b580      	push	{r7, lr}
 801a01e:	b088      	sub	sp, #32
 801a020:	af00      	add	r7, sp, #0
 801a022:	6078      	str	r0, [r7, #4]
  u8_t alloc_src;
  struct pbuf *q;
  u8_t count;

  if (p == NULL) {
 801a024:	687b      	ldr	r3, [r7, #4]
 801a026:	2b00      	cmp	r3, #0
 801a028:	d10b      	bne.n	801a042 <pbuf_free+0x26>
    LWIP_ASSERT("p != NULL", p != NULL);
 801a02a:	687b      	ldr	r3, [r7, #4]
 801a02c:	2b00      	cmp	r3, #0
 801a02e:	d106      	bne.n	801a03e <pbuf_free+0x22>
 801a030:	4b3b      	ldr	r3, [pc, #236]	@ (801a120 <pbuf_free+0x104>)
 801a032:	f44f 7237 	mov.w	r2, #732	@ 0x2dc
 801a036:	493b      	ldr	r1, [pc, #236]	@ (801a124 <pbuf_free+0x108>)
 801a038:	483b      	ldr	r0, [pc, #236]	@ (801a128 <pbuf_free+0x10c>)
 801a03a:	f00f fa67 	bl	802950c <iprintf>
    /* if assertions are disabled, proceed with debug output */
    LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_LEVEL_SERIOUS,
                ("pbuf_free(p == NULL) was called.\n"));
    return 0;
 801a03e:	2300      	movs	r3, #0
 801a040:	e069      	b.n	801a116 <pbuf_free+0xfa>
  }
  LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_free(%p)\n", (void *)p));

  PERF_START;

  count = 0;
 801a042:	2300      	movs	r3, #0
 801a044:	77fb      	strb	r3, [r7, #31]
  /* de-allocate all consecutive pbufs from the head of the chain that
   * obtain a zero reference count after decrementing*/
  while (p != NULL) {
 801a046:	e062      	b.n	801a10e <pbuf_free+0xf2>
    LWIP_PBUF_REF_T ref;
    SYS_ARCH_DECL_PROTECT(old_level);
    /* Since decrementing ref cannot be guaranteed to be a single machine operation
     * we must protect it. We put the new ref into a local variable to prevent
     * further protection. */
    SYS_ARCH_PROTECT(old_level);
 801a048:	f00b ffca 	bl	8025fe0 <sys_arch_protect>
 801a04c:	61b8      	str	r0, [r7, #24]
    /* all pbufs in a chain are referenced at least once */
    LWIP_ASSERT("pbuf_free: p->ref > 0", p->ref > 0);
 801a04e:	687b      	ldr	r3, [r7, #4]
 801a050:	7b9b      	ldrb	r3, [r3, #14]
 801a052:	2b00      	cmp	r3, #0
 801a054:	d106      	bne.n	801a064 <pbuf_free+0x48>
 801a056:	4b32      	ldr	r3, [pc, #200]	@ (801a120 <pbuf_free+0x104>)
 801a058:	f240 22f1 	movw	r2, #753	@ 0x2f1
 801a05c:	4933      	ldr	r1, [pc, #204]	@ (801a12c <pbuf_free+0x110>)
 801a05e:	4832      	ldr	r0, [pc, #200]	@ (801a128 <pbuf_free+0x10c>)
 801a060:	f00f fa54 	bl	802950c <iprintf>
    /* decrease reference count (number of pointers to pbuf) */
    ref = --(p->ref);
 801a064:	687b      	ldr	r3, [r7, #4]
 801a066:	7b9b      	ldrb	r3, [r3, #14]
 801a068:	3b01      	subs	r3, #1
 801a06a:	b2da      	uxtb	r2, r3
 801a06c:	687b      	ldr	r3, [r7, #4]
 801a06e:	739a      	strb	r2, [r3, #14]
 801a070:	687b      	ldr	r3, [r7, #4]
 801a072:	7b9b      	ldrb	r3, [r3, #14]
 801a074:	75fb      	strb	r3, [r7, #23]
    SYS_ARCH_UNPROTECT(old_level);
 801a076:	69b8      	ldr	r0, [r7, #24]
 801a078:	f00b ffc0 	bl	8025ffc <sys_arch_unprotect>
    /* this pbuf is no longer referenced to? */
    if (ref == 0) {
 801a07c:	7dfb      	ldrb	r3, [r7, #23]
 801a07e:	2b00      	cmp	r3, #0
 801a080:	d143      	bne.n	801a10a <pbuf_free+0xee>
      /* remember next pbuf in chain for next iteration */
      q = p->next;
 801a082:	687b      	ldr	r3, [r7, #4]
 801a084:	681b      	ldr	r3, [r3, #0]
 801a086:	613b      	str	r3, [r7, #16]
      LWIP_DEBUGF( PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_free: deallocating %p\n", (void *)p));
      alloc_src = pbuf_get_allocsrc(p);
 801a088:	687b      	ldr	r3, [r7, #4]
 801a08a:	7b1b      	ldrb	r3, [r3, #12]
 801a08c:	f003 030f 	and.w	r3, r3, #15
 801a090:	73fb      	strb	r3, [r7, #15]
#if LWIP_SUPPORT_CUSTOM_PBUF
      /* is this a custom pbuf? */
      if ((p->flags & PBUF_FLAG_IS_CUSTOM) != 0) {
 801a092:	687b      	ldr	r3, [r7, #4]
 801a094:	7b5b      	ldrb	r3, [r3, #13]
 801a096:	f003 0302 	and.w	r3, r3, #2
 801a09a:	2b00      	cmp	r3, #0
 801a09c:	d011      	beq.n	801a0c2 <pbuf_free+0xa6>
        struct pbuf_custom *pc = (struct pbuf_custom *)p;
 801a09e:	687b      	ldr	r3, [r7, #4]
 801a0a0:	60bb      	str	r3, [r7, #8]
        LWIP_ASSERT("pc->custom_free_function != NULL", pc->custom_free_function != NULL);
 801a0a2:	68bb      	ldr	r3, [r7, #8]
 801a0a4:	691b      	ldr	r3, [r3, #16]
 801a0a6:	2b00      	cmp	r3, #0
 801a0a8:	d106      	bne.n	801a0b8 <pbuf_free+0x9c>
 801a0aa:	4b1d      	ldr	r3, [pc, #116]	@ (801a120 <pbuf_free+0x104>)
 801a0ac:	f240 22ff 	movw	r2, #767	@ 0x2ff
 801a0b0:	491f      	ldr	r1, [pc, #124]	@ (801a130 <pbuf_free+0x114>)
 801a0b2:	481d      	ldr	r0, [pc, #116]	@ (801a128 <pbuf_free+0x10c>)
 801a0b4:	f00f fa2a 	bl	802950c <iprintf>
        pc->custom_free_function(p);
 801a0b8:	68bb      	ldr	r3, [r7, #8]
 801a0ba:	691b      	ldr	r3, [r3, #16]
 801a0bc:	6878      	ldr	r0, [r7, #4]
 801a0be:	4798      	blx	r3
 801a0c0:	e01d      	b.n	801a0fe <pbuf_free+0xe2>
      } else
#endif /* LWIP_SUPPORT_CUSTOM_PBUF */
      {
        /* is this a pbuf from the pool? */
        if (alloc_src == PBUF_TYPE_ALLOC_SRC_MASK_STD_MEMP_PBUF_POOL) {
 801a0c2:	7bfb      	ldrb	r3, [r7, #15]
 801a0c4:	2b02      	cmp	r3, #2
 801a0c6:	d104      	bne.n	801a0d2 <pbuf_free+0xb6>
          memp_free(MEMP_PBUF_POOL, p);
 801a0c8:	6879      	ldr	r1, [r7, #4]
 801a0ca:	200c      	movs	r0, #12
 801a0cc:	f7ff f8b8 	bl	8019240 <memp_free>
 801a0d0:	e015      	b.n	801a0fe <pbuf_free+0xe2>
          /* is this a ROM or RAM referencing pbuf? */
        } else if (alloc_src == PBUF_TYPE_ALLOC_SRC_MASK_STD_MEMP_PBUF) {
 801a0d2:	7bfb      	ldrb	r3, [r7, #15]
 801a0d4:	2b01      	cmp	r3, #1
 801a0d6:	d104      	bne.n	801a0e2 <pbuf_free+0xc6>
          memp_free(MEMP_PBUF, p);
 801a0d8:	6879      	ldr	r1, [r7, #4]
 801a0da:	200b      	movs	r0, #11
 801a0dc:	f7ff f8b0 	bl	8019240 <memp_free>
 801a0e0:	e00d      	b.n	801a0fe <pbuf_free+0xe2>
          /* type == PBUF_RAM */
        } else if (alloc_src == PBUF_TYPE_ALLOC_SRC_MASK_STD_HEAP) {
 801a0e2:	7bfb      	ldrb	r3, [r7, #15]
 801a0e4:	2b00      	cmp	r3, #0
 801a0e6:	d103      	bne.n	801a0f0 <pbuf_free+0xd4>
          mem_free(p);
 801a0e8:	6878      	ldr	r0, [r7, #4]
 801a0ea:	f7fe fd05 	bl	8018af8 <mem_free>
 801a0ee:	e006      	b.n	801a0fe <pbuf_free+0xe2>
        } else {
          /* @todo: support freeing other types */
          LWIP_ASSERT("invalid pbuf type", 0);
 801a0f0:	4b0b      	ldr	r3, [pc, #44]	@ (801a120 <pbuf_free+0x104>)
 801a0f2:	f240 320f 	movw	r2, #783	@ 0x30f
 801a0f6:	490f      	ldr	r1, [pc, #60]	@ (801a134 <pbuf_free+0x118>)
 801a0f8:	480b      	ldr	r0, [pc, #44]	@ (801a128 <pbuf_free+0x10c>)
 801a0fa:	f00f fa07 	bl	802950c <iprintf>
        }
      }
      count++;
 801a0fe:	7ffb      	ldrb	r3, [r7, #31]
 801a100:	3301      	adds	r3, #1
 801a102:	77fb      	strb	r3, [r7, #31]
      /* proceed to next pbuf */
      p = q;
 801a104:	693b      	ldr	r3, [r7, #16]
 801a106:	607b      	str	r3, [r7, #4]
 801a108:	e001      	b.n	801a10e <pbuf_free+0xf2>
      /* p->ref > 0, this pbuf is still referenced to */
      /* (and so the remaining pbufs in chain as well) */
    } else {
      LWIP_DEBUGF( PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_free: %p has ref %"U16_F", ending here.\n", (void *)p, (u16_t)ref));
      /* stop walking through the chain */
      p = NULL;
 801a10a:	2300      	movs	r3, #0
 801a10c:	607b      	str	r3, [r7, #4]
  while (p != NULL) {
 801a10e:	687b      	ldr	r3, [r7, #4]
 801a110:	2b00      	cmp	r3, #0
 801a112:	d199      	bne.n	801a048 <pbuf_free+0x2c>
    }
  }
  PERF_STOP("pbuf_free");
  /* return number of de-allocated pbufs */
  return count;
 801a114:	7ffb      	ldrb	r3, [r7, #31]
}
 801a116:	4618      	mov	r0, r3
 801a118:	3720      	adds	r7, #32
 801a11a:	46bd      	mov	sp, r7
 801a11c:	bd80      	pop	{r7, pc}
 801a11e:	bf00      	nop
 801a120:	0802dc3c 	.word	0x0802dc3c
 801a124:	0802dda0 	.word	0x0802dda0
 801a128:	0802dc9c 	.word	0x0802dc9c
 801a12c:	0802ddcc 	.word	0x0802ddcc
 801a130:	0802dde4 	.word	0x0802dde4
 801a134:	0802de08 	.word	0x0802de08

0801a138 <pbuf_clen>:
 * @param p first pbuf of chain
 * @return the number of pbufs in a chain
 */
u16_t
pbuf_clen(const struct pbuf *p)
{
 801a138:	b480      	push	{r7}
 801a13a:	b085      	sub	sp, #20
 801a13c:	af00      	add	r7, sp, #0
 801a13e:	6078      	str	r0, [r7, #4]
  u16_t len;

  len = 0;
 801a140:	2300      	movs	r3, #0
 801a142:	81fb      	strh	r3, [r7, #14]
  while (p != NULL) {
 801a144:	e005      	b.n	801a152 <pbuf_clen+0x1a>
    ++len;
 801a146:	89fb      	ldrh	r3, [r7, #14]
 801a148:	3301      	adds	r3, #1
 801a14a:	81fb      	strh	r3, [r7, #14]
    p = p->next;
 801a14c:	687b      	ldr	r3, [r7, #4]
 801a14e:	681b      	ldr	r3, [r3, #0]
 801a150:	607b      	str	r3, [r7, #4]
  while (p != NULL) {
 801a152:	687b      	ldr	r3, [r7, #4]
 801a154:	2b00      	cmp	r3, #0
 801a156:	d1f6      	bne.n	801a146 <pbuf_clen+0xe>
  }
  return len;
 801a158:	89fb      	ldrh	r3, [r7, #14]
}
 801a15a:	4618      	mov	r0, r3
 801a15c:	3714      	adds	r7, #20
 801a15e:	46bd      	mov	sp, r7
 801a160:	f85d 7b04 	ldr.w	r7, [sp], #4
 801a164:	4770      	bx	lr
	...

0801a168 <pbuf_ref>:
 * @param p pbuf to increase reference counter of
 *
 */
void
pbuf_ref(struct pbuf *p)
{
 801a168:	b580      	push	{r7, lr}
 801a16a:	b084      	sub	sp, #16
 801a16c:	af00      	add	r7, sp, #0
 801a16e:	6078      	str	r0, [r7, #4]
  /* pbuf given? */
  if (p != NULL) {
 801a170:	687b      	ldr	r3, [r7, #4]
 801a172:	2b00      	cmp	r3, #0
 801a174:	d016      	beq.n	801a1a4 <pbuf_ref+0x3c>
    SYS_ARCH_SET(p->ref, (LWIP_PBUF_REF_T)(p->ref + 1));
 801a176:	f00b ff33 	bl	8025fe0 <sys_arch_protect>
 801a17a:	60f8      	str	r0, [r7, #12]
 801a17c:	687b      	ldr	r3, [r7, #4]
 801a17e:	7b9b      	ldrb	r3, [r3, #14]
 801a180:	3301      	adds	r3, #1
 801a182:	b2da      	uxtb	r2, r3
 801a184:	687b      	ldr	r3, [r7, #4]
 801a186:	739a      	strb	r2, [r3, #14]
 801a188:	68f8      	ldr	r0, [r7, #12]
 801a18a:	f00b ff37 	bl	8025ffc <sys_arch_unprotect>
    LWIP_ASSERT("pbuf ref overflow", p->ref > 0);
 801a18e:	687b      	ldr	r3, [r7, #4]
 801a190:	7b9b      	ldrb	r3, [r3, #14]
 801a192:	2b00      	cmp	r3, #0
 801a194:	d106      	bne.n	801a1a4 <pbuf_ref+0x3c>
 801a196:	4b05      	ldr	r3, [pc, #20]	@ (801a1ac <pbuf_ref+0x44>)
 801a198:	f240 3242 	movw	r2, #834	@ 0x342
 801a19c:	4904      	ldr	r1, [pc, #16]	@ (801a1b0 <pbuf_ref+0x48>)
 801a19e:	4805      	ldr	r0, [pc, #20]	@ (801a1b4 <pbuf_ref+0x4c>)
 801a1a0:	f00f f9b4 	bl	802950c <iprintf>
  }
}
 801a1a4:	bf00      	nop
 801a1a6:	3710      	adds	r7, #16
 801a1a8:	46bd      	mov	sp, r7
 801a1aa:	bd80      	pop	{r7, pc}
 801a1ac:	0802dc3c 	.word	0x0802dc3c
 801a1b0:	0802de1c 	.word	0x0802de1c
 801a1b4:	0802dc9c 	.word	0x0802dc9c

0801a1b8 <pbuf_cat>:
 *
 * @see pbuf_chain()
 */
void
pbuf_cat(struct pbuf *h, struct pbuf *t)
{
 801a1b8:	b580      	push	{r7, lr}
 801a1ba:	b084      	sub	sp, #16
 801a1bc:	af00      	add	r7, sp, #0
 801a1be:	6078      	str	r0, [r7, #4]
 801a1c0:	6039      	str	r1, [r7, #0]
  struct pbuf *p;

  LWIP_ERROR("(h != NULL) && (t != NULL) (programmer violates API)",
 801a1c2:	687b      	ldr	r3, [r7, #4]
 801a1c4:	2b00      	cmp	r3, #0
 801a1c6:	d002      	beq.n	801a1ce <pbuf_cat+0x16>
 801a1c8:	683b      	ldr	r3, [r7, #0]
 801a1ca:	2b00      	cmp	r3, #0
 801a1cc:	d107      	bne.n	801a1de <pbuf_cat+0x26>
 801a1ce:	4b20      	ldr	r3, [pc, #128]	@ (801a250 <pbuf_cat+0x98>)
 801a1d0:	f240 3259 	movw	r2, #857	@ 0x359
 801a1d4:	491f      	ldr	r1, [pc, #124]	@ (801a254 <pbuf_cat+0x9c>)
 801a1d6:	4820      	ldr	r0, [pc, #128]	@ (801a258 <pbuf_cat+0xa0>)
 801a1d8:	f00f f998 	bl	802950c <iprintf>
 801a1dc:	e034      	b.n	801a248 <pbuf_cat+0x90>
             ((h != NULL) && (t != NULL)), return;);

  /* proceed to last pbuf of chain */
  for (p = h; p->next != NULL; p = p->next) {
 801a1de:	687b      	ldr	r3, [r7, #4]
 801a1e0:	60fb      	str	r3, [r7, #12]
 801a1e2:	e00a      	b.n	801a1fa <pbuf_cat+0x42>
    /* add total length of second chain to all totals of first chain */
    p->tot_len = (u16_t)(p->tot_len + t->tot_len);
 801a1e4:	68fb      	ldr	r3, [r7, #12]
 801a1e6:	891a      	ldrh	r2, [r3, #8]
 801a1e8:	683b      	ldr	r3, [r7, #0]
 801a1ea:	891b      	ldrh	r3, [r3, #8]
 801a1ec:	4413      	add	r3, r2
 801a1ee:	b29a      	uxth	r2, r3
 801a1f0:	68fb      	ldr	r3, [r7, #12]
 801a1f2:	811a      	strh	r2, [r3, #8]
  for (p = h; p->next != NULL; p = p->next) {
 801a1f4:	68fb      	ldr	r3, [r7, #12]
 801a1f6:	681b      	ldr	r3, [r3, #0]
 801a1f8:	60fb      	str	r3, [r7, #12]
 801a1fa:	68fb      	ldr	r3, [r7, #12]
 801a1fc:	681b      	ldr	r3, [r3, #0]
 801a1fe:	2b00      	cmp	r3, #0
 801a200:	d1f0      	bne.n	801a1e4 <pbuf_cat+0x2c>
  }
  /* { p is last pbuf of first h chain, p->next == NULL } */
  LWIP_ASSERT("p->tot_len == p->len (of last pbuf in chain)", p->tot_len == p->len);
 801a202:	68fb      	ldr	r3, [r7, #12]
 801a204:	891a      	ldrh	r2, [r3, #8]
 801a206:	68fb      	ldr	r3, [r7, #12]
 801a208:	895b      	ldrh	r3, [r3, #10]
 801a20a:	429a      	cmp	r2, r3
 801a20c:	d006      	beq.n	801a21c <pbuf_cat+0x64>
 801a20e:	4b10      	ldr	r3, [pc, #64]	@ (801a250 <pbuf_cat+0x98>)
 801a210:	f240 3262 	movw	r2, #866	@ 0x362
 801a214:	4911      	ldr	r1, [pc, #68]	@ (801a25c <pbuf_cat+0xa4>)
 801a216:	4810      	ldr	r0, [pc, #64]	@ (801a258 <pbuf_cat+0xa0>)
 801a218:	f00f f978 	bl	802950c <iprintf>
  LWIP_ASSERT("p->next == NULL", p->next == NULL);
 801a21c:	68fb      	ldr	r3, [r7, #12]
 801a21e:	681b      	ldr	r3, [r3, #0]
 801a220:	2b00      	cmp	r3, #0
 801a222:	d006      	beq.n	801a232 <pbuf_cat+0x7a>
 801a224:	4b0a      	ldr	r3, [pc, #40]	@ (801a250 <pbuf_cat+0x98>)
 801a226:	f240 3263 	movw	r2, #867	@ 0x363
 801a22a:	490d      	ldr	r1, [pc, #52]	@ (801a260 <pbuf_cat+0xa8>)
 801a22c:	480a      	ldr	r0, [pc, #40]	@ (801a258 <pbuf_cat+0xa0>)
 801a22e:	f00f f96d 	bl	802950c <iprintf>
  /* add total length of second chain to last pbuf total of first chain */
  p->tot_len = (u16_t)(p->tot_len + t->tot_len);
 801a232:	68fb      	ldr	r3, [r7, #12]
 801a234:	891a      	ldrh	r2, [r3, #8]
 801a236:	683b      	ldr	r3, [r7, #0]
 801a238:	891b      	ldrh	r3, [r3, #8]
 801a23a:	4413      	add	r3, r2
 801a23c:	b29a      	uxth	r2, r3
 801a23e:	68fb      	ldr	r3, [r7, #12]
 801a240:	811a      	strh	r2, [r3, #8]
  /* chain last pbuf of head (p) with first of tail (t) */
  p->next = t;
 801a242:	68fb      	ldr	r3, [r7, #12]
 801a244:	683a      	ldr	r2, [r7, #0]
 801a246:	601a      	str	r2, [r3, #0]
  /* p->next now references t, but the caller will drop its reference to t,
   * so netto there is no change to the reference count of t.
   */
}
 801a248:	3710      	adds	r7, #16
 801a24a:	46bd      	mov	sp, r7
 801a24c:	bd80      	pop	{r7, pc}
 801a24e:	bf00      	nop
 801a250:	0802dc3c 	.word	0x0802dc3c
 801a254:	0802de30 	.word	0x0802de30
 801a258:	0802dc9c 	.word	0x0802dc9c
 801a25c:	0802de68 	.word	0x0802de68
 801a260:	0802de98 	.word	0x0802de98

0801a264 <pbuf_chain>:
 * The ->ref field of the first pbuf of the tail chain is adjusted.
 *
 */
void
pbuf_chain(struct pbuf *h, struct pbuf *t)
{
 801a264:	b580      	push	{r7, lr}
 801a266:	b082      	sub	sp, #8
 801a268:	af00      	add	r7, sp, #0
 801a26a:	6078      	str	r0, [r7, #4]
 801a26c:	6039      	str	r1, [r7, #0]
  pbuf_cat(h, t);
 801a26e:	6839      	ldr	r1, [r7, #0]
 801a270:	6878      	ldr	r0, [r7, #4]
 801a272:	f7ff ffa1 	bl	801a1b8 <pbuf_cat>
  /* t is now referenced by h */
  pbuf_ref(t);
 801a276:	6838      	ldr	r0, [r7, #0]
 801a278:	f7ff ff76 	bl	801a168 <pbuf_ref>
  LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_chain: %p references %p\n", (void *)h, (void *)t));
}
 801a27c:	bf00      	nop
 801a27e:	3708      	adds	r7, #8
 801a280:	46bd      	mov	sp, r7
 801a282:	bd80      	pop	{r7, pc}

0801a284 <pbuf_copy>:
 *         ERR_ARG if one of the pbufs is NULL or p_to is not big
 *                 enough to hold p_from
 */
err_t
pbuf_copy(struct pbuf *p_to, const struct pbuf *p_from)
{
 801a284:	b580      	push	{r7, lr}
 801a286:	b086      	sub	sp, #24
 801a288:	af00      	add	r7, sp, #0
 801a28a:	6078      	str	r0, [r7, #4]
 801a28c:	6039      	str	r1, [r7, #0]
  size_t offset_to = 0, offset_from = 0, len;
 801a28e:	2300      	movs	r3, #0
 801a290:	617b      	str	r3, [r7, #20]
 801a292:	2300      	movs	r3, #0
 801a294:	613b      	str	r3, [r7, #16]

  LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_copy(%p, %p)\n",
              (const void *)p_to, (const void *)p_from));

  /* is the target big enough to hold the source? */
  LWIP_ERROR("pbuf_copy: target not big enough to hold source", ((p_to != NULL) &&
 801a296:	687b      	ldr	r3, [r7, #4]
 801a298:	2b00      	cmp	r3, #0
 801a29a:	d008      	beq.n	801a2ae <pbuf_copy+0x2a>
 801a29c:	683b      	ldr	r3, [r7, #0]
 801a29e:	2b00      	cmp	r3, #0
 801a2a0:	d005      	beq.n	801a2ae <pbuf_copy+0x2a>
 801a2a2:	687b      	ldr	r3, [r7, #4]
 801a2a4:	891a      	ldrh	r2, [r3, #8]
 801a2a6:	683b      	ldr	r3, [r7, #0]
 801a2a8:	891b      	ldrh	r3, [r3, #8]
 801a2aa:	429a      	cmp	r2, r3
 801a2ac:	d209      	bcs.n	801a2c2 <pbuf_copy+0x3e>
 801a2ae:	4b57      	ldr	r3, [pc, #348]	@ (801a40c <pbuf_copy+0x188>)
 801a2b0:	f240 32c9 	movw	r2, #969	@ 0x3c9
 801a2b4:	4956      	ldr	r1, [pc, #344]	@ (801a410 <pbuf_copy+0x18c>)
 801a2b6:	4857      	ldr	r0, [pc, #348]	@ (801a414 <pbuf_copy+0x190>)
 801a2b8:	f00f f928 	bl	802950c <iprintf>
 801a2bc:	f06f 030f 	mvn.w	r3, #15
 801a2c0:	e09f      	b.n	801a402 <pbuf_copy+0x17e>
             (p_from != NULL) && (p_to->tot_len >= p_from->tot_len)), return ERR_ARG;);

  /* iterate through pbuf chain */
  do {
    /* copy one part of the original chain */
    if ((p_to->len - offset_to) >= (p_from->len - offset_from)) {
 801a2c2:	687b      	ldr	r3, [r7, #4]
 801a2c4:	895b      	ldrh	r3, [r3, #10]
 801a2c6:	461a      	mov	r2, r3
 801a2c8:	697b      	ldr	r3, [r7, #20]
 801a2ca:	1ad2      	subs	r2, r2, r3
 801a2cc:	683b      	ldr	r3, [r7, #0]
 801a2ce:	895b      	ldrh	r3, [r3, #10]
 801a2d0:	4619      	mov	r1, r3
 801a2d2:	693b      	ldr	r3, [r7, #16]
 801a2d4:	1acb      	subs	r3, r1, r3
 801a2d6:	429a      	cmp	r2, r3
 801a2d8:	d306      	bcc.n	801a2e8 <pbuf_copy+0x64>
      /* complete current p_from fits into current p_to */
      len = p_from->len - offset_from;
 801a2da:	683b      	ldr	r3, [r7, #0]
 801a2dc:	895b      	ldrh	r3, [r3, #10]
 801a2de:	461a      	mov	r2, r3
 801a2e0:	693b      	ldr	r3, [r7, #16]
 801a2e2:	1ad3      	subs	r3, r2, r3
 801a2e4:	60fb      	str	r3, [r7, #12]
 801a2e6:	e005      	b.n	801a2f4 <pbuf_copy+0x70>
    } else {
      /* current p_from does not fit into current p_to */
      len = p_to->len - offset_to;
 801a2e8:	687b      	ldr	r3, [r7, #4]
 801a2ea:	895b      	ldrh	r3, [r3, #10]
 801a2ec:	461a      	mov	r2, r3
 801a2ee:	697b      	ldr	r3, [r7, #20]
 801a2f0:	1ad3      	subs	r3, r2, r3
 801a2f2:	60fb      	str	r3, [r7, #12]
    }
    MEMCPY((u8_t *)p_to->payload + offset_to, (u8_t *)p_from->payload + offset_from, len);
 801a2f4:	687b      	ldr	r3, [r7, #4]
 801a2f6:	685a      	ldr	r2, [r3, #4]
 801a2f8:	697b      	ldr	r3, [r7, #20]
 801a2fa:	18d0      	adds	r0, r2, r3
 801a2fc:	683b      	ldr	r3, [r7, #0]
 801a2fe:	685a      	ldr	r2, [r3, #4]
 801a300:	693b      	ldr	r3, [r7, #16]
 801a302:	4413      	add	r3, r2
 801a304:	68fa      	ldr	r2, [r7, #12]
 801a306:	4619      	mov	r1, r3
 801a308:	f00f fb89 	bl	8029a1e <memcpy>
    offset_to += len;
 801a30c:	697a      	ldr	r2, [r7, #20]
 801a30e:	68fb      	ldr	r3, [r7, #12]
 801a310:	4413      	add	r3, r2
 801a312:	617b      	str	r3, [r7, #20]
    offset_from += len;
 801a314:	693a      	ldr	r2, [r7, #16]
 801a316:	68fb      	ldr	r3, [r7, #12]
 801a318:	4413      	add	r3, r2
 801a31a:	613b      	str	r3, [r7, #16]
    LWIP_ASSERT("offset_to <= p_to->len", offset_to <= p_to->len);
 801a31c:	687b      	ldr	r3, [r7, #4]
 801a31e:	895b      	ldrh	r3, [r3, #10]
 801a320:	461a      	mov	r2, r3
 801a322:	697b      	ldr	r3, [r7, #20]
 801a324:	4293      	cmp	r3, r2
 801a326:	d906      	bls.n	801a336 <pbuf_copy+0xb2>
 801a328:	4b38      	ldr	r3, [pc, #224]	@ (801a40c <pbuf_copy+0x188>)
 801a32a:	f240 32d9 	movw	r2, #985	@ 0x3d9
 801a32e:	493a      	ldr	r1, [pc, #232]	@ (801a418 <pbuf_copy+0x194>)
 801a330:	4838      	ldr	r0, [pc, #224]	@ (801a414 <pbuf_copy+0x190>)
 801a332:	f00f f8eb 	bl	802950c <iprintf>
    LWIP_ASSERT("offset_from <= p_from->len", offset_from <= p_from->len);
 801a336:	683b      	ldr	r3, [r7, #0]
 801a338:	895b      	ldrh	r3, [r3, #10]
 801a33a:	461a      	mov	r2, r3
 801a33c:	693b      	ldr	r3, [r7, #16]
 801a33e:	4293      	cmp	r3, r2
 801a340:	d906      	bls.n	801a350 <pbuf_copy+0xcc>
 801a342:	4b32      	ldr	r3, [pc, #200]	@ (801a40c <pbuf_copy+0x188>)
 801a344:	f240 32da 	movw	r2, #986	@ 0x3da
 801a348:	4934      	ldr	r1, [pc, #208]	@ (801a41c <pbuf_copy+0x198>)
 801a34a:	4832      	ldr	r0, [pc, #200]	@ (801a414 <pbuf_copy+0x190>)
 801a34c:	f00f f8de 	bl	802950c <iprintf>
    if (offset_from >= p_from->len) {
 801a350:	683b      	ldr	r3, [r7, #0]
 801a352:	895b      	ldrh	r3, [r3, #10]
 801a354:	461a      	mov	r2, r3
 801a356:	693b      	ldr	r3, [r7, #16]
 801a358:	4293      	cmp	r3, r2
 801a35a:	d304      	bcc.n	801a366 <pbuf_copy+0xe2>
      /* on to next p_from (if any) */
      offset_from = 0;
 801a35c:	2300      	movs	r3, #0
 801a35e:	613b      	str	r3, [r7, #16]
      p_from = p_from->next;
 801a360:	683b      	ldr	r3, [r7, #0]
 801a362:	681b      	ldr	r3, [r3, #0]
 801a364:	603b      	str	r3, [r7, #0]
    }
    if (offset_to == p_to->len) {
 801a366:	687b      	ldr	r3, [r7, #4]
 801a368:	895b      	ldrh	r3, [r3, #10]
 801a36a:	461a      	mov	r2, r3
 801a36c:	697b      	ldr	r3, [r7, #20]
 801a36e:	4293      	cmp	r3, r2
 801a370:	d114      	bne.n	801a39c <pbuf_copy+0x118>
      /* on to next p_to (if any) */
      offset_to = 0;
 801a372:	2300      	movs	r3, #0
 801a374:	617b      	str	r3, [r7, #20]
      p_to = p_to->next;
 801a376:	687b      	ldr	r3, [r7, #4]
 801a378:	681b      	ldr	r3, [r3, #0]
 801a37a:	607b      	str	r3, [r7, #4]
      LWIP_ERROR("p_to != NULL", (p_to != NULL) || (p_from == NULL), return ERR_ARG;);
 801a37c:	687b      	ldr	r3, [r7, #4]
 801a37e:	2b00      	cmp	r3, #0
 801a380:	d10c      	bne.n	801a39c <pbuf_copy+0x118>
 801a382:	683b      	ldr	r3, [r7, #0]
 801a384:	2b00      	cmp	r3, #0
 801a386:	d009      	beq.n	801a39c <pbuf_copy+0x118>
 801a388:	4b20      	ldr	r3, [pc, #128]	@ (801a40c <pbuf_copy+0x188>)
 801a38a:	f44f 7279 	mov.w	r2, #996	@ 0x3e4
 801a38e:	4924      	ldr	r1, [pc, #144]	@ (801a420 <pbuf_copy+0x19c>)
 801a390:	4820      	ldr	r0, [pc, #128]	@ (801a414 <pbuf_copy+0x190>)
 801a392:	f00f f8bb 	bl	802950c <iprintf>
 801a396:	f06f 030f 	mvn.w	r3, #15
 801a39a:	e032      	b.n	801a402 <pbuf_copy+0x17e>
    }

    if ((p_from != NULL) && (p_from->len == p_from->tot_len)) {
 801a39c:	683b      	ldr	r3, [r7, #0]
 801a39e:	2b00      	cmp	r3, #0
 801a3a0:	d013      	beq.n	801a3ca <pbuf_copy+0x146>
 801a3a2:	683b      	ldr	r3, [r7, #0]
 801a3a4:	895a      	ldrh	r2, [r3, #10]
 801a3a6:	683b      	ldr	r3, [r7, #0]
 801a3a8:	891b      	ldrh	r3, [r3, #8]
 801a3aa:	429a      	cmp	r2, r3
 801a3ac:	d10d      	bne.n	801a3ca <pbuf_copy+0x146>
      /* don't copy more than one packet! */
      LWIP_ERROR("pbuf_copy() does not allow packet queues!",
 801a3ae:	683b      	ldr	r3, [r7, #0]
 801a3b0:	681b      	ldr	r3, [r3, #0]
 801a3b2:	2b00      	cmp	r3, #0
 801a3b4:	d009      	beq.n	801a3ca <pbuf_copy+0x146>
 801a3b6:	4b15      	ldr	r3, [pc, #84]	@ (801a40c <pbuf_copy+0x188>)
 801a3b8:	f240 32e9 	movw	r2, #1001	@ 0x3e9
 801a3bc:	4919      	ldr	r1, [pc, #100]	@ (801a424 <pbuf_copy+0x1a0>)
 801a3be:	4815      	ldr	r0, [pc, #84]	@ (801a414 <pbuf_copy+0x190>)
 801a3c0:	f00f f8a4 	bl	802950c <iprintf>
 801a3c4:	f06f 0305 	mvn.w	r3, #5
 801a3c8:	e01b      	b.n	801a402 <pbuf_copy+0x17e>
                 (p_from->next == NULL), return ERR_VAL;);
    }
    if ((p_to != NULL) && (p_to->len == p_to->tot_len)) {
 801a3ca:	687b      	ldr	r3, [r7, #4]
 801a3cc:	2b00      	cmp	r3, #0
 801a3ce:	d013      	beq.n	801a3f8 <pbuf_copy+0x174>
 801a3d0:	687b      	ldr	r3, [r7, #4]
 801a3d2:	895a      	ldrh	r2, [r3, #10]
 801a3d4:	687b      	ldr	r3, [r7, #4]
 801a3d6:	891b      	ldrh	r3, [r3, #8]
 801a3d8:	429a      	cmp	r2, r3
 801a3da:	d10d      	bne.n	801a3f8 <pbuf_copy+0x174>
      /* don't copy more than one packet! */
      LWIP_ERROR("pbuf_copy() does not allow packet queues!",
 801a3dc:	687b      	ldr	r3, [r7, #4]
 801a3de:	681b      	ldr	r3, [r3, #0]
 801a3e0:	2b00      	cmp	r3, #0
 801a3e2:	d009      	beq.n	801a3f8 <pbuf_copy+0x174>
 801a3e4:	4b09      	ldr	r3, [pc, #36]	@ (801a40c <pbuf_copy+0x188>)
 801a3e6:	f240 32ee 	movw	r2, #1006	@ 0x3ee
 801a3ea:	490e      	ldr	r1, [pc, #56]	@ (801a424 <pbuf_copy+0x1a0>)
 801a3ec:	4809      	ldr	r0, [pc, #36]	@ (801a414 <pbuf_copy+0x190>)
 801a3ee:	f00f f88d 	bl	802950c <iprintf>
 801a3f2:	f06f 0305 	mvn.w	r3, #5
 801a3f6:	e004      	b.n	801a402 <pbuf_copy+0x17e>
                 (p_to->next == NULL), return ERR_VAL;);
    }
  } while (p_from);
 801a3f8:	683b      	ldr	r3, [r7, #0]
 801a3fa:	2b00      	cmp	r3, #0
 801a3fc:	f47f af61 	bne.w	801a2c2 <pbuf_copy+0x3e>
  LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_copy: end of chain reached.\n"));
  return ERR_OK;
 801a400:	2300      	movs	r3, #0
}
 801a402:	4618      	mov	r0, r3
 801a404:	3718      	adds	r7, #24
 801a406:	46bd      	mov	sp, r7
 801a408:	bd80      	pop	{r7, pc}
 801a40a:	bf00      	nop
 801a40c:	0802dc3c 	.word	0x0802dc3c
 801a410:	0802dee4 	.word	0x0802dee4
 801a414:	0802dc9c 	.word	0x0802dc9c
 801a418:	0802df14 	.word	0x0802df14
 801a41c:	0802df2c 	.word	0x0802df2c
 801a420:	0802df48 	.word	0x0802df48
 801a424:	0802df58 	.word	0x0802df58

0801a428 <pbuf_copy_partial>:
 * @param offset offset into the packet buffer from where to begin copying len bytes
 * @return the number of bytes copied, or 0 on failure
 */
u16_t
pbuf_copy_partial(const struct pbuf *buf, void *dataptr, u16_t len, u16_t offset)
{
 801a428:	b580      	push	{r7, lr}
 801a42a:	b088      	sub	sp, #32
 801a42c:	af00      	add	r7, sp, #0
 801a42e:	60f8      	str	r0, [r7, #12]
 801a430:	60b9      	str	r1, [r7, #8]
 801a432:	4611      	mov	r1, r2
 801a434:	461a      	mov	r2, r3
 801a436:	460b      	mov	r3, r1
 801a438:	80fb      	strh	r3, [r7, #6]
 801a43a:	4613      	mov	r3, r2
 801a43c:	80bb      	strh	r3, [r7, #4]
  const struct pbuf *p;
  u16_t left = 0;
 801a43e:	2300      	movs	r3, #0
 801a440:	837b      	strh	r3, [r7, #26]
  u16_t buf_copy_len;
  u16_t copied_total = 0;
 801a442:	2300      	movs	r3, #0
 801a444:	82fb      	strh	r3, [r7, #22]

  LWIP_ERROR("pbuf_copy_partial: invalid buf", (buf != NULL), return 0;);
 801a446:	68fb      	ldr	r3, [r7, #12]
 801a448:	2b00      	cmp	r3, #0
 801a44a:	d108      	bne.n	801a45e <pbuf_copy_partial+0x36>
 801a44c:	4b2b      	ldr	r3, [pc, #172]	@ (801a4fc <pbuf_copy_partial+0xd4>)
 801a44e:	f240 420a 	movw	r2, #1034	@ 0x40a
 801a452:	492b      	ldr	r1, [pc, #172]	@ (801a500 <pbuf_copy_partial+0xd8>)
 801a454:	482b      	ldr	r0, [pc, #172]	@ (801a504 <pbuf_copy_partial+0xdc>)
 801a456:	f00f f859 	bl	802950c <iprintf>
 801a45a:	2300      	movs	r3, #0
 801a45c:	e04a      	b.n	801a4f4 <pbuf_copy_partial+0xcc>
  LWIP_ERROR("pbuf_copy_partial: invalid dataptr", (dataptr != NULL), return 0;);
 801a45e:	68bb      	ldr	r3, [r7, #8]
 801a460:	2b00      	cmp	r3, #0
 801a462:	d108      	bne.n	801a476 <pbuf_copy_partial+0x4e>
 801a464:	4b25      	ldr	r3, [pc, #148]	@ (801a4fc <pbuf_copy_partial+0xd4>)
 801a466:	f240 420b 	movw	r2, #1035	@ 0x40b
 801a46a:	4927      	ldr	r1, [pc, #156]	@ (801a508 <pbuf_copy_partial+0xe0>)
 801a46c:	4825      	ldr	r0, [pc, #148]	@ (801a504 <pbuf_copy_partial+0xdc>)
 801a46e:	f00f f84d 	bl	802950c <iprintf>
 801a472:	2300      	movs	r3, #0
 801a474:	e03e      	b.n	801a4f4 <pbuf_copy_partial+0xcc>

  /* Note some systems use byte copy if dataptr or one of the pbuf payload pointers are unaligned. */
  for (p = buf; len != 0 && p != NULL; p = p->next) {
 801a476:	68fb      	ldr	r3, [r7, #12]
 801a478:	61fb      	str	r3, [r7, #28]
 801a47a:	e034      	b.n	801a4e6 <pbuf_copy_partial+0xbe>
    if ((offset != 0) && (offset >= p->len)) {
 801a47c:	88bb      	ldrh	r3, [r7, #4]
 801a47e:	2b00      	cmp	r3, #0
 801a480:	d00a      	beq.n	801a498 <pbuf_copy_partial+0x70>
 801a482:	69fb      	ldr	r3, [r7, #28]
 801a484:	895b      	ldrh	r3, [r3, #10]
 801a486:	88ba      	ldrh	r2, [r7, #4]
 801a488:	429a      	cmp	r2, r3
 801a48a:	d305      	bcc.n	801a498 <pbuf_copy_partial+0x70>
      /* don't copy from this buffer -> on to the next */
      offset = (u16_t)(offset - p->len);
 801a48c:	69fb      	ldr	r3, [r7, #28]
 801a48e:	895b      	ldrh	r3, [r3, #10]
 801a490:	88ba      	ldrh	r2, [r7, #4]
 801a492:	1ad3      	subs	r3, r2, r3
 801a494:	80bb      	strh	r3, [r7, #4]
 801a496:	e023      	b.n	801a4e0 <pbuf_copy_partial+0xb8>
    } else {
      /* copy from this buffer. maybe only partially. */
      buf_copy_len = (u16_t)(p->len - offset);
 801a498:	69fb      	ldr	r3, [r7, #28]
 801a49a:	895a      	ldrh	r2, [r3, #10]
 801a49c:	88bb      	ldrh	r3, [r7, #4]
 801a49e:	1ad3      	subs	r3, r2, r3
 801a4a0:	833b      	strh	r3, [r7, #24]
      if (buf_copy_len > len) {
 801a4a2:	8b3a      	ldrh	r2, [r7, #24]
 801a4a4:	88fb      	ldrh	r3, [r7, #6]
 801a4a6:	429a      	cmp	r2, r3
 801a4a8:	d901      	bls.n	801a4ae <pbuf_copy_partial+0x86>
        buf_copy_len = len;
 801a4aa:	88fb      	ldrh	r3, [r7, #6]
 801a4ac:	833b      	strh	r3, [r7, #24]
      }
      /* copy the necessary parts of the buffer */
      MEMCPY(&((char *)dataptr)[left], &((char *)p->payload)[offset], buf_copy_len);
 801a4ae:	8b7b      	ldrh	r3, [r7, #26]
 801a4b0:	68ba      	ldr	r2, [r7, #8]
 801a4b2:	18d0      	adds	r0, r2, r3
 801a4b4:	69fb      	ldr	r3, [r7, #28]
 801a4b6:	685a      	ldr	r2, [r3, #4]
 801a4b8:	88bb      	ldrh	r3, [r7, #4]
 801a4ba:	4413      	add	r3, r2
 801a4bc:	8b3a      	ldrh	r2, [r7, #24]
 801a4be:	4619      	mov	r1, r3
 801a4c0:	f00f faad 	bl	8029a1e <memcpy>
      copied_total = (u16_t)(copied_total + buf_copy_len);
 801a4c4:	8afa      	ldrh	r2, [r7, #22]
 801a4c6:	8b3b      	ldrh	r3, [r7, #24]
 801a4c8:	4413      	add	r3, r2
 801a4ca:	82fb      	strh	r3, [r7, #22]
      left = (u16_t)(left + buf_copy_len);
 801a4cc:	8b7a      	ldrh	r2, [r7, #26]
 801a4ce:	8b3b      	ldrh	r3, [r7, #24]
 801a4d0:	4413      	add	r3, r2
 801a4d2:	837b      	strh	r3, [r7, #26]
      len = (u16_t)(len - buf_copy_len);
 801a4d4:	88fa      	ldrh	r2, [r7, #6]
 801a4d6:	8b3b      	ldrh	r3, [r7, #24]
 801a4d8:	1ad3      	subs	r3, r2, r3
 801a4da:	80fb      	strh	r3, [r7, #6]
      offset = 0;
 801a4dc:	2300      	movs	r3, #0
 801a4de:	80bb      	strh	r3, [r7, #4]
  for (p = buf; len != 0 && p != NULL; p = p->next) {
 801a4e0:	69fb      	ldr	r3, [r7, #28]
 801a4e2:	681b      	ldr	r3, [r3, #0]
 801a4e4:	61fb      	str	r3, [r7, #28]
 801a4e6:	88fb      	ldrh	r3, [r7, #6]
 801a4e8:	2b00      	cmp	r3, #0
 801a4ea:	d002      	beq.n	801a4f2 <pbuf_copy_partial+0xca>
 801a4ec:	69fb      	ldr	r3, [r7, #28]
 801a4ee:	2b00      	cmp	r3, #0
 801a4f0:	d1c4      	bne.n	801a47c <pbuf_copy_partial+0x54>
    }
  }
  return copied_total;
 801a4f2:	8afb      	ldrh	r3, [r7, #22]
}
 801a4f4:	4618      	mov	r0, r3
 801a4f6:	3720      	adds	r7, #32
 801a4f8:	46bd      	mov	sp, r7
 801a4fa:	bd80      	pop	{r7, pc}
 801a4fc:	0802dc3c 	.word	0x0802dc3c
 801a500:	0802df84 	.word	0x0802df84
 801a504:	0802dc9c 	.word	0x0802dc9c
 801a508:	0802dfa4 	.word	0x0802dfa4

0801a50c <pbuf_clone>:
 *
 * @return a new pbuf or NULL if allocation fails
 */
struct pbuf *
pbuf_clone(pbuf_layer layer, pbuf_type type, struct pbuf *p)
{
 801a50c:	b580      	push	{r7, lr}
 801a50e:	b084      	sub	sp, #16
 801a510:	af00      	add	r7, sp, #0
 801a512:	4603      	mov	r3, r0
 801a514:	603a      	str	r2, [r7, #0]
 801a516:	71fb      	strb	r3, [r7, #7]
 801a518:	460b      	mov	r3, r1
 801a51a:	80bb      	strh	r3, [r7, #4]
  struct pbuf *q;
  err_t err;
  q = pbuf_alloc(layer, p->tot_len, type);
 801a51c:	683b      	ldr	r3, [r7, #0]
 801a51e:	8919      	ldrh	r1, [r3, #8]
 801a520:	88ba      	ldrh	r2, [r7, #4]
 801a522:	79fb      	ldrb	r3, [r7, #7]
 801a524:	4618      	mov	r0, r3
 801a526:	f7ff fa63 	bl	80199f0 <pbuf_alloc>
 801a52a:	60f8      	str	r0, [r7, #12]
  if (q == NULL) {
 801a52c:	68fb      	ldr	r3, [r7, #12]
 801a52e:	2b00      	cmp	r3, #0
 801a530:	d101      	bne.n	801a536 <pbuf_clone+0x2a>
    return NULL;
 801a532:	2300      	movs	r3, #0
 801a534:	e011      	b.n	801a55a <pbuf_clone+0x4e>
  }
  err = pbuf_copy(q, p);
 801a536:	6839      	ldr	r1, [r7, #0]
 801a538:	68f8      	ldr	r0, [r7, #12]
 801a53a:	f7ff fea3 	bl	801a284 <pbuf_copy>
 801a53e:	4603      	mov	r3, r0
 801a540:	72fb      	strb	r3, [r7, #11]
  LWIP_UNUSED_ARG(err); /* in case of LWIP_NOASSERT */
  LWIP_ASSERT("pbuf_copy failed", err == ERR_OK);
 801a542:	f997 300b 	ldrsb.w	r3, [r7, #11]
 801a546:	2b00      	cmp	r3, #0
 801a548:	d006      	beq.n	801a558 <pbuf_clone+0x4c>
 801a54a:	4b06      	ldr	r3, [pc, #24]	@ (801a564 <pbuf_clone+0x58>)
 801a54c:	f240 5224 	movw	r2, #1316	@ 0x524
 801a550:	4905      	ldr	r1, [pc, #20]	@ (801a568 <pbuf_clone+0x5c>)
 801a552:	4806      	ldr	r0, [pc, #24]	@ (801a56c <pbuf_clone+0x60>)
 801a554:	f00e ffda 	bl	802950c <iprintf>
  return q;
 801a558:	68fb      	ldr	r3, [r7, #12]
}
 801a55a:	4618      	mov	r0, r3
 801a55c:	3710      	adds	r7, #16
 801a55e:	46bd      	mov	sp, r7
 801a560:	bd80      	pop	{r7, pc}
 801a562:	bf00      	nop
 801a564:	0802dc3c 	.word	0x0802dc3c
 801a568:	0802e0b0 	.word	0x0802e0b0
 801a56c:	0802dc9c 	.word	0x0802dc9c

0801a570 <tcp_init>:
/**
 * Initialize this module.
 */
void
tcp_init(void)
{
 801a570:	b580      	push	{r7, lr}
 801a572:	af00      	add	r7, sp, #0
#ifdef LWIP_RAND
  tcp_port = TCP_ENSURE_LOCAL_PORT_RANGE(LWIP_RAND());
 801a574:	f00d fca0 	bl	8027eb8 <rand>
 801a578:	4603      	mov	r3, r0
 801a57a:	b29b      	uxth	r3, r3
 801a57c:	f3c3 030d 	ubfx	r3, r3, #0, #14
 801a580:	b29b      	uxth	r3, r3
 801a582:	f5a3 4380 	sub.w	r3, r3, #16384	@ 0x4000
 801a586:	b29a      	uxth	r2, r3
 801a588:	4b01      	ldr	r3, [pc, #4]	@ (801a590 <tcp_init+0x20>)
 801a58a:	801a      	strh	r2, [r3, #0]
#endif /* LWIP_RAND */
}
 801a58c:	bf00      	nop
 801a58e:	bd80      	pop	{r7, pc}
 801a590:	24000038 	.word	0x24000038

0801a594 <tcp_free>:

/** Free a tcp pcb */
void
tcp_free(struct tcp_pcb *pcb)
{
 801a594:	b580      	push	{r7, lr}
 801a596:	b082      	sub	sp, #8
 801a598:	af00      	add	r7, sp, #0
 801a59a:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT("tcp_free: LISTEN", pcb->state != LISTEN);
 801a59c:	687b      	ldr	r3, [r7, #4]
 801a59e:	7d1b      	ldrb	r3, [r3, #20]
 801a5a0:	2b01      	cmp	r3, #1
 801a5a2:	d105      	bne.n	801a5b0 <tcp_free+0x1c>
 801a5a4:	4b06      	ldr	r3, [pc, #24]	@ (801a5c0 <tcp_free+0x2c>)
 801a5a6:	22d4      	movs	r2, #212	@ 0xd4
 801a5a8:	4906      	ldr	r1, [pc, #24]	@ (801a5c4 <tcp_free+0x30>)
 801a5aa:	4807      	ldr	r0, [pc, #28]	@ (801a5c8 <tcp_free+0x34>)
 801a5ac:	f00e ffae 	bl	802950c <iprintf>
#if LWIP_TCP_PCB_NUM_EXT_ARGS
  tcp_ext_arg_invoke_callbacks_destroyed(pcb->ext_args);
#endif
  memp_free(MEMP_TCP_PCB, pcb);
 801a5b0:	6879      	ldr	r1, [r7, #4]
 801a5b2:	2001      	movs	r0, #1
 801a5b4:	f7fe fe44 	bl	8019240 <memp_free>
}
 801a5b8:	bf00      	nop
 801a5ba:	3708      	adds	r7, #8
 801a5bc:	46bd      	mov	sp, r7
 801a5be:	bd80      	pop	{r7, pc}
 801a5c0:	0802e13c 	.word	0x0802e13c
 801a5c4:	0802e16c 	.word	0x0802e16c
 801a5c8:	0802e180 	.word	0x0802e180

0801a5cc <tcp_free_listen>:

/** Free a tcp listen pcb */
static void
tcp_free_listen(struct tcp_pcb *pcb)
{
 801a5cc:	b580      	push	{r7, lr}
 801a5ce:	b082      	sub	sp, #8
 801a5d0:	af00      	add	r7, sp, #0
 801a5d2:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT("tcp_free_listen: !LISTEN", pcb->state != LISTEN);
 801a5d4:	687b      	ldr	r3, [r7, #4]
 801a5d6:	7d1b      	ldrb	r3, [r3, #20]
 801a5d8:	2b01      	cmp	r3, #1
 801a5da:	d105      	bne.n	801a5e8 <tcp_free_listen+0x1c>
 801a5dc:	4b06      	ldr	r3, [pc, #24]	@ (801a5f8 <tcp_free_listen+0x2c>)
 801a5de:	22df      	movs	r2, #223	@ 0xdf
 801a5e0:	4906      	ldr	r1, [pc, #24]	@ (801a5fc <tcp_free_listen+0x30>)
 801a5e2:	4807      	ldr	r0, [pc, #28]	@ (801a600 <tcp_free_listen+0x34>)
 801a5e4:	f00e ff92 	bl	802950c <iprintf>
#if LWIP_TCP_PCB_NUM_EXT_ARGS
  tcp_ext_arg_invoke_callbacks_destroyed(pcb->ext_args);
#endif
  memp_free(MEMP_TCP_PCB_LISTEN, pcb);
 801a5e8:	6879      	ldr	r1, [r7, #4]
 801a5ea:	2002      	movs	r0, #2
 801a5ec:	f7fe fe28 	bl	8019240 <memp_free>
}
 801a5f0:	bf00      	nop
 801a5f2:	3708      	adds	r7, #8
 801a5f4:	46bd      	mov	sp, r7
 801a5f6:	bd80      	pop	{r7, pc}
 801a5f8:	0802e13c 	.word	0x0802e13c
 801a5fc:	0802e1a8 	.word	0x0802e1a8
 801a600:	0802e180 	.word	0x0802e180

0801a604 <tcp_tmr>:
/**
 * Called periodically to dispatch TCP timers.
 */
void
tcp_tmr(void)
{
 801a604:	b580      	push	{r7, lr}
 801a606:	af00      	add	r7, sp, #0
  /* Call tcp_fasttmr() every 250 ms */
  tcp_fasttmr();
 801a608:	f001 f86a 	bl	801b6e0 <tcp_fasttmr>

  if (++tcp_timer & 1) {
 801a60c:	4b07      	ldr	r3, [pc, #28]	@ (801a62c <tcp_tmr+0x28>)
 801a60e:	781b      	ldrb	r3, [r3, #0]
 801a610:	3301      	adds	r3, #1
 801a612:	b2da      	uxtb	r2, r3
 801a614:	4b05      	ldr	r3, [pc, #20]	@ (801a62c <tcp_tmr+0x28>)
 801a616:	701a      	strb	r2, [r3, #0]
 801a618:	4b04      	ldr	r3, [pc, #16]	@ (801a62c <tcp_tmr+0x28>)
 801a61a:	781b      	ldrb	r3, [r3, #0]
 801a61c:	f003 0301 	and.w	r3, r3, #1
 801a620:	2b00      	cmp	r3, #0
 801a622:	d001      	beq.n	801a628 <tcp_tmr+0x24>
    /* Call tcp_slowtmr() every 500 ms, i.e., every other timer
       tcp_tmr() is called. */
    tcp_slowtmr();
 801a624:	f000 fd1a 	bl	801b05c <tcp_slowtmr>
  }
}
 801a628:	bf00      	nop
 801a62a:	bd80      	pop	{r7, pc}
 801a62c:	2402a001 	.word	0x2402a001

0801a630 <tcp_remove_listener>:
/** Called when a listen pcb is closed. Iterates one pcb list and removes the
 * closed listener pcb from pcb->listener if matching.
 */
static void
tcp_remove_listener(struct tcp_pcb *list, struct tcp_pcb_listen *lpcb)
{
 801a630:	b580      	push	{r7, lr}
 801a632:	b084      	sub	sp, #16
 801a634:	af00      	add	r7, sp, #0
 801a636:	6078      	str	r0, [r7, #4]
 801a638:	6039      	str	r1, [r7, #0]
  struct tcp_pcb *pcb;

  LWIP_ASSERT("tcp_remove_listener: invalid listener", lpcb != NULL);
 801a63a:	683b      	ldr	r3, [r7, #0]
 801a63c:	2b00      	cmp	r3, #0
 801a63e:	d105      	bne.n	801a64c <tcp_remove_listener+0x1c>
 801a640:	4b0d      	ldr	r3, [pc, #52]	@ (801a678 <tcp_remove_listener+0x48>)
 801a642:	22ff      	movs	r2, #255	@ 0xff
 801a644:	490d      	ldr	r1, [pc, #52]	@ (801a67c <tcp_remove_listener+0x4c>)
 801a646:	480e      	ldr	r0, [pc, #56]	@ (801a680 <tcp_remove_listener+0x50>)
 801a648:	f00e ff60 	bl	802950c <iprintf>

  for (pcb = list; pcb != NULL; pcb = pcb->next) {
 801a64c:	687b      	ldr	r3, [r7, #4]
 801a64e:	60fb      	str	r3, [r7, #12]
 801a650:	e00a      	b.n	801a668 <tcp_remove_listener+0x38>
    if (pcb->listener == lpcb) {
 801a652:	68fb      	ldr	r3, [r7, #12]
 801a654:	6fdb      	ldr	r3, [r3, #124]	@ 0x7c
 801a656:	683a      	ldr	r2, [r7, #0]
 801a658:	429a      	cmp	r2, r3
 801a65a:	d102      	bne.n	801a662 <tcp_remove_listener+0x32>
      pcb->listener = NULL;
 801a65c:	68fb      	ldr	r3, [r7, #12]
 801a65e:	2200      	movs	r2, #0
 801a660:	67da      	str	r2, [r3, #124]	@ 0x7c
  for (pcb = list; pcb != NULL; pcb = pcb->next) {
 801a662:	68fb      	ldr	r3, [r7, #12]
 801a664:	68db      	ldr	r3, [r3, #12]
 801a666:	60fb      	str	r3, [r7, #12]
 801a668:	68fb      	ldr	r3, [r7, #12]
 801a66a:	2b00      	cmp	r3, #0
 801a66c:	d1f1      	bne.n	801a652 <tcp_remove_listener+0x22>
    }
  }
}
 801a66e:	bf00      	nop
 801a670:	bf00      	nop
 801a672:	3710      	adds	r7, #16
 801a674:	46bd      	mov	sp, r7
 801a676:	bd80      	pop	{r7, pc}
 801a678:	0802e13c 	.word	0x0802e13c
 801a67c:	0802e1c4 	.word	0x0802e1c4
 801a680:	0802e180 	.word	0x0802e180

0801a684 <tcp_listen_closed>:
/** Called when a listen pcb is closed. Iterates all pcb lists and removes the
 * closed listener pcb from pcb->listener if matching.
 */
static void
tcp_listen_closed(struct tcp_pcb *pcb)
{
 801a684:	b580      	push	{r7, lr}
 801a686:	b084      	sub	sp, #16
 801a688:	af00      	add	r7, sp, #0
 801a68a:	6078      	str	r0, [r7, #4]
#if LWIP_CALLBACK_API || TCP_LISTEN_BACKLOG
  size_t i;
  LWIP_ASSERT("pcb != NULL", pcb != NULL);
 801a68c:	687b      	ldr	r3, [r7, #4]
 801a68e:	2b00      	cmp	r3, #0
 801a690:	d106      	bne.n	801a6a0 <tcp_listen_closed+0x1c>
 801a692:	4b14      	ldr	r3, [pc, #80]	@ (801a6e4 <tcp_listen_closed+0x60>)
 801a694:	f240 1211 	movw	r2, #273	@ 0x111
 801a698:	4913      	ldr	r1, [pc, #76]	@ (801a6e8 <tcp_listen_closed+0x64>)
 801a69a:	4814      	ldr	r0, [pc, #80]	@ (801a6ec <tcp_listen_closed+0x68>)
 801a69c:	f00e ff36 	bl	802950c <iprintf>
  LWIP_ASSERT("pcb->state == LISTEN", pcb->state == LISTEN);
 801a6a0:	687b      	ldr	r3, [r7, #4]
 801a6a2:	7d1b      	ldrb	r3, [r3, #20]
 801a6a4:	2b01      	cmp	r3, #1
 801a6a6:	d006      	beq.n	801a6b6 <tcp_listen_closed+0x32>
 801a6a8:	4b0e      	ldr	r3, [pc, #56]	@ (801a6e4 <tcp_listen_closed+0x60>)
 801a6aa:	f44f 7289 	mov.w	r2, #274	@ 0x112
 801a6ae:	4910      	ldr	r1, [pc, #64]	@ (801a6f0 <tcp_listen_closed+0x6c>)
 801a6b0:	480e      	ldr	r0, [pc, #56]	@ (801a6ec <tcp_listen_closed+0x68>)
 801a6b2:	f00e ff2b 	bl	802950c <iprintf>
  for (i = 1; i < LWIP_ARRAYSIZE(tcp_pcb_lists); i++) {
 801a6b6:	2301      	movs	r3, #1
 801a6b8:	60fb      	str	r3, [r7, #12]
 801a6ba:	e00b      	b.n	801a6d4 <tcp_listen_closed+0x50>
    tcp_remove_listener(*tcp_pcb_lists[i], (struct tcp_pcb_listen *)pcb);
 801a6bc:	4a0d      	ldr	r2, [pc, #52]	@ (801a6f4 <tcp_listen_closed+0x70>)
 801a6be:	68fb      	ldr	r3, [r7, #12]
 801a6c0:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
 801a6c4:	681b      	ldr	r3, [r3, #0]
 801a6c6:	6879      	ldr	r1, [r7, #4]
 801a6c8:	4618      	mov	r0, r3
 801a6ca:	f7ff ffb1 	bl	801a630 <tcp_remove_listener>
  for (i = 1; i < LWIP_ARRAYSIZE(tcp_pcb_lists); i++) {
 801a6ce:	68fb      	ldr	r3, [r7, #12]
 801a6d0:	3301      	adds	r3, #1
 801a6d2:	60fb      	str	r3, [r7, #12]
 801a6d4:	68fb      	ldr	r3, [r7, #12]
 801a6d6:	2b03      	cmp	r3, #3
 801a6d8:	d9f0      	bls.n	801a6bc <tcp_listen_closed+0x38>
  }
#endif
  LWIP_UNUSED_ARG(pcb);
}
 801a6da:	bf00      	nop
 801a6dc:	bf00      	nop
 801a6de:	3710      	adds	r7, #16
 801a6e0:	46bd      	mov	sp, r7
 801a6e2:	bd80      	pop	{r7, pc}
 801a6e4:	0802e13c 	.word	0x0802e13c
 801a6e8:	0802e1ec 	.word	0x0802e1ec
 801a6ec:	0802e180 	.word	0x0802e180
 801a6f0:	0802e1f8 	.word	0x0802e1f8
 801a6f4:	0803076c 	.word	0x0803076c

0801a6f8 <tcp_close_shutdown>:
 * @return ERR_OK if connection has been closed
 *         another err_t if closing failed and pcb is not freed
 */
static err_t
tcp_close_shutdown(struct tcp_pcb *pcb, u8_t rst_on_unacked_data)
{
 801a6f8:	b5b0      	push	{r4, r5, r7, lr}
 801a6fa:	b088      	sub	sp, #32
 801a6fc:	af04      	add	r7, sp, #16
 801a6fe:	6078      	str	r0, [r7, #4]
 801a700:	460b      	mov	r3, r1
 801a702:	70fb      	strb	r3, [r7, #3]
  LWIP_ASSERT("tcp_close_shutdown: invalid pcb", pcb != NULL);
 801a704:	687b      	ldr	r3, [r7, #4]
 801a706:	2b00      	cmp	r3, #0
 801a708:	d106      	bne.n	801a718 <tcp_close_shutdown+0x20>
 801a70a:	4b63      	ldr	r3, [pc, #396]	@ (801a898 <tcp_close_shutdown+0x1a0>)
 801a70c:	f44f 72af 	mov.w	r2, #350	@ 0x15e
 801a710:	4962      	ldr	r1, [pc, #392]	@ (801a89c <tcp_close_shutdown+0x1a4>)
 801a712:	4863      	ldr	r0, [pc, #396]	@ (801a8a0 <tcp_close_shutdown+0x1a8>)
 801a714:	f00e fefa 	bl	802950c <iprintf>

  if (rst_on_unacked_data && ((pcb->state == ESTABLISHED) || (pcb->state == CLOSE_WAIT))) {
 801a718:	78fb      	ldrb	r3, [r7, #3]
 801a71a:	2b00      	cmp	r3, #0
 801a71c:	d067      	beq.n	801a7ee <tcp_close_shutdown+0xf6>
 801a71e:	687b      	ldr	r3, [r7, #4]
 801a720:	7d1b      	ldrb	r3, [r3, #20]
 801a722:	2b04      	cmp	r3, #4
 801a724:	d003      	beq.n	801a72e <tcp_close_shutdown+0x36>
 801a726:	687b      	ldr	r3, [r7, #4]
 801a728:	7d1b      	ldrb	r3, [r3, #20]
 801a72a:	2b07      	cmp	r3, #7
 801a72c:	d15f      	bne.n	801a7ee <tcp_close_shutdown+0xf6>
    if ((pcb->refused_data != NULL) || (pcb->rcv_wnd != TCP_WND_MAX(pcb))) {
 801a72e:	687b      	ldr	r3, [r7, #4]
 801a730:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 801a732:	2b00      	cmp	r3, #0
 801a734:	d105      	bne.n	801a742 <tcp_close_shutdown+0x4a>
 801a736:	687b      	ldr	r3, [r7, #4]
 801a738:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 801a73a:	f241 62d0 	movw	r2, #5840	@ 0x16d0
 801a73e:	4293      	cmp	r3, r2
 801a740:	d055      	beq.n	801a7ee <tcp_close_shutdown+0xf6>
      /* Not all data received by application, send RST to tell the remote
         side about this. */
      LWIP_ASSERT("pcb->flags & TF_RXCLOSED", pcb->flags & TF_RXCLOSED);
 801a742:	687b      	ldr	r3, [r7, #4]
 801a744:	8b5b      	ldrh	r3, [r3, #26]
 801a746:	f003 0310 	and.w	r3, r3, #16
 801a74a:	2b00      	cmp	r3, #0
 801a74c:	d106      	bne.n	801a75c <tcp_close_shutdown+0x64>
 801a74e:	4b52      	ldr	r3, [pc, #328]	@ (801a898 <tcp_close_shutdown+0x1a0>)
 801a750:	f44f 72b2 	mov.w	r2, #356	@ 0x164
 801a754:	4953      	ldr	r1, [pc, #332]	@ (801a8a4 <tcp_close_shutdown+0x1ac>)
 801a756:	4852      	ldr	r0, [pc, #328]	@ (801a8a0 <tcp_close_shutdown+0x1a8>)
 801a758:	f00e fed8 	bl	802950c <iprintf>

      /* don't call tcp_abort here: we must not deallocate the pcb since
         that might not be expected when calling tcp_close */
      tcp_rst(pcb, pcb->snd_nxt, pcb->rcv_nxt, &pcb->local_ip, &pcb->remote_ip,
 801a75c:	687b      	ldr	r3, [r7, #4]
 801a75e:	6d18      	ldr	r0, [r3, #80]	@ 0x50
 801a760:	687b      	ldr	r3, [r7, #4]
 801a762:	6a5c      	ldr	r4, [r3, #36]	@ 0x24
 801a764:	687d      	ldr	r5, [r7, #4]
 801a766:	687b      	ldr	r3, [r7, #4]
 801a768:	3304      	adds	r3, #4
 801a76a:	687a      	ldr	r2, [r7, #4]
 801a76c:	8ad2      	ldrh	r2, [r2, #22]
 801a76e:	6879      	ldr	r1, [r7, #4]
 801a770:	8b09      	ldrh	r1, [r1, #24]
 801a772:	9102      	str	r1, [sp, #8]
 801a774:	9201      	str	r2, [sp, #4]
 801a776:	9300      	str	r3, [sp, #0]
 801a778:	462b      	mov	r3, r5
 801a77a:	4622      	mov	r2, r4
 801a77c:	4601      	mov	r1, r0
 801a77e:	6878      	ldr	r0, [r7, #4]
 801a780:	f005 fdfa 	bl	8020378 <tcp_rst>
              pcb->local_port, pcb->remote_port);

      tcp_pcb_purge(pcb);
 801a784:	6878      	ldr	r0, [r7, #4]
 801a786:	f001 fb67 	bl	801be58 <tcp_pcb_purge>
      TCP_RMV_ACTIVE(pcb);
 801a78a:	4b47      	ldr	r3, [pc, #284]	@ (801a8a8 <tcp_close_shutdown+0x1b0>)
 801a78c:	681b      	ldr	r3, [r3, #0]
 801a78e:	687a      	ldr	r2, [r7, #4]
 801a790:	429a      	cmp	r2, r3
 801a792:	d105      	bne.n	801a7a0 <tcp_close_shutdown+0xa8>
 801a794:	4b44      	ldr	r3, [pc, #272]	@ (801a8a8 <tcp_close_shutdown+0x1b0>)
 801a796:	681b      	ldr	r3, [r3, #0]
 801a798:	68db      	ldr	r3, [r3, #12]
 801a79a:	4a43      	ldr	r2, [pc, #268]	@ (801a8a8 <tcp_close_shutdown+0x1b0>)
 801a79c:	6013      	str	r3, [r2, #0]
 801a79e:	e013      	b.n	801a7c8 <tcp_close_shutdown+0xd0>
 801a7a0:	4b41      	ldr	r3, [pc, #260]	@ (801a8a8 <tcp_close_shutdown+0x1b0>)
 801a7a2:	681b      	ldr	r3, [r3, #0]
 801a7a4:	60fb      	str	r3, [r7, #12]
 801a7a6:	e00c      	b.n	801a7c2 <tcp_close_shutdown+0xca>
 801a7a8:	68fb      	ldr	r3, [r7, #12]
 801a7aa:	68db      	ldr	r3, [r3, #12]
 801a7ac:	687a      	ldr	r2, [r7, #4]
 801a7ae:	429a      	cmp	r2, r3
 801a7b0:	d104      	bne.n	801a7bc <tcp_close_shutdown+0xc4>
 801a7b2:	687b      	ldr	r3, [r7, #4]
 801a7b4:	68da      	ldr	r2, [r3, #12]
 801a7b6:	68fb      	ldr	r3, [r7, #12]
 801a7b8:	60da      	str	r2, [r3, #12]
 801a7ba:	e005      	b.n	801a7c8 <tcp_close_shutdown+0xd0>
 801a7bc:	68fb      	ldr	r3, [r7, #12]
 801a7be:	68db      	ldr	r3, [r3, #12]
 801a7c0:	60fb      	str	r3, [r7, #12]
 801a7c2:	68fb      	ldr	r3, [r7, #12]
 801a7c4:	2b00      	cmp	r3, #0
 801a7c6:	d1ef      	bne.n	801a7a8 <tcp_close_shutdown+0xb0>
 801a7c8:	687b      	ldr	r3, [r7, #4]
 801a7ca:	2200      	movs	r2, #0
 801a7cc:	60da      	str	r2, [r3, #12]
 801a7ce:	4b37      	ldr	r3, [pc, #220]	@ (801a8ac <tcp_close_shutdown+0x1b4>)
 801a7d0:	2201      	movs	r2, #1
 801a7d2:	701a      	strb	r2, [r3, #0]
      /* Deallocate the pcb since we already sent a RST for it */
      if (tcp_input_pcb == pcb) {
 801a7d4:	4b36      	ldr	r3, [pc, #216]	@ (801a8b0 <tcp_close_shutdown+0x1b8>)
 801a7d6:	681b      	ldr	r3, [r3, #0]
 801a7d8:	687a      	ldr	r2, [r7, #4]
 801a7da:	429a      	cmp	r2, r3
 801a7dc:	d102      	bne.n	801a7e4 <tcp_close_shutdown+0xec>
        /* prevent using a deallocated pcb: free it from tcp_input later */
        tcp_trigger_input_pcb_close();
 801a7de:	f003 ffff 	bl	801e7e0 <tcp_trigger_input_pcb_close>
 801a7e2:	e002      	b.n	801a7ea <tcp_close_shutdown+0xf2>
      } else {
        tcp_free(pcb);
 801a7e4:	6878      	ldr	r0, [r7, #4]
 801a7e6:	f7ff fed5 	bl	801a594 <tcp_free>
      }
      return ERR_OK;
 801a7ea:	2300      	movs	r3, #0
 801a7ec:	e050      	b.n	801a890 <tcp_close_shutdown+0x198>
    }
  }

  /* - states which free the pcb are handled here,
     - states which send FIN and change state are handled in tcp_close_shutdown_fin() */
  switch (pcb->state) {
 801a7ee:	687b      	ldr	r3, [r7, #4]
 801a7f0:	7d1b      	ldrb	r3, [r3, #20]
 801a7f2:	2b02      	cmp	r3, #2
 801a7f4:	d03b      	beq.n	801a86e <tcp_close_shutdown+0x176>
 801a7f6:	2b02      	cmp	r3, #2
 801a7f8:	dc44      	bgt.n	801a884 <tcp_close_shutdown+0x18c>
 801a7fa:	2b00      	cmp	r3, #0
 801a7fc:	d002      	beq.n	801a804 <tcp_close_shutdown+0x10c>
 801a7fe:	2b01      	cmp	r3, #1
 801a800:	d02a      	beq.n	801a858 <tcp_close_shutdown+0x160>
 801a802:	e03f      	b.n	801a884 <tcp_close_shutdown+0x18c>
       * and the user needs some way to free it should the need arise.
       * Calling tcp_close() with a pcb that has already been closed, (i.e. twice)
       * or for a pcb that has been used and then entered the CLOSED state
       * is erroneous, but this should never happen as the pcb has in those cases
       * been freed, and so any remaining handles are bogus. */
      if (pcb->local_port != 0) {
 801a804:	687b      	ldr	r3, [r7, #4]
 801a806:	8adb      	ldrh	r3, [r3, #22]
 801a808:	2b00      	cmp	r3, #0
 801a80a:	d021      	beq.n	801a850 <tcp_close_shutdown+0x158>
        TCP_RMV(&tcp_bound_pcbs, pcb);
 801a80c:	4b29      	ldr	r3, [pc, #164]	@ (801a8b4 <tcp_close_shutdown+0x1bc>)
 801a80e:	681b      	ldr	r3, [r3, #0]
 801a810:	687a      	ldr	r2, [r7, #4]
 801a812:	429a      	cmp	r2, r3
 801a814:	d105      	bne.n	801a822 <tcp_close_shutdown+0x12a>
 801a816:	4b27      	ldr	r3, [pc, #156]	@ (801a8b4 <tcp_close_shutdown+0x1bc>)
 801a818:	681b      	ldr	r3, [r3, #0]
 801a81a:	68db      	ldr	r3, [r3, #12]
 801a81c:	4a25      	ldr	r2, [pc, #148]	@ (801a8b4 <tcp_close_shutdown+0x1bc>)
 801a81e:	6013      	str	r3, [r2, #0]
 801a820:	e013      	b.n	801a84a <tcp_close_shutdown+0x152>
 801a822:	4b24      	ldr	r3, [pc, #144]	@ (801a8b4 <tcp_close_shutdown+0x1bc>)
 801a824:	681b      	ldr	r3, [r3, #0]
 801a826:	60bb      	str	r3, [r7, #8]
 801a828:	e00c      	b.n	801a844 <tcp_close_shutdown+0x14c>
 801a82a:	68bb      	ldr	r3, [r7, #8]
 801a82c:	68db      	ldr	r3, [r3, #12]
 801a82e:	687a      	ldr	r2, [r7, #4]
 801a830:	429a      	cmp	r2, r3
 801a832:	d104      	bne.n	801a83e <tcp_close_shutdown+0x146>
 801a834:	687b      	ldr	r3, [r7, #4]
 801a836:	68da      	ldr	r2, [r3, #12]
 801a838:	68bb      	ldr	r3, [r7, #8]
 801a83a:	60da      	str	r2, [r3, #12]
 801a83c:	e005      	b.n	801a84a <tcp_close_shutdown+0x152>
 801a83e:	68bb      	ldr	r3, [r7, #8]
 801a840:	68db      	ldr	r3, [r3, #12]
 801a842:	60bb      	str	r3, [r7, #8]
 801a844:	68bb      	ldr	r3, [r7, #8]
 801a846:	2b00      	cmp	r3, #0
 801a848:	d1ef      	bne.n	801a82a <tcp_close_shutdown+0x132>
 801a84a:	687b      	ldr	r3, [r7, #4]
 801a84c:	2200      	movs	r2, #0
 801a84e:	60da      	str	r2, [r3, #12]
      }
      tcp_free(pcb);
 801a850:	6878      	ldr	r0, [r7, #4]
 801a852:	f7ff fe9f 	bl	801a594 <tcp_free>
      break;
 801a856:	e01a      	b.n	801a88e <tcp_close_shutdown+0x196>
    case LISTEN:
      tcp_listen_closed(pcb);
 801a858:	6878      	ldr	r0, [r7, #4]
 801a85a:	f7ff ff13 	bl	801a684 <tcp_listen_closed>
      tcp_pcb_remove(&tcp_listen_pcbs.pcbs, pcb);
 801a85e:	6879      	ldr	r1, [r7, #4]
 801a860:	4815      	ldr	r0, [pc, #84]	@ (801a8b8 <tcp_close_shutdown+0x1c0>)
 801a862:	f001 fb49 	bl	801bef8 <tcp_pcb_remove>
      tcp_free_listen(pcb);
 801a866:	6878      	ldr	r0, [r7, #4]
 801a868:	f7ff feb0 	bl	801a5cc <tcp_free_listen>
      break;
 801a86c:	e00f      	b.n	801a88e <tcp_close_shutdown+0x196>
    case SYN_SENT:
      TCP_PCB_REMOVE_ACTIVE(pcb);
 801a86e:	6879      	ldr	r1, [r7, #4]
 801a870:	480d      	ldr	r0, [pc, #52]	@ (801a8a8 <tcp_close_shutdown+0x1b0>)
 801a872:	f001 fb41 	bl	801bef8 <tcp_pcb_remove>
 801a876:	4b0d      	ldr	r3, [pc, #52]	@ (801a8ac <tcp_close_shutdown+0x1b4>)
 801a878:	2201      	movs	r2, #1
 801a87a:	701a      	strb	r2, [r3, #0]
      tcp_free(pcb);
 801a87c:	6878      	ldr	r0, [r7, #4]
 801a87e:	f7ff fe89 	bl	801a594 <tcp_free>
      MIB2_STATS_INC(mib2.tcpattemptfails);
      break;
 801a882:	e004      	b.n	801a88e <tcp_close_shutdown+0x196>
    default:
      return tcp_close_shutdown_fin(pcb);
 801a884:	6878      	ldr	r0, [r7, #4]
 801a886:	f000 f819 	bl	801a8bc <tcp_close_shutdown_fin>
 801a88a:	4603      	mov	r3, r0
 801a88c:	e000      	b.n	801a890 <tcp_close_shutdown+0x198>
  }
  return ERR_OK;
 801a88e:	2300      	movs	r3, #0
}
 801a890:	4618      	mov	r0, r3
 801a892:	3710      	adds	r7, #16
 801a894:	46bd      	mov	sp, r7
 801a896:	bdb0      	pop	{r4, r5, r7, pc}
 801a898:	0802e13c 	.word	0x0802e13c
 801a89c:	0802e210 	.word	0x0802e210
 801a8a0:	0802e180 	.word	0x0802e180
 801a8a4:	0802e230 	.word	0x0802e230
 801a8a8:	24029ff8 	.word	0x24029ff8
 801a8ac:	2402a000 	.word	0x2402a000
 801a8b0:	2402a03c 	.word	0x2402a03c
 801a8b4:	24029ff0 	.word	0x24029ff0
 801a8b8:	24029ff4 	.word	0x24029ff4

0801a8bc <tcp_close_shutdown_fin>:

static err_t
tcp_close_shutdown_fin(struct tcp_pcb *pcb)
{
 801a8bc:	b580      	push	{r7, lr}
 801a8be:	b084      	sub	sp, #16
 801a8c0:	af00      	add	r7, sp, #0
 801a8c2:	6078      	str	r0, [r7, #4]
  err_t err;
  LWIP_ASSERT("pcb != NULL", pcb != NULL);
 801a8c4:	687b      	ldr	r3, [r7, #4]
 801a8c6:	2b00      	cmp	r3, #0
 801a8c8:	d106      	bne.n	801a8d8 <tcp_close_shutdown_fin+0x1c>
 801a8ca:	4b2e      	ldr	r3, [pc, #184]	@ (801a984 <tcp_close_shutdown_fin+0xc8>)
 801a8cc:	f44f 72ce 	mov.w	r2, #412	@ 0x19c
 801a8d0:	492d      	ldr	r1, [pc, #180]	@ (801a988 <tcp_close_shutdown_fin+0xcc>)
 801a8d2:	482e      	ldr	r0, [pc, #184]	@ (801a98c <tcp_close_shutdown_fin+0xd0>)
 801a8d4:	f00e fe1a 	bl	802950c <iprintf>

  switch (pcb->state) {
 801a8d8:	687b      	ldr	r3, [r7, #4]
 801a8da:	7d1b      	ldrb	r3, [r3, #20]
 801a8dc:	2b07      	cmp	r3, #7
 801a8de:	d020      	beq.n	801a922 <tcp_close_shutdown_fin+0x66>
 801a8e0:	2b07      	cmp	r3, #7
 801a8e2:	dc2b      	bgt.n	801a93c <tcp_close_shutdown_fin+0x80>
 801a8e4:	2b03      	cmp	r3, #3
 801a8e6:	d002      	beq.n	801a8ee <tcp_close_shutdown_fin+0x32>
 801a8e8:	2b04      	cmp	r3, #4
 801a8ea:	d00d      	beq.n	801a908 <tcp_close_shutdown_fin+0x4c>
 801a8ec:	e026      	b.n	801a93c <tcp_close_shutdown_fin+0x80>
    case SYN_RCVD:
      err = tcp_send_fin(pcb);
 801a8ee:	6878      	ldr	r0, [r7, #4]
 801a8f0:	f004 fe42 	bl	801f578 <tcp_send_fin>
 801a8f4:	4603      	mov	r3, r0
 801a8f6:	73fb      	strb	r3, [r7, #15]
      if (err == ERR_OK) {
 801a8f8:	f997 300f 	ldrsb.w	r3, [r7, #15]
 801a8fc:	2b00      	cmp	r3, #0
 801a8fe:	d11f      	bne.n	801a940 <tcp_close_shutdown_fin+0x84>
        tcp_backlog_accepted(pcb);
        MIB2_STATS_INC(mib2.tcpattemptfails);
        pcb->state = FIN_WAIT_1;
 801a900:	687b      	ldr	r3, [r7, #4]
 801a902:	2205      	movs	r2, #5
 801a904:	751a      	strb	r2, [r3, #20]
      }
      break;
 801a906:	e01b      	b.n	801a940 <tcp_close_shutdown_fin+0x84>
    case ESTABLISHED:
      err = tcp_send_fin(pcb);
 801a908:	6878      	ldr	r0, [r7, #4]
 801a90a:	f004 fe35 	bl	801f578 <tcp_send_fin>
 801a90e:	4603      	mov	r3, r0
 801a910:	73fb      	strb	r3, [r7, #15]
      if (err == ERR_OK) {
 801a912:	f997 300f 	ldrsb.w	r3, [r7, #15]
 801a916:	2b00      	cmp	r3, #0
 801a918:	d114      	bne.n	801a944 <tcp_close_shutdown_fin+0x88>
        MIB2_STATS_INC(mib2.tcpestabresets);
        pcb->state = FIN_WAIT_1;
 801a91a:	687b      	ldr	r3, [r7, #4]
 801a91c:	2205      	movs	r2, #5
 801a91e:	751a      	strb	r2, [r3, #20]
      }
      break;
 801a920:	e010      	b.n	801a944 <tcp_close_shutdown_fin+0x88>
    case CLOSE_WAIT:
      err = tcp_send_fin(pcb);
 801a922:	6878      	ldr	r0, [r7, #4]
 801a924:	f004 fe28 	bl	801f578 <tcp_send_fin>
 801a928:	4603      	mov	r3, r0
 801a92a:	73fb      	strb	r3, [r7, #15]
      if (err == ERR_OK) {
 801a92c:	f997 300f 	ldrsb.w	r3, [r7, #15]
 801a930:	2b00      	cmp	r3, #0
 801a932:	d109      	bne.n	801a948 <tcp_close_shutdown_fin+0x8c>
        MIB2_STATS_INC(mib2.tcpestabresets);
        pcb->state = LAST_ACK;
 801a934:	687b      	ldr	r3, [r7, #4]
 801a936:	2209      	movs	r2, #9
 801a938:	751a      	strb	r2, [r3, #20]
      }
      break;
 801a93a:	e005      	b.n	801a948 <tcp_close_shutdown_fin+0x8c>
    default:
      /* Has already been closed, do nothing. */
      return ERR_OK;
 801a93c:	2300      	movs	r3, #0
 801a93e:	e01c      	b.n	801a97a <tcp_close_shutdown_fin+0xbe>
      break;
 801a940:	bf00      	nop
 801a942:	e002      	b.n	801a94a <tcp_close_shutdown_fin+0x8e>
      break;
 801a944:	bf00      	nop
 801a946:	e000      	b.n	801a94a <tcp_close_shutdown_fin+0x8e>
      break;
 801a948:	bf00      	nop
  }

  if (err == ERR_OK) {
 801a94a:	f997 300f 	ldrsb.w	r3, [r7, #15]
 801a94e:	2b00      	cmp	r3, #0
 801a950:	d103      	bne.n	801a95a <tcp_close_shutdown_fin+0x9e>
    /* To ensure all data has been sent when tcp_close returns, we have
       to make sure tcp_output doesn't fail.
       Since we don't really have to ensure all data has been sent when tcp_close
       returns (unsent data is sent from tcp timer functions, also), we don't care
       for the return value of tcp_output for now. */
    tcp_output(pcb);
 801a952:	6878      	ldr	r0, [r7, #4]
 801a954:	f004 ff4e 	bl	801f7f4 <tcp_output>
 801a958:	e00d      	b.n	801a976 <tcp_close_shutdown_fin+0xba>
  } else if (err == ERR_MEM) {
 801a95a:	f997 300f 	ldrsb.w	r3, [r7, #15]
 801a95e:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 801a962:	d108      	bne.n	801a976 <tcp_close_shutdown_fin+0xba>
    /* Mark this pcb for closing. Closing is retried from tcp_tmr. */
    tcp_set_flags(pcb, TF_CLOSEPEND);
 801a964:	687b      	ldr	r3, [r7, #4]
 801a966:	8b5b      	ldrh	r3, [r3, #26]
 801a968:	f043 0308 	orr.w	r3, r3, #8
 801a96c:	b29a      	uxth	r2, r3
 801a96e:	687b      	ldr	r3, [r7, #4]
 801a970:	835a      	strh	r2, [r3, #26]
    /* We have to return ERR_OK from here to indicate to the callers that this
       pcb should not be used any more as it will be freed soon via tcp_tmr.
       This is OK here since sending FIN does not guarantee a time frime for
       actually freeing the pcb, either (it is left in closure states for
       remote ACK or timeout) */
    return ERR_OK;
 801a972:	2300      	movs	r3, #0
 801a974:	e001      	b.n	801a97a <tcp_close_shutdown_fin+0xbe>
  }
  return err;
 801a976:	f997 300f 	ldrsb.w	r3, [r7, #15]
}
 801a97a:	4618      	mov	r0, r3
 801a97c:	3710      	adds	r7, #16
 801a97e:	46bd      	mov	sp, r7
 801a980:	bd80      	pop	{r7, pc}
 801a982:	bf00      	nop
 801a984:	0802e13c 	.word	0x0802e13c
 801a988:	0802e1ec 	.word	0x0802e1ec
 801a98c:	0802e180 	.word	0x0802e180

0801a990 <tcp_close>:
 * @return ERR_OK if connection has been closed
 *         another err_t if closing failed and pcb is not freed
 */
err_t
tcp_close(struct tcp_pcb *pcb)
{
 801a990:	b580      	push	{r7, lr}
 801a992:	b082      	sub	sp, #8
 801a994:	af00      	add	r7, sp, #0
 801a996:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT_CORE_LOCKED();
 801a998:	f7f5 fb6a 	bl	8010070 <sys_check_core_locking>

  LWIP_ERROR("tcp_close: invalid pcb", pcb != NULL, return ERR_ARG);
 801a99c:	687b      	ldr	r3, [r7, #4]
 801a99e:	2b00      	cmp	r3, #0
 801a9a0:	d109      	bne.n	801a9b6 <tcp_close+0x26>
 801a9a2:	4b0f      	ldr	r3, [pc, #60]	@ (801a9e0 <tcp_close+0x50>)
 801a9a4:	f44f 72f4 	mov.w	r2, #488	@ 0x1e8
 801a9a8:	490e      	ldr	r1, [pc, #56]	@ (801a9e4 <tcp_close+0x54>)
 801a9aa:	480f      	ldr	r0, [pc, #60]	@ (801a9e8 <tcp_close+0x58>)
 801a9ac:	f00e fdae 	bl	802950c <iprintf>
 801a9b0:	f06f 030f 	mvn.w	r3, #15
 801a9b4:	e00f      	b.n	801a9d6 <tcp_close+0x46>
  LWIP_DEBUGF(TCP_DEBUG, ("tcp_close: closing in "));

  tcp_debug_print_state(pcb->state);

  if (pcb->state != LISTEN) {
 801a9b6:	687b      	ldr	r3, [r7, #4]
 801a9b8:	7d1b      	ldrb	r3, [r3, #20]
 801a9ba:	2b01      	cmp	r3, #1
 801a9bc:	d006      	beq.n	801a9cc <tcp_close+0x3c>
    /* Set a flag not to receive any more data... */
    tcp_set_flags(pcb, TF_RXCLOSED);
 801a9be:	687b      	ldr	r3, [r7, #4]
 801a9c0:	8b5b      	ldrh	r3, [r3, #26]
 801a9c2:	f043 0310 	orr.w	r3, r3, #16
 801a9c6:	b29a      	uxth	r2, r3
 801a9c8:	687b      	ldr	r3, [r7, #4]
 801a9ca:	835a      	strh	r2, [r3, #26]
  }
  /* ... and close */
  return tcp_close_shutdown(pcb, 1);
 801a9cc:	2101      	movs	r1, #1
 801a9ce:	6878      	ldr	r0, [r7, #4]
 801a9d0:	f7ff fe92 	bl	801a6f8 <tcp_close_shutdown>
 801a9d4:	4603      	mov	r3, r0
}
 801a9d6:	4618      	mov	r0, r3
 801a9d8:	3708      	adds	r7, #8
 801a9da:	46bd      	mov	sp, r7
 801a9dc:	bd80      	pop	{r7, pc}
 801a9de:	bf00      	nop
 801a9e0:	0802e13c 	.word	0x0802e13c
 801a9e4:	0802e24c 	.word	0x0802e24c
 801a9e8:	0802e180 	.word	0x0802e180

0801a9ec <tcp_shutdown>:
 * @return ERR_OK if shutdown succeeded (or the PCB has already been shut down)
 *         another err_t on error.
 */
err_t
tcp_shutdown(struct tcp_pcb *pcb, int shut_rx, int shut_tx)
{
 801a9ec:	b580      	push	{r7, lr}
 801a9ee:	b084      	sub	sp, #16
 801a9f0:	af00      	add	r7, sp, #0
 801a9f2:	60f8      	str	r0, [r7, #12]
 801a9f4:	60b9      	str	r1, [r7, #8]
 801a9f6:	607a      	str	r2, [r7, #4]
  LWIP_ASSERT_CORE_LOCKED();
 801a9f8:	f7f5 fb3a 	bl	8010070 <sys_check_core_locking>

  LWIP_ERROR("tcp_shutdown: invalid pcb", pcb != NULL, return ERR_ARG);
 801a9fc:	68fb      	ldr	r3, [r7, #12]
 801a9fe:	2b00      	cmp	r3, #0
 801aa00:	d109      	bne.n	801aa16 <tcp_shutdown+0x2a>
 801aa02:	4b26      	ldr	r3, [pc, #152]	@ (801aa9c <tcp_shutdown+0xb0>)
 801aa04:	f240 2207 	movw	r2, #519	@ 0x207
 801aa08:	4925      	ldr	r1, [pc, #148]	@ (801aaa0 <tcp_shutdown+0xb4>)
 801aa0a:	4826      	ldr	r0, [pc, #152]	@ (801aaa4 <tcp_shutdown+0xb8>)
 801aa0c:	f00e fd7e 	bl	802950c <iprintf>
 801aa10:	f06f 030f 	mvn.w	r3, #15
 801aa14:	e03d      	b.n	801aa92 <tcp_shutdown+0xa6>

  if (pcb->state == LISTEN) {
 801aa16:	68fb      	ldr	r3, [r7, #12]
 801aa18:	7d1b      	ldrb	r3, [r3, #20]
 801aa1a:	2b01      	cmp	r3, #1
 801aa1c:	d102      	bne.n	801aa24 <tcp_shutdown+0x38>
    return ERR_CONN;
 801aa1e:	f06f 030a 	mvn.w	r3, #10
 801aa22:	e036      	b.n	801aa92 <tcp_shutdown+0xa6>
  }
  if (shut_rx) {
 801aa24:	68bb      	ldr	r3, [r7, #8]
 801aa26:	2b00      	cmp	r3, #0
 801aa28:	d01b      	beq.n	801aa62 <tcp_shutdown+0x76>
    /* shut down the receive side: set a flag not to receive any more data... */
    tcp_set_flags(pcb, TF_RXCLOSED);
 801aa2a:	68fb      	ldr	r3, [r7, #12]
 801aa2c:	8b5b      	ldrh	r3, [r3, #26]
 801aa2e:	f043 0310 	orr.w	r3, r3, #16
 801aa32:	b29a      	uxth	r2, r3
 801aa34:	68fb      	ldr	r3, [r7, #12]
 801aa36:	835a      	strh	r2, [r3, #26]
    if (shut_tx) {
 801aa38:	687b      	ldr	r3, [r7, #4]
 801aa3a:	2b00      	cmp	r3, #0
 801aa3c:	d005      	beq.n	801aa4a <tcp_shutdown+0x5e>
      /* shutting down the tx AND rx side is the same as closing for the raw API */
      return tcp_close_shutdown(pcb, 1);
 801aa3e:	2101      	movs	r1, #1
 801aa40:	68f8      	ldr	r0, [r7, #12]
 801aa42:	f7ff fe59 	bl	801a6f8 <tcp_close_shutdown>
 801aa46:	4603      	mov	r3, r0
 801aa48:	e023      	b.n	801aa92 <tcp_shutdown+0xa6>
    }
    /* ... and free buffered data */
    if (pcb->refused_data != NULL) {
 801aa4a:	68fb      	ldr	r3, [r7, #12]
 801aa4c:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 801aa4e:	2b00      	cmp	r3, #0
 801aa50:	d007      	beq.n	801aa62 <tcp_shutdown+0x76>
      pbuf_free(pcb->refused_data);
 801aa52:	68fb      	ldr	r3, [r7, #12]
 801aa54:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 801aa56:	4618      	mov	r0, r3
 801aa58:	f7ff fae0 	bl	801a01c <pbuf_free>
      pcb->refused_data = NULL;
 801aa5c:	68fb      	ldr	r3, [r7, #12]
 801aa5e:	2200      	movs	r2, #0
 801aa60:	679a      	str	r2, [r3, #120]	@ 0x78
    }
  }
  if (shut_tx) {
 801aa62:	687b      	ldr	r3, [r7, #4]
 801aa64:	2b00      	cmp	r3, #0
 801aa66:	d013      	beq.n	801aa90 <tcp_shutdown+0xa4>
    /* This can't happen twice since if it succeeds, the pcb's state is changed.
       Only close in these states as the others directly deallocate the PCB */
    switch (pcb->state) {
 801aa68:	68fb      	ldr	r3, [r7, #12]
 801aa6a:	7d1b      	ldrb	r3, [r3, #20]
 801aa6c:	2b04      	cmp	r3, #4
 801aa6e:	dc02      	bgt.n	801aa76 <tcp_shutdown+0x8a>
 801aa70:	2b03      	cmp	r3, #3
 801aa72:	da02      	bge.n	801aa7a <tcp_shutdown+0x8e>
 801aa74:	e009      	b.n	801aa8a <tcp_shutdown+0x9e>
 801aa76:	2b07      	cmp	r3, #7
 801aa78:	d107      	bne.n	801aa8a <tcp_shutdown+0x9e>
      case SYN_RCVD:
      case ESTABLISHED:
      case CLOSE_WAIT:
        return tcp_close_shutdown(pcb, (u8_t)shut_rx);
 801aa7a:	68bb      	ldr	r3, [r7, #8]
 801aa7c:	b2db      	uxtb	r3, r3
 801aa7e:	4619      	mov	r1, r3
 801aa80:	68f8      	ldr	r0, [r7, #12]
 801aa82:	f7ff fe39 	bl	801a6f8 <tcp_close_shutdown>
 801aa86:	4603      	mov	r3, r0
 801aa88:	e003      	b.n	801aa92 <tcp_shutdown+0xa6>
      default:
        /* Not (yet?) connected, cannot shutdown the TX side as that would bring us
          into CLOSED state, where the PCB is deallocated. */
        return ERR_CONN;
 801aa8a:	f06f 030a 	mvn.w	r3, #10
 801aa8e:	e000      	b.n	801aa92 <tcp_shutdown+0xa6>
    }
  }
  return ERR_OK;
 801aa90:	2300      	movs	r3, #0
}
 801aa92:	4618      	mov	r0, r3
 801aa94:	3710      	adds	r7, #16
 801aa96:	46bd      	mov	sp, r7
 801aa98:	bd80      	pop	{r7, pc}
 801aa9a:	bf00      	nop
 801aa9c:	0802e13c 	.word	0x0802e13c
 801aaa0:	0802e264 	.word	0x0802e264
 801aaa4:	0802e180 	.word	0x0802e180

0801aaa8 <tcp_abandon>:
 * @param pcb the tcp_pcb to abort
 * @param reset boolean to indicate whether a reset should be sent
 */
void
tcp_abandon(struct tcp_pcb *pcb, int reset)
{
 801aaa8:	b580      	push	{r7, lr}
 801aaaa:	b08e      	sub	sp, #56	@ 0x38
 801aaac:	af04      	add	r7, sp, #16
 801aaae:	6078      	str	r0, [r7, #4]
 801aab0:	6039      	str	r1, [r7, #0]
#if LWIP_CALLBACK_API
  tcp_err_fn errf;
#endif /* LWIP_CALLBACK_API */
  void *errf_arg;

  LWIP_ASSERT_CORE_LOCKED();
 801aab2:	f7f5 fadd 	bl	8010070 <sys_check_core_locking>

  LWIP_ERROR("tcp_abandon: invalid pcb", pcb != NULL, return);
 801aab6:	687b      	ldr	r3, [r7, #4]
 801aab8:	2b00      	cmp	r3, #0
 801aaba:	d107      	bne.n	801aacc <tcp_abandon+0x24>
 801aabc:	4b52      	ldr	r3, [pc, #328]	@ (801ac08 <tcp_abandon+0x160>)
 801aabe:	f240 223d 	movw	r2, #573	@ 0x23d
 801aac2:	4952      	ldr	r1, [pc, #328]	@ (801ac0c <tcp_abandon+0x164>)
 801aac4:	4852      	ldr	r0, [pc, #328]	@ (801ac10 <tcp_abandon+0x168>)
 801aac6:	f00e fd21 	bl	802950c <iprintf>
 801aaca:	e099      	b.n	801ac00 <tcp_abandon+0x158>

  /* pcb->state LISTEN not allowed here */
  LWIP_ASSERT("don't call tcp_abort/tcp_abandon for listen-pcbs",
 801aacc:	687b      	ldr	r3, [r7, #4]
 801aace:	7d1b      	ldrb	r3, [r3, #20]
 801aad0:	2b01      	cmp	r3, #1
 801aad2:	d106      	bne.n	801aae2 <tcp_abandon+0x3a>
 801aad4:	4b4c      	ldr	r3, [pc, #304]	@ (801ac08 <tcp_abandon+0x160>)
 801aad6:	f44f 7210 	mov.w	r2, #576	@ 0x240
 801aada:	494e      	ldr	r1, [pc, #312]	@ (801ac14 <tcp_abandon+0x16c>)
 801aadc:	484c      	ldr	r0, [pc, #304]	@ (801ac10 <tcp_abandon+0x168>)
 801aade:	f00e fd15 	bl	802950c <iprintf>
              pcb->state != LISTEN);
  /* Figure out on which TCP PCB list we are, and remove us. If we
     are in an active state, call the receive function associated with
     the PCB with a NULL argument, and send an RST to the remote end. */
  if (pcb->state == TIME_WAIT) {
 801aae2:	687b      	ldr	r3, [r7, #4]
 801aae4:	7d1b      	ldrb	r3, [r3, #20]
 801aae6:	2b0a      	cmp	r3, #10
 801aae8:	d107      	bne.n	801aafa <tcp_abandon+0x52>
    tcp_pcb_remove(&tcp_tw_pcbs, pcb);
 801aaea:	6879      	ldr	r1, [r7, #4]
 801aaec:	484a      	ldr	r0, [pc, #296]	@ (801ac18 <tcp_abandon+0x170>)
 801aaee:	f001 fa03 	bl	801bef8 <tcp_pcb_remove>
    tcp_free(pcb);
 801aaf2:	6878      	ldr	r0, [r7, #4]
 801aaf4:	f7ff fd4e 	bl	801a594 <tcp_free>
 801aaf8:	e082      	b.n	801ac00 <tcp_abandon+0x158>
  } else {
    int send_rst = 0;
 801aafa:	2300      	movs	r3, #0
 801aafc:	627b      	str	r3, [r7, #36]	@ 0x24
    u16_t local_port = 0;
 801aafe:	2300      	movs	r3, #0
 801ab00:	847b      	strh	r3, [r7, #34]	@ 0x22
    enum tcp_state last_state;
    seqno = pcb->snd_nxt;
 801ab02:	687b      	ldr	r3, [r7, #4]
 801ab04:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 801ab06:	61bb      	str	r3, [r7, #24]
    ackno = pcb->rcv_nxt;
 801ab08:	687b      	ldr	r3, [r7, #4]
 801ab0a:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801ab0c:	617b      	str	r3, [r7, #20]
#if LWIP_CALLBACK_API
    errf = pcb->errf;
 801ab0e:	687b      	ldr	r3, [r7, #4]
 801ab10:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 801ab14:	613b      	str	r3, [r7, #16]
#endif /* LWIP_CALLBACK_API */
    errf_arg = pcb->callback_arg;
 801ab16:	687b      	ldr	r3, [r7, #4]
 801ab18:	691b      	ldr	r3, [r3, #16]
 801ab1a:	60fb      	str	r3, [r7, #12]
    if (pcb->state == CLOSED) {
 801ab1c:	687b      	ldr	r3, [r7, #4]
 801ab1e:	7d1b      	ldrb	r3, [r3, #20]
 801ab20:	2b00      	cmp	r3, #0
 801ab22:	d126      	bne.n	801ab72 <tcp_abandon+0xca>
      if (pcb->local_port != 0) {
 801ab24:	687b      	ldr	r3, [r7, #4]
 801ab26:	8adb      	ldrh	r3, [r3, #22]
 801ab28:	2b00      	cmp	r3, #0
 801ab2a:	d02e      	beq.n	801ab8a <tcp_abandon+0xe2>
        /* bound, not yet opened */
        TCP_RMV(&tcp_bound_pcbs, pcb);
 801ab2c:	4b3b      	ldr	r3, [pc, #236]	@ (801ac1c <tcp_abandon+0x174>)
 801ab2e:	681b      	ldr	r3, [r3, #0]
 801ab30:	687a      	ldr	r2, [r7, #4]
 801ab32:	429a      	cmp	r2, r3
 801ab34:	d105      	bne.n	801ab42 <tcp_abandon+0x9a>
 801ab36:	4b39      	ldr	r3, [pc, #228]	@ (801ac1c <tcp_abandon+0x174>)
 801ab38:	681b      	ldr	r3, [r3, #0]
 801ab3a:	68db      	ldr	r3, [r3, #12]
 801ab3c:	4a37      	ldr	r2, [pc, #220]	@ (801ac1c <tcp_abandon+0x174>)
 801ab3e:	6013      	str	r3, [r2, #0]
 801ab40:	e013      	b.n	801ab6a <tcp_abandon+0xc2>
 801ab42:	4b36      	ldr	r3, [pc, #216]	@ (801ac1c <tcp_abandon+0x174>)
 801ab44:	681b      	ldr	r3, [r3, #0]
 801ab46:	61fb      	str	r3, [r7, #28]
 801ab48:	e00c      	b.n	801ab64 <tcp_abandon+0xbc>
 801ab4a:	69fb      	ldr	r3, [r7, #28]
 801ab4c:	68db      	ldr	r3, [r3, #12]
 801ab4e:	687a      	ldr	r2, [r7, #4]
 801ab50:	429a      	cmp	r2, r3
 801ab52:	d104      	bne.n	801ab5e <tcp_abandon+0xb6>
 801ab54:	687b      	ldr	r3, [r7, #4]
 801ab56:	68da      	ldr	r2, [r3, #12]
 801ab58:	69fb      	ldr	r3, [r7, #28]
 801ab5a:	60da      	str	r2, [r3, #12]
 801ab5c:	e005      	b.n	801ab6a <tcp_abandon+0xc2>
 801ab5e:	69fb      	ldr	r3, [r7, #28]
 801ab60:	68db      	ldr	r3, [r3, #12]
 801ab62:	61fb      	str	r3, [r7, #28]
 801ab64:	69fb      	ldr	r3, [r7, #28]
 801ab66:	2b00      	cmp	r3, #0
 801ab68:	d1ef      	bne.n	801ab4a <tcp_abandon+0xa2>
 801ab6a:	687b      	ldr	r3, [r7, #4]
 801ab6c:	2200      	movs	r2, #0
 801ab6e:	60da      	str	r2, [r3, #12]
 801ab70:	e00b      	b.n	801ab8a <tcp_abandon+0xe2>
      }
    } else {
      send_rst = reset;
 801ab72:	683b      	ldr	r3, [r7, #0]
 801ab74:	627b      	str	r3, [r7, #36]	@ 0x24
      local_port = pcb->local_port;
 801ab76:	687b      	ldr	r3, [r7, #4]
 801ab78:	8adb      	ldrh	r3, [r3, #22]
 801ab7a:	847b      	strh	r3, [r7, #34]	@ 0x22
      TCP_PCB_REMOVE_ACTIVE(pcb);
 801ab7c:	6879      	ldr	r1, [r7, #4]
 801ab7e:	4828      	ldr	r0, [pc, #160]	@ (801ac20 <tcp_abandon+0x178>)
 801ab80:	f001 f9ba 	bl	801bef8 <tcp_pcb_remove>
 801ab84:	4b27      	ldr	r3, [pc, #156]	@ (801ac24 <tcp_abandon+0x17c>)
 801ab86:	2201      	movs	r2, #1
 801ab88:	701a      	strb	r2, [r3, #0]
    }
    if (pcb->unacked != NULL) {
 801ab8a:	687b      	ldr	r3, [r7, #4]
 801ab8c:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801ab8e:	2b00      	cmp	r3, #0
 801ab90:	d004      	beq.n	801ab9c <tcp_abandon+0xf4>
      tcp_segs_free(pcb->unacked);
 801ab92:	687b      	ldr	r3, [r7, #4]
 801ab94:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801ab96:	4618      	mov	r0, r3
 801ab98:	f000 fe84 	bl	801b8a4 <tcp_segs_free>
    }
    if (pcb->unsent != NULL) {
 801ab9c:	687b      	ldr	r3, [r7, #4]
 801ab9e:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801aba0:	2b00      	cmp	r3, #0
 801aba2:	d004      	beq.n	801abae <tcp_abandon+0x106>
      tcp_segs_free(pcb->unsent);
 801aba4:	687b      	ldr	r3, [r7, #4]
 801aba6:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801aba8:	4618      	mov	r0, r3
 801abaa:	f000 fe7b 	bl	801b8a4 <tcp_segs_free>
    }
#if TCP_QUEUE_OOSEQ
    if (pcb->ooseq != NULL) {
 801abae:	687b      	ldr	r3, [r7, #4]
 801abb0:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801abb2:	2b00      	cmp	r3, #0
 801abb4:	d004      	beq.n	801abc0 <tcp_abandon+0x118>
      tcp_segs_free(pcb->ooseq);
 801abb6:	687b      	ldr	r3, [r7, #4]
 801abb8:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801abba:	4618      	mov	r0, r3
 801abbc:	f000 fe72 	bl	801b8a4 <tcp_segs_free>
    }
#endif /* TCP_QUEUE_OOSEQ */
    tcp_backlog_accepted(pcb);
    if (send_rst) {
 801abc0:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801abc2:	2b00      	cmp	r3, #0
 801abc4:	d00e      	beq.n	801abe4 <tcp_abandon+0x13c>
      LWIP_DEBUGF(TCP_RST_DEBUG, ("tcp_abandon: sending RST\n"));
      tcp_rst(pcb, seqno, ackno, &pcb->local_ip, &pcb->remote_ip, local_port, pcb->remote_port);
 801abc6:	6879      	ldr	r1, [r7, #4]
 801abc8:	687b      	ldr	r3, [r7, #4]
 801abca:	3304      	adds	r3, #4
 801abcc:	687a      	ldr	r2, [r7, #4]
 801abce:	8b12      	ldrh	r2, [r2, #24]
 801abd0:	9202      	str	r2, [sp, #8]
 801abd2:	8c7a      	ldrh	r2, [r7, #34]	@ 0x22
 801abd4:	9201      	str	r2, [sp, #4]
 801abd6:	9300      	str	r3, [sp, #0]
 801abd8:	460b      	mov	r3, r1
 801abda:	697a      	ldr	r2, [r7, #20]
 801abdc:	69b9      	ldr	r1, [r7, #24]
 801abde:	6878      	ldr	r0, [r7, #4]
 801abe0:	f005 fbca 	bl	8020378 <tcp_rst>
    }
    last_state = pcb->state;
 801abe4:	687b      	ldr	r3, [r7, #4]
 801abe6:	7d1b      	ldrb	r3, [r3, #20]
 801abe8:	72fb      	strb	r3, [r7, #11]
    tcp_free(pcb);
 801abea:	6878      	ldr	r0, [r7, #4]
 801abec:	f7ff fcd2 	bl	801a594 <tcp_free>
    TCP_EVENT_ERR(last_state, errf, errf_arg, ERR_ABRT);
 801abf0:	693b      	ldr	r3, [r7, #16]
 801abf2:	2b00      	cmp	r3, #0
 801abf4:	d004      	beq.n	801ac00 <tcp_abandon+0x158>
 801abf6:	693b      	ldr	r3, [r7, #16]
 801abf8:	f06f 010c 	mvn.w	r1, #12
 801abfc:	68f8      	ldr	r0, [r7, #12]
 801abfe:	4798      	blx	r3
  }
}
 801ac00:	3728      	adds	r7, #40	@ 0x28
 801ac02:	46bd      	mov	sp, r7
 801ac04:	bd80      	pop	{r7, pc}
 801ac06:	bf00      	nop
 801ac08:	0802e13c 	.word	0x0802e13c
 801ac0c:	0802e280 	.word	0x0802e280
 801ac10:	0802e180 	.word	0x0802e180
 801ac14:	0802e29c 	.word	0x0802e29c
 801ac18:	24029ffc 	.word	0x24029ffc
 801ac1c:	24029ff0 	.word	0x24029ff0
 801ac20:	24029ff8 	.word	0x24029ff8
 801ac24:	2402a000 	.word	0x2402a000

0801ac28 <tcp_abort>:
 *
 * @param pcb the tcp pcb to abort
 */
void
tcp_abort(struct tcp_pcb *pcb)
{
 801ac28:	b580      	push	{r7, lr}
 801ac2a:	b082      	sub	sp, #8
 801ac2c:	af00      	add	r7, sp, #0
 801ac2e:	6078      	str	r0, [r7, #4]
  tcp_abandon(pcb, 1);
 801ac30:	2101      	movs	r1, #1
 801ac32:	6878      	ldr	r0, [r7, #4]
 801ac34:	f7ff ff38 	bl	801aaa8 <tcp_abandon>
}
 801ac38:	bf00      	nop
 801ac3a:	3708      	adds	r7, #8
 801ac3c:	46bd      	mov	sp, r7
 801ac3e:	bd80      	pop	{r7, pc}

0801ac40 <tcp_update_rcv_ann_wnd>:
 * Returns how much extra window would be advertised if we sent an
 * update now.
 */
u32_t
tcp_update_rcv_ann_wnd(struct tcp_pcb *pcb)
{
 801ac40:	b580      	push	{r7, lr}
 801ac42:	b084      	sub	sp, #16
 801ac44:	af00      	add	r7, sp, #0
 801ac46:	6078      	str	r0, [r7, #4]
  u32_t new_right_edge;

  LWIP_ASSERT("tcp_update_rcv_ann_wnd: invalid pcb", pcb != NULL);
 801ac48:	687b      	ldr	r3, [r7, #4]
 801ac4a:	2b00      	cmp	r3, #0
 801ac4c:	d106      	bne.n	801ac5c <tcp_update_rcv_ann_wnd+0x1c>
 801ac4e:	4b25      	ldr	r3, [pc, #148]	@ (801ace4 <tcp_update_rcv_ann_wnd+0xa4>)
 801ac50:	f240 32a6 	movw	r2, #934	@ 0x3a6
 801ac54:	4924      	ldr	r1, [pc, #144]	@ (801ace8 <tcp_update_rcv_ann_wnd+0xa8>)
 801ac56:	4825      	ldr	r0, [pc, #148]	@ (801acec <tcp_update_rcv_ann_wnd+0xac>)
 801ac58:	f00e fc58 	bl	802950c <iprintf>
  new_right_edge = pcb->rcv_nxt + pcb->rcv_wnd;
 801ac5c:	687b      	ldr	r3, [r7, #4]
 801ac5e:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801ac60:	687a      	ldr	r2, [r7, #4]
 801ac62:	8d12      	ldrh	r2, [r2, #40]	@ 0x28
 801ac64:	4413      	add	r3, r2
 801ac66:	60fb      	str	r3, [r7, #12]

  if (TCP_SEQ_GEQ(new_right_edge, pcb->rcv_ann_right_edge + LWIP_MIN((TCP_WND / 2), pcb->mss))) {
 801ac68:	687b      	ldr	r3, [r7, #4]
 801ac6a:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 801ac6c:	687a      	ldr	r2, [r7, #4]
 801ac6e:	8e52      	ldrh	r2, [r2, #50]	@ 0x32
 801ac70:	f640 3168 	movw	r1, #2920	@ 0xb68
 801ac74:	428a      	cmp	r2, r1
 801ac76:	bf28      	it	cs
 801ac78:	460a      	movcs	r2, r1
 801ac7a:	b292      	uxth	r2, r2
 801ac7c:	4413      	add	r3, r2
 801ac7e:	68fa      	ldr	r2, [r7, #12]
 801ac80:	1ad3      	subs	r3, r2, r3
 801ac82:	2b00      	cmp	r3, #0
 801ac84:	db08      	blt.n	801ac98 <tcp_update_rcv_ann_wnd+0x58>
    /* we can advertise more window */
    pcb->rcv_ann_wnd = pcb->rcv_wnd;
 801ac86:	687b      	ldr	r3, [r7, #4]
 801ac88:	8d1a      	ldrh	r2, [r3, #40]	@ 0x28
 801ac8a:	687b      	ldr	r3, [r7, #4]
 801ac8c:	855a      	strh	r2, [r3, #42]	@ 0x2a
    return new_right_edge - pcb->rcv_ann_right_edge;
 801ac8e:	687b      	ldr	r3, [r7, #4]
 801ac90:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 801ac92:	68fa      	ldr	r2, [r7, #12]
 801ac94:	1ad3      	subs	r3, r2, r3
 801ac96:	e020      	b.n	801acda <tcp_update_rcv_ann_wnd+0x9a>
  } else {
    if (TCP_SEQ_GT(pcb->rcv_nxt, pcb->rcv_ann_right_edge)) {
 801ac98:	687b      	ldr	r3, [r7, #4]
 801ac9a:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 801ac9c:	687b      	ldr	r3, [r7, #4]
 801ac9e:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 801aca0:	1ad3      	subs	r3, r2, r3
 801aca2:	2b00      	cmp	r3, #0
 801aca4:	dd03      	ble.n	801acae <tcp_update_rcv_ann_wnd+0x6e>
      /* Can happen due to other end sending out of advertised window,
       * but within actual available (but not yet advertised) window */
      pcb->rcv_ann_wnd = 0;
 801aca6:	687b      	ldr	r3, [r7, #4]
 801aca8:	2200      	movs	r2, #0
 801acaa:	855a      	strh	r2, [r3, #42]	@ 0x2a
 801acac:	e014      	b.n	801acd8 <tcp_update_rcv_ann_wnd+0x98>
    } else {
      /* keep the right edge of window constant */
      u32_t new_rcv_ann_wnd = pcb->rcv_ann_right_edge - pcb->rcv_nxt;
 801acae:	687b      	ldr	r3, [r7, #4]
 801acb0:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 801acb2:	687b      	ldr	r3, [r7, #4]
 801acb4:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801acb6:	1ad3      	subs	r3, r2, r3
 801acb8:	60bb      	str	r3, [r7, #8]
#if !LWIP_WND_SCALE
      LWIP_ASSERT("new_rcv_ann_wnd <= 0xffff", new_rcv_ann_wnd <= 0xffff);
 801acba:	68bb      	ldr	r3, [r7, #8]
 801acbc:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 801acc0:	d306      	bcc.n	801acd0 <tcp_update_rcv_ann_wnd+0x90>
 801acc2:	4b08      	ldr	r3, [pc, #32]	@ (801ace4 <tcp_update_rcv_ann_wnd+0xa4>)
 801acc4:	f240 32b6 	movw	r2, #950	@ 0x3b6
 801acc8:	4909      	ldr	r1, [pc, #36]	@ (801acf0 <tcp_update_rcv_ann_wnd+0xb0>)
 801acca:	4808      	ldr	r0, [pc, #32]	@ (801acec <tcp_update_rcv_ann_wnd+0xac>)
 801accc:	f00e fc1e 	bl	802950c <iprintf>
#endif
      pcb->rcv_ann_wnd = (tcpwnd_size_t)new_rcv_ann_wnd;
 801acd0:	68bb      	ldr	r3, [r7, #8]
 801acd2:	b29a      	uxth	r2, r3
 801acd4:	687b      	ldr	r3, [r7, #4]
 801acd6:	855a      	strh	r2, [r3, #42]	@ 0x2a
    }
    return 0;
 801acd8:	2300      	movs	r3, #0
  }
}
 801acda:	4618      	mov	r0, r3
 801acdc:	3710      	adds	r7, #16
 801acde:	46bd      	mov	sp, r7
 801ace0:	bd80      	pop	{r7, pc}
 801ace2:	bf00      	nop
 801ace4:	0802e13c 	.word	0x0802e13c
 801ace8:	0802e398 	.word	0x0802e398
 801acec:	0802e180 	.word	0x0802e180
 801acf0:	0802e3bc 	.word	0x0802e3bc

0801acf4 <tcp_recved>:
 * @param pcb the tcp_pcb for which data is read
 * @param len the amount of bytes that have been read by the application
 */
void
tcp_recved(struct tcp_pcb *pcb, u16_t len)
{
 801acf4:	b580      	push	{r7, lr}
 801acf6:	b084      	sub	sp, #16
 801acf8:	af00      	add	r7, sp, #0
 801acfa:	6078      	str	r0, [r7, #4]
 801acfc:	460b      	mov	r3, r1
 801acfe:	807b      	strh	r3, [r7, #2]
  u32_t wnd_inflation;
  tcpwnd_size_t rcv_wnd;

  LWIP_ASSERT_CORE_LOCKED();
 801ad00:	f7f5 f9b6 	bl	8010070 <sys_check_core_locking>

  LWIP_ERROR("tcp_recved: invalid pcb", pcb != NULL, return);
 801ad04:	687b      	ldr	r3, [r7, #4]
 801ad06:	2b00      	cmp	r3, #0
 801ad08:	d107      	bne.n	801ad1a <tcp_recved+0x26>
 801ad0a:	4b20      	ldr	r3, [pc, #128]	@ (801ad8c <tcp_recved+0x98>)
 801ad0c:	f240 32cf 	movw	r2, #975	@ 0x3cf
 801ad10:	491f      	ldr	r1, [pc, #124]	@ (801ad90 <tcp_recved+0x9c>)
 801ad12:	4820      	ldr	r0, [pc, #128]	@ (801ad94 <tcp_recved+0xa0>)
 801ad14:	f00e fbfa 	bl	802950c <iprintf>
 801ad18:	e034      	b.n	801ad84 <tcp_recved+0x90>

  /* pcb->state LISTEN not allowed here */
  LWIP_ASSERT("don't call tcp_recved for listen-pcbs",
 801ad1a:	687b      	ldr	r3, [r7, #4]
 801ad1c:	7d1b      	ldrb	r3, [r3, #20]
 801ad1e:	2b01      	cmp	r3, #1
 801ad20:	d106      	bne.n	801ad30 <tcp_recved+0x3c>
 801ad22:	4b1a      	ldr	r3, [pc, #104]	@ (801ad8c <tcp_recved+0x98>)
 801ad24:	f240 32d2 	movw	r2, #978	@ 0x3d2
 801ad28:	491b      	ldr	r1, [pc, #108]	@ (801ad98 <tcp_recved+0xa4>)
 801ad2a:	481a      	ldr	r0, [pc, #104]	@ (801ad94 <tcp_recved+0xa0>)
 801ad2c:	f00e fbee 	bl	802950c <iprintf>
              pcb->state != LISTEN);

  rcv_wnd = (tcpwnd_size_t)(pcb->rcv_wnd + len);
 801ad30:	687b      	ldr	r3, [r7, #4]
 801ad32:	8d1a      	ldrh	r2, [r3, #40]	@ 0x28
 801ad34:	887b      	ldrh	r3, [r7, #2]
 801ad36:	4413      	add	r3, r2
 801ad38:	81fb      	strh	r3, [r7, #14]
  if ((rcv_wnd > TCP_WND_MAX(pcb)) || (rcv_wnd < pcb->rcv_wnd)) {
 801ad3a:	89fb      	ldrh	r3, [r7, #14]
 801ad3c:	f241 62d0 	movw	r2, #5840	@ 0x16d0
 801ad40:	4293      	cmp	r3, r2
 801ad42:	d804      	bhi.n	801ad4e <tcp_recved+0x5a>
 801ad44:	687b      	ldr	r3, [r7, #4]
 801ad46:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 801ad48:	89fa      	ldrh	r2, [r7, #14]
 801ad4a:	429a      	cmp	r2, r3
 801ad4c:	d204      	bcs.n	801ad58 <tcp_recved+0x64>
    /* window got too big or tcpwnd_size_t overflow */
    LWIP_DEBUGF(TCP_DEBUG, ("tcp_recved: window got too big or tcpwnd_size_t overflow\n"));
    pcb->rcv_wnd = TCP_WND_MAX(pcb);
 801ad4e:	687b      	ldr	r3, [r7, #4]
 801ad50:	f241 62d0 	movw	r2, #5840	@ 0x16d0
 801ad54:	851a      	strh	r2, [r3, #40]	@ 0x28
 801ad56:	e002      	b.n	801ad5e <tcp_recved+0x6a>
  } else  {
    pcb->rcv_wnd = rcv_wnd;
 801ad58:	687b      	ldr	r3, [r7, #4]
 801ad5a:	89fa      	ldrh	r2, [r7, #14]
 801ad5c:	851a      	strh	r2, [r3, #40]	@ 0x28
  }

  wnd_inflation = tcp_update_rcv_ann_wnd(pcb);
 801ad5e:	6878      	ldr	r0, [r7, #4]
 801ad60:	f7ff ff6e 	bl	801ac40 <tcp_update_rcv_ann_wnd>
 801ad64:	60b8      	str	r0, [r7, #8]

  /* If the change in the right edge of window is significant (default
   * watermark is TCP_WND/4), then send an explicit update now.
   * Otherwise wait for a packet to be sent in the normal course of
   * events (or more window to be available later) */
  if (wnd_inflation >= TCP_WND_UPDATE_THRESHOLD) {
 801ad66:	68bb      	ldr	r3, [r7, #8]
 801ad68:	f240 52b3 	movw	r2, #1459	@ 0x5b3
 801ad6c:	4293      	cmp	r3, r2
 801ad6e:	d909      	bls.n	801ad84 <tcp_recved+0x90>
    tcp_ack_now(pcb);
 801ad70:	687b      	ldr	r3, [r7, #4]
 801ad72:	8b5b      	ldrh	r3, [r3, #26]
 801ad74:	f043 0302 	orr.w	r3, r3, #2
 801ad78:	b29a      	uxth	r2, r3
 801ad7a:	687b      	ldr	r3, [r7, #4]
 801ad7c:	835a      	strh	r2, [r3, #26]
    tcp_output(pcb);
 801ad7e:	6878      	ldr	r0, [r7, #4]
 801ad80:	f004 fd38 	bl	801f7f4 <tcp_output>
  }

  LWIP_DEBUGF(TCP_DEBUG, ("tcp_recved: received %"U16_F" bytes, wnd %"TCPWNDSIZE_F" (%"TCPWNDSIZE_F").\n",
                          len, pcb->rcv_wnd, (u16_t)(TCP_WND_MAX(pcb) - pcb->rcv_wnd)));
}
 801ad84:	3710      	adds	r7, #16
 801ad86:	46bd      	mov	sp, r7
 801ad88:	bd80      	pop	{r7, pc}
 801ad8a:	bf00      	nop
 801ad8c:	0802e13c 	.word	0x0802e13c
 801ad90:	0802e3d8 	.word	0x0802e3d8
 801ad94:	0802e180 	.word	0x0802e180
 801ad98:	0802e3f0 	.word	0x0802e3f0

0801ad9c <tcp_new_port>:
 *
 * @return a new (free) local TCP port number
 */
static u16_t
tcp_new_port(void)
{
 801ad9c:	b480      	push	{r7}
 801ad9e:	b083      	sub	sp, #12
 801ada0:	af00      	add	r7, sp, #0
  u8_t i;
  u16_t n = 0;
 801ada2:	2300      	movs	r3, #0
 801ada4:	80bb      	strh	r3, [r7, #4]
  struct tcp_pcb *pcb;

again:
  tcp_port++;
 801ada6:	4b1e      	ldr	r3, [pc, #120]	@ (801ae20 <tcp_new_port+0x84>)
 801ada8:	881b      	ldrh	r3, [r3, #0]
 801adaa:	3301      	adds	r3, #1
 801adac:	b29a      	uxth	r2, r3
 801adae:	4b1c      	ldr	r3, [pc, #112]	@ (801ae20 <tcp_new_port+0x84>)
 801adb0:	801a      	strh	r2, [r3, #0]
  if (tcp_port == TCP_LOCAL_PORT_RANGE_END) {
 801adb2:	4b1b      	ldr	r3, [pc, #108]	@ (801ae20 <tcp_new_port+0x84>)
 801adb4:	881b      	ldrh	r3, [r3, #0]
 801adb6:	f64f 72ff 	movw	r2, #65535	@ 0xffff
 801adba:	4293      	cmp	r3, r2
 801adbc:	d103      	bne.n	801adc6 <tcp_new_port+0x2a>
    tcp_port = TCP_LOCAL_PORT_RANGE_START;
 801adbe:	4b18      	ldr	r3, [pc, #96]	@ (801ae20 <tcp_new_port+0x84>)
 801adc0:	f44f 4240 	mov.w	r2, #49152	@ 0xc000
 801adc4:	801a      	strh	r2, [r3, #0]
  }
  /* Check all PCB lists. */
  for (i = 0; i < NUM_TCP_PCB_LISTS; i++) {
 801adc6:	2300      	movs	r3, #0
 801adc8:	71fb      	strb	r3, [r7, #7]
 801adca:	e01e      	b.n	801ae0a <tcp_new_port+0x6e>
    for (pcb = *tcp_pcb_lists[i]; pcb != NULL; pcb = pcb->next) {
 801adcc:	79fb      	ldrb	r3, [r7, #7]
 801adce:	4a15      	ldr	r2, [pc, #84]	@ (801ae24 <tcp_new_port+0x88>)
 801add0:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
 801add4:	681b      	ldr	r3, [r3, #0]
 801add6:	603b      	str	r3, [r7, #0]
 801add8:	e011      	b.n	801adfe <tcp_new_port+0x62>
      if (pcb->local_port == tcp_port) {
 801adda:	683b      	ldr	r3, [r7, #0]
 801addc:	8ada      	ldrh	r2, [r3, #22]
 801adde:	4b10      	ldr	r3, [pc, #64]	@ (801ae20 <tcp_new_port+0x84>)
 801ade0:	881b      	ldrh	r3, [r3, #0]
 801ade2:	429a      	cmp	r2, r3
 801ade4:	d108      	bne.n	801adf8 <tcp_new_port+0x5c>
        n++;
 801ade6:	88bb      	ldrh	r3, [r7, #4]
 801ade8:	3301      	adds	r3, #1
 801adea:	80bb      	strh	r3, [r7, #4]
        if (n > (TCP_LOCAL_PORT_RANGE_END - TCP_LOCAL_PORT_RANGE_START)) {
 801adec:	88bb      	ldrh	r3, [r7, #4]
 801adee:	f5b3 4f80 	cmp.w	r3, #16384	@ 0x4000
 801adf2:	d3d8      	bcc.n	801ada6 <tcp_new_port+0xa>
          return 0;
 801adf4:	2300      	movs	r3, #0
 801adf6:	e00d      	b.n	801ae14 <tcp_new_port+0x78>
    for (pcb = *tcp_pcb_lists[i]; pcb != NULL; pcb = pcb->next) {
 801adf8:	683b      	ldr	r3, [r7, #0]
 801adfa:	68db      	ldr	r3, [r3, #12]
 801adfc:	603b      	str	r3, [r7, #0]
 801adfe:	683b      	ldr	r3, [r7, #0]
 801ae00:	2b00      	cmp	r3, #0
 801ae02:	d1ea      	bne.n	801adda <tcp_new_port+0x3e>
  for (i = 0; i < NUM_TCP_PCB_LISTS; i++) {
 801ae04:	79fb      	ldrb	r3, [r7, #7]
 801ae06:	3301      	adds	r3, #1
 801ae08:	71fb      	strb	r3, [r7, #7]
 801ae0a:	79fb      	ldrb	r3, [r7, #7]
 801ae0c:	2b03      	cmp	r3, #3
 801ae0e:	d9dd      	bls.n	801adcc <tcp_new_port+0x30>
        }
        goto again;
      }
    }
  }
  return tcp_port;
 801ae10:	4b03      	ldr	r3, [pc, #12]	@ (801ae20 <tcp_new_port+0x84>)
 801ae12:	881b      	ldrh	r3, [r3, #0]
}
 801ae14:	4618      	mov	r0, r3
 801ae16:	370c      	adds	r7, #12
 801ae18:	46bd      	mov	sp, r7
 801ae1a:	f85d 7b04 	ldr.w	r7, [sp], #4
 801ae1e:	4770      	bx	lr
 801ae20:	24000038 	.word	0x24000038
 801ae24:	0803076c 	.word	0x0803076c

0801ae28 <tcp_connect>:
 *         other err_t values if connect request couldn't be sent
 */
err_t
tcp_connect(struct tcp_pcb *pcb, const ip_addr_t *ipaddr, u16_t port,
            tcp_connected_fn connected)
{
 801ae28:	b580      	push	{r7, lr}
 801ae2a:	b08a      	sub	sp, #40	@ 0x28
 801ae2c:	af00      	add	r7, sp, #0
 801ae2e:	60f8      	str	r0, [r7, #12]
 801ae30:	60b9      	str	r1, [r7, #8]
 801ae32:	603b      	str	r3, [r7, #0]
 801ae34:	4613      	mov	r3, r2
 801ae36:	80fb      	strh	r3, [r7, #6]
  struct netif *netif = NULL;
 801ae38:	2300      	movs	r3, #0
 801ae3a:	627b      	str	r3, [r7, #36]	@ 0x24
  err_t ret;
  u32_t iss;
  u16_t old_local_port;

  LWIP_ASSERT_CORE_LOCKED();
 801ae3c:	f7f5 f918 	bl	8010070 <sys_check_core_locking>

  LWIP_ERROR("tcp_connect: invalid pcb", pcb != NULL, return ERR_ARG);
 801ae40:	68fb      	ldr	r3, [r7, #12]
 801ae42:	2b00      	cmp	r3, #0
 801ae44:	d109      	bne.n	801ae5a <tcp_connect+0x32>
 801ae46:	4b7d      	ldr	r3, [pc, #500]	@ (801b03c <tcp_connect+0x214>)
 801ae48:	f240 4235 	movw	r2, #1077	@ 0x435
 801ae4c:	497c      	ldr	r1, [pc, #496]	@ (801b040 <tcp_connect+0x218>)
 801ae4e:	487d      	ldr	r0, [pc, #500]	@ (801b044 <tcp_connect+0x21c>)
 801ae50:	f00e fb5c 	bl	802950c <iprintf>
 801ae54:	f06f 030f 	mvn.w	r3, #15
 801ae58:	e0ec      	b.n	801b034 <tcp_connect+0x20c>
  LWIP_ERROR("tcp_connect: invalid ipaddr", ipaddr != NULL, return ERR_ARG);
 801ae5a:	68bb      	ldr	r3, [r7, #8]
 801ae5c:	2b00      	cmp	r3, #0
 801ae5e:	d109      	bne.n	801ae74 <tcp_connect+0x4c>
 801ae60:	4b76      	ldr	r3, [pc, #472]	@ (801b03c <tcp_connect+0x214>)
 801ae62:	f240 4236 	movw	r2, #1078	@ 0x436
 801ae66:	4978      	ldr	r1, [pc, #480]	@ (801b048 <tcp_connect+0x220>)
 801ae68:	4876      	ldr	r0, [pc, #472]	@ (801b044 <tcp_connect+0x21c>)
 801ae6a:	f00e fb4f 	bl	802950c <iprintf>
 801ae6e:	f06f 030f 	mvn.w	r3, #15
 801ae72:	e0df      	b.n	801b034 <tcp_connect+0x20c>

  LWIP_ERROR("tcp_connect: can only connect from state CLOSED", pcb->state == CLOSED, return ERR_ISCONN);
 801ae74:	68fb      	ldr	r3, [r7, #12]
 801ae76:	7d1b      	ldrb	r3, [r3, #20]
 801ae78:	2b00      	cmp	r3, #0
 801ae7a:	d009      	beq.n	801ae90 <tcp_connect+0x68>
 801ae7c:	4b6f      	ldr	r3, [pc, #444]	@ (801b03c <tcp_connect+0x214>)
 801ae7e:	f44f 6287 	mov.w	r2, #1080	@ 0x438
 801ae82:	4972      	ldr	r1, [pc, #456]	@ (801b04c <tcp_connect+0x224>)
 801ae84:	486f      	ldr	r0, [pc, #444]	@ (801b044 <tcp_connect+0x21c>)
 801ae86:	f00e fb41 	bl	802950c <iprintf>
 801ae8a:	f06f 0309 	mvn.w	r3, #9
 801ae8e:	e0d1      	b.n	801b034 <tcp_connect+0x20c>

  LWIP_DEBUGF(TCP_DEBUG, ("tcp_connect to port %"U16_F"\n", port));
  ip_addr_set(&pcb->remote_ip, ipaddr);
 801ae90:	68bb      	ldr	r3, [r7, #8]
 801ae92:	2b00      	cmp	r3, #0
 801ae94:	d002      	beq.n	801ae9c <tcp_connect+0x74>
 801ae96:	68bb      	ldr	r3, [r7, #8]
 801ae98:	681b      	ldr	r3, [r3, #0]
 801ae9a:	e000      	b.n	801ae9e <tcp_connect+0x76>
 801ae9c:	2300      	movs	r3, #0
 801ae9e:	68fa      	ldr	r2, [r7, #12]
 801aea0:	6053      	str	r3, [r2, #4]
  pcb->remote_port = port;
 801aea2:	68fb      	ldr	r3, [r7, #12]
 801aea4:	88fa      	ldrh	r2, [r7, #6]
 801aea6:	831a      	strh	r2, [r3, #24]

  if (pcb->netif_idx != NETIF_NO_INDEX) {
 801aea8:	68fb      	ldr	r3, [r7, #12]
 801aeaa:	7a1b      	ldrb	r3, [r3, #8]
 801aeac:	2b00      	cmp	r3, #0
 801aeae:	d006      	beq.n	801aebe <tcp_connect+0x96>
    netif = netif_get_by_index(pcb->netif_idx);
 801aeb0:	68fb      	ldr	r3, [r7, #12]
 801aeb2:	7a1b      	ldrb	r3, [r3, #8]
 801aeb4:	4618      	mov	r0, r3
 801aeb6:	f7fe fcf1 	bl	801989c <netif_get_by_index>
 801aeba:	6278      	str	r0, [r7, #36]	@ 0x24
 801aebc:	e005      	b.n	801aeca <tcp_connect+0xa2>
  } else {
    /* check if we have a route to the remote host */
    netif = ip_route(&pcb->local_ip, &pcb->remote_ip);
 801aebe:	68fb      	ldr	r3, [r7, #12]
 801aec0:	3304      	adds	r3, #4
 801aec2:	4618      	mov	r0, r3
 801aec4:	f009 fb14 	bl	80244f0 <ip4_route>
 801aec8:	6278      	str	r0, [r7, #36]	@ 0x24
  }
  if (netif == NULL) {
 801aeca:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801aecc:	2b00      	cmp	r3, #0
 801aece:	d102      	bne.n	801aed6 <tcp_connect+0xae>
    /* Don't even try to send a SYN packet if we have no route since that will fail. */
    return ERR_RTE;
 801aed0:	f06f 0303 	mvn.w	r3, #3
 801aed4:	e0ae      	b.n	801b034 <tcp_connect+0x20c>
  }

  /* check if local IP has been assigned to pcb, if not, get one */
  if (ip_addr_isany(&pcb->local_ip)) {
 801aed6:	68fb      	ldr	r3, [r7, #12]
 801aed8:	2b00      	cmp	r3, #0
 801aeda:	d003      	beq.n	801aee4 <tcp_connect+0xbc>
 801aedc:	68fb      	ldr	r3, [r7, #12]
 801aede:	681b      	ldr	r3, [r3, #0]
 801aee0:	2b00      	cmp	r3, #0
 801aee2:	d111      	bne.n	801af08 <tcp_connect+0xe0>
    const ip_addr_t *local_ip = ip_netif_get_local_ip(netif, ipaddr);
 801aee4:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801aee6:	2b00      	cmp	r3, #0
 801aee8:	d002      	beq.n	801aef0 <tcp_connect+0xc8>
 801aeea:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801aeec:	3304      	adds	r3, #4
 801aeee:	e000      	b.n	801aef2 <tcp_connect+0xca>
 801aef0:	2300      	movs	r3, #0
 801aef2:	61fb      	str	r3, [r7, #28]
    if (local_ip == NULL) {
 801aef4:	69fb      	ldr	r3, [r7, #28]
 801aef6:	2b00      	cmp	r3, #0
 801aef8:	d102      	bne.n	801af00 <tcp_connect+0xd8>
      return ERR_RTE;
 801aefa:	f06f 0303 	mvn.w	r3, #3
 801aefe:	e099      	b.n	801b034 <tcp_connect+0x20c>
    }
    ip_addr_copy(pcb->local_ip, *local_ip);
 801af00:	69fb      	ldr	r3, [r7, #28]
 801af02:	681a      	ldr	r2, [r3, #0]
 801af04:	68fb      	ldr	r3, [r7, #12]
 801af06:	601a      	str	r2, [r3, #0]
      ip6_addr_lacks_zone(ip_2_ip6(&pcb->remote_ip), IP6_UNICAST)) {
    ip6_addr_assign_zone(ip_2_ip6(&pcb->remote_ip), IP6_UNICAST, netif);
  }
#endif /* LWIP_IPV6 && LWIP_IPV6_SCOPES */

  old_local_port = pcb->local_port;
 801af08:	68fb      	ldr	r3, [r7, #12]
 801af0a:	8adb      	ldrh	r3, [r3, #22]
 801af0c:	837b      	strh	r3, [r7, #26]
  if (pcb->local_port == 0) {
 801af0e:	68fb      	ldr	r3, [r7, #12]
 801af10:	8adb      	ldrh	r3, [r3, #22]
 801af12:	2b00      	cmp	r3, #0
 801af14:	d10c      	bne.n	801af30 <tcp_connect+0x108>
    pcb->local_port = tcp_new_port();
 801af16:	f7ff ff41 	bl	801ad9c <tcp_new_port>
 801af1a:	4603      	mov	r3, r0
 801af1c:	461a      	mov	r2, r3
 801af1e:	68fb      	ldr	r3, [r7, #12]
 801af20:	82da      	strh	r2, [r3, #22]
    if (pcb->local_port == 0) {
 801af22:	68fb      	ldr	r3, [r7, #12]
 801af24:	8adb      	ldrh	r3, [r3, #22]
 801af26:	2b00      	cmp	r3, #0
 801af28:	d102      	bne.n	801af30 <tcp_connect+0x108>
      return ERR_BUF;
 801af2a:	f06f 0301 	mvn.w	r3, #1
 801af2e:	e081      	b.n	801b034 <tcp_connect+0x20c>
      }
    }
#endif /* SO_REUSE */
  }

  iss = tcp_next_iss(pcb);
 801af30:	68f8      	ldr	r0, [r7, #12]
 801af32:	f001 f875 	bl	801c020 <tcp_next_iss>
 801af36:	6178      	str	r0, [r7, #20]
  pcb->rcv_nxt = 0;
 801af38:	68fb      	ldr	r3, [r7, #12]
 801af3a:	2200      	movs	r2, #0
 801af3c:	625a      	str	r2, [r3, #36]	@ 0x24
  pcb->snd_nxt = iss;
 801af3e:	68fb      	ldr	r3, [r7, #12]
 801af40:	697a      	ldr	r2, [r7, #20]
 801af42:	651a      	str	r2, [r3, #80]	@ 0x50
  pcb->lastack = iss - 1;
 801af44:	697b      	ldr	r3, [r7, #20]
 801af46:	1e5a      	subs	r2, r3, #1
 801af48:	68fb      	ldr	r3, [r7, #12]
 801af4a:	645a      	str	r2, [r3, #68]	@ 0x44
  pcb->snd_wl2 = iss - 1;
 801af4c:	697b      	ldr	r3, [r7, #20]
 801af4e:	1e5a      	subs	r2, r3, #1
 801af50:	68fb      	ldr	r3, [r7, #12]
 801af52:	659a      	str	r2, [r3, #88]	@ 0x58
  pcb->snd_lbb = iss - 1;
 801af54:	697b      	ldr	r3, [r7, #20]
 801af56:	1e5a      	subs	r2, r3, #1
 801af58:	68fb      	ldr	r3, [r7, #12]
 801af5a:	65da      	str	r2, [r3, #92]	@ 0x5c
  /* Start with a window that does not need scaling. When window scaling is
     enabled and used, the window is enlarged when both sides agree on scaling. */
  pcb->rcv_wnd = pcb->rcv_ann_wnd = TCPWND_MIN16(TCP_WND);
 801af5c:	68fb      	ldr	r3, [r7, #12]
 801af5e:	f241 62d0 	movw	r2, #5840	@ 0x16d0
 801af62:	855a      	strh	r2, [r3, #42]	@ 0x2a
 801af64:	68fb      	ldr	r3, [r7, #12]
 801af66:	8d5a      	ldrh	r2, [r3, #42]	@ 0x2a
 801af68:	68fb      	ldr	r3, [r7, #12]
 801af6a:	851a      	strh	r2, [r3, #40]	@ 0x28
  pcb->rcv_ann_right_edge = pcb->rcv_nxt;
 801af6c:	68fb      	ldr	r3, [r7, #12]
 801af6e:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 801af70:	68fb      	ldr	r3, [r7, #12]
 801af72:	62da      	str	r2, [r3, #44]	@ 0x2c
  pcb->snd_wnd = TCP_WND;
 801af74:	68fb      	ldr	r3, [r7, #12]
 801af76:	f241 62d0 	movw	r2, #5840	@ 0x16d0
 801af7a:	f8a3 2060 	strh.w	r2, [r3, #96]	@ 0x60
  /* As initial send MSS, we use TCP_MSS but limit it to 536.
     The send MSS is updated when an MSS option is received. */
  pcb->mss = INITIAL_MSS;
 801af7e:	68fb      	ldr	r3, [r7, #12]
 801af80:	f44f 7206 	mov.w	r2, #536	@ 0x218
 801af84:	865a      	strh	r2, [r3, #50]	@ 0x32
#if TCP_CALCULATE_EFF_SEND_MSS
  pcb->mss = tcp_eff_send_mss_netif(pcb->mss, netif, &pcb->remote_ip);
 801af86:	68fb      	ldr	r3, [r7, #12]
 801af88:	8e58      	ldrh	r0, [r3, #50]	@ 0x32
 801af8a:	68fb      	ldr	r3, [r7, #12]
 801af8c:	3304      	adds	r3, #4
 801af8e:	461a      	mov	r2, r3
 801af90:	6a79      	ldr	r1, [r7, #36]	@ 0x24
 801af92:	f001 f86b 	bl	801c06c <tcp_eff_send_mss_netif>
 801af96:	4603      	mov	r3, r0
 801af98:	461a      	mov	r2, r3
 801af9a:	68fb      	ldr	r3, [r7, #12]
 801af9c:	865a      	strh	r2, [r3, #50]	@ 0x32
#endif /* TCP_CALCULATE_EFF_SEND_MSS */
  pcb->cwnd = 1;
 801af9e:	68fb      	ldr	r3, [r7, #12]
 801afa0:	2201      	movs	r2, #1
 801afa2:	f8a3 2048 	strh.w	r2, [r3, #72]	@ 0x48
#if LWIP_CALLBACK_API
  pcb->connected = connected;
 801afa6:	68fb      	ldr	r3, [r7, #12]
 801afa8:	683a      	ldr	r2, [r7, #0]
 801afaa:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88
#else /* LWIP_CALLBACK_API */
  LWIP_UNUSED_ARG(connected);
#endif /* LWIP_CALLBACK_API */

  /* Send a SYN together with the MSS option. */
  ret = tcp_enqueue_flags(pcb, TCP_SYN);
 801afae:	2102      	movs	r1, #2
 801afb0:	68f8      	ldr	r0, [r7, #12]
 801afb2:	f004 fb31 	bl	801f618 <tcp_enqueue_flags>
 801afb6:	4603      	mov	r3, r0
 801afb8:	74fb      	strb	r3, [r7, #19]
  if (ret == ERR_OK) {
 801afba:	f997 3013 	ldrsb.w	r3, [r7, #19]
 801afbe:	2b00      	cmp	r3, #0
 801afc0:	d136      	bne.n	801b030 <tcp_connect+0x208>
    /* SYN segment was enqueued, changed the pcbs state now */
    pcb->state = SYN_SENT;
 801afc2:	68fb      	ldr	r3, [r7, #12]
 801afc4:	2202      	movs	r2, #2
 801afc6:	751a      	strb	r2, [r3, #20]
    if (old_local_port != 0) {
 801afc8:	8b7b      	ldrh	r3, [r7, #26]
 801afca:	2b00      	cmp	r3, #0
 801afcc:	d021      	beq.n	801b012 <tcp_connect+0x1ea>
      TCP_RMV(&tcp_bound_pcbs, pcb);
 801afce:	4b20      	ldr	r3, [pc, #128]	@ (801b050 <tcp_connect+0x228>)
 801afd0:	681b      	ldr	r3, [r3, #0]
 801afd2:	68fa      	ldr	r2, [r7, #12]
 801afd4:	429a      	cmp	r2, r3
 801afd6:	d105      	bne.n	801afe4 <tcp_connect+0x1bc>
 801afd8:	4b1d      	ldr	r3, [pc, #116]	@ (801b050 <tcp_connect+0x228>)
 801afda:	681b      	ldr	r3, [r3, #0]
 801afdc:	68db      	ldr	r3, [r3, #12]
 801afde:	4a1c      	ldr	r2, [pc, #112]	@ (801b050 <tcp_connect+0x228>)
 801afe0:	6013      	str	r3, [r2, #0]
 801afe2:	e013      	b.n	801b00c <tcp_connect+0x1e4>
 801afe4:	4b1a      	ldr	r3, [pc, #104]	@ (801b050 <tcp_connect+0x228>)
 801afe6:	681b      	ldr	r3, [r3, #0]
 801afe8:	623b      	str	r3, [r7, #32]
 801afea:	e00c      	b.n	801b006 <tcp_connect+0x1de>
 801afec:	6a3b      	ldr	r3, [r7, #32]
 801afee:	68db      	ldr	r3, [r3, #12]
 801aff0:	68fa      	ldr	r2, [r7, #12]
 801aff2:	429a      	cmp	r2, r3
 801aff4:	d104      	bne.n	801b000 <tcp_connect+0x1d8>
 801aff6:	68fb      	ldr	r3, [r7, #12]
 801aff8:	68da      	ldr	r2, [r3, #12]
 801affa:	6a3b      	ldr	r3, [r7, #32]
 801affc:	60da      	str	r2, [r3, #12]
 801affe:	e005      	b.n	801b00c <tcp_connect+0x1e4>
 801b000:	6a3b      	ldr	r3, [r7, #32]
 801b002:	68db      	ldr	r3, [r3, #12]
 801b004:	623b      	str	r3, [r7, #32]
 801b006:	6a3b      	ldr	r3, [r7, #32]
 801b008:	2b00      	cmp	r3, #0
 801b00a:	d1ef      	bne.n	801afec <tcp_connect+0x1c4>
 801b00c:	68fb      	ldr	r3, [r7, #12]
 801b00e:	2200      	movs	r2, #0
 801b010:	60da      	str	r2, [r3, #12]
    }
    TCP_REG_ACTIVE(pcb);
 801b012:	4b10      	ldr	r3, [pc, #64]	@ (801b054 <tcp_connect+0x22c>)
 801b014:	681a      	ldr	r2, [r3, #0]
 801b016:	68fb      	ldr	r3, [r7, #12]
 801b018:	60da      	str	r2, [r3, #12]
 801b01a:	4a0e      	ldr	r2, [pc, #56]	@ (801b054 <tcp_connect+0x22c>)
 801b01c:	68fb      	ldr	r3, [r7, #12]
 801b01e:	6013      	str	r3, [r2, #0]
 801b020:	f005 fb6c 	bl	80206fc <tcp_timer_needed>
 801b024:	4b0c      	ldr	r3, [pc, #48]	@ (801b058 <tcp_connect+0x230>)
 801b026:	2201      	movs	r2, #1
 801b028:	701a      	strb	r2, [r3, #0]
    MIB2_STATS_INC(mib2.tcpactiveopens);

    tcp_output(pcb);
 801b02a:	68f8      	ldr	r0, [r7, #12]
 801b02c:	f004 fbe2 	bl	801f7f4 <tcp_output>
  }
  return ret;
 801b030:	f997 3013 	ldrsb.w	r3, [r7, #19]
}
 801b034:	4618      	mov	r0, r3
 801b036:	3728      	adds	r7, #40	@ 0x28
 801b038:	46bd      	mov	sp, r7
 801b03a:	bd80      	pop	{r7, pc}
 801b03c:	0802e13c 	.word	0x0802e13c
 801b040:	0802e418 	.word	0x0802e418
 801b044:	0802e180 	.word	0x0802e180
 801b048:	0802e434 	.word	0x0802e434
 801b04c:	0802e450 	.word	0x0802e450
 801b050:	24029ff0 	.word	0x24029ff0
 801b054:	24029ff8 	.word	0x24029ff8
 801b058:	2402a000 	.word	0x2402a000

0801b05c <tcp_slowtmr>:
 *
 * Automatically called from tcp_tmr().
 */
void
tcp_slowtmr(void)
{
 801b05c:	b5b0      	push	{r4, r5, r7, lr}
 801b05e:	b090      	sub	sp, #64	@ 0x40
 801b060:	af04      	add	r7, sp, #16
  tcpwnd_size_t eff_wnd;
  u8_t pcb_remove;      /* flag if a PCB should be removed */
  u8_t pcb_reset;       /* flag if a RST should be sent when removing */
  err_t err;

  err = ERR_OK;
 801b062:	2300      	movs	r3, #0
 801b064:	f887 3025 	strb.w	r3, [r7, #37]	@ 0x25

  ++tcp_ticks;
 801b068:	4b95      	ldr	r3, [pc, #596]	@ (801b2c0 <tcp_slowtmr+0x264>)
 801b06a:	681b      	ldr	r3, [r3, #0]
 801b06c:	3301      	adds	r3, #1
 801b06e:	4a94      	ldr	r2, [pc, #592]	@ (801b2c0 <tcp_slowtmr+0x264>)
 801b070:	6013      	str	r3, [r2, #0]
  ++tcp_timer_ctr;
 801b072:	4b94      	ldr	r3, [pc, #592]	@ (801b2c4 <tcp_slowtmr+0x268>)
 801b074:	781b      	ldrb	r3, [r3, #0]
 801b076:	3301      	adds	r3, #1
 801b078:	b2da      	uxtb	r2, r3
 801b07a:	4b92      	ldr	r3, [pc, #584]	@ (801b2c4 <tcp_slowtmr+0x268>)
 801b07c:	701a      	strb	r2, [r3, #0]
 801b07e:	e000      	b.n	801b082 <tcp_slowtmr+0x26>
        prev->polltmr = 0;
        LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: polling application\n"));
        tcp_active_pcbs_changed = 0;
        TCP_EVENT_POLL(prev, err);
        if (tcp_active_pcbs_changed) {
          goto tcp_slowtmr_start;
 801b080:	bf00      	nop
  prev = NULL;
 801b082:	2300      	movs	r3, #0
 801b084:	62bb      	str	r3, [r7, #40]	@ 0x28
  pcb = tcp_active_pcbs;
 801b086:	4b90      	ldr	r3, [pc, #576]	@ (801b2c8 <tcp_slowtmr+0x26c>)
 801b088:	681b      	ldr	r3, [r3, #0]
 801b08a:	62fb      	str	r3, [r7, #44]	@ 0x2c
  while (pcb != NULL) {
 801b08c:	e29d      	b.n	801b5ca <tcp_slowtmr+0x56e>
    LWIP_ASSERT("tcp_slowtmr: active pcb->state != CLOSED\n", pcb->state != CLOSED);
 801b08e:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b090:	7d1b      	ldrb	r3, [r3, #20]
 801b092:	2b00      	cmp	r3, #0
 801b094:	d106      	bne.n	801b0a4 <tcp_slowtmr+0x48>
 801b096:	4b8d      	ldr	r3, [pc, #564]	@ (801b2cc <tcp_slowtmr+0x270>)
 801b098:	f240 42be 	movw	r2, #1214	@ 0x4be
 801b09c:	498c      	ldr	r1, [pc, #560]	@ (801b2d0 <tcp_slowtmr+0x274>)
 801b09e:	488d      	ldr	r0, [pc, #564]	@ (801b2d4 <tcp_slowtmr+0x278>)
 801b0a0:	f00e fa34 	bl	802950c <iprintf>
    LWIP_ASSERT("tcp_slowtmr: active pcb->state != LISTEN\n", pcb->state != LISTEN);
 801b0a4:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b0a6:	7d1b      	ldrb	r3, [r3, #20]
 801b0a8:	2b01      	cmp	r3, #1
 801b0aa:	d106      	bne.n	801b0ba <tcp_slowtmr+0x5e>
 801b0ac:	4b87      	ldr	r3, [pc, #540]	@ (801b2cc <tcp_slowtmr+0x270>)
 801b0ae:	f240 42bf 	movw	r2, #1215	@ 0x4bf
 801b0b2:	4989      	ldr	r1, [pc, #548]	@ (801b2d8 <tcp_slowtmr+0x27c>)
 801b0b4:	4887      	ldr	r0, [pc, #540]	@ (801b2d4 <tcp_slowtmr+0x278>)
 801b0b6:	f00e fa29 	bl	802950c <iprintf>
    LWIP_ASSERT("tcp_slowtmr: active pcb->state != TIME-WAIT\n", pcb->state != TIME_WAIT);
 801b0ba:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b0bc:	7d1b      	ldrb	r3, [r3, #20]
 801b0be:	2b0a      	cmp	r3, #10
 801b0c0:	d106      	bne.n	801b0d0 <tcp_slowtmr+0x74>
 801b0c2:	4b82      	ldr	r3, [pc, #520]	@ (801b2cc <tcp_slowtmr+0x270>)
 801b0c4:	f44f 6298 	mov.w	r2, #1216	@ 0x4c0
 801b0c8:	4984      	ldr	r1, [pc, #528]	@ (801b2dc <tcp_slowtmr+0x280>)
 801b0ca:	4882      	ldr	r0, [pc, #520]	@ (801b2d4 <tcp_slowtmr+0x278>)
 801b0cc:	f00e fa1e 	bl	802950c <iprintf>
    if (pcb->last_timer == tcp_timer_ctr) {
 801b0d0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b0d2:	7f9a      	ldrb	r2, [r3, #30]
 801b0d4:	4b7b      	ldr	r3, [pc, #492]	@ (801b2c4 <tcp_slowtmr+0x268>)
 801b0d6:	781b      	ldrb	r3, [r3, #0]
 801b0d8:	429a      	cmp	r2, r3
 801b0da:	d105      	bne.n	801b0e8 <tcp_slowtmr+0x8c>
      prev = pcb;
 801b0dc:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b0de:	62bb      	str	r3, [r7, #40]	@ 0x28
      pcb = pcb->next;
 801b0e0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b0e2:	68db      	ldr	r3, [r3, #12]
 801b0e4:	62fb      	str	r3, [r7, #44]	@ 0x2c
      continue;
 801b0e6:	e270      	b.n	801b5ca <tcp_slowtmr+0x56e>
    pcb->last_timer = tcp_timer_ctr;
 801b0e8:	4b76      	ldr	r3, [pc, #472]	@ (801b2c4 <tcp_slowtmr+0x268>)
 801b0ea:	781a      	ldrb	r2, [r3, #0]
 801b0ec:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b0ee:	779a      	strb	r2, [r3, #30]
    pcb_remove = 0;
 801b0f0:	2300      	movs	r3, #0
 801b0f2:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
    pcb_reset = 0;
 801b0f6:	2300      	movs	r3, #0
 801b0f8:	f887 3026 	strb.w	r3, [r7, #38]	@ 0x26
    if (pcb->state == SYN_SENT && pcb->nrtx >= TCP_SYNMAXRTX) {
 801b0fc:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b0fe:	7d1b      	ldrb	r3, [r3, #20]
 801b100:	2b02      	cmp	r3, #2
 801b102:	d10a      	bne.n	801b11a <tcp_slowtmr+0xbe>
 801b104:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b106:	f893 3042 	ldrb.w	r3, [r3, #66]	@ 0x42
 801b10a:	2b05      	cmp	r3, #5
 801b10c:	d905      	bls.n	801b11a <tcp_slowtmr+0xbe>
      ++pcb_remove;
 801b10e:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 801b112:	3301      	adds	r3, #1
 801b114:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
      LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: max SYN retries reached\n"));
 801b118:	e11e      	b.n	801b358 <tcp_slowtmr+0x2fc>
    } else if (pcb->nrtx >= TCP_MAXRTX) {
 801b11a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b11c:	f893 3042 	ldrb.w	r3, [r3, #66]	@ 0x42
 801b120:	2b0b      	cmp	r3, #11
 801b122:	d905      	bls.n	801b130 <tcp_slowtmr+0xd4>
      ++pcb_remove;
 801b124:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 801b128:	3301      	adds	r3, #1
 801b12a:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
 801b12e:	e113      	b.n	801b358 <tcp_slowtmr+0x2fc>
      if (pcb->persist_backoff > 0) {
 801b130:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b132:	f893 3099 	ldrb.w	r3, [r3, #153]	@ 0x99
 801b136:	2b00      	cmp	r3, #0
 801b138:	d075      	beq.n	801b226 <tcp_slowtmr+0x1ca>
        LWIP_ASSERT("tcp_slowtimr: persist ticking with in-flight data", pcb->unacked == NULL);
 801b13a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b13c:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801b13e:	2b00      	cmp	r3, #0
 801b140:	d006      	beq.n	801b150 <tcp_slowtmr+0xf4>
 801b142:	4b62      	ldr	r3, [pc, #392]	@ (801b2cc <tcp_slowtmr+0x270>)
 801b144:	f240 42d4 	movw	r2, #1236	@ 0x4d4
 801b148:	4965      	ldr	r1, [pc, #404]	@ (801b2e0 <tcp_slowtmr+0x284>)
 801b14a:	4862      	ldr	r0, [pc, #392]	@ (801b2d4 <tcp_slowtmr+0x278>)
 801b14c:	f00e f9de 	bl	802950c <iprintf>
        LWIP_ASSERT("tcp_slowtimr: persist ticking with empty send buffer", pcb->unsent != NULL);
 801b150:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b152:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801b154:	2b00      	cmp	r3, #0
 801b156:	d106      	bne.n	801b166 <tcp_slowtmr+0x10a>
 801b158:	4b5c      	ldr	r3, [pc, #368]	@ (801b2cc <tcp_slowtmr+0x270>)
 801b15a:	f240 42d5 	movw	r2, #1237	@ 0x4d5
 801b15e:	4961      	ldr	r1, [pc, #388]	@ (801b2e4 <tcp_slowtmr+0x288>)
 801b160:	485c      	ldr	r0, [pc, #368]	@ (801b2d4 <tcp_slowtmr+0x278>)
 801b162:	f00e f9d3 	bl	802950c <iprintf>
        if (pcb->persist_probe >= TCP_MAXRTX) {
 801b166:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b168:	f893 309a 	ldrb.w	r3, [r3, #154]	@ 0x9a
 801b16c:	2b0b      	cmp	r3, #11
 801b16e:	d905      	bls.n	801b17c <tcp_slowtmr+0x120>
          ++pcb_remove; /* max probes reached */
 801b170:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 801b174:	3301      	adds	r3, #1
 801b176:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
 801b17a:	e0ed      	b.n	801b358 <tcp_slowtmr+0x2fc>
          u8_t backoff_cnt = tcp_persist_backoff[pcb->persist_backoff - 1];
 801b17c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b17e:	f893 3099 	ldrb.w	r3, [r3, #153]	@ 0x99
 801b182:	3b01      	subs	r3, #1
 801b184:	4a58      	ldr	r2, [pc, #352]	@ (801b2e8 <tcp_slowtmr+0x28c>)
 801b186:	5cd3      	ldrb	r3, [r2, r3]
 801b188:	747b      	strb	r3, [r7, #17]
          if (pcb->persist_cnt < backoff_cnt) {
 801b18a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b18c:	f893 3098 	ldrb.w	r3, [r3, #152]	@ 0x98
 801b190:	7c7a      	ldrb	r2, [r7, #17]
 801b192:	429a      	cmp	r2, r3
 801b194:	d907      	bls.n	801b1a6 <tcp_slowtmr+0x14a>
            pcb->persist_cnt++;
 801b196:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b198:	f893 3098 	ldrb.w	r3, [r3, #152]	@ 0x98
 801b19c:	3301      	adds	r3, #1
 801b19e:	b2da      	uxtb	r2, r3
 801b1a0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b1a2:	f883 2098 	strb.w	r2, [r3, #152]	@ 0x98
          if (pcb->persist_cnt >= backoff_cnt) {
 801b1a6:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b1a8:	f893 3098 	ldrb.w	r3, [r3, #152]	@ 0x98
 801b1ac:	7c7a      	ldrb	r2, [r7, #17]
 801b1ae:	429a      	cmp	r2, r3
 801b1b0:	f200 80d2 	bhi.w	801b358 <tcp_slowtmr+0x2fc>
            int next_slot = 1; /* increment timer to next slot */
 801b1b4:	2301      	movs	r3, #1
 801b1b6:	623b      	str	r3, [r7, #32]
            if (pcb->snd_wnd == 0) {
 801b1b8:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b1ba:	f8b3 3060 	ldrh.w	r3, [r3, #96]	@ 0x60
 801b1be:	2b00      	cmp	r3, #0
 801b1c0:	d108      	bne.n	801b1d4 <tcp_slowtmr+0x178>
              if (tcp_zero_window_probe(pcb) != ERR_OK) {
 801b1c2:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 801b1c4:	f005 f9cc 	bl	8020560 <tcp_zero_window_probe>
 801b1c8:	4603      	mov	r3, r0
 801b1ca:	2b00      	cmp	r3, #0
 801b1cc:	d014      	beq.n	801b1f8 <tcp_slowtmr+0x19c>
                next_slot = 0; /* try probe again with current slot */
 801b1ce:	2300      	movs	r3, #0
 801b1d0:	623b      	str	r3, [r7, #32]
 801b1d2:	e011      	b.n	801b1f8 <tcp_slowtmr+0x19c>
              if (tcp_split_unsent_seg(pcb, (u16_t)pcb->snd_wnd) == ERR_OK) {
 801b1d4:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b1d6:	f8b3 3060 	ldrh.w	r3, [r3, #96]	@ 0x60
 801b1da:	4619      	mov	r1, r3
 801b1dc:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 801b1de:	f004 f87f 	bl	801f2e0 <tcp_split_unsent_seg>
 801b1e2:	4603      	mov	r3, r0
 801b1e4:	2b00      	cmp	r3, #0
 801b1e6:	d107      	bne.n	801b1f8 <tcp_slowtmr+0x19c>
                if (tcp_output(pcb) == ERR_OK) {
 801b1e8:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 801b1ea:	f004 fb03 	bl	801f7f4 <tcp_output>
 801b1ee:	4603      	mov	r3, r0
 801b1f0:	2b00      	cmp	r3, #0
 801b1f2:	d101      	bne.n	801b1f8 <tcp_slowtmr+0x19c>
                  next_slot = 0;
 801b1f4:	2300      	movs	r3, #0
 801b1f6:	623b      	str	r3, [r7, #32]
            if (next_slot) {
 801b1f8:	6a3b      	ldr	r3, [r7, #32]
 801b1fa:	2b00      	cmp	r3, #0
 801b1fc:	f000 80ac 	beq.w	801b358 <tcp_slowtmr+0x2fc>
              pcb->persist_cnt = 0;
 801b200:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b202:	2200      	movs	r2, #0
 801b204:	f883 2098 	strb.w	r2, [r3, #152]	@ 0x98
              if (pcb->persist_backoff < sizeof(tcp_persist_backoff)) {
 801b208:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b20a:	f893 3099 	ldrb.w	r3, [r3, #153]	@ 0x99
 801b20e:	2b06      	cmp	r3, #6
 801b210:	f200 80a2 	bhi.w	801b358 <tcp_slowtmr+0x2fc>
                pcb->persist_backoff++;
 801b214:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b216:	f893 3099 	ldrb.w	r3, [r3, #153]	@ 0x99
 801b21a:	3301      	adds	r3, #1
 801b21c:	b2da      	uxtb	r2, r3
 801b21e:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b220:	f883 2099 	strb.w	r2, [r3, #153]	@ 0x99
 801b224:	e098      	b.n	801b358 <tcp_slowtmr+0x2fc>
        if ((pcb->rtime >= 0) && (pcb->rtime < 0x7FFF)) {
 801b226:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b228:	f9b3 3030 	ldrsh.w	r3, [r3, #48]	@ 0x30
 801b22c:	2b00      	cmp	r3, #0
 801b22e:	db0f      	blt.n	801b250 <tcp_slowtmr+0x1f4>
 801b230:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b232:	f9b3 3030 	ldrsh.w	r3, [r3, #48]	@ 0x30
 801b236:	f647 72ff 	movw	r2, #32767	@ 0x7fff
 801b23a:	4293      	cmp	r3, r2
 801b23c:	d008      	beq.n	801b250 <tcp_slowtmr+0x1f4>
          ++pcb->rtime;
 801b23e:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b240:	f9b3 3030 	ldrsh.w	r3, [r3, #48]	@ 0x30
 801b244:	b29b      	uxth	r3, r3
 801b246:	3301      	adds	r3, #1
 801b248:	b29b      	uxth	r3, r3
 801b24a:	b21a      	sxth	r2, r3
 801b24c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b24e:	861a      	strh	r2, [r3, #48]	@ 0x30
        if (pcb->rtime >= pcb->rto) {
 801b250:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b252:	f9b3 2030 	ldrsh.w	r2, [r3, #48]	@ 0x30
 801b256:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b258:	f9b3 3040 	ldrsh.w	r3, [r3, #64]	@ 0x40
 801b25c:	429a      	cmp	r2, r3
 801b25e:	db7b      	blt.n	801b358 <tcp_slowtmr+0x2fc>
          if ((tcp_rexmit_rto_prepare(pcb) == ERR_OK) || ((pcb->unacked == NULL) && (pcb->unsent != NULL))) {
 801b260:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 801b262:	f004 fdbf 	bl	801fde4 <tcp_rexmit_rto_prepare>
 801b266:	4603      	mov	r3, r0
 801b268:	2b00      	cmp	r3, #0
 801b26a:	d007      	beq.n	801b27c <tcp_slowtmr+0x220>
 801b26c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b26e:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801b270:	2b00      	cmp	r3, #0
 801b272:	d171      	bne.n	801b358 <tcp_slowtmr+0x2fc>
 801b274:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b276:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801b278:	2b00      	cmp	r3, #0
 801b27a:	d06d      	beq.n	801b358 <tcp_slowtmr+0x2fc>
            if (pcb->state != SYN_SENT) {
 801b27c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b27e:	7d1b      	ldrb	r3, [r3, #20]
 801b280:	2b02      	cmp	r3, #2
 801b282:	d03a      	beq.n	801b2fa <tcp_slowtmr+0x29e>
              u8_t backoff_idx = LWIP_MIN(pcb->nrtx, sizeof(tcp_backoff) - 1);
 801b284:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b286:	f893 3042 	ldrb.w	r3, [r3, #66]	@ 0x42
 801b28a:	2b0c      	cmp	r3, #12
 801b28c:	bf28      	it	cs
 801b28e:	230c      	movcs	r3, #12
 801b290:	76fb      	strb	r3, [r7, #27]
              int calc_rto = ((pcb->sa >> 3) + pcb->sv) << tcp_backoff[backoff_idx];
 801b292:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b294:	f9b3 303c 	ldrsh.w	r3, [r3, #60]	@ 0x3c
 801b298:	10db      	asrs	r3, r3, #3
 801b29a:	b21b      	sxth	r3, r3
 801b29c:	461a      	mov	r2, r3
 801b29e:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b2a0:	f9b3 303e 	ldrsh.w	r3, [r3, #62]	@ 0x3e
 801b2a4:	4413      	add	r3, r2
 801b2a6:	7efa      	ldrb	r2, [r7, #27]
 801b2a8:	4910      	ldr	r1, [pc, #64]	@ (801b2ec <tcp_slowtmr+0x290>)
 801b2aa:	5c8a      	ldrb	r2, [r1, r2]
 801b2ac:	4093      	lsls	r3, r2
 801b2ae:	617b      	str	r3, [r7, #20]
              pcb->rto = (s16_t)LWIP_MIN(calc_rto, 0x7FFF);
 801b2b0:	697b      	ldr	r3, [r7, #20]
 801b2b2:	f647 72fe 	movw	r2, #32766	@ 0x7ffe
 801b2b6:	4293      	cmp	r3, r2
 801b2b8:	dc1a      	bgt.n	801b2f0 <tcp_slowtmr+0x294>
 801b2ba:	697b      	ldr	r3, [r7, #20]
 801b2bc:	b21a      	sxth	r2, r3
 801b2be:	e019      	b.n	801b2f4 <tcp_slowtmr+0x298>
 801b2c0:	24029fec 	.word	0x24029fec
 801b2c4:	2402a002 	.word	0x2402a002
 801b2c8:	24029ff8 	.word	0x24029ff8
 801b2cc:	0802e13c 	.word	0x0802e13c
 801b2d0:	0802e480 	.word	0x0802e480
 801b2d4:	0802e180 	.word	0x0802e180
 801b2d8:	0802e4ac 	.word	0x0802e4ac
 801b2dc:	0802e4d8 	.word	0x0802e4d8
 801b2e0:	0802e508 	.word	0x0802e508
 801b2e4:	0802e53c 	.word	0x0802e53c
 801b2e8:	08030764 	.word	0x08030764
 801b2ec:	08030754 	.word	0x08030754
 801b2f0:	f647 72ff 	movw	r2, #32767	@ 0x7fff
 801b2f4:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b2f6:	f8a3 2040 	strh.w	r2, [r3, #64]	@ 0x40
            pcb->rtime = 0;
 801b2fa:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b2fc:	2200      	movs	r2, #0
 801b2fe:	861a      	strh	r2, [r3, #48]	@ 0x30
            eff_wnd = LWIP_MIN(pcb->cwnd, pcb->snd_wnd);
 801b300:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b302:	f8b3 2060 	ldrh.w	r2, [r3, #96]	@ 0x60
 801b306:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b308:	f8b3 3048 	ldrh.w	r3, [r3, #72]	@ 0x48
 801b30c:	4293      	cmp	r3, r2
 801b30e:	bf28      	it	cs
 801b310:	4613      	movcs	r3, r2
 801b312:	827b      	strh	r3, [r7, #18]
            pcb->ssthresh = eff_wnd >> 1;
 801b314:	8a7b      	ldrh	r3, [r7, #18]
 801b316:	085b      	lsrs	r3, r3, #1
 801b318:	b29a      	uxth	r2, r3
 801b31a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b31c:	f8a3 204a 	strh.w	r2, [r3, #74]	@ 0x4a
            if (pcb->ssthresh < (tcpwnd_size_t)(pcb->mss << 1)) {
 801b320:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b322:	f8b3 204a 	ldrh.w	r2, [r3, #74]	@ 0x4a
 801b326:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b328:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801b32a:	005b      	lsls	r3, r3, #1
 801b32c:	b29b      	uxth	r3, r3
 801b32e:	429a      	cmp	r2, r3
 801b330:	d206      	bcs.n	801b340 <tcp_slowtmr+0x2e4>
              pcb->ssthresh = (tcpwnd_size_t)(pcb->mss << 1);
 801b332:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b334:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801b336:	005b      	lsls	r3, r3, #1
 801b338:	b29a      	uxth	r2, r3
 801b33a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b33c:	f8a3 204a 	strh.w	r2, [r3, #74]	@ 0x4a
            pcb->cwnd = pcb->mss;
 801b340:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b342:	8e5a      	ldrh	r2, [r3, #50]	@ 0x32
 801b344:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b346:	f8a3 2048 	strh.w	r2, [r3, #72]	@ 0x48
            pcb->bytes_acked = 0;
 801b34a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b34c:	2200      	movs	r2, #0
 801b34e:	f8a3 206a 	strh.w	r2, [r3, #106]	@ 0x6a
            tcp_rexmit_rto_commit(pcb);
 801b352:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 801b354:	f004 fdc0 	bl	801fed8 <tcp_rexmit_rto_commit>
    if (pcb->state == FIN_WAIT_2) {
 801b358:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b35a:	7d1b      	ldrb	r3, [r3, #20]
 801b35c:	2b06      	cmp	r3, #6
 801b35e:	d111      	bne.n	801b384 <tcp_slowtmr+0x328>
      if (pcb->flags & TF_RXCLOSED) {
 801b360:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b362:	8b5b      	ldrh	r3, [r3, #26]
 801b364:	f003 0310 	and.w	r3, r3, #16
 801b368:	2b00      	cmp	r3, #0
 801b36a:	d00b      	beq.n	801b384 <tcp_slowtmr+0x328>
        if ((u32_t)(tcp_ticks - pcb->tmr) >
 801b36c:	4b9c      	ldr	r3, [pc, #624]	@ (801b5e0 <tcp_slowtmr+0x584>)
 801b36e:	681a      	ldr	r2, [r3, #0]
 801b370:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b372:	6a1b      	ldr	r3, [r3, #32]
 801b374:	1ad3      	subs	r3, r2, r3
 801b376:	2b28      	cmp	r3, #40	@ 0x28
 801b378:	d904      	bls.n	801b384 <tcp_slowtmr+0x328>
          ++pcb_remove;
 801b37a:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 801b37e:	3301      	adds	r3, #1
 801b380:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
    if (ip_get_option(pcb, SOF_KEEPALIVE) &&
 801b384:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b386:	7a5b      	ldrb	r3, [r3, #9]
 801b388:	f003 0308 	and.w	r3, r3, #8
 801b38c:	2b00      	cmp	r3, #0
 801b38e:	d04a      	beq.n	801b426 <tcp_slowtmr+0x3ca>
        ((pcb->state == ESTABLISHED) ||
 801b390:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b392:	7d1b      	ldrb	r3, [r3, #20]
    if (ip_get_option(pcb, SOF_KEEPALIVE) &&
 801b394:	2b04      	cmp	r3, #4
 801b396:	d003      	beq.n	801b3a0 <tcp_slowtmr+0x344>
         (pcb->state == CLOSE_WAIT))) {
 801b398:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b39a:	7d1b      	ldrb	r3, [r3, #20]
        ((pcb->state == ESTABLISHED) ||
 801b39c:	2b07      	cmp	r3, #7
 801b39e:	d142      	bne.n	801b426 <tcp_slowtmr+0x3ca>
      if ((u32_t)(tcp_ticks - pcb->tmr) >
 801b3a0:	4b8f      	ldr	r3, [pc, #572]	@ (801b5e0 <tcp_slowtmr+0x584>)
 801b3a2:	681a      	ldr	r2, [r3, #0]
 801b3a4:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b3a6:	6a1b      	ldr	r3, [r3, #32]
 801b3a8:	1ad2      	subs	r2, r2, r3
          (pcb->keep_idle + TCP_KEEP_DUR(pcb)) / TCP_SLOW_INTERVAL) {
 801b3aa:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b3ac:	f8d3 1094 	ldr.w	r1, [r3, #148]	@ 0x94
 801b3b0:	4b8c      	ldr	r3, [pc, #560]	@ (801b5e4 <tcp_slowtmr+0x588>)
 801b3b2:	440b      	add	r3, r1
 801b3b4:	498c      	ldr	r1, [pc, #560]	@ (801b5e8 <tcp_slowtmr+0x58c>)
 801b3b6:	fba1 1303 	umull	r1, r3, r1, r3
 801b3ba:	095b      	lsrs	r3, r3, #5
      if ((u32_t)(tcp_ticks - pcb->tmr) >
 801b3bc:	429a      	cmp	r2, r3
 801b3be:	d90a      	bls.n	801b3d6 <tcp_slowtmr+0x37a>
        ++pcb_remove;
 801b3c0:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 801b3c4:	3301      	adds	r3, #1
 801b3c6:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
        ++pcb_reset;
 801b3ca:	f897 3026 	ldrb.w	r3, [r7, #38]	@ 0x26
 801b3ce:	3301      	adds	r3, #1
 801b3d0:	f887 3026 	strb.w	r3, [r7, #38]	@ 0x26
 801b3d4:	e027      	b.n	801b426 <tcp_slowtmr+0x3ca>
      } else if ((u32_t)(tcp_ticks - pcb->tmr) >
 801b3d6:	4b82      	ldr	r3, [pc, #520]	@ (801b5e0 <tcp_slowtmr+0x584>)
 801b3d8:	681a      	ldr	r2, [r3, #0]
 801b3da:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b3dc:	6a1b      	ldr	r3, [r3, #32]
 801b3de:	1ad2      	subs	r2, r2, r3
                 (pcb->keep_idle + pcb->keep_cnt_sent * TCP_KEEP_INTVL(pcb))
 801b3e0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b3e2:	f8d3 1094 	ldr.w	r1, [r3, #148]	@ 0x94
 801b3e6:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b3e8:	f893 309b 	ldrb.w	r3, [r3, #155]	@ 0x9b
 801b3ec:	4618      	mov	r0, r3
 801b3ee:	4b7f      	ldr	r3, [pc, #508]	@ (801b5ec <tcp_slowtmr+0x590>)
 801b3f0:	fb00 f303 	mul.w	r3, r0, r3
 801b3f4:	440b      	add	r3, r1
                 / TCP_SLOW_INTERVAL) {
 801b3f6:	497c      	ldr	r1, [pc, #496]	@ (801b5e8 <tcp_slowtmr+0x58c>)
 801b3f8:	fba1 1303 	umull	r1, r3, r1, r3
 801b3fc:	095b      	lsrs	r3, r3, #5
      } else if ((u32_t)(tcp_ticks - pcb->tmr) >
 801b3fe:	429a      	cmp	r2, r3
 801b400:	d911      	bls.n	801b426 <tcp_slowtmr+0x3ca>
        err = tcp_keepalive(pcb);
 801b402:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 801b404:	f005 f86c 	bl	80204e0 <tcp_keepalive>
 801b408:	4603      	mov	r3, r0
 801b40a:	f887 3025 	strb.w	r3, [r7, #37]	@ 0x25
        if (err == ERR_OK) {
 801b40e:	f997 3025 	ldrsb.w	r3, [r7, #37]	@ 0x25
 801b412:	2b00      	cmp	r3, #0
 801b414:	d107      	bne.n	801b426 <tcp_slowtmr+0x3ca>
          pcb->keep_cnt_sent++;
 801b416:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b418:	f893 309b 	ldrb.w	r3, [r3, #155]	@ 0x9b
 801b41c:	3301      	adds	r3, #1
 801b41e:	b2da      	uxtb	r2, r3
 801b420:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b422:	f883 209b 	strb.w	r2, [r3, #155]	@ 0x9b
    if (pcb->ooseq != NULL &&
 801b426:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b428:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801b42a:	2b00      	cmp	r3, #0
 801b42c:	d011      	beq.n	801b452 <tcp_slowtmr+0x3f6>
        (tcp_ticks - pcb->tmr >= (u32_t)pcb->rto * TCP_OOSEQ_TIMEOUT)) {
 801b42e:	4b6c      	ldr	r3, [pc, #432]	@ (801b5e0 <tcp_slowtmr+0x584>)
 801b430:	681a      	ldr	r2, [r3, #0]
 801b432:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b434:	6a1b      	ldr	r3, [r3, #32]
 801b436:	1ad2      	subs	r2, r2, r3
 801b438:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b43a:	f9b3 3040 	ldrsh.w	r3, [r3, #64]	@ 0x40
 801b43e:	4619      	mov	r1, r3
 801b440:	460b      	mov	r3, r1
 801b442:	005b      	lsls	r3, r3, #1
 801b444:	440b      	add	r3, r1
 801b446:	005b      	lsls	r3, r3, #1
    if (pcb->ooseq != NULL &&
 801b448:	429a      	cmp	r2, r3
 801b44a:	d302      	bcc.n	801b452 <tcp_slowtmr+0x3f6>
      tcp_free_ooseq(pcb);
 801b44c:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 801b44e:	f000 feb7 	bl	801c1c0 <tcp_free_ooseq>
    if (pcb->state == SYN_RCVD) {
 801b452:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b454:	7d1b      	ldrb	r3, [r3, #20]
 801b456:	2b03      	cmp	r3, #3
 801b458:	d10b      	bne.n	801b472 <tcp_slowtmr+0x416>
      if ((u32_t)(tcp_ticks - pcb->tmr) >
 801b45a:	4b61      	ldr	r3, [pc, #388]	@ (801b5e0 <tcp_slowtmr+0x584>)
 801b45c:	681a      	ldr	r2, [r3, #0]
 801b45e:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b460:	6a1b      	ldr	r3, [r3, #32]
 801b462:	1ad3      	subs	r3, r2, r3
 801b464:	2b28      	cmp	r3, #40	@ 0x28
 801b466:	d904      	bls.n	801b472 <tcp_slowtmr+0x416>
        ++pcb_remove;
 801b468:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 801b46c:	3301      	adds	r3, #1
 801b46e:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
    if (pcb->state == LAST_ACK) {
 801b472:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b474:	7d1b      	ldrb	r3, [r3, #20]
 801b476:	2b09      	cmp	r3, #9
 801b478:	d10b      	bne.n	801b492 <tcp_slowtmr+0x436>
      if ((u32_t)(tcp_ticks - pcb->tmr) > 2 * TCP_MSL / TCP_SLOW_INTERVAL) {
 801b47a:	4b59      	ldr	r3, [pc, #356]	@ (801b5e0 <tcp_slowtmr+0x584>)
 801b47c:	681a      	ldr	r2, [r3, #0]
 801b47e:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b480:	6a1b      	ldr	r3, [r3, #32]
 801b482:	1ad3      	subs	r3, r2, r3
 801b484:	2bf0      	cmp	r3, #240	@ 0xf0
 801b486:	d904      	bls.n	801b492 <tcp_slowtmr+0x436>
        ++pcb_remove;
 801b488:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 801b48c:	3301      	adds	r3, #1
 801b48e:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
    if (pcb_remove) {
 801b492:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 801b496:	2b00      	cmp	r3, #0
 801b498:	d060      	beq.n	801b55c <tcp_slowtmr+0x500>
      tcp_err_fn err_fn = pcb->errf;
 801b49a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b49c:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 801b4a0:	60fb      	str	r3, [r7, #12]
      tcp_pcb_purge(pcb);
 801b4a2:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 801b4a4:	f000 fcd8 	bl	801be58 <tcp_pcb_purge>
      if (prev != NULL) {
 801b4a8:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801b4aa:	2b00      	cmp	r3, #0
 801b4ac:	d010      	beq.n	801b4d0 <tcp_slowtmr+0x474>
        LWIP_ASSERT("tcp_slowtmr: middle tcp != tcp_active_pcbs", pcb != tcp_active_pcbs);
 801b4ae:	4b50      	ldr	r3, [pc, #320]	@ (801b5f0 <tcp_slowtmr+0x594>)
 801b4b0:	681b      	ldr	r3, [r3, #0]
 801b4b2:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 801b4b4:	429a      	cmp	r2, r3
 801b4b6:	d106      	bne.n	801b4c6 <tcp_slowtmr+0x46a>
 801b4b8:	4b4e      	ldr	r3, [pc, #312]	@ (801b5f4 <tcp_slowtmr+0x598>)
 801b4ba:	f240 526d 	movw	r2, #1389	@ 0x56d
 801b4be:	494e      	ldr	r1, [pc, #312]	@ (801b5f8 <tcp_slowtmr+0x59c>)
 801b4c0:	484e      	ldr	r0, [pc, #312]	@ (801b5fc <tcp_slowtmr+0x5a0>)
 801b4c2:	f00e f823 	bl	802950c <iprintf>
        prev->next = pcb->next;
 801b4c6:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b4c8:	68da      	ldr	r2, [r3, #12]
 801b4ca:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801b4cc:	60da      	str	r2, [r3, #12]
 801b4ce:	e00f      	b.n	801b4f0 <tcp_slowtmr+0x494>
        LWIP_ASSERT("tcp_slowtmr: first pcb == tcp_active_pcbs", tcp_active_pcbs == pcb);
 801b4d0:	4b47      	ldr	r3, [pc, #284]	@ (801b5f0 <tcp_slowtmr+0x594>)
 801b4d2:	681b      	ldr	r3, [r3, #0]
 801b4d4:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 801b4d6:	429a      	cmp	r2, r3
 801b4d8:	d006      	beq.n	801b4e8 <tcp_slowtmr+0x48c>
 801b4da:	4b46      	ldr	r3, [pc, #280]	@ (801b5f4 <tcp_slowtmr+0x598>)
 801b4dc:	f240 5271 	movw	r2, #1393	@ 0x571
 801b4e0:	4947      	ldr	r1, [pc, #284]	@ (801b600 <tcp_slowtmr+0x5a4>)
 801b4e2:	4846      	ldr	r0, [pc, #280]	@ (801b5fc <tcp_slowtmr+0x5a0>)
 801b4e4:	f00e f812 	bl	802950c <iprintf>
        tcp_active_pcbs = pcb->next;
 801b4e8:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b4ea:	68db      	ldr	r3, [r3, #12]
 801b4ec:	4a40      	ldr	r2, [pc, #256]	@ (801b5f0 <tcp_slowtmr+0x594>)
 801b4ee:	6013      	str	r3, [r2, #0]
      if (pcb_reset) {
 801b4f0:	f897 3026 	ldrb.w	r3, [r7, #38]	@ 0x26
 801b4f4:	2b00      	cmp	r3, #0
 801b4f6:	d013      	beq.n	801b520 <tcp_slowtmr+0x4c4>
        tcp_rst(pcb, pcb->snd_nxt, pcb->rcv_nxt, &pcb->local_ip, &pcb->remote_ip,
 801b4f8:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b4fa:	6d18      	ldr	r0, [r3, #80]	@ 0x50
 801b4fc:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b4fe:	6a5c      	ldr	r4, [r3, #36]	@ 0x24
 801b500:	6afd      	ldr	r5, [r7, #44]	@ 0x2c
 801b502:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b504:	3304      	adds	r3, #4
 801b506:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 801b508:	8ad2      	ldrh	r2, [r2, #22]
 801b50a:	6af9      	ldr	r1, [r7, #44]	@ 0x2c
 801b50c:	8b09      	ldrh	r1, [r1, #24]
 801b50e:	9102      	str	r1, [sp, #8]
 801b510:	9201      	str	r2, [sp, #4]
 801b512:	9300      	str	r3, [sp, #0]
 801b514:	462b      	mov	r3, r5
 801b516:	4622      	mov	r2, r4
 801b518:	4601      	mov	r1, r0
 801b51a:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 801b51c:	f004 ff2c 	bl	8020378 <tcp_rst>
      err_arg = pcb->callback_arg;
 801b520:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b522:	691b      	ldr	r3, [r3, #16]
 801b524:	60bb      	str	r3, [r7, #8]
      last_state = pcb->state;
 801b526:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b528:	7d1b      	ldrb	r3, [r3, #20]
 801b52a:	71fb      	strb	r3, [r7, #7]
      pcb2 = pcb;
 801b52c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b52e:	603b      	str	r3, [r7, #0]
      pcb = pcb->next;
 801b530:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b532:	68db      	ldr	r3, [r3, #12]
 801b534:	62fb      	str	r3, [r7, #44]	@ 0x2c
      tcp_free(pcb2);
 801b536:	6838      	ldr	r0, [r7, #0]
 801b538:	f7ff f82c 	bl	801a594 <tcp_free>
      tcp_active_pcbs_changed = 0;
 801b53c:	4b31      	ldr	r3, [pc, #196]	@ (801b604 <tcp_slowtmr+0x5a8>)
 801b53e:	2200      	movs	r2, #0
 801b540:	701a      	strb	r2, [r3, #0]
      TCP_EVENT_ERR(last_state, err_fn, err_arg, ERR_ABRT);
 801b542:	68fb      	ldr	r3, [r7, #12]
 801b544:	2b00      	cmp	r3, #0
 801b546:	d004      	beq.n	801b552 <tcp_slowtmr+0x4f6>
 801b548:	68fb      	ldr	r3, [r7, #12]
 801b54a:	f06f 010c 	mvn.w	r1, #12
 801b54e:	68b8      	ldr	r0, [r7, #8]
 801b550:	4798      	blx	r3
      if (tcp_active_pcbs_changed) {
 801b552:	4b2c      	ldr	r3, [pc, #176]	@ (801b604 <tcp_slowtmr+0x5a8>)
 801b554:	781b      	ldrb	r3, [r3, #0]
 801b556:	2b00      	cmp	r3, #0
 801b558:	d037      	beq.n	801b5ca <tcp_slowtmr+0x56e>
        goto tcp_slowtmr_start;
 801b55a:	e592      	b.n	801b082 <tcp_slowtmr+0x26>
      prev = pcb;
 801b55c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b55e:	62bb      	str	r3, [r7, #40]	@ 0x28
      pcb = pcb->next;
 801b560:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b562:	68db      	ldr	r3, [r3, #12]
 801b564:	62fb      	str	r3, [r7, #44]	@ 0x2c
      ++prev->polltmr;
 801b566:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801b568:	7f1b      	ldrb	r3, [r3, #28]
 801b56a:	3301      	adds	r3, #1
 801b56c:	b2da      	uxtb	r2, r3
 801b56e:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801b570:	771a      	strb	r2, [r3, #28]
      if (prev->polltmr >= prev->pollinterval) {
 801b572:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801b574:	7f1a      	ldrb	r2, [r3, #28]
 801b576:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801b578:	7f5b      	ldrb	r3, [r3, #29]
 801b57a:	429a      	cmp	r2, r3
 801b57c:	d325      	bcc.n	801b5ca <tcp_slowtmr+0x56e>
        prev->polltmr = 0;
 801b57e:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801b580:	2200      	movs	r2, #0
 801b582:	771a      	strb	r2, [r3, #28]
        tcp_active_pcbs_changed = 0;
 801b584:	4b1f      	ldr	r3, [pc, #124]	@ (801b604 <tcp_slowtmr+0x5a8>)
 801b586:	2200      	movs	r2, #0
 801b588:	701a      	strb	r2, [r3, #0]
        TCP_EVENT_POLL(prev, err);
 801b58a:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801b58c:	f8d3 308c 	ldr.w	r3, [r3, #140]	@ 0x8c
 801b590:	2b00      	cmp	r3, #0
 801b592:	d00b      	beq.n	801b5ac <tcp_slowtmr+0x550>
 801b594:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801b596:	f8d3 308c 	ldr.w	r3, [r3, #140]	@ 0x8c
 801b59a:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 801b59c:	6912      	ldr	r2, [r2, #16]
 801b59e:	6ab9      	ldr	r1, [r7, #40]	@ 0x28
 801b5a0:	4610      	mov	r0, r2
 801b5a2:	4798      	blx	r3
 801b5a4:	4603      	mov	r3, r0
 801b5a6:	f887 3025 	strb.w	r3, [r7, #37]	@ 0x25
 801b5aa:	e002      	b.n	801b5b2 <tcp_slowtmr+0x556>
 801b5ac:	2300      	movs	r3, #0
 801b5ae:	f887 3025 	strb.w	r3, [r7, #37]	@ 0x25
        if (tcp_active_pcbs_changed) {
 801b5b2:	4b14      	ldr	r3, [pc, #80]	@ (801b604 <tcp_slowtmr+0x5a8>)
 801b5b4:	781b      	ldrb	r3, [r3, #0]
 801b5b6:	2b00      	cmp	r3, #0
 801b5b8:	f47f ad62 	bne.w	801b080 <tcp_slowtmr+0x24>
        }
        /* if err == ERR_ABRT, 'prev' is already deallocated */
        if (err == ERR_OK) {
 801b5bc:	f997 3025 	ldrsb.w	r3, [r7, #37]	@ 0x25
 801b5c0:	2b00      	cmp	r3, #0
 801b5c2:	d102      	bne.n	801b5ca <tcp_slowtmr+0x56e>
          tcp_output(prev);
 801b5c4:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 801b5c6:	f004 f915 	bl	801f7f4 <tcp_output>
  while (pcb != NULL) {
 801b5ca:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b5cc:	2b00      	cmp	r3, #0
 801b5ce:	f47f ad5e 	bne.w	801b08e <tcp_slowtmr+0x32>
    }
  }


  /* Steps through all of the TIME-WAIT PCBs. */
  prev = NULL;
 801b5d2:	2300      	movs	r3, #0
 801b5d4:	62bb      	str	r3, [r7, #40]	@ 0x28
  pcb = tcp_tw_pcbs;
 801b5d6:	4b0c      	ldr	r3, [pc, #48]	@ (801b608 <tcp_slowtmr+0x5ac>)
 801b5d8:	681b      	ldr	r3, [r3, #0]
 801b5da:	62fb      	str	r3, [r7, #44]	@ 0x2c
  while (pcb != NULL) {
 801b5dc:	e069      	b.n	801b6b2 <tcp_slowtmr+0x656>
 801b5de:	bf00      	nop
 801b5e0:	24029fec 	.word	0x24029fec
 801b5e4:	000a4cb8 	.word	0x000a4cb8
 801b5e8:	10624dd3 	.word	0x10624dd3
 801b5ec:	000124f8 	.word	0x000124f8
 801b5f0:	24029ff8 	.word	0x24029ff8
 801b5f4:	0802e13c 	.word	0x0802e13c
 801b5f8:	0802e574 	.word	0x0802e574
 801b5fc:	0802e180 	.word	0x0802e180
 801b600:	0802e5a0 	.word	0x0802e5a0
 801b604:	2402a000 	.word	0x2402a000
 801b608:	24029ffc 	.word	0x24029ffc
    LWIP_ASSERT("tcp_slowtmr: TIME-WAIT pcb->state == TIME-WAIT", pcb->state == TIME_WAIT);
 801b60c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b60e:	7d1b      	ldrb	r3, [r3, #20]
 801b610:	2b0a      	cmp	r3, #10
 801b612:	d006      	beq.n	801b622 <tcp_slowtmr+0x5c6>
 801b614:	4b2b      	ldr	r3, [pc, #172]	@ (801b6c4 <tcp_slowtmr+0x668>)
 801b616:	f240 52a1 	movw	r2, #1441	@ 0x5a1
 801b61a:	492b      	ldr	r1, [pc, #172]	@ (801b6c8 <tcp_slowtmr+0x66c>)
 801b61c:	482b      	ldr	r0, [pc, #172]	@ (801b6cc <tcp_slowtmr+0x670>)
 801b61e:	f00d ff75 	bl	802950c <iprintf>
    pcb_remove = 0;
 801b622:	2300      	movs	r3, #0
 801b624:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27

    /* Check if this PCB has stayed long enough in TIME-WAIT */
    if ((u32_t)(tcp_ticks - pcb->tmr) > 2 * TCP_MSL / TCP_SLOW_INTERVAL) {
 801b628:	4b29      	ldr	r3, [pc, #164]	@ (801b6d0 <tcp_slowtmr+0x674>)
 801b62a:	681a      	ldr	r2, [r3, #0]
 801b62c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b62e:	6a1b      	ldr	r3, [r3, #32]
 801b630:	1ad3      	subs	r3, r2, r3
 801b632:	2bf0      	cmp	r3, #240	@ 0xf0
 801b634:	d904      	bls.n	801b640 <tcp_slowtmr+0x5e4>
      ++pcb_remove;
 801b636:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 801b63a:	3301      	adds	r3, #1
 801b63c:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
    }

    /* If the PCB should be removed, do it. */
    if (pcb_remove) {
 801b640:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 801b644:	2b00      	cmp	r3, #0
 801b646:	d02f      	beq.n	801b6a8 <tcp_slowtmr+0x64c>
      struct tcp_pcb *pcb2;
      tcp_pcb_purge(pcb);
 801b648:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 801b64a:	f000 fc05 	bl	801be58 <tcp_pcb_purge>
      /* Remove PCB from tcp_tw_pcbs list. */
      if (prev != NULL) {
 801b64e:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801b650:	2b00      	cmp	r3, #0
 801b652:	d010      	beq.n	801b676 <tcp_slowtmr+0x61a>
        LWIP_ASSERT("tcp_slowtmr: middle tcp != tcp_tw_pcbs", pcb != tcp_tw_pcbs);
 801b654:	4b1f      	ldr	r3, [pc, #124]	@ (801b6d4 <tcp_slowtmr+0x678>)
 801b656:	681b      	ldr	r3, [r3, #0]
 801b658:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 801b65a:	429a      	cmp	r2, r3
 801b65c:	d106      	bne.n	801b66c <tcp_slowtmr+0x610>
 801b65e:	4b19      	ldr	r3, [pc, #100]	@ (801b6c4 <tcp_slowtmr+0x668>)
 801b660:	f240 52af 	movw	r2, #1455	@ 0x5af
 801b664:	491c      	ldr	r1, [pc, #112]	@ (801b6d8 <tcp_slowtmr+0x67c>)
 801b666:	4819      	ldr	r0, [pc, #100]	@ (801b6cc <tcp_slowtmr+0x670>)
 801b668:	f00d ff50 	bl	802950c <iprintf>
        prev->next = pcb->next;
 801b66c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b66e:	68da      	ldr	r2, [r3, #12]
 801b670:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801b672:	60da      	str	r2, [r3, #12]
 801b674:	e00f      	b.n	801b696 <tcp_slowtmr+0x63a>
      } else {
        /* This PCB was the first. */
        LWIP_ASSERT("tcp_slowtmr: first pcb == tcp_tw_pcbs", tcp_tw_pcbs == pcb);
 801b676:	4b17      	ldr	r3, [pc, #92]	@ (801b6d4 <tcp_slowtmr+0x678>)
 801b678:	681b      	ldr	r3, [r3, #0]
 801b67a:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 801b67c:	429a      	cmp	r2, r3
 801b67e:	d006      	beq.n	801b68e <tcp_slowtmr+0x632>
 801b680:	4b10      	ldr	r3, [pc, #64]	@ (801b6c4 <tcp_slowtmr+0x668>)
 801b682:	f240 52b3 	movw	r2, #1459	@ 0x5b3
 801b686:	4915      	ldr	r1, [pc, #84]	@ (801b6dc <tcp_slowtmr+0x680>)
 801b688:	4810      	ldr	r0, [pc, #64]	@ (801b6cc <tcp_slowtmr+0x670>)
 801b68a:	f00d ff3f 	bl	802950c <iprintf>
        tcp_tw_pcbs = pcb->next;
 801b68e:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b690:	68db      	ldr	r3, [r3, #12]
 801b692:	4a10      	ldr	r2, [pc, #64]	@ (801b6d4 <tcp_slowtmr+0x678>)
 801b694:	6013      	str	r3, [r2, #0]
      }
      pcb2 = pcb;
 801b696:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b698:	61fb      	str	r3, [r7, #28]
      pcb = pcb->next;
 801b69a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b69c:	68db      	ldr	r3, [r3, #12]
 801b69e:	62fb      	str	r3, [r7, #44]	@ 0x2c
      tcp_free(pcb2);
 801b6a0:	69f8      	ldr	r0, [r7, #28]
 801b6a2:	f7fe ff77 	bl	801a594 <tcp_free>
 801b6a6:	e004      	b.n	801b6b2 <tcp_slowtmr+0x656>
    } else {
      prev = pcb;
 801b6a8:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b6aa:	62bb      	str	r3, [r7, #40]	@ 0x28
      pcb = pcb->next;
 801b6ac:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b6ae:	68db      	ldr	r3, [r3, #12]
 801b6b0:	62fb      	str	r3, [r7, #44]	@ 0x2c
  while (pcb != NULL) {
 801b6b2:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801b6b4:	2b00      	cmp	r3, #0
 801b6b6:	d1a9      	bne.n	801b60c <tcp_slowtmr+0x5b0>
    }
  }
}
 801b6b8:	bf00      	nop
 801b6ba:	bf00      	nop
 801b6bc:	3730      	adds	r7, #48	@ 0x30
 801b6be:	46bd      	mov	sp, r7
 801b6c0:	bdb0      	pop	{r4, r5, r7, pc}
 801b6c2:	bf00      	nop
 801b6c4:	0802e13c 	.word	0x0802e13c
 801b6c8:	0802e5cc 	.word	0x0802e5cc
 801b6cc:	0802e180 	.word	0x0802e180
 801b6d0:	24029fec 	.word	0x24029fec
 801b6d4:	24029ffc 	.word	0x24029ffc
 801b6d8:	0802e5fc 	.word	0x0802e5fc
 801b6dc:	0802e624 	.word	0x0802e624

0801b6e0 <tcp_fasttmr>:
 *
 * Automatically called from tcp_tmr().
 */
void
tcp_fasttmr(void)
{
 801b6e0:	b580      	push	{r7, lr}
 801b6e2:	b082      	sub	sp, #8
 801b6e4:	af00      	add	r7, sp, #0
  struct tcp_pcb *pcb;

  ++tcp_timer_ctr;
 801b6e6:	4b2d      	ldr	r3, [pc, #180]	@ (801b79c <tcp_fasttmr+0xbc>)
 801b6e8:	781b      	ldrb	r3, [r3, #0]
 801b6ea:	3301      	adds	r3, #1
 801b6ec:	b2da      	uxtb	r2, r3
 801b6ee:	4b2b      	ldr	r3, [pc, #172]	@ (801b79c <tcp_fasttmr+0xbc>)
 801b6f0:	701a      	strb	r2, [r3, #0]

tcp_fasttmr_start:
  pcb = tcp_active_pcbs;
 801b6f2:	4b2b      	ldr	r3, [pc, #172]	@ (801b7a0 <tcp_fasttmr+0xc0>)
 801b6f4:	681b      	ldr	r3, [r3, #0]
 801b6f6:	607b      	str	r3, [r7, #4]

  while (pcb != NULL) {
 801b6f8:	e048      	b.n	801b78c <tcp_fasttmr+0xac>
    if (pcb->last_timer != tcp_timer_ctr) {
 801b6fa:	687b      	ldr	r3, [r7, #4]
 801b6fc:	7f9a      	ldrb	r2, [r3, #30]
 801b6fe:	4b27      	ldr	r3, [pc, #156]	@ (801b79c <tcp_fasttmr+0xbc>)
 801b700:	781b      	ldrb	r3, [r3, #0]
 801b702:	429a      	cmp	r2, r3
 801b704:	d03f      	beq.n	801b786 <tcp_fasttmr+0xa6>
      struct tcp_pcb *next;
      pcb->last_timer = tcp_timer_ctr;
 801b706:	4b25      	ldr	r3, [pc, #148]	@ (801b79c <tcp_fasttmr+0xbc>)
 801b708:	781a      	ldrb	r2, [r3, #0]
 801b70a:	687b      	ldr	r3, [r7, #4]
 801b70c:	779a      	strb	r2, [r3, #30]
      /* send delayed ACKs */
      if (pcb->flags & TF_ACK_DELAY) {
 801b70e:	687b      	ldr	r3, [r7, #4]
 801b710:	8b5b      	ldrh	r3, [r3, #26]
 801b712:	f003 0301 	and.w	r3, r3, #1
 801b716:	2b00      	cmp	r3, #0
 801b718:	d010      	beq.n	801b73c <tcp_fasttmr+0x5c>
        LWIP_DEBUGF(TCP_DEBUG, ("tcp_fasttmr: delayed ACK\n"));
        tcp_ack_now(pcb);
 801b71a:	687b      	ldr	r3, [r7, #4]
 801b71c:	8b5b      	ldrh	r3, [r3, #26]
 801b71e:	f043 0302 	orr.w	r3, r3, #2
 801b722:	b29a      	uxth	r2, r3
 801b724:	687b      	ldr	r3, [r7, #4]
 801b726:	835a      	strh	r2, [r3, #26]
        tcp_output(pcb);
 801b728:	6878      	ldr	r0, [r7, #4]
 801b72a:	f004 f863 	bl	801f7f4 <tcp_output>
        tcp_clear_flags(pcb, TF_ACK_DELAY | TF_ACK_NOW);
 801b72e:	687b      	ldr	r3, [r7, #4]
 801b730:	8b5b      	ldrh	r3, [r3, #26]
 801b732:	f023 0303 	bic.w	r3, r3, #3
 801b736:	b29a      	uxth	r2, r3
 801b738:	687b      	ldr	r3, [r7, #4]
 801b73a:	835a      	strh	r2, [r3, #26]
      }
      /* send pending FIN */
      if (pcb->flags & TF_CLOSEPEND) {
 801b73c:	687b      	ldr	r3, [r7, #4]
 801b73e:	8b5b      	ldrh	r3, [r3, #26]
 801b740:	f003 0308 	and.w	r3, r3, #8
 801b744:	2b00      	cmp	r3, #0
 801b746:	d009      	beq.n	801b75c <tcp_fasttmr+0x7c>
        LWIP_DEBUGF(TCP_DEBUG, ("tcp_fasttmr: pending FIN\n"));
        tcp_clear_flags(pcb, TF_CLOSEPEND);
 801b748:	687b      	ldr	r3, [r7, #4]
 801b74a:	8b5b      	ldrh	r3, [r3, #26]
 801b74c:	f023 0308 	bic.w	r3, r3, #8
 801b750:	b29a      	uxth	r2, r3
 801b752:	687b      	ldr	r3, [r7, #4]
 801b754:	835a      	strh	r2, [r3, #26]
        tcp_close_shutdown_fin(pcb);
 801b756:	6878      	ldr	r0, [r7, #4]
 801b758:	f7ff f8b0 	bl	801a8bc <tcp_close_shutdown_fin>
      }

      next = pcb->next;
 801b75c:	687b      	ldr	r3, [r7, #4]
 801b75e:	68db      	ldr	r3, [r3, #12]
 801b760:	603b      	str	r3, [r7, #0]

      /* If there is data which was previously "refused" by upper layer */
      if (pcb->refused_data != NULL) {
 801b762:	687b      	ldr	r3, [r7, #4]
 801b764:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 801b766:	2b00      	cmp	r3, #0
 801b768:	d00a      	beq.n	801b780 <tcp_fasttmr+0xa0>
        tcp_active_pcbs_changed = 0;
 801b76a:	4b0e      	ldr	r3, [pc, #56]	@ (801b7a4 <tcp_fasttmr+0xc4>)
 801b76c:	2200      	movs	r2, #0
 801b76e:	701a      	strb	r2, [r3, #0]
        tcp_process_refused_data(pcb);
 801b770:	6878      	ldr	r0, [r7, #4]
 801b772:	f000 f819 	bl	801b7a8 <tcp_process_refused_data>
        if (tcp_active_pcbs_changed) {
 801b776:	4b0b      	ldr	r3, [pc, #44]	@ (801b7a4 <tcp_fasttmr+0xc4>)
 801b778:	781b      	ldrb	r3, [r3, #0]
 801b77a:	2b00      	cmp	r3, #0
 801b77c:	d000      	beq.n	801b780 <tcp_fasttmr+0xa0>
          /* application callback has changed the pcb list: restart the loop */
          goto tcp_fasttmr_start;
 801b77e:	e7b8      	b.n	801b6f2 <tcp_fasttmr+0x12>
        }
      }
      pcb = next;
 801b780:	683b      	ldr	r3, [r7, #0]
 801b782:	607b      	str	r3, [r7, #4]
 801b784:	e002      	b.n	801b78c <tcp_fasttmr+0xac>
    } else {
      pcb = pcb->next;
 801b786:	687b      	ldr	r3, [r7, #4]
 801b788:	68db      	ldr	r3, [r3, #12]
 801b78a:	607b      	str	r3, [r7, #4]
  while (pcb != NULL) {
 801b78c:	687b      	ldr	r3, [r7, #4]
 801b78e:	2b00      	cmp	r3, #0
 801b790:	d1b3      	bne.n	801b6fa <tcp_fasttmr+0x1a>
    }
  }
}
 801b792:	bf00      	nop
 801b794:	bf00      	nop
 801b796:	3708      	adds	r7, #8
 801b798:	46bd      	mov	sp, r7
 801b79a:	bd80      	pop	{r7, pc}
 801b79c:	2402a002 	.word	0x2402a002
 801b7a0:	24029ff8 	.word	0x24029ff8
 801b7a4:	2402a000 	.word	0x2402a000

0801b7a8 <tcp_process_refused_data>:
}

/** Pass pcb->refused_data to the recv callback */
err_t
tcp_process_refused_data(struct tcp_pcb *pcb)
{
 801b7a8:	b590      	push	{r4, r7, lr}
 801b7aa:	b085      	sub	sp, #20
 801b7ac:	af00      	add	r7, sp, #0
 801b7ae:	6078      	str	r0, [r7, #4]
#if TCP_QUEUE_OOSEQ && LWIP_WND_SCALE
  struct pbuf *rest;
#endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */

  LWIP_ERROR("tcp_process_refused_data: invalid pcb", pcb != NULL, return ERR_ARG);
 801b7b0:	687b      	ldr	r3, [r7, #4]
 801b7b2:	2b00      	cmp	r3, #0
 801b7b4:	d109      	bne.n	801b7ca <tcp_process_refused_data+0x22>
 801b7b6:	4b38      	ldr	r3, [pc, #224]	@ (801b898 <tcp_process_refused_data+0xf0>)
 801b7b8:	f240 6209 	movw	r2, #1545	@ 0x609
 801b7bc:	4937      	ldr	r1, [pc, #220]	@ (801b89c <tcp_process_refused_data+0xf4>)
 801b7be:	4838      	ldr	r0, [pc, #224]	@ (801b8a0 <tcp_process_refused_data+0xf8>)
 801b7c0:	f00d fea4 	bl	802950c <iprintf>
 801b7c4:	f06f 030f 	mvn.w	r3, #15
 801b7c8:	e061      	b.n	801b88e <tcp_process_refused_data+0xe6>
#if TCP_QUEUE_OOSEQ && LWIP_WND_SCALE
  while (pcb->refused_data != NULL)
#endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */
  {
    err_t err;
    u8_t refused_flags = pcb->refused_data->flags;
 801b7ca:	687b      	ldr	r3, [r7, #4]
 801b7cc:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 801b7ce:	7b5b      	ldrb	r3, [r3, #13]
 801b7d0:	73bb      	strb	r3, [r7, #14]
    /* set pcb->refused_data to NULL in case the callback frees it and then
       closes the pcb */
    struct pbuf *refused_data = pcb->refused_data;
 801b7d2:	687b      	ldr	r3, [r7, #4]
 801b7d4:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 801b7d6:	60bb      	str	r3, [r7, #8]
#if TCP_QUEUE_OOSEQ && LWIP_WND_SCALE
    pbuf_split_64k(refused_data, &rest);
    pcb->refused_data = rest;
#else /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */
    pcb->refused_data = NULL;
 801b7d8:	687b      	ldr	r3, [r7, #4]
 801b7da:	2200      	movs	r2, #0
 801b7dc:	679a      	str	r2, [r3, #120]	@ 0x78
#endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */
    /* Notify again application with data previously received. */
    LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_input: notify kept packet\n"));
    TCP_EVENT_RECV(pcb, refused_data, ERR_OK, err);
 801b7de:	687b      	ldr	r3, [r7, #4]
 801b7e0:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 801b7e4:	2b00      	cmp	r3, #0
 801b7e6:	d00b      	beq.n	801b800 <tcp_process_refused_data+0x58>
 801b7e8:	687b      	ldr	r3, [r7, #4]
 801b7ea:	f8d3 4084 	ldr.w	r4, [r3, #132]	@ 0x84
 801b7ee:	687b      	ldr	r3, [r7, #4]
 801b7f0:	6918      	ldr	r0, [r3, #16]
 801b7f2:	2300      	movs	r3, #0
 801b7f4:	68ba      	ldr	r2, [r7, #8]
 801b7f6:	6879      	ldr	r1, [r7, #4]
 801b7f8:	47a0      	blx	r4
 801b7fa:	4603      	mov	r3, r0
 801b7fc:	73fb      	strb	r3, [r7, #15]
 801b7fe:	e007      	b.n	801b810 <tcp_process_refused_data+0x68>
 801b800:	2300      	movs	r3, #0
 801b802:	68ba      	ldr	r2, [r7, #8]
 801b804:	6879      	ldr	r1, [r7, #4]
 801b806:	2000      	movs	r0, #0
 801b808:	f000 f8a6 	bl	801b958 <tcp_recv_null>
 801b80c:	4603      	mov	r3, r0
 801b80e:	73fb      	strb	r3, [r7, #15]
    if (err == ERR_OK) {
 801b810:	f997 300f 	ldrsb.w	r3, [r7, #15]
 801b814:	2b00      	cmp	r3, #0
 801b816:	d12b      	bne.n	801b870 <tcp_process_refused_data+0xc8>
      /* did refused_data include a FIN? */
      if ((refused_flags & PBUF_FLAG_TCP_FIN)
 801b818:	7bbb      	ldrb	r3, [r7, #14]
 801b81a:	f003 0320 	and.w	r3, r3, #32
 801b81e:	2b00      	cmp	r3, #0
 801b820:	d034      	beq.n	801b88c <tcp_process_refused_data+0xe4>
          && (rest == NULL)
#endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */
         ) {
        /* correct rcv_wnd as the application won't call tcp_recved()
           for the FIN's seqno */
        if (pcb->rcv_wnd != TCP_WND_MAX(pcb)) {
 801b822:	687b      	ldr	r3, [r7, #4]
 801b824:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 801b826:	f241 62d0 	movw	r2, #5840	@ 0x16d0
 801b82a:	4293      	cmp	r3, r2
 801b82c:	d005      	beq.n	801b83a <tcp_process_refused_data+0x92>
          pcb->rcv_wnd++;
 801b82e:	687b      	ldr	r3, [r7, #4]
 801b830:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 801b832:	3301      	adds	r3, #1
 801b834:	b29a      	uxth	r2, r3
 801b836:	687b      	ldr	r3, [r7, #4]
 801b838:	851a      	strh	r2, [r3, #40]	@ 0x28
        }
        TCP_EVENT_CLOSED(pcb, err);
 801b83a:	687b      	ldr	r3, [r7, #4]
 801b83c:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 801b840:	2b00      	cmp	r3, #0
 801b842:	d00b      	beq.n	801b85c <tcp_process_refused_data+0xb4>
 801b844:	687b      	ldr	r3, [r7, #4]
 801b846:	f8d3 4084 	ldr.w	r4, [r3, #132]	@ 0x84
 801b84a:	687b      	ldr	r3, [r7, #4]
 801b84c:	6918      	ldr	r0, [r3, #16]
 801b84e:	2300      	movs	r3, #0
 801b850:	2200      	movs	r2, #0
 801b852:	6879      	ldr	r1, [r7, #4]
 801b854:	47a0      	blx	r4
 801b856:	4603      	mov	r3, r0
 801b858:	73fb      	strb	r3, [r7, #15]
 801b85a:	e001      	b.n	801b860 <tcp_process_refused_data+0xb8>
 801b85c:	2300      	movs	r3, #0
 801b85e:	73fb      	strb	r3, [r7, #15]
        if (err == ERR_ABRT) {
 801b860:	f997 300f 	ldrsb.w	r3, [r7, #15]
 801b864:	f113 0f0d 	cmn.w	r3, #13
 801b868:	d110      	bne.n	801b88c <tcp_process_refused_data+0xe4>
          return ERR_ABRT;
 801b86a:	f06f 030c 	mvn.w	r3, #12
 801b86e:	e00e      	b.n	801b88e <tcp_process_refused_data+0xe6>
        }
      }
    } else if (err == ERR_ABRT) {
 801b870:	f997 300f 	ldrsb.w	r3, [r7, #15]
 801b874:	f113 0f0d 	cmn.w	r3, #13
 801b878:	d102      	bne.n	801b880 <tcp_process_refused_data+0xd8>
      /* if err == ERR_ABRT, 'pcb' is already deallocated */
      /* Drop incoming packets because pcb is "full" (only if the incoming
         segment contains data). */
      LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_input: drop incoming packets, because pcb is \"full\"\n"));
      return ERR_ABRT;
 801b87a:	f06f 030c 	mvn.w	r3, #12
 801b87e:	e006      	b.n	801b88e <tcp_process_refused_data+0xe6>
#if TCP_QUEUE_OOSEQ && LWIP_WND_SCALE
      if (rest != NULL) {
        pbuf_cat(refused_data, rest);
      }
#endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */
      pcb->refused_data = refused_data;
 801b880:	687b      	ldr	r3, [r7, #4]
 801b882:	68ba      	ldr	r2, [r7, #8]
 801b884:	679a      	str	r2, [r3, #120]	@ 0x78
      return ERR_INPROGRESS;
 801b886:	f06f 0304 	mvn.w	r3, #4
 801b88a:	e000      	b.n	801b88e <tcp_process_refused_data+0xe6>
    }
  }
  return ERR_OK;
 801b88c:	2300      	movs	r3, #0
}
 801b88e:	4618      	mov	r0, r3
 801b890:	3714      	adds	r7, #20
 801b892:	46bd      	mov	sp, r7
 801b894:	bd90      	pop	{r4, r7, pc}
 801b896:	bf00      	nop
 801b898:	0802e13c 	.word	0x0802e13c
 801b89c:	0802e64c 	.word	0x0802e64c
 801b8a0:	0802e180 	.word	0x0802e180

0801b8a4 <tcp_segs_free>:
 *
 * @param seg tcp_seg list of TCP segments to free
 */
void
tcp_segs_free(struct tcp_seg *seg)
{
 801b8a4:	b580      	push	{r7, lr}
 801b8a6:	b084      	sub	sp, #16
 801b8a8:	af00      	add	r7, sp, #0
 801b8aa:	6078      	str	r0, [r7, #4]
  while (seg != NULL) {
 801b8ac:	e007      	b.n	801b8be <tcp_segs_free+0x1a>
    struct tcp_seg *next = seg->next;
 801b8ae:	687b      	ldr	r3, [r7, #4]
 801b8b0:	681b      	ldr	r3, [r3, #0]
 801b8b2:	60fb      	str	r3, [r7, #12]
    tcp_seg_free(seg);
 801b8b4:	6878      	ldr	r0, [r7, #4]
 801b8b6:	f000 f80a 	bl	801b8ce <tcp_seg_free>
    seg = next;
 801b8ba:	68fb      	ldr	r3, [r7, #12]
 801b8bc:	607b      	str	r3, [r7, #4]
  while (seg != NULL) {
 801b8be:	687b      	ldr	r3, [r7, #4]
 801b8c0:	2b00      	cmp	r3, #0
 801b8c2:	d1f4      	bne.n	801b8ae <tcp_segs_free+0xa>
  }
}
 801b8c4:	bf00      	nop
 801b8c6:	bf00      	nop
 801b8c8:	3710      	adds	r7, #16
 801b8ca:	46bd      	mov	sp, r7
 801b8cc:	bd80      	pop	{r7, pc}

0801b8ce <tcp_seg_free>:
 *
 * @param seg single tcp_seg to free
 */
void
tcp_seg_free(struct tcp_seg *seg)
{
 801b8ce:	b580      	push	{r7, lr}
 801b8d0:	b082      	sub	sp, #8
 801b8d2:	af00      	add	r7, sp, #0
 801b8d4:	6078      	str	r0, [r7, #4]
  if (seg != NULL) {
 801b8d6:	687b      	ldr	r3, [r7, #4]
 801b8d8:	2b00      	cmp	r3, #0
 801b8da:	d00c      	beq.n	801b8f6 <tcp_seg_free+0x28>
    if (seg->p != NULL) {
 801b8dc:	687b      	ldr	r3, [r7, #4]
 801b8de:	685b      	ldr	r3, [r3, #4]
 801b8e0:	2b00      	cmp	r3, #0
 801b8e2:	d004      	beq.n	801b8ee <tcp_seg_free+0x20>
      pbuf_free(seg->p);
 801b8e4:	687b      	ldr	r3, [r7, #4]
 801b8e6:	685b      	ldr	r3, [r3, #4]
 801b8e8:	4618      	mov	r0, r3
 801b8ea:	f7fe fb97 	bl	801a01c <pbuf_free>
#if TCP_DEBUG
      seg->p = NULL;
#endif /* TCP_DEBUG */
    }
    memp_free(MEMP_TCP_SEG, seg);
 801b8ee:	6879      	ldr	r1, [r7, #4]
 801b8f0:	2003      	movs	r0, #3
 801b8f2:	f7fd fca5 	bl	8019240 <memp_free>
  }
}
 801b8f6:	bf00      	nop
 801b8f8:	3708      	adds	r7, #8
 801b8fa:	46bd      	mov	sp, r7
 801b8fc:	bd80      	pop	{r7, pc}
	...

0801b900 <tcp_seg_copy>:
 * @param seg the old tcp_seg
 * @return a copy of seg
 */
struct tcp_seg *
tcp_seg_copy(struct tcp_seg *seg)
{
 801b900:	b580      	push	{r7, lr}
 801b902:	b084      	sub	sp, #16
 801b904:	af00      	add	r7, sp, #0
 801b906:	6078      	str	r0, [r7, #4]
  struct tcp_seg *cseg;

  LWIP_ASSERT("tcp_seg_copy: invalid seg", seg != NULL);
 801b908:	687b      	ldr	r3, [r7, #4]
 801b90a:	2b00      	cmp	r3, #0
 801b90c:	d106      	bne.n	801b91c <tcp_seg_copy+0x1c>
 801b90e:	4b0f      	ldr	r3, [pc, #60]	@ (801b94c <tcp_seg_copy+0x4c>)
 801b910:	f240 6282 	movw	r2, #1666	@ 0x682
 801b914:	490e      	ldr	r1, [pc, #56]	@ (801b950 <tcp_seg_copy+0x50>)
 801b916:	480f      	ldr	r0, [pc, #60]	@ (801b954 <tcp_seg_copy+0x54>)
 801b918:	f00d fdf8 	bl	802950c <iprintf>

  cseg = (struct tcp_seg *)memp_malloc(MEMP_TCP_SEG);
 801b91c:	2003      	movs	r0, #3
 801b91e:	f7fd fc19 	bl	8019154 <memp_malloc>
 801b922:	60f8      	str	r0, [r7, #12]
  if (cseg == NULL) {
 801b924:	68fb      	ldr	r3, [r7, #12]
 801b926:	2b00      	cmp	r3, #0
 801b928:	d101      	bne.n	801b92e <tcp_seg_copy+0x2e>
    return NULL;
 801b92a:	2300      	movs	r3, #0
 801b92c:	e00a      	b.n	801b944 <tcp_seg_copy+0x44>
  }
  SMEMCPY((u8_t *)cseg, (const u8_t *)seg, sizeof(struct tcp_seg));
 801b92e:	2214      	movs	r2, #20
 801b930:	6879      	ldr	r1, [r7, #4]
 801b932:	68f8      	ldr	r0, [r7, #12]
 801b934:	f00e f873 	bl	8029a1e <memcpy>
  pbuf_ref(cseg->p);
 801b938:	68fb      	ldr	r3, [r7, #12]
 801b93a:	685b      	ldr	r3, [r3, #4]
 801b93c:	4618      	mov	r0, r3
 801b93e:	f7fe fc13 	bl	801a168 <pbuf_ref>
  return cseg;
 801b942:	68fb      	ldr	r3, [r7, #12]
}
 801b944:	4618      	mov	r0, r3
 801b946:	3710      	adds	r7, #16
 801b948:	46bd      	mov	sp, r7
 801b94a:	bd80      	pop	{r7, pc}
 801b94c:	0802e13c 	.word	0x0802e13c
 801b950:	0802e690 	.word	0x0802e690
 801b954:	0802e180 	.word	0x0802e180

0801b958 <tcp_recv_null>:
 * Default receive callback that is called if the user didn't register
 * a recv callback for the pcb.
 */
err_t
tcp_recv_null(void *arg, struct tcp_pcb *pcb, struct pbuf *p, err_t err)
{
 801b958:	b580      	push	{r7, lr}
 801b95a:	b084      	sub	sp, #16
 801b95c:	af00      	add	r7, sp, #0
 801b95e:	60f8      	str	r0, [r7, #12]
 801b960:	60b9      	str	r1, [r7, #8]
 801b962:	607a      	str	r2, [r7, #4]
 801b964:	70fb      	strb	r3, [r7, #3]
  LWIP_UNUSED_ARG(arg);

  LWIP_ERROR("tcp_recv_null: invalid pcb", pcb != NULL, return ERR_ARG);
 801b966:	68bb      	ldr	r3, [r7, #8]
 801b968:	2b00      	cmp	r3, #0
 801b96a:	d109      	bne.n	801b980 <tcp_recv_null+0x28>
 801b96c:	4b12      	ldr	r3, [pc, #72]	@ (801b9b8 <tcp_recv_null+0x60>)
 801b96e:	f44f 62d3 	mov.w	r2, #1688	@ 0x698
 801b972:	4912      	ldr	r1, [pc, #72]	@ (801b9bc <tcp_recv_null+0x64>)
 801b974:	4812      	ldr	r0, [pc, #72]	@ (801b9c0 <tcp_recv_null+0x68>)
 801b976:	f00d fdc9 	bl	802950c <iprintf>
 801b97a:	f06f 030f 	mvn.w	r3, #15
 801b97e:	e016      	b.n	801b9ae <tcp_recv_null+0x56>

  if (p != NULL) {
 801b980:	687b      	ldr	r3, [r7, #4]
 801b982:	2b00      	cmp	r3, #0
 801b984:	d009      	beq.n	801b99a <tcp_recv_null+0x42>
    tcp_recved(pcb, p->tot_len);
 801b986:	687b      	ldr	r3, [r7, #4]
 801b988:	891b      	ldrh	r3, [r3, #8]
 801b98a:	4619      	mov	r1, r3
 801b98c:	68b8      	ldr	r0, [r7, #8]
 801b98e:	f7ff f9b1 	bl	801acf4 <tcp_recved>
    pbuf_free(p);
 801b992:	6878      	ldr	r0, [r7, #4]
 801b994:	f7fe fb42 	bl	801a01c <pbuf_free>
 801b998:	e008      	b.n	801b9ac <tcp_recv_null+0x54>
  } else if (err == ERR_OK) {
 801b99a:	f997 3003 	ldrsb.w	r3, [r7, #3]
 801b99e:	2b00      	cmp	r3, #0
 801b9a0:	d104      	bne.n	801b9ac <tcp_recv_null+0x54>
    return tcp_close(pcb);
 801b9a2:	68b8      	ldr	r0, [r7, #8]
 801b9a4:	f7fe fff4 	bl	801a990 <tcp_close>
 801b9a8:	4603      	mov	r3, r0
 801b9aa:	e000      	b.n	801b9ae <tcp_recv_null+0x56>
  }
  return ERR_OK;
 801b9ac:	2300      	movs	r3, #0
}
 801b9ae:	4618      	mov	r0, r3
 801b9b0:	3710      	adds	r7, #16
 801b9b2:	46bd      	mov	sp, r7
 801b9b4:	bd80      	pop	{r7, pc}
 801b9b6:	bf00      	nop
 801b9b8:	0802e13c 	.word	0x0802e13c
 801b9bc:	0802e6ac 	.word	0x0802e6ac
 801b9c0:	0802e180 	.word	0x0802e180

0801b9c4 <tcp_kill_prio>:
 *
 * @param prio minimum priority
 */
static void
tcp_kill_prio(u8_t prio)
{
 801b9c4:	b580      	push	{r7, lr}
 801b9c6:	b086      	sub	sp, #24
 801b9c8:	af00      	add	r7, sp, #0
 801b9ca:	4603      	mov	r3, r0
 801b9cc:	71fb      	strb	r3, [r7, #7]
  struct tcp_pcb *pcb, *inactive;
  u32_t inactivity;
  u8_t mprio;

  mprio = LWIP_MIN(TCP_PRIO_MAX, prio);
 801b9ce:	f997 3007 	ldrsb.w	r3, [r7, #7]
 801b9d2:	2b00      	cmp	r3, #0
 801b9d4:	db01      	blt.n	801b9da <tcp_kill_prio+0x16>
 801b9d6:	79fb      	ldrb	r3, [r7, #7]
 801b9d8:	e000      	b.n	801b9dc <tcp_kill_prio+0x18>
 801b9da:	237f      	movs	r3, #127	@ 0x7f
 801b9dc:	72fb      	strb	r3, [r7, #11]

  /* We want to kill connections with a lower prio, so bail out if 
   * supplied prio is 0 - there can never be a lower prio
   */
  if (mprio == 0) {
 801b9de:	7afb      	ldrb	r3, [r7, #11]
 801b9e0:	2b00      	cmp	r3, #0
 801b9e2:	d034      	beq.n	801ba4e <tcp_kill_prio+0x8a>
  /* We only want kill connections with a lower prio, so decrement prio by one 
   * and start searching for oldest connection with same or lower priority than mprio.
   * We want to find the connections with the lowest possible prio, and among
   * these the one with the longest inactivity time.
   */
  mprio--;
 801b9e4:	7afb      	ldrb	r3, [r7, #11]
 801b9e6:	3b01      	subs	r3, #1
 801b9e8:	72fb      	strb	r3, [r7, #11]

  inactivity = 0;
 801b9ea:	2300      	movs	r3, #0
 801b9ec:	60fb      	str	r3, [r7, #12]
  inactive = NULL;
 801b9ee:	2300      	movs	r3, #0
 801b9f0:	613b      	str	r3, [r7, #16]
  for (pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) {
 801b9f2:	4b19      	ldr	r3, [pc, #100]	@ (801ba58 <tcp_kill_prio+0x94>)
 801b9f4:	681b      	ldr	r3, [r3, #0]
 801b9f6:	617b      	str	r3, [r7, #20]
 801b9f8:	e01f      	b.n	801ba3a <tcp_kill_prio+0x76>
        /* lower prio is always a kill candidate */
    if ((pcb->prio < mprio) ||
 801b9fa:	697b      	ldr	r3, [r7, #20]
 801b9fc:	7d5b      	ldrb	r3, [r3, #21]
 801b9fe:	7afa      	ldrb	r2, [r7, #11]
 801ba00:	429a      	cmp	r2, r3
 801ba02:	d80c      	bhi.n	801ba1e <tcp_kill_prio+0x5a>
        /* longer inactivity is also a kill candidate */
        ((pcb->prio == mprio) && ((u32_t)(tcp_ticks - pcb->tmr) >= inactivity))) {
 801ba04:	697b      	ldr	r3, [r7, #20]
 801ba06:	7d5b      	ldrb	r3, [r3, #21]
    if ((pcb->prio < mprio) ||
 801ba08:	7afa      	ldrb	r2, [r7, #11]
 801ba0a:	429a      	cmp	r2, r3
 801ba0c:	d112      	bne.n	801ba34 <tcp_kill_prio+0x70>
        ((pcb->prio == mprio) && ((u32_t)(tcp_ticks - pcb->tmr) >= inactivity))) {
 801ba0e:	4b13      	ldr	r3, [pc, #76]	@ (801ba5c <tcp_kill_prio+0x98>)
 801ba10:	681a      	ldr	r2, [r3, #0]
 801ba12:	697b      	ldr	r3, [r7, #20]
 801ba14:	6a1b      	ldr	r3, [r3, #32]
 801ba16:	1ad3      	subs	r3, r2, r3
 801ba18:	68fa      	ldr	r2, [r7, #12]
 801ba1a:	429a      	cmp	r2, r3
 801ba1c:	d80a      	bhi.n	801ba34 <tcp_kill_prio+0x70>
      inactivity = tcp_ticks - pcb->tmr;
 801ba1e:	4b0f      	ldr	r3, [pc, #60]	@ (801ba5c <tcp_kill_prio+0x98>)
 801ba20:	681a      	ldr	r2, [r3, #0]
 801ba22:	697b      	ldr	r3, [r7, #20]
 801ba24:	6a1b      	ldr	r3, [r3, #32]
 801ba26:	1ad3      	subs	r3, r2, r3
 801ba28:	60fb      	str	r3, [r7, #12]
      inactive   = pcb;
 801ba2a:	697b      	ldr	r3, [r7, #20]
 801ba2c:	613b      	str	r3, [r7, #16]
      mprio      = pcb->prio;
 801ba2e:	697b      	ldr	r3, [r7, #20]
 801ba30:	7d5b      	ldrb	r3, [r3, #21]
 801ba32:	72fb      	strb	r3, [r7, #11]
  for (pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) {
 801ba34:	697b      	ldr	r3, [r7, #20]
 801ba36:	68db      	ldr	r3, [r3, #12]
 801ba38:	617b      	str	r3, [r7, #20]
 801ba3a:	697b      	ldr	r3, [r7, #20]
 801ba3c:	2b00      	cmp	r3, #0
 801ba3e:	d1dc      	bne.n	801b9fa <tcp_kill_prio+0x36>
    }
  }
  if (inactive != NULL) {
 801ba40:	693b      	ldr	r3, [r7, #16]
 801ba42:	2b00      	cmp	r3, #0
 801ba44:	d004      	beq.n	801ba50 <tcp_kill_prio+0x8c>
    LWIP_DEBUGF(TCP_DEBUG, ("tcp_kill_prio: killing oldest PCB %p (%"S32_F")\n",
                            (void *)inactive, inactivity));
    tcp_abort(inactive);
 801ba46:	6938      	ldr	r0, [r7, #16]
 801ba48:	f7ff f8ee 	bl	801ac28 <tcp_abort>
 801ba4c:	e000      	b.n	801ba50 <tcp_kill_prio+0x8c>
    return;
 801ba4e:	bf00      	nop
  }
}
 801ba50:	3718      	adds	r7, #24
 801ba52:	46bd      	mov	sp, r7
 801ba54:	bd80      	pop	{r7, pc}
 801ba56:	bf00      	nop
 801ba58:	24029ff8 	.word	0x24029ff8
 801ba5c:	24029fec 	.word	0x24029fec

0801ba60 <tcp_kill_state>:
 * Kills the oldest connection that is in specific state.
 * Called from tcp_alloc() for LAST_ACK and CLOSING if no more connections are available.
 */
static void
tcp_kill_state(enum tcp_state state)
{
 801ba60:	b580      	push	{r7, lr}
 801ba62:	b086      	sub	sp, #24
 801ba64:	af00      	add	r7, sp, #0
 801ba66:	4603      	mov	r3, r0
 801ba68:	71fb      	strb	r3, [r7, #7]
  struct tcp_pcb *pcb, *inactive;
  u32_t inactivity;

  LWIP_ASSERT("invalid state", (state == CLOSING) || (state == LAST_ACK));
 801ba6a:	79fb      	ldrb	r3, [r7, #7]
 801ba6c:	2b08      	cmp	r3, #8
 801ba6e:	d009      	beq.n	801ba84 <tcp_kill_state+0x24>
 801ba70:	79fb      	ldrb	r3, [r7, #7]
 801ba72:	2b09      	cmp	r3, #9
 801ba74:	d006      	beq.n	801ba84 <tcp_kill_state+0x24>
 801ba76:	4b1a      	ldr	r3, [pc, #104]	@ (801bae0 <tcp_kill_state+0x80>)
 801ba78:	f240 62dd 	movw	r2, #1757	@ 0x6dd
 801ba7c:	4919      	ldr	r1, [pc, #100]	@ (801bae4 <tcp_kill_state+0x84>)
 801ba7e:	481a      	ldr	r0, [pc, #104]	@ (801bae8 <tcp_kill_state+0x88>)
 801ba80:	f00d fd44 	bl	802950c <iprintf>

  inactivity = 0;
 801ba84:	2300      	movs	r3, #0
 801ba86:	60fb      	str	r3, [r7, #12]
  inactive = NULL;
 801ba88:	2300      	movs	r3, #0
 801ba8a:	613b      	str	r3, [r7, #16]
  /* Go through the list of active pcbs and get the oldest pcb that is in state
     CLOSING/LAST_ACK. */
  for (pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) {
 801ba8c:	4b17      	ldr	r3, [pc, #92]	@ (801baec <tcp_kill_state+0x8c>)
 801ba8e:	681b      	ldr	r3, [r3, #0]
 801ba90:	617b      	str	r3, [r7, #20]
 801ba92:	e017      	b.n	801bac4 <tcp_kill_state+0x64>
    if (pcb->state == state) {
 801ba94:	697b      	ldr	r3, [r7, #20]
 801ba96:	7d1b      	ldrb	r3, [r3, #20]
 801ba98:	79fa      	ldrb	r2, [r7, #7]
 801ba9a:	429a      	cmp	r2, r3
 801ba9c:	d10f      	bne.n	801babe <tcp_kill_state+0x5e>
      if ((u32_t)(tcp_ticks - pcb->tmr) >= inactivity) {
 801ba9e:	4b14      	ldr	r3, [pc, #80]	@ (801baf0 <tcp_kill_state+0x90>)
 801baa0:	681a      	ldr	r2, [r3, #0]
 801baa2:	697b      	ldr	r3, [r7, #20]
 801baa4:	6a1b      	ldr	r3, [r3, #32]
 801baa6:	1ad3      	subs	r3, r2, r3
 801baa8:	68fa      	ldr	r2, [r7, #12]
 801baaa:	429a      	cmp	r2, r3
 801baac:	d807      	bhi.n	801babe <tcp_kill_state+0x5e>
        inactivity = tcp_ticks - pcb->tmr;
 801baae:	4b10      	ldr	r3, [pc, #64]	@ (801baf0 <tcp_kill_state+0x90>)
 801bab0:	681a      	ldr	r2, [r3, #0]
 801bab2:	697b      	ldr	r3, [r7, #20]
 801bab4:	6a1b      	ldr	r3, [r3, #32]
 801bab6:	1ad3      	subs	r3, r2, r3
 801bab8:	60fb      	str	r3, [r7, #12]
        inactive = pcb;
 801baba:	697b      	ldr	r3, [r7, #20]
 801babc:	613b      	str	r3, [r7, #16]
  for (pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) {
 801babe:	697b      	ldr	r3, [r7, #20]
 801bac0:	68db      	ldr	r3, [r3, #12]
 801bac2:	617b      	str	r3, [r7, #20]
 801bac4:	697b      	ldr	r3, [r7, #20]
 801bac6:	2b00      	cmp	r3, #0
 801bac8:	d1e4      	bne.n	801ba94 <tcp_kill_state+0x34>
      }
    }
  }
  if (inactive != NULL) {
 801baca:	693b      	ldr	r3, [r7, #16]
 801bacc:	2b00      	cmp	r3, #0
 801bace:	d003      	beq.n	801bad8 <tcp_kill_state+0x78>
    LWIP_DEBUGF(TCP_DEBUG, ("tcp_kill_closing: killing oldest %s PCB %p (%"S32_F")\n",
                            tcp_state_str[state], (void *)inactive, inactivity));
    /* Don't send a RST, since no data is lost. */
    tcp_abandon(inactive, 0);
 801bad0:	2100      	movs	r1, #0
 801bad2:	6938      	ldr	r0, [r7, #16]
 801bad4:	f7fe ffe8 	bl	801aaa8 <tcp_abandon>
  }
}
 801bad8:	bf00      	nop
 801bada:	3718      	adds	r7, #24
 801badc:	46bd      	mov	sp, r7
 801bade:	bd80      	pop	{r7, pc}
 801bae0:	0802e13c 	.word	0x0802e13c
 801bae4:	0802e6c8 	.word	0x0802e6c8
 801bae8:	0802e180 	.word	0x0802e180
 801baec:	24029ff8 	.word	0x24029ff8
 801baf0:	24029fec 	.word	0x24029fec

0801baf4 <tcp_kill_timewait>:
 * Kills the oldest connection that is in TIME_WAIT state.
 * Called from tcp_alloc() if no more connections are available.
 */
static void
tcp_kill_timewait(void)
{
 801baf4:	b580      	push	{r7, lr}
 801baf6:	b084      	sub	sp, #16
 801baf8:	af00      	add	r7, sp, #0
  struct tcp_pcb *pcb, *inactive;
  u32_t inactivity;

  inactivity = 0;
 801bafa:	2300      	movs	r3, #0
 801bafc:	607b      	str	r3, [r7, #4]
  inactive = NULL;
 801bafe:	2300      	movs	r3, #0
 801bb00:	60bb      	str	r3, [r7, #8]
  /* Go through the list of TIME_WAIT pcbs and get the oldest pcb. */
  for (pcb = tcp_tw_pcbs; pcb != NULL; pcb = pcb->next) {
 801bb02:	4b12      	ldr	r3, [pc, #72]	@ (801bb4c <tcp_kill_timewait+0x58>)
 801bb04:	681b      	ldr	r3, [r3, #0]
 801bb06:	60fb      	str	r3, [r7, #12]
 801bb08:	e012      	b.n	801bb30 <tcp_kill_timewait+0x3c>
    if ((u32_t)(tcp_ticks - pcb->tmr) >= inactivity) {
 801bb0a:	4b11      	ldr	r3, [pc, #68]	@ (801bb50 <tcp_kill_timewait+0x5c>)
 801bb0c:	681a      	ldr	r2, [r3, #0]
 801bb0e:	68fb      	ldr	r3, [r7, #12]
 801bb10:	6a1b      	ldr	r3, [r3, #32]
 801bb12:	1ad3      	subs	r3, r2, r3
 801bb14:	687a      	ldr	r2, [r7, #4]
 801bb16:	429a      	cmp	r2, r3
 801bb18:	d807      	bhi.n	801bb2a <tcp_kill_timewait+0x36>
      inactivity = tcp_ticks - pcb->tmr;
 801bb1a:	4b0d      	ldr	r3, [pc, #52]	@ (801bb50 <tcp_kill_timewait+0x5c>)
 801bb1c:	681a      	ldr	r2, [r3, #0]
 801bb1e:	68fb      	ldr	r3, [r7, #12]
 801bb20:	6a1b      	ldr	r3, [r3, #32]
 801bb22:	1ad3      	subs	r3, r2, r3
 801bb24:	607b      	str	r3, [r7, #4]
      inactive = pcb;
 801bb26:	68fb      	ldr	r3, [r7, #12]
 801bb28:	60bb      	str	r3, [r7, #8]
  for (pcb = tcp_tw_pcbs; pcb != NULL; pcb = pcb->next) {
 801bb2a:	68fb      	ldr	r3, [r7, #12]
 801bb2c:	68db      	ldr	r3, [r3, #12]
 801bb2e:	60fb      	str	r3, [r7, #12]
 801bb30:	68fb      	ldr	r3, [r7, #12]
 801bb32:	2b00      	cmp	r3, #0
 801bb34:	d1e9      	bne.n	801bb0a <tcp_kill_timewait+0x16>
    }
  }
  if (inactive != NULL) {
 801bb36:	68bb      	ldr	r3, [r7, #8]
 801bb38:	2b00      	cmp	r3, #0
 801bb3a:	d002      	beq.n	801bb42 <tcp_kill_timewait+0x4e>
    LWIP_DEBUGF(TCP_DEBUG, ("tcp_kill_timewait: killing oldest TIME-WAIT PCB %p (%"S32_F")\n",
                            (void *)inactive, inactivity));
    tcp_abort(inactive);
 801bb3c:	68b8      	ldr	r0, [r7, #8]
 801bb3e:	f7ff f873 	bl	801ac28 <tcp_abort>
  }
}
 801bb42:	bf00      	nop
 801bb44:	3710      	adds	r7, #16
 801bb46:	46bd      	mov	sp, r7
 801bb48:	bd80      	pop	{r7, pc}
 801bb4a:	bf00      	nop
 801bb4c:	24029ffc 	.word	0x24029ffc
 801bb50:	24029fec 	.word	0x24029fec

0801bb54 <tcp_handle_closepend>:
 * now send the FIN (which failed before), the pcb might be in a state that is
 * OK for us to now free it.
 */
static void
tcp_handle_closepend(void)
{
 801bb54:	b580      	push	{r7, lr}
 801bb56:	b082      	sub	sp, #8
 801bb58:	af00      	add	r7, sp, #0
  struct tcp_pcb *pcb = tcp_active_pcbs;
 801bb5a:	4b10      	ldr	r3, [pc, #64]	@ (801bb9c <tcp_handle_closepend+0x48>)
 801bb5c:	681b      	ldr	r3, [r3, #0]
 801bb5e:	607b      	str	r3, [r7, #4]

  while (pcb != NULL) {
 801bb60:	e014      	b.n	801bb8c <tcp_handle_closepend+0x38>
    struct tcp_pcb *next = pcb->next;
 801bb62:	687b      	ldr	r3, [r7, #4]
 801bb64:	68db      	ldr	r3, [r3, #12]
 801bb66:	603b      	str	r3, [r7, #0]
    /* send pending FIN */
    if (pcb->flags & TF_CLOSEPEND) {
 801bb68:	687b      	ldr	r3, [r7, #4]
 801bb6a:	8b5b      	ldrh	r3, [r3, #26]
 801bb6c:	f003 0308 	and.w	r3, r3, #8
 801bb70:	2b00      	cmp	r3, #0
 801bb72:	d009      	beq.n	801bb88 <tcp_handle_closepend+0x34>
      LWIP_DEBUGF(TCP_DEBUG, ("tcp_handle_closepend: pending FIN\n"));
      tcp_clear_flags(pcb, TF_CLOSEPEND);
 801bb74:	687b      	ldr	r3, [r7, #4]
 801bb76:	8b5b      	ldrh	r3, [r3, #26]
 801bb78:	f023 0308 	bic.w	r3, r3, #8
 801bb7c:	b29a      	uxth	r2, r3
 801bb7e:	687b      	ldr	r3, [r7, #4]
 801bb80:	835a      	strh	r2, [r3, #26]
      tcp_close_shutdown_fin(pcb);
 801bb82:	6878      	ldr	r0, [r7, #4]
 801bb84:	f7fe fe9a 	bl	801a8bc <tcp_close_shutdown_fin>
    }
    pcb = next;
 801bb88:	683b      	ldr	r3, [r7, #0]
 801bb8a:	607b      	str	r3, [r7, #4]
  while (pcb != NULL) {
 801bb8c:	687b      	ldr	r3, [r7, #4]
 801bb8e:	2b00      	cmp	r3, #0
 801bb90:	d1e7      	bne.n	801bb62 <tcp_handle_closepend+0xe>
  }
}
 801bb92:	bf00      	nop
 801bb94:	bf00      	nop
 801bb96:	3708      	adds	r7, #8
 801bb98:	46bd      	mov	sp, r7
 801bb9a:	bd80      	pop	{r7, pc}
 801bb9c:	24029ff8 	.word	0x24029ff8

0801bba0 <tcp_alloc>:
 * @param prio priority for the new pcb
 * @return a new tcp_pcb that initially is in state CLOSED
 */
struct tcp_pcb *
tcp_alloc(u8_t prio)
{
 801bba0:	b580      	push	{r7, lr}
 801bba2:	b084      	sub	sp, #16
 801bba4:	af00      	add	r7, sp, #0
 801bba6:	4603      	mov	r3, r0
 801bba8:	71fb      	strb	r3, [r7, #7]
  struct tcp_pcb *pcb;

  LWIP_ASSERT_CORE_LOCKED();
 801bbaa:	f7f4 fa61 	bl	8010070 <sys_check_core_locking>

  pcb = (struct tcp_pcb *)memp_malloc(MEMP_TCP_PCB);
 801bbae:	2001      	movs	r0, #1
 801bbb0:	f7fd fad0 	bl	8019154 <memp_malloc>
 801bbb4:	60f8      	str	r0, [r7, #12]
  if (pcb == NULL) {
 801bbb6:	68fb      	ldr	r3, [r7, #12]
 801bbb8:	2b00      	cmp	r3, #0
 801bbba:	d126      	bne.n	801bc0a <tcp_alloc+0x6a>
    /* Try to send FIN for all pcbs stuck in TF_CLOSEPEND first */
    tcp_handle_closepend();
 801bbbc:	f7ff ffca 	bl	801bb54 <tcp_handle_closepend>

    /* Try killing oldest connection in TIME-WAIT. */
    LWIP_DEBUGF(TCP_DEBUG, ("tcp_alloc: killing off oldest TIME-WAIT connection\n"));
    tcp_kill_timewait();
 801bbc0:	f7ff ff98 	bl	801baf4 <tcp_kill_timewait>
    /* Try to allocate a tcp_pcb again. */
    pcb = (struct tcp_pcb *)memp_malloc(MEMP_TCP_PCB);
 801bbc4:	2001      	movs	r0, #1
 801bbc6:	f7fd fac5 	bl	8019154 <memp_malloc>
 801bbca:	60f8      	str	r0, [r7, #12]
    if (pcb == NULL) {
 801bbcc:	68fb      	ldr	r3, [r7, #12]
 801bbce:	2b00      	cmp	r3, #0
 801bbd0:	d11b      	bne.n	801bc0a <tcp_alloc+0x6a>
      /* Try killing oldest connection in LAST-ACK (these wouldn't go to TIME-WAIT). */
      LWIP_DEBUGF(TCP_DEBUG, ("tcp_alloc: killing off oldest LAST-ACK connection\n"));
      tcp_kill_state(LAST_ACK);
 801bbd2:	2009      	movs	r0, #9
 801bbd4:	f7ff ff44 	bl	801ba60 <tcp_kill_state>
      /* Try to allocate a tcp_pcb again. */
      pcb = (struct tcp_pcb *)memp_malloc(MEMP_TCP_PCB);
 801bbd8:	2001      	movs	r0, #1
 801bbda:	f7fd fabb 	bl	8019154 <memp_malloc>
 801bbde:	60f8      	str	r0, [r7, #12]
      if (pcb == NULL) {
 801bbe0:	68fb      	ldr	r3, [r7, #12]
 801bbe2:	2b00      	cmp	r3, #0
 801bbe4:	d111      	bne.n	801bc0a <tcp_alloc+0x6a>
        /* Try killing oldest connection in CLOSING. */
        LWIP_DEBUGF(TCP_DEBUG, ("tcp_alloc: killing off oldest CLOSING connection\n"));
        tcp_kill_state(CLOSING);
 801bbe6:	2008      	movs	r0, #8
 801bbe8:	f7ff ff3a 	bl	801ba60 <tcp_kill_state>
        /* Try to allocate a tcp_pcb again. */
        pcb = (struct tcp_pcb *)memp_malloc(MEMP_TCP_PCB);
 801bbec:	2001      	movs	r0, #1
 801bbee:	f7fd fab1 	bl	8019154 <memp_malloc>
 801bbf2:	60f8      	str	r0, [r7, #12]
        if (pcb == NULL) {
 801bbf4:	68fb      	ldr	r3, [r7, #12]
 801bbf6:	2b00      	cmp	r3, #0
 801bbf8:	d107      	bne.n	801bc0a <tcp_alloc+0x6a>
          /* Try killing oldest active connection with lower priority than the new one. */
          LWIP_DEBUGF(TCP_DEBUG, ("tcp_alloc: killing oldest connection with prio lower than %d\n", prio));
          tcp_kill_prio(prio);
 801bbfa:	79fb      	ldrb	r3, [r7, #7]
 801bbfc:	4618      	mov	r0, r3
 801bbfe:	f7ff fee1 	bl	801b9c4 <tcp_kill_prio>
          /* Try to allocate a tcp_pcb again. */
          pcb = (struct tcp_pcb *)memp_malloc(MEMP_TCP_PCB);
 801bc02:	2001      	movs	r0, #1
 801bc04:	f7fd faa6 	bl	8019154 <memp_malloc>
 801bc08:	60f8      	str	r0, [r7, #12]
    if (pcb != NULL) {
      /* adjust err stats: memp_malloc failed above */
      MEMP_STATS_DEC(err, MEMP_TCP_PCB);
    }
  }
  if (pcb != NULL) {
 801bc0a:	68fb      	ldr	r3, [r7, #12]
 801bc0c:	2b00      	cmp	r3, #0
 801bc0e:	d03f      	beq.n	801bc90 <tcp_alloc+0xf0>
    /* zero out the whole pcb, so there is no need to initialize members to zero */
    memset(pcb, 0, sizeof(struct tcp_pcb));
 801bc10:	229c      	movs	r2, #156	@ 0x9c
 801bc12:	2100      	movs	r1, #0
 801bc14:	68f8      	ldr	r0, [r7, #12]
 801bc16:	f00d fe0b 	bl	8029830 <memset>
    pcb->prio = prio;
 801bc1a:	68fb      	ldr	r3, [r7, #12]
 801bc1c:	79fa      	ldrb	r2, [r7, #7]
 801bc1e:	755a      	strb	r2, [r3, #21]
    pcb->snd_buf = TCP_SND_BUF;
 801bc20:	68fb      	ldr	r3, [r7, #12]
 801bc22:	f241 62d0 	movw	r2, #5840	@ 0x16d0
 801bc26:	f8a3 2064 	strh.w	r2, [r3, #100]	@ 0x64
    /* Start with a window that does not need scaling. When window scaling is
       enabled and used, the window is enlarged when both sides agree on scaling. */
    pcb->rcv_wnd = pcb->rcv_ann_wnd = TCPWND_MIN16(TCP_WND);
 801bc2a:	68fb      	ldr	r3, [r7, #12]
 801bc2c:	f241 62d0 	movw	r2, #5840	@ 0x16d0
 801bc30:	855a      	strh	r2, [r3, #42]	@ 0x2a
 801bc32:	68fb      	ldr	r3, [r7, #12]
 801bc34:	8d5a      	ldrh	r2, [r3, #42]	@ 0x2a
 801bc36:	68fb      	ldr	r3, [r7, #12]
 801bc38:	851a      	strh	r2, [r3, #40]	@ 0x28
    pcb->ttl = TCP_TTL;
 801bc3a:	68fb      	ldr	r3, [r7, #12]
 801bc3c:	22ff      	movs	r2, #255	@ 0xff
 801bc3e:	72da      	strb	r2, [r3, #11]
    /* As initial send MSS, we use TCP_MSS but limit it to 536.
       The send MSS is updated when an MSS option is received. */
    pcb->mss = INITIAL_MSS;
 801bc40:	68fb      	ldr	r3, [r7, #12]
 801bc42:	f44f 7206 	mov.w	r2, #536	@ 0x218
 801bc46:	865a      	strh	r2, [r3, #50]	@ 0x32
    pcb->rto = 3000 / TCP_SLOW_INTERVAL;
 801bc48:	68fb      	ldr	r3, [r7, #12]
 801bc4a:	2206      	movs	r2, #6
 801bc4c:	f8a3 2040 	strh.w	r2, [r3, #64]	@ 0x40
    pcb->sv = 3000 / TCP_SLOW_INTERVAL;
 801bc50:	68fb      	ldr	r3, [r7, #12]
 801bc52:	2206      	movs	r2, #6
 801bc54:	87da      	strh	r2, [r3, #62]	@ 0x3e
    pcb->rtime = -1;
 801bc56:	68fb      	ldr	r3, [r7, #12]
 801bc58:	f64f 72ff 	movw	r2, #65535	@ 0xffff
 801bc5c:	861a      	strh	r2, [r3, #48]	@ 0x30
    pcb->cwnd = 1;
 801bc5e:	68fb      	ldr	r3, [r7, #12]
 801bc60:	2201      	movs	r2, #1
 801bc62:	f8a3 2048 	strh.w	r2, [r3, #72]	@ 0x48
    pcb->tmr = tcp_ticks;
 801bc66:	4b0d      	ldr	r3, [pc, #52]	@ (801bc9c <tcp_alloc+0xfc>)
 801bc68:	681a      	ldr	r2, [r3, #0]
 801bc6a:	68fb      	ldr	r3, [r7, #12]
 801bc6c:	621a      	str	r2, [r3, #32]
    pcb->last_timer = tcp_timer_ctr;
 801bc6e:	4b0c      	ldr	r3, [pc, #48]	@ (801bca0 <tcp_alloc+0x100>)
 801bc70:	781a      	ldrb	r2, [r3, #0]
 801bc72:	68fb      	ldr	r3, [r7, #12]
 801bc74:	779a      	strb	r2, [r3, #30]
    of using the largest advertised receive window.  We've seen complications with
    receiving TCPs that use window scaling and/or window auto-tuning where the
    initial advertised window is very small and then grows rapidly once the
    connection is established. To avoid these complications, we set ssthresh to the
    largest effective cwnd (amount of in-flight data) that the sender can have. */
    pcb->ssthresh = TCP_SND_BUF;
 801bc76:	68fb      	ldr	r3, [r7, #12]
 801bc78:	f241 62d0 	movw	r2, #5840	@ 0x16d0
 801bc7c:	f8a3 204a 	strh.w	r2, [r3, #74]	@ 0x4a

#if LWIP_CALLBACK_API
    pcb->recv = tcp_recv_null;
 801bc80:	68fb      	ldr	r3, [r7, #12]
 801bc82:	4a08      	ldr	r2, [pc, #32]	@ (801bca4 <tcp_alloc+0x104>)
 801bc84:	f8c3 2084 	str.w	r2, [r3, #132]	@ 0x84
#endif /* LWIP_CALLBACK_API */

    /* Init KEEPALIVE timer */
    pcb->keep_idle  = TCP_KEEPIDLE_DEFAULT;
 801bc88:	68fb      	ldr	r3, [r7, #12]
 801bc8a:	4a07      	ldr	r2, [pc, #28]	@ (801bca8 <tcp_alloc+0x108>)
 801bc8c:	f8c3 2094 	str.w	r2, [r3, #148]	@ 0x94
#if LWIP_TCP_KEEPALIVE
    pcb->keep_intvl = TCP_KEEPINTVL_DEFAULT;
    pcb->keep_cnt   = TCP_KEEPCNT_DEFAULT;
#endif /* LWIP_TCP_KEEPALIVE */
  }
  return pcb;
 801bc90:	68fb      	ldr	r3, [r7, #12]
}
 801bc92:	4618      	mov	r0, r3
 801bc94:	3710      	adds	r7, #16
 801bc96:	46bd      	mov	sp, r7
 801bc98:	bd80      	pop	{r7, pc}
 801bc9a:	bf00      	nop
 801bc9c:	24029fec 	.word	0x24029fec
 801bca0:	2402a002 	.word	0x2402a002
 801bca4:	0801b959 	.word	0x0801b959
 801bca8:	006ddd00 	.word	0x006ddd00

0801bcac <tcp_new_ip_type>:
 * supply @ref IPADDR_TYPE_ANY as argument and bind to @ref IP_ANY_TYPE.
 * @return a new tcp_pcb that initially is in state CLOSED
 */
struct tcp_pcb *
tcp_new_ip_type(u8_t type)
{
 801bcac:	b580      	push	{r7, lr}
 801bcae:	b084      	sub	sp, #16
 801bcb0:	af00      	add	r7, sp, #0
 801bcb2:	4603      	mov	r3, r0
 801bcb4:	71fb      	strb	r3, [r7, #7]
  struct tcp_pcb *pcb;
  pcb = tcp_alloc(TCP_PRIO_NORMAL);
 801bcb6:	2040      	movs	r0, #64	@ 0x40
 801bcb8:	f7ff ff72 	bl	801bba0 <tcp_alloc>
 801bcbc:	60f8      	str	r0, [r7, #12]
    IP_SET_TYPE_VAL(pcb->remote_ip, type);
  }
#else
  LWIP_UNUSED_ARG(type);
#endif /* LWIP_IPV4 && LWIP_IPV6 */
  return pcb;
 801bcbe:	68fb      	ldr	r3, [r7, #12]
}
 801bcc0:	4618      	mov	r0, r3
 801bcc2:	3710      	adds	r7, #16
 801bcc4:	46bd      	mov	sp, r7
 801bcc6:	bd80      	pop	{r7, pc}

0801bcc8 <tcp_arg>:
 * @param pcb tcp_pcb to set the callback argument
 * @param arg void pointer argument to pass to callback functions
 */
void
tcp_arg(struct tcp_pcb *pcb, void *arg)
{
 801bcc8:	b580      	push	{r7, lr}
 801bcca:	b082      	sub	sp, #8
 801bccc:	af00      	add	r7, sp, #0
 801bcce:	6078      	str	r0, [r7, #4]
 801bcd0:	6039      	str	r1, [r7, #0]
  LWIP_ASSERT_CORE_LOCKED();
 801bcd2:	f7f4 f9cd 	bl	8010070 <sys_check_core_locking>
  /* This function is allowed to be called for both listen pcbs and
     connection pcbs. */
  if (pcb != NULL) {
 801bcd6:	687b      	ldr	r3, [r7, #4]
 801bcd8:	2b00      	cmp	r3, #0
 801bcda:	d002      	beq.n	801bce2 <tcp_arg+0x1a>
    pcb->callback_arg = arg;
 801bcdc:	687b      	ldr	r3, [r7, #4]
 801bcde:	683a      	ldr	r2, [r7, #0]
 801bce0:	611a      	str	r2, [r3, #16]
  }
}
 801bce2:	bf00      	nop
 801bce4:	3708      	adds	r7, #8
 801bce6:	46bd      	mov	sp, r7
 801bce8:	bd80      	pop	{r7, pc}
	...

0801bcec <tcp_recv>:
 * @param pcb tcp_pcb to set the recv callback
 * @param recv callback function to call for this pcb when data is received
 */
void
tcp_recv(struct tcp_pcb *pcb, tcp_recv_fn recv)
{
 801bcec:	b580      	push	{r7, lr}
 801bcee:	b082      	sub	sp, #8
 801bcf0:	af00      	add	r7, sp, #0
 801bcf2:	6078      	str	r0, [r7, #4]
 801bcf4:	6039      	str	r1, [r7, #0]
  LWIP_ASSERT_CORE_LOCKED();
 801bcf6:	f7f4 f9bb 	bl	8010070 <sys_check_core_locking>
  if (pcb != NULL) {
 801bcfa:	687b      	ldr	r3, [r7, #4]
 801bcfc:	2b00      	cmp	r3, #0
 801bcfe:	d00e      	beq.n	801bd1e <tcp_recv+0x32>
    LWIP_ASSERT("invalid socket state for recv callback", pcb->state != LISTEN);
 801bd00:	687b      	ldr	r3, [r7, #4]
 801bd02:	7d1b      	ldrb	r3, [r3, #20]
 801bd04:	2b01      	cmp	r3, #1
 801bd06:	d106      	bne.n	801bd16 <tcp_recv+0x2a>
 801bd08:	4b07      	ldr	r3, [pc, #28]	@ (801bd28 <tcp_recv+0x3c>)
 801bd0a:	f240 72df 	movw	r2, #2015	@ 0x7df
 801bd0e:	4907      	ldr	r1, [pc, #28]	@ (801bd2c <tcp_recv+0x40>)
 801bd10:	4807      	ldr	r0, [pc, #28]	@ (801bd30 <tcp_recv+0x44>)
 801bd12:	f00d fbfb 	bl	802950c <iprintf>
    pcb->recv = recv;
 801bd16:	687b      	ldr	r3, [r7, #4]
 801bd18:	683a      	ldr	r2, [r7, #0]
 801bd1a:	f8c3 2084 	str.w	r2, [r3, #132]	@ 0x84
  }
}
 801bd1e:	bf00      	nop
 801bd20:	3708      	adds	r7, #8
 801bd22:	46bd      	mov	sp, r7
 801bd24:	bd80      	pop	{r7, pc}
 801bd26:	bf00      	nop
 801bd28:	0802e13c 	.word	0x0802e13c
 801bd2c:	0802e6d8 	.word	0x0802e6d8
 801bd30:	0802e180 	.word	0x0802e180

0801bd34 <tcp_sent>:
 * @param pcb tcp_pcb to set the sent callback
 * @param sent callback function to call for this pcb when data is successfully sent
 */
void
tcp_sent(struct tcp_pcb *pcb, tcp_sent_fn sent)
{
 801bd34:	b580      	push	{r7, lr}
 801bd36:	b082      	sub	sp, #8
 801bd38:	af00      	add	r7, sp, #0
 801bd3a:	6078      	str	r0, [r7, #4]
 801bd3c:	6039      	str	r1, [r7, #0]
  LWIP_ASSERT_CORE_LOCKED();
 801bd3e:	f7f4 f997 	bl	8010070 <sys_check_core_locking>
  if (pcb != NULL) {
 801bd42:	687b      	ldr	r3, [r7, #4]
 801bd44:	2b00      	cmp	r3, #0
 801bd46:	d00e      	beq.n	801bd66 <tcp_sent+0x32>
    LWIP_ASSERT("invalid socket state for sent callback", pcb->state != LISTEN);
 801bd48:	687b      	ldr	r3, [r7, #4]
 801bd4a:	7d1b      	ldrb	r3, [r3, #20]
 801bd4c:	2b01      	cmp	r3, #1
 801bd4e:	d106      	bne.n	801bd5e <tcp_sent+0x2a>
 801bd50:	4b07      	ldr	r3, [pc, #28]	@ (801bd70 <tcp_sent+0x3c>)
 801bd52:	f240 72f3 	movw	r2, #2035	@ 0x7f3
 801bd56:	4907      	ldr	r1, [pc, #28]	@ (801bd74 <tcp_sent+0x40>)
 801bd58:	4807      	ldr	r0, [pc, #28]	@ (801bd78 <tcp_sent+0x44>)
 801bd5a:	f00d fbd7 	bl	802950c <iprintf>
    pcb->sent = sent;
 801bd5e:	687b      	ldr	r3, [r7, #4]
 801bd60:	683a      	ldr	r2, [r7, #0]
 801bd62:	f8c3 2080 	str.w	r2, [r3, #128]	@ 0x80
  }
}
 801bd66:	bf00      	nop
 801bd68:	3708      	adds	r7, #8
 801bd6a:	46bd      	mov	sp, r7
 801bd6c:	bd80      	pop	{r7, pc}
 801bd6e:	bf00      	nop
 801bd70:	0802e13c 	.word	0x0802e13c
 801bd74:	0802e700 	.word	0x0802e700
 801bd78:	0802e180 	.word	0x0802e180

0801bd7c <tcp_err>:
 * @param err callback function to call for this pcb when a fatal error
 *        has occurred on the connection
 */
void
tcp_err(struct tcp_pcb *pcb, tcp_err_fn err)
{
 801bd7c:	b580      	push	{r7, lr}
 801bd7e:	b082      	sub	sp, #8
 801bd80:	af00      	add	r7, sp, #0
 801bd82:	6078      	str	r0, [r7, #4]
 801bd84:	6039      	str	r1, [r7, #0]
  LWIP_ASSERT_CORE_LOCKED();
 801bd86:	f7f4 f973 	bl	8010070 <sys_check_core_locking>
  if (pcb != NULL) {
 801bd8a:	687b      	ldr	r3, [r7, #4]
 801bd8c:	2b00      	cmp	r3, #0
 801bd8e:	d00e      	beq.n	801bdae <tcp_err+0x32>
    LWIP_ASSERT("invalid socket state for err callback", pcb->state != LISTEN);
 801bd90:	687b      	ldr	r3, [r7, #4]
 801bd92:	7d1b      	ldrb	r3, [r3, #20]
 801bd94:	2b01      	cmp	r3, #1
 801bd96:	d106      	bne.n	801bda6 <tcp_err+0x2a>
 801bd98:	4b07      	ldr	r3, [pc, #28]	@ (801bdb8 <tcp_err+0x3c>)
 801bd9a:	f640 020d 	movw	r2, #2061	@ 0x80d
 801bd9e:	4907      	ldr	r1, [pc, #28]	@ (801bdbc <tcp_err+0x40>)
 801bda0:	4807      	ldr	r0, [pc, #28]	@ (801bdc0 <tcp_err+0x44>)
 801bda2:	f00d fbb3 	bl	802950c <iprintf>
    pcb->errf = err;
 801bda6:	687b      	ldr	r3, [r7, #4]
 801bda8:	683a      	ldr	r2, [r7, #0]
 801bdaa:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
  }
}
 801bdae:	bf00      	nop
 801bdb0:	3708      	adds	r7, #8
 801bdb2:	46bd      	mov	sp, r7
 801bdb4:	bd80      	pop	{r7, pc}
 801bdb6:	bf00      	nop
 801bdb8:	0802e13c 	.word	0x0802e13c
 801bdbc:	0802e728 	.word	0x0802e728
 801bdc0:	0802e180 	.word	0x0802e180

0801bdc4 <tcp_accept>:
 * @param accept callback function to call for this pcb when LISTENing
 *        connection has been connected to another host
 */
void
tcp_accept(struct tcp_pcb *pcb, tcp_accept_fn accept)
{
 801bdc4:	b580      	push	{r7, lr}
 801bdc6:	b084      	sub	sp, #16
 801bdc8:	af00      	add	r7, sp, #0
 801bdca:	6078      	str	r0, [r7, #4]
 801bdcc:	6039      	str	r1, [r7, #0]
  LWIP_ASSERT_CORE_LOCKED();
 801bdce:	f7f4 f94f 	bl	8010070 <sys_check_core_locking>
  if ((pcb != NULL) && (pcb->state == LISTEN)) {
 801bdd2:	687b      	ldr	r3, [r7, #4]
 801bdd4:	2b00      	cmp	r3, #0
 801bdd6:	d008      	beq.n	801bdea <tcp_accept+0x26>
 801bdd8:	687b      	ldr	r3, [r7, #4]
 801bdda:	7d1b      	ldrb	r3, [r3, #20]
 801bddc:	2b01      	cmp	r3, #1
 801bdde:	d104      	bne.n	801bdea <tcp_accept+0x26>
    struct tcp_pcb_listen *lpcb = (struct tcp_pcb_listen *)pcb;
 801bde0:	687b      	ldr	r3, [r7, #4]
 801bde2:	60fb      	str	r3, [r7, #12]
    lpcb->accept = accept;
 801bde4:	68fb      	ldr	r3, [r7, #12]
 801bde6:	683a      	ldr	r2, [r7, #0]
 801bde8:	619a      	str	r2, [r3, #24]
  }
}
 801bdea:	bf00      	nop
 801bdec:	3710      	adds	r7, #16
 801bdee:	46bd      	mov	sp, r7
 801bdf0:	bd80      	pop	{r7, pc}
	...

0801bdf4 <tcp_poll>:
 * the application may use the polling functionality to call tcp_write()
 * again when the connection has been idle for a while.
 */
void
tcp_poll(struct tcp_pcb *pcb, tcp_poll_fn poll, u8_t interval)
{
 801bdf4:	b580      	push	{r7, lr}
 801bdf6:	b084      	sub	sp, #16
 801bdf8:	af00      	add	r7, sp, #0
 801bdfa:	60f8      	str	r0, [r7, #12]
 801bdfc:	60b9      	str	r1, [r7, #8]
 801bdfe:	4613      	mov	r3, r2
 801be00:	71fb      	strb	r3, [r7, #7]
  LWIP_ASSERT_CORE_LOCKED();
 801be02:	f7f4 f935 	bl	8010070 <sys_check_core_locking>

  LWIP_ERROR("tcp_poll: invalid pcb", pcb != NULL, return);
 801be06:	68fb      	ldr	r3, [r7, #12]
 801be08:	2b00      	cmp	r3, #0
 801be0a:	d107      	bne.n	801be1c <tcp_poll+0x28>
 801be0c:	4b0e      	ldr	r3, [pc, #56]	@ (801be48 <tcp_poll+0x54>)
 801be0e:	f640 023d 	movw	r2, #2109	@ 0x83d
 801be12:	490e      	ldr	r1, [pc, #56]	@ (801be4c <tcp_poll+0x58>)
 801be14:	480e      	ldr	r0, [pc, #56]	@ (801be50 <tcp_poll+0x5c>)
 801be16:	f00d fb79 	bl	802950c <iprintf>
 801be1a:	e011      	b.n	801be40 <tcp_poll+0x4c>
  LWIP_ASSERT("invalid socket state for poll", pcb->state != LISTEN);
 801be1c:	68fb      	ldr	r3, [r7, #12]
 801be1e:	7d1b      	ldrb	r3, [r3, #20]
 801be20:	2b01      	cmp	r3, #1
 801be22:	d106      	bne.n	801be32 <tcp_poll+0x3e>
 801be24:	4b08      	ldr	r3, [pc, #32]	@ (801be48 <tcp_poll+0x54>)
 801be26:	f640 023e 	movw	r2, #2110	@ 0x83e
 801be2a:	490a      	ldr	r1, [pc, #40]	@ (801be54 <tcp_poll+0x60>)
 801be2c:	4808      	ldr	r0, [pc, #32]	@ (801be50 <tcp_poll+0x5c>)
 801be2e:	f00d fb6d 	bl	802950c <iprintf>

#if LWIP_CALLBACK_API
  pcb->poll = poll;
 801be32:	68fb      	ldr	r3, [r7, #12]
 801be34:	68ba      	ldr	r2, [r7, #8]
 801be36:	f8c3 208c 	str.w	r2, [r3, #140]	@ 0x8c
#else /* LWIP_CALLBACK_API */
  LWIP_UNUSED_ARG(poll);
#endif /* LWIP_CALLBACK_API */
  pcb->pollinterval = interval;
 801be3a:	68fb      	ldr	r3, [r7, #12]
 801be3c:	79fa      	ldrb	r2, [r7, #7]
 801be3e:	775a      	strb	r2, [r3, #29]
}
 801be40:	3710      	adds	r7, #16
 801be42:	46bd      	mov	sp, r7
 801be44:	bd80      	pop	{r7, pc}
 801be46:	bf00      	nop
 801be48:	0802e13c 	.word	0x0802e13c
 801be4c:	0802e750 	.word	0x0802e750
 801be50:	0802e180 	.word	0x0802e180
 801be54:	0802e768 	.word	0x0802e768

0801be58 <tcp_pcb_purge>:
 *
 * @param pcb tcp_pcb to purge. The pcb itself is not deallocated!
 */
void
tcp_pcb_purge(struct tcp_pcb *pcb)
{
 801be58:	b580      	push	{r7, lr}
 801be5a:	b082      	sub	sp, #8
 801be5c:	af00      	add	r7, sp, #0
 801be5e:	6078      	str	r0, [r7, #4]
  LWIP_ERROR("tcp_pcb_purge: invalid pcb", pcb != NULL, return);
 801be60:	687b      	ldr	r3, [r7, #4]
 801be62:	2b00      	cmp	r3, #0
 801be64:	d107      	bne.n	801be76 <tcp_pcb_purge+0x1e>
 801be66:	4b21      	ldr	r3, [pc, #132]	@ (801beec <tcp_pcb_purge+0x94>)
 801be68:	f640 0251 	movw	r2, #2129	@ 0x851
 801be6c:	4920      	ldr	r1, [pc, #128]	@ (801bef0 <tcp_pcb_purge+0x98>)
 801be6e:	4821      	ldr	r0, [pc, #132]	@ (801bef4 <tcp_pcb_purge+0x9c>)
 801be70:	f00d fb4c 	bl	802950c <iprintf>
 801be74:	e037      	b.n	801bee6 <tcp_pcb_purge+0x8e>

  if (pcb->state != CLOSED &&
 801be76:	687b      	ldr	r3, [r7, #4]
 801be78:	7d1b      	ldrb	r3, [r3, #20]
 801be7a:	2b00      	cmp	r3, #0
 801be7c:	d033      	beq.n	801bee6 <tcp_pcb_purge+0x8e>
      pcb->state != TIME_WAIT &&
 801be7e:	687b      	ldr	r3, [r7, #4]
 801be80:	7d1b      	ldrb	r3, [r3, #20]
  if (pcb->state != CLOSED &&
 801be82:	2b0a      	cmp	r3, #10
 801be84:	d02f      	beq.n	801bee6 <tcp_pcb_purge+0x8e>
      pcb->state != LISTEN) {
 801be86:	687b      	ldr	r3, [r7, #4]
 801be88:	7d1b      	ldrb	r3, [r3, #20]
      pcb->state != TIME_WAIT &&
 801be8a:	2b01      	cmp	r3, #1
 801be8c:	d02b      	beq.n	801bee6 <tcp_pcb_purge+0x8e>

    LWIP_DEBUGF(TCP_DEBUG, ("tcp_pcb_purge\n"));

    tcp_backlog_accepted(pcb);

    if (pcb->refused_data != NULL) {
 801be8e:	687b      	ldr	r3, [r7, #4]
 801be90:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 801be92:	2b00      	cmp	r3, #0
 801be94:	d007      	beq.n	801bea6 <tcp_pcb_purge+0x4e>
      LWIP_DEBUGF(TCP_DEBUG, ("tcp_pcb_purge: data left on ->refused_data\n"));
      pbuf_free(pcb->refused_data);
 801be96:	687b      	ldr	r3, [r7, #4]
 801be98:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 801be9a:	4618      	mov	r0, r3
 801be9c:	f7fe f8be 	bl	801a01c <pbuf_free>
      pcb->refused_data = NULL;
 801bea0:	687b      	ldr	r3, [r7, #4]
 801bea2:	2200      	movs	r2, #0
 801bea4:	679a      	str	r2, [r3, #120]	@ 0x78
    }
    if (pcb->unacked != NULL) {
      LWIP_DEBUGF(TCP_DEBUG, ("tcp_pcb_purge: data left on ->unacked\n"));
    }
#if TCP_QUEUE_OOSEQ
    if (pcb->ooseq != NULL) {
 801bea6:	687b      	ldr	r3, [r7, #4]
 801bea8:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801beaa:	2b00      	cmp	r3, #0
 801beac:	d002      	beq.n	801beb4 <tcp_pcb_purge+0x5c>
      LWIP_DEBUGF(TCP_DEBUG, ("tcp_pcb_purge: data left on ->ooseq\n"));
      tcp_free_ooseq(pcb);
 801beae:	6878      	ldr	r0, [r7, #4]
 801beb0:	f000 f986 	bl	801c1c0 <tcp_free_ooseq>
    }
#endif /* TCP_QUEUE_OOSEQ */

    /* Stop the retransmission timer as it will expect data on unacked
       queue if it fires */
    pcb->rtime = -1;
 801beb4:	687b      	ldr	r3, [r7, #4]
 801beb6:	f64f 72ff 	movw	r2, #65535	@ 0xffff
 801beba:	861a      	strh	r2, [r3, #48]	@ 0x30

    tcp_segs_free(pcb->unsent);
 801bebc:	687b      	ldr	r3, [r7, #4]
 801bebe:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801bec0:	4618      	mov	r0, r3
 801bec2:	f7ff fcef 	bl	801b8a4 <tcp_segs_free>
    tcp_segs_free(pcb->unacked);
 801bec6:	687b      	ldr	r3, [r7, #4]
 801bec8:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801beca:	4618      	mov	r0, r3
 801becc:	f7ff fcea 	bl	801b8a4 <tcp_segs_free>
    pcb->unacked = pcb->unsent = NULL;
 801bed0:	687b      	ldr	r3, [r7, #4]
 801bed2:	2200      	movs	r2, #0
 801bed4:	66da      	str	r2, [r3, #108]	@ 0x6c
 801bed6:	687b      	ldr	r3, [r7, #4]
 801bed8:	6eda      	ldr	r2, [r3, #108]	@ 0x6c
 801beda:	687b      	ldr	r3, [r7, #4]
 801bedc:	671a      	str	r2, [r3, #112]	@ 0x70
#if TCP_OVERSIZE
    pcb->unsent_oversize = 0;
 801bede:	687b      	ldr	r3, [r7, #4]
 801bee0:	2200      	movs	r2, #0
 801bee2:	f8a3 2068 	strh.w	r2, [r3, #104]	@ 0x68
#endif /* TCP_OVERSIZE */
  }
}
 801bee6:	3708      	adds	r7, #8
 801bee8:	46bd      	mov	sp, r7
 801beea:	bd80      	pop	{r7, pc}
 801beec:	0802e13c 	.word	0x0802e13c
 801bef0:	0802e788 	.word	0x0802e788
 801bef4:	0802e180 	.word	0x0802e180

0801bef8 <tcp_pcb_remove>:
 * @param pcblist PCB list to purge.
 * @param pcb tcp_pcb to purge. The pcb itself is NOT deallocated!
 */
void
tcp_pcb_remove(struct tcp_pcb **pcblist, struct tcp_pcb *pcb)
{
 801bef8:	b580      	push	{r7, lr}
 801befa:	b084      	sub	sp, #16
 801befc:	af00      	add	r7, sp, #0
 801befe:	6078      	str	r0, [r7, #4]
 801bf00:	6039      	str	r1, [r7, #0]
  LWIP_ASSERT("tcp_pcb_remove: invalid pcb", pcb != NULL);
 801bf02:	683b      	ldr	r3, [r7, #0]
 801bf04:	2b00      	cmp	r3, #0
 801bf06:	d106      	bne.n	801bf16 <tcp_pcb_remove+0x1e>
 801bf08:	4b3e      	ldr	r3, [pc, #248]	@ (801c004 <tcp_pcb_remove+0x10c>)
 801bf0a:	f640 0283 	movw	r2, #2179	@ 0x883
 801bf0e:	493e      	ldr	r1, [pc, #248]	@ (801c008 <tcp_pcb_remove+0x110>)
 801bf10:	483e      	ldr	r0, [pc, #248]	@ (801c00c <tcp_pcb_remove+0x114>)
 801bf12:	f00d fafb 	bl	802950c <iprintf>
  LWIP_ASSERT("tcp_pcb_remove: invalid pcblist", pcblist != NULL);
 801bf16:	687b      	ldr	r3, [r7, #4]
 801bf18:	2b00      	cmp	r3, #0
 801bf1a:	d106      	bne.n	801bf2a <tcp_pcb_remove+0x32>
 801bf1c:	4b39      	ldr	r3, [pc, #228]	@ (801c004 <tcp_pcb_remove+0x10c>)
 801bf1e:	f640 0284 	movw	r2, #2180	@ 0x884
 801bf22:	493b      	ldr	r1, [pc, #236]	@ (801c010 <tcp_pcb_remove+0x118>)
 801bf24:	4839      	ldr	r0, [pc, #228]	@ (801c00c <tcp_pcb_remove+0x114>)
 801bf26:	f00d faf1 	bl	802950c <iprintf>

  TCP_RMV(pcblist, pcb);
 801bf2a:	687b      	ldr	r3, [r7, #4]
 801bf2c:	681b      	ldr	r3, [r3, #0]
 801bf2e:	683a      	ldr	r2, [r7, #0]
 801bf30:	429a      	cmp	r2, r3
 801bf32:	d105      	bne.n	801bf40 <tcp_pcb_remove+0x48>
 801bf34:	687b      	ldr	r3, [r7, #4]
 801bf36:	681b      	ldr	r3, [r3, #0]
 801bf38:	68da      	ldr	r2, [r3, #12]
 801bf3a:	687b      	ldr	r3, [r7, #4]
 801bf3c:	601a      	str	r2, [r3, #0]
 801bf3e:	e013      	b.n	801bf68 <tcp_pcb_remove+0x70>
 801bf40:	687b      	ldr	r3, [r7, #4]
 801bf42:	681b      	ldr	r3, [r3, #0]
 801bf44:	60fb      	str	r3, [r7, #12]
 801bf46:	e00c      	b.n	801bf62 <tcp_pcb_remove+0x6a>
 801bf48:	68fb      	ldr	r3, [r7, #12]
 801bf4a:	68db      	ldr	r3, [r3, #12]
 801bf4c:	683a      	ldr	r2, [r7, #0]
 801bf4e:	429a      	cmp	r2, r3
 801bf50:	d104      	bne.n	801bf5c <tcp_pcb_remove+0x64>
 801bf52:	683b      	ldr	r3, [r7, #0]
 801bf54:	68da      	ldr	r2, [r3, #12]
 801bf56:	68fb      	ldr	r3, [r7, #12]
 801bf58:	60da      	str	r2, [r3, #12]
 801bf5a:	e005      	b.n	801bf68 <tcp_pcb_remove+0x70>
 801bf5c:	68fb      	ldr	r3, [r7, #12]
 801bf5e:	68db      	ldr	r3, [r3, #12]
 801bf60:	60fb      	str	r3, [r7, #12]
 801bf62:	68fb      	ldr	r3, [r7, #12]
 801bf64:	2b00      	cmp	r3, #0
 801bf66:	d1ef      	bne.n	801bf48 <tcp_pcb_remove+0x50>
 801bf68:	683b      	ldr	r3, [r7, #0]
 801bf6a:	2200      	movs	r2, #0
 801bf6c:	60da      	str	r2, [r3, #12]

  tcp_pcb_purge(pcb);
 801bf6e:	6838      	ldr	r0, [r7, #0]
 801bf70:	f7ff ff72 	bl	801be58 <tcp_pcb_purge>

  /* if there is an outstanding delayed ACKs, send it */
  if ((pcb->state != TIME_WAIT) &&
 801bf74:	683b      	ldr	r3, [r7, #0]
 801bf76:	7d1b      	ldrb	r3, [r3, #20]
 801bf78:	2b0a      	cmp	r3, #10
 801bf7a:	d013      	beq.n	801bfa4 <tcp_pcb_remove+0xac>
      (pcb->state != LISTEN) &&
 801bf7c:	683b      	ldr	r3, [r7, #0]
 801bf7e:	7d1b      	ldrb	r3, [r3, #20]
  if ((pcb->state != TIME_WAIT) &&
 801bf80:	2b01      	cmp	r3, #1
 801bf82:	d00f      	beq.n	801bfa4 <tcp_pcb_remove+0xac>
      (pcb->flags & TF_ACK_DELAY)) {
 801bf84:	683b      	ldr	r3, [r7, #0]
 801bf86:	8b5b      	ldrh	r3, [r3, #26]
 801bf88:	f003 0301 	and.w	r3, r3, #1
      (pcb->state != LISTEN) &&
 801bf8c:	2b00      	cmp	r3, #0
 801bf8e:	d009      	beq.n	801bfa4 <tcp_pcb_remove+0xac>
    tcp_ack_now(pcb);
 801bf90:	683b      	ldr	r3, [r7, #0]
 801bf92:	8b5b      	ldrh	r3, [r3, #26]
 801bf94:	f043 0302 	orr.w	r3, r3, #2
 801bf98:	b29a      	uxth	r2, r3
 801bf9a:	683b      	ldr	r3, [r7, #0]
 801bf9c:	835a      	strh	r2, [r3, #26]
    tcp_output(pcb);
 801bf9e:	6838      	ldr	r0, [r7, #0]
 801bfa0:	f003 fc28 	bl	801f7f4 <tcp_output>
  }

  if (pcb->state != LISTEN) {
 801bfa4:	683b      	ldr	r3, [r7, #0]
 801bfa6:	7d1b      	ldrb	r3, [r3, #20]
 801bfa8:	2b01      	cmp	r3, #1
 801bfaa:	d020      	beq.n	801bfee <tcp_pcb_remove+0xf6>
    LWIP_ASSERT("unsent segments leaking", pcb->unsent == NULL);
 801bfac:	683b      	ldr	r3, [r7, #0]
 801bfae:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801bfb0:	2b00      	cmp	r3, #0
 801bfb2:	d006      	beq.n	801bfc2 <tcp_pcb_remove+0xca>
 801bfb4:	4b13      	ldr	r3, [pc, #76]	@ (801c004 <tcp_pcb_remove+0x10c>)
 801bfb6:	f640 0293 	movw	r2, #2195	@ 0x893
 801bfba:	4916      	ldr	r1, [pc, #88]	@ (801c014 <tcp_pcb_remove+0x11c>)
 801bfbc:	4813      	ldr	r0, [pc, #76]	@ (801c00c <tcp_pcb_remove+0x114>)
 801bfbe:	f00d faa5 	bl	802950c <iprintf>
    LWIP_ASSERT("unacked segments leaking", pcb->unacked == NULL);
 801bfc2:	683b      	ldr	r3, [r7, #0]
 801bfc4:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801bfc6:	2b00      	cmp	r3, #0
 801bfc8:	d006      	beq.n	801bfd8 <tcp_pcb_remove+0xe0>
 801bfca:	4b0e      	ldr	r3, [pc, #56]	@ (801c004 <tcp_pcb_remove+0x10c>)
 801bfcc:	f640 0294 	movw	r2, #2196	@ 0x894
 801bfd0:	4911      	ldr	r1, [pc, #68]	@ (801c018 <tcp_pcb_remove+0x120>)
 801bfd2:	480e      	ldr	r0, [pc, #56]	@ (801c00c <tcp_pcb_remove+0x114>)
 801bfd4:	f00d fa9a 	bl	802950c <iprintf>
#if TCP_QUEUE_OOSEQ
    LWIP_ASSERT("ooseq segments leaking", pcb->ooseq == NULL);
 801bfd8:	683b      	ldr	r3, [r7, #0]
 801bfda:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801bfdc:	2b00      	cmp	r3, #0
 801bfde:	d006      	beq.n	801bfee <tcp_pcb_remove+0xf6>
 801bfe0:	4b08      	ldr	r3, [pc, #32]	@ (801c004 <tcp_pcb_remove+0x10c>)
 801bfe2:	f640 0296 	movw	r2, #2198	@ 0x896
 801bfe6:	490d      	ldr	r1, [pc, #52]	@ (801c01c <tcp_pcb_remove+0x124>)
 801bfe8:	4808      	ldr	r0, [pc, #32]	@ (801c00c <tcp_pcb_remove+0x114>)
 801bfea:	f00d fa8f 	bl	802950c <iprintf>
#endif /* TCP_QUEUE_OOSEQ */
  }

  pcb->state = CLOSED;
 801bfee:	683b      	ldr	r3, [r7, #0]
 801bff0:	2200      	movs	r2, #0
 801bff2:	751a      	strb	r2, [r3, #20]
  /* reset the local port to prevent the pcb from being 'bound' */
  pcb->local_port = 0;
 801bff4:	683b      	ldr	r3, [r7, #0]
 801bff6:	2200      	movs	r2, #0
 801bff8:	82da      	strh	r2, [r3, #22]

  LWIP_ASSERT("tcp_pcb_remove: tcp_pcbs_sane()", tcp_pcbs_sane());
}
 801bffa:	bf00      	nop
 801bffc:	3710      	adds	r7, #16
 801bffe:	46bd      	mov	sp, r7
 801c000:	bd80      	pop	{r7, pc}
 801c002:	bf00      	nop
 801c004:	0802e13c 	.word	0x0802e13c
 801c008:	0802e7a4 	.word	0x0802e7a4
 801c00c:	0802e180 	.word	0x0802e180
 801c010:	0802e7c0 	.word	0x0802e7c0
 801c014:	0802e7e0 	.word	0x0802e7e0
 801c018:	0802e7f8 	.word	0x0802e7f8
 801c01c:	0802e814 	.word	0x0802e814

0801c020 <tcp_next_iss>:
 *
 * @return u32_t pseudo random sequence number
 */
u32_t
tcp_next_iss(struct tcp_pcb *pcb)
{
 801c020:	b580      	push	{r7, lr}
 801c022:	b082      	sub	sp, #8
 801c024:	af00      	add	r7, sp, #0
 801c026:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT("tcp_next_iss: invalid pcb", pcb != NULL);
  return LWIP_HOOK_TCP_ISN(&pcb->local_ip, pcb->local_port, &pcb->remote_ip, pcb->remote_port);
#else /* LWIP_HOOK_TCP_ISN */
  static u32_t iss = 6510;

  LWIP_ASSERT("tcp_next_iss: invalid pcb", pcb != NULL);
 801c028:	687b      	ldr	r3, [r7, #4]
 801c02a:	2b00      	cmp	r3, #0
 801c02c:	d106      	bne.n	801c03c <tcp_next_iss+0x1c>
 801c02e:	4b0a      	ldr	r3, [pc, #40]	@ (801c058 <tcp_next_iss+0x38>)
 801c030:	f640 02af 	movw	r2, #2223	@ 0x8af
 801c034:	4909      	ldr	r1, [pc, #36]	@ (801c05c <tcp_next_iss+0x3c>)
 801c036:	480a      	ldr	r0, [pc, #40]	@ (801c060 <tcp_next_iss+0x40>)
 801c038:	f00d fa68 	bl	802950c <iprintf>
  LWIP_UNUSED_ARG(pcb);

  iss += tcp_ticks;       /* XXX */
 801c03c:	4b09      	ldr	r3, [pc, #36]	@ (801c064 <tcp_next_iss+0x44>)
 801c03e:	681a      	ldr	r2, [r3, #0]
 801c040:	4b09      	ldr	r3, [pc, #36]	@ (801c068 <tcp_next_iss+0x48>)
 801c042:	681b      	ldr	r3, [r3, #0]
 801c044:	4413      	add	r3, r2
 801c046:	4a07      	ldr	r2, [pc, #28]	@ (801c064 <tcp_next_iss+0x44>)
 801c048:	6013      	str	r3, [r2, #0]
  return iss;
 801c04a:	4b06      	ldr	r3, [pc, #24]	@ (801c064 <tcp_next_iss+0x44>)
 801c04c:	681b      	ldr	r3, [r3, #0]
#endif /* LWIP_HOOK_TCP_ISN */
}
 801c04e:	4618      	mov	r0, r3
 801c050:	3708      	adds	r7, #8
 801c052:	46bd      	mov	sp, r7
 801c054:	bd80      	pop	{r7, pc}
 801c056:	bf00      	nop
 801c058:	0802e13c 	.word	0x0802e13c
 801c05c:	0802e82c 	.word	0x0802e82c
 801c060:	0802e180 	.word	0x0802e180
 801c064:	2400003c 	.word	0x2400003c
 801c068:	24029fec 	.word	0x24029fec

0801c06c <tcp_eff_send_mss_netif>:
 * by calculating the minimum of TCP_MSS and the mtu (if set) of the target
 * netif (if not NULL).
 */
u16_t
tcp_eff_send_mss_netif(u16_t sendmss, struct netif *outif, const ip_addr_t *dest)
{
 801c06c:	b580      	push	{r7, lr}
 801c06e:	b086      	sub	sp, #24
 801c070:	af00      	add	r7, sp, #0
 801c072:	4603      	mov	r3, r0
 801c074:	60b9      	str	r1, [r7, #8]
 801c076:	607a      	str	r2, [r7, #4]
 801c078:	81fb      	strh	r3, [r7, #14]
  u16_t mss_s;
  u16_t mtu;

  LWIP_UNUSED_ARG(dest); /* in case IPv6 is disabled */

  LWIP_ASSERT("tcp_eff_send_mss_netif: invalid dst_ip", dest != NULL);
 801c07a:	687b      	ldr	r3, [r7, #4]
 801c07c:	2b00      	cmp	r3, #0
 801c07e:	d106      	bne.n	801c08e <tcp_eff_send_mss_netif+0x22>
 801c080:	4b14      	ldr	r3, [pc, #80]	@ (801c0d4 <tcp_eff_send_mss_netif+0x68>)
 801c082:	f640 02c5 	movw	r2, #2245	@ 0x8c5
 801c086:	4914      	ldr	r1, [pc, #80]	@ (801c0d8 <tcp_eff_send_mss_netif+0x6c>)
 801c088:	4814      	ldr	r0, [pc, #80]	@ (801c0dc <tcp_eff_send_mss_netif+0x70>)
 801c08a:	f00d fa3f 	bl	802950c <iprintf>
  else
#endif /* LWIP_IPV4 */
#endif /* LWIP_IPV6 */
#if LWIP_IPV4
  {
    if (outif == NULL) {
 801c08e:	68bb      	ldr	r3, [r7, #8]
 801c090:	2b00      	cmp	r3, #0
 801c092:	d101      	bne.n	801c098 <tcp_eff_send_mss_netif+0x2c>
      return sendmss;
 801c094:	89fb      	ldrh	r3, [r7, #14]
 801c096:	e019      	b.n	801c0cc <tcp_eff_send_mss_netif+0x60>
    }
    mtu = outif->mtu;
 801c098:	68bb      	ldr	r3, [r7, #8]
 801c09a:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 801c09c:	82fb      	strh	r3, [r7, #22]
  }
#endif /* LWIP_IPV4 */

  if (mtu != 0) {
 801c09e:	8afb      	ldrh	r3, [r7, #22]
 801c0a0:	2b00      	cmp	r3, #0
 801c0a2:	d012      	beq.n	801c0ca <tcp_eff_send_mss_netif+0x5e>
    else
#endif /* LWIP_IPV4 */
#endif /* LWIP_IPV6 */
#if LWIP_IPV4
    {
      offset = IP_HLEN + TCP_HLEN;
 801c0a4:	2328      	movs	r3, #40	@ 0x28
 801c0a6:	82bb      	strh	r3, [r7, #20]
    }
#endif /* LWIP_IPV4 */
    mss_s = (mtu > offset) ? (u16_t)(mtu - offset) : 0;
 801c0a8:	8afa      	ldrh	r2, [r7, #22]
 801c0aa:	8abb      	ldrh	r3, [r7, #20]
 801c0ac:	429a      	cmp	r2, r3
 801c0ae:	d904      	bls.n	801c0ba <tcp_eff_send_mss_netif+0x4e>
 801c0b0:	8afa      	ldrh	r2, [r7, #22]
 801c0b2:	8abb      	ldrh	r3, [r7, #20]
 801c0b4:	1ad3      	subs	r3, r2, r3
 801c0b6:	b29b      	uxth	r3, r3
 801c0b8:	e000      	b.n	801c0bc <tcp_eff_send_mss_netif+0x50>
 801c0ba:	2300      	movs	r3, #0
 801c0bc:	827b      	strh	r3, [r7, #18]
    /* RFC 1122, chap 4.2.2.6:
     * Eff.snd.MSS = min(SendMSS+20, MMS_S) - TCPhdrsize - IPoptionsize
     * We correct for TCP options in tcp_write(), and don't support IP options.
     */
    sendmss = LWIP_MIN(sendmss, mss_s);
 801c0be:	8a7a      	ldrh	r2, [r7, #18]
 801c0c0:	89fb      	ldrh	r3, [r7, #14]
 801c0c2:	4293      	cmp	r3, r2
 801c0c4:	bf28      	it	cs
 801c0c6:	4613      	movcs	r3, r2
 801c0c8:	81fb      	strh	r3, [r7, #14]
  }
  return sendmss;
 801c0ca:	89fb      	ldrh	r3, [r7, #14]
}
 801c0cc:	4618      	mov	r0, r3
 801c0ce:	3718      	adds	r7, #24
 801c0d0:	46bd      	mov	sp, r7
 801c0d2:	bd80      	pop	{r7, pc}
 801c0d4:	0802e13c 	.word	0x0802e13c
 801c0d8:	0802e848 	.word	0x0802e848
 801c0dc:	0802e180 	.word	0x0802e180

0801c0e0 <tcp_netif_ip_addr_changed_pcblist>:
#endif /* TCP_CALCULATE_EFF_SEND_MSS */

/** Helper function for tcp_netif_ip_addr_changed() that iterates a pcb list */
static void
tcp_netif_ip_addr_changed_pcblist(const ip_addr_t *old_addr, struct tcp_pcb *pcb_list)
{
 801c0e0:	b580      	push	{r7, lr}
 801c0e2:	b084      	sub	sp, #16
 801c0e4:	af00      	add	r7, sp, #0
 801c0e6:	6078      	str	r0, [r7, #4]
 801c0e8:	6039      	str	r1, [r7, #0]
  struct tcp_pcb *pcb;
  pcb = pcb_list;
 801c0ea:	683b      	ldr	r3, [r7, #0]
 801c0ec:	60fb      	str	r3, [r7, #12]

  LWIP_ASSERT("tcp_netif_ip_addr_changed_pcblist: invalid old_addr", old_addr != NULL);
 801c0ee:	687b      	ldr	r3, [r7, #4]
 801c0f0:	2b00      	cmp	r3, #0
 801c0f2:	d119      	bne.n	801c128 <tcp_netif_ip_addr_changed_pcblist+0x48>
 801c0f4:	4b10      	ldr	r3, [pc, #64]	@ (801c138 <tcp_netif_ip_addr_changed_pcblist+0x58>)
 801c0f6:	f44f 6210 	mov.w	r2, #2304	@ 0x900
 801c0fa:	4910      	ldr	r1, [pc, #64]	@ (801c13c <tcp_netif_ip_addr_changed_pcblist+0x5c>)
 801c0fc:	4810      	ldr	r0, [pc, #64]	@ (801c140 <tcp_netif_ip_addr_changed_pcblist+0x60>)
 801c0fe:	f00d fa05 	bl	802950c <iprintf>

  while (pcb != NULL) {
 801c102:	e011      	b.n	801c128 <tcp_netif_ip_addr_changed_pcblist+0x48>
    /* PCB bound to current local interface address? */
    if (ip_addr_cmp(&pcb->local_ip, old_addr)
 801c104:	68fb      	ldr	r3, [r7, #12]
 801c106:	681a      	ldr	r2, [r3, #0]
 801c108:	687b      	ldr	r3, [r7, #4]
 801c10a:	681b      	ldr	r3, [r3, #0]
 801c10c:	429a      	cmp	r2, r3
 801c10e:	d108      	bne.n	801c122 <tcp_netif_ip_addr_changed_pcblist+0x42>
        /* connections to link-local addresses must persist (RFC3927 ch. 1.9) */
        && (!IP_IS_V4_VAL(pcb->local_ip) || !ip4_addr_islinklocal(ip_2_ip4(&pcb->local_ip)))
#endif /* LWIP_AUTOIP */
       ) {
      /* this connection must be aborted */
      struct tcp_pcb *next = pcb->next;
 801c110:	68fb      	ldr	r3, [r7, #12]
 801c112:	68db      	ldr	r3, [r3, #12]
 801c114:	60bb      	str	r3, [r7, #8]
      LWIP_DEBUGF(NETIF_DEBUG | LWIP_DBG_STATE, ("netif_set_ipaddr: aborting TCP pcb %p\n", (void *)pcb));
      tcp_abort(pcb);
 801c116:	68f8      	ldr	r0, [r7, #12]
 801c118:	f7fe fd86 	bl	801ac28 <tcp_abort>
      pcb = next;
 801c11c:	68bb      	ldr	r3, [r7, #8]
 801c11e:	60fb      	str	r3, [r7, #12]
 801c120:	e002      	b.n	801c128 <tcp_netif_ip_addr_changed_pcblist+0x48>
    } else {
      pcb = pcb->next;
 801c122:	68fb      	ldr	r3, [r7, #12]
 801c124:	68db      	ldr	r3, [r3, #12]
 801c126:	60fb      	str	r3, [r7, #12]
  while (pcb != NULL) {
 801c128:	68fb      	ldr	r3, [r7, #12]
 801c12a:	2b00      	cmp	r3, #0
 801c12c:	d1ea      	bne.n	801c104 <tcp_netif_ip_addr_changed_pcblist+0x24>
    }
  }
}
 801c12e:	bf00      	nop
 801c130:	bf00      	nop
 801c132:	3710      	adds	r7, #16
 801c134:	46bd      	mov	sp, r7
 801c136:	bd80      	pop	{r7, pc}
 801c138:	0802e13c 	.word	0x0802e13c
 801c13c:	0802e870 	.word	0x0802e870
 801c140:	0802e180 	.word	0x0802e180

0801c144 <tcp_netif_ip_addr_changed>:
 * @param old_addr IP address of the netif before change
 * @param new_addr IP address of the netif after change or NULL if netif has been removed
 */
void
tcp_netif_ip_addr_changed(const ip_addr_t *old_addr, const ip_addr_t *new_addr)
{
 801c144:	b580      	push	{r7, lr}
 801c146:	b084      	sub	sp, #16
 801c148:	af00      	add	r7, sp, #0
 801c14a:	6078      	str	r0, [r7, #4]
 801c14c:	6039      	str	r1, [r7, #0]
  struct tcp_pcb_listen *lpcb;

  if (!ip_addr_isany(old_addr)) {
 801c14e:	687b      	ldr	r3, [r7, #4]
 801c150:	2b00      	cmp	r3, #0
 801c152:	d02a      	beq.n	801c1aa <tcp_netif_ip_addr_changed+0x66>
 801c154:	687b      	ldr	r3, [r7, #4]
 801c156:	681b      	ldr	r3, [r3, #0]
 801c158:	2b00      	cmp	r3, #0
 801c15a:	d026      	beq.n	801c1aa <tcp_netif_ip_addr_changed+0x66>
    tcp_netif_ip_addr_changed_pcblist(old_addr, tcp_active_pcbs);
 801c15c:	4b15      	ldr	r3, [pc, #84]	@ (801c1b4 <tcp_netif_ip_addr_changed+0x70>)
 801c15e:	681b      	ldr	r3, [r3, #0]
 801c160:	4619      	mov	r1, r3
 801c162:	6878      	ldr	r0, [r7, #4]
 801c164:	f7ff ffbc 	bl	801c0e0 <tcp_netif_ip_addr_changed_pcblist>
    tcp_netif_ip_addr_changed_pcblist(old_addr, tcp_bound_pcbs);
 801c168:	4b13      	ldr	r3, [pc, #76]	@ (801c1b8 <tcp_netif_ip_addr_changed+0x74>)
 801c16a:	681b      	ldr	r3, [r3, #0]
 801c16c:	4619      	mov	r1, r3
 801c16e:	6878      	ldr	r0, [r7, #4]
 801c170:	f7ff ffb6 	bl	801c0e0 <tcp_netif_ip_addr_changed_pcblist>

    if (!ip_addr_isany(new_addr)) {
 801c174:	683b      	ldr	r3, [r7, #0]
 801c176:	2b00      	cmp	r3, #0
 801c178:	d017      	beq.n	801c1aa <tcp_netif_ip_addr_changed+0x66>
 801c17a:	683b      	ldr	r3, [r7, #0]
 801c17c:	681b      	ldr	r3, [r3, #0]
 801c17e:	2b00      	cmp	r3, #0
 801c180:	d013      	beq.n	801c1aa <tcp_netif_ip_addr_changed+0x66>
      /* PCB bound to current local interface address? */
      for (lpcb = tcp_listen_pcbs.listen_pcbs; lpcb != NULL; lpcb = lpcb->next) {
 801c182:	4b0e      	ldr	r3, [pc, #56]	@ (801c1bc <tcp_netif_ip_addr_changed+0x78>)
 801c184:	681b      	ldr	r3, [r3, #0]
 801c186:	60fb      	str	r3, [r7, #12]
 801c188:	e00c      	b.n	801c1a4 <tcp_netif_ip_addr_changed+0x60>
        /* PCB bound to current local interface address? */
        if (ip_addr_cmp(&lpcb->local_ip, old_addr)) {
 801c18a:	68fb      	ldr	r3, [r7, #12]
 801c18c:	681a      	ldr	r2, [r3, #0]
 801c18e:	687b      	ldr	r3, [r7, #4]
 801c190:	681b      	ldr	r3, [r3, #0]
 801c192:	429a      	cmp	r2, r3
 801c194:	d103      	bne.n	801c19e <tcp_netif_ip_addr_changed+0x5a>
          /* The PCB is listening to the old ipaddr and
            * is set to listen to the new one instead */
          ip_addr_copy(lpcb->local_ip, *new_addr);
 801c196:	683b      	ldr	r3, [r7, #0]
 801c198:	681a      	ldr	r2, [r3, #0]
 801c19a:	68fb      	ldr	r3, [r7, #12]
 801c19c:	601a      	str	r2, [r3, #0]
      for (lpcb = tcp_listen_pcbs.listen_pcbs; lpcb != NULL; lpcb = lpcb->next) {
 801c19e:	68fb      	ldr	r3, [r7, #12]
 801c1a0:	68db      	ldr	r3, [r3, #12]
 801c1a2:	60fb      	str	r3, [r7, #12]
 801c1a4:	68fb      	ldr	r3, [r7, #12]
 801c1a6:	2b00      	cmp	r3, #0
 801c1a8:	d1ef      	bne.n	801c18a <tcp_netif_ip_addr_changed+0x46>
        }
      }
    }
  }
}
 801c1aa:	bf00      	nop
 801c1ac:	3710      	adds	r7, #16
 801c1ae:	46bd      	mov	sp, r7
 801c1b0:	bd80      	pop	{r7, pc}
 801c1b2:	bf00      	nop
 801c1b4:	24029ff8 	.word	0x24029ff8
 801c1b8:	24029ff0 	.word	0x24029ff0
 801c1bc:	24029ff4 	.word	0x24029ff4

0801c1c0 <tcp_free_ooseq>:

#if TCP_QUEUE_OOSEQ
/* Free all ooseq pbufs (and possibly reset SACK state) */
void
tcp_free_ooseq(struct tcp_pcb *pcb)
{
 801c1c0:	b580      	push	{r7, lr}
 801c1c2:	b082      	sub	sp, #8
 801c1c4:	af00      	add	r7, sp, #0
 801c1c6:	6078      	str	r0, [r7, #4]
  if (pcb->ooseq) {
 801c1c8:	687b      	ldr	r3, [r7, #4]
 801c1ca:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801c1cc:	2b00      	cmp	r3, #0
 801c1ce:	d007      	beq.n	801c1e0 <tcp_free_ooseq+0x20>
    tcp_segs_free(pcb->ooseq);
 801c1d0:	687b      	ldr	r3, [r7, #4]
 801c1d2:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801c1d4:	4618      	mov	r0, r3
 801c1d6:	f7ff fb65 	bl	801b8a4 <tcp_segs_free>
    pcb->ooseq = NULL;
 801c1da:	687b      	ldr	r3, [r7, #4]
 801c1dc:	2200      	movs	r2, #0
 801c1de:	675a      	str	r2, [r3, #116]	@ 0x74
#if LWIP_TCP_SACK_OUT
    memset(pcb->rcv_sacks, 0, sizeof(pcb->rcv_sacks));
#endif /* LWIP_TCP_SACK_OUT */
  }
}
 801c1e0:	bf00      	nop
 801c1e2:	3708      	adds	r7, #8
 801c1e4:	46bd      	mov	sp, r7
 801c1e6:	bd80      	pop	{r7, pc}

0801c1e8 <tcp_input>:
 * @param p received TCP segment to process (p->payload pointing to the TCP header)
 * @param inp network interface on which this segment was received
 */
void
tcp_input(struct pbuf *p, struct netif *inp)
{
 801c1e8:	b590      	push	{r4, r7, lr}
 801c1ea:	b08d      	sub	sp, #52	@ 0x34
 801c1ec:	af04      	add	r7, sp, #16
 801c1ee:	6078      	str	r0, [r7, #4]
 801c1f0:	6039      	str	r1, [r7, #0]
#endif /* SO_REUSE */
  u8_t hdrlen_bytes;
  err_t err;

  LWIP_UNUSED_ARG(inp);
  LWIP_ASSERT_CORE_LOCKED();
 801c1f2:	f7f3 ff3d 	bl	8010070 <sys_check_core_locking>
  LWIP_ASSERT("tcp_input: invalid pbuf", p != NULL);
 801c1f6:	687b      	ldr	r3, [r7, #4]
 801c1f8:	2b00      	cmp	r3, #0
 801c1fa:	d105      	bne.n	801c208 <tcp_input+0x20>
 801c1fc:	4b9b      	ldr	r3, [pc, #620]	@ (801c46c <tcp_input+0x284>)
 801c1fe:	2283      	movs	r2, #131	@ 0x83
 801c200:	499b      	ldr	r1, [pc, #620]	@ (801c470 <tcp_input+0x288>)
 801c202:	489c      	ldr	r0, [pc, #624]	@ (801c474 <tcp_input+0x28c>)
 801c204:	f00d f982 	bl	802950c <iprintf>
  PERF_START;

  TCP_STATS_INC(tcp.recv);
  MIB2_STATS_INC(mib2.tcpinsegs);

  tcphdr = (struct tcp_hdr *)p->payload;
 801c208:	687b      	ldr	r3, [r7, #4]
 801c20a:	685b      	ldr	r3, [r3, #4]
 801c20c:	4a9a      	ldr	r2, [pc, #616]	@ (801c478 <tcp_input+0x290>)
 801c20e:	6013      	str	r3, [r2, #0]
#if TCP_INPUT_DEBUG
  tcp_debug_print(tcphdr);
#endif

  /* Check that TCP header fits in payload */
  if (p->len < TCP_HLEN) {
 801c210:	687b      	ldr	r3, [r7, #4]
 801c212:	895b      	ldrh	r3, [r3, #10]
 801c214:	2b13      	cmp	r3, #19
 801c216:	f240 83d1 	bls.w	801c9bc <tcp_input+0x7d4>
    TCP_STATS_INC(tcp.lenerr);
    goto dropped;
  }

  /* Don't even process incoming broadcasts/multicasts. */
  if (ip_addr_isbroadcast(ip_current_dest_addr(), ip_current_netif()) ||
 801c21a:	4b98      	ldr	r3, [pc, #608]	@ (801c47c <tcp_input+0x294>)
 801c21c:	695b      	ldr	r3, [r3, #20]
 801c21e:	4a97      	ldr	r2, [pc, #604]	@ (801c47c <tcp_input+0x294>)
 801c220:	6812      	ldr	r2, [r2, #0]
 801c222:	4611      	mov	r1, r2
 801c224:	4618      	mov	r0, r3
 801c226:	f008 fc1b 	bl	8024a60 <ip4_addr_isbroadcast_u32>
 801c22a:	4603      	mov	r3, r0
 801c22c:	2b00      	cmp	r3, #0
 801c22e:	f040 83c7 	bne.w	801c9c0 <tcp_input+0x7d8>
      ip_addr_ismulticast(ip_current_dest_addr())) {
 801c232:	4b92      	ldr	r3, [pc, #584]	@ (801c47c <tcp_input+0x294>)
 801c234:	695b      	ldr	r3, [r3, #20]
 801c236:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
  if (ip_addr_isbroadcast(ip_current_dest_addr(), ip_current_netif()) ||
 801c23a:	2be0      	cmp	r3, #224	@ 0xe0
 801c23c:	f000 83c0 	beq.w	801c9c0 <tcp_input+0x7d8>
    }
  }
#endif /* CHECKSUM_CHECK_TCP */

  /* sanity-check header length */
  hdrlen_bytes = TCPH_HDRLEN_BYTES(tcphdr);
 801c240:	4b8d      	ldr	r3, [pc, #564]	@ (801c478 <tcp_input+0x290>)
 801c242:	681b      	ldr	r3, [r3, #0]
 801c244:	899b      	ldrh	r3, [r3, #12]
 801c246:	b29b      	uxth	r3, r3
 801c248:	4618      	mov	r0, r3
 801c24a:	f7fc fa05 	bl	8018658 <lwip_htons>
 801c24e:	4603      	mov	r3, r0
 801c250:	0b1b      	lsrs	r3, r3, #12
 801c252:	b29b      	uxth	r3, r3
 801c254:	b2db      	uxtb	r3, r3
 801c256:	009b      	lsls	r3, r3, #2
 801c258:	74bb      	strb	r3, [r7, #18]
  if ((hdrlen_bytes < TCP_HLEN) || (hdrlen_bytes > p->tot_len)) {
 801c25a:	7cbb      	ldrb	r3, [r7, #18]
 801c25c:	2b13      	cmp	r3, #19
 801c25e:	f240 83b1 	bls.w	801c9c4 <tcp_input+0x7dc>
 801c262:	7cbb      	ldrb	r3, [r7, #18]
 801c264:	b29a      	uxth	r2, r3
 801c266:	687b      	ldr	r3, [r7, #4]
 801c268:	891b      	ldrh	r3, [r3, #8]
 801c26a:	429a      	cmp	r2, r3
 801c26c:	f200 83aa 	bhi.w	801c9c4 <tcp_input+0x7dc>
    goto dropped;
  }

  /* Move the payload pointer in the pbuf so that it points to the
     TCP data instead of the TCP header. */
  tcphdr_optlen = (u16_t)(hdrlen_bytes - TCP_HLEN);
 801c270:	7cbb      	ldrb	r3, [r7, #18]
 801c272:	b29b      	uxth	r3, r3
 801c274:	3b14      	subs	r3, #20
 801c276:	b29a      	uxth	r2, r3
 801c278:	4b81      	ldr	r3, [pc, #516]	@ (801c480 <tcp_input+0x298>)
 801c27a:	801a      	strh	r2, [r3, #0]
  tcphdr_opt2 = NULL;
 801c27c:	4b81      	ldr	r3, [pc, #516]	@ (801c484 <tcp_input+0x29c>)
 801c27e:	2200      	movs	r2, #0
 801c280:	601a      	str	r2, [r3, #0]
  if (p->len >= hdrlen_bytes) {
 801c282:	687b      	ldr	r3, [r7, #4]
 801c284:	895a      	ldrh	r2, [r3, #10]
 801c286:	7cbb      	ldrb	r3, [r7, #18]
 801c288:	b29b      	uxth	r3, r3
 801c28a:	429a      	cmp	r2, r3
 801c28c:	d309      	bcc.n	801c2a2 <tcp_input+0xba>
    /* all options are in the first pbuf */
    tcphdr_opt1len = tcphdr_optlen;
 801c28e:	4b7c      	ldr	r3, [pc, #496]	@ (801c480 <tcp_input+0x298>)
 801c290:	881a      	ldrh	r2, [r3, #0]
 801c292:	4b7d      	ldr	r3, [pc, #500]	@ (801c488 <tcp_input+0x2a0>)
 801c294:	801a      	strh	r2, [r3, #0]
    pbuf_remove_header(p, hdrlen_bytes); /* cannot fail */
 801c296:	7cbb      	ldrb	r3, [r7, #18]
 801c298:	4619      	mov	r1, r3
 801c29a:	6878      	ldr	r0, [r7, #4]
 801c29c:	f7fd fe06 	bl	8019eac <pbuf_remove_header>
 801c2a0:	e04e      	b.n	801c340 <tcp_input+0x158>
  } else {
    u16_t opt2len;
    /* TCP header fits into first pbuf, options don't - data is in the next pbuf */
    /* there must be a next pbuf, due to hdrlen_bytes sanity check above */
    LWIP_ASSERT("p->next != NULL", p->next != NULL);
 801c2a2:	687b      	ldr	r3, [r7, #4]
 801c2a4:	681b      	ldr	r3, [r3, #0]
 801c2a6:	2b00      	cmp	r3, #0
 801c2a8:	d105      	bne.n	801c2b6 <tcp_input+0xce>
 801c2aa:	4b70      	ldr	r3, [pc, #448]	@ (801c46c <tcp_input+0x284>)
 801c2ac:	22c2      	movs	r2, #194	@ 0xc2
 801c2ae:	4977      	ldr	r1, [pc, #476]	@ (801c48c <tcp_input+0x2a4>)
 801c2b0:	4870      	ldr	r0, [pc, #448]	@ (801c474 <tcp_input+0x28c>)
 801c2b2:	f00d f92b 	bl	802950c <iprintf>

    /* advance over the TCP header (cannot fail) */
    pbuf_remove_header(p, TCP_HLEN);
 801c2b6:	2114      	movs	r1, #20
 801c2b8:	6878      	ldr	r0, [r7, #4]
 801c2ba:	f7fd fdf7 	bl	8019eac <pbuf_remove_header>

    /* determine how long the first and second parts of the options are */
    tcphdr_opt1len = p->len;
 801c2be:	687b      	ldr	r3, [r7, #4]
 801c2c0:	895a      	ldrh	r2, [r3, #10]
 801c2c2:	4b71      	ldr	r3, [pc, #452]	@ (801c488 <tcp_input+0x2a0>)
 801c2c4:	801a      	strh	r2, [r3, #0]
    opt2len = (u16_t)(tcphdr_optlen - tcphdr_opt1len);
 801c2c6:	4b6e      	ldr	r3, [pc, #440]	@ (801c480 <tcp_input+0x298>)
 801c2c8:	881a      	ldrh	r2, [r3, #0]
 801c2ca:	4b6f      	ldr	r3, [pc, #444]	@ (801c488 <tcp_input+0x2a0>)
 801c2cc:	881b      	ldrh	r3, [r3, #0]
 801c2ce:	1ad3      	subs	r3, r2, r3
 801c2d0:	823b      	strh	r3, [r7, #16]

    /* options continue in the next pbuf: set p to zero length and hide the
        options in the next pbuf (adjusting p->tot_len) */
    pbuf_remove_header(p, tcphdr_opt1len);
 801c2d2:	4b6d      	ldr	r3, [pc, #436]	@ (801c488 <tcp_input+0x2a0>)
 801c2d4:	881b      	ldrh	r3, [r3, #0]
 801c2d6:	4619      	mov	r1, r3
 801c2d8:	6878      	ldr	r0, [r7, #4]
 801c2da:	f7fd fde7 	bl	8019eac <pbuf_remove_header>

    /* check that the options fit in the second pbuf */
    if (opt2len > p->next->len) {
 801c2de:	687b      	ldr	r3, [r7, #4]
 801c2e0:	681b      	ldr	r3, [r3, #0]
 801c2e2:	895b      	ldrh	r3, [r3, #10]
 801c2e4:	8a3a      	ldrh	r2, [r7, #16]
 801c2e6:	429a      	cmp	r2, r3
 801c2e8:	f200 836e 	bhi.w	801c9c8 <tcp_input+0x7e0>
      TCP_STATS_INC(tcp.lenerr);
      goto dropped;
    }

    /* remember the pointer to the second part of the options */
    tcphdr_opt2 = (u8_t *)p->next->payload;
 801c2ec:	687b      	ldr	r3, [r7, #4]
 801c2ee:	681b      	ldr	r3, [r3, #0]
 801c2f0:	685b      	ldr	r3, [r3, #4]
 801c2f2:	4a64      	ldr	r2, [pc, #400]	@ (801c484 <tcp_input+0x29c>)
 801c2f4:	6013      	str	r3, [r2, #0]

    /* advance p->next to point after the options, and manually
        adjust p->tot_len to keep it consistent with the changed p->next */
    pbuf_remove_header(p->next, opt2len);
 801c2f6:	687b      	ldr	r3, [r7, #4]
 801c2f8:	681b      	ldr	r3, [r3, #0]
 801c2fa:	8a3a      	ldrh	r2, [r7, #16]
 801c2fc:	4611      	mov	r1, r2
 801c2fe:	4618      	mov	r0, r3
 801c300:	f7fd fdd4 	bl	8019eac <pbuf_remove_header>
    p->tot_len = (u16_t)(p->tot_len - opt2len);
 801c304:	687b      	ldr	r3, [r7, #4]
 801c306:	891a      	ldrh	r2, [r3, #8]
 801c308:	8a3b      	ldrh	r3, [r7, #16]
 801c30a:	1ad3      	subs	r3, r2, r3
 801c30c:	b29a      	uxth	r2, r3
 801c30e:	687b      	ldr	r3, [r7, #4]
 801c310:	811a      	strh	r2, [r3, #8]

    LWIP_ASSERT("p->len == 0", p->len == 0);
 801c312:	687b      	ldr	r3, [r7, #4]
 801c314:	895b      	ldrh	r3, [r3, #10]
 801c316:	2b00      	cmp	r3, #0
 801c318:	d005      	beq.n	801c326 <tcp_input+0x13e>
 801c31a:	4b54      	ldr	r3, [pc, #336]	@ (801c46c <tcp_input+0x284>)
 801c31c:	22df      	movs	r2, #223	@ 0xdf
 801c31e:	495c      	ldr	r1, [pc, #368]	@ (801c490 <tcp_input+0x2a8>)
 801c320:	4854      	ldr	r0, [pc, #336]	@ (801c474 <tcp_input+0x28c>)
 801c322:	f00d f8f3 	bl	802950c <iprintf>
    LWIP_ASSERT("p->tot_len == p->next->tot_len", p->tot_len == p->next->tot_len);
 801c326:	687b      	ldr	r3, [r7, #4]
 801c328:	891a      	ldrh	r2, [r3, #8]
 801c32a:	687b      	ldr	r3, [r7, #4]
 801c32c:	681b      	ldr	r3, [r3, #0]
 801c32e:	891b      	ldrh	r3, [r3, #8]
 801c330:	429a      	cmp	r2, r3
 801c332:	d005      	beq.n	801c340 <tcp_input+0x158>
 801c334:	4b4d      	ldr	r3, [pc, #308]	@ (801c46c <tcp_input+0x284>)
 801c336:	22e0      	movs	r2, #224	@ 0xe0
 801c338:	4956      	ldr	r1, [pc, #344]	@ (801c494 <tcp_input+0x2ac>)
 801c33a:	484e      	ldr	r0, [pc, #312]	@ (801c474 <tcp_input+0x28c>)
 801c33c:	f00d f8e6 	bl	802950c <iprintf>
  }

  /* Convert fields in TCP header to host byte order. */
  tcphdr->src = lwip_ntohs(tcphdr->src);
 801c340:	4b4d      	ldr	r3, [pc, #308]	@ (801c478 <tcp_input+0x290>)
 801c342:	681b      	ldr	r3, [r3, #0]
 801c344:	881b      	ldrh	r3, [r3, #0]
 801c346:	b29b      	uxth	r3, r3
 801c348:	4a4b      	ldr	r2, [pc, #300]	@ (801c478 <tcp_input+0x290>)
 801c34a:	6814      	ldr	r4, [r2, #0]
 801c34c:	4618      	mov	r0, r3
 801c34e:	f7fc f983 	bl	8018658 <lwip_htons>
 801c352:	4603      	mov	r3, r0
 801c354:	8023      	strh	r3, [r4, #0]
  tcphdr->dest = lwip_ntohs(tcphdr->dest);
 801c356:	4b48      	ldr	r3, [pc, #288]	@ (801c478 <tcp_input+0x290>)
 801c358:	681b      	ldr	r3, [r3, #0]
 801c35a:	885b      	ldrh	r3, [r3, #2]
 801c35c:	b29b      	uxth	r3, r3
 801c35e:	4a46      	ldr	r2, [pc, #280]	@ (801c478 <tcp_input+0x290>)
 801c360:	6814      	ldr	r4, [r2, #0]
 801c362:	4618      	mov	r0, r3
 801c364:	f7fc f978 	bl	8018658 <lwip_htons>
 801c368:	4603      	mov	r3, r0
 801c36a:	8063      	strh	r3, [r4, #2]
  seqno = tcphdr->seqno = lwip_ntohl(tcphdr->seqno);
 801c36c:	4b42      	ldr	r3, [pc, #264]	@ (801c478 <tcp_input+0x290>)
 801c36e:	681b      	ldr	r3, [r3, #0]
 801c370:	685b      	ldr	r3, [r3, #4]
 801c372:	4a41      	ldr	r2, [pc, #260]	@ (801c478 <tcp_input+0x290>)
 801c374:	6814      	ldr	r4, [r2, #0]
 801c376:	4618      	mov	r0, r3
 801c378:	f7fc f983 	bl	8018682 <lwip_htonl>
 801c37c:	4603      	mov	r3, r0
 801c37e:	6063      	str	r3, [r4, #4]
 801c380:	6863      	ldr	r3, [r4, #4]
 801c382:	4a45      	ldr	r2, [pc, #276]	@ (801c498 <tcp_input+0x2b0>)
 801c384:	6013      	str	r3, [r2, #0]
  ackno = tcphdr->ackno = lwip_ntohl(tcphdr->ackno);
 801c386:	4b3c      	ldr	r3, [pc, #240]	@ (801c478 <tcp_input+0x290>)
 801c388:	681b      	ldr	r3, [r3, #0]
 801c38a:	689b      	ldr	r3, [r3, #8]
 801c38c:	4a3a      	ldr	r2, [pc, #232]	@ (801c478 <tcp_input+0x290>)
 801c38e:	6814      	ldr	r4, [r2, #0]
 801c390:	4618      	mov	r0, r3
 801c392:	f7fc f976 	bl	8018682 <lwip_htonl>
 801c396:	4603      	mov	r3, r0
 801c398:	60a3      	str	r3, [r4, #8]
 801c39a:	68a3      	ldr	r3, [r4, #8]
 801c39c:	4a3f      	ldr	r2, [pc, #252]	@ (801c49c <tcp_input+0x2b4>)
 801c39e:	6013      	str	r3, [r2, #0]
  tcphdr->wnd = lwip_ntohs(tcphdr->wnd);
 801c3a0:	4b35      	ldr	r3, [pc, #212]	@ (801c478 <tcp_input+0x290>)
 801c3a2:	681b      	ldr	r3, [r3, #0]
 801c3a4:	89db      	ldrh	r3, [r3, #14]
 801c3a6:	b29b      	uxth	r3, r3
 801c3a8:	4a33      	ldr	r2, [pc, #204]	@ (801c478 <tcp_input+0x290>)
 801c3aa:	6814      	ldr	r4, [r2, #0]
 801c3ac:	4618      	mov	r0, r3
 801c3ae:	f7fc f953 	bl	8018658 <lwip_htons>
 801c3b2:	4603      	mov	r3, r0
 801c3b4:	81e3      	strh	r3, [r4, #14]

  flags = TCPH_FLAGS(tcphdr);
 801c3b6:	4b30      	ldr	r3, [pc, #192]	@ (801c478 <tcp_input+0x290>)
 801c3b8:	681b      	ldr	r3, [r3, #0]
 801c3ba:	899b      	ldrh	r3, [r3, #12]
 801c3bc:	b29b      	uxth	r3, r3
 801c3be:	4618      	mov	r0, r3
 801c3c0:	f7fc f94a 	bl	8018658 <lwip_htons>
 801c3c4:	4603      	mov	r3, r0
 801c3c6:	b2db      	uxtb	r3, r3
 801c3c8:	f003 033f 	and.w	r3, r3, #63	@ 0x3f
 801c3cc:	b2da      	uxtb	r2, r3
 801c3ce:	4b34      	ldr	r3, [pc, #208]	@ (801c4a0 <tcp_input+0x2b8>)
 801c3d0:	701a      	strb	r2, [r3, #0]
  tcplen = p->tot_len;
 801c3d2:	687b      	ldr	r3, [r7, #4]
 801c3d4:	891a      	ldrh	r2, [r3, #8]
 801c3d6:	4b33      	ldr	r3, [pc, #204]	@ (801c4a4 <tcp_input+0x2bc>)
 801c3d8:	801a      	strh	r2, [r3, #0]
  if (flags & (TCP_FIN | TCP_SYN)) {
 801c3da:	4b31      	ldr	r3, [pc, #196]	@ (801c4a0 <tcp_input+0x2b8>)
 801c3dc:	781b      	ldrb	r3, [r3, #0]
 801c3de:	f003 0303 	and.w	r3, r3, #3
 801c3e2:	2b00      	cmp	r3, #0
 801c3e4:	d00c      	beq.n	801c400 <tcp_input+0x218>
    tcplen++;
 801c3e6:	4b2f      	ldr	r3, [pc, #188]	@ (801c4a4 <tcp_input+0x2bc>)
 801c3e8:	881b      	ldrh	r3, [r3, #0]
 801c3ea:	3301      	adds	r3, #1
 801c3ec:	b29a      	uxth	r2, r3
 801c3ee:	4b2d      	ldr	r3, [pc, #180]	@ (801c4a4 <tcp_input+0x2bc>)
 801c3f0:	801a      	strh	r2, [r3, #0]
    if (tcplen < p->tot_len) {
 801c3f2:	687b      	ldr	r3, [r7, #4]
 801c3f4:	891a      	ldrh	r2, [r3, #8]
 801c3f6:	4b2b      	ldr	r3, [pc, #172]	@ (801c4a4 <tcp_input+0x2bc>)
 801c3f8:	881b      	ldrh	r3, [r3, #0]
 801c3fa:	429a      	cmp	r2, r3
 801c3fc:	f200 82e6 	bhi.w	801c9cc <tcp_input+0x7e4>
    }
  }

  /* Demultiplex an incoming segment. First, we check if it is destined
     for an active connection. */
  prev = NULL;
 801c400:	2300      	movs	r3, #0
 801c402:	61fb      	str	r3, [r7, #28]

  for (pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) {
 801c404:	4b28      	ldr	r3, [pc, #160]	@ (801c4a8 <tcp_input+0x2c0>)
 801c406:	681b      	ldr	r3, [r3, #0]
 801c408:	61bb      	str	r3, [r7, #24]
 801c40a:	e09d      	b.n	801c548 <tcp_input+0x360>
    LWIP_ASSERT("tcp_input: active pcb->state != CLOSED", pcb->state != CLOSED);
 801c40c:	69bb      	ldr	r3, [r7, #24]
 801c40e:	7d1b      	ldrb	r3, [r3, #20]
 801c410:	2b00      	cmp	r3, #0
 801c412:	d105      	bne.n	801c420 <tcp_input+0x238>
 801c414:	4b15      	ldr	r3, [pc, #84]	@ (801c46c <tcp_input+0x284>)
 801c416:	22fb      	movs	r2, #251	@ 0xfb
 801c418:	4924      	ldr	r1, [pc, #144]	@ (801c4ac <tcp_input+0x2c4>)
 801c41a:	4816      	ldr	r0, [pc, #88]	@ (801c474 <tcp_input+0x28c>)
 801c41c:	f00d f876 	bl	802950c <iprintf>
    LWIP_ASSERT("tcp_input: active pcb->state != TIME-WAIT", pcb->state != TIME_WAIT);
 801c420:	69bb      	ldr	r3, [r7, #24]
 801c422:	7d1b      	ldrb	r3, [r3, #20]
 801c424:	2b0a      	cmp	r3, #10
 801c426:	d105      	bne.n	801c434 <tcp_input+0x24c>
 801c428:	4b10      	ldr	r3, [pc, #64]	@ (801c46c <tcp_input+0x284>)
 801c42a:	22fc      	movs	r2, #252	@ 0xfc
 801c42c:	4920      	ldr	r1, [pc, #128]	@ (801c4b0 <tcp_input+0x2c8>)
 801c42e:	4811      	ldr	r0, [pc, #68]	@ (801c474 <tcp_input+0x28c>)
 801c430:	f00d f86c 	bl	802950c <iprintf>
    LWIP_ASSERT("tcp_input: active pcb->state != LISTEN", pcb->state != LISTEN);
 801c434:	69bb      	ldr	r3, [r7, #24]
 801c436:	7d1b      	ldrb	r3, [r3, #20]
 801c438:	2b01      	cmp	r3, #1
 801c43a:	d105      	bne.n	801c448 <tcp_input+0x260>
 801c43c:	4b0b      	ldr	r3, [pc, #44]	@ (801c46c <tcp_input+0x284>)
 801c43e:	22fd      	movs	r2, #253	@ 0xfd
 801c440:	491c      	ldr	r1, [pc, #112]	@ (801c4b4 <tcp_input+0x2cc>)
 801c442:	480c      	ldr	r0, [pc, #48]	@ (801c474 <tcp_input+0x28c>)
 801c444:	f00d f862 	bl	802950c <iprintf>

    /* check if PCB is bound to specific netif */
    if ((pcb->netif_idx != NETIF_NO_INDEX) &&
 801c448:	69bb      	ldr	r3, [r7, #24]
 801c44a:	7a1b      	ldrb	r3, [r3, #8]
 801c44c:	2b00      	cmp	r3, #0
 801c44e:	d033      	beq.n	801c4b8 <tcp_input+0x2d0>
        (pcb->netif_idx != netif_get_index(ip_data.current_input_netif))) {
 801c450:	69bb      	ldr	r3, [r7, #24]
 801c452:	7a1a      	ldrb	r2, [r3, #8]
 801c454:	4b09      	ldr	r3, [pc, #36]	@ (801c47c <tcp_input+0x294>)
 801c456:	685b      	ldr	r3, [r3, #4]
 801c458:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 801c45c:	3301      	adds	r3, #1
 801c45e:	b2db      	uxtb	r3, r3
    if ((pcb->netif_idx != NETIF_NO_INDEX) &&
 801c460:	429a      	cmp	r2, r3
 801c462:	d029      	beq.n	801c4b8 <tcp_input+0x2d0>
      prev = pcb;
 801c464:	69bb      	ldr	r3, [r7, #24]
 801c466:	61fb      	str	r3, [r7, #28]
      continue;
 801c468:	e06b      	b.n	801c542 <tcp_input+0x35a>
 801c46a:	bf00      	nop
 801c46c:	0802e8a4 	.word	0x0802e8a4
 801c470:	0802e8d8 	.word	0x0802e8d8
 801c474:	0802e8f0 	.word	0x0802e8f0
 801c478:	2402a018 	.word	0x2402a018
 801c47c:	2402349c 	.word	0x2402349c
 801c480:	2402a01c 	.word	0x2402a01c
 801c484:	2402a020 	.word	0x2402a020
 801c488:	2402a01e 	.word	0x2402a01e
 801c48c:	0802e918 	.word	0x0802e918
 801c490:	0802e928 	.word	0x0802e928
 801c494:	0802e934 	.word	0x0802e934
 801c498:	2402a028 	.word	0x2402a028
 801c49c:	2402a02c 	.word	0x2402a02c
 801c4a0:	2402a034 	.word	0x2402a034
 801c4a4:	2402a032 	.word	0x2402a032
 801c4a8:	24029ff8 	.word	0x24029ff8
 801c4ac:	0802e954 	.word	0x0802e954
 801c4b0:	0802e97c 	.word	0x0802e97c
 801c4b4:	0802e9a8 	.word	0x0802e9a8
    }

    if (pcb->remote_port == tcphdr->src &&
 801c4b8:	69bb      	ldr	r3, [r7, #24]
 801c4ba:	8b1a      	ldrh	r2, [r3, #24]
 801c4bc:	4b72      	ldr	r3, [pc, #456]	@ (801c688 <tcp_input+0x4a0>)
 801c4be:	681b      	ldr	r3, [r3, #0]
 801c4c0:	881b      	ldrh	r3, [r3, #0]
 801c4c2:	b29b      	uxth	r3, r3
 801c4c4:	429a      	cmp	r2, r3
 801c4c6:	d13a      	bne.n	801c53e <tcp_input+0x356>
        pcb->local_port == tcphdr->dest &&
 801c4c8:	69bb      	ldr	r3, [r7, #24]
 801c4ca:	8ada      	ldrh	r2, [r3, #22]
 801c4cc:	4b6e      	ldr	r3, [pc, #440]	@ (801c688 <tcp_input+0x4a0>)
 801c4ce:	681b      	ldr	r3, [r3, #0]
 801c4d0:	885b      	ldrh	r3, [r3, #2]
 801c4d2:	b29b      	uxth	r3, r3
    if (pcb->remote_port == tcphdr->src &&
 801c4d4:	429a      	cmp	r2, r3
 801c4d6:	d132      	bne.n	801c53e <tcp_input+0x356>
        ip_addr_cmp(&pcb->remote_ip, ip_current_src_addr()) &&
 801c4d8:	69bb      	ldr	r3, [r7, #24]
 801c4da:	685a      	ldr	r2, [r3, #4]
 801c4dc:	4b6b      	ldr	r3, [pc, #428]	@ (801c68c <tcp_input+0x4a4>)
 801c4de:	691b      	ldr	r3, [r3, #16]
        pcb->local_port == tcphdr->dest &&
 801c4e0:	429a      	cmp	r2, r3
 801c4e2:	d12c      	bne.n	801c53e <tcp_input+0x356>
        ip_addr_cmp(&pcb->local_ip, ip_current_dest_addr())) {
 801c4e4:	69bb      	ldr	r3, [r7, #24]
 801c4e6:	681a      	ldr	r2, [r3, #0]
 801c4e8:	4b68      	ldr	r3, [pc, #416]	@ (801c68c <tcp_input+0x4a4>)
 801c4ea:	695b      	ldr	r3, [r3, #20]
        ip_addr_cmp(&pcb->remote_ip, ip_current_src_addr()) &&
 801c4ec:	429a      	cmp	r2, r3
 801c4ee:	d126      	bne.n	801c53e <tcp_input+0x356>
      /* Move this PCB to the front of the list so that subsequent
         lookups will be faster (we exploit locality in TCP segment
         arrivals). */
      LWIP_ASSERT("tcp_input: pcb->next != pcb (before cache)", pcb->next != pcb);
 801c4f0:	69bb      	ldr	r3, [r7, #24]
 801c4f2:	68db      	ldr	r3, [r3, #12]
 801c4f4:	69ba      	ldr	r2, [r7, #24]
 801c4f6:	429a      	cmp	r2, r3
 801c4f8:	d106      	bne.n	801c508 <tcp_input+0x320>
 801c4fa:	4b65      	ldr	r3, [pc, #404]	@ (801c690 <tcp_input+0x4a8>)
 801c4fc:	f240 120d 	movw	r2, #269	@ 0x10d
 801c500:	4964      	ldr	r1, [pc, #400]	@ (801c694 <tcp_input+0x4ac>)
 801c502:	4865      	ldr	r0, [pc, #404]	@ (801c698 <tcp_input+0x4b0>)
 801c504:	f00d f802 	bl	802950c <iprintf>
      if (prev != NULL) {
 801c508:	69fb      	ldr	r3, [r7, #28]
 801c50a:	2b00      	cmp	r3, #0
 801c50c:	d00a      	beq.n	801c524 <tcp_input+0x33c>
        prev->next = pcb->next;
 801c50e:	69bb      	ldr	r3, [r7, #24]
 801c510:	68da      	ldr	r2, [r3, #12]
 801c512:	69fb      	ldr	r3, [r7, #28]
 801c514:	60da      	str	r2, [r3, #12]
        pcb->next = tcp_active_pcbs;
 801c516:	4b61      	ldr	r3, [pc, #388]	@ (801c69c <tcp_input+0x4b4>)
 801c518:	681a      	ldr	r2, [r3, #0]
 801c51a:	69bb      	ldr	r3, [r7, #24]
 801c51c:	60da      	str	r2, [r3, #12]
        tcp_active_pcbs = pcb;
 801c51e:	4a5f      	ldr	r2, [pc, #380]	@ (801c69c <tcp_input+0x4b4>)
 801c520:	69bb      	ldr	r3, [r7, #24]
 801c522:	6013      	str	r3, [r2, #0]
      } else {
        TCP_STATS_INC(tcp.cachehit);
      }
      LWIP_ASSERT("tcp_input: pcb->next != pcb (after cache)", pcb->next != pcb);
 801c524:	69bb      	ldr	r3, [r7, #24]
 801c526:	68db      	ldr	r3, [r3, #12]
 801c528:	69ba      	ldr	r2, [r7, #24]
 801c52a:	429a      	cmp	r2, r3
 801c52c:	d111      	bne.n	801c552 <tcp_input+0x36a>
 801c52e:	4b58      	ldr	r3, [pc, #352]	@ (801c690 <tcp_input+0x4a8>)
 801c530:	f240 1215 	movw	r2, #277	@ 0x115
 801c534:	495a      	ldr	r1, [pc, #360]	@ (801c6a0 <tcp_input+0x4b8>)
 801c536:	4858      	ldr	r0, [pc, #352]	@ (801c698 <tcp_input+0x4b0>)
 801c538:	f00c ffe8 	bl	802950c <iprintf>
      break;
 801c53c:	e009      	b.n	801c552 <tcp_input+0x36a>
    }
    prev = pcb;
 801c53e:	69bb      	ldr	r3, [r7, #24]
 801c540:	61fb      	str	r3, [r7, #28]
  for (pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) {
 801c542:	69bb      	ldr	r3, [r7, #24]
 801c544:	68db      	ldr	r3, [r3, #12]
 801c546:	61bb      	str	r3, [r7, #24]
 801c548:	69bb      	ldr	r3, [r7, #24]
 801c54a:	2b00      	cmp	r3, #0
 801c54c:	f47f af5e 	bne.w	801c40c <tcp_input+0x224>
 801c550:	e000      	b.n	801c554 <tcp_input+0x36c>
      break;
 801c552:	bf00      	nop
  }

  if (pcb == NULL) {
 801c554:	69bb      	ldr	r3, [r7, #24]
 801c556:	2b00      	cmp	r3, #0
 801c558:	f040 80aa 	bne.w	801c6b0 <tcp_input+0x4c8>
    /* If it did not go to an active connection, we check the connections
       in the TIME-WAIT state. */
    for (pcb = tcp_tw_pcbs; pcb != NULL; pcb = pcb->next) {
 801c55c:	4b51      	ldr	r3, [pc, #324]	@ (801c6a4 <tcp_input+0x4bc>)
 801c55e:	681b      	ldr	r3, [r3, #0]
 801c560:	61bb      	str	r3, [r7, #24]
 801c562:	e03f      	b.n	801c5e4 <tcp_input+0x3fc>
      LWIP_ASSERT("tcp_input: TIME-WAIT pcb->state == TIME-WAIT", pcb->state == TIME_WAIT);
 801c564:	69bb      	ldr	r3, [r7, #24]
 801c566:	7d1b      	ldrb	r3, [r3, #20]
 801c568:	2b0a      	cmp	r3, #10
 801c56a:	d006      	beq.n	801c57a <tcp_input+0x392>
 801c56c:	4b48      	ldr	r3, [pc, #288]	@ (801c690 <tcp_input+0x4a8>)
 801c56e:	f240 121f 	movw	r2, #287	@ 0x11f
 801c572:	494d      	ldr	r1, [pc, #308]	@ (801c6a8 <tcp_input+0x4c0>)
 801c574:	4848      	ldr	r0, [pc, #288]	@ (801c698 <tcp_input+0x4b0>)
 801c576:	f00c ffc9 	bl	802950c <iprintf>

      /* check if PCB is bound to specific netif */
      if ((pcb->netif_idx != NETIF_NO_INDEX) &&
 801c57a:	69bb      	ldr	r3, [r7, #24]
 801c57c:	7a1b      	ldrb	r3, [r3, #8]
 801c57e:	2b00      	cmp	r3, #0
 801c580:	d009      	beq.n	801c596 <tcp_input+0x3ae>
          (pcb->netif_idx != netif_get_index(ip_data.current_input_netif))) {
 801c582:	69bb      	ldr	r3, [r7, #24]
 801c584:	7a1a      	ldrb	r2, [r3, #8]
 801c586:	4b41      	ldr	r3, [pc, #260]	@ (801c68c <tcp_input+0x4a4>)
 801c588:	685b      	ldr	r3, [r3, #4]
 801c58a:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 801c58e:	3301      	adds	r3, #1
 801c590:	b2db      	uxtb	r3, r3
      if ((pcb->netif_idx != NETIF_NO_INDEX) &&
 801c592:	429a      	cmp	r2, r3
 801c594:	d122      	bne.n	801c5dc <tcp_input+0x3f4>
        continue;
      }

      if (pcb->remote_port == tcphdr->src &&
 801c596:	69bb      	ldr	r3, [r7, #24]
 801c598:	8b1a      	ldrh	r2, [r3, #24]
 801c59a:	4b3b      	ldr	r3, [pc, #236]	@ (801c688 <tcp_input+0x4a0>)
 801c59c:	681b      	ldr	r3, [r3, #0]
 801c59e:	881b      	ldrh	r3, [r3, #0]
 801c5a0:	b29b      	uxth	r3, r3
 801c5a2:	429a      	cmp	r2, r3
 801c5a4:	d11b      	bne.n	801c5de <tcp_input+0x3f6>
          pcb->local_port == tcphdr->dest &&
 801c5a6:	69bb      	ldr	r3, [r7, #24]
 801c5a8:	8ada      	ldrh	r2, [r3, #22]
 801c5aa:	4b37      	ldr	r3, [pc, #220]	@ (801c688 <tcp_input+0x4a0>)
 801c5ac:	681b      	ldr	r3, [r3, #0]
 801c5ae:	885b      	ldrh	r3, [r3, #2]
 801c5b0:	b29b      	uxth	r3, r3
      if (pcb->remote_port == tcphdr->src &&
 801c5b2:	429a      	cmp	r2, r3
 801c5b4:	d113      	bne.n	801c5de <tcp_input+0x3f6>
          ip_addr_cmp(&pcb->remote_ip, ip_current_src_addr()) &&
 801c5b6:	69bb      	ldr	r3, [r7, #24]
 801c5b8:	685a      	ldr	r2, [r3, #4]
 801c5ba:	4b34      	ldr	r3, [pc, #208]	@ (801c68c <tcp_input+0x4a4>)
 801c5bc:	691b      	ldr	r3, [r3, #16]
          pcb->local_port == tcphdr->dest &&
 801c5be:	429a      	cmp	r2, r3
 801c5c0:	d10d      	bne.n	801c5de <tcp_input+0x3f6>
          ip_addr_cmp(&pcb->local_ip, ip_current_dest_addr())) {
 801c5c2:	69bb      	ldr	r3, [r7, #24]
 801c5c4:	681a      	ldr	r2, [r3, #0]
 801c5c6:	4b31      	ldr	r3, [pc, #196]	@ (801c68c <tcp_input+0x4a4>)
 801c5c8:	695b      	ldr	r3, [r3, #20]
          ip_addr_cmp(&pcb->remote_ip, ip_current_src_addr()) &&
 801c5ca:	429a      	cmp	r2, r3
 801c5cc:	d107      	bne.n	801c5de <tcp_input+0x3f6>
#ifdef LWIP_HOOK_TCP_INPACKET_PCB
        if (LWIP_HOOK_TCP_INPACKET_PCB(pcb, tcphdr, tcphdr_optlen, tcphdr_opt1len,
                                       tcphdr_opt2, p) == ERR_OK)
#endif
        {
          tcp_timewait_input(pcb);
 801c5ce:	69b8      	ldr	r0, [r7, #24]
 801c5d0:	f000 fb56 	bl	801cc80 <tcp_timewait_input>
        }
        pbuf_free(p);
 801c5d4:	6878      	ldr	r0, [r7, #4]
 801c5d6:	f7fd fd21 	bl	801a01c <pbuf_free>
        return;
 801c5da:	e1fd      	b.n	801c9d8 <tcp_input+0x7f0>
        continue;
 801c5dc:	bf00      	nop
    for (pcb = tcp_tw_pcbs; pcb != NULL; pcb = pcb->next) {
 801c5de:	69bb      	ldr	r3, [r7, #24]
 801c5e0:	68db      	ldr	r3, [r3, #12]
 801c5e2:	61bb      	str	r3, [r7, #24]
 801c5e4:	69bb      	ldr	r3, [r7, #24]
 801c5e6:	2b00      	cmp	r3, #0
 801c5e8:	d1bc      	bne.n	801c564 <tcp_input+0x37c>
      }
    }

    /* Finally, if we still did not get a match, we check all PCBs that
       are LISTENing for incoming connections. */
    prev = NULL;
 801c5ea:	2300      	movs	r3, #0
 801c5ec:	61fb      	str	r3, [r7, #28]
    for (lpcb = tcp_listen_pcbs.listen_pcbs; lpcb != NULL; lpcb = lpcb->next) {
 801c5ee:	4b2f      	ldr	r3, [pc, #188]	@ (801c6ac <tcp_input+0x4c4>)
 801c5f0:	681b      	ldr	r3, [r3, #0]
 801c5f2:	617b      	str	r3, [r7, #20]
 801c5f4:	e02a      	b.n	801c64c <tcp_input+0x464>
      /* check if PCB is bound to specific netif */
      if ((lpcb->netif_idx != NETIF_NO_INDEX) &&
 801c5f6:	697b      	ldr	r3, [r7, #20]
 801c5f8:	7a1b      	ldrb	r3, [r3, #8]
 801c5fa:	2b00      	cmp	r3, #0
 801c5fc:	d00c      	beq.n	801c618 <tcp_input+0x430>
          (lpcb->netif_idx != netif_get_index(ip_data.current_input_netif))) {
 801c5fe:	697b      	ldr	r3, [r7, #20]
 801c600:	7a1a      	ldrb	r2, [r3, #8]
 801c602:	4b22      	ldr	r3, [pc, #136]	@ (801c68c <tcp_input+0x4a4>)
 801c604:	685b      	ldr	r3, [r3, #4]
 801c606:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 801c60a:	3301      	adds	r3, #1
 801c60c:	b2db      	uxtb	r3, r3
      if ((lpcb->netif_idx != NETIF_NO_INDEX) &&
 801c60e:	429a      	cmp	r2, r3
 801c610:	d002      	beq.n	801c618 <tcp_input+0x430>
        prev = (struct tcp_pcb *)lpcb;
 801c612:	697b      	ldr	r3, [r7, #20]
 801c614:	61fb      	str	r3, [r7, #28]
        continue;
 801c616:	e016      	b.n	801c646 <tcp_input+0x45e>
      }

      if (lpcb->local_port == tcphdr->dest) {
 801c618:	697b      	ldr	r3, [r7, #20]
 801c61a:	8ada      	ldrh	r2, [r3, #22]
 801c61c:	4b1a      	ldr	r3, [pc, #104]	@ (801c688 <tcp_input+0x4a0>)
 801c61e:	681b      	ldr	r3, [r3, #0]
 801c620:	885b      	ldrh	r3, [r3, #2]
 801c622:	b29b      	uxth	r3, r3
 801c624:	429a      	cmp	r2, r3
 801c626:	d10c      	bne.n	801c642 <tcp_input+0x45a>
          lpcb_prev = prev;
#else /* SO_REUSE */
          break;
#endif /* SO_REUSE */
        } else if (IP_ADDR_PCB_VERSION_MATCH_EXACT(lpcb, ip_current_dest_addr())) {
          if (ip_addr_cmp(&lpcb->local_ip, ip_current_dest_addr())) {
 801c628:	697b      	ldr	r3, [r7, #20]
 801c62a:	681a      	ldr	r2, [r3, #0]
 801c62c:	4b17      	ldr	r3, [pc, #92]	@ (801c68c <tcp_input+0x4a4>)
 801c62e:	695b      	ldr	r3, [r3, #20]
 801c630:	429a      	cmp	r2, r3
 801c632:	d00f      	beq.n	801c654 <tcp_input+0x46c>
            /* found an exact match */
            break;
          } else if (ip_addr_isany(&lpcb->local_ip)) {
 801c634:	697b      	ldr	r3, [r7, #20]
 801c636:	2b00      	cmp	r3, #0
 801c638:	d00d      	beq.n	801c656 <tcp_input+0x46e>
 801c63a:	697b      	ldr	r3, [r7, #20]
 801c63c:	681b      	ldr	r3, [r3, #0]
 801c63e:	2b00      	cmp	r3, #0
 801c640:	d009      	beq.n	801c656 <tcp_input+0x46e>
            break;
#endif /* SO_REUSE */
          }
        }
      }
      prev = (struct tcp_pcb *)lpcb;
 801c642:	697b      	ldr	r3, [r7, #20]
 801c644:	61fb      	str	r3, [r7, #28]
    for (lpcb = tcp_listen_pcbs.listen_pcbs; lpcb != NULL; lpcb = lpcb->next) {
 801c646:	697b      	ldr	r3, [r7, #20]
 801c648:	68db      	ldr	r3, [r3, #12]
 801c64a:	617b      	str	r3, [r7, #20]
 801c64c:	697b      	ldr	r3, [r7, #20]
 801c64e:	2b00      	cmp	r3, #0
 801c650:	d1d1      	bne.n	801c5f6 <tcp_input+0x40e>
 801c652:	e000      	b.n	801c656 <tcp_input+0x46e>
            break;
 801c654:	bf00      	nop
      /* only pass to ANY if no specific local IP has been found */
      lpcb = lpcb_any;
      prev = lpcb_prev;
    }
#endif /* SO_REUSE */
    if (lpcb != NULL) {
 801c656:	697b      	ldr	r3, [r7, #20]
 801c658:	2b00      	cmp	r3, #0
 801c65a:	d029      	beq.n	801c6b0 <tcp_input+0x4c8>
      /* Move this PCB to the front of the list so that subsequent
         lookups will be faster (we exploit locality in TCP segment
         arrivals). */
      if (prev != NULL) {
 801c65c:	69fb      	ldr	r3, [r7, #28]
 801c65e:	2b00      	cmp	r3, #0
 801c660:	d00a      	beq.n	801c678 <tcp_input+0x490>
        ((struct tcp_pcb_listen *)prev)->next = lpcb->next;
 801c662:	697b      	ldr	r3, [r7, #20]
 801c664:	68da      	ldr	r2, [r3, #12]
 801c666:	69fb      	ldr	r3, [r7, #28]
 801c668:	60da      	str	r2, [r3, #12]
        /* our successor is the remainder of the listening list */
        lpcb->next = tcp_listen_pcbs.listen_pcbs;
 801c66a:	4b10      	ldr	r3, [pc, #64]	@ (801c6ac <tcp_input+0x4c4>)
 801c66c:	681a      	ldr	r2, [r3, #0]
 801c66e:	697b      	ldr	r3, [r7, #20]
 801c670:	60da      	str	r2, [r3, #12]
        /* put this listening pcb at the head of the listening list */
        tcp_listen_pcbs.listen_pcbs = lpcb;
 801c672:	4a0e      	ldr	r2, [pc, #56]	@ (801c6ac <tcp_input+0x4c4>)
 801c674:	697b      	ldr	r3, [r7, #20]
 801c676:	6013      	str	r3, [r2, #0]
#ifdef LWIP_HOOK_TCP_INPACKET_PCB
      if (LWIP_HOOK_TCP_INPACKET_PCB((struct tcp_pcb *)lpcb, tcphdr, tcphdr_optlen,
                                     tcphdr_opt1len, tcphdr_opt2, p) == ERR_OK)
#endif
      {
        tcp_listen_input(lpcb);
 801c678:	6978      	ldr	r0, [r7, #20]
 801c67a:	f000 fa03 	bl	801ca84 <tcp_listen_input>
      }
      pbuf_free(p);
 801c67e:	6878      	ldr	r0, [r7, #4]
 801c680:	f7fd fccc 	bl	801a01c <pbuf_free>
      return;
 801c684:	e1a8      	b.n	801c9d8 <tcp_input+0x7f0>
 801c686:	bf00      	nop
 801c688:	2402a018 	.word	0x2402a018
 801c68c:	2402349c 	.word	0x2402349c
 801c690:	0802e8a4 	.word	0x0802e8a4
 801c694:	0802e9d0 	.word	0x0802e9d0
 801c698:	0802e8f0 	.word	0x0802e8f0
 801c69c:	24029ff8 	.word	0x24029ff8
 801c6a0:	0802e9fc 	.word	0x0802e9fc
 801c6a4:	24029ffc 	.word	0x24029ffc
 801c6a8:	0802ea28 	.word	0x0802ea28
 801c6ac:	24029ff4 	.word	0x24029ff4
      tcphdr_opt1len, tcphdr_opt2, p) != ERR_OK) {
    pbuf_free(p);
    return;
  }
#endif
  if (pcb != NULL) {
 801c6b0:	69bb      	ldr	r3, [r7, #24]
 801c6b2:	2b00      	cmp	r3, #0
 801c6b4:	f000 8158 	beq.w	801c968 <tcp_input+0x780>
#if TCP_INPUT_DEBUG
    tcp_debug_print_state(pcb->state);
#endif /* TCP_INPUT_DEBUG */

    /* Set up a tcp_seg structure. */
    inseg.next = NULL;
 801c6b8:	4b95      	ldr	r3, [pc, #596]	@ (801c910 <tcp_input+0x728>)
 801c6ba:	2200      	movs	r2, #0
 801c6bc:	601a      	str	r2, [r3, #0]
    inseg.len = p->tot_len;
 801c6be:	687b      	ldr	r3, [r7, #4]
 801c6c0:	891a      	ldrh	r2, [r3, #8]
 801c6c2:	4b93      	ldr	r3, [pc, #588]	@ (801c910 <tcp_input+0x728>)
 801c6c4:	811a      	strh	r2, [r3, #8]
    inseg.p = p;
 801c6c6:	4a92      	ldr	r2, [pc, #584]	@ (801c910 <tcp_input+0x728>)
 801c6c8:	687b      	ldr	r3, [r7, #4]
 801c6ca:	6053      	str	r3, [r2, #4]
    inseg.tcphdr = tcphdr;
 801c6cc:	4b91      	ldr	r3, [pc, #580]	@ (801c914 <tcp_input+0x72c>)
 801c6ce:	681b      	ldr	r3, [r3, #0]
 801c6d0:	4a8f      	ldr	r2, [pc, #572]	@ (801c910 <tcp_input+0x728>)
 801c6d2:	6113      	str	r3, [r2, #16]

    recv_data = NULL;
 801c6d4:	4b90      	ldr	r3, [pc, #576]	@ (801c918 <tcp_input+0x730>)
 801c6d6:	2200      	movs	r2, #0
 801c6d8:	601a      	str	r2, [r3, #0]
    recv_flags = 0;
 801c6da:	4b90      	ldr	r3, [pc, #576]	@ (801c91c <tcp_input+0x734>)
 801c6dc:	2200      	movs	r2, #0
 801c6de:	701a      	strb	r2, [r3, #0]
    recv_acked = 0;
 801c6e0:	4b8f      	ldr	r3, [pc, #572]	@ (801c920 <tcp_input+0x738>)
 801c6e2:	2200      	movs	r2, #0
 801c6e4:	801a      	strh	r2, [r3, #0]

    if (flags & TCP_PSH) {
 801c6e6:	4b8f      	ldr	r3, [pc, #572]	@ (801c924 <tcp_input+0x73c>)
 801c6e8:	781b      	ldrb	r3, [r3, #0]
 801c6ea:	f003 0308 	and.w	r3, r3, #8
 801c6ee:	2b00      	cmp	r3, #0
 801c6f0:	d006      	beq.n	801c700 <tcp_input+0x518>
      p->flags |= PBUF_FLAG_PUSH;
 801c6f2:	687b      	ldr	r3, [r7, #4]
 801c6f4:	7b5b      	ldrb	r3, [r3, #13]
 801c6f6:	f043 0301 	orr.w	r3, r3, #1
 801c6fa:	b2da      	uxtb	r2, r3
 801c6fc:	687b      	ldr	r3, [r7, #4]
 801c6fe:	735a      	strb	r2, [r3, #13]
    }

    /* If there is data which was previously "refused" by upper layer */
    if (pcb->refused_data != NULL) {
 801c700:	69bb      	ldr	r3, [r7, #24]
 801c702:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 801c704:	2b00      	cmp	r3, #0
 801c706:	d017      	beq.n	801c738 <tcp_input+0x550>
      if ((tcp_process_refused_data(pcb) == ERR_ABRT) ||
 801c708:	69b8      	ldr	r0, [r7, #24]
 801c70a:	f7ff f84d 	bl	801b7a8 <tcp_process_refused_data>
 801c70e:	4603      	mov	r3, r0
 801c710:	f113 0f0d 	cmn.w	r3, #13
 801c714:	d007      	beq.n	801c726 <tcp_input+0x53e>
          ((pcb->refused_data != NULL) && (tcplen > 0))) {
 801c716:	69bb      	ldr	r3, [r7, #24]
 801c718:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
      if ((tcp_process_refused_data(pcb) == ERR_ABRT) ||
 801c71a:	2b00      	cmp	r3, #0
 801c71c:	d00c      	beq.n	801c738 <tcp_input+0x550>
          ((pcb->refused_data != NULL) && (tcplen > 0))) {
 801c71e:	4b82      	ldr	r3, [pc, #520]	@ (801c928 <tcp_input+0x740>)
 801c720:	881b      	ldrh	r3, [r3, #0]
 801c722:	2b00      	cmp	r3, #0
 801c724:	d008      	beq.n	801c738 <tcp_input+0x550>
        /* pcb has been aborted or refused data is still refused and the new
           segment contains data */
        if (pcb->rcv_ann_wnd == 0) {
 801c726:	69bb      	ldr	r3, [r7, #24]
 801c728:	8d5b      	ldrh	r3, [r3, #42]	@ 0x2a
 801c72a:	2b00      	cmp	r3, #0
 801c72c:	f040 80e4 	bne.w	801c8f8 <tcp_input+0x710>
          /* this is a zero-window probe, we respond to it with current RCV.NXT
          and drop the data segment */
          tcp_send_empty_ack(pcb);
 801c730:	69b8      	ldr	r0, [r7, #24]
 801c732:	f003 fe73 	bl	802041c <tcp_send_empty_ack>
        }
        TCP_STATS_INC(tcp.drop);
        MIB2_STATS_INC(mib2.tcpinerrs);
        goto aborted;
 801c736:	e0df      	b.n	801c8f8 <tcp_input+0x710>
      }
    }
    tcp_input_pcb = pcb;
 801c738:	4a7c      	ldr	r2, [pc, #496]	@ (801c92c <tcp_input+0x744>)
 801c73a:	69bb      	ldr	r3, [r7, #24]
 801c73c:	6013      	str	r3, [r2, #0]
    err = tcp_process(pcb);
 801c73e:	69b8      	ldr	r0, [r7, #24]
 801c740:	f000 fb18 	bl	801cd74 <tcp_process>
 801c744:	4603      	mov	r3, r0
 801c746:	74fb      	strb	r3, [r7, #19]
    /* A return value of ERR_ABRT means that tcp_abort() was called
       and that the pcb has been freed. If so, we don't do anything. */
    if (err != ERR_ABRT) {
 801c748:	f997 3013 	ldrsb.w	r3, [r7, #19]
 801c74c:	f113 0f0d 	cmn.w	r3, #13
 801c750:	f000 80d4 	beq.w	801c8fc <tcp_input+0x714>
      if (recv_flags & TF_RESET) {
 801c754:	4b71      	ldr	r3, [pc, #452]	@ (801c91c <tcp_input+0x734>)
 801c756:	781b      	ldrb	r3, [r3, #0]
 801c758:	f003 0308 	and.w	r3, r3, #8
 801c75c:	2b00      	cmp	r3, #0
 801c75e:	d015      	beq.n	801c78c <tcp_input+0x5a4>
        /* TF_RESET means that the connection was reset by the other
           end. We then call the error callback to inform the
           application that the connection is dead before we
           deallocate the PCB. */
        TCP_EVENT_ERR(pcb->state, pcb->errf, pcb->callback_arg, ERR_RST);
 801c760:	69bb      	ldr	r3, [r7, #24]
 801c762:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 801c766:	2b00      	cmp	r3, #0
 801c768:	d008      	beq.n	801c77c <tcp_input+0x594>
 801c76a:	69bb      	ldr	r3, [r7, #24]
 801c76c:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 801c770:	69ba      	ldr	r2, [r7, #24]
 801c772:	6912      	ldr	r2, [r2, #16]
 801c774:	f06f 010d 	mvn.w	r1, #13
 801c778:	4610      	mov	r0, r2
 801c77a:	4798      	blx	r3
        tcp_pcb_remove(&tcp_active_pcbs, pcb);
 801c77c:	69b9      	ldr	r1, [r7, #24]
 801c77e:	486c      	ldr	r0, [pc, #432]	@ (801c930 <tcp_input+0x748>)
 801c780:	f7ff fbba 	bl	801bef8 <tcp_pcb_remove>
        tcp_free(pcb);
 801c784:	69b8      	ldr	r0, [r7, #24]
 801c786:	f7fd ff05 	bl	801a594 <tcp_free>
 801c78a:	e0da      	b.n	801c942 <tcp_input+0x75a>
      } else {
        err = ERR_OK;
 801c78c:	2300      	movs	r3, #0
 801c78e:	74fb      	strb	r3, [r7, #19]
        /* If the application has registered a "sent" function to be
           called when new send buffer space is available, we call it
           now. */
        if (recv_acked > 0) {
 801c790:	4b63      	ldr	r3, [pc, #396]	@ (801c920 <tcp_input+0x738>)
 801c792:	881b      	ldrh	r3, [r3, #0]
 801c794:	2b00      	cmp	r3, #0
 801c796:	d01d      	beq.n	801c7d4 <tcp_input+0x5ec>
          while (acked > 0) {
            acked16 = (u16_t)LWIP_MIN(acked, 0xffffu);
            acked -= acked16;
#else
          {
            acked16 = recv_acked;
 801c798:	4b61      	ldr	r3, [pc, #388]	@ (801c920 <tcp_input+0x738>)
 801c79a:	881b      	ldrh	r3, [r3, #0]
 801c79c:	81fb      	strh	r3, [r7, #14]
#endif
            TCP_EVENT_SENT(pcb, (u16_t)acked16, err);
 801c79e:	69bb      	ldr	r3, [r7, #24]
 801c7a0:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 801c7a4:	2b00      	cmp	r3, #0
 801c7a6:	d00a      	beq.n	801c7be <tcp_input+0x5d6>
 801c7a8:	69bb      	ldr	r3, [r7, #24]
 801c7aa:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 801c7ae:	69ba      	ldr	r2, [r7, #24]
 801c7b0:	6910      	ldr	r0, [r2, #16]
 801c7b2:	89fa      	ldrh	r2, [r7, #14]
 801c7b4:	69b9      	ldr	r1, [r7, #24]
 801c7b6:	4798      	blx	r3
 801c7b8:	4603      	mov	r3, r0
 801c7ba:	74fb      	strb	r3, [r7, #19]
 801c7bc:	e001      	b.n	801c7c2 <tcp_input+0x5da>
 801c7be:	2300      	movs	r3, #0
 801c7c0:	74fb      	strb	r3, [r7, #19]
            if (err == ERR_ABRT) {
 801c7c2:	f997 3013 	ldrsb.w	r3, [r7, #19]
 801c7c6:	f113 0f0d 	cmn.w	r3, #13
 801c7ca:	f000 8099 	beq.w	801c900 <tcp_input+0x718>
              goto aborted;
            }
          }
          recv_acked = 0;
 801c7ce:	4b54      	ldr	r3, [pc, #336]	@ (801c920 <tcp_input+0x738>)
 801c7d0:	2200      	movs	r2, #0
 801c7d2:	801a      	strh	r2, [r3, #0]
        }
        if (tcp_input_delayed_close(pcb)) {
 801c7d4:	69b8      	ldr	r0, [r7, #24]
 801c7d6:	f000 f915 	bl	801ca04 <tcp_input_delayed_close>
 801c7da:	4603      	mov	r3, r0
 801c7dc:	2b00      	cmp	r3, #0
 801c7de:	f040 8091 	bne.w	801c904 <tcp_input+0x71c>
#if TCP_QUEUE_OOSEQ && LWIP_WND_SCALE
        while (recv_data != NULL) {
          struct pbuf *rest = NULL;
          pbuf_split_64k(recv_data, &rest);
#else /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */
        if (recv_data != NULL) {
 801c7e2:	4b4d      	ldr	r3, [pc, #308]	@ (801c918 <tcp_input+0x730>)
 801c7e4:	681b      	ldr	r3, [r3, #0]
 801c7e6:	2b00      	cmp	r3, #0
 801c7e8:	d041      	beq.n	801c86e <tcp_input+0x686>
#endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */

          LWIP_ASSERT("pcb->refused_data == NULL", pcb->refused_data == NULL);
 801c7ea:	69bb      	ldr	r3, [r7, #24]
 801c7ec:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 801c7ee:	2b00      	cmp	r3, #0
 801c7f0:	d006      	beq.n	801c800 <tcp_input+0x618>
 801c7f2:	4b50      	ldr	r3, [pc, #320]	@ (801c934 <tcp_input+0x74c>)
 801c7f4:	f44f 72f3 	mov.w	r2, #486	@ 0x1e6
 801c7f8:	494f      	ldr	r1, [pc, #316]	@ (801c938 <tcp_input+0x750>)
 801c7fa:	4850      	ldr	r0, [pc, #320]	@ (801c93c <tcp_input+0x754>)
 801c7fc:	f00c fe86 	bl	802950c <iprintf>
          if (pcb->flags & TF_RXCLOSED) {
 801c800:	69bb      	ldr	r3, [r7, #24]
 801c802:	8b5b      	ldrh	r3, [r3, #26]
 801c804:	f003 0310 	and.w	r3, r3, #16
 801c808:	2b00      	cmp	r3, #0
 801c80a:	d008      	beq.n	801c81e <tcp_input+0x636>
            /* received data although already closed -> abort (send RST) to
               notify the remote host that not all data has been processed */
            pbuf_free(recv_data);
 801c80c:	4b42      	ldr	r3, [pc, #264]	@ (801c918 <tcp_input+0x730>)
 801c80e:	681b      	ldr	r3, [r3, #0]
 801c810:	4618      	mov	r0, r3
 801c812:	f7fd fc03 	bl	801a01c <pbuf_free>
#if TCP_QUEUE_OOSEQ && LWIP_WND_SCALE
            if (rest != NULL) {
              pbuf_free(rest);
            }
#endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */
            tcp_abort(pcb);
 801c816:	69b8      	ldr	r0, [r7, #24]
 801c818:	f7fe fa06 	bl	801ac28 <tcp_abort>
            goto aborted;
 801c81c:	e091      	b.n	801c942 <tcp_input+0x75a>
          }

          /* Notify application that data has been received. */
          TCP_EVENT_RECV(pcb, recv_data, ERR_OK, err);
 801c81e:	69bb      	ldr	r3, [r7, #24]
 801c820:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 801c824:	2b00      	cmp	r3, #0
 801c826:	d00c      	beq.n	801c842 <tcp_input+0x65a>
 801c828:	69bb      	ldr	r3, [r7, #24]
 801c82a:	f8d3 4084 	ldr.w	r4, [r3, #132]	@ 0x84
 801c82e:	69bb      	ldr	r3, [r7, #24]
 801c830:	6918      	ldr	r0, [r3, #16]
 801c832:	4b39      	ldr	r3, [pc, #228]	@ (801c918 <tcp_input+0x730>)
 801c834:	681a      	ldr	r2, [r3, #0]
 801c836:	2300      	movs	r3, #0
 801c838:	69b9      	ldr	r1, [r7, #24]
 801c83a:	47a0      	blx	r4
 801c83c:	4603      	mov	r3, r0
 801c83e:	74fb      	strb	r3, [r7, #19]
 801c840:	e008      	b.n	801c854 <tcp_input+0x66c>
 801c842:	4b35      	ldr	r3, [pc, #212]	@ (801c918 <tcp_input+0x730>)
 801c844:	681a      	ldr	r2, [r3, #0]
 801c846:	2300      	movs	r3, #0
 801c848:	69b9      	ldr	r1, [r7, #24]
 801c84a:	2000      	movs	r0, #0
 801c84c:	f7ff f884 	bl	801b958 <tcp_recv_null>
 801c850:	4603      	mov	r3, r0
 801c852:	74fb      	strb	r3, [r7, #19]
          if (err == ERR_ABRT) {
 801c854:	f997 3013 	ldrsb.w	r3, [r7, #19]
 801c858:	f113 0f0d 	cmn.w	r3, #13
 801c85c:	d054      	beq.n	801c908 <tcp_input+0x720>
#endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */
            goto aborted;
          }

          /* If the upper layer can't receive this data, store it */
          if (err != ERR_OK) {
 801c85e:	f997 3013 	ldrsb.w	r3, [r7, #19]
 801c862:	2b00      	cmp	r3, #0
 801c864:	d003      	beq.n	801c86e <tcp_input+0x686>
#if TCP_QUEUE_OOSEQ && LWIP_WND_SCALE
            if (rest != NULL) {
              pbuf_cat(recv_data, rest);
            }
#endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */
            pcb->refused_data = recv_data;
 801c866:	4b2c      	ldr	r3, [pc, #176]	@ (801c918 <tcp_input+0x730>)
 801c868:	681a      	ldr	r2, [r3, #0]
 801c86a:	69bb      	ldr	r3, [r7, #24]
 801c86c:	679a      	str	r2, [r3, #120]	@ 0x78
          }
        }

        /* If a FIN segment was received, we call the callback
           function with a NULL buffer to indicate EOF. */
        if (recv_flags & TF_GOT_FIN) {
 801c86e:	4b2b      	ldr	r3, [pc, #172]	@ (801c91c <tcp_input+0x734>)
 801c870:	781b      	ldrb	r3, [r3, #0]
 801c872:	f003 0320 	and.w	r3, r3, #32
 801c876:	2b00      	cmp	r3, #0
 801c878:	d031      	beq.n	801c8de <tcp_input+0x6f6>
          if (pcb->refused_data != NULL) {
 801c87a:	69bb      	ldr	r3, [r7, #24]
 801c87c:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 801c87e:	2b00      	cmp	r3, #0
 801c880:	d009      	beq.n	801c896 <tcp_input+0x6ae>
            /* Delay this if we have refused data. */
            pcb->refused_data->flags |= PBUF_FLAG_TCP_FIN;
 801c882:	69bb      	ldr	r3, [r7, #24]
 801c884:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 801c886:	7b5a      	ldrb	r2, [r3, #13]
 801c888:	69bb      	ldr	r3, [r7, #24]
 801c88a:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 801c88c:	f042 0220 	orr.w	r2, r2, #32
 801c890:	b2d2      	uxtb	r2, r2
 801c892:	735a      	strb	r2, [r3, #13]
 801c894:	e023      	b.n	801c8de <tcp_input+0x6f6>
          } else {
            /* correct rcv_wnd as the application won't call tcp_recved()
               for the FIN's seqno */
            if (pcb->rcv_wnd != TCP_WND_MAX(pcb)) {
 801c896:	69bb      	ldr	r3, [r7, #24]
 801c898:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 801c89a:	f241 62d0 	movw	r2, #5840	@ 0x16d0
 801c89e:	4293      	cmp	r3, r2
 801c8a0:	d005      	beq.n	801c8ae <tcp_input+0x6c6>
              pcb->rcv_wnd++;
 801c8a2:	69bb      	ldr	r3, [r7, #24]
 801c8a4:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 801c8a6:	3301      	adds	r3, #1
 801c8a8:	b29a      	uxth	r2, r3
 801c8aa:	69bb      	ldr	r3, [r7, #24]
 801c8ac:	851a      	strh	r2, [r3, #40]	@ 0x28
            }
            TCP_EVENT_CLOSED(pcb, err);
 801c8ae:	69bb      	ldr	r3, [r7, #24]
 801c8b0:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 801c8b4:	2b00      	cmp	r3, #0
 801c8b6:	d00b      	beq.n	801c8d0 <tcp_input+0x6e8>
 801c8b8:	69bb      	ldr	r3, [r7, #24]
 801c8ba:	f8d3 4084 	ldr.w	r4, [r3, #132]	@ 0x84
 801c8be:	69bb      	ldr	r3, [r7, #24]
 801c8c0:	6918      	ldr	r0, [r3, #16]
 801c8c2:	2300      	movs	r3, #0
 801c8c4:	2200      	movs	r2, #0
 801c8c6:	69b9      	ldr	r1, [r7, #24]
 801c8c8:	47a0      	blx	r4
 801c8ca:	4603      	mov	r3, r0
 801c8cc:	74fb      	strb	r3, [r7, #19]
 801c8ce:	e001      	b.n	801c8d4 <tcp_input+0x6ec>
 801c8d0:	2300      	movs	r3, #0
 801c8d2:	74fb      	strb	r3, [r7, #19]
            if (err == ERR_ABRT) {
 801c8d4:	f997 3013 	ldrsb.w	r3, [r7, #19]
 801c8d8:	f113 0f0d 	cmn.w	r3, #13
 801c8dc:	d016      	beq.n	801c90c <tcp_input+0x724>
              goto aborted;
            }
          }
        }

        tcp_input_pcb = NULL;
 801c8de:	4b13      	ldr	r3, [pc, #76]	@ (801c92c <tcp_input+0x744>)
 801c8e0:	2200      	movs	r2, #0
 801c8e2:	601a      	str	r2, [r3, #0]
        if (tcp_input_delayed_close(pcb)) {
 801c8e4:	69b8      	ldr	r0, [r7, #24]
 801c8e6:	f000 f88d 	bl	801ca04 <tcp_input_delayed_close>
 801c8ea:	4603      	mov	r3, r0
 801c8ec:	2b00      	cmp	r3, #0
 801c8ee:	d127      	bne.n	801c940 <tcp_input+0x758>
          goto aborted;
        }
        /* Try to send something out. */
        tcp_output(pcb);
 801c8f0:	69b8      	ldr	r0, [r7, #24]
 801c8f2:	f002 ff7f 	bl	801f7f4 <tcp_output>
 801c8f6:	e024      	b.n	801c942 <tcp_input+0x75a>
        goto aborted;
 801c8f8:	bf00      	nop
 801c8fa:	e022      	b.n	801c942 <tcp_input+0x75a>
#endif /* TCP_INPUT_DEBUG */
      }
    }
    /* Jump target if pcb has been aborted in a callback (by calling tcp_abort()).
       Below this line, 'pcb' may not be dereferenced! */
aborted:
 801c8fc:	bf00      	nop
 801c8fe:	e020      	b.n	801c942 <tcp_input+0x75a>
              goto aborted;
 801c900:	bf00      	nop
 801c902:	e01e      	b.n	801c942 <tcp_input+0x75a>
          goto aborted;
 801c904:	bf00      	nop
 801c906:	e01c      	b.n	801c942 <tcp_input+0x75a>
            goto aborted;
 801c908:	bf00      	nop
 801c90a:	e01a      	b.n	801c942 <tcp_input+0x75a>
              goto aborted;
 801c90c:	bf00      	nop
 801c90e:	e018      	b.n	801c942 <tcp_input+0x75a>
 801c910:	2402a004 	.word	0x2402a004
 801c914:	2402a018 	.word	0x2402a018
 801c918:	2402a038 	.word	0x2402a038
 801c91c:	2402a035 	.word	0x2402a035
 801c920:	2402a030 	.word	0x2402a030
 801c924:	2402a034 	.word	0x2402a034
 801c928:	2402a032 	.word	0x2402a032
 801c92c:	2402a03c 	.word	0x2402a03c
 801c930:	24029ff8 	.word	0x24029ff8
 801c934:	0802e8a4 	.word	0x0802e8a4
 801c938:	0802ea58 	.word	0x0802ea58
 801c93c:	0802e8f0 	.word	0x0802e8f0
          goto aborted;
 801c940:	bf00      	nop
    tcp_input_pcb = NULL;
 801c942:	4b27      	ldr	r3, [pc, #156]	@ (801c9e0 <tcp_input+0x7f8>)
 801c944:	2200      	movs	r2, #0
 801c946:	601a      	str	r2, [r3, #0]
    recv_data = NULL;
 801c948:	4b26      	ldr	r3, [pc, #152]	@ (801c9e4 <tcp_input+0x7fc>)
 801c94a:	2200      	movs	r2, #0
 801c94c:	601a      	str	r2, [r3, #0]

    /* give up our reference to inseg.p */
    if (inseg.p != NULL) {
 801c94e:	4b26      	ldr	r3, [pc, #152]	@ (801c9e8 <tcp_input+0x800>)
 801c950:	685b      	ldr	r3, [r3, #4]
 801c952:	2b00      	cmp	r3, #0
 801c954:	d03f      	beq.n	801c9d6 <tcp_input+0x7ee>
      pbuf_free(inseg.p);
 801c956:	4b24      	ldr	r3, [pc, #144]	@ (801c9e8 <tcp_input+0x800>)
 801c958:	685b      	ldr	r3, [r3, #4]
 801c95a:	4618      	mov	r0, r3
 801c95c:	f7fd fb5e 	bl	801a01c <pbuf_free>
      inseg.p = NULL;
 801c960:	4b21      	ldr	r3, [pc, #132]	@ (801c9e8 <tcp_input+0x800>)
 801c962:	2200      	movs	r2, #0
 801c964:	605a      	str	r2, [r3, #4]
    pbuf_free(p);
  }

  LWIP_ASSERT("tcp_input: tcp_pcbs_sane()", tcp_pcbs_sane());
  PERF_STOP("tcp_input");
  return;
 801c966:	e036      	b.n	801c9d6 <tcp_input+0x7ee>
    if (!(TCPH_FLAGS(tcphdr) & TCP_RST)) {
 801c968:	4b20      	ldr	r3, [pc, #128]	@ (801c9ec <tcp_input+0x804>)
 801c96a:	681b      	ldr	r3, [r3, #0]
 801c96c:	899b      	ldrh	r3, [r3, #12]
 801c96e:	b29b      	uxth	r3, r3
 801c970:	4618      	mov	r0, r3
 801c972:	f7fb fe71 	bl	8018658 <lwip_htons>
 801c976:	4603      	mov	r3, r0
 801c978:	b2db      	uxtb	r3, r3
 801c97a:	f003 0304 	and.w	r3, r3, #4
 801c97e:	2b00      	cmp	r3, #0
 801c980:	d118      	bne.n	801c9b4 <tcp_input+0x7cc>
      tcp_rst(NULL, ackno, seqno + tcplen, ip_current_dest_addr(),
 801c982:	4b1b      	ldr	r3, [pc, #108]	@ (801c9f0 <tcp_input+0x808>)
 801c984:	6819      	ldr	r1, [r3, #0]
 801c986:	4b1b      	ldr	r3, [pc, #108]	@ (801c9f4 <tcp_input+0x80c>)
 801c988:	881b      	ldrh	r3, [r3, #0]
 801c98a:	461a      	mov	r2, r3
 801c98c:	4b1a      	ldr	r3, [pc, #104]	@ (801c9f8 <tcp_input+0x810>)
 801c98e:	681b      	ldr	r3, [r3, #0]
 801c990:	18d0      	adds	r0, r2, r3
              ip_current_src_addr(), tcphdr->dest, tcphdr->src);
 801c992:	4b16      	ldr	r3, [pc, #88]	@ (801c9ec <tcp_input+0x804>)
 801c994:	681b      	ldr	r3, [r3, #0]
      tcp_rst(NULL, ackno, seqno + tcplen, ip_current_dest_addr(),
 801c996:	885b      	ldrh	r3, [r3, #2]
 801c998:	b29b      	uxth	r3, r3
              ip_current_src_addr(), tcphdr->dest, tcphdr->src);
 801c99a:	4a14      	ldr	r2, [pc, #80]	@ (801c9ec <tcp_input+0x804>)
 801c99c:	6812      	ldr	r2, [r2, #0]
      tcp_rst(NULL, ackno, seqno + tcplen, ip_current_dest_addr(),
 801c99e:	8812      	ldrh	r2, [r2, #0]
 801c9a0:	b292      	uxth	r2, r2
 801c9a2:	9202      	str	r2, [sp, #8]
 801c9a4:	9301      	str	r3, [sp, #4]
 801c9a6:	4b15      	ldr	r3, [pc, #84]	@ (801c9fc <tcp_input+0x814>)
 801c9a8:	9300      	str	r3, [sp, #0]
 801c9aa:	4b15      	ldr	r3, [pc, #84]	@ (801ca00 <tcp_input+0x818>)
 801c9ac:	4602      	mov	r2, r0
 801c9ae:	2000      	movs	r0, #0
 801c9b0:	f003 fce2 	bl	8020378 <tcp_rst>
    pbuf_free(p);
 801c9b4:	6878      	ldr	r0, [r7, #4]
 801c9b6:	f7fd fb31 	bl	801a01c <pbuf_free>
  return;
 801c9ba:	e00c      	b.n	801c9d6 <tcp_input+0x7ee>
    goto dropped;
 801c9bc:	bf00      	nop
 801c9be:	e006      	b.n	801c9ce <tcp_input+0x7e6>
    goto dropped;
 801c9c0:	bf00      	nop
 801c9c2:	e004      	b.n	801c9ce <tcp_input+0x7e6>
    goto dropped;
 801c9c4:	bf00      	nop
 801c9c6:	e002      	b.n	801c9ce <tcp_input+0x7e6>
      goto dropped;
 801c9c8:	bf00      	nop
 801c9ca:	e000      	b.n	801c9ce <tcp_input+0x7e6>
      goto dropped;
 801c9cc:	bf00      	nop
dropped:
  TCP_STATS_INC(tcp.drop);
  MIB2_STATS_INC(mib2.tcpinerrs);
  pbuf_free(p);
 801c9ce:	6878      	ldr	r0, [r7, #4]
 801c9d0:	f7fd fb24 	bl	801a01c <pbuf_free>
 801c9d4:	e000      	b.n	801c9d8 <tcp_input+0x7f0>
  return;
 801c9d6:	bf00      	nop
}
 801c9d8:	3724      	adds	r7, #36	@ 0x24
 801c9da:	46bd      	mov	sp, r7
 801c9dc:	bd90      	pop	{r4, r7, pc}
 801c9de:	bf00      	nop
 801c9e0:	2402a03c 	.word	0x2402a03c
 801c9e4:	2402a038 	.word	0x2402a038
 801c9e8:	2402a004 	.word	0x2402a004
 801c9ec:	2402a018 	.word	0x2402a018
 801c9f0:	2402a02c 	.word	0x2402a02c
 801c9f4:	2402a032 	.word	0x2402a032
 801c9f8:	2402a028 	.word	0x2402a028
 801c9fc:	240234ac 	.word	0x240234ac
 801ca00:	240234b0 	.word	0x240234b0

0801ca04 <tcp_input_delayed_close>:
 * any more.
 * @returns 1 if the pcb has been closed and deallocated, 0 otherwise
 */
static int
tcp_input_delayed_close(struct tcp_pcb *pcb)
{
 801ca04:	b580      	push	{r7, lr}
 801ca06:	b082      	sub	sp, #8
 801ca08:	af00      	add	r7, sp, #0
 801ca0a:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT("tcp_input_delayed_close: invalid pcb", pcb != NULL);
 801ca0c:	687b      	ldr	r3, [r7, #4]
 801ca0e:	2b00      	cmp	r3, #0
 801ca10:	d106      	bne.n	801ca20 <tcp_input_delayed_close+0x1c>
 801ca12:	4b17      	ldr	r3, [pc, #92]	@ (801ca70 <tcp_input_delayed_close+0x6c>)
 801ca14:	f240 225a 	movw	r2, #602	@ 0x25a
 801ca18:	4916      	ldr	r1, [pc, #88]	@ (801ca74 <tcp_input_delayed_close+0x70>)
 801ca1a:	4817      	ldr	r0, [pc, #92]	@ (801ca78 <tcp_input_delayed_close+0x74>)
 801ca1c:	f00c fd76 	bl	802950c <iprintf>

  if (recv_flags & TF_CLOSED) {
 801ca20:	4b16      	ldr	r3, [pc, #88]	@ (801ca7c <tcp_input_delayed_close+0x78>)
 801ca22:	781b      	ldrb	r3, [r3, #0]
 801ca24:	f003 0310 	and.w	r3, r3, #16
 801ca28:	2b00      	cmp	r3, #0
 801ca2a:	d01c      	beq.n	801ca66 <tcp_input_delayed_close+0x62>
    /* The connection has been closed and we will deallocate the
        PCB. */
    if (!(pcb->flags & TF_RXCLOSED)) {
 801ca2c:	687b      	ldr	r3, [r7, #4]
 801ca2e:	8b5b      	ldrh	r3, [r3, #26]
 801ca30:	f003 0310 	and.w	r3, r3, #16
 801ca34:	2b00      	cmp	r3, #0
 801ca36:	d10d      	bne.n	801ca54 <tcp_input_delayed_close+0x50>
      /* Connection closed although the application has only shut down the
          tx side: call the PCB's err callback and indicate the closure to
          ensure the application doesn't continue using the PCB. */
      TCP_EVENT_ERR(pcb->state, pcb->errf, pcb->callback_arg, ERR_CLSD);
 801ca38:	687b      	ldr	r3, [r7, #4]
 801ca3a:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 801ca3e:	2b00      	cmp	r3, #0
 801ca40:	d008      	beq.n	801ca54 <tcp_input_delayed_close+0x50>
 801ca42:	687b      	ldr	r3, [r7, #4]
 801ca44:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 801ca48:	687a      	ldr	r2, [r7, #4]
 801ca4a:	6912      	ldr	r2, [r2, #16]
 801ca4c:	f06f 010e 	mvn.w	r1, #14
 801ca50:	4610      	mov	r0, r2
 801ca52:	4798      	blx	r3
    }
    tcp_pcb_remove(&tcp_active_pcbs, pcb);
 801ca54:	6879      	ldr	r1, [r7, #4]
 801ca56:	480a      	ldr	r0, [pc, #40]	@ (801ca80 <tcp_input_delayed_close+0x7c>)
 801ca58:	f7ff fa4e 	bl	801bef8 <tcp_pcb_remove>
    tcp_free(pcb);
 801ca5c:	6878      	ldr	r0, [r7, #4]
 801ca5e:	f7fd fd99 	bl	801a594 <tcp_free>
    return 1;
 801ca62:	2301      	movs	r3, #1
 801ca64:	e000      	b.n	801ca68 <tcp_input_delayed_close+0x64>
  }
  return 0;
 801ca66:	2300      	movs	r3, #0
}
 801ca68:	4618      	mov	r0, r3
 801ca6a:	3708      	adds	r7, #8
 801ca6c:	46bd      	mov	sp, r7
 801ca6e:	bd80      	pop	{r7, pc}
 801ca70:	0802e8a4 	.word	0x0802e8a4
 801ca74:	0802ea74 	.word	0x0802ea74
 801ca78:	0802e8f0 	.word	0x0802e8f0
 801ca7c:	2402a035 	.word	0x2402a035
 801ca80:	24029ff8 	.word	0x24029ff8

0801ca84 <tcp_listen_input>:
 * @note the segment which arrived is saved in global variables, therefore only the pcb
 *       involved is passed as a parameter to this function
 */
static void
tcp_listen_input(struct tcp_pcb_listen *pcb)
{
 801ca84:	b590      	push	{r4, r7, lr}
 801ca86:	b08b      	sub	sp, #44	@ 0x2c
 801ca88:	af04      	add	r7, sp, #16
 801ca8a:	6078      	str	r0, [r7, #4]
  struct tcp_pcb *npcb;
  u32_t iss;
  err_t rc;

  if (flags & TCP_RST) {
 801ca8c:	4b6f      	ldr	r3, [pc, #444]	@ (801cc4c <tcp_listen_input+0x1c8>)
 801ca8e:	781b      	ldrb	r3, [r3, #0]
 801ca90:	f003 0304 	and.w	r3, r3, #4
 801ca94:	2b00      	cmp	r3, #0
 801ca96:	f040 80d2 	bne.w	801cc3e <tcp_listen_input+0x1ba>
    /* An incoming RST should be ignored. Return. */
    return;
  }

  LWIP_ASSERT("tcp_listen_input: invalid pcb", pcb != NULL);
 801ca9a:	687b      	ldr	r3, [r7, #4]
 801ca9c:	2b00      	cmp	r3, #0
 801ca9e:	d106      	bne.n	801caae <tcp_listen_input+0x2a>
 801caa0:	4b6b      	ldr	r3, [pc, #428]	@ (801cc50 <tcp_listen_input+0x1cc>)
 801caa2:	f240 2281 	movw	r2, #641	@ 0x281
 801caa6:	496b      	ldr	r1, [pc, #428]	@ (801cc54 <tcp_listen_input+0x1d0>)
 801caa8:	486b      	ldr	r0, [pc, #428]	@ (801cc58 <tcp_listen_input+0x1d4>)
 801caaa:	f00c fd2f 	bl	802950c <iprintf>

  /* In the LISTEN state, we check for incoming SYN segments,
     creates a new PCB, and responds with a SYN|ACK. */
  if (flags & TCP_ACK) {
 801caae:	4b67      	ldr	r3, [pc, #412]	@ (801cc4c <tcp_listen_input+0x1c8>)
 801cab0:	781b      	ldrb	r3, [r3, #0]
 801cab2:	f003 0310 	and.w	r3, r3, #16
 801cab6:	2b00      	cmp	r3, #0
 801cab8:	d019      	beq.n	801caee <tcp_listen_input+0x6a>
    /* For incoming segments with the ACK flag set, respond with a
       RST. */
    LWIP_DEBUGF(TCP_RST_DEBUG, ("tcp_listen_input: ACK in LISTEN, sending reset\n"));
    tcp_rst((const struct tcp_pcb *)pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
 801caba:	4b68      	ldr	r3, [pc, #416]	@ (801cc5c <tcp_listen_input+0x1d8>)
 801cabc:	6819      	ldr	r1, [r3, #0]
 801cabe:	4b68      	ldr	r3, [pc, #416]	@ (801cc60 <tcp_listen_input+0x1dc>)
 801cac0:	881b      	ldrh	r3, [r3, #0]
 801cac2:	461a      	mov	r2, r3
 801cac4:	4b67      	ldr	r3, [pc, #412]	@ (801cc64 <tcp_listen_input+0x1e0>)
 801cac6:	681b      	ldr	r3, [r3, #0]
 801cac8:	18d0      	adds	r0, r2, r3
            ip_current_src_addr(), tcphdr->dest, tcphdr->src);
 801caca:	4b67      	ldr	r3, [pc, #412]	@ (801cc68 <tcp_listen_input+0x1e4>)
 801cacc:	681b      	ldr	r3, [r3, #0]
    tcp_rst((const struct tcp_pcb *)pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
 801cace:	885b      	ldrh	r3, [r3, #2]
 801cad0:	b29b      	uxth	r3, r3
            ip_current_src_addr(), tcphdr->dest, tcphdr->src);
 801cad2:	4a65      	ldr	r2, [pc, #404]	@ (801cc68 <tcp_listen_input+0x1e4>)
 801cad4:	6812      	ldr	r2, [r2, #0]
    tcp_rst((const struct tcp_pcb *)pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
 801cad6:	8812      	ldrh	r2, [r2, #0]
 801cad8:	b292      	uxth	r2, r2
 801cada:	9202      	str	r2, [sp, #8]
 801cadc:	9301      	str	r3, [sp, #4]
 801cade:	4b63      	ldr	r3, [pc, #396]	@ (801cc6c <tcp_listen_input+0x1e8>)
 801cae0:	9300      	str	r3, [sp, #0]
 801cae2:	4b63      	ldr	r3, [pc, #396]	@ (801cc70 <tcp_listen_input+0x1ec>)
 801cae4:	4602      	mov	r2, r0
 801cae6:	6878      	ldr	r0, [r7, #4]
 801cae8:	f003 fc46 	bl	8020378 <tcp_rst>
      tcp_abandon(npcb, 0);
      return;
    }
    tcp_output(npcb);
  }
  return;
 801caec:	e0a9      	b.n	801cc42 <tcp_listen_input+0x1be>
  } else if (flags & TCP_SYN) {
 801caee:	4b57      	ldr	r3, [pc, #348]	@ (801cc4c <tcp_listen_input+0x1c8>)
 801caf0:	781b      	ldrb	r3, [r3, #0]
 801caf2:	f003 0302 	and.w	r3, r3, #2
 801caf6:	2b00      	cmp	r3, #0
 801caf8:	f000 80a3 	beq.w	801cc42 <tcp_listen_input+0x1be>
    npcb = tcp_alloc(pcb->prio);
 801cafc:	687b      	ldr	r3, [r7, #4]
 801cafe:	7d5b      	ldrb	r3, [r3, #21]
 801cb00:	4618      	mov	r0, r3
 801cb02:	f7ff f84d 	bl	801bba0 <tcp_alloc>
 801cb06:	6178      	str	r0, [r7, #20]
    if (npcb == NULL) {
 801cb08:	697b      	ldr	r3, [r7, #20]
 801cb0a:	2b00      	cmp	r3, #0
 801cb0c:	d111      	bne.n	801cb32 <tcp_listen_input+0xae>
      TCP_EVENT_ACCEPT(pcb, NULL, pcb->callback_arg, ERR_MEM, err);
 801cb0e:	687b      	ldr	r3, [r7, #4]
 801cb10:	699b      	ldr	r3, [r3, #24]
 801cb12:	2b00      	cmp	r3, #0
 801cb14:	d00a      	beq.n	801cb2c <tcp_listen_input+0xa8>
 801cb16:	687b      	ldr	r3, [r7, #4]
 801cb18:	699b      	ldr	r3, [r3, #24]
 801cb1a:	687a      	ldr	r2, [r7, #4]
 801cb1c:	6910      	ldr	r0, [r2, #16]
 801cb1e:	f04f 32ff 	mov.w	r2, #4294967295	@ 0xffffffff
 801cb22:	2100      	movs	r1, #0
 801cb24:	4798      	blx	r3
 801cb26:	4603      	mov	r3, r0
 801cb28:	73bb      	strb	r3, [r7, #14]
      return;
 801cb2a:	e08b      	b.n	801cc44 <tcp_listen_input+0x1c0>
      TCP_EVENT_ACCEPT(pcb, NULL, pcb->callback_arg, ERR_MEM, err);
 801cb2c:	23f0      	movs	r3, #240	@ 0xf0
 801cb2e:	73bb      	strb	r3, [r7, #14]
      return;
 801cb30:	e088      	b.n	801cc44 <tcp_listen_input+0x1c0>
    ip_addr_copy(npcb->local_ip, *ip_current_dest_addr());
 801cb32:	4b50      	ldr	r3, [pc, #320]	@ (801cc74 <tcp_listen_input+0x1f0>)
 801cb34:	695a      	ldr	r2, [r3, #20]
 801cb36:	697b      	ldr	r3, [r7, #20]
 801cb38:	601a      	str	r2, [r3, #0]
    ip_addr_copy(npcb->remote_ip, *ip_current_src_addr());
 801cb3a:	4b4e      	ldr	r3, [pc, #312]	@ (801cc74 <tcp_listen_input+0x1f0>)
 801cb3c:	691a      	ldr	r2, [r3, #16]
 801cb3e:	697b      	ldr	r3, [r7, #20]
 801cb40:	605a      	str	r2, [r3, #4]
    npcb->local_port = pcb->local_port;
 801cb42:	687b      	ldr	r3, [r7, #4]
 801cb44:	8ada      	ldrh	r2, [r3, #22]
 801cb46:	697b      	ldr	r3, [r7, #20]
 801cb48:	82da      	strh	r2, [r3, #22]
    npcb->remote_port = tcphdr->src;
 801cb4a:	4b47      	ldr	r3, [pc, #284]	@ (801cc68 <tcp_listen_input+0x1e4>)
 801cb4c:	681b      	ldr	r3, [r3, #0]
 801cb4e:	881b      	ldrh	r3, [r3, #0]
 801cb50:	b29a      	uxth	r2, r3
 801cb52:	697b      	ldr	r3, [r7, #20]
 801cb54:	831a      	strh	r2, [r3, #24]
    npcb->state = SYN_RCVD;
 801cb56:	697b      	ldr	r3, [r7, #20]
 801cb58:	2203      	movs	r2, #3
 801cb5a:	751a      	strb	r2, [r3, #20]
    npcb->rcv_nxt = seqno + 1;
 801cb5c:	4b41      	ldr	r3, [pc, #260]	@ (801cc64 <tcp_listen_input+0x1e0>)
 801cb5e:	681b      	ldr	r3, [r3, #0]
 801cb60:	1c5a      	adds	r2, r3, #1
 801cb62:	697b      	ldr	r3, [r7, #20]
 801cb64:	625a      	str	r2, [r3, #36]	@ 0x24
    npcb->rcv_ann_right_edge = npcb->rcv_nxt;
 801cb66:	697b      	ldr	r3, [r7, #20]
 801cb68:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 801cb6a:	697b      	ldr	r3, [r7, #20]
 801cb6c:	62da      	str	r2, [r3, #44]	@ 0x2c
    iss = tcp_next_iss(npcb);
 801cb6e:	6978      	ldr	r0, [r7, #20]
 801cb70:	f7ff fa56 	bl	801c020 <tcp_next_iss>
 801cb74:	6138      	str	r0, [r7, #16]
    npcb->snd_wl2 = iss;
 801cb76:	697b      	ldr	r3, [r7, #20]
 801cb78:	693a      	ldr	r2, [r7, #16]
 801cb7a:	659a      	str	r2, [r3, #88]	@ 0x58
    npcb->snd_nxt = iss;
 801cb7c:	697b      	ldr	r3, [r7, #20]
 801cb7e:	693a      	ldr	r2, [r7, #16]
 801cb80:	651a      	str	r2, [r3, #80]	@ 0x50
    npcb->lastack = iss;
 801cb82:	697b      	ldr	r3, [r7, #20]
 801cb84:	693a      	ldr	r2, [r7, #16]
 801cb86:	645a      	str	r2, [r3, #68]	@ 0x44
    npcb->snd_lbb = iss;
 801cb88:	697b      	ldr	r3, [r7, #20]
 801cb8a:	693a      	ldr	r2, [r7, #16]
 801cb8c:	65da      	str	r2, [r3, #92]	@ 0x5c
    npcb->snd_wl1 = seqno - 1;/* initialise to seqno-1 to force window update */
 801cb8e:	4b35      	ldr	r3, [pc, #212]	@ (801cc64 <tcp_listen_input+0x1e0>)
 801cb90:	681b      	ldr	r3, [r3, #0]
 801cb92:	1e5a      	subs	r2, r3, #1
 801cb94:	697b      	ldr	r3, [r7, #20]
 801cb96:	655a      	str	r2, [r3, #84]	@ 0x54
    npcb->callback_arg = pcb->callback_arg;
 801cb98:	687b      	ldr	r3, [r7, #4]
 801cb9a:	691a      	ldr	r2, [r3, #16]
 801cb9c:	697b      	ldr	r3, [r7, #20]
 801cb9e:	611a      	str	r2, [r3, #16]
    npcb->listener = pcb;
 801cba0:	697b      	ldr	r3, [r7, #20]
 801cba2:	687a      	ldr	r2, [r7, #4]
 801cba4:	67da      	str	r2, [r3, #124]	@ 0x7c
    npcb->so_options = pcb->so_options & SOF_INHERITED;
 801cba6:	687b      	ldr	r3, [r7, #4]
 801cba8:	7a5b      	ldrb	r3, [r3, #9]
 801cbaa:	f003 030c 	and.w	r3, r3, #12
 801cbae:	b2da      	uxtb	r2, r3
 801cbb0:	697b      	ldr	r3, [r7, #20]
 801cbb2:	725a      	strb	r2, [r3, #9]
    npcb->netif_idx = pcb->netif_idx;
 801cbb4:	687b      	ldr	r3, [r7, #4]
 801cbb6:	7a1a      	ldrb	r2, [r3, #8]
 801cbb8:	697b      	ldr	r3, [r7, #20]
 801cbba:	721a      	strb	r2, [r3, #8]
    TCP_REG_ACTIVE(npcb);
 801cbbc:	4b2e      	ldr	r3, [pc, #184]	@ (801cc78 <tcp_listen_input+0x1f4>)
 801cbbe:	681a      	ldr	r2, [r3, #0]
 801cbc0:	697b      	ldr	r3, [r7, #20]
 801cbc2:	60da      	str	r2, [r3, #12]
 801cbc4:	4a2c      	ldr	r2, [pc, #176]	@ (801cc78 <tcp_listen_input+0x1f4>)
 801cbc6:	697b      	ldr	r3, [r7, #20]
 801cbc8:	6013      	str	r3, [r2, #0]
 801cbca:	f003 fd97 	bl	80206fc <tcp_timer_needed>
 801cbce:	4b2b      	ldr	r3, [pc, #172]	@ (801cc7c <tcp_listen_input+0x1f8>)
 801cbd0:	2201      	movs	r2, #1
 801cbd2:	701a      	strb	r2, [r3, #0]
    tcp_parseopt(npcb);
 801cbd4:	6978      	ldr	r0, [r7, #20]
 801cbd6:	f001 fd8b 	bl	801e6f0 <tcp_parseopt>
    npcb->snd_wnd = tcphdr->wnd;
 801cbda:	4b23      	ldr	r3, [pc, #140]	@ (801cc68 <tcp_listen_input+0x1e4>)
 801cbdc:	681b      	ldr	r3, [r3, #0]
 801cbde:	89db      	ldrh	r3, [r3, #14]
 801cbe0:	b29a      	uxth	r2, r3
 801cbe2:	697b      	ldr	r3, [r7, #20]
 801cbe4:	f8a3 2060 	strh.w	r2, [r3, #96]	@ 0x60
    npcb->snd_wnd_max = npcb->snd_wnd;
 801cbe8:	697b      	ldr	r3, [r7, #20]
 801cbea:	f8b3 2060 	ldrh.w	r2, [r3, #96]	@ 0x60
 801cbee:	697b      	ldr	r3, [r7, #20]
 801cbf0:	f8a3 2062 	strh.w	r2, [r3, #98]	@ 0x62
    npcb->mss = tcp_eff_send_mss(npcb->mss, &npcb->local_ip, &npcb->remote_ip);
 801cbf4:	697b      	ldr	r3, [r7, #20]
 801cbf6:	8e5c      	ldrh	r4, [r3, #50]	@ 0x32
 801cbf8:	697b      	ldr	r3, [r7, #20]
 801cbfa:	3304      	adds	r3, #4
 801cbfc:	4618      	mov	r0, r3
 801cbfe:	f007 fc77 	bl	80244f0 <ip4_route>
 801cc02:	4601      	mov	r1, r0
 801cc04:	697b      	ldr	r3, [r7, #20]
 801cc06:	3304      	adds	r3, #4
 801cc08:	461a      	mov	r2, r3
 801cc0a:	4620      	mov	r0, r4
 801cc0c:	f7ff fa2e 	bl	801c06c <tcp_eff_send_mss_netif>
 801cc10:	4603      	mov	r3, r0
 801cc12:	461a      	mov	r2, r3
 801cc14:	697b      	ldr	r3, [r7, #20]
 801cc16:	865a      	strh	r2, [r3, #50]	@ 0x32
    rc = tcp_enqueue_flags(npcb, TCP_SYN | TCP_ACK);
 801cc18:	2112      	movs	r1, #18
 801cc1a:	6978      	ldr	r0, [r7, #20]
 801cc1c:	f002 fcfc 	bl	801f618 <tcp_enqueue_flags>
 801cc20:	4603      	mov	r3, r0
 801cc22:	73fb      	strb	r3, [r7, #15]
    if (rc != ERR_OK) {
 801cc24:	f997 300f 	ldrsb.w	r3, [r7, #15]
 801cc28:	2b00      	cmp	r3, #0
 801cc2a:	d004      	beq.n	801cc36 <tcp_listen_input+0x1b2>
      tcp_abandon(npcb, 0);
 801cc2c:	2100      	movs	r1, #0
 801cc2e:	6978      	ldr	r0, [r7, #20]
 801cc30:	f7fd ff3a 	bl	801aaa8 <tcp_abandon>
      return;
 801cc34:	e006      	b.n	801cc44 <tcp_listen_input+0x1c0>
    tcp_output(npcb);
 801cc36:	6978      	ldr	r0, [r7, #20]
 801cc38:	f002 fddc 	bl	801f7f4 <tcp_output>
  return;
 801cc3c:	e001      	b.n	801cc42 <tcp_listen_input+0x1be>
    return;
 801cc3e:	bf00      	nop
 801cc40:	e000      	b.n	801cc44 <tcp_listen_input+0x1c0>
  return;
 801cc42:	bf00      	nop
}
 801cc44:	371c      	adds	r7, #28
 801cc46:	46bd      	mov	sp, r7
 801cc48:	bd90      	pop	{r4, r7, pc}
 801cc4a:	bf00      	nop
 801cc4c:	2402a034 	.word	0x2402a034
 801cc50:	0802e8a4 	.word	0x0802e8a4
 801cc54:	0802ea9c 	.word	0x0802ea9c
 801cc58:	0802e8f0 	.word	0x0802e8f0
 801cc5c:	2402a02c 	.word	0x2402a02c
 801cc60:	2402a032 	.word	0x2402a032
 801cc64:	2402a028 	.word	0x2402a028
 801cc68:	2402a018 	.word	0x2402a018
 801cc6c:	240234ac 	.word	0x240234ac
 801cc70:	240234b0 	.word	0x240234b0
 801cc74:	2402349c 	.word	0x2402349c
 801cc78:	24029ff8 	.word	0x24029ff8
 801cc7c:	2402a000 	.word	0x2402a000

0801cc80 <tcp_timewait_input>:
 * @note the segment which arrived is saved in global variables, therefore only the pcb
 *       involved is passed as a parameter to this function
 */
static void
tcp_timewait_input(struct tcp_pcb *pcb)
{
 801cc80:	b580      	push	{r7, lr}
 801cc82:	b086      	sub	sp, #24
 801cc84:	af04      	add	r7, sp, #16
 801cc86:	6078      	str	r0, [r7, #4]
  /* RFC 1337: in TIME_WAIT, ignore RST and ACK FINs + any 'acceptable' segments */
  /* RFC 793 3.9 Event Processing - Segment Arrives:
   * - first check sequence number - we skip that one in TIME_WAIT (always
   *   acceptable since we only send ACKs)
   * - second check the RST bit (... return) */
  if (flags & TCP_RST) {
 801cc88:	4b2f      	ldr	r3, [pc, #188]	@ (801cd48 <tcp_timewait_input+0xc8>)
 801cc8a:	781b      	ldrb	r3, [r3, #0]
 801cc8c:	f003 0304 	and.w	r3, r3, #4
 801cc90:	2b00      	cmp	r3, #0
 801cc92:	d153      	bne.n	801cd3c <tcp_timewait_input+0xbc>
    return;
  }

  LWIP_ASSERT("tcp_timewait_input: invalid pcb", pcb != NULL);
 801cc94:	687b      	ldr	r3, [r7, #4]
 801cc96:	2b00      	cmp	r3, #0
 801cc98:	d106      	bne.n	801cca8 <tcp_timewait_input+0x28>
 801cc9a:	4b2c      	ldr	r3, [pc, #176]	@ (801cd4c <tcp_timewait_input+0xcc>)
 801cc9c:	f240 22ee 	movw	r2, #750	@ 0x2ee
 801cca0:	492b      	ldr	r1, [pc, #172]	@ (801cd50 <tcp_timewait_input+0xd0>)
 801cca2:	482c      	ldr	r0, [pc, #176]	@ (801cd54 <tcp_timewait_input+0xd4>)
 801cca4:	f00c fc32 	bl	802950c <iprintf>

  /* - fourth, check the SYN bit, */
  if (flags & TCP_SYN) {
 801cca8:	4b27      	ldr	r3, [pc, #156]	@ (801cd48 <tcp_timewait_input+0xc8>)
 801ccaa:	781b      	ldrb	r3, [r3, #0]
 801ccac:	f003 0302 	and.w	r3, r3, #2
 801ccb0:	2b00      	cmp	r3, #0
 801ccb2:	d02a      	beq.n	801cd0a <tcp_timewait_input+0x8a>
    /* If an incoming segment is not acceptable, an acknowledgment
       should be sent in reply */
    if (TCP_SEQ_BETWEEN(seqno, pcb->rcv_nxt, pcb->rcv_nxt + pcb->rcv_wnd)) {
 801ccb4:	4b28      	ldr	r3, [pc, #160]	@ (801cd58 <tcp_timewait_input+0xd8>)
 801ccb6:	681a      	ldr	r2, [r3, #0]
 801ccb8:	687b      	ldr	r3, [r7, #4]
 801ccba:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801ccbc:	1ad3      	subs	r3, r2, r3
 801ccbe:	2b00      	cmp	r3, #0
 801ccc0:	db2d      	blt.n	801cd1e <tcp_timewait_input+0x9e>
 801ccc2:	4b25      	ldr	r3, [pc, #148]	@ (801cd58 <tcp_timewait_input+0xd8>)
 801ccc4:	681a      	ldr	r2, [r3, #0]
 801ccc6:	687b      	ldr	r3, [r7, #4]
 801ccc8:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801ccca:	6879      	ldr	r1, [r7, #4]
 801cccc:	8d09      	ldrh	r1, [r1, #40]	@ 0x28
 801ccce:	440b      	add	r3, r1
 801ccd0:	1ad3      	subs	r3, r2, r3
 801ccd2:	2b00      	cmp	r3, #0
 801ccd4:	dc23      	bgt.n	801cd1e <tcp_timewait_input+0x9e>
      /* If the SYN is in the window it is an error, send a reset */
      tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
 801ccd6:	4b21      	ldr	r3, [pc, #132]	@ (801cd5c <tcp_timewait_input+0xdc>)
 801ccd8:	6819      	ldr	r1, [r3, #0]
 801ccda:	4b21      	ldr	r3, [pc, #132]	@ (801cd60 <tcp_timewait_input+0xe0>)
 801ccdc:	881b      	ldrh	r3, [r3, #0]
 801ccde:	461a      	mov	r2, r3
 801cce0:	4b1d      	ldr	r3, [pc, #116]	@ (801cd58 <tcp_timewait_input+0xd8>)
 801cce2:	681b      	ldr	r3, [r3, #0]
 801cce4:	18d0      	adds	r0, r2, r3
              ip_current_src_addr(), tcphdr->dest, tcphdr->src);
 801cce6:	4b1f      	ldr	r3, [pc, #124]	@ (801cd64 <tcp_timewait_input+0xe4>)
 801cce8:	681b      	ldr	r3, [r3, #0]
      tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
 801ccea:	885b      	ldrh	r3, [r3, #2]
 801ccec:	b29b      	uxth	r3, r3
              ip_current_src_addr(), tcphdr->dest, tcphdr->src);
 801ccee:	4a1d      	ldr	r2, [pc, #116]	@ (801cd64 <tcp_timewait_input+0xe4>)
 801ccf0:	6812      	ldr	r2, [r2, #0]
      tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
 801ccf2:	8812      	ldrh	r2, [r2, #0]
 801ccf4:	b292      	uxth	r2, r2
 801ccf6:	9202      	str	r2, [sp, #8]
 801ccf8:	9301      	str	r3, [sp, #4]
 801ccfa:	4b1b      	ldr	r3, [pc, #108]	@ (801cd68 <tcp_timewait_input+0xe8>)
 801ccfc:	9300      	str	r3, [sp, #0]
 801ccfe:	4b1b      	ldr	r3, [pc, #108]	@ (801cd6c <tcp_timewait_input+0xec>)
 801cd00:	4602      	mov	r2, r0
 801cd02:	6878      	ldr	r0, [r7, #4]
 801cd04:	f003 fb38 	bl	8020378 <tcp_rst>
      return;
 801cd08:	e01b      	b.n	801cd42 <tcp_timewait_input+0xc2>
    }
  } else if (flags & TCP_FIN) {
 801cd0a:	4b0f      	ldr	r3, [pc, #60]	@ (801cd48 <tcp_timewait_input+0xc8>)
 801cd0c:	781b      	ldrb	r3, [r3, #0]
 801cd0e:	f003 0301 	and.w	r3, r3, #1
 801cd12:	2b00      	cmp	r3, #0
 801cd14:	d003      	beq.n	801cd1e <tcp_timewait_input+0x9e>
    /* - eighth, check the FIN bit: Remain in the TIME-WAIT state.
         Restart the 2 MSL time-wait timeout.*/
    pcb->tmr = tcp_ticks;
 801cd16:	4b16      	ldr	r3, [pc, #88]	@ (801cd70 <tcp_timewait_input+0xf0>)
 801cd18:	681a      	ldr	r2, [r3, #0]
 801cd1a:	687b      	ldr	r3, [r7, #4]
 801cd1c:	621a      	str	r2, [r3, #32]
  }

  if ((tcplen > 0)) {
 801cd1e:	4b10      	ldr	r3, [pc, #64]	@ (801cd60 <tcp_timewait_input+0xe0>)
 801cd20:	881b      	ldrh	r3, [r3, #0]
 801cd22:	2b00      	cmp	r3, #0
 801cd24:	d00c      	beq.n	801cd40 <tcp_timewait_input+0xc0>
    /* Acknowledge data, FIN or out-of-window SYN */
    tcp_ack_now(pcb);
 801cd26:	687b      	ldr	r3, [r7, #4]
 801cd28:	8b5b      	ldrh	r3, [r3, #26]
 801cd2a:	f043 0302 	orr.w	r3, r3, #2
 801cd2e:	b29a      	uxth	r2, r3
 801cd30:	687b      	ldr	r3, [r7, #4]
 801cd32:	835a      	strh	r2, [r3, #26]
    tcp_output(pcb);
 801cd34:	6878      	ldr	r0, [r7, #4]
 801cd36:	f002 fd5d 	bl	801f7f4 <tcp_output>
  }
  return;
 801cd3a:	e001      	b.n	801cd40 <tcp_timewait_input+0xc0>
    return;
 801cd3c:	bf00      	nop
 801cd3e:	e000      	b.n	801cd42 <tcp_timewait_input+0xc2>
  return;
 801cd40:	bf00      	nop
}
 801cd42:	3708      	adds	r7, #8
 801cd44:	46bd      	mov	sp, r7
 801cd46:	bd80      	pop	{r7, pc}
 801cd48:	2402a034 	.word	0x2402a034
 801cd4c:	0802e8a4 	.word	0x0802e8a4
 801cd50:	0802eabc 	.word	0x0802eabc
 801cd54:	0802e8f0 	.word	0x0802e8f0
 801cd58:	2402a028 	.word	0x2402a028
 801cd5c:	2402a02c 	.word	0x2402a02c
 801cd60:	2402a032 	.word	0x2402a032
 801cd64:	2402a018 	.word	0x2402a018
 801cd68:	240234ac 	.word	0x240234ac
 801cd6c:	240234b0 	.word	0x240234b0
 801cd70:	24029fec 	.word	0x24029fec

0801cd74 <tcp_process>:
 * @note the segment which arrived is saved in global variables, therefore only the pcb
 *       involved is passed as a parameter to this function
 */
static err_t
tcp_process(struct tcp_pcb *pcb)
{
 801cd74:	b590      	push	{r4, r7, lr}
 801cd76:	b08d      	sub	sp, #52	@ 0x34
 801cd78:	af04      	add	r7, sp, #16
 801cd7a:	6078      	str	r0, [r7, #4]
  struct tcp_seg *rseg;
  u8_t acceptable = 0;
 801cd7c:	2300      	movs	r3, #0
 801cd7e:	77fb      	strb	r3, [r7, #31]
  err_t err;

  err = ERR_OK;
 801cd80:	2300      	movs	r3, #0
 801cd82:	77bb      	strb	r3, [r7, #30]

  LWIP_ASSERT("tcp_process: invalid pcb", pcb != NULL);
 801cd84:	687b      	ldr	r3, [r7, #4]
 801cd86:	2b00      	cmp	r3, #0
 801cd88:	d106      	bne.n	801cd98 <tcp_process+0x24>
 801cd8a:	4b9d      	ldr	r3, [pc, #628]	@ (801d000 <tcp_process+0x28c>)
 801cd8c:	f44f 7247 	mov.w	r2, #796	@ 0x31c
 801cd90:	499c      	ldr	r1, [pc, #624]	@ (801d004 <tcp_process+0x290>)
 801cd92:	489d      	ldr	r0, [pc, #628]	@ (801d008 <tcp_process+0x294>)
 801cd94:	f00c fbba 	bl	802950c <iprintf>

  /* Process incoming RST segments. */
  if (flags & TCP_RST) {
 801cd98:	4b9c      	ldr	r3, [pc, #624]	@ (801d00c <tcp_process+0x298>)
 801cd9a:	781b      	ldrb	r3, [r3, #0]
 801cd9c:	f003 0304 	and.w	r3, r3, #4
 801cda0:	2b00      	cmp	r3, #0
 801cda2:	d04e      	beq.n	801ce42 <tcp_process+0xce>
    /* First, determine if the reset is acceptable. */
    if (pcb->state == SYN_SENT) {
 801cda4:	687b      	ldr	r3, [r7, #4]
 801cda6:	7d1b      	ldrb	r3, [r3, #20]
 801cda8:	2b02      	cmp	r3, #2
 801cdaa:	d108      	bne.n	801cdbe <tcp_process+0x4a>
      /* "In the SYN-SENT state (a RST received in response to an initial SYN),
          the RST is acceptable if the ACK field acknowledges the SYN." */
      if (ackno == pcb->snd_nxt) {
 801cdac:	687b      	ldr	r3, [r7, #4]
 801cdae:	6d1a      	ldr	r2, [r3, #80]	@ 0x50
 801cdb0:	4b97      	ldr	r3, [pc, #604]	@ (801d010 <tcp_process+0x29c>)
 801cdb2:	681b      	ldr	r3, [r3, #0]
 801cdb4:	429a      	cmp	r2, r3
 801cdb6:	d123      	bne.n	801ce00 <tcp_process+0x8c>
        acceptable = 1;
 801cdb8:	2301      	movs	r3, #1
 801cdba:	77fb      	strb	r3, [r7, #31]
 801cdbc:	e020      	b.n	801ce00 <tcp_process+0x8c>
      }
    } else {
      /* "In all states except SYN-SENT, all reset (RST) segments are validated
          by checking their SEQ-fields." */
      if (seqno == pcb->rcv_nxt) {
 801cdbe:	687b      	ldr	r3, [r7, #4]
 801cdc0:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 801cdc2:	4b94      	ldr	r3, [pc, #592]	@ (801d014 <tcp_process+0x2a0>)
 801cdc4:	681b      	ldr	r3, [r3, #0]
 801cdc6:	429a      	cmp	r2, r3
 801cdc8:	d102      	bne.n	801cdd0 <tcp_process+0x5c>
        acceptable = 1;
 801cdca:	2301      	movs	r3, #1
 801cdcc:	77fb      	strb	r3, [r7, #31]
 801cdce:	e017      	b.n	801ce00 <tcp_process+0x8c>
      } else  if (TCP_SEQ_BETWEEN(seqno, pcb->rcv_nxt,
 801cdd0:	4b90      	ldr	r3, [pc, #576]	@ (801d014 <tcp_process+0x2a0>)
 801cdd2:	681a      	ldr	r2, [r3, #0]
 801cdd4:	687b      	ldr	r3, [r7, #4]
 801cdd6:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801cdd8:	1ad3      	subs	r3, r2, r3
 801cdda:	2b00      	cmp	r3, #0
 801cddc:	db10      	blt.n	801ce00 <tcp_process+0x8c>
 801cdde:	4b8d      	ldr	r3, [pc, #564]	@ (801d014 <tcp_process+0x2a0>)
 801cde0:	681a      	ldr	r2, [r3, #0]
 801cde2:	687b      	ldr	r3, [r7, #4]
 801cde4:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801cde6:	6879      	ldr	r1, [r7, #4]
 801cde8:	8d09      	ldrh	r1, [r1, #40]	@ 0x28
 801cdea:	440b      	add	r3, r1
 801cdec:	1ad3      	subs	r3, r2, r3
 801cdee:	2b00      	cmp	r3, #0
 801cdf0:	dc06      	bgt.n	801ce00 <tcp_process+0x8c>
                                  pcb->rcv_nxt + pcb->rcv_wnd)) {
        /* If the sequence number is inside the window, we send a challenge ACK
           and wait for a re-send with matching sequence number.
           This follows RFC 5961 section 3.2 and addresses CVE-2004-0230
           (RST spoofing attack), which is present in RFC 793 RST handling. */
        tcp_ack_now(pcb);
 801cdf2:	687b      	ldr	r3, [r7, #4]
 801cdf4:	8b5b      	ldrh	r3, [r3, #26]
 801cdf6:	f043 0302 	orr.w	r3, r3, #2
 801cdfa:	b29a      	uxth	r2, r3
 801cdfc:	687b      	ldr	r3, [r7, #4]
 801cdfe:	835a      	strh	r2, [r3, #26]
      }
    }

    if (acceptable) {
 801ce00:	7ffb      	ldrb	r3, [r7, #31]
 801ce02:	2b00      	cmp	r3, #0
 801ce04:	d01b      	beq.n	801ce3e <tcp_process+0xca>
      LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_process: Connection RESET\n"));
      LWIP_ASSERT("tcp_input: pcb->state != CLOSED", pcb->state != CLOSED);
 801ce06:	687b      	ldr	r3, [r7, #4]
 801ce08:	7d1b      	ldrb	r3, [r3, #20]
 801ce0a:	2b00      	cmp	r3, #0
 801ce0c:	d106      	bne.n	801ce1c <tcp_process+0xa8>
 801ce0e:	4b7c      	ldr	r3, [pc, #496]	@ (801d000 <tcp_process+0x28c>)
 801ce10:	f44f 724e 	mov.w	r2, #824	@ 0x338
 801ce14:	4980      	ldr	r1, [pc, #512]	@ (801d018 <tcp_process+0x2a4>)
 801ce16:	487c      	ldr	r0, [pc, #496]	@ (801d008 <tcp_process+0x294>)
 801ce18:	f00c fb78 	bl	802950c <iprintf>
      recv_flags |= TF_RESET;
 801ce1c:	4b7f      	ldr	r3, [pc, #508]	@ (801d01c <tcp_process+0x2a8>)
 801ce1e:	781b      	ldrb	r3, [r3, #0]
 801ce20:	f043 0308 	orr.w	r3, r3, #8
 801ce24:	b2da      	uxtb	r2, r3
 801ce26:	4b7d      	ldr	r3, [pc, #500]	@ (801d01c <tcp_process+0x2a8>)
 801ce28:	701a      	strb	r2, [r3, #0]
      tcp_clear_flags(pcb, TF_ACK_DELAY);
 801ce2a:	687b      	ldr	r3, [r7, #4]
 801ce2c:	8b5b      	ldrh	r3, [r3, #26]
 801ce2e:	f023 0301 	bic.w	r3, r3, #1
 801ce32:	b29a      	uxth	r2, r3
 801ce34:	687b      	ldr	r3, [r7, #4]
 801ce36:	835a      	strh	r2, [r3, #26]
      return ERR_RST;
 801ce38:	f06f 030d 	mvn.w	r3, #13
 801ce3c:	e37a      	b.n	801d534 <tcp_process+0x7c0>
    } else {
      LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_process: unacceptable reset seqno %"U32_F" rcv_nxt %"U32_F"\n",
                                    seqno, pcb->rcv_nxt));
      LWIP_DEBUGF(TCP_DEBUG, ("tcp_process: unacceptable reset seqno %"U32_F" rcv_nxt %"U32_F"\n",
                              seqno, pcb->rcv_nxt));
      return ERR_OK;
 801ce3e:	2300      	movs	r3, #0
 801ce40:	e378      	b.n	801d534 <tcp_process+0x7c0>
    }
  }

  if ((flags & TCP_SYN) && (pcb->state != SYN_SENT && pcb->state != SYN_RCVD)) {
 801ce42:	4b72      	ldr	r3, [pc, #456]	@ (801d00c <tcp_process+0x298>)
 801ce44:	781b      	ldrb	r3, [r3, #0]
 801ce46:	f003 0302 	and.w	r3, r3, #2
 801ce4a:	2b00      	cmp	r3, #0
 801ce4c:	d010      	beq.n	801ce70 <tcp_process+0xfc>
 801ce4e:	687b      	ldr	r3, [r7, #4]
 801ce50:	7d1b      	ldrb	r3, [r3, #20]
 801ce52:	2b02      	cmp	r3, #2
 801ce54:	d00c      	beq.n	801ce70 <tcp_process+0xfc>
 801ce56:	687b      	ldr	r3, [r7, #4]
 801ce58:	7d1b      	ldrb	r3, [r3, #20]
 801ce5a:	2b03      	cmp	r3, #3
 801ce5c:	d008      	beq.n	801ce70 <tcp_process+0xfc>
    /* Cope with new connection attempt after remote end crashed */
    tcp_ack_now(pcb);
 801ce5e:	687b      	ldr	r3, [r7, #4]
 801ce60:	8b5b      	ldrh	r3, [r3, #26]
 801ce62:	f043 0302 	orr.w	r3, r3, #2
 801ce66:	b29a      	uxth	r2, r3
 801ce68:	687b      	ldr	r3, [r7, #4]
 801ce6a:	835a      	strh	r2, [r3, #26]
    return ERR_OK;
 801ce6c:	2300      	movs	r3, #0
 801ce6e:	e361      	b.n	801d534 <tcp_process+0x7c0>
  }

  if ((pcb->flags & TF_RXCLOSED) == 0) {
 801ce70:	687b      	ldr	r3, [r7, #4]
 801ce72:	8b5b      	ldrh	r3, [r3, #26]
 801ce74:	f003 0310 	and.w	r3, r3, #16
 801ce78:	2b00      	cmp	r3, #0
 801ce7a:	d103      	bne.n	801ce84 <tcp_process+0x110>
    /* Update the PCB (in)activity timer unless rx is closed (see tcp_shutdown) */
    pcb->tmr = tcp_ticks;
 801ce7c:	4b68      	ldr	r3, [pc, #416]	@ (801d020 <tcp_process+0x2ac>)
 801ce7e:	681a      	ldr	r2, [r3, #0]
 801ce80:	687b      	ldr	r3, [r7, #4]
 801ce82:	621a      	str	r2, [r3, #32]
  }
  pcb->keep_cnt_sent = 0;
 801ce84:	687b      	ldr	r3, [r7, #4]
 801ce86:	2200      	movs	r2, #0
 801ce88:	f883 209b 	strb.w	r2, [r3, #155]	@ 0x9b
  pcb->persist_probe = 0;
 801ce8c:	687b      	ldr	r3, [r7, #4]
 801ce8e:	2200      	movs	r2, #0
 801ce90:	f883 209a 	strb.w	r2, [r3, #154]	@ 0x9a

  tcp_parseopt(pcb);
 801ce94:	6878      	ldr	r0, [r7, #4]
 801ce96:	f001 fc2b 	bl	801e6f0 <tcp_parseopt>

  /* Do different things depending on the TCP state. */
  switch (pcb->state) {
 801ce9a:	687b      	ldr	r3, [r7, #4]
 801ce9c:	7d1b      	ldrb	r3, [r3, #20]
 801ce9e:	3b02      	subs	r3, #2
 801cea0:	2b07      	cmp	r3, #7
 801cea2:	f200 8337 	bhi.w	801d514 <tcp_process+0x7a0>
 801cea6:	a201      	add	r2, pc, #4	@ (adr r2, 801ceac <tcp_process+0x138>)
 801cea8:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 801ceac:	0801cecd 	.word	0x0801cecd
 801ceb0:	0801d0fd 	.word	0x0801d0fd
 801ceb4:	0801d275 	.word	0x0801d275
 801ceb8:	0801d29f 	.word	0x0801d29f
 801cebc:	0801d3c3 	.word	0x0801d3c3
 801cec0:	0801d275 	.word	0x0801d275
 801cec4:	0801d44f 	.word	0x0801d44f
 801cec8:	0801d4df 	.word	0x0801d4df
    case SYN_SENT:
      LWIP_DEBUGF(TCP_INPUT_DEBUG, ("SYN-SENT: ackno %"U32_F" pcb->snd_nxt %"U32_F" unacked %"U32_F"\n", ackno,
                                    pcb->snd_nxt, lwip_ntohl(pcb->unacked->tcphdr->seqno)));
      /* received SYN ACK with expected sequence number? */
      if ((flags & TCP_ACK) && (flags & TCP_SYN)
 801cecc:	4b4f      	ldr	r3, [pc, #316]	@ (801d00c <tcp_process+0x298>)
 801cece:	781b      	ldrb	r3, [r3, #0]
 801ced0:	f003 0310 	and.w	r3, r3, #16
 801ced4:	2b00      	cmp	r3, #0
 801ced6:	f000 80e4 	beq.w	801d0a2 <tcp_process+0x32e>
 801ceda:	4b4c      	ldr	r3, [pc, #304]	@ (801d00c <tcp_process+0x298>)
 801cedc:	781b      	ldrb	r3, [r3, #0]
 801cede:	f003 0302 	and.w	r3, r3, #2
 801cee2:	2b00      	cmp	r3, #0
 801cee4:	f000 80dd 	beq.w	801d0a2 <tcp_process+0x32e>
          && (ackno == pcb->lastack + 1)) {
 801cee8:	687b      	ldr	r3, [r7, #4]
 801ceea:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 801ceec:	1c5a      	adds	r2, r3, #1
 801ceee:	4b48      	ldr	r3, [pc, #288]	@ (801d010 <tcp_process+0x29c>)
 801cef0:	681b      	ldr	r3, [r3, #0]
 801cef2:	429a      	cmp	r2, r3
 801cef4:	f040 80d5 	bne.w	801d0a2 <tcp_process+0x32e>
        pcb->rcv_nxt = seqno + 1;
 801cef8:	4b46      	ldr	r3, [pc, #280]	@ (801d014 <tcp_process+0x2a0>)
 801cefa:	681b      	ldr	r3, [r3, #0]
 801cefc:	1c5a      	adds	r2, r3, #1
 801cefe:	687b      	ldr	r3, [r7, #4]
 801cf00:	625a      	str	r2, [r3, #36]	@ 0x24
        pcb->rcv_ann_right_edge = pcb->rcv_nxt;
 801cf02:	687b      	ldr	r3, [r7, #4]
 801cf04:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 801cf06:	687b      	ldr	r3, [r7, #4]
 801cf08:	62da      	str	r2, [r3, #44]	@ 0x2c
        pcb->lastack = ackno;
 801cf0a:	4b41      	ldr	r3, [pc, #260]	@ (801d010 <tcp_process+0x29c>)
 801cf0c:	681a      	ldr	r2, [r3, #0]
 801cf0e:	687b      	ldr	r3, [r7, #4]
 801cf10:	645a      	str	r2, [r3, #68]	@ 0x44
        pcb->snd_wnd = tcphdr->wnd;
 801cf12:	4b44      	ldr	r3, [pc, #272]	@ (801d024 <tcp_process+0x2b0>)
 801cf14:	681b      	ldr	r3, [r3, #0]
 801cf16:	89db      	ldrh	r3, [r3, #14]
 801cf18:	b29a      	uxth	r2, r3
 801cf1a:	687b      	ldr	r3, [r7, #4]
 801cf1c:	f8a3 2060 	strh.w	r2, [r3, #96]	@ 0x60
        pcb->snd_wnd_max = pcb->snd_wnd;
 801cf20:	687b      	ldr	r3, [r7, #4]
 801cf22:	f8b3 2060 	ldrh.w	r2, [r3, #96]	@ 0x60
 801cf26:	687b      	ldr	r3, [r7, #4]
 801cf28:	f8a3 2062 	strh.w	r2, [r3, #98]	@ 0x62
        pcb->snd_wl1 = seqno - 1; /* initialise to seqno - 1 to force window update */
 801cf2c:	4b39      	ldr	r3, [pc, #228]	@ (801d014 <tcp_process+0x2a0>)
 801cf2e:	681b      	ldr	r3, [r3, #0]
 801cf30:	1e5a      	subs	r2, r3, #1
 801cf32:	687b      	ldr	r3, [r7, #4]
 801cf34:	655a      	str	r2, [r3, #84]	@ 0x54
        pcb->state = ESTABLISHED;
 801cf36:	687b      	ldr	r3, [r7, #4]
 801cf38:	2204      	movs	r2, #4
 801cf3a:	751a      	strb	r2, [r3, #20]

#if TCP_CALCULATE_EFF_SEND_MSS
        pcb->mss = tcp_eff_send_mss(pcb->mss, &pcb->local_ip, &pcb->remote_ip);
 801cf3c:	687b      	ldr	r3, [r7, #4]
 801cf3e:	8e5c      	ldrh	r4, [r3, #50]	@ 0x32
 801cf40:	687b      	ldr	r3, [r7, #4]
 801cf42:	3304      	adds	r3, #4
 801cf44:	4618      	mov	r0, r3
 801cf46:	f007 fad3 	bl	80244f0 <ip4_route>
 801cf4a:	4601      	mov	r1, r0
 801cf4c:	687b      	ldr	r3, [r7, #4]
 801cf4e:	3304      	adds	r3, #4
 801cf50:	461a      	mov	r2, r3
 801cf52:	4620      	mov	r0, r4
 801cf54:	f7ff f88a 	bl	801c06c <tcp_eff_send_mss_netif>
 801cf58:	4603      	mov	r3, r0
 801cf5a:	461a      	mov	r2, r3
 801cf5c:	687b      	ldr	r3, [r7, #4]
 801cf5e:	865a      	strh	r2, [r3, #50]	@ 0x32
#endif /* TCP_CALCULATE_EFF_SEND_MSS */

        pcb->cwnd = LWIP_TCP_CALC_INITIAL_CWND(pcb->mss);
 801cf60:	687b      	ldr	r3, [r7, #4]
 801cf62:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801cf64:	009a      	lsls	r2, r3, #2
 801cf66:	687b      	ldr	r3, [r7, #4]
 801cf68:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801cf6a:	005b      	lsls	r3, r3, #1
 801cf6c:	f241 111c 	movw	r1, #4380	@ 0x111c
 801cf70:	428b      	cmp	r3, r1
 801cf72:	bf38      	it	cc
 801cf74:	460b      	movcc	r3, r1
 801cf76:	429a      	cmp	r2, r3
 801cf78:	d204      	bcs.n	801cf84 <tcp_process+0x210>
 801cf7a:	687b      	ldr	r3, [r7, #4]
 801cf7c:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801cf7e:	009b      	lsls	r3, r3, #2
 801cf80:	b29b      	uxth	r3, r3
 801cf82:	e00d      	b.n	801cfa0 <tcp_process+0x22c>
 801cf84:	687b      	ldr	r3, [r7, #4]
 801cf86:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801cf88:	005b      	lsls	r3, r3, #1
 801cf8a:	f241 121c 	movw	r2, #4380	@ 0x111c
 801cf8e:	4293      	cmp	r3, r2
 801cf90:	d904      	bls.n	801cf9c <tcp_process+0x228>
 801cf92:	687b      	ldr	r3, [r7, #4]
 801cf94:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801cf96:	005b      	lsls	r3, r3, #1
 801cf98:	b29b      	uxth	r3, r3
 801cf9a:	e001      	b.n	801cfa0 <tcp_process+0x22c>
 801cf9c:	f241 131c 	movw	r3, #4380	@ 0x111c
 801cfa0:	687a      	ldr	r2, [r7, #4]
 801cfa2:	f8a2 3048 	strh.w	r3, [r2, #72]	@ 0x48
        LWIP_DEBUGF(TCP_CWND_DEBUG, ("tcp_process (SENT): cwnd %"TCPWNDSIZE_F
                                     " ssthresh %"TCPWNDSIZE_F"\n",
                                     pcb->cwnd, pcb->ssthresh));
        LWIP_ASSERT("pcb->snd_queuelen > 0", (pcb->snd_queuelen > 0));
 801cfa6:	687b      	ldr	r3, [r7, #4]
 801cfa8:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 801cfac:	2b00      	cmp	r3, #0
 801cfae:	d106      	bne.n	801cfbe <tcp_process+0x24a>
 801cfb0:	4b13      	ldr	r3, [pc, #76]	@ (801d000 <tcp_process+0x28c>)
 801cfb2:	f44f 725b 	mov.w	r2, #876	@ 0x36c
 801cfb6:	491c      	ldr	r1, [pc, #112]	@ (801d028 <tcp_process+0x2b4>)
 801cfb8:	4813      	ldr	r0, [pc, #76]	@ (801d008 <tcp_process+0x294>)
 801cfba:	f00c faa7 	bl	802950c <iprintf>
        --pcb->snd_queuelen;
 801cfbe:	687b      	ldr	r3, [r7, #4]
 801cfc0:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 801cfc4:	3b01      	subs	r3, #1
 801cfc6:	b29a      	uxth	r2, r3
 801cfc8:	687b      	ldr	r3, [r7, #4]
 801cfca:	f8a3 2066 	strh.w	r2, [r3, #102]	@ 0x66
        LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_process: SYN-SENT --queuelen %"TCPWNDSIZE_F"\n", (tcpwnd_size_t)pcb->snd_queuelen));
        rseg = pcb->unacked;
 801cfce:	687b      	ldr	r3, [r7, #4]
 801cfd0:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801cfd2:	617b      	str	r3, [r7, #20]
        if (rseg == NULL) {
 801cfd4:	697b      	ldr	r3, [r7, #20]
 801cfd6:	2b00      	cmp	r3, #0
 801cfd8:	d12a      	bne.n	801d030 <tcp_process+0x2bc>
          /* might happen if tcp_output fails in tcp_rexmit_rto()
             in which case the segment is on the unsent list */
          rseg = pcb->unsent;
 801cfda:	687b      	ldr	r3, [r7, #4]
 801cfdc:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801cfde:	617b      	str	r3, [r7, #20]
          LWIP_ASSERT("no segment to free", rseg != NULL);
 801cfe0:	697b      	ldr	r3, [r7, #20]
 801cfe2:	2b00      	cmp	r3, #0
 801cfe4:	d106      	bne.n	801cff4 <tcp_process+0x280>
 801cfe6:	4b06      	ldr	r3, [pc, #24]	@ (801d000 <tcp_process+0x28c>)
 801cfe8:	f44f 725d 	mov.w	r2, #884	@ 0x374
 801cfec:	490f      	ldr	r1, [pc, #60]	@ (801d02c <tcp_process+0x2b8>)
 801cfee:	4806      	ldr	r0, [pc, #24]	@ (801d008 <tcp_process+0x294>)
 801cff0:	f00c fa8c 	bl	802950c <iprintf>
          pcb->unsent = rseg->next;
 801cff4:	697b      	ldr	r3, [r7, #20]
 801cff6:	681a      	ldr	r2, [r3, #0]
 801cff8:	687b      	ldr	r3, [r7, #4]
 801cffa:	66da      	str	r2, [r3, #108]	@ 0x6c
 801cffc:	e01c      	b.n	801d038 <tcp_process+0x2c4>
 801cffe:	bf00      	nop
 801d000:	0802e8a4 	.word	0x0802e8a4
 801d004:	0802eadc 	.word	0x0802eadc
 801d008:	0802e8f0 	.word	0x0802e8f0
 801d00c:	2402a034 	.word	0x2402a034
 801d010:	2402a02c 	.word	0x2402a02c
 801d014:	2402a028 	.word	0x2402a028
 801d018:	0802eaf8 	.word	0x0802eaf8
 801d01c:	2402a035 	.word	0x2402a035
 801d020:	24029fec 	.word	0x24029fec
 801d024:	2402a018 	.word	0x2402a018
 801d028:	0802eb18 	.word	0x0802eb18
 801d02c:	0802eb30 	.word	0x0802eb30
        } else {
          pcb->unacked = rseg->next;
 801d030:	697b      	ldr	r3, [r7, #20]
 801d032:	681a      	ldr	r2, [r3, #0]
 801d034:	687b      	ldr	r3, [r7, #4]
 801d036:	671a      	str	r2, [r3, #112]	@ 0x70
        }
        tcp_seg_free(rseg);
 801d038:	6978      	ldr	r0, [r7, #20]
 801d03a:	f7fe fc48 	bl	801b8ce <tcp_seg_free>

        /* If there's nothing left to acknowledge, stop the retransmit
           timer, otherwise reset it to start again */
        if (pcb->unacked == NULL) {
 801d03e:	687b      	ldr	r3, [r7, #4]
 801d040:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801d042:	2b00      	cmp	r3, #0
 801d044:	d104      	bne.n	801d050 <tcp_process+0x2dc>
          pcb->rtime = -1;
 801d046:	687b      	ldr	r3, [r7, #4]
 801d048:	f64f 72ff 	movw	r2, #65535	@ 0xffff
 801d04c:	861a      	strh	r2, [r3, #48]	@ 0x30
 801d04e:	e006      	b.n	801d05e <tcp_process+0x2ea>
        } else {
          pcb->rtime = 0;
 801d050:	687b      	ldr	r3, [r7, #4]
 801d052:	2200      	movs	r2, #0
 801d054:	861a      	strh	r2, [r3, #48]	@ 0x30
          pcb->nrtx = 0;
 801d056:	687b      	ldr	r3, [r7, #4]
 801d058:	2200      	movs	r2, #0
 801d05a:	f883 2042 	strb.w	r2, [r3, #66]	@ 0x42
        }

        /* Call the user specified function to call when successfully
         * connected. */
        TCP_EVENT_CONNECTED(pcb, ERR_OK, err);
 801d05e:	687b      	ldr	r3, [r7, #4]
 801d060:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 801d064:	2b00      	cmp	r3, #0
 801d066:	d00a      	beq.n	801d07e <tcp_process+0x30a>
 801d068:	687b      	ldr	r3, [r7, #4]
 801d06a:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 801d06e:	687a      	ldr	r2, [r7, #4]
 801d070:	6910      	ldr	r0, [r2, #16]
 801d072:	2200      	movs	r2, #0
 801d074:	6879      	ldr	r1, [r7, #4]
 801d076:	4798      	blx	r3
 801d078:	4603      	mov	r3, r0
 801d07a:	77bb      	strb	r3, [r7, #30]
 801d07c:	e001      	b.n	801d082 <tcp_process+0x30e>
 801d07e:	2300      	movs	r3, #0
 801d080:	77bb      	strb	r3, [r7, #30]
        if (err == ERR_ABRT) {
 801d082:	f997 301e 	ldrsb.w	r3, [r7, #30]
 801d086:	f113 0f0d 	cmn.w	r3, #13
 801d08a:	d102      	bne.n	801d092 <tcp_process+0x31e>
          return ERR_ABRT;
 801d08c:	f06f 030c 	mvn.w	r3, #12
 801d090:	e250      	b.n	801d534 <tcp_process+0x7c0>
        }
        tcp_ack_now(pcb);
 801d092:	687b      	ldr	r3, [r7, #4]
 801d094:	8b5b      	ldrh	r3, [r3, #26]
 801d096:	f043 0302 	orr.w	r3, r3, #2
 801d09a:	b29a      	uxth	r2, r3
 801d09c:	687b      	ldr	r3, [r7, #4]
 801d09e:	835a      	strh	r2, [r3, #26]
        if (pcb->nrtx < TCP_SYNMAXRTX) {
          pcb->rtime = 0;
          tcp_rexmit_rto(pcb);
        }
      }
      break;
 801d0a0:	e23a      	b.n	801d518 <tcp_process+0x7a4>
      else if (flags & TCP_ACK) {
 801d0a2:	4b98      	ldr	r3, [pc, #608]	@ (801d304 <tcp_process+0x590>)
 801d0a4:	781b      	ldrb	r3, [r3, #0]
 801d0a6:	f003 0310 	and.w	r3, r3, #16
 801d0aa:	2b00      	cmp	r3, #0
 801d0ac:	f000 8234 	beq.w	801d518 <tcp_process+0x7a4>
        tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
 801d0b0:	4b95      	ldr	r3, [pc, #596]	@ (801d308 <tcp_process+0x594>)
 801d0b2:	6819      	ldr	r1, [r3, #0]
 801d0b4:	4b95      	ldr	r3, [pc, #596]	@ (801d30c <tcp_process+0x598>)
 801d0b6:	881b      	ldrh	r3, [r3, #0]
 801d0b8:	461a      	mov	r2, r3
 801d0ba:	4b95      	ldr	r3, [pc, #596]	@ (801d310 <tcp_process+0x59c>)
 801d0bc:	681b      	ldr	r3, [r3, #0]
 801d0be:	18d0      	adds	r0, r2, r3
                ip_current_src_addr(), tcphdr->dest, tcphdr->src);
 801d0c0:	4b94      	ldr	r3, [pc, #592]	@ (801d314 <tcp_process+0x5a0>)
 801d0c2:	681b      	ldr	r3, [r3, #0]
        tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
 801d0c4:	885b      	ldrh	r3, [r3, #2]
 801d0c6:	b29b      	uxth	r3, r3
                ip_current_src_addr(), tcphdr->dest, tcphdr->src);
 801d0c8:	4a92      	ldr	r2, [pc, #584]	@ (801d314 <tcp_process+0x5a0>)
 801d0ca:	6812      	ldr	r2, [r2, #0]
        tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
 801d0cc:	8812      	ldrh	r2, [r2, #0]
 801d0ce:	b292      	uxth	r2, r2
 801d0d0:	9202      	str	r2, [sp, #8]
 801d0d2:	9301      	str	r3, [sp, #4]
 801d0d4:	4b90      	ldr	r3, [pc, #576]	@ (801d318 <tcp_process+0x5a4>)
 801d0d6:	9300      	str	r3, [sp, #0]
 801d0d8:	4b90      	ldr	r3, [pc, #576]	@ (801d31c <tcp_process+0x5a8>)
 801d0da:	4602      	mov	r2, r0
 801d0dc:	6878      	ldr	r0, [r7, #4]
 801d0de:	f003 f94b 	bl	8020378 <tcp_rst>
        if (pcb->nrtx < TCP_SYNMAXRTX) {
 801d0e2:	687b      	ldr	r3, [r7, #4]
 801d0e4:	f893 3042 	ldrb.w	r3, [r3, #66]	@ 0x42
 801d0e8:	2b05      	cmp	r3, #5
 801d0ea:	f200 8215 	bhi.w	801d518 <tcp_process+0x7a4>
          pcb->rtime = 0;
 801d0ee:	687b      	ldr	r3, [r7, #4]
 801d0f0:	2200      	movs	r2, #0
 801d0f2:	861a      	strh	r2, [r3, #48]	@ 0x30
          tcp_rexmit_rto(pcb);
 801d0f4:	6878      	ldr	r0, [r7, #4]
 801d0f6:	f002 ff17 	bl	801ff28 <tcp_rexmit_rto>
      break;
 801d0fa:	e20d      	b.n	801d518 <tcp_process+0x7a4>
    case SYN_RCVD:
      if (flags & TCP_ACK) {
 801d0fc:	4b81      	ldr	r3, [pc, #516]	@ (801d304 <tcp_process+0x590>)
 801d0fe:	781b      	ldrb	r3, [r3, #0]
 801d100:	f003 0310 	and.w	r3, r3, #16
 801d104:	2b00      	cmp	r3, #0
 801d106:	f000 80a1 	beq.w	801d24c <tcp_process+0x4d8>
        /* expected ACK number? */
        if (TCP_SEQ_BETWEEN(ackno, pcb->lastack + 1, pcb->snd_nxt)) {
 801d10a:	4b7f      	ldr	r3, [pc, #508]	@ (801d308 <tcp_process+0x594>)
 801d10c:	681a      	ldr	r2, [r3, #0]
 801d10e:	687b      	ldr	r3, [r7, #4]
 801d110:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 801d112:	1ad3      	subs	r3, r2, r3
 801d114:	3b01      	subs	r3, #1
 801d116:	2b00      	cmp	r3, #0
 801d118:	db7e      	blt.n	801d218 <tcp_process+0x4a4>
 801d11a:	4b7b      	ldr	r3, [pc, #492]	@ (801d308 <tcp_process+0x594>)
 801d11c:	681a      	ldr	r2, [r3, #0]
 801d11e:	687b      	ldr	r3, [r7, #4]
 801d120:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 801d122:	1ad3      	subs	r3, r2, r3
 801d124:	2b00      	cmp	r3, #0
 801d126:	dc77      	bgt.n	801d218 <tcp_process+0x4a4>
          pcb->state = ESTABLISHED;
 801d128:	687b      	ldr	r3, [r7, #4]
 801d12a:	2204      	movs	r2, #4
 801d12c:	751a      	strb	r2, [r3, #20]
          LWIP_DEBUGF(TCP_DEBUG, ("TCP connection established %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest));
#if LWIP_CALLBACK_API || TCP_LISTEN_BACKLOG
          if (pcb->listener == NULL) {
 801d12e:	687b      	ldr	r3, [r7, #4]
 801d130:	6fdb      	ldr	r3, [r3, #124]	@ 0x7c
 801d132:	2b00      	cmp	r3, #0
 801d134:	d102      	bne.n	801d13c <tcp_process+0x3c8>
            /* listen pcb might be closed by now */
            err = ERR_VAL;
 801d136:	23fa      	movs	r3, #250	@ 0xfa
 801d138:	77bb      	strb	r3, [r7, #30]
 801d13a:	e01d      	b.n	801d178 <tcp_process+0x404>
          } else
#endif /* LWIP_CALLBACK_API || TCP_LISTEN_BACKLOG */
          {
#if LWIP_CALLBACK_API
            LWIP_ASSERT("pcb->listener->accept != NULL", pcb->listener->accept != NULL);
 801d13c:	687b      	ldr	r3, [r7, #4]
 801d13e:	6fdb      	ldr	r3, [r3, #124]	@ 0x7c
 801d140:	699b      	ldr	r3, [r3, #24]
 801d142:	2b00      	cmp	r3, #0
 801d144:	d106      	bne.n	801d154 <tcp_process+0x3e0>
 801d146:	4b76      	ldr	r3, [pc, #472]	@ (801d320 <tcp_process+0x5ac>)
 801d148:	f44f 726a 	mov.w	r2, #936	@ 0x3a8
 801d14c:	4975      	ldr	r1, [pc, #468]	@ (801d324 <tcp_process+0x5b0>)
 801d14e:	4876      	ldr	r0, [pc, #472]	@ (801d328 <tcp_process+0x5b4>)
 801d150:	f00c f9dc 	bl	802950c <iprintf>
#endif
            tcp_backlog_accepted(pcb);
            /* Call the accept function. */
            TCP_EVENT_ACCEPT(pcb->listener, pcb, pcb->callback_arg, ERR_OK, err);
 801d154:	687b      	ldr	r3, [r7, #4]
 801d156:	6fdb      	ldr	r3, [r3, #124]	@ 0x7c
 801d158:	699b      	ldr	r3, [r3, #24]
 801d15a:	2b00      	cmp	r3, #0
 801d15c:	d00a      	beq.n	801d174 <tcp_process+0x400>
 801d15e:	687b      	ldr	r3, [r7, #4]
 801d160:	6fdb      	ldr	r3, [r3, #124]	@ 0x7c
 801d162:	699b      	ldr	r3, [r3, #24]
 801d164:	687a      	ldr	r2, [r7, #4]
 801d166:	6910      	ldr	r0, [r2, #16]
 801d168:	2200      	movs	r2, #0
 801d16a:	6879      	ldr	r1, [r7, #4]
 801d16c:	4798      	blx	r3
 801d16e:	4603      	mov	r3, r0
 801d170:	77bb      	strb	r3, [r7, #30]
 801d172:	e001      	b.n	801d178 <tcp_process+0x404>
 801d174:	23f0      	movs	r3, #240	@ 0xf0
 801d176:	77bb      	strb	r3, [r7, #30]
          }
          if (err != ERR_OK) {
 801d178:	f997 301e 	ldrsb.w	r3, [r7, #30]
 801d17c:	2b00      	cmp	r3, #0
 801d17e:	d00a      	beq.n	801d196 <tcp_process+0x422>
            /* If the accept function returns with an error, we abort
             * the connection. */
            /* Already aborted? */
            if (err != ERR_ABRT) {
 801d180:	f997 301e 	ldrsb.w	r3, [r7, #30]
 801d184:	f113 0f0d 	cmn.w	r3, #13
 801d188:	d002      	beq.n	801d190 <tcp_process+0x41c>
              tcp_abort(pcb);
 801d18a:	6878      	ldr	r0, [r7, #4]
 801d18c:	f7fd fd4c 	bl	801ac28 <tcp_abort>
            }
            return ERR_ABRT;
 801d190:	f06f 030c 	mvn.w	r3, #12
 801d194:	e1ce      	b.n	801d534 <tcp_process+0x7c0>
          }
          /* If there was any data contained within this ACK,
           * we'd better pass it on to the application as well. */
          tcp_receive(pcb);
 801d196:	6878      	ldr	r0, [r7, #4]
 801d198:	f000 fae0 	bl	801d75c <tcp_receive>

          /* Prevent ACK for SYN to generate a sent event */
          if (recv_acked != 0) {
 801d19c:	4b63      	ldr	r3, [pc, #396]	@ (801d32c <tcp_process+0x5b8>)
 801d19e:	881b      	ldrh	r3, [r3, #0]
 801d1a0:	2b00      	cmp	r3, #0
 801d1a2:	d005      	beq.n	801d1b0 <tcp_process+0x43c>
            recv_acked--;
 801d1a4:	4b61      	ldr	r3, [pc, #388]	@ (801d32c <tcp_process+0x5b8>)
 801d1a6:	881b      	ldrh	r3, [r3, #0]
 801d1a8:	3b01      	subs	r3, #1
 801d1aa:	b29a      	uxth	r2, r3
 801d1ac:	4b5f      	ldr	r3, [pc, #380]	@ (801d32c <tcp_process+0x5b8>)
 801d1ae:	801a      	strh	r2, [r3, #0]
          }

          pcb->cwnd = LWIP_TCP_CALC_INITIAL_CWND(pcb->mss);
 801d1b0:	687b      	ldr	r3, [r7, #4]
 801d1b2:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801d1b4:	009a      	lsls	r2, r3, #2
 801d1b6:	687b      	ldr	r3, [r7, #4]
 801d1b8:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801d1ba:	005b      	lsls	r3, r3, #1
 801d1bc:	f241 111c 	movw	r1, #4380	@ 0x111c
 801d1c0:	428b      	cmp	r3, r1
 801d1c2:	bf38      	it	cc
 801d1c4:	460b      	movcc	r3, r1
 801d1c6:	429a      	cmp	r2, r3
 801d1c8:	d204      	bcs.n	801d1d4 <tcp_process+0x460>
 801d1ca:	687b      	ldr	r3, [r7, #4]
 801d1cc:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801d1ce:	009b      	lsls	r3, r3, #2
 801d1d0:	b29b      	uxth	r3, r3
 801d1d2:	e00d      	b.n	801d1f0 <tcp_process+0x47c>
 801d1d4:	687b      	ldr	r3, [r7, #4]
 801d1d6:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801d1d8:	005b      	lsls	r3, r3, #1
 801d1da:	f241 121c 	movw	r2, #4380	@ 0x111c
 801d1de:	4293      	cmp	r3, r2
 801d1e0:	d904      	bls.n	801d1ec <tcp_process+0x478>
 801d1e2:	687b      	ldr	r3, [r7, #4]
 801d1e4:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801d1e6:	005b      	lsls	r3, r3, #1
 801d1e8:	b29b      	uxth	r3, r3
 801d1ea:	e001      	b.n	801d1f0 <tcp_process+0x47c>
 801d1ec:	f241 131c 	movw	r3, #4380	@ 0x111c
 801d1f0:	687a      	ldr	r2, [r7, #4]
 801d1f2:	f8a2 3048 	strh.w	r3, [r2, #72]	@ 0x48
          LWIP_DEBUGF(TCP_CWND_DEBUG, ("tcp_process (SYN_RCVD): cwnd %"TCPWNDSIZE_F
                                       " ssthresh %"TCPWNDSIZE_F"\n",
                                       pcb->cwnd, pcb->ssthresh));

          if (recv_flags & TF_GOT_FIN) {
 801d1f6:	4b4e      	ldr	r3, [pc, #312]	@ (801d330 <tcp_process+0x5bc>)
 801d1f8:	781b      	ldrb	r3, [r3, #0]
 801d1fa:	f003 0320 	and.w	r3, r3, #32
 801d1fe:	2b00      	cmp	r3, #0
 801d200:	d037      	beq.n	801d272 <tcp_process+0x4fe>
            tcp_ack_now(pcb);
 801d202:	687b      	ldr	r3, [r7, #4]
 801d204:	8b5b      	ldrh	r3, [r3, #26]
 801d206:	f043 0302 	orr.w	r3, r3, #2
 801d20a:	b29a      	uxth	r2, r3
 801d20c:	687b      	ldr	r3, [r7, #4]
 801d20e:	835a      	strh	r2, [r3, #26]
            pcb->state = CLOSE_WAIT;
 801d210:	687b      	ldr	r3, [r7, #4]
 801d212:	2207      	movs	r2, #7
 801d214:	751a      	strb	r2, [r3, #20]
          if (recv_flags & TF_GOT_FIN) {
 801d216:	e02c      	b.n	801d272 <tcp_process+0x4fe>
          }
        } else {
          /* incorrect ACK number, send RST */
          tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
 801d218:	4b3b      	ldr	r3, [pc, #236]	@ (801d308 <tcp_process+0x594>)
 801d21a:	6819      	ldr	r1, [r3, #0]
 801d21c:	4b3b      	ldr	r3, [pc, #236]	@ (801d30c <tcp_process+0x598>)
 801d21e:	881b      	ldrh	r3, [r3, #0]
 801d220:	461a      	mov	r2, r3
 801d222:	4b3b      	ldr	r3, [pc, #236]	@ (801d310 <tcp_process+0x59c>)
 801d224:	681b      	ldr	r3, [r3, #0]
 801d226:	18d0      	adds	r0, r2, r3
                  ip_current_src_addr(), tcphdr->dest, tcphdr->src);
 801d228:	4b3a      	ldr	r3, [pc, #232]	@ (801d314 <tcp_process+0x5a0>)
 801d22a:	681b      	ldr	r3, [r3, #0]
          tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
 801d22c:	885b      	ldrh	r3, [r3, #2]
 801d22e:	b29b      	uxth	r3, r3
                  ip_current_src_addr(), tcphdr->dest, tcphdr->src);
 801d230:	4a38      	ldr	r2, [pc, #224]	@ (801d314 <tcp_process+0x5a0>)
 801d232:	6812      	ldr	r2, [r2, #0]
          tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
 801d234:	8812      	ldrh	r2, [r2, #0]
 801d236:	b292      	uxth	r2, r2
 801d238:	9202      	str	r2, [sp, #8]
 801d23a:	9301      	str	r3, [sp, #4]
 801d23c:	4b36      	ldr	r3, [pc, #216]	@ (801d318 <tcp_process+0x5a4>)
 801d23e:	9300      	str	r3, [sp, #0]
 801d240:	4b36      	ldr	r3, [pc, #216]	@ (801d31c <tcp_process+0x5a8>)
 801d242:	4602      	mov	r2, r0
 801d244:	6878      	ldr	r0, [r7, #4]
 801d246:	f003 f897 	bl	8020378 <tcp_rst>
        }
      } else if ((flags & TCP_SYN) && (seqno == pcb->rcv_nxt - 1)) {
        /* Looks like another copy of the SYN - retransmit our SYN-ACK */
        tcp_rexmit(pcb);
      }
      break;
 801d24a:	e167      	b.n	801d51c <tcp_process+0x7a8>
      } else if ((flags & TCP_SYN) && (seqno == pcb->rcv_nxt - 1)) {
 801d24c:	4b2d      	ldr	r3, [pc, #180]	@ (801d304 <tcp_process+0x590>)
 801d24e:	781b      	ldrb	r3, [r3, #0]
 801d250:	f003 0302 	and.w	r3, r3, #2
 801d254:	2b00      	cmp	r3, #0
 801d256:	f000 8161 	beq.w	801d51c <tcp_process+0x7a8>
 801d25a:	687b      	ldr	r3, [r7, #4]
 801d25c:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801d25e:	1e5a      	subs	r2, r3, #1
 801d260:	4b2b      	ldr	r3, [pc, #172]	@ (801d310 <tcp_process+0x59c>)
 801d262:	681b      	ldr	r3, [r3, #0]
 801d264:	429a      	cmp	r2, r3
 801d266:	f040 8159 	bne.w	801d51c <tcp_process+0x7a8>
        tcp_rexmit(pcb);
 801d26a:	6878      	ldr	r0, [r7, #4]
 801d26c:	f002 fe7e 	bl	801ff6c <tcp_rexmit>
      break;
 801d270:	e154      	b.n	801d51c <tcp_process+0x7a8>
 801d272:	e153      	b.n	801d51c <tcp_process+0x7a8>
    case CLOSE_WAIT:
    /* FALLTHROUGH */
    case ESTABLISHED:
      tcp_receive(pcb);
 801d274:	6878      	ldr	r0, [r7, #4]
 801d276:	f000 fa71 	bl	801d75c <tcp_receive>
      if (recv_flags & TF_GOT_FIN) { /* passive close */
 801d27a:	4b2d      	ldr	r3, [pc, #180]	@ (801d330 <tcp_process+0x5bc>)
 801d27c:	781b      	ldrb	r3, [r3, #0]
 801d27e:	f003 0320 	and.w	r3, r3, #32
 801d282:	2b00      	cmp	r3, #0
 801d284:	f000 814c 	beq.w	801d520 <tcp_process+0x7ac>
        tcp_ack_now(pcb);
 801d288:	687b      	ldr	r3, [r7, #4]
 801d28a:	8b5b      	ldrh	r3, [r3, #26]
 801d28c:	f043 0302 	orr.w	r3, r3, #2
 801d290:	b29a      	uxth	r2, r3
 801d292:	687b      	ldr	r3, [r7, #4]
 801d294:	835a      	strh	r2, [r3, #26]
        pcb->state = CLOSE_WAIT;
 801d296:	687b      	ldr	r3, [r7, #4]
 801d298:	2207      	movs	r2, #7
 801d29a:	751a      	strb	r2, [r3, #20]
      }
      break;
 801d29c:	e140      	b.n	801d520 <tcp_process+0x7ac>
    case FIN_WAIT_1:
      tcp_receive(pcb);
 801d29e:	6878      	ldr	r0, [r7, #4]
 801d2a0:	f000 fa5c 	bl	801d75c <tcp_receive>
      if (recv_flags & TF_GOT_FIN) {
 801d2a4:	4b22      	ldr	r3, [pc, #136]	@ (801d330 <tcp_process+0x5bc>)
 801d2a6:	781b      	ldrb	r3, [r3, #0]
 801d2a8:	f003 0320 	and.w	r3, r3, #32
 801d2ac:	2b00      	cmp	r3, #0
 801d2ae:	d071      	beq.n	801d394 <tcp_process+0x620>
        if ((flags & TCP_ACK) && (ackno == pcb->snd_nxt) &&
 801d2b0:	4b14      	ldr	r3, [pc, #80]	@ (801d304 <tcp_process+0x590>)
 801d2b2:	781b      	ldrb	r3, [r3, #0]
 801d2b4:	f003 0310 	and.w	r3, r3, #16
 801d2b8:	2b00      	cmp	r3, #0
 801d2ba:	d060      	beq.n	801d37e <tcp_process+0x60a>
 801d2bc:	687b      	ldr	r3, [r7, #4]
 801d2be:	6d1a      	ldr	r2, [r3, #80]	@ 0x50
 801d2c0:	4b11      	ldr	r3, [pc, #68]	@ (801d308 <tcp_process+0x594>)
 801d2c2:	681b      	ldr	r3, [r3, #0]
 801d2c4:	429a      	cmp	r2, r3
 801d2c6:	d15a      	bne.n	801d37e <tcp_process+0x60a>
            pcb->unsent == NULL) {
 801d2c8:	687b      	ldr	r3, [r7, #4]
 801d2ca:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
        if ((flags & TCP_ACK) && (ackno == pcb->snd_nxt) &&
 801d2cc:	2b00      	cmp	r3, #0
 801d2ce:	d156      	bne.n	801d37e <tcp_process+0x60a>
          LWIP_DEBUGF(TCP_DEBUG,
                      ("TCP connection closed: FIN_WAIT_1 %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest));
          tcp_ack_now(pcb);
 801d2d0:	687b      	ldr	r3, [r7, #4]
 801d2d2:	8b5b      	ldrh	r3, [r3, #26]
 801d2d4:	f043 0302 	orr.w	r3, r3, #2
 801d2d8:	b29a      	uxth	r2, r3
 801d2da:	687b      	ldr	r3, [r7, #4]
 801d2dc:	835a      	strh	r2, [r3, #26]
          tcp_pcb_purge(pcb);
 801d2de:	6878      	ldr	r0, [r7, #4]
 801d2e0:	f7fe fdba 	bl	801be58 <tcp_pcb_purge>
          TCP_RMV_ACTIVE(pcb);
 801d2e4:	4b13      	ldr	r3, [pc, #76]	@ (801d334 <tcp_process+0x5c0>)
 801d2e6:	681b      	ldr	r3, [r3, #0]
 801d2e8:	687a      	ldr	r2, [r7, #4]
 801d2ea:	429a      	cmp	r2, r3
 801d2ec:	d105      	bne.n	801d2fa <tcp_process+0x586>
 801d2ee:	4b11      	ldr	r3, [pc, #68]	@ (801d334 <tcp_process+0x5c0>)
 801d2f0:	681b      	ldr	r3, [r3, #0]
 801d2f2:	68db      	ldr	r3, [r3, #12]
 801d2f4:	4a0f      	ldr	r2, [pc, #60]	@ (801d334 <tcp_process+0x5c0>)
 801d2f6:	6013      	str	r3, [r2, #0]
 801d2f8:	e02e      	b.n	801d358 <tcp_process+0x5e4>
 801d2fa:	4b0e      	ldr	r3, [pc, #56]	@ (801d334 <tcp_process+0x5c0>)
 801d2fc:	681b      	ldr	r3, [r3, #0]
 801d2fe:	613b      	str	r3, [r7, #16]
 801d300:	e027      	b.n	801d352 <tcp_process+0x5de>
 801d302:	bf00      	nop
 801d304:	2402a034 	.word	0x2402a034
 801d308:	2402a02c 	.word	0x2402a02c
 801d30c:	2402a032 	.word	0x2402a032
 801d310:	2402a028 	.word	0x2402a028
 801d314:	2402a018 	.word	0x2402a018
 801d318:	240234ac 	.word	0x240234ac
 801d31c:	240234b0 	.word	0x240234b0
 801d320:	0802e8a4 	.word	0x0802e8a4
 801d324:	0802eb44 	.word	0x0802eb44
 801d328:	0802e8f0 	.word	0x0802e8f0
 801d32c:	2402a030 	.word	0x2402a030
 801d330:	2402a035 	.word	0x2402a035
 801d334:	24029ff8 	.word	0x24029ff8
 801d338:	693b      	ldr	r3, [r7, #16]
 801d33a:	68db      	ldr	r3, [r3, #12]
 801d33c:	687a      	ldr	r2, [r7, #4]
 801d33e:	429a      	cmp	r2, r3
 801d340:	d104      	bne.n	801d34c <tcp_process+0x5d8>
 801d342:	687b      	ldr	r3, [r7, #4]
 801d344:	68da      	ldr	r2, [r3, #12]
 801d346:	693b      	ldr	r3, [r7, #16]
 801d348:	60da      	str	r2, [r3, #12]
 801d34a:	e005      	b.n	801d358 <tcp_process+0x5e4>
 801d34c:	693b      	ldr	r3, [r7, #16]
 801d34e:	68db      	ldr	r3, [r3, #12]
 801d350:	613b      	str	r3, [r7, #16]
 801d352:	693b      	ldr	r3, [r7, #16]
 801d354:	2b00      	cmp	r3, #0
 801d356:	d1ef      	bne.n	801d338 <tcp_process+0x5c4>
 801d358:	687b      	ldr	r3, [r7, #4]
 801d35a:	2200      	movs	r2, #0
 801d35c:	60da      	str	r2, [r3, #12]
 801d35e:	4b77      	ldr	r3, [pc, #476]	@ (801d53c <tcp_process+0x7c8>)
 801d360:	2201      	movs	r2, #1
 801d362:	701a      	strb	r2, [r3, #0]
          pcb->state = TIME_WAIT;
 801d364:	687b      	ldr	r3, [r7, #4]
 801d366:	220a      	movs	r2, #10
 801d368:	751a      	strb	r2, [r3, #20]
          TCP_REG(&tcp_tw_pcbs, pcb);
 801d36a:	4b75      	ldr	r3, [pc, #468]	@ (801d540 <tcp_process+0x7cc>)
 801d36c:	681a      	ldr	r2, [r3, #0]
 801d36e:	687b      	ldr	r3, [r7, #4]
 801d370:	60da      	str	r2, [r3, #12]
 801d372:	4a73      	ldr	r2, [pc, #460]	@ (801d540 <tcp_process+0x7cc>)
 801d374:	687b      	ldr	r3, [r7, #4]
 801d376:	6013      	str	r3, [r2, #0]
 801d378:	f003 f9c0 	bl	80206fc <tcp_timer_needed>
        }
      } else if ((flags & TCP_ACK) && (ackno == pcb->snd_nxt) &&
                 pcb->unsent == NULL) {
        pcb->state = FIN_WAIT_2;
      }
      break;
 801d37c:	e0d2      	b.n	801d524 <tcp_process+0x7b0>
          tcp_ack_now(pcb);
 801d37e:	687b      	ldr	r3, [r7, #4]
 801d380:	8b5b      	ldrh	r3, [r3, #26]
 801d382:	f043 0302 	orr.w	r3, r3, #2
 801d386:	b29a      	uxth	r2, r3
 801d388:	687b      	ldr	r3, [r7, #4]
 801d38a:	835a      	strh	r2, [r3, #26]
          pcb->state = CLOSING;
 801d38c:	687b      	ldr	r3, [r7, #4]
 801d38e:	2208      	movs	r2, #8
 801d390:	751a      	strb	r2, [r3, #20]
      break;
 801d392:	e0c7      	b.n	801d524 <tcp_process+0x7b0>
      } else if ((flags & TCP_ACK) && (ackno == pcb->snd_nxt) &&
 801d394:	4b6b      	ldr	r3, [pc, #428]	@ (801d544 <tcp_process+0x7d0>)
 801d396:	781b      	ldrb	r3, [r3, #0]
 801d398:	f003 0310 	and.w	r3, r3, #16
 801d39c:	2b00      	cmp	r3, #0
 801d39e:	f000 80c1 	beq.w	801d524 <tcp_process+0x7b0>
 801d3a2:	687b      	ldr	r3, [r7, #4]
 801d3a4:	6d1a      	ldr	r2, [r3, #80]	@ 0x50
 801d3a6:	4b68      	ldr	r3, [pc, #416]	@ (801d548 <tcp_process+0x7d4>)
 801d3a8:	681b      	ldr	r3, [r3, #0]
 801d3aa:	429a      	cmp	r2, r3
 801d3ac:	f040 80ba 	bne.w	801d524 <tcp_process+0x7b0>
                 pcb->unsent == NULL) {
 801d3b0:	687b      	ldr	r3, [r7, #4]
 801d3b2:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
      } else if ((flags & TCP_ACK) && (ackno == pcb->snd_nxt) &&
 801d3b4:	2b00      	cmp	r3, #0
 801d3b6:	f040 80b5 	bne.w	801d524 <tcp_process+0x7b0>
        pcb->state = FIN_WAIT_2;
 801d3ba:	687b      	ldr	r3, [r7, #4]
 801d3bc:	2206      	movs	r2, #6
 801d3be:	751a      	strb	r2, [r3, #20]
      break;
 801d3c0:	e0b0      	b.n	801d524 <tcp_process+0x7b0>
    case FIN_WAIT_2:
      tcp_receive(pcb);
 801d3c2:	6878      	ldr	r0, [r7, #4]
 801d3c4:	f000 f9ca 	bl	801d75c <tcp_receive>
      if (recv_flags & TF_GOT_FIN) {
 801d3c8:	4b60      	ldr	r3, [pc, #384]	@ (801d54c <tcp_process+0x7d8>)
 801d3ca:	781b      	ldrb	r3, [r3, #0]
 801d3cc:	f003 0320 	and.w	r3, r3, #32
 801d3d0:	2b00      	cmp	r3, #0
 801d3d2:	f000 80a9 	beq.w	801d528 <tcp_process+0x7b4>
        LWIP_DEBUGF(TCP_DEBUG, ("TCP connection closed: FIN_WAIT_2 %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest));
        tcp_ack_now(pcb);
 801d3d6:	687b      	ldr	r3, [r7, #4]
 801d3d8:	8b5b      	ldrh	r3, [r3, #26]
 801d3da:	f043 0302 	orr.w	r3, r3, #2
 801d3de:	b29a      	uxth	r2, r3
 801d3e0:	687b      	ldr	r3, [r7, #4]
 801d3e2:	835a      	strh	r2, [r3, #26]
        tcp_pcb_purge(pcb);
 801d3e4:	6878      	ldr	r0, [r7, #4]
 801d3e6:	f7fe fd37 	bl	801be58 <tcp_pcb_purge>
        TCP_RMV_ACTIVE(pcb);
 801d3ea:	4b59      	ldr	r3, [pc, #356]	@ (801d550 <tcp_process+0x7dc>)
 801d3ec:	681b      	ldr	r3, [r3, #0]
 801d3ee:	687a      	ldr	r2, [r7, #4]
 801d3f0:	429a      	cmp	r2, r3
 801d3f2:	d105      	bne.n	801d400 <tcp_process+0x68c>
 801d3f4:	4b56      	ldr	r3, [pc, #344]	@ (801d550 <tcp_process+0x7dc>)
 801d3f6:	681b      	ldr	r3, [r3, #0]
 801d3f8:	68db      	ldr	r3, [r3, #12]
 801d3fa:	4a55      	ldr	r2, [pc, #340]	@ (801d550 <tcp_process+0x7dc>)
 801d3fc:	6013      	str	r3, [r2, #0]
 801d3fe:	e013      	b.n	801d428 <tcp_process+0x6b4>
 801d400:	4b53      	ldr	r3, [pc, #332]	@ (801d550 <tcp_process+0x7dc>)
 801d402:	681b      	ldr	r3, [r3, #0]
 801d404:	60fb      	str	r3, [r7, #12]
 801d406:	e00c      	b.n	801d422 <tcp_process+0x6ae>
 801d408:	68fb      	ldr	r3, [r7, #12]
 801d40a:	68db      	ldr	r3, [r3, #12]
 801d40c:	687a      	ldr	r2, [r7, #4]
 801d40e:	429a      	cmp	r2, r3
 801d410:	d104      	bne.n	801d41c <tcp_process+0x6a8>
 801d412:	687b      	ldr	r3, [r7, #4]
 801d414:	68da      	ldr	r2, [r3, #12]
 801d416:	68fb      	ldr	r3, [r7, #12]
 801d418:	60da      	str	r2, [r3, #12]
 801d41a:	e005      	b.n	801d428 <tcp_process+0x6b4>
 801d41c:	68fb      	ldr	r3, [r7, #12]
 801d41e:	68db      	ldr	r3, [r3, #12]
 801d420:	60fb      	str	r3, [r7, #12]
 801d422:	68fb      	ldr	r3, [r7, #12]
 801d424:	2b00      	cmp	r3, #0
 801d426:	d1ef      	bne.n	801d408 <tcp_process+0x694>
 801d428:	687b      	ldr	r3, [r7, #4]
 801d42a:	2200      	movs	r2, #0
 801d42c:	60da      	str	r2, [r3, #12]
 801d42e:	4b43      	ldr	r3, [pc, #268]	@ (801d53c <tcp_process+0x7c8>)
 801d430:	2201      	movs	r2, #1
 801d432:	701a      	strb	r2, [r3, #0]
        pcb->state = TIME_WAIT;
 801d434:	687b      	ldr	r3, [r7, #4]
 801d436:	220a      	movs	r2, #10
 801d438:	751a      	strb	r2, [r3, #20]
        TCP_REG(&tcp_tw_pcbs, pcb);
 801d43a:	4b41      	ldr	r3, [pc, #260]	@ (801d540 <tcp_process+0x7cc>)
 801d43c:	681a      	ldr	r2, [r3, #0]
 801d43e:	687b      	ldr	r3, [r7, #4]
 801d440:	60da      	str	r2, [r3, #12]
 801d442:	4a3f      	ldr	r2, [pc, #252]	@ (801d540 <tcp_process+0x7cc>)
 801d444:	687b      	ldr	r3, [r7, #4]
 801d446:	6013      	str	r3, [r2, #0]
 801d448:	f003 f958 	bl	80206fc <tcp_timer_needed>
      }
      break;
 801d44c:	e06c      	b.n	801d528 <tcp_process+0x7b4>
    case CLOSING:
      tcp_receive(pcb);
 801d44e:	6878      	ldr	r0, [r7, #4]
 801d450:	f000 f984 	bl	801d75c <tcp_receive>
      if ((flags & TCP_ACK) && ackno == pcb->snd_nxt && pcb->unsent == NULL) {
 801d454:	4b3b      	ldr	r3, [pc, #236]	@ (801d544 <tcp_process+0x7d0>)
 801d456:	781b      	ldrb	r3, [r3, #0]
 801d458:	f003 0310 	and.w	r3, r3, #16
 801d45c:	2b00      	cmp	r3, #0
 801d45e:	d065      	beq.n	801d52c <tcp_process+0x7b8>
 801d460:	687b      	ldr	r3, [r7, #4]
 801d462:	6d1a      	ldr	r2, [r3, #80]	@ 0x50
 801d464:	4b38      	ldr	r3, [pc, #224]	@ (801d548 <tcp_process+0x7d4>)
 801d466:	681b      	ldr	r3, [r3, #0]
 801d468:	429a      	cmp	r2, r3
 801d46a:	d15f      	bne.n	801d52c <tcp_process+0x7b8>
 801d46c:	687b      	ldr	r3, [r7, #4]
 801d46e:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801d470:	2b00      	cmp	r3, #0
 801d472:	d15b      	bne.n	801d52c <tcp_process+0x7b8>
        LWIP_DEBUGF(TCP_DEBUG, ("TCP connection closed: CLOSING %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest));
        tcp_pcb_purge(pcb);
 801d474:	6878      	ldr	r0, [r7, #4]
 801d476:	f7fe fcef 	bl	801be58 <tcp_pcb_purge>
        TCP_RMV_ACTIVE(pcb);
 801d47a:	4b35      	ldr	r3, [pc, #212]	@ (801d550 <tcp_process+0x7dc>)
 801d47c:	681b      	ldr	r3, [r3, #0]
 801d47e:	687a      	ldr	r2, [r7, #4]
 801d480:	429a      	cmp	r2, r3
 801d482:	d105      	bne.n	801d490 <tcp_process+0x71c>
 801d484:	4b32      	ldr	r3, [pc, #200]	@ (801d550 <tcp_process+0x7dc>)
 801d486:	681b      	ldr	r3, [r3, #0]
 801d488:	68db      	ldr	r3, [r3, #12]
 801d48a:	4a31      	ldr	r2, [pc, #196]	@ (801d550 <tcp_process+0x7dc>)
 801d48c:	6013      	str	r3, [r2, #0]
 801d48e:	e013      	b.n	801d4b8 <tcp_process+0x744>
 801d490:	4b2f      	ldr	r3, [pc, #188]	@ (801d550 <tcp_process+0x7dc>)
 801d492:	681b      	ldr	r3, [r3, #0]
 801d494:	61bb      	str	r3, [r7, #24]
 801d496:	e00c      	b.n	801d4b2 <tcp_process+0x73e>
 801d498:	69bb      	ldr	r3, [r7, #24]
 801d49a:	68db      	ldr	r3, [r3, #12]
 801d49c:	687a      	ldr	r2, [r7, #4]
 801d49e:	429a      	cmp	r2, r3
 801d4a0:	d104      	bne.n	801d4ac <tcp_process+0x738>
 801d4a2:	687b      	ldr	r3, [r7, #4]
 801d4a4:	68da      	ldr	r2, [r3, #12]
 801d4a6:	69bb      	ldr	r3, [r7, #24]
 801d4a8:	60da      	str	r2, [r3, #12]
 801d4aa:	e005      	b.n	801d4b8 <tcp_process+0x744>
 801d4ac:	69bb      	ldr	r3, [r7, #24]
 801d4ae:	68db      	ldr	r3, [r3, #12]
 801d4b0:	61bb      	str	r3, [r7, #24]
 801d4b2:	69bb      	ldr	r3, [r7, #24]
 801d4b4:	2b00      	cmp	r3, #0
 801d4b6:	d1ef      	bne.n	801d498 <tcp_process+0x724>
 801d4b8:	687b      	ldr	r3, [r7, #4]
 801d4ba:	2200      	movs	r2, #0
 801d4bc:	60da      	str	r2, [r3, #12]
 801d4be:	4b1f      	ldr	r3, [pc, #124]	@ (801d53c <tcp_process+0x7c8>)
 801d4c0:	2201      	movs	r2, #1
 801d4c2:	701a      	strb	r2, [r3, #0]
        pcb->state = TIME_WAIT;
 801d4c4:	687b      	ldr	r3, [r7, #4]
 801d4c6:	220a      	movs	r2, #10
 801d4c8:	751a      	strb	r2, [r3, #20]
        TCP_REG(&tcp_tw_pcbs, pcb);
 801d4ca:	4b1d      	ldr	r3, [pc, #116]	@ (801d540 <tcp_process+0x7cc>)
 801d4cc:	681a      	ldr	r2, [r3, #0]
 801d4ce:	687b      	ldr	r3, [r7, #4]
 801d4d0:	60da      	str	r2, [r3, #12]
 801d4d2:	4a1b      	ldr	r2, [pc, #108]	@ (801d540 <tcp_process+0x7cc>)
 801d4d4:	687b      	ldr	r3, [r7, #4]
 801d4d6:	6013      	str	r3, [r2, #0]
 801d4d8:	f003 f910 	bl	80206fc <tcp_timer_needed>
      }
      break;
 801d4dc:	e026      	b.n	801d52c <tcp_process+0x7b8>
    case LAST_ACK:
      tcp_receive(pcb);
 801d4de:	6878      	ldr	r0, [r7, #4]
 801d4e0:	f000 f93c 	bl	801d75c <tcp_receive>
      if ((flags & TCP_ACK) && ackno == pcb->snd_nxt && pcb->unsent == NULL) {
 801d4e4:	4b17      	ldr	r3, [pc, #92]	@ (801d544 <tcp_process+0x7d0>)
 801d4e6:	781b      	ldrb	r3, [r3, #0]
 801d4e8:	f003 0310 	and.w	r3, r3, #16
 801d4ec:	2b00      	cmp	r3, #0
 801d4ee:	d01f      	beq.n	801d530 <tcp_process+0x7bc>
 801d4f0:	687b      	ldr	r3, [r7, #4]
 801d4f2:	6d1a      	ldr	r2, [r3, #80]	@ 0x50
 801d4f4:	4b14      	ldr	r3, [pc, #80]	@ (801d548 <tcp_process+0x7d4>)
 801d4f6:	681b      	ldr	r3, [r3, #0]
 801d4f8:	429a      	cmp	r2, r3
 801d4fa:	d119      	bne.n	801d530 <tcp_process+0x7bc>
 801d4fc:	687b      	ldr	r3, [r7, #4]
 801d4fe:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801d500:	2b00      	cmp	r3, #0
 801d502:	d115      	bne.n	801d530 <tcp_process+0x7bc>
        LWIP_DEBUGF(TCP_DEBUG, ("TCP connection closed: LAST_ACK %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest));
        /* bugfix #21699: don't set pcb->state to CLOSED here or we risk leaking segments */
        recv_flags |= TF_CLOSED;
 801d504:	4b11      	ldr	r3, [pc, #68]	@ (801d54c <tcp_process+0x7d8>)
 801d506:	781b      	ldrb	r3, [r3, #0]
 801d508:	f043 0310 	orr.w	r3, r3, #16
 801d50c:	b2da      	uxtb	r2, r3
 801d50e:	4b0f      	ldr	r3, [pc, #60]	@ (801d54c <tcp_process+0x7d8>)
 801d510:	701a      	strb	r2, [r3, #0]
      }
      break;
 801d512:	e00d      	b.n	801d530 <tcp_process+0x7bc>
    default:
      break;
 801d514:	bf00      	nop
 801d516:	e00c      	b.n	801d532 <tcp_process+0x7be>
      break;
 801d518:	bf00      	nop
 801d51a:	e00a      	b.n	801d532 <tcp_process+0x7be>
      break;
 801d51c:	bf00      	nop
 801d51e:	e008      	b.n	801d532 <tcp_process+0x7be>
      break;
 801d520:	bf00      	nop
 801d522:	e006      	b.n	801d532 <tcp_process+0x7be>
      break;
 801d524:	bf00      	nop
 801d526:	e004      	b.n	801d532 <tcp_process+0x7be>
      break;
 801d528:	bf00      	nop
 801d52a:	e002      	b.n	801d532 <tcp_process+0x7be>
      break;
 801d52c:	bf00      	nop
 801d52e:	e000      	b.n	801d532 <tcp_process+0x7be>
      break;
 801d530:	bf00      	nop
  }
  return ERR_OK;
 801d532:	2300      	movs	r3, #0
}
 801d534:	4618      	mov	r0, r3
 801d536:	3724      	adds	r7, #36	@ 0x24
 801d538:	46bd      	mov	sp, r7
 801d53a:	bd90      	pop	{r4, r7, pc}
 801d53c:	2402a000 	.word	0x2402a000
 801d540:	24029ffc 	.word	0x24029ffc
 801d544:	2402a034 	.word	0x2402a034
 801d548:	2402a02c 	.word	0x2402a02c
 801d54c:	2402a035 	.word	0x2402a035
 801d550:	24029ff8 	.word	0x24029ff8

0801d554 <tcp_oos_insert_segment>:
 *
 * Called from tcp_receive()
 */
static void
tcp_oos_insert_segment(struct tcp_seg *cseg, struct tcp_seg *next)
{
 801d554:	b590      	push	{r4, r7, lr}
 801d556:	b085      	sub	sp, #20
 801d558:	af00      	add	r7, sp, #0
 801d55a:	6078      	str	r0, [r7, #4]
 801d55c:	6039      	str	r1, [r7, #0]
  struct tcp_seg *old_seg;

  LWIP_ASSERT("tcp_oos_insert_segment: invalid cseg", cseg != NULL);
 801d55e:	687b      	ldr	r3, [r7, #4]
 801d560:	2b00      	cmp	r3, #0
 801d562:	d106      	bne.n	801d572 <tcp_oos_insert_segment+0x1e>
 801d564:	4b3b      	ldr	r3, [pc, #236]	@ (801d654 <tcp_oos_insert_segment+0x100>)
 801d566:	f240 421f 	movw	r2, #1055	@ 0x41f
 801d56a:	493b      	ldr	r1, [pc, #236]	@ (801d658 <tcp_oos_insert_segment+0x104>)
 801d56c:	483b      	ldr	r0, [pc, #236]	@ (801d65c <tcp_oos_insert_segment+0x108>)
 801d56e:	f00b ffcd 	bl	802950c <iprintf>

  if (TCPH_FLAGS(cseg->tcphdr) & TCP_FIN) {
 801d572:	687b      	ldr	r3, [r7, #4]
 801d574:	691b      	ldr	r3, [r3, #16]
 801d576:	899b      	ldrh	r3, [r3, #12]
 801d578:	b29b      	uxth	r3, r3
 801d57a:	4618      	mov	r0, r3
 801d57c:	f7fb f86c 	bl	8018658 <lwip_htons>
 801d580:	4603      	mov	r3, r0
 801d582:	b2db      	uxtb	r3, r3
 801d584:	f003 0301 	and.w	r3, r3, #1
 801d588:	2b00      	cmp	r3, #0
 801d58a:	d028      	beq.n	801d5de <tcp_oos_insert_segment+0x8a>
    /* received segment overlaps all following segments */
    tcp_segs_free(next);
 801d58c:	6838      	ldr	r0, [r7, #0]
 801d58e:	f7fe f989 	bl	801b8a4 <tcp_segs_free>
    next = NULL;
 801d592:	2300      	movs	r3, #0
 801d594:	603b      	str	r3, [r7, #0]
 801d596:	e056      	b.n	801d646 <tcp_oos_insert_segment+0xf2>
       oos queue may have segments with FIN flag */
    while (next &&
           TCP_SEQ_GEQ((seqno + cseg->len),
                       (next->tcphdr->seqno + next->len))) {
      /* cseg with FIN already processed */
      if (TCPH_FLAGS(next->tcphdr) & TCP_FIN) {
 801d598:	683b      	ldr	r3, [r7, #0]
 801d59a:	691b      	ldr	r3, [r3, #16]
 801d59c:	899b      	ldrh	r3, [r3, #12]
 801d59e:	b29b      	uxth	r3, r3
 801d5a0:	4618      	mov	r0, r3
 801d5a2:	f7fb f859 	bl	8018658 <lwip_htons>
 801d5a6:	4603      	mov	r3, r0
 801d5a8:	b2db      	uxtb	r3, r3
 801d5aa:	f003 0301 	and.w	r3, r3, #1
 801d5ae:	2b00      	cmp	r3, #0
 801d5b0:	d00d      	beq.n	801d5ce <tcp_oos_insert_segment+0x7a>
        TCPH_SET_FLAG(cseg->tcphdr, TCP_FIN);
 801d5b2:	687b      	ldr	r3, [r7, #4]
 801d5b4:	691b      	ldr	r3, [r3, #16]
 801d5b6:	899b      	ldrh	r3, [r3, #12]
 801d5b8:	b29c      	uxth	r4, r3
 801d5ba:	2001      	movs	r0, #1
 801d5bc:	f7fb f84c 	bl	8018658 <lwip_htons>
 801d5c0:	4603      	mov	r3, r0
 801d5c2:	461a      	mov	r2, r3
 801d5c4:	687b      	ldr	r3, [r7, #4]
 801d5c6:	691b      	ldr	r3, [r3, #16]
 801d5c8:	4322      	orrs	r2, r4
 801d5ca:	b292      	uxth	r2, r2
 801d5cc:	819a      	strh	r2, [r3, #12]
      }
      old_seg = next;
 801d5ce:	683b      	ldr	r3, [r7, #0]
 801d5d0:	60fb      	str	r3, [r7, #12]
      next = next->next;
 801d5d2:	683b      	ldr	r3, [r7, #0]
 801d5d4:	681b      	ldr	r3, [r3, #0]
 801d5d6:	603b      	str	r3, [r7, #0]
      tcp_seg_free(old_seg);
 801d5d8:	68f8      	ldr	r0, [r7, #12]
 801d5da:	f7fe f978 	bl	801b8ce <tcp_seg_free>
    while (next &&
 801d5de:	683b      	ldr	r3, [r7, #0]
 801d5e0:	2b00      	cmp	r3, #0
 801d5e2:	d00e      	beq.n	801d602 <tcp_oos_insert_segment+0xae>
           TCP_SEQ_GEQ((seqno + cseg->len),
 801d5e4:	687b      	ldr	r3, [r7, #4]
 801d5e6:	891b      	ldrh	r3, [r3, #8]
 801d5e8:	461a      	mov	r2, r3
 801d5ea:	4b1d      	ldr	r3, [pc, #116]	@ (801d660 <tcp_oos_insert_segment+0x10c>)
 801d5ec:	681b      	ldr	r3, [r3, #0]
 801d5ee:	441a      	add	r2, r3
 801d5f0:	683b      	ldr	r3, [r7, #0]
 801d5f2:	691b      	ldr	r3, [r3, #16]
 801d5f4:	685b      	ldr	r3, [r3, #4]
 801d5f6:	6839      	ldr	r1, [r7, #0]
 801d5f8:	8909      	ldrh	r1, [r1, #8]
 801d5fa:	440b      	add	r3, r1
 801d5fc:	1ad3      	subs	r3, r2, r3
    while (next &&
 801d5fe:	2b00      	cmp	r3, #0
 801d600:	daca      	bge.n	801d598 <tcp_oos_insert_segment+0x44>
    }
    if (next &&
 801d602:	683b      	ldr	r3, [r7, #0]
 801d604:	2b00      	cmp	r3, #0
 801d606:	d01e      	beq.n	801d646 <tcp_oos_insert_segment+0xf2>
        TCP_SEQ_GT(seqno + cseg->len, next->tcphdr->seqno)) {
 801d608:	687b      	ldr	r3, [r7, #4]
 801d60a:	891b      	ldrh	r3, [r3, #8]
 801d60c:	461a      	mov	r2, r3
 801d60e:	4b14      	ldr	r3, [pc, #80]	@ (801d660 <tcp_oos_insert_segment+0x10c>)
 801d610:	681b      	ldr	r3, [r3, #0]
 801d612:	441a      	add	r2, r3
 801d614:	683b      	ldr	r3, [r7, #0]
 801d616:	691b      	ldr	r3, [r3, #16]
 801d618:	685b      	ldr	r3, [r3, #4]
 801d61a:	1ad3      	subs	r3, r2, r3
    if (next &&
 801d61c:	2b00      	cmp	r3, #0
 801d61e:	dd12      	ble.n	801d646 <tcp_oos_insert_segment+0xf2>
      /* We need to trim the incoming segment. */
      cseg->len = (u16_t)(next->tcphdr->seqno - seqno);
 801d620:	683b      	ldr	r3, [r7, #0]
 801d622:	691b      	ldr	r3, [r3, #16]
 801d624:	685b      	ldr	r3, [r3, #4]
 801d626:	b29a      	uxth	r2, r3
 801d628:	4b0d      	ldr	r3, [pc, #52]	@ (801d660 <tcp_oos_insert_segment+0x10c>)
 801d62a:	681b      	ldr	r3, [r3, #0]
 801d62c:	b29b      	uxth	r3, r3
 801d62e:	1ad3      	subs	r3, r2, r3
 801d630:	b29a      	uxth	r2, r3
 801d632:	687b      	ldr	r3, [r7, #4]
 801d634:	811a      	strh	r2, [r3, #8]
      pbuf_realloc(cseg->p, cseg->len);
 801d636:	687b      	ldr	r3, [r7, #4]
 801d638:	685a      	ldr	r2, [r3, #4]
 801d63a:	687b      	ldr	r3, [r7, #4]
 801d63c:	891b      	ldrh	r3, [r3, #8]
 801d63e:	4619      	mov	r1, r3
 801d640:	4610      	mov	r0, r2
 801d642:	f7fc fb35 	bl	8019cb0 <pbuf_realloc>
    }
  }
  cseg->next = next;
 801d646:	687b      	ldr	r3, [r7, #4]
 801d648:	683a      	ldr	r2, [r7, #0]
 801d64a:	601a      	str	r2, [r3, #0]
}
 801d64c:	bf00      	nop
 801d64e:	3714      	adds	r7, #20
 801d650:	46bd      	mov	sp, r7
 801d652:	bd90      	pop	{r4, r7, pc}
 801d654:	0802e8a4 	.word	0x0802e8a4
 801d658:	0802eb64 	.word	0x0802eb64
 801d65c:	0802e8f0 	.word	0x0802e8f0
 801d660:	2402a028 	.word	0x2402a028

0801d664 <tcp_free_acked_segments>:

/** Remove segments from a list if the incoming ACK acknowledges them */
static struct tcp_seg *
tcp_free_acked_segments(struct tcp_pcb *pcb, struct tcp_seg *seg_list, const char *dbg_list_name,
                        struct tcp_seg *dbg_other_seg_list)
{
 801d664:	b5b0      	push	{r4, r5, r7, lr}
 801d666:	b086      	sub	sp, #24
 801d668:	af00      	add	r7, sp, #0
 801d66a:	60f8      	str	r0, [r7, #12]
 801d66c:	60b9      	str	r1, [r7, #8]
 801d66e:	607a      	str	r2, [r7, #4]
 801d670:	603b      	str	r3, [r7, #0]
  u16_t clen;

  LWIP_UNUSED_ARG(dbg_list_name);
  LWIP_UNUSED_ARG(dbg_other_seg_list);

  while (seg_list != NULL &&
 801d672:	e03e      	b.n	801d6f2 <tcp_free_acked_segments+0x8e>
    LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: removing %"U32_F":%"U32_F" from pcb->%s\n",
                                  lwip_ntohl(seg_list->tcphdr->seqno),
                                  lwip_ntohl(seg_list->tcphdr->seqno) + TCP_TCPLEN(seg_list),
                                  dbg_list_name));

    next = seg_list;
 801d674:	68bb      	ldr	r3, [r7, #8]
 801d676:	617b      	str	r3, [r7, #20]
    seg_list = seg_list->next;
 801d678:	68bb      	ldr	r3, [r7, #8]
 801d67a:	681b      	ldr	r3, [r3, #0]
 801d67c:	60bb      	str	r3, [r7, #8]

    clen = pbuf_clen(next->p);
 801d67e:	697b      	ldr	r3, [r7, #20]
 801d680:	685b      	ldr	r3, [r3, #4]
 801d682:	4618      	mov	r0, r3
 801d684:	f7fc fd58 	bl	801a138 <pbuf_clen>
 801d688:	4603      	mov	r3, r0
 801d68a:	827b      	strh	r3, [r7, #18]
    LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_receive: queuelen %"TCPWNDSIZE_F" ... ",
                                 (tcpwnd_size_t)pcb->snd_queuelen));
    LWIP_ASSERT("pcb->snd_queuelen >= pbuf_clen(next->p)", (pcb->snd_queuelen >= clen));
 801d68c:	68fb      	ldr	r3, [r7, #12]
 801d68e:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 801d692:	8a7a      	ldrh	r2, [r7, #18]
 801d694:	429a      	cmp	r2, r3
 801d696:	d906      	bls.n	801d6a6 <tcp_free_acked_segments+0x42>
 801d698:	4b2a      	ldr	r3, [pc, #168]	@ (801d744 <tcp_free_acked_segments+0xe0>)
 801d69a:	f240 4257 	movw	r2, #1111	@ 0x457
 801d69e:	492a      	ldr	r1, [pc, #168]	@ (801d748 <tcp_free_acked_segments+0xe4>)
 801d6a0:	482a      	ldr	r0, [pc, #168]	@ (801d74c <tcp_free_acked_segments+0xe8>)
 801d6a2:	f00b ff33 	bl	802950c <iprintf>

    pcb->snd_queuelen = (u16_t)(pcb->snd_queuelen - clen);
 801d6a6:	68fb      	ldr	r3, [r7, #12]
 801d6a8:	f8b3 2066 	ldrh.w	r2, [r3, #102]	@ 0x66
 801d6ac:	8a7b      	ldrh	r3, [r7, #18]
 801d6ae:	1ad3      	subs	r3, r2, r3
 801d6b0:	b29a      	uxth	r2, r3
 801d6b2:	68fb      	ldr	r3, [r7, #12]
 801d6b4:	f8a3 2066 	strh.w	r2, [r3, #102]	@ 0x66
    recv_acked = (tcpwnd_size_t)(recv_acked + next->len);
 801d6b8:	697b      	ldr	r3, [r7, #20]
 801d6ba:	891a      	ldrh	r2, [r3, #8]
 801d6bc:	4b24      	ldr	r3, [pc, #144]	@ (801d750 <tcp_free_acked_segments+0xec>)
 801d6be:	881b      	ldrh	r3, [r3, #0]
 801d6c0:	4413      	add	r3, r2
 801d6c2:	b29a      	uxth	r2, r3
 801d6c4:	4b22      	ldr	r3, [pc, #136]	@ (801d750 <tcp_free_acked_segments+0xec>)
 801d6c6:	801a      	strh	r2, [r3, #0]
    tcp_seg_free(next);
 801d6c8:	6978      	ldr	r0, [r7, #20]
 801d6ca:	f7fe f900 	bl	801b8ce <tcp_seg_free>

    LWIP_DEBUGF(TCP_QLEN_DEBUG, ("%"TCPWNDSIZE_F" (after freeing %s)\n",
                                 (tcpwnd_size_t)pcb->snd_queuelen,
                                 dbg_list_name));
    if (pcb->snd_queuelen != 0) {
 801d6ce:	68fb      	ldr	r3, [r7, #12]
 801d6d0:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 801d6d4:	2b00      	cmp	r3, #0
 801d6d6:	d00c      	beq.n	801d6f2 <tcp_free_acked_segments+0x8e>
      LWIP_ASSERT("tcp_receive: valid queue length",
 801d6d8:	68bb      	ldr	r3, [r7, #8]
 801d6da:	2b00      	cmp	r3, #0
 801d6dc:	d109      	bne.n	801d6f2 <tcp_free_acked_segments+0x8e>
 801d6de:	683b      	ldr	r3, [r7, #0]
 801d6e0:	2b00      	cmp	r3, #0
 801d6e2:	d106      	bne.n	801d6f2 <tcp_free_acked_segments+0x8e>
 801d6e4:	4b17      	ldr	r3, [pc, #92]	@ (801d744 <tcp_free_acked_segments+0xe0>)
 801d6e6:	f240 4261 	movw	r2, #1121	@ 0x461
 801d6ea:	491a      	ldr	r1, [pc, #104]	@ (801d754 <tcp_free_acked_segments+0xf0>)
 801d6ec:	4817      	ldr	r0, [pc, #92]	@ (801d74c <tcp_free_acked_segments+0xe8>)
 801d6ee:	f00b ff0d 	bl	802950c <iprintf>
  while (seg_list != NULL &&
 801d6f2:	68bb      	ldr	r3, [r7, #8]
 801d6f4:	2b00      	cmp	r3, #0
 801d6f6:	d020      	beq.n	801d73a <tcp_free_acked_segments+0xd6>
         TCP_SEQ_LEQ(lwip_ntohl(seg_list->tcphdr->seqno) +
 801d6f8:	68bb      	ldr	r3, [r7, #8]
 801d6fa:	691b      	ldr	r3, [r3, #16]
 801d6fc:	685b      	ldr	r3, [r3, #4]
 801d6fe:	4618      	mov	r0, r3
 801d700:	f7fa ffbf 	bl	8018682 <lwip_htonl>
 801d704:	4604      	mov	r4, r0
 801d706:	68bb      	ldr	r3, [r7, #8]
 801d708:	891b      	ldrh	r3, [r3, #8]
 801d70a:	461d      	mov	r5, r3
 801d70c:	68bb      	ldr	r3, [r7, #8]
 801d70e:	691b      	ldr	r3, [r3, #16]
 801d710:	899b      	ldrh	r3, [r3, #12]
 801d712:	b29b      	uxth	r3, r3
 801d714:	4618      	mov	r0, r3
 801d716:	f7fa ff9f 	bl	8018658 <lwip_htons>
 801d71a:	4603      	mov	r3, r0
 801d71c:	b2db      	uxtb	r3, r3
 801d71e:	f003 0303 	and.w	r3, r3, #3
 801d722:	2b00      	cmp	r3, #0
 801d724:	d001      	beq.n	801d72a <tcp_free_acked_segments+0xc6>
 801d726:	2301      	movs	r3, #1
 801d728:	e000      	b.n	801d72c <tcp_free_acked_segments+0xc8>
 801d72a:	2300      	movs	r3, #0
 801d72c:	442b      	add	r3, r5
 801d72e:	18e2      	adds	r2, r4, r3
 801d730:	4b09      	ldr	r3, [pc, #36]	@ (801d758 <tcp_free_acked_segments+0xf4>)
 801d732:	681b      	ldr	r3, [r3, #0]
 801d734:	1ad3      	subs	r3, r2, r3
  while (seg_list != NULL &&
 801d736:	2b00      	cmp	r3, #0
 801d738:	dd9c      	ble.n	801d674 <tcp_free_acked_segments+0x10>
                  seg_list != NULL || dbg_other_seg_list != NULL);
    }
  }
  return seg_list;
 801d73a:	68bb      	ldr	r3, [r7, #8]
}
 801d73c:	4618      	mov	r0, r3
 801d73e:	3718      	adds	r7, #24
 801d740:	46bd      	mov	sp, r7
 801d742:	bdb0      	pop	{r4, r5, r7, pc}
 801d744:	0802e8a4 	.word	0x0802e8a4
 801d748:	0802eb8c 	.word	0x0802eb8c
 801d74c:	0802e8f0 	.word	0x0802e8f0
 801d750:	2402a030 	.word	0x2402a030
 801d754:	0802ebb4 	.word	0x0802ebb4
 801d758:	2402a02c 	.word	0x2402a02c

0801d75c <tcp_receive>:
 *
 * Called from tcp_process().
 */
static void
tcp_receive(struct tcp_pcb *pcb)
{
 801d75c:	b5b0      	push	{r4, r5, r7, lr}
 801d75e:	b094      	sub	sp, #80	@ 0x50
 801d760:	af00      	add	r7, sp, #0
 801d762:	6078      	str	r0, [r7, #4]
  s16_t m;
  u32_t right_wnd_edge;
  int found_dupack = 0;
 801d764:	2300      	movs	r3, #0
 801d766:	64bb      	str	r3, [r7, #72]	@ 0x48

  LWIP_ASSERT("tcp_receive: invalid pcb", pcb != NULL);
 801d768:	687b      	ldr	r3, [r7, #4]
 801d76a:	2b00      	cmp	r3, #0
 801d76c:	d106      	bne.n	801d77c <tcp_receive+0x20>
 801d76e:	4b91      	ldr	r3, [pc, #580]	@ (801d9b4 <tcp_receive+0x258>)
 801d770:	f240 427b 	movw	r2, #1147	@ 0x47b
 801d774:	4990      	ldr	r1, [pc, #576]	@ (801d9b8 <tcp_receive+0x25c>)
 801d776:	4891      	ldr	r0, [pc, #580]	@ (801d9bc <tcp_receive+0x260>)
 801d778:	f00b fec8 	bl	802950c <iprintf>
  LWIP_ASSERT("tcp_receive: wrong state", pcb->state >= ESTABLISHED);
 801d77c:	687b      	ldr	r3, [r7, #4]
 801d77e:	7d1b      	ldrb	r3, [r3, #20]
 801d780:	2b03      	cmp	r3, #3
 801d782:	d806      	bhi.n	801d792 <tcp_receive+0x36>
 801d784:	4b8b      	ldr	r3, [pc, #556]	@ (801d9b4 <tcp_receive+0x258>)
 801d786:	f240 427c 	movw	r2, #1148	@ 0x47c
 801d78a:	498d      	ldr	r1, [pc, #564]	@ (801d9c0 <tcp_receive+0x264>)
 801d78c:	488b      	ldr	r0, [pc, #556]	@ (801d9bc <tcp_receive+0x260>)
 801d78e:	f00b febd 	bl	802950c <iprintf>

  if (flags & TCP_ACK) {
 801d792:	4b8c      	ldr	r3, [pc, #560]	@ (801d9c4 <tcp_receive+0x268>)
 801d794:	781b      	ldrb	r3, [r3, #0]
 801d796:	f003 0310 	and.w	r3, r3, #16
 801d79a:	2b00      	cmp	r3, #0
 801d79c:	f000 8264 	beq.w	801dc68 <tcp_receive+0x50c>
    right_wnd_edge = pcb->snd_wnd + pcb->snd_wl2;
 801d7a0:	687b      	ldr	r3, [r7, #4]
 801d7a2:	f8b3 3060 	ldrh.w	r3, [r3, #96]	@ 0x60
 801d7a6:	461a      	mov	r2, r3
 801d7a8:	687b      	ldr	r3, [r7, #4]
 801d7aa:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 801d7ac:	4413      	add	r3, r2
 801d7ae:	633b      	str	r3, [r7, #48]	@ 0x30

    /* Update window. */
    if (TCP_SEQ_LT(pcb->snd_wl1, seqno) ||
 801d7b0:	687b      	ldr	r3, [r7, #4]
 801d7b2:	6d5a      	ldr	r2, [r3, #84]	@ 0x54
 801d7b4:	4b84      	ldr	r3, [pc, #528]	@ (801d9c8 <tcp_receive+0x26c>)
 801d7b6:	681b      	ldr	r3, [r3, #0]
 801d7b8:	1ad3      	subs	r3, r2, r3
 801d7ba:	2b00      	cmp	r3, #0
 801d7bc:	db1b      	blt.n	801d7f6 <tcp_receive+0x9a>
        (pcb->snd_wl1 == seqno && TCP_SEQ_LT(pcb->snd_wl2, ackno)) ||
 801d7be:	687b      	ldr	r3, [r7, #4]
 801d7c0:	6d5a      	ldr	r2, [r3, #84]	@ 0x54
 801d7c2:	4b81      	ldr	r3, [pc, #516]	@ (801d9c8 <tcp_receive+0x26c>)
 801d7c4:	681b      	ldr	r3, [r3, #0]
    if (TCP_SEQ_LT(pcb->snd_wl1, seqno) ||
 801d7c6:	429a      	cmp	r2, r3
 801d7c8:	d106      	bne.n	801d7d8 <tcp_receive+0x7c>
        (pcb->snd_wl1 == seqno && TCP_SEQ_LT(pcb->snd_wl2, ackno)) ||
 801d7ca:	687b      	ldr	r3, [r7, #4]
 801d7cc:	6d9a      	ldr	r2, [r3, #88]	@ 0x58
 801d7ce:	4b7f      	ldr	r3, [pc, #508]	@ (801d9cc <tcp_receive+0x270>)
 801d7d0:	681b      	ldr	r3, [r3, #0]
 801d7d2:	1ad3      	subs	r3, r2, r3
 801d7d4:	2b00      	cmp	r3, #0
 801d7d6:	db0e      	blt.n	801d7f6 <tcp_receive+0x9a>
        (pcb->snd_wl2 == ackno && (u32_t)SND_WND_SCALE(pcb, tcphdr->wnd) > pcb->snd_wnd)) {
 801d7d8:	687b      	ldr	r3, [r7, #4]
 801d7da:	6d9a      	ldr	r2, [r3, #88]	@ 0x58
 801d7dc:	4b7b      	ldr	r3, [pc, #492]	@ (801d9cc <tcp_receive+0x270>)
 801d7de:	681b      	ldr	r3, [r3, #0]
        (pcb->snd_wl1 == seqno && TCP_SEQ_LT(pcb->snd_wl2, ackno)) ||
 801d7e0:	429a      	cmp	r2, r3
 801d7e2:	d125      	bne.n	801d830 <tcp_receive+0xd4>
        (pcb->snd_wl2 == ackno && (u32_t)SND_WND_SCALE(pcb, tcphdr->wnd) > pcb->snd_wnd)) {
 801d7e4:	4b7a      	ldr	r3, [pc, #488]	@ (801d9d0 <tcp_receive+0x274>)
 801d7e6:	681b      	ldr	r3, [r3, #0]
 801d7e8:	89db      	ldrh	r3, [r3, #14]
 801d7ea:	b29a      	uxth	r2, r3
 801d7ec:	687b      	ldr	r3, [r7, #4]
 801d7ee:	f8b3 3060 	ldrh.w	r3, [r3, #96]	@ 0x60
 801d7f2:	429a      	cmp	r2, r3
 801d7f4:	d91c      	bls.n	801d830 <tcp_receive+0xd4>
      pcb->snd_wnd = SND_WND_SCALE(pcb, tcphdr->wnd);
 801d7f6:	4b76      	ldr	r3, [pc, #472]	@ (801d9d0 <tcp_receive+0x274>)
 801d7f8:	681b      	ldr	r3, [r3, #0]
 801d7fa:	89db      	ldrh	r3, [r3, #14]
 801d7fc:	b29a      	uxth	r2, r3
 801d7fe:	687b      	ldr	r3, [r7, #4]
 801d800:	f8a3 2060 	strh.w	r2, [r3, #96]	@ 0x60
      /* keep track of the biggest window announced by the remote host to calculate
         the maximum segment size */
      if (pcb->snd_wnd_max < pcb->snd_wnd) {
 801d804:	687b      	ldr	r3, [r7, #4]
 801d806:	f8b3 2062 	ldrh.w	r2, [r3, #98]	@ 0x62
 801d80a:	687b      	ldr	r3, [r7, #4]
 801d80c:	f8b3 3060 	ldrh.w	r3, [r3, #96]	@ 0x60
 801d810:	429a      	cmp	r2, r3
 801d812:	d205      	bcs.n	801d820 <tcp_receive+0xc4>
        pcb->snd_wnd_max = pcb->snd_wnd;
 801d814:	687b      	ldr	r3, [r7, #4]
 801d816:	f8b3 2060 	ldrh.w	r2, [r3, #96]	@ 0x60
 801d81a:	687b      	ldr	r3, [r7, #4]
 801d81c:	f8a3 2062 	strh.w	r2, [r3, #98]	@ 0x62
      }
      pcb->snd_wl1 = seqno;
 801d820:	4b69      	ldr	r3, [pc, #420]	@ (801d9c8 <tcp_receive+0x26c>)
 801d822:	681a      	ldr	r2, [r3, #0]
 801d824:	687b      	ldr	r3, [r7, #4]
 801d826:	655a      	str	r2, [r3, #84]	@ 0x54
      pcb->snd_wl2 = ackno;
 801d828:	4b68      	ldr	r3, [pc, #416]	@ (801d9cc <tcp_receive+0x270>)
 801d82a:	681a      	ldr	r2, [r3, #0]
 801d82c:	687b      	ldr	r3, [r7, #4]
 801d82e:	659a      	str	r2, [r3, #88]	@ 0x58
     * If it only passes 1, should reset dupack counter
     *
     */

    /* Clause 1 */
    if (TCP_SEQ_LEQ(ackno, pcb->lastack)) {
 801d830:	4b66      	ldr	r3, [pc, #408]	@ (801d9cc <tcp_receive+0x270>)
 801d832:	681a      	ldr	r2, [r3, #0]
 801d834:	687b      	ldr	r3, [r7, #4]
 801d836:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 801d838:	1ad3      	subs	r3, r2, r3
 801d83a:	2b00      	cmp	r3, #0
 801d83c:	dc58      	bgt.n	801d8f0 <tcp_receive+0x194>
      /* Clause 2 */
      if (tcplen == 0) {
 801d83e:	4b65      	ldr	r3, [pc, #404]	@ (801d9d4 <tcp_receive+0x278>)
 801d840:	881b      	ldrh	r3, [r3, #0]
 801d842:	2b00      	cmp	r3, #0
 801d844:	d14b      	bne.n	801d8de <tcp_receive+0x182>
        /* Clause 3 */
        if (pcb->snd_wl2 + pcb->snd_wnd == right_wnd_edge) {
 801d846:	687b      	ldr	r3, [r7, #4]
 801d848:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 801d84a:	687a      	ldr	r2, [r7, #4]
 801d84c:	f8b2 2060 	ldrh.w	r2, [r2, #96]	@ 0x60
 801d850:	4413      	add	r3, r2
 801d852:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 801d854:	429a      	cmp	r2, r3
 801d856:	d142      	bne.n	801d8de <tcp_receive+0x182>
          /* Clause 4 */
          if (pcb->rtime >= 0) {
 801d858:	687b      	ldr	r3, [r7, #4]
 801d85a:	f9b3 3030 	ldrsh.w	r3, [r3, #48]	@ 0x30
 801d85e:	2b00      	cmp	r3, #0
 801d860:	db3d      	blt.n	801d8de <tcp_receive+0x182>
            /* Clause 5 */
            if (pcb->lastack == ackno) {
 801d862:	687b      	ldr	r3, [r7, #4]
 801d864:	6c5a      	ldr	r2, [r3, #68]	@ 0x44
 801d866:	4b59      	ldr	r3, [pc, #356]	@ (801d9cc <tcp_receive+0x270>)
 801d868:	681b      	ldr	r3, [r3, #0]
 801d86a:	429a      	cmp	r2, r3
 801d86c:	d137      	bne.n	801d8de <tcp_receive+0x182>
              found_dupack = 1;
 801d86e:	2301      	movs	r3, #1
 801d870:	64bb      	str	r3, [r7, #72]	@ 0x48
              if ((u8_t)(pcb->dupacks + 1) > pcb->dupacks) {
 801d872:	687b      	ldr	r3, [r7, #4]
 801d874:	f893 3043 	ldrb.w	r3, [r3, #67]	@ 0x43
 801d878:	2bff      	cmp	r3, #255	@ 0xff
 801d87a:	d007      	beq.n	801d88c <tcp_receive+0x130>
                ++pcb->dupacks;
 801d87c:	687b      	ldr	r3, [r7, #4]
 801d87e:	f893 3043 	ldrb.w	r3, [r3, #67]	@ 0x43
 801d882:	3301      	adds	r3, #1
 801d884:	b2da      	uxtb	r2, r3
 801d886:	687b      	ldr	r3, [r7, #4]
 801d888:	f883 2043 	strb.w	r2, [r3, #67]	@ 0x43
              }
              if (pcb->dupacks > 3) {
 801d88c:	687b      	ldr	r3, [r7, #4]
 801d88e:	f893 3043 	ldrb.w	r3, [r3, #67]	@ 0x43
 801d892:	2b03      	cmp	r3, #3
 801d894:	d91b      	bls.n	801d8ce <tcp_receive+0x172>
                /* Inflate the congestion window */
                TCP_WND_INC(pcb->cwnd, pcb->mss);
 801d896:	687b      	ldr	r3, [r7, #4]
 801d898:	f8b3 2048 	ldrh.w	r2, [r3, #72]	@ 0x48
 801d89c:	687b      	ldr	r3, [r7, #4]
 801d89e:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801d8a0:	4413      	add	r3, r2
 801d8a2:	b29a      	uxth	r2, r3
 801d8a4:	687b      	ldr	r3, [r7, #4]
 801d8a6:	f8b3 3048 	ldrh.w	r3, [r3, #72]	@ 0x48
 801d8aa:	429a      	cmp	r2, r3
 801d8ac:	d30a      	bcc.n	801d8c4 <tcp_receive+0x168>
 801d8ae:	687b      	ldr	r3, [r7, #4]
 801d8b0:	f8b3 2048 	ldrh.w	r2, [r3, #72]	@ 0x48
 801d8b4:	687b      	ldr	r3, [r7, #4]
 801d8b6:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801d8b8:	4413      	add	r3, r2
 801d8ba:	b29a      	uxth	r2, r3
 801d8bc:	687b      	ldr	r3, [r7, #4]
 801d8be:	f8a3 2048 	strh.w	r2, [r3, #72]	@ 0x48
 801d8c2:	e004      	b.n	801d8ce <tcp_receive+0x172>
 801d8c4:	687b      	ldr	r3, [r7, #4]
 801d8c6:	f64f 72ff 	movw	r2, #65535	@ 0xffff
 801d8ca:	f8a3 2048 	strh.w	r2, [r3, #72]	@ 0x48
              }
              if (pcb->dupacks >= 3) {
 801d8ce:	687b      	ldr	r3, [r7, #4]
 801d8d0:	f893 3043 	ldrb.w	r3, [r3, #67]	@ 0x43
 801d8d4:	2b02      	cmp	r3, #2
 801d8d6:	d902      	bls.n	801d8de <tcp_receive+0x182>
                /* Do fast retransmit (checked via TF_INFR, not via dupacks count) */
                tcp_rexmit_fast(pcb);
 801d8d8:	6878      	ldr	r0, [r7, #4]
 801d8da:	f002 fbb3 	bl	8020044 <tcp_rexmit_fast>
          }
        }
      }
      /* If Clause (1) or more is true, but not a duplicate ack, reset
       * count of consecutive duplicate acks */
      if (!found_dupack) {
 801d8de:	6cbb      	ldr	r3, [r7, #72]	@ 0x48
 801d8e0:	2b00      	cmp	r3, #0
 801d8e2:	f040 8161 	bne.w	801dba8 <tcp_receive+0x44c>
        pcb->dupacks = 0;
 801d8e6:	687b      	ldr	r3, [r7, #4]
 801d8e8:	2200      	movs	r2, #0
 801d8ea:	f883 2043 	strb.w	r2, [r3, #67]	@ 0x43
 801d8ee:	e15b      	b.n	801dba8 <tcp_receive+0x44c>
      }
    } else if (TCP_SEQ_BETWEEN(ackno, pcb->lastack + 1, pcb->snd_nxt)) {
 801d8f0:	4b36      	ldr	r3, [pc, #216]	@ (801d9cc <tcp_receive+0x270>)
 801d8f2:	681a      	ldr	r2, [r3, #0]
 801d8f4:	687b      	ldr	r3, [r7, #4]
 801d8f6:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 801d8f8:	1ad3      	subs	r3, r2, r3
 801d8fa:	3b01      	subs	r3, #1
 801d8fc:	2b00      	cmp	r3, #0
 801d8fe:	f2c0 814e 	blt.w	801db9e <tcp_receive+0x442>
 801d902:	4b32      	ldr	r3, [pc, #200]	@ (801d9cc <tcp_receive+0x270>)
 801d904:	681a      	ldr	r2, [r3, #0]
 801d906:	687b      	ldr	r3, [r7, #4]
 801d908:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 801d90a:	1ad3      	subs	r3, r2, r3
 801d90c:	2b00      	cmp	r3, #0
 801d90e:	f300 8146 	bgt.w	801db9e <tcp_receive+0x442>
      tcpwnd_size_t acked;

      /* Reset the "IN Fast Retransmit" flag, since we are no longer
         in fast retransmit. Also reset the congestion window to the
         slow start threshold. */
      if (pcb->flags & TF_INFR) {
 801d912:	687b      	ldr	r3, [r7, #4]
 801d914:	8b5b      	ldrh	r3, [r3, #26]
 801d916:	f003 0304 	and.w	r3, r3, #4
 801d91a:	2b00      	cmp	r3, #0
 801d91c:	d010      	beq.n	801d940 <tcp_receive+0x1e4>
        tcp_clear_flags(pcb, TF_INFR);
 801d91e:	687b      	ldr	r3, [r7, #4]
 801d920:	8b5b      	ldrh	r3, [r3, #26]
 801d922:	f023 0304 	bic.w	r3, r3, #4
 801d926:	b29a      	uxth	r2, r3
 801d928:	687b      	ldr	r3, [r7, #4]
 801d92a:	835a      	strh	r2, [r3, #26]
        pcb->cwnd = pcb->ssthresh;
 801d92c:	687b      	ldr	r3, [r7, #4]
 801d92e:	f8b3 204a 	ldrh.w	r2, [r3, #74]	@ 0x4a
 801d932:	687b      	ldr	r3, [r7, #4]
 801d934:	f8a3 2048 	strh.w	r2, [r3, #72]	@ 0x48
        pcb->bytes_acked = 0;
 801d938:	687b      	ldr	r3, [r7, #4]
 801d93a:	2200      	movs	r2, #0
 801d93c:	f8a3 206a 	strh.w	r2, [r3, #106]	@ 0x6a
      }

      /* Reset the number of retransmissions. */
      pcb->nrtx = 0;
 801d940:	687b      	ldr	r3, [r7, #4]
 801d942:	2200      	movs	r2, #0
 801d944:	f883 2042 	strb.w	r2, [r3, #66]	@ 0x42

      /* Reset the retransmission time-out. */
      pcb->rto = (s16_t)((pcb->sa >> 3) + pcb->sv);
 801d948:	687b      	ldr	r3, [r7, #4]
 801d94a:	f9b3 303c 	ldrsh.w	r3, [r3, #60]	@ 0x3c
 801d94e:	10db      	asrs	r3, r3, #3
 801d950:	b21b      	sxth	r3, r3
 801d952:	b29a      	uxth	r2, r3
 801d954:	687b      	ldr	r3, [r7, #4]
 801d956:	f9b3 303e 	ldrsh.w	r3, [r3, #62]	@ 0x3e
 801d95a:	b29b      	uxth	r3, r3
 801d95c:	4413      	add	r3, r2
 801d95e:	b29b      	uxth	r3, r3
 801d960:	b21a      	sxth	r2, r3
 801d962:	687b      	ldr	r3, [r7, #4]
 801d964:	f8a3 2040 	strh.w	r2, [r3, #64]	@ 0x40

      /* Record how much data this ACK acks */
      acked = (tcpwnd_size_t)(ackno - pcb->lastack);
 801d968:	4b18      	ldr	r3, [pc, #96]	@ (801d9cc <tcp_receive+0x270>)
 801d96a:	681b      	ldr	r3, [r3, #0]
 801d96c:	b29a      	uxth	r2, r3
 801d96e:	687b      	ldr	r3, [r7, #4]
 801d970:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 801d972:	b29b      	uxth	r3, r3
 801d974:	1ad3      	subs	r3, r2, r3
 801d976:	85fb      	strh	r3, [r7, #46]	@ 0x2e

      /* Reset the fast retransmit variables. */
      pcb->dupacks = 0;
 801d978:	687b      	ldr	r3, [r7, #4]
 801d97a:	2200      	movs	r2, #0
 801d97c:	f883 2043 	strb.w	r2, [r3, #67]	@ 0x43
      pcb->lastack = ackno;
 801d980:	4b12      	ldr	r3, [pc, #72]	@ (801d9cc <tcp_receive+0x270>)
 801d982:	681a      	ldr	r2, [r3, #0]
 801d984:	687b      	ldr	r3, [r7, #4]
 801d986:	645a      	str	r2, [r3, #68]	@ 0x44

      /* Update the congestion control variables (cwnd and
         ssthresh). */
      if (pcb->state >= ESTABLISHED) {
 801d988:	687b      	ldr	r3, [r7, #4]
 801d98a:	7d1b      	ldrb	r3, [r3, #20]
 801d98c:	2b03      	cmp	r3, #3
 801d98e:	f240 8097 	bls.w	801dac0 <tcp_receive+0x364>
        if (pcb->cwnd < pcb->ssthresh) {
 801d992:	687b      	ldr	r3, [r7, #4]
 801d994:	f8b3 2048 	ldrh.w	r2, [r3, #72]	@ 0x48
 801d998:	687b      	ldr	r3, [r7, #4]
 801d99a:	f8b3 304a 	ldrh.w	r3, [r3, #74]	@ 0x4a
 801d99e:	429a      	cmp	r2, r3
 801d9a0:	d245      	bcs.n	801da2e <tcp_receive+0x2d2>
          tcpwnd_size_t increase;
          /* limit to 1 SMSS segment during period following RTO */
          u8_t num_seg = (pcb->flags & TF_RTO) ? 1 : 2;
 801d9a2:	687b      	ldr	r3, [r7, #4]
 801d9a4:	8b5b      	ldrh	r3, [r3, #26]
 801d9a6:	f403 6300 	and.w	r3, r3, #2048	@ 0x800
 801d9aa:	2b00      	cmp	r3, #0
 801d9ac:	d014      	beq.n	801d9d8 <tcp_receive+0x27c>
 801d9ae:	2301      	movs	r3, #1
 801d9b0:	e013      	b.n	801d9da <tcp_receive+0x27e>
 801d9b2:	bf00      	nop
 801d9b4:	0802e8a4 	.word	0x0802e8a4
 801d9b8:	0802ebd4 	.word	0x0802ebd4
 801d9bc:	0802e8f0 	.word	0x0802e8f0
 801d9c0:	0802ebf0 	.word	0x0802ebf0
 801d9c4:	2402a034 	.word	0x2402a034
 801d9c8:	2402a028 	.word	0x2402a028
 801d9cc:	2402a02c 	.word	0x2402a02c
 801d9d0:	2402a018 	.word	0x2402a018
 801d9d4:	2402a032 	.word	0x2402a032
 801d9d8:	2302      	movs	r3, #2
 801d9da:	f887 302d 	strb.w	r3, [r7, #45]	@ 0x2d
          /* RFC 3465, section 2.2 Slow Start */
          increase = LWIP_MIN(acked, (tcpwnd_size_t)(num_seg * pcb->mss));
 801d9de:	f897 302d 	ldrb.w	r3, [r7, #45]	@ 0x2d
 801d9e2:	b29a      	uxth	r2, r3
 801d9e4:	687b      	ldr	r3, [r7, #4]
 801d9e6:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801d9e8:	fb12 f303 	smulbb	r3, r2, r3
 801d9ec:	b29b      	uxth	r3, r3
 801d9ee:	8dfa      	ldrh	r2, [r7, #46]	@ 0x2e
 801d9f0:	4293      	cmp	r3, r2
 801d9f2:	bf28      	it	cs
 801d9f4:	4613      	movcs	r3, r2
 801d9f6:	857b      	strh	r3, [r7, #42]	@ 0x2a
          TCP_WND_INC(pcb->cwnd, increase);
 801d9f8:	687b      	ldr	r3, [r7, #4]
 801d9fa:	f8b3 2048 	ldrh.w	r2, [r3, #72]	@ 0x48
 801d9fe:	8d7b      	ldrh	r3, [r7, #42]	@ 0x2a
 801da00:	4413      	add	r3, r2
 801da02:	b29a      	uxth	r2, r3
 801da04:	687b      	ldr	r3, [r7, #4]
 801da06:	f8b3 3048 	ldrh.w	r3, [r3, #72]	@ 0x48
 801da0a:	429a      	cmp	r2, r3
 801da0c:	d309      	bcc.n	801da22 <tcp_receive+0x2c6>
 801da0e:	687b      	ldr	r3, [r7, #4]
 801da10:	f8b3 2048 	ldrh.w	r2, [r3, #72]	@ 0x48
 801da14:	8d7b      	ldrh	r3, [r7, #42]	@ 0x2a
 801da16:	4413      	add	r3, r2
 801da18:	b29a      	uxth	r2, r3
 801da1a:	687b      	ldr	r3, [r7, #4]
 801da1c:	f8a3 2048 	strh.w	r2, [r3, #72]	@ 0x48
 801da20:	e04e      	b.n	801dac0 <tcp_receive+0x364>
 801da22:	687b      	ldr	r3, [r7, #4]
 801da24:	f64f 72ff 	movw	r2, #65535	@ 0xffff
 801da28:	f8a3 2048 	strh.w	r2, [r3, #72]	@ 0x48
 801da2c:	e048      	b.n	801dac0 <tcp_receive+0x364>
          LWIP_DEBUGF(TCP_CWND_DEBUG, ("tcp_receive: slow start cwnd %"TCPWNDSIZE_F"\n", pcb->cwnd));
        } else {
          /* RFC 3465, section 2.1 Congestion Avoidance */
          TCP_WND_INC(pcb->bytes_acked, acked);
 801da2e:	687b      	ldr	r3, [r7, #4]
 801da30:	f8b3 206a 	ldrh.w	r2, [r3, #106]	@ 0x6a
 801da34:	8dfb      	ldrh	r3, [r7, #46]	@ 0x2e
 801da36:	4413      	add	r3, r2
 801da38:	b29a      	uxth	r2, r3
 801da3a:	687b      	ldr	r3, [r7, #4]
 801da3c:	f8b3 306a 	ldrh.w	r3, [r3, #106]	@ 0x6a
 801da40:	429a      	cmp	r2, r3
 801da42:	d309      	bcc.n	801da58 <tcp_receive+0x2fc>
 801da44:	687b      	ldr	r3, [r7, #4]
 801da46:	f8b3 206a 	ldrh.w	r2, [r3, #106]	@ 0x6a
 801da4a:	8dfb      	ldrh	r3, [r7, #46]	@ 0x2e
 801da4c:	4413      	add	r3, r2
 801da4e:	b29a      	uxth	r2, r3
 801da50:	687b      	ldr	r3, [r7, #4]
 801da52:	f8a3 206a 	strh.w	r2, [r3, #106]	@ 0x6a
 801da56:	e004      	b.n	801da62 <tcp_receive+0x306>
 801da58:	687b      	ldr	r3, [r7, #4]
 801da5a:	f64f 72ff 	movw	r2, #65535	@ 0xffff
 801da5e:	f8a3 206a 	strh.w	r2, [r3, #106]	@ 0x6a
          if (pcb->bytes_acked >= pcb->cwnd) {
 801da62:	687b      	ldr	r3, [r7, #4]
 801da64:	f8b3 206a 	ldrh.w	r2, [r3, #106]	@ 0x6a
 801da68:	687b      	ldr	r3, [r7, #4]
 801da6a:	f8b3 3048 	ldrh.w	r3, [r3, #72]	@ 0x48
 801da6e:	429a      	cmp	r2, r3
 801da70:	d326      	bcc.n	801dac0 <tcp_receive+0x364>
            pcb->bytes_acked = (tcpwnd_size_t)(pcb->bytes_acked - pcb->cwnd);
 801da72:	687b      	ldr	r3, [r7, #4]
 801da74:	f8b3 206a 	ldrh.w	r2, [r3, #106]	@ 0x6a
 801da78:	687b      	ldr	r3, [r7, #4]
 801da7a:	f8b3 3048 	ldrh.w	r3, [r3, #72]	@ 0x48
 801da7e:	1ad3      	subs	r3, r2, r3
 801da80:	b29a      	uxth	r2, r3
 801da82:	687b      	ldr	r3, [r7, #4]
 801da84:	f8a3 206a 	strh.w	r2, [r3, #106]	@ 0x6a
            TCP_WND_INC(pcb->cwnd, pcb->mss);
 801da88:	687b      	ldr	r3, [r7, #4]
 801da8a:	f8b3 2048 	ldrh.w	r2, [r3, #72]	@ 0x48
 801da8e:	687b      	ldr	r3, [r7, #4]
 801da90:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801da92:	4413      	add	r3, r2
 801da94:	b29a      	uxth	r2, r3
 801da96:	687b      	ldr	r3, [r7, #4]
 801da98:	f8b3 3048 	ldrh.w	r3, [r3, #72]	@ 0x48
 801da9c:	429a      	cmp	r2, r3
 801da9e:	d30a      	bcc.n	801dab6 <tcp_receive+0x35a>
 801daa0:	687b      	ldr	r3, [r7, #4]
 801daa2:	f8b3 2048 	ldrh.w	r2, [r3, #72]	@ 0x48
 801daa6:	687b      	ldr	r3, [r7, #4]
 801daa8:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801daaa:	4413      	add	r3, r2
 801daac:	b29a      	uxth	r2, r3
 801daae:	687b      	ldr	r3, [r7, #4]
 801dab0:	f8a3 2048 	strh.w	r2, [r3, #72]	@ 0x48
 801dab4:	e004      	b.n	801dac0 <tcp_receive+0x364>
 801dab6:	687b      	ldr	r3, [r7, #4]
 801dab8:	f64f 72ff 	movw	r2, #65535	@ 0xffff
 801dabc:	f8a3 2048 	strh.w	r2, [r3, #72]	@ 0x48
                                    pcb->unacked != NULL ?
                                    lwip_ntohl(pcb->unacked->tcphdr->seqno) + TCP_TCPLEN(pcb->unacked) : 0));

      /* Remove segment from the unacknowledged list if the incoming
         ACK acknowledges them. */
      pcb->unacked = tcp_free_acked_segments(pcb, pcb->unacked, "unacked", pcb->unsent);
 801dac0:	687b      	ldr	r3, [r7, #4]
 801dac2:	6f19      	ldr	r1, [r3, #112]	@ 0x70
 801dac4:	687b      	ldr	r3, [r7, #4]
 801dac6:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801dac8:	4a98      	ldr	r2, [pc, #608]	@ (801dd2c <tcp_receive+0x5d0>)
 801daca:	6878      	ldr	r0, [r7, #4]
 801dacc:	f7ff fdca 	bl	801d664 <tcp_free_acked_segments>
 801dad0:	4602      	mov	r2, r0
 801dad2:	687b      	ldr	r3, [r7, #4]
 801dad4:	671a      	str	r2, [r3, #112]	@ 0x70
         on the list are acknowledged by the ACK. This may seem
         strange since an "unsent" segment shouldn't be acked. The
         rationale is that lwIP puts all outstanding segments on the
         ->unsent list after a retransmission, so these segments may
         in fact have been sent once. */
      pcb->unsent = tcp_free_acked_segments(pcb, pcb->unsent, "unsent", pcb->unacked);
 801dad6:	687b      	ldr	r3, [r7, #4]
 801dad8:	6ed9      	ldr	r1, [r3, #108]	@ 0x6c
 801dada:	687b      	ldr	r3, [r7, #4]
 801dadc:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801dade:	4a94      	ldr	r2, [pc, #592]	@ (801dd30 <tcp_receive+0x5d4>)
 801dae0:	6878      	ldr	r0, [r7, #4]
 801dae2:	f7ff fdbf 	bl	801d664 <tcp_free_acked_segments>
 801dae6:	4602      	mov	r2, r0
 801dae8:	687b      	ldr	r3, [r7, #4]
 801daea:	66da      	str	r2, [r3, #108]	@ 0x6c

      /* If there's nothing left to acknowledge, stop the retransmit
         timer, otherwise reset it to start again */
      if (pcb->unacked == NULL) {
 801daec:	687b      	ldr	r3, [r7, #4]
 801daee:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801daf0:	2b00      	cmp	r3, #0
 801daf2:	d104      	bne.n	801dafe <tcp_receive+0x3a2>
        pcb->rtime = -1;
 801daf4:	687b      	ldr	r3, [r7, #4]
 801daf6:	f64f 72ff 	movw	r2, #65535	@ 0xffff
 801dafa:	861a      	strh	r2, [r3, #48]	@ 0x30
 801dafc:	e002      	b.n	801db04 <tcp_receive+0x3a8>
      } else {
        pcb->rtime = 0;
 801dafe:	687b      	ldr	r3, [r7, #4]
 801db00:	2200      	movs	r2, #0
 801db02:	861a      	strh	r2, [r3, #48]	@ 0x30
      }

      pcb->polltmr = 0;
 801db04:	687b      	ldr	r3, [r7, #4]
 801db06:	2200      	movs	r2, #0
 801db08:	771a      	strb	r2, [r3, #28]

#if TCP_OVERSIZE
      if (pcb->unsent == NULL) {
 801db0a:	687b      	ldr	r3, [r7, #4]
 801db0c:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801db0e:	2b00      	cmp	r3, #0
 801db10:	d103      	bne.n	801db1a <tcp_receive+0x3be>
        pcb->unsent_oversize = 0;
 801db12:	687b      	ldr	r3, [r7, #4]
 801db14:	2200      	movs	r2, #0
 801db16:	f8a3 2068 	strh.w	r2, [r3, #104]	@ 0x68
        /* Inform neighbor reachability of forward progress. */
        nd6_reachability_hint(ip6_current_src_addr());
      }
#endif /* LWIP_IPV6 && LWIP_ND6_TCP_REACHABILITY_HINTS*/

      pcb->snd_buf = (tcpwnd_size_t)(pcb->snd_buf + recv_acked);
 801db1a:	687b      	ldr	r3, [r7, #4]
 801db1c:	f8b3 2064 	ldrh.w	r2, [r3, #100]	@ 0x64
 801db20:	4b84      	ldr	r3, [pc, #528]	@ (801dd34 <tcp_receive+0x5d8>)
 801db22:	881b      	ldrh	r3, [r3, #0]
 801db24:	4413      	add	r3, r2
 801db26:	b29a      	uxth	r2, r3
 801db28:	687b      	ldr	r3, [r7, #4]
 801db2a:	f8a3 2064 	strh.w	r2, [r3, #100]	@ 0x64
      /* check if this ACK ends our retransmission of in-flight data */
      if (pcb->flags & TF_RTO) {
 801db2e:	687b      	ldr	r3, [r7, #4]
 801db30:	8b5b      	ldrh	r3, [r3, #26]
 801db32:	f403 6300 	and.w	r3, r3, #2048	@ 0x800
 801db36:	2b00      	cmp	r3, #0
 801db38:	d035      	beq.n	801dba6 <tcp_receive+0x44a>
        /* RTO is done if
            1) both queues are empty or
            2) unacked is empty and unsent head contains data not part of RTO or
            3) unacked head contains data not part of RTO */
        if (pcb->unacked == NULL) {
 801db3a:	687b      	ldr	r3, [r7, #4]
 801db3c:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801db3e:	2b00      	cmp	r3, #0
 801db40:	d118      	bne.n	801db74 <tcp_receive+0x418>
          if ((pcb->unsent == NULL) ||
 801db42:	687b      	ldr	r3, [r7, #4]
 801db44:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801db46:	2b00      	cmp	r3, #0
 801db48:	d00c      	beq.n	801db64 <tcp_receive+0x408>
              (TCP_SEQ_LEQ(pcb->rto_end, lwip_ntohl(pcb->unsent->tcphdr->seqno)))) {
 801db4a:	687b      	ldr	r3, [r7, #4]
 801db4c:	6cdc      	ldr	r4, [r3, #76]	@ 0x4c
 801db4e:	687b      	ldr	r3, [r7, #4]
 801db50:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801db52:	691b      	ldr	r3, [r3, #16]
 801db54:	685b      	ldr	r3, [r3, #4]
 801db56:	4618      	mov	r0, r3
 801db58:	f7fa fd93 	bl	8018682 <lwip_htonl>
 801db5c:	4603      	mov	r3, r0
 801db5e:	1ae3      	subs	r3, r4, r3
          if ((pcb->unsent == NULL) ||
 801db60:	2b00      	cmp	r3, #0
 801db62:	dc20      	bgt.n	801dba6 <tcp_receive+0x44a>
            tcp_clear_flags(pcb, TF_RTO);
 801db64:	687b      	ldr	r3, [r7, #4]
 801db66:	8b5b      	ldrh	r3, [r3, #26]
 801db68:	f423 6300 	bic.w	r3, r3, #2048	@ 0x800
 801db6c:	b29a      	uxth	r2, r3
 801db6e:	687b      	ldr	r3, [r7, #4]
 801db70:	835a      	strh	r2, [r3, #26]
    } else if (TCP_SEQ_BETWEEN(ackno, pcb->lastack + 1, pcb->snd_nxt)) {
 801db72:	e018      	b.n	801dba6 <tcp_receive+0x44a>
          }
        } else if (TCP_SEQ_LEQ(pcb->rto_end, lwip_ntohl(pcb->unacked->tcphdr->seqno))) {
 801db74:	687b      	ldr	r3, [r7, #4]
 801db76:	6cdc      	ldr	r4, [r3, #76]	@ 0x4c
 801db78:	687b      	ldr	r3, [r7, #4]
 801db7a:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801db7c:	691b      	ldr	r3, [r3, #16]
 801db7e:	685b      	ldr	r3, [r3, #4]
 801db80:	4618      	mov	r0, r3
 801db82:	f7fa fd7e 	bl	8018682 <lwip_htonl>
 801db86:	4603      	mov	r3, r0
 801db88:	1ae3      	subs	r3, r4, r3
 801db8a:	2b00      	cmp	r3, #0
 801db8c:	dc0b      	bgt.n	801dba6 <tcp_receive+0x44a>
          tcp_clear_flags(pcb, TF_RTO);
 801db8e:	687b      	ldr	r3, [r7, #4]
 801db90:	8b5b      	ldrh	r3, [r3, #26]
 801db92:	f423 6300 	bic.w	r3, r3, #2048	@ 0x800
 801db96:	b29a      	uxth	r2, r3
 801db98:	687b      	ldr	r3, [r7, #4]
 801db9a:	835a      	strh	r2, [r3, #26]
    } else if (TCP_SEQ_BETWEEN(ackno, pcb->lastack + 1, pcb->snd_nxt)) {
 801db9c:	e003      	b.n	801dba6 <tcp_receive+0x44a>
        }
      }
      /* End of ACK for new data processing. */
    } else {
      /* Out of sequence ACK, didn't really ack anything */
      tcp_send_empty_ack(pcb);
 801db9e:	6878      	ldr	r0, [r7, #4]
 801dba0:	f002 fc3c 	bl	802041c <tcp_send_empty_ack>
 801dba4:	e000      	b.n	801dba8 <tcp_receive+0x44c>
    } else if (TCP_SEQ_BETWEEN(ackno, pcb->lastack + 1, pcb->snd_nxt)) {
 801dba6:	bf00      	nop
                                pcb->rttest, pcb->rtseq, ackno));

    /* RTT estimation calculations. This is done by checking if the
       incoming segment acknowledges the segment we use to take a
       round-trip time measurement. */
    if (pcb->rttest && TCP_SEQ_LT(pcb->rtseq, ackno)) {
 801dba8:	687b      	ldr	r3, [r7, #4]
 801dbaa:	6b5b      	ldr	r3, [r3, #52]	@ 0x34
 801dbac:	2b00      	cmp	r3, #0
 801dbae:	d05b      	beq.n	801dc68 <tcp_receive+0x50c>
 801dbb0:	687b      	ldr	r3, [r7, #4]
 801dbb2:	6b9a      	ldr	r2, [r3, #56]	@ 0x38
 801dbb4:	4b60      	ldr	r3, [pc, #384]	@ (801dd38 <tcp_receive+0x5dc>)
 801dbb6:	681b      	ldr	r3, [r3, #0]
 801dbb8:	1ad3      	subs	r3, r2, r3
 801dbba:	2b00      	cmp	r3, #0
 801dbbc:	da54      	bge.n	801dc68 <tcp_receive+0x50c>
      /* diff between this shouldn't exceed 32K since this are tcp timer ticks
         and a round-trip shouldn't be that long... */
      m = (s16_t)(tcp_ticks - pcb->rttest);
 801dbbe:	4b5f      	ldr	r3, [pc, #380]	@ (801dd3c <tcp_receive+0x5e0>)
 801dbc0:	681b      	ldr	r3, [r3, #0]
 801dbc2:	b29a      	uxth	r2, r3
 801dbc4:	687b      	ldr	r3, [r7, #4]
 801dbc6:	6b5b      	ldr	r3, [r3, #52]	@ 0x34
 801dbc8:	b29b      	uxth	r3, r3
 801dbca:	1ad3      	subs	r3, r2, r3
 801dbcc:	b29b      	uxth	r3, r3
 801dbce:	f8a7 304e 	strh.w	r3, [r7, #78]	@ 0x4e

      LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_receive: experienced rtt %"U16_F" ticks (%"U16_F" msec).\n",
                                  m, (u16_t)(m * TCP_SLOW_INTERVAL)));

      /* This is taken directly from VJs original code in his paper */
      m = (s16_t)(m - (pcb->sa >> 3));
 801dbd2:	f8b7 204e 	ldrh.w	r2, [r7, #78]	@ 0x4e
 801dbd6:	687b      	ldr	r3, [r7, #4]
 801dbd8:	f9b3 303c 	ldrsh.w	r3, [r3, #60]	@ 0x3c
 801dbdc:	10db      	asrs	r3, r3, #3
 801dbde:	b21b      	sxth	r3, r3
 801dbe0:	b29b      	uxth	r3, r3
 801dbe2:	1ad3      	subs	r3, r2, r3
 801dbe4:	b29b      	uxth	r3, r3
 801dbe6:	f8a7 304e 	strh.w	r3, [r7, #78]	@ 0x4e
      pcb->sa = (s16_t)(pcb->sa + m);
 801dbea:	687b      	ldr	r3, [r7, #4]
 801dbec:	f9b3 303c 	ldrsh.w	r3, [r3, #60]	@ 0x3c
 801dbf0:	b29a      	uxth	r2, r3
 801dbf2:	f8b7 304e 	ldrh.w	r3, [r7, #78]	@ 0x4e
 801dbf6:	4413      	add	r3, r2
 801dbf8:	b29b      	uxth	r3, r3
 801dbfa:	b21a      	sxth	r2, r3
 801dbfc:	687b      	ldr	r3, [r7, #4]
 801dbfe:	879a      	strh	r2, [r3, #60]	@ 0x3c
      if (m < 0) {
 801dc00:	f9b7 304e 	ldrsh.w	r3, [r7, #78]	@ 0x4e
 801dc04:	2b00      	cmp	r3, #0
 801dc06:	da05      	bge.n	801dc14 <tcp_receive+0x4b8>
        m = (s16_t) - m;
 801dc08:	f8b7 304e 	ldrh.w	r3, [r7, #78]	@ 0x4e
 801dc0c:	425b      	negs	r3, r3
 801dc0e:	b29b      	uxth	r3, r3
 801dc10:	f8a7 304e 	strh.w	r3, [r7, #78]	@ 0x4e
      }
      m = (s16_t)(m - (pcb->sv >> 2));
 801dc14:	f8b7 204e 	ldrh.w	r2, [r7, #78]	@ 0x4e
 801dc18:	687b      	ldr	r3, [r7, #4]
 801dc1a:	f9b3 303e 	ldrsh.w	r3, [r3, #62]	@ 0x3e
 801dc1e:	109b      	asrs	r3, r3, #2
 801dc20:	b21b      	sxth	r3, r3
 801dc22:	b29b      	uxth	r3, r3
 801dc24:	1ad3      	subs	r3, r2, r3
 801dc26:	b29b      	uxth	r3, r3
 801dc28:	f8a7 304e 	strh.w	r3, [r7, #78]	@ 0x4e
      pcb->sv = (s16_t)(pcb->sv + m);
 801dc2c:	687b      	ldr	r3, [r7, #4]
 801dc2e:	f9b3 303e 	ldrsh.w	r3, [r3, #62]	@ 0x3e
 801dc32:	b29a      	uxth	r2, r3
 801dc34:	f8b7 304e 	ldrh.w	r3, [r7, #78]	@ 0x4e
 801dc38:	4413      	add	r3, r2
 801dc3a:	b29b      	uxth	r3, r3
 801dc3c:	b21a      	sxth	r2, r3
 801dc3e:	687b      	ldr	r3, [r7, #4]
 801dc40:	87da      	strh	r2, [r3, #62]	@ 0x3e
      pcb->rto = (s16_t)((pcb->sa >> 3) + pcb->sv);
 801dc42:	687b      	ldr	r3, [r7, #4]
 801dc44:	f9b3 303c 	ldrsh.w	r3, [r3, #60]	@ 0x3c
 801dc48:	10db      	asrs	r3, r3, #3
 801dc4a:	b21b      	sxth	r3, r3
 801dc4c:	b29a      	uxth	r2, r3
 801dc4e:	687b      	ldr	r3, [r7, #4]
 801dc50:	f9b3 303e 	ldrsh.w	r3, [r3, #62]	@ 0x3e
 801dc54:	b29b      	uxth	r3, r3
 801dc56:	4413      	add	r3, r2
 801dc58:	b29b      	uxth	r3, r3
 801dc5a:	b21a      	sxth	r2, r3
 801dc5c:	687b      	ldr	r3, [r7, #4]
 801dc5e:	f8a3 2040 	strh.w	r2, [r3, #64]	@ 0x40

      LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_receive: RTO %"U16_F" (%"U16_F" milliseconds)\n",
                                  pcb->rto, (u16_t)(pcb->rto * TCP_SLOW_INTERVAL)));

      pcb->rttest = 0;
 801dc62:	687b      	ldr	r3, [r7, #4]
 801dc64:	2200      	movs	r2, #0
 801dc66:	635a      	str	r2, [r3, #52]	@ 0x34

  /* If the incoming segment contains data, we must process it
     further unless the pcb already received a FIN.
     (RFC 793, chapter 3.9, "SEGMENT ARRIVES" in states CLOSE-WAIT, CLOSING,
     LAST-ACK and TIME-WAIT: "Ignore the segment text.") */
  if ((tcplen > 0) && (pcb->state < CLOSE_WAIT)) {
 801dc68:	4b35      	ldr	r3, [pc, #212]	@ (801dd40 <tcp_receive+0x5e4>)
 801dc6a:	881b      	ldrh	r3, [r3, #0]
 801dc6c:	2b00      	cmp	r3, #0
 801dc6e:	f000 84df 	beq.w	801e630 <tcp_receive+0xed4>
 801dc72:	687b      	ldr	r3, [r7, #4]
 801dc74:	7d1b      	ldrb	r3, [r3, #20]
 801dc76:	2b06      	cmp	r3, #6
 801dc78:	f200 84da 	bhi.w	801e630 <tcp_receive+0xed4>
       this if the sequence number of the incoming segment is less
       than rcv_nxt, and the sequence number plus the length of the
       segment is larger than rcv_nxt. */
    /*    if (TCP_SEQ_LT(seqno, pcb->rcv_nxt)) {
          if (TCP_SEQ_LT(pcb->rcv_nxt, seqno + tcplen)) {*/
    if (TCP_SEQ_BETWEEN(pcb->rcv_nxt, seqno + 1, seqno + tcplen - 1)) {
 801dc7c:	687b      	ldr	r3, [r7, #4]
 801dc7e:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 801dc80:	4b30      	ldr	r3, [pc, #192]	@ (801dd44 <tcp_receive+0x5e8>)
 801dc82:	681b      	ldr	r3, [r3, #0]
 801dc84:	1ad3      	subs	r3, r2, r3
 801dc86:	3b01      	subs	r3, #1
 801dc88:	2b00      	cmp	r3, #0
 801dc8a:	f2c0 808f 	blt.w	801ddac <tcp_receive+0x650>
 801dc8e:	687b      	ldr	r3, [r7, #4]
 801dc90:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 801dc92:	4b2b      	ldr	r3, [pc, #172]	@ (801dd40 <tcp_receive+0x5e4>)
 801dc94:	881b      	ldrh	r3, [r3, #0]
 801dc96:	4619      	mov	r1, r3
 801dc98:	4b2a      	ldr	r3, [pc, #168]	@ (801dd44 <tcp_receive+0x5e8>)
 801dc9a:	681b      	ldr	r3, [r3, #0]
 801dc9c:	440b      	add	r3, r1
 801dc9e:	1ad3      	subs	r3, r2, r3
 801dca0:	3301      	adds	r3, #1
 801dca2:	2b00      	cmp	r3, #0
 801dca4:	f300 8082 	bgt.w	801ddac <tcp_receive+0x650>

         After we are done with adjusting the pbuf pointers we must
         adjust the ->data pointer in the seg and the segment
         length.*/

      struct pbuf *p = inseg.p;
 801dca8:	4b27      	ldr	r3, [pc, #156]	@ (801dd48 <tcp_receive+0x5ec>)
 801dcaa:	685b      	ldr	r3, [r3, #4]
 801dcac:	647b      	str	r3, [r7, #68]	@ 0x44
      u32_t off32 = pcb->rcv_nxt - seqno;
 801dcae:	687b      	ldr	r3, [r7, #4]
 801dcb0:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 801dcb2:	4b24      	ldr	r3, [pc, #144]	@ (801dd44 <tcp_receive+0x5e8>)
 801dcb4:	681b      	ldr	r3, [r3, #0]
 801dcb6:	1ad3      	subs	r3, r2, r3
 801dcb8:	627b      	str	r3, [r7, #36]	@ 0x24
      u16_t new_tot_len, off;
      LWIP_ASSERT("inseg.p != NULL", inseg.p);
 801dcba:	4b23      	ldr	r3, [pc, #140]	@ (801dd48 <tcp_receive+0x5ec>)
 801dcbc:	685b      	ldr	r3, [r3, #4]
 801dcbe:	2b00      	cmp	r3, #0
 801dcc0:	d106      	bne.n	801dcd0 <tcp_receive+0x574>
 801dcc2:	4b22      	ldr	r3, [pc, #136]	@ (801dd4c <tcp_receive+0x5f0>)
 801dcc4:	f240 5294 	movw	r2, #1428	@ 0x594
 801dcc8:	4921      	ldr	r1, [pc, #132]	@ (801dd50 <tcp_receive+0x5f4>)
 801dcca:	4822      	ldr	r0, [pc, #136]	@ (801dd54 <tcp_receive+0x5f8>)
 801dccc:	f00b fc1e 	bl	802950c <iprintf>
      LWIP_ASSERT("insane offset!", (off32 < 0xffff));
 801dcd0:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801dcd2:	f64f 72fe 	movw	r2, #65534	@ 0xfffe
 801dcd6:	4293      	cmp	r3, r2
 801dcd8:	d906      	bls.n	801dce8 <tcp_receive+0x58c>
 801dcda:	4b1c      	ldr	r3, [pc, #112]	@ (801dd4c <tcp_receive+0x5f0>)
 801dcdc:	f240 5295 	movw	r2, #1429	@ 0x595
 801dce0:	491d      	ldr	r1, [pc, #116]	@ (801dd58 <tcp_receive+0x5fc>)
 801dce2:	481c      	ldr	r0, [pc, #112]	@ (801dd54 <tcp_receive+0x5f8>)
 801dce4:	f00b fc12 	bl	802950c <iprintf>
      off = (u16_t)off32;
 801dce8:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801dcea:	f8a7 3042 	strh.w	r3, [r7, #66]	@ 0x42
      LWIP_ASSERT("pbuf too short!", (((s32_t)inseg.p->tot_len) >= off));
 801dcee:	4b16      	ldr	r3, [pc, #88]	@ (801dd48 <tcp_receive+0x5ec>)
 801dcf0:	685b      	ldr	r3, [r3, #4]
 801dcf2:	891b      	ldrh	r3, [r3, #8]
 801dcf4:	f8b7 2042 	ldrh.w	r2, [r7, #66]	@ 0x42
 801dcf8:	429a      	cmp	r2, r3
 801dcfa:	d906      	bls.n	801dd0a <tcp_receive+0x5ae>
 801dcfc:	4b13      	ldr	r3, [pc, #76]	@ (801dd4c <tcp_receive+0x5f0>)
 801dcfe:	f240 5297 	movw	r2, #1431	@ 0x597
 801dd02:	4916      	ldr	r1, [pc, #88]	@ (801dd5c <tcp_receive+0x600>)
 801dd04:	4813      	ldr	r0, [pc, #76]	@ (801dd54 <tcp_receive+0x5f8>)
 801dd06:	f00b fc01 	bl	802950c <iprintf>
      inseg.len -= off;
 801dd0a:	4b0f      	ldr	r3, [pc, #60]	@ (801dd48 <tcp_receive+0x5ec>)
 801dd0c:	891a      	ldrh	r2, [r3, #8]
 801dd0e:	f8b7 3042 	ldrh.w	r3, [r7, #66]	@ 0x42
 801dd12:	1ad3      	subs	r3, r2, r3
 801dd14:	b29a      	uxth	r2, r3
 801dd16:	4b0c      	ldr	r3, [pc, #48]	@ (801dd48 <tcp_receive+0x5ec>)
 801dd18:	811a      	strh	r2, [r3, #8]
      new_tot_len = (u16_t)(inseg.p->tot_len - off);
 801dd1a:	4b0b      	ldr	r3, [pc, #44]	@ (801dd48 <tcp_receive+0x5ec>)
 801dd1c:	685b      	ldr	r3, [r3, #4]
 801dd1e:	891a      	ldrh	r2, [r3, #8]
 801dd20:	f8b7 3042 	ldrh.w	r3, [r7, #66]	@ 0x42
 801dd24:	1ad3      	subs	r3, r2, r3
 801dd26:	847b      	strh	r3, [r7, #34]	@ 0x22
      while (p->len < off) {
 801dd28:	e02a      	b.n	801dd80 <tcp_receive+0x624>
 801dd2a:	bf00      	nop
 801dd2c:	0802ec0c 	.word	0x0802ec0c
 801dd30:	0802ec14 	.word	0x0802ec14
 801dd34:	2402a030 	.word	0x2402a030
 801dd38:	2402a02c 	.word	0x2402a02c
 801dd3c:	24029fec 	.word	0x24029fec
 801dd40:	2402a032 	.word	0x2402a032
 801dd44:	2402a028 	.word	0x2402a028
 801dd48:	2402a004 	.word	0x2402a004
 801dd4c:	0802e8a4 	.word	0x0802e8a4
 801dd50:	0802ec1c 	.word	0x0802ec1c
 801dd54:	0802e8f0 	.word	0x0802e8f0
 801dd58:	0802ec2c 	.word	0x0802ec2c
 801dd5c:	0802ec3c 	.word	0x0802ec3c
        off -= p->len;
 801dd60:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 801dd62:	895b      	ldrh	r3, [r3, #10]
 801dd64:	f8b7 2042 	ldrh.w	r2, [r7, #66]	@ 0x42
 801dd68:	1ad3      	subs	r3, r2, r3
 801dd6a:	f8a7 3042 	strh.w	r3, [r7, #66]	@ 0x42
        /* all pbufs up to and including this one have len==0, so tot_len is equal */
        p->tot_len = new_tot_len;
 801dd6e:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 801dd70:	8c7a      	ldrh	r2, [r7, #34]	@ 0x22
 801dd72:	811a      	strh	r2, [r3, #8]
        p->len = 0;
 801dd74:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 801dd76:	2200      	movs	r2, #0
 801dd78:	815a      	strh	r2, [r3, #10]
        p = p->next;
 801dd7a:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 801dd7c:	681b      	ldr	r3, [r3, #0]
 801dd7e:	647b      	str	r3, [r7, #68]	@ 0x44
      while (p->len < off) {
 801dd80:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 801dd82:	895b      	ldrh	r3, [r3, #10]
 801dd84:	f8b7 2042 	ldrh.w	r2, [r7, #66]	@ 0x42
 801dd88:	429a      	cmp	r2, r3
 801dd8a:	d8e9      	bhi.n	801dd60 <tcp_receive+0x604>
      }
      /* cannot fail... */
      pbuf_remove_header(p, off);
 801dd8c:	f8b7 3042 	ldrh.w	r3, [r7, #66]	@ 0x42
 801dd90:	4619      	mov	r1, r3
 801dd92:	6c78      	ldr	r0, [r7, #68]	@ 0x44
 801dd94:	f7fc f88a 	bl	8019eac <pbuf_remove_header>
      inseg.tcphdr->seqno = seqno = pcb->rcv_nxt;
 801dd98:	687b      	ldr	r3, [r7, #4]
 801dd9a:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801dd9c:	4a90      	ldr	r2, [pc, #576]	@ (801dfe0 <tcp_receive+0x884>)
 801dd9e:	6013      	str	r3, [r2, #0]
 801dda0:	4b90      	ldr	r3, [pc, #576]	@ (801dfe4 <tcp_receive+0x888>)
 801dda2:	691b      	ldr	r3, [r3, #16]
 801dda4:	4a8e      	ldr	r2, [pc, #568]	@ (801dfe0 <tcp_receive+0x884>)
 801dda6:	6812      	ldr	r2, [r2, #0]
 801dda8:	605a      	str	r2, [r3, #4]
    if (TCP_SEQ_BETWEEN(pcb->rcv_nxt, seqno + 1, seqno + tcplen - 1)) {
 801ddaa:	e00d      	b.n	801ddc8 <tcp_receive+0x66c>
    } else {
      if (TCP_SEQ_LT(seqno, pcb->rcv_nxt)) {
 801ddac:	4b8c      	ldr	r3, [pc, #560]	@ (801dfe0 <tcp_receive+0x884>)
 801ddae:	681a      	ldr	r2, [r3, #0]
 801ddb0:	687b      	ldr	r3, [r7, #4]
 801ddb2:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801ddb4:	1ad3      	subs	r3, r2, r3
 801ddb6:	2b00      	cmp	r3, #0
 801ddb8:	da06      	bge.n	801ddc8 <tcp_receive+0x66c>
        /* the whole segment is < rcv_nxt */
        /* must be a duplicate of a packet that has already been correctly handled */

        LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: duplicate seqno %"U32_F"\n", seqno));
        tcp_ack_now(pcb);
 801ddba:	687b      	ldr	r3, [r7, #4]
 801ddbc:	8b5b      	ldrh	r3, [r3, #26]
 801ddbe:	f043 0302 	orr.w	r3, r3, #2
 801ddc2:	b29a      	uxth	r2, r3
 801ddc4:	687b      	ldr	r3, [r7, #4]
 801ddc6:	835a      	strh	r2, [r3, #26]
    }

    /* The sequence number must be within the window (above rcv_nxt
       and below rcv_nxt + rcv_wnd) in order to be further
       processed. */
    if (TCP_SEQ_BETWEEN(seqno, pcb->rcv_nxt,
 801ddc8:	4b85      	ldr	r3, [pc, #532]	@ (801dfe0 <tcp_receive+0x884>)
 801ddca:	681a      	ldr	r2, [r3, #0]
 801ddcc:	687b      	ldr	r3, [r7, #4]
 801ddce:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801ddd0:	1ad3      	subs	r3, r2, r3
 801ddd2:	2b00      	cmp	r3, #0
 801ddd4:	f2c0 8427 	blt.w	801e626 <tcp_receive+0xeca>
 801ddd8:	4b81      	ldr	r3, [pc, #516]	@ (801dfe0 <tcp_receive+0x884>)
 801ddda:	681a      	ldr	r2, [r3, #0]
 801dddc:	687b      	ldr	r3, [r7, #4]
 801ddde:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801dde0:	6879      	ldr	r1, [r7, #4]
 801dde2:	8d09      	ldrh	r1, [r1, #40]	@ 0x28
 801dde4:	440b      	add	r3, r1
 801dde6:	1ad3      	subs	r3, r2, r3
 801dde8:	3301      	adds	r3, #1
 801ddea:	2b00      	cmp	r3, #0
 801ddec:	f300 841b 	bgt.w	801e626 <tcp_receive+0xeca>
                        pcb->rcv_nxt + pcb->rcv_wnd - 1)) {
      if (pcb->rcv_nxt == seqno) {
 801ddf0:	687b      	ldr	r3, [r7, #4]
 801ddf2:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 801ddf4:	4b7a      	ldr	r3, [pc, #488]	@ (801dfe0 <tcp_receive+0x884>)
 801ddf6:	681b      	ldr	r3, [r3, #0]
 801ddf8:	429a      	cmp	r2, r3
 801ddfa:	f040 8298 	bne.w	801e32e <tcp_receive+0xbd2>
        /* The incoming segment is the next in sequence. We check if
           we have to trim the end of the segment and update rcv_nxt
           and pass the data to the application. */
        tcplen = TCP_TCPLEN(&inseg);
 801ddfe:	4b79      	ldr	r3, [pc, #484]	@ (801dfe4 <tcp_receive+0x888>)
 801de00:	891c      	ldrh	r4, [r3, #8]
 801de02:	4b78      	ldr	r3, [pc, #480]	@ (801dfe4 <tcp_receive+0x888>)
 801de04:	691b      	ldr	r3, [r3, #16]
 801de06:	899b      	ldrh	r3, [r3, #12]
 801de08:	b29b      	uxth	r3, r3
 801de0a:	4618      	mov	r0, r3
 801de0c:	f7fa fc24 	bl	8018658 <lwip_htons>
 801de10:	4603      	mov	r3, r0
 801de12:	b2db      	uxtb	r3, r3
 801de14:	f003 0303 	and.w	r3, r3, #3
 801de18:	2b00      	cmp	r3, #0
 801de1a:	d001      	beq.n	801de20 <tcp_receive+0x6c4>
 801de1c:	2301      	movs	r3, #1
 801de1e:	e000      	b.n	801de22 <tcp_receive+0x6c6>
 801de20:	2300      	movs	r3, #0
 801de22:	4423      	add	r3, r4
 801de24:	b29a      	uxth	r2, r3
 801de26:	4b70      	ldr	r3, [pc, #448]	@ (801dfe8 <tcp_receive+0x88c>)
 801de28:	801a      	strh	r2, [r3, #0]

        if (tcplen > pcb->rcv_wnd) {
 801de2a:	687b      	ldr	r3, [r7, #4]
 801de2c:	8d1a      	ldrh	r2, [r3, #40]	@ 0x28
 801de2e:	4b6e      	ldr	r3, [pc, #440]	@ (801dfe8 <tcp_receive+0x88c>)
 801de30:	881b      	ldrh	r3, [r3, #0]
 801de32:	429a      	cmp	r2, r3
 801de34:	d274      	bcs.n	801df20 <tcp_receive+0x7c4>
          LWIP_DEBUGF(TCP_INPUT_DEBUG,
                      ("tcp_receive: other end overran receive window"
                       "seqno %"U32_F" len %"U16_F" right edge %"U32_F"\n",
                       seqno, tcplen, pcb->rcv_nxt + pcb->rcv_wnd));
          if (TCPH_FLAGS(inseg.tcphdr) & TCP_FIN) {
 801de36:	4b6b      	ldr	r3, [pc, #428]	@ (801dfe4 <tcp_receive+0x888>)
 801de38:	691b      	ldr	r3, [r3, #16]
 801de3a:	899b      	ldrh	r3, [r3, #12]
 801de3c:	b29b      	uxth	r3, r3
 801de3e:	4618      	mov	r0, r3
 801de40:	f7fa fc0a 	bl	8018658 <lwip_htons>
 801de44:	4603      	mov	r3, r0
 801de46:	b2db      	uxtb	r3, r3
 801de48:	f003 0301 	and.w	r3, r3, #1
 801de4c:	2b00      	cmp	r3, #0
 801de4e:	d01e      	beq.n	801de8e <tcp_receive+0x732>
            /* Must remove the FIN from the header as we're trimming
             * that byte of sequence-space from the packet */
            TCPH_FLAGS_SET(inseg.tcphdr, TCPH_FLAGS(inseg.tcphdr) & ~(unsigned int)TCP_FIN);
 801de50:	4b64      	ldr	r3, [pc, #400]	@ (801dfe4 <tcp_receive+0x888>)
 801de52:	691b      	ldr	r3, [r3, #16]
 801de54:	899b      	ldrh	r3, [r3, #12]
 801de56:	b29b      	uxth	r3, r3
 801de58:	b21b      	sxth	r3, r3
 801de5a:	f423 537c 	bic.w	r3, r3, #16128	@ 0x3f00
 801de5e:	b21c      	sxth	r4, r3
 801de60:	4b60      	ldr	r3, [pc, #384]	@ (801dfe4 <tcp_receive+0x888>)
 801de62:	691b      	ldr	r3, [r3, #16]
 801de64:	899b      	ldrh	r3, [r3, #12]
 801de66:	b29b      	uxth	r3, r3
 801de68:	4618      	mov	r0, r3
 801de6a:	f7fa fbf5 	bl	8018658 <lwip_htons>
 801de6e:	4603      	mov	r3, r0
 801de70:	b2db      	uxtb	r3, r3
 801de72:	f003 033e 	and.w	r3, r3, #62	@ 0x3e
 801de76:	b29b      	uxth	r3, r3
 801de78:	4618      	mov	r0, r3
 801de7a:	f7fa fbed 	bl	8018658 <lwip_htons>
 801de7e:	4603      	mov	r3, r0
 801de80:	b21b      	sxth	r3, r3
 801de82:	4323      	orrs	r3, r4
 801de84:	b21a      	sxth	r2, r3
 801de86:	4b57      	ldr	r3, [pc, #348]	@ (801dfe4 <tcp_receive+0x888>)
 801de88:	691b      	ldr	r3, [r3, #16]
 801de8a:	b292      	uxth	r2, r2
 801de8c:	819a      	strh	r2, [r3, #12]
          }
          /* Adjust length of segment to fit in the window. */
          TCPWND_CHECK16(pcb->rcv_wnd);
          inseg.len = (u16_t)pcb->rcv_wnd;
 801de8e:	687b      	ldr	r3, [r7, #4]
 801de90:	8d1a      	ldrh	r2, [r3, #40]	@ 0x28
 801de92:	4b54      	ldr	r3, [pc, #336]	@ (801dfe4 <tcp_receive+0x888>)
 801de94:	811a      	strh	r2, [r3, #8]
          if (TCPH_FLAGS(inseg.tcphdr) & TCP_SYN) {
 801de96:	4b53      	ldr	r3, [pc, #332]	@ (801dfe4 <tcp_receive+0x888>)
 801de98:	691b      	ldr	r3, [r3, #16]
 801de9a:	899b      	ldrh	r3, [r3, #12]
 801de9c:	b29b      	uxth	r3, r3
 801de9e:	4618      	mov	r0, r3
 801dea0:	f7fa fbda 	bl	8018658 <lwip_htons>
 801dea4:	4603      	mov	r3, r0
 801dea6:	b2db      	uxtb	r3, r3
 801dea8:	f003 0302 	and.w	r3, r3, #2
 801deac:	2b00      	cmp	r3, #0
 801deae:	d005      	beq.n	801debc <tcp_receive+0x760>
            inseg.len -= 1;
 801deb0:	4b4c      	ldr	r3, [pc, #304]	@ (801dfe4 <tcp_receive+0x888>)
 801deb2:	891b      	ldrh	r3, [r3, #8]
 801deb4:	3b01      	subs	r3, #1
 801deb6:	b29a      	uxth	r2, r3
 801deb8:	4b4a      	ldr	r3, [pc, #296]	@ (801dfe4 <tcp_receive+0x888>)
 801deba:	811a      	strh	r2, [r3, #8]
          }
          pbuf_realloc(inseg.p, inseg.len);
 801debc:	4b49      	ldr	r3, [pc, #292]	@ (801dfe4 <tcp_receive+0x888>)
 801debe:	685b      	ldr	r3, [r3, #4]
 801dec0:	4a48      	ldr	r2, [pc, #288]	@ (801dfe4 <tcp_receive+0x888>)
 801dec2:	8912      	ldrh	r2, [r2, #8]
 801dec4:	4611      	mov	r1, r2
 801dec6:	4618      	mov	r0, r3
 801dec8:	f7fb fef2 	bl	8019cb0 <pbuf_realloc>
          tcplen = TCP_TCPLEN(&inseg);
 801decc:	4b45      	ldr	r3, [pc, #276]	@ (801dfe4 <tcp_receive+0x888>)
 801dece:	891c      	ldrh	r4, [r3, #8]
 801ded0:	4b44      	ldr	r3, [pc, #272]	@ (801dfe4 <tcp_receive+0x888>)
 801ded2:	691b      	ldr	r3, [r3, #16]
 801ded4:	899b      	ldrh	r3, [r3, #12]
 801ded6:	b29b      	uxth	r3, r3
 801ded8:	4618      	mov	r0, r3
 801deda:	f7fa fbbd 	bl	8018658 <lwip_htons>
 801dede:	4603      	mov	r3, r0
 801dee0:	b2db      	uxtb	r3, r3
 801dee2:	f003 0303 	and.w	r3, r3, #3
 801dee6:	2b00      	cmp	r3, #0
 801dee8:	d001      	beq.n	801deee <tcp_receive+0x792>
 801deea:	2301      	movs	r3, #1
 801deec:	e000      	b.n	801def0 <tcp_receive+0x794>
 801deee:	2300      	movs	r3, #0
 801def0:	4423      	add	r3, r4
 801def2:	b29a      	uxth	r2, r3
 801def4:	4b3c      	ldr	r3, [pc, #240]	@ (801dfe8 <tcp_receive+0x88c>)
 801def6:	801a      	strh	r2, [r3, #0]
          LWIP_ASSERT("tcp_receive: segment not trimmed correctly to rcv_wnd\n",
 801def8:	4b3b      	ldr	r3, [pc, #236]	@ (801dfe8 <tcp_receive+0x88c>)
 801defa:	881b      	ldrh	r3, [r3, #0]
 801defc:	461a      	mov	r2, r3
 801defe:	4b38      	ldr	r3, [pc, #224]	@ (801dfe0 <tcp_receive+0x884>)
 801df00:	681b      	ldr	r3, [r3, #0]
 801df02:	441a      	add	r2, r3
 801df04:	687b      	ldr	r3, [r7, #4]
 801df06:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801df08:	6879      	ldr	r1, [r7, #4]
 801df0a:	8d09      	ldrh	r1, [r1, #40]	@ 0x28
 801df0c:	440b      	add	r3, r1
 801df0e:	429a      	cmp	r2, r3
 801df10:	d006      	beq.n	801df20 <tcp_receive+0x7c4>
 801df12:	4b36      	ldr	r3, [pc, #216]	@ (801dfec <tcp_receive+0x890>)
 801df14:	f240 52cb 	movw	r2, #1483	@ 0x5cb
 801df18:	4935      	ldr	r1, [pc, #212]	@ (801dff0 <tcp_receive+0x894>)
 801df1a:	4836      	ldr	r0, [pc, #216]	@ (801dff4 <tcp_receive+0x898>)
 801df1c:	f00b faf6 	bl	802950c <iprintf>
        }
#if TCP_QUEUE_OOSEQ
        /* Received in-sequence data, adjust ooseq data if:
           - FIN has been received or
           - inseq overlaps with ooseq */
        if (pcb->ooseq != NULL) {
 801df20:	687b      	ldr	r3, [r7, #4]
 801df22:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801df24:	2b00      	cmp	r3, #0
 801df26:	f000 80e6 	beq.w	801e0f6 <tcp_receive+0x99a>
          if (TCPH_FLAGS(inseg.tcphdr) & TCP_FIN) {
 801df2a:	4b2e      	ldr	r3, [pc, #184]	@ (801dfe4 <tcp_receive+0x888>)
 801df2c:	691b      	ldr	r3, [r3, #16]
 801df2e:	899b      	ldrh	r3, [r3, #12]
 801df30:	b29b      	uxth	r3, r3
 801df32:	4618      	mov	r0, r3
 801df34:	f7fa fb90 	bl	8018658 <lwip_htons>
 801df38:	4603      	mov	r3, r0
 801df3a:	b2db      	uxtb	r3, r3
 801df3c:	f003 0301 	and.w	r3, r3, #1
 801df40:	2b00      	cmp	r3, #0
 801df42:	d010      	beq.n	801df66 <tcp_receive+0x80a>
            LWIP_DEBUGF(TCP_INPUT_DEBUG,
                        ("tcp_receive: received in-order FIN, binning ooseq queue\n"));
            /* Received in-order FIN means anything that was received
             * out of order must now have been received in-order, so
             * bin the ooseq queue */
            while (pcb->ooseq != NULL) {
 801df44:	e00a      	b.n	801df5c <tcp_receive+0x800>
              struct tcp_seg *old_ooseq = pcb->ooseq;
 801df46:	687b      	ldr	r3, [r7, #4]
 801df48:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801df4a:	60fb      	str	r3, [r7, #12]
              pcb->ooseq = pcb->ooseq->next;
 801df4c:	687b      	ldr	r3, [r7, #4]
 801df4e:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801df50:	681a      	ldr	r2, [r3, #0]
 801df52:	687b      	ldr	r3, [r7, #4]
 801df54:	675a      	str	r2, [r3, #116]	@ 0x74
              tcp_seg_free(old_ooseq);
 801df56:	68f8      	ldr	r0, [r7, #12]
 801df58:	f7fd fcb9 	bl	801b8ce <tcp_seg_free>
            while (pcb->ooseq != NULL) {
 801df5c:	687b      	ldr	r3, [r7, #4]
 801df5e:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801df60:	2b00      	cmp	r3, #0
 801df62:	d1f0      	bne.n	801df46 <tcp_receive+0x7ea>
 801df64:	e0c7      	b.n	801e0f6 <tcp_receive+0x99a>
            }
          } else {
            struct tcp_seg *next = pcb->ooseq;
 801df66:	687b      	ldr	r3, [r7, #4]
 801df68:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801df6a:	63fb      	str	r3, [r7, #60]	@ 0x3c
            /* Remove all segments on ooseq that are covered by inseg already.
             * FIN is copied from ooseq to inseg if present. */
            while (next &&
 801df6c:	e051      	b.n	801e012 <tcp_receive+0x8b6>
                   TCP_SEQ_GEQ(seqno + tcplen,
                               next->tcphdr->seqno + next->len)) {
              struct tcp_seg *tmp;
              /* inseg cannot have FIN here (already processed above) */
              if ((TCPH_FLAGS(next->tcphdr) & TCP_FIN) != 0 &&
 801df6e:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801df70:	691b      	ldr	r3, [r3, #16]
 801df72:	899b      	ldrh	r3, [r3, #12]
 801df74:	b29b      	uxth	r3, r3
 801df76:	4618      	mov	r0, r3
 801df78:	f7fa fb6e 	bl	8018658 <lwip_htons>
 801df7c:	4603      	mov	r3, r0
 801df7e:	b2db      	uxtb	r3, r3
 801df80:	f003 0301 	and.w	r3, r3, #1
 801df84:	2b00      	cmp	r3, #0
 801df86:	d03c      	beq.n	801e002 <tcp_receive+0x8a6>
                  (TCPH_FLAGS(inseg.tcphdr) & TCP_SYN) == 0) {
 801df88:	4b16      	ldr	r3, [pc, #88]	@ (801dfe4 <tcp_receive+0x888>)
 801df8a:	691b      	ldr	r3, [r3, #16]
 801df8c:	899b      	ldrh	r3, [r3, #12]
 801df8e:	b29b      	uxth	r3, r3
 801df90:	4618      	mov	r0, r3
 801df92:	f7fa fb61 	bl	8018658 <lwip_htons>
 801df96:	4603      	mov	r3, r0
 801df98:	b2db      	uxtb	r3, r3
 801df9a:	f003 0302 	and.w	r3, r3, #2
              if ((TCPH_FLAGS(next->tcphdr) & TCP_FIN) != 0 &&
 801df9e:	2b00      	cmp	r3, #0
 801dfa0:	d12f      	bne.n	801e002 <tcp_receive+0x8a6>
                TCPH_SET_FLAG(inseg.tcphdr, TCP_FIN);
 801dfa2:	4b10      	ldr	r3, [pc, #64]	@ (801dfe4 <tcp_receive+0x888>)
 801dfa4:	691b      	ldr	r3, [r3, #16]
 801dfa6:	899b      	ldrh	r3, [r3, #12]
 801dfa8:	b29c      	uxth	r4, r3
 801dfaa:	2001      	movs	r0, #1
 801dfac:	f7fa fb54 	bl	8018658 <lwip_htons>
 801dfb0:	4603      	mov	r3, r0
 801dfb2:	461a      	mov	r2, r3
 801dfb4:	4b0b      	ldr	r3, [pc, #44]	@ (801dfe4 <tcp_receive+0x888>)
 801dfb6:	691b      	ldr	r3, [r3, #16]
 801dfb8:	4322      	orrs	r2, r4
 801dfba:	b292      	uxth	r2, r2
 801dfbc:	819a      	strh	r2, [r3, #12]
                tcplen = TCP_TCPLEN(&inseg);
 801dfbe:	4b09      	ldr	r3, [pc, #36]	@ (801dfe4 <tcp_receive+0x888>)
 801dfc0:	891c      	ldrh	r4, [r3, #8]
 801dfc2:	4b08      	ldr	r3, [pc, #32]	@ (801dfe4 <tcp_receive+0x888>)
 801dfc4:	691b      	ldr	r3, [r3, #16]
 801dfc6:	899b      	ldrh	r3, [r3, #12]
 801dfc8:	b29b      	uxth	r3, r3
 801dfca:	4618      	mov	r0, r3
 801dfcc:	f7fa fb44 	bl	8018658 <lwip_htons>
 801dfd0:	4603      	mov	r3, r0
 801dfd2:	b2db      	uxtb	r3, r3
 801dfd4:	f003 0303 	and.w	r3, r3, #3
 801dfd8:	2b00      	cmp	r3, #0
 801dfda:	d00d      	beq.n	801dff8 <tcp_receive+0x89c>
 801dfdc:	2301      	movs	r3, #1
 801dfde:	e00c      	b.n	801dffa <tcp_receive+0x89e>
 801dfe0:	2402a028 	.word	0x2402a028
 801dfe4:	2402a004 	.word	0x2402a004
 801dfe8:	2402a032 	.word	0x2402a032
 801dfec:	0802e8a4 	.word	0x0802e8a4
 801dff0:	0802ec4c 	.word	0x0802ec4c
 801dff4:	0802e8f0 	.word	0x0802e8f0
 801dff8:	2300      	movs	r3, #0
 801dffa:	4423      	add	r3, r4
 801dffc:	b29a      	uxth	r2, r3
 801dffe:	4b98      	ldr	r3, [pc, #608]	@ (801e260 <tcp_receive+0xb04>)
 801e000:	801a      	strh	r2, [r3, #0]
              }
              tmp = next;
 801e002:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801e004:	613b      	str	r3, [r7, #16]
              next = next->next;
 801e006:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801e008:	681b      	ldr	r3, [r3, #0]
 801e00a:	63fb      	str	r3, [r7, #60]	@ 0x3c
              tcp_seg_free(tmp);
 801e00c:	6938      	ldr	r0, [r7, #16]
 801e00e:	f7fd fc5e 	bl	801b8ce <tcp_seg_free>
            while (next &&
 801e012:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801e014:	2b00      	cmp	r3, #0
 801e016:	d00e      	beq.n	801e036 <tcp_receive+0x8da>
                   TCP_SEQ_GEQ(seqno + tcplen,
 801e018:	4b91      	ldr	r3, [pc, #580]	@ (801e260 <tcp_receive+0xb04>)
 801e01a:	881b      	ldrh	r3, [r3, #0]
 801e01c:	461a      	mov	r2, r3
 801e01e:	4b91      	ldr	r3, [pc, #580]	@ (801e264 <tcp_receive+0xb08>)
 801e020:	681b      	ldr	r3, [r3, #0]
 801e022:	441a      	add	r2, r3
 801e024:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801e026:	691b      	ldr	r3, [r3, #16]
 801e028:	685b      	ldr	r3, [r3, #4]
 801e02a:	6bf9      	ldr	r1, [r7, #60]	@ 0x3c
 801e02c:	8909      	ldrh	r1, [r1, #8]
 801e02e:	440b      	add	r3, r1
 801e030:	1ad3      	subs	r3, r2, r3
            while (next &&
 801e032:	2b00      	cmp	r3, #0
 801e034:	da9b      	bge.n	801df6e <tcp_receive+0x812>
            }
            /* Now trim right side of inseg if it overlaps with the first
             * segment on ooseq */
            if (next &&
 801e036:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801e038:	2b00      	cmp	r3, #0
 801e03a:	d059      	beq.n	801e0f0 <tcp_receive+0x994>
                TCP_SEQ_GT(seqno + tcplen,
 801e03c:	4b88      	ldr	r3, [pc, #544]	@ (801e260 <tcp_receive+0xb04>)
 801e03e:	881b      	ldrh	r3, [r3, #0]
 801e040:	461a      	mov	r2, r3
 801e042:	4b88      	ldr	r3, [pc, #544]	@ (801e264 <tcp_receive+0xb08>)
 801e044:	681b      	ldr	r3, [r3, #0]
 801e046:	441a      	add	r2, r3
 801e048:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801e04a:	691b      	ldr	r3, [r3, #16]
 801e04c:	685b      	ldr	r3, [r3, #4]
 801e04e:	1ad3      	subs	r3, r2, r3
            if (next &&
 801e050:	2b00      	cmp	r3, #0
 801e052:	dd4d      	ble.n	801e0f0 <tcp_receive+0x994>
                           next->tcphdr->seqno)) {
              /* inseg cannot have FIN here (already processed above) */
              inseg.len = (u16_t)(next->tcphdr->seqno - seqno);
 801e054:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801e056:	691b      	ldr	r3, [r3, #16]
 801e058:	685b      	ldr	r3, [r3, #4]
 801e05a:	b29a      	uxth	r2, r3
 801e05c:	4b81      	ldr	r3, [pc, #516]	@ (801e264 <tcp_receive+0xb08>)
 801e05e:	681b      	ldr	r3, [r3, #0]
 801e060:	b29b      	uxth	r3, r3
 801e062:	1ad3      	subs	r3, r2, r3
 801e064:	b29a      	uxth	r2, r3
 801e066:	4b80      	ldr	r3, [pc, #512]	@ (801e268 <tcp_receive+0xb0c>)
 801e068:	811a      	strh	r2, [r3, #8]
              if (TCPH_FLAGS(inseg.tcphdr) & TCP_SYN) {
 801e06a:	4b7f      	ldr	r3, [pc, #508]	@ (801e268 <tcp_receive+0xb0c>)
 801e06c:	691b      	ldr	r3, [r3, #16]
 801e06e:	899b      	ldrh	r3, [r3, #12]
 801e070:	b29b      	uxth	r3, r3
 801e072:	4618      	mov	r0, r3
 801e074:	f7fa faf0 	bl	8018658 <lwip_htons>
 801e078:	4603      	mov	r3, r0
 801e07a:	b2db      	uxtb	r3, r3
 801e07c:	f003 0302 	and.w	r3, r3, #2
 801e080:	2b00      	cmp	r3, #0
 801e082:	d005      	beq.n	801e090 <tcp_receive+0x934>
                inseg.len -= 1;
 801e084:	4b78      	ldr	r3, [pc, #480]	@ (801e268 <tcp_receive+0xb0c>)
 801e086:	891b      	ldrh	r3, [r3, #8]
 801e088:	3b01      	subs	r3, #1
 801e08a:	b29a      	uxth	r2, r3
 801e08c:	4b76      	ldr	r3, [pc, #472]	@ (801e268 <tcp_receive+0xb0c>)
 801e08e:	811a      	strh	r2, [r3, #8]
              }
              pbuf_realloc(inseg.p, inseg.len);
 801e090:	4b75      	ldr	r3, [pc, #468]	@ (801e268 <tcp_receive+0xb0c>)
 801e092:	685b      	ldr	r3, [r3, #4]
 801e094:	4a74      	ldr	r2, [pc, #464]	@ (801e268 <tcp_receive+0xb0c>)
 801e096:	8912      	ldrh	r2, [r2, #8]
 801e098:	4611      	mov	r1, r2
 801e09a:	4618      	mov	r0, r3
 801e09c:	f7fb fe08 	bl	8019cb0 <pbuf_realloc>
              tcplen = TCP_TCPLEN(&inseg);
 801e0a0:	4b71      	ldr	r3, [pc, #452]	@ (801e268 <tcp_receive+0xb0c>)
 801e0a2:	891c      	ldrh	r4, [r3, #8]
 801e0a4:	4b70      	ldr	r3, [pc, #448]	@ (801e268 <tcp_receive+0xb0c>)
 801e0a6:	691b      	ldr	r3, [r3, #16]
 801e0a8:	899b      	ldrh	r3, [r3, #12]
 801e0aa:	b29b      	uxth	r3, r3
 801e0ac:	4618      	mov	r0, r3
 801e0ae:	f7fa fad3 	bl	8018658 <lwip_htons>
 801e0b2:	4603      	mov	r3, r0
 801e0b4:	b2db      	uxtb	r3, r3
 801e0b6:	f003 0303 	and.w	r3, r3, #3
 801e0ba:	2b00      	cmp	r3, #0
 801e0bc:	d001      	beq.n	801e0c2 <tcp_receive+0x966>
 801e0be:	2301      	movs	r3, #1
 801e0c0:	e000      	b.n	801e0c4 <tcp_receive+0x968>
 801e0c2:	2300      	movs	r3, #0
 801e0c4:	4423      	add	r3, r4
 801e0c6:	b29a      	uxth	r2, r3
 801e0c8:	4b65      	ldr	r3, [pc, #404]	@ (801e260 <tcp_receive+0xb04>)
 801e0ca:	801a      	strh	r2, [r3, #0]
              LWIP_ASSERT("tcp_receive: segment not trimmed correctly to ooseq queue\n",
 801e0cc:	4b64      	ldr	r3, [pc, #400]	@ (801e260 <tcp_receive+0xb04>)
 801e0ce:	881b      	ldrh	r3, [r3, #0]
 801e0d0:	461a      	mov	r2, r3
 801e0d2:	4b64      	ldr	r3, [pc, #400]	@ (801e264 <tcp_receive+0xb08>)
 801e0d4:	681b      	ldr	r3, [r3, #0]
 801e0d6:	441a      	add	r2, r3
 801e0d8:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801e0da:	691b      	ldr	r3, [r3, #16]
 801e0dc:	685b      	ldr	r3, [r3, #4]
 801e0de:	429a      	cmp	r2, r3
 801e0e0:	d006      	beq.n	801e0f0 <tcp_receive+0x994>
 801e0e2:	4b62      	ldr	r3, [pc, #392]	@ (801e26c <tcp_receive+0xb10>)
 801e0e4:	f240 52fc 	movw	r2, #1532	@ 0x5fc
 801e0e8:	4961      	ldr	r1, [pc, #388]	@ (801e270 <tcp_receive+0xb14>)
 801e0ea:	4862      	ldr	r0, [pc, #392]	@ (801e274 <tcp_receive+0xb18>)
 801e0ec:	f00b fa0e 	bl	802950c <iprintf>
                          (seqno + tcplen) == next->tcphdr->seqno);
            }
            pcb->ooseq = next;
 801e0f0:	687b      	ldr	r3, [r7, #4]
 801e0f2:	6bfa      	ldr	r2, [r7, #60]	@ 0x3c
 801e0f4:	675a      	str	r2, [r3, #116]	@ 0x74
          }
        }
#endif /* TCP_QUEUE_OOSEQ */

        pcb->rcv_nxt = seqno + tcplen;
 801e0f6:	4b5a      	ldr	r3, [pc, #360]	@ (801e260 <tcp_receive+0xb04>)
 801e0f8:	881b      	ldrh	r3, [r3, #0]
 801e0fa:	461a      	mov	r2, r3
 801e0fc:	4b59      	ldr	r3, [pc, #356]	@ (801e264 <tcp_receive+0xb08>)
 801e0fe:	681b      	ldr	r3, [r3, #0]
 801e100:	441a      	add	r2, r3
 801e102:	687b      	ldr	r3, [r7, #4]
 801e104:	625a      	str	r2, [r3, #36]	@ 0x24

        /* Update the receiver's (our) window. */
        LWIP_ASSERT("tcp_receive: tcplen > rcv_wnd\n", pcb->rcv_wnd >= tcplen);
 801e106:	687b      	ldr	r3, [r7, #4]
 801e108:	8d1a      	ldrh	r2, [r3, #40]	@ 0x28
 801e10a:	4b55      	ldr	r3, [pc, #340]	@ (801e260 <tcp_receive+0xb04>)
 801e10c:	881b      	ldrh	r3, [r3, #0]
 801e10e:	429a      	cmp	r2, r3
 801e110:	d206      	bcs.n	801e120 <tcp_receive+0x9c4>
 801e112:	4b56      	ldr	r3, [pc, #344]	@ (801e26c <tcp_receive+0xb10>)
 801e114:	f240 6207 	movw	r2, #1543	@ 0x607
 801e118:	4957      	ldr	r1, [pc, #348]	@ (801e278 <tcp_receive+0xb1c>)
 801e11a:	4856      	ldr	r0, [pc, #344]	@ (801e274 <tcp_receive+0xb18>)
 801e11c:	f00b f9f6 	bl	802950c <iprintf>
        pcb->rcv_wnd -= tcplen;
 801e120:	687b      	ldr	r3, [r7, #4]
 801e122:	8d1a      	ldrh	r2, [r3, #40]	@ 0x28
 801e124:	4b4e      	ldr	r3, [pc, #312]	@ (801e260 <tcp_receive+0xb04>)
 801e126:	881b      	ldrh	r3, [r3, #0]
 801e128:	1ad3      	subs	r3, r2, r3
 801e12a:	b29a      	uxth	r2, r3
 801e12c:	687b      	ldr	r3, [r7, #4]
 801e12e:	851a      	strh	r2, [r3, #40]	@ 0x28

        tcp_update_rcv_ann_wnd(pcb);
 801e130:	6878      	ldr	r0, [r7, #4]
 801e132:	f7fc fd85 	bl	801ac40 <tcp_update_rcv_ann_wnd>
           chains its data on this pbuf as well.

           If the segment was a FIN, we set the TF_GOT_FIN flag that will
           be used to indicate to the application that the remote side has
           closed its end of the connection. */
        if (inseg.p->tot_len > 0) {
 801e136:	4b4c      	ldr	r3, [pc, #304]	@ (801e268 <tcp_receive+0xb0c>)
 801e138:	685b      	ldr	r3, [r3, #4]
 801e13a:	891b      	ldrh	r3, [r3, #8]
 801e13c:	2b00      	cmp	r3, #0
 801e13e:	d006      	beq.n	801e14e <tcp_receive+0x9f2>
          recv_data = inseg.p;
 801e140:	4b49      	ldr	r3, [pc, #292]	@ (801e268 <tcp_receive+0xb0c>)
 801e142:	685b      	ldr	r3, [r3, #4]
 801e144:	4a4d      	ldr	r2, [pc, #308]	@ (801e27c <tcp_receive+0xb20>)
 801e146:	6013      	str	r3, [r2, #0]
          /* Since this pbuf now is the responsibility of the
             application, we delete our reference to it so that we won't
             (mistakingly) deallocate it. */
          inseg.p = NULL;
 801e148:	4b47      	ldr	r3, [pc, #284]	@ (801e268 <tcp_receive+0xb0c>)
 801e14a:	2200      	movs	r2, #0
 801e14c:	605a      	str	r2, [r3, #4]
        }
        if (TCPH_FLAGS(inseg.tcphdr) & TCP_FIN) {
 801e14e:	4b46      	ldr	r3, [pc, #280]	@ (801e268 <tcp_receive+0xb0c>)
 801e150:	691b      	ldr	r3, [r3, #16]
 801e152:	899b      	ldrh	r3, [r3, #12]
 801e154:	b29b      	uxth	r3, r3
 801e156:	4618      	mov	r0, r3
 801e158:	f7fa fa7e 	bl	8018658 <lwip_htons>
 801e15c:	4603      	mov	r3, r0
 801e15e:	b2db      	uxtb	r3, r3
 801e160:	f003 0301 	and.w	r3, r3, #1
 801e164:	2b00      	cmp	r3, #0
 801e166:	f000 80b8 	beq.w	801e2da <tcp_receive+0xb7e>
          LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: received FIN.\n"));
          recv_flags |= TF_GOT_FIN;
 801e16a:	4b45      	ldr	r3, [pc, #276]	@ (801e280 <tcp_receive+0xb24>)
 801e16c:	781b      	ldrb	r3, [r3, #0]
 801e16e:	f043 0320 	orr.w	r3, r3, #32
 801e172:	b2da      	uxtb	r2, r3
 801e174:	4b42      	ldr	r3, [pc, #264]	@ (801e280 <tcp_receive+0xb24>)
 801e176:	701a      	strb	r2, [r3, #0]
        }

#if TCP_QUEUE_OOSEQ
        /* We now check if we have segments on the ->ooseq queue that
           are now in sequence. */
        while (pcb->ooseq != NULL &&
 801e178:	e0af      	b.n	801e2da <tcp_receive+0xb7e>
               pcb->ooseq->tcphdr->seqno == pcb->rcv_nxt) {

          struct tcp_seg *cseg = pcb->ooseq;
 801e17a:	687b      	ldr	r3, [r7, #4]
 801e17c:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801e17e:	60bb      	str	r3, [r7, #8]
          seqno = pcb->ooseq->tcphdr->seqno;
 801e180:	687b      	ldr	r3, [r7, #4]
 801e182:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801e184:	691b      	ldr	r3, [r3, #16]
 801e186:	685b      	ldr	r3, [r3, #4]
 801e188:	4a36      	ldr	r2, [pc, #216]	@ (801e264 <tcp_receive+0xb08>)
 801e18a:	6013      	str	r3, [r2, #0]

          pcb->rcv_nxt += TCP_TCPLEN(cseg);
 801e18c:	68bb      	ldr	r3, [r7, #8]
 801e18e:	891b      	ldrh	r3, [r3, #8]
 801e190:	461c      	mov	r4, r3
 801e192:	68bb      	ldr	r3, [r7, #8]
 801e194:	691b      	ldr	r3, [r3, #16]
 801e196:	899b      	ldrh	r3, [r3, #12]
 801e198:	b29b      	uxth	r3, r3
 801e19a:	4618      	mov	r0, r3
 801e19c:	f7fa fa5c 	bl	8018658 <lwip_htons>
 801e1a0:	4603      	mov	r3, r0
 801e1a2:	b2db      	uxtb	r3, r3
 801e1a4:	f003 0303 	and.w	r3, r3, #3
 801e1a8:	2b00      	cmp	r3, #0
 801e1aa:	d001      	beq.n	801e1b0 <tcp_receive+0xa54>
 801e1ac:	2301      	movs	r3, #1
 801e1ae:	e000      	b.n	801e1b2 <tcp_receive+0xa56>
 801e1b0:	2300      	movs	r3, #0
 801e1b2:	191a      	adds	r2, r3, r4
 801e1b4:	687b      	ldr	r3, [r7, #4]
 801e1b6:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801e1b8:	441a      	add	r2, r3
 801e1ba:	687b      	ldr	r3, [r7, #4]
 801e1bc:	625a      	str	r2, [r3, #36]	@ 0x24
          LWIP_ASSERT("tcp_receive: ooseq tcplen > rcv_wnd\n",
 801e1be:	687b      	ldr	r3, [r7, #4]
 801e1c0:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 801e1c2:	461c      	mov	r4, r3
 801e1c4:	68bb      	ldr	r3, [r7, #8]
 801e1c6:	891b      	ldrh	r3, [r3, #8]
 801e1c8:	461d      	mov	r5, r3
 801e1ca:	68bb      	ldr	r3, [r7, #8]
 801e1cc:	691b      	ldr	r3, [r3, #16]
 801e1ce:	899b      	ldrh	r3, [r3, #12]
 801e1d0:	b29b      	uxth	r3, r3
 801e1d2:	4618      	mov	r0, r3
 801e1d4:	f7fa fa40 	bl	8018658 <lwip_htons>
 801e1d8:	4603      	mov	r3, r0
 801e1da:	b2db      	uxtb	r3, r3
 801e1dc:	f003 0303 	and.w	r3, r3, #3
 801e1e0:	2b00      	cmp	r3, #0
 801e1e2:	d001      	beq.n	801e1e8 <tcp_receive+0xa8c>
 801e1e4:	2301      	movs	r3, #1
 801e1e6:	e000      	b.n	801e1ea <tcp_receive+0xa8e>
 801e1e8:	2300      	movs	r3, #0
 801e1ea:	442b      	add	r3, r5
 801e1ec:	429c      	cmp	r4, r3
 801e1ee:	d206      	bcs.n	801e1fe <tcp_receive+0xaa2>
 801e1f0:	4b1e      	ldr	r3, [pc, #120]	@ (801e26c <tcp_receive+0xb10>)
 801e1f2:	f240 622b 	movw	r2, #1579	@ 0x62b
 801e1f6:	4923      	ldr	r1, [pc, #140]	@ (801e284 <tcp_receive+0xb28>)
 801e1f8:	481e      	ldr	r0, [pc, #120]	@ (801e274 <tcp_receive+0xb18>)
 801e1fa:	f00b f987 	bl	802950c <iprintf>
                      pcb->rcv_wnd >= TCP_TCPLEN(cseg));
          pcb->rcv_wnd -= TCP_TCPLEN(cseg);
 801e1fe:	68bb      	ldr	r3, [r7, #8]
 801e200:	891b      	ldrh	r3, [r3, #8]
 801e202:	461c      	mov	r4, r3
 801e204:	68bb      	ldr	r3, [r7, #8]
 801e206:	691b      	ldr	r3, [r3, #16]
 801e208:	899b      	ldrh	r3, [r3, #12]
 801e20a:	b29b      	uxth	r3, r3
 801e20c:	4618      	mov	r0, r3
 801e20e:	f7fa fa23 	bl	8018658 <lwip_htons>
 801e212:	4603      	mov	r3, r0
 801e214:	b2db      	uxtb	r3, r3
 801e216:	f003 0303 	and.w	r3, r3, #3
 801e21a:	2b00      	cmp	r3, #0
 801e21c:	d001      	beq.n	801e222 <tcp_receive+0xac6>
 801e21e:	2301      	movs	r3, #1
 801e220:	e000      	b.n	801e224 <tcp_receive+0xac8>
 801e222:	2300      	movs	r3, #0
 801e224:	1919      	adds	r1, r3, r4
 801e226:	687b      	ldr	r3, [r7, #4]
 801e228:	8d1a      	ldrh	r2, [r3, #40]	@ 0x28
 801e22a:	b28b      	uxth	r3, r1
 801e22c:	1ad3      	subs	r3, r2, r3
 801e22e:	b29a      	uxth	r2, r3
 801e230:	687b      	ldr	r3, [r7, #4]
 801e232:	851a      	strh	r2, [r3, #40]	@ 0x28

          tcp_update_rcv_ann_wnd(pcb);
 801e234:	6878      	ldr	r0, [r7, #4]
 801e236:	f7fc fd03 	bl	801ac40 <tcp_update_rcv_ann_wnd>

          if (cseg->p->tot_len > 0) {
 801e23a:	68bb      	ldr	r3, [r7, #8]
 801e23c:	685b      	ldr	r3, [r3, #4]
 801e23e:	891b      	ldrh	r3, [r3, #8]
 801e240:	2b00      	cmp	r3, #0
 801e242:	d028      	beq.n	801e296 <tcp_receive+0xb3a>
            /* Chain this pbuf onto the pbuf that we will pass to
               the application. */
            /* With window scaling, this can overflow recv_data->tot_len, but
               that's not a problem since we explicitly fix that before passing
               recv_data to the application. */
            if (recv_data) {
 801e244:	4b0d      	ldr	r3, [pc, #52]	@ (801e27c <tcp_receive+0xb20>)
 801e246:	681b      	ldr	r3, [r3, #0]
 801e248:	2b00      	cmp	r3, #0
 801e24a:	d01d      	beq.n	801e288 <tcp_receive+0xb2c>
              pbuf_cat(recv_data, cseg->p);
 801e24c:	4b0b      	ldr	r3, [pc, #44]	@ (801e27c <tcp_receive+0xb20>)
 801e24e:	681a      	ldr	r2, [r3, #0]
 801e250:	68bb      	ldr	r3, [r7, #8]
 801e252:	685b      	ldr	r3, [r3, #4]
 801e254:	4619      	mov	r1, r3
 801e256:	4610      	mov	r0, r2
 801e258:	f7fb ffae 	bl	801a1b8 <pbuf_cat>
 801e25c:	e018      	b.n	801e290 <tcp_receive+0xb34>
 801e25e:	bf00      	nop
 801e260:	2402a032 	.word	0x2402a032
 801e264:	2402a028 	.word	0x2402a028
 801e268:	2402a004 	.word	0x2402a004
 801e26c:	0802e8a4 	.word	0x0802e8a4
 801e270:	0802ec84 	.word	0x0802ec84
 801e274:	0802e8f0 	.word	0x0802e8f0
 801e278:	0802ecc0 	.word	0x0802ecc0
 801e27c:	2402a038 	.word	0x2402a038
 801e280:	2402a035 	.word	0x2402a035
 801e284:	0802ece0 	.word	0x0802ece0
            } else {
              recv_data = cseg->p;
 801e288:	68bb      	ldr	r3, [r7, #8]
 801e28a:	685b      	ldr	r3, [r3, #4]
 801e28c:	4a70      	ldr	r2, [pc, #448]	@ (801e450 <tcp_receive+0xcf4>)
 801e28e:	6013      	str	r3, [r2, #0]
            }
            cseg->p = NULL;
 801e290:	68bb      	ldr	r3, [r7, #8]
 801e292:	2200      	movs	r2, #0
 801e294:	605a      	str	r2, [r3, #4]
          }
          if (TCPH_FLAGS(cseg->tcphdr) & TCP_FIN) {
 801e296:	68bb      	ldr	r3, [r7, #8]
 801e298:	691b      	ldr	r3, [r3, #16]
 801e29a:	899b      	ldrh	r3, [r3, #12]
 801e29c:	b29b      	uxth	r3, r3
 801e29e:	4618      	mov	r0, r3
 801e2a0:	f7fa f9da 	bl	8018658 <lwip_htons>
 801e2a4:	4603      	mov	r3, r0
 801e2a6:	b2db      	uxtb	r3, r3
 801e2a8:	f003 0301 	and.w	r3, r3, #1
 801e2ac:	2b00      	cmp	r3, #0
 801e2ae:	d00d      	beq.n	801e2cc <tcp_receive+0xb70>
            LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: dequeued FIN.\n"));
            recv_flags |= TF_GOT_FIN;
 801e2b0:	4b68      	ldr	r3, [pc, #416]	@ (801e454 <tcp_receive+0xcf8>)
 801e2b2:	781b      	ldrb	r3, [r3, #0]
 801e2b4:	f043 0320 	orr.w	r3, r3, #32
 801e2b8:	b2da      	uxtb	r2, r3
 801e2ba:	4b66      	ldr	r3, [pc, #408]	@ (801e454 <tcp_receive+0xcf8>)
 801e2bc:	701a      	strb	r2, [r3, #0]
            if (pcb->state == ESTABLISHED) { /* force passive close or we can move to active close */
 801e2be:	687b      	ldr	r3, [r7, #4]
 801e2c0:	7d1b      	ldrb	r3, [r3, #20]
 801e2c2:	2b04      	cmp	r3, #4
 801e2c4:	d102      	bne.n	801e2cc <tcp_receive+0xb70>
              pcb->state = CLOSE_WAIT;
 801e2c6:	687b      	ldr	r3, [r7, #4]
 801e2c8:	2207      	movs	r2, #7
 801e2ca:	751a      	strb	r2, [r3, #20]
            }
          }

          pcb->ooseq = cseg->next;
 801e2cc:	68bb      	ldr	r3, [r7, #8]
 801e2ce:	681a      	ldr	r2, [r3, #0]
 801e2d0:	687b      	ldr	r3, [r7, #4]
 801e2d2:	675a      	str	r2, [r3, #116]	@ 0x74
          tcp_seg_free(cseg);
 801e2d4:	68b8      	ldr	r0, [r7, #8]
 801e2d6:	f7fd fafa 	bl	801b8ce <tcp_seg_free>
        while (pcb->ooseq != NULL &&
 801e2da:	687b      	ldr	r3, [r7, #4]
 801e2dc:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801e2de:	2b00      	cmp	r3, #0
 801e2e0:	d008      	beq.n	801e2f4 <tcp_receive+0xb98>
               pcb->ooseq->tcphdr->seqno == pcb->rcv_nxt) {
 801e2e2:	687b      	ldr	r3, [r7, #4]
 801e2e4:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801e2e6:	691b      	ldr	r3, [r3, #16]
 801e2e8:	685a      	ldr	r2, [r3, #4]
 801e2ea:	687b      	ldr	r3, [r7, #4]
 801e2ec:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
        while (pcb->ooseq != NULL &&
 801e2ee:	429a      	cmp	r2, r3
 801e2f0:	f43f af43 	beq.w	801e17a <tcp_receive+0xa1e>
#endif /* LWIP_TCP_SACK_OUT */
#endif /* TCP_QUEUE_OOSEQ */


        /* Acknowledge the segment(s). */
        tcp_ack(pcb);
 801e2f4:	687b      	ldr	r3, [r7, #4]
 801e2f6:	8b5b      	ldrh	r3, [r3, #26]
 801e2f8:	f003 0301 	and.w	r3, r3, #1
 801e2fc:	2b00      	cmp	r3, #0
 801e2fe:	d00e      	beq.n	801e31e <tcp_receive+0xbc2>
 801e300:	687b      	ldr	r3, [r7, #4]
 801e302:	8b5b      	ldrh	r3, [r3, #26]
 801e304:	f023 0301 	bic.w	r3, r3, #1
 801e308:	b29a      	uxth	r2, r3
 801e30a:	687b      	ldr	r3, [r7, #4]
 801e30c:	835a      	strh	r2, [r3, #26]
 801e30e:	687b      	ldr	r3, [r7, #4]
 801e310:	8b5b      	ldrh	r3, [r3, #26]
 801e312:	f043 0302 	orr.w	r3, r3, #2
 801e316:	b29a      	uxth	r2, r3
 801e318:	687b      	ldr	r3, [r7, #4]
 801e31a:	835a      	strh	r2, [r3, #26]
      if (pcb->rcv_nxt == seqno) {
 801e31c:	e187      	b.n	801e62e <tcp_receive+0xed2>
        tcp_ack(pcb);
 801e31e:	687b      	ldr	r3, [r7, #4]
 801e320:	8b5b      	ldrh	r3, [r3, #26]
 801e322:	f043 0301 	orr.w	r3, r3, #1
 801e326:	b29a      	uxth	r2, r3
 801e328:	687b      	ldr	r3, [r7, #4]
 801e32a:	835a      	strh	r2, [r3, #26]
      if (pcb->rcv_nxt == seqno) {
 801e32c:	e17f      	b.n	801e62e <tcp_receive+0xed2>
      } else {
        /* We get here if the incoming segment is out-of-sequence. */

#if TCP_QUEUE_OOSEQ
        /* We queue the segment on the ->ooseq queue. */
        if (pcb->ooseq == NULL) {
 801e32e:	687b      	ldr	r3, [r7, #4]
 801e330:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801e332:	2b00      	cmp	r3, #0
 801e334:	d106      	bne.n	801e344 <tcp_receive+0xbe8>
          pcb->ooseq = tcp_seg_copy(&inseg);
 801e336:	4848      	ldr	r0, [pc, #288]	@ (801e458 <tcp_receive+0xcfc>)
 801e338:	f7fd fae2 	bl	801b900 <tcp_seg_copy>
 801e33c:	4602      	mov	r2, r0
 801e33e:	687b      	ldr	r3, [r7, #4]
 801e340:	675a      	str	r2, [r3, #116]	@ 0x74
 801e342:	e16c      	b.n	801e61e <tcp_receive+0xec2>
#if LWIP_TCP_SACK_OUT
          /* This is the left edge of the lowest possible SACK range.
             It may start before the newly received segment (possibly adjusted below). */
          u32_t sackbeg = TCP_SEQ_LT(seqno, pcb->ooseq->tcphdr->seqno) ? seqno : pcb->ooseq->tcphdr->seqno;
#endif /* LWIP_TCP_SACK_OUT */
          struct tcp_seg *next, *prev = NULL;
 801e344:	2300      	movs	r3, #0
 801e346:	637b      	str	r3, [r7, #52]	@ 0x34
          for (next = pcb->ooseq; next != NULL; next = next->next) {
 801e348:	687b      	ldr	r3, [r7, #4]
 801e34a:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801e34c:	63bb      	str	r3, [r7, #56]	@ 0x38
 801e34e:	e156      	b.n	801e5fe <tcp_receive+0xea2>
            if (seqno == next->tcphdr->seqno) {
 801e350:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801e352:	691b      	ldr	r3, [r3, #16]
 801e354:	685a      	ldr	r2, [r3, #4]
 801e356:	4b41      	ldr	r3, [pc, #260]	@ (801e45c <tcp_receive+0xd00>)
 801e358:	681b      	ldr	r3, [r3, #0]
 801e35a:	429a      	cmp	r2, r3
 801e35c:	d11d      	bne.n	801e39a <tcp_receive+0xc3e>
              /* The sequence number of the incoming segment is the
                 same as the sequence number of the segment on
                 ->ooseq. We check the lengths to see which one to
                 discard. */
              if (inseg.len > next->len) {
 801e35e:	4b3e      	ldr	r3, [pc, #248]	@ (801e458 <tcp_receive+0xcfc>)
 801e360:	891a      	ldrh	r2, [r3, #8]
 801e362:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801e364:	891b      	ldrh	r3, [r3, #8]
 801e366:	429a      	cmp	r2, r3
 801e368:	f240 814e 	bls.w	801e608 <tcp_receive+0xeac>
                /* The incoming segment is larger than the old
                   segment. We replace some segments with the new
                   one. */
                struct tcp_seg *cseg = tcp_seg_copy(&inseg);
 801e36c:	483a      	ldr	r0, [pc, #232]	@ (801e458 <tcp_receive+0xcfc>)
 801e36e:	f7fd fac7 	bl	801b900 <tcp_seg_copy>
 801e372:	6178      	str	r0, [r7, #20]
                if (cseg != NULL) {
 801e374:	697b      	ldr	r3, [r7, #20]
 801e376:	2b00      	cmp	r3, #0
 801e378:	f000 8148 	beq.w	801e60c <tcp_receive+0xeb0>
                  if (prev != NULL) {
 801e37c:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 801e37e:	2b00      	cmp	r3, #0
 801e380:	d003      	beq.n	801e38a <tcp_receive+0xc2e>
                    prev->next = cseg;
 801e382:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 801e384:	697a      	ldr	r2, [r7, #20]
 801e386:	601a      	str	r2, [r3, #0]
 801e388:	e002      	b.n	801e390 <tcp_receive+0xc34>
                  } else {
                    pcb->ooseq = cseg;
 801e38a:	687b      	ldr	r3, [r7, #4]
 801e38c:	697a      	ldr	r2, [r7, #20]
 801e38e:	675a      	str	r2, [r3, #116]	@ 0x74
                  }
                  tcp_oos_insert_segment(cseg, next);
 801e390:	6bb9      	ldr	r1, [r7, #56]	@ 0x38
 801e392:	6978      	ldr	r0, [r7, #20]
 801e394:	f7ff f8de 	bl	801d554 <tcp_oos_insert_segment>
                }
                break;
 801e398:	e138      	b.n	801e60c <tcp_receive+0xeb0>
                   segment was smaller than the old one; in either
                   case, we ditch the incoming segment. */
                break;
              }
            } else {
              if (prev == NULL) {
 801e39a:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 801e39c:	2b00      	cmp	r3, #0
 801e39e:	d117      	bne.n	801e3d0 <tcp_receive+0xc74>
                if (TCP_SEQ_LT(seqno, next->tcphdr->seqno)) {
 801e3a0:	4b2e      	ldr	r3, [pc, #184]	@ (801e45c <tcp_receive+0xd00>)
 801e3a2:	681a      	ldr	r2, [r3, #0]
 801e3a4:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801e3a6:	691b      	ldr	r3, [r3, #16]
 801e3a8:	685b      	ldr	r3, [r3, #4]
 801e3aa:	1ad3      	subs	r3, r2, r3
 801e3ac:	2b00      	cmp	r3, #0
 801e3ae:	da57      	bge.n	801e460 <tcp_receive+0xd04>
                  /* The sequence number of the incoming segment is lower
                     than the sequence number of the first segment on the
                     queue. We put the incoming segment first on the
                     queue. */
                  struct tcp_seg *cseg = tcp_seg_copy(&inseg);
 801e3b0:	4829      	ldr	r0, [pc, #164]	@ (801e458 <tcp_receive+0xcfc>)
 801e3b2:	f7fd faa5 	bl	801b900 <tcp_seg_copy>
 801e3b6:	61b8      	str	r0, [r7, #24]
                  if (cseg != NULL) {
 801e3b8:	69bb      	ldr	r3, [r7, #24]
 801e3ba:	2b00      	cmp	r3, #0
 801e3bc:	f000 8128 	beq.w	801e610 <tcp_receive+0xeb4>
                    pcb->ooseq = cseg;
 801e3c0:	687b      	ldr	r3, [r7, #4]
 801e3c2:	69ba      	ldr	r2, [r7, #24]
 801e3c4:	675a      	str	r2, [r3, #116]	@ 0x74
                    tcp_oos_insert_segment(cseg, next);
 801e3c6:	6bb9      	ldr	r1, [r7, #56]	@ 0x38
 801e3c8:	69b8      	ldr	r0, [r7, #24]
 801e3ca:	f7ff f8c3 	bl	801d554 <tcp_oos_insert_segment>
                  }
                  break;
 801e3ce:	e11f      	b.n	801e610 <tcp_receive+0xeb4>
                }
              } else {
                /*if (TCP_SEQ_LT(prev->tcphdr->seqno, seqno) &&
                  TCP_SEQ_LT(seqno, next->tcphdr->seqno)) {*/
                if (TCP_SEQ_BETWEEN(seqno, prev->tcphdr->seqno + 1, next->tcphdr->seqno - 1)) {
 801e3d0:	4b22      	ldr	r3, [pc, #136]	@ (801e45c <tcp_receive+0xd00>)
 801e3d2:	681a      	ldr	r2, [r3, #0]
 801e3d4:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 801e3d6:	691b      	ldr	r3, [r3, #16]
 801e3d8:	685b      	ldr	r3, [r3, #4]
 801e3da:	1ad3      	subs	r3, r2, r3
 801e3dc:	3b01      	subs	r3, #1
 801e3de:	2b00      	cmp	r3, #0
 801e3e0:	db3e      	blt.n	801e460 <tcp_receive+0xd04>
 801e3e2:	4b1e      	ldr	r3, [pc, #120]	@ (801e45c <tcp_receive+0xd00>)
 801e3e4:	681a      	ldr	r2, [r3, #0]
 801e3e6:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801e3e8:	691b      	ldr	r3, [r3, #16]
 801e3ea:	685b      	ldr	r3, [r3, #4]
 801e3ec:	1ad3      	subs	r3, r2, r3
 801e3ee:	3301      	adds	r3, #1
 801e3f0:	2b00      	cmp	r3, #0
 801e3f2:	dc35      	bgt.n	801e460 <tcp_receive+0xd04>
                  /* The sequence number of the incoming segment is in
                     between the sequence numbers of the previous and
                     the next segment on ->ooseq. We trim trim the previous
                     segment, delete next segments that included in received segment
                     and trim received, if needed. */
                  struct tcp_seg *cseg = tcp_seg_copy(&inseg);
 801e3f4:	4818      	ldr	r0, [pc, #96]	@ (801e458 <tcp_receive+0xcfc>)
 801e3f6:	f7fd fa83 	bl	801b900 <tcp_seg_copy>
 801e3fa:	61f8      	str	r0, [r7, #28]
                  if (cseg != NULL) {
 801e3fc:	69fb      	ldr	r3, [r7, #28]
 801e3fe:	2b00      	cmp	r3, #0
 801e400:	f000 8108 	beq.w	801e614 <tcp_receive+0xeb8>
                    if (TCP_SEQ_GT(prev->tcphdr->seqno + prev->len, seqno)) {
 801e404:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 801e406:	691b      	ldr	r3, [r3, #16]
 801e408:	685b      	ldr	r3, [r3, #4]
 801e40a:	6b7a      	ldr	r2, [r7, #52]	@ 0x34
 801e40c:	8912      	ldrh	r2, [r2, #8]
 801e40e:	441a      	add	r2, r3
 801e410:	4b12      	ldr	r3, [pc, #72]	@ (801e45c <tcp_receive+0xd00>)
 801e412:	681b      	ldr	r3, [r3, #0]
 801e414:	1ad3      	subs	r3, r2, r3
 801e416:	2b00      	cmp	r3, #0
 801e418:	dd12      	ble.n	801e440 <tcp_receive+0xce4>
                      /* We need to trim the prev segment. */
                      prev->len = (u16_t)(seqno - prev->tcphdr->seqno);
 801e41a:	4b10      	ldr	r3, [pc, #64]	@ (801e45c <tcp_receive+0xd00>)
 801e41c:	681b      	ldr	r3, [r3, #0]
 801e41e:	b29a      	uxth	r2, r3
 801e420:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 801e422:	691b      	ldr	r3, [r3, #16]
 801e424:	685b      	ldr	r3, [r3, #4]
 801e426:	b29b      	uxth	r3, r3
 801e428:	1ad3      	subs	r3, r2, r3
 801e42a:	b29a      	uxth	r2, r3
 801e42c:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 801e42e:	811a      	strh	r2, [r3, #8]
                      pbuf_realloc(prev->p, prev->len);
 801e430:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 801e432:	685a      	ldr	r2, [r3, #4]
 801e434:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 801e436:	891b      	ldrh	r3, [r3, #8]
 801e438:	4619      	mov	r1, r3
 801e43a:	4610      	mov	r0, r2
 801e43c:	f7fb fc38 	bl	8019cb0 <pbuf_realloc>
                    }
                    prev->next = cseg;
 801e440:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 801e442:	69fa      	ldr	r2, [r7, #28]
 801e444:	601a      	str	r2, [r3, #0]
                    tcp_oos_insert_segment(cseg, next);
 801e446:	6bb9      	ldr	r1, [r7, #56]	@ 0x38
 801e448:	69f8      	ldr	r0, [r7, #28]
 801e44a:	f7ff f883 	bl	801d554 <tcp_oos_insert_segment>
                  }
                  break;
 801e44e:	e0e1      	b.n	801e614 <tcp_receive+0xeb8>
 801e450:	2402a038 	.word	0x2402a038
 801e454:	2402a035 	.word	0x2402a035
 801e458:	2402a004 	.word	0x2402a004
 801e45c:	2402a028 	.word	0x2402a028
#endif /* LWIP_TCP_SACK_OUT */

              /* We don't use 'prev' below, so let's set it to current 'next'.
                 This way even if we break the loop below, 'prev' will be pointing
                 at the segment right in front of the newly added one. */
              prev = next;
 801e460:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801e462:	637b      	str	r3, [r7, #52]	@ 0x34

              /* If the "next" segment is the last segment on the
                 ooseq queue, we add the incoming segment to the end
                 of the list. */
              if (next->next == NULL &&
 801e464:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801e466:	681b      	ldr	r3, [r3, #0]
 801e468:	2b00      	cmp	r3, #0
 801e46a:	f040 80c5 	bne.w	801e5f8 <tcp_receive+0xe9c>
                  TCP_SEQ_GT(seqno, next->tcphdr->seqno)) {
 801e46e:	4b7f      	ldr	r3, [pc, #508]	@ (801e66c <tcp_receive+0xf10>)
 801e470:	681a      	ldr	r2, [r3, #0]
 801e472:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801e474:	691b      	ldr	r3, [r3, #16]
 801e476:	685b      	ldr	r3, [r3, #4]
 801e478:	1ad3      	subs	r3, r2, r3
              if (next->next == NULL &&
 801e47a:	2b00      	cmp	r3, #0
 801e47c:	f340 80bc 	ble.w	801e5f8 <tcp_receive+0xe9c>
                if (TCPH_FLAGS(next->tcphdr) & TCP_FIN) {
 801e480:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801e482:	691b      	ldr	r3, [r3, #16]
 801e484:	899b      	ldrh	r3, [r3, #12]
 801e486:	b29b      	uxth	r3, r3
 801e488:	4618      	mov	r0, r3
 801e48a:	f7fa f8e5 	bl	8018658 <lwip_htons>
 801e48e:	4603      	mov	r3, r0
 801e490:	b2db      	uxtb	r3, r3
 801e492:	f003 0301 	and.w	r3, r3, #1
 801e496:	2b00      	cmp	r3, #0
 801e498:	f040 80be 	bne.w	801e618 <tcp_receive+0xebc>
                  /* segment "next" already contains all data */
                  break;
                }
                next->next = tcp_seg_copy(&inseg);
 801e49c:	4874      	ldr	r0, [pc, #464]	@ (801e670 <tcp_receive+0xf14>)
 801e49e:	f7fd fa2f 	bl	801b900 <tcp_seg_copy>
 801e4a2:	4602      	mov	r2, r0
 801e4a4:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801e4a6:	601a      	str	r2, [r3, #0]
                if (next->next != NULL) {
 801e4a8:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801e4aa:	681b      	ldr	r3, [r3, #0]
 801e4ac:	2b00      	cmp	r3, #0
 801e4ae:	f000 80b5 	beq.w	801e61c <tcp_receive+0xec0>
                  if (TCP_SEQ_GT(next->tcphdr->seqno + next->len, seqno)) {
 801e4b2:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801e4b4:	691b      	ldr	r3, [r3, #16]
 801e4b6:	685b      	ldr	r3, [r3, #4]
 801e4b8:	6bba      	ldr	r2, [r7, #56]	@ 0x38
 801e4ba:	8912      	ldrh	r2, [r2, #8]
 801e4bc:	441a      	add	r2, r3
 801e4be:	4b6b      	ldr	r3, [pc, #428]	@ (801e66c <tcp_receive+0xf10>)
 801e4c0:	681b      	ldr	r3, [r3, #0]
 801e4c2:	1ad3      	subs	r3, r2, r3
 801e4c4:	2b00      	cmp	r3, #0
 801e4c6:	dd12      	ble.n	801e4ee <tcp_receive+0xd92>
                    /* We need to trim the last segment. */
                    next->len = (u16_t)(seqno - next->tcphdr->seqno);
 801e4c8:	4b68      	ldr	r3, [pc, #416]	@ (801e66c <tcp_receive+0xf10>)
 801e4ca:	681b      	ldr	r3, [r3, #0]
 801e4cc:	b29a      	uxth	r2, r3
 801e4ce:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801e4d0:	691b      	ldr	r3, [r3, #16]
 801e4d2:	685b      	ldr	r3, [r3, #4]
 801e4d4:	b29b      	uxth	r3, r3
 801e4d6:	1ad3      	subs	r3, r2, r3
 801e4d8:	b29a      	uxth	r2, r3
 801e4da:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801e4dc:	811a      	strh	r2, [r3, #8]
                    pbuf_realloc(next->p, next->len);
 801e4de:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801e4e0:	685a      	ldr	r2, [r3, #4]
 801e4e2:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801e4e4:	891b      	ldrh	r3, [r3, #8]
 801e4e6:	4619      	mov	r1, r3
 801e4e8:	4610      	mov	r0, r2
 801e4ea:	f7fb fbe1 	bl	8019cb0 <pbuf_realloc>
                  }
                  /* check if the remote side overruns our receive window */
                  if (TCP_SEQ_GT((u32_t)tcplen + seqno, pcb->rcv_nxt + (u32_t)pcb->rcv_wnd)) {
 801e4ee:	4b61      	ldr	r3, [pc, #388]	@ (801e674 <tcp_receive+0xf18>)
 801e4f0:	881b      	ldrh	r3, [r3, #0]
 801e4f2:	461a      	mov	r2, r3
 801e4f4:	4b5d      	ldr	r3, [pc, #372]	@ (801e66c <tcp_receive+0xf10>)
 801e4f6:	681b      	ldr	r3, [r3, #0]
 801e4f8:	441a      	add	r2, r3
 801e4fa:	687b      	ldr	r3, [r7, #4]
 801e4fc:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801e4fe:	6879      	ldr	r1, [r7, #4]
 801e500:	8d09      	ldrh	r1, [r1, #40]	@ 0x28
 801e502:	440b      	add	r3, r1
 801e504:	1ad3      	subs	r3, r2, r3
 801e506:	2b00      	cmp	r3, #0
 801e508:	f340 8088 	ble.w	801e61c <tcp_receive+0xec0>
                    LWIP_DEBUGF(TCP_INPUT_DEBUG,
                                ("tcp_receive: other end overran receive window"
                                 "seqno %"U32_F" len %"U16_F" right edge %"U32_F"\n",
                                 seqno, tcplen, pcb->rcv_nxt + pcb->rcv_wnd));
                    if (TCPH_FLAGS(next->next->tcphdr) & TCP_FIN) {
 801e50c:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801e50e:	681b      	ldr	r3, [r3, #0]
 801e510:	691b      	ldr	r3, [r3, #16]
 801e512:	899b      	ldrh	r3, [r3, #12]
 801e514:	b29b      	uxth	r3, r3
 801e516:	4618      	mov	r0, r3
 801e518:	f7fa f89e 	bl	8018658 <lwip_htons>
 801e51c:	4603      	mov	r3, r0
 801e51e:	b2db      	uxtb	r3, r3
 801e520:	f003 0301 	and.w	r3, r3, #1
 801e524:	2b00      	cmp	r3, #0
 801e526:	d021      	beq.n	801e56c <tcp_receive+0xe10>
                      /* Must remove the FIN from the header as we're trimming
                       * that byte of sequence-space from the packet */
                      TCPH_FLAGS_SET(next->next->tcphdr, TCPH_FLAGS(next->next->tcphdr) & ~TCP_FIN);
 801e528:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801e52a:	681b      	ldr	r3, [r3, #0]
 801e52c:	691b      	ldr	r3, [r3, #16]
 801e52e:	899b      	ldrh	r3, [r3, #12]
 801e530:	b29b      	uxth	r3, r3
 801e532:	b21b      	sxth	r3, r3
 801e534:	f423 537c 	bic.w	r3, r3, #16128	@ 0x3f00
 801e538:	b21c      	sxth	r4, r3
 801e53a:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801e53c:	681b      	ldr	r3, [r3, #0]
 801e53e:	691b      	ldr	r3, [r3, #16]
 801e540:	899b      	ldrh	r3, [r3, #12]
 801e542:	b29b      	uxth	r3, r3
 801e544:	4618      	mov	r0, r3
 801e546:	f7fa f887 	bl	8018658 <lwip_htons>
 801e54a:	4603      	mov	r3, r0
 801e54c:	b2db      	uxtb	r3, r3
 801e54e:	f003 033e 	and.w	r3, r3, #62	@ 0x3e
 801e552:	b29b      	uxth	r3, r3
 801e554:	4618      	mov	r0, r3
 801e556:	f7fa f87f 	bl	8018658 <lwip_htons>
 801e55a:	4603      	mov	r3, r0
 801e55c:	b21b      	sxth	r3, r3
 801e55e:	4323      	orrs	r3, r4
 801e560:	b21a      	sxth	r2, r3
 801e562:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801e564:	681b      	ldr	r3, [r3, #0]
 801e566:	691b      	ldr	r3, [r3, #16]
 801e568:	b292      	uxth	r2, r2
 801e56a:	819a      	strh	r2, [r3, #12]
                    }
                    /* Adjust length of segment to fit in the window. */
                    next->next->len = (u16_t)(pcb->rcv_nxt + pcb->rcv_wnd - seqno);
 801e56c:	687b      	ldr	r3, [r7, #4]
 801e56e:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801e570:	b29a      	uxth	r2, r3
 801e572:	687b      	ldr	r3, [r7, #4]
 801e574:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 801e576:	4413      	add	r3, r2
 801e578:	b299      	uxth	r1, r3
 801e57a:	4b3c      	ldr	r3, [pc, #240]	@ (801e66c <tcp_receive+0xf10>)
 801e57c:	681b      	ldr	r3, [r3, #0]
 801e57e:	b29a      	uxth	r2, r3
 801e580:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801e582:	681b      	ldr	r3, [r3, #0]
 801e584:	1a8a      	subs	r2, r1, r2
 801e586:	b292      	uxth	r2, r2
 801e588:	811a      	strh	r2, [r3, #8]
                    pbuf_realloc(next->next->p, next->next->len);
 801e58a:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801e58c:	681b      	ldr	r3, [r3, #0]
 801e58e:	685a      	ldr	r2, [r3, #4]
 801e590:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801e592:	681b      	ldr	r3, [r3, #0]
 801e594:	891b      	ldrh	r3, [r3, #8]
 801e596:	4619      	mov	r1, r3
 801e598:	4610      	mov	r0, r2
 801e59a:	f7fb fb89 	bl	8019cb0 <pbuf_realloc>
                    tcplen = TCP_TCPLEN(next->next);
 801e59e:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801e5a0:	681b      	ldr	r3, [r3, #0]
 801e5a2:	891c      	ldrh	r4, [r3, #8]
 801e5a4:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801e5a6:	681b      	ldr	r3, [r3, #0]
 801e5a8:	691b      	ldr	r3, [r3, #16]
 801e5aa:	899b      	ldrh	r3, [r3, #12]
 801e5ac:	b29b      	uxth	r3, r3
 801e5ae:	4618      	mov	r0, r3
 801e5b0:	f7fa f852 	bl	8018658 <lwip_htons>
 801e5b4:	4603      	mov	r3, r0
 801e5b6:	b2db      	uxtb	r3, r3
 801e5b8:	f003 0303 	and.w	r3, r3, #3
 801e5bc:	2b00      	cmp	r3, #0
 801e5be:	d001      	beq.n	801e5c4 <tcp_receive+0xe68>
 801e5c0:	2301      	movs	r3, #1
 801e5c2:	e000      	b.n	801e5c6 <tcp_receive+0xe6a>
 801e5c4:	2300      	movs	r3, #0
 801e5c6:	4423      	add	r3, r4
 801e5c8:	b29a      	uxth	r2, r3
 801e5ca:	4b2a      	ldr	r3, [pc, #168]	@ (801e674 <tcp_receive+0xf18>)
 801e5cc:	801a      	strh	r2, [r3, #0]
                    LWIP_ASSERT("tcp_receive: segment not trimmed correctly to rcv_wnd\n",
 801e5ce:	4b29      	ldr	r3, [pc, #164]	@ (801e674 <tcp_receive+0xf18>)
 801e5d0:	881b      	ldrh	r3, [r3, #0]
 801e5d2:	461a      	mov	r2, r3
 801e5d4:	4b25      	ldr	r3, [pc, #148]	@ (801e66c <tcp_receive+0xf10>)
 801e5d6:	681b      	ldr	r3, [r3, #0]
 801e5d8:	441a      	add	r2, r3
 801e5da:	687b      	ldr	r3, [r7, #4]
 801e5dc:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801e5de:	6879      	ldr	r1, [r7, #4]
 801e5e0:	8d09      	ldrh	r1, [r1, #40]	@ 0x28
 801e5e2:	440b      	add	r3, r1
 801e5e4:	429a      	cmp	r2, r3
 801e5e6:	d019      	beq.n	801e61c <tcp_receive+0xec0>
 801e5e8:	4b23      	ldr	r3, [pc, #140]	@ (801e678 <tcp_receive+0xf1c>)
 801e5ea:	f44f 62df 	mov.w	r2, #1784	@ 0x6f8
 801e5ee:	4923      	ldr	r1, [pc, #140]	@ (801e67c <tcp_receive+0xf20>)
 801e5f0:	4823      	ldr	r0, [pc, #140]	@ (801e680 <tcp_receive+0xf24>)
 801e5f2:	f00a ff8b 	bl	802950c <iprintf>
                                (seqno + tcplen) == (pcb->rcv_nxt + pcb->rcv_wnd));
                  }
                }
                break;
 801e5f6:	e011      	b.n	801e61c <tcp_receive+0xec0>
          for (next = pcb->ooseq; next != NULL; next = next->next) {
 801e5f8:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801e5fa:	681b      	ldr	r3, [r3, #0]
 801e5fc:	63bb      	str	r3, [r7, #56]	@ 0x38
 801e5fe:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801e600:	2b00      	cmp	r3, #0
 801e602:	f47f aea5 	bne.w	801e350 <tcp_receive+0xbf4>
 801e606:	e00a      	b.n	801e61e <tcp_receive+0xec2>
                break;
 801e608:	bf00      	nop
 801e60a:	e008      	b.n	801e61e <tcp_receive+0xec2>
                break;
 801e60c:	bf00      	nop
 801e60e:	e006      	b.n	801e61e <tcp_receive+0xec2>
                  break;
 801e610:	bf00      	nop
 801e612:	e004      	b.n	801e61e <tcp_receive+0xec2>
                  break;
 801e614:	bf00      	nop
 801e616:	e002      	b.n	801e61e <tcp_receive+0xec2>
                  break;
 801e618:	bf00      	nop
 801e61a:	e000      	b.n	801e61e <tcp_receive+0xec2>
                break;
 801e61c:	bf00      	nop
#endif /* TCP_OOSEQ_BYTES_LIMIT || TCP_OOSEQ_PBUFS_LIMIT */
#endif /* TCP_QUEUE_OOSEQ */

        /* We send the ACK packet after we've (potentially) dealt with SACKs,
           so they can be included in the acknowledgment. */
        tcp_send_empty_ack(pcb);
 801e61e:	6878      	ldr	r0, [r7, #4]
 801e620:	f001 fefc 	bl	802041c <tcp_send_empty_ack>
      if (pcb->rcv_nxt == seqno) {
 801e624:	e003      	b.n	801e62e <tcp_receive+0xed2>
      }
    } else {
      /* The incoming segment is not within the window. */
      tcp_send_empty_ack(pcb);
 801e626:	6878      	ldr	r0, [r7, #4]
 801e628:	f001 fef8 	bl	802041c <tcp_send_empty_ack>
    if (TCP_SEQ_BETWEEN(seqno, pcb->rcv_nxt,
 801e62c:	e01a      	b.n	801e664 <tcp_receive+0xf08>
 801e62e:	e019      	b.n	801e664 <tcp_receive+0xf08>
    }
  } else {
    /* Segments with length 0 is taken care of here. Segments that
       fall out of the window are ACKed. */
    if (!TCP_SEQ_BETWEEN(seqno, pcb->rcv_nxt, pcb->rcv_nxt + pcb->rcv_wnd - 1)) {
 801e630:	4b0e      	ldr	r3, [pc, #56]	@ (801e66c <tcp_receive+0xf10>)
 801e632:	681a      	ldr	r2, [r3, #0]
 801e634:	687b      	ldr	r3, [r7, #4]
 801e636:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801e638:	1ad3      	subs	r3, r2, r3
 801e63a:	2b00      	cmp	r3, #0
 801e63c:	db0a      	blt.n	801e654 <tcp_receive+0xef8>
 801e63e:	4b0b      	ldr	r3, [pc, #44]	@ (801e66c <tcp_receive+0xf10>)
 801e640:	681a      	ldr	r2, [r3, #0]
 801e642:	687b      	ldr	r3, [r7, #4]
 801e644:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801e646:	6879      	ldr	r1, [r7, #4]
 801e648:	8d09      	ldrh	r1, [r1, #40]	@ 0x28
 801e64a:	440b      	add	r3, r1
 801e64c:	1ad3      	subs	r3, r2, r3
 801e64e:	3301      	adds	r3, #1
 801e650:	2b00      	cmp	r3, #0
 801e652:	dd07      	ble.n	801e664 <tcp_receive+0xf08>
      tcp_ack_now(pcb);
 801e654:	687b      	ldr	r3, [r7, #4]
 801e656:	8b5b      	ldrh	r3, [r3, #26]
 801e658:	f043 0302 	orr.w	r3, r3, #2
 801e65c:	b29a      	uxth	r2, r3
 801e65e:	687b      	ldr	r3, [r7, #4]
 801e660:	835a      	strh	r2, [r3, #26]
    }
  }
}
 801e662:	e7ff      	b.n	801e664 <tcp_receive+0xf08>
 801e664:	bf00      	nop
 801e666:	3750      	adds	r7, #80	@ 0x50
 801e668:	46bd      	mov	sp, r7
 801e66a:	bdb0      	pop	{r4, r5, r7, pc}
 801e66c:	2402a028 	.word	0x2402a028
 801e670:	2402a004 	.word	0x2402a004
 801e674:	2402a032 	.word	0x2402a032
 801e678:	0802e8a4 	.word	0x0802e8a4
 801e67c:	0802ec4c 	.word	0x0802ec4c
 801e680:	0802e8f0 	.word	0x0802e8f0

0801e684 <tcp_get_next_optbyte>:

static u8_t
tcp_get_next_optbyte(void)
{
 801e684:	b480      	push	{r7}
 801e686:	b083      	sub	sp, #12
 801e688:	af00      	add	r7, sp, #0
  u16_t optidx = tcp_optidx++;
 801e68a:	4b15      	ldr	r3, [pc, #84]	@ (801e6e0 <tcp_get_next_optbyte+0x5c>)
 801e68c:	881b      	ldrh	r3, [r3, #0]
 801e68e:	1c5a      	adds	r2, r3, #1
 801e690:	b291      	uxth	r1, r2
 801e692:	4a13      	ldr	r2, [pc, #76]	@ (801e6e0 <tcp_get_next_optbyte+0x5c>)
 801e694:	8011      	strh	r1, [r2, #0]
 801e696:	80fb      	strh	r3, [r7, #6]
  if ((tcphdr_opt2 == NULL) || (optidx < tcphdr_opt1len)) {
 801e698:	4b12      	ldr	r3, [pc, #72]	@ (801e6e4 <tcp_get_next_optbyte+0x60>)
 801e69a:	681b      	ldr	r3, [r3, #0]
 801e69c:	2b00      	cmp	r3, #0
 801e69e:	d004      	beq.n	801e6aa <tcp_get_next_optbyte+0x26>
 801e6a0:	4b11      	ldr	r3, [pc, #68]	@ (801e6e8 <tcp_get_next_optbyte+0x64>)
 801e6a2:	881b      	ldrh	r3, [r3, #0]
 801e6a4:	88fa      	ldrh	r2, [r7, #6]
 801e6a6:	429a      	cmp	r2, r3
 801e6a8:	d208      	bcs.n	801e6bc <tcp_get_next_optbyte+0x38>
    u8_t *opts = (u8_t *)tcphdr + TCP_HLEN;
 801e6aa:	4b10      	ldr	r3, [pc, #64]	@ (801e6ec <tcp_get_next_optbyte+0x68>)
 801e6ac:	681b      	ldr	r3, [r3, #0]
 801e6ae:	3314      	adds	r3, #20
 801e6b0:	603b      	str	r3, [r7, #0]
    return opts[optidx];
 801e6b2:	88fb      	ldrh	r3, [r7, #6]
 801e6b4:	683a      	ldr	r2, [r7, #0]
 801e6b6:	4413      	add	r3, r2
 801e6b8:	781b      	ldrb	r3, [r3, #0]
 801e6ba:	e00b      	b.n	801e6d4 <tcp_get_next_optbyte+0x50>
  } else {
    u8_t idx = (u8_t)(optidx - tcphdr_opt1len);
 801e6bc:	88fb      	ldrh	r3, [r7, #6]
 801e6be:	b2da      	uxtb	r2, r3
 801e6c0:	4b09      	ldr	r3, [pc, #36]	@ (801e6e8 <tcp_get_next_optbyte+0x64>)
 801e6c2:	881b      	ldrh	r3, [r3, #0]
 801e6c4:	b2db      	uxtb	r3, r3
 801e6c6:	1ad3      	subs	r3, r2, r3
 801e6c8:	717b      	strb	r3, [r7, #5]
    return tcphdr_opt2[idx];
 801e6ca:	4b06      	ldr	r3, [pc, #24]	@ (801e6e4 <tcp_get_next_optbyte+0x60>)
 801e6cc:	681a      	ldr	r2, [r3, #0]
 801e6ce:	797b      	ldrb	r3, [r7, #5]
 801e6d0:	4413      	add	r3, r2
 801e6d2:	781b      	ldrb	r3, [r3, #0]
  }
}
 801e6d4:	4618      	mov	r0, r3
 801e6d6:	370c      	adds	r7, #12
 801e6d8:	46bd      	mov	sp, r7
 801e6da:	f85d 7b04 	ldr.w	r7, [sp], #4
 801e6de:	4770      	bx	lr
 801e6e0:	2402a024 	.word	0x2402a024
 801e6e4:	2402a020 	.word	0x2402a020
 801e6e8:	2402a01e 	.word	0x2402a01e
 801e6ec:	2402a018 	.word	0x2402a018

0801e6f0 <tcp_parseopt>:
 *
 * @param pcb the tcp_pcb for which a segment arrived
 */
static void
tcp_parseopt(struct tcp_pcb *pcb)
{
 801e6f0:	b580      	push	{r7, lr}
 801e6f2:	b084      	sub	sp, #16
 801e6f4:	af00      	add	r7, sp, #0
 801e6f6:	6078      	str	r0, [r7, #4]
  u16_t mss;
#if LWIP_TCP_TIMESTAMPS
  u32_t tsval;
#endif

  LWIP_ASSERT("tcp_parseopt: invalid pcb", pcb != NULL);
 801e6f8:	687b      	ldr	r3, [r7, #4]
 801e6fa:	2b00      	cmp	r3, #0
 801e6fc:	d106      	bne.n	801e70c <tcp_parseopt+0x1c>
 801e6fe:	4b33      	ldr	r3, [pc, #204]	@ (801e7cc <tcp_parseopt+0xdc>)
 801e700:	f240 727d 	movw	r2, #1917	@ 0x77d
 801e704:	4932      	ldr	r1, [pc, #200]	@ (801e7d0 <tcp_parseopt+0xe0>)
 801e706:	4833      	ldr	r0, [pc, #204]	@ (801e7d4 <tcp_parseopt+0xe4>)
 801e708:	f00a ff00 	bl	802950c <iprintf>

  /* Parse the TCP MSS option, if present. */
  if (tcphdr_optlen != 0) {
 801e70c:	4b32      	ldr	r3, [pc, #200]	@ (801e7d8 <tcp_parseopt+0xe8>)
 801e70e:	881b      	ldrh	r3, [r3, #0]
 801e710:	2b00      	cmp	r3, #0
 801e712:	d057      	beq.n	801e7c4 <tcp_parseopt+0xd4>
    for (tcp_optidx = 0; tcp_optidx < tcphdr_optlen; ) {
 801e714:	4b31      	ldr	r3, [pc, #196]	@ (801e7dc <tcp_parseopt+0xec>)
 801e716:	2200      	movs	r2, #0
 801e718:	801a      	strh	r2, [r3, #0]
 801e71a:	e047      	b.n	801e7ac <tcp_parseopt+0xbc>
      u8_t opt = tcp_get_next_optbyte();
 801e71c:	f7ff ffb2 	bl	801e684 <tcp_get_next_optbyte>
 801e720:	4603      	mov	r3, r0
 801e722:	73fb      	strb	r3, [r7, #15]
      switch (opt) {
 801e724:	7bfb      	ldrb	r3, [r7, #15]
 801e726:	2b02      	cmp	r3, #2
 801e728:	d006      	beq.n	801e738 <tcp_parseopt+0x48>
 801e72a:	2b02      	cmp	r3, #2
 801e72c:	dc2b      	bgt.n	801e786 <tcp_parseopt+0x96>
 801e72e:	2b00      	cmp	r3, #0
 801e730:	d043      	beq.n	801e7ba <tcp_parseopt+0xca>
 801e732:	2b01      	cmp	r3, #1
 801e734:	d039      	beq.n	801e7aa <tcp_parseopt+0xba>
 801e736:	e026      	b.n	801e786 <tcp_parseopt+0x96>
          /* NOP option. */
          LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_parseopt: NOP\n"));
          break;
        case LWIP_TCP_OPT_MSS:
          LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_parseopt: MSS\n"));
          if (tcp_get_next_optbyte() != LWIP_TCP_OPT_LEN_MSS || (tcp_optidx - 2 + LWIP_TCP_OPT_LEN_MSS) > tcphdr_optlen) {
 801e738:	f7ff ffa4 	bl	801e684 <tcp_get_next_optbyte>
 801e73c:	4603      	mov	r3, r0
 801e73e:	2b04      	cmp	r3, #4
 801e740:	d13d      	bne.n	801e7be <tcp_parseopt+0xce>
 801e742:	4b26      	ldr	r3, [pc, #152]	@ (801e7dc <tcp_parseopt+0xec>)
 801e744:	881b      	ldrh	r3, [r3, #0]
 801e746:	3301      	adds	r3, #1
 801e748:	4a23      	ldr	r2, [pc, #140]	@ (801e7d8 <tcp_parseopt+0xe8>)
 801e74a:	8812      	ldrh	r2, [r2, #0]
 801e74c:	4293      	cmp	r3, r2
 801e74e:	da36      	bge.n	801e7be <tcp_parseopt+0xce>
            /* Bad length */
            LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_parseopt: bad length\n"));
            return;
          }
          /* An MSS option with the right option length. */
          mss = (u16_t)(tcp_get_next_optbyte() << 8);
 801e750:	f7ff ff98 	bl	801e684 <tcp_get_next_optbyte>
 801e754:	4603      	mov	r3, r0
 801e756:	021b      	lsls	r3, r3, #8
 801e758:	81bb      	strh	r3, [r7, #12]
          mss |= tcp_get_next_optbyte();
 801e75a:	f7ff ff93 	bl	801e684 <tcp_get_next_optbyte>
 801e75e:	4603      	mov	r3, r0
 801e760:	461a      	mov	r2, r3
 801e762:	89bb      	ldrh	r3, [r7, #12]
 801e764:	4313      	orrs	r3, r2
 801e766:	81bb      	strh	r3, [r7, #12]
          /* Limit the mss to the configured TCP_MSS and prevent division by zero */
          pcb->mss = ((mss > TCP_MSS) || (mss == 0)) ? TCP_MSS : mss;
 801e768:	89bb      	ldrh	r3, [r7, #12]
 801e76a:	f240 52b4 	movw	r2, #1460	@ 0x5b4
 801e76e:	4293      	cmp	r3, r2
 801e770:	d804      	bhi.n	801e77c <tcp_parseopt+0x8c>
 801e772:	89bb      	ldrh	r3, [r7, #12]
 801e774:	2b00      	cmp	r3, #0
 801e776:	d001      	beq.n	801e77c <tcp_parseopt+0x8c>
 801e778:	89ba      	ldrh	r2, [r7, #12]
 801e77a:	e001      	b.n	801e780 <tcp_parseopt+0x90>
 801e77c:	f240 52b4 	movw	r2, #1460	@ 0x5b4
 801e780:	687b      	ldr	r3, [r7, #4]
 801e782:	865a      	strh	r2, [r3, #50]	@ 0x32
          break;
 801e784:	e012      	b.n	801e7ac <tcp_parseopt+0xbc>
          }
          break;
#endif /* LWIP_TCP_SACK_OUT */
        default:
          LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_parseopt: other\n"));
          data = tcp_get_next_optbyte();
 801e786:	f7ff ff7d 	bl	801e684 <tcp_get_next_optbyte>
 801e78a:	4603      	mov	r3, r0
 801e78c:	72fb      	strb	r3, [r7, #11]
          if (data < 2) {
 801e78e:	7afb      	ldrb	r3, [r7, #11]
 801e790:	2b01      	cmp	r3, #1
 801e792:	d916      	bls.n	801e7c2 <tcp_parseopt+0xd2>
               and we don't process them further. */
            return;
          }
          /* All other options have a length field, so that we easily
             can skip past them. */
          tcp_optidx += data - 2;
 801e794:	7afb      	ldrb	r3, [r7, #11]
 801e796:	b29a      	uxth	r2, r3
 801e798:	4b10      	ldr	r3, [pc, #64]	@ (801e7dc <tcp_parseopt+0xec>)
 801e79a:	881b      	ldrh	r3, [r3, #0]
 801e79c:	4413      	add	r3, r2
 801e79e:	b29b      	uxth	r3, r3
 801e7a0:	3b02      	subs	r3, #2
 801e7a2:	b29a      	uxth	r2, r3
 801e7a4:	4b0d      	ldr	r3, [pc, #52]	@ (801e7dc <tcp_parseopt+0xec>)
 801e7a6:	801a      	strh	r2, [r3, #0]
 801e7a8:	e000      	b.n	801e7ac <tcp_parseopt+0xbc>
          break;
 801e7aa:	bf00      	nop
    for (tcp_optidx = 0; tcp_optidx < tcphdr_optlen; ) {
 801e7ac:	4b0b      	ldr	r3, [pc, #44]	@ (801e7dc <tcp_parseopt+0xec>)
 801e7ae:	881a      	ldrh	r2, [r3, #0]
 801e7b0:	4b09      	ldr	r3, [pc, #36]	@ (801e7d8 <tcp_parseopt+0xe8>)
 801e7b2:	881b      	ldrh	r3, [r3, #0]
 801e7b4:	429a      	cmp	r2, r3
 801e7b6:	d3b1      	bcc.n	801e71c <tcp_parseopt+0x2c>
 801e7b8:	e004      	b.n	801e7c4 <tcp_parseopt+0xd4>
          return;
 801e7ba:	bf00      	nop
 801e7bc:	e002      	b.n	801e7c4 <tcp_parseopt+0xd4>
            return;
 801e7be:	bf00      	nop
 801e7c0:	e000      	b.n	801e7c4 <tcp_parseopt+0xd4>
            return;
 801e7c2:	bf00      	nop
      }
    }
  }
}
 801e7c4:	3710      	adds	r7, #16
 801e7c6:	46bd      	mov	sp, r7
 801e7c8:	bd80      	pop	{r7, pc}
 801e7ca:	bf00      	nop
 801e7cc:	0802e8a4 	.word	0x0802e8a4
 801e7d0:	0802ed08 	.word	0x0802ed08
 801e7d4:	0802e8f0 	.word	0x0802e8f0
 801e7d8:	2402a01c 	.word	0x2402a01c
 801e7dc:	2402a024 	.word	0x2402a024

0801e7e0 <tcp_trigger_input_pcb_close>:

void
tcp_trigger_input_pcb_close(void)
{
 801e7e0:	b480      	push	{r7}
 801e7e2:	af00      	add	r7, sp, #0
  recv_flags |= TF_CLOSED;
 801e7e4:	4b05      	ldr	r3, [pc, #20]	@ (801e7fc <tcp_trigger_input_pcb_close+0x1c>)
 801e7e6:	781b      	ldrb	r3, [r3, #0]
 801e7e8:	f043 0310 	orr.w	r3, r3, #16
 801e7ec:	b2da      	uxtb	r2, r3
 801e7ee:	4b03      	ldr	r3, [pc, #12]	@ (801e7fc <tcp_trigger_input_pcb_close+0x1c>)
 801e7f0:	701a      	strb	r2, [r3, #0]
}
 801e7f2:	bf00      	nop
 801e7f4:	46bd      	mov	sp, r7
 801e7f6:	f85d 7b04 	ldr.w	r7, [sp], #4
 801e7fa:	4770      	bx	lr
 801e7fc:	2402a035 	.word	0x2402a035

0801e800 <tcp_route>:
static err_t tcp_output_segment(struct tcp_seg *seg, struct tcp_pcb *pcb, struct netif *netif);

/* tcp_route: common code that returns a fixed bound netif or calls ip_route */
static struct netif *
tcp_route(const struct tcp_pcb *pcb, const ip_addr_t *src, const ip_addr_t *dst)
{
 801e800:	b580      	push	{r7, lr}
 801e802:	b084      	sub	sp, #16
 801e804:	af00      	add	r7, sp, #0
 801e806:	60f8      	str	r0, [r7, #12]
 801e808:	60b9      	str	r1, [r7, #8]
 801e80a:	607a      	str	r2, [r7, #4]
  LWIP_UNUSED_ARG(src); /* in case IPv4-only and source-based routing is disabled */

  if ((pcb != NULL) && (pcb->netif_idx != NETIF_NO_INDEX)) {
 801e80c:	68fb      	ldr	r3, [r7, #12]
 801e80e:	2b00      	cmp	r3, #0
 801e810:	d00a      	beq.n	801e828 <tcp_route+0x28>
 801e812:	68fb      	ldr	r3, [r7, #12]
 801e814:	7a1b      	ldrb	r3, [r3, #8]
 801e816:	2b00      	cmp	r3, #0
 801e818:	d006      	beq.n	801e828 <tcp_route+0x28>
    return netif_get_by_index(pcb->netif_idx);
 801e81a:	68fb      	ldr	r3, [r7, #12]
 801e81c:	7a1b      	ldrb	r3, [r3, #8]
 801e81e:	4618      	mov	r0, r3
 801e820:	f7fb f83c 	bl	801989c <netif_get_by_index>
 801e824:	4603      	mov	r3, r0
 801e826:	e003      	b.n	801e830 <tcp_route+0x30>
  } else {
    return ip_route(src, dst);
 801e828:	6878      	ldr	r0, [r7, #4]
 801e82a:	f005 fe61 	bl	80244f0 <ip4_route>
 801e82e:	4603      	mov	r3, r0
  }
}
 801e830:	4618      	mov	r0, r3
 801e832:	3710      	adds	r7, #16
 801e834:	46bd      	mov	sp, r7
 801e836:	bd80      	pop	{r7, pc}

0801e838 <tcp_create_segment>:
 * The TCP header is filled in except ackno and wnd.
 * p is freed on failure.
 */
static struct tcp_seg *
tcp_create_segment(const struct tcp_pcb *pcb, struct pbuf *p, u8_t hdrflags, u32_t seqno, u8_t optflags)
{
 801e838:	b590      	push	{r4, r7, lr}
 801e83a:	b087      	sub	sp, #28
 801e83c:	af00      	add	r7, sp, #0
 801e83e:	60f8      	str	r0, [r7, #12]
 801e840:	60b9      	str	r1, [r7, #8]
 801e842:	603b      	str	r3, [r7, #0]
 801e844:	4613      	mov	r3, r2
 801e846:	71fb      	strb	r3, [r7, #7]
  struct tcp_seg *seg;
  u8_t optlen;

  LWIP_ASSERT("tcp_create_segment: invalid pcb", pcb != NULL);
 801e848:	68fb      	ldr	r3, [r7, #12]
 801e84a:	2b00      	cmp	r3, #0
 801e84c:	d105      	bne.n	801e85a <tcp_create_segment+0x22>
 801e84e:	4b45      	ldr	r3, [pc, #276]	@ (801e964 <tcp_create_segment+0x12c>)
 801e850:	22a3      	movs	r2, #163	@ 0xa3
 801e852:	4945      	ldr	r1, [pc, #276]	@ (801e968 <tcp_create_segment+0x130>)
 801e854:	4845      	ldr	r0, [pc, #276]	@ (801e96c <tcp_create_segment+0x134>)
 801e856:	f00a fe59 	bl	802950c <iprintf>
  LWIP_ASSERT("tcp_create_segment: invalid pbuf", p != NULL);
 801e85a:	68bb      	ldr	r3, [r7, #8]
 801e85c:	2b00      	cmp	r3, #0
 801e85e:	d105      	bne.n	801e86c <tcp_create_segment+0x34>
 801e860:	4b40      	ldr	r3, [pc, #256]	@ (801e964 <tcp_create_segment+0x12c>)
 801e862:	22a4      	movs	r2, #164	@ 0xa4
 801e864:	4942      	ldr	r1, [pc, #264]	@ (801e970 <tcp_create_segment+0x138>)
 801e866:	4841      	ldr	r0, [pc, #260]	@ (801e96c <tcp_create_segment+0x134>)
 801e868:	f00a fe50 	bl	802950c <iprintf>

  optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(optflags, pcb);
 801e86c:	f897 3028 	ldrb.w	r3, [r7, #40]	@ 0x28
 801e870:	009b      	lsls	r3, r3, #2
 801e872:	b2db      	uxtb	r3, r3
 801e874:	f003 0304 	and.w	r3, r3, #4
 801e878:	75fb      	strb	r3, [r7, #23]

  if ((seg = (struct tcp_seg *)memp_malloc(MEMP_TCP_SEG)) == NULL) {
 801e87a:	2003      	movs	r0, #3
 801e87c:	f7fa fc6a 	bl	8019154 <memp_malloc>
 801e880:	6138      	str	r0, [r7, #16]
 801e882:	693b      	ldr	r3, [r7, #16]
 801e884:	2b00      	cmp	r3, #0
 801e886:	d104      	bne.n	801e892 <tcp_create_segment+0x5a>
    LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("tcp_create_segment: no memory.\n"));
    pbuf_free(p);
 801e888:	68b8      	ldr	r0, [r7, #8]
 801e88a:	f7fb fbc7 	bl	801a01c <pbuf_free>
    return NULL;
 801e88e:	2300      	movs	r3, #0
 801e890:	e063      	b.n	801e95a <tcp_create_segment+0x122>
  }
  seg->flags = optflags;
 801e892:	693b      	ldr	r3, [r7, #16]
 801e894:	f897 2028 	ldrb.w	r2, [r7, #40]	@ 0x28
 801e898:	731a      	strb	r2, [r3, #12]
  seg->next = NULL;
 801e89a:	693b      	ldr	r3, [r7, #16]
 801e89c:	2200      	movs	r2, #0
 801e89e:	601a      	str	r2, [r3, #0]
  seg->p = p;
 801e8a0:	693b      	ldr	r3, [r7, #16]
 801e8a2:	68ba      	ldr	r2, [r7, #8]
 801e8a4:	605a      	str	r2, [r3, #4]
  LWIP_ASSERT("p->tot_len >= optlen", p->tot_len >= optlen);
 801e8a6:	68bb      	ldr	r3, [r7, #8]
 801e8a8:	891a      	ldrh	r2, [r3, #8]
 801e8aa:	7dfb      	ldrb	r3, [r7, #23]
 801e8ac:	b29b      	uxth	r3, r3
 801e8ae:	429a      	cmp	r2, r3
 801e8b0:	d205      	bcs.n	801e8be <tcp_create_segment+0x86>
 801e8b2:	4b2c      	ldr	r3, [pc, #176]	@ (801e964 <tcp_create_segment+0x12c>)
 801e8b4:	22b0      	movs	r2, #176	@ 0xb0
 801e8b6:	492f      	ldr	r1, [pc, #188]	@ (801e974 <tcp_create_segment+0x13c>)
 801e8b8:	482c      	ldr	r0, [pc, #176]	@ (801e96c <tcp_create_segment+0x134>)
 801e8ba:	f00a fe27 	bl	802950c <iprintf>
  seg->len = p->tot_len - optlen;
 801e8be:	68bb      	ldr	r3, [r7, #8]
 801e8c0:	891a      	ldrh	r2, [r3, #8]
 801e8c2:	7dfb      	ldrb	r3, [r7, #23]
 801e8c4:	b29b      	uxth	r3, r3
 801e8c6:	1ad3      	subs	r3, r2, r3
 801e8c8:	b29a      	uxth	r2, r3
 801e8ca:	693b      	ldr	r3, [r7, #16]
 801e8cc:	811a      	strh	r2, [r3, #8]
#if TCP_OVERSIZE_DBGCHECK
  seg->oversize_left = 0;
 801e8ce:	693b      	ldr	r3, [r7, #16]
 801e8d0:	2200      	movs	r2, #0
 801e8d2:	815a      	strh	r2, [r3, #10]
  LWIP_ASSERT("invalid optflags passed: TF_SEG_DATA_CHECKSUMMED",
              (optflags & TF_SEG_DATA_CHECKSUMMED) == 0);
#endif /* TCP_CHECKSUM_ON_COPY */

  /* build TCP header */
  if (pbuf_add_header(p, TCP_HLEN)) {
 801e8d4:	2114      	movs	r1, #20
 801e8d6:	68b8      	ldr	r0, [r7, #8]
 801e8d8:	f7fb fad8 	bl	8019e8c <pbuf_add_header>
 801e8dc:	4603      	mov	r3, r0
 801e8de:	2b00      	cmp	r3, #0
 801e8e0:	d004      	beq.n	801e8ec <tcp_create_segment+0xb4>
    LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("tcp_create_segment: no room for TCP header in pbuf.\n"));
    TCP_STATS_INC(tcp.err);
    tcp_seg_free(seg);
 801e8e2:	6938      	ldr	r0, [r7, #16]
 801e8e4:	f7fc fff3 	bl	801b8ce <tcp_seg_free>
    return NULL;
 801e8e8:	2300      	movs	r3, #0
 801e8ea:	e036      	b.n	801e95a <tcp_create_segment+0x122>
  }
  seg->tcphdr = (struct tcp_hdr *)seg->p->payload;
 801e8ec:	693b      	ldr	r3, [r7, #16]
 801e8ee:	685b      	ldr	r3, [r3, #4]
 801e8f0:	685a      	ldr	r2, [r3, #4]
 801e8f2:	693b      	ldr	r3, [r7, #16]
 801e8f4:	611a      	str	r2, [r3, #16]
  seg->tcphdr->src = lwip_htons(pcb->local_port);
 801e8f6:	68fb      	ldr	r3, [r7, #12]
 801e8f8:	8ada      	ldrh	r2, [r3, #22]
 801e8fa:	693b      	ldr	r3, [r7, #16]
 801e8fc:	691c      	ldr	r4, [r3, #16]
 801e8fe:	4610      	mov	r0, r2
 801e900:	f7f9 feaa 	bl	8018658 <lwip_htons>
 801e904:	4603      	mov	r3, r0
 801e906:	8023      	strh	r3, [r4, #0]
  seg->tcphdr->dest = lwip_htons(pcb->remote_port);
 801e908:	68fb      	ldr	r3, [r7, #12]
 801e90a:	8b1a      	ldrh	r2, [r3, #24]
 801e90c:	693b      	ldr	r3, [r7, #16]
 801e90e:	691c      	ldr	r4, [r3, #16]
 801e910:	4610      	mov	r0, r2
 801e912:	f7f9 fea1 	bl	8018658 <lwip_htons>
 801e916:	4603      	mov	r3, r0
 801e918:	8063      	strh	r3, [r4, #2]
  seg->tcphdr->seqno = lwip_htonl(seqno);
 801e91a:	693b      	ldr	r3, [r7, #16]
 801e91c:	691c      	ldr	r4, [r3, #16]
 801e91e:	6838      	ldr	r0, [r7, #0]
 801e920:	f7f9 feaf 	bl	8018682 <lwip_htonl>
 801e924:	4603      	mov	r3, r0
 801e926:	6063      	str	r3, [r4, #4]
  /* ackno is set in tcp_output */
  TCPH_HDRLEN_FLAGS_SET(seg->tcphdr, (5 + optlen / 4), hdrflags);
 801e928:	7dfb      	ldrb	r3, [r7, #23]
 801e92a:	089b      	lsrs	r3, r3, #2
 801e92c:	b2db      	uxtb	r3, r3
 801e92e:	3305      	adds	r3, #5
 801e930:	b29b      	uxth	r3, r3
 801e932:	031b      	lsls	r3, r3, #12
 801e934:	b29a      	uxth	r2, r3
 801e936:	79fb      	ldrb	r3, [r7, #7]
 801e938:	b29b      	uxth	r3, r3
 801e93a:	4313      	orrs	r3, r2
 801e93c:	b29a      	uxth	r2, r3
 801e93e:	693b      	ldr	r3, [r7, #16]
 801e940:	691c      	ldr	r4, [r3, #16]
 801e942:	4610      	mov	r0, r2
 801e944:	f7f9 fe88 	bl	8018658 <lwip_htons>
 801e948:	4603      	mov	r3, r0
 801e94a:	81a3      	strh	r3, [r4, #12]
  /* wnd and chksum are set in tcp_output */
  seg->tcphdr->urgp = 0;
 801e94c:	693b      	ldr	r3, [r7, #16]
 801e94e:	691b      	ldr	r3, [r3, #16]
 801e950:	2200      	movs	r2, #0
 801e952:	749a      	strb	r2, [r3, #18]
 801e954:	2200      	movs	r2, #0
 801e956:	74da      	strb	r2, [r3, #19]
  return seg;
 801e958:	693b      	ldr	r3, [r7, #16]
}
 801e95a:	4618      	mov	r0, r3
 801e95c:	371c      	adds	r7, #28
 801e95e:	46bd      	mov	sp, r7
 801e960:	bd90      	pop	{r4, r7, pc}
 801e962:	bf00      	nop
 801e964:	0802ed24 	.word	0x0802ed24
 801e968:	0802ed58 	.word	0x0802ed58
 801e96c:	0802ed78 	.word	0x0802ed78
 801e970:	0802eda0 	.word	0x0802eda0
 801e974:	0802edc4 	.word	0x0802edc4

0801e978 <tcp_pbuf_prealloc>:
#if TCP_OVERSIZE
static struct pbuf *
tcp_pbuf_prealloc(pbuf_layer layer, u16_t length, u16_t max_length,
                  u16_t *oversize, const struct tcp_pcb *pcb, u8_t apiflags,
                  u8_t first_seg)
{
 801e978:	b580      	push	{r7, lr}
 801e97a:	b086      	sub	sp, #24
 801e97c:	af00      	add	r7, sp, #0
 801e97e:	607b      	str	r3, [r7, #4]
 801e980:	4603      	mov	r3, r0
 801e982:	73fb      	strb	r3, [r7, #15]
 801e984:	460b      	mov	r3, r1
 801e986:	81bb      	strh	r3, [r7, #12]
 801e988:	4613      	mov	r3, r2
 801e98a:	817b      	strh	r3, [r7, #10]
  struct pbuf *p;
  u16_t alloc = length;
 801e98c:	89bb      	ldrh	r3, [r7, #12]
 801e98e:	82fb      	strh	r3, [r7, #22]

  LWIP_ASSERT("tcp_pbuf_prealloc: invalid oversize", oversize != NULL);
 801e990:	687b      	ldr	r3, [r7, #4]
 801e992:	2b00      	cmp	r3, #0
 801e994:	d105      	bne.n	801e9a2 <tcp_pbuf_prealloc+0x2a>
 801e996:	4b30      	ldr	r3, [pc, #192]	@ (801ea58 <tcp_pbuf_prealloc+0xe0>)
 801e998:	22e8      	movs	r2, #232	@ 0xe8
 801e99a:	4930      	ldr	r1, [pc, #192]	@ (801ea5c <tcp_pbuf_prealloc+0xe4>)
 801e99c:	4830      	ldr	r0, [pc, #192]	@ (801ea60 <tcp_pbuf_prealloc+0xe8>)
 801e99e:	f00a fdb5 	bl	802950c <iprintf>
  LWIP_ASSERT("tcp_pbuf_prealloc: invalid pcb", pcb != NULL);
 801e9a2:	6a3b      	ldr	r3, [r7, #32]
 801e9a4:	2b00      	cmp	r3, #0
 801e9a6:	d105      	bne.n	801e9b4 <tcp_pbuf_prealloc+0x3c>
 801e9a8:	4b2b      	ldr	r3, [pc, #172]	@ (801ea58 <tcp_pbuf_prealloc+0xe0>)
 801e9aa:	22e9      	movs	r2, #233	@ 0xe9
 801e9ac:	492d      	ldr	r1, [pc, #180]	@ (801ea64 <tcp_pbuf_prealloc+0xec>)
 801e9ae:	482c      	ldr	r0, [pc, #176]	@ (801ea60 <tcp_pbuf_prealloc+0xe8>)
 801e9b0:	f00a fdac 	bl	802950c <iprintf>
  LWIP_UNUSED_ARG(pcb);
  LWIP_UNUSED_ARG(apiflags);
  LWIP_UNUSED_ARG(first_seg);
  alloc = max_length;
#else /* LWIP_NETIF_TX_SINGLE_PBUF */
  if (length < max_length) {
 801e9b4:	89ba      	ldrh	r2, [r7, #12]
 801e9b6:	897b      	ldrh	r3, [r7, #10]
 801e9b8:	429a      	cmp	r2, r3
 801e9ba:	d221      	bcs.n	801ea00 <tcp_pbuf_prealloc+0x88>
     *
     * Did the user set TCP_WRITE_FLAG_MORE?
     *
     * Will the Nagle algorithm defer transmission of this segment?
     */
    if ((apiflags & TCP_WRITE_FLAG_MORE) ||
 801e9bc:	f897 3024 	ldrb.w	r3, [r7, #36]	@ 0x24
 801e9c0:	f003 0302 	and.w	r3, r3, #2
 801e9c4:	2b00      	cmp	r3, #0
 801e9c6:	d111      	bne.n	801e9ec <tcp_pbuf_prealloc+0x74>
        (!(pcb->flags & TF_NODELAY) &&
 801e9c8:	6a3b      	ldr	r3, [r7, #32]
 801e9ca:	8b5b      	ldrh	r3, [r3, #26]
 801e9cc:	f003 0340 	and.w	r3, r3, #64	@ 0x40
    if ((apiflags & TCP_WRITE_FLAG_MORE) ||
 801e9d0:	2b00      	cmp	r3, #0
 801e9d2:	d115      	bne.n	801ea00 <tcp_pbuf_prealloc+0x88>
        (!(pcb->flags & TF_NODELAY) &&
 801e9d4:	f897 3028 	ldrb.w	r3, [r7, #40]	@ 0x28
 801e9d8:	2b00      	cmp	r3, #0
 801e9da:	d007      	beq.n	801e9ec <tcp_pbuf_prealloc+0x74>
         (!first_seg ||
          pcb->unsent != NULL ||
 801e9dc:	6a3b      	ldr	r3, [r7, #32]
 801e9de:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
         (!first_seg ||
 801e9e0:	2b00      	cmp	r3, #0
 801e9e2:	d103      	bne.n	801e9ec <tcp_pbuf_prealloc+0x74>
          pcb->unacked != NULL))) {
 801e9e4:	6a3b      	ldr	r3, [r7, #32]
 801e9e6:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
          pcb->unsent != NULL ||
 801e9e8:	2b00      	cmp	r3, #0
 801e9ea:	d009      	beq.n	801ea00 <tcp_pbuf_prealloc+0x88>
      alloc = LWIP_MIN(max_length, LWIP_MEM_ALIGN_SIZE(TCP_OVERSIZE_CALC_LENGTH(length)));
 801e9ec:	89bb      	ldrh	r3, [r7, #12]
 801e9ee:	f203 53b7 	addw	r3, r3, #1463	@ 0x5b7
 801e9f2:	f023 0203 	bic.w	r2, r3, #3
 801e9f6:	897b      	ldrh	r3, [r7, #10]
 801e9f8:	4293      	cmp	r3, r2
 801e9fa:	bf28      	it	cs
 801e9fc:	4613      	movcs	r3, r2
 801e9fe:	82fb      	strh	r3, [r7, #22]
    }
  }
#endif /* LWIP_NETIF_TX_SINGLE_PBUF */
  p = pbuf_alloc(layer, alloc, PBUF_RAM);
 801ea00:	8af9      	ldrh	r1, [r7, #22]
 801ea02:	7bfb      	ldrb	r3, [r7, #15]
 801ea04:	f44f 7220 	mov.w	r2, #640	@ 0x280
 801ea08:	4618      	mov	r0, r3
 801ea0a:	f7fa fff1 	bl	80199f0 <pbuf_alloc>
 801ea0e:	6138      	str	r0, [r7, #16]
  if (p == NULL) {
 801ea10:	693b      	ldr	r3, [r7, #16]
 801ea12:	2b00      	cmp	r3, #0
 801ea14:	d101      	bne.n	801ea1a <tcp_pbuf_prealloc+0xa2>
    return NULL;
 801ea16:	2300      	movs	r3, #0
 801ea18:	e019      	b.n	801ea4e <tcp_pbuf_prealloc+0xd6>
  }
  LWIP_ASSERT("need unchained pbuf", p->next == NULL);
 801ea1a:	693b      	ldr	r3, [r7, #16]
 801ea1c:	681b      	ldr	r3, [r3, #0]
 801ea1e:	2b00      	cmp	r3, #0
 801ea20:	d006      	beq.n	801ea30 <tcp_pbuf_prealloc+0xb8>
 801ea22:	4b0d      	ldr	r3, [pc, #52]	@ (801ea58 <tcp_pbuf_prealloc+0xe0>)
 801ea24:	f240 120b 	movw	r2, #267	@ 0x10b
 801ea28:	490f      	ldr	r1, [pc, #60]	@ (801ea68 <tcp_pbuf_prealloc+0xf0>)
 801ea2a:	480d      	ldr	r0, [pc, #52]	@ (801ea60 <tcp_pbuf_prealloc+0xe8>)
 801ea2c:	f00a fd6e 	bl	802950c <iprintf>
  *oversize = p->len - length;
 801ea30:	693b      	ldr	r3, [r7, #16]
 801ea32:	895a      	ldrh	r2, [r3, #10]
 801ea34:	89bb      	ldrh	r3, [r7, #12]
 801ea36:	1ad3      	subs	r3, r2, r3
 801ea38:	b29a      	uxth	r2, r3
 801ea3a:	687b      	ldr	r3, [r7, #4]
 801ea3c:	801a      	strh	r2, [r3, #0]
  /* trim p->len to the currently used size */
  p->len = p->tot_len = length;
 801ea3e:	693b      	ldr	r3, [r7, #16]
 801ea40:	89ba      	ldrh	r2, [r7, #12]
 801ea42:	811a      	strh	r2, [r3, #8]
 801ea44:	693b      	ldr	r3, [r7, #16]
 801ea46:	891a      	ldrh	r2, [r3, #8]
 801ea48:	693b      	ldr	r3, [r7, #16]
 801ea4a:	815a      	strh	r2, [r3, #10]
  return p;
 801ea4c:	693b      	ldr	r3, [r7, #16]
}
 801ea4e:	4618      	mov	r0, r3
 801ea50:	3718      	adds	r7, #24
 801ea52:	46bd      	mov	sp, r7
 801ea54:	bd80      	pop	{r7, pc}
 801ea56:	bf00      	nop
 801ea58:	0802ed24 	.word	0x0802ed24
 801ea5c:	0802eddc 	.word	0x0802eddc
 801ea60:	0802ed78 	.word	0x0802ed78
 801ea64:	0802ee00 	.word	0x0802ee00
 801ea68:	0802ee20 	.word	0x0802ee20

0801ea6c <tcp_write_checks>:
 * @param len length of data to send (checked agains snd_buf)
 * @return ERR_OK if tcp_write is allowed to proceed, another err_t otherwise
 */
static err_t
tcp_write_checks(struct tcp_pcb *pcb, u16_t len)
{
 801ea6c:	b580      	push	{r7, lr}
 801ea6e:	b082      	sub	sp, #8
 801ea70:	af00      	add	r7, sp, #0
 801ea72:	6078      	str	r0, [r7, #4]
 801ea74:	460b      	mov	r3, r1
 801ea76:	807b      	strh	r3, [r7, #2]
  LWIP_ASSERT("tcp_write_checks: invalid pcb", pcb != NULL);
 801ea78:	687b      	ldr	r3, [r7, #4]
 801ea7a:	2b00      	cmp	r3, #0
 801ea7c:	d106      	bne.n	801ea8c <tcp_write_checks+0x20>
 801ea7e:	4b33      	ldr	r3, [pc, #204]	@ (801eb4c <tcp_write_checks+0xe0>)
 801ea80:	f240 1233 	movw	r2, #307	@ 0x133
 801ea84:	4932      	ldr	r1, [pc, #200]	@ (801eb50 <tcp_write_checks+0xe4>)
 801ea86:	4833      	ldr	r0, [pc, #204]	@ (801eb54 <tcp_write_checks+0xe8>)
 801ea88:	f00a fd40 	bl	802950c <iprintf>

  /* connection is in invalid state for data transmission? */
  if ((pcb->state != ESTABLISHED) &&
 801ea8c:	687b      	ldr	r3, [r7, #4]
 801ea8e:	7d1b      	ldrb	r3, [r3, #20]
 801ea90:	2b04      	cmp	r3, #4
 801ea92:	d00e      	beq.n	801eab2 <tcp_write_checks+0x46>
      (pcb->state != CLOSE_WAIT) &&
 801ea94:	687b      	ldr	r3, [r7, #4]
 801ea96:	7d1b      	ldrb	r3, [r3, #20]
  if ((pcb->state != ESTABLISHED) &&
 801ea98:	2b07      	cmp	r3, #7
 801ea9a:	d00a      	beq.n	801eab2 <tcp_write_checks+0x46>
      (pcb->state != SYN_SENT) &&
 801ea9c:	687b      	ldr	r3, [r7, #4]
 801ea9e:	7d1b      	ldrb	r3, [r3, #20]
      (pcb->state != CLOSE_WAIT) &&
 801eaa0:	2b02      	cmp	r3, #2
 801eaa2:	d006      	beq.n	801eab2 <tcp_write_checks+0x46>
      (pcb->state != SYN_RCVD)) {
 801eaa4:	687b      	ldr	r3, [r7, #4]
 801eaa6:	7d1b      	ldrb	r3, [r3, #20]
      (pcb->state != SYN_SENT) &&
 801eaa8:	2b03      	cmp	r3, #3
 801eaaa:	d002      	beq.n	801eab2 <tcp_write_checks+0x46>
    LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_STATE | LWIP_DBG_LEVEL_SEVERE, ("tcp_write() called in invalid state\n"));
    return ERR_CONN;
 801eaac:	f06f 030a 	mvn.w	r3, #10
 801eab0:	e048      	b.n	801eb44 <tcp_write_checks+0xd8>
  } else if (len == 0) {
 801eab2:	887b      	ldrh	r3, [r7, #2]
 801eab4:	2b00      	cmp	r3, #0
 801eab6:	d101      	bne.n	801eabc <tcp_write_checks+0x50>
    return ERR_OK;
 801eab8:	2300      	movs	r3, #0
 801eaba:	e043      	b.n	801eb44 <tcp_write_checks+0xd8>
  }

  /* fail on too much data */
  if (len > pcb->snd_buf) {
 801eabc:	687b      	ldr	r3, [r7, #4]
 801eabe:	f8b3 3064 	ldrh.w	r3, [r3, #100]	@ 0x64
 801eac2:	887a      	ldrh	r2, [r7, #2]
 801eac4:	429a      	cmp	r2, r3
 801eac6:	d909      	bls.n	801eadc <tcp_write_checks+0x70>
    LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SEVERE, ("tcp_write: too much data (len=%"U16_F" > snd_buf=%"TCPWNDSIZE_F")\n",
                len, pcb->snd_buf));
    tcp_set_flags(pcb, TF_NAGLEMEMERR);
 801eac8:	687b      	ldr	r3, [r7, #4]
 801eaca:	8b5b      	ldrh	r3, [r3, #26]
 801eacc:	f043 0380 	orr.w	r3, r3, #128	@ 0x80
 801ead0:	b29a      	uxth	r2, r3
 801ead2:	687b      	ldr	r3, [r7, #4]
 801ead4:	835a      	strh	r2, [r3, #26]
    return ERR_MEM;
 801ead6:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 801eada:	e033      	b.n	801eb44 <tcp_write_checks+0xd8>
  LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_write: queuelen: %"TCPWNDSIZE_F"\n", (tcpwnd_size_t)pcb->snd_queuelen));

  /* If total number of pbufs on the unsent/unacked queues exceeds the
   * configured maximum, return an error */
  /* check for configured max queuelen and possible overflow */
  if (pcb->snd_queuelen >= LWIP_MIN(TCP_SND_QUEUELEN, (TCP_SNDQUEUELEN_OVERFLOW + 1))) {
 801eadc:	687b      	ldr	r3, [r7, #4]
 801eade:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 801eae2:	2b0f      	cmp	r3, #15
 801eae4:	d909      	bls.n	801eafa <tcp_write_checks+0x8e>
    LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SEVERE, ("tcp_write: too long queue %"U16_F" (max %"U16_F")\n",
                pcb->snd_queuelen, (u16_t)TCP_SND_QUEUELEN));
    TCP_STATS_INC(tcp.memerr);
    tcp_set_flags(pcb, TF_NAGLEMEMERR);
 801eae6:	687b      	ldr	r3, [r7, #4]
 801eae8:	8b5b      	ldrh	r3, [r3, #26]
 801eaea:	f043 0380 	orr.w	r3, r3, #128	@ 0x80
 801eaee:	b29a      	uxth	r2, r3
 801eaf0:	687b      	ldr	r3, [r7, #4]
 801eaf2:	835a      	strh	r2, [r3, #26]
    return ERR_MEM;
 801eaf4:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 801eaf8:	e024      	b.n	801eb44 <tcp_write_checks+0xd8>
  }
  if (pcb->snd_queuelen != 0) {
 801eafa:	687b      	ldr	r3, [r7, #4]
 801eafc:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 801eb00:	2b00      	cmp	r3, #0
 801eb02:	d00f      	beq.n	801eb24 <tcp_write_checks+0xb8>
    LWIP_ASSERT("tcp_write: pbufs on queue => at least one queue non-empty",
 801eb04:	687b      	ldr	r3, [r7, #4]
 801eb06:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801eb08:	2b00      	cmp	r3, #0
 801eb0a:	d11a      	bne.n	801eb42 <tcp_write_checks+0xd6>
 801eb0c:	687b      	ldr	r3, [r7, #4]
 801eb0e:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801eb10:	2b00      	cmp	r3, #0
 801eb12:	d116      	bne.n	801eb42 <tcp_write_checks+0xd6>
 801eb14:	4b0d      	ldr	r3, [pc, #52]	@ (801eb4c <tcp_write_checks+0xe0>)
 801eb16:	f240 1255 	movw	r2, #341	@ 0x155
 801eb1a:	490f      	ldr	r1, [pc, #60]	@ (801eb58 <tcp_write_checks+0xec>)
 801eb1c:	480d      	ldr	r0, [pc, #52]	@ (801eb54 <tcp_write_checks+0xe8>)
 801eb1e:	f00a fcf5 	bl	802950c <iprintf>
 801eb22:	e00e      	b.n	801eb42 <tcp_write_checks+0xd6>
                pcb->unacked != NULL || pcb->unsent != NULL);
  } else {
    LWIP_ASSERT("tcp_write: no pbufs on queue => both queues empty",
 801eb24:	687b      	ldr	r3, [r7, #4]
 801eb26:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801eb28:	2b00      	cmp	r3, #0
 801eb2a:	d103      	bne.n	801eb34 <tcp_write_checks+0xc8>
 801eb2c:	687b      	ldr	r3, [r7, #4]
 801eb2e:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801eb30:	2b00      	cmp	r3, #0
 801eb32:	d006      	beq.n	801eb42 <tcp_write_checks+0xd6>
 801eb34:	4b05      	ldr	r3, [pc, #20]	@ (801eb4c <tcp_write_checks+0xe0>)
 801eb36:	f44f 72ac 	mov.w	r2, #344	@ 0x158
 801eb3a:	4908      	ldr	r1, [pc, #32]	@ (801eb5c <tcp_write_checks+0xf0>)
 801eb3c:	4805      	ldr	r0, [pc, #20]	@ (801eb54 <tcp_write_checks+0xe8>)
 801eb3e:	f00a fce5 	bl	802950c <iprintf>
                pcb->unacked == NULL && pcb->unsent == NULL);
  }
  return ERR_OK;
 801eb42:	2300      	movs	r3, #0
}
 801eb44:	4618      	mov	r0, r3
 801eb46:	3708      	adds	r7, #8
 801eb48:	46bd      	mov	sp, r7
 801eb4a:	bd80      	pop	{r7, pc}
 801eb4c:	0802ed24 	.word	0x0802ed24
 801eb50:	0802ee34 	.word	0x0802ee34
 801eb54:	0802ed78 	.word	0x0802ed78
 801eb58:	0802ee54 	.word	0x0802ee54
 801eb5c:	0802ee90 	.word	0x0802ee90

0801eb60 <tcp_write>:
 * - TCP_WRITE_FLAG_MORE (0x02) for TCP connection, PSH flag will not be set on last segment sent,
 * @return ERR_OK if enqueued, another err_t on error
 */
err_t
tcp_write(struct tcp_pcb *pcb, const void *arg, u16_t len, u8_t apiflags)
{
 801eb60:	b590      	push	{r4, r7, lr}
 801eb62:	b09d      	sub	sp, #116	@ 0x74
 801eb64:	af04      	add	r7, sp, #16
 801eb66:	60f8      	str	r0, [r7, #12]
 801eb68:	60b9      	str	r1, [r7, #8]
 801eb6a:	4611      	mov	r1, r2
 801eb6c:	461a      	mov	r2, r3
 801eb6e:	460b      	mov	r3, r1
 801eb70:	80fb      	strh	r3, [r7, #6]
 801eb72:	4613      	mov	r3, r2
 801eb74:	717b      	strb	r3, [r7, #5]
  struct pbuf *concat_p = NULL;
 801eb76:	2300      	movs	r3, #0
 801eb78:	63fb      	str	r3, [r7, #60]	@ 0x3c
  struct tcp_seg *last_unsent = NULL, *seg = NULL, *prev_seg = NULL, *queue = NULL;
 801eb7a:	2300      	movs	r3, #0
 801eb7c:	643b      	str	r3, [r7, #64]	@ 0x40
 801eb7e:	2300      	movs	r3, #0
 801eb80:	657b      	str	r3, [r7, #84]	@ 0x54
 801eb82:	2300      	movs	r3, #0
 801eb84:	653b      	str	r3, [r7, #80]	@ 0x50
 801eb86:	2300      	movs	r3, #0
 801eb88:	64fb      	str	r3, [r7, #76]	@ 0x4c
  u16_t pos = 0; /* position in 'arg' data */
 801eb8a:	2300      	movs	r3, #0
 801eb8c:	f8a7 304a 	strh.w	r3, [r7, #74]	@ 0x4a
  u16_t queuelen;
  u8_t optlen;
  u8_t optflags = 0;
 801eb90:	2300      	movs	r3, #0
 801eb92:	f887 302b 	strb.w	r3, [r7, #43]	@ 0x2b
#if TCP_OVERSIZE
  u16_t oversize = 0;
 801eb96:	2300      	movs	r3, #0
 801eb98:	82fb      	strh	r3, [r7, #22]
  u16_t oversize_used = 0;
 801eb9a:	2300      	movs	r3, #0
 801eb9c:	f8a7 3046 	strh.w	r3, [r7, #70]	@ 0x46
#if TCP_OVERSIZE_DBGCHECK
  u16_t oversize_add = 0;
 801eba0:	2300      	movs	r3, #0
 801eba2:	f8a7 305a 	strh.w	r3, [r7, #90]	@ 0x5a
#endif /* TCP_OVERSIZE_DBGCHECK*/
#endif /* TCP_OVERSIZE */
  u16_t extendlen = 0;
 801eba6:	2300      	movs	r3, #0
 801eba8:	f8a7 305e 	strh.w	r3, [r7, #94]	@ 0x5e
  u16_t concat_chksummed = 0;
#endif /* TCP_CHECKSUM_ON_COPY */
  err_t err;
  u16_t mss_local;

  LWIP_ERROR("tcp_write: invalid pcb", pcb != NULL, return ERR_ARG);
 801ebac:	68fb      	ldr	r3, [r7, #12]
 801ebae:	2b00      	cmp	r3, #0
 801ebb0:	d109      	bne.n	801ebc6 <tcp_write+0x66>
 801ebb2:	4b9d      	ldr	r3, [pc, #628]	@ (801ee28 <tcp_write+0x2c8>)
 801ebb4:	f44f 72cf 	mov.w	r2, #414	@ 0x19e
 801ebb8:	499c      	ldr	r1, [pc, #624]	@ (801ee2c <tcp_write+0x2cc>)
 801ebba:	489d      	ldr	r0, [pc, #628]	@ (801ee30 <tcp_write+0x2d0>)
 801ebbc:	f00a fca6 	bl	802950c <iprintf>
 801ebc0:	f06f 030f 	mvn.w	r3, #15
 801ebc4:	e37b      	b.n	801f2be <tcp_write+0x75e>

  /* don't allocate segments bigger than half the maximum window we ever received */
  mss_local = LWIP_MIN(pcb->mss, TCPWND_MIN16(pcb->snd_wnd_max / 2));
 801ebc6:	68fb      	ldr	r3, [r7, #12]
 801ebc8:	f8b3 3062 	ldrh.w	r3, [r3, #98]	@ 0x62
 801ebcc:	085b      	lsrs	r3, r3, #1
 801ebce:	b29a      	uxth	r2, r3
 801ebd0:	68fb      	ldr	r3, [r7, #12]
 801ebd2:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801ebd4:	4293      	cmp	r3, r2
 801ebd6:	bf28      	it	cs
 801ebd8:	4613      	movcs	r3, r2
 801ebda:	853b      	strh	r3, [r7, #40]	@ 0x28
  mss_local = mss_local ? mss_local : pcb->mss;
 801ebdc:	8d3b      	ldrh	r3, [r7, #40]	@ 0x28
 801ebde:	2b00      	cmp	r3, #0
 801ebe0:	d102      	bne.n	801ebe8 <tcp_write+0x88>
 801ebe2:	68fb      	ldr	r3, [r7, #12]
 801ebe4:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801ebe6:	e000      	b.n	801ebea <tcp_write+0x8a>
 801ebe8:	8d3b      	ldrh	r3, [r7, #40]	@ 0x28
 801ebea:	853b      	strh	r3, [r7, #40]	@ 0x28

  LWIP_ASSERT_CORE_LOCKED();
 801ebec:	f7f1 fa40 	bl	8010070 <sys_check_core_locking>
  apiflags |= TCP_WRITE_FLAG_COPY;
#endif /* LWIP_NETIF_TX_SINGLE_PBUF */

  LWIP_DEBUGF(TCP_OUTPUT_DEBUG, ("tcp_write(pcb=%p, data=%p, len=%"U16_F", apiflags=%"U16_F")\n",
                                 (void *)pcb, arg, len, (u16_t)apiflags));
  LWIP_ERROR("tcp_write: arg == NULL (programmer violates API)",
 801ebf0:	68bb      	ldr	r3, [r7, #8]
 801ebf2:	2b00      	cmp	r3, #0
 801ebf4:	d109      	bne.n	801ec0a <tcp_write+0xaa>
 801ebf6:	4b8c      	ldr	r3, [pc, #560]	@ (801ee28 <tcp_write+0x2c8>)
 801ebf8:	f240 12ad 	movw	r2, #429	@ 0x1ad
 801ebfc:	498d      	ldr	r1, [pc, #564]	@ (801ee34 <tcp_write+0x2d4>)
 801ebfe:	488c      	ldr	r0, [pc, #560]	@ (801ee30 <tcp_write+0x2d0>)
 801ec00:	f00a fc84 	bl	802950c <iprintf>
 801ec04:	f06f 030f 	mvn.w	r3, #15
 801ec08:	e359      	b.n	801f2be <tcp_write+0x75e>
             arg != NULL, return ERR_ARG;);

  err = tcp_write_checks(pcb, len);
 801ec0a:	88fb      	ldrh	r3, [r7, #6]
 801ec0c:	4619      	mov	r1, r3
 801ec0e:	68f8      	ldr	r0, [r7, #12]
 801ec10:	f7ff ff2c 	bl	801ea6c <tcp_write_checks>
 801ec14:	4603      	mov	r3, r0
 801ec16:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
  if (err != ERR_OK) {
 801ec1a:	f997 3027 	ldrsb.w	r3, [r7, #39]	@ 0x27
 801ec1e:	2b00      	cmp	r3, #0
 801ec20:	d002      	beq.n	801ec28 <tcp_write+0xc8>
    return err;
 801ec22:	f997 3027 	ldrsb.w	r3, [r7, #39]	@ 0x27
 801ec26:	e34a      	b.n	801f2be <tcp_write+0x75e>
  }
  queuelen = pcb->snd_queuelen;
 801ec28:	68fb      	ldr	r3, [r7, #12]
 801ec2a:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 801ec2e:	f8a7 3048 	strh.w	r3, [r7, #72]	@ 0x48
    /* ensure that segments can hold at least one data byte... */
    mss_local = LWIP_MAX(mss_local, LWIP_TCP_OPT_LEN_TS + 1);
  } else
#endif /* LWIP_TCP_TIMESTAMPS */
  {
    optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(0, pcb);
 801ec32:	2300      	movs	r3, #0
 801ec34:	f887 3026 	strb.w	r3, [r7, #38]	@ 0x26
   *
   * pos records progress as data is segmented.
   */

  /* Find the tail of the unsent queue. */
  if (pcb->unsent != NULL) {
 801ec38:	68fb      	ldr	r3, [r7, #12]
 801ec3a:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801ec3c:	2b00      	cmp	r3, #0
 801ec3e:	f000 8127 	beq.w	801ee90 <tcp_write+0x330>
    u16_t space;
    u16_t unsent_optlen;

    /* @todo: this could be sped up by keeping last_unsent in the pcb */
    for (last_unsent = pcb->unsent; last_unsent->next != NULL;
 801ec42:	68fb      	ldr	r3, [r7, #12]
 801ec44:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801ec46:	643b      	str	r3, [r7, #64]	@ 0x40
 801ec48:	e002      	b.n	801ec50 <tcp_write+0xf0>
         last_unsent = last_unsent->next);
 801ec4a:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801ec4c:	681b      	ldr	r3, [r3, #0]
 801ec4e:	643b      	str	r3, [r7, #64]	@ 0x40
    for (last_unsent = pcb->unsent; last_unsent->next != NULL;
 801ec50:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801ec52:	681b      	ldr	r3, [r3, #0]
 801ec54:	2b00      	cmp	r3, #0
 801ec56:	d1f8      	bne.n	801ec4a <tcp_write+0xea>

    /* Usable space at the end of the last unsent segment */
    unsent_optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(last_unsent->flags, pcb);
 801ec58:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801ec5a:	7b1b      	ldrb	r3, [r3, #12]
 801ec5c:	009b      	lsls	r3, r3, #2
 801ec5e:	b29b      	uxth	r3, r3
 801ec60:	f003 0304 	and.w	r3, r3, #4
 801ec64:	84bb      	strh	r3, [r7, #36]	@ 0x24
    LWIP_ASSERT("mss_local is too small", mss_local >= last_unsent->len + unsent_optlen);
 801ec66:	8d3a      	ldrh	r2, [r7, #40]	@ 0x28
 801ec68:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801ec6a:	891b      	ldrh	r3, [r3, #8]
 801ec6c:	4619      	mov	r1, r3
 801ec6e:	8cbb      	ldrh	r3, [r7, #36]	@ 0x24
 801ec70:	440b      	add	r3, r1
 801ec72:	429a      	cmp	r2, r3
 801ec74:	da06      	bge.n	801ec84 <tcp_write+0x124>
 801ec76:	4b6c      	ldr	r3, [pc, #432]	@ (801ee28 <tcp_write+0x2c8>)
 801ec78:	f44f 72f3 	mov.w	r2, #486	@ 0x1e6
 801ec7c:	496e      	ldr	r1, [pc, #440]	@ (801ee38 <tcp_write+0x2d8>)
 801ec7e:	486c      	ldr	r0, [pc, #432]	@ (801ee30 <tcp_write+0x2d0>)
 801ec80:	f00a fc44 	bl	802950c <iprintf>
    space = mss_local - (last_unsent->len + unsent_optlen);
 801ec84:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801ec86:	891a      	ldrh	r2, [r3, #8]
 801ec88:	8cbb      	ldrh	r3, [r7, #36]	@ 0x24
 801ec8a:	4413      	add	r3, r2
 801ec8c:	b29b      	uxth	r3, r3
 801ec8e:	8d3a      	ldrh	r2, [r7, #40]	@ 0x28
 801ec90:	1ad3      	subs	r3, r2, r3
 801ec92:	f8a7 305c 	strh.w	r3, [r7, #92]	@ 0x5c
     * function.
     */
#if TCP_OVERSIZE
#if TCP_OVERSIZE_DBGCHECK
    /* check that pcb->unsent_oversize matches last_unsent->oversize_left */
    LWIP_ASSERT("unsent_oversize mismatch (pcb vs. last_unsent)",
 801ec96:	68fb      	ldr	r3, [r7, #12]
 801ec98:	f8b3 2068 	ldrh.w	r2, [r3, #104]	@ 0x68
 801ec9c:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801ec9e:	895b      	ldrh	r3, [r3, #10]
 801eca0:	429a      	cmp	r2, r3
 801eca2:	d006      	beq.n	801ecb2 <tcp_write+0x152>
 801eca4:	4b60      	ldr	r3, [pc, #384]	@ (801ee28 <tcp_write+0x2c8>)
 801eca6:	f240 12f3 	movw	r2, #499	@ 0x1f3
 801ecaa:	4964      	ldr	r1, [pc, #400]	@ (801ee3c <tcp_write+0x2dc>)
 801ecac:	4860      	ldr	r0, [pc, #384]	@ (801ee30 <tcp_write+0x2d0>)
 801ecae:	f00a fc2d 	bl	802950c <iprintf>
                pcb->unsent_oversize == last_unsent->oversize_left);
#endif /* TCP_OVERSIZE_DBGCHECK */
    oversize = pcb->unsent_oversize;
 801ecb2:	68fb      	ldr	r3, [r7, #12]
 801ecb4:	f8b3 3068 	ldrh.w	r3, [r3, #104]	@ 0x68
 801ecb8:	82fb      	strh	r3, [r7, #22]
    if (oversize > 0) {
 801ecba:	8afb      	ldrh	r3, [r7, #22]
 801ecbc:	2b00      	cmp	r3, #0
 801ecbe:	d02e      	beq.n	801ed1e <tcp_write+0x1be>
      LWIP_ASSERT("inconsistent oversize vs. space", oversize <= space);
 801ecc0:	8afb      	ldrh	r3, [r7, #22]
 801ecc2:	f8b7 205c 	ldrh.w	r2, [r7, #92]	@ 0x5c
 801ecc6:	429a      	cmp	r2, r3
 801ecc8:	d206      	bcs.n	801ecd8 <tcp_write+0x178>
 801ecca:	4b57      	ldr	r3, [pc, #348]	@ (801ee28 <tcp_write+0x2c8>)
 801eccc:	f44f 72fc 	mov.w	r2, #504	@ 0x1f8
 801ecd0:	495b      	ldr	r1, [pc, #364]	@ (801ee40 <tcp_write+0x2e0>)
 801ecd2:	4857      	ldr	r0, [pc, #348]	@ (801ee30 <tcp_write+0x2d0>)
 801ecd4:	f00a fc1a 	bl	802950c <iprintf>
      seg = last_unsent;
 801ecd8:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801ecda:	657b      	str	r3, [r7, #84]	@ 0x54
      oversize_used = LWIP_MIN(space, LWIP_MIN(oversize, len));
 801ecdc:	8afb      	ldrh	r3, [r7, #22]
 801ecde:	88fa      	ldrh	r2, [r7, #6]
 801ece0:	4293      	cmp	r3, r2
 801ece2:	bf28      	it	cs
 801ece4:	4613      	movcs	r3, r2
 801ece6:	b29b      	uxth	r3, r3
 801ece8:	f8b7 205c 	ldrh.w	r2, [r7, #92]	@ 0x5c
 801ecec:	4293      	cmp	r3, r2
 801ecee:	bf28      	it	cs
 801ecf0:	4613      	movcs	r3, r2
 801ecf2:	f8a7 3046 	strh.w	r3, [r7, #70]	@ 0x46
      pos += oversize_used;
 801ecf6:	f8b7 204a 	ldrh.w	r2, [r7, #74]	@ 0x4a
 801ecfa:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 801ecfe:	4413      	add	r3, r2
 801ed00:	f8a7 304a 	strh.w	r3, [r7, #74]	@ 0x4a
      oversize -= oversize_used;
 801ed04:	8afa      	ldrh	r2, [r7, #22]
 801ed06:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 801ed0a:	1ad3      	subs	r3, r2, r3
 801ed0c:	b29b      	uxth	r3, r3
 801ed0e:	82fb      	strh	r3, [r7, #22]
      space -= oversize_used;
 801ed10:	f8b7 205c 	ldrh.w	r2, [r7, #92]	@ 0x5c
 801ed14:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 801ed18:	1ad3      	subs	r3, r2, r3
 801ed1a:	f8a7 305c 	strh.w	r3, [r7, #92]	@ 0x5c
    }
    /* now we are either finished or oversize is zero */
    LWIP_ASSERT("inconsistent oversize vs. len", (oversize == 0) || (pos == len));
 801ed1e:	8afb      	ldrh	r3, [r7, #22]
 801ed20:	2b00      	cmp	r3, #0
 801ed22:	d00b      	beq.n	801ed3c <tcp_write+0x1dc>
 801ed24:	f8b7 204a 	ldrh.w	r2, [r7, #74]	@ 0x4a
 801ed28:	88fb      	ldrh	r3, [r7, #6]
 801ed2a:	429a      	cmp	r2, r3
 801ed2c:	d006      	beq.n	801ed3c <tcp_write+0x1dc>
 801ed2e:	4b3e      	ldr	r3, [pc, #248]	@ (801ee28 <tcp_write+0x2c8>)
 801ed30:	f44f 7200 	mov.w	r2, #512	@ 0x200
 801ed34:	4943      	ldr	r1, [pc, #268]	@ (801ee44 <tcp_write+0x2e4>)
 801ed36:	483e      	ldr	r0, [pc, #248]	@ (801ee30 <tcp_write+0x2d0>)
 801ed38:	f00a fbe8 	bl	802950c <iprintf>
     *
     * This phase is skipped for LWIP_NETIF_TX_SINGLE_PBUF as we could only execute
     * it after rexmit puts a segment from unacked to unsent and at this point,
     * oversize info is lost.
     */
    if ((pos < len) && (space > 0) && (last_unsent->len > 0)) {
 801ed3c:	f8b7 204a 	ldrh.w	r2, [r7, #74]	@ 0x4a
 801ed40:	88fb      	ldrh	r3, [r7, #6]
 801ed42:	429a      	cmp	r2, r3
 801ed44:	f080 8172 	bcs.w	801f02c <tcp_write+0x4cc>
 801ed48:	f8b7 305c 	ldrh.w	r3, [r7, #92]	@ 0x5c
 801ed4c:	2b00      	cmp	r3, #0
 801ed4e:	f000 816d 	beq.w	801f02c <tcp_write+0x4cc>
 801ed52:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801ed54:	891b      	ldrh	r3, [r3, #8]
 801ed56:	2b00      	cmp	r3, #0
 801ed58:	f000 8168 	beq.w	801f02c <tcp_write+0x4cc>
      u16_t seglen = LWIP_MIN(space, len - pos);
 801ed5c:	88fa      	ldrh	r2, [r7, #6]
 801ed5e:	f8b7 304a 	ldrh.w	r3, [r7, #74]	@ 0x4a
 801ed62:	1ad2      	subs	r2, r2, r3
 801ed64:	f8b7 305c 	ldrh.w	r3, [r7, #92]	@ 0x5c
 801ed68:	4293      	cmp	r3, r2
 801ed6a:	bfa8      	it	ge
 801ed6c:	4613      	movge	r3, r2
 801ed6e:	847b      	strh	r3, [r7, #34]	@ 0x22
      seg = last_unsent;
 801ed70:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801ed72:	657b      	str	r3, [r7, #84]	@ 0x54

      /* Create a pbuf with a copy or reference to seglen bytes. We
       * can use PBUF_RAW here since the data appears in the middle of
       * a segment. A header will never be prepended. */
      if (apiflags & TCP_WRITE_FLAG_COPY) {
 801ed74:	797b      	ldrb	r3, [r7, #5]
 801ed76:	f003 0301 	and.w	r3, r3, #1
 801ed7a:	2b00      	cmp	r3, #0
 801ed7c:	d02b      	beq.n	801edd6 <tcp_write+0x276>
        /* Data is copied */
        if ((concat_p = tcp_pbuf_prealloc(PBUF_RAW, seglen, space, &oversize, pcb, apiflags, 1)) == NULL) {
 801ed7e:	f107 0016 	add.w	r0, r7, #22
 801ed82:	f8b7 205c 	ldrh.w	r2, [r7, #92]	@ 0x5c
 801ed86:	8c79      	ldrh	r1, [r7, #34]	@ 0x22
 801ed88:	2301      	movs	r3, #1
 801ed8a:	9302      	str	r3, [sp, #8]
 801ed8c:	797b      	ldrb	r3, [r7, #5]
 801ed8e:	9301      	str	r3, [sp, #4]
 801ed90:	68fb      	ldr	r3, [r7, #12]
 801ed92:	9300      	str	r3, [sp, #0]
 801ed94:	4603      	mov	r3, r0
 801ed96:	2000      	movs	r0, #0
 801ed98:	f7ff fdee 	bl	801e978 <tcp_pbuf_prealloc>
 801ed9c:	63f8      	str	r0, [r7, #60]	@ 0x3c
 801ed9e:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801eda0:	2b00      	cmp	r3, #0
 801eda2:	f000 825a 	beq.w	801f25a <tcp_write+0x6fa>
                      ("tcp_write : could not allocate memory for pbuf copy size %"U16_F"\n",
                       seglen));
          goto memerr;
        }
#if TCP_OVERSIZE_DBGCHECK
        oversize_add = oversize;
 801eda6:	8afb      	ldrh	r3, [r7, #22]
 801eda8:	f8a7 305a 	strh.w	r3, [r7, #90]	@ 0x5a
#endif /* TCP_OVERSIZE_DBGCHECK */
        TCP_DATA_COPY2(concat_p->payload, (const u8_t *)arg + pos, seglen, &concat_chksum, &concat_chksum_swapped);
 801edac:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801edae:	6858      	ldr	r0, [r3, #4]
 801edb0:	f8b7 304a 	ldrh.w	r3, [r7, #74]	@ 0x4a
 801edb4:	68ba      	ldr	r2, [r7, #8]
 801edb6:	4413      	add	r3, r2
 801edb8:	8c7a      	ldrh	r2, [r7, #34]	@ 0x22
 801edba:	4619      	mov	r1, r3
 801edbc:	f00a fe2f 	bl	8029a1e <memcpy>
#if TCP_CHECKSUM_ON_COPY
        concat_chksummed += seglen;
#endif /* TCP_CHECKSUM_ON_COPY */
        queuelen += pbuf_clen(concat_p);
 801edc0:	6bf8      	ldr	r0, [r7, #60]	@ 0x3c
 801edc2:	f7fb f9b9 	bl	801a138 <pbuf_clen>
 801edc6:	4603      	mov	r3, r0
 801edc8:	461a      	mov	r2, r3
 801edca:	f8b7 3048 	ldrh.w	r3, [r7, #72]	@ 0x48
 801edce:	4413      	add	r3, r2
 801edd0:	f8a7 3048 	strh.w	r3, [r7, #72]	@ 0x48
 801edd4:	e055      	b.n	801ee82 <tcp_write+0x322>
      } else {
        /* Data is not copied */
        /* If the last unsent pbuf is of type PBUF_ROM, try to extend it. */
        struct pbuf *p;
        for (p = last_unsent->p; p->next != NULL; p = p->next);
 801edd6:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801edd8:	685b      	ldr	r3, [r3, #4]
 801edda:	63bb      	str	r3, [r7, #56]	@ 0x38
 801eddc:	e002      	b.n	801ede4 <tcp_write+0x284>
 801edde:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801ede0:	681b      	ldr	r3, [r3, #0]
 801ede2:	63bb      	str	r3, [r7, #56]	@ 0x38
 801ede4:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801ede6:	681b      	ldr	r3, [r3, #0]
 801ede8:	2b00      	cmp	r3, #0
 801edea:	d1f8      	bne.n	801edde <tcp_write+0x27e>
        if (((p->type_internal & (PBUF_TYPE_FLAG_STRUCT_DATA_CONTIGUOUS | PBUF_TYPE_FLAG_DATA_VOLATILE)) == 0) &&
 801edec:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801edee:	7b1b      	ldrb	r3, [r3, #12]
 801edf0:	f003 03c0 	and.w	r3, r3, #192	@ 0xc0
 801edf4:	2b00      	cmp	r3, #0
 801edf6:	d129      	bne.n	801ee4c <tcp_write+0x2ec>
            (const u8_t *)p->payload + p->len == (const u8_t *)arg) {
 801edf8:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801edfa:	685b      	ldr	r3, [r3, #4]
 801edfc:	6bba      	ldr	r2, [r7, #56]	@ 0x38
 801edfe:	8952      	ldrh	r2, [r2, #10]
 801ee00:	4413      	add	r3, r2
        if (((p->type_internal & (PBUF_TYPE_FLAG_STRUCT_DATA_CONTIGUOUS | PBUF_TYPE_FLAG_DATA_VOLATILE)) == 0) &&
 801ee02:	68ba      	ldr	r2, [r7, #8]
 801ee04:	429a      	cmp	r2, r3
 801ee06:	d121      	bne.n	801ee4c <tcp_write+0x2ec>
          LWIP_ASSERT("tcp_write: ROM pbufs cannot be oversized", pos == 0);
 801ee08:	f8b7 304a 	ldrh.w	r3, [r7, #74]	@ 0x4a
 801ee0c:	2b00      	cmp	r3, #0
 801ee0e:	d006      	beq.n	801ee1e <tcp_write+0x2be>
 801ee10:	4b05      	ldr	r3, [pc, #20]	@ (801ee28 <tcp_write+0x2c8>)
 801ee12:	f240 2231 	movw	r2, #561	@ 0x231
 801ee16:	490c      	ldr	r1, [pc, #48]	@ (801ee48 <tcp_write+0x2e8>)
 801ee18:	4805      	ldr	r0, [pc, #20]	@ (801ee30 <tcp_write+0x2d0>)
 801ee1a:	f00a fb77 	bl	802950c <iprintf>
          extendlen = seglen;
 801ee1e:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 801ee20:	f8a7 305e 	strh.w	r3, [r7, #94]	@ 0x5e
 801ee24:	e02d      	b.n	801ee82 <tcp_write+0x322>
 801ee26:	bf00      	nop
 801ee28:	0802ed24 	.word	0x0802ed24
 801ee2c:	0802eec4 	.word	0x0802eec4
 801ee30:	0802ed78 	.word	0x0802ed78
 801ee34:	0802eedc 	.word	0x0802eedc
 801ee38:	0802ef10 	.word	0x0802ef10
 801ee3c:	0802ef28 	.word	0x0802ef28
 801ee40:	0802ef58 	.word	0x0802ef58
 801ee44:	0802ef78 	.word	0x0802ef78
 801ee48:	0802ef98 	.word	0x0802ef98
        } else {
          if ((concat_p = pbuf_alloc(PBUF_RAW, seglen, PBUF_ROM)) == NULL) {
 801ee4c:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 801ee4e:	2201      	movs	r2, #1
 801ee50:	4619      	mov	r1, r3
 801ee52:	2000      	movs	r0, #0
 801ee54:	f7fa fdcc 	bl	80199f0 <pbuf_alloc>
 801ee58:	63f8      	str	r0, [r7, #60]	@ 0x3c
 801ee5a:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801ee5c:	2b00      	cmp	r3, #0
 801ee5e:	f000 81fe 	beq.w	801f25e <tcp_write+0x6fe>
            LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SERIOUS,
                        ("tcp_write: could not allocate memory for zero-copy pbuf\n"));
            goto memerr;
          }
          /* reference the non-volatile payload data */
          ((struct pbuf_rom *)concat_p)->payload = (const u8_t *)arg + pos;
 801ee62:	f8b7 304a 	ldrh.w	r3, [r7, #74]	@ 0x4a
 801ee66:	68ba      	ldr	r2, [r7, #8]
 801ee68:	441a      	add	r2, r3
 801ee6a:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801ee6c:	605a      	str	r2, [r3, #4]
          queuelen += pbuf_clen(concat_p);
 801ee6e:	6bf8      	ldr	r0, [r7, #60]	@ 0x3c
 801ee70:	f7fb f962 	bl	801a138 <pbuf_clen>
 801ee74:	4603      	mov	r3, r0
 801ee76:	461a      	mov	r2, r3
 801ee78:	f8b7 3048 	ldrh.w	r3, [r7, #72]	@ 0x48
 801ee7c:	4413      	add	r3, r2
 801ee7e:	f8a7 3048 	strh.w	r3, [r7, #72]	@ 0x48
                           &concat_chksum, &concat_chksum_swapped);
        concat_chksummed += seglen;
#endif /* TCP_CHECKSUM_ON_COPY */
      }

      pos += seglen;
 801ee82:	f8b7 204a 	ldrh.w	r2, [r7, #74]	@ 0x4a
 801ee86:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 801ee88:	4413      	add	r3, r2
 801ee8a:	f8a7 304a 	strh.w	r3, [r7, #74]	@ 0x4a
 801ee8e:	e0cd      	b.n	801f02c <tcp_write+0x4cc>
    }
#endif /* !LWIP_NETIF_TX_SINGLE_PBUF */
  } else {
#if TCP_OVERSIZE
    LWIP_ASSERT("unsent_oversize mismatch (pcb->unsent is NULL)",
 801ee90:	68fb      	ldr	r3, [r7, #12]
 801ee92:	f8b3 3068 	ldrh.w	r3, [r3, #104]	@ 0x68
 801ee96:	2b00      	cmp	r3, #0
 801ee98:	f000 80c8 	beq.w	801f02c <tcp_write+0x4cc>
 801ee9c:	4b72      	ldr	r3, [pc, #456]	@ (801f068 <tcp_write+0x508>)
 801ee9e:	f240 224a 	movw	r2, #586	@ 0x24a
 801eea2:	4972      	ldr	r1, [pc, #456]	@ (801f06c <tcp_write+0x50c>)
 801eea4:	4872      	ldr	r0, [pc, #456]	@ (801f070 <tcp_write+0x510>)
 801eea6:	f00a fb31 	bl	802950c <iprintf>
   * Phase 3: Create new segments.
   *
   * The new segments are chained together in the local 'queue'
   * variable, ready to be appended to pcb->unsent.
   */
  while (pos < len) {
 801eeaa:	e0bf      	b.n	801f02c <tcp_write+0x4cc>
    struct pbuf *p;
    u16_t left = len - pos;
 801eeac:	88fa      	ldrh	r2, [r7, #6]
 801eeae:	f8b7 304a 	ldrh.w	r3, [r7, #74]	@ 0x4a
 801eeb2:	1ad3      	subs	r3, r2, r3
 801eeb4:	843b      	strh	r3, [r7, #32]
    u16_t max_len = mss_local - optlen;
 801eeb6:	f897 3026 	ldrb.w	r3, [r7, #38]	@ 0x26
 801eeba:	b29b      	uxth	r3, r3
 801eebc:	8d3a      	ldrh	r2, [r7, #40]	@ 0x28
 801eebe:	1ad3      	subs	r3, r2, r3
 801eec0:	83fb      	strh	r3, [r7, #30]
    u16_t seglen = LWIP_MIN(left, max_len);
 801eec2:	8bfa      	ldrh	r2, [r7, #30]
 801eec4:	8c3b      	ldrh	r3, [r7, #32]
 801eec6:	4293      	cmp	r3, r2
 801eec8:	bf28      	it	cs
 801eeca:	4613      	movcs	r3, r2
 801eecc:	83bb      	strh	r3, [r7, #28]
#if TCP_CHECKSUM_ON_COPY
    u16_t chksum = 0;
    u8_t chksum_swapped = 0;
#endif /* TCP_CHECKSUM_ON_COPY */

    if (apiflags & TCP_WRITE_FLAG_COPY) {
 801eece:	797b      	ldrb	r3, [r7, #5]
 801eed0:	f003 0301 	and.w	r3, r3, #1
 801eed4:	2b00      	cmp	r3, #0
 801eed6:	d036      	beq.n	801ef46 <tcp_write+0x3e6>
      /* If copy is set, memory should be allocated and data copied
       * into pbuf */
      if ((p = tcp_pbuf_prealloc(PBUF_TRANSPORT, seglen + optlen, mss_local, &oversize, pcb, apiflags, queue == NULL)) == NULL) {
 801eed8:	f897 3026 	ldrb.w	r3, [r7, #38]	@ 0x26
 801eedc:	b29a      	uxth	r2, r3
 801eede:	8bbb      	ldrh	r3, [r7, #28]
 801eee0:	4413      	add	r3, r2
 801eee2:	b299      	uxth	r1, r3
 801eee4:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 801eee6:	2b00      	cmp	r3, #0
 801eee8:	bf0c      	ite	eq
 801eeea:	2301      	moveq	r3, #1
 801eeec:	2300      	movne	r3, #0
 801eeee:	b2db      	uxtb	r3, r3
 801eef0:	f107 0016 	add.w	r0, r7, #22
 801eef4:	8d3a      	ldrh	r2, [r7, #40]	@ 0x28
 801eef6:	9302      	str	r3, [sp, #8]
 801eef8:	797b      	ldrb	r3, [r7, #5]
 801eefa:	9301      	str	r3, [sp, #4]
 801eefc:	68fb      	ldr	r3, [r7, #12]
 801eefe:	9300      	str	r3, [sp, #0]
 801ef00:	4603      	mov	r3, r0
 801ef02:	2036      	movs	r0, #54	@ 0x36
 801ef04:	f7ff fd38 	bl	801e978 <tcp_pbuf_prealloc>
 801ef08:	6378      	str	r0, [r7, #52]	@ 0x34
 801ef0a:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 801ef0c:	2b00      	cmp	r3, #0
 801ef0e:	f000 81a8 	beq.w	801f262 <tcp_write+0x702>
        LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("tcp_write : could not allocate memory for pbuf copy size %"U16_F"\n", seglen));
        goto memerr;
      }
      LWIP_ASSERT("tcp_write: check that first pbuf can hold the complete seglen",
 801ef12:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 801ef14:	895b      	ldrh	r3, [r3, #10]
 801ef16:	8bba      	ldrh	r2, [r7, #28]
 801ef18:	429a      	cmp	r2, r3
 801ef1a:	d906      	bls.n	801ef2a <tcp_write+0x3ca>
 801ef1c:	4b52      	ldr	r3, [pc, #328]	@ (801f068 <tcp_write+0x508>)
 801ef1e:	f240 2266 	movw	r2, #614	@ 0x266
 801ef22:	4954      	ldr	r1, [pc, #336]	@ (801f074 <tcp_write+0x514>)
 801ef24:	4852      	ldr	r0, [pc, #328]	@ (801f070 <tcp_write+0x510>)
 801ef26:	f00a faf1 	bl	802950c <iprintf>
                  (p->len >= seglen));
      TCP_DATA_COPY2((char *)p->payload + optlen, (const u8_t *)arg + pos, seglen, &chksum, &chksum_swapped);
 801ef2a:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 801ef2c:	685a      	ldr	r2, [r3, #4]
 801ef2e:	f897 3026 	ldrb.w	r3, [r7, #38]	@ 0x26
 801ef32:	18d0      	adds	r0, r2, r3
 801ef34:	f8b7 304a 	ldrh.w	r3, [r7, #74]	@ 0x4a
 801ef38:	68ba      	ldr	r2, [r7, #8]
 801ef3a:	4413      	add	r3, r2
 801ef3c:	8bba      	ldrh	r2, [r7, #28]
 801ef3e:	4619      	mov	r1, r3
 801ef40:	f00a fd6d 	bl	8029a1e <memcpy>
 801ef44:	e02f      	b.n	801efa6 <tcp_write+0x446>
       * sent out on the link (as it has to be ACKed by the remote
       * party) we can safely use PBUF_ROM instead of PBUF_REF here.
       */
      struct pbuf *p2;
#if TCP_OVERSIZE
      LWIP_ASSERT("oversize == 0", oversize == 0);
 801ef46:	8afb      	ldrh	r3, [r7, #22]
 801ef48:	2b00      	cmp	r3, #0
 801ef4a:	d006      	beq.n	801ef5a <tcp_write+0x3fa>
 801ef4c:	4b46      	ldr	r3, [pc, #280]	@ (801f068 <tcp_write+0x508>)
 801ef4e:	f240 2271 	movw	r2, #625	@ 0x271
 801ef52:	4949      	ldr	r1, [pc, #292]	@ (801f078 <tcp_write+0x518>)
 801ef54:	4846      	ldr	r0, [pc, #280]	@ (801f070 <tcp_write+0x510>)
 801ef56:	f00a fad9 	bl	802950c <iprintf>
#endif /* TCP_OVERSIZE */
      if ((p2 = pbuf_alloc(PBUF_TRANSPORT, seglen, PBUF_ROM)) == NULL) {
 801ef5a:	8bbb      	ldrh	r3, [r7, #28]
 801ef5c:	2201      	movs	r2, #1
 801ef5e:	4619      	mov	r1, r3
 801ef60:	2036      	movs	r0, #54	@ 0x36
 801ef62:	f7fa fd45 	bl	80199f0 <pbuf_alloc>
 801ef66:	61b8      	str	r0, [r7, #24]
 801ef68:	69bb      	ldr	r3, [r7, #24]
 801ef6a:	2b00      	cmp	r3, #0
 801ef6c:	f000 817b 	beq.w	801f266 <tcp_write+0x706>
        chksum_swapped = 1;
        chksum = SWAP_BYTES_IN_WORD(chksum);
      }
#endif /* TCP_CHECKSUM_ON_COPY */
      /* reference the non-volatile payload data */
      ((struct pbuf_rom *)p2)->payload = (const u8_t *)arg + pos;
 801ef70:	f8b7 304a 	ldrh.w	r3, [r7, #74]	@ 0x4a
 801ef74:	68ba      	ldr	r2, [r7, #8]
 801ef76:	441a      	add	r2, r3
 801ef78:	69bb      	ldr	r3, [r7, #24]
 801ef7a:	605a      	str	r2, [r3, #4]

      /* Second, allocate a pbuf for the headers. */
      if ((p = pbuf_alloc(PBUF_TRANSPORT, optlen, PBUF_RAM)) == NULL) {
 801ef7c:	f897 3026 	ldrb.w	r3, [r7, #38]	@ 0x26
 801ef80:	b29b      	uxth	r3, r3
 801ef82:	f44f 7220 	mov.w	r2, #640	@ 0x280
 801ef86:	4619      	mov	r1, r3
 801ef88:	2036      	movs	r0, #54	@ 0x36
 801ef8a:	f7fa fd31 	bl	80199f0 <pbuf_alloc>
 801ef8e:	6378      	str	r0, [r7, #52]	@ 0x34
 801ef90:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 801ef92:	2b00      	cmp	r3, #0
 801ef94:	d103      	bne.n	801ef9e <tcp_write+0x43e>
        /* If allocation fails, we have to deallocate the data pbuf as
         * well. */
        pbuf_free(p2);
 801ef96:	69b8      	ldr	r0, [r7, #24]
 801ef98:	f7fb f840 	bl	801a01c <pbuf_free>
        LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("tcp_write: could not allocate memory for header pbuf\n"));
        goto memerr;
 801ef9c:	e166      	b.n	801f26c <tcp_write+0x70c>
      }
      /* Concatenate the headers and data pbufs together. */
      pbuf_cat(p/*header*/, p2/*data*/);
 801ef9e:	69b9      	ldr	r1, [r7, #24]
 801efa0:	6b78      	ldr	r0, [r7, #52]	@ 0x34
 801efa2:	f7fb f909 	bl	801a1b8 <pbuf_cat>
    }

    queuelen += pbuf_clen(p);
 801efa6:	6b78      	ldr	r0, [r7, #52]	@ 0x34
 801efa8:	f7fb f8c6 	bl	801a138 <pbuf_clen>
 801efac:	4603      	mov	r3, r0
 801efae:	461a      	mov	r2, r3
 801efb0:	f8b7 3048 	ldrh.w	r3, [r7, #72]	@ 0x48
 801efb4:	4413      	add	r3, r2
 801efb6:	f8a7 3048 	strh.w	r3, [r7, #72]	@ 0x48

    /* Now that there are more segments queued, we check again if the
     * length of the queue exceeds the configured maximum or
     * overflows. */
    if (queuelen > LWIP_MIN(TCP_SND_QUEUELEN, TCP_SNDQUEUELEN_OVERFLOW)) {
 801efba:	f8b7 3048 	ldrh.w	r3, [r7, #72]	@ 0x48
 801efbe:	2b10      	cmp	r3, #16
 801efc0:	d903      	bls.n	801efca <tcp_write+0x46a>
      LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("tcp_write: queue too long %"U16_F" (%d)\n",
                  queuelen, (int)TCP_SND_QUEUELEN));
      pbuf_free(p);
 801efc2:	6b78      	ldr	r0, [r7, #52]	@ 0x34
 801efc4:	f7fb f82a 	bl	801a01c <pbuf_free>
      goto memerr;
 801efc8:	e150      	b.n	801f26c <tcp_write+0x70c>
    }

    if ((seg = tcp_create_segment(pcb, p, 0, pcb->snd_lbb + pos, optflags)) == NULL) {
 801efca:	68fb      	ldr	r3, [r7, #12]
 801efcc:	6dda      	ldr	r2, [r3, #92]	@ 0x5c
 801efce:	f8b7 304a 	ldrh.w	r3, [r7, #74]	@ 0x4a
 801efd2:	441a      	add	r2, r3
 801efd4:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 801efd8:	9300      	str	r3, [sp, #0]
 801efda:	4613      	mov	r3, r2
 801efdc:	2200      	movs	r2, #0
 801efde:	6b79      	ldr	r1, [r7, #52]	@ 0x34
 801efe0:	68f8      	ldr	r0, [r7, #12]
 801efe2:	f7ff fc29 	bl	801e838 <tcp_create_segment>
 801efe6:	6578      	str	r0, [r7, #84]	@ 0x54
 801efe8:	6d7b      	ldr	r3, [r7, #84]	@ 0x54
 801efea:	2b00      	cmp	r3, #0
 801efec:	f000 813d 	beq.w	801f26a <tcp_write+0x70a>
      goto memerr;
    }
#if TCP_OVERSIZE_DBGCHECK
    seg->oversize_left = oversize;
 801eff0:	8afa      	ldrh	r2, [r7, #22]
 801eff2:	6d7b      	ldr	r3, [r7, #84]	@ 0x54
 801eff4:	815a      	strh	r2, [r3, #10]
    seg->chksum_swapped = chksum_swapped;
    seg->flags |= TF_SEG_DATA_CHECKSUMMED;
#endif /* TCP_CHECKSUM_ON_COPY */

    /* first segment of to-be-queued data? */
    if (queue == NULL) {
 801eff6:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 801eff8:	2b00      	cmp	r3, #0
 801effa:	d102      	bne.n	801f002 <tcp_write+0x4a2>
      queue = seg;
 801effc:	6d7b      	ldr	r3, [r7, #84]	@ 0x54
 801effe:	64fb      	str	r3, [r7, #76]	@ 0x4c
 801f000:	e00c      	b.n	801f01c <tcp_write+0x4bc>
    } else {
      /* Attach the segment to the end of the queued segments */
      LWIP_ASSERT("prev_seg != NULL", prev_seg != NULL);
 801f002:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 801f004:	2b00      	cmp	r3, #0
 801f006:	d106      	bne.n	801f016 <tcp_write+0x4b6>
 801f008:	4b17      	ldr	r3, [pc, #92]	@ (801f068 <tcp_write+0x508>)
 801f00a:	f240 22ab 	movw	r2, #683	@ 0x2ab
 801f00e:	491b      	ldr	r1, [pc, #108]	@ (801f07c <tcp_write+0x51c>)
 801f010:	4817      	ldr	r0, [pc, #92]	@ (801f070 <tcp_write+0x510>)
 801f012:	f00a fa7b 	bl	802950c <iprintf>
      prev_seg->next = seg;
 801f016:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 801f018:	6d7a      	ldr	r2, [r7, #84]	@ 0x54
 801f01a:	601a      	str	r2, [r3, #0]
    }
    /* remember last segment of to-be-queued data for next iteration */
    prev_seg = seg;
 801f01c:	6d7b      	ldr	r3, [r7, #84]	@ 0x54
 801f01e:	653b      	str	r3, [r7, #80]	@ 0x50

    LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_TRACE, ("tcp_write: queueing %"U32_F":%"U32_F"\n",
                lwip_ntohl(seg->tcphdr->seqno),
                lwip_ntohl(seg->tcphdr->seqno) + TCP_TCPLEN(seg)));

    pos += seglen;
 801f020:	f8b7 204a 	ldrh.w	r2, [r7, #74]	@ 0x4a
 801f024:	8bbb      	ldrh	r3, [r7, #28]
 801f026:	4413      	add	r3, r2
 801f028:	f8a7 304a 	strh.w	r3, [r7, #74]	@ 0x4a
  while (pos < len) {
 801f02c:	f8b7 204a 	ldrh.w	r2, [r7, #74]	@ 0x4a
 801f030:	88fb      	ldrh	r3, [r7, #6]
 801f032:	429a      	cmp	r2, r3
 801f034:	f4ff af3a 	bcc.w	801eeac <tcp_write+0x34c>
  /*
   * All three segmentation phases were successful. We can commit the
   * transaction.
   */
#if TCP_OVERSIZE_DBGCHECK
  if ((last_unsent != NULL) && (oversize_add != 0)) {
 801f038:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801f03a:	2b00      	cmp	r3, #0
 801f03c:	d00b      	beq.n	801f056 <tcp_write+0x4f6>
 801f03e:	f8b7 305a 	ldrh.w	r3, [r7, #90]	@ 0x5a
 801f042:	2b00      	cmp	r3, #0
 801f044:	d007      	beq.n	801f056 <tcp_write+0x4f6>
    last_unsent->oversize_left += oversize_add;
 801f046:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801f048:	895a      	ldrh	r2, [r3, #10]
 801f04a:	f8b7 305a 	ldrh.w	r3, [r7, #90]	@ 0x5a
 801f04e:	4413      	add	r3, r2
 801f050:	b29a      	uxth	r2, r3
 801f052:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801f054:	815a      	strh	r2, [r3, #10]
  /*
   * Phase 1: If data has been added to the preallocated tail of
   * last_unsent, we update the length fields of the pbuf chain.
   */
#if TCP_OVERSIZE
  if (oversize_used > 0) {
 801f056:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 801f05a:	2b00      	cmp	r3, #0
 801f05c:	d052      	beq.n	801f104 <tcp_write+0x5a4>
    struct pbuf *p;
    /* Bump tot_len of whole chain, len of tail */
    for (p = last_unsent->p; p; p = p->next) {
 801f05e:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801f060:	685b      	ldr	r3, [r3, #4]
 801f062:	633b      	str	r3, [r7, #48]	@ 0x30
 801f064:	e02e      	b.n	801f0c4 <tcp_write+0x564>
 801f066:	bf00      	nop
 801f068:	0802ed24 	.word	0x0802ed24
 801f06c:	0802efc4 	.word	0x0802efc4
 801f070:	0802ed78 	.word	0x0802ed78
 801f074:	0802eff4 	.word	0x0802eff4
 801f078:	0802f034 	.word	0x0802f034
 801f07c:	0802f044 	.word	0x0802f044
      p->tot_len += oversize_used;
 801f080:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801f082:	891a      	ldrh	r2, [r3, #8]
 801f084:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 801f088:	4413      	add	r3, r2
 801f08a:	b29a      	uxth	r2, r3
 801f08c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801f08e:	811a      	strh	r2, [r3, #8]
      if (p->next == NULL) {
 801f090:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801f092:	681b      	ldr	r3, [r3, #0]
 801f094:	2b00      	cmp	r3, #0
 801f096:	d112      	bne.n	801f0be <tcp_write+0x55e>
        TCP_DATA_COPY((char *)p->payload + p->len, arg, oversize_used, last_unsent);
 801f098:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801f09a:	685b      	ldr	r3, [r3, #4]
 801f09c:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 801f09e:	8952      	ldrh	r2, [r2, #10]
 801f0a0:	4413      	add	r3, r2
 801f0a2:	f8b7 2046 	ldrh.w	r2, [r7, #70]	@ 0x46
 801f0a6:	68b9      	ldr	r1, [r7, #8]
 801f0a8:	4618      	mov	r0, r3
 801f0aa:	f00a fcb8 	bl	8029a1e <memcpy>
        p->len += oversize_used;
 801f0ae:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801f0b0:	895a      	ldrh	r2, [r3, #10]
 801f0b2:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 801f0b6:	4413      	add	r3, r2
 801f0b8:	b29a      	uxth	r2, r3
 801f0ba:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801f0bc:	815a      	strh	r2, [r3, #10]
    for (p = last_unsent->p; p; p = p->next) {
 801f0be:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801f0c0:	681b      	ldr	r3, [r3, #0]
 801f0c2:	633b      	str	r3, [r7, #48]	@ 0x30
 801f0c4:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801f0c6:	2b00      	cmp	r3, #0
 801f0c8:	d1da      	bne.n	801f080 <tcp_write+0x520>
      }
    }
    last_unsent->len += oversize_used;
 801f0ca:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801f0cc:	891a      	ldrh	r2, [r3, #8]
 801f0ce:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 801f0d2:	4413      	add	r3, r2
 801f0d4:	b29a      	uxth	r2, r3
 801f0d6:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801f0d8:	811a      	strh	r2, [r3, #8]
#if TCP_OVERSIZE_DBGCHECK
    LWIP_ASSERT("last_unsent->oversize_left >= oversize_used",
 801f0da:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801f0dc:	895b      	ldrh	r3, [r3, #10]
 801f0de:	f8b7 2046 	ldrh.w	r2, [r7, #70]	@ 0x46
 801f0e2:	429a      	cmp	r2, r3
 801f0e4:	d906      	bls.n	801f0f4 <tcp_write+0x594>
 801f0e6:	4b78      	ldr	r3, [pc, #480]	@ (801f2c8 <tcp_write+0x768>)
 801f0e8:	f240 22d3 	movw	r2, #723	@ 0x2d3
 801f0ec:	4977      	ldr	r1, [pc, #476]	@ (801f2cc <tcp_write+0x76c>)
 801f0ee:	4878      	ldr	r0, [pc, #480]	@ (801f2d0 <tcp_write+0x770>)
 801f0f0:	f00a fa0c 	bl	802950c <iprintf>
                last_unsent->oversize_left >= oversize_used);
    last_unsent->oversize_left -= oversize_used;
 801f0f4:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801f0f6:	895a      	ldrh	r2, [r3, #10]
 801f0f8:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 801f0fc:	1ad3      	subs	r3, r2, r3
 801f0fe:	b29a      	uxth	r2, r3
 801f100:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801f102:	815a      	strh	r2, [r3, #10]
#endif /* TCP_OVERSIZE_DBGCHECK */
  }
  pcb->unsent_oversize = oversize;
 801f104:	8afa      	ldrh	r2, [r7, #22]
 801f106:	68fb      	ldr	r3, [r7, #12]
 801f108:	f8a3 2068 	strh.w	r2, [r3, #104]	@ 0x68

  /*
   * Phase 2: concat_p can be concatenated onto last_unsent->p, unless we
   * determined that the last ROM pbuf can be extended to include the new data.
   */
  if (concat_p != NULL) {
 801f10c:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801f10e:	2b00      	cmp	r3, #0
 801f110:	d018      	beq.n	801f144 <tcp_write+0x5e4>
    LWIP_ASSERT("tcp_write: cannot concatenate when pcb->unsent is empty",
 801f112:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801f114:	2b00      	cmp	r3, #0
 801f116:	d106      	bne.n	801f126 <tcp_write+0x5c6>
 801f118:	4b6b      	ldr	r3, [pc, #428]	@ (801f2c8 <tcp_write+0x768>)
 801f11a:	f44f 7238 	mov.w	r2, #736	@ 0x2e0
 801f11e:	496d      	ldr	r1, [pc, #436]	@ (801f2d4 <tcp_write+0x774>)
 801f120:	486b      	ldr	r0, [pc, #428]	@ (801f2d0 <tcp_write+0x770>)
 801f122:	f00a f9f3 	bl	802950c <iprintf>
                (last_unsent != NULL));
    pbuf_cat(last_unsent->p, concat_p);
 801f126:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801f128:	685b      	ldr	r3, [r3, #4]
 801f12a:	6bf9      	ldr	r1, [r7, #60]	@ 0x3c
 801f12c:	4618      	mov	r0, r3
 801f12e:	f7fb f843 	bl	801a1b8 <pbuf_cat>
    last_unsent->len += concat_p->tot_len;
 801f132:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801f134:	891a      	ldrh	r2, [r3, #8]
 801f136:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801f138:	891b      	ldrh	r3, [r3, #8]
 801f13a:	4413      	add	r3, r2
 801f13c:	b29a      	uxth	r2, r3
 801f13e:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801f140:	811a      	strh	r2, [r3, #8]
 801f142:	e03c      	b.n	801f1be <tcp_write+0x65e>
  } else if (extendlen > 0) {
 801f144:	f8b7 305e 	ldrh.w	r3, [r7, #94]	@ 0x5e
 801f148:	2b00      	cmp	r3, #0
 801f14a:	d038      	beq.n	801f1be <tcp_write+0x65e>
    struct pbuf *p;
    LWIP_ASSERT("tcp_write: extension of reference requires reference",
 801f14c:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801f14e:	2b00      	cmp	r3, #0
 801f150:	d003      	beq.n	801f15a <tcp_write+0x5fa>
 801f152:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801f154:	685b      	ldr	r3, [r3, #4]
 801f156:	2b00      	cmp	r3, #0
 801f158:	d106      	bne.n	801f168 <tcp_write+0x608>
 801f15a:	4b5b      	ldr	r3, [pc, #364]	@ (801f2c8 <tcp_write+0x768>)
 801f15c:	f240 22e6 	movw	r2, #742	@ 0x2e6
 801f160:	495d      	ldr	r1, [pc, #372]	@ (801f2d8 <tcp_write+0x778>)
 801f162:	485b      	ldr	r0, [pc, #364]	@ (801f2d0 <tcp_write+0x770>)
 801f164:	f00a f9d2 	bl	802950c <iprintf>
                last_unsent != NULL && last_unsent->p != NULL);
    for (p = last_unsent->p; p->next != NULL; p = p->next) {
 801f168:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801f16a:	685b      	ldr	r3, [r3, #4]
 801f16c:	62fb      	str	r3, [r7, #44]	@ 0x2c
 801f16e:	e00a      	b.n	801f186 <tcp_write+0x626>
      p->tot_len += extendlen;
 801f170:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801f172:	891a      	ldrh	r2, [r3, #8]
 801f174:	f8b7 305e 	ldrh.w	r3, [r7, #94]	@ 0x5e
 801f178:	4413      	add	r3, r2
 801f17a:	b29a      	uxth	r2, r3
 801f17c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801f17e:	811a      	strh	r2, [r3, #8]
    for (p = last_unsent->p; p->next != NULL; p = p->next) {
 801f180:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801f182:	681b      	ldr	r3, [r3, #0]
 801f184:	62fb      	str	r3, [r7, #44]	@ 0x2c
 801f186:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801f188:	681b      	ldr	r3, [r3, #0]
 801f18a:	2b00      	cmp	r3, #0
 801f18c:	d1f0      	bne.n	801f170 <tcp_write+0x610>
    }
    p->tot_len += extendlen;
 801f18e:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801f190:	891a      	ldrh	r2, [r3, #8]
 801f192:	f8b7 305e 	ldrh.w	r3, [r7, #94]	@ 0x5e
 801f196:	4413      	add	r3, r2
 801f198:	b29a      	uxth	r2, r3
 801f19a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801f19c:	811a      	strh	r2, [r3, #8]
    p->len += extendlen;
 801f19e:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801f1a0:	895a      	ldrh	r2, [r3, #10]
 801f1a2:	f8b7 305e 	ldrh.w	r3, [r7, #94]	@ 0x5e
 801f1a6:	4413      	add	r3, r2
 801f1a8:	b29a      	uxth	r2, r3
 801f1aa:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801f1ac:	815a      	strh	r2, [r3, #10]
    last_unsent->len += extendlen;
 801f1ae:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801f1b0:	891a      	ldrh	r2, [r3, #8]
 801f1b2:	f8b7 305e 	ldrh.w	r3, [r7, #94]	@ 0x5e
 801f1b6:	4413      	add	r3, r2
 801f1b8:	b29a      	uxth	r2, r3
 801f1ba:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801f1bc:	811a      	strh	r2, [r3, #8]

  /*
   * Phase 3: Append queue to pcb->unsent. Queue may be NULL, but that
   * is harmless
   */
  if (last_unsent == NULL) {
 801f1be:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801f1c0:	2b00      	cmp	r3, #0
 801f1c2:	d103      	bne.n	801f1cc <tcp_write+0x66c>
    pcb->unsent = queue;
 801f1c4:	68fb      	ldr	r3, [r7, #12]
 801f1c6:	6cfa      	ldr	r2, [r7, #76]	@ 0x4c
 801f1c8:	66da      	str	r2, [r3, #108]	@ 0x6c
 801f1ca:	e002      	b.n	801f1d2 <tcp_write+0x672>
  } else {
    last_unsent->next = queue;
 801f1cc:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801f1ce:	6cfa      	ldr	r2, [r7, #76]	@ 0x4c
 801f1d0:	601a      	str	r2, [r3, #0]
  }

  /*
   * Finally update the pcb state.
   */
  pcb->snd_lbb += len;
 801f1d2:	68fb      	ldr	r3, [r7, #12]
 801f1d4:	6dda      	ldr	r2, [r3, #92]	@ 0x5c
 801f1d6:	88fb      	ldrh	r3, [r7, #6]
 801f1d8:	441a      	add	r2, r3
 801f1da:	68fb      	ldr	r3, [r7, #12]
 801f1dc:	65da      	str	r2, [r3, #92]	@ 0x5c
  pcb->snd_buf -= len;
 801f1de:	68fb      	ldr	r3, [r7, #12]
 801f1e0:	f8b3 2064 	ldrh.w	r2, [r3, #100]	@ 0x64
 801f1e4:	88fb      	ldrh	r3, [r7, #6]
 801f1e6:	1ad3      	subs	r3, r2, r3
 801f1e8:	b29a      	uxth	r2, r3
 801f1ea:	68fb      	ldr	r3, [r7, #12]
 801f1ec:	f8a3 2064 	strh.w	r2, [r3, #100]	@ 0x64
  pcb->snd_queuelen = queuelen;
 801f1f0:	68fb      	ldr	r3, [r7, #12]
 801f1f2:	f8b7 2048 	ldrh.w	r2, [r7, #72]	@ 0x48
 801f1f6:	f8a3 2066 	strh.w	r2, [r3, #102]	@ 0x66

  LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_write: %"S16_F" (after enqueued)\n",
                               pcb->snd_queuelen));
  if (pcb->snd_queuelen != 0) {
 801f1fa:	68fb      	ldr	r3, [r7, #12]
 801f1fc:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 801f200:	2b00      	cmp	r3, #0
 801f202:	d00e      	beq.n	801f222 <tcp_write+0x6c2>
    LWIP_ASSERT("tcp_write: valid queue length",
 801f204:	68fb      	ldr	r3, [r7, #12]
 801f206:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801f208:	2b00      	cmp	r3, #0
 801f20a:	d10a      	bne.n	801f222 <tcp_write+0x6c2>
 801f20c:	68fb      	ldr	r3, [r7, #12]
 801f20e:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801f210:	2b00      	cmp	r3, #0
 801f212:	d106      	bne.n	801f222 <tcp_write+0x6c2>
 801f214:	4b2c      	ldr	r3, [pc, #176]	@ (801f2c8 <tcp_write+0x768>)
 801f216:	f240 3212 	movw	r2, #786	@ 0x312
 801f21a:	4930      	ldr	r1, [pc, #192]	@ (801f2dc <tcp_write+0x77c>)
 801f21c:	482c      	ldr	r0, [pc, #176]	@ (801f2d0 <tcp_write+0x770>)
 801f21e:	f00a f975 	bl	802950c <iprintf>
                pcb->unacked != NULL || pcb->unsent != NULL);
  }

  /* Set the PSH flag in the last segment that we enqueued. */
  if (seg != NULL && seg->tcphdr != NULL && ((apiflags & TCP_WRITE_FLAG_MORE) == 0)) {
 801f222:	6d7b      	ldr	r3, [r7, #84]	@ 0x54
 801f224:	2b00      	cmp	r3, #0
 801f226:	d016      	beq.n	801f256 <tcp_write+0x6f6>
 801f228:	6d7b      	ldr	r3, [r7, #84]	@ 0x54
 801f22a:	691b      	ldr	r3, [r3, #16]
 801f22c:	2b00      	cmp	r3, #0
 801f22e:	d012      	beq.n	801f256 <tcp_write+0x6f6>
 801f230:	797b      	ldrb	r3, [r7, #5]
 801f232:	f003 0302 	and.w	r3, r3, #2
 801f236:	2b00      	cmp	r3, #0
 801f238:	d10d      	bne.n	801f256 <tcp_write+0x6f6>
    TCPH_SET_FLAG(seg->tcphdr, TCP_PSH);
 801f23a:	6d7b      	ldr	r3, [r7, #84]	@ 0x54
 801f23c:	691b      	ldr	r3, [r3, #16]
 801f23e:	899b      	ldrh	r3, [r3, #12]
 801f240:	b29c      	uxth	r4, r3
 801f242:	2008      	movs	r0, #8
 801f244:	f7f9 fa08 	bl	8018658 <lwip_htons>
 801f248:	4603      	mov	r3, r0
 801f24a:	461a      	mov	r2, r3
 801f24c:	6d7b      	ldr	r3, [r7, #84]	@ 0x54
 801f24e:	691b      	ldr	r3, [r3, #16]
 801f250:	4322      	orrs	r2, r4
 801f252:	b292      	uxth	r2, r2
 801f254:	819a      	strh	r2, [r3, #12]
  }

  return ERR_OK;
 801f256:	2300      	movs	r3, #0
 801f258:	e031      	b.n	801f2be <tcp_write+0x75e>
          goto memerr;
 801f25a:	bf00      	nop
 801f25c:	e006      	b.n	801f26c <tcp_write+0x70c>
            goto memerr;
 801f25e:	bf00      	nop
 801f260:	e004      	b.n	801f26c <tcp_write+0x70c>
        goto memerr;
 801f262:	bf00      	nop
 801f264:	e002      	b.n	801f26c <tcp_write+0x70c>
        goto memerr;
 801f266:	bf00      	nop
 801f268:	e000      	b.n	801f26c <tcp_write+0x70c>
      goto memerr;
 801f26a:	bf00      	nop
memerr:
  tcp_set_flags(pcb, TF_NAGLEMEMERR);
 801f26c:	68fb      	ldr	r3, [r7, #12]
 801f26e:	8b5b      	ldrh	r3, [r3, #26]
 801f270:	f043 0380 	orr.w	r3, r3, #128	@ 0x80
 801f274:	b29a      	uxth	r2, r3
 801f276:	68fb      	ldr	r3, [r7, #12]
 801f278:	835a      	strh	r2, [r3, #26]
  TCP_STATS_INC(tcp.memerr);

  if (concat_p != NULL) {
 801f27a:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801f27c:	2b00      	cmp	r3, #0
 801f27e:	d002      	beq.n	801f286 <tcp_write+0x726>
    pbuf_free(concat_p);
 801f280:	6bf8      	ldr	r0, [r7, #60]	@ 0x3c
 801f282:	f7fa fecb 	bl	801a01c <pbuf_free>
  }
  if (queue != NULL) {
 801f286:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 801f288:	2b00      	cmp	r3, #0
 801f28a:	d002      	beq.n	801f292 <tcp_write+0x732>
    tcp_segs_free(queue);
 801f28c:	6cf8      	ldr	r0, [r7, #76]	@ 0x4c
 801f28e:	f7fc fb09 	bl	801b8a4 <tcp_segs_free>
  }
  if (pcb->snd_queuelen != 0) {
 801f292:	68fb      	ldr	r3, [r7, #12]
 801f294:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 801f298:	2b00      	cmp	r3, #0
 801f29a:	d00e      	beq.n	801f2ba <tcp_write+0x75a>
    LWIP_ASSERT("tcp_write: valid queue length", pcb->unacked != NULL ||
 801f29c:	68fb      	ldr	r3, [r7, #12]
 801f29e:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801f2a0:	2b00      	cmp	r3, #0
 801f2a2:	d10a      	bne.n	801f2ba <tcp_write+0x75a>
 801f2a4:	68fb      	ldr	r3, [r7, #12]
 801f2a6:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801f2a8:	2b00      	cmp	r3, #0
 801f2aa:	d106      	bne.n	801f2ba <tcp_write+0x75a>
 801f2ac:	4b06      	ldr	r3, [pc, #24]	@ (801f2c8 <tcp_write+0x768>)
 801f2ae:	f240 3227 	movw	r2, #807	@ 0x327
 801f2b2:	490a      	ldr	r1, [pc, #40]	@ (801f2dc <tcp_write+0x77c>)
 801f2b4:	4806      	ldr	r0, [pc, #24]	@ (801f2d0 <tcp_write+0x770>)
 801f2b6:	f00a f929 	bl	802950c <iprintf>
                pcb->unsent != NULL);
  }
  LWIP_DEBUGF(TCP_QLEN_DEBUG | LWIP_DBG_STATE, ("tcp_write: %"S16_F" (with mem err)\n", pcb->snd_queuelen));
  return ERR_MEM;
 801f2ba:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
}
 801f2be:	4618      	mov	r0, r3
 801f2c0:	3764      	adds	r7, #100	@ 0x64
 801f2c2:	46bd      	mov	sp, r7
 801f2c4:	bd90      	pop	{r4, r7, pc}
 801f2c6:	bf00      	nop
 801f2c8:	0802ed24 	.word	0x0802ed24
 801f2cc:	0802f058 	.word	0x0802f058
 801f2d0:	0802ed78 	.word	0x0802ed78
 801f2d4:	0802f084 	.word	0x0802f084
 801f2d8:	0802f0bc 	.word	0x0802f0bc
 801f2dc:	0802f0f4 	.word	0x0802f0f4

0801f2e0 <tcp_split_unsent_seg>:
 * @param pcb the tcp_pcb for which to split the unsent head
 * @param split the amount of payload to remain in the head
 */
err_t
tcp_split_unsent_seg(struct tcp_pcb *pcb, u16_t split)
{
 801f2e0:	b590      	push	{r4, r7, lr}
 801f2e2:	b08b      	sub	sp, #44	@ 0x2c
 801f2e4:	af02      	add	r7, sp, #8
 801f2e6:	6078      	str	r0, [r7, #4]
 801f2e8:	460b      	mov	r3, r1
 801f2ea:	807b      	strh	r3, [r7, #2]
  struct tcp_seg *seg = NULL, *useg = NULL;
 801f2ec:	2300      	movs	r3, #0
 801f2ee:	61bb      	str	r3, [r7, #24]
 801f2f0:	2300      	movs	r3, #0
 801f2f2:	617b      	str	r3, [r7, #20]
  struct pbuf *p = NULL;
 801f2f4:	2300      	movs	r3, #0
 801f2f6:	613b      	str	r3, [r7, #16]
  u16_t chksum = 0;
  u8_t chksum_swapped = 0;
  struct pbuf *q;
#endif /* TCP_CHECKSUM_ON_COPY */

  LWIP_ASSERT("tcp_split_unsent_seg: invalid pcb", pcb != NULL);
 801f2f8:	687b      	ldr	r3, [r7, #4]
 801f2fa:	2b00      	cmp	r3, #0
 801f2fc:	d106      	bne.n	801f30c <tcp_split_unsent_seg+0x2c>
 801f2fe:	4b97      	ldr	r3, [pc, #604]	@ (801f55c <tcp_split_unsent_seg+0x27c>)
 801f300:	f240 324b 	movw	r2, #843	@ 0x34b
 801f304:	4996      	ldr	r1, [pc, #600]	@ (801f560 <tcp_split_unsent_seg+0x280>)
 801f306:	4897      	ldr	r0, [pc, #604]	@ (801f564 <tcp_split_unsent_seg+0x284>)
 801f308:	f00a f900 	bl	802950c <iprintf>

  useg = pcb->unsent;
 801f30c:	687b      	ldr	r3, [r7, #4]
 801f30e:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801f310:	617b      	str	r3, [r7, #20]
  if (useg == NULL) {
 801f312:	697b      	ldr	r3, [r7, #20]
 801f314:	2b00      	cmp	r3, #0
 801f316:	d102      	bne.n	801f31e <tcp_split_unsent_seg+0x3e>
    return ERR_MEM;
 801f318:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 801f31c:	e119      	b.n	801f552 <tcp_split_unsent_seg+0x272>
  }

  if (split == 0) {
 801f31e:	887b      	ldrh	r3, [r7, #2]
 801f320:	2b00      	cmp	r3, #0
 801f322:	d109      	bne.n	801f338 <tcp_split_unsent_seg+0x58>
    LWIP_ASSERT("Can't split segment into length 0", 0);
 801f324:	4b8d      	ldr	r3, [pc, #564]	@ (801f55c <tcp_split_unsent_seg+0x27c>)
 801f326:	f240 3253 	movw	r2, #851	@ 0x353
 801f32a:	498f      	ldr	r1, [pc, #572]	@ (801f568 <tcp_split_unsent_seg+0x288>)
 801f32c:	488d      	ldr	r0, [pc, #564]	@ (801f564 <tcp_split_unsent_seg+0x284>)
 801f32e:	f00a f8ed 	bl	802950c <iprintf>
    return ERR_VAL;
 801f332:	f06f 0305 	mvn.w	r3, #5
 801f336:	e10c      	b.n	801f552 <tcp_split_unsent_seg+0x272>
  }

  if (useg->len <= split) {
 801f338:	697b      	ldr	r3, [r7, #20]
 801f33a:	891b      	ldrh	r3, [r3, #8]
 801f33c:	887a      	ldrh	r2, [r7, #2]
 801f33e:	429a      	cmp	r2, r3
 801f340:	d301      	bcc.n	801f346 <tcp_split_unsent_seg+0x66>
    return ERR_OK;
 801f342:	2300      	movs	r3, #0
 801f344:	e105      	b.n	801f552 <tcp_split_unsent_seg+0x272>
  }

  LWIP_ASSERT("split <= mss", split <= pcb->mss);
 801f346:	687b      	ldr	r3, [r7, #4]
 801f348:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801f34a:	887a      	ldrh	r2, [r7, #2]
 801f34c:	429a      	cmp	r2, r3
 801f34e:	d906      	bls.n	801f35e <tcp_split_unsent_seg+0x7e>
 801f350:	4b82      	ldr	r3, [pc, #520]	@ (801f55c <tcp_split_unsent_seg+0x27c>)
 801f352:	f240 325b 	movw	r2, #859	@ 0x35b
 801f356:	4985      	ldr	r1, [pc, #532]	@ (801f56c <tcp_split_unsent_seg+0x28c>)
 801f358:	4882      	ldr	r0, [pc, #520]	@ (801f564 <tcp_split_unsent_seg+0x284>)
 801f35a:	f00a f8d7 	bl	802950c <iprintf>
  LWIP_ASSERT("useg->len > 0", useg->len > 0);
 801f35e:	697b      	ldr	r3, [r7, #20]
 801f360:	891b      	ldrh	r3, [r3, #8]
 801f362:	2b00      	cmp	r3, #0
 801f364:	d106      	bne.n	801f374 <tcp_split_unsent_seg+0x94>
 801f366:	4b7d      	ldr	r3, [pc, #500]	@ (801f55c <tcp_split_unsent_seg+0x27c>)
 801f368:	f44f 7257 	mov.w	r2, #860	@ 0x35c
 801f36c:	4980      	ldr	r1, [pc, #512]	@ (801f570 <tcp_split_unsent_seg+0x290>)
 801f36e:	487d      	ldr	r0, [pc, #500]	@ (801f564 <tcp_split_unsent_seg+0x284>)
 801f370:	f00a f8cc 	bl	802950c <iprintf>
   * to split this packet so we may actually exceed the max value by
   * one!
   */
  LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_enqueue: split_unsent_seg: %u\n", (unsigned int)pcb->snd_queuelen));

  optflags = useg->flags;
 801f374:	697b      	ldr	r3, [r7, #20]
 801f376:	7b1b      	ldrb	r3, [r3, #12]
 801f378:	73fb      	strb	r3, [r7, #15]
#if TCP_CHECKSUM_ON_COPY
  /* Remove since checksum is not stored until after tcp_create_segment() */
  optflags &= ~TF_SEG_DATA_CHECKSUMMED;
#endif /* TCP_CHECKSUM_ON_COPY */
  optlen = LWIP_TCP_OPT_LENGTH(optflags);
 801f37a:	7bfb      	ldrb	r3, [r7, #15]
 801f37c:	009b      	lsls	r3, r3, #2
 801f37e:	b2db      	uxtb	r3, r3
 801f380:	f003 0304 	and.w	r3, r3, #4
 801f384:	73bb      	strb	r3, [r7, #14]
  remainder = useg->len - split;
 801f386:	697b      	ldr	r3, [r7, #20]
 801f388:	891a      	ldrh	r2, [r3, #8]
 801f38a:	887b      	ldrh	r3, [r7, #2]
 801f38c:	1ad3      	subs	r3, r2, r3
 801f38e:	81bb      	strh	r3, [r7, #12]

  /* Create new pbuf for the remainder of the split */
  p = pbuf_alloc(PBUF_TRANSPORT, remainder + optlen, PBUF_RAM);
 801f390:	7bbb      	ldrb	r3, [r7, #14]
 801f392:	b29a      	uxth	r2, r3
 801f394:	89bb      	ldrh	r3, [r7, #12]
 801f396:	4413      	add	r3, r2
 801f398:	b29b      	uxth	r3, r3
 801f39a:	f44f 7220 	mov.w	r2, #640	@ 0x280
 801f39e:	4619      	mov	r1, r3
 801f3a0:	2036      	movs	r0, #54	@ 0x36
 801f3a2:	f7fa fb25 	bl	80199f0 <pbuf_alloc>
 801f3a6:	6138      	str	r0, [r7, #16]
  if (p == NULL) {
 801f3a8:	693b      	ldr	r3, [r7, #16]
 801f3aa:	2b00      	cmp	r3, #0
 801f3ac:	f000 80ba 	beq.w	801f524 <tcp_split_unsent_seg+0x244>
                ("tcp_split_unsent_seg: could not allocate memory for pbuf remainder %u\n", remainder));
    goto memerr;
  }

  /* Offset into the original pbuf is past TCP/IP headers, options, and split amount */
  offset = useg->p->tot_len - useg->len + split;
 801f3b0:	697b      	ldr	r3, [r7, #20]
 801f3b2:	685b      	ldr	r3, [r3, #4]
 801f3b4:	891a      	ldrh	r2, [r3, #8]
 801f3b6:	697b      	ldr	r3, [r7, #20]
 801f3b8:	891b      	ldrh	r3, [r3, #8]
 801f3ba:	1ad3      	subs	r3, r2, r3
 801f3bc:	b29a      	uxth	r2, r3
 801f3be:	887b      	ldrh	r3, [r7, #2]
 801f3c0:	4413      	add	r3, r2
 801f3c2:	817b      	strh	r3, [r7, #10]
  /* Copy remainder into new pbuf, headers and options will not be filled out */
  if (pbuf_copy_partial(useg->p, (u8_t *)p->payload + optlen, remainder, offset ) != remainder) {
 801f3c4:	697b      	ldr	r3, [r7, #20]
 801f3c6:	6858      	ldr	r0, [r3, #4]
 801f3c8:	693b      	ldr	r3, [r7, #16]
 801f3ca:	685a      	ldr	r2, [r3, #4]
 801f3cc:	7bbb      	ldrb	r3, [r7, #14]
 801f3ce:	18d1      	adds	r1, r2, r3
 801f3d0:	897b      	ldrh	r3, [r7, #10]
 801f3d2:	89ba      	ldrh	r2, [r7, #12]
 801f3d4:	f7fb f828 	bl	801a428 <pbuf_copy_partial>
 801f3d8:	4603      	mov	r3, r0
 801f3da:	461a      	mov	r2, r3
 801f3dc:	89bb      	ldrh	r3, [r7, #12]
 801f3de:	4293      	cmp	r3, r2
 801f3e0:	f040 80a2 	bne.w	801f528 <tcp_split_unsent_seg+0x248>
#endif /* TCP_CHECKSUM_ON_COPY */

  /* Options are created when calling tcp_output() */

  /* Migrate flags from original segment */
  split_flags = TCPH_FLAGS(useg->tcphdr);
 801f3e4:	697b      	ldr	r3, [r7, #20]
 801f3e6:	691b      	ldr	r3, [r3, #16]
 801f3e8:	899b      	ldrh	r3, [r3, #12]
 801f3ea:	b29b      	uxth	r3, r3
 801f3ec:	4618      	mov	r0, r3
 801f3ee:	f7f9 f933 	bl	8018658 <lwip_htons>
 801f3f2:	4603      	mov	r3, r0
 801f3f4:	b2db      	uxtb	r3, r3
 801f3f6:	f003 033f 	and.w	r3, r3, #63	@ 0x3f
 801f3fa:	77fb      	strb	r3, [r7, #31]
  remainder_flags = 0; /* ACK added in tcp_output() */
 801f3fc:	2300      	movs	r3, #0
 801f3fe:	77bb      	strb	r3, [r7, #30]

  if (split_flags & TCP_PSH) {
 801f400:	7ffb      	ldrb	r3, [r7, #31]
 801f402:	f003 0308 	and.w	r3, r3, #8
 801f406:	2b00      	cmp	r3, #0
 801f408:	d007      	beq.n	801f41a <tcp_split_unsent_seg+0x13a>
    split_flags &= ~TCP_PSH;
 801f40a:	7ffb      	ldrb	r3, [r7, #31]
 801f40c:	f023 0308 	bic.w	r3, r3, #8
 801f410:	77fb      	strb	r3, [r7, #31]
    remainder_flags |= TCP_PSH;
 801f412:	7fbb      	ldrb	r3, [r7, #30]
 801f414:	f043 0308 	orr.w	r3, r3, #8
 801f418:	77bb      	strb	r3, [r7, #30]
  }
  if (split_flags & TCP_FIN) {
 801f41a:	7ffb      	ldrb	r3, [r7, #31]
 801f41c:	f003 0301 	and.w	r3, r3, #1
 801f420:	2b00      	cmp	r3, #0
 801f422:	d007      	beq.n	801f434 <tcp_split_unsent_seg+0x154>
    split_flags &= ~TCP_FIN;
 801f424:	7ffb      	ldrb	r3, [r7, #31]
 801f426:	f023 0301 	bic.w	r3, r3, #1
 801f42a:	77fb      	strb	r3, [r7, #31]
    remainder_flags |= TCP_FIN;
 801f42c:	7fbb      	ldrb	r3, [r7, #30]
 801f42e:	f043 0301 	orr.w	r3, r3, #1
 801f432:	77bb      	strb	r3, [r7, #30]
  }
  /* SYN should be left on split, RST should not be present with data */

  seg = tcp_create_segment(pcb, p, remainder_flags, lwip_ntohl(useg->tcphdr->seqno) + split, optflags);
 801f434:	697b      	ldr	r3, [r7, #20]
 801f436:	691b      	ldr	r3, [r3, #16]
 801f438:	685b      	ldr	r3, [r3, #4]
 801f43a:	4618      	mov	r0, r3
 801f43c:	f7f9 f921 	bl	8018682 <lwip_htonl>
 801f440:	4602      	mov	r2, r0
 801f442:	887b      	ldrh	r3, [r7, #2]
 801f444:	18d1      	adds	r1, r2, r3
 801f446:	7fba      	ldrb	r2, [r7, #30]
 801f448:	7bfb      	ldrb	r3, [r7, #15]
 801f44a:	9300      	str	r3, [sp, #0]
 801f44c:	460b      	mov	r3, r1
 801f44e:	6939      	ldr	r1, [r7, #16]
 801f450:	6878      	ldr	r0, [r7, #4]
 801f452:	f7ff f9f1 	bl	801e838 <tcp_create_segment>
 801f456:	61b8      	str	r0, [r7, #24]
  if (seg == NULL) {
 801f458:	69bb      	ldr	r3, [r7, #24]
 801f45a:	2b00      	cmp	r3, #0
 801f45c:	d066      	beq.n	801f52c <tcp_split_unsent_seg+0x24c>
  seg->chksum_swapped = chksum_swapped;
  seg->flags |= TF_SEG_DATA_CHECKSUMMED;
#endif /* TCP_CHECKSUM_ON_COPY */

  /* Remove this segment from the queue since trimming it may free pbufs */
  pcb->snd_queuelen -= pbuf_clen(useg->p);
 801f45e:	697b      	ldr	r3, [r7, #20]
 801f460:	685b      	ldr	r3, [r3, #4]
 801f462:	4618      	mov	r0, r3
 801f464:	f7fa fe68 	bl	801a138 <pbuf_clen>
 801f468:	4603      	mov	r3, r0
 801f46a:	461a      	mov	r2, r3
 801f46c:	687b      	ldr	r3, [r7, #4]
 801f46e:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 801f472:	1a9b      	subs	r3, r3, r2
 801f474:	b29a      	uxth	r2, r3
 801f476:	687b      	ldr	r3, [r7, #4]
 801f478:	f8a3 2066 	strh.w	r2, [r3, #102]	@ 0x66

  /* Trim the original pbuf into our split size.  At this point our remainder segment must be setup
  successfully because we are modifying the original segment */
  pbuf_realloc(useg->p, useg->p->tot_len - remainder);
 801f47c:	697b      	ldr	r3, [r7, #20]
 801f47e:	6858      	ldr	r0, [r3, #4]
 801f480:	697b      	ldr	r3, [r7, #20]
 801f482:	685b      	ldr	r3, [r3, #4]
 801f484:	891a      	ldrh	r2, [r3, #8]
 801f486:	89bb      	ldrh	r3, [r7, #12]
 801f488:	1ad3      	subs	r3, r2, r3
 801f48a:	b29b      	uxth	r3, r3
 801f48c:	4619      	mov	r1, r3
 801f48e:	f7fa fc0f 	bl	8019cb0 <pbuf_realloc>
  useg->len -= remainder;
 801f492:	697b      	ldr	r3, [r7, #20]
 801f494:	891a      	ldrh	r2, [r3, #8]
 801f496:	89bb      	ldrh	r3, [r7, #12]
 801f498:	1ad3      	subs	r3, r2, r3
 801f49a:	b29a      	uxth	r2, r3
 801f49c:	697b      	ldr	r3, [r7, #20]
 801f49e:	811a      	strh	r2, [r3, #8]
  TCPH_SET_FLAG(useg->tcphdr, split_flags);
 801f4a0:	697b      	ldr	r3, [r7, #20]
 801f4a2:	691b      	ldr	r3, [r3, #16]
 801f4a4:	899b      	ldrh	r3, [r3, #12]
 801f4a6:	b29c      	uxth	r4, r3
 801f4a8:	7ffb      	ldrb	r3, [r7, #31]
 801f4aa:	b29b      	uxth	r3, r3
 801f4ac:	4618      	mov	r0, r3
 801f4ae:	f7f9 f8d3 	bl	8018658 <lwip_htons>
 801f4b2:	4603      	mov	r3, r0
 801f4b4:	461a      	mov	r2, r3
 801f4b6:	697b      	ldr	r3, [r7, #20]
 801f4b8:	691b      	ldr	r3, [r3, #16]
 801f4ba:	4322      	orrs	r2, r4
 801f4bc:	b292      	uxth	r2, r2
 801f4be:	819a      	strh	r2, [r3, #12]
#if TCP_OVERSIZE_DBGCHECK
  /* By trimming, realloc may have actually shrunk the pbuf, so clear oversize_left */
  useg->oversize_left = 0;
 801f4c0:	697b      	ldr	r3, [r7, #20]
 801f4c2:	2200      	movs	r2, #0
 801f4c4:	815a      	strh	r2, [r3, #10]
#endif /* TCP_OVERSIZE_DBGCHECK */

  /* Add back to the queue with new trimmed pbuf */
  pcb->snd_queuelen += pbuf_clen(useg->p);
 801f4c6:	697b      	ldr	r3, [r7, #20]
 801f4c8:	685b      	ldr	r3, [r3, #4]
 801f4ca:	4618      	mov	r0, r3
 801f4cc:	f7fa fe34 	bl	801a138 <pbuf_clen>
 801f4d0:	4603      	mov	r3, r0
 801f4d2:	461a      	mov	r2, r3
 801f4d4:	687b      	ldr	r3, [r7, #4]
 801f4d6:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 801f4da:	4413      	add	r3, r2
 801f4dc:	b29a      	uxth	r2, r3
 801f4de:	687b      	ldr	r3, [r7, #4]
 801f4e0:	f8a3 2066 	strh.w	r2, [r3, #102]	@ 0x66
#endif /* TCP_CHECKSUM_ON_COPY */

  /* Update number of segments on the queues. Note that length now may
   * exceed TCP_SND_QUEUELEN! We don't have to touch pcb->snd_buf
   * because the total amount of data is constant when packet is split */
  pcb->snd_queuelen += pbuf_clen(seg->p);
 801f4e4:	69bb      	ldr	r3, [r7, #24]
 801f4e6:	685b      	ldr	r3, [r3, #4]
 801f4e8:	4618      	mov	r0, r3
 801f4ea:	f7fa fe25 	bl	801a138 <pbuf_clen>
 801f4ee:	4603      	mov	r3, r0
 801f4f0:	461a      	mov	r2, r3
 801f4f2:	687b      	ldr	r3, [r7, #4]
 801f4f4:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 801f4f8:	4413      	add	r3, r2
 801f4fa:	b29a      	uxth	r2, r3
 801f4fc:	687b      	ldr	r3, [r7, #4]
 801f4fe:	f8a3 2066 	strh.w	r2, [r3, #102]	@ 0x66

  /* Finally insert remainder into queue after split (which stays head) */
  seg->next = useg->next;
 801f502:	697b      	ldr	r3, [r7, #20]
 801f504:	681a      	ldr	r2, [r3, #0]
 801f506:	69bb      	ldr	r3, [r7, #24]
 801f508:	601a      	str	r2, [r3, #0]
  useg->next = seg;
 801f50a:	697b      	ldr	r3, [r7, #20]
 801f50c:	69ba      	ldr	r2, [r7, #24]
 801f50e:	601a      	str	r2, [r3, #0]

#if TCP_OVERSIZE
  /* If remainder is last segment on the unsent, ensure we clear the oversize amount
   * because the remainder is always sized to the exact remaining amount */
  if (seg->next == NULL) {
 801f510:	69bb      	ldr	r3, [r7, #24]
 801f512:	681b      	ldr	r3, [r3, #0]
 801f514:	2b00      	cmp	r3, #0
 801f516:	d103      	bne.n	801f520 <tcp_split_unsent_seg+0x240>
    pcb->unsent_oversize = 0;
 801f518:	687b      	ldr	r3, [r7, #4]
 801f51a:	2200      	movs	r2, #0
 801f51c:	f8a3 2068 	strh.w	r2, [r3, #104]	@ 0x68
  }
#endif /* TCP_OVERSIZE */

  return ERR_OK;
 801f520:	2300      	movs	r3, #0
 801f522:	e016      	b.n	801f552 <tcp_split_unsent_seg+0x272>
    goto memerr;
 801f524:	bf00      	nop
 801f526:	e002      	b.n	801f52e <tcp_split_unsent_seg+0x24e>
    goto memerr;
 801f528:	bf00      	nop
 801f52a:	e000      	b.n	801f52e <tcp_split_unsent_seg+0x24e>
    goto memerr;
 801f52c:	bf00      	nop
memerr:
  TCP_STATS_INC(tcp.memerr);

  LWIP_ASSERT("seg == NULL", seg == NULL);
 801f52e:	69bb      	ldr	r3, [r7, #24]
 801f530:	2b00      	cmp	r3, #0
 801f532:	d006      	beq.n	801f542 <tcp_split_unsent_seg+0x262>
 801f534:	4b09      	ldr	r3, [pc, #36]	@ (801f55c <tcp_split_unsent_seg+0x27c>)
 801f536:	f44f 7276 	mov.w	r2, #984	@ 0x3d8
 801f53a:	490e      	ldr	r1, [pc, #56]	@ (801f574 <tcp_split_unsent_seg+0x294>)
 801f53c:	4809      	ldr	r0, [pc, #36]	@ (801f564 <tcp_split_unsent_seg+0x284>)
 801f53e:	f009 ffe5 	bl	802950c <iprintf>
  if (p != NULL) {
 801f542:	693b      	ldr	r3, [r7, #16]
 801f544:	2b00      	cmp	r3, #0
 801f546:	d002      	beq.n	801f54e <tcp_split_unsent_seg+0x26e>
    pbuf_free(p);
 801f548:	6938      	ldr	r0, [r7, #16]
 801f54a:	f7fa fd67 	bl	801a01c <pbuf_free>
  }

  return ERR_MEM;
 801f54e:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
}
 801f552:	4618      	mov	r0, r3
 801f554:	3724      	adds	r7, #36	@ 0x24
 801f556:	46bd      	mov	sp, r7
 801f558:	bd90      	pop	{r4, r7, pc}
 801f55a:	bf00      	nop
 801f55c:	0802ed24 	.word	0x0802ed24
 801f560:	0802f114 	.word	0x0802f114
 801f564:	0802ed78 	.word	0x0802ed78
 801f568:	0802f138 	.word	0x0802f138
 801f56c:	0802f15c 	.word	0x0802f15c
 801f570:	0802f16c 	.word	0x0802f16c
 801f574:	0802f17c 	.word	0x0802f17c

0801f578 <tcp_send_fin>:
 * @param pcb the tcp_pcb over which to send a segment
 * @return ERR_OK if sent, another err_t otherwise
 */
err_t
tcp_send_fin(struct tcp_pcb *pcb)
{
 801f578:	b590      	push	{r4, r7, lr}
 801f57a:	b085      	sub	sp, #20
 801f57c:	af00      	add	r7, sp, #0
 801f57e:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT("tcp_send_fin: invalid pcb", pcb != NULL);
 801f580:	687b      	ldr	r3, [r7, #4]
 801f582:	2b00      	cmp	r3, #0
 801f584:	d106      	bne.n	801f594 <tcp_send_fin+0x1c>
 801f586:	4b21      	ldr	r3, [pc, #132]	@ (801f60c <tcp_send_fin+0x94>)
 801f588:	f240 32eb 	movw	r2, #1003	@ 0x3eb
 801f58c:	4920      	ldr	r1, [pc, #128]	@ (801f610 <tcp_send_fin+0x98>)
 801f58e:	4821      	ldr	r0, [pc, #132]	@ (801f614 <tcp_send_fin+0x9c>)
 801f590:	f009 ffbc 	bl	802950c <iprintf>

  /* first, try to add the fin to the last unsent segment */
  if (pcb->unsent != NULL) {
 801f594:	687b      	ldr	r3, [r7, #4]
 801f596:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801f598:	2b00      	cmp	r3, #0
 801f59a:	d02e      	beq.n	801f5fa <tcp_send_fin+0x82>
    struct tcp_seg *last_unsent;
    for (last_unsent = pcb->unsent; last_unsent->next != NULL;
 801f59c:	687b      	ldr	r3, [r7, #4]
 801f59e:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801f5a0:	60fb      	str	r3, [r7, #12]
 801f5a2:	e002      	b.n	801f5aa <tcp_send_fin+0x32>
         last_unsent = last_unsent->next);
 801f5a4:	68fb      	ldr	r3, [r7, #12]
 801f5a6:	681b      	ldr	r3, [r3, #0]
 801f5a8:	60fb      	str	r3, [r7, #12]
    for (last_unsent = pcb->unsent; last_unsent->next != NULL;
 801f5aa:	68fb      	ldr	r3, [r7, #12]
 801f5ac:	681b      	ldr	r3, [r3, #0]
 801f5ae:	2b00      	cmp	r3, #0
 801f5b0:	d1f8      	bne.n	801f5a4 <tcp_send_fin+0x2c>

    if ((TCPH_FLAGS(last_unsent->tcphdr) & (TCP_SYN | TCP_FIN | TCP_RST)) == 0) {
 801f5b2:	68fb      	ldr	r3, [r7, #12]
 801f5b4:	691b      	ldr	r3, [r3, #16]
 801f5b6:	899b      	ldrh	r3, [r3, #12]
 801f5b8:	b29b      	uxth	r3, r3
 801f5ba:	4618      	mov	r0, r3
 801f5bc:	f7f9 f84c 	bl	8018658 <lwip_htons>
 801f5c0:	4603      	mov	r3, r0
 801f5c2:	b2db      	uxtb	r3, r3
 801f5c4:	f003 0307 	and.w	r3, r3, #7
 801f5c8:	2b00      	cmp	r3, #0
 801f5ca:	d116      	bne.n	801f5fa <tcp_send_fin+0x82>
      /* no SYN/FIN/RST flag in the header, we can add the FIN flag */
      TCPH_SET_FLAG(last_unsent->tcphdr, TCP_FIN);
 801f5cc:	68fb      	ldr	r3, [r7, #12]
 801f5ce:	691b      	ldr	r3, [r3, #16]
 801f5d0:	899b      	ldrh	r3, [r3, #12]
 801f5d2:	b29c      	uxth	r4, r3
 801f5d4:	2001      	movs	r0, #1
 801f5d6:	f7f9 f83f 	bl	8018658 <lwip_htons>
 801f5da:	4603      	mov	r3, r0
 801f5dc:	461a      	mov	r2, r3
 801f5de:	68fb      	ldr	r3, [r7, #12]
 801f5e0:	691b      	ldr	r3, [r3, #16]
 801f5e2:	4322      	orrs	r2, r4
 801f5e4:	b292      	uxth	r2, r2
 801f5e6:	819a      	strh	r2, [r3, #12]
      tcp_set_flags(pcb, TF_FIN);
 801f5e8:	687b      	ldr	r3, [r7, #4]
 801f5ea:	8b5b      	ldrh	r3, [r3, #26]
 801f5ec:	f043 0320 	orr.w	r3, r3, #32
 801f5f0:	b29a      	uxth	r2, r3
 801f5f2:	687b      	ldr	r3, [r7, #4]
 801f5f4:	835a      	strh	r2, [r3, #26]
      return ERR_OK;
 801f5f6:	2300      	movs	r3, #0
 801f5f8:	e004      	b.n	801f604 <tcp_send_fin+0x8c>
    }
  }
  /* no data, no length, flags, copy=1, no optdata */
  return tcp_enqueue_flags(pcb, TCP_FIN);
 801f5fa:	2101      	movs	r1, #1
 801f5fc:	6878      	ldr	r0, [r7, #4]
 801f5fe:	f000 f80b 	bl	801f618 <tcp_enqueue_flags>
 801f602:	4603      	mov	r3, r0
}
 801f604:	4618      	mov	r0, r3
 801f606:	3714      	adds	r7, #20
 801f608:	46bd      	mov	sp, r7
 801f60a:	bd90      	pop	{r4, r7, pc}
 801f60c:	0802ed24 	.word	0x0802ed24
 801f610:	0802f188 	.word	0x0802f188
 801f614:	0802ed78 	.word	0x0802ed78

0801f618 <tcp_enqueue_flags>:
 * @param pcb Protocol control block for the TCP connection.
 * @param flags TCP header flags to set in the outgoing segment.
 */
err_t
tcp_enqueue_flags(struct tcp_pcb *pcb, u8_t flags)
{
 801f618:	b580      	push	{r7, lr}
 801f61a:	b088      	sub	sp, #32
 801f61c:	af02      	add	r7, sp, #8
 801f61e:	6078      	str	r0, [r7, #4]
 801f620:	460b      	mov	r3, r1
 801f622:	70fb      	strb	r3, [r7, #3]
  struct pbuf *p;
  struct tcp_seg *seg;
  u8_t optflags = 0;
 801f624:	2300      	movs	r3, #0
 801f626:	75fb      	strb	r3, [r7, #23]
  u8_t optlen = 0;
 801f628:	2300      	movs	r3, #0
 801f62a:	75bb      	strb	r3, [r7, #22]

  LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_enqueue_flags: queuelen: %"U16_F"\n", (u16_t)pcb->snd_queuelen));

  LWIP_ASSERT("tcp_enqueue_flags: need either TCP_SYN or TCP_FIN in flags (programmer violates API)",
 801f62c:	78fb      	ldrb	r3, [r7, #3]
 801f62e:	f003 0303 	and.w	r3, r3, #3
 801f632:	2b00      	cmp	r3, #0
 801f634:	d106      	bne.n	801f644 <tcp_enqueue_flags+0x2c>
 801f636:	4b67      	ldr	r3, [pc, #412]	@ (801f7d4 <tcp_enqueue_flags+0x1bc>)
 801f638:	f240 4211 	movw	r2, #1041	@ 0x411
 801f63c:	4966      	ldr	r1, [pc, #408]	@ (801f7d8 <tcp_enqueue_flags+0x1c0>)
 801f63e:	4867      	ldr	r0, [pc, #412]	@ (801f7dc <tcp_enqueue_flags+0x1c4>)
 801f640:	f009 ff64 	bl	802950c <iprintf>
              (flags & (TCP_SYN | TCP_FIN)) != 0);
  LWIP_ASSERT("tcp_enqueue_flags: invalid pcb", pcb != NULL);
 801f644:	687b      	ldr	r3, [r7, #4]
 801f646:	2b00      	cmp	r3, #0
 801f648:	d106      	bne.n	801f658 <tcp_enqueue_flags+0x40>
 801f64a:	4b62      	ldr	r3, [pc, #392]	@ (801f7d4 <tcp_enqueue_flags+0x1bc>)
 801f64c:	f240 4213 	movw	r2, #1043	@ 0x413
 801f650:	4963      	ldr	r1, [pc, #396]	@ (801f7e0 <tcp_enqueue_flags+0x1c8>)
 801f652:	4862      	ldr	r0, [pc, #392]	@ (801f7dc <tcp_enqueue_flags+0x1c4>)
 801f654:	f009 ff5a 	bl	802950c <iprintf>

  /* No need to check pcb->snd_queuelen if only SYN or FIN are allowed! */

  /* Get options for this segment. This is a special case since this is the
     only place where a SYN can be sent. */
  if (flags & TCP_SYN) {
 801f658:	78fb      	ldrb	r3, [r7, #3]
 801f65a:	f003 0302 	and.w	r3, r3, #2
 801f65e:	2b00      	cmp	r3, #0
 801f660:	d001      	beq.n	801f666 <tcp_enqueue_flags+0x4e>
    optflags = TF_SEG_OPTS_MSS;
 801f662:	2301      	movs	r3, #1
 801f664:	75fb      	strb	r3, [r7, #23]
    /* Make sure the timestamp option is only included in data segments if we
       agreed about it with the remote host (and in active open SYN segments). */
    optflags |= TF_SEG_OPTS_TS;
  }
#endif /* LWIP_TCP_TIMESTAMPS */
  optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(optflags, pcb);
 801f666:	7dfb      	ldrb	r3, [r7, #23]
 801f668:	009b      	lsls	r3, r3, #2
 801f66a:	b2db      	uxtb	r3, r3
 801f66c:	f003 0304 	and.w	r3, r3, #4
 801f670:	75bb      	strb	r3, [r7, #22]

  /* Allocate pbuf with room for TCP header + options */
  if ((p = pbuf_alloc(PBUF_TRANSPORT, optlen, PBUF_RAM)) == NULL) {
 801f672:	7dbb      	ldrb	r3, [r7, #22]
 801f674:	b29b      	uxth	r3, r3
 801f676:	f44f 7220 	mov.w	r2, #640	@ 0x280
 801f67a:	4619      	mov	r1, r3
 801f67c:	2036      	movs	r0, #54	@ 0x36
 801f67e:	f7fa f9b7 	bl	80199f0 <pbuf_alloc>
 801f682:	60f8      	str	r0, [r7, #12]
 801f684:	68fb      	ldr	r3, [r7, #12]
 801f686:	2b00      	cmp	r3, #0
 801f688:	d109      	bne.n	801f69e <tcp_enqueue_flags+0x86>
    tcp_set_flags(pcb, TF_NAGLEMEMERR);
 801f68a:	687b      	ldr	r3, [r7, #4]
 801f68c:	8b5b      	ldrh	r3, [r3, #26]
 801f68e:	f043 0380 	orr.w	r3, r3, #128	@ 0x80
 801f692:	b29a      	uxth	r2, r3
 801f694:	687b      	ldr	r3, [r7, #4]
 801f696:	835a      	strh	r2, [r3, #26]
    TCP_STATS_INC(tcp.memerr);
    return ERR_MEM;
 801f698:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 801f69c:	e095      	b.n	801f7ca <tcp_enqueue_flags+0x1b2>
  }
  LWIP_ASSERT("tcp_enqueue_flags: check that first pbuf can hold optlen",
 801f69e:	68fb      	ldr	r3, [r7, #12]
 801f6a0:	895a      	ldrh	r2, [r3, #10]
 801f6a2:	7dbb      	ldrb	r3, [r7, #22]
 801f6a4:	b29b      	uxth	r3, r3
 801f6a6:	429a      	cmp	r2, r3
 801f6a8:	d206      	bcs.n	801f6b8 <tcp_enqueue_flags+0xa0>
 801f6aa:	4b4a      	ldr	r3, [pc, #296]	@ (801f7d4 <tcp_enqueue_flags+0x1bc>)
 801f6ac:	f240 4239 	movw	r2, #1081	@ 0x439
 801f6b0:	494c      	ldr	r1, [pc, #304]	@ (801f7e4 <tcp_enqueue_flags+0x1cc>)
 801f6b2:	484a      	ldr	r0, [pc, #296]	@ (801f7dc <tcp_enqueue_flags+0x1c4>)
 801f6b4:	f009 ff2a 	bl	802950c <iprintf>
              (p->len >= optlen));

  /* Allocate memory for tcp_seg, and fill in fields. */
  if ((seg = tcp_create_segment(pcb, p, flags, pcb->snd_lbb, optflags)) == NULL) {
 801f6b8:	687b      	ldr	r3, [r7, #4]
 801f6ba:	6dd9      	ldr	r1, [r3, #92]	@ 0x5c
 801f6bc:	78fa      	ldrb	r2, [r7, #3]
 801f6be:	7dfb      	ldrb	r3, [r7, #23]
 801f6c0:	9300      	str	r3, [sp, #0]
 801f6c2:	460b      	mov	r3, r1
 801f6c4:	68f9      	ldr	r1, [r7, #12]
 801f6c6:	6878      	ldr	r0, [r7, #4]
 801f6c8:	f7ff f8b6 	bl	801e838 <tcp_create_segment>
 801f6cc:	60b8      	str	r0, [r7, #8]
 801f6ce:	68bb      	ldr	r3, [r7, #8]
 801f6d0:	2b00      	cmp	r3, #0
 801f6d2:	d109      	bne.n	801f6e8 <tcp_enqueue_flags+0xd0>
    tcp_set_flags(pcb, TF_NAGLEMEMERR);
 801f6d4:	687b      	ldr	r3, [r7, #4]
 801f6d6:	8b5b      	ldrh	r3, [r3, #26]
 801f6d8:	f043 0380 	orr.w	r3, r3, #128	@ 0x80
 801f6dc:	b29a      	uxth	r2, r3
 801f6de:	687b      	ldr	r3, [r7, #4]
 801f6e0:	835a      	strh	r2, [r3, #26]
    TCP_STATS_INC(tcp.memerr);
    return ERR_MEM;
 801f6e2:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 801f6e6:	e070      	b.n	801f7ca <tcp_enqueue_flags+0x1b2>
  }
  LWIP_ASSERT("seg->tcphdr not aligned", ((mem_ptr_t)seg->tcphdr % LWIP_MIN(MEM_ALIGNMENT, 4)) == 0);
 801f6e8:	68bb      	ldr	r3, [r7, #8]
 801f6ea:	691b      	ldr	r3, [r3, #16]
 801f6ec:	f003 0303 	and.w	r3, r3, #3
 801f6f0:	2b00      	cmp	r3, #0
 801f6f2:	d006      	beq.n	801f702 <tcp_enqueue_flags+0xea>
 801f6f4:	4b37      	ldr	r3, [pc, #220]	@ (801f7d4 <tcp_enqueue_flags+0x1bc>)
 801f6f6:	f240 4242 	movw	r2, #1090	@ 0x442
 801f6fa:	493b      	ldr	r1, [pc, #236]	@ (801f7e8 <tcp_enqueue_flags+0x1d0>)
 801f6fc:	4837      	ldr	r0, [pc, #220]	@ (801f7dc <tcp_enqueue_flags+0x1c4>)
 801f6fe:	f009 ff05 	bl	802950c <iprintf>
  LWIP_ASSERT("tcp_enqueue_flags: invalid segment length", seg->len == 0);
 801f702:	68bb      	ldr	r3, [r7, #8]
 801f704:	891b      	ldrh	r3, [r3, #8]
 801f706:	2b00      	cmp	r3, #0
 801f708:	d006      	beq.n	801f718 <tcp_enqueue_flags+0x100>
 801f70a:	4b32      	ldr	r3, [pc, #200]	@ (801f7d4 <tcp_enqueue_flags+0x1bc>)
 801f70c:	f240 4243 	movw	r2, #1091	@ 0x443
 801f710:	4936      	ldr	r1, [pc, #216]	@ (801f7ec <tcp_enqueue_flags+0x1d4>)
 801f712:	4832      	ldr	r0, [pc, #200]	@ (801f7dc <tcp_enqueue_flags+0x1c4>)
 801f714:	f009 fefa 	bl	802950c <iprintf>
               lwip_ntohl(seg->tcphdr->seqno),
               lwip_ntohl(seg->tcphdr->seqno) + TCP_TCPLEN(seg),
               (u16_t)flags));

  /* Now append seg to pcb->unsent queue */
  if (pcb->unsent == NULL) {
 801f718:	687b      	ldr	r3, [r7, #4]
 801f71a:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801f71c:	2b00      	cmp	r3, #0
 801f71e:	d103      	bne.n	801f728 <tcp_enqueue_flags+0x110>
    pcb->unsent = seg;
 801f720:	687b      	ldr	r3, [r7, #4]
 801f722:	68ba      	ldr	r2, [r7, #8]
 801f724:	66da      	str	r2, [r3, #108]	@ 0x6c
 801f726:	e00d      	b.n	801f744 <tcp_enqueue_flags+0x12c>
  } else {
    struct tcp_seg *useg;
    for (useg = pcb->unsent; useg->next != NULL; useg = useg->next);
 801f728:	687b      	ldr	r3, [r7, #4]
 801f72a:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801f72c:	613b      	str	r3, [r7, #16]
 801f72e:	e002      	b.n	801f736 <tcp_enqueue_flags+0x11e>
 801f730:	693b      	ldr	r3, [r7, #16]
 801f732:	681b      	ldr	r3, [r3, #0]
 801f734:	613b      	str	r3, [r7, #16]
 801f736:	693b      	ldr	r3, [r7, #16]
 801f738:	681b      	ldr	r3, [r3, #0]
 801f73a:	2b00      	cmp	r3, #0
 801f73c:	d1f8      	bne.n	801f730 <tcp_enqueue_flags+0x118>
    useg->next = seg;
 801f73e:	693b      	ldr	r3, [r7, #16]
 801f740:	68ba      	ldr	r2, [r7, #8]
 801f742:	601a      	str	r2, [r3, #0]
  }
#if TCP_OVERSIZE
  /* The new unsent tail has no space */
  pcb->unsent_oversize = 0;
 801f744:	687b      	ldr	r3, [r7, #4]
 801f746:	2200      	movs	r2, #0
 801f748:	f8a3 2068 	strh.w	r2, [r3, #104]	@ 0x68
#endif /* TCP_OVERSIZE */

  /* SYN and FIN bump the sequence number */
  if ((flags & TCP_SYN) || (flags & TCP_FIN)) {
 801f74c:	78fb      	ldrb	r3, [r7, #3]
 801f74e:	f003 0302 	and.w	r3, r3, #2
 801f752:	2b00      	cmp	r3, #0
 801f754:	d104      	bne.n	801f760 <tcp_enqueue_flags+0x148>
 801f756:	78fb      	ldrb	r3, [r7, #3]
 801f758:	f003 0301 	and.w	r3, r3, #1
 801f75c:	2b00      	cmp	r3, #0
 801f75e:	d004      	beq.n	801f76a <tcp_enqueue_flags+0x152>
    pcb->snd_lbb++;
 801f760:	687b      	ldr	r3, [r7, #4]
 801f762:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 801f764:	1c5a      	adds	r2, r3, #1
 801f766:	687b      	ldr	r3, [r7, #4]
 801f768:	65da      	str	r2, [r3, #92]	@ 0x5c
    /* optlen does not influence snd_buf */
  }
  if (flags & TCP_FIN) {
 801f76a:	78fb      	ldrb	r3, [r7, #3]
 801f76c:	f003 0301 	and.w	r3, r3, #1
 801f770:	2b00      	cmp	r3, #0
 801f772:	d006      	beq.n	801f782 <tcp_enqueue_flags+0x16a>
    tcp_set_flags(pcb, TF_FIN);
 801f774:	687b      	ldr	r3, [r7, #4]
 801f776:	8b5b      	ldrh	r3, [r3, #26]
 801f778:	f043 0320 	orr.w	r3, r3, #32
 801f77c:	b29a      	uxth	r2, r3
 801f77e:	687b      	ldr	r3, [r7, #4]
 801f780:	835a      	strh	r2, [r3, #26]
  }

  /* update number of segments on the queues */
  pcb->snd_queuelen += pbuf_clen(seg->p);
 801f782:	68bb      	ldr	r3, [r7, #8]
 801f784:	685b      	ldr	r3, [r3, #4]
 801f786:	4618      	mov	r0, r3
 801f788:	f7fa fcd6 	bl	801a138 <pbuf_clen>
 801f78c:	4603      	mov	r3, r0
 801f78e:	461a      	mov	r2, r3
 801f790:	687b      	ldr	r3, [r7, #4]
 801f792:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 801f796:	4413      	add	r3, r2
 801f798:	b29a      	uxth	r2, r3
 801f79a:	687b      	ldr	r3, [r7, #4]
 801f79c:	f8a3 2066 	strh.w	r2, [r3, #102]	@ 0x66
  LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_enqueue_flags: %"S16_F" (after enqueued)\n", pcb->snd_queuelen));
  if (pcb->snd_queuelen != 0) {
 801f7a0:	687b      	ldr	r3, [r7, #4]
 801f7a2:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 801f7a6:	2b00      	cmp	r3, #0
 801f7a8:	d00e      	beq.n	801f7c8 <tcp_enqueue_flags+0x1b0>
    LWIP_ASSERT("tcp_enqueue_flags: invalid queue length",
 801f7aa:	687b      	ldr	r3, [r7, #4]
 801f7ac:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801f7ae:	2b00      	cmp	r3, #0
 801f7b0:	d10a      	bne.n	801f7c8 <tcp_enqueue_flags+0x1b0>
 801f7b2:	687b      	ldr	r3, [r7, #4]
 801f7b4:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801f7b6:	2b00      	cmp	r3, #0
 801f7b8:	d106      	bne.n	801f7c8 <tcp_enqueue_flags+0x1b0>
 801f7ba:	4b06      	ldr	r3, [pc, #24]	@ (801f7d4 <tcp_enqueue_flags+0x1bc>)
 801f7bc:	f240 4265 	movw	r2, #1125	@ 0x465
 801f7c0:	490b      	ldr	r1, [pc, #44]	@ (801f7f0 <tcp_enqueue_flags+0x1d8>)
 801f7c2:	4806      	ldr	r0, [pc, #24]	@ (801f7dc <tcp_enqueue_flags+0x1c4>)
 801f7c4:	f009 fea2 	bl	802950c <iprintf>
                pcb->unacked != NULL || pcb->unsent != NULL);
  }

  return ERR_OK;
 801f7c8:	2300      	movs	r3, #0
}
 801f7ca:	4618      	mov	r0, r3
 801f7cc:	3718      	adds	r7, #24
 801f7ce:	46bd      	mov	sp, r7
 801f7d0:	bd80      	pop	{r7, pc}
 801f7d2:	bf00      	nop
 801f7d4:	0802ed24 	.word	0x0802ed24
 801f7d8:	0802f1a4 	.word	0x0802f1a4
 801f7dc:	0802ed78 	.word	0x0802ed78
 801f7e0:	0802f1fc 	.word	0x0802f1fc
 801f7e4:	0802f21c 	.word	0x0802f21c
 801f7e8:	0802f258 	.word	0x0802f258
 801f7ec:	0802f270 	.word	0x0802f270
 801f7f0:	0802f29c 	.word	0x0802f29c

0801f7f4 <tcp_output>:
 * @return ERR_OK if data has been sent or nothing to send
 *         another err_t on error
 */
err_t
tcp_output(struct tcp_pcb *pcb)
{
 801f7f4:	b5b0      	push	{r4, r5, r7, lr}
 801f7f6:	b08a      	sub	sp, #40	@ 0x28
 801f7f8:	af00      	add	r7, sp, #0
 801f7fa:	6078      	str	r0, [r7, #4]
  struct netif *netif;
#if TCP_CWND_DEBUG
  s16_t i = 0;
#endif /* TCP_CWND_DEBUG */

  LWIP_ASSERT_CORE_LOCKED();
 801f7fc:	f7f0 fc38 	bl	8010070 <sys_check_core_locking>

  LWIP_ASSERT("tcp_output: invalid pcb", pcb != NULL);
 801f800:	687b      	ldr	r3, [r7, #4]
 801f802:	2b00      	cmp	r3, #0
 801f804:	d106      	bne.n	801f814 <tcp_output+0x20>
 801f806:	4b8a      	ldr	r3, [pc, #552]	@ (801fa30 <tcp_output+0x23c>)
 801f808:	f240 42e1 	movw	r2, #1249	@ 0x4e1
 801f80c:	4989      	ldr	r1, [pc, #548]	@ (801fa34 <tcp_output+0x240>)
 801f80e:	488a      	ldr	r0, [pc, #552]	@ (801fa38 <tcp_output+0x244>)
 801f810:	f009 fe7c 	bl	802950c <iprintf>
  /* pcb->state LISTEN not allowed here */
  LWIP_ASSERT("don't call tcp_output for listen-pcbs",
 801f814:	687b      	ldr	r3, [r7, #4]
 801f816:	7d1b      	ldrb	r3, [r3, #20]
 801f818:	2b01      	cmp	r3, #1
 801f81a:	d106      	bne.n	801f82a <tcp_output+0x36>
 801f81c:	4b84      	ldr	r3, [pc, #528]	@ (801fa30 <tcp_output+0x23c>)
 801f81e:	f240 42e3 	movw	r2, #1251	@ 0x4e3
 801f822:	4986      	ldr	r1, [pc, #536]	@ (801fa3c <tcp_output+0x248>)
 801f824:	4884      	ldr	r0, [pc, #528]	@ (801fa38 <tcp_output+0x244>)
 801f826:	f009 fe71 	bl	802950c <iprintf>

  /* First, check if we are invoked by the TCP input processing
     code. If so, we do not output anything. Instead, we rely on the
     input processing code to call us when input processing is done
     with. */
  if (tcp_input_pcb == pcb) {
 801f82a:	4b85      	ldr	r3, [pc, #532]	@ (801fa40 <tcp_output+0x24c>)
 801f82c:	681b      	ldr	r3, [r3, #0]
 801f82e:	687a      	ldr	r2, [r7, #4]
 801f830:	429a      	cmp	r2, r3
 801f832:	d101      	bne.n	801f838 <tcp_output+0x44>
    return ERR_OK;
 801f834:	2300      	movs	r3, #0
 801f836:	e1d1      	b.n	801fbdc <tcp_output+0x3e8>
  }

  wnd = LWIP_MIN(pcb->snd_wnd, pcb->cwnd);
 801f838:	687b      	ldr	r3, [r7, #4]
 801f83a:	f8b3 2048 	ldrh.w	r2, [r3, #72]	@ 0x48
 801f83e:	687b      	ldr	r3, [r7, #4]
 801f840:	f8b3 3060 	ldrh.w	r3, [r3, #96]	@ 0x60
 801f844:	4293      	cmp	r3, r2
 801f846:	bf28      	it	cs
 801f848:	4613      	movcs	r3, r2
 801f84a:	b29b      	uxth	r3, r3
 801f84c:	61bb      	str	r3, [r7, #24]

  seg = pcb->unsent;
 801f84e:	687b      	ldr	r3, [r7, #4]
 801f850:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801f852:	627b      	str	r3, [r7, #36]	@ 0x24

  if (seg == NULL) {
 801f854:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801f856:	2b00      	cmp	r3, #0
 801f858:	d10b      	bne.n	801f872 <tcp_output+0x7e>
                                 ", seg == NULL, ack %"U32_F"\n",
                                 pcb->snd_wnd, pcb->cwnd, wnd, pcb->lastack));

    /* If the TF_ACK_NOW flag is set and the ->unsent queue is empty, construct
     * an empty ACK segment and send it. */
    if (pcb->flags & TF_ACK_NOW) {
 801f85a:	687b      	ldr	r3, [r7, #4]
 801f85c:	8b5b      	ldrh	r3, [r3, #26]
 801f85e:	f003 0302 	and.w	r3, r3, #2
 801f862:	2b00      	cmp	r3, #0
 801f864:	f000 81ad 	beq.w	801fbc2 <tcp_output+0x3ce>
      return tcp_send_empty_ack(pcb);
 801f868:	6878      	ldr	r0, [r7, #4]
 801f86a:	f000 fdd7 	bl	802041c <tcp_send_empty_ack>
 801f86e:	4603      	mov	r3, r0
 801f870:	e1b4      	b.n	801fbdc <tcp_output+0x3e8>
                 pcb->snd_wnd, pcb->cwnd, wnd,
                 lwip_ntohl(seg->tcphdr->seqno) - pcb->lastack + seg->len,
                 lwip_ntohl(seg->tcphdr->seqno), pcb->lastack));
  }

  netif = tcp_route(pcb, &pcb->local_ip, &pcb->remote_ip);
 801f872:	6879      	ldr	r1, [r7, #4]
 801f874:	687b      	ldr	r3, [r7, #4]
 801f876:	3304      	adds	r3, #4
 801f878:	461a      	mov	r2, r3
 801f87a:	6878      	ldr	r0, [r7, #4]
 801f87c:	f7fe ffc0 	bl	801e800 <tcp_route>
 801f880:	6178      	str	r0, [r7, #20]
  if (netif == NULL) {
 801f882:	697b      	ldr	r3, [r7, #20]
 801f884:	2b00      	cmp	r3, #0
 801f886:	d102      	bne.n	801f88e <tcp_output+0x9a>
    return ERR_RTE;
 801f888:	f06f 0303 	mvn.w	r3, #3
 801f88c:	e1a6      	b.n	801fbdc <tcp_output+0x3e8>
  }

  /* If we don't have a local IP address, we get one from netif */
  if (ip_addr_isany(&pcb->local_ip)) {
 801f88e:	687b      	ldr	r3, [r7, #4]
 801f890:	2b00      	cmp	r3, #0
 801f892:	d003      	beq.n	801f89c <tcp_output+0xa8>
 801f894:	687b      	ldr	r3, [r7, #4]
 801f896:	681b      	ldr	r3, [r3, #0]
 801f898:	2b00      	cmp	r3, #0
 801f89a:	d111      	bne.n	801f8c0 <tcp_output+0xcc>
    const ip_addr_t *local_ip = ip_netif_get_local_ip(netif, &pcb->remote_ip);
 801f89c:	697b      	ldr	r3, [r7, #20]
 801f89e:	2b00      	cmp	r3, #0
 801f8a0:	d002      	beq.n	801f8a8 <tcp_output+0xb4>
 801f8a2:	697b      	ldr	r3, [r7, #20]
 801f8a4:	3304      	adds	r3, #4
 801f8a6:	e000      	b.n	801f8aa <tcp_output+0xb6>
 801f8a8:	2300      	movs	r3, #0
 801f8aa:	613b      	str	r3, [r7, #16]
    if (local_ip == NULL) {
 801f8ac:	693b      	ldr	r3, [r7, #16]
 801f8ae:	2b00      	cmp	r3, #0
 801f8b0:	d102      	bne.n	801f8b8 <tcp_output+0xc4>
      return ERR_RTE;
 801f8b2:	f06f 0303 	mvn.w	r3, #3
 801f8b6:	e191      	b.n	801fbdc <tcp_output+0x3e8>
    }
    ip_addr_copy(pcb->local_ip, *local_ip);
 801f8b8:	693b      	ldr	r3, [r7, #16]
 801f8ba:	681a      	ldr	r2, [r3, #0]
 801f8bc:	687b      	ldr	r3, [r7, #4]
 801f8be:	601a      	str	r2, [r3, #0]
  }

  /* Handle the current segment not fitting within the window */
  if (lwip_ntohl(seg->tcphdr->seqno) - pcb->lastack + seg->len > wnd) {
 801f8c0:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801f8c2:	691b      	ldr	r3, [r3, #16]
 801f8c4:	685b      	ldr	r3, [r3, #4]
 801f8c6:	4618      	mov	r0, r3
 801f8c8:	f7f8 fedb 	bl	8018682 <lwip_htonl>
 801f8cc:	4602      	mov	r2, r0
 801f8ce:	687b      	ldr	r3, [r7, #4]
 801f8d0:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 801f8d2:	1ad3      	subs	r3, r2, r3
 801f8d4:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 801f8d6:	8912      	ldrh	r2, [r2, #8]
 801f8d8:	4413      	add	r3, r2
 801f8da:	69ba      	ldr	r2, [r7, #24]
 801f8dc:	429a      	cmp	r2, r3
 801f8de:	d227      	bcs.n	801f930 <tcp_output+0x13c>
     * within the remaining (could be 0) send window and RTO timer is not running (we
     * have no in-flight data). If window is still too small after persist timer fires,
     * then we split the segment. We don't consider the congestion window since a cwnd
     * smaller than 1 SMSS implies in-flight data
     */
    if (wnd == pcb->snd_wnd && pcb->unacked == NULL && pcb->persist_backoff == 0) {
 801f8e0:	687b      	ldr	r3, [r7, #4]
 801f8e2:	f8b3 3060 	ldrh.w	r3, [r3, #96]	@ 0x60
 801f8e6:	461a      	mov	r2, r3
 801f8e8:	69bb      	ldr	r3, [r7, #24]
 801f8ea:	4293      	cmp	r3, r2
 801f8ec:	d114      	bne.n	801f918 <tcp_output+0x124>
 801f8ee:	687b      	ldr	r3, [r7, #4]
 801f8f0:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801f8f2:	2b00      	cmp	r3, #0
 801f8f4:	d110      	bne.n	801f918 <tcp_output+0x124>
 801f8f6:	687b      	ldr	r3, [r7, #4]
 801f8f8:	f893 3099 	ldrb.w	r3, [r3, #153]	@ 0x99
 801f8fc:	2b00      	cmp	r3, #0
 801f8fe:	d10b      	bne.n	801f918 <tcp_output+0x124>
      pcb->persist_cnt = 0;
 801f900:	687b      	ldr	r3, [r7, #4]
 801f902:	2200      	movs	r2, #0
 801f904:	f883 2098 	strb.w	r2, [r3, #152]	@ 0x98
      pcb->persist_backoff = 1;
 801f908:	687b      	ldr	r3, [r7, #4]
 801f90a:	2201      	movs	r2, #1
 801f90c:	f883 2099 	strb.w	r2, [r3, #153]	@ 0x99
      pcb->persist_probe = 0;
 801f910:	687b      	ldr	r3, [r7, #4]
 801f912:	2200      	movs	r2, #0
 801f914:	f883 209a 	strb.w	r2, [r3, #154]	@ 0x9a
    }
    /* We need an ACK, but can't send data now, so send an empty ACK */
    if (pcb->flags & TF_ACK_NOW) {
 801f918:	687b      	ldr	r3, [r7, #4]
 801f91a:	8b5b      	ldrh	r3, [r3, #26]
 801f91c:	f003 0302 	and.w	r3, r3, #2
 801f920:	2b00      	cmp	r3, #0
 801f922:	f000 8150 	beq.w	801fbc6 <tcp_output+0x3d2>
      return tcp_send_empty_ack(pcb);
 801f926:	6878      	ldr	r0, [r7, #4]
 801f928:	f000 fd78 	bl	802041c <tcp_send_empty_ack>
 801f92c:	4603      	mov	r3, r0
 801f92e:	e155      	b.n	801fbdc <tcp_output+0x3e8>
    }
    goto output_done;
  }
  /* Stop persist timer, above conditions are not active */
  pcb->persist_backoff = 0;
 801f930:	687b      	ldr	r3, [r7, #4]
 801f932:	2200      	movs	r2, #0
 801f934:	f883 2099 	strb.w	r2, [r3, #153]	@ 0x99

  /* useg should point to last segment on unacked queue */
  useg = pcb->unacked;
 801f938:	687b      	ldr	r3, [r7, #4]
 801f93a:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801f93c:	623b      	str	r3, [r7, #32]
  if (useg != NULL) {
 801f93e:	6a3b      	ldr	r3, [r7, #32]
 801f940:	2b00      	cmp	r3, #0
 801f942:	f000 811f 	beq.w	801fb84 <tcp_output+0x390>
    for (; useg->next != NULL; useg = useg->next);
 801f946:	e002      	b.n	801f94e <tcp_output+0x15a>
 801f948:	6a3b      	ldr	r3, [r7, #32]
 801f94a:	681b      	ldr	r3, [r3, #0]
 801f94c:	623b      	str	r3, [r7, #32]
 801f94e:	6a3b      	ldr	r3, [r7, #32]
 801f950:	681b      	ldr	r3, [r3, #0]
 801f952:	2b00      	cmp	r3, #0
 801f954:	d1f8      	bne.n	801f948 <tcp_output+0x154>
  }
  /* data available and window allows it to be sent? */
  while (seg != NULL &&
 801f956:	e115      	b.n	801fb84 <tcp_output+0x390>
         lwip_ntohl(seg->tcphdr->seqno) - pcb->lastack + seg->len <= wnd) {
    LWIP_ASSERT("RST not expected here!",
 801f958:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801f95a:	691b      	ldr	r3, [r3, #16]
 801f95c:	899b      	ldrh	r3, [r3, #12]
 801f95e:	b29b      	uxth	r3, r3
 801f960:	4618      	mov	r0, r3
 801f962:	f7f8 fe79 	bl	8018658 <lwip_htons>
 801f966:	4603      	mov	r3, r0
 801f968:	b2db      	uxtb	r3, r3
 801f96a:	f003 0304 	and.w	r3, r3, #4
 801f96e:	2b00      	cmp	r3, #0
 801f970:	d006      	beq.n	801f980 <tcp_output+0x18c>
 801f972:	4b2f      	ldr	r3, [pc, #188]	@ (801fa30 <tcp_output+0x23c>)
 801f974:	f240 5236 	movw	r2, #1334	@ 0x536
 801f978:	4932      	ldr	r1, [pc, #200]	@ (801fa44 <tcp_output+0x250>)
 801f97a:	482f      	ldr	r0, [pc, #188]	@ (801fa38 <tcp_output+0x244>)
 801f97c:	f009 fdc6 	bl	802950c <iprintf>
     * - if tcp_write had a memory error before (prevent delayed ACK timeout) or
     * - if FIN was already enqueued for this PCB (SYN is always alone in a segment -
     *   either seg->next != NULL or pcb->unacked == NULL;
     *   RST is no sent using tcp_write/tcp_output.
     */
    if ((tcp_do_output_nagle(pcb) == 0) &&
 801f980:	687b      	ldr	r3, [r7, #4]
 801f982:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801f984:	2b00      	cmp	r3, #0
 801f986:	d01f      	beq.n	801f9c8 <tcp_output+0x1d4>
 801f988:	687b      	ldr	r3, [r7, #4]
 801f98a:	8b5b      	ldrh	r3, [r3, #26]
 801f98c:	f003 0344 	and.w	r3, r3, #68	@ 0x44
 801f990:	2b00      	cmp	r3, #0
 801f992:	d119      	bne.n	801f9c8 <tcp_output+0x1d4>
 801f994:	687b      	ldr	r3, [r7, #4]
 801f996:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801f998:	2b00      	cmp	r3, #0
 801f99a:	d00b      	beq.n	801f9b4 <tcp_output+0x1c0>
 801f99c:	687b      	ldr	r3, [r7, #4]
 801f99e:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801f9a0:	681b      	ldr	r3, [r3, #0]
 801f9a2:	2b00      	cmp	r3, #0
 801f9a4:	d110      	bne.n	801f9c8 <tcp_output+0x1d4>
 801f9a6:	687b      	ldr	r3, [r7, #4]
 801f9a8:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801f9aa:	891a      	ldrh	r2, [r3, #8]
 801f9ac:	687b      	ldr	r3, [r7, #4]
 801f9ae:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801f9b0:	429a      	cmp	r2, r3
 801f9b2:	d209      	bcs.n	801f9c8 <tcp_output+0x1d4>
 801f9b4:	687b      	ldr	r3, [r7, #4]
 801f9b6:	f8b3 3064 	ldrh.w	r3, [r3, #100]	@ 0x64
 801f9ba:	2b00      	cmp	r3, #0
 801f9bc:	d004      	beq.n	801f9c8 <tcp_output+0x1d4>
 801f9be:	687b      	ldr	r3, [r7, #4]
 801f9c0:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 801f9c4:	2b0f      	cmp	r3, #15
 801f9c6:	d901      	bls.n	801f9cc <tcp_output+0x1d8>
 801f9c8:	2301      	movs	r3, #1
 801f9ca:	e000      	b.n	801f9ce <tcp_output+0x1da>
 801f9cc:	2300      	movs	r3, #0
 801f9ce:	2b00      	cmp	r3, #0
 801f9d0:	d106      	bne.n	801f9e0 <tcp_output+0x1ec>
        ((pcb->flags & (TF_NAGLEMEMERR | TF_FIN)) == 0)) {
 801f9d2:	687b      	ldr	r3, [r7, #4]
 801f9d4:	8b5b      	ldrh	r3, [r3, #26]
 801f9d6:	f003 03a0 	and.w	r3, r3, #160	@ 0xa0
    if ((tcp_do_output_nagle(pcb) == 0) &&
 801f9da:	2b00      	cmp	r3, #0
 801f9dc:	f000 80e7 	beq.w	801fbae <tcp_output+0x3ba>
                                 pcb->lastack,
                                 lwip_ntohl(seg->tcphdr->seqno), pcb->lastack, i));
    ++i;
#endif /* TCP_CWND_DEBUG */

    if (pcb->state != SYN_SENT) {
 801f9e0:	687b      	ldr	r3, [r7, #4]
 801f9e2:	7d1b      	ldrb	r3, [r3, #20]
 801f9e4:	2b02      	cmp	r3, #2
 801f9e6:	d00d      	beq.n	801fa04 <tcp_output+0x210>
      TCPH_SET_FLAG(seg->tcphdr, TCP_ACK);
 801f9e8:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801f9ea:	691b      	ldr	r3, [r3, #16]
 801f9ec:	899b      	ldrh	r3, [r3, #12]
 801f9ee:	b29c      	uxth	r4, r3
 801f9f0:	2010      	movs	r0, #16
 801f9f2:	f7f8 fe31 	bl	8018658 <lwip_htons>
 801f9f6:	4603      	mov	r3, r0
 801f9f8:	461a      	mov	r2, r3
 801f9fa:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801f9fc:	691b      	ldr	r3, [r3, #16]
 801f9fe:	4322      	orrs	r2, r4
 801fa00:	b292      	uxth	r2, r2
 801fa02:	819a      	strh	r2, [r3, #12]
    }

    err = tcp_output_segment(seg, pcb, netif);
 801fa04:	697a      	ldr	r2, [r7, #20]
 801fa06:	6879      	ldr	r1, [r7, #4]
 801fa08:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 801fa0a:	f000 f90b 	bl	801fc24 <tcp_output_segment>
 801fa0e:	4603      	mov	r3, r0
 801fa10:	73fb      	strb	r3, [r7, #15]
    if (err != ERR_OK) {
 801fa12:	f997 300f 	ldrsb.w	r3, [r7, #15]
 801fa16:	2b00      	cmp	r3, #0
 801fa18:	d016      	beq.n	801fa48 <tcp_output+0x254>
      /* segment could not be sent, for whatever reason */
      tcp_set_flags(pcb, TF_NAGLEMEMERR);
 801fa1a:	687b      	ldr	r3, [r7, #4]
 801fa1c:	8b5b      	ldrh	r3, [r3, #26]
 801fa1e:	f043 0380 	orr.w	r3, r3, #128	@ 0x80
 801fa22:	b29a      	uxth	r2, r3
 801fa24:	687b      	ldr	r3, [r7, #4]
 801fa26:	835a      	strh	r2, [r3, #26]
      return err;
 801fa28:	f997 300f 	ldrsb.w	r3, [r7, #15]
 801fa2c:	e0d6      	b.n	801fbdc <tcp_output+0x3e8>
 801fa2e:	bf00      	nop
 801fa30:	0802ed24 	.word	0x0802ed24
 801fa34:	0802f2c4 	.word	0x0802f2c4
 801fa38:	0802ed78 	.word	0x0802ed78
 801fa3c:	0802f2dc 	.word	0x0802f2dc
 801fa40:	2402a03c 	.word	0x2402a03c
 801fa44:	0802f304 	.word	0x0802f304
    }
#if TCP_OVERSIZE_DBGCHECK
    seg->oversize_left = 0;
 801fa48:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801fa4a:	2200      	movs	r2, #0
 801fa4c:	815a      	strh	r2, [r3, #10]
#endif /* TCP_OVERSIZE_DBGCHECK */
    pcb->unsent = seg->next;
 801fa4e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801fa50:	681a      	ldr	r2, [r3, #0]
 801fa52:	687b      	ldr	r3, [r7, #4]
 801fa54:	66da      	str	r2, [r3, #108]	@ 0x6c
    if (pcb->state != SYN_SENT) {
 801fa56:	687b      	ldr	r3, [r7, #4]
 801fa58:	7d1b      	ldrb	r3, [r3, #20]
 801fa5a:	2b02      	cmp	r3, #2
 801fa5c:	d006      	beq.n	801fa6c <tcp_output+0x278>
      tcp_clear_flags(pcb, TF_ACK_DELAY | TF_ACK_NOW);
 801fa5e:	687b      	ldr	r3, [r7, #4]
 801fa60:	8b5b      	ldrh	r3, [r3, #26]
 801fa62:	f023 0303 	bic.w	r3, r3, #3
 801fa66:	b29a      	uxth	r2, r3
 801fa68:	687b      	ldr	r3, [r7, #4]
 801fa6a:	835a      	strh	r2, [r3, #26]
    }
    snd_nxt = lwip_ntohl(seg->tcphdr->seqno) + TCP_TCPLEN(seg);
 801fa6c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801fa6e:	691b      	ldr	r3, [r3, #16]
 801fa70:	685b      	ldr	r3, [r3, #4]
 801fa72:	4618      	mov	r0, r3
 801fa74:	f7f8 fe05 	bl	8018682 <lwip_htonl>
 801fa78:	4604      	mov	r4, r0
 801fa7a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801fa7c:	891b      	ldrh	r3, [r3, #8]
 801fa7e:	461d      	mov	r5, r3
 801fa80:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801fa82:	691b      	ldr	r3, [r3, #16]
 801fa84:	899b      	ldrh	r3, [r3, #12]
 801fa86:	b29b      	uxth	r3, r3
 801fa88:	4618      	mov	r0, r3
 801fa8a:	f7f8 fde5 	bl	8018658 <lwip_htons>
 801fa8e:	4603      	mov	r3, r0
 801fa90:	b2db      	uxtb	r3, r3
 801fa92:	f003 0303 	and.w	r3, r3, #3
 801fa96:	2b00      	cmp	r3, #0
 801fa98:	d001      	beq.n	801fa9e <tcp_output+0x2aa>
 801fa9a:	2301      	movs	r3, #1
 801fa9c:	e000      	b.n	801faa0 <tcp_output+0x2ac>
 801fa9e:	2300      	movs	r3, #0
 801faa0:	442b      	add	r3, r5
 801faa2:	4423      	add	r3, r4
 801faa4:	60bb      	str	r3, [r7, #8]
    if (TCP_SEQ_LT(pcb->snd_nxt, snd_nxt)) {
 801faa6:	687b      	ldr	r3, [r7, #4]
 801faa8:	6d1a      	ldr	r2, [r3, #80]	@ 0x50
 801faaa:	68bb      	ldr	r3, [r7, #8]
 801faac:	1ad3      	subs	r3, r2, r3
 801faae:	2b00      	cmp	r3, #0
 801fab0:	da02      	bge.n	801fab8 <tcp_output+0x2c4>
      pcb->snd_nxt = snd_nxt;
 801fab2:	687b      	ldr	r3, [r7, #4]
 801fab4:	68ba      	ldr	r2, [r7, #8]
 801fab6:	651a      	str	r2, [r3, #80]	@ 0x50
    }
    /* put segment on unacknowledged list if length > 0 */
    if (TCP_TCPLEN(seg) > 0) {
 801fab8:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801faba:	891b      	ldrh	r3, [r3, #8]
 801fabc:	461c      	mov	r4, r3
 801fabe:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801fac0:	691b      	ldr	r3, [r3, #16]
 801fac2:	899b      	ldrh	r3, [r3, #12]
 801fac4:	b29b      	uxth	r3, r3
 801fac6:	4618      	mov	r0, r3
 801fac8:	f7f8 fdc6 	bl	8018658 <lwip_htons>
 801facc:	4603      	mov	r3, r0
 801face:	b2db      	uxtb	r3, r3
 801fad0:	f003 0303 	and.w	r3, r3, #3
 801fad4:	2b00      	cmp	r3, #0
 801fad6:	d001      	beq.n	801fadc <tcp_output+0x2e8>
 801fad8:	2301      	movs	r3, #1
 801fada:	e000      	b.n	801fade <tcp_output+0x2ea>
 801fadc:	2300      	movs	r3, #0
 801fade:	4423      	add	r3, r4
 801fae0:	2b00      	cmp	r3, #0
 801fae2:	d049      	beq.n	801fb78 <tcp_output+0x384>
      seg->next = NULL;
 801fae4:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801fae6:	2200      	movs	r2, #0
 801fae8:	601a      	str	r2, [r3, #0]
      /* unacked list is empty? */
      if (pcb->unacked == NULL) {
 801faea:	687b      	ldr	r3, [r7, #4]
 801faec:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801faee:	2b00      	cmp	r3, #0
 801faf0:	d105      	bne.n	801fafe <tcp_output+0x30a>
        pcb->unacked = seg;
 801faf2:	687b      	ldr	r3, [r7, #4]
 801faf4:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 801faf6:	671a      	str	r2, [r3, #112]	@ 0x70
        useg = seg;
 801faf8:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801fafa:	623b      	str	r3, [r7, #32]
 801fafc:	e03f      	b.n	801fb7e <tcp_output+0x38a>
        /* unacked list is not empty? */
      } else {
        /* In the case of fast retransmit, the packet should not go to the tail
         * of the unacked queue, but rather somewhere before it. We need to check for
         * this case. -STJ Jul 27, 2004 */
        if (TCP_SEQ_LT(lwip_ntohl(seg->tcphdr->seqno), lwip_ntohl(useg->tcphdr->seqno))) {
 801fafe:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801fb00:	691b      	ldr	r3, [r3, #16]
 801fb02:	685b      	ldr	r3, [r3, #4]
 801fb04:	4618      	mov	r0, r3
 801fb06:	f7f8 fdbc 	bl	8018682 <lwip_htonl>
 801fb0a:	4604      	mov	r4, r0
 801fb0c:	6a3b      	ldr	r3, [r7, #32]
 801fb0e:	691b      	ldr	r3, [r3, #16]
 801fb10:	685b      	ldr	r3, [r3, #4]
 801fb12:	4618      	mov	r0, r3
 801fb14:	f7f8 fdb5 	bl	8018682 <lwip_htonl>
 801fb18:	4603      	mov	r3, r0
 801fb1a:	1ae3      	subs	r3, r4, r3
 801fb1c:	2b00      	cmp	r3, #0
 801fb1e:	da24      	bge.n	801fb6a <tcp_output+0x376>
          /* add segment to before tail of unacked list, keeping the list sorted */
          struct tcp_seg **cur_seg = &(pcb->unacked);
 801fb20:	687b      	ldr	r3, [r7, #4]
 801fb22:	3370      	adds	r3, #112	@ 0x70
 801fb24:	61fb      	str	r3, [r7, #28]
          while (*cur_seg &&
 801fb26:	e002      	b.n	801fb2e <tcp_output+0x33a>
                 TCP_SEQ_LT(lwip_ntohl((*cur_seg)->tcphdr->seqno), lwip_ntohl(seg->tcphdr->seqno))) {
            cur_seg = &((*cur_seg)->next );
 801fb28:	69fb      	ldr	r3, [r7, #28]
 801fb2a:	681b      	ldr	r3, [r3, #0]
 801fb2c:	61fb      	str	r3, [r7, #28]
          while (*cur_seg &&
 801fb2e:	69fb      	ldr	r3, [r7, #28]
 801fb30:	681b      	ldr	r3, [r3, #0]
 801fb32:	2b00      	cmp	r3, #0
 801fb34:	d011      	beq.n	801fb5a <tcp_output+0x366>
                 TCP_SEQ_LT(lwip_ntohl((*cur_seg)->tcphdr->seqno), lwip_ntohl(seg->tcphdr->seqno))) {
 801fb36:	69fb      	ldr	r3, [r7, #28]
 801fb38:	681b      	ldr	r3, [r3, #0]
 801fb3a:	691b      	ldr	r3, [r3, #16]
 801fb3c:	685b      	ldr	r3, [r3, #4]
 801fb3e:	4618      	mov	r0, r3
 801fb40:	f7f8 fd9f 	bl	8018682 <lwip_htonl>
 801fb44:	4604      	mov	r4, r0
 801fb46:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801fb48:	691b      	ldr	r3, [r3, #16]
 801fb4a:	685b      	ldr	r3, [r3, #4]
 801fb4c:	4618      	mov	r0, r3
 801fb4e:	f7f8 fd98 	bl	8018682 <lwip_htonl>
 801fb52:	4603      	mov	r3, r0
 801fb54:	1ae3      	subs	r3, r4, r3
          while (*cur_seg &&
 801fb56:	2b00      	cmp	r3, #0
 801fb58:	dbe6      	blt.n	801fb28 <tcp_output+0x334>
          }
          seg->next = (*cur_seg);
 801fb5a:	69fb      	ldr	r3, [r7, #28]
 801fb5c:	681a      	ldr	r2, [r3, #0]
 801fb5e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801fb60:	601a      	str	r2, [r3, #0]
          (*cur_seg) = seg;
 801fb62:	69fb      	ldr	r3, [r7, #28]
 801fb64:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 801fb66:	601a      	str	r2, [r3, #0]
 801fb68:	e009      	b.n	801fb7e <tcp_output+0x38a>
        } else {
          /* add segment to tail of unacked list */
          useg->next = seg;
 801fb6a:	6a3b      	ldr	r3, [r7, #32]
 801fb6c:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 801fb6e:	601a      	str	r2, [r3, #0]
          useg = useg->next;
 801fb70:	6a3b      	ldr	r3, [r7, #32]
 801fb72:	681b      	ldr	r3, [r3, #0]
 801fb74:	623b      	str	r3, [r7, #32]
 801fb76:	e002      	b.n	801fb7e <tcp_output+0x38a>
        }
      }
      /* do not queue empty segments on the unacked list */
    } else {
      tcp_seg_free(seg);
 801fb78:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 801fb7a:	f7fb fea8 	bl	801b8ce <tcp_seg_free>
    }
    seg = pcb->unsent;
 801fb7e:	687b      	ldr	r3, [r7, #4]
 801fb80:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801fb82:	627b      	str	r3, [r7, #36]	@ 0x24
  while (seg != NULL &&
 801fb84:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801fb86:	2b00      	cmp	r3, #0
 801fb88:	d012      	beq.n	801fbb0 <tcp_output+0x3bc>
         lwip_ntohl(seg->tcphdr->seqno) - pcb->lastack + seg->len <= wnd) {
 801fb8a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801fb8c:	691b      	ldr	r3, [r3, #16]
 801fb8e:	685b      	ldr	r3, [r3, #4]
 801fb90:	4618      	mov	r0, r3
 801fb92:	f7f8 fd76 	bl	8018682 <lwip_htonl>
 801fb96:	4602      	mov	r2, r0
 801fb98:	687b      	ldr	r3, [r7, #4]
 801fb9a:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 801fb9c:	1ad3      	subs	r3, r2, r3
 801fb9e:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 801fba0:	8912      	ldrh	r2, [r2, #8]
 801fba2:	4413      	add	r3, r2
  while (seg != NULL &&
 801fba4:	69ba      	ldr	r2, [r7, #24]
 801fba6:	429a      	cmp	r2, r3
 801fba8:	f4bf aed6 	bcs.w	801f958 <tcp_output+0x164>
 801fbac:	e000      	b.n	801fbb0 <tcp_output+0x3bc>
      break;
 801fbae:	bf00      	nop
  }
#if TCP_OVERSIZE
  if (pcb->unsent == NULL) {
 801fbb0:	687b      	ldr	r3, [r7, #4]
 801fbb2:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801fbb4:	2b00      	cmp	r3, #0
 801fbb6:	d108      	bne.n	801fbca <tcp_output+0x3d6>
    /* last unsent has been removed, reset unsent_oversize */
    pcb->unsent_oversize = 0;
 801fbb8:	687b      	ldr	r3, [r7, #4]
 801fbba:	2200      	movs	r2, #0
 801fbbc:	f8a3 2068 	strh.w	r2, [r3, #104]	@ 0x68
 801fbc0:	e004      	b.n	801fbcc <tcp_output+0x3d8>
    goto output_done;
 801fbc2:	bf00      	nop
 801fbc4:	e002      	b.n	801fbcc <tcp_output+0x3d8>
    goto output_done;
 801fbc6:	bf00      	nop
 801fbc8:	e000      	b.n	801fbcc <tcp_output+0x3d8>
  }
#endif /* TCP_OVERSIZE */

output_done:
 801fbca:	bf00      	nop
  tcp_clear_flags(pcb, TF_NAGLEMEMERR);
 801fbcc:	687b      	ldr	r3, [r7, #4]
 801fbce:	8b5b      	ldrh	r3, [r3, #26]
 801fbd0:	f023 0380 	bic.w	r3, r3, #128	@ 0x80
 801fbd4:	b29a      	uxth	r2, r3
 801fbd6:	687b      	ldr	r3, [r7, #4]
 801fbd8:	835a      	strh	r2, [r3, #26]
  return ERR_OK;
 801fbda:	2300      	movs	r3, #0
}
 801fbdc:	4618      	mov	r0, r3
 801fbde:	3728      	adds	r7, #40	@ 0x28
 801fbe0:	46bd      	mov	sp, r7
 801fbe2:	bdb0      	pop	{r4, r5, r7, pc}

0801fbe4 <tcp_output_segment_busy>:
 * @arg seg the tcp segment to check
 * @return 1 if ref != 1, 0 if ref == 1
 */
static int
tcp_output_segment_busy(const struct tcp_seg *seg)
{
 801fbe4:	b580      	push	{r7, lr}
 801fbe6:	b082      	sub	sp, #8
 801fbe8:	af00      	add	r7, sp, #0
 801fbea:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT("tcp_output_segment_busy: invalid seg", seg != NULL);
 801fbec:	687b      	ldr	r3, [r7, #4]
 801fbee:	2b00      	cmp	r3, #0
 801fbf0:	d106      	bne.n	801fc00 <tcp_output_segment_busy+0x1c>
 801fbf2:	4b09      	ldr	r3, [pc, #36]	@ (801fc18 <tcp_output_segment_busy+0x34>)
 801fbf4:	f240 529a 	movw	r2, #1434	@ 0x59a
 801fbf8:	4908      	ldr	r1, [pc, #32]	@ (801fc1c <tcp_output_segment_busy+0x38>)
 801fbfa:	4809      	ldr	r0, [pc, #36]	@ (801fc20 <tcp_output_segment_busy+0x3c>)
 801fbfc:	f009 fc86 	bl	802950c <iprintf>

  /* We only need to check the first pbuf here:
     If a pbuf is queued for transmission, a driver calls pbuf_ref(),
     which only changes the ref count of the first pbuf */
  if (seg->p->ref != 1) {
 801fc00:	687b      	ldr	r3, [r7, #4]
 801fc02:	685b      	ldr	r3, [r3, #4]
 801fc04:	7b9b      	ldrb	r3, [r3, #14]
 801fc06:	2b01      	cmp	r3, #1
 801fc08:	d001      	beq.n	801fc0e <tcp_output_segment_busy+0x2a>
    /* other reference found */
    return 1;
 801fc0a:	2301      	movs	r3, #1
 801fc0c:	e000      	b.n	801fc10 <tcp_output_segment_busy+0x2c>
  }
  /* no other references found */
  return 0;
 801fc0e:	2300      	movs	r3, #0
}
 801fc10:	4618      	mov	r0, r3
 801fc12:	3708      	adds	r7, #8
 801fc14:	46bd      	mov	sp, r7
 801fc16:	bd80      	pop	{r7, pc}
 801fc18:	0802ed24 	.word	0x0802ed24
 801fc1c:	0802f31c 	.word	0x0802f31c
 801fc20:	0802ed78 	.word	0x0802ed78

0801fc24 <tcp_output_segment>:
 * @param pcb the tcp_pcb for the TCP connection used to send the segment
 * @param netif the netif used to send the segment
 */
static err_t
tcp_output_segment(struct tcp_seg *seg, struct tcp_pcb *pcb, struct netif *netif)
{
 801fc24:	b5b0      	push	{r4, r5, r7, lr}
 801fc26:	b08c      	sub	sp, #48	@ 0x30
 801fc28:	af04      	add	r7, sp, #16
 801fc2a:	60f8      	str	r0, [r7, #12]
 801fc2c:	60b9      	str	r1, [r7, #8]
 801fc2e:	607a      	str	r2, [r7, #4]
  u32_t *opts;
#if TCP_CHECKSUM_ON_COPY
  int seg_chksum_was_swapped = 0;
#endif

  LWIP_ASSERT("tcp_output_segment: invalid seg", seg != NULL);
 801fc30:	68fb      	ldr	r3, [r7, #12]
 801fc32:	2b00      	cmp	r3, #0
 801fc34:	d106      	bne.n	801fc44 <tcp_output_segment+0x20>
 801fc36:	4b64      	ldr	r3, [pc, #400]	@ (801fdc8 <tcp_output_segment+0x1a4>)
 801fc38:	f44f 62b7 	mov.w	r2, #1464	@ 0x5b8
 801fc3c:	4963      	ldr	r1, [pc, #396]	@ (801fdcc <tcp_output_segment+0x1a8>)
 801fc3e:	4864      	ldr	r0, [pc, #400]	@ (801fdd0 <tcp_output_segment+0x1ac>)
 801fc40:	f009 fc64 	bl	802950c <iprintf>
  LWIP_ASSERT("tcp_output_segment: invalid pcb", pcb != NULL);
 801fc44:	68bb      	ldr	r3, [r7, #8]
 801fc46:	2b00      	cmp	r3, #0
 801fc48:	d106      	bne.n	801fc58 <tcp_output_segment+0x34>
 801fc4a:	4b5f      	ldr	r3, [pc, #380]	@ (801fdc8 <tcp_output_segment+0x1a4>)
 801fc4c:	f240 52b9 	movw	r2, #1465	@ 0x5b9
 801fc50:	4960      	ldr	r1, [pc, #384]	@ (801fdd4 <tcp_output_segment+0x1b0>)
 801fc52:	485f      	ldr	r0, [pc, #380]	@ (801fdd0 <tcp_output_segment+0x1ac>)
 801fc54:	f009 fc5a 	bl	802950c <iprintf>
  LWIP_ASSERT("tcp_output_segment: invalid netif", netif != NULL);
 801fc58:	687b      	ldr	r3, [r7, #4]
 801fc5a:	2b00      	cmp	r3, #0
 801fc5c:	d106      	bne.n	801fc6c <tcp_output_segment+0x48>
 801fc5e:	4b5a      	ldr	r3, [pc, #360]	@ (801fdc8 <tcp_output_segment+0x1a4>)
 801fc60:	f240 52ba 	movw	r2, #1466	@ 0x5ba
 801fc64:	495c      	ldr	r1, [pc, #368]	@ (801fdd8 <tcp_output_segment+0x1b4>)
 801fc66:	485a      	ldr	r0, [pc, #360]	@ (801fdd0 <tcp_output_segment+0x1ac>)
 801fc68:	f009 fc50 	bl	802950c <iprintf>

  if (tcp_output_segment_busy(seg)) {
 801fc6c:	68f8      	ldr	r0, [r7, #12]
 801fc6e:	f7ff ffb9 	bl	801fbe4 <tcp_output_segment_busy>
 801fc72:	4603      	mov	r3, r0
 801fc74:	2b00      	cmp	r3, #0
 801fc76:	d001      	beq.n	801fc7c <tcp_output_segment+0x58>
    /* This should not happen: rexmit functions should have checked this.
       However, since this function modifies p->len, we must not continue in this case. */
    LWIP_DEBUGF(TCP_RTO_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("tcp_output_segment: segment busy\n"));
    return ERR_OK;
 801fc78:	2300      	movs	r3, #0
 801fc7a:	e0a1      	b.n	801fdc0 <tcp_output_segment+0x19c>
  }

  /* The TCP header has already been constructed, but the ackno and
   wnd fields remain. */
  seg->tcphdr->ackno = lwip_htonl(pcb->rcv_nxt);
 801fc7c:	68bb      	ldr	r3, [r7, #8]
 801fc7e:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 801fc80:	68fb      	ldr	r3, [r7, #12]
 801fc82:	691c      	ldr	r4, [r3, #16]
 801fc84:	4610      	mov	r0, r2
 801fc86:	f7f8 fcfc 	bl	8018682 <lwip_htonl>
 801fc8a:	4603      	mov	r3, r0
 801fc8c:	60a3      	str	r3, [r4, #8]
       the window scale option) is never scaled. */
    seg->tcphdr->wnd = lwip_htons(TCPWND_MIN16(pcb->rcv_ann_wnd));
  } else
#endif /* LWIP_WND_SCALE */
  {
    seg->tcphdr->wnd = lwip_htons(TCPWND_MIN16(RCV_WND_SCALE(pcb, pcb->rcv_ann_wnd)));
 801fc8e:	68bb      	ldr	r3, [r7, #8]
 801fc90:	8d5a      	ldrh	r2, [r3, #42]	@ 0x2a
 801fc92:	68fb      	ldr	r3, [r7, #12]
 801fc94:	691c      	ldr	r4, [r3, #16]
 801fc96:	4610      	mov	r0, r2
 801fc98:	f7f8 fcde 	bl	8018658 <lwip_htons>
 801fc9c:	4603      	mov	r3, r0
 801fc9e:	81e3      	strh	r3, [r4, #14]
  }

  pcb->rcv_ann_right_edge = pcb->rcv_nxt + pcb->rcv_ann_wnd;
 801fca0:	68bb      	ldr	r3, [r7, #8]
 801fca2:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801fca4:	68ba      	ldr	r2, [r7, #8]
 801fca6:	8d52      	ldrh	r2, [r2, #42]	@ 0x2a
 801fca8:	441a      	add	r2, r3
 801fcaa:	68bb      	ldr	r3, [r7, #8]
 801fcac:	62da      	str	r2, [r3, #44]	@ 0x2c

  /* Add any requested options.  NB MSS option is only set on SYN
     packets, so ignore it here */
  /* cast through void* to get rid of alignment warnings */
  opts = (u32_t *)(void *)(seg->tcphdr + 1);
 801fcae:	68fb      	ldr	r3, [r7, #12]
 801fcb0:	691b      	ldr	r3, [r3, #16]
 801fcb2:	3314      	adds	r3, #20
 801fcb4:	61fb      	str	r3, [r7, #28]
  if (seg->flags & TF_SEG_OPTS_MSS) {
 801fcb6:	68fb      	ldr	r3, [r7, #12]
 801fcb8:	7b1b      	ldrb	r3, [r3, #12]
 801fcba:	f003 0301 	and.w	r3, r3, #1
 801fcbe:	2b00      	cmp	r3, #0
 801fcc0:	d015      	beq.n	801fcee <tcp_output_segment+0xca>
    u16_t mss;
#if TCP_CALCULATE_EFF_SEND_MSS
    mss = tcp_eff_send_mss_netif(TCP_MSS, netif, &pcb->remote_ip);
 801fcc2:	68bb      	ldr	r3, [r7, #8]
 801fcc4:	3304      	adds	r3, #4
 801fcc6:	461a      	mov	r2, r3
 801fcc8:	6879      	ldr	r1, [r7, #4]
 801fcca:	f240 50b4 	movw	r0, #1460	@ 0x5b4
 801fcce:	f7fc f9cd 	bl	801c06c <tcp_eff_send_mss_netif>
 801fcd2:	4603      	mov	r3, r0
 801fcd4:	837b      	strh	r3, [r7, #26]
#else /* TCP_CALCULATE_EFF_SEND_MSS */
    mss = TCP_MSS;
#endif /* TCP_CALCULATE_EFF_SEND_MSS */
    *opts = TCP_BUILD_MSS_OPTION(mss);
 801fcd6:	8b7b      	ldrh	r3, [r7, #26]
 801fcd8:	f043 7301 	orr.w	r3, r3, #33816576	@ 0x2040000
 801fcdc:	4618      	mov	r0, r3
 801fcde:	f7f8 fcd0 	bl	8018682 <lwip_htonl>
 801fce2:	4602      	mov	r2, r0
 801fce4:	69fb      	ldr	r3, [r7, #28]
 801fce6:	601a      	str	r2, [r3, #0]
    opts += 1;
 801fce8:	69fb      	ldr	r3, [r7, #28]
 801fcea:	3304      	adds	r3, #4
 801fcec:	61fb      	str	r3, [r7, #28]
  }
#endif

  /* Set retransmission timer running if it is not currently enabled
     This must be set before checking the route. */
  if (pcb->rtime < 0) {
 801fcee:	68bb      	ldr	r3, [r7, #8]
 801fcf0:	f9b3 3030 	ldrsh.w	r3, [r3, #48]	@ 0x30
 801fcf4:	2b00      	cmp	r3, #0
 801fcf6:	da02      	bge.n	801fcfe <tcp_output_segment+0xda>
    pcb->rtime = 0;
 801fcf8:	68bb      	ldr	r3, [r7, #8]
 801fcfa:	2200      	movs	r2, #0
 801fcfc:	861a      	strh	r2, [r3, #48]	@ 0x30
  }

  if (pcb->rttest == 0) {
 801fcfe:	68bb      	ldr	r3, [r7, #8]
 801fd00:	6b5b      	ldr	r3, [r3, #52]	@ 0x34
 801fd02:	2b00      	cmp	r3, #0
 801fd04:	d10c      	bne.n	801fd20 <tcp_output_segment+0xfc>
    pcb->rttest = tcp_ticks;
 801fd06:	4b35      	ldr	r3, [pc, #212]	@ (801fddc <tcp_output_segment+0x1b8>)
 801fd08:	681a      	ldr	r2, [r3, #0]
 801fd0a:	68bb      	ldr	r3, [r7, #8]
 801fd0c:	635a      	str	r2, [r3, #52]	@ 0x34
    pcb->rtseq = lwip_ntohl(seg->tcphdr->seqno);
 801fd0e:	68fb      	ldr	r3, [r7, #12]
 801fd10:	691b      	ldr	r3, [r3, #16]
 801fd12:	685b      	ldr	r3, [r3, #4]
 801fd14:	4618      	mov	r0, r3
 801fd16:	f7f8 fcb4 	bl	8018682 <lwip_htonl>
 801fd1a:	4602      	mov	r2, r0
 801fd1c:	68bb      	ldr	r3, [r7, #8]
 801fd1e:	639a      	str	r2, [r3, #56]	@ 0x38
  }
  LWIP_DEBUGF(TCP_OUTPUT_DEBUG, ("tcp_output_segment: %"U32_F":%"U32_F"\n",
                                 lwip_htonl(seg->tcphdr->seqno), lwip_htonl(seg->tcphdr->seqno) +
                                 seg->len));

  len = (u16_t)((u8_t *)seg->tcphdr - (u8_t *)seg->p->payload);
 801fd20:	68fb      	ldr	r3, [r7, #12]
 801fd22:	691a      	ldr	r2, [r3, #16]
 801fd24:	68fb      	ldr	r3, [r7, #12]
 801fd26:	685b      	ldr	r3, [r3, #4]
 801fd28:	685b      	ldr	r3, [r3, #4]
 801fd2a:	1ad3      	subs	r3, r2, r3
 801fd2c:	833b      	strh	r3, [r7, #24]
  if (len == 0) {
    /** Exclude retransmitted segments from this count. */
    MIB2_STATS_INC(mib2.tcpoutsegs);
  }

  seg->p->len -= len;
 801fd2e:	68fb      	ldr	r3, [r7, #12]
 801fd30:	685b      	ldr	r3, [r3, #4]
 801fd32:	8959      	ldrh	r1, [r3, #10]
 801fd34:	68fb      	ldr	r3, [r7, #12]
 801fd36:	685b      	ldr	r3, [r3, #4]
 801fd38:	8b3a      	ldrh	r2, [r7, #24]
 801fd3a:	1a8a      	subs	r2, r1, r2
 801fd3c:	b292      	uxth	r2, r2
 801fd3e:	815a      	strh	r2, [r3, #10]
  seg->p->tot_len -= len;
 801fd40:	68fb      	ldr	r3, [r7, #12]
 801fd42:	685b      	ldr	r3, [r3, #4]
 801fd44:	8919      	ldrh	r1, [r3, #8]
 801fd46:	68fb      	ldr	r3, [r7, #12]
 801fd48:	685b      	ldr	r3, [r3, #4]
 801fd4a:	8b3a      	ldrh	r2, [r7, #24]
 801fd4c:	1a8a      	subs	r2, r1, r2
 801fd4e:	b292      	uxth	r2, r2
 801fd50:	811a      	strh	r2, [r3, #8]

  seg->p->payload = seg->tcphdr;
 801fd52:	68fb      	ldr	r3, [r7, #12]
 801fd54:	685b      	ldr	r3, [r3, #4]
 801fd56:	68fa      	ldr	r2, [r7, #12]
 801fd58:	6912      	ldr	r2, [r2, #16]
 801fd5a:	605a      	str	r2, [r3, #4]

  seg->tcphdr->chksum = 0;
 801fd5c:	68fb      	ldr	r3, [r7, #12]
 801fd5e:	691b      	ldr	r3, [r3, #16]
 801fd60:	2200      	movs	r2, #0
 801fd62:	741a      	strb	r2, [r3, #16]
 801fd64:	2200      	movs	r2, #0
 801fd66:	745a      	strb	r2, [r3, #17]

#ifdef LWIP_HOOK_TCP_OUT_ADD_TCPOPTS
  opts = LWIP_HOOK_TCP_OUT_ADD_TCPOPTS(seg->p, seg->tcphdr, pcb, opts);
#endif
  LWIP_ASSERT("options not filled", (u8_t *)opts == ((u8_t *)(seg->tcphdr + 1)) + LWIP_TCP_OPT_LENGTH_SEGMENT(seg->flags, pcb));
 801fd68:	68fb      	ldr	r3, [r7, #12]
 801fd6a:	691a      	ldr	r2, [r3, #16]
 801fd6c:	68fb      	ldr	r3, [r7, #12]
 801fd6e:	7b1b      	ldrb	r3, [r3, #12]
 801fd70:	f003 0301 	and.w	r3, r3, #1
 801fd74:	2b00      	cmp	r3, #0
 801fd76:	d001      	beq.n	801fd7c <tcp_output_segment+0x158>
 801fd78:	2318      	movs	r3, #24
 801fd7a:	e000      	b.n	801fd7e <tcp_output_segment+0x15a>
 801fd7c:	2314      	movs	r3, #20
 801fd7e:	4413      	add	r3, r2
 801fd80:	69fa      	ldr	r2, [r7, #28]
 801fd82:	429a      	cmp	r2, r3
 801fd84:	d006      	beq.n	801fd94 <tcp_output_segment+0x170>
 801fd86:	4b10      	ldr	r3, [pc, #64]	@ (801fdc8 <tcp_output_segment+0x1a4>)
 801fd88:	f240 621c 	movw	r2, #1564	@ 0x61c
 801fd8c:	4914      	ldr	r1, [pc, #80]	@ (801fde0 <tcp_output_segment+0x1bc>)
 801fd8e:	4810      	ldr	r0, [pc, #64]	@ (801fdd0 <tcp_output_segment+0x1ac>)
 801fd90:	f009 fbbc 	bl	802950c <iprintf>
  }
#endif /* CHECKSUM_GEN_TCP */
  TCP_STATS_INC(tcp.xmit);

  NETIF_SET_HINTS(netif, &(pcb->netif_hints));
  err = ip_output_if(seg->p, &pcb->local_ip, &pcb->remote_ip, pcb->ttl,
 801fd94:	68fb      	ldr	r3, [r7, #12]
 801fd96:	6858      	ldr	r0, [r3, #4]
 801fd98:	68b9      	ldr	r1, [r7, #8]
 801fd9a:	68bb      	ldr	r3, [r7, #8]
 801fd9c:	1d1c      	adds	r4, r3, #4
 801fd9e:	68bb      	ldr	r3, [r7, #8]
 801fda0:	7add      	ldrb	r5, [r3, #11]
 801fda2:	68bb      	ldr	r3, [r7, #8]
 801fda4:	7a9b      	ldrb	r3, [r3, #10]
 801fda6:	687a      	ldr	r2, [r7, #4]
 801fda8:	9202      	str	r2, [sp, #8]
 801fdaa:	2206      	movs	r2, #6
 801fdac:	9201      	str	r2, [sp, #4]
 801fdae:	9300      	str	r3, [sp, #0]
 801fdb0:	462b      	mov	r3, r5
 801fdb2:	4622      	mov	r2, r4
 801fdb4:	f004 fd7a 	bl	80248ac <ip4_output_if>
 801fdb8:	4603      	mov	r3, r0
 801fdba:	75fb      	strb	r3, [r7, #23]
    seg->chksum = SWAP_BYTES_IN_WORD(seg->chksum);
    seg->chksum_swapped = 1;
  }
#endif

  return err;
 801fdbc:	f997 3017 	ldrsb.w	r3, [r7, #23]
}
 801fdc0:	4618      	mov	r0, r3
 801fdc2:	3720      	adds	r7, #32
 801fdc4:	46bd      	mov	sp, r7
 801fdc6:	bdb0      	pop	{r4, r5, r7, pc}
 801fdc8:	0802ed24 	.word	0x0802ed24
 801fdcc:	0802f344 	.word	0x0802f344
 801fdd0:	0802ed78 	.word	0x0802ed78
 801fdd4:	0802f364 	.word	0x0802f364
 801fdd8:	0802f384 	.word	0x0802f384
 801fddc:	24029fec 	.word	0x24029fec
 801fde0:	0802f3a8 	.word	0x0802f3a8

0801fde4 <tcp_rexmit_rto_prepare>:
 *
 * @param pcb the tcp_pcb for which to re-enqueue all unacked segments
 */
err_t
tcp_rexmit_rto_prepare(struct tcp_pcb *pcb)
{
 801fde4:	b5b0      	push	{r4, r5, r7, lr}
 801fde6:	b084      	sub	sp, #16
 801fde8:	af00      	add	r7, sp, #0
 801fdea:	6078      	str	r0, [r7, #4]
  struct tcp_seg *seg;

  LWIP_ASSERT("tcp_rexmit_rto_prepare: invalid pcb", pcb != NULL);
 801fdec:	687b      	ldr	r3, [r7, #4]
 801fdee:	2b00      	cmp	r3, #0
 801fdf0:	d106      	bne.n	801fe00 <tcp_rexmit_rto_prepare+0x1c>
 801fdf2:	4b36      	ldr	r3, [pc, #216]	@ (801fecc <tcp_rexmit_rto_prepare+0xe8>)
 801fdf4:	f240 6263 	movw	r2, #1635	@ 0x663
 801fdf8:	4935      	ldr	r1, [pc, #212]	@ (801fed0 <tcp_rexmit_rto_prepare+0xec>)
 801fdfa:	4836      	ldr	r0, [pc, #216]	@ (801fed4 <tcp_rexmit_rto_prepare+0xf0>)
 801fdfc:	f009 fb86 	bl	802950c <iprintf>

  if (pcb->unacked == NULL) {
 801fe00:	687b      	ldr	r3, [r7, #4]
 801fe02:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801fe04:	2b00      	cmp	r3, #0
 801fe06:	d102      	bne.n	801fe0e <tcp_rexmit_rto_prepare+0x2a>
    return ERR_VAL;
 801fe08:	f06f 0305 	mvn.w	r3, #5
 801fe0c:	e059      	b.n	801fec2 <tcp_rexmit_rto_prepare+0xde>

  /* Move all unacked segments to the head of the unsent queue.
     However, give up if any of the unsent pbufs are still referenced by the
     netif driver due to deferred transmission. No point loading the link further
     if it is struggling to flush its buffered writes. */
  for (seg = pcb->unacked; seg->next != NULL; seg = seg->next) {
 801fe0e:	687b      	ldr	r3, [r7, #4]
 801fe10:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801fe12:	60fb      	str	r3, [r7, #12]
 801fe14:	e00b      	b.n	801fe2e <tcp_rexmit_rto_prepare+0x4a>
    if (tcp_output_segment_busy(seg)) {
 801fe16:	68f8      	ldr	r0, [r7, #12]
 801fe18:	f7ff fee4 	bl	801fbe4 <tcp_output_segment_busy>
 801fe1c:	4603      	mov	r3, r0
 801fe1e:	2b00      	cmp	r3, #0
 801fe20:	d002      	beq.n	801fe28 <tcp_rexmit_rto_prepare+0x44>
      LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_rexmit_rto: segment busy\n"));
      return ERR_VAL;
 801fe22:	f06f 0305 	mvn.w	r3, #5
 801fe26:	e04c      	b.n	801fec2 <tcp_rexmit_rto_prepare+0xde>
  for (seg = pcb->unacked; seg->next != NULL; seg = seg->next) {
 801fe28:	68fb      	ldr	r3, [r7, #12]
 801fe2a:	681b      	ldr	r3, [r3, #0]
 801fe2c:	60fb      	str	r3, [r7, #12]
 801fe2e:	68fb      	ldr	r3, [r7, #12]
 801fe30:	681b      	ldr	r3, [r3, #0]
 801fe32:	2b00      	cmp	r3, #0
 801fe34:	d1ef      	bne.n	801fe16 <tcp_rexmit_rto_prepare+0x32>
    }
  }
  if (tcp_output_segment_busy(seg)) {
 801fe36:	68f8      	ldr	r0, [r7, #12]
 801fe38:	f7ff fed4 	bl	801fbe4 <tcp_output_segment_busy>
 801fe3c:	4603      	mov	r3, r0
 801fe3e:	2b00      	cmp	r3, #0
 801fe40:	d002      	beq.n	801fe48 <tcp_rexmit_rto_prepare+0x64>
    LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_rexmit_rto: segment busy\n"));
    return ERR_VAL;
 801fe42:	f06f 0305 	mvn.w	r3, #5
 801fe46:	e03c      	b.n	801fec2 <tcp_rexmit_rto_prepare+0xde>
  }
  /* concatenate unsent queue after unacked queue */
  seg->next = pcb->unsent;
 801fe48:	687b      	ldr	r3, [r7, #4]
 801fe4a:	6eda      	ldr	r2, [r3, #108]	@ 0x6c
 801fe4c:	68fb      	ldr	r3, [r7, #12]
 801fe4e:	601a      	str	r2, [r3, #0]
#if TCP_OVERSIZE_DBGCHECK
  /* if last unsent changed, we need to update unsent_oversize */
  if (pcb->unsent == NULL) {
 801fe50:	687b      	ldr	r3, [r7, #4]
 801fe52:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801fe54:	2b00      	cmp	r3, #0
 801fe56:	d104      	bne.n	801fe62 <tcp_rexmit_rto_prepare+0x7e>
    pcb->unsent_oversize = seg->oversize_left;
 801fe58:	68fb      	ldr	r3, [r7, #12]
 801fe5a:	895a      	ldrh	r2, [r3, #10]
 801fe5c:	687b      	ldr	r3, [r7, #4]
 801fe5e:	f8a3 2068 	strh.w	r2, [r3, #104]	@ 0x68
  }
#endif /* TCP_OVERSIZE_DBGCHECK */
  /* unsent queue is the concatenated queue (of unacked, unsent) */
  pcb->unsent = pcb->unacked;
 801fe62:	687b      	ldr	r3, [r7, #4]
 801fe64:	6f1a      	ldr	r2, [r3, #112]	@ 0x70
 801fe66:	687b      	ldr	r3, [r7, #4]
 801fe68:	66da      	str	r2, [r3, #108]	@ 0x6c
  /* unacked queue is now empty */
  pcb->unacked = NULL;
 801fe6a:	687b      	ldr	r3, [r7, #4]
 801fe6c:	2200      	movs	r2, #0
 801fe6e:	671a      	str	r2, [r3, #112]	@ 0x70

  /* Mark RTO in-progress */
  tcp_set_flags(pcb, TF_RTO);
 801fe70:	687b      	ldr	r3, [r7, #4]
 801fe72:	8b5b      	ldrh	r3, [r3, #26]
 801fe74:	f443 6300 	orr.w	r3, r3, #2048	@ 0x800
 801fe78:	b29a      	uxth	r2, r3
 801fe7a:	687b      	ldr	r3, [r7, #4]
 801fe7c:	835a      	strh	r2, [r3, #26]
  /* Record the next byte following retransmit */
  pcb->rto_end = lwip_ntohl(seg->tcphdr->seqno) + TCP_TCPLEN(seg);
 801fe7e:	68fb      	ldr	r3, [r7, #12]
 801fe80:	691b      	ldr	r3, [r3, #16]
 801fe82:	685b      	ldr	r3, [r3, #4]
 801fe84:	4618      	mov	r0, r3
 801fe86:	f7f8 fbfc 	bl	8018682 <lwip_htonl>
 801fe8a:	4604      	mov	r4, r0
 801fe8c:	68fb      	ldr	r3, [r7, #12]
 801fe8e:	891b      	ldrh	r3, [r3, #8]
 801fe90:	461d      	mov	r5, r3
 801fe92:	68fb      	ldr	r3, [r7, #12]
 801fe94:	691b      	ldr	r3, [r3, #16]
 801fe96:	899b      	ldrh	r3, [r3, #12]
 801fe98:	b29b      	uxth	r3, r3
 801fe9a:	4618      	mov	r0, r3
 801fe9c:	f7f8 fbdc 	bl	8018658 <lwip_htons>
 801fea0:	4603      	mov	r3, r0
 801fea2:	b2db      	uxtb	r3, r3
 801fea4:	f003 0303 	and.w	r3, r3, #3
 801fea8:	2b00      	cmp	r3, #0
 801feaa:	d001      	beq.n	801feb0 <tcp_rexmit_rto_prepare+0xcc>
 801feac:	2301      	movs	r3, #1
 801feae:	e000      	b.n	801feb2 <tcp_rexmit_rto_prepare+0xce>
 801feb0:	2300      	movs	r3, #0
 801feb2:	442b      	add	r3, r5
 801feb4:	18e2      	adds	r2, r4, r3
 801feb6:	687b      	ldr	r3, [r7, #4]
 801feb8:	64da      	str	r2, [r3, #76]	@ 0x4c
  /* Don't take any RTT measurements after retransmitting. */
  pcb->rttest = 0;
 801feba:	687b      	ldr	r3, [r7, #4]
 801febc:	2200      	movs	r2, #0
 801febe:	635a      	str	r2, [r3, #52]	@ 0x34

  return ERR_OK;
 801fec0:	2300      	movs	r3, #0
}
 801fec2:	4618      	mov	r0, r3
 801fec4:	3710      	adds	r7, #16
 801fec6:	46bd      	mov	sp, r7
 801fec8:	bdb0      	pop	{r4, r5, r7, pc}
 801feca:	bf00      	nop
 801fecc:	0802ed24 	.word	0x0802ed24
 801fed0:	0802f3bc 	.word	0x0802f3bc
 801fed4:	0802ed78 	.word	0x0802ed78

0801fed8 <tcp_rexmit_rto_commit>:
 *
 * @param pcb the tcp_pcb for which to re-enqueue all unacked segments
 */
void
tcp_rexmit_rto_commit(struct tcp_pcb *pcb)
{
 801fed8:	b580      	push	{r7, lr}
 801feda:	b082      	sub	sp, #8
 801fedc:	af00      	add	r7, sp, #0
 801fede:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT("tcp_rexmit_rto_commit: invalid pcb", pcb != NULL);
 801fee0:	687b      	ldr	r3, [r7, #4]
 801fee2:	2b00      	cmp	r3, #0
 801fee4:	d106      	bne.n	801fef4 <tcp_rexmit_rto_commit+0x1c>
 801fee6:	4b0d      	ldr	r3, [pc, #52]	@ (801ff1c <tcp_rexmit_rto_commit+0x44>)
 801fee8:	f44f 62d3 	mov.w	r2, #1688	@ 0x698
 801feec:	490c      	ldr	r1, [pc, #48]	@ (801ff20 <tcp_rexmit_rto_commit+0x48>)
 801feee:	480d      	ldr	r0, [pc, #52]	@ (801ff24 <tcp_rexmit_rto_commit+0x4c>)
 801fef0:	f009 fb0c 	bl	802950c <iprintf>

  /* increment number of retransmissions */
  if (pcb->nrtx < 0xFF) {
 801fef4:	687b      	ldr	r3, [r7, #4]
 801fef6:	f893 3042 	ldrb.w	r3, [r3, #66]	@ 0x42
 801fefa:	2bff      	cmp	r3, #255	@ 0xff
 801fefc:	d007      	beq.n	801ff0e <tcp_rexmit_rto_commit+0x36>
    ++pcb->nrtx;
 801fefe:	687b      	ldr	r3, [r7, #4]
 801ff00:	f893 3042 	ldrb.w	r3, [r3, #66]	@ 0x42
 801ff04:	3301      	adds	r3, #1
 801ff06:	b2da      	uxtb	r2, r3
 801ff08:	687b      	ldr	r3, [r7, #4]
 801ff0a:	f883 2042 	strb.w	r2, [r3, #66]	@ 0x42
  }
  /* Do the actual retransmission */
  tcp_output(pcb);
 801ff0e:	6878      	ldr	r0, [r7, #4]
 801ff10:	f7ff fc70 	bl	801f7f4 <tcp_output>
}
 801ff14:	bf00      	nop
 801ff16:	3708      	adds	r7, #8
 801ff18:	46bd      	mov	sp, r7
 801ff1a:	bd80      	pop	{r7, pc}
 801ff1c:	0802ed24 	.word	0x0802ed24
 801ff20:	0802f3e0 	.word	0x0802f3e0
 801ff24:	0802ed78 	.word	0x0802ed78

0801ff28 <tcp_rexmit_rto>:
 *
 * @param pcb the tcp_pcb for which to re-enqueue all unacked segments
 */
void
tcp_rexmit_rto(struct tcp_pcb *pcb)
{
 801ff28:	b580      	push	{r7, lr}
 801ff2a:	b082      	sub	sp, #8
 801ff2c:	af00      	add	r7, sp, #0
 801ff2e:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT("tcp_rexmit_rto: invalid pcb", pcb != NULL);
 801ff30:	687b      	ldr	r3, [r7, #4]
 801ff32:	2b00      	cmp	r3, #0
 801ff34:	d106      	bne.n	801ff44 <tcp_rexmit_rto+0x1c>
 801ff36:	4b0a      	ldr	r3, [pc, #40]	@ (801ff60 <tcp_rexmit_rto+0x38>)
 801ff38:	f240 62ad 	movw	r2, #1709	@ 0x6ad
 801ff3c:	4909      	ldr	r1, [pc, #36]	@ (801ff64 <tcp_rexmit_rto+0x3c>)
 801ff3e:	480a      	ldr	r0, [pc, #40]	@ (801ff68 <tcp_rexmit_rto+0x40>)
 801ff40:	f009 fae4 	bl	802950c <iprintf>

  if (tcp_rexmit_rto_prepare(pcb) == ERR_OK) {
 801ff44:	6878      	ldr	r0, [r7, #4]
 801ff46:	f7ff ff4d 	bl	801fde4 <tcp_rexmit_rto_prepare>
 801ff4a:	4603      	mov	r3, r0
 801ff4c:	2b00      	cmp	r3, #0
 801ff4e:	d102      	bne.n	801ff56 <tcp_rexmit_rto+0x2e>
    tcp_rexmit_rto_commit(pcb);
 801ff50:	6878      	ldr	r0, [r7, #4]
 801ff52:	f7ff ffc1 	bl	801fed8 <tcp_rexmit_rto_commit>
  }
}
 801ff56:	bf00      	nop
 801ff58:	3708      	adds	r7, #8
 801ff5a:	46bd      	mov	sp, r7
 801ff5c:	bd80      	pop	{r7, pc}
 801ff5e:	bf00      	nop
 801ff60:	0802ed24 	.word	0x0802ed24
 801ff64:	0802f404 	.word	0x0802f404
 801ff68:	0802ed78 	.word	0x0802ed78

0801ff6c <tcp_rexmit>:
 *
 * @param pcb the tcp_pcb for which to retransmit the first unacked segment
 */
err_t
tcp_rexmit(struct tcp_pcb *pcb)
{
 801ff6c:	b590      	push	{r4, r7, lr}
 801ff6e:	b085      	sub	sp, #20
 801ff70:	af00      	add	r7, sp, #0
 801ff72:	6078      	str	r0, [r7, #4]
  struct tcp_seg *seg;
  struct tcp_seg **cur_seg;

  LWIP_ASSERT("tcp_rexmit: invalid pcb", pcb != NULL);
 801ff74:	687b      	ldr	r3, [r7, #4]
 801ff76:	2b00      	cmp	r3, #0
 801ff78:	d106      	bne.n	801ff88 <tcp_rexmit+0x1c>
 801ff7a:	4b2f      	ldr	r3, [pc, #188]	@ (8020038 <tcp_rexmit+0xcc>)
 801ff7c:	f240 62c1 	movw	r2, #1729	@ 0x6c1
 801ff80:	492e      	ldr	r1, [pc, #184]	@ (802003c <tcp_rexmit+0xd0>)
 801ff82:	482f      	ldr	r0, [pc, #188]	@ (8020040 <tcp_rexmit+0xd4>)
 801ff84:	f009 fac2 	bl	802950c <iprintf>

  if (pcb->unacked == NULL) {
 801ff88:	687b      	ldr	r3, [r7, #4]
 801ff8a:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801ff8c:	2b00      	cmp	r3, #0
 801ff8e:	d102      	bne.n	801ff96 <tcp_rexmit+0x2a>
    return ERR_VAL;
 801ff90:	f06f 0305 	mvn.w	r3, #5
 801ff94:	e04c      	b.n	8020030 <tcp_rexmit+0xc4>
  }

  seg = pcb->unacked;
 801ff96:	687b      	ldr	r3, [r7, #4]
 801ff98:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801ff9a:	60bb      	str	r3, [r7, #8]

  /* Give up if the segment is still referenced by the netif driver
     due to deferred transmission. */
  if (tcp_output_segment_busy(seg)) {
 801ff9c:	68b8      	ldr	r0, [r7, #8]
 801ff9e:	f7ff fe21 	bl	801fbe4 <tcp_output_segment_busy>
 801ffa2:	4603      	mov	r3, r0
 801ffa4:	2b00      	cmp	r3, #0
 801ffa6:	d002      	beq.n	801ffae <tcp_rexmit+0x42>
    LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_rexmit busy\n"));
    return ERR_VAL;
 801ffa8:	f06f 0305 	mvn.w	r3, #5
 801ffac:	e040      	b.n	8020030 <tcp_rexmit+0xc4>
  }

  /* Move the first unacked segment to the unsent queue */
  /* Keep the unsent queue sorted. */
  pcb->unacked = seg->next;
 801ffae:	68bb      	ldr	r3, [r7, #8]
 801ffb0:	681a      	ldr	r2, [r3, #0]
 801ffb2:	687b      	ldr	r3, [r7, #4]
 801ffb4:	671a      	str	r2, [r3, #112]	@ 0x70

  cur_seg = &(pcb->unsent);
 801ffb6:	687b      	ldr	r3, [r7, #4]
 801ffb8:	336c      	adds	r3, #108	@ 0x6c
 801ffba:	60fb      	str	r3, [r7, #12]
  while (*cur_seg &&
 801ffbc:	e002      	b.n	801ffc4 <tcp_rexmit+0x58>
         TCP_SEQ_LT(lwip_ntohl((*cur_seg)->tcphdr->seqno), lwip_ntohl(seg->tcphdr->seqno))) {
    cur_seg = &((*cur_seg)->next );
 801ffbe:	68fb      	ldr	r3, [r7, #12]
 801ffc0:	681b      	ldr	r3, [r3, #0]
 801ffc2:	60fb      	str	r3, [r7, #12]
  while (*cur_seg &&
 801ffc4:	68fb      	ldr	r3, [r7, #12]
 801ffc6:	681b      	ldr	r3, [r3, #0]
 801ffc8:	2b00      	cmp	r3, #0
 801ffca:	d011      	beq.n	801fff0 <tcp_rexmit+0x84>
         TCP_SEQ_LT(lwip_ntohl((*cur_seg)->tcphdr->seqno), lwip_ntohl(seg->tcphdr->seqno))) {
 801ffcc:	68fb      	ldr	r3, [r7, #12]
 801ffce:	681b      	ldr	r3, [r3, #0]
 801ffd0:	691b      	ldr	r3, [r3, #16]
 801ffd2:	685b      	ldr	r3, [r3, #4]
 801ffd4:	4618      	mov	r0, r3
 801ffd6:	f7f8 fb54 	bl	8018682 <lwip_htonl>
 801ffda:	4604      	mov	r4, r0
 801ffdc:	68bb      	ldr	r3, [r7, #8]
 801ffde:	691b      	ldr	r3, [r3, #16]
 801ffe0:	685b      	ldr	r3, [r3, #4]
 801ffe2:	4618      	mov	r0, r3
 801ffe4:	f7f8 fb4d 	bl	8018682 <lwip_htonl>
 801ffe8:	4603      	mov	r3, r0
 801ffea:	1ae3      	subs	r3, r4, r3
  while (*cur_seg &&
 801ffec:	2b00      	cmp	r3, #0
 801ffee:	dbe6      	blt.n	801ffbe <tcp_rexmit+0x52>
  }
  seg->next = *cur_seg;
 801fff0:	68fb      	ldr	r3, [r7, #12]
 801fff2:	681a      	ldr	r2, [r3, #0]
 801fff4:	68bb      	ldr	r3, [r7, #8]
 801fff6:	601a      	str	r2, [r3, #0]
  *cur_seg = seg;
 801fff8:	68fb      	ldr	r3, [r7, #12]
 801fffa:	68ba      	ldr	r2, [r7, #8]
 801fffc:	601a      	str	r2, [r3, #0]
#if TCP_OVERSIZE
  if (seg->next == NULL) {
 801fffe:	68bb      	ldr	r3, [r7, #8]
 8020000:	681b      	ldr	r3, [r3, #0]
 8020002:	2b00      	cmp	r3, #0
 8020004:	d103      	bne.n	802000e <tcp_rexmit+0xa2>
    /* the retransmitted segment is last in unsent, so reset unsent_oversize */
    pcb->unsent_oversize = 0;
 8020006:	687b      	ldr	r3, [r7, #4]
 8020008:	2200      	movs	r2, #0
 802000a:	f8a3 2068 	strh.w	r2, [r3, #104]	@ 0x68
  }
#endif /* TCP_OVERSIZE */

  if (pcb->nrtx < 0xFF) {
 802000e:	687b      	ldr	r3, [r7, #4]
 8020010:	f893 3042 	ldrb.w	r3, [r3, #66]	@ 0x42
 8020014:	2bff      	cmp	r3, #255	@ 0xff
 8020016:	d007      	beq.n	8020028 <tcp_rexmit+0xbc>
    ++pcb->nrtx;
 8020018:	687b      	ldr	r3, [r7, #4]
 802001a:	f893 3042 	ldrb.w	r3, [r3, #66]	@ 0x42
 802001e:	3301      	adds	r3, #1
 8020020:	b2da      	uxtb	r2, r3
 8020022:	687b      	ldr	r3, [r7, #4]
 8020024:	f883 2042 	strb.w	r2, [r3, #66]	@ 0x42
  }

  /* Don't take any rtt measurements after retransmitting. */
  pcb->rttest = 0;
 8020028:	687b      	ldr	r3, [r7, #4]
 802002a:	2200      	movs	r2, #0
 802002c:	635a      	str	r2, [r3, #52]	@ 0x34

  /* Do the actual retransmission. */
  MIB2_STATS_INC(mib2.tcpretranssegs);
  /* No need to call tcp_output: we are always called from tcp_input()
     and thus tcp_output directly returns. */
  return ERR_OK;
 802002e:	2300      	movs	r3, #0
}
 8020030:	4618      	mov	r0, r3
 8020032:	3714      	adds	r7, #20
 8020034:	46bd      	mov	sp, r7
 8020036:	bd90      	pop	{r4, r7, pc}
 8020038:	0802ed24 	.word	0x0802ed24
 802003c:	0802f420 	.word	0x0802f420
 8020040:	0802ed78 	.word	0x0802ed78

08020044 <tcp_rexmit_fast>:
 *
 * @param pcb the tcp_pcb for which to retransmit the first unacked segment
 */
void
tcp_rexmit_fast(struct tcp_pcb *pcb)
{
 8020044:	b580      	push	{r7, lr}
 8020046:	b082      	sub	sp, #8
 8020048:	af00      	add	r7, sp, #0
 802004a:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT("tcp_rexmit_fast: invalid pcb", pcb != NULL);
 802004c:	687b      	ldr	r3, [r7, #4]
 802004e:	2b00      	cmp	r3, #0
 8020050:	d106      	bne.n	8020060 <tcp_rexmit_fast+0x1c>
 8020052:	4b2a      	ldr	r3, [pc, #168]	@ (80200fc <tcp_rexmit_fast+0xb8>)
 8020054:	f240 62f9 	movw	r2, #1785	@ 0x6f9
 8020058:	4929      	ldr	r1, [pc, #164]	@ (8020100 <tcp_rexmit_fast+0xbc>)
 802005a:	482a      	ldr	r0, [pc, #168]	@ (8020104 <tcp_rexmit_fast+0xc0>)
 802005c:	f009 fa56 	bl	802950c <iprintf>

  if (pcb->unacked != NULL && !(pcb->flags & TF_INFR)) {
 8020060:	687b      	ldr	r3, [r7, #4]
 8020062:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 8020064:	2b00      	cmp	r3, #0
 8020066:	d045      	beq.n	80200f4 <tcp_rexmit_fast+0xb0>
 8020068:	687b      	ldr	r3, [r7, #4]
 802006a:	8b5b      	ldrh	r3, [r3, #26]
 802006c:	f003 0304 	and.w	r3, r3, #4
 8020070:	2b00      	cmp	r3, #0
 8020072:	d13f      	bne.n	80200f4 <tcp_rexmit_fast+0xb0>
    LWIP_DEBUGF(TCP_FR_DEBUG,
                ("tcp_receive: dupacks %"U16_F" (%"U32_F
                 "), fast retransmit %"U32_F"\n",
                 (u16_t)pcb->dupacks, pcb->lastack,
                 lwip_ntohl(pcb->unacked->tcphdr->seqno)));
    if (tcp_rexmit(pcb) == ERR_OK) {
 8020074:	6878      	ldr	r0, [r7, #4]
 8020076:	f7ff ff79 	bl	801ff6c <tcp_rexmit>
 802007a:	4603      	mov	r3, r0
 802007c:	2b00      	cmp	r3, #0
 802007e:	d139      	bne.n	80200f4 <tcp_rexmit_fast+0xb0>
      /* Set ssthresh to half of the minimum of the current
       * cwnd and the advertised window */
      pcb->ssthresh = LWIP_MIN(pcb->cwnd, pcb->snd_wnd) / 2;
 8020080:	687b      	ldr	r3, [r7, #4]
 8020082:	f8b3 2060 	ldrh.w	r2, [r3, #96]	@ 0x60
 8020086:	687b      	ldr	r3, [r7, #4]
 8020088:	f8b3 3048 	ldrh.w	r3, [r3, #72]	@ 0x48
 802008c:	4293      	cmp	r3, r2
 802008e:	bf28      	it	cs
 8020090:	4613      	movcs	r3, r2
 8020092:	b29b      	uxth	r3, r3
 8020094:	2b00      	cmp	r3, #0
 8020096:	da00      	bge.n	802009a <tcp_rexmit_fast+0x56>
 8020098:	3301      	adds	r3, #1
 802009a:	105b      	asrs	r3, r3, #1
 802009c:	b29a      	uxth	r2, r3
 802009e:	687b      	ldr	r3, [r7, #4]
 80200a0:	f8a3 204a 	strh.w	r2, [r3, #74]	@ 0x4a

      /* The minimum value for ssthresh should be 2 MSS */
      if (pcb->ssthresh < (2U * pcb->mss)) {
 80200a4:	687b      	ldr	r3, [r7, #4]
 80200a6:	f8b3 304a 	ldrh.w	r3, [r3, #74]	@ 0x4a
 80200aa:	461a      	mov	r2, r3
 80200ac:	687b      	ldr	r3, [r7, #4]
 80200ae:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 80200b0:	005b      	lsls	r3, r3, #1
 80200b2:	429a      	cmp	r2, r3
 80200b4:	d206      	bcs.n	80200c4 <tcp_rexmit_fast+0x80>
        LWIP_DEBUGF(TCP_FR_DEBUG,
                    ("tcp_receive: The minimum value for ssthresh %"TCPWNDSIZE_F
                     " should be min 2 mss %"U16_F"...\n",
                     pcb->ssthresh, (u16_t)(2 * pcb->mss)));
        pcb->ssthresh = 2 * pcb->mss;
 80200b6:	687b      	ldr	r3, [r7, #4]
 80200b8:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 80200ba:	005b      	lsls	r3, r3, #1
 80200bc:	b29a      	uxth	r2, r3
 80200be:	687b      	ldr	r3, [r7, #4]
 80200c0:	f8a3 204a 	strh.w	r2, [r3, #74]	@ 0x4a
      }

      pcb->cwnd = pcb->ssthresh + 3 * pcb->mss;
 80200c4:	687b      	ldr	r3, [r7, #4]
 80200c6:	f8b3 204a 	ldrh.w	r2, [r3, #74]	@ 0x4a
 80200ca:	687b      	ldr	r3, [r7, #4]
 80200cc:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 80200ce:	4619      	mov	r1, r3
 80200d0:	0049      	lsls	r1, r1, #1
 80200d2:	440b      	add	r3, r1
 80200d4:	b29b      	uxth	r3, r3
 80200d6:	4413      	add	r3, r2
 80200d8:	b29a      	uxth	r2, r3
 80200da:	687b      	ldr	r3, [r7, #4]
 80200dc:	f8a3 2048 	strh.w	r2, [r3, #72]	@ 0x48
      tcp_set_flags(pcb, TF_INFR);
 80200e0:	687b      	ldr	r3, [r7, #4]
 80200e2:	8b5b      	ldrh	r3, [r3, #26]
 80200e4:	f043 0304 	orr.w	r3, r3, #4
 80200e8:	b29a      	uxth	r2, r3
 80200ea:	687b      	ldr	r3, [r7, #4]
 80200ec:	835a      	strh	r2, [r3, #26]

      /* Reset the retransmission timer to prevent immediate rto retransmissions */
      pcb->rtime = 0;
 80200ee:	687b      	ldr	r3, [r7, #4]
 80200f0:	2200      	movs	r2, #0
 80200f2:	861a      	strh	r2, [r3, #48]	@ 0x30
    }
  }
}
 80200f4:	bf00      	nop
 80200f6:	3708      	adds	r7, #8
 80200f8:	46bd      	mov	sp, r7
 80200fa:	bd80      	pop	{r7, pc}
 80200fc:	0802ed24 	.word	0x0802ed24
 8020100:	0802f438 	.word	0x0802f438
 8020104:	0802ed78 	.word	0x0802ed78

08020108 <tcp_output_alloc_header_common>:

static struct pbuf *
tcp_output_alloc_header_common(u32_t ackno, u16_t optlen, u16_t datalen,
                        u32_t seqno_be /* already in network byte order */,
                        u16_t src_port, u16_t dst_port, u8_t flags, u16_t wnd)
{
 8020108:	b580      	push	{r7, lr}
 802010a:	b086      	sub	sp, #24
 802010c:	af00      	add	r7, sp, #0
 802010e:	60f8      	str	r0, [r7, #12]
 8020110:	607b      	str	r3, [r7, #4]
 8020112:	460b      	mov	r3, r1
 8020114:	817b      	strh	r3, [r7, #10]
 8020116:	4613      	mov	r3, r2
 8020118:	813b      	strh	r3, [r7, #8]
  struct tcp_hdr *tcphdr;
  struct pbuf *p;

  p = pbuf_alloc(PBUF_IP, TCP_HLEN + optlen + datalen, PBUF_RAM);
 802011a:	897a      	ldrh	r2, [r7, #10]
 802011c:	893b      	ldrh	r3, [r7, #8]
 802011e:	4413      	add	r3, r2
 8020120:	b29b      	uxth	r3, r3
 8020122:	3314      	adds	r3, #20
 8020124:	b29b      	uxth	r3, r3
 8020126:	f44f 7220 	mov.w	r2, #640	@ 0x280
 802012a:	4619      	mov	r1, r3
 802012c:	2022      	movs	r0, #34	@ 0x22
 802012e:	f7f9 fc5f 	bl	80199f0 <pbuf_alloc>
 8020132:	6178      	str	r0, [r7, #20]
  if (p != NULL) {
 8020134:	697b      	ldr	r3, [r7, #20]
 8020136:	2b00      	cmp	r3, #0
 8020138:	d04d      	beq.n	80201d6 <tcp_output_alloc_header_common+0xce>
    LWIP_ASSERT("check that first pbuf can hold struct tcp_hdr",
 802013a:	897b      	ldrh	r3, [r7, #10]
 802013c:	3313      	adds	r3, #19
 802013e:	697a      	ldr	r2, [r7, #20]
 8020140:	8952      	ldrh	r2, [r2, #10]
 8020142:	4293      	cmp	r3, r2
 8020144:	db06      	blt.n	8020154 <tcp_output_alloc_header_common+0x4c>
 8020146:	4b26      	ldr	r3, [pc, #152]	@ (80201e0 <tcp_output_alloc_header_common+0xd8>)
 8020148:	f240 7223 	movw	r2, #1827	@ 0x723
 802014c:	4925      	ldr	r1, [pc, #148]	@ (80201e4 <tcp_output_alloc_header_common+0xdc>)
 802014e:	4826      	ldr	r0, [pc, #152]	@ (80201e8 <tcp_output_alloc_header_common+0xe0>)
 8020150:	f009 f9dc 	bl	802950c <iprintf>
                (p->len >= TCP_HLEN + optlen));
    tcphdr = (struct tcp_hdr *)p->payload;
 8020154:	697b      	ldr	r3, [r7, #20]
 8020156:	685b      	ldr	r3, [r3, #4]
 8020158:	613b      	str	r3, [r7, #16]
    tcphdr->src = lwip_htons(src_port);
 802015a:	8c3b      	ldrh	r3, [r7, #32]
 802015c:	4618      	mov	r0, r3
 802015e:	f7f8 fa7b 	bl	8018658 <lwip_htons>
 8020162:	4603      	mov	r3, r0
 8020164:	461a      	mov	r2, r3
 8020166:	693b      	ldr	r3, [r7, #16]
 8020168:	801a      	strh	r2, [r3, #0]
    tcphdr->dest = lwip_htons(dst_port);
 802016a:	8cbb      	ldrh	r3, [r7, #36]	@ 0x24
 802016c:	4618      	mov	r0, r3
 802016e:	f7f8 fa73 	bl	8018658 <lwip_htons>
 8020172:	4603      	mov	r3, r0
 8020174:	461a      	mov	r2, r3
 8020176:	693b      	ldr	r3, [r7, #16]
 8020178:	805a      	strh	r2, [r3, #2]
    tcphdr->seqno = seqno_be;
 802017a:	693b      	ldr	r3, [r7, #16]
 802017c:	687a      	ldr	r2, [r7, #4]
 802017e:	605a      	str	r2, [r3, #4]
    tcphdr->ackno = lwip_htonl(ackno);
 8020180:	68f8      	ldr	r0, [r7, #12]
 8020182:	f7f8 fa7e 	bl	8018682 <lwip_htonl>
 8020186:	4602      	mov	r2, r0
 8020188:	693b      	ldr	r3, [r7, #16]
 802018a:	609a      	str	r2, [r3, #8]
    TCPH_HDRLEN_FLAGS_SET(tcphdr, (5 + optlen / 4), flags);
 802018c:	897b      	ldrh	r3, [r7, #10]
 802018e:	089b      	lsrs	r3, r3, #2
 8020190:	b29b      	uxth	r3, r3
 8020192:	3305      	adds	r3, #5
 8020194:	b29b      	uxth	r3, r3
 8020196:	031b      	lsls	r3, r3, #12
 8020198:	b29a      	uxth	r2, r3
 802019a:	f897 3028 	ldrb.w	r3, [r7, #40]	@ 0x28
 802019e:	b29b      	uxth	r3, r3
 80201a0:	4313      	orrs	r3, r2
 80201a2:	b29b      	uxth	r3, r3
 80201a4:	4618      	mov	r0, r3
 80201a6:	f7f8 fa57 	bl	8018658 <lwip_htons>
 80201aa:	4603      	mov	r3, r0
 80201ac:	461a      	mov	r2, r3
 80201ae:	693b      	ldr	r3, [r7, #16]
 80201b0:	819a      	strh	r2, [r3, #12]
    tcphdr->wnd = lwip_htons(wnd);
 80201b2:	8dbb      	ldrh	r3, [r7, #44]	@ 0x2c
 80201b4:	4618      	mov	r0, r3
 80201b6:	f7f8 fa4f 	bl	8018658 <lwip_htons>
 80201ba:	4603      	mov	r3, r0
 80201bc:	461a      	mov	r2, r3
 80201be:	693b      	ldr	r3, [r7, #16]
 80201c0:	81da      	strh	r2, [r3, #14]
    tcphdr->chksum = 0;
 80201c2:	693b      	ldr	r3, [r7, #16]
 80201c4:	2200      	movs	r2, #0
 80201c6:	741a      	strb	r2, [r3, #16]
 80201c8:	2200      	movs	r2, #0
 80201ca:	745a      	strb	r2, [r3, #17]
    tcphdr->urgp = 0;
 80201cc:	693b      	ldr	r3, [r7, #16]
 80201ce:	2200      	movs	r2, #0
 80201d0:	749a      	strb	r2, [r3, #18]
 80201d2:	2200      	movs	r2, #0
 80201d4:	74da      	strb	r2, [r3, #19]
  }
  return p;
 80201d6:	697b      	ldr	r3, [r7, #20]
}
 80201d8:	4618      	mov	r0, r3
 80201da:	3718      	adds	r7, #24
 80201dc:	46bd      	mov	sp, r7
 80201de:	bd80      	pop	{r7, pc}
 80201e0:	0802ed24 	.word	0x0802ed24
 80201e4:	0802f458 	.word	0x0802f458
 80201e8:	0802ed78 	.word	0x0802ed78

080201ec <tcp_output_alloc_header>:
 * @return pbuf with p->payload being the tcp_hdr
 */
static struct pbuf *
tcp_output_alloc_header(struct tcp_pcb *pcb, u16_t optlen, u16_t datalen,
                        u32_t seqno_be /* already in network byte order */)
{
 80201ec:	b5b0      	push	{r4, r5, r7, lr}
 80201ee:	b08a      	sub	sp, #40	@ 0x28
 80201f0:	af04      	add	r7, sp, #16
 80201f2:	60f8      	str	r0, [r7, #12]
 80201f4:	607b      	str	r3, [r7, #4]
 80201f6:	460b      	mov	r3, r1
 80201f8:	817b      	strh	r3, [r7, #10]
 80201fa:	4613      	mov	r3, r2
 80201fc:	813b      	strh	r3, [r7, #8]
  struct pbuf *p;

  LWIP_ASSERT("tcp_output_alloc_header: invalid pcb", pcb != NULL);
 80201fe:	68fb      	ldr	r3, [r7, #12]
 8020200:	2b00      	cmp	r3, #0
 8020202:	d106      	bne.n	8020212 <tcp_output_alloc_header+0x26>
 8020204:	4b15      	ldr	r3, [pc, #84]	@ (802025c <tcp_output_alloc_header+0x70>)
 8020206:	f240 7242 	movw	r2, #1858	@ 0x742
 802020a:	4915      	ldr	r1, [pc, #84]	@ (8020260 <tcp_output_alloc_header+0x74>)
 802020c:	4815      	ldr	r0, [pc, #84]	@ (8020264 <tcp_output_alloc_header+0x78>)
 802020e:	f009 f97d 	bl	802950c <iprintf>

  p = tcp_output_alloc_header_common(pcb->rcv_nxt, optlen, datalen,
 8020212:	68fb      	ldr	r3, [r7, #12]
 8020214:	6a58      	ldr	r0, [r3, #36]	@ 0x24
 8020216:	68fb      	ldr	r3, [r7, #12]
 8020218:	8adb      	ldrh	r3, [r3, #22]
 802021a:	68fa      	ldr	r2, [r7, #12]
 802021c:	8b12      	ldrh	r2, [r2, #24]
 802021e:	68f9      	ldr	r1, [r7, #12]
 8020220:	8d49      	ldrh	r1, [r1, #42]	@ 0x2a
 8020222:	893d      	ldrh	r5, [r7, #8]
 8020224:	897c      	ldrh	r4, [r7, #10]
 8020226:	9103      	str	r1, [sp, #12]
 8020228:	2110      	movs	r1, #16
 802022a:	9102      	str	r1, [sp, #8]
 802022c:	9201      	str	r2, [sp, #4]
 802022e:	9300      	str	r3, [sp, #0]
 8020230:	687b      	ldr	r3, [r7, #4]
 8020232:	462a      	mov	r2, r5
 8020234:	4621      	mov	r1, r4
 8020236:	f7ff ff67 	bl	8020108 <tcp_output_alloc_header_common>
 802023a:	6178      	str	r0, [r7, #20]
    seqno_be, pcb->local_port, pcb->remote_port, TCP_ACK,
    TCPWND_MIN16(RCV_WND_SCALE(pcb, pcb->rcv_ann_wnd)));
  if (p != NULL) {
 802023c:	697b      	ldr	r3, [r7, #20]
 802023e:	2b00      	cmp	r3, #0
 8020240:	d006      	beq.n	8020250 <tcp_output_alloc_header+0x64>
    /* If we're sending a packet, update the announced right window edge */
    pcb->rcv_ann_right_edge = pcb->rcv_nxt + pcb->rcv_ann_wnd;
 8020242:	68fb      	ldr	r3, [r7, #12]
 8020244:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8020246:	68fa      	ldr	r2, [r7, #12]
 8020248:	8d52      	ldrh	r2, [r2, #42]	@ 0x2a
 802024a:	441a      	add	r2, r3
 802024c:	68fb      	ldr	r3, [r7, #12]
 802024e:	62da      	str	r2, [r3, #44]	@ 0x2c
  }
  return p;
 8020250:	697b      	ldr	r3, [r7, #20]
}
 8020252:	4618      	mov	r0, r3
 8020254:	3718      	adds	r7, #24
 8020256:	46bd      	mov	sp, r7
 8020258:	bdb0      	pop	{r4, r5, r7, pc}
 802025a:	bf00      	nop
 802025c:	0802ed24 	.word	0x0802ed24
 8020260:	0802f488 	.word	0x0802f488
 8020264:	0802ed78 	.word	0x0802ed78

08020268 <tcp_output_fill_options>:

/* Fill in options for control segments */
static void
tcp_output_fill_options(const struct tcp_pcb *pcb, struct pbuf *p, u8_t optflags, u8_t num_sacks)
{
 8020268:	b580      	push	{r7, lr}
 802026a:	b088      	sub	sp, #32
 802026c:	af00      	add	r7, sp, #0
 802026e:	60f8      	str	r0, [r7, #12]
 8020270:	60b9      	str	r1, [r7, #8]
 8020272:	4611      	mov	r1, r2
 8020274:	461a      	mov	r2, r3
 8020276:	460b      	mov	r3, r1
 8020278:	71fb      	strb	r3, [r7, #7]
 802027a:	4613      	mov	r3, r2
 802027c:	71bb      	strb	r3, [r7, #6]
  struct tcp_hdr *tcphdr;
  u32_t *opts;
  u16_t sacks_len = 0;
 802027e:	2300      	movs	r3, #0
 8020280:	83fb      	strh	r3, [r7, #30]

  LWIP_ASSERT("tcp_output_fill_options: invalid pbuf", p != NULL);
 8020282:	68bb      	ldr	r3, [r7, #8]
 8020284:	2b00      	cmp	r3, #0
 8020286:	d106      	bne.n	8020296 <tcp_output_fill_options+0x2e>
 8020288:	4b12      	ldr	r3, [pc, #72]	@ (80202d4 <tcp_output_fill_options+0x6c>)
 802028a:	f240 7256 	movw	r2, #1878	@ 0x756
 802028e:	4912      	ldr	r1, [pc, #72]	@ (80202d8 <tcp_output_fill_options+0x70>)
 8020290:	4812      	ldr	r0, [pc, #72]	@ (80202dc <tcp_output_fill_options+0x74>)
 8020292:	f009 f93b 	bl	802950c <iprintf>

  tcphdr = (struct tcp_hdr *)p->payload;
 8020296:	68bb      	ldr	r3, [r7, #8]
 8020298:	685b      	ldr	r3, [r3, #4]
 802029a:	61bb      	str	r3, [r7, #24]
  opts = (u32_t *)(void *)(tcphdr + 1);
 802029c:	69bb      	ldr	r3, [r7, #24]
 802029e:	3314      	adds	r3, #20
 80202a0:	617b      	str	r3, [r7, #20]
  opts = LWIP_HOOK_TCP_OUT_ADD_TCPOPTS(p, tcphdr, pcb, opts);
#endif

  LWIP_UNUSED_ARG(pcb);
  LWIP_UNUSED_ARG(sacks_len);
  LWIP_ASSERT("options not filled", (u8_t *)opts == ((u8_t *)(tcphdr + 1)) + sacks_len * 4 + LWIP_TCP_OPT_LENGTH_SEGMENT(optflags, pcb));
 80202a2:	8bfb      	ldrh	r3, [r7, #30]
 80202a4:	009b      	lsls	r3, r3, #2
 80202a6:	461a      	mov	r2, r3
 80202a8:	79fb      	ldrb	r3, [r7, #7]
 80202aa:	009b      	lsls	r3, r3, #2
 80202ac:	f003 0304 	and.w	r3, r3, #4
 80202b0:	4413      	add	r3, r2
 80202b2:	3314      	adds	r3, #20
 80202b4:	69ba      	ldr	r2, [r7, #24]
 80202b6:	4413      	add	r3, r2
 80202b8:	697a      	ldr	r2, [r7, #20]
 80202ba:	429a      	cmp	r2, r3
 80202bc:	d006      	beq.n	80202cc <tcp_output_fill_options+0x64>
 80202be:	4b05      	ldr	r3, [pc, #20]	@ (80202d4 <tcp_output_fill_options+0x6c>)
 80202c0:	f240 7275 	movw	r2, #1909	@ 0x775
 80202c4:	4906      	ldr	r1, [pc, #24]	@ (80202e0 <tcp_output_fill_options+0x78>)
 80202c6:	4805      	ldr	r0, [pc, #20]	@ (80202dc <tcp_output_fill_options+0x74>)
 80202c8:	f009 f920 	bl	802950c <iprintf>
  LWIP_UNUSED_ARG(optflags); /* for LWIP_NOASSERT */
  LWIP_UNUSED_ARG(opts); /* for LWIP_NOASSERT */
}
 80202cc:	bf00      	nop
 80202ce:	3720      	adds	r7, #32
 80202d0:	46bd      	mov	sp, r7
 80202d2:	bd80      	pop	{r7, pc}
 80202d4:	0802ed24 	.word	0x0802ed24
 80202d8:	0802f4b0 	.word	0x0802f4b0
 80202dc:	0802ed78 	.word	0x0802ed78
 80202e0:	0802f3a8 	.word	0x0802f3a8

080202e4 <tcp_output_control_segment>:
 * header checksum and calling ip_output_if while handling netif hints and stats.
 */
static err_t
tcp_output_control_segment(const struct tcp_pcb *pcb, struct pbuf *p,
                           const ip_addr_t *src, const ip_addr_t *dst)
{
 80202e4:	b580      	push	{r7, lr}
 80202e6:	b08a      	sub	sp, #40	@ 0x28
 80202e8:	af04      	add	r7, sp, #16
 80202ea:	60f8      	str	r0, [r7, #12]
 80202ec:	60b9      	str	r1, [r7, #8]
 80202ee:	607a      	str	r2, [r7, #4]
 80202f0:	603b      	str	r3, [r7, #0]
  err_t err;
  struct netif *netif;

  LWIP_ASSERT("tcp_output_control_segment: invalid pbuf", p != NULL);
 80202f2:	68bb      	ldr	r3, [r7, #8]
 80202f4:	2b00      	cmp	r3, #0
 80202f6:	d106      	bne.n	8020306 <tcp_output_control_segment+0x22>
 80202f8:	4b1c      	ldr	r3, [pc, #112]	@ (802036c <tcp_output_control_segment+0x88>)
 80202fa:	f240 7287 	movw	r2, #1927	@ 0x787
 80202fe:	491c      	ldr	r1, [pc, #112]	@ (8020370 <tcp_output_control_segment+0x8c>)
 8020300:	481c      	ldr	r0, [pc, #112]	@ (8020374 <tcp_output_control_segment+0x90>)
 8020302:	f009 f903 	bl	802950c <iprintf>

  netif = tcp_route(pcb, src, dst);
 8020306:	683a      	ldr	r2, [r7, #0]
 8020308:	6879      	ldr	r1, [r7, #4]
 802030a:	68f8      	ldr	r0, [r7, #12]
 802030c:	f7fe fa78 	bl	801e800 <tcp_route>
 8020310:	6138      	str	r0, [r7, #16]
  if (netif == NULL) {
 8020312:	693b      	ldr	r3, [r7, #16]
 8020314:	2b00      	cmp	r3, #0
 8020316:	d102      	bne.n	802031e <tcp_output_control_segment+0x3a>
    err = ERR_RTE;
 8020318:	23fc      	movs	r3, #252	@ 0xfc
 802031a:	75fb      	strb	r3, [r7, #23]
 802031c:	e01c      	b.n	8020358 <tcp_output_control_segment+0x74>
      struct tcp_hdr *tcphdr = (struct tcp_hdr *)p->payload;
      tcphdr->chksum = ip_chksum_pseudo(p, IP_PROTO_TCP, p->tot_len,
                                        src, dst);
    }
#endif
    if (pcb != NULL) {
 802031e:	68fb      	ldr	r3, [r7, #12]
 8020320:	2b00      	cmp	r3, #0
 8020322:	d006      	beq.n	8020332 <tcp_output_control_segment+0x4e>
      NETIF_SET_HINTS(netif, LWIP_CONST_CAST(struct netif_hint*, &(pcb->netif_hints)));
      ttl = pcb->ttl;
 8020324:	68fb      	ldr	r3, [r7, #12]
 8020326:	7adb      	ldrb	r3, [r3, #11]
 8020328:	75bb      	strb	r3, [r7, #22]
      tos = pcb->tos;
 802032a:	68fb      	ldr	r3, [r7, #12]
 802032c:	7a9b      	ldrb	r3, [r3, #10]
 802032e:	757b      	strb	r3, [r7, #21]
 8020330:	e003      	b.n	802033a <tcp_output_control_segment+0x56>
    } else {
      /* Send output with hardcoded TTL/HL since we have no access to the pcb */
      ttl = TCP_TTL;
 8020332:	23ff      	movs	r3, #255	@ 0xff
 8020334:	75bb      	strb	r3, [r7, #22]
      tos = 0;
 8020336:	2300      	movs	r3, #0
 8020338:	757b      	strb	r3, [r7, #21]
    }
    TCP_STATS_INC(tcp.xmit);
    err = ip_output_if(p, src, dst, ttl, tos, IP_PROTO_TCP, netif);
 802033a:	7dba      	ldrb	r2, [r7, #22]
 802033c:	693b      	ldr	r3, [r7, #16]
 802033e:	9302      	str	r3, [sp, #8]
 8020340:	2306      	movs	r3, #6
 8020342:	9301      	str	r3, [sp, #4]
 8020344:	7d7b      	ldrb	r3, [r7, #21]
 8020346:	9300      	str	r3, [sp, #0]
 8020348:	4613      	mov	r3, r2
 802034a:	683a      	ldr	r2, [r7, #0]
 802034c:	6879      	ldr	r1, [r7, #4]
 802034e:	68b8      	ldr	r0, [r7, #8]
 8020350:	f004 faac 	bl	80248ac <ip4_output_if>
 8020354:	4603      	mov	r3, r0
 8020356:	75fb      	strb	r3, [r7, #23]
    NETIF_RESET_HINTS(netif);
  }
  pbuf_free(p);
 8020358:	68b8      	ldr	r0, [r7, #8]
 802035a:	f7f9 fe5f 	bl	801a01c <pbuf_free>
  return err;
 802035e:	f997 3017 	ldrsb.w	r3, [r7, #23]
}
 8020362:	4618      	mov	r0, r3
 8020364:	3718      	adds	r7, #24
 8020366:	46bd      	mov	sp, r7
 8020368:	bd80      	pop	{r7, pc}
 802036a:	bf00      	nop
 802036c:	0802ed24 	.word	0x0802ed24
 8020370:	0802f4d8 	.word	0x0802f4d8
 8020374:	0802ed78 	.word	0x0802ed78

08020378 <tcp_rst>:
 */
void
tcp_rst(const struct tcp_pcb *pcb, u32_t seqno, u32_t ackno,
        const ip_addr_t *local_ip, const ip_addr_t *remote_ip,
        u16_t local_port, u16_t remote_port)
{
 8020378:	b590      	push	{r4, r7, lr}
 802037a:	b08b      	sub	sp, #44	@ 0x2c
 802037c:	af04      	add	r7, sp, #16
 802037e:	60f8      	str	r0, [r7, #12]
 8020380:	60b9      	str	r1, [r7, #8]
 8020382:	607a      	str	r2, [r7, #4]
 8020384:	603b      	str	r3, [r7, #0]
  struct pbuf *p;
  u16_t wnd;
  u8_t optlen;

  LWIP_ASSERT("tcp_rst: invalid local_ip", local_ip != NULL);
 8020386:	683b      	ldr	r3, [r7, #0]
 8020388:	2b00      	cmp	r3, #0
 802038a:	d106      	bne.n	802039a <tcp_rst+0x22>
 802038c:	4b1f      	ldr	r3, [pc, #124]	@ (802040c <tcp_rst+0x94>)
 802038e:	f240 72c4 	movw	r2, #1988	@ 0x7c4
 8020392:	491f      	ldr	r1, [pc, #124]	@ (8020410 <tcp_rst+0x98>)
 8020394:	481f      	ldr	r0, [pc, #124]	@ (8020414 <tcp_rst+0x9c>)
 8020396:	f009 f8b9 	bl	802950c <iprintf>
  LWIP_ASSERT("tcp_rst: invalid remote_ip", remote_ip != NULL);
 802039a:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 802039c:	2b00      	cmp	r3, #0
 802039e:	d106      	bne.n	80203ae <tcp_rst+0x36>
 80203a0:	4b1a      	ldr	r3, [pc, #104]	@ (802040c <tcp_rst+0x94>)
 80203a2:	f240 72c5 	movw	r2, #1989	@ 0x7c5
 80203a6:	491c      	ldr	r1, [pc, #112]	@ (8020418 <tcp_rst+0xa0>)
 80203a8:	481a      	ldr	r0, [pc, #104]	@ (8020414 <tcp_rst+0x9c>)
 80203aa:	f009 f8af 	bl	802950c <iprintf>

  optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(0, pcb);
 80203ae:	2300      	movs	r3, #0
 80203b0:	75fb      	strb	r3, [r7, #23]

#if LWIP_WND_SCALE
  wnd = PP_HTONS(((TCP_WND >> TCP_RCV_SCALE) & 0xFFFF));
#else
  wnd = PP_HTONS(TCP_WND);
 80203b2:	f24d 0316 	movw	r3, #53270	@ 0xd016
 80203b6:	82bb      	strh	r3, [r7, #20]
#endif

  p = tcp_output_alloc_header_common(ackno, optlen, 0, lwip_htonl(seqno), local_port,
 80203b8:	7dfb      	ldrb	r3, [r7, #23]
 80203ba:	b29c      	uxth	r4, r3
 80203bc:	68b8      	ldr	r0, [r7, #8]
 80203be:	f7f8 f960 	bl	8018682 <lwip_htonl>
 80203c2:	4602      	mov	r2, r0
 80203c4:	8abb      	ldrh	r3, [r7, #20]
 80203c6:	9303      	str	r3, [sp, #12]
 80203c8:	2314      	movs	r3, #20
 80203ca:	9302      	str	r3, [sp, #8]
 80203cc:	8e3b      	ldrh	r3, [r7, #48]	@ 0x30
 80203ce:	9301      	str	r3, [sp, #4]
 80203d0:	8dbb      	ldrh	r3, [r7, #44]	@ 0x2c
 80203d2:	9300      	str	r3, [sp, #0]
 80203d4:	4613      	mov	r3, r2
 80203d6:	2200      	movs	r2, #0
 80203d8:	4621      	mov	r1, r4
 80203da:	6878      	ldr	r0, [r7, #4]
 80203dc:	f7ff fe94 	bl	8020108 <tcp_output_alloc_header_common>
 80203e0:	6138      	str	r0, [r7, #16]
    remote_port, TCP_RST | TCP_ACK, wnd);
  if (p == NULL) {
 80203e2:	693b      	ldr	r3, [r7, #16]
 80203e4:	2b00      	cmp	r3, #0
 80203e6:	d00c      	beq.n	8020402 <tcp_rst+0x8a>
    LWIP_DEBUGF(TCP_DEBUG, ("tcp_rst: could not allocate memory for pbuf\n"));
    return;
  }
  tcp_output_fill_options(pcb, p, 0, optlen);
 80203e8:	7dfb      	ldrb	r3, [r7, #23]
 80203ea:	2200      	movs	r2, #0
 80203ec:	6939      	ldr	r1, [r7, #16]
 80203ee:	68f8      	ldr	r0, [r7, #12]
 80203f0:	f7ff ff3a 	bl	8020268 <tcp_output_fill_options>

  MIB2_STATS_INC(mib2.tcpoutrsts);

  tcp_output_control_segment(pcb, p, local_ip, remote_ip);
 80203f4:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80203f6:	683a      	ldr	r2, [r7, #0]
 80203f8:	6939      	ldr	r1, [r7, #16]
 80203fa:	68f8      	ldr	r0, [r7, #12]
 80203fc:	f7ff ff72 	bl	80202e4 <tcp_output_control_segment>
 8020400:	e000      	b.n	8020404 <tcp_rst+0x8c>
    return;
 8020402:	bf00      	nop
  LWIP_DEBUGF(TCP_RST_DEBUG, ("tcp_rst: seqno %"U32_F" ackno %"U32_F".\n", seqno, ackno));
}
 8020404:	371c      	adds	r7, #28
 8020406:	46bd      	mov	sp, r7
 8020408:	bd90      	pop	{r4, r7, pc}
 802040a:	bf00      	nop
 802040c:	0802ed24 	.word	0x0802ed24
 8020410:	0802f504 	.word	0x0802f504
 8020414:	0802ed78 	.word	0x0802ed78
 8020418:	0802f520 	.word	0x0802f520

0802041c <tcp_send_empty_ack>:
 *
 * @param pcb Protocol control block for the TCP connection to send the ACK
 */
err_t
tcp_send_empty_ack(struct tcp_pcb *pcb)
{
 802041c:	b590      	push	{r4, r7, lr}
 802041e:	b087      	sub	sp, #28
 8020420:	af00      	add	r7, sp, #0
 8020422:	6078      	str	r0, [r7, #4]
  err_t err;
  struct pbuf *p;
  u8_t optlen, optflags = 0;
 8020424:	2300      	movs	r3, #0
 8020426:	75fb      	strb	r3, [r7, #23]
  u8_t num_sacks = 0;
 8020428:	2300      	movs	r3, #0
 802042a:	75bb      	strb	r3, [r7, #22]

  LWIP_ASSERT("tcp_send_empty_ack: invalid pcb", pcb != NULL);
 802042c:	687b      	ldr	r3, [r7, #4]
 802042e:	2b00      	cmp	r3, #0
 8020430:	d106      	bne.n	8020440 <tcp_send_empty_ack+0x24>
 8020432:	4b28      	ldr	r3, [pc, #160]	@ (80204d4 <tcp_send_empty_ack+0xb8>)
 8020434:	f240 72ea 	movw	r2, #2026	@ 0x7ea
 8020438:	4927      	ldr	r1, [pc, #156]	@ (80204d8 <tcp_send_empty_ack+0xbc>)
 802043a:	4828      	ldr	r0, [pc, #160]	@ (80204dc <tcp_send_empty_ack+0xc0>)
 802043c:	f009 f866 	bl	802950c <iprintf>
#if LWIP_TCP_TIMESTAMPS
  if (pcb->flags & TF_TIMESTAMP) {
    optflags = TF_SEG_OPTS_TS;
  }
#endif
  optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(optflags, pcb);
 8020440:	7dfb      	ldrb	r3, [r7, #23]
 8020442:	009b      	lsls	r3, r3, #2
 8020444:	b2db      	uxtb	r3, r3
 8020446:	f003 0304 	and.w	r3, r3, #4
 802044a:	757b      	strb	r3, [r7, #21]
  if ((num_sacks = tcp_get_num_sacks(pcb, optlen)) > 0) {
    optlen += 4 + num_sacks * 8; /* 4 bytes for header (including 2*NOP), plus 8B for each SACK */
  }
#endif

  p = tcp_output_alloc_header(pcb, optlen, 0, lwip_htonl(pcb->snd_nxt));
 802044c:	7d7b      	ldrb	r3, [r7, #21]
 802044e:	b29c      	uxth	r4, r3
 8020450:	687b      	ldr	r3, [r7, #4]
 8020452:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 8020454:	4618      	mov	r0, r3
 8020456:	f7f8 f914 	bl	8018682 <lwip_htonl>
 802045a:	4603      	mov	r3, r0
 802045c:	2200      	movs	r2, #0
 802045e:	4621      	mov	r1, r4
 8020460:	6878      	ldr	r0, [r7, #4]
 8020462:	f7ff fec3 	bl	80201ec <tcp_output_alloc_header>
 8020466:	6138      	str	r0, [r7, #16]
  if (p == NULL) {
 8020468:	693b      	ldr	r3, [r7, #16]
 802046a:	2b00      	cmp	r3, #0
 802046c:	d109      	bne.n	8020482 <tcp_send_empty_ack+0x66>
    /* let tcp_fasttmr retry sending this ACK */
    tcp_set_flags(pcb, TF_ACK_DELAY | TF_ACK_NOW);
 802046e:	687b      	ldr	r3, [r7, #4]
 8020470:	8b5b      	ldrh	r3, [r3, #26]
 8020472:	f043 0303 	orr.w	r3, r3, #3
 8020476:	b29a      	uxth	r2, r3
 8020478:	687b      	ldr	r3, [r7, #4]
 802047a:	835a      	strh	r2, [r3, #26]
    LWIP_DEBUGF(TCP_OUTPUT_DEBUG, ("tcp_output: (ACK) could not allocate pbuf\n"));
    return ERR_BUF;
 802047c:	f06f 0301 	mvn.w	r3, #1
 8020480:	e023      	b.n	80204ca <tcp_send_empty_ack+0xae>
  }
  tcp_output_fill_options(pcb, p, optflags, num_sacks);
 8020482:	7dbb      	ldrb	r3, [r7, #22]
 8020484:	7dfa      	ldrb	r2, [r7, #23]
 8020486:	6939      	ldr	r1, [r7, #16]
 8020488:	6878      	ldr	r0, [r7, #4]
 802048a:	f7ff feed 	bl	8020268 <tcp_output_fill_options>
  pcb->ts_lastacksent = pcb->rcv_nxt;
#endif

  LWIP_DEBUGF(TCP_OUTPUT_DEBUG,
              ("tcp_output: sending ACK for %"U32_F"\n", pcb->rcv_nxt));
  err = tcp_output_control_segment(pcb, p, &pcb->local_ip, &pcb->remote_ip);
 802048e:	687a      	ldr	r2, [r7, #4]
 8020490:	687b      	ldr	r3, [r7, #4]
 8020492:	3304      	adds	r3, #4
 8020494:	6939      	ldr	r1, [r7, #16]
 8020496:	6878      	ldr	r0, [r7, #4]
 8020498:	f7ff ff24 	bl	80202e4 <tcp_output_control_segment>
 802049c:	4603      	mov	r3, r0
 802049e:	73fb      	strb	r3, [r7, #15]
  if (err != ERR_OK) {
 80204a0:	f997 300f 	ldrsb.w	r3, [r7, #15]
 80204a4:	2b00      	cmp	r3, #0
 80204a6:	d007      	beq.n	80204b8 <tcp_send_empty_ack+0x9c>
    /* let tcp_fasttmr retry sending this ACK */
    tcp_set_flags(pcb, TF_ACK_DELAY | TF_ACK_NOW);
 80204a8:	687b      	ldr	r3, [r7, #4]
 80204aa:	8b5b      	ldrh	r3, [r3, #26]
 80204ac:	f043 0303 	orr.w	r3, r3, #3
 80204b0:	b29a      	uxth	r2, r3
 80204b2:	687b      	ldr	r3, [r7, #4]
 80204b4:	835a      	strh	r2, [r3, #26]
 80204b6:	e006      	b.n	80204c6 <tcp_send_empty_ack+0xaa>
  } else {
    /* remove ACK flags from the PCB, as we sent an empty ACK now */
    tcp_clear_flags(pcb, TF_ACK_DELAY | TF_ACK_NOW);
 80204b8:	687b      	ldr	r3, [r7, #4]
 80204ba:	8b5b      	ldrh	r3, [r3, #26]
 80204bc:	f023 0303 	bic.w	r3, r3, #3
 80204c0:	b29a      	uxth	r2, r3
 80204c2:	687b      	ldr	r3, [r7, #4]
 80204c4:	835a      	strh	r2, [r3, #26]
  }

  return err;
 80204c6:	f997 300f 	ldrsb.w	r3, [r7, #15]
}
 80204ca:	4618      	mov	r0, r3
 80204cc:	371c      	adds	r7, #28
 80204ce:	46bd      	mov	sp, r7
 80204d0:	bd90      	pop	{r4, r7, pc}
 80204d2:	bf00      	nop
 80204d4:	0802ed24 	.word	0x0802ed24
 80204d8:	0802f53c 	.word	0x0802f53c
 80204dc:	0802ed78 	.word	0x0802ed78

080204e0 <tcp_keepalive>:
 *
 * @param pcb the tcp_pcb for which to send a keepalive packet
 */
err_t
tcp_keepalive(struct tcp_pcb *pcb)
{
 80204e0:	b590      	push	{r4, r7, lr}
 80204e2:	b085      	sub	sp, #20
 80204e4:	af00      	add	r7, sp, #0
 80204e6:	6078      	str	r0, [r7, #4]
  err_t err;
  struct pbuf *p;
  u8_t optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(0, pcb);
 80204e8:	2300      	movs	r3, #0
 80204ea:	72bb      	strb	r3, [r7, #10]

  LWIP_ASSERT("tcp_keepalive: invalid pcb", pcb != NULL);
 80204ec:	687b      	ldr	r3, [r7, #4]
 80204ee:	2b00      	cmp	r3, #0
 80204f0:	d106      	bne.n	8020500 <tcp_keepalive+0x20>
 80204f2:	4b18      	ldr	r3, [pc, #96]	@ (8020554 <tcp_keepalive+0x74>)
 80204f4:	f640 0224 	movw	r2, #2084	@ 0x824
 80204f8:	4917      	ldr	r1, [pc, #92]	@ (8020558 <tcp_keepalive+0x78>)
 80204fa:	4818      	ldr	r0, [pc, #96]	@ (802055c <tcp_keepalive+0x7c>)
 80204fc:	f009 f806 	bl	802950c <iprintf>
  LWIP_DEBUGF(TCP_DEBUG, ("\n"));

  LWIP_DEBUGF(TCP_DEBUG, ("tcp_keepalive: tcp_ticks %"U32_F"   pcb->tmr %"U32_F" pcb->keep_cnt_sent %"U16_F"\n",
                          tcp_ticks, pcb->tmr, (u16_t)pcb->keep_cnt_sent));

  p = tcp_output_alloc_header(pcb, optlen, 0, lwip_htonl(pcb->snd_nxt - 1));
 8020500:	7abb      	ldrb	r3, [r7, #10]
 8020502:	b29c      	uxth	r4, r3
 8020504:	687b      	ldr	r3, [r7, #4]
 8020506:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 8020508:	3b01      	subs	r3, #1
 802050a:	4618      	mov	r0, r3
 802050c:	f7f8 f8b9 	bl	8018682 <lwip_htonl>
 8020510:	4603      	mov	r3, r0
 8020512:	2200      	movs	r2, #0
 8020514:	4621      	mov	r1, r4
 8020516:	6878      	ldr	r0, [r7, #4]
 8020518:	f7ff fe68 	bl	80201ec <tcp_output_alloc_header>
 802051c:	60f8      	str	r0, [r7, #12]
  if (p == NULL) {
 802051e:	68fb      	ldr	r3, [r7, #12]
 8020520:	2b00      	cmp	r3, #0
 8020522:	d102      	bne.n	802052a <tcp_keepalive+0x4a>
    LWIP_DEBUGF(TCP_DEBUG,
                ("tcp_keepalive: could not allocate memory for pbuf\n"));
    return ERR_MEM;
 8020524:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8020528:	e010      	b.n	802054c <tcp_keepalive+0x6c>
  }
  tcp_output_fill_options(pcb, p, 0, optlen);
 802052a:	7abb      	ldrb	r3, [r7, #10]
 802052c:	2200      	movs	r2, #0
 802052e:	68f9      	ldr	r1, [r7, #12]
 8020530:	6878      	ldr	r0, [r7, #4]
 8020532:	f7ff fe99 	bl	8020268 <tcp_output_fill_options>
  err = tcp_output_control_segment(pcb, p, &pcb->local_ip, &pcb->remote_ip);
 8020536:	687a      	ldr	r2, [r7, #4]
 8020538:	687b      	ldr	r3, [r7, #4]
 802053a:	3304      	adds	r3, #4
 802053c:	68f9      	ldr	r1, [r7, #12]
 802053e:	6878      	ldr	r0, [r7, #4]
 8020540:	f7ff fed0 	bl	80202e4 <tcp_output_control_segment>
 8020544:	4603      	mov	r3, r0
 8020546:	72fb      	strb	r3, [r7, #11]

  LWIP_DEBUGF(TCP_DEBUG, ("tcp_keepalive: seqno %"U32_F" ackno %"U32_F" err %d.\n",
                          pcb->snd_nxt - 1, pcb->rcv_nxt, (int)err));
  return err;
 8020548:	f997 300b 	ldrsb.w	r3, [r7, #11]
}
 802054c:	4618      	mov	r0, r3
 802054e:	3714      	adds	r7, #20
 8020550:	46bd      	mov	sp, r7
 8020552:	bd90      	pop	{r4, r7, pc}
 8020554:	0802ed24 	.word	0x0802ed24
 8020558:	0802f55c 	.word	0x0802f55c
 802055c:	0802ed78 	.word	0x0802ed78

08020560 <tcp_zero_window_probe>:
 *
 * @param pcb the tcp_pcb for which to send a zero-window probe packet
 */
err_t
tcp_zero_window_probe(struct tcp_pcb *pcb)
{
 8020560:	b590      	push	{r4, r7, lr}
 8020562:	b08b      	sub	sp, #44	@ 0x2c
 8020564:	af00      	add	r7, sp, #0
 8020566:	6078      	str	r0, [r7, #4]
  struct tcp_hdr *tcphdr;
  struct tcp_seg *seg;
  u16_t len;
  u8_t is_fin;
  u32_t snd_nxt;
  u8_t optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(0, pcb);
 8020568:	2300      	movs	r3, #0
 802056a:	74fb      	strb	r3, [r7, #19]

  LWIP_ASSERT("tcp_zero_window_probe: invalid pcb", pcb != NULL);
 802056c:	687b      	ldr	r3, [r7, #4]
 802056e:	2b00      	cmp	r3, #0
 8020570:	d106      	bne.n	8020580 <tcp_zero_window_probe+0x20>
 8020572:	4b4d      	ldr	r3, [pc, #308]	@ (80206a8 <tcp_zero_window_probe+0x148>)
 8020574:	f640 024f 	movw	r2, #2127	@ 0x84f
 8020578:	494c      	ldr	r1, [pc, #304]	@ (80206ac <tcp_zero_window_probe+0x14c>)
 802057a:	484d      	ldr	r0, [pc, #308]	@ (80206b0 <tcp_zero_window_probe+0x150>)
 802057c:	f008 ffc6 	bl	802950c <iprintf>
              ("tcp_zero_window_probe: tcp_ticks %"U32_F
               "   pcb->tmr %"U32_F" pcb->keep_cnt_sent %"U16_F"\n",
               tcp_ticks, pcb->tmr, (u16_t)pcb->keep_cnt_sent));

  /* Only consider unsent, persist timer should be off when there is data in-flight */
  seg = pcb->unsent;
 8020580:	687b      	ldr	r3, [r7, #4]
 8020582:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8020584:	627b      	str	r3, [r7, #36]	@ 0x24
  if (seg == NULL) {
 8020586:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8020588:	2b00      	cmp	r3, #0
 802058a:	d101      	bne.n	8020590 <tcp_zero_window_probe+0x30>
    /* Not expected, persist timer should be off when the send buffer is empty */
    return ERR_OK;
 802058c:	2300      	movs	r3, #0
 802058e:	e087      	b.n	80206a0 <tcp_zero_window_probe+0x140>

  /* increment probe count. NOTE: we record probe even if it fails
     to actually transmit due to an error. This ensures memory exhaustion/
     routing problem doesn't leave a zero-window pcb as an indefinite zombie.
     RTO mechanism has similar behavior, see pcb->nrtx */
  if (pcb->persist_probe < 0xFF) {
 8020590:	687b      	ldr	r3, [r7, #4]
 8020592:	f893 309a 	ldrb.w	r3, [r3, #154]	@ 0x9a
 8020596:	2bff      	cmp	r3, #255	@ 0xff
 8020598:	d007      	beq.n	80205aa <tcp_zero_window_probe+0x4a>
    ++pcb->persist_probe;
 802059a:	687b      	ldr	r3, [r7, #4]
 802059c:	f893 309a 	ldrb.w	r3, [r3, #154]	@ 0x9a
 80205a0:	3301      	adds	r3, #1
 80205a2:	b2da      	uxtb	r2, r3
 80205a4:	687b      	ldr	r3, [r7, #4]
 80205a6:	f883 209a 	strb.w	r2, [r3, #154]	@ 0x9a
  }

  is_fin = ((TCPH_FLAGS(seg->tcphdr) & TCP_FIN) != 0) && (seg->len == 0);
 80205aa:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80205ac:	691b      	ldr	r3, [r3, #16]
 80205ae:	899b      	ldrh	r3, [r3, #12]
 80205b0:	b29b      	uxth	r3, r3
 80205b2:	4618      	mov	r0, r3
 80205b4:	f7f8 f850 	bl	8018658 <lwip_htons>
 80205b8:	4603      	mov	r3, r0
 80205ba:	b2db      	uxtb	r3, r3
 80205bc:	f003 0301 	and.w	r3, r3, #1
 80205c0:	2b00      	cmp	r3, #0
 80205c2:	d005      	beq.n	80205d0 <tcp_zero_window_probe+0x70>
 80205c4:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80205c6:	891b      	ldrh	r3, [r3, #8]
 80205c8:	2b00      	cmp	r3, #0
 80205ca:	d101      	bne.n	80205d0 <tcp_zero_window_probe+0x70>
 80205cc:	2301      	movs	r3, #1
 80205ce:	e000      	b.n	80205d2 <tcp_zero_window_probe+0x72>
 80205d0:	2300      	movs	r3, #0
 80205d2:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
  /* we want to send one seqno: either FIN or data (no options) */
  len = is_fin ? 0 : 1;
 80205d6:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 80205da:	2b00      	cmp	r3, #0
 80205dc:	bf0c      	ite	eq
 80205de:	2301      	moveq	r3, #1
 80205e0:	2300      	movne	r3, #0
 80205e2:	b2db      	uxtb	r3, r3
 80205e4:	843b      	strh	r3, [r7, #32]

  p = tcp_output_alloc_header(pcb, optlen, len, seg->tcphdr->seqno);
 80205e6:	7cfb      	ldrb	r3, [r7, #19]
 80205e8:	b299      	uxth	r1, r3
 80205ea:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80205ec:	691b      	ldr	r3, [r3, #16]
 80205ee:	685b      	ldr	r3, [r3, #4]
 80205f0:	8c3a      	ldrh	r2, [r7, #32]
 80205f2:	6878      	ldr	r0, [r7, #4]
 80205f4:	f7ff fdfa 	bl	80201ec <tcp_output_alloc_header>
 80205f8:	61f8      	str	r0, [r7, #28]
  if (p == NULL) {
 80205fa:	69fb      	ldr	r3, [r7, #28]
 80205fc:	2b00      	cmp	r3, #0
 80205fe:	d102      	bne.n	8020606 <tcp_zero_window_probe+0xa6>
    LWIP_DEBUGF(TCP_DEBUG, ("tcp_zero_window_probe: no memory for pbuf\n"));
    return ERR_MEM;
 8020600:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8020604:	e04c      	b.n	80206a0 <tcp_zero_window_probe+0x140>
  }
  tcphdr = (struct tcp_hdr *)p->payload;
 8020606:	69fb      	ldr	r3, [r7, #28]
 8020608:	685b      	ldr	r3, [r3, #4]
 802060a:	61bb      	str	r3, [r7, #24]

  if (is_fin) {
 802060c:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 8020610:	2b00      	cmp	r3, #0
 8020612:	d011      	beq.n	8020638 <tcp_zero_window_probe+0xd8>
    /* FIN segment, no data */
    TCPH_FLAGS_SET(tcphdr, TCP_ACK | TCP_FIN);
 8020614:	69bb      	ldr	r3, [r7, #24]
 8020616:	899b      	ldrh	r3, [r3, #12]
 8020618:	b29b      	uxth	r3, r3
 802061a:	b21b      	sxth	r3, r3
 802061c:	f423 537c 	bic.w	r3, r3, #16128	@ 0x3f00
 8020620:	b21c      	sxth	r4, r3
 8020622:	2011      	movs	r0, #17
 8020624:	f7f8 f818 	bl	8018658 <lwip_htons>
 8020628:	4603      	mov	r3, r0
 802062a:	b21b      	sxth	r3, r3
 802062c:	4323      	orrs	r3, r4
 802062e:	b21b      	sxth	r3, r3
 8020630:	b29a      	uxth	r2, r3
 8020632:	69bb      	ldr	r3, [r7, #24]
 8020634:	819a      	strh	r2, [r3, #12]
 8020636:	e010      	b.n	802065a <tcp_zero_window_probe+0xfa>
  } else {
    /* Data segment, copy in one byte from the head of the unacked queue */
    char *d = ((char *)p->payload + TCP_HLEN);
 8020638:	69fb      	ldr	r3, [r7, #28]
 802063a:	685b      	ldr	r3, [r3, #4]
 802063c:	3314      	adds	r3, #20
 802063e:	617b      	str	r3, [r7, #20]
    /* Depending on whether the segment has already been sent (unacked) or not
       (unsent), seg->p->payload points to the IP header or TCP header.
       Ensure we copy the first TCP data byte: */
    pbuf_copy_partial(seg->p, d, 1, seg->p->tot_len - seg->len);
 8020640:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8020642:	6858      	ldr	r0, [r3, #4]
 8020644:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8020646:	685b      	ldr	r3, [r3, #4]
 8020648:	891a      	ldrh	r2, [r3, #8]
 802064a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 802064c:	891b      	ldrh	r3, [r3, #8]
 802064e:	1ad3      	subs	r3, r2, r3
 8020650:	b29b      	uxth	r3, r3
 8020652:	2201      	movs	r2, #1
 8020654:	6979      	ldr	r1, [r7, #20]
 8020656:	f7f9 fee7 	bl	801a428 <pbuf_copy_partial>
  }

  /* The byte may be acknowledged without the window being opened. */
  snd_nxt = lwip_ntohl(seg->tcphdr->seqno) + 1;
 802065a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 802065c:	691b      	ldr	r3, [r3, #16]
 802065e:	685b      	ldr	r3, [r3, #4]
 8020660:	4618      	mov	r0, r3
 8020662:	f7f8 f80e 	bl	8018682 <lwip_htonl>
 8020666:	4603      	mov	r3, r0
 8020668:	3301      	adds	r3, #1
 802066a:	60fb      	str	r3, [r7, #12]
  if (TCP_SEQ_LT(pcb->snd_nxt, snd_nxt)) {
 802066c:	687b      	ldr	r3, [r7, #4]
 802066e:	6d1a      	ldr	r2, [r3, #80]	@ 0x50
 8020670:	68fb      	ldr	r3, [r7, #12]
 8020672:	1ad3      	subs	r3, r2, r3
 8020674:	2b00      	cmp	r3, #0
 8020676:	da02      	bge.n	802067e <tcp_zero_window_probe+0x11e>
    pcb->snd_nxt = snd_nxt;
 8020678:	687b      	ldr	r3, [r7, #4]
 802067a:	68fa      	ldr	r2, [r7, #12]
 802067c:	651a      	str	r2, [r3, #80]	@ 0x50
  }
  tcp_output_fill_options(pcb, p, 0, optlen);
 802067e:	7cfb      	ldrb	r3, [r7, #19]
 8020680:	2200      	movs	r2, #0
 8020682:	69f9      	ldr	r1, [r7, #28]
 8020684:	6878      	ldr	r0, [r7, #4]
 8020686:	f7ff fdef 	bl	8020268 <tcp_output_fill_options>

  err = tcp_output_control_segment(pcb, p, &pcb->local_ip, &pcb->remote_ip);
 802068a:	687a      	ldr	r2, [r7, #4]
 802068c:	687b      	ldr	r3, [r7, #4]
 802068e:	3304      	adds	r3, #4
 8020690:	69f9      	ldr	r1, [r7, #28]
 8020692:	6878      	ldr	r0, [r7, #4]
 8020694:	f7ff fe26 	bl	80202e4 <tcp_output_control_segment>
 8020698:	4603      	mov	r3, r0
 802069a:	72fb      	strb	r3, [r7, #11]

  LWIP_DEBUGF(TCP_DEBUG, ("tcp_zero_window_probe: seqno %"U32_F
                          " ackno %"U32_F" err %d.\n",
                          pcb->snd_nxt - 1, pcb->rcv_nxt, (int)err));
  return err;
 802069c:	f997 300b 	ldrsb.w	r3, [r7, #11]
}
 80206a0:	4618      	mov	r0, r3
 80206a2:	372c      	adds	r7, #44	@ 0x2c
 80206a4:	46bd      	mov	sp, r7
 80206a6:	bd90      	pop	{r4, r7, pc}
 80206a8:	0802ed24 	.word	0x0802ed24
 80206ac:	0802f578 	.word	0x0802f578
 80206b0:	0802ed78 	.word	0x0802ed78

080206b4 <tcpip_tcp_timer>:
 *
 * @param arg unused argument
 */
static void
tcpip_tcp_timer(void *arg)
{
 80206b4:	b580      	push	{r7, lr}
 80206b6:	b082      	sub	sp, #8
 80206b8:	af00      	add	r7, sp, #0
 80206ba:	6078      	str	r0, [r7, #4]
  LWIP_UNUSED_ARG(arg);

  /* call TCP timer handler */
  tcp_tmr();
 80206bc:	f7f9 ffa2 	bl	801a604 <tcp_tmr>
  /* timer still needed? */
  if (tcp_active_pcbs || tcp_tw_pcbs) {
 80206c0:	4b0a      	ldr	r3, [pc, #40]	@ (80206ec <tcpip_tcp_timer+0x38>)
 80206c2:	681b      	ldr	r3, [r3, #0]
 80206c4:	2b00      	cmp	r3, #0
 80206c6:	d103      	bne.n	80206d0 <tcpip_tcp_timer+0x1c>
 80206c8:	4b09      	ldr	r3, [pc, #36]	@ (80206f0 <tcpip_tcp_timer+0x3c>)
 80206ca:	681b      	ldr	r3, [r3, #0]
 80206cc:	2b00      	cmp	r3, #0
 80206ce:	d005      	beq.n	80206dc <tcpip_tcp_timer+0x28>
    /* restart timer */
    sys_timeout(TCP_TMR_INTERVAL, tcpip_tcp_timer, NULL);
 80206d0:	2200      	movs	r2, #0
 80206d2:	4908      	ldr	r1, [pc, #32]	@ (80206f4 <tcpip_tcp_timer+0x40>)
 80206d4:	20fa      	movs	r0, #250	@ 0xfa
 80206d6:	f000 f8f5 	bl	80208c4 <sys_timeout>
 80206da:	e003      	b.n	80206e4 <tcpip_tcp_timer+0x30>
  } else {
    /* disable timer */
    tcpip_tcp_timer_active = 0;
 80206dc:	4b06      	ldr	r3, [pc, #24]	@ (80206f8 <tcpip_tcp_timer+0x44>)
 80206de:	2200      	movs	r2, #0
 80206e0:	601a      	str	r2, [r3, #0]
  }
}
 80206e2:	bf00      	nop
 80206e4:	bf00      	nop
 80206e6:	3708      	adds	r7, #8
 80206e8:	46bd      	mov	sp, r7
 80206ea:	bd80      	pop	{r7, pc}
 80206ec:	24029ff8 	.word	0x24029ff8
 80206f0:	24029ffc 	.word	0x24029ffc
 80206f4:	080206b5 	.word	0x080206b5
 80206f8:	2402a048 	.word	0x2402a048

080206fc <tcp_timer_needed>:
 * the reason is to have the TCP timer only running when
 * there are active (or time-wait) PCBs.
 */
void
tcp_timer_needed(void)
{
 80206fc:	b580      	push	{r7, lr}
 80206fe:	af00      	add	r7, sp, #0
  LWIP_ASSERT_CORE_LOCKED();
 8020700:	f7ef fcb6 	bl	8010070 <sys_check_core_locking>

  /* timer is off but needed again? */
  if (!tcpip_tcp_timer_active && (tcp_active_pcbs || tcp_tw_pcbs)) {
 8020704:	4b0a      	ldr	r3, [pc, #40]	@ (8020730 <tcp_timer_needed+0x34>)
 8020706:	681b      	ldr	r3, [r3, #0]
 8020708:	2b00      	cmp	r3, #0
 802070a:	d10f      	bne.n	802072c <tcp_timer_needed+0x30>
 802070c:	4b09      	ldr	r3, [pc, #36]	@ (8020734 <tcp_timer_needed+0x38>)
 802070e:	681b      	ldr	r3, [r3, #0]
 8020710:	2b00      	cmp	r3, #0
 8020712:	d103      	bne.n	802071c <tcp_timer_needed+0x20>
 8020714:	4b08      	ldr	r3, [pc, #32]	@ (8020738 <tcp_timer_needed+0x3c>)
 8020716:	681b      	ldr	r3, [r3, #0]
 8020718:	2b00      	cmp	r3, #0
 802071a:	d007      	beq.n	802072c <tcp_timer_needed+0x30>
    /* enable and start timer */
    tcpip_tcp_timer_active = 1;
 802071c:	4b04      	ldr	r3, [pc, #16]	@ (8020730 <tcp_timer_needed+0x34>)
 802071e:	2201      	movs	r2, #1
 8020720:	601a      	str	r2, [r3, #0]
    sys_timeout(TCP_TMR_INTERVAL, tcpip_tcp_timer, NULL);
 8020722:	2200      	movs	r2, #0
 8020724:	4905      	ldr	r1, [pc, #20]	@ (802073c <tcp_timer_needed+0x40>)
 8020726:	20fa      	movs	r0, #250	@ 0xfa
 8020728:	f000 f8cc 	bl	80208c4 <sys_timeout>
  }
}
 802072c:	bf00      	nop
 802072e:	bd80      	pop	{r7, pc}
 8020730:	2402a048 	.word	0x2402a048
 8020734:	24029ff8 	.word	0x24029ff8
 8020738:	24029ffc 	.word	0x24029ffc
 802073c:	080206b5 	.word	0x080206b5

08020740 <sys_timeout_abs>:
#if LWIP_DEBUG_TIMERNAMES
sys_timeout_abs(u32_t abs_time, sys_timeout_handler handler, void *arg, const char *handler_name)
#else /* LWIP_DEBUG_TIMERNAMES */
sys_timeout_abs(u32_t abs_time, sys_timeout_handler handler, void *arg)
#endif
{
 8020740:	b580      	push	{r7, lr}
 8020742:	b086      	sub	sp, #24
 8020744:	af00      	add	r7, sp, #0
 8020746:	60f8      	str	r0, [r7, #12]
 8020748:	60b9      	str	r1, [r7, #8]
 802074a:	607a      	str	r2, [r7, #4]
  struct sys_timeo *timeout, *t;

  timeout = (struct sys_timeo *)memp_malloc(MEMP_SYS_TIMEOUT);
 802074c:	200a      	movs	r0, #10
 802074e:	f7f8 fd01 	bl	8019154 <memp_malloc>
 8020752:	6138      	str	r0, [r7, #16]
  if (timeout == NULL) {
 8020754:	693b      	ldr	r3, [r7, #16]
 8020756:	2b00      	cmp	r3, #0
 8020758:	d109      	bne.n	802076e <sys_timeout_abs+0x2e>
    LWIP_ASSERT("sys_timeout: timeout != NULL, pool MEMP_SYS_TIMEOUT is empty", timeout != NULL);
 802075a:	693b      	ldr	r3, [r7, #16]
 802075c:	2b00      	cmp	r3, #0
 802075e:	d151      	bne.n	8020804 <sys_timeout_abs+0xc4>
 8020760:	4b2a      	ldr	r3, [pc, #168]	@ (802080c <sys_timeout_abs+0xcc>)
 8020762:	22be      	movs	r2, #190	@ 0xbe
 8020764:	492a      	ldr	r1, [pc, #168]	@ (8020810 <sys_timeout_abs+0xd0>)
 8020766:	482b      	ldr	r0, [pc, #172]	@ (8020814 <sys_timeout_abs+0xd4>)
 8020768:	f008 fed0 	bl	802950c <iprintf>
    return;
 802076c:	e04a      	b.n	8020804 <sys_timeout_abs+0xc4>
  }

  timeout->next = NULL;
 802076e:	693b      	ldr	r3, [r7, #16]
 8020770:	2200      	movs	r2, #0
 8020772:	601a      	str	r2, [r3, #0]
  timeout->h = handler;
 8020774:	693b      	ldr	r3, [r7, #16]
 8020776:	68ba      	ldr	r2, [r7, #8]
 8020778:	609a      	str	r2, [r3, #8]
  timeout->arg = arg;
 802077a:	693b      	ldr	r3, [r7, #16]
 802077c:	687a      	ldr	r2, [r7, #4]
 802077e:	60da      	str	r2, [r3, #12]
  timeout->time = abs_time;
 8020780:	693b      	ldr	r3, [r7, #16]
 8020782:	68fa      	ldr	r2, [r7, #12]
 8020784:	605a      	str	r2, [r3, #4]
  timeout->handler_name = handler_name;
  LWIP_DEBUGF(TIMERS_DEBUG, ("sys_timeout: %p abs_time=%"U32_F" handler=%s arg=%p\n",
                             (void *)timeout, abs_time, handler_name, (void *)arg));
#endif /* LWIP_DEBUG_TIMERNAMES */

  if (next_timeout == NULL) {
 8020786:	4b24      	ldr	r3, [pc, #144]	@ (8020818 <sys_timeout_abs+0xd8>)
 8020788:	681b      	ldr	r3, [r3, #0]
 802078a:	2b00      	cmp	r3, #0
 802078c:	d103      	bne.n	8020796 <sys_timeout_abs+0x56>
    next_timeout = timeout;
 802078e:	4a22      	ldr	r2, [pc, #136]	@ (8020818 <sys_timeout_abs+0xd8>)
 8020790:	693b      	ldr	r3, [r7, #16]
 8020792:	6013      	str	r3, [r2, #0]
    return;
 8020794:	e037      	b.n	8020806 <sys_timeout_abs+0xc6>
  }
  if (TIME_LESS_THAN(timeout->time, next_timeout->time)) {
 8020796:	693b      	ldr	r3, [r7, #16]
 8020798:	685a      	ldr	r2, [r3, #4]
 802079a:	4b1f      	ldr	r3, [pc, #124]	@ (8020818 <sys_timeout_abs+0xd8>)
 802079c:	681b      	ldr	r3, [r3, #0]
 802079e:	685b      	ldr	r3, [r3, #4]
 80207a0:	1ad3      	subs	r3, r2, r3
 80207a2:	0fdb      	lsrs	r3, r3, #31
 80207a4:	f003 0301 	and.w	r3, r3, #1
 80207a8:	b2db      	uxtb	r3, r3
 80207aa:	2b00      	cmp	r3, #0
 80207ac:	d007      	beq.n	80207be <sys_timeout_abs+0x7e>
    timeout->next = next_timeout;
 80207ae:	4b1a      	ldr	r3, [pc, #104]	@ (8020818 <sys_timeout_abs+0xd8>)
 80207b0:	681a      	ldr	r2, [r3, #0]
 80207b2:	693b      	ldr	r3, [r7, #16]
 80207b4:	601a      	str	r2, [r3, #0]
    next_timeout = timeout;
 80207b6:	4a18      	ldr	r2, [pc, #96]	@ (8020818 <sys_timeout_abs+0xd8>)
 80207b8:	693b      	ldr	r3, [r7, #16]
 80207ba:	6013      	str	r3, [r2, #0]
 80207bc:	e023      	b.n	8020806 <sys_timeout_abs+0xc6>
  } else {
    for (t = next_timeout; t != NULL; t = t->next) {
 80207be:	4b16      	ldr	r3, [pc, #88]	@ (8020818 <sys_timeout_abs+0xd8>)
 80207c0:	681b      	ldr	r3, [r3, #0]
 80207c2:	617b      	str	r3, [r7, #20]
 80207c4:	e01a      	b.n	80207fc <sys_timeout_abs+0xbc>
      if ((t->next == NULL) || TIME_LESS_THAN(timeout->time, t->next->time)) {
 80207c6:	697b      	ldr	r3, [r7, #20]
 80207c8:	681b      	ldr	r3, [r3, #0]
 80207ca:	2b00      	cmp	r3, #0
 80207cc:	d00b      	beq.n	80207e6 <sys_timeout_abs+0xa6>
 80207ce:	693b      	ldr	r3, [r7, #16]
 80207d0:	685a      	ldr	r2, [r3, #4]
 80207d2:	697b      	ldr	r3, [r7, #20]
 80207d4:	681b      	ldr	r3, [r3, #0]
 80207d6:	685b      	ldr	r3, [r3, #4]
 80207d8:	1ad3      	subs	r3, r2, r3
 80207da:	0fdb      	lsrs	r3, r3, #31
 80207dc:	f003 0301 	and.w	r3, r3, #1
 80207e0:	b2db      	uxtb	r3, r3
 80207e2:	2b00      	cmp	r3, #0
 80207e4:	d007      	beq.n	80207f6 <sys_timeout_abs+0xb6>
        timeout->next = t->next;
 80207e6:	697b      	ldr	r3, [r7, #20]
 80207e8:	681a      	ldr	r2, [r3, #0]
 80207ea:	693b      	ldr	r3, [r7, #16]
 80207ec:	601a      	str	r2, [r3, #0]
        t->next = timeout;
 80207ee:	697b      	ldr	r3, [r7, #20]
 80207f0:	693a      	ldr	r2, [r7, #16]
 80207f2:	601a      	str	r2, [r3, #0]
        break;
 80207f4:	e007      	b.n	8020806 <sys_timeout_abs+0xc6>
    for (t = next_timeout; t != NULL; t = t->next) {
 80207f6:	697b      	ldr	r3, [r7, #20]
 80207f8:	681b      	ldr	r3, [r3, #0]
 80207fa:	617b      	str	r3, [r7, #20]
 80207fc:	697b      	ldr	r3, [r7, #20]
 80207fe:	2b00      	cmp	r3, #0
 8020800:	d1e1      	bne.n	80207c6 <sys_timeout_abs+0x86>
 8020802:	e000      	b.n	8020806 <sys_timeout_abs+0xc6>
    return;
 8020804:	bf00      	nop
      }
    }
  }
}
 8020806:	3718      	adds	r7, #24
 8020808:	46bd      	mov	sp, r7
 802080a:	bd80      	pop	{r7, pc}
 802080c:	0802f59c 	.word	0x0802f59c
 8020810:	0802f5d0 	.word	0x0802f5d0
 8020814:	0802f610 	.word	0x0802f610
 8020818:	2402a040 	.word	0x2402a040

0802081c <lwip_cyclic_timer>:
#if !LWIP_TESTMODE
static
#endif
void
lwip_cyclic_timer(void *arg)
{
 802081c:	b580      	push	{r7, lr}
 802081e:	b086      	sub	sp, #24
 8020820:	af00      	add	r7, sp, #0
 8020822:	6078      	str	r0, [r7, #4]
  u32_t now;
  u32_t next_timeout_time;
  const struct lwip_cyclic_timer *cyclic = (const struct lwip_cyclic_timer *)arg;
 8020824:	687b      	ldr	r3, [r7, #4]
 8020826:	617b      	str	r3, [r7, #20]

#if LWIP_DEBUG_TIMERNAMES
  LWIP_DEBUGF(TIMERS_DEBUG, ("tcpip: %s()\n", cyclic->handler_name));
#endif
  cyclic->handler();
 8020828:	697b      	ldr	r3, [r7, #20]
 802082a:	685b      	ldr	r3, [r3, #4]
 802082c:	4798      	blx	r3

  now = sys_now();
 802082e:	f7ef f993 	bl	800fb58 <sys_now>
 8020832:	6138      	str	r0, [r7, #16]
  next_timeout_time = (u32_t)(current_timeout_due_time + cyclic->interval_ms);  /* overflow handled by TIME_LESS_THAN macro */ 
 8020834:	697b      	ldr	r3, [r7, #20]
 8020836:	681a      	ldr	r2, [r3, #0]
 8020838:	4b0f      	ldr	r3, [pc, #60]	@ (8020878 <lwip_cyclic_timer+0x5c>)
 802083a:	681b      	ldr	r3, [r3, #0]
 802083c:	4413      	add	r3, r2
 802083e:	60fb      	str	r3, [r7, #12]
  if (TIME_LESS_THAN(next_timeout_time, now)) {
 8020840:	68fa      	ldr	r2, [r7, #12]
 8020842:	693b      	ldr	r3, [r7, #16]
 8020844:	1ad3      	subs	r3, r2, r3
 8020846:	0fdb      	lsrs	r3, r3, #31
 8020848:	f003 0301 	and.w	r3, r3, #1
 802084c:	b2db      	uxtb	r3, r3
 802084e:	2b00      	cmp	r3, #0
 8020850:	d009      	beq.n	8020866 <lwip_cyclic_timer+0x4a>
    /* timer would immediately expire again -> "overload" -> restart without any correction */
#if LWIP_DEBUG_TIMERNAMES
    sys_timeout_abs((u32_t)(now + cyclic->interval_ms), lwip_cyclic_timer, arg, cyclic->handler_name);
#else
    sys_timeout_abs((u32_t)(now + cyclic->interval_ms), lwip_cyclic_timer, arg);
 8020852:	697b      	ldr	r3, [r7, #20]
 8020854:	681a      	ldr	r2, [r3, #0]
 8020856:	693b      	ldr	r3, [r7, #16]
 8020858:	4413      	add	r3, r2
 802085a:	687a      	ldr	r2, [r7, #4]
 802085c:	4907      	ldr	r1, [pc, #28]	@ (802087c <lwip_cyclic_timer+0x60>)
 802085e:	4618      	mov	r0, r3
 8020860:	f7ff ff6e 	bl	8020740 <sys_timeout_abs>
    sys_timeout_abs(next_timeout_time, lwip_cyclic_timer, arg, cyclic->handler_name);
#else
    sys_timeout_abs(next_timeout_time, lwip_cyclic_timer, arg);
#endif
  }
}
 8020864:	e004      	b.n	8020870 <lwip_cyclic_timer+0x54>
    sys_timeout_abs(next_timeout_time, lwip_cyclic_timer, arg);
 8020866:	687a      	ldr	r2, [r7, #4]
 8020868:	4904      	ldr	r1, [pc, #16]	@ (802087c <lwip_cyclic_timer+0x60>)
 802086a:	68f8      	ldr	r0, [r7, #12]
 802086c:	f7ff ff68 	bl	8020740 <sys_timeout_abs>
}
 8020870:	bf00      	nop
 8020872:	3718      	adds	r7, #24
 8020874:	46bd      	mov	sp, r7
 8020876:	bd80      	pop	{r7, pc}
 8020878:	2402a044 	.word	0x2402a044
 802087c:	0802081d 	.word	0x0802081d

08020880 <sys_timeouts_init>:

/** Initialize this module */
void sys_timeouts_init(void)
{
 8020880:	b580      	push	{r7, lr}
 8020882:	b082      	sub	sp, #8
 8020884:	af00      	add	r7, sp, #0
  size_t i;
  /* tcp_tmr() at index 0 is started on demand */
  for (i = (LWIP_TCP ? 1 : 0); i < LWIP_ARRAYSIZE(lwip_cyclic_timers); i++) {
 8020886:	2301      	movs	r3, #1
 8020888:	607b      	str	r3, [r7, #4]
 802088a:	e00e      	b.n	80208aa <sys_timeouts_init+0x2a>
    /* we have to cast via size_t to get rid of const warning
      (this is OK as cyclic_timer() casts back to const* */
    sys_timeout(lwip_cyclic_timers[i].interval_ms, lwip_cyclic_timer, LWIP_CONST_CAST(void *, &lwip_cyclic_timers[i]));
 802088c:	4a0b      	ldr	r2, [pc, #44]	@ (80208bc <sys_timeouts_init+0x3c>)
 802088e:	687b      	ldr	r3, [r7, #4]
 8020890:	f852 0033 	ldr.w	r0, [r2, r3, lsl #3]
 8020894:	687b      	ldr	r3, [r7, #4]
 8020896:	00db      	lsls	r3, r3, #3
 8020898:	4a08      	ldr	r2, [pc, #32]	@ (80208bc <sys_timeouts_init+0x3c>)
 802089a:	4413      	add	r3, r2
 802089c:	461a      	mov	r2, r3
 802089e:	4908      	ldr	r1, [pc, #32]	@ (80208c0 <sys_timeouts_init+0x40>)
 80208a0:	f000 f810 	bl	80208c4 <sys_timeout>
  for (i = (LWIP_TCP ? 1 : 0); i < LWIP_ARRAYSIZE(lwip_cyclic_timers); i++) {
 80208a4:	687b      	ldr	r3, [r7, #4]
 80208a6:	3301      	adds	r3, #1
 80208a8:	607b      	str	r3, [r7, #4]
 80208aa:	687b      	ldr	r3, [r7, #4]
 80208ac:	2b04      	cmp	r3, #4
 80208ae:	d9ed      	bls.n	802088c <sys_timeouts_init+0xc>
  }
}
 80208b0:	bf00      	nop
 80208b2:	bf00      	nop
 80208b4:	3708      	adds	r7, #8
 80208b6:	46bd      	mov	sp, r7
 80208b8:	bd80      	pop	{r7, pc}
 80208ba:	bf00      	nop
 80208bc:	0803077c 	.word	0x0803077c
 80208c0:	0802081d 	.word	0x0802081d

080208c4 <sys_timeout>:
sys_timeout_debug(u32_t msecs, sys_timeout_handler handler, void *arg, const char *handler_name)
#else /* LWIP_DEBUG_TIMERNAMES */
void
sys_timeout(u32_t msecs, sys_timeout_handler handler, void *arg)
#endif /* LWIP_DEBUG_TIMERNAMES */
{
 80208c4:	b580      	push	{r7, lr}
 80208c6:	b086      	sub	sp, #24
 80208c8:	af00      	add	r7, sp, #0
 80208ca:	60f8      	str	r0, [r7, #12]
 80208cc:	60b9      	str	r1, [r7, #8]
 80208ce:	607a      	str	r2, [r7, #4]
  u32_t next_timeout_time;

  LWIP_ASSERT_CORE_LOCKED();
 80208d0:	f7ef fbce 	bl	8010070 <sys_check_core_locking>

  LWIP_ASSERT("Timeout time too long, max is LWIP_UINT32_MAX/4 msecs", msecs <= (LWIP_UINT32_MAX / 4));
 80208d4:	68fb      	ldr	r3, [r7, #12]
 80208d6:	f1b3 4f80 	cmp.w	r3, #1073741824	@ 0x40000000
 80208da:	d306      	bcc.n	80208ea <sys_timeout+0x26>
 80208dc:	4b0a      	ldr	r3, [pc, #40]	@ (8020908 <sys_timeout+0x44>)
 80208de:	f240 1229 	movw	r2, #297	@ 0x129
 80208e2:	490a      	ldr	r1, [pc, #40]	@ (802090c <sys_timeout+0x48>)
 80208e4:	480a      	ldr	r0, [pc, #40]	@ (8020910 <sys_timeout+0x4c>)
 80208e6:	f008 fe11 	bl	802950c <iprintf>

  next_timeout_time = (u32_t)(sys_now() + msecs); /* overflow handled by TIME_LESS_THAN macro */ 
 80208ea:	f7ef f935 	bl	800fb58 <sys_now>
 80208ee:	4602      	mov	r2, r0
 80208f0:	68fb      	ldr	r3, [r7, #12]
 80208f2:	4413      	add	r3, r2
 80208f4:	617b      	str	r3, [r7, #20]

#if LWIP_DEBUG_TIMERNAMES
  sys_timeout_abs(next_timeout_time, handler, arg, handler_name);
#else
  sys_timeout_abs(next_timeout_time, handler, arg);
 80208f6:	687a      	ldr	r2, [r7, #4]
 80208f8:	68b9      	ldr	r1, [r7, #8]
 80208fa:	6978      	ldr	r0, [r7, #20]
 80208fc:	f7ff ff20 	bl	8020740 <sys_timeout_abs>
#endif
}
 8020900:	bf00      	nop
 8020902:	3718      	adds	r7, #24
 8020904:	46bd      	mov	sp, r7
 8020906:	bd80      	pop	{r7, pc}
 8020908:	0802f59c 	.word	0x0802f59c
 802090c:	0802f638 	.word	0x0802f638
 8020910:	0802f610 	.word	0x0802f610

08020914 <sys_check_timeouts>:
 *
 * Must be called periodically from your main loop.
 */
void
sys_check_timeouts(void)
{
 8020914:	b580      	push	{r7, lr}
 8020916:	b084      	sub	sp, #16
 8020918:	af00      	add	r7, sp, #0
  u32_t now;

  LWIP_ASSERT_CORE_LOCKED();
 802091a:	f7ef fba9 	bl	8010070 <sys_check_core_locking>

  /* Process only timers expired at the start of the function. */
  now = sys_now();
 802091e:	f7ef f91b 	bl	800fb58 <sys_now>
 8020922:	60f8      	str	r0, [r7, #12]
    sys_timeout_handler handler;
    void *arg;

    PBUF_CHECK_FREE_OOSEQ();

    tmptimeout = next_timeout;
 8020924:	4b17      	ldr	r3, [pc, #92]	@ (8020984 <sys_check_timeouts+0x70>)
 8020926:	681b      	ldr	r3, [r3, #0]
 8020928:	60bb      	str	r3, [r7, #8]
    if (tmptimeout == NULL) {
 802092a:	68bb      	ldr	r3, [r7, #8]
 802092c:	2b00      	cmp	r3, #0
 802092e:	d022      	beq.n	8020976 <sys_check_timeouts+0x62>
      return;
    }

    if (TIME_LESS_THAN(now, tmptimeout->time)) {
 8020930:	68bb      	ldr	r3, [r7, #8]
 8020932:	685b      	ldr	r3, [r3, #4]
 8020934:	68fa      	ldr	r2, [r7, #12]
 8020936:	1ad3      	subs	r3, r2, r3
 8020938:	0fdb      	lsrs	r3, r3, #31
 802093a:	f003 0301 	and.w	r3, r3, #1
 802093e:	b2db      	uxtb	r3, r3
 8020940:	2b00      	cmp	r3, #0
 8020942:	d11a      	bne.n	802097a <sys_check_timeouts+0x66>
      return;
    }

    /* Timeout has expired */
    next_timeout = tmptimeout->next;
 8020944:	68bb      	ldr	r3, [r7, #8]
 8020946:	681b      	ldr	r3, [r3, #0]
 8020948:	4a0e      	ldr	r2, [pc, #56]	@ (8020984 <sys_check_timeouts+0x70>)
 802094a:	6013      	str	r3, [r2, #0]
    handler = tmptimeout->h;
 802094c:	68bb      	ldr	r3, [r7, #8]
 802094e:	689b      	ldr	r3, [r3, #8]
 8020950:	607b      	str	r3, [r7, #4]
    arg = tmptimeout->arg;
 8020952:	68bb      	ldr	r3, [r7, #8]
 8020954:	68db      	ldr	r3, [r3, #12]
 8020956:	603b      	str	r3, [r7, #0]
    current_timeout_due_time = tmptimeout->time;
 8020958:	68bb      	ldr	r3, [r7, #8]
 802095a:	685b      	ldr	r3, [r3, #4]
 802095c:	4a0a      	ldr	r2, [pc, #40]	@ (8020988 <sys_check_timeouts+0x74>)
 802095e:	6013      	str	r3, [r2, #0]
    if (handler != NULL) {
      LWIP_DEBUGF(TIMERS_DEBUG, ("sct calling h=%s t=%"U32_F" arg=%p\n",
                                 tmptimeout->handler_name, sys_now() - tmptimeout->time, arg));
    }
#endif /* LWIP_DEBUG_TIMERNAMES */
    memp_free(MEMP_SYS_TIMEOUT, tmptimeout);
 8020960:	68b9      	ldr	r1, [r7, #8]
 8020962:	200a      	movs	r0, #10
 8020964:	f7f8 fc6c 	bl	8019240 <memp_free>
    if (handler != NULL) {
 8020968:	687b      	ldr	r3, [r7, #4]
 802096a:	2b00      	cmp	r3, #0
 802096c:	d0da      	beq.n	8020924 <sys_check_timeouts+0x10>
      handler(arg);
 802096e:	687b      	ldr	r3, [r7, #4]
 8020970:	6838      	ldr	r0, [r7, #0]
 8020972:	4798      	blx	r3
  do {
 8020974:	e7d6      	b.n	8020924 <sys_check_timeouts+0x10>
      return;
 8020976:	bf00      	nop
 8020978:	e000      	b.n	802097c <sys_check_timeouts+0x68>
      return;
 802097a:	bf00      	nop
    }
    LWIP_TCPIP_THREAD_ALIVE();

    /* Repeat until all expired timers have been called */
  } while (1);
}
 802097c:	3710      	adds	r7, #16
 802097e:	46bd      	mov	sp, r7
 8020980:	bd80      	pop	{r7, pc}
 8020982:	bf00      	nop
 8020984:	2402a040 	.word	0x2402a040
 8020988:	2402a044 	.word	0x2402a044

0802098c <sys_timeouts_sleeptime>:
/** Return the time left before the next timeout is due. If no timeouts are
 * enqueued, returns 0xffffffff
 */
u32_t
sys_timeouts_sleeptime(void)
{
 802098c:	b580      	push	{r7, lr}
 802098e:	b082      	sub	sp, #8
 8020990:	af00      	add	r7, sp, #0
  u32_t now;

  LWIP_ASSERT_CORE_LOCKED();
 8020992:	f7ef fb6d 	bl	8010070 <sys_check_core_locking>

  if (next_timeout == NULL) {
 8020996:	4b16      	ldr	r3, [pc, #88]	@ (80209f0 <sys_timeouts_sleeptime+0x64>)
 8020998:	681b      	ldr	r3, [r3, #0]
 802099a:	2b00      	cmp	r3, #0
 802099c:	d102      	bne.n	80209a4 <sys_timeouts_sleeptime+0x18>
    return SYS_TIMEOUTS_SLEEPTIME_INFINITE;
 802099e:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80209a2:	e020      	b.n	80209e6 <sys_timeouts_sleeptime+0x5a>
  }
  now = sys_now();
 80209a4:	f7ef f8d8 	bl	800fb58 <sys_now>
 80209a8:	6078      	str	r0, [r7, #4]
  if (TIME_LESS_THAN(next_timeout->time, now)) {
 80209aa:	4b11      	ldr	r3, [pc, #68]	@ (80209f0 <sys_timeouts_sleeptime+0x64>)
 80209ac:	681b      	ldr	r3, [r3, #0]
 80209ae:	685a      	ldr	r2, [r3, #4]
 80209b0:	687b      	ldr	r3, [r7, #4]
 80209b2:	1ad3      	subs	r3, r2, r3
 80209b4:	0fdb      	lsrs	r3, r3, #31
 80209b6:	f003 0301 	and.w	r3, r3, #1
 80209ba:	b2db      	uxtb	r3, r3
 80209bc:	2b00      	cmp	r3, #0
 80209be:	d001      	beq.n	80209c4 <sys_timeouts_sleeptime+0x38>
    return 0;
 80209c0:	2300      	movs	r3, #0
 80209c2:	e010      	b.n	80209e6 <sys_timeouts_sleeptime+0x5a>
  } else {
    u32_t ret = (u32_t)(next_timeout->time - now);
 80209c4:	4b0a      	ldr	r3, [pc, #40]	@ (80209f0 <sys_timeouts_sleeptime+0x64>)
 80209c6:	681b      	ldr	r3, [r3, #0]
 80209c8:	685a      	ldr	r2, [r3, #4]
 80209ca:	687b      	ldr	r3, [r7, #4]
 80209cc:	1ad3      	subs	r3, r2, r3
 80209ce:	603b      	str	r3, [r7, #0]
    LWIP_ASSERT("invalid sleeptime", ret <= LWIP_MAX_TIMEOUT);
 80209d0:	683b      	ldr	r3, [r7, #0]
 80209d2:	2b00      	cmp	r3, #0
 80209d4:	da06      	bge.n	80209e4 <sys_timeouts_sleeptime+0x58>
 80209d6:	4b07      	ldr	r3, [pc, #28]	@ (80209f4 <sys_timeouts_sleeptime+0x68>)
 80209d8:	f44f 72dc 	mov.w	r2, #440	@ 0x1b8
 80209dc:	4906      	ldr	r1, [pc, #24]	@ (80209f8 <sys_timeouts_sleeptime+0x6c>)
 80209de:	4807      	ldr	r0, [pc, #28]	@ (80209fc <sys_timeouts_sleeptime+0x70>)
 80209e0:	f008 fd94 	bl	802950c <iprintf>
    return ret;
 80209e4:	683b      	ldr	r3, [r7, #0]
  }
}
 80209e6:	4618      	mov	r0, r3
 80209e8:	3708      	adds	r7, #8
 80209ea:	46bd      	mov	sp, r7
 80209ec:	bd80      	pop	{r7, pc}
 80209ee:	bf00      	nop
 80209f0:	2402a040 	.word	0x2402a040
 80209f4:	0802f59c 	.word	0x0802f59c
 80209f8:	0802f670 	.word	0x0802f670
 80209fc:	0802f610 	.word	0x0802f610

08020a00 <udp_init>:
/**
 * Initialize this module.
 */
void
udp_init(void)
{
 8020a00:	b580      	push	{r7, lr}
 8020a02:	af00      	add	r7, sp, #0
#ifdef LWIP_RAND
  udp_port = UDP_ENSURE_LOCAL_PORT_RANGE(LWIP_RAND());
 8020a04:	f007 fa58 	bl	8027eb8 <rand>
 8020a08:	4603      	mov	r3, r0
 8020a0a:	b29b      	uxth	r3, r3
 8020a0c:	f3c3 030d 	ubfx	r3, r3, #0, #14
 8020a10:	b29b      	uxth	r3, r3
 8020a12:	f5a3 4380 	sub.w	r3, r3, #16384	@ 0x4000
 8020a16:	b29a      	uxth	r2, r3
 8020a18:	4b01      	ldr	r3, [pc, #4]	@ (8020a20 <udp_init+0x20>)
 8020a1a:	801a      	strh	r2, [r3, #0]
#endif /* LWIP_RAND */
}
 8020a1c:	bf00      	nop
 8020a1e:	bd80      	pop	{r7, pc}
 8020a20:	24000040 	.word	0x24000040

08020a24 <udp_new_port>:
 *
 * @return a new (free) local UDP port number
 */
static u16_t
udp_new_port(void)
{
 8020a24:	b480      	push	{r7}
 8020a26:	b083      	sub	sp, #12
 8020a28:	af00      	add	r7, sp, #0
  u16_t n = 0;
 8020a2a:	2300      	movs	r3, #0
 8020a2c:	80fb      	strh	r3, [r7, #6]
  struct udp_pcb *pcb;

again:
  if (udp_port++ == UDP_LOCAL_PORT_RANGE_END) {
 8020a2e:	4b17      	ldr	r3, [pc, #92]	@ (8020a8c <udp_new_port+0x68>)
 8020a30:	881b      	ldrh	r3, [r3, #0]
 8020a32:	1c5a      	adds	r2, r3, #1
 8020a34:	b291      	uxth	r1, r2
 8020a36:	4a15      	ldr	r2, [pc, #84]	@ (8020a8c <udp_new_port+0x68>)
 8020a38:	8011      	strh	r1, [r2, #0]
 8020a3a:	f64f 72ff 	movw	r2, #65535	@ 0xffff
 8020a3e:	4293      	cmp	r3, r2
 8020a40:	d103      	bne.n	8020a4a <udp_new_port+0x26>
    udp_port = UDP_LOCAL_PORT_RANGE_START;
 8020a42:	4b12      	ldr	r3, [pc, #72]	@ (8020a8c <udp_new_port+0x68>)
 8020a44:	f44f 4240 	mov.w	r2, #49152	@ 0xc000
 8020a48:	801a      	strh	r2, [r3, #0]
  }
  /* Check all PCBs. */
  for (pcb = udp_pcbs; pcb != NULL; pcb = pcb->next) {
 8020a4a:	4b11      	ldr	r3, [pc, #68]	@ (8020a90 <udp_new_port+0x6c>)
 8020a4c:	681b      	ldr	r3, [r3, #0]
 8020a4e:	603b      	str	r3, [r7, #0]
 8020a50:	e011      	b.n	8020a76 <udp_new_port+0x52>
    if (pcb->local_port == udp_port) {
 8020a52:	683b      	ldr	r3, [r7, #0]
 8020a54:	8a5a      	ldrh	r2, [r3, #18]
 8020a56:	4b0d      	ldr	r3, [pc, #52]	@ (8020a8c <udp_new_port+0x68>)
 8020a58:	881b      	ldrh	r3, [r3, #0]
 8020a5a:	429a      	cmp	r2, r3
 8020a5c:	d108      	bne.n	8020a70 <udp_new_port+0x4c>
      if (++n > (UDP_LOCAL_PORT_RANGE_END - UDP_LOCAL_PORT_RANGE_START)) {
 8020a5e:	88fb      	ldrh	r3, [r7, #6]
 8020a60:	3301      	adds	r3, #1
 8020a62:	80fb      	strh	r3, [r7, #6]
 8020a64:	88fb      	ldrh	r3, [r7, #6]
 8020a66:	f5b3 4f80 	cmp.w	r3, #16384	@ 0x4000
 8020a6a:	d3e0      	bcc.n	8020a2e <udp_new_port+0xa>
        return 0;
 8020a6c:	2300      	movs	r3, #0
 8020a6e:	e007      	b.n	8020a80 <udp_new_port+0x5c>
  for (pcb = udp_pcbs; pcb != NULL; pcb = pcb->next) {
 8020a70:	683b      	ldr	r3, [r7, #0]
 8020a72:	68db      	ldr	r3, [r3, #12]
 8020a74:	603b      	str	r3, [r7, #0]
 8020a76:	683b      	ldr	r3, [r7, #0]
 8020a78:	2b00      	cmp	r3, #0
 8020a7a:	d1ea      	bne.n	8020a52 <udp_new_port+0x2e>
      }
      goto again;
    }
  }
  return udp_port;
 8020a7c:	4b03      	ldr	r3, [pc, #12]	@ (8020a8c <udp_new_port+0x68>)
 8020a7e:	881b      	ldrh	r3, [r3, #0]
}
 8020a80:	4618      	mov	r0, r3
 8020a82:	370c      	adds	r7, #12
 8020a84:	46bd      	mov	sp, r7
 8020a86:	f85d 7b04 	ldr.w	r7, [sp], #4
 8020a8a:	4770      	bx	lr
 8020a8c:	24000040 	.word	0x24000040
 8020a90:	2402a04c 	.word	0x2402a04c

08020a94 <udp_input_local_match>:
 * @param broadcast 1 if his is an IPv4 broadcast (global or subnet-only), 0 otherwise (only used for IPv4)
 * @return 1 on match, 0 otherwise
 */
static u8_t
udp_input_local_match(struct udp_pcb *pcb, struct netif *inp, u8_t broadcast)
{
 8020a94:	b580      	push	{r7, lr}
 8020a96:	b084      	sub	sp, #16
 8020a98:	af00      	add	r7, sp, #0
 8020a9a:	60f8      	str	r0, [r7, #12]
 8020a9c:	60b9      	str	r1, [r7, #8]
 8020a9e:	4613      	mov	r3, r2
 8020aa0:	71fb      	strb	r3, [r7, #7]
  LWIP_UNUSED_ARG(inp);       /* in IPv6 only case */
  LWIP_UNUSED_ARG(broadcast); /* in IPv6 only case */

  LWIP_ASSERT("udp_input_local_match: invalid pcb", pcb != NULL);
 8020aa2:	68fb      	ldr	r3, [r7, #12]
 8020aa4:	2b00      	cmp	r3, #0
 8020aa6:	d105      	bne.n	8020ab4 <udp_input_local_match+0x20>
 8020aa8:	4b27      	ldr	r3, [pc, #156]	@ (8020b48 <udp_input_local_match+0xb4>)
 8020aaa:	2287      	movs	r2, #135	@ 0x87
 8020aac:	4927      	ldr	r1, [pc, #156]	@ (8020b4c <udp_input_local_match+0xb8>)
 8020aae:	4828      	ldr	r0, [pc, #160]	@ (8020b50 <udp_input_local_match+0xbc>)
 8020ab0:	f008 fd2c 	bl	802950c <iprintf>
  LWIP_ASSERT("udp_input_local_match: invalid netif", inp != NULL);
 8020ab4:	68bb      	ldr	r3, [r7, #8]
 8020ab6:	2b00      	cmp	r3, #0
 8020ab8:	d105      	bne.n	8020ac6 <udp_input_local_match+0x32>
 8020aba:	4b23      	ldr	r3, [pc, #140]	@ (8020b48 <udp_input_local_match+0xb4>)
 8020abc:	2288      	movs	r2, #136	@ 0x88
 8020abe:	4925      	ldr	r1, [pc, #148]	@ (8020b54 <udp_input_local_match+0xc0>)
 8020ac0:	4823      	ldr	r0, [pc, #140]	@ (8020b50 <udp_input_local_match+0xbc>)
 8020ac2:	f008 fd23 	bl	802950c <iprintf>

  /* check if PCB is bound to specific netif */
  if ((pcb->netif_idx != NETIF_NO_INDEX) &&
 8020ac6:	68fb      	ldr	r3, [r7, #12]
 8020ac8:	7a1b      	ldrb	r3, [r3, #8]
 8020aca:	2b00      	cmp	r3, #0
 8020acc:	d00b      	beq.n	8020ae6 <udp_input_local_match+0x52>
      (pcb->netif_idx != netif_get_index(ip_data.current_input_netif))) {
 8020ace:	68fb      	ldr	r3, [r7, #12]
 8020ad0:	7a1a      	ldrb	r2, [r3, #8]
 8020ad2:	4b21      	ldr	r3, [pc, #132]	@ (8020b58 <udp_input_local_match+0xc4>)
 8020ad4:	685b      	ldr	r3, [r3, #4]
 8020ad6:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 8020ada:	3301      	adds	r3, #1
 8020adc:	b2db      	uxtb	r3, r3
  if ((pcb->netif_idx != NETIF_NO_INDEX) &&
 8020ade:	429a      	cmp	r2, r3
 8020ae0:	d001      	beq.n	8020ae6 <udp_input_local_match+0x52>
    return 0;
 8020ae2:	2300      	movs	r3, #0
 8020ae4:	e02b      	b.n	8020b3e <udp_input_local_match+0xaa>
  /* Only need to check PCB if incoming IP version matches PCB IP version */
  if (IP_ADDR_PCB_VERSION_MATCH_EXACT(pcb, ip_current_dest_addr())) {
#if LWIP_IPV4
    /* Special case: IPv4 broadcast: all or broadcasts in my subnet
     * Note: broadcast variable can only be 1 if it is an IPv4 broadcast */
    if (broadcast != 0) {
 8020ae6:	79fb      	ldrb	r3, [r7, #7]
 8020ae8:	2b00      	cmp	r3, #0
 8020aea:	d018      	beq.n	8020b1e <udp_input_local_match+0x8a>
#if IP_SOF_BROADCAST_RECV
      if (ip_get_option(pcb, SOF_BROADCAST))
#endif /* IP_SOF_BROADCAST_RECV */
      {
        if (ip4_addr_isany(ip_2_ip4(&pcb->local_ip)) ||
 8020aec:	68fb      	ldr	r3, [r7, #12]
 8020aee:	2b00      	cmp	r3, #0
 8020af0:	d013      	beq.n	8020b1a <udp_input_local_match+0x86>
 8020af2:	68fb      	ldr	r3, [r7, #12]
 8020af4:	681b      	ldr	r3, [r3, #0]
 8020af6:	2b00      	cmp	r3, #0
 8020af8:	d00f      	beq.n	8020b1a <udp_input_local_match+0x86>
            ((ip4_current_dest_addr()->addr == IPADDR_BROADCAST)) ||
 8020afa:	4b17      	ldr	r3, [pc, #92]	@ (8020b58 <udp_input_local_match+0xc4>)
 8020afc:	695b      	ldr	r3, [r3, #20]
        if (ip4_addr_isany(ip_2_ip4(&pcb->local_ip)) ||
 8020afe:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8020b02:	d00a      	beq.n	8020b1a <udp_input_local_match+0x86>
            ip4_addr_netcmp(ip_2_ip4(&pcb->local_ip), ip4_current_dest_addr(), netif_ip4_netmask(inp))) {
 8020b04:	68fb      	ldr	r3, [r7, #12]
 8020b06:	681a      	ldr	r2, [r3, #0]
 8020b08:	4b13      	ldr	r3, [pc, #76]	@ (8020b58 <udp_input_local_match+0xc4>)
 8020b0a:	695b      	ldr	r3, [r3, #20]
 8020b0c:	405a      	eors	r2, r3
 8020b0e:	68bb      	ldr	r3, [r7, #8]
 8020b10:	3308      	adds	r3, #8
 8020b12:	681b      	ldr	r3, [r3, #0]
 8020b14:	4013      	ands	r3, r2
            ((ip4_current_dest_addr()->addr == IPADDR_BROADCAST)) ||
 8020b16:	2b00      	cmp	r3, #0
 8020b18:	d110      	bne.n	8020b3c <udp_input_local_match+0xa8>
          return 1;
 8020b1a:	2301      	movs	r3, #1
 8020b1c:	e00f      	b.n	8020b3e <udp_input_local_match+0xaa>
        }
      }
    } else
#endif /* LWIP_IPV4 */
      /* Handle IPv4 and IPv6: all or exact match */
      if (ip_addr_isany(&pcb->local_ip) || ip_addr_cmp(&pcb->local_ip, ip_current_dest_addr())) {
 8020b1e:	68fb      	ldr	r3, [r7, #12]
 8020b20:	2b00      	cmp	r3, #0
 8020b22:	d009      	beq.n	8020b38 <udp_input_local_match+0xa4>
 8020b24:	68fb      	ldr	r3, [r7, #12]
 8020b26:	681b      	ldr	r3, [r3, #0]
 8020b28:	2b00      	cmp	r3, #0
 8020b2a:	d005      	beq.n	8020b38 <udp_input_local_match+0xa4>
 8020b2c:	68fb      	ldr	r3, [r7, #12]
 8020b2e:	681a      	ldr	r2, [r3, #0]
 8020b30:	4b09      	ldr	r3, [pc, #36]	@ (8020b58 <udp_input_local_match+0xc4>)
 8020b32:	695b      	ldr	r3, [r3, #20]
 8020b34:	429a      	cmp	r2, r3
 8020b36:	d101      	bne.n	8020b3c <udp_input_local_match+0xa8>
        return 1;
 8020b38:	2301      	movs	r3, #1
 8020b3a:	e000      	b.n	8020b3e <udp_input_local_match+0xaa>
      }
  }

  return 0;
 8020b3c:	2300      	movs	r3, #0
}
 8020b3e:	4618      	mov	r0, r3
 8020b40:	3710      	adds	r7, #16
 8020b42:	46bd      	mov	sp, r7
 8020b44:	bd80      	pop	{r7, pc}
 8020b46:	bf00      	nop
 8020b48:	0802f684 	.word	0x0802f684
 8020b4c:	0802f6b4 	.word	0x0802f6b4
 8020b50:	0802f6d8 	.word	0x0802f6d8
 8020b54:	0802f700 	.word	0x0802f700
 8020b58:	2402349c 	.word	0x2402349c

08020b5c <udp_input>:
 * @param inp network interface on which the datagram was received.
 *
 */
void
udp_input(struct pbuf *p, struct netif *inp)
{
 8020b5c:	b590      	push	{r4, r7, lr}
 8020b5e:	b08d      	sub	sp, #52	@ 0x34
 8020b60:	af02      	add	r7, sp, #8
 8020b62:	6078      	str	r0, [r7, #4]
 8020b64:	6039      	str	r1, [r7, #0]
  struct udp_hdr *udphdr;
  struct udp_pcb *pcb, *prev;
  struct udp_pcb *uncon_pcb;
  u16_t src, dest;
  u8_t broadcast;
  u8_t for_us = 0;
 8020b66:	2300      	movs	r3, #0
 8020b68:	77fb      	strb	r3, [r7, #31]

  LWIP_UNUSED_ARG(inp);

  LWIP_ASSERT_CORE_LOCKED();
 8020b6a:	f7ef fa81 	bl	8010070 <sys_check_core_locking>

  LWIP_ASSERT("udp_input: invalid pbuf", p != NULL);
 8020b6e:	687b      	ldr	r3, [r7, #4]
 8020b70:	2b00      	cmp	r3, #0
 8020b72:	d105      	bne.n	8020b80 <udp_input+0x24>
 8020b74:	4b7c      	ldr	r3, [pc, #496]	@ (8020d68 <udp_input+0x20c>)
 8020b76:	22cf      	movs	r2, #207	@ 0xcf
 8020b78:	497c      	ldr	r1, [pc, #496]	@ (8020d6c <udp_input+0x210>)
 8020b7a:	487d      	ldr	r0, [pc, #500]	@ (8020d70 <udp_input+0x214>)
 8020b7c:	f008 fcc6 	bl	802950c <iprintf>
  LWIP_ASSERT("udp_input: invalid netif", inp != NULL);
 8020b80:	683b      	ldr	r3, [r7, #0]
 8020b82:	2b00      	cmp	r3, #0
 8020b84:	d105      	bne.n	8020b92 <udp_input+0x36>
 8020b86:	4b78      	ldr	r3, [pc, #480]	@ (8020d68 <udp_input+0x20c>)
 8020b88:	22d0      	movs	r2, #208	@ 0xd0
 8020b8a:	497a      	ldr	r1, [pc, #488]	@ (8020d74 <udp_input+0x218>)
 8020b8c:	4878      	ldr	r0, [pc, #480]	@ (8020d70 <udp_input+0x214>)
 8020b8e:	f008 fcbd 	bl	802950c <iprintf>
  PERF_START;

  UDP_STATS_INC(udp.recv);

  /* Check minimum length (UDP header) */
  if (p->len < UDP_HLEN) {
 8020b92:	687b      	ldr	r3, [r7, #4]
 8020b94:	895b      	ldrh	r3, [r3, #10]
 8020b96:	2b07      	cmp	r3, #7
 8020b98:	d803      	bhi.n	8020ba2 <udp_input+0x46>
    LWIP_DEBUGF(UDP_DEBUG,
                ("udp_input: short UDP datagram (%"U16_F" bytes) discarded\n", p->tot_len));
    UDP_STATS_INC(udp.lenerr);
    UDP_STATS_INC(udp.drop);
    MIB2_STATS_INC(mib2.udpinerrors);
    pbuf_free(p);
 8020b9a:	6878      	ldr	r0, [r7, #4]
 8020b9c:	f7f9 fa3e 	bl	801a01c <pbuf_free>
    goto end;
 8020ba0:	e0de      	b.n	8020d60 <udp_input+0x204>
  }

  udphdr = (struct udp_hdr *)p->payload;
 8020ba2:	687b      	ldr	r3, [r7, #4]
 8020ba4:	685b      	ldr	r3, [r3, #4]
 8020ba6:	617b      	str	r3, [r7, #20]

  /* is broadcast packet ? */
  broadcast = ip_addr_isbroadcast(ip_current_dest_addr(), ip_current_netif());
 8020ba8:	4b73      	ldr	r3, [pc, #460]	@ (8020d78 <udp_input+0x21c>)
 8020baa:	695b      	ldr	r3, [r3, #20]
 8020bac:	4a72      	ldr	r2, [pc, #456]	@ (8020d78 <udp_input+0x21c>)
 8020bae:	6812      	ldr	r2, [r2, #0]
 8020bb0:	4611      	mov	r1, r2
 8020bb2:	4618      	mov	r0, r3
 8020bb4:	f003 ff54 	bl	8024a60 <ip4_addr_isbroadcast_u32>
 8020bb8:	4603      	mov	r3, r0
 8020bba:	74fb      	strb	r3, [r7, #19]

  LWIP_DEBUGF(UDP_DEBUG, ("udp_input: received datagram of length %"U16_F"\n", p->tot_len));

  /* convert src and dest ports to host byte order */
  src = lwip_ntohs(udphdr->src);
 8020bbc:	697b      	ldr	r3, [r7, #20]
 8020bbe:	881b      	ldrh	r3, [r3, #0]
 8020bc0:	b29b      	uxth	r3, r3
 8020bc2:	4618      	mov	r0, r3
 8020bc4:	f7f7 fd48 	bl	8018658 <lwip_htons>
 8020bc8:	4603      	mov	r3, r0
 8020bca:	823b      	strh	r3, [r7, #16]
  dest = lwip_ntohs(udphdr->dest);
 8020bcc:	697b      	ldr	r3, [r7, #20]
 8020bce:	885b      	ldrh	r3, [r3, #2]
 8020bd0:	b29b      	uxth	r3, r3
 8020bd2:	4618      	mov	r0, r3
 8020bd4:	f7f7 fd40 	bl	8018658 <lwip_htons>
 8020bd8:	4603      	mov	r3, r0
 8020bda:	81fb      	strh	r3, [r7, #14]
  ip_addr_debug_print_val(UDP_DEBUG, *ip_current_dest_addr());
  LWIP_DEBUGF(UDP_DEBUG, (", %"U16_F") <-- (", lwip_ntohs(udphdr->dest)));
  ip_addr_debug_print_val(UDP_DEBUG, *ip_current_src_addr());
  LWIP_DEBUGF(UDP_DEBUG, (", %"U16_F")\n", lwip_ntohs(udphdr->src)));

  pcb = NULL;
 8020bdc:	2300      	movs	r3, #0
 8020bde:	623b      	str	r3, [r7, #32]
  prev = NULL;
 8020be0:	2300      	movs	r3, #0
 8020be2:	627b      	str	r3, [r7, #36]	@ 0x24
  uncon_pcb = NULL;
 8020be4:	2300      	movs	r3, #0
 8020be6:	61bb      	str	r3, [r7, #24]
  /* Iterate through the UDP pcb list for a matching pcb.
   * 'Perfect match' pcbs (connected to the remote port & ip address) are
   * preferred. If no perfect match is found, the first unconnected pcb that
   * matches the local port and ip address gets the datagram. */
  for (pcb = udp_pcbs; pcb != NULL; pcb = pcb->next) {
 8020be8:	4b64      	ldr	r3, [pc, #400]	@ (8020d7c <udp_input+0x220>)
 8020bea:	681b      	ldr	r3, [r3, #0]
 8020bec:	623b      	str	r3, [r7, #32]
 8020bee:	e054      	b.n	8020c9a <udp_input+0x13e>
    LWIP_DEBUGF(UDP_DEBUG, (", %"U16_F") <-- (", pcb->local_port));
    ip_addr_debug_print_val(UDP_DEBUG, pcb->remote_ip);
    LWIP_DEBUGF(UDP_DEBUG, (", %"U16_F")\n", pcb->remote_port));

    /* compare PCB local addr+port to UDP destination addr+port */
    if ((pcb->local_port == dest) &&
 8020bf0:	6a3b      	ldr	r3, [r7, #32]
 8020bf2:	8a5b      	ldrh	r3, [r3, #18]
 8020bf4:	89fa      	ldrh	r2, [r7, #14]
 8020bf6:	429a      	cmp	r2, r3
 8020bf8:	d14a      	bne.n	8020c90 <udp_input+0x134>
        (udp_input_local_match(pcb, inp, broadcast) != 0)) {
 8020bfa:	7cfb      	ldrb	r3, [r7, #19]
 8020bfc:	461a      	mov	r2, r3
 8020bfe:	6839      	ldr	r1, [r7, #0]
 8020c00:	6a38      	ldr	r0, [r7, #32]
 8020c02:	f7ff ff47 	bl	8020a94 <udp_input_local_match>
 8020c06:	4603      	mov	r3, r0
    if ((pcb->local_port == dest) &&
 8020c08:	2b00      	cmp	r3, #0
 8020c0a:	d041      	beq.n	8020c90 <udp_input+0x134>
      if ((pcb->flags & UDP_FLAGS_CONNECTED) == 0) {
 8020c0c:	6a3b      	ldr	r3, [r7, #32]
 8020c0e:	7c1b      	ldrb	r3, [r3, #16]
 8020c10:	f003 0304 	and.w	r3, r3, #4
 8020c14:	2b00      	cmp	r3, #0
 8020c16:	d11d      	bne.n	8020c54 <udp_input+0xf8>
        if (uncon_pcb == NULL) {
 8020c18:	69bb      	ldr	r3, [r7, #24]
 8020c1a:	2b00      	cmp	r3, #0
 8020c1c:	d102      	bne.n	8020c24 <udp_input+0xc8>
          /* the first unconnected matching PCB */
          uncon_pcb = pcb;
 8020c1e:	6a3b      	ldr	r3, [r7, #32]
 8020c20:	61bb      	str	r3, [r7, #24]
 8020c22:	e017      	b.n	8020c54 <udp_input+0xf8>
#if LWIP_IPV4
        } else if (broadcast && ip4_current_dest_addr()->addr == IPADDR_BROADCAST) {
 8020c24:	7cfb      	ldrb	r3, [r7, #19]
 8020c26:	2b00      	cmp	r3, #0
 8020c28:	d014      	beq.n	8020c54 <udp_input+0xf8>
 8020c2a:	4b53      	ldr	r3, [pc, #332]	@ (8020d78 <udp_input+0x21c>)
 8020c2c:	695b      	ldr	r3, [r3, #20]
 8020c2e:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8020c32:	d10f      	bne.n	8020c54 <udp_input+0xf8>
          /* global broadcast address (only valid for IPv4; match was checked before) */
          if (!IP_IS_V4_VAL(uncon_pcb->local_ip) || !ip4_addr_cmp(ip_2_ip4(&uncon_pcb->local_ip), netif_ip4_addr(inp))) {
 8020c34:	69bb      	ldr	r3, [r7, #24]
 8020c36:	681a      	ldr	r2, [r3, #0]
 8020c38:	683b      	ldr	r3, [r7, #0]
 8020c3a:	3304      	adds	r3, #4
 8020c3c:	681b      	ldr	r3, [r3, #0]
 8020c3e:	429a      	cmp	r2, r3
 8020c40:	d008      	beq.n	8020c54 <udp_input+0xf8>
            /* uncon_pcb does not match the input netif, check this pcb */
            if (IP_IS_V4_VAL(pcb->local_ip) && ip4_addr_cmp(ip_2_ip4(&pcb->local_ip), netif_ip4_addr(inp))) {
 8020c42:	6a3b      	ldr	r3, [r7, #32]
 8020c44:	681a      	ldr	r2, [r3, #0]
 8020c46:	683b      	ldr	r3, [r7, #0]
 8020c48:	3304      	adds	r3, #4
 8020c4a:	681b      	ldr	r3, [r3, #0]
 8020c4c:	429a      	cmp	r2, r3
 8020c4e:	d101      	bne.n	8020c54 <udp_input+0xf8>
              /* better match */
              uncon_pcb = pcb;
 8020c50:	6a3b      	ldr	r3, [r7, #32]
 8020c52:	61bb      	str	r3, [r7, #24]
        }
#endif /* SO_REUSE */
      }

      /* compare PCB remote addr+port to UDP source addr+port */
      if ((pcb->remote_port == src) &&
 8020c54:	6a3b      	ldr	r3, [r7, #32]
 8020c56:	8a9b      	ldrh	r3, [r3, #20]
 8020c58:	8a3a      	ldrh	r2, [r7, #16]
 8020c5a:	429a      	cmp	r2, r3
 8020c5c:	d118      	bne.n	8020c90 <udp_input+0x134>
          (ip_addr_isany_val(pcb->remote_ip) ||
 8020c5e:	6a3b      	ldr	r3, [r7, #32]
 8020c60:	685b      	ldr	r3, [r3, #4]
      if ((pcb->remote_port == src) &&
 8020c62:	2b00      	cmp	r3, #0
 8020c64:	d005      	beq.n	8020c72 <udp_input+0x116>
           ip_addr_cmp(&pcb->remote_ip, ip_current_src_addr()))) {
 8020c66:	6a3b      	ldr	r3, [r7, #32]
 8020c68:	685a      	ldr	r2, [r3, #4]
 8020c6a:	4b43      	ldr	r3, [pc, #268]	@ (8020d78 <udp_input+0x21c>)
 8020c6c:	691b      	ldr	r3, [r3, #16]
          (ip_addr_isany_val(pcb->remote_ip) ||
 8020c6e:	429a      	cmp	r2, r3
 8020c70:	d10e      	bne.n	8020c90 <udp_input+0x134>
        /* the first fully matching PCB */
        if (prev != NULL) {
 8020c72:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8020c74:	2b00      	cmp	r3, #0
 8020c76:	d014      	beq.n	8020ca2 <udp_input+0x146>
          /* move the pcb to the front of udp_pcbs so that is
             found faster next time */
          prev->next = pcb->next;
 8020c78:	6a3b      	ldr	r3, [r7, #32]
 8020c7a:	68da      	ldr	r2, [r3, #12]
 8020c7c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8020c7e:	60da      	str	r2, [r3, #12]
          pcb->next = udp_pcbs;
 8020c80:	4b3e      	ldr	r3, [pc, #248]	@ (8020d7c <udp_input+0x220>)
 8020c82:	681a      	ldr	r2, [r3, #0]
 8020c84:	6a3b      	ldr	r3, [r7, #32]
 8020c86:	60da      	str	r2, [r3, #12]
          udp_pcbs = pcb;
 8020c88:	4a3c      	ldr	r2, [pc, #240]	@ (8020d7c <udp_input+0x220>)
 8020c8a:	6a3b      	ldr	r3, [r7, #32]
 8020c8c:	6013      	str	r3, [r2, #0]
        } else {
          UDP_STATS_INC(udp.cachehit);
        }
        break;
 8020c8e:	e008      	b.n	8020ca2 <udp_input+0x146>
      }
    }

    prev = pcb;
 8020c90:	6a3b      	ldr	r3, [r7, #32]
 8020c92:	627b      	str	r3, [r7, #36]	@ 0x24
  for (pcb = udp_pcbs; pcb != NULL; pcb = pcb->next) {
 8020c94:	6a3b      	ldr	r3, [r7, #32]
 8020c96:	68db      	ldr	r3, [r3, #12]
 8020c98:	623b      	str	r3, [r7, #32]
 8020c9a:	6a3b      	ldr	r3, [r7, #32]
 8020c9c:	2b00      	cmp	r3, #0
 8020c9e:	d1a7      	bne.n	8020bf0 <udp_input+0x94>
 8020ca0:	e000      	b.n	8020ca4 <udp_input+0x148>
        break;
 8020ca2:	bf00      	nop
  }
  /* no fully matching pcb found? then look for an unconnected pcb */
  if (pcb == NULL) {
 8020ca4:	6a3b      	ldr	r3, [r7, #32]
 8020ca6:	2b00      	cmp	r3, #0
 8020ca8:	d101      	bne.n	8020cae <udp_input+0x152>
    pcb = uncon_pcb;
 8020caa:	69bb      	ldr	r3, [r7, #24]
 8020cac:	623b      	str	r3, [r7, #32]
  }

  /* Check checksum if this is a match or if it was directed at us. */
  if (pcb != NULL) {
 8020cae:	6a3b      	ldr	r3, [r7, #32]
 8020cb0:	2b00      	cmp	r3, #0
 8020cb2:	d002      	beq.n	8020cba <udp_input+0x15e>
    for_us = 1;
 8020cb4:	2301      	movs	r3, #1
 8020cb6:	77fb      	strb	r3, [r7, #31]
 8020cb8:	e00a      	b.n	8020cd0 <udp_input+0x174>
      for_us = netif_get_ip6_addr_match(inp, ip6_current_dest_addr()) >= 0;
    }
#endif /* LWIP_IPV6 */
#if LWIP_IPV4
    if (!ip_current_is_v6()) {
      for_us = ip4_addr_cmp(netif_ip4_addr(inp), ip4_current_dest_addr());
 8020cba:	683b      	ldr	r3, [r7, #0]
 8020cbc:	3304      	adds	r3, #4
 8020cbe:	681a      	ldr	r2, [r3, #0]
 8020cc0:	4b2d      	ldr	r3, [pc, #180]	@ (8020d78 <udp_input+0x21c>)
 8020cc2:	695b      	ldr	r3, [r3, #20]
 8020cc4:	429a      	cmp	r2, r3
 8020cc6:	bf0c      	ite	eq
 8020cc8:	2301      	moveq	r3, #1
 8020cca:	2300      	movne	r3, #0
 8020ccc:	b2db      	uxtb	r3, r3
 8020cce:	77fb      	strb	r3, [r7, #31]
    }
#endif /* LWIP_IPV4 */
  }

  if (for_us) {
 8020cd0:	7ffb      	ldrb	r3, [r7, #31]
 8020cd2:	2b00      	cmp	r3, #0
 8020cd4:	d041      	beq.n	8020d5a <udp_input+0x1fe>
          }
        }
      }
    }
#endif /* CHECKSUM_CHECK_UDP */
    if (pbuf_remove_header(p, UDP_HLEN)) {
 8020cd6:	2108      	movs	r1, #8
 8020cd8:	6878      	ldr	r0, [r7, #4]
 8020cda:	f7f9 f8e7 	bl	8019eac <pbuf_remove_header>
 8020cde:	4603      	mov	r3, r0
 8020ce0:	2b00      	cmp	r3, #0
 8020ce2:	d00a      	beq.n	8020cfa <udp_input+0x19e>
      /* Can we cope with this failing? Just assert for now */
      LWIP_ASSERT("pbuf_remove_header failed\n", 0);
 8020ce4:	4b20      	ldr	r3, [pc, #128]	@ (8020d68 <udp_input+0x20c>)
 8020ce6:	f44f 72b8 	mov.w	r2, #368	@ 0x170
 8020cea:	4925      	ldr	r1, [pc, #148]	@ (8020d80 <udp_input+0x224>)
 8020cec:	4820      	ldr	r0, [pc, #128]	@ (8020d70 <udp_input+0x214>)
 8020cee:	f008 fc0d 	bl	802950c <iprintf>
      UDP_STATS_INC(udp.drop);
      MIB2_STATS_INC(mib2.udpinerrors);
      pbuf_free(p);
 8020cf2:	6878      	ldr	r0, [r7, #4]
 8020cf4:	f7f9 f992 	bl	801a01c <pbuf_free>
      goto end;
 8020cf8:	e032      	b.n	8020d60 <udp_input+0x204>
    }

    if (pcb != NULL) {
 8020cfa:	6a3b      	ldr	r3, [r7, #32]
 8020cfc:	2b00      	cmp	r3, #0
 8020cfe:	d012      	beq.n	8020d26 <udp_input+0x1ca>
          }
        }
      }
#endif /* SO_REUSE && SO_REUSE_RXTOALL */
      /* callback */
      if (pcb->recv != NULL) {
 8020d00:	6a3b      	ldr	r3, [r7, #32]
 8020d02:	699b      	ldr	r3, [r3, #24]
 8020d04:	2b00      	cmp	r3, #0
 8020d06:	d00a      	beq.n	8020d1e <udp_input+0x1c2>
        /* now the recv function is responsible for freeing p */
        pcb->recv(pcb->recv_arg, pcb, p, ip_current_src_addr(), src);
 8020d08:	6a3b      	ldr	r3, [r7, #32]
 8020d0a:	699c      	ldr	r4, [r3, #24]
 8020d0c:	6a3b      	ldr	r3, [r7, #32]
 8020d0e:	69d8      	ldr	r0, [r3, #28]
 8020d10:	8a3b      	ldrh	r3, [r7, #16]
 8020d12:	9300      	str	r3, [sp, #0]
 8020d14:	4b1b      	ldr	r3, [pc, #108]	@ (8020d84 <udp_input+0x228>)
 8020d16:	687a      	ldr	r2, [r7, #4]
 8020d18:	6a39      	ldr	r1, [r7, #32]
 8020d1a:	47a0      	blx	r4
  } else {
    pbuf_free(p);
  }
end:
  PERF_STOP("udp_input");
  return;
 8020d1c:	e021      	b.n	8020d62 <udp_input+0x206>
        pbuf_free(p);
 8020d1e:	6878      	ldr	r0, [r7, #4]
 8020d20:	f7f9 f97c 	bl	801a01c <pbuf_free>
        goto end;
 8020d24:	e01c      	b.n	8020d60 <udp_input+0x204>
      if (!broadcast && !ip_addr_ismulticast(ip_current_dest_addr())) {
 8020d26:	7cfb      	ldrb	r3, [r7, #19]
 8020d28:	2b00      	cmp	r3, #0
 8020d2a:	d112      	bne.n	8020d52 <udp_input+0x1f6>
 8020d2c:	4b12      	ldr	r3, [pc, #72]	@ (8020d78 <udp_input+0x21c>)
 8020d2e:	695b      	ldr	r3, [r3, #20]
 8020d30:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8020d34:	2be0      	cmp	r3, #224	@ 0xe0
 8020d36:	d00c      	beq.n	8020d52 <udp_input+0x1f6>
        pbuf_header_force(p, (s16_t)(ip_current_header_tot_len() + UDP_HLEN));
 8020d38:	4b0f      	ldr	r3, [pc, #60]	@ (8020d78 <udp_input+0x21c>)
 8020d3a:	899b      	ldrh	r3, [r3, #12]
 8020d3c:	3308      	adds	r3, #8
 8020d3e:	b29b      	uxth	r3, r3
 8020d40:	b21b      	sxth	r3, r3
 8020d42:	4619      	mov	r1, r3
 8020d44:	6878      	ldr	r0, [r7, #4]
 8020d46:	f7f9 f924 	bl	8019f92 <pbuf_header_force>
        icmp_port_unreach(ip_current_is_v6(), p);
 8020d4a:	2103      	movs	r1, #3
 8020d4c:	6878      	ldr	r0, [r7, #4]
 8020d4e:	f003 fb3b 	bl	80243c8 <icmp_dest_unreach>
      pbuf_free(p);
 8020d52:	6878      	ldr	r0, [r7, #4]
 8020d54:	f7f9 f962 	bl	801a01c <pbuf_free>
  return;
 8020d58:	e003      	b.n	8020d62 <udp_input+0x206>
    pbuf_free(p);
 8020d5a:	6878      	ldr	r0, [r7, #4]
 8020d5c:	f7f9 f95e 	bl	801a01c <pbuf_free>
  return;
 8020d60:	bf00      	nop
  UDP_STATS_INC(udp.drop);
  MIB2_STATS_INC(mib2.udpinerrors);
  pbuf_free(p);
  PERF_STOP("udp_input");
#endif /* CHECKSUM_CHECK_UDP */
}
 8020d62:	372c      	adds	r7, #44	@ 0x2c
 8020d64:	46bd      	mov	sp, r7
 8020d66:	bd90      	pop	{r4, r7, pc}
 8020d68:	0802f684 	.word	0x0802f684
 8020d6c:	0802f728 	.word	0x0802f728
 8020d70:	0802f6d8 	.word	0x0802f6d8
 8020d74:	0802f740 	.word	0x0802f740
 8020d78:	2402349c 	.word	0x2402349c
 8020d7c:	2402a04c 	.word	0x2402a04c
 8020d80:	0802f75c 	.word	0x0802f75c
 8020d84:	240234ac 	.word	0x240234ac

08020d88 <udp_send>:
 *
 * @see udp_disconnect() udp_sendto()
 */
err_t
udp_send(struct udp_pcb *pcb, struct pbuf *p)
{
 8020d88:	b580      	push	{r7, lr}
 8020d8a:	b082      	sub	sp, #8
 8020d8c:	af00      	add	r7, sp, #0
 8020d8e:	6078      	str	r0, [r7, #4]
 8020d90:	6039      	str	r1, [r7, #0]
  LWIP_ERROR("udp_send: invalid pcb", pcb != NULL, return ERR_ARG);
 8020d92:	687b      	ldr	r3, [r7, #4]
 8020d94:	2b00      	cmp	r3, #0
 8020d96:	d109      	bne.n	8020dac <udp_send+0x24>
 8020d98:	4b11      	ldr	r3, [pc, #68]	@ (8020de0 <udp_send+0x58>)
 8020d9a:	f240 12d5 	movw	r2, #469	@ 0x1d5
 8020d9e:	4911      	ldr	r1, [pc, #68]	@ (8020de4 <udp_send+0x5c>)
 8020da0:	4811      	ldr	r0, [pc, #68]	@ (8020de8 <udp_send+0x60>)
 8020da2:	f008 fbb3 	bl	802950c <iprintf>
 8020da6:	f06f 030f 	mvn.w	r3, #15
 8020daa:	e015      	b.n	8020dd8 <udp_send+0x50>
  LWIP_ERROR("udp_send: invalid pbuf", p != NULL, return ERR_ARG);
 8020dac:	683b      	ldr	r3, [r7, #0]
 8020dae:	2b00      	cmp	r3, #0
 8020db0:	d109      	bne.n	8020dc6 <udp_send+0x3e>
 8020db2:	4b0b      	ldr	r3, [pc, #44]	@ (8020de0 <udp_send+0x58>)
 8020db4:	f44f 72eb 	mov.w	r2, #470	@ 0x1d6
 8020db8:	490c      	ldr	r1, [pc, #48]	@ (8020dec <udp_send+0x64>)
 8020dba:	480b      	ldr	r0, [pc, #44]	@ (8020de8 <udp_send+0x60>)
 8020dbc:	f008 fba6 	bl	802950c <iprintf>
 8020dc0:	f06f 030f 	mvn.w	r3, #15
 8020dc4:	e008      	b.n	8020dd8 <udp_send+0x50>
  if (IP_IS_ANY_TYPE_VAL(pcb->remote_ip)) {
    return ERR_VAL;
  }

  /* send to the packet using remote ip and port stored in the pcb */
  return udp_sendto(pcb, p, &pcb->remote_ip, pcb->remote_port);
 8020dc6:	687b      	ldr	r3, [r7, #4]
 8020dc8:	1d1a      	adds	r2, r3, #4
 8020dca:	687b      	ldr	r3, [r7, #4]
 8020dcc:	8a9b      	ldrh	r3, [r3, #20]
 8020dce:	6839      	ldr	r1, [r7, #0]
 8020dd0:	6878      	ldr	r0, [r7, #4]
 8020dd2:	f000 f80d 	bl	8020df0 <udp_sendto>
 8020dd6:	4603      	mov	r3, r0
}
 8020dd8:	4618      	mov	r0, r3
 8020dda:	3708      	adds	r7, #8
 8020ddc:	46bd      	mov	sp, r7
 8020dde:	bd80      	pop	{r7, pc}
 8020de0:	0802f684 	.word	0x0802f684
 8020de4:	0802f778 	.word	0x0802f778
 8020de8:	0802f6d8 	.word	0x0802f6d8
 8020dec:	0802f790 	.word	0x0802f790

08020df0 <udp_sendto>:
 * @see udp_disconnect() udp_send()
 */
err_t
udp_sendto(struct udp_pcb *pcb, struct pbuf *p,
           const ip_addr_t *dst_ip, u16_t dst_port)
{
 8020df0:	b580      	push	{r7, lr}
 8020df2:	b088      	sub	sp, #32
 8020df4:	af02      	add	r7, sp, #8
 8020df6:	60f8      	str	r0, [r7, #12]
 8020df8:	60b9      	str	r1, [r7, #8]
 8020dfa:	607a      	str	r2, [r7, #4]
 8020dfc:	807b      	strh	r3, [r7, #2]
                  u16_t dst_port, u8_t have_chksum, u16_t chksum)
{
#endif /* LWIP_CHECKSUM_ON_COPY && CHECKSUM_GEN_UDP */
  struct netif *netif;

  LWIP_ERROR("udp_sendto: invalid pcb", pcb != NULL, return ERR_ARG);
 8020dfe:	68fb      	ldr	r3, [r7, #12]
 8020e00:	2b00      	cmp	r3, #0
 8020e02:	d109      	bne.n	8020e18 <udp_sendto+0x28>
 8020e04:	4b23      	ldr	r3, [pc, #140]	@ (8020e94 <udp_sendto+0xa4>)
 8020e06:	f44f 7206 	mov.w	r2, #536	@ 0x218
 8020e0a:	4923      	ldr	r1, [pc, #140]	@ (8020e98 <udp_sendto+0xa8>)
 8020e0c:	4823      	ldr	r0, [pc, #140]	@ (8020e9c <udp_sendto+0xac>)
 8020e0e:	f008 fb7d 	bl	802950c <iprintf>
 8020e12:	f06f 030f 	mvn.w	r3, #15
 8020e16:	e038      	b.n	8020e8a <udp_sendto+0x9a>
  LWIP_ERROR("udp_sendto: invalid pbuf", p != NULL, return ERR_ARG);
 8020e18:	68bb      	ldr	r3, [r7, #8]
 8020e1a:	2b00      	cmp	r3, #0
 8020e1c:	d109      	bne.n	8020e32 <udp_sendto+0x42>
 8020e1e:	4b1d      	ldr	r3, [pc, #116]	@ (8020e94 <udp_sendto+0xa4>)
 8020e20:	f240 2219 	movw	r2, #537	@ 0x219
 8020e24:	491e      	ldr	r1, [pc, #120]	@ (8020ea0 <udp_sendto+0xb0>)
 8020e26:	481d      	ldr	r0, [pc, #116]	@ (8020e9c <udp_sendto+0xac>)
 8020e28:	f008 fb70 	bl	802950c <iprintf>
 8020e2c:	f06f 030f 	mvn.w	r3, #15
 8020e30:	e02b      	b.n	8020e8a <udp_sendto+0x9a>
  LWIP_ERROR("udp_sendto: invalid dst_ip", dst_ip != NULL, return ERR_ARG);
 8020e32:	687b      	ldr	r3, [r7, #4]
 8020e34:	2b00      	cmp	r3, #0
 8020e36:	d109      	bne.n	8020e4c <udp_sendto+0x5c>
 8020e38:	4b16      	ldr	r3, [pc, #88]	@ (8020e94 <udp_sendto+0xa4>)
 8020e3a:	f240 221a 	movw	r2, #538	@ 0x21a
 8020e3e:	4919      	ldr	r1, [pc, #100]	@ (8020ea4 <udp_sendto+0xb4>)
 8020e40:	4816      	ldr	r0, [pc, #88]	@ (8020e9c <udp_sendto+0xac>)
 8020e42:	f008 fb63 	bl	802950c <iprintf>
 8020e46:	f06f 030f 	mvn.w	r3, #15
 8020e4a:	e01e      	b.n	8020e8a <udp_sendto+0x9a>
    return ERR_VAL;
  }

  LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE, ("udp_send\n"));

  if (pcb->netif_idx != NETIF_NO_INDEX) {
 8020e4c:	68fb      	ldr	r3, [r7, #12]
 8020e4e:	7a1b      	ldrb	r3, [r3, #8]
 8020e50:	2b00      	cmp	r3, #0
 8020e52:	d006      	beq.n	8020e62 <udp_sendto+0x72>
    netif = netif_get_by_index(pcb->netif_idx);
 8020e54:	68fb      	ldr	r3, [r7, #12]
 8020e56:	7a1b      	ldrb	r3, [r3, #8]
 8020e58:	4618      	mov	r0, r3
 8020e5a:	f7f8 fd1f 	bl	801989c <netif_get_by_index>
 8020e5e:	6178      	str	r0, [r7, #20]
 8020e60:	e003      	b.n	8020e6a <udp_sendto+0x7a>

    if (netif == NULL)
#endif /* LWIP_MULTICAST_TX_OPTIONS */
    {
      /* find the outgoing network interface for this packet */
      netif = ip_route(&pcb->local_ip, dst_ip);
 8020e62:	6878      	ldr	r0, [r7, #4]
 8020e64:	f003 fb44 	bl	80244f0 <ip4_route>
 8020e68:	6178      	str	r0, [r7, #20]
    }
  }

  /* no outgoing network interface could be found? */
  if (netif == NULL) {
 8020e6a:	697b      	ldr	r3, [r7, #20]
 8020e6c:	2b00      	cmp	r3, #0
 8020e6e:	d102      	bne.n	8020e76 <udp_sendto+0x86>
    LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("udp_send: No route to "));
    ip_addr_debug_print(UDP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, dst_ip);
    LWIP_DEBUGF(UDP_DEBUG, ("\n"));
    UDP_STATS_INC(udp.rterr);
    return ERR_RTE;
 8020e70:	f06f 0303 	mvn.w	r3, #3
 8020e74:	e009      	b.n	8020e8a <udp_sendto+0x9a>
  }
#if LWIP_CHECKSUM_ON_COPY && CHECKSUM_GEN_UDP
  return udp_sendto_if_chksum(pcb, p, dst_ip, dst_port, netif, have_chksum, chksum);
#else /* LWIP_CHECKSUM_ON_COPY && CHECKSUM_GEN_UDP */
  return udp_sendto_if(pcb, p, dst_ip, dst_port, netif);
 8020e76:	887a      	ldrh	r2, [r7, #2]
 8020e78:	697b      	ldr	r3, [r7, #20]
 8020e7a:	9300      	str	r3, [sp, #0]
 8020e7c:	4613      	mov	r3, r2
 8020e7e:	687a      	ldr	r2, [r7, #4]
 8020e80:	68b9      	ldr	r1, [r7, #8]
 8020e82:	68f8      	ldr	r0, [r7, #12]
 8020e84:	f000 f810 	bl	8020ea8 <udp_sendto_if>
 8020e88:	4603      	mov	r3, r0
#endif /* LWIP_CHECKSUM_ON_COPY && CHECKSUM_GEN_UDP */
}
 8020e8a:	4618      	mov	r0, r3
 8020e8c:	3718      	adds	r7, #24
 8020e8e:	46bd      	mov	sp, r7
 8020e90:	bd80      	pop	{r7, pc}
 8020e92:	bf00      	nop
 8020e94:	0802f684 	.word	0x0802f684
 8020e98:	0802f7a8 	.word	0x0802f7a8
 8020e9c:	0802f6d8 	.word	0x0802f6d8
 8020ea0:	0802f7c0 	.word	0x0802f7c0
 8020ea4:	0802f7dc 	.word	0x0802f7dc

08020ea8 <udp_sendto_if>:
 * @see udp_disconnect() udp_send()
 */
err_t
udp_sendto_if(struct udp_pcb *pcb, struct pbuf *p,
              const ip_addr_t *dst_ip, u16_t dst_port, struct netif *netif)
{
 8020ea8:	b580      	push	{r7, lr}
 8020eaa:	b088      	sub	sp, #32
 8020eac:	af02      	add	r7, sp, #8
 8020eae:	60f8      	str	r0, [r7, #12]
 8020eb0:	60b9      	str	r1, [r7, #8]
 8020eb2:	607a      	str	r2, [r7, #4]
 8020eb4:	807b      	strh	r3, [r7, #2]
                     u16_t chksum)
{
#endif /* LWIP_CHECKSUM_ON_COPY && CHECKSUM_GEN_UDP */
  const ip_addr_t *src_ip;

  LWIP_ERROR("udp_sendto_if: invalid pcb", pcb != NULL, return ERR_ARG);
 8020eb6:	68fb      	ldr	r3, [r7, #12]
 8020eb8:	2b00      	cmp	r3, #0
 8020eba:	d109      	bne.n	8020ed0 <udp_sendto_if+0x28>
 8020ebc:	4b2e      	ldr	r3, [pc, #184]	@ (8020f78 <udp_sendto_if+0xd0>)
 8020ebe:	f44f 7220 	mov.w	r2, #640	@ 0x280
 8020ec2:	492e      	ldr	r1, [pc, #184]	@ (8020f7c <udp_sendto_if+0xd4>)
 8020ec4:	482e      	ldr	r0, [pc, #184]	@ (8020f80 <udp_sendto_if+0xd8>)
 8020ec6:	f008 fb21 	bl	802950c <iprintf>
 8020eca:	f06f 030f 	mvn.w	r3, #15
 8020ece:	e04f      	b.n	8020f70 <udp_sendto_if+0xc8>
  LWIP_ERROR("udp_sendto_if: invalid pbuf", p != NULL, return ERR_ARG);
 8020ed0:	68bb      	ldr	r3, [r7, #8]
 8020ed2:	2b00      	cmp	r3, #0
 8020ed4:	d109      	bne.n	8020eea <udp_sendto_if+0x42>
 8020ed6:	4b28      	ldr	r3, [pc, #160]	@ (8020f78 <udp_sendto_if+0xd0>)
 8020ed8:	f240 2281 	movw	r2, #641	@ 0x281
 8020edc:	4929      	ldr	r1, [pc, #164]	@ (8020f84 <udp_sendto_if+0xdc>)
 8020ede:	4828      	ldr	r0, [pc, #160]	@ (8020f80 <udp_sendto_if+0xd8>)
 8020ee0:	f008 fb14 	bl	802950c <iprintf>
 8020ee4:	f06f 030f 	mvn.w	r3, #15
 8020ee8:	e042      	b.n	8020f70 <udp_sendto_if+0xc8>
  LWIP_ERROR("udp_sendto_if: invalid dst_ip", dst_ip != NULL, return ERR_ARG);
 8020eea:	687b      	ldr	r3, [r7, #4]
 8020eec:	2b00      	cmp	r3, #0
 8020eee:	d109      	bne.n	8020f04 <udp_sendto_if+0x5c>
 8020ef0:	4b21      	ldr	r3, [pc, #132]	@ (8020f78 <udp_sendto_if+0xd0>)
 8020ef2:	f240 2282 	movw	r2, #642	@ 0x282
 8020ef6:	4924      	ldr	r1, [pc, #144]	@ (8020f88 <udp_sendto_if+0xe0>)
 8020ef8:	4821      	ldr	r0, [pc, #132]	@ (8020f80 <udp_sendto_if+0xd8>)
 8020efa:	f008 fb07 	bl	802950c <iprintf>
 8020efe:	f06f 030f 	mvn.w	r3, #15
 8020f02:	e035      	b.n	8020f70 <udp_sendto_if+0xc8>
  LWIP_ERROR("udp_sendto_if: invalid netif", netif != NULL, return ERR_ARG);
 8020f04:	6a3b      	ldr	r3, [r7, #32]
 8020f06:	2b00      	cmp	r3, #0
 8020f08:	d109      	bne.n	8020f1e <udp_sendto_if+0x76>
 8020f0a:	4b1b      	ldr	r3, [pc, #108]	@ (8020f78 <udp_sendto_if+0xd0>)
 8020f0c:	f240 2283 	movw	r2, #643	@ 0x283
 8020f10:	491e      	ldr	r1, [pc, #120]	@ (8020f8c <udp_sendto_if+0xe4>)
 8020f12:	481b      	ldr	r0, [pc, #108]	@ (8020f80 <udp_sendto_if+0xd8>)
 8020f14:	f008 fafa 	bl	802950c <iprintf>
 8020f18:	f06f 030f 	mvn.w	r3, #15
 8020f1c:	e028      	b.n	8020f70 <udp_sendto_if+0xc8>
#endif /* LWIP_IPV6 */
#if LWIP_IPV4 && LWIP_IPV6
  else
#endif /* LWIP_IPV4 && LWIP_IPV6 */
#if LWIP_IPV4
    if (ip4_addr_isany(ip_2_ip4(&pcb->local_ip)) ||
 8020f1e:	68fb      	ldr	r3, [r7, #12]
 8020f20:	2b00      	cmp	r3, #0
 8020f22:	d009      	beq.n	8020f38 <udp_sendto_if+0x90>
 8020f24:	68fb      	ldr	r3, [r7, #12]
 8020f26:	681b      	ldr	r3, [r3, #0]
 8020f28:	2b00      	cmp	r3, #0
 8020f2a:	d005      	beq.n	8020f38 <udp_sendto_if+0x90>
        ip4_addr_ismulticast(ip_2_ip4(&pcb->local_ip))) {
 8020f2c:	68fb      	ldr	r3, [r7, #12]
 8020f2e:	681b      	ldr	r3, [r3, #0]
 8020f30:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
    if (ip4_addr_isany(ip_2_ip4(&pcb->local_ip)) ||
 8020f34:	2be0      	cmp	r3, #224	@ 0xe0
 8020f36:	d103      	bne.n	8020f40 <udp_sendto_if+0x98>
      /* if the local_ip is any or multicast
       * use the outgoing network interface IP address as source address */
      src_ip = netif_ip_addr4(netif);
 8020f38:	6a3b      	ldr	r3, [r7, #32]
 8020f3a:	3304      	adds	r3, #4
 8020f3c:	617b      	str	r3, [r7, #20]
 8020f3e:	e00b      	b.n	8020f58 <udp_sendto_if+0xb0>
    } else {
      /* check if UDP PCB local IP address is correct
       * this could be an old address if netif->ip_addr has changed */
      if (!ip4_addr_cmp(ip_2_ip4(&(pcb->local_ip)), netif_ip4_addr(netif))) {
 8020f40:	68fb      	ldr	r3, [r7, #12]
 8020f42:	681a      	ldr	r2, [r3, #0]
 8020f44:	6a3b      	ldr	r3, [r7, #32]
 8020f46:	3304      	adds	r3, #4
 8020f48:	681b      	ldr	r3, [r3, #0]
 8020f4a:	429a      	cmp	r2, r3
 8020f4c:	d002      	beq.n	8020f54 <udp_sendto_if+0xac>
        /* local_ip doesn't match, drop the packet */
        return ERR_RTE;
 8020f4e:	f06f 0303 	mvn.w	r3, #3
 8020f52:	e00d      	b.n	8020f70 <udp_sendto_if+0xc8>
      }
      /* use UDP PCB local IP address as source address */
      src_ip = &pcb->local_ip;
 8020f54:	68fb      	ldr	r3, [r7, #12]
 8020f56:	617b      	str	r3, [r7, #20]
    }
#endif /* LWIP_IPV4 */
#if LWIP_CHECKSUM_ON_COPY && CHECKSUM_GEN_UDP
  return udp_sendto_if_src_chksum(pcb, p, dst_ip, dst_port, netif, have_chksum, chksum, src_ip);
#else /* LWIP_CHECKSUM_ON_COPY && CHECKSUM_GEN_UDP */
  return udp_sendto_if_src(pcb, p, dst_ip, dst_port, netif, src_ip);
 8020f58:	887a      	ldrh	r2, [r7, #2]
 8020f5a:	697b      	ldr	r3, [r7, #20]
 8020f5c:	9301      	str	r3, [sp, #4]
 8020f5e:	6a3b      	ldr	r3, [r7, #32]
 8020f60:	9300      	str	r3, [sp, #0]
 8020f62:	4613      	mov	r3, r2
 8020f64:	687a      	ldr	r2, [r7, #4]
 8020f66:	68b9      	ldr	r1, [r7, #8]
 8020f68:	68f8      	ldr	r0, [r7, #12]
 8020f6a:	f000 f811 	bl	8020f90 <udp_sendto_if_src>
 8020f6e:	4603      	mov	r3, r0
#endif /* LWIP_CHECKSUM_ON_COPY && CHECKSUM_GEN_UDP */
}
 8020f70:	4618      	mov	r0, r3
 8020f72:	3718      	adds	r7, #24
 8020f74:	46bd      	mov	sp, r7
 8020f76:	bd80      	pop	{r7, pc}
 8020f78:	0802f684 	.word	0x0802f684
 8020f7c:	0802f7f8 	.word	0x0802f7f8
 8020f80:	0802f6d8 	.word	0x0802f6d8
 8020f84:	0802f814 	.word	0x0802f814
 8020f88:	0802f830 	.word	0x0802f830
 8020f8c:	0802f850 	.word	0x0802f850

08020f90 <udp_sendto_if_src>:
/** @ingroup udp_raw
 * Same as @ref udp_sendto_if, but with source address */
err_t
udp_sendto_if_src(struct udp_pcb *pcb, struct pbuf *p,
                  const ip_addr_t *dst_ip, u16_t dst_port, struct netif *netif, const ip_addr_t *src_ip)
{
 8020f90:	b580      	push	{r7, lr}
 8020f92:	b08c      	sub	sp, #48	@ 0x30
 8020f94:	af04      	add	r7, sp, #16
 8020f96:	60f8      	str	r0, [r7, #12]
 8020f98:	60b9      	str	r1, [r7, #8]
 8020f9a:	607a      	str	r2, [r7, #4]
 8020f9c:	807b      	strh	r3, [r7, #2]
  err_t err;
  struct pbuf *q; /* q will be sent down the stack */
  u8_t ip_proto;
  u8_t ttl;

  LWIP_ASSERT_CORE_LOCKED();
 8020f9e:	f7ef f867 	bl	8010070 <sys_check_core_locking>

  LWIP_ERROR("udp_sendto_if_src: invalid pcb", pcb != NULL, return ERR_ARG);
 8020fa2:	68fb      	ldr	r3, [r7, #12]
 8020fa4:	2b00      	cmp	r3, #0
 8020fa6:	d109      	bne.n	8020fbc <udp_sendto_if_src+0x2c>
 8020fa8:	4b65      	ldr	r3, [pc, #404]	@ (8021140 <udp_sendto_if_src+0x1b0>)
 8020faa:	f240 22d1 	movw	r2, #721	@ 0x2d1
 8020fae:	4965      	ldr	r1, [pc, #404]	@ (8021144 <udp_sendto_if_src+0x1b4>)
 8020fb0:	4865      	ldr	r0, [pc, #404]	@ (8021148 <udp_sendto_if_src+0x1b8>)
 8020fb2:	f008 faab 	bl	802950c <iprintf>
 8020fb6:	f06f 030f 	mvn.w	r3, #15
 8020fba:	e0bc      	b.n	8021136 <udp_sendto_if_src+0x1a6>
  LWIP_ERROR("udp_sendto_if_src: invalid pbuf", p != NULL, return ERR_ARG);
 8020fbc:	68bb      	ldr	r3, [r7, #8]
 8020fbe:	2b00      	cmp	r3, #0
 8020fc0:	d109      	bne.n	8020fd6 <udp_sendto_if_src+0x46>
 8020fc2:	4b5f      	ldr	r3, [pc, #380]	@ (8021140 <udp_sendto_if_src+0x1b0>)
 8020fc4:	f240 22d2 	movw	r2, #722	@ 0x2d2
 8020fc8:	4960      	ldr	r1, [pc, #384]	@ (802114c <udp_sendto_if_src+0x1bc>)
 8020fca:	485f      	ldr	r0, [pc, #380]	@ (8021148 <udp_sendto_if_src+0x1b8>)
 8020fcc:	f008 fa9e 	bl	802950c <iprintf>
 8020fd0:	f06f 030f 	mvn.w	r3, #15
 8020fd4:	e0af      	b.n	8021136 <udp_sendto_if_src+0x1a6>
  LWIP_ERROR("udp_sendto_if_src: invalid dst_ip", dst_ip != NULL, return ERR_ARG);
 8020fd6:	687b      	ldr	r3, [r7, #4]
 8020fd8:	2b00      	cmp	r3, #0
 8020fda:	d109      	bne.n	8020ff0 <udp_sendto_if_src+0x60>
 8020fdc:	4b58      	ldr	r3, [pc, #352]	@ (8021140 <udp_sendto_if_src+0x1b0>)
 8020fde:	f240 22d3 	movw	r2, #723	@ 0x2d3
 8020fe2:	495b      	ldr	r1, [pc, #364]	@ (8021150 <udp_sendto_if_src+0x1c0>)
 8020fe4:	4858      	ldr	r0, [pc, #352]	@ (8021148 <udp_sendto_if_src+0x1b8>)
 8020fe6:	f008 fa91 	bl	802950c <iprintf>
 8020fea:	f06f 030f 	mvn.w	r3, #15
 8020fee:	e0a2      	b.n	8021136 <udp_sendto_if_src+0x1a6>
  LWIP_ERROR("udp_sendto_if_src: invalid src_ip", src_ip != NULL, return ERR_ARG);
 8020ff0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8020ff2:	2b00      	cmp	r3, #0
 8020ff4:	d109      	bne.n	802100a <udp_sendto_if_src+0x7a>
 8020ff6:	4b52      	ldr	r3, [pc, #328]	@ (8021140 <udp_sendto_if_src+0x1b0>)
 8020ff8:	f44f 7235 	mov.w	r2, #724	@ 0x2d4
 8020ffc:	4955      	ldr	r1, [pc, #340]	@ (8021154 <udp_sendto_if_src+0x1c4>)
 8020ffe:	4852      	ldr	r0, [pc, #328]	@ (8021148 <udp_sendto_if_src+0x1b8>)
 8021000:	f008 fa84 	bl	802950c <iprintf>
 8021004:	f06f 030f 	mvn.w	r3, #15
 8021008:	e095      	b.n	8021136 <udp_sendto_if_src+0x1a6>
  LWIP_ERROR("udp_sendto_if_src: invalid netif", netif != NULL, return ERR_ARG);
 802100a:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 802100c:	2b00      	cmp	r3, #0
 802100e:	d109      	bne.n	8021024 <udp_sendto_if_src+0x94>
 8021010:	4b4b      	ldr	r3, [pc, #300]	@ (8021140 <udp_sendto_if_src+0x1b0>)
 8021012:	f240 22d5 	movw	r2, #725	@ 0x2d5
 8021016:	4950      	ldr	r1, [pc, #320]	@ (8021158 <udp_sendto_if_src+0x1c8>)
 8021018:	484b      	ldr	r0, [pc, #300]	@ (8021148 <udp_sendto_if_src+0x1b8>)
 802101a:	f008 fa77 	bl	802950c <iprintf>
 802101e:	f06f 030f 	mvn.w	r3, #15
 8021022:	e088      	b.n	8021136 <udp_sendto_if_src+0x1a6>
    return ERR_VAL;
  }
#endif /* LWIP_IPV4 && IP_SOF_BROADCAST */

  /* if the PCB is not yet bound to a port, bind it here */
  if (pcb->local_port == 0) {
 8021024:	68fb      	ldr	r3, [r7, #12]
 8021026:	8a5b      	ldrh	r3, [r3, #18]
 8021028:	2b00      	cmp	r3, #0
 802102a:	d10f      	bne.n	802104c <udp_sendto_if_src+0xbc>
    LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE, ("udp_send: not yet bound to a port, binding now\n"));
    err = udp_bind(pcb, &pcb->local_ip, pcb->local_port);
 802102c:	68f9      	ldr	r1, [r7, #12]
 802102e:	68fb      	ldr	r3, [r7, #12]
 8021030:	8a5b      	ldrh	r3, [r3, #18]
 8021032:	461a      	mov	r2, r3
 8021034:	68f8      	ldr	r0, [r7, #12]
 8021036:	f000 f893 	bl	8021160 <udp_bind>
 802103a:	4603      	mov	r3, r0
 802103c:	76fb      	strb	r3, [r7, #27]
    if (err != ERR_OK) {
 802103e:	f997 301b 	ldrsb.w	r3, [r7, #27]
 8021042:	2b00      	cmp	r3, #0
 8021044:	d002      	beq.n	802104c <udp_sendto_if_src+0xbc>
      LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("udp_send: forced port bind failed\n"));
      return err;
 8021046:	f997 301b 	ldrsb.w	r3, [r7, #27]
 802104a:	e074      	b.n	8021136 <udp_sendto_if_src+0x1a6>
    }
  }

  /* packet too large to add a UDP header without causing an overflow? */
  if ((u16_t)(p->tot_len + UDP_HLEN) < p->tot_len) {
 802104c:	68bb      	ldr	r3, [r7, #8]
 802104e:	891b      	ldrh	r3, [r3, #8]
 8021050:	f64f 72f7 	movw	r2, #65527	@ 0xfff7
 8021054:	4293      	cmp	r3, r2
 8021056:	d902      	bls.n	802105e <udp_sendto_if_src+0xce>
    return ERR_MEM;
 8021058:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 802105c:	e06b      	b.n	8021136 <udp_sendto_if_src+0x1a6>
  }
  /* not enough space to add an UDP header to first pbuf in given p chain? */
  if (pbuf_add_header(p, UDP_HLEN)) {
 802105e:	2108      	movs	r1, #8
 8021060:	68b8      	ldr	r0, [r7, #8]
 8021062:	f7f8 ff13 	bl	8019e8c <pbuf_add_header>
 8021066:	4603      	mov	r3, r0
 8021068:	2b00      	cmp	r3, #0
 802106a:	d015      	beq.n	8021098 <udp_sendto_if_src+0x108>
    /* allocate header in a separate new pbuf */
    q = pbuf_alloc(PBUF_IP, UDP_HLEN, PBUF_RAM);
 802106c:	f44f 7220 	mov.w	r2, #640	@ 0x280
 8021070:	2108      	movs	r1, #8
 8021072:	2022      	movs	r0, #34	@ 0x22
 8021074:	f7f8 fcbc 	bl	80199f0 <pbuf_alloc>
 8021078:	61f8      	str	r0, [r7, #28]
    /* new header pbuf could not be allocated? */
    if (q == NULL) {
 802107a:	69fb      	ldr	r3, [r7, #28]
 802107c:	2b00      	cmp	r3, #0
 802107e:	d102      	bne.n	8021086 <udp_sendto_if_src+0xf6>
      LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("udp_send: could not allocate header\n"));
      return ERR_MEM;
 8021080:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8021084:	e057      	b.n	8021136 <udp_sendto_if_src+0x1a6>
    }
    if (p->tot_len != 0) {
 8021086:	68bb      	ldr	r3, [r7, #8]
 8021088:	891b      	ldrh	r3, [r3, #8]
 802108a:	2b00      	cmp	r3, #0
 802108c:	d006      	beq.n	802109c <udp_sendto_if_src+0x10c>
      /* chain header q in front of given pbuf p (only if p contains data) */
      pbuf_chain(q, p);
 802108e:	68b9      	ldr	r1, [r7, #8]
 8021090:	69f8      	ldr	r0, [r7, #28]
 8021092:	f7f9 f8e7 	bl	801a264 <pbuf_chain>
 8021096:	e001      	b.n	802109c <udp_sendto_if_src+0x10c>
    LWIP_DEBUGF(UDP_DEBUG,
                ("udp_send: added header pbuf %p before given pbuf %p\n", (void *)q, (void *)p));
  } else {
    /* adding space for header within p succeeded */
    /* first pbuf q equals given pbuf */
    q = p;
 8021098:	68bb      	ldr	r3, [r7, #8]
 802109a:	61fb      	str	r3, [r7, #28]
    LWIP_DEBUGF(UDP_DEBUG, ("udp_send: added header in given pbuf %p\n", (void *)p));
  }
  LWIP_ASSERT("check that first pbuf can hold struct udp_hdr",
 802109c:	69fb      	ldr	r3, [r7, #28]
 802109e:	895b      	ldrh	r3, [r3, #10]
 80210a0:	2b07      	cmp	r3, #7
 80210a2:	d806      	bhi.n	80210b2 <udp_sendto_if_src+0x122>
 80210a4:	4b26      	ldr	r3, [pc, #152]	@ (8021140 <udp_sendto_if_src+0x1b0>)
 80210a6:	f240 320d 	movw	r2, #781	@ 0x30d
 80210aa:	492c      	ldr	r1, [pc, #176]	@ (802115c <udp_sendto_if_src+0x1cc>)
 80210ac:	4826      	ldr	r0, [pc, #152]	@ (8021148 <udp_sendto_if_src+0x1b8>)
 80210ae:	f008 fa2d 	bl	802950c <iprintf>
              (q->len >= sizeof(struct udp_hdr)));
  /* q now represents the packet to be sent */
  udphdr = (struct udp_hdr *)q->payload;
 80210b2:	69fb      	ldr	r3, [r7, #28]
 80210b4:	685b      	ldr	r3, [r3, #4]
 80210b6:	617b      	str	r3, [r7, #20]
  udphdr->src = lwip_htons(pcb->local_port);
 80210b8:	68fb      	ldr	r3, [r7, #12]
 80210ba:	8a5b      	ldrh	r3, [r3, #18]
 80210bc:	4618      	mov	r0, r3
 80210be:	f7f7 facb 	bl	8018658 <lwip_htons>
 80210c2:	4603      	mov	r3, r0
 80210c4:	461a      	mov	r2, r3
 80210c6:	697b      	ldr	r3, [r7, #20]
 80210c8:	801a      	strh	r2, [r3, #0]
  udphdr->dest = lwip_htons(dst_port);
 80210ca:	887b      	ldrh	r3, [r7, #2]
 80210cc:	4618      	mov	r0, r3
 80210ce:	f7f7 fac3 	bl	8018658 <lwip_htons>
 80210d2:	4603      	mov	r3, r0
 80210d4:	461a      	mov	r2, r3
 80210d6:	697b      	ldr	r3, [r7, #20]
 80210d8:	805a      	strh	r2, [r3, #2]
  /* in UDP, 0 checksum means 'no checksum' */
  udphdr->chksum = 0x0000;
 80210da:	697b      	ldr	r3, [r7, #20]
 80210dc:	2200      	movs	r2, #0
 80210de:	719a      	strb	r2, [r3, #6]
 80210e0:	2200      	movs	r2, #0
 80210e2:	71da      	strb	r2, [r3, #7]
    ip_proto = IP_PROTO_UDPLITE;
  } else
#endif /* LWIP_UDPLITE */
  {      /* UDP */
    LWIP_DEBUGF(UDP_DEBUG, ("udp_send: UDP packet length %"U16_F"\n", q->tot_len));
    udphdr->len = lwip_htons(q->tot_len);
 80210e4:	69fb      	ldr	r3, [r7, #28]
 80210e6:	891b      	ldrh	r3, [r3, #8]
 80210e8:	4618      	mov	r0, r3
 80210ea:	f7f7 fab5 	bl	8018658 <lwip_htons>
 80210ee:	4603      	mov	r3, r0
 80210f0:	461a      	mov	r2, r3
 80210f2:	697b      	ldr	r3, [r7, #20]
 80210f4:	809a      	strh	r2, [r3, #4]
        }
        udphdr->chksum = udpchksum;
      }
    }
#endif /* CHECKSUM_GEN_UDP */
    ip_proto = IP_PROTO_UDP;
 80210f6:	2311      	movs	r3, #17
 80210f8:	74fb      	strb	r3, [r7, #19]

  /* Determine TTL to use */
#if LWIP_MULTICAST_TX_OPTIONS
  ttl = (ip_addr_ismulticast(dst_ip) ? udp_get_multicast_ttl(pcb) : pcb->ttl);
#else /* LWIP_MULTICAST_TX_OPTIONS */
  ttl = pcb->ttl;
 80210fa:	68fb      	ldr	r3, [r7, #12]
 80210fc:	7adb      	ldrb	r3, [r3, #11]
 80210fe:	74bb      	strb	r3, [r7, #18]

  LWIP_DEBUGF(UDP_DEBUG, ("udp_send: UDP checksum 0x%04"X16_F"\n", udphdr->chksum));
  LWIP_DEBUGF(UDP_DEBUG, ("udp_send: ip_output_if (,,,,0x%02"X16_F",)\n", (u16_t)ip_proto));
  /* output to IP */
  NETIF_SET_HINTS(netif, &(pcb->netif_hints));
  err = ip_output_if_src(q, src_ip, dst_ip, ttl, pcb->tos, ip_proto, netif);
 8021100:	68fb      	ldr	r3, [r7, #12]
 8021102:	7a9b      	ldrb	r3, [r3, #10]
 8021104:	7cb9      	ldrb	r1, [r7, #18]
 8021106:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 8021108:	9202      	str	r2, [sp, #8]
 802110a:	7cfa      	ldrb	r2, [r7, #19]
 802110c:	9201      	str	r2, [sp, #4]
 802110e:	9300      	str	r3, [sp, #0]
 8021110:	460b      	mov	r3, r1
 8021112:	687a      	ldr	r2, [r7, #4]
 8021114:	6af9      	ldr	r1, [r7, #44]	@ 0x2c
 8021116:	69f8      	ldr	r0, [r7, #28]
 8021118:	f003 fbf2 	bl	8024900 <ip4_output_if_src>
 802111c:	4603      	mov	r3, r0
 802111e:	76fb      	strb	r3, [r7, #27]

  /* @todo: must this be increased even if error occurred? */
  MIB2_STATS_INC(mib2.udpoutdatagrams);

  /* did we chain a separate header pbuf earlier? */
  if (q != p) {
 8021120:	69fa      	ldr	r2, [r7, #28]
 8021122:	68bb      	ldr	r3, [r7, #8]
 8021124:	429a      	cmp	r2, r3
 8021126:	d004      	beq.n	8021132 <udp_sendto_if_src+0x1a2>
    /* free the header pbuf */
    pbuf_free(q);
 8021128:	69f8      	ldr	r0, [r7, #28]
 802112a:	f7f8 ff77 	bl	801a01c <pbuf_free>
    q = NULL;
 802112e:	2300      	movs	r3, #0
 8021130:	61fb      	str	r3, [r7, #28]
    /* p is still referenced by the caller, and will live on */
  }

  UDP_STATS_INC(udp.xmit);
  return err;
 8021132:	f997 301b 	ldrsb.w	r3, [r7, #27]
}
 8021136:	4618      	mov	r0, r3
 8021138:	3720      	adds	r7, #32
 802113a:	46bd      	mov	sp, r7
 802113c:	bd80      	pop	{r7, pc}
 802113e:	bf00      	nop
 8021140:	0802f684 	.word	0x0802f684
 8021144:	0802f870 	.word	0x0802f870
 8021148:	0802f6d8 	.word	0x0802f6d8
 802114c:	0802f890 	.word	0x0802f890
 8021150:	0802f8b0 	.word	0x0802f8b0
 8021154:	0802f8d4 	.word	0x0802f8d4
 8021158:	0802f8f8 	.word	0x0802f8f8
 802115c:	0802f91c 	.word	0x0802f91c

08021160 <udp_bind>:
 *
 * @see udp_disconnect()
 */
err_t
udp_bind(struct udp_pcb *pcb, const ip_addr_t *ipaddr, u16_t port)
{
 8021160:	b580      	push	{r7, lr}
 8021162:	b086      	sub	sp, #24
 8021164:	af00      	add	r7, sp, #0
 8021166:	60f8      	str	r0, [r7, #12]
 8021168:	60b9      	str	r1, [r7, #8]
 802116a:	4613      	mov	r3, r2
 802116c:	80fb      	strh	r3, [r7, #6]
  u8_t rebind;
#if LWIP_IPV6 && LWIP_IPV6_SCOPES
  ip_addr_t zoned_ipaddr;
#endif /* LWIP_IPV6 && LWIP_IPV6_SCOPES */

  LWIP_ASSERT_CORE_LOCKED();
 802116e:	f7ee ff7f 	bl	8010070 <sys_check_core_locking>

#if LWIP_IPV4
  /* Don't propagate NULL pointer (IPv4 ANY) to subsequent functions */
  if (ipaddr == NULL) {
 8021172:	68bb      	ldr	r3, [r7, #8]
 8021174:	2b00      	cmp	r3, #0
 8021176:	d101      	bne.n	802117c <udp_bind+0x1c>
    ipaddr = IP4_ADDR_ANY;
 8021178:	4b39      	ldr	r3, [pc, #228]	@ (8021260 <udp_bind+0x100>)
 802117a:	60bb      	str	r3, [r7, #8]
  }
#else /* LWIP_IPV4 */
  LWIP_ERROR("udp_bind: invalid ipaddr", ipaddr != NULL, return ERR_ARG);
#endif /* LWIP_IPV4 */

  LWIP_ERROR("udp_bind: invalid pcb", pcb != NULL, return ERR_ARG);
 802117c:	68fb      	ldr	r3, [r7, #12]
 802117e:	2b00      	cmp	r3, #0
 8021180:	d109      	bne.n	8021196 <udp_bind+0x36>
 8021182:	4b38      	ldr	r3, [pc, #224]	@ (8021264 <udp_bind+0x104>)
 8021184:	f240 32b7 	movw	r2, #951	@ 0x3b7
 8021188:	4937      	ldr	r1, [pc, #220]	@ (8021268 <udp_bind+0x108>)
 802118a:	4838      	ldr	r0, [pc, #224]	@ (802126c <udp_bind+0x10c>)
 802118c:	f008 f9be 	bl	802950c <iprintf>
 8021190:	f06f 030f 	mvn.w	r3, #15
 8021194:	e060      	b.n	8021258 <udp_bind+0xf8>

  LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE, ("udp_bind(ipaddr = "));
  ip_addr_debug_print(UDP_DEBUG | LWIP_DBG_TRACE, ipaddr);
  LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE, (", port = %"U16_F")\n", port));

  rebind = 0;
 8021196:	2300      	movs	r3, #0
 8021198:	74fb      	strb	r3, [r7, #19]
  /* Check for double bind and rebind of the same pcb */
  for (ipcb = udp_pcbs; ipcb != NULL; ipcb = ipcb->next) {
 802119a:	4b35      	ldr	r3, [pc, #212]	@ (8021270 <udp_bind+0x110>)
 802119c:	681b      	ldr	r3, [r3, #0]
 802119e:	617b      	str	r3, [r7, #20]
 80211a0:	e009      	b.n	80211b6 <udp_bind+0x56>
    /* is this UDP PCB already on active list? */
    if (pcb == ipcb) {
 80211a2:	68fa      	ldr	r2, [r7, #12]
 80211a4:	697b      	ldr	r3, [r7, #20]
 80211a6:	429a      	cmp	r2, r3
 80211a8:	d102      	bne.n	80211b0 <udp_bind+0x50>
      rebind = 1;
 80211aa:	2301      	movs	r3, #1
 80211ac:	74fb      	strb	r3, [r7, #19]
      break;
 80211ae:	e005      	b.n	80211bc <udp_bind+0x5c>
  for (ipcb = udp_pcbs; ipcb != NULL; ipcb = ipcb->next) {
 80211b0:	697b      	ldr	r3, [r7, #20]
 80211b2:	68db      	ldr	r3, [r3, #12]
 80211b4:	617b      	str	r3, [r7, #20]
 80211b6:	697b      	ldr	r3, [r7, #20]
 80211b8:	2b00      	cmp	r3, #0
 80211ba:	d1f2      	bne.n	80211a2 <udp_bind+0x42>
    ipaddr = &zoned_ipaddr;
  }
#endif /* LWIP_IPV6 && LWIP_IPV6_SCOPES */

  /* no port specified? */
  if (port == 0) {
 80211bc:	88fb      	ldrh	r3, [r7, #6]
 80211be:	2b00      	cmp	r3, #0
 80211c0:	d109      	bne.n	80211d6 <udp_bind+0x76>
    port = udp_new_port();
 80211c2:	f7ff fc2f 	bl	8020a24 <udp_new_port>
 80211c6:	4603      	mov	r3, r0
 80211c8:	80fb      	strh	r3, [r7, #6]
    if (port == 0) {
 80211ca:	88fb      	ldrh	r3, [r7, #6]
 80211cc:	2b00      	cmp	r3, #0
 80211ce:	d12c      	bne.n	802122a <udp_bind+0xca>
      /* no more ports available in local range */
      LWIP_DEBUGF(UDP_DEBUG, ("udp_bind: out of free UDP ports\n"));
      return ERR_USE;
 80211d0:	f06f 0307 	mvn.w	r3, #7
 80211d4:	e040      	b.n	8021258 <udp_bind+0xf8>
    }
  } else {
    for (ipcb = udp_pcbs; ipcb != NULL; ipcb = ipcb->next) {
 80211d6:	4b26      	ldr	r3, [pc, #152]	@ (8021270 <udp_bind+0x110>)
 80211d8:	681b      	ldr	r3, [r3, #0]
 80211da:	617b      	str	r3, [r7, #20]
 80211dc:	e022      	b.n	8021224 <udp_bind+0xc4>
      if (pcb != ipcb) {
 80211de:	68fa      	ldr	r2, [r7, #12]
 80211e0:	697b      	ldr	r3, [r7, #20]
 80211e2:	429a      	cmp	r2, r3
 80211e4:	d01b      	beq.n	802121e <udp_bind+0xbe>
        if (!ip_get_option(pcb, SOF_REUSEADDR) ||
            !ip_get_option(ipcb, SOF_REUSEADDR))
#endif /* SO_REUSE */
        {
          /* port matches that of PCB in list and REUSEADDR not set -> reject */
          if ((ipcb->local_port == port) &&
 80211e6:	697b      	ldr	r3, [r7, #20]
 80211e8:	8a5b      	ldrh	r3, [r3, #18]
 80211ea:	88fa      	ldrh	r2, [r7, #6]
 80211ec:	429a      	cmp	r2, r3
 80211ee:	d116      	bne.n	802121e <udp_bind+0xbe>
              /* IP address matches or any IP used? */
              (ip_addr_cmp(&ipcb->local_ip, ipaddr) || ip_addr_isany(ipaddr) ||
 80211f0:	697b      	ldr	r3, [r7, #20]
 80211f2:	681a      	ldr	r2, [r3, #0]
 80211f4:	68bb      	ldr	r3, [r7, #8]
 80211f6:	681b      	ldr	r3, [r3, #0]
          if ((ipcb->local_port == port) &&
 80211f8:	429a      	cmp	r2, r3
 80211fa:	d00d      	beq.n	8021218 <udp_bind+0xb8>
              (ip_addr_cmp(&ipcb->local_ip, ipaddr) || ip_addr_isany(ipaddr) ||
 80211fc:	68bb      	ldr	r3, [r7, #8]
 80211fe:	2b00      	cmp	r3, #0
 8021200:	d00a      	beq.n	8021218 <udp_bind+0xb8>
 8021202:	68bb      	ldr	r3, [r7, #8]
 8021204:	681b      	ldr	r3, [r3, #0]
 8021206:	2b00      	cmp	r3, #0
 8021208:	d006      	beq.n	8021218 <udp_bind+0xb8>
              ip_addr_isany(&ipcb->local_ip))) {
 802120a:	697b      	ldr	r3, [r7, #20]
              (ip_addr_cmp(&ipcb->local_ip, ipaddr) || ip_addr_isany(ipaddr) ||
 802120c:	2b00      	cmp	r3, #0
 802120e:	d003      	beq.n	8021218 <udp_bind+0xb8>
              ip_addr_isany(&ipcb->local_ip))) {
 8021210:	697b      	ldr	r3, [r7, #20]
 8021212:	681b      	ldr	r3, [r3, #0]
 8021214:	2b00      	cmp	r3, #0
 8021216:	d102      	bne.n	802121e <udp_bind+0xbe>
            /* other PCB already binds to this local IP and port */
            LWIP_DEBUGF(UDP_DEBUG,
                        ("udp_bind: local port %"U16_F" already bound by another pcb\n", port));
            return ERR_USE;
 8021218:	f06f 0307 	mvn.w	r3, #7
 802121c:	e01c      	b.n	8021258 <udp_bind+0xf8>
    for (ipcb = udp_pcbs; ipcb != NULL; ipcb = ipcb->next) {
 802121e:	697b      	ldr	r3, [r7, #20]
 8021220:	68db      	ldr	r3, [r3, #12]
 8021222:	617b      	str	r3, [r7, #20]
 8021224:	697b      	ldr	r3, [r7, #20]
 8021226:	2b00      	cmp	r3, #0
 8021228:	d1d9      	bne.n	80211de <udp_bind+0x7e>
        }
      }
    }
  }

  ip_addr_set_ipaddr(&pcb->local_ip, ipaddr);
 802122a:	68bb      	ldr	r3, [r7, #8]
 802122c:	2b00      	cmp	r3, #0
 802122e:	d002      	beq.n	8021236 <udp_bind+0xd6>
 8021230:	68bb      	ldr	r3, [r7, #8]
 8021232:	681b      	ldr	r3, [r3, #0]
 8021234:	e000      	b.n	8021238 <udp_bind+0xd8>
 8021236:	2300      	movs	r3, #0
 8021238:	68fa      	ldr	r2, [r7, #12]
 802123a:	6013      	str	r3, [r2, #0]

  pcb->local_port = port;
 802123c:	68fb      	ldr	r3, [r7, #12]
 802123e:	88fa      	ldrh	r2, [r7, #6]
 8021240:	825a      	strh	r2, [r3, #18]
  mib2_udp_bind(pcb);
  /* pcb not active yet? */
  if (rebind == 0) {
 8021242:	7cfb      	ldrb	r3, [r7, #19]
 8021244:	2b00      	cmp	r3, #0
 8021246:	d106      	bne.n	8021256 <udp_bind+0xf6>
    /* place the PCB on the active list if not already there */
    pcb->next = udp_pcbs;
 8021248:	4b09      	ldr	r3, [pc, #36]	@ (8021270 <udp_bind+0x110>)
 802124a:	681a      	ldr	r2, [r3, #0]
 802124c:	68fb      	ldr	r3, [r7, #12]
 802124e:	60da      	str	r2, [r3, #12]
    udp_pcbs = pcb;
 8021250:	4a07      	ldr	r2, [pc, #28]	@ (8021270 <udp_bind+0x110>)
 8021252:	68fb      	ldr	r3, [r7, #12]
 8021254:	6013      	str	r3, [r2, #0]
  }
  LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("udp_bind: bound to "));
  ip_addr_debug_print_val(UDP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, pcb->local_ip);
  LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, (", port %"U16_F")\n", pcb->local_port));
  return ERR_OK;
 8021256:	2300      	movs	r3, #0
}
 8021258:	4618      	mov	r0, r3
 802125a:	3718      	adds	r7, #24
 802125c:	46bd      	mov	sp, r7
 802125e:	bd80      	pop	{r7, pc}
 8021260:	080307a4 	.word	0x080307a4
 8021264:	0802f684 	.word	0x0802f684
 8021268:	0802f94c 	.word	0x0802f94c
 802126c:	0802f6d8 	.word	0x0802f6d8
 8021270:	2402a04c 	.word	0x2402a04c

08021274 <udp_connect>:
 *
 * @see udp_disconnect()
 */
err_t
udp_connect(struct udp_pcb *pcb, const ip_addr_t *ipaddr, u16_t port)
{
 8021274:	b580      	push	{r7, lr}
 8021276:	b086      	sub	sp, #24
 8021278:	af00      	add	r7, sp, #0
 802127a:	60f8      	str	r0, [r7, #12]
 802127c:	60b9      	str	r1, [r7, #8]
 802127e:	4613      	mov	r3, r2
 8021280:	80fb      	strh	r3, [r7, #6]
  struct udp_pcb *ipcb;

  LWIP_ASSERT_CORE_LOCKED();
 8021282:	f7ee fef5 	bl	8010070 <sys_check_core_locking>

  LWIP_ERROR("udp_connect: invalid pcb", pcb != NULL, return ERR_ARG);
 8021286:	68fb      	ldr	r3, [r7, #12]
 8021288:	2b00      	cmp	r3, #0
 802128a:	d109      	bne.n	80212a0 <udp_connect+0x2c>
 802128c:	4b2c      	ldr	r3, [pc, #176]	@ (8021340 <udp_connect+0xcc>)
 802128e:	f240 4235 	movw	r2, #1077	@ 0x435
 8021292:	492c      	ldr	r1, [pc, #176]	@ (8021344 <udp_connect+0xd0>)
 8021294:	482c      	ldr	r0, [pc, #176]	@ (8021348 <udp_connect+0xd4>)
 8021296:	f008 f939 	bl	802950c <iprintf>
 802129a:	f06f 030f 	mvn.w	r3, #15
 802129e:	e04b      	b.n	8021338 <udp_connect+0xc4>
  LWIP_ERROR("udp_connect: invalid ipaddr", ipaddr != NULL, return ERR_ARG);
 80212a0:	68bb      	ldr	r3, [r7, #8]
 80212a2:	2b00      	cmp	r3, #0
 80212a4:	d109      	bne.n	80212ba <udp_connect+0x46>
 80212a6:	4b26      	ldr	r3, [pc, #152]	@ (8021340 <udp_connect+0xcc>)
 80212a8:	f240 4236 	movw	r2, #1078	@ 0x436
 80212ac:	4927      	ldr	r1, [pc, #156]	@ (802134c <udp_connect+0xd8>)
 80212ae:	4826      	ldr	r0, [pc, #152]	@ (8021348 <udp_connect+0xd4>)
 80212b0:	f008 f92c 	bl	802950c <iprintf>
 80212b4:	f06f 030f 	mvn.w	r3, #15
 80212b8:	e03e      	b.n	8021338 <udp_connect+0xc4>

  if (pcb->local_port == 0) {
 80212ba:	68fb      	ldr	r3, [r7, #12]
 80212bc:	8a5b      	ldrh	r3, [r3, #18]
 80212be:	2b00      	cmp	r3, #0
 80212c0:	d10f      	bne.n	80212e2 <udp_connect+0x6e>
    err_t err = udp_bind(pcb, &pcb->local_ip, pcb->local_port);
 80212c2:	68f9      	ldr	r1, [r7, #12]
 80212c4:	68fb      	ldr	r3, [r7, #12]
 80212c6:	8a5b      	ldrh	r3, [r3, #18]
 80212c8:	461a      	mov	r2, r3
 80212ca:	68f8      	ldr	r0, [r7, #12]
 80212cc:	f7ff ff48 	bl	8021160 <udp_bind>
 80212d0:	4603      	mov	r3, r0
 80212d2:	75fb      	strb	r3, [r7, #23]
    if (err != ERR_OK) {
 80212d4:	f997 3017 	ldrsb.w	r3, [r7, #23]
 80212d8:	2b00      	cmp	r3, #0
 80212da:	d002      	beq.n	80212e2 <udp_connect+0x6e>
      return err;
 80212dc:	f997 3017 	ldrsb.w	r3, [r7, #23]
 80212e0:	e02a      	b.n	8021338 <udp_connect+0xc4>
    }
  }

  ip_addr_set_ipaddr(&pcb->remote_ip, ipaddr);
 80212e2:	68bb      	ldr	r3, [r7, #8]
 80212e4:	2b00      	cmp	r3, #0
 80212e6:	d002      	beq.n	80212ee <udp_connect+0x7a>
 80212e8:	68bb      	ldr	r3, [r7, #8]
 80212ea:	681b      	ldr	r3, [r3, #0]
 80212ec:	e000      	b.n	80212f0 <udp_connect+0x7c>
 80212ee:	2300      	movs	r3, #0
 80212f0:	68fa      	ldr	r2, [r7, #12]
 80212f2:	6053      	str	r3, [r2, #4]
      ip6_addr_lacks_zone(ip_2_ip6(&pcb->remote_ip), IP6_UNKNOWN)) {
    ip6_addr_select_zone(ip_2_ip6(&pcb->remote_ip), ip_2_ip6(&pcb->local_ip));
  }
#endif /* LWIP_IPV6 && LWIP_IPV6_SCOPES */

  pcb->remote_port = port;
 80212f4:	68fb      	ldr	r3, [r7, #12]
 80212f6:	88fa      	ldrh	r2, [r7, #6]
 80212f8:	829a      	strh	r2, [r3, #20]
  pcb->flags |= UDP_FLAGS_CONNECTED;
 80212fa:	68fb      	ldr	r3, [r7, #12]
 80212fc:	7c1b      	ldrb	r3, [r3, #16]
 80212fe:	f043 0304 	orr.w	r3, r3, #4
 8021302:	b2da      	uxtb	r2, r3
 8021304:	68fb      	ldr	r3, [r7, #12]
 8021306:	741a      	strb	r2, [r3, #16]
  ip_addr_debug_print_val(UDP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE,
                          pcb->remote_ip);
  LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, (", port %"U16_F")\n", pcb->remote_port));

  /* Insert UDP PCB into the list of active UDP PCBs. */
  for (ipcb = udp_pcbs; ipcb != NULL; ipcb = ipcb->next) {
 8021308:	4b11      	ldr	r3, [pc, #68]	@ (8021350 <udp_connect+0xdc>)
 802130a:	681b      	ldr	r3, [r3, #0]
 802130c:	613b      	str	r3, [r7, #16]
 802130e:	e008      	b.n	8021322 <udp_connect+0xae>
    if (pcb == ipcb) {
 8021310:	68fa      	ldr	r2, [r7, #12]
 8021312:	693b      	ldr	r3, [r7, #16]
 8021314:	429a      	cmp	r2, r3
 8021316:	d101      	bne.n	802131c <udp_connect+0xa8>
      /* already on the list, just return */
      return ERR_OK;
 8021318:	2300      	movs	r3, #0
 802131a:	e00d      	b.n	8021338 <udp_connect+0xc4>
  for (ipcb = udp_pcbs; ipcb != NULL; ipcb = ipcb->next) {
 802131c:	693b      	ldr	r3, [r7, #16]
 802131e:	68db      	ldr	r3, [r3, #12]
 8021320:	613b      	str	r3, [r7, #16]
 8021322:	693b      	ldr	r3, [r7, #16]
 8021324:	2b00      	cmp	r3, #0
 8021326:	d1f3      	bne.n	8021310 <udp_connect+0x9c>
    }
  }
  /* PCB not yet on the list, add PCB now */
  pcb->next = udp_pcbs;
 8021328:	4b09      	ldr	r3, [pc, #36]	@ (8021350 <udp_connect+0xdc>)
 802132a:	681a      	ldr	r2, [r3, #0]
 802132c:	68fb      	ldr	r3, [r7, #12]
 802132e:	60da      	str	r2, [r3, #12]
  udp_pcbs = pcb;
 8021330:	4a07      	ldr	r2, [pc, #28]	@ (8021350 <udp_connect+0xdc>)
 8021332:	68fb      	ldr	r3, [r7, #12]
 8021334:	6013      	str	r3, [r2, #0]
  return ERR_OK;
 8021336:	2300      	movs	r3, #0
}
 8021338:	4618      	mov	r0, r3
 802133a:	3718      	adds	r7, #24
 802133c:	46bd      	mov	sp, r7
 802133e:	bd80      	pop	{r7, pc}
 8021340:	0802f684 	.word	0x0802f684
 8021344:	0802f964 	.word	0x0802f964
 8021348:	0802f6d8 	.word	0x0802f6d8
 802134c:	0802f980 	.word	0x0802f980
 8021350:	2402a04c 	.word	0x2402a04c

08021354 <udp_disconnect>:
 *
 * @param pcb the udp pcb to disconnect.
 */
void
udp_disconnect(struct udp_pcb *pcb)
{
 8021354:	b580      	push	{r7, lr}
 8021356:	b082      	sub	sp, #8
 8021358:	af00      	add	r7, sp, #0
 802135a:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT_CORE_LOCKED();
 802135c:	f7ee fe88 	bl	8010070 <sys_check_core_locking>

  LWIP_ERROR("udp_disconnect: invalid pcb", pcb != NULL, return);
 8021360:	687b      	ldr	r3, [r7, #4]
 8021362:	2b00      	cmp	r3, #0
 8021364:	d107      	bne.n	8021376 <udp_disconnect+0x22>
 8021366:	4b0d      	ldr	r3, [pc, #52]	@ (802139c <udp_disconnect+0x48>)
 8021368:	f240 426a 	movw	r2, #1130	@ 0x46a
 802136c:	490c      	ldr	r1, [pc, #48]	@ (80213a0 <udp_disconnect+0x4c>)
 802136e:	480d      	ldr	r0, [pc, #52]	@ (80213a4 <udp_disconnect+0x50>)
 8021370:	f008 f8cc 	bl	802950c <iprintf>
 8021374:	e00f      	b.n	8021396 <udp_disconnect+0x42>
#if LWIP_IPV4 && LWIP_IPV6
  if (IP_IS_ANY_TYPE_VAL(pcb->local_ip)) {
    ip_addr_copy(pcb->remote_ip, *IP_ANY_TYPE);
  } else {
#endif
    ip_addr_set_any(IP_IS_V6_VAL(pcb->remote_ip), &pcb->remote_ip);
 8021376:	687b      	ldr	r3, [r7, #4]
 8021378:	2200      	movs	r2, #0
 802137a:	605a      	str	r2, [r3, #4]
#if LWIP_IPV4 && LWIP_IPV6
  }
#endif
  pcb->remote_port = 0;
 802137c:	687b      	ldr	r3, [r7, #4]
 802137e:	2200      	movs	r2, #0
 8021380:	829a      	strh	r2, [r3, #20]
  pcb->netif_idx = NETIF_NO_INDEX;
 8021382:	687b      	ldr	r3, [r7, #4]
 8021384:	2200      	movs	r2, #0
 8021386:	721a      	strb	r2, [r3, #8]
  /* mark PCB as unconnected */
  udp_clear_flags(pcb, UDP_FLAGS_CONNECTED);
 8021388:	687b      	ldr	r3, [r7, #4]
 802138a:	7c1b      	ldrb	r3, [r3, #16]
 802138c:	f023 0304 	bic.w	r3, r3, #4
 8021390:	b2da      	uxtb	r2, r3
 8021392:	687b      	ldr	r3, [r7, #4]
 8021394:	741a      	strb	r2, [r3, #16]
}
 8021396:	3708      	adds	r7, #8
 8021398:	46bd      	mov	sp, r7
 802139a:	bd80      	pop	{r7, pc}
 802139c:	0802f684 	.word	0x0802f684
 80213a0:	0802f99c 	.word	0x0802f99c
 80213a4:	0802f6d8 	.word	0x0802f6d8

080213a8 <udp_recv>:
 * @param recv function pointer of the callback function
 * @param recv_arg additional argument to pass to the callback function
 */
void
udp_recv(struct udp_pcb *pcb, udp_recv_fn recv, void *recv_arg)
{
 80213a8:	b580      	push	{r7, lr}
 80213aa:	b084      	sub	sp, #16
 80213ac:	af00      	add	r7, sp, #0
 80213ae:	60f8      	str	r0, [r7, #12]
 80213b0:	60b9      	str	r1, [r7, #8]
 80213b2:	607a      	str	r2, [r7, #4]
  LWIP_ASSERT_CORE_LOCKED();
 80213b4:	f7ee fe5c 	bl	8010070 <sys_check_core_locking>

  LWIP_ERROR("udp_recv: invalid pcb", pcb != NULL, return);
 80213b8:	68fb      	ldr	r3, [r7, #12]
 80213ba:	2b00      	cmp	r3, #0
 80213bc:	d107      	bne.n	80213ce <udp_recv+0x26>
 80213be:	4b08      	ldr	r3, [pc, #32]	@ (80213e0 <udp_recv+0x38>)
 80213c0:	f240 428a 	movw	r2, #1162	@ 0x48a
 80213c4:	4907      	ldr	r1, [pc, #28]	@ (80213e4 <udp_recv+0x3c>)
 80213c6:	4808      	ldr	r0, [pc, #32]	@ (80213e8 <udp_recv+0x40>)
 80213c8:	f008 f8a0 	bl	802950c <iprintf>
 80213cc:	e005      	b.n	80213da <udp_recv+0x32>

  /* remember recv() callback and user data */
  pcb->recv = recv;
 80213ce:	68fb      	ldr	r3, [r7, #12]
 80213d0:	68ba      	ldr	r2, [r7, #8]
 80213d2:	619a      	str	r2, [r3, #24]
  pcb->recv_arg = recv_arg;
 80213d4:	68fb      	ldr	r3, [r7, #12]
 80213d6:	687a      	ldr	r2, [r7, #4]
 80213d8:	61da      	str	r2, [r3, #28]
}
 80213da:	3710      	adds	r7, #16
 80213dc:	46bd      	mov	sp, r7
 80213de:	bd80      	pop	{r7, pc}
 80213e0:	0802f684 	.word	0x0802f684
 80213e4:	0802f9b8 	.word	0x0802f9b8
 80213e8:	0802f6d8 	.word	0x0802f6d8

080213ec <udp_remove>:
 *
 * @see udp_new()
 */
void
udp_remove(struct udp_pcb *pcb)
{
 80213ec:	b580      	push	{r7, lr}
 80213ee:	b084      	sub	sp, #16
 80213f0:	af00      	add	r7, sp, #0
 80213f2:	6078      	str	r0, [r7, #4]
  struct udp_pcb *pcb2;

  LWIP_ASSERT_CORE_LOCKED();
 80213f4:	f7ee fe3c 	bl	8010070 <sys_check_core_locking>

  LWIP_ERROR("udp_remove: invalid pcb", pcb != NULL, return);
 80213f8:	687b      	ldr	r3, [r7, #4]
 80213fa:	2b00      	cmp	r3, #0
 80213fc:	d107      	bne.n	802140e <udp_remove+0x22>
 80213fe:	4b19      	ldr	r3, [pc, #100]	@ (8021464 <udp_remove+0x78>)
 8021400:	f240 42a1 	movw	r2, #1185	@ 0x4a1
 8021404:	4918      	ldr	r1, [pc, #96]	@ (8021468 <udp_remove+0x7c>)
 8021406:	4819      	ldr	r0, [pc, #100]	@ (802146c <udp_remove+0x80>)
 8021408:	f008 f880 	bl	802950c <iprintf>
 802140c:	e026      	b.n	802145c <udp_remove+0x70>

  mib2_udp_unbind(pcb);
  /* pcb to be removed is first in list? */
  if (udp_pcbs == pcb) {
 802140e:	4b18      	ldr	r3, [pc, #96]	@ (8021470 <udp_remove+0x84>)
 8021410:	681b      	ldr	r3, [r3, #0]
 8021412:	687a      	ldr	r2, [r7, #4]
 8021414:	429a      	cmp	r2, r3
 8021416:	d105      	bne.n	8021424 <udp_remove+0x38>
    /* make list start at 2nd pcb */
    udp_pcbs = udp_pcbs->next;
 8021418:	4b15      	ldr	r3, [pc, #84]	@ (8021470 <udp_remove+0x84>)
 802141a:	681b      	ldr	r3, [r3, #0]
 802141c:	68db      	ldr	r3, [r3, #12]
 802141e:	4a14      	ldr	r2, [pc, #80]	@ (8021470 <udp_remove+0x84>)
 8021420:	6013      	str	r3, [r2, #0]
 8021422:	e017      	b.n	8021454 <udp_remove+0x68>
    /* pcb not 1st in list */
  } else {
    for (pcb2 = udp_pcbs; pcb2 != NULL; pcb2 = pcb2->next) {
 8021424:	4b12      	ldr	r3, [pc, #72]	@ (8021470 <udp_remove+0x84>)
 8021426:	681b      	ldr	r3, [r3, #0]
 8021428:	60fb      	str	r3, [r7, #12]
 802142a:	e010      	b.n	802144e <udp_remove+0x62>
      /* find pcb in udp_pcbs list */
      if (pcb2->next != NULL && pcb2->next == pcb) {
 802142c:	68fb      	ldr	r3, [r7, #12]
 802142e:	68db      	ldr	r3, [r3, #12]
 8021430:	2b00      	cmp	r3, #0
 8021432:	d009      	beq.n	8021448 <udp_remove+0x5c>
 8021434:	68fb      	ldr	r3, [r7, #12]
 8021436:	68db      	ldr	r3, [r3, #12]
 8021438:	687a      	ldr	r2, [r7, #4]
 802143a:	429a      	cmp	r2, r3
 802143c:	d104      	bne.n	8021448 <udp_remove+0x5c>
        /* remove pcb from list */
        pcb2->next = pcb->next;
 802143e:	687b      	ldr	r3, [r7, #4]
 8021440:	68da      	ldr	r2, [r3, #12]
 8021442:	68fb      	ldr	r3, [r7, #12]
 8021444:	60da      	str	r2, [r3, #12]
        break;
 8021446:	e005      	b.n	8021454 <udp_remove+0x68>
    for (pcb2 = udp_pcbs; pcb2 != NULL; pcb2 = pcb2->next) {
 8021448:	68fb      	ldr	r3, [r7, #12]
 802144a:	68db      	ldr	r3, [r3, #12]
 802144c:	60fb      	str	r3, [r7, #12]
 802144e:	68fb      	ldr	r3, [r7, #12]
 8021450:	2b00      	cmp	r3, #0
 8021452:	d1eb      	bne.n	802142c <udp_remove+0x40>
      }
    }
  }
  memp_free(MEMP_UDP_PCB, pcb);
 8021454:	6879      	ldr	r1, [r7, #4]
 8021456:	2000      	movs	r0, #0
 8021458:	f7f7 fef2 	bl	8019240 <memp_free>
}
 802145c:	3710      	adds	r7, #16
 802145e:	46bd      	mov	sp, r7
 8021460:	bd80      	pop	{r7, pc}
 8021462:	bf00      	nop
 8021464:	0802f684 	.word	0x0802f684
 8021468:	0802f9d0 	.word	0x0802f9d0
 802146c:	0802f6d8 	.word	0x0802f6d8
 8021470:	2402a04c 	.word	0x2402a04c

08021474 <udp_new>:
 *
 * @see udp_remove()
 */
struct udp_pcb *
udp_new(void)
{
 8021474:	b580      	push	{r7, lr}
 8021476:	b082      	sub	sp, #8
 8021478:	af00      	add	r7, sp, #0
  struct udp_pcb *pcb;

  LWIP_ASSERT_CORE_LOCKED();
 802147a:	f7ee fdf9 	bl	8010070 <sys_check_core_locking>

  pcb = (struct udp_pcb *)memp_malloc(MEMP_UDP_PCB);
 802147e:	2000      	movs	r0, #0
 8021480:	f7f7 fe68 	bl	8019154 <memp_malloc>
 8021484:	6078      	str	r0, [r7, #4]
  /* could allocate UDP PCB? */
  if (pcb != NULL) {
 8021486:	687b      	ldr	r3, [r7, #4]
 8021488:	2b00      	cmp	r3, #0
 802148a:	d007      	beq.n	802149c <udp_new+0x28>
    /* UDP Lite: by initializing to all zeroes, chksum_len is set to 0
     * which means checksum is generated over the whole datagram per default
     * (recommended as default by RFC 3828). */
    /* initialize PCB to all zeroes */
    memset(pcb, 0, sizeof(struct udp_pcb));
 802148c:	2220      	movs	r2, #32
 802148e:	2100      	movs	r1, #0
 8021490:	6878      	ldr	r0, [r7, #4]
 8021492:	f008 f9cd 	bl	8029830 <memset>
    pcb->ttl = UDP_TTL;
 8021496:	687b      	ldr	r3, [r7, #4]
 8021498:	22ff      	movs	r2, #255	@ 0xff
 802149a:	72da      	strb	r2, [r3, #11]
#if LWIP_MULTICAST_TX_OPTIONS
    udp_set_multicast_ttl(pcb, UDP_TTL);
#endif /* LWIP_MULTICAST_TX_OPTIONS */
  }
  return pcb;
 802149c:	687b      	ldr	r3, [r7, #4]
}
 802149e:	4618      	mov	r0, r3
 80214a0:	3708      	adds	r7, #8
 80214a2:	46bd      	mov	sp, r7
 80214a4:	bd80      	pop	{r7, pc}

080214a6 <udp_new_ip_type>:
 *
 * @see udp_remove()
 */
struct udp_pcb *
udp_new_ip_type(u8_t type)
{
 80214a6:	b580      	push	{r7, lr}
 80214a8:	b084      	sub	sp, #16
 80214aa:	af00      	add	r7, sp, #0
 80214ac:	4603      	mov	r3, r0
 80214ae:	71fb      	strb	r3, [r7, #7]
  struct udp_pcb *pcb;

  LWIP_ASSERT_CORE_LOCKED();
 80214b0:	f7ee fdde 	bl	8010070 <sys_check_core_locking>

  pcb = udp_new();
 80214b4:	f7ff ffde 	bl	8021474 <udp_new>
 80214b8:	60f8      	str	r0, [r7, #12]
    IP_SET_TYPE_VAL(pcb->remote_ip, type);
  }
#else
  LWIP_UNUSED_ARG(type);
#endif /* LWIP_IPV4 && LWIP_IPV6 */
  return pcb;
 80214ba:	68fb      	ldr	r3, [r7, #12]
}
 80214bc:	4618      	mov	r0, r3
 80214be:	3710      	adds	r7, #16
 80214c0:	46bd      	mov	sp, r7
 80214c2:	bd80      	pop	{r7, pc}

080214c4 <udp_netif_ip_addr_changed>:
 *
 * @param old_addr IP address of the netif before change
 * @param new_addr IP address of the netif after change
 */
void udp_netif_ip_addr_changed(const ip_addr_t *old_addr, const ip_addr_t *new_addr)
{
 80214c4:	b480      	push	{r7}
 80214c6:	b085      	sub	sp, #20
 80214c8:	af00      	add	r7, sp, #0
 80214ca:	6078      	str	r0, [r7, #4]
 80214cc:	6039      	str	r1, [r7, #0]
  struct udp_pcb *upcb;

  if (!ip_addr_isany(old_addr) && !ip_addr_isany(new_addr)) {
 80214ce:	687b      	ldr	r3, [r7, #4]
 80214d0:	2b00      	cmp	r3, #0
 80214d2:	d01e      	beq.n	8021512 <udp_netif_ip_addr_changed+0x4e>
 80214d4:	687b      	ldr	r3, [r7, #4]
 80214d6:	681b      	ldr	r3, [r3, #0]
 80214d8:	2b00      	cmp	r3, #0
 80214da:	d01a      	beq.n	8021512 <udp_netif_ip_addr_changed+0x4e>
 80214dc:	683b      	ldr	r3, [r7, #0]
 80214de:	2b00      	cmp	r3, #0
 80214e0:	d017      	beq.n	8021512 <udp_netif_ip_addr_changed+0x4e>
 80214e2:	683b      	ldr	r3, [r7, #0]
 80214e4:	681b      	ldr	r3, [r3, #0]
 80214e6:	2b00      	cmp	r3, #0
 80214e8:	d013      	beq.n	8021512 <udp_netif_ip_addr_changed+0x4e>
    for (upcb = udp_pcbs; upcb != NULL; upcb = upcb->next) {
 80214ea:	4b0d      	ldr	r3, [pc, #52]	@ (8021520 <udp_netif_ip_addr_changed+0x5c>)
 80214ec:	681b      	ldr	r3, [r3, #0]
 80214ee:	60fb      	str	r3, [r7, #12]
 80214f0:	e00c      	b.n	802150c <udp_netif_ip_addr_changed+0x48>
      /* PCB bound to current local interface address? */
      if (ip_addr_cmp(&upcb->local_ip, old_addr)) {
 80214f2:	68fb      	ldr	r3, [r7, #12]
 80214f4:	681a      	ldr	r2, [r3, #0]
 80214f6:	687b      	ldr	r3, [r7, #4]
 80214f8:	681b      	ldr	r3, [r3, #0]
 80214fa:	429a      	cmp	r2, r3
 80214fc:	d103      	bne.n	8021506 <udp_netif_ip_addr_changed+0x42>
        /* The PCB is bound to the old ipaddr and
         * is set to bound to the new one instead */
        ip_addr_copy(upcb->local_ip, *new_addr);
 80214fe:	683b      	ldr	r3, [r7, #0]
 8021500:	681a      	ldr	r2, [r3, #0]
 8021502:	68fb      	ldr	r3, [r7, #12]
 8021504:	601a      	str	r2, [r3, #0]
    for (upcb = udp_pcbs; upcb != NULL; upcb = upcb->next) {
 8021506:	68fb      	ldr	r3, [r7, #12]
 8021508:	68db      	ldr	r3, [r3, #12]
 802150a:	60fb      	str	r3, [r7, #12]
 802150c:	68fb      	ldr	r3, [r7, #12]
 802150e:	2b00      	cmp	r3, #0
 8021510:	d1ef      	bne.n	80214f2 <udp_netif_ip_addr_changed+0x2e>
      }
    }
  }
}
 8021512:	bf00      	nop
 8021514:	3714      	adds	r7, #20
 8021516:	46bd      	mov	sp, r7
 8021518:	f85d 7b04 	ldr.w	r7, [sp], #4
 802151c:	4770      	bx	lr
 802151e:	bf00      	nop
 8021520:	2402a04c 	.word	0x2402a04c

08021524 <dhcp_inc_pcb_refcount>:
static void dhcp_option_trailer(u16_t options_out_len, u8_t *options, struct pbuf *p_out);

/** Ensure DHCP PCB is allocated and bound */
static err_t
dhcp_inc_pcb_refcount(void)
{
 8021524:	b580      	push	{r7, lr}
 8021526:	af00      	add	r7, sp, #0
  if (dhcp_pcb_refcount == 0) {
 8021528:	4b20      	ldr	r3, [pc, #128]	@ (80215ac <dhcp_inc_pcb_refcount+0x88>)
 802152a:	781b      	ldrb	r3, [r3, #0]
 802152c:	2b00      	cmp	r3, #0
 802152e:	d133      	bne.n	8021598 <dhcp_inc_pcb_refcount+0x74>
    LWIP_ASSERT("dhcp_inc_pcb_refcount(): memory leak", dhcp_pcb == NULL);
 8021530:	4b1f      	ldr	r3, [pc, #124]	@ (80215b0 <dhcp_inc_pcb_refcount+0x8c>)
 8021532:	681b      	ldr	r3, [r3, #0]
 8021534:	2b00      	cmp	r3, #0
 8021536:	d005      	beq.n	8021544 <dhcp_inc_pcb_refcount+0x20>
 8021538:	4b1e      	ldr	r3, [pc, #120]	@ (80215b4 <dhcp_inc_pcb_refcount+0x90>)
 802153a:	22e5      	movs	r2, #229	@ 0xe5
 802153c:	491e      	ldr	r1, [pc, #120]	@ (80215b8 <dhcp_inc_pcb_refcount+0x94>)
 802153e:	481f      	ldr	r0, [pc, #124]	@ (80215bc <dhcp_inc_pcb_refcount+0x98>)
 8021540:	f007 ffe4 	bl	802950c <iprintf>

    /* allocate UDP PCB */
    dhcp_pcb = udp_new();
 8021544:	f7ff ff96 	bl	8021474 <udp_new>
 8021548:	4603      	mov	r3, r0
 802154a:	4a19      	ldr	r2, [pc, #100]	@ (80215b0 <dhcp_inc_pcb_refcount+0x8c>)
 802154c:	6013      	str	r3, [r2, #0]

    if (dhcp_pcb == NULL) {
 802154e:	4b18      	ldr	r3, [pc, #96]	@ (80215b0 <dhcp_inc_pcb_refcount+0x8c>)
 8021550:	681b      	ldr	r3, [r3, #0]
 8021552:	2b00      	cmp	r3, #0
 8021554:	d102      	bne.n	802155c <dhcp_inc_pcb_refcount+0x38>
      return ERR_MEM;
 8021556:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 802155a:	e024      	b.n	80215a6 <dhcp_inc_pcb_refcount+0x82>
    }

    ip_set_option(dhcp_pcb, SOF_BROADCAST);
 802155c:	4b14      	ldr	r3, [pc, #80]	@ (80215b0 <dhcp_inc_pcb_refcount+0x8c>)
 802155e:	681b      	ldr	r3, [r3, #0]
 8021560:	7a5a      	ldrb	r2, [r3, #9]
 8021562:	4b13      	ldr	r3, [pc, #76]	@ (80215b0 <dhcp_inc_pcb_refcount+0x8c>)
 8021564:	681b      	ldr	r3, [r3, #0]
 8021566:	f042 0220 	orr.w	r2, r2, #32
 802156a:	b2d2      	uxtb	r2, r2
 802156c:	725a      	strb	r2, [r3, #9]

    /* set up local and remote port for the pcb -> listen on all interfaces on all src/dest IPs */
    udp_bind(dhcp_pcb, IP4_ADDR_ANY, LWIP_IANA_PORT_DHCP_CLIENT);
 802156e:	4b10      	ldr	r3, [pc, #64]	@ (80215b0 <dhcp_inc_pcb_refcount+0x8c>)
 8021570:	681b      	ldr	r3, [r3, #0]
 8021572:	2244      	movs	r2, #68	@ 0x44
 8021574:	4912      	ldr	r1, [pc, #72]	@ (80215c0 <dhcp_inc_pcb_refcount+0x9c>)
 8021576:	4618      	mov	r0, r3
 8021578:	f7ff fdf2 	bl	8021160 <udp_bind>
    udp_connect(dhcp_pcb, IP4_ADDR_ANY, LWIP_IANA_PORT_DHCP_SERVER);
 802157c:	4b0c      	ldr	r3, [pc, #48]	@ (80215b0 <dhcp_inc_pcb_refcount+0x8c>)
 802157e:	681b      	ldr	r3, [r3, #0]
 8021580:	2243      	movs	r2, #67	@ 0x43
 8021582:	490f      	ldr	r1, [pc, #60]	@ (80215c0 <dhcp_inc_pcb_refcount+0x9c>)
 8021584:	4618      	mov	r0, r3
 8021586:	f7ff fe75 	bl	8021274 <udp_connect>
    udp_recv(dhcp_pcb, dhcp_recv, NULL);
 802158a:	4b09      	ldr	r3, [pc, #36]	@ (80215b0 <dhcp_inc_pcb_refcount+0x8c>)
 802158c:	681b      	ldr	r3, [r3, #0]
 802158e:	2200      	movs	r2, #0
 8021590:	490c      	ldr	r1, [pc, #48]	@ (80215c4 <dhcp_inc_pcb_refcount+0xa0>)
 8021592:	4618      	mov	r0, r3
 8021594:	f7ff ff08 	bl	80213a8 <udp_recv>
  }

  dhcp_pcb_refcount++;
 8021598:	4b04      	ldr	r3, [pc, #16]	@ (80215ac <dhcp_inc_pcb_refcount+0x88>)
 802159a:	781b      	ldrb	r3, [r3, #0]
 802159c:	3301      	adds	r3, #1
 802159e:	b2da      	uxtb	r2, r3
 80215a0:	4b02      	ldr	r3, [pc, #8]	@ (80215ac <dhcp_inc_pcb_refcount+0x88>)
 80215a2:	701a      	strb	r2, [r3, #0]

  return ERR_OK;
 80215a4:	2300      	movs	r3, #0
}
 80215a6:	4618      	mov	r0, r3
 80215a8:	bd80      	pop	{r7, pc}
 80215aa:	bf00      	nop
 80215ac:	2402a07c 	.word	0x2402a07c
 80215b0:	2402a078 	.word	0x2402a078
 80215b4:	0802f9e8 	.word	0x0802f9e8
 80215b8:	0802fa20 	.word	0x0802fa20
 80215bc:	0802fa48 	.word	0x0802fa48
 80215c0:	080307a4 	.word	0x080307a4
 80215c4:	08022e95 	.word	0x08022e95

080215c8 <dhcp_dec_pcb_refcount>:

/** Free DHCP PCB if the last netif stops using it */
static void
dhcp_dec_pcb_refcount(void)
{
 80215c8:	b580      	push	{r7, lr}
 80215ca:	af00      	add	r7, sp, #0
  LWIP_ASSERT("dhcp_pcb_refcount(): refcount error", (dhcp_pcb_refcount > 0));
 80215cc:	4b0e      	ldr	r3, [pc, #56]	@ (8021608 <dhcp_dec_pcb_refcount+0x40>)
 80215ce:	781b      	ldrb	r3, [r3, #0]
 80215d0:	2b00      	cmp	r3, #0
 80215d2:	d105      	bne.n	80215e0 <dhcp_dec_pcb_refcount+0x18>
 80215d4:	4b0d      	ldr	r3, [pc, #52]	@ (802160c <dhcp_dec_pcb_refcount+0x44>)
 80215d6:	22ff      	movs	r2, #255	@ 0xff
 80215d8:	490d      	ldr	r1, [pc, #52]	@ (8021610 <dhcp_dec_pcb_refcount+0x48>)
 80215da:	480e      	ldr	r0, [pc, #56]	@ (8021614 <dhcp_dec_pcb_refcount+0x4c>)
 80215dc:	f007 ff96 	bl	802950c <iprintf>
  dhcp_pcb_refcount--;
 80215e0:	4b09      	ldr	r3, [pc, #36]	@ (8021608 <dhcp_dec_pcb_refcount+0x40>)
 80215e2:	781b      	ldrb	r3, [r3, #0]
 80215e4:	3b01      	subs	r3, #1
 80215e6:	b2da      	uxtb	r2, r3
 80215e8:	4b07      	ldr	r3, [pc, #28]	@ (8021608 <dhcp_dec_pcb_refcount+0x40>)
 80215ea:	701a      	strb	r2, [r3, #0]

  if (dhcp_pcb_refcount == 0) {
 80215ec:	4b06      	ldr	r3, [pc, #24]	@ (8021608 <dhcp_dec_pcb_refcount+0x40>)
 80215ee:	781b      	ldrb	r3, [r3, #0]
 80215f0:	2b00      	cmp	r3, #0
 80215f2:	d107      	bne.n	8021604 <dhcp_dec_pcb_refcount+0x3c>
    udp_remove(dhcp_pcb);
 80215f4:	4b08      	ldr	r3, [pc, #32]	@ (8021618 <dhcp_dec_pcb_refcount+0x50>)
 80215f6:	681b      	ldr	r3, [r3, #0]
 80215f8:	4618      	mov	r0, r3
 80215fa:	f7ff fef7 	bl	80213ec <udp_remove>
    dhcp_pcb = NULL;
 80215fe:	4b06      	ldr	r3, [pc, #24]	@ (8021618 <dhcp_dec_pcb_refcount+0x50>)
 8021600:	2200      	movs	r2, #0
 8021602:	601a      	str	r2, [r3, #0]
  }
}
 8021604:	bf00      	nop
 8021606:	bd80      	pop	{r7, pc}
 8021608:	2402a07c 	.word	0x2402a07c
 802160c:	0802f9e8 	.word	0x0802f9e8
 8021610:	0802fa70 	.word	0x0802fa70
 8021614:	0802fa48 	.word	0x0802fa48
 8021618:	2402a078 	.word	0x2402a078

0802161c <dhcp_handle_nak>:
 *
 * @param netif the netif under DHCP control
 */
static void
dhcp_handle_nak(struct netif *netif)
{
 802161c:	b580      	push	{r7, lr}
 802161e:	b084      	sub	sp, #16
 8021620:	af00      	add	r7, sp, #0
 8021622:	6078      	str	r0, [r7, #4]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 8021624:	687b      	ldr	r3, [r7, #4]
 8021626:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8021628:	60fb      	str	r3, [r7, #12]

  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_handle_nak(netif=%p) %c%c%"U16_F"\n",
              (void *)netif, netif->name[0], netif->name[1], (u16_t)netif->num));
  /* Change to a defined state - set this before assigning the address
     to ensure the callback can use dhcp_supplied_address() */
  dhcp_set_state(dhcp, DHCP_STATE_BACKING_OFF);
 802162a:	210c      	movs	r1, #12
 802162c:	68f8      	ldr	r0, [r7, #12]
 802162e:	f001 f862 	bl	80226f6 <dhcp_set_state>
  /* remove IP address from interface (must no longer be used, as per RFC2131) */
  netif_set_addr(netif, IP4_ADDR_ANY4, IP4_ADDR_ANY4, IP4_ADDR_ANY4);
 8021632:	4b06      	ldr	r3, [pc, #24]	@ (802164c <dhcp_handle_nak+0x30>)
 8021634:	4a05      	ldr	r2, [pc, #20]	@ (802164c <dhcp_handle_nak+0x30>)
 8021636:	4905      	ldr	r1, [pc, #20]	@ (802164c <dhcp_handle_nak+0x30>)
 8021638:	6878      	ldr	r0, [r7, #4]
 802163a:	f7f7 ffa5 	bl	8019588 <netif_set_addr>
  /* We can immediately restart discovery */
  dhcp_discover(netif);
 802163e:	6878      	ldr	r0, [r7, #4]
 8021640:	f000 fc4c 	bl	8021edc <dhcp_discover>
}
 8021644:	bf00      	nop
 8021646:	3710      	adds	r7, #16
 8021648:	46bd      	mov	sp, r7
 802164a:	bd80      	pop	{r7, pc}
 802164c:	080307a4 	.word	0x080307a4

08021650 <dhcp_check>:
 *
 * @param netif the netif under DHCP control
 */
static void
dhcp_check(struct netif *netif)
{
 8021650:	b580      	push	{r7, lr}
 8021652:	b084      	sub	sp, #16
 8021654:	af00      	add	r7, sp, #0
 8021656:	6078      	str	r0, [r7, #4]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 8021658:	687b      	ldr	r3, [r7, #4]
 802165a:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 802165c:	60fb      	str	r3, [r7, #12]
  err_t result;
  u16_t msecs;
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_check(netif=%p) %c%c\n", (void *)netif, (s16_t)netif->name[0],
              (s16_t)netif->name[1]));
  dhcp_set_state(dhcp, DHCP_STATE_CHECKING);
 802165e:	2108      	movs	r1, #8
 8021660:	68f8      	ldr	r0, [r7, #12]
 8021662:	f001 f848 	bl	80226f6 <dhcp_set_state>
  /* create an ARP query for the offered IP address, expecting that no host
     responds, as the IP address should not be in use. */
  result = etharp_query(netif, &dhcp->offered_ip_addr, NULL);
 8021666:	68fb      	ldr	r3, [r7, #12]
 8021668:	331c      	adds	r3, #28
 802166a:	2200      	movs	r2, #0
 802166c:	4619      	mov	r1, r3
 802166e:	6878      	ldr	r0, [r7, #4]
 8021670:	f002 fb88 	bl	8023d84 <etharp_query>
 8021674:	4603      	mov	r3, r0
 8021676:	72fb      	strb	r3, [r7, #11]
  if (result != ERR_OK) {
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, ("dhcp_check: could not perform ARP query\n"));
  }
  if (dhcp->tries < 255) {
 8021678:	68fb      	ldr	r3, [r7, #12]
 802167a:	799b      	ldrb	r3, [r3, #6]
 802167c:	2bff      	cmp	r3, #255	@ 0xff
 802167e:	d005      	beq.n	802168c <dhcp_check+0x3c>
    dhcp->tries++;
 8021680:	68fb      	ldr	r3, [r7, #12]
 8021682:	799b      	ldrb	r3, [r3, #6]
 8021684:	3301      	adds	r3, #1
 8021686:	b2da      	uxtb	r2, r3
 8021688:	68fb      	ldr	r3, [r7, #12]
 802168a:	719a      	strb	r2, [r3, #6]
  }
  msecs = 500;
 802168c:	f44f 73fa 	mov.w	r3, #500	@ 0x1f4
 8021690:	813b      	strh	r3, [r7, #8]
  dhcp->request_timeout = (u16_t)((msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS);
 8021692:	893b      	ldrh	r3, [r7, #8]
 8021694:	f203 13f3 	addw	r3, r3, #499	@ 0x1f3
 8021698:	4a06      	ldr	r2, [pc, #24]	@ (80216b4 <dhcp_check+0x64>)
 802169a:	fb82 1203 	smull	r1, r2, r2, r3
 802169e:	1152      	asrs	r2, r2, #5
 80216a0:	17db      	asrs	r3, r3, #31
 80216a2:	1ad3      	subs	r3, r2, r3
 80216a4:	b29a      	uxth	r2, r3
 80216a6:	68fb      	ldr	r3, [r7, #12]
 80216a8:	811a      	strh	r2, [r3, #8]
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_check(): set request timeout %"U16_F" msecs\n", msecs));
}
 80216aa:	bf00      	nop
 80216ac:	3710      	adds	r7, #16
 80216ae:	46bd      	mov	sp, r7
 80216b0:	bd80      	pop	{r7, pc}
 80216b2:	bf00      	nop
 80216b4:	10624dd3 	.word	0x10624dd3

080216b8 <dhcp_handle_offer>:
 *
 * @param netif the netif under DHCP control
 */
static void
dhcp_handle_offer(struct netif *netif, struct dhcp_msg *msg_in)
{
 80216b8:	b580      	push	{r7, lr}
 80216ba:	b084      	sub	sp, #16
 80216bc:	af00      	add	r7, sp, #0
 80216be:	6078      	str	r0, [r7, #4]
 80216c0:	6039      	str	r1, [r7, #0]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 80216c2:	687b      	ldr	r3, [r7, #4]
 80216c4:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 80216c6:	60fb      	str	r3, [r7, #12]

  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_handle_offer(netif=%p) %c%c%"U16_F"\n",
              (void *)netif, netif->name[0], netif->name[1], (u16_t)netif->num));
  /* obtain the server address */
  if (dhcp_option_given(dhcp, DHCP_OPTION_IDX_SERVER_ID)) {
 80216c8:	4b0c      	ldr	r3, [pc, #48]	@ (80216fc <dhcp_handle_offer+0x44>)
 80216ca:	789b      	ldrb	r3, [r3, #2]
 80216cc:	2b00      	cmp	r3, #0
 80216ce:	d011      	beq.n	80216f4 <dhcp_handle_offer+0x3c>
    dhcp->request_timeout = 0; /* stop timer */
 80216d0:	68fb      	ldr	r3, [r7, #12]
 80216d2:	2200      	movs	r2, #0
 80216d4:	811a      	strh	r2, [r3, #8]

    ip_addr_set_ip4_u32(&dhcp->server_ip_addr, lwip_htonl(dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_SERVER_ID)));
 80216d6:	4b0a      	ldr	r3, [pc, #40]	@ (8021700 <dhcp_handle_offer+0x48>)
 80216d8:	689b      	ldr	r3, [r3, #8]
 80216da:	4618      	mov	r0, r3
 80216dc:	f7f6 ffd1 	bl	8018682 <lwip_htonl>
 80216e0:	4602      	mov	r2, r0
 80216e2:	68fb      	ldr	r3, [r7, #12]
 80216e4:	619a      	str	r2, [r3, #24]
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_STATE, ("dhcp_handle_offer(): server 0x%08"X32_F"\n",
                ip4_addr_get_u32(ip_2_ip4(&dhcp->server_ip_addr))));
    /* remember offered address */
    ip4_addr_copy(dhcp->offered_ip_addr, msg_in->yiaddr);
 80216e6:	683b      	ldr	r3, [r7, #0]
 80216e8:	691a      	ldr	r2, [r3, #16]
 80216ea:	68fb      	ldr	r3, [r7, #12]
 80216ec:	61da      	str	r2, [r3, #28]
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_STATE, ("dhcp_handle_offer(): offer for 0x%08"X32_F"\n",
                ip4_addr_get_u32(&dhcp->offered_ip_addr)));

    dhcp_select(netif);
 80216ee:	6878      	ldr	r0, [r7, #4]
 80216f0:	f000 f808 	bl	8021704 <dhcp_select>
  } else {
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS,
                ("dhcp_handle_offer(netif=%p) did not get server ID!\n", (void *)netif));
  }
}
 80216f4:	bf00      	nop
 80216f6:	3710      	adds	r7, #16
 80216f8:	46bd      	mov	sp, r7
 80216fa:	bd80      	pop	{r7, pc}
 80216fc:	2402a070 	.word	0x2402a070
 8021700:	2402a050 	.word	0x2402a050

08021704 <dhcp_select>:
 * @param netif the netif under DHCP control
 * @return lwIP specific error (see error.h)
 */
static err_t
dhcp_select(struct netif *netif)
{
 8021704:	b5b0      	push	{r4, r5, r7, lr}
 8021706:	b08a      	sub	sp, #40	@ 0x28
 8021708:	af02      	add	r7, sp, #8
 802170a:	6078      	str	r0, [r7, #4]
  u16_t msecs;
  u8_t i;
  struct pbuf *p_out;
  u16_t options_out_len;

  LWIP_ERROR("dhcp_select: netif != NULL", (netif != NULL), return ERR_ARG;);
 802170c:	687b      	ldr	r3, [r7, #4]
 802170e:	2b00      	cmp	r3, #0
 8021710:	d109      	bne.n	8021726 <dhcp_select+0x22>
 8021712:	4b71      	ldr	r3, [pc, #452]	@ (80218d8 <dhcp_select+0x1d4>)
 8021714:	f240 1277 	movw	r2, #375	@ 0x177
 8021718:	4970      	ldr	r1, [pc, #448]	@ (80218dc <dhcp_select+0x1d8>)
 802171a:	4871      	ldr	r0, [pc, #452]	@ (80218e0 <dhcp_select+0x1dc>)
 802171c:	f007 fef6 	bl	802950c <iprintf>
 8021720:	f06f 030f 	mvn.w	r3, #15
 8021724:	e0d3      	b.n	80218ce <dhcp_select+0x1ca>
  dhcp = netif_dhcp_data(netif);
 8021726:	687b      	ldr	r3, [r7, #4]
 8021728:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 802172a:	61bb      	str	r3, [r7, #24]
  LWIP_ERROR("dhcp_select: dhcp != NULL", (dhcp != NULL), return ERR_VAL;);
 802172c:	69bb      	ldr	r3, [r7, #24]
 802172e:	2b00      	cmp	r3, #0
 8021730:	d109      	bne.n	8021746 <dhcp_select+0x42>
 8021732:	4b69      	ldr	r3, [pc, #420]	@ (80218d8 <dhcp_select+0x1d4>)
 8021734:	f240 1279 	movw	r2, #377	@ 0x179
 8021738:	496a      	ldr	r1, [pc, #424]	@ (80218e4 <dhcp_select+0x1e0>)
 802173a:	4869      	ldr	r0, [pc, #420]	@ (80218e0 <dhcp_select+0x1dc>)
 802173c:	f007 fee6 	bl	802950c <iprintf>
 8021740:	f06f 0305 	mvn.w	r3, #5
 8021744:	e0c3      	b.n	80218ce <dhcp_select+0x1ca>

  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_select(netif=%p) %c%c%"U16_F"\n", (void *)netif, netif->name[0], netif->name[1], (u16_t)netif->num));
  dhcp_set_state(dhcp, DHCP_STATE_REQUESTING);
 8021746:	2101      	movs	r1, #1
 8021748:	69b8      	ldr	r0, [r7, #24]
 802174a:	f000 ffd4 	bl	80226f6 <dhcp_set_state>

  /* create and initialize the DHCP message header */
  p_out = dhcp_create_msg(netif, dhcp, DHCP_REQUEST, &options_out_len);
 802174e:	f107 030c 	add.w	r3, r7, #12
 8021752:	2203      	movs	r2, #3
 8021754:	69b9      	ldr	r1, [r7, #24]
 8021756:	6878      	ldr	r0, [r7, #4]
 8021758:	f001 fc66 	bl	8023028 <dhcp_create_msg>
 802175c:	6178      	str	r0, [r7, #20]
  if (p_out != NULL) {
 802175e:	697b      	ldr	r3, [r7, #20]
 8021760:	2b00      	cmp	r3, #0
 8021762:	f000 8085 	beq.w	8021870 <dhcp_select+0x16c>
    struct dhcp_msg *msg_out = (struct dhcp_msg *)p_out->payload;
 8021766:	697b      	ldr	r3, [r7, #20]
 8021768:	685b      	ldr	r3, [r3, #4]
 802176a:	613b      	str	r3, [r7, #16]
    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_MAX_MSG_SIZE, DHCP_OPTION_MAX_MSG_SIZE_LEN);
 802176c:	89b8      	ldrh	r0, [r7, #12]
 802176e:	693b      	ldr	r3, [r7, #16]
 8021770:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8021774:	2302      	movs	r3, #2
 8021776:	2239      	movs	r2, #57	@ 0x39
 8021778:	f000 ffd8 	bl	802272c <dhcp_option>
 802177c:	4603      	mov	r3, r0
 802177e:	81bb      	strh	r3, [r7, #12]
    options_out_len = dhcp_option_short(options_out_len, msg_out->options, DHCP_MAX_MSG_LEN(netif));
 8021780:	89b8      	ldrh	r0, [r7, #12]
 8021782:	693b      	ldr	r3, [r7, #16]
 8021784:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8021788:	687b      	ldr	r3, [r7, #4]
 802178a:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 802178c:	461a      	mov	r2, r3
 802178e:	f001 f827 	bl	80227e0 <dhcp_option_short>
 8021792:	4603      	mov	r3, r0
 8021794:	81bb      	strh	r3, [r7, #12]

    /* MUST request the offered IP address */
    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_REQUESTED_IP, 4);
 8021796:	89b8      	ldrh	r0, [r7, #12]
 8021798:	693b      	ldr	r3, [r7, #16]
 802179a:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 802179e:	2304      	movs	r3, #4
 80217a0:	2232      	movs	r2, #50	@ 0x32
 80217a2:	f000 ffc3 	bl	802272c <dhcp_option>
 80217a6:	4603      	mov	r3, r0
 80217a8:	81bb      	strh	r3, [r7, #12]
    options_out_len = dhcp_option_long(options_out_len, msg_out->options, lwip_ntohl(ip4_addr_get_u32(&dhcp->offered_ip_addr)));
 80217aa:	89bc      	ldrh	r4, [r7, #12]
 80217ac:	693b      	ldr	r3, [r7, #16]
 80217ae:	f103 05f0 	add.w	r5, r3, #240	@ 0xf0
 80217b2:	69bb      	ldr	r3, [r7, #24]
 80217b4:	69db      	ldr	r3, [r3, #28]
 80217b6:	4618      	mov	r0, r3
 80217b8:	f7f6 ff63 	bl	8018682 <lwip_htonl>
 80217bc:	4603      	mov	r3, r0
 80217be:	461a      	mov	r2, r3
 80217c0:	4629      	mov	r1, r5
 80217c2:	4620      	mov	r0, r4
 80217c4:	f001 f83e 	bl	8022844 <dhcp_option_long>
 80217c8:	4603      	mov	r3, r0
 80217ca:	81bb      	strh	r3, [r7, #12]

    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_SERVER_ID, 4);
 80217cc:	89b8      	ldrh	r0, [r7, #12]
 80217ce:	693b      	ldr	r3, [r7, #16]
 80217d0:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 80217d4:	2304      	movs	r3, #4
 80217d6:	2236      	movs	r2, #54	@ 0x36
 80217d8:	f000 ffa8 	bl	802272c <dhcp_option>
 80217dc:	4603      	mov	r3, r0
 80217de:	81bb      	strh	r3, [r7, #12]
    options_out_len = dhcp_option_long(options_out_len, msg_out->options, lwip_ntohl(ip4_addr_get_u32(ip_2_ip4(&dhcp->server_ip_addr))));
 80217e0:	89bc      	ldrh	r4, [r7, #12]
 80217e2:	693b      	ldr	r3, [r7, #16]
 80217e4:	f103 05f0 	add.w	r5, r3, #240	@ 0xf0
 80217e8:	69bb      	ldr	r3, [r7, #24]
 80217ea:	699b      	ldr	r3, [r3, #24]
 80217ec:	4618      	mov	r0, r3
 80217ee:	f7f6 ff48 	bl	8018682 <lwip_htonl>
 80217f2:	4603      	mov	r3, r0
 80217f4:	461a      	mov	r2, r3
 80217f6:	4629      	mov	r1, r5
 80217f8:	4620      	mov	r0, r4
 80217fa:	f001 f823 	bl	8022844 <dhcp_option_long>
 80217fe:	4603      	mov	r3, r0
 8021800:	81bb      	strh	r3, [r7, #12]

    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_PARAMETER_REQUEST_LIST, LWIP_ARRAYSIZE(dhcp_discover_request_options));
 8021802:	89b8      	ldrh	r0, [r7, #12]
 8021804:	693b      	ldr	r3, [r7, #16]
 8021806:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 802180a:	2303      	movs	r3, #3
 802180c:	2237      	movs	r2, #55	@ 0x37
 802180e:	f000 ff8d 	bl	802272c <dhcp_option>
 8021812:	4603      	mov	r3, r0
 8021814:	81bb      	strh	r3, [r7, #12]
    for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
 8021816:	2300      	movs	r3, #0
 8021818:	77fb      	strb	r3, [r7, #31]
 802181a:	e00e      	b.n	802183a <dhcp_select+0x136>
      options_out_len = dhcp_option_byte(options_out_len, msg_out->options, dhcp_discover_request_options[i]);
 802181c:	89b8      	ldrh	r0, [r7, #12]
 802181e:	693b      	ldr	r3, [r7, #16]
 8021820:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8021824:	7ffb      	ldrb	r3, [r7, #31]
 8021826:	4a30      	ldr	r2, [pc, #192]	@ (80218e8 <dhcp_select+0x1e4>)
 8021828:	5cd3      	ldrb	r3, [r2, r3]
 802182a:	461a      	mov	r2, r3
 802182c:	f000 ffb2 	bl	8022794 <dhcp_option_byte>
 8021830:	4603      	mov	r3, r0
 8021832:	81bb      	strh	r3, [r7, #12]
    for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
 8021834:	7ffb      	ldrb	r3, [r7, #31]
 8021836:	3301      	adds	r3, #1
 8021838:	77fb      	strb	r3, [r7, #31]
 802183a:	7ffb      	ldrb	r3, [r7, #31]
 802183c:	2b02      	cmp	r3, #2
 802183e:	d9ed      	bls.n	802181c <dhcp_select+0x118>
#if LWIP_NETIF_HOSTNAME
    options_out_len = dhcp_option_hostname(options_out_len, msg_out->options, netif);
#endif /* LWIP_NETIF_HOSTNAME */

    LWIP_HOOK_DHCP_APPEND_OPTIONS(netif, dhcp, DHCP_STATE_REQUESTING, msg_out, DHCP_REQUEST, &options_out_len);
    dhcp_option_trailer(options_out_len, msg_out->options, p_out);
 8021840:	89b8      	ldrh	r0, [r7, #12]
 8021842:	693b      	ldr	r3, [r7, #16]
 8021844:	33f0      	adds	r3, #240	@ 0xf0
 8021846:	697a      	ldr	r2, [r7, #20]
 8021848:	4619      	mov	r1, r3
 802184a:	f001 fcc3 	bl	80231d4 <dhcp_option_trailer>

    /* send broadcast to any DHCP server */
    result = udp_sendto_if_src(dhcp_pcb, p_out, IP_ADDR_BROADCAST, LWIP_IANA_PORT_DHCP_SERVER, netif, IP4_ADDR_ANY);
 802184e:	4b27      	ldr	r3, [pc, #156]	@ (80218ec <dhcp_select+0x1e8>)
 8021850:	6818      	ldr	r0, [r3, #0]
 8021852:	4b27      	ldr	r3, [pc, #156]	@ (80218f0 <dhcp_select+0x1ec>)
 8021854:	9301      	str	r3, [sp, #4]
 8021856:	687b      	ldr	r3, [r7, #4]
 8021858:	9300      	str	r3, [sp, #0]
 802185a:	2343      	movs	r3, #67	@ 0x43
 802185c:	4a25      	ldr	r2, [pc, #148]	@ (80218f4 <dhcp_select+0x1f0>)
 802185e:	6979      	ldr	r1, [r7, #20]
 8021860:	f7ff fb96 	bl	8020f90 <udp_sendto_if_src>
 8021864:	4603      	mov	r3, r0
 8021866:	77bb      	strb	r3, [r7, #30]
    pbuf_free(p_out);
 8021868:	6978      	ldr	r0, [r7, #20]
 802186a:	f7f8 fbd7 	bl	801a01c <pbuf_free>
 802186e:	e001      	b.n	8021874 <dhcp_select+0x170>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_select: REQUESTING\n"));
  } else {
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, ("dhcp_select: could not allocate DHCP request\n"));
    result = ERR_MEM;
 8021870:	23ff      	movs	r3, #255	@ 0xff
 8021872:	77bb      	strb	r3, [r7, #30]
  }
  if (dhcp->tries < 255) {
 8021874:	69bb      	ldr	r3, [r7, #24]
 8021876:	799b      	ldrb	r3, [r3, #6]
 8021878:	2bff      	cmp	r3, #255	@ 0xff
 802187a:	d005      	beq.n	8021888 <dhcp_select+0x184>
    dhcp->tries++;
 802187c:	69bb      	ldr	r3, [r7, #24]
 802187e:	799b      	ldrb	r3, [r3, #6]
 8021880:	3301      	adds	r3, #1
 8021882:	b2da      	uxtb	r2, r3
 8021884:	69bb      	ldr	r3, [r7, #24]
 8021886:	719a      	strb	r2, [r3, #6]
  }
  msecs = (u16_t)((dhcp->tries < 6 ? 1 << dhcp->tries : 60) * 1000);
 8021888:	69bb      	ldr	r3, [r7, #24]
 802188a:	799b      	ldrb	r3, [r3, #6]
 802188c:	2b05      	cmp	r3, #5
 802188e:	d80d      	bhi.n	80218ac <dhcp_select+0x1a8>
 8021890:	69bb      	ldr	r3, [r7, #24]
 8021892:	799b      	ldrb	r3, [r3, #6]
 8021894:	461a      	mov	r2, r3
 8021896:	2301      	movs	r3, #1
 8021898:	4093      	lsls	r3, r2
 802189a:	b29b      	uxth	r3, r3
 802189c:	461a      	mov	r2, r3
 802189e:	0152      	lsls	r2, r2, #5
 80218a0:	1ad2      	subs	r2, r2, r3
 80218a2:	0092      	lsls	r2, r2, #2
 80218a4:	4413      	add	r3, r2
 80218a6:	00db      	lsls	r3, r3, #3
 80218a8:	b29b      	uxth	r3, r3
 80218aa:	e001      	b.n	80218b0 <dhcp_select+0x1ac>
 80218ac:	f64e 2360 	movw	r3, #60000	@ 0xea60
 80218b0:	81fb      	strh	r3, [r7, #14]
  dhcp->request_timeout = (u16_t)((msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS);
 80218b2:	89fb      	ldrh	r3, [r7, #14]
 80218b4:	f203 13f3 	addw	r3, r3, #499	@ 0x1f3
 80218b8:	4a0f      	ldr	r2, [pc, #60]	@ (80218f8 <dhcp_select+0x1f4>)
 80218ba:	fb82 1203 	smull	r1, r2, r2, r3
 80218be:	1152      	asrs	r2, r2, #5
 80218c0:	17db      	asrs	r3, r3, #31
 80218c2:	1ad3      	subs	r3, r2, r3
 80218c4:	b29a      	uxth	r2, r3
 80218c6:	69bb      	ldr	r3, [r7, #24]
 80218c8:	811a      	strh	r2, [r3, #8]
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_STATE, ("dhcp_select(): set request timeout %"U16_F" msecs\n", msecs));
  return result;
 80218ca:	f997 301e 	ldrsb.w	r3, [r7, #30]
}
 80218ce:	4618      	mov	r0, r3
 80218d0:	3720      	adds	r7, #32
 80218d2:	46bd      	mov	sp, r7
 80218d4:	bdb0      	pop	{r4, r5, r7, pc}
 80218d6:	bf00      	nop
 80218d8:	0802f9e8 	.word	0x0802f9e8
 80218dc:	0802fa94 	.word	0x0802fa94
 80218e0:	0802fa48 	.word	0x0802fa48
 80218e4:	0802fab0 	.word	0x0802fab0
 80218e8:	24000044 	.word	0x24000044
 80218ec:	2402a078 	.word	0x2402a078
 80218f0:	080307a4 	.word	0x080307a4
 80218f4:	080307a8 	.word	0x080307a8
 80218f8:	10624dd3 	.word	0x10624dd3

080218fc <dhcp_coarse_tmr>:
 * The DHCP timer that checks for lease renewal/rebind timeouts.
 * Must be called once a minute (see @ref DHCP_COARSE_TIMER_SECS).
 */
void
dhcp_coarse_tmr(void)
{
 80218fc:	b580      	push	{r7, lr}
 80218fe:	b082      	sub	sp, #8
 8021900:	af00      	add	r7, sp, #0
  struct netif *netif;
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_coarse_tmr()\n"));
  /* iterate through all network interfaces */
  NETIF_FOREACH(netif) {
 8021902:	4b27      	ldr	r3, [pc, #156]	@ (80219a0 <dhcp_coarse_tmr+0xa4>)
 8021904:	681b      	ldr	r3, [r3, #0]
 8021906:	607b      	str	r3, [r7, #4]
 8021908:	e042      	b.n	8021990 <dhcp_coarse_tmr+0x94>
    /* only act on DHCP configured interfaces */
    struct dhcp *dhcp = netif_dhcp_data(netif);
 802190a:	687b      	ldr	r3, [r7, #4]
 802190c:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 802190e:	603b      	str	r3, [r7, #0]
    if ((dhcp != NULL) && (dhcp->state != DHCP_STATE_OFF)) {
 8021910:	683b      	ldr	r3, [r7, #0]
 8021912:	2b00      	cmp	r3, #0
 8021914:	d039      	beq.n	802198a <dhcp_coarse_tmr+0x8e>
 8021916:	683b      	ldr	r3, [r7, #0]
 8021918:	795b      	ldrb	r3, [r3, #5]
 802191a:	2b00      	cmp	r3, #0
 802191c:	d035      	beq.n	802198a <dhcp_coarse_tmr+0x8e>
      /* compare lease time to expire timeout */
      if (dhcp->t0_timeout && (++dhcp->lease_used == dhcp->t0_timeout)) {
 802191e:	683b      	ldr	r3, [r7, #0]
 8021920:	8a9b      	ldrh	r3, [r3, #20]
 8021922:	2b00      	cmp	r3, #0
 8021924:	d012      	beq.n	802194c <dhcp_coarse_tmr+0x50>
 8021926:	683b      	ldr	r3, [r7, #0]
 8021928:	8a5b      	ldrh	r3, [r3, #18]
 802192a:	3301      	adds	r3, #1
 802192c:	b29a      	uxth	r2, r3
 802192e:	683b      	ldr	r3, [r7, #0]
 8021930:	825a      	strh	r2, [r3, #18]
 8021932:	683b      	ldr	r3, [r7, #0]
 8021934:	8a5a      	ldrh	r2, [r3, #18]
 8021936:	683b      	ldr	r3, [r7, #0]
 8021938:	8a9b      	ldrh	r3, [r3, #20]
 802193a:	429a      	cmp	r2, r3
 802193c:	d106      	bne.n	802194c <dhcp_coarse_tmr+0x50>
        LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_coarse_tmr(): t0 timeout\n"));
        /* this clients' lease time has expired */
        dhcp_release_and_stop(netif);
 802193e:	6878      	ldr	r0, [r7, #4]
 8021940:	f000 fe32 	bl	80225a8 <dhcp_release_and_stop>
        dhcp_start(netif);
 8021944:	6878      	ldr	r0, [r7, #4]
 8021946:	f000 f96b 	bl	8021c20 <dhcp_start>
 802194a:	e01e      	b.n	802198a <dhcp_coarse_tmr+0x8e>
        /* timer is active (non zero), and triggers (zeroes) now? */
      } else if (dhcp->t2_rebind_time && (dhcp->t2_rebind_time-- == 1)) {
 802194c:	683b      	ldr	r3, [r7, #0]
 802194e:	8a1b      	ldrh	r3, [r3, #16]
 8021950:	2b00      	cmp	r3, #0
 8021952:	d00b      	beq.n	802196c <dhcp_coarse_tmr+0x70>
 8021954:	683b      	ldr	r3, [r7, #0]
 8021956:	8a1b      	ldrh	r3, [r3, #16]
 8021958:	1e5a      	subs	r2, r3, #1
 802195a:	b291      	uxth	r1, r2
 802195c:	683a      	ldr	r2, [r7, #0]
 802195e:	8211      	strh	r1, [r2, #16]
 8021960:	2b01      	cmp	r3, #1
 8021962:	d103      	bne.n	802196c <dhcp_coarse_tmr+0x70>
        LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_coarse_tmr(): t2 timeout\n"));
        /* this clients' rebind timeout triggered */
        dhcp_t2_timeout(netif);
 8021964:	6878      	ldr	r0, [r7, #4]
 8021966:	f000 f8c7 	bl	8021af8 <dhcp_t2_timeout>
 802196a:	e00e      	b.n	802198a <dhcp_coarse_tmr+0x8e>
        /* timer is active (non zero), and triggers (zeroes) now */
      } else if (dhcp->t1_renew_time && (dhcp->t1_renew_time-- == 1)) {
 802196c:	683b      	ldr	r3, [r7, #0]
 802196e:	89db      	ldrh	r3, [r3, #14]
 8021970:	2b00      	cmp	r3, #0
 8021972:	d00a      	beq.n	802198a <dhcp_coarse_tmr+0x8e>
 8021974:	683b      	ldr	r3, [r7, #0]
 8021976:	89db      	ldrh	r3, [r3, #14]
 8021978:	1e5a      	subs	r2, r3, #1
 802197a:	b291      	uxth	r1, r2
 802197c:	683a      	ldr	r2, [r7, #0]
 802197e:	81d1      	strh	r1, [r2, #14]
 8021980:	2b01      	cmp	r3, #1
 8021982:	d102      	bne.n	802198a <dhcp_coarse_tmr+0x8e>
        LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_coarse_tmr(): t1 timeout\n"));
        /* this clients' renewal timeout triggered */
        dhcp_t1_timeout(netif);
 8021984:	6878      	ldr	r0, [r7, #4]
 8021986:	f000 f888 	bl	8021a9a <dhcp_t1_timeout>
  NETIF_FOREACH(netif) {
 802198a:	687b      	ldr	r3, [r7, #4]
 802198c:	681b      	ldr	r3, [r3, #0]
 802198e:	607b      	str	r3, [r7, #4]
 8021990:	687b      	ldr	r3, [r7, #4]
 8021992:	2b00      	cmp	r3, #0
 8021994:	d1b9      	bne.n	802190a <dhcp_coarse_tmr+0xe>
      }
    }
  }
}
 8021996:	bf00      	nop
 8021998:	bf00      	nop
 802199a:	3708      	adds	r7, #8
 802199c:	46bd      	mov	sp, r7
 802199e:	bd80      	pop	{r7, pc}
 80219a0:	24029fe0 	.word	0x24029fe0

080219a4 <dhcp_fine_tmr>:
 * A DHCP server is expected to respond within a short period of time.
 * This timer checks whether an outstanding DHCP request is timed out.
 */
void
dhcp_fine_tmr(void)
{
 80219a4:	b580      	push	{r7, lr}
 80219a6:	b082      	sub	sp, #8
 80219a8:	af00      	add	r7, sp, #0
  struct netif *netif;
  /* loop through netif's */
  NETIF_FOREACH(netif) {
 80219aa:	4b16      	ldr	r3, [pc, #88]	@ (8021a04 <dhcp_fine_tmr+0x60>)
 80219ac:	681b      	ldr	r3, [r3, #0]
 80219ae:	607b      	str	r3, [r7, #4]
 80219b0:	e020      	b.n	80219f4 <dhcp_fine_tmr+0x50>
    struct dhcp *dhcp = netif_dhcp_data(netif);
 80219b2:	687b      	ldr	r3, [r7, #4]
 80219b4:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 80219b6:	603b      	str	r3, [r7, #0]
    /* only act on DHCP configured interfaces */
    if (dhcp != NULL) {
 80219b8:	683b      	ldr	r3, [r7, #0]
 80219ba:	2b00      	cmp	r3, #0
 80219bc:	d017      	beq.n	80219ee <dhcp_fine_tmr+0x4a>
      /* timer is active (non zero), and is about to trigger now */
      if (dhcp->request_timeout > 1) {
 80219be:	683b      	ldr	r3, [r7, #0]
 80219c0:	891b      	ldrh	r3, [r3, #8]
 80219c2:	2b01      	cmp	r3, #1
 80219c4:	d906      	bls.n	80219d4 <dhcp_fine_tmr+0x30>
        dhcp->request_timeout--;
 80219c6:	683b      	ldr	r3, [r7, #0]
 80219c8:	891b      	ldrh	r3, [r3, #8]
 80219ca:	3b01      	subs	r3, #1
 80219cc:	b29a      	uxth	r2, r3
 80219ce:	683b      	ldr	r3, [r7, #0]
 80219d0:	811a      	strh	r2, [r3, #8]
 80219d2:	e00c      	b.n	80219ee <dhcp_fine_tmr+0x4a>
      } else if (dhcp->request_timeout == 1) {
 80219d4:	683b      	ldr	r3, [r7, #0]
 80219d6:	891b      	ldrh	r3, [r3, #8]
 80219d8:	2b01      	cmp	r3, #1
 80219da:	d108      	bne.n	80219ee <dhcp_fine_tmr+0x4a>
        dhcp->request_timeout--;
 80219dc:	683b      	ldr	r3, [r7, #0]
 80219de:	891b      	ldrh	r3, [r3, #8]
 80219e0:	3b01      	subs	r3, #1
 80219e2:	b29a      	uxth	r2, r3
 80219e4:	683b      	ldr	r3, [r7, #0]
 80219e6:	811a      	strh	r2, [r3, #8]
        /* { dhcp->request_timeout == 0 } */
        LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_fine_tmr(): request timeout\n"));
        /* this client's request timeout triggered */
        dhcp_timeout(netif);
 80219e8:	6878      	ldr	r0, [r7, #4]
 80219ea:	f000 f80d 	bl	8021a08 <dhcp_timeout>
  NETIF_FOREACH(netif) {
 80219ee:	687b      	ldr	r3, [r7, #4]
 80219f0:	681b      	ldr	r3, [r3, #0]
 80219f2:	607b      	str	r3, [r7, #4]
 80219f4:	687b      	ldr	r3, [r7, #4]
 80219f6:	2b00      	cmp	r3, #0
 80219f8:	d1db      	bne.n	80219b2 <dhcp_fine_tmr+0xe>
      }
    }
  }
}
 80219fa:	bf00      	nop
 80219fc:	bf00      	nop
 80219fe:	3708      	adds	r7, #8
 8021a00:	46bd      	mov	sp, r7
 8021a02:	bd80      	pop	{r7, pc}
 8021a04:	24029fe0 	.word	0x24029fe0

08021a08 <dhcp_timeout>:
 *
 * @param netif the netif under DHCP control
 */
static void
dhcp_timeout(struct netif *netif)
{
 8021a08:	b580      	push	{r7, lr}
 8021a0a:	b084      	sub	sp, #16
 8021a0c:	af00      	add	r7, sp, #0
 8021a0e:	6078      	str	r0, [r7, #4]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 8021a10:	687b      	ldr	r3, [r7, #4]
 8021a12:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8021a14:	60fb      	str	r3, [r7, #12]

  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_timeout()\n"));
  /* back-off period has passed, or server selection timed out */
  if ((dhcp->state == DHCP_STATE_BACKING_OFF) || (dhcp->state == DHCP_STATE_SELECTING)) {
 8021a16:	68fb      	ldr	r3, [r7, #12]
 8021a18:	795b      	ldrb	r3, [r3, #5]
 8021a1a:	2b0c      	cmp	r3, #12
 8021a1c:	d003      	beq.n	8021a26 <dhcp_timeout+0x1e>
 8021a1e:	68fb      	ldr	r3, [r7, #12]
 8021a20:	795b      	ldrb	r3, [r3, #5]
 8021a22:	2b06      	cmp	r3, #6
 8021a24:	d103      	bne.n	8021a2e <dhcp_timeout+0x26>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_timeout(): restarting discovery\n"));
    dhcp_discover(netif);
 8021a26:	6878      	ldr	r0, [r7, #4]
 8021a28:	f000 fa58 	bl	8021edc <dhcp_discover>
      dhcp_reboot(netif);
    } else {
      dhcp_discover(netif);
    }
  }
}
 8021a2c:	e031      	b.n	8021a92 <dhcp_timeout+0x8a>
  } else if (dhcp->state == DHCP_STATE_REQUESTING) {
 8021a2e:	68fb      	ldr	r3, [r7, #12]
 8021a30:	795b      	ldrb	r3, [r3, #5]
 8021a32:	2b01      	cmp	r3, #1
 8021a34:	d10e      	bne.n	8021a54 <dhcp_timeout+0x4c>
    if (dhcp->tries <= 5) {
 8021a36:	68fb      	ldr	r3, [r7, #12]
 8021a38:	799b      	ldrb	r3, [r3, #6]
 8021a3a:	2b05      	cmp	r3, #5
 8021a3c:	d803      	bhi.n	8021a46 <dhcp_timeout+0x3e>
      dhcp_select(netif);
 8021a3e:	6878      	ldr	r0, [r7, #4]
 8021a40:	f7ff fe60 	bl	8021704 <dhcp_select>
}
 8021a44:	e025      	b.n	8021a92 <dhcp_timeout+0x8a>
      dhcp_release_and_stop(netif);
 8021a46:	6878      	ldr	r0, [r7, #4]
 8021a48:	f000 fdae 	bl	80225a8 <dhcp_release_and_stop>
      dhcp_start(netif);
 8021a4c:	6878      	ldr	r0, [r7, #4]
 8021a4e:	f000 f8e7 	bl	8021c20 <dhcp_start>
}
 8021a52:	e01e      	b.n	8021a92 <dhcp_timeout+0x8a>
  } else if (dhcp->state == DHCP_STATE_CHECKING) {
 8021a54:	68fb      	ldr	r3, [r7, #12]
 8021a56:	795b      	ldrb	r3, [r3, #5]
 8021a58:	2b08      	cmp	r3, #8
 8021a5a:	d10b      	bne.n	8021a74 <dhcp_timeout+0x6c>
    if (dhcp->tries <= 1) {
 8021a5c:	68fb      	ldr	r3, [r7, #12]
 8021a5e:	799b      	ldrb	r3, [r3, #6]
 8021a60:	2b01      	cmp	r3, #1
 8021a62:	d803      	bhi.n	8021a6c <dhcp_timeout+0x64>
      dhcp_check(netif);
 8021a64:	6878      	ldr	r0, [r7, #4]
 8021a66:	f7ff fdf3 	bl	8021650 <dhcp_check>
}
 8021a6a:	e012      	b.n	8021a92 <dhcp_timeout+0x8a>
      dhcp_bind(netif);
 8021a6c:	6878      	ldr	r0, [r7, #4]
 8021a6e:	f000 fad7 	bl	8022020 <dhcp_bind>
}
 8021a72:	e00e      	b.n	8021a92 <dhcp_timeout+0x8a>
  } else if (dhcp->state == DHCP_STATE_REBOOTING) {
 8021a74:	68fb      	ldr	r3, [r7, #12]
 8021a76:	795b      	ldrb	r3, [r3, #5]
 8021a78:	2b03      	cmp	r3, #3
 8021a7a:	d10a      	bne.n	8021a92 <dhcp_timeout+0x8a>
    if (dhcp->tries < REBOOT_TRIES) {
 8021a7c:	68fb      	ldr	r3, [r7, #12]
 8021a7e:	799b      	ldrb	r3, [r3, #6]
 8021a80:	2b01      	cmp	r3, #1
 8021a82:	d803      	bhi.n	8021a8c <dhcp_timeout+0x84>
      dhcp_reboot(netif);
 8021a84:	6878      	ldr	r0, [r7, #4]
 8021a86:	f000 fcdb 	bl	8022440 <dhcp_reboot>
}
 8021a8a:	e002      	b.n	8021a92 <dhcp_timeout+0x8a>
      dhcp_discover(netif);
 8021a8c:	6878      	ldr	r0, [r7, #4]
 8021a8e:	f000 fa25 	bl	8021edc <dhcp_discover>
}
 8021a92:	bf00      	nop
 8021a94:	3710      	adds	r7, #16
 8021a96:	46bd      	mov	sp, r7
 8021a98:	bd80      	pop	{r7, pc}

08021a9a <dhcp_t1_timeout>:
 *
 * @param netif the netif under DHCP control
 */
static void
dhcp_t1_timeout(struct netif *netif)
{
 8021a9a:	b580      	push	{r7, lr}
 8021a9c:	b084      	sub	sp, #16
 8021a9e:	af00      	add	r7, sp, #0
 8021aa0:	6078      	str	r0, [r7, #4]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 8021aa2:	687b      	ldr	r3, [r7, #4]
 8021aa4:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8021aa6:	60fb      	str	r3, [r7, #12]

  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_STATE, ("dhcp_t1_timeout()\n"));
  if ((dhcp->state == DHCP_STATE_REQUESTING) || (dhcp->state == DHCP_STATE_BOUND) ||
 8021aa8:	68fb      	ldr	r3, [r7, #12]
 8021aaa:	795b      	ldrb	r3, [r3, #5]
 8021aac:	2b01      	cmp	r3, #1
 8021aae:	d007      	beq.n	8021ac0 <dhcp_t1_timeout+0x26>
 8021ab0:	68fb      	ldr	r3, [r7, #12]
 8021ab2:	795b      	ldrb	r3, [r3, #5]
 8021ab4:	2b0a      	cmp	r3, #10
 8021ab6:	d003      	beq.n	8021ac0 <dhcp_t1_timeout+0x26>
      (dhcp->state == DHCP_STATE_RENEWING)) {
 8021ab8:	68fb      	ldr	r3, [r7, #12]
 8021aba:	795b      	ldrb	r3, [r3, #5]
  if ((dhcp->state == DHCP_STATE_REQUESTING) || (dhcp->state == DHCP_STATE_BOUND) ||
 8021abc:	2b05      	cmp	r3, #5
 8021abe:	d117      	bne.n	8021af0 <dhcp_t1_timeout+0x56>
     * eventually time-out if renew tries fail. */
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE,
                ("dhcp_t1_timeout(): must renew\n"));
    /* This slightly different to RFC2131: DHCPREQUEST will be sent from state
       DHCP_STATE_RENEWING, not DHCP_STATE_BOUND */
    dhcp_renew(netif);
 8021ac0:	6878      	ldr	r0, [r7, #4]
 8021ac2:	f000 fb87 	bl	80221d4 <dhcp_renew>
    /* Calculate next timeout */
    if (((dhcp->t2_timeout - dhcp->lease_used) / 2) >= ((60 + DHCP_COARSE_TIMER_SECS / 2) / DHCP_COARSE_TIMER_SECS)) {
 8021ac6:	68fb      	ldr	r3, [r7, #12]
 8021ac8:	899b      	ldrh	r3, [r3, #12]
 8021aca:	461a      	mov	r2, r3
 8021acc:	68fb      	ldr	r3, [r7, #12]
 8021ace:	8a5b      	ldrh	r3, [r3, #18]
 8021ad0:	1ad3      	subs	r3, r2, r3
 8021ad2:	2b01      	cmp	r3, #1
 8021ad4:	dd0c      	ble.n	8021af0 <dhcp_t1_timeout+0x56>
      dhcp->t1_renew_time = (u16_t)((dhcp->t2_timeout - dhcp->lease_used) / 2);
 8021ad6:	68fb      	ldr	r3, [r7, #12]
 8021ad8:	899b      	ldrh	r3, [r3, #12]
 8021ada:	461a      	mov	r2, r3
 8021adc:	68fb      	ldr	r3, [r7, #12]
 8021ade:	8a5b      	ldrh	r3, [r3, #18]
 8021ae0:	1ad3      	subs	r3, r2, r3
 8021ae2:	2b00      	cmp	r3, #0
 8021ae4:	da00      	bge.n	8021ae8 <dhcp_t1_timeout+0x4e>
 8021ae6:	3301      	adds	r3, #1
 8021ae8:	105b      	asrs	r3, r3, #1
 8021aea:	b29a      	uxth	r2, r3
 8021aec:	68fb      	ldr	r3, [r7, #12]
 8021aee:	81da      	strh	r2, [r3, #14]
    }
  }
}
 8021af0:	bf00      	nop
 8021af2:	3710      	adds	r7, #16
 8021af4:	46bd      	mov	sp, r7
 8021af6:	bd80      	pop	{r7, pc}

08021af8 <dhcp_t2_timeout>:
 *
 * @param netif the netif under DHCP control
 */
static void
dhcp_t2_timeout(struct netif *netif)
{
 8021af8:	b580      	push	{r7, lr}
 8021afa:	b084      	sub	sp, #16
 8021afc:	af00      	add	r7, sp, #0
 8021afe:	6078      	str	r0, [r7, #4]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 8021b00:	687b      	ldr	r3, [r7, #4]
 8021b02:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8021b04:	60fb      	str	r3, [r7, #12]

  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_t2_timeout()\n"));
  if ((dhcp->state == DHCP_STATE_REQUESTING) || (dhcp->state == DHCP_STATE_BOUND) ||
 8021b06:	68fb      	ldr	r3, [r7, #12]
 8021b08:	795b      	ldrb	r3, [r3, #5]
 8021b0a:	2b01      	cmp	r3, #1
 8021b0c:	d00b      	beq.n	8021b26 <dhcp_t2_timeout+0x2e>
 8021b0e:	68fb      	ldr	r3, [r7, #12]
 8021b10:	795b      	ldrb	r3, [r3, #5]
 8021b12:	2b0a      	cmp	r3, #10
 8021b14:	d007      	beq.n	8021b26 <dhcp_t2_timeout+0x2e>
      (dhcp->state == DHCP_STATE_RENEWING) || (dhcp->state == DHCP_STATE_REBINDING)) {
 8021b16:	68fb      	ldr	r3, [r7, #12]
 8021b18:	795b      	ldrb	r3, [r3, #5]
  if ((dhcp->state == DHCP_STATE_REQUESTING) || (dhcp->state == DHCP_STATE_BOUND) ||
 8021b1a:	2b05      	cmp	r3, #5
 8021b1c:	d003      	beq.n	8021b26 <dhcp_t2_timeout+0x2e>
      (dhcp->state == DHCP_STATE_RENEWING) || (dhcp->state == DHCP_STATE_REBINDING)) {
 8021b1e:	68fb      	ldr	r3, [r7, #12]
 8021b20:	795b      	ldrb	r3, [r3, #5]
 8021b22:	2b04      	cmp	r3, #4
 8021b24:	d117      	bne.n	8021b56 <dhcp_t2_timeout+0x5e>
    /* just retry to rebind */
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE,
                ("dhcp_t2_timeout(): must rebind\n"));
    /* This slightly different to RFC2131: DHCPREQUEST will be sent from state
       DHCP_STATE_REBINDING, not DHCP_STATE_BOUND */
    dhcp_rebind(netif);
 8021b26:	6878      	ldr	r0, [r7, #4]
 8021b28:	f000 fbf0 	bl	802230c <dhcp_rebind>
    /* Calculate next timeout */
    if (((dhcp->t0_timeout - dhcp->lease_used) / 2) >= ((60 + DHCP_COARSE_TIMER_SECS / 2) / DHCP_COARSE_TIMER_SECS)) {
 8021b2c:	68fb      	ldr	r3, [r7, #12]
 8021b2e:	8a9b      	ldrh	r3, [r3, #20]
 8021b30:	461a      	mov	r2, r3
 8021b32:	68fb      	ldr	r3, [r7, #12]
 8021b34:	8a5b      	ldrh	r3, [r3, #18]
 8021b36:	1ad3      	subs	r3, r2, r3
 8021b38:	2b01      	cmp	r3, #1
 8021b3a:	dd0c      	ble.n	8021b56 <dhcp_t2_timeout+0x5e>
      dhcp->t2_rebind_time = (u16_t)((dhcp->t0_timeout - dhcp->lease_used) / 2);
 8021b3c:	68fb      	ldr	r3, [r7, #12]
 8021b3e:	8a9b      	ldrh	r3, [r3, #20]
 8021b40:	461a      	mov	r2, r3
 8021b42:	68fb      	ldr	r3, [r7, #12]
 8021b44:	8a5b      	ldrh	r3, [r3, #18]
 8021b46:	1ad3      	subs	r3, r2, r3
 8021b48:	2b00      	cmp	r3, #0
 8021b4a:	da00      	bge.n	8021b4e <dhcp_t2_timeout+0x56>
 8021b4c:	3301      	adds	r3, #1
 8021b4e:	105b      	asrs	r3, r3, #1
 8021b50:	b29a      	uxth	r2, r3
 8021b52:	68fb      	ldr	r3, [r7, #12]
 8021b54:	821a      	strh	r2, [r3, #16]
    }
  }
}
 8021b56:	bf00      	nop
 8021b58:	3710      	adds	r7, #16
 8021b5a:	46bd      	mov	sp, r7
 8021b5c:	bd80      	pop	{r7, pc}
	...

08021b60 <dhcp_handle_ack>:
 *
 * @param netif the netif under DHCP control
 */
static void
dhcp_handle_ack(struct netif *netif, struct dhcp_msg *msg_in)
{
 8021b60:	b580      	push	{r7, lr}
 8021b62:	b084      	sub	sp, #16
 8021b64:	af00      	add	r7, sp, #0
 8021b66:	6078      	str	r0, [r7, #4]
 8021b68:	6039      	str	r1, [r7, #0]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 8021b6a:	687b      	ldr	r3, [r7, #4]
 8021b6c:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8021b6e:	60fb      	str	r3, [r7, #12]
#if LWIP_DHCP_GET_NTP_SRV
  ip4_addr_t ntp_server_addrs[LWIP_DHCP_MAX_NTP_SERVERS];
#endif

  /* clear options we might not get from the ACK */
  ip4_addr_set_zero(&dhcp->offered_sn_mask);
 8021b70:	68fb      	ldr	r3, [r7, #12]
 8021b72:	2200      	movs	r2, #0
 8021b74:	621a      	str	r2, [r3, #32]
  ip4_addr_set_zero(&dhcp->offered_gw_addr);
 8021b76:	68fb      	ldr	r3, [r7, #12]
 8021b78:	2200      	movs	r2, #0
 8021b7a:	625a      	str	r2, [r3, #36]	@ 0x24
#if LWIP_DHCP_BOOTP_FILE
  ip4_addr_set_zero(&dhcp->offered_si_addr);
#endif /* LWIP_DHCP_BOOTP_FILE */

  /* lease time given? */
  if (dhcp_option_given(dhcp, DHCP_OPTION_IDX_LEASE_TIME)) {
 8021b7c:	4b26      	ldr	r3, [pc, #152]	@ (8021c18 <dhcp_handle_ack+0xb8>)
 8021b7e:	78db      	ldrb	r3, [r3, #3]
 8021b80:	2b00      	cmp	r3, #0
 8021b82:	d003      	beq.n	8021b8c <dhcp_handle_ack+0x2c>
    /* remember offered lease time */
    dhcp->offered_t0_lease = dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_LEASE_TIME);
 8021b84:	4b25      	ldr	r3, [pc, #148]	@ (8021c1c <dhcp_handle_ack+0xbc>)
 8021b86:	68da      	ldr	r2, [r3, #12]
 8021b88:	68fb      	ldr	r3, [r7, #12]
 8021b8a:	629a      	str	r2, [r3, #40]	@ 0x28
  }
  /* renewal period given? */
  if (dhcp_option_given(dhcp, DHCP_OPTION_IDX_T1)) {
 8021b8c:	4b22      	ldr	r3, [pc, #136]	@ (8021c18 <dhcp_handle_ack+0xb8>)
 8021b8e:	791b      	ldrb	r3, [r3, #4]
 8021b90:	2b00      	cmp	r3, #0
 8021b92:	d004      	beq.n	8021b9e <dhcp_handle_ack+0x3e>
    /* remember given renewal period */
    dhcp->offered_t1_renew = dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_T1);
 8021b94:	4b21      	ldr	r3, [pc, #132]	@ (8021c1c <dhcp_handle_ack+0xbc>)
 8021b96:	691a      	ldr	r2, [r3, #16]
 8021b98:	68fb      	ldr	r3, [r7, #12]
 8021b9a:	62da      	str	r2, [r3, #44]	@ 0x2c
 8021b9c:	e004      	b.n	8021ba8 <dhcp_handle_ack+0x48>
  } else {
    /* calculate safe periods for renewal */
    dhcp->offered_t1_renew = dhcp->offered_t0_lease / 2;
 8021b9e:	68fb      	ldr	r3, [r7, #12]
 8021ba0:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 8021ba2:	085a      	lsrs	r2, r3, #1
 8021ba4:	68fb      	ldr	r3, [r7, #12]
 8021ba6:	62da      	str	r2, [r3, #44]	@ 0x2c
  }

  /* renewal period given? */
  if (dhcp_option_given(dhcp, DHCP_OPTION_IDX_T2)) {
 8021ba8:	4b1b      	ldr	r3, [pc, #108]	@ (8021c18 <dhcp_handle_ack+0xb8>)
 8021baa:	795b      	ldrb	r3, [r3, #5]
 8021bac:	2b00      	cmp	r3, #0
 8021bae:	d004      	beq.n	8021bba <dhcp_handle_ack+0x5a>
    /* remember given rebind period */
    dhcp->offered_t2_rebind = dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_T2);
 8021bb0:	4b1a      	ldr	r3, [pc, #104]	@ (8021c1c <dhcp_handle_ack+0xbc>)
 8021bb2:	695a      	ldr	r2, [r3, #20]
 8021bb4:	68fb      	ldr	r3, [r7, #12]
 8021bb6:	631a      	str	r2, [r3, #48]	@ 0x30
 8021bb8:	e007      	b.n	8021bca <dhcp_handle_ack+0x6a>
  } else {
    /* calculate safe periods for rebinding (offered_t0_lease * 0.875 -> 87.5%)*/
    dhcp->offered_t2_rebind = (dhcp->offered_t0_lease * 7U) / 8U;
 8021bba:	68fb      	ldr	r3, [r7, #12]
 8021bbc:	6a9a      	ldr	r2, [r3, #40]	@ 0x28
 8021bbe:	4613      	mov	r3, r2
 8021bc0:	00db      	lsls	r3, r3, #3
 8021bc2:	1a9b      	subs	r3, r3, r2
 8021bc4:	08da      	lsrs	r2, r3, #3
 8021bc6:	68fb      	ldr	r3, [r7, #12]
 8021bc8:	631a      	str	r2, [r3, #48]	@ 0x30
  }

  /* (y)our internet address */
  ip4_addr_copy(dhcp->offered_ip_addr, msg_in->yiaddr);
 8021bca:	683b      	ldr	r3, [r7, #0]
 8021bcc:	691a      	ldr	r2, [r3, #16]
 8021bce:	68fb      	ldr	r3, [r7, #12]
 8021bd0:	61da      	str	r2, [r3, #28]
     boot file name copied in dhcp_parse_reply if not overloaded */
  ip4_addr_copy(dhcp->offered_si_addr, msg_in->siaddr);
#endif /* LWIP_DHCP_BOOTP_FILE */

  /* subnet mask given? */
  if (dhcp_option_given(dhcp, DHCP_OPTION_IDX_SUBNET_MASK)) {
 8021bd2:	4b11      	ldr	r3, [pc, #68]	@ (8021c18 <dhcp_handle_ack+0xb8>)
 8021bd4:	799b      	ldrb	r3, [r3, #6]
 8021bd6:	2b00      	cmp	r3, #0
 8021bd8:	d00b      	beq.n	8021bf2 <dhcp_handle_ack+0x92>
    /* remember given subnet mask */
    ip4_addr_set_u32(&dhcp->offered_sn_mask, lwip_htonl(dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_SUBNET_MASK)));
 8021bda:	4b10      	ldr	r3, [pc, #64]	@ (8021c1c <dhcp_handle_ack+0xbc>)
 8021bdc:	699b      	ldr	r3, [r3, #24]
 8021bde:	4618      	mov	r0, r3
 8021be0:	f7f6 fd4f 	bl	8018682 <lwip_htonl>
 8021be4:	4602      	mov	r2, r0
 8021be6:	68fb      	ldr	r3, [r7, #12]
 8021be8:	621a      	str	r2, [r3, #32]
    dhcp->subnet_mask_given = 1;
 8021bea:	68fb      	ldr	r3, [r7, #12]
 8021bec:	2201      	movs	r2, #1
 8021bee:	71da      	strb	r2, [r3, #7]
 8021bf0:	e002      	b.n	8021bf8 <dhcp_handle_ack+0x98>
  } else {
    dhcp->subnet_mask_given = 0;
 8021bf2:	68fb      	ldr	r3, [r7, #12]
 8021bf4:	2200      	movs	r2, #0
 8021bf6:	71da      	strb	r2, [r3, #7]
  }

  /* gateway router */
  if (dhcp_option_given(dhcp, DHCP_OPTION_IDX_ROUTER)) {
 8021bf8:	4b07      	ldr	r3, [pc, #28]	@ (8021c18 <dhcp_handle_ack+0xb8>)
 8021bfa:	79db      	ldrb	r3, [r3, #7]
 8021bfc:	2b00      	cmp	r3, #0
 8021bfe:	d007      	beq.n	8021c10 <dhcp_handle_ack+0xb0>
    ip4_addr_set_u32(&dhcp->offered_gw_addr, lwip_htonl(dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_ROUTER)));
 8021c00:	4b06      	ldr	r3, [pc, #24]	@ (8021c1c <dhcp_handle_ack+0xbc>)
 8021c02:	69db      	ldr	r3, [r3, #28]
 8021c04:	4618      	mov	r0, r3
 8021c06:	f7f6 fd3c 	bl	8018682 <lwip_htonl>
 8021c0a:	4602      	mov	r2, r0
 8021c0c:	68fb      	ldr	r3, [r7, #12]
 8021c0e:	625a      	str	r2, [r3, #36]	@ 0x24
    ip_addr_t dns_addr;
    ip_addr_set_ip4_u32_val(dns_addr, lwip_htonl(dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_DNS_SERVER + n)));
    dns_setserver(n, &dns_addr);
  }
#endif /* LWIP_DHCP_PROVIDE_DNS_SERVERS */
}
 8021c10:	bf00      	nop
 8021c12:	3710      	adds	r7, #16
 8021c14:	46bd      	mov	sp, r7
 8021c16:	bd80      	pop	{r7, pc}
 8021c18:	2402a070 	.word	0x2402a070
 8021c1c:	2402a050 	.word	0x2402a050

08021c20 <dhcp_start>:
 * - ERR_OK - No error
 * - ERR_MEM - Out of memory
 */
err_t
dhcp_start(struct netif *netif)
{
 8021c20:	b580      	push	{r7, lr}
 8021c22:	b084      	sub	sp, #16
 8021c24:	af00      	add	r7, sp, #0
 8021c26:	6078      	str	r0, [r7, #4]
  struct dhcp *dhcp;
  err_t result;

  LWIP_ASSERT_CORE_LOCKED();
 8021c28:	f7ee fa22 	bl	8010070 <sys_check_core_locking>
  LWIP_ERROR("netif != NULL", (netif != NULL), return ERR_ARG;);
 8021c2c:	687b      	ldr	r3, [r7, #4]
 8021c2e:	2b00      	cmp	r3, #0
 8021c30:	d109      	bne.n	8021c46 <dhcp_start+0x26>
 8021c32:	4b37      	ldr	r3, [pc, #220]	@ (8021d10 <dhcp_start+0xf0>)
 8021c34:	f240 22e7 	movw	r2, #743	@ 0x2e7
 8021c38:	4936      	ldr	r1, [pc, #216]	@ (8021d14 <dhcp_start+0xf4>)
 8021c3a:	4837      	ldr	r0, [pc, #220]	@ (8021d18 <dhcp_start+0xf8>)
 8021c3c:	f007 fc66 	bl	802950c <iprintf>
 8021c40:	f06f 030f 	mvn.w	r3, #15
 8021c44:	e060      	b.n	8021d08 <dhcp_start+0xe8>
  LWIP_ERROR("netif is not up, old style port?", netif_is_up(netif), return ERR_ARG;);
 8021c46:	687b      	ldr	r3, [r7, #4]
 8021c48:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 8021c4c:	f003 0301 	and.w	r3, r3, #1
 8021c50:	2b00      	cmp	r3, #0
 8021c52:	d109      	bne.n	8021c68 <dhcp_start+0x48>
 8021c54:	4b2e      	ldr	r3, [pc, #184]	@ (8021d10 <dhcp_start+0xf0>)
 8021c56:	f44f 723a 	mov.w	r2, #744	@ 0x2e8
 8021c5a:	4930      	ldr	r1, [pc, #192]	@ (8021d1c <dhcp_start+0xfc>)
 8021c5c:	482e      	ldr	r0, [pc, #184]	@ (8021d18 <dhcp_start+0xf8>)
 8021c5e:	f007 fc55 	bl	802950c <iprintf>
 8021c62:	f06f 030f 	mvn.w	r3, #15
 8021c66:	e04f      	b.n	8021d08 <dhcp_start+0xe8>
  dhcp = netif_dhcp_data(netif);
 8021c68:	687b      	ldr	r3, [r7, #4]
 8021c6a:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8021c6c:	60fb      	str	r3, [r7, #12]
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_start(netif=%p) %c%c%"U16_F"\n", (void *)netif, netif->name[0], netif->name[1], (u16_t)netif->num));

  /* check MTU of the netif */
  if (netif->mtu < DHCP_MAX_MSG_LEN_MIN_REQUIRED) {
 8021c6e:	687b      	ldr	r3, [r7, #4]
 8021c70:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 8021c72:	f5b3 7f10 	cmp.w	r3, #576	@ 0x240
 8021c76:	d202      	bcs.n	8021c7e <dhcp_start+0x5e>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_start(): Cannot use this netif with DHCP: MTU is too small\n"));
    return ERR_MEM;
 8021c78:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8021c7c:	e044      	b.n	8021d08 <dhcp_start+0xe8>
  }

  /* no DHCP client attached yet? */
  if (dhcp == NULL) {
 8021c7e:	68fb      	ldr	r3, [r7, #12]
 8021c80:	2b00      	cmp	r3, #0
 8021c82:	d10d      	bne.n	8021ca0 <dhcp_start+0x80>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_start(): mallocing new DHCP client\n"));
    dhcp = (struct dhcp *)mem_malloc(sizeof(struct dhcp));
 8021c84:	2034      	movs	r0, #52	@ 0x34
 8021c86:	f7f7 f8c9 	bl	8018e1c <mem_malloc>
 8021c8a:	60f8      	str	r0, [r7, #12]
    if (dhcp == NULL) {
 8021c8c:	68fb      	ldr	r3, [r7, #12]
 8021c8e:	2b00      	cmp	r3, #0
 8021c90:	d102      	bne.n	8021c98 <dhcp_start+0x78>
      LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_start(): could not allocate dhcp\n"));
      return ERR_MEM;
 8021c92:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8021c96:	e037      	b.n	8021d08 <dhcp_start+0xe8>
    }

    /* store this dhcp client in the netif */
    netif_set_client_data(netif, LWIP_NETIF_CLIENT_DATA_INDEX_DHCP, dhcp);
 8021c98:	687b      	ldr	r3, [r7, #4]
 8021c9a:	68fa      	ldr	r2, [r7, #12]
 8021c9c:	625a      	str	r2, [r3, #36]	@ 0x24
 8021c9e:	e005      	b.n	8021cac <dhcp_start+0x8c>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_start(): allocated dhcp"));
    /* already has DHCP client attached */
  } else {
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_start(): restarting DHCP configuration\n"));

    if (dhcp->pcb_allocated != 0) {
 8021ca0:	68fb      	ldr	r3, [r7, #12]
 8021ca2:	791b      	ldrb	r3, [r3, #4]
 8021ca4:	2b00      	cmp	r3, #0
 8021ca6:	d001      	beq.n	8021cac <dhcp_start+0x8c>
      dhcp_dec_pcb_refcount(); /* free DHCP PCB if not needed any more */
 8021ca8:	f7ff fc8e 	bl	80215c8 <dhcp_dec_pcb_refcount>
    }
    /* dhcp is cleared below, no need to reset flag*/
  }

  /* clear data structure */
  memset(dhcp, 0, sizeof(struct dhcp));
 8021cac:	2234      	movs	r2, #52	@ 0x34
 8021cae:	2100      	movs	r1, #0
 8021cb0:	68f8      	ldr	r0, [r7, #12]
 8021cb2:	f007 fdbd 	bl	8029830 <memset>
  /* dhcp_set_state(&dhcp, DHCP_STATE_OFF); */

  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_start(): starting DHCP configuration\n"));

  if (dhcp_inc_pcb_refcount() != ERR_OK) { /* ensure DHCP PCB is allocated */
 8021cb6:	f7ff fc35 	bl	8021524 <dhcp_inc_pcb_refcount>
 8021cba:	4603      	mov	r3, r0
 8021cbc:	2b00      	cmp	r3, #0
 8021cbe:	d002      	beq.n	8021cc6 <dhcp_start+0xa6>
    return ERR_MEM;
 8021cc0:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8021cc4:	e020      	b.n	8021d08 <dhcp_start+0xe8>
  }
  dhcp->pcb_allocated = 1;
 8021cc6:	68fb      	ldr	r3, [r7, #12]
 8021cc8:	2201      	movs	r2, #1
 8021cca:	711a      	strb	r2, [r3, #4]

  if (!netif_is_link_up(netif)) {
 8021ccc:	687b      	ldr	r3, [r7, #4]
 8021cce:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 8021cd2:	f003 0304 	and.w	r3, r3, #4
 8021cd6:	2b00      	cmp	r3, #0
 8021cd8:	d105      	bne.n	8021ce6 <dhcp_start+0xc6>
    /* set state INIT and wait for dhcp_network_changed() to call dhcp_discover() */
    dhcp_set_state(dhcp, DHCP_STATE_INIT);
 8021cda:	2102      	movs	r1, #2
 8021cdc:	68f8      	ldr	r0, [r7, #12]
 8021cde:	f000 fd0a 	bl	80226f6 <dhcp_set_state>
    return ERR_OK;
 8021ce2:	2300      	movs	r3, #0
 8021ce4:	e010      	b.n	8021d08 <dhcp_start+0xe8>
  }

  /* (re)start the DHCP negotiation */
  result = dhcp_discover(netif);
 8021ce6:	6878      	ldr	r0, [r7, #4]
 8021ce8:	f000 f8f8 	bl	8021edc <dhcp_discover>
 8021cec:	4603      	mov	r3, r0
 8021cee:	72fb      	strb	r3, [r7, #11]
  if (result != ERR_OK) {
 8021cf0:	f997 300b 	ldrsb.w	r3, [r7, #11]
 8021cf4:	2b00      	cmp	r3, #0
 8021cf6:	d005      	beq.n	8021d04 <dhcp_start+0xe4>
    /* free resources allocated above */
    dhcp_release_and_stop(netif);
 8021cf8:	6878      	ldr	r0, [r7, #4]
 8021cfa:	f000 fc55 	bl	80225a8 <dhcp_release_and_stop>
    return ERR_MEM;
 8021cfe:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8021d02:	e001      	b.n	8021d08 <dhcp_start+0xe8>
  }
  return result;
 8021d04:	f997 300b 	ldrsb.w	r3, [r7, #11]
}
 8021d08:	4618      	mov	r0, r3
 8021d0a:	3710      	adds	r7, #16
 8021d0c:	46bd      	mov	sp, r7
 8021d0e:	bd80      	pop	{r7, pc}
 8021d10:	0802f9e8 	.word	0x0802f9e8
 8021d14:	0802facc 	.word	0x0802facc
 8021d18:	0802fa48 	.word	0x0802fa48
 8021d1c:	0802fb10 	.word	0x0802fb10

08021d20 <dhcp_network_changed>:
 * This enters the REBOOTING state to verify that the currently bound
 * address is still valid.
 */
void
dhcp_network_changed(struct netif *netif)
{
 8021d20:	b580      	push	{r7, lr}
 8021d22:	b084      	sub	sp, #16
 8021d24:	af00      	add	r7, sp, #0
 8021d26:	6078      	str	r0, [r7, #4]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 8021d28:	687b      	ldr	r3, [r7, #4]
 8021d2a:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8021d2c:	60fb      	str	r3, [r7, #12]

  if (!dhcp) {
 8021d2e:	68fb      	ldr	r3, [r7, #12]
 8021d30:	2b00      	cmp	r3, #0
 8021d32:	d025      	beq.n	8021d80 <dhcp_network_changed+0x60>
    return;
  }
  switch (dhcp->state) {
 8021d34:	68fb      	ldr	r3, [r7, #12]
 8021d36:	795b      	ldrb	r3, [r3, #5]
 8021d38:	2b0a      	cmp	r3, #10
 8021d3a:	d008      	beq.n	8021d4e <dhcp_network_changed+0x2e>
 8021d3c:	2b0a      	cmp	r3, #10
 8021d3e:	dc0d      	bgt.n	8021d5c <dhcp_network_changed+0x3c>
 8021d40:	2b00      	cmp	r3, #0
 8021d42:	d01f      	beq.n	8021d84 <dhcp_network_changed+0x64>
 8021d44:	2b00      	cmp	r3, #0
 8021d46:	db09      	blt.n	8021d5c <dhcp_network_changed+0x3c>
 8021d48:	3b03      	subs	r3, #3
 8021d4a:	2b02      	cmp	r3, #2
 8021d4c:	d806      	bhi.n	8021d5c <dhcp_network_changed+0x3c>
    case DHCP_STATE_REBINDING:
    case DHCP_STATE_RENEWING:
    case DHCP_STATE_BOUND:
    case DHCP_STATE_REBOOTING:
      dhcp->tries = 0;
 8021d4e:	68fb      	ldr	r3, [r7, #12]
 8021d50:	2200      	movs	r2, #0
 8021d52:	719a      	strb	r2, [r3, #6]
      dhcp_reboot(netif);
 8021d54:	6878      	ldr	r0, [r7, #4]
 8021d56:	f000 fb73 	bl	8022440 <dhcp_reboot>
      break;
 8021d5a:	e014      	b.n	8021d86 <dhcp_network_changed+0x66>
    case DHCP_STATE_OFF:
      /* stay off */
      break;
    default:
      LWIP_ASSERT("invalid dhcp->state", dhcp->state <= DHCP_STATE_BACKING_OFF);
 8021d5c:	68fb      	ldr	r3, [r7, #12]
 8021d5e:	795b      	ldrb	r3, [r3, #5]
 8021d60:	2b0c      	cmp	r3, #12
 8021d62:	d906      	bls.n	8021d72 <dhcp_network_changed+0x52>
 8021d64:	4b09      	ldr	r3, [pc, #36]	@ (8021d8c <dhcp_network_changed+0x6c>)
 8021d66:	f240 326d 	movw	r2, #877	@ 0x36d
 8021d6a:	4909      	ldr	r1, [pc, #36]	@ (8021d90 <dhcp_network_changed+0x70>)
 8021d6c:	4809      	ldr	r0, [pc, #36]	@ (8021d94 <dhcp_network_changed+0x74>)
 8021d6e:	f007 fbcd 	bl	802950c <iprintf>
        autoip_stop(netif);
        dhcp->autoip_coop_state = DHCP_AUTOIP_COOP_STATE_OFF;
      }
#endif /* LWIP_DHCP_AUTOIP_COOP */
      /* ensure we start with short timeouts, even if already discovering */
      dhcp->tries = 0;
 8021d72:	68fb      	ldr	r3, [r7, #12]
 8021d74:	2200      	movs	r2, #0
 8021d76:	719a      	strb	r2, [r3, #6]
      dhcp_discover(netif);
 8021d78:	6878      	ldr	r0, [r7, #4]
 8021d7a:	f000 f8af 	bl	8021edc <dhcp_discover>
      break;
 8021d7e:	e002      	b.n	8021d86 <dhcp_network_changed+0x66>
    return;
 8021d80:	bf00      	nop
 8021d82:	e000      	b.n	8021d86 <dhcp_network_changed+0x66>
      break;
 8021d84:	bf00      	nop
  }
}
 8021d86:	3710      	adds	r7, #16
 8021d88:	46bd      	mov	sp, r7
 8021d8a:	bd80      	pop	{r7, pc}
 8021d8c:	0802f9e8 	.word	0x0802f9e8
 8021d90:	0802fb34 	.word	0x0802fb34
 8021d94:	0802fa48 	.word	0x0802fa48

08021d98 <dhcp_arp_reply>:
 * @param netif the network interface on which the reply was received
 * @param addr The IP address we received a reply from
 */
void
dhcp_arp_reply(struct netif *netif, const ip4_addr_t *addr)
{
 8021d98:	b580      	push	{r7, lr}
 8021d9a:	b084      	sub	sp, #16
 8021d9c:	af00      	add	r7, sp, #0
 8021d9e:	6078      	str	r0, [r7, #4]
 8021da0:	6039      	str	r1, [r7, #0]
  struct dhcp *dhcp;

  LWIP_ERROR("netif != NULL", (netif != NULL), return;);
 8021da2:	687b      	ldr	r3, [r7, #4]
 8021da4:	2b00      	cmp	r3, #0
 8021da6:	d107      	bne.n	8021db8 <dhcp_arp_reply+0x20>
 8021da8:	4b0e      	ldr	r3, [pc, #56]	@ (8021de4 <dhcp_arp_reply+0x4c>)
 8021daa:	f240 328b 	movw	r2, #907	@ 0x38b
 8021dae:	490e      	ldr	r1, [pc, #56]	@ (8021de8 <dhcp_arp_reply+0x50>)
 8021db0:	480e      	ldr	r0, [pc, #56]	@ (8021dec <dhcp_arp_reply+0x54>)
 8021db2:	f007 fbab 	bl	802950c <iprintf>
 8021db6:	e012      	b.n	8021dde <dhcp_arp_reply+0x46>
  dhcp = netif_dhcp_data(netif);
 8021db8:	687b      	ldr	r3, [r7, #4]
 8021dba:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8021dbc:	60fb      	str	r3, [r7, #12]
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_arp_reply()\n"));
  /* is a DHCP client doing an ARP check? */
  if ((dhcp != NULL) && (dhcp->state == DHCP_STATE_CHECKING)) {
 8021dbe:	68fb      	ldr	r3, [r7, #12]
 8021dc0:	2b00      	cmp	r3, #0
 8021dc2:	d00c      	beq.n	8021dde <dhcp_arp_reply+0x46>
 8021dc4:	68fb      	ldr	r3, [r7, #12]
 8021dc6:	795b      	ldrb	r3, [r3, #5]
 8021dc8:	2b08      	cmp	r3, #8
 8021dca:	d108      	bne.n	8021dde <dhcp_arp_reply+0x46>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_arp_reply(): CHECKING, arp reply for 0x%08"X32_F"\n",
                ip4_addr_get_u32(addr)));
    /* did a host respond with the address we
       were offered by the DHCP server? */
    if (ip4_addr_cmp(addr, &dhcp->offered_ip_addr)) {
 8021dcc:	683b      	ldr	r3, [r7, #0]
 8021dce:	681a      	ldr	r2, [r3, #0]
 8021dd0:	68fb      	ldr	r3, [r7, #12]
 8021dd2:	69db      	ldr	r3, [r3, #28]
 8021dd4:	429a      	cmp	r2, r3
 8021dd6:	d102      	bne.n	8021dde <dhcp_arp_reply+0x46>
      /* we will not accept the offered address */
      LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE | LWIP_DBG_LEVEL_WARNING,
                  ("dhcp_arp_reply(): arp reply matched with offered address, declining\n"));
      dhcp_decline(netif);
 8021dd8:	6878      	ldr	r0, [r7, #4]
 8021dda:	f000 f809 	bl	8021df0 <dhcp_decline>
    }
  }
}
 8021dde:	3710      	adds	r7, #16
 8021de0:	46bd      	mov	sp, r7
 8021de2:	bd80      	pop	{r7, pc}
 8021de4:	0802f9e8 	.word	0x0802f9e8
 8021de8:	0802facc 	.word	0x0802facc
 8021dec:	0802fa48 	.word	0x0802fa48

08021df0 <dhcp_decline>:
 *
 * @param netif the netif under DHCP control
 */
static err_t
dhcp_decline(struct netif *netif)
{
 8021df0:	b5b0      	push	{r4, r5, r7, lr}
 8021df2:	b08a      	sub	sp, #40	@ 0x28
 8021df4:	af02      	add	r7, sp, #8
 8021df6:	6078      	str	r0, [r7, #4]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 8021df8:	687b      	ldr	r3, [r7, #4]
 8021dfa:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8021dfc:	61bb      	str	r3, [r7, #24]
  u16_t msecs;
  struct pbuf *p_out;
  u16_t options_out_len;

  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_decline()\n"));
  dhcp_set_state(dhcp, DHCP_STATE_BACKING_OFF);
 8021dfe:	210c      	movs	r1, #12
 8021e00:	69b8      	ldr	r0, [r7, #24]
 8021e02:	f000 fc78 	bl	80226f6 <dhcp_set_state>
  /* create and initialize the DHCP message header */
  p_out = dhcp_create_msg(netif, dhcp, DHCP_DECLINE, &options_out_len);
 8021e06:	f107 030c 	add.w	r3, r7, #12
 8021e0a:	2204      	movs	r2, #4
 8021e0c:	69b9      	ldr	r1, [r7, #24]
 8021e0e:	6878      	ldr	r0, [r7, #4]
 8021e10:	f001 f90a 	bl	8023028 <dhcp_create_msg>
 8021e14:	6178      	str	r0, [r7, #20]
  if (p_out != NULL) {
 8021e16:	697b      	ldr	r3, [r7, #20]
 8021e18:	2b00      	cmp	r3, #0
 8021e1a:	d035      	beq.n	8021e88 <dhcp_decline+0x98>
    struct dhcp_msg *msg_out = (struct dhcp_msg *)p_out->payload;
 8021e1c:	697b      	ldr	r3, [r7, #20]
 8021e1e:	685b      	ldr	r3, [r3, #4]
 8021e20:	613b      	str	r3, [r7, #16]
    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_REQUESTED_IP, 4);
 8021e22:	89b8      	ldrh	r0, [r7, #12]
 8021e24:	693b      	ldr	r3, [r7, #16]
 8021e26:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8021e2a:	2304      	movs	r3, #4
 8021e2c:	2232      	movs	r2, #50	@ 0x32
 8021e2e:	f000 fc7d 	bl	802272c <dhcp_option>
 8021e32:	4603      	mov	r3, r0
 8021e34:	81bb      	strh	r3, [r7, #12]
    options_out_len = dhcp_option_long(options_out_len, msg_out->options, lwip_ntohl(ip4_addr_get_u32(&dhcp->offered_ip_addr)));
 8021e36:	89bc      	ldrh	r4, [r7, #12]
 8021e38:	693b      	ldr	r3, [r7, #16]
 8021e3a:	f103 05f0 	add.w	r5, r3, #240	@ 0xf0
 8021e3e:	69bb      	ldr	r3, [r7, #24]
 8021e40:	69db      	ldr	r3, [r3, #28]
 8021e42:	4618      	mov	r0, r3
 8021e44:	f7f6 fc1d 	bl	8018682 <lwip_htonl>
 8021e48:	4603      	mov	r3, r0
 8021e4a:	461a      	mov	r2, r3
 8021e4c:	4629      	mov	r1, r5
 8021e4e:	4620      	mov	r0, r4
 8021e50:	f000 fcf8 	bl	8022844 <dhcp_option_long>
 8021e54:	4603      	mov	r3, r0
 8021e56:	81bb      	strh	r3, [r7, #12]

    LWIP_HOOK_DHCP_APPEND_OPTIONS(netif, dhcp, DHCP_STATE_BACKING_OFF, msg_out, DHCP_DECLINE, &options_out_len);
    dhcp_option_trailer(options_out_len, msg_out->options, p_out);
 8021e58:	89b8      	ldrh	r0, [r7, #12]
 8021e5a:	693b      	ldr	r3, [r7, #16]
 8021e5c:	33f0      	adds	r3, #240	@ 0xf0
 8021e5e:	697a      	ldr	r2, [r7, #20]
 8021e60:	4619      	mov	r1, r3
 8021e62:	f001 f9b7 	bl	80231d4 <dhcp_option_trailer>

    /* per section 4.4.4, broadcast DECLINE messages */
    result = udp_sendto_if_src(dhcp_pcb, p_out, IP_ADDR_BROADCAST, LWIP_IANA_PORT_DHCP_SERVER, netif, IP4_ADDR_ANY);
 8021e66:	4b19      	ldr	r3, [pc, #100]	@ (8021ecc <dhcp_decline+0xdc>)
 8021e68:	6818      	ldr	r0, [r3, #0]
 8021e6a:	4b19      	ldr	r3, [pc, #100]	@ (8021ed0 <dhcp_decline+0xe0>)
 8021e6c:	9301      	str	r3, [sp, #4]
 8021e6e:	687b      	ldr	r3, [r7, #4]
 8021e70:	9300      	str	r3, [sp, #0]
 8021e72:	2343      	movs	r3, #67	@ 0x43
 8021e74:	4a17      	ldr	r2, [pc, #92]	@ (8021ed4 <dhcp_decline+0xe4>)
 8021e76:	6979      	ldr	r1, [r7, #20]
 8021e78:	f7ff f88a 	bl	8020f90 <udp_sendto_if_src>
 8021e7c:	4603      	mov	r3, r0
 8021e7e:	77fb      	strb	r3, [r7, #31]
    pbuf_free(p_out);
 8021e80:	6978      	ldr	r0, [r7, #20]
 8021e82:	f7f8 f8cb 	bl	801a01c <pbuf_free>
 8021e86:	e001      	b.n	8021e8c <dhcp_decline+0x9c>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_decline: BACKING OFF\n"));
  } else {
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS,
                ("dhcp_decline: could not allocate DHCP request\n"));
    result = ERR_MEM;
 8021e88:	23ff      	movs	r3, #255	@ 0xff
 8021e8a:	77fb      	strb	r3, [r7, #31]
  }
  if (dhcp->tries < 255) {
 8021e8c:	69bb      	ldr	r3, [r7, #24]
 8021e8e:	799b      	ldrb	r3, [r3, #6]
 8021e90:	2bff      	cmp	r3, #255	@ 0xff
 8021e92:	d005      	beq.n	8021ea0 <dhcp_decline+0xb0>
    dhcp->tries++;
 8021e94:	69bb      	ldr	r3, [r7, #24]
 8021e96:	799b      	ldrb	r3, [r3, #6]
 8021e98:	3301      	adds	r3, #1
 8021e9a:	b2da      	uxtb	r2, r3
 8021e9c:	69bb      	ldr	r3, [r7, #24]
 8021e9e:	719a      	strb	r2, [r3, #6]
  }
  msecs = 10 * 1000;
 8021ea0:	f242 7310 	movw	r3, #10000	@ 0x2710
 8021ea4:	81fb      	strh	r3, [r7, #14]
  dhcp->request_timeout = (u16_t)((msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS);
 8021ea6:	89fb      	ldrh	r3, [r7, #14]
 8021ea8:	f203 13f3 	addw	r3, r3, #499	@ 0x1f3
 8021eac:	4a0a      	ldr	r2, [pc, #40]	@ (8021ed8 <dhcp_decline+0xe8>)
 8021eae:	fb82 1203 	smull	r1, r2, r2, r3
 8021eb2:	1152      	asrs	r2, r2, #5
 8021eb4:	17db      	asrs	r3, r3, #31
 8021eb6:	1ad3      	subs	r3, r2, r3
 8021eb8:	b29a      	uxth	r2, r3
 8021eba:	69bb      	ldr	r3, [r7, #24]
 8021ebc:	811a      	strh	r2, [r3, #8]
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_decline(): set request timeout %"U16_F" msecs\n", msecs));
  return result;
 8021ebe:	f997 301f 	ldrsb.w	r3, [r7, #31]
}
 8021ec2:	4618      	mov	r0, r3
 8021ec4:	3720      	adds	r7, #32
 8021ec6:	46bd      	mov	sp, r7
 8021ec8:	bdb0      	pop	{r4, r5, r7, pc}
 8021eca:	bf00      	nop
 8021ecc:	2402a078 	.word	0x2402a078
 8021ed0:	080307a4 	.word	0x080307a4
 8021ed4:	080307a8 	.word	0x080307a8
 8021ed8:	10624dd3 	.word	0x10624dd3

08021edc <dhcp_discover>:
 *
 * @param netif the netif under DHCP control
 */
static err_t
dhcp_discover(struct netif *netif)
{
 8021edc:	b580      	push	{r7, lr}
 8021ede:	b08a      	sub	sp, #40	@ 0x28
 8021ee0:	af02      	add	r7, sp, #8
 8021ee2:	6078      	str	r0, [r7, #4]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 8021ee4:	687b      	ldr	r3, [r7, #4]
 8021ee6:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8021ee8:	61bb      	str	r3, [r7, #24]
  err_t result = ERR_OK;
 8021eea:	2300      	movs	r3, #0
 8021eec:	75fb      	strb	r3, [r7, #23]
  struct pbuf *p_out;
  u16_t options_out_len;

  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_discover()\n"));

  ip4_addr_set_any(&dhcp->offered_ip_addr);
 8021eee:	69bb      	ldr	r3, [r7, #24]
 8021ef0:	2200      	movs	r2, #0
 8021ef2:	61da      	str	r2, [r3, #28]
  dhcp_set_state(dhcp, DHCP_STATE_SELECTING);
 8021ef4:	2106      	movs	r1, #6
 8021ef6:	69b8      	ldr	r0, [r7, #24]
 8021ef8:	f000 fbfd 	bl	80226f6 <dhcp_set_state>
  /* create and initialize the DHCP message header */
  p_out = dhcp_create_msg(netif, dhcp, DHCP_DISCOVER, &options_out_len);
 8021efc:	f107 0308 	add.w	r3, r7, #8
 8021f00:	2201      	movs	r2, #1
 8021f02:	69b9      	ldr	r1, [r7, #24]
 8021f04:	6878      	ldr	r0, [r7, #4]
 8021f06:	f001 f88f 	bl	8023028 <dhcp_create_msg>
 8021f0a:	6138      	str	r0, [r7, #16]
  if (p_out != NULL) {
 8021f0c:	693b      	ldr	r3, [r7, #16]
 8021f0e:	2b00      	cmp	r3, #0
 8021f10:	d04b      	beq.n	8021faa <dhcp_discover+0xce>
    struct dhcp_msg *msg_out = (struct dhcp_msg *)p_out->payload;
 8021f12:	693b      	ldr	r3, [r7, #16]
 8021f14:	685b      	ldr	r3, [r3, #4]
 8021f16:	60fb      	str	r3, [r7, #12]
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_discover: making request\n"));

    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_MAX_MSG_SIZE, DHCP_OPTION_MAX_MSG_SIZE_LEN);
 8021f18:	8938      	ldrh	r0, [r7, #8]
 8021f1a:	68fb      	ldr	r3, [r7, #12]
 8021f1c:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8021f20:	2302      	movs	r3, #2
 8021f22:	2239      	movs	r2, #57	@ 0x39
 8021f24:	f000 fc02 	bl	802272c <dhcp_option>
 8021f28:	4603      	mov	r3, r0
 8021f2a:	813b      	strh	r3, [r7, #8]
    options_out_len = dhcp_option_short(options_out_len, msg_out->options, DHCP_MAX_MSG_LEN(netif));
 8021f2c:	8938      	ldrh	r0, [r7, #8]
 8021f2e:	68fb      	ldr	r3, [r7, #12]
 8021f30:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8021f34:	687b      	ldr	r3, [r7, #4]
 8021f36:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 8021f38:	461a      	mov	r2, r3
 8021f3a:	f000 fc51 	bl	80227e0 <dhcp_option_short>
 8021f3e:	4603      	mov	r3, r0
 8021f40:	813b      	strh	r3, [r7, #8]

    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_PARAMETER_REQUEST_LIST, LWIP_ARRAYSIZE(dhcp_discover_request_options));
 8021f42:	8938      	ldrh	r0, [r7, #8]
 8021f44:	68fb      	ldr	r3, [r7, #12]
 8021f46:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8021f4a:	2303      	movs	r3, #3
 8021f4c:	2237      	movs	r2, #55	@ 0x37
 8021f4e:	f000 fbed 	bl	802272c <dhcp_option>
 8021f52:	4603      	mov	r3, r0
 8021f54:	813b      	strh	r3, [r7, #8]
    for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
 8021f56:	2300      	movs	r3, #0
 8021f58:	77fb      	strb	r3, [r7, #31]
 8021f5a:	e00e      	b.n	8021f7a <dhcp_discover+0x9e>
      options_out_len = dhcp_option_byte(options_out_len, msg_out->options, dhcp_discover_request_options[i]);
 8021f5c:	8938      	ldrh	r0, [r7, #8]
 8021f5e:	68fb      	ldr	r3, [r7, #12]
 8021f60:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8021f64:	7ffb      	ldrb	r3, [r7, #31]
 8021f66:	4a29      	ldr	r2, [pc, #164]	@ (802200c <dhcp_discover+0x130>)
 8021f68:	5cd3      	ldrb	r3, [r2, r3]
 8021f6a:	461a      	mov	r2, r3
 8021f6c:	f000 fc12 	bl	8022794 <dhcp_option_byte>
 8021f70:	4603      	mov	r3, r0
 8021f72:	813b      	strh	r3, [r7, #8]
    for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
 8021f74:	7ffb      	ldrb	r3, [r7, #31]
 8021f76:	3301      	adds	r3, #1
 8021f78:	77fb      	strb	r3, [r7, #31]
 8021f7a:	7ffb      	ldrb	r3, [r7, #31]
 8021f7c:	2b02      	cmp	r3, #2
 8021f7e:	d9ed      	bls.n	8021f5c <dhcp_discover+0x80>
    }
    LWIP_HOOK_DHCP_APPEND_OPTIONS(netif, dhcp, DHCP_STATE_SELECTING, msg_out, DHCP_DISCOVER, &options_out_len);
    dhcp_option_trailer(options_out_len, msg_out->options, p_out);
 8021f80:	8938      	ldrh	r0, [r7, #8]
 8021f82:	68fb      	ldr	r3, [r7, #12]
 8021f84:	33f0      	adds	r3, #240	@ 0xf0
 8021f86:	693a      	ldr	r2, [r7, #16]
 8021f88:	4619      	mov	r1, r3
 8021f8a:	f001 f923 	bl	80231d4 <dhcp_option_trailer>

    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_discover: sendto(DISCOVER, IP_ADDR_BROADCAST, LWIP_IANA_PORT_DHCP_SERVER)\n"));
    udp_sendto_if_src(dhcp_pcb, p_out, IP_ADDR_BROADCAST, LWIP_IANA_PORT_DHCP_SERVER, netif, IP4_ADDR_ANY);
 8021f8e:	4b20      	ldr	r3, [pc, #128]	@ (8022010 <dhcp_discover+0x134>)
 8021f90:	6818      	ldr	r0, [r3, #0]
 8021f92:	4b20      	ldr	r3, [pc, #128]	@ (8022014 <dhcp_discover+0x138>)
 8021f94:	9301      	str	r3, [sp, #4]
 8021f96:	687b      	ldr	r3, [r7, #4]
 8021f98:	9300      	str	r3, [sp, #0]
 8021f9a:	2343      	movs	r3, #67	@ 0x43
 8021f9c:	4a1e      	ldr	r2, [pc, #120]	@ (8022018 <dhcp_discover+0x13c>)
 8021f9e:	6939      	ldr	r1, [r7, #16]
 8021fa0:	f7fe fff6 	bl	8020f90 <udp_sendto_if_src>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_discover: deleting()ing\n"));
    pbuf_free(p_out);
 8021fa4:	6938      	ldr	r0, [r7, #16]
 8021fa6:	f7f8 f839 	bl	801a01c <pbuf_free>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_discover: SELECTING\n"));
  } else {
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("dhcp_discover: could not allocate DHCP request\n"));
  }
  if (dhcp->tries < 255) {
 8021faa:	69bb      	ldr	r3, [r7, #24]
 8021fac:	799b      	ldrb	r3, [r3, #6]
 8021fae:	2bff      	cmp	r3, #255	@ 0xff
 8021fb0:	d005      	beq.n	8021fbe <dhcp_discover+0xe2>
    dhcp->tries++;
 8021fb2:	69bb      	ldr	r3, [r7, #24]
 8021fb4:	799b      	ldrb	r3, [r3, #6]
 8021fb6:	3301      	adds	r3, #1
 8021fb8:	b2da      	uxtb	r2, r3
 8021fba:	69bb      	ldr	r3, [r7, #24]
 8021fbc:	719a      	strb	r2, [r3, #6]
  if (dhcp->tries >= LWIP_DHCP_AUTOIP_COOP_TRIES && dhcp->autoip_coop_state == DHCP_AUTOIP_COOP_STATE_OFF) {
    dhcp->autoip_coop_state = DHCP_AUTOIP_COOP_STATE_ON;
    autoip_start(netif);
  }
#endif /* LWIP_DHCP_AUTOIP_COOP */
  msecs = (u16_t)((dhcp->tries < 6 ? 1 << dhcp->tries : 60) * 1000);
 8021fbe:	69bb      	ldr	r3, [r7, #24]
 8021fc0:	799b      	ldrb	r3, [r3, #6]
 8021fc2:	2b05      	cmp	r3, #5
 8021fc4:	d80d      	bhi.n	8021fe2 <dhcp_discover+0x106>
 8021fc6:	69bb      	ldr	r3, [r7, #24]
 8021fc8:	799b      	ldrb	r3, [r3, #6]
 8021fca:	461a      	mov	r2, r3
 8021fcc:	2301      	movs	r3, #1
 8021fce:	4093      	lsls	r3, r2
 8021fd0:	b29b      	uxth	r3, r3
 8021fd2:	461a      	mov	r2, r3
 8021fd4:	0152      	lsls	r2, r2, #5
 8021fd6:	1ad2      	subs	r2, r2, r3
 8021fd8:	0092      	lsls	r2, r2, #2
 8021fda:	4413      	add	r3, r2
 8021fdc:	00db      	lsls	r3, r3, #3
 8021fde:	b29b      	uxth	r3, r3
 8021fe0:	e001      	b.n	8021fe6 <dhcp_discover+0x10a>
 8021fe2:	f64e 2360 	movw	r3, #60000	@ 0xea60
 8021fe6:	817b      	strh	r3, [r7, #10]
  dhcp->request_timeout = (u16_t)((msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS);
 8021fe8:	897b      	ldrh	r3, [r7, #10]
 8021fea:	f203 13f3 	addw	r3, r3, #499	@ 0x1f3
 8021fee:	4a0b      	ldr	r2, [pc, #44]	@ (802201c <dhcp_discover+0x140>)
 8021ff0:	fb82 1203 	smull	r1, r2, r2, r3
 8021ff4:	1152      	asrs	r2, r2, #5
 8021ff6:	17db      	asrs	r3, r3, #31
 8021ff8:	1ad3      	subs	r3, r2, r3
 8021ffa:	b29a      	uxth	r2, r3
 8021ffc:	69bb      	ldr	r3, [r7, #24]
 8021ffe:	811a      	strh	r2, [r3, #8]
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_discover(): set request timeout %"U16_F" msecs\n", msecs));
  return result;
 8022000:	f997 3017 	ldrsb.w	r3, [r7, #23]
}
 8022004:	4618      	mov	r0, r3
 8022006:	3720      	adds	r7, #32
 8022008:	46bd      	mov	sp, r7
 802200a:	bd80      	pop	{r7, pc}
 802200c:	24000044 	.word	0x24000044
 8022010:	2402a078 	.word	0x2402a078
 8022014:	080307a4 	.word	0x080307a4
 8022018:	080307a8 	.word	0x080307a8
 802201c:	10624dd3 	.word	0x10624dd3

08022020 <dhcp_bind>:
 *
 * @param netif network interface to bind to the offered address
 */
static void
dhcp_bind(struct netif *netif)
{
 8022020:	b580      	push	{r7, lr}
 8022022:	b088      	sub	sp, #32
 8022024:	af00      	add	r7, sp, #0
 8022026:	6078      	str	r0, [r7, #4]
  u32_t timeout;
  struct dhcp *dhcp;
  ip4_addr_t sn_mask, gw_addr;
  LWIP_ERROR("dhcp_bind: netif != NULL", (netif != NULL), return;);
 8022028:	687b      	ldr	r3, [r7, #4]
 802202a:	2b00      	cmp	r3, #0
 802202c:	d107      	bne.n	802203e <dhcp_bind+0x1e>
 802202e:	4b64      	ldr	r3, [pc, #400]	@ (80221c0 <dhcp_bind+0x1a0>)
 8022030:	f240 4215 	movw	r2, #1045	@ 0x415
 8022034:	4963      	ldr	r1, [pc, #396]	@ (80221c4 <dhcp_bind+0x1a4>)
 8022036:	4864      	ldr	r0, [pc, #400]	@ (80221c8 <dhcp_bind+0x1a8>)
 8022038:	f007 fa68 	bl	802950c <iprintf>
 802203c:	e0bc      	b.n	80221b8 <dhcp_bind+0x198>
  dhcp = netif_dhcp_data(netif);
 802203e:	687b      	ldr	r3, [r7, #4]
 8022040:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8022042:	61fb      	str	r3, [r7, #28]
  LWIP_ERROR("dhcp_bind: dhcp != NULL", (dhcp != NULL), return;);
 8022044:	69fb      	ldr	r3, [r7, #28]
 8022046:	2b00      	cmp	r3, #0
 8022048:	d107      	bne.n	802205a <dhcp_bind+0x3a>
 802204a:	4b5d      	ldr	r3, [pc, #372]	@ (80221c0 <dhcp_bind+0x1a0>)
 802204c:	f240 4217 	movw	r2, #1047	@ 0x417
 8022050:	495e      	ldr	r1, [pc, #376]	@ (80221cc <dhcp_bind+0x1ac>)
 8022052:	485d      	ldr	r0, [pc, #372]	@ (80221c8 <dhcp_bind+0x1a8>)
 8022054:	f007 fa5a 	bl	802950c <iprintf>
 8022058:	e0ae      	b.n	80221b8 <dhcp_bind+0x198>
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_bind(netif=%p) %c%c%"U16_F"\n", (void *)netif, netif->name[0], netif->name[1], (u16_t)netif->num));

  /* reset time used of lease */
  dhcp->lease_used = 0;
 802205a:	69fb      	ldr	r3, [r7, #28]
 802205c:	2200      	movs	r2, #0
 802205e:	825a      	strh	r2, [r3, #18]

  if (dhcp->offered_t0_lease != 0xffffffffUL) {
 8022060:	69fb      	ldr	r3, [r7, #28]
 8022062:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 8022064:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8022068:	d019      	beq.n	802209e <dhcp_bind+0x7e>
    /* set renewal period timer */
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_bind(): t0 renewal timer %"U32_F" secs\n", dhcp->offered_t0_lease));
    timeout = (dhcp->offered_t0_lease + DHCP_COARSE_TIMER_SECS / 2) / DHCP_COARSE_TIMER_SECS;
 802206a:	69fb      	ldr	r3, [r7, #28]
 802206c:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 802206e:	331e      	adds	r3, #30
 8022070:	4a57      	ldr	r2, [pc, #348]	@ (80221d0 <dhcp_bind+0x1b0>)
 8022072:	fba2 2303 	umull	r2, r3, r2, r3
 8022076:	095b      	lsrs	r3, r3, #5
 8022078:	61bb      	str	r3, [r7, #24]
    if (timeout > 0xffff) {
 802207a:	69bb      	ldr	r3, [r7, #24]
 802207c:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 8022080:	d302      	bcc.n	8022088 <dhcp_bind+0x68>
      timeout = 0xffff;
 8022082:	f64f 73ff 	movw	r3, #65535	@ 0xffff
 8022086:	61bb      	str	r3, [r7, #24]
    }
    dhcp->t0_timeout = (u16_t)timeout;
 8022088:	69bb      	ldr	r3, [r7, #24]
 802208a:	b29a      	uxth	r2, r3
 802208c:	69fb      	ldr	r3, [r7, #28]
 802208e:	829a      	strh	r2, [r3, #20]
    if (dhcp->t0_timeout == 0) {
 8022090:	69fb      	ldr	r3, [r7, #28]
 8022092:	8a9b      	ldrh	r3, [r3, #20]
 8022094:	2b00      	cmp	r3, #0
 8022096:	d102      	bne.n	802209e <dhcp_bind+0x7e>
      dhcp->t0_timeout = 1;
 8022098:	69fb      	ldr	r3, [r7, #28]
 802209a:	2201      	movs	r2, #1
 802209c:	829a      	strh	r2, [r3, #20]
    }
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_bind(): set request timeout %"U32_F" msecs\n", dhcp->offered_t0_lease * 1000));
  }

  /* temporary DHCP lease? */
  if (dhcp->offered_t1_renew != 0xffffffffUL) {
 802209e:	69fb      	ldr	r3, [r7, #28]
 80220a0:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80220a2:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 80220a6:	d01d      	beq.n	80220e4 <dhcp_bind+0xc4>
    /* set renewal period timer */
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_bind(): t1 renewal timer %"U32_F" secs\n", dhcp->offered_t1_renew));
    timeout = (dhcp->offered_t1_renew + DHCP_COARSE_TIMER_SECS / 2) / DHCP_COARSE_TIMER_SECS;
 80220a8:	69fb      	ldr	r3, [r7, #28]
 80220aa:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80220ac:	331e      	adds	r3, #30
 80220ae:	4a48      	ldr	r2, [pc, #288]	@ (80221d0 <dhcp_bind+0x1b0>)
 80220b0:	fba2 2303 	umull	r2, r3, r2, r3
 80220b4:	095b      	lsrs	r3, r3, #5
 80220b6:	61bb      	str	r3, [r7, #24]
    if (timeout > 0xffff) {
 80220b8:	69bb      	ldr	r3, [r7, #24]
 80220ba:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 80220be:	d302      	bcc.n	80220c6 <dhcp_bind+0xa6>
      timeout = 0xffff;
 80220c0:	f64f 73ff 	movw	r3, #65535	@ 0xffff
 80220c4:	61bb      	str	r3, [r7, #24]
    }
    dhcp->t1_timeout = (u16_t)timeout;
 80220c6:	69bb      	ldr	r3, [r7, #24]
 80220c8:	b29a      	uxth	r2, r3
 80220ca:	69fb      	ldr	r3, [r7, #28]
 80220cc:	815a      	strh	r2, [r3, #10]
    if (dhcp->t1_timeout == 0) {
 80220ce:	69fb      	ldr	r3, [r7, #28]
 80220d0:	895b      	ldrh	r3, [r3, #10]
 80220d2:	2b00      	cmp	r3, #0
 80220d4:	d102      	bne.n	80220dc <dhcp_bind+0xbc>
      dhcp->t1_timeout = 1;
 80220d6:	69fb      	ldr	r3, [r7, #28]
 80220d8:	2201      	movs	r2, #1
 80220da:	815a      	strh	r2, [r3, #10]
    }
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_bind(): set request timeout %"U32_F" msecs\n", dhcp->offered_t1_renew * 1000));
    dhcp->t1_renew_time = dhcp->t1_timeout;
 80220dc:	69fb      	ldr	r3, [r7, #28]
 80220de:	895a      	ldrh	r2, [r3, #10]
 80220e0:	69fb      	ldr	r3, [r7, #28]
 80220e2:	81da      	strh	r2, [r3, #14]
  }
  /* set renewal period timer */
  if (dhcp->offered_t2_rebind != 0xffffffffUL) {
 80220e4:	69fb      	ldr	r3, [r7, #28]
 80220e6:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 80220e8:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 80220ec:	d01d      	beq.n	802212a <dhcp_bind+0x10a>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_bind(): t2 rebind timer %"U32_F" secs\n", dhcp->offered_t2_rebind));
    timeout = (dhcp->offered_t2_rebind + DHCP_COARSE_TIMER_SECS / 2) / DHCP_COARSE_TIMER_SECS;
 80220ee:	69fb      	ldr	r3, [r7, #28]
 80220f0:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 80220f2:	331e      	adds	r3, #30
 80220f4:	4a36      	ldr	r2, [pc, #216]	@ (80221d0 <dhcp_bind+0x1b0>)
 80220f6:	fba2 2303 	umull	r2, r3, r2, r3
 80220fa:	095b      	lsrs	r3, r3, #5
 80220fc:	61bb      	str	r3, [r7, #24]
    if (timeout > 0xffff) {
 80220fe:	69bb      	ldr	r3, [r7, #24]
 8022100:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 8022104:	d302      	bcc.n	802210c <dhcp_bind+0xec>
      timeout = 0xffff;
 8022106:	f64f 73ff 	movw	r3, #65535	@ 0xffff
 802210a:	61bb      	str	r3, [r7, #24]
    }
    dhcp->t2_timeout = (u16_t)timeout;
 802210c:	69bb      	ldr	r3, [r7, #24]
 802210e:	b29a      	uxth	r2, r3
 8022110:	69fb      	ldr	r3, [r7, #28]
 8022112:	819a      	strh	r2, [r3, #12]
    if (dhcp->t2_timeout == 0) {
 8022114:	69fb      	ldr	r3, [r7, #28]
 8022116:	899b      	ldrh	r3, [r3, #12]
 8022118:	2b00      	cmp	r3, #0
 802211a:	d102      	bne.n	8022122 <dhcp_bind+0x102>
      dhcp->t2_timeout = 1;
 802211c:	69fb      	ldr	r3, [r7, #28]
 802211e:	2201      	movs	r2, #1
 8022120:	819a      	strh	r2, [r3, #12]
    }
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_bind(): set request timeout %"U32_F" msecs\n", dhcp->offered_t2_rebind * 1000));
    dhcp->t2_rebind_time = dhcp->t2_timeout;
 8022122:	69fb      	ldr	r3, [r7, #28]
 8022124:	899a      	ldrh	r2, [r3, #12]
 8022126:	69fb      	ldr	r3, [r7, #28]
 8022128:	821a      	strh	r2, [r3, #16]
  }

  /* If we have sub 1 minute lease, t2 and t1 will kick in at the same time. */
  if ((dhcp->t1_timeout >= dhcp->t2_timeout) && (dhcp->t2_timeout > 0)) {
 802212a:	69fb      	ldr	r3, [r7, #28]
 802212c:	895a      	ldrh	r2, [r3, #10]
 802212e:	69fb      	ldr	r3, [r7, #28]
 8022130:	899b      	ldrh	r3, [r3, #12]
 8022132:	429a      	cmp	r2, r3
 8022134:	d306      	bcc.n	8022144 <dhcp_bind+0x124>
 8022136:	69fb      	ldr	r3, [r7, #28]
 8022138:	899b      	ldrh	r3, [r3, #12]
 802213a:	2b00      	cmp	r3, #0
 802213c:	d002      	beq.n	8022144 <dhcp_bind+0x124>
    dhcp->t1_timeout = 0;
 802213e:	69fb      	ldr	r3, [r7, #28]
 8022140:	2200      	movs	r2, #0
 8022142:	815a      	strh	r2, [r3, #10]
  }

  if (dhcp->subnet_mask_given) {
 8022144:	69fb      	ldr	r3, [r7, #28]
 8022146:	79db      	ldrb	r3, [r3, #7]
 8022148:	2b00      	cmp	r3, #0
 802214a:	d003      	beq.n	8022154 <dhcp_bind+0x134>
    /* copy offered network mask */
    ip4_addr_copy(sn_mask, dhcp->offered_sn_mask);
 802214c:	69fb      	ldr	r3, [r7, #28]
 802214e:	6a1b      	ldr	r3, [r3, #32]
 8022150:	613b      	str	r3, [r7, #16]
 8022152:	e014      	b.n	802217e <dhcp_bind+0x15e>
  } else {
    /* subnet mask not given, choose a safe subnet mask given the network class */
    u8_t first_octet = ip4_addr1(&dhcp->offered_ip_addr);
 8022154:	69fb      	ldr	r3, [r7, #28]
 8022156:	331c      	adds	r3, #28
 8022158:	781b      	ldrb	r3, [r3, #0]
 802215a:	75fb      	strb	r3, [r7, #23]
    if (first_octet <= 127) {
 802215c:	f997 3017 	ldrsb.w	r3, [r7, #23]
 8022160:	2b00      	cmp	r3, #0
 8022162:	db02      	blt.n	802216a <dhcp_bind+0x14a>
      ip4_addr_set_u32(&sn_mask, PP_HTONL(0xff000000UL));
 8022164:	23ff      	movs	r3, #255	@ 0xff
 8022166:	613b      	str	r3, [r7, #16]
 8022168:	e009      	b.n	802217e <dhcp_bind+0x15e>
    } else if (first_octet >= 192) {
 802216a:	7dfb      	ldrb	r3, [r7, #23]
 802216c:	2bbf      	cmp	r3, #191	@ 0xbf
 802216e:	d903      	bls.n	8022178 <dhcp_bind+0x158>
      ip4_addr_set_u32(&sn_mask, PP_HTONL(0xffffff00UL));
 8022170:	f06f 437f 	mvn.w	r3, #4278190080	@ 0xff000000
 8022174:	613b      	str	r3, [r7, #16]
 8022176:	e002      	b.n	802217e <dhcp_bind+0x15e>
    } else {
      ip4_addr_set_u32(&sn_mask, PP_HTONL(0xffff0000UL));
 8022178:	f64f 73ff 	movw	r3, #65535	@ 0xffff
 802217c:	613b      	str	r3, [r7, #16]
    }
  }

  ip4_addr_copy(gw_addr, dhcp->offered_gw_addr);
 802217e:	69fb      	ldr	r3, [r7, #28]
 8022180:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8022182:	60fb      	str	r3, [r7, #12]
  /* gateway address not given? */
  if (ip4_addr_isany_val(gw_addr)) {
 8022184:	68fb      	ldr	r3, [r7, #12]
 8022186:	2b00      	cmp	r3, #0
 8022188:	d108      	bne.n	802219c <dhcp_bind+0x17c>
    /* copy network address */
    ip4_addr_get_network(&gw_addr, &dhcp->offered_ip_addr, &sn_mask);
 802218a:	69fb      	ldr	r3, [r7, #28]
 802218c:	69da      	ldr	r2, [r3, #28]
 802218e:	693b      	ldr	r3, [r7, #16]
 8022190:	4013      	ands	r3, r2
 8022192:	60fb      	str	r3, [r7, #12]
    /* use first host address on network as gateway */
    ip4_addr_set_u32(&gw_addr, ip4_addr_get_u32(&gw_addr) | PP_HTONL(0x00000001UL));
 8022194:	68fb      	ldr	r3, [r7, #12]
 8022196:	f043 7380 	orr.w	r3, r3, #16777216	@ 0x1000000
 802219a:	60fb      	str	r3, [r7, #12]

  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_STATE, ("dhcp_bind(): IP: 0x%08"X32_F" SN: 0x%08"X32_F" GW: 0x%08"X32_F"\n",
              ip4_addr_get_u32(&dhcp->offered_ip_addr), ip4_addr_get_u32(&sn_mask), ip4_addr_get_u32(&gw_addr)));
  /* netif is now bound to DHCP leased address - set this before assigning the address
     to ensure the callback can use dhcp_supplied_address() */
  dhcp_set_state(dhcp, DHCP_STATE_BOUND);
 802219c:	210a      	movs	r1, #10
 802219e:	69f8      	ldr	r0, [r7, #28]
 80221a0:	f000 faa9 	bl	80226f6 <dhcp_set_state>

  netif_set_addr(netif, &dhcp->offered_ip_addr, &sn_mask, &gw_addr);
 80221a4:	69fb      	ldr	r3, [r7, #28]
 80221a6:	f103 011c 	add.w	r1, r3, #28
 80221aa:	f107 030c 	add.w	r3, r7, #12
 80221ae:	f107 0210 	add.w	r2, r7, #16
 80221b2:	6878      	ldr	r0, [r7, #4]
 80221b4:	f7f7 f9e8 	bl	8019588 <netif_set_addr>
  /* interface is used by routing now that an address is set */
}
 80221b8:	3720      	adds	r7, #32
 80221ba:	46bd      	mov	sp, r7
 80221bc:	bd80      	pop	{r7, pc}
 80221be:	bf00      	nop
 80221c0:	0802f9e8 	.word	0x0802f9e8
 80221c4:	0802fb48 	.word	0x0802fb48
 80221c8:	0802fa48 	.word	0x0802fa48
 80221cc:	0802fb64 	.word	0x0802fb64
 80221d0:	88888889 	.word	0x88888889

080221d4 <dhcp_renew>:
 *
 * @param netif network interface which must renew its lease
 */
err_t
dhcp_renew(struct netif *netif)
{
 80221d4:	b580      	push	{r7, lr}
 80221d6:	b08a      	sub	sp, #40	@ 0x28
 80221d8:	af02      	add	r7, sp, #8
 80221da:	6078      	str	r0, [r7, #4]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 80221dc:	687b      	ldr	r3, [r7, #4]
 80221de:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 80221e0:	61bb      	str	r3, [r7, #24]
  u16_t msecs;
  u8_t i;
  struct pbuf *p_out;
  u16_t options_out_len;

  LWIP_ASSERT_CORE_LOCKED();
 80221e2:	f7ed ff45 	bl	8010070 <sys_check_core_locking>
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_renew()\n"));
  dhcp_set_state(dhcp, DHCP_STATE_RENEWING);
 80221e6:	2105      	movs	r1, #5
 80221e8:	69b8      	ldr	r0, [r7, #24]
 80221ea:	f000 fa84 	bl	80226f6 <dhcp_set_state>

  /* create and initialize the DHCP message header */
  p_out = dhcp_create_msg(netif, dhcp, DHCP_REQUEST, &options_out_len);
 80221ee:	f107 030c 	add.w	r3, r7, #12
 80221f2:	2203      	movs	r2, #3
 80221f4:	69b9      	ldr	r1, [r7, #24]
 80221f6:	6878      	ldr	r0, [r7, #4]
 80221f8:	f000 ff16 	bl	8023028 <dhcp_create_msg>
 80221fc:	6178      	str	r0, [r7, #20]
  if (p_out != NULL) {
 80221fe:	697b      	ldr	r3, [r7, #20]
 8022200:	2b00      	cmp	r3, #0
 8022202:	d04e      	beq.n	80222a2 <dhcp_renew+0xce>
    struct dhcp_msg *msg_out = (struct dhcp_msg *)p_out->payload;
 8022204:	697b      	ldr	r3, [r7, #20]
 8022206:	685b      	ldr	r3, [r3, #4]
 8022208:	613b      	str	r3, [r7, #16]
    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_MAX_MSG_SIZE, DHCP_OPTION_MAX_MSG_SIZE_LEN);
 802220a:	89b8      	ldrh	r0, [r7, #12]
 802220c:	693b      	ldr	r3, [r7, #16]
 802220e:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8022212:	2302      	movs	r3, #2
 8022214:	2239      	movs	r2, #57	@ 0x39
 8022216:	f000 fa89 	bl	802272c <dhcp_option>
 802221a:	4603      	mov	r3, r0
 802221c:	81bb      	strh	r3, [r7, #12]
    options_out_len = dhcp_option_short(options_out_len, msg_out->options, DHCP_MAX_MSG_LEN(netif));
 802221e:	89b8      	ldrh	r0, [r7, #12]
 8022220:	693b      	ldr	r3, [r7, #16]
 8022222:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8022226:	687b      	ldr	r3, [r7, #4]
 8022228:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 802222a:	461a      	mov	r2, r3
 802222c:	f000 fad8 	bl	80227e0 <dhcp_option_short>
 8022230:	4603      	mov	r3, r0
 8022232:	81bb      	strh	r3, [r7, #12]

    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_PARAMETER_REQUEST_LIST, LWIP_ARRAYSIZE(dhcp_discover_request_options));
 8022234:	89b8      	ldrh	r0, [r7, #12]
 8022236:	693b      	ldr	r3, [r7, #16]
 8022238:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 802223c:	2303      	movs	r3, #3
 802223e:	2237      	movs	r2, #55	@ 0x37
 8022240:	f000 fa74 	bl	802272c <dhcp_option>
 8022244:	4603      	mov	r3, r0
 8022246:	81bb      	strh	r3, [r7, #12]
    for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
 8022248:	2300      	movs	r3, #0
 802224a:	77bb      	strb	r3, [r7, #30]
 802224c:	e00e      	b.n	802226c <dhcp_renew+0x98>
      options_out_len = dhcp_option_byte(options_out_len, msg_out->options, dhcp_discover_request_options[i]);
 802224e:	89b8      	ldrh	r0, [r7, #12]
 8022250:	693b      	ldr	r3, [r7, #16]
 8022252:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8022256:	7fbb      	ldrb	r3, [r7, #30]
 8022258:	4a29      	ldr	r2, [pc, #164]	@ (8022300 <dhcp_renew+0x12c>)
 802225a:	5cd3      	ldrb	r3, [r2, r3]
 802225c:	461a      	mov	r2, r3
 802225e:	f000 fa99 	bl	8022794 <dhcp_option_byte>
 8022262:	4603      	mov	r3, r0
 8022264:	81bb      	strh	r3, [r7, #12]
    for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
 8022266:	7fbb      	ldrb	r3, [r7, #30]
 8022268:	3301      	adds	r3, #1
 802226a:	77bb      	strb	r3, [r7, #30]
 802226c:	7fbb      	ldrb	r3, [r7, #30]
 802226e:	2b02      	cmp	r3, #2
 8022270:	d9ed      	bls.n	802224e <dhcp_renew+0x7a>
#if LWIP_NETIF_HOSTNAME
    options_out_len = dhcp_option_hostname(options_out_len, msg_out->options, netif);
#endif /* LWIP_NETIF_HOSTNAME */

    LWIP_HOOK_DHCP_APPEND_OPTIONS(netif, dhcp, DHCP_STATE_RENEWING, msg_out, DHCP_REQUEST, &options_out_len);
    dhcp_option_trailer(options_out_len, msg_out->options, p_out);
 8022272:	89b8      	ldrh	r0, [r7, #12]
 8022274:	693b      	ldr	r3, [r7, #16]
 8022276:	33f0      	adds	r3, #240	@ 0xf0
 8022278:	697a      	ldr	r2, [r7, #20]
 802227a:	4619      	mov	r1, r3
 802227c:	f000 ffaa 	bl	80231d4 <dhcp_option_trailer>

    result = udp_sendto_if(dhcp_pcb, p_out, &dhcp->server_ip_addr, LWIP_IANA_PORT_DHCP_SERVER, netif);
 8022280:	4b20      	ldr	r3, [pc, #128]	@ (8022304 <dhcp_renew+0x130>)
 8022282:	6818      	ldr	r0, [r3, #0]
 8022284:	69bb      	ldr	r3, [r7, #24]
 8022286:	f103 0218 	add.w	r2, r3, #24
 802228a:	687b      	ldr	r3, [r7, #4]
 802228c:	9300      	str	r3, [sp, #0]
 802228e:	2343      	movs	r3, #67	@ 0x43
 8022290:	6979      	ldr	r1, [r7, #20]
 8022292:	f7fe fe09 	bl	8020ea8 <udp_sendto_if>
 8022296:	4603      	mov	r3, r0
 8022298:	77fb      	strb	r3, [r7, #31]
    pbuf_free(p_out);
 802229a:	6978      	ldr	r0, [r7, #20]
 802229c:	f7f7 febe 	bl	801a01c <pbuf_free>
 80222a0:	e001      	b.n	80222a6 <dhcp_renew+0xd2>

    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_renew: RENEWING\n"));
  } else {
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("dhcp_renew: could not allocate DHCP request\n"));
    result = ERR_MEM;
 80222a2:	23ff      	movs	r3, #255	@ 0xff
 80222a4:	77fb      	strb	r3, [r7, #31]
  }
  if (dhcp->tries < 255) {
 80222a6:	69bb      	ldr	r3, [r7, #24]
 80222a8:	799b      	ldrb	r3, [r3, #6]
 80222aa:	2bff      	cmp	r3, #255	@ 0xff
 80222ac:	d005      	beq.n	80222ba <dhcp_renew+0xe6>
    dhcp->tries++;
 80222ae:	69bb      	ldr	r3, [r7, #24]
 80222b0:	799b      	ldrb	r3, [r3, #6]
 80222b2:	3301      	adds	r3, #1
 80222b4:	b2da      	uxtb	r2, r3
 80222b6:	69bb      	ldr	r3, [r7, #24]
 80222b8:	719a      	strb	r2, [r3, #6]
  }
  /* back-off on retries, but to a maximum of 20 seconds */
  msecs = (u16_t)(dhcp->tries < 10 ? dhcp->tries * 2000 : 20 * 1000);
 80222ba:	69bb      	ldr	r3, [r7, #24]
 80222bc:	799b      	ldrb	r3, [r3, #6]
 80222be:	2b09      	cmp	r3, #9
 80222c0:	d809      	bhi.n	80222d6 <dhcp_renew+0x102>
 80222c2:	69bb      	ldr	r3, [r7, #24]
 80222c4:	799b      	ldrb	r3, [r3, #6]
 80222c6:	461a      	mov	r2, r3
 80222c8:	0152      	lsls	r2, r2, #5
 80222ca:	1ad2      	subs	r2, r2, r3
 80222cc:	0092      	lsls	r2, r2, #2
 80222ce:	4413      	add	r3, r2
 80222d0:	011b      	lsls	r3, r3, #4
 80222d2:	b29b      	uxth	r3, r3
 80222d4:	e001      	b.n	80222da <dhcp_renew+0x106>
 80222d6:	f644 6320 	movw	r3, #20000	@ 0x4e20
 80222da:	81fb      	strh	r3, [r7, #14]
  dhcp->request_timeout = (u16_t)((msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS);
 80222dc:	89fb      	ldrh	r3, [r7, #14]
 80222de:	f203 13f3 	addw	r3, r3, #499	@ 0x1f3
 80222e2:	4a09      	ldr	r2, [pc, #36]	@ (8022308 <dhcp_renew+0x134>)
 80222e4:	fb82 1203 	smull	r1, r2, r2, r3
 80222e8:	1152      	asrs	r2, r2, #5
 80222ea:	17db      	asrs	r3, r3, #31
 80222ec:	1ad3      	subs	r3, r2, r3
 80222ee:	b29a      	uxth	r2, r3
 80222f0:	69bb      	ldr	r3, [r7, #24]
 80222f2:	811a      	strh	r2, [r3, #8]
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_renew(): set request timeout %"U16_F" msecs\n", msecs));
  return result;
 80222f4:	f997 301f 	ldrsb.w	r3, [r7, #31]
}
 80222f8:	4618      	mov	r0, r3
 80222fa:	3720      	adds	r7, #32
 80222fc:	46bd      	mov	sp, r7
 80222fe:	bd80      	pop	{r7, pc}
 8022300:	24000044 	.word	0x24000044
 8022304:	2402a078 	.word	0x2402a078
 8022308:	10624dd3 	.word	0x10624dd3

0802230c <dhcp_rebind>:
 *
 * @param netif network interface which must rebind with a DHCP server
 */
static err_t
dhcp_rebind(struct netif *netif)
{
 802230c:	b580      	push	{r7, lr}
 802230e:	b08a      	sub	sp, #40	@ 0x28
 8022310:	af02      	add	r7, sp, #8
 8022312:	6078      	str	r0, [r7, #4]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 8022314:	687b      	ldr	r3, [r7, #4]
 8022316:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8022318:	61bb      	str	r3, [r7, #24]
  u8_t i;
  struct pbuf *p_out;
  u16_t options_out_len;

  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_rebind()\n"));
  dhcp_set_state(dhcp, DHCP_STATE_REBINDING);
 802231a:	2104      	movs	r1, #4
 802231c:	69b8      	ldr	r0, [r7, #24]
 802231e:	f000 f9ea 	bl	80226f6 <dhcp_set_state>

  /* create and initialize the DHCP message header */
  p_out = dhcp_create_msg(netif, dhcp, DHCP_REQUEST, &options_out_len);
 8022322:	f107 030c 	add.w	r3, r7, #12
 8022326:	2203      	movs	r2, #3
 8022328:	69b9      	ldr	r1, [r7, #24]
 802232a:	6878      	ldr	r0, [r7, #4]
 802232c:	f000 fe7c 	bl	8023028 <dhcp_create_msg>
 8022330:	6178      	str	r0, [r7, #20]
  if (p_out != NULL) {
 8022332:	697b      	ldr	r3, [r7, #20]
 8022334:	2b00      	cmp	r3, #0
 8022336:	d04c      	beq.n	80223d2 <dhcp_rebind+0xc6>
    struct dhcp_msg *msg_out = (struct dhcp_msg *)p_out->payload;
 8022338:	697b      	ldr	r3, [r7, #20]
 802233a:	685b      	ldr	r3, [r3, #4]
 802233c:	613b      	str	r3, [r7, #16]
    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_MAX_MSG_SIZE, DHCP_OPTION_MAX_MSG_SIZE_LEN);
 802233e:	89b8      	ldrh	r0, [r7, #12]
 8022340:	693b      	ldr	r3, [r7, #16]
 8022342:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8022346:	2302      	movs	r3, #2
 8022348:	2239      	movs	r2, #57	@ 0x39
 802234a:	f000 f9ef 	bl	802272c <dhcp_option>
 802234e:	4603      	mov	r3, r0
 8022350:	81bb      	strh	r3, [r7, #12]
    options_out_len = dhcp_option_short(options_out_len, msg_out->options, DHCP_MAX_MSG_LEN(netif));
 8022352:	89b8      	ldrh	r0, [r7, #12]
 8022354:	693b      	ldr	r3, [r7, #16]
 8022356:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 802235a:	687b      	ldr	r3, [r7, #4]
 802235c:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 802235e:	461a      	mov	r2, r3
 8022360:	f000 fa3e 	bl	80227e0 <dhcp_option_short>
 8022364:	4603      	mov	r3, r0
 8022366:	81bb      	strh	r3, [r7, #12]

    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_PARAMETER_REQUEST_LIST, LWIP_ARRAYSIZE(dhcp_discover_request_options));
 8022368:	89b8      	ldrh	r0, [r7, #12]
 802236a:	693b      	ldr	r3, [r7, #16]
 802236c:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8022370:	2303      	movs	r3, #3
 8022372:	2237      	movs	r2, #55	@ 0x37
 8022374:	f000 f9da 	bl	802272c <dhcp_option>
 8022378:	4603      	mov	r3, r0
 802237a:	81bb      	strh	r3, [r7, #12]
    for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
 802237c:	2300      	movs	r3, #0
 802237e:	77bb      	strb	r3, [r7, #30]
 8022380:	e00e      	b.n	80223a0 <dhcp_rebind+0x94>
      options_out_len = dhcp_option_byte(options_out_len, msg_out->options, dhcp_discover_request_options[i]);
 8022382:	89b8      	ldrh	r0, [r7, #12]
 8022384:	693b      	ldr	r3, [r7, #16]
 8022386:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 802238a:	7fbb      	ldrb	r3, [r7, #30]
 802238c:	4a28      	ldr	r2, [pc, #160]	@ (8022430 <dhcp_rebind+0x124>)
 802238e:	5cd3      	ldrb	r3, [r2, r3]
 8022390:	461a      	mov	r2, r3
 8022392:	f000 f9ff 	bl	8022794 <dhcp_option_byte>
 8022396:	4603      	mov	r3, r0
 8022398:	81bb      	strh	r3, [r7, #12]
    for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
 802239a:	7fbb      	ldrb	r3, [r7, #30]
 802239c:	3301      	adds	r3, #1
 802239e:	77bb      	strb	r3, [r7, #30]
 80223a0:	7fbb      	ldrb	r3, [r7, #30]
 80223a2:	2b02      	cmp	r3, #2
 80223a4:	d9ed      	bls.n	8022382 <dhcp_rebind+0x76>
#if LWIP_NETIF_HOSTNAME
    options_out_len = dhcp_option_hostname(options_out_len, msg_out->options, netif);
#endif /* LWIP_NETIF_HOSTNAME */

    LWIP_HOOK_DHCP_APPEND_OPTIONS(netif, dhcp, DHCP_STATE_REBINDING, msg_out, DHCP_DISCOVER, &options_out_len);
    dhcp_option_trailer(options_out_len, msg_out->options, p_out);
 80223a6:	89b8      	ldrh	r0, [r7, #12]
 80223a8:	693b      	ldr	r3, [r7, #16]
 80223aa:	33f0      	adds	r3, #240	@ 0xf0
 80223ac:	697a      	ldr	r2, [r7, #20]
 80223ae:	4619      	mov	r1, r3
 80223b0:	f000 ff10 	bl	80231d4 <dhcp_option_trailer>

    /* broadcast to server */
    result = udp_sendto_if(dhcp_pcb, p_out, IP_ADDR_BROADCAST, LWIP_IANA_PORT_DHCP_SERVER, netif);
 80223b4:	4b1f      	ldr	r3, [pc, #124]	@ (8022434 <dhcp_rebind+0x128>)
 80223b6:	6818      	ldr	r0, [r3, #0]
 80223b8:	687b      	ldr	r3, [r7, #4]
 80223ba:	9300      	str	r3, [sp, #0]
 80223bc:	2343      	movs	r3, #67	@ 0x43
 80223be:	4a1e      	ldr	r2, [pc, #120]	@ (8022438 <dhcp_rebind+0x12c>)
 80223c0:	6979      	ldr	r1, [r7, #20]
 80223c2:	f7fe fd71 	bl	8020ea8 <udp_sendto_if>
 80223c6:	4603      	mov	r3, r0
 80223c8:	77fb      	strb	r3, [r7, #31]
    pbuf_free(p_out);
 80223ca:	6978      	ldr	r0, [r7, #20]
 80223cc:	f7f7 fe26 	bl	801a01c <pbuf_free>
 80223d0:	e001      	b.n	80223d6 <dhcp_rebind+0xca>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_rebind: REBINDING\n"));
  } else {
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("dhcp_rebind: could not allocate DHCP request\n"));
    result = ERR_MEM;
 80223d2:	23ff      	movs	r3, #255	@ 0xff
 80223d4:	77fb      	strb	r3, [r7, #31]
  }
  if (dhcp->tries < 255) {
 80223d6:	69bb      	ldr	r3, [r7, #24]
 80223d8:	799b      	ldrb	r3, [r3, #6]
 80223da:	2bff      	cmp	r3, #255	@ 0xff
 80223dc:	d005      	beq.n	80223ea <dhcp_rebind+0xde>
    dhcp->tries++;
 80223de:	69bb      	ldr	r3, [r7, #24]
 80223e0:	799b      	ldrb	r3, [r3, #6]
 80223e2:	3301      	adds	r3, #1
 80223e4:	b2da      	uxtb	r2, r3
 80223e6:	69bb      	ldr	r3, [r7, #24]
 80223e8:	719a      	strb	r2, [r3, #6]
  }
  msecs = (u16_t)(dhcp->tries < 10 ? dhcp->tries * 1000 : 10 * 1000);
 80223ea:	69bb      	ldr	r3, [r7, #24]
 80223ec:	799b      	ldrb	r3, [r3, #6]
 80223ee:	2b09      	cmp	r3, #9
 80223f0:	d809      	bhi.n	8022406 <dhcp_rebind+0xfa>
 80223f2:	69bb      	ldr	r3, [r7, #24]
 80223f4:	799b      	ldrb	r3, [r3, #6]
 80223f6:	461a      	mov	r2, r3
 80223f8:	0152      	lsls	r2, r2, #5
 80223fa:	1ad2      	subs	r2, r2, r3
 80223fc:	0092      	lsls	r2, r2, #2
 80223fe:	4413      	add	r3, r2
 8022400:	00db      	lsls	r3, r3, #3
 8022402:	b29b      	uxth	r3, r3
 8022404:	e001      	b.n	802240a <dhcp_rebind+0xfe>
 8022406:	f242 7310 	movw	r3, #10000	@ 0x2710
 802240a:	81fb      	strh	r3, [r7, #14]
  dhcp->request_timeout = (u16_t)((msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS);
 802240c:	89fb      	ldrh	r3, [r7, #14]
 802240e:	f203 13f3 	addw	r3, r3, #499	@ 0x1f3
 8022412:	4a0a      	ldr	r2, [pc, #40]	@ (802243c <dhcp_rebind+0x130>)
 8022414:	fb82 1203 	smull	r1, r2, r2, r3
 8022418:	1152      	asrs	r2, r2, #5
 802241a:	17db      	asrs	r3, r3, #31
 802241c:	1ad3      	subs	r3, r2, r3
 802241e:	b29a      	uxth	r2, r3
 8022420:	69bb      	ldr	r3, [r7, #24]
 8022422:	811a      	strh	r2, [r3, #8]
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_rebind(): set request timeout %"U16_F" msecs\n", msecs));
  return result;
 8022424:	f997 301f 	ldrsb.w	r3, [r7, #31]
}
 8022428:	4618      	mov	r0, r3
 802242a:	3720      	adds	r7, #32
 802242c:	46bd      	mov	sp, r7
 802242e:	bd80      	pop	{r7, pc}
 8022430:	24000044 	.word	0x24000044
 8022434:	2402a078 	.word	0x2402a078
 8022438:	080307a8 	.word	0x080307a8
 802243c:	10624dd3 	.word	0x10624dd3

08022440 <dhcp_reboot>:
 *
 * @param netif network interface which must reboot
 */
static err_t
dhcp_reboot(struct netif *netif)
{
 8022440:	b5b0      	push	{r4, r5, r7, lr}
 8022442:	b08a      	sub	sp, #40	@ 0x28
 8022444:	af02      	add	r7, sp, #8
 8022446:	6078      	str	r0, [r7, #4]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 8022448:	687b      	ldr	r3, [r7, #4]
 802244a:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 802244c:	61bb      	str	r3, [r7, #24]
  u8_t i;
  struct pbuf *p_out;
  u16_t options_out_len;

  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_reboot()\n"));
  dhcp_set_state(dhcp, DHCP_STATE_REBOOTING);
 802244e:	2103      	movs	r1, #3
 8022450:	69b8      	ldr	r0, [r7, #24]
 8022452:	f000 f950 	bl	80226f6 <dhcp_set_state>

  /* create and initialize the DHCP message header */
  p_out = dhcp_create_msg(netif, dhcp, DHCP_REQUEST, &options_out_len);
 8022456:	f107 030c 	add.w	r3, r7, #12
 802245a:	2203      	movs	r2, #3
 802245c:	69b9      	ldr	r1, [r7, #24]
 802245e:	6878      	ldr	r0, [r7, #4]
 8022460:	f000 fde2 	bl	8023028 <dhcp_create_msg>
 8022464:	6178      	str	r0, [r7, #20]
  if (p_out != NULL) {
 8022466:	697b      	ldr	r3, [r7, #20]
 8022468:	2b00      	cmp	r3, #0
 802246a:	d066      	beq.n	802253a <dhcp_reboot+0xfa>
    struct dhcp_msg *msg_out = (struct dhcp_msg *)p_out->payload;
 802246c:	697b      	ldr	r3, [r7, #20]
 802246e:	685b      	ldr	r3, [r3, #4]
 8022470:	613b      	str	r3, [r7, #16]
    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_MAX_MSG_SIZE, DHCP_OPTION_MAX_MSG_SIZE_LEN);
 8022472:	89b8      	ldrh	r0, [r7, #12]
 8022474:	693b      	ldr	r3, [r7, #16]
 8022476:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 802247a:	2302      	movs	r3, #2
 802247c:	2239      	movs	r2, #57	@ 0x39
 802247e:	f000 f955 	bl	802272c <dhcp_option>
 8022482:	4603      	mov	r3, r0
 8022484:	81bb      	strh	r3, [r7, #12]
    options_out_len = dhcp_option_short(options_out_len, msg_out->options, DHCP_MAX_MSG_LEN_MIN_REQUIRED);
 8022486:	89b8      	ldrh	r0, [r7, #12]
 8022488:	693b      	ldr	r3, [r7, #16]
 802248a:	33f0      	adds	r3, #240	@ 0xf0
 802248c:	f44f 7210 	mov.w	r2, #576	@ 0x240
 8022490:	4619      	mov	r1, r3
 8022492:	f000 f9a5 	bl	80227e0 <dhcp_option_short>
 8022496:	4603      	mov	r3, r0
 8022498:	81bb      	strh	r3, [r7, #12]

    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_REQUESTED_IP, 4);
 802249a:	89b8      	ldrh	r0, [r7, #12]
 802249c:	693b      	ldr	r3, [r7, #16]
 802249e:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 80224a2:	2304      	movs	r3, #4
 80224a4:	2232      	movs	r2, #50	@ 0x32
 80224a6:	f000 f941 	bl	802272c <dhcp_option>
 80224aa:	4603      	mov	r3, r0
 80224ac:	81bb      	strh	r3, [r7, #12]
    options_out_len = dhcp_option_long(options_out_len, msg_out->options, lwip_ntohl(ip4_addr_get_u32(&dhcp->offered_ip_addr)));
 80224ae:	89bc      	ldrh	r4, [r7, #12]
 80224b0:	693b      	ldr	r3, [r7, #16]
 80224b2:	f103 05f0 	add.w	r5, r3, #240	@ 0xf0
 80224b6:	69bb      	ldr	r3, [r7, #24]
 80224b8:	69db      	ldr	r3, [r3, #28]
 80224ba:	4618      	mov	r0, r3
 80224bc:	f7f6 f8e1 	bl	8018682 <lwip_htonl>
 80224c0:	4603      	mov	r3, r0
 80224c2:	461a      	mov	r2, r3
 80224c4:	4629      	mov	r1, r5
 80224c6:	4620      	mov	r0, r4
 80224c8:	f000 f9bc 	bl	8022844 <dhcp_option_long>
 80224cc:	4603      	mov	r3, r0
 80224ce:	81bb      	strh	r3, [r7, #12]

    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_PARAMETER_REQUEST_LIST, LWIP_ARRAYSIZE(dhcp_discover_request_options));
 80224d0:	89b8      	ldrh	r0, [r7, #12]
 80224d2:	693b      	ldr	r3, [r7, #16]
 80224d4:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 80224d8:	2303      	movs	r3, #3
 80224da:	2237      	movs	r2, #55	@ 0x37
 80224dc:	f000 f926 	bl	802272c <dhcp_option>
 80224e0:	4603      	mov	r3, r0
 80224e2:	81bb      	strh	r3, [r7, #12]
    for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
 80224e4:	2300      	movs	r3, #0
 80224e6:	77bb      	strb	r3, [r7, #30]
 80224e8:	e00e      	b.n	8022508 <dhcp_reboot+0xc8>
      options_out_len = dhcp_option_byte(options_out_len, msg_out->options, dhcp_discover_request_options[i]);
 80224ea:	89b8      	ldrh	r0, [r7, #12]
 80224ec:	693b      	ldr	r3, [r7, #16]
 80224ee:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 80224f2:	7fbb      	ldrb	r3, [r7, #30]
 80224f4:	4a28      	ldr	r2, [pc, #160]	@ (8022598 <dhcp_reboot+0x158>)
 80224f6:	5cd3      	ldrb	r3, [r2, r3]
 80224f8:	461a      	mov	r2, r3
 80224fa:	f000 f94b 	bl	8022794 <dhcp_option_byte>
 80224fe:	4603      	mov	r3, r0
 8022500:	81bb      	strh	r3, [r7, #12]
    for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
 8022502:	7fbb      	ldrb	r3, [r7, #30]
 8022504:	3301      	adds	r3, #1
 8022506:	77bb      	strb	r3, [r7, #30]
 8022508:	7fbb      	ldrb	r3, [r7, #30]
 802250a:	2b02      	cmp	r3, #2
 802250c:	d9ed      	bls.n	80224ea <dhcp_reboot+0xaa>
#if LWIP_NETIF_HOSTNAME
    options_out_len = dhcp_option_hostname(options_out_len, msg_out->options, netif);
#endif /* LWIP_NETIF_HOSTNAME */

    LWIP_HOOK_DHCP_APPEND_OPTIONS(netif, dhcp, DHCP_STATE_REBOOTING, msg_out, DHCP_REQUEST, &options_out_len);
    dhcp_option_trailer(options_out_len, msg_out->options, p_out);
 802250e:	89b8      	ldrh	r0, [r7, #12]
 8022510:	693b      	ldr	r3, [r7, #16]
 8022512:	33f0      	adds	r3, #240	@ 0xf0
 8022514:	697a      	ldr	r2, [r7, #20]
 8022516:	4619      	mov	r1, r3
 8022518:	f000 fe5c 	bl	80231d4 <dhcp_option_trailer>

    /* broadcast to server */
    result = udp_sendto_if(dhcp_pcb, p_out, IP_ADDR_BROADCAST, LWIP_IANA_PORT_DHCP_SERVER, netif);
 802251c:	4b1f      	ldr	r3, [pc, #124]	@ (802259c <dhcp_reboot+0x15c>)
 802251e:	6818      	ldr	r0, [r3, #0]
 8022520:	687b      	ldr	r3, [r7, #4]
 8022522:	9300      	str	r3, [sp, #0]
 8022524:	2343      	movs	r3, #67	@ 0x43
 8022526:	4a1e      	ldr	r2, [pc, #120]	@ (80225a0 <dhcp_reboot+0x160>)
 8022528:	6979      	ldr	r1, [r7, #20]
 802252a:	f7fe fcbd 	bl	8020ea8 <udp_sendto_if>
 802252e:	4603      	mov	r3, r0
 8022530:	77fb      	strb	r3, [r7, #31]
    pbuf_free(p_out);
 8022532:	6978      	ldr	r0, [r7, #20]
 8022534:	f7f7 fd72 	bl	801a01c <pbuf_free>
 8022538:	e001      	b.n	802253e <dhcp_reboot+0xfe>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_reboot: REBOOTING\n"));
  } else {
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("dhcp_reboot: could not allocate DHCP request\n"));
    result = ERR_MEM;
 802253a:	23ff      	movs	r3, #255	@ 0xff
 802253c:	77fb      	strb	r3, [r7, #31]
  }
  if (dhcp->tries < 255) {
 802253e:	69bb      	ldr	r3, [r7, #24]
 8022540:	799b      	ldrb	r3, [r3, #6]
 8022542:	2bff      	cmp	r3, #255	@ 0xff
 8022544:	d005      	beq.n	8022552 <dhcp_reboot+0x112>
    dhcp->tries++;
 8022546:	69bb      	ldr	r3, [r7, #24]
 8022548:	799b      	ldrb	r3, [r3, #6]
 802254a:	3301      	adds	r3, #1
 802254c:	b2da      	uxtb	r2, r3
 802254e:	69bb      	ldr	r3, [r7, #24]
 8022550:	719a      	strb	r2, [r3, #6]
  }
  msecs = (u16_t)(dhcp->tries < 10 ? dhcp->tries * 1000 : 10 * 1000);
 8022552:	69bb      	ldr	r3, [r7, #24]
 8022554:	799b      	ldrb	r3, [r3, #6]
 8022556:	2b09      	cmp	r3, #9
 8022558:	d809      	bhi.n	802256e <dhcp_reboot+0x12e>
 802255a:	69bb      	ldr	r3, [r7, #24]
 802255c:	799b      	ldrb	r3, [r3, #6]
 802255e:	461a      	mov	r2, r3
 8022560:	0152      	lsls	r2, r2, #5
 8022562:	1ad2      	subs	r2, r2, r3
 8022564:	0092      	lsls	r2, r2, #2
 8022566:	4413      	add	r3, r2
 8022568:	00db      	lsls	r3, r3, #3
 802256a:	b29b      	uxth	r3, r3
 802256c:	e001      	b.n	8022572 <dhcp_reboot+0x132>
 802256e:	f242 7310 	movw	r3, #10000	@ 0x2710
 8022572:	81fb      	strh	r3, [r7, #14]
  dhcp->request_timeout = (u16_t)((msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS);
 8022574:	89fb      	ldrh	r3, [r7, #14]
 8022576:	f203 13f3 	addw	r3, r3, #499	@ 0x1f3
 802257a:	4a0a      	ldr	r2, [pc, #40]	@ (80225a4 <dhcp_reboot+0x164>)
 802257c:	fb82 1203 	smull	r1, r2, r2, r3
 8022580:	1152      	asrs	r2, r2, #5
 8022582:	17db      	asrs	r3, r3, #31
 8022584:	1ad3      	subs	r3, r2, r3
 8022586:	b29a      	uxth	r2, r3
 8022588:	69bb      	ldr	r3, [r7, #24]
 802258a:	811a      	strh	r2, [r3, #8]
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_reboot(): set request timeout %"U16_F" msecs\n", msecs));
  return result;
 802258c:	f997 301f 	ldrsb.w	r3, [r7, #31]
}
 8022590:	4618      	mov	r0, r3
 8022592:	3720      	adds	r7, #32
 8022594:	46bd      	mov	sp, r7
 8022596:	bdb0      	pop	{r4, r5, r7, pc}
 8022598:	24000044 	.word	0x24000044
 802259c:	2402a078 	.word	0x2402a078
 80225a0:	080307a8 	.word	0x080307a8
 80225a4:	10624dd3 	.word	0x10624dd3

080225a8 <dhcp_release_and_stop>:
 *
 * @param netif network interface
 */
void
dhcp_release_and_stop(struct netif *netif)
{
 80225a8:	b5b0      	push	{r4, r5, r7, lr}
 80225aa:	b08a      	sub	sp, #40	@ 0x28
 80225ac:	af02      	add	r7, sp, #8
 80225ae:	6078      	str	r0, [r7, #4]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 80225b0:	687b      	ldr	r3, [r7, #4]
 80225b2:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 80225b4:	61fb      	str	r3, [r7, #28]
  ip_addr_t server_ip_addr;

  LWIP_ASSERT_CORE_LOCKED();
 80225b6:	f7ed fd5b 	bl	8010070 <sys_check_core_locking>
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_release_and_stop()\n"));
  if (dhcp == NULL) {
 80225ba:	69fb      	ldr	r3, [r7, #28]
 80225bc:	2b00      	cmp	r3, #0
 80225be:	f000 8084 	beq.w	80226ca <dhcp_release_and_stop+0x122>
    return;
  }

  /* already off? -> nothing to do */
  if (dhcp->state == DHCP_STATE_OFF) {
 80225c2:	69fb      	ldr	r3, [r7, #28]
 80225c4:	795b      	ldrb	r3, [r3, #5]
 80225c6:	2b00      	cmp	r3, #0
 80225c8:	f000 8081 	beq.w	80226ce <dhcp_release_and_stop+0x126>
    return;
  }

  ip_addr_copy(server_ip_addr, dhcp->server_ip_addr);
 80225cc:	69fb      	ldr	r3, [r7, #28]
 80225ce:	699b      	ldr	r3, [r3, #24]
 80225d0:	613b      	str	r3, [r7, #16]

  /* clean old DHCP offer */
  ip_addr_set_zero_ip4(&dhcp->server_ip_addr);
 80225d2:	69fb      	ldr	r3, [r7, #28]
 80225d4:	2200      	movs	r2, #0
 80225d6:	619a      	str	r2, [r3, #24]
  ip4_addr_set_zero(&dhcp->offered_ip_addr);
 80225d8:	69fb      	ldr	r3, [r7, #28]
 80225da:	2200      	movs	r2, #0
 80225dc:	61da      	str	r2, [r3, #28]
  ip4_addr_set_zero(&dhcp->offered_sn_mask);
 80225de:	69fb      	ldr	r3, [r7, #28]
 80225e0:	2200      	movs	r2, #0
 80225e2:	621a      	str	r2, [r3, #32]
  ip4_addr_set_zero(&dhcp->offered_gw_addr);
 80225e4:	69fb      	ldr	r3, [r7, #28]
 80225e6:	2200      	movs	r2, #0
 80225e8:	625a      	str	r2, [r3, #36]	@ 0x24
#if LWIP_DHCP_BOOTP_FILE
  ip4_addr_set_zero(&dhcp->offered_si_addr);
#endif /* LWIP_DHCP_BOOTP_FILE */
  dhcp->offered_t0_lease = dhcp->offered_t1_renew = dhcp->offered_t2_rebind = 0;
 80225ea:	69fb      	ldr	r3, [r7, #28]
 80225ec:	2200      	movs	r2, #0
 80225ee:	631a      	str	r2, [r3, #48]	@ 0x30
 80225f0:	69fb      	ldr	r3, [r7, #28]
 80225f2:	6b1a      	ldr	r2, [r3, #48]	@ 0x30
 80225f4:	69fb      	ldr	r3, [r7, #28]
 80225f6:	62da      	str	r2, [r3, #44]	@ 0x2c
 80225f8:	69fb      	ldr	r3, [r7, #28]
 80225fa:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 80225fc:	69fb      	ldr	r3, [r7, #28]
 80225fe:	629a      	str	r2, [r3, #40]	@ 0x28
  dhcp->t1_renew_time = dhcp->t2_rebind_time = dhcp->lease_used = dhcp->t0_timeout = 0;
 8022600:	69fb      	ldr	r3, [r7, #28]
 8022602:	2200      	movs	r2, #0
 8022604:	829a      	strh	r2, [r3, #20]
 8022606:	69fb      	ldr	r3, [r7, #28]
 8022608:	8a9a      	ldrh	r2, [r3, #20]
 802260a:	69fb      	ldr	r3, [r7, #28]
 802260c:	825a      	strh	r2, [r3, #18]
 802260e:	69fb      	ldr	r3, [r7, #28]
 8022610:	8a5a      	ldrh	r2, [r3, #18]
 8022612:	69fb      	ldr	r3, [r7, #28]
 8022614:	821a      	strh	r2, [r3, #16]
 8022616:	69fb      	ldr	r3, [r7, #28]
 8022618:	8a1a      	ldrh	r2, [r3, #16]
 802261a:	69fb      	ldr	r3, [r7, #28]
 802261c:	81da      	strh	r2, [r3, #14]

  /* send release message when current IP was assigned via DHCP */
  if (dhcp_supplied_address(netif)) {
 802261e:	6878      	ldr	r0, [r7, #4]
 8022620:	f000 fe06 	bl	8023230 <dhcp_supplied_address>
 8022624:	4603      	mov	r3, r0
 8022626:	2b00      	cmp	r3, #0
 8022628:	d03b      	beq.n	80226a2 <dhcp_release_and_stop+0xfa>
    /* create and initialize the DHCP message header */
    struct pbuf *p_out;
    u16_t options_out_len;
    p_out = dhcp_create_msg(netif, dhcp, DHCP_RELEASE, &options_out_len);
 802262a:	f107 030e 	add.w	r3, r7, #14
 802262e:	2207      	movs	r2, #7
 8022630:	69f9      	ldr	r1, [r7, #28]
 8022632:	6878      	ldr	r0, [r7, #4]
 8022634:	f000 fcf8 	bl	8023028 <dhcp_create_msg>
 8022638:	61b8      	str	r0, [r7, #24]
    if (p_out != NULL) {
 802263a:	69bb      	ldr	r3, [r7, #24]
 802263c:	2b00      	cmp	r3, #0
 802263e:	d030      	beq.n	80226a2 <dhcp_release_and_stop+0xfa>
      struct dhcp_msg *msg_out = (struct dhcp_msg *)p_out->payload;
 8022640:	69bb      	ldr	r3, [r7, #24]
 8022642:	685b      	ldr	r3, [r3, #4]
 8022644:	617b      	str	r3, [r7, #20]
      options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_SERVER_ID, 4);
 8022646:	89f8      	ldrh	r0, [r7, #14]
 8022648:	697b      	ldr	r3, [r7, #20]
 802264a:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 802264e:	2304      	movs	r3, #4
 8022650:	2236      	movs	r2, #54	@ 0x36
 8022652:	f000 f86b 	bl	802272c <dhcp_option>
 8022656:	4603      	mov	r3, r0
 8022658:	81fb      	strh	r3, [r7, #14]
      options_out_len = dhcp_option_long(options_out_len, msg_out->options, lwip_ntohl(ip4_addr_get_u32(ip_2_ip4(&server_ip_addr))));
 802265a:	89fc      	ldrh	r4, [r7, #14]
 802265c:	697b      	ldr	r3, [r7, #20]
 802265e:	f103 05f0 	add.w	r5, r3, #240	@ 0xf0
 8022662:	693b      	ldr	r3, [r7, #16]
 8022664:	4618      	mov	r0, r3
 8022666:	f7f6 f80c 	bl	8018682 <lwip_htonl>
 802266a:	4603      	mov	r3, r0
 802266c:	461a      	mov	r2, r3
 802266e:	4629      	mov	r1, r5
 8022670:	4620      	mov	r0, r4
 8022672:	f000 f8e7 	bl	8022844 <dhcp_option_long>
 8022676:	4603      	mov	r3, r0
 8022678:	81fb      	strh	r3, [r7, #14]

      LWIP_HOOK_DHCP_APPEND_OPTIONS(netif, dhcp, dhcp->state, msg_out, DHCP_RELEASE, &options_out_len);
      dhcp_option_trailer(options_out_len, msg_out->options, p_out);
 802267a:	89f8      	ldrh	r0, [r7, #14]
 802267c:	697b      	ldr	r3, [r7, #20]
 802267e:	33f0      	adds	r3, #240	@ 0xf0
 8022680:	69ba      	ldr	r2, [r7, #24]
 8022682:	4619      	mov	r1, r3
 8022684:	f000 fda6 	bl	80231d4 <dhcp_option_trailer>

      udp_sendto_if(dhcp_pcb, p_out, &server_ip_addr, LWIP_IANA_PORT_DHCP_SERVER, netif);
 8022688:	4b13      	ldr	r3, [pc, #76]	@ (80226d8 <dhcp_release_and_stop+0x130>)
 802268a:	6818      	ldr	r0, [r3, #0]
 802268c:	f107 0210 	add.w	r2, r7, #16
 8022690:	687b      	ldr	r3, [r7, #4]
 8022692:	9300      	str	r3, [sp, #0]
 8022694:	2343      	movs	r3, #67	@ 0x43
 8022696:	69b9      	ldr	r1, [r7, #24]
 8022698:	f7fe fc06 	bl	8020ea8 <udp_sendto_if>
      pbuf_free(p_out);
 802269c:	69b8      	ldr	r0, [r7, #24]
 802269e:	f7f7 fcbd 	bl	801a01c <pbuf_free>
      LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("dhcp_release: could not allocate DHCP request\n"));
    }
  }

  /* remove IP address from interface (prevents routing from selecting this interface) */
  netif_set_addr(netif, IP4_ADDR_ANY4, IP4_ADDR_ANY4, IP4_ADDR_ANY4);
 80226a2:	4b0e      	ldr	r3, [pc, #56]	@ (80226dc <dhcp_release_and_stop+0x134>)
 80226a4:	4a0d      	ldr	r2, [pc, #52]	@ (80226dc <dhcp_release_and_stop+0x134>)
 80226a6:	490d      	ldr	r1, [pc, #52]	@ (80226dc <dhcp_release_and_stop+0x134>)
 80226a8:	6878      	ldr	r0, [r7, #4]
 80226aa:	f7f6 ff6d 	bl	8019588 <netif_set_addr>
    autoip_stop(netif);
    dhcp->autoip_coop_state = DHCP_AUTOIP_COOP_STATE_OFF;
  }
#endif /* LWIP_DHCP_AUTOIP_COOP */

  dhcp_set_state(dhcp, DHCP_STATE_OFF);
 80226ae:	2100      	movs	r1, #0
 80226b0:	69f8      	ldr	r0, [r7, #28]
 80226b2:	f000 f820 	bl	80226f6 <dhcp_set_state>

  if (dhcp->pcb_allocated != 0) {
 80226b6:	69fb      	ldr	r3, [r7, #28]
 80226b8:	791b      	ldrb	r3, [r3, #4]
 80226ba:	2b00      	cmp	r3, #0
 80226bc:	d008      	beq.n	80226d0 <dhcp_release_and_stop+0x128>
    dhcp_dec_pcb_refcount(); /* free DHCP PCB if not needed any more */
 80226be:	f7fe ff83 	bl	80215c8 <dhcp_dec_pcb_refcount>
    dhcp->pcb_allocated = 0;
 80226c2:	69fb      	ldr	r3, [r7, #28]
 80226c4:	2200      	movs	r2, #0
 80226c6:	711a      	strb	r2, [r3, #4]
 80226c8:	e002      	b.n	80226d0 <dhcp_release_and_stop+0x128>
    return;
 80226ca:	bf00      	nop
 80226cc:	e000      	b.n	80226d0 <dhcp_release_and_stop+0x128>
    return;
 80226ce:	bf00      	nop
  }
}
 80226d0:	3720      	adds	r7, #32
 80226d2:	46bd      	mov	sp, r7
 80226d4:	bdb0      	pop	{r4, r5, r7, pc}
 80226d6:	bf00      	nop
 80226d8:	2402a078 	.word	0x2402a078
 80226dc:	080307a4 	.word	0x080307a4

080226e0 <dhcp_stop>:
 * This function calls dhcp_release_and_stop() internally.
 * @deprecated Use dhcp_release_and_stop() instead.
 */
void
dhcp_stop(struct netif *netif)
{
 80226e0:	b580      	push	{r7, lr}
 80226e2:	b082      	sub	sp, #8
 80226e4:	af00      	add	r7, sp, #0
 80226e6:	6078      	str	r0, [r7, #4]
  dhcp_release_and_stop(netif);
 80226e8:	6878      	ldr	r0, [r7, #4]
 80226ea:	f7ff ff5d 	bl	80225a8 <dhcp_release_and_stop>
}
 80226ee:	bf00      	nop
 80226f0:	3708      	adds	r7, #8
 80226f2:	46bd      	mov	sp, r7
 80226f4:	bd80      	pop	{r7, pc}

080226f6 <dhcp_set_state>:
 *
 * If the state changed, reset the number of tries.
 */
static void
dhcp_set_state(struct dhcp *dhcp, u8_t new_state)
{
 80226f6:	b480      	push	{r7}
 80226f8:	b083      	sub	sp, #12
 80226fa:	af00      	add	r7, sp, #0
 80226fc:	6078      	str	r0, [r7, #4]
 80226fe:	460b      	mov	r3, r1
 8022700:	70fb      	strb	r3, [r7, #3]
  if (new_state != dhcp->state) {
 8022702:	687b      	ldr	r3, [r7, #4]
 8022704:	795b      	ldrb	r3, [r3, #5]
 8022706:	78fa      	ldrb	r2, [r7, #3]
 8022708:	429a      	cmp	r2, r3
 802270a:	d008      	beq.n	802271e <dhcp_set_state+0x28>
    dhcp->state = new_state;
 802270c:	687b      	ldr	r3, [r7, #4]
 802270e:	78fa      	ldrb	r2, [r7, #3]
 8022710:	715a      	strb	r2, [r3, #5]
    dhcp->tries = 0;
 8022712:	687b      	ldr	r3, [r7, #4]
 8022714:	2200      	movs	r2, #0
 8022716:	719a      	strb	r2, [r3, #6]
    dhcp->request_timeout = 0;
 8022718:	687b      	ldr	r3, [r7, #4]
 802271a:	2200      	movs	r2, #0
 802271c:	811a      	strh	r2, [r3, #8]
  }
}
 802271e:	bf00      	nop
 8022720:	370c      	adds	r7, #12
 8022722:	46bd      	mov	sp, r7
 8022724:	f85d 7b04 	ldr.w	r7, [sp], #4
 8022728:	4770      	bx	lr
	...

0802272c <dhcp_option>:
 * DHCP message.
 *
 */
static u16_t
dhcp_option(u16_t options_out_len, u8_t *options, u8_t option_type, u8_t option_len)
{
 802272c:	b580      	push	{r7, lr}
 802272e:	b082      	sub	sp, #8
 8022730:	af00      	add	r7, sp, #0
 8022732:	6039      	str	r1, [r7, #0]
 8022734:	4611      	mov	r1, r2
 8022736:	461a      	mov	r2, r3
 8022738:	4603      	mov	r3, r0
 802273a:	80fb      	strh	r3, [r7, #6]
 802273c:	460b      	mov	r3, r1
 802273e:	717b      	strb	r3, [r7, #5]
 8022740:	4613      	mov	r3, r2
 8022742:	713b      	strb	r3, [r7, #4]
  LWIP_ASSERT("dhcp_option: options_out_len + 2 + option_len <= DHCP_OPTIONS_LEN", options_out_len + 2U + option_len <= DHCP_OPTIONS_LEN);
 8022744:	88fa      	ldrh	r2, [r7, #6]
 8022746:	793b      	ldrb	r3, [r7, #4]
 8022748:	4413      	add	r3, r2
 802274a:	3302      	adds	r3, #2
 802274c:	2b44      	cmp	r3, #68	@ 0x44
 802274e:	d906      	bls.n	802275e <dhcp_option+0x32>
 8022750:	4b0d      	ldr	r3, [pc, #52]	@ (8022788 <dhcp_option+0x5c>)
 8022752:	f240 529a 	movw	r2, #1434	@ 0x59a
 8022756:	490d      	ldr	r1, [pc, #52]	@ (802278c <dhcp_option+0x60>)
 8022758:	480d      	ldr	r0, [pc, #52]	@ (8022790 <dhcp_option+0x64>)
 802275a:	f006 fed7 	bl	802950c <iprintf>
  options[options_out_len++] = option_type;
 802275e:	88fb      	ldrh	r3, [r7, #6]
 8022760:	1c5a      	adds	r2, r3, #1
 8022762:	80fa      	strh	r2, [r7, #6]
 8022764:	461a      	mov	r2, r3
 8022766:	683b      	ldr	r3, [r7, #0]
 8022768:	4413      	add	r3, r2
 802276a:	797a      	ldrb	r2, [r7, #5]
 802276c:	701a      	strb	r2, [r3, #0]
  options[options_out_len++] = option_len;
 802276e:	88fb      	ldrh	r3, [r7, #6]
 8022770:	1c5a      	adds	r2, r3, #1
 8022772:	80fa      	strh	r2, [r7, #6]
 8022774:	461a      	mov	r2, r3
 8022776:	683b      	ldr	r3, [r7, #0]
 8022778:	4413      	add	r3, r2
 802277a:	793a      	ldrb	r2, [r7, #4]
 802277c:	701a      	strb	r2, [r3, #0]
  return options_out_len;
 802277e:	88fb      	ldrh	r3, [r7, #6]
}
 8022780:	4618      	mov	r0, r3
 8022782:	3708      	adds	r7, #8
 8022784:	46bd      	mov	sp, r7
 8022786:	bd80      	pop	{r7, pc}
 8022788:	0802f9e8 	.word	0x0802f9e8
 802278c:	0802fb7c 	.word	0x0802fb7c
 8022790:	0802fa48 	.word	0x0802fa48

08022794 <dhcp_option_byte>:
 * Concatenate a single byte to the outgoing DHCP message.
 *
 */
static u16_t
dhcp_option_byte(u16_t options_out_len, u8_t *options, u8_t value)
{
 8022794:	b580      	push	{r7, lr}
 8022796:	b082      	sub	sp, #8
 8022798:	af00      	add	r7, sp, #0
 802279a:	4603      	mov	r3, r0
 802279c:	6039      	str	r1, [r7, #0]
 802279e:	80fb      	strh	r3, [r7, #6]
 80227a0:	4613      	mov	r3, r2
 80227a2:	717b      	strb	r3, [r7, #5]
  LWIP_ASSERT("dhcp_option_byte: options_out_len < DHCP_OPTIONS_LEN", options_out_len < DHCP_OPTIONS_LEN);
 80227a4:	88fb      	ldrh	r3, [r7, #6]
 80227a6:	2b43      	cmp	r3, #67	@ 0x43
 80227a8:	d906      	bls.n	80227b8 <dhcp_option_byte+0x24>
 80227aa:	4b0a      	ldr	r3, [pc, #40]	@ (80227d4 <dhcp_option_byte+0x40>)
 80227ac:	f240 52a6 	movw	r2, #1446	@ 0x5a6
 80227b0:	4909      	ldr	r1, [pc, #36]	@ (80227d8 <dhcp_option_byte+0x44>)
 80227b2:	480a      	ldr	r0, [pc, #40]	@ (80227dc <dhcp_option_byte+0x48>)
 80227b4:	f006 feaa 	bl	802950c <iprintf>
  options[options_out_len++] = value;
 80227b8:	88fb      	ldrh	r3, [r7, #6]
 80227ba:	1c5a      	adds	r2, r3, #1
 80227bc:	80fa      	strh	r2, [r7, #6]
 80227be:	461a      	mov	r2, r3
 80227c0:	683b      	ldr	r3, [r7, #0]
 80227c2:	4413      	add	r3, r2
 80227c4:	797a      	ldrb	r2, [r7, #5]
 80227c6:	701a      	strb	r2, [r3, #0]
  return options_out_len;
 80227c8:	88fb      	ldrh	r3, [r7, #6]
}
 80227ca:	4618      	mov	r0, r3
 80227cc:	3708      	adds	r7, #8
 80227ce:	46bd      	mov	sp, r7
 80227d0:	bd80      	pop	{r7, pc}
 80227d2:	bf00      	nop
 80227d4:	0802f9e8 	.word	0x0802f9e8
 80227d8:	0802fbc0 	.word	0x0802fbc0
 80227dc:	0802fa48 	.word	0x0802fa48

080227e0 <dhcp_option_short>:

static u16_t
dhcp_option_short(u16_t options_out_len, u8_t *options, u16_t value)
{
 80227e0:	b580      	push	{r7, lr}
 80227e2:	b082      	sub	sp, #8
 80227e4:	af00      	add	r7, sp, #0
 80227e6:	4603      	mov	r3, r0
 80227e8:	6039      	str	r1, [r7, #0]
 80227ea:	80fb      	strh	r3, [r7, #6]
 80227ec:	4613      	mov	r3, r2
 80227ee:	80bb      	strh	r3, [r7, #4]
  LWIP_ASSERT("dhcp_option_short: options_out_len + 2 <= DHCP_OPTIONS_LEN", options_out_len + 2U <= DHCP_OPTIONS_LEN);
 80227f0:	88fb      	ldrh	r3, [r7, #6]
 80227f2:	3302      	adds	r3, #2
 80227f4:	2b44      	cmp	r3, #68	@ 0x44
 80227f6:	d906      	bls.n	8022806 <dhcp_option_short+0x26>
 80227f8:	4b0f      	ldr	r3, [pc, #60]	@ (8022838 <dhcp_option_short+0x58>)
 80227fa:	f240 52ae 	movw	r2, #1454	@ 0x5ae
 80227fe:	490f      	ldr	r1, [pc, #60]	@ (802283c <dhcp_option_short+0x5c>)
 8022800:	480f      	ldr	r0, [pc, #60]	@ (8022840 <dhcp_option_short+0x60>)
 8022802:	f006 fe83 	bl	802950c <iprintf>
  options[options_out_len++] = (u8_t)((value & 0xff00U) >> 8);
 8022806:	88bb      	ldrh	r3, [r7, #4]
 8022808:	0a1b      	lsrs	r3, r3, #8
 802280a:	b29a      	uxth	r2, r3
 802280c:	88fb      	ldrh	r3, [r7, #6]
 802280e:	1c59      	adds	r1, r3, #1
 8022810:	80f9      	strh	r1, [r7, #6]
 8022812:	4619      	mov	r1, r3
 8022814:	683b      	ldr	r3, [r7, #0]
 8022816:	440b      	add	r3, r1
 8022818:	b2d2      	uxtb	r2, r2
 802281a:	701a      	strb	r2, [r3, #0]
  options[options_out_len++] = (u8_t) (value & 0x00ffU);
 802281c:	88fb      	ldrh	r3, [r7, #6]
 802281e:	1c5a      	adds	r2, r3, #1
 8022820:	80fa      	strh	r2, [r7, #6]
 8022822:	461a      	mov	r2, r3
 8022824:	683b      	ldr	r3, [r7, #0]
 8022826:	4413      	add	r3, r2
 8022828:	88ba      	ldrh	r2, [r7, #4]
 802282a:	b2d2      	uxtb	r2, r2
 802282c:	701a      	strb	r2, [r3, #0]
  return options_out_len;
 802282e:	88fb      	ldrh	r3, [r7, #6]
}
 8022830:	4618      	mov	r0, r3
 8022832:	3708      	adds	r7, #8
 8022834:	46bd      	mov	sp, r7
 8022836:	bd80      	pop	{r7, pc}
 8022838:	0802f9e8 	.word	0x0802f9e8
 802283c:	0802fbf8 	.word	0x0802fbf8
 8022840:	0802fa48 	.word	0x0802fa48

08022844 <dhcp_option_long>:

static u16_t
dhcp_option_long(u16_t options_out_len, u8_t *options, u32_t value)
{
 8022844:	b580      	push	{r7, lr}
 8022846:	b084      	sub	sp, #16
 8022848:	af00      	add	r7, sp, #0
 802284a:	4603      	mov	r3, r0
 802284c:	60b9      	str	r1, [r7, #8]
 802284e:	607a      	str	r2, [r7, #4]
 8022850:	81fb      	strh	r3, [r7, #14]
  LWIP_ASSERT("dhcp_option_long: options_out_len + 4 <= DHCP_OPTIONS_LEN", options_out_len + 4U <= DHCP_OPTIONS_LEN);
 8022852:	89fb      	ldrh	r3, [r7, #14]
 8022854:	3304      	adds	r3, #4
 8022856:	2b44      	cmp	r3, #68	@ 0x44
 8022858:	d906      	bls.n	8022868 <dhcp_option_long+0x24>
 802285a:	4b19      	ldr	r3, [pc, #100]	@ (80228c0 <dhcp_option_long+0x7c>)
 802285c:	f240 52b7 	movw	r2, #1463	@ 0x5b7
 8022860:	4918      	ldr	r1, [pc, #96]	@ (80228c4 <dhcp_option_long+0x80>)
 8022862:	4819      	ldr	r0, [pc, #100]	@ (80228c8 <dhcp_option_long+0x84>)
 8022864:	f006 fe52 	bl	802950c <iprintf>
  options[options_out_len++] = (u8_t)((value & 0xff000000UL) >> 24);
 8022868:	687b      	ldr	r3, [r7, #4]
 802286a:	0e1a      	lsrs	r2, r3, #24
 802286c:	89fb      	ldrh	r3, [r7, #14]
 802286e:	1c59      	adds	r1, r3, #1
 8022870:	81f9      	strh	r1, [r7, #14]
 8022872:	4619      	mov	r1, r3
 8022874:	68bb      	ldr	r3, [r7, #8]
 8022876:	440b      	add	r3, r1
 8022878:	b2d2      	uxtb	r2, r2
 802287a:	701a      	strb	r2, [r3, #0]
  options[options_out_len++] = (u8_t)((value & 0x00ff0000UL) >> 16);
 802287c:	687b      	ldr	r3, [r7, #4]
 802287e:	0c1a      	lsrs	r2, r3, #16
 8022880:	89fb      	ldrh	r3, [r7, #14]
 8022882:	1c59      	adds	r1, r3, #1
 8022884:	81f9      	strh	r1, [r7, #14]
 8022886:	4619      	mov	r1, r3
 8022888:	68bb      	ldr	r3, [r7, #8]
 802288a:	440b      	add	r3, r1
 802288c:	b2d2      	uxtb	r2, r2
 802288e:	701a      	strb	r2, [r3, #0]
  options[options_out_len++] = (u8_t)((value & 0x0000ff00UL) >> 8);
 8022890:	687b      	ldr	r3, [r7, #4]
 8022892:	0a1a      	lsrs	r2, r3, #8
 8022894:	89fb      	ldrh	r3, [r7, #14]
 8022896:	1c59      	adds	r1, r3, #1
 8022898:	81f9      	strh	r1, [r7, #14]
 802289a:	4619      	mov	r1, r3
 802289c:	68bb      	ldr	r3, [r7, #8]
 802289e:	440b      	add	r3, r1
 80228a0:	b2d2      	uxtb	r2, r2
 80228a2:	701a      	strb	r2, [r3, #0]
  options[options_out_len++] = (u8_t)((value & 0x000000ffUL));
 80228a4:	89fb      	ldrh	r3, [r7, #14]
 80228a6:	1c5a      	adds	r2, r3, #1
 80228a8:	81fa      	strh	r2, [r7, #14]
 80228aa:	461a      	mov	r2, r3
 80228ac:	68bb      	ldr	r3, [r7, #8]
 80228ae:	4413      	add	r3, r2
 80228b0:	687a      	ldr	r2, [r7, #4]
 80228b2:	b2d2      	uxtb	r2, r2
 80228b4:	701a      	strb	r2, [r3, #0]
  return options_out_len;
 80228b6:	89fb      	ldrh	r3, [r7, #14]
}
 80228b8:	4618      	mov	r0, r3
 80228ba:	3710      	adds	r7, #16
 80228bc:	46bd      	mov	sp, r7
 80228be:	bd80      	pop	{r7, pc}
 80228c0:	0802f9e8 	.word	0x0802f9e8
 80228c4:	0802fc34 	.word	0x0802fc34
 80228c8:	0802fa48 	.word	0x0802fa48

080228cc <dhcp_parse_reply>:
 * use that further on.
 *
 */
static err_t
dhcp_parse_reply(struct pbuf *p, struct dhcp *dhcp)
{
 80228cc:	b580      	push	{r7, lr}
 80228ce:	b092      	sub	sp, #72	@ 0x48
 80228d0:	af00      	add	r7, sp, #0
 80228d2:	6078      	str	r0, [r7, #4]
 80228d4:	6039      	str	r1, [r7, #0]
  u16_t offset;
  u16_t offset_max;
  u16_t options_idx;
  u16_t options_idx_max;
  struct pbuf *q;
  int parse_file_as_options = 0;
 80228d6:	2300      	movs	r3, #0
 80228d8:	633b      	str	r3, [r7, #48]	@ 0x30
  int parse_sname_as_options = 0;
 80228da:	2300      	movs	r3, #0
 80228dc:	62fb      	str	r3, [r7, #44]	@ 0x2c
#endif

  LWIP_UNUSED_ARG(dhcp);

  /* clear received options */
  dhcp_clear_all_options(dhcp);
 80228de:	2208      	movs	r2, #8
 80228e0:	2100      	movs	r1, #0
 80228e2:	48b8      	ldr	r0, [pc, #736]	@ (8022bc4 <dhcp_parse_reply+0x2f8>)
 80228e4:	f006 ffa4 	bl	8029830 <memset>
  /* check that beginning of dhcp_msg (up to and including chaddr) is in first pbuf */
  if (p->len < DHCP_SNAME_OFS) {
 80228e8:	687b      	ldr	r3, [r7, #4]
 80228ea:	895b      	ldrh	r3, [r3, #10]
 80228ec:	2b2b      	cmp	r3, #43	@ 0x2b
 80228ee:	d802      	bhi.n	80228f6 <dhcp_parse_reply+0x2a>
    return ERR_BUF;
 80228f0:	f06f 0301 	mvn.w	r3, #1
 80228f4:	e2b8      	b.n	8022e68 <dhcp_parse_reply+0x59c>
  }
  msg_in = (struct dhcp_msg *)p->payload;
 80228f6:	687b      	ldr	r3, [r7, #4]
 80228f8:	685b      	ldr	r3, [r3, #4]
 80228fa:	61fb      	str	r3, [r7, #28]
#endif /* LWIP_DHCP_BOOTP_FILE */

  /* parse options */

  /* start with options field */
  options_idx = DHCP_OPTIONS_OFS;
 80228fc:	23f0      	movs	r3, #240	@ 0xf0
 80228fe:	87bb      	strh	r3, [r7, #60]	@ 0x3c
  /* parse options to the end of the received packet */
  options_idx_max = p->tot_len;
 8022900:	687b      	ldr	r3, [r7, #4]
 8022902:	891b      	ldrh	r3, [r3, #8]
 8022904:	877b      	strh	r3, [r7, #58]	@ 0x3a
again:
  q = p;
 8022906:	687b      	ldr	r3, [r7, #4]
 8022908:	637b      	str	r3, [r7, #52]	@ 0x34
  while ((q != NULL) && (options_idx >= q->len)) {
 802290a:	e00c      	b.n	8022926 <dhcp_parse_reply+0x5a>
    options_idx = (u16_t)(options_idx - q->len);
 802290c:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 802290e:	895b      	ldrh	r3, [r3, #10]
 8022910:	8fba      	ldrh	r2, [r7, #60]	@ 0x3c
 8022912:	1ad3      	subs	r3, r2, r3
 8022914:	87bb      	strh	r3, [r7, #60]	@ 0x3c
    options_idx_max = (u16_t)(options_idx_max - q->len);
 8022916:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8022918:	895b      	ldrh	r3, [r3, #10]
 802291a:	8f7a      	ldrh	r2, [r7, #58]	@ 0x3a
 802291c:	1ad3      	subs	r3, r2, r3
 802291e:	877b      	strh	r3, [r7, #58]	@ 0x3a
    q = q->next;
 8022920:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8022922:	681b      	ldr	r3, [r3, #0]
 8022924:	637b      	str	r3, [r7, #52]	@ 0x34
  while ((q != NULL) && (options_idx >= q->len)) {
 8022926:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8022928:	2b00      	cmp	r3, #0
 802292a:	d004      	beq.n	8022936 <dhcp_parse_reply+0x6a>
 802292c:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 802292e:	895b      	ldrh	r3, [r3, #10]
 8022930:	8fba      	ldrh	r2, [r7, #60]	@ 0x3c
 8022932:	429a      	cmp	r2, r3
 8022934:	d2ea      	bcs.n	802290c <dhcp_parse_reply+0x40>
  }
  if (q == NULL) {
 8022936:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8022938:	2b00      	cmp	r3, #0
 802293a:	d102      	bne.n	8022942 <dhcp_parse_reply+0x76>
    return ERR_BUF;
 802293c:	f06f 0301 	mvn.w	r3, #1
 8022940:	e292      	b.n	8022e68 <dhcp_parse_reply+0x59c>
  }
  offset = options_idx;
 8022942:	8fbb      	ldrh	r3, [r7, #60]	@ 0x3c
 8022944:	f8a7 3046 	strh.w	r3, [r7, #70]	@ 0x46
  offset_max = options_idx_max;
 8022948:	8f7b      	ldrh	r3, [r7, #58]	@ 0x3a
 802294a:	87fb      	strh	r3, [r7, #62]	@ 0x3e
  options = (u8_t *)q->payload;
 802294c:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 802294e:	685b      	ldr	r3, [r3, #4]
 8022950:	643b      	str	r3, [r7, #64]	@ 0x40
  /* at least 1 byte to read and no end marker, then at least 3 bytes to read? */
  while ((q != NULL) && (offset < offset_max) && (options[offset] != DHCP_OPTION_END)) {
 8022952:	e247      	b.n	8022de4 <dhcp_parse_reply+0x518>
    u8_t op = options[offset];
 8022954:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 8022958:	6c3a      	ldr	r2, [r7, #64]	@ 0x40
 802295a:	4413      	add	r3, r2
 802295c:	781b      	ldrb	r3, [r3, #0]
 802295e:	76fb      	strb	r3, [r7, #27]
    u8_t len;
    u8_t decode_len = 0;
 8022960:	2300      	movs	r3, #0
 8022962:	f887 302a 	strb.w	r3, [r7, #42]	@ 0x2a
    int decode_idx = -1;
 8022966:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 802296a:	627b      	str	r3, [r7, #36]	@ 0x24
    u16_t val_offset = (u16_t)(offset + 2);
 802296c:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 8022970:	3302      	adds	r3, #2
 8022972:	847b      	strh	r3, [r7, #34]	@ 0x22
    if (val_offset < offset) {
 8022974:	8c7a      	ldrh	r2, [r7, #34]	@ 0x22
 8022976:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 802297a:	429a      	cmp	r2, r3
 802297c:	d202      	bcs.n	8022984 <dhcp_parse_reply+0xb8>
      /* overflow */
      return ERR_BUF;
 802297e:	f06f 0301 	mvn.w	r3, #1
 8022982:	e271      	b.n	8022e68 <dhcp_parse_reply+0x59c>
    }
    /* len byte might be in the next pbuf */
    if ((offset + 1) < q->len) {
 8022984:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 8022988:	3301      	adds	r3, #1
 802298a:	6b7a      	ldr	r2, [r7, #52]	@ 0x34
 802298c:	8952      	ldrh	r2, [r2, #10]
 802298e:	4293      	cmp	r3, r2
 8022990:	da08      	bge.n	80229a4 <dhcp_parse_reply+0xd8>
      len = options[offset + 1];
 8022992:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 8022996:	3301      	adds	r3, #1
 8022998:	6c3a      	ldr	r2, [r7, #64]	@ 0x40
 802299a:	4413      	add	r3, r2
 802299c:	781b      	ldrb	r3, [r3, #0]
 802299e:	f887 302b 	strb.w	r3, [r7, #43]	@ 0x2b
 80229a2:	e00b      	b.n	80229bc <dhcp_parse_reply+0xf0>
    } else {
      len = (q->next != NULL ? ((u8_t *)q->next->payload)[0] : 0);
 80229a4:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 80229a6:	681b      	ldr	r3, [r3, #0]
 80229a8:	2b00      	cmp	r3, #0
 80229aa:	d004      	beq.n	80229b6 <dhcp_parse_reply+0xea>
 80229ac:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 80229ae:	681b      	ldr	r3, [r3, #0]
 80229b0:	685b      	ldr	r3, [r3, #4]
 80229b2:	781b      	ldrb	r3, [r3, #0]
 80229b4:	e000      	b.n	80229b8 <dhcp_parse_reply+0xec>
 80229b6:	2300      	movs	r3, #0
 80229b8:	f887 302b 	strb.w	r3, [r7, #43]	@ 0x2b
    }
    /* LWIP_DEBUGF(DHCP_DEBUG, ("msg_offset=%"U16_F", q->len=%"U16_F, msg_offset, q->len)); */
    decode_len = len;
 80229bc:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 80229c0:	f887 302a 	strb.w	r3, [r7, #42]	@ 0x2a
    switch (op) {
 80229c4:	7efb      	ldrb	r3, [r7, #27]
 80229c6:	2b3b      	cmp	r3, #59	@ 0x3b
 80229c8:	f200 812c 	bhi.w	8022c24 <dhcp_parse_reply+0x358>
 80229cc:	a201      	add	r2, pc, #4	@ (adr r2, 80229d4 <dhcp_parse_reply+0x108>)
 80229ce:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 80229d2:	bf00      	nop
 80229d4:	08022ac5 	.word	0x08022ac5
 80229d8:	08022ad5 	.word	0x08022ad5
 80229dc:	08022c25 	.word	0x08022c25
 80229e0:	08022af7 	.word	0x08022af7
 80229e4:	08022c25 	.word	0x08022c25
 80229e8:	08022c25 	.word	0x08022c25
 80229ec:	08022c25 	.word	0x08022c25
 80229f0:	08022c25 	.word	0x08022c25
 80229f4:	08022c25 	.word	0x08022c25
 80229f8:	08022c25 	.word	0x08022c25
 80229fc:	08022c25 	.word	0x08022c25
 8022a00:	08022c25 	.word	0x08022c25
 8022a04:	08022c25 	.word	0x08022c25
 8022a08:	08022c25 	.word	0x08022c25
 8022a0c:	08022c25 	.word	0x08022c25
 8022a10:	08022c25 	.word	0x08022c25
 8022a14:	08022c25 	.word	0x08022c25
 8022a18:	08022c25 	.word	0x08022c25
 8022a1c:	08022c25 	.word	0x08022c25
 8022a20:	08022c25 	.word	0x08022c25
 8022a24:	08022c25 	.word	0x08022c25
 8022a28:	08022c25 	.word	0x08022c25
 8022a2c:	08022c25 	.word	0x08022c25
 8022a30:	08022c25 	.word	0x08022c25
 8022a34:	08022c25 	.word	0x08022c25
 8022a38:	08022c25 	.word	0x08022c25
 8022a3c:	08022c25 	.word	0x08022c25
 8022a40:	08022c25 	.word	0x08022c25
 8022a44:	08022c25 	.word	0x08022c25
 8022a48:	08022c25 	.word	0x08022c25
 8022a4c:	08022c25 	.word	0x08022c25
 8022a50:	08022c25 	.word	0x08022c25
 8022a54:	08022c25 	.word	0x08022c25
 8022a58:	08022c25 	.word	0x08022c25
 8022a5c:	08022c25 	.word	0x08022c25
 8022a60:	08022c25 	.word	0x08022c25
 8022a64:	08022c25 	.word	0x08022c25
 8022a68:	08022c25 	.word	0x08022c25
 8022a6c:	08022c25 	.word	0x08022c25
 8022a70:	08022c25 	.word	0x08022c25
 8022a74:	08022c25 	.word	0x08022c25
 8022a78:	08022c25 	.word	0x08022c25
 8022a7c:	08022c25 	.word	0x08022c25
 8022a80:	08022c25 	.word	0x08022c25
 8022a84:	08022c25 	.word	0x08022c25
 8022a88:	08022c25 	.word	0x08022c25
 8022a8c:	08022c25 	.word	0x08022c25
 8022a90:	08022c25 	.word	0x08022c25
 8022a94:	08022c25 	.word	0x08022c25
 8022a98:	08022c25 	.word	0x08022c25
 8022a9c:	08022c25 	.word	0x08022c25
 8022aa0:	08022b23 	.word	0x08022b23
 8022aa4:	08022b45 	.word	0x08022b45
 8022aa8:	08022b81 	.word	0x08022b81
 8022aac:	08022ba3 	.word	0x08022ba3
 8022ab0:	08022c25 	.word	0x08022c25
 8022ab4:	08022c25 	.word	0x08022c25
 8022ab8:	08022c25 	.word	0x08022c25
 8022abc:	08022be1 	.word	0x08022be1
 8022ac0:	08022c03 	.word	0x08022c03
      /* case(DHCP_OPTION_END): handled above */
      case (DHCP_OPTION_PAD):
        /* special option: no len encoded */
        decode_len = len = 0;
 8022ac4:	2300      	movs	r3, #0
 8022ac6:	f887 302b 	strb.w	r3, [r7, #43]	@ 0x2b
 8022aca:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 8022ace:	f887 302a 	strb.w	r3, [r7, #42]	@ 0x2a
        /* will be increased below */
        break;
 8022ad2:	e0ab      	b.n	8022c2c <dhcp_parse_reply+0x360>
      case (DHCP_OPTION_SUBNET_MASK):
        LWIP_ERROR("len == 4", len == 4, return ERR_VAL;);
 8022ad4:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 8022ad8:	2b04      	cmp	r3, #4
 8022ada:	d009      	beq.n	8022af0 <dhcp_parse_reply+0x224>
 8022adc:	4b3a      	ldr	r3, [pc, #232]	@ (8022bc8 <dhcp_parse_reply+0x2fc>)
 8022ade:	f240 622e 	movw	r2, #1582	@ 0x62e
 8022ae2:	493a      	ldr	r1, [pc, #232]	@ (8022bcc <dhcp_parse_reply+0x300>)
 8022ae4:	483a      	ldr	r0, [pc, #232]	@ (8022bd0 <dhcp_parse_reply+0x304>)
 8022ae6:	f006 fd11 	bl	802950c <iprintf>
 8022aea:	f06f 0305 	mvn.w	r3, #5
 8022aee:	e1bb      	b.n	8022e68 <dhcp_parse_reply+0x59c>
        decode_idx = DHCP_OPTION_IDX_SUBNET_MASK;
 8022af0:	2306      	movs	r3, #6
 8022af2:	627b      	str	r3, [r7, #36]	@ 0x24
        break;
 8022af4:	e09a      	b.n	8022c2c <dhcp_parse_reply+0x360>
      case (DHCP_OPTION_ROUTER):
        decode_len = 4; /* only copy the first given router */
 8022af6:	2304      	movs	r3, #4
 8022af8:	f887 302a 	strb.w	r3, [r7, #42]	@ 0x2a
        LWIP_ERROR("len >= decode_len", len >= decode_len, return ERR_VAL;);
 8022afc:	f897 202b 	ldrb.w	r2, [r7, #43]	@ 0x2b
 8022b00:	f897 302a 	ldrb.w	r3, [r7, #42]	@ 0x2a
 8022b04:	429a      	cmp	r2, r3
 8022b06:	d209      	bcs.n	8022b1c <dhcp_parse_reply+0x250>
 8022b08:	4b2f      	ldr	r3, [pc, #188]	@ (8022bc8 <dhcp_parse_reply+0x2fc>)
 8022b0a:	f240 6233 	movw	r2, #1587	@ 0x633
 8022b0e:	4931      	ldr	r1, [pc, #196]	@ (8022bd4 <dhcp_parse_reply+0x308>)
 8022b10:	482f      	ldr	r0, [pc, #188]	@ (8022bd0 <dhcp_parse_reply+0x304>)
 8022b12:	f006 fcfb 	bl	802950c <iprintf>
 8022b16:	f06f 0305 	mvn.w	r3, #5
 8022b1a:	e1a5      	b.n	8022e68 <dhcp_parse_reply+0x59c>
        decode_idx = DHCP_OPTION_IDX_ROUTER;
 8022b1c:	2307      	movs	r3, #7
 8022b1e:	627b      	str	r3, [r7, #36]	@ 0x24
        break;
 8022b20:	e084      	b.n	8022c2c <dhcp_parse_reply+0x360>
        LWIP_ERROR("len >= decode_len", len >= decode_len, return ERR_VAL;);
        decode_idx = DHCP_OPTION_IDX_DNS_SERVER;
        break;
#endif /* LWIP_DHCP_PROVIDE_DNS_SERVERS */
      case (DHCP_OPTION_LEASE_TIME):
        LWIP_ERROR("len == 4", len == 4, return ERR_VAL;);
 8022b22:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 8022b26:	2b04      	cmp	r3, #4
 8022b28:	d009      	beq.n	8022b3e <dhcp_parse_reply+0x272>
 8022b2a:	4b27      	ldr	r3, [pc, #156]	@ (8022bc8 <dhcp_parse_reply+0x2fc>)
 8022b2c:	f240 6241 	movw	r2, #1601	@ 0x641
 8022b30:	4926      	ldr	r1, [pc, #152]	@ (8022bcc <dhcp_parse_reply+0x300>)
 8022b32:	4827      	ldr	r0, [pc, #156]	@ (8022bd0 <dhcp_parse_reply+0x304>)
 8022b34:	f006 fcea 	bl	802950c <iprintf>
 8022b38:	f06f 0305 	mvn.w	r3, #5
 8022b3c:	e194      	b.n	8022e68 <dhcp_parse_reply+0x59c>
        decode_idx = DHCP_OPTION_IDX_LEASE_TIME;
 8022b3e:	2303      	movs	r3, #3
 8022b40:	627b      	str	r3, [r7, #36]	@ 0x24
        break;
 8022b42:	e073      	b.n	8022c2c <dhcp_parse_reply+0x360>
        LWIP_ERROR("len >= decode_len", len >= decode_len, return ERR_VAL;);
        decode_idx = DHCP_OPTION_IDX_NTP_SERVER;
        break;
#endif /* LWIP_DHCP_GET_NTP_SRV*/
      case (DHCP_OPTION_OVERLOAD):
        LWIP_ERROR("len == 1", len == 1, return ERR_VAL;);
 8022b44:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 8022b48:	2b01      	cmp	r3, #1
 8022b4a:	d009      	beq.n	8022b60 <dhcp_parse_reply+0x294>
 8022b4c:	4b1e      	ldr	r3, [pc, #120]	@ (8022bc8 <dhcp_parse_reply+0x2fc>)
 8022b4e:	f240 624f 	movw	r2, #1615	@ 0x64f
 8022b52:	4921      	ldr	r1, [pc, #132]	@ (8022bd8 <dhcp_parse_reply+0x30c>)
 8022b54:	481e      	ldr	r0, [pc, #120]	@ (8022bd0 <dhcp_parse_reply+0x304>)
 8022b56:	f006 fcd9 	bl	802950c <iprintf>
 8022b5a:	f06f 0305 	mvn.w	r3, #5
 8022b5e:	e183      	b.n	8022e68 <dhcp_parse_reply+0x59c>
        /* decode overload only in options, not in file/sname: invalid packet */
        LWIP_ERROR("overload in file/sname", options_idx == DHCP_OPTIONS_OFS, return ERR_VAL;);
 8022b60:	8fbb      	ldrh	r3, [r7, #60]	@ 0x3c
 8022b62:	2bf0      	cmp	r3, #240	@ 0xf0
 8022b64:	d009      	beq.n	8022b7a <dhcp_parse_reply+0x2ae>
 8022b66:	4b18      	ldr	r3, [pc, #96]	@ (8022bc8 <dhcp_parse_reply+0x2fc>)
 8022b68:	f240 6251 	movw	r2, #1617	@ 0x651
 8022b6c:	491b      	ldr	r1, [pc, #108]	@ (8022bdc <dhcp_parse_reply+0x310>)
 8022b6e:	4818      	ldr	r0, [pc, #96]	@ (8022bd0 <dhcp_parse_reply+0x304>)
 8022b70:	f006 fccc 	bl	802950c <iprintf>
 8022b74:	f06f 0305 	mvn.w	r3, #5
 8022b78:	e176      	b.n	8022e68 <dhcp_parse_reply+0x59c>
        decode_idx = DHCP_OPTION_IDX_OVERLOAD;
 8022b7a:	2300      	movs	r3, #0
 8022b7c:	627b      	str	r3, [r7, #36]	@ 0x24
        break;
 8022b7e:	e055      	b.n	8022c2c <dhcp_parse_reply+0x360>
      case (DHCP_OPTION_MESSAGE_TYPE):
        LWIP_ERROR("len == 1", len == 1, return ERR_VAL;);
 8022b80:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 8022b84:	2b01      	cmp	r3, #1
 8022b86:	d009      	beq.n	8022b9c <dhcp_parse_reply+0x2d0>
 8022b88:	4b0f      	ldr	r3, [pc, #60]	@ (8022bc8 <dhcp_parse_reply+0x2fc>)
 8022b8a:	f240 6255 	movw	r2, #1621	@ 0x655
 8022b8e:	4912      	ldr	r1, [pc, #72]	@ (8022bd8 <dhcp_parse_reply+0x30c>)
 8022b90:	480f      	ldr	r0, [pc, #60]	@ (8022bd0 <dhcp_parse_reply+0x304>)
 8022b92:	f006 fcbb 	bl	802950c <iprintf>
 8022b96:	f06f 0305 	mvn.w	r3, #5
 8022b9a:	e165      	b.n	8022e68 <dhcp_parse_reply+0x59c>
        decode_idx = DHCP_OPTION_IDX_MSG_TYPE;
 8022b9c:	2301      	movs	r3, #1
 8022b9e:	627b      	str	r3, [r7, #36]	@ 0x24
        break;
 8022ba0:	e044      	b.n	8022c2c <dhcp_parse_reply+0x360>
      case (DHCP_OPTION_SERVER_ID):
        LWIP_ERROR("len == 4", len == 4, return ERR_VAL;);
 8022ba2:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 8022ba6:	2b04      	cmp	r3, #4
 8022ba8:	d009      	beq.n	8022bbe <dhcp_parse_reply+0x2f2>
 8022baa:	4b07      	ldr	r3, [pc, #28]	@ (8022bc8 <dhcp_parse_reply+0x2fc>)
 8022bac:	f240 6259 	movw	r2, #1625	@ 0x659
 8022bb0:	4906      	ldr	r1, [pc, #24]	@ (8022bcc <dhcp_parse_reply+0x300>)
 8022bb2:	4807      	ldr	r0, [pc, #28]	@ (8022bd0 <dhcp_parse_reply+0x304>)
 8022bb4:	f006 fcaa 	bl	802950c <iprintf>
 8022bb8:	f06f 0305 	mvn.w	r3, #5
 8022bbc:	e154      	b.n	8022e68 <dhcp_parse_reply+0x59c>
        decode_idx = DHCP_OPTION_IDX_SERVER_ID;
 8022bbe:	2302      	movs	r3, #2
 8022bc0:	627b      	str	r3, [r7, #36]	@ 0x24
        break;
 8022bc2:	e033      	b.n	8022c2c <dhcp_parse_reply+0x360>
 8022bc4:	2402a070 	.word	0x2402a070
 8022bc8:	0802f9e8 	.word	0x0802f9e8
 8022bcc:	0802fc70 	.word	0x0802fc70
 8022bd0:	0802fa48 	.word	0x0802fa48
 8022bd4:	0802fc7c 	.word	0x0802fc7c
 8022bd8:	0802fc90 	.word	0x0802fc90
 8022bdc:	0802fc9c 	.word	0x0802fc9c
      case (DHCP_OPTION_T1):
        LWIP_ERROR("len == 4", len == 4, return ERR_VAL;);
 8022be0:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 8022be4:	2b04      	cmp	r3, #4
 8022be6:	d009      	beq.n	8022bfc <dhcp_parse_reply+0x330>
 8022be8:	4ba1      	ldr	r3, [pc, #644]	@ (8022e70 <dhcp_parse_reply+0x5a4>)
 8022bea:	f240 625d 	movw	r2, #1629	@ 0x65d
 8022bee:	49a1      	ldr	r1, [pc, #644]	@ (8022e74 <dhcp_parse_reply+0x5a8>)
 8022bf0:	48a1      	ldr	r0, [pc, #644]	@ (8022e78 <dhcp_parse_reply+0x5ac>)
 8022bf2:	f006 fc8b 	bl	802950c <iprintf>
 8022bf6:	f06f 0305 	mvn.w	r3, #5
 8022bfa:	e135      	b.n	8022e68 <dhcp_parse_reply+0x59c>
        decode_idx = DHCP_OPTION_IDX_T1;
 8022bfc:	2304      	movs	r3, #4
 8022bfe:	627b      	str	r3, [r7, #36]	@ 0x24
        break;
 8022c00:	e014      	b.n	8022c2c <dhcp_parse_reply+0x360>
      case (DHCP_OPTION_T2):
        LWIP_ERROR("len == 4", len == 4, return ERR_VAL;);
 8022c02:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 8022c06:	2b04      	cmp	r3, #4
 8022c08:	d009      	beq.n	8022c1e <dhcp_parse_reply+0x352>
 8022c0a:	4b99      	ldr	r3, [pc, #612]	@ (8022e70 <dhcp_parse_reply+0x5a4>)
 8022c0c:	f240 6261 	movw	r2, #1633	@ 0x661
 8022c10:	4998      	ldr	r1, [pc, #608]	@ (8022e74 <dhcp_parse_reply+0x5a8>)
 8022c12:	4899      	ldr	r0, [pc, #612]	@ (8022e78 <dhcp_parse_reply+0x5ac>)
 8022c14:	f006 fc7a 	bl	802950c <iprintf>
 8022c18:	f06f 0305 	mvn.w	r3, #5
 8022c1c:	e124      	b.n	8022e68 <dhcp_parse_reply+0x59c>
        decode_idx = DHCP_OPTION_IDX_T2;
 8022c1e:	2305      	movs	r3, #5
 8022c20:	627b      	str	r3, [r7, #36]	@ 0x24
        break;
 8022c22:	e003      	b.n	8022c2c <dhcp_parse_reply+0x360>
      default:
        decode_len = 0;
 8022c24:	2300      	movs	r3, #0
 8022c26:	f887 302a 	strb.w	r3, [r7, #42]	@ 0x2a
        LWIP_DEBUGF(DHCP_DEBUG, ("skipping option %"U16_F" in options\n", (u16_t)op));
        LWIP_HOOK_DHCP_PARSE_OPTION(ip_current_netif(), dhcp, dhcp->state, msg_in,
                                    dhcp_option_given(dhcp, DHCP_OPTION_IDX_MSG_TYPE) ? (u8_t)dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_MSG_TYPE) : 0,
                                    op, len, q, val_offset);
        break;
 8022c2a:	bf00      	nop
    }
    if (op == DHCP_OPTION_PAD) {
 8022c2c:	7efb      	ldrb	r3, [r7, #27]
 8022c2e:	2b00      	cmp	r3, #0
 8022c30:	d105      	bne.n	8022c3e <dhcp_parse_reply+0x372>
      offset++;
 8022c32:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 8022c36:	3301      	adds	r3, #1
 8022c38:	f8a7 3046 	strh.w	r3, [r7, #70]	@ 0x46
 8022c3c:	e0a4      	b.n	8022d88 <dhcp_parse_reply+0x4bc>
    } else {
      if (offset + len + 2 > 0xFFFF) {
 8022c3e:	f8b7 2046 	ldrh.w	r2, [r7, #70]	@ 0x46
 8022c42:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 8022c46:	4413      	add	r3, r2
 8022c48:	f64f 72fd 	movw	r2, #65533	@ 0xfffd
 8022c4c:	4293      	cmp	r3, r2
 8022c4e:	dd02      	ble.n	8022c56 <dhcp_parse_reply+0x38a>
        /* overflow */
        return ERR_BUF;
 8022c50:	f06f 0301 	mvn.w	r3, #1
 8022c54:	e108      	b.n	8022e68 <dhcp_parse_reply+0x59c>
      }
      offset = (u16_t)(offset + len + 2);
 8022c56:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 8022c5a:	b29a      	uxth	r2, r3
 8022c5c:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 8022c60:	4413      	add	r3, r2
 8022c62:	b29b      	uxth	r3, r3
 8022c64:	3302      	adds	r3, #2
 8022c66:	f8a7 3046 	strh.w	r3, [r7, #70]	@ 0x46
      if (decode_len > 0) {
 8022c6a:	f897 302a 	ldrb.w	r3, [r7, #42]	@ 0x2a
 8022c6e:	2b00      	cmp	r3, #0
 8022c70:	f000 808a 	beq.w	8022d88 <dhcp_parse_reply+0x4bc>
        u32_t value = 0;
 8022c74:	2300      	movs	r3, #0
 8022c76:	60fb      	str	r3, [r7, #12]
        u16_t copy_len;
decode_next:
        LWIP_ASSERT("check decode_idx", decode_idx >= 0 && decode_idx < DHCP_OPTION_IDX_MAX);
 8022c78:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8022c7a:	2b00      	cmp	r3, #0
 8022c7c:	db02      	blt.n	8022c84 <dhcp_parse_reply+0x3b8>
 8022c7e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8022c80:	2b07      	cmp	r3, #7
 8022c82:	dd06      	ble.n	8022c92 <dhcp_parse_reply+0x3c6>
 8022c84:	4b7a      	ldr	r3, [pc, #488]	@ (8022e70 <dhcp_parse_reply+0x5a4>)
 8022c86:	f44f 62cf 	mov.w	r2, #1656	@ 0x678
 8022c8a:	497c      	ldr	r1, [pc, #496]	@ (8022e7c <dhcp_parse_reply+0x5b0>)
 8022c8c:	487a      	ldr	r0, [pc, #488]	@ (8022e78 <dhcp_parse_reply+0x5ac>)
 8022c8e:	f006 fc3d 	bl	802950c <iprintf>
        if (!dhcp_option_given(dhcp, decode_idx)) {
 8022c92:	4a7b      	ldr	r2, [pc, #492]	@ (8022e80 <dhcp_parse_reply+0x5b4>)
 8022c94:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8022c96:	4413      	add	r3, r2
 8022c98:	781b      	ldrb	r3, [r3, #0]
 8022c9a:	2b00      	cmp	r3, #0
 8022c9c:	d174      	bne.n	8022d88 <dhcp_parse_reply+0x4bc>
          copy_len = LWIP_MIN(decode_len, 4);
 8022c9e:	f897 302a 	ldrb.w	r3, [r7, #42]	@ 0x2a
 8022ca2:	2b04      	cmp	r3, #4
 8022ca4:	bf28      	it	cs
 8022ca6:	2304      	movcs	r3, #4
 8022ca8:	b2db      	uxtb	r3, r3
 8022caa:	833b      	strh	r3, [r7, #24]
          if (pbuf_copy_partial(q, &value, copy_len, val_offset) != copy_len) {
 8022cac:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 8022cae:	8b3a      	ldrh	r2, [r7, #24]
 8022cb0:	f107 010c 	add.w	r1, r7, #12
 8022cb4:	6b78      	ldr	r0, [r7, #52]	@ 0x34
 8022cb6:	f7f7 fbb7 	bl	801a428 <pbuf_copy_partial>
 8022cba:	4603      	mov	r3, r0
 8022cbc:	461a      	mov	r2, r3
 8022cbe:	8b3b      	ldrh	r3, [r7, #24]
 8022cc0:	4293      	cmp	r3, r2
 8022cc2:	d002      	beq.n	8022cca <dhcp_parse_reply+0x3fe>
            return ERR_BUF;
 8022cc4:	f06f 0301 	mvn.w	r3, #1
 8022cc8:	e0ce      	b.n	8022e68 <dhcp_parse_reply+0x59c>
          }
          if (decode_len > 4) {
 8022cca:	f897 302a 	ldrb.w	r3, [r7, #42]	@ 0x2a
 8022cce:	2b04      	cmp	r3, #4
 8022cd0:	d933      	bls.n	8022d3a <dhcp_parse_reply+0x46e>
            /* decode more than one u32_t */
            u16_t next_val_offset;
            LWIP_ERROR("decode_len %% 4 == 0", decode_len % 4 == 0, return ERR_VAL;);
 8022cd2:	f897 302a 	ldrb.w	r3, [r7, #42]	@ 0x2a
 8022cd6:	f003 0303 	and.w	r3, r3, #3
 8022cda:	b2db      	uxtb	r3, r3
 8022cdc:	2b00      	cmp	r3, #0
 8022cde:	d009      	beq.n	8022cf4 <dhcp_parse_reply+0x428>
 8022ce0:	4b63      	ldr	r3, [pc, #396]	@ (8022e70 <dhcp_parse_reply+0x5a4>)
 8022ce2:	f240 6281 	movw	r2, #1665	@ 0x681
 8022ce6:	4967      	ldr	r1, [pc, #412]	@ (8022e84 <dhcp_parse_reply+0x5b8>)
 8022ce8:	4863      	ldr	r0, [pc, #396]	@ (8022e78 <dhcp_parse_reply+0x5ac>)
 8022cea:	f006 fc0f 	bl	802950c <iprintf>
 8022cee:	f06f 0305 	mvn.w	r3, #5
 8022cf2:	e0b9      	b.n	8022e68 <dhcp_parse_reply+0x59c>
            dhcp_got_option(dhcp, decode_idx);
 8022cf4:	4a62      	ldr	r2, [pc, #392]	@ (8022e80 <dhcp_parse_reply+0x5b4>)
 8022cf6:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8022cf8:	4413      	add	r3, r2
 8022cfa:	2201      	movs	r2, #1
 8022cfc:	701a      	strb	r2, [r3, #0]
            dhcp_set_option_value(dhcp, decode_idx, lwip_htonl(value));
 8022cfe:	68fb      	ldr	r3, [r7, #12]
 8022d00:	4618      	mov	r0, r3
 8022d02:	f7f5 fcbe 	bl	8018682 <lwip_htonl>
 8022d06:	4602      	mov	r2, r0
 8022d08:	495f      	ldr	r1, [pc, #380]	@ (8022e88 <dhcp_parse_reply+0x5bc>)
 8022d0a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8022d0c:	f841 2023 	str.w	r2, [r1, r3, lsl #2]
            decode_len = (u8_t)(decode_len - 4);
 8022d10:	f897 302a 	ldrb.w	r3, [r7, #42]	@ 0x2a
 8022d14:	3b04      	subs	r3, #4
 8022d16:	f887 302a 	strb.w	r3, [r7, #42]	@ 0x2a
            next_val_offset = (u16_t)(val_offset + 4);
 8022d1a:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 8022d1c:	3304      	adds	r3, #4
 8022d1e:	82fb      	strh	r3, [r7, #22]
            if (next_val_offset < val_offset) {
 8022d20:	8afa      	ldrh	r2, [r7, #22]
 8022d22:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 8022d24:	429a      	cmp	r2, r3
 8022d26:	d202      	bcs.n	8022d2e <dhcp_parse_reply+0x462>
              /* overflow */
              return ERR_BUF;
 8022d28:	f06f 0301 	mvn.w	r3, #1
 8022d2c:	e09c      	b.n	8022e68 <dhcp_parse_reply+0x59c>
            }
            val_offset = next_val_offset;
 8022d2e:	8afb      	ldrh	r3, [r7, #22]
 8022d30:	847b      	strh	r3, [r7, #34]	@ 0x22
            decode_idx++;
 8022d32:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8022d34:	3301      	adds	r3, #1
 8022d36:	627b      	str	r3, [r7, #36]	@ 0x24
            goto decode_next;
 8022d38:	e79e      	b.n	8022c78 <dhcp_parse_reply+0x3ac>
          } else if (decode_len == 4) {
 8022d3a:	f897 302a 	ldrb.w	r3, [r7, #42]	@ 0x2a
 8022d3e:	2b04      	cmp	r3, #4
 8022d40:	d106      	bne.n	8022d50 <dhcp_parse_reply+0x484>
            value = lwip_ntohl(value);
 8022d42:	68fb      	ldr	r3, [r7, #12]
 8022d44:	4618      	mov	r0, r3
 8022d46:	f7f5 fc9c 	bl	8018682 <lwip_htonl>
 8022d4a:	4603      	mov	r3, r0
 8022d4c:	60fb      	str	r3, [r7, #12]
 8022d4e:	e011      	b.n	8022d74 <dhcp_parse_reply+0x4a8>
          } else {
            LWIP_ERROR("invalid decode_len", decode_len == 1, return ERR_VAL;);
 8022d50:	f897 302a 	ldrb.w	r3, [r7, #42]	@ 0x2a
 8022d54:	2b01      	cmp	r3, #1
 8022d56:	d009      	beq.n	8022d6c <dhcp_parse_reply+0x4a0>
 8022d58:	4b45      	ldr	r3, [pc, #276]	@ (8022e70 <dhcp_parse_reply+0x5a4>)
 8022d5a:	f44f 62d2 	mov.w	r2, #1680	@ 0x690
 8022d5e:	494b      	ldr	r1, [pc, #300]	@ (8022e8c <dhcp_parse_reply+0x5c0>)
 8022d60:	4845      	ldr	r0, [pc, #276]	@ (8022e78 <dhcp_parse_reply+0x5ac>)
 8022d62:	f006 fbd3 	bl	802950c <iprintf>
 8022d66:	f06f 0305 	mvn.w	r3, #5
 8022d6a:	e07d      	b.n	8022e68 <dhcp_parse_reply+0x59c>
            value = ((u8_t *)&value)[0];
 8022d6c:	f107 030c 	add.w	r3, r7, #12
 8022d70:	781b      	ldrb	r3, [r3, #0]
 8022d72:	60fb      	str	r3, [r7, #12]
          }
          dhcp_got_option(dhcp, decode_idx);
 8022d74:	4a42      	ldr	r2, [pc, #264]	@ (8022e80 <dhcp_parse_reply+0x5b4>)
 8022d76:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8022d78:	4413      	add	r3, r2
 8022d7a:	2201      	movs	r2, #1
 8022d7c:	701a      	strb	r2, [r3, #0]
          dhcp_set_option_value(dhcp, decode_idx, value);
 8022d7e:	68fa      	ldr	r2, [r7, #12]
 8022d80:	4941      	ldr	r1, [pc, #260]	@ (8022e88 <dhcp_parse_reply+0x5bc>)
 8022d82:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8022d84:	f841 2023 	str.w	r2, [r1, r3, lsl #2]
        }
      }
    }
    if (offset >= q->len) {
 8022d88:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8022d8a:	895b      	ldrh	r3, [r3, #10]
 8022d8c:	f8b7 2046 	ldrh.w	r2, [r7, #70]	@ 0x46
 8022d90:	429a      	cmp	r2, r3
 8022d92:	d327      	bcc.n	8022de4 <dhcp_parse_reply+0x518>
      offset = (u16_t)(offset - q->len);
 8022d94:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8022d96:	895b      	ldrh	r3, [r3, #10]
 8022d98:	f8b7 2046 	ldrh.w	r2, [r7, #70]	@ 0x46
 8022d9c:	1ad3      	subs	r3, r2, r3
 8022d9e:	f8a7 3046 	strh.w	r3, [r7, #70]	@ 0x46
      offset_max = (u16_t)(offset_max - q->len);
 8022da2:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8022da4:	895b      	ldrh	r3, [r3, #10]
 8022da6:	8ffa      	ldrh	r2, [r7, #62]	@ 0x3e
 8022da8:	1ad3      	subs	r3, r2, r3
 8022daa:	87fb      	strh	r3, [r7, #62]	@ 0x3e
      if (offset < offset_max) {
 8022dac:	f8b7 2046 	ldrh.w	r2, [r7, #70]	@ 0x46
 8022db0:	8ffb      	ldrh	r3, [r7, #62]	@ 0x3e
 8022db2:	429a      	cmp	r2, r3
 8022db4:	d213      	bcs.n	8022dde <dhcp_parse_reply+0x512>
        q = q->next;
 8022db6:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8022db8:	681b      	ldr	r3, [r3, #0]
 8022dba:	637b      	str	r3, [r7, #52]	@ 0x34
        LWIP_ERROR("next pbuf was null", q != NULL, return ERR_VAL;);
 8022dbc:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8022dbe:	2b00      	cmp	r3, #0
 8022dc0:	d109      	bne.n	8022dd6 <dhcp_parse_reply+0x50a>
 8022dc2:	4b2b      	ldr	r3, [pc, #172]	@ (8022e70 <dhcp_parse_reply+0x5a4>)
 8022dc4:	f240 629d 	movw	r2, #1693	@ 0x69d
 8022dc8:	4931      	ldr	r1, [pc, #196]	@ (8022e90 <dhcp_parse_reply+0x5c4>)
 8022dca:	482b      	ldr	r0, [pc, #172]	@ (8022e78 <dhcp_parse_reply+0x5ac>)
 8022dcc:	f006 fb9e 	bl	802950c <iprintf>
 8022dd0:	f06f 0305 	mvn.w	r3, #5
 8022dd4:	e048      	b.n	8022e68 <dhcp_parse_reply+0x59c>
        options = (u8_t *)q->payload;
 8022dd6:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8022dd8:	685b      	ldr	r3, [r3, #4]
 8022dda:	643b      	str	r3, [r7, #64]	@ 0x40
 8022ddc:	e002      	b.n	8022de4 <dhcp_parse_reply+0x518>
      } else {
        /* We've run out of bytes, probably no end marker. Don't proceed. */
        return ERR_BUF;
 8022dde:	f06f 0301 	mvn.w	r3, #1
 8022de2:	e041      	b.n	8022e68 <dhcp_parse_reply+0x59c>
  while ((q != NULL) && (offset < offset_max) && (options[offset] != DHCP_OPTION_END)) {
 8022de4:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8022de6:	2b00      	cmp	r3, #0
 8022de8:	d00c      	beq.n	8022e04 <dhcp_parse_reply+0x538>
 8022dea:	f8b7 2046 	ldrh.w	r2, [r7, #70]	@ 0x46
 8022dee:	8ffb      	ldrh	r3, [r7, #62]	@ 0x3e
 8022df0:	429a      	cmp	r2, r3
 8022df2:	d207      	bcs.n	8022e04 <dhcp_parse_reply+0x538>
 8022df4:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 8022df8:	6c3a      	ldr	r2, [r7, #64]	@ 0x40
 8022dfa:	4413      	add	r3, r2
 8022dfc:	781b      	ldrb	r3, [r3, #0]
 8022dfe:	2bff      	cmp	r3, #255	@ 0xff
 8022e00:	f47f ada8 	bne.w	8022954 <dhcp_parse_reply+0x88>
      }
    }
  }
  /* is this an overloaded message? */
  if (dhcp_option_given(dhcp, DHCP_OPTION_IDX_OVERLOAD)) {
 8022e04:	4b1e      	ldr	r3, [pc, #120]	@ (8022e80 <dhcp_parse_reply+0x5b4>)
 8022e06:	781b      	ldrb	r3, [r3, #0]
 8022e08:	2b00      	cmp	r3, #0
 8022e0a:	d018      	beq.n	8022e3e <dhcp_parse_reply+0x572>
    u32_t overload = dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_OVERLOAD);
 8022e0c:	4b1e      	ldr	r3, [pc, #120]	@ (8022e88 <dhcp_parse_reply+0x5bc>)
 8022e0e:	681b      	ldr	r3, [r3, #0]
 8022e10:	613b      	str	r3, [r7, #16]
    dhcp_clear_option(dhcp, DHCP_OPTION_IDX_OVERLOAD);
 8022e12:	4b1b      	ldr	r3, [pc, #108]	@ (8022e80 <dhcp_parse_reply+0x5b4>)
 8022e14:	2200      	movs	r2, #0
 8022e16:	701a      	strb	r2, [r3, #0]
    if (overload == DHCP_OVERLOAD_FILE) {
 8022e18:	693b      	ldr	r3, [r7, #16]
 8022e1a:	2b01      	cmp	r3, #1
 8022e1c:	d102      	bne.n	8022e24 <dhcp_parse_reply+0x558>
      parse_file_as_options = 1;
 8022e1e:	2301      	movs	r3, #1
 8022e20:	633b      	str	r3, [r7, #48]	@ 0x30
 8022e22:	e00c      	b.n	8022e3e <dhcp_parse_reply+0x572>
      LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("overloaded file field\n"));
    } else if (overload == DHCP_OVERLOAD_SNAME) {
 8022e24:	693b      	ldr	r3, [r7, #16]
 8022e26:	2b02      	cmp	r3, #2
 8022e28:	d102      	bne.n	8022e30 <dhcp_parse_reply+0x564>
      parse_sname_as_options = 1;
 8022e2a:	2301      	movs	r3, #1
 8022e2c:	62fb      	str	r3, [r7, #44]	@ 0x2c
 8022e2e:	e006      	b.n	8022e3e <dhcp_parse_reply+0x572>
      LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("overloaded sname field\n"));
    } else if (overload == DHCP_OVERLOAD_SNAME_FILE) {
 8022e30:	693b      	ldr	r3, [r7, #16]
 8022e32:	2b03      	cmp	r3, #3
 8022e34:	d103      	bne.n	8022e3e <dhcp_parse_reply+0x572>
      parse_sname_as_options = 1;
 8022e36:	2301      	movs	r3, #1
 8022e38:	62fb      	str	r3, [r7, #44]	@ 0x2c
      parse_file_as_options = 1;
 8022e3a:	2301      	movs	r3, #1
 8022e3c:	633b      	str	r3, [r7, #48]	@ 0x30
      LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("overloaded sname and file field\n"));
    } else {
      LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("invalid overload option: %d\n", (int)overload));
    }
  }
  if (parse_file_as_options) {
 8022e3e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8022e40:	2b00      	cmp	r3, #0
 8022e42:	d006      	beq.n	8022e52 <dhcp_parse_reply+0x586>
    /* if both are overloaded, parse file first and then sname (RFC 2131 ch. 4.1) */
    parse_file_as_options = 0;
 8022e44:	2300      	movs	r3, #0
 8022e46:	633b      	str	r3, [r7, #48]	@ 0x30
    options_idx = DHCP_FILE_OFS;
 8022e48:	236c      	movs	r3, #108	@ 0x6c
 8022e4a:	87bb      	strh	r3, [r7, #60]	@ 0x3c
    options_idx_max = DHCP_FILE_OFS + DHCP_FILE_LEN;
 8022e4c:	23ec      	movs	r3, #236	@ 0xec
 8022e4e:	877b      	strh	r3, [r7, #58]	@ 0x3a
#if LWIP_DHCP_BOOTP_FILE
    file_overloaded = 1;
#endif
    goto again;
 8022e50:	e559      	b.n	8022906 <dhcp_parse_reply+0x3a>
  } else if (parse_sname_as_options) {
 8022e52:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8022e54:	2b00      	cmp	r3, #0
 8022e56:	d006      	beq.n	8022e66 <dhcp_parse_reply+0x59a>
    parse_sname_as_options = 0;
 8022e58:	2300      	movs	r3, #0
 8022e5a:	62fb      	str	r3, [r7, #44]	@ 0x2c
    options_idx = DHCP_SNAME_OFS;
 8022e5c:	232c      	movs	r3, #44	@ 0x2c
 8022e5e:	87bb      	strh	r3, [r7, #60]	@ 0x3c
    options_idx_max = DHCP_SNAME_OFS + DHCP_SNAME_LEN;
 8022e60:	236c      	movs	r3, #108	@ 0x6c
 8022e62:	877b      	strh	r3, [r7, #58]	@ 0x3a
    goto again;
 8022e64:	e54f      	b.n	8022906 <dhcp_parse_reply+0x3a>
    }
    /* make sure the string is really NULL-terminated */
    dhcp->boot_file_name[DHCP_FILE_LEN-1] = 0;
  }
#endif /* LWIP_DHCP_BOOTP_FILE */ 
  return ERR_OK;
 8022e66:	2300      	movs	r3, #0
}
 8022e68:	4618      	mov	r0, r3
 8022e6a:	3748      	adds	r7, #72	@ 0x48
 8022e6c:	46bd      	mov	sp, r7
 8022e6e:	bd80      	pop	{r7, pc}
 8022e70:	0802f9e8 	.word	0x0802f9e8
 8022e74:	0802fc70 	.word	0x0802fc70
 8022e78:	0802fa48 	.word	0x0802fa48
 8022e7c:	0802fcb4 	.word	0x0802fcb4
 8022e80:	2402a070 	.word	0x2402a070
 8022e84:	0802fcc8 	.word	0x0802fcc8
 8022e88:	2402a050 	.word	0x2402a050
 8022e8c:	0802fce0 	.word	0x0802fce0
 8022e90:	0802fcf4 	.word	0x0802fcf4

08022e94 <dhcp_recv>:
/**
 * If an incoming DHCP message is in response to us, then trigger the state machine
 */
static void
dhcp_recv(void *arg, struct udp_pcb *pcb, struct pbuf *p, const ip_addr_t *addr, u16_t port)
{
 8022e94:	b580      	push	{r7, lr}
 8022e96:	b08a      	sub	sp, #40	@ 0x28
 8022e98:	af00      	add	r7, sp, #0
 8022e9a:	60f8      	str	r0, [r7, #12]
 8022e9c:	60b9      	str	r1, [r7, #8]
 8022e9e:	607a      	str	r2, [r7, #4]
 8022ea0:	603b      	str	r3, [r7, #0]
  struct netif *netif = ip_current_input_netif();
 8022ea2:	4b5e      	ldr	r3, [pc, #376]	@ (802301c <dhcp_recv+0x188>)
 8022ea4:	685b      	ldr	r3, [r3, #4]
 8022ea6:	61fb      	str	r3, [r7, #28]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 8022ea8:	69fb      	ldr	r3, [r7, #28]
 8022eaa:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8022eac:	61bb      	str	r3, [r7, #24]
  struct dhcp_msg *reply_msg = (struct dhcp_msg *)p->payload;
 8022eae:	687b      	ldr	r3, [r7, #4]
 8022eb0:	685b      	ldr	r3, [r3, #4]
 8022eb2:	617b      	str	r3, [r7, #20]
  struct dhcp_msg *msg_in;

  LWIP_UNUSED_ARG(arg);

  /* Caught DHCP message from netif that does not have DHCP enabled? -> not interested */
  if ((dhcp == NULL) || (dhcp->pcb_allocated == 0)) {
 8022eb4:	69bb      	ldr	r3, [r7, #24]
 8022eb6:	2b00      	cmp	r3, #0
 8022eb8:	f000 809a 	beq.w	8022ff0 <dhcp_recv+0x15c>
 8022ebc:	69bb      	ldr	r3, [r7, #24]
 8022ebe:	791b      	ldrb	r3, [r3, #4]
 8022ec0:	2b00      	cmp	r3, #0
 8022ec2:	f000 8095 	beq.w	8022ff0 <dhcp_recv+0x15c>
  /* prevent warnings about unused arguments */
  LWIP_UNUSED_ARG(pcb);
  LWIP_UNUSED_ARG(addr);
  LWIP_UNUSED_ARG(port);

  if (p->len < DHCP_MIN_REPLY_LEN) {
 8022ec6:	687b      	ldr	r3, [r7, #4]
 8022ec8:	895b      	ldrh	r3, [r3, #10]
 8022eca:	2b2b      	cmp	r3, #43	@ 0x2b
 8022ecc:	f240 8092 	bls.w	8022ff4 <dhcp_recv+0x160>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, ("DHCP reply message or pbuf too short\n"));
    goto free_pbuf_and_return;
  }

  if (reply_msg->op != DHCP_BOOTREPLY) {
 8022ed0:	697b      	ldr	r3, [r7, #20]
 8022ed2:	781b      	ldrb	r3, [r3, #0]
 8022ed4:	2b02      	cmp	r3, #2
 8022ed6:	f040 808f 	bne.w	8022ff8 <dhcp_recv+0x164>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, ("not a DHCP reply message, but type %"U16_F"\n", (u16_t)reply_msg->op));
    goto free_pbuf_and_return;
  }
  /* iterate through hardware address and match against DHCP message */
  for (i = 0; i < netif->hwaddr_len && i < LWIP_MIN(DHCP_CHADDR_LEN, NETIF_MAX_HWADDR_LEN); i++) {
 8022eda:	2300      	movs	r3, #0
 8022edc:	74fb      	strb	r3, [r7, #19]
 8022ede:	e00e      	b.n	8022efe <dhcp_recv+0x6a>
    if (netif->hwaddr[i] != reply_msg->chaddr[i]) {
 8022ee0:	7cfb      	ldrb	r3, [r7, #19]
 8022ee2:	69fa      	ldr	r2, [r7, #28]
 8022ee4:	4413      	add	r3, r2
 8022ee6:	f893 202a 	ldrb.w	r2, [r3, #42]	@ 0x2a
 8022eea:	7cfb      	ldrb	r3, [r7, #19]
 8022eec:	6979      	ldr	r1, [r7, #20]
 8022eee:	440b      	add	r3, r1
 8022ef0:	7f1b      	ldrb	r3, [r3, #28]
 8022ef2:	429a      	cmp	r2, r3
 8022ef4:	f040 8082 	bne.w	8022ffc <dhcp_recv+0x168>
  for (i = 0; i < netif->hwaddr_len && i < LWIP_MIN(DHCP_CHADDR_LEN, NETIF_MAX_HWADDR_LEN); i++) {
 8022ef8:	7cfb      	ldrb	r3, [r7, #19]
 8022efa:	3301      	adds	r3, #1
 8022efc:	74fb      	strb	r3, [r7, #19]
 8022efe:	69fb      	ldr	r3, [r7, #28]
 8022f00:	f893 3030 	ldrb.w	r3, [r3, #48]	@ 0x30
 8022f04:	7cfa      	ldrb	r2, [r7, #19]
 8022f06:	429a      	cmp	r2, r3
 8022f08:	d202      	bcs.n	8022f10 <dhcp_recv+0x7c>
 8022f0a:	7cfb      	ldrb	r3, [r7, #19]
 8022f0c:	2b05      	cmp	r3, #5
 8022f0e:	d9e7      	bls.n	8022ee0 <dhcp_recv+0x4c>
                   (u16_t)i, (u16_t)netif->hwaddr[i], (u16_t)i, (u16_t)reply_msg->chaddr[i]));
      goto free_pbuf_and_return;
    }
  }
  /* match transaction ID against what we expected */
  if (lwip_ntohl(reply_msg->xid) != dhcp->xid) {
 8022f10:	697b      	ldr	r3, [r7, #20]
 8022f12:	685b      	ldr	r3, [r3, #4]
 8022f14:	4618      	mov	r0, r3
 8022f16:	f7f5 fbb4 	bl	8018682 <lwip_htonl>
 8022f1a:	4602      	mov	r2, r0
 8022f1c:	69bb      	ldr	r3, [r7, #24]
 8022f1e:	681b      	ldr	r3, [r3, #0]
 8022f20:	429a      	cmp	r2, r3
 8022f22:	d16d      	bne.n	8023000 <dhcp_recv+0x16c>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING,
                ("transaction id mismatch reply_msg->xid(%"X32_F")!=dhcp->xid(%"X32_F")\n", lwip_ntohl(reply_msg->xid), dhcp->xid));
    goto free_pbuf_and_return;
  }
  /* option fields could be unfold? */
  if (dhcp_parse_reply(p, dhcp) != ERR_OK) {
 8022f24:	69b9      	ldr	r1, [r7, #24]
 8022f26:	6878      	ldr	r0, [r7, #4]
 8022f28:	f7ff fcd0 	bl	80228cc <dhcp_parse_reply>
 8022f2c:	4603      	mov	r3, r0
 8022f2e:	2b00      	cmp	r3, #0
 8022f30:	d168      	bne.n	8023004 <dhcp_recv+0x170>
    goto free_pbuf_and_return;
  }

  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("searching DHCP_OPTION_MESSAGE_TYPE\n"));
  /* obtain pointer to DHCP message type */
  if (!dhcp_option_given(dhcp, DHCP_OPTION_IDX_MSG_TYPE)) {
 8022f32:	4b3b      	ldr	r3, [pc, #236]	@ (8023020 <dhcp_recv+0x18c>)
 8022f34:	785b      	ldrb	r3, [r3, #1]
 8022f36:	2b00      	cmp	r3, #0
 8022f38:	d066      	beq.n	8023008 <dhcp_recv+0x174>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, ("DHCP_OPTION_MESSAGE_TYPE option not found\n"));
    goto free_pbuf_and_return;
  }

  msg_in = (struct dhcp_msg *)p->payload;
 8022f3a:	687b      	ldr	r3, [r7, #4]
 8022f3c:	685b      	ldr	r3, [r3, #4]
 8022f3e:	627b      	str	r3, [r7, #36]	@ 0x24
  /* read DHCP message type */
  msg_type = (u8_t)dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_MSG_TYPE);
 8022f40:	4b38      	ldr	r3, [pc, #224]	@ (8023024 <dhcp_recv+0x190>)
 8022f42:	685b      	ldr	r3, [r3, #4]
 8022f44:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
  /* message type is DHCP ACK? */
  if (msg_type == DHCP_ACK) {
 8022f48:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 8022f4c:	2b05      	cmp	r3, #5
 8022f4e:	d12a      	bne.n	8022fa6 <dhcp_recv+0x112>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("DHCP_ACK received\n"));
    /* in requesting state? */
    if (dhcp->state == DHCP_STATE_REQUESTING) {
 8022f50:	69bb      	ldr	r3, [r7, #24]
 8022f52:	795b      	ldrb	r3, [r3, #5]
 8022f54:	2b01      	cmp	r3, #1
 8022f56:	d112      	bne.n	8022f7e <dhcp_recv+0xea>
      dhcp_handle_ack(netif, msg_in);
 8022f58:	6a79      	ldr	r1, [r7, #36]	@ 0x24
 8022f5a:	69f8      	ldr	r0, [r7, #28]
 8022f5c:	f7fe fe00 	bl	8021b60 <dhcp_handle_ack>
#if DHCP_DOES_ARP_CHECK
      if ((netif->flags & NETIF_FLAG_ETHARP) != 0) {
 8022f60:	69fb      	ldr	r3, [r7, #28]
 8022f62:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 8022f66:	f003 0308 	and.w	r3, r3, #8
 8022f6a:	2b00      	cmp	r3, #0
 8022f6c:	d003      	beq.n	8022f76 <dhcp_recv+0xe2>
        /* check if the acknowledged lease address is already in use */
        dhcp_check(netif);
 8022f6e:	69f8      	ldr	r0, [r7, #28]
 8022f70:	f7fe fb6e 	bl	8021650 <dhcp_check>
 8022f74:	e04b      	b.n	802300e <dhcp_recv+0x17a>
      } else {
        /* bind interface to the acknowledged lease address */
        dhcp_bind(netif);
 8022f76:	69f8      	ldr	r0, [r7, #28]
 8022f78:	f7ff f852 	bl	8022020 <dhcp_bind>
 8022f7c:	e047      	b.n	802300e <dhcp_recv+0x17a>
      /* bind interface to the acknowledged lease address */
      dhcp_bind(netif);
#endif
    }
    /* already bound to the given lease address? */
    else if ((dhcp->state == DHCP_STATE_REBOOTING) || (dhcp->state == DHCP_STATE_REBINDING) ||
 8022f7e:	69bb      	ldr	r3, [r7, #24]
 8022f80:	795b      	ldrb	r3, [r3, #5]
 8022f82:	2b03      	cmp	r3, #3
 8022f84:	d007      	beq.n	8022f96 <dhcp_recv+0x102>
 8022f86:	69bb      	ldr	r3, [r7, #24]
 8022f88:	795b      	ldrb	r3, [r3, #5]
 8022f8a:	2b04      	cmp	r3, #4
 8022f8c:	d003      	beq.n	8022f96 <dhcp_recv+0x102>
             (dhcp->state == DHCP_STATE_RENEWING)) {
 8022f8e:	69bb      	ldr	r3, [r7, #24]
 8022f90:	795b      	ldrb	r3, [r3, #5]
    else if ((dhcp->state == DHCP_STATE_REBOOTING) || (dhcp->state == DHCP_STATE_REBINDING) ||
 8022f92:	2b05      	cmp	r3, #5
 8022f94:	d13b      	bne.n	802300e <dhcp_recv+0x17a>
      dhcp_handle_ack(netif, msg_in);
 8022f96:	6a79      	ldr	r1, [r7, #36]	@ 0x24
 8022f98:	69f8      	ldr	r0, [r7, #28]
 8022f9a:	f7fe fde1 	bl	8021b60 <dhcp_handle_ack>
      dhcp_bind(netif);
 8022f9e:	69f8      	ldr	r0, [r7, #28]
 8022fa0:	f7ff f83e 	bl	8022020 <dhcp_bind>
 8022fa4:	e033      	b.n	802300e <dhcp_recv+0x17a>
    }
  }
  /* received a DHCP_NAK in appropriate state? */
  else if ((msg_type == DHCP_NAK) &&
 8022fa6:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 8022faa:	2b06      	cmp	r3, #6
 8022fac:	d113      	bne.n	8022fd6 <dhcp_recv+0x142>
           ((dhcp->state == DHCP_STATE_REBOOTING) || (dhcp->state == DHCP_STATE_REQUESTING) ||
 8022fae:	69bb      	ldr	r3, [r7, #24]
 8022fb0:	795b      	ldrb	r3, [r3, #5]
  else if ((msg_type == DHCP_NAK) &&
 8022fb2:	2b03      	cmp	r3, #3
 8022fb4:	d00b      	beq.n	8022fce <dhcp_recv+0x13a>
           ((dhcp->state == DHCP_STATE_REBOOTING) || (dhcp->state == DHCP_STATE_REQUESTING) ||
 8022fb6:	69bb      	ldr	r3, [r7, #24]
 8022fb8:	795b      	ldrb	r3, [r3, #5]
 8022fba:	2b01      	cmp	r3, #1
 8022fbc:	d007      	beq.n	8022fce <dhcp_recv+0x13a>
            (dhcp->state == DHCP_STATE_REBINDING) || (dhcp->state == DHCP_STATE_RENEWING  ))) {
 8022fbe:	69bb      	ldr	r3, [r7, #24]
 8022fc0:	795b      	ldrb	r3, [r3, #5]
           ((dhcp->state == DHCP_STATE_REBOOTING) || (dhcp->state == DHCP_STATE_REQUESTING) ||
 8022fc2:	2b04      	cmp	r3, #4
 8022fc4:	d003      	beq.n	8022fce <dhcp_recv+0x13a>
            (dhcp->state == DHCP_STATE_REBINDING) || (dhcp->state == DHCP_STATE_RENEWING  ))) {
 8022fc6:	69bb      	ldr	r3, [r7, #24]
 8022fc8:	795b      	ldrb	r3, [r3, #5]
 8022fca:	2b05      	cmp	r3, #5
 8022fcc:	d103      	bne.n	8022fd6 <dhcp_recv+0x142>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("DHCP_NAK received\n"));
    dhcp_handle_nak(netif);
 8022fce:	69f8      	ldr	r0, [r7, #28]
 8022fd0:	f7fe fb24 	bl	802161c <dhcp_handle_nak>
 8022fd4:	e01b      	b.n	802300e <dhcp_recv+0x17a>
  }
  /* received a DHCP_OFFER in DHCP_STATE_SELECTING state? */
  else if ((msg_type == DHCP_OFFER) && (dhcp->state == DHCP_STATE_SELECTING)) {
 8022fd6:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 8022fda:	2b02      	cmp	r3, #2
 8022fdc:	d116      	bne.n	802300c <dhcp_recv+0x178>
 8022fde:	69bb      	ldr	r3, [r7, #24]
 8022fe0:	795b      	ldrb	r3, [r3, #5]
 8022fe2:	2b06      	cmp	r3, #6
 8022fe4:	d112      	bne.n	802300c <dhcp_recv+0x178>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("DHCP_OFFER received in DHCP_STATE_SELECTING state\n"));
    /* remember offered lease */
    dhcp_handle_offer(netif, msg_in);
 8022fe6:	6a79      	ldr	r1, [r7, #36]	@ 0x24
 8022fe8:	69f8      	ldr	r0, [r7, #28]
 8022fea:	f7fe fb65 	bl	80216b8 <dhcp_handle_offer>
 8022fee:	e00e      	b.n	802300e <dhcp_recv+0x17a>
    goto free_pbuf_and_return;
 8022ff0:	bf00      	nop
 8022ff2:	e00c      	b.n	802300e <dhcp_recv+0x17a>
    goto free_pbuf_and_return;
 8022ff4:	bf00      	nop
 8022ff6:	e00a      	b.n	802300e <dhcp_recv+0x17a>
    goto free_pbuf_and_return;
 8022ff8:	bf00      	nop
 8022ffa:	e008      	b.n	802300e <dhcp_recv+0x17a>
      goto free_pbuf_and_return;
 8022ffc:	bf00      	nop
 8022ffe:	e006      	b.n	802300e <dhcp_recv+0x17a>
    goto free_pbuf_and_return;
 8023000:	bf00      	nop
 8023002:	e004      	b.n	802300e <dhcp_recv+0x17a>
    goto free_pbuf_and_return;
 8023004:	bf00      	nop
 8023006:	e002      	b.n	802300e <dhcp_recv+0x17a>
    goto free_pbuf_and_return;
 8023008:	bf00      	nop
 802300a:	e000      	b.n	802300e <dhcp_recv+0x17a>
  }

free_pbuf_and_return:
 802300c:	bf00      	nop
  pbuf_free(p);
 802300e:	6878      	ldr	r0, [r7, #4]
 8023010:	f7f7 f804 	bl	801a01c <pbuf_free>
}
 8023014:	bf00      	nop
 8023016:	3728      	adds	r7, #40	@ 0x28
 8023018:	46bd      	mov	sp, r7
 802301a:	bd80      	pop	{r7, pc}
 802301c:	2402349c 	.word	0x2402349c
 8023020:	2402a070 	.word	0x2402a070
 8023024:	2402a050 	.word	0x2402a050

08023028 <dhcp_create_msg>:
 * @param dhcp dhcp control struct
 * @param message_type message type of the request
 */
static struct pbuf *
dhcp_create_msg(struct netif *netif, struct dhcp *dhcp, u8_t message_type, u16_t *options_out_len)
{
 8023028:	b580      	push	{r7, lr}
 802302a:	b088      	sub	sp, #32
 802302c:	af00      	add	r7, sp, #0
 802302e:	60f8      	str	r0, [r7, #12]
 8023030:	60b9      	str	r1, [r7, #8]
 8023032:	603b      	str	r3, [r7, #0]
 8023034:	4613      	mov	r3, r2
 8023036:	71fb      	strb	r3, [r7, #7]
  if (!xid_initialised) {
    xid = DHCP_GLOBAL_XID;
    xid_initialised = !xid_initialised;
  }
#endif
  LWIP_ERROR("dhcp_create_msg: netif != NULL", (netif != NULL), return NULL;);
 8023038:	68fb      	ldr	r3, [r7, #12]
 802303a:	2b00      	cmp	r3, #0
 802303c:	d108      	bne.n	8023050 <dhcp_create_msg+0x28>
 802303e:	4b5f      	ldr	r3, [pc, #380]	@ (80231bc <dhcp_create_msg+0x194>)
 8023040:	f240 7269 	movw	r2, #1897	@ 0x769
 8023044:	495e      	ldr	r1, [pc, #376]	@ (80231c0 <dhcp_create_msg+0x198>)
 8023046:	485f      	ldr	r0, [pc, #380]	@ (80231c4 <dhcp_create_msg+0x19c>)
 8023048:	f006 fa60 	bl	802950c <iprintf>
 802304c:	2300      	movs	r3, #0
 802304e:	e0b1      	b.n	80231b4 <dhcp_create_msg+0x18c>
  LWIP_ERROR("dhcp_create_msg: dhcp != NULL", (dhcp != NULL), return NULL;);
 8023050:	68bb      	ldr	r3, [r7, #8]
 8023052:	2b00      	cmp	r3, #0
 8023054:	d108      	bne.n	8023068 <dhcp_create_msg+0x40>
 8023056:	4b59      	ldr	r3, [pc, #356]	@ (80231bc <dhcp_create_msg+0x194>)
 8023058:	f240 726a 	movw	r2, #1898	@ 0x76a
 802305c:	495a      	ldr	r1, [pc, #360]	@ (80231c8 <dhcp_create_msg+0x1a0>)
 802305e:	4859      	ldr	r0, [pc, #356]	@ (80231c4 <dhcp_create_msg+0x19c>)
 8023060:	f006 fa54 	bl	802950c <iprintf>
 8023064:	2300      	movs	r3, #0
 8023066:	e0a5      	b.n	80231b4 <dhcp_create_msg+0x18c>
  p_out = pbuf_alloc(PBUF_TRANSPORT, sizeof(struct dhcp_msg), PBUF_RAM);
 8023068:	f44f 7220 	mov.w	r2, #640	@ 0x280
 802306c:	f44f 719a 	mov.w	r1, #308	@ 0x134
 8023070:	2036      	movs	r0, #54	@ 0x36
 8023072:	f7f6 fcbd 	bl	80199f0 <pbuf_alloc>
 8023076:	61b8      	str	r0, [r7, #24]
  if (p_out == NULL) {
 8023078:	69bb      	ldr	r3, [r7, #24]
 802307a:	2b00      	cmp	r3, #0
 802307c:	d101      	bne.n	8023082 <dhcp_create_msg+0x5a>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS,
                ("dhcp_create_msg(): could not allocate pbuf\n"));
    return NULL;
 802307e:	2300      	movs	r3, #0
 8023080:	e098      	b.n	80231b4 <dhcp_create_msg+0x18c>
  }
  LWIP_ASSERT("dhcp_create_msg: check that first pbuf can hold struct dhcp_msg",
 8023082:	69bb      	ldr	r3, [r7, #24]
 8023084:	895b      	ldrh	r3, [r3, #10]
 8023086:	f5b3 7f9a 	cmp.w	r3, #308	@ 0x134
 802308a:	d206      	bcs.n	802309a <dhcp_create_msg+0x72>
 802308c:	4b4b      	ldr	r3, [pc, #300]	@ (80231bc <dhcp_create_msg+0x194>)
 802308e:	f240 7271 	movw	r2, #1905	@ 0x771
 8023092:	494e      	ldr	r1, [pc, #312]	@ (80231cc <dhcp_create_msg+0x1a4>)
 8023094:	484b      	ldr	r0, [pc, #300]	@ (80231c4 <dhcp_create_msg+0x19c>)
 8023096:	f006 fa39 	bl	802950c <iprintf>
              (p_out->len >= sizeof(struct dhcp_msg)));

  /* DHCP_REQUEST should reuse 'xid' from DHCPOFFER */
  if ((message_type != DHCP_REQUEST) || (dhcp->state == DHCP_STATE_REBOOTING)) {
 802309a:	79fb      	ldrb	r3, [r7, #7]
 802309c:	2b03      	cmp	r3, #3
 802309e:	d103      	bne.n	80230a8 <dhcp_create_msg+0x80>
 80230a0:	68bb      	ldr	r3, [r7, #8]
 80230a2:	795b      	ldrb	r3, [r3, #5]
 80230a4:	2b03      	cmp	r3, #3
 80230a6:	d10d      	bne.n	80230c4 <dhcp_create_msg+0x9c>
    /* reuse transaction identifier in retransmissions */
    if (dhcp->tries == 0) {
 80230a8:	68bb      	ldr	r3, [r7, #8]
 80230aa:	799b      	ldrb	r3, [r3, #6]
 80230ac:	2b00      	cmp	r3, #0
 80230ae:	d105      	bne.n	80230bc <dhcp_create_msg+0x94>
#if DHCP_CREATE_RAND_XID && defined(LWIP_RAND)
      xid = LWIP_RAND();
 80230b0:	f004 ff02 	bl	8027eb8 <rand>
 80230b4:	4603      	mov	r3, r0
 80230b6:	461a      	mov	r2, r3
 80230b8:	4b45      	ldr	r3, [pc, #276]	@ (80231d0 <dhcp_create_msg+0x1a8>)
 80230ba:	601a      	str	r2, [r3, #0]
#else /* DHCP_CREATE_RAND_XID && defined(LWIP_RAND) */
      xid++;
#endif /* DHCP_CREATE_RAND_XID && defined(LWIP_RAND) */
    }
    dhcp->xid = xid;
 80230bc:	4b44      	ldr	r3, [pc, #272]	@ (80231d0 <dhcp_create_msg+0x1a8>)
 80230be:	681a      	ldr	r2, [r3, #0]
 80230c0:	68bb      	ldr	r3, [r7, #8]
 80230c2:	601a      	str	r2, [r3, #0]
  }
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE,
              ("transaction id xid(%"X32_F")\n", xid));

  msg_out = (struct dhcp_msg *)p_out->payload;
 80230c4:	69bb      	ldr	r3, [r7, #24]
 80230c6:	685b      	ldr	r3, [r3, #4]
 80230c8:	617b      	str	r3, [r7, #20]
  memset(msg_out, 0, sizeof(struct dhcp_msg));
 80230ca:	f44f 729a 	mov.w	r2, #308	@ 0x134
 80230ce:	2100      	movs	r1, #0
 80230d0:	6978      	ldr	r0, [r7, #20]
 80230d2:	f006 fbad 	bl	8029830 <memset>

  msg_out->op = DHCP_BOOTREQUEST;
 80230d6:	697b      	ldr	r3, [r7, #20]
 80230d8:	2201      	movs	r2, #1
 80230da:	701a      	strb	r2, [r3, #0]
  /* @todo: make link layer independent */
  msg_out->htype = LWIP_IANA_HWTYPE_ETHERNET;
 80230dc:	697b      	ldr	r3, [r7, #20]
 80230de:	2201      	movs	r2, #1
 80230e0:	705a      	strb	r2, [r3, #1]
  msg_out->hlen = netif->hwaddr_len;
 80230e2:	68fb      	ldr	r3, [r7, #12]
 80230e4:	f893 2030 	ldrb.w	r2, [r3, #48]	@ 0x30
 80230e8:	697b      	ldr	r3, [r7, #20]
 80230ea:	709a      	strb	r2, [r3, #2]
  msg_out->xid = lwip_htonl(dhcp->xid);
 80230ec:	68bb      	ldr	r3, [r7, #8]
 80230ee:	681b      	ldr	r3, [r3, #0]
 80230f0:	4618      	mov	r0, r3
 80230f2:	f7f5 fac6 	bl	8018682 <lwip_htonl>
 80230f6:	4602      	mov	r2, r0
 80230f8:	697b      	ldr	r3, [r7, #20]
 80230fa:	605a      	str	r2, [r3, #4]
  /* we don't need the broadcast flag since we can receive unicast traffic
     before being fully configured! */
  /* set ciaddr to netif->ip_addr based on message_type and state */
  if ((message_type == DHCP_INFORM) || (message_type == DHCP_DECLINE) || (message_type == DHCP_RELEASE) ||
 80230fc:	79fb      	ldrb	r3, [r7, #7]
 80230fe:	2b08      	cmp	r3, #8
 8023100:	d010      	beq.n	8023124 <dhcp_create_msg+0xfc>
 8023102:	79fb      	ldrb	r3, [r7, #7]
 8023104:	2b04      	cmp	r3, #4
 8023106:	d00d      	beq.n	8023124 <dhcp_create_msg+0xfc>
 8023108:	79fb      	ldrb	r3, [r7, #7]
 802310a:	2b07      	cmp	r3, #7
 802310c:	d00a      	beq.n	8023124 <dhcp_create_msg+0xfc>
 802310e:	79fb      	ldrb	r3, [r7, #7]
 8023110:	2b03      	cmp	r3, #3
 8023112:	d10c      	bne.n	802312e <dhcp_create_msg+0x106>
      ((message_type == DHCP_REQUEST) && /* DHCP_STATE_BOUND not used for sending! */
       ((dhcp->state == DHCP_STATE_RENEWING) || dhcp->state == DHCP_STATE_REBINDING))) {
 8023114:	68bb      	ldr	r3, [r7, #8]
 8023116:	795b      	ldrb	r3, [r3, #5]
      ((message_type == DHCP_REQUEST) && /* DHCP_STATE_BOUND not used for sending! */
 8023118:	2b05      	cmp	r3, #5
 802311a:	d003      	beq.n	8023124 <dhcp_create_msg+0xfc>
       ((dhcp->state == DHCP_STATE_RENEWING) || dhcp->state == DHCP_STATE_REBINDING))) {
 802311c:	68bb      	ldr	r3, [r7, #8]
 802311e:	795b      	ldrb	r3, [r3, #5]
 8023120:	2b04      	cmp	r3, #4
 8023122:	d104      	bne.n	802312e <dhcp_create_msg+0x106>
    ip4_addr_copy(msg_out->ciaddr, *netif_ip4_addr(netif));
 8023124:	68fb      	ldr	r3, [r7, #12]
 8023126:	3304      	adds	r3, #4
 8023128:	681a      	ldr	r2, [r3, #0]
 802312a:	697b      	ldr	r3, [r7, #20]
 802312c:	60da      	str	r2, [r3, #12]
  }
  for (i = 0; i < LWIP_MIN(DHCP_CHADDR_LEN, NETIF_MAX_HWADDR_LEN); i++) {
 802312e:	2300      	movs	r3, #0
 8023130:	83fb      	strh	r3, [r7, #30]
 8023132:	e00c      	b.n	802314e <dhcp_create_msg+0x126>
    /* copy netif hardware address (padded with zeroes through memset already) */
    msg_out->chaddr[i] = netif->hwaddr[i];
 8023134:	8bfa      	ldrh	r2, [r7, #30]
 8023136:	8bfb      	ldrh	r3, [r7, #30]
 8023138:	68f9      	ldr	r1, [r7, #12]
 802313a:	440a      	add	r2, r1
 802313c:	f892 102a 	ldrb.w	r1, [r2, #42]	@ 0x2a
 8023140:	697a      	ldr	r2, [r7, #20]
 8023142:	4413      	add	r3, r2
 8023144:	460a      	mov	r2, r1
 8023146:	771a      	strb	r2, [r3, #28]
  for (i = 0; i < LWIP_MIN(DHCP_CHADDR_LEN, NETIF_MAX_HWADDR_LEN); i++) {
 8023148:	8bfb      	ldrh	r3, [r7, #30]
 802314a:	3301      	adds	r3, #1
 802314c:	83fb      	strh	r3, [r7, #30]
 802314e:	8bfb      	ldrh	r3, [r7, #30]
 8023150:	2b05      	cmp	r3, #5
 8023152:	d9ef      	bls.n	8023134 <dhcp_create_msg+0x10c>
  }
  msg_out->cookie = PP_HTONL(DHCP_MAGIC_COOKIE);
 8023154:	697b      	ldr	r3, [r7, #20]
 8023156:	2200      	movs	r2, #0
 8023158:	f042 0263 	orr.w	r2, r2, #99	@ 0x63
 802315c:	f883 20ec 	strb.w	r2, [r3, #236]	@ 0xec
 8023160:	2200      	movs	r2, #0
 8023162:	f062 027d 	orn	r2, r2, #125	@ 0x7d
 8023166:	f883 20ed 	strb.w	r2, [r3, #237]	@ 0xed
 802316a:	2200      	movs	r2, #0
 802316c:	f042 0253 	orr.w	r2, r2, #83	@ 0x53
 8023170:	f883 20ee 	strb.w	r2, [r3, #238]	@ 0xee
 8023174:	2200      	movs	r2, #0
 8023176:	f042 0263 	orr.w	r2, r2, #99	@ 0x63
 802317a:	f883 20ef 	strb.w	r2, [r3, #239]	@ 0xef
  /* Add option MESSAGE_TYPE */
  options_out_len_loc = dhcp_option(0, msg_out->options, DHCP_OPTION_MESSAGE_TYPE, DHCP_OPTION_MESSAGE_TYPE_LEN);
 802317e:	697b      	ldr	r3, [r7, #20]
 8023180:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8023184:	2301      	movs	r3, #1
 8023186:	2235      	movs	r2, #53	@ 0x35
 8023188:	2000      	movs	r0, #0
 802318a:	f7ff facf 	bl	802272c <dhcp_option>
 802318e:	4603      	mov	r3, r0
 8023190:	827b      	strh	r3, [r7, #18]
  options_out_len_loc = dhcp_option_byte(options_out_len_loc, msg_out->options, message_type);
 8023192:	697b      	ldr	r3, [r7, #20]
 8023194:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8023198:	79fa      	ldrb	r2, [r7, #7]
 802319a:	8a7b      	ldrh	r3, [r7, #18]
 802319c:	4618      	mov	r0, r3
 802319e:	f7ff faf9 	bl	8022794 <dhcp_option_byte>
 80231a2:	4603      	mov	r3, r0
 80231a4:	827b      	strh	r3, [r7, #18]
  if (options_out_len) {
 80231a6:	683b      	ldr	r3, [r7, #0]
 80231a8:	2b00      	cmp	r3, #0
 80231aa:	d002      	beq.n	80231b2 <dhcp_create_msg+0x18a>
    *options_out_len = options_out_len_loc;
 80231ac:	683b      	ldr	r3, [r7, #0]
 80231ae:	8a7a      	ldrh	r2, [r7, #18]
 80231b0:	801a      	strh	r2, [r3, #0]
  }
  return p_out;
 80231b2:	69bb      	ldr	r3, [r7, #24]
}
 80231b4:	4618      	mov	r0, r3
 80231b6:	3720      	adds	r7, #32
 80231b8:	46bd      	mov	sp, r7
 80231ba:	bd80      	pop	{r7, pc}
 80231bc:	0802f9e8 	.word	0x0802f9e8
 80231c0:	0802fd08 	.word	0x0802fd08
 80231c4:	0802fa48 	.word	0x0802fa48
 80231c8:	0802fd28 	.word	0x0802fd28
 80231cc:	0802fd48 	.word	0x0802fd48
 80231d0:	2402a080 	.word	0x2402a080

080231d4 <dhcp_option_trailer>:
 * Adds the END option to the DHCP message, and if
 * necessary, up to three padding bytes.
 */
static void
dhcp_option_trailer(u16_t options_out_len, u8_t *options, struct pbuf *p_out)
{
 80231d4:	b580      	push	{r7, lr}
 80231d6:	b084      	sub	sp, #16
 80231d8:	af00      	add	r7, sp, #0
 80231da:	4603      	mov	r3, r0
 80231dc:	60b9      	str	r1, [r7, #8]
 80231de:	607a      	str	r2, [r7, #4]
 80231e0:	81fb      	strh	r3, [r7, #14]
  options[options_out_len++] = DHCP_OPTION_END;
 80231e2:	89fb      	ldrh	r3, [r7, #14]
 80231e4:	1c5a      	adds	r2, r3, #1
 80231e6:	81fa      	strh	r2, [r7, #14]
 80231e8:	461a      	mov	r2, r3
 80231ea:	68bb      	ldr	r3, [r7, #8]
 80231ec:	4413      	add	r3, r2
 80231ee:	22ff      	movs	r2, #255	@ 0xff
 80231f0:	701a      	strb	r2, [r3, #0]
  /* packet is too small, or not 4 byte aligned? */
  while (((options_out_len < DHCP_MIN_OPTIONS_LEN) || (options_out_len & 3)) &&
 80231f2:	e007      	b.n	8023204 <dhcp_option_trailer+0x30>
         (options_out_len < DHCP_OPTIONS_LEN)) {
    /* add a fill/padding byte */
    options[options_out_len++] = 0;
 80231f4:	89fb      	ldrh	r3, [r7, #14]
 80231f6:	1c5a      	adds	r2, r3, #1
 80231f8:	81fa      	strh	r2, [r7, #14]
 80231fa:	461a      	mov	r2, r3
 80231fc:	68bb      	ldr	r3, [r7, #8]
 80231fe:	4413      	add	r3, r2
 8023200:	2200      	movs	r2, #0
 8023202:	701a      	strb	r2, [r3, #0]
  while (((options_out_len < DHCP_MIN_OPTIONS_LEN) || (options_out_len & 3)) &&
 8023204:	89fb      	ldrh	r3, [r7, #14]
 8023206:	2b43      	cmp	r3, #67	@ 0x43
 8023208:	d904      	bls.n	8023214 <dhcp_option_trailer+0x40>
 802320a:	89fb      	ldrh	r3, [r7, #14]
 802320c:	f003 0303 	and.w	r3, r3, #3
 8023210:	2b00      	cmp	r3, #0
 8023212:	d002      	beq.n	802321a <dhcp_option_trailer+0x46>
 8023214:	89fb      	ldrh	r3, [r7, #14]
 8023216:	2b43      	cmp	r3, #67	@ 0x43
 8023218:	d9ec      	bls.n	80231f4 <dhcp_option_trailer+0x20>
  }
  /* shrink the pbuf to the actual content length */
  pbuf_realloc(p_out, (u16_t)(sizeof(struct dhcp_msg) - DHCP_OPTIONS_LEN + options_out_len));
 802321a:	89fb      	ldrh	r3, [r7, #14]
 802321c:	33f0      	adds	r3, #240	@ 0xf0
 802321e:	b29b      	uxth	r3, r3
 8023220:	4619      	mov	r1, r3
 8023222:	6878      	ldr	r0, [r7, #4]
 8023224:	f7f6 fd44 	bl	8019cb0 <pbuf_realloc>
}
 8023228:	bf00      	nop
 802322a:	3710      	adds	r7, #16
 802322c:	46bd      	mov	sp, r7
 802322e:	bd80      	pop	{r7, pc}

08023230 <dhcp_supplied_address>:
 * @return 1 if DHCP supplied netif->ip_addr (states BOUND or RENEWING),
 *         0 otherwise
 */
u8_t
dhcp_supplied_address(const struct netif *netif)
{
 8023230:	b480      	push	{r7}
 8023232:	b085      	sub	sp, #20
 8023234:	af00      	add	r7, sp, #0
 8023236:	6078      	str	r0, [r7, #4]
  if ((netif != NULL) && (netif_dhcp_data(netif) != NULL)) {
 8023238:	687b      	ldr	r3, [r7, #4]
 802323a:	2b00      	cmp	r3, #0
 802323c:	d017      	beq.n	802326e <dhcp_supplied_address+0x3e>
 802323e:	687b      	ldr	r3, [r7, #4]
 8023240:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8023242:	2b00      	cmp	r3, #0
 8023244:	d013      	beq.n	802326e <dhcp_supplied_address+0x3e>
    struct dhcp *dhcp = netif_dhcp_data(netif);
 8023246:	687b      	ldr	r3, [r7, #4]
 8023248:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 802324a:	60fb      	str	r3, [r7, #12]
    return (dhcp->state == DHCP_STATE_BOUND) || (dhcp->state == DHCP_STATE_RENEWING) ||
 802324c:	68fb      	ldr	r3, [r7, #12]
 802324e:	795b      	ldrb	r3, [r3, #5]
 8023250:	2b0a      	cmp	r3, #10
 8023252:	d007      	beq.n	8023264 <dhcp_supplied_address+0x34>
 8023254:	68fb      	ldr	r3, [r7, #12]
 8023256:	795b      	ldrb	r3, [r3, #5]
 8023258:	2b05      	cmp	r3, #5
 802325a:	d003      	beq.n	8023264 <dhcp_supplied_address+0x34>
           (dhcp->state == DHCP_STATE_REBINDING);
 802325c:	68fb      	ldr	r3, [r7, #12]
 802325e:	795b      	ldrb	r3, [r3, #5]
    return (dhcp->state == DHCP_STATE_BOUND) || (dhcp->state == DHCP_STATE_RENEWING) ||
 8023260:	2b04      	cmp	r3, #4
 8023262:	d101      	bne.n	8023268 <dhcp_supplied_address+0x38>
 8023264:	2301      	movs	r3, #1
 8023266:	e000      	b.n	802326a <dhcp_supplied_address+0x3a>
 8023268:	2300      	movs	r3, #0
 802326a:	b2db      	uxtb	r3, r3
 802326c:	e000      	b.n	8023270 <dhcp_supplied_address+0x40>
  }
  return 0;
 802326e:	2300      	movs	r3, #0
}
 8023270:	4618      	mov	r0, r3
 8023272:	3714      	adds	r7, #20
 8023274:	46bd      	mov	sp, r7
 8023276:	f85d 7b04 	ldr.w	r7, [sp], #4
 802327a:	4770      	bx	lr

0802327c <etharp_free_entry>:
#endif /* ARP_QUEUEING */

/** Clean up ARP table entries */
static void
etharp_free_entry(int i)
{
 802327c:	b580      	push	{r7, lr}
 802327e:	b082      	sub	sp, #8
 8023280:	af00      	add	r7, sp, #0
 8023282:	6078      	str	r0, [r7, #4]
  /* remove from SNMP ARP index tree */
  mib2_remove_arp_entry(arp_table[i].netif, &arp_table[i].ipaddr);
  /* and empty packet queue */
  if (arp_table[i].q != NULL) {
 8023284:	492b      	ldr	r1, [pc, #172]	@ (8023334 <etharp_free_entry+0xb8>)
 8023286:	687a      	ldr	r2, [r7, #4]
 8023288:	4613      	mov	r3, r2
 802328a:	005b      	lsls	r3, r3, #1
 802328c:	4413      	add	r3, r2
 802328e:	00db      	lsls	r3, r3, #3
 8023290:	440b      	add	r3, r1
 8023292:	681b      	ldr	r3, [r3, #0]
 8023294:	2b00      	cmp	r3, #0
 8023296:	d013      	beq.n	80232c0 <etharp_free_entry+0x44>
    /* remove all queued packets */
    LWIP_DEBUGF(ETHARP_DEBUG, ("etharp_free_entry: freeing entry %"U16_F", packet queue %p.\n", (u16_t)i, (void *)(arp_table[i].q)));
    free_etharp_q(arp_table[i].q);
 8023298:	4926      	ldr	r1, [pc, #152]	@ (8023334 <etharp_free_entry+0xb8>)
 802329a:	687a      	ldr	r2, [r7, #4]
 802329c:	4613      	mov	r3, r2
 802329e:	005b      	lsls	r3, r3, #1
 80232a0:	4413      	add	r3, r2
 80232a2:	00db      	lsls	r3, r3, #3
 80232a4:	440b      	add	r3, r1
 80232a6:	681b      	ldr	r3, [r3, #0]
 80232a8:	4618      	mov	r0, r3
 80232aa:	f7f6 feb7 	bl	801a01c <pbuf_free>
    arp_table[i].q = NULL;
 80232ae:	4921      	ldr	r1, [pc, #132]	@ (8023334 <etharp_free_entry+0xb8>)
 80232b0:	687a      	ldr	r2, [r7, #4]
 80232b2:	4613      	mov	r3, r2
 80232b4:	005b      	lsls	r3, r3, #1
 80232b6:	4413      	add	r3, r2
 80232b8:	00db      	lsls	r3, r3, #3
 80232ba:	440b      	add	r3, r1
 80232bc:	2200      	movs	r2, #0
 80232be:	601a      	str	r2, [r3, #0]
  }
  /* recycle entry for re-use */
  arp_table[i].state = ETHARP_STATE_EMPTY;
 80232c0:	491c      	ldr	r1, [pc, #112]	@ (8023334 <etharp_free_entry+0xb8>)
 80232c2:	687a      	ldr	r2, [r7, #4]
 80232c4:	4613      	mov	r3, r2
 80232c6:	005b      	lsls	r3, r3, #1
 80232c8:	4413      	add	r3, r2
 80232ca:	00db      	lsls	r3, r3, #3
 80232cc:	440b      	add	r3, r1
 80232ce:	3314      	adds	r3, #20
 80232d0:	2200      	movs	r2, #0
 80232d2:	701a      	strb	r2, [r3, #0]
#ifdef LWIP_DEBUG
  /* for debugging, clean out the complete entry */
  arp_table[i].ctime = 0;
 80232d4:	4917      	ldr	r1, [pc, #92]	@ (8023334 <etharp_free_entry+0xb8>)
 80232d6:	687a      	ldr	r2, [r7, #4]
 80232d8:	4613      	mov	r3, r2
 80232da:	005b      	lsls	r3, r3, #1
 80232dc:	4413      	add	r3, r2
 80232de:	00db      	lsls	r3, r3, #3
 80232e0:	440b      	add	r3, r1
 80232e2:	3312      	adds	r3, #18
 80232e4:	2200      	movs	r2, #0
 80232e6:	801a      	strh	r2, [r3, #0]
  arp_table[i].netif = NULL;
 80232e8:	4912      	ldr	r1, [pc, #72]	@ (8023334 <etharp_free_entry+0xb8>)
 80232ea:	687a      	ldr	r2, [r7, #4]
 80232ec:	4613      	mov	r3, r2
 80232ee:	005b      	lsls	r3, r3, #1
 80232f0:	4413      	add	r3, r2
 80232f2:	00db      	lsls	r3, r3, #3
 80232f4:	440b      	add	r3, r1
 80232f6:	3308      	adds	r3, #8
 80232f8:	2200      	movs	r2, #0
 80232fa:	601a      	str	r2, [r3, #0]
  ip4_addr_set_zero(&arp_table[i].ipaddr);
 80232fc:	490d      	ldr	r1, [pc, #52]	@ (8023334 <etharp_free_entry+0xb8>)
 80232fe:	687a      	ldr	r2, [r7, #4]
 8023300:	4613      	mov	r3, r2
 8023302:	005b      	lsls	r3, r3, #1
 8023304:	4413      	add	r3, r2
 8023306:	00db      	lsls	r3, r3, #3
 8023308:	440b      	add	r3, r1
 802330a:	3304      	adds	r3, #4
 802330c:	2200      	movs	r2, #0
 802330e:	601a      	str	r2, [r3, #0]
  arp_table[i].ethaddr = ethzero;
 8023310:	4908      	ldr	r1, [pc, #32]	@ (8023334 <etharp_free_entry+0xb8>)
 8023312:	687a      	ldr	r2, [r7, #4]
 8023314:	4613      	mov	r3, r2
 8023316:	005b      	lsls	r3, r3, #1
 8023318:	4413      	add	r3, r2
 802331a:	00db      	lsls	r3, r3, #3
 802331c:	440b      	add	r3, r1
 802331e:	3308      	adds	r3, #8
 8023320:	4a05      	ldr	r2, [pc, #20]	@ (8023338 <etharp_free_entry+0xbc>)
 8023322:	3304      	adds	r3, #4
 8023324:	6810      	ldr	r0, [r2, #0]
 8023326:	6018      	str	r0, [r3, #0]
 8023328:	8892      	ldrh	r2, [r2, #4]
 802332a:	809a      	strh	r2, [r3, #4]
#endif /* LWIP_DEBUG */
}
 802332c:	bf00      	nop
 802332e:	3708      	adds	r7, #8
 8023330:	46bd      	mov	sp, r7
 8023332:	bd80      	pop	{r7, pc}
 8023334:	2402a084 	.word	0x2402a084
 8023338:	080307b4 	.word	0x080307b4

0802333c <etharp_tmr>:
 * This function should be called every ARP_TMR_INTERVAL milliseconds (1 second),
 * in order to expire entries in the ARP table.
 */
void
etharp_tmr(void)
{
 802333c:	b580      	push	{r7, lr}
 802333e:	b082      	sub	sp, #8
 8023340:	af00      	add	r7, sp, #0
  int i;

  LWIP_DEBUGF(ETHARP_DEBUG, ("etharp_timer\n"));
  /* remove expired entries from the ARP table */
  for (i = 0; i < ARP_TABLE_SIZE; ++i) {
 8023342:	2300      	movs	r3, #0
 8023344:	607b      	str	r3, [r7, #4]
 8023346:	e096      	b.n	8023476 <etharp_tmr+0x13a>
    u8_t state = arp_table[i].state;
 8023348:	494f      	ldr	r1, [pc, #316]	@ (8023488 <etharp_tmr+0x14c>)
 802334a:	687a      	ldr	r2, [r7, #4]
 802334c:	4613      	mov	r3, r2
 802334e:	005b      	lsls	r3, r3, #1
 8023350:	4413      	add	r3, r2
 8023352:	00db      	lsls	r3, r3, #3
 8023354:	440b      	add	r3, r1
 8023356:	3314      	adds	r3, #20
 8023358:	781b      	ldrb	r3, [r3, #0]
 802335a:	70fb      	strb	r3, [r7, #3]
    if (state != ETHARP_STATE_EMPTY
 802335c:	78fb      	ldrb	r3, [r7, #3]
 802335e:	2b00      	cmp	r3, #0
 8023360:	f000 8086 	beq.w	8023470 <etharp_tmr+0x134>
#if ETHARP_SUPPORT_STATIC_ENTRIES
        && (state != ETHARP_STATE_STATIC)
#endif /* ETHARP_SUPPORT_STATIC_ENTRIES */
       ) {
      arp_table[i].ctime++;
 8023364:	4948      	ldr	r1, [pc, #288]	@ (8023488 <etharp_tmr+0x14c>)
 8023366:	687a      	ldr	r2, [r7, #4]
 8023368:	4613      	mov	r3, r2
 802336a:	005b      	lsls	r3, r3, #1
 802336c:	4413      	add	r3, r2
 802336e:	00db      	lsls	r3, r3, #3
 8023370:	440b      	add	r3, r1
 8023372:	3312      	adds	r3, #18
 8023374:	881b      	ldrh	r3, [r3, #0]
 8023376:	3301      	adds	r3, #1
 8023378:	b298      	uxth	r0, r3
 802337a:	4943      	ldr	r1, [pc, #268]	@ (8023488 <etharp_tmr+0x14c>)
 802337c:	687a      	ldr	r2, [r7, #4]
 802337e:	4613      	mov	r3, r2
 8023380:	005b      	lsls	r3, r3, #1
 8023382:	4413      	add	r3, r2
 8023384:	00db      	lsls	r3, r3, #3
 8023386:	440b      	add	r3, r1
 8023388:	3312      	adds	r3, #18
 802338a:	4602      	mov	r2, r0
 802338c:	801a      	strh	r2, [r3, #0]
      if ((arp_table[i].ctime >= ARP_MAXAGE) ||
 802338e:	493e      	ldr	r1, [pc, #248]	@ (8023488 <etharp_tmr+0x14c>)
 8023390:	687a      	ldr	r2, [r7, #4]
 8023392:	4613      	mov	r3, r2
 8023394:	005b      	lsls	r3, r3, #1
 8023396:	4413      	add	r3, r2
 8023398:	00db      	lsls	r3, r3, #3
 802339a:	440b      	add	r3, r1
 802339c:	3312      	adds	r3, #18
 802339e:	881b      	ldrh	r3, [r3, #0]
 80233a0:	f5b3 7f96 	cmp.w	r3, #300	@ 0x12c
 80233a4:	d215      	bcs.n	80233d2 <etharp_tmr+0x96>
          ((arp_table[i].state == ETHARP_STATE_PENDING)  &&
 80233a6:	4938      	ldr	r1, [pc, #224]	@ (8023488 <etharp_tmr+0x14c>)
 80233a8:	687a      	ldr	r2, [r7, #4]
 80233aa:	4613      	mov	r3, r2
 80233ac:	005b      	lsls	r3, r3, #1
 80233ae:	4413      	add	r3, r2
 80233b0:	00db      	lsls	r3, r3, #3
 80233b2:	440b      	add	r3, r1
 80233b4:	3314      	adds	r3, #20
 80233b6:	781b      	ldrb	r3, [r3, #0]
      if ((arp_table[i].ctime >= ARP_MAXAGE) ||
 80233b8:	2b01      	cmp	r3, #1
 80233ba:	d10e      	bne.n	80233da <etharp_tmr+0x9e>
           (arp_table[i].ctime >= ARP_MAXPENDING))) {
 80233bc:	4932      	ldr	r1, [pc, #200]	@ (8023488 <etharp_tmr+0x14c>)
 80233be:	687a      	ldr	r2, [r7, #4]
 80233c0:	4613      	mov	r3, r2
 80233c2:	005b      	lsls	r3, r3, #1
 80233c4:	4413      	add	r3, r2
 80233c6:	00db      	lsls	r3, r3, #3
 80233c8:	440b      	add	r3, r1
 80233ca:	3312      	adds	r3, #18
 80233cc:	881b      	ldrh	r3, [r3, #0]
          ((arp_table[i].state == ETHARP_STATE_PENDING)  &&
 80233ce:	2b04      	cmp	r3, #4
 80233d0:	d903      	bls.n	80233da <etharp_tmr+0x9e>
        /* pending or stable entry has become old! */
        LWIP_DEBUGF(ETHARP_DEBUG, ("etharp_timer: expired %s entry %d.\n",
                                   arp_table[i].state >= ETHARP_STATE_STABLE ? "stable" : "pending", i));
        /* clean up entries that have just been expired */
        etharp_free_entry(i);
 80233d2:	6878      	ldr	r0, [r7, #4]
 80233d4:	f7ff ff52 	bl	802327c <etharp_free_entry>
 80233d8:	e04a      	b.n	8023470 <etharp_tmr+0x134>
      } else if (arp_table[i].state == ETHARP_STATE_STABLE_REREQUESTING_1) {
 80233da:	492b      	ldr	r1, [pc, #172]	@ (8023488 <etharp_tmr+0x14c>)
 80233dc:	687a      	ldr	r2, [r7, #4]
 80233de:	4613      	mov	r3, r2
 80233e0:	005b      	lsls	r3, r3, #1
 80233e2:	4413      	add	r3, r2
 80233e4:	00db      	lsls	r3, r3, #3
 80233e6:	440b      	add	r3, r1
 80233e8:	3314      	adds	r3, #20
 80233ea:	781b      	ldrb	r3, [r3, #0]
 80233ec:	2b03      	cmp	r3, #3
 80233ee:	d10a      	bne.n	8023406 <etharp_tmr+0xca>
        /* Don't send more than one request every 2 seconds. */
        arp_table[i].state = ETHARP_STATE_STABLE_REREQUESTING_2;
 80233f0:	4925      	ldr	r1, [pc, #148]	@ (8023488 <etharp_tmr+0x14c>)
 80233f2:	687a      	ldr	r2, [r7, #4]
 80233f4:	4613      	mov	r3, r2
 80233f6:	005b      	lsls	r3, r3, #1
 80233f8:	4413      	add	r3, r2
 80233fa:	00db      	lsls	r3, r3, #3
 80233fc:	440b      	add	r3, r1
 80233fe:	3314      	adds	r3, #20
 8023400:	2204      	movs	r2, #4
 8023402:	701a      	strb	r2, [r3, #0]
 8023404:	e034      	b.n	8023470 <etharp_tmr+0x134>
      } else if (arp_table[i].state == ETHARP_STATE_STABLE_REREQUESTING_2) {
 8023406:	4920      	ldr	r1, [pc, #128]	@ (8023488 <etharp_tmr+0x14c>)
 8023408:	687a      	ldr	r2, [r7, #4]
 802340a:	4613      	mov	r3, r2
 802340c:	005b      	lsls	r3, r3, #1
 802340e:	4413      	add	r3, r2
 8023410:	00db      	lsls	r3, r3, #3
 8023412:	440b      	add	r3, r1
 8023414:	3314      	adds	r3, #20
 8023416:	781b      	ldrb	r3, [r3, #0]
 8023418:	2b04      	cmp	r3, #4
 802341a:	d10a      	bne.n	8023432 <etharp_tmr+0xf6>
        /* Reset state to stable, so that the next transmitted packet will
           re-send an ARP request. */
        arp_table[i].state = ETHARP_STATE_STABLE;
 802341c:	491a      	ldr	r1, [pc, #104]	@ (8023488 <etharp_tmr+0x14c>)
 802341e:	687a      	ldr	r2, [r7, #4]
 8023420:	4613      	mov	r3, r2
 8023422:	005b      	lsls	r3, r3, #1
 8023424:	4413      	add	r3, r2
 8023426:	00db      	lsls	r3, r3, #3
 8023428:	440b      	add	r3, r1
 802342a:	3314      	adds	r3, #20
 802342c:	2202      	movs	r2, #2
 802342e:	701a      	strb	r2, [r3, #0]
 8023430:	e01e      	b.n	8023470 <etharp_tmr+0x134>
      } else if (arp_table[i].state == ETHARP_STATE_PENDING) {
 8023432:	4915      	ldr	r1, [pc, #84]	@ (8023488 <etharp_tmr+0x14c>)
 8023434:	687a      	ldr	r2, [r7, #4]
 8023436:	4613      	mov	r3, r2
 8023438:	005b      	lsls	r3, r3, #1
 802343a:	4413      	add	r3, r2
 802343c:	00db      	lsls	r3, r3, #3
 802343e:	440b      	add	r3, r1
 8023440:	3314      	adds	r3, #20
 8023442:	781b      	ldrb	r3, [r3, #0]
 8023444:	2b01      	cmp	r3, #1
 8023446:	d113      	bne.n	8023470 <etharp_tmr+0x134>
        /* still pending, resend an ARP query */
        etharp_request(arp_table[i].netif, &arp_table[i].ipaddr);
 8023448:	490f      	ldr	r1, [pc, #60]	@ (8023488 <etharp_tmr+0x14c>)
 802344a:	687a      	ldr	r2, [r7, #4]
 802344c:	4613      	mov	r3, r2
 802344e:	005b      	lsls	r3, r3, #1
 8023450:	4413      	add	r3, r2
 8023452:	00db      	lsls	r3, r3, #3
 8023454:	440b      	add	r3, r1
 8023456:	3308      	adds	r3, #8
 8023458:	6818      	ldr	r0, [r3, #0]
 802345a:	687a      	ldr	r2, [r7, #4]
 802345c:	4613      	mov	r3, r2
 802345e:	005b      	lsls	r3, r3, #1
 8023460:	4413      	add	r3, r2
 8023462:	00db      	lsls	r3, r3, #3
 8023464:	4a08      	ldr	r2, [pc, #32]	@ (8023488 <etharp_tmr+0x14c>)
 8023466:	4413      	add	r3, r2
 8023468:	3304      	adds	r3, #4
 802346a:	4619      	mov	r1, r3
 802346c:	f000 fe76 	bl	802415c <etharp_request>
  for (i = 0; i < ARP_TABLE_SIZE; ++i) {
 8023470:	687b      	ldr	r3, [r7, #4]
 8023472:	3301      	adds	r3, #1
 8023474:	607b      	str	r3, [r7, #4]
 8023476:	687b      	ldr	r3, [r7, #4]
 8023478:	2b09      	cmp	r3, #9
 802347a:	f77f af65 	ble.w	8023348 <etharp_tmr+0xc>
      }
    }
  }
}
 802347e:	bf00      	nop
 8023480:	bf00      	nop
 8023482:	3708      	adds	r7, #8
 8023484:	46bd      	mov	sp, r7
 8023486:	bd80      	pop	{r7, pc}
 8023488:	2402a084 	.word	0x2402a084

0802348c <etharp_find_entry>:
 * @return The ARP entry index that matched or is created, ERR_MEM if no
 * entry is found or could be recycled.
 */
static s16_t
etharp_find_entry(const ip4_addr_t *ipaddr, u8_t flags, struct netif *netif)
{
 802348c:	b580      	push	{r7, lr}
 802348e:	b08a      	sub	sp, #40	@ 0x28
 8023490:	af00      	add	r7, sp, #0
 8023492:	60f8      	str	r0, [r7, #12]
 8023494:	460b      	mov	r3, r1
 8023496:	607a      	str	r2, [r7, #4]
 8023498:	72fb      	strb	r3, [r7, #11]
  s16_t old_pending = ARP_TABLE_SIZE, old_stable = ARP_TABLE_SIZE;
 802349a:	230a      	movs	r3, #10
 802349c:	843b      	strh	r3, [r7, #32]
 802349e:	230a      	movs	r3, #10
 80234a0:	847b      	strh	r3, [r7, #34]	@ 0x22
  s16_t empty = ARP_TABLE_SIZE;
 80234a2:	230a      	movs	r3, #10
 80234a4:	84bb      	strh	r3, [r7, #36]	@ 0x24
  s16_t i = 0;
 80234a6:	2300      	movs	r3, #0
 80234a8:	84fb      	strh	r3, [r7, #38]	@ 0x26
  /* oldest entry with packets on queue */
  s16_t old_queue = ARP_TABLE_SIZE;
 80234aa:	230a      	movs	r3, #10
 80234ac:	83fb      	strh	r3, [r7, #30]
  /* its age */
  u16_t age_queue = 0, age_pending = 0, age_stable = 0;
 80234ae:	2300      	movs	r3, #0
 80234b0:	83bb      	strh	r3, [r7, #28]
 80234b2:	2300      	movs	r3, #0
 80234b4:	837b      	strh	r3, [r7, #26]
 80234b6:	2300      	movs	r3, #0
 80234b8:	833b      	strh	r3, [r7, #24]
   * 4) remember the oldest pending entry with queued packets (if any)
   * 5) search for a matching IP entry, either pending or stable
   *    until 5 matches, or all entries are searched for.
   */

  for (i = 0; i < ARP_TABLE_SIZE; ++i) {
 80234ba:	2300      	movs	r3, #0
 80234bc:	84fb      	strh	r3, [r7, #38]	@ 0x26
 80234be:	e0ae      	b.n	802361e <etharp_find_entry+0x192>
    u8_t state = arp_table[i].state;
 80234c0:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 80234c4:	49a6      	ldr	r1, [pc, #664]	@ (8023760 <etharp_find_entry+0x2d4>)
 80234c6:	4613      	mov	r3, r2
 80234c8:	005b      	lsls	r3, r3, #1
 80234ca:	4413      	add	r3, r2
 80234cc:	00db      	lsls	r3, r3, #3
 80234ce:	440b      	add	r3, r1
 80234d0:	3314      	adds	r3, #20
 80234d2:	781b      	ldrb	r3, [r3, #0]
 80234d4:	75fb      	strb	r3, [r7, #23]
    /* no empty entry found yet and now we do find one? */
    if ((empty == ARP_TABLE_SIZE) && (state == ETHARP_STATE_EMPTY)) {
 80234d6:	f9b7 3024 	ldrsh.w	r3, [r7, #36]	@ 0x24
 80234da:	2b0a      	cmp	r3, #10
 80234dc:	d105      	bne.n	80234ea <etharp_find_entry+0x5e>
 80234de:	7dfb      	ldrb	r3, [r7, #23]
 80234e0:	2b00      	cmp	r3, #0
 80234e2:	d102      	bne.n	80234ea <etharp_find_entry+0x5e>
      LWIP_DEBUGF(ETHARP_DEBUG, ("etharp_find_entry: found empty entry %d\n", (int)i));
      /* remember first empty entry */
      empty = i;
 80234e4:	8cfb      	ldrh	r3, [r7, #38]	@ 0x26
 80234e6:	84bb      	strh	r3, [r7, #36]	@ 0x24
 80234e8:	e095      	b.n	8023616 <etharp_find_entry+0x18a>
    } else if (state != ETHARP_STATE_EMPTY) {
 80234ea:	7dfb      	ldrb	r3, [r7, #23]
 80234ec:	2b00      	cmp	r3, #0
 80234ee:	f000 8092 	beq.w	8023616 <etharp_find_entry+0x18a>
      LWIP_ASSERT("state == ETHARP_STATE_PENDING || state >= ETHARP_STATE_STABLE",
 80234f2:	7dfb      	ldrb	r3, [r7, #23]
 80234f4:	2b01      	cmp	r3, #1
 80234f6:	d009      	beq.n	802350c <etharp_find_entry+0x80>
 80234f8:	7dfb      	ldrb	r3, [r7, #23]
 80234fa:	2b01      	cmp	r3, #1
 80234fc:	d806      	bhi.n	802350c <etharp_find_entry+0x80>
 80234fe:	4b99      	ldr	r3, [pc, #612]	@ (8023764 <etharp_find_entry+0x2d8>)
 8023500:	f240 1223 	movw	r2, #291	@ 0x123
 8023504:	4998      	ldr	r1, [pc, #608]	@ (8023768 <etharp_find_entry+0x2dc>)
 8023506:	4899      	ldr	r0, [pc, #612]	@ (802376c <etharp_find_entry+0x2e0>)
 8023508:	f006 f800 	bl	802950c <iprintf>
                  state == ETHARP_STATE_PENDING || state >= ETHARP_STATE_STABLE);
      /* if given, does IP address match IP address in ARP entry? */
      if (ipaddr && ip4_addr_cmp(ipaddr, &arp_table[i].ipaddr)
 802350c:	68fb      	ldr	r3, [r7, #12]
 802350e:	2b00      	cmp	r3, #0
 8023510:	d020      	beq.n	8023554 <etharp_find_entry+0xc8>
 8023512:	68fb      	ldr	r3, [r7, #12]
 8023514:	6819      	ldr	r1, [r3, #0]
 8023516:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 802351a:	4891      	ldr	r0, [pc, #580]	@ (8023760 <etharp_find_entry+0x2d4>)
 802351c:	4613      	mov	r3, r2
 802351e:	005b      	lsls	r3, r3, #1
 8023520:	4413      	add	r3, r2
 8023522:	00db      	lsls	r3, r3, #3
 8023524:	4403      	add	r3, r0
 8023526:	3304      	adds	r3, #4
 8023528:	681b      	ldr	r3, [r3, #0]
 802352a:	4299      	cmp	r1, r3
 802352c:	d112      	bne.n	8023554 <etharp_find_entry+0xc8>
#if ETHARP_TABLE_MATCH_NETIF
          && ((netif == NULL) || (netif == arp_table[i].netif))
 802352e:	687b      	ldr	r3, [r7, #4]
 8023530:	2b00      	cmp	r3, #0
 8023532:	d00c      	beq.n	802354e <etharp_find_entry+0xc2>
 8023534:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 8023538:	4989      	ldr	r1, [pc, #548]	@ (8023760 <etharp_find_entry+0x2d4>)
 802353a:	4613      	mov	r3, r2
 802353c:	005b      	lsls	r3, r3, #1
 802353e:	4413      	add	r3, r2
 8023540:	00db      	lsls	r3, r3, #3
 8023542:	440b      	add	r3, r1
 8023544:	3308      	adds	r3, #8
 8023546:	681b      	ldr	r3, [r3, #0]
 8023548:	687a      	ldr	r2, [r7, #4]
 802354a:	429a      	cmp	r2, r3
 802354c:	d102      	bne.n	8023554 <etharp_find_entry+0xc8>
#endif /* ETHARP_TABLE_MATCH_NETIF */
         ) {
        LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_find_entry: found matching entry %d\n", (int)i));
        /* found exact IP address match, simply bail out */
        return i;
 802354e:	f9b7 3026 	ldrsh.w	r3, [r7, #38]	@ 0x26
 8023552:	e100      	b.n	8023756 <etharp_find_entry+0x2ca>
      }
      /* pending entry? */
      if (state == ETHARP_STATE_PENDING) {
 8023554:	7dfb      	ldrb	r3, [r7, #23]
 8023556:	2b01      	cmp	r3, #1
 8023558:	d140      	bne.n	80235dc <etharp_find_entry+0x150>
        /* pending with queued packets? */
        if (arp_table[i].q != NULL) {
 802355a:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 802355e:	4980      	ldr	r1, [pc, #512]	@ (8023760 <etharp_find_entry+0x2d4>)
 8023560:	4613      	mov	r3, r2
 8023562:	005b      	lsls	r3, r3, #1
 8023564:	4413      	add	r3, r2
 8023566:	00db      	lsls	r3, r3, #3
 8023568:	440b      	add	r3, r1
 802356a:	681b      	ldr	r3, [r3, #0]
 802356c:	2b00      	cmp	r3, #0
 802356e:	d01a      	beq.n	80235a6 <etharp_find_entry+0x11a>
          if (arp_table[i].ctime >= age_queue) {
 8023570:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 8023574:	497a      	ldr	r1, [pc, #488]	@ (8023760 <etharp_find_entry+0x2d4>)
 8023576:	4613      	mov	r3, r2
 8023578:	005b      	lsls	r3, r3, #1
 802357a:	4413      	add	r3, r2
 802357c:	00db      	lsls	r3, r3, #3
 802357e:	440b      	add	r3, r1
 8023580:	3312      	adds	r3, #18
 8023582:	881b      	ldrh	r3, [r3, #0]
 8023584:	8bba      	ldrh	r2, [r7, #28]
 8023586:	429a      	cmp	r2, r3
 8023588:	d845      	bhi.n	8023616 <etharp_find_entry+0x18a>
            old_queue = i;
 802358a:	8cfb      	ldrh	r3, [r7, #38]	@ 0x26
 802358c:	83fb      	strh	r3, [r7, #30]
            age_queue = arp_table[i].ctime;
 802358e:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 8023592:	4973      	ldr	r1, [pc, #460]	@ (8023760 <etharp_find_entry+0x2d4>)
 8023594:	4613      	mov	r3, r2
 8023596:	005b      	lsls	r3, r3, #1
 8023598:	4413      	add	r3, r2
 802359a:	00db      	lsls	r3, r3, #3
 802359c:	440b      	add	r3, r1
 802359e:	3312      	adds	r3, #18
 80235a0:	881b      	ldrh	r3, [r3, #0]
 80235a2:	83bb      	strh	r3, [r7, #28]
 80235a4:	e037      	b.n	8023616 <etharp_find_entry+0x18a>
          }
        } else
          /* pending without queued packets? */
        {
          if (arp_table[i].ctime >= age_pending) {
 80235a6:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 80235aa:	496d      	ldr	r1, [pc, #436]	@ (8023760 <etharp_find_entry+0x2d4>)
 80235ac:	4613      	mov	r3, r2
 80235ae:	005b      	lsls	r3, r3, #1
 80235b0:	4413      	add	r3, r2
 80235b2:	00db      	lsls	r3, r3, #3
 80235b4:	440b      	add	r3, r1
 80235b6:	3312      	adds	r3, #18
 80235b8:	881b      	ldrh	r3, [r3, #0]
 80235ba:	8b7a      	ldrh	r2, [r7, #26]
 80235bc:	429a      	cmp	r2, r3
 80235be:	d82a      	bhi.n	8023616 <etharp_find_entry+0x18a>
            old_pending = i;
 80235c0:	8cfb      	ldrh	r3, [r7, #38]	@ 0x26
 80235c2:	843b      	strh	r3, [r7, #32]
            age_pending = arp_table[i].ctime;
 80235c4:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 80235c8:	4965      	ldr	r1, [pc, #404]	@ (8023760 <etharp_find_entry+0x2d4>)
 80235ca:	4613      	mov	r3, r2
 80235cc:	005b      	lsls	r3, r3, #1
 80235ce:	4413      	add	r3, r2
 80235d0:	00db      	lsls	r3, r3, #3
 80235d2:	440b      	add	r3, r1
 80235d4:	3312      	adds	r3, #18
 80235d6:	881b      	ldrh	r3, [r3, #0]
 80235d8:	837b      	strh	r3, [r7, #26]
 80235da:	e01c      	b.n	8023616 <etharp_find_entry+0x18a>
          }
        }
        /* stable entry? */
      } else if (state >= ETHARP_STATE_STABLE) {
 80235dc:	7dfb      	ldrb	r3, [r7, #23]
 80235de:	2b01      	cmp	r3, #1
 80235e0:	d919      	bls.n	8023616 <etharp_find_entry+0x18a>
        /* don't record old_stable for static entries since they never expire */
        if (state < ETHARP_STATE_STATIC)
#endif /* ETHARP_SUPPORT_STATIC_ENTRIES */
        {
          /* remember entry with oldest stable entry in oldest, its age in maxtime */
          if (arp_table[i].ctime >= age_stable) {
 80235e2:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 80235e6:	495e      	ldr	r1, [pc, #376]	@ (8023760 <etharp_find_entry+0x2d4>)
 80235e8:	4613      	mov	r3, r2
 80235ea:	005b      	lsls	r3, r3, #1
 80235ec:	4413      	add	r3, r2
 80235ee:	00db      	lsls	r3, r3, #3
 80235f0:	440b      	add	r3, r1
 80235f2:	3312      	adds	r3, #18
 80235f4:	881b      	ldrh	r3, [r3, #0]
 80235f6:	8b3a      	ldrh	r2, [r7, #24]
 80235f8:	429a      	cmp	r2, r3
 80235fa:	d80c      	bhi.n	8023616 <etharp_find_entry+0x18a>
            old_stable = i;
 80235fc:	8cfb      	ldrh	r3, [r7, #38]	@ 0x26
 80235fe:	847b      	strh	r3, [r7, #34]	@ 0x22
            age_stable = arp_table[i].ctime;
 8023600:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 8023604:	4956      	ldr	r1, [pc, #344]	@ (8023760 <etharp_find_entry+0x2d4>)
 8023606:	4613      	mov	r3, r2
 8023608:	005b      	lsls	r3, r3, #1
 802360a:	4413      	add	r3, r2
 802360c:	00db      	lsls	r3, r3, #3
 802360e:	440b      	add	r3, r1
 8023610:	3312      	adds	r3, #18
 8023612:	881b      	ldrh	r3, [r3, #0]
 8023614:	833b      	strh	r3, [r7, #24]
  for (i = 0; i < ARP_TABLE_SIZE; ++i) {
 8023616:	8cfb      	ldrh	r3, [r7, #38]	@ 0x26
 8023618:	3301      	adds	r3, #1
 802361a:	b29b      	uxth	r3, r3
 802361c:	84fb      	strh	r3, [r7, #38]	@ 0x26
 802361e:	f9b7 3026 	ldrsh.w	r3, [r7, #38]	@ 0x26
 8023622:	2b09      	cmp	r3, #9
 8023624:	f77f af4c 	ble.w	80234c0 <etharp_find_entry+0x34>
    }
  }
  /* { we have no match } => try to create a new entry */

  /* don't create new entry, only search? */
  if (((flags & ETHARP_FLAG_FIND_ONLY) != 0) ||
 8023628:	7afb      	ldrb	r3, [r7, #11]
 802362a:	f003 0302 	and.w	r3, r3, #2
 802362e:	2b00      	cmp	r3, #0
 8023630:	d108      	bne.n	8023644 <etharp_find_entry+0x1b8>
 8023632:	f9b7 3024 	ldrsh.w	r3, [r7, #36]	@ 0x24
 8023636:	2b0a      	cmp	r3, #10
 8023638:	d107      	bne.n	802364a <etharp_find_entry+0x1be>
      /* or no empty entry found and not allowed to recycle? */
      ((empty == ARP_TABLE_SIZE) && ((flags & ETHARP_FLAG_TRY_HARD) == 0))) {
 802363a:	7afb      	ldrb	r3, [r7, #11]
 802363c:	f003 0301 	and.w	r3, r3, #1
 8023640:	2b00      	cmp	r3, #0
 8023642:	d102      	bne.n	802364a <etharp_find_entry+0x1be>
    LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_find_entry: no empty entry found and not allowed to recycle\n"));
    return (s16_t)ERR_MEM;
 8023644:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8023648:	e085      	b.n	8023756 <etharp_find_entry+0x2ca>
   *
   * { ETHARP_FLAG_TRY_HARD is set at this point }
   */

  /* 1) empty entry available? */
  if (empty < ARP_TABLE_SIZE) {
 802364a:	f9b7 3024 	ldrsh.w	r3, [r7, #36]	@ 0x24
 802364e:	2b09      	cmp	r3, #9
 8023650:	dc02      	bgt.n	8023658 <etharp_find_entry+0x1cc>
    i = empty;
 8023652:	8cbb      	ldrh	r3, [r7, #36]	@ 0x24
 8023654:	84fb      	strh	r3, [r7, #38]	@ 0x26
 8023656:	e039      	b.n	80236cc <etharp_find_entry+0x240>
    LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_find_entry: selecting empty entry %d\n", (int)i));
  } else {
    /* 2) found recyclable stable entry? */
    if (old_stable < ARP_TABLE_SIZE) {
 8023658:	f9b7 3022 	ldrsh.w	r3, [r7, #34]	@ 0x22
 802365c:	2b09      	cmp	r3, #9
 802365e:	dc14      	bgt.n	802368a <etharp_find_entry+0x1fe>
      /* recycle oldest stable*/
      i = old_stable;
 8023660:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 8023662:	84fb      	strh	r3, [r7, #38]	@ 0x26
      LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_find_entry: selecting oldest stable entry %d\n", (int)i));
      /* no queued packets should exist on stable entries */
      LWIP_ASSERT("arp_table[i].q == NULL", arp_table[i].q == NULL);
 8023664:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 8023668:	493d      	ldr	r1, [pc, #244]	@ (8023760 <etharp_find_entry+0x2d4>)
 802366a:	4613      	mov	r3, r2
 802366c:	005b      	lsls	r3, r3, #1
 802366e:	4413      	add	r3, r2
 8023670:	00db      	lsls	r3, r3, #3
 8023672:	440b      	add	r3, r1
 8023674:	681b      	ldr	r3, [r3, #0]
 8023676:	2b00      	cmp	r3, #0
 8023678:	d018      	beq.n	80236ac <etharp_find_entry+0x220>
 802367a:	4b3a      	ldr	r3, [pc, #232]	@ (8023764 <etharp_find_entry+0x2d8>)
 802367c:	f240 126d 	movw	r2, #365	@ 0x16d
 8023680:	493b      	ldr	r1, [pc, #236]	@ (8023770 <etharp_find_entry+0x2e4>)
 8023682:	483a      	ldr	r0, [pc, #232]	@ (802376c <etharp_find_entry+0x2e0>)
 8023684:	f005 ff42 	bl	802950c <iprintf>
 8023688:	e010      	b.n	80236ac <etharp_find_entry+0x220>
      /* 3) found recyclable pending entry without queued packets? */
    } else if (old_pending < ARP_TABLE_SIZE) {
 802368a:	f9b7 3020 	ldrsh.w	r3, [r7, #32]
 802368e:	2b09      	cmp	r3, #9
 8023690:	dc02      	bgt.n	8023698 <etharp_find_entry+0x20c>
      /* recycle oldest pending */
      i = old_pending;
 8023692:	8c3b      	ldrh	r3, [r7, #32]
 8023694:	84fb      	strh	r3, [r7, #38]	@ 0x26
 8023696:	e009      	b.n	80236ac <etharp_find_entry+0x220>
      LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_find_entry: selecting oldest pending entry %d (without queue)\n", (int)i));
      /* 4) found recyclable pending entry with queued packets? */
    } else if (old_queue < ARP_TABLE_SIZE) {
 8023698:	f9b7 301e 	ldrsh.w	r3, [r7, #30]
 802369c:	2b09      	cmp	r3, #9
 802369e:	dc02      	bgt.n	80236a6 <etharp_find_entry+0x21a>
      /* recycle oldest pending (queued packets are free in etharp_free_entry) */
      i = old_queue;
 80236a0:	8bfb      	ldrh	r3, [r7, #30]
 80236a2:	84fb      	strh	r3, [r7, #38]	@ 0x26
 80236a4:	e002      	b.n	80236ac <etharp_find_entry+0x220>
      LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_find_entry: selecting oldest pending entry %d, freeing packet queue %p\n", (int)i, (void *)(arp_table[i].q)));
      /* no empty or recyclable entries found */
    } else {
      LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_find_entry: no empty or recyclable entries found\n"));
      return (s16_t)ERR_MEM;
 80236a6:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80236aa:	e054      	b.n	8023756 <etharp_find_entry+0x2ca>
    }

    /* { empty or recyclable entry found } */
    LWIP_ASSERT("i < ARP_TABLE_SIZE", i < ARP_TABLE_SIZE);
 80236ac:	f9b7 3026 	ldrsh.w	r3, [r7, #38]	@ 0x26
 80236b0:	2b09      	cmp	r3, #9
 80236b2:	dd06      	ble.n	80236c2 <etharp_find_entry+0x236>
 80236b4:	4b2b      	ldr	r3, [pc, #172]	@ (8023764 <etharp_find_entry+0x2d8>)
 80236b6:	f240 127f 	movw	r2, #383	@ 0x17f
 80236ba:	492e      	ldr	r1, [pc, #184]	@ (8023774 <etharp_find_entry+0x2e8>)
 80236bc:	482b      	ldr	r0, [pc, #172]	@ (802376c <etharp_find_entry+0x2e0>)
 80236be:	f005 ff25 	bl	802950c <iprintf>
    etharp_free_entry(i);
 80236c2:	f9b7 3026 	ldrsh.w	r3, [r7, #38]	@ 0x26
 80236c6:	4618      	mov	r0, r3
 80236c8:	f7ff fdd8 	bl	802327c <etharp_free_entry>
  }

  LWIP_ASSERT("i < ARP_TABLE_SIZE", i < ARP_TABLE_SIZE);
 80236cc:	f9b7 3026 	ldrsh.w	r3, [r7, #38]	@ 0x26
 80236d0:	2b09      	cmp	r3, #9
 80236d2:	dd06      	ble.n	80236e2 <etharp_find_entry+0x256>
 80236d4:	4b23      	ldr	r3, [pc, #140]	@ (8023764 <etharp_find_entry+0x2d8>)
 80236d6:	f240 1283 	movw	r2, #387	@ 0x183
 80236da:	4926      	ldr	r1, [pc, #152]	@ (8023774 <etharp_find_entry+0x2e8>)
 80236dc:	4823      	ldr	r0, [pc, #140]	@ (802376c <etharp_find_entry+0x2e0>)
 80236de:	f005 ff15 	bl	802950c <iprintf>
  LWIP_ASSERT("arp_table[i].state == ETHARP_STATE_EMPTY",
 80236e2:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 80236e6:	491e      	ldr	r1, [pc, #120]	@ (8023760 <etharp_find_entry+0x2d4>)
 80236e8:	4613      	mov	r3, r2
 80236ea:	005b      	lsls	r3, r3, #1
 80236ec:	4413      	add	r3, r2
 80236ee:	00db      	lsls	r3, r3, #3
 80236f0:	440b      	add	r3, r1
 80236f2:	3314      	adds	r3, #20
 80236f4:	781b      	ldrb	r3, [r3, #0]
 80236f6:	2b00      	cmp	r3, #0
 80236f8:	d006      	beq.n	8023708 <etharp_find_entry+0x27c>
 80236fa:	4b1a      	ldr	r3, [pc, #104]	@ (8023764 <etharp_find_entry+0x2d8>)
 80236fc:	f44f 72c2 	mov.w	r2, #388	@ 0x184
 8023700:	491d      	ldr	r1, [pc, #116]	@ (8023778 <etharp_find_entry+0x2ec>)
 8023702:	481a      	ldr	r0, [pc, #104]	@ (802376c <etharp_find_entry+0x2e0>)
 8023704:	f005 ff02 	bl	802950c <iprintf>
              arp_table[i].state == ETHARP_STATE_EMPTY);

  /* IP address given? */
  if (ipaddr != NULL) {
 8023708:	68fb      	ldr	r3, [r7, #12]
 802370a:	2b00      	cmp	r3, #0
 802370c:	d00b      	beq.n	8023726 <etharp_find_entry+0x29a>
    /* set IP address */
    ip4_addr_copy(arp_table[i].ipaddr, *ipaddr);
 802370e:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 8023712:	68fb      	ldr	r3, [r7, #12]
 8023714:	6819      	ldr	r1, [r3, #0]
 8023716:	4812      	ldr	r0, [pc, #72]	@ (8023760 <etharp_find_entry+0x2d4>)
 8023718:	4613      	mov	r3, r2
 802371a:	005b      	lsls	r3, r3, #1
 802371c:	4413      	add	r3, r2
 802371e:	00db      	lsls	r3, r3, #3
 8023720:	4403      	add	r3, r0
 8023722:	3304      	adds	r3, #4
 8023724:	6019      	str	r1, [r3, #0]
  }
  arp_table[i].ctime = 0;
 8023726:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 802372a:	490d      	ldr	r1, [pc, #52]	@ (8023760 <etharp_find_entry+0x2d4>)
 802372c:	4613      	mov	r3, r2
 802372e:	005b      	lsls	r3, r3, #1
 8023730:	4413      	add	r3, r2
 8023732:	00db      	lsls	r3, r3, #3
 8023734:	440b      	add	r3, r1
 8023736:	3312      	adds	r3, #18
 8023738:	2200      	movs	r2, #0
 802373a:	801a      	strh	r2, [r3, #0]
#if ETHARP_TABLE_MATCH_NETIF
  arp_table[i].netif = netif;
 802373c:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 8023740:	4907      	ldr	r1, [pc, #28]	@ (8023760 <etharp_find_entry+0x2d4>)
 8023742:	4613      	mov	r3, r2
 8023744:	005b      	lsls	r3, r3, #1
 8023746:	4413      	add	r3, r2
 8023748:	00db      	lsls	r3, r3, #3
 802374a:	440b      	add	r3, r1
 802374c:	3308      	adds	r3, #8
 802374e:	687a      	ldr	r2, [r7, #4]
 8023750:	601a      	str	r2, [r3, #0]
#endif /* ETHARP_TABLE_MATCH_NETIF */
  return (s16_t)i;
 8023752:	f9b7 3026 	ldrsh.w	r3, [r7, #38]	@ 0x26
}
 8023756:	4618      	mov	r0, r3
 8023758:	3728      	adds	r7, #40	@ 0x28
 802375a:	46bd      	mov	sp, r7
 802375c:	bd80      	pop	{r7, pc}
 802375e:	bf00      	nop
 8023760:	2402a084 	.word	0x2402a084
 8023764:	0802fd88 	.word	0x0802fd88
 8023768:	0802fdc0 	.word	0x0802fdc0
 802376c:	0802fe00 	.word	0x0802fe00
 8023770:	0802fe28 	.word	0x0802fe28
 8023774:	0802fe40 	.word	0x0802fe40
 8023778:	0802fe54 	.word	0x0802fe54

0802377c <etharp_update_arp_entry>:
 *
 * @see pbuf_free()
 */
static err_t
etharp_update_arp_entry(struct netif *netif, const ip4_addr_t *ipaddr, struct eth_addr *ethaddr, u8_t flags)
{
 802377c:	b580      	push	{r7, lr}
 802377e:	b088      	sub	sp, #32
 8023780:	af02      	add	r7, sp, #8
 8023782:	60f8      	str	r0, [r7, #12]
 8023784:	60b9      	str	r1, [r7, #8]
 8023786:	607a      	str	r2, [r7, #4]
 8023788:	70fb      	strb	r3, [r7, #3]
  s16_t i;
  LWIP_ASSERT("netif->hwaddr_len == ETH_HWADDR_LEN", netif->hwaddr_len == ETH_HWADDR_LEN);
 802378a:	68fb      	ldr	r3, [r7, #12]
 802378c:	f893 3030 	ldrb.w	r3, [r3, #48]	@ 0x30
 8023790:	2b06      	cmp	r3, #6
 8023792:	d006      	beq.n	80237a2 <etharp_update_arp_entry+0x26>
 8023794:	4b48      	ldr	r3, [pc, #288]	@ (80238b8 <etharp_update_arp_entry+0x13c>)
 8023796:	f240 12a9 	movw	r2, #425	@ 0x1a9
 802379a:	4948      	ldr	r1, [pc, #288]	@ (80238bc <etharp_update_arp_entry+0x140>)
 802379c:	4848      	ldr	r0, [pc, #288]	@ (80238c0 <etharp_update_arp_entry+0x144>)
 802379e:	f005 feb5 	bl	802950c <iprintf>
  LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_update_arp_entry: %"U16_F".%"U16_F".%"U16_F".%"U16_F" - %02"X16_F":%02"X16_F":%02"X16_F":%02"X16_F":%02"X16_F":%02"X16_F"\n",
              ip4_addr1_16(ipaddr), ip4_addr2_16(ipaddr), ip4_addr3_16(ipaddr), ip4_addr4_16(ipaddr),
              (u16_t)ethaddr->addr[0], (u16_t)ethaddr->addr[1], (u16_t)ethaddr->addr[2],
              (u16_t)ethaddr->addr[3], (u16_t)ethaddr->addr[4], (u16_t)ethaddr->addr[5]));
  /* non-unicast address? */
  if (ip4_addr_isany(ipaddr) ||
 80237a2:	68bb      	ldr	r3, [r7, #8]
 80237a4:	2b00      	cmp	r3, #0
 80237a6:	d012      	beq.n	80237ce <etharp_update_arp_entry+0x52>
 80237a8:	68bb      	ldr	r3, [r7, #8]
 80237aa:	681b      	ldr	r3, [r3, #0]
 80237ac:	2b00      	cmp	r3, #0
 80237ae:	d00e      	beq.n	80237ce <etharp_update_arp_entry+0x52>
      ip4_addr_isbroadcast(ipaddr, netif) ||
 80237b0:	68bb      	ldr	r3, [r7, #8]
 80237b2:	681b      	ldr	r3, [r3, #0]
 80237b4:	68f9      	ldr	r1, [r7, #12]
 80237b6:	4618      	mov	r0, r3
 80237b8:	f001 f952 	bl	8024a60 <ip4_addr_isbroadcast_u32>
 80237bc:	4603      	mov	r3, r0
  if (ip4_addr_isany(ipaddr) ||
 80237be:	2b00      	cmp	r3, #0
 80237c0:	d105      	bne.n	80237ce <etharp_update_arp_entry+0x52>
      ip4_addr_ismulticast(ipaddr)) {
 80237c2:	68bb      	ldr	r3, [r7, #8]
 80237c4:	681b      	ldr	r3, [r3, #0]
 80237c6:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
      ip4_addr_isbroadcast(ipaddr, netif) ||
 80237ca:	2be0      	cmp	r3, #224	@ 0xe0
 80237cc:	d102      	bne.n	80237d4 <etharp_update_arp_entry+0x58>
    LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_update_arp_entry: will not add non-unicast IP address to ARP cache\n"));
    return ERR_ARG;
 80237ce:	f06f 030f 	mvn.w	r3, #15
 80237d2:	e06c      	b.n	80238ae <etharp_update_arp_entry+0x132>
  }
  /* find or create ARP entry */
  i = etharp_find_entry(ipaddr, flags, netif);
 80237d4:	78fb      	ldrb	r3, [r7, #3]
 80237d6:	68fa      	ldr	r2, [r7, #12]
 80237d8:	4619      	mov	r1, r3
 80237da:	68b8      	ldr	r0, [r7, #8]
 80237dc:	f7ff fe56 	bl	802348c <etharp_find_entry>
 80237e0:	4603      	mov	r3, r0
 80237e2:	82fb      	strh	r3, [r7, #22]
  /* bail out if no entry could be found */
  if (i < 0) {
 80237e4:	f9b7 3016 	ldrsh.w	r3, [r7, #22]
 80237e8:	2b00      	cmp	r3, #0
 80237ea:	da02      	bge.n	80237f2 <etharp_update_arp_entry+0x76>
    return (err_t)i;
 80237ec:	8afb      	ldrh	r3, [r7, #22]
 80237ee:	b25b      	sxtb	r3, r3
 80237f0:	e05d      	b.n	80238ae <etharp_update_arp_entry+0x132>
    return ERR_VAL;
  } else
#endif /* ETHARP_SUPPORT_STATIC_ENTRIES */
  {
    /* mark it stable */
    arp_table[i].state = ETHARP_STATE_STABLE;
 80237f2:	f9b7 2016 	ldrsh.w	r2, [r7, #22]
 80237f6:	4933      	ldr	r1, [pc, #204]	@ (80238c4 <etharp_update_arp_entry+0x148>)
 80237f8:	4613      	mov	r3, r2
 80237fa:	005b      	lsls	r3, r3, #1
 80237fc:	4413      	add	r3, r2
 80237fe:	00db      	lsls	r3, r3, #3
 8023800:	440b      	add	r3, r1
 8023802:	3314      	adds	r3, #20
 8023804:	2202      	movs	r2, #2
 8023806:	701a      	strb	r2, [r3, #0]
  }

  /* record network interface */
  arp_table[i].netif = netif;
 8023808:	f9b7 2016 	ldrsh.w	r2, [r7, #22]
 802380c:	492d      	ldr	r1, [pc, #180]	@ (80238c4 <etharp_update_arp_entry+0x148>)
 802380e:	4613      	mov	r3, r2
 8023810:	005b      	lsls	r3, r3, #1
 8023812:	4413      	add	r3, r2
 8023814:	00db      	lsls	r3, r3, #3
 8023816:	440b      	add	r3, r1
 8023818:	3308      	adds	r3, #8
 802381a:	68fa      	ldr	r2, [r7, #12]
 802381c:	601a      	str	r2, [r3, #0]
  /* insert in SNMP ARP index tree */
  mib2_add_arp_entry(netif, &arp_table[i].ipaddr);

  LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_update_arp_entry: updating stable entry %"S16_F"\n", i));
  /* update address */
  SMEMCPY(&arp_table[i].ethaddr, ethaddr, ETH_HWADDR_LEN);
 802381e:	f9b7 2016 	ldrsh.w	r2, [r7, #22]
 8023822:	4613      	mov	r3, r2
 8023824:	005b      	lsls	r3, r3, #1
 8023826:	4413      	add	r3, r2
 8023828:	00db      	lsls	r3, r3, #3
 802382a:	3308      	adds	r3, #8
 802382c:	4a25      	ldr	r2, [pc, #148]	@ (80238c4 <etharp_update_arp_entry+0x148>)
 802382e:	4413      	add	r3, r2
 8023830:	3304      	adds	r3, #4
 8023832:	2206      	movs	r2, #6
 8023834:	6879      	ldr	r1, [r7, #4]
 8023836:	4618      	mov	r0, r3
 8023838:	f006 f8f1 	bl	8029a1e <memcpy>
  /* reset time stamp */
  arp_table[i].ctime = 0;
 802383c:	f9b7 2016 	ldrsh.w	r2, [r7, #22]
 8023840:	4920      	ldr	r1, [pc, #128]	@ (80238c4 <etharp_update_arp_entry+0x148>)
 8023842:	4613      	mov	r3, r2
 8023844:	005b      	lsls	r3, r3, #1
 8023846:	4413      	add	r3, r2
 8023848:	00db      	lsls	r3, r3, #3
 802384a:	440b      	add	r3, r1
 802384c:	3312      	adds	r3, #18
 802384e:	2200      	movs	r2, #0
 8023850:	801a      	strh	r2, [r3, #0]
    /* get the packet pointer */
    p = q->p;
    /* now queue entry can be freed */
    memp_free(MEMP_ARP_QUEUE, q);
#else /* ARP_QUEUEING */
  if (arp_table[i].q != NULL) {
 8023852:	f9b7 2016 	ldrsh.w	r2, [r7, #22]
 8023856:	491b      	ldr	r1, [pc, #108]	@ (80238c4 <etharp_update_arp_entry+0x148>)
 8023858:	4613      	mov	r3, r2
 802385a:	005b      	lsls	r3, r3, #1
 802385c:	4413      	add	r3, r2
 802385e:	00db      	lsls	r3, r3, #3
 8023860:	440b      	add	r3, r1
 8023862:	681b      	ldr	r3, [r3, #0]
 8023864:	2b00      	cmp	r3, #0
 8023866:	d021      	beq.n	80238ac <etharp_update_arp_entry+0x130>
    struct pbuf *p = arp_table[i].q;
 8023868:	f9b7 2016 	ldrsh.w	r2, [r7, #22]
 802386c:	4915      	ldr	r1, [pc, #84]	@ (80238c4 <etharp_update_arp_entry+0x148>)
 802386e:	4613      	mov	r3, r2
 8023870:	005b      	lsls	r3, r3, #1
 8023872:	4413      	add	r3, r2
 8023874:	00db      	lsls	r3, r3, #3
 8023876:	440b      	add	r3, r1
 8023878:	681b      	ldr	r3, [r3, #0]
 802387a:	613b      	str	r3, [r7, #16]
    arp_table[i].q = NULL;
 802387c:	f9b7 2016 	ldrsh.w	r2, [r7, #22]
 8023880:	4910      	ldr	r1, [pc, #64]	@ (80238c4 <etharp_update_arp_entry+0x148>)
 8023882:	4613      	mov	r3, r2
 8023884:	005b      	lsls	r3, r3, #1
 8023886:	4413      	add	r3, r2
 8023888:	00db      	lsls	r3, r3, #3
 802388a:	440b      	add	r3, r1
 802388c:	2200      	movs	r2, #0
 802388e:	601a      	str	r2, [r3, #0]
#endif /* ARP_QUEUEING */
    /* send the queued IP packet */
    ethernet_output(netif, p, (struct eth_addr *)(netif->hwaddr), ethaddr, ETHTYPE_IP);
 8023890:	68fb      	ldr	r3, [r7, #12]
 8023892:	f103 022a 	add.w	r2, r3, #42	@ 0x2a
 8023896:	f44f 6300 	mov.w	r3, #2048	@ 0x800
 802389a:	9300      	str	r3, [sp, #0]
 802389c:	687b      	ldr	r3, [r7, #4]
 802389e:	6939      	ldr	r1, [r7, #16]
 80238a0:	68f8      	ldr	r0, [r7, #12]
 80238a2:	f002 f9bb 	bl	8025c1c <ethernet_output>
    /* free the queued IP packet */
    pbuf_free(p);
 80238a6:	6938      	ldr	r0, [r7, #16]
 80238a8:	f7f6 fbb8 	bl	801a01c <pbuf_free>
  }
  return ERR_OK;
 80238ac:	2300      	movs	r3, #0
}
 80238ae:	4618      	mov	r0, r3
 80238b0:	3718      	adds	r7, #24
 80238b2:	46bd      	mov	sp, r7
 80238b4:	bd80      	pop	{r7, pc}
 80238b6:	bf00      	nop
 80238b8:	0802fd88 	.word	0x0802fd88
 80238bc:	0802fe80 	.word	0x0802fe80
 80238c0:	0802fe00 	.word	0x0802fe00
 80238c4:	2402a084 	.word	0x2402a084

080238c8 <etharp_cleanup_netif>:
 *
 * @param netif points to a network interface
 */
void
etharp_cleanup_netif(struct netif *netif)
{
 80238c8:	b580      	push	{r7, lr}
 80238ca:	b084      	sub	sp, #16
 80238cc:	af00      	add	r7, sp, #0
 80238ce:	6078      	str	r0, [r7, #4]
  int i;

  for (i = 0; i < ARP_TABLE_SIZE; ++i) {
 80238d0:	2300      	movs	r3, #0
 80238d2:	60fb      	str	r3, [r7, #12]
 80238d4:	e01e      	b.n	8023914 <etharp_cleanup_netif+0x4c>
    u8_t state = arp_table[i].state;
 80238d6:	4913      	ldr	r1, [pc, #76]	@ (8023924 <etharp_cleanup_netif+0x5c>)
 80238d8:	68fa      	ldr	r2, [r7, #12]
 80238da:	4613      	mov	r3, r2
 80238dc:	005b      	lsls	r3, r3, #1
 80238de:	4413      	add	r3, r2
 80238e0:	00db      	lsls	r3, r3, #3
 80238e2:	440b      	add	r3, r1
 80238e4:	3314      	adds	r3, #20
 80238e6:	781b      	ldrb	r3, [r3, #0]
 80238e8:	72fb      	strb	r3, [r7, #11]
    if ((state != ETHARP_STATE_EMPTY) && (arp_table[i].netif == netif)) {
 80238ea:	7afb      	ldrb	r3, [r7, #11]
 80238ec:	2b00      	cmp	r3, #0
 80238ee:	d00e      	beq.n	802390e <etharp_cleanup_netif+0x46>
 80238f0:	490c      	ldr	r1, [pc, #48]	@ (8023924 <etharp_cleanup_netif+0x5c>)
 80238f2:	68fa      	ldr	r2, [r7, #12]
 80238f4:	4613      	mov	r3, r2
 80238f6:	005b      	lsls	r3, r3, #1
 80238f8:	4413      	add	r3, r2
 80238fa:	00db      	lsls	r3, r3, #3
 80238fc:	440b      	add	r3, r1
 80238fe:	3308      	adds	r3, #8
 8023900:	681b      	ldr	r3, [r3, #0]
 8023902:	687a      	ldr	r2, [r7, #4]
 8023904:	429a      	cmp	r2, r3
 8023906:	d102      	bne.n	802390e <etharp_cleanup_netif+0x46>
      etharp_free_entry(i);
 8023908:	68f8      	ldr	r0, [r7, #12]
 802390a:	f7ff fcb7 	bl	802327c <etharp_free_entry>
  for (i = 0; i < ARP_TABLE_SIZE; ++i) {
 802390e:	68fb      	ldr	r3, [r7, #12]
 8023910:	3301      	adds	r3, #1
 8023912:	60fb      	str	r3, [r7, #12]
 8023914:	68fb      	ldr	r3, [r7, #12]
 8023916:	2b09      	cmp	r3, #9
 8023918:	dddd      	ble.n	80238d6 <etharp_cleanup_netif+0xe>
    }
  }
}
 802391a:	bf00      	nop
 802391c:	bf00      	nop
 802391e:	3710      	adds	r7, #16
 8023920:	46bd      	mov	sp, r7
 8023922:	bd80      	pop	{r7, pc}
 8023924:	2402a084 	.word	0x2402a084

08023928 <etharp_input>:
 *
 * @see pbuf_free()
 */
void
etharp_input(struct pbuf *p, struct netif *netif)
{
 8023928:	b5b0      	push	{r4, r5, r7, lr}
 802392a:	b08a      	sub	sp, #40	@ 0x28
 802392c:	af04      	add	r7, sp, #16
 802392e:	6078      	str	r0, [r7, #4]
 8023930:	6039      	str	r1, [r7, #0]
  struct etharp_hdr *hdr;
  /* these are aligned properly, whereas the ARP header fields might not be */
  ip4_addr_t sipaddr, dipaddr;
  u8_t for_us;

  LWIP_ASSERT_CORE_LOCKED();
 8023932:	f7ec fb9d 	bl	8010070 <sys_check_core_locking>

  LWIP_ERROR("netif != NULL", (netif != NULL), return;);
 8023936:	683b      	ldr	r3, [r7, #0]
 8023938:	2b00      	cmp	r3, #0
 802393a:	d107      	bne.n	802394c <etharp_input+0x24>
 802393c:	4b3f      	ldr	r3, [pc, #252]	@ (8023a3c <etharp_input+0x114>)
 802393e:	f240 228a 	movw	r2, #650	@ 0x28a
 8023942:	493f      	ldr	r1, [pc, #252]	@ (8023a40 <etharp_input+0x118>)
 8023944:	483f      	ldr	r0, [pc, #252]	@ (8023a44 <etharp_input+0x11c>)
 8023946:	f005 fde1 	bl	802950c <iprintf>
 802394a:	e074      	b.n	8023a36 <etharp_input+0x10e>

  hdr = (struct etharp_hdr *)p->payload;
 802394c:	687b      	ldr	r3, [r7, #4]
 802394e:	685b      	ldr	r3, [r3, #4]
 8023950:	617b      	str	r3, [r7, #20]

  /* RFC 826 "Packet Reception": */
  if ((hdr->hwtype != PP_HTONS(LWIP_IANA_HWTYPE_ETHERNET)) ||
 8023952:	697b      	ldr	r3, [r7, #20]
 8023954:	881b      	ldrh	r3, [r3, #0]
 8023956:	b29b      	uxth	r3, r3
 8023958:	f5b3 7f80 	cmp.w	r3, #256	@ 0x100
 802395c:	d10c      	bne.n	8023978 <etharp_input+0x50>
      (hdr->hwlen != ETH_HWADDR_LEN) ||
 802395e:	697b      	ldr	r3, [r7, #20]
 8023960:	791b      	ldrb	r3, [r3, #4]
  if ((hdr->hwtype != PP_HTONS(LWIP_IANA_HWTYPE_ETHERNET)) ||
 8023962:	2b06      	cmp	r3, #6
 8023964:	d108      	bne.n	8023978 <etharp_input+0x50>
      (hdr->protolen != sizeof(ip4_addr_t)) ||
 8023966:	697b      	ldr	r3, [r7, #20]
 8023968:	795b      	ldrb	r3, [r3, #5]
      (hdr->hwlen != ETH_HWADDR_LEN) ||
 802396a:	2b04      	cmp	r3, #4
 802396c:	d104      	bne.n	8023978 <etharp_input+0x50>
      (hdr->proto != PP_HTONS(ETHTYPE_IP)))  {
 802396e:	697b      	ldr	r3, [r7, #20]
 8023970:	885b      	ldrh	r3, [r3, #2]
 8023972:	b29b      	uxth	r3, r3
      (hdr->protolen != sizeof(ip4_addr_t)) ||
 8023974:	2b08      	cmp	r3, #8
 8023976:	d003      	beq.n	8023980 <etharp_input+0x58>
    LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING,
                ("etharp_input: packet dropped, wrong hw type, hwlen, proto, protolen or ethernet type (%"U16_F"/%"U16_F"/%"U16_F"/%"U16_F")\n",
                 hdr->hwtype, (u16_t)hdr->hwlen, hdr->proto, (u16_t)hdr->protolen));
    ETHARP_STATS_INC(etharp.proterr);
    ETHARP_STATS_INC(etharp.drop);
    pbuf_free(p);
 8023978:	6878      	ldr	r0, [r7, #4]
 802397a:	f7f6 fb4f 	bl	801a01c <pbuf_free>
    return;
 802397e:	e05a      	b.n	8023a36 <etharp_input+0x10e>
  autoip_arp_reply(netif, hdr);
#endif /* LWIP_AUTOIP */

  /* Copy struct ip4_addr_wordaligned to aligned ip4_addr, to support compilers without
   * structure packing (not using structure copy which breaks strict-aliasing rules). */
  IPADDR_WORDALIGNED_COPY_TO_IP4_ADDR_T(&sipaddr, &hdr->sipaddr);
 8023980:	697b      	ldr	r3, [r7, #20]
 8023982:	330e      	adds	r3, #14
 8023984:	681b      	ldr	r3, [r3, #0]
 8023986:	60fb      	str	r3, [r7, #12]
  IPADDR_WORDALIGNED_COPY_TO_IP4_ADDR_T(&dipaddr, &hdr->dipaddr);
 8023988:	697b      	ldr	r3, [r7, #20]
 802398a:	3318      	adds	r3, #24
 802398c:	681b      	ldr	r3, [r3, #0]
 802398e:	60bb      	str	r3, [r7, #8]

  /* this interface is not configured? */
  if (ip4_addr_isany_val(*netif_ip4_addr(netif))) {
 8023990:	683b      	ldr	r3, [r7, #0]
 8023992:	3304      	adds	r3, #4
 8023994:	681b      	ldr	r3, [r3, #0]
 8023996:	2b00      	cmp	r3, #0
 8023998:	d102      	bne.n	80239a0 <etharp_input+0x78>
    for_us = 0;
 802399a:	2300      	movs	r3, #0
 802399c:	74fb      	strb	r3, [r7, #19]
 802399e:	e009      	b.n	80239b4 <etharp_input+0x8c>
  } else {
    /* ARP packet directed to us? */
    for_us = (u8_t)ip4_addr_cmp(&dipaddr, netif_ip4_addr(netif));
 80239a0:	68ba      	ldr	r2, [r7, #8]
 80239a2:	683b      	ldr	r3, [r7, #0]
 80239a4:	3304      	adds	r3, #4
 80239a6:	681b      	ldr	r3, [r3, #0]
 80239a8:	429a      	cmp	r2, r3
 80239aa:	bf0c      	ite	eq
 80239ac:	2301      	moveq	r3, #1
 80239ae:	2300      	movne	r3, #0
 80239b0:	b2db      	uxtb	r3, r3
 80239b2:	74fb      	strb	r3, [r7, #19]
  /* ARP message directed to us?
      -> add IP address in ARP cache; assume requester wants to talk to us,
         can result in directly sending the queued packets for this host.
     ARP message not directed to us?
      ->  update the source IP address in the cache, if present */
  etharp_update_arp_entry(netif, &sipaddr, &(hdr->shwaddr),
 80239b4:	697b      	ldr	r3, [r7, #20]
 80239b6:	f103 0208 	add.w	r2, r3, #8
 80239ba:	7cfb      	ldrb	r3, [r7, #19]
 80239bc:	2b00      	cmp	r3, #0
 80239be:	d001      	beq.n	80239c4 <etharp_input+0x9c>
 80239c0:	2301      	movs	r3, #1
 80239c2:	e000      	b.n	80239c6 <etharp_input+0x9e>
 80239c4:	2302      	movs	r3, #2
 80239c6:	f107 010c 	add.w	r1, r7, #12
 80239ca:	6838      	ldr	r0, [r7, #0]
 80239cc:	f7ff fed6 	bl	802377c <etharp_update_arp_entry>
                          for_us ? ETHARP_FLAG_TRY_HARD : ETHARP_FLAG_FIND_ONLY);

  /* now act on the message itself */
  switch (hdr->opcode) {
 80239d0:	697b      	ldr	r3, [r7, #20]
 80239d2:	88db      	ldrh	r3, [r3, #6]
 80239d4:	b29b      	uxth	r3, r3
 80239d6:	f5b3 7f80 	cmp.w	r3, #256	@ 0x100
 80239da:	d003      	beq.n	80239e4 <etharp_input+0xbc>
 80239dc:	f5b3 7f00 	cmp.w	r3, #512	@ 0x200
 80239e0:	d01e      	beq.n	8023a20 <etharp_input+0xf8>
#endif /* (LWIP_DHCP && DHCP_DOES_ARP_CHECK) */
      break;
    default:
      LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_input: ARP unknown opcode type %"S16_F"\n", lwip_htons(hdr->opcode)));
      ETHARP_STATS_INC(etharp.err);
      break;
 80239e2:	e025      	b.n	8023a30 <etharp_input+0x108>
      if (for_us) {
 80239e4:	7cfb      	ldrb	r3, [r7, #19]
 80239e6:	2b00      	cmp	r3, #0
 80239e8:	d021      	beq.n	8023a2e <etharp_input+0x106>
                   (struct eth_addr *)netif->hwaddr, &hdr->shwaddr,
 80239ea:	683b      	ldr	r3, [r7, #0]
 80239ec:	f103 002a 	add.w	r0, r3, #42	@ 0x2a
 80239f0:	697b      	ldr	r3, [r7, #20]
 80239f2:	f103 0408 	add.w	r4, r3, #8
                   (struct eth_addr *)netif->hwaddr, netif_ip4_addr(netif),
 80239f6:	683b      	ldr	r3, [r7, #0]
 80239f8:	f103 052a 	add.w	r5, r3, #42	@ 0x2a
 80239fc:	683b      	ldr	r3, [r7, #0]
 80239fe:	3304      	adds	r3, #4
                   &hdr->shwaddr, &sipaddr,
 8023a00:	697a      	ldr	r2, [r7, #20]
 8023a02:	3208      	adds	r2, #8
        etharp_raw(netif,
 8023a04:	2102      	movs	r1, #2
 8023a06:	9103      	str	r1, [sp, #12]
 8023a08:	f107 010c 	add.w	r1, r7, #12
 8023a0c:	9102      	str	r1, [sp, #8]
 8023a0e:	9201      	str	r2, [sp, #4]
 8023a10:	9300      	str	r3, [sp, #0]
 8023a12:	462b      	mov	r3, r5
 8023a14:	4622      	mov	r2, r4
 8023a16:	4601      	mov	r1, r0
 8023a18:	6838      	ldr	r0, [r7, #0]
 8023a1a:	f000 faf1 	bl	8024000 <etharp_raw>
      break;
 8023a1e:	e006      	b.n	8023a2e <etharp_input+0x106>
      dhcp_arp_reply(netif, &sipaddr);
 8023a20:	f107 030c 	add.w	r3, r7, #12
 8023a24:	4619      	mov	r1, r3
 8023a26:	6838      	ldr	r0, [r7, #0]
 8023a28:	f7fe f9b6 	bl	8021d98 <dhcp_arp_reply>
      break;
 8023a2c:	e000      	b.n	8023a30 <etharp_input+0x108>
      break;
 8023a2e:	bf00      	nop
  }
  /* free ARP packet */
  pbuf_free(p);
 8023a30:	6878      	ldr	r0, [r7, #4]
 8023a32:	f7f6 faf3 	bl	801a01c <pbuf_free>
}
 8023a36:	3718      	adds	r7, #24
 8023a38:	46bd      	mov	sp, r7
 8023a3a:	bdb0      	pop	{r4, r5, r7, pc}
 8023a3c:	0802fd88 	.word	0x0802fd88
 8023a40:	0802fed8 	.word	0x0802fed8
 8023a44:	0802fe00 	.word	0x0802fe00

08023a48 <etharp_output_to_arp_index>:
/** Just a small helper function that sends a pbuf to an ethernet address
 * in the arp_table specified by the index 'arp_idx'.
 */
static err_t
etharp_output_to_arp_index(struct netif *netif, struct pbuf *q, netif_addr_idx_t arp_idx)
{
 8023a48:	b580      	push	{r7, lr}
 8023a4a:	b086      	sub	sp, #24
 8023a4c:	af02      	add	r7, sp, #8
 8023a4e:	60f8      	str	r0, [r7, #12]
 8023a50:	60b9      	str	r1, [r7, #8]
 8023a52:	4613      	mov	r3, r2
 8023a54:	71fb      	strb	r3, [r7, #7]
  LWIP_ASSERT("arp_table[arp_idx].state >= ETHARP_STATE_STABLE",
 8023a56:	79fa      	ldrb	r2, [r7, #7]
 8023a58:	4944      	ldr	r1, [pc, #272]	@ (8023b6c <etharp_output_to_arp_index+0x124>)
 8023a5a:	4613      	mov	r3, r2
 8023a5c:	005b      	lsls	r3, r3, #1
 8023a5e:	4413      	add	r3, r2
 8023a60:	00db      	lsls	r3, r3, #3
 8023a62:	440b      	add	r3, r1
 8023a64:	3314      	adds	r3, #20
 8023a66:	781b      	ldrb	r3, [r3, #0]
 8023a68:	2b01      	cmp	r3, #1
 8023a6a:	d806      	bhi.n	8023a7a <etharp_output_to_arp_index+0x32>
 8023a6c:	4b40      	ldr	r3, [pc, #256]	@ (8023b70 <etharp_output_to_arp_index+0x128>)
 8023a6e:	f240 22ee 	movw	r2, #750	@ 0x2ee
 8023a72:	4940      	ldr	r1, [pc, #256]	@ (8023b74 <etharp_output_to_arp_index+0x12c>)
 8023a74:	4840      	ldr	r0, [pc, #256]	@ (8023b78 <etharp_output_to_arp_index+0x130>)
 8023a76:	f005 fd49 	bl	802950c <iprintf>
              arp_table[arp_idx].state >= ETHARP_STATE_STABLE);
  /* if arp table entry is about to expire: re-request it,
     but only if its state is ETHARP_STATE_STABLE to prevent flooding the
     network with ARP requests if this address is used frequently. */
  if (arp_table[arp_idx].state == ETHARP_STATE_STABLE) {
 8023a7a:	79fa      	ldrb	r2, [r7, #7]
 8023a7c:	493b      	ldr	r1, [pc, #236]	@ (8023b6c <etharp_output_to_arp_index+0x124>)
 8023a7e:	4613      	mov	r3, r2
 8023a80:	005b      	lsls	r3, r3, #1
 8023a82:	4413      	add	r3, r2
 8023a84:	00db      	lsls	r3, r3, #3
 8023a86:	440b      	add	r3, r1
 8023a88:	3314      	adds	r3, #20
 8023a8a:	781b      	ldrb	r3, [r3, #0]
 8023a8c:	2b02      	cmp	r3, #2
 8023a8e:	d153      	bne.n	8023b38 <etharp_output_to_arp_index+0xf0>
    if (arp_table[arp_idx].ctime >= ARP_AGE_REREQUEST_USED_BROADCAST) {
 8023a90:	79fa      	ldrb	r2, [r7, #7]
 8023a92:	4936      	ldr	r1, [pc, #216]	@ (8023b6c <etharp_output_to_arp_index+0x124>)
 8023a94:	4613      	mov	r3, r2
 8023a96:	005b      	lsls	r3, r3, #1
 8023a98:	4413      	add	r3, r2
 8023a9a:	00db      	lsls	r3, r3, #3
 8023a9c:	440b      	add	r3, r1
 8023a9e:	3312      	adds	r3, #18
 8023aa0:	881b      	ldrh	r3, [r3, #0]
 8023aa2:	f5b3 7f8e 	cmp.w	r3, #284	@ 0x11c
 8023aa6:	d919      	bls.n	8023adc <etharp_output_to_arp_index+0x94>
      /* issue a standard request using broadcast */
      if (etharp_request(netif, &arp_table[arp_idx].ipaddr) == ERR_OK) {
 8023aa8:	79fa      	ldrb	r2, [r7, #7]
 8023aaa:	4613      	mov	r3, r2
 8023aac:	005b      	lsls	r3, r3, #1
 8023aae:	4413      	add	r3, r2
 8023ab0:	00db      	lsls	r3, r3, #3
 8023ab2:	4a2e      	ldr	r2, [pc, #184]	@ (8023b6c <etharp_output_to_arp_index+0x124>)
 8023ab4:	4413      	add	r3, r2
 8023ab6:	3304      	adds	r3, #4
 8023ab8:	4619      	mov	r1, r3
 8023aba:	68f8      	ldr	r0, [r7, #12]
 8023abc:	f000 fb4e 	bl	802415c <etharp_request>
 8023ac0:	4603      	mov	r3, r0
 8023ac2:	2b00      	cmp	r3, #0
 8023ac4:	d138      	bne.n	8023b38 <etharp_output_to_arp_index+0xf0>
        arp_table[arp_idx].state = ETHARP_STATE_STABLE_REREQUESTING_1;
 8023ac6:	79fa      	ldrb	r2, [r7, #7]
 8023ac8:	4928      	ldr	r1, [pc, #160]	@ (8023b6c <etharp_output_to_arp_index+0x124>)
 8023aca:	4613      	mov	r3, r2
 8023acc:	005b      	lsls	r3, r3, #1
 8023ace:	4413      	add	r3, r2
 8023ad0:	00db      	lsls	r3, r3, #3
 8023ad2:	440b      	add	r3, r1
 8023ad4:	3314      	adds	r3, #20
 8023ad6:	2203      	movs	r2, #3
 8023ad8:	701a      	strb	r2, [r3, #0]
 8023ada:	e02d      	b.n	8023b38 <etharp_output_to_arp_index+0xf0>
      }
    } else if (arp_table[arp_idx].ctime >= ARP_AGE_REREQUEST_USED_UNICAST) {
 8023adc:	79fa      	ldrb	r2, [r7, #7]
 8023ade:	4923      	ldr	r1, [pc, #140]	@ (8023b6c <etharp_output_to_arp_index+0x124>)
 8023ae0:	4613      	mov	r3, r2
 8023ae2:	005b      	lsls	r3, r3, #1
 8023ae4:	4413      	add	r3, r2
 8023ae6:	00db      	lsls	r3, r3, #3
 8023ae8:	440b      	add	r3, r1
 8023aea:	3312      	adds	r3, #18
 8023aec:	881b      	ldrh	r3, [r3, #0]
 8023aee:	f5b3 7f87 	cmp.w	r3, #270	@ 0x10e
 8023af2:	d321      	bcc.n	8023b38 <etharp_output_to_arp_index+0xf0>
      /* issue a unicast request (for 15 seconds) to prevent unnecessary broadcast */
      if (etharp_request_dst(netif, &arp_table[arp_idx].ipaddr, &arp_table[arp_idx].ethaddr) == ERR_OK) {
 8023af4:	79fa      	ldrb	r2, [r7, #7]
 8023af6:	4613      	mov	r3, r2
 8023af8:	005b      	lsls	r3, r3, #1
 8023afa:	4413      	add	r3, r2
 8023afc:	00db      	lsls	r3, r3, #3
 8023afe:	4a1b      	ldr	r2, [pc, #108]	@ (8023b6c <etharp_output_to_arp_index+0x124>)
 8023b00:	4413      	add	r3, r2
 8023b02:	1d19      	adds	r1, r3, #4
 8023b04:	79fa      	ldrb	r2, [r7, #7]
 8023b06:	4613      	mov	r3, r2
 8023b08:	005b      	lsls	r3, r3, #1
 8023b0a:	4413      	add	r3, r2
 8023b0c:	00db      	lsls	r3, r3, #3
 8023b0e:	3308      	adds	r3, #8
 8023b10:	4a16      	ldr	r2, [pc, #88]	@ (8023b6c <etharp_output_to_arp_index+0x124>)
 8023b12:	4413      	add	r3, r2
 8023b14:	3304      	adds	r3, #4
 8023b16:	461a      	mov	r2, r3
 8023b18:	68f8      	ldr	r0, [r7, #12]
 8023b1a:	f000 fafd 	bl	8024118 <etharp_request_dst>
 8023b1e:	4603      	mov	r3, r0
 8023b20:	2b00      	cmp	r3, #0
 8023b22:	d109      	bne.n	8023b38 <etharp_output_to_arp_index+0xf0>
        arp_table[arp_idx].state = ETHARP_STATE_STABLE_REREQUESTING_1;
 8023b24:	79fa      	ldrb	r2, [r7, #7]
 8023b26:	4911      	ldr	r1, [pc, #68]	@ (8023b6c <etharp_output_to_arp_index+0x124>)
 8023b28:	4613      	mov	r3, r2
 8023b2a:	005b      	lsls	r3, r3, #1
 8023b2c:	4413      	add	r3, r2
 8023b2e:	00db      	lsls	r3, r3, #3
 8023b30:	440b      	add	r3, r1
 8023b32:	3314      	adds	r3, #20
 8023b34:	2203      	movs	r2, #3
 8023b36:	701a      	strb	r2, [r3, #0]
      }
    }
  }

  return ethernet_output(netif, q, (struct eth_addr *)(netif->hwaddr), &arp_table[arp_idx].ethaddr, ETHTYPE_IP);
 8023b38:	68fb      	ldr	r3, [r7, #12]
 8023b3a:	f103 012a 	add.w	r1, r3, #42	@ 0x2a
 8023b3e:	79fa      	ldrb	r2, [r7, #7]
 8023b40:	4613      	mov	r3, r2
 8023b42:	005b      	lsls	r3, r3, #1
 8023b44:	4413      	add	r3, r2
 8023b46:	00db      	lsls	r3, r3, #3
 8023b48:	3308      	adds	r3, #8
 8023b4a:	4a08      	ldr	r2, [pc, #32]	@ (8023b6c <etharp_output_to_arp_index+0x124>)
 8023b4c:	4413      	add	r3, r2
 8023b4e:	3304      	adds	r3, #4
 8023b50:	f44f 6200 	mov.w	r2, #2048	@ 0x800
 8023b54:	9200      	str	r2, [sp, #0]
 8023b56:	460a      	mov	r2, r1
 8023b58:	68b9      	ldr	r1, [r7, #8]
 8023b5a:	68f8      	ldr	r0, [r7, #12]
 8023b5c:	f002 f85e 	bl	8025c1c <ethernet_output>
 8023b60:	4603      	mov	r3, r0
}
 8023b62:	4618      	mov	r0, r3
 8023b64:	3710      	adds	r7, #16
 8023b66:	46bd      	mov	sp, r7
 8023b68:	bd80      	pop	{r7, pc}
 8023b6a:	bf00      	nop
 8023b6c:	2402a084 	.word	0x2402a084
 8023b70:	0802fd88 	.word	0x0802fd88
 8023b74:	0802fef8 	.word	0x0802fef8
 8023b78:	0802fe00 	.word	0x0802fe00

08023b7c <etharp_output>:
 * - ERR_RTE No route to destination (no gateway to external networks),
 * or the return type of either etharp_query() or ethernet_output().
 */
err_t
etharp_output(struct netif *netif, struct pbuf *q, const ip4_addr_t *ipaddr)
{
 8023b7c:	b580      	push	{r7, lr}
 8023b7e:	b08a      	sub	sp, #40	@ 0x28
 8023b80:	af02      	add	r7, sp, #8
 8023b82:	60f8      	str	r0, [r7, #12]
 8023b84:	60b9      	str	r1, [r7, #8]
 8023b86:	607a      	str	r2, [r7, #4]
  const struct eth_addr *dest;
  struct eth_addr mcastaddr;
  const ip4_addr_t *dst_addr = ipaddr;
 8023b88:	687b      	ldr	r3, [r7, #4]
 8023b8a:	61bb      	str	r3, [r7, #24]

  LWIP_ASSERT_CORE_LOCKED();
 8023b8c:	f7ec fa70 	bl	8010070 <sys_check_core_locking>
  LWIP_ASSERT("netif != NULL", netif != NULL);
 8023b90:	68fb      	ldr	r3, [r7, #12]
 8023b92:	2b00      	cmp	r3, #0
 8023b94:	d106      	bne.n	8023ba4 <etharp_output+0x28>
 8023b96:	4b73      	ldr	r3, [pc, #460]	@ (8023d64 <etharp_output+0x1e8>)
 8023b98:	f240 321e 	movw	r2, #798	@ 0x31e
 8023b9c:	4972      	ldr	r1, [pc, #456]	@ (8023d68 <etharp_output+0x1ec>)
 8023b9e:	4873      	ldr	r0, [pc, #460]	@ (8023d6c <etharp_output+0x1f0>)
 8023ba0:	f005 fcb4 	bl	802950c <iprintf>
  LWIP_ASSERT("q != NULL", q != NULL);
 8023ba4:	68bb      	ldr	r3, [r7, #8]
 8023ba6:	2b00      	cmp	r3, #0
 8023ba8:	d106      	bne.n	8023bb8 <etharp_output+0x3c>
 8023baa:	4b6e      	ldr	r3, [pc, #440]	@ (8023d64 <etharp_output+0x1e8>)
 8023bac:	f240 321f 	movw	r2, #799	@ 0x31f
 8023bb0:	496f      	ldr	r1, [pc, #444]	@ (8023d70 <etharp_output+0x1f4>)
 8023bb2:	486e      	ldr	r0, [pc, #440]	@ (8023d6c <etharp_output+0x1f0>)
 8023bb4:	f005 fcaa 	bl	802950c <iprintf>
  LWIP_ASSERT("ipaddr != NULL", ipaddr != NULL);
 8023bb8:	687b      	ldr	r3, [r7, #4]
 8023bba:	2b00      	cmp	r3, #0
 8023bbc:	d106      	bne.n	8023bcc <etharp_output+0x50>
 8023bbe:	4b69      	ldr	r3, [pc, #420]	@ (8023d64 <etharp_output+0x1e8>)
 8023bc0:	f44f 7248 	mov.w	r2, #800	@ 0x320
 8023bc4:	496b      	ldr	r1, [pc, #428]	@ (8023d74 <etharp_output+0x1f8>)
 8023bc6:	4869      	ldr	r0, [pc, #420]	@ (8023d6c <etharp_output+0x1f0>)
 8023bc8:	f005 fca0 	bl	802950c <iprintf>

  /* Determine on destination hardware address. Broadcasts and multicasts
   * are special, other IP addresses are looked up in the ARP table. */

  /* broadcast destination IP address? */
  if (ip4_addr_isbroadcast(ipaddr, netif)) {
 8023bcc:	687b      	ldr	r3, [r7, #4]
 8023bce:	681b      	ldr	r3, [r3, #0]
 8023bd0:	68f9      	ldr	r1, [r7, #12]
 8023bd2:	4618      	mov	r0, r3
 8023bd4:	f000 ff44 	bl	8024a60 <ip4_addr_isbroadcast_u32>
 8023bd8:	4603      	mov	r3, r0
 8023bda:	2b00      	cmp	r3, #0
 8023bdc:	d002      	beq.n	8023be4 <etharp_output+0x68>
    /* broadcast on Ethernet also */
    dest = (const struct eth_addr *)&ethbroadcast;
 8023bde:	4b66      	ldr	r3, [pc, #408]	@ (8023d78 <etharp_output+0x1fc>)
 8023be0:	61fb      	str	r3, [r7, #28]
 8023be2:	e0af      	b.n	8023d44 <etharp_output+0x1c8>
    /* multicast destination IP address? */
  } else if (ip4_addr_ismulticast(ipaddr)) {
 8023be4:	687b      	ldr	r3, [r7, #4]
 8023be6:	681b      	ldr	r3, [r3, #0]
 8023be8:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8023bec:	2be0      	cmp	r3, #224	@ 0xe0
 8023bee:	d118      	bne.n	8023c22 <etharp_output+0xa6>
    /* Hash IP multicast address to MAC address.*/
    mcastaddr.addr[0] = LL_IP4_MULTICAST_ADDR_0;
 8023bf0:	2301      	movs	r3, #1
 8023bf2:	743b      	strb	r3, [r7, #16]
    mcastaddr.addr[1] = LL_IP4_MULTICAST_ADDR_1;
 8023bf4:	2300      	movs	r3, #0
 8023bf6:	747b      	strb	r3, [r7, #17]
    mcastaddr.addr[2] = LL_IP4_MULTICAST_ADDR_2;
 8023bf8:	235e      	movs	r3, #94	@ 0x5e
 8023bfa:	74bb      	strb	r3, [r7, #18]
    mcastaddr.addr[3] = ip4_addr2(ipaddr) & 0x7f;
 8023bfc:	687b      	ldr	r3, [r7, #4]
 8023bfe:	3301      	adds	r3, #1
 8023c00:	781b      	ldrb	r3, [r3, #0]
 8023c02:	f003 037f 	and.w	r3, r3, #127	@ 0x7f
 8023c06:	b2db      	uxtb	r3, r3
 8023c08:	74fb      	strb	r3, [r7, #19]
    mcastaddr.addr[4] = ip4_addr3(ipaddr);
 8023c0a:	687b      	ldr	r3, [r7, #4]
 8023c0c:	3302      	adds	r3, #2
 8023c0e:	781b      	ldrb	r3, [r3, #0]
 8023c10:	753b      	strb	r3, [r7, #20]
    mcastaddr.addr[5] = ip4_addr4(ipaddr);
 8023c12:	687b      	ldr	r3, [r7, #4]
 8023c14:	3303      	adds	r3, #3
 8023c16:	781b      	ldrb	r3, [r3, #0]
 8023c18:	757b      	strb	r3, [r7, #21]
    /* destination Ethernet address is multicast */
    dest = &mcastaddr;
 8023c1a:	f107 0310 	add.w	r3, r7, #16
 8023c1e:	61fb      	str	r3, [r7, #28]
 8023c20:	e090      	b.n	8023d44 <etharp_output+0x1c8>
    /* unicast destination IP address? */
  } else {
    netif_addr_idx_t i;
    /* outside local network? if so, this can neither be a global broadcast nor
       a subnet broadcast. */
    if (!ip4_addr_netcmp(ipaddr, netif_ip4_addr(netif), netif_ip4_netmask(netif)) &&
 8023c22:	687b      	ldr	r3, [r7, #4]
 8023c24:	681a      	ldr	r2, [r3, #0]
 8023c26:	68fb      	ldr	r3, [r7, #12]
 8023c28:	3304      	adds	r3, #4
 8023c2a:	681b      	ldr	r3, [r3, #0]
 8023c2c:	405a      	eors	r2, r3
 8023c2e:	68fb      	ldr	r3, [r7, #12]
 8023c30:	3308      	adds	r3, #8
 8023c32:	681b      	ldr	r3, [r3, #0]
 8023c34:	4013      	ands	r3, r2
 8023c36:	2b00      	cmp	r3, #0
 8023c38:	d012      	beq.n	8023c60 <etharp_output+0xe4>
        !ip4_addr_islinklocal(ipaddr)) {
 8023c3a:	687b      	ldr	r3, [r7, #4]
 8023c3c:	681b      	ldr	r3, [r3, #0]
 8023c3e:	b29b      	uxth	r3, r3
    if (!ip4_addr_netcmp(ipaddr, netif_ip4_addr(netif), netif_ip4_netmask(netif)) &&
 8023c40:	f64f 62a9 	movw	r2, #65193	@ 0xfea9
 8023c44:	4293      	cmp	r3, r2
 8023c46:	d00b      	beq.n	8023c60 <etharp_output+0xe4>
        dst_addr = LWIP_HOOK_ETHARP_GET_GW(netif, ipaddr);
        if (dst_addr == NULL)
#endif /* LWIP_HOOK_ETHARP_GET_GW */
        {
          /* interface has default gateway? */
          if (!ip4_addr_isany_val(*netif_ip4_gw(netif))) {
 8023c48:	68fb      	ldr	r3, [r7, #12]
 8023c4a:	330c      	adds	r3, #12
 8023c4c:	681b      	ldr	r3, [r3, #0]
 8023c4e:	2b00      	cmp	r3, #0
 8023c50:	d003      	beq.n	8023c5a <etharp_output+0xde>
            /* send to hardware address of default gateway IP address */
            dst_addr = netif_ip4_gw(netif);
 8023c52:	68fb      	ldr	r3, [r7, #12]
 8023c54:	330c      	adds	r3, #12
 8023c56:	61bb      	str	r3, [r7, #24]
 8023c58:	e002      	b.n	8023c60 <etharp_output+0xe4>
            /* no default gateway available */
          } else {
            /* no route to destination error (default gateway missing) */
            return ERR_RTE;
 8023c5a:	f06f 0303 	mvn.w	r3, #3
 8023c5e:	e07d      	b.n	8023d5c <etharp_output+0x1e0>
    if (netif->hints != NULL) {
      /* per-pcb cached entry was given */
      netif_addr_idx_t etharp_cached_entry = netif->hints->addr_hint;
      if (etharp_cached_entry < ARP_TABLE_SIZE) {
#endif /* LWIP_NETIF_HWADDRHINT */
        if ((arp_table[etharp_cached_entry].state >= ETHARP_STATE_STABLE) &&
 8023c60:	4b46      	ldr	r3, [pc, #280]	@ (8023d7c <etharp_output+0x200>)
 8023c62:	781b      	ldrb	r3, [r3, #0]
 8023c64:	4619      	mov	r1, r3
 8023c66:	4a46      	ldr	r2, [pc, #280]	@ (8023d80 <etharp_output+0x204>)
 8023c68:	460b      	mov	r3, r1
 8023c6a:	005b      	lsls	r3, r3, #1
 8023c6c:	440b      	add	r3, r1
 8023c6e:	00db      	lsls	r3, r3, #3
 8023c70:	4413      	add	r3, r2
 8023c72:	3314      	adds	r3, #20
 8023c74:	781b      	ldrb	r3, [r3, #0]
 8023c76:	2b01      	cmp	r3, #1
 8023c78:	d925      	bls.n	8023cc6 <etharp_output+0x14a>
#if ETHARP_TABLE_MATCH_NETIF
            (arp_table[etharp_cached_entry].netif == netif) &&
 8023c7a:	4b40      	ldr	r3, [pc, #256]	@ (8023d7c <etharp_output+0x200>)
 8023c7c:	781b      	ldrb	r3, [r3, #0]
 8023c7e:	4619      	mov	r1, r3
 8023c80:	4a3f      	ldr	r2, [pc, #252]	@ (8023d80 <etharp_output+0x204>)
 8023c82:	460b      	mov	r3, r1
 8023c84:	005b      	lsls	r3, r3, #1
 8023c86:	440b      	add	r3, r1
 8023c88:	00db      	lsls	r3, r3, #3
 8023c8a:	4413      	add	r3, r2
 8023c8c:	3308      	adds	r3, #8
 8023c8e:	681b      	ldr	r3, [r3, #0]
        if ((arp_table[etharp_cached_entry].state >= ETHARP_STATE_STABLE) &&
 8023c90:	68fa      	ldr	r2, [r7, #12]
 8023c92:	429a      	cmp	r2, r3
 8023c94:	d117      	bne.n	8023cc6 <etharp_output+0x14a>
#endif
            (ip4_addr_cmp(dst_addr, &arp_table[etharp_cached_entry].ipaddr))) {
 8023c96:	69bb      	ldr	r3, [r7, #24]
 8023c98:	681a      	ldr	r2, [r3, #0]
 8023c9a:	4b38      	ldr	r3, [pc, #224]	@ (8023d7c <etharp_output+0x200>)
 8023c9c:	781b      	ldrb	r3, [r3, #0]
 8023c9e:	4618      	mov	r0, r3
 8023ca0:	4937      	ldr	r1, [pc, #220]	@ (8023d80 <etharp_output+0x204>)
 8023ca2:	4603      	mov	r3, r0
 8023ca4:	005b      	lsls	r3, r3, #1
 8023ca6:	4403      	add	r3, r0
 8023ca8:	00db      	lsls	r3, r3, #3
 8023caa:	440b      	add	r3, r1
 8023cac:	3304      	adds	r3, #4
 8023cae:	681b      	ldr	r3, [r3, #0]
            (arp_table[etharp_cached_entry].netif == netif) &&
 8023cb0:	429a      	cmp	r2, r3
 8023cb2:	d108      	bne.n	8023cc6 <etharp_output+0x14a>
          /* the per-pcb-cached entry is stable and the right one! */
          ETHARP_STATS_INC(etharp.cachehit);
          return etharp_output_to_arp_index(netif, q, etharp_cached_entry);
 8023cb4:	4b31      	ldr	r3, [pc, #196]	@ (8023d7c <etharp_output+0x200>)
 8023cb6:	781b      	ldrb	r3, [r3, #0]
 8023cb8:	461a      	mov	r2, r3
 8023cba:	68b9      	ldr	r1, [r7, #8]
 8023cbc:	68f8      	ldr	r0, [r7, #12]
 8023cbe:	f7ff fec3 	bl	8023a48 <etharp_output_to_arp_index>
 8023cc2:	4603      	mov	r3, r0
 8023cc4:	e04a      	b.n	8023d5c <etharp_output+0x1e0>
    }
#endif /* LWIP_NETIF_HWADDRHINT */

    /* find stable entry: do this here since this is a critical path for
       throughput and etharp_find_entry() is kind of slow */
    for (i = 0; i < ARP_TABLE_SIZE; i++) {
 8023cc6:	2300      	movs	r3, #0
 8023cc8:	75fb      	strb	r3, [r7, #23]
 8023cca:	e031      	b.n	8023d30 <etharp_output+0x1b4>
      if ((arp_table[i].state >= ETHARP_STATE_STABLE) &&
 8023ccc:	7dfa      	ldrb	r2, [r7, #23]
 8023cce:	492c      	ldr	r1, [pc, #176]	@ (8023d80 <etharp_output+0x204>)
 8023cd0:	4613      	mov	r3, r2
 8023cd2:	005b      	lsls	r3, r3, #1
 8023cd4:	4413      	add	r3, r2
 8023cd6:	00db      	lsls	r3, r3, #3
 8023cd8:	440b      	add	r3, r1
 8023cda:	3314      	adds	r3, #20
 8023cdc:	781b      	ldrb	r3, [r3, #0]
 8023cde:	2b01      	cmp	r3, #1
 8023ce0:	d923      	bls.n	8023d2a <etharp_output+0x1ae>
#if ETHARP_TABLE_MATCH_NETIF
          (arp_table[i].netif == netif) &&
 8023ce2:	7dfa      	ldrb	r2, [r7, #23]
 8023ce4:	4926      	ldr	r1, [pc, #152]	@ (8023d80 <etharp_output+0x204>)
 8023ce6:	4613      	mov	r3, r2
 8023ce8:	005b      	lsls	r3, r3, #1
 8023cea:	4413      	add	r3, r2
 8023cec:	00db      	lsls	r3, r3, #3
 8023cee:	440b      	add	r3, r1
 8023cf0:	3308      	adds	r3, #8
 8023cf2:	681b      	ldr	r3, [r3, #0]
      if ((arp_table[i].state >= ETHARP_STATE_STABLE) &&
 8023cf4:	68fa      	ldr	r2, [r7, #12]
 8023cf6:	429a      	cmp	r2, r3
 8023cf8:	d117      	bne.n	8023d2a <etharp_output+0x1ae>
#endif
          (ip4_addr_cmp(dst_addr, &arp_table[i].ipaddr))) {
 8023cfa:	69bb      	ldr	r3, [r7, #24]
 8023cfc:	6819      	ldr	r1, [r3, #0]
 8023cfe:	7dfa      	ldrb	r2, [r7, #23]
 8023d00:	481f      	ldr	r0, [pc, #124]	@ (8023d80 <etharp_output+0x204>)
 8023d02:	4613      	mov	r3, r2
 8023d04:	005b      	lsls	r3, r3, #1
 8023d06:	4413      	add	r3, r2
 8023d08:	00db      	lsls	r3, r3, #3
 8023d0a:	4403      	add	r3, r0
 8023d0c:	3304      	adds	r3, #4
 8023d0e:	681b      	ldr	r3, [r3, #0]
          (arp_table[i].netif == netif) &&
 8023d10:	4299      	cmp	r1, r3
 8023d12:	d10a      	bne.n	8023d2a <etharp_output+0x1ae>
        /* found an existing, stable entry */
        ETHARP_SET_ADDRHINT(netif, i);
 8023d14:	4a19      	ldr	r2, [pc, #100]	@ (8023d7c <etharp_output+0x200>)
 8023d16:	7dfb      	ldrb	r3, [r7, #23]
 8023d18:	7013      	strb	r3, [r2, #0]
        return etharp_output_to_arp_index(netif, q, i);
 8023d1a:	7dfb      	ldrb	r3, [r7, #23]
 8023d1c:	461a      	mov	r2, r3
 8023d1e:	68b9      	ldr	r1, [r7, #8]
 8023d20:	68f8      	ldr	r0, [r7, #12]
 8023d22:	f7ff fe91 	bl	8023a48 <etharp_output_to_arp_index>
 8023d26:	4603      	mov	r3, r0
 8023d28:	e018      	b.n	8023d5c <etharp_output+0x1e0>
    for (i = 0; i < ARP_TABLE_SIZE; i++) {
 8023d2a:	7dfb      	ldrb	r3, [r7, #23]
 8023d2c:	3301      	adds	r3, #1
 8023d2e:	75fb      	strb	r3, [r7, #23]
 8023d30:	7dfb      	ldrb	r3, [r7, #23]
 8023d32:	2b09      	cmp	r3, #9
 8023d34:	d9ca      	bls.n	8023ccc <etharp_output+0x150>
      }
    }
    /* no stable entry found, use the (slower) query function:
       queue on destination Ethernet address belonging to ipaddr */
    return etharp_query(netif, dst_addr, q);
 8023d36:	68ba      	ldr	r2, [r7, #8]
 8023d38:	69b9      	ldr	r1, [r7, #24]
 8023d3a:	68f8      	ldr	r0, [r7, #12]
 8023d3c:	f000 f822 	bl	8023d84 <etharp_query>
 8023d40:	4603      	mov	r3, r0
 8023d42:	e00b      	b.n	8023d5c <etharp_output+0x1e0>
  }

  /* continuation for multicast/broadcast destinations */
  /* obtain source Ethernet address of the given interface */
  /* send packet directly on the link */
  return ethernet_output(netif, q, (struct eth_addr *)(netif->hwaddr), dest, ETHTYPE_IP);
 8023d44:	68fb      	ldr	r3, [r7, #12]
 8023d46:	f103 022a 	add.w	r2, r3, #42	@ 0x2a
 8023d4a:	f44f 6300 	mov.w	r3, #2048	@ 0x800
 8023d4e:	9300      	str	r3, [sp, #0]
 8023d50:	69fb      	ldr	r3, [r7, #28]
 8023d52:	68b9      	ldr	r1, [r7, #8]
 8023d54:	68f8      	ldr	r0, [r7, #12]
 8023d56:	f001 ff61 	bl	8025c1c <ethernet_output>
 8023d5a:	4603      	mov	r3, r0
}
 8023d5c:	4618      	mov	r0, r3
 8023d5e:	3720      	adds	r7, #32
 8023d60:	46bd      	mov	sp, r7
 8023d62:	bd80      	pop	{r7, pc}
 8023d64:	0802fd88 	.word	0x0802fd88
 8023d68:	0802fed8 	.word	0x0802fed8
 8023d6c:	0802fe00 	.word	0x0802fe00
 8023d70:	0802ff28 	.word	0x0802ff28
 8023d74:	0802fec8 	.word	0x0802fec8
 8023d78:	080307ac 	.word	0x080307ac
 8023d7c:	2402a174 	.word	0x2402a174
 8023d80:	2402a084 	.word	0x2402a084

08023d84 <etharp_query>:
 * - ERR_ARG Non-unicast address given, those will not appear in ARP cache.
 *
 */
err_t
etharp_query(struct netif *netif, const ip4_addr_t *ipaddr, struct pbuf *q)
{
 8023d84:	b580      	push	{r7, lr}
 8023d86:	b08c      	sub	sp, #48	@ 0x30
 8023d88:	af02      	add	r7, sp, #8
 8023d8a:	60f8      	str	r0, [r7, #12]
 8023d8c:	60b9      	str	r1, [r7, #8]
 8023d8e:	607a      	str	r2, [r7, #4]
  struct eth_addr *srcaddr = (struct eth_addr *)netif->hwaddr;
 8023d90:	68fb      	ldr	r3, [r7, #12]
 8023d92:	332a      	adds	r3, #42	@ 0x2a
 8023d94:	617b      	str	r3, [r7, #20]
  err_t result = ERR_MEM;
 8023d96:	23ff      	movs	r3, #255	@ 0xff
 8023d98:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
  int is_new_entry = 0;
 8023d9c:	2300      	movs	r3, #0
 8023d9e:	623b      	str	r3, [r7, #32]
  s16_t i_err;
  netif_addr_idx_t i;

  /* non-unicast address? */
  if (ip4_addr_isbroadcast(ipaddr, netif) ||
 8023da0:	68bb      	ldr	r3, [r7, #8]
 8023da2:	681b      	ldr	r3, [r3, #0]
 8023da4:	68f9      	ldr	r1, [r7, #12]
 8023da6:	4618      	mov	r0, r3
 8023da8:	f000 fe5a 	bl	8024a60 <ip4_addr_isbroadcast_u32>
 8023dac:	4603      	mov	r3, r0
 8023dae:	2b00      	cmp	r3, #0
 8023db0:	d10c      	bne.n	8023dcc <etharp_query+0x48>
      ip4_addr_ismulticast(ipaddr) ||
 8023db2:	68bb      	ldr	r3, [r7, #8]
 8023db4:	681b      	ldr	r3, [r3, #0]
 8023db6:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
  if (ip4_addr_isbroadcast(ipaddr, netif) ||
 8023dba:	2be0      	cmp	r3, #224	@ 0xe0
 8023dbc:	d006      	beq.n	8023dcc <etharp_query+0x48>
      ip4_addr_ismulticast(ipaddr) ||
 8023dbe:	68bb      	ldr	r3, [r7, #8]
 8023dc0:	2b00      	cmp	r3, #0
 8023dc2:	d003      	beq.n	8023dcc <etharp_query+0x48>
      ip4_addr_isany(ipaddr)) {
 8023dc4:	68bb      	ldr	r3, [r7, #8]
 8023dc6:	681b      	ldr	r3, [r3, #0]
 8023dc8:	2b00      	cmp	r3, #0
 8023dca:	d102      	bne.n	8023dd2 <etharp_query+0x4e>
    LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: will not add non-unicast IP address to ARP cache\n"));
    return ERR_ARG;
 8023dcc:	f06f 030f 	mvn.w	r3, #15
 8023dd0:	e101      	b.n	8023fd6 <etharp_query+0x252>
  }

  /* find entry in ARP cache, ask to create entry if queueing packet */
  i_err = etharp_find_entry(ipaddr, ETHARP_FLAG_TRY_HARD, netif);
 8023dd2:	68fa      	ldr	r2, [r7, #12]
 8023dd4:	2101      	movs	r1, #1
 8023dd6:	68b8      	ldr	r0, [r7, #8]
 8023dd8:	f7ff fb58 	bl	802348c <etharp_find_entry>
 8023ddc:	4603      	mov	r3, r0
 8023dde:	827b      	strh	r3, [r7, #18]

  /* could not find or create entry? */
  if (i_err < 0) {
 8023de0:	f9b7 3012 	ldrsh.w	r3, [r7, #18]
 8023de4:	2b00      	cmp	r3, #0
 8023de6:	da02      	bge.n	8023dee <etharp_query+0x6a>
    LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: could not create ARP entry\n"));
    if (q) {
      LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: packet dropped\n"));
      ETHARP_STATS_INC(etharp.memerr);
    }
    return (err_t)i_err;
 8023de8:	8a7b      	ldrh	r3, [r7, #18]
 8023dea:	b25b      	sxtb	r3, r3
 8023dec:	e0f3      	b.n	8023fd6 <etharp_query+0x252>
  }
  LWIP_ASSERT("type overflow", (size_t)i_err < NETIF_ADDR_IDX_MAX);
 8023dee:	8a7b      	ldrh	r3, [r7, #18]
 8023df0:	2b7e      	cmp	r3, #126	@ 0x7e
 8023df2:	d906      	bls.n	8023e02 <etharp_query+0x7e>
 8023df4:	4b7a      	ldr	r3, [pc, #488]	@ (8023fe0 <etharp_query+0x25c>)
 8023df6:	f240 32c1 	movw	r2, #961	@ 0x3c1
 8023dfa:	497a      	ldr	r1, [pc, #488]	@ (8023fe4 <etharp_query+0x260>)
 8023dfc:	487a      	ldr	r0, [pc, #488]	@ (8023fe8 <etharp_query+0x264>)
 8023dfe:	f005 fb85 	bl	802950c <iprintf>
  i = (netif_addr_idx_t)i_err;
 8023e02:	8a7b      	ldrh	r3, [r7, #18]
 8023e04:	747b      	strb	r3, [r7, #17]

  /* mark a fresh entry as pending (we just sent a request) */
  if (arp_table[i].state == ETHARP_STATE_EMPTY) {
 8023e06:	7c7a      	ldrb	r2, [r7, #17]
 8023e08:	4978      	ldr	r1, [pc, #480]	@ (8023fec <etharp_query+0x268>)
 8023e0a:	4613      	mov	r3, r2
 8023e0c:	005b      	lsls	r3, r3, #1
 8023e0e:	4413      	add	r3, r2
 8023e10:	00db      	lsls	r3, r3, #3
 8023e12:	440b      	add	r3, r1
 8023e14:	3314      	adds	r3, #20
 8023e16:	781b      	ldrb	r3, [r3, #0]
 8023e18:	2b00      	cmp	r3, #0
 8023e1a:	d115      	bne.n	8023e48 <etharp_query+0xc4>
    is_new_entry = 1;
 8023e1c:	2301      	movs	r3, #1
 8023e1e:	623b      	str	r3, [r7, #32]
    arp_table[i].state = ETHARP_STATE_PENDING;
 8023e20:	7c7a      	ldrb	r2, [r7, #17]
 8023e22:	4972      	ldr	r1, [pc, #456]	@ (8023fec <etharp_query+0x268>)
 8023e24:	4613      	mov	r3, r2
 8023e26:	005b      	lsls	r3, r3, #1
 8023e28:	4413      	add	r3, r2
 8023e2a:	00db      	lsls	r3, r3, #3
 8023e2c:	440b      	add	r3, r1
 8023e2e:	3314      	adds	r3, #20
 8023e30:	2201      	movs	r2, #1
 8023e32:	701a      	strb	r2, [r3, #0]
    /* record network interface for re-sending arp request in etharp_tmr */
    arp_table[i].netif = netif;
 8023e34:	7c7a      	ldrb	r2, [r7, #17]
 8023e36:	496d      	ldr	r1, [pc, #436]	@ (8023fec <etharp_query+0x268>)
 8023e38:	4613      	mov	r3, r2
 8023e3a:	005b      	lsls	r3, r3, #1
 8023e3c:	4413      	add	r3, r2
 8023e3e:	00db      	lsls	r3, r3, #3
 8023e40:	440b      	add	r3, r1
 8023e42:	3308      	adds	r3, #8
 8023e44:	68fa      	ldr	r2, [r7, #12]
 8023e46:	601a      	str	r2, [r3, #0]
  }

  /* { i is either a STABLE or (new or existing) PENDING entry } */
  LWIP_ASSERT("arp_table[i].state == PENDING or STABLE",
 8023e48:	7c7a      	ldrb	r2, [r7, #17]
 8023e4a:	4968      	ldr	r1, [pc, #416]	@ (8023fec <etharp_query+0x268>)
 8023e4c:	4613      	mov	r3, r2
 8023e4e:	005b      	lsls	r3, r3, #1
 8023e50:	4413      	add	r3, r2
 8023e52:	00db      	lsls	r3, r3, #3
 8023e54:	440b      	add	r3, r1
 8023e56:	3314      	adds	r3, #20
 8023e58:	781b      	ldrb	r3, [r3, #0]
 8023e5a:	2b01      	cmp	r3, #1
 8023e5c:	d011      	beq.n	8023e82 <etharp_query+0xfe>
 8023e5e:	7c7a      	ldrb	r2, [r7, #17]
 8023e60:	4962      	ldr	r1, [pc, #392]	@ (8023fec <etharp_query+0x268>)
 8023e62:	4613      	mov	r3, r2
 8023e64:	005b      	lsls	r3, r3, #1
 8023e66:	4413      	add	r3, r2
 8023e68:	00db      	lsls	r3, r3, #3
 8023e6a:	440b      	add	r3, r1
 8023e6c:	3314      	adds	r3, #20
 8023e6e:	781b      	ldrb	r3, [r3, #0]
 8023e70:	2b01      	cmp	r3, #1
 8023e72:	d806      	bhi.n	8023e82 <etharp_query+0xfe>
 8023e74:	4b5a      	ldr	r3, [pc, #360]	@ (8023fe0 <etharp_query+0x25c>)
 8023e76:	f240 32cd 	movw	r2, #973	@ 0x3cd
 8023e7a:	495d      	ldr	r1, [pc, #372]	@ (8023ff0 <etharp_query+0x26c>)
 8023e7c:	485a      	ldr	r0, [pc, #360]	@ (8023fe8 <etharp_query+0x264>)
 8023e7e:	f005 fb45 	bl	802950c <iprintf>
              ((arp_table[i].state == ETHARP_STATE_PENDING) ||
               (arp_table[i].state >= ETHARP_STATE_STABLE)));

  /* do we have a new entry? or an implicit query request? */
  if (is_new_entry || (q == NULL)) {
 8023e82:	6a3b      	ldr	r3, [r7, #32]
 8023e84:	2b00      	cmp	r3, #0
 8023e86:	d102      	bne.n	8023e8e <etharp_query+0x10a>
 8023e88:	687b      	ldr	r3, [r7, #4]
 8023e8a:	2b00      	cmp	r3, #0
 8023e8c:	d10c      	bne.n	8023ea8 <etharp_query+0x124>
    /* try to resolve it; send out ARP request */
    result = etharp_request(netif, ipaddr);
 8023e8e:	68b9      	ldr	r1, [r7, #8]
 8023e90:	68f8      	ldr	r0, [r7, #12]
 8023e92:	f000 f963 	bl	802415c <etharp_request>
 8023e96:	4603      	mov	r3, r0
 8023e98:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
      /* ARP request couldn't be sent */
      /* We don't re-send arp request in etharp_tmr, but we still queue packets,
         since this failure could be temporary, and the next packet calling
         etharp_query again could lead to sending the queued packets. */
    }
    if (q == NULL) {
 8023e9c:	687b      	ldr	r3, [r7, #4]
 8023e9e:	2b00      	cmp	r3, #0
 8023ea0:	d102      	bne.n	8023ea8 <etharp_query+0x124>
      return result;
 8023ea2:	f997 3027 	ldrsb.w	r3, [r7, #39]	@ 0x27
 8023ea6:	e096      	b.n	8023fd6 <etharp_query+0x252>
    }
  }

  /* packet given? */
  LWIP_ASSERT("q != NULL", q != NULL);
 8023ea8:	687b      	ldr	r3, [r7, #4]
 8023eaa:	2b00      	cmp	r3, #0
 8023eac:	d106      	bne.n	8023ebc <etharp_query+0x138>
 8023eae:	4b4c      	ldr	r3, [pc, #304]	@ (8023fe0 <etharp_query+0x25c>)
 8023eb0:	f240 32e1 	movw	r2, #993	@ 0x3e1
 8023eb4:	494f      	ldr	r1, [pc, #316]	@ (8023ff4 <etharp_query+0x270>)
 8023eb6:	484c      	ldr	r0, [pc, #304]	@ (8023fe8 <etharp_query+0x264>)
 8023eb8:	f005 fb28 	bl	802950c <iprintf>
  /* stable entry? */
  if (arp_table[i].state >= ETHARP_STATE_STABLE) {
 8023ebc:	7c7a      	ldrb	r2, [r7, #17]
 8023ebe:	494b      	ldr	r1, [pc, #300]	@ (8023fec <etharp_query+0x268>)
 8023ec0:	4613      	mov	r3, r2
 8023ec2:	005b      	lsls	r3, r3, #1
 8023ec4:	4413      	add	r3, r2
 8023ec6:	00db      	lsls	r3, r3, #3
 8023ec8:	440b      	add	r3, r1
 8023eca:	3314      	adds	r3, #20
 8023ecc:	781b      	ldrb	r3, [r3, #0]
 8023ece:	2b01      	cmp	r3, #1
 8023ed0:	d917      	bls.n	8023f02 <etharp_query+0x17e>
    /* we have a valid IP->Ethernet address mapping */
    ETHARP_SET_ADDRHINT(netif, i);
 8023ed2:	4a49      	ldr	r2, [pc, #292]	@ (8023ff8 <etharp_query+0x274>)
 8023ed4:	7c7b      	ldrb	r3, [r7, #17]
 8023ed6:	7013      	strb	r3, [r2, #0]
    /* send the packet */
    result = ethernet_output(netif, q, srcaddr, &(arp_table[i].ethaddr), ETHTYPE_IP);
 8023ed8:	7c7a      	ldrb	r2, [r7, #17]
 8023eda:	4613      	mov	r3, r2
 8023edc:	005b      	lsls	r3, r3, #1
 8023ede:	4413      	add	r3, r2
 8023ee0:	00db      	lsls	r3, r3, #3
 8023ee2:	3308      	adds	r3, #8
 8023ee4:	4a41      	ldr	r2, [pc, #260]	@ (8023fec <etharp_query+0x268>)
 8023ee6:	4413      	add	r3, r2
 8023ee8:	3304      	adds	r3, #4
 8023eea:	f44f 6200 	mov.w	r2, #2048	@ 0x800
 8023eee:	9200      	str	r2, [sp, #0]
 8023ef0:	697a      	ldr	r2, [r7, #20]
 8023ef2:	6879      	ldr	r1, [r7, #4]
 8023ef4:	68f8      	ldr	r0, [r7, #12]
 8023ef6:	f001 fe91 	bl	8025c1c <ethernet_output>
 8023efa:	4603      	mov	r3, r0
 8023efc:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
 8023f00:	e067      	b.n	8023fd2 <etharp_query+0x24e>
    /* pending entry? (either just created or already pending */
  } else if (arp_table[i].state == ETHARP_STATE_PENDING) {
 8023f02:	7c7a      	ldrb	r2, [r7, #17]
 8023f04:	4939      	ldr	r1, [pc, #228]	@ (8023fec <etharp_query+0x268>)
 8023f06:	4613      	mov	r3, r2
 8023f08:	005b      	lsls	r3, r3, #1
 8023f0a:	4413      	add	r3, r2
 8023f0c:	00db      	lsls	r3, r3, #3
 8023f0e:	440b      	add	r3, r1
 8023f10:	3314      	adds	r3, #20
 8023f12:	781b      	ldrb	r3, [r3, #0]
 8023f14:	2b01      	cmp	r3, #1
 8023f16:	d15c      	bne.n	8023fd2 <etharp_query+0x24e>
    /* entry is still pending, queue the given packet 'q' */
    struct pbuf *p;
    int copy_needed = 0;
 8023f18:	2300      	movs	r3, #0
 8023f1a:	61bb      	str	r3, [r7, #24]
    /* IF q includes a pbuf that must be copied, copy the whole chain into a
     * new PBUF_RAM. See the definition of PBUF_NEEDS_COPY for details. */
    p = q;
 8023f1c:	687b      	ldr	r3, [r7, #4]
 8023f1e:	61fb      	str	r3, [r7, #28]
    while (p) {
 8023f20:	e01c      	b.n	8023f5c <etharp_query+0x1d8>
      LWIP_ASSERT("no packet queues allowed!", (p->len != p->tot_len) || (p->next == 0));
 8023f22:	69fb      	ldr	r3, [r7, #28]
 8023f24:	895a      	ldrh	r2, [r3, #10]
 8023f26:	69fb      	ldr	r3, [r7, #28]
 8023f28:	891b      	ldrh	r3, [r3, #8]
 8023f2a:	429a      	cmp	r2, r3
 8023f2c:	d10a      	bne.n	8023f44 <etharp_query+0x1c0>
 8023f2e:	69fb      	ldr	r3, [r7, #28]
 8023f30:	681b      	ldr	r3, [r3, #0]
 8023f32:	2b00      	cmp	r3, #0
 8023f34:	d006      	beq.n	8023f44 <etharp_query+0x1c0>
 8023f36:	4b2a      	ldr	r3, [pc, #168]	@ (8023fe0 <etharp_query+0x25c>)
 8023f38:	f240 32f1 	movw	r2, #1009	@ 0x3f1
 8023f3c:	492f      	ldr	r1, [pc, #188]	@ (8023ffc <etharp_query+0x278>)
 8023f3e:	482a      	ldr	r0, [pc, #168]	@ (8023fe8 <etharp_query+0x264>)
 8023f40:	f005 fae4 	bl	802950c <iprintf>
      if (PBUF_NEEDS_COPY(p)) {
 8023f44:	69fb      	ldr	r3, [r7, #28]
 8023f46:	7b1b      	ldrb	r3, [r3, #12]
 8023f48:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 8023f4c:	2b00      	cmp	r3, #0
 8023f4e:	d002      	beq.n	8023f56 <etharp_query+0x1d2>
        copy_needed = 1;
 8023f50:	2301      	movs	r3, #1
 8023f52:	61bb      	str	r3, [r7, #24]
        break;
 8023f54:	e005      	b.n	8023f62 <etharp_query+0x1de>
      }
      p = p->next;
 8023f56:	69fb      	ldr	r3, [r7, #28]
 8023f58:	681b      	ldr	r3, [r3, #0]
 8023f5a:	61fb      	str	r3, [r7, #28]
    while (p) {
 8023f5c:	69fb      	ldr	r3, [r7, #28]
 8023f5e:	2b00      	cmp	r3, #0
 8023f60:	d1df      	bne.n	8023f22 <etharp_query+0x19e>
    }
    if (copy_needed) {
 8023f62:	69bb      	ldr	r3, [r7, #24]
 8023f64:	2b00      	cmp	r3, #0
 8023f66:	d007      	beq.n	8023f78 <etharp_query+0x1f4>
      /* copy the whole packet into new pbufs */
      p = pbuf_clone(PBUF_LINK, PBUF_RAM, q);
 8023f68:	687a      	ldr	r2, [r7, #4]
 8023f6a:	f44f 7120 	mov.w	r1, #640	@ 0x280
 8023f6e:	200e      	movs	r0, #14
 8023f70:	f7f6 facc 	bl	801a50c <pbuf_clone>
 8023f74:	61f8      	str	r0, [r7, #28]
 8023f76:	e004      	b.n	8023f82 <etharp_query+0x1fe>
    } else {
      /* referencing the old pbuf is enough */
      p = q;
 8023f78:	687b      	ldr	r3, [r7, #4]
 8023f7a:	61fb      	str	r3, [r7, #28]
      pbuf_ref(p);
 8023f7c:	69f8      	ldr	r0, [r7, #28]
 8023f7e:	f7f6 f8f3 	bl	801a168 <pbuf_ref>
    }
    /* packet could be taken over? */
    if (p != NULL) {
 8023f82:	69fb      	ldr	r3, [r7, #28]
 8023f84:	2b00      	cmp	r3, #0
 8023f86:	d021      	beq.n	8023fcc <etharp_query+0x248>
        LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: could not queue a copy of PBUF_REF packet %p (out of memory)\n", (void *)q));
        result = ERR_MEM;
      }
#else /* ARP_QUEUEING */
      /* always queue one packet per ARP request only, freeing a previously queued packet */
      if (arp_table[i].q != NULL) {
 8023f88:	7c7a      	ldrb	r2, [r7, #17]
 8023f8a:	4918      	ldr	r1, [pc, #96]	@ (8023fec <etharp_query+0x268>)
 8023f8c:	4613      	mov	r3, r2
 8023f8e:	005b      	lsls	r3, r3, #1
 8023f90:	4413      	add	r3, r2
 8023f92:	00db      	lsls	r3, r3, #3
 8023f94:	440b      	add	r3, r1
 8023f96:	681b      	ldr	r3, [r3, #0]
 8023f98:	2b00      	cmp	r3, #0
 8023f9a:	d00a      	beq.n	8023fb2 <etharp_query+0x22e>
        LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: dropped previously queued packet %p for ARP entry %"U16_F"\n", (void *)q, (u16_t)i));
        pbuf_free(arp_table[i].q);
 8023f9c:	7c7a      	ldrb	r2, [r7, #17]
 8023f9e:	4913      	ldr	r1, [pc, #76]	@ (8023fec <etharp_query+0x268>)
 8023fa0:	4613      	mov	r3, r2
 8023fa2:	005b      	lsls	r3, r3, #1
 8023fa4:	4413      	add	r3, r2
 8023fa6:	00db      	lsls	r3, r3, #3
 8023fa8:	440b      	add	r3, r1
 8023faa:	681b      	ldr	r3, [r3, #0]
 8023fac:	4618      	mov	r0, r3
 8023fae:	f7f6 f835 	bl	801a01c <pbuf_free>
      }
      arp_table[i].q = p;
 8023fb2:	7c7a      	ldrb	r2, [r7, #17]
 8023fb4:	490d      	ldr	r1, [pc, #52]	@ (8023fec <etharp_query+0x268>)
 8023fb6:	4613      	mov	r3, r2
 8023fb8:	005b      	lsls	r3, r3, #1
 8023fba:	4413      	add	r3, r2
 8023fbc:	00db      	lsls	r3, r3, #3
 8023fbe:	440b      	add	r3, r1
 8023fc0:	69fa      	ldr	r2, [r7, #28]
 8023fc2:	601a      	str	r2, [r3, #0]
      result = ERR_OK;
 8023fc4:	2300      	movs	r3, #0
 8023fc6:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
 8023fca:	e002      	b.n	8023fd2 <etharp_query+0x24e>
      LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: queued packet %p on ARP entry %"U16_F"\n", (void *)q, (u16_t)i));
#endif /* ARP_QUEUEING */
    } else {
      ETHARP_STATS_INC(etharp.memerr);
      LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: could not queue a copy of PBUF_REF packet %p (out of memory)\n", (void *)q));
      result = ERR_MEM;
 8023fcc:	23ff      	movs	r3, #255	@ 0xff
 8023fce:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
    }
  }
  return result;
 8023fd2:	f997 3027 	ldrsb.w	r3, [r7, #39]	@ 0x27
}
 8023fd6:	4618      	mov	r0, r3
 8023fd8:	3728      	adds	r7, #40	@ 0x28
 8023fda:	46bd      	mov	sp, r7
 8023fdc:	bd80      	pop	{r7, pc}
 8023fde:	bf00      	nop
 8023fe0:	0802fd88 	.word	0x0802fd88
 8023fe4:	0802ff34 	.word	0x0802ff34
 8023fe8:	0802fe00 	.word	0x0802fe00
 8023fec:	2402a084 	.word	0x2402a084
 8023ff0:	0802ff44 	.word	0x0802ff44
 8023ff4:	0802ff28 	.word	0x0802ff28
 8023ff8:	2402a174 	.word	0x2402a174
 8023ffc:	0802ff6c 	.word	0x0802ff6c

08024000 <etharp_raw>:
etharp_raw(struct netif *netif, const struct eth_addr *ethsrc_addr,
           const struct eth_addr *ethdst_addr,
           const struct eth_addr *hwsrc_addr, const ip4_addr_t *ipsrc_addr,
           const struct eth_addr *hwdst_addr, const ip4_addr_t *ipdst_addr,
           const u16_t opcode)
{
 8024000:	b580      	push	{r7, lr}
 8024002:	b08a      	sub	sp, #40	@ 0x28
 8024004:	af02      	add	r7, sp, #8
 8024006:	60f8      	str	r0, [r7, #12]
 8024008:	60b9      	str	r1, [r7, #8]
 802400a:	607a      	str	r2, [r7, #4]
 802400c:	603b      	str	r3, [r7, #0]
  struct pbuf *p;
  err_t result = ERR_OK;
 802400e:	2300      	movs	r3, #0
 8024010:	77fb      	strb	r3, [r7, #31]
  struct etharp_hdr *hdr;

  LWIP_ASSERT("netif != NULL", netif != NULL);
 8024012:	68fb      	ldr	r3, [r7, #12]
 8024014:	2b00      	cmp	r3, #0
 8024016:	d106      	bne.n	8024026 <etharp_raw+0x26>
 8024018:	4b3a      	ldr	r3, [pc, #232]	@ (8024104 <etharp_raw+0x104>)
 802401a:	f240 4257 	movw	r2, #1111	@ 0x457
 802401e:	493a      	ldr	r1, [pc, #232]	@ (8024108 <etharp_raw+0x108>)
 8024020:	483a      	ldr	r0, [pc, #232]	@ (802410c <etharp_raw+0x10c>)
 8024022:	f005 fa73 	bl	802950c <iprintf>

  /* allocate a pbuf for the outgoing ARP request packet */
  p = pbuf_alloc(PBUF_LINK, SIZEOF_ETHARP_HDR, PBUF_RAM);
 8024026:	f44f 7220 	mov.w	r2, #640	@ 0x280
 802402a:	211c      	movs	r1, #28
 802402c:	200e      	movs	r0, #14
 802402e:	f7f5 fcdf 	bl	80199f0 <pbuf_alloc>
 8024032:	61b8      	str	r0, [r7, #24]
  /* could allocate a pbuf for an ARP request? */
  if (p == NULL) {
 8024034:	69bb      	ldr	r3, [r7, #24]
 8024036:	2b00      	cmp	r3, #0
 8024038:	d102      	bne.n	8024040 <etharp_raw+0x40>
    LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS,
                ("etharp_raw: could not allocate pbuf for ARP request.\n"));
    ETHARP_STATS_INC(etharp.memerr);
    return ERR_MEM;
 802403a:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 802403e:	e05d      	b.n	80240fc <etharp_raw+0xfc>
  }
  LWIP_ASSERT("check that first pbuf can hold struct etharp_hdr",
 8024040:	69bb      	ldr	r3, [r7, #24]
 8024042:	895b      	ldrh	r3, [r3, #10]
 8024044:	2b1b      	cmp	r3, #27
 8024046:	d806      	bhi.n	8024056 <etharp_raw+0x56>
 8024048:	4b2e      	ldr	r3, [pc, #184]	@ (8024104 <etharp_raw+0x104>)
 802404a:	f240 4262 	movw	r2, #1122	@ 0x462
 802404e:	4930      	ldr	r1, [pc, #192]	@ (8024110 <etharp_raw+0x110>)
 8024050:	482e      	ldr	r0, [pc, #184]	@ (802410c <etharp_raw+0x10c>)
 8024052:	f005 fa5b 	bl	802950c <iprintf>
              (p->len >= SIZEOF_ETHARP_HDR));

  hdr = (struct etharp_hdr *)p->payload;
 8024056:	69bb      	ldr	r3, [r7, #24]
 8024058:	685b      	ldr	r3, [r3, #4]
 802405a:	617b      	str	r3, [r7, #20]
  LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_raw: sending raw ARP packet.\n"));
  hdr->opcode = lwip_htons(opcode);
 802405c:	8ebb      	ldrh	r3, [r7, #52]	@ 0x34
 802405e:	4618      	mov	r0, r3
 8024060:	f7f4 fafa 	bl	8018658 <lwip_htons>
 8024064:	4603      	mov	r3, r0
 8024066:	461a      	mov	r2, r3
 8024068:	697b      	ldr	r3, [r7, #20]
 802406a:	80da      	strh	r2, [r3, #6]

  LWIP_ASSERT("netif->hwaddr_len must be the same as ETH_HWADDR_LEN for etharp!",
 802406c:	68fb      	ldr	r3, [r7, #12]
 802406e:	f893 3030 	ldrb.w	r3, [r3, #48]	@ 0x30
 8024072:	2b06      	cmp	r3, #6
 8024074:	d006      	beq.n	8024084 <etharp_raw+0x84>
 8024076:	4b23      	ldr	r3, [pc, #140]	@ (8024104 <etharp_raw+0x104>)
 8024078:	f240 4269 	movw	r2, #1129	@ 0x469
 802407c:	4925      	ldr	r1, [pc, #148]	@ (8024114 <etharp_raw+0x114>)
 802407e:	4823      	ldr	r0, [pc, #140]	@ (802410c <etharp_raw+0x10c>)
 8024080:	f005 fa44 	bl	802950c <iprintf>
              (netif->hwaddr_len == ETH_HWADDR_LEN));

  /* Write the ARP MAC-Addresses */
  SMEMCPY(&hdr->shwaddr, hwsrc_addr, ETH_HWADDR_LEN);
 8024084:	697b      	ldr	r3, [r7, #20]
 8024086:	3308      	adds	r3, #8
 8024088:	2206      	movs	r2, #6
 802408a:	6839      	ldr	r1, [r7, #0]
 802408c:	4618      	mov	r0, r3
 802408e:	f005 fcc6 	bl	8029a1e <memcpy>
  SMEMCPY(&hdr->dhwaddr, hwdst_addr, ETH_HWADDR_LEN);
 8024092:	697b      	ldr	r3, [r7, #20]
 8024094:	3312      	adds	r3, #18
 8024096:	2206      	movs	r2, #6
 8024098:	6af9      	ldr	r1, [r7, #44]	@ 0x2c
 802409a:	4618      	mov	r0, r3
 802409c:	f005 fcbf 	bl	8029a1e <memcpy>
  /* Copy struct ip4_addr_wordaligned to aligned ip4_addr, to support compilers without
   * structure packing. */
  IPADDR_WORDALIGNED_COPY_FROM_IP4_ADDR_T(&hdr->sipaddr, ipsrc_addr);
 80240a0:	697b      	ldr	r3, [r7, #20]
 80240a2:	330e      	adds	r3, #14
 80240a4:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 80240a6:	6812      	ldr	r2, [r2, #0]
 80240a8:	601a      	str	r2, [r3, #0]
  IPADDR_WORDALIGNED_COPY_FROM_IP4_ADDR_T(&hdr->dipaddr, ipdst_addr);
 80240aa:	697b      	ldr	r3, [r7, #20]
 80240ac:	3318      	adds	r3, #24
 80240ae:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 80240b0:	6812      	ldr	r2, [r2, #0]
 80240b2:	601a      	str	r2, [r3, #0]

  hdr->hwtype = PP_HTONS(LWIP_IANA_HWTYPE_ETHERNET);
 80240b4:	697b      	ldr	r3, [r7, #20]
 80240b6:	2200      	movs	r2, #0
 80240b8:	701a      	strb	r2, [r3, #0]
 80240ba:	2200      	movs	r2, #0
 80240bc:	f042 0201 	orr.w	r2, r2, #1
 80240c0:	705a      	strb	r2, [r3, #1]
  hdr->proto = PP_HTONS(ETHTYPE_IP);
 80240c2:	697b      	ldr	r3, [r7, #20]
 80240c4:	2200      	movs	r2, #0
 80240c6:	f042 0208 	orr.w	r2, r2, #8
 80240ca:	709a      	strb	r2, [r3, #2]
 80240cc:	2200      	movs	r2, #0
 80240ce:	70da      	strb	r2, [r3, #3]
  /* set hwlen and protolen */
  hdr->hwlen = ETH_HWADDR_LEN;
 80240d0:	697b      	ldr	r3, [r7, #20]
 80240d2:	2206      	movs	r2, #6
 80240d4:	711a      	strb	r2, [r3, #4]
  hdr->protolen = sizeof(ip4_addr_t);
 80240d6:	697b      	ldr	r3, [r7, #20]
 80240d8:	2204      	movs	r2, #4
 80240da:	715a      	strb	r2, [r3, #5]
  if (ip4_addr_islinklocal(ipsrc_addr)) {
    ethernet_output(netif, p, ethsrc_addr, &ethbroadcast, ETHTYPE_ARP);
  } else
#endif /* LWIP_AUTOIP */
  {
    ethernet_output(netif, p, ethsrc_addr, ethdst_addr, ETHTYPE_ARP);
 80240dc:	f640 0306 	movw	r3, #2054	@ 0x806
 80240e0:	9300      	str	r3, [sp, #0]
 80240e2:	687b      	ldr	r3, [r7, #4]
 80240e4:	68ba      	ldr	r2, [r7, #8]
 80240e6:	69b9      	ldr	r1, [r7, #24]
 80240e8:	68f8      	ldr	r0, [r7, #12]
 80240ea:	f001 fd97 	bl	8025c1c <ethernet_output>
  }

  ETHARP_STATS_INC(etharp.xmit);
  /* free ARP query packet */
  pbuf_free(p);
 80240ee:	69b8      	ldr	r0, [r7, #24]
 80240f0:	f7f5 ff94 	bl	801a01c <pbuf_free>
  p = NULL;
 80240f4:	2300      	movs	r3, #0
 80240f6:	61bb      	str	r3, [r7, #24]
  /* could not allocate pbuf for ARP request */

  return result;
 80240f8:	f997 301f 	ldrsb.w	r3, [r7, #31]
}
 80240fc:	4618      	mov	r0, r3
 80240fe:	3720      	adds	r7, #32
 8024100:	46bd      	mov	sp, r7
 8024102:	bd80      	pop	{r7, pc}
 8024104:	0802fd88 	.word	0x0802fd88
 8024108:	0802fed8 	.word	0x0802fed8
 802410c:	0802fe00 	.word	0x0802fe00
 8024110:	0802ff88 	.word	0x0802ff88
 8024114:	0802ffbc 	.word	0x0802ffbc

08024118 <etharp_request_dst>:
 *         ERR_MEM if the ARP packet couldn't be allocated
 *         any other err_t on failure
 */
static err_t
etharp_request_dst(struct netif *netif, const ip4_addr_t *ipaddr, const struct eth_addr *hw_dst_addr)
{
 8024118:	b580      	push	{r7, lr}
 802411a:	b088      	sub	sp, #32
 802411c:	af04      	add	r7, sp, #16
 802411e:	60f8      	str	r0, [r7, #12]
 8024120:	60b9      	str	r1, [r7, #8]
 8024122:	607a      	str	r2, [r7, #4]
  return etharp_raw(netif, (struct eth_addr *)netif->hwaddr, hw_dst_addr,
 8024124:	68fb      	ldr	r3, [r7, #12]
 8024126:	f103 012a 	add.w	r1, r3, #42	@ 0x2a
                    (struct eth_addr *)netif->hwaddr, netif_ip4_addr(netif), &ethzero,
 802412a:	68fb      	ldr	r3, [r7, #12]
 802412c:	f103 002a 	add.w	r0, r3, #42	@ 0x2a
 8024130:	68fb      	ldr	r3, [r7, #12]
 8024132:	3304      	adds	r3, #4
  return etharp_raw(netif, (struct eth_addr *)netif->hwaddr, hw_dst_addr,
 8024134:	2201      	movs	r2, #1
 8024136:	9203      	str	r2, [sp, #12]
 8024138:	68ba      	ldr	r2, [r7, #8]
 802413a:	9202      	str	r2, [sp, #8]
 802413c:	4a06      	ldr	r2, [pc, #24]	@ (8024158 <etharp_request_dst+0x40>)
 802413e:	9201      	str	r2, [sp, #4]
 8024140:	9300      	str	r3, [sp, #0]
 8024142:	4603      	mov	r3, r0
 8024144:	687a      	ldr	r2, [r7, #4]
 8024146:	68f8      	ldr	r0, [r7, #12]
 8024148:	f7ff ff5a 	bl	8024000 <etharp_raw>
 802414c:	4603      	mov	r3, r0
                    ipaddr, ARP_REQUEST);
}
 802414e:	4618      	mov	r0, r3
 8024150:	3710      	adds	r7, #16
 8024152:	46bd      	mov	sp, r7
 8024154:	bd80      	pop	{r7, pc}
 8024156:	bf00      	nop
 8024158:	080307b4 	.word	0x080307b4

0802415c <etharp_request>:
 *         ERR_MEM if the ARP packet couldn't be allocated
 *         any other err_t on failure
 */
err_t
etharp_request(struct netif *netif, const ip4_addr_t *ipaddr)
{
 802415c:	b580      	push	{r7, lr}
 802415e:	b082      	sub	sp, #8
 8024160:	af00      	add	r7, sp, #0
 8024162:	6078      	str	r0, [r7, #4]
 8024164:	6039      	str	r1, [r7, #0]
  LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_request: sending ARP request.\n"));
  return etharp_request_dst(netif, ipaddr, &ethbroadcast);
 8024166:	4a05      	ldr	r2, [pc, #20]	@ (802417c <etharp_request+0x20>)
 8024168:	6839      	ldr	r1, [r7, #0]
 802416a:	6878      	ldr	r0, [r7, #4]
 802416c:	f7ff ffd4 	bl	8024118 <etharp_request_dst>
 8024170:	4603      	mov	r3, r0
}
 8024172:	4618      	mov	r0, r3
 8024174:	3708      	adds	r7, #8
 8024176:	46bd      	mov	sp, r7
 8024178:	bd80      	pop	{r7, pc}
 802417a:	bf00      	nop
 802417c:	080307ac 	.word	0x080307ac

08024180 <icmp_input>:
 * @param p the icmp echo request packet, p->payload pointing to the icmp header
 * @param inp the netif on which this packet was received
 */
void
icmp_input(struct pbuf *p, struct netif *inp)
{
 8024180:	b580      	push	{r7, lr}
 8024182:	b08e      	sub	sp, #56	@ 0x38
 8024184:	af04      	add	r7, sp, #16
 8024186:	6078      	str	r0, [r7, #4]
 8024188:	6039      	str	r1, [r7, #0]
  const ip4_addr_t *src;

  ICMP_STATS_INC(icmp.recv);
  MIB2_STATS_INC(mib2.icmpinmsgs);

  iphdr_in = ip4_current_header();
 802418a:	4b89      	ldr	r3, [pc, #548]	@ (80243b0 <icmp_input+0x230>)
 802418c:	689b      	ldr	r3, [r3, #8]
 802418e:	627b      	str	r3, [r7, #36]	@ 0x24
  hlen = IPH_HL_BYTES(iphdr_in);
 8024190:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8024192:	781b      	ldrb	r3, [r3, #0]
 8024194:	f003 030f 	and.w	r3, r3, #15
 8024198:	b2db      	uxtb	r3, r3
 802419a:	009b      	lsls	r3, r3, #2
 802419c:	b2db      	uxtb	r3, r3
 802419e:	847b      	strh	r3, [r7, #34]	@ 0x22
  if (hlen < IP_HLEN) {
 80241a0:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 80241a2:	2b13      	cmp	r3, #19
 80241a4:	f240 80ed 	bls.w	8024382 <icmp_input+0x202>
    LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: short IP header (%"S16_F" bytes) received\n", hlen));
    goto lenerr;
  }
  if (p->len < sizeof(u16_t) * 2) {
 80241a8:	687b      	ldr	r3, [r7, #4]
 80241aa:	895b      	ldrh	r3, [r3, #10]
 80241ac:	2b03      	cmp	r3, #3
 80241ae:	f240 80ea 	bls.w	8024386 <icmp_input+0x206>
    LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: short ICMP (%"U16_F" bytes) received\n", p->tot_len));
    goto lenerr;
  }

  type = *((u8_t *)p->payload);
 80241b2:	687b      	ldr	r3, [r7, #4]
 80241b4:	685b      	ldr	r3, [r3, #4]
 80241b6:	781b      	ldrb	r3, [r3, #0]
 80241b8:	f887 3021 	strb.w	r3, [r7, #33]	@ 0x21
#ifdef LWIP_DEBUG
  code = *(((u8_t *)p->payload) + 1);
 80241bc:	687b      	ldr	r3, [r7, #4]
 80241be:	685b      	ldr	r3, [r3, #4]
 80241c0:	785b      	ldrb	r3, [r3, #1]
 80241c2:	f887 3020 	strb.w	r3, [r7, #32]
  /* if debug is enabled but debug statement below is somehow disabled: */
  LWIP_UNUSED_ARG(code);
#endif /* LWIP_DEBUG */
  switch (type) {
 80241c6:	f897 3021 	ldrb.w	r3, [r7, #33]	@ 0x21
 80241ca:	2b00      	cmp	r3, #0
 80241cc:	f000 80d2 	beq.w	8024374 <icmp_input+0x1f4>
 80241d0:	2b08      	cmp	r3, #8
 80241d2:	f040 80d2 	bne.w	802437a <icmp_input+0x1fa>
         (as obviously, an echo request has been sent, too). */
      MIB2_STATS_INC(mib2.icmpinechoreps);
      break;
    case ICMP_ECHO:
      MIB2_STATS_INC(mib2.icmpinechos);
      src = ip4_current_dest_addr();
 80241d6:	4b77      	ldr	r3, [pc, #476]	@ (80243b4 <icmp_input+0x234>)
 80241d8:	61fb      	str	r3, [r7, #28]
      /* multicast destination address? */
      if (ip4_addr_ismulticast(ip4_current_dest_addr())) {
 80241da:	4b75      	ldr	r3, [pc, #468]	@ (80243b0 <icmp_input+0x230>)
 80241dc:	695b      	ldr	r3, [r3, #20]
 80241de:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 80241e2:	2be0      	cmp	r3, #224	@ 0xe0
 80241e4:	f000 80d6 	beq.w	8024394 <icmp_input+0x214>
        LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: Not echoing to multicast pings\n"));
        goto icmperr;
#endif /* LWIP_MULTICAST_PING */
      }
      /* broadcast destination address? */
      if (ip4_addr_isbroadcast(ip4_current_dest_addr(), ip_current_netif())) {
 80241e8:	4b71      	ldr	r3, [pc, #452]	@ (80243b0 <icmp_input+0x230>)
 80241ea:	695b      	ldr	r3, [r3, #20]
 80241ec:	4a70      	ldr	r2, [pc, #448]	@ (80243b0 <icmp_input+0x230>)
 80241ee:	6812      	ldr	r2, [r2, #0]
 80241f0:	4611      	mov	r1, r2
 80241f2:	4618      	mov	r0, r3
 80241f4:	f000 fc34 	bl	8024a60 <ip4_addr_isbroadcast_u32>
 80241f8:	4603      	mov	r3, r0
 80241fa:	2b00      	cmp	r3, #0
 80241fc:	f040 80cc 	bne.w	8024398 <icmp_input+0x218>
        LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: Not echoing to broadcast pings\n"));
        goto icmperr;
#endif /* LWIP_BROADCAST_PING */
      }
      LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: ping\n"));
      if (p->tot_len < sizeof(struct icmp_echo_hdr)) {
 8024200:	687b      	ldr	r3, [r7, #4]
 8024202:	891b      	ldrh	r3, [r3, #8]
 8024204:	2b07      	cmp	r3, #7
 8024206:	f240 80c0 	bls.w	802438a <icmp_input+0x20a>
        LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: bad ICMP echo received\n"));
        goto lenerr;
      }
#if CHECKSUM_CHECK_ICMP
      IF__NETIF_CHECKSUM_ENABLED(inp, NETIF_CHECKSUM_CHECK_ICMP) {
        if (inet_chksum_pbuf(p) != 0) {
 802420a:	6878      	ldr	r0, [r7, #4]
 802420c:	f7f4 fac1 	bl	8018792 <inet_chksum_pbuf>
 8024210:	4603      	mov	r3, r0
 8024212:	2b00      	cmp	r3, #0
 8024214:	d003      	beq.n	802421e <icmp_input+0x9e>
          LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: checksum failed for received ICMP echo\n"));
          pbuf_free(p);
 8024216:	6878      	ldr	r0, [r7, #4]
 8024218:	f7f5 ff00 	bl	801a01c <pbuf_free>
          ICMP_STATS_INC(icmp.chkerr);
          MIB2_STATS_INC(mib2.icmpinerrors);
          return;
 802421c:	e0c5      	b.n	80243aa <icmp_input+0x22a>
        }
      }
#endif
#if LWIP_ICMP_ECHO_CHECK_INPUT_PBUF_LEN
      if (pbuf_add_header(p, hlen + PBUF_LINK_HLEN + PBUF_LINK_ENCAPSULATION_HLEN)) {
 802421e:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 8024220:	330e      	adds	r3, #14
 8024222:	4619      	mov	r1, r3
 8024224:	6878      	ldr	r0, [r7, #4]
 8024226:	f7f5 fe31 	bl	8019e8c <pbuf_add_header>
 802422a:	4603      	mov	r3, r0
 802422c:	2b00      	cmp	r3, #0
 802422e:	d04b      	beq.n	80242c8 <icmp_input+0x148>
        /* p is not big enough to contain link headers
         * allocate a new one and copy p into it
         */
        struct pbuf *r;
        u16_t alloc_len = (u16_t)(p->tot_len + hlen);
 8024230:	687b      	ldr	r3, [r7, #4]
 8024232:	891a      	ldrh	r2, [r3, #8]
 8024234:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 8024236:	4413      	add	r3, r2
 8024238:	837b      	strh	r3, [r7, #26]
        if (alloc_len < p->tot_len) {
 802423a:	687b      	ldr	r3, [r7, #4]
 802423c:	891b      	ldrh	r3, [r3, #8]
 802423e:	8b7a      	ldrh	r2, [r7, #26]
 8024240:	429a      	cmp	r2, r3
 8024242:	f0c0 80ab 	bcc.w	802439c <icmp_input+0x21c>
          LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: allocating new pbuf failed (tot_len overflow)\n"));
          goto icmperr;
        }
        /* allocate new packet buffer with space for link headers */
        r = pbuf_alloc(PBUF_LINK, alloc_len, PBUF_RAM);
 8024246:	8b7b      	ldrh	r3, [r7, #26]
 8024248:	f44f 7220 	mov.w	r2, #640	@ 0x280
 802424c:	4619      	mov	r1, r3
 802424e:	200e      	movs	r0, #14
 8024250:	f7f5 fbce 	bl	80199f0 <pbuf_alloc>
 8024254:	6178      	str	r0, [r7, #20]
        if (r == NULL) {
 8024256:	697b      	ldr	r3, [r7, #20]
 8024258:	2b00      	cmp	r3, #0
 802425a:	f000 80a1 	beq.w	80243a0 <icmp_input+0x220>
          LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: allocating new pbuf failed\n"));
          goto icmperr;
        }
        if (r->len < hlen + sizeof(struct icmp_echo_hdr)) {
 802425e:	697b      	ldr	r3, [r7, #20]
 8024260:	895b      	ldrh	r3, [r3, #10]
 8024262:	461a      	mov	r2, r3
 8024264:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 8024266:	3308      	adds	r3, #8
 8024268:	429a      	cmp	r2, r3
 802426a:	d203      	bcs.n	8024274 <icmp_input+0xf4>
          LWIP_DEBUGF(ICMP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("first pbuf cannot hold the ICMP header"));
          pbuf_free(r);
 802426c:	6978      	ldr	r0, [r7, #20]
 802426e:	f7f5 fed5 	bl	801a01c <pbuf_free>
          goto icmperr;
 8024272:	e096      	b.n	80243a2 <icmp_input+0x222>
        }
        /* copy the ip header */
        MEMCPY(r->payload, iphdr_in, hlen);
 8024274:	697b      	ldr	r3, [r7, #20]
 8024276:	685b      	ldr	r3, [r3, #4]
 8024278:	8c7a      	ldrh	r2, [r7, #34]	@ 0x22
 802427a:	6a79      	ldr	r1, [r7, #36]	@ 0x24
 802427c:	4618      	mov	r0, r3
 802427e:	f005 fbce 	bl	8029a1e <memcpy>
        /* switch r->payload back to icmp header (cannot fail) */
        if (pbuf_remove_header(r, hlen)) {
 8024282:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 8024284:	4619      	mov	r1, r3
 8024286:	6978      	ldr	r0, [r7, #20]
 8024288:	f7f5 fe10 	bl	8019eac <pbuf_remove_header>
 802428c:	4603      	mov	r3, r0
 802428e:	2b00      	cmp	r3, #0
 8024290:	d009      	beq.n	80242a6 <icmp_input+0x126>
          LWIP_ASSERT("icmp_input: moving r->payload to icmp header failed\n", 0);
 8024292:	4b49      	ldr	r3, [pc, #292]	@ (80243b8 <icmp_input+0x238>)
 8024294:	22b6      	movs	r2, #182	@ 0xb6
 8024296:	4949      	ldr	r1, [pc, #292]	@ (80243bc <icmp_input+0x23c>)
 8024298:	4849      	ldr	r0, [pc, #292]	@ (80243c0 <icmp_input+0x240>)
 802429a:	f005 f937 	bl	802950c <iprintf>
          pbuf_free(r);
 802429e:	6978      	ldr	r0, [r7, #20]
 80242a0:	f7f5 febc 	bl	801a01c <pbuf_free>
          goto icmperr;
 80242a4:	e07d      	b.n	80243a2 <icmp_input+0x222>
        }
        /* copy the rest of the packet without ip header */
        if (pbuf_copy(r, p) != ERR_OK) {
 80242a6:	6879      	ldr	r1, [r7, #4]
 80242a8:	6978      	ldr	r0, [r7, #20]
 80242aa:	f7f5 ffeb 	bl	801a284 <pbuf_copy>
 80242ae:	4603      	mov	r3, r0
 80242b0:	2b00      	cmp	r3, #0
 80242b2:	d003      	beq.n	80242bc <icmp_input+0x13c>
          LWIP_DEBUGF(ICMP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("icmp_input: copying to new pbuf failed"));
          pbuf_free(r);
 80242b4:	6978      	ldr	r0, [r7, #20]
 80242b6:	f7f5 feb1 	bl	801a01c <pbuf_free>
          goto icmperr;
 80242ba:	e072      	b.n	80243a2 <icmp_input+0x222>
        }
        /* free the original p */
        pbuf_free(p);
 80242bc:	6878      	ldr	r0, [r7, #4]
 80242be:	f7f5 fead 	bl	801a01c <pbuf_free>
        /* we now have an identical copy of p that has room for link headers */
        p = r;
 80242c2:	697b      	ldr	r3, [r7, #20]
 80242c4:	607b      	str	r3, [r7, #4]
 80242c6:	e00f      	b.n	80242e8 <icmp_input+0x168>
      } else {
        /* restore p->payload to point to icmp header (cannot fail) */
        if (pbuf_remove_header(p, hlen + PBUF_LINK_HLEN + PBUF_LINK_ENCAPSULATION_HLEN)) {
 80242c8:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 80242ca:	330e      	adds	r3, #14
 80242cc:	4619      	mov	r1, r3
 80242ce:	6878      	ldr	r0, [r7, #4]
 80242d0:	f7f5 fdec 	bl	8019eac <pbuf_remove_header>
 80242d4:	4603      	mov	r3, r0
 80242d6:	2b00      	cmp	r3, #0
 80242d8:	d006      	beq.n	80242e8 <icmp_input+0x168>
          LWIP_ASSERT("icmp_input: restoring original p->payload failed\n", 0);
 80242da:	4b37      	ldr	r3, [pc, #220]	@ (80243b8 <icmp_input+0x238>)
 80242dc:	22c7      	movs	r2, #199	@ 0xc7
 80242de:	4939      	ldr	r1, [pc, #228]	@ (80243c4 <icmp_input+0x244>)
 80242e0:	4837      	ldr	r0, [pc, #220]	@ (80243c0 <icmp_input+0x240>)
 80242e2:	f005 f913 	bl	802950c <iprintf>
          goto icmperr;
 80242e6:	e05c      	b.n	80243a2 <icmp_input+0x222>
      }
#endif /* LWIP_ICMP_ECHO_CHECK_INPUT_PBUF_LEN */
      /* At this point, all checks are OK. */
      /* We generate an answer by switching the dest and src ip addresses,
       * setting the icmp type to ECHO_RESPONSE and updating the checksum. */
      iecho = (struct icmp_echo_hdr *)p->payload;
 80242e8:	687b      	ldr	r3, [r7, #4]
 80242ea:	685b      	ldr	r3, [r3, #4]
 80242ec:	613b      	str	r3, [r7, #16]
      if (pbuf_add_header(p, hlen)) {
 80242ee:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 80242f0:	4619      	mov	r1, r3
 80242f2:	6878      	ldr	r0, [r7, #4]
 80242f4:	f7f5 fdca 	bl	8019e8c <pbuf_add_header>
 80242f8:	4603      	mov	r3, r0
 80242fa:	2b00      	cmp	r3, #0
 80242fc:	d13c      	bne.n	8024378 <icmp_input+0x1f8>
        LWIP_DEBUGF(ICMP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("Can't move over header in packet"));
      } else {
        err_t ret;
        struct ip_hdr *iphdr = (struct ip_hdr *)p->payload;
 80242fe:	687b      	ldr	r3, [r7, #4]
 8024300:	685b      	ldr	r3, [r3, #4]
 8024302:	60fb      	str	r3, [r7, #12]
        ip4_addr_copy(iphdr->src, *src);
 8024304:	69fb      	ldr	r3, [r7, #28]
 8024306:	681a      	ldr	r2, [r3, #0]
 8024308:	68fb      	ldr	r3, [r7, #12]
 802430a:	60da      	str	r2, [r3, #12]
        ip4_addr_copy(iphdr->dest, *ip4_current_src_addr());
 802430c:	4b28      	ldr	r3, [pc, #160]	@ (80243b0 <icmp_input+0x230>)
 802430e:	691a      	ldr	r2, [r3, #16]
 8024310:	68fb      	ldr	r3, [r7, #12]
 8024312:	611a      	str	r2, [r3, #16]
        ICMPH_TYPE_SET(iecho, ICMP_ER);
 8024314:	693b      	ldr	r3, [r7, #16]
 8024316:	2200      	movs	r2, #0
 8024318:	701a      	strb	r2, [r3, #0]
#if CHECKSUM_GEN_ICMP
        IF__NETIF_CHECKSUM_ENABLED(inp, NETIF_CHECKSUM_GEN_ICMP) {
          /* adjust the checksum */
          if (iecho->chksum > PP_HTONS(0xffffU - (ICMP_ECHO << 8))) {
 802431a:	693b      	ldr	r3, [r7, #16]
 802431c:	885b      	ldrh	r3, [r3, #2]
 802431e:	b29b      	uxth	r3, r3
 8024320:	f64f 72f7 	movw	r2, #65527	@ 0xfff7
 8024324:	4293      	cmp	r3, r2
 8024326:	d907      	bls.n	8024338 <icmp_input+0x1b8>
            iecho->chksum = (u16_t)(iecho->chksum + PP_HTONS((u16_t)(ICMP_ECHO << 8)) + 1);
 8024328:	693b      	ldr	r3, [r7, #16]
 802432a:	885b      	ldrh	r3, [r3, #2]
 802432c:	b29b      	uxth	r3, r3
 802432e:	3309      	adds	r3, #9
 8024330:	b29a      	uxth	r2, r3
 8024332:	693b      	ldr	r3, [r7, #16]
 8024334:	805a      	strh	r2, [r3, #2]
 8024336:	e006      	b.n	8024346 <icmp_input+0x1c6>
          } else {
            iecho->chksum = (u16_t)(iecho->chksum + PP_HTONS(ICMP_ECHO << 8));
 8024338:	693b      	ldr	r3, [r7, #16]
 802433a:	885b      	ldrh	r3, [r3, #2]
 802433c:	b29b      	uxth	r3, r3
 802433e:	3308      	adds	r3, #8
 8024340:	b29a      	uxth	r2, r3
 8024342:	693b      	ldr	r3, [r7, #16]
 8024344:	805a      	strh	r2, [r3, #2]
#else /* CHECKSUM_GEN_ICMP */
        iecho->chksum = 0;
#endif /* CHECKSUM_GEN_ICMP */

        /* Set the correct TTL and recalculate the header checksum. */
        IPH_TTL_SET(iphdr, ICMP_TTL);
 8024346:	68fb      	ldr	r3, [r7, #12]
 8024348:	22ff      	movs	r2, #255	@ 0xff
 802434a:	721a      	strb	r2, [r3, #8]
        IPH_CHKSUM_SET(iphdr, 0);
 802434c:	68fb      	ldr	r3, [r7, #12]
 802434e:	2200      	movs	r2, #0
 8024350:	729a      	strb	r2, [r3, #10]
 8024352:	2200      	movs	r2, #0
 8024354:	72da      	strb	r2, [r3, #11]
        MIB2_STATS_INC(mib2.icmpoutmsgs);
        /* increase number of echo replies attempted to send */
        MIB2_STATS_INC(mib2.icmpoutechoreps);

        /* send an ICMP packet */
        ret = ip4_output_if(p, src, LWIP_IP_HDRINCL,
 8024356:	683b      	ldr	r3, [r7, #0]
 8024358:	9302      	str	r3, [sp, #8]
 802435a:	2301      	movs	r3, #1
 802435c:	9301      	str	r3, [sp, #4]
 802435e:	2300      	movs	r3, #0
 8024360:	9300      	str	r3, [sp, #0]
 8024362:	23ff      	movs	r3, #255	@ 0xff
 8024364:	2200      	movs	r2, #0
 8024366:	69f9      	ldr	r1, [r7, #28]
 8024368:	6878      	ldr	r0, [r7, #4]
 802436a:	f000 fa9f 	bl	80248ac <ip4_output_if>
 802436e:	4603      	mov	r3, r0
 8024370:	72fb      	strb	r3, [r7, #11]
                            ICMP_TTL, 0, IP_PROTO_ICMP, inp);
        if (ret != ERR_OK) {
          LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: ip_output_if returned an error: %s\n", lwip_strerr(ret)));
        }
      }
      break;
 8024372:	e001      	b.n	8024378 <icmp_input+0x1f8>
      break;
 8024374:	bf00      	nop
 8024376:	e000      	b.n	802437a <icmp_input+0x1fa>
      break;
 8024378:	bf00      	nop
      LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: ICMP type %"S16_F" code %"S16_F" not supported.\n",
                               (s16_t)type, (s16_t)code));
      ICMP_STATS_INC(icmp.proterr);
      ICMP_STATS_INC(icmp.drop);
  }
  pbuf_free(p);
 802437a:	6878      	ldr	r0, [r7, #4]
 802437c:	f7f5 fe4e 	bl	801a01c <pbuf_free>
  return;
 8024380:	e013      	b.n	80243aa <icmp_input+0x22a>
    goto lenerr;
 8024382:	bf00      	nop
 8024384:	e002      	b.n	802438c <icmp_input+0x20c>
    goto lenerr;
 8024386:	bf00      	nop
 8024388:	e000      	b.n	802438c <icmp_input+0x20c>
        goto lenerr;
 802438a:	bf00      	nop
lenerr:
  pbuf_free(p);
 802438c:	6878      	ldr	r0, [r7, #4]
 802438e:	f7f5 fe45 	bl	801a01c <pbuf_free>
  ICMP_STATS_INC(icmp.lenerr);
  MIB2_STATS_INC(mib2.icmpinerrors);
  return;
 8024392:	e00a      	b.n	80243aa <icmp_input+0x22a>
        goto icmperr;
 8024394:	bf00      	nop
 8024396:	e004      	b.n	80243a2 <icmp_input+0x222>
        goto icmperr;
 8024398:	bf00      	nop
 802439a:	e002      	b.n	80243a2 <icmp_input+0x222>
          goto icmperr;
 802439c:	bf00      	nop
 802439e:	e000      	b.n	80243a2 <icmp_input+0x222>
          goto icmperr;
 80243a0:	bf00      	nop
#if LWIP_ICMP_ECHO_CHECK_INPUT_PBUF_LEN || !LWIP_MULTICAST_PING || !LWIP_BROADCAST_PING
icmperr:
  pbuf_free(p);
 80243a2:	6878      	ldr	r0, [r7, #4]
 80243a4:	f7f5 fe3a 	bl	801a01c <pbuf_free>
  ICMP_STATS_INC(icmp.err);
  MIB2_STATS_INC(mib2.icmpinerrors);
  return;
 80243a8:	bf00      	nop
#endif /* LWIP_ICMP_ECHO_CHECK_INPUT_PBUF_LEN || !LWIP_MULTICAST_PING || !LWIP_BROADCAST_PING */
}
 80243aa:	3728      	adds	r7, #40	@ 0x28
 80243ac:	46bd      	mov	sp, r7
 80243ae:	bd80      	pop	{r7, pc}
 80243b0:	2402349c 	.word	0x2402349c
 80243b4:	240234b0 	.word	0x240234b0
 80243b8:	08030000 	.word	0x08030000
 80243bc:	08030038 	.word	0x08030038
 80243c0:	08030070 	.word	0x08030070
 80243c4:	08030098 	.word	0x08030098

080243c8 <icmp_dest_unreach>:
 *          p->payload pointing to the IP header
 * @param t type of the 'unreachable' packet
 */
void
icmp_dest_unreach(struct pbuf *p, enum icmp_dur_type t)
{
 80243c8:	b580      	push	{r7, lr}
 80243ca:	b082      	sub	sp, #8
 80243cc:	af00      	add	r7, sp, #0
 80243ce:	6078      	str	r0, [r7, #4]
 80243d0:	460b      	mov	r3, r1
 80243d2:	70fb      	strb	r3, [r7, #3]
  MIB2_STATS_INC(mib2.icmpoutdestunreachs);
  icmp_send_response(p, ICMP_DUR, t);
 80243d4:	78fb      	ldrb	r3, [r7, #3]
 80243d6:	461a      	mov	r2, r3
 80243d8:	2103      	movs	r1, #3
 80243da:	6878      	ldr	r0, [r7, #4]
 80243dc:	f000 f814 	bl	8024408 <icmp_send_response>
}
 80243e0:	bf00      	nop
 80243e2:	3708      	adds	r7, #8
 80243e4:	46bd      	mov	sp, r7
 80243e6:	bd80      	pop	{r7, pc}

080243e8 <icmp_time_exceeded>:
 *          p->payload pointing to the IP header
 * @param t type of the 'time exceeded' packet
 */
void
icmp_time_exceeded(struct pbuf *p, enum icmp_te_type t)
{
 80243e8:	b580      	push	{r7, lr}
 80243ea:	b082      	sub	sp, #8
 80243ec:	af00      	add	r7, sp, #0
 80243ee:	6078      	str	r0, [r7, #4]
 80243f0:	460b      	mov	r3, r1
 80243f2:	70fb      	strb	r3, [r7, #3]
  MIB2_STATS_INC(mib2.icmpouttimeexcds);
  icmp_send_response(p, ICMP_TE, t);
 80243f4:	78fb      	ldrb	r3, [r7, #3]
 80243f6:	461a      	mov	r2, r3
 80243f8:	210b      	movs	r1, #11
 80243fa:	6878      	ldr	r0, [r7, #4]
 80243fc:	f000 f804 	bl	8024408 <icmp_send_response>
}
 8024400:	bf00      	nop
 8024402:	3708      	adds	r7, #8
 8024404:	46bd      	mov	sp, r7
 8024406:	bd80      	pop	{r7, pc}

08024408 <icmp_send_response>:
 * @param type Type of the ICMP header
 * @param code Code of the ICMP header
 */
static void
icmp_send_response(struct pbuf *p, u8_t type, u8_t code)
{
 8024408:	b580      	push	{r7, lr}
 802440a:	b08c      	sub	sp, #48	@ 0x30
 802440c:	af04      	add	r7, sp, #16
 802440e:	6078      	str	r0, [r7, #4]
 8024410:	460b      	mov	r3, r1
 8024412:	70fb      	strb	r3, [r7, #3]
 8024414:	4613      	mov	r3, r2
 8024416:	70bb      	strb	r3, [r7, #2]

  /* increase number of messages attempted to send */
  MIB2_STATS_INC(mib2.icmpoutmsgs);

  /* ICMP header + IP header + 8 bytes of data */
  q = pbuf_alloc(PBUF_IP, sizeof(struct icmp_echo_hdr) + IP_HLEN + ICMP_DEST_UNREACH_DATASIZE,
 8024418:	f44f 7220 	mov.w	r2, #640	@ 0x280
 802441c:	2124      	movs	r1, #36	@ 0x24
 802441e:	2022      	movs	r0, #34	@ 0x22
 8024420:	f7f5 fae6 	bl	80199f0 <pbuf_alloc>
 8024424:	61b8      	str	r0, [r7, #24]
                 PBUF_RAM);
  if (q == NULL) {
 8024426:	69bb      	ldr	r3, [r7, #24]
 8024428:	2b00      	cmp	r3, #0
 802442a:	d056      	beq.n	80244da <icmp_send_response+0xd2>
    LWIP_DEBUGF(ICMP_DEBUG, ("icmp_time_exceeded: failed to allocate pbuf for ICMP packet.\n"));
    MIB2_STATS_INC(mib2.icmpouterrors);
    return;
  }
  LWIP_ASSERT("check that first pbuf can hold icmp message",
 802442c:	69bb      	ldr	r3, [r7, #24]
 802442e:	895b      	ldrh	r3, [r3, #10]
 8024430:	2b23      	cmp	r3, #35	@ 0x23
 8024432:	d806      	bhi.n	8024442 <icmp_send_response+0x3a>
 8024434:	4b2b      	ldr	r3, [pc, #172]	@ (80244e4 <icmp_send_response+0xdc>)
 8024436:	f44f 72b4 	mov.w	r2, #360	@ 0x168
 802443a:	492b      	ldr	r1, [pc, #172]	@ (80244e8 <icmp_send_response+0xe0>)
 802443c:	482b      	ldr	r0, [pc, #172]	@ (80244ec <icmp_send_response+0xe4>)
 802443e:	f005 f865 	bl	802950c <iprintf>
              (q->len >= (sizeof(struct icmp_echo_hdr) + IP_HLEN + ICMP_DEST_UNREACH_DATASIZE)));

  iphdr = (struct ip_hdr *)p->payload;
 8024442:	687b      	ldr	r3, [r7, #4]
 8024444:	685b      	ldr	r3, [r3, #4]
 8024446:	617b      	str	r3, [r7, #20]
  ip4_addr_debug_print_val(ICMP_DEBUG, iphdr->src);
  LWIP_DEBUGF(ICMP_DEBUG, (" to "));
  ip4_addr_debug_print_val(ICMP_DEBUG, iphdr->dest);
  LWIP_DEBUGF(ICMP_DEBUG, ("\n"));

  icmphdr = (struct icmp_echo_hdr *)q->payload;
 8024448:	69bb      	ldr	r3, [r7, #24]
 802444a:	685b      	ldr	r3, [r3, #4]
 802444c:	613b      	str	r3, [r7, #16]
  icmphdr->type = type;
 802444e:	693b      	ldr	r3, [r7, #16]
 8024450:	78fa      	ldrb	r2, [r7, #3]
 8024452:	701a      	strb	r2, [r3, #0]
  icmphdr->code = code;
 8024454:	693b      	ldr	r3, [r7, #16]
 8024456:	78ba      	ldrb	r2, [r7, #2]
 8024458:	705a      	strb	r2, [r3, #1]
  icmphdr->id = 0;
 802445a:	693b      	ldr	r3, [r7, #16]
 802445c:	2200      	movs	r2, #0
 802445e:	711a      	strb	r2, [r3, #4]
 8024460:	2200      	movs	r2, #0
 8024462:	715a      	strb	r2, [r3, #5]
  icmphdr->seqno = 0;
 8024464:	693b      	ldr	r3, [r7, #16]
 8024466:	2200      	movs	r2, #0
 8024468:	719a      	strb	r2, [r3, #6]
 802446a:	2200      	movs	r2, #0
 802446c:	71da      	strb	r2, [r3, #7]

  /* copy fields from original packet */
  SMEMCPY((u8_t *)q->payload + sizeof(struct icmp_echo_hdr), (u8_t *)p->payload,
 802446e:	69bb      	ldr	r3, [r7, #24]
 8024470:	685b      	ldr	r3, [r3, #4]
 8024472:	f103 0008 	add.w	r0, r3, #8
 8024476:	687b      	ldr	r3, [r7, #4]
 8024478:	685b      	ldr	r3, [r3, #4]
 802447a:	221c      	movs	r2, #28
 802447c:	4619      	mov	r1, r3
 802447e:	f005 face 	bl	8029a1e <memcpy>
          IP_HLEN + ICMP_DEST_UNREACH_DATASIZE);

  ip4_addr_copy(iphdr_src, iphdr->src);
 8024482:	697b      	ldr	r3, [r7, #20]
 8024484:	68db      	ldr	r3, [r3, #12]
 8024486:	60fb      	str	r3, [r7, #12]
    ip4_addr_t iphdr_dst;
    ip4_addr_copy(iphdr_dst, iphdr->dest);
    netif = ip4_route_src(&iphdr_dst, &iphdr_src);
  }
#else
  netif = ip4_route(&iphdr_src);
 8024488:	f107 030c 	add.w	r3, r7, #12
 802448c:	4618      	mov	r0, r3
 802448e:	f000 f82f 	bl	80244f0 <ip4_route>
 8024492:	61f8      	str	r0, [r7, #28]
#endif
  if (netif != NULL) {
 8024494:	69fb      	ldr	r3, [r7, #28]
 8024496:	2b00      	cmp	r3, #0
 8024498:	d01b      	beq.n	80244d2 <icmp_send_response+0xca>
    /* calculate checksum */
    icmphdr->chksum = 0;
 802449a:	693b      	ldr	r3, [r7, #16]
 802449c:	2200      	movs	r2, #0
 802449e:	709a      	strb	r2, [r3, #2]
 80244a0:	2200      	movs	r2, #0
 80244a2:	70da      	strb	r2, [r3, #3]
#if CHECKSUM_GEN_ICMP
    IF__NETIF_CHECKSUM_ENABLED(netif, NETIF_CHECKSUM_GEN_ICMP) {
      icmphdr->chksum = inet_chksum(icmphdr, q->len);
 80244a4:	69bb      	ldr	r3, [r7, #24]
 80244a6:	895b      	ldrh	r3, [r3, #10]
 80244a8:	4619      	mov	r1, r3
 80244aa:	6938      	ldr	r0, [r7, #16]
 80244ac:	f7f4 f95f 	bl	801876e <inet_chksum>
 80244b0:	4603      	mov	r3, r0
 80244b2:	461a      	mov	r2, r3
 80244b4:	693b      	ldr	r3, [r7, #16]
 80244b6:	805a      	strh	r2, [r3, #2]
    }
#endif
    ICMP_STATS_INC(icmp.xmit);
    ip4_output_if(q, NULL, &iphdr_src, ICMP_TTL, 0, IP_PROTO_ICMP, netif);
 80244b8:	f107 020c 	add.w	r2, r7, #12
 80244bc:	69fb      	ldr	r3, [r7, #28]
 80244be:	9302      	str	r3, [sp, #8]
 80244c0:	2301      	movs	r3, #1
 80244c2:	9301      	str	r3, [sp, #4]
 80244c4:	2300      	movs	r3, #0
 80244c6:	9300      	str	r3, [sp, #0]
 80244c8:	23ff      	movs	r3, #255	@ 0xff
 80244ca:	2100      	movs	r1, #0
 80244cc:	69b8      	ldr	r0, [r7, #24]
 80244ce:	f000 f9ed 	bl	80248ac <ip4_output_if>
  }
  pbuf_free(q);
 80244d2:	69b8      	ldr	r0, [r7, #24]
 80244d4:	f7f5 fda2 	bl	801a01c <pbuf_free>
 80244d8:	e000      	b.n	80244dc <icmp_send_response+0xd4>
    return;
 80244da:	bf00      	nop
}
 80244dc:	3720      	adds	r7, #32
 80244de:	46bd      	mov	sp, r7
 80244e0:	bd80      	pop	{r7, pc}
 80244e2:	bf00      	nop
 80244e4:	08030000 	.word	0x08030000
 80244e8:	080300cc 	.word	0x080300cc
 80244ec:	08030070 	.word	0x08030070

080244f0 <ip4_route>:
 * @param dest the destination IP address for which to find the route
 * @return the netif on which to send to reach dest
 */
struct netif *
ip4_route(const ip4_addr_t *dest)
{
 80244f0:	b580      	push	{r7, lr}
 80244f2:	b084      	sub	sp, #16
 80244f4:	af00      	add	r7, sp, #0
 80244f6:	6078      	str	r0, [r7, #4]
#if !LWIP_SINGLE_NETIF
  struct netif *netif;

  LWIP_ASSERT_CORE_LOCKED();
 80244f8:	f7eb fdba 	bl	8010070 <sys_check_core_locking>

  /* bug #54569: in case LWIP_SINGLE_NETIF=1 and LWIP_DEBUGF() disabled, the following loop is optimized away */
  LWIP_UNUSED_ARG(dest);

  /* iterate through netifs */
  NETIF_FOREACH(netif) {
 80244fc:	4b32      	ldr	r3, [pc, #200]	@ (80245c8 <ip4_route+0xd8>)
 80244fe:	681b      	ldr	r3, [r3, #0]
 8024500:	60fb      	str	r3, [r7, #12]
 8024502:	e036      	b.n	8024572 <ip4_route+0x82>
    /* is the netif up, does it have a link and a valid address? */
    if (netif_is_up(netif) && netif_is_link_up(netif) && !ip4_addr_isany_val(*netif_ip4_addr(netif))) {
 8024504:	68fb      	ldr	r3, [r7, #12]
 8024506:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 802450a:	f003 0301 	and.w	r3, r3, #1
 802450e:	b2db      	uxtb	r3, r3
 8024510:	2b00      	cmp	r3, #0
 8024512:	d02b      	beq.n	802456c <ip4_route+0x7c>
 8024514:	68fb      	ldr	r3, [r7, #12]
 8024516:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 802451a:	089b      	lsrs	r3, r3, #2
 802451c:	f003 0301 	and.w	r3, r3, #1
 8024520:	b2db      	uxtb	r3, r3
 8024522:	2b00      	cmp	r3, #0
 8024524:	d022      	beq.n	802456c <ip4_route+0x7c>
 8024526:	68fb      	ldr	r3, [r7, #12]
 8024528:	3304      	adds	r3, #4
 802452a:	681b      	ldr	r3, [r3, #0]
 802452c:	2b00      	cmp	r3, #0
 802452e:	d01d      	beq.n	802456c <ip4_route+0x7c>
      /* network mask matches? */
      if (ip4_addr_netcmp(dest, netif_ip4_addr(netif), netif_ip4_netmask(netif))) {
 8024530:	687b      	ldr	r3, [r7, #4]
 8024532:	681a      	ldr	r2, [r3, #0]
 8024534:	68fb      	ldr	r3, [r7, #12]
 8024536:	3304      	adds	r3, #4
 8024538:	681b      	ldr	r3, [r3, #0]
 802453a:	405a      	eors	r2, r3
 802453c:	68fb      	ldr	r3, [r7, #12]
 802453e:	3308      	adds	r3, #8
 8024540:	681b      	ldr	r3, [r3, #0]
 8024542:	4013      	ands	r3, r2
 8024544:	2b00      	cmp	r3, #0
 8024546:	d101      	bne.n	802454c <ip4_route+0x5c>
        /* return netif on which to forward IP packet */
        return netif;
 8024548:	68fb      	ldr	r3, [r7, #12]
 802454a:	e038      	b.n	80245be <ip4_route+0xce>
      }
      /* gateway matches on a non broadcast interface? (i.e. peer in a point to point interface) */
      if (((netif->flags & NETIF_FLAG_BROADCAST) == 0) && ip4_addr_cmp(dest, netif_ip4_gw(netif))) {
 802454c:	68fb      	ldr	r3, [r7, #12]
 802454e:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 8024552:	f003 0302 	and.w	r3, r3, #2
 8024556:	2b00      	cmp	r3, #0
 8024558:	d108      	bne.n	802456c <ip4_route+0x7c>
 802455a:	687b      	ldr	r3, [r7, #4]
 802455c:	681a      	ldr	r2, [r3, #0]
 802455e:	68fb      	ldr	r3, [r7, #12]
 8024560:	330c      	adds	r3, #12
 8024562:	681b      	ldr	r3, [r3, #0]
 8024564:	429a      	cmp	r2, r3
 8024566:	d101      	bne.n	802456c <ip4_route+0x7c>
        /* return netif on which to forward IP packet */
        return netif;
 8024568:	68fb      	ldr	r3, [r7, #12]
 802456a:	e028      	b.n	80245be <ip4_route+0xce>
  NETIF_FOREACH(netif) {
 802456c:	68fb      	ldr	r3, [r7, #12]
 802456e:	681b      	ldr	r3, [r3, #0]
 8024570:	60fb      	str	r3, [r7, #12]
 8024572:	68fb      	ldr	r3, [r7, #12]
 8024574:	2b00      	cmp	r3, #0
 8024576:	d1c5      	bne.n	8024504 <ip4_route+0x14>
    return netif;
  }
#endif
#endif /* !LWIP_SINGLE_NETIF */

  if ((netif_default == NULL) || !netif_is_up(netif_default) || !netif_is_link_up(netif_default) ||
 8024578:	4b14      	ldr	r3, [pc, #80]	@ (80245cc <ip4_route+0xdc>)
 802457a:	681b      	ldr	r3, [r3, #0]
 802457c:	2b00      	cmp	r3, #0
 802457e:	d01a      	beq.n	80245b6 <ip4_route+0xc6>
 8024580:	4b12      	ldr	r3, [pc, #72]	@ (80245cc <ip4_route+0xdc>)
 8024582:	681b      	ldr	r3, [r3, #0]
 8024584:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 8024588:	f003 0301 	and.w	r3, r3, #1
 802458c:	2b00      	cmp	r3, #0
 802458e:	d012      	beq.n	80245b6 <ip4_route+0xc6>
 8024590:	4b0e      	ldr	r3, [pc, #56]	@ (80245cc <ip4_route+0xdc>)
 8024592:	681b      	ldr	r3, [r3, #0]
 8024594:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 8024598:	f003 0304 	and.w	r3, r3, #4
 802459c:	2b00      	cmp	r3, #0
 802459e:	d00a      	beq.n	80245b6 <ip4_route+0xc6>
      ip4_addr_isany_val(*netif_ip4_addr(netif_default)) || ip4_addr_isloopback(dest)) {
 80245a0:	4b0a      	ldr	r3, [pc, #40]	@ (80245cc <ip4_route+0xdc>)
 80245a2:	681b      	ldr	r3, [r3, #0]
 80245a4:	3304      	adds	r3, #4
 80245a6:	681b      	ldr	r3, [r3, #0]
  if ((netif_default == NULL) || !netif_is_up(netif_default) || !netif_is_link_up(netif_default) ||
 80245a8:	2b00      	cmp	r3, #0
 80245aa:	d004      	beq.n	80245b6 <ip4_route+0xc6>
      ip4_addr_isany_val(*netif_ip4_addr(netif_default)) || ip4_addr_isloopback(dest)) {
 80245ac:	687b      	ldr	r3, [r7, #4]
 80245ae:	681b      	ldr	r3, [r3, #0]
 80245b0:	b2db      	uxtb	r3, r3
 80245b2:	2b7f      	cmp	r3, #127	@ 0x7f
 80245b4:	d101      	bne.n	80245ba <ip4_route+0xca>
       If this is not good enough for you, use LWIP_HOOK_IP4_ROUTE() */
    LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("ip4_route: No route to %"U16_F".%"U16_F".%"U16_F".%"U16_F"\n",
                ip4_addr1_16(dest), ip4_addr2_16(dest), ip4_addr3_16(dest), ip4_addr4_16(dest)));
    IP_STATS_INC(ip.rterr);
    MIB2_STATS_INC(mib2.ipoutnoroutes);
    return NULL;
 80245b6:	2300      	movs	r3, #0
 80245b8:	e001      	b.n	80245be <ip4_route+0xce>
  }

  return netif_default;
 80245ba:	4b04      	ldr	r3, [pc, #16]	@ (80245cc <ip4_route+0xdc>)
 80245bc:	681b      	ldr	r3, [r3, #0]
}
 80245be:	4618      	mov	r0, r3
 80245c0:	3710      	adds	r7, #16
 80245c2:	46bd      	mov	sp, r7
 80245c4:	bd80      	pop	{r7, pc}
 80245c6:	bf00      	nop
 80245c8:	24029fe0 	.word	0x24029fe0
 80245cc:	24029fe4 	.word	0x24029fe4

080245d0 <ip4_input_accept>:
#endif /* IP_FORWARD */

/** Return true if the current input packet should be accepted on this netif */
static int
ip4_input_accept(struct netif *netif)
{
 80245d0:	b580      	push	{r7, lr}
 80245d2:	b082      	sub	sp, #8
 80245d4:	af00      	add	r7, sp, #0
 80245d6:	6078      	str	r0, [r7, #4]
                         ip4_addr_get_u32(ip4_current_dest_addr()) & ip4_addr_get_u32(netif_ip4_netmask(netif)),
                         ip4_addr_get_u32(netif_ip4_addr(netif)) & ip4_addr_get_u32(netif_ip4_netmask(netif)),
                         ip4_addr_get_u32(ip4_current_dest_addr()) & ~ip4_addr_get_u32(netif_ip4_netmask(netif))));

  /* interface is up and configured? */
  if ((netif_is_up(netif)) && (!ip4_addr_isany_val(*netif_ip4_addr(netif)))) {
 80245d8:	687b      	ldr	r3, [r7, #4]
 80245da:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 80245de:	f003 0301 	and.w	r3, r3, #1
 80245e2:	b2db      	uxtb	r3, r3
 80245e4:	2b00      	cmp	r3, #0
 80245e6:	d016      	beq.n	8024616 <ip4_input_accept+0x46>
 80245e8:	687b      	ldr	r3, [r7, #4]
 80245ea:	3304      	adds	r3, #4
 80245ec:	681b      	ldr	r3, [r3, #0]
 80245ee:	2b00      	cmp	r3, #0
 80245f0:	d011      	beq.n	8024616 <ip4_input_accept+0x46>
    /* unicast to this interface address? */
    if (ip4_addr_cmp(ip4_current_dest_addr(), netif_ip4_addr(netif)) ||
 80245f2:	4b0b      	ldr	r3, [pc, #44]	@ (8024620 <ip4_input_accept+0x50>)
 80245f4:	695a      	ldr	r2, [r3, #20]
 80245f6:	687b      	ldr	r3, [r7, #4]
 80245f8:	3304      	adds	r3, #4
 80245fa:	681b      	ldr	r3, [r3, #0]
 80245fc:	429a      	cmp	r2, r3
 80245fe:	d008      	beq.n	8024612 <ip4_input_accept+0x42>
        /* or broadcast on this interface network address? */
        ip4_addr_isbroadcast(ip4_current_dest_addr(), netif)
 8024600:	4b07      	ldr	r3, [pc, #28]	@ (8024620 <ip4_input_accept+0x50>)
 8024602:	695b      	ldr	r3, [r3, #20]
 8024604:	6879      	ldr	r1, [r7, #4]
 8024606:	4618      	mov	r0, r3
 8024608:	f000 fa2a 	bl	8024a60 <ip4_addr_isbroadcast_u32>
 802460c:	4603      	mov	r3, r0
    if (ip4_addr_cmp(ip4_current_dest_addr(), netif_ip4_addr(netif)) ||
 802460e:	2b00      	cmp	r3, #0
 8024610:	d001      	beq.n	8024616 <ip4_input_accept+0x46>
#endif /* LWIP_NETIF_LOOPBACK && !LWIP_HAVE_LOOPIF */
       ) {
      LWIP_DEBUGF(IP_DEBUG, ("ip4_input: packet accepted on interface %c%c\n",
                             netif->name[0], netif->name[1]));
      /* accept on this netif */
      return 1;
 8024612:	2301      	movs	r3, #1
 8024614:	e000      	b.n	8024618 <ip4_input_accept+0x48>
      /* accept on this netif */
      return 1;
    }
#endif /* LWIP_AUTOIP */
  }
  return 0;
 8024616:	2300      	movs	r3, #0
}
 8024618:	4618      	mov	r0, r3
 802461a:	3708      	adds	r7, #8
 802461c:	46bd      	mov	sp, r7
 802461e:	bd80      	pop	{r7, pc}
 8024620:	2402349c 	.word	0x2402349c

08024624 <ip4_input>:
 * @return ERR_OK if the packet was processed (could return ERR_* if it wasn't
 *         processed, but currently always returns ERR_OK)
 */
err_t
ip4_input(struct pbuf *p, struct netif *inp)
{
 8024624:	b580      	push	{r7, lr}
 8024626:	b088      	sub	sp, #32
 8024628:	af00      	add	r7, sp, #0
 802462a:	6078      	str	r0, [r7, #4]
 802462c:	6039      	str	r1, [r7, #0]
  const struct ip_hdr *iphdr;
  struct netif *netif;
  u16_t iphdr_hlen;
  u16_t iphdr_len;
#if IP_ACCEPT_LINK_LAYER_ADDRESSING || LWIP_IGMP
  int check_ip_src = 1;
 802462e:	2301      	movs	r3, #1
 8024630:	617b      	str	r3, [r7, #20]
#endif /* IP_ACCEPT_LINK_LAYER_ADDRESSING || LWIP_IGMP */
#if LWIP_RAW
  raw_input_state_t raw_status;
#endif /* LWIP_RAW */

  LWIP_ASSERT_CORE_LOCKED();
 8024632:	f7eb fd1d 	bl	8010070 <sys_check_core_locking>

  IP_STATS_INC(ip.recv);
  MIB2_STATS_INC(mib2.ipinreceives);

  /* identify the IP header */
  iphdr = (struct ip_hdr *)p->payload;
 8024636:	687b      	ldr	r3, [r7, #4]
 8024638:	685b      	ldr	r3, [r3, #4]
 802463a:	613b      	str	r3, [r7, #16]
  if (IPH_V(iphdr) != 4) {
 802463c:	693b      	ldr	r3, [r7, #16]
 802463e:	781b      	ldrb	r3, [r3, #0]
 8024640:	091b      	lsrs	r3, r3, #4
 8024642:	b2db      	uxtb	r3, r3
 8024644:	2b04      	cmp	r3, #4
 8024646:	d004      	beq.n	8024652 <ip4_input+0x2e>
    LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_WARNING, ("IP packet dropped due to bad version number %"U16_F"\n", (u16_t)IPH_V(iphdr)));
    ip4_debug_print(p);
    pbuf_free(p);
 8024648:	6878      	ldr	r0, [r7, #4]
 802464a:	f7f5 fce7 	bl	801a01c <pbuf_free>
    IP_STATS_INC(ip.err);
    IP_STATS_INC(ip.drop);
    MIB2_STATS_INC(mib2.ipinhdrerrors);
    return ERR_OK;
 802464e:	2300      	movs	r3, #0
 8024650:	e123      	b.n	802489a <ip4_input+0x276>
    return ERR_OK;
  }
#endif

  /* obtain IP header length in bytes */
  iphdr_hlen = IPH_HL_BYTES(iphdr);
 8024652:	693b      	ldr	r3, [r7, #16]
 8024654:	781b      	ldrb	r3, [r3, #0]
 8024656:	f003 030f 	and.w	r3, r3, #15
 802465a:	b2db      	uxtb	r3, r3
 802465c:	009b      	lsls	r3, r3, #2
 802465e:	b2db      	uxtb	r3, r3
 8024660:	81fb      	strh	r3, [r7, #14]
  /* obtain ip length in bytes */
  iphdr_len = lwip_ntohs(IPH_LEN(iphdr));
 8024662:	693b      	ldr	r3, [r7, #16]
 8024664:	885b      	ldrh	r3, [r3, #2]
 8024666:	b29b      	uxth	r3, r3
 8024668:	4618      	mov	r0, r3
 802466a:	f7f3 fff5 	bl	8018658 <lwip_htons>
 802466e:	4603      	mov	r3, r0
 8024670:	837b      	strh	r3, [r7, #26]

  /* Trim pbuf. This is especially required for packets < 60 bytes. */
  if (iphdr_len < p->tot_len) {
 8024672:	687b      	ldr	r3, [r7, #4]
 8024674:	891b      	ldrh	r3, [r3, #8]
 8024676:	8b7a      	ldrh	r2, [r7, #26]
 8024678:	429a      	cmp	r2, r3
 802467a:	d204      	bcs.n	8024686 <ip4_input+0x62>
    pbuf_realloc(p, iphdr_len);
 802467c:	8b7b      	ldrh	r3, [r7, #26]
 802467e:	4619      	mov	r1, r3
 8024680:	6878      	ldr	r0, [r7, #4]
 8024682:	f7f5 fb15 	bl	8019cb0 <pbuf_realloc>
  }

  /* header length exceeds first pbuf length, or ip length exceeds total pbuf length? */
  if ((iphdr_hlen > p->len) || (iphdr_len > p->tot_len) || (iphdr_hlen < IP_HLEN)) {
 8024686:	687b      	ldr	r3, [r7, #4]
 8024688:	895b      	ldrh	r3, [r3, #10]
 802468a:	89fa      	ldrh	r2, [r7, #14]
 802468c:	429a      	cmp	r2, r3
 802468e:	d807      	bhi.n	80246a0 <ip4_input+0x7c>
 8024690:	687b      	ldr	r3, [r7, #4]
 8024692:	891b      	ldrh	r3, [r3, #8]
 8024694:	8b7a      	ldrh	r2, [r7, #26]
 8024696:	429a      	cmp	r2, r3
 8024698:	d802      	bhi.n	80246a0 <ip4_input+0x7c>
 802469a:	89fb      	ldrh	r3, [r7, #14]
 802469c:	2b13      	cmp	r3, #19
 802469e:	d804      	bhi.n	80246aa <ip4_input+0x86>
      LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS,
                  ("IP (len %"U16_F") is longer than pbuf (len %"U16_F"), IP packet dropped.\n",
                   iphdr_len, p->tot_len));
    }
    /* free (drop) packet pbufs */
    pbuf_free(p);
 80246a0:	6878      	ldr	r0, [r7, #4]
 80246a2:	f7f5 fcbb 	bl	801a01c <pbuf_free>
    IP_STATS_INC(ip.lenerr);
    IP_STATS_INC(ip.drop);
    MIB2_STATS_INC(mib2.ipindiscards);
    return ERR_OK;
 80246a6:	2300      	movs	r3, #0
 80246a8:	e0f7      	b.n	802489a <ip4_input+0x276>
    }
  }
#endif

  /* copy IP addresses to aligned ip_addr_t */
  ip_addr_copy_from_ip4(ip_data.current_iphdr_dest, iphdr->dest);
 80246aa:	693b      	ldr	r3, [r7, #16]
 80246ac:	691b      	ldr	r3, [r3, #16]
 80246ae:	4a7d      	ldr	r2, [pc, #500]	@ (80248a4 <ip4_input+0x280>)
 80246b0:	6153      	str	r3, [r2, #20]
  ip_addr_copy_from_ip4(ip_data.current_iphdr_src, iphdr->src);
 80246b2:	693b      	ldr	r3, [r7, #16]
 80246b4:	68db      	ldr	r3, [r3, #12]
 80246b6:	4a7b      	ldr	r2, [pc, #492]	@ (80248a4 <ip4_input+0x280>)
 80246b8:	6113      	str	r3, [r2, #16]

  /* match packet against an interface, i.e. is this packet for us? */
  if (ip4_addr_ismulticast(ip4_current_dest_addr())) {
 80246ba:	4b7a      	ldr	r3, [pc, #488]	@ (80248a4 <ip4_input+0x280>)
 80246bc:	695b      	ldr	r3, [r3, #20]
 80246be:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 80246c2:	2be0      	cmp	r3, #224	@ 0xe0
 80246c4:	d112      	bne.n	80246ec <ip4_input+0xc8>
      netif = inp;
    } else {
      netif = NULL;
    }
#else /* LWIP_IGMP */
    if ((netif_is_up(inp)) && (!ip4_addr_isany_val(*netif_ip4_addr(inp)))) {
 80246c6:	683b      	ldr	r3, [r7, #0]
 80246c8:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 80246cc:	f003 0301 	and.w	r3, r3, #1
 80246d0:	b2db      	uxtb	r3, r3
 80246d2:	2b00      	cmp	r3, #0
 80246d4:	d007      	beq.n	80246e6 <ip4_input+0xc2>
 80246d6:	683b      	ldr	r3, [r7, #0]
 80246d8:	3304      	adds	r3, #4
 80246da:	681b      	ldr	r3, [r3, #0]
 80246dc:	2b00      	cmp	r3, #0
 80246de:	d002      	beq.n	80246e6 <ip4_input+0xc2>
      netif = inp;
 80246e0:	683b      	ldr	r3, [r7, #0]
 80246e2:	61fb      	str	r3, [r7, #28]
 80246e4:	e02a      	b.n	802473c <ip4_input+0x118>
    } else {
      netif = NULL;
 80246e6:	2300      	movs	r3, #0
 80246e8:	61fb      	str	r3, [r7, #28]
 80246ea:	e027      	b.n	802473c <ip4_input+0x118>
    }
#endif /* LWIP_IGMP */
  } else {
    /* start trying with inp. if that's not acceptable, start walking the
       list of configured netifs. */
    if (ip4_input_accept(inp)) {
 80246ec:	6838      	ldr	r0, [r7, #0]
 80246ee:	f7ff ff6f 	bl	80245d0 <ip4_input_accept>
 80246f2:	4603      	mov	r3, r0
 80246f4:	2b00      	cmp	r3, #0
 80246f6:	d002      	beq.n	80246fe <ip4_input+0xda>
      netif = inp;
 80246f8:	683b      	ldr	r3, [r7, #0]
 80246fa:	61fb      	str	r3, [r7, #28]
 80246fc:	e01e      	b.n	802473c <ip4_input+0x118>
    } else {
      netif = NULL;
 80246fe:	2300      	movs	r3, #0
 8024700:	61fb      	str	r3, [r7, #28]
#if !LWIP_NETIF_LOOPBACK || LWIP_HAVE_LOOPIF
      /* Packets sent to the loopback address must not be accepted on an
       * interface that does not have the loopback address assigned to it,
       * unless a non-loopback interface is used for loopback traffic. */
      if (!ip4_addr_isloopback(ip4_current_dest_addr()))
 8024702:	4b68      	ldr	r3, [pc, #416]	@ (80248a4 <ip4_input+0x280>)
 8024704:	695b      	ldr	r3, [r3, #20]
 8024706:	b2db      	uxtb	r3, r3
 8024708:	2b7f      	cmp	r3, #127	@ 0x7f
 802470a:	d017      	beq.n	802473c <ip4_input+0x118>
#endif /* !LWIP_NETIF_LOOPBACK || LWIP_HAVE_LOOPIF */
      {
#if !LWIP_SINGLE_NETIF
        NETIF_FOREACH(netif) {
 802470c:	4b66      	ldr	r3, [pc, #408]	@ (80248a8 <ip4_input+0x284>)
 802470e:	681b      	ldr	r3, [r3, #0]
 8024710:	61fb      	str	r3, [r7, #28]
 8024712:	e00e      	b.n	8024732 <ip4_input+0x10e>
          if (netif == inp) {
 8024714:	69fa      	ldr	r2, [r7, #28]
 8024716:	683b      	ldr	r3, [r7, #0]
 8024718:	429a      	cmp	r2, r3
 802471a:	d006      	beq.n	802472a <ip4_input+0x106>
            /* we checked that before already */
            continue;
          }
          if (ip4_input_accept(netif)) {
 802471c:	69f8      	ldr	r0, [r7, #28]
 802471e:	f7ff ff57 	bl	80245d0 <ip4_input_accept>
 8024722:	4603      	mov	r3, r0
 8024724:	2b00      	cmp	r3, #0
 8024726:	d108      	bne.n	802473a <ip4_input+0x116>
 8024728:	e000      	b.n	802472c <ip4_input+0x108>
            continue;
 802472a:	bf00      	nop
        NETIF_FOREACH(netif) {
 802472c:	69fb      	ldr	r3, [r7, #28]
 802472e:	681b      	ldr	r3, [r3, #0]
 8024730:	61fb      	str	r3, [r7, #28]
 8024732:	69fb      	ldr	r3, [r7, #28]
 8024734:	2b00      	cmp	r3, #0
 8024736:	d1ed      	bne.n	8024714 <ip4_input+0xf0>
 8024738:	e000      	b.n	802473c <ip4_input+0x118>
            break;
 802473a:	bf00      	nop
   * If you want to accept private broadcast communication while a netif is down,
   * define LWIP_IP_ACCEPT_UDP_PORT(dst_port), e.g.:
   *
   * #define LWIP_IP_ACCEPT_UDP_PORT(dst_port) ((dst_port) == PP_NTOHS(12345))
   */
  if (netif == NULL) {
 802473c:	69fb      	ldr	r3, [r7, #28]
 802473e:	2b00      	cmp	r3, #0
 8024740:	d111      	bne.n	8024766 <ip4_input+0x142>
    /* remote port is DHCP server? */
    if (IPH_PROTO(iphdr) == IP_PROTO_UDP) {
 8024742:	693b      	ldr	r3, [r7, #16]
 8024744:	7a5b      	ldrb	r3, [r3, #9]
 8024746:	2b11      	cmp	r3, #17
 8024748:	d10d      	bne.n	8024766 <ip4_input+0x142>
      const struct udp_hdr *udphdr = (const struct udp_hdr *)((const u8_t *)iphdr + iphdr_hlen);
 802474a:	89fb      	ldrh	r3, [r7, #14]
 802474c:	693a      	ldr	r2, [r7, #16]
 802474e:	4413      	add	r3, r2
 8024750:	60bb      	str	r3, [r7, #8]
      LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_TRACE, ("ip4_input: UDP packet to DHCP client port %"U16_F"\n",
                                              lwip_ntohs(udphdr->dest)));
      if (IP_ACCEPT_LINK_LAYER_ADDRESSED_PORT(udphdr->dest)) {
 8024752:	68bb      	ldr	r3, [r7, #8]
 8024754:	885b      	ldrh	r3, [r3, #2]
 8024756:	b29b      	uxth	r3, r3
 8024758:	f5b3 4f88 	cmp.w	r3, #17408	@ 0x4400
 802475c:	d103      	bne.n	8024766 <ip4_input+0x142>
        LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_TRACE, ("ip4_input: DHCP packet accepted.\n"));
        netif = inp;
 802475e:	683b      	ldr	r3, [r7, #0]
 8024760:	61fb      	str	r3, [r7, #28]
        check_ip_src = 0;
 8024762:	2300      	movs	r3, #0
 8024764:	617b      	str	r3, [r7, #20]
  }
#endif /* IP_ACCEPT_LINK_LAYER_ADDRESSING */

  /* broadcast or multicast packet source address? Compliant with RFC 1122: 3.2.1.3 */
#if LWIP_IGMP || IP_ACCEPT_LINK_LAYER_ADDRESSING
  if (check_ip_src
 8024766:	697b      	ldr	r3, [r7, #20]
 8024768:	2b00      	cmp	r3, #0
 802476a:	d017      	beq.n	802479c <ip4_input+0x178>
#if IP_ACCEPT_LINK_LAYER_ADDRESSING
      /* DHCP servers need 0.0.0.0 to be allowed as source address (RFC 1.1.2.2: 3.2.1.3/a) */
      && !ip4_addr_isany_val(*ip4_current_src_addr())
 802476c:	4b4d      	ldr	r3, [pc, #308]	@ (80248a4 <ip4_input+0x280>)
 802476e:	691b      	ldr	r3, [r3, #16]
 8024770:	2b00      	cmp	r3, #0
 8024772:	d013      	beq.n	802479c <ip4_input+0x178>
#endif /* IP_ACCEPT_LINK_LAYER_ADDRESSING */
     )
#endif /* LWIP_IGMP || IP_ACCEPT_LINK_LAYER_ADDRESSING */
  {
    if ((ip4_addr_isbroadcast(ip4_current_src_addr(), inp)) ||
 8024774:	4b4b      	ldr	r3, [pc, #300]	@ (80248a4 <ip4_input+0x280>)
 8024776:	691b      	ldr	r3, [r3, #16]
 8024778:	6839      	ldr	r1, [r7, #0]
 802477a:	4618      	mov	r0, r3
 802477c:	f000 f970 	bl	8024a60 <ip4_addr_isbroadcast_u32>
 8024780:	4603      	mov	r3, r0
 8024782:	2b00      	cmp	r3, #0
 8024784:	d105      	bne.n	8024792 <ip4_input+0x16e>
        (ip4_addr_ismulticast(ip4_current_src_addr()))) {
 8024786:	4b47      	ldr	r3, [pc, #284]	@ (80248a4 <ip4_input+0x280>)
 8024788:	691b      	ldr	r3, [r3, #16]
 802478a:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
    if ((ip4_addr_isbroadcast(ip4_current_src_addr(), inp)) ||
 802478e:	2be0      	cmp	r3, #224	@ 0xe0
 8024790:	d104      	bne.n	802479c <ip4_input+0x178>
      /* packet source is not valid */
      LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, ("ip4_input: packet source is not valid.\n"));
      /* free (drop) packet pbufs */
      pbuf_free(p);
 8024792:	6878      	ldr	r0, [r7, #4]
 8024794:	f7f5 fc42 	bl	801a01c <pbuf_free>
      IP_STATS_INC(ip.drop);
      MIB2_STATS_INC(mib2.ipinaddrerrors);
      MIB2_STATS_INC(mib2.ipindiscards);
      return ERR_OK;
 8024798:	2300      	movs	r3, #0
 802479a:	e07e      	b.n	802489a <ip4_input+0x276>
    }
  }

  /* packet not for us? */
  if (netif == NULL) {
 802479c:	69fb      	ldr	r3, [r7, #28]
 802479e:	2b00      	cmp	r3, #0
 80247a0:	d104      	bne.n	80247ac <ip4_input+0x188>
    {
      IP_STATS_INC(ip.drop);
      MIB2_STATS_INC(mib2.ipinaddrerrors);
      MIB2_STATS_INC(mib2.ipindiscards);
    }
    pbuf_free(p);
 80247a2:	6878      	ldr	r0, [r7, #4]
 80247a4:	f7f5 fc3a 	bl	801a01c <pbuf_free>
    return ERR_OK;
 80247a8:	2300      	movs	r3, #0
 80247aa:	e076      	b.n	802489a <ip4_input+0x276>
  }
  /* packet consists of multiple fragments? */
  if ((IPH_OFFSET(iphdr) & PP_HTONS(IP_OFFMASK | IP_MF)) != 0) {
 80247ac:	693b      	ldr	r3, [r7, #16]
 80247ae:	88db      	ldrh	r3, [r3, #6]
 80247b0:	b29b      	uxth	r3, r3
 80247b2:	461a      	mov	r2, r3
 80247b4:	f64f 733f 	movw	r3, #65343	@ 0xff3f
 80247b8:	4013      	ands	r3, r2
 80247ba:	2b00      	cmp	r3, #0
 80247bc:	d00b      	beq.n	80247d6 <ip4_input+0x1b2>
#if IP_REASSEMBLY /* packet fragment reassembly code present? */
    LWIP_DEBUGF(IP_DEBUG, ("IP packet is a fragment (id=0x%04"X16_F" tot_len=%"U16_F" len=%"U16_F" MF=%"U16_F" offset=%"U16_F"), calling ip4_reass()\n",
                           lwip_ntohs(IPH_ID(iphdr)), p->tot_len, lwip_ntohs(IPH_LEN(iphdr)), (u16_t)!!(IPH_OFFSET(iphdr) & PP_HTONS(IP_MF)), (u16_t)((lwip_ntohs(IPH_OFFSET(iphdr)) & IP_OFFMASK) * 8)));
    /* reassemble the packet*/
    p = ip4_reass(p);
 80247be:	6878      	ldr	r0, [r7, #4]
 80247c0:	f000 fe62 	bl	8025488 <ip4_reass>
 80247c4:	6078      	str	r0, [r7, #4]
    /* packet not fully reassembled yet? */
    if (p == NULL) {
 80247c6:	687b      	ldr	r3, [r7, #4]
 80247c8:	2b00      	cmp	r3, #0
 80247ca:	d101      	bne.n	80247d0 <ip4_input+0x1ac>
      return ERR_OK;
 80247cc:	2300      	movs	r3, #0
 80247ce:	e064      	b.n	802489a <ip4_input+0x276>
    }
    iphdr = (const struct ip_hdr *)p->payload;
 80247d0:	687b      	ldr	r3, [r7, #4]
 80247d2:	685b      	ldr	r3, [r3, #4]
 80247d4:	613b      	str	r3, [r7, #16]
  /* send to upper layers */
  LWIP_DEBUGF(IP_DEBUG, ("ip4_input: \n"));
  ip4_debug_print(p);
  LWIP_DEBUGF(IP_DEBUG, ("ip4_input: p->len %"U16_F" p->tot_len %"U16_F"\n", p->len, p->tot_len));

  ip_data.current_netif = netif;
 80247d6:	4a33      	ldr	r2, [pc, #204]	@ (80248a4 <ip4_input+0x280>)
 80247d8:	69fb      	ldr	r3, [r7, #28]
 80247da:	6013      	str	r3, [r2, #0]
  ip_data.current_input_netif = inp;
 80247dc:	4a31      	ldr	r2, [pc, #196]	@ (80248a4 <ip4_input+0x280>)
 80247de:	683b      	ldr	r3, [r7, #0]
 80247e0:	6053      	str	r3, [r2, #4]
  ip_data.current_ip4_header = iphdr;
 80247e2:	4a30      	ldr	r2, [pc, #192]	@ (80248a4 <ip4_input+0x280>)
 80247e4:	693b      	ldr	r3, [r7, #16]
 80247e6:	6093      	str	r3, [r2, #8]
  ip_data.current_ip_header_tot_len = IPH_HL_BYTES(iphdr);
 80247e8:	693b      	ldr	r3, [r7, #16]
 80247ea:	781b      	ldrb	r3, [r3, #0]
 80247ec:	f003 030f 	and.w	r3, r3, #15
 80247f0:	b2db      	uxtb	r3, r3
 80247f2:	009b      	lsls	r3, r3, #2
 80247f4:	b2db      	uxtb	r3, r3
 80247f6:	461a      	mov	r2, r3
 80247f8:	4b2a      	ldr	r3, [pc, #168]	@ (80248a4 <ip4_input+0x280>)
 80247fa:	819a      	strh	r2, [r3, #12]
  /* raw input did not eat the packet? */
  raw_status = raw_input(p, inp);
  if (raw_status != RAW_INPUT_EATEN)
#endif /* LWIP_RAW */
  {
    pbuf_remove_header(p, iphdr_hlen); /* Move to payload, no check necessary. */
 80247fc:	89fb      	ldrh	r3, [r7, #14]
 80247fe:	4619      	mov	r1, r3
 8024800:	6878      	ldr	r0, [r7, #4]
 8024802:	f7f5 fb53 	bl	8019eac <pbuf_remove_header>

    switch (IPH_PROTO(iphdr)) {
 8024806:	693b      	ldr	r3, [r7, #16]
 8024808:	7a5b      	ldrb	r3, [r3, #9]
 802480a:	2b11      	cmp	r3, #17
 802480c:	d006      	beq.n	802481c <ip4_input+0x1f8>
 802480e:	2b11      	cmp	r3, #17
 8024810:	dc13      	bgt.n	802483a <ip4_input+0x216>
 8024812:	2b01      	cmp	r3, #1
 8024814:	d00c      	beq.n	8024830 <ip4_input+0x20c>
 8024816:	2b06      	cmp	r3, #6
 8024818:	d005      	beq.n	8024826 <ip4_input+0x202>
 802481a:	e00e      	b.n	802483a <ip4_input+0x216>
      case IP_PROTO_UDP:
#if LWIP_UDPLITE
      case IP_PROTO_UDPLITE:
#endif /* LWIP_UDPLITE */
        MIB2_STATS_INC(mib2.ipindelivers);
        udp_input(p, inp);
 802481c:	6839      	ldr	r1, [r7, #0]
 802481e:	6878      	ldr	r0, [r7, #4]
 8024820:	f7fc f99c 	bl	8020b5c <udp_input>
        break;
 8024824:	e026      	b.n	8024874 <ip4_input+0x250>
#endif /* LWIP_UDP */
#if LWIP_TCP
      case IP_PROTO_TCP:
        MIB2_STATS_INC(mib2.ipindelivers);
        tcp_input(p, inp);
 8024826:	6839      	ldr	r1, [r7, #0]
 8024828:	6878      	ldr	r0, [r7, #4]
 802482a:	f7f7 fcdd 	bl	801c1e8 <tcp_input>
        break;
 802482e:	e021      	b.n	8024874 <ip4_input+0x250>
#endif /* LWIP_TCP */
#if LWIP_ICMP
      case IP_PROTO_ICMP:
        MIB2_STATS_INC(mib2.ipindelivers);
        icmp_input(p, inp);
 8024830:	6839      	ldr	r1, [r7, #0]
 8024832:	6878      	ldr	r0, [r7, #4]
 8024834:	f7ff fca4 	bl	8024180 <icmp_input>
        break;
 8024838:	e01c      	b.n	8024874 <ip4_input+0x250>
        } else
#endif /* LWIP_RAW */
        {
#if LWIP_ICMP
          /* send ICMP destination protocol unreachable unless is was a broadcast */
          if (!ip4_addr_isbroadcast(ip4_current_dest_addr(), netif) &&
 802483a:	4b1a      	ldr	r3, [pc, #104]	@ (80248a4 <ip4_input+0x280>)
 802483c:	695b      	ldr	r3, [r3, #20]
 802483e:	69f9      	ldr	r1, [r7, #28]
 8024840:	4618      	mov	r0, r3
 8024842:	f000 f90d 	bl	8024a60 <ip4_addr_isbroadcast_u32>
 8024846:	4603      	mov	r3, r0
 8024848:	2b00      	cmp	r3, #0
 802484a:	d10f      	bne.n	802486c <ip4_input+0x248>
              !ip4_addr_ismulticast(ip4_current_dest_addr())) {
 802484c:	4b15      	ldr	r3, [pc, #84]	@ (80248a4 <ip4_input+0x280>)
 802484e:	695b      	ldr	r3, [r3, #20]
 8024850:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
          if (!ip4_addr_isbroadcast(ip4_current_dest_addr(), netif) &&
 8024854:	2be0      	cmp	r3, #224	@ 0xe0
 8024856:	d009      	beq.n	802486c <ip4_input+0x248>
            pbuf_header_force(p, (s16_t)iphdr_hlen); /* Move to ip header, no check necessary. */
 8024858:	f9b7 300e 	ldrsh.w	r3, [r7, #14]
 802485c:	4619      	mov	r1, r3
 802485e:	6878      	ldr	r0, [r7, #4]
 8024860:	f7f5 fb97 	bl	8019f92 <pbuf_header_force>
            icmp_dest_unreach(p, ICMP_DUR_PROTO);
 8024864:	2102      	movs	r1, #2
 8024866:	6878      	ldr	r0, [r7, #4]
 8024868:	f7ff fdae 	bl	80243c8 <icmp_dest_unreach>

          IP_STATS_INC(ip.proterr);
          IP_STATS_INC(ip.drop);
          MIB2_STATS_INC(mib2.ipinunknownprotos);
        }
        pbuf_free(p);
 802486c:	6878      	ldr	r0, [r7, #4]
 802486e:	f7f5 fbd5 	bl	801a01c <pbuf_free>
        break;
 8024872:	bf00      	nop
    }
  }

  /* @todo: this is not really necessary... */
  ip_data.current_netif = NULL;
 8024874:	4b0b      	ldr	r3, [pc, #44]	@ (80248a4 <ip4_input+0x280>)
 8024876:	2200      	movs	r2, #0
 8024878:	601a      	str	r2, [r3, #0]
  ip_data.current_input_netif = NULL;
 802487a:	4b0a      	ldr	r3, [pc, #40]	@ (80248a4 <ip4_input+0x280>)
 802487c:	2200      	movs	r2, #0
 802487e:	605a      	str	r2, [r3, #4]
  ip_data.current_ip4_header = NULL;
 8024880:	4b08      	ldr	r3, [pc, #32]	@ (80248a4 <ip4_input+0x280>)
 8024882:	2200      	movs	r2, #0
 8024884:	609a      	str	r2, [r3, #8]
  ip_data.current_ip_header_tot_len = 0;
 8024886:	4b07      	ldr	r3, [pc, #28]	@ (80248a4 <ip4_input+0x280>)
 8024888:	2200      	movs	r2, #0
 802488a:	819a      	strh	r2, [r3, #12]
  ip4_addr_set_any(ip4_current_src_addr());
 802488c:	4b05      	ldr	r3, [pc, #20]	@ (80248a4 <ip4_input+0x280>)
 802488e:	2200      	movs	r2, #0
 8024890:	611a      	str	r2, [r3, #16]
  ip4_addr_set_any(ip4_current_dest_addr());
 8024892:	4b04      	ldr	r3, [pc, #16]	@ (80248a4 <ip4_input+0x280>)
 8024894:	2200      	movs	r2, #0
 8024896:	615a      	str	r2, [r3, #20]

  return ERR_OK;
 8024898:	2300      	movs	r3, #0
}
 802489a:	4618      	mov	r0, r3
 802489c:	3720      	adds	r7, #32
 802489e:	46bd      	mov	sp, r7
 80248a0:	bd80      	pop	{r7, pc}
 80248a2:	bf00      	nop
 80248a4:	2402349c 	.word	0x2402349c
 80248a8:	24029fe0 	.word	0x24029fe0

080248ac <ip4_output_if>:
 */
err_t
ip4_output_if(struct pbuf *p, const ip4_addr_t *src, const ip4_addr_t *dest,
              u8_t ttl, u8_t tos,
              u8_t proto, struct netif *netif)
{
 80248ac:	b580      	push	{r7, lr}
 80248ae:	b08a      	sub	sp, #40	@ 0x28
 80248b0:	af04      	add	r7, sp, #16
 80248b2:	60f8      	str	r0, [r7, #12]
 80248b4:	60b9      	str	r1, [r7, #8]
 80248b6:	607a      	str	r2, [r7, #4]
 80248b8:	70fb      	strb	r3, [r7, #3]
ip4_output_if_opt(struct pbuf *p, const ip4_addr_t *src, const ip4_addr_t *dest,
                  u8_t ttl, u8_t tos, u8_t proto, struct netif *netif, void *ip_options,
                  u16_t optlen)
{
#endif /* IP_OPTIONS_SEND */
  const ip4_addr_t *src_used = src;
 80248ba:	68bb      	ldr	r3, [r7, #8]
 80248bc:	617b      	str	r3, [r7, #20]
  if (dest != LWIP_IP_HDRINCL) {
 80248be:	687b      	ldr	r3, [r7, #4]
 80248c0:	2b00      	cmp	r3, #0
 80248c2:	d009      	beq.n	80248d8 <ip4_output_if+0x2c>
    if (ip4_addr_isany(src)) {
 80248c4:	68bb      	ldr	r3, [r7, #8]
 80248c6:	2b00      	cmp	r3, #0
 80248c8:	d003      	beq.n	80248d2 <ip4_output_if+0x26>
 80248ca:	68bb      	ldr	r3, [r7, #8]
 80248cc:	681b      	ldr	r3, [r3, #0]
 80248ce:	2b00      	cmp	r3, #0
 80248d0:	d102      	bne.n	80248d8 <ip4_output_if+0x2c>
      src_used = netif_ip4_addr(netif);
 80248d2:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80248d4:	3304      	adds	r3, #4
 80248d6:	617b      	str	r3, [r7, #20]

#if IP_OPTIONS_SEND
  return ip4_output_if_opt_src(p, src_used, dest, ttl, tos, proto, netif,
                               ip_options, optlen);
#else /* IP_OPTIONS_SEND */
  return ip4_output_if_src(p, src_used, dest, ttl, tos, proto, netif);
 80248d8:	78fa      	ldrb	r2, [r7, #3]
 80248da:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80248dc:	9302      	str	r3, [sp, #8]
 80248de:	f897 3024 	ldrb.w	r3, [r7, #36]	@ 0x24
 80248e2:	9301      	str	r3, [sp, #4]
 80248e4:	f897 3020 	ldrb.w	r3, [r7, #32]
 80248e8:	9300      	str	r3, [sp, #0]
 80248ea:	4613      	mov	r3, r2
 80248ec:	687a      	ldr	r2, [r7, #4]
 80248ee:	6979      	ldr	r1, [r7, #20]
 80248f0:	68f8      	ldr	r0, [r7, #12]
 80248f2:	f000 f805 	bl	8024900 <ip4_output_if_src>
 80248f6:	4603      	mov	r3, r0
#endif /* IP_OPTIONS_SEND */
}
 80248f8:	4618      	mov	r0, r3
 80248fa:	3718      	adds	r7, #24
 80248fc:	46bd      	mov	sp, r7
 80248fe:	bd80      	pop	{r7, pc}

08024900 <ip4_output_if_src>:
 */
err_t
ip4_output_if_src(struct pbuf *p, const ip4_addr_t *src, const ip4_addr_t *dest,
                  u8_t ttl, u8_t tos,
                  u8_t proto, struct netif *netif)
{
 8024900:	b580      	push	{r7, lr}
 8024902:	b088      	sub	sp, #32
 8024904:	af00      	add	r7, sp, #0
 8024906:	60f8      	str	r0, [r7, #12]
 8024908:	60b9      	str	r1, [r7, #8]
 802490a:	607a      	str	r2, [r7, #4]
 802490c:	70fb      	strb	r3, [r7, #3]
  ip4_addr_t dest_addr;
#if CHECKSUM_GEN_IP_INLINE
  u32_t chk_sum = 0;
#endif /* CHECKSUM_GEN_IP_INLINE */

  LWIP_ASSERT_CORE_LOCKED();
 802490e:	f7eb fbaf 	bl	8010070 <sys_check_core_locking>
  LWIP_IP_CHECK_PBUF_REF_COUNT_FOR_TX(p);
 8024912:	68fb      	ldr	r3, [r7, #12]
 8024914:	7b9b      	ldrb	r3, [r3, #14]
 8024916:	2b01      	cmp	r3, #1
 8024918:	d006      	beq.n	8024928 <ip4_output_if_src+0x28>
 802491a:	4b4b      	ldr	r3, [pc, #300]	@ (8024a48 <ip4_output_if_src+0x148>)
 802491c:	f44f 7255 	mov.w	r2, #852	@ 0x354
 8024920:	494a      	ldr	r1, [pc, #296]	@ (8024a4c <ip4_output_if_src+0x14c>)
 8024922:	484b      	ldr	r0, [pc, #300]	@ (8024a50 <ip4_output_if_src+0x150>)
 8024924:	f004 fdf2 	bl	802950c <iprintf>

  MIB2_STATS_INC(mib2.ipoutrequests);

  /* Should the IP header be generated or is it already included in p? */
  if (dest != LWIP_IP_HDRINCL) {
 8024928:	687b      	ldr	r3, [r7, #4]
 802492a:	2b00      	cmp	r3, #0
 802492c:	d060      	beq.n	80249f0 <ip4_output_if_src+0xf0>
    u16_t ip_hlen = IP_HLEN;
 802492e:	2314      	movs	r3, #20
 8024930:	837b      	strh	r3, [r7, #26]
      }
#endif /* CHECKSUM_GEN_IP_INLINE */
    }
#endif /* IP_OPTIONS_SEND */
    /* generate IP header */
    if (pbuf_add_header(p, IP_HLEN)) {
 8024932:	2114      	movs	r1, #20
 8024934:	68f8      	ldr	r0, [r7, #12]
 8024936:	f7f5 faa9 	bl	8019e8c <pbuf_add_header>
 802493a:	4603      	mov	r3, r0
 802493c:	2b00      	cmp	r3, #0
 802493e:	d002      	beq.n	8024946 <ip4_output_if_src+0x46>
      LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("ip4_output: not enough room for IP header in pbuf\n"));

      IP_STATS_INC(ip.err);
      MIB2_STATS_INC(mib2.ipoutdiscards);
      return ERR_BUF;
 8024940:	f06f 0301 	mvn.w	r3, #1
 8024944:	e07c      	b.n	8024a40 <ip4_output_if_src+0x140>
    }

    iphdr = (struct ip_hdr *)p->payload;
 8024946:	68fb      	ldr	r3, [r7, #12]
 8024948:	685b      	ldr	r3, [r3, #4]
 802494a:	61fb      	str	r3, [r7, #28]
    LWIP_ASSERT("check that first pbuf can hold struct ip_hdr",
 802494c:	68fb      	ldr	r3, [r7, #12]
 802494e:	895b      	ldrh	r3, [r3, #10]
 8024950:	2b13      	cmp	r3, #19
 8024952:	d806      	bhi.n	8024962 <ip4_output_if_src+0x62>
 8024954:	4b3c      	ldr	r3, [pc, #240]	@ (8024a48 <ip4_output_if_src+0x148>)
 8024956:	f44f 7262 	mov.w	r2, #904	@ 0x388
 802495a:	493e      	ldr	r1, [pc, #248]	@ (8024a54 <ip4_output_if_src+0x154>)
 802495c:	483c      	ldr	r0, [pc, #240]	@ (8024a50 <ip4_output_if_src+0x150>)
 802495e:	f004 fdd5 	bl	802950c <iprintf>
                (p->len >= sizeof(struct ip_hdr)));

    IPH_TTL_SET(iphdr, ttl);
 8024962:	69fb      	ldr	r3, [r7, #28]
 8024964:	78fa      	ldrb	r2, [r7, #3]
 8024966:	721a      	strb	r2, [r3, #8]
    IPH_PROTO_SET(iphdr, proto);
 8024968:	69fb      	ldr	r3, [r7, #28]
 802496a:	f897 202c 	ldrb.w	r2, [r7, #44]	@ 0x2c
 802496e:	725a      	strb	r2, [r3, #9]
#if CHECKSUM_GEN_IP_INLINE
    chk_sum += PP_NTOHS(proto | (ttl << 8));
#endif /* CHECKSUM_GEN_IP_INLINE */

    /* dest cannot be NULL here */
    ip4_addr_copy(iphdr->dest, *dest);
 8024970:	687b      	ldr	r3, [r7, #4]
 8024972:	681a      	ldr	r2, [r3, #0]
 8024974:	69fb      	ldr	r3, [r7, #28]
 8024976:	611a      	str	r2, [r3, #16]
#if CHECKSUM_GEN_IP_INLINE
    chk_sum += ip4_addr_get_u32(&iphdr->dest) & 0xFFFF;
    chk_sum += ip4_addr_get_u32(&iphdr->dest) >> 16;
#endif /* CHECKSUM_GEN_IP_INLINE */

    IPH_VHL_SET(iphdr, 4, ip_hlen / 4);
 8024978:	8b7b      	ldrh	r3, [r7, #26]
 802497a:	089b      	lsrs	r3, r3, #2
 802497c:	b29b      	uxth	r3, r3
 802497e:	b2db      	uxtb	r3, r3
 8024980:	f043 0340 	orr.w	r3, r3, #64	@ 0x40
 8024984:	b2da      	uxtb	r2, r3
 8024986:	69fb      	ldr	r3, [r7, #28]
 8024988:	701a      	strb	r2, [r3, #0]
    IPH_TOS_SET(iphdr, tos);
 802498a:	69fb      	ldr	r3, [r7, #28]
 802498c:	f897 2028 	ldrb.w	r2, [r7, #40]	@ 0x28
 8024990:	705a      	strb	r2, [r3, #1]
#if CHECKSUM_GEN_IP_INLINE
    chk_sum += PP_NTOHS(tos | (iphdr->_v_hl << 8));
#endif /* CHECKSUM_GEN_IP_INLINE */
    IPH_LEN_SET(iphdr, lwip_htons(p->tot_len));
 8024992:	68fb      	ldr	r3, [r7, #12]
 8024994:	891b      	ldrh	r3, [r3, #8]
 8024996:	4618      	mov	r0, r3
 8024998:	f7f3 fe5e 	bl	8018658 <lwip_htons>
 802499c:	4603      	mov	r3, r0
 802499e:	461a      	mov	r2, r3
 80249a0:	69fb      	ldr	r3, [r7, #28]
 80249a2:	805a      	strh	r2, [r3, #2]
#if CHECKSUM_GEN_IP_INLINE
    chk_sum += iphdr->_len;
#endif /* CHECKSUM_GEN_IP_INLINE */
    IPH_OFFSET_SET(iphdr, 0);
 80249a4:	69fb      	ldr	r3, [r7, #28]
 80249a6:	2200      	movs	r2, #0
 80249a8:	719a      	strb	r2, [r3, #6]
 80249aa:	2200      	movs	r2, #0
 80249ac:	71da      	strb	r2, [r3, #7]
    IPH_ID_SET(iphdr, lwip_htons(ip_id));
 80249ae:	4b2a      	ldr	r3, [pc, #168]	@ (8024a58 <ip4_output_if_src+0x158>)
 80249b0:	881b      	ldrh	r3, [r3, #0]
 80249b2:	4618      	mov	r0, r3
 80249b4:	f7f3 fe50 	bl	8018658 <lwip_htons>
 80249b8:	4603      	mov	r3, r0
 80249ba:	461a      	mov	r2, r3
 80249bc:	69fb      	ldr	r3, [r7, #28]
 80249be:	809a      	strh	r2, [r3, #4]
#if CHECKSUM_GEN_IP_INLINE
    chk_sum += iphdr->_id;
#endif /* CHECKSUM_GEN_IP_INLINE */
    ++ip_id;
 80249c0:	4b25      	ldr	r3, [pc, #148]	@ (8024a58 <ip4_output_if_src+0x158>)
 80249c2:	881b      	ldrh	r3, [r3, #0]
 80249c4:	3301      	adds	r3, #1
 80249c6:	b29a      	uxth	r2, r3
 80249c8:	4b23      	ldr	r3, [pc, #140]	@ (8024a58 <ip4_output_if_src+0x158>)
 80249ca:	801a      	strh	r2, [r3, #0]

    if (src == NULL) {
 80249cc:	68bb      	ldr	r3, [r7, #8]
 80249ce:	2b00      	cmp	r3, #0
 80249d0:	d104      	bne.n	80249dc <ip4_output_if_src+0xdc>
      ip4_addr_copy(iphdr->src, *IP4_ADDR_ANY4);
 80249d2:	4b22      	ldr	r3, [pc, #136]	@ (8024a5c <ip4_output_if_src+0x15c>)
 80249d4:	681a      	ldr	r2, [r3, #0]
 80249d6:	69fb      	ldr	r3, [r7, #28]
 80249d8:	60da      	str	r2, [r3, #12]
 80249da:	e003      	b.n	80249e4 <ip4_output_if_src+0xe4>
    } else {
      /* src cannot be NULL here */
      ip4_addr_copy(iphdr->src, *src);
 80249dc:	68bb      	ldr	r3, [r7, #8]
 80249de:	681a      	ldr	r2, [r3, #0]
 80249e0:	69fb      	ldr	r3, [r7, #28]
 80249e2:	60da      	str	r2, [r3, #12]
    else {
      IPH_CHKSUM_SET(iphdr, 0);
    }
#endif /* LWIP_CHECKSUM_CTRL_PER_NETIF*/
#else /* CHECKSUM_GEN_IP_INLINE */
    IPH_CHKSUM_SET(iphdr, 0);
 80249e4:	69fb      	ldr	r3, [r7, #28]
 80249e6:	2200      	movs	r2, #0
 80249e8:	729a      	strb	r2, [r3, #10]
 80249ea:	2200      	movs	r2, #0
 80249ec:	72da      	strb	r2, [r3, #11]
 80249ee:	e00f      	b.n	8024a10 <ip4_output_if_src+0x110>
    }
#endif /* CHECKSUM_GEN_IP */
#endif /* CHECKSUM_GEN_IP_INLINE */
  } else {
    /* IP header already included in p */
    if (p->len < IP_HLEN) {
 80249f0:	68fb      	ldr	r3, [r7, #12]
 80249f2:	895b      	ldrh	r3, [r3, #10]
 80249f4:	2b13      	cmp	r3, #19
 80249f6:	d802      	bhi.n	80249fe <ip4_output_if_src+0xfe>
      LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("ip4_output: LWIP_IP_HDRINCL but pbuf is too short\n"));
      IP_STATS_INC(ip.err);
      MIB2_STATS_INC(mib2.ipoutdiscards);
      return ERR_BUF;
 80249f8:	f06f 0301 	mvn.w	r3, #1
 80249fc:	e020      	b.n	8024a40 <ip4_output_if_src+0x140>
    }
    iphdr = (struct ip_hdr *)p->payload;
 80249fe:	68fb      	ldr	r3, [r7, #12]
 8024a00:	685b      	ldr	r3, [r3, #4]
 8024a02:	61fb      	str	r3, [r7, #28]
    ip4_addr_copy(dest_addr, iphdr->dest);
 8024a04:	69fb      	ldr	r3, [r7, #28]
 8024a06:	691b      	ldr	r3, [r3, #16]
 8024a08:	617b      	str	r3, [r7, #20]
    dest = &dest_addr;
 8024a0a:	f107 0314 	add.w	r3, r7, #20
 8024a0e:	607b      	str	r3, [r7, #4]
  }
#endif /* LWIP_MULTICAST_TX_OPTIONS */
#endif /* ENABLE_LOOPBACK */
#if IP_FRAG
  /* don't fragment if interface has mtu set to 0 [loopif] */
  if (netif->mtu && (p->tot_len > netif->mtu)) {
 8024a10:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8024a12:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 8024a14:	2b00      	cmp	r3, #0
 8024a16:	d00c      	beq.n	8024a32 <ip4_output_if_src+0x132>
 8024a18:	68fb      	ldr	r3, [r7, #12]
 8024a1a:	891a      	ldrh	r2, [r3, #8]
 8024a1c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8024a1e:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 8024a20:	429a      	cmp	r2, r3
 8024a22:	d906      	bls.n	8024a32 <ip4_output_if_src+0x132>
    return ip4_frag(p, netif, dest);
 8024a24:	687a      	ldr	r2, [r7, #4]
 8024a26:	6b39      	ldr	r1, [r7, #48]	@ 0x30
 8024a28:	68f8      	ldr	r0, [r7, #12]
 8024a2a:	f000 ff21 	bl	8025870 <ip4_frag>
 8024a2e:	4603      	mov	r3, r0
 8024a30:	e006      	b.n	8024a40 <ip4_output_if_src+0x140>
  }
#endif /* IP_FRAG */

  LWIP_DEBUGF(IP_DEBUG, ("ip4_output_if: call netif->output()\n"));
  return netif->output(netif, p, dest);
 8024a32:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8024a34:	695b      	ldr	r3, [r3, #20]
 8024a36:	687a      	ldr	r2, [r7, #4]
 8024a38:	68f9      	ldr	r1, [r7, #12]
 8024a3a:	6b38      	ldr	r0, [r7, #48]	@ 0x30
 8024a3c:	4798      	blx	r3
 8024a3e:	4603      	mov	r3, r0
}
 8024a40:	4618      	mov	r0, r3
 8024a42:	3720      	adds	r7, #32
 8024a44:	46bd      	mov	sp, r7
 8024a46:	bd80      	pop	{r7, pc}
 8024a48:	080300f8 	.word	0x080300f8
 8024a4c:	0803012c 	.word	0x0803012c
 8024a50:	08030138 	.word	0x08030138
 8024a54:	08030160 	.word	0x08030160
 8024a58:	2402a176 	.word	0x2402a176
 8024a5c:	080307a4 	.word	0x080307a4

08024a60 <ip4_addr_isbroadcast_u32>:
 * @param netif the network interface against which the address is checked
 * @return returns non-zero if the address is a broadcast address
 */
u8_t
ip4_addr_isbroadcast_u32(u32_t addr, const struct netif *netif)
{
 8024a60:	b480      	push	{r7}
 8024a62:	b085      	sub	sp, #20
 8024a64:	af00      	add	r7, sp, #0
 8024a66:	6078      	str	r0, [r7, #4]
 8024a68:	6039      	str	r1, [r7, #0]
  ip4_addr_t ipaddr;
  ip4_addr_set_u32(&ipaddr, addr);
 8024a6a:	687b      	ldr	r3, [r7, #4]
 8024a6c:	60fb      	str	r3, [r7, #12]

  /* all ones (broadcast) or all zeroes (old skool broadcast) */
  if ((~addr == IPADDR_ANY) ||
 8024a6e:	687b      	ldr	r3, [r7, #4]
 8024a70:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8024a74:	d002      	beq.n	8024a7c <ip4_addr_isbroadcast_u32+0x1c>
 8024a76:	687b      	ldr	r3, [r7, #4]
 8024a78:	2b00      	cmp	r3, #0
 8024a7a:	d101      	bne.n	8024a80 <ip4_addr_isbroadcast_u32+0x20>
      (addr == IPADDR_ANY)) {
    return 1;
 8024a7c:	2301      	movs	r3, #1
 8024a7e:	e02a      	b.n	8024ad6 <ip4_addr_isbroadcast_u32+0x76>
    /* no broadcast support on this network interface? */
  } else if ((netif->flags & NETIF_FLAG_BROADCAST) == 0) {
 8024a80:	683b      	ldr	r3, [r7, #0]
 8024a82:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 8024a86:	f003 0302 	and.w	r3, r3, #2
 8024a8a:	2b00      	cmp	r3, #0
 8024a8c:	d101      	bne.n	8024a92 <ip4_addr_isbroadcast_u32+0x32>
    /* the given address cannot be a broadcast address
     * nor can we check against any broadcast addresses */
    return 0;
 8024a8e:	2300      	movs	r3, #0
 8024a90:	e021      	b.n	8024ad6 <ip4_addr_isbroadcast_u32+0x76>
    /* address matches network interface address exactly? => no broadcast */
  } else if (addr == ip4_addr_get_u32(netif_ip4_addr(netif))) {
 8024a92:	683b      	ldr	r3, [r7, #0]
 8024a94:	3304      	adds	r3, #4
 8024a96:	681b      	ldr	r3, [r3, #0]
 8024a98:	687a      	ldr	r2, [r7, #4]
 8024a9a:	429a      	cmp	r2, r3
 8024a9c:	d101      	bne.n	8024aa2 <ip4_addr_isbroadcast_u32+0x42>
    return 0;
 8024a9e:	2300      	movs	r3, #0
 8024aa0:	e019      	b.n	8024ad6 <ip4_addr_isbroadcast_u32+0x76>
    /*  on the same (sub) network... */
  } else if (ip4_addr_netcmp(&ipaddr, netif_ip4_addr(netif), netif_ip4_netmask(netif))
 8024aa2:	68fa      	ldr	r2, [r7, #12]
 8024aa4:	683b      	ldr	r3, [r7, #0]
 8024aa6:	3304      	adds	r3, #4
 8024aa8:	681b      	ldr	r3, [r3, #0]
 8024aaa:	405a      	eors	r2, r3
 8024aac:	683b      	ldr	r3, [r7, #0]
 8024aae:	3308      	adds	r3, #8
 8024ab0:	681b      	ldr	r3, [r3, #0]
 8024ab2:	4013      	ands	r3, r2
 8024ab4:	2b00      	cmp	r3, #0
 8024ab6:	d10d      	bne.n	8024ad4 <ip4_addr_isbroadcast_u32+0x74>
             /* ...and host identifier bits are all ones? =>... */
             && ((addr & ~ip4_addr_get_u32(netif_ip4_netmask(netif))) ==
 8024ab8:	683b      	ldr	r3, [r7, #0]
 8024aba:	3308      	adds	r3, #8
 8024abc:	681b      	ldr	r3, [r3, #0]
 8024abe:	43da      	mvns	r2, r3
 8024ac0:	687b      	ldr	r3, [r7, #4]
 8024ac2:	401a      	ands	r2, r3
                 (IPADDR_BROADCAST & ~ip4_addr_get_u32(netif_ip4_netmask(netif))))) {
 8024ac4:	683b      	ldr	r3, [r7, #0]
 8024ac6:	3308      	adds	r3, #8
 8024ac8:	681b      	ldr	r3, [r3, #0]
 8024aca:	43db      	mvns	r3, r3
             && ((addr & ~ip4_addr_get_u32(netif_ip4_netmask(netif))) ==
 8024acc:	429a      	cmp	r2, r3
 8024ace:	d101      	bne.n	8024ad4 <ip4_addr_isbroadcast_u32+0x74>
    /* => network broadcast address */
    return 1;
 8024ad0:	2301      	movs	r3, #1
 8024ad2:	e000      	b.n	8024ad6 <ip4_addr_isbroadcast_u32+0x76>
  } else {
    return 0;
 8024ad4:	2300      	movs	r3, #0
  }
}
 8024ad6:	4618      	mov	r0, r3
 8024ad8:	3714      	adds	r7, #20
 8024ada:	46bd      	mov	sp, r7
 8024adc:	f85d 7b04 	ldr.w	r7, [sp], #4
 8024ae0:	4770      	bx	lr

08024ae2 <ipaddr_addr>:
 * @param cp IP address in ascii representation (e.g. "127.0.0.1")
 * @return ip address in network order
 */
u32_t
ipaddr_addr(const char *cp)
{
 8024ae2:	b580      	push	{r7, lr}
 8024ae4:	b084      	sub	sp, #16
 8024ae6:	af00      	add	r7, sp, #0
 8024ae8:	6078      	str	r0, [r7, #4]
  ip4_addr_t val;

  if (ip4addr_aton(cp, &val)) {
 8024aea:	f107 030c 	add.w	r3, r7, #12
 8024aee:	4619      	mov	r1, r3
 8024af0:	6878      	ldr	r0, [r7, #4]
 8024af2:	f000 f80b 	bl	8024b0c <ip4addr_aton>
 8024af6:	4603      	mov	r3, r0
 8024af8:	2b00      	cmp	r3, #0
 8024afa:	d001      	beq.n	8024b00 <ipaddr_addr+0x1e>
    return ip4_addr_get_u32(&val);
 8024afc:	68fb      	ldr	r3, [r7, #12]
 8024afe:	e001      	b.n	8024b04 <ipaddr_addr+0x22>
  }
  return (IPADDR_NONE);
 8024b00:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
}
 8024b04:	4618      	mov	r0, r3
 8024b06:	3710      	adds	r7, #16
 8024b08:	46bd      	mov	sp, r7
 8024b0a:	bd80      	pop	{r7, pc}

08024b0c <ip4addr_aton>:
 * @param addr pointer to which to save the ip address in network order
 * @return 1 if cp could be converted to addr, 0 on failure
 */
int
ip4addr_aton(const char *cp, ip4_addr_t *addr)
{
 8024b0c:	b580      	push	{r7, lr}
 8024b0e:	b08a      	sub	sp, #40	@ 0x28
 8024b10:	af00      	add	r7, sp, #0
 8024b12:	6078      	str	r0, [r7, #4]
 8024b14:	6039      	str	r1, [r7, #0]
  u32_t val;
  u8_t base;
  char c;
  u32_t parts[4];
  u32_t *pp = parts;
 8024b16:	f107 030c 	add.w	r3, r7, #12
 8024b1a:	61fb      	str	r3, [r7, #28]

  c = *cp;
 8024b1c:	687b      	ldr	r3, [r7, #4]
 8024b1e:	781b      	ldrb	r3, [r3, #0]
 8024b20:	f887 3022 	strb.w	r3, [r7, #34]	@ 0x22
    /*
     * Collect number up to ``.''.
     * Values are specified as for C:
     * 0x=hex, 0=octal, 1-9=decimal.
     */
    if (!lwip_isdigit(c)) {
 8024b24:	f897 3022 	ldrb.w	r3, [r7, #34]	@ 0x22
 8024b28:	3301      	adds	r3, #1
 8024b2a:	4a89      	ldr	r2, [pc, #548]	@ (8024d50 <ip4addr_aton+0x244>)
 8024b2c:	4413      	add	r3, r2
 8024b2e:	781b      	ldrb	r3, [r3, #0]
 8024b30:	f003 0304 	and.w	r3, r3, #4
 8024b34:	2b00      	cmp	r3, #0
 8024b36:	d101      	bne.n	8024b3c <ip4addr_aton+0x30>
      return 0;
 8024b38:	2300      	movs	r3, #0
 8024b3a:	e105      	b.n	8024d48 <ip4addr_aton+0x23c>
    }
    val = 0;
 8024b3c:	2300      	movs	r3, #0
 8024b3e:	627b      	str	r3, [r7, #36]	@ 0x24
    base = 10;
 8024b40:	230a      	movs	r3, #10
 8024b42:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
    if (c == '0') {
 8024b46:	f897 3022 	ldrb.w	r3, [r7, #34]	@ 0x22
 8024b4a:	2b30      	cmp	r3, #48	@ 0x30
 8024b4c:	d11c      	bne.n	8024b88 <ip4addr_aton+0x7c>
      c = *++cp;
 8024b4e:	687b      	ldr	r3, [r7, #4]
 8024b50:	3301      	adds	r3, #1
 8024b52:	607b      	str	r3, [r7, #4]
 8024b54:	687b      	ldr	r3, [r7, #4]
 8024b56:	781b      	ldrb	r3, [r3, #0]
 8024b58:	f887 3022 	strb.w	r3, [r7, #34]	@ 0x22
      if (c == 'x' || c == 'X') {
 8024b5c:	f897 3022 	ldrb.w	r3, [r7, #34]	@ 0x22
 8024b60:	2b78      	cmp	r3, #120	@ 0x78
 8024b62:	d003      	beq.n	8024b6c <ip4addr_aton+0x60>
 8024b64:	f897 3022 	ldrb.w	r3, [r7, #34]	@ 0x22
 8024b68:	2b58      	cmp	r3, #88	@ 0x58
 8024b6a:	d10a      	bne.n	8024b82 <ip4addr_aton+0x76>
        base = 16;
 8024b6c:	2310      	movs	r3, #16
 8024b6e:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
        c = *++cp;
 8024b72:	687b      	ldr	r3, [r7, #4]
 8024b74:	3301      	adds	r3, #1
 8024b76:	607b      	str	r3, [r7, #4]
 8024b78:	687b      	ldr	r3, [r7, #4]
 8024b7a:	781b      	ldrb	r3, [r3, #0]
 8024b7c:	f887 3022 	strb.w	r3, [r7, #34]	@ 0x22
 8024b80:	e002      	b.n	8024b88 <ip4addr_aton+0x7c>
      } else {
        base = 8;
 8024b82:	2308      	movs	r3, #8
 8024b84:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
      }
    }
    for (;;) {
      if (lwip_isdigit(c)) {
 8024b88:	f897 3022 	ldrb.w	r3, [r7, #34]	@ 0x22
 8024b8c:	3301      	adds	r3, #1
 8024b8e:	4a70      	ldr	r2, [pc, #448]	@ (8024d50 <ip4addr_aton+0x244>)
 8024b90:	4413      	add	r3, r2
 8024b92:	781b      	ldrb	r3, [r3, #0]
 8024b94:	f003 0304 	and.w	r3, r3, #4
 8024b98:	2b00      	cmp	r3, #0
 8024b9a:	d011      	beq.n	8024bc0 <ip4addr_aton+0xb4>
        val = (val * base) + (u32_t)(c - '0');
 8024b9c:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 8024ba0:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8024ba2:	fb03 f202 	mul.w	r2, r3, r2
 8024ba6:	f897 3022 	ldrb.w	r3, [r7, #34]	@ 0x22
 8024baa:	4413      	add	r3, r2
 8024bac:	3b30      	subs	r3, #48	@ 0x30
 8024bae:	627b      	str	r3, [r7, #36]	@ 0x24
        c = *++cp;
 8024bb0:	687b      	ldr	r3, [r7, #4]
 8024bb2:	3301      	adds	r3, #1
 8024bb4:	607b      	str	r3, [r7, #4]
 8024bb6:	687b      	ldr	r3, [r7, #4]
 8024bb8:	781b      	ldrb	r3, [r3, #0]
 8024bba:	f887 3022 	strb.w	r3, [r7, #34]	@ 0x22
 8024bbe:	e7e3      	b.n	8024b88 <ip4addr_aton+0x7c>
      } else if (base == 16 && lwip_isxdigit(c)) {
 8024bc0:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 8024bc4:	2b10      	cmp	r3, #16
 8024bc6:	d127      	bne.n	8024c18 <ip4addr_aton+0x10c>
 8024bc8:	f897 3022 	ldrb.w	r3, [r7, #34]	@ 0x22
 8024bcc:	3301      	adds	r3, #1
 8024bce:	4a60      	ldr	r2, [pc, #384]	@ (8024d50 <ip4addr_aton+0x244>)
 8024bd0:	4413      	add	r3, r2
 8024bd2:	781b      	ldrb	r3, [r3, #0]
 8024bd4:	f003 0344 	and.w	r3, r3, #68	@ 0x44
 8024bd8:	2b00      	cmp	r3, #0
 8024bda:	d01d      	beq.n	8024c18 <ip4addr_aton+0x10c>
        val = (val << 4) | (u32_t)(c + 10 - (lwip_islower(c) ? 'a' : 'A'));
 8024bdc:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8024bde:	011b      	lsls	r3, r3, #4
 8024be0:	f897 2022 	ldrb.w	r2, [r7, #34]	@ 0x22
 8024be4:	f102 010a 	add.w	r1, r2, #10
 8024be8:	f897 2022 	ldrb.w	r2, [r7, #34]	@ 0x22
 8024bec:	3201      	adds	r2, #1
 8024bee:	4858      	ldr	r0, [pc, #352]	@ (8024d50 <ip4addr_aton+0x244>)
 8024bf0:	4402      	add	r2, r0
 8024bf2:	7812      	ldrb	r2, [r2, #0]
 8024bf4:	f002 0203 	and.w	r2, r2, #3
 8024bf8:	2a02      	cmp	r2, #2
 8024bfa:	d101      	bne.n	8024c00 <ip4addr_aton+0xf4>
 8024bfc:	2261      	movs	r2, #97	@ 0x61
 8024bfe:	e000      	b.n	8024c02 <ip4addr_aton+0xf6>
 8024c00:	2241      	movs	r2, #65	@ 0x41
 8024c02:	1a8a      	subs	r2, r1, r2
 8024c04:	4313      	orrs	r3, r2
 8024c06:	627b      	str	r3, [r7, #36]	@ 0x24
        c = *++cp;
 8024c08:	687b      	ldr	r3, [r7, #4]
 8024c0a:	3301      	adds	r3, #1
 8024c0c:	607b      	str	r3, [r7, #4]
 8024c0e:	687b      	ldr	r3, [r7, #4]
 8024c10:	781b      	ldrb	r3, [r3, #0]
 8024c12:	f887 3022 	strb.w	r3, [r7, #34]	@ 0x22
      if (lwip_isdigit(c)) {
 8024c16:	e7b7      	b.n	8024b88 <ip4addr_aton+0x7c>
      } else {
        break;
      }
    }
    if (c == '.') {
 8024c18:	f897 3022 	ldrb.w	r3, [r7, #34]	@ 0x22
 8024c1c:	2b2e      	cmp	r3, #46	@ 0x2e
 8024c1e:	d114      	bne.n	8024c4a <ip4addr_aton+0x13e>
       * Internet format:
       *  a.b.c.d
       *  a.b.c   (with c treated as 16 bits)
       *  a.b (with b treated as 24 bits)
       */
      if (pp >= parts + 3) {
 8024c20:	f107 030c 	add.w	r3, r7, #12
 8024c24:	330c      	adds	r3, #12
 8024c26:	69fa      	ldr	r2, [r7, #28]
 8024c28:	429a      	cmp	r2, r3
 8024c2a:	d301      	bcc.n	8024c30 <ip4addr_aton+0x124>
        return 0;
 8024c2c:	2300      	movs	r3, #0
 8024c2e:	e08b      	b.n	8024d48 <ip4addr_aton+0x23c>
      }
      *pp++ = val;
 8024c30:	69fb      	ldr	r3, [r7, #28]
 8024c32:	1d1a      	adds	r2, r3, #4
 8024c34:	61fa      	str	r2, [r7, #28]
 8024c36:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8024c38:	601a      	str	r2, [r3, #0]
      c = *++cp;
 8024c3a:	687b      	ldr	r3, [r7, #4]
 8024c3c:	3301      	adds	r3, #1
 8024c3e:	607b      	str	r3, [r7, #4]
 8024c40:	687b      	ldr	r3, [r7, #4]
 8024c42:	781b      	ldrb	r3, [r3, #0]
 8024c44:	f887 3022 	strb.w	r3, [r7, #34]	@ 0x22
    if (!lwip_isdigit(c)) {
 8024c48:	e76c      	b.n	8024b24 <ip4addr_aton+0x18>
    } else {
      break;
 8024c4a:	bf00      	nop
    }
  }
  /*
   * Check for trailing characters.
   */
  if (c != '\0' && !lwip_isspace(c)) {
 8024c4c:	f897 3022 	ldrb.w	r3, [r7, #34]	@ 0x22
 8024c50:	2b00      	cmp	r3, #0
 8024c52:	d00b      	beq.n	8024c6c <ip4addr_aton+0x160>
 8024c54:	f897 3022 	ldrb.w	r3, [r7, #34]	@ 0x22
 8024c58:	3301      	adds	r3, #1
 8024c5a:	4a3d      	ldr	r2, [pc, #244]	@ (8024d50 <ip4addr_aton+0x244>)
 8024c5c:	4413      	add	r3, r2
 8024c5e:	781b      	ldrb	r3, [r3, #0]
 8024c60:	f003 0308 	and.w	r3, r3, #8
 8024c64:	2b00      	cmp	r3, #0
 8024c66:	d101      	bne.n	8024c6c <ip4addr_aton+0x160>
    return 0;
 8024c68:	2300      	movs	r3, #0
 8024c6a:	e06d      	b.n	8024d48 <ip4addr_aton+0x23c>
  }
  /*
   * Concoct the address according to
   * the number of parts specified.
   */
  switch (pp - parts + 1) {
 8024c6c:	f107 030c 	add.w	r3, r7, #12
 8024c70:	69fa      	ldr	r2, [r7, #28]
 8024c72:	1ad3      	subs	r3, r2, r3
 8024c74:	109b      	asrs	r3, r3, #2
 8024c76:	3301      	adds	r3, #1
 8024c78:	2b04      	cmp	r3, #4
 8024c7a:	d853      	bhi.n	8024d24 <ip4addr_aton+0x218>
 8024c7c:	a201      	add	r2, pc, #4	@ (adr r2, 8024c84 <ip4addr_aton+0x178>)
 8024c7e:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 8024c82:	bf00      	nop
 8024c84:	08024c99 	.word	0x08024c99
 8024c88:	08024d33 	.word	0x08024d33
 8024c8c:	08024c9d 	.word	0x08024c9d
 8024c90:	08024cbf 	.word	0x08024cbf
 8024c94:	08024ced 	.word	0x08024ced

    case 0:
      return 0;       /* initial nondigit */
 8024c98:	2300      	movs	r3, #0
 8024c9a:	e055      	b.n	8024d48 <ip4addr_aton+0x23c>

    case 1:             /* a -- 32 bits */
      break;

    case 2:             /* a.b -- 8.24 bits */
      if (val > 0xffffffUL) {
 8024c9c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8024c9e:	f1b3 7f80 	cmp.w	r3, #16777216	@ 0x1000000
 8024ca2:	d301      	bcc.n	8024ca8 <ip4addr_aton+0x19c>
        return 0;
 8024ca4:	2300      	movs	r3, #0
 8024ca6:	e04f      	b.n	8024d48 <ip4addr_aton+0x23c>
      }
      if (parts[0] > 0xff) {
 8024ca8:	68fb      	ldr	r3, [r7, #12]
 8024caa:	2bff      	cmp	r3, #255	@ 0xff
 8024cac:	d901      	bls.n	8024cb2 <ip4addr_aton+0x1a6>
        return 0;
 8024cae:	2300      	movs	r3, #0
 8024cb0:	e04a      	b.n	8024d48 <ip4addr_aton+0x23c>
      }
      val |= parts[0] << 24;
 8024cb2:	68fb      	ldr	r3, [r7, #12]
 8024cb4:	061b      	lsls	r3, r3, #24
 8024cb6:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8024cb8:	4313      	orrs	r3, r2
 8024cba:	627b      	str	r3, [r7, #36]	@ 0x24
      break;
 8024cbc:	e03a      	b.n	8024d34 <ip4addr_aton+0x228>

    case 3:             /* a.b.c -- 8.8.16 bits */
      if (val > 0xffff) {
 8024cbe:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8024cc0:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 8024cc4:	d301      	bcc.n	8024cca <ip4addr_aton+0x1be>
        return 0;
 8024cc6:	2300      	movs	r3, #0
 8024cc8:	e03e      	b.n	8024d48 <ip4addr_aton+0x23c>
      }
      if ((parts[0] > 0xff) || (parts[1] > 0xff)) {
 8024cca:	68fb      	ldr	r3, [r7, #12]
 8024ccc:	2bff      	cmp	r3, #255	@ 0xff
 8024cce:	d802      	bhi.n	8024cd6 <ip4addr_aton+0x1ca>
 8024cd0:	693b      	ldr	r3, [r7, #16]
 8024cd2:	2bff      	cmp	r3, #255	@ 0xff
 8024cd4:	d901      	bls.n	8024cda <ip4addr_aton+0x1ce>
        return 0;
 8024cd6:	2300      	movs	r3, #0
 8024cd8:	e036      	b.n	8024d48 <ip4addr_aton+0x23c>
      }
      val |= (parts[0] << 24) | (parts[1] << 16);
 8024cda:	68fb      	ldr	r3, [r7, #12]
 8024cdc:	061a      	lsls	r2, r3, #24
 8024cde:	693b      	ldr	r3, [r7, #16]
 8024ce0:	041b      	lsls	r3, r3, #16
 8024ce2:	4313      	orrs	r3, r2
 8024ce4:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8024ce6:	4313      	orrs	r3, r2
 8024ce8:	627b      	str	r3, [r7, #36]	@ 0x24
      break;
 8024cea:	e023      	b.n	8024d34 <ip4addr_aton+0x228>

    case 4:             /* a.b.c.d -- 8.8.8.8 bits */
      if (val > 0xff) {
 8024cec:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8024cee:	2bff      	cmp	r3, #255	@ 0xff
 8024cf0:	d901      	bls.n	8024cf6 <ip4addr_aton+0x1ea>
        return 0;
 8024cf2:	2300      	movs	r3, #0
 8024cf4:	e028      	b.n	8024d48 <ip4addr_aton+0x23c>
      }
      if ((parts[0] > 0xff) || (parts[1] > 0xff) || (parts[2] > 0xff)) {
 8024cf6:	68fb      	ldr	r3, [r7, #12]
 8024cf8:	2bff      	cmp	r3, #255	@ 0xff
 8024cfa:	d805      	bhi.n	8024d08 <ip4addr_aton+0x1fc>
 8024cfc:	693b      	ldr	r3, [r7, #16]
 8024cfe:	2bff      	cmp	r3, #255	@ 0xff
 8024d00:	d802      	bhi.n	8024d08 <ip4addr_aton+0x1fc>
 8024d02:	697b      	ldr	r3, [r7, #20]
 8024d04:	2bff      	cmp	r3, #255	@ 0xff
 8024d06:	d901      	bls.n	8024d0c <ip4addr_aton+0x200>
        return 0;
 8024d08:	2300      	movs	r3, #0
 8024d0a:	e01d      	b.n	8024d48 <ip4addr_aton+0x23c>
      }
      val |= (parts[0] << 24) | (parts[1] << 16) | (parts[2] << 8);
 8024d0c:	68fb      	ldr	r3, [r7, #12]
 8024d0e:	061a      	lsls	r2, r3, #24
 8024d10:	693b      	ldr	r3, [r7, #16]
 8024d12:	041b      	lsls	r3, r3, #16
 8024d14:	431a      	orrs	r2, r3
 8024d16:	697b      	ldr	r3, [r7, #20]
 8024d18:	021b      	lsls	r3, r3, #8
 8024d1a:	4313      	orrs	r3, r2
 8024d1c:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8024d1e:	4313      	orrs	r3, r2
 8024d20:	627b      	str	r3, [r7, #36]	@ 0x24
      break;
 8024d22:	e007      	b.n	8024d34 <ip4addr_aton+0x228>
    default:
      LWIP_ASSERT("unhandled", 0);
 8024d24:	4b0b      	ldr	r3, [pc, #44]	@ (8024d54 <ip4addr_aton+0x248>)
 8024d26:	22f9      	movs	r2, #249	@ 0xf9
 8024d28:	490b      	ldr	r1, [pc, #44]	@ (8024d58 <ip4addr_aton+0x24c>)
 8024d2a:	480c      	ldr	r0, [pc, #48]	@ (8024d5c <ip4addr_aton+0x250>)
 8024d2c:	f004 fbee 	bl	802950c <iprintf>
      break;
 8024d30:	e000      	b.n	8024d34 <ip4addr_aton+0x228>
      break;
 8024d32:	bf00      	nop
  }
  if (addr) {
 8024d34:	683b      	ldr	r3, [r7, #0]
 8024d36:	2b00      	cmp	r3, #0
 8024d38:	d005      	beq.n	8024d46 <ip4addr_aton+0x23a>
    ip4_addr_set_u32(addr, lwip_htonl(val));
 8024d3a:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 8024d3c:	f7f3 fca1 	bl	8018682 <lwip_htonl>
 8024d40:	4602      	mov	r2, r0
 8024d42:	683b      	ldr	r3, [r7, #0]
 8024d44:	601a      	str	r2, [r3, #0]
  }
  return 1;
 8024d46:	2301      	movs	r3, #1
}
 8024d48:	4618      	mov	r0, r3
 8024d4a:	3728      	adds	r7, #40	@ 0x28
 8024d4c:	46bd      	mov	sp, r7
 8024d4e:	bd80      	pop	{r7, pc}
 8024d50:	08030880 	.word	0x08030880
 8024d54:	08030190 	.word	0x08030190
 8024d58:	080301cc 	.word	0x080301cc
 8024d5c:	080301d8 	.word	0x080301d8

08024d60 <ip4addr_ntoa>:
 * @return pointer to a global static (!) buffer that holds the ASCII
 *         representation of addr
 */
char *
ip4addr_ntoa(const ip4_addr_t *addr)
{
 8024d60:	b580      	push	{r7, lr}
 8024d62:	b082      	sub	sp, #8
 8024d64:	af00      	add	r7, sp, #0
 8024d66:	6078      	str	r0, [r7, #4]
  static char str[IP4ADDR_STRLEN_MAX];
  return ip4addr_ntoa_r(addr, str, IP4ADDR_STRLEN_MAX);
 8024d68:	2210      	movs	r2, #16
 8024d6a:	4904      	ldr	r1, [pc, #16]	@ (8024d7c <ip4addr_ntoa+0x1c>)
 8024d6c:	6878      	ldr	r0, [r7, #4]
 8024d6e:	f000 f807 	bl	8024d80 <ip4addr_ntoa_r>
 8024d72:	4603      	mov	r3, r0
}
 8024d74:	4618      	mov	r0, r3
 8024d76:	3708      	adds	r7, #8
 8024d78:	46bd      	mov	sp, r7
 8024d7a:	bd80      	pop	{r7, pc}
 8024d7c:	2402a178 	.word	0x2402a178

08024d80 <ip4addr_ntoa_r>:
 * @return either pointer to buf which now holds the ASCII
 *         representation of addr or NULL if buf was too small
 */
char *
ip4addr_ntoa_r(const ip4_addr_t *addr, char *buf, int buflen)
{
 8024d80:	b480      	push	{r7}
 8024d82:	b08d      	sub	sp, #52	@ 0x34
 8024d84:	af00      	add	r7, sp, #0
 8024d86:	60f8      	str	r0, [r7, #12]
 8024d88:	60b9      	str	r1, [r7, #8]
 8024d8a:	607a      	str	r2, [r7, #4]
  char *rp;
  u8_t *ap;
  u8_t rem;
  u8_t n;
  u8_t i;
  int len = 0;
 8024d8c:	2300      	movs	r3, #0
 8024d8e:	623b      	str	r3, [r7, #32]

  s_addr = ip4_addr_get_u32(addr);
 8024d90:	68fb      	ldr	r3, [r7, #12]
 8024d92:	681b      	ldr	r3, [r3, #0]
 8024d94:	61bb      	str	r3, [r7, #24]

  rp = buf;
 8024d96:	68bb      	ldr	r3, [r7, #8]
 8024d98:	62fb      	str	r3, [r7, #44]	@ 0x2c
  ap = (u8_t *)&s_addr;
 8024d9a:	f107 0318 	add.w	r3, r7, #24
 8024d9e:	62bb      	str	r3, [r7, #40]	@ 0x28
  for (n = 0; n < 4; n++) {
 8024da0:	2300      	movs	r3, #0
 8024da2:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
 8024da6:	e058      	b.n	8024e5a <ip4addr_ntoa_r+0xda>
    i = 0;
 8024da8:	2300      	movs	r3, #0
 8024daa:	f887 3026 	strb.w	r3, [r7, #38]	@ 0x26
    do {
      rem = *ap % (u8_t)10;
 8024dae:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8024db0:	781a      	ldrb	r2, [r3, #0]
 8024db2:	4b32      	ldr	r3, [pc, #200]	@ (8024e7c <ip4addr_ntoa_r+0xfc>)
 8024db4:	fba3 1302 	umull	r1, r3, r3, r2
 8024db8:	08d9      	lsrs	r1, r3, #3
 8024dba:	460b      	mov	r3, r1
 8024dbc:	009b      	lsls	r3, r3, #2
 8024dbe:	440b      	add	r3, r1
 8024dc0:	005b      	lsls	r3, r3, #1
 8024dc2:	1ad3      	subs	r3, r2, r3
 8024dc4:	77fb      	strb	r3, [r7, #31]
      *ap /= (u8_t)10;
 8024dc6:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8024dc8:	781b      	ldrb	r3, [r3, #0]
 8024dca:	4a2c      	ldr	r2, [pc, #176]	@ (8024e7c <ip4addr_ntoa_r+0xfc>)
 8024dcc:	fba2 2303 	umull	r2, r3, r2, r3
 8024dd0:	08db      	lsrs	r3, r3, #3
 8024dd2:	b2da      	uxtb	r2, r3
 8024dd4:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8024dd6:	701a      	strb	r2, [r3, #0]
      inv[i++] = (char)('0' + rem);
 8024dd8:	f897 3026 	ldrb.w	r3, [r7, #38]	@ 0x26
 8024ddc:	1c5a      	adds	r2, r3, #1
 8024dde:	f887 2026 	strb.w	r2, [r7, #38]	@ 0x26
 8024de2:	4619      	mov	r1, r3
 8024de4:	7ffb      	ldrb	r3, [r7, #31]
 8024de6:	3330      	adds	r3, #48	@ 0x30
 8024de8:	b2da      	uxtb	r2, r3
 8024dea:	f101 0330 	add.w	r3, r1, #48	@ 0x30
 8024dee:	443b      	add	r3, r7
 8024df0:	f803 2c1c 	strb.w	r2, [r3, #-28]
    } while (*ap);
 8024df4:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8024df6:	781b      	ldrb	r3, [r3, #0]
 8024df8:	2b00      	cmp	r3, #0
 8024dfa:	d1d8      	bne.n	8024dae <ip4addr_ntoa_r+0x2e>
    while (i--) {
 8024dfc:	e011      	b.n	8024e22 <ip4addr_ntoa_r+0xa2>
      if (len++ >= buflen) {
 8024dfe:	6a3b      	ldr	r3, [r7, #32]
 8024e00:	1c5a      	adds	r2, r3, #1
 8024e02:	623a      	str	r2, [r7, #32]
 8024e04:	687a      	ldr	r2, [r7, #4]
 8024e06:	429a      	cmp	r2, r3
 8024e08:	dc01      	bgt.n	8024e0e <ip4addr_ntoa_r+0x8e>
        return NULL;
 8024e0a:	2300      	movs	r3, #0
 8024e0c:	e030      	b.n	8024e70 <ip4addr_ntoa_r+0xf0>
      }
      *rp++ = inv[i];
 8024e0e:	f897 2026 	ldrb.w	r2, [r7, #38]	@ 0x26
 8024e12:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8024e14:	1c59      	adds	r1, r3, #1
 8024e16:	62f9      	str	r1, [r7, #44]	@ 0x2c
 8024e18:	3230      	adds	r2, #48	@ 0x30
 8024e1a:	443a      	add	r2, r7
 8024e1c:	f812 2c1c 	ldrb.w	r2, [r2, #-28]
 8024e20:	701a      	strb	r2, [r3, #0]
    while (i--) {
 8024e22:	f897 3026 	ldrb.w	r3, [r7, #38]	@ 0x26
 8024e26:	1e5a      	subs	r2, r3, #1
 8024e28:	f887 2026 	strb.w	r2, [r7, #38]	@ 0x26
 8024e2c:	2b00      	cmp	r3, #0
 8024e2e:	d1e6      	bne.n	8024dfe <ip4addr_ntoa_r+0x7e>
    }
    if (len++ >= buflen) {
 8024e30:	6a3b      	ldr	r3, [r7, #32]
 8024e32:	1c5a      	adds	r2, r3, #1
 8024e34:	623a      	str	r2, [r7, #32]
 8024e36:	687a      	ldr	r2, [r7, #4]
 8024e38:	429a      	cmp	r2, r3
 8024e3a:	dc01      	bgt.n	8024e40 <ip4addr_ntoa_r+0xc0>
      return NULL;
 8024e3c:	2300      	movs	r3, #0
 8024e3e:	e017      	b.n	8024e70 <ip4addr_ntoa_r+0xf0>
    }
    *rp++ = '.';
 8024e40:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8024e42:	1c5a      	adds	r2, r3, #1
 8024e44:	62fa      	str	r2, [r7, #44]	@ 0x2c
 8024e46:	222e      	movs	r2, #46	@ 0x2e
 8024e48:	701a      	strb	r2, [r3, #0]
    ap++;
 8024e4a:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8024e4c:	3301      	adds	r3, #1
 8024e4e:	62bb      	str	r3, [r7, #40]	@ 0x28
  for (n = 0; n < 4; n++) {
 8024e50:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 8024e54:	3301      	adds	r3, #1
 8024e56:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
 8024e5a:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 8024e5e:	2b03      	cmp	r3, #3
 8024e60:	d9a2      	bls.n	8024da8 <ip4addr_ntoa_r+0x28>
  }
  *--rp = 0;
 8024e62:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8024e64:	3b01      	subs	r3, #1
 8024e66:	62fb      	str	r3, [r7, #44]	@ 0x2c
 8024e68:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8024e6a:	2200      	movs	r2, #0
 8024e6c:	701a      	strb	r2, [r3, #0]
  return buf;
 8024e6e:	68bb      	ldr	r3, [r7, #8]
}
 8024e70:	4618      	mov	r0, r3
 8024e72:	3734      	adds	r7, #52	@ 0x34
 8024e74:	46bd      	mov	sp, r7
 8024e76:	f85d 7b04 	ldr.w	r7, [sp], #4
 8024e7a:	4770      	bx	lr
 8024e7c:	cccccccd 	.word	0xcccccccd

08024e80 <ip_reass_tmr>:
 *
 * Should be called every 1000 msec (defined by IP_TMR_INTERVAL).
 */
void
ip_reass_tmr(void)
{
 8024e80:	b580      	push	{r7, lr}
 8024e82:	b084      	sub	sp, #16
 8024e84:	af00      	add	r7, sp, #0
  struct ip_reassdata *r, *prev = NULL;
 8024e86:	2300      	movs	r3, #0
 8024e88:	60bb      	str	r3, [r7, #8]

  r = reassdatagrams;
 8024e8a:	4b12      	ldr	r3, [pc, #72]	@ (8024ed4 <ip_reass_tmr+0x54>)
 8024e8c:	681b      	ldr	r3, [r3, #0]
 8024e8e:	60fb      	str	r3, [r7, #12]
  while (r != NULL) {
 8024e90:	e018      	b.n	8024ec4 <ip_reass_tmr+0x44>
    /* Decrement the timer. Once it reaches 0,
     * clean up the incomplete fragment assembly */
    if (r->timer > 0) {
 8024e92:	68fb      	ldr	r3, [r7, #12]
 8024e94:	7fdb      	ldrb	r3, [r3, #31]
 8024e96:	2b00      	cmp	r3, #0
 8024e98:	d00b      	beq.n	8024eb2 <ip_reass_tmr+0x32>
      r->timer--;
 8024e9a:	68fb      	ldr	r3, [r7, #12]
 8024e9c:	7fdb      	ldrb	r3, [r3, #31]
 8024e9e:	3b01      	subs	r3, #1
 8024ea0:	b2da      	uxtb	r2, r3
 8024ea2:	68fb      	ldr	r3, [r7, #12]
 8024ea4:	77da      	strb	r2, [r3, #31]
      LWIP_DEBUGF(IP_REASS_DEBUG, ("ip_reass_tmr: timer dec %"U16_F"\n", (u16_t)r->timer));
      prev = r;
 8024ea6:	68fb      	ldr	r3, [r7, #12]
 8024ea8:	60bb      	str	r3, [r7, #8]
      r = r->next;
 8024eaa:	68fb      	ldr	r3, [r7, #12]
 8024eac:	681b      	ldr	r3, [r3, #0]
 8024eae:	60fb      	str	r3, [r7, #12]
 8024eb0:	e008      	b.n	8024ec4 <ip_reass_tmr+0x44>
    } else {
      /* reassembly timed out */
      struct ip_reassdata *tmp;
      LWIP_DEBUGF(IP_REASS_DEBUG, ("ip_reass_tmr: timer timed out\n"));
      tmp = r;
 8024eb2:	68fb      	ldr	r3, [r7, #12]
 8024eb4:	607b      	str	r3, [r7, #4]
      /* get the next pointer before freeing */
      r = r->next;
 8024eb6:	68fb      	ldr	r3, [r7, #12]
 8024eb8:	681b      	ldr	r3, [r3, #0]
 8024eba:	60fb      	str	r3, [r7, #12]
      /* free the helper struct and all enqueued pbufs */
      ip_reass_free_complete_datagram(tmp, prev);
 8024ebc:	68b9      	ldr	r1, [r7, #8]
 8024ebe:	6878      	ldr	r0, [r7, #4]
 8024ec0:	f000 f80a 	bl	8024ed8 <ip_reass_free_complete_datagram>
  while (r != NULL) {
 8024ec4:	68fb      	ldr	r3, [r7, #12]
 8024ec6:	2b00      	cmp	r3, #0
 8024ec8:	d1e3      	bne.n	8024e92 <ip_reass_tmr+0x12>
    }
  }
}
 8024eca:	bf00      	nop
 8024ecc:	bf00      	nop
 8024ece:	3710      	adds	r7, #16
 8024ed0:	46bd      	mov	sp, r7
 8024ed2:	bd80      	pop	{r7, pc}
 8024ed4:	2402a188 	.word	0x2402a188

08024ed8 <ip_reass_free_complete_datagram>:
 * @param prev the previous datagram in the linked list
 * @return the number of pbufs freed
 */
static int
ip_reass_free_complete_datagram(struct ip_reassdata *ipr, struct ip_reassdata *prev)
{
 8024ed8:	b580      	push	{r7, lr}
 8024eda:	b088      	sub	sp, #32
 8024edc:	af00      	add	r7, sp, #0
 8024ede:	6078      	str	r0, [r7, #4]
 8024ee0:	6039      	str	r1, [r7, #0]
  u16_t pbufs_freed = 0;
 8024ee2:	2300      	movs	r3, #0
 8024ee4:	83fb      	strh	r3, [r7, #30]
  u16_t clen;
  struct pbuf *p;
  struct ip_reass_helper *iprh;

  LWIP_ASSERT("prev != ipr", prev != ipr);
 8024ee6:	683a      	ldr	r2, [r7, #0]
 8024ee8:	687b      	ldr	r3, [r7, #4]
 8024eea:	429a      	cmp	r2, r3
 8024eec:	d105      	bne.n	8024efa <ip_reass_free_complete_datagram+0x22>
 8024eee:	4b45      	ldr	r3, [pc, #276]	@ (8025004 <ip_reass_free_complete_datagram+0x12c>)
 8024ef0:	22ab      	movs	r2, #171	@ 0xab
 8024ef2:	4945      	ldr	r1, [pc, #276]	@ (8025008 <ip_reass_free_complete_datagram+0x130>)
 8024ef4:	4845      	ldr	r0, [pc, #276]	@ (802500c <ip_reass_free_complete_datagram+0x134>)
 8024ef6:	f004 fb09 	bl	802950c <iprintf>
  if (prev != NULL) {
 8024efa:	683b      	ldr	r3, [r7, #0]
 8024efc:	2b00      	cmp	r3, #0
 8024efe:	d00a      	beq.n	8024f16 <ip_reass_free_complete_datagram+0x3e>
    LWIP_ASSERT("prev->next == ipr", prev->next == ipr);
 8024f00:	683b      	ldr	r3, [r7, #0]
 8024f02:	681b      	ldr	r3, [r3, #0]
 8024f04:	687a      	ldr	r2, [r7, #4]
 8024f06:	429a      	cmp	r2, r3
 8024f08:	d005      	beq.n	8024f16 <ip_reass_free_complete_datagram+0x3e>
 8024f0a:	4b3e      	ldr	r3, [pc, #248]	@ (8025004 <ip_reass_free_complete_datagram+0x12c>)
 8024f0c:	22ad      	movs	r2, #173	@ 0xad
 8024f0e:	4940      	ldr	r1, [pc, #256]	@ (8025010 <ip_reass_free_complete_datagram+0x138>)
 8024f10:	483e      	ldr	r0, [pc, #248]	@ (802500c <ip_reass_free_complete_datagram+0x134>)
 8024f12:	f004 fafb 	bl	802950c <iprintf>
  }

  MIB2_STATS_INC(mib2.ipreasmfails);
#if LWIP_ICMP
  iprh = (struct ip_reass_helper *)ipr->p->payload;
 8024f16:	687b      	ldr	r3, [r7, #4]
 8024f18:	685b      	ldr	r3, [r3, #4]
 8024f1a:	685b      	ldr	r3, [r3, #4]
 8024f1c:	617b      	str	r3, [r7, #20]
  if (iprh->start == 0) {
 8024f1e:	697b      	ldr	r3, [r7, #20]
 8024f20:	889b      	ldrh	r3, [r3, #4]
 8024f22:	b29b      	uxth	r3, r3
 8024f24:	2b00      	cmp	r3, #0
 8024f26:	d12a      	bne.n	8024f7e <ip_reass_free_complete_datagram+0xa6>
    /* The first fragment was received, send ICMP time exceeded. */
    /* First, de-queue the first pbuf from r->p. */
    p = ipr->p;
 8024f28:	687b      	ldr	r3, [r7, #4]
 8024f2a:	685b      	ldr	r3, [r3, #4]
 8024f2c:	61bb      	str	r3, [r7, #24]
    ipr->p = iprh->next_pbuf;
 8024f2e:	697b      	ldr	r3, [r7, #20]
 8024f30:	681a      	ldr	r2, [r3, #0]
 8024f32:	687b      	ldr	r3, [r7, #4]
 8024f34:	605a      	str	r2, [r3, #4]
    /* Then, copy the original header into it. */
    SMEMCPY(p->payload, &ipr->iphdr, IP_HLEN);
 8024f36:	69bb      	ldr	r3, [r7, #24]
 8024f38:	6858      	ldr	r0, [r3, #4]
 8024f3a:	687b      	ldr	r3, [r7, #4]
 8024f3c:	3308      	adds	r3, #8
 8024f3e:	2214      	movs	r2, #20
 8024f40:	4619      	mov	r1, r3
 8024f42:	f004 fd6c 	bl	8029a1e <memcpy>
    icmp_time_exceeded(p, ICMP_TE_FRAG);
 8024f46:	2101      	movs	r1, #1
 8024f48:	69b8      	ldr	r0, [r7, #24]
 8024f4a:	f7ff fa4d 	bl	80243e8 <icmp_time_exceeded>
    clen = pbuf_clen(p);
 8024f4e:	69b8      	ldr	r0, [r7, #24]
 8024f50:	f7f5 f8f2 	bl	801a138 <pbuf_clen>
 8024f54:	4603      	mov	r3, r0
 8024f56:	827b      	strh	r3, [r7, #18]
    LWIP_ASSERT("pbufs_freed + clen <= 0xffff", pbufs_freed + clen <= 0xffff);
 8024f58:	8bfa      	ldrh	r2, [r7, #30]
 8024f5a:	8a7b      	ldrh	r3, [r7, #18]
 8024f5c:	4413      	add	r3, r2
 8024f5e:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 8024f62:	db05      	blt.n	8024f70 <ip_reass_free_complete_datagram+0x98>
 8024f64:	4b27      	ldr	r3, [pc, #156]	@ (8025004 <ip_reass_free_complete_datagram+0x12c>)
 8024f66:	22bc      	movs	r2, #188	@ 0xbc
 8024f68:	492a      	ldr	r1, [pc, #168]	@ (8025014 <ip_reass_free_complete_datagram+0x13c>)
 8024f6a:	4828      	ldr	r0, [pc, #160]	@ (802500c <ip_reass_free_complete_datagram+0x134>)
 8024f6c:	f004 face 	bl	802950c <iprintf>
    pbufs_freed = (u16_t)(pbufs_freed + clen);
 8024f70:	8bfa      	ldrh	r2, [r7, #30]
 8024f72:	8a7b      	ldrh	r3, [r7, #18]
 8024f74:	4413      	add	r3, r2
 8024f76:	83fb      	strh	r3, [r7, #30]
    pbuf_free(p);
 8024f78:	69b8      	ldr	r0, [r7, #24]
 8024f7a:	f7f5 f84f 	bl	801a01c <pbuf_free>
  }
#endif /* LWIP_ICMP */

  /* First, free all received pbufs.  The individual pbufs need to be released
     separately as they have not yet been chained */
  p = ipr->p;
 8024f7e:	687b      	ldr	r3, [r7, #4]
 8024f80:	685b      	ldr	r3, [r3, #4]
 8024f82:	61bb      	str	r3, [r7, #24]
  while (p != NULL) {
 8024f84:	e01f      	b.n	8024fc6 <ip_reass_free_complete_datagram+0xee>
    struct pbuf *pcur;
    iprh = (struct ip_reass_helper *)p->payload;
 8024f86:	69bb      	ldr	r3, [r7, #24]
 8024f88:	685b      	ldr	r3, [r3, #4]
 8024f8a:	617b      	str	r3, [r7, #20]
    pcur = p;
 8024f8c:	69bb      	ldr	r3, [r7, #24]
 8024f8e:	60fb      	str	r3, [r7, #12]
    /* get the next pointer before freeing */
    p = iprh->next_pbuf;
 8024f90:	697b      	ldr	r3, [r7, #20]
 8024f92:	681b      	ldr	r3, [r3, #0]
 8024f94:	61bb      	str	r3, [r7, #24]
    clen = pbuf_clen(pcur);
 8024f96:	68f8      	ldr	r0, [r7, #12]
 8024f98:	f7f5 f8ce 	bl	801a138 <pbuf_clen>
 8024f9c:	4603      	mov	r3, r0
 8024f9e:	827b      	strh	r3, [r7, #18]
    LWIP_ASSERT("pbufs_freed + clen <= 0xffff", pbufs_freed + clen <= 0xffff);
 8024fa0:	8bfa      	ldrh	r2, [r7, #30]
 8024fa2:	8a7b      	ldrh	r3, [r7, #18]
 8024fa4:	4413      	add	r3, r2
 8024fa6:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 8024faa:	db05      	blt.n	8024fb8 <ip_reass_free_complete_datagram+0xe0>
 8024fac:	4b15      	ldr	r3, [pc, #84]	@ (8025004 <ip_reass_free_complete_datagram+0x12c>)
 8024fae:	22cc      	movs	r2, #204	@ 0xcc
 8024fb0:	4918      	ldr	r1, [pc, #96]	@ (8025014 <ip_reass_free_complete_datagram+0x13c>)
 8024fb2:	4816      	ldr	r0, [pc, #88]	@ (802500c <ip_reass_free_complete_datagram+0x134>)
 8024fb4:	f004 faaa 	bl	802950c <iprintf>
    pbufs_freed = (u16_t)(pbufs_freed + clen);
 8024fb8:	8bfa      	ldrh	r2, [r7, #30]
 8024fba:	8a7b      	ldrh	r3, [r7, #18]
 8024fbc:	4413      	add	r3, r2
 8024fbe:	83fb      	strh	r3, [r7, #30]
    pbuf_free(pcur);
 8024fc0:	68f8      	ldr	r0, [r7, #12]
 8024fc2:	f7f5 f82b 	bl	801a01c <pbuf_free>
  while (p != NULL) {
 8024fc6:	69bb      	ldr	r3, [r7, #24]
 8024fc8:	2b00      	cmp	r3, #0
 8024fca:	d1dc      	bne.n	8024f86 <ip_reass_free_complete_datagram+0xae>
  }
  /* Then, unchain the struct ip_reassdata from the list and free it. */
  ip_reass_dequeue_datagram(ipr, prev);
 8024fcc:	6839      	ldr	r1, [r7, #0]
 8024fce:	6878      	ldr	r0, [r7, #4]
 8024fd0:	f000 f8c2 	bl	8025158 <ip_reass_dequeue_datagram>
  LWIP_ASSERT("ip_reass_pbufcount >= pbufs_freed", ip_reass_pbufcount >= pbufs_freed);
 8024fd4:	4b10      	ldr	r3, [pc, #64]	@ (8025018 <ip_reass_free_complete_datagram+0x140>)
 8024fd6:	881b      	ldrh	r3, [r3, #0]
 8024fd8:	8bfa      	ldrh	r2, [r7, #30]
 8024fda:	429a      	cmp	r2, r3
 8024fdc:	d905      	bls.n	8024fea <ip_reass_free_complete_datagram+0x112>
 8024fde:	4b09      	ldr	r3, [pc, #36]	@ (8025004 <ip_reass_free_complete_datagram+0x12c>)
 8024fe0:	22d2      	movs	r2, #210	@ 0xd2
 8024fe2:	490e      	ldr	r1, [pc, #56]	@ (802501c <ip_reass_free_complete_datagram+0x144>)
 8024fe4:	4809      	ldr	r0, [pc, #36]	@ (802500c <ip_reass_free_complete_datagram+0x134>)
 8024fe6:	f004 fa91 	bl	802950c <iprintf>
  ip_reass_pbufcount = (u16_t)(ip_reass_pbufcount - pbufs_freed);
 8024fea:	4b0b      	ldr	r3, [pc, #44]	@ (8025018 <ip_reass_free_complete_datagram+0x140>)
 8024fec:	881a      	ldrh	r2, [r3, #0]
 8024fee:	8bfb      	ldrh	r3, [r7, #30]
 8024ff0:	1ad3      	subs	r3, r2, r3
 8024ff2:	b29a      	uxth	r2, r3
 8024ff4:	4b08      	ldr	r3, [pc, #32]	@ (8025018 <ip_reass_free_complete_datagram+0x140>)
 8024ff6:	801a      	strh	r2, [r3, #0]

  return pbufs_freed;
 8024ff8:	8bfb      	ldrh	r3, [r7, #30]
}
 8024ffa:	4618      	mov	r0, r3
 8024ffc:	3720      	adds	r7, #32
 8024ffe:	46bd      	mov	sp, r7
 8025000:	bd80      	pop	{r7, pc}
 8025002:	bf00      	nop
 8025004:	08030200 	.word	0x08030200
 8025008:	0803023c 	.word	0x0803023c
 802500c:	08030248 	.word	0x08030248
 8025010:	08030270 	.word	0x08030270
 8025014:	08030284 	.word	0x08030284
 8025018:	2402a18c 	.word	0x2402a18c
 802501c:	080302a4 	.word	0x080302a4

08025020 <ip_reass_remove_oldest_datagram>:
 *        (used for freeing other datagrams if not enough space)
 * @return the number of pbufs freed
 */
static int
ip_reass_remove_oldest_datagram(struct ip_hdr *fraghdr, int pbufs_needed)
{
 8025020:	b580      	push	{r7, lr}
 8025022:	b08a      	sub	sp, #40	@ 0x28
 8025024:	af00      	add	r7, sp, #0
 8025026:	6078      	str	r0, [r7, #4]
 8025028:	6039      	str	r1, [r7, #0]
  /* @todo Can't we simply remove the last datagram in the
   *       linked list behind reassdatagrams?
   */
  struct ip_reassdata *r, *oldest, *prev, *oldest_prev;
  int pbufs_freed = 0, pbufs_freed_current;
 802502a:	2300      	movs	r3, #0
 802502c:	617b      	str	r3, [r7, #20]
  int other_datagrams;

  /* Free datagrams until being allowed to enqueue 'pbufs_needed' pbufs,
   * but don't free the datagram that 'fraghdr' belongs to! */
  do {
    oldest = NULL;
 802502e:	2300      	movs	r3, #0
 8025030:	623b      	str	r3, [r7, #32]
    prev = NULL;
 8025032:	2300      	movs	r3, #0
 8025034:	61fb      	str	r3, [r7, #28]
    oldest_prev = NULL;
 8025036:	2300      	movs	r3, #0
 8025038:	61bb      	str	r3, [r7, #24]
    other_datagrams = 0;
 802503a:	2300      	movs	r3, #0
 802503c:	613b      	str	r3, [r7, #16]
    r = reassdatagrams;
 802503e:	4b28      	ldr	r3, [pc, #160]	@ (80250e0 <ip_reass_remove_oldest_datagram+0xc0>)
 8025040:	681b      	ldr	r3, [r3, #0]
 8025042:	627b      	str	r3, [r7, #36]	@ 0x24
    while (r != NULL) {
 8025044:	e030      	b.n	80250a8 <ip_reass_remove_oldest_datagram+0x88>
      if (!IP_ADDRESSES_AND_ID_MATCH(&r->iphdr, fraghdr)) {
 8025046:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8025048:	695a      	ldr	r2, [r3, #20]
 802504a:	687b      	ldr	r3, [r7, #4]
 802504c:	68db      	ldr	r3, [r3, #12]
 802504e:	429a      	cmp	r2, r3
 8025050:	d10c      	bne.n	802506c <ip_reass_remove_oldest_datagram+0x4c>
 8025052:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8025054:	699a      	ldr	r2, [r3, #24]
 8025056:	687b      	ldr	r3, [r7, #4]
 8025058:	691b      	ldr	r3, [r3, #16]
 802505a:	429a      	cmp	r2, r3
 802505c:	d106      	bne.n	802506c <ip_reass_remove_oldest_datagram+0x4c>
 802505e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8025060:	899a      	ldrh	r2, [r3, #12]
 8025062:	687b      	ldr	r3, [r7, #4]
 8025064:	889b      	ldrh	r3, [r3, #4]
 8025066:	b29b      	uxth	r3, r3
 8025068:	429a      	cmp	r2, r3
 802506a:	d014      	beq.n	8025096 <ip_reass_remove_oldest_datagram+0x76>
        /* Not the same datagram as fraghdr */
        other_datagrams++;
 802506c:	693b      	ldr	r3, [r7, #16]
 802506e:	3301      	adds	r3, #1
 8025070:	613b      	str	r3, [r7, #16]
        if (oldest == NULL) {
 8025072:	6a3b      	ldr	r3, [r7, #32]
 8025074:	2b00      	cmp	r3, #0
 8025076:	d104      	bne.n	8025082 <ip_reass_remove_oldest_datagram+0x62>
          oldest = r;
 8025078:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 802507a:	623b      	str	r3, [r7, #32]
          oldest_prev = prev;
 802507c:	69fb      	ldr	r3, [r7, #28]
 802507e:	61bb      	str	r3, [r7, #24]
 8025080:	e009      	b.n	8025096 <ip_reass_remove_oldest_datagram+0x76>
        } else if (r->timer <= oldest->timer) {
 8025082:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8025084:	7fda      	ldrb	r2, [r3, #31]
 8025086:	6a3b      	ldr	r3, [r7, #32]
 8025088:	7fdb      	ldrb	r3, [r3, #31]
 802508a:	429a      	cmp	r2, r3
 802508c:	d803      	bhi.n	8025096 <ip_reass_remove_oldest_datagram+0x76>
          /* older than the previous oldest */
          oldest = r;
 802508e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8025090:	623b      	str	r3, [r7, #32]
          oldest_prev = prev;
 8025092:	69fb      	ldr	r3, [r7, #28]
 8025094:	61bb      	str	r3, [r7, #24]
        }
      }
      if (r->next != NULL) {
 8025096:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8025098:	681b      	ldr	r3, [r3, #0]
 802509a:	2b00      	cmp	r3, #0
 802509c:	d001      	beq.n	80250a2 <ip_reass_remove_oldest_datagram+0x82>
        prev = r;
 802509e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80250a0:	61fb      	str	r3, [r7, #28]
      }
      r = r->next;
 80250a2:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80250a4:	681b      	ldr	r3, [r3, #0]
 80250a6:	627b      	str	r3, [r7, #36]	@ 0x24
    while (r != NULL) {
 80250a8:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80250aa:	2b00      	cmp	r3, #0
 80250ac:	d1cb      	bne.n	8025046 <ip_reass_remove_oldest_datagram+0x26>
    }
    if (oldest != NULL) {
 80250ae:	6a3b      	ldr	r3, [r7, #32]
 80250b0:	2b00      	cmp	r3, #0
 80250b2:	d008      	beq.n	80250c6 <ip_reass_remove_oldest_datagram+0xa6>
      pbufs_freed_current = ip_reass_free_complete_datagram(oldest, oldest_prev);
 80250b4:	69b9      	ldr	r1, [r7, #24]
 80250b6:	6a38      	ldr	r0, [r7, #32]
 80250b8:	f7ff ff0e 	bl	8024ed8 <ip_reass_free_complete_datagram>
 80250bc:	60f8      	str	r0, [r7, #12]
      pbufs_freed += pbufs_freed_current;
 80250be:	697a      	ldr	r2, [r7, #20]
 80250c0:	68fb      	ldr	r3, [r7, #12]
 80250c2:	4413      	add	r3, r2
 80250c4:	617b      	str	r3, [r7, #20]
    }
  } while ((pbufs_freed < pbufs_needed) && (other_datagrams > 1));
 80250c6:	697a      	ldr	r2, [r7, #20]
 80250c8:	683b      	ldr	r3, [r7, #0]
 80250ca:	429a      	cmp	r2, r3
 80250cc:	da02      	bge.n	80250d4 <ip_reass_remove_oldest_datagram+0xb4>
 80250ce:	693b      	ldr	r3, [r7, #16]
 80250d0:	2b01      	cmp	r3, #1
 80250d2:	dcac      	bgt.n	802502e <ip_reass_remove_oldest_datagram+0xe>
  return pbufs_freed;
 80250d4:	697b      	ldr	r3, [r7, #20]
}
 80250d6:	4618      	mov	r0, r3
 80250d8:	3728      	adds	r7, #40	@ 0x28
 80250da:	46bd      	mov	sp, r7
 80250dc:	bd80      	pop	{r7, pc}
 80250de:	bf00      	nop
 80250e0:	2402a188 	.word	0x2402a188

080250e4 <ip_reass_enqueue_new_datagram>:
 * @param clen number of pbufs needed to enqueue (used for freeing other datagrams if not enough space)
 * @return A pointer to the queue location into which the fragment was enqueued
 */
static struct ip_reassdata *
ip_reass_enqueue_new_datagram(struct ip_hdr *fraghdr, int clen)
{
 80250e4:	b580      	push	{r7, lr}
 80250e6:	b084      	sub	sp, #16
 80250e8:	af00      	add	r7, sp, #0
 80250ea:	6078      	str	r0, [r7, #4]
 80250ec:	6039      	str	r1, [r7, #0]
#if ! IP_REASS_FREE_OLDEST
  LWIP_UNUSED_ARG(clen);
#endif

  /* No matching previous fragment found, allocate a new reassdata struct */
  ipr = (struct ip_reassdata *)memp_malloc(MEMP_REASSDATA);
 80250ee:	2004      	movs	r0, #4
 80250f0:	f7f4 f830 	bl	8019154 <memp_malloc>
 80250f4:	60f8      	str	r0, [r7, #12]
  if (ipr == NULL) {
 80250f6:	68fb      	ldr	r3, [r7, #12]
 80250f8:	2b00      	cmp	r3, #0
 80250fa:	d110      	bne.n	802511e <ip_reass_enqueue_new_datagram+0x3a>
#if IP_REASS_FREE_OLDEST
    if (ip_reass_remove_oldest_datagram(fraghdr, clen) >= clen) {
 80250fc:	6839      	ldr	r1, [r7, #0]
 80250fe:	6878      	ldr	r0, [r7, #4]
 8025100:	f7ff ff8e 	bl	8025020 <ip_reass_remove_oldest_datagram>
 8025104:	4602      	mov	r2, r0
 8025106:	683b      	ldr	r3, [r7, #0]
 8025108:	4293      	cmp	r3, r2
 802510a:	dc03      	bgt.n	8025114 <ip_reass_enqueue_new_datagram+0x30>
      ipr = (struct ip_reassdata *)memp_malloc(MEMP_REASSDATA);
 802510c:	2004      	movs	r0, #4
 802510e:	f7f4 f821 	bl	8019154 <memp_malloc>
 8025112:	60f8      	str	r0, [r7, #12]
    }
    if (ipr == NULL)
 8025114:	68fb      	ldr	r3, [r7, #12]
 8025116:	2b00      	cmp	r3, #0
 8025118:	d101      	bne.n	802511e <ip_reass_enqueue_new_datagram+0x3a>
#endif /* IP_REASS_FREE_OLDEST */
    {
      IPFRAG_STATS_INC(ip_frag.memerr);
      LWIP_DEBUGF(IP_REASS_DEBUG, ("Failed to alloc reassdata struct\n"));
      return NULL;
 802511a:	2300      	movs	r3, #0
 802511c:	e016      	b.n	802514c <ip_reass_enqueue_new_datagram+0x68>
    }
  }
  memset(ipr, 0, sizeof(struct ip_reassdata));
 802511e:	2220      	movs	r2, #32
 8025120:	2100      	movs	r1, #0
 8025122:	68f8      	ldr	r0, [r7, #12]
 8025124:	f004 fb84 	bl	8029830 <memset>
  ipr->timer = IP_REASS_MAXAGE;
 8025128:	68fb      	ldr	r3, [r7, #12]
 802512a:	220f      	movs	r2, #15
 802512c:	77da      	strb	r2, [r3, #31]

  /* enqueue the new structure to the front of the list */
  ipr->next = reassdatagrams;
 802512e:	4b09      	ldr	r3, [pc, #36]	@ (8025154 <ip_reass_enqueue_new_datagram+0x70>)
 8025130:	681a      	ldr	r2, [r3, #0]
 8025132:	68fb      	ldr	r3, [r7, #12]
 8025134:	601a      	str	r2, [r3, #0]
  reassdatagrams = ipr;
 8025136:	4a07      	ldr	r2, [pc, #28]	@ (8025154 <ip_reass_enqueue_new_datagram+0x70>)
 8025138:	68fb      	ldr	r3, [r7, #12]
 802513a:	6013      	str	r3, [r2, #0]
  /* copy the ip header for later tests and input */
  /* @todo: no ip options supported? */
  SMEMCPY(&(ipr->iphdr), fraghdr, IP_HLEN);
 802513c:	68fb      	ldr	r3, [r7, #12]
 802513e:	3308      	adds	r3, #8
 8025140:	2214      	movs	r2, #20
 8025142:	6879      	ldr	r1, [r7, #4]
 8025144:	4618      	mov	r0, r3
 8025146:	f004 fc6a 	bl	8029a1e <memcpy>
  return ipr;
 802514a:	68fb      	ldr	r3, [r7, #12]
}
 802514c:	4618      	mov	r0, r3
 802514e:	3710      	adds	r7, #16
 8025150:	46bd      	mov	sp, r7
 8025152:	bd80      	pop	{r7, pc}
 8025154:	2402a188 	.word	0x2402a188

08025158 <ip_reass_dequeue_datagram>:
 * Dequeues a datagram from the datagram queue. Doesn't deallocate the pbufs.
 * @param ipr points to the queue entry to dequeue
 */
static void
ip_reass_dequeue_datagram(struct ip_reassdata *ipr, struct ip_reassdata *prev)
{
 8025158:	b580      	push	{r7, lr}
 802515a:	b082      	sub	sp, #8
 802515c:	af00      	add	r7, sp, #0
 802515e:	6078      	str	r0, [r7, #4]
 8025160:	6039      	str	r1, [r7, #0]
  /* dequeue the reass struct  */
  if (reassdatagrams == ipr) {
 8025162:	4b10      	ldr	r3, [pc, #64]	@ (80251a4 <ip_reass_dequeue_datagram+0x4c>)
 8025164:	681b      	ldr	r3, [r3, #0]
 8025166:	687a      	ldr	r2, [r7, #4]
 8025168:	429a      	cmp	r2, r3
 802516a:	d104      	bne.n	8025176 <ip_reass_dequeue_datagram+0x1e>
    /* it was the first in the list */
    reassdatagrams = ipr->next;
 802516c:	687b      	ldr	r3, [r7, #4]
 802516e:	681b      	ldr	r3, [r3, #0]
 8025170:	4a0c      	ldr	r2, [pc, #48]	@ (80251a4 <ip_reass_dequeue_datagram+0x4c>)
 8025172:	6013      	str	r3, [r2, #0]
 8025174:	e00d      	b.n	8025192 <ip_reass_dequeue_datagram+0x3a>
  } else {
    /* it wasn't the first, so it must have a valid 'prev' */
    LWIP_ASSERT("sanity check linked list", prev != NULL);
 8025176:	683b      	ldr	r3, [r7, #0]
 8025178:	2b00      	cmp	r3, #0
 802517a:	d106      	bne.n	802518a <ip_reass_dequeue_datagram+0x32>
 802517c:	4b0a      	ldr	r3, [pc, #40]	@ (80251a8 <ip_reass_dequeue_datagram+0x50>)
 802517e:	f240 1245 	movw	r2, #325	@ 0x145
 8025182:	490a      	ldr	r1, [pc, #40]	@ (80251ac <ip_reass_dequeue_datagram+0x54>)
 8025184:	480a      	ldr	r0, [pc, #40]	@ (80251b0 <ip_reass_dequeue_datagram+0x58>)
 8025186:	f004 f9c1 	bl	802950c <iprintf>
    prev->next = ipr->next;
 802518a:	687b      	ldr	r3, [r7, #4]
 802518c:	681a      	ldr	r2, [r3, #0]
 802518e:	683b      	ldr	r3, [r7, #0]
 8025190:	601a      	str	r2, [r3, #0]
  }

  /* now we can free the ip_reassdata struct */
  memp_free(MEMP_REASSDATA, ipr);
 8025192:	6879      	ldr	r1, [r7, #4]
 8025194:	2004      	movs	r0, #4
 8025196:	f7f4 f853 	bl	8019240 <memp_free>
}
 802519a:	bf00      	nop
 802519c:	3708      	adds	r7, #8
 802519e:	46bd      	mov	sp, r7
 80251a0:	bd80      	pop	{r7, pc}
 80251a2:	bf00      	nop
 80251a4:	2402a188 	.word	0x2402a188
 80251a8:	08030200 	.word	0x08030200
 80251ac:	080302c8 	.word	0x080302c8
 80251b0:	08030248 	.word	0x08030248

080251b4 <ip_reass_chain_frag_into_datagram_and_validate>:
 * @param is_last is 1 if this pbuf has MF==0 (ipr->flags not updated yet)
 * @return see IP_REASS_VALIDATE_* defines
 */
static int
ip_reass_chain_frag_into_datagram_and_validate(struct ip_reassdata *ipr, struct pbuf *new_p, int is_last)
{
 80251b4:	b580      	push	{r7, lr}
 80251b6:	b08c      	sub	sp, #48	@ 0x30
 80251b8:	af00      	add	r7, sp, #0
 80251ba:	60f8      	str	r0, [r7, #12]
 80251bc:	60b9      	str	r1, [r7, #8]
 80251be:	607a      	str	r2, [r7, #4]
  struct ip_reass_helper *iprh, *iprh_tmp, *iprh_prev = NULL;
 80251c0:	2300      	movs	r3, #0
 80251c2:	62bb      	str	r3, [r7, #40]	@ 0x28
  struct pbuf *q;
  u16_t offset, len;
  u8_t hlen;
  struct ip_hdr *fraghdr;
  int valid = 1;
 80251c4:	2301      	movs	r3, #1
 80251c6:	623b      	str	r3, [r7, #32]

  /* Extract length and fragment offset from current fragment */
  fraghdr = (struct ip_hdr *)new_p->payload;
 80251c8:	68bb      	ldr	r3, [r7, #8]
 80251ca:	685b      	ldr	r3, [r3, #4]
 80251cc:	61fb      	str	r3, [r7, #28]
  len = lwip_ntohs(IPH_LEN(fraghdr));
 80251ce:	69fb      	ldr	r3, [r7, #28]
 80251d0:	885b      	ldrh	r3, [r3, #2]
 80251d2:	b29b      	uxth	r3, r3
 80251d4:	4618      	mov	r0, r3
 80251d6:	f7f3 fa3f 	bl	8018658 <lwip_htons>
 80251da:	4603      	mov	r3, r0
 80251dc:	837b      	strh	r3, [r7, #26]
  hlen = IPH_HL_BYTES(fraghdr);
 80251de:	69fb      	ldr	r3, [r7, #28]
 80251e0:	781b      	ldrb	r3, [r3, #0]
 80251e2:	f003 030f 	and.w	r3, r3, #15
 80251e6:	b2db      	uxtb	r3, r3
 80251e8:	009b      	lsls	r3, r3, #2
 80251ea:	767b      	strb	r3, [r7, #25]
  if (hlen > len) {
 80251ec:	7e7b      	ldrb	r3, [r7, #25]
 80251ee:	b29b      	uxth	r3, r3
 80251f0:	8b7a      	ldrh	r2, [r7, #26]
 80251f2:	429a      	cmp	r2, r3
 80251f4:	d202      	bcs.n	80251fc <ip_reass_chain_frag_into_datagram_and_validate+0x48>
    /* invalid datagram */
    return IP_REASS_VALIDATE_PBUF_DROPPED;
 80251f6:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80251fa:	e135      	b.n	8025468 <ip_reass_chain_frag_into_datagram_and_validate+0x2b4>
  }
  len = (u16_t)(len - hlen);
 80251fc:	7e7b      	ldrb	r3, [r7, #25]
 80251fe:	b29b      	uxth	r3, r3
 8025200:	8b7a      	ldrh	r2, [r7, #26]
 8025202:	1ad3      	subs	r3, r2, r3
 8025204:	837b      	strh	r3, [r7, #26]
  offset = IPH_OFFSET_BYTES(fraghdr);
 8025206:	69fb      	ldr	r3, [r7, #28]
 8025208:	88db      	ldrh	r3, [r3, #6]
 802520a:	b29b      	uxth	r3, r3
 802520c:	4618      	mov	r0, r3
 802520e:	f7f3 fa23 	bl	8018658 <lwip_htons>
 8025212:	4603      	mov	r3, r0
 8025214:	f3c3 030c 	ubfx	r3, r3, #0, #13
 8025218:	b29b      	uxth	r3, r3
 802521a:	00db      	lsls	r3, r3, #3
 802521c:	82fb      	strh	r3, [r7, #22]
  /* overwrite the fragment's ip header from the pbuf with our helper struct,
   * and setup the embedded helper structure. */
  /* make sure the struct ip_reass_helper fits into the IP header */
  LWIP_ASSERT("sizeof(struct ip_reass_helper) <= IP_HLEN",
              sizeof(struct ip_reass_helper) <= IP_HLEN);
  iprh = (struct ip_reass_helper *)new_p->payload;
 802521e:	68bb      	ldr	r3, [r7, #8]
 8025220:	685b      	ldr	r3, [r3, #4]
 8025222:	62fb      	str	r3, [r7, #44]	@ 0x2c
  iprh->next_pbuf = NULL;
 8025224:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8025226:	2200      	movs	r2, #0
 8025228:	701a      	strb	r2, [r3, #0]
 802522a:	2200      	movs	r2, #0
 802522c:	705a      	strb	r2, [r3, #1]
 802522e:	2200      	movs	r2, #0
 8025230:	709a      	strb	r2, [r3, #2]
 8025232:	2200      	movs	r2, #0
 8025234:	70da      	strb	r2, [r3, #3]
  iprh->start = offset;
 8025236:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8025238:	8afa      	ldrh	r2, [r7, #22]
 802523a:	809a      	strh	r2, [r3, #4]
  iprh->end = (u16_t)(offset + len);
 802523c:	8afa      	ldrh	r2, [r7, #22]
 802523e:	8b7b      	ldrh	r3, [r7, #26]
 8025240:	4413      	add	r3, r2
 8025242:	b29a      	uxth	r2, r3
 8025244:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8025246:	80da      	strh	r2, [r3, #6]
  if (iprh->end < offset) {
 8025248:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 802524a:	88db      	ldrh	r3, [r3, #6]
 802524c:	b29b      	uxth	r3, r3
 802524e:	8afa      	ldrh	r2, [r7, #22]
 8025250:	429a      	cmp	r2, r3
 8025252:	d902      	bls.n	802525a <ip_reass_chain_frag_into_datagram_and_validate+0xa6>
    /* u16_t overflow, cannot handle this */
    return IP_REASS_VALIDATE_PBUF_DROPPED;
 8025254:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8025258:	e106      	b.n	8025468 <ip_reass_chain_frag_into_datagram_and_validate+0x2b4>
  }

  /* Iterate through until we either get to the end of the list (append),
   * or we find one with a larger offset (insert). */
  for (q = ipr->p; q != NULL;) {
 802525a:	68fb      	ldr	r3, [r7, #12]
 802525c:	685b      	ldr	r3, [r3, #4]
 802525e:	627b      	str	r3, [r7, #36]	@ 0x24
 8025260:	e068      	b.n	8025334 <ip_reass_chain_frag_into_datagram_and_validate+0x180>
    iprh_tmp = (struct ip_reass_helper *)q->payload;
 8025262:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8025264:	685b      	ldr	r3, [r3, #4]
 8025266:	613b      	str	r3, [r7, #16]
    if (iprh->start < iprh_tmp->start) {
 8025268:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 802526a:	889b      	ldrh	r3, [r3, #4]
 802526c:	b29a      	uxth	r2, r3
 802526e:	693b      	ldr	r3, [r7, #16]
 8025270:	889b      	ldrh	r3, [r3, #4]
 8025272:	b29b      	uxth	r3, r3
 8025274:	429a      	cmp	r2, r3
 8025276:	d235      	bcs.n	80252e4 <ip_reass_chain_frag_into_datagram_and_validate+0x130>
      /* the new pbuf should be inserted before this */
      iprh->next_pbuf = q;
 8025278:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 802527a:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 802527c:	601a      	str	r2, [r3, #0]
      if (iprh_prev != NULL) {
 802527e:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8025280:	2b00      	cmp	r3, #0
 8025282:	d020      	beq.n	80252c6 <ip_reass_chain_frag_into_datagram_and_validate+0x112>
        /* not the fragment with the lowest offset */
#if IP_REASS_CHECK_OVERLAP
        if ((iprh->start < iprh_prev->end) || (iprh->end > iprh_tmp->start)) {
 8025284:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8025286:	889b      	ldrh	r3, [r3, #4]
 8025288:	b29a      	uxth	r2, r3
 802528a:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 802528c:	88db      	ldrh	r3, [r3, #6]
 802528e:	b29b      	uxth	r3, r3
 8025290:	429a      	cmp	r2, r3
 8025292:	d307      	bcc.n	80252a4 <ip_reass_chain_frag_into_datagram_and_validate+0xf0>
 8025294:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8025296:	88db      	ldrh	r3, [r3, #6]
 8025298:	b29a      	uxth	r2, r3
 802529a:	693b      	ldr	r3, [r7, #16]
 802529c:	889b      	ldrh	r3, [r3, #4]
 802529e:	b29b      	uxth	r3, r3
 80252a0:	429a      	cmp	r2, r3
 80252a2:	d902      	bls.n	80252aa <ip_reass_chain_frag_into_datagram_and_validate+0xf6>
          /* fragment overlaps with previous or following, throw away */
          return IP_REASS_VALIDATE_PBUF_DROPPED;
 80252a4:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80252a8:	e0de      	b.n	8025468 <ip_reass_chain_frag_into_datagram_and_validate+0x2b4>
        }
#endif /* IP_REASS_CHECK_OVERLAP */
        iprh_prev->next_pbuf = new_p;
 80252aa:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80252ac:	68ba      	ldr	r2, [r7, #8]
 80252ae:	601a      	str	r2, [r3, #0]
        if (iprh_prev->end != iprh->start) {
 80252b0:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80252b2:	88db      	ldrh	r3, [r3, #6]
 80252b4:	b29a      	uxth	r2, r3
 80252b6:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80252b8:	889b      	ldrh	r3, [r3, #4]
 80252ba:	b29b      	uxth	r3, r3
 80252bc:	429a      	cmp	r2, r3
 80252be:	d03d      	beq.n	802533c <ip_reass_chain_frag_into_datagram_and_validate+0x188>
          /* There is a fragment missing between the current
           * and the previous fragment */
          valid = 0;
 80252c0:	2300      	movs	r3, #0
 80252c2:	623b      	str	r3, [r7, #32]
        }
#endif /* IP_REASS_CHECK_OVERLAP */
        /* fragment with the lowest offset */
        ipr->p = new_p;
      }
      break;
 80252c4:	e03a      	b.n	802533c <ip_reass_chain_frag_into_datagram_and_validate+0x188>
        if (iprh->end > iprh_tmp->start) {
 80252c6:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80252c8:	88db      	ldrh	r3, [r3, #6]
 80252ca:	b29a      	uxth	r2, r3
 80252cc:	693b      	ldr	r3, [r7, #16]
 80252ce:	889b      	ldrh	r3, [r3, #4]
 80252d0:	b29b      	uxth	r3, r3
 80252d2:	429a      	cmp	r2, r3
 80252d4:	d902      	bls.n	80252dc <ip_reass_chain_frag_into_datagram_and_validate+0x128>
          return IP_REASS_VALIDATE_PBUF_DROPPED;
 80252d6:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80252da:	e0c5      	b.n	8025468 <ip_reass_chain_frag_into_datagram_and_validate+0x2b4>
        ipr->p = new_p;
 80252dc:	68fb      	ldr	r3, [r7, #12]
 80252de:	68ba      	ldr	r2, [r7, #8]
 80252e0:	605a      	str	r2, [r3, #4]
      break;
 80252e2:	e02b      	b.n	802533c <ip_reass_chain_frag_into_datagram_and_validate+0x188>
    } else if (iprh->start == iprh_tmp->start) {
 80252e4:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80252e6:	889b      	ldrh	r3, [r3, #4]
 80252e8:	b29a      	uxth	r2, r3
 80252ea:	693b      	ldr	r3, [r7, #16]
 80252ec:	889b      	ldrh	r3, [r3, #4]
 80252ee:	b29b      	uxth	r3, r3
 80252f0:	429a      	cmp	r2, r3
 80252f2:	d102      	bne.n	80252fa <ip_reass_chain_frag_into_datagram_and_validate+0x146>
      /* received the same datagram twice: no need to keep the datagram */
      return IP_REASS_VALIDATE_PBUF_DROPPED;
 80252f4:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80252f8:	e0b6      	b.n	8025468 <ip_reass_chain_frag_into_datagram_and_validate+0x2b4>
#if IP_REASS_CHECK_OVERLAP
    } else if (iprh->start < iprh_tmp->end) {
 80252fa:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80252fc:	889b      	ldrh	r3, [r3, #4]
 80252fe:	b29a      	uxth	r2, r3
 8025300:	693b      	ldr	r3, [r7, #16]
 8025302:	88db      	ldrh	r3, [r3, #6]
 8025304:	b29b      	uxth	r3, r3
 8025306:	429a      	cmp	r2, r3
 8025308:	d202      	bcs.n	8025310 <ip_reass_chain_frag_into_datagram_and_validate+0x15c>
      /* overlap: no need to keep the new datagram */
      return IP_REASS_VALIDATE_PBUF_DROPPED;
 802530a:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 802530e:	e0ab      	b.n	8025468 <ip_reass_chain_frag_into_datagram_and_validate+0x2b4>
#endif /* IP_REASS_CHECK_OVERLAP */
    } else {
      /* Check if the fragments received so far have no holes. */
      if (iprh_prev != NULL) {
 8025310:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8025312:	2b00      	cmp	r3, #0
 8025314:	d009      	beq.n	802532a <ip_reass_chain_frag_into_datagram_and_validate+0x176>
        if (iprh_prev->end != iprh_tmp->start) {
 8025316:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8025318:	88db      	ldrh	r3, [r3, #6]
 802531a:	b29a      	uxth	r2, r3
 802531c:	693b      	ldr	r3, [r7, #16]
 802531e:	889b      	ldrh	r3, [r3, #4]
 8025320:	b29b      	uxth	r3, r3
 8025322:	429a      	cmp	r2, r3
 8025324:	d001      	beq.n	802532a <ip_reass_chain_frag_into_datagram_and_validate+0x176>
          /* There is a fragment missing between the current
           * and the previous fragment */
          valid = 0;
 8025326:	2300      	movs	r3, #0
 8025328:	623b      	str	r3, [r7, #32]
        }
      }
    }
    q = iprh_tmp->next_pbuf;
 802532a:	693b      	ldr	r3, [r7, #16]
 802532c:	681b      	ldr	r3, [r3, #0]
 802532e:	627b      	str	r3, [r7, #36]	@ 0x24
    iprh_prev = iprh_tmp;
 8025330:	693b      	ldr	r3, [r7, #16]
 8025332:	62bb      	str	r3, [r7, #40]	@ 0x28
  for (q = ipr->p; q != NULL;) {
 8025334:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8025336:	2b00      	cmp	r3, #0
 8025338:	d193      	bne.n	8025262 <ip_reass_chain_frag_into_datagram_and_validate+0xae>
 802533a:	e000      	b.n	802533e <ip_reass_chain_frag_into_datagram_and_validate+0x18a>
      break;
 802533c:	bf00      	nop
  }

  /* If q is NULL, then we made it to the end of the list. Determine what to do now */
  if (q == NULL) {
 802533e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8025340:	2b00      	cmp	r3, #0
 8025342:	d12d      	bne.n	80253a0 <ip_reass_chain_frag_into_datagram_and_validate+0x1ec>
    if (iprh_prev != NULL) {
 8025344:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8025346:	2b00      	cmp	r3, #0
 8025348:	d01c      	beq.n	8025384 <ip_reass_chain_frag_into_datagram_and_validate+0x1d0>
      /* this is (for now), the fragment with the highest offset:
       * chain it to the last fragment */
#if IP_REASS_CHECK_OVERLAP
      LWIP_ASSERT("check fragments don't overlap", iprh_prev->end <= iprh->start);
 802534a:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 802534c:	88db      	ldrh	r3, [r3, #6]
 802534e:	b29a      	uxth	r2, r3
 8025350:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8025352:	889b      	ldrh	r3, [r3, #4]
 8025354:	b29b      	uxth	r3, r3
 8025356:	429a      	cmp	r2, r3
 8025358:	d906      	bls.n	8025368 <ip_reass_chain_frag_into_datagram_and_validate+0x1b4>
 802535a:	4b45      	ldr	r3, [pc, #276]	@ (8025470 <ip_reass_chain_frag_into_datagram_and_validate+0x2bc>)
 802535c:	f44f 72db 	mov.w	r2, #438	@ 0x1b6
 8025360:	4944      	ldr	r1, [pc, #272]	@ (8025474 <ip_reass_chain_frag_into_datagram_and_validate+0x2c0>)
 8025362:	4845      	ldr	r0, [pc, #276]	@ (8025478 <ip_reass_chain_frag_into_datagram_and_validate+0x2c4>)
 8025364:	f004 f8d2 	bl	802950c <iprintf>
#endif /* IP_REASS_CHECK_OVERLAP */
      iprh_prev->next_pbuf = new_p;
 8025368:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 802536a:	68ba      	ldr	r2, [r7, #8]
 802536c:	601a      	str	r2, [r3, #0]
      if (iprh_prev->end != iprh->start) {
 802536e:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8025370:	88db      	ldrh	r3, [r3, #6]
 8025372:	b29a      	uxth	r2, r3
 8025374:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8025376:	889b      	ldrh	r3, [r3, #4]
 8025378:	b29b      	uxth	r3, r3
 802537a:	429a      	cmp	r2, r3
 802537c:	d010      	beq.n	80253a0 <ip_reass_chain_frag_into_datagram_and_validate+0x1ec>
        valid = 0;
 802537e:	2300      	movs	r3, #0
 8025380:	623b      	str	r3, [r7, #32]
 8025382:	e00d      	b.n	80253a0 <ip_reass_chain_frag_into_datagram_and_validate+0x1ec>
      }
    } else {
#if IP_REASS_CHECK_OVERLAP
      LWIP_ASSERT("no previous fragment, this must be the first fragment!",
 8025384:	68fb      	ldr	r3, [r7, #12]
 8025386:	685b      	ldr	r3, [r3, #4]
 8025388:	2b00      	cmp	r3, #0
 802538a:	d006      	beq.n	802539a <ip_reass_chain_frag_into_datagram_and_validate+0x1e6>
 802538c:	4b38      	ldr	r3, [pc, #224]	@ (8025470 <ip_reass_chain_frag_into_datagram_and_validate+0x2bc>)
 802538e:	f44f 72df 	mov.w	r2, #446	@ 0x1be
 8025392:	493a      	ldr	r1, [pc, #232]	@ (802547c <ip_reass_chain_frag_into_datagram_and_validate+0x2c8>)
 8025394:	4838      	ldr	r0, [pc, #224]	@ (8025478 <ip_reass_chain_frag_into_datagram_and_validate+0x2c4>)
 8025396:	f004 f8b9 	bl	802950c <iprintf>
                  ipr->p == NULL);
#endif /* IP_REASS_CHECK_OVERLAP */
      /* this is the first fragment we ever received for this ip datagram */
      ipr->p = new_p;
 802539a:	68fb      	ldr	r3, [r7, #12]
 802539c:	68ba      	ldr	r2, [r7, #8]
 802539e:	605a      	str	r2, [r3, #4]
    }
  }

  /* At this point, the validation part begins: */
  /* If we already received the last fragment */
  if (is_last || ((ipr->flags & IP_REASS_FLAG_LASTFRAG) != 0)) {
 80253a0:	687b      	ldr	r3, [r7, #4]
 80253a2:	2b00      	cmp	r3, #0
 80253a4:	d105      	bne.n	80253b2 <ip_reass_chain_frag_into_datagram_and_validate+0x1fe>
 80253a6:	68fb      	ldr	r3, [r7, #12]
 80253a8:	7f9b      	ldrb	r3, [r3, #30]
 80253aa:	f003 0301 	and.w	r3, r3, #1
 80253ae:	2b00      	cmp	r3, #0
 80253b0:	d059      	beq.n	8025466 <ip_reass_chain_frag_into_datagram_and_validate+0x2b2>
    /* and had no holes so far */
    if (valid) {
 80253b2:	6a3b      	ldr	r3, [r7, #32]
 80253b4:	2b00      	cmp	r3, #0
 80253b6:	d04f      	beq.n	8025458 <ip_reass_chain_frag_into_datagram_and_validate+0x2a4>
      /* then check if the rest of the fragments is here */
      /* Check if the queue starts with the first datagram */
      if ((ipr->p == NULL) || (((struct ip_reass_helper *)ipr->p->payload)->start != 0)) {
 80253b8:	68fb      	ldr	r3, [r7, #12]
 80253ba:	685b      	ldr	r3, [r3, #4]
 80253bc:	2b00      	cmp	r3, #0
 80253be:	d006      	beq.n	80253ce <ip_reass_chain_frag_into_datagram_and_validate+0x21a>
 80253c0:	68fb      	ldr	r3, [r7, #12]
 80253c2:	685b      	ldr	r3, [r3, #4]
 80253c4:	685b      	ldr	r3, [r3, #4]
 80253c6:	889b      	ldrh	r3, [r3, #4]
 80253c8:	b29b      	uxth	r3, r3
 80253ca:	2b00      	cmp	r3, #0
 80253cc:	d002      	beq.n	80253d4 <ip_reass_chain_frag_into_datagram_and_validate+0x220>
        valid = 0;
 80253ce:	2300      	movs	r3, #0
 80253d0:	623b      	str	r3, [r7, #32]
 80253d2:	e041      	b.n	8025458 <ip_reass_chain_frag_into_datagram_and_validate+0x2a4>
      } else {
        /* and check that there are no holes after this datagram */
        iprh_prev = iprh;
 80253d4:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80253d6:	62bb      	str	r3, [r7, #40]	@ 0x28
        q = iprh->next_pbuf;
 80253d8:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80253da:	681b      	ldr	r3, [r3, #0]
 80253dc:	627b      	str	r3, [r7, #36]	@ 0x24
        while (q != NULL) {
 80253de:	e012      	b.n	8025406 <ip_reass_chain_frag_into_datagram_and_validate+0x252>
          iprh = (struct ip_reass_helper *)q->payload;
 80253e0:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80253e2:	685b      	ldr	r3, [r3, #4]
 80253e4:	62fb      	str	r3, [r7, #44]	@ 0x2c
          if (iprh_prev->end != iprh->start) {
 80253e6:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80253e8:	88db      	ldrh	r3, [r3, #6]
 80253ea:	b29a      	uxth	r2, r3
 80253ec:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80253ee:	889b      	ldrh	r3, [r3, #4]
 80253f0:	b29b      	uxth	r3, r3
 80253f2:	429a      	cmp	r2, r3
 80253f4:	d002      	beq.n	80253fc <ip_reass_chain_frag_into_datagram_and_validate+0x248>
            valid = 0;
 80253f6:	2300      	movs	r3, #0
 80253f8:	623b      	str	r3, [r7, #32]
            break;
 80253fa:	e007      	b.n	802540c <ip_reass_chain_frag_into_datagram_and_validate+0x258>
          }
          iprh_prev = iprh;
 80253fc:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80253fe:	62bb      	str	r3, [r7, #40]	@ 0x28
          q = iprh->next_pbuf;
 8025400:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8025402:	681b      	ldr	r3, [r3, #0]
 8025404:	627b      	str	r3, [r7, #36]	@ 0x24
        while (q != NULL) {
 8025406:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8025408:	2b00      	cmp	r3, #0
 802540a:	d1e9      	bne.n	80253e0 <ip_reass_chain_frag_into_datagram_and_validate+0x22c>
        }
        /* if still valid, all fragments are received
         * (because to the MF==0 already arrived */
        if (valid) {
 802540c:	6a3b      	ldr	r3, [r7, #32]
 802540e:	2b00      	cmp	r3, #0
 8025410:	d022      	beq.n	8025458 <ip_reass_chain_frag_into_datagram_and_validate+0x2a4>
          LWIP_ASSERT("sanity check", ipr->p != NULL);
 8025412:	68fb      	ldr	r3, [r7, #12]
 8025414:	685b      	ldr	r3, [r3, #4]
 8025416:	2b00      	cmp	r3, #0
 8025418:	d106      	bne.n	8025428 <ip_reass_chain_frag_into_datagram_and_validate+0x274>
 802541a:	4b15      	ldr	r3, [pc, #84]	@ (8025470 <ip_reass_chain_frag_into_datagram_and_validate+0x2bc>)
 802541c:	f240 12df 	movw	r2, #479	@ 0x1df
 8025420:	4917      	ldr	r1, [pc, #92]	@ (8025480 <ip_reass_chain_frag_into_datagram_and_validate+0x2cc>)
 8025422:	4815      	ldr	r0, [pc, #84]	@ (8025478 <ip_reass_chain_frag_into_datagram_and_validate+0x2c4>)
 8025424:	f004 f872 	bl	802950c <iprintf>
          LWIP_ASSERT("sanity check",
 8025428:	68fb      	ldr	r3, [r7, #12]
 802542a:	685b      	ldr	r3, [r3, #4]
 802542c:	685b      	ldr	r3, [r3, #4]
 802542e:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 8025430:	429a      	cmp	r2, r3
 8025432:	d106      	bne.n	8025442 <ip_reass_chain_frag_into_datagram_and_validate+0x28e>
 8025434:	4b0e      	ldr	r3, [pc, #56]	@ (8025470 <ip_reass_chain_frag_into_datagram_and_validate+0x2bc>)
 8025436:	f44f 72f0 	mov.w	r2, #480	@ 0x1e0
 802543a:	4911      	ldr	r1, [pc, #68]	@ (8025480 <ip_reass_chain_frag_into_datagram_and_validate+0x2cc>)
 802543c:	480e      	ldr	r0, [pc, #56]	@ (8025478 <ip_reass_chain_frag_into_datagram_and_validate+0x2c4>)
 802543e:	f004 f865 	bl	802950c <iprintf>
                      ((struct ip_reass_helper *)ipr->p->payload) != iprh);
          LWIP_ASSERT("validate_datagram:next_pbuf!=NULL",
 8025442:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8025444:	681b      	ldr	r3, [r3, #0]
 8025446:	2b00      	cmp	r3, #0
 8025448:	d006      	beq.n	8025458 <ip_reass_chain_frag_into_datagram_and_validate+0x2a4>
 802544a:	4b09      	ldr	r3, [pc, #36]	@ (8025470 <ip_reass_chain_frag_into_datagram_and_validate+0x2bc>)
 802544c:	f44f 72f1 	mov.w	r2, #482	@ 0x1e2
 8025450:	490c      	ldr	r1, [pc, #48]	@ (8025484 <ip_reass_chain_frag_into_datagram_and_validate+0x2d0>)
 8025452:	4809      	ldr	r0, [pc, #36]	@ (8025478 <ip_reass_chain_frag_into_datagram_and_validate+0x2c4>)
 8025454:	f004 f85a 	bl	802950c <iprintf>
      }
    }
    /* If valid is 0 here, there are some fragments missing in the middle
     * (since MF == 0 has already arrived). Such datagrams simply time out if
     * no more fragments are received... */
    return valid ? IP_REASS_VALIDATE_TELEGRAM_FINISHED : IP_REASS_VALIDATE_PBUF_QUEUED;
 8025458:	6a3b      	ldr	r3, [r7, #32]
 802545a:	2b00      	cmp	r3, #0
 802545c:	bf14      	ite	ne
 802545e:	2301      	movne	r3, #1
 8025460:	2300      	moveq	r3, #0
 8025462:	b2db      	uxtb	r3, r3
 8025464:	e000      	b.n	8025468 <ip_reass_chain_frag_into_datagram_and_validate+0x2b4>
  }
  /* If we come here, not all fragments were received, yet! */
  return IP_REASS_VALIDATE_PBUF_QUEUED; /* not yet valid! */
 8025466:	2300      	movs	r3, #0
}
 8025468:	4618      	mov	r0, r3
 802546a:	3730      	adds	r7, #48	@ 0x30
 802546c:	46bd      	mov	sp, r7
 802546e:	bd80      	pop	{r7, pc}
 8025470:	08030200 	.word	0x08030200
 8025474:	080302e4 	.word	0x080302e4
 8025478:	08030248 	.word	0x08030248
 802547c:	08030304 	.word	0x08030304
 8025480:	0803033c 	.word	0x0803033c
 8025484:	0803034c 	.word	0x0803034c

08025488 <ip4_reass>:
 * @param p points to a pbuf chain of the fragment
 * @return NULL if reassembly is incomplete, ? otherwise
 */
struct pbuf *
ip4_reass(struct pbuf *p)
{
 8025488:	b580      	push	{r7, lr}
 802548a:	b08e      	sub	sp, #56	@ 0x38
 802548c:	af00      	add	r7, sp, #0
 802548e:	6078      	str	r0, [r7, #4]
  int is_last;

  IPFRAG_STATS_INC(ip_frag.recv);
  MIB2_STATS_INC(mib2.ipreasmreqds);

  fraghdr = (struct ip_hdr *)p->payload;
 8025490:	687b      	ldr	r3, [r7, #4]
 8025492:	685b      	ldr	r3, [r3, #4]
 8025494:	62bb      	str	r3, [r7, #40]	@ 0x28

  if (IPH_HL_BYTES(fraghdr) != IP_HLEN) {
 8025496:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8025498:	781b      	ldrb	r3, [r3, #0]
 802549a:	f003 030f 	and.w	r3, r3, #15
 802549e:	b2db      	uxtb	r3, r3
 80254a0:	009b      	lsls	r3, r3, #2
 80254a2:	b2db      	uxtb	r3, r3
 80254a4:	2b14      	cmp	r3, #20
 80254a6:	f040 8171 	bne.w	802578c <ip4_reass+0x304>
    LWIP_DEBUGF(IP_REASS_DEBUG, ("ip4_reass: IP options currently not supported!\n"));
    IPFRAG_STATS_INC(ip_frag.err);
    goto nullreturn;
  }

  offset = IPH_OFFSET_BYTES(fraghdr);
 80254aa:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80254ac:	88db      	ldrh	r3, [r3, #6]
 80254ae:	b29b      	uxth	r3, r3
 80254b0:	4618      	mov	r0, r3
 80254b2:	f7f3 f8d1 	bl	8018658 <lwip_htons>
 80254b6:	4603      	mov	r3, r0
 80254b8:	f3c3 030c 	ubfx	r3, r3, #0, #13
 80254bc:	b29b      	uxth	r3, r3
 80254be:	00db      	lsls	r3, r3, #3
 80254c0:	84fb      	strh	r3, [r7, #38]	@ 0x26
  len = lwip_ntohs(IPH_LEN(fraghdr));
 80254c2:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80254c4:	885b      	ldrh	r3, [r3, #2]
 80254c6:	b29b      	uxth	r3, r3
 80254c8:	4618      	mov	r0, r3
 80254ca:	f7f3 f8c5 	bl	8018658 <lwip_htons>
 80254ce:	4603      	mov	r3, r0
 80254d0:	84bb      	strh	r3, [r7, #36]	@ 0x24
  hlen = IPH_HL_BYTES(fraghdr);
 80254d2:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80254d4:	781b      	ldrb	r3, [r3, #0]
 80254d6:	f003 030f 	and.w	r3, r3, #15
 80254da:	b2db      	uxtb	r3, r3
 80254dc:	009b      	lsls	r3, r3, #2
 80254de:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
  if (hlen > len) {
 80254e2:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 80254e6:	b29b      	uxth	r3, r3
 80254e8:	8cba      	ldrh	r2, [r7, #36]	@ 0x24
 80254ea:	429a      	cmp	r2, r3
 80254ec:	f0c0 8150 	bcc.w	8025790 <ip4_reass+0x308>
    /* invalid datagram */
    goto nullreturn;
  }
  len = (u16_t)(len - hlen);
 80254f0:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 80254f4:	b29b      	uxth	r3, r3
 80254f6:	8cba      	ldrh	r2, [r7, #36]	@ 0x24
 80254f8:	1ad3      	subs	r3, r2, r3
 80254fa:	84bb      	strh	r3, [r7, #36]	@ 0x24

  /* Check if we are allowed to enqueue more datagrams. */
  clen = pbuf_clen(p);
 80254fc:	6878      	ldr	r0, [r7, #4]
 80254fe:	f7f4 fe1b 	bl	801a138 <pbuf_clen>
 8025502:	4603      	mov	r3, r0
 8025504:	843b      	strh	r3, [r7, #32]
  if ((ip_reass_pbufcount + clen) > IP_REASS_MAX_PBUFS) {
 8025506:	4b8c      	ldr	r3, [pc, #560]	@ (8025738 <ip4_reass+0x2b0>)
 8025508:	881b      	ldrh	r3, [r3, #0]
 802550a:	461a      	mov	r2, r3
 802550c:	8c3b      	ldrh	r3, [r7, #32]
 802550e:	4413      	add	r3, r2
 8025510:	2b0a      	cmp	r3, #10
 8025512:	dd10      	ble.n	8025536 <ip4_reass+0xae>
#if IP_REASS_FREE_OLDEST
    if (!ip_reass_remove_oldest_datagram(fraghdr, clen) ||
 8025514:	8c3b      	ldrh	r3, [r7, #32]
 8025516:	4619      	mov	r1, r3
 8025518:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 802551a:	f7ff fd81 	bl	8025020 <ip_reass_remove_oldest_datagram>
 802551e:	4603      	mov	r3, r0
 8025520:	2b00      	cmp	r3, #0
 8025522:	f000 8137 	beq.w	8025794 <ip4_reass+0x30c>
        ((ip_reass_pbufcount + clen) > IP_REASS_MAX_PBUFS))
 8025526:	4b84      	ldr	r3, [pc, #528]	@ (8025738 <ip4_reass+0x2b0>)
 8025528:	881b      	ldrh	r3, [r3, #0]
 802552a:	461a      	mov	r2, r3
 802552c:	8c3b      	ldrh	r3, [r7, #32]
 802552e:	4413      	add	r3, r2
    if (!ip_reass_remove_oldest_datagram(fraghdr, clen) ||
 8025530:	2b0a      	cmp	r3, #10
 8025532:	f300 812f 	bgt.w	8025794 <ip4_reass+0x30c>
    }
  }

  /* Look for the datagram the fragment belongs to in the current datagram queue,
   * remembering the previous in the queue for later dequeueing. */
  for (ipr = reassdatagrams; ipr != NULL; ipr = ipr->next) {
 8025536:	4b81      	ldr	r3, [pc, #516]	@ (802573c <ip4_reass+0x2b4>)
 8025538:	681b      	ldr	r3, [r3, #0]
 802553a:	633b      	str	r3, [r7, #48]	@ 0x30
 802553c:	e015      	b.n	802556a <ip4_reass+0xe2>
    /* Check if the incoming fragment matches the one currently present
       in the reassembly buffer. If so, we proceed with copying the
       fragment into the buffer. */
    if (IP_ADDRESSES_AND_ID_MATCH(&ipr->iphdr, fraghdr)) {
 802553e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8025540:	695a      	ldr	r2, [r3, #20]
 8025542:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8025544:	68db      	ldr	r3, [r3, #12]
 8025546:	429a      	cmp	r2, r3
 8025548:	d10c      	bne.n	8025564 <ip4_reass+0xdc>
 802554a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 802554c:	699a      	ldr	r2, [r3, #24]
 802554e:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8025550:	691b      	ldr	r3, [r3, #16]
 8025552:	429a      	cmp	r2, r3
 8025554:	d106      	bne.n	8025564 <ip4_reass+0xdc>
 8025556:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8025558:	899a      	ldrh	r2, [r3, #12]
 802555a:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 802555c:	889b      	ldrh	r3, [r3, #4]
 802555e:	b29b      	uxth	r3, r3
 8025560:	429a      	cmp	r2, r3
 8025562:	d006      	beq.n	8025572 <ip4_reass+0xea>
  for (ipr = reassdatagrams; ipr != NULL; ipr = ipr->next) {
 8025564:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8025566:	681b      	ldr	r3, [r3, #0]
 8025568:	633b      	str	r3, [r7, #48]	@ 0x30
 802556a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 802556c:	2b00      	cmp	r3, #0
 802556e:	d1e6      	bne.n	802553e <ip4_reass+0xb6>
 8025570:	e000      	b.n	8025574 <ip4_reass+0xec>
      LWIP_DEBUGF(IP_REASS_DEBUG, ("ip4_reass: matching previous fragment ID=%"X16_F"\n",
                                   lwip_ntohs(IPH_ID(fraghdr))));
      IPFRAG_STATS_INC(ip_frag.cachehit);
      break;
 8025572:	bf00      	nop
    }
  }

  if (ipr == NULL) {
 8025574:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8025576:	2b00      	cmp	r3, #0
 8025578:	d109      	bne.n	802558e <ip4_reass+0x106>
    /* Enqueue a new datagram into the datagram queue */
    ipr = ip_reass_enqueue_new_datagram(fraghdr, clen);
 802557a:	8c3b      	ldrh	r3, [r7, #32]
 802557c:	4619      	mov	r1, r3
 802557e:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 8025580:	f7ff fdb0 	bl	80250e4 <ip_reass_enqueue_new_datagram>
 8025584:	6338      	str	r0, [r7, #48]	@ 0x30
    /* Bail if unable to enqueue */
    if (ipr == NULL) {
 8025586:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8025588:	2b00      	cmp	r3, #0
 802558a:	d11c      	bne.n	80255c6 <ip4_reass+0x13e>
      goto nullreturn;
 802558c:	e105      	b.n	802579a <ip4_reass+0x312>
    }
  } else {
    if (((lwip_ntohs(IPH_OFFSET(fraghdr)) & IP_OFFMASK) == 0) &&
 802558e:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8025590:	88db      	ldrh	r3, [r3, #6]
 8025592:	b29b      	uxth	r3, r3
 8025594:	4618      	mov	r0, r3
 8025596:	f7f3 f85f 	bl	8018658 <lwip_htons>
 802559a:	4603      	mov	r3, r0
 802559c:	f3c3 030c 	ubfx	r3, r3, #0, #13
 80255a0:	2b00      	cmp	r3, #0
 80255a2:	d110      	bne.n	80255c6 <ip4_reass+0x13e>
        ((lwip_ntohs(IPH_OFFSET(&ipr->iphdr)) & IP_OFFMASK) != 0)) {
 80255a4:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80255a6:	89db      	ldrh	r3, [r3, #14]
 80255a8:	4618      	mov	r0, r3
 80255aa:	f7f3 f855 	bl	8018658 <lwip_htons>
 80255ae:	4603      	mov	r3, r0
 80255b0:	f3c3 030c 	ubfx	r3, r3, #0, #13
    if (((lwip_ntohs(IPH_OFFSET(fraghdr)) & IP_OFFMASK) == 0) &&
 80255b4:	2b00      	cmp	r3, #0
 80255b6:	d006      	beq.n	80255c6 <ip4_reass+0x13e>
      /* ipr->iphdr is not the header from the first fragment, but fraghdr is
       * -> copy fraghdr into ipr->iphdr since we want to have the header
       * of the first fragment (for ICMP time exceeded and later, for copying
       * all options, if supported)*/
      SMEMCPY(&ipr->iphdr, fraghdr, IP_HLEN);
 80255b8:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80255ba:	3308      	adds	r3, #8
 80255bc:	2214      	movs	r2, #20
 80255be:	6ab9      	ldr	r1, [r7, #40]	@ 0x28
 80255c0:	4618      	mov	r0, r3
 80255c2:	f004 fa2c 	bl	8029a1e <memcpy>

  /* At this point, we have either created a new entry or pointing
   * to an existing one */

  /* check for 'no more fragments', and update queue entry*/
  is_last = (IPH_OFFSET(fraghdr) & PP_NTOHS(IP_MF)) == 0;
 80255c6:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80255c8:	88db      	ldrh	r3, [r3, #6]
 80255ca:	b29b      	uxth	r3, r3
 80255cc:	f003 0320 	and.w	r3, r3, #32
 80255d0:	2b00      	cmp	r3, #0
 80255d2:	bf0c      	ite	eq
 80255d4:	2301      	moveq	r3, #1
 80255d6:	2300      	movne	r3, #0
 80255d8:	b2db      	uxtb	r3, r3
 80255da:	61fb      	str	r3, [r7, #28]
  if (is_last) {
 80255dc:	69fb      	ldr	r3, [r7, #28]
 80255de:	2b00      	cmp	r3, #0
 80255e0:	d00e      	beq.n	8025600 <ip4_reass+0x178>
    u16_t datagram_len = (u16_t)(offset + len);
 80255e2:	8cfa      	ldrh	r2, [r7, #38]	@ 0x26
 80255e4:	8cbb      	ldrh	r3, [r7, #36]	@ 0x24
 80255e6:	4413      	add	r3, r2
 80255e8:	837b      	strh	r3, [r7, #26]
    if ((datagram_len < offset) || (datagram_len > (0xFFFF - IP_HLEN))) {
 80255ea:	8b7a      	ldrh	r2, [r7, #26]
 80255ec:	8cfb      	ldrh	r3, [r7, #38]	@ 0x26
 80255ee:	429a      	cmp	r2, r3
 80255f0:	f0c0 80a0 	bcc.w	8025734 <ip4_reass+0x2ac>
 80255f4:	8b7b      	ldrh	r3, [r7, #26]
 80255f6:	f64f 72eb 	movw	r2, #65515	@ 0xffeb
 80255fa:	4293      	cmp	r3, r2
 80255fc:	f200 809a 	bhi.w	8025734 <ip4_reass+0x2ac>
      goto nullreturn_ipr;
    }
  }
  /* find the right place to insert this pbuf */
  /* @todo: trim pbufs if fragments are overlapping */
  valid = ip_reass_chain_frag_into_datagram_and_validate(ipr, p, is_last);
 8025600:	69fa      	ldr	r2, [r7, #28]
 8025602:	6879      	ldr	r1, [r7, #4]
 8025604:	6b38      	ldr	r0, [r7, #48]	@ 0x30
 8025606:	f7ff fdd5 	bl	80251b4 <ip_reass_chain_frag_into_datagram_and_validate>
 802560a:	6178      	str	r0, [r7, #20]
  if (valid == IP_REASS_VALIDATE_PBUF_DROPPED) {
 802560c:	697b      	ldr	r3, [r7, #20]
 802560e:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8025612:	f000 809b 	beq.w	802574c <ip4_reass+0x2c4>
  /* if we come here, the pbuf has been enqueued */

  /* Track the current number of pbufs current 'in-flight', in order to limit
     the number of fragments that may be enqueued at any one time
     (overflow checked by testing against IP_REASS_MAX_PBUFS) */
  ip_reass_pbufcount = (u16_t)(ip_reass_pbufcount + clen);
 8025616:	4b48      	ldr	r3, [pc, #288]	@ (8025738 <ip4_reass+0x2b0>)
 8025618:	881a      	ldrh	r2, [r3, #0]
 802561a:	8c3b      	ldrh	r3, [r7, #32]
 802561c:	4413      	add	r3, r2
 802561e:	b29a      	uxth	r2, r3
 8025620:	4b45      	ldr	r3, [pc, #276]	@ (8025738 <ip4_reass+0x2b0>)
 8025622:	801a      	strh	r2, [r3, #0]
  if (is_last) {
 8025624:	69fb      	ldr	r3, [r7, #28]
 8025626:	2b00      	cmp	r3, #0
 8025628:	d00d      	beq.n	8025646 <ip4_reass+0x1be>
    u16_t datagram_len = (u16_t)(offset + len);
 802562a:	8cfa      	ldrh	r2, [r7, #38]	@ 0x26
 802562c:	8cbb      	ldrh	r3, [r7, #36]	@ 0x24
 802562e:	4413      	add	r3, r2
 8025630:	827b      	strh	r3, [r7, #18]
    ipr->datagram_len = datagram_len;
 8025632:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8025634:	8a7a      	ldrh	r2, [r7, #18]
 8025636:	839a      	strh	r2, [r3, #28]
    ipr->flags |= IP_REASS_FLAG_LASTFRAG;
 8025638:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 802563a:	7f9b      	ldrb	r3, [r3, #30]
 802563c:	f043 0301 	orr.w	r3, r3, #1
 8025640:	b2da      	uxtb	r2, r3
 8025642:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8025644:	779a      	strb	r2, [r3, #30]
    LWIP_DEBUGF(IP_REASS_DEBUG,
                ("ip4_reass: last fragment seen, total len %"S16_F"\n",
                 ipr->datagram_len));
  }

  if (valid == IP_REASS_VALIDATE_TELEGRAM_FINISHED) {
 8025646:	697b      	ldr	r3, [r7, #20]
 8025648:	2b01      	cmp	r3, #1
 802564a:	d171      	bne.n	8025730 <ip4_reass+0x2a8>
    struct ip_reassdata *ipr_prev;
    /* the totally last fragment (flag more fragments = 0) was received at least
     * once AND all fragments are received */
    u16_t datagram_len = (u16_t)(ipr->datagram_len + IP_HLEN);
 802564c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 802564e:	8b9b      	ldrh	r3, [r3, #28]
 8025650:	3314      	adds	r3, #20
 8025652:	823b      	strh	r3, [r7, #16]

    /* save the second pbuf before copying the header over the pointer */
    r = ((struct ip_reass_helper *)ipr->p->payload)->next_pbuf;
 8025654:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8025656:	685b      	ldr	r3, [r3, #4]
 8025658:	685b      	ldr	r3, [r3, #4]
 802565a:	681b      	ldr	r3, [r3, #0]
 802565c:	62fb      	str	r3, [r7, #44]	@ 0x2c

    /* copy the original ip header back to the first pbuf */
    fraghdr = (struct ip_hdr *)(ipr->p->payload);
 802565e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8025660:	685b      	ldr	r3, [r3, #4]
 8025662:	685b      	ldr	r3, [r3, #4]
 8025664:	62bb      	str	r3, [r7, #40]	@ 0x28
    SMEMCPY(fraghdr, &ipr->iphdr, IP_HLEN);
 8025666:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8025668:	3308      	adds	r3, #8
 802566a:	2214      	movs	r2, #20
 802566c:	4619      	mov	r1, r3
 802566e:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 8025670:	f004 f9d5 	bl	8029a1e <memcpy>
    IPH_LEN_SET(fraghdr, lwip_htons(datagram_len));
 8025674:	8a3b      	ldrh	r3, [r7, #16]
 8025676:	4618      	mov	r0, r3
 8025678:	f7f2 ffee 	bl	8018658 <lwip_htons>
 802567c:	4603      	mov	r3, r0
 802567e:	461a      	mov	r2, r3
 8025680:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8025682:	805a      	strh	r2, [r3, #2]
    IPH_OFFSET_SET(fraghdr, 0);
 8025684:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8025686:	2200      	movs	r2, #0
 8025688:	719a      	strb	r2, [r3, #6]
 802568a:	2200      	movs	r2, #0
 802568c:	71da      	strb	r2, [r3, #7]
    IPH_CHKSUM_SET(fraghdr, 0);
 802568e:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8025690:	2200      	movs	r2, #0
 8025692:	729a      	strb	r2, [r3, #10]
 8025694:	2200      	movs	r2, #0
 8025696:	72da      	strb	r2, [r3, #11]
    IF__NETIF_CHECKSUM_ENABLED(ip_current_input_netif(), NETIF_CHECKSUM_GEN_IP) {
      IPH_CHKSUM_SET(fraghdr, inet_chksum(fraghdr, IP_HLEN));
    }
#endif /* CHECKSUM_GEN_IP */

    p = ipr->p;
 8025698:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 802569a:	685b      	ldr	r3, [r3, #4]
 802569c:	607b      	str	r3, [r7, #4]

    /* chain together the pbufs contained within the reass_data list. */
    while (r != NULL) {
 802569e:	e00d      	b.n	80256bc <ip4_reass+0x234>
      iprh = (struct ip_reass_helper *)r->payload;
 80256a0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80256a2:	685b      	ldr	r3, [r3, #4]
 80256a4:	60fb      	str	r3, [r7, #12]

      /* hide the ip header for every succeeding fragment */
      pbuf_remove_header(r, IP_HLEN);
 80256a6:	2114      	movs	r1, #20
 80256a8:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 80256aa:	f7f4 fbff 	bl	8019eac <pbuf_remove_header>
      pbuf_cat(p, r);
 80256ae:	6af9      	ldr	r1, [r7, #44]	@ 0x2c
 80256b0:	6878      	ldr	r0, [r7, #4]
 80256b2:	f7f4 fd81 	bl	801a1b8 <pbuf_cat>
      r = iprh->next_pbuf;
 80256b6:	68fb      	ldr	r3, [r7, #12]
 80256b8:	681b      	ldr	r3, [r3, #0]
 80256ba:	62fb      	str	r3, [r7, #44]	@ 0x2c
    while (r != NULL) {
 80256bc:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80256be:	2b00      	cmp	r3, #0
 80256c0:	d1ee      	bne.n	80256a0 <ip4_reass+0x218>
    }

    /* find the previous entry in the linked list */
    if (ipr == reassdatagrams) {
 80256c2:	4b1e      	ldr	r3, [pc, #120]	@ (802573c <ip4_reass+0x2b4>)
 80256c4:	681b      	ldr	r3, [r3, #0]
 80256c6:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 80256c8:	429a      	cmp	r2, r3
 80256ca:	d102      	bne.n	80256d2 <ip4_reass+0x24a>
      ipr_prev = NULL;
 80256cc:	2300      	movs	r3, #0
 80256ce:	637b      	str	r3, [r7, #52]	@ 0x34
 80256d0:	e010      	b.n	80256f4 <ip4_reass+0x26c>
    } else {
      for (ipr_prev = reassdatagrams; ipr_prev != NULL; ipr_prev = ipr_prev->next) {
 80256d2:	4b1a      	ldr	r3, [pc, #104]	@ (802573c <ip4_reass+0x2b4>)
 80256d4:	681b      	ldr	r3, [r3, #0]
 80256d6:	637b      	str	r3, [r7, #52]	@ 0x34
 80256d8:	e007      	b.n	80256ea <ip4_reass+0x262>
        if (ipr_prev->next == ipr) {
 80256da:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 80256dc:	681b      	ldr	r3, [r3, #0]
 80256de:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 80256e0:	429a      	cmp	r2, r3
 80256e2:	d006      	beq.n	80256f2 <ip4_reass+0x26a>
      for (ipr_prev = reassdatagrams; ipr_prev != NULL; ipr_prev = ipr_prev->next) {
 80256e4:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 80256e6:	681b      	ldr	r3, [r3, #0]
 80256e8:	637b      	str	r3, [r7, #52]	@ 0x34
 80256ea:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 80256ec:	2b00      	cmp	r3, #0
 80256ee:	d1f4      	bne.n	80256da <ip4_reass+0x252>
 80256f0:	e000      	b.n	80256f4 <ip4_reass+0x26c>
          break;
 80256f2:	bf00      	nop
        }
      }
    }

    /* release the sources allocate for the fragment queue entry */
    ip_reass_dequeue_datagram(ipr, ipr_prev);
 80256f4:	6b79      	ldr	r1, [r7, #52]	@ 0x34
 80256f6:	6b38      	ldr	r0, [r7, #48]	@ 0x30
 80256f8:	f7ff fd2e 	bl	8025158 <ip_reass_dequeue_datagram>

    /* and adjust the number of pbufs currently queued for reassembly. */
    clen = pbuf_clen(p);
 80256fc:	6878      	ldr	r0, [r7, #4]
 80256fe:	f7f4 fd1b 	bl	801a138 <pbuf_clen>
 8025702:	4603      	mov	r3, r0
 8025704:	843b      	strh	r3, [r7, #32]
    LWIP_ASSERT("ip_reass_pbufcount >= clen", ip_reass_pbufcount >= clen);
 8025706:	4b0c      	ldr	r3, [pc, #48]	@ (8025738 <ip4_reass+0x2b0>)
 8025708:	881b      	ldrh	r3, [r3, #0]
 802570a:	8c3a      	ldrh	r2, [r7, #32]
 802570c:	429a      	cmp	r2, r3
 802570e:	d906      	bls.n	802571e <ip4_reass+0x296>
 8025710:	4b0b      	ldr	r3, [pc, #44]	@ (8025740 <ip4_reass+0x2b8>)
 8025712:	f240 229b 	movw	r2, #667	@ 0x29b
 8025716:	490b      	ldr	r1, [pc, #44]	@ (8025744 <ip4_reass+0x2bc>)
 8025718:	480b      	ldr	r0, [pc, #44]	@ (8025748 <ip4_reass+0x2c0>)
 802571a:	f003 fef7 	bl	802950c <iprintf>
    ip_reass_pbufcount = (u16_t)(ip_reass_pbufcount - clen);
 802571e:	4b06      	ldr	r3, [pc, #24]	@ (8025738 <ip4_reass+0x2b0>)
 8025720:	881a      	ldrh	r2, [r3, #0]
 8025722:	8c3b      	ldrh	r3, [r7, #32]
 8025724:	1ad3      	subs	r3, r2, r3
 8025726:	b29a      	uxth	r2, r3
 8025728:	4b03      	ldr	r3, [pc, #12]	@ (8025738 <ip4_reass+0x2b0>)
 802572a:	801a      	strh	r2, [r3, #0]

    MIB2_STATS_INC(mib2.ipreasmoks);

    /* Return the pbuf chain */
    return p;
 802572c:	687b      	ldr	r3, [r7, #4]
 802572e:	e038      	b.n	80257a2 <ip4_reass+0x31a>
  }
  /* the datagram is not (yet?) reassembled completely */
  LWIP_DEBUGF(IP_REASS_DEBUG, ("ip_reass_pbufcount: %d out\n", ip_reass_pbufcount));
  return NULL;
 8025730:	2300      	movs	r3, #0
 8025732:	e036      	b.n	80257a2 <ip4_reass+0x31a>
      goto nullreturn_ipr;
 8025734:	bf00      	nop
 8025736:	e00a      	b.n	802574e <ip4_reass+0x2c6>
 8025738:	2402a18c 	.word	0x2402a18c
 802573c:	2402a188 	.word	0x2402a188
 8025740:	08030200 	.word	0x08030200
 8025744:	08030370 	.word	0x08030370
 8025748:	08030248 	.word	0x08030248
    goto nullreturn_ipr;
 802574c:	bf00      	nop

nullreturn_ipr:
  LWIP_ASSERT("ipr != NULL", ipr != NULL);
 802574e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8025750:	2b00      	cmp	r3, #0
 8025752:	d106      	bne.n	8025762 <ip4_reass+0x2da>
 8025754:	4b15      	ldr	r3, [pc, #84]	@ (80257ac <ip4_reass+0x324>)
 8025756:	f44f 722a 	mov.w	r2, #680	@ 0x2a8
 802575a:	4915      	ldr	r1, [pc, #84]	@ (80257b0 <ip4_reass+0x328>)
 802575c:	4815      	ldr	r0, [pc, #84]	@ (80257b4 <ip4_reass+0x32c>)
 802575e:	f003 fed5 	bl	802950c <iprintf>
  if (ipr->p == NULL) {
 8025762:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8025764:	685b      	ldr	r3, [r3, #4]
 8025766:	2b00      	cmp	r3, #0
 8025768:	d116      	bne.n	8025798 <ip4_reass+0x310>
    /* dropped pbuf after creating a new datagram entry: remove the entry, too */
    LWIP_ASSERT("not firstalthough just enqueued", ipr == reassdatagrams);
 802576a:	4b13      	ldr	r3, [pc, #76]	@ (80257b8 <ip4_reass+0x330>)
 802576c:	681b      	ldr	r3, [r3, #0]
 802576e:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 8025770:	429a      	cmp	r2, r3
 8025772:	d006      	beq.n	8025782 <ip4_reass+0x2fa>
 8025774:	4b0d      	ldr	r3, [pc, #52]	@ (80257ac <ip4_reass+0x324>)
 8025776:	f240 22ab 	movw	r2, #683	@ 0x2ab
 802577a:	4910      	ldr	r1, [pc, #64]	@ (80257bc <ip4_reass+0x334>)
 802577c:	480d      	ldr	r0, [pc, #52]	@ (80257b4 <ip4_reass+0x32c>)
 802577e:	f003 fec5 	bl	802950c <iprintf>
    ip_reass_dequeue_datagram(ipr, NULL);
 8025782:	2100      	movs	r1, #0
 8025784:	6b38      	ldr	r0, [r7, #48]	@ 0x30
 8025786:	f7ff fce7 	bl	8025158 <ip_reass_dequeue_datagram>
 802578a:	e006      	b.n	802579a <ip4_reass+0x312>
    goto nullreturn;
 802578c:	bf00      	nop
 802578e:	e004      	b.n	802579a <ip4_reass+0x312>
    goto nullreturn;
 8025790:	bf00      	nop
 8025792:	e002      	b.n	802579a <ip4_reass+0x312>
      goto nullreturn;
 8025794:	bf00      	nop
 8025796:	e000      	b.n	802579a <ip4_reass+0x312>
  }

nullreturn:
 8025798:	bf00      	nop
  LWIP_DEBUGF(IP_REASS_DEBUG, ("ip4_reass: nullreturn\n"));
  IPFRAG_STATS_INC(ip_frag.drop);
  pbuf_free(p);
 802579a:	6878      	ldr	r0, [r7, #4]
 802579c:	f7f4 fc3e 	bl	801a01c <pbuf_free>
  return NULL;
 80257a0:	2300      	movs	r3, #0
}
 80257a2:	4618      	mov	r0, r3
 80257a4:	3738      	adds	r7, #56	@ 0x38
 80257a6:	46bd      	mov	sp, r7
 80257a8:	bd80      	pop	{r7, pc}
 80257aa:	bf00      	nop
 80257ac:	08030200 	.word	0x08030200
 80257b0:	0803038c 	.word	0x0803038c
 80257b4:	08030248 	.word	0x08030248
 80257b8:	2402a188 	.word	0x2402a188
 80257bc:	08030398 	.word	0x08030398

080257c0 <ip_frag_alloc_pbuf_custom_ref>:
#if IP_FRAG
#if !LWIP_NETIF_TX_SINGLE_PBUF
/** Allocate a new struct pbuf_custom_ref */
static struct pbuf_custom_ref *
ip_frag_alloc_pbuf_custom_ref(void)
{
 80257c0:	b580      	push	{r7, lr}
 80257c2:	af00      	add	r7, sp, #0
  return (struct pbuf_custom_ref *)memp_malloc(MEMP_FRAG_PBUF);
 80257c4:	2005      	movs	r0, #5
 80257c6:	f7f3 fcc5 	bl	8019154 <memp_malloc>
 80257ca:	4603      	mov	r3, r0
}
 80257cc:	4618      	mov	r0, r3
 80257ce:	bd80      	pop	{r7, pc}

080257d0 <ip_frag_free_pbuf_custom_ref>:

/** Free a struct pbuf_custom_ref */
static void
ip_frag_free_pbuf_custom_ref(struct pbuf_custom_ref *p)
{
 80257d0:	b580      	push	{r7, lr}
 80257d2:	b082      	sub	sp, #8
 80257d4:	af00      	add	r7, sp, #0
 80257d6:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT("p != NULL", p != NULL);
 80257d8:	687b      	ldr	r3, [r7, #4]
 80257da:	2b00      	cmp	r3, #0
 80257dc:	d106      	bne.n	80257ec <ip_frag_free_pbuf_custom_ref+0x1c>
 80257de:	4b07      	ldr	r3, [pc, #28]	@ (80257fc <ip_frag_free_pbuf_custom_ref+0x2c>)
 80257e0:	f44f 7231 	mov.w	r2, #708	@ 0x2c4
 80257e4:	4906      	ldr	r1, [pc, #24]	@ (8025800 <ip_frag_free_pbuf_custom_ref+0x30>)
 80257e6:	4807      	ldr	r0, [pc, #28]	@ (8025804 <ip_frag_free_pbuf_custom_ref+0x34>)
 80257e8:	f003 fe90 	bl	802950c <iprintf>
  memp_free(MEMP_FRAG_PBUF, p);
 80257ec:	6879      	ldr	r1, [r7, #4]
 80257ee:	2005      	movs	r0, #5
 80257f0:	f7f3 fd26 	bl	8019240 <memp_free>
}
 80257f4:	bf00      	nop
 80257f6:	3708      	adds	r7, #8
 80257f8:	46bd      	mov	sp, r7
 80257fa:	bd80      	pop	{r7, pc}
 80257fc:	08030200 	.word	0x08030200
 8025800:	080303b8 	.word	0x080303b8
 8025804:	08030248 	.word	0x08030248

08025808 <ipfrag_free_pbuf_custom>:

/** Free-callback function to free a 'struct pbuf_custom_ref', called by
 * pbuf_free. */
static void
ipfrag_free_pbuf_custom(struct pbuf *p)
{
 8025808:	b580      	push	{r7, lr}
 802580a:	b084      	sub	sp, #16
 802580c:	af00      	add	r7, sp, #0
 802580e:	6078      	str	r0, [r7, #4]
  struct pbuf_custom_ref *pcr = (struct pbuf_custom_ref *)p;
 8025810:	687b      	ldr	r3, [r7, #4]
 8025812:	60fb      	str	r3, [r7, #12]
  LWIP_ASSERT("pcr != NULL", pcr != NULL);
 8025814:	68fb      	ldr	r3, [r7, #12]
 8025816:	2b00      	cmp	r3, #0
 8025818:	d106      	bne.n	8025828 <ipfrag_free_pbuf_custom+0x20>
 802581a:	4b11      	ldr	r3, [pc, #68]	@ (8025860 <ipfrag_free_pbuf_custom+0x58>)
 802581c:	f240 22ce 	movw	r2, #718	@ 0x2ce
 8025820:	4910      	ldr	r1, [pc, #64]	@ (8025864 <ipfrag_free_pbuf_custom+0x5c>)
 8025822:	4811      	ldr	r0, [pc, #68]	@ (8025868 <ipfrag_free_pbuf_custom+0x60>)
 8025824:	f003 fe72 	bl	802950c <iprintf>
  LWIP_ASSERT("pcr == p", (void *)pcr == (void *)p);
 8025828:	68fa      	ldr	r2, [r7, #12]
 802582a:	687b      	ldr	r3, [r7, #4]
 802582c:	429a      	cmp	r2, r3
 802582e:	d006      	beq.n	802583e <ipfrag_free_pbuf_custom+0x36>
 8025830:	4b0b      	ldr	r3, [pc, #44]	@ (8025860 <ipfrag_free_pbuf_custom+0x58>)
 8025832:	f240 22cf 	movw	r2, #719	@ 0x2cf
 8025836:	490d      	ldr	r1, [pc, #52]	@ (802586c <ipfrag_free_pbuf_custom+0x64>)
 8025838:	480b      	ldr	r0, [pc, #44]	@ (8025868 <ipfrag_free_pbuf_custom+0x60>)
 802583a:	f003 fe67 	bl	802950c <iprintf>
  if (pcr->original != NULL) {
 802583e:	68fb      	ldr	r3, [r7, #12]
 8025840:	695b      	ldr	r3, [r3, #20]
 8025842:	2b00      	cmp	r3, #0
 8025844:	d004      	beq.n	8025850 <ipfrag_free_pbuf_custom+0x48>
    pbuf_free(pcr->original);
 8025846:	68fb      	ldr	r3, [r7, #12]
 8025848:	695b      	ldr	r3, [r3, #20]
 802584a:	4618      	mov	r0, r3
 802584c:	f7f4 fbe6 	bl	801a01c <pbuf_free>
  }
  ip_frag_free_pbuf_custom_ref(pcr);
 8025850:	68f8      	ldr	r0, [r7, #12]
 8025852:	f7ff ffbd 	bl	80257d0 <ip_frag_free_pbuf_custom_ref>
}
 8025856:	bf00      	nop
 8025858:	3710      	adds	r7, #16
 802585a:	46bd      	mov	sp, r7
 802585c:	bd80      	pop	{r7, pc}
 802585e:	bf00      	nop
 8025860:	08030200 	.word	0x08030200
 8025864:	080303c4 	.word	0x080303c4
 8025868:	08030248 	.word	0x08030248
 802586c:	080303d0 	.word	0x080303d0

08025870 <ip4_frag>:
 *
 * @return ERR_OK if sent successfully, err_t otherwise
 */
err_t
ip4_frag(struct pbuf *p, struct netif *netif, const ip4_addr_t *dest)
{
 8025870:	b580      	push	{r7, lr}
 8025872:	b094      	sub	sp, #80	@ 0x50
 8025874:	af02      	add	r7, sp, #8
 8025876:	60f8      	str	r0, [r7, #12]
 8025878:	60b9      	str	r1, [r7, #8]
 802587a:	607a      	str	r2, [r7, #4]
  struct pbuf *rambuf;
#if !LWIP_NETIF_TX_SINGLE_PBUF
  struct pbuf *newpbuf;
  u16_t newpbuflen = 0;
 802587c:	2300      	movs	r3, #0
 802587e:	f8a7 3046 	strh.w	r3, [r7, #70]	@ 0x46
  u16_t left_to_copy;
#endif
  struct ip_hdr *original_iphdr;
  struct ip_hdr *iphdr;
  const u16_t nfb = (u16_t)((netif->mtu - IP_HLEN) / 8);
 8025882:	68bb      	ldr	r3, [r7, #8]
 8025884:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 8025886:	3b14      	subs	r3, #20
 8025888:	2b00      	cmp	r3, #0
 802588a:	da00      	bge.n	802588e <ip4_frag+0x1e>
 802588c:	3307      	adds	r3, #7
 802588e:	10db      	asrs	r3, r3, #3
 8025890:	877b      	strh	r3, [r7, #58]	@ 0x3a
  u16_t left, fragsize;
  u16_t ofo;
  int last;
  u16_t poff = IP_HLEN;
 8025892:	2314      	movs	r3, #20
 8025894:	87fb      	strh	r3, [r7, #62]	@ 0x3e
  u16_t tmp;
  int mf_set;

  original_iphdr = (struct ip_hdr *)p->payload;
 8025896:	68fb      	ldr	r3, [r7, #12]
 8025898:	685b      	ldr	r3, [r3, #4]
 802589a:	637b      	str	r3, [r7, #52]	@ 0x34
  iphdr = original_iphdr;
 802589c:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 802589e:	633b      	str	r3, [r7, #48]	@ 0x30
  if (IPH_HL_BYTES(iphdr) != IP_HLEN) {
 80258a0:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80258a2:	781b      	ldrb	r3, [r3, #0]
 80258a4:	f003 030f 	and.w	r3, r3, #15
 80258a8:	b2db      	uxtb	r3, r3
 80258aa:	009b      	lsls	r3, r3, #2
 80258ac:	b2db      	uxtb	r3, r3
 80258ae:	2b14      	cmp	r3, #20
 80258b0:	d002      	beq.n	80258b8 <ip4_frag+0x48>
    /* ip4_frag() does not support IP options */
    return ERR_VAL;
 80258b2:	f06f 0305 	mvn.w	r3, #5
 80258b6:	e110      	b.n	8025ada <ip4_frag+0x26a>
  }
  LWIP_ERROR("ip4_frag(): pbuf too short", p->len >= IP_HLEN, return ERR_VAL);
 80258b8:	68fb      	ldr	r3, [r7, #12]
 80258ba:	895b      	ldrh	r3, [r3, #10]
 80258bc:	2b13      	cmp	r3, #19
 80258be:	d809      	bhi.n	80258d4 <ip4_frag+0x64>
 80258c0:	4b88      	ldr	r3, [pc, #544]	@ (8025ae4 <ip4_frag+0x274>)
 80258c2:	f44f 723f 	mov.w	r2, #764	@ 0x2fc
 80258c6:	4988      	ldr	r1, [pc, #544]	@ (8025ae8 <ip4_frag+0x278>)
 80258c8:	4888      	ldr	r0, [pc, #544]	@ (8025aec <ip4_frag+0x27c>)
 80258ca:	f003 fe1f 	bl	802950c <iprintf>
 80258ce:	f06f 0305 	mvn.w	r3, #5
 80258d2:	e102      	b.n	8025ada <ip4_frag+0x26a>

  /* Save original offset */
  tmp = lwip_ntohs(IPH_OFFSET(iphdr));
 80258d4:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80258d6:	88db      	ldrh	r3, [r3, #6]
 80258d8:	b29b      	uxth	r3, r3
 80258da:	4618      	mov	r0, r3
 80258dc:	f7f2 febc 	bl	8018658 <lwip_htons>
 80258e0:	4603      	mov	r3, r0
 80258e2:	87bb      	strh	r3, [r7, #60]	@ 0x3c
  ofo = tmp & IP_OFFMASK;
 80258e4:	8fbb      	ldrh	r3, [r7, #60]	@ 0x3c
 80258e6:	f3c3 030c 	ubfx	r3, r3, #0, #13
 80258ea:	f8a7 3040 	strh.w	r3, [r7, #64]	@ 0x40
  /* already fragmented? if so, the last fragment we create must have MF, too */
  mf_set = tmp & IP_MF;
 80258ee:	8fbb      	ldrh	r3, [r7, #60]	@ 0x3c
 80258f0:	f403 5300 	and.w	r3, r3, #8192	@ 0x2000
 80258f4:	62fb      	str	r3, [r7, #44]	@ 0x2c

  left = (u16_t)(p->tot_len - IP_HLEN);
 80258f6:	68fb      	ldr	r3, [r7, #12]
 80258f8:	891b      	ldrh	r3, [r3, #8]
 80258fa:	3b14      	subs	r3, #20
 80258fc:	f8a7 3042 	strh.w	r3, [r7, #66]	@ 0x42

  while (left) {
 8025900:	e0e1      	b.n	8025ac6 <ip4_frag+0x256>
    /* Fill this fragment */
    fragsize = LWIP_MIN(left, (u16_t)(nfb * 8));
 8025902:	8f7b      	ldrh	r3, [r7, #58]	@ 0x3a
 8025904:	00db      	lsls	r3, r3, #3
 8025906:	b29b      	uxth	r3, r3
 8025908:	f8b7 2042 	ldrh.w	r2, [r7, #66]	@ 0x42
 802590c:	4293      	cmp	r3, r2
 802590e:	bf28      	it	cs
 8025910:	4613      	movcs	r3, r2
 8025912:	857b      	strh	r3, [r7, #42]	@ 0x2a
    /* When not using a static buffer, create a chain of pbufs.
     * The first will be a PBUF_RAM holding the link and IP header.
     * The rest will be PBUF_REFs mirroring the pbuf chain to be fragged,
     * but limited to the size of an mtu.
     */
    rambuf = pbuf_alloc(PBUF_LINK, IP_HLEN, PBUF_RAM);
 8025914:	f44f 7220 	mov.w	r2, #640	@ 0x280
 8025918:	2114      	movs	r1, #20
 802591a:	200e      	movs	r0, #14
 802591c:	f7f4 f868 	bl	80199f0 <pbuf_alloc>
 8025920:	6278      	str	r0, [r7, #36]	@ 0x24
    if (rambuf == NULL) {
 8025922:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8025924:	2b00      	cmp	r3, #0
 8025926:	f000 80d5 	beq.w	8025ad4 <ip4_frag+0x264>
      goto memerr;
    }
    LWIP_ASSERT("this needs a pbuf in one piece!",
 802592a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 802592c:	895b      	ldrh	r3, [r3, #10]
 802592e:	2b13      	cmp	r3, #19
 8025930:	d806      	bhi.n	8025940 <ip4_frag+0xd0>
 8025932:	4b6c      	ldr	r3, [pc, #432]	@ (8025ae4 <ip4_frag+0x274>)
 8025934:	f44f 7249 	mov.w	r2, #804	@ 0x324
 8025938:	496d      	ldr	r1, [pc, #436]	@ (8025af0 <ip4_frag+0x280>)
 802593a:	486c      	ldr	r0, [pc, #432]	@ (8025aec <ip4_frag+0x27c>)
 802593c:	f003 fde6 	bl	802950c <iprintf>
                (rambuf->len >= (IP_HLEN)));
    SMEMCPY(rambuf->payload, original_iphdr, IP_HLEN);
 8025940:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8025942:	685b      	ldr	r3, [r3, #4]
 8025944:	2214      	movs	r2, #20
 8025946:	6b79      	ldr	r1, [r7, #52]	@ 0x34
 8025948:	4618      	mov	r0, r3
 802594a:	f004 f868 	bl	8029a1e <memcpy>
    iphdr = (struct ip_hdr *)rambuf->payload;
 802594e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8025950:	685b      	ldr	r3, [r3, #4]
 8025952:	633b      	str	r3, [r7, #48]	@ 0x30

    left_to_copy = fragsize;
 8025954:	8d7b      	ldrh	r3, [r7, #42]	@ 0x2a
 8025956:	f8a7 3044 	strh.w	r3, [r7, #68]	@ 0x44
    while (left_to_copy) {
 802595a:	e064      	b.n	8025a26 <ip4_frag+0x1b6>
      struct pbuf_custom_ref *pcr;
      u16_t plen = (u16_t)(p->len - poff);
 802595c:	68fb      	ldr	r3, [r7, #12]
 802595e:	895a      	ldrh	r2, [r3, #10]
 8025960:	8ffb      	ldrh	r3, [r7, #62]	@ 0x3e
 8025962:	1ad3      	subs	r3, r2, r3
 8025964:	83fb      	strh	r3, [r7, #30]
      LWIP_ASSERT("p->len >= poff", p->len >= poff);
 8025966:	68fb      	ldr	r3, [r7, #12]
 8025968:	895b      	ldrh	r3, [r3, #10]
 802596a:	8ffa      	ldrh	r2, [r7, #62]	@ 0x3e
 802596c:	429a      	cmp	r2, r3
 802596e:	d906      	bls.n	802597e <ip4_frag+0x10e>
 8025970:	4b5c      	ldr	r3, [pc, #368]	@ (8025ae4 <ip4_frag+0x274>)
 8025972:	f240 322d 	movw	r2, #813	@ 0x32d
 8025976:	495f      	ldr	r1, [pc, #380]	@ (8025af4 <ip4_frag+0x284>)
 8025978:	485c      	ldr	r0, [pc, #368]	@ (8025aec <ip4_frag+0x27c>)
 802597a:	f003 fdc7 	bl	802950c <iprintf>
      newpbuflen = LWIP_MIN(left_to_copy, plen);
 802597e:	8bfa      	ldrh	r2, [r7, #30]
 8025980:	f8b7 3044 	ldrh.w	r3, [r7, #68]	@ 0x44
 8025984:	4293      	cmp	r3, r2
 8025986:	bf28      	it	cs
 8025988:	4613      	movcs	r3, r2
 802598a:	f8a7 3046 	strh.w	r3, [r7, #70]	@ 0x46
      /* Is this pbuf already empty? */
      if (!newpbuflen) {
 802598e:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 8025992:	2b00      	cmp	r3, #0
 8025994:	d105      	bne.n	80259a2 <ip4_frag+0x132>
        poff = 0;
 8025996:	2300      	movs	r3, #0
 8025998:	87fb      	strh	r3, [r7, #62]	@ 0x3e
        p = p->next;
 802599a:	68fb      	ldr	r3, [r7, #12]
 802599c:	681b      	ldr	r3, [r3, #0]
 802599e:	60fb      	str	r3, [r7, #12]
        continue;
 80259a0:	e041      	b.n	8025a26 <ip4_frag+0x1b6>
      }
      pcr = ip_frag_alloc_pbuf_custom_ref();
 80259a2:	f7ff ff0d 	bl	80257c0 <ip_frag_alloc_pbuf_custom_ref>
 80259a6:	61b8      	str	r0, [r7, #24]
      if (pcr == NULL) {
 80259a8:	69bb      	ldr	r3, [r7, #24]
 80259aa:	2b00      	cmp	r3, #0
 80259ac:	d103      	bne.n	80259b6 <ip4_frag+0x146>
        pbuf_free(rambuf);
 80259ae:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 80259b0:	f7f4 fb34 	bl	801a01c <pbuf_free>
        goto memerr;
 80259b4:	e08f      	b.n	8025ad6 <ip4_frag+0x266>
      }
      /* Mirror this pbuf, although we might not need all of it. */
      newpbuf = pbuf_alloced_custom(PBUF_RAW, newpbuflen, PBUF_REF, &pcr->pc,
 80259b6:	69b8      	ldr	r0, [r7, #24]
                                    (u8_t *)p->payload + poff, newpbuflen);
 80259b8:	68fb      	ldr	r3, [r7, #12]
 80259ba:	685a      	ldr	r2, [r3, #4]
      newpbuf = pbuf_alloced_custom(PBUF_RAW, newpbuflen, PBUF_REF, &pcr->pc,
 80259bc:	8ffb      	ldrh	r3, [r7, #62]	@ 0x3e
 80259be:	4413      	add	r3, r2
 80259c0:	f8b7 1046 	ldrh.w	r1, [r7, #70]	@ 0x46
 80259c4:	f8b7 2046 	ldrh.w	r2, [r7, #70]	@ 0x46
 80259c8:	9201      	str	r2, [sp, #4]
 80259ca:	9300      	str	r3, [sp, #0]
 80259cc:	4603      	mov	r3, r0
 80259ce:	2241      	movs	r2, #65	@ 0x41
 80259d0:	2000      	movs	r0, #0
 80259d2:	f7f4 f939 	bl	8019c48 <pbuf_alloced_custom>
 80259d6:	6178      	str	r0, [r7, #20]
      if (newpbuf == NULL) {
 80259d8:	697b      	ldr	r3, [r7, #20]
 80259da:	2b00      	cmp	r3, #0
 80259dc:	d106      	bne.n	80259ec <ip4_frag+0x17c>
        ip_frag_free_pbuf_custom_ref(pcr);
 80259de:	69b8      	ldr	r0, [r7, #24]
 80259e0:	f7ff fef6 	bl	80257d0 <ip_frag_free_pbuf_custom_ref>
        pbuf_free(rambuf);
 80259e4:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 80259e6:	f7f4 fb19 	bl	801a01c <pbuf_free>
        goto memerr;
 80259ea:	e074      	b.n	8025ad6 <ip4_frag+0x266>
      }
      pbuf_ref(p);
 80259ec:	68f8      	ldr	r0, [r7, #12]
 80259ee:	f7f4 fbbb 	bl	801a168 <pbuf_ref>
      pcr->original = p;
 80259f2:	69bb      	ldr	r3, [r7, #24]
 80259f4:	68fa      	ldr	r2, [r7, #12]
 80259f6:	615a      	str	r2, [r3, #20]
      pcr->pc.custom_free_function = ipfrag_free_pbuf_custom;
 80259f8:	69bb      	ldr	r3, [r7, #24]
 80259fa:	4a3f      	ldr	r2, [pc, #252]	@ (8025af8 <ip4_frag+0x288>)
 80259fc:	611a      	str	r2, [r3, #16]

      /* Add it to end of rambuf's chain, but using pbuf_cat, not pbuf_chain
       * so that it is removed when pbuf_dechain is later called on rambuf.
       */
      pbuf_cat(rambuf, newpbuf);
 80259fe:	6979      	ldr	r1, [r7, #20]
 8025a00:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 8025a02:	f7f4 fbd9 	bl	801a1b8 <pbuf_cat>
      left_to_copy = (u16_t)(left_to_copy - newpbuflen);
 8025a06:	f8b7 2044 	ldrh.w	r2, [r7, #68]	@ 0x44
 8025a0a:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 8025a0e:	1ad3      	subs	r3, r2, r3
 8025a10:	f8a7 3044 	strh.w	r3, [r7, #68]	@ 0x44
      if (left_to_copy) {
 8025a14:	f8b7 3044 	ldrh.w	r3, [r7, #68]	@ 0x44
 8025a18:	2b00      	cmp	r3, #0
 8025a1a:	d004      	beq.n	8025a26 <ip4_frag+0x1b6>
        poff = 0;
 8025a1c:	2300      	movs	r3, #0
 8025a1e:	87fb      	strh	r3, [r7, #62]	@ 0x3e
        p = p->next;
 8025a20:	68fb      	ldr	r3, [r7, #12]
 8025a22:	681b      	ldr	r3, [r3, #0]
 8025a24:	60fb      	str	r3, [r7, #12]
    while (left_to_copy) {
 8025a26:	f8b7 3044 	ldrh.w	r3, [r7, #68]	@ 0x44
 8025a2a:	2b00      	cmp	r3, #0
 8025a2c:	d196      	bne.n	802595c <ip4_frag+0xec>
      }
    }
    poff = (u16_t)(poff + newpbuflen);
 8025a2e:	8ffa      	ldrh	r2, [r7, #62]	@ 0x3e
 8025a30:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 8025a34:	4413      	add	r3, r2
 8025a36:	87fb      	strh	r3, [r7, #62]	@ 0x3e
#endif /* LWIP_NETIF_TX_SINGLE_PBUF */

    /* Correct header */
    last = (left <= netif->mtu - IP_HLEN);
 8025a38:	68bb      	ldr	r3, [r7, #8]
 8025a3a:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 8025a3c:	f1a3 0213 	sub.w	r2, r3, #19
 8025a40:	f8b7 3042 	ldrh.w	r3, [r7, #66]	@ 0x42
 8025a44:	429a      	cmp	r2, r3
 8025a46:	bfcc      	ite	gt
 8025a48:	2301      	movgt	r3, #1
 8025a4a:	2300      	movle	r3, #0
 8025a4c:	b2db      	uxtb	r3, r3
 8025a4e:	623b      	str	r3, [r7, #32]

    /* Set new offset and MF flag */
    tmp = (IP_OFFMASK & (ofo));
 8025a50:	f8b7 3040 	ldrh.w	r3, [r7, #64]	@ 0x40
 8025a54:	f3c3 030c 	ubfx	r3, r3, #0, #13
 8025a58:	87bb      	strh	r3, [r7, #60]	@ 0x3c
    if (!last || mf_set) {
 8025a5a:	6a3b      	ldr	r3, [r7, #32]
 8025a5c:	2b00      	cmp	r3, #0
 8025a5e:	d002      	beq.n	8025a66 <ip4_frag+0x1f6>
 8025a60:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8025a62:	2b00      	cmp	r3, #0
 8025a64:	d003      	beq.n	8025a6e <ip4_frag+0x1fe>
      /* the last fragment has MF set if the input frame had it */
      tmp = tmp | IP_MF;
 8025a66:	8fbb      	ldrh	r3, [r7, #60]	@ 0x3c
 8025a68:	f443 5300 	orr.w	r3, r3, #8192	@ 0x2000
 8025a6c:	87bb      	strh	r3, [r7, #60]	@ 0x3c
    }
    IPH_OFFSET_SET(iphdr, lwip_htons(tmp));
 8025a6e:	8fbb      	ldrh	r3, [r7, #60]	@ 0x3c
 8025a70:	4618      	mov	r0, r3
 8025a72:	f7f2 fdf1 	bl	8018658 <lwip_htons>
 8025a76:	4603      	mov	r3, r0
 8025a78:	461a      	mov	r2, r3
 8025a7a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8025a7c:	80da      	strh	r2, [r3, #6]
    IPH_LEN_SET(iphdr, lwip_htons((u16_t)(fragsize + IP_HLEN)));
 8025a7e:	8d7b      	ldrh	r3, [r7, #42]	@ 0x2a
 8025a80:	3314      	adds	r3, #20
 8025a82:	b29b      	uxth	r3, r3
 8025a84:	4618      	mov	r0, r3
 8025a86:	f7f2 fde7 	bl	8018658 <lwip_htons>
 8025a8a:	4603      	mov	r3, r0
 8025a8c:	461a      	mov	r2, r3
 8025a8e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8025a90:	805a      	strh	r2, [r3, #2]
    IPH_CHKSUM_SET(iphdr, 0);
 8025a92:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8025a94:	2200      	movs	r2, #0
 8025a96:	729a      	strb	r2, [r3, #10]
 8025a98:	2200      	movs	r2, #0
 8025a9a:	72da      	strb	r2, [r3, #11]
#endif /* CHECKSUM_GEN_IP */

    /* No need for separate header pbuf - we allowed room for it in rambuf
     * when allocated.
     */
    netif->output(netif, rambuf, dest);
 8025a9c:	68bb      	ldr	r3, [r7, #8]
 8025a9e:	695b      	ldr	r3, [r3, #20]
 8025aa0:	687a      	ldr	r2, [r7, #4]
 8025aa2:	6a79      	ldr	r1, [r7, #36]	@ 0x24
 8025aa4:	68b8      	ldr	r0, [r7, #8]
 8025aa6:	4798      	blx	r3
     * recreate it next time round the loop. If we're lucky the hardware
     * will have already sent the packet, the free will really free, and
     * there will be zero memory penalty.
     */

    pbuf_free(rambuf);
 8025aa8:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 8025aaa:	f7f4 fab7 	bl	801a01c <pbuf_free>
    left = (u16_t)(left - fragsize);
 8025aae:	f8b7 2042 	ldrh.w	r2, [r7, #66]	@ 0x42
 8025ab2:	8d7b      	ldrh	r3, [r7, #42]	@ 0x2a
 8025ab4:	1ad3      	subs	r3, r2, r3
 8025ab6:	f8a7 3042 	strh.w	r3, [r7, #66]	@ 0x42
    ofo = (u16_t)(ofo + nfb);
 8025aba:	f8b7 2040 	ldrh.w	r2, [r7, #64]	@ 0x40
 8025abe:	8f7b      	ldrh	r3, [r7, #58]	@ 0x3a
 8025ac0:	4413      	add	r3, r2
 8025ac2:	f8a7 3040 	strh.w	r3, [r7, #64]	@ 0x40
  while (left) {
 8025ac6:	f8b7 3042 	ldrh.w	r3, [r7, #66]	@ 0x42
 8025aca:	2b00      	cmp	r3, #0
 8025acc:	f47f af19 	bne.w	8025902 <ip4_frag+0x92>
  }
  MIB2_STATS_INC(mib2.ipfragoks);
  return ERR_OK;
 8025ad0:	2300      	movs	r3, #0
 8025ad2:	e002      	b.n	8025ada <ip4_frag+0x26a>
      goto memerr;
 8025ad4:	bf00      	nop
memerr:
  MIB2_STATS_INC(mib2.ipfragfails);
  return ERR_MEM;
 8025ad6:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
}
 8025ada:	4618      	mov	r0, r3
 8025adc:	3748      	adds	r7, #72	@ 0x48
 8025ade:	46bd      	mov	sp, r7
 8025ae0:	bd80      	pop	{r7, pc}
 8025ae2:	bf00      	nop
 8025ae4:	08030200 	.word	0x08030200
 8025ae8:	080303dc 	.word	0x080303dc
 8025aec:	08030248 	.word	0x08030248
 8025af0:	080303f8 	.word	0x080303f8
 8025af4:	08030418 	.word	0x08030418
 8025af8:	08025809 	.word	0x08025809

08025afc <ethernet_input>:
 * @see ETHARP_SUPPORT_VLAN
 * @see LWIP_HOOK_VLAN_CHECK
 */
err_t
ethernet_input(struct pbuf *p, struct netif *netif)
{
 8025afc:	b580      	push	{r7, lr}
 8025afe:	b086      	sub	sp, #24
 8025b00:	af00      	add	r7, sp, #0
 8025b02:	6078      	str	r0, [r7, #4]
 8025b04:	6039      	str	r1, [r7, #0]
  struct eth_hdr *ethhdr;
  u16_t type;
#if LWIP_ARP || ETHARP_SUPPORT_VLAN || LWIP_IPV6
  u16_t next_hdr_offset = SIZEOF_ETH_HDR;
 8025b06:	230e      	movs	r3, #14
 8025b08:	82fb      	strh	r3, [r7, #22]
#endif /* LWIP_ARP || ETHARP_SUPPORT_VLAN */

  LWIP_ASSERT_CORE_LOCKED();
 8025b0a:	f7ea fab1 	bl	8010070 <sys_check_core_locking>

  if (p->len <= SIZEOF_ETH_HDR) {
 8025b0e:	687b      	ldr	r3, [r7, #4]
 8025b10:	895b      	ldrh	r3, [r3, #10]
 8025b12:	2b0e      	cmp	r3, #14
 8025b14:	d96e      	bls.n	8025bf4 <ethernet_input+0xf8>
    ETHARP_STATS_INC(etharp.drop);
    MIB2_STATS_NETIF_INC(netif, ifinerrors);
    goto free_and_return;
  }

  if (p->if_idx == NETIF_NO_INDEX) {
 8025b16:	687b      	ldr	r3, [r7, #4]
 8025b18:	7bdb      	ldrb	r3, [r3, #15]
 8025b1a:	2b00      	cmp	r3, #0
 8025b1c:	d106      	bne.n	8025b2c <ethernet_input+0x30>
    p->if_idx = netif_get_index(netif);
 8025b1e:	683b      	ldr	r3, [r7, #0]
 8025b20:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 8025b24:	3301      	adds	r3, #1
 8025b26:	b2da      	uxtb	r2, r3
 8025b28:	687b      	ldr	r3, [r7, #4]
 8025b2a:	73da      	strb	r2, [r3, #15]
  }

  /* points to packet payload, which starts with an Ethernet header */
  ethhdr = (struct eth_hdr *)p->payload;
 8025b2c:	687b      	ldr	r3, [r7, #4]
 8025b2e:	685b      	ldr	r3, [r3, #4]
 8025b30:	613b      	str	r3, [r7, #16]
               (unsigned char)ethhdr->dest.addr[3], (unsigned char)ethhdr->dest.addr[4], (unsigned char)ethhdr->dest.addr[5],
               (unsigned char)ethhdr->src.addr[0],  (unsigned char)ethhdr->src.addr[1],  (unsigned char)ethhdr->src.addr[2],
               (unsigned char)ethhdr->src.addr[3],  (unsigned char)ethhdr->src.addr[4],  (unsigned char)ethhdr->src.addr[5],
               lwip_htons(ethhdr->type)));

  type = ethhdr->type;
 8025b32:	693b      	ldr	r3, [r7, #16]
 8025b34:	7b1a      	ldrb	r2, [r3, #12]
 8025b36:	7b5b      	ldrb	r3, [r3, #13]
 8025b38:	021b      	lsls	r3, r3, #8
 8025b3a:	4313      	orrs	r3, r2
 8025b3c:	81fb      	strh	r3, [r7, #14]

#if LWIP_ARP_FILTER_NETIF
  netif = LWIP_ARP_FILTER_NETIF_FN(p, netif, lwip_htons(type));
#endif /* LWIP_ARP_FILTER_NETIF*/

  if (ethhdr->dest.addr[0] & 1) {
 8025b3e:	693b      	ldr	r3, [r7, #16]
 8025b40:	781b      	ldrb	r3, [r3, #0]
 8025b42:	f003 0301 	and.w	r3, r3, #1
 8025b46:	2b00      	cmp	r3, #0
 8025b48:	d023      	beq.n	8025b92 <ethernet_input+0x96>
    /* this might be a multicast or broadcast packet */
    if (ethhdr->dest.addr[0] == LL_IP4_MULTICAST_ADDR_0) {
 8025b4a:	693b      	ldr	r3, [r7, #16]
 8025b4c:	781b      	ldrb	r3, [r3, #0]
 8025b4e:	2b01      	cmp	r3, #1
 8025b50:	d10f      	bne.n	8025b72 <ethernet_input+0x76>
#if LWIP_IPV4
      if ((ethhdr->dest.addr[1] == LL_IP4_MULTICAST_ADDR_1) &&
 8025b52:	693b      	ldr	r3, [r7, #16]
 8025b54:	785b      	ldrb	r3, [r3, #1]
 8025b56:	2b00      	cmp	r3, #0
 8025b58:	d11b      	bne.n	8025b92 <ethernet_input+0x96>
          (ethhdr->dest.addr[2] == LL_IP4_MULTICAST_ADDR_2)) {
 8025b5a:	693b      	ldr	r3, [r7, #16]
 8025b5c:	789b      	ldrb	r3, [r3, #2]
      if ((ethhdr->dest.addr[1] == LL_IP4_MULTICAST_ADDR_1) &&
 8025b5e:	2b5e      	cmp	r3, #94	@ 0x5e
 8025b60:	d117      	bne.n	8025b92 <ethernet_input+0x96>
        /* mark the pbuf as link-layer multicast */
        p->flags |= PBUF_FLAG_LLMCAST;
 8025b62:	687b      	ldr	r3, [r7, #4]
 8025b64:	7b5b      	ldrb	r3, [r3, #13]
 8025b66:	f043 0310 	orr.w	r3, r3, #16
 8025b6a:	b2da      	uxtb	r2, r3
 8025b6c:	687b      	ldr	r3, [r7, #4]
 8025b6e:	735a      	strb	r2, [r3, #13]
 8025b70:	e00f      	b.n	8025b92 <ethernet_input+0x96>
             (ethhdr->dest.addr[1] == LL_IP6_MULTICAST_ADDR_1)) {
      /* mark the pbuf as link-layer multicast */
      p->flags |= PBUF_FLAG_LLMCAST;
    }
#endif /* LWIP_IPV6 */
    else if (eth_addr_cmp(&ethhdr->dest, &ethbroadcast)) {
 8025b72:	693b      	ldr	r3, [r7, #16]
 8025b74:	2206      	movs	r2, #6
 8025b76:	4928      	ldr	r1, [pc, #160]	@ (8025c18 <ethernet_input+0x11c>)
 8025b78:	4618      	mov	r0, r3
 8025b7a:	f003 fe2f 	bl	80297dc <memcmp>
 8025b7e:	4603      	mov	r3, r0
 8025b80:	2b00      	cmp	r3, #0
 8025b82:	d106      	bne.n	8025b92 <ethernet_input+0x96>
      /* mark the pbuf as link-layer broadcast */
      p->flags |= PBUF_FLAG_LLBCAST;
 8025b84:	687b      	ldr	r3, [r7, #4]
 8025b86:	7b5b      	ldrb	r3, [r3, #13]
 8025b88:	f043 0308 	orr.w	r3, r3, #8
 8025b8c:	b2da      	uxtb	r2, r3
 8025b8e:	687b      	ldr	r3, [r7, #4]
 8025b90:	735a      	strb	r2, [r3, #13]
    }
  }

  switch (type) {
 8025b92:	89fb      	ldrh	r3, [r7, #14]
 8025b94:	2b08      	cmp	r3, #8
 8025b96:	d003      	beq.n	8025ba0 <ethernet_input+0xa4>
 8025b98:	f5b3 6fc1 	cmp.w	r3, #1544	@ 0x608
 8025b9c:	d014      	beq.n	8025bc8 <ethernet_input+0xcc>
      }
#endif
      ETHARP_STATS_INC(etharp.proterr);
      ETHARP_STATS_INC(etharp.drop);
      MIB2_STATS_NETIF_INC(netif, ifinunknownprotos);
      goto free_and_return;
 8025b9e:	e032      	b.n	8025c06 <ethernet_input+0x10a>
      if (!(netif->flags & NETIF_FLAG_ETHARP)) {
 8025ba0:	683b      	ldr	r3, [r7, #0]
 8025ba2:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 8025ba6:	f003 0308 	and.w	r3, r3, #8
 8025baa:	2b00      	cmp	r3, #0
 8025bac:	d024      	beq.n	8025bf8 <ethernet_input+0xfc>
      if (pbuf_remove_header(p, next_hdr_offset)) {
 8025bae:	8afb      	ldrh	r3, [r7, #22]
 8025bb0:	4619      	mov	r1, r3
 8025bb2:	6878      	ldr	r0, [r7, #4]
 8025bb4:	f7f4 f97a 	bl	8019eac <pbuf_remove_header>
 8025bb8:	4603      	mov	r3, r0
 8025bba:	2b00      	cmp	r3, #0
 8025bbc:	d11e      	bne.n	8025bfc <ethernet_input+0x100>
        ip4_input(p, netif);
 8025bbe:	6839      	ldr	r1, [r7, #0]
 8025bc0:	6878      	ldr	r0, [r7, #4]
 8025bc2:	f7fe fd2f 	bl	8024624 <ip4_input>
      break;
 8025bc6:	e013      	b.n	8025bf0 <ethernet_input+0xf4>
      if (!(netif->flags & NETIF_FLAG_ETHARP)) {
 8025bc8:	683b      	ldr	r3, [r7, #0]
 8025bca:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 8025bce:	f003 0308 	and.w	r3, r3, #8
 8025bd2:	2b00      	cmp	r3, #0
 8025bd4:	d014      	beq.n	8025c00 <ethernet_input+0x104>
      if (pbuf_remove_header(p, next_hdr_offset)) {
 8025bd6:	8afb      	ldrh	r3, [r7, #22]
 8025bd8:	4619      	mov	r1, r3
 8025bda:	6878      	ldr	r0, [r7, #4]
 8025bdc:	f7f4 f966 	bl	8019eac <pbuf_remove_header>
 8025be0:	4603      	mov	r3, r0
 8025be2:	2b00      	cmp	r3, #0
 8025be4:	d10e      	bne.n	8025c04 <ethernet_input+0x108>
        etharp_input(p, netif);
 8025be6:	6839      	ldr	r1, [r7, #0]
 8025be8:	6878      	ldr	r0, [r7, #4]
 8025bea:	f7fd fe9d 	bl	8023928 <etharp_input>
      break;
 8025bee:	bf00      	nop
  }

  /* This means the pbuf is freed or consumed,
     so the caller doesn't have to free it again */
  return ERR_OK;
 8025bf0:	2300      	movs	r3, #0
 8025bf2:	e00c      	b.n	8025c0e <ethernet_input+0x112>
    goto free_and_return;
 8025bf4:	bf00      	nop
 8025bf6:	e006      	b.n	8025c06 <ethernet_input+0x10a>
        goto free_and_return;
 8025bf8:	bf00      	nop
 8025bfa:	e004      	b.n	8025c06 <ethernet_input+0x10a>
        goto free_and_return;
 8025bfc:	bf00      	nop
 8025bfe:	e002      	b.n	8025c06 <ethernet_input+0x10a>
        goto free_and_return;
 8025c00:	bf00      	nop
 8025c02:	e000      	b.n	8025c06 <ethernet_input+0x10a>
        goto free_and_return;
 8025c04:	bf00      	nop

free_and_return:
  pbuf_free(p);
 8025c06:	6878      	ldr	r0, [r7, #4]
 8025c08:	f7f4 fa08 	bl	801a01c <pbuf_free>
  return ERR_OK;
 8025c0c:	2300      	movs	r3, #0
}
 8025c0e:	4618      	mov	r0, r3
 8025c10:	3718      	adds	r7, #24
 8025c12:	46bd      	mov	sp, r7
 8025c14:	bd80      	pop	{r7, pc}
 8025c16:	bf00      	nop
 8025c18:	080307ac 	.word	0x080307ac

08025c1c <ethernet_output>:
 * @return ERR_OK if the packet was sent, any other err_t on failure
 */
err_t
ethernet_output(struct netif * netif, struct pbuf * p,
                const struct eth_addr * src, const struct eth_addr * dst,
                u16_t eth_type) {
 8025c1c:	b580      	push	{r7, lr}
 8025c1e:	b086      	sub	sp, #24
 8025c20:	af00      	add	r7, sp, #0
 8025c22:	60f8      	str	r0, [r7, #12]
 8025c24:	60b9      	str	r1, [r7, #8]
 8025c26:	607a      	str	r2, [r7, #4]
 8025c28:	603b      	str	r3, [r7, #0]
  struct eth_hdr *ethhdr;
  u16_t eth_type_be = lwip_htons(eth_type);
 8025c2a:	8c3b      	ldrh	r3, [r7, #32]
 8025c2c:	4618      	mov	r0, r3
 8025c2e:	f7f2 fd13 	bl	8018658 <lwip_htons>
 8025c32:	4603      	mov	r3, r0
 8025c34:	82fb      	strh	r3, [r7, #22]

    eth_type_be = PP_HTONS(ETHTYPE_VLAN);
  } else
#endif /* ETHARP_SUPPORT_VLAN && defined(LWIP_HOOK_VLAN_SET) */
  {
    if (pbuf_add_header(p, SIZEOF_ETH_HDR) != 0) {
 8025c36:	210e      	movs	r1, #14
 8025c38:	68b8      	ldr	r0, [r7, #8]
 8025c3a:	f7f4 f927 	bl	8019e8c <pbuf_add_header>
 8025c3e:	4603      	mov	r3, r0
 8025c40:	2b00      	cmp	r3, #0
 8025c42:	d127      	bne.n	8025c94 <ethernet_output+0x78>
      goto pbuf_header_failed;
    }
  }

  LWIP_ASSERT_CORE_LOCKED();
 8025c44:	f7ea fa14 	bl	8010070 <sys_check_core_locking>

  ethhdr = (struct eth_hdr *)p->payload;
 8025c48:	68bb      	ldr	r3, [r7, #8]
 8025c4a:	685b      	ldr	r3, [r3, #4]
 8025c4c:	613b      	str	r3, [r7, #16]
  ethhdr->type = eth_type_be;
 8025c4e:	693b      	ldr	r3, [r7, #16]
 8025c50:	8afa      	ldrh	r2, [r7, #22]
 8025c52:	819a      	strh	r2, [r3, #12]
  SMEMCPY(&ethhdr->dest, dst, ETH_HWADDR_LEN);
 8025c54:	693b      	ldr	r3, [r7, #16]
 8025c56:	2206      	movs	r2, #6
 8025c58:	6839      	ldr	r1, [r7, #0]
 8025c5a:	4618      	mov	r0, r3
 8025c5c:	f003 fedf 	bl	8029a1e <memcpy>
  SMEMCPY(&ethhdr->src,  src, ETH_HWADDR_LEN);
 8025c60:	693b      	ldr	r3, [r7, #16]
 8025c62:	3306      	adds	r3, #6
 8025c64:	2206      	movs	r2, #6
 8025c66:	6879      	ldr	r1, [r7, #4]
 8025c68:	4618      	mov	r0, r3
 8025c6a:	f003 fed8 	bl	8029a1e <memcpy>

  LWIP_ASSERT("netif->hwaddr_len must be 6 for ethernet_output!",
 8025c6e:	68fb      	ldr	r3, [r7, #12]
 8025c70:	f893 3030 	ldrb.w	r3, [r3, #48]	@ 0x30
 8025c74:	2b06      	cmp	r3, #6
 8025c76:	d006      	beq.n	8025c86 <ethernet_output+0x6a>
 8025c78:	4b0a      	ldr	r3, [pc, #40]	@ (8025ca4 <ethernet_output+0x88>)
 8025c7a:	f44f 7299 	mov.w	r2, #306	@ 0x132
 8025c7e:	490a      	ldr	r1, [pc, #40]	@ (8025ca8 <ethernet_output+0x8c>)
 8025c80:	480a      	ldr	r0, [pc, #40]	@ (8025cac <ethernet_output+0x90>)
 8025c82:	f003 fc43 	bl	802950c <iprintf>
              (netif->hwaddr_len == ETH_HWADDR_LEN));
  LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE,
              ("ethernet_output: sending packet %p\n", (void *)p));

  /* send the packet */
  return netif->linkoutput(netif, p);
 8025c86:	68fb      	ldr	r3, [r7, #12]
 8025c88:	699b      	ldr	r3, [r3, #24]
 8025c8a:	68b9      	ldr	r1, [r7, #8]
 8025c8c:	68f8      	ldr	r0, [r7, #12]
 8025c8e:	4798      	blx	r3
 8025c90:	4603      	mov	r3, r0
 8025c92:	e002      	b.n	8025c9a <ethernet_output+0x7e>
      goto pbuf_header_failed;
 8025c94:	bf00      	nop

pbuf_header_failed:
  LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS,
              ("ethernet_output: could not allocate room for header.\n"));
  LINK_STATS_INC(link.lenerr);
  return ERR_BUF;
 8025c96:	f06f 0301 	mvn.w	r3, #1
}
 8025c9a:	4618      	mov	r0, r3
 8025c9c:	3718      	adds	r7, #24
 8025c9e:	46bd      	mov	sp, r7
 8025ca0:	bd80      	pop	{r7, pc}
 8025ca2:	bf00      	nop
 8025ca4:	08030428 	.word	0x08030428
 8025ca8:	08030460 	.word	0x08030460
 8025cac:	08030494 	.word	0x08030494

08025cb0 <sys_mbox_new>:
#endif

/*-----------------------------------------------------------------------------------*/
//  Creates an empty mailbox.
err_t sys_mbox_new(sys_mbox_t *mbox, int size)
{
 8025cb0:	b580      	push	{r7, lr}
 8025cb2:	b082      	sub	sp, #8
 8025cb4:	af00      	add	r7, sp, #0
 8025cb6:	6078      	str	r0, [r7, #4]
 8025cb8:	6039      	str	r1, [r7, #0]
#if (osCMSIS < 0x20000U)
  osMessageQDef(QUEUE, size, void *);
  *mbox = osMessageCreate(osMessageQ(QUEUE), NULL);
#else
  *mbox = osMessageQueueNew(size, sizeof(void *), NULL);
 8025cba:	683b      	ldr	r3, [r7, #0]
 8025cbc:	2200      	movs	r2, #0
 8025cbe:	2104      	movs	r1, #4
 8025cc0:	4618      	mov	r0, r3
 8025cc2:	f7ea fe6b 	bl	801099c <osMessageQueueNew>
 8025cc6:	4602      	mov	r2, r0
 8025cc8:	687b      	ldr	r3, [r7, #4]
 8025cca:	601a      	str	r2, [r3, #0]
  if(lwip_stats.sys.mbox.max < lwip_stats.sys.mbox.used)
  {
    lwip_stats.sys.mbox.max = lwip_stats.sys.mbox.used;
  }
#endif /* SYS_STATS */
  if(*mbox == NULL)
 8025ccc:	687b      	ldr	r3, [r7, #4]
 8025cce:	681b      	ldr	r3, [r3, #0]
 8025cd0:	2b00      	cmp	r3, #0
 8025cd2:	d102      	bne.n	8025cda <sys_mbox_new+0x2a>
    return ERR_MEM;
 8025cd4:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8025cd8:	e000      	b.n	8025cdc <sys_mbox_new+0x2c>

  return ERR_OK;
 8025cda:	2300      	movs	r3, #0
}
 8025cdc:	4618      	mov	r0, r3
 8025cde:	3708      	adds	r7, #8
 8025ce0:	46bd      	mov	sp, r7
 8025ce2:	bd80      	pop	{r7, pc}

08025ce4 <sys_mbox_free>:
  Deallocates a mailbox. If there are messages still present in the
  mailbox when the mailbox is deallocated, it is an indication of a
  programming error in lwIP and the developer should be notified.
*/
void sys_mbox_free(sys_mbox_t *mbox)
{
 8025ce4:	b580      	push	{r7, lr}
 8025ce6:	b082      	sub	sp, #8
 8025ce8:	af00      	add	r7, sp, #0
 8025cea:	6078      	str	r0, [r7, #4]
#if (osCMSIS < 0x20000U)
  if(osMessageWaiting(*mbox))
#else
  if(osMessageQueueGetCount(*mbox))
 8025cec:	687b      	ldr	r3, [r7, #4]
 8025cee:	681b      	ldr	r3, [r3, #0]
 8025cf0:	4618      	mov	r0, r3
 8025cf2:	f7ea ff85 	bl	8010c00 <osMessageQueueGetCount>

  }
#if (osCMSIS < 0x20000U)
  osMessageDelete(*mbox);
#else
  osMessageQueueDelete(*mbox);
 8025cf6:	687b      	ldr	r3, [r7, #4]
 8025cf8:	681b      	ldr	r3, [r3, #0]
 8025cfa:	4618      	mov	r0, r3
 8025cfc:	f7ea ffa0 	bl	8010c40 <osMessageQueueDelete>
#endif
#if SYS_STATS
  --lwip_stats.sys.mbox.used;
#endif /* SYS_STATS */
}
 8025d00:	bf00      	nop
 8025d02:	3708      	adds	r7, #8
 8025d04:	46bd      	mov	sp, r7
 8025d06:	bd80      	pop	{r7, pc}

08025d08 <sys_mbox_trypost>:


/*-----------------------------------------------------------------------------------*/
//   Try to post the "msg" to the mailbox.
err_t sys_mbox_trypost(sys_mbox_t *mbox, void *msg)
{
 8025d08:	b580      	push	{r7, lr}
 8025d0a:	b084      	sub	sp, #16
 8025d0c:	af00      	add	r7, sp, #0
 8025d0e:	6078      	str	r0, [r7, #4]
 8025d10:	6039      	str	r1, [r7, #0]
  err_t result;
#if (osCMSIS < 0x20000U)
  if(osMessagePut(*mbox, (uint32_t)msg, 0) == osOK)
#else
  if(osMessageQueuePut(*mbox, &msg, 0, 0) == osOK)
 8025d12:	687b      	ldr	r3, [r7, #4]
 8025d14:	6818      	ldr	r0, [r3, #0]
 8025d16:	4639      	mov	r1, r7
 8025d18:	2300      	movs	r3, #0
 8025d1a:	2200      	movs	r2, #0
 8025d1c:	f7ea feb2 	bl	8010a84 <osMessageQueuePut>
 8025d20:	4603      	mov	r3, r0
 8025d22:	2b00      	cmp	r3, #0
 8025d24:	d102      	bne.n	8025d2c <sys_mbox_trypost+0x24>
#endif
  {
    result = ERR_OK;
 8025d26:	2300      	movs	r3, #0
 8025d28:	73fb      	strb	r3, [r7, #15]
 8025d2a:	e001      	b.n	8025d30 <sys_mbox_trypost+0x28>
  }
  else
  {
    // could not post, queue must be full
    result = ERR_MEM;
 8025d2c:	23ff      	movs	r3, #255	@ 0xff
 8025d2e:	73fb      	strb	r3, [r7, #15]
#if SYS_STATS
    lwip_stats.sys.mbox.err++;
#endif /* SYS_STATS */
  }

  return result;
 8025d30:	f997 300f 	ldrsb.w	r3, [r7, #15]
}
 8025d34:	4618      	mov	r0, r3
 8025d36:	3710      	adds	r7, #16
 8025d38:	46bd      	mov	sp, r7
 8025d3a:	bd80      	pop	{r7, pc}

08025d3c <sys_arch_mbox_fetch>:

  Note that a function with a similar name, sys_mbox_fetch(), is
  implemented by lwIP.
*/
u32_t sys_arch_mbox_fetch(sys_mbox_t *mbox, void **msg, u32_t timeout)
{
 8025d3c:	b580      	push	{r7, lr}
 8025d3e:	b086      	sub	sp, #24
 8025d40:	af00      	add	r7, sp, #0
 8025d42:	60f8      	str	r0, [r7, #12]
 8025d44:	60b9      	str	r1, [r7, #8]
 8025d46:	607a      	str	r2, [r7, #4]
#if (osCMSIS < 0x20000U)
  osEvent event;
  uint32_t starttime = osKernelSysTick();
#else
  osStatus_t status;
  uint32_t starttime = osKernelGetTickCount();
 8025d48:	f7ea fb08 	bl	801035c <osKernelGetTickCount>
 8025d4c:	6178      	str	r0, [r7, #20]
#endif
  if(timeout != 0)
 8025d4e:	687b      	ldr	r3, [r7, #4]
 8025d50:	2b00      	cmp	r3, #0
 8025d52:	d013      	beq.n	8025d7c <sys_arch_mbox_fetch+0x40>
    {
      *msg = (void *)event.value.v;
      return (osKernelSysTick() - starttime);
    }
#else
    status = osMessageQueueGet(*mbox, msg, 0, timeout);
 8025d54:	68fb      	ldr	r3, [r7, #12]
 8025d56:	6818      	ldr	r0, [r3, #0]
 8025d58:	687b      	ldr	r3, [r7, #4]
 8025d5a:	2200      	movs	r2, #0
 8025d5c:	68b9      	ldr	r1, [r7, #8]
 8025d5e:	f7ea fef1 	bl	8010b44 <osMessageQueueGet>
 8025d62:	6138      	str	r0, [r7, #16]
    if (status == osOK)
 8025d64:	693b      	ldr	r3, [r7, #16]
 8025d66:	2b00      	cmp	r3, #0
 8025d68:	d105      	bne.n	8025d76 <sys_arch_mbox_fetch+0x3a>
    {
      return (osKernelGetTickCount() - starttime);
 8025d6a:	f7ea faf7 	bl	801035c <osKernelGetTickCount>
 8025d6e:	4602      	mov	r2, r0
 8025d70:	697b      	ldr	r3, [r7, #20]
 8025d72:	1ad3      	subs	r3, r2, r3
 8025d74:	e00f      	b.n	8025d96 <sys_arch_mbox_fetch+0x5a>
    }
#endif
    else
    {
      return SYS_ARCH_TIMEOUT;
 8025d76:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8025d7a:	e00c      	b.n	8025d96 <sys_arch_mbox_fetch+0x5a>
#if (osCMSIS < 0x20000U)
    event = osMessageGet (*mbox, osWaitForever);
    *msg = (void *)event.value.v;
    return (osKernelSysTick() - starttime);
#else
    osMessageQueueGet(*mbox, msg, 0, osWaitForever );
 8025d7c:	68fb      	ldr	r3, [r7, #12]
 8025d7e:	6818      	ldr	r0, [r3, #0]
 8025d80:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8025d84:	2200      	movs	r2, #0
 8025d86:	68b9      	ldr	r1, [r7, #8]
 8025d88:	f7ea fedc 	bl	8010b44 <osMessageQueueGet>
    return (osKernelGetTickCount() - starttime);
 8025d8c:	f7ea fae6 	bl	801035c <osKernelGetTickCount>
 8025d90:	4602      	mov	r2, r0
 8025d92:	697b      	ldr	r3, [r7, #20]
 8025d94:	1ad3      	subs	r3, r2, r3
#endif
  }
}
 8025d96:	4618      	mov	r0, r3
 8025d98:	3718      	adds	r7, #24
 8025d9a:	46bd      	mov	sp, r7
 8025d9c:	bd80      	pop	{r7, pc}

08025d9e <sys_arch_mbox_tryfetch>:
/*
  Similar to sys_arch_mbox_fetch, but if message is not ready immediately, we'll
  return with SYS_MBOX_EMPTY.  On success, 0 is returned.
*/
u32_t sys_arch_mbox_tryfetch(sys_mbox_t *mbox, void **msg)
{
 8025d9e:	b580      	push	{r7, lr}
 8025da0:	b082      	sub	sp, #8
 8025da2:	af00      	add	r7, sp, #0
 8025da4:	6078      	str	r0, [r7, #4]
 8025da6:	6039      	str	r1, [r7, #0]

  if(event.status == osEventMessage)
  {
    *msg = (void *)event.value.v;
#else
  if (osMessageQueueGet(*mbox, msg, 0, 0) == osOK)
 8025da8:	687b      	ldr	r3, [r7, #4]
 8025daa:	6818      	ldr	r0, [r3, #0]
 8025dac:	2300      	movs	r3, #0
 8025dae:	2200      	movs	r2, #0
 8025db0:	6839      	ldr	r1, [r7, #0]
 8025db2:	f7ea fec7 	bl	8010b44 <osMessageQueueGet>
 8025db6:	4603      	mov	r3, r0
 8025db8:	2b00      	cmp	r3, #0
 8025dba:	d101      	bne.n	8025dc0 <sys_arch_mbox_tryfetch+0x22>
  {
#endif
    return ERR_OK;
 8025dbc:	2300      	movs	r3, #0
 8025dbe:	e001      	b.n	8025dc4 <sys_arch_mbox_tryfetch+0x26>
  }
  else
  {
    return SYS_MBOX_EMPTY;
 8025dc0:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
  }
}
 8025dc4:	4618      	mov	r0, r3
 8025dc6:	3708      	adds	r7, #8
 8025dc8:	46bd      	mov	sp, r7
 8025dca:	bd80      	pop	{r7, pc}

08025dcc <sys_mbox_valid>:
/*----------------------------------------------------------------------------------*/
int sys_mbox_valid(sys_mbox_t *mbox)
{
 8025dcc:	b480      	push	{r7}
 8025dce:	b083      	sub	sp, #12
 8025dd0:	af00      	add	r7, sp, #0
 8025dd2:	6078      	str	r0, [r7, #4]
  if (*mbox == SYS_MBOX_NULL)
 8025dd4:	687b      	ldr	r3, [r7, #4]
 8025dd6:	681b      	ldr	r3, [r3, #0]
 8025dd8:	2b00      	cmp	r3, #0
 8025dda:	d101      	bne.n	8025de0 <sys_mbox_valid+0x14>
    return 0;
 8025ddc:	2300      	movs	r3, #0
 8025dde:	e000      	b.n	8025de2 <sys_mbox_valid+0x16>
  else
    return 1;
 8025de0:	2301      	movs	r3, #1
}
 8025de2:	4618      	mov	r0, r3
 8025de4:	370c      	adds	r7, #12
 8025de6:	46bd      	mov	sp, r7
 8025de8:	f85d 7b04 	ldr.w	r7, [sp], #4
 8025dec:	4770      	bx	lr

08025dee <sys_mbox_set_invalid>:
/*-----------------------------------------------------------------------------------*/
void sys_mbox_set_invalid(sys_mbox_t *mbox)
{
 8025dee:	b480      	push	{r7}
 8025df0:	b083      	sub	sp, #12
 8025df2:	af00      	add	r7, sp, #0
 8025df4:	6078      	str	r0, [r7, #4]
  *mbox = SYS_MBOX_NULL;
 8025df6:	687b      	ldr	r3, [r7, #4]
 8025df8:	2200      	movs	r2, #0
 8025dfa:	601a      	str	r2, [r3, #0]
}
 8025dfc:	bf00      	nop
 8025dfe:	370c      	adds	r7, #12
 8025e00:	46bd      	mov	sp, r7
 8025e02:	f85d 7b04 	ldr.w	r7, [sp], #4
 8025e06:	4770      	bx	lr

08025e08 <sys_sem_new>:

/*-----------------------------------------------------------------------------------*/
//  Creates a new semaphore. The "count" argument specifies
//  the initial state of the semaphore.
err_t sys_sem_new(sys_sem_t *sem, u8_t count)
{
 8025e08:	b580      	push	{r7, lr}
 8025e0a:	b082      	sub	sp, #8
 8025e0c:	af00      	add	r7, sp, #0
 8025e0e:	6078      	str	r0, [r7, #4]
 8025e10:	460b      	mov	r3, r1
 8025e12:	70fb      	strb	r3, [r7, #3]
#if (osCMSIS < 0x20000U)
  osSemaphoreDef(SEM);
  *sem = osSemaphoreCreate (osSemaphore(SEM), 1);
#else
  *sem = osSemaphoreNew(UINT16_MAX, count, NULL);
 8025e14:	78fb      	ldrb	r3, [r7, #3]
 8025e16:	2200      	movs	r2, #0
 8025e18:	4619      	mov	r1, r3
 8025e1a:	f64f 70ff 	movw	r0, #65535	@ 0xffff
 8025e1e:	f7ea fc79 	bl	8010714 <osSemaphoreNew>
 8025e22:	4602      	mov	r2, r0
 8025e24:	687b      	ldr	r3, [r7, #4]
 8025e26:	601a      	str	r2, [r3, #0]
#endif

  if(*sem == NULL)
 8025e28:	687b      	ldr	r3, [r7, #4]
 8025e2a:	681b      	ldr	r3, [r3, #0]
 8025e2c:	2b00      	cmp	r3, #0
 8025e2e:	d102      	bne.n	8025e36 <sys_sem_new+0x2e>
  {
#if SYS_STATS
    ++lwip_stats.sys.sem.err;
#endif /* SYS_STATS */
    return ERR_MEM;
 8025e30:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8025e34:	e009      	b.n	8025e4a <sys_sem_new+0x42>
  }

  if(count == 0)	// Means it can't be taken
 8025e36:	78fb      	ldrb	r3, [r7, #3]
 8025e38:	2b00      	cmp	r3, #0
 8025e3a:	d105      	bne.n	8025e48 <sys_sem_new+0x40>
  {
#if (osCMSIS < 0x20000U)
    osSemaphoreWait(*sem, 0);
#else
    osSemaphoreAcquire(*sem, 0);
 8025e3c:	687b      	ldr	r3, [r7, #4]
 8025e3e:	681b      	ldr	r3, [r3, #0]
 8025e40:	2100      	movs	r1, #0
 8025e42:	4618      	mov	r0, r3
 8025e44:	f7ea fcf0 	bl	8010828 <osSemaphoreAcquire>
  if (lwip_stats.sys.sem.max < lwip_stats.sys.sem.used) {
    lwip_stats.sys.sem.max = lwip_stats.sys.sem.used;
  }
#endif /* SYS_STATS */

  return ERR_OK;
 8025e48:	2300      	movs	r3, #0
}
 8025e4a:	4618      	mov	r0, r3
 8025e4c:	3708      	adds	r7, #8
 8025e4e:	46bd      	mov	sp, r7
 8025e50:	bd80      	pop	{r7, pc}

08025e52 <sys_arch_sem_wait>:

  Notice that lwIP implements a function with a similar name,
  sys_sem_wait(), that uses the sys_arch_sem_wait() function.
*/
u32_t sys_arch_sem_wait(sys_sem_t *sem, u32_t timeout)
{
 8025e52:	b580      	push	{r7, lr}
 8025e54:	b084      	sub	sp, #16
 8025e56:	af00      	add	r7, sp, #0
 8025e58:	6078      	str	r0, [r7, #4]
 8025e5a:	6039      	str	r1, [r7, #0]
#if (osCMSIS < 0x20000U)
  uint32_t starttime = osKernelSysTick();
#else
  uint32_t starttime = osKernelGetTickCount();
 8025e5c:	f7ea fa7e 	bl	801035c <osKernelGetTickCount>
 8025e60:	60f8      	str	r0, [r7, #12]
#endif
  if(timeout != 0)
 8025e62:	683b      	ldr	r3, [r7, #0]
 8025e64:	2b00      	cmp	r3, #0
 8025e66:	d011      	beq.n	8025e8c <sys_arch_sem_wait+0x3a>
#if (osCMSIS < 0x20000U)
    if(osSemaphoreWait (*sem, timeout) == osOK)
    {
      return (osKernelSysTick() - starttime);
#else
    if(osSemaphoreAcquire(*sem, timeout) == osOK)
 8025e68:	687b      	ldr	r3, [r7, #4]
 8025e6a:	681b      	ldr	r3, [r3, #0]
 8025e6c:	6839      	ldr	r1, [r7, #0]
 8025e6e:	4618      	mov	r0, r3
 8025e70:	f7ea fcda 	bl	8010828 <osSemaphoreAcquire>
 8025e74:	4603      	mov	r3, r0
 8025e76:	2b00      	cmp	r3, #0
 8025e78:	d105      	bne.n	8025e86 <sys_arch_sem_wait+0x34>
    {
        return (osKernelGetTickCount() - starttime);
 8025e7a:	f7ea fa6f 	bl	801035c <osKernelGetTickCount>
 8025e7e:	4602      	mov	r2, r0
 8025e80:	68fb      	ldr	r3, [r7, #12]
 8025e82:	1ad3      	subs	r3, r2, r3
 8025e84:	e012      	b.n	8025eac <sys_arch_sem_wait+0x5a>
#endif
    }
    else
    {
      return SYS_ARCH_TIMEOUT;
 8025e86:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8025e8a:	e00f      	b.n	8025eac <sys_arch_sem_wait+0x5a>
  {
#if (osCMSIS < 0x20000U)
    while(osSemaphoreWait (*sem, osWaitForever) != osOK);
    return (osKernelSysTick() - starttime);
#else
    while(osSemaphoreAcquire(*sem, osWaitForever) != osOK);
 8025e8c:	bf00      	nop
 8025e8e:	687b      	ldr	r3, [r7, #4]
 8025e90:	681b      	ldr	r3, [r3, #0]
 8025e92:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 8025e96:	4618      	mov	r0, r3
 8025e98:	f7ea fcc6 	bl	8010828 <osSemaphoreAcquire>
 8025e9c:	4603      	mov	r3, r0
 8025e9e:	2b00      	cmp	r3, #0
 8025ea0:	d1f5      	bne.n	8025e8e <sys_arch_sem_wait+0x3c>
    return (osKernelGetTickCount() - starttime);
 8025ea2:	f7ea fa5b 	bl	801035c <osKernelGetTickCount>
 8025ea6:	4602      	mov	r2, r0
 8025ea8:	68fb      	ldr	r3, [r7, #12]
 8025eaa:	1ad3      	subs	r3, r2, r3
#endif
  }
}
 8025eac:	4618      	mov	r0, r3
 8025eae:	3710      	adds	r7, #16
 8025eb0:	46bd      	mov	sp, r7
 8025eb2:	bd80      	pop	{r7, pc}

08025eb4 <sys_sem_signal>:

/*-----------------------------------------------------------------------------------*/
// Signals a semaphore
void sys_sem_signal(sys_sem_t *sem)
{
 8025eb4:	b580      	push	{r7, lr}
 8025eb6:	b082      	sub	sp, #8
 8025eb8:	af00      	add	r7, sp, #0
 8025eba:	6078      	str	r0, [r7, #4]
  osSemaphoreRelease(*sem);
 8025ebc:	687b      	ldr	r3, [r7, #4]
 8025ebe:	681b      	ldr	r3, [r3, #0]
 8025ec0:	4618      	mov	r0, r3
 8025ec2:	f7ea fd03 	bl	80108cc <osSemaphoreRelease>
}
 8025ec6:	bf00      	nop
 8025ec8:	3708      	adds	r7, #8
 8025eca:	46bd      	mov	sp, r7
 8025ecc:	bd80      	pop	{r7, pc}

08025ece <sys_sem_free>:

/*-----------------------------------------------------------------------------------*/
// Deallocates a semaphore
void sys_sem_free(sys_sem_t *sem)
{
 8025ece:	b580      	push	{r7, lr}
 8025ed0:	b082      	sub	sp, #8
 8025ed2:	af00      	add	r7, sp, #0
 8025ed4:	6078      	str	r0, [r7, #4]
#if SYS_STATS
  --lwip_stats.sys.sem.used;
#endif /* SYS_STATS */

  osSemaphoreDelete(*sem);
 8025ed6:	687b      	ldr	r3, [r7, #4]
 8025ed8:	681b      	ldr	r3, [r3, #0]
 8025eda:	4618      	mov	r0, r3
 8025edc:	f7ea fd3a 	bl	8010954 <osSemaphoreDelete>
}
 8025ee0:	bf00      	nop
 8025ee2:	3708      	adds	r7, #8
 8025ee4:	46bd      	mov	sp, r7
 8025ee6:	bd80      	pop	{r7, pc}

08025ee8 <sys_sem_valid>:
/*-----------------------------------------------------------------------------------*/
int sys_sem_valid(sys_sem_t *sem)
{
 8025ee8:	b480      	push	{r7}
 8025eea:	b083      	sub	sp, #12
 8025eec:	af00      	add	r7, sp, #0
 8025eee:	6078      	str	r0, [r7, #4]
  if (*sem == SYS_SEM_NULL)
 8025ef0:	687b      	ldr	r3, [r7, #4]
 8025ef2:	681b      	ldr	r3, [r3, #0]
 8025ef4:	2b00      	cmp	r3, #0
 8025ef6:	d101      	bne.n	8025efc <sys_sem_valid+0x14>
    return 0;
 8025ef8:	2300      	movs	r3, #0
 8025efa:	e000      	b.n	8025efe <sys_sem_valid+0x16>
  else
    return 1;
 8025efc:	2301      	movs	r3, #1
}
 8025efe:	4618      	mov	r0, r3
 8025f00:	370c      	adds	r7, #12
 8025f02:	46bd      	mov	sp, r7
 8025f04:	f85d 7b04 	ldr.w	r7, [sp], #4
 8025f08:	4770      	bx	lr

08025f0a <sys_sem_set_invalid>:

/*-----------------------------------------------------------------------------------*/
void sys_sem_set_invalid(sys_sem_t *sem)
{
 8025f0a:	b480      	push	{r7}
 8025f0c:	b083      	sub	sp, #12
 8025f0e:	af00      	add	r7, sp, #0
 8025f10:	6078      	str	r0, [r7, #4]
  *sem = SYS_SEM_NULL;
 8025f12:	687b      	ldr	r3, [r7, #4]
 8025f14:	2200      	movs	r2, #0
 8025f16:	601a      	str	r2, [r3, #0]
}
 8025f18:	bf00      	nop
 8025f1a:	370c      	adds	r7, #12
 8025f1c:	46bd      	mov	sp, r7
 8025f1e:	f85d 7b04 	ldr.w	r7, [sp], #4
 8025f22:	4770      	bx	lr

08025f24 <sys_init>:
#else
osMutexId_t lwip_sys_mutex;
#endif
// Initialize sys arch
void sys_init(void)
{
 8025f24:	b580      	push	{r7, lr}
 8025f26:	af00      	add	r7, sp, #0
#if (osCMSIS < 0x20000U)
  lwip_sys_mutex = osMutexCreate(osMutex(lwip_sys_mutex));
#else
  lwip_sys_mutex = osMutexNew(NULL);
 8025f28:	2000      	movs	r0, #0
 8025f2a:	f7ea fae5 	bl	80104f8 <osMutexNew>
 8025f2e:	4603      	mov	r3, r0
 8025f30:	4a01      	ldr	r2, [pc, #4]	@ (8025f38 <sys_init+0x14>)
 8025f32:	6013      	str	r3, [r2, #0]
#endif
}
 8025f34:	bf00      	nop
 8025f36:	bd80      	pop	{r7, pc}
 8025f38:	2402a190 	.word	0x2402a190

08025f3c <sys_mutex_new>:
                                      /* Mutexes*/
/*-----------------------------------------------------------------------------------*/
/*-----------------------------------------------------------------------------------*/
#if LWIP_COMPAT_MUTEX == 0
/* Create a new mutex*/
err_t sys_mutex_new(sys_mutex_t *mutex) {
 8025f3c:	b580      	push	{r7, lr}
 8025f3e:	b082      	sub	sp, #8
 8025f40:	af00      	add	r7, sp, #0
 8025f42:	6078      	str	r0, [r7, #4]

#if (osCMSIS < 0x20000U)
  osMutexDef(MUTEX);
  *mutex = osMutexCreate(osMutex(MUTEX));
#else
  *mutex = osMutexNew(NULL);
 8025f44:	2000      	movs	r0, #0
 8025f46:	f7ea fad7 	bl	80104f8 <osMutexNew>
 8025f4a:	4602      	mov	r2, r0
 8025f4c:	687b      	ldr	r3, [r7, #4]
 8025f4e:	601a      	str	r2, [r3, #0]
#endif

  if(*mutex == NULL)
 8025f50:	687b      	ldr	r3, [r7, #4]
 8025f52:	681b      	ldr	r3, [r3, #0]
 8025f54:	2b00      	cmp	r3, #0
 8025f56:	d102      	bne.n	8025f5e <sys_mutex_new+0x22>
  {
#if SYS_STATS
    ++lwip_stats.sys.mutex.err;
#endif /* SYS_STATS */
    return ERR_MEM;
 8025f58:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8025f5c:	e000      	b.n	8025f60 <sys_mutex_new+0x24>
  ++lwip_stats.sys.mutex.used;
  if (lwip_stats.sys.mutex.max < lwip_stats.sys.mutex.used) {
    lwip_stats.sys.mutex.max = lwip_stats.sys.mutex.used;
  }
#endif /* SYS_STATS */
  return ERR_OK;
 8025f5e:	2300      	movs	r3, #0
}
 8025f60:	4618      	mov	r0, r3
 8025f62:	3708      	adds	r7, #8
 8025f64:	46bd      	mov	sp, r7
 8025f66:	bd80      	pop	{r7, pc}

08025f68 <sys_mutex_lock>:
  osMutexDelete(*mutex);
}
/*-----------------------------------------------------------------------------------*/
/* Lock a mutex*/
void sys_mutex_lock(sys_mutex_t *mutex)
{
 8025f68:	b580      	push	{r7, lr}
 8025f6a:	b082      	sub	sp, #8
 8025f6c:	af00      	add	r7, sp, #0
 8025f6e:	6078      	str	r0, [r7, #4]
#if (osCMSIS < 0x20000U)
  osMutexWait(*mutex, osWaitForever);
#else
  osMutexAcquire(*mutex, osWaitForever);
 8025f70:	687b      	ldr	r3, [r7, #4]
 8025f72:	681b      	ldr	r3, [r3, #0]
 8025f74:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 8025f78:	4618      	mov	r0, r3
 8025f7a:	f7ea fb43 	bl	8010604 <osMutexAcquire>
#endif
}
 8025f7e:	bf00      	nop
 8025f80:	3708      	adds	r7, #8
 8025f82:	46bd      	mov	sp, r7
 8025f84:	bd80      	pop	{r7, pc}

08025f86 <sys_mutex_unlock>:

/*-----------------------------------------------------------------------------------*/
/* Unlock a mutex*/
void sys_mutex_unlock(sys_mutex_t *mutex)
{
 8025f86:	b580      	push	{r7, lr}
 8025f88:	b082      	sub	sp, #8
 8025f8a:	af00      	add	r7, sp, #0
 8025f8c:	6078      	str	r0, [r7, #4]
  osMutexRelease(*mutex);
 8025f8e:	687b      	ldr	r3, [r7, #4]
 8025f90:	681b      	ldr	r3, [r3, #0]
 8025f92:	4618      	mov	r0, r3
 8025f94:	f7ea fb81 	bl	801069a <osMutexRelease>
}
 8025f98:	bf00      	nop
 8025f9a:	3708      	adds	r7, #8
 8025f9c:	46bd      	mov	sp, r7
 8025f9e:	bd80      	pop	{r7, pc}

08025fa0 <sys_thread_new>:
  function "thread()". The "arg" argument will be passed as an argument to the
  thread() function. The id of the new thread is returned. Both the id and
  the priority are system dependent.
*/
sys_thread_t sys_thread_new(const char *name, lwip_thread_fn thread , void *arg, int stacksize, int prio)
{
 8025fa0:	b580      	push	{r7, lr}
 8025fa2:	b08e      	sub	sp, #56	@ 0x38
 8025fa4:	af00      	add	r7, sp, #0
 8025fa6:	60f8      	str	r0, [r7, #12]
 8025fa8:	60b9      	str	r1, [r7, #8]
 8025faa:	607a      	str	r2, [r7, #4]
 8025fac:	603b      	str	r3, [r7, #0]
#if (osCMSIS < 0x20000U)
  const osThreadDef_t os_thread_def = { (char *)name, (os_pthread)thread, (osPriority)prio, 0, stacksize};
  return osThreadCreate(&os_thread_def, arg);
#else
  const osThreadAttr_t attributes = {
 8025fae:	f107 0314 	add.w	r3, r7, #20
 8025fb2:	2224      	movs	r2, #36	@ 0x24
 8025fb4:	2100      	movs	r1, #0
 8025fb6:	4618      	mov	r0, r3
 8025fb8:	f003 fc3a 	bl	8029830 <memset>
 8025fbc:	68fb      	ldr	r3, [r7, #12]
 8025fbe:	617b      	str	r3, [r7, #20]
 8025fc0:	683b      	ldr	r3, [r7, #0]
 8025fc2:	62bb      	str	r3, [r7, #40]	@ 0x28
 8025fc4:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8025fc6:	62fb      	str	r3, [r7, #44]	@ 0x2c
                        .name = name,
                        .stack_size = stacksize,
                        .priority = (osPriority_t)prio,
                      };
  return osThreadNew(thread, arg, &attributes);
 8025fc8:	f107 0314 	add.w	r3, r7, #20
 8025fcc:	461a      	mov	r2, r3
 8025fce:	6879      	ldr	r1, [r7, #4]
 8025fd0:	68b8      	ldr	r0, [r7, #8]
 8025fd2:	f7ea f9d8 	bl	8010386 <osThreadNew>
 8025fd6:	4603      	mov	r3, r0
#endif
}
 8025fd8:	4618      	mov	r0, r3
 8025fda:	3738      	adds	r7, #56	@ 0x38
 8025fdc:	46bd      	mov	sp, r7
 8025fde:	bd80      	pop	{r7, pc}

08025fe0 <sys_arch_protect>:

  Note: This function is based on FreeRTOS API, because no equivalent CMSIS-RTOS
        API is available
*/
sys_prot_t sys_arch_protect(void)
{
 8025fe0:	b580      	push	{r7, lr}
 8025fe2:	af00      	add	r7, sp, #0
#if (osCMSIS < 0x20000U)
  osMutexWait(lwip_sys_mutex, osWaitForever);
#else
  osMutexAcquire(lwip_sys_mutex, osWaitForever);
 8025fe4:	4b04      	ldr	r3, [pc, #16]	@ (8025ff8 <sys_arch_protect+0x18>)
 8025fe6:	681b      	ldr	r3, [r3, #0]
 8025fe8:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 8025fec:	4618      	mov	r0, r3
 8025fee:	f7ea fb09 	bl	8010604 <osMutexAcquire>
#endif
  return (sys_prot_t)1;
 8025ff2:	2301      	movs	r3, #1
}
 8025ff4:	4618      	mov	r0, r3
 8025ff6:	bd80      	pop	{r7, pc}
 8025ff8:	2402a190 	.word	0x2402a190

08025ffc <sys_arch_unprotect>:

  Note: This function is based on FreeRTOS API, because no equivalent CMSIS-RTOS
        API is available
*/
void sys_arch_unprotect(sys_prot_t pval)
{
 8025ffc:	b580      	push	{r7, lr}
 8025ffe:	b082      	sub	sp, #8
 8026000:	af00      	add	r7, sp, #0
 8026002:	6078      	str	r0, [r7, #4]
  ( void ) pval;
  osMutexRelease(lwip_sys_mutex);
 8026004:	4b04      	ldr	r3, [pc, #16]	@ (8026018 <sys_arch_unprotect+0x1c>)
 8026006:	681b      	ldr	r3, [r3, #0]
 8026008:	4618      	mov	r0, r3
 802600a:	f7ea fb46 	bl	801069a <osMutexRelease>
}
 802600e:	bf00      	nop
 8026010:	3708      	adds	r7, #8
 8026012:	46bd      	mov	sp, r7
 8026014:	bd80      	pop	{r7, pc}
 8026016:	bf00      	nop
 8026018:	2402a190 	.word	0x2402a190

0802601c <NewMessageData>:
#include <string.h>
//#include "cmsis_os.h"

osMutexId_t mqttMutex;

static void NewMessageData(MessageData* md, MQTTString* aTopicName, MQTTMessage* aMessage) {
 802601c:	b480      	push	{r7}
 802601e:	b085      	sub	sp, #20
 8026020:	af00      	add	r7, sp, #0
 8026022:	60f8      	str	r0, [r7, #12]
 8026024:	60b9      	str	r1, [r7, #8]
 8026026:	607a      	str	r2, [r7, #4]
    md->topicName = aTopicName;
 8026028:	68fb      	ldr	r3, [r7, #12]
 802602a:	68ba      	ldr	r2, [r7, #8]
 802602c:	605a      	str	r2, [r3, #4]
    md->message = aMessage;
 802602e:	68fb      	ldr	r3, [r7, #12]
 8026030:	687a      	ldr	r2, [r7, #4]
 8026032:	601a      	str	r2, [r3, #0]
}
 8026034:	bf00      	nop
 8026036:	3714      	adds	r7, #20
 8026038:	46bd      	mov	sp, r7
 802603a:	f85d 7b04 	ldr.w	r7, [sp], #4
 802603e:	4770      	bx	lr

08026040 <getNextPacketId>:


static int getNextPacketId(MQTTClient *c) {
 8026040:	b480      	push	{r7}
 8026042:	b083      	sub	sp, #12
 8026044:	af00      	add	r7, sp, #0
 8026046:	6078      	str	r0, [r7, #4]
    return c->next_packetid = (c->next_packetid == MAX_PACKET_ID) ? 1 : c->next_packetid + 1;
 8026048:	687b      	ldr	r3, [r7, #4]
 802604a:	681b      	ldr	r3, [r3, #0]
 802604c:	f64f 72ff 	movw	r2, #65535	@ 0xffff
 8026050:	4293      	cmp	r3, r2
 8026052:	d003      	beq.n	802605c <getNextPacketId+0x1c>
 8026054:	687b      	ldr	r3, [r7, #4]
 8026056:	681b      	ldr	r3, [r3, #0]
 8026058:	3301      	adds	r3, #1
 802605a:	e000      	b.n	802605e <getNextPacketId+0x1e>
 802605c:	2301      	movs	r3, #1
 802605e:	687a      	ldr	r2, [r7, #4]
 8026060:	6013      	str	r3, [r2, #0]
 8026062:	687b      	ldr	r3, [r7, #4]
 8026064:	681b      	ldr	r3, [r3, #0]
}
 8026066:	4618      	mov	r0, r3
 8026068:	370c      	adds	r7, #12
 802606a:	46bd      	mov	sp, r7
 802606c:	f85d 7b04 	ldr.w	r7, [sp], #4
 8026070:	4770      	bx	lr

08026072 <sendPacket>:


static int sendPacket(MQTTClient* c, int length, Timer* timer)
{
 8026072:	b5f0      	push	{r4, r5, r6, r7, lr}
 8026074:	b087      	sub	sp, #28
 8026076:	af00      	add	r7, sp, #0
 8026078:	60f8      	str	r0, [r7, #12]
 802607a:	60b9      	str	r1, [r7, #8]
 802607c:	607a      	str	r2, [r7, #4]
    int rc = FAILURE,
 802607e:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8026082:	617b      	str	r3, [r7, #20]
        sent = 0;
 8026084:	2300      	movs	r3, #0
 8026086:	613b      	str	r3, [r7, #16]

    while (sent < length && !TimerIsExpired(timer))
 8026088:	e018      	b.n	80260bc <sendPacket+0x4a>
    {
        rc = c->ipstack->mqttwrite(c->ipstack, &c->buf[sent], length, TimerLeftMS(timer));
 802608a:	68fb      	ldr	r3, [r7, #12]
 802608c:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 802608e:	689c      	ldr	r4, [r3, #8]
 8026090:	68fb      	ldr	r3, [r7, #12]
 8026092:	6d5d      	ldr	r5, [r3, #84]	@ 0x54
 8026094:	68fb      	ldr	r3, [r7, #12]
 8026096:	691a      	ldr	r2, [r3, #16]
 8026098:	693b      	ldr	r3, [r7, #16]
 802609a:	18d6      	adds	r6, r2, r3
 802609c:	6878      	ldr	r0, [r7, #4]
 802609e:	f000 fed3 	bl	8026e48 <TimerLeftMS>
 80260a2:	4603      	mov	r3, r0
 80260a4:	68ba      	ldr	r2, [r7, #8]
 80260a6:	4631      	mov	r1, r6
 80260a8:	4628      	mov	r0, r5
 80260aa:	47a0      	blx	r4
 80260ac:	6178      	str	r0, [r7, #20]
        if (rc < 0)  // there was an error writing the data
 80260ae:	697b      	ldr	r3, [r7, #20]
 80260b0:	2b00      	cmp	r3, #0
 80260b2:	db0e      	blt.n	80260d2 <sendPacket+0x60>
            break;
        sent += rc;
 80260b4:	693a      	ldr	r2, [r7, #16]
 80260b6:	697b      	ldr	r3, [r7, #20]
 80260b8:	4413      	add	r3, r2
 80260ba:	613b      	str	r3, [r7, #16]
    while (sent < length && !TimerIsExpired(timer))
 80260bc:	693a      	ldr	r2, [r7, #16]
 80260be:	68bb      	ldr	r3, [r7, #8]
 80260c0:	429a      	cmp	r2, r3
 80260c2:	da07      	bge.n	80260d4 <sendPacket+0x62>
 80260c4:	6878      	ldr	r0, [r7, #4]
 80260c6:	f000 fe7d 	bl	8026dc4 <TimerIsExpired>
 80260ca:	4603      	mov	r3, r0
 80260cc:	2b00      	cmp	r3, #0
 80260ce:	d0dc      	beq.n	802608a <sendPacket+0x18>
 80260d0:	e000      	b.n	80260d4 <sendPacket+0x62>
            break;
 80260d2:	bf00      	nop
    }
    if (sent == length)
 80260d4:	693a      	ldr	r2, [r7, #16]
 80260d6:	68bb      	ldr	r3, [r7, #8]
 80260d8:	429a      	cmp	r2, r3
 80260da:	d10b      	bne.n	80260f4 <sendPacket+0x82>
    {
        TimerCountdown(&c->last_sent, c->keepAliveInterval); // record the fact that we have MQTT_SUCCESSfully sent the packet
 80260dc:	68fb      	ldr	r3, [r7, #12]
 80260de:	f103 0258 	add.w	r2, r3, #88	@ 0x58
 80260e2:	68fb      	ldr	r3, [r7, #12]
 80260e4:	699b      	ldr	r3, [r3, #24]
 80260e6:	4619      	mov	r1, r3
 80260e8:	4610      	mov	r0, r2
 80260ea:	f000 fe95 	bl	8026e18 <TimerCountdown>
        rc = MQTT_SUCCESS;
 80260ee:	2300      	movs	r3, #0
 80260f0:	617b      	str	r3, [r7, #20]
 80260f2:	e002      	b.n	80260fa <sendPacket+0x88>
    }
    else
        rc = FAILURE;
 80260f4:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80260f8:	617b      	str	r3, [r7, #20]
    return rc;
 80260fa:	697b      	ldr	r3, [r7, #20]
}
 80260fc:	4618      	mov	r0, r3
 80260fe:	371c      	adds	r7, #28
 8026100:	46bd      	mov	sp, r7
 8026102:	bdf0      	pop	{r4, r5, r6, r7, pc}

08026104 <MQTTClientInit>:


void MQTTClientInit(MQTTClient* c, Network* network, unsigned int command_timeout_ms,
		unsigned char* sendbuf, size_t sendbuf_size, unsigned char* readbuf, size_t readbuf_size)
{
 8026104:	b580      	push	{r7, lr}
 8026106:	b086      	sub	sp, #24
 8026108:	af00      	add	r7, sp, #0
 802610a:	60f8      	str	r0, [r7, #12]
 802610c:	60b9      	str	r1, [r7, #8]
 802610e:	607a      	str	r2, [r7, #4]
 8026110:	603b      	str	r3, [r7, #0]
    int i;
    c->ipstack = network;
 8026112:	68fb      	ldr	r3, [r7, #12]
 8026114:	68ba      	ldr	r2, [r7, #8]
 8026116:	655a      	str	r2, [r3, #84]	@ 0x54

    for (i = 0; i < MAX_MESSAGE_HANDLERS; ++i)
 8026118:	2300      	movs	r3, #0
 802611a:	617b      	str	r3, [r7, #20]
 802611c:	e008      	b.n	8026130 <MQTTClientInit+0x2c>
        c->messageHandlers[i].topicFilter = 0;
 802611e:	68fb      	ldr	r3, [r7, #12]
 8026120:	697a      	ldr	r2, [r7, #20]
 8026122:	3205      	adds	r2, #5
 8026124:	2100      	movs	r1, #0
 8026126:	f843 1032 	str.w	r1, [r3, r2, lsl #3]
    for (i = 0; i < MAX_MESSAGE_HANDLERS; ++i)
 802612a:	697b      	ldr	r3, [r7, #20]
 802612c:	3301      	adds	r3, #1
 802612e:	617b      	str	r3, [r7, #20]
 8026130:	697b      	ldr	r3, [r7, #20]
 8026132:	2b04      	cmp	r3, #4
 8026134:	ddf3      	ble.n	802611e <MQTTClientInit+0x1a>
    c->command_timeout_ms = command_timeout_ms;
 8026136:	68fb      	ldr	r3, [r7, #12]
 8026138:	687a      	ldr	r2, [r7, #4]
 802613a:	605a      	str	r2, [r3, #4]
    c->buf = sendbuf;
 802613c:	68fb      	ldr	r3, [r7, #12]
 802613e:	683a      	ldr	r2, [r7, #0]
 8026140:	611a      	str	r2, [r3, #16]
    c->buf_size = sendbuf_size;
 8026142:	68fb      	ldr	r3, [r7, #12]
 8026144:	6a3a      	ldr	r2, [r7, #32]
 8026146:	609a      	str	r2, [r3, #8]
    c->readbuf = readbuf;
 8026148:	68fb      	ldr	r3, [r7, #12]
 802614a:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 802614c:	615a      	str	r2, [r3, #20]
    c->readbuf_size = readbuf_size;
 802614e:	68fb      	ldr	r3, [r7, #12]
 8026150:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 8026152:	60da      	str	r2, [r3, #12]
    c->isconnected = 0;
 8026154:	68fb      	ldr	r3, [r7, #12]
 8026156:	2200      	movs	r2, #0
 8026158:	621a      	str	r2, [r3, #32]
    c->cleansession = 0;
 802615a:	68fb      	ldr	r3, [r7, #12]
 802615c:	2200      	movs	r2, #0
 802615e:	625a      	str	r2, [r3, #36]	@ 0x24
    c->ping_outstanding = 0;
 8026160:	68fb      	ldr	r3, [r7, #12]
 8026162:	2200      	movs	r2, #0
 8026164:	771a      	strb	r2, [r3, #28]
    c->defaultMessageHandler = NULL;
 8026166:	68fb      	ldr	r3, [r7, #12]
 8026168:	2200      	movs	r2, #0
 802616a:	651a      	str	r2, [r3, #80]	@ 0x50
	  c->next_packetid = 1;
 802616c:	68fb      	ldr	r3, [r7, #12]
 802616e:	2201      	movs	r2, #1
 8026170:	601a      	str	r2, [r3, #0]
    TimerInit(&c->last_sent);
 8026172:	68fb      	ldr	r3, [r7, #12]
 8026174:	3358      	adds	r3, #88	@ 0x58
 8026176:	4618      	mov	r0, r3
 8026178:	f000 fe7c 	bl	8026e74 <TimerInit>
    TimerInit(&c->last_received);
 802617c:	68fb      	ldr	r3, [r7, #12]
 802617e:	3360      	adds	r3, #96	@ 0x60
 8026180:	4618      	mov	r0, r3
 8026182:	f000 fe77 	bl	8026e74 <TimerInit>
#if defined(MQTT_TASK)
	  MutexInit(&c->mutex);
#endif
	  if(mqttMutex == NULL)
 8026186:	4b07      	ldr	r3, [pc, #28]	@ (80261a4 <MQTTClientInit+0xa0>)
 8026188:	681b      	ldr	r3, [r3, #0]
 802618a:	2b00      	cmp	r3, #0
 802618c:	d105      	bne.n	802619a <MQTTClientInit+0x96>
	  {
//		  osMutexDef(mqttMutex);
//		  mqttMutex = osMutexNew(NULL);
		  c->mutex = osMutexNew(NULL);
 802618e:	2000      	movs	r0, #0
 8026190:	f7ea f9b2 	bl	80104f8 <osMutexNew>
 8026194:	4602      	mov	r2, r0
 8026196:	68fb      	ldr	r3, [r7, #12]
 8026198:	669a      	str	r2, [r3, #104]	@ 0x68

	  }
}
 802619a:	bf00      	nop
 802619c:	3718      	adds	r7, #24
 802619e:	46bd      	mov	sp, r7
 80261a0:	bd80      	pop	{r7, pc}
 80261a2:	bf00      	nop
 80261a4:	2402a194 	.word	0x2402a194

080261a8 <decodePacket>:


static int decodePacket(MQTTClient* c, int* value, int timeout)
{
 80261a8:	b590      	push	{r4, r7, lr}
 80261aa:	b08b      	sub	sp, #44	@ 0x2c
 80261ac:	af00      	add	r7, sp, #0
 80261ae:	60f8      	str	r0, [r7, #12]
 80261b0:	60b9      	str	r1, [r7, #8]
 80261b2:	607a      	str	r2, [r7, #4]
    unsigned char i;
    int multiplier = 1;
 80261b4:	2301      	movs	r3, #1
 80261b6:	627b      	str	r3, [r7, #36]	@ 0x24
    int len = 0;
 80261b8:	2300      	movs	r3, #0
 80261ba:	623b      	str	r3, [r7, #32]
    const int MAX_NO_OF_REMAINING_LENGTH_BYTES = 4;
 80261bc:	2304      	movs	r3, #4
 80261be:	61fb      	str	r3, [r7, #28]

    *value = 0;
 80261c0:	68bb      	ldr	r3, [r7, #8]
 80261c2:	2200      	movs	r2, #0
 80261c4:	601a      	str	r2, [r3, #0]
    do
    {
        int rc = MQTTPACKET_READ_ERROR;
 80261c6:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80261ca:	61bb      	str	r3, [r7, #24]

        if (++len > MAX_NO_OF_REMAINING_LENGTH_BYTES)
 80261cc:	6a3b      	ldr	r3, [r7, #32]
 80261ce:	3301      	adds	r3, #1
 80261d0:	623b      	str	r3, [r7, #32]
 80261d2:	6a3a      	ldr	r2, [r7, #32]
 80261d4:	69fb      	ldr	r3, [r7, #28]
 80261d6:	429a      	cmp	r2, r3
 80261d8:	dd03      	ble.n	80261e2 <decodePacket+0x3a>
        {
            rc = MQTTPACKET_READ_ERROR; /* bad data */
 80261da:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80261de:	61bb      	str	r3, [r7, #24]
            goto exit;
 80261e0:	e021      	b.n	8026226 <decodePacket+0x7e>
        }
        rc = c->ipstack->mqttread(c->ipstack, &i, 1, timeout);
 80261e2:	68fb      	ldr	r3, [r7, #12]
 80261e4:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 80261e6:	685c      	ldr	r4, [r3, #4]
 80261e8:	68fb      	ldr	r3, [r7, #12]
 80261ea:	6d58      	ldr	r0, [r3, #84]	@ 0x54
 80261ec:	f107 0117 	add.w	r1, r7, #23
 80261f0:	687b      	ldr	r3, [r7, #4]
 80261f2:	2201      	movs	r2, #1
 80261f4:	47a0      	blx	r4
 80261f6:	61b8      	str	r0, [r7, #24]
        if (rc != 1)
 80261f8:	69bb      	ldr	r3, [r7, #24]
 80261fa:	2b01      	cmp	r3, #1
 80261fc:	d112      	bne.n	8026224 <decodePacket+0x7c>
            goto exit;
        *value += (i & 127) * multiplier;
 80261fe:	68bb      	ldr	r3, [r7, #8]
 8026200:	681a      	ldr	r2, [r3, #0]
 8026202:	7dfb      	ldrb	r3, [r7, #23]
 8026204:	f003 037f 	and.w	r3, r3, #127	@ 0x7f
 8026208:	6a79      	ldr	r1, [r7, #36]	@ 0x24
 802620a:	fb01 f303 	mul.w	r3, r1, r3
 802620e:	441a      	add	r2, r3
 8026210:	68bb      	ldr	r3, [r7, #8]
 8026212:	601a      	str	r2, [r3, #0]
        multiplier *= 128;
 8026214:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8026216:	01db      	lsls	r3, r3, #7
 8026218:	627b      	str	r3, [r7, #36]	@ 0x24
    } while ((i & 128) != 0);
 802621a:	7dfb      	ldrb	r3, [r7, #23]
 802621c:	b25b      	sxtb	r3, r3
 802621e:	2b00      	cmp	r3, #0
 8026220:	dbd1      	blt.n	80261c6 <decodePacket+0x1e>
exit:
 8026222:	e000      	b.n	8026226 <decodePacket+0x7e>
            goto exit;
 8026224:	bf00      	nop
    return len;
 8026226:	6a3b      	ldr	r3, [r7, #32]
}
 8026228:	4618      	mov	r0, r3
 802622a:	372c      	adds	r7, #44	@ 0x2c
 802622c:	46bd      	mov	sp, r7
 802622e:	bd90      	pop	{r4, r7, pc}

08026230 <readPacket>:


static int readPacket(MQTTClient* c, Timer* timer)
{
 8026230:	b5f0      	push	{r4, r5, r6, r7, lr}
 8026232:	b089      	sub	sp, #36	@ 0x24
 8026234:	af00      	add	r7, sp, #0
 8026236:	60f8      	str	r0, [r7, #12]
 8026238:	60b9      	str	r1, [r7, #8]
    MQTTHeader header = {0};
 802623a:	2300      	movs	r3, #0
 802623c:	617b      	str	r3, [r7, #20]
    int len = 0;
 802623e:	2300      	movs	r3, #0
 8026240:	61bb      	str	r3, [r7, #24]
    int rem_len = 0;
 8026242:	2300      	movs	r3, #0
 8026244:	613b      	str	r3, [r7, #16]

    /* 1. read the header byte.  This has the packet type in it */
    int rc = c->ipstack->mqttread(c->ipstack, c->readbuf, 1, TimerLeftMS(timer));
 8026246:	68fb      	ldr	r3, [r7, #12]
 8026248:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 802624a:	685c      	ldr	r4, [r3, #4]
 802624c:	68fb      	ldr	r3, [r7, #12]
 802624e:	6d5d      	ldr	r5, [r3, #84]	@ 0x54
 8026250:	68fb      	ldr	r3, [r7, #12]
 8026252:	695e      	ldr	r6, [r3, #20]
 8026254:	68b8      	ldr	r0, [r7, #8]
 8026256:	f000 fdf7 	bl	8026e48 <TimerLeftMS>
 802625a:	4603      	mov	r3, r0
 802625c:	2201      	movs	r2, #1
 802625e:	4631      	mov	r1, r6
 8026260:	4628      	mov	r0, r5
 8026262:	47a0      	blx	r4
 8026264:	61f8      	str	r0, [r7, #28]
    if (rc != 1)
 8026266:	69fb      	ldr	r3, [r7, #28]
 8026268:	2b01      	cmp	r3, #1
 802626a:	d15d      	bne.n	8026328 <readPacket+0xf8>
        goto exit;

    len = 1;
 802626c:	2301      	movs	r3, #1
 802626e:	61bb      	str	r3, [r7, #24]
    /* 2. read the remaining length.  This is variable in itself */
    decodePacket(c, &rem_len, TimerLeftMS(timer));
 8026270:	68b8      	ldr	r0, [r7, #8]
 8026272:	f000 fde9 	bl	8026e48 <TimerLeftMS>
 8026276:	4602      	mov	r2, r0
 8026278:	f107 0310 	add.w	r3, r7, #16
 802627c:	4619      	mov	r1, r3
 802627e:	68f8      	ldr	r0, [r7, #12]
 8026280:	f7ff ff92 	bl	80261a8 <decodePacket>
    len += MQTTPacket_encode(c->readbuf + 1, rem_len); /* put the original remaining length back into the buffer */
 8026284:	68fb      	ldr	r3, [r7, #12]
 8026286:	695b      	ldr	r3, [r3, #20]
 8026288:	3301      	adds	r3, #1
 802628a:	693a      	ldr	r2, [r7, #16]
 802628c:	4611      	mov	r1, r2
 802628e:	4618      	mov	r0, r3
 8026290:	f001 f959 	bl	8027546 <MQTTPacket_encode>
 8026294:	4602      	mov	r2, r0
 8026296:	69bb      	ldr	r3, [r7, #24]
 8026298:	4413      	add	r3, r2
 802629a:	61bb      	str	r3, [r7, #24]

    if (rem_len > (c->readbuf_size - len))
 802629c:	68fb      	ldr	r3, [r7, #12]
 802629e:	68da      	ldr	r2, [r3, #12]
 80262a0:	69bb      	ldr	r3, [r7, #24]
 80262a2:	1ad3      	subs	r3, r2, r3
 80262a4:	693a      	ldr	r2, [r7, #16]
 80262a6:	4293      	cmp	r3, r2
 80262a8:	d203      	bcs.n	80262b2 <readPacket+0x82>
    {
        rc = BUFFER_OVERFLOW;
 80262aa:	f06f 0301 	mvn.w	r3, #1
 80262ae:	61fb      	str	r3, [r7, #28]
        goto exit;
 80262b0:	e03d      	b.n	802632e <readPacket+0xfe>
    }

    /* 3. read the rest of the buffer using a callback to supply the rest of the data */
    if (rem_len > 0 && (rc = c->ipstack->mqttread(c->ipstack, c->readbuf + len, rem_len, TimerLeftMS(timer)) != rem_len)) {
 80262b2:	693b      	ldr	r3, [r7, #16]
 80262b4:	2b00      	cmp	r3, #0
 80262b6:	dd20      	ble.n	80262fa <readPacket+0xca>
 80262b8:	68fb      	ldr	r3, [r7, #12]
 80262ba:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 80262bc:	685c      	ldr	r4, [r3, #4]
 80262be:	68fb      	ldr	r3, [r7, #12]
 80262c0:	6d5d      	ldr	r5, [r3, #84]	@ 0x54
 80262c2:	68fb      	ldr	r3, [r7, #12]
 80262c4:	695a      	ldr	r2, [r3, #20]
 80262c6:	69bb      	ldr	r3, [r7, #24]
 80262c8:	18d6      	adds	r6, r2, r3
 80262ca:	693b      	ldr	r3, [r7, #16]
 80262cc:	607b      	str	r3, [r7, #4]
 80262ce:	68b8      	ldr	r0, [r7, #8]
 80262d0:	f000 fdba 	bl	8026e48 <TimerLeftMS>
 80262d4:	4603      	mov	r3, r0
 80262d6:	687a      	ldr	r2, [r7, #4]
 80262d8:	4631      	mov	r1, r6
 80262da:	4628      	mov	r0, r5
 80262dc:	47a0      	blx	r4
 80262de:	4602      	mov	r2, r0
 80262e0:	693b      	ldr	r3, [r7, #16]
 80262e2:	429a      	cmp	r2, r3
 80262e4:	bf14      	ite	ne
 80262e6:	2301      	movne	r3, #1
 80262e8:	2300      	moveq	r3, #0
 80262ea:	b2db      	uxtb	r3, r3
 80262ec:	61fb      	str	r3, [r7, #28]
 80262ee:	69fb      	ldr	r3, [r7, #28]
 80262f0:	2b00      	cmp	r3, #0
 80262f2:	d002      	beq.n	80262fa <readPacket+0xca>
        rc = 0;
 80262f4:	2300      	movs	r3, #0
 80262f6:	61fb      	str	r3, [r7, #28]
        goto exit;
 80262f8:	e019      	b.n	802632e <readPacket+0xfe>
    }

    header.byte = c->readbuf[0];
 80262fa:	68fb      	ldr	r3, [r7, #12]
 80262fc:	695b      	ldr	r3, [r3, #20]
 80262fe:	781b      	ldrb	r3, [r3, #0]
 8026300:	753b      	strb	r3, [r7, #20]
    rc = header.bits.type;
 8026302:	7d3b      	ldrb	r3, [r7, #20]
 8026304:	f3c3 1303 	ubfx	r3, r3, #4, #4
 8026308:	b2db      	uxtb	r3, r3
 802630a:	61fb      	str	r3, [r7, #28]
    if (c->keepAliveInterval > 0)
 802630c:	68fb      	ldr	r3, [r7, #12]
 802630e:	699b      	ldr	r3, [r3, #24]
 8026310:	2b00      	cmp	r3, #0
 8026312:	d00b      	beq.n	802632c <readPacket+0xfc>
        TimerCountdown(&c->last_received, c->keepAliveInterval); // record the fact that we have MQTT_SUCCESSfully received a packet
 8026314:	68fb      	ldr	r3, [r7, #12]
 8026316:	f103 0260 	add.w	r2, r3, #96	@ 0x60
 802631a:	68fb      	ldr	r3, [r7, #12]
 802631c:	699b      	ldr	r3, [r3, #24]
 802631e:	4619      	mov	r1, r3
 8026320:	4610      	mov	r0, r2
 8026322:	f000 fd79 	bl	8026e18 <TimerCountdown>
 8026326:	e002      	b.n	802632e <readPacket+0xfe>
        goto exit;
 8026328:	bf00      	nop
 802632a:	e000      	b.n	802632e <readPacket+0xfe>
exit:
 802632c:	bf00      	nop
    return rc;
 802632e:	69fb      	ldr	r3, [r7, #28]
}
 8026330:	4618      	mov	r0, r3
 8026332:	3724      	adds	r7, #36	@ 0x24
 8026334:	46bd      	mov	sp, r7
 8026336:	bdf0      	pop	{r4, r5, r6, r7, pc}

08026338 <isTopicMatched>:

// assume topic filter and name is in correct format
// # can only be at end
// + and # can only be next to separator
static char isTopicMatched(char* topicFilter, MQTTString* topicName)
{
 8026338:	b480      	push	{r7}
 802633a:	b087      	sub	sp, #28
 802633c:	af00      	add	r7, sp, #0
 802633e:	6078      	str	r0, [r7, #4]
 8026340:	6039      	str	r1, [r7, #0]
    char* curf = topicFilter;
 8026342:	687b      	ldr	r3, [r7, #4]
 8026344:	617b      	str	r3, [r7, #20]
    char* curn = topicName->lenstring.data;
 8026346:	683b      	ldr	r3, [r7, #0]
 8026348:	689b      	ldr	r3, [r3, #8]
 802634a:	613b      	str	r3, [r7, #16]
    char* curn_end = curn + topicName->lenstring.len;
 802634c:	683b      	ldr	r3, [r7, #0]
 802634e:	685b      	ldr	r3, [r3, #4]
 8026350:	461a      	mov	r2, r3
 8026352:	693b      	ldr	r3, [r7, #16]
 8026354:	4413      	add	r3, r2
 8026356:	60bb      	str	r3, [r7, #8]

    while (*curf && curn < curn_end)
 8026358:	e039      	b.n	80263ce <isTopicMatched+0x96>
    {
        if (*curn == '/' && *curf != '/')
 802635a:	693b      	ldr	r3, [r7, #16]
 802635c:	781b      	ldrb	r3, [r3, #0]
 802635e:	2b2f      	cmp	r3, #47	@ 0x2f
 8026360:	d103      	bne.n	802636a <isTopicMatched+0x32>
 8026362:	697b      	ldr	r3, [r7, #20]
 8026364:	781b      	ldrb	r3, [r3, #0]
 8026366:	2b2f      	cmp	r3, #47	@ 0x2f
 8026368:	d13a      	bne.n	80263e0 <isTopicMatched+0xa8>
            break;
        if (*curf != '+' && *curf != '#' && *curf != *curn)
 802636a:	697b      	ldr	r3, [r7, #20]
 802636c:	781b      	ldrb	r3, [r3, #0]
 802636e:	2b2b      	cmp	r3, #43	@ 0x2b
 8026370:	d009      	beq.n	8026386 <isTopicMatched+0x4e>
 8026372:	697b      	ldr	r3, [r7, #20]
 8026374:	781b      	ldrb	r3, [r3, #0]
 8026376:	2b23      	cmp	r3, #35	@ 0x23
 8026378:	d005      	beq.n	8026386 <isTopicMatched+0x4e>
 802637a:	697b      	ldr	r3, [r7, #20]
 802637c:	781a      	ldrb	r2, [r3, #0]
 802637e:	693b      	ldr	r3, [r7, #16]
 8026380:	781b      	ldrb	r3, [r3, #0]
 8026382:	429a      	cmp	r2, r3
 8026384:	d12e      	bne.n	80263e4 <isTopicMatched+0xac>
            break;
        if (*curf == '+')
 8026386:	697b      	ldr	r3, [r7, #20]
 8026388:	781b      	ldrb	r3, [r3, #0]
 802638a:	2b2b      	cmp	r3, #43	@ 0x2b
 802638c:	d112      	bne.n	80263b4 <isTopicMatched+0x7c>
        {   // skip until we meet the next separator, or end of string
            char* nextpos = curn + 1;
 802638e:	693b      	ldr	r3, [r7, #16]
 8026390:	3301      	adds	r3, #1
 8026392:	60fb      	str	r3, [r7, #12]
            while (nextpos < curn_end && *nextpos != '/')
 8026394:	e005      	b.n	80263a2 <isTopicMatched+0x6a>
                nextpos = ++curn + 1;
 8026396:	693b      	ldr	r3, [r7, #16]
 8026398:	3301      	adds	r3, #1
 802639a:	613b      	str	r3, [r7, #16]
 802639c:	693b      	ldr	r3, [r7, #16]
 802639e:	3301      	adds	r3, #1
 80263a0:	60fb      	str	r3, [r7, #12]
            while (nextpos < curn_end && *nextpos != '/')
 80263a2:	68fa      	ldr	r2, [r7, #12]
 80263a4:	68bb      	ldr	r3, [r7, #8]
 80263a6:	429a      	cmp	r2, r3
 80263a8:	d20b      	bcs.n	80263c2 <isTopicMatched+0x8a>
 80263aa:	68fb      	ldr	r3, [r7, #12]
 80263ac:	781b      	ldrb	r3, [r3, #0]
 80263ae:	2b2f      	cmp	r3, #47	@ 0x2f
 80263b0:	d1f1      	bne.n	8026396 <isTopicMatched+0x5e>
 80263b2:	e006      	b.n	80263c2 <isTopicMatched+0x8a>
        }
        else if (*curf == '#')
 80263b4:	697b      	ldr	r3, [r7, #20]
 80263b6:	781b      	ldrb	r3, [r3, #0]
 80263b8:	2b23      	cmp	r3, #35	@ 0x23
 80263ba:	d102      	bne.n	80263c2 <isTopicMatched+0x8a>
            curn = curn_end - 1;    // skip until end of string
 80263bc:	68bb      	ldr	r3, [r7, #8]
 80263be:	3b01      	subs	r3, #1
 80263c0:	613b      	str	r3, [r7, #16]
        curf++;
 80263c2:	697b      	ldr	r3, [r7, #20]
 80263c4:	3301      	adds	r3, #1
 80263c6:	617b      	str	r3, [r7, #20]
        curn++;
 80263c8:	693b      	ldr	r3, [r7, #16]
 80263ca:	3301      	adds	r3, #1
 80263cc:	613b      	str	r3, [r7, #16]
    while (*curf && curn < curn_end)
 80263ce:	697b      	ldr	r3, [r7, #20]
 80263d0:	781b      	ldrb	r3, [r3, #0]
 80263d2:	2b00      	cmp	r3, #0
 80263d4:	d007      	beq.n	80263e6 <isTopicMatched+0xae>
 80263d6:	693a      	ldr	r2, [r7, #16]
 80263d8:	68bb      	ldr	r3, [r7, #8]
 80263da:	429a      	cmp	r2, r3
 80263dc:	d3bd      	bcc.n	802635a <isTopicMatched+0x22>
 80263de:	e002      	b.n	80263e6 <isTopicMatched+0xae>
            break;
 80263e0:	bf00      	nop
 80263e2:	e000      	b.n	80263e6 <isTopicMatched+0xae>
            break;
 80263e4:	bf00      	nop
    };

    return (curn == curn_end) && (*curf == '\0');
 80263e6:	693a      	ldr	r2, [r7, #16]
 80263e8:	68bb      	ldr	r3, [r7, #8]
 80263ea:	429a      	cmp	r2, r3
 80263ec:	d105      	bne.n	80263fa <isTopicMatched+0xc2>
 80263ee:	697b      	ldr	r3, [r7, #20]
 80263f0:	781b      	ldrb	r3, [r3, #0]
 80263f2:	2b00      	cmp	r3, #0
 80263f4:	d101      	bne.n	80263fa <isTopicMatched+0xc2>
 80263f6:	2301      	movs	r3, #1
 80263f8:	e000      	b.n	80263fc <isTopicMatched+0xc4>
 80263fa:	2300      	movs	r3, #0
 80263fc:	b2db      	uxtb	r3, r3
}
 80263fe:	4618      	mov	r0, r3
 8026400:	371c      	adds	r7, #28
 8026402:	46bd      	mov	sp, r7
 8026404:	f85d 7b04 	ldr.w	r7, [sp], #4
 8026408:	4770      	bx	lr

0802640a <deliverMessage>:


int deliverMessage(MQTTClient* c, MQTTString* topicName, MQTTMessage* message)
{
 802640a:	b580      	push	{r7, lr}
 802640c:	b08a      	sub	sp, #40	@ 0x28
 802640e:	af00      	add	r7, sp, #0
 8026410:	60f8      	str	r0, [r7, #12]
 8026412:	60b9      	str	r1, [r7, #8]
 8026414:	607a      	str	r2, [r7, #4]
    int i;
    int rc = FAILURE;
 8026416:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 802641a:	623b      	str	r3, [r7, #32]

    // we have to find the right message handler - indexed by topic
    for (i = 0; i < MAX_MESSAGE_HANDLERS; ++i)
 802641c:	2300      	movs	r3, #0
 802641e:	627b      	str	r3, [r7, #36]	@ 0x24
 8026420:	e03c      	b.n	802649c <deliverMessage+0x92>
    {
        if (c->messageHandlers[i].topicFilter != 0 && (MQTTPacket_equals(topicName, (char*)c->messageHandlers[i].topicFilter) ||
 8026422:	68fb      	ldr	r3, [r7, #12]
 8026424:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8026426:	3205      	adds	r2, #5
 8026428:	f853 3032 	ldr.w	r3, [r3, r2, lsl #3]
 802642c:	2b00      	cmp	r3, #0
 802642e:	d032      	beq.n	8026496 <deliverMessage+0x8c>
 8026430:	68fb      	ldr	r3, [r7, #12]
 8026432:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8026434:	3205      	adds	r2, #5
 8026436:	f853 3032 	ldr.w	r3, [r3, r2, lsl #3]
 802643a:	4619      	mov	r1, r3
 802643c:	68b8      	ldr	r0, [r7, #8]
 802643e:	f001 fa51 	bl	80278e4 <MQTTPacket_equals>
 8026442:	4603      	mov	r3, r0
 8026444:	2b00      	cmp	r3, #0
 8026446:	d10b      	bne.n	8026460 <deliverMessage+0x56>
                isTopicMatched((char*)c->messageHandlers[i].topicFilter, topicName)))
 8026448:	68fb      	ldr	r3, [r7, #12]
 802644a:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 802644c:	3205      	adds	r2, #5
 802644e:	f853 3032 	ldr.w	r3, [r3, r2, lsl #3]
 8026452:	68b9      	ldr	r1, [r7, #8]
 8026454:	4618      	mov	r0, r3
 8026456:	f7ff ff6f 	bl	8026338 <isTopicMatched>
 802645a:	4603      	mov	r3, r0
        if (c->messageHandlers[i].topicFilter != 0 && (MQTTPacket_equals(topicName, (char*)c->messageHandlers[i].topicFilter) ||
 802645c:	2b00      	cmp	r3, #0
 802645e:	d01a      	beq.n	8026496 <deliverMessage+0x8c>
        {
            if (c->messageHandlers[i].fp != NULL)
 8026460:	68fa      	ldr	r2, [r7, #12]
 8026462:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8026464:	3305      	adds	r3, #5
 8026466:	00db      	lsls	r3, r3, #3
 8026468:	4413      	add	r3, r2
 802646a:	685b      	ldr	r3, [r3, #4]
 802646c:	2b00      	cmp	r3, #0
 802646e:	d012      	beq.n	8026496 <deliverMessage+0x8c>
            {
                MessageData md;
                NewMessageData(&md, topicName, message);
 8026470:	f107 0318 	add.w	r3, r7, #24
 8026474:	687a      	ldr	r2, [r7, #4]
 8026476:	68b9      	ldr	r1, [r7, #8]
 8026478:	4618      	mov	r0, r3
 802647a:	f7ff fdcf 	bl	802601c <NewMessageData>
                c->messageHandlers[i].fp(&md);
 802647e:	68fa      	ldr	r2, [r7, #12]
 8026480:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8026482:	3305      	adds	r3, #5
 8026484:	00db      	lsls	r3, r3, #3
 8026486:	4413      	add	r3, r2
 8026488:	685b      	ldr	r3, [r3, #4]
 802648a:	f107 0218 	add.w	r2, r7, #24
 802648e:	4610      	mov	r0, r2
 8026490:	4798      	blx	r3
                rc = MQTT_SUCCESS;
 8026492:	2300      	movs	r3, #0
 8026494:	623b      	str	r3, [r7, #32]
    for (i = 0; i < MAX_MESSAGE_HANDLERS; ++i)
 8026496:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8026498:	3301      	adds	r3, #1
 802649a:	627b      	str	r3, [r7, #36]	@ 0x24
 802649c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 802649e:	2b04      	cmp	r3, #4
 80264a0:	ddbf      	ble.n	8026422 <deliverMessage+0x18>
            }
        }
    }

    if (rc == FAILURE && c->defaultMessageHandler != NULL)
 80264a2:	6a3b      	ldr	r3, [r7, #32]
 80264a4:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 80264a8:	d112      	bne.n	80264d0 <deliverMessage+0xc6>
 80264aa:	68fb      	ldr	r3, [r7, #12]
 80264ac:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 80264ae:	2b00      	cmp	r3, #0
 80264b0:	d00e      	beq.n	80264d0 <deliverMessage+0xc6>
    {
        MessageData md;
        NewMessageData(&md, topicName, message);
 80264b2:	f107 0310 	add.w	r3, r7, #16
 80264b6:	687a      	ldr	r2, [r7, #4]
 80264b8:	68b9      	ldr	r1, [r7, #8]
 80264ba:	4618      	mov	r0, r3
 80264bc:	f7ff fdae 	bl	802601c <NewMessageData>
        c->defaultMessageHandler(&md);
 80264c0:	68fb      	ldr	r3, [r7, #12]
 80264c2:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 80264c4:	f107 0210 	add.w	r2, r7, #16
 80264c8:	4610      	mov	r0, r2
 80264ca:	4798      	blx	r3
        rc = MQTT_SUCCESS;
 80264cc:	2300      	movs	r3, #0
 80264ce:	623b      	str	r3, [r7, #32]
    }

    return rc;
 80264d0:	6a3b      	ldr	r3, [r7, #32]
}
 80264d2:	4618      	mov	r0, r3
 80264d4:	3728      	adds	r7, #40	@ 0x28
 80264d6:	46bd      	mov	sp, r7
 80264d8:	bd80      	pop	{r7, pc}

080264da <keepalive>:


int keepalive(MQTTClient* c)
{
 80264da:	b580      	push	{r7, lr}
 80264dc:	b086      	sub	sp, #24
 80264de:	af00      	add	r7, sp, #0
 80264e0:	6078      	str	r0, [r7, #4]
    int rc = MQTT_SUCCESS;
 80264e2:	2300      	movs	r3, #0
 80264e4:	617b      	str	r3, [r7, #20]

    if (c->keepAliveInterval == 0)
 80264e6:	687b      	ldr	r3, [r7, #4]
 80264e8:	699b      	ldr	r3, [r3, #24]
 80264ea:	2b00      	cmp	r3, #0
 80264ec:	d03e      	beq.n	802656c <keepalive+0x92>
        goto exit;

    if (TimerIsExpired(&c->last_sent) || TimerIsExpired(&c->last_received))
 80264ee:	687b      	ldr	r3, [r7, #4]
 80264f0:	3358      	adds	r3, #88	@ 0x58
 80264f2:	4618      	mov	r0, r3
 80264f4:	f000 fc66 	bl	8026dc4 <TimerIsExpired>
 80264f8:	4603      	mov	r3, r0
 80264fa:	2b00      	cmp	r3, #0
 80264fc:	d107      	bne.n	802650e <keepalive+0x34>
 80264fe:	687b      	ldr	r3, [r7, #4]
 8026500:	3360      	adds	r3, #96	@ 0x60
 8026502:	4618      	mov	r0, r3
 8026504:	f000 fc5e 	bl	8026dc4 <TimerIsExpired>
 8026508:	4603      	mov	r3, r0
 802650a:	2b00      	cmp	r3, #0
 802650c:	d030      	beq.n	8026570 <keepalive+0x96>
    {
        if (c->ping_outstanding)
 802650e:	687b      	ldr	r3, [r7, #4]
 8026510:	7f1b      	ldrb	r3, [r3, #28]
 8026512:	2b00      	cmp	r3, #0
 8026514:	d003      	beq.n	802651e <keepalive+0x44>
            rc = FAILURE; /* PINGRESP not received in keepalive interval */
 8026516:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 802651a:	617b      	str	r3, [r7, #20]
 802651c:	e029      	b.n	8026572 <keepalive+0x98>
        else
        {
            Timer timer;
            TimerInit(&timer);
 802651e:	f107 0308 	add.w	r3, r7, #8
 8026522:	4618      	mov	r0, r3
 8026524:	f000 fca6 	bl	8026e74 <TimerInit>
            TimerCountdownMS(&timer, 1000);
 8026528:	f107 0308 	add.w	r3, r7, #8
 802652c:	f44f 717a 	mov.w	r1, #1000	@ 0x3e8
 8026530:	4618      	mov	r0, r3
 8026532:	f000 fc5d 	bl	8026df0 <TimerCountdownMS>
            int len = MQTTSerialize_pingreq(c->buf, c->buf_size);
 8026536:	687b      	ldr	r3, [r7, #4]
 8026538:	691a      	ldr	r2, [r3, #16]
 802653a:	687b      	ldr	r3, [r7, #4]
 802653c:	689b      	ldr	r3, [r3, #8]
 802653e:	4619      	mov	r1, r3
 8026540:	4610      	mov	r0, r2
 8026542:	f000 ff34 	bl	80273ae <MQTTSerialize_pingreq>
 8026546:	6138      	str	r0, [r7, #16]
            if (len > 0 && (rc = sendPacket(c, len, &timer)) == MQTT_SUCCESS) // send the ping packet
 8026548:	693b      	ldr	r3, [r7, #16]
 802654a:	2b00      	cmp	r3, #0
 802654c:	dd11      	ble.n	8026572 <keepalive+0x98>
 802654e:	f107 0308 	add.w	r3, r7, #8
 8026552:	461a      	mov	r2, r3
 8026554:	6939      	ldr	r1, [r7, #16]
 8026556:	6878      	ldr	r0, [r7, #4]
 8026558:	f7ff fd8b 	bl	8026072 <sendPacket>
 802655c:	6178      	str	r0, [r7, #20]
 802655e:	697b      	ldr	r3, [r7, #20]
 8026560:	2b00      	cmp	r3, #0
 8026562:	d106      	bne.n	8026572 <keepalive+0x98>
                c->ping_outstanding = 1;
 8026564:	687b      	ldr	r3, [r7, #4]
 8026566:	2201      	movs	r2, #1
 8026568:	771a      	strb	r2, [r3, #28]
 802656a:	e002      	b.n	8026572 <keepalive+0x98>
        goto exit;
 802656c:	bf00      	nop
 802656e:	e000      	b.n	8026572 <keepalive+0x98>
        }
    }

exit:
 8026570:	bf00      	nop
    return rc;
 8026572:	697b      	ldr	r3, [r7, #20]
}
 8026574:	4618      	mov	r0, r3
 8026576:	3718      	adds	r7, #24
 8026578:	46bd      	mov	sp, r7
 802657a:	bd80      	pop	{r7, pc}

0802657c <MQTTCleanSession>:


void MQTTCleanSession(MQTTClient* c)
{
 802657c:	b480      	push	{r7}
 802657e:	b085      	sub	sp, #20
 8026580:	af00      	add	r7, sp, #0
 8026582:	6078      	str	r0, [r7, #4]
    int i = 0;
 8026584:	2300      	movs	r3, #0
 8026586:	60fb      	str	r3, [r7, #12]

    for (i = 0; i < MAX_MESSAGE_HANDLERS; ++i)
 8026588:	2300      	movs	r3, #0
 802658a:	60fb      	str	r3, [r7, #12]
 802658c:	e008      	b.n	80265a0 <MQTTCleanSession+0x24>
        c->messageHandlers[i].topicFilter = NULL;
 802658e:	687b      	ldr	r3, [r7, #4]
 8026590:	68fa      	ldr	r2, [r7, #12]
 8026592:	3205      	adds	r2, #5
 8026594:	2100      	movs	r1, #0
 8026596:	f843 1032 	str.w	r1, [r3, r2, lsl #3]
    for (i = 0; i < MAX_MESSAGE_HANDLERS; ++i)
 802659a:	68fb      	ldr	r3, [r7, #12]
 802659c:	3301      	adds	r3, #1
 802659e:	60fb      	str	r3, [r7, #12]
 80265a0:	68fb      	ldr	r3, [r7, #12]
 80265a2:	2b04      	cmp	r3, #4
 80265a4:	ddf3      	ble.n	802658e <MQTTCleanSession+0x12>
}
 80265a6:	bf00      	nop
 80265a8:	bf00      	nop
 80265aa:	3714      	adds	r7, #20
 80265ac:	46bd      	mov	sp, r7
 80265ae:	f85d 7b04 	ldr.w	r7, [sp], #4
 80265b2:	4770      	bx	lr

080265b4 <MQTTCloseSession>:


void MQTTCloseSession(MQTTClient* c)
{
 80265b4:	b580      	push	{r7, lr}
 80265b6:	b082      	sub	sp, #8
 80265b8:	af00      	add	r7, sp, #0
 80265ba:	6078      	str	r0, [r7, #4]
    c->ping_outstanding = 0;
 80265bc:	687b      	ldr	r3, [r7, #4]
 80265be:	2200      	movs	r2, #0
 80265c0:	771a      	strb	r2, [r3, #28]
    c->isconnected = 0;
 80265c2:	687b      	ldr	r3, [r7, #4]
 80265c4:	2200      	movs	r2, #0
 80265c6:	621a      	str	r2, [r3, #32]
    if (c->cleansession)
 80265c8:	687b      	ldr	r3, [r7, #4]
 80265ca:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 80265cc:	2b00      	cmp	r3, #0
 80265ce:	d002      	beq.n	80265d6 <MQTTCloseSession+0x22>
        MQTTCleanSession(c);
 80265d0:	6878      	ldr	r0, [r7, #4]
 80265d2:	f7ff ffd3 	bl	802657c <MQTTCleanSession>
}
 80265d6:	bf00      	nop
 80265d8:	3708      	adds	r7, #8
 80265da:	46bd      	mov	sp, r7
 80265dc:	bd80      	pop	{r7, pc}
	...

080265e0 <cycle>:


int cycle(MQTTClient* c, Timer* timer)
{
 80265e0:	b5f0      	push	{r4, r5, r6, r7, lr}
 80265e2:	b095      	sub	sp, #84	@ 0x54
 80265e4:	af06      	add	r7, sp, #24
 80265e6:	6078      	str	r0, [r7, #4]
 80265e8:	6039      	str	r1, [r7, #0]
    int len = 0,
 80265ea:	2300      	movs	r3, #0
 80265ec:	637b      	str	r3, [r7, #52]	@ 0x34
        rc = MQTT_SUCCESS;
 80265ee:	2300      	movs	r3, #0
 80265f0:	633b      	str	r3, [r7, #48]	@ 0x30

    int packet_type = readPacket(c, timer);     /* read the socket, see what work is due */
 80265f2:	6839      	ldr	r1, [r7, #0]
 80265f4:	6878      	ldr	r0, [r7, #4]
 80265f6:	f7ff fe1b 	bl	8026230 <readPacket>
 80265fa:	62f8      	str	r0, [r7, #44]	@ 0x2c

    switch (packet_type)
 80265fc:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80265fe:	2b0d      	cmp	r3, #13
 8026600:	d81e      	bhi.n	8026640 <cycle+0x60>
 8026602:	a201      	add	r2, pc, #4	@ (adr r2, 8026608 <cycle+0x28>)
 8026604:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 8026608:	08026797 	.word	0x08026797
 802660c:	08026641 	.word	0x08026641
 8026610:	08026797 	.word	0x08026797
 8026614:	08026647 	.word	0x08026647
 8026618:	08026797 	.word	0x08026797
 802661c:	08026713 	.word	0x08026713
 8026620:	08026713 	.word	0x08026713
 8026624:	08026797 	.word	0x08026797
 8026628:	08026641 	.word	0x08026641
 802662c:	08026797 	.word	0x08026797
 8026630:	08026641 	.word	0x08026641
 8026634:	08026797 	.word	0x08026797
 8026638:	08026641 	.word	0x08026641
 802663c:	0802678f 	.word	0x0802678f
    {
        default:
            /* no more data to read, unrecoverable. Or read packet fails due to unexpected network error */
            rc = packet_type;
 8026640:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8026642:	633b      	str	r3, [r7, #48]	@ 0x30
            goto exit;
 8026644:	e0b9      	b.n	80267ba <cycle+0x1da>
        case PUBLISH:
        {
            MQTTString topicName;
            MQTTMessage msg;
            int intQoS;
            msg.payloadlen = 0; /* this is a size_t, but deserialize publish sets this as int */
 8026646:	2300      	movs	r3, #0
 8026648:	61fb      	str	r3, [r7, #28]
            if (MQTTDeserialize_publish(&msg.dup, &intQoS, &msg.retained, &msg.id, &topicName,
 802664a:	687b      	ldr	r3, [r7, #4]
 802664c:	695b      	ldr	r3, [r3, #20]
               (unsigned char**)&msg.payload, (int*)&msg.payloadlen, c->readbuf, c->readbuf_size) != 1)
 802664e:	687a      	ldr	r2, [r7, #4]
 8026650:	68d2      	ldr	r2, [r2, #12]
            if (MQTTDeserialize_publish(&msg.dup, &intQoS, &msg.retained, &msg.id, &topicName,
 8026652:	4616      	mov	r6, r2
 8026654:	f107 0210 	add.w	r2, r7, #16
 8026658:	1d15      	adds	r5, r2, #4
 802665a:	f107 0210 	add.w	r2, r7, #16
 802665e:	1c54      	adds	r4, r2, #1
 8026660:	f107 010c 	add.w	r1, r7, #12
 8026664:	f107 0210 	add.w	r2, r7, #16
 8026668:	1c90      	adds	r0, r2, #2
 802666a:	9604      	str	r6, [sp, #16]
 802666c:	9303      	str	r3, [sp, #12]
 802666e:	f107 0310 	add.w	r3, r7, #16
 8026672:	330c      	adds	r3, #12
 8026674:	9302      	str	r3, [sp, #8]
 8026676:	f107 0310 	add.w	r3, r7, #16
 802667a:	3308      	adds	r3, #8
 802667c:	9301      	str	r3, [sp, #4]
 802667e:	f107 0320 	add.w	r3, r7, #32
 8026682:	9300      	str	r3, [sp, #0]
 8026684:	462b      	mov	r3, r5
 8026686:	4622      	mov	r2, r4
 8026688:	f000 fea0 	bl	80273cc <MQTTDeserialize_publish>
 802668c:	4603      	mov	r3, r0
 802668e:	2b01      	cmp	r3, #1
 8026690:	f040 8090 	bne.w	80267b4 <cycle+0x1d4>
                goto exit;
            msg.qos = (enum QoS)intQoS;
 8026694:	68fb      	ldr	r3, [r7, #12]
 8026696:	b2db      	uxtb	r3, r3
 8026698:	743b      	strb	r3, [r7, #16]
            deliverMessage(c, &topicName, &msg);
 802669a:	f107 0210 	add.w	r2, r7, #16
 802669e:	f107 0320 	add.w	r3, r7, #32
 80266a2:	4619      	mov	r1, r3
 80266a4:	6878      	ldr	r0, [r7, #4]
 80266a6:	f7ff feb0 	bl	802640a <deliverMessage>
            if (msg.qos != QOS0)
 80266aa:	7c3b      	ldrb	r3, [r7, #16]
 80266ac:	2b00      	cmp	r3, #0
 80266ae:	d074      	beq.n	802679a <cycle+0x1ba>
            {
                if (msg.qos == QOS1)
 80266b0:	7c3b      	ldrb	r3, [r7, #16]
 80266b2:	2b01      	cmp	r3, #1
 80266b4:	d10c      	bne.n	80266d0 <cycle+0xf0>
                    len = MQTTSerialize_ack(c->buf, c->buf_size, PUBACK, 0, msg.id);
 80266b6:	687b      	ldr	r3, [r7, #4]
 80266b8:	6918      	ldr	r0, [r3, #16]
 80266ba:	687b      	ldr	r3, [r7, #4]
 80266bc:	689b      	ldr	r3, [r3, #8]
 80266be:	4619      	mov	r1, r3
 80266c0:	8abb      	ldrh	r3, [r7, #20]
 80266c2:	9300      	str	r3, [sp, #0]
 80266c4:	2300      	movs	r3, #0
 80266c6:	2204      	movs	r2, #4
 80266c8:	f001 f9d9 	bl	8027a7e <MQTTSerialize_ack>
 80266cc:	6378      	str	r0, [r7, #52]	@ 0x34
 80266ce:	e00e      	b.n	80266ee <cycle+0x10e>
                else if (msg.qos == QOS2)
 80266d0:	7c3b      	ldrb	r3, [r7, #16]
 80266d2:	2b02      	cmp	r3, #2
 80266d4:	d10b      	bne.n	80266ee <cycle+0x10e>
                    len = MQTTSerialize_ack(c->buf, c->buf_size, PUBREC, 0, msg.id);
 80266d6:	687b      	ldr	r3, [r7, #4]
 80266d8:	6918      	ldr	r0, [r3, #16]
 80266da:	687b      	ldr	r3, [r7, #4]
 80266dc:	689b      	ldr	r3, [r3, #8]
 80266de:	4619      	mov	r1, r3
 80266e0:	8abb      	ldrh	r3, [r7, #20]
 80266e2:	9300      	str	r3, [sp, #0]
 80266e4:	2300      	movs	r3, #0
 80266e6:	2205      	movs	r2, #5
 80266e8:	f001 f9c9 	bl	8027a7e <MQTTSerialize_ack>
 80266ec:	6378      	str	r0, [r7, #52]	@ 0x34
                if (len <= 0)
 80266ee:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 80266f0:	2b00      	cmp	r3, #0
 80266f2:	dc03      	bgt.n	80266fc <cycle+0x11c>
                    rc = FAILURE;
 80266f4:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80266f8:	633b      	str	r3, [r7, #48]	@ 0x30
 80266fa:	e005      	b.n	8026708 <cycle+0x128>
                else
                    rc = sendPacket(c, len, timer);
 80266fc:	683a      	ldr	r2, [r7, #0]
 80266fe:	6b79      	ldr	r1, [r7, #52]	@ 0x34
 8026700:	6878      	ldr	r0, [r7, #4]
 8026702:	f7ff fcb6 	bl	8026072 <sendPacket>
 8026706:	6338      	str	r0, [r7, #48]	@ 0x30
                if (rc == FAILURE)
 8026708:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 802670a:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 802670e:	d144      	bne.n	802679a <cycle+0x1ba>
                    goto exit; // there was a problem
 8026710:	e053      	b.n	80267ba <cycle+0x1da>
        case PUBREC:
        case PUBREL:
        {
            unsigned short mypacketid;
            unsigned char dup, type;
            if (MQTTDeserialize_ack(&type, &dup, &mypacketid, c->readbuf, c->readbuf_size) != 1)
 8026712:	687b      	ldr	r3, [r7, #4]
 8026714:	695c      	ldr	r4, [r3, #20]
 8026716:	687b      	ldr	r3, [r7, #4]
 8026718:	68db      	ldr	r3, [r3, #12]
 802671a:	f107 020a 	add.w	r2, r7, #10
 802671e:	f107 0109 	add.w	r1, r7, #9
 8026722:	f107 0008 	add.w	r0, r7, #8
 8026726:	9300      	str	r3, [sp, #0]
 8026728:	4623      	mov	r3, r4
 802672a:	f000 fec1 	bl	80274b0 <MQTTDeserialize_ack>
 802672e:	4603      	mov	r3, r0
 8026730:	2b01      	cmp	r3, #1
 8026732:	d003      	beq.n	802673c <cycle+0x15c>
                rc = FAILURE;
 8026734:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8026738:	633b      	str	r3, [r7, #48]	@ 0x30
 802673a:	e023      	b.n	8026784 <cycle+0x1a4>
            else if ((len = MQTTSerialize_ack(c->buf, c->buf_size,
 802673c:	687b      	ldr	r3, [r7, #4]
 802673e:	6918      	ldr	r0, [r3, #16]
 8026740:	687b      	ldr	r3, [r7, #4]
 8026742:	689b      	ldr	r3, [r3, #8]
 8026744:	4619      	mov	r1, r3
 8026746:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8026748:	2b05      	cmp	r3, #5
 802674a:	d101      	bne.n	8026750 <cycle+0x170>
 802674c:	2206      	movs	r2, #6
 802674e:	e000      	b.n	8026752 <cycle+0x172>
 8026750:	2207      	movs	r2, #7
 8026752:	897b      	ldrh	r3, [r7, #10]
 8026754:	9300      	str	r3, [sp, #0]
 8026756:	2300      	movs	r3, #0
 8026758:	f001 f991 	bl	8027a7e <MQTTSerialize_ack>
 802675c:	6378      	str	r0, [r7, #52]	@ 0x34
 802675e:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8026760:	2b00      	cmp	r3, #0
 8026762:	dc03      	bgt.n	802676c <cycle+0x18c>
                (packet_type == PUBREC) ? PUBREL : PUBCOMP, 0, mypacketid)) <= 0)
                rc = FAILURE;
 8026764:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8026768:	633b      	str	r3, [r7, #48]	@ 0x30
 802676a:	e00b      	b.n	8026784 <cycle+0x1a4>
            else if ((rc = sendPacket(c, len, timer)) != MQTT_SUCCESS) // send the PUBREL packet
 802676c:	683a      	ldr	r2, [r7, #0]
 802676e:	6b79      	ldr	r1, [r7, #52]	@ 0x34
 8026770:	6878      	ldr	r0, [r7, #4]
 8026772:	f7ff fc7e 	bl	8026072 <sendPacket>
 8026776:	6338      	str	r0, [r7, #48]	@ 0x30
 8026778:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 802677a:	2b00      	cmp	r3, #0
 802677c:	d002      	beq.n	8026784 <cycle+0x1a4>
                rc = FAILURE; // there was a problem
 802677e:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8026782:	633b      	str	r3, [r7, #48]	@ 0x30
            if (rc == FAILURE)
 8026784:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8026786:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 802678a:	d108      	bne.n	802679e <cycle+0x1be>
                goto exit; // there was a problem
 802678c:	e015      	b.n	80267ba <cycle+0x1da>
        }

        case PUBCOMP:
            break;
        case PINGRESP:
            c->ping_outstanding = 0;
 802678e:	687b      	ldr	r3, [r7, #4]
 8026790:	2200      	movs	r2, #0
 8026792:	771a      	strb	r2, [r3, #28]
            break;
 8026794:	e004      	b.n	80267a0 <cycle+0x1c0>
            break;
 8026796:	bf00      	nop
 8026798:	e002      	b.n	80267a0 <cycle+0x1c0>
            break;
 802679a:	bf00      	nop
 802679c:	e000      	b.n	80267a0 <cycle+0x1c0>
            break;
 802679e:	bf00      	nop
    }

    if (keepalive(c) != MQTT_SUCCESS) {
 80267a0:	6878      	ldr	r0, [r7, #4]
 80267a2:	f7ff fe9a 	bl	80264da <keepalive>
 80267a6:	4603      	mov	r3, r0
 80267a8:	2b00      	cmp	r3, #0
 80267aa:	d005      	beq.n	80267b8 <cycle+0x1d8>
        //check only keepalive FAILURE status so that previous FAILURE status can be considered as FAULT
        rc = FAILURE;
 80267ac:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80267b0:	633b      	str	r3, [r7, #48]	@ 0x30
 80267b2:	e002      	b.n	80267ba <cycle+0x1da>
                goto exit;
 80267b4:	bf00      	nop
 80267b6:	e000      	b.n	80267ba <cycle+0x1da>
    }

exit:
 80267b8:	bf00      	nop
    if (rc == MQTT_SUCCESS)
 80267ba:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80267bc:	2b00      	cmp	r3, #0
 80267be:	d102      	bne.n	80267c6 <cycle+0x1e6>
        rc = packet_type;
 80267c0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80267c2:	633b      	str	r3, [r7, #48]	@ 0x30
 80267c4:	e006      	b.n	80267d4 <cycle+0x1f4>
    else if (c->isconnected)
 80267c6:	687b      	ldr	r3, [r7, #4]
 80267c8:	6a1b      	ldr	r3, [r3, #32]
 80267ca:	2b00      	cmp	r3, #0
 80267cc:	d002      	beq.n	80267d4 <cycle+0x1f4>
        MQTTCloseSession(c);
 80267ce:	6878      	ldr	r0, [r7, #4]
 80267d0:	f7ff fef0 	bl	80265b4 <MQTTCloseSession>
    return rc;
 80267d4:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
}
 80267d6:	4618      	mov	r0, r3
 80267d8:	373c      	adds	r7, #60	@ 0x3c
 80267da:	46bd      	mov	sp, r7
 80267dc:	bdf0      	pop	{r4, r5, r6, r7, pc}
 80267de:	bf00      	nop

080267e0 <MQTTYield>:


int MQTTYield(MQTTClient* c, int timeout_ms)
{
 80267e0:	b580      	push	{r7, lr}
 80267e2:	b086      	sub	sp, #24
 80267e4:	af00      	add	r7, sp, #0
 80267e6:	6078      	str	r0, [r7, #4]
 80267e8:	6039      	str	r1, [r7, #0]
    int rc = MQTT_SUCCESS;
 80267ea:	2300      	movs	r3, #0
 80267ec:	617b      	str	r3, [r7, #20]
    Timer timer;

    TimerInit(&timer);
 80267ee:	f107 030c 	add.w	r3, r7, #12
 80267f2:	4618      	mov	r0, r3
 80267f4:	f000 fb3e 	bl	8026e74 <TimerInit>
    TimerCountdownMS(&timer, timeout_ms);
 80267f8:	683a      	ldr	r2, [r7, #0]
 80267fa:	f107 030c 	add.w	r3, r7, #12
 80267fe:	4611      	mov	r1, r2
 8026800:	4618      	mov	r0, r3
 8026802:	f000 faf5 	bl	8026df0 <TimerCountdownMS>

	  do
    {
        if (cycle(c, &timer) < 0)
 8026806:	f107 030c 	add.w	r3, r7, #12
 802680a:	4619      	mov	r1, r3
 802680c:	6878      	ldr	r0, [r7, #4]
 802680e:	f7ff fee7 	bl	80265e0 <cycle>
 8026812:	4603      	mov	r3, r0
 8026814:	2b00      	cmp	r3, #0
 8026816:	da03      	bge.n	8026820 <MQTTYield+0x40>
        {
            rc = FAILURE;
 8026818:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 802681c:	617b      	str	r3, [r7, #20]
            break;
 802681e:	e007      	b.n	8026830 <MQTTYield+0x50>
        }
  	} while (!TimerIsExpired(&timer));
 8026820:	f107 030c 	add.w	r3, r7, #12
 8026824:	4618      	mov	r0, r3
 8026826:	f000 facd 	bl	8026dc4 <TimerIsExpired>
 802682a:	4603      	mov	r3, r0
 802682c:	2b00      	cmp	r3, #0
 802682e:	d0ea      	beq.n	8026806 <MQTTYield+0x26>

    return rc;
 8026830:	697b      	ldr	r3, [r7, #20]
}
 8026832:	4618      	mov	r0, r3
 8026834:	3718      	adds	r7, #24
 8026836:	46bd      	mov	sp, r7
 8026838:	bd80      	pop	{r7, pc}

0802683a <waitfor>:
}
#endif


int waitfor(MQTTClient* c, int packet_type, Timer* timer)
{
 802683a:	b580      	push	{r7, lr}
 802683c:	b086      	sub	sp, #24
 802683e:	af00      	add	r7, sp, #0
 8026840:	60f8      	str	r0, [r7, #12]
 8026842:	60b9      	str	r1, [r7, #8]
 8026844:	607a      	str	r2, [r7, #4]
    int rc = FAILURE;
 8026846:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 802684a:	617b      	str	r3, [r7, #20]

    do
    {
        if (TimerIsExpired(timer))
 802684c:	6878      	ldr	r0, [r7, #4]
 802684e:	f000 fab9 	bl	8026dc4 <TimerIsExpired>
 8026852:	4603      	mov	r3, r0
 8026854:	2b00      	cmp	r3, #0
 8026856:	d10c      	bne.n	8026872 <waitfor+0x38>
            break; // we timed out
        rc = cycle(c, timer);
 8026858:	6879      	ldr	r1, [r7, #4]
 802685a:	68f8      	ldr	r0, [r7, #12]
 802685c:	f7ff fec0 	bl	80265e0 <cycle>
 8026860:	6178      	str	r0, [r7, #20]
    }
    while (rc != packet_type && rc >= 0);
 8026862:	697a      	ldr	r2, [r7, #20]
 8026864:	68bb      	ldr	r3, [r7, #8]
 8026866:	429a      	cmp	r2, r3
 8026868:	d004      	beq.n	8026874 <waitfor+0x3a>
 802686a:	697b      	ldr	r3, [r7, #20]
 802686c:	2b00      	cmp	r3, #0
 802686e:	daed      	bge.n	802684c <waitfor+0x12>
 8026870:	e000      	b.n	8026874 <waitfor+0x3a>
            break; // we timed out
 8026872:	bf00      	nop

    return rc;
 8026874:	697b      	ldr	r3, [r7, #20]
}
 8026876:	4618      	mov	r0, r3
 8026878:	3718      	adds	r7, #24
 802687a:	46bd      	mov	sp, r7
 802687c:	bd80      	pop	{r7, pc}
	...

08026880 <MQTTConnectWithResults>:




int MQTTConnectWithResults(MQTTClient* c, MQTTPacket_connectData* options, MQTTConnackData* data)
{
 8026880:	b580      	push	{r7, lr}
 8026882:	b09e      	sub	sp, #120	@ 0x78
 8026884:	af00      	add	r7, sp, #0
 8026886:	60f8      	str	r0, [r7, #12]
 8026888:	60b9      	str	r1, [r7, #8]
 802688a:	607a      	str	r2, [r7, #4]
    Timer connect_timer;
    int rc = FAILURE;
 802688c:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8026890:	677b      	str	r3, [r7, #116]	@ 0x74
    MQTTPacket_connectData default_options = MQTTPacket_connectData_initializer;
 8026892:	4a49      	ldr	r2, [pc, #292]	@ (80269b8 <MQTTConnectWithResults+0x138>)
 8026894:	f107 0310 	add.w	r3, r7, #16
 8026898:	4611      	mov	r1, r2
 802689a:	2258      	movs	r2, #88	@ 0x58
 802689c:	4618      	mov	r0, r3
 802689e:	f003 f8be 	bl	8029a1e <memcpy>
    int len = 0;
 80268a2:	2300      	movs	r3, #0
 80268a4:	673b      	str	r3, [r7, #112]	@ 0x70

#if defined(MQTT_TASK)
	  MutexLock(&c->mutex);
#endif
//	  osMutexAcquire(mqttMutex, osWaitForever);
	  osMutexAcquire(c->mutex, osWaitForever);
 80268a6:	68fb      	ldr	r3, [r7, #12]
 80268a8:	6e9b      	ldr	r3, [r3, #104]	@ 0x68
 80268aa:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 80268ae:	4618      	mov	r0, r3
 80268b0:	f7e9 fea8 	bl	8010604 <osMutexAcquire>
	  if (c->isconnected) /* don't send connect packet again if we are already connected */
 80268b4:	68fb      	ldr	r3, [r7, #12]
 80268b6:	6a1b      	ldr	r3, [r3, #32]
 80268b8:	2b00      	cmp	r3, #0
 80268ba:	d164      	bne.n	8026986 <MQTTConnectWithResults+0x106>
		  goto exit;

    TimerInit(&connect_timer);
 80268bc:	f107 0368 	add.w	r3, r7, #104	@ 0x68
 80268c0:	4618      	mov	r0, r3
 80268c2:	f000 fad7 	bl	8026e74 <TimerInit>
    TimerCountdownMS(&connect_timer, c->command_timeout_ms);
 80268c6:	68fb      	ldr	r3, [r7, #12]
 80268c8:	685a      	ldr	r2, [r3, #4]
 80268ca:	f107 0368 	add.w	r3, r7, #104	@ 0x68
 80268ce:	4611      	mov	r1, r2
 80268d0:	4618      	mov	r0, r3
 80268d2:	f000 fa8d 	bl	8026df0 <TimerCountdownMS>

    if (options == 0)
 80268d6:	68bb      	ldr	r3, [r7, #8]
 80268d8:	2b00      	cmp	r3, #0
 80268da:	d102      	bne.n	80268e2 <MQTTConnectWithResults+0x62>
        options = &default_options; /* set default options if none were supplied */
 80268dc:	f107 0310 	add.w	r3, r7, #16
 80268e0:	60bb      	str	r3, [r7, #8]

    c->keepAliveInterval = options->keepAliveInterval;
 80268e2:	68bb      	ldr	r3, [r7, #8]
 80268e4:	8b1b      	ldrh	r3, [r3, #24]
 80268e6:	461a      	mov	r2, r3
 80268e8:	68fb      	ldr	r3, [r7, #12]
 80268ea:	619a      	str	r2, [r3, #24]
    c->cleansession = options->cleansession;
 80268ec:	68bb      	ldr	r3, [r7, #8]
 80268ee:	7e9b      	ldrb	r3, [r3, #26]
 80268f0:	461a      	mov	r2, r3
 80268f2:	68fb      	ldr	r3, [r7, #12]
 80268f4:	625a      	str	r2, [r3, #36]	@ 0x24
    TimerCountdown(&c->last_received, c->keepAliveInterval);
 80268f6:	68fb      	ldr	r3, [r7, #12]
 80268f8:	f103 0260 	add.w	r2, r3, #96	@ 0x60
 80268fc:	68fb      	ldr	r3, [r7, #12]
 80268fe:	699b      	ldr	r3, [r3, #24]
 8026900:	4619      	mov	r1, r3
 8026902:	4610      	mov	r0, r2
 8026904:	f000 fa88 	bl	8026e18 <TimerCountdown>
    if ((len = MQTTSerialize_connect(c->buf, c->buf_size, options)) <= 0)
 8026908:	68fb      	ldr	r3, [r7, #12]
 802690a:	6918      	ldr	r0, [r3, #16]
 802690c:	68fb      	ldr	r3, [r7, #12]
 802690e:	689b      	ldr	r3, [r3, #8]
 8026910:	68ba      	ldr	r2, [r7, #8]
 8026912:	4619      	mov	r1, r3
 8026914:	f000 fbd2 	bl	80270bc <MQTTSerialize_connect>
 8026918:	6738      	str	r0, [r7, #112]	@ 0x70
 802691a:	6f3b      	ldr	r3, [r7, #112]	@ 0x70
 802691c:	2b00      	cmp	r3, #0
 802691e:	dd34      	ble.n	802698a <MQTTConnectWithResults+0x10a>
        goto exit;
    if ((rc = sendPacket(c, len, &connect_timer)) != MQTT_SUCCESS)  // send the connect packet
 8026920:	f107 0368 	add.w	r3, r7, #104	@ 0x68
 8026924:	461a      	mov	r2, r3
 8026926:	6f39      	ldr	r1, [r7, #112]	@ 0x70
 8026928:	68f8      	ldr	r0, [r7, #12]
 802692a:	f7ff fba2 	bl	8026072 <sendPacket>
 802692e:	6778      	str	r0, [r7, #116]	@ 0x74
 8026930:	6f7b      	ldr	r3, [r7, #116]	@ 0x74
 8026932:	2b00      	cmp	r3, #0
 8026934:	d12b      	bne.n	802698e <MQTTConnectWithResults+0x10e>
        goto exit; // there was a problem

    // this will be a blocking call, wait for the connack
    if (waitfor(c, CONNACK, &connect_timer) == CONNACK)
 8026936:	f107 0368 	add.w	r3, r7, #104	@ 0x68
 802693a:	461a      	mov	r2, r3
 802693c:	2102      	movs	r1, #2
 802693e:	68f8      	ldr	r0, [r7, #12]
 8026940:	f7ff ff7b 	bl	802683a <waitfor>
 8026944:	4603      	mov	r3, r0
 8026946:	2b02      	cmp	r3, #2
 8026948:	d119      	bne.n	802697e <MQTTConnectWithResults+0xfe>
    {
        data->rc = 0;
 802694a:	687b      	ldr	r3, [r7, #4]
 802694c:	2200      	movs	r2, #0
 802694e:	701a      	strb	r2, [r3, #0]
        data->sessionPresent = 0;
 8026950:	687b      	ldr	r3, [r7, #4]
 8026952:	2200      	movs	r2, #0
 8026954:	705a      	strb	r2, [r3, #1]
        if (MQTTDeserialize_connack(&data->sessionPresent, &data->rc, c->readbuf, c->readbuf_size) == 1)
 8026956:	687b      	ldr	r3, [r7, #4]
 8026958:	1c58      	adds	r0, r3, #1
 802695a:	6879      	ldr	r1, [r7, #4]
 802695c:	68fb      	ldr	r3, [r7, #12]
 802695e:	695a      	ldr	r2, [r3, #20]
 8026960:	68fb      	ldr	r3, [r7, #12]
 8026962:	68db      	ldr	r3, [r3, #12]
 8026964:	f000 fc96 	bl	8027294 <MQTTDeserialize_connack>
 8026968:	4603      	mov	r3, r0
 802696a:	2b01      	cmp	r3, #1
 802696c:	d103      	bne.n	8026976 <MQTTConnectWithResults+0xf6>
            rc = data->rc;
 802696e:	687b      	ldr	r3, [r7, #4]
 8026970:	781b      	ldrb	r3, [r3, #0]
 8026972:	677b      	str	r3, [r7, #116]	@ 0x74
 8026974:	e00c      	b.n	8026990 <MQTTConnectWithResults+0x110>
//        	rc = MQTT_SUCCESS;
        else
            rc = FAILURE;
 8026976:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 802697a:	677b      	str	r3, [r7, #116]	@ 0x74
 802697c:	e008      	b.n	8026990 <MQTTConnectWithResults+0x110>
    }
    else
        rc = FAILURE;
 802697e:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8026982:	677b      	str	r3, [r7, #116]	@ 0x74
 8026984:	e004      	b.n	8026990 <MQTTConnectWithResults+0x110>
		  goto exit;
 8026986:	bf00      	nop
 8026988:	e002      	b.n	8026990 <MQTTConnectWithResults+0x110>
        goto exit;
 802698a:	bf00      	nop
 802698c:	e000      	b.n	8026990 <MQTTConnectWithResults+0x110>
        goto exit; // there was a problem
 802698e:	bf00      	nop

exit:
    if (rc == MQTT_SUCCESS)
 8026990:	6f7b      	ldr	r3, [r7, #116]	@ 0x74
 8026992:	2b00      	cmp	r3, #0
 8026994:	d105      	bne.n	80269a2 <MQTTConnectWithResults+0x122>
    {
        c->isconnected = 1;
 8026996:	68fb      	ldr	r3, [r7, #12]
 8026998:	2201      	movs	r2, #1
 802699a:	621a      	str	r2, [r3, #32]
        c->ping_outstanding = 0;
 802699c:	68fb      	ldr	r3, [r7, #12]
 802699e:	2200      	movs	r2, #0
 80269a0:	771a      	strb	r2, [r3, #28]

#if defined(MQTT_TASK)
	  MutexUnlock(&c->mutex);
#endif
//	osMutexRelease(mqttMutex);
	osMutexRelease(c->mutex);
 80269a2:	68fb      	ldr	r3, [r7, #12]
 80269a4:	6e9b      	ldr	r3, [r3, #104]	@ 0x68
 80269a6:	4618      	mov	r0, r3
 80269a8:	f7e9 fe77 	bl	801069a <osMutexRelease>
    return rc;
 80269ac:	6f7b      	ldr	r3, [r7, #116]	@ 0x74
}
 80269ae:	4618      	mov	r0, r3
 80269b0:	3778      	adds	r7, #120	@ 0x78
 80269b2:	46bd      	mov	sp, r7
 80269b4:	bd80      	pop	{r7, pc}
 80269b6:	bf00      	nop
 80269b8:	080304bc 	.word	0x080304bc

080269bc <MQTTConnect>:


int MQTTConnect(MQTTClient* c, MQTTPacket_connectData* options)
{
 80269bc:	b580      	push	{r7, lr}
 80269be:	b084      	sub	sp, #16
 80269c0:	af00      	add	r7, sp, #0
 80269c2:	6078      	str	r0, [r7, #4]
 80269c4:	6039      	str	r1, [r7, #0]
    MQTTConnackData data;
    return MQTTConnectWithResults(c, options, &data);
 80269c6:	f107 030c 	add.w	r3, r7, #12
 80269ca:	461a      	mov	r2, r3
 80269cc:	6839      	ldr	r1, [r7, #0]
 80269ce:	6878      	ldr	r0, [r7, #4]
 80269d0:	f7ff ff56 	bl	8026880 <MQTTConnectWithResults>
 80269d4:	4603      	mov	r3, r0
}
 80269d6:	4618      	mov	r0, r3
 80269d8:	3710      	adds	r7, #16
 80269da:	46bd      	mov	sp, r7
 80269dc:	bd80      	pop	{r7, pc}

080269de <MQTTSetMessageHandler>:


int MQTTSetMessageHandler(MQTTClient* c, const char* topicFilter, messageHandler messageHandler)
{
 80269de:	b580      	push	{r7, lr}
 80269e0:	b086      	sub	sp, #24
 80269e2:	af00      	add	r7, sp, #0
 80269e4:	60f8      	str	r0, [r7, #12]
 80269e6:	60b9      	str	r1, [r7, #8]
 80269e8:	607a      	str	r2, [r7, #4]
    int rc = FAILURE;
 80269ea:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80269ee:	617b      	str	r3, [r7, #20]
    int i = -1;
 80269f0:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80269f4:	613b      	str	r3, [r7, #16]

    /* first check for an existing matching slot */
    for (i = 0; i < MAX_MESSAGE_HANDLERS; ++i)
 80269f6:	2300      	movs	r3, #0
 80269f8:	613b      	str	r3, [r7, #16]
 80269fa:	e028      	b.n	8026a4e <MQTTSetMessageHandler+0x70>
    {
        if (c->messageHandlers[i].topicFilter != NULL && strcmp(c->messageHandlers[i].topicFilter, topicFilter) == 0)
 80269fc:	68fb      	ldr	r3, [r7, #12]
 80269fe:	693a      	ldr	r2, [r7, #16]
 8026a00:	3205      	adds	r2, #5
 8026a02:	f853 3032 	ldr.w	r3, [r3, r2, lsl #3]
 8026a06:	2b00      	cmp	r3, #0
 8026a08:	d01e      	beq.n	8026a48 <MQTTSetMessageHandler+0x6a>
 8026a0a:	68fb      	ldr	r3, [r7, #12]
 8026a0c:	693a      	ldr	r2, [r7, #16]
 8026a0e:	3205      	adds	r2, #5
 8026a10:	f853 3032 	ldr.w	r3, [r3, r2, lsl #3]
 8026a14:	68b9      	ldr	r1, [r7, #8]
 8026a16:	4618      	mov	r0, r3
 8026a18:	f7d9 fc62 	bl	80002e0 <strcmp>
 8026a1c:	4603      	mov	r3, r0
 8026a1e:	2b00      	cmp	r3, #0
 8026a20:	d112      	bne.n	8026a48 <MQTTSetMessageHandler+0x6a>
        {
            if (messageHandler == NULL) /* remove existing */
 8026a22:	687b      	ldr	r3, [r7, #4]
 8026a24:	2b00      	cmp	r3, #0
 8026a26:	d10c      	bne.n	8026a42 <MQTTSetMessageHandler+0x64>
            {
                c->messageHandlers[i].topicFilter = NULL;
 8026a28:	68fb      	ldr	r3, [r7, #12]
 8026a2a:	693a      	ldr	r2, [r7, #16]
 8026a2c:	3205      	adds	r2, #5
 8026a2e:	2100      	movs	r1, #0
 8026a30:	f843 1032 	str.w	r1, [r3, r2, lsl #3]
                c->messageHandlers[i].fp = NULL;
 8026a34:	68fa      	ldr	r2, [r7, #12]
 8026a36:	693b      	ldr	r3, [r7, #16]
 8026a38:	3305      	adds	r3, #5
 8026a3a:	00db      	lsls	r3, r3, #3
 8026a3c:	4413      	add	r3, r2
 8026a3e:	2200      	movs	r2, #0
 8026a40:	605a      	str	r2, [r3, #4]
            }
            rc = MQTT_SUCCESS; /* return i when adding new subscription */
 8026a42:	2300      	movs	r3, #0
 8026a44:	617b      	str	r3, [r7, #20]
            break;
 8026a46:	e005      	b.n	8026a54 <MQTTSetMessageHandler+0x76>
    for (i = 0; i < MAX_MESSAGE_HANDLERS; ++i)
 8026a48:	693b      	ldr	r3, [r7, #16]
 8026a4a:	3301      	adds	r3, #1
 8026a4c:	613b      	str	r3, [r7, #16]
 8026a4e:	693b      	ldr	r3, [r7, #16]
 8026a50:	2b04      	cmp	r3, #4
 8026a52:	ddd3      	ble.n	80269fc <MQTTSetMessageHandler+0x1e>
        }
    }
    /* if no existing, look for empty slot (unless we are removing) */
    if (messageHandler != NULL) {
 8026a54:	687b      	ldr	r3, [r7, #4]
 8026a56:	2b00      	cmp	r3, #0
 8026a58:	d026      	beq.n	8026aa8 <MQTTSetMessageHandler+0xca>
        if (rc == FAILURE)
 8026a5a:	697b      	ldr	r3, [r7, #20]
 8026a5c:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8026a60:	d112      	bne.n	8026a88 <MQTTSetMessageHandler+0xaa>
        {
            for (i = 0; i < MAX_MESSAGE_HANDLERS; ++i)
 8026a62:	2300      	movs	r3, #0
 8026a64:	613b      	str	r3, [r7, #16]
 8026a66:	e00c      	b.n	8026a82 <MQTTSetMessageHandler+0xa4>
            {
                if (c->messageHandlers[i].topicFilter == NULL)
 8026a68:	68fb      	ldr	r3, [r7, #12]
 8026a6a:	693a      	ldr	r2, [r7, #16]
 8026a6c:	3205      	adds	r2, #5
 8026a6e:	f853 3032 	ldr.w	r3, [r3, r2, lsl #3]
 8026a72:	2b00      	cmp	r3, #0
 8026a74:	d102      	bne.n	8026a7c <MQTTSetMessageHandler+0x9e>
                {
                    rc = MQTT_SUCCESS;
 8026a76:	2300      	movs	r3, #0
 8026a78:	617b      	str	r3, [r7, #20]
                    break;
 8026a7a:	e005      	b.n	8026a88 <MQTTSetMessageHandler+0xaa>
            for (i = 0; i < MAX_MESSAGE_HANDLERS; ++i)
 8026a7c:	693b      	ldr	r3, [r7, #16]
 8026a7e:	3301      	adds	r3, #1
 8026a80:	613b      	str	r3, [r7, #16]
 8026a82:	693b      	ldr	r3, [r7, #16]
 8026a84:	2b04      	cmp	r3, #4
 8026a86:	ddef      	ble.n	8026a68 <MQTTSetMessageHandler+0x8a>
                }
            }
        }
        if (i < MAX_MESSAGE_HANDLERS)
 8026a88:	693b      	ldr	r3, [r7, #16]
 8026a8a:	2b04      	cmp	r3, #4
 8026a8c:	dc0c      	bgt.n	8026aa8 <MQTTSetMessageHandler+0xca>
        {
            c->messageHandlers[i].topicFilter = topicFilter;
 8026a8e:	68fb      	ldr	r3, [r7, #12]
 8026a90:	693a      	ldr	r2, [r7, #16]
 8026a92:	3205      	adds	r2, #5
 8026a94:	68b9      	ldr	r1, [r7, #8]
 8026a96:	f843 1032 	str.w	r1, [r3, r2, lsl #3]
            c->messageHandlers[i].fp = messageHandler;
 8026a9a:	68fa      	ldr	r2, [r7, #12]
 8026a9c:	693b      	ldr	r3, [r7, #16]
 8026a9e:	3305      	adds	r3, #5
 8026aa0:	00db      	lsls	r3, r3, #3
 8026aa2:	4413      	add	r3, r2
 8026aa4:	687a      	ldr	r2, [r7, #4]
 8026aa6:	605a      	str	r2, [r3, #4]
        }
    }
    return rc;
 8026aa8:	697b      	ldr	r3, [r7, #20]
}
 8026aaa:	4618      	mov	r0, r3
 8026aac:	3718      	adds	r7, #24
 8026aae:	46bd      	mov	sp, r7
 8026ab0:	bd80      	pop	{r7, pc}

08026ab2 <MQTTSubscribeWithResults>:


int MQTTSubscribeWithResults(MQTTClient* c, const char* topicFilter, enum QoS qos,
       messageHandler messageHandler, MQTTSubackData* data)
{
 8026ab2:	b5b0      	push	{r4, r5, r7, lr}
 8026ab4:	b094      	sub	sp, #80	@ 0x50
 8026ab6:	af04      	add	r7, sp, #16
 8026ab8:	60f8      	str	r0, [r7, #12]
 8026aba:	60b9      	str	r1, [r7, #8]
 8026abc:	603b      	str	r3, [r7, #0]
 8026abe:	4613      	mov	r3, r2
 8026ac0:	71fb      	strb	r3, [r7, #7]
    int rc = FAILURE;
 8026ac2:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8026ac6:	63fb      	str	r3, [r7, #60]	@ 0x3c
    Timer timer;
    int len = 0;
 8026ac8:	2300      	movs	r3, #0
 8026aca:	63bb      	str	r3, [r7, #56]	@ 0x38
    MQTTString topic = MQTTString_initializer;
 8026acc:	2300      	movs	r3, #0
 8026ace:	627b      	str	r3, [r7, #36]	@ 0x24
 8026ad0:	2300      	movs	r3, #0
 8026ad2:	62bb      	str	r3, [r7, #40]	@ 0x28
 8026ad4:	2300      	movs	r3, #0
 8026ad6:	62fb      	str	r3, [r7, #44]	@ 0x2c
    topic.cstring = (char *)topicFilter;
 8026ad8:	68bb      	ldr	r3, [r7, #8]
 8026ada:	627b      	str	r3, [r7, #36]	@ 0x24

#if defined(MQTT_TASK)
	  MutexLock(&c->mutex);
#endif
//	  osMutexAcquire(mqttMutex, osWaitForever);
	  osMutexAcquire(c->mutex, osWaitForever);
 8026adc:	68fb      	ldr	r3, [r7, #12]
 8026ade:	6e9b      	ldr	r3, [r3, #104]	@ 0x68
 8026ae0:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 8026ae4:	4618      	mov	r0, r3
 8026ae6:	f7e9 fd8d 	bl	8010604 <osMutexAcquire>
	  if (!c->isconnected)
 8026aea:	68fb      	ldr	r3, [r7, #12]
 8026aec:	6a1b      	ldr	r3, [r3, #32]
 8026aee:	2b00      	cmp	r3, #0
 8026af0:	d069      	beq.n	8026bc6 <MQTTSubscribeWithResults+0x114>
		    goto exit;

    TimerInit(&timer);
 8026af2:	f107 0330 	add.w	r3, r7, #48	@ 0x30
 8026af6:	4618      	mov	r0, r3
 8026af8:	f000 f9bc 	bl	8026e74 <TimerInit>
    TimerCountdownMS(&timer, c->command_timeout_ms);
 8026afc:	68fb      	ldr	r3, [r7, #12]
 8026afe:	685a      	ldr	r2, [r3, #4]
 8026b00:	f107 0330 	add.w	r3, r7, #48	@ 0x30
 8026b04:	4611      	mov	r1, r2
 8026b06:	4618      	mov	r0, r3
 8026b08:	f000 f972 	bl	8026df0 <TimerCountdownMS>
    int _qos[1] = {(int)qos};
 8026b0c:	79fb      	ldrb	r3, [r7, #7]
 8026b0e:	623b      	str	r3, [r7, #32]
    len = MQTTSerialize_subscribe(c->buf, c->buf_size, 0, getNextPacketId(c), 1, &topic, _qos);
 8026b10:	68fb      	ldr	r3, [r7, #12]
 8026b12:	691c      	ldr	r4, [r3, #16]
 8026b14:	68fb      	ldr	r3, [r7, #12]
 8026b16:	689b      	ldr	r3, [r3, #8]
 8026b18:	461d      	mov	r5, r3
 8026b1a:	68f8      	ldr	r0, [r7, #12]
 8026b1c:	f7ff fa90 	bl	8026040 <getNextPacketId>
 8026b20:	4603      	mov	r3, r0
 8026b22:	b29a      	uxth	r2, r3
 8026b24:	f107 0320 	add.w	r3, r7, #32
 8026b28:	9302      	str	r3, [sp, #8]
 8026b2a:	f107 0324 	add.w	r3, r7, #36	@ 0x24
 8026b2e:	9301      	str	r3, [sp, #4]
 8026b30:	2301      	movs	r3, #1
 8026b32:	9300      	str	r3, [sp, #0]
 8026b34:	4613      	mov	r3, r2
 8026b36:	2200      	movs	r2, #0
 8026b38:	4629      	mov	r1, r5
 8026b3a:	4620      	mov	r0, r4
 8026b3c:	f001 f81b 	bl	8027b76 <MQTTSerialize_subscribe>
 8026b40:	63b8      	str	r0, [r7, #56]	@ 0x38
//    len = MQTTSerialize_subscribe(c->buf, c->buf_size, 0, getNextPacketId(c), 1, &topic, (int*)&qos);
    if (len <= 0)
 8026b42:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8026b44:	2b00      	cmp	r3, #0
 8026b46:	dd40      	ble.n	8026bca <MQTTSubscribeWithResults+0x118>
        goto exit;
    if ((rc = sendPacket(c, len, &timer)) != MQTT_SUCCESS) // send the subscribe packet
 8026b48:	f107 0330 	add.w	r3, r7, #48	@ 0x30
 8026b4c:	461a      	mov	r2, r3
 8026b4e:	6bb9      	ldr	r1, [r7, #56]	@ 0x38
 8026b50:	68f8      	ldr	r0, [r7, #12]
 8026b52:	f7ff fa8e 	bl	8026072 <sendPacket>
 8026b56:	63f8      	str	r0, [r7, #60]	@ 0x3c
 8026b58:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 8026b5a:	2b00      	cmp	r3, #0
 8026b5c:	d137      	bne.n	8026bce <MQTTSubscribeWithResults+0x11c>
        goto exit;             // there was a problem

    if (waitfor(c, SUBACK, &timer) == SUBACK)      // wait for suback
 8026b5e:	f107 0330 	add.w	r3, r7, #48	@ 0x30
 8026b62:	461a      	mov	r2, r3
 8026b64:	2109      	movs	r1, #9
 8026b66:	68f8      	ldr	r0, [r7, #12]
 8026b68:	f7ff fe67 	bl	802683a <waitfor>
 8026b6c:	4603      	mov	r3, r0
 8026b6e:	2b09      	cmp	r3, #9
 8026b70:	d125      	bne.n	8026bbe <MQTTSubscribeWithResults+0x10c>
    {
        int count = 0;
 8026b72:	2300      	movs	r3, #0
 8026b74:	61fb      	str	r3, [r7, #28]
        unsigned short mypacketid;
        data->grantedQoS = QOS0;
 8026b76:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 8026b78:	2200      	movs	r2, #0
 8026b7a:	701a      	strb	r2, [r3, #0]
        int _grantedQoS[1] = {(int)&data->grantedQoS};
 8026b7c:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 8026b7e:	617b      	str	r3, [r7, #20]
//        if (MQTTDeserialize_suback(&mypacketid, 1, &count, (int*)&data->grantedQoS, c->readbuf, c->readbuf_size) == 1)
        if (MQTTDeserialize_suback(&mypacketid, 1, &count, _grantedQoS, c->readbuf, c->readbuf_size) == 1)
 8026b80:	68fb      	ldr	r3, [r7, #12]
 8026b82:	695b      	ldr	r3, [r3, #20]
 8026b84:	68fa      	ldr	r2, [r7, #12]
 8026b86:	68d2      	ldr	r2, [r2, #12]
 8026b88:	4614      	mov	r4, r2
 8026b8a:	f107 0114 	add.w	r1, r7, #20
 8026b8e:	f107 021c 	add.w	r2, r7, #28
 8026b92:	f107 001a 	add.w	r0, r7, #26
 8026b96:	9401      	str	r4, [sp, #4]
 8026b98:	9300      	str	r3, [sp, #0]
 8026b9a:	460b      	mov	r3, r1
 8026b9c:	2101      	movs	r1, #1
 8026b9e:	f001 f866 	bl	8027c6e <MQTTDeserialize_suback>
 8026ba2:	4603      	mov	r3, r0
 8026ba4:	2b01      	cmp	r3, #1
 8026ba6:	d113      	bne.n	8026bd0 <MQTTSubscribeWithResults+0x11e>
        {
            if (data->grantedQoS != 0x80)
 8026ba8:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 8026baa:	781b      	ldrb	r3, [r3, #0]
 8026bac:	2b80      	cmp	r3, #128	@ 0x80
 8026bae:	d00f      	beq.n	8026bd0 <MQTTSubscribeWithResults+0x11e>
                rc = MQTTSetMessageHandler(c, topicFilter, messageHandler);
 8026bb0:	683a      	ldr	r2, [r7, #0]
 8026bb2:	68b9      	ldr	r1, [r7, #8]
 8026bb4:	68f8      	ldr	r0, [r7, #12]
 8026bb6:	f7ff ff12 	bl	80269de <MQTTSetMessageHandler>
 8026bba:	63f8      	str	r0, [r7, #60]	@ 0x3c
 8026bbc:	e008      	b.n	8026bd0 <MQTTSubscribeWithResults+0x11e>
        }
    }
    else
        rc = FAILURE;
 8026bbe:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8026bc2:	63fb      	str	r3, [r7, #60]	@ 0x3c
 8026bc4:	e004      	b.n	8026bd0 <MQTTSubscribeWithResults+0x11e>
		    goto exit;
 8026bc6:	bf00      	nop
 8026bc8:	e002      	b.n	8026bd0 <MQTTSubscribeWithResults+0x11e>
        goto exit;
 8026bca:	bf00      	nop
 8026bcc:	e000      	b.n	8026bd0 <MQTTSubscribeWithResults+0x11e>
        goto exit;             // there was a problem
 8026bce:	bf00      	nop

exit:
    if (rc == FAILURE)
 8026bd0:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 8026bd2:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8026bd6:	d102      	bne.n	8026bde <MQTTSubscribeWithResults+0x12c>
        MQTTCloseSession(c);
 8026bd8:	68f8      	ldr	r0, [r7, #12]
 8026bda:	f7ff fceb 	bl	80265b4 <MQTTCloseSession>
#if defined(MQTT_TASK)
	  MutexUnlock(&c->mutex);
#endif
//	osMutexRelease(mqttMutex);
	osMutexRelease(c->mutex);
 8026bde:	68fb      	ldr	r3, [r7, #12]
 8026be0:	6e9b      	ldr	r3, [r3, #104]	@ 0x68
 8026be2:	4618      	mov	r0, r3
 8026be4:	f7e9 fd59 	bl	801069a <osMutexRelease>
    return rc;
 8026be8:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
}
 8026bea:	4618      	mov	r0, r3
 8026bec:	3740      	adds	r7, #64	@ 0x40
 8026bee:	46bd      	mov	sp, r7
 8026bf0:	bdb0      	pop	{r4, r5, r7, pc}

08026bf2 <MQTTSubscribe>:


int MQTTSubscribe(MQTTClient* c, const char* topicFilter, enum QoS qos,
       messageHandler messageHandler)
{
 8026bf2:	b580      	push	{r7, lr}
 8026bf4:	b088      	sub	sp, #32
 8026bf6:	af02      	add	r7, sp, #8
 8026bf8:	60f8      	str	r0, [r7, #12]
 8026bfa:	60b9      	str	r1, [r7, #8]
 8026bfc:	603b      	str	r3, [r7, #0]
 8026bfe:	4613      	mov	r3, r2
 8026c00:	71fb      	strb	r3, [r7, #7]
    MQTTSubackData data;
    return MQTTSubscribeWithResults(c, topicFilter, qos, messageHandler, &data);
 8026c02:	79fa      	ldrb	r2, [r7, #7]
 8026c04:	f107 0314 	add.w	r3, r7, #20
 8026c08:	9300      	str	r3, [sp, #0]
 8026c0a:	683b      	ldr	r3, [r7, #0]
 8026c0c:	68b9      	ldr	r1, [r7, #8]
 8026c0e:	68f8      	ldr	r0, [r7, #12]
 8026c10:	f7ff ff4f 	bl	8026ab2 <MQTTSubscribeWithResults>
 8026c14:	4603      	mov	r3, r0
}
 8026c16:	4618      	mov	r0, r3
 8026c18:	3718      	adds	r7, #24
 8026c1a:	46bd      	mov	sp, r7
 8026c1c:	bd80      	pop	{r7, pc}

08026c1e <MQTTPublish>:
    return rc;
}


int MQTTPublish(MQTTClient* c, const char* topicName, MQTTMessage* message)
{
 8026c1e:	b5f0      	push	{r4, r5, r6, r7, lr}
 8026c20:	b097      	sub	sp, #92	@ 0x5c
 8026c22:	af08      	add	r7, sp, #32
 8026c24:	60f8      	str	r0, [r7, #12]
 8026c26:	60b9      	str	r1, [r7, #8]
 8026c28:	607a      	str	r2, [r7, #4]
    int rc = FAILURE;
 8026c2a:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8026c2e:	637b      	str	r3, [r7, #52]	@ 0x34
    Timer timer;
    MQTTString topic = MQTTString_initializer;
 8026c30:	2300      	movs	r3, #0
 8026c32:	61fb      	str	r3, [r7, #28]
 8026c34:	2300      	movs	r3, #0
 8026c36:	623b      	str	r3, [r7, #32]
 8026c38:	2300      	movs	r3, #0
 8026c3a:	627b      	str	r3, [r7, #36]	@ 0x24
    topic.cstring = (char *)topicName;
 8026c3c:	68bb      	ldr	r3, [r7, #8]
 8026c3e:	61fb      	str	r3, [r7, #28]
    int len = 0;
 8026c40:	2300      	movs	r3, #0
 8026c42:	633b      	str	r3, [r7, #48]	@ 0x30

#if defined(MQTT_TASK)
	  MutexLock(&c->mutex);
#endif
//	  osMutexAcquire(mqttMutex, osWaitForever);
	  osMutexAcquire(c->mutex, osWaitForever);
 8026c44:	68fb      	ldr	r3, [r7, #12]
 8026c46:	6e9b      	ldr	r3, [r3, #104]	@ 0x68
 8026c48:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 8026c4c:	4618      	mov	r0, r3
 8026c4e:	f7e9 fcd9 	bl	8010604 <osMutexAcquire>
	  if (!c->isconnected)
 8026c52:	68fb      	ldr	r3, [r7, #12]
 8026c54:	6a1b      	ldr	r3, [r3, #32]
 8026c56:	2b00      	cmp	r3, #0
 8026c58:	f000 809b 	beq.w	8026d92 <MQTTPublish+0x174>
		    goto exit;

    TimerInit(&timer);
 8026c5c:	f107 0328 	add.w	r3, r7, #40	@ 0x28
 8026c60:	4618      	mov	r0, r3
 8026c62:	f000 f907 	bl	8026e74 <TimerInit>
    TimerCountdownMS(&timer, c->command_timeout_ms);
 8026c66:	68fb      	ldr	r3, [r7, #12]
 8026c68:	685a      	ldr	r2, [r3, #4]
 8026c6a:	f107 0328 	add.w	r3, r7, #40	@ 0x28
 8026c6e:	4611      	mov	r1, r2
 8026c70:	4618      	mov	r0, r3
 8026c72:	f000 f8bd 	bl	8026df0 <TimerCountdownMS>

    if (message->qos == QOS1 || message->qos == QOS2)
 8026c76:	687b      	ldr	r3, [r7, #4]
 8026c78:	781b      	ldrb	r3, [r3, #0]
 8026c7a:	2b01      	cmp	r3, #1
 8026c7c:	d003      	beq.n	8026c86 <MQTTPublish+0x68>
 8026c7e:	687b      	ldr	r3, [r7, #4]
 8026c80:	781b      	ldrb	r3, [r3, #0]
 8026c82:	2b02      	cmp	r3, #2
 8026c84:	d106      	bne.n	8026c94 <MQTTPublish+0x76>
        message->id = getNextPacketId(c);
 8026c86:	68f8      	ldr	r0, [r7, #12]
 8026c88:	f7ff f9da 	bl	8026040 <getNextPacketId>
 8026c8c:	4603      	mov	r3, r0
 8026c8e:	b29a      	uxth	r2, r3
 8026c90:	687b      	ldr	r3, [r7, #4]
 8026c92:	809a      	strh	r2, [r3, #4]

    len = MQTTSerialize_publish(c->buf, c->buf_size, 0, message->qos, message->retained, message->id,
 8026c94:	68fb      	ldr	r3, [r7, #12]
 8026c96:	691b      	ldr	r3, [r3, #16]
 8026c98:	603b      	str	r3, [r7, #0]
 8026c9a:	68fb      	ldr	r3, [r7, #12]
 8026c9c:	689b      	ldr	r3, [r3, #8]
 8026c9e:	469c      	mov	ip, r3
 8026ca0:	687b      	ldr	r3, [r7, #4]
 8026ca2:	781b      	ldrb	r3, [r3, #0]
 8026ca4:	469e      	mov	lr, r3
 8026ca6:	687b      	ldr	r3, [r7, #4]
 8026ca8:	785d      	ldrb	r5, [r3, #1]
 8026caa:	687b      	ldr	r3, [r7, #4]
 8026cac:	889e      	ldrh	r6, [r3, #4]
              topic, (unsigned char*)message->payload, message->payloadlen);
 8026cae:	687b      	ldr	r3, [r7, #4]
 8026cb0:	689b      	ldr	r3, [r3, #8]
 8026cb2:	687a      	ldr	r2, [r7, #4]
 8026cb4:	68d2      	ldr	r2, [r2, #12]
    len = MQTTSerialize_publish(c->buf, c->buf_size, 0, message->qos, message->retained, message->id,
 8026cb6:	9206      	str	r2, [sp, #24]
 8026cb8:	9305      	str	r3, [sp, #20]
 8026cba:	ac02      	add	r4, sp, #8
 8026cbc:	f107 031c 	add.w	r3, r7, #28
 8026cc0:	e893 0007 	ldmia.w	r3, {r0, r1, r2}
 8026cc4:	e884 0007 	stmia.w	r4, {r0, r1, r2}
 8026cc8:	9601      	str	r6, [sp, #4]
 8026cca:	9500      	str	r5, [sp, #0]
 8026ccc:	4673      	mov	r3, lr
 8026cce:	2200      	movs	r2, #0
 8026cd0:	4661      	mov	r1, ip
 8026cd2:	6838      	ldr	r0, [r7, #0]
 8026cd4:	f000 fe5d 	bl	8027992 <MQTTSerialize_publish>
 8026cd8:	6338      	str	r0, [r7, #48]	@ 0x30
    if (len <= 0)
 8026cda:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8026cdc:	2b00      	cmp	r3, #0
 8026cde:	dd5a      	ble.n	8026d96 <MQTTPublish+0x178>
        goto exit;
    if ((rc = sendPacket(c, len, &timer)) != MQTT_SUCCESS) // send the subscribe packet
 8026ce0:	f107 0328 	add.w	r3, r7, #40	@ 0x28
 8026ce4:	461a      	mov	r2, r3
 8026ce6:	6b39      	ldr	r1, [r7, #48]	@ 0x30
 8026ce8:	68f8      	ldr	r0, [r7, #12]
 8026cea:	f7ff f9c2 	bl	8026072 <sendPacket>
 8026cee:	6378      	str	r0, [r7, #52]	@ 0x34
 8026cf0:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8026cf2:	2b00      	cmp	r3, #0
 8026cf4:	d151      	bne.n	8026d9a <MQTTPublish+0x17c>
        goto exit; // there was a problem

    if (message->qos == QOS1)
 8026cf6:	687b      	ldr	r3, [r7, #4]
 8026cf8:	781b      	ldrb	r3, [r3, #0]
 8026cfa:	2b01      	cmp	r3, #1
 8026cfc:	d122      	bne.n	8026d44 <MQTTPublish+0x126>
    {
        if (waitfor(c, PUBACK, &timer) == PUBACK)
 8026cfe:	f107 0328 	add.w	r3, r7, #40	@ 0x28
 8026d02:	461a      	mov	r2, r3
 8026d04:	2104      	movs	r1, #4
 8026d06:	68f8      	ldr	r0, [r7, #12]
 8026d08:	f7ff fd97 	bl	802683a <waitfor>
 8026d0c:	4603      	mov	r3, r0
 8026d0e:	2b04      	cmp	r3, #4
 8026d10:	d114      	bne.n	8026d3c <MQTTPublish+0x11e>
        {
            unsigned short mypacketid;
            unsigned char dup, type;
            if (MQTTDeserialize_ack(&type, &dup, &mypacketid, c->readbuf, c->readbuf_size) != 1)
 8026d12:	68fb      	ldr	r3, [r7, #12]
 8026d14:	695c      	ldr	r4, [r3, #20]
 8026d16:	68fb      	ldr	r3, [r7, #12]
 8026d18:	68db      	ldr	r3, [r3, #12]
 8026d1a:	f107 021a 	add.w	r2, r7, #26
 8026d1e:	f107 0119 	add.w	r1, r7, #25
 8026d22:	f107 0018 	add.w	r0, r7, #24
 8026d26:	9300      	str	r3, [sp, #0]
 8026d28:	4623      	mov	r3, r4
 8026d2a:	f000 fbc1 	bl	80274b0 <MQTTDeserialize_ack>
 8026d2e:	4603      	mov	r3, r0
 8026d30:	2b01      	cmp	r3, #1
 8026d32:	d035      	beq.n	8026da0 <MQTTPublish+0x182>
                rc = FAILURE;
 8026d34:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8026d38:	637b      	str	r3, [r7, #52]	@ 0x34
 8026d3a:	e031      	b.n	8026da0 <MQTTPublish+0x182>
        }
        else
            rc = FAILURE;
 8026d3c:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8026d40:	637b      	str	r3, [r7, #52]	@ 0x34
 8026d42:	e02d      	b.n	8026da0 <MQTTPublish+0x182>
    }
    else if (message->qos == QOS2)
 8026d44:	687b      	ldr	r3, [r7, #4]
 8026d46:	781b      	ldrb	r3, [r3, #0]
 8026d48:	2b02      	cmp	r3, #2
 8026d4a:	d128      	bne.n	8026d9e <MQTTPublish+0x180>
    {
        if (waitfor(c, PUBCOMP, &timer) == PUBCOMP)
 8026d4c:	f107 0328 	add.w	r3, r7, #40	@ 0x28
 8026d50:	461a      	mov	r2, r3
 8026d52:	2107      	movs	r1, #7
 8026d54:	68f8      	ldr	r0, [r7, #12]
 8026d56:	f7ff fd70 	bl	802683a <waitfor>
 8026d5a:	4603      	mov	r3, r0
 8026d5c:	2b07      	cmp	r3, #7
 8026d5e:	d114      	bne.n	8026d8a <MQTTPublish+0x16c>
        {
            unsigned short mypacketid;
            unsigned char dup, type;
            if (MQTTDeserialize_ack(&type, &dup, &mypacketid, c->readbuf, c->readbuf_size) != 1)
 8026d60:	68fb      	ldr	r3, [r7, #12]
 8026d62:	695c      	ldr	r4, [r3, #20]
 8026d64:	68fb      	ldr	r3, [r7, #12]
 8026d66:	68db      	ldr	r3, [r3, #12]
 8026d68:	f107 0216 	add.w	r2, r7, #22
 8026d6c:	f107 0115 	add.w	r1, r7, #21
 8026d70:	f107 0014 	add.w	r0, r7, #20
 8026d74:	9300      	str	r3, [sp, #0]
 8026d76:	4623      	mov	r3, r4
 8026d78:	f000 fb9a 	bl	80274b0 <MQTTDeserialize_ack>
 8026d7c:	4603      	mov	r3, r0
 8026d7e:	2b01      	cmp	r3, #1
 8026d80:	d00e      	beq.n	8026da0 <MQTTPublish+0x182>
                rc = FAILURE;
 8026d82:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8026d86:	637b      	str	r3, [r7, #52]	@ 0x34
 8026d88:	e00a      	b.n	8026da0 <MQTTPublish+0x182>
        }
        else
            rc = FAILURE;
 8026d8a:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8026d8e:	637b      	str	r3, [r7, #52]	@ 0x34
 8026d90:	e006      	b.n	8026da0 <MQTTPublish+0x182>
		    goto exit;
 8026d92:	bf00      	nop
 8026d94:	e004      	b.n	8026da0 <MQTTPublish+0x182>
        goto exit;
 8026d96:	bf00      	nop
 8026d98:	e002      	b.n	8026da0 <MQTTPublish+0x182>
        goto exit; // there was a problem
 8026d9a:	bf00      	nop
 8026d9c:	e000      	b.n	8026da0 <MQTTPublish+0x182>
    }

exit:
 8026d9e:	bf00      	nop
    if (rc == FAILURE)
 8026da0:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8026da2:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8026da6:	d102      	bne.n	8026dae <MQTTPublish+0x190>
        MQTTCloseSession(c);
 8026da8:	68f8      	ldr	r0, [r7, #12]
 8026daa:	f7ff fc03 	bl	80265b4 <MQTTCloseSession>
#if defined(MQTT_TASK)
	  MutexUnlock(&c->mutex);
#endif
//	  osMutexRelease(mqttMutex);
	  osMutexRelease(c->mutex);
 8026dae:	68fb      	ldr	r3, [r7, #12]
 8026db0:	6e9b      	ldr	r3, [r3, #104]	@ 0x68
 8026db2:	4618      	mov	r0, r3
 8026db4:	f7e9 fc71 	bl	801069a <osMutexRelease>
    return rc;
 8026db8:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
}
 8026dba:	4618      	mov	r0, r3
 8026dbc:	373c      	adds	r7, #60	@ 0x3c
 8026dbe:	46bd      	mov	sp, r7
 8026dc0:	bdf0      	pop	{r4, r5, r6, r7, pc}
	...

08026dc4 <TimerIsExpired>:
#define SERVER_IP4	34

uint32_t MilliTimer;

//Timer functions
char TimerIsExpired(Timer *timer) {
 8026dc4:	b480      	push	{r7}
 8026dc6:	b085      	sub	sp, #20
 8026dc8:	af00      	add	r7, sp, #0
 8026dca:	6078      	str	r0, [r7, #4]
	long left = timer->end_time - MilliTimer;
 8026dcc:	687b      	ldr	r3, [r7, #4]
 8026dce:	685a      	ldr	r2, [r3, #4]
 8026dd0:	4b06      	ldr	r3, [pc, #24]	@ (8026dec <TimerIsExpired+0x28>)
 8026dd2:	681b      	ldr	r3, [r3, #0]
 8026dd4:	1ad3      	subs	r3, r2, r3
 8026dd6:	60fb      	str	r3, [r7, #12]
	return (left < 0);
 8026dd8:	68fb      	ldr	r3, [r7, #12]
 8026dda:	0fdb      	lsrs	r3, r3, #31
 8026ddc:	b2db      	uxtb	r3, r3
}
 8026dde:	4618      	mov	r0, r3
 8026de0:	3714      	adds	r7, #20
 8026de2:	46bd      	mov	sp, r7
 8026de4:	f85d 7b04 	ldr.w	r7, [sp], #4
 8026de8:	4770      	bx	lr
 8026dea:	bf00      	nop
 8026dec:	2402a198 	.word	0x2402a198

08026df0 <TimerCountdownMS>:

void TimerCountdownMS(Timer *timer, unsigned int timeout) {
 8026df0:	b480      	push	{r7}
 8026df2:	b083      	sub	sp, #12
 8026df4:	af00      	add	r7, sp, #0
 8026df6:	6078      	str	r0, [r7, #4]
 8026df8:	6039      	str	r1, [r7, #0]
	timer->end_time = MilliTimer + timeout;
 8026dfa:	4b06      	ldr	r3, [pc, #24]	@ (8026e14 <TimerCountdownMS+0x24>)
 8026dfc:	681a      	ldr	r2, [r3, #0]
 8026dfe:	683b      	ldr	r3, [r7, #0]
 8026e00:	441a      	add	r2, r3
 8026e02:	687b      	ldr	r3, [r7, #4]
 8026e04:	605a      	str	r2, [r3, #4]
}
 8026e06:	bf00      	nop
 8026e08:	370c      	adds	r7, #12
 8026e0a:	46bd      	mov	sp, r7
 8026e0c:	f85d 7b04 	ldr.w	r7, [sp], #4
 8026e10:	4770      	bx	lr
 8026e12:	bf00      	nop
 8026e14:	2402a198 	.word	0x2402a198

08026e18 <TimerCountdown>:

void TimerCountdown(Timer *timer, unsigned int timeout) {
 8026e18:	b480      	push	{r7}
 8026e1a:	b083      	sub	sp, #12
 8026e1c:	af00      	add	r7, sp, #0
 8026e1e:	6078      	str	r0, [r7, #4]
 8026e20:	6039      	str	r1, [r7, #0]
	timer->end_time = MilliTimer + (timeout * 1000);
 8026e22:	683b      	ldr	r3, [r7, #0]
 8026e24:	f44f 727a 	mov.w	r2, #1000	@ 0x3e8
 8026e28:	fb03 f202 	mul.w	r2, r3, r2
 8026e2c:	4b05      	ldr	r3, [pc, #20]	@ (8026e44 <TimerCountdown+0x2c>)
 8026e2e:	681b      	ldr	r3, [r3, #0]
 8026e30:	441a      	add	r2, r3
 8026e32:	687b      	ldr	r3, [r7, #4]
 8026e34:	605a      	str	r2, [r3, #4]
}
 8026e36:	bf00      	nop
 8026e38:	370c      	adds	r7, #12
 8026e3a:	46bd      	mov	sp, r7
 8026e3c:	f85d 7b04 	ldr.w	r7, [sp], #4
 8026e40:	4770      	bx	lr
 8026e42:	bf00      	nop
 8026e44:	2402a198 	.word	0x2402a198

08026e48 <TimerLeftMS>:

int TimerLeftMS(Timer *timer) {
 8026e48:	b480      	push	{r7}
 8026e4a:	b085      	sub	sp, #20
 8026e4c:	af00      	add	r7, sp, #0
 8026e4e:	6078      	str	r0, [r7, #4]
	long left = timer->end_time - MilliTimer;
 8026e50:	687b      	ldr	r3, [r7, #4]
 8026e52:	685a      	ldr	r2, [r3, #4]
 8026e54:	4b06      	ldr	r3, [pc, #24]	@ (8026e70 <TimerLeftMS+0x28>)
 8026e56:	681b      	ldr	r3, [r3, #0]
 8026e58:	1ad3      	subs	r3, r2, r3
 8026e5a:	60fb      	str	r3, [r7, #12]
	return (left < 0) ? 0 : left;
 8026e5c:	68fb      	ldr	r3, [r7, #12]
 8026e5e:	ea23 73e3 	bic.w	r3, r3, r3, asr #31
}
 8026e62:	4618      	mov	r0, r3
 8026e64:	3714      	adds	r7, #20
 8026e66:	46bd      	mov	sp, r7
 8026e68:	f85d 7b04 	ldr.w	r7, [sp], #4
 8026e6c:	4770      	bx	lr
 8026e6e:	bf00      	nop
 8026e70:	2402a198 	.word	0x2402a198

08026e74 <TimerInit>:

void TimerInit(Timer *timer) {
 8026e74:	b480      	push	{r7}
 8026e76:	b083      	sub	sp, #12
 8026e78:	af00      	add	r7, sp, #0
 8026e7a:	6078      	str	r0, [r7, #4]
	timer->end_time = 0;
 8026e7c:	687b      	ldr	r3, [r7, #4]
 8026e7e:	2200      	movs	r2, #0
 8026e80:	605a      	str	r2, [r3, #4]
}
 8026e82:	bf00      	nop
 8026e84:	370c      	adds	r7, #12
 8026e86:	46bd      	mov	sp, r7
 8026e88:	f85d 7b04 	ldr.w	r7, [sp], #4
 8026e8c:	4770      	bx	lr
	...

08026e90 <NewNetwork>:

#ifdef MQTT_LWIP_SOCKET
void NewNetwork(Network *n) {
 8026e90:	b480      	push	{r7}
 8026e92:	b083      	sub	sp, #12
 8026e94:	af00      	add	r7, sp, #0
 8026e96:	6078      	str	r0, [r7, #4]
	n->socket = 0; //clear
 8026e98:	687b      	ldr	r3, [r7, #4]
 8026e9a:	2200      	movs	r2, #0
 8026e9c:	601a      	str	r2, [r3, #0]
	n->mqttread = net_read; //receive function
 8026e9e:	687b      	ldr	r3, [r7, #4]
 8026ea0:	4a06      	ldr	r2, [pc, #24]	@ (8026ebc <NewNetwork+0x2c>)
 8026ea2:	605a      	str	r2, [r3, #4]
	n->mqttwrite = net_write; //send function
 8026ea4:	687b      	ldr	r3, [r7, #4]
 8026ea6:	4a06      	ldr	r2, [pc, #24]	@ (8026ec0 <NewNetwork+0x30>)
 8026ea8:	609a      	str	r2, [r3, #8]
	n->disconnect = net_disconnect; //disconnection function
 8026eaa:	687b      	ldr	r3, [r7, #4]
 8026eac:	4a05      	ldr	r2, [pc, #20]	@ (8026ec4 <NewNetwork+0x34>)
 8026eae:	60da      	str	r2, [r3, #12]
}
 8026eb0:	bf00      	nop
 8026eb2:	370c      	adds	r7, #12
 8026eb4:	46bd      	mov	sp, r7
 8026eb6:	f85d 7b04 	ldr.w	r7, [sp], #4
 8026eba:	4770      	bx	lr
 8026ebc:	08026f65 	.word	0x08026f65
 8026ec0:	08026fb5 	.word	0x08026fb5
 8026ec4:	08026fdb 	.word	0x08026fdb

08026ec8 <ConnectNetwork>:

int ConnectNetwork(Network *n, char *ip, int port) {
 8026ec8:	b580      	push	{r7, lr}
 8026eca:	b088      	sub	sp, #32
 8026ecc:	af00      	add	r7, sp, #0
 8026ece:	60f8      	str	r0, [r7, #12]
 8026ed0:	60b9      	str	r1, [r7, #8]
 8026ed2:	607a      	str	r2, [r7, #4]
	struct sockaddr_in server_addr;

	if(n->socket)
 8026ed4:	68fb      	ldr	r3, [r7, #12]
 8026ed6:	681b      	ldr	r3, [r3, #0]
 8026ed8:	2b00      	cmp	r3, #0
 8026eda:	d004      	beq.n	8026ee6 <ConnectNetwork+0x1e>
	{
		close(n->socket);
 8026edc:	68fb      	ldr	r3, [r7, #12]
 8026ede:	681b      	ldr	r3, [r3, #0]
 8026ee0:	4618      	mov	r0, r3
 8026ee2:	f7f0 fa65 	bl	80173b0 <lwip_close>
	}

	n->socket = socket(PF_INET, SOCK_STREAM, 0); //create socket
 8026ee6:	2200      	movs	r2, #0
 8026ee8:	2101      	movs	r1, #1
 8026eea:	2002      	movs	r0, #2
 8026eec:	f7f0 ff72 	bl	8017dd4 <lwip_socket>
 8026ef0:	4602      	mov	r2, r0
 8026ef2:	68fb      	ldr	r3, [r7, #12]
 8026ef4:	601a      	str	r2, [r3, #0]
	if(n->socket < 0)
 8026ef6:	68fb      	ldr	r3, [r7, #12]
 8026ef8:	681b      	ldr	r3, [r3, #0]
 8026efa:	2b00      	cmp	r3, #0
 8026efc:	da05      	bge.n	8026f0a <ConnectNetwork+0x42>
	{
		n->socket = 0;
 8026efe:	68fb      	ldr	r3, [r7, #12]
 8026f00:	2200      	movs	r2, #0
 8026f02:	601a      	str	r2, [r3, #0]
		return -1;
 8026f04:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8026f08:	e028      	b.n	8026f5c <ConnectNetwork+0x94>
	}

	memset(&server_addr, 0, sizeof(struct sockaddr_in)); //broker address info
 8026f0a:	f107 0310 	add.w	r3, r7, #16
 8026f0e:	2210      	movs	r2, #16
 8026f10:	2100      	movs	r1, #0
 8026f12:	4618      	mov	r0, r3
 8026f14:	f002 fc8c 	bl	8029830 <memset>
	server_addr.sin_family = AF_INET;
 8026f18:	2302      	movs	r3, #2
 8026f1a:	747b      	strb	r3, [r7, #17]
	server_addr.sin_addr.s_addr = inet_addr(ip);
 8026f1c:	68b8      	ldr	r0, [r7, #8]
 8026f1e:	f7fd fde0 	bl	8024ae2 <ipaddr_addr>
 8026f22:	4603      	mov	r3, r0
 8026f24:	617b      	str	r3, [r7, #20]
	server_addr.sin_port = htons(port);
 8026f26:	687b      	ldr	r3, [r7, #4]
 8026f28:	b29b      	uxth	r3, r3
 8026f2a:	4618      	mov	r0, r3
 8026f2c:	f7f1 fb94 	bl	8018658 <lwip_htons>
 8026f30:	4603      	mov	r3, r0
 8026f32:	827b      	strh	r3, [r7, #18]

	if(connect(n->socket, (struct sockaddr*)&server_addr, sizeof(struct sockaddr_in)) < 0) //connect to the broker
 8026f34:	68fb      	ldr	r3, [r7, #12]
 8026f36:	681b      	ldr	r3, [r3, #0]
 8026f38:	f107 0110 	add.w	r1, r7, #16
 8026f3c:	2210      	movs	r2, #16
 8026f3e:	4618      	mov	r0, r3
 8026f40:	f7f0 fa8c 	bl	801745c <lwip_connect>
 8026f44:	4603      	mov	r3, r0
 8026f46:	2b00      	cmp	r3, #0
 8026f48:	da07      	bge.n	8026f5a <ConnectNetwork+0x92>
	{
		close(n->socket);
 8026f4a:	68fb      	ldr	r3, [r7, #12]
 8026f4c:	681b      	ldr	r3, [r3, #0]
 8026f4e:	4618      	mov	r0, r3
 8026f50:	f7f0 fa2e 	bl	80173b0 <lwip_close>
		return -1;
 8026f54:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8026f58:	e000      	b.n	8026f5c <ConnectNetwork+0x94>
	}
	return 0;
 8026f5a:	2300      	movs	r3, #0
}
 8026f5c:	4618      	mov	r0, r3
 8026f5e:	3720      	adds	r7, #32
 8026f60:	46bd      	mov	sp, r7
 8026f62:	bd80      	pop	{r7, pc}

08026f64 <net_read>:

int net_read(Network *n, unsigned char *buffer, int len, int timeout_ms) {
 8026f64:	b580      	push	{r7, lr}
 8026f66:	b086      	sub	sp, #24
 8026f68:	af00      	add	r7, sp, #0
 8026f6a:	60f8      	str	r0, [r7, #12]
 8026f6c:	60b9      	str	r1, [r7, #8]
 8026f6e:	607a      	str	r2, [r7, #4]
 8026f70:	603b      	str	r3, [r7, #0]
	int available;

	/* !!! LWIP_SO_RCVBUF must be enabled !!! */
	if(ioctl(n->socket, FIONREAD, &available) < 0) return -1; //check receive buffer
 8026f72:	68fb      	ldr	r3, [r7, #12]
 8026f74:	681b      	ldr	r3, [r3, #0]
 8026f76:	f107 0214 	add.w	r2, r7, #20
 8026f7a:	490d      	ldr	r1, [pc, #52]	@ (8026fb0 <net_read+0x4c>)
 8026f7c:	4618      	mov	r0, r3
 8026f7e:	f7f1 f917 	bl	80181b0 <lwip_ioctl>
 8026f82:	4603      	mov	r3, r0
 8026f84:	2b00      	cmp	r3, #0
 8026f86:	da02      	bge.n	8026f8e <net_read+0x2a>
 8026f88:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8026f8c:	e00c      	b.n	8026fa8 <net_read+0x44>

	if(available > 0)
 8026f8e:	697b      	ldr	r3, [r7, #20]
 8026f90:	2b00      	cmp	r3, #0
 8026f92:	dd08      	ble.n	8026fa6 <net_read+0x42>
	{
		return recv(n->socket, buffer, len, 0);
 8026f94:	68fb      	ldr	r3, [r7, #12]
 8026f96:	6818      	ldr	r0, [r3, #0]
 8026f98:	687a      	ldr	r2, [r7, #4]
 8026f9a:	2300      	movs	r3, #0
 8026f9c:	68b9      	ldr	r1, [r7, #8]
 8026f9e:	f7f0 fdf3 	bl	8017b88 <lwip_recv>
 8026fa2:	4603      	mov	r3, r0
 8026fa4:	e000      	b.n	8026fa8 <net_read+0x44>
	}

	return 0;
 8026fa6:	2300      	movs	r3, #0
}
 8026fa8:	4618      	mov	r0, r3
 8026faa:	3718      	adds	r7, #24
 8026fac:	46bd      	mov	sp, r7
 8026fae:	bd80      	pop	{r7, pc}
 8026fb0:	4004667f 	.word	0x4004667f

08026fb4 <net_write>:

int net_write(Network *n, unsigned char *buffer, int len, int timeout_ms) {
 8026fb4:	b580      	push	{r7, lr}
 8026fb6:	b084      	sub	sp, #16
 8026fb8:	af00      	add	r7, sp, #0
 8026fba:	60f8      	str	r0, [r7, #12]
 8026fbc:	60b9      	str	r1, [r7, #8]
 8026fbe:	607a      	str	r2, [r7, #4]
 8026fc0:	603b      	str	r3, [r7, #0]
	return send(n->socket, buffer, len, 0);
 8026fc2:	68fb      	ldr	r3, [r7, #12]
 8026fc4:	6818      	ldr	r0, [r3, #0]
 8026fc6:	687a      	ldr	r2, [r7, #4]
 8026fc8:	2300      	movs	r3, #0
 8026fca:	68b9      	ldr	r1, [r7, #8]
 8026fcc:	f7f0 fdf2 	bl	8017bb4 <lwip_send>
 8026fd0:	4603      	mov	r3, r0
}
 8026fd2:	4618      	mov	r0, r3
 8026fd4:	3710      	adds	r7, #16
 8026fd6:	46bd      	mov	sp, r7
 8026fd8:	bd80      	pop	{r7, pc}

08026fda <net_disconnect>:

void net_disconnect(Network *n) {
 8026fda:	b580      	push	{r7, lr}
 8026fdc:	b082      	sub	sp, #8
 8026fde:	af00      	add	r7, sp, #0
 8026fe0:	6078      	str	r0, [r7, #4]
	close(n->socket);
 8026fe2:	687b      	ldr	r3, [r7, #4]
 8026fe4:	681b      	ldr	r3, [r3, #0]
 8026fe6:	4618      	mov	r0, r3
 8026fe8:	f7f0 f9e2 	bl	80173b0 <lwip_close>
	n->socket = 0;
 8026fec:	687b      	ldr	r3, [r7, #4]
 8026fee:	2200      	movs	r2, #0
 8026ff0:	601a      	str	r2, [r3, #0]
}
 8026ff2:	bf00      	nop
 8026ff4:	3708      	adds	r7, #8
 8026ff6:	46bd      	mov	sp, r7
 8026ff8:	bd80      	pop	{r7, pc}

08026ffa <MQTTSerialize_connectLength>:
  * Determines the length of the MQTT connect packet that would be produced using the supplied connect options.
  * @param options the options to be used to build the connect packet
  * @return the length of buffer needed to contain the serialized version of the packet
  */
int MQTTSerialize_connectLength(MQTTPacket_connectData* options)
{
 8026ffa:	b590      	push	{r4, r7, lr}
 8026ffc:	b085      	sub	sp, #20
 8026ffe:	af00      	add	r7, sp, #0
 8027000:	6078      	str	r0, [r7, #4]
	int len = 0;
 8027002:	2300      	movs	r3, #0
 8027004:	60fb      	str	r3, [r7, #12]

	FUNC_ENTRY;

	if (options->MQTTVersion == 3)
 8027006:	687b      	ldr	r3, [r7, #4]
 8027008:	7a1b      	ldrb	r3, [r3, #8]
 802700a:	2b03      	cmp	r3, #3
 802700c:	d102      	bne.n	8027014 <MQTTSerialize_connectLength+0x1a>
		len = 12; /* variable depending on MQTT or MQIsdp */
 802700e:	230c      	movs	r3, #12
 8027010:	60fb      	str	r3, [r7, #12]
 8027012:	e005      	b.n	8027020 <MQTTSerialize_connectLength+0x26>
	else if (options->MQTTVersion == 4)
 8027014:	687b      	ldr	r3, [r7, #4]
 8027016:	7a1b      	ldrb	r3, [r3, #8]
 8027018:	2b04      	cmp	r3, #4
 802701a:	d101      	bne.n	8027020 <MQTTSerialize_connectLength+0x26>
		len = 10;
 802701c:	230a      	movs	r3, #10
 802701e:	60fb      	str	r3, [r7, #12]

	len += MQTTstrlen(options->clientID)+2;
 8027020:	687b      	ldr	r3, [r7, #4]
 8027022:	330c      	adds	r3, #12
 8027024:	e893 0007 	ldmia.w	r3, {r0, r1, r2}
 8027028:	f000 fc43 	bl	80278b2 <MQTTstrlen>
 802702c:	4603      	mov	r3, r0
 802702e:	3302      	adds	r3, #2
 8027030:	68fa      	ldr	r2, [r7, #12]
 8027032:	4413      	add	r3, r2
 8027034:	60fb      	str	r3, [r7, #12]
	if (options->willFlag)
 8027036:	687b      	ldr	r3, [r7, #4]
 8027038:	7edb      	ldrb	r3, [r3, #27]
 802703a:	2b00      	cmp	r3, #0
 802703c:	d013      	beq.n	8027066 <MQTTSerialize_connectLength+0x6c>
		len += MQTTstrlen(options->will.topicName)+2 + MQTTstrlen(options->will.message)+2;
 802703e:	687b      	ldr	r3, [r7, #4]
 8027040:	3324      	adds	r3, #36	@ 0x24
 8027042:	e893 0007 	ldmia.w	r3, {r0, r1, r2}
 8027046:	f000 fc34 	bl	80278b2 <MQTTstrlen>
 802704a:	4603      	mov	r3, r0
 802704c:	1c9c      	adds	r4, r3, #2
 802704e:	687b      	ldr	r3, [r7, #4]
 8027050:	3330      	adds	r3, #48	@ 0x30
 8027052:	e893 0007 	ldmia.w	r3, {r0, r1, r2}
 8027056:	f000 fc2c 	bl	80278b2 <MQTTstrlen>
 802705a:	4603      	mov	r3, r0
 802705c:	4423      	add	r3, r4
 802705e:	3302      	adds	r3, #2
 8027060:	68fa      	ldr	r2, [r7, #12]
 8027062:	4413      	add	r3, r2
 8027064:	60fb      	str	r3, [r7, #12]
	if (options->username.cstring || options->username.lenstring.data)
 8027066:	687b      	ldr	r3, [r7, #4]
 8027068:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 802706a:	2b00      	cmp	r3, #0
 802706c:	d103      	bne.n	8027076 <MQTTSerialize_connectLength+0x7c>
 802706e:	687b      	ldr	r3, [r7, #4]
 8027070:	6c9b      	ldr	r3, [r3, #72]	@ 0x48
 8027072:	2b00      	cmp	r3, #0
 8027074:	d00a      	beq.n	802708c <MQTTSerialize_connectLength+0x92>
		len += MQTTstrlen(options->username)+2;
 8027076:	687b      	ldr	r3, [r7, #4]
 8027078:	3340      	adds	r3, #64	@ 0x40
 802707a:	e893 0007 	ldmia.w	r3, {r0, r1, r2}
 802707e:	f000 fc18 	bl	80278b2 <MQTTstrlen>
 8027082:	4603      	mov	r3, r0
 8027084:	3302      	adds	r3, #2
 8027086:	68fa      	ldr	r2, [r7, #12]
 8027088:	4413      	add	r3, r2
 802708a:	60fb      	str	r3, [r7, #12]
	if (options->password.cstring || options->password.lenstring.data)
 802708c:	687b      	ldr	r3, [r7, #4]
 802708e:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 8027090:	2b00      	cmp	r3, #0
 8027092:	d103      	bne.n	802709c <MQTTSerialize_connectLength+0xa2>
 8027094:	687b      	ldr	r3, [r7, #4]
 8027096:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 8027098:	2b00      	cmp	r3, #0
 802709a:	d00a      	beq.n	80270b2 <MQTTSerialize_connectLength+0xb8>
		len += MQTTstrlen(options->password)+2;
 802709c:	687b      	ldr	r3, [r7, #4]
 802709e:	334c      	adds	r3, #76	@ 0x4c
 80270a0:	e893 0007 	ldmia.w	r3, {r0, r1, r2}
 80270a4:	f000 fc05 	bl	80278b2 <MQTTstrlen>
 80270a8:	4603      	mov	r3, r0
 80270aa:	3302      	adds	r3, #2
 80270ac:	68fa      	ldr	r2, [r7, #12]
 80270ae:	4413      	add	r3, r2
 80270b0:	60fb      	str	r3, [r7, #12]

	FUNC_EXIT_RC(len);
	return len;
 80270b2:	68fb      	ldr	r3, [r7, #12]
}
 80270b4:	4618      	mov	r0, r3
 80270b6:	3714      	adds	r7, #20
 80270b8:	46bd      	mov	sp, r7
 80270ba:	bd90      	pop	{r4, r7, pc}

080270bc <MQTTSerialize_connect>:
  * @param len the length in bytes of the supplied buffer
  * @param options the options to be used to build the connect packet
  * @return serialized length, or error if 0
  */
int MQTTSerialize_connect(unsigned char* buf, int buflen, MQTTPacket_connectData* options)
{
 80270bc:	b580      	push	{r7, lr}
 80270be:	b08a      	sub	sp, #40	@ 0x28
 80270c0:	af00      	add	r7, sp, #0
 80270c2:	60f8      	str	r0, [r7, #12]
 80270c4:	60b9      	str	r1, [r7, #8]
 80270c6:	607a      	str	r2, [r7, #4]
	unsigned char *ptr = buf;
 80270c8:	68fb      	ldr	r3, [r7, #12]
 80270ca:	61fb      	str	r3, [r7, #28]
	MQTTHeader header = {0};
 80270cc:	2300      	movs	r3, #0
 80270ce:	61bb      	str	r3, [r7, #24]
	MQTTConnectFlags flags = {0};
 80270d0:	2300      	movs	r3, #0
 80270d2:	617b      	str	r3, [r7, #20]
	int len = 0;
 80270d4:	2300      	movs	r3, #0
 80270d6:	623b      	str	r3, [r7, #32]
	int rc = -1;
 80270d8:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80270dc:	627b      	str	r3, [r7, #36]	@ 0x24

	FUNC_ENTRY;
	if (MQTTPacket_len(len = MQTTSerialize_connectLength(options)) > buflen)
 80270de:	6878      	ldr	r0, [r7, #4]
 80270e0:	f7ff ff8b 	bl	8026ffa <MQTTSerialize_connectLength>
 80270e4:	6238      	str	r0, [r7, #32]
 80270e6:	6a38      	ldr	r0, [r7, #32]
 80270e8:	f000 fa98 	bl	802761c <MQTTPacket_len>
 80270ec:	4602      	mov	r2, r0
 80270ee:	68bb      	ldr	r3, [r7, #8]
 80270f0:	4293      	cmp	r3, r2
 80270f2:	da03      	bge.n	80270fc <MQTTSerialize_connect+0x40>
	{
		rc = MQTTPACKET_BUFFER_TOO_SHORT;
 80270f4:	f06f 0301 	mvn.w	r3, #1
 80270f8:	627b      	str	r3, [r7, #36]	@ 0x24
		goto exit;
 80270fa:	e0c2      	b.n	8027282 <MQTTSerialize_connect+0x1c6>
	}

	header.byte = 0;
 80270fc:	2300      	movs	r3, #0
 80270fe:	763b      	strb	r3, [r7, #24]
	header.bits.type = CONNECT;
 8027100:	7e3b      	ldrb	r3, [r7, #24]
 8027102:	2201      	movs	r2, #1
 8027104:	f362 1307 	bfi	r3, r2, #4, #4
 8027108:	763b      	strb	r3, [r7, #24]
	writeChar(&ptr, header.byte); /* write header */
 802710a:	7e3a      	ldrb	r2, [r7, #24]
 802710c:	f107 031c 	add.w	r3, r7, #28
 8027110:	4611      	mov	r1, r2
 8027112:	4618      	mov	r0, r3
 8027114:	f000 fb11 	bl	802773a <writeChar>

	ptr += MQTTPacket_encode(ptr, len); /* write remaining length */
 8027118:	69fb      	ldr	r3, [r7, #28]
 802711a:	6a39      	ldr	r1, [r7, #32]
 802711c:	4618      	mov	r0, r3
 802711e:	f000 fa12 	bl	8027546 <MQTTPacket_encode>
 8027122:	4602      	mov	r2, r0
 8027124:	69fb      	ldr	r3, [r7, #28]
 8027126:	4413      	add	r3, r2
 8027128:	61fb      	str	r3, [r7, #28]

	if (options->MQTTVersion == 4)
 802712a:	687b      	ldr	r3, [r7, #4]
 802712c:	7a1b      	ldrb	r3, [r3, #8]
 802712e:	2b04      	cmp	r3, #4
 8027130:	d10c      	bne.n	802714c <MQTTSerialize_connect+0x90>
	{
		writeCString(&ptr, "MQTT");
 8027132:	f107 031c 	add.w	r3, r7, #28
 8027136:	4955      	ldr	r1, [pc, #340]	@ (802728c <MQTTSerialize_connect+0x1d0>)
 8027138:	4618      	mov	r0, r3
 802713a:	f000 fb3c 	bl	80277b6 <writeCString>
		writeChar(&ptr, (char) 4);
 802713e:	f107 031c 	add.w	r3, r7, #28
 8027142:	2104      	movs	r1, #4
 8027144:	4618      	mov	r0, r3
 8027146:	f000 faf8 	bl	802773a <writeChar>
 802714a:	e00b      	b.n	8027164 <MQTTSerialize_connect+0xa8>
	}
	else
	{
		writeCString(&ptr, "MQIsdp");
 802714c:	f107 031c 	add.w	r3, r7, #28
 8027150:	494f      	ldr	r1, [pc, #316]	@ (8027290 <MQTTSerialize_connect+0x1d4>)
 8027152:	4618      	mov	r0, r3
 8027154:	f000 fb2f 	bl	80277b6 <writeCString>
		writeChar(&ptr, (char) 3);
 8027158:	f107 031c 	add.w	r3, r7, #28
 802715c:	2103      	movs	r1, #3
 802715e:	4618      	mov	r0, r3
 8027160:	f000 faeb 	bl	802773a <writeChar>
	}

	flags.all = 0;
 8027164:	2300      	movs	r3, #0
 8027166:	753b      	strb	r3, [r7, #20]
	flags.bits.cleansession = options->cleansession;
 8027168:	687b      	ldr	r3, [r7, #4]
 802716a:	7e9b      	ldrb	r3, [r3, #26]
 802716c:	f003 0301 	and.w	r3, r3, #1
 8027170:	b2da      	uxtb	r2, r3
 8027172:	7d3b      	ldrb	r3, [r7, #20]
 8027174:	f362 0341 	bfi	r3, r2, #1, #1
 8027178:	753b      	strb	r3, [r7, #20]
	flags.bits.will = (options->willFlag) ? 1 : 0;
 802717a:	687b      	ldr	r3, [r7, #4]
 802717c:	7edb      	ldrb	r3, [r3, #27]
 802717e:	2b00      	cmp	r3, #0
 8027180:	bf14      	ite	ne
 8027182:	2301      	movne	r3, #1
 8027184:	2300      	moveq	r3, #0
 8027186:	b2da      	uxtb	r2, r3
 8027188:	7d3b      	ldrb	r3, [r7, #20]
 802718a:	f362 0382 	bfi	r3, r2, #2, #1
 802718e:	753b      	strb	r3, [r7, #20]
	if (flags.bits.will)
 8027190:	7d3b      	ldrb	r3, [r7, #20]
 8027192:	f003 0304 	and.w	r3, r3, #4
 8027196:	b2db      	uxtb	r3, r3
 8027198:	2b00      	cmp	r3, #0
 802719a:	d013      	beq.n	80271c4 <MQTTSerialize_connect+0x108>
	{
		flags.bits.willQoS = options->will.qos;
 802719c:	687b      	ldr	r3, [r7, #4]
 802719e:	f893 303d 	ldrb.w	r3, [r3, #61]	@ 0x3d
 80271a2:	f003 0303 	and.w	r3, r3, #3
 80271a6:	b2da      	uxtb	r2, r3
 80271a8:	7d3b      	ldrb	r3, [r7, #20]
 80271aa:	f362 03c4 	bfi	r3, r2, #3, #2
 80271ae:	753b      	strb	r3, [r7, #20]
		flags.bits.willRetain = options->will.retained;
 80271b0:	687b      	ldr	r3, [r7, #4]
 80271b2:	f893 303c 	ldrb.w	r3, [r3, #60]	@ 0x3c
 80271b6:	f003 0301 	and.w	r3, r3, #1
 80271ba:	b2da      	uxtb	r2, r3
 80271bc:	7d3b      	ldrb	r3, [r7, #20]
 80271be:	f362 1345 	bfi	r3, r2, #5, #1
 80271c2:	753b      	strb	r3, [r7, #20]
	}

	if (options->username.cstring || options->username.lenstring.data)
 80271c4:	687b      	ldr	r3, [r7, #4]
 80271c6:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 80271c8:	2b00      	cmp	r3, #0
 80271ca:	d103      	bne.n	80271d4 <MQTTSerialize_connect+0x118>
 80271cc:	687b      	ldr	r3, [r7, #4]
 80271ce:	6c9b      	ldr	r3, [r3, #72]	@ 0x48
 80271d0:	2b00      	cmp	r3, #0
 80271d2:	d003      	beq.n	80271dc <MQTTSerialize_connect+0x120>
		flags.bits.username = 1;
 80271d4:	7d3b      	ldrb	r3, [r7, #20]
 80271d6:	f043 0380 	orr.w	r3, r3, #128	@ 0x80
 80271da:	753b      	strb	r3, [r7, #20]
	if (options->password.cstring || options->password.lenstring.data)
 80271dc:	687b      	ldr	r3, [r7, #4]
 80271de:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 80271e0:	2b00      	cmp	r3, #0
 80271e2:	d103      	bne.n	80271ec <MQTTSerialize_connect+0x130>
 80271e4:	687b      	ldr	r3, [r7, #4]
 80271e6:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 80271e8:	2b00      	cmp	r3, #0
 80271ea:	d003      	beq.n	80271f4 <MQTTSerialize_connect+0x138>
		flags.bits.password = 1;
 80271ec:	7d3b      	ldrb	r3, [r7, #20]
 80271ee:	f043 0340 	orr.w	r3, r3, #64	@ 0x40
 80271f2:	753b      	strb	r3, [r7, #20]

	writeChar(&ptr, flags.all);
 80271f4:	7d3a      	ldrb	r2, [r7, #20]
 80271f6:	f107 031c 	add.w	r3, r7, #28
 80271fa:	4611      	mov	r1, r2
 80271fc:	4618      	mov	r0, r3
 80271fe:	f000 fa9c 	bl	802773a <writeChar>
	writeInt(&ptr, options->keepAliveInterval);
 8027202:	687b      	ldr	r3, [r7, #4]
 8027204:	8b1b      	ldrh	r3, [r3, #24]
 8027206:	461a      	mov	r2, r3
 8027208:	f107 031c 	add.w	r3, r7, #28
 802720c:	4611      	mov	r1, r2
 802720e:	4618      	mov	r0, r3
 8027210:	f000 faa8 	bl	8027764 <writeInt>
	writeMQTTString(&ptr, options->clientID);
 8027214:	687b      	ldr	r3, [r7, #4]
 8027216:	f107 001c 	add.w	r0, r7, #28
 802721a:	330c      	adds	r3, #12
 802721c:	cb0e      	ldmia	r3, {r1, r2, r3}
 802721e:	f000 fae9 	bl	80277f4 <writeMQTTString>
	if (options->willFlag)
 8027222:	687b      	ldr	r3, [r7, #4]
 8027224:	7edb      	ldrb	r3, [r3, #27]
 8027226:	2b00      	cmp	r3, #0
 8027228:	d00d      	beq.n	8027246 <MQTTSerialize_connect+0x18a>
	{
		writeMQTTString(&ptr, options->will.topicName);
 802722a:	687b      	ldr	r3, [r7, #4]
 802722c:	f107 001c 	add.w	r0, r7, #28
 8027230:	3324      	adds	r3, #36	@ 0x24
 8027232:	cb0e      	ldmia	r3, {r1, r2, r3}
 8027234:	f000 fade 	bl	80277f4 <writeMQTTString>
		writeMQTTString(&ptr, options->will.message);
 8027238:	687b      	ldr	r3, [r7, #4]
 802723a:	f107 001c 	add.w	r0, r7, #28
 802723e:	3330      	adds	r3, #48	@ 0x30
 8027240:	cb0e      	ldmia	r3, {r1, r2, r3}
 8027242:	f000 fad7 	bl	80277f4 <writeMQTTString>
	}
	if (flags.bits.username)
 8027246:	7d3b      	ldrb	r3, [r7, #20]
 8027248:	f023 037f 	bic.w	r3, r3, #127	@ 0x7f
 802724c:	b2db      	uxtb	r3, r3
 802724e:	2b00      	cmp	r3, #0
 8027250:	d006      	beq.n	8027260 <MQTTSerialize_connect+0x1a4>
		writeMQTTString(&ptr, options->username);
 8027252:	687b      	ldr	r3, [r7, #4]
 8027254:	f107 001c 	add.w	r0, r7, #28
 8027258:	3340      	adds	r3, #64	@ 0x40
 802725a:	cb0e      	ldmia	r3, {r1, r2, r3}
 802725c:	f000 faca 	bl	80277f4 <writeMQTTString>
	if (flags.bits.password)
 8027260:	7d3b      	ldrb	r3, [r7, #20]
 8027262:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 8027266:	b2db      	uxtb	r3, r3
 8027268:	2b00      	cmp	r3, #0
 802726a:	d006      	beq.n	802727a <MQTTSerialize_connect+0x1be>
		writeMQTTString(&ptr, options->password);
 802726c:	687b      	ldr	r3, [r7, #4]
 802726e:	f107 001c 	add.w	r0, r7, #28
 8027272:	334c      	adds	r3, #76	@ 0x4c
 8027274:	cb0e      	ldmia	r3, {r1, r2, r3}
 8027276:	f000 fabd 	bl	80277f4 <writeMQTTString>

	rc = ptr - buf;
 802727a:	69fa      	ldr	r2, [r7, #28]
 802727c:	68fb      	ldr	r3, [r7, #12]
 802727e:	1ad3      	subs	r3, r2, r3
 8027280:	627b      	str	r3, [r7, #36]	@ 0x24

	exit: FUNC_EXIT_RC(rc);
	return rc;
 8027282:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
}
 8027284:	4618      	mov	r0, r3
 8027286:	3728      	adds	r7, #40	@ 0x28
 8027288:	46bd      	mov	sp, r7
 802728a:	bd80      	pop	{r7, pc}
 802728c:	08030514 	.word	0x08030514
 8027290:	0803051c 	.word	0x0803051c

08027294 <MQTTDeserialize_connack>:
  * @param buf the raw buffer data, of the correct length determined by the remaining length field
  * @param len the length in bytes of the data in the supplied buffer
  * @return error code.  1 is success, 0 is failure
  */
int MQTTDeserialize_connack(unsigned char* sessionPresent, unsigned char* connack_rc, unsigned char* buf, int buflen)
{
 8027294:	b580      	push	{r7, lr}
 8027296:	b08a      	sub	sp, #40	@ 0x28
 8027298:	af00      	add	r7, sp, #0
 802729a:	60f8      	str	r0, [r7, #12]
 802729c:	60b9      	str	r1, [r7, #8]
 802729e:	607a      	str	r2, [r7, #4]
 80272a0:	603b      	str	r3, [r7, #0]
	MQTTHeader header = {0};
 80272a2:	2300      	movs	r3, #0
 80272a4:	61fb      	str	r3, [r7, #28]
	unsigned char* curdata = buf;
 80272a6:	687b      	ldr	r3, [r7, #4]
 80272a8:	61bb      	str	r3, [r7, #24]
	unsigned char* enddata = NULL;
 80272aa:	2300      	movs	r3, #0
 80272ac:	623b      	str	r3, [r7, #32]
	int rc = 0;
 80272ae:	2300      	movs	r3, #0
 80272b0:	627b      	str	r3, [r7, #36]	@ 0x24
	int mylen;
	MQTTConnackFlags flags = {0};
 80272b2:	2300      	movs	r3, #0
 80272b4:	613b      	str	r3, [r7, #16]

	FUNC_ENTRY;
	header.byte = readChar(&curdata);
 80272b6:	f107 0318 	add.w	r3, r7, #24
 80272ba:	4618      	mov	r0, r3
 80272bc:	f000 fa29 	bl	8027712 <readChar>
 80272c0:	4603      	mov	r3, r0
 80272c2:	773b      	strb	r3, [r7, #28]
	if (header.bits.type != CONNACK)
 80272c4:	7f3b      	ldrb	r3, [r7, #28]
 80272c6:	f023 030f 	bic.w	r3, r3, #15
 80272ca:	b2db      	uxtb	r3, r3
 80272cc:	2b20      	cmp	r3, #32
 80272ce:	d12e      	bne.n	802732e <MQTTDeserialize_connack+0x9a>
		goto exit;

	curdata += (rc = MQTTPacket_decodeBuf(curdata, &mylen)); /* read remaining length */
 80272d0:	69bb      	ldr	r3, [r7, #24]
 80272d2:	f107 0214 	add.w	r2, r7, #20
 80272d6:	4611      	mov	r1, r2
 80272d8:	4618      	mov	r0, r3
 80272da:	f000 f9e9 	bl	80276b0 <MQTTPacket_decodeBuf>
 80272de:	6278      	str	r0, [r7, #36]	@ 0x24
 80272e0:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 80272e2:	69bb      	ldr	r3, [r7, #24]
 80272e4:	4413      	add	r3, r2
 80272e6:	61bb      	str	r3, [r7, #24]
	enddata = curdata + mylen;
 80272e8:	69bb      	ldr	r3, [r7, #24]
 80272ea:	697a      	ldr	r2, [r7, #20]
 80272ec:	4413      	add	r3, r2
 80272ee:	623b      	str	r3, [r7, #32]
	if (enddata - curdata < 2)
 80272f0:	69bb      	ldr	r3, [r7, #24]
 80272f2:	6a3a      	ldr	r2, [r7, #32]
 80272f4:	1ad3      	subs	r3, r2, r3
 80272f6:	2b01      	cmp	r3, #1
 80272f8:	dd1b      	ble.n	8027332 <MQTTDeserialize_connack+0x9e>
		goto exit;

	flags.all = readChar(&curdata);
 80272fa:	f107 0318 	add.w	r3, r7, #24
 80272fe:	4618      	mov	r0, r3
 8027300:	f000 fa07 	bl	8027712 <readChar>
 8027304:	4603      	mov	r3, r0
 8027306:	743b      	strb	r3, [r7, #16]
	*sessionPresent = flags.bits.sessionpresent;
 8027308:	7c3b      	ldrb	r3, [r7, #16]
 802730a:	f3c3 0300 	ubfx	r3, r3, #0, #1
 802730e:	b2db      	uxtb	r3, r3
 8027310:	461a      	mov	r2, r3
 8027312:	68fb      	ldr	r3, [r7, #12]
 8027314:	701a      	strb	r2, [r3, #0]
	*connack_rc = readChar(&curdata);
 8027316:	f107 0318 	add.w	r3, r7, #24
 802731a:	4618      	mov	r0, r3
 802731c:	f000 f9f9 	bl	8027712 <readChar>
 8027320:	4603      	mov	r3, r0
 8027322:	461a      	mov	r2, r3
 8027324:	68bb      	ldr	r3, [r7, #8]
 8027326:	701a      	strb	r2, [r3, #0]

	rc = 1;
 8027328:	2301      	movs	r3, #1
 802732a:	627b      	str	r3, [r7, #36]	@ 0x24
 802732c:	e002      	b.n	8027334 <MQTTDeserialize_connack+0xa0>
		goto exit;
 802732e:	bf00      	nop
 8027330:	e000      	b.n	8027334 <MQTTDeserialize_connack+0xa0>
		goto exit;
 8027332:	bf00      	nop
exit:
	FUNC_EXIT_RC(rc);
	return rc;
 8027334:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
}
 8027336:	4618      	mov	r0, r3
 8027338:	3728      	adds	r7, #40	@ 0x28
 802733a:	46bd      	mov	sp, r7
 802733c:	bd80      	pop	{r7, pc}

0802733e <MQTTSerialize_zero>:
  * @param buflen the length in bytes of the supplied buffer, to avoid overruns
  * @param packettype the message type
  * @return serialized length, or error if 0
  */
int MQTTSerialize_zero(unsigned char* buf, int buflen, unsigned char packettype)
{
 802733e:	b580      	push	{r7, lr}
 8027340:	b088      	sub	sp, #32
 8027342:	af00      	add	r7, sp, #0
 8027344:	60f8      	str	r0, [r7, #12]
 8027346:	60b9      	str	r1, [r7, #8]
 8027348:	4613      	mov	r3, r2
 802734a:	71fb      	strb	r3, [r7, #7]
	MQTTHeader header = {0};
 802734c:	2300      	movs	r3, #0
 802734e:	61bb      	str	r3, [r7, #24]
	int rc = -1;
 8027350:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8027354:	61fb      	str	r3, [r7, #28]
	unsigned char *ptr = buf;
 8027356:	68fb      	ldr	r3, [r7, #12]
 8027358:	617b      	str	r3, [r7, #20]

	FUNC_ENTRY;
	if (buflen < 2)
 802735a:	68bb      	ldr	r3, [r7, #8]
 802735c:	2b01      	cmp	r3, #1
 802735e:	dc03      	bgt.n	8027368 <MQTTSerialize_zero+0x2a>
	{
		rc = MQTTPACKET_BUFFER_TOO_SHORT;
 8027360:	f06f 0301 	mvn.w	r3, #1
 8027364:	61fb      	str	r3, [r7, #28]
		goto exit;
 8027366:	e01d      	b.n	80273a4 <MQTTSerialize_zero+0x66>
	}
	header.byte = 0;
 8027368:	2300      	movs	r3, #0
 802736a:	763b      	strb	r3, [r7, #24]
	header.bits.type = packettype;
 802736c:	79fb      	ldrb	r3, [r7, #7]
 802736e:	f003 030f 	and.w	r3, r3, #15
 8027372:	b2da      	uxtb	r2, r3
 8027374:	7e3b      	ldrb	r3, [r7, #24]
 8027376:	f362 1307 	bfi	r3, r2, #4, #4
 802737a:	763b      	strb	r3, [r7, #24]
	writeChar(&ptr, header.byte); /* write header */
 802737c:	7e3a      	ldrb	r2, [r7, #24]
 802737e:	f107 0314 	add.w	r3, r7, #20
 8027382:	4611      	mov	r1, r2
 8027384:	4618      	mov	r0, r3
 8027386:	f000 f9d8 	bl	802773a <writeChar>

	ptr += MQTTPacket_encode(ptr, 0); /* write remaining length */
 802738a:	697b      	ldr	r3, [r7, #20]
 802738c:	2100      	movs	r1, #0
 802738e:	4618      	mov	r0, r3
 8027390:	f000 f8d9 	bl	8027546 <MQTTPacket_encode>
 8027394:	4602      	mov	r2, r0
 8027396:	697b      	ldr	r3, [r7, #20]
 8027398:	4413      	add	r3, r2
 802739a:	617b      	str	r3, [r7, #20]
	rc = ptr - buf;
 802739c:	697a      	ldr	r2, [r7, #20]
 802739e:	68fb      	ldr	r3, [r7, #12]
 80273a0:	1ad3      	subs	r3, r2, r3
 80273a2:	61fb      	str	r3, [r7, #28]
exit:
	FUNC_EXIT_RC(rc);
	return rc;
 80273a4:	69fb      	ldr	r3, [r7, #28]
}
 80273a6:	4618      	mov	r0, r3
 80273a8:	3720      	adds	r7, #32
 80273aa:	46bd      	mov	sp, r7
 80273ac:	bd80      	pop	{r7, pc}

080273ae <MQTTSerialize_pingreq>:
  * @param buf the buffer into which the packet will be serialized
  * @param buflen the length in bytes of the supplied buffer, to avoid overruns
  * @return serialized length, or error if 0
  */
int MQTTSerialize_pingreq(unsigned char* buf, int buflen)
{
 80273ae:	b580      	push	{r7, lr}
 80273b0:	b082      	sub	sp, #8
 80273b2:	af00      	add	r7, sp, #0
 80273b4:	6078      	str	r0, [r7, #4]
 80273b6:	6039      	str	r1, [r7, #0]
	return MQTTSerialize_zero(buf, buflen, PINGREQ);
 80273b8:	220c      	movs	r2, #12
 80273ba:	6839      	ldr	r1, [r7, #0]
 80273bc:	6878      	ldr	r0, [r7, #4]
 80273be:	f7ff ffbe 	bl	802733e <MQTTSerialize_zero>
 80273c2:	4603      	mov	r3, r0
}
 80273c4:	4618      	mov	r0, r3
 80273c6:	3708      	adds	r7, #8
 80273c8:	46bd      	mov	sp, r7
 80273ca:	bd80      	pop	{r7, pc}

080273cc <MQTTDeserialize_publish>:
  * @param buflen the length in bytes of the data in the supplied buffer
  * @return error code.  1 is success
  */
int MQTTDeserialize_publish(unsigned char* dup, int* qos, unsigned char* retained, unsigned short* packetid, MQTTString* topicName,
		unsigned char** payload, int* payloadlen, unsigned char* buf, int buflen)
{
 80273cc:	b580      	push	{r7, lr}
 80273ce:	b08a      	sub	sp, #40	@ 0x28
 80273d0:	af00      	add	r7, sp, #0
 80273d2:	60f8      	str	r0, [r7, #12]
 80273d4:	60b9      	str	r1, [r7, #8]
 80273d6:	607a      	str	r2, [r7, #4]
 80273d8:	603b      	str	r3, [r7, #0]
	MQTTHeader header = {0};
 80273da:	2300      	movs	r3, #0
 80273dc:	61fb      	str	r3, [r7, #28]
	unsigned char* curdata = buf;
 80273de:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 80273e0:	61bb      	str	r3, [r7, #24]
	unsigned char* enddata = NULL;
 80273e2:	2300      	movs	r3, #0
 80273e4:	623b      	str	r3, [r7, #32]
	int rc = 0;
 80273e6:	2300      	movs	r3, #0
 80273e8:	627b      	str	r3, [r7, #36]	@ 0x24
	int mylen = 0;
 80273ea:	2300      	movs	r3, #0
 80273ec:	617b      	str	r3, [r7, #20]

	FUNC_ENTRY;
	header.byte = readChar(&curdata);
 80273ee:	f107 0318 	add.w	r3, r7, #24
 80273f2:	4618      	mov	r0, r3
 80273f4:	f000 f98d 	bl	8027712 <readChar>
 80273f8:	4603      	mov	r3, r0
 80273fa:	773b      	strb	r3, [r7, #28]
	if (header.bits.type != PUBLISH)
 80273fc:	7f3b      	ldrb	r3, [r7, #28]
 80273fe:	f023 030f 	bic.w	r3, r3, #15
 8027402:	b2db      	uxtb	r3, r3
 8027404:	2b30      	cmp	r3, #48	@ 0x30
 8027406:	d14b      	bne.n	80274a0 <MQTTDeserialize_publish+0xd4>
		goto exit;
	*dup = header.bits.dup;
 8027408:	7f3b      	ldrb	r3, [r7, #28]
 802740a:	f3c3 03c0 	ubfx	r3, r3, #3, #1
 802740e:	b2db      	uxtb	r3, r3
 8027410:	461a      	mov	r2, r3
 8027412:	68fb      	ldr	r3, [r7, #12]
 8027414:	701a      	strb	r2, [r3, #0]
	*qos = header.bits.qos;
 8027416:	7f3b      	ldrb	r3, [r7, #28]
 8027418:	f3c3 0341 	ubfx	r3, r3, #1, #2
 802741c:	b2db      	uxtb	r3, r3
 802741e:	461a      	mov	r2, r3
 8027420:	68bb      	ldr	r3, [r7, #8]
 8027422:	601a      	str	r2, [r3, #0]
	*retained = header.bits.retain;
 8027424:	7f3b      	ldrb	r3, [r7, #28]
 8027426:	f3c3 0300 	ubfx	r3, r3, #0, #1
 802742a:	b2db      	uxtb	r3, r3
 802742c:	461a      	mov	r2, r3
 802742e:	687b      	ldr	r3, [r7, #4]
 8027430:	701a      	strb	r2, [r3, #0]

	curdata += (rc = MQTTPacket_decodeBuf(curdata, &mylen)); /* read remaining length */
 8027432:	69bb      	ldr	r3, [r7, #24]
 8027434:	f107 0214 	add.w	r2, r7, #20
 8027438:	4611      	mov	r1, r2
 802743a:	4618      	mov	r0, r3
 802743c:	f000 f938 	bl	80276b0 <MQTTPacket_decodeBuf>
 8027440:	6278      	str	r0, [r7, #36]	@ 0x24
 8027442:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8027444:	69bb      	ldr	r3, [r7, #24]
 8027446:	4413      	add	r3, r2
 8027448:	61bb      	str	r3, [r7, #24]
	enddata = curdata + mylen;
 802744a:	69bb      	ldr	r3, [r7, #24]
 802744c:	697a      	ldr	r2, [r7, #20]
 802744e:	4413      	add	r3, r2
 8027450:	623b      	str	r3, [r7, #32]

	if (!readMQTTLenString(topicName, &curdata, enddata) ||
 8027452:	f107 0318 	add.w	r3, r7, #24
 8027456:	6a3a      	ldr	r2, [r7, #32]
 8027458:	4619      	mov	r1, r3
 802745a:	6b38      	ldr	r0, [r7, #48]	@ 0x30
 802745c:	f000 f9f8 	bl	8027850 <readMQTTLenString>
 8027460:	4603      	mov	r3, r0
 8027462:	2b00      	cmp	r3, #0
 8027464:	d01e      	beq.n	80274a4 <MQTTDeserialize_publish+0xd8>
		enddata - curdata < 0) /* do we have enough data to read the protocol version byte? */
 8027466:	69bb      	ldr	r3, [r7, #24]
 8027468:	6a3a      	ldr	r2, [r7, #32]
 802746a:	1ad3      	subs	r3, r2, r3
	if (!readMQTTLenString(topicName, &curdata, enddata) ||
 802746c:	2b00      	cmp	r3, #0
 802746e:	db19      	blt.n	80274a4 <MQTTDeserialize_publish+0xd8>
		goto exit;

	if (*qos > 0)
 8027470:	68bb      	ldr	r3, [r7, #8]
 8027472:	681b      	ldr	r3, [r3, #0]
 8027474:	2b00      	cmp	r3, #0
 8027476:	dd08      	ble.n	802748a <MQTTDeserialize_publish+0xbe>
		*packetid = readInt(&curdata);
 8027478:	f107 0318 	add.w	r3, r7, #24
 802747c:	4618      	mov	r0, r3
 802747e:	f000 f92d 	bl	80276dc <readInt>
 8027482:	4603      	mov	r3, r0
 8027484:	b29a      	uxth	r2, r3
 8027486:	683b      	ldr	r3, [r7, #0]
 8027488:	801a      	strh	r2, [r3, #0]

	*payloadlen = enddata - curdata;
 802748a:	69bb      	ldr	r3, [r7, #24]
 802748c:	6a3a      	ldr	r2, [r7, #32]
 802748e:	1ad2      	subs	r2, r2, r3
 8027490:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8027492:	601a      	str	r2, [r3, #0]
	*payload = curdata;
 8027494:	69ba      	ldr	r2, [r7, #24]
 8027496:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8027498:	601a      	str	r2, [r3, #0]
	rc = 1;
 802749a:	2301      	movs	r3, #1
 802749c:	627b      	str	r3, [r7, #36]	@ 0x24
 802749e:	e002      	b.n	80274a6 <MQTTDeserialize_publish+0xda>
		goto exit;
 80274a0:	bf00      	nop
 80274a2:	e000      	b.n	80274a6 <MQTTDeserialize_publish+0xda>
		goto exit;
 80274a4:	bf00      	nop
exit:
	FUNC_EXIT_RC(rc);
	return rc;
 80274a6:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
}
 80274a8:	4618      	mov	r0, r3
 80274aa:	3728      	adds	r7, #40	@ 0x28
 80274ac:	46bd      	mov	sp, r7
 80274ae:	bd80      	pop	{r7, pc}

080274b0 <MQTTDeserialize_ack>:
  * @param buf the raw buffer data, of the correct length determined by the remaining length field
  * @param buflen the length in bytes of the data in the supplied buffer
  * @return error code.  1 is success, 0 is failure
  */
int MQTTDeserialize_ack(unsigned char* packettype, unsigned char* dup, unsigned short* packetid, unsigned char* buf, int buflen)
{
 80274b0:	b580      	push	{r7, lr}
 80274b2:	b08a      	sub	sp, #40	@ 0x28
 80274b4:	af00      	add	r7, sp, #0
 80274b6:	60f8      	str	r0, [r7, #12]
 80274b8:	60b9      	str	r1, [r7, #8]
 80274ba:	607a      	str	r2, [r7, #4]
 80274bc:	603b      	str	r3, [r7, #0]
	MQTTHeader header = {0};
 80274be:	2300      	movs	r3, #0
 80274c0:	61fb      	str	r3, [r7, #28]
	unsigned char* curdata = buf;
 80274c2:	683b      	ldr	r3, [r7, #0]
 80274c4:	61bb      	str	r3, [r7, #24]
	unsigned char* enddata = NULL;
 80274c6:	2300      	movs	r3, #0
 80274c8:	623b      	str	r3, [r7, #32]
	int rc = 0;
 80274ca:	2300      	movs	r3, #0
 80274cc:	627b      	str	r3, [r7, #36]	@ 0x24
	int mylen;

	FUNC_ENTRY;
	header.byte = readChar(&curdata);
 80274ce:	f107 0318 	add.w	r3, r7, #24
 80274d2:	4618      	mov	r0, r3
 80274d4:	f000 f91d 	bl	8027712 <readChar>
 80274d8:	4603      	mov	r3, r0
 80274da:	773b      	strb	r3, [r7, #28]
	*dup = header.bits.dup;
 80274dc:	7f3b      	ldrb	r3, [r7, #28]
 80274de:	f3c3 03c0 	ubfx	r3, r3, #3, #1
 80274e2:	b2db      	uxtb	r3, r3
 80274e4:	461a      	mov	r2, r3
 80274e6:	68bb      	ldr	r3, [r7, #8]
 80274e8:	701a      	strb	r2, [r3, #0]
	*packettype = header.bits.type;
 80274ea:	7f3b      	ldrb	r3, [r7, #28]
 80274ec:	f3c3 1303 	ubfx	r3, r3, #4, #4
 80274f0:	b2db      	uxtb	r3, r3
 80274f2:	461a      	mov	r2, r3
 80274f4:	68fb      	ldr	r3, [r7, #12]
 80274f6:	701a      	strb	r2, [r3, #0]

	curdata += (rc = MQTTPacket_decodeBuf(curdata, &mylen)); /* read remaining length */
 80274f8:	69bb      	ldr	r3, [r7, #24]
 80274fa:	f107 0214 	add.w	r2, r7, #20
 80274fe:	4611      	mov	r1, r2
 8027500:	4618      	mov	r0, r3
 8027502:	f000 f8d5 	bl	80276b0 <MQTTPacket_decodeBuf>
 8027506:	6278      	str	r0, [r7, #36]	@ 0x24
 8027508:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 802750a:	69bb      	ldr	r3, [r7, #24]
 802750c:	4413      	add	r3, r2
 802750e:	61bb      	str	r3, [r7, #24]
	enddata = curdata + mylen;
 8027510:	69bb      	ldr	r3, [r7, #24]
 8027512:	697a      	ldr	r2, [r7, #20]
 8027514:	4413      	add	r3, r2
 8027516:	623b      	str	r3, [r7, #32]

	if (enddata - curdata < 2)
 8027518:	69bb      	ldr	r3, [r7, #24]
 802751a:	6a3a      	ldr	r2, [r7, #32]
 802751c:	1ad3      	subs	r3, r2, r3
 802751e:	2b01      	cmp	r3, #1
 8027520:	dd0b      	ble.n	802753a <MQTTDeserialize_ack+0x8a>
		goto exit;
	*packetid = readInt(&curdata);
 8027522:	f107 0318 	add.w	r3, r7, #24
 8027526:	4618      	mov	r0, r3
 8027528:	f000 f8d8 	bl	80276dc <readInt>
 802752c:	4603      	mov	r3, r0
 802752e:	b29a      	uxth	r2, r3
 8027530:	687b      	ldr	r3, [r7, #4]
 8027532:	801a      	strh	r2, [r3, #0]

	rc = 1;
 8027534:	2301      	movs	r3, #1
 8027536:	627b      	str	r3, [r7, #36]	@ 0x24
 8027538:	e000      	b.n	802753c <MQTTDeserialize_ack+0x8c>
		goto exit;
 802753a:	bf00      	nop
exit:
	FUNC_EXIT_RC(rc);
	return rc;
 802753c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
}
 802753e:	4618      	mov	r0, r3
 8027540:	3728      	adds	r7, #40	@ 0x28
 8027542:	46bd      	mov	sp, r7
 8027544:	bd80      	pop	{r7, pc}

08027546 <MQTTPacket_encode>:
 * @param buf the buffer into which the encoded data is written
 * @param length the length to be encoded
 * @return the number of bytes written to buffer
 */
int MQTTPacket_encode(unsigned char* buf, int length)
{
 8027546:	b480      	push	{r7}
 8027548:	b085      	sub	sp, #20
 802754a:	af00      	add	r7, sp, #0
 802754c:	6078      	str	r0, [r7, #4]
 802754e:	6039      	str	r1, [r7, #0]
	int rc = 0;
 8027550:	2300      	movs	r3, #0
 8027552:	60fb      	str	r3, [r7, #12]

	FUNC_ENTRY;
	do
	{
		char d = length % 128;
 8027554:	683b      	ldr	r3, [r7, #0]
 8027556:	425a      	negs	r2, r3
 8027558:	f003 037f 	and.w	r3, r3, #127	@ 0x7f
 802755c:	f002 027f 	and.w	r2, r2, #127	@ 0x7f
 8027560:	bf58      	it	pl
 8027562:	4253      	negpl	r3, r2
 8027564:	72fb      	strb	r3, [r7, #11]
		length /= 128;
 8027566:	683b      	ldr	r3, [r7, #0]
 8027568:	2b00      	cmp	r3, #0
 802756a:	da00      	bge.n	802756e <MQTTPacket_encode+0x28>
 802756c:	337f      	adds	r3, #127	@ 0x7f
 802756e:	11db      	asrs	r3, r3, #7
 8027570:	603b      	str	r3, [r7, #0]
		/* if there are more digits to encode, set the top bit of this digit */
		if (length > 0)
 8027572:	683b      	ldr	r3, [r7, #0]
 8027574:	2b00      	cmp	r3, #0
 8027576:	dd03      	ble.n	8027580 <MQTTPacket_encode+0x3a>
			d |= 0x80;
 8027578:	7afb      	ldrb	r3, [r7, #11]
 802757a:	f063 037f 	orn	r3, r3, #127	@ 0x7f
 802757e:	72fb      	strb	r3, [r7, #11]
		buf[rc++] = d;
 8027580:	68fb      	ldr	r3, [r7, #12]
 8027582:	1c5a      	adds	r2, r3, #1
 8027584:	60fa      	str	r2, [r7, #12]
 8027586:	461a      	mov	r2, r3
 8027588:	687b      	ldr	r3, [r7, #4]
 802758a:	4413      	add	r3, r2
 802758c:	7afa      	ldrb	r2, [r7, #11]
 802758e:	701a      	strb	r2, [r3, #0]
	} while (length > 0);
 8027590:	683b      	ldr	r3, [r7, #0]
 8027592:	2b00      	cmp	r3, #0
 8027594:	dcde      	bgt.n	8027554 <MQTTPacket_encode+0xe>
	FUNC_EXIT_RC(rc);
	return rc;
 8027596:	68fb      	ldr	r3, [r7, #12]
}
 8027598:	4618      	mov	r0, r3
 802759a:	3714      	adds	r7, #20
 802759c:	46bd      	mov	sp, r7
 802759e:	f85d 7b04 	ldr.w	r7, [sp], #4
 80275a2:	4770      	bx	lr

080275a4 <MQTTPacket_decode>:
 * @param getcharfn pointer to function to read the next character from the data source
 * @param value the decoded length returned
 * @return the number of bytes read from the socket
 */
int MQTTPacket_decode(int (*getcharfn)(unsigned char*, int), int* value)
{
 80275a4:	b580      	push	{r7, lr}
 80275a6:	b086      	sub	sp, #24
 80275a8:	af00      	add	r7, sp, #0
 80275aa:	6078      	str	r0, [r7, #4]
 80275ac:	6039      	str	r1, [r7, #0]
	unsigned char c;
	int multiplier = 1;
 80275ae:	2301      	movs	r3, #1
 80275b0:	617b      	str	r3, [r7, #20]
	int len = 0;
 80275b2:	2300      	movs	r3, #0
 80275b4:	613b      	str	r3, [r7, #16]
#define MAX_NO_OF_REMAINING_LENGTH_BYTES 4

	FUNC_ENTRY;
	*value = 0;
 80275b6:	683b      	ldr	r3, [r7, #0]
 80275b8:	2200      	movs	r2, #0
 80275ba:	601a      	str	r2, [r3, #0]
	do
	{
		int rc = MQTTPACKET_READ_ERROR;
 80275bc:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80275c0:	60fb      	str	r3, [r7, #12]

		if (++len > MAX_NO_OF_REMAINING_LENGTH_BYTES)
 80275c2:	693b      	ldr	r3, [r7, #16]
 80275c4:	3301      	adds	r3, #1
 80275c6:	613b      	str	r3, [r7, #16]
 80275c8:	693b      	ldr	r3, [r7, #16]
 80275ca:	2b04      	cmp	r3, #4
 80275cc:	dd03      	ble.n	80275d6 <MQTTPacket_decode+0x32>
		{
			rc = MQTTPACKET_READ_ERROR;	/* bad data */
 80275ce:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80275d2:	60fb      	str	r3, [r7, #12]
			goto exit;
 80275d4:	e01d      	b.n	8027612 <MQTTPacket_decode+0x6e>
		}
		rc = (*getcharfn)(&c, 1);
 80275d6:	f107 020b 	add.w	r2, r7, #11
 80275da:	687b      	ldr	r3, [r7, #4]
 80275dc:	2101      	movs	r1, #1
 80275de:	4610      	mov	r0, r2
 80275e0:	4798      	blx	r3
 80275e2:	60f8      	str	r0, [r7, #12]
		if (rc != 1)
 80275e4:	68fb      	ldr	r3, [r7, #12]
 80275e6:	2b01      	cmp	r3, #1
 80275e8:	d112      	bne.n	8027610 <MQTTPacket_decode+0x6c>
			goto exit;
		*value += (c & 127) * multiplier;
 80275ea:	683b      	ldr	r3, [r7, #0]
 80275ec:	681a      	ldr	r2, [r3, #0]
 80275ee:	7afb      	ldrb	r3, [r7, #11]
 80275f0:	f003 037f 	and.w	r3, r3, #127	@ 0x7f
 80275f4:	6979      	ldr	r1, [r7, #20]
 80275f6:	fb01 f303 	mul.w	r3, r1, r3
 80275fa:	441a      	add	r2, r3
 80275fc:	683b      	ldr	r3, [r7, #0]
 80275fe:	601a      	str	r2, [r3, #0]
		multiplier *= 128;
 8027600:	697b      	ldr	r3, [r7, #20]
 8027602:	01db      	lsls	r3, r3, #7
 8027604:	617b      	str	r3, [r7, #20]
	} while ((c & 128) != 0);
 8027606:	7afb      	ldrb	r3, [r7, #11]
 8027608:	b25b      	sxtb	r3, r3
 802760a:	2b00      	cmp	r3, #0
 802760c:	dbd6      	blt.n	80275bc <MQTTPacket_decode+0x18>
exit:
 802760e:	e000      	b.n	8027612 <MQTTPacket_decode+0x6e>
			goto exit;
 8027610:	bf00      	nop
	FUNC_EXIT_RC(len);
	return len;
 8027612:	693b      	ldr	r3, [r7, #16]
}
 8027614:	4618      	mov	r0, r3
 8027616:	3718      	adds	r7, #24
 8027618:	46bd      	mov	sp, r7
 802761a:	bd80      	pop	{r7, pc}

0802761c <MQTTPacket_len>:


int MQTTPacket_len(int rem_len)
{
 802761c:	b480      	push	{r7}
 802761e:	b083      	sub	sp, #12
 8027620:	af00      	add	r7, sp, #0
 8027622:	6078      	str	r0, [r7, #4]
	rem_len += 1; /* header byte */
 8027624:	687b      	ldr	r3, [r7, #4]
 8027626:	3301      	adds	r3, #1
 8027628:	607b      	str	r3, [r7, #4]

	/* now remaining_length field */
	if (rem_len < 128)
 802762a:	687b      	ldr	r3, [r7, #4]
 802762c:	2b7f      	cmp	r3, #127	@ 0x7f
 802762e:	dc03      	bgt.n	8027638 <MQTTPacket_len+0x1c>
		rem_len += 1;
 8027630:	687b      	ldr	r3, [r7, #4]
 8027632:	3301      	adds	r3, #1
 8027634:	607b      	str	r3, [r7, #4]
 8027636:	e012      	b.n	802765e <MQTTPacket_len+0x42>
	else if (rem_len < 16384)
 8027638:	687b      	ldr	r3, [r7, #4]
 802763a:	f5b3 4f80 	cmp.w	r3, #16384	@ 0x4000
 802763e:	da03      	bge.n	8027648 <MQTTPacket_len+0x2c>
		rem_len += 2;
 8027640:	687b      	ldr	r3, [r7, #4]
 8027642:	3302      	adds	r3, #2
 8027644:	607b      	str	r3, [r7, #4]
 8027646:	e00a      	b.n	802765e <MQTTPacket_len+0x42>
	else if (rem_len < 2097151)
 8027648:	687b      	ldr	r3, [r7, #4]
 802764a:	4a08      	ldr	r2, [pc, #32]	@ (802766c <MQTTPacket_len+0x50>)
 802764c:	4293      	cmp	r3, r2
 802764e:	dc03      	bgt.n	8027658 <MQTTPacket_len+0x3c>
		rem_len += 3;
 8027650:	687b      	ldr	r3, [r7, #4]
 8027652:	3303      	adds	r3, #3
 8027654:	607b      	str	r3, [r7, #4]
 8027656:	e002      	b.n	802765e <MQTTPacket_len+0x42>
	else
		rem_len += 4;
 8027658:	687b      	ldr	r3, [r7, #4]
 802765a:	3304      	adds	r3, #4
 802765c:	607b      	str	r3, [r7, #4]
	return rem_len;
 802765e:	687b      	ldr	r3, [r7, #4]
}
 8027660:	4618      	mov	r0, r3
 8027662:	370c      	adds	r7, #12
 8027664:	46bd      	mov	sp, r7
 8027666:	f85d 7b04 	ldr.w	r7, [sp], #4
 802766a:	4770      	bx	lr
 802766c:	001ffffe 	.word	0x001ffffe

08027670 <bufchar>:


static unsigned char* bufptr;

int bufchar(unsigned char* c, int count)
{
 8027670:	b480      	push	{r7}
 8027672:	b085      	sub	sp, #20
 8027674:	af00      	add	r7, sp, #0
 8027676:	6078      	str	r0, [r7, #4]
 8027678:	6039      	str	r1, [r7, #0]
	int i;

	for (i = 0; i < count; ++i)
 802767a:	2300      	movs	r3, #0
 802767c:	60fb      	str	r3, [r7, #12]
 802767e:	e00a      	b.n	8027696 <bufchar+0x26>
		*c = *bufptr++;
 8027680:	4b0a      	ldr	r3, [pc, #40]	@ (80276ac <bufchar+0x3c>)
 8027682:	681b      	ldr	r3, [r3, #0]
 8027684:	1c5a      	adds	r2, r3, #1
 8027686:	4909      	ldr	r1, [pc, #36]	@ (80276ac <bufchar+0x3c>)
 8027688:	600a      	str	r2, [r1, #0]
 802768a:	781a      	ldrb	r2, [r3, #0]
 802768c:	687b      	ldr	r3, [r7, #4]
 802768e:	701a      	strb	r2, [r3, #0]
	for (i = 0; i < count; ++i)
 8027690:	68fb      	ldr	r3, [r7, #12]
 8027692:	3301      	adds	r3, #1
 8027694:	60fb      	str	r3, [r7, #12]
 8027696:	68fa      	ldr	r2, [r7, #12]
 8027698:	683b      	ldr	r3, [r7, #0]
 802769a:	429a      	cmp	r2, r3
 802769c:	dbf0      	blt.n	8027680 <bufchar+0x10>
	return count;
 802769e:	683b      	ldr	r3, [r7, #0]
}
 80276a0:	4618      	mov	r0, r3
 80276a2:	3714      	adds	r7, #20
 80276a4:	46bd      	mov	sp, r7
 80276a6:	f85d 7b04 	ldr.w	r7, [sp], #4
 80276aa:	4770      	bx	lr
 80276ac:	2402a19c 	.word	0x2402a19c

080276b0 <MQTTPacket_decodeBuf>:


int MQTTPacket_decodeBuf(unsigned char* buf, int* value)
{
 80276b0:	b580      	push	{r7, lr}
 80276b2:	b082      	sub	sp, #8
 80276b4:	af00      	add	r7, sp, #0
 80276b6:	6078      	str	r0, [r7, #4]
 80276b8:	6039      	str	r1, [r7, #0]
	bufptr = buf;
 80276ba:	4a06      	ldr	r2, [pc, #24]	@ (80276d4 <MQTTPacket_decodeBuf+0x24>)
 80276bc:	687b      	ldr	r3, [r7, #4]
 80276be:	6013      	str	r3, [r2, #0]
	return MQTTPacket_decode(bufchar, value);
 80276c0:	6839      	ldr	r1, [r7, #0]
 80276c2:	4805      	ldr	r0, [pc, #20]	@ (80276d8 <MQTTPacket_decodeBuf+0x28>)
 80276c4:	f7ff ff6e 	bl	80275a4 <MQTTPacket_decode>
 80276c8:	4603      	mov	r3, r0
}
 80276ca:	4618      	mov	r0, r3
 80276cc:	3708      	adds	r7, #8
 80276ce:	46bd      	mov	sp, r7
 80276d0:	bd80      	pop	{r7, pc}
 80276d2:	bf00      	nop
 80276d4:	2402a19c 	.word	0x2402a19c
 80276d8:	08027671 	.word	0x08027671

080276dc <readInt>:
 * Calculates an integer from two bytes read from the input buffer
 * @param pptr pointer to the input buffer - incremented by the number of bytes used & returned
 * @return the integer value calculated
 */
int readInt(unsigned char** pptr)
{
 80276dc:	b480      	push	{r7}
 80276de:	b085      	sub	sp, #20
 80276e0:	af00      	add	r7, sp, #0
 80276e2:	6078      	str	r0, [r7, #4]
	unsigned char* ptr = *pptr;
 80276e4:	687b      	ldr	r3, [r7, #4]
 80276e6:	681b      	ldr	r3, [r3, #0]
 80276e8:	60fb      	str	r3, [r7, #12]
	int len = 256*(*ptr) + (*(ptr+1));
 80276ea:	68fb      	ldr	r3, [r7, #12]
 80276ec:	781b      	ldrb	r3, [r3, #0]
 80276ee:	021b      	lsls	r3, r3, #8
 80276f0:	68fa      	ldr	r2, [r7, #12]
 80276f2:	3201      	adds	r2, #1
 80276f4:	7812      	ldrb	r2, [r2, #0]
 80276f6:	4413      	add	r3, r2
 80276f8:	60bb      	str	r3, [r7, #8]
	*pptr += 2;
 80276fa:	687b      	ldr	r3, [r7, #4]
 80276fc:	681b      	ldr	r3, [r3, #0]
 80276fe:	1c9a      	adds	r2, r3, #2
 8027700:	687b      	ldr	r3, [r7, #4]
 8027702:	601a      	str	r2, [r3, #0]
	return len;
 8027704:	68bb      	ldr	r3, [r7, #8]
}
 8027706:	4618      	mov	r0, r3
 8027708:	3714      	adds	r7, #20
 802770a:	46bd      	mov	sp, r7
 802770c:	f85d 7b04 	ldr.w	r7, [sp], #4
 8027710:	4770      	bx	lr

08027712 <readChar>:
 * Reads one character from the input buffer.
 * @param pptr pointer to the input buffer - incremented by the number of bytes used & returned
 * @return the character read
 */
char readChar(unsigned char** pptr)
{
 8027712:	b480      	push	{r7}
 8027714:	b085      	sub	sp, #20
 8027716:	af00      	add	r7, sp, #0
 8027718:	6078      	str	r0, [r7, #4]
	char c = **pptr;
 802771a:	687b      	ldr	r3, [r7, #4]
 802771c:	681b      	ldr	r3, [r3, #0]
 802771e:	781b      	ldrb	r3, [r3, #0]
 8027720:	73fb      	strb	r3, [r7, #15]
	(*pptr)++;
 8027722:	687b      	ldr	r3, [r7, #4]
 8027724:	681b      	ldr	r3, [r3, #0]
 8027726:	1c5a      	adds	r2, r3, #1
 8027728:	687b      	ldr	r3, [r7, #4]
 802772a:	601a      	str	r2, [r3, #0]
	return c;
 802772c:	7bfb      	ldrb	r3, [r7, #15]
}
 802772e:	4618      	mov	r0, r3
 8027730:	3714      	adds	r7, #20
 8027732:	46bd      	mov	sp, r7
 8027734:	f85d 7b04 	ldr.w	r7, [sp], #4
 8027738:	4770      	bx	lr

0802773a <writeChar>:
 * Writes one character to an output buffer.
 * @param pptr pointer to the output buffer - incremented by the number of bytes used & returned
 * @param c the character to write
 */
void writeChar(unsigned char** pptr, char c)
{
 802773a:	b480      	push	{r7}
 802773c:	b083      	sub	sp, #12
 802773e:	af00      	add	r7, sp, #0
 8027740:	6078      	str	r0, [r7, #4]
 8027742:	460b      	mov	r3, r1
 8027744:	70fb      	strb	r3, [r7, #3]
	**pptr = c;
 8027746:	687b      	ldr	r3, [r7, #4]
 8027748:	681b      	ldr	r3, [r3, #0]
 802774a:	78fa      	ldrb	r2, [r7, #3]
 802774c:	701a      	strb	r2, [r3, #0]
	(*pptr)++;
 802774e:	687b      	ldr	r3, [r7, #4]
 8027750:	681b      	ldr	r3, [r3, #0]
 8027752:	1c5a      	adds	r2, r3, #1
 8027754:	687b      	ldr	r3, [r7, #4]
 8027756:	601a      	str	r2, [r3, #0]
}
 8027758:	bf00      	nop
 802775a:	370c      	adds	r7, #12
 802775c:	46bd      	mov	sp, r7
 802775e:	f85d 7b04 	ldr.w	r7, [sp], #4
 8027762:	4770      	bx	lr

08027764 <writeInt>:
 * Writes an integer as 2 bytes to an output buffer.
 * @param pptr pointer to the output buffer - incremented by the number of bytes used & returned
 * @param anInt the integer to write
 */
void writeInt(unsigned char** pptr, int anInt)
{
 8027764:	b480      	push	{r7}
 8027766:	b083      	sub	sp, #12
 8027768:	af00      	add	r7, sp, #0
 802776a:	6078      	str	r0, [r7, #4]
 802776c:	6039      	str	r1, [r7, #0]
	**pptr = (unsigned char)(anInt / 256);
 802776e:	683b      	ldr	r3, [r7, #0]
 8027770:	2b00      	cmp	r3, #0
 8027772:	da00      	bge.n	8027776 <writeInt+0x12>
 8027774:	33ff      	adds	r3, #255	@ 0xff
 8027776:	121b      	asrs	r3, r3, #8
 8027778:	461a      	mov	r2, r3
 802777a:	687b      	ldr	r3, [r7, #4]
 802777c:	681b      	ldr	r3, [r3, #0]
 802777e:	b2d2      	uxtb	r2, r2
 8027780:	701a      	strb	r2, [r3, #0]
	(*pptr)++;
 8027782:	687b      	ldr	r3, [r7, #4]
 8027784:	681b      	ldr	r3, [r3, #0]
 8027786:	1c5a      	adds	r2, r3, #1
 8027788:	687b      	ldr	r3, [r7, #4]
 802778a:	601a      	str	r2, [r3, #0]
	**pptr = (unsigned char)(anInt % 256);
 802778c:	683b      	ldr	r3, [r7, #0]
 802778e:	425a      	negs	r2, r3
 8027790:	b2db      	uxtb	r3, r3
 8027792:	b2d2      	uxtb	r2, r2
 8027794:	bf58      	it	pl
 8027796:	4253      	negpl	r3, r2
 8027798:	687a      	ldr	r2, [r7, #4]
 802779a:	6812      	ldr	r2, [r2, #0]
 802779c:	b2db      	uxtb	r3, r3
 802779e:	7013      	strb	r3, [r2, #0]
	(*pptr)++;
 80277a0:	687b      	ldr	r3, [r7, #4]
 80277a2:	681b      	ldr	r3, [r3, #0]
 80277a4:	1c5a      	adds	r2, r3, #1
 80277a6:	687b      	ldr	r3, [r7, #4]
 80277a8:	601a      	str	r2, [r3, #0]
}
 80277aa:	bf00      	nop
 80277ac:	370c      	adds	r7, #12
 80277ae:	46bd      	mov	sp, r7
 80277b0:	f85d 7b04 	ldr.w	r7, [sp], #4
 80277b4:	4770      	bx	lr

080277b6 <writeCString>:
 * Writes a "UTF" string to an output buffer.  Converts C string to length-delimited.
 * @param pptr pointer to the output buffer - incremented by the number of bytes used & returned
 * @param string the C string to write
 */
void writeCString(unsigned char** pptr, const char* string)
{
 80277b6:	b580      	push	{r7, lr}
 80277b8:	b084      	sub	sp, #16
 80277ba:	af00      	add	r7, sp, #0
 80277bc:	6078      	str	r0, [r7, #4]
 80277be:	6039      	str	r1, [r7, #0]
	int len = strlen(string);
 80277c0:	6838      	ldr	r0, [r7, #0]
 80277c2:	f7d8 fded 	bl	80003a0 <strlen>
 80277c6:	4603      	mov	r3, r0
 80277c8:	60fb      	str	r3, [r7, #12]
	writeInt(pptr, len);
 80277ca:	68f9      	ldr	r1, [r7, #12]
 80277cc:	6878      	ldr	r0, [r7, #4]
 80277ce:	f7ff ffc9 	bl	8027764 <writeInt>
	memcpy(*pptr, string, len);
 80277d2:	687b      	ldr	r3, [r7, #4]
 80277d4:	681b      	ldr	r3, [r3, #0]
 80277d6:	68fa      	ldr	r2, [r7, #12]
 80277d8:	6839      	ldr	r1, [r7, #0]
 80277da:	4618      	mov	r0, r3
 80277dc:	f002 f91f 	bl	8029a1e <memcpy>
	*pptr += len;
 80277e0:	687b      	ldr	r3, [r7, #4]
 80277e2:	681a      	ldr	r2, [r3, #0]
 80277e4:	68fb      	ldr	r3, [r7, #12]
 80277e6:	441a      	add	r2, r3
 80277e8:	687b      	ldr	r3, [r7, #4]
 80277ea:	601a      	str	r2, [r3, #0]
}
 80277ec:	bf00      	nop
 80277ee:	3710      	adds	r7, #16
 80277f0:	46bd      	mov	sp, r7
 80277f2:	bd80      	pop	{r7, pc}

080277f4 <writeMQTTString>:
	return len;
}


void writeMQTTString(unsigned char** pptr, MQTTString mqttstring)
{
 80277f4:	b580      	push	{r7, lr}
 80277f6:	b084      	sub	sp, #16
 80277f8:	af00      	add	r7, sp, #0
 80277fa:	60f8      	str	r0, [r7, #12]
 80277fc:	4638      	mov	r0, r7
 80277fe:	e880 000e 	stmia.w	r0, {r1, r2, r3}
	if (mqttstring.lenstring.len > 0)
 8027802:	687b      	ldr	r3, [r7, #4]
 8027804:	2b00      	cmp	r3, #0
 8027806:	dd12      	ble.n	802782e <writeMQTTString+0x3a>
	{
		writeInt(pptr, mqttstring.lenstring.len);
 8027808:	687b      	ldr	r3, [r7, #4]
 802780a:	4619      	mov	r1, r3
 802780c:	68f8      	ldr	r0, [r7, #12]
 802780e:	f7ff ffa9 	bl	8027764 <writeInt>
		memcpy(*pptr, mqttstring.lenstring.data, mqttstring.lenstring.len);
 8027812:	68fb      	ldr	r3, [r7, #12]
 8027814:	681b      	ldr	r3, [r3, #0]
 8027816:	68b9      	ldr	r1, [r7, #8]
 8027818:	687a      	ldr	r2, [r7, #4]
 802781a:	4618      	mov	r0, r3
 802781c:	f002 f8ff 	bl	8029a1e <memcpy>
		*pptr += mqttstring.lenstring.len;
 8027820:	68fb      	ldr	r3, [r7, #12]
 8027822:	681b      	ldr	r3, [r3, #0]
 8027824:	687a      	ldr	r2, [r7, #4]
 8027826:	441a      	add	r2, r3
 8027828:	68fb      	ldr	r3, [r7, #12]
 802782a:	601a      	str	r2, [r3, #0]
	}
	else if (mqttstring.cstring)
		writeCString(pptr, mqttstring.cstring);
	else
		writeInt(pptr, 0);
}
 802782c:	e00c      	b.n	8027848 <writeMQTTString+0x54>
	else if (mqttstring.cstring)
 802782e:	683b      	ldr	r3, [r7, #0]
 8027830:	2b00      	cmp	r3, #0
 8027832:	d005      	beq.n	8027840 <writeMQTTString+0x4c>
		writeCString(pptr, mqttstring.cstring);
 8027834:	683b      	ldr	r3, [r7, #0]
 8027836:	4619      	mov	r1, r3
 8027838:	68f8      	ldr	r0, [r7, #12]
 802783a:	f7ff ffbc 	bl	80277b6 <writeCString>
}
 802783e:	e003      	b.n	8027848 <writeMQTTString+0x54>
		writeInt(pptr, 0);
 8027840:	2100      	movs	r1, #0
 8027842:	68f8      	ldr	r0, [r7, #12]
 8027844:	f7ff ff8e 	bl	8027764 <writeInt>
}
 8027848:	bf00      	nop
 802784a:	3710      	adds	r7, #16
 802784c:	46bd      	mov	sp, r7
 802784e:	bd80      	pop	{r7, pc}

08027850 <readMQTTLenString>:
 * @param pptr pointer to the output buffer - incremented by the number of bytes used & returned
 * @param enddata pointer to the end of the data: do not read beyond
 * @return 1 if successful, 0 if not
 */
int readMQTTLenString(MQTTString* mqttstring, unsigned char** pptr, unsigned char* enddata)
{
 8027850:	b580      	push	{r7, lr}
 8027852:	b086      	sub	sp, #24
 8027854:	af00      	add	r7, sp, #0
 8027856:	60f8      	str	r0, [r7, #12]
 8027858:	60b9      	str	r1, [r7, #8]
 802785a:	607a      	str	r2, [r7, #4]
	int rc = 0;
 802785c:	2300      	movs	r3, #0
 802785e:	617b      	str	r3, [r7, #20]

	FUNC_ENTRY;
	/* the first two bytes are the length of the string */
	if (enddata - (*pptr) > 1) /* enough length to read the integer? */
 8027860:	68bb      	ldr	r3, [r7, #8]
 8027862:	681b      	ldr	r3, [r3, #0]
 8027864:	687a      	ldr	r2, [r7, #4]
 8027866:	1ad3      	subs	r3, r2, r3
 8027868:	2b01      	cmp	r3, #1
 802786a:	dd1a      	ble.n	80278a2 <readMQTTLenString+0x52>
	{
		mqttstring->lenstring.len = readInt(pptr); /* increments pptr to point past length */
 802786c:	68b8      	ldr	r0, [r7, #8]
 802786e:	f7ff ff35 	bl	80276dc <readInt>
 8027872:	4602      	mov	r2, r0
 8027874:	68fb      	ldr	r3, [r7, #12]
 8027876:	605a      	str	r2, [r3, #4]
		if (&(*pptr)[mqttstring->lenstring.len] <= enddata)
 8027878:	68bb      	ldr	r3, [r7, #8]
 802787a:	681b      	ldr	r3, [r3, #0]
 802787c:	68fa      	ldr	r2, [r7, #12]
 802787e:	6852      	ldr	r2, [r2, #4]
 8027880:	4413      	add	r3, r2
 8027882:	687a      	ldr	r2, [r7, #4]
 8027884:	429a      	cmp	r2, r3
 8027886:	d30c      	bcc.n	80278a2 <readMQTTLenString+0x52>
		{
			mqttstring->lenstring.data = (char*)*pptr;
 8027888:	68bb      	ldr	r3, [r7, #8]
 802788a:	681a      	ldr	r2, [r3, #0]
 802788c:	68fb      	ldr	r3, [r7, #12]
 802788e:	609a      	str	r2, [r3, #8]
			*pptr += mqttstring->lenstring.len;
 8027890:	68bb      	ldr	r3, [r7, #8]
 8027892:	681b      	ldr	r3, [r3, #0]
 8027894:	68fa      	ldr	r2, [r7, #12]
 8027896:	6852      	ldr	r2, [r2, #4]
 8027898:	441a      	add	r2, r3
 802789a:	68bb      	ldr	r3, [r7, #8]
 802789c:	601a      	str	r2, [r3, #0]
			rc = 1;
 802789e:	2301      	movs	r3, #1
 80278a0:	617b      	str	r3, [r7, #20]
		}
	}
	mqttstring->cstring = NULL;
 80278a2:	68fb      	ldr	r3, [r7, #12]
 80278a4:	2200      	movs	r2, #0
 80278a6:	601a      	str	r2, [r3, #0]
	FUNC_EXIT_RC(rc);
	return rc;
 80278a8:	697b      	ldr	r3, [r7, #20]
}
 80278aa:	4618      	mov	r0, r3
 80278ac:	3718      	adds	r7, #24
 80278ae:	46bd      	mov	sp, r7
 80278b0:	bd80      	pop	{r7, pc}

080278b2 <MQTTstrlen>:
 * Return the length of the MQTTstring - C string if there is one, otherwise the length delimited string
 * @param mqttstring the string to return the length of
 * @return the length of the string
 */
int MQTTstrlen(MQTTString mqttstring)
{
 80278b2:	b580      	push	{r7, lr}
 80278b4:	b086      	sub	sp, #24
 80278b6:	af00      	add	r7, sp, #0
 80278b8:	1d3b      	adds	r3, r7, #4
 80278ba:	e883 0007 	stmia.w	r3, {r0, r1, r2}
	int rc = 0;
 80278be:	2300      	movs	r3, #0
 80278c0:	617b      	str	r3, [r7, #20]

	if (mqttstring.cstring)
 80278c2:	687b      	ldr	r3, [r7, #4]
 80278c4:	2b00      	cmp	r3, #0
 80278c6:	d006      	beq.n	80278d6 <MQTTstrlen+0x24>
		rc = strlen(mqttstring.cstring);
 80278c8:	687b      	ldr	r3, [r7, #4]
 80278ca:	4618      	mov	r0, r3
 80278cc:	f7d8 fd68 	bl	80003a0 <strlen>
 80278d0:	4603      	mov	r3, r0
 80278d2:	617b      	str	r3, [r7, #20]
 80278d4:	e001      	b.n	80278da <MQTTstrlen+0x28>
	else
		rc = mqttstring.lenstring.len;
 80278d6:	68bb      	ldr	r3, [r7, #8]
 80278d8:	617b      	str	r3, [r7, #20]
	return rc;
 80278da:	697b      	ldr	r3, [r7, #20]
}
 80278dc:	4618      	mov	r0, r3
 80278de:	3718      	adds	r7, #24
 80278e0:	46bd      	mov	sp, r7
 80278e2:	bd80      	pop	{r7, pc}

080278e4 <MQTTPacket_equals>:
 * @param a the MQTTString to compare
 * @param bptr the C string to compare
 * @return boolean - equal or not
 */
int MQTTPacket_equals(MQTTString* a, char* bptr)
{
 80278e4:	b580      	push	{r7, lr}
 80278e6:	b086      	sub	sp, #24
 80278e8:	af00      	add	r7, sp, #0
 80278ea:	6078      	str	r0, [r7, #4]
 80278ec:	6039      	str	r1, [r7, #0]
	int alen = 0,
 80278ee:	2300      	movs	r3, #0
 80278f0:	617b      	str	r3, [r7, #20]
		blen = 0;
 80278f2:	2300      	movs	r3, #0
 80278f4:	60fb      	str	r3, [r7, #12]
	char *aptr;
	
	if (a->cstring)
 80278f6:	687b      	ldr	r3, [r7, #4]
 80278f8:	681b      	ldr	r3, [r3, #0]
 80278fa:	2b00      	cmp	r3, #0
 80278fc:	d00a      	beq.n	8027914 <MQTTPacket_equals+0x30>
	{
		aptr = a->cstring;
 80278fe:	687b      	ldr	r3, [r7, #4]
 8027900:	681b      	ldr	r3, [r3, #0]
 8027902:	613b      	str	r3, [r7, #16]
		alen = strlen(a->cstring);
 8027904:	687b      	ldr	r3, [r7, #4]
 8027906:	681b      	ldr	r3, [r3, #0]
 8027908:	4618      	mov	r0, r3
 802790a:	f7d8 fd49 	bl	80003a0 <strlen>
 802790e:	4603      	mov	r3, r0
 8027910:	617b      	str	r3, [r7, #20]
 8027912:	e005      	b.n	8027920 <MQTTPacket_equals+0x3c>
	}
	else
	{
		aptr = a->lenstring.data;
 8027914:	687b      	ldr	r3, [r7, #4]
 8027916:	689b      	ldr	r3, [r3, #8]
 8027918:	613b      	str	r3, [r7, #16]
		alen = a->lenstring.len;
 802791a:	687b      	ldr	r3, [r7, #4]
 802791c:	685b      	ldr	r3, [r3, #4]
 802791e:	617b      	str	r3, [r7, #20]
	}
	blen = strlen(bptr);
 8027920:	6838      	ldr	r0, [r7, #0]
 8027922:	f7d8 fd3d 	bl	80003a0 <strlen>
 8027926:	4603      	mov	r3, r0
 8027928:	60fb      	str	r3, [r7, #12]
	
	return (alen == blen) && (strncmp(aptr, bptr, alen) == 0);
 802792a:	697a      	ldr	r2, [r7, #20]
 802792c:	68fb      	ldr	r3, [r7, #12]
 802792e:	429a      	cmp	r2, r3
 8027930:	d10a      	bne.n	8027948 <MQTTPacket_equals+0x64>
 8027932:	697b      	ldr	r3, [r7, #20]
 8027934:	461a      	mov	r2, r3
 8027936:	6839      	ldr	r1, [r7, #0]
 8027938:	6938      	ldr	r0, [r7, #16]
 802793a:	f001 ff81 	bl	8029840 <strncmp>
 802793e:	4603      	mov	r3, r0
 8027940:	2b00      	cmp	r3, #0
 8027942:	d101      	bne.n	8027948 <MQTTPacket_equals+0x64>
 8027944:	2301      	movs	r3, #1
 8027946:	e000      	b.n	802794a <MQTTPacket_equals+0x66>
 8027948:	2300      	movs	r3, #0
}
 802794a:	4618      	mov	r0, r3
 802794c:	3718      	adds	r7, #24
 802794e:	46bd      	mov	sp, r7
 8027950:	bd80      	pop	{r7, pc}

08027952 <MQTTSerialize_publishLength>:
  * @param topicName the topic name to be used in the publish  
  * @param payloadlen the length of the payload to be sent
  * @return the length of buffer needed to contain the serialized version of the packet
  */
int MQTTSerialize_publishLength(int qos, MQTTString topicName, int payloadlen)
{
 8027952:	b580      	push	{r7, lr}
 8027954:	b086      	sub	sp, #24
 8027956:	af00      	add	r7, sp, #0
 8027958:	60f8      	str	r0, [r7, #12]
 802795a:	4638      	mov	r0, r7
 802795c:	e880 000e 	stmia.w	r0, {r1, r2, r3}
	int len = 0;
 8027960:	2300      	movs	r3, #0
 8027962:	617b      	str	r3, [r7, #20]

	len += 2 + MQTTstrlen(topicName) + payloadlen;
 8027964:	463b      	mov	r3, r7
 8027966:	e893 0007 	ldmia.w	r3, {r0, r1, r2}
 802796a:	f7ff ffa2 	bl	80278b2 <MQTTstrlen>
 802796e:	4603      	mov	r3, r0
 8027970:	1c9a      	adds	r2, r3, #2
 8027972:	6a3b      	ldr	r3, [r7, #32]
 8027974:	4413      	add	r3, r2
 8027976:	697a      	ldr	r2, [r7, #20]
 8027978:	4413      	add	r3, r2
 802797a:	617b      	str	r3, [r7, #20]
	if (qos > 0)
 802797c:	68fb      	ldr	r3, [r7, #12]
 802797e:	2b00      	cmp	r3, #0
 8027980:	dd02      	ble.n	8027988 <MQTTSerialize_publishLength+0x36>
		len += 2; /* packetid */
 8027982:	697b      	ldr	r3, [r7, #20]
 8027984:	3302      	adds	r3, #2
 8027986:	617b      	str	r3, [r7, #20]
	return len;
 8027988:	697b      	ldr	r3, [r7, #20]
}
 802798a:	4618      	mov	r0, r3
 802798c:	3718      	adds	r7, #24
 802798e:	46bd      	mov	sp, r7
 8027990:	bd80      	pop	{r7, pc}

08027992 <MQTTSerialize_publish>:
  * @param payloadlen integer - the length of the MQTT payload
  * @return the length of the serialized data.  <= 0 indicates error
  */
int MQTTSerialize_publish(unsigned char* buf, int buflen, unsigned char dup, int qos, unsigned char retained, unsigned short packetid,
		MQTTString topicName, unsigned char* payload, int payloadlen)
{
 8027992:	b580      	push	{r7, lr}
 8027994:	b08a      	sub	sp, #40	@ 0x28
 8027996:	af02      	add	r7, sp, #8
 8027998:	60f8      	str	r0, [r7, #12]
 802799a:	60b9      	str	r1, [r7, #8]
 802799c:	603b      	str	r3, [r7, #0]
 802799e:	4613      	mov	r3, r2
 80279a0:	71fb      	strb	r3, [r7, #7]
	unsigned char *ptr = buf;
 80279a2:	68fb      	ldr	r3, [r7, #12]
 80279a4:	617b      	str	r3, [r7, #20]
	MQTTHeader header = {0};
 80279a6:	2300      	movs	r3, #0
 80279a8:	613b      	str	r3, [r7, #16]
	int rem_len = 0;
 80279aa:	2300      	movs	r3, #0
 80279ac:	61bb      	str	r3, [r7, #24]
	int rc = 0;
 80279ae:	2300      	movs	r3, #0
 80279b0:	61fb      	str	r3, [r7, #28]

	FUNC_ENTRY;
	if (MQTTPacket_len(rem_len = MQTTSerialize_publishLength(qos, topicName, payloadlen)) > buflen)
 80279b2:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 80279b4:	9300      	str	r3, [sp, #0]
 80279b6:	f107 0330 	add.w	r3, r7, #48	@ 0x30
 80279ba:	cb0e      	ldmia	r3, {r1, r2, r3}
 80279bc:	6838      	ldr	r0, [r7, #0]
 80279be:	f7ff ffc8 	bl	8027952 <MQTTSerialize_publishLength>
 80279c2:	61b8      	str	r0, [r7, #24]
 80279c4:	69b8      	ldr	r0, [r7, #24]
 80279c6:	f7ff fe29 	bl	802761c <MQTTPacket_len>
 80279ca:	4602      	mov	r2, r0
 80279cc:	68bb      	ldr	r3, [r7, #8]
 80279ce:	4293      	cmp	r3, r2
 80279d0:	da03      	bge.n	80279da <MQTTSerialize_publish+0x48>
	{
		rc = MQTTPACKET_BUFFER_TOO_SHORT;
 80279d2:	f06f 0301 	mvn.w	r3, #1
 80279d6:	61fb      	str	r3, [r7, #28]
		goto exit;
 80279d8:	e04c      	b.n	8027a74 <MQTTSerialize_publish+0xe2>
	}

	header.bits.type = PUBLISH;
 80279da:	7c3b      	ldrb	r3, [r7, #16]
 80279dc:	2203      	movs	r2, #3
 80279de:	f362 1307 	bfi	r3, r2, #4, #4
 80279e2:	743b      	strb	r3, [r7, #16]
	header.bits.dup = dup;
 80279e4:	79fb      	ldrb	r3, [r7, #7]
 80279e6:	f003 0301 	and.w	r3, r3, #1
 80279ea:	b2da      	uxtb	r2, r3
 80279ec:	7c3b      	ldrb	r3, [r7, #16]
 80279ee:	f362 03c3 	bfi	r3, r2, #3, #1
 80279f2:	743b      	strb	r3, [r7, #16]
	header.bits.qos = qos;
 80279f4:	683b      	ldr	r3, [r7, #0]
 80279f6:	f003 0303 	and.w	r3, r3, #3
 80279fa:	b2da      	uxtb	r2, r3
 80279fc:	7c3b      	ldrb	r3, [r7, #16]
 80279fe:	f362 0342 	bfi	r3, r2, #1, #2
 8027a02:	743b      	strb	r3, [r7, #16]
	header.bits.retain = retained;
 8027a04:	f897 3028 	ldrb.w	r3, [r7, #40]	@ 0x28
 8027a08:	f003 0301 	and.w	r3, r3, #1
 8027a0c:	b2da      	uxtb	r2, r3
 8027a0e:	7c3b      	ldrb	r3, [r7, #16]
 8027a10:	f362 0300 	bfi	r3, r2, #0, #1
 8027a14:	743b      	strb	r3, [r7, #16]
	writeChar(&ptr, header.byte); /* write header */
 8027a16:	7c3a      	ldrb	r2, [r7, #16]
 8027a18:	f107 0314 	add.w	r3, r7, #20
 8027a1c:	4611      	mov	r1, r2
 8027a1e:	4618      	mov	r0, r3
 8027a20:	f7ff fe8b 	bl	802773a <writeChar>

	ptr += MQTTPacket_encode(ptr, rem_len); /* write remaining length */;
 8027a24:	697b      	ldr	r3, [r7, #20]
 8027a26:	69b9      	ldr	r1, [r7, #24]
 8027a28:	4618      	mov	r0, r3
 8027a2a:	f7ff fd8c 	bl	8027546 <MQTTPacket_encode>
 8027a2e:	4602      	mov	r2, r0
 8027a30:	697b      	ldr	r3, [r7, #20]
 8027a32:	4413      	add	r3, r2
 8027a34:	617b      	str	r3, [r7, #20]

	writeMQTTString(&ptr, topicName);
 8027a36:	f107 0014 	add.w	r0, r7, #20
 8027a3a:	f107 0330 	add.w	r3, r7, #48	@ 0x30
 8027a3e:	cb0e      	ldmia	r3, {r1, r2, r3}
 8027a40:	f7ff fed8 	bl	80277f4 <writeMQTTString>

	if (qos > 0)
 8027a44:	683b      	ldr	r3, [r7, #0]
 8027a46:	2b00      	cmp	r3, #0
 8027a48:	dd06      	ble.n	8027a58 <MQTTSerialize_publish+0xc6>
		writeInt(&ptr, packetid);
 8027a4a:	8dba      	ldrh	r2, [r7, #44]	@ 0x2c
 8027a4c:	f107 0314 	add.w	r3, r7, #20
 8027a50:	4611      	mov	r1, r2
 8027a52:	4618      	mov	r0, r3
 8027a54:	f7ff fe86 	bl	8027764 <writeInt>

	memcpy(ptr, payload, payloadlen);
 8027a58:	697b      	ldr	r3, [r7, #20]
 8027a5a:	6c3a      	ldr	r2, [r7, #64]	@ 0x40
 8027a5c:	6bf9      	ldr	r1, [r7, #60]	@ 0x3c
 8027a5e:	4618      	mov	r0, r3
 8027a60:	f001 ffdd 	bl	8029a1e <memcpy>
	ptr += payloadlen;
 8027a64:	697a      	ldr	r2, [r7, #20]
 8027a66:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8027a68:	4413      	add	r3, r2
 8027a6a:	617b      	str	r3, [r7, #20]

	rc = ptr - buf;
 8027a6c:	697a      	ldr	r2, [r7, #20]
 8027a6e:	68fb      	ldr	r3, [r7, #12]
 8027a70:	1ad3      	subs	r3, r2, r3
 8027a72:	61fb      	str	r3, [r7, #28]

exit:
	FUNC_EXIT_RC(rc);
	return rc;
 8027a74:	69fb      	ldr	r3, [r7, #28]
}
 8027a76:	4618      	mov	r0, r3
 8027a78:	3720      	adds	r7, #32
 8027a7a:	46bd      	mov	sp, r7
 8027a7c:	bd80      	pop	{r7, pc}

08027a7e <MQTTSerialize_ack>:
  * @param dup the MQTT dup flag
  * @param packetid the MQTT packet identifier
  * @return serialized length, or error if 0
  */
int MQTTSerialize_ack(unsigned char* buf, int buflen, unsigned char packettype, unsigned char dup, unsigned short packetid)
{
 8027a7e:	b580      	push	{r7, lr}
 8027a80:	b088      	sub	sp, #32
 8027a82:	af00      	add	r7, sp, #0
 8027a84:	60f8      	str	r0, [r7, #12]
 8027a86:	60b9      	str	r1, [r7, #8]
 8027a88:	4611      	mov	r1, r2
 8027a8a:	461a      	mov	r2, r3
 8027a8c:	460b      	mov	r3, r1
 8027a8e:	71fb      	strb	r3, [r7, #7]
 8027a90:	4613      	mov	r3, r2
 8027a92:	71bb      	strb	r3, [r7, #6]
	MQTTHeader header = {0};
 8027a94:	2300      	movs	r3, #0
 8027a96:	61bb      	str	r3, [r7, #24]
	int rc = 0;
 8027a98:	2300      	movs	r3, #0
 8027a9a:	61fb      	str	r3, [r7, #28]
	unsigned char *ptr = buf;
 8027a9c:	68fb      	ldr	r3, [r7, #12]
 8027a9e:	617b      	str	r3, [r7, #20]

	FUNC_ENTRY;
	if (buflen < 4)
 8027aa0:	68bb      	ldr	r3, [r7, #8]
 8027aa2:	2b03      	cmp	r3, #3
 8027aa4:	dc03      	bgt.n	8027aae <MQTTSerialize_ack+0x30>
	{
		rc = MQTTPACKET_BUFFER_TOO_SHORT;
 8027aa6:	f06f 0301 	mvn.w	r3, #1
 8027aaa:	61fb      	str	r3, [r7, #28]
		goto exit;
 8027aac:	e037      	b.n	8027b1e <MQTTSerialize_ack+0xa0>
	}
	header.bits.type = packettype;
 8027aae:	79fb      	ldrb	r3, [r7, #7]
 8027ab0:	f003 030f 	and.w	r3, r3, #15
 8027ab4:	b2da      	uxtb	r2, r3
 8027ab6:	7e3b      	ldrb	r3, [r7, #24]
 8027ab8:	f362 1307 	bfi	r3, r2, #4, #4
 8027abc:	763b      	strb	r3, [r7, #24]
	header.bits.dup = dup;
 8027abe:	79bb      	ldrb	r3, [r7, #6]
 8027ac0:	f003 0301 	and.w	r3, r3, #1
 8027ac4:	b2da      	uxtb	r2, r3
 8027ac6:	7e3b      	ldrb	r3, [r7, #24]
 8027ac8:	f362 03c3 	bfi	r3, r2, #3, #1
 8027acc:	763b      	strb	r3, [r7, #24]
	header.bits.qos = (packettype == PUBREL) ? 1 : 0;
 8027ace:	79fb      	ldrb	r3, [r7, #7]
 8027ad0:	2b06      	cmp	r3, #6
 8027ad2:	bf0c      	ite	eq
 8027ad4:	2301      	moveq	r3, #1
 8027ad6:	2300      	movne	r3, #0
 8027ad8:	b2db      	uxtb	r3, r3
 8027ada:	f003 0303 	and.w	r3, r3, #3
 8027ade:	b2da      	uxtb	r2, r3
 8027ae0:	7e3b      	ldrb	r3, [r7, #24]
 8027ae2:	f362 0342 	bfi	r3, r2, #1, #2
 8027ae6:	763b      	strb	r3, [r7, #24]
	writeChar(&ptr, header.byte); /* write header */
 8027ae8:	7e3a      	ldrb	r2, [r7, #24]
 8027aea:	f107 0314 	add.w	r3, r7, #20
 8027aee:	4611      	mov	r1, r2
 8027af0:	4618      	mov	r0, r3
 8027af2:	f7ff fe22 	bl	802773a <writeChar>

	ptr += MQTTPacket_encode(ptr, 2); /* write remaining length */
 8027af6:	697b      	ldr	r3, [r7, #20]
 8027af8:	2102      	movs	r1, #2
 8027afa:	4618      	mov	r0, r3
 8027afc:	f7ff fd23 	bl	8027546 <MQTTPacket_encode>
 8027b00:	4602      	mov	r2, r0
 8027b02:	697b      	ldr	r3, [r7, #20]
 8027b04:	4413      	add	r3, r2
 8027b06:	617b      	str	r3, [r7, #20]
	writeInt(&ptr, packetid);
 8027b08:	8d3a      	ldrh	r2, [r7, #40]	@ 0x28
 8027b0a:	f107 0314 	add.w	r3, r7, #20
 8027b0e:	4611      	mov	r1, r2
 8027b10:	4618      	mov	r0, r3
 8027b12:	f7ff fe27 	bl	8027764 <writeInt>
	rc = ptr - buf;
 8027b16:	697a      	ldr	r2, [r7, #20]
 8027b18:	68fb      	ldr	r3, [r7, #12]
 8027b1a:	1ad3      	subs	r3, r2, r3
 8027b1c:	61fb      	str	r3, [r7, #28]
exit:
	FUNC_EXIT_RC(rc);
	return rc;
 8027b1e:	69fb      	ldr	r3, [r7, #28]
}
 8027b20:	4618      	mov	r0, r3
 8027b22:	3720      	adds	r7, #32
 8027b24:	46bd      	mov	sp, r7
 8027b26:	bd80      	pop	{r7, pc}

08027b28 <MQTTSerialize_subscribeLength>:
  * @param count the number of topic filter strings in topicFilters
  * @param topicFilters the array of topic filter strings to be used in the publish
  * @return the length of buffer needed to contain the serialized version of the packet
  */
int MQTTSerialize_subscribeLength(int count, MQTTString topicFilters[])
{
 8027b28:	b580      	push	{r7, lr}
 8027b2a:	b084      	sub	sp, #16
 8027b2c:	af00      	add	r7, sp, #0
 8027b2e:	6078      	str	r0, [r7, #4]
 8027b30:	6039      	str	r1, [r7, #0]
	int i;
	int len = 2; /* packetid */
 8027b32:	2302      	movs	r3, #2
 8027b34:	60bb      	str	r3, [r7, #8]

	for (i = 0; i < count; ++i)
 8027b36:	2300      	movs	r3, #0
 8027b38:	60fb      	str	r3, [r7, #12]
 8027b3a:	e013      	b.n	8027b64 <MQTTSerialize_subscribeLength+0x3c>
		len += 2 + MQTTstrlen(topicFilters[i]) + 1; /* length + topic + req_qos */
 8027b3c:	68fa      	ldr	r2, [r7, #12]
 8027b3e:	4613      	mov	r3, r2
 8027b40:	005b      	lsls	r3, r3, #1
 8027b42:	4413      	add	r3, r2
 8027b44:	009b      	lsls	r3, r3, #2
 8027b46:	461a      	mov	r2, r3
 8027b48:	683b      	ldr	r3, [r7, #0]
 8027b4a:	4413      	add	r3, r2
 8027b4c:	e893 0007 	ldmia.w	r3, {r0, r1, r2}
 8027b50:	f7ff feaf 	bl	80278b2 <MQTTstrlen>
 8027b54:	4603      	mov	r3, r0
 8027b56:	3303      	adds	r3, #3
 8027b58:	68ba      	ldr	r2, [r7, #8]
 8027b5a:	4413      	add	r3, r2
 8027b5c:	60bb      	str	r3, [r7, #8]
	for (i = 0; i < count; ++i)
 8027b5e:	68fb      	ldr	r3, [r7, #12]
 8027b60:	3301      	adds	r3, #1
 8027b62:	60fb      	str	r3, [r7, #12]
 8027b64:	68fa      	ldr	r2, [r7, #12]
 8027b66:	687b      	ldr	r3, [r7, #4]
 8027b68:	429a      	cmp	r2, r3
 8027b6a:	dbe7      	blt.n	8027b3c <MQTTSerialize_subscribeLength+0x14>
	return len;
 8027b6c:	68bb      	ldr	r3, [r7, #8]
}
 8027b6e:	4618      	mov	r0, r3
 8027b70:	3710      	adds	r7, #16
 8027b72:	46bd      	mov	sp, r7
 8027b74:	bd80      	pop	{r7, pc}

08027b76 <MQTTSerialize_subscribe>:
  * @param requestedQoSs - array of requested QoS
  * @return the length of the serialized data.  <= 0 indicates error
  */
int MQTTSerialize_subscribe(unsigned char* buf, int buflen, unsigned char dup, unsigned short packetid, int count,
		MQTTString topicFilters[], int requestedQoSs[])
{
 8027b76:	b580      	push	{r7, lr}
 8027b78:	b08a      	sub	sp, #40	@ 0x28
 8027b7a:	af00      	add	r7, sp, #0
 8027b7c:	60f8      	str	r0, [r7, #12]
 8027b7e:	60b9      	str	r1, [r7, #8]
 8027b80:	4611      	mov	r1, r2
 8027b82:	461a      	mov	r2, r3
 8027b84:	460b      	mov	r3, r1
 8027b86:	71fb      	strb	r3, [r7, #7]
 8027b88:	4613      	mov	r3, r2
 8027b8a:	80bb      	strh	r3, [r7, #4]
	unsigned char *ptr = buf;
 8027b8c:	68fb      	ldr	r3, [r7, #12]
 8027b8e:	61bb      	str	r3, [r7, #24]
	MQTTHeader header = {0};
 8027b90:	2300      	movs	r3, #0
 8027b92:	617b      	str	r3, [r7, #20]
	int rem_len = 0;
 8027b94:	2300      	movs	r3, #0
 8027b96:	61fb      	str	r3, [r7, #28]
	int rc = 0;
 8027b98:	2300      	movs	r3, #0
 8027b9a:	627b      	str	r3, [r7, #36]	@ 0x24
	int i = 0;
 8027b9c:	2300      	movs	r3, #0
 8027b9e:	623b      	str	r3, [r7, #32]

	FUNC_ENTRY;
	if (MQTTPacket_len(rem_len = MQTTSerialize_subscribeLength(count, topicFilters)) > buflen)
 8027ba0:	6b79      	ldr	r1, [r7, #52]	@ 0x34
 8027ba2:	6b38      	ldr	r0, [r7, #48]	@ 0x30
 8027ba4:	f7ff ffc0 	bl	8027b28 <MQTTSerialize_subscribeLength>
 8027ba8:	61f8      	str	r0, [r7, #28]
 8027baa:	69f8      	ldr	r0, [r7, #28]
 8027bac:	f7ff fd36 	bl	802761c <MQTTPacket_len>
 8027bb0:	4602      	mov	r2, r0
 8027bb2:	68bb      	ldr	r3, [r7, #8]
 8027bb4:	4293      	cmp	r3, r2
 8027bb6:	da03      	bge.n	8027bc0 <MQTTSerialize_subscribe+0x4a>
	{
		rc = MQTTPACKET_BUFFER_TOO_SHORT;
 8027bb8:	f06f 0301 	mvn.w	r3, #1
 8027bbc:	627b      	str	r3, [r7, #36]	@ 0x24
		goto exit;
 8027bbe:	e051      	b.n	8027c64 <MQTTSerialize_subscribe+0xee>
	}

	header.byte = 0;
 8027bc0:	2300      	movs	r3, #0
 8027bc2:	753b      	strb	r3, [r7, #20]
	header.bits.type = SUBSCRIBE;
 8027bc4:	7d3b      	ldrb	r3, [r7, #20]
 8027bc6:	2208      	movs	r2, #8
 8027bc8:	f362 1307 	bfi	r3, r2, #4, #4
 8027bcc:	753b      	strb	r3, [r7, #20]
	header.bits.dup = dup;
 8027bce:	79fb      	ldrb	r3, [r7, #7]
 8027bd0:	f003 0301 	and.w	r3, r3, #1
 8027bd4:	b2da      	uxtb	r2, r3
 8027bd6:	7d3b      	ldrb	r3, [r7, #20]
 8027bd8:	f362 03c3 	bfi	r3, r2, #3, #1
 8027bdc:	753b      	strb	r3, [r7, #20]
	header.bits.qos = 1;
 8027bde:	7d3b      	ldrb	r3, [r7, #20]
 8027be0:	2201      	movs	r2, #1
 8027be2:	f362 0342 	bfi	r3, r2, #1, #2
 8027be6:	753b      	strb	r3, [r7, #20]
	writeChar(&ptr, header.byte); /* write header */
 8027be8:	7d3a      	ldrb	r2, [r7, #20]
 8027bea:	f107 0318 	add.w	r3, r7, #24
 8027bee:	4611      	mov	r1, r2
 8027bf0:	4618      	mov	r0, r3
 8027bf2:	f7ff fda2 	bl	802773a <writeChar>

	ptr += MQTTPacket_encode(ptr, rem_len); /* write remaining length */;
 8027bf6:	69bb      	ldr	r3, [r7, #24]
 8027bf8:	69f9      	ldr	r1, [r7, #28]
 8027bfa:	4618      	mov	r0, r3
 8027bfc:	f7ff fca3 	bl	8027546 <MQTTPacket_encode>
 8027c00:	4602      	mov	r2, r0
 8027c02:	69bb      	ldr	r3, [r7, #24]
 8027c04:	4413      	add	r3, r2
 8027c06:	61bb      	str	r3, [r7, #24]

	writeInt(&ptr, packetid);
 8027c08:	88ba      	ldrh	r2, [r7, #4]
 8027c0a:	f107 0318 	add.w	r3, r7, #24
 8027c0e:	4611      	mov	r1, r2
 8027c10:	4618      	mov	r0, r3
 8027c12:	f7ff fda7 	bl	8027764 <writeInt>

	for (i = 0; i < count; ++i)
 8027c16:	2300      	movs	r3, #0
 8027c18:	623b      	str	r3, [r7, #32]
 8027c1a:	e01b      	b.n	8027c54 <MQTTSerialize_subscribe+0xde>
	{
		writeMQTTString(&ptr, topicFilters[i]);
 8027c1c:	6a3a      	ldr	r2, [r7, #32]
 8027c1e:	4613      	mov	r3, r2
 8027c20:	005b      	lsls	r3, r3, #1
 8027c22:	4413      	add	r3, r2
 8027c24:	009b      	lsls	r3, r3, #2
 8027c26:	461a      	mov	r2, r3
 8027c28:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8027c2a:	4413      	add	r3, r2
 8027c2c:	f107 0018 	add.w	r0, r7, #24
 8027c30:	cb0e      	ldmia	r3, {r1, r2, r3}
 8027c32:	f7ff fddf 	bl	80277f4 <writeMQTTString>
		writeChar(&ptr, requestedQoSs[i]);
 8027c36:	6a3b      	ldr	r3, [r7, #32]
 8027c38:	009b      	lsls	r3, r3, #2
 8027c3a:	6bba      	ldr	r2, [r7, #56]	@ 0x38
 8027c3c:	4413      	add	r3, r2
 8027c3e:	681b      	ldr	r3, [r3, #0]
 8027c40:	b2da      	uxtb	r2, r3
 8027c42:	f107 0318 	add.w	r3, r7, #24
 8027c46:	4611      	mov	r1, r2
 8027c48:	4618      	mov	r0, r3
 8027c4a:	f7ff fd76 	bl	802773a <writeChar>
	for (i = 0; i < count; ++i)
 8027c4e:	6a3b      	ldr	r3, [r7, #32]
 8027c50:	3301      	adds	r3, #1
 8027c52:	623b      	str	r3, [r7, #32]
 8027c54:	6a3a      	ldr	r2, [r7, #32]
 8027c56:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8027c58:	429a      	cmp	r2, r3
 8027c5a:	dbdf      	blt.n	8027c1c <MQTTSerialize_subscribe+0xa6>
	}

	rc = ptr - buf;
 8027c5c:	69ba      	ldr	r2, [r7, #24]
 8027c5e:	68fb      	ldr	r3, [r7, #12]
 8027c60:	1ad3      	subs	r3, r2, r3
 8027c62:	627b      	str	r3, [r7, #36]	@ 0x24
exit:
	FUNC_EXIT_RC(rc);
	return rc;
 8027c64:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
}
 8027c66:	4618      	mov	r0, r3
 8027c68:	3728      	adds	r7, #40	@ 0x28
 8027c6a:	46bd      	mov	sp, r7
 8027c6c:	bd80      	pop	{r7, pc}

08027c6e <MQTTDeserialize_suback>:
  * @param buf the raw buffer data, of the correct length determined by the remaining length field
  * @param buflen the length in bytes of the data in the supplied buffer
  * @return error code.  1 is success, 0 is failure
  */
int MQTTDeserialize_suback(unsigned short* packetid, int maxcount, int* count, int grantedQoSs[], unsigned char* buf, int buflen)
{
 8027c6e:	b580      	push	{r7, lr}
 8027c70:	b08a      	sub	sp, #40	@ 0x28
 8027c72:	af00      	add	r7, sp, #0
 8027c74:	60f8      	str	r0, [r7, #12]
 8027c76:	60b9      	str	r1, [r7, #8]
 8027c78:	607a      	str	r2, [r7, #4]
 8027c7a:	603b      	str	r3, [r7, #0]
	MQTTHeader header = {0};
 8027c7c:	2300      	movs	r3, #0
 8027c7e:	61fb      	str	r3, [r7, #28]
	unsigned char* curdata = buf;
 8027c80:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8027c82:	61bb      	str	r3, [r7, #24]
	unsigned char* enddata = NULL;
 8027c84:	2300      	movs	r3, #0
 8027c86:	623b      	str	r3, [r7, #32]
	int rc = 0;
 8027c88:	2300      	movs	r3, #0
 8027c8a:	627b      	str	r3, [r7, #36]	@ 0x24
	int mylen;

	FUNC_ENTRY;
	header.byte = readChar(&curdata);
 8027c8c:	f107 0318 	add.w	r3, r7, #24
 8027c90:	4618      	mov	r0, r3
 8027c92:	f7ff fd3e 	bl	8027712 <readChar>
 8027c96:	4603      	mov	r3, r0
 8027c98:	773b      	strb	r3, [r7, #28]
	if (header.bits.type != SUBACK)
 8027c9a:	7f3b      	ldrb	r3, [r7, #28]
 8027c9c:	f023 030f 	bic.w	r3, r3, #15
 8027ca0:	b2db      	uxtb	r3, r3
 8027ca2:	2b90      	cmp	r3, #144	@ 0x90
 8027ca4:	d142      	bne.n	8027d2c <MQTTDeserialize_suback+0xbe>
		goto exit;

	curdata += (rc = MQTTPacket_decodeBuf(curdata, &mylen)); /* read remaining length */
 8027ca6:	69bb      	ldr	r3, [r7, #24]
 8027ca8:	f107 0214 	add.w	r2, r7, #20
 8027cac:	4611      	mov	r1, r2
 8027cae:	4618      	mov	r0, r3
 8027cb0:	f7ff fcfe 	bl	80276b0 <MQTTPacket_decodeBuf>
 8027cb4:	6278      	str	r0, [r7, #36]	@ 0x24
 8027cb6:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8027cb8:	69bb      	ldr	r3, [r7, #24]
 8027cba:	4413      	add	r3, r2
 8027cbc:	61bb      	str	r3, [r7, #24]
	enddata = curdata + mylen;
 8027cbe:	69bb      	ldr	r3, [r7, #24]
 8027cc0:	697a      	ldr	r2, [r7, #20]
 8027cc2:	4413      	add	r3, r2
 8027cc4:	623b      	str	r3, [r7, #32]
	if (enddata - curdata < 2)
 8027cc6:	69bb      	ldr	r3, [r7, #24]
 8027cc8:	6a3a      	ldr	r2, [r7, #32]
 8027cca:	1ad3      	subs	r3, r2, r3
 8027ccc:	2b01      	cmp	r3, #1
 8027cce:	dd2f      	ble.n	8027d30 <MQTTDeserialize_suback+0xc2>
		goto exit;

	*packetid = readInt(&curdata);
 8027cd0:	f107 0318 	add.w	r3, r7, #24
 8027cd4:	4618      	mov	r0, r3
 8027cd6:	f7ff fd01 	bl	80276dc <readInt>
 8027cda:	4603      	mov	r3, r0
 8027cdc:	b29a      	uxth	r2, r3
 8027cde:	68fb      	ldr	r3, [r7, #12]
 8027ce0:	801a      	strh	r2, [r3, #0]

	*count = 0;
 8027ce2:	687b      	ldr	r3, [r7, #4]
 8027ce4:	2200      	movs	r2, #0
 8027ce6:	601a      	str	r2, [r3, #0]
	while (curdata < enddata)
 8027ce8:	e019      	b.n	8027d1e <MQTTDeserialize_suback+0xb0>
	{
		if (*count > maxcount)
 8027cea:	687b      	ldr	r3, [r7, #4]
 8027cec:	681b      	ldr	r3, [r3, #0]
 8027cee:	68ba      	ldr	r2, [r7, #8]
 8027cf0:	429a      	cmp	r2, r3
 8027cf2:	da03      	bge.n	8027cfc <MQTTDeserialize_suback+0x8e>
		{
			rc = -1;
 8027cf4:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8027cf8:	627b      	str	r3, [r7, #36]	@ 0x24
			goto exit;
 8027cfa:	e01a      	b.n	8027d32 <MQTTDeserialize_suback+0xc4>
		}
		grantedQoSs[(*count)++] = readChar(&curdata);
 8027cfc:	f107 0318 	add.w	r3, r7, #24
 8027d00:	4618      	mov	r0, r3
 8027d02:	f7ff fd06 	bl	8027712 <readChar>
 8027d06:	4603      	mov	r3, r0
 8027d08:	4618      	mov	r0, r3
 8027d0a:	687b      	ldr	r3, [r7, #4]
 8027d0c:	681b      	ldr	r3, [r3, #0]
 8027d0e:	1c59      	adds	r1, r3, #1
 8027d10:	687a      	ldr	r2, [r7, #4]
 8027d12:	6011      	str	r1, [r2, #0]
 8027d14:	009b      	lsls	r3, r3, #2
 8027d16:	683a      	ldr	r2, [r7, #0]
 8027d18:	4413      	add	r3, r2
 8027d1a:	4602      	mov	r2, r0
 8027d1c:	601a      	str	r2, [r3, #0]
	while (curdata < enddata)
 8027d1e:	69bb      	ldr	r3, [r7, #24]
 8027d20:	6a3a      	ldr	r2, [r7, #32]
 8027d22:	429a      	cmp	r2, r3
 8027d24:	d8e1      	bhi.n	8027cea <MQTTDeserialize_suback+0x7c>
	}

	rc = 1;
 8027d26:	2301      	movs	r3, #1
 8027d28:	627b      	str	r3, [r7, #36]	@ 0x24
 8027d2a:	e002      	b.n	8027d32 <MQTTDeserialize_suback+0xc4>
		goto exit;
 8027d2c:	bf00      	nop
 8027d2e:	e000      	b.n	8027d32 <MQTTDeserialize_suback+0xc4>
		goto exit;
 8027d30:	bf00      	nop
exit:
	FUNC_EXIT_RC(rc);
	return rc;
 8027d32:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
}
 8027d34:	4618      	mov	r0, r3
 8027d36:	3728      	adds	r7, #40	@ 0x28
 8027d38:	46bd      	mov	sp, r7
 8027d3a:	bd80      	pop	{r7, pc}

08027d3c <malloc>:
 8027d3c:	4b02      	ldr	r3, [pc, #8]	@ (8027d48 <malloc+0xc>)
 8027d3e:	4601      	mov	r1, r0
 8027d40:	6818      	ldr	r0, [r3, #0]
 8027d42:	f000 b82d 	b.w	8027da0 <_malloc_r>
 8027d46:	bf00      	nop
 8027d48:	240001c0 	.word	0x240001c0

08027d4c <free>:
 8027d4c:	4b02      	ldr	r3, [pc, #8]	@ (8027d58 <free+0xc>)
 8027d4e:	4601      	mov	r1, r0
 8027d50:	6818      	ldr	r0, [r3, #0]
 8027d52:	f002 bc7b 	b.w	802a64c <_free_r>
 8027d56:	bf00      	nop
 8027d58:	240001c0 	.word	0x240001c0

08027d5c <sbrk_aligned>:
 8027d5c:	b570      	push	{r4, r5, r6, lr}
 8027d5e:	4e0f      	ldr	r6, [pc, #60]	@ (8027d9c <sbrk_aligned+0x40>)
 8027d60:	460c      	mov	r4, r1
 8027d62:	6831      	ldr	r1, [r6, #0]
 8027d64:	4605      	mov	r5, r0
 8027d66:	b911      	cbnz	r1, 8027d6e <sbrk_aligned+0x12>
 8027d68:	f001 fe0a 	bl	8029980 <_sbrk_r>
 8027d6c:	6030      	str	r0, [r6, #0]
 8027d6e:	4621      	mov	r1, r4
 8027d70:	4628      	mov	r0, r5
 8027d72:	f001 fe05 	bl	8029980 <_sbrk_r>
 8027d76:	1c43      	adds	r3, r0, #1
 8027d78:	d103      	bne.n	8027d82 <sbrk_aligned+0x26>
 8027d7a:	f04f 34ff 	mov.w	r4, #4294967295	@ 0xffffffff
 8027d7e:	4620      	mov	r0, r4
 8027d80:	bd70      	pop	{r4, r5, r6, pc}
 8027d82:	1cc4      	adds	r4, r0, #3
 8027d84:	f024 0403 	bic.w	r4, r4, #3
 8027d88:	42a0      	cmp	r0, r4
 8027d8a:	d0f8      	beq.n	8027d7e <sbrk_aligned+0x22>
 8027d8c:	1a21      	subs	r1, r4, r0
 8027d8e:	4628      	mov	r0, r5
 8027d90:	f001 fdf6 	bl	8029980 <_sbrk_r>
 8027d94:	3001      	adds	r0, #1
 8027d96:	d1f2      	bne.n	8027d7e <sbrk_aligned+0x22>
 8027d98:	e7ef      	b.n	8027d7a <sbrk_aligned+0x1e>
 8027d9a:	bf00      	nop
 8027d9c:	2402a1a0 	.word	0x2402a1a0

08027da0 <_malloc_r>:
 8027da0:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
 8027da4:	1ccd      	adds	r5, r1, #3
 8027da6:	f025 0503 	bic.w	r5, r5, #3
 8027daa:	3508      	adds	r5, #8
 8027dac:	2d0c      	cmp	r5, #12
 8027dae:	bf38      	it	cc
 8027db0:	250c      	movcc	r5, #12
 8027db2:	2d00      	cmp	r5, #0
 8027db4:	4606      	mov	r6, r0
 8027db6:	db01      	blt.n	8027dbc <_malloc_r+0x1c>
 8027db8:	42a9      	cmp	r1, r5
 8027dba:	d904      	bls.n	8027dc6 <_malloc_r+0x26>
 8027dbc:	230c      	movs	r3, #12
 8027dbe:	6033      	str	r3, [r6, #0]
 8027dc0:	2000      	movs	r0, #0
 8027dc2:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
 8027dc6:	f8df 80d4 	ldr.w	r8, [pc, #212]	@ 8027e9c <_malloc_r+0xfc>
 8027dca:	f000 f869 	bl	8027ea0 <__malloc_lock>
 8027dce:	f8d8 3000 	ldr.w	r3, [r8]
 8027dd2:	461c      	mov	r4, r3
 8027dd4:	bb44      	cbnz	r4, 8027e28 <_malloc_r+0x88>
 8027dd6:	4629      	mov	r1, r5
 8027dd8:	4630      	mov	r0, r6
 8027dda:	f7ff ffbf 	bl	8027d5c <sbrk_aligned>
 8027dde:	1c43      	adds	r3, r0, #1
 8027de0:	4604      	mov	r4, r0
 8027de2:	d158      	bne.n	8027e96 <_malloc_r+0xf6>
 8027de4:	f8d8 4000 	ldr.w	r4, [r8]
 8027de8:	4627      	mov	r7, r4
 8027dea:	2f00      	cmp	r7, #0
 8027dec:	d143      	bne.n	8027e76 <_malloc_r+0xd6>
 8027dee:	2c00      	cmp	r4, #0
 8027df0:	d04b      	beq.n	8027e8a <_malloc_r+0xea>
 8027df2:	6823      	ldr	r3, [r4, #0]
 8027df4:	4639      	mov	r1, r7
 8027df6:	4630      	mov	r0, r6
 8027df8:	eb04 0903 	add.w	r9, r4, r3
 8027dfc:	f001 fdc0 	bl	8029980 <_sbrk_r>
 8027e00:	4581      	cmp	r9, r0
 8027e02:	d142      	bne.n	8027e8a <_malloc_r+0xea>
 8027e04:	6821      	ldr	r1, [r4, #0]
 8027e06:	1a6d      	subs	r5, r5, r1
 8027e08:	4629      	mov	r1, r5
 8027e0a:	4630      	mov	r0, r6
 8027e0c:	f7ff ffa6 	bl	8027d5c <sbrk_aligned>
 8027e10:	3001      	adds	r0, #1
 8027e12:	d03a      	beq.n	8027e8a <_malloc_r+0xea>
 8027e14:	6823      	ldr	r3, [r4, #0]
 8027e16:	442b      	add	r3, r5
 8027e18:	6023      	str	r3, [r4, #0]
 8027e1a:	f8d8 3000 	ldr.w	r3, [r8]
 8027e1e:	685a      	ldr	r2, [r3, #4]
 8027e20:	bb62      	cbnz	r2, 8027e7c <_malloc_r+0xdc>
 8027e22:	f8c8 7000 	str.w	r7, [r8]
 8027e26:	e00f      	b.n	8027e48 <_malloc_r+0xa8>
 8027e28:	6822      	ldr	r2, [r4, #0]
 8027e2a:	1b52      	subs	r2, r2, r5
 8027e2c:	d420      	bmi.n	8027e70 <_malloc_r+0xd0>
 8027e2e:	2a0b      	cmp	r2, #11
 8027e30:	d917      	bls.n	8027e62 <_malloc_r+0xc2>
 8027e32:	1961      	adds	r1, r4, r5
 8027e34:	42a3      	cmp	r3, r4
 8027e36:	6025      	str	r5, [r4, #0]
 8027e38:	bf18      	it	ne
 8027e3a:	6059      	strne	r1, [r3, #4]
 8027e3c:	6863      	ldr	r3, [r4, #4]
 8027e3e:	bf08      	it	eq
 8027e40:	f8c8 1000 	streq.w	r1, [r8]
 8027e44:	5162      	str	r2, [r4, r5]
 8027e46:	604b      	str	r3, [r1, #4]
 8027e48:	4630      	mov	r0, r6
 8027e4a:	f000 f82f 	bl	8027eac <__malloc_unlock>
 8027e4e:	f104 000b 	add.w	r0, r4, #11
 8027e52:	1d23      	adds	r3, r4, #4
 8027e54:	f020 0007 	bic.w	r0, r0, #7
 8027e58:	1ac2      	subs	r2, r0, r3
 8027e5a:	bf1c      	itt	ne
 8027e5c:	1a1b      	subne	r3, r3, r0
 8027e5e:	50a3      	strne	r3, [r4, r2]
 8027e60:	e7af      	b.n	8027dc2 <_malloc_r+0x22>
 8027e62:	6862      	ldr	r2, [r4, #4]
 8027e64:	42a3      	cmp	r3, r4
 8027e66:	bf0c      	ite	eq
 8027e68:	f8c8 2000 	streq.w	r2, [r8]
 8027e6c:	605a      	strne	r2, [r3, #4]
 8027e6e:	e7eb      	b.n	8027e48 <_malloc_r+0xa8>
 8027e70:	4623      	mov	r3, r4
 8027e72:	6864      	ldr	r4, [r4, #4]
 8027e74:	e7ae      	b.n	8027dd4 <_malloc_r+0x34>
 8027e76:	463c      	mov	r4, r7
 8027e78:	687f      	ldr	r7, [r7, #4]
 8027e7a:	e7b6      	b.n	8027dea <_malloc_r+0x4a>
 8027e7c:	461a      	mov	r2, r3
 8027e7e:	685b      	ldr	r3, [r3, #4]
 8027e80:	42a3      	cmp	r3, r4
 8027e82:	d1fb      	bne.n	8027e7c <_malloc_r+0xdc>
 8027e84:	2300      	movs	r3, #0
 8027e86:	6053      	str	r3, [r2, #4]
 8027e88:	e7de      	b.n	8027e48 <_malloc_r+0xa8>
 8027e8a:	230c      	movs	r3, #12
 8027e8c:	6033      	str	r3, [r6, #0]
 8027e8e:	4630      	mov	r0, r6
 8027e90:	f000 f80c 	bl	8027eac <__malloc_unlock>
 8027e94:	e794      	b.n	8027dc0 <_malloc_r+0x20>
 8027e96:	6005      	str	r5, [r0, #0]
 8027e98:	e7d6      	b.n	8027e48 <_malloc_r+0xa8>
 8027e9a:	bf00      	nop
 8027e9c:	2402a1a4 	.word	0x2402a1a4

08027ea0 <__malloc_lock>:
 8027ea0:	4801      	ldr	r0, [pc, #4]	@ (8027ea8 <__malloc_lock+0x8>)
 8027ea2:	f001 bdba 	b.w	8029a1a <__retarget_lock_acquire_recursive>
 8027ea6:	bf00      	nop
 8027ea8:	2402a2e8 	.word	0x2402a2e8

08027eac <__malloc_unlock>:
 8027eac:	4801      	ldr	r0, [pc, #4]	@ (8027eb4 <__malloc_unlock+0x8>)
 8027eae:	f001 bdb5 	b.w	8029a1c <__retarget_lock_release_recursive>
 8027eb2:	bf00      	nop
 8027eb4:	2402a2e8 	.word	0x2402a2e8

08027eb8 <rand>:
 8027eb8:	4b16      	ldr	r3, [pc, #88]	@ (8027f14 <rand+0x5c>)
 8027eba:	b510      	push	{r4, lr}
 8027ebc:	681c      	ldr	r4, [r3, #0]
 8027ebe:	6b23      	ldr	r3, [r4, #48]	@ 0x30
 8027ec0:	b9b3      	cbnz	r3, 8027ef0 <rand+0x38>
 8027ec2:	2018      	movs	r0, #24
 8027ec4:	f7ff ff3a 	bl	8027d3c <malloc>
 8027ec8:	4602      	mov	r2, r0
 8027eca:	6320      	str	r0, [r4, #48]	@ 0x30
 8027ecc:	b920      	cbnz	r0, 8027ed8 <rand+0x20>
 8027ece:	4b12      	ldr	r3, [pc, #72]	@ (8027f18 <rand+0x60>)
 8027ed0:	4812      	ldr	r0, [pc, #72]	@ (8027f1c <rand+0x64>)
 8027ed2:	2152      	movs	r1, #82	@ 0x52
 8027ed4:	f001 fdbc 	bl	8029a50 <__assert_func>
 8027ed8:	4911      	ldr	r1, [pc, #68]	@ (8027f20 <rand+0x68>)
 8027eda:	4b12      	ldr	r3, [pc, #72]	@ (8027f24 <rand+0x6c>)
 8027edc:	e9c0 1300 	strd	r1, r3, [r0]
 8027ee0:	4b11      	ldr	r3, [pc, #68]	@ (8027f28 <rand+0x70>)
 8027ee2:	6083      	str	r3, [r0, #8]
 8027ee4:	230b      	movs	r3, #11
 8027ee6:	8183      	strh	r3, [r0, #12]
 8027ee8:	2100      	movs	r1, #0
 8027eea:	2001      	movs	r0, #1
 8027eec:	e9c2 0104 	strd	r0, r1, [r2, #16]
 8027ef0:	6b21      	ldr	r1, [r4, #48]	@ 0x30
 8027ef2:	480e      	ldr	r0, [pc, #56]	@ (8027f2c <rand+0x74>)
 8027ef4:	690b      	ldr	r3, [r1, #16]
 8027ef6:	694c      	ldr	r4, [r1, #20]
 8027ef8:	4a0d      	ldr	r2, [pc, #52]	@ (8027f30 <rand+0x78>)
 8027efa:	4358      	muls	r0, r3
 8027efc:	fb02 0004 	mla	r0, r2, r4, r0
 8027f00:	fba3 3202 	umull	r3, r2, r3, r2
 8027f04:	3301      	adds	r3, #1
 8027f06:	eb40 0002 	adc.w	r0, r0, r2
 8027f0a:	e9c1 3004 	strd	r3, r0, [r1, #16]
 8027f0e:	f020 4000 	bic.w	r0, r0, #2147483648	@ 0x80000000
 8027f12:	bd10      	pop	{r4, pc}
 8027f14:	240001c0 	.word	0x240001c0
 8027f18:	080307ba 	.word	0x080307ba
 8027f1c:	080307d1 	.word	0x080307d1
 8027f20:	abcd330e 	.word	0xabcd330e
 8027f24:	e66d1234 	.word	0xe66d1234
 8027f28:	0005deec 	.word	0x0005deec
 8027f2c:	5851f42d 	.word	0x5851f42d
 8027f30:	4c957f2d 	.word	0x4c957f2d

08027f34 <realloc>:
 8027f34:	4b02      	ldr	r3, [pc, #8]	@ (8027f40 <realloc+0xc>)
 8027f36:	460a      	mov	r2, r1
 8027f38:	4601      	mov	r1, r0
 8027f3a:	6818      	ldr	r0, [r3, #0]
 8027f3c:	f000 b802 	b.w	8027f44 <_realloc_r>
 8027f40:	240001c0 	.word	0x240001c0

08027f44 <_realloc_r>:
 8027f44:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
 8027f48:	4680      	mov	r8, r0
 8027f4a:	4615      	mov	r5, r2
 8027f4c:	460c      	mov	r4, r1
 8027f4e:	b921      	cbnz	r1, 8027f5a <_realloc_r+0x16>
 8027f50:	e8bd 41f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, lr}
 8027f54:	4611      	mov	r1, r2
 8027f56:	f7ff bf23 	b.w	8027da0 <_malloc_r>
 8027f5a:	b92a      	cbnz	r2, 8027f68 <_realloc_r+0x24>
 8027f5c:	f002 fb76 	bl	802a64c <_free_r>
 8027f60:	2400      	movs	r4, #0
 8027f62:	4620      	mov	r0, r4
 8027f64:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 8027f68:	f003 fbb5 	bl	802b6d6 <_malloc_usable_size_r>
 8027f6c:	4285      	cmp	r5, r0
 8027f6e:	4606      	mov	r6, r0
 8027f70:	d802      	bhi.n	8027f78 <_realloc_r+0x34>
 8027f72:	ebb5 0f50 	cmp.w	r5, r0, lsr #1
 8027f76:	d8f4      	bhi.n	8027f62 <_realloc_r+0x1e>
 8027f78:	4629      	mov	r1, r5
 8027f7a:	4640      	mov	r0, r8
 8027f7c:	f7ff ff10 	bl	8027da0 <_malloc_r>
 8027f80:	4607      	mov	r7, r0
 8027f82:	2800      	cmp	r0, #0
 8027f84:	d0ec      	beq.n	8027f60 <_realloc_r+0x1c>
 8027f86:	42b5      	cmp	r5, r6
 8027f88:	462a      	mov	r2, r5
 8027f8a:	4621      	mov	r1, r4
 8027f8c:	bf28      	it	cs
 8027f8e:	4632      	movcs	r2, r6
 8027f90:	f001 fd45 	bl	8029a1e <memcpy>
 8027f94:	4621      	mov	r1, r4
 8027f96:	4640      	mov	r0, r8
 8027f98:	f002 fb58 	bl	802a64c <_free_r>
 8027f9c:	463c      	mov	r4, r7
 8027f9e:	e7e0      	b.n	8027f62 <_realloc_r+0x1e>

08027fa0 <sulp>:
 8027fa0:	b570      	push	{r4, r5, r6, lr}
 8027fa2:	4604      	mov	r4, r0
 8027fa4:	460d      	mov	r5, r1
 8027fa6:	4616      	mov	r6, r2
 8027fa8:	ec45 4b10 	vmov	d0, r4, r5
 8027fac:	f003 fa58 	bl	802b460 <__ulp>
 8027fb0:	b17e      	cbz	r6, 8027fd2 <sulp+0x32>
 8027fb2:	f3c5 530a 	ubfx	r3, r5, #20, #11
 8027fb6:	f1c3 036b 	rsb	r3, r3, #107	@ 0x6b
 8027fba:	2b00      	cmp	r3, #0
 8027fbc:	dd09      	ble.n	8027fd2 <sulp+0x32>
 8027fbe:	051b      	lsls	r3, r3, #20
 8027fc0:	f103 517f 	add.w	r1, r3, #1069547520	@ 0x3fc00000
 8027fc4:	2000      	movs	r0, #0
 8027fc6:	f501 1140 	add.w	r1, r1, #3145728	@ 0x300000
 8027fca:	ec41 0b17 	vmov	d7, r0, r1
 8027fce:	ee20 0b07 	vmul.f64	d0, d0, d7
 8027fd2:	bd70      	pop	{r4, r5, r6, pc}
 8027fd4:	0000      	movs	r0, r0
	...

08027fd8 <_strtod_l>:
 8027fd8:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 8027fdc:	ed2d 8b0a 	vpush	{d8-d12}
 8027fe0:	b097      	sub	sp, #92	@ 0x5c
 8027fe2:	4688      	mov	r8, r1
 8027fe4:	920e      	str	r2, [sp, #56]	@ 0x38
 8027fe6:	2200      	movs	r2, #0
 8027fe8:	9212      	str	r2, [sp, #72]	@ 0x48
 8027fea:	9005      	str	r0, [sp, #20]
 8027fec:	f04f 0a00 	mov.w	sl, #0
 8027ff0:	f04f 0b00 	mov.w	fp, #0
 8027ff4:	460a      	mov	r2, r1
 8027ff6:	9211      	str	r2, [sp, #68]	@ 0x44
 8027ff8:	7811      	ldrb	r1, [r2, #0]
 8027ffa:	292b      	cmp	r1, #43	@ 0x2b
 8027ffc:	d04c      	beq.n	8028098 <_strtod_l+0xc0>
 8027ffe:	d839      	bhi.n	8028074 <_strtod_l+0x9c>
 8028000:	290d      	cmp	r1, #13
 8028002:	d833      	bhi.n	802806c <_strtod_l+0x94>
 8028004:	2908      	cmp	r1, #8
 8028006:	d833      	bhi.n	8028070 <_strtod_l+0x98>
 8028008:	2900      	cmp	r1, #0
 802800a:	d03c      	beq.n	8028086 <_strtod_l+0xae>
 802800c:	2200      	movs	r2, #0
 802800e:	9208      	str	r2, [sp, #32]
 8028010:	9d11      	ldr	r5, [sp, #68]	@ 0x44
 8028012:	782a      	ldrb	r2, [r5, #0]
 8028014:	2a30      	cmp	r2, #48	@ 0x30
 8028016:	f040 80b5 	bne.w	8028184 <_strtod_l+0x1ac>
 802801a:	786a      	ldrb	r2, [r5, #1]
 802801c:	f002 02df 	and.w	r2, r2, #223	@ 0xdf
 8028020:	2a58      	cmp	r2, #88	@ 0x58
 8028022:	d170      	bne.n	8028106 <_strtod_l+0x12e>
 8028024:	9302      	str	r3, [sp, #8]
 8028026:	9b08      	ldr	r3, [sp, #32]
 8028028:	9301      	str	r3, [sp, #4]
 802802a:	ab12      	add	r3, sp, #72	@ 0x48
 802802c:	9300      	str	r3, [sp, #0]
 802802e:	4a8b      	ldr	r2, [pc, #556]	@ (802825c <_strtod_l+0x284>)
 8028030:	9805      	ldr	r0, [sp, #20]
 8028032:	ab13      	add	r3, sp, #76	@ 0x4c
 8028034:	a911      	add	r1, sp, #68	@ 0x44
 8028036:	f002 fbbb 	bl	802a7b0 <__gethex>
 802803a:	f010 060f 	ands.w	r6, r0, #15
 802803e:	4604      	mov	r4, r0
 8028040:	d005      	beq.n	802804e <_strtod_l+0x76>
 8028042:	2e06      	cmp	r6, #6
 8028044:	d12a      	bne.n	802809c <_strtod_l+0xc4>
 8028046:	3501      	adds	r5, #1
 8028048:	2300      	movs	r3, #0
 802804a:	9511      	str	r5, [sp, #68]	@ 0x44
 802804c:	9308      	str	r3, [sp, #32]
 802804e:	9b0e      	ldr	r3, [sp, #56]	@ 0x38
 8028050:	2b00      	cmp	r3, #0
 8028052:	f040 852f 	bne.w	8028ab4 <_strtod_l+0xadc>
 8028056:	9b08      	ldr	r3, [sp, #32]
 8028058:	ec4b ab10 	vmov	d0, sl, fp
 802805c:	b1cb      	cbz	r3, 8028092 <_strtod_l+0xba>
 802805e:	eeb1 0b40 	vneg.f64	d0, d0
 8028062:	b017      	add	sp, #92	@ 0x5c
 8028064:	ecbd 8b0a 	vpop	{d8-d12}
 8028068:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 802806c:	2920      	cmp	r1, #32
 802806e:	d1cd      	bne.n	802800c <_strtod_l+0x34>
 8028070:	3201      	adds	r2, #1
 8028072:	e7c0      	b.n	8027ff6 <_strtod_l+0x1e>
 8028074:	292d      	cmp	r1, #45	@ 0x2d
 8028076:	d1c9      	bne.n	802800c <_strtod_l+0x34>
 8028078:	2101      	movs	r1, #1
 802807a:	9108      	str	r1, [sp, #32]
 802807c:	1c51      	adds	r1, r2, #1
 802807e:	9111      	str	r1, [sp, #68]	@ 0x44
 8028080:	7852      	ldrb	r2, [r2, #1]
 8028082:	2a00      	cmp	r2, #0
 8028084:	d1c4      	bne.n	8028010 <_strtod_l+0x38>
 8028086:	9b0e      	ldr	r3, [sp, #56]	@ 0x38
 8028088:	f8cd 8044 	str.w	r8, [sp, #68]	@ 0x44
 802808c:	2b00      	cmp	r3, #0
 802808e:	f040 850f 	bne.w	8028ab0 <_strtod_l+0xad8>
 8028092:	ec4b ab10 	vmov	d0, sl, fp
 8028096:	e7e4      	b.n	8028062 <_strtod_l+0x8a>
 8028098:	2100      	movs	r1, #0
 802809a:	e7ee      	b.n	802807a <_strtod_l+0xa2>
 802809c:	9a12      	ldr	r2, [sp, #72]	@ 0x48
 802809e:	b13a      	cbz	r2, 80280b0 <_strtod_l+0xd8>
 80280a0:	2135      	movs	r1, #53	@ 0x35
 80280a2:	a814      	add	r0, sp, #80	@ 0x50
 80280a4:	f003 fad3 	bl	802b64e <__copybits>
 80280a8:	9912      	ldr	r1, [sp, #72]	@ 0x48
 80280aa:	9805      	ldr	r0, [sp, #20]
 80280ac:	f002 fea4 	bl	802adf8 <_Bfree>
 80280b0:	1e73      	subs	r3, r6, #1
 80280b2:	9a13      	ldr	r2, [sp, #76]	@ 0x4c
 80280b4:	2b04      	cmp	r3, #4
 80280b6:	d806      	bhi.n	80280c6 <_strtod_l+0xee>
 80280b8:	e8df f003 	tbb	[pc, r3]
 80280bc:	201d0314 	.word	0x201d0314
 80280c0:	14          	.byte	0x14
 80280c1:	00          	.byte	0x00
 80280c2:	e9dd ab14 	ldrd	sl, fp, [sp, #80]	@ 0x50
 80280c6:	05e3      	lsls	r3, r4, #23
 80280c8:	bf48      	it	mi
 80280ca:	f04b 4b00 	orrmi.w	fp, fp, #2147483648	@ 0x80000000
 80280ce:	f02b 4300 	bic.w	r3, fp, #2147483648	@ 0x80000000
 80280d2:	0d1b      	lsrs	r3, r3, #20
 80280d4:	051b      	lsls	r3, r3, #20
 80280d6:	2b00      	cmp	r3, #0
 80280d8:	d1b9      	bne.n	802804e <_strtod_l+0x76>
 80280da:	f001 fc73 	bl	80299c4 <__errno>
 80280de:	2322      	movs	r3, #34	@ 0x22
 80280e0:	6003      	str	r3, [r0, #0]
 80280e2:	e7b4      	b.n	802804e <_strtod_l+0x76>
 80280e4:	e9dd a314 	ldrd	sl, r3, [sp, #80]	@ 0x50
 80280e8:	f202 4233 	addw	r2, r2, #1075	@ 0x433
 80280ec:	f423 1380 	bic.w	r3, r3, #1048576	@ 0x100000
 80280f0:	ea43 5b02 	orr.w	fp, r3, r2, lsl #20
 80280f4:	e7e7      	b.n	80280c6 <_strtod_l+0xee>
 80280f6:	f8df b16c 	ldr.w	fp, [pc, #364]	@ 8028264 <_strtod_l+0x28c>
 80280fa:	e7e4      	b.n	80280c6 <_strtod_l+0xee>
 80280fc:	f06f 4b00 	mvn.w	fp, #2147483648	@ 0x80000000
 8028100:	f04f 3aff 	mov.w	sl, #4294967295	@ 0xffffffff
 8028104:	e7df      	b.n	80280c6 <_strtod_l+0xee>
 8028106:	9b11      	ldr	r3, [sp, #68]	@ 0x44
 8028108:	1c5a      	adds	r2, r3, #1
 802810a:	9211      	str	r2, [sp, #68]	@ 0x44
 802810c:	785b      	ldrb	r3, [r3, #1]
 802810e:	2b30      	cmp	r3, #48	@ 0x30
 8028110:	d0f9      	beq.n	8028106 <_strtod_l+0x12e>
 8028112:	2b00      	cmp	r3, #0
 8028114:	d09b      	beq.n	802804e <_strtod_l+0x76>
 8028116:	2301      	movs	r3, #1
 8028118:	2600      	movs	r6, #0
 802811a:	9307      	str	r3, [sp, #28]
 802811c:	9b11      	ldr	r3, [sp, #68]	@ 0x44
 802811e:	930a      	str	r3, [sp, #40]	@ 0x28
 8028120:	46b1      	mov	r9, r6
 8028122:	4635      	mov	r5, r6
 8028124:	220a      	movs	r2, #10
 8028126:	9811      	ldr	r0, [sp, #68]	@ 0x44
 8028128:	7804      	ldrb	r4, [r0, #0]
 802812a:	f1a4 0330 	sub.w	r3, r4, #48	@ 0x30
 802812e:	b2d9      	uxtb	r1, r3
 8028130:	2909      	cmp	r1, #9
 8028132:	d929      	bls.n	8028188 <_strtod_l+0x1b0>
 8028134:	494a      	ldr	r1, [pc, #296]	@ (8028260 <_strtod_l+0x288>)
 8028136:	2201      	movs	r2, #1
 8028138:	f001 fb82 	bl	8029840 <strncmp>
 802813c:	b378      	cbz	r0, 802819e <_strtod_l+0x1c6>
 802813e:	2000      	movs	r0, #0
 8028140:	4622      	mov	r2, r4
 8028142:	462b      	mov	r3, r5
 8028144:	4607      	mov	r7, r0
 8028146:	9006      	str	r0, [sp, #24]
 8028148:	2a65      	cmp	r2, #101	@ 0x65
 802814a:	d001      	beq.n	8028150 <_strtod_l+0x178>
 802814c:	2a45      	cmp	r2, #69	@ 0x45
 802814e:	d117      	bne.n	8028180 <_strtod_l+0x1a8>
 8028150:	b91b      	cbnz	r3, 802815a <_strtod_l+0x182>
 8028152:	9b07      	ldr	r3, [sp, #28]
 8028154:	4303      	orrs	r3, r0
 8028156:	d096      	beq.n	8028086 <_strtod_l+0xae>
 8028158:	2300      	movs	r3, #0
 802815a:	f8dd 8044 	ldr.w	r8, [sp, #68]	@ 0x44
 802815e:	f108 0201 	add.w	r2, r8, #1
 8028162:	9211      	str	r2, [sp, #68]	@ 0x44
 8028164:	f898 2001 	ldrb.w	r2, [r8, #1]
 8028168:	2a2b      	cmp	r2, #43	@ 0x2b
 802816a:	d06b      	beq.n	8028244 <_strtod_l+0x26c>
 802816c:	2a2d      	cmp	r2, #45	@ 0x2d
 802816e:	d071      	beq.n	8028254 <_strtod_l+0x27c>
 8028170:	f04f 0e00 	mov.w	lr, #0
 8028174:	f1a2 0430 	sub.w	r4, r2, #48	@ 0x30
 8028178:	2c09      	cmp	r4, #9
 802817a:	d979      	bls.n	8028270 <_strtod_l+0x298>
 802817c:	f8cd 8044 	str.w	r8, [sp, #68]	@ 0x44
 8028180:	2400      	movs	r4, #0
 8028182:	e094      	b.n	80282ae <_strtod_l+0x2d6>
 8028184:	2300      	movs	r3, #0
 8028186:	e7c7      	b.n	8028118 <_strtod_l+0x140>
 8028188:	2d08      	cmp	r5, #8
 802818a:	f100 0001 	add.w	r0, r0, #1
 802818e:	bfd4      	ite	le
 8028190:	fb02 3909 	mlale	r9, r2, r9, r3
 8028194:	fb02 3606 	mlagt	r6, r2, r6, r3
 8028198:	3501      	adds	r5, #1
 802819a:	9011      	str	r0, [sp, #68]	@ 0x44
 802819c:	e7c3      	b.n	8028126 <_strtod_l+0x14e>
 802819e:	9b11      	ldr	r3, [sp, #68]	@ 0x44
 80281a0:	1c5a      	adds	r2, r3, #1
 80281a2:	9211      	str	r2, [sp, #68]	@ 0x44
 80281a4:	785a      	ldrb	r2, [r3, #1]
 80281a6:	b375      	cbz	r5, 8028206 <_strtod_l+0x22e>
 80281a8:	4607      	mov	r7, r0
 80281aa:	462b      	mov	r3, r5
 80281ac:	f1a2 0130 	sub.w	r1, r2, #48	@ 0x30
 80281b0:	2909      	cmp	r1, #9
 80281b2:	d913      	bls.n	80281dc <_strtod_l+0x204>
 80281b4:	2101      	movs	r1, #1
 80281b6:	9106      	str	r1, [sp, #24]
 80281b8:	e7c6      	b.n	8028148 <_strtod_l+0x170>
 80281ba:	9b11      	ldr	r3, [sp, #68]	@ 0x44
 80281bc:	1c5a      	adds	r2, r3, #1
 80281be:	9211      	str	r2, [sp, #68]	@ 0x44
 80281c0:	785a      	ldrb	r2, [r3, #1]
 80281c2:	3001      	adds	r0, #1
 80281c4:	2a30      	cmp	r2, #48	@ 0x30
 80281c6:	d0f8      	beq.n	80281ba <_strtod_l+0x1e2>
 80281c8:	f1a2 0331 	sub.w	r3, r2, #49	@ 0x31
 80281cc:	2b08      	cmp	r3, #8
 80281ce:	f200 8476 	bhi.w	8028abe <_strtod_l+0xae6>
 80281d2:	9b11      	ldr	r3, [sp, #68]	@ 0x44
 80281d4:	930a      	str	r3, [sp, #40]	@ 0x28
 80281d6:	4607      	mov	r7, r0
 80281d8:	2000      	movs	r0, #0
 80281da:	4603      	mov	r3, r0
 80281dc:	3a30      	subs	r2, #48	@ 0x30
 80281de:	f100 0101 	add.w	r1, r0, #1
 80281e2:	d023      	beq.n	802822c <_strtod_l+0x254>
 80281e4:	440f      	add	r7, r1
 80281e6:	eb00 0c03 	add.w	ip, r0, r3
 80281ea:	4619      	mov	r1, r3
 80281ec:	240a      	movs	r4, #10
 80281ee:	4561      	cmp	r1, ip
 80281f0:	d10b      	bne.n	802820a <_strtod_l+0x232>
 80281f2:	1c5c      	adds	r4, r3, #1
 80281f4:	4403      	add	r3, r0
 80281f6:	2b08      	cmp	r3, #8
 80281f8:	4404      	add	r4, r0
 80281fa:	dc11      	bgt.n	8028220 <_strtod_l+0x248>
 80281fc:	230a      	movs	r3, #10
 80281fe:	fb03 2909 	mla	r9, r3, r9, r2
 8028202:	2100      	movs	r1, #0
 8028204:	e013      	b.n	802822e <_strtod_l+0x256>
 8028206:	4628      	mov	r0, r5
 8028208:	e7dc      	b.n	80281c4 <_strtod_l+0x1ec>
 802820a:	2908      	cmp	r1, #8
 802820c:	f101 0101 	add.w	r1, r1, #1
 8028210:	dc02      	bgt.n	8028218 <_strtod_l+0x240>
 8028212:	fb04 f909 	mul.w	r9, r4, r9
 8028216:	e7ea      	b.n	80281ee <_strtod_l+0x216>
 8028218:	2910      	cmp	r1, #16
 802821a:	bfd8      	it	le
 802821c:	4366      	mulle	r6, r4
 802821e:	e7e6      	b.n	80281ee <_strtod_l+0x216>
 8028220:	2b0f      	cmp	r3, #15
 8028222:	dcee      	bgt.n	8028202 <_strtod_l+0x22a>
 8028224:	230a      	movs	r3, #10
 8028226:	fb03 2606 	mla	r6, r3, r6, r2
 802822a:	e7ea      	b.n	8028202 <_strtod_l+0x22a>
 802822c:	461c      	mov	r4, r3
 802822e:	9b11      	ldr	r3, [sp, #68]	@ 0x44
 8028230:	1c5a      	adds	r2, r3, #1
 8028232:	9211      	str	r2, [sp, #68]	@ 0x44
 8028234:	785a      	ldrb	r2, [r3, #1]
 8028236:	4608      	mov	r0, r1
 8028238:	4623      	mov	r3, r4
 802823a:	e7b7      	b.n	80281ac <_strtod_l+0x1d4>
 802823c:	2301      	movs	r3, #1
 802823e:	2700      	movs	r7, #0
 8028240:	9306      	str	r3, [sp, #24]
 8028242:	e786      	b.n	8028152 <_strtod_l+0x17a>
 8028244:	f04f 0e00 	mov.w	lr, #0
 8028248:	f108 0202 	add.w	r2, r8, #2
 802824c:	9211      	str	r2, [sp, #68]	@ 0x44
 802824e:	f898 2002 	ldrb.w	r2, [r8, #2]
 8028252:	e78f      	b.n	8028174 <_strtod_l+0x19c>
 8028254:	f04f 0e01 	mov.w	lr, #1
 8028258:	e7f6      	b.n	8028248 <_strtod_l+0x270>
 802825a:	bf00      	nop
 802825c:	08030840 	.word	0x08030840
 8028260:	08030829 	.word	0x08030829
 8028264:	7ff00000 	.word	0x7ff00000
 8028268:	9a11      	ldr	r2, [sp, #68]	@ 0x44
 802826a:	1c54      	adds	r4, r2, #1
 802826c:	9411      	str	r4, [sp, #68]	@ 0x44
 802826e:	7852      	ldrb	r2, [r2, #1]
 8028270:	2a30      	cmp	r2, #48	@ 0x30
 8028272:	d0f9      	beq.n	8028268 <_strtod_l+0x290>
 8028274:	f1a2 0431 	sub.w	r4, r2, #49	@ 0x31
 8028278:	2c08      	cmp	r4, #8
 802827a:	d881      	bhi.n	8028180 <_strtod_l+0x1a8>
 802827c:	f1a2 0c30 	sub.w	ip, r2, #48	@ 0x30
 8028280:	9a11      	ldr	r2, [sp, #68]	@ 0x44
 8028282:	9209      	str	r2, [sp, #36]	@ 0x24
 8028284:	9a11      	ldr	r2, [sp, #68]	@ 0x44
 8028286:	1c51      	adds	r1, r2, #1
 8028288:	9111      	str	r1, [sp, #68]	@ 0x44
 802828a:	7852      	ldrb	r2, [r2, #1]
 802828c:	f1a2 0430 	sub.w	r4, r2, #48	@ 0x30
 8028290:	2c09      	cmp	r4, #9
 8028292:	d938      	bls.n	8028306 <_strtod_l+0x32e>
 8028294:	9c09      	ldr	r4, [sp, #36]	@ 0x24
 8028296:	1b0c      	subs	r4, r1, r4
 8028298:	2c08      	cmp	r4, #8
 802829a:	f644 641f 	movw	r4, #19999	@ 0x4e1f
 802829e:	dc02      	bgt.n	80282a6 <_strtod_l+0x2ce>
 80282a0:	4564      	cmp	r4, ip
 80282a2:	bfa8      	it	ge
 80282a4:	4664      	movge	r4, ip
 80282a6:	f1be 0f00 	cmp.w	lr, #0
 80282aa:	d000      	beq.n	80282ae <_strtod_l+0x2d6>
 80282ac:	4264      	negs	r4, r4
 80282ae:	2b00      	cmp	r3, #0
 80282b0:	d14e      	bne.n	8028350 <_strtod_l+0x378>
 80282b2:	9b07      	ldr	r3, [sp, #28]
 80282b4:	4318      	orrs	r0, r3
 80282b6:	f47f aeca 	bne.w	802804e <_strtod_l+0x76>
 80282ba:	9b06      	ldr	r3, [sp, #24]
 80282bc:	2b00      	cmp	r3, #0
 80282be:	f47f aee2 	bne.w	8028086 <_strtod_l+0xae>
 80282c2:	2a69      	cmp	r2, #105	@ 0x69
 80282c4:	d027      	beq.n	8028316 <_strtod_l+0x33e>
 80282c6:	dc24      	bgt.n	8028312 <_strtod_l+0x33a>
 80282c8:	2a49      	cmp	r2, #73	@ 0x49
 80282ca:	d024      	beq.n	8028316 <_strtod_l+0x33e>
 80282cc:	2a4e      	cmp	r2, #78	@ 0x4e
 80282ce:	f47f aeda 	bne.w	8028086 <_strtod_l+0xae>
 80282d2:	4997      	ldr	r1, [pc, #604]	@ (8028530 <_strtod_l+0x558>)
 80282d4:	a811      	add	r0, sp, #68	@ 0x44
 80282d6:	f002 fc8d 	bl	802abf4 <__match>
 80282da:	2800      	cmp	r0, #0
 80282dc:	f43f aed3 	beq.w	8028086 <_strtod_l+0xae>
 80282e0:	9b11      	ldr	r3, [sp, #68]	@ 0x44
 80282e2:	781b      	ldrb	r3, [r3, #0]
 80282e4:	2b28      	cmp	r3, #40	@ 0x28
 80282e6:	d12d      	bne.n	8028344 <_strtod_l+0x36c>
 80282e8:	4992      	ldr	r1, [pc, #584]	@ (8028534 <_strtod_l+0x55c>)
 80282ea:	aa14      	add	r2, sp, #80	@ 0x50
 80282ec:	a811      	add	r0, sp, #68	@ 0x44
 80282ee:	f002 fc95 	bl	802ac1c <__hexnan>
 80282f2:	2805      	cmp	r0, #5
 80282f4:	d126      	bne.n	8028344 <_strtod_l+0x36c>
 80282f6:	9b15      	ldr	r3, [sp, #84]	@ 0x54
 80282f8:	f8dd a050 	ldr.w	sl, [sp, #80]	@ 0x50
 80282fc:	f043 4bff 	orr.w	fp, r3, #2139095040	@ 0x7f800000
 8028300:	f44b 0be0 	orr.w	fp, fp, #7340032	@ 0x700000
 8028304:	e6a3      	b.n	802804e <_strtod_l+0x76>
 8028306:	240a      	movs	r4, #10
 8028308:	fb04 2c0c 	mla	ip, r4, ip, r2
 802830c:	f1ac 0c30 	sub.w	ip, ip, #48	@ 0x30
 8028310:	e7b8      	b.n	8028284 <_strtod_l+0x2ac>
 8028312:	2a6e      	cmp	r2, #110	@ 0x6e
 8028314:	e7db      	b.n	80282ce <_strtod_l+0x2f6>
 8028316:	4988      	ldr	r1, [pc, #544]	@ (8028538 <_strtod_l+0x560>)
 8028318:	a811      	add	r0, sp, #68	@ 0x44
 802831a:	f002 fc6b 	bl	802abf4 <__match>
 802831e:	2800      	cmp	r0, #0
 8028320:	f43f aeb1 	beq.w	8028086 <_strtod_l+0xae>
 8028324:	9b11      	ldr	r3, [sp, #68]	@ 0x44
 8028326:	4985      	ldr	r1, [pc, #532]	@ (802853c <_strtod_l+0x564>)
 8028328:	3b01      	subs	r3, #1
 802832a:	a811      	add	r0, sp, #68	@ 0x44
 802832c:	9311      	str	r3, [sp, #68]	@ 0x44
 802832e:	f002 fc61 	bl	802abf4 <__match>
 8028332:	b910      	cbnz	r0, 802833a <_strtod_l+0x362>
 8028334:	9b11      	ldr	r3, [sp, #68]	@ 0x44
 8028336:	3301      	adds	r3, #1
 8028338:	9311      	str	r3, [sp, #68]	@ 0x44
 802833a:	f8df b214 	ldr.w	fp, [pc, #532]	@ 8028550 <_strtod_l+0x578>
 802833e:	f04f 0a00 	mov.w	sl, #0
 8028342:	e684      	b.n	802804e <_strtod_l+0x76>
 8028344:	487e      	ldr	r0, [pc, #504]	@ (8028540 <_strtod_l+0x568>)
 8028346:	f001 fb7b 	bl	8029a40 <nan>
 802834a:	ec5b ab10 	vmov	sl, fp, d0
 802834e:	e67e      	b.n	802804e <_strtod_l+0x76>
 8028350:	ee07 9a90 	vmov	s15, r9
 8028354:	1be2      	subs	r2, r4, r7
 8028356:	eeb8 7b67 	vcvt.f64.u32	d7, s15
 802835a:	2d00      	cmp	r5, #0
 802835c:	bf08      	it	eq
 802835e:	461d      	moveq	r5, r3
 8028360:	2b10      	cmp	r3, #16
 8028362:	9209      	str	r2, [sp, #36]	@ 0x24
 8028364:	461a      	mov	r2, r3
 8028366:	bfa8      	it	ge
 8028368:	2210      	movge	r2, #16
 802836a:	2b09      	cmp	r3, #9
 802836c:	ec5b ab17 	vmov	sl, fp, d7
 8028370:	dc15      	bgt.n	802839e <_strtod_l+0x3c6>
 8028372:	1be1      	subs	r1, r4, r7
 8028374:	2900      	cmp	r1, #0
 8028376:	f43f ae6a 	beq.w	802804e <_strtod_l+0x76>
 802837a:	eba4 0107 	sub.w	r1, r4, r7
 802837e:	dd72      	ble.n	8028466 <_strtod_l+0x48e>
 8028380:	2916      	cmp	r1, #22
 8028382:	dc59      	bgt.n	8028438 <_strtod_l+0x460>
 8028384:	4b6f      	ldr	r3, [pc, #444]	@ (8028544 <_strtod_l+0x56c>)
 8028386:	9a09      	ldr	r2, [sp, #36]	@ 0x24
 8028388:	eb03 03c2 	add.w	r3, r3, r2, lsl #3
 802838c:	ed93 7b00 	vldr	d7, [r3]
 8028390:	ec4b ab16 	vmov	d6, sl, fp
 8028394:	ee27 7b06 	vmul.f64	d7, d7, d6
 8028398:	ec5b ab17 	vmov	sl, fp, d7
 802839c:	e657      	b.n	802804e <_strtod_l+0x76>
 802839e:	4969      	ldr	r1, [pc, #420]	@ (8028544 <_strtod_l+0x56c>)
 80283a0:	eb01 01c2 	add.w	r1, r1, r2, lsl #3
 80283a4:	ed11 5b12 	vldr	d5, [r1, #-72]	@ 0xffffffb8
 80283a8:	ee06 6a90 	vmov	s13, r6
 80283ac:	2b0f      	cmp	r3, #15
 80283ae:	eeb8 6b66 	vcvt.f64.u32	d6, s13
 80283b2:	eea7 6b05 	vfma.f64	d6, d7, d5
 80283b6:	ec5b ab16 	vmov	sl, fp, d6
 80283ba:	ddda      	ble.n	8028372 <_strtod_l+0x39a>
 80283bc:	1a9a      	subs	r2, r3, r2
 80283be:	1be1      	subs	r1, r4, r7
 80283c0:	440a      	add	r2, r1
 80283c2:	2a00      	cmp	r2, #0
 80283c4:	f340 8094 	ble.w	80284f0 <_strtod_l+0x518>
 80283c8:	f012 000f 	ands.w	r0, r2, #15
 80283cc:	d00a      	beq.n	80283e4 <_strtod_l+0x40c>
 80283ce:	495d      	ldr	r1, [pc, #372]	@ (8028544 <_strtod_l+0x56c>)
 80283d0:	eb01 01c0 	add.w	r1, r1, r0, lsl #3
 80283d4:	ed91 7b00 	vldr	d7, [r1]
 80283d8:	ec4b ab16 	vmov	d6, sl, fp
 80283dc:	ee27 7b06 	vmul.f64	d7, d7, d6
 80283e0:	ec5b ab17 	vmov	sl, fp, d7
 80283e4:	f032 020f 	bics.w	r2, r2, #15
 80283e8:	d073      	beq.n	80284d2 <_strtod_l+0x4fa>
 80283ea:	f5b2 7f9a 	cmp.w	r2, #308	@ 0x134
 80283ee:	dd47      	ble.n	8028480 <_strtod_l+0x4a8>
 80283f0:	2400      	movs	r4, #0
 80283f2:	4625      	mov	r5, r4
 80283f4:	9407      	str	r4, [sp, #28]
 80283f6:	4626      	mov	r6, r4
 80283f8:	9a05      	ldr	r2, [sp, #20]
 80283fa:	f8df b154 	ldr.w	fp, [pc, #340]	@ 8028550 <_strtod_l+0x578>
 80283fe:	2322      	movs	r3, #34	@ 0x22
 8028400:	6013      	str	r3, [r2, #0]
 8028402:	f04f 0a00 	mov.w	sl, #0
 8028406:	9b07      	ldr	r3, [sp, #28]
 8028408:	2b00      	cmp	r3, #0
 802840a:	f43f ae20 	beq.w	802804e <_strtod_l+0x76>
 802840e:	9912      	ldr	r1, [sp, #72]	@ 0x48
 8028410:	9805      	ldr	r0, [sp, #20]
 8028412:	f002 fcf1 	bl	802adf8 <_Bfree>
 8028416:	9805      	ldr	r0, [sp, #20]
 8028418:	4631      	mov	r1, r6
 802841a:	f002 fced 	bl	802adf8 <_Bfree>
 802841e:	9805      	ldr	r0, [sp, #20]
 8028420:	4629      	mov	r1, r5
 8028422:	f002 fce9 	bl	802adf8 <_Bfree>
 8028426:	9907      	ldr	r1, [sp, #28]
 8028428:	9805      	ldr	r0, [sp, #20]
 802842a:	f002 fce5 	bl	802adf8 <_Bfree>
 802842e:	9805      	ldr	r0, [sp, #20]
 8028430:	4621      	mov	r1, r4
 8028432:	f002 fce1 	bl	802adf8 <_Bfree>
 8028436:	e60a      	b.n	802804e <_strtod_l+0x76>
 8028438:	f1c3 0125 	rsb	r1, r3, #37	@ 0x25
 802843c:	1be0      	subs	r0, r4, r7
 802843e:	4281      	cmp	r1, r0
 8028440:	dbbc      	blt.n	80283bc <_strtod_l+0x3e4>
 8028442:	4a40      	ldr	r2, [pc, #256]	@ (8028544 <_strtod_l+0x56c>)
 8028444:	f1c3 030f 	rsb	r3, r3, #15
 8028448:	eb02 01c3 	add.w	r1, r2, r3, lsl #3
 802844c:	ed91 7b00 	vldr	d7, [r1]
 8028450:	9909      	ldr	r1, [sp, #36]	@ 0x24
 8028452:	ec4b ab16 	vmov	d6, sl, fp
 8028456:	1acb      	subs	r3, r1, r3
 8028458:	eb02 02c3 	add.w	r2, r2, r3, lsl #3
 802845c:	ee27 7b06 	vmul.f64	d7, d7, d6
 8028460:	ed92 6b00 	vldr	d6, [r2]
 8028464:	e796      	b.n	8028394 <_strtod_l+0x3bc>
 8028466:	3116      	adds	r1, #22
 8028468:	dba8      	blt.n	80283bc <_strtod_l+0x3e4>
 802846a:	4b36      	ldr	r3, [pc, #216]	@ (8028544 <_strtod_l+0x56c>)
 802846c:	1b3c      	subs	r4, r7, r4
 802846e:	eb03 04c4 	add.w	r4, r3, r4, lsl #3
 8028472:	ed94 7b00 	vldr	d7, [r4]
 8028476:	ec4b ab16 	vmov	d6, sl, fp
 802847a:	ee86 7b07 	vdiv.f64	d7, d6, d7
 802847e:	e78b      	b.n	8028398 <_strtod_l+0x3c0>
 8028480:	2000      	movs	r0, #0
 8028482:	ec4b ab17 	vmov	d7, sl, fp
 8028486:	4e30      	ldr	r6, [pc, #192]	@ (8028548 <_strtod_l+0x570>)
 8028488:	1112      	asrs	r2, r2, #4
 802848a:	4601      	mov	r1, r0
 802848c:	2a01      	cmp	r2, #1
 802848e:	dc23      	bgt.n	80284d8 <_strtod_l+0x500>
 8028490:	b108      	cbz	r0, 8028496 <_strtod_l+0x4be>
 8028492:	ec5b ab17 	vmov	sl, fp, d7
 8028496:	4a2c      	ldr	r2, [pc, #176]	@ (8028548 <_strtod_l+0x570>)
 8028498:	482c      	ldr	r0, [pc, #176]	@ (802854c <_strtod_l+0x574>)
 802849a:	eb02 02c1 	add.w	r2, r2, r1, lsl #3
 802849e:	ed92 7b00 	vldr	d7, [r2]
 80284a2:	f1ab 7b54 	sub.w	fp, fp, #55574528	@ 0x3500000
 80284a6:	ec4b ab16 	vmov	d6, sl, fp
 80284aa:	4a29      	ldr	r2, [pc, #164]	@ (8028550 <_strtod_l+0x578>)
 80284ac:	ee27 7b06 	vmul.f64	d7, d7, d6
 80284b0:	ee17 1a90 	vmov	r1, s15
 80284b4:	400a      	ands	r2, r1
 80284b6:	4282      	cmp	r2, r0
 80284b8:	ec5b ab17 	vmov	sl, fp, d7
 80284bc:	d898      	bhi.n	80283f0 <_strtod_l+0x418>
 80284be:	f5a0 1080 	sub.w	r0, r0, #1048576	@ 0x100000
 80284c2:	4282      	cmp	r2, r0
 80284c4:	bf86      	itte	hi
 80284c6:	f8df b08c 	ldrhi.w	fp, [pc, #140]	@ 8028554 <_strtod_l+0x57c>
 80284ca:	f04f 3aff 	movhi.w	sl, #4294967295	@ 0xffffffff
 80284ce:	f101 7b54 	addls.w	fp, r1, #55574528	@ 0x3500000
 80284d2:	2200      	movs	r2, #0
 80284d4:	9206      	str	r2, [sp, #24]
 80284d6:	e076      	b.n	80285c6 <_strtod_l+0x5ee>
 80284d8:	f012 0f01 	tst.w	r2, #1
 80284dc:	d004      	beq.n	80284e8 <_strtod_l+0x510>
 80284de:	ed96 6b00 	vldr	d6, [r6]
 80284e2:	2001      	movs	r0, #1
 80284e4:	ee27 7b06 	vmul.f64	d7, d7, d6
 80284e8:	3101      	adds	r1, #1
 80284ea:	1052      	asrs	r2, r2, #1
 80284ec:	3608      	adds	r6, #8
 80284ee:	e7cd      	b.n	802848c <_strtod_l+0x4b4>
 80284f0:	d0ef      	beq.n	80284d2 <_strtod_l+0x4fa>
 80284f2:	4252      	negs	r2, r2
 80284f4:	f012 000f 	ands.w	r0, r2, #15
 80284f8:	d00a      	beq.n	8028510 <_strtod_l+0x538>
 80284fa:	4912      	ldr	r1, [pc, #72]	@ (8028544 <_strtod_l+0x56c>)
 80284fc:	eb01 01c0 	add.w	r1, r1, r0, lsl #3
 8028500:	ed91 7b00 	vldr	d7, [r1]
 8028504:	ec4b ab16 	vmov	d6, sl, fp
 8028508:	ee86 7b07 	vdiv.f64	d7, d6, d7
 802850c:	ec5b ab17 	vmov	sl, fp, d7
 8028510:	1112      	asrs	r2, r2, #4
 8028512:	d0de      	beq.n	80284d2 <_strtod_l+0x4fa>
 8028514:	2a1f      	cmp	r2, #31
 8028516:	dd1f      	ble.n	8028558 <_strtod_l+0x580>
 8028518:	2400      	movs	r4, #0
 802851a:	4625      	mov	r5, r4
 802851c:	9407      	str	r4, [sp, #28]
 802851e:	4626      	mov	r6, r4
 8028520:	9a05      	ldr	r2, [sp, #20]
 8028522:	2322      	movs	r3, #34	@ 0x22
 8028524:	f04f 0a00 	mov.w	sl, #0
 8028528:	f04f 0b00 	mov.w	fp, #0
 802852c:	6013      	str	r3, [r2, #0]
 802852e:	e76a      	b.n	8028406 <_strtod_l+0x42e>
 8028530:	0803098e 	.word	0x0803098e
 8028534:	0803082c 	.word	0x0803082c
 8028538:	08030986 	.word	0x08030986
 802853c:	080309fc 	.word	0x080309fc
 8028540:	080309f8 	.word	0x080309f8
 8028544:	08030b60 	.word	0x08030b60
 8028548:	08030b38 	.word	0x08030b38
 802854c:	7ca00000 	.word	0x7ca00000
 8028550:	7ff00000 	.word	0x7ff00000
 8028554:	7fefffff 	.word	0x7fefffff
 8028558:	f012 0110 	ands.w	r1, r2, #16
 802855c:	bf18      	it	ne
 802855e:	216a      	movne	r1, #106	@ 0x6a
 8028560:	9106      	str	r1, [sp, #24]
 8028562:	ec4b ab17 	vmov	d7, sl, fp
 8028566:	49b0      	ldr	r1, [pc, #704]	@ (8028828 <_strtod_l+0x850>)
 8028568:	2000      	movs	r0, #0
 802856a:	07d6      	lsls	r6, r2, #31
 802856c:	d504      	bpl.n	8028578 <_strtod_l+0x5a0>
 802856e:	ed91 6b00 	vldr	d6, [r1]
 8028572:	2001      	movs	r0, #1
 8028574:	ee27 7b06 	vmul.f64	d7, d7, d6
 8028578:	1052      	asrs	r2, r2, #1
 802857a:	f101 0108 	add.w	r1, r1, #8
 802857e:	d1f4      	bne.n	802856a <_strtod_l+0x592>
 8028580:	b108      	cbz	r0, 8028586 <_strtod_l+0x5ae>
 8028582:	ec5b ab17 	vmov	sl, fp, d7
 8028586:	9a06      	ldr	r2, [sp, #24]
 8028588:	b1b2      	cbz	r2, 80285b8 <_strtod_l+0x5e0>
 802858a:	f3cb 510a 	ubfx	r1, fp, #20, #11
 802858e:	f1c1 026b 	rsb	r2, r1, #107	@ 0x6b
 8028592:	2a00      	cmp	r2, #0
 8028594:	4658      	mov	r0, fp
 8028596:	dd0f      	ble.n	80285b8 <_strtod_l+0x5e0>
 8028598:	2a1f      	cmp	r2, #31
 802859a:	dd55      	ble.n	8028648 <_strtod_l+0x670>
 802859c:	2a34      	cmp	r2, #52	@ 0x34
 802859e:	bfde      	ittt	le
 80285a0:	f04f 32ff 	movle.w	r2, #4294967295	@ 0xffffffff
 80285a4:	f1c1 014b 	rsble	r1, r1, #75	@ 0x4b
 80285a8:	408a      	lslle	r2, r1
 80285aa:	f04f 0a00 	mov.w	sl, #0
 80285ae:	bfcc      	ite	gt
 80285b0:	f04f 7b5c 	movgt.w	fp, #57671680	@ 0x3700000
 80285b4:	ea02 0b00 	andle.w	fp, r2, r0
 80285b8:	ec4b ab17 	vmov	d7, sl, fp
 80285bc:	eeb5 7b40 	vcmp.f64	d7, #0.0
 80285c0:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 80285c4:	d0a8      	beq.n	8028518 <_strtod_l+0x540>
 80285c6:	990a      	ldr	r1, [sp, #40]	@ 0x28
 80285c8:	9805      	ldr	r0, [sp, #20]
 80285ca:	f8cd 9000 	str.w	r9, [sp]
 80285ce:	462a      	mov	r2, r5
 80285d0:	f002 fc7a 	bl	802aec8 <__s2b>
 80285d4:	9007      	str	r0, [sp, #28]
 80285d6:	2800      	cmp	r0, #0
 80285d8:	f43f af0a 	beq.w	80283f0 <_strtod_l+0x418>
 80285dc:	9b09      	ldr	r3, [sp, #36]	@ 0x24
 80285de:	1b3f      	subs	r7, r7, r4
 80285e0:	2b00      	cmp	r3, #0
 80285e2:	bfb4      	ite	lt
 80285e4:	463b      	movlt	r3, r7
 80285e6:	2300      	movge	r3, #0
 80285e8:	930a      	str	r3, [sp, #40]	@ 0x28
 80285ea:	9b09      	ldr	r3, [sp, #36]	@ 0x24
 80285ec:	ed9f bb8a 	vldr	d11, [pc, #552]	@ 8028818 <_strtod_l+0x840>
 80285f0:	ea23 73e3 	bic.w	r3, r3, r3, asr #31
 80285f4:	2400      	movs	r4, #0
 80285f6:	930d      	str	r3, [sp, #52]	@ 0x34
 80285f8:	4625      	mov	r5, r4
 80285fa:	9b07      	ldr	r3, [sp, #28]
 80285fc:	9805      	ldr	r0, [sp, #20]
 80285fe:	6859      	ldr	r1, [r3, #4]
 8028600:	f002 fbba 	bl	802ad78 <_Balloc>
 8028604:	4606      	mov	r6, r0
 8028606:	2800      	cmp	r0, #0
 8028608:	f43f aef6 	beq.w	80283f8 <_strtod_l+0x420>
 802860c:	9b07      	ldr	r3, [sp, #28]
 802860e:	691a      	ldr	r2, [r3, #16]
 8028610:	ec4b ab19 	vmov	d9, sl, fp
 8028614:	3202      	adds	r2, #2
 8028616:	f103 010c 	add.w	r1, r3, #12
 802861a:	0092      	lsls	r2, r2, #2
 802861c:	300c      	adds	r0, #12
 802861e:	f001 f9fe 	bl	8029a1e <memcpy>
 8028622:	eeb0 0b49 	vmov.f64	d0, d9
 8028626:	9805      	ldr	r0, [sp, #20]
 8028628:	aa14      	add	r2, sp, #80	@ 0x50
 802862a:	a913      	add	r1, sp, #76	@ 0x4c
 802862c:	f002 ff88 	bl	802b540 <__d2b>
 8028630:	9012      	str	r0, [sp, #72]	@ 0x48
 8028632:	2800      	cmp	r0, #0
 8028634:	f43f aee0 	beq.w	80283f8 <_strtod_l+0x420>
 8028638:	9805      	ldr	r0, [sp, #20]
 802863a:	2101      	movs	r1, #1
 802863c:	f002 fcda 	bl	802aff4 <__i2b>
 8028640:	4605      	mov	r5, r0
 8028642:	b940      	cbnz	r0, 8028656 <_strtod_l+0x67e>
 8028644:	2500      	movs	r5, #0
 8028646:	e6d7      	b.n	80283f8 <_strtod_l+0x420>
 8028648:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 802864c:	fa01 f202 	lsl.w	r2, r1, r2
 8028650:	ea02 0a0a 	and.w	sl, r2, sl
 8028654:	e7b0      	b.n	80285b8 <_strtod_l+0x5e0>
 8028656:	9f13      	ldr	r7, [sp, #76]	@ 0x4c
 8028658:	9a14      	ldr	r2, [sp, #80]	@ 0x50
 802865a:	2f00      	cmp	r7, #0
 802865c:	bfab      	itete	ge
 802865e:	9b0a      	ldrge	r3, [sp, #40]	@ 0x28
 8028660:	9b0d      	ldrlt	r3, [sp, #52]	@ 0x34
 8028662:	f8dd 8034 	ldrge.w	r8, [sp, #52]	@ 0x34
 8028666:	f8dd 9028 	ldrlt.w	r9, [sp, #40]	@ 0x28
 802866a:	bfac      	ite	ge
 802866c:	eb07 0903 	addge.w	r9, r7, r3
 8028670:	eba3 0807 	sublt.w	r8, r3, r7
 8028674:	9b06      	ldr	r3, [sp, #24]
 8028676:	1aff      	subs	r7, r7, r3
 8028678:	4417      	add	r7, r2
 802867a:	f1c2 0336 	rsb	r3, r2, #54	@ 0x36
 802867e:	4a6b      	ldr	r2, [pc, #428]	@ (802882c <_strtod_l+0x854>)
 8028680:	3f01      	subs	r7, #1
 8028682:	4297      	cmp	r7, r2
 8028684:	da51      	bge.n	802872a <_strtod_l+0x752>
 8028686:	1bd1      	subs	r1, r2, r7
 8028688:	291f      	cmp	r1, #31
 802868a:	eba3 0301 	sub.w	r3, r3, r1
 802868e:	f04f 0201 	mov.w	r2, #1
 8028692:	dc3e      	bgt.n	8028712 <_strtod_l+0x73a>
 8028694:	408a      	lsls	r2, r1
 8028696:	920c      	str	r2, [sp, #48]	@ 0x30
 8028698:	2200      	movs	r2, #0
 802869a:	920b      	str	r2, [sp, #44]	@ 0x2c
 802869c:	eb09 0703 	add.w	r7, r9, r3
 80286a0:	4498      	add	r8, r3
 80286a2:	9b06      	ldr	r3, [sp, #24]
 80286a4:	45b9      	cmp	r9, r7
 80286a6:	4498      	add	r8, r3
 80286a8:	464b      	mov	r3, r9
 80286aa:	bfa8      	it	ge
 80286ac:	463b      	movge	r3, r7
 80286ae:	4543      	cmp	r3, r8
 80286b0:	bfa8      	it	ge
 80286b2:	4643      	movge	r3, r8
 80286b4:	2b00      	cmp	r3, #0
 80286b6:	bfc2      	ittt	gt
 80286b8:	1aff      	subgt	r7, r7, r3
 80286ba:	eba8 0803 	subgt.w	r8, r8, r3
 80286be:	eba9 0903 	subgt.w	r9, r9, r3
 80286c2:	9b0a      	ldr	r3, [sp, #40]	@ 0x28
 80286c4:	2b00      	cmp	r3, #0
 80286c6:	dd16      	ble.n	80286f6 <_strtod_l+0x71e>
 80286c8:	4629      	mov	r1, r5
 80286ca:	9805      	ldr	r0, [sp, #20]
 80286cc:	461a      	mov	r2, r3
 80286ce:	f002 fd51 	bl	802b174 <__pow5mult>
 80286d2:	4605      	mov	r5, r0
 80286d4:	2800      	cmp	r0, #0
 80286d6:	d0b5      	beq.n	8028644 <_strtod_l+0x66c>
 80286d8:	4601      	mov	r1, r0
 80286da:	9a12      	ldr	r2, [sp, #72]	@ 0x48
 80286dc:	9805      	ldr	r0, [sp, #20]
 80286de:	f002 fc9f 	bl	802b020 <__multiply>
 80286e2:	900f      	str	r0, [sp, #60]	@ 0x3c
 80286e4:	2800      	cmp	r0, #0
 80286e6:	f43f ae87 	beq.w	80283f8 <_strtod_l+0x420>
 80286ea:	9912      	ldr	r1, [sp, #72]	@ 0x48
 80286ec:	9805      	ldr	r0, [sp, #20]
 80286ee:	f002 fb83 	bl	802adf8 <_Bfree>
 80286f2:	9b0f      	ldr	r3, [sp, #60]	@ 0x3c
 80286f4:	9312      	str	r3, [sp, #72]	@ 0x48
 80286f6:	2f00      	cmp	r7, #0
 80286f8:	dc1b      	bgt.n	8028732 <_strtod_l+0x75a>
 80286fa:	9b09      	ldr	r3, [sp, #36]	@ 0x24
 80286fc:	2b00      	cmp	r3, #0
 80286fe:	dd21      	ble.n	8028744 <_strtod_l+0x76c>
 8028700:	4631      	mov	r1, r6
 8028702:	9a0d      	ldr	r2, [sp, #52]	@ 0x34
 8028704:	9805      	ldr	r0, [sp, #20]
 8028706:	f002 fd35 	bl	802b174 <__pow5mult>
 802870a:	4606      	mov	r6, r0
 802870c:	b9d0      	cbnz	r0, 8028744 <_strtod_l+0x76c>
 802870e:	2600      	movs	r6, #0
 8028710:	e672      	b.n	80283f8 <_strtod_l+0x420>
 8028712:	f1c7 477f 	rsb	r7, r7, #4278190080	@ 0xff000000
 8028716:	f507 077f 	add.w	r7, r7, #16711680	@ 0xff0000
 802871a:	f507 477b 	add.w	r7, r7, #64256	@ 0xfb00
 802871e:	37e2      	adds	r7, #226	@ 0xe2
 8028720:	fa02 f107 	lsl.w	r1, r2, r7
 8028724:	910b      	str	r1, [sp, #44]	@ 0x2c
 8028726:	920c      	str	r2, [sp, #48]	@ 0x30
 8028728:	e7b8      	b.n	802869c <_strtod_l+0x6c4>
 802872a:	2200      	movs	r2, #0
 802872c:	920b      	str	r2, [sp, #44]	@ 0x2c
 802872e:	2201      	movs	r2, #1
 8028730:	e7f9      	b.n	8028726 <_strtod_l+0x74e>
 8028732:	9912      	ldr	r1, [sp, #72]	@ 0x48
 8028734:	9805      	ldr	r0, [sp, #20]
 8028736:	463a      	mov	r2, r7
 8028738:	f002 fd76 	bl	802b228 <__lshift>
 802873c:	9012      	str	r0, [sp, #72]	@ 0x48
 802873e:	2800      	cmp	r0, #0
 8028740:	d1db      	bne.n	80286fa <_strtod_l+0x722>
 8028742:	e659      	b.n	80283f8 <_strtod_l+0x420>
 8028744:	f1b8 0f00 	cmp.w	r8, #0
 8028748:	dd07      	ble.n	802875a <_strtod_l+0x782>
 802874a:	4631      	mov	r1, r6
 802874c:	9805      	ldr	r0, [sp, #20]
 802874e:	4642      	mov	r2, r8
 8028750:	f002 fd6a 	bl	802b228 <__lshift>
 8028754:	4606      	mov	r6, r0
 8028756:	2800      	cmp	r0, #0
 8028758:	d0d9      	beq.n	802870e <_strtod_l+0x736>
 802875a:	f1b9 0f00 	cmp.w	r9, #0
 802875e:	dd08      	ble.n	8028772 <_strtod_l+0x79a>
 8028760:	4629      	mov	r1, r5
 8028762:	9805      	ldr	r0, [sp, #20]
 8028764:	464a      	mov	r2, r9
 8028766:	f002 fd5f 	bl	802b228 <__lshift>
 802876a:	4605      	mov	r5, r0
 802876c:	2800      	cmp	r0, #0
 802876e:	f43f ae43 	beq.w	80283f8 <_strtod_l+0x420>
 8028772:	9912      	ldr	r1, [sp, #72]	@ 0x48
 8028774:	9805      	ldr	r0, [sp, #20]
 8028776:	4632      	mov	r2, r6
 8028778:	f002 fdde 	bl	802b338 <__mdiff>
 802877c:	4604      	mov	r4, r0
 802877e:	2800      	cmp	r0, #0
 8028780:	f43f ae3a 	beq.w	80283f8 <_strtod_l+0x420>
 8028784:	2300      	movs	r3, #0
 8028786:	f8d0 800c 	ldr.w	r8, [r0, #12]
 802878a:	60c3      	str	r3, [r0, #12]
 802878c:	4629      	mov	r1, r5
 802878e:	f002 fdb7 	bl	802b300 <__mcmp>
 8028792:	2800      	cmp	r0, #0
 8028794:	da4e      	bge.n	8028834 <_strtod_l+0x85c>
 8028796:	ea58 080a 	orrs.w	r8, r8, sl
 802879a:	d174      	bne.n	8028886 <_strtod_l+0x8ae>
 802879c:	f3cb 0313 	ubfx	r3, fp, #0, #20
 80287a0:	2b00      	cmp	r3, #0
 80287a2:	d170      	bne.n	8028886 <_strtod_l+0x8ae>
 80287a4:	f02b 4300 	bic.w	r3, fp, #2147483648	@ 0x80000000
 80287a8:	0d1b      	lsrs	r3, r3, #20
 80287aa:	051b      	lsls	r3, r3, #20
 80287ac:	f1b3 6fd6 	cmp.w	r3, #112197632	@ 0x6b00000
 80287b0:	d969      	bls.n	8028886 <_strtod_l+0x8ae>
 80287b2:	6963      	ldr	r3, [r4, #20]
 80287b4:	b913      	cbnz	r3, 80287bc <_strtod_l+0x7e4>
 80287b6:	6923      	ldr	r3, [r4, #16]
 80287b8:	2b01      	cmp	r3, #1
 80287ba:	dd64      	ble.n	8028886 <_strtod_l+0x8ae>
 80287bc:	4621      	mov	r1, r4
 80287be:	2201      	movs	r2, #1
 80287c0:	9805      	ldr	r0, [sp, #20]
 80287c2:	f002 fd31 	bl	802b228 <__lshift>
 80287c6:	4629      	mov	r1, r5
 80287c8:	4604      	mov	r4, r0
 80287ca:	f002 fd99 	bl	802b300 <__mcmp>
 80287ce:	2800      	cmp	r0, #0
 80287d0:	dd59      	ble.n	8028886 <_strtod_l+0x8ae>
 80287d2:	f02b 4300 	bic.w	r3, fp, #2147483648	@ 0x80000000
 80287d6:	9a06      	ldr	r2, [sp, #24]
 80287d8:	0d1b      	lsrs	r3, r3, #20
 80287da:	051b      	lsls	r3, r3, #20
 80287dc:	2a00      	cmp	r2, #0
 80287de:	d070      	beq.n	80288c2 <_strtod_l+0x8ea>
 80287e0:	f1b3 6fd6 	cmp.w	r3, #112197632	@ 0x6b00000
 80287e4:	d86d      	bhi.n	80288c2 <_strtod_l+0x8ea>
 80287e6:	f1b3 7f5c 	cmp.w	r3, #57671680	@ 0x3700000
 80287ea:	f67f ae99 	bls.w	8028520 <_strtod_l+0x548>
 80287ee:	ed9f 7b0c 	vldr	d7, [pc, #48]	@ 8028820 <_strtod_l+0x848>
 80287f2:	ec4b ab16 	vmov	d6, sl, fp
 80287f6:	4b0e      	ldr	r3, [pc, #56]	@ (8028830 <_strtod_l+0x858>)
 80287f8:	ee26 7b07 	vmul.f64	d7, d6, d7
 80287fc:	ee17 2a90 	vmov	r2, s15
 8028800:	4013      	ands	r3, r2
 8028802:	ec5b ab17 	vmov	sl, fp, d7
 8028806:	2b00      	cmp	r3, #0
 8028808:	f47f ae01 	bne.w	802840e <_strtod_l+0x436>
 802880c:	9a05      	ldr	r2, [sp, #20]
 802880e:	2322      	movs	r3, #34	@ 0x22
 8028810:	6013      	str	r3, [r2, #0]
 8028812:	e5fc      	b.n	802840e <_strtod_l+0x436>
 8028814:	f3af 8000 	nop.w
 8028818:	ffc00000 	.word	0xffc00000
 802881c:	41dfffff 	.word	0x41dfffff
 8028820:	00000000 	.word	0x00000000
 8028824:	39500000 	.word	0x39500000
 8028828:	08030858 	.word	0x08030858
 802882c:	fffffc02 	.word	0xfffffc02
 8028830:	7ff00000 	.word	0x7ff00000
 8028834:	46d9      	mov	r9, fp
 8028836:	d15d      	bne.n	80288f4 <_strtod_l+0x91c>
 8028838:	f3cb 0313 	ubfx	r3, fp, #0, #20
 802883c:	f1b8 0f00 	cmp.w	r8, #0
 8028840:	d02a      	beq.n	8028898 <_strtod_l+0x8c0>
 8028842:	4aab      	ldr	r2, [pc, #684]	@ (8028af0 <_strtod_l+0xb18>)
 8028844:	4293      	cmp	r3, r2
 8028846:	d12a      	bne.n	802889e <_strtod_l+0x8c6>
 8028848:	9b06      	ldr	r3, [sp, #24]
 802884a:	4652      	mov	r2, sl
 802884c:	b1fb      	cbz	r3, 802888e <_strtod_l+0x8b6>
 802884e:	4ba9      	ldr	r3, [pc, #676]	@ (8028af4 <_strtod_l+0xb1c>)
 8028850:	ea0b 0303 	and.w	r3, fp, r3
 8028854:	f1b3 6fd4 	cmp.w	r3, #111149056	@ 0x6a00000
 8028858:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 802885c:	d81a      	bhi.n	8028894 <_strtod_l+0x8bc>
 802885e:	0d1b      	lsrs	r3, r3, #20
 8028860:	f1c3 036b 	rsb	r3, r3, #107	@ 0x6b
 8028864:	fa01 f303 	lsl.w	r3, r1, r3
 8028868:	429a      	cmp	r2, r3
 802886a:	d118      	bne.n	802889e <_strtod_l+0x8c6>
 802886c:	4ba2      	ldr	r3, [pc, #648]	@ (8028af8 <_strtod_l+0xb20>)
 802886e:	4599      	cmp	r9, r3
 8028870:	d102      	bne.n	8028878 <_strtod_l+0x8a0>
 8028872:	3201      	adds	r2, #1
 8028874:	f43f adc0 	beq.w	80283f8 <_strtod_l+0x420>
 8028878:	4b9e      	ldr	r3, [pc, #632]	@ (8028af4 <_strtod_l+0xb1c>)
 802887a:	ea09 0303 	and.w	r3, r9, r3
 802887e:	f503 1b80 	add.w	fp, r3, #1048576	@ 0x100000
 8028882:	f04f 0a00 	mov.w	sl, #0
 8028886:	9b06      	ldr	r3, [sp, #24]
 8028888:	2b00      	cmp	r3, #0
 802888a:	d1b0      	bne.n	80287ee <_strtod_l+0x816>
 802888c:	e5bf      	b.n	802840e <_strtod_l+0x436>
 802888e:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8028892:	e7e9      	b.n	8028868 <_strtod_l+0x890>
 8028894:	460b      	mov	r3, r1
 8028896:	e7e7      	b.n	8028868 <_strtod_l+0x890>
 8028898:	ea53 030a 	orrs.w	r3, r3, sl
 802889c:	d099      	beq.n	80287d2 <_strtod_l+0x7fa>
 802889e:	9b0b      	ldr	r3, [sp, #44]	@ 0x2c
 80288a0:	b1c3      	cbz	r3, 80288d4 <_strtod_l+0x8fc>
 80288a2:	ea13 0f09 	tst.w	r3, r9
 80288a6:	d0ee      	beq.n	8028886 <_strtod_l+0x8ae>
 80288a8:	9a06      	ldr	r2, [sp, #24]
 80288aa:	4650      	mov	r0, sl
 80288ac:	4659      	mov	r1, fp
 80288ae:	f1b8 0f00 	cmp.w	r8, #0
 80288b2:	d013      	beq.n	80288dc <_strtod_l+0x904>
 80288b4:	f7ff fb74 	bl	8027fa0 <sulp>
 80288b8:	ee39 7b00 	vadd.f64	d7, d9, d0
 80288bc:	ec5b ab17 	vmov	sl, fp, d7
 80288c0:	e7e1      	b.n	8028886 <_strtod_l+0x8ae>
 80288c2:	f5a3 1380 	sub.w	r3, r3, #1048576	@ 0x100000
 80288c6:	ea6f 5b13 	mvn.w	fp, r3, lsr #20
 80288ca:	ea6f 5b0b 	mvn.w	fp, fp, lsl #20
 80288ce:	f04f 3aff 	mov.w	sl, #4294967295	@ 0xffffffff
 80288d2:	e7d8      	b.n	8028886 <_strtod_l+0x8ae>
 80288d4:	9b0c      	ldr	r3, [sp, #48]	@ 0x30
 80288d6:	ea13 0f0a 	tst.w	r3, sl
 80288da:	e7e4      	b.n	80288a6 <_strtod_l+0x8ce>
 80288dc:	f7ff fb60 	bl	8027fa0 <sulp>
 80288e0:	ee39 0b40 	vsub.f64	d0, d9, d0
 80288e4:	eeb5 0b40 	vcmp.f64	d0, #0.0
 80288e8:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 80288ec:	ec5b ab10 	vmov	sl, fp, d0
 80288f0:	d1c9      	bne.n	8028886 <_strtod_l+0x8ae>
 80288f2:	e615      	b.n	8028520 <_strtod_l+0x548>
 80288f4:	4629      	mov	r1, r5
 80288f6:	4620      	mov	r0, r4
 80288f8:	f002 fe7a 	bl	802b5f0 <__ratio>
 80288fc:	eeb0 7b00 	vmov.f64	d7, #0	@ 0x40000000  2.0
 8028900:	eeb4 0bc7 	vcmpe.f64	d0, d7
 8028904:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 8028908:	d85d      	bhi.n	80289c6 <_strtod_l+0x9ee>
 802890a:	f1b8 0f00 	cmp.w	r8, #0
 802890e:	d164      	bne.n	80289da <_strtod_l+0xa02>
 8028910:	f1ba 0f00 	cmp.w	sl, #0
 8028914:	d14b      	bne.n	80289ae <_strtod_l+0x9d6>
 8028916:	f3cb 0313 	ubfx	r3, fp, #0, #20
 802891a:	eeb7 8b00 	vmov.f64	d8, #112	@ 0x3f800000  1.0
 802891e:	2b00      	cmp	r3, #0
 8028920:	d160      	bne.n	80289e4 <_strtod_l+0xa0c>
 8028922:	eeb4 0bc8 	vcmpe.f64	d0, d8
 8028926:	eeb6 8b00 	vmov.f64	d8, #96	@ 0x3f000000  0.5
 802892a:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802892e:	d401      	bmi.n	8028934 <_strtod_l+0x95c>
 8028930:	ee20 8b08 	vmul.f64	d8, d0, d8
 8028934:	eeb1 ab48 	vneg.f64	d10, d8
 8028938:	486e      	ldr	r0, [pc, #440]	@ (8028af4 <_strtod_l+0xb1c>)
 802893a:	4970      	ldr	r1, [pc, #448]	@ (8028afc <_strtod_l+0xb24>)
 802893c:	ea09 0700 	and.w	r7, r9, r0
 8028940:	428f      	cmp	r7, r1
 8028942:	ec53 2b1a 	vmov	r2, r3, d10
 8028946:	d17d      	bne.n	8028a44 <_strtod_l+0xa6c>
 8028948:	f1a9 7b54 	sub.w	fp, r9, #55574528	@ 0x3500000
 802894c:	ec4b ab1c 	vmov	d12, sl, fp
 8028950:	eeb0 0b4c 	vmov.f64	d0, d12
 8028954:	f002 fd84 	bl	802b460 <__ulp>
 8028958:	4866      	ldr	r0, [pc, #408]	@ (8028af4 <_strtod_l+0xb1c>)
 802895a:	eea0 cb0a 	vfma.f64	d12, d0, d10
 802895e:	ee1c 3a90 	vmov	r3, s25
 8028962:	4a67      	ldr	r2, [pc, #412]	@ (8028b00 <_strtod_l+0xb28>)
 8028964:	ea03 0100 	and.w	r1, r3, r0
 8028968:	4291      	cmp	r1, r2
 802896a:	ec5b ab1c 	vmov	sl, fp, d12
 802896e:	d93c      	bls.n	80289ea <_strtod_l+0xa12>
 8028970:	ee19 2a90 	vmov	r2, s19
 8028974:	4b60      	ldr	r3, [pc, #384]	@ (8028af8 <_strtod_l+0xb20>)
 8028976:	429a      	cmp	r2, r3
 8028978:	d104      	bne.n	8028984 <_strtod_l+0x9ac>
 802897a:	ee19 3a10 	vmov	r3, s18
 802897e:	3301      	adds	r3, #1
 8028980:	f43f ad3a 	beq.w	80283f8 <_strtod_l+0x420>
 8028984:	f8df b170 	ldr.w	fp, [pc, #368]	@ 8028af8 <_strtod_l+0xb20>
 8028988:	f04f 3aff 	mov.w	sl, #4294967295	@ 0xffffffff
 802898c:	9912      	ldr	r1, [sp, #72]	@ 0x48
 802898e:	9805      	ldr	r0, [sp, #20]
 8028990:	f002 fa32 	bl	802adf8 <_Bfree>
 8028994:	9805      	ldr	r0, [sp, #20]
 8028996:	4631      	mov	r1, r6
 8028998:	f002 fa2e 	bl	802adf8 <_Bfree>
 802899c:	9805      	ldr	r0, [sp, #20]
 802899e:	4629      	mov	r1, r5
 80289a0:	f002 fa2a 	bl	802adf8 <_Bfree>
 80289a4:	9805      	ldr	r0, [sp, #20]
 80289a6:	4621      	mov	r1, r4
 80289a8:	f002 fa26 	bl	802adf8 <_Bfree>
 80289ac:	e625      	b.n	80285fa <_strtod_l+0x622>
 80289ae:	f1ba 0f01 	cmp.w	sl, #1
 80289b2:	d103      	bne.n	80289bc <_strtod_l+0x9e4>
 80289b4:	f1bb 0f00 	cmp.w	fp, #0
 80289b8:	f43f adb2 	beq.w	8028520 <_strtod_l+0x548>
 80289bc:	eebf ab00 	vmov.f64	d10, #240	@ 0xbf800000 -1.0
 80289c0:	eeb7 8b00 	vmov.f64	d8, #112	@ 0x3f800000  1.0
 80289c4:	e7b8      	b.n	8028938 <_strtod_l+0x960>
 80289c6:	eeb6 8b00 	vmov.f64	d8, #96	@ 0x3f000000  0.5
 80289ca:	ee20 8b08 	vmul.f64	d8, d0, d8
 80289ce:	f1b8 0f00 	cmp.w	r8, #0
 80289d2:	d0af      	beq.n	8028934 <_strtod_l+0x95c>
 80289d4:	eeb0 ab48 	vmov.f64	d10, d8
 80289d8:	e7ae      	b.n	8028938 <_strtod_l+0x960>
 80289da:	eeb7 ab00 	vmov.f64	d10, #112	@ 0x3f800000  1.0
 80289de:	eeb0 8b4a 	vmov.f64	d8, d10
 80289e2:	e7a9      	b.n	8028938 <_strtod_l+0x960>
 80289e4:	eebf ab00 	vmov.f64	d10, #240	@ 0xbf800000 -1.0
 80289e8:	e7a6      	b.n	8028938 <_strtod_l+0x960>
 80289ea:	f103 7b54 	add.w	fp, r3, #55574528	@ 0x3500000
 80289ee:	9b06      	ldr	r3, [sp, #24]
 80289f0:	46d9      	mov	r9, fp
 80289f2:	2b00      	cmp	r3, #0
 80289f4:	d1ca      	bne.n	802898c <_strtod_l+0x9b4>
 80289f6:	f02b 4300 	bic.w	r3, fp, #2147483648	@ 0x80000000
 80289fa:	0d1b      	lsrs	r3, r3, #20
 80289fc:	051b      	lsls	r3, r3, #20
 80289fe:	429f      	cmp	r7, r3
 8028a00:	d1c4      	bne.n	802898c <_strtod_l+0x9b4>
 8028a02:	ec51 0b18 	vmov	r0, r1, d8
 8028a06:	f7d7 fea7 	bl	8000758 <__aeabi_d2lz>
 8028a0a:	f7d7 fe5f 	bl	80006cc <__aeabi_l2d>
 8028a0e:	f3cb 0913 	ubfx	r9, fp, #0, #20
 8028a12:	ec41 0b17 	vmov	d7, r0, r1
 8028a16:	ea49 090a 	orr.w	r9, r9, sl
 8028a1a:	ea59 0908 	orrs.w	r9, r9, r8
 8028a1e:	ee38 8b47 	vsub.f64	d8, d8, d7
 8028a22:	d03c      	beq.n	8028a9e <_strtod_l+0xac6>
 8028a24:	ed9f 7b2c 	vldr	d7, [pc, #176]	@ 8028ad8 <_strtod_l+0xb00>
 8028a28:	eeb4 8bc7 	vcmpe.f64	d8, d7
 8028a2c:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 8028a30:	f53f aced 	bmi.w	802840e <_strtod_l+0x436>
 8028a34:	ed9f 7b2a 	vldr	d7, [pc, #168]	@ 8028ae0 <_strtod_l+0xb08>
 8028a38:	eeb4 8bc7 	vcmpe.f64	d8, d7
 8028a3c:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 8028a40:	dda4      	ble.n	802898c <_strtod_l+0x9b4>
 8028a42:	e4e4      	b.n	802840e <_strtod_l+0x436>
 8028a44:	9906      	ldr	r1, [sp, #24]
 8028a46:	b1e1      	cbz	r1, 8028a82 <_strtod_l+0xaaa>
 8028a48:	f1b7 6fd4 	cmp.w	r7, #111149056	@ 0x6a00000
 8028a4c:	d819      	bhi.n	8028a82 <_strtod_l+0xaaa>
 8028a4e:	eeb4 8bcb 	vcmpe.f64	d8, d11
 8028a52:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 8028a56:	d811      	bhi.n	8028a7c <_strtod_l+0xaa4>
 8028a58:	eebc 8bc8 	vcvt.u32.f64	s16, d8
 8028a5c:	ee18 3a10 	vmov	r3, s16
 8028a60:	2b01      	cmp	r3, #1
 8028a62:	bf38      	it	cc
 8028a64:	2301      	movcc	r3, #1
 8028a66:	ee08 3a10 	vmov	s16, r3
 8028a6a:	eeb8 8b48 	vcvt.f64.u32	d8, s16
 8028a6e:	f1b8 0f00 	cmp.w	r8, #0
 8028a72:	d111      	bne.n	8028a98 <_strtod_l+0xac0>
 8028a74:	eeb1 7b48 	vneg.f64	d7, d8
 8028a78:	ec53 2b17 	vmov	r2, r3, d7
 8028a7c:	f103 61d6 	add.w	r1, r3, #112197632	@ 0x6b00000
 8028a80:	1bcb      	subs	r3, r1, r7
 8028a82:	eeb0 0b49 	vmov.f64	d0, d9
 8028a86:	ec43 2b1a 	vmov	d10, r2, r3
 8028a8a:	f002 fce9 	bl	802b460 <__ulp>
 8028a8e:	eeaa 9b00 	vfma.f64	d9, d10, d0
 8028a92:	ec5b ab19 	vmov	sl, fp, d9
 8028a96:	e7aa      	b.n	80289ee <_strtod_l+0xa16>
 8028a98:	eeb0 7b48 	vmov.f64	d7, d8
 8028a9c:	e7ec      	b.n	8028a78 <_strtod_l+0xaa0>
 8028a9e:	ed9f 7b12 	vldr	d7, [pc, #72]	@ 8028ae8 <_strtod_l+0xb10>
 8028aa2:	eeb4 8bc7 	vcmpe.f64	d8, d7
 8028aa6:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 8028aaa:	f57f af6f 	bpl.w	802898c <_strtod_l+0x9b4>
 8028aae:	e4ae      	b.n	802840e <_strtod_l+0x436>
 8028ab0:	2300      	movs	r3, #0
 8028ab2:	9308      	str	r3, [sp, #32]
 8028ab4:	9a0e      	ldr	r2, [sp, #56]	@ 0x38
 8028ab6:	9b11      	ldr	r3, [sp, #68]	@ 0x44
 8028ab8:	6013      	str	r3, [r2, #0]
 8028aba:	f7ff bacc 	b.w	8028056 <_strtod_l+0x7e>
 8028abe:	2a65      	cmp	r2, #101	@ 0x65
 8028ac0:	f43f abbc 	beq.w	802823c <_strtod_l+0x264>
 8028ac4:	2a45      	cmp	r2, #69	@ 0x45
 8028ac6:	f43f abb9 	beq.w	802823c <_strtod_l+0x264>
 8028aca:	2301      	movs	r3, #1
 8028acc:	9306      	str	r3, [sp, #24]
 8028ace:	f7ff bbf0 	b.w	80282b2 <_strtod_l+0x2da>
 8028ad2:	bf00      	nop
 8028ad4:	f3af 8000 	nop.w
 8028ad8:	94a03595 	.word	0x94a03595
 8028adc:	3fdfffff 	.word	0x3fdfffff
 8028ae0:	35afe535 	.word	0x35afe535
 8028ae4:	3fe00000 	.word	0x3fe00000
 8028ae8:	94a03595 	.word	0x94a03595
 8028aec:	3fcfffff 	.word	0x3fcfffff
 8028af0:	000fffff 	.word	0x000fffff
 8028af4:	7ff00000 	.word	0x7ff00000
 8028af8:	7fefffff 	.word	0x7fefffff
 8028afc:	7fe00000 	.word	0x7fe00000
 8028b00:	7c9fffff 	.word	0x7c9fffff

08028b04 <strtod>:
 8028b04:	460a      	mov	r2, r1
 8028b06:	4601      	mov	r1, r0
 8028b08:	4802      	ldr	r0, [pc, #8]	@ (8028b14 <strtod+0x10>)
 8028b0a:	4b03      	ldr	r3, [pc, #12]	@ (8028b18 <strtod+0x14>)
 8028b0c:	6800      	ldr	r0, [r0, #0]
 8028b0e:	f7ff ba63 	b.w	8027fd8 <_strtod_l>
 8028b12:	bf00      	nop
 8028b14:	240001c0 	.word	0x240001c0
 8028b18:	24000054 	.word	0x24000054

08028b1c <__cvt>:
 8028b1c:	b5f0      	push	{r4, r5, r6, r7, lr}
 8028b1e:	ed2d 8b02 	vpush	{d8}
 8028b22:	eeb0 8b40 	vmov.f64	d8, d0
 8028b26:	b085      	sub	sp, #20
 8028b28:	4617      	mov	r7, r2
 8028b2a:	9d0d      	ldr	r5, [sp, #52]	@ 0x34
 8028b2c:	9e0c      	ldr	r6, [sp, #48]	@ 0x30
 8028b2e:	ee18 2a90 	vmov	r2, s17
 8028b32:	f025 0520 	bic.w	r5, r5, #32
 8028b36:	2a00      	cmp	r2, #0
 8028b38:	bfb6      	itet	lt
 8028b3a:	222d      	movlt	r2, #45	@ 0x2d
 8028b3c:	2200      	movge	r2, #0
 8028b3e:	eeb1 8b40 	vneglt.f64	d8, d0
 8028b42:	2d46      	cmp	r5, #70	@ 0x46
 8028b44:	460c      	mov	r4, r1
 8028b46:	701a      	strb	r2, [r3, #0]
 8028b48:	d004      	beq.n	8028b54 <__cvt+0x38>
 8028b4a:	2d45      	cmp	r5, #69	@ 0x45
 8028b4c:	d100      	bne.n	8028b50 <__cvt+0x34>
 8028b4e:	3401      	adds	r4, #1
 8028b50:	2102      	movs	r1, #2
 8028b52:	e000      	b.n	8028b56 <__cvt+0x3a>
 8028b54:	2103      	movs	r1, #3
 8028b56:	ab03      	add	r3, sp, #12
 8028b58:	9301      	str	r3, [sp, #4]
 8028b5a:	ab02      	add	r3, sp, #8
 8028b5c:	9300      	str	r3, [sp, #0]
 8028b5e:	4622      	mov	r2, r4
 8028b60:	4633      	mov	r3, r6
 8028b62:	eeb0 0b48 	vmov.f64	d0, d8
 8028b66:	f001 f81b 	bl	8029ba0 <_dtoa_r>
 8028b6a:	2d47      	cmp	r5, #71	@ 0x47
 8028b6c:	d114      	bne.n	8028b98 <__cvt+0x7c>
 8028b6e:	07fb      	lsls	r3, r7, #31
 8028b70:	d50a      	bpl.n	8028b88 <__cvt+0x6c>
 8028b72:	1902      	adds	r2, r0, r4
 8028b74:	eeb5 8b40 	vcmp.f64	d8, #0.0
 8028b78:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 8028b7c:	bf08      	it	eq
 8028b7e:	9203      	streq	r2, [sp, #12]
 8028b80:	2130      	movs	r1, #48	@ 0x30
 8028b82:	9b03      	ldr	r3, [sp, #12]
 8028b84:	4293      	cmp	r3, r2
 8028b86:	d319      	bcc.n	8028bbc <__cvt+0xa0>
 8028b88:	9b03      	ldr	r3, [sp, #12]
 8028b8a:	9a0e      	ldr	r2, [sp, #56]	@ 0x38
 8028b8c:	1a1b      	subs	r3, r3, r0
 8028b8e:	6013      	str	r3, [r2, #0]
 8028b90:	b005      	add	sp, #20
 8028b92:	ecbd 8b02 	vpop	{d8}
 8028b96:	bdf0      	pop	{r4, r5, r6, r7, pc}
 8028b98:	2d46      	cmp	r5, #70	@ 0x46
 8028b9a:	eb00 0204 	add.w	r2, r0, r4
 8028b9e:	d1e9      	bne.n	8028b74 <__cvt+0x58>
 8028ba0:	7803      	ldrb	r3, [r0, #0]
 8028ba2:	2b30      	cmp	r3, #48	@ 0x30
 8028ba4:	d107      	bne.n	8028bb6 <__cvt+0x9a>
 8028ba6:	eeb5 8b40 	vcmp.f64	d8, #0.0
 8028baa:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 8028bae:	bf1c      	itt	ne
 8028bb0:	f1c4 0401 	rsbne	r4, r4, #1
 8028bb4:	6034      	strne	r4, [r6, #0]
 8028bb6:	6833      	ldr	r3, [r6, #0]
 8028bb8:	441a      	add	r2, r3
 8028bba:	e7db      	b.n	8028b74 <__cvt+0x58>
 8028bbc:	1c5c      	adds	r4, r3, #1
 8028bbe:	9403      	str	r4, [sp, #12]
 8028bc0:	7019      	strb	r1, [r3, #0]
 8028bc2:	e7de      	b.n	8028b82 <__cvt+0x66>

08028bc4 <__exponent>:
 8028bc4:	b5f7      	push	{r0, r1, r2, r4, r5, r6, r7, lr}
 8028bc6:	2900      	cmp	r1, #0
 8028bc8:	bfba      	itte	lt
 8028bca:	4249      	neglt	r1, r1
 8028bcc:	232d      	movlt	r3, #45	@ 0x2d
 8028bce:	232b      	movge	r3, #43	@ 0x2b
 8028bd0:	2909      	cmp	r1, #9
 8028bd2:	7002      	strb	r2, [r0, #0]
 8028bd4:	7043      	strb	r3, [r0, #1]
 8028bd6:	dd29      	ble.n	8028c2c <__exponent+0x68>
 8028bd8:	f10d 0307 	add.w	r3, sp, #7
 8028bdc:	461d      	mov	r5, r3
 8028bde:	270a      	movs	r7, #10
 8028be0:	461a      	mov	r2, r3
 8028be2:	fbb1 f6f7 	udiv	r6, r1, r7
 8028be6:	fb07 1416 	mls	r4, r7, r6, r1
 8028bea:	3430      	adds	r4, #48	@ 0x30
 8028bec:	f802 4c01 	strb.w	r4, [r2, #-1]
 8028bf0:	460c      	mov	r4, r1
 8028bf2:	2c63      	cmp	r4, #99	@ 0x63
 8028bf4:	f103 33ff 	add.w	r3, r3, #4294967295	@ 0xffffffff
 8028bf8:	4631      	mov	r1, r6
 8028bfa:	dcf1      	bgt.n	8028be0 <__exponent+0x1c>
 8028bfc:	3130      	adds	r1, #48	@ 0x30
 8028bfe:	1e94      	subs	r4, r2, #2
 8028c00:	f803 1c01 	strb.w	r1, [r3, #-1]
 8028c04:	1c41      	adds	r1, r0, #1
 8028c06:	4623      	mov	r3, r4
 8028c08:	42ab      	cmp	r3, r5
 8028c0a:	d30a      	bcc.n	8028c22 <__exponent+0x5e>
 8028c0c:	f10d 0309 	add.w	r3, sp, #9
 8028c10:	1a9b      	subs	r3, r3, r2
 8028c12:	42ac      	cmp	r4, r5
 8028c14:	bf88      	it	hi
 8028c16:	2300      	movhi	r3, #0
 8028c18:	3302      	adds	r3, #2
 8028c1a:	4403      	add	r3, r0
 8028c1c:	1a18      	subs	r0, r3, r0
 8028c1e:	b003      	add	sp, #12
 8028c20:	bdf0      	pop	{r4, r5, r6, r7, pc}
 8028c22:	f813 6b01 	ldrb.w	r6, [r3], #1
 8028c26:	f801 6f01 	strb.w	r6, [r1, #1]!
 8028c2a:	e7ed      	b.n	8028c08 <__exponent+0x44>
 8028c2c:	2330      	movs	r3, #48	@ 0x30
 8028c2e:	3130      	adds	r1, #48	@ 0x30
 8028c30:	7083      	strb	r3, [r0, #2]
 8028c32:	70c1      	strb	r1, [r0, #3]
 8028c34:	1d03      	adds	r3, r0, #4
 8028c36:	e7f1      	b.n	8028c1c <__exponent+0x58>

08028c38 <_printf_float>:
 8028c38:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 8028c3c:	b08d      	sub	sp, #52	@ 0x34
 8028c3e:	460c      	mov	r4, r1
 8028c40:	f8dd 8058 	ldr.w	r8, [sp, #88]	@ 0x58
 8028c44:	4616      	mov	r6, r2
 8028c46:	461f      	mov	r7, r3
 8028c48:	4605      	mov	r5, r0
 8028c4a:	f000 fe0b 	bl	8029864 <_localeconv_r>
 8028c4e:	f8d0 b000 	ldr.w	fp, [r0]
 8028c52:	4658      	mov	r0, fp
 8028c54:	f7d7 fba4 	bl	80003a0 <strlen>
 8028c58:	2300      	movs	r3, #0
 8028c5a:	930a      	str	r3, [sp, #40]	@ 0x28
 8028c5c:	f8d8 3000 	ldr.w	r3, [r8]
 8028c60:	f894 9018 	ldrb.w	r9, [r4, #24]
 8028c64:	6822      	ldr	r2, [r4, #0]
 8028c66:	9005      	str	r0, [sp, #20]
 8028c68:	3307      	adds	r3, #7
 8028c6a:	f023 0307 	bic.w	r3, r3, #7
 8028c6e:	f103 0108 	add.w	r1, r3, #8
 8028c72:	f8c8 1000 	str.w	r1, [r8]
 8028c76:	ed93 0b00 	vldr	d0, [r3]
 8028c7a:	ed9f 6b97 	vldr	d6, [pc, #604]	@ 8028ed8 <_printf_float+0x2a0>
 8028c7e:	eeb0 7bc0 	vabs.f64	d7, d0
 8028c82:	eeb4 7b46 	vcmp.f64	d7, d6
 8028c86:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 8028c8a:	ed84 0b12 	vstr	d0, [r4, #72]	@ 0x48
 8028c8e:	dd24      	ble.n	8028cda <_printf_float+0xa2>
 8028c90:	eeb5 0bc0 	vcmpe.f64	d0, #0.0
 8028c94:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 8028c98:	d502      	bpl.n	8028ca0 <_printf_float+0x68>
 8028c9a:	232d      	movs	r3, #45	@ 0x2d
 8028c9c:	f884 3043 	strb.w	r3, [r4, #67]	@ 0x43
 8028ca0:	498f      	ldr	r1, [pc, #572]	@ (8028ee0 <_printf_float+0x2a8>)
 8028ca2:	4b90      	ldr	r3, [pc, #576]	@ (8028ee4 <_printf_float+0x2ac>)
 8028ca4:	f1b9 0f47 	cmp.w	r9, #71	@ 0x47
 8028ca8:	bf94      	ite	ls
 8028caa:	4688      	movls	r8, r1
 8028cac:	4698      	movhi	r8, r3
 8028cae:	f022 0204 	bic.w	r2, r2, #4
 8028cb2:	2303      	movs	r3, #3
 8028cb4:	6123      	str	r3, [r4, #16]
 8028cb6:	6022      	str	r2, [r4, #0]
 8028cb8:	f04f 0a00 	mov.w	sl, #0
 8028cbc:	9700      	str	r7, [sp, #0]
 8028cbe:	4633      	mov	r3, r6
 8028cc0:	aa0b      	add	r2, sp, #44	@ 0x2c
 8028cc2:	4621      	mov	r1, r4
 8028cc4:	4628      	mov	r0, r5
 8028cc6:	f000 f9d1 	bl	802906c <_printf_common>
 8028cca:	3001      	adds	r0, #1
 8028ccc:	f040 8089 	bne.w	8028de2 <_printf_float+0x1aa>
 8028cd0:	f04f 30ff 	mov.w	r0, #4294967295	@ 0xffffffff
 8028cd4:	b00d      	add	sp, #52	@ 0x34
 8028cd6:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 8028cda:	eeb4 0b40 	vcmp.f64	d0, d0
 8028cde:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 8028ce2:	d709      	bvc.n	8028cf8 <_printf_float+0xc0>
 8028ce4:	ee10 3a90 	vmov	r3, s1
 8028ce8:	2b00      	cmp	r3, #0
 8028cea:	bfbc      	itt	lt
 8028cec:	232d      	movlt	r3, #45	@ 0x2d
 8028cee:	f884 3043 	strblt.w	r3, [r4, #67]	@ 0x43
 8028cf2:	497d      	ldr	r1, [pc, #500]	@ (8028ee8 <_printf_float+0x2b0>)
 8028cf4:	4b7d      	ldr	r3, [pc, #500]	@ (8028eec <_printf_float+0x2b4>)
 8028cf6:	e7d5      	b.n	8028ca4 <_printf_float+0x6c>
 8028cf8:	6863      	ldr	r3, [r4, #4]
 8028cfa:	1c59      	adds	r1, r3, #1
 8028cfc:	f009 0adf 	and.w	sl, r9, #223	@ 0xdf
 8028d00:	d139      	bne.n	8028d76 <_printf_float+0x13e>
 8028d02:	2306      	movs	r3, #6
 8028d04:	6063      	str	r3, [r4, #4]
 8028d06:	f442 6280 	orr.w	r2, r2, #1024	@ 0x400
 8028d0a:	2300      	movs	r3, #0
 8028d0c:	6022      	str	r2, [r4, #0]
 8028d0e:	9303      	str	r3, [sp, #12]
 8028d10:	ab0a      	add	r3, sp, #40	@ 0x28
 8028d12:	e9cd 9301 	strd	r9, r3, [sp, #4]
 8028d16:	ab09      	add	r3, sp, #36	@ 0x24
 8028d18:	9300      	str	r3, [sp, #0]
 8028d1a:	6861      	ldr	r1, [r4, #4]
 8028d1c:	f10d 0323 	add.w	r3, sp, #35	@ 0x23
 8028d20:	4628      	mov	r0, r5
 8028d22:	f7ff fefb 	bl	8028b1c <__cvt>
 8028d26:	f1ba 0f47 	cmp.w	sl, #71	@ 0x47
 8028d2a:	9909      	ldr	r1, [sp, #36]	@ 0x24
 8028d2c:	4680      	mov	r8, r0
 8028d2e:	d129      	bne.n	8028d84 <_printf_float+0x14c>
 8028d30:	1cc8      	adds	r0, r1, #3
 8028d32:	db02      	blt.n	8028d3a <_printf_float+0x102>
 8028d34:	6863      	ldr	r3, [r4, #4]
 8028d36:	4299      	cmp	r1, r3
 8028d38:	dd41      	ble.n	8028dbe <_printf_float+0x186>
 8028d3a:	f1a9 0902 	sub.w	r9, r9, #2
 8028d3e:	fa5f f989 	uxtb.w	r9, r9
 8028d42:	3901      	subs	r1, #1
 8028d44:	464a      	mov	r2, r9
 8028d46:	f104 0050 	add.w	r0, r4, #80	@ 0x50
 8028d4a:	9109      	str	r1, [sp, #36]	@ 0x24
 8028d4c:	f7ff ff3a 	bl	8028bc4 <__exponent>
 8028d50:	9a0a      	ldr	r2, [sp, #40]	@ 0x28
 8028d52:	1813      	adds	r3, r2, r0
 8028d54:	2a01      	cmp	r2, #1
 8028d56:	4682      	mov	sl, r0
 8028d58:	6123      	str	r3, [r4, #16]
 8028d5a:	dc02      	bgt.n	8028d62 <_printf_float+0x12a>
 8028d5c:	6822      	ldr	r2, [r4, #0]
 8028d5e:	07d2      	lsls	r2, r2, #31
 8028d60:	d501      	bpl.n	8028d66 <_printf_float+0x12e>
 8028d62:	3301      	adds	r3, #1
 8028d64:	6123      	str	r3, [r4, #16]
 8028d66:	f89d 3023 	ldrb.w	r3, [sp, #35]	@ 0x23
 8028d6a:	2b00      	cmp	r3, #0
 8028d6c:	d0a6      	beq.n	8028cbc <_printf_float+0x84>
 8028d6e:	232d      	movs	r3, #45	@ 0x2d
 8028d70:	f884 3043 	strb.w	r3, [r4, #67]	@ 0x43
 8028d74:	e7a2      	b.n	8028cbc <_printf_float+0x84>
 8028d76:	f1ba 0f47 	cmp.w	sl, #71	@ 0x47
 8028d7a:	d1c4      	bne.n	8028d06 <_printf_float+0xce>
 8028d7c:	2b00      	cmp	r3, #0
 8028d7e:	d1c2      	bne.n	8028d06 <_printf_float+0xce>
 8028d80:	2301      	movs	r3, #1
 8028d82:	e7bf      	b.n	8028d04 <_printf_float+0xcc>
 8028d84:	f1b9 0f65 	cmp.w	r9, #101	@ 0x65
 8028d88:	d9db      	bls.n	8028d42 <_printf_float+0x10a>
 8028d8a:	f1b9 0f66 	cmp.w	r9, #102	@ 0x66
 8028d8e:	d118      	bne.n	8028dc2 <_printf_float+0x18a>
 8028d90:	2900      	cmp	r1, #0
 8028d92:	6863      	ldr	r3, [r4, #4]
 8028d94:	dd0b      	ble.n	8028dae <_printf_float+0x176>
 8028d96:	6121      	str	r1, [r4, #16]
 8028d98:	b913      	cbnz	r3, 8028da0 <_printf_float+0x168>
 8028d9a:	6822      	ldr	r2, [r4, #0]
 8028d9c:	07d0      	lsls	r0, r2, #31
 8028d9e:	d502      	bpl.n	8028da6 <_printf_float+0x16e>
 8028da0:	3301      	adds	r3, #1
 8028da2:	440b      	add	r3, r1
 8028da4:	6123      	str	r3, [r4, #16]
 8028da6:	65a1      	str	r1, [r4, #88]	@ 0x58
 8028da8:	f04f 0a00 	mov.w	sl, #0
 8028dac:	e7db      	b.n	8028d66 <_printf_float+0x12e>
 8028dae:	b913      	cbnz	r3, 8028db6 <_printf_float+0x17e>
 8028db0:	6822      	ldr	r2, [r4, #0]
 8028db2:	07d2      	lsls	r2, r2, #31
 8028db4:	d501      	bpl.n	8028dba <_printf_float+0x182>
 8028db6:	3302      	adds	r3, #2
 8028db8:	e7f4      	b.n	8028da4 <_printf_float+0x16c>
 8028dba:	2301      	movs	r3, #1
 8028dbc:	e7f2      	b.n	8028da4 <_printf_float+0x16c>
 8028dbe:	f04f 0967 	mov.w	r9, #103	@ 0x67
 8028dc2:	9b0a      	ldr	r3, [sp, #40]	@ 0x28
 8028dc4:	4299      	cmp	r1, r3
 8028dc6:	db05      	blt.n	8028dd4 <_printf_float+0x19c>
 8028dc8:	6823      	ldr	r3, [r4, #0]
 8028dca:	6121      	str	r1, [r4, #16]
 8028dcc:	07d8      	lsls	r0, r3, #31
 8028dce:	d5ea      	bpl.n	8028da6 <_printf_float+0x16e>
 8028dd0:	1c4b      	adds	r3, r1, #1
 8028dd2:	e7e7      	b.n	8028da4 <_printf_float+0x16c>
 8028dd4:	2900      	cmp	r1, #0
 8028dd6:	bfd4      	ite	le
 8028dd8:	f1c1 0202 	rsble	r2, r1, #2
 8028ddc:	2201      	movgt	r2, #1
 8028dde:	4413      	add	r3, r2
 8028de0:	e7e0      	b.n	8028da4 <_printf_float+0x16c>
 8028de2:	6823      	ldr	r3, [r4, #0]
 8028de4:	055a      	lsls	r2, r3, #21
 8028de6:	d407      	bmi.n	8028df8 <_printf_float+0x1c0>
 8028de8:	6923      	ldr	r3, [r4, #16]
 8028dea:	4642      	mov	r2, r8
 8028dec:	4631      	mov	r1, r6
 8028dee:	4628      	mov	r0, r5
 8028df0:	47b8      	blx	r7
 8028df2:	3001      	adds	r0, #1
 8028df4:	d12a      	bne.n	8028e4c <_printf_float+0x214>
 8028df6:	e76b      	b.n	8028cd0 <_printf_float+0x98>
 8028df8:	f1b9 0f65 	cmp.w	r9, #101	@ 0x65
 8028dfc:	f240 80e0 	bls.w	8028fc0 <_printf_float+0x388>
 8028e00:	ed94 7b12 	vldr	d7, [r4, #72]	@ 0x48
 8028e04:	eeb5 7b40 	vcmp.f64	d7, #0.0
 8028e08:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 8028e0c:	d133      	bne.n	8028e76 <_printf_float+0x23e>
 8028e0e:	4a38      	ldr	r2, [pc, #224]	@ (8028ef0 <_printf_float+0x2b8>)
 8028e10:	2301      	movs	r3, #1
 8028e12:	4631      	mov	r1, r6
 8028e14:	4628      	mov	r0, r5
 8028e16:	47b8      	blx	r7
 8028e18:	3001      	adds	r0, #1
 8028e1a:	f43f af59 	beq.w	8028cd0 <_printf_float+0x98>
 8028e1e:	e9dd 3809 	ldrd	r3, r8, [sp, #36]	@ 0x24
 8028e22:	4543      	cmp	r3, r8
 8028e24:	db02      	blt.n	8028e2c <_printf_float+0x1f4>
 8028e26:	6823      	ldr	r3, [r4, #0]
 8028e28:	07d8      	lsls	r0, r3, #31
 8028e2a:	d50f      	bpl.n	8028e4c <_printf_float+0x214>
 8028e2c:	9b05      	ldr	r3, [sp, #20]
 8028e2e:	465a      	mov	r2, fp
 8028e30:	4631      	mov	r1, r6
 8028e32:	4628      	mov	r0, r5
 8028e34:	47b8      	blx	r7
 8028e36:	3001      	adds	r0, #1
 8028e38:	f43f af4a 	beq.w	8028cd0 <_printf_float+0x98>
 8028e3c:	f04f 0900 	mov.w	r9, #0
 8028e40:	f108 38ff 	add.w	r8, r8, #4294967295	@ 0xffffffff
 8028e44:	f104 0a1a 	add.w	sl, r4, #26
 8028e48:	45c8      	cmp	r8, r9
 8028e4a:	dc09      	bgt.n	8028e60 <_printf_float+0x228>
 8028e4c:	6823      	ldr	r3, [r4, #0]
 8028e4e:	079b      	lsls	r3, r3, #30
 8028e50:	f100 8107 	bmi.w	8029062 <_printf_float+0x42a>
 8028e54:	68e0      	ldr	r0, [r4, #12]
 8028e56:	9b0b      	ldr	r3, [sp, #44]	@ 0x2c
 8028e58:	4298      	cmp	r0, r3
 8028e5a:	bfb8      	it	lt
 8028e5c:	4618      	movlt	r0, r3
 8028e5e:	e739      	b.n	8028cd4 <_printf_float+0x9c>
 8028e60:	2301      	movs	r3, #1
 8028e62:	4652      	mov	r2, sl
 8028e64:	4631      	mov	r1, r6
 8028e66:	4628      	mov	r0, r5
 8028e68:	47b8      	blx	r7
 8028e6a:	3001      	adds	r0, #1
 8028e6c:	f43f af30 	beq.w	8028cd0 <_printf_float+0x98>
 8028e70:	f109 0901 	add.w	r9, r9, #1
 8028e74:	e7e8      	b.n	8028e48 <_printf_float+0x210>
 8028e76:	9b09      	ldr	r3, [sp, #36]	@ 0x24
 8028e78:	2b00      	cmp	r3, #0
 8028e7a:	dc3b      	bgt.n	8028ef4 <_printf_float+0x2bc>
 8028e7c:	4a1c      	ldr	r2, [pc, #112]	@ (8028ef0 <_printf_float+0x2b8>)
 8028e7e:	2301      	movs	r3, #1
 8028e80:	4631      	mov	r1, r6
 8028e82:	4628      	mov	r0, r5
 8028e84:	47b8      	blx	r7
 8028e86:	3001      	adds	r0, #1
 8028e88:	f43f af22 	beq.w	8028cd0 <_printf_float+0x98>
 8028e8c:	e9dd 3909 	ldrd	r3, r9, [sp, #36]	@ 0x24
 8028e90:	ea59 0303 	orrs.w	r3, r9, r3
 8028e94:	d102      	bne.n	8028e9c <_printf_float+0x264>
 8028e96:	6823      	ldr	r3, [r4, #0]
 8028e98:	07d9      	lsls	r1, r3, #31
 8028e9a:	d5d7      	bpl.n	8028e4c <_printf_float+0x214>
 8028e9c:	9b05      	ldr	r3, [sp, #20]
 8028e9e:	465a      	mov	r2, fp
 8028ea0:	4631      	mov	r1, r6
 8028ea2:	4628      	mov	r0, r5
 8028ea4:	47b8      	blx	r7
 8028ea6:	3001      	adds	r0, #1
 8028ea8:	f43f af12 	beq.w	8028cd0 <_printf_float+0x98>
 8028eac:	f04f 0a00 	mov.w	sl, #0
 8028eb0:	f104 0b1a 	add.w	fp, r4, #26
 8028eb4:	9b09      	ldr	r3, [sp, #36]	@ 0x24
 8028eb6:	425b      	negs	r3, r3
 8028eb8:	4553      	cmp	r3, sl
 8028eba:	dc01      	bgt.n	8028ec0 <_printf_float+0x288>
 8028ebc:	464b      	mov	r3, r9
 8028ebe:	e794      	b.n	8028dea <_printf_float+0x1b2>
 8028ec0:	2301      	movs	r3, #1
 8028ec2:	465a      	mov	r2, fp
 8028ec4:	4631      	mov	r1, r6
 8028ec6:	4628      	mov	r0, r5
 8028ec8:	47b8      	blx	r7
 8028eca:	3001      	adds	r0, #1
 8028ecc:	f43f af00 	beq.w	8028cd0 <_printf_float+0x98>
 8028ed0:	f10a 0a01 	add.w	sl, sl, #1
 8028ed4:	e7ee      	b.n	8028eb4 <_printf_float+0x27c>
 8028ed6:	bf00      	nop
 8028ed8:	ffffffff 	.word	0xffffffff
 8028edc:	7fefffff 	.word	0x7fefffff
 8028ee0:	08030981 	.word	0x08030981
 8028ee4:	08030985 	.word	0x08030985
 8028ee8:	08030989 	.word	0x08030989
 8028eec:	0803098d 	.word	0x0803098d
 8028ef0:	08030991 	.word	0x08030991
 8028ef4:	6da3      	ldr	r3, [r4, #88]	@ 0x58
 8028ef6:	f8dd a028 	ldr.w	sl, [sp, #40]	@ 0x28
 8028efa:	4553      	cmp	r3, sl
 8028efc:	bfa8      	it	ge
 8028efe:	4653      	movge	r3, sl
 8028f00:	2b00      	cmp	r3, #0
 8028f02:	4699      	mov	r9, r3
 8028f04:	dc37      	bgt.n	8028f76 <_printf_float+0x33e>
 8028f06:	2300      	movs	r3, #0
 8028f08:	9307      	str	r3, [sp, #28]
 8028f0a:	ea29 79e9 	bic.w	r9, r9, r9, asr #31
 8028f0e:	f104 021a 	add.w	r2, r4, #26
 8028f12:	6da3      	ldr	r3, [r4, #88]	@ 0x58
 8028f14:	9907      	ldr	r1, [sp, #28]
 8028f16:	9306      	str	r3, [sp, #24]
 8028f18:	eba3 0309 	sub.w	r3, r3, r9
 8028f1c:	428b      	cmp	r3, r1
 8028f1e:	dc31      	bgt.n	8028f84 <_printf_float+0x34c>
 8028f20:	9b09      	ldr	r3, [sp, #36]	@ 0x24
 8028f22:	459a      	cmp	sl, r3
 8028f24:	dc3b      	bgt.n	8028f9e <_printf_float+0x366>
 8028f26:	6823      	ldr	r3, [r4, #0]
 8028f28:	07da      	lsls	r2, r3, #31
 8028f2a:	d438      	bmi.n	8028f9e <_printf_float+0x366>
 8028f2c:	9b09      	ldr	r3, [sp, #36]	@ 0x24
 8028f2e:	ebaa 0903 	sub.w	r9, sl, r3
 8028f32:	9b06      	ldr	r3, [sp, #24]
 8028f34:	ebaa 0303 	sub.w	r3, sl, r3
 8028f38:	4599      	cmp	r9, r3
 8028f3a:	bfa8      	it	ge
 8028f3c:	4699      	movge	r9, r3
 8028f3e:	f1b9 0f00 	cmp.w	r9, #0
 8028f42:	dc34      	bgt.n	8028fae <_printf_float+0x376>
 8028f44:	f04f 0800 	mov.w	r8, #0
 8028f48:	ea29 79e9 	bic.w	r9, r9, r9, asr #31
 8028f4c:	f104 0b1a 	add.w	fp, r4, #26
 8028f50:	9b09      	ldr	r3, [sp, #36]	@ 0x24
 8028f52:	ebaa 0303 	sub.w	r3, sl, r3
 8028f56:	eba3 0309 	sub.w	r3, r3, r9
 8028f5a:	4543      	cmp	r3, r8
 8028f5c:	f77f af76 	ble.w	8028e4c <_printf_float+0x214>
 8028f60:	2301      	movs	r3, #1
 8028f62:	465a      	mov	r2, fp
 8028f64:	4631      	mov	r1, r6
 8028f66:	4628      	mov	r0, r5
 8028f68:	47b8      	blx	r7
 8028f6a:	3001      	adds	r0, #1
 8028f6c:	f43f aeb0 	beq.w	8028cd0 <_printf_float+0x98>
 8028f70:	f108 0801 	add.w	r8, r8, #1
 8028f74:	e7ec      	b.n	8028f50 <_printf_float+0x318>
 8028f76:	4642      	mov	r2, r8
 8028f78:	4631      	mov	r1, r6
 8028f7a:	4628      	mov	r0, r5
 8028f7c:	47b8      	blx	r7
 8028f7e:	3001      	adds	r0, #1
 8028f80:	d1c1      	bne.n	8028f06 <_printf_float+0x2ce>
 8028f82:	e6a5      	b.n	8028cd0 <_printf_float+0x98>
 8028f84:	2301      	movs	r3, #1
 8028f86:	4631      	mov	r1, r6
 8028f88:	4628      	mov	r0, r5
 8028f8a:	9206      	str	r2, [sp, #24]
 8028f8c:	47b8      	blx	r7
 8028f8e:	3001      	adds	r0, #1
 8028f90:	f43f ae9e 	beq.w	8028cd0 <_printf_float+0x98>
 8028f94:	9b07      	ldr	r3, [sp, #28]
 8028f96:	9a06      	ldr	r2, [sp, #24]
 8028f98:	3301      	adds	r3, #1
 8028f9a:	9307      	str	r3, [sp, #28]
 8028f9c:	e7b9      	b.n	8028f12 <_printf_float+0x2da>
 8028f9e:	9b05      	ldr	r3, [sp, #20]
 8028fa0:	465a      	mov	r2, fp
 8028fa2:	4631      	mov	r1, r6
 8028fa4:	4628      	mov	r0, r5
 8028fa6:	47b8      	blx	r7
 8028fa8:	3001      	adds	r0, #1
 8028faa:	d1bf      	bne.n	8028f2c <_printf_float+0x2f4>
 8028fac:	e690      	b.n	8028cd0 <_printf_float+0x98>
 8028fae:	9a06      	ldr	r2, [sp, #24]
 8028fb0:	464b      	mov	r3, r9
 8028fb2:	4442      	add	r2, r8
 8028fb4:	4631      	mov	r1, r6
 8028fb6:	4628      	mov	r0, r5
 8028fb8:	47b8      	blx	r7
 8028fba:	3001      	adds	r0, #1
 8028fbc:	d1c2      	bne.n	8028f44 <_printf_float+0x30c>
 8028fbe:	e687      	b.n	8028cd0 <_printf_float+0x98>
 8028fc0:	f8dd 9028 	ldr.w	r9, [sp, #40]	@ 0x28
 8028fc4:	f1b9 0f01 	cmp.w	r9, #1
 8028fc8:	dc01      	bgt.n	8028fce <_printf_float+0x396>
 8028fca:	07db      	lsls	r3, r3, #31
 8028fcc:	d536      	bpl.n	802903c <_printf_float+0x404>
 8028fce:	2301      	movs	r3, #1
 8028fd0:	4642      	mov	r2, r8
 8028fd2:	4631      	mov	r1, r6
 8028fd4:	4628      	mov	r0, r5
 8028fd6:	47b8      	blx	r7
 8028fd8:	3001      	adds	r0, #1
 8028fda:	f43f ae79 	beq.w	8028cd0 <_printf_float+0x98>
 8028fde:	9b05      	ldr	r3, [sp, #20]
 8028fe0:	465a      	mov	r2, fp
 8028fe2:	4631      	mov	r1, r6
 8028fe4:	4628      	mov	r0, r5
 8028fe6:	47b8      	blx	r7
 8028fe8:	3001      	adds	r0, #1
 8028fea:	f43f ae71 	beq.w	8028cd0 <_printf_float+0x98>
 8028fee:	ed94 7b12 	vldr	d7, [r4, #72]	@ 0x48
 8028ff2:	eeb5 7b40 	vcmp.f64	d7, #0.0
 8028ff6:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 8028ffa:	f109 39ff 	add.w	r9, r9, #4294967295	@ 0xffffffff
 8028ffe:	d018      	beq.n	8029032 <_printf_float+0x3fa>
 8029000:	464b      	mov	r3, r9
 8029002:	f108 0201 	add.w	r2, r8, #1
 8029006:	4631      	mov	r1, r6
 8029008:	4628      	mov	r0, r5
 802900a:	47b8      	blx	r7
 802900c:	3001      	adds	r0, #1
 802900e:	d10c      	bne.n	802902a <_printf_float+0x3f2>
 8029010:	e65e      	b.n	8028cd0 <_printf_float+0x98>
 8029012:	2301      	movs	r3, #1
 8029014:	465a      	mov	r2, fp
 8029016:	4631      	mov	r1, r6
 8029018:	4628      	mov	r0, r5
 802901a:	47b8      	blx	r7
 802901c:	3001      	adds	r0, #1
 802901e:	f43f ae57 	beq.w	8028cd0 <_printf_float+0x98>
 8029022:	f108 0801 	add.w	r8, r8, #1
 8029026:	45c8      	cmp	r8, r9
 8029028:	dbf3      	blt.n	8029012 <_printf_float+0x3da>
 802902a:	4653      	mov	r3, sl
 802902c:	f104 0250 	add.w	r2, r4, #80	@ 0x50
 8029030:	e6dc      	b.n	8028dec <_printf_float+0x1b4>
 8029032:	f04f 0800 	mov.w	r8, #0
 8029036:	f104 0b1a 	add.w	fp, r4, #26
 802903a:	e7f4      	b.n	8029026 <_printf_float+0x3ee>
 802903c:	2301      	movs	r3, #1
 802903e:	4642      	mov	r2, r8
 8029040:	e7e1      	b.n	8029006 <_printf_float+0x3ce>
 8029042:	2301      	movs	r3, #1
 8029044:	464a      	mov	r2, r9
 8029046:	4631      	mov	r1, r6
 8029048:	4628      	mov	r0, r5
 802904a:	47b8      	blx	r7
 802904c:	3001      	adds	r0, #1
 802904e:	f43f ae3f 	beq.w	8028cd0 <_printf_float+0x98>
 8029052:	f108 0801 	add.w	r8, r8, #1
 8029056:	68e3      	ldr	r3, [r4, #12]
 8029058:	990b      	ldr	r1, [sp, #44]	@ 0x2c
 802905a:	1a5b      	subs	r3, r3, r1
 802905c:	4543      	cmp	r3, r8
 802905e:	dcf0      	bgt.n	8029042 <_printf_float+0x40a>
 8029060:	e6f8      	b.n	8028e54 <_printf_float+0x21c>
 8029062:	f04f 0800 	mov.w	r8, #0
 8029066:	f104 0919 	add.w	r9, r4, #25
 802906a:	e7f4      	b.n	8029056 <_printf_float+0x41e>

0802906c <_printf_common>:
 802906c:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
 8029070:	4616      	mov	r6, r2
 8029072:	4698      	mov	r8, r3
 8029074:	688a      	ldr	r2, [r1, #8]
 8029076:	690b      	ldr	r3, [r1, #16]
 8029078:	f8dd 9020 	ldr.w	r9, [sp, #32]
 802907c:	4293      	cmp	r3, r2
 802907e:	bfb8      	it	lt
 8029080:	4613      	movlt	r3, r2
 8029082:	6033      	str	r3, [r6, #0]
 8029084:	f891 2043 	ldrb.w	r2, [r1, #67]	@ 0x43
 8029088:	4607      	mov	r7, r0
 802908a:	460c      	mov	r4, r1
 802908c:	b10a      	cbz	r2, 8029092 <_printf_common+0x26>
 802908e:	3301      	adds	r3, #1
 8029090:	6033      	str	r3, [r6, #0]
 8029092:	6823      	ldr	r3, [r4, #0]
 8029094:	0699      	lsls	r1, r3, #26
 8029096:	bf42      	ittt	mi
 8029098:	6833      	ldrmi	r3, [r6, #0]
 802909a:	3302      	addmi	r3, #2
 802909c:	6033      	strmi	r3, [r6, #0]
 802909e:	6825      	ldr	r5, [r4, #0]
 80290a0:	f015 0506 	ands.w	r5, r5, #6
 80290a4:	d106      	bne.n	80290b4 <_printf_common+0x48>
 80290a6:	f104 0a19 	add.w	sl, r4, #25
 80290aa:	68e3      	ldr	r3, [r4, #12]
 80290ac:	6832      	ldr	r2, [r6, #0]
 80290ae:	1a9b      	subs	r3, r3, r2
 80290b0:	42ab      	cmp	r3, r5
 80290b2:	dc26      	bgt.n	8029102 <_printf_common+0x96>
 80290b4:	f894 3043 	ldrb.w	r3, [r4, #67]	@ 0x43
 80290b8:	6822      	ldr	r2, [r4, #0]
 80290ba:	3b00      	subs	r3, #0
 80290bc:	bf18      	it	ne
 80290be:	2301      	movne	r3, #1
 80290c0:	0692      	lsls	r2, r2, #26
 80290c2:	d42b      	bmi.n	802911c <_printf_common+0xb0>
 80290c4:	f104 0243 	add.w	r2, r4, #67	@ 0x43
 80290c8:	4641      	mov	r1, r8
 80290ca:	4638      	mov	r0, r7
 80290cc:	47c8      	blx	r9
 80290ce:	3001      	adds	r0, #1
 80290d0:	d01e      	beq.n	8029110 <_printf_common+0xa4>
 80290d2:	6823      	ldr	r3, [r4, #0]
 80290d4:	6922      	ldr	r2, [r4, #16]
 80290d6:	f003 0306 	and.w	r3, r3, #6
 80290da:	2b04      	cmp	r3, #4
 80290dc:	bf02      	ittt	eq
 80290de:	68e5      	ldreq	r5, [r4, #12]
 80290e0:	6833      	ldreq	r3, [r6, #0]
 80290e2:	1aed      	subeq	r5, r5, r3
 80290e4:	68a3      	ldr	r3, [r4, #8]
 80290e6:	bf0c      	ite	eq
 80290e8:	ea25 75e5 	biceq.w	r5, r5, r5, asr #31
 80290ec:	2500      	movne	r5, #0
 80290ee:	4293      	cmp	r3, r2
 80290f0:	bfc4      	itt	gt
 80290f2:	1a9b      	subgt	r3, r3, r2
 80290f4:	18ed      	addgt	r5, r5, r3
 80290f6:	2600      	movs	r6, #0
 80290f8:	341a      	adds	r4, #26
 80290fa:	42b5      	cmp	r5, r6
 80290fc:	d11a      	bne.n	8029134 <_printf_common+0xc8>
 80290fe:	2000      	movs	r0, #0
 8029100:	e008      	b.n	8029114 <_printf_common+0xa8>
 8029102:	2301      	movs	r3, #1
 8029104:	4652      	mov	r2, sl
 8029106:	4641      	mov	r1, r8
 8029108:	4638      	mov	r0, r7
 802910a:	47c8      	blx	r9
 802910c:	3001      	adds	r0, #1
 802910e:	d103      	bne.n	8029118 <_printf_common+0xac>
 8029110:	f04f 30ff 	mov.w	r0, #4294967295	@ 0xffffffff
 8029114:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 8029118:	3501      	adds	r5, #1
 802911a:	e7c6      	b.n	80290aa <_printf_common+0x3e>
 802911c:	18e1      	adds	r1, r4, r3
 802911e:	1c5a      	adds	r2, r3, #1
 8029120:	2030      	movs	r0, #48	@ 0x30
 8029122:	f881 0043 	strb.w	r0, [r1, #67]	@ 0x43
 8029126:	4422      	add	r2, r4
 8029128:	f894 1045 	ldrb.w	r1, [r4, #69]	@ 0x45
 802912c:	f882 1043 	strb.w	r1, [r2, #67]	@ 0x43
 8029130:	3302      	adds	r3, #2
 8029132:	e7c7      	b.n	80290c4 <_printf_common+0x58>
 8029134:	2301      	movs	r3, #1
 8029136:	4622      	mov	r2, r4
 8029138:	4641      	mov	r1, r8
 802913a:	4638      	mov	r0, r7
 802913c:	47c8      	blx	r9
 802913e:	3001      	adds	r0, #1
 8029140:	d0e6      	beq.n	8029110 <_printf_common+0xa4>
 8029142:	3601      	adds	r6, #1
 8029144:	e7d9      	b.n	80290fa <_printf_common+0x8e>
	...

08029148 <_printf_i>:
 8029148:	e92d 47ff 	stmdb	sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, lr}
 802914c:	7e0f      	ldrb	r7, [r1, #24]
 802914e:	9e0c      	ldr	r6, [sp, #48]	@ 0x30
 8029150:	2f78      	cmp	r7, #120	@ 0x78
 8029152:	4691      	mov	r9, r2
 8029154:	4680      	mov	r8, r0
 8029156:	460c      	mov	r4, r1
 8029158:	469a      	mov	sl, r3
 802915a:	f101 0243 	add.w	r2, r1, #67	@ 0x43
 802915e:	d807      	bhi.n	8029170 <_printf_i+0x28>
 8029160:	2f62      	cmp	r7, #98	@ 0x62
 8029162:	d80a      	bhi.n	802917a <_printf_i+0x32>
 8029164:	2f00      	cmp	r7, #0
 8029166:	f000 80d2 	beq.w	802930e <_printf_i+0x1c6>
 802916a:	2f58      	cmp	r7, #88	@ 0x58
 802916c:	f000 80b9 	beq.w	80292e2 <_printf_i+0x19a>
 8029170:	f104 0642 	add.w	r6, r4, #66	@ 0x42
 8029174:	f884 7042 	strb.w	r7, [r4, #66]	@ 0x42
 8029178:	e03a      	b.n	80291f0 <_printf_i+0xa8>
 802917a:	f1a7 0363 	sub.w	r3, r7, #99	@ 0x63
 802917e:	2b15      	cmp	r3, #21
 8029180:	d8f6      	bhi.n	8029170 <_printf_i+0x28>
 8029182:	a101      	add	r1, pc, #4	@ (adr r1, 8029188 <_printf_i+0x40>)
 8029184:	f851 f023 	ldr.w	pc, [r1, r3, lsl #2]
 8029188:	080291e1 	.word	0x080291e1
 802918c:	080291f5 	.word	0x080291f5
 8029190:	08029171 	.word	0x08029171
 8029194:	08029171 	.word	0x08029171
 8029198:	08029171 	.word	0x08029171
 802919c:	08029171 	.word	0x08029171
 80291a0:	080291f5 	.word	0x080291f5
 80291a4:	08029171 	.word	0x08029171
 80291a8:	08029171 	.word	0x08029171
 80291ac:	08029171 	.word	0x08029171
 80291b0:	08029171 	.word	0x08029171
 80291b4:	080292f5 	.word	0x080292f5
 80291b8:	0802921f 	.word	0x0802921f
 80291bc:	080292af 	.word	0x080292af
 80291c0:	08029171 	.word	0x08029171
 80291c4:	08029171 	.word	0x08029171
 80291c8:	08029317 	.word	0x08029317
 80291cc:	08029171 	.word	0x08029171
 80291d0:	0802921f 	.word	0x0802921f
 80291d4:	08029171 	.word	0x08029171
 80291d8:	08029171 	.word	0x08029171
 80291dc:	080292b7 	.word	0x080292b7
 80291e0:	6833      	ldr	r3, [r6, #0]
 80291e2:	1d1a      	adds	r2, r3, #4
 80291e4:	681b      	ldr	r3, [r3, #0]
 80291e6:	6032      	str	r2, [r6, #0]
 80291e8:	f104 0642 	add.w	r6, r4, #66	@ 0x42
 80291ec:	f884 3042 	strb.w	r3, [r4, #66]	@ 0x42
 80291f0:	2301      	movs	r3, #1
 80291f2:	e09d      	b.n	8029330 <_printf_i+0x1e8>
 80291f4:	6833      	ldr	r3, [r6, #0]
 80291f6:	6820      	ldr	r0, [r4, #0]
 80291f8:	1d19      	adds	r1, r3, #4
 80291fa:	6031      	str	r1, [r6, #0]
 80291fc:	0606      	lsls	r6, r0, #24
 80291fe:	d501      	bpl.n	8029204 <_printf_i+0xbc>
 8029200:	681d      	ldr	r5, [r3, #0]
 8029202:	e003      	b.n	802920c <_printf_i+0xc4>
 8029204:	0645      	lsls	r5, r0, #25
 8029206:	d5fb      	bpl.n	8029200 <_printf_i+0xb8>
 8029208:	f9b3 5000 	ldrsh.w	r5, [r3]
 802920c:	2d00      	cmp	r5, #0
 802920e:	da03      	bge.n	8029218 <_printf_i+0xd0>
 8029210:	232d      	movs	r3, #45	@ 0x2d
 8029212:	426d      	negs	r5, r5
 8029214:	f884 3043 	strb.w	r3, [r4, #67]	@ 0x43
 8029218:	4859      	ldr	r0, [pc, #356]	@ (8029380 <_printf_i+0x238>)
 802921a:	230a      	movs	r3, #10
 802921c:	e011      	b.n	8029242 <_printf_i+0xfa>
 802921e:	6821      	ldr	r1, [r4, #0]
 8029220:	6833      	ldr	r3, [r6, #0]
 8029222:	0608      	lsls	r0, r1, #24
 8029224:	f853 5b04 	ldr.w	r5, [r3], #4
 8029228:	d402      	bmi.n	8029230 <_printf_i+0xe8>
 802922a:	0649      	lsls	r1, r1, #25
 802922c:	bf48      	it	mi
 802922e:	b2ad      	uxthmi	r5, r5
 8029230:	2f6f      	cmp	r7, #111	@ 0x6f
 8029232:	4853      	ldr	r0, [pc, #332]	@ (8029380 <_printf_i+0x238>)
 8029234:	6033      	str	r3, [r6, #0]
 8029236:	bf14      	ite	ne
 8029238:	230a      	movne	r3, #10
 802923a:	2308      	moveq	r3, #8
 802923c:	2100      	movs	r1, #0
 802923e:	f884 1043 	strb.w	r1, [r4, #67]	@ 0x43
 8029242:	6866      	ldr	r6, [r4, #4]
 8029244:	60a6      	str	r6, [r4, #8]
 8029246:	2e00      	cmp	r6, #0
 8029248:	bfa2      	ittt	ge
 802924a:	6821      	ldrge	r1, [r4, #0]
 802924c:	f021 0104 	bicge.w	r1, r1, #4
 8029250:	6021      	strge	r1, [r4, #0]
 8029252:	b90d      	cbnz	r5, 8029258 <_printf_i+0x110>
 8029254:	2e00      	cmp	r6, #0
 8029256:	d04b      	beq.n	80292f0 <_printf_i+0x1a8>
 8029258:	4616      	mov	r6, r2
 802925a:	fbb5 f1f3 	udiv	r1, r5, r3
 802925e:	fb03 5711 	mls	r7, r3, r1, r5
 8029262:	5dc7      	ldrb	r7, [r0, r7]
 8029264:	f806 7d01 	strb.w	r7, [r6, #-1]!
 8029268:	462f      	mov	r7, r5
 802926a:	42bb      	cmp	r3, r7
 802926c:	460d      	mov	r5, r1
 802926e:	d9f4      	bls.n	802925a <_printf_i+0x112>
 8029270:	2b08      	cmp	r3, #8
 8029272:	d10b      	bne.n	802928c <_printf_i+0x144>
 8029274:	6823      	ldr	r3, [r4, #0]
 8029276:	07df      	lsls	r7, r3, #31
 8029278:	d508      	bpl.n	802928c <_printf_i+0x144>
 802927a:	6923      	ldr	r3, [r4, #16]
 802927c:	6861      	ldr	r1, [r4, #4]
 802927e:	4299      	cmp	r1, r3
 8029280:	bfde      	ittt	le
 8029282:	2330      	movle	r3, #48	@ 0x30
 8029284:	f806 3c01 	strble.w	r3, [r6, #-1]
 8029288:	f106 36ff 	addle.w	r6, r6, #4294967295	@ 0xffffffff
 802928c:	1b92      	subs	r2, r2, r6
 802928e:	6122      	str	r2, [r4, #16]
 8029290:	f8cd a000 	str.w	sl, [sp]
 8029294:	464b      	mov	r3, r9
 8029296:	aa03      	add	r2, sp, #12
 8029298:	4621      	mov	r1, r4
 802929a:	4640      	mov	r0, r8
 802929c:	f7ff fee6 	bl	802906c <_printf_common>
 80292a0:	3001      	adds	r0, #1
 80292a2:	d14a      	bne.n	802933a <_printf_i+0x1f2>
 80292a4:	f04f 30ff 	mov.w	r0, #4294967295	@ 0xffffffff
 80292a8:	b004      	add	sp, #16
 80292aa:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 80292ae:	6823      	ldr	r3, [r4, #0]
 80292b0:	f043 0320 	orr.w	r3, r3, #32
 80292b4:	6023      	str	r3, [r4, #0]
 80292b6:	4833      	ldr	r0, [pc, #204]	@ (8029384 <_printf_i+0x23c>)
 80292b8:	2778      	movs	r7, #120	@ 0x78
 80292ba:	f884 7045 	strb.w	r7, [r4, #69]	@ 0x45
 80292be:	6823      	ldr	r3, [r4, #0]
 80292c0:	6831      	ldr	r1, [r6, #0]
 80292c2:	061f      	lsls	r7, r3, #24
 80292c4:	f851 5b04 	ldr.w	r5, [r1], #4
 80292c8:	d402      	bmi.n	80292d0 <_printf_i+0x188>
 80292ca:	065f      	lsls	r7, r3, #25
 80292cc:	bf48      	it	mi
 80292ce:	b2ad      	uxthmi	r5, r5
 80292d0:	6031      	str	r1, [r6, #0]
 80292d2:	07d9      	lsls	r1, r3, #31
 80292d4:	bf44      	itt	mi
 80292d6:	f043 0320 	orrmi.w	r3, r3, #32
 80292da:	6023      	strmi	r3, [r4, #0]
 80292dc:	b11d      	cbz	r5, 80292e6 <_printf_i+0x19e>
 80292de:	2310      	movs	r3, #16
 80292e0:	e7ac      	b.n	802923c <_printf_i+0xf4>
 80292e2:	4827      	ldr	r0, [pc, #156]	@ (8029380 <_printf_i+0x238>)
 80292e4:	e7e9      	b.n	80292ba <_printf_i+0x172>
 80292e6:	6823      	ldr	r3, [r4, #0]
 80292e8:	f023 0320 	bic.w	r3, r3, #32
 80292ec:	6023      	str	r3, [r4, #0]
 80292ee:	e7f6      	b.n	80292de <_printf_i+0x196>
 80292f0:	4616      	mov	r6, r2
 80292f2:	e7bd      	b.n	8029270 <_printf_i+0x128>
 80292f4:	6833      	ldr	r3, [r6, #0]
 80292f6:	6825      	ldr	r5, [r4, #0]
 80292f8:	6961      	ldr	r1, [r4, #20]
 80292fa:	1d18      	adds	r0, r3, #4
 80292fc:	6030      	str	r0, [r6, #0]
 80292fe:	062e      	lsls	r6, r5, #24
 8029300:	681b      	ldr	r3, [r3, #0]
 8029302:	d501      	bpl.n	8029308 <_printf_i+0x1c0>
 8029304:	6019      	str	r1, [r3, #0]
 8029306:	e002      	b.n	802930e <_printf_i+0x1c6>
 8029308:	0668      	lsls	r0, r5, #25
 802930a:	d5fb      	bpl.n	8029304 <_printf_i+0x1bc>
 802930c:	8019      	strh	r1, [r3, #0]
 802930e:	2300      	movs	r3, #0
 8029310:	6123      	str	r3, [r4, #16]
 8029312:	4616      	mov	r6, r2
 8029314:	e7bc      	b.n	8029290 <_printf_i+0x148>
 8029316:	6833      	ldr	r3, [r6, #0]
 8029318:	1d1a      	adds	r2, r3, #4
 802931a:	6032      	str	r2, [r6, #0]
 802931c:	681e      	ldr	r6, [r3, #0]
 802931e:	6862      	ldr	r2, [r4, #4]
 8029320:	2100      	movs	r1, #0
 8029322:	4630      	mov	r0, r6
 8029324:	f7d6 ffec 	bl	8000300 <memchr>
 8029328:	b108      	cbz	r0, 802932e <_printf_i+0x1e6>
 802932a:	1b80      	subs	r0, r0, r6
 802932c:	6060      	str	r0, [r4, #4]
 802932e:	6863      	ldr	r3, [r4, #4]
 8029330:	6123      	str	r3, [r4, #16]
 8029332:	2300      	movs	r3, #0
 8029334:	f884 3043 	strb.w	r3, [r4, #67]	@ 0x43
 8029338:	e7aa      	b.n	8029290 <_printf_i+0x148>
 802933a:	6923      	ldr	r3, [r4, #16]
 802933c:	4632      	mov	r2, r6
 802933e:	4649      	mov	r1, r9
 8029340:	4640      	mov	r0, r8
 8029342:	47d0      	blx	sl
 8029344:	3001      	adds	r0, #1
 8029346:	d0ad      	beq.n	80292a4 <_printf_i+0x15c>
 8029348:	6823      	ldr	r3, [r4, #0]
 802934a:	079b      	lsls	r3, r3, #30
 802934c:	d413      	bmi.n	8029376 <_printf_i+0x22e>
 802934e:	68e0      	ldr	r0, [r4, #12]
 8029350:	9b03      	ldr	r3, [sp, #12]
 8029352:	4298      	cmp	r0, r3
 8029354:	bfb8      	it	lt
 8029356:	4618      	movlt	r0, r3
 8029358:	e7a6      	b.n	80292a8 <_printf_i+0x160>
 802935a:	2301      	movs	r3, #1
 802935c:	4632      	mov	r2, r6
 802935e:	4649      	mov	r1, r9
 8029360:	4640      	mov	r0, r8
 8029362:	47d0      	blx	sl
 8029364:	3001      	adds	r0, #1
 8029366:	d09d      	beq.n	80292a4 <_printf_i+0x15c>
 8029368:	3501      	adds	r5, #1
 802936a:	68e3      	ldr	r3, [r4, #12]
 802936c:	9903      	ldr	r1, [sp, #12]
 802936e:	1a5b      	subs	r3, r3, r1
 8029370:	42ab      	cmp	r3, r5
 8029372:	dcf2      	bgt.n	802935a <_printf_i+0x212>
 8029374:	e7eb      	b.n	802934e <_printf_i+0x206>
 8029376:	2500      	movs	r5, #0
 8029378:	f104 0619 	add.w	r6, r4, #25
 802937c:	e7f5      	b.n	802936a <_printf_i+0x222>
 802937e:	bf00      	nop
 8029380:	08030993 	.word	0x08030993
 8029384:	080309a4 	.word	0x080309a4

08029388 <std>:
 8029388:	2300      	movs	r3, #0
 802938a:	b510      	push	{r4, lr}
 802938c:	4604      	mov	r4, r0
 802938e:	e9c0 3300 	strd	r3, r3, [r0]
 8029392:	e9c0 3304 	strd	r3, r3, [r0, #16]
 8029396:	6083      	str	r3, [r0, #8]
 8029398:	8181      	strh	r1, [r0, #12]
 802939a:	6643      	str	r3, [r0, #100]	@ 0x64
 802939c:	81c2      	strh	r2, [r0, #14]
 802939e:	6183      	str	r3, [r0, #24]
 80293a0:	4619      	mov	r1, r3
 80293a2:	2208      	movs	r2, #8
 80293a4:	305c      	adds	r0, #92	@ 0x5c
 80293a6:	f000 fa43 	bl	8029830 <memset>
 80293aa:	4b0d      	ldr	r3, [pc, #52]	@ (80293e0 <std+0x58>)
 80293ac:	6263      	str	r3, [r4, #36]	@ 0x24
 80293ae:	4b0d      	ldr	r3, [pc, #52]	@ (80293e4 <std+0x5c>)
 80293b0:	62a3      	str	r3, [r4, #40]	@ 0x28
 80293b2:	4b0d      	ldr	r3, [pc, #52]	@ (80293e8 <std+0x60>)
 80293b4:	62e3      	str	r3, [r4, #44]	@ 0x2c
 80293b6:	4b0d      	ldr	r3, [pc, #52]	@ (80293ec <std+0x64>)
 80293b8:	6323      	str	r3, [r4, #48]	@ 0x30
 80293ba:	4b0d      	ldr	r3, [pc, #52]	@ (80293f0 <std+0x68>)
 80293bc:	6224      	str	r4, [r4, #32]
 80293be:	429c      	cmp	r4, r3
 80293c0:	d006      	beq.n	80293d0 <std+0x48>
 80293c2:	f103 0268 	add.w	r2, r3, #104	@ 0x68
 80293c6:	4294      	cmp	r4, r2
 80293c8:	d002      	beq.n	80293d0 <std+0x48>
 80293ca:	33d0      	adds	r3, #208	@ 0xd0
 80293cc:	429c      	cmp	r4, r3
 80293ce:	d105      	bne.n	80293dc <std+0x54>
 80293d0:	f104 0058 	add.w	r0, r4, #88	@ 0x58
 80293d4:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
 80293d8:	f000 bb1e 	b.w	8029a18 <__retarget_lock_init_recursive>
 80293dc:	bd10      	pop	{r4, pc}
 80293de:	bf00      	nop
 80293e0:	0802962d 	.word	0x0802962d
 80293e4:	0802964f 	.word	0x0802964f
 80293e8:	08029687 	.word	0x08029687
 80293ec:	080296ab 	.word	0x080296ab
 80293f0:	2402a1a8 	.word	0x2402a1a8

080293f4 <stdio_exit_handler>:
 80293f4:	4a02      	ldr	r2, [pc, #8]	@ (8029400 <stdio_exit_handler+0xc>)
 80293f6:	4903      	ldr	r1, [pc, #12]	@ (8029404 <stdio_exit_handler+0x10>)
 80293f8:	4803      	ldr	r0, [pc, #12]	@ (8029408 <stdio_exit_handler+0x14>)
 80293fa:	f000 b869 	b.w	80294d0 <_fwalk_sglue>
 80293fe:	bf00      	nop
 8029400:	24000048 	.word	0x24000048
 8029404:	0802bd3d 	.word	0x0802bd3d
 8029408:	240001c4 	.word	0x240001c4

0802940c <cleanup_stdio>:
 802940c:	6841      	ldr	r1, [r0, #4]
 802940e:	4b0c      	ldr	r3, [pc, #48]	@ (8029440 <cleanup_stdio+0x34>)
 8029410:	4299      	cmp	r1, r3
 8029412:	b510      	push	{r4, lr}
 8029414:	4604      	mov	r4, r0
 8029416:	d001      	beq.n	802941c <cleanup_stdio+0x10>
 8029418:	f002 fc90 	bl	802bd3c <_fflush_r>
 802941c:	68a1      	ldr	r1, [r4, #8]
 802941e:	4b09      	ldr	r3, [pc, #36]	@ (8029444 <cleanup_stdio+0x38>)
 8029420:	4299      	cmp	r1, r3
 8029422:	d002      	beq.n	802942a <cleanup_stdio+0x1e>
 8029424:	4620      	mov	r0, r4
 8029426:	f002 fc89 	bl	802bd3c <_fflush_r>
 802942a:	68e1      	ldr	r1, [r4, #12]
 802942c:	4b06      	ldr	r3, [pc, #24]	@ (8029448 <cleanup_stdio+0x3c>)
 802942e:	4299      	cmp	r1, r3
 8029430:	d004      	beq.n	802943c <cleanup_stdio+0x30>
 8029432:	4620      	mov	r0, r4
 8029434:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
 8029438:	f002 bc80 	b.w	802bd3c <_fflush_r>
 802943c:	bd10      	pop	{r4, pc}
 802943e:	bf00      	nop
 8029440:	2402a1a8 	.word	0x2402a1a8
 8029444:	2402a210 	.word	0x2402a210
 8029448:	2402a278 	.word	0x2402a278

0802944c <global_stdio_init.part.0>:
 802944c:	b510      	push	{r4, lr}
 802944e:	4b0b      	ldr	r3, [pc, #44]	@ (802947c <global_stdio_init.part.0+0x30>)
 8029450:	4c0b      	ldr	r4, [pc, #44]	@ (8029480 <global_stdio_init.part.0+0x34>)
 8029452:	4a0c      	ldr	r2, [pc, #48]	@ (8029484 <global_stdio_init.part.0+0x38>)
 8029454:	601a      	str	r2, [r3, #0]
 8029456:	4620      	mov	r0, r4
 8029458:	2200      	movs	r2, #0
 802945a:	2104      	movs	r1, #4
 802945c:	f7ff ff94 	bl	8029388 <std>
 8029460:	f104 0068 	add.w	r0, r4, #104	@ 0x68
 8029464:	2201      	movs	r2, #1
 8029466:	2109      	movs	r1, #9
 8029468:	f7ff ff8e 	bl	8029388 <std>
 802946c:	f104 00d0 	add.w	r0, r4, #208	@ 0xd0
 8029470:	2202      	movs	r2, #2
 8029472:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
 8029476:	2112      	movs	r1, #18
 8029478:	f7ff bf86 	b.w	8029388 <std>
 802947c:	2402a2e0 	.word	0x2402a2e0
 8029480:	2402a1a8 	.word	0x2402a1a8
 8029484:	080293f5 	.word	0x080293f5

08029488 <__sfp_lock_acquire>:
 8029488:	4801      	ldr	r0, [pc, #4]	@ (8029490 <__sfp_lock_acquire+0x8>)
 802948a:	f000 bac6 	b.w	8029a1a <__retarget_lock_acquire_recursive>
 802948e:	bf00      	nop
 8029490:	2402a2e9 	.word	0x2402a2e9

08029494 <__sfp_lock_release>:
 8029494:	4801      	ldr	r0, [pc, #4]	@ (802949c <__sfp_lock_release+0x8>)
 8029496:	f000 bac1 	b.w	8029a1c <__retarget_lock_release_recursive>
 802949a:	bf00      	nop
 802949c:	2402a2e9 	.word	0x2402a2e9

080294a0 <__sinit>:
 80294a0:	b510      	push	{r4, lr}
 80294a2:	4604      	mov	r4, r0
 80294a4:	f7ff fff0 	bl	8029488 <__sfp_lock_acquire>
 80294a8:	6a23      	ldr	r3, [r4, #32]
 80294aa:	b11b      	cbz	r3, 80294b4 <__sinit+0x14>
 80294ac:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
 80294b0:	f7ff bff0 	b.w	8029494 <__sfp_lock_release>
 80294b4:	4b04      	ldr	r3, [pc, #16]	@ (80294c8 <__sinit+0x28>)
 80294b6:	6223      	str	r3, [r4, #32]
 80294b8:	4b04      	ldr	r3, [pc, #16]	@ (80294cc <__sinit+0x2c>)
 80294ba:	681b      	ldr	r3, [r3, #0]
 80294bc:	2b00      	cmp	r3, #0
 80294be:	d1f5      	bne.n	80294ac <__sinit+0xc>
 80294c0:	f7ff ffc4 	bl	802944c <global_stdio_init.part.0>
 80294c4:	e7f2      	b.n	80294ac <__sinit+0xc>
 80294c6:	bf00      	nop
 80294c8:	0802940d 	.word	0x0802940d
 80294cc:	2402a2e0 	.word	0x2402a2e0

080294d0 <_fwalk_sglue>:
 80294d0:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
 80294d4:	4607      	mov	r7, r0
 80294d6:	4688      	mov	r8, r1
 80294d8:	4614      	mov	r4, r2
 80294da:	2600      	movs	r6, #0
 80294dc:	e9d4 9501 	ldrd	r9, r5, [r4, #4]
 80294e0:	f1b9 0901 	subs.w	r9, r9, #1
 80294e4:	d505      	bpl.n	80294f2 <_fwalk_sglue+0x22>
 80294e6:	6824      	ldr	r4, [r4, #0]
 80294e8:	2c00      	cmp	r4, #0
 80294ea:	d1f7      	bne.n	80294dc <_fwalk_sglue+0xc>
 80294ec:	4630      	mov	r0, r6
 80294ee:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
 80294f2:	89ab      	ldrh	r3, [r5, #12]
 80294f4:	2b01      	cmp	r3, #1
 80294f6:	d907      	bls.n	8029508 <_fwalk_sglue+0x38>
 80294f8:	f9b5 300e 	ldrsh.w	r3, [r5, #14]
 80294fc:	3301      	adds	r3, #1
 80294fe:	d003      	beq.n	8029508 <_fwalk_sglue+0x38>
 8029500:	4629      	mov	r1, r5
 8029502:	4638      	mov	r0, r7
 8029504:	47c0      	blx	r8
 8029506:	4306      	orrs	r6, r0
 8029508:	3568      	adds	r5, #104	@ 0x68
 802950a:	e7e9      	b.n	80294e0 <_fwalk_sglue+0x10>

0802950c <iprintf>:
 802950c:	b40f      	push	{r0, r1, r2, r3}
 802950e:	b507      	push	{r0, r1, r2, lr}
 8029510:	4906      	ldr	r1, [pc, #24]	@ (802952c <iprintf+0x20>)
 8029512:	ab04      	add	r3, sp, #16
 8029514:	6808      	ldr	r0, [r1, #0]
 8029516:	f853 2b04 	ldr.w	r2, [r3], #4
 802951a:	6881      	ldr	r1, [r0, #8]
 802951c:	9301      	str	r3, [sp, #4]
 802951e:	f002 fa71 	bl	802ba04 <_vfiprintf_r>
 8029522:	b003      	add	sp, #12
 8029524:	f85d eb04 	ldr.w	lr, [sp], #4
 8029528:	b004      	add	sp, #16
 802952a:	4770      	bx	lr
 802952c:	240001c0 	.word	0x240001c0

08029530 <_puts_r>:
 8029530:	6a03      	ldr	r3, [r0, #32]
 8029532:	b570      	push	{r4, r5, r6, lr}
 8029534:	6884      	ldr	r4, [r0, #8]
 8029536:	4605      	mov	r5, r0
 8029538:	460e      	mov	r6, r1
 802953a:	b90b      	cbnz	r3, 8029540 <_puts_r+0x10>
 802953c:	f7ff ffb0 	bl	80294a0 <__sinit>
 8029540:	6e63      	ldr	r3, [r4, #100]	@ 0x64
 8029542:	07db      	lsls	r3, r3, #31
 8029544:	d405      	bmi.n	8029552 <_puts_r+0x22>
 8029546:	89a3      	ldrh	r3, [r4, #12]
 8029548:	0598      	lsls	r0, r3, #22
 802954a:	d402      	bmi.n	8029552 <_puts_r+0x22>
 802954c:	6da0      	ldr	r0, [r4, #88]	@ 0x58
 802954e:	f000 fa64 	bl	8029a1a <__retarget_lock_acquire_recursive>
 8029552:	89a3      	ldrh	r3, [r4, #12]
 8029554:	0719      	lsls	r1, r3, #28
 8029556:	d502      	bpl.n	802955e <_puts_r+0x2e>
 8029558:	6923      	ldr	r3, [r4, #16]
 802955a:	2b00      	cmp	r3, #0
 802955c:	d135      	bne.n	80295ca <_puts_r+0x9a>
 802955e:	4621      	mov	r1, r4
 8029560:	4628      	mov	r0, r5
 8029562:	f000 f8e5 	bl	8029730 <__swsetup_r>
 8029566:	b380      	cbz	r0, 80295ca <_puts_r+0x9a>
 8029568:	f04f 35ff 	mov.w	r5, #4294967295	@ 0xffffffff
 802956c:	6e63      	ldr	r3, [r4, #100]	@ 0x64
 802956e:	07da      	lsls	r2, r3, #31
 8029570:	d405      	bmi.n	802957e <_puts_r+0x4e>
 8029572:	89a3      	ldrh	r3, [r4, #12]
 8029574:	059b      	lsls	r3, r3, #22
 8029576:	d402      	bmi.n	802957e <_puts_r+0x4e>
 8029578:	6da0      	ldr	r0, [r4, #88]	@ 0x58
 802957a:	f000 fa4f 	bl	8029a1c <__retarget_lock_release_recursive>
 802957e:	4628      	mov	r0, r5
 8029580:	bd70      	pop	{r4, r5, r6, pc}
 8029582:	2b00      	cmp	r3, #0
 8029584:	da04      	bge.n	8029590 <_puts_r+0x60>
 8029586:	69a2      	ldr	r2, [r4, #24]
 8029588:	429a      	cmp	r2, r3
 802958a:	dc17      	bgt.n	80295bc <_puts_r+0x8c>
 802958c:	290a      	cmp	r1, #10
 802958e:	d015      	beq.n	80295bc <_puts_r+0x8c>
 8029590:	6823      	ldr	r3, [r4, #0]
 8029592:	1c5a      	adds	r2, r3, #1
 8029594:	6022      	str	r2, [r4, #0]
 8029596:	7019      	strb	r1, [r3, #0]
 8029598:	68a3      	ldr	r3, [r4, #8]
 802959a:	f816 1f01 	ldrb.w	r1, [r6, #1]!
 802959e:	3b01      	subs	r3, #1
 80295a0:	60a3      	str	r3, [r4, #8]
 80295a2:	2900      	cmp	r1, #0
 80295a4:	d1ed      	bne.n	8029582 <_puts_r+0x52>
 80295a6:	2b00      	cmp	r3, #0
 80295a8:	da11      	bge.n	80295ce <_puts_r+0x9e>
 80295aa:	4622      	mov	r2, r4
 80295ac:	210a      	movs	r1, #10
 80295ae:	4628      	mov	r0, r5
 80295b0:	f000 f87f 	bl	80296b2 <__swbuf_r>
 80295b4:	3001      	adds	r0, #1
 80295b6:	d0d7      	beq.n	8029568 <_puts_r+0x38>
 80295b8:	250a      	movs	r5, #10
 80295ba:	e7d7      	b.n	802956c <_puts_r+0x3c>
 80295bc:	4622      	mov	r2, r4
 80295be:	4628      	mov	r0, r5
 80295c0:	f000 f877 	bl	80296b2 <__swbuf_r>
 80295c4:	3001      	adds	r0, #1
 80295c6:	d1e7      	bne.n	8029598 <_puts_r+0x68>
 80295c8:	e7ce      	b.n	8029568 <_puts_r+0x38>
 80295ca:	3e01      	subs	r6, #1
 80295cc:	e7e4      	b.n	8029598 <_puts_r+0x68>
 80295ce:	6823      	ldr	r3, [r4, #0]
 80295d0:	1c5a      	adds	r2, r3, #1
 80295d2:	6022      	str	r2, [r4, #0]
 80295d4:	220a      	movs	r2, #10
 80295d6:	701a      	strb	r2, [r3, #0]
 80295d8:	e7ee      	b.n	80295b8 <_puts_r+0x88>
	...

080295dc <puts>:
 80295dc:	4b02      	ldr	r3, [pc, #8]	@ (80295e8 <puts+0xc>)
 80295de:	4601      	mov	r1, r0
 80295e0:	6818      	ldr	r0, [r3, #0]
 80295e2:	f7ff bfa5 	b.w	8029530 <_puts_r>
 80295e6:	bf00      	nop
 80295e8:	240001c0 	.word	0x240001c0

080295ec <siprintf>:
 80295ec:	b40e      	push	{r1, r2, r3}
 80295ee:	b500      	push	{lr}
 80295f0:	b09c      	sub	sp, #112	@ 0x70
 80295f2:	ab1d      	add	r3, sp, #116	@ 0x74
 80295f4:	9002      	str	r0, [sp, #8]
 80295f6:	9006      	str	r0, [sp, #24]
 80295f8:	f06f 4100 	mvn.w	r1, #2147483648	@ 0x80000000
 80295fc:	4809      	ldr	r0, [pc, #36]	@ (8029624 <siprintf+0x38>)
 80295fe:	9107      	str	r1, [sp, #28]
 8029600:	9104      	str	r1, [sp, #16]
 8029602:	4909      	ldr	r1, [pc, #36]	@ (8029628 <siprintf+0x3c>)
 8029604:	f853 2b04 	ldr.w	r2, [r3], #4
 8029608:	9105      	str	r1, [sp, #20]
 802960a:	6800      	ldr	r0, [r0, #0]
 802960c:	9301      	str	r3, [sp, #4]
 802960e:	a902      	add	r1, sp, #8
 8029610:	f002 f8d2 	bl	802b7b8 <_svfiprintf_r>
 8029614:	9b02      	ldr	r3, [sp, #8]
 8029616:	2200      	movs	r2, #0
 8029618:	701a      	strb	r2, [r3, #0]
 802961a:	b01c      	add	sp, #112	@ 0x70
 802961c:	f85d eb04 	ldr.w	lr, [sp], #4
 8029620:	b003      	add	sp, #12
 8029622:	4770      	bx	lr
 8029624:	240001c0 	.word	0x240001c0
 8029628:	ffff0208 	.word	0xffff0208

0802962c <__sread>:
 802962c:	b510      	push	{r4, lr}
 802962e:	460c      	mov	r4, r1
 8029630:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 8029634:	f000 f992 	bl	802995c <_read_r>
 8029638:	2800      	cmp	r0, #0
 802963a:	bfab      	itete	ge
 802963c:	6d63      	ldrge	r3, [r4, #84]	@ 0x54
 802963e:	89a3      	ldrhlt	r3, [r4, #12]
 8029640:	181b      	addge	r3, r3, r0
 8029642:	f423 5380 	biclt.w	r3, r3, #4096	@ 0x1000
 8029646:	bfac      	ite	ge
 8029648:	6563      	strge	r3, [r4, #84]	@ 0x54
 802964a:	81a3      	strhlt	r3, [r4, #12]
 802964c:	bd10      	pop	{r4, pc}

0802964e <__swrite>:
 802964e:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
 8029652:	461f      	mov	r7, r3
 8029654:	898b      	ldrh	r3, [r1, #12]
 8029656:	05db      	lsls	r3, r3, #23
 8029658:	4605      	mov	r5, r0
 802965a:	460c      	mov	r4, r1
 802965c:	4616      	mov	r6, r2
 802965e:	d505      	bpl.n	802966c <__swrite+0x1e>
 8029660:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 8029664:	2302      	movs	r3, #2
 8029666:	2200      	movs	r2, #0
 8029668:	f000 f966 	bl	8029938 <_lseek_r>
 802966c:	89a3      	ldrh	r3, [r4, #12]
 802966e:	f9b4 100e 	ldrsh.w	r1, [r4, #14]
 8029672:	f423 5380 	bic.w	r3, r3, #4096	@ 0x1000
 8029676:	81a3      	strh	r3, [r4, #12]
 8029678:	4632      	mov	r2, r6
 802967a:	463b      	mov	r3, r7
 802967c:	4628      	mov	r0, r5
 802967e:	e8bd 41f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, lr}
 8029682:	f000 b98d 	b.w	80299a0 <_write_r>

08029686 <__sseek>:
 8029686:	b510      	push	{r4, lr}
 8029688:	460c      	mov	r4, r1
 802968a:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 802968e:	f000 f953 	bl	8029938 <_lseek_r>
 8029692:	1c43      	adds	r3, r0, #1
 8029694:	89a3      	ldrh	r3, [r4, #12]
 8029696:	bf15      	itete	ne
 8029698:	6560      	strne	r0, [r4, #84]	@ 0x54
 802969a:	f423 5380 	biceq.w	r3, r3, #4096	@ 0x1000
 802969e:	f443 5380 	orrne.w	r3, r3, #4096	@ 0x1000
 80296a2:	81a3      	strheq	r3, [r4, #12]
 80296a4:	bf18      	it	ne
 80296a6:	81a3      	strhne	r3, [r4, #12]
 80296a8:	bd10      	pop	{r4, pc}

080296aa <__sclose>:
 80296aa:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 80296ae:	f000 b8dd 	b.w	802986c <_close_r>

080296b2 <__swbuf_r>:
 80296b2:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 80296b4:	460e      	mov	r6, r1
 80296b6:	4614      	mov	r4, r2
 80296b8:	4605      	mov	r5, r0
 80296ba:	b118      	cbz	r0, 80296c4 <__swbuf_r+0x12>
 80296bc:	6a03      	ldr	r3, [r0, #32]
 80296be:	b90b      	cbnz	r3, 80296c4 <__swbuf_r+0x12>
 80296c0:	f7ff feee 	bl	80294a0 <__sinit>
 80296c4:	69a3      	ldr	r3, [r4, #24]
 80296c6:	60a3      	str	r3, [r4, #8]
 80296c8:	89a3      	ldrh	r3, [r4, #12]
 80296ca:	071a      	lsls	r2, r3, #28
 80296cc:	d501      	bpl.n	80296d2 <__swbuf_r+0x20>
 80296ce:	6923      	ldr	r3, [r4, #16]
 80296d0:	b943      	cbnz	r3, 80296e4 <__swbuf_r+0x32>
 80296d2:	4621      	mov	r1, r4
 80296d4:	4628      	mov	r0, r5
 80296d6:	f000 f82b 	bl	8029730 <__swsetup_r>
 80296da:	b118      	cbz	r0, 80296e4 <__swbuf_r+0x32>
 80296dc:	f04f 37ff 	mov.w	r7, #4294967295	@ 0xffffffff
 80296e0:	4638      	mov	r0, r7
 80296e2:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
 80296e4:	6823      	ldr	r3, [r4, #0]
 80296e6:	6922      	ldr	r2, [r4, #16]
 80296e8:	1a98      	subs	r0, r3, r2
 80296ea:	6963      	ldr	r3, [r4, #20]
 80296ec:	b2f6      	uxtb	r6, r6
 80296ee:	4283      	cmp	r3, r0
 80296f0:	4637      	mov	r7, r6
 80296f2:	dc05      	bgt.n	8029700 <__swbuf_r+0x4e>
 80296f4:	4621      	mov	r1, r4
 80296f6:	4628      	mov	r0, r5
 80296f8:	f002 fb20 	bl	802bd3c <_fflush_r>
 80296fc:	2800      	cmp	r0, #0
 80296fe:	d1ed      	bne.n	80296dc <__swbuf_r+0x2a>
 8029700:	68a3      	ldr	r3, [r4, #8]
 8029702:	3b01      	subs	r3, #1
 8029704:	60a3      	str	r3, [r4, #8]
 8029706:	6823      	ldr	r3, [r4, #0]
 8029708:	1c5a      	adds	r2, r3, #1
 802970a:	6022      	str	r2, [r4, #0]
 802970c:	701e      	strb	r6, [r3, #0]
 802970e:	6962      	ldr	r2, [r4, #20]
 8029710:	1c43      	adds	r3, r0, #1
 8029712:	429a      	cmp	r2, r3
 8029714:	d004      	beq.n	8029720 <__swbuf_r+0x6e>
 8029716:	89a3      	ldrh	r3, [r4, #12]
 8029718:	07db      	lsls	r3, r3, #31
 802971a:	d5e1      	bpl.n	80296e0 <__swbuf_r+0x2e>
 802971c:	2e0a      	cmp	r6, #10
 802971e:	d1df      	bne.n	80296e0 <__swbuf_r+0x2e>
 8029720:	4621      	mov	r1, r4
 8029722:	4628      	mov	r0, r5
 8029724:	f002 fb0a 	bl	802bd3c <_fflush_r>
 8029728:	2800      	cmp	r0, #0
 802972a:	d0d9      	beq.n	80296e0 <__swbuf_r+0x2e>
 802972c:	e7d6      	b.n	80296dc <__swbuf_r+0x2a>
	...

08029730 <__swsetup_r>:
 8029730:	b538      	push	{r3, r4, r5, lr}
 8029732:	4b29      	ldr	r3, [pc, #164]	@ (80297d8 <__swsetup_r+0xa8>)
 8029734:	4605      	mov	r5, r0
 8029736:	6818      	ldr	r0, [r3, #0]
 8029738:	460c      	mov	r4, r1
 802973a:	b118      	cbz	r0, 8029744 <__swsetup_r+0x14>
 802973c:	6a03      	ldr	r3, [r0, #32]
 802973e:	b90b      	cbnz	r3, 8029744 <__swsetup_r+0x14>
 8029740:	f7ff feae 	bl	80294a0 <__sinit>
 8029744:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
 8029748:	0719      	lsls	r1, r3, #28
 802974a:	d422      	bmi.n	8029792 <__swsetup_r+0x62>
 802974c:	06da      	lsls	r2, r3, #27
 802974e:	d407      	bmi.n	8029760 <__swsetup_r+0x30>
 8029750:	2209      	movs	r2, #9
 8029752:	602a      	str	r2, [r5, #0]
 8029754:	f043 0340 	orr.w	r3, r3, #64	@ 0x40
 8029758:	81a3      	strh	r3, [r4, #12]
 802975a:	f04f 30ff 	mov.w	r0, #4294967295	@ 0xffffffff
 802975e:	e033      	b.n	80297c8 <__swsetup_r+0x98>
 8029760:	0758      	lsls	r0, r3, #29
 8029762:	d512      	bpl.n	802978a <__swsetup_r+0x5a>
 8029764:	6b61      	ldr	r1, [r4, #52]	@ 0x34
 8029766:	b141      	cbz	r1, 802977a <__swsetup_r+0x4a>
 8029768:	f104 0344 	add.w	r3, r4, #68	@ 0x44
 802976c:	4299      	cmp	r1, r3
 802976e:	d002      	beq.n	8029776 <__swsetup_r+0x46>
 8029770:	4628      	mov	r0, r5
 8029772:	f000 ff6b 	bl	802a64c <_free_r>
 8029776:	2300      	movs	r3, #0
 8029778:	6363      	str	r3, [r4, #52]	@ 0x34
 802977a:	89a3      	ldrh	r3, [r4, #12]
 802977c:	f023 0324 	bic.w	r3, r3, #36	@ 0x24
 8029780:	81a3      	strh	r3, [r4, #12]
 8029782:	2300      	movs	r3, #0
 8029784:	6063      	str	r3, [r4, #4]
 8029786:	6923      	ldr	r3, [r4, #16]
 8029788:	6023      	str	r3, [r4, #0]
 802978a:	89a3      	ldrh	r3, [r4, #12]
 802978c:	f043 0308 	orr.w	r3, r3, #8
 8029790:	81a3      	strh	r3, [r4, #12]
 8029792:	6923      	ldr	r3, [r4, #16]
 8029794:	b94b      	cbnz	r3, 80297aa <__swsetup_r+0x7a>
 8029796:	89a3      	ldrh	r3, [r4, #12]
 8029798:	f403 7320 	and.w	r3, r3, #640	@ 0x280
 802979c:	f5b3 7f00 	cmp.w	r3, #512	@ 0x200
 80297a0:	d003      	beq.n	80297aa <__swsetup_r+0x7a>
 80297a2:	4621      	mov	r1, r4
 80297a4:	4628      	mov	r0, r5
 80297a6:	f002 fb29 	bl	802bdfc <__smakebuf_r>
 80297aa:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
 80297ae:	f013 0201 	ands.w	r2, r3, #1
 80297b2:	d00a      	beq.n	80297ca <__swsetup_r+0x9a>
 80297b4:	2200      	movs	r2, #0
 80297b6:	60a2      	str	r2, [r4, #8]
 80297b8:	6962      	ldr	r2, [r4, #20]
 80297ba:	4252      	negs	r2, r2
 80297bc:	61a2      	str	r2, [r4, #24]
 80297be:	6922      	ldr	r2, [r4, #16]
 80297c0:	b942      	cbnz	r2, 80297d4 <__swsetup_r+0xa4>
 80297c2:	f013 0080 	ands.w	r0, r3, #128	@ 0x80
 80297c6:	d1c5      	bne.n	8029754 <__swsetup_r+0x24>
 80297c8:	bd38      	pop	{r3, r4, r5, pc}
 80297ca:	0799      	lsls	r1, r3, #30
 80297cc:	bf58      	it	pl
 80297ce:	6962      	ldrpl	r2, [r4, #20]
 80297d0:	60a2      	str	r2, [r4, #8]
 80297d2:	e7f4      	b.n	80297be <__swsetup_r+0x8e>
 80297d4:	2000      	movs	r0, #0
 80297d6:	e7f7      	b.n	80297c8 <__swsetup_r+0x98>
 80297d8:	240001c0 	.word	0x240001c0

080297dc <memcmp>:
 80297dc:	b510      	push	{r4, lr}
 80297de:	3901      	subs	r1, #1
 80297e0:	4402      	add	r2, r0
 80297e2:	4290      	cmp	r0, r2
 80297e4:	d101      	bne.n	80297ea <memcmp+0xe>
 80297e6:	2000      	movs	r0, #0
 80297e8:	e005      	b.n	80297f6 <memcmp+0x1a>
 80297ea:	7803      	ldrb	r3, [r0, #0]
 80297ec:	f811 4f01 	ldrb.w	r4, [r1, #1]!
 80297f0:	42a3      	cmp	r3, r4
 80297f2:	d001      	beq.n	80297f8 <memcmp+0x1c>
 80297f4:	1b18      	subs	r0, r3, r4
 80297f6:	bd10      	pop	{r4, pc}
 80297f8:	3001      	adds	r0, #1
 80297fa:	e7f2      	b.n	80297e2 <memcmp+0x6>

080297fc <memmove>:
 80297fc:	4288      	cmp	r0, r1
 80297fe:	b510      	push	{r4, lr}
 8029800:	eb01 0402 	add.w	r4, r1, r2
 8029804:	d902      	bls.n	802980c <memmove+0x10>
 8029806:	4284      	cmp	r4, r0
 8029808:	4623      	mov	r3, r4
 802980a:	d807      	bhi.n	802981c <memmove+0x20>
 802980c:	1e43      	subs	r3, r0, #1
 802980e:	42a1      	cmp	r1, r4
 8029810:	d008      	beq.n	8029824 <memmove+0x28>
 8029812:	f811 2b01 	ldrb.w	r2, [r1], #1
 8029816:	f803 2f01 	strb.w	r2, [r3, #1]!
 802981a:	e7f8      	b.n	802980e <memmove+0x12>
 802981c:	4402      	add	r2, r0
 802981e:	4601      	mov	r1, r0
 8029820:	428a      	cmp	r2, r1
 8029822:	d100      	bne.n	8029826 <memmove+0x2a>
 8029824:	bd10      	pop	{r4, pc}
 8029826:	f813 4d01 	ldrb.w	r4, [r3, #-1]!
 802982a:	f802 4d01 	strb.w	r4, [r2, #-1]!
 802982e:	e7f7      	b.n	8029820 <memmove+0x24>

08029830 <memset>:
 8029830:	4402      	add	r2, r0
 8029832:	4603      	mov	r3, r0
 8029834:	4293      	cmp	r3, r2
 8029836:	d100      	bne.n	802983a <memset+0xa>
 8029838:	4770      	bx	lr
 802983a:	f803 1b01 	strb.w	r1, [r3], #1
 802983e:	e7f9      	b.n	8029834 <memset+0x4>

08029840 <strncmp>:
 8029840:	b510      	push	{r4, lr}
 8029842:	b16a      	cbz	r2, 8029860 <strncmp+0x20>
 8029844:	3901      	subs	r1, #1
 8029846:	1884      	adds	r4, r0, r2
 8029848:	f810 2b01 	ldrb.w	r2, [r0], #1
 802984c:	f811 3f01 	ldrb.w	r3, [r1, #1]!
 8029850:	429a      	cmp	r2, r3
 8029852:	d103      	bne.n	802985c <strncmp+0x1c>
 8029854:	42a0      	cmp	r0, r4
 8029856:	d001      	beq.n	802985c <strncmp+0x1c>
 8029858:	2a00      	cmp	r2, #0
 802985a:	d1f5      	bne.n	8029848 <strncmp+0x8>
 802985c:	1ad0      	subs	r0, r2, r3
 802985e:	bd10      	pop	{r4, pc}
 8029860:	4610      	mov	r0, r2
 8029862:	e7fc      	b.n	802985e <strncmp+0x1e>

08029864 <_localeconv_r>:
 8029864:	4800      	ldr	r0, [pc, #0]	@ (8029868 <_localeconv_r+0x4>)
 8029866:	4770      	bx	lr
 8029868:	24000144 	.word	0x24000144

0802986c <_close_r>:
 802986c:	b538      	push	{r3, r4, r5, lr}
 802986e:	4d06      	ldr	r5, [pc, #24]	@ (8029888 <_close_r+0x1c>)
 8029870:	2300      	movs	r3, #0
 8029872:	4604      	mov	r4, r0
 8029874:	4608      	mov	r0, r1
 8029876:	602b      	str	r3, [r5, #0]
 8029878:	f7da f9a6 	bl	8003bc8 <_close>
 802987c:	1c43      	adds	r3, r0, #1
 802987e:	d102      	bne.n	8029886 <_close_r+0x1a>
 8029880:	682b      	ldr	r3, [r5, #0]
 8029882:	b103      	cbz	r3, 8029886 <_close_r+0x1a>
 8029884:	6023      	str	r3, [r4, #0]
 8029886:	bd38      	pop	{r3, r4, r5, pc}
 8029888:	2402a2e4 	.word	0x2402a2e4

0802988c <_reclaim_reent>:
 802988c:	4b29      	ldr	r3, [pc, #164]	@ (8029934 <_reclaim_reent+0xa8>)
 802988e:	681b      	ldr	r3, [r3, #0]
 8029890:	4283      	cmp	r3, r0
 8029892:	b570      	push	{r4, r5, r6, lr}
 8029894:	4604      	mov	r4, r0
 8029896:	d04b      	beq.n	8029930 <_reclaim_reent+0xa4>
 8029898:	69c3      	ldr	r3, [r0, #28]
 802989a:	b1ab      	cbz	r3, 80298c8 <_reclaim_reent+0x3c>
 802989c:	68db      	ldr	r3, [r3, #12]
 802989e:	b16b      	cbz	r3, 80298bc <_reclaim_reent+0x30>
 80298a0:	2500      	movs	r5, #0
 80298a2:	69e3      	ldr	r3, [r4, #28]
 80298a4:	68db      	ldr	r3, [r3, #12]
 80298a6:	5959      	ldr	r1, [r3, r5]
 80298a8:	2900      	cmp	r1, #0
 80298aa:	d13b      	bne.n	8029924 <_reclaim_reent+0x98>
 80298ac:	3504      	adds	r5, #4
 80298ae:	2d80      	cmp	r5, #128	@ 0x80
 80298b0:	d1f7      	bne.n	80298a2 <_reclaim_reent+0x16>
 80298b2:	69e3      	ldr	r3, [r4, #28]
 80298b4:	4620      	mov	r0, r4
 80298b6:	68d9      	ldr	r1, [r3, #12]
 80298b8:	f000 fec8 	bl	802a64c <_free_r>
 80298bc:	69e3      	ldr	r3, [r4, #28]
 80298be:	6819      	ldr	r1, [r3, #0]
 80298c0:	b111      	cbz	r1, 80298c8 <_reclaim_reent+0x3c>
 80298c2:	4620      	mov	r0, r4
 80298c4:	f000 fec2 	bl	802a64c <_free_r>
 80298c8:	6961      	ldr	r1, [r4, #20]
 80298ca:	b111      	cbz	r1, 80298d2 <_reclaim_reent+0x46>
 80298cc:	4620      	mov	r0, r4
 80298ce:	f000 febd 	bl	802a64c <_free_r>
 80298d2:	69e1      	ldr	r1, [r4, #28]
 80298d4:	b111      	cbz	r1, 80298dc <_reclaim_reent+0x50>
 80298d6:	4620      	mov	r0, r4
 80298d8:	f000 feb8 	bl	802a64c <_free_r>
 80298dc:	6b21      	ldr	r1, [r4, #48]	@ 0x30
 80298de:	b111      	cbz	r1, 80298e6 <_reclaim_reent+0x5a>
 80298e0:	4620      	mov	r0, r4
 80298e2:	f000 feb3 	bl	802a64c <_free_r>
 80298e6:	6b61      	ldr	r1, [r4, #52]	@ 0x34
 80298e8:	b111      	cbz	r1, 80298f0 <_reclaim_reent+0x64>
 80298ea:	4620      	mov	r0, r4
 80298ec:	f000 feae 	bl	802a64c <_free_r>
 80298f0:	6ba1      	ldr	r1, [r4, #56]	@ 0x38
 80298f2:	b111      	cbz	r1, 80298fa <_reclaim_reent+0x6e>
 80298f4:	4620      	mov	r0, r4
 80298f6:	f000 fea9 	bl	802a64c <_free_r>
 80298fa:	6ca1      	ldr	r1, [r4, #72]	@ 0x48
 80298fc:	b111      	cbz	r1, 8029904 <_reclaim_reent+0x78>
 80298fe:	4620      	mov	r0, r4
 8029900:	f000 fea4 	bl	802a64c <_free_r>
 8029904:	6c61      	ldr	r1, [r4, #68]	@ 0x44
 8029906:	b111      	cbz	r1, 802990e <_reclaim_reent+0x82>
 8029908:	4620      	mov	r0, r4
 802990a:	f000 fe9f 	bl	802a64c <_free_r>
 802990e:	6ae1      	ldr	r1, [r4, #44]	@ 0x2c
 8029910:	b111      	cbz	r1, 8029918 <_reclaim_reent+0x8c>
 8029912:	4620      	mov	r0, r4
 8029914:	f000 fe9a 	bl	802a64c <_free_r>
 8029918:	6a23      	ldr	r3, [r4, #32]
 802991a:	b14b      	cbz	r3, 8029930 <_reclaim_reent+0xa4>
 802991c:	4620      	mov	r0, r4
 802991e:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
 8029922:	4718      	bx	r3
 8029924:	680e      	ldr	r6, [r1, #0]
 8029926:	4620      	mov	r0, r4
 8029928:	f000 fe90 	bl	802a64c <_free_r>
 802992c:	4631      	mov	r1, r6
 802992e:	e7bb      	b.n	80298a8 <_reclaim_reent+0x1c>
 8029930:	bd70      	pop	{r4, r5, r6, pc}
 8029932:	bf00      	nop
 8029934:	240001c0 	.word	0x240001c0

08029938 <_lseek_r>:
 8029938:	b538      	push	{r3, r4, r5, lr}
 802993a:	4d07      	ldr	r5, [pc, #28]	@ (8029958 <_lseek_r+0x20>)
 802993c:	4604      	mov	r4, r0
 802993e:	4608      	mov	r0, r1
 8029940:	4611      	mov	r1, r2
 8029942:	2200      	movs	r2, #0
 8029944:	602a      	str	r2, [r5, #0]
 8029946:	461a      	mov	r2, r3
 8029948:	f7da f965 	bl	8003c16 <_lseek>
 802994c:	1c43      	adds	r3, r0, #1
 802994e:	d102      	bne.n	8029956 <_lseek_r+0x1e>
 8029950:	682b      	ldr	r3, [r5, #0]
 8029952:	b103      	cbz	r3, 8029956 <_lseek_r+0x1e>
 8029954:	6023      	str	r3, [r4, #0]
 8029956:	bd38      	pop	{r3, r4, r5, pc}
 8029958:	2402a2e4 	.word	0x2402a2e4

0802995c <_read_r>:
 802995c:	b538      	push	{r3, r4, r5, lr}
 802995e:	4d07      	ldr	r5, [pc, #28]	@ (802997c <_read_r+0x20>)
 8029960:	4604      	mov	r4, r0
 8029962:	4608      	mov	r0, r1
 8029964:	4611      	mov	r1, r2
 8029966:	2200      	movs	r2, #0
 8029968:	602a      	str	r2, [r5, #0]
 802996a:	461a      	mov	r2, r3
 802996c:	f7da f8f3 	bl	8003b56 <_read>
 8029970:	1c43      	adds	r3, r0, #1
 8029972:	d102      	bne.n	802997a <_read_r+0x1e>
 8029974:	682b      	ldr	r3, [r5, #0]
 8029976:	b103      	cbz	r3, 802997a <_read_r+0x1e>
 8029978:	6023      	str	r3, [r4, #0]
 802997a:	bd38      	pop	{r3, r4, r5, pc}
 802997c:	2402a2e4 	.word	0x2402a2e4

08029980 <_sbrk_r>:
 8029980:	b538      	push	{r3, r4, r5, lr}
 8029982:	4d06      	ldr	r5, [pc, #24]	@ (802999c <_sbrk_r+0x1c>)
 8029984:	2300      	movs	r3, #0
 8029986:	4604      	mov	r4, r0
 8029988:	4608      	mov	r0, r1
 802998a:	602b      	str	r3, [r5, #0]
 802998c:	f7da f950 	bl	8003c30 <_sbrk>
 8029990:	1c43      	adds	r3, r0, #1
 8029992:	d102      	bne.n	802999a <_sbrk_r+0x1a>
 8029994:	682b      	ldr	r3, [r5, #0]
 8029996:	b103      	cbz	r3, 802999a <_sbrk_r+0x1a>
 8029998:	6023      	str	r3, [r4, #0]
 802999a:	bd38      	pop	{r3, r4, r5, pc}
 802999c:	2402a2e4 	.word	0x2402a2e4

080299a0 <_write_r>:
 80299a0:	b538      	push	{r3, r4, r5, lr}
 80299a2:	4d07      	ldr	r5, [pc, #28]	@ (80299c0 <_write_r+0x20>)
 80299a4:	4604      	mov	r4, r0
 80299a6:	4608      	mov	r0, r1
 80299a8:	4611      	mov	r1, r2
 80299aa:	2200      	movs	r2, #0
 80299ac:	602a      	str	r2, [r5, #0]
 80299ae:	461a      	mov	r2, r3
 80299b0:	f7da f8ee 	bl	8003b90 <_write>
 80299b4:	1c43      	adds	r3, r0, #1
 80299b6:	d102      	bne.n	80299be <_write_r+0x1e>
 80299b8:	682b      	ldr	r3, [r5, #0]
 80299ba:	b103      	cbz	r3, 80299be <_write_r+0x1e>
 80299bc:	6023      	str	r3, [r4, #0]
 80299be:	bd38      	pop	{r3, r4, r5, pc}
 80299c0:	2402a2e4 	.word	0x2402a2e4

080299c4 <__errno>:
 80299c4:	4b01      	ldr	r3, [pc, #4]	@ (80299cc <__errno+0x8>)
 80299c6:	6818      	ldr	r0, [r3, #0]
 80299c8:	4770      	bx	lr
 80299ca:	bf00      	nop
 80299cc:	240001c0 	.word	0x240001c0

080299d0 <__libc_init_array>:
 80299d0:	b570      	push	{r4, r5, r6, lr}
 80299d2:	4d0d      	ldr	r5, [pc, #52]	@ (8029a08 <__libc_init_array+0x38>)
 80299d4:	4c0d      	ldr	r4, [pc, #52]	@ (8029a0c <__libc_init_array+0x3c>)
 80299d6:	1b64      	subs	r4, r4, r5
 80299d8:	10a4      	asrs	r4, r4, #2
 80299da:	2600      	movs	r6, #0
 80299dc:	42a6      	cmp	r6, r4
 80299de:	d109      	bne.n	80299f4 <__libc_init_array+0x24>
 80299e0:	4d0b      	ldr	r5, [pc, #44]	@ (8029a10 <__libc_init_array+0x40>)
 80299e2:	4c0c      	ldr	r4, [pc, #48]	@ (8029a14 <__libc_init_array+0x44>)
 80299e4:	f002 fac8 	bl	802bf78 <_init>
 80299e8:	1b64      	subs	r4, r4, r5
 80299ea:	10a4      	asrs	r4, r4, #2
 80299ec:	2600      	movs	r6, #0
 80299ee:	42a6      	cmp	r6, r4
 80299f0:	d105      	bne.n	80299fe <__libc_init_array+0x2e>
 80299f2:	bd70      	pop	{r4, r5, r6, pc}
 80299f4:	f855 3b04 	ldr.w	r3, [r5], #4
 80299f8:	4798      	blx	r3
 80299fa:	3601      	adds	r6, #1
 80299fc:	e7ee      	b.n	80299dc <__libc_init_array+0xc>
 80299fe:	f855 3b04 	ldr.w	r3, [r5], #4
 8029a02:	4798      	blx	r3
 8029a04:	3601      	adds	r6, #1
 8029a06:	e7f2      	b.n	80299ee <__libc_init_array+0x1e>
 8029a08:	08030c44 	.word	0x08030c44
 8029a0c:	08030c44 	.word	0x08030c44
 8029a10:	08030c44 	.word	0x08030c44
 8029a14:	08030c48 	.word	0x08030c48

08029a18 <__retarget_lock_init_recursive>:
 8029a18:	4770      	bx	lr

08029a1a <__retarget_lock_acquire_recursive>:
 8029a1a:	4770      	bx	lr

08029a1c <__retarget_lock_release_recursive>:
 8029a1c:	4770      	bx	lr

08029a1e <memcpy>:
 8029a1e:	440a      	add	r2, r1
 8029a20:	4291      	cmp	r1, r2
 8029a22:	f100 33ff 	add.w	r3, r0, #4294967295	@ 0xffffffff
 8029a26:	d100      	bne.n	8029a2a <memcpy+0xc>
 8029a28:	4770      	bx	lr
 8029a2a:	b510      	push	{r4, lr}
 8029a2c:	f811 4b01 	ldrb.w	r4, [r1], #1
 8029a30:	f803 4f01 	strb.w	r4, [r3, #1]!
 8029a34:	4291      	cmp	r1, r2
 8029a36:	d1f9      	bne.n	8029a2c <memcpy+0xe>
 8029a38:	bd10      	pop	{r4, pc}
 8029a3a:	0000      	movs	r0, r0
 8029a3c:	0000      	movs	r0, r0
	...

08029a40 <nan>:
 8029a40:	ed9f 0b01 	vldr	d0, [pc, #4]	@ 8029a48 <nan+0x8>
 8029a44:	4770      	bx	lr
 8029a46:	bf00      	nop
 8029a48:	00000000 	.word	0x00000000
 8029a4c:	7ff80000 	.word	0x7ff80000

08029a50 <__assert_func>:
 8029a50:	b51f      	push	{r0, r1, r2, r3, r4, lr}
 8029a52:	4614      	mov	r4, r2
 8029a54:	461a      	mov	r2, r3
 8029a56:	4b09      	ldr	r3, [pc, #36]	@ (8029a7c <__assert_func+0x2c>)
 8029a58:	681b      	ldr	r3, [r3, #0]
 8029a5a:	4605      	mov	r5, r0
 8029a5c:	68d8      	ldr	r0, [r3, #12]
 8029a5e:	b954      	cbnz	r4, 8029a76 <__assert_func+0x26>
 8029a60:	4b07      	ldr	r3, [pc, #28]	@ (8029a80 <__assert_func+0x30>)
 8029a62:	461c      	mov	r4, r3
 8029a64:	e9cd 3401 	strd	r3, r4, [sp, #4]
 8029a68:	9100      	str	r1, [sp, #0]
 8029a6a:	462b      	mov	r3, r5
 8029a6c:	4905      	ldr	r1, [pc, #20]	@ (8029a84 <__assert_func+0x34>)
 8029a6e:	f002 f98d 	bl	802bd8c <fiprintf>
 8029a72:	f002 fa21 	bl	802beb8 <abort>
 8029a76:	4b04      	ldr	r3, [pc, #16]	@ (8029a88 <__assert_func+0x38>)
 8029a78:	e7f4      	b.n	8029a64 <__assert_func+0x14>
 8029a7a:	bf00      	nop
 8029a7c:	240001c0 	.word	0x240001c0
 8029a80:	080309f8 	.word	0x080309f8
 8029a84:	080309ca 	.word	0x080309ca
 8029a88:	080309bd 	.word	0x080309bd

08029a8c <quorem>:
 8029a8c:	e92d 4ff7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
 8029a90:	6903      	ldr	r3, [r0, #16]
 8029a92:	690c      	ldr	r4, [r1, #16]
 8029a94:	42a3      	cmp	r3, r4
 8029a96:	4607      	mov	r7, r0
 8029a98:	db7e      	blt.n	8029b98 <quorem+0x10c>
 8029a9a:	3c01      	subs	r4, #1
 8029a9c:	f101 0814 	add.w	r8, r1, #20
 8029aa0:	00a3      	lsls	r3, r4, #2
 8029aa2:	f100 0514 	add.w	r5, r0, #20
 8029aa6:	9300      	str	r3, [sp, #0]
 8029aa8:	eb05 0384 	add.w	r3, r5, r4, lsl #2
 8029aac:	9301      	str	r3, [sp, #4]
 8029aae:	f858 3024 	ldr.w	r3, [r8, r4, lsl #2]
 8029ab2:	f855 2024 	ldr.w	r2, [r5, r4, lsl #2]
 8029ab6:	3301      	adds	r3, #1
 8029ab8:	429a      	cmp	r2, r3
 8029aba:	eb08 0984 	add.w	r9, r8, r4, lsl #2
 8029abe:	fbb2 f6f3 	udiv	r6, r2, r3
 8029ac2:	d32e      	bcc.n	8029b22 <quorem+0x96>
 8029ac4:	f04f 0a00 	mov.w	sl, #0
 8029ac8:	46c4      	mov	ip, r8
 8029aca:	46ae      	mov	lr, r5
 8029acc:	46d3      	mov	fp, sl
 8029ace:	f85c 3b04 	ldr.w	r3, [ip], #4
 8029ad2:	b298      	uxth	r0, r3
 8029ad4:	fb06 a000 	mla	r0, r6, r0, sl
 8029ad8:	0c02      	lsrs	r2, r0, #16
 8029ada:	0c1b      	lsrs	r3, r3, #16
 8029adc:	fb06 2303 	mla	r3, r6, r3, r2
 8029ae0:	f8de 2000 	ldr.w	r2, [lr]
 8029ae4:	b280      	uxth	r0, r0
 8029ae6:	b292      	uxth	r2, r2
 8029ae8:	1a12      	subs	r2, r2, r0
 8029aea:	445a      	add	r2, fp
 8029aec:	f8de 0000 	ldr.w	r0, [lr]
 8029af0:	ea4f 4a13 	mov.w	sl, r3, lsr #16
 8029af4:	b29b      	uxth	r3, r3
 8029af6:	ebc3 4322 	rsb	r3, r3, r2, asr #16
 8029afa:	eb03 4310 	add.w	r3, r3, r0, lsr #16
 8029afe:	b292      	uxth	r2, r2
 8029b00:	ea42 4203 	orr.w	r2, r2, r3, lsl #16
 8029b04:	45e1      	cmp	r9, ip
 8029b06:	f84e 2b04 	str.w	r2, [lr], #4
 8029b0a:	ea4f 4b23 	mov.w	fp, r3, asr #16
 8029b0e:	d2de      	bcs.n	8029ace <quorem+0x42>
 8029b10:	9b00      	ldr	r3, [sp, #0]
 8029b12:	58eb      	ldr	r3, [r5, r3]
 8029b14:	b92b      	cbnz	r3, 8029b22 <quorem+0x96>
 8029b16:	9b01      	ldr	r3, [sp, #4]
 8029b18:	3b04      	subs	r3, #4
 8029b1a:	429d      	cmp	r5, r3
 8029b1c:	461a      	mov	r2, r3
 8029b1e:	d32f      	bcc.n	8029b80 <quorem+0xf4>
 8029b20:	613c      	str	r4, [r7, #16]
 8029b22:	4638      	mov	r0, r7
 8029b24:	f001 fbec 	bl	802b300 <__mcmp>
 8029b28:	2800      	cmp	r0, #0
 8029b2a:	db25      	blt.n	8029b78 <quorem+0xec>
 8029b2c:	4629      	mov	r1, r5
 8029b2e:	2000      	movs	r0, #0
 8029b30:	f858 2b04 	ldr.w	r2, [r8], #4
 8029b34:	f8d1 c000 	ldr.w	ip, [r1]
 8029b38:	fa1f fe82 	uxth.w	lr, r2
 8029b3c:	fa1f f38c 	uxth.w	r3, ip
 8029b40:	eba3 030e 	sub.w	r3, r3, lr
 8029b44:	4403      	add	r3, r0
 8029b46:	0c12      	lsrs	r2, r2, #16
 8029b48:	ebc2 4223 	rsb	r2, r2, r3, asr #16
 8029b4c:	eb02 421c 	add.w	r2, r2, ip, lsr #16
 8029b50:	b29b      	uxth	r3, r3
 8029b52:	ea43 4302 	orr.w	r3, r3, r2, lsl #16
 8029b56:	45c1      	cmp	r9, r8
 8029b58:	f841 3b04 	str.w	r3, [r1], #4
 8029b5c:	ea4f 4022 	mov.w	r0, r2, asr #16
 8029b60:	d2e6      	bcs.n	8029b30 <quorem+0xa4>
 8029b62:	f855 2024 	ldr.w	r2, [r5, r4, lsl #2]
 8029b66:	eb05 0384 	add.w	r3, r5, r4, lsl #2
 8029b6a:	b922      	cbnz	r2, 8029b76 <quorem+0xea>
 8029b6c:	3b04      	subs	r3, #4
 8029b6e:	429d      	cmp	r5, r3
 8029b70:	461a      	mov	r2, r3
 8029b72:	d30b      	bcc.n	8029b8c <quorem+0x100>
 8029b74:	613c      	str	r4, [r7, #16]
 8029b76:	3601      	adds	r6, #1
 8029b78:	4630      	mov	r0, r6
 8029b7a:	b003      	add	sp, #12
 8029b7c:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 8029b80:	6812      	ldr	r2, [r2, #0]
 8029b82:	3b04      	subs	r3, #4
 8029b84:	2a00      	cmp	r2, #0
 8029b86:	d1cb      	bne.n	8029b20 <quorem+0x94>
 8029b88:	3c01      	subs	r4, #1
 8029b8a:	e7c6      	b.n	8029b1a <quorem+0x8e>
 8029b8c:	6812      	ldr	r2, [r2, #0]
 8029b8e:	3b04      	subs	r3, #4
 8029b90:	2a00      	cmp	r2, #0
 8029b92:	d1ef      	bne.n	8029b74 <quorem+0xe8>
 8029b94:	3c01      	subs	r4, #1
 8029b96:	e7ea      	b.n	8029b6e <quorem+0xe2>
 8029b98:	2000      	movs	r0, #0
 8029b9a:	e7ee      	b.n	8029b7a <quorem+0xee>
 8029b9c:	0000      	movs	r0, r0
	...

08029ba0 <_dtoa_r>:
 8029ba0:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 8029ba4:	ed2d 8b02 	vpush	{d8}
 8029ba8:	69c7      	ldr	r7, [r0, #28]
 8029baa:	b091      	sub	sp, #68	@ 0x44
 8029bac:	ed8d 0b02 	vstr	d0, [sp, #8]
 8029bb0:	ec55 4b10 	vmov	r4, r5, d0
 8029bb4:	9e1c      	ldr	r6, [sp, #112]	@ 0x70
 8029bb6:	9107      	str	r1, [sp, #28]
 8029bb8:	4681      	mov	r9, r0
 8029bba:	9209      	str	r2, [sp, #36]	@ 0x24
 8029bbc:	930d      	str	r3, [sp, #52]	@ 0x34
 8029bbe:	b97f      	cbnz	r7, 8029be0 <_dtoa_r+0x40>
 8029bc0:	2010      	movs	r0, #16
 8029bc2:	f7fe f8bb 	bl	8027d3c <malloc>
 8029bc6:	4602      	mov	r2, r0
 8029bc8:	f8c9 001c 	str.w	r0, [r9, #28]
 8029bcc:	b920      	cbnz	r0, 8029bd8 <_dtoa_r+0x38>
 8029bce:	4ba0      	ldr	r3, [pc, #640]	@ (8029e50 <_dtoa_r+0x2b0>)
 8029bd0:	21ef      	movs	r1, #239	@ 0xef
 8029bd2:	48a0      	ldr	r0, [pc, #640]	@ (8029e54 <_dtoa_r+0x2b4>)
 8029bd4:	f7ff ff3c 	bl	8029a50 <__assert_func>
 8029bd8:	e9c0 7701 	strd	r7, r7, [r0, #4]
 8029bdc:	6007      	str	r7, [r0, #0]
 8029bde:	60c7      	str	r7, [r0, #12]
 8029be0:	f8d9 301c 	ldr.w	r3, [r9, #28]
 8029be4:	6819      	ldr	r1, [r3, #0]
 8029be6:	b159      	cbz	r1, 8029c00 <_dtoa_r+0x60>
 8029be8:	685a      	ldr	r2, [r3, #4]
 8029bea:	604a      	str	r2, [r1, #4]
 8029bec:	2301      	movs	r3, #1
 8029bee:	4093      	lsls	r3, r2
 8029bf0:	608b      	str	r3, [r1, #8]
 8029bf2:	4648      	mov	r0, r9
 8029bf4:	f001 f900 	bl	802adf8 <_Bfree>
 8029bf8:	f8d9 301c 	ldr.w	r3, [r9, #28]
 8029bfc:	2200      	movs	r2, #0
 8029bfe:	601a      	str	r2, [r3, #0]
 8029c00:	1e2b      	subs	r3, r5, #0
 8029c02:	bfbb      	ittet	lt
 8029c04:	f023 4300 	biclt.w	r3, r3, #2147483648	@ 0x80000000
 8029c08:	9303      	strlt	r3, [sp, #12]
 8029c0a:	2300      	movge	r3, #0
 8029c0c:	2201      	movlt	r2, #1
 8029c0e:	bfac      	ite	ge
 8029c10:	6033      	strge	r3, [r6, #0]
 8029c12:	6032      	strlt	r2, [r6, #0]
 8029c14:	4b90      	ldr	r3, [pc, #576]	@ (8029e58 <_dtoa_r+0x2b8>)
 8029c16:	9e03      	ldr	r6, [sp, #12]
 8029c18:	43b3      	bics	r3, r6
 8029c1a:	d110      	bne.n	8029c3e <_dtoa_r+0x9e>
 8029c1c:	9a0d      	ldr	r2, [sp, #52]	@ 0x34
 8029c1e:	f242 730f 	movw	r3, #9999	@ 0x270f
 8029c22:	6013      	str	r3, [r2, #0]
 8029c24:	f3c6 0313 	ubfx	r3, r6, #0, #20
 8029c28:	4323      	orrs	r3, r4
 8029c2a:	f000 84de 	beq.w	802a5ea <_dtoa_r+0xa4a>
 8029c2e:	9b1d      	ldr	r3, [sp, #116]	@ 0x74
 8029c30:	4f8a      	ldr	r7, [pc, #552]	@ (8029e5c <_dtoa_r+0x2bc>)
 8029c32:	2b00      	cmp	r3, #0
 8029c34:	f000 84e0 	beq.w	802a5f8 <_dtoa_r+0xa58>
 8029c38:	1cfb      	adds	r3, r7, #3
 8029c3a:	f000 bcdb 	b.w	802a5f4 <_dtoa_r+0xa54>
 8029c3e:	ed9d 8b02 	vldr	d8, [sp, #8]
 8029c42:	eeb5 8b40 	vcmp.f64	d8, #0.0
 8029c46:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 8029c4a:	d10a      	bne.n	8029c62 <_dtoa_r+0xc2>
 8029c4c:	9a0d      	ldr	r2, [sp, #52]	@ 0x34
 8029c4e:	2301      	movs	r3, #1
 8029c50:	6013      	str	r3, [r2, #0]
 8029c52:	9b1d      	ldr	r3, [sp, #116]	@ 0x74
 8029c54:	b113      	cbz	r3, 8029c5c <_dtoa_r+0xbc>
 8029c56:	9a1d      	ldr	r2, [sp, #116]	@ 0x74
 8029c58:	4b81      	ldr	r3, [pc, #516]	@ (8029e60 <_dtoa_r+0x2c0>)
 8029c5a:	6013      	str	r3, [r2, #0]
 8029c5c:	4f81      	ldr	r7, [pc, #516]	@ (8029e64 <_dtoa_r+0x2c4>)
 8029c5e:	f000 bccb 	b.w	802a5f8 <_dtoa_r+0xa58>
 8029c62:	aa0e      	add	r2, sp, #56	@ 0x38
 8029c64:	a90f      	add	r1, sp, #60	@ 0x3c
 8029c66:	4648      	mov	r0, r9
 8029c68:	eeb0 0b48 	vmov.f64	d0, d8
 8029c6c:	f001 fc68 	bl	802b540 <__d2b>
 8029c70:	f3c6 530a 	ubfx	r3, r6, #20, #11
 8029c74:	9a0e      	ldr	r2, [sp, #56]	@ 0x38
 8029c76:	9001      	str	r0, [sp, #4]
 8029c78:	2b00      	cmp	r3, #0
 8029c7a:	d045      	beq.n	8029d08 <_dtoa_r+0x168>
 8029c7c:	eeb0 7b48 	vmov.f64	d7, d8
 8029c80:	ee18 1a90 	vmov	r1, s17
 8029c84:	f3c1 0113 	ubfx	r1, r1, #0, #20
 8029c88:	f041 517f 	orr.w	r1, r1, #1069547520	@ 0x3fc00000
 8029c8c:	f441 1140 	orr.w	r1, r1, #3145728	@ 0x300000
 8029c90:	f2a3 33ff 	subw	r3, r3, #1023	@ 0x3ff
 8029c94:	2500      	movs	r5, #0
 8029c96:	ee07 1a90 	vmov	s15, r1
 8029c9a:	eeb7 6b08 	vmov.f64	d6, #120	@ 0x3fc00000  1.5
 8029c9e:	ed9f 5b66 	vldr	d5, [pc, #408]	@ 8029e38 <_dtoa_r+0x298>
 8029ca2:	ee37 7b46 	vsub.f64	d7, d7, d6
 8029ca6:	ed9f 6b66 	vldr	d6, [pc, #408]	@ 8029e40 <_dtoa_r+0x2a0>
 8029caa:	eea7 6b05 	vfma.f64	d6, d7, d5
 8029cae:	ed9f 5b66 	vldr	d5, [pc, #408]	@ 8029e48 <_dtoa_r+0x2a8>
 8029cb2:	ee07 3a90 	vmov	s15, r3
 8029cb6:	eeb8 4be7 	vcvt.f64.s32	d4, s15
 8029cba:	eeb0 7b46 	vmov.f64	d7, d6
 8029cbe:	eea4 7b05 	vfma.f64	d7, d4, d5
 8029cc2:	eefd 6bc7 	vcvt.s32.f64	s13, d7
 8029cc6:	eeb5 7bc0 	vcmpe.f64	d7, #0.0
 8029cca:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 8029cce:	ee16 8a90 	vmov	r8, s13
 8029cd2:	d508      	bpl.n	8029ce6 <_dtoa_r+0x146>
 8029cd4:	eeb8 6be6 	vcvt.f64.s32	d6, s13
 8029cd8:	eeb4 6b47 	vcmp.f64	d6, d7
 8029cdc:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 8029ce0:	bf18      	it	ne
 8029ce2:	f108 38ff 	addne.w	r8, r8, #4294967295	@ 0xffffffff
 8029ce6:	f1b8 0f16 	cmp.w	r8, #22
 8029cea:	d82b      	bhi.n	8029d44 <_dtoa_r+0x1a4>
 8029cec:	495e      	ldr	r1, [pc, #376]	@ (8029e68 <_dtoa_r+0x2c8>)
 8029cee:	eb01 01c8 	add.w	r1, r1, r8, lsl #3
 8029cf2:	ed91 7b00 	vldr	d7, [r1]
 8029cf6:	eeb4 8bc7 	vcmpe.f64	d8, d7
 8029cfa:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 8029cfe:	d501      	bpl.n	8029d04 <_dtoa_r+0x164>
 8029d00:	f108 38ff 	add.w	r8, r8, #4294967295	@ 0xffffffff
 8029d04:	2100      	movs	r1, #0
 8029d06:	e01e      	b.n	8029d46 <_dtoa_r+0x1a6>
 8029d08:	9b0f      	ldr	r3, [sp, #60]	@ 0x3c
 8029d0a:	4413      	add	r3, r2
 8029d0c:	f203 4132 	addw	r1, r3, #1074	@ 0x432
 8029d10:	2920      	cmp	r1, #32
 8029d12:	bfc1      	itttt	gt
 8029d14:	f1c1 0140 	rsbgt	r1, r1, #64	@ 0x40
 8029d18:	408e      	lslgt	r6, r1
 8029d1a:	f203 4112 	addwgt	r1, r3, #1042	@ 0x412
 8029d1e:	fa24 f101 	lsrgt.w	r1, r4, r1
 8029d22:	bfd6      	itet	le
 8029d24:	f1c1 0120 	rsble	r1, r1, #32
 8029d28:	4331      	orrgt	r1, r6
 8029d2a:	fa04 f101 	lslle.w	r1, r4, r1
 8029d2e:	ee07 1a90 	vmov	s15, r1
 8029d32:	eeb8 7b67 	vcvt.f64.u32	d7, s15
 8029d36:	3b01      	subs	r3, #1
 8029d38:	ee17 1a90 	vmov	r1, s15
 8029d3c:	2501      	movs	r5, #1
 8029d3e:	f1a1 71f8 	sub.w	r1, r1, #32505856	@ 0x1f00000
 8029d42:	e7a8      	b.n	8029c96 <_dtoa_r+0xf6>
 8029d44:	2101      	movs	r1, #1
 8029d46:	1ad2      	subs	r2, r2, r3
 8029d48:	1e53      	subs	r3, r2, #1
 8029d4a:	9306      	str	r3, [sp, #24]
 8029d4c:	bf45      	ittet	mi
 8029d4e:	f1c2 0301 	rsbmi	r3, r2, #1
 8029d52:	9305      	strmi	r3, [sp, #20]
 8029d54:	2300      	movpl	r3, #0
 8029d56:	2300      	movmi	r3, #0
 8029d58:	bf4c      	ite	mi
 8029d5a:	9306      	strmi	r3, [sp, #24]
 8029d5c:	9305      	strpl	r3, [sp, #20]
 8029d5e:	f1b8 0f00 	cmp.w	r8, #0
 8029d62:	910c      	str	r1, [sp, #48]	@ 0x30
 8029d64:	db18      	blt.n	8029d98 <_dtoa_r+0x1f8>
 8029d66:	9b06      	ldr	r3, [sp, #24]
 8029d68:	f8cd 8028 	str.w	r8, [sp, #40]	@ 0x28
 8029d6c:	4443      	add	r3, r8
 8029d6e:	9306      	str	r3, [sp, #24]
 8029d70:	2300      	movs	r3, #0
 8029d72:	9a07      	ldr	r2, [sp, #28]
 8029d74:	2a09      	cmp	r2, #9
 8029d76:	d849      	bhi.n	8029e0c <_dtoa_r+0x26c>
 8029d78:	2a05      	cmp	r2, #5
 8029d7a:	bfc4      	itt	gt
 8029d7c:	3a04      	subgt	r2, #4
 8029d7e:	9207      	strgt	r2, [sp, #28]
 8029d80:	9a07      	ldr	r2, [sp, #28]
 8029d82:	f1a2 0202 	sub.w	r2, r2, #2
 8029d86:	bfcc      	ite	gt
 8029d88:	2400      	movgt	r4, #0
 8029d8a:	2401      	movle	r4, #1
 8029d8c:	2a03      	cmp	r2, #3
 8029d8e:	d848      	bhi.n	8029e22 <_dtoa_r+0x282>
 8029d90:	e8df f002 	tbb	[pc, r2]
 8029d94:	3a2c2e0b 	.word	0x3a2c2e0b
 8029d98:	9b05      	ldr	r3, [sp, #20]
 8029d9a:	2200      	movs	r2, #0
 8029d9c:	eba3 0308 	sub.w	r3, r3, r8
 8029da0:	9305      	str	r3, [sp, #20]
 8029da2:	920a      	str	r2, [sp, #40]	@ 0x28
 8029da4:	f1c8 0300 	rsb	r3, r8, #0
 8029da8:	e7e3      	b.n	8029d72 <_dtoa_r+0x1d2>
 8029daa:	2200      	movs	r2, #0
 8029dac:	9208      	str	r2, [sp, #32]
 8029dae:	9a09      	ldr	r2, [sp, #36]	@ 0x24
 8029db0:	2a00      	cmp	r2, #0
 8029db2:	dc39      	bgt.n	8029e28 <_dtoa_r+0x288>
 8029db4:	f04f 0b01 	mov.w	fp, #1
 8029db8:	46da      	mov	sl, fp
 8029dba:	465a      	mov	r2, fp
 8029dbc:	f8cd b024 	str.w	fp, [sp, #36]	@ 0x24
 8029dc0:	f8d9 701c 	ldr.w	r7, [r9, #28]
 8029dc4:	2100      	movs	r1, #0
 8029dc6:	2004      	movs	r0, #4
 8029dc8:	f100 0614 	add.w	r6, r0, #20
 8029dcc:	4296      	cmp	r6, r2
 8029dce:	d930      	bls.n	8029e32 <_dtoa_r+0x292>
 8029dd0:	6079      	str	r1, [r7, #4]
 8029dd2:	4648      	mov	r0, r9
 8029dd4:	9304      	str	r3, [sp, #16]
 8029dd6:	f000 ffcf 	bl	802ad78 <_Balloc>
 8029dda:	9b04      	ldr	r3, [sp, #16]
 8029ddc:	4607      	mov	r7, r0
 8029dde:	2800      	cmp	r0, #0
 8029de0:	d146      	bne.n	8029e70 <_dtoa_r+0x2d0>
 8029de2:	4b22      	ldr	r3, [pc, #136]	@ (8029e6c <_dtoa_r+0x2cc>)
 8029de4:	4602      	mov	r2, r0
 8029de6:	f240 11af 	movw	r1, #431	@ 0x1af
 8029dea:	e6f2      	b.n	8029bd2 <_dtoa_r+0x32>
 8029dec:	2201      	movs	r2, #1
 8029dee:	e7dd      	b.n	8029dac <_dtoa_r+0x20c>
 8029df0:	2200      	movs	r2, #0
 8029df2:	9208      	str	r2, [sp, #32]
 8029df4:	9a09      	ldr	r2, [sp, #36]	@ 0x24
 8029df6:	eb08 0b02 	add.w	fp, r8, r2
 8029dfa:	f10b 0a01 	add.w	sl, fp, #1
 8029dfe:	4652      	mov	r2, sl
 8029e00:	2a01      	cmp	r2, #1
 8029e02:	bfb8      	it	lt
 8029e04:	2201      	movlt	r2, #1
 8029e06:	e7db      	b.n	8029dc0 <_dtoa_r+0x220>
 8029e08:	2201      	movs	r2, #1
 8029e0a:	e7f2      	b.n	8029df2 <_dtoa_r+0x252>
 8029e0c:	2401      	movs	r4, #1
 8029e0e:	2200      	movs	r2, #0
 8029e10:	e9cd 2407 	strd	r2, r4, [sp, #28]
 8029e14:	f04f 3bff 	mov.w	fp, #4294967295	@ 0xffffffff
 8029e18:	2100      	movs	r1, #0
 8029e1a:	46da      	mov	sl, fp
 8029e1c:	2212      	movs	r2, #18
 8029e1e:	9109      	str	r1, [sp, #36]	@ 0x24
 8029e20:	e7ce      	b.n	8029dc0 <_dtoa_r+0x220>
 8029e22:	2201      	movs	r2, #1
 8029e24:	9208      	str	r2, [sp, #32]
 8029e26:	e7f5      	b.n	8029e14 <_dtoa_r+0x274>
 8029e28:	f8dd b024 	ldr.w	fp, [sp, #36]	@ 0x24
 8029e2c:	46da      	mov	sl, fp
 8029e2e:	465a      	mov	r2, fp
 8029e30:	e7c6      	b.n	8029dc0 <_dtoa_r+0x220>
 8029e32:	3101      	adds	r1, #1
 8029e34:	0040      	lsls	r0, r0, #1
 8029e36:	e7c7      	b.n	8029dc8 <_dtoa_r+0x228>
 8029e38:	636f4361 	.word	0x636f4361
 8029e3c:	3fd287a7 	.word	0x3fd287a7
 8029e40:	8b60c8b3 	.word	0x8b60c8b3
 8029e44:	3fc68a28 	.word	0x3fc68a28
 8029e48:	509f79fb 	.word	0x509f79fb
 8029e4c:	3fd34413 	.word	0x3fd34413
 8029e50:	080307ba 	.word	0x080307ba
 8029e54:	08030a06 	.word	0x08030a06
 8029e58:	7ff00000 	.word	0x7ff00000
 8029e5c:	08030a02 	.word	0x08030a02
 8029e60:	08030992 	.word	0x08030992
 8029e64:	08030991 	.word	0x08030991
 8029e68:	08030b60 	.word	0x08030b60
 8029e6c:	08030a5e 	.word	0x08030a5e
 8029e70:	f8d9 201c 	ldr.w	r2, [r9, #28]
 8029e74:	f1ba 0f0e 	cmp.w	sl, #14
 8029e78:	6010      	str	r0, [r2, #0]
 8029e7a:	d86f      	bhi.n	8029f5c <_dtoa_r+0x3bc>
 8029e7c:	2c00      	cmp	r4, #0
 8029e7e:	d06d      	beq.n	8029f5c <_dtoa_r+0x3bc>
 8029e80:	f1b8 0f00 	cmp.w	r8, #0
 8029e84:	f340 80c2 	ble.w	802a00c <_dtoa_r+0x46c>
 8029e88:	4aca      	ldr	r2, [pc, #808]	@ (802a1b4 <_dtoa_r+0x614>)
 8029e8a:	f008 010f 	and.w	r1, r8, #15
 8029e8e:	eb02 02c1 	add.w	r2, r2, r1, lsl #3
 8029e92:	f418 7f80 	tst.w	r8, #256	@ 0x100
 8029e96:	ed92 7b00 	vldr	d7, [r2]
 8029e9a:	ea4f 1128 	mov.w	r1, r8, asr #4
 8029e9e:	f000 80a9 	beq.w	8029ff4 <_dtoa_r+0x454>
 8029ea2:	4ac5      	ldr	r2, [pc, #788]	@ (802a1b8 <_dtoa_r+0x618>)
 8029ea4:	ed92 6b08 	vldr	d6, [r2, #32]
 8029ea8:	ee88 6b06 	vdiv.f64	d6, d8, d6
 8029eac:	ed8d 6b02 	vstr	d6, [sp, #8]
 8029eb0:	f001 010f 	and.w	r1, r1, #15
 8029eb4:	2203      	movs	r2, #3
 8029eb6:	48c0      	ldr	r0, [pc, #768]	@ (802a1b8 <_dtoa_r+0x618>)
 8029eb8:	2900      	cmp	r1, #0
 8029eba:	f040 809d 	bne.w	8029ff8 <_dtoa_r+0x458>
 8029ebe:	ed9d 6b02 	vldr	d6, [sp, #8]
 8029ec2:	ee86 7b07 	vdiv.f64	d7, d6, d7
 8029ec6:	ed8d 7b02 	vstr	d7, [sp, #8]
 8029eca:	990c      	ldr	r1, [sp, #48]	@ 0x30
 8029ecc:	ed9d 7b02 	vldr	d7, [sp, #8]
 8029ed0:	2900      	cmp	r1, #0
 8029ed2:	f000 80c1 	beq.w	802a058 <_dtoa_r+0x4b8>
 8029ed6:	eeb7 6b00 	vmov.f64	d6, #112	@ 0x3f800000  1.0
 8029eda:	eeb4 7bc6 	vcmpe.f64	d7, d6
 8029ede:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 8029ee2:	f140 80b9 	bpl.w	802a058 <_dtoa_r+0x4b8>
 8029ee6:	f1ba 0f00 	cmp.w	sl, #0
 8029eea:	f000 80b5 	beq.w	802a058 <_dtoa_r+0x4b8>
 8029eee:	f1bb 0f00 	cmp.w	fp, #0
 8029ef2:	dd31      	ble.n	8029f58 <_dtoa_r+0x3b8>
 8029ef4:	eeb2 6b04 	vmov.f64	d6, #36	@ 0x41200000  10.0
 8029ef8:	ee27 7b06 	vmul.f64	d7, d7, d6
 8029efc:	ed8d 7b02 	vstr	d7, [sp, #8]
 8029f00:	f108 31ff 	add.w	r1, r8, #4294967295	@ 0xffffffff
 8029f04:	9104      	str	r1, [sp, #16]
 8029f06:	3201      	adds	r2, #1
 8029f08:	465c      	mov	r4, fp
 8029f0a:	ed9d 6b02 	vldr	d6, [sp, #8]
 8029f0e:	eeb1 5b0c 	vmov.f64	d5, #28	@ 0x40e00000  7.0
 8029f12:	ee07 2a90 	vmov	s15, r2
 8029f16:	eeb8 7be7 	vcvt.f64.s32	d7, s15
 8029f1a:	eea7 5b06 	vfma.f64	d5, d7, d6
 8029f1e:	ee15 2a90 	vmov	r2, s11
 8029f22:	ec51 0b15 	vmov	r0, r1, d5
 8029f26:	f1a2 7150 	sub.w	r1, r2, #54525952	@ 0x3400000
 8029f2a:	2c00      	cmp	r4, #0
 8029f2c:	f040 8098 	bne.w	802a060 <_dtoa_r+0x4c0>
 8029f30:	eeb1 7b04 	vmov.f64	d7, #20	@ 0x40a00000  5.0
 8029f34:	ee36 6b47 	vsub.f64	d6, d6, d7
 8029f38:	ec41 0b17 	vmov	d7, r0, r1
 8029f3c:	eeb4 6bc7 	vcmpe.f64	d6, d7
 8029f40:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 8029f44:	f300 8261 	bgt.w	802a40a <_dtoa_r+0x86a>
 8029f48:	eeb1 7b47 	vneg.f64	d7, d7
 8029f4c:	eeb4 6bc7 	vcmpe.f64	d6, d7
 8029f50:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 8029f54:	f100 80f5 	bmi.w	802a142 <_dtoa_r+0x5a2>
 8029f58:	ed8d 8b02 	vstr	d8, [sp, #8]
 8029f5c:	9a0f      	ldr	r2, [sp, #60]	@ 0x3c
 8029f5e:	2a00      	cmp	r2, #0
 8029f60:	f2c0 812c 	blt.w	802a1bc <_dtoa_r+0x61c>
 8029f64:	f1b8 0f0e 	cmp.w	r8, #14
 8029f68:	f300 8128 	bgt.w	802a1bc <_dtoa_r+0x61c>
 8029f6c:	4b91      	ldr	r3, [pc, #580]	@ (802a1b4 <_dtoa_r+0x614>)
 8029f6e:	eb03 03c8 	add.w	r3, r3, r8, lsl #3
 8029f72:	ed93 6b00 	vldr	d6, [r3]
 8029f76:	9b09      	ldr	r3, [sp, #36]	@ 0x24
 8029f78:	2b00      	cmp	r3, #0
 8029f7a:	da03      	bge.n	8029f84 <_dtoa_r+0x3e4>
 8029f7c:	f1ba 0f00 	cmp.w	sl, #0
 8029f80:	f340 80d2 	ble.w	802a128 <_dtoa_r+0x588>
 8029f84:	eeb2 4b04 	vmov.f64	d4, #36	@ 0x41200000  10.0
 8029f88:	ed9d 7b02 	vldr	d7, [sp, #8]
 8029f8c:	463e      	mov	r6, r7
 8029f8e:	ee87 5b06 	vdiv.f64	d5, d7, d6
 8029f92:	eebd 5bc5 	vcvt.s32.f64	s10, d5
 8029f96:	ee15 3a10 	vmov	r3, s10
 8029f9a:	3330      	adds	r3, #48	@ 0x30
 8029f9c:	f806 3b01 	strb.w	r3, [r6], #1
 8029fa0:	1bf3      	subs	r3, r6, r7
 8029fa2:	459a      	cmp	sl, r3
 8029fa4:	eeb8 3bc5 	vcvt.f64.s32	d3, s10
 8029fa8:	eea3 7b46 	vfms.f64	d7, d3, d6
 8029fac:	f040 80f8 	bne.w	802a1a0 <_dtoa_r+0x600>
 8029fb0:	ee37 7b07 	vadd.f64	d7, d7, d7
 8029fb4:	eeb4 7bc6 	vcmpe.f64	d7, d6
 8029fb8:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 8029fbc:	f300 80dd 	bgt.w	802a17a <_dtoa_r+0x5da>
 8029fc0:	eeb4 7b46 	vcmp.f64	d7, d6
 8029fc4:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 8029fc8:	d104      	bne.n	8029fd4 <_dtoa_r+0x434>
 8029fca:	ee15 3a10 	vmov	r3, s10
 8029fce:	07db      	lsls	r3, r3, #31
 8029fd0:	f100 80d3 	bmi.w	802a17a <_dtoa_r+0x5da>
 8029fd4:	9901      	ldr	r1, [sp, #4]
 8029fd6:	4648      	mov	r0, r9
 8029fd8:	f000 ff0e 	bl	802adf8 <_Bfree>
 8029fdc:	2300      	movs	r3, #0
 8029fde:	9a0d      	ldr	r2, [sp, #52]	@ 0x34
 8029fe0:	7033      	strb	r3, [r6, #0]
 8029fe2:	f108 0301 	add.w	r3, r8, #1
 8029fe6:	6013      	str	r3, [r2, #0]
 8029fe8:	9b1d      	ldr	r3, [sp, #116]	@ 0x74
 8029fea:	2b00      	cmp	r3, #0
 8029fec:	f000 8304 	beq.w	802a5f8 <_dtoa_r+0xa58>
 8029ff0:	601e      	str	r6, [r3, #0]
 8029ff2:	e301      	b.n	802a5f8 <_dtoa_r+0xa58>
 8029ff4:	2202      	movs	r2, #2
 8029ff6:	e75e      	b.n	8029eb6 <_dtoa_r+0x316>
 8029ff8:	07cc      	lsls	r4, r1, #31
 8029ffa:	d504      	bpl.n	802a006 <_dtoa_r+0x466>
 8029ffc:	ed90 6b00 	vldr	d6, [r0]
 802a000:	3201      	adds	r2, #1
 802a002:	ee27 7b06 	vmul.f64	d7, d7, d6
 802a006:	1049      	asrs	r1, r1, #1
 802a008:	3008      	adds	r0, #8
 802a00a:	e755      	b.n	8029eb8 <_dtoa_r+0x318>
 802a00c:	d022      	beq.n	802a054 <_dtoa_r+0x4b4>
 802a00e:	f1c8 0100 	rsb	r1, r8, #0
 802a012:	4a68      	ldr	r2, [pc, #416]	@ (802a1b4 <_dtoa_r+0x614>)
 802a014:	f001 000f 	and.w	r0, r1, #15
 802a018:	eb02 02c0 	add.w	r2, r2, r0, lsl #3
 802a01c:	ed92 7b00 	vldr	d7, [r2]
 802a020:	ee28 7b07 	vmul.f64	d7, d8, d7
 802a024:	ed8d 7b02 	vstr	d7, [sp, #8]
 802a028:	4863      	ldr	r0, [pc, #396]	@ (802a1b8 <_dtoa_r+0x618>)
 802a02a:	1109      	asrs	r1, r1, #4
 802a02c:	2400      	movs	r4, #0
 802a02e:	2202      	movs	r2, #2
 802a030:	b929      	cbnz	r1, 802a03e <_dtoa_r+0x49e>
 802a032:	2c00      	cmp	r4, #0
 802a034:	f43f af49 	beq.w	8029eca <_dtoa_r+0x32a>
 802a038:	ed8d 7b02 	vstr	d7, [sp, #8]
 802a03c:	e745      	b.n	8029eca <_dtoa_r+0x32a>
 802a03e:	07ce      	lsls	r6, r1, #31
 802a040:	d505      	bpl.n	802a04e <_dtoa_r+0x4ae>
 802a042:	ed90 6b00 	vldr	d6, [r0]
 802a046:	3201      	adds	r2, #1
 802a048:	2401      	movs	r4, #1
 802a04a:	ee27 7b06 	vmul.f64	d7, d7, d6
 802a04e:	1049      	asrs	r1, r1, #1
 802a050:	3008      	adds	r0, #8
 802a052:	e7ed      	b.n	802a030 <_dtoa_r+0x490>
 802a054:	2202      	movs	r2, #2
 802a056:	e738      	b.n	8029eca <_dtoa_r+0x32a>
 802a058:	f8cd 8010 	str.w	r8, [sp, #16]
 802a05c:	4654      	mov	r4, sl
 802a05e:	e754      	b.n	8029f0a <_dtoa_r+0x36a>
 802a060:	4a54      	ldr	r2, [pc, #336]	@ (802a1b4 <_dtoa_r+0x614>)
 802a062:	eb02 02c4 	add.w	r2, r2, r4, lsl #3
 802a066:	ed12 4b02 	vldr	d4, [r2, #-8]
 802a06a:	9a08      	ldr	r2, [sp, #32]
 802a06c:	ec41 0b17 	vmov	d7, r0, r1
 802a070:	443c      	add	r4, r7
 802a072:	b34a      	cbz	r2, 802a0c8 <_dtoa_r+0x528>
 802a074:	eeb6 3b00 	vmov.f64	d3, #96	@ 0x3f000000  0.5
 802a078:	eeb7 2b00 	vmov.f64	d2, #112	@ 0x3f800000  1.0
 802a07c:	463e      	mov	r6, r7
 802a07e:	ee83 5b04 	vdiv.f64	d5, d3, d4
 802a082:	eeb2 3b04 	vmov.f64	d3, #36	@ 0x41200000  10.0
 802a086:	ee35 7b47 	vsub.f64	d7, d5, d7
 802a08a:	eefd 4bc6 	vcvt.s32.f64	s9, d6
 802a08e:	ee14 2a90 	vmov	r2, s9
 802a092:	eeb8 5be4 	vcvt.f64.s32	d5, s9
 802a096:	3230      	adds	r2, #48	@ 0x30
 802a098:	ee36 6b45 	vsub.f64	d6, d6, d5
 802a09c:	eeb4 6bc7 	vcmpe.f64	d6, d7
 802a0a0:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802a0a4:	f806 2b01 	strb.w	r2, [r6], #1
 802a0a8:	d438      	bmi.n	802a11c <_dtoa_r+0x57c>
 802a0aa:	ee32 5b46 	vsub.f64	d5, d2, d6
 802a0ae:	eeb4 5bc7 	vcmpe.f64	d5, d7
 802a0b2:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802a0b6:	d462      	bmi.n	802a17e <_dtoa_r+0x5de>
 802a0b8:	42a6      	cmp	r6, r4
 802a0ba:	f43f af4d 	beq.w	8029f58 <_dtoa_r+0x3b8>
 802a0be:	ee27 7b03 	vmul.f64	d7, d7, d3
 802a0c2:	ee26 6b03 	vmul.f64	d6, d6, d3
 802a0c6:	e7e0      	b.n	802a08a <_dtoa_r+0x4ea>
 802a0c8:	4621      	mov	r1, r4
 802a0ca:	463e      	mov	r6, r7
 802a0cc:	ee27 7b04 	vmul.f64	d7, d7, d4
 802a0d0:	eeb2 3b04 	vmov.f64	d3, #36	@ 0x41200000  10.0
 802a0d4:	eefd 4bc6 	vcvt.s32.f64	s9, d6
 802a0d8:	ee14 2a90 	vmov	r2, s9
 802a0dc:	3230      	adds	r2, #48	@ 0x30
 802a0de:	f806 2b01 	strb.w	r2, [r6], #1
 802a0e2:	42a6      	cmp	r6, r4
 802a0e4:	eeb8 5be4 	vcvt.f64.s32	d5, s9
 802a0e8:	ee36 6b45 	vsub.f64	d6, d6, d5
 802a0ec:	d119      	bne.n	802a122 <_dtoa_r+0x582>
 802a0ee:	eeb6 5b00 	vmov.f64	d5, #96	@ 0x3f000000  0.5
 802a0f2:	ee37 4b05 	vadd.f64	d4, d7, d5
 802a0f6:	eeb4 6bc4 	vcmpe.f64	d6, d4
 802a0fa:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802a0fe:	dc3e      	bgt.n	802a17e <_dtoa_r+0x5de>
 802a100:	ee35 5b47 	vsub.f64	d5, d5, d7
 802a104:	eeb4 6bc5 	vcmpe.f64	d6, d5
 802a108:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802a10c:	f57f af24 	bpl.w	8029f58 <_dtoa_r+0x3b8>
 802a110:	460e      	mov	r6, r1
 802a112:	3901      	subs	r1, #1
 802a114:	f816 3c01 	ldrb.w	r3, [r6, #-1]
 802a118:	2b30      	cmp	r3, #48	@ 0x30
 802a11a:	d0f9      	beq.n	802a110 <_dtoa_r+0x570>
 802a11c:	f8dd 8010 	ldr.w	r8, [sp, #16]
 802a120:	e758      	b.n	8029fd4 <_dtoa_r+0x434>
 802a122:	ee26 6b03 	vmul.f64	d6, d6, d3
 802a126:	e7d5      	b.n	802a0d4 <_dtoa_r+0x534>
 802a128:	d10b      	bne.n	802a142 <_dtoa_r+0x5a2>
 802a12a:	eeb1 7b04 	vmov.f64	d7, #20	@ 0x40a00000  5.0
 802a12e:	ee26 6b07 	vmul.f64	d6, d6, d7
 802a132:	ed9d 7b02 	vldr	d7, [sp, #8]
 802a136:	eeb4 6bc7 	vcmpe.f64	d6, d7
 802a13a:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802a13e:	f2c0 8161 	blt.w	802a404 <_dtoa_r+0x864>
 802a142:	2400      	movs	r4, #0
 802a144:	4625      	mov	r5, r4
 802a146:	9b09      	ldr	r3, [sp, #36]	@ 0x24
 802a148:	43db      	mvns	r3, r3
 802a14a:	9304      	str	r3, [sp, #16]
 802a14c:	463e      	mov	r6, r7
 802a14e:	f04f 0800 	mov.w	r8, #0
 802a152:	4621      	mov	r1, r4
 802a154:	4648      	mov	r0, r9
 802a156:	f000 fe4f 	bl	802adf8 <_Bfree>
 802a15a:	2d00      	cmp	r5, #0
 802a15c:	d0de      	beq.n	802a11c <_dtoa_r+0x57c>
 802a15e:	f1b8 0f00 	cmp.w	r8, #0
 802a162:	d005      	beq.n	802a170 <_dtoa_r+0x5d0>
 802a164:	45a8      	cmp	r8, r5
 802a166:	d003      	beq.n	802a170 <_dtoa_r+0x5d0>
 802a168:	4641      	mov	r1, r8
 802a16a:	4648      	mov	r0, r9
 802a16c:	f000 fe44 	bl	802adf8 <_Bfree>
 802a170:	4629      	mov	r1, r5
 802a172:	4648      	mov	r0, r9
 802a174:	f000 fe40 	bl	802adf8 <_Bfree>
 802a178:	e7d0      	b.n	802a11c <_dtoa_r+0x57c>
 802a17a:	f8cd 8010 	str.w	r8, [sp, #16]
 802a17e:	4633      	mov	r3, r6
 802a180:	461e      	mov	r6, r3
 802a182:	f813 2d01 	ldrb.w	r2, [r3, #-1]!
 802a186:	2a39      	cmp	r2, #57	@ 0x39
 802a188:	d106      	bne.n	802a198 <_dtoa_r+0x5f8>
 802a18a:	429f      	cmp	r7, r3
 802a18c:	d1f8      	bne.n	802a180 <_dtoa_r+0x5e0>
 802a18e:	9a04      	ldr	r2, [sp, #16]
 802a190:	3201      	adds	r2, #1
 802a192:	9204      	str	r2, [sp, #16]
 802a194:	2230      	movs	r2, #48	@ 0x30
 802a196:	703a      	strb	r2, [r7, #0]
 802a198:	781a      	ldrb	r2, [r3, #0]
 802a19a:	3201      	adds	r2, #1
 802a19c:	701a      	strb	r2, [r3, #0]
 802a19e:	e7bd      	b.n	802a11c <_dtoa_r+0x57c>
 802a1a0:	ee27 7b04 	vmul.f64	d7, d7, d4
 802a1a4:	eeb5 7b40 	vcmp.f64	d7, #0.0
 802a1a8:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802a1ac:	f47f aeef 	bne.w	8029f8e <_dtoa_r+0x3ee>
 802a1b0:	e710      	b.n	8029fd4 <_dtoa_r+0x434>
 802a1b2:	bf00      	nop
 802a1b4:	08030b60 	.word	0x08030b60
 802a1b8:	08030b38 	.word	0x08030b38
 802a1bc:	9908      	ldr	r1, [sp, #32]
 802a1be:	2900      	cmp	r1, #0
 802a1c0:	f000 80e3 	beq.w	802a38a <_dtoa_r+0x7ea>
 802a1c4:	9907      	ldr	r1, [sp, #28]
 802a1c6:	2901      	cmp	r1, #1
 802a1c8:	f300 80c8 	bgt.w	802a35c <_dtoa_r+0x7bc>
 802a1cc:	2d00      	cmp	r5, #0
 802a1ce:	f000 80c1 	beq.w	802a354 <_dtoa_r+0x7b4>
 802a1d2:	f202 4233 	addw	r2, r2, #1075	@ 0x433
 802a1d6:	9e05      	ldr	r6, [sp, #20]
 802a1d8:	461c      	mov	r4, r3
 802a1da:	9304      	str	r3, [sp, #16]
 802a1dc:	9b05      	ldr	r3, [sp, #20]
 802a1de:	4413      	add	r3, r2
 802a1e0:	9305      	str	r3, [sp, #20]
 802a1e2:	9b06      	ldr	r3, [sp, #24]
 802a1e4:	2101      	movs	r1, #1
 802a1e6:	4413      	add	r3, r2
 802a1e8:	4648      	mov	r0, r9
 802a1ea:	9306      	str	r3, [sp, #24]
 802a1ec:	f000 ff02 	bl	802aff4 <__i2b>
 802a1f0:	9b04      	ldr	r3, [sp, #16]
 802a1f2:	4605      	mov	r5, r0
 802a1f4:	b166      	cbz	r6, 802a210 <_dtoa_r+0x670>
 802a1f6:	9a06      	ldr	r2, [sp, #24]
 802a1f8:	2a00      	cmp	r2, #0
 802a1fa:	dd09      	ble.n	802a210 <_dtoa_r+0x670>
 802a1fc:	42b2      	cmp	r2, r6
 802a1fe:	9905      	ldr	r1, [sp, #20]
 802a200:	bfa8      	it	ge
 802a202:	4632      	movge	r2, r6
 802a204:	1a89      	subs	r1, r1, r2
 802a206:	9105      	str	r1, [sp, #20]
 802a208:	9906      	ldr	r1, [sp, #24]
 802a20a:	1ab6      	subs	r6, r6, r2
 802a20c:	1a8a      	subs	r2, r1, r2
 802a20e:	9206      	str	r2, [sp, #24]
 802a210:	b1fb      	cbz	r3, 802a252 <_dtoa_r+0x6b2>
 802a212:	9a08      	ldr	r2, [sp, #32]
 802a214:	2a00      	cmp	r2, #0
 802a216:	f000 80bc 	beq.w	802a392 <_dtoa_r+0x7f2>
 802a21a:	b19c      	cbz	r4, 802a244 <_dtoa_r+0x6a4>
 802a21c:	4629      	mov	r1, r5
 802a21e:	4622      	mov	r2, r4
 802a220:	4648      	mov	r0, r9
 802a222:	930b      	str	r3, [sp, #44]	@ 0x2c
 802a224:	f000 ffa6 	bl	802b174 <__pow5mult>
 802a228:	9a01      	ldr	r2, [sp, #4]
 802a22a:	4601      	mov	r1, r0
 802a22c:	4605      	mov	r5, r0
 802a22e:	4648      	mov	r0, r9
 802a230:	f000 fef6 	bl	802b020 <__multiply>
 802a234:	9901      	ldr	r1, [sp, #4]
 802a236:	9004      	str	r0, [sp, #16]
 802a238:	4648      	mov	r0, r9
 802a23a:	f000 fddd 	bl	802adf8 <_Bfree>
 802a23e:	9a04      	ldr	r2, [sp, #16]
 802a240:	9b0b      	ldr	r3, [sp, #44]	@ 0x2c
 802a242:	9201      	str	r2, [sp, #4]
 802a244:	1b1a      	subs	r2, r3, r4
 802a246:	d004      	beq.n	802a252 <_dtoa_r+0x6b2>
 802a248:	9901      	ldr	r1, [sp, #4]
 802a24a:	4648      	mov	r0, r9
 802a24c:	f000 ff92 	bl	802b174 <__pow5mult>
 802a250:	9001      	str	r0, [sp, #4]
 802a252:	2101      	movs	r1, #1
 802a254:	4648      	mov	r0, r9
 802a256:	f000 fecd 	bl	802aff4 <__i2b>
 802a25a:	9b0a      	ldr	r3, [sp, #40]	@ 0x28
 802a25c:	4604      	mov	r4, r0
 802a25e:	2b00      	cmp	r3, #0
 802a260:	f000 81d0 	beq.w	802a604 <_dtoa_r+0xa64>
 802a264:	461a      	mov	r2, r3
 802a266:	4601      	mov	r1, r0
 802a268:	4648      	mov	r0, r9
 802a26a:	f000 ff83 	bl	802b174 <__pow5mult>
 802a26e:	9b07      	ldr	r3, [sp, #28]
 802a270:	2b01      	cmp	r3, #1
 802a272:	4604      	mov	r4, r0
 802a274:	f300 8095 	bgt.w	802a3a2 <_dtoa_r+0x802>
 802a278:	9b02      	ldr	r3, [sp, #8]
 802a27a:	2b00      	cmp	r3, #0
 802a27c:	f040 808b 	bne.w	802a396 <_dtoa_r+0x7f6>
 802a280:	9b03      	ldr	r3, [sp, #12]
 802a282:	f3c3 0213 	ubfx	r2, r3, #0, #20
 802a286:	2a00      	cmp	r2, #0
 802a288:	f040 8087 	bne.w	802a39a <_dtoa_r+0x7fa>
 802a28c:	f023 4200 	bic.w	r2, r3, #2147483648	@ 0x80000000
 802a290:	0d12      	lsrs	r2, r2, #20
 802a292:	0512      	lsls	r2, r2, #20
 802a294:	2a00      	cmp	r2, #0
 802a296:	f000 8082 	beq.w	802a39e <_dtoa_r+0x7fe>
 802a29a:	9b05      	ldr	r3, [sp, #20]
 802a29c:	3301      	adds	r3, #1
 802a29e:	9305      	str	r3, [sp, #20]
 802a2a0:	9b06      	ldr	r3, [sp, #24]
 802a2a2:	3301      	adds	r3, #1
 802a2a4:	9306      	str	r3, [sp, #24]
 802a2a6:	2301      	movs	r3, #1
 802a2a8:	930b      	str	r3, [sp, #44]	@ 0x2c
 802a2aa:	9b0a      	ldr	r3, [sp, #40]	@ 0x28
 802a2ac:	2b00      	cmp	r3, #0
 802a2ae:	f000 81af 	beq.w	802a610 <_dtoa_r+0xa70>
 802a2b2:	6922      	ldr	r2, [r4, #16]
 802a2b4:	eb04 0282 	add.w	r2, r4, r2, lsl #2
 802a2b8:	6910      	ldr	r0, [r2, #16]
 802a2ba:	f000 fe4f 	bl	802af5c <__hi0bits>
 802a2be:	f1c0 0020 	rsb	r0, r0, #32
 802a2c2:	9b06      	ldr	r3, [sp, #24]
 802a2c4:	4418      	add	r0, r3
 802a2c6:	f010 001f 	ands.w	r0, r0, #31
 802a2ca:	d076      	beq.n	802a3ba <_dtoa_r+0x81a>
 802a2cc:	f1c0 0220 	rsb	r2, r0, #32
 802a2d0:	2a04      	cmp	r2, #4
 802a2d2:	dd69      	ble.n	802a3a8 <_dtoa_r+0x808>
 802a2d4:	9b05      	ldr	r3, [sp, #20]
 802a2d6:	f1c0 001c 	rsb	r0, r0, #28
 802a2da:	4403      	add	r3, r0
 802a2dc:	9305      	str	r3, [sp, #20]
 802a2de:	9b06      	ldr	r3, [sp, #24]
 802a2e0:	4406      	add	r6, r0
 802a2e2:	4403      	add	r3, r0
 802a2e4:	9306      	str	r3, [sp, #24]
 802a2e6:	9b05      	ldr	r3, [sp, #20]
 802a2e8:	2b00      	cmp	r3, #0
 802a2ea:	dd05      	ble.n	802a2f8 <_dtoa_r+0x758>
 802a2ec:	9901      	ldr	r1, [sp, #4]
 802a2ee:	461a      	mov	r2, r3
 802a2f0:	4648      	mov	r0, r9
 802a2f2:	f000 ff99 	bl	802b228 <__lshift>
 802a2f6:	9001      	str	r0, [sp, #4]
 802a2f8:	9b06      	ldr	r3, [sp, #24]
 802a2fa:	2b00      	cmp	r3, #0
 802a2fc:	dd05      	ble.n	802a30a <_dtoa_r+0x76a>
 802a2fe:	4621      	mov	r1, r4
 802a300:	461a      	mov	r2, r3
 802a302:	4648      	mov	r0, r9
 802a304:	f000 ff90 	bl	802b228 <__lshift>
 802a308:	4604      	mov	r4, r0
 802a30a:	9b0c      	ldr	r3, [sp, #48]	@ 0x30
 802a30c:	2b00      	cmp	r3, #0
 802a30e:	d056      	beq.n	802a3be <_dtoa_r+0x81e>
 802a310:	9801      	ldr	r0, [sp, #4]
 802a312:	4621      	mov	r1, r4
 802a314:	f000 fff4 	bl	802b300 <__mcmp>
 802a318:	2800      	cmp	r0, #0
 802a31a:	da50      	bge.n	802a3be <_dtoa_r+0x81e>
 802a31c:	f108 33ff 	add.w	r3, r8, #4294967295	@ 0xffffffff
 802a320:	9304      	str	r3, [sp, #16]
 802a322:	9901      	ldr	r1, [sp, #4]
 802a324:	2300      	movs	r3, #0
 802a326:	220a      	movs	r2, #10
 802a328:	4648      	mov	r0, r9
 802a32a:	f000 fd87 	bl	802ae3c <__multadd>
 802a32e:	9b08      	ldr	r3, [sp, #32]
 802a330:	9001      	str	r0, [sp, #4]
 802a332:	2b00      	cmp	r3, #0
 802a334:	f000 816e 	beq.w	802a614 <_dtoa_r+0xa74>
 802a338:	4629      	mov	r1, r5
 802a33a:	2300      	movs	r3, #0
 802a33c:	220a      	movs	r2, #10
 802a33e:	4648      	mov	r0, r9
 802a340:	f000 fd7c 	bl	802ae3c <__multadd>
 802a344:	f1bb 0f00 	cmp.w	fp, #0
 802a348:	4605      	mov	r5, r0
 802a34a:	dc64      	bgt.n	802a416 <_dtoa_r+0x876>
 802a34c:	9b07      	ldr	r3, [sp, #28]
 802a34e:	2b02      	cmp	r3, #2
 802a350:	dc3e      	bgt.n	802a3d0 <_dtoa_r+0x830>
 802a352:	e060      	b.n	802a416 <_dtoa_r+0x876>
 802a354:	9a0e      	ldr	r2, [sp, #56]	@ 0x38
 802a356:	f1c2 0236 	rsb	r2, r2, #54	@ 0x36
 802a35a:	e73c      	b.n	802a1d6 <_dtoa_r+0x636>
 802a35c:	f10a 34ff 	add.w	r4, sl, #4294967295	@ 0xffffffff
 802a360:	42a3      	cmp	r3, r4
 802a362:	bfbf      	itttt	lt
 802a364:	1ae2      	sublt	r2, r4, r3
 802a366:	9b0a      	ldrlt	r3, [sp, #40]	@ 0x28
 802a368:	189b      	addlt	r3, r3, r2
 802a36a:	930a      	strlt	r3, [sp, #40]	@ 0x28
 802a36c:	bfae      	itee	ge
 802a36e:	1b1c      	subge	r4, r3, r4
 802a370:	4623      	movlt	r3, r4
 802a372:	2400      	movlt	r4, #0
 802a374:	f1ba 0f00 	cmp.w	sl, #0
 802a378:	bfb5      	itete	lt
 802a37a:	9a05      	ldrlt	r2, [sp, #20]
 802a37c:	9e05      	ldrge	r6, [sp, #20]
 802a37e:	eba2 060a 	sublt.w	r6, r2, sl
 802a382:	4652      	movge	r2, sl
 802a384:	bfb8      	it	lt
 802a386:	2200      	movlt	r2, #0
 802a388:	e727      	b.n	802a1da <_dtoa_r+0x63a>
 802a38a:	9e05      	ldr	r6, [sp, #20]
 802a38c:	9d08      	ldr	r5, [sp, #32]
 802a38e:	461c      	mov	r4, r3
 802a390:	e730      	b.n	802a1f4 <_dtoa_r+0x654>
 802a392:	461a      	mov	r2, r3
 802a394:	e758      	b.n	802a248 <_dtoa_r+0x6a8>
 802a396:	2300      	movs	r3, #0
 802a398:	e786      	b.n	802a2a8 <_dtoa_r+0x708>
 802a39a:	9b02      	ldr	r3, [sp, #8]
 802a39c:	e784      	b.n	802a2a8 <_dtoa_r+0x708>
 802a39e:	920b      	str	r2, [sp, #44]	@ 0x2c
 802a3a0:	e783      	b.n	802a2aa <_dtoa_r+0x70a>
 802a3a2:	2300      	movs	r3, #0
 802a3a4:	930b      	str	r3, [sp, #44]	@ 0x2c
 802a3a6:	e784      	b.n	802a2b2 <_dtoa_r+0x712>
 802a3a8:	d09d      	beq.n	802a2e6 <_dtoa_r+0x746>
 802a3aa:	9b05      	ldr	r3, [sp, #20]
 802a3ac:	321c      	adds	r2, #28
 802a3ae:	4413      	add	r3, r2
 802a3b0:	9305      	str	r3, [sp, #20]
 802a3b2:	9b06      	ldr	r3, [sp, #24]
 802a3b4:	4416      	add	r6, r2
 802a3b6:	4413      	add	r3, r2
 802a3b8:	e794      	b.n	802a2e4 <_dtoa_r+0x744>
 802a3ba:	4602      	mov	r2, r0
 802a3bc:	e7f5      	b.n	802a3aa <_dtoa_r+0x80a>
 802a3be:	f1ba 0f00 	cmp.w	sl, #0
 802a3c2:	f8cd 8010 	str.w	r8, [sp, #16]
 802a3c6:	46d3      	mov	fp, sl
 802a3c8:	dc21      	bgt.n	802a40e <_dtoa_r+0x86e>
 802a3ca:	9b07      	ldr	r3, [sp, #28]
 802a3cc:	2b02      	cmp	r3, #2
 802a3ce:	dd1e      	ble.n	802a40e <_dtoa_r+0x86e>
 802a3d0:	f1bb 0f00 	cmp.w	fp, #0
 802a3d4:	f47f aeb7 	bne.w	802a146 <_dtoa_r+0x5a6>
 802a3d8:	4621      	mov	r1, r4
 802a3da:	465b      	mov	r3, fp
 802a3dc:	2205      	movs	r2, #5
 802a3de:	4648      	mov	r0, r9
 802a3e0:	f000 fd2c 	bl	802ae3c <__multadd>
 802a3e4:	4601      	mov	r1, r0
 802a3e6:	4604      	mov	r4, r0
 802a3e8:	9801      	ldr	r0, [sp, #4]
 802a3ea:	f000 ff89 	bl	802b300 <__mcmp>
 802a3ee:	2800      	cmp	r0, #0
 802a3f0:	f77f aea9 	ble.w	802a146 <_dtoa_r+0x5a6>
 802a3f4:	463e      	mov	r6, r7
 802a3f6:	2331      	movs	r3, #49	@ 0x31
 802a3f8:	f806 3b01 	strb.w	r3, [r6], #1
 802a3fc:	9b04      	ldr	r3, [sp, #16]
 802a3fe:	3301      	adds	r3, #1
 802a400:	9304      	str	r3, [sp, #16]
 802a402:	e6a4      	b.n	802a14e <_dtoa_r+0x5ae>
 802a404:	f8cd 8010 	str.w	r8, [sp, #16]
 802a408:	4654      	mov	r4, sl
 802a40a:	4625      	mov	r5, r4
 802a40c:	e7f2      	b.n	802a3f4 <_dtoa_r+0x854>
 802a40e:	9b08      	ldr	r3, [sp, #32]
 802a410:	2b00      	cmp	r3, #0
 802a412:	f000 8103 	beq.w	802a61c <_dtoa_r+0xa7c>
 802a416:	2e00      	cmp	r6, #0
 802a418:	dd05      	ble.n	802a426 <_dtoa_r+0x886>
 802a41a:	4629      	mov	r1, r5
 802a41c:	4632      	mov	r2, r6
 802a41e:	4648      	mov	r0, r9
 802a420:	f000 ff02 	bl	802b228 <__lshift>
 802a424:	4605      	mov	r5, r0
 802a426:	9b0b      	ldr	r3, [sp, #44]	@ 0x2c
 802a428:	2b00      	cmp	r3, #0
 802a42a:	d058      	beq.n	802a4de <_dtoa_r+0x93e>
 802a42c:	6869      	ldr	r1, [r5, #4]
 802a42e:	4648      	mov	r0, r9
 802a430:	f000 fca2 	bl	802ad78 <_Balloc>
 802a434:	4606      	mov	r6, r0
 802a436:	b928      	cbnz	r0, 802a444 <_dtoa_r+0x8a4>
 802a438:	4b82      	ldr	r3, [pc, #520]	@ (802a644 <_dtoa_r+0xaa4>)
 802a43a:	4602      	mov	r2, r0
 802a43c:	f240 21ef 	movw	r1, #751	@ 0x2ef
 802a440:	f7ff bbc7 	b.w	8029bd2 <_dtoa_r+0x32>
 802a444:	692a      	ldr	r2, [r5, #16]
 802a446:	3202      	adds	r2, #2
 802a448:	0092      	lsls	r2, r2, #2
 802a44a:	f105 010c 	add.w	r1, r5, #12
 802a44e:	300c      	adds	r0, #12
 802a450:	f7ff fae5 	bl	8029a1e <memcpy>
 802a454:	2201      	movs	r2, #1
 802a456:	4631      	mov	r1, r6
 802a458:	4648      	mov	r0, r9
 802a45a:	f000 fee5 	bl	802b228 <__lshift>
 802a45e:	1c7b      	adds	r3, r7, #1
 802a460:	9305      	str	r3, [sp, #20]
 802a462:	eb07 030b 	add.w	r3, r7, fp
 802a466:	9309      	str	r3, [sp, #36]	@ 0x24
 802a468:	9b02      	ldr	r3, [sp, #8]
 802a46a:	f003 0301 	and.w	r3, r3, #1
 802a46e:	46a8      	mov	r8, r5
 802a470:	9308      	str	r3, [sp, #32]
 802a472:	4605      	mov	r5, r0
 802a474:	9b05      	ldr	r3, [sp, #20]
 802a476:	9801      	ldr	r0, [sp, #4]
 802a478:	4621      	mov	r1, r4
 802a47a:	f103 3bff 	add.w	fp, r3, #4294967295	@ 0xffffffff
 802a47e:	f7ff fb05 	bl	8029a8c <quorem>
 802a482:	4641      	mov	r1, r8
 802a484:	9002      	str	r0, [sp, #8]
 802a486:	f100 0a30 	add.w	sl, r0, #48	@ 0x30
 802a48a:	9801      	ldr	r0, [sp, #4]
 802a48c:	f000 ff38 	bl	802b300 <__mcmp>
 802a490:	462a      	mov	r2, r5
 802a492:	9006      	str	r0, [sp, #24]
 802a494:	4621      	mov	r1, r4
 802a496:	4648      	mov	r0, r9
 802a498:	f000 ff4e 	bl	802b338 <__mdiff>
 802a49c:	68c2      	ldr	r2, [r0, #12]
 802a49e:	4606      	mov	r6, r0
 802a4a0:	b9fa      	cbnz	r2, 802a4e2 <_dtoa_r+0x942>
 802a4a2:	4601      	mov	r1, r0
 802a4a4:	9801      	ldr	r0, [sp, #4]
 802a4a6:	f000 ff2b 	bl	802b300 <__mcmp>
 802a4aa:	4602      	mov	r2, r0
 802a4ac:	4631      	mov	r1, r6
 802a4ae:	4648      	mov	r0, r9
 802a4b0:	920a      	str	r2, [sp, #40]	@ 0x28
 802a4b2:	f000 fca1 	bl	802adf8 <_Bfree>
 802a4b6:	9b07      	ldr	r3, [sp, #28]
 802a4b8:	9a0a      	ldr	r2, [sp, #40]	@ 0x28
 802a4ba:	9e05      	ldr	r6, [sp, #20]
 802a4bc:	ea43 0102 	orr.w	r1, r3, r2
 802a4c0:	9b08      	ldr	r3, [sp, #32]
 802a4c2:	4319      	orrs	r1, r3
 802a4c4:	d10f      	bne.n	802a4e6 <_dtoa_r+0x946>
 802a4c6:	f1ba 0f39 	cmp.w	sl, #57	@ 0x39
 802a4ca:	d028      	beq.n	802a51e <_dtoa_r+0x97e>
 802a4cc:	9b06      	ldr	r3, [sp, #24]
 802a4ce:	2b00      	cmp	r3, #0
 802a4d0:	dd02      	ble.n	802a4d8 <_dtoa_r+0x938>
 802a4d2:	9b02      	ldr	r3, [sp, #8]
 802a4d4:	f103 0a31 	add.w	sl, r3, #49	@ 0x31
 802a4d8:	f88b a000 	strb.w	sl, [fp]
 802a4dc:	e639      	b.n	802a152 <_dtoa_r+0x5b2>
 802a4de:	4628      	mov	r0, r5
 802a4e0:	e7bd      	b.n	802a45e <_dtoa_r+0x8be>
 802a4e2:	2201      	movs	r2, #1
 802a4e4:	e7e2      	b.n	802a4ac <_dtoa_r+0x90c>
 802a4e6:	9b06      	ldr	r3, [sp, #24]
 802a4e8:	2b00      	cmp	r3, #0
 802a4ea:	db04      	blt.n	802a4f6 <_dtoa_r+0x956>
 802a4ec:	9907      	ldr	r1, [sp, #28]
 802a4ee:	430b      	orrs	r3, r1
 802a4f0:	9908      	ldr	r1, [sp, #32]
 802a4f2:	430b      	orrs	r3, r1
 802a4f4:	d120      	bne.n	802a538 <_dtoa_r+0x998>
 802a4f6:	2a00      	cmp	r2, #0
 802a4f8:	ddee      	ble.n	802a4d8 <_dtoa_r+0x938>
 802a4fa:	9901      	ldr	r1, [sp, #4]
 802a4fc:	2201      	movs	r2, #1
 802a4fe:	4648      	mov	r0, r9
 802a500:	f000 fe92 	bl	802b228 <__lshift>
 802a504:	4621      	mov	r1, r4
 802a506:	9001      	str	r0, [sp, #4]
 802a508:	f000 fefa 	bl	802b300 <__mcmp>
 802a50c:	2800      	cmp	r0, #0
 802a50e:	dc03      	bgt.n	802a518 <_dtoa_r+0x978>
 802a510:	d1e2      	bne.n	802a4d8 <_dtoa_r+0x938>
 802a512:	f01a 0f01 	tst.w	sl, #1
 802a516:	d0df      	beq.n	802a4d8 <_dtoa_r+0x938>
 802a518:	f1ba 0f39 	cmp.w	sl, #57	@ 0x39
 802a51c:	d1d9      	bne.n	802a4d2 <_dtoa_r+0x932>
 802a51e:	2339      	movs	r3, #57	@ 0x39
 802a520:	f88b 3000 	strb.w	r3, [fp]
 802a524:	4633      	mov	r3, r6
 802a526:	461e      	mov	r6, r3
 802a528:	3b01      	subs	r3, #1
 802a52a:	f816 2c01 	ldrb.w	r2, [r6, #-1]
 802a52e:	2a39      	cmp	r2, #57	@ 0x39
 802a530:	d053      	beq.n	802a5da <_dtoa_r+0xa3a>
 802a532:	3201      	adds	r2, #1
 802a534:	701a      	strb	r2, [r3, #0]
 802a536:	e60c      	b.n	802a152 <_dtoa_r+0x5b2>
 802a538:	2a00      	cmp	r2, #0
 802a53a:	dd07      	ble.n	802a54c <_dtoa_r+0x9ac>
 802a53c:	f1ba 0f39 	cmp.w	sl, #57	@ 0x39
 802a540:	d0ed      	beq.n	802a51e <_dtoa_r+0x97e>
 802a542:	f10a 0301 	add.w	r3, sl, #1
 802a546:	f88b 3000 	strb.w	r3, [fp]
 802a54a:	e602      	b.n	802a152 <_dtoa_r+0x5b2>
 802a54c:	9b05      	ldr	r3, [sp, #20]
 802a54e:	9a05      	ldr	r2, [sp, #20]
 802a550:	f803 ac01 	strb.w	sl, [r3, #-1]
 802a554:	9b09      	ldr	r3, [sp, #36]	@ 0x24
 802a556:	4293      	cmp	r3, r2
 802a558:	d029      	beq.n	802a5ae <_dtoa_r+0xa0e>
 802a55a:	9901      	ldr	r1, [sp, #4]
 802a55c:	2300      	movs	r3, #0
 802a55e:	220a      	movs	r2, #10
 802a560:	4648      	mov	r0, r9
 802a562:	f000 fc6b 	bl	802ae3c <__multadd>
 802a566:	45a8      	cmp	r8, r5
 802a568:	9001      	str	r0, [sp, #4]
 802a56a:	f04f 0300 	mov.w	r3, #0
 802a56e:	f04f 020a 	mov.w	r2, #10
 802a572:	4641      	mov	r1, r8
 802a574:	4648      	mov	r0, r9
 802a576:	d107      	bne.n	802a588 <_dtoa_r+0x9e8>
 802a578:	f000 fc60 	bl	802ae3c <__multadd>
 802a57c:	4680      	mov	r8, r0
 802a57e:	4605      	mov	r5, r0
 802a580:	9b05      	ldr	r3, [sp, #20]
 802a582:	3301      	adds	r3, #1
 802a584:	9305      	str	r3, [sp, #20]
 802a586:	e775      	b.n	802a474 <_dtoa_r+0x8d4>
 802a588:	f000 fc58 	bl	802ae3c <__multadd>
 802a58c:	4629      	mov	r1, r5
 802a58e:	4680      	mov	r8, r0
 802a590:	2300      	movs	r3, #0
 802a592:	220a      	movs	r2, #10
 802a594:	4648      	mov	r0, r9
 802a596:	f000 fc51 	bl	802ae3c <__multadd>
 802a59a:	4605      	mov	r5, r0
 802a59c:	e7f0      	b.n	802a580 <_dtoa_r+0x9e0>
 802a59e:	f1bb 0f00 	cmp.w	fp, #0
 802a5a2:	bfcc      	ite	gt
 802a5a4:	465e      	movgt	r6, fp
 802a5a6:	2601      	movle	r6, #1
 802a5a8:	443e      	add	r6, r7
 802a5aa:	f04f 0800 	mov.w	r8, #0
 802a5ae:	9901      	ldr	r1, [sp, #4]
 802a5b0:	2201      	movs	r2, #1
 802a5b2:	4648      	mov	r0, r9
 802a5b4:	f000 fe38 	bl	802b228 <__lshift>
 802a5b8:	4621      	mov	r1, r4
 802a5ba:	9001      	str	r0, [sp, #4]
 802a5bc:	f000 fea0 	bl	802b300 <__mcmp>
 802a5c0:	2800      	cmp	r0, #0
 802a5c2:	dcaf      	bgt.n	802a524 <_dtoa_r+0x984>
 802a5c4:	d102      	bne.n	802a5cc <_dtoa_r+0xa2c>
 802a5c6:	f01a 0f01 	tst.w	sl, #1
 802a5ca:	d1ab      	bne.n	802a524 <_dtoa_r+0x984>
 802a5cc:	4633      	mov	r3, r6
 802a5ce:	461e      	mov	r6, r3
 802a5d0:	f813 2d01 	ldrb.w	r2, [r3, #-1]!
 802a5d4:	2a30      	cmp	r2, #48	@ 0x30
 802a5d6:	d0fa      	beq.n	802a5ce <_dtoa_r+0xa2e>
 802a5d8:	e5bb      	b.n	802a152 <_dtoa_r+0x5b2>
 802a5da:	429f      	cmp	r7, r3
 802a5dc:	d1a3      	bne.n	802a526 <_dtoa_r+0x986>
 802a5de:	9b04      	ldr	r3, [sp, #16]
 802a5e0:	3301      	adds	r3, #1
 802a5e2:	9304      	str	r3, [sp, #16]
 802a5e4:	2331      	movs	r3, #49	@ 0x31
 802a5e6:	703b      	strb	r3, [r7, #0]
 802a5e8:	e5b3      	b.n	802a152 <_dtoa_r+0x5b2>
 802a5ea:	9b1d      	ldr	r3, [sp, #116]	@ 0x74
 802a5ec:	4f16      	ldr	r7, [pc, #88]	@ (802a648 <_dtoa_r+0xaa8>)
 802a5ee:	b11b      	cbz	r3, 802a5f8 <_dtoa_r+0xa58>
 802a5f0:	f107 0308 	add.w	r3, r7, #8
 802a5f4:	9a1d      	ldr	r2, [sp, #116]	@ 0x74
 802a5f6:	6013      	str	r3, [r2, #0]
 802a5f8:	4638      	mov	r0, r7
 802a5fa:	b011      	add	sp, #68	@ 0x44
 802a5fc:	ecbd 8b02 	vpop	{d8}
 802a600:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 802a604:	9b07      	ldr	r3, [sp, #28]
 802a606:	2b01      	cmp	r3, #1
 802a608:	f77f ae36 	ble.w	802a278 <_dtoa_r+0x6d8>
 802a60c:	9b0a      	ldr	r3, [sp, #40]	@ 0x28
 802a60e:	930b      	str	r3, [sp, #44]	@ 0x2c
 802a610:	2001      	movs	r0, #1
 802a612:	e656      	b.n	802a2c2 <_dtoa_r+0x722>
 802a614:	f1bb 0f00 	cmp.w	fp, #0
 802a618:	f77f aed7 	ble.w	802a3ca <_dtoa_r+0x82a>
 802a61c:	463e      	mov	r6, r7
 802a61e:	9801      	ldr	r0, [sp, #4]
 802a620:	4621      	mov	r1, r4
 802a622:	f7ff fa33 	bl	8029a8c <quorem>
 802a626:	f100 0a30 	add.w	sl, r0, #48	@ 0x30
 802a62a:	f806 ab01 	strb.w	sl, [r6], #1
 802a62e:	1bf2      	subs	r2, r6, r7
 802a630:	4593      	cmp	fp, r2
 802a632:	ddb4      	ble.n	802a59e <_dtoa_r+0x9fe>
 802a634:	9901      	ldr	r1, [sp, #4]
 802a636:	2300      	movs	r3, #0
 802a638:	220a      	movs	r2, #10
 802a63a:	4648      	mov	r0, r9
 802a63c:	f000 fbfe 	bl	802ae3c <__multadd>
 802a640:	9001      	str	r0, [sp, #4]
 802a642:	e7ec      	b.n	802a61e <_dtoa_r+0xa7e>
 802a644:	08030a5e 	.word	0x08030a5e
 802a648:	080309f9 	.word	0x080309f9

0802a64c <_free_r>:
 802a64c:	b538      	push	{r3, r4, r5, lr}
 802a64e:	4605      	mov	r5, r0
 802a650:	2900      	cmp	r1, #0
 802a652:	d041      	beq.n	802a6d8 <_free_r+0x8c>
 802a654:	f851 3c04 	ldr.w	r3, [r1, #-4]
 802a658:	1f0c      	subs	r4, r1, #4
 802a65a:	2b00      	cmp	r3, #0
 802a65c:	bfb8      	it	lt
 802a65e:	18e4      	addlt	r4, r4, r3
 802a660:	f7fd fc1e 	bl	8027ea0 <__malloc_lock>
 802a664:	4a1d      	ldr	r2, [pc, #116]	@ (802a6dc <_free_r+0x90>)
 802a666:	6813      	ldr	r3, [r2, #0]
 802a668:	b933      	cbnz	r3, 802a678 <_free_r+0x2c>
 802a66a:	6063      	str	r3, [r4, #4]
 802a66c:	6014      	str	r4, [r2, #0]
 802a66e:	4628      	mov	r0, r5
 802a670:	e8bd 4038 	ldmia.w	sp!, {r3, r4, r5, lr}
 802a674:	f7fd bc1a 	b.w	8027eac <__malloc_unlock>
 802a678:	42a3      	cmp	r3, r4
 802a67a:	d908      	bls.n	802a68e <_free_r+0x42>
 802a67c:	6820      	ldr	r0, [r4, #0]
 802a67e:	1821      	adds	r1, r4, r0
 802a680:	428b      	cmp	r3, r1
 802a682:	bf01      	itttt	eq
 802a684:	6819      	ldreq	r1, [r3, #0]
 802a686:	685b      	ldreq	r3, [r3, #4]
 802a688:	1809      	addeq	r1, r1, r0
 802a68a:	6021      	streq	r1, [r4, #0]
 802a68c:	e7ed      	b.n	802a66a <_free_r+0x1e>
 802a68e:	461a      	mov	r2, r3
 802a690:	685b      	ldr	r3, [r3, #4]
 802a692:	b10b      	cbz	r3, 802a698 <_free_r+0x4c>
 802a694:	42a3      	cmp	r3, r4
 802a696:	d9fa      	bls.n	802a68e <_free_r+0x42>
 802a698:	6811      	ldr	r1, [r2, #0]
 802a69a:	1850      	adds	r0, r2, r1
 802a69c:	42a0      	cmp	r0, r4
 802a69e:	d10b      	bne.n	802a6b8 <_free_r+0x6c>
 802a6a0:	6820      	ldr	r0, [r4, #0]
 802a6a2:	4401      	add	r1, r0
 802a6a4:	1850      	adds	r0, r2, r1
 802a6a6:	4283      	cmp	r3, r0
 802a6a8:	6011      	str	r1, [r2, #0]
 802a6aa:	d1e0      	bne.n	802a66e <_free_r+0x22>
 802a6ac:	6818      	ldr	r0, [r3, #0]
 802a6ae:	685b      	ldr	r3, [r3, #4]
 802a6b0:	6053      	str	r3, [r2, #4]
 802a6b2:	4408      	add	r0, r1
 802a6b4:	6010      	str	r0, [r2, #0]
 802a6b6:	e7da      	b.n	802a66e <_free_r+0x22>
 802a6b8:	d902      	bls.n	802a6c0 <_free_r+0x74>
 802a6ba:	230c      	movs	r3, #12
 802a6bc:	602b      	str	r3, [r5, #0]
 802a6be:	e7d6      	b.n	802a66e <_free_r+0x22>
 802a6c0:	6820      	ldr	r0, [r4, #0]
 802a6c2:	1821      	adds	r1, r4, r0
 802a6c4:	428b      	cmp	r3, r1
 802a6c6:	bf04      	itt	eq
 802a6c8:	6819      	ldreq	r1, [r3, #0]
 802a6ca:	685b      	ldreq	r3, [r3, #4]
 802a6cc:	6063      	str	r3, [r4, #4]
 802a6ce:	bf04      	itt	eq
 802a6d0:	1809      	addeq	r1, r1, r0
 802a6d2:	6021      	streq	r1, [r4, #0]
 802a6d4:	6054      	str	r4, [r2, #4]
 802a6d6:	e7ca      	b.n	802a66e <_free_r+0x22>
 802a6d8:	bd38      	pop	{r3, r4, r5, pc}
 802a6da:	bf00      	nop
 802a6dc:	2402a1a4 	.word	0x2402a1a4

0802a6e0 <rshift>:
 802a6e0:	6903      	ldr	r3, [r0, #16]
 802a6e2:	ebb3 1f61 	cmp.w	r3, r1, asr #5
 802a6e6:	e92d 43f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, lr}
 802a6ea:	ea4f 1261 	mov.w	r2, r1, asr #5
 802a6ee:	f100 0414 	add.w	r4, r0, #20
 802a6f2:	dd45      	ble.n	802a780 <rshift+0xa0>
 802a6f4:	f011 011f 	ands.w	r1, r1, #31
 802a6f8:	eb04 0683 	add.w	r6, r4, r3, lsl #2
 802a6fc:	eb04 0582 	add.w	r5, r4, r2, lsl #2
 802a700:	d10c      	bne.n	802a71c <rshift+0x3c>
 802a702:	f100 0710 	add.w	r7, r0, #16
 802a706:	4629      	mov	r1, r5
 802a708:	42b1      	cmp	r1, r6
 802a70a:	d334      	bcc.n	802a776 <rshift+0x96>
 802a70c:	1a9b      	subs	r3, r3, r2
 802a70e:	009b      	lsls	r3, r3, #2
 802a710:	1eea      	subs	r2, r5, #3
 802a712:	4296      	cmp	r6, r2
 802a714:	bf38      	it	cc
 802a716:	2300      	movcc	r3, #0
 802a718:	4423      	add	r3, r4
 802a71a:	e015      	b.n	802a748 <rshift+0x68>
 802a71c:	f854 7022 	ldr.w	r7, [r4, r2, lsl #2]
 802a720:	f1c1 0820 	rsb	r8, r1, #32
 802a724:	40cf      	lsrs	r7, r1
 802a726:	f105 0e04 	add.w	lr, r5, #4
 802a72a:	46a1      	mov	r9, r4
 802a72c:	4576      	cmp	r6, lr
 802a72e:	46f4      	mov	ip, lr
 802a730:	d815      	bhi.n	802a75e <rshift+0x7e>
 802a732:	1a9a      	subs	r2, r3, r2
 802a734:	0092      	lsls	r2, r2, #2
 802a736:	3a04      	subs	r2, #4
 802a738:	3501      	adds	r5, #1
 802a73a:	42ae      	cmp	r6, r5
 802a73c:	bf38      	it	cc
 802a73e:	2200      	movcc	r2, #0
 802a740:	18a3      	adds	r3, r4, r2
 802a742:	50a7      	str	r7, [r4, r2]
 802a744:	b107      	cbz	r7, 802a748 <rshift+0x68>
 802a746:	3304      	adds	r3, #4
 802a748:	1b1a      	subs	r2, r3, r4
 802a74a:	42a3      	cmp	r3, r4
 802a74c:	ea4f 02a2 	mov.w	r2, r2, asr #2
 802a750:	bf08      	it	eq
 802a752:	2300      	moveq	r3, #0
 802a754:	6102      	str	r2, [r0, #16]
 802a756:	bf08      	it	eq
 802a758:	6143      	streq	r3, [r0, #20]
 802a75a:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
 802a75e:	f8dc c000 	ldr.w	ip, [ip]
 802a762:	fa0c fc08 	lsl.w	ip, ip, r8
 802a766:	ea4c 0707 	orr.w	r7, ip, r7
 802a76a:	f849 7b04 	str.w	r7, [r9], #4
 802a76e:	f85e 7b04 	ldr.w	r7, [lr], #4
 802a772:	40cf      	lsrs	r7, r1
 802a774:	e7da      	b.n	802a72c <rshift+0x4c>
 802a776:	f851 cb04 	ldr.w	ip, [r1], #4
 802a77a:	f847 cf04 	str.w	ip, [r7, #4]!
 802a77e:	e7c3      	b.n	802a708 <rshift+0x28>
 802a780:	4623      	mov	r3, r4
 802a782:	e7e1      	b.n	802a748 <rshift+0x68>

0802a784 <__hexdig_fun>:
 802a784:	f1a0 0330 	sub.w	r3, r0, #48	@ 0x30
 802a788:	2b09      	cmp	r3, #9
 802a78a:	d802      	bhi.n	802a792 <__hexdig_fun+0xe>
 802a78c:	3820      	subs	r0, #32
 802a78e:	b2c0      	uxtb	r0, r0
 802a790:	4770      	bx	lr
 802a792:	f1a0 0361 	sub.w	r3, r0, #97	@ 0x61
 802a796:	2b05      	cmp	r3, #5
 802a798:	d801      	bhi.n	802a79e <__hexdig_fun+0x1a>
 802a79a:	3847      	subs	r0, #71	@ 0x47
 802a79c:	e7f7      	b.n	802a78e <__hexdig_fun+0xa>
 802a79e:	f1a0 0341 	sub.w	r3, r0, #65	@ 0x41
 802a7a2:	2b05      	cmp	r3, #5
 802a7a4:	d801      	bhi.n	802a7aa <__hexdig_fun+0x26>
 802a7a6:	3827      	subs	r0, #39	@ 0x27
 802a7a8:	e7f1      	b.n	802a78e <__hexdig_fun+0xa>
 802a7aa:	2000      	movs	r0, #0
 802a7ac:	4770      	bx	lr
	...

0802a7b0 <__gethex>:
 802a7b0:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 802a7b4:	b085      	sub	sp, #20
 802a7b6:	468a      	mov	sl, r1
 802a7b8:	9302      	str	r3, [sp, #8]
 802a7ba:	680b      	ldr	r3, [r1, #0]
 802a7bc:	9001      	str	r0, [sp, #4]
 802a7be:	4690      	mov	r8, r2
 802a7c0:	1c9c      	adds	r4, r3, #2
 802a7c2:	46a1      	mov	r9, r4
 802a7c4:	f814 0b01 	ldrb.w	r0, [r4], #1
 802a7c8:	2830      	cmp	r0, #48	@ 0x30
 802a7ca:	d0fa      	beq.n	802a7c2 <__gethex+0x12>
 802a7cc:	eba9 0303 	sub.w	r3, r9, r3
 802a7d0:	f1a3 0b02 	sub.w	fp, r3, #2
 802a7d4:	f7ff ffd6 	bl	802a784 <__hexdig_fun>
 802a7d8:	4605      	mov	r5, r0
 802a7da:	2800      	cmp	r0, #0
 802a7dc:	d168      	bne.n	802a8b0 <__gethex+0x100>
 802a7de:	49a0      	ldr	r1, [pc, #640]	@ (802aa60 <__gethex+0x2b0>)
 802a7e0:	2201      	movs	r2, #1
 802a7e2:	4648      	mov	r0, r9
 802a7e4:	f7ff f82c 	bl	8029840 <strncmp>
 802a7e8:	4607      	mov	r7, r0
 802a7ea:	2800      	cmp	r0, #0
 802a7ec:	d167      	bne.n	802a8be <__gethex+0x10e>
 802a7ee:	f899 0001 	ldrb.w	r0, [r9, #1]
 802a7f2:	4626      	mov	r6, r4
 802a7f4:	f7ff ffc6 	bl	802a784 <__hexdig_fun>
 802a7f8:	2800      	cmp	r0, #0
 802a7fa:	d062      	beq.n	802a8c2 <__gethex+0x112>
 802a7fc:	4623      	mov	r3, r4
 802a7fe:	7818      	ldrb	r0, [r3, #0]
 802a800:	2830      	cmp	r0, #48	@ 0x30
 802a802:	4699      	mov	r9, r3
 802a804:	f103 0301 	add.w	r3, r3, #1
 802a808:	d0f9      	beq.n	802a7fe <__gethex+0x4e>
 802a80a:	f7ff ffbb 	bl	802a784 <__hexdig_fun>
 802a80e:	fab0 f580 	clz	r5, r0
 802a812:	096d      	lsrs	r5, r5, #5
 802a814:	f04f 0b01 	mov.w	fp, #1
 802a818:	464a      	mov	r2, r9
 802a81a:	4616      	mov	r6, r2
 802a81c:	3201      	adds	r2, #1
 802a81e:	7830      	ldrb	r0, [r6, #0]
 802a820:	f7ff ffb0 	bl	802a784 <__hexdig_fun>
 802a824:	2800      	cmp	r0, #0
 802a826:	d1f8      	bne.n	802a81a <__gethex+0x6a>
 802a828:	498d      	ldr	r1, [pc, #564]	@ (802aa60 <__gethex+0x2b0>)
 802a82a:	2201      	movs	r2, #1
 802a82c:	4630      	mov	r0, r6
 802a82e:	f7ff f807 	bl	8029840 <strncmp>
 802a832:	2800      	cmp	r0, #0
 802a834:	d13f      	bne.n	802a8b6 <__gethex+0x106>
 802a836:	b944      	cbnz	r4, 802a84a <__gethex+0x9a>
 802a838:	1c74      	adds	r4, r6, #1
 802a83a:	4622      	mov	r2, r4
 802a83c:	4616      	mov	r6, r2
 802a83e:	3201      	adds	r2, #1
 802a840:	7830      	ldrb	r0, [r6, #0]
 802a842:	f7ff ff9f 	bl	802a784 <__hexdig_fun>
 802a846:	2800      	cmp	r0, #0
 802a848:	d1f8      	bne.n	802a83c <__gethex+0x8c>
 802a84a:	1ba4      	subs	r4, r4, r6
 802a84c:	00a7      	lsls	r7, r4, #2
 802a84e:	7833      	ldrb	r3, [r6, #0]
 802a850:	f003 03df 	and.w	r3, r3, #223	@ 0xdf
 802a854:	2b50      	cmp	r3, #80	@ 0x50
 802a856:	d13e      	bne.n	802a8d6 <__gethex+0x126>
 802a858:	7873      	ldrb	r3, [r6, #1]
 802a85a:	2b2b      	cmp	r3, #43	@ 0x2b
 802a85c:	d033      	beq.n	802a8c6 <__gethex+0x116>
 802a85e:	2b2d      	cmp	r3, #45	@ 0x2d
 802a860:	d034      	beq.n	802a8cc <__gethex+0x11c>
 802a862:	1c71      	adds	r1, r6, #1
 802a864:	2400      	movs	r4, #0
 802a866:	7808      	ldrb	r0, [r1, #0]
 802a868:	f7ff ff8c 	bl	802a784 <__hexdig_fun>
 802a86c:	1e43      	subs	r3, r0, #1
 802a86e:	b2db      	uxtb	r3, r3
 802a870:	2b18      	cmp	r3, #24
 802a872:	d830      	bhi.n	802a8d6 <__gethex+0x126>
 802a874:	f1a0 0210 	sub.w	r2, r0, #16
 802a878:	f811 0f01 	ldrb.w	r0, [r1, #1]!
 802a87c:	f7ff ff82 	bl	802a784 <__hexdig_fun>
 802a880:	f100 3cff 	add.w	ip, r0, #4294967295	@ 0xffffffff
 802a884:	fa5f fc8c 	uxtb.w	ip, ip
 802a888:	f1bc 0f18 	cmp.w	ip, #24
 802a88c:	f04f 030a 	mov.w	r3, #10
 802a890:	d91e      	bls.n	802a8d0 <__gethex+0x120>
 802a892:	b104      	cbz	r4, 802a896 <__gethex+0xe6>
 802a894:	4252      	negs	r2, r2
 802a896:	4417      	add	r7, r2
 802a898:	f8ca 1000 	str.w	r1, [sl]
 802a89c:	b1ed      	cbz	r5, 802a8da <__gethex+0x12a>
 802a89e:	f1bb 0f00 	cmp.w	fp, #0
 802a8a2:	bf0c      	ite	eq
 802a8a4:	2506      	moveq	r5, #6
 802a8a6:	2500      	movne	r5, #0
 802a8a8:	4628      	mov	r0, r5
 802a8aa:	b005      	add	sp, #20
 802a8ac:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 802a8b0:	2500      	movs	r5, #0
 802a8b2:	462c      	mov	r4, r5
 802a8b4:	e7b0      	b.n	802a818 <__gethex+0x68>
 802a8b6:	2c00      	cmp	r4, #0
 802a8b8:	d1c7      	bne.n	802a84a <__gethex+0x9a>
 802a8ba:	4627      	mov	r7, r4
 802a8bc:	e7c7      	b.n	802a84e <__gethex+0x9e>
 802a8be:	464e      	mov	r6, r9
 802a8c0:	462f      	mov	r7, r5
 802a8c2:	2501      	movs	r5, #1
 802a8c4:	e7c3      	b.n	802a84e <__gethex+0x9e>
 802a8c6:	2400      	movs	r4, #0
 802a8c8:	1cb1      	adds	r1, r6, #2
 802a8ca:	e7cc      	b.n	802a866 <__gethex+0xb6>
 802a8cc:	2401      	movs	r4, #1
 802a8ce:	e7fb      	b.n	802a8c8 <__gethex+0x118>
 802a8d0:	fb03 0002 	mla	r0, r3, r2, r0
 802a8d4:	e7ce      	b.n	802a874 <__gethex+0xc4>
 802a8d6:	4631      	mov	r1, r6
 802a8d8:	e7de      	b.n	802a898 <__gethex+0xe8>
 802a8da:	eba6 0309 	sub.w	r3, r6, r9
 802a8de:	3b01      	subs	r3, #1
 802a8e0:	4629      	mov	r1, r5
 802a8e2:	2b07      	cmp	r3, #7
 802a8e4:	dc0a      	bgt.n	802a8fc <__gethex+0x14c>
 802a8e6:	9801      	ldr	r0, [sp, #4]
 802a8e8:	f000 fa46 	bl	802ad78 <_Balloc>
 802a8ec:	4604      	mov	r4, r0
 802a8ee:	b940      	cbnz	r0, 802a902 <__gethex+0x152>
 802a8f0:	4b5c      	ldr	r3, [pc, #368]	@ (802aa64 <__gethex+0x2b4>)
 802a8f2:	4602      	mov	r2, r0
 802a8f4:	21e4      	movs	r1, #228	@ 0xe4
 802a8f6:	485c      	ldr	r0, [pc, #368]	@ (802aa68 <__gethex+0x2b8>)
 802a8f8:	f7ff f8aa 	bl	8029a50 <__assert_func>
 802a8fc:	3101      	adds	r1, #1
 802a8fe:	105b      	asrs	r3, r3, #1
 802a900:	e7ef      	b.n	802a8e2 <__gethex+0x132>
 802a902:	f100 0a14 	add.w	sl, r0, #20
 802a906:	2300      	movs	r3, #0
 802a908:	4655      	mov	r5, sl
 802a90a:	469b      	mov	fp, r3
 802a90c:	45b1      	cmp	r9, r6
 802a90e:	d337      	bcc.n	802a980 <__gethex+0x1d0>
 802a910:	f845 bb04 	str.w	fp, [r5], #4
 802a914:	eba5 050a 	sub.w	r5, r5, sl
 802a918:	10ad      	asrs	r5, r5, #2
 802a91a:	6125      	str	r5, [r4, #16]
 802a91c:	4658      	mov	r0, fp
 802a91e:	f000 fb1d 	bl	802af5c <__hi0bits>
 802a922:	016d      	lsls	r5, r5, #5
 802a924:	f8d8 6000 	ldr.w	r6, [r8]
 802a928:	1a2d      	subs	r5, r5, r0
 802a92a:	42b5      	cmp	r5, r6
 802a92c:	dd54      	ble.n	802a9d8 <__gethex+0x228>
 802a92e:	1bad      	subs	r5, r5, r6
 802a930:	4629      	mov	r1, r5
 802a932:	4620      	mov	r0, r4
 802a934:	f000 feae 	bl	802b694 <__any_on>
 802a938:	4681      	mov	r9, r0
 802a93a:	b178      	cbz	r0, 802a95c <__gethex+0x1ac>
 802a93c:	1e6b      	subs	r3, r5, #1
 802a93e:	1159      	asrs	r1, r3, #5
 802a940:	f003 021f 	and.w	r2, r3, #31
 802a944:	f85a 1021 	ldr.w	r1, [sl, r1, lsl #2]
 802a948:	f04f 0901 	mov.w	r9, #1
 802a94c:	fa09 f202 	lsl.w	r2, r9, r2
 802a950:	420a      	tst	r2, r1
 802a952:	d003      	beq.n	802a95c <__gethex+0x1ac>
 802a954:	454b      	cmp	r3, r9
 802a956:	dc36      	bgt.n	802a9c6 <__gethex+0x216>
 802a958:	f04f 0902 	mov.w	r9, #2
 802a95c:	4629      	mov	r1, r5
 802a95e:	4620      	mov	r0, r4
 802a960:	f7ff febe 	bl	802a6e0 <rshift>
 802a964:	442f      	add	r7, r5
 802a966:	f8d8 3008 	ldr.w	r3, [r8, #8]
 802a96a:	42bb      	cmp	r3, r7
 802a96c:	da42      	bge.n	802a9f4 <__gethex+0x244>
 802a96e:	9801      	ldr	r0, [sp, #4]
 802a970:	4621      	mov	r1, r4
 802a972:	f000 fa41 	bl	802adf8 <_Bfree>
 802a976:	9a0e      	ldr	r2, [sp, #56]	@ 0x38
 802a978:	2300      	movs	r3, #0
 802a97a:	6013      	str	r3, [r2, #0]
 802a97c:	25a3      	movs	r5, #163	@ 0xa3
 802a97e:	e793      	b.n	802a8a8 <__gethex+0xf8>
 802a980:	f816 2d01 	ldrb.w	r2, [r6, #-1]!
 802a984:	2a2e      	cmp	r2, #46	@ 0x2e
 802a986:	d012      	beq.n	802a9ae <__gethex+0x1fe>
 802a988:	2b20      	cmp	r3, #32
 802a98a:	d104      	bne.n	802a996 <__gethex+0x1e6>
 802a98c:	f845 bb04 	str.w	fp, [r5], #4
 802a990:	f04f 0b00 	mov.w	fp, #0
 802a994:	465b      	mov	r3, fp
 802a996:	7830      	ldrb	r0, [r6, #0]
 802a998:	9303      	str	r3, [sp, #12]
 802a99a:	f7ff fef3 	bl	802a784 <__hexdig_fun>
 802a99e:	9b03      	ldr	r3, [sp, #12]
 802a9a0:	f000 000f 	and.w	r0, r0, #15
 802a9a4:	4098      	lsls	r0, r3
 802a9a6:	ea4b 0b00 	orr.w	fp, fp, r0
 802a9aa:	3304      	adds	r3, #4
 802a9ac:	e7ae      	b.n	802a90c <__gethex+0x15c>
 802a9ae:	45b1      	cmp	r9, r6
 802a9b0:	d8ea      	bhi.n	802a988 <__gethex+0x1d8>
 802a9b2:	492b      	ldr	r1, [pc, #172]	@ (802aa60 <__gethex+0x2b0>)
 802a9b4:	9303      	str	r3, [sp, #12]
 802a9b6:	2201      	movs	r2, #1
 802a9b8:	4630      	mov	r0, r6
 802a9ba:	f7fe ff41 	bl	8029840 <strncmp>
 802a9be:	9b03      	ldr	r3, [sp, #12]
 802a9c0:	2800      	cmp	r0, #0
 802a9c2:	d1e1      	bne.n	802a988 <__gethex+0x1d8>
 802a9c4:	e7a2      	b.n	802a90c <__gethex+0x15c>
 802a9c6:	1ea9      	subs	r1, r5, #2
 802a9c8:	4620      	mov	r0, r4
 802a9ca:	f000 fe63 	bl	802b694 <__any_on>
 802a9ce:	2800      	cmp	r0, #0
 802a9d0:	d0c2      	beq.n	802a958 <__gethex+0x1a8>
 802a9d2:	f04f 0903 	mov.w	r9, #3
 802a9d6:	e7c1      	b.n	802a95c <__gethex+0x1ac>
 802a9d8:	da09      	bge.n	802a9ee <__gethex+0x23e>
 802a9da:	1b75      	subs	r5, r6, r5
 802a9dc:	4621      	mov	r1, r4
 802a9de:	9801      	ldr	r0, [sp, #4]
 802a9e0:	462a      	mov	r2, r5
 802a9e2:	f000 fc21 	bl	802b228 <__lshift>
 802a9e6:	1b7f      	subs	r7, r7, r5
 802a9e8:	4604      	mov	r4, r0
 802a9ea:	f100 0a14 	add.w	sl, r0, #20
 802a9ee:	f04f 0900 	mov.w	r9, #0
 802a9f2:	e7b8      	b.n	802a966 <__gethex+0x1b6>
 802a9f4:	f8d8 5004 	ldr.w	r5, [r8, #4]
 802a9f8:	42bd      	cmp	r5, r7
 802a9fa:	dd6f      	ble.n	802aadc <__gethex+0x32c>
 802a9fc:	1bed      	subs	r5, r5, r7
 802a9fe:	42ae      	cmp	r6, r5
 802aa00:	dc34      	bgt.n	802aa6c <__gethex+0x2bc>
 802aa02:	f8d8 300c 	ldr.w	r3, [r8, #12]
 802aa06:	2b02      	cmp	r3, #2
 802aa08:	d022      	beq.n	802aa50 <__gethex+0x2a0>
 802aa0a:	2b03      	cmp	r3, #3
 802aa0c:	d024      	beq.n	802aa58 <__gethex+0x2a8>
 802aa0e:	2b01      	cmp	r3, #1
 802aa10:	d115      	bne.n	802aa3e <__gethex+0x28e>
 802aa12:	42ae      	cmp	r6, r5
 802aa14:	d113      	bne.n	802aa3e <__gethex+0x28e>
 802aa16:	2e01      	cmp	r6, #1
 802aa18:	d10b      	bne.n	802aa32 <__gethex+0x282>
 802aa1a:	9a02      	ldr	r2, [sp, #8]
 802aa1c:	f8d8 3004 	ldr.w	r3, [r8, #4]
 802aa20:	6013      	str	r3, [r2, #0]
 802aa22:	2301      	movs	r3, #1
 802aa24:	6123      	str	r3, [r4, #16]
 802aa26:	f8ca 3000 	str.w	r3, [sl]
 802aa2a:	9b0e      	ldr	r3, [sp, #56]	@ 0x38
 802aa2c:	2562      	movs	r5, #98	@ 0x62
 802aa2e:	601c      	str	r4, [r3, #0]
 802aa30:	e73a      	b.n	802a8a8 <__gethex+0xf8>
 802aa32:	1e71      	subs	r1, r6, #1
 802aa34:	4620      	mov	r0, r4
 802aa36:	f000 fe2d 	bl	802b694 <__any_on>
 802aa3a:	2800      	cmp	r0, #0
 802aa3c:	d1ed      	bne.n	802aa1a <__gethex+0x26a>
 802aa3e:	9801      	ldr	r0, [sp, #4]
 802aa40:	4621      	mov	r1, r4
 802aa42:	f000 f9d9 	bl	802adf8 <_Bfree>
 802aa46:	9a0e      	ldr	r2, [sp, #56]	@ 0x38
 802aa48:	2300      	movs	r3, #0
 802aa4a:	6013      	str	r3, [r2, #0]
 802aa4c:	2550      	movs	r5, #80	@ 0x50
 802aa4e:	e72b      	b.n	802a8a8 <__gethex+0xf8>
 802aa50:	9b0f      	ldr	r3, [sp, #60]	@ 0x3c
 802aa52:	2b00      	cmp	r3, #0
 802aa54:	d1f3      	bne.n	802aa3e <__gethex+0x28e>
 802aa56:	e7e0      	b.n	802aa1a <__gethex+0x26a>
 802aa58:	9b0f      	ldr	r3, [sp, #60]	@ 0x3c
 802aa5a:	2b00      	cmp	r3, #0
 802aa5c:	d1dd      	bne.n	802aa1a <__gethex+0x26a>
 802aa5e:	e7ee      	b.n	802aa3e <__gethex+0x28e>
 802aa60:	08030829 	.word	0x08030829
 802aa64:	08030a5e 	.word	0x08030a5e
 802aa68:	08030a6f 	.word	0x08030a6f
 802aa6c:	1e6f      	subs	r7, r5, #1
 802aa6e:	f1b9 0f00 	cmp.w	r9, #0
 802aa72:	d130      	bne.n	802aad6 <__gethex+0x326>
 802aa74:	b127      	cbz	r7, 802aa80 <__gethex+0x2d0>
 802aa76:	4639      	mov	r1, r7
 802aa78:	4620      	mov	r0, r4
 802aa7a:	f000 fe0b 	bl	802b694 <__any_on>
 802aa7e:	4681      	mov	r9, r0
 802aa80:	117a      	asrs	r2, r7, #5
 802aa82:	2301      	movs	r3, #1
 802aa84:	f85a 2022 	ldr.w	r2, [sl, r2, lsl #2]
 802aa88:	f007 071f 	and.w	r7, r7, #31
 802aa8c:	40bb      	lsls	r3, r7
 802aa8e:	4213      	tst	r3, r2
 802aa90:	4629      	mov	r1, r5
 802aa92:	4620      	mov	r0, r4
 802aa94:	bf18      	it	ne
 802aa96:	f049 0902 	orrne.w	r9, r9, #2
 802aa9a:	f7ff fe21 	bl	802a6e0 <rshift>
 802aa9e:	f8d8 7004 	ldr.w	r7, [r8, #4]
 802aaa2:	1b76      	subs	r6, r6, r5
 802aaa4:	2502      	movs	r5, #2
 802aaa6:	f1b9 0f00 	cmp.w	r9, #0
 802aaaa:	d047      	beq.n	802ab3c <__gethex+0x38c>
 802aaac:	f8d8 300c 	ldr.w	r3, [r8, #12]
 802aab0:	2b02      	cmp	r3, #2
 802aab2:	d015      	beq.n	802aae0 <__gethex+0x330>
 802aab4:	2b03      	cmp	r3, #3
 802aab6:	d017      	beq.n	802aae8 <__gethex+0x338>
 802aab8:	2b01      	cmp	r3, #1
 802aaba:	d109      	bne.n	802aad0 <__gethex+0x320>
 802aabc:	f019 0f02 	tst.w	r9, #2
 802aac0:	d006      	beq.n	802aad0 <__gethex+0x320>
 802aac2:	f8da 3000 	ldr.w	r3, [sl]
 802aac6:	ea49 0903 	orr.w	r9, r9, r3
 802aaca:	f019 0f01 	tst.w	r9, #1
 802aace:	d10e      	bne.n	802aaee <__gethex+0x33e>
 802aad0:	f045 0510 	orr.w	r5, r5, #16
 802aad4:	e032      	b.n	802ab3c <__gethex+0x38c>
 802aad6:	f04f 0901 	mov.w	r9, #1
 802aada:	e7d1      	b.n	802aa80 <__gethex+0x2d0>
 802aadc:	2501      	movs	r5, #1
 802aade:	e7e2      	b.n	802aaa6 <__gethex+0x2f6>
 802aae0:	9b0f      	ldr	r3, [sp, #60]	@ 0x3c
 802aae2:	f1c3 0301 	rsb	r3, r3, #1
 802aae6:	930f      	str	r3, [sp, #60]	@ 0x3c
 802aae8:	9b0f      	ldr	r3, [sp, #60]	@ 0x3c
 802aaea:	2b00      	cmp	r3, #0
 802aaec:	d0f0      	beq.n	802aad0 <__gethex+0x320>
 802aaee:	f8d4 b010 	ldr.w	fp, [r4, #16]
 802aaf2:	f104 0314 	add.w	r3, r4, #20
 802aaf6:	ea4f 0a8b 	mov.w	sl, fp, lsl #2
 802aafa:	eb03 018b 	add.w	r1, r3, fp, lsl #2
 802aafe:	f04f 0c00 	mov.w	ip, #0
 802ab02:	4618      	mov	r0, r3
 802ab04:	f853 2b04 	ldr.w	r2, [r3], #4
 802ab08:	f1b2 3fff 	cmp.w	r2, #4294967295	@ 0xffffffff
 802ab0c:	d01b      	beq.n	802ab46 <__gethex+0x396>
 802ab0e:	3201      	adds	r2, #1
 802ab10:	6002      	str	r2, [r0, #0]
 802ab12:	2d02      	cmp	r5, #2
 802ab14:	f104 0314 	add.w	r3, r4, #20
 802ab18:	d13c      	bne.n	802ab94 <__gethex+0x3e4>
 802ab1a:	f8d8 2000 	ldr.w	r2, [r8]
 802ab1e:	3a01      	subs	r2, #1
 802ab20:	42b2      	cmp	r2, r6
 802ab22:	d109      	bne.n	802ab38 <__gethex+0x388>
 802ab24:	1171      	asrs	r1, r6, #5
 802ab26:	2201      	movs	r2, #1
 802ab28:	f853 3021 	ldr.w	r3, [r3, r1, lsl #2]
 802ab2c:	f006 061f 	and.w	r6, r6, #31
 802ab30:	fa02 f606 	lsl.w	r6, r2, r6
 802ab34:	421e      	tst	r6, r3
 802ab36:	d13a      	bne.n	802abae <__gethex+0x3fe>
 802ab38:	f045 0520 	orr.w	r5, r5, #32
 802ab3c:	9b0e      	ldr	r3, [sp, #56]	@ 0x38
 802ab3e:	601c      	str	r4, [r3, #0]
 802ab40:	9b02      	ldr	r3, [sp, #8]
 802ab42:	601f      	str	r7, [r3, #0]
 802ab44:	e6b0      	b.n	802a8a8 <__gethex+0xf8>
 802ab46:	4299      	cmp	r1, r3
 802ab48:	f843 cc04 	str.w	ip, [r3, #-4]
 802ab4c:	d8d9      	bhi.n	802ab02 <__gethex+0x352>
 802ab4e:	68a3      	ldr	r3, [r4, #8]
 802ab50:	459b      	cmp	fp, r3
 802ab52:	db17      	blt.n	802ab84 <__gethex+0x3d4>
 802ab54:	6861      	ldr	r1, [r4, #4]
 802ab56:	9801      	ldr	r0, [sp, #4]
 802ab58:	3101      	adds	r1, #1
 802ab5a:	f000 f90d 	bl	802ad78 <_Balloc>
 802ab5e:	4681      	mov	r9, r0
 802ab60:	b918      	cbnz	r0, 802ab6a <__gethex+0x3ba>
 802ab62:	4b1a      	ldr	r3, [pc, #104]	@ (802abcc <__gethex+0x41c>)
 802ab64:	4602      	mov	r2, r0
 802ab66:	2184      	movs	r1, #132	@ 0x84
 802ab68:	e6c5      	b.n	802a8f6 <__gethex+0x146>
 802ab6a:	6922      	ldr	r2, [r4, #16]
 802ab6c:	3202      	adds	r2, #2
 802ab6e:	f104 010c 	add.w	r1, r4, #12
 802ab72:	0092      	lsls	r2, r2, #2
 802ab74:	300c      	adds	r0, #12
 802ab76:	f7fe ff52 	bl	8029a1e <memcpy>
 802ab7a:	4621      	mov	r1, r4
 802ab7c:	9801      	ldr	r0, [sp, #4]
 802ab7e:	f000 f93b 	bl	802adf8 <_Bfree>
 802ab82:	464c      	mov	r4, r9
 802ab84:	6923      	ldr	r3, [r4, #16]
 802ab86:	1c5a      	adds	r2, r3, #1
 802ab88:	eb04 0383 	add.w	r3, r4, r3, lsl #2
 802ab8c:	6122      	str	r2, [r4, #16]
 802ab8e:	2201      	movs	r2, #1
 802ab90:	615a      	str	r2, [r3, #20]
 802ab92:	e7be      	b.n	802ab12 <__gethex+0x362>
 802ab94:	6922      	ldr	r2, [r4, #16]
 802ab96:	455a      	cmp	r2, fp
 802ab98:	dd0b      	ble.n	802abb2 <__gethex+0x402>
 802ab9a:	2101      	movs	r1, #1
 802ab9c:	4620      	mov	r0, r4
 802ab9e:	f7ff fd9f 	bl	802a6e0 <rshift>
 802aba2:	f8d8 3008 	ldr.w	r3, [r8, #8]
 802aba6:	3701      	adds	r7, #1
 802aba8:	42bb      	cmp	r3, r7
 802abaa:	f6ff aee0 	blt.w	802a96e <__gethex+0x1be>
 802abae:	2501      	movs	r5, #1
 802abb0:	e7c2      	b.n	802ab38 <__gethex+0x388>
 802abb2:	f016 061f 	ands.w	r6, r6, #31
 802abb6:	d0fa      	beq.n	802abae <__gethex+0x3fe>
 802abb8:	4453      	add	r3, sl
 802abba:	f1c6 0620 	rsb	r6, r6, #32
 802abbe:	f853 0c04 	ldr.w	r0, [r3, #-4]
 802abc2:	f000 f9cb 	bl	802af5c <__hi0bits>
 802abc6:	42b0      	cmp	r0, r6
 802abc8:	dbe7      	blt.n	802ab9a <__gethex+0x3ea>
 802abca:	e7f0      	b.n	802abae <__gethex+0x3fe>
 802abcc:	08030a5e 	.word	0x08030a5e

0802abd0 <L_shift>:
 802abd0:	f1c2 0208 	rsb	r2, r2, #8
 802abd4:	0092      	lsls	r2, r2, #2
 802abd6:	b570      	push	{r4, r5, r6, lr}
 802abd8:	f1c2 0620 	rsb	r6, r2, #32
 802abdc:	6843      	ldr	r3, [r0, #4]
 802abde:	6804      	ldr	r4, [r0, #0]
 802abe0:	fa03 f506 	lsl.w	r5, r3, r6
 802abe4:	432c      	orrs	r4, r5
 802abe6:	40d3      	lsrs	r3, r2
 802abe8:	6004      	str	r4, [r0, #0]
 802abea:	f840 3f04 	str.w	r3, [r0, #4]!
 802abee:	4288      	cmp	r0, r1
 802abf0:	d3f4      	bcc.n	802abdc <L_shift+0xc>
 802abf2:	bd70      	pop	{r4, r5, r6, pc}

0802abf4 <__match>:
 802abf4:	b530      	push	{r4, r5, lr}
 802abf6:	6803      	ldr	r3, [r0, #0]
 802abf8:	3301      	adds	r3, #1
 802abfa:	f811 4b01 	ldrb.w	r4, [r1], #1
 802abfe:	b914      	cbnz	r4, 802ac06 <__match+0x12>
 802ac00:	6003      	str	r3, [r0, #0]
 802ac02:	2001      	movs	r0, #1
 802ac04:	bd30      	pop	{r4, r5, pc}
 802ac06:	f813 2b01 	ldrb.w	r2, [r3], #1
 802ac0a:	f1a2 0541 	sub.w	r5, r2, #65	@ 0x41
 802ac0e:	2d19      	cmp	r5, #25
 802ac10:	bf98      	it	ls
 802ac12:	3220      	addls	r2, #32
 802ac14:	42a2      	cmp	r2, r4
 802ac16:	d0f0      	beq.n	802abfa <__match+0x6>
 802ac18:	2000      	movs	r0, #0
 802ac1a:	e7f3      	b.n	802ac04 <__match+0x10>

0802ac1c <__hexnan>:
 802ac1c:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 802ac20:	680b      	ldr	r3, [r1, #0]
 802ac22:	6801      	ldr	r1, [r0, #0]
 802ac24:	115e      	asrs	r6, r3, #5
 802ac26:	eb02 0686 	add.w	r6, r2, r6, lsl #2
 802ac2a:	f013 031f 	ands.w	r3, r3, #31
 802ac2e:	b087      	sub	sp, #28
 802ac30:	bf18      	it	ne
 802ac32:	3604      	addne	r6, #4
 802ac34:	2500      	movs	r5, #0
 802ac36:	1f37      	subs	r7, r6, #4
 802ac38:	4682      	mov	sl, r0
 802ac3a:	4690      	mov	r8, r2
 802ac3c:	9301      	str	r3, [sp, #4]
 802ac3e:	f846 5c04 	str.w	r5, [r6, #-4]
 802ac42:	46b9      	mov	r9, r7
 802ac44:	463c      	mov	r4, r7
 802ac46:	9502      	str	r5, [sp, #8]
 802ac48:	46ab      	mov	fp, r5
 802ac4a:	784a      	ldrb	r2, [r1, #1]
 802ac4c:	1c4b      	adds	r3, r1, #1
 802ac4e:	9303      	str	r3, [sp, #12]
 802ac50:	b342      	cbz	r2, 802aca4 <__hexnan+0x88>
 802ac52:	4610      	mov	r0, r2
 802ac54:	9105      	str	r1, [sp, #20]
 802ac56:	9204      	str	r2, [sp, #16]
 802ac58:	f7ff fd94 	bl	802a784 <__hexdig_fun>
 802ac5c:	2800      	cmp	r0, #0
 802ac5e:	d151      	bne.n	802ad04 <__hexnan+0xe8>
 802ac60:	9a04      	ldr	r2, [sp, #16]
 802ac62:	9905      	ldr	r1, [sp, #20]
 802ac64:	2a20      	cmp	r2, #32
 802ac66:	d818      	bhi.n	802ac9a <__hexnan+0x7e>
 802ac68:	9b02      	ldr	r3, [sp, #8]
 802ac6a:	459b      	cmp	fp, r3
 802ac6c:	dd13      	ble.n	802ac96 <__hexnan+0x7a>
 802ac6e:	454c      	cmp	r4, r9
 802ac70:	d206      	bcs.n	802ac80 <__hexnan+0x64>
 802ac72:	2d07      	cmp	r5, #7
 802ac74:	dc04      	bgt.n	802ac80 <__hexnan+0x64>
 802ac76:	462a      	mov	r2, r5
 802ac78:	4649      	mov	r1, r9
 802ac7a:	4620      	mov	r0, r4
 802ac7c:	f7ff ffa8 	bl	802abd0 <L_shift>
 802ac80:	4544      	cmp	r4, r8
 802ac82:	d952      	bls.n	802ad2a <__hexnan+0x10e>
 802ac84:	2300      	movs	r3, #0
 802ac86:	f1a4 0904 	sub.w	r9, r4, #4
 802ac8a:	f844 3c04 	str.w	r3, [r4, #-4]
 802ac8e:	f8cd b008 	str.w	fp, [sp, #8]
 802ac92:	464c      	mov	r4, r9
 802ac94:	461d      	mov	r5, r3
 802ac96:	9903      	ldr	r1, [sp, #12]
 802ac98:	e7d7      	b.n	802ac4a <__hexnan+0x2e>
 802ac9a:	2a29      	cmp	r2, #41	@ 0x29
 802ac9c:	d157      	bne.n	802ad4e <__hexnan+0x132>
 802ac9e:	3102      	adds	r1, #2
 802aca0:	f8ca 1000 	str.w	r1, [sl]
 802aca4:	f1bb 0f00 	cmp.w	fp, #0
 802aca8:	d051      	beq.n	802ad4e <__hexnan+0x132>
 802acaa:	454c      	cmp	r4, r9
 802acac:	d206      	bcs.n	802acbc <__hexnan+0xa0>
 802acae:	2d07      	cmp	r5, #7
 802acb0:	dc04      	bgt.n	802acbc <__hexnan+0xa0>
 802acb2:	462a      	mov	r2, r5
 802acb4:	4649      	mov	r1, r9
 802acb6:	4620      	mov	r0, r4
 802acb8:	f7ff ff8a 	bl	802abd0 <L_shift>
 802acbc:	4544      	cmp	r4, r8
 802acbe:	d936      	bls.n	802ad2e <__hexnan+0x112>
 802acc0:	f1a8 0204 	sub.w	r2, r8, #4
 802acc4:	4623      	mov	r3, r4
 802acc6:	f853 1b04 	ldr.w	r1, [r3], #4
 802acca:	f842 1f04 	str.w	r1, [r2, #4]!
 802acce:	429f      	cmp	r7, r3
 802acd0:	d2f9      	bcs.n	802acc6 <__hexnan+0xaa>
 802acd2:	1b3b      	subs	r3, r7, r4
 802acd4:	f023 0303 	bic.w	r3, r3, #3
 802acd8:	3304      	adds	r3, #4
 802acda:	3401      	adds	r4, #1
 802acdc:	3e03      	subs	r6, #3
 802acde:	42b4      	cmp	r4, r6
 802ace0:	bf88      	it	hi
 802ace2:	2304      	movhi	r3, #4
 802ace4:	4443      	add	r3, r8
 802ace6:	2200      	movs	r2, #0
 802ace8:	f843 2b04 	str.w	r2, [r3], #4
 802acec:	429f      	cmp	r7, r3
 802acee:	d2fb      	bcs.n	802ace8 <__hexnan+0xcc>
 802acf0:	683b      	ldr	r3, [r7, #0]
 802acf2:	b91b      	cbnz	r3, 802acfc <__hexnan+0xe0>
 802acf4:	4547      	cmp	r7, r8
 802acf6:	d128      	bne.n	802ad4a <__hexnan+0x12e>
 802acf8:	2301      	movs	r3, #1
 802acfa:	603b      	str	r3, [r7, #0]
 802acfc:	2005      	movs	r0, #5
 802acfe:	b007      	add	sp, #28
 802ad00:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 802ad04:	3501      	adds	r5, #1
 802ad06:	2d08      	cmp	r5, #8
 802ad08:	f10b 0b01 	add.w	fp, fp, #1
 802ad0c:	dd06      	ble.n	802ad1c <__hexnan+0x100>
 802ad0e:	4544      	cmp	r4, r8
 802ad10:	d9c1      	bls.n	802ac96 <__hexnan+0x7a>
 802ad12:	2300      	movs	r3, #0
 802ad14:	f844 3c04 	str.w	r3, [r4, #-4]
 802ad18:	2501      	movs	r5, #1
 802ad1a:	3c04      	subs	r4, #4
 802ad1c:	6822      	ldr	r2, [r4, #0]
 802ad1e:	f000 000f 	and.w	r0, r0, #15
 802ad22:	ea40 1002 	orr.w	r0, r0, r2, lsl #4
 802ad26:	6020      	str	r0, [r4, #0]
 802ad28:	e7b5      	b.n	802ac96 <__hexnan+0x7a>
 802ad2a:	2508      	movs	r5, #8
 802ad2c:	e7b3      	b.n	802ac96 <__hexnan+0x7a>
 802ad2e:	9b01      	ldr	r3, [sp, #4]
 802ad30:	2b00      	cmp	r3, #0
 802ad32:	d0dd      	beq.n	802acf0 <__hexnan+0xd4>
 802ad34:	f1c3 0320 	rsb	r3, r3, #32
 802ad38:	f04f 32ff 	mov.w	r2, #4294967295	@ 0xffffffff
 802ad3c:	40da      	lsrs	r2, r3
 802ad3e:	f856 3c04 	ldr.w	r3, [r6, #-4]
 802ad42:	4013      	ands	r3, r2
 802ad44:	f846 3c04 	str.w	r3, [r6, #-4]
 802ad48:	e7d2      	b.n	802acf0 <__hexnan+0xd4>
 802ad4a:	3f04      	subs	r7, #4
 802ad4c:	e7d0      	b.n	802acf0 <__hexnan+0xd4>
 802ad4e:	2004      	movs	r0, #4
 802ad50:	e7d5      	b.n	802acfe <__hexnan+0xe2>

0802ad52 <__ascii_mbtowc>:
 802ad52:	b082      	sub	sp, #8
 802ad54:	b901      	cbnz	r1, 802ad58 <__ascii_mbtowc+0x6>
 802ad56:	a901      	add	r1, sp, #4
 802ad58:	b142      	cbz	r2, 802ad6c <__ascii_mbtowc+0x1a>
 802ad5a:	b14b      	cbz	r3, 802ad70 <__ascii_mbtowc+0x1e>
 802ad5c:	7813      	ldrb	r3, [r2, #0]
 802ad5e:	600b      	str	r3, [r1, #0]
 802ad60:	7812      	ldrb	r2, [r2, #0]
 802ad62:	1e10      	subs	r0, r2, #0
 802ad64:	bf18      	it	ne
 802ad66:	2001      	movne	r0, #1
 802ad68:	b002      	add	sp, #8
 802ad6a:	4770      	bx	lr
 802ad6c:	4610      	mov	r0, r2
 802ad6e:	e7fb      	b.n	802ad68 <__ascii_mbtowc+0x16>
 802ad70:	f06f 0001 	mvn.w	r0, #1
 802ad74:	e7f8      	b.n	802ad68 <__ascii_mbtowc+0x16>
	...

0802ad78 <_Balloc>:
 802ad78:	b570      	push	{r4, r5, r6, lr}
 802ad7a:	69c6      	ldr	r6, [r0, #28]
 802ad7c:	4604      	mov	r4, r0
 802ad7e:	460d      	mov	r5, r1
 802ad80:	b976      	cbnz	r6, 802ada0 <_Balloc+0x28>
 802ad82:	2010      	movs	r0, #16
 802ad84:	f7fc ffda 	bl	8027d3c <malloc>
 802ad88:	4602      	mov	r2, r0
 802ad8a:	61e0      	str	r0, [r4, #28]
 802ad8c:	b920      	cbnz	r0, 802ad98 <_Balloc+0x20>
 802ad8e:	4b18      	ldr	r3, [pc, #96]	@ (802adf0 <_Balloc+0x78>)
 802ad90:	4818      	ldr	r0, [pc, #96]	@ (802adf4 <_Balloc+0x7c>)
 802ad92:	216b      	movs	r1, #107	@ 0x6b
 802ad94:	f7fe fe5c 	bl	8029a50 <__assert_func>
 802ad98:	e9c0 6601 	strd	r6, r6, [r0, #4]
 802ad9c:	6006      	str	r6, [r0, #0]
 802ad9e:	60c6      	str	r6, [r0, #12]
 802ada0:	69e6      	ldr	r6, [r4, #28]
 802ada2:	68f3      	ldr	r3, [r6, #12]
 802ada4:	b183      	cbz	r3, 802adc8 <_Balloc+0x50>
 802ada6:	69e3      	ldr	r3, [r4, #28]
 802ada8:	68db      	ldr	r3, [r3, #12]
 802adaa:	f853 0025 	ldr.w	r0, [r3, r5, lsl #2]
 802adae:	b9b8      	cbnz	r0, 802ade0 <_Balloc+0x68>
 802adb0:	2101      	movs	r1, #1
 802adb2:	fa01 f605 	lsl.w	r6, r1, r5
 802adb6:	1d72      	adds	r2, r6, #5
 802adb8:	0092      	lsls	r2, r2, #2
 802adba:	4620      	mov	r0, r4
 802adbc:	f001 f883 	bl	802bec6 <_calloc_r>
 802adc0:	b160      	cbz	r0, 802addc <_Balloc+0x64>
 802adc2:	e9c0 5601 	strd	r5, r6, [r0, #4]
 802adc6:	e00e      	b.n	802ade6 <_Balloc+0x6e>
 802adc8:	2221      	movs	r2, #33	@ 0x21
 802adca:	2104      	movs	r1, #4
 802adcc:	4620      	mov	r0, r4
 802adce:	f001 f87a 	bl	802bec6 <_calloc_r>
 802add2:	69e3      	ldr	r3, [r4, #28]
 802add4:	60f0      	str	r0, [r6, #12]
 802add6:	68db      	ldr	r3, [r3, #12]
 802add8:	2b00      	cmp	r3, #0
 802adda:	d1e4      	bne.n	802ada6 <_Balloc+0x2e>
 802addc:	2000      	movs	r0, #0
 802adde:	bd70      	pop	{r4, r5, r6, pc}
 802ade0:	6802      	ldr	r2, [r0, #0]
 802ade2:	f843 2025 	str.w	r2, [r3, r5, lsl #2]
 802ade6:	2300      	movs	r3, #0
 802ade8:	e9c0 3303 	strd	r3, r3, [r0, #12]
 802adec:	e7f7      	b.n	802adde <_Balloc+0x66>
 802adee:	bf00      	nop
 802adf0:	080307ba 	.word	0x080307ba
 802adf4:	08030acf 	.word	0x08030acf

0802adf8 <_Bfree>:
 802adf8:	b570      	push	{r4, r5, r6, lr}
 802adfa:	69c6      	ldr	r6, [r0, #28]
 802adfc:	4605      	mov	r5, r0
 802adfe:	460c      	mov	r4, r1
 802ae00:	b976      	cbnz	r6, 802ae20 <_Bfree+0x28>
 802ae02:	2010      	movs	r0, #16
 802ae04:	f7fc ff9a 	bl	8027d3c <malloc>
 802ae08:	4602      	mov	r2, r0
 802ae0a:	61e8      	str	r0, [r5, #28]
 802ae0c:	b920      	cbnz	r0, 802ae18 <_Bfree+0x20>
 802ae0e:	4b09      	ldr	r3, [pc, #36]	@ (802ae34 <_Bfree+0x3c>)
 802ae10:	4809      	ldr	r0, [pc, #36]	@ (802ae38 <_Bfree+0x40>)
 802ae12:	218f      	movs	r1, #143	@ 0x8f
 802ae14:	f7fe fe1c 	bl	8029a50 <__assert_func>
 802ae18:	e9c0 6601 	strd	r6, r6, [r0, #4]
 802ae1c:	6006      	str	r6, [r0, #0]
 802ae1e:	60c6      	str	r6, [r0, #12]
 802ae20:	b13c      	cbz	r4, 802ae32 <_Bfree+0x3a>
 802ae22:	69eb      	ldr	r3, [r5, #28]
 802ae24:	6862      	ldr	r2, [r4, #4]
 802ae26:	68db      	ldr	r3, [r3, #12]
 802ae28:	f853 1022 	ldr.w	r1, [r3, r2, lsl #2]
 802ae2c:	6021      	str	r1, [r4, #0]
 802ae2e:	f843 4022 	str.w	r4, [r3, r2, lsl #2]
 802ae32:	bd70      	pop	{r4, r5, r6, pc}
 802ae34:	080307ba 	.word	0x080307ba
 802ae38:	08030acf 	.word	0x08030acf

0802ae3c <__multadd>:
 802ae3c:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
 802ae40:	690d      	ldr	r5, [r1, #16]
 802ae42:	4607      	mov	r7, r0
 802ae44:	460c      	mov	r4, r1
 802ae46:	461e      	mov	r6, r3
 802ae48:	f101 0c14 	add.w	ip, r1, #20
 802ae4c:	2000      	movs	r0, #0
 802ae4e:	f8dc 3000 	ldr.w	r3, [ip]
 802ae52:	b299      	uxth	r1, r3
 802ae54:	fb02 6101 	mla	r1, r2, r1, r6
 802ae58:	0c1e      	lsrs	r6, r3, #16
 802ae5a:	0c0b      	lsrs	r3, r1, #16
 802ae5c:	fb02 3306 	mla	r3, r2, r6, r3
 802ae60:	b289      	uxth	r1, r1
 802ae62:	3001      	adds	r0, #1
 802ae64:	eb01 4103 	add.w	r1, r1, r3, lsl #16
 802ae68:	4285      	cmp	r5, r0
 802ae6a:	f84c 1b04 	str.w	r1, [ip], #4
 802ae6e:	ea4f 4613 	mov.w	r6, r3, lsr #16
 802ae72:	dcec      	bgt.n	802ae4e <__multadd+0x12>
 802ae74:	b30e      	cbz	r6, 802aeba <__multadd+0x7e>
 802ae76:	68a3      	ldr	r3, [r4, #8]
 802ae78:	42ab      	cmp	r3, r5
 802ae7a:	dc19      	bgt.n	802aeb0 <__multadd+0x74>
 802ae7c:	6861      	ldr	r1, [r4, #4]
 802ae7e:	4638      	mov	r0, r7
 802ae80:	3101      	adds	r1, #1
 802ae82:	f7ff ff79 	bl	802ad78 <_Balloc>
 802ae86:	4680      	mov	r8, r0
 802ae88:	b928      	cbnz	r0, 802ae96 <__multadd+0x5a>
 802ae8a:	4602      	mov	r2, r0
 802ae8c:	4b0c      	ldr	r3, [pc, #48]	@ (802aec0 <__multadd+0x84>)
 802ae8e:	480d      	ldr	r0, [pc, #52]	@ (802aec4 <__multadd+0x88>)
 802ae90:	21ba      	movs	r1, #186	@ 0xba
 802ae92:	f7fe fddd 	bl	8029a50 <__assert_func>
 802ae96:	6922      	ldr	r2, [r4, #16]
 802ae98:	3202      	adds	r2, #2
 802ae9a:	f104 010c 	add.w	r1, r4, #12
 802ae9e:	0092      	lsls	r2, r2, #2
 802aea0:	300c      	adds	r0, #12
 802aea2:	f7fe fdbc 	bl	8029a1e <memcpy>
 802aea6:	4621      	mov	r1, r4
 802aea8:	4638      	mov	r0, r7
 802aeaa:	f7ff ffa5 	bl	802adf8 <_Bfree>
 802aeae:	4644      	mov	r4, r8
 802aeb0:	eb04 0385 	add.w	r3, r4, r5, lsl #2
 802aeb4:	3501      	adds	r5, #1
 802aeb6:	615e      	str	r6, [r3, #20]
 802aeb8:	6125      	str	r5, [r4, #16]
 802aeba:	4620      	mov	r0, r4
 802aebc:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 802aec0:	08030a5e 	.word	0x08030a5e
 802aec4:	08030acf 	.word	0x08030acf

0802aec8 <__s2b>:
 802aec8:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
 802aecc:	460c      	mov	r4, r1
 802aece:	4615      	mov	r5, r2
 802aed0:	461f      	mov	r7, r3
 802aed2:	2209      	movs	r2, #9
 802aed4:	3308      	adds	r3, #8
 802aed6:	4606      	mov	r6, r0
 802aed8:	fb93 f3f2 	sdiv	r3, r3, r2
 802aedc:	2100      	movs	r1, #0
 802aede:	2201      	movs	r2, #1
 802aee0:	429a      	cmp	r2, r3
 802aee2:	db09      	blt.n	802aef8 <__s2b+0x30>
 802aee4:	4630      	mov	r0, r6
 802aee6:	f7ff ff47 	bl	802ad78 <_Balloc>
 802aeea:	b940      	cbnz	r0, 802aefe <__s2b+0x36>
 802aeec:	4602      	mov	r2, r0
 802aeee:	4b19      	ldr	r3, [pc, #100]	@ (802af54 <__s2b+0x8c>)
 802aef0:	4819      	ldr	r0, [pc, #100]	@ (802af58 <__s2b+0x90>)
 802aef2:	21d3      	movs	r1, #211	@ 0xd3
 802aef4:	f7fe fdac 	bl	8029a50 <__assert_func>
 802aef8:	0052      	lsls	r2, r2, #1
 802aefa:	3101      	adds	r1, #1
 802aefc:	e7f0      	b.n	802aee0 <__s2b+0x18>
 802aefe:	9b08      	ldr	r3, [sp, #32]
 802af00:	6143      	str	r3, [r0, #20]
 802af02:	2d09      	cmp	r5, #9
 802af04:	f04f 0301 	mov.w	r3, #1
 802af08:	6103      	str	r3, [r0, #16]
 802af0a:	dd16      	ble.n	802af3a <__s2b+0x72>
 802af0c:	f104 0909 	add.w	r9, r4, #9
 802af10:	46c8      	mov	r8, r9
 802af12:	442c      	add	r4, r5
 802af14:	f818 3b01 	ldrb.w	r3, [r8], #1
 802af18:	4601      	mov	r1, r0
 802af1a:	3b30      	subs	r3, #48	@ 0x30
 802af1c:	220a      	movs	r2, #10
 802af1e:	4630      	mov	r0, r6
 802af20:	f7ff ff8c 	bl	802ae3c <__multadd>
 802af24:	45a0      	cmp	r8, r4
 802af26:	d1f5      	bne.n	802af14 <__s2b+0x4c>
 802af28:	f1a5 0408 	sub.w	r4, r5, #8
 802af2c:	444c      	add	r4, r9
 802af2e:	1b2d      	subs	r5, r5, r4
 802af30:	1963      	adds	r3, r4, r5
 802af32:	42bb      	cmp	r3, r7
 802af34:	db04      	blt.n	802af40 <__s2b+0x78>
 802af36:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
 802af3a:	340a      	adds	r4, #10
 802af3c:	2509      	movs	r5, #9
 802af3e:	e7f6      	b.n	802af2e <__s2b+0x66>
 802af40:	f814 3b01 	ldrb.w	r3, [r4], #1
 802af44:	4601      	mov	r1, r0
 802af46:	3b30      	subs	r3, #48	@ 0x30
 802af48:	220a      	movs	r2, #10
 802af4a:	4630      	mov	r0, r6
 802af4c:	f7ff ff76 	bl	802ae3c <__multadd>
 802af50:	e7ee      	b.n	802af30 <__s2b+0x68>
 802af52:	bf00      	nop
 802af54:	08030a5e 	.word	0x08030a5e
 802af58:	08030acf 	.word	0x08030acf

0802af5c <__hi0bits>:
 802af5c:	f5b0 3f80 	cmp.w	r0, #65536	@ 0x10000
 802af60:	4603      	mov	r3, r0
 802af62:	bf36      	itet	cc
 802af64:	0403      	lslcc	r3, r0, #16
 802af66:	2000      	movcs	r0, #0
 802af68:	2010      	movcc	r0, #16
 802af6a:	f1b3 7f80 	cmp.w	r3, #16777216	@ 0x1000000
 802af6e:	bf3c      	itt	cc
 802af70:	021b      	lslcc	r3, r3, #8
 802af72:	3008      	addcc	r0, #8
 802af74:	f1b3 5f80 	cmp.w	r3, #268435456	@ 0x10000000
 802af78:	bf3c      	itt	cc
 802af7a:	011b      	lslcc	r3, r3, #4
 802af7c:	3004      	addcc	r0, #4
 802af7e:	f1b3 4f80 	cmp.w	r3, #1073741824	@ 0x40000000
 802af82:	bf3c      	itt	cc
 802af84:	009b      	lslcc	r3, r3, #2
 802af86:	3002      	addcc	r0, #2
 802af88:	2b00      	cmp	r3, #0
 802af8a:	db05      	blt.n	802af98 <__hi0bits+0x3c>
 802af8c:	f013 4f80 	tst.w	r3, #1073741824	@ 0x40000000
 802af90:	f100 0001 	add.w	r0, r0, #1
 802af94:	bf08      	it	eq
 802af96:	2020      	moveq	r0, #32
 802af98:	4770      	bx	lr

0802af9a <__lo0bits>:
 802af9a:	6803      	ldr	r3, [r0, #0]
 802af9c:	4602      	mov	r2, r0
 802af9e:	f013 0007 	ands.w	r0, r3, #7
 802afa2:	d00b      	beq.n	802afbc <__lo0bits+0x22>
 802afa4:	07d9      	lsls	r1, r3, #31
 802afa6:	d421      	bmi.n	802afec <__lo0bits+0x52>
 802afa8:	0798      	lsls	r0, r3, #30
 802afaa:	bf49      	itett	mi
 802afac:	085b      	lsrmi	r3, r3, #1
 802afae:	089b      	lsrpl	r3, r3, #2
 802afb0:	2001      	movmi	r0, #1
 802afb2:	6013      	strmi	r3, [r2, #0]
 802afb4:	bf5c      	itt	pl
 802afb6:	6013      	strpl	r3, [r2, #0]
 802afb8:	2002      	movpl	r0, #2
 802afba:	4770      	bx	lr
 802afbc:	b299      	uxth	r1, r3
 802afbe:	b909      	cbnz	r1, 802afc4 <__lo0bits+0x2a>
 802afc0:	0c1b      	lsrs	r3, r3, #16
 802afc2:	2010      	movs	r0, #16
 802afc4:	b2d9      	uxtb	r1, r3
 802afc6:	b909      	cbnz	r1, 802afcc <__lo0bits+0x32>
 802afc8:	3008      	adds	r0, #8
 802afca:	0a1b      	lsrs	r3, r3, #8
 802afcc:	0719      	lsls	r1, r3, #28
 802afce:	bf04      	itt	eq
 802afd0:	091b      	lsreq	r3, r3, #4
 802afd2:	3004      	addeq	r0, #4
 802afd4:	0799      	lsls	r1, r3, #30
 802afd6:	bf04      	itt	eq
 802afd8:	089b      	lsreq	r3, r3, #2
 802afda:	3002      	addeq	r0, #2
 802afdc:	07d9      	lsls	r1, r3, #31
 802afde:	d403      	bmi.n	802afe8 <__lo0bits+0x4e>
 802afe0:	085b      	lsrs	r3, r3, #1
 802afe2:	f100 0001 	add.w	r0, r0, #1
 802afe6:	d003      	beq.n	802aff0 <__lo0bits+0x56>
 802afe8:	6013      	str	r3, [r2, #0]
 802afea:	4770      	bx	lr
 802afec:	2000      	movs	r0, #0
 802afee:	4770      	bx	lr
 802aff0:	2020      	movs	r0, #32
 802aff2:	4770      	bx	lr

0802aff4 <__i2b>:
 802aff4:	b510      	push	{r4, lr}
 802aff6:	460c      	mov	r4, r1
 802aff8:	2101      	movs	r1, #1
 802affa:	f7ff febd 	bl	802ad78 <_Balloc>
 802affe:	4602      	mov	r2, r0
 802b000:	b928      	cbnz	r0, 802b00e <__i2b+0x1a>
 802b002:	4b05      	ldr	r3, [pc, #20]	@ (802b018 <__i2b+0x24>)
 802b004:	4805      	ldr	r0, [pc, #20]	@ (802b01c <__i2b+0x28>)
 802b006:	f240 1145 	movw	r1, #325	@ 0x145
 802b00a:	f7fe fd21 	bl	8029a50 <__assert_func>
 802b00e:	2301      	movs	r3, #1
 802b010:	6144      	str	r4, [r0, #20]
 802b012:	6103      	str	r3, [r0, #16]
 802b014:	bd10      	pop	{r4, pc}
 802b016:	bf00      	nop
 802b018:	08030a5e 	.word	0x08030a5e
 802b01c:	08030acf 	.word	0x08030acf

0802b020 <__multiply>:
 802b020:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 802b024:	4614      	mov	r4, r2
 802b026:	690a      	ldr	r2, [r1, #16]
 802b028:	6923      	ldr	r3, [r4, #16]
 802b02a:	429a      	cmp	r2, r3
 802b02c:	bfa8      	it	ge
 802b02e:	4623      	movge	r3, r4
 802b030:	460f      	mov	r7, r1
 802b032:	bfa4      	itt	ge
 802b034:	460c      	movge	r4, r1
 802b036:	461f      	movge	r7, r3
 802b038:	f8d4 a010 	ldr.w	sl, [r4, #16]
 802b03c:	f8d7 9010 	ldr.w	r9, [r7, #16]
 802b040:	68a3      	ldr	r3, [r4, #8]
 802b042:	6861      	ldr	r1, [r4, #4]
 802b044:	eb0a 0609 	add.w	r6, sl, r9
 802b048:	42b3      	cmp	r3, r6
 802b04a:	b085      	sub	sp, #20
 802b04c:	bfb8      	it	lt
 802b04e:	3101      	addlt	r1, #1
 802b050:	f7ff fe92 	bl	802ad78 <_Balloc>
 802b054:	b930      	cbnz	r0, 802b064 <__multiply+0x44>
 802b056:	4602      	mov	r2, r0
 802b058:	4b44      	ldr	r3, [pc, #272]	@ (802b16c <__multiply+0x14c>)
 802b05a:	4845      	ldr	r0, [pc, #276]	@ (802b170 <__multiply+0x150>)
 802b05c:	f44f 71b1 	mov.w	r1, #354	@ 0x162
 802b060:	f7fe fcf6 	bl	8029a50 <__assert_func>
 802b064:	f100 0514 	add.w	r5, r0, #20
 802b068:	eb05 0886 	add.w	r8, r5, r6, lsl #2
 802b06c:	462b      	mov	r3, r5
 802b06e:	2200      	movs	r2, #0
 802b070:	4543      	cmp	r3, r8
 802b072:	d321      	bcc.n	802b0b8 <__multiply+0x98>
 802b074:	f107 0114 	add.w	r1, r7, #20
 802b078:	f104 0214 	add.w	r2, r4, #20
 802b07c:	eb02 028a 	add.w	r2, r2, sl, lsl #2
 802b080:	eb01 0389 	add.w	r3, r1, r9, lsl #2
 802b084:	9302      	str	r3, [sp, #8]
 802b086:	1b13      	subs	r3, r2, r4
 802b088:	3b15      	subs	r3, #21
 802b08a:	f023 0303 	bic.w	r3, r3, #3
 802b08e:	3304      	adds	r3, #4
 802b090:	f104 0715 	add.w	r7, r4, #21
 802b094:	42ba      	cmp	r2, r7
 802b096:	bf38      	it	cc
 802b098:	2304      	movcc	r3, #4
 802b09a:	9301      	str	r3, [sp, #4]
 802b09c:	9b02      	ldr	r3, [sp, #8]
 802b09e:	9103      	str	r1, [sp, #12]
 802b0a0:	428b      	cmp	r3, r1
 802b0a2:	d80c      	bhi.n	802b0be <__multiply+0x9e>
 802b0a4:	2e00      	cmp	r6, #0
 802b0a6:	dd03      	ble.n	802b0b0 <__multiply+0x90>
 802b0a8:	f858 3d04 	ldr.w	r3, [r8, #-4]!
 802b0ac:	2b00      	cmp	r3, #0
 802b0ae:	d05b      	beq.n	802b168 <__multiply+0x148>
 802b0b0:	6106      	str	r6, [r0, #16]
 802b0b2:	b005      	add	sp, #20
 802b0b4:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 802b0b8:	f843 2b04 	str.w	r2, [r3], #4
 802b0bc:	e7d8      	b.n	802b070 <__multiply+0x50>
 802b0be:	f8b1 a000 	ldrh.w	sl, [r1]
 802b0c2:	f1ba 0f00 	cmp.w	sl, #0
 802b0c6:	d024      	beq.n	802b112 <__multiply+0xf2>
 802b0c8:	f104 0e14 	add.w	lr, r4, #20
 802b0cc:	46a9      	mov	r9, r5
 802b0ce:	f04f 0c00 	mov.w	ip, #0
 802b0d2:	f85e 7b04 	ldr.w	r7, [lr], #4
 802b0d6:	f8d9 3000 	ldr.w	r3, [r9]
 802b0da:	fa1f fb87 	uxth.w	fp, r7
 802b0de:	b29b      	uxth	r3, r3
 802b0e0:	fb0a 330b 	mla	r3, sl, fp, r3
 802b0e4:	ea4f 4b17 	mov.w	fp, r7, lsr #16
 802b0e8:	f8d9 7000 	ldr.w	r7, [r9]
 802b0ec:	4463      	add	r3, ip
 802b0ee:	ea4f 4c17 	mov.w	ip, r7, lsr #16
 802b0f2:	fb0a c70b 	mla	r7, sl, fp, ip
 802b0f6:	eb07 4713 	add.w	r7, r7, r3, lsr #16
 802b0fa:	b29b      	uxth	r3, r3
 802b0fc:	ea43 4307 	orr.w	r3, r3, r7, lsl #16
 802b100:	4572      	cmp	r2, lr
 802b102:	f849 3b04 	str.w	r3, [r9], #4
 802b106:	ea4f 4c17 	mov.w	ip, r7, lsr #16
 802b10a:	d8e2      	bhi.n	802b0d2 <__multiply+0xb2>
 802b10c:	9b01      	ldr	r3, [sp, #4]
 802b10e:	f845 c003 	str.w	ip, [r5, r3]
 802b112:	9b03      	ldr	r3, [sp, #12]
 802b114:	f8b3 9002 	ldrh.w	r9, [r3, #2]
 802b118:	3104      	adds	r1, #4
 802b11a:	f1b9 0f00 	cmp.w	r9, #0
 802b11e:	d021      	beq.n	802b164 <__multiply+0x144>
 802b120:	682b      	ldr	r3, [r5, #0]
 802b122:	f104 0c14 	add.w	ip, r4, #20
 802b126:	46ae      	mov	lr, r5
 802b128:	f04f 0a00 	mov.w	sl, #0
 802b12c:	f8bc b000 	ldrh.w	fp, [ip]
 802b130:	f8be 7002 	ldrh.w	r7, [lr, #2]
 802b134:	fb09 770b 	mla	r7, r9, fp, r7
 802b138:	4457      	add	r7, sl
 802b13a:	b29b      	uxth	r3, r3
 802b13c:	ea43 4307 	orr.w	r3, r3, r7, lsl #16
 802b140:	f84e 3b04 	str.w	r3, [lr], #4
 802b144:	f85c 3b04 	ldr.w	r3, [ip], #4
 802b148:	ea4f 4a13 	mov.w	sl, r3, lsr #16
 802b14c:	f8be 3000 	ldrh.w	r3, [lr]
 802b150:	fb09 330a 	mla	r3, r9, sl, r3
 802b154:	eb03 4317 	add.w	r3, r3, r7, lsr #16
 802b158:	4562      	cmp	r2, ip
 802b15a:	ea4f 4a13 	mov.w	sl, r3, lsr #16
 802b15e:	d8e5      	bhi.n	802b12c <__multiply+0x10c>
 802b160:	9f01      	ldr	r7, [sp, #4]
 802b162:	51eb      	str	r3, [r5, r7]
 802b164:	3504      	adds	r5, #4
 802b166:	e799      	b.n	802b09c <__multiply+0x7c>
 802b168:	3e01      	subs	r6, #1
 802b16a:	e79b      	b.n	802b0a4 <__multiply+0x84>
 802b16c:	08030a5e 	.word	0x08030a5e
 802b170:	08030acf 	.word	0x08030acf

0802b174 <__pow5mult>:
 802b174:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
 802b178:	4615      	mov	r5, r2
 802b17a:	f012 0203 	ands.w	r2, r2, #3
 802b17e:	4607      	mov	r7, r0
 802b180:	460e      	mov	r6, r1
 802b182:	d007      	beq.n	802b194 <__pow5mult+0x20>
 802b184:	4c25      	ldr	r4, [pc, #148]	@ (802b21c <__pow5mult+0xa8>)
 802b186:	3a01      	subs	r2, #1
 802b188:	2300      	movs	r3, #0
 802b18a:	f854 2022 	ldr.w	r2, [r4, r2, lsl #2]
 802b18e:	f7ff fe55 	bl	802ae3c <__multadd>
 802b192:	4606      	mov	r6, r0
 802b194:	10ad      	asrs	r5, r5, #2
 802b196:	d03d      	beq.n	802b214 <__pow5mult+0xa0>
 802b198:	69fc      	ldr	r4, [r7, #28]
 802b19a:	b97c      	cbnz	r4, 802b1bc <__pow5mult+0x48>
 802b19c:	2010      	movs	r0, #16
 802b19e:	f7fc fdcd 	bl	8027d3c <malloc>
 802b1a2:	4602      	mov	r2, r0
 802b1a4:	61f8      	str	r0, [r7, #28]
 802b1a6:	b928      	cbnz	r0, 802b1b4 <__pow5mult+0x40>
 802b1a8:	4b1d      	ldr	r3, [pc, #116]	@ (802b220 <__pow5mult+0xac>)
 802b1aa:	481e      	ldr	r0, [pc, #120]	@ (802b224 <__pow5mult+0xb0>)
 802b1ac:	f240 11b3 	movw	r1, #435	@ 0x1b3
 802b1b0:	f7fe fc4e 	bl	8029a50 <__assert_func>
 802b1b4:	e9c0 4401 	strd	r4, r4, [r0, #4]
 802b1b8:	6004      	str	r4, [r0, #0]
 802b1ba:	60c4      	str	r4, [r0, #12]
 802b1bc:	f8d7 801c 	ldr.w	r8, [r7, #28]
 802b1c0:	f8d8 4008 	ldr.w	r4, [r8, #8]
 802b1c4:	b94c      	cbnz	r4, 802b1da <__pow5mult+0x66>
 802b1c6:	f240 2171 	movw	r1, #625	@ 0x271
 802b1ca:	4638      	mov	r0, r7
 802b1cc:	f7ff ff12 	bl	802aff4 <__i2b>
 802b1d0:	2300      	movs	r3, #0
 802b1d2:	f8c8 0008 	str.w	r0, [r8, #8]
 802b1d6:	4604      	mov	r4, r0
 802b1d8:	6003      	str	r3, [r0, #0]
 802b1da:	f04f 0900 	mov.w	r9, #0
 802b1de:	07eb      	lsls	r3, r5, #31
 802b1e0:	d50a      	bpl.n	802b1f8 <__pow5mult+0x84>
 802b1e2:	4631      	mov	r1, r6
 802b1e4:	4622      	mov	r2, r4
 802b1e6:	4638      	mov	r0, r7
 802b1e8:	f7ff ff1a 	bl	802b020 <__multiply>
 802b1ec:	4631      	mov	r1, r6
 802b1ee:	4680      	mov	r8, r0
 802b1f0:	4638      	mov	r0, r7
 802b1f2:	f7ff fe01 	bl	802adf8 <_Bfree>
 802b1f6:	4646      	mov	r6, r8
 802b1f8:	106d      	asrs	r5, r5, #1
 802b1fa:	d00b      	beq.n	802b214 <__pow5mult+0xa0>
 802b1fc:	6820      	ldr	r0, [r4, #0]
 802b1fe:	b938      	cbnz	r0, 802b210 <__pow5mult+0x9c>
 802b200:	4622      	mov	r2, r4
 802b202:	4621      	mov	r1, r4
 802b204:	4638      	mov	r0, r7
 802b206:	f7ff ff0b 	bl	802b020 <__multiply>
 802b20a:	6020      	str	r0, [r4, #0]
 802b20c:	f8c0 9000 	str.w	r9, [r0]
 802b210:	4604      	mov	r4, r0
 802b212:	e7e4      	b.n	802b1de <__pow5mult+0x6a>
 802b214:	4630      	mov	r0, r6
 802b216:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
 802b21a:	bf00      	nop
 802b21c:	08030b28 	.word	0x08030b28
 802b220:	080307ba 	.word	0x080307ba
 802b224:	08030acf 	.word	0x08030acf

0802b228 <__lshift>:
 802b228:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
 802b22c:	460c      	mov	r4, r1
 802b22e:	6849      	ldr	r1, [r1, #4]
 802b230:	6923      	ldr	r3, [r4, #16]
 802b232:	eb03 1862 	add.w	r8, r3, r2, asr #5
 802b236:	68a3      	ldr	r3, [r4, #8]
 802b238:	4607      	mov	r7, r0
 802b23a:	4691      	mov	r9, r2
 802b23c:	ea4f 1a62 	mov.w	sl, r2, asr #5
 802b240:	f108 0601 	add.w	r6, r8, #1
 802b244:	42b3      	cmp	r3, r6
 802b246:	db0b      	blt.n	802b260 <__lshift+0x38>
 802b248:	4638      	mov	r0, r7
 802b24a:	f7ff fd95 	bl	802ad78 <_Balloc>
 802b24e:	4605      	mov	r5, r0
 802b250:	b948      	cbnz	r0, 802b266 <__lshift+0x3e>
 802b252:	4602      	mov	r2, r0
 802b254:	4b28      	ldr	r3, [pc, #160]	@ (802b2f8 <__lshift+0xd0>)
 802b256:	4829      	ldr	r0, [pc, #164]	@ (802b2fc <__lshift+0xd4>)
 802b258:	f44f 71ef 	mov.w	r1, #478	@ 0x1de
 802b25c:	f7fe fbf8 	bl	8029a50 <__assert_func>
 802b260:	3101      	adds	r1, #1
 802b262:	005b      	lsls	r3, r3, #1
 802b264:	e7ee      	b.n	802b244 <__lshift+0x1c>
 802b266:	2300      	movs	r3, #0
 802b268:	f100 0114 	add.w	r1, r0, #20
 802b26c:	f100 0210 	add.w	r2, r0, #16
 802b270:	4618      	mov	r0, r3
 802b272:	4553      	cmp	r3, sl
 802b274:	db33      	blt.n	802b2de <__lshift+0xb6>
 802b276:	6920      	ldr	r0, [r4, #16]
 802b278:	ea2a 7aea 	bic.w	sl, sl, sl, asr #31
 802b27c:	f104 0314 	add.w	r3, r4, #20
 802b280:	f019 091f 	ands.w	r9, r9, #31
 802b284:	eb01 018a 	add.w	r1, r1, sl, lsl #2
 802b288:	eb03 0c80 	add.w	ip, r3, r0, lsl #2
 802b28c:	d02b      	beq.n	802b2e6 <__lshift+0xbe>
 802b28e:	f1c9 0e20 	rsb	lr, r9, #32
 802b292:	468a      	mov	sl, r1
 802b294:	2200      	movs	r2, #0
 802b296:	6818      	ldr	r0, [r3, #0]
 802b298:	fa00 f009 	lsl.w	r0, r0, r9
 802b29c:	4310      	orrs	r0, r2
 802b29e:	f84a 0b04 	str.w	r0, [sl], #4
 802b2a2:	f853 2b04 	ldr.w	r2, [r3], #4
 802b2a6:	459c      	cmp	ip, r3
 802b2a8:	fa22 f20e 	lsr.w	r2, r2, lr
 802b2ac:	d8f3      	bhi.n	802b296 <__lshift+0x6e>
 802b2ae:	ebac 0304 	sub.w	r3, ip, r4
 802b2b2:	3b15      	subs	r3, #21
 802b2b4:	f023 0303 	bic.w	r3, r3, #3
 802b2b8:	3304      	adds	r3, #4
 802b2ba:	f104 0015 	add.w	r0, r4, #21
 802b2be:	4584      	cmp	ip, r0
 802b2c0:	bf38      	it	cc
 802b2c2:	2304      	movcc	r3, #4
 802b2c4:	50ca      	str	r2, [r1, r3]
 802b2c6:	b10a      	cbz	r2, 802b2cc <__lshift+0xa4>
 802b2c8:	f108 0602 	add.w	r6, r8, #2
 802b2cc:	3e01      	subs	r6, #1
 802b2ce:	4638      	mov	r0, r7
 802b2d0:	612e      	str	r6, [r5, #16]
 802b2d2:	4621      	mov	r1, r4
 802b2d4:	f7ff fd90 	bl	802adf8 <_Bfree>
 802b2d8:	4628      	mov	r0, r5
 802b2da:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 802b2de:	f842 0f04 	str.w	r0, [r2, #4]!
 802b2e2:	3301      	adds	r3, #1
 802b2e4:	e7c5      	b.n	802b272 <__lshift+0x4a>
 802b2e6:	3904      	subs	r1, #4
 802b2e8:	f853 2b04 	ldr.w	r2, [r3], #4
 802b2ec:	f841 2f04 	str.w	r2, [r1, #4]!
 802b2f0:	459c      	cmp	ip, r3
 802b2f2:	d8f9      	bhi.n	802b2e8 <__lshift+0xc0>
 802b2f4:	e7ea      	b.n	802b2cc <__lshift+0xa4>
 802b2f6:	bf00      	nop
 802b2f8:	08030a5e 	.word	0x08030a5e
 802b2fc:	08030acf 	.word	0x08030acf

0802b300 <__mcmp>:
 802b300:	690a      	ldr	r2, [r1, #16]
 802b302:	4603      	mov	r3, r0
 802b304:	6900      	ldr	r0, [r0, #16]
 802b306:	1a80      	subs	r0, r0, r2
 802b308:	b530      	push	{r4, r5, lr}
 802b30a:	d10e      	bne.n	802b32a <__mcmp+0x2a>
 802b30c:	3314      	adds	r3, #20
 802b30e:	3114      	adds	r1, #20
 802b310:	eb03 0482 	add.w	r4, r3, r2, lsl #2
 802b314:	eb01 0182 	add.w	r1, r1, r2, lsl #2
 802b318:	f854 5d04 	ldr.w	r5, [r4, #-4]!
 802b31c:	f851 2d04 	ldr.w	r2, [r1, #-4]!
 802b320:	4295      	cmp	r5, r2
 802b322:	d003      	beq.n	802b32c <__mcmp+0x2c>
 802b324:	d205      	bcs.n	802b332 <__mcmp+0x32>
 802b326:	f04f 30ff 	mov.w	r0, #4294967295	@ 0xffffffff
 802b32a:	bd30      	pop	{r4, r5, pc}
 802b32c:	42a3      	cmp	r3, r4
 802b32e:	d3f3      	bcc.n	802b318 <__mcmp+0x18>
 802b330:	e7fb      	b.n	802b32a <__mcmp+0x2a>
 802b332:	2001      	movs	r0, #1
 802b334:	e7f9      	b.n	802b32a <__mcmp+0x2a>
	...

0802b338 <__mdiff>:
 802b338:	e92d 4ff7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
 802b33c:	4689      	mov	r9, r1
 802b33e:	4606      	mov	r6, r0
 802b340:	4611      	mov	r1, r2
 802b342:	4648      	mov	r0, r9
 802b344:	4614      	mov	r4, r2
 802b346:	f7ff ffdb 	bl	802b300 <__mcmp>
 802b34a:	1e05      	subs	r5, r0, #0
 802b34c:	d112      	bne.n	802b374 <__mdiff+0x3c>
 802b34e:	4629      	mov	r1, r5
 802b350:	4630      	mov	r0, r6
 802b352:	f7ff fd11 	bl	802ad78 <_Balloc>
 802b356:	4602      	mov	r2, r0
 802b358:	b928      	cbnz	r0, 802b366 <__mdiff+0x2e>
 802b35a:	4b3f      	ldr	r3, [pc, #252]	@ (802b458 <__mdiff+0x120>)
 802b35c:	f240 2137 	movw	r1, #567	@ 0x237
 802b360:	483e      	ldr	r0, [pc, #248]	@ (802b45c <__mdiff+0x124>)
 802b362:	f7fe fb75 	bl	8029a50 <__assert_func>
 802b366:	2301      	movs	r3, #1
 802b368:	e9c0 3504 	strd	r3, r5, [r0, #16]
 802b36c:	4610      	mov	r0, r2
 802b36e:	b003      	add	sp, #12
 802b370:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 802b374:	bfbc      	itt	lt
 802b376:	464b      	movlt	r3, r9
 802b378:	46a1      	movlt	r9, r4
 802b37a:	4630      	mov	r0, r6
 802b37c:	f8d9 1004 	ldr.w	r1, [r9, #4]
 802b380:	bfba      	itte	lt
 802b382:	461c      	movlt	r4, r3
 802b384:	2501      	movlt	r5, #1
 802b386:	2500      	movge	r5, #0
 802b388:	f7ff fcf6 	bl	802ad78 <_Balloc>
 802b38c:	4602      	mov	r2, r0
 802b38e:	b918      	cbnz	r0, 802b398 <__mdiff+0x60>
 802b390:	4b31      	ldr	r3, [pc, #196]	@ (802b458 <__mdiff+0x120>)
 802b392:	f240 2145 	movw	r1, #581	@ 0x245
 802b396:	e7e3      	b.n	802b360 <__mdiff+0x28>
 802b398:	f8d9 7010 	ldr.w	r7, [r9, #16]
 802b39c:	6926      	ldr	r6, [r4, #16]
 802b39e:	60c5      	str	r5, [r0, #12]
 802b3a0:	f109 0310 	add.w	r3, r9, #16
 802b3a4:	f109 0514 	add.w	r5, r9, #20
 802b3a8:	f104 0e14 	add.w	lr, r4, #20
 802b3ac:	f100 0b14 	add.w	fp, r0, #20
 802b3b0:	eb05 0887 	add.w	r8, r5, r7, lsl #2
 802b3b4:	eb0e 0686 	add.w	r6, lr, r6, lsl #2
 802b3b8:	9301      	str	r3, [sp, #4]
 802b3ba:	46d9      	mov	r9, fp
 802b3bc:	f04f 0c00 	mov.w	ip, #0
 802b3c0:	9b01      	ldr	r3, [sp, #4]
 802b3c2:	f85e 0b04 	ldr.w	r0, [lr], #4
 802b3c6:	f853 af04 	ldr.w	sl, [r3, #4]!
 802b3ca:	9301      	str	r3, [sp, #4]
 802b3cc:	fa1f f38a 	uxth.w	r3, sl
 802b3d0:	4619      	mov	r1, r3
 802b3d2:	b283      	uxth	r3, r0
 802b3d4:	1acb      	subs	r3, r1, r3
 802b3d6:	0c00      	lsrs	r0, r0, #16
 802b3d8:	4463      	add	r3, ip
 802b3da:	ebc0 401a 	rsb	r0, r0, sl, lsr #16
 802b3de:	eb00 4023 	add.w	r0, r0, r3, asr #16
 802b3e2:	b29b      	uxth	r3, r3
 802b3e4:	ea43 4300 	orr.w	r3, r3, r0, lsl #16
 802b3e8:	4576      	cmp	r6, lr
 802b3ea:	f849 3b04 	str.w	r3, [r9], #4
 802b3ee:	ea4f 4c20 	mov.w	ip, r0, asr #16
 802b3f2:	d8e5      	bhi.n	802b3c0 <__mdiff+0x88>
 802b3f4:	1b33      	subs	r3, r6, r4
 802b3f6:	3b15      	subs	r3, #21
 802b3f8:	f023 0303 	bic.w	r3, r3, #3
 802b3fc:	3415      	adds	r4, #21
 802b3fe:	3304      	adds	r3, #4
 802b400:	42a6      	cmp	r6, r4
 802b402:	bf38      	it	cc
 802b404:	2304      	movcc	r3, #4
 802b406:	441d      	add	r5, r3
 802b408:	445b      	add	r3, fp
 802b40a:	461e      	mov	r6, r3
 802b40c:	462c      	mov	r4, r5
 802b40e:	4544      	cmp	r4, r8
 802b410:	d30e      	bcc.n	802b430 <__mdiff+0xf8>
 802b412:	f108 0103 	add.w	r1, r8, #3
 802b416:	1b49      	subs	r1, r1, r5
 802b418:	f021 0103 	bic.w	r1, r1, #3
 802b41c:	3d03      	subs	r5, #3
 802b41e:	45a8      	cmp	r8, r5
 802b420:	bf38      	it	cc
 802b422:	2100      	movcc	r1, #0
 802b424:	440b      	add	r3, r1
 802b426:	f853 1d04 	ldr.w	r1, [r3, #-4]!
 802b42a:	b191      	cbz	r1, 802b452 <__mdiff+0x11a>
 802b42c:	6117      	str	r7, [r2, #16]
 802b42e:	e79d      	b.n	802b36c <__mdiff+0x34>
 802b430:	f854 1b04 	ldr.w	r1, [r4], #4
 802b434:	46e6      	mov	lr, ip
 802b436:	0c08      	lsrs	r0, r1, #16
 802b438:	fa1c fc81 	uxtah	ip, ip, r1
 802b43c:	4471      	add	r1, lr
 802b43e:	eb00 402c 	add.w	r0, r0, ip, asr #16
 802b442:	b289      	uxth	r1, r1
 802b444:	ea41 4100 	orr.w	r1, r1, r0, lsl #16
 802b448:	f846 1b04 	str.w	r1, [r6], #4
 802b44c:	ea4f 4c20 	mov.w	ip, r0, asr #16
 802b450:	e7dd      	b.n	802b40e <__mdiff+0xd6>
 802b452:	3f01      	subs	r7, #1
 802b454:	e7e7      	b.n	802b426 <__mdiff+0xee>
 802b456:	bf00      	nop
 802b458:	08030a5e 	.word	0x08030a5e
 802b45c:	08030acf 	.word	0x08030acf

0802b460 <__ulp>:
 802b460:	b082      	sub	sp, #8
 802b462:	ed8d 0b00 	vstr	d0, [sp]
 802b466:	9a01      	ldr	r2, [sp, #4]
 802b468:	4b0f      	ldr	r3, [pc, #60]	@ (802b4a8 <__ulp+0x48>)
 802b46a:	4013      	ands	r3, r2
 802b46c:	f1a3 7350 	sub.w	r3, r3, #54525952	@ 0x3400000
 802b470:	2b00      	cmp	r3, #0
 802b472:	dc08      	bgt.n	802b486 <__ulp+0x26>
 802b474:	425b      	negs	r3, r3
 802b476:	f1b3 7fa0 	cmp.w	r3, #20971520	@ 0x1400000
 802b47a:	ea4f 5223 	mov.w	r2, r3, asr #20
 802b47e:	da04      	bge.n	802b48a <__ulp+0x2a>
 802b480:	f44f 2300 	mov.w	r3, #524288	@ 0x80000
 802b484:	4113      	asrs	r3, r2
 802b486:	2200      	movs	r2, #0
 802b488:	e008      	b.n	802b49c <__ulp+0x3c>
 802b48a:	f1a2 0314 	sub.w	r3, r2, #20
 802b48e:	2b1e      	cmp	r3, #30
 802b490:	bfda      	itte	le
 802b492:	f04f 4200 	movle.w	r2, #2147483648	@ 0x80000000
 802b496:	40da      	lsrle	r2, r3
 802b498:	2201      	movgt	r2, #1
 802b49a:	2300      	movs	r3, #0
 802b49c:	4619      	mov	r1, r3
 802b49e:	4610      	mov	r0, r2
 802b4a0:	ec41 0b10 	vmov	d0, r0, r1
 802b4a4:	b002      	add	sp, #8
 802b4a6:	4770      	bx	lr
 802b4a8:	7ff00000 	.word	0x7ff00000

0802b4ac <__b2d>:
 802b4ac:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
 802b4b0:	6906      	ldr	r6, [r0, #16]
 802b4b2:	f100 0814 	add.w	r8, r0, #20
 802b4b6:	eb08 0686 	add.w	r6, r8, r6, lsl #2
 802b4ba:	1f37      	subs	r7, r6, #4
 802b4bc:	f856 2c04 	ldr.w	r2, [r6, #-4]
 802b4c0:	4610      	mov	r0, r2
 802b4c2:	f7ff fd4b 	bl	802af5c <__hi0bits>
 802b4c6:	f1c0 0320 	rsb	r3, r0, #32
 802b4ca:	280a      	cmp	r0, #10
 802b4cc:	600b      	str	r3, [r1, #0]
 802b4ce:	491b      	ldr	r1, [pc, #108]	@ (802b53c <__b2d+0x90>)
 802b4d0:	dc15      	bgt.n	802b4fe <__b2d+0x52>
 802b4d2:	f1c0 0c0b 	rsb	ip, r0, #11
 802b4d6:	fa22 f30c 	lsr.w	r3, r2, ip
 802b4da:	45b8      	cmp	r8, r7
 802b4dc:	ea43 0501 	orr.w	r5, r3, r1
 802b4e0:	bf34      	ite	cc
 802b4e2:	f856 3c08 	ldrcc.w	r3, [r6, #-8]
 802b4e6:	2300      	movcs	r3, #0
 802b4e8:	3015      	adds	r0, #21
 802b4ea:	fa02 f000 	lsl.w	r0, r2, r0
 802b4ee:	fa23 f30c 	lsr.w	r3, r3, ip
 802b4f2:	4303      	orrs	r3, r0
 802b4f4:	461c      	mov	r4, r3
 802b4f6:	ec45 4b10 	vmov	d0, r4, r5
 802b4fa:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 802b4fe:	45b8      	cmp	r8, r7
 802b500:	bf3a      	itte	cc
 802b502:	f856 3c08 	ldrcc.w	r3, [r6, #-8]
 802b506:	f1a6 0708 	subcc.w	r7, r6, #8
 802b50a:	2300      	movcs	r3, #0
 802b50c:	380b      	subs	r0, #11
 802b50e:	d012      	beq.n	802b536 <__b2d+0x8a>
 802b510:	f1c0 0120 	rsb	r1, r0, #32
 802b514:	fa23 f401 	lsr.w	r4, r3, r1
 802b518:	4082      	lsls	r2, r0
 802b51a:	4322      	orrs	r2, r4
 802b51c:	4547      	cmp	r7, r8
 802b51e:	f042 557f 	orr.w	r5, r2, #1069547520	@ 0x3fc00000
 802b522:	bf8c      	ite	hi
 802b524:	f857 2c04 	ldrhi.w	r2, [r7, #-4]
 802b528:	2200      	movls	r2, #0
 802b52a:	4083      	lsls	r3, r0
 802b52c:	40ca      	lsrs	r2, r1
 802b52e:	f445 1540 	orr.w	r5, r5, #3145728	@ 0x300000
 802b532:	4313      	orrs	r3, r2
 802b534:	e7de      	b.n	802b4f4 <__b2d+0x48>
 802b536:	ea42 0501 	orr.w	r5, r2, r1
 802b53a:	e7db      	b.n	802b4f4 <__b2d+0x48>
 802b53c:	3ff00000 	.word	0x3ff00000

0802b540 <__d2b>:
 802b540:	e92d 43f7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr}
 802b544:	460f      	mov	r7, r1
 802b546:	2101      	movs	r1, #1
 802b548:	ec59 8b10 	vmov	r8, r9, d0
 802b54c:	4616      	mov	r6, r2
 802b54e:	f7ff fc13 	bl	802ad78 <_Balloc>
 802b552:	4604      	mov	r4, r0
 802b554:	b930      	cbnz	r0, 802b564 <__d2b+0x24>
 802b556:	4602      	mov	r2, r0
 802b558:	4b23      	ldr	r3, [pc, #140]	@ (802b5e8 <__d2b+0xa8>)
 802b55a:	4824      	ldr	r0, [pc, #144]	@ (802b5ec <__d2b+0xac>)
 802b55c:	f240 310f 	movw	r1, #783	@ 0x30f
 802b560:	f7fe fa76 	bl	8029a50 <__assert_func>
 802b564:	f3c9 550a 	ubfx	r5, r9, #20, #11
 802b568:	f3c9 0313 	ubfx	r3, r9, #0, #20
 802b56c:	b10d      	cbz	r5, 802b572 <__d2b+0x32>
 802b56e:	f443 1380 	orr.w	r3, r3, #1048576	@ 0x100000
 802b572:	9301      	str	r3, [sp, #4]
 802b574:	f1b8 0300 	subs.w	r3, r8, #0
 802b578:	d023      	beq.n	802b5c2 <__d2b+0x82>
 802b57a:	4668      	mov	r0, sp
 802b57c:	9300      	str	r3, [sp, #0]
 802b57e:	f7ff fd0c 	bl	802af9a <__lo0bits>
 802b582:	e9dd 1200 	ldrd	r1, r2, [sp]
 802b586:	b1d0      	cbz	r0, 802b5be <__d2b+0x7e>
 802b588:	f1c0 0320 	rsb	r3, r0, #32
 802b58c:	fa02 f303 	lsl.w	r3, r2, r3
 802b590:	430b      	orrs	r3, r1
 802b592:	40c2      	lsrs	r2, r0
 802b594:	6163      	str	r3, [r4, #20]
 802b596:	9201      	str	r2, [sp, #4]
 802b598:	9b01      	ldr	r3, [sp, #4]
 802b59a:	61a3      	str	r3, [r4, #24]
 802b59c:	2b00      	cmp	r3, #0
 802b59e:	bf0c      	ite	eq
 802b5a0:	2201      	moveq	r2, #1
 802b5a2:	2202      	movne	r2, #2
 802b5a4:	6122      	str	r2, [r4, #16]
 802b5a6:	b1a5      	cbz	r5, 802b5d2 <__d2b+0x92>
 802b5a8:	f2a5 4533 	subw	r5, r5, #1075	@ 0x433
 802b5ac:	4405      	add	r5, r0
 802b5ae:	603d      	str	r5, [r7, #0]
 802b5b0:	f1c0 0035 	rsb	r0, r0, #53	@ 0x35
 802b5b4:	6030      	str	r0, [r6, #0]
 802b5b6:	4620      	mov	r0, r4
 802b5b8:	b003      	add	sp, #12
 802b5ba:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
 802b5be:	6161      	str	r1, [r4, #20]
 802b5c0:	e7ea      	b.n	802b598 <__d2b+0x58>
 802b5c2:	a801      	add	r0, sp, #4
 802b5c4:	f7ff fce9 	bl	802af9a <__lo0bits>
 802b5c8:	9b01      	ldr	r3, [sp, #4]
 802b5ca:	6163      	str	r3, [r4, #20]
 802b5cc:	3020      	adds	r0, #32
 802b5ce:	2201      	movs	r2, #1
 802b5d0:	e7e8      	b.n	802b5a4 <__d2b+0x64>
 802b5d2:	eb04 0382 	add.w	r3, r4, r2, lsl #2
 802b5d6:	f2a0 4032 	subw	r0, r0, #1074	@ 0x432
 802b5da:	6038      	str	r0, [r7, #0]
 802b5dc:	6918      	ldr	r0, [r3, #16]
 802b5de:	f7ff fcbd 	bl	802af5c <__hi0bits>
 802b5e2:	ebc0 1042 	rsb	r0, r0, r2, lsl #5
 802b5e6:	e7e5      	b.n	802b5b4 <__d2b+0x74>
 802b5e8:	08030a5e 	.word	0x08030a5e
 802b5ec:	08030acf 	.word	0x08030acf

0802b5f0 <__ratio>:
 802b5f0:	e92d 4ff7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
 802b5f4:	4688      	mov	r8, r1
 802b5f6:	4669      	mov	r1, sp
 802b5f8:	4681      	mov	r9, r0
 802b5fa:	f7ff ff57 	bl	802b4ac <__b2d>
 802b5fe:	a901      	add	r1, sp, #4
 802b600:	4640      	mov	r0, r8
 802b602:	ec55 4b10 	vmov	r4, r5, d0
 802b606:	f7ff ff51 	bl	802b4ac <__b2d>
 802b60a:	f8d8 3010 	ldr.w	r3, [r8, #16]
 802b60e:	f8d9 2010 	ldr.w	r2, [r9, #16]
 802b612:	1ad2      	subs	r2, r2, r3
 802b614:	e9dd 3100 	ldrd	r3, r1, [sp]
 802b618:	1a5b      	subs	r3, r3, r1
 802b61a:	eb03 1342 	add.w	r3, r3, r2, lsl #5
 802b61e:	ec57 6b10 	vmov	r6, r7, d0
 802b622:	2b00      	cmp	r3, #0
 802b624:	bfd6      	itet	le
 802b626:	ebc3 3303 	rsble	r3, r3, r3, lsl #12
 802b62a:	462a      	movgt	r2, r5
 802b62c:	463a      	movle	r2, r7
 802b62e:	46ab      	mov	fp, r5
 802b630:	46a2      	mov	sl, r4
 802b632:	bfce      	itee	gt
 802b634:	eb02 5b03 	addgt.w	fp, r2, r3, lsl #20
 802b638:	eb02 5303 	addle.w	r3, r2, r3, lsl #20
 802b63c:	ee00 3a90 	vmovle	s1, r3
 802b640:	ec4b ab17 	vmov	d7, sl, fp
 802b644:	ee87 0b00 	vdiv.f64	d0, d7, d0
 802b648:	b003      	add	sp, #12
 802b64a:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}

0802b64e <__copybits>:
 802b64e:	3901      	subs	r1, #1
 802b650:	b570      	push	{r4, r5, r6, lr}
 802b652:	1149      	asrs	r1, r1, #5
 802b654:	6914      	ldr	r4, [r2, #16]
 802b656:	3101      	adds	r1, #1
 802b658:	f102 0314 	add.w	r3, r2, #20
 802b65c:	eb00 0181 	add.w	r1, r0, r1, lsl #2
 802b660:	eb03 0484 	add.w	r4, r3, r4, lsl #2
 802b664:	1f05      	subs	r5, r0, #4
 802b666:	42a3      	cmp	r3, r4
 802b668:	d30c      	bcc.n	802b684 <__copybits+0x36>
 802b66a:	1aa3      	subs	r3, r4, r2
 802b66c:	3b11      	subs	r3, #17
 802b66e:	f023 0303 	bic.w	r3, r3, #3
 802b672:	3211      	adds	r2, #17
 802b674:	42a2      	cmp	r2, r4
 802b676:	bf88      	it	hi
 802b678:	2300      	movhi	r3, #0
 802b67a:	4418      	add	r0, r3
 802b67c:	2300      	movs	r3, #0
 802b67e:	4288      	cmp	r0, r1
 802b680:	d305      	bcc.n	802b68e <__copybits+0x40>
 802b682:	bd70      	pop	{r4, r5, r6, pc}
 802b684:	f853 6b04 	ldr.w	r6, [r3], #4
 802b688:	f845 6f04 	str.w	r6, [r5, #4]!
 802b68c:	e7eb      	b.n	802b666 <__copybits+0x18>
 802b68e:	f840 3b04 	str.w	r3, [r0], #4
 802b692:	e7f4      	b.n	802b67e <__copybits+0x30>

0802b694 <__any_on>:
 802b694:	f100 0214 	add.w	r2, r0, #20
 802b698:	6900      	ldr	r0, [r0, #16]
 802b69a:	114b      	asrs	r3, r1, #5
 802b69c:	4298      	cmp	r0, r3
 802b69e:	b510      	push	{r4, lr}
 802b6a0:	db11      	blt.n	802b6c6 <__any_on+0x32>
 802b6a2:	dd0a      	ble.n	802b6ba <__any_on+0x26>
 802b6a4:	f011 011f 	ands.w	r1, r1, #31
 802b6a8:	d007      	beq.n	802b6ba <__any_on+0x26>
 802b6aa:	f852 4023 	ldr.w	r4, [r2, r3, lsl #2]
 802b6ae:	fa24 f001 	lsr.w	r0, r4, r1
 802b6b2:	fa00 f101 	lsl.w	r1, r0, r1
 802b6b6:	428c      	cmp	r4, r1
 802b6b8:	d10b      	bne.n	802b6d2 <__any_on+0x3e>
 802b6ba:	eb02 0383 	add.w	r3, r2, r3, lsl #2
 802b6be:	4293      	cmp	r3, r2
 802b6c0:	d803      	bhi.n	802b6ca <__any_on+0x36>
 802b6c2:	2000      	movs	r0, #0
 802b6c4:	bd10      	pop	{r4, pc}
 802b6c6:	4603      	mov	r3, r0
 802b6c8:	e7f7      	b.n	802b6ba <__any_on+0x26>
 802b6ca:	f853 1d04 	ldr.w	r1, [r3, #-4]!
 802b6ce:	2900      	cmp	r1, #0
 802b6d0:	d0f5      	beq.n	802b6be <__any_on+0x2a>
 802b6d2:	2001      	movs	r0, #1
 802b6d4:	e7f6      	b.n	802b6c4 <__any_on+0x30>

0802b6d6 <_malloc_usable_size_r>:
 802b6d6:	f851 3c04 	ldr.w	r3, [r1, #-4]
 802b6da:	1f18      	subs	r0, r3, #4
 802b6dc:	2b00      	cmp	r3, #0
 802b6de:	bfbc      	itt	lt
 802b6e0:	580b      	ldrlt	r3, [r1, r0]
 802b6e2:	18c0      	addlt	r0, r0, r3
 802b6e4:	4770      	bx	lr

0802b6e6 <__ascii_wctomb>:
 802b6e6:	4603      	mov	r3, r0
 802b6e8:	4608      	mov	r0, r1
 802b6ea:	b141      	cbz	r1, 802b6fe <__ascii_wctomb+0x18>
 802b6ec:	2aff      	cmp	r2, #255	@ 0xff
 802b6ee:	d904      	bls.n	802b6fa <__ascii_wctomb+0x14>
 802b6f0:	228a      	movs	r2, #138	@ 0x8a
 802b6f2:	601a      	str	r2, [r3, #0]
 802b6f4:	f04f 30ff 	mov.w	r0, #4294967295	@ 0xffffffff
 802b6f8:	4770      	bx	lr
 802b6fa:	700a      	strb	r2, [r1, #0]
 802b6fc:	2001      	movs	r0, #1
 802b6fe:	4770      	bx	lr

0802b700 <__ssputs_r>:
 802b700:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
 802b704:	688e      	ldr	r6, [r1, #8]
 802b706:	461f      	mov	r7, r3
 802b708:	42be      	cmp	r6, r7
 802b70a:	680b      	ldr	r3, [r1, #0]
 802b70c:	4682      	mov	sl, r0
 802b70e:	460c      	mov	r4, r1
 802b710:	4690      	mov	r8, r2
 802b712:	d82d      	bhi.n	802b770 <__ssputs_r+0x70>
 802b714:	f9b1 200c 	ldrsh.w	r2, [r1, #12]
 802b718:	f412 6f90 	tst.w	r2, #1152	@ 0x480
 802b71c:	d026      	beq.n	802b76c <__ssputs_r+0x6c>
 802b71e:	6965      	ldr	r5, [r4, #20]
 802b720:	6909      	ldr	r1, [r1, #16]
 802b722:	eb05 0545 	add.w	r5, r5, r5, lsl #1
 802b726:	eba3 0901 	sub.w	r9, r3, r1
 802b72a:	eb05 75d5 	add.w	r5, r5, r5, lsr #31
 802b72e:	1c7b      	adds	r3, r7, #1
 802b730:	444b      	add	r3, r9
 802b732:	106d      	asrs	r5, r5, #1
 802b734:	429d      	cmp	r5, r3
 802b736:	bf38      	it	cc
 802b738:	461d      	movcc	r5, r3
 802b73a:	0553      	lsls	r3, r2, #21
 802b73c:	d527      	bpl.n	802b78e <__ssputs_r+0x8e>
 802b73e:	4629      	mov	r1, r5
 802b740:	f7fc fb2e 	bl	8027da0 <_malloc_r>
 802b744:	4606      	mov	r6, r0
 802b746:	b360      	cbz	r0, 802b7a2 <__ssputs_r+0xa2>
 802b748:	6921      	ldr	r1, [r4, #16]
 802b74a:	464a      	mov	r2, r9
 802b74c:	f7fe f967 	bl	8029a1e <memcpy>
 802b750:	89a3      	ldrh	r3, [r4, #12]
 802b752:	f423 6390 	bic.w	r3, r3, #1152	@ 0x480
 802b756:	f043 0380 	orr.w	r3, r3, #128	@ 0x80
 802b75a:	81a3      	strh	r3, [r4, #12]
 802b75c:	6126      	str	r6, [r4, #16]
 802b75e:	6165      	str	r5, [r4, #20]
 802b760:	444e      	add	r6, r9
 802b762:	eba5 0509 	sub.w	r5, r5, r9
 802b766:	6026      	str	r6, [r4, #0]
 802b768:	60a5      	str	r5, [r4, #8]
 802b76a:	463e      	mov	r6, r7
 802b76c:	42be      	cmp	r6, r7
 802b76e:	d900      	bls.n	802b772 <__ssputs_r+0x72>
 802b770:	463e      	mov	r6, r7
 802b772:	6820      	ldr	r0, [r4, #0]
 802b774:	4632      	mov	r2, r6
 802b776:	4641      	mov	r1, r8
 802b778:	f7fe f840 	bl	80297fc <memmove>
 802b77c:	68a3      	ldr	r3, [r4, #8]
 802b77e:	1b9b      	subs	r3, r3, r6
 802b780:	60a3      	str	r3, [r4, #8]
 802b782:	6823      	ldr	r3, [r4, #0]
 802b784:	4433      	add	r3, r6
 802b786:	6023      	str	r3, [r4, #0]
 802b788:	2000      	movs	r0, #0
 802b78a:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 802b78e:	462a      	mov	r2, r5
 802b790:	f7fc fbd8 	bl	8027f44 <_realloc_r>
 802b794:	4606      	mov	r6, r0
 802b796:	2800      	cmp	r0, #0
 802b798:	d1e0      	bne.n	802b75c <__ssputs_r+0x5c>
 802b79a:	6921      	ldr	r1, [r4, #16]
 802b79c:	4650      	mov	r0, sl
 802b79e:	f7fe ff55 	bl	802a64c <_free_r>
 802b7a2:	230c      	movs	r3, #12
 802b7a4:	f8ca 3000 	str.w	r3, [sl]
 802b7a8:	89a3      	ldrh	r3, [r4, #12]
 802b7aa:	f043 0340 	orr.w	r3, r3, #64	@ 0x40
 802b7ae:	81a3      	strh	r3, [r4, #12]
 802b7b0:	f04f 30ff 	mov.w	r0, #4294967295	@ 0xffffffff
 802b7b4:	e7e9      	b.n	802b78a <__ssputs_r+0x8a>
	...

0802b7b8 <_svfiprintf_r>:
 802b7b8:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 802b7bc:	4698      	mov	r8, r3
 802b7be:	898b      	ldrh	r3, [r1, #12]
 802b7c0:	061b      	lsls	r3, r3, #24
 802b7c2:	b09d      	sub	sp, #116	@ 0x74
 802b7c4:	4607      	mov	r7, r0
 802b7c6:	460d      	mov	r5, r1
 802b7c8:	4614      	mov	r4, r2
 802b7ca:	d510      	bpl.n	802b7ee <_svfiprintf_r+0x36>
 802b7cc:	690b      	ldr	r3, [r1, #16]
 802b7ce:	b973      	cbnz	r3, 802b7ee <_svfiprintf_r+0x36>
 802b7d0:	2140      	movs	r1, #64	@ 0x40
 802b7d2:	f7fc fae5 	bl	8027da0 <_malloc_r>
 802b7d6:	6028      	str	r0, [r5, #0]
 802b7d8:	6128      	str	r0, [r5, #16]
 802b7da:	b930      	cbnz	r0, 802b7ea <_svfiprintf_r+0x32>
 802b7dc:	230c      	movs	r3, #12
 802b7de:	603b      	str	r3, [r7, #0]
 802b7e0:	f04f 30ff 	mov.w	r0, #4294967295	@ 0xffffffff
 802b7e4:	b01d      	add	sp, #116	@ 0x74
 802b7e6:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 802b7ea:	2340      	movs	r3, #64	@ 0x40
 802b7ec:	616b      	str	r3, [r5, #20]
 802b7ee:	2300      	movs	r3, #0
 802b7f0:	9309      	str	r3, [sp, #36]	@ 0x24
 802b7f2:	2320      	movs	r3, #32
 802b7f4:	f88d 3029 	strb.w	r3, [sp, #41]	@ 0x29
 802b7f8:	f8cd 800c 	str.w	r8, [sp, #12]
 802b7fc:	2330      	movs	r3, #48	@ 0x30
 802b7fe:	f8df 819c 	ldr.w	r8, [pc, #412]	@ 802b99c <_svfiprintf_r+0x1e4>
 802b802:	f88d 302a 	strb.w	r3, [sp, #42]	@ 0x2a
 802b806:	f04f 0901 	mov.w	r9, #1
 802b80a:	4623      	mov	r3, r4
 802b80c:	469a      	mov	sl, r3
 802b80e:	f813 2b01 	ldrb.w	r2, [r3], #1
 802b812:	b10a      	cbz	r2, 802b818 <_svfiprintf_r+0x60>
 802b814:	2a25      	cmp	r2, #37	@ 0x25
 802b816:	d1f9      	bne.n	802b80c <_svfiprintf_r+0x54>
 802b818:	ebba 0b04 	subs.w	fp, sl, r4
 802b81c:	d00b      	beq.n	802b836 <_svfiprintf_r+0x7e>
 802b81e:	465b      	mov	r3, fp
 802b820:	4622      	mov	r2, r4
 802b822:	4629      	mov	r1, r5
 802b824:	4638      	mov	r0, r7
 802b826:	f7ff ff6b 	bl	802b700 <__ssputs_r>
 802b82a:	3001      	adds	r0, #1
 802b82c:	f000 80a7 	beq.w	802b97e <_svfiprintf_r+0x1c6>
 802b830:	9a09      	ldr	r2, [sp, #36]	@ 0x24
 802b832:	445a      	add	r2, fp
 802b834:	9209      	str	r2, [sp, #36]	@ 0x24
 802b836:	f89a 3000 	ldrb.w	r3, [sl]
 802b83a:	2b00      	cmp	r3, #0
 802b83c:	f000 809f 	beq.w	802b97e <_svfiprintf_r+0x1c6>
 802b840:	2300      	movs	r3, #0
 802b842:	f04f 32ff 	mov.w	r2, #4294967295	@ 0xffffffff
 802b846:	e9cd 2305 	strd	r2, r3, [sp, #20]
 802b84a:	f10a 0a01 	add.w	sl, sl, #1
 802b84e:	9304      	str	r3, [sp, #16]
 802b850:	9307      	str	r3, [sp, #28]
 802b852:	f88d 3053 	strb.w	r3, [sp, #83]	@ 0x53
 802b856:	931a      	str	r3, [sp, #104]	@ 0x68
 802b858:	4654      	mov	r4, sl
 802b85a:	2205      	movs	r2, #5
 802b85c:	f814 1b01 	ldrb.w	r1, [r4], #1
 802b860:	484e      	ldr	r0, [pc, #312]	@ (802b99c <_svfiprintf_r+0x1e4>)
 802b862:	f7d4 fd4d 	bl	8000300 <memchr>
 802b866:	9a04      	ldr	r2, [sp, #16]
 802b868:	b9d8      	cbnz	r0, 802b8a2 <_svfiprintf_r+0xea>
 802b86a:	06d0      	lsls	r0, r2, #27
 802b86c:	bf44      	itt	mi
 802b86e:	2320      	movmi	r3, #32
 802b870:	f88d 3053 	strbmi.w	r3, [sp, #83]	@ 0x53
 802b874:	0711      	lsls	r1, r2, #28
 802b876:	bf44      	itt	mi
 802b878:	232b      	movmi	r3, #43	@ 0x2b
 802b87a:	f88d 3053 	strbmi.w	r3, [sp, #83]	@ 0x53
 802b87e:	f89a 3000 	ldrb.w	r3, [sl]
 802b882:	2b2a      	cmp	r3, #42	@ 0x2a
 802b884:	d015      	beq.n	802b8b2 <_svfiprintf_r+0xfa>
 802b886:	9a07      	ldr	r2, [sp, #28]
 802b888:	4654      	mov	r4, sl
 802b88a:	2000      	movs	r0, #0
 802b88c:	f04f 0c0a 	mov.w	ip, #10
 802b890:	4621      	mov	r1, r4
 802b892:	f811 3b01 	ldrb.w	r3, [r1], #1
 802b896:	3b30      	subs	r3, #48	@ 0x30
 802b898:	2b09      	cmp	r3, #9
 802b89a:	d94b      	bls.n	802b934 <_svfiprintf_r+0x17c>
 802b89c:	b1b0      	cbz	r0, 802b8cc <_svfiprintf_r+0x114>
 802b89e:	9207      	str	r2, [sp, #28]
 802b8a0:	e014      	b.n	802b8cc <_svfiprintf_r+0x114>
 802b8a2:	eba0 0308 	sub.w	r3, r0, r8
 802b8a6:	fa09 f303 	lsl.w	r3, r9, r3
 802b8aa:	4313      	orrs	r3, r2
 802b8ac:	9304      	str	r3, [sp, #16]
 802b8ae:	46a2      	mov	sl, r4
 802b8b0:	e7d2      	b.n	802b858 <_svfiprintf_r+0xa0>
 802b8b2:	9b03      	ldr	r3, [sp, #12]
 802b8b4:	1d19      	adds	r1, r3, #4
 802b8b6:	681b      	ldr	r3, [r3, #0]
 802b8b8:	9103      	str	r1, [sp, #12]
 802b8ba:	2b00      	cmp	r3, #0
 802b8bc:	bfbb      	ittet	lt
 802b8be:	425b      	neglt	r3, r3
 802b8c0:	f042 0202 	orrlt.w	r2, r2, #2
 802b8c4:	9307      	strge	r3, [sp, #28]
 802b8c6:	9307      	strlt	r3, [sp, #28]
 802b8c8:	bfb8      	it	lt
 802b8ca:	9204      	strlt	r2, [sp, #16]
 802b8cc:	7823      	ldrb	r3, [r4, #0]
 802b8ce:	2b2e      	cmp	r3, #46	@ 0x2e
 802b8d0:	d10a      	bne.n	802b8e8 <_svfiprintf_r+0x130>
 802b8d2:	7863      	ldrb	r3, [r4, #1]
 802b8d4:	2b2a      	cmp	r3, #42	@ 0x2a
 802b8d6:	d132      	bne.n	802b93e <_svfiprintf_r+0x186>
 802b8d8:	9b03      	ldr	r3, [sp, #12]
 802b8da:	1d1a      	adds	r2, r3, #4
 802b8dc:	681b      	ldr	r3, [r3, #0]
 802b8de:	9203      	str	r2, [sp, #12]
 802b8e0:	ea43 73e3 	orr.w	r3, r3, r3, asr #31
 802b8e4:	3402      	adds	r4, #2
 802b8e6:	9305      	str	r3, [sp, #20]
 802b8e8:	f8df a0c0 	ldr.w	sl, [pc, #192]	@ 802b9ac <_svfiprintf_r+0x1f4>
 802b8ec:	7821      	ldrb	r1, [r4, #0]
 802b8ee:	2203      	movs	r2, #3
 802b8f0:	4650      	mov	r0, sl
 802b8f2:	f7d4 fd05 	bl	8000300 <memchr>
 802b8f6:	b138      	cbz	r0, 802b908 <_svfiprintf_r+0x150>
 802b8f8:	9b04      	ldr	r3, [sp, #16]
 802b8fa:	eba0 000a 	sub.w	r0, r0, sl
 802b8fe:	2240      	movs	r2, #64	@ 0x40
 802b900:	4082      	lsls	r2, r0
 802b902:	4313      	orrs	r3, r2
 802b904:	3401      	adds	r4, #1
 802b906:	9304      	str	r3, [sp, #16]
 802b908:	f814 1b01 	ldrb.w	r1, [r4], #1
 802b90c:	4824      	ldr	r0, [pc, #144]	@ (802b9a0 <_svfiprintf_r+0x1e8>)
 802b90e:	f88d 1028 	strb.w	r1, [sp, #40]	@ 0x28
 802b912:	2206      	movs	r2, #6
 802b914:	f7d4 fcf4 	bl	8000300 <memchr>
 802b918:	2800      	cmp	r0, #0
 802b91a:	d036      	beq.n	802b98a <_svfiprintf_r+0x1d2>
 802b91c:	4b21      	ldr	r3, [pc, #132]	@ (802b9a4 <_svfiprintf_r+0x1ec>)
 802b91e:	bb1b      	cbnz	r3, 802b968 <_svfiprintf_r+0x1b0>
 802b920:	9b03      	ldr	r3, [sp, #12]
 802b922:	3307      	adds	r3, #7
 802b924:	f023 0307 	bic.w	r3, r3, #7
 802b928:	3308      	adds	r3, #8
 802b92a:	9303      	str	r3, [sp, #12]
 802b92c:	9b09      	ldr	r3, [sp, #36]	@ 0x24
 802b92e:	4433      	add	r3, r6
 802b930:	9309      	str	r3, [sp, #36]	@ 0x24
 802b932:	e76a      	b.n	802b80a <_svfiprintf_r+0x52>
 802b934:	fb0c 3202 	mla	r2, ip, r2, r3
 802b938:	460c      	mov	r4, r1
 802b93a:	2001      	movs	r0, #1
 802b93c:	e7a8      	b.n	802b890 <_svfiprintf_r+0xd8>
 802b93e:	2300      	movs	r3, #0
 802b940:	3401      	adds	r4, #1
 802b942:	9305      	str	r3, [sp, #20]
 802b944:	4619      	mov	r1, r3
 802b946:	f04f 0c0a 	mov.w	ip, #10
 802b94a:	4620      	mov	r0, r4
 802b94c:	f810 2b01 	ldrb.w	r2, [r0], #1
 802b950:	3a30      	subs	r2, #48	@ 0x30
 802b952:	2a09      	cmp	r2, #9
 802b954:	d903      	bls.n	802b95e <_svfiprintf_r+0x1a6>
 802b956:	2b00      	cmp	r3, #0
 802b958:	d0c6      	beq.n	802b8e8 <_svfiprintf_r+0x130>
 802b95a:	9105      	str	r1, [sp, #20]
 802b95c:	e7c4      	b.n	802b8e8 <_svfiprintf_r+0x130>
 802b95e:	fb0c 2101 	mla	r1, ip, r1, r2
 802b962:	4604      	mov	r4, r0
 802b964:	2301      	movs	r3, #1
 802b966:	e7f0      	b.n	802b94a <_svfiprintf_r+0x192>
 802b968:	ab03      	add	r3, sp, #12
 802b96a:	9300      	str	r3, [sp, #0]
 802b96c:	462a      	mov	r2, r5
 802b96e:	4b0e      	ldr	r3, [pc, #56]	@ (802b9a8 <_svfiprintf_r+0x1f0>)
 802b970:	a904      	add	r1, sp, #16
 802b972:	4638      	mov	r0, r7
 802b974:	f7fd f960 	bl	8028c38 <_printf_float>
 802b978:	1c42      	adds	r2, r0, #1
 802b97a:	4606      	mov	r6, r0
 802b97c:	d1d6      	bne.n	802b92c <_svfiprintf_r+0x174>
 802b97e:	89ab      	ldrh	r3, [r5, #12]
 802b980:	065b      	lsls	r3, r3, #25
 802b982:	f53f af2d 	bmi.w	802b7e0 <_svfiprintf_r+0x28>
 802b986:	9809      	ldr	r0, [sp, #36]	@ 0x24
 802b988:	e72c      	b.n	802b7e4 <_svfiprintf_r+0x2c>
 802b98a:	ab03      	add	r3, sp, #12
 802b98c:	9300      	str	r3, [sp, #0]
 802b98e:	462a      	mov	r2, r5
 802b990:	4b05      	ldr	r3, [pc, #20]	@ (802b9a8 <_svfiprintf_r+0x1f0>)
 802b992:	a904      	add	r1, sp, #16
 802b994:	4638      	mov	r0, r7
 802b996:	f7fd fbd7 	bl	8029148 <_printf_i>
 802b99a:	e7ed      	b.n	802b978 <_svfiprintf_r+0x1c0>
 802b99c:	08030c28 	.word	0x08030c28
 802b9a0:	08030c32 	.word	0x08030c32
 802b9a4:	08028c39 	.word	0x08028c39
 802b9a8:	0802b701 	.word	0x0802b701
 802b9ac:	08030c2e 	.word	0x08030c2e

0802b9b0 <__sfputc_r>:
 802b9b0:	6893      	ldr	r3, [r2, #8]
 802b9b2:	3b01      	subs	r3, #1
 802b9b4:	2b00      	cmp	r3, #0
 802b9b6:	b410      	push	{r4}
 802b9b8:	6093      	str	r3, [r2, #8]
 802b9ba:	da08      	bge.n	802b9ce <__sfputc_r+0x1e>
 802b9bc:	6994      	ldr	r4, [r2, #24]
 802b9be:	42a3      	cmp	r3, r4
 802b9c0:	db01      	blt.n	802b9c6 <__sfputc_r+0x16>
 802b9c2:	290a      	cmp	r1, #10
 802b9c4:	d103      	bne.n	802b9ce <__sfputc_r+0x1e>
 802b9c6:	f85d 4b04 	ldr.w	r4, [sp], #4
 802b9ca:	f7fd be72 	b.w	80296b2 <__swbuf_r>
 802b9ce:	6813      	ldr	r3, [r2, #0]
 802b9d0:	1c58      	adds	r0, r3, #1
 802b9d2:	6010      	str	r0, [r2, #0]
 802b9d4:	7019      	strb	r1, [r3, #0]
 802b9d6:	4608      	mov	r0, r1
 802b9d8:	f85d 4b04 	ldr.w	r4, [sp], #4
 802b9dc:	4770      	bx	lr

0802b9de <__sfputs_r>:
 802b9de:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 802b9e0:	4606      	mov	r6, r0
 802b9e2:	460f      	mov	r7, r1
 802b9e4:	4614      	mov	r4, r2
 802b9e6:	18d5      	adds	r5, r2, r3
 802b9e8:	42ac      	cmp	r4, r5
 802b9ea:	d101      	bne.n	802b9f0 <__sfputs_r+0x12>
 802b9ec:	2000      	movs	r0, #0
 802b9ee:	e007      	b.n	802ba00 <__sfputs_r+0x22>
 802b9f0:	f814 1b01 	ldrb.w	r1, [r4], #1
 802b9f4:	463a      	mov	r2, r7
 802b9f6:	4630      	mov	r0, r6
 802b9f8:	f7ff ffda 	bl	802b9b0 <__sfputc_r>
 802b9fc:	1c43      	adds	r3, r0, #1
 802b9fe:	d1f3      	bne.n	802b9e8 <__sfputs_r+0xa>
 802ba00:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
	...

0802ba04 <_vfiprintf_r>:
 802ba04:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 802ba08:	460d      	mov	r5, r1
 802ba0a:	b09d      	sub	sp, #116	@ 0x74
 802ba0c:	4614      	mov	r4, r2
 802ba0e:	4698      	mov	r8, r3
 802ba10:	4606      	mov	r6, r0
 802ba12:	b118      	cbz	r0, 802ba1c <_vfiprintf_r+0x18>
 802ba14:	6a03      	ldr	r3, [r0, #32]
 802ba16:	b90b      	cbnz	r3, 802ba1c <_vfiprintf_r+0x18>
 802ba18:	f7fd fd42 	bl	80294a0 <__sinit>
 802ba1c:	6e6b      	ldr	r3, [r5, #100]	@ 0x64
 802ba1e:	07d9      	lsls	r1, r3, #31
 802ba20:	d405      	bmi.n	802ba2e <_vfiprintf_r+0x2a>
 802ba22:	89ab      	ldrh	r3, [r5, #12]
 802ba24:	059a      	lsls	r2, r3, #22
 802ba26:	d402      	bmi.n	802ba2e <_vfiprintf_r+0x2a>
 802ba28:	6da8      	ldr	r0, [r5, #88]	@ 0x58
 802ba2a:	f7fd fff6 	bl	8029a1a <__retarget_lock_acquire_recursive>
 802ba2e:	89ab      	ldrh	r3, [r5, #12]
 802ba30:	071b      	lsls	r3, r3, #28
 802ba32:	d501      	bpl.n	802ba38 <_vfiprintf_r+0x34>
 802ba34:	692b      	ldr	r3, [r5, #16]
 802ba36:	b99b      	cbnz	r3, 802ba60 <_vfiprintf_r+0x5c>
 802ba38:	4629      	mov	r1, r5
 802ba3a:	4630      	mov	r0, r6
 802ba3c:	f7fd fe78 	bl	8029730 <__swsetup_r>
 802ba40:	b170      	cbz	r0, 802ba60 <_vfiprintf_r+0x5c>
 802ba42:	6e6b      	ldr	r3, [r5, #100]	@ 0x64
 802ba44:	07dc      	lsls	r4, r3, #31
 802ba46:	d504      	bpl.n	802ba52 <_vfiprintf_r+0x4e>
 802ba48:	f04f 30ff 	mov.w	r0, #4294967295	@ 0xffffffff
 802ba4c:	b01d      	add	sp, #116	@ 0x74
 802ba4e:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 802ba52:	89ab      	ldrh	r3, [r5, #12]
 802ba54:	0598      	lsls	r0, r3, #22
 802ba56:	d4f7      	bmi.n	802ba48 <_vfiprintf_r+0x44>
 802ba58:	6da8      	ldr	r0, [r5, #88]	@ 0x58
 802ba5a:	f7fd ffdf 	bl	8029a1c <__retarget_lock_release_recursive>
 802ba5e:	e7f3      	b.n	802ba48 <_vfiprintf_r+0x44>
 802ba60:	2300      	movs	r3, #0
 802ba62:	9309      	str	r3, [sp, #36]	@ 0x24
 802ba64:	2320      	movs	r3, #32
 802ba66:	f88d 3029 	strb.w	r3, [sp, #41]	@ 0x29
 802ba6a:	f8cd 800c 	str.w	r8, [sp, #12]
 802ba6e:	2330      	movs	r3, #48	@ 0x30
 802ba70:	f8df 81ac 	ldr.w	r8, [pc, #428]	@ 802bc20 <_vfiprintf_r+0x21c>
 802ba74:	f88d 302a 	strb.w	r3, [sp, #42]	@ 0x2a
 802ba78:	f04f 0901 	mov.w	r9, #1
 802ba7c:	4623      	mov	r3, r4
 802ba7e:	469a      	mov	sl, r3
 802ba80:	f813 2b01 	ldrb.w	r2, [r3], #1
 802ba84:	b10a      	cbz	r2, 802ba8a <_vfiprintf_r+0x86>
 802ba86:	2a25      	cmp	r2, #37	@ 0x25
 802ba88:	d1f9      	bne.n	802ba7e <_vfiprintf_r+0x7a>
 802ba8a:	ebba 0b04 	subs.w	fp, sl, r4
 802ba8e:	d00b      	beq.n	802baa8 <_vfiprintf_r+0xa4>
 802ba90:	465b      	mov	r3, fp
 802ba92:	4622      	mov	r2, r4
 802ba94:	4629      	mov	r1, r5
 802ba96:	4630      	mov	r0, r6
 802ba98:	f7ff ffa1 	bl	802b9de <__sfputs_r>
 802ba9c:	3001      	adds	r0, #1
 802ba9e:	f000 80a7 	beq.w	802bbf0 <_vfiprintf_r+0x1ec>
 802baa2:	9a09      	ldr	r2, [sp, #36]	@ 0x24
 802baa4:	445a      	add	r2, fp
 802baa6:	9209      	str	r2, [sp, #36]	@ 0x24
 802baa8:	f89a 3000 	ldrb.w	r3, [sl]
 802baac:	2b00      	cmp	r3, #0
 802baae:	f000 809f 	beq.w	802bbf0 <_vfiprintf_r+0x1ec>
 802bab2:	2300      	movs	r3, #0
 802bab4:	f04f 32ff 	mov.w	r2, #4294967295	@ 0xffffffff
 802bab8:	e9cd 2305 	strd	r2, r3, [sp, #20]
 802babc:	f10a 0a01 	add.w	sl, sl, #1
 802bac0:	9304      	str	r3, [sp, #16]
 802bac2:	9307      	str	r3, [sp, #28]
 802bac4:	f88d 3053 	strb.w	r3, [sp, #83]	@ 0x53
 802bac8:	931a      	str	r3, [sp, #104]	@ 0x68
 802baca:	4654      	mov	r4, sl
 802bacc:	2205      	movs	r2, #5
 802bace:	f814 1b01 	ldrb.w	r1, [r4], #1
 802bad2:	4853      	ldr	r0, [pc, #332]	@ (802bc20 <_vfiprintf_r+0x21c>)
 802bad4:	f7d4 fc14 	bl	8000300 <memchr>
 802bad8:	9a04      	ldr	r2, [sp, #16]
 802bada:	b9d8      	cbnz	r0, 802bb14 <_vfiprintf_r+0x110>
 802badc:	06d1      	lsls	r1, r2, #27
 802bade:	bf44      	itt	mi
 802bae0:	2320      	movmi	r3, #32
 802bae2:	f88d 3053 	strbmi.w	r3, [sp, #83]	@ 0x53
 802bae6:	0713      	lsls	r3, r2, #28
 802bae8:	bf44      	itt	mi
 802baea:	232b      	movmi	r3, #43	@ 0x2b
 802baec:	f88d 3053 	strbmi.w	r3, [sp, #83]	@ 0x53
 802baf0:	f89a 3000 	ldrb.w	r3, [sl]
 802baf4:	2b2a      	cmp	r3, #42	@ 0x2a
 802baf6:	d015      	beq.n	802bb24 <_vfiprintf_r+0x120>
 802baf8:	9a07      	ldr	r2, [sp, #28]
 802bafa:	4654      	mov	r4, sl
 802bafc:	2000      	movs	r0, #0
 802bafe:	f04f 0c0a 	mov.w	ip, #10
 802bb02:	4621      	mov	r1, r4
 802bb04:	f811 3b01 	ldrb.w	r3, [r1], #1
 802bb08:	3b30      	subs	r3, #48	@ 0x30
 802bb0a:	2b09      	cmp	r3, #9
 802bb0c:	d94b      	bls.n	802bba6 <_vfiprintf_r+0x1a2>
 802bb0e:	b1b0      	cbz	r0, 802bb3e <_vfiprintf_r+0x13a>
 802bb10:	9207      	str	r2, [sp, #28]
 802bb12:	e014      	b.n	802bb3e <_vfiprintf_r+0x13a>
 802bb14:	eba0 0308 	sub.w	r3, r0, r8
 802bb18:	fa09 f303 	lsl.w	r3, r9, r3
 802bb1c:	4313      	orrs	r3, r2
 802bb1e:	9304      	str	r3, [sp, #16]
 802bb20:	46a2      	mov	sl, r4
 802bb22:	e7d2      	b.n	802baca <_vfiprintf_r+0xc6>
 802bb24:	9b03      	ldr	r3, [sp, #12]
 802bb26:	1d19      	adds	r1, r3, #4
 802bb28:	681b      	ldr	r3, [r3, #0]
 802bb2a:	9103      	str	r1, [sp, #12]
 802bb2c:	2b00      	cmp	r3, #0
 802bb2e:	bfbb      	ittet	lt
 802bb30:	425b      	neglt	r3, r3
 802bb32:	f042 0202 	orrlt.w	r2, r2, #2
 802bb36:	9307      	strge	r3, [sp, #28]
 802bb38:	9307      	strlt	r3, [sp, #28]
 802bb3a:	bfb8      	it	lt
 802bb3c:	9204      	strlt	r2, [sp, #16]
 802bb3e:	7823      	ldrb	r3, [r4, #0]
 802bb40:	2b2e      	cmp	r3, #46	@ 0x2e
 802bb42:	d10a      	bne.n	802bb5a <_vfiprintf_r+0x156>
 802bb44:	7863      	ldrb	r3, [r4, #1]
 802bb46:	2b2a      	cmp	r3, #42	@ 0x2a
 802bb48:	d132      	bne.n	802bbb0 <_vfiprintf_r+0x1ac>
 802bb4a:	9b03      	ldr	r3, [sp, #12]
 802bb4c:	1d1a      	adds	r2, r3, #4
 802bb4e:	681b      	ldr	r3, [r3, #0]
 802bb50:	9203      	str	r2, [sp, #12]
 802bb52:	ea43 73e3 	orr.w	r3, r3, r3, asr #31
 802bb56:	3402      	adds	r4, #2
 802bb58:	9305      	str	r3, [sp, #20]
 802bb5a:	f8df a0d4 	ldr.w	sl, [pc, #212]	@ 802bc30 <_vfiprintf_r+0x22c>
 802bb5e:	7821      	ldrb	r1, [r4, #0]
 802bb60:	2203      	movs	r2, #3
 802bb62:	4650      	mov	r0, sl
 802bb64:	f7d4 fbcc 	bl	8000300 <memchr>
 802bb68:	b138      	cbz	r0, 802bb7a <_vfiprintf_r+0x176>
 802bb6a:	9b04      	ldr	r3, [sp, #16]
 802bb6c:	eba0 000a 	sub.w	r0, r0, sl
 802bb70:	2240      	movs	r2, #64	@ 0x40
 802bb72:	4082      	lsls	r2, r0
 802bb74:	4313      	orrs	r3, r2
 802bb76:	3401      	adds	r4, #1
 802bb78:	9304      	str	r3, [sp, #16]
 802bb7a:	f814 1b01 	ldrb.w	r1, [r4], #1
 802bb7e:	4829      	ldr	r0, [pc, #164]	@ (802bc24 <_vfiprintf_r+0x220>)
 802bb80:	f88d 1028 	strb.w	r1, [sp, #40]	@ 0x28
 802bb84:	2206      	movs	r2, #6
 802bb86:	f7d4 fbbb 	bl	8000300 <memchr>
 802bb8a:	2800      	cmp	r0, #0
 802bb8c:	d03f      	beq.n	802bc0e <_vfiprintf_r+0x20a>
 802bb8e:	4b26      	ldr	r3, [pc, #152]	@ (802bc28 <_vfiprintf_r+0x224>)
 802bb90:	bb1b      	cbnz	r3, 802bbda <_vfiprintf_r+0x1d6>
 802bb92:	9b03      	ldr	r3, [sp, #12]
 802bb94:	3307      	adds	r3, #7
 802bb96:	f023 0307 	bic.w	r3, r3, #7
 802bb9a:	3308      	adds	r3, #8
 802bb9c:	9303      	str	r3, [sp, #12]
 802bb9e:	9b09      	ldr	r3, [sp, #36]	@ 0x24
 802bba0:	443b      	add	r3, r7
 802bba2:	9309      	str	r3, [sp, #36]	@ 0x24
 802bba4:	e76a      	b.n	802ba7c <_vfiprintf_r+0x78>
 802bba6:	fb0c 3202 	mla	r2, ip, r2, r3
 802bbaa:	460c      	mov	r4, r1
 802bbac:	2001      	movs	r0, #1
 802bbae:	e7a8      	b.n	802bb02 <_vfiprintf_r+0xfe>
 802bbb0:	2300      	movs	r3, #0
 802bbb2:	3401      	adds	r4, #1
 802bbb4:	9305      	str	r3, [sp, #20]
 802bbb6:	4619      	mov	r1, r3
 802bbb8:	f04f 0c0a 	mov.w	ip, #10
 802bbbc:	4620      	mov	r0, r4
 802bbbe:	f810 2b01 	ldrb.w	r2, [r0], #1
 802bbc2:	3a30      	subs	r2, #48	@ 0x30
 802bbc4:	2a09      	cmp	r2, #9
 802bbc6:	d903      	bls.n	802bbd0 <_vfiprintf_r+0x1cc>
 802bbc8:	2b00      	cmp	r3, #0
 802bbca:	d0c6      	beq.n	802bb5a <_vfiprintf_r+0x156>
 802bbcc:	9105      	str	r1, [sp, #20]
 802bbce:	e7c4      	b.n	802bb5a <_vfiprintf_r+0x156>
 802bbd0:	fb0c 2101 	mla	r1, ip, r1, r2
 802bbd4:	4604      	mov	r4, r0
 802bbd6:	2301      	movs	r3, #1
 802bbd8:	e7f0      	b.n	802bbbc <_vfiprintf_r+0x1b8>
 802bbda:	ab03      	add	r3, sp, #12
 802bbdc:	9300      	str	r3, [sp, #0]
 802bbde:	462a      	mov	r2, r5
 802bbe0:	4b12      	ldr	r3, [pc, #72]	@ (802bc2c <_vfiprintf_r+0x228>)
 802bbe2:	a904      	add	r1, sp, #16
 802bbe4:	4630      	mov	r0, r6
 802bbe6:	f7fd f827 	bl	8028c38 <_printf_float>
 802bbea:	4607      	mov	r7, r0
 802bbec:	1c78      	adds	r0, r7, #1
 802bbee:	d1d6      	bne.n	802bb9e <_vfiprintf_r+0x19a>
 802bbf0:	6e6b      	ldr	r3, [r5, #100]	@ 0x64
 802bbf2:	07d9      	lsls	r1, r3, #31
 802bbf4:	d405      	bmi.n	802bc02 <_vfiprintf_r+0x1fe>
 802bbf6:	89ab      	ldrh	r3, [r5, #12]
 802bbf8:	059a      	lsls	r2, r3, #22
 802bbfa:	d402      	bmi.n	802bc02 <_vfiprintf_r+0x1fe>
 802bbfc:	6da8      	ldr	r0, [r5, #88]	@ 0x58
 802bbfe:	f7fd ff0d 	bl	8029a1c <__retarget_lock_release_recursive>
 802bc02:	89ab      	ldrh	r3, [r5, #12]
 802bc04:	065b      	lsls	r3, r3, #25
 802bc06:	f53f af1f 	bmi.w	802ba48 <_vfiprintf_r+0x44>
 802bc0a:	9809      	ldr	r0, [sp, #36]	@ 0x24
 802bc0c:	e71e      	b.n	802ba4c <_vfiprintf_r+0x48>
 802bc0e:	ab03      	add	r3, sp, #12
 802bc10:	9300      	str	r3, [sp, #0]
 802bc12:	462a      	mov	r2, r5
 802bc14:	4b05      	ldr	r3, [pc, #20]	@ (802bc2c <_vfiprintf_r+0x228>)
 802bc16:	a904      	add	r1, sp, #16
 802bc18:	4630      	mov	r0, r6
 802bc1a:	f7fd fa95 	bl	8029148 <_printf_i>
 802bc1e:	e7e4      	b.n	802bbea <_vfiprintf_r+0x1e6>
 802bc20:	08030c28 	.word	0x08030c28
 802bc24:	08030c32 	.word	0x08030c32
 802bc28:	08028c39 	.word	0x08028c39
 802bc2c:	0802b9df 	.word	0x0802b9df
 802bc30:	08030c2e 	.word	0x08030c2e

0802bc34 <__sflush_r>:
 802bc34:	f9b1 200c 	ldrsh.w	r2, [r1, #12]
 802bc38:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
 802bc3c:	0716      	lsls	r6, r2, #28
 802bc3e:	4605      	mov	r5, r0
 802bc40:	460c      	mov	r4, r1
 802bc42:	d454      	bmi.n	802bcee <__sflush_r+0xba>
 802bc44:	684b      	ldr	r3, [r1, #4]
 802bc46:	2b00      	cmp	r3, #0
 802bc48:	dc02      	bgt.n	802bc50 <__sflush_r+0x1c>
 802bc4a:	6c0b      	ldr	r3, [r1, #64]	@ 0x40
 802bc4c:	2b00      	cmp	r3, #0
 802bc4e:	dd48      	ble.n	802bce2 <__sflush_r+0xae>
 802bc50:	6ae6      	ldr	r6, [r4, #44]	@ 0x2c
 802bc52:	2e00      	cmp	r6, #0
 802bc54:	d045      	beq.n	802bce2 <__sflush_r+0xae>
 802bc56:	2300      	movs	r3, #0
 802bc58:	f412 5280 	ands.w	r2, r2, #4096	@ 0x1000
 802bc5c:	682f      	ldr	r7, [r5, #0]
 802bc5e:	6a21      	ldr	r1, [r4, #32]
 802bc60:	602b      	str	r3, [r5, #0]
 802bc62:	d030      	beq.n	802bcc6 <__sflush_r+0x92>
 802bc64:	6d62      	ldr	r2, [r4, #84]	@ 0x54
 802bc66:	89a3      	ldrh	r3, [r4, #12]
 802bc68:	0759      	lsls	r1, r3, #29
 802bc6a:	d505      	bpl.n	802bc78 <__sflush_r+0x44>
 802bc6c:	6863      	ldr	r3, [r4, #4]
 802bc6e:	1ad2      	subs	r2, r2, r3
 802bc70:	6b63      	ldr	r3, [r4, #52]	@ 0x34
 802bc72:	b10b      	cbz	r3, 802bc78 <__sflush_r+0x44>
 802bc74:	6c23      	ldr	r3, [r4, #64]	@ 0x40
 802bc76:	1ad2      	subs	r2, r2, r3
 802bc78:	2300      	movs	r3, #0
 802bc7a:	6ae6      	ldr	r6, [r4, #44]	@ 0x2c
 802bc7c:	6a21      	ldr	r1, [r4, #32]
 802bc7e:	4628      	mov	r0, r5
 802bc80:	47b0      	blx	r6
 802bc82:	1c43      	adds	r3, r0, #1
 802bc84:	89a3      	ldrh	r3, [r4, #12]
 802bc86:	d106      	bne.n	802bc96 <__sflush_r+0x62>
 802bc88:	6829      	ldr	r1, [r5, #0]
 802bc8a:	291d      	cmp	r1, #29
 802bc8c:	d82b      	bhi.n	802bce6 <__sflush_r+0xb2>
 802bc8e:	4a2a      	ldr	r2, [pc, #168]	@ (802bd38 <__sflush_r+0x104>)
 802bc90:	410a      	asrs	r2, r1
 802bc92:	07d6      	lsls	r6, r2, #31
 802bc94:	d427      	bmi.n	802bce6 <__sflush_r+0xb2>
 802bc96:	2200      	movs	r2, #0
 802bc98:	6062      	str	r2, [r4, #4]
 802bc9a:	04d9      	lsls	r1, r3, #19
 802bc9c:	6922      	ldr	r2, [r4, #16]
 802bc9e:	6022      	str	r2, [r4, #0]
 802bca0:	d504      	bpl.n	802bcac <__sflush_r+0x78>
 802bca2:	1c42      	adds	r2, r0, #1
 802bca4:	d101      	bne.n	802bcaa <__sflush_r+0x76>
 802bca6:	682b      	ldr	r3, [r5, #0]
 802bca8:	b903      	cbnz	r3, 802bcac <__sflush_r+0x78>
 802bcaa:	6560      	str	r0, [r4, #84]	@ 0x54
 802bcac:	6b61      	ldr	r1, [r4, #52]	@ 0x34
 802bcae:	602f      	str	r7, [r5, #0]
 802bcb0:	b1b9      	cbz	r1, 802bce2 <__sflush_r+0xae>
 802bcb2:	f104 0344 	add.w	r3, r4, #68	@ 0x44
 802bcb6:	4299      	cmp	r1, r3
 802bcb8:	d002      	beq.n	802bcc0 <__sflush_r+0x8c>
 802bcba:	4628      	mov	r0, r5
 802bcbc:	f7fe fcc6 	bl	802a64c <_free_r>
 802bcc0:	2300      	movs	r3, #0
 802bcc2:	6363      	str	r3, [r4, #52]	@ 0x34
 802bcc4:	e00d      	b.n	802bce2 <__sflush_r+0xae>
 802bcc6:	2301      	movs	r3, #1
 802bcc8:	4628      	mov	r0, r5
 802bcca:	47b0      	blx	r6
 802bccc:	4602      	mov	r2, r0
 802bcce:	1c50      	adds	r0, r2, #1
 802bcd0:	d1c9      	bne.n	802bc66 <__sflush_r+0x32>
 802bcd2:	682b      	ldr	r3, [r5, #0]
 802bcd4:	2b00      	cmp	r3, #0
 802bcd6:	d0c6      	beq.n	802bc66 <__sflush_r+0x32>
 802bcd8:	2b1d      	cmp	r3, #29
 802bcda:	d001      	beq.n	802bce0 <__sflush_r+0xac>
 802bcdc:	2b16      	cmp	r3, #22
 802bcde:	d11e      	bne.n	802bd1e <__sflush_r+0xea>
 802bce0:	602f      	str	r7, [r5, #0]
 802bce2:	2000      	movs	r0, #0
 802bce4:	e022      	b.n	802bd2c <__sflush_r+0xf8>
 802bce6:	f043 0340 	orr.w	r3, r3, #64	@ 0x40
 802bcea:	b21b      	sxth	r3, r3
 802bcec:	e01b      	b.n	802bd26 <__sflush_r+0xf2>
 802bcee:	690f      	ldr	r7, [r1, #16]
 802bcf0:	2f00      	cmp	r7, #0
 802bcf2:	d0f6      	beq.n	802bce2 <__sflush_r+0xae>
 802bcf4:	0793      	lsls	r3, r2, #30
 802bcf6:	680e      	ldr	r6, [r1, #0]
 802bcf8:	bf08      	it	eq
 802bcfa:	694b      	ldreq	r3, [r1, #20]
 802bcfc:	600f      	str	r7, [r1, #0]
 802bcfe:	bf18      	it	ne
 802bd00:	2300      	movne	r3, #0
 802bd02:	eba6 0807 	sub.w	r8, r6, r7
 802bd06:	608b      	str	r3, [r1, #8]
 802bd08:	f1b8 0f00 	cmp.w	r8, #0
 802bd0c:	dde9      	ble.n	802bce2 <__sflush_r+0xae>
 802bd0e:	6a21      	ldr	r1, [r4, #32]
 802bd10:	6aa6      	ldr	r6, [r4, #40]	@ 0x28
 802bd12:	4643      	mov	r3, r8
 802bd14:	463a      	mov	r2, r7
 802bd16:	4628      	mov	r0, r5
 802bd18:	47b0      	blx	r6
 802bd1a:	2800      	cmp	r0, #0
 802bd1c:	dc08      	bgt.n	802bd30 <__sflush_r+0xfc>
 802bd1e:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
 802bd22:	f043 0340 	orr.w	r3, r3, #64	@ 0x40
 802bd26:	81a3      	strh	r3, [r4, #12]
 802bd28:	f04f 30ff 	mov.w	r0, #4294967295	@ 0xffffffff
 802bd2c:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 802bd30:	4407      	add	r7, r0
 802bd32:	eba8 0800 	sub.w	r8, r8, r0
 802bd36:	e7e7      	b.n	802bd08 <__sflush_r+0xd4>
 802bd38:	dfbffffe 	.word	0xdfbffffe

0802bd3c <_fflush_r>:
 802bd3c:	b538      	push	{r3, r4, r5, lr}
 802bd3e:	690b      	ldr	r3, [r1, #16]
 802bd40:	4605      	mov	r5, r0
 802bd42:	460c      	mov	r4, r1
 802bd44:	b913      	cbnz	r3, 802bd4c <_fflush_r+0x10>
 802bd46:	2500      	movs	r5, #0
 802bd48:	4628      	mov	r0, r5
 802bd4a:	bd38      	pop	{r3, r4, r5, pc}
 802bd4c:	b118      	cbz	r0, 802bd56 <_fflush_r+0x1a>
 802bd4e:	6a03      	ldr	r3, [r0, #32]
 802bd50:	b90b      	cbnz	r3, 802bd56 <_fflush_r+0x1a>
 802bd52:	f7fd fba5 	bl	80294a0 <__sinit>
 802bd56:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
 802bd5a:	2b00      	cmp	r3, #0
 802bd5c:	d0f3      	beq.n	802bd46 <_fflush_r+0xa>
 802bd5e:	6e62      	ldr	r2, [r4, #100]	@ 0x64
 802bd60:	07d0      	lsls	r0, r2, #31
 802bd62:	d404      	bmi.n	802bd6e <_fflush_r+0x32>
 802bd64:	0599      	lsls	r1, r3, #22
 802bd66:	d402      	bmi.n	802bd6e <_fflush_r+0x32>
 802bd68:	6da0      	ldr	r0, [r4, #88]	@ 0x58
 802bd6a:	f7fd fe56 	bl	8029a1a <__retarget_lock_acquire_recursive>
 802bd6e:	4628      	mov	r0, r5
 802bd70:	4621      	mov	r1, r4
 802bd72:	f7ff ff5f 	bl	802bc34 <__sflush_r>
 802bd76:	6e63      	ldr	r3, [r4, #100]	@ 0x64
 802bd78:	07da      	lsls	r2, r3, #31
 802bd7a:	4605      	mov	r5, r0
 802bd7c:	d4e4      	bmi.n	802bd48 <_fflush_r+0xc>
 802bd7e:	89a3      	ldrh	r3, [r4, #12]
 802bd80:	059b      	lsls	r3, r3, #22
 802bd82:	d4e1      	bmi.n	802bd48 <_fflush_r+0xc>
 802bd84:	6da0      	ldr	r0, [r4, #88]	@ 0x58
 802bd86:	f7fd fe49 	bl	8029a1c <__retarget_lock_release_recursive>
 802bd8a:	e7dd      	b.n	802bd48 <_fflush_r+0xc>

0802bd8c <fiprintf>:
 802bd8c:	b40e      	push	{r1, r2, r3}
 802bd8e:	b503      	push	{r0, r1, lr}
 802bd90:	4601      	mov	r1, r0
 802bd92:	ab03      	add	r3, sp, #12
 802bd94:	4805      	ldr	r0, [pc, #20]	@ (802bdac <fiprintf+0x20>)
 802bd96:	f853 2b04 	ldr.w	r2, [r3], #4
 802bd9a:	6800      	ldr	r0, [r0, #0]
 802bd9c:	9301      	str	r3, [sp, #4]
 802bd9e:	f7ff fe31 	bl	802ba04 <_vfiprintf_r>
 802bda2:	b002      	add	sp, #8
 802bda4:	f85d eb04 	ldr.w	lr, [sp], #4
 802bda8:	b003      	add	sp, #12
 802bdaa:	4770      	bx	lr
 802bdac:	240001c0 	.word	0x240001c0

0802bdb0 <__swhatbuf_r>:
 802bdb0:	b570      	push	{r4, r5, r6, lr}
 802bdb2:	460c      	mov	r4, r1
 802bdb4:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 802bdb8:	2900      	cmp	r1, #0
 802bdba:	b096      	sub	sp, #88	@ 0x58
 802bdbc:	4615      	mov	r5, r2
 802bdbe:	461e      	mov	r6, r3
 802bdc0:	da0d      	bge.n	802bdde <__swhatbuf_r+0x2e>
 802bdc2:	89a3      	ldrh	r3, [r4, #12]
 802bdc4:	f013 0f80 	tst.w	r3, #128	@ 0x80
 802bdc8:	f04f 0100 	mov.w	r1, #0
 802bdcc:	bf14      	ite	ne
 802bdce:	2340      	movne	r3, #64	@ 0x40
 802bdd0:	f44f 6380 	moveq.w	r3, #1024	@ 0x400
 802bdd4:	2000      	movs	r0, #0
 802bdd6:	6031      	str	r1, [r6, #0]
 802bdd8:	602b      	str	r3, [r5, #0]
 802bdda:	b016      	add	sp, #88	@ 0x58
 802bddc:	bd70      	pop	{r4, r5, r6, pc}
 802bdde:	466a      	mov	r2, sp
 802bde0:	f000 f848 	bl	802be74 <_fstat_r>
 802bde4:	2800      	cmp	r0, #0
 802bde6:	dbec      	blt.n	802bdc2 <__swhatbuf_r+0x12>
 802bde8:	9901      	ldr	r1, [sp, #4]
 802bdea:	f401 4170 	and.w	r1, r1, #61440	@ 0xf000
 802bdee:	f5a1 5300 	sub.w	r3, r1, #8192	@ 0x2000
 802bdf2:	4259      	negs	r1, r3
 802bdf4:	4159      	adcs	r1, r3
 802bdf6:	f44f 6380 	mov.w	r3, #1024	@ 0x400
 802bdfa:	e7eb      	b.n	802bdd4 <__swhatbuf_r+0x24>

0802bdfc <__smakebuf_r>:
 802bdfc:	898b      	ldrh	r3, [r1, #12]
 802bdfe:	b5f7      	push	{r0, r1, r2, r4, r5, r6, r7, lr}
 802be00:	079d      	lsls	r5, r3, #30
 802be02:	4606      	mov	r6, r0
 802be04:	460c      	mov	r4, r1
 802be06:	d507      	bpl.n	802be18 <__smakebuf_r+0x1c>
 802be08:	f104 0347 	add.w	r3, r4, #71	@ 0x47
 802be0c:	6023      	str	r3, [r4, #0]
 802be0e:	6123      	str	r3, [r4, #16]
 802be10:	2301      	movs	r3, #1
 802be12:	6163      	str	r3, [r4, #20]
 802be14:	b003      	add	sp, #12
 802be16:	bdf0      	pop	{r4, r5, r6, r7, pc}
 802be18:	ab01      	add	r3, sp, #4
 802be1a:	466a      	mov	r2, sp
 802be1c:	f7ff ffc8 	bl	802bdb0 <__swhatbuf_r>
 802be20:	9f00      	ldr	r7, [sp, #0]
 802be22:	4605      	mov	r5, r0
 802be24:	4639      	mov	r1, r7
 802be26:	4630      	mov	r0, r6
 802be28:	f7fb ffba 	bl	8027da0 <_malloc_r>
 802be2c:	b948      	cbnz	r0, 802be42 <__smakebuf_r+0x46>
 802be2e:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
 802be32:	059a      	lsls	r2, r3, #22
 802be34:	d4ee      	bmi.n	802be14 <__smakebuf_r+0x18>
 802be36:	f023 0303 	bic.w	r3, r3, #3
 802be3a:	f043 0302 	orr.w	r3, r3, #2
 802be3e:	81a3      	strh	r3, [r4, #12]
 802be40:	e7e2      	b.n	802be08 <__smakebuf_r+0xc>
 802be42:	89a3      	ldrh	r3, [r4, #12]
 802be44:	6020      	str	r0, [r4, #0]
 802be46:	f043 0380 	orr.w	r3, r3, #128	@ 0x80
 802be4a:	81a3      	strh	r3, [r4, #12]
 802be4c:	9b01      	ldr	r3, [sp, #4]
 802be4e:	e9c4 0704 	strd	r0, r7, [r4, #16]
 802be52:	b15b      	cbz	r3, 802be6c <__smakebuf_r+0x70>
 802be54:	f9b4 100e 	ldrsh.w	r1, [r4, #14]
 802be58:	4630      	mov	r0, r6
 802be5a:	f000 f81d 	bl	802be98 <_isatty_r>
 802be5e:	b128      	cbz	r0, 802be6c <__smakebuf_r+0x70>
 802be60:	89a3      	ldrh	r3, [r4, #12]
 802be62:	f023 0303 	bic.w	r3, r3, #3
 802be66:	f043 0301 	orr.w	r3, r3, #1
 802be6a:	81a3      	strh	r3, [r4, #12]
 802be6c:	89a3      	ldrh	r3, [r4, #12]
 802be6e:	431d      	orrs	r5, r3
 802be70:	81a5      	strh	r5, [r4, #12]
 802be72:	e7cf      	b.n	802be14 <__smakebuf_r+0x18>

0802be74 <_fstat_r>:
 802be74:	b538      	push	{r3, r4, r5, lr}
 802be76:	4d07      	ldr	r5, [pc, #28]	@ (802be94 <_fstat_r+0x20>)
 802be78:	2300      	movs	r3, #0
 802be7a:	4604      	mov	r4, r0
 802be7c:	4608      	mov	r0, r1
 802be7e:	4611      	mov	r1, r2
 802be80:	602b      	str	r3, [r5, #0]
 802be82:	f7d7 fead 	bl	8003be0 <_fstat>
 802be86:	1c43      	adds	r3, r0, #1
 802be88:	d102      	bne.n	802be90 <_fstat_r+0x1c>
 802be8a:	682b      	ldr	r3, [r5, #0]
 802be8c:	b103      	cbz	r3, 802be90 <_fstat_r+0x1c>
 802be8e:	6023      	str	r3, [r4, #0]
 802be90:	bd38      	pop	{r3, r4, r5, pc}
 802be92:	bf00      	nop
 802be94:	2402a2e4 	.word	0x2402a2e4

0802be98 <_isatty_r>:
 802be98:	b538      	push	{r3, r4, r5, lr}
 802be9a:	4d06      	ldr	r5, [pc, #24]	@ (802beb4 <_isatty_r+0x1c>)
 802be9c:	2300      	movs	r3, #0
 802be9e:	4604      	mov	r4, r0
 802bea0:	4608      	mov	r0, r1
 802bea2:	602b      	str	r3, [r5, #0]
 802bea4:	f7d7 feac 	bl	8003c00 <_isatty>
 802bea8:	1c43      	adds	r3, r0, #1
 802beaa:	d102      	bne.n	802beb2 <_isatty_r+0x1a>
 802beac:	682b      	ldr	r3, [r5, #0]
 802beae:	b103      	cbz	r3, 802beb2 <_isatty_r+0x1a>
 802beb0:	6023      	str	r3, [r4, #0]
 802beb2:	bd38      	pop	{r3, r4, r5, pc}
 802beb4:	2402a2e4 	.word	0x2402a2e4

0802beb8 <abort>:
 802beb8:	b508      	push	{r3, lr}
 802beba:	2006      	movs	r0, #6
 802bebc:	f000 f840 	bl	802bf40 <raise>
 802bec0:	2001      	movs	r0, #1
 802bec2:	f7d7 fe3d 	bl	8003b40 <_exit>

0802bec6 <_calloc_r>:
 802bec6:	b570      	push	{r4, r5, r6, lr}
 802bec8:	fba1 5402 	umull	r5, r4, r1, r2
 802becc:	b93c      	cbnz	r4, 802bede <_calloc_r+0x18>
 802bece:	4629      	mov	r1, r5
 802bed0:	f7fb ff66 	bl	8027da0 <_malloc_r>
 802bed4:	4606      	mov	r6, r0
 802bed6:	b928      	cbnz	r0, 802bee4 <_calloc_r+0x1e>
 802bed8:	2600      	movs	r6, #0
 802beda:	4630      	mov	r0, r6
 802bedc:	bd70      	pop	{r4, r5, r6, pc}
 802bede:	220c      	movs	r2, #12
 802bee0:	6002      	str	r2, [r0, #0]
 802bee2:	e7f9      	b.n	802bed8 <_calloc_r+0x12>
 802bee4:	462a      	mov	r2, r5
 802bee6:	4621      	mov	r1, r4
 802bee8:	f7fd fca2 	bl	8029830 <memset>
 802beec:	e7f5      	b.n	802beda <_calloc_r+0x14>

0802beee <_raise_r>:
 802beee:	291f      	cmp	r1, #31
 802bef0:	b538      	push	{r3, r4, r5, lr}
 802bef2:	4605      	mov	r5, r0
 802bef4:	460c      	mov	r4, r1
 802bef6:	d904      	bls.n	802bf02 <_raise_r+0x14>
 802bef8:	2316      	movs	r3, #22
 802befa:	6003      	str	r3, [r0, #0]
 802befc:	f04f 30ff 	mov.w	r0, #4294967295	@ 0xffffffff
 802bf00:	bd38      	pop	{r3, r4, r5, pc}
 802bf02:	6bc2      	ldr	r2, [r0, #60]	@ 0x3c
 802bf04:	b112      	cbz	r2, 802bf0c <_raise_r+0x1e>
 802bf06:	f852 3021 	ldr.w	r3, [r2, r1, lsl #2]
 802bf0a:	b94b      	cbnz	r3, 802bf20 <_raise_r+0x32>
 802bf0c:	4628      	mov	r0, r5
 802bf0e:	f000 f831 	bl	802bf74 <_getpid_r>
 802bf12:	4622      	mov	r2, r4
 802bf14:	4601      	mov	r1, r0
 802bf16:	4628      	mov	r0, r5
 802bf18:	e8bd 4038 	ldmia.w	sp!, {r3, r4, r5, lr}
 802bf1c:	f000 b818 	b.w	802bf50 <_kill_r>
 802bf20:	2b01      	cmp	r3, #1
 802bf22:	d00a      	beq.n	802bf3a <_raise_r+0x4c>
 802bf24:	1c59      	adds	r1, r3, #1
 802bf26:	d103      	bne.n	802bf30 <_raise_r+0x42>
 802bf28:	2316      	movs	r3, #22
 802bf2a:	6003      	str	r3, [r0, #0]
 802bf2c:	2001      	movs	r0, #1
 802bf2e:	e7e7      	b.n	802bf00 <_raise_r+0x12>
 802bf30:	2100      	movs	r1, #0
 802bf32:	f842 1024 	str.w	r1, [r2, r4, lsl #2]
 802bf36:	4620      	mov	r0, r4
 802bf38:	4798      	blx	r3
 802bf3a:	2000      	movs	r0, #0
 802bf3c:	e7e0      	b.n	802bf00 <_raise_r+0x12>
	...

0802bf40 <raise>:
 802bf40:	4b02      	ldr	r3, [pc, #8]	@ (802bf4c <raise+0xc>)
 802bf42:	4601      	mov	r1, r0
 802bf44:	6818      	ldr	r0, [r3, #0]
 802bf46:	f7ff bfd2 	b.w	802beee <_raise_r>
 802bf4a:	bf00      	nop
 802bf4c:	240001c0 	.word	0x240001c0

0802bf50 <_kill_r>:
 802bf50:	b538      	push	{r3, r4, r5, lr}
 802bf52:	4d07      	ldr	r5, [pc, #28]	@ (802bf70 <_kill_r+0x20>)
 802bf54:	2300      	movs	r3, #0
 802bf56:	4604      	mov	r4, r0
 802bf58:	4608      	mov	r0, r1
 802bf5a:	4611      	mov	r1, r2
 802bf5c:	602b      	str	r3, [r5, #0]
 802bf5e:	f7d7 fddd 	bl	8003b1c <_kill>
 802bf62:	1c43      	adds	r3, r0, #1
 802bf64:	d102      	bne.n	802bf6c <_kill_r+0x1c>
 802bf66:	682b      	ldr	r3, [r5, #0]
 802bf68:	b103      	cbz	r3, 802bf6c <_kill_r+0x1c>
 802bf6a:	6023      	str	r3, [r4, #0]
 802bf6c:	bd38      	pop	{r3, r4, r5, pc}
 802bf6e:	bf00      	nop
 802bf70:	2402a2e4 	.word	0x2402a2e4

0802bf74 <_getpid_r>:
 802bf74:	f7d7 bdc9 	b.w	8003b0a <_getpid>

0802bf78 <_init>:
 802bf78:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 802bf7a:	bf00      	nop
 802bf7c:	bcf8      	pop	{r3, r4, r5, r6, r7}
 802bf7e:	bc08      	pop	{r3}
 802bf80:	469e      	mov	lr, r3
 802bf82:	4770      	bx	lr

0802bf84 <_fini>:
 802bf84:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 802bf86:	bf00      	nop
 802bf88:	bcf8      	pop	{r3, r4, r5, r6, r7}
 802bf8a:	bc08      	pop	{r3}
 802bf8c:	469e      	mov	lr, r3
 802bf8e:	4770      	bx	lr